--- 7.4/2024-02-01T07:17:04Z/2024-01-16T00:00:00Z/nm-bsd-ot14.txt Sat Feb 3 08:21:26 2024 +++ 7.4/2024-02-01T07:17:04Z/2024-01-17T00:00:00Z/nm-bsd-ot14.txt Sat Feb 3 11:10:36 2024 @@ -2,15 +2,15 @@ 00011006 A mp_pdirpa 0001419d A acpi_pdirpa 01000000 A __kernel_phys_base -02543000 T __kernel_kutext_phys -02547000 C __kernel_cptext_phys -02548000 C __kernel_rodata_phys -02e03000 R __kernel_kutext_page_phys -02e05000 C __kernel_randomdata_phys -030b1000 R __kernel_data_phys -033ea000 D __kernel_kudata_phys -033eb000 C __kernel_bss_phys -03800000 B __kernel_phys_end +025f5000 T __kernel_kutext_phys +025f9000 C __kernel_cptext_phys +025fa000 C __kernel_rodata_phys +02eec000 R __kernel_kutext_page_phys +02eee000 C __kernel_randomdata_phys +031ab000 R __kernel_data_phys +03501000 D __kernel_kudata_phys +03502000 C __kernel_bss_phys +03a00000 B __kernel_phys_end 80000000 A __kernel_virt_to_phys ffffffff80000000 A __kernel_base ffffffff81000000 A __kernel_virt_base @@ -43,51 +43,50 @@ ffffffff810060b0 T drm_dev_put ffffffff81006130 T drm_minor_release ffffffff810061b0 T drm_put_dev ffffffff81006260 T drm_dev_unregister -ffffffff810063d0 T drm_dev_enter -ffffffff81006400 T drm_dev_exit -ffffffff81006430 T drm_dev_unplug -ffffffff81006450 T __devm_drm_dev_alloc -ffffffff810064b0 T drm_dev_register -ffffffff81006830 T drm_dev_set_unique -ffffffff810068a0 T drm_attach_platform -ffffffff81006940 T drmprint -ffffffff81006990 T drmsubmatch -ffffffff810069e0 T drm_attach_pci -ffffffff81006af0 T drm_pciprobe -ffffffff81006b90 T drm_find_description -ffffffff81006c50 T drm_probe -ffffffff81006ca0 T drm_attach -ffffffff81007130 t drm_dev_init_release -ffffffff81007160 t drm_minor_alloc -ffffffff81007280 T drm_detach -ffffffff81007360 T drm_quiesce -ffffffff810073e0 T drm_wakeup -ffffffff81007430 T drm_activate -ffffffff81007510 T drm_file_cmp -ffffffff81007550 T drm_file_tree_SPLAY_INSERT -ffffffff81007610 T drm_file_tree_SPLAY -ffffffff810077b0 T drm_file_tree_SPLAY_REMOVE -ffffffff81007840 T drm_file_tree_SPLAY_MINMAX -ffffffff81007970 T drm_find_file_by_minor -ffffffff810079f0 T drm_get_device_from_kdev -ffffffff81007a50 T filt_drmdetach -ffffffff81007aa0 T filt_drmkms -ffffffff81007ae0 T filt_drmreaddetach -ffffffff81007b30 T filt_drmread -ffffffff81007bd0 T drmkqfilter -ffffffff81007d50 T drmopen -ffffffff81007fd0 T drmclose -ffffffff810081a0 T drmread -ffffffff81008480 T drm_dequeue_event -ffffffff81008560 T drmmmap -ffffffff81008590 T drm_dmamem_alloc -ffffffff81008730 T drm_dmamem_free -ffffffff810087d0 T drm_pci_alloc -ffffffff81008890 T drm_pci_free -ffffffff81008950 T drm_order -ffffffff810089d0 T drm_getpciinfo -ffffffff81008a90 t kasprintf -ffffffff81008b60 t drm_minor_alloc_release +ffffffff81006430 T drm_dev_enter +ffffffff81006460 T drm_dev_exit +ffffffff81006490 T drm_dev_unplug +ffffffff810064b0 T __devm_drm_dev_alloc +ffffffff81006510 T drm_dev_register +ffffffff81006970 T drm_attach_platform +ffffffff81006a10 T drmprint +ffffffff81006a60 T drmsubmatch +ffffffff81006ab0 T drm_attach_pci +ffffffff81006bc0 T drm_pciprobe +ffffffff81006c60 T drm_find_description +ffffffff81006d20 T drm_probe +ffffffff81006d70 T drm_attach +ffffffff81007200 t drm_dev_init_release +ffffffff81007230 t drm_minor_alloc +ffffffff81007360 T drm_detach +ffffffff81007440 T drm_quiesce +ffffffff810074c0 T drm_wakeup +ffffffff81007510 T drm_activate +ffffffff810075f0 T drm_file_cmp +ffffffff81007630 T drm_file_tree_SPLAY_INSERT +ffffffff810076f0 T drm_file_tree_SPLAY +ffffffff81007890 T drm_file_tree_SPLAY_REMOVE +ffffffff81007920 T drm_file_tree_SPLAY_MINMAX +ffffffff81007a50 T drm_find_file_by_minor +ffffffff81007ad0 T drm_get_device_from_kdev +ffffffff81007b30 T filt_drmdetach +ffffffff81007b80 T filt_drmkms +ffffffff81007bc0 T filt_drmreaddetach +ffffffff81007c10 T filt_drmread +ffffffff81007cb0 T drmkqfilter +ffffffff81007e30 T drmopen +ffffffff810080b0 T drmclose +ffffffff81008280 T drmread +ffffffff81008560 T drm_dequeue_event +ffffffff81008640 T drmmmap +ffffffff81008670 T drm_dmamem_alloc +ffffffff81008810 T drm_dmamem_free +ffffffff810088b0 T drm_pci_alloc +ffffffff81008970 T drm_pci_free +ffffffff81008a30 T drm_order +ffffffff81008ab0 T drm_getpciinfo +ffffffff81008b70 t kasprintf +ffffffff81008c40 t drm_minor_alloc_release ffffffff81009000 T vga_ioctl ffffffff81009130 T vga_mmap ffffffff81009180 T vga_alloc_screen @@ -5472,17 +5471,19 @@ ffffffff8128d000 T init_exec ffffffff8128e000 T elf_check_header ffffffff8128e070 T elf_load_psection ffffffff8128e4b0 T elf_read_from -ffffffff8128e530 T elf_load_file -ffffffff8128ec30 T exec_elf_makecmds -ffffffff8128f5b0 T elf_os_pt_note -ffffffff8128f8d0 T exec_elf_fixup -ffffffff8128fac0 T elf_os_pt_note_name -ffffffff8128fb30 T coredump_elf -ffffffff8128fd40 T coredump_setup_elf -ffffffff8128ffa0 T coredump_walk_elf -ffffffff81290060 T coredump_notes_elf -ffffffff812903c0 T coredump_writenote_elf -ffffffff81290480 T coredump_note_elf +ffffffff8128e530 T elf_adjustpins +ffffffff8128e5f0 T elf_read_pintable +ffffffff8128e890 T elf_load_file +ffffffff8128f110 T exec_elf_makecmds +ffffffff8128fbf0 T elf_os_pt_note +ffffffff8128ff10 T exec_elf_fixup +ffffffff81290100 T elf_os_pt_note_name +ffffffff81290170 T coredump_elf +ffffffff81290380 T coredump_setup_elf +ffffffff812905e0 T coredump_walk_elf +ffffffff812906a0 T coredump_notes_elf +ffffffff81290a00 T coredump_writenote_elf +ffffffff81290ac0 T coredump_note_elf ffffffff81291000 T exec_script_makecmds ffffffff81292000 T vmcmdset_extend ffffffff812920d0 T kill_vmcmds @@ -5679,23 +5680,23 @@ ffffffff812a2440 t klist_rwlock_lock ffffffff812a2480 t klist_rwlock_unlock ffffffff812a3000 T check_exec ffffffff812a3320 T sys_execve -ffffffff812a4400 T copyargs -ffffffff812a45d0 T exec_timekeep_map -ffffffff812a4770 T exec_sigcode_map +ffffffff812a4510 T copyargs +ffffffff812a46e0 T exec_timekeep_map +ffffffff812a4880 T exec_sigcode_map ffffffff812a5000 T sys_exit ffffffff812a5020 T exit1 -ffffffff812a5750 T sys___threxit -ffffffff812a57b0 T process_untrace -ffffffff812a5840 T process_reparent -ffffffff812a59b0 T process_clear_orphan -ffffffff812a5a20 T exit2 -ffffffff812a5a90 T proc_free -ffffffff812a5af0 T reaper -ffffffff812a5cc0 T process_zap -ffffffff812a5e90 T dowait6 -ffffffff812a6320 T proc_finish_wait -ffffffff812a6430 T sys_wait4 -ffffffff812a6580 T sys_waitid +ffffffff812a5790 T sys___threxit +ffffffff812a57f0 T process_untrace +ffffffff812a5880 T process_reparent +ffffffff812a59f0 T process_clear_orphan +ffffffff812a5a60 T exit2 +ffffffff812a5ad0 T proc_free +ffffffff812a5b30 T reaper +ffffffff812a5d00 T process_zap +ffffffff812a5ed0 T dowait6 +ffffffff812a6360 T proc_finish_wait +ffffffff812a6470 T sys_wait4 +ffffffff812a65c0 T sys_waitid ffffffff812a7000 T fork_return ffffffff812a7040 T sys_fork ffffffff812a7090 T fork1 @@ -5705,12 +5706,12 @@ ffffffff812a7910 T thread_fork ffffffff812a7d70 T thread_new ffffffff812a7e40 T process_initialize ffffffff812a7f80 T process_new -ffffffff812a8250 T allocpid -ffffffff812a8330 T fork_check_maxthread -ffffffff812a83c0 T alloctid -ffffffff812a8420 T ispidtaken -ffffffff812a84d0 T freepid -ffffffff812a8510 T proc_trampoline_mi +ffffffff812a8300 T allocpid +ffffffff812a83e0 T fork_check_maxthread +ffffffff812a8470 T alloctid +ffffffff812a84d0 T ispidtaken +ffffffff812a8580 T freepid +ffffffff812a85c0 T proc_trampoline_mi ffffffff812a9000 T kthread_create ffffffff812a90b0 T kthread_exit ffffffff812a9120 T kthread_create_deferred @@ -10809,16 +10810,16 @@ ffffffff81513a50 T uvm_map_immutable ffffffff81513cb0 T uvm_map_advice ffffffff81513ee0 T uvm_map_extract ffffffff815142c0 T uvm_map_clean -ffffffff81514850 T uvm_map_uaddr -ffffffff81514970 T uvm_map_boundary -ffffffff81514b70 T uvm_map_freelist_update -ffffffff81514cd0 T uvm_map_freelist_update_clear -ffffffff81514dd0 T uvm_map_freelist_update_refill -ffffffff81514e70 T uvm_map_set_uaddr -ffffffff81515010 T uvm_map_mquery -ffffffff81515320 T uvm_map_fill_vmmap -ffffffff815155b0 t uvm_map_addr_RBT_COMPARE -ffffffff815155f0 t uvm_map_addr_RBT_AUGMENT +ffffffff81514860 T uvm_map_uaddr +ffffffff81514980 T uvm_map_boundary +ffffffff81514b80 T uvm_map_freelist_update +ffffffff81514ce0 T uvm_map_freelist_update_clear +ffffffff81514de0 T uvm_map_freelist_update_refill +ffffffff81514e80 T uvm_map_set_uaddr +ffffffff81515020 T uvm_map_mquery +ffffffff81515330 T uvm_map_fill_vmmap +ffffffff815155c0 t uvm_map_addr_RBT_COMPARE +ffffffff81515600 t uvm_map_addr_RBT_AUGMENT ffffffff81516000 T uvm_sysctl ffffffff815165a0 T uvm_total ffffffff815166d0 T uvmexp_read @@ -10833,15 +10834,15 @@ ffffffff81517d30 T sys_mprotect ffffffff81517ea0 T sys_msyscall ffffffff81517f40 T sys_pinsyscall ffffffff81518010 T sys_pinsyscalls -ffffffff81518040 T sys_mimmutable -ffffffff815180e0 T sys_minherit -ffffffff81518180 T sys_madvise -ffffffff81518260 T sys_mlock -ffffffff81518380 T sys_munlock -ffffffff81518440 T sys_mlockall -ffffffff815184c0 T sys_munlockall -ffffffff81518500 T uvm_mmaplock -ffffffff81518640 T sys_kbind +ffffffff81518180 T sys_mimmutable +ffffffff81518220 T sys_minherit +ffffffff815182c0 T sys_madvise +ffffffff815183a0 T sys_mlock +ffffffff815184c0 T sys_munlock +ffffffff81518580 T sys_mlockall +ffffffff81518600 T sys_munlockall +ffffffff81518640 T uvm_mmaplock +ffffffff81518780 T sys_kbind ffffffff81519000 T uvm_obj_init ffffffff815190a0 T uvm_obj_destroy ffffffff815190e0 T uvm_obj_setlock @@ -11807,44036 +11808,45654 @@ ffffffff815d0520 t trap_print ffffffff815d0620 T usertrap ffffffff815d0850 T ast ffffffff815d0930 T syscall -ffffffff815d0db0 T child_return -ffffffff815d1000 T cpu_fork -ffffffff815d11b0 T setguardpage -ffffffff815d11f0 T cpu_exit -ffffffff815d1220 T vmapbuf -ffffffff815d1350 T vunmapbuf -ffffffff815d1420 T tcb_get -ffffffff815d1460 T tcb_set -ffffffff815d2000 T fpuinit -ffffffff815d2080 T fputrap -ffffffff815d21a0 T fpu_kernel_enter -ffffffff815d2200 T fpu_kernel_exit -ffffffff815d3000 T softintr_init -ffffffff815d30c0 T softintr_dispatch -ffffffff815d31d0 T softintr_establish -ffffffff815d3280 T softintr_disestablish -ffffffff815d4000 t i8259_hwmask -ffffffff815d4060 t i8259_hwunmask -ffffffff815d40c0 t i8259_setup -ffffffff815d4250 T i8259_default_setup -ffffffff815d5000 T amd64_print_l1_cacheinfo -ffffffff815d5180 T amd64_print_l2_cacheinfo -ffffffff815d5340 T intel_print_cacheinfo -ffffffff815d5580 T x86_print_cacheinfo -ffffffff815d6000 T Xcalltrap_specstk_untramp -ffffffff815d6040 T Xrecurse_lapic_ipi -ffffffff815d60c0 T Xintr_lapic_ipi_untramp -ffffffff815d6200 T Xresume_lapic_ipi -ffffffff815d6250 T Xrecurse_lapic_ltimer -ffffffff815d62d0 T Xintr_lapic_ltimer_untramp -ffffffff815d6410 T Xresume_lapic_ltimer -ffffffff815d6460 T Xrecurse_xen_upcall -ffffffff815d64e0 T Xintr_xen_upcall_untramp -ffffffff815d6620 T Xresume_xen_upcall -ffffffff815d6670 T Xrecurse_hyperv_upcall -ffffffff815d66f0 T Xintr_hyperv_upcall_untramp -ffffffff815d6830 T Xresume_hyperv_upcall -ffffffff815d6880 T Xrecurse_legacy0 -ffffffff815d6900 T Xresume_legacy0 -ffffffff815d6930 T Xintr_legacy0_untramp -ffffffff815d6b60 T Xrecurse_legacy1 -ffffffff815d6be0 T Xresume_legacy1 -ffffffff815d6c10 T Xintr_legacy1_untramp -ffffffff815d6e40 T Xrecurse_legacy2 -ffffffff815d6ec0 T Xresume_legacy2 -ffffffff815d6ef0 T Xintr_legacy2_untramp -ffffffff815d7120 T Xrecurse_legacy3 -ffffffff815d71a0 T Xresume_legacy3 -ffffffff815d71d0 T Xintr_legacy3_untramp -ffffffff815d7400 T Xrecurse_legacy4 -ffffffff815d7480 T Xresume_legacy4 -ffffffff815d74b0 T Xintr_legacy4_untramp -ffffffff815d76e0 T Xrecurse_legacy5 -ffffffff815d7760 T Xresume_legacy5 -ffffffff815d7790 T Xintr_legacy5_untramp -ffffffff815d79c0 T Xrecurse_legacy6 -ffffffff815d7a40 T Xresume_legacy6 -ffffffff815d7a70 T Xintr_legacy6_untramp -ffffffff815d7ca0 T Xrecurse_legacy7 -ffffffff815d7d20 T Xresume_legacy7 -ffffffff815d7d50 T Xintr_legacy7_untramp -ffffffff815d7f80 T Xrecurse_legacy8 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psp_v11_0_8_ring_destroy -ffffffff81e7cb50 t psp_v11_0_8_ring_get_wptr -ffffffff81e7cbc0 t psp_v11_0_8_ring_set_wptr -ffffffff81e7d000 T psp_v12_0_set_psp_funcs -ffffffff81e7d030 t psp_v12_0_init_microcode -ffffffff81e7d2a0 t psp_v12_0_bootloader_load_sysdrv -ffffffff81e7d5c0 t psp_v12_0_bootloader_load_sos -ffffffff81e7d920 t psp_v12_0_ring_init -ffffffff81e7df00 t psp_v12_0_ring_create -ffffffff81e7e460 t psp_v12_0_ring_stop -ffffffff81e7e680 t psp_v12_0_ring_destroy -ffffffff81e7e700 t psp_v12_0_mode1_reset -ffffffff81e7e800 t psp_v12_0_ring_get_wptr -ffffffff81e7e870 t psp_v12_0_ring_set_wptr -ffffffff81e7f000 T psp_v13_0_set_psp_funcs -ffffffff81e7f030 t psp_v13_0_init_microcode -ffffffff81e7f160 t psp_v13_0_bootloader_load_kdb -ffffffff81e7f180 t psp_v13_0_bootloader_load_spl -ffffffff81e7f1a0 t psp_v13_0_bootloader_load_sysdrv -ffffffff81e7f1c0 t psp_v13_0_bootloader_load_soc_drv -ffffffff81e7f1e0 t psp_v13_0_bootloader_load_intf_drv -ffffffff81e7f200 t psp_v13_0_bootloader_load_dbg_drv -ffffffff81e7f220 t psp_v13_0_bootloader_load_ras_drv -ffffffff81e7f240 t psp_v13_0_bootloader_load_sos -ffffffff81e7f5a0 t psp_v13_0_ring_init -ffffffff81e7f620 t psp_v13_0_ring_create -ffffffff81e7fcb0 t psp_v13_0_ring_stop -ffffffff81e80040 t psp_v13_0_ring_destroy -ffffffff81e800c0 t psp_v13_0_memory_training -ffffffff81e804f0 t psp_v13_0_ring_get_wptr -ffffffff81e80560 t psp_v13_0_ring_set_wptr -ffffffff81e80660 t psp_v13_0_load_usbc_pd_fw -ffffffff81e80850 t psp_v13_0_read_usbc_pd_fw -ffffffff81e80970 t psp_v13_0_update_spirom -ffffffff81e80b40 t psp_v13_0_vbflash_status -ffffffff81e80ba0 t psp_v13_0_bootloader_load_component -ffffffff81e80d70 t psp_v13_0_wait_for_bootloader -ffffffff81e80f40 t psp_v13_0_memory_training_send_msg -ffffffff81e810a0 t psp_v13_0_exec_spi_cmd -ffffffff81e82000 T psp_v13_0_4_set_psp_funcs -ffffffff81e82030 t psp_v13_0_4_init_microcode -ffffffff81e82100 t psp_v13_0_4_bootloader_load_kdb -ffffffff81e82120 t psp_v13_0_4_bootloader_load_spl -ffffffff81e82140 t psp_v13_0_4_bootloader_load_sysdrv -ffffffff81e82160 t psp_v13_0_4_bootloader_load_soc_drv -ffffffff81e82180 t psp_v13_0_4_bootloader_load_intf_drv -ffffffff81e821a0 t psp_v13_0_4_bootloader_load_dbg_drv -ffffffff81e821c0 t psp_v13_0_4_bootloader_load_sos -ffffffff81e82530 t psp_v13_0_4_ring_init -ffffffff81e825b0 t psp_v13_0_4_ring_create -ffffffff81e82c50 t psp_v13_0_4_ring_stop -ffffffff81e82fe0 t psp_v13_0_4_ring_destroy -ffffffff81e83060 t psp_v13_0_4_ring_get_wptr -ffffffff81e830d0 t psp_v13_0_4_ring_set_wptr -ffffffff81e831d0 t psp_v13_0_4_bootloader_load_component -ffffffff81e833a0 t psp_v13_0_4_wait_for_bootloader -ffffffff81e84000 T psp_v3_1_set_psp_funcs -ffffffff81e84030 t psp_v3_1_init_microcode -ffffffff81e840f0 t psp_v3_1_bootloader_load_sysdrv -ffffffff81e84410 t psp_v3_1_bootloader_load_sos -ffffffff81e84770 t psp_v3_1_ring_init -ffffffff81e847f0 t psp_v3_1_ring_create -ffffffff81e852f0 t psp_v3_1_ring_stop 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sdma_v5_0_ring_test_ib -ffffffff81e9a4d0 t sdma_v5_0_ring_insert_nop -ffffffff81e9a600 t sdma_v5_0_ring_pad_ib -ffffffff81e9a730 t sdma_v5_0_ring_init_cond_exec -ffffffff81e9a960 t sdma_v5_0_ring_patch_cond_exec -ffffffff81e9aa20 t sdma_v5_0_ring_emit_wreg -ffffffff81e9ab70 t sdma_v5_0_ring_emit_reg_wait -ffffffff81e9adf0 t sdma_v5_0_ring_emit_reg_write_reg_wait -ffffffff81e9ae70 t sdma_v5_0_ring_preempt_ib -ffffffff81e9afb0 t sdma_v5_0_ring_emit_mem_sync -ffffffff81e9b1c0 t sdma_v5_0_emit_copy_buffer -ffffffff81e9b280 t sdma_v5_0_emit_fill_buffer -ffffffff81e9b310 t sdma_v5_0_vm_copy_pte -ffffffff81e9b3d0 t sdma_v5_0_vm_write_pte -ffffffff81e9b4a0 t sdma_v5_0_vm_set_pte_pde -ffffffff81e9b5a0 t sdma_v5_0_set_trap_irq_state -ffffffff81e9b630 t sdma_v5_0_process_trap_irq -ffffffff81e9b740 t sdma_v5_0_process_illegal_inst_irq -ffffffff81e9b770 t sdma_v5_0_mqd_init -ffffffff81e9b850 t sdma_v5_0_ctx_switch_enable -ffffffff81e9bb70 t sdma_v5_0_enable -ffffffff81e9c000 t sdma_v5_2_early_init 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vcpu_vmx_check_cap -ffffffff825250d0 T vcpu_vmx_compute_ctrl -ffffffff825252b0 T vcpu_init_vmx -ffffffff82525650 T vcpu_deinit_vmx -ffffffff825257d0 T vcpu_reset_regs -ffffffff82525810 T vcpu_init_svm -ffffffff825259a0 T vcpu_deinit_svm -ffffffff82525ae0 T vcpu_init -ffffffff82525ba0 T vmm_free_vpid -ffffffff82525c10 T vcpu_deinit -ffffffff82525c50 T vm_run -ffffffff82525e10 T vcpu_run_vmx -ffffffff82526600 T vcpu_run_svm -ffffffff82526bf0 T vmm_fpurestore -ffffffff82526cb0 T vmm_fpusave -ffffffff82526d30 T vmm_translate_gva -ffffffff82527040 T vmm_update_pvclock -ffffffff82527140 T vmx_get_exit_info -ffffffff825271a0 T vmx_handle_exit -ffffffff825275d0 T vmx_instruction_error_decode -ffffffff825277a0 T vmm_get_guest_cpu_cpl -ffffffff82527890 T vmx_handle_intr -ffffffff82527920 T svm_handle_hlt -ffffffff82527970 T vmx_handle_hlt -ffffffff82527a20 T svm_handle_exit -ffffffff82527d40 T svm_handle_np_fault -ffffffff82527ee0 T vmm_handle_cpuid -ffffffff82528580 T svm_handle_msr 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svm_exit_reason_decode -ffffffff8252ad40 T vcpu_state_decode -ffffffff8252b000 T vmm_dispatch_intr -ffffffff8252b020 T vmxon -ffffffff8252b050 T vmxoff -ffffffff8252b080 T vmclear -ffffffff8252b0b0 T vmptrld -ffffffff8252b0e0 T vmptrst -ffffffff8252b110 T vmwrite -ffffffff8252b140 T vmread -ffffffff8252b170 T invvpid -ffffffff8252b18b t invvpid_fail -ffffffff8252b192 t invvpid_ret -ffffffff8252b1b0 T invept -ffffffff8252b1cb t invept_fail -ffffffff8252b1d2 t invept_ret -ffffffff8252b1f0 T vmx_enter_guest -ffffffff8252b21b t skip_init -ffffffff8252b2e8 t no_l1df_msr -ffffffff8252b2eb t l1df_tlb_loop -ffffffff8252b304 t l1df_tlb_done -ffffffff8252b30c t l1df_load_cache -ffffffff8252b323 t done_flush -ffffffff8252b3b6 t do_resume -ffffffff8252b43b t fail_launch_or_resume -ffffffff8252b47d t fail_launch_unknown -ffffffff8252b48a t fail_launch_invalid_vmcs -ffffffff8252b497 t fail_launch_valid_vmcs -ffffffff8252b4b4 t vmx_exit_handler_asm -ffffffff8252b579 t restore_host -ffffffff8252b610 T svm_enter_guest -ffffffff8252b7a0 t restore_host_svm -ffffffff8252c000 T sdmmc_match -ffffffff8252c050 T sdmmc_attach -ffffffff8252c390 T sdmmc_detach -ffffffff8252c440 T sdmmc_activate -ffffffff8252c510 T sdmmc_discover_task -ffffffff8252c5d0 T sdmmc_create_thread -ffffffff8252c640 T sdmmc_holds_root_device -ffffffff8252c6a0 T sdmmc_task_thread -ffffffff8252c890 T sdmmc_needs_discover -ffffffff8252c940 T sdmmc_del_task -ffffffff8252c9f0 T sdmmc_card_detach -ffffffff8252cad0 T sdmmc_add_task -ffffffff8252cb50 T sdmmc_card_attach -ffffffff8252cc60 T sdmmc_enable -ffffffff8252cdb0 T sdmmc_scan -ffffffff8252ce40 T sdmmc_init -ffffffff8252cf40 T sdmmc_disable -ffffffff8252d0a0 T sdmmc_function_free -ffffffff8252d0c0 T sdmmc_delay -ffffffff8252d110 T sdmmc_select_card -ffffffff8252d330 T sdmmc_set_bus_power -ffffffff8252d4e0 T sdmmc_function_alloc -ffffffff8252d570 T sdmmc_app_command -ffffffff8252d700 T sdmmc_mmc_command -ffffffff8252d780 T sdmmc_go_idle_state -ffffffff8252d890 T sdmmc_send_if_cond -ffffffff8252d9e0 T sdmmc_set_relative_addr -ffffffff8252e000 T sdmmc_cisptr -ffffffff8252e0a0 T sdmmc_read_cis -ffffffff8252e3e0 T sdmmc_print_cis -ffffffff8252e550 T sdmmc_check_cis_quirks -ffffffff8252f000 T sdmmc_io_enable -ffffffff8252f2a0 T sdmmc_io_reset -ffffffff8252f3d0 T sdmmc_io_send_op_cond -ffffffff8252f540 T sdmmc_io_scan -ffffffff8252f690 T sdmmc_io_init -ffffffff8252f7c0 T sdmmc_io_set_highspeed -ffffffff8252fa60 T sdmmc_io_set_bus_width -ffffffff8252fcf0 T sdmmc_io_function_ready -ffffffff8252fe70 T sdmmc_io_read_1 -ffffffff8252ffc0 T sdmmc_io_function_enable -ffffffff82530390 T sdmmc_io_write_1 -ffffffff82530510 T sdmmc_io_function_disable -ffffffff82530790 T sdmmc_io_attach -ffffffff82530880 T sdmmc_print -ffffffff82530ad0 T sdmmc_submatch -ffffffff82530b50 T sdmmc_io_detach -ffffffff82530c00 T sdmmc_io_rw_direct -ffffffff82530da0 T sdmmc_io_rw_extended_subr -ffffffff82530f40 T sdmmc_io_rw_extended -ffffffff82531340 T sdmmc_io_read_2 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-ffffffff825346c0 T sdmmc_mem_sd_switch -ffffffff82534970 T sdmmc_be512_to_bitfield512 -ffffffff82534a20 T sdmmc_mem_mmc_switch -ffffffff82534b10 T sdmmc_mem_init -ffffffff82534c60 T sdmmc_mem_set_blocklen -ffffffff82534d60 T sdmmc_mem_sd_init -ffffffff82535140 T sdmmc_mem_mmc_init -ffffffff82535800 T sdmmc_mem_select_transfer_mode -ffffffff82535880 T sdmmc_mem_execute_tuning -ffffffff82535910 T sdmmc_mem_read_block_subr -ffffffff82535c70 T sdmmc_mem_single_read_block -ffffffff82535d40 T sdmmc_mem_read_block -ffffffff82535ef0 T sdmmc_mem_write_block_subr -ffffffff82536240 T sdmmc_mem_single_write_block -ffffffff82536310 T sdmmc_mem_write_block -ffffffff825364c0 T sdmmc_mem_hibernate_write -ffffffff82537000 T sdmmc_scsi_cmd -ffffffff825371f0 T sdmmc_minphys -ffffffff82537270 T sdmmc_scsi_attach -ffffffff82537460 T sdmmc_alloc_ccbs -ffffffff825375a0 T sdmmc_free_ccbs -ffffffff82537600 T sdmmc_scsi_detach -ffffffff82537760 T sdmmc_stimeout -ffffffff825377e0 T sdmmc_ccb_alloc -ffffffff82537890 T sdmmc_ccb_free -ffffffff82537970 T sdmmc_inquiry -ffffffff82537be0 T sdmmc_start_xs -ffffffff82537cd0 T sdmmc_complete_xs -ffffffff82537da0 T sdmmc_done_xs -ffffffff82537df0 T sdmmc_scsi_hibernate_io -ffffffff82538000 T bwfm_sdio_preinit -ffffffff825384a0 T bwfm_sdio_txcheck -ffffffff825384e0 T bwfm_sdio_txdata -ffffffff82538550 T bwfm_sdio_txctl -ffffffff825386a0 T bwfm_sdio_buscore_read -ffffffff825386b0 T bwfm_sdio_buscore_write -ffffffff825386d0 T bwfm_sdio_buscore_prepare -ffffffff82538810 T bwfm_sdio_buscore_activate -ffffffff82538890 T bwfm_sdio_match -ffffffff82538940 T bwfm_sdio_attach -ffffffff82538c00 T bwfm_sdio_detach -ffffffff82538c60 T bwfm_sdio_task -ffffffff82538dc0 T bwfm_sdio_write_1 -ffffffff82538df0 T bwfm_sdio_read_1 -ffffffff82538e20 T bwfm_sdio_write_4 -ffffffff82538ed0 T bwfm_sdio_read_4 -ffffffff82538f80 T bwfm_sdio_load_microcode -ffffffff825391e0 T bwfm_sdio_clkctl -ffffffff82539310 T bwfm_sdio_dev_write -ffffffff82539360 T bwfm_sdio_intr -ffffffff825393a0 T bwfm_sdio_ram_read_write -ffffffff825395d0 T bwfm_sdio_htclk -ffffffff82539840 T bwfm_sdio_readshared -ffffffff82539910 T bwfm_sdio_dev_read -ffffffff82539950 T bwfm_sdio_rx_frames -ffffffff82539d00 T bwfm_sdio_tx_frames -ffffffff82539e00 T bwfm_sdio_backplane -ffffffff82539eb0 T bwfm_sdio_buf_read -ffffffff82539f90 T bwfm_sdio_buf_write -ffffffff8253a040 T bwfm_sdio_frame_read_write -ffffffff8253a1c0 T bwfm_sdio_newbuf -ffffffff8253a240 T bwfm_sdio_tx_ok -ffffffff8253a2a0 T bwfm_sdio_tx_ctrlframe -ffffffff8253a3a0 T bwfm_sdio_tx_dataframe -ffffffff8253a4f0 T bwfm_sdio_rx_glom -ffffffff8253b000 T onewire_match -ffffffff8253b050 T onewire_attach -ffffffff8253b0f0 T onewire_detach -ffffffff8253b160 T onewire_activate -ffffffff8253b180 T onewire_scan -ffffffff8253b3a0 T onewire_createthread -ffffffff8253b410 T onewire_print -ffffffff8253b4e0 T onewirebus_print -ffffffff8253b530 T onewire_lock -ffffffff8253b550 T onewire_unlock -ffffffff8253b570 T onewire_reset -ffffffff8253b590 T onewire_bit -ffffffff8253b5b0 T onewire_read_byte -ffffffff8253b6f0 T onewire_write_byte -ffffffff8253b7d0 T onewire_read_block -ffffffff8253b870 T onewire_write_block -ffffffff8253b910 T onewire_triplet -ffffffff8253b9f0 T onewire_matchrom -ffffffff8253bb40 T onewire_search -ffffffff8253bee0 T onewire_thread -ffffffff8253c000 T onewire_crc -ffffffff8253c0b0 T onewire_crc16 -ffffffff8253c170 T onewire_famname -ffffffff8253c1b0 T onewire_matchbyfam -ffffffff8253d000 T owid_match -ffffffff8253d030 T owid_attach -ffffffff8253d100 T owid_detach -ffffffff8253d140 T owid_activate -ffffffff8253e000 T owsbm_match -ffffffff8253e030 T owsbm_attach -ffffffff8253e1d0 T owsbm_detach -ffffffff8253e240 T owsbm_activate -ffffffff8253e270 T owsbm_update -ffffffff8253f000 T owtemp_match -ffffffff8253f030 T owtemp_attach -ffffffff8253f130 T owtemp_detach -ffffffff8253f1a0 T owtemp_activate -ffffffff8253f1d0 T owtemp_update -ffffffff82540000 T owctr_match -ffffffff82540030 T owctr_attach -ffffffff82540180 T owctr_detach -ffffffff825401f0 T owctr_activate -ffffffff82540220 T owctr_update -ffffffff82540250 T owctr_update_counter -ffffffff82541000 A __text_page_start -ffffffff82541000 T Xsyscall_meltdown -ffffffff8254100c T Xsyscall -ffffffff8254126e t Xsyscall_trampback -ffffffff82541280 T intr_user_exit -ffffffff825412c2 t intr_user_exit_post_ast -ffffffff825413ee t Xiretq_trampback -ffffffff825413fa T doreti_iret -ffffffff82542000 T alltraps -ffffffff82542138 T recall_trap -ffffffff82542150 T alltraps_kern -ffffffff82542153 T alltraps_kern_meltdown -ffffffff82543000 ? Xsyscall32 -ffffffff82543000 A __kutext_start -ffffffff82543000 A __text_page_end -ffffffff82544000 ? Xtrap00 -ffffffff82544010 ? Xtrap01 -ffffffff82544020 ? Xtrap02 -ffffffff82544028 c calltrap_specstk -ffffffff825440f0 ? calltrap_specstk_tramp -ffffffff82544110 ? Xtrap03 -ffffffff82544120 ? Xtrap04 -ffffffff82544130 ? Xtrap05 -ffffffff82544140 ? Xtrap06 -ffffffff82544150 ? Xtrap07 -ffffffff82544160 ? Xtrap08 -ffffffff82544170 ? Xtrap09 -ffffffff82544180 ? Xtrap0a -ffffffff82544190 ? Xtrap0b -ffffffff825441a0 ? Xtrap0c -ffffffff825441b0 ? Xtrap0d -ffffffff82544240 ? Xtrap0e -ffffffff82544250 ? Xintrspurious -ffffffff82544250 ? Xtrap0f -ffffffff82544260 ? Xtrap10 -ffffffff82544270 ? Xtrap11 -ffffffff82544280 ? Xtrap12 -ffffffff82544290 ? Xtrap13 -ffffffff825442a0 ? Xtrap14 -ffffffff825442b0 ? Xtrap15 -ffffffff825442c0 ? Xtrap16 -ffffffff825442c0 ? Xtrap17 -ffffffff825442c0 ? Xtrap18 -ffffffff825442c0 ? Xtrap19 -ffffffff825442c0 ? Xtrap1a -ffffffff825442c0 ? Xtrap1b -ffffffff825442c0 ? Xtrap1c -ffffffff825442c0 ? Xtrap1d -ffffffff825442c0 ? Xtrap1e -ffffffff825442c0 ? Xtrap1f -ffffffff825442d0 ? x2apic_eoi -ffffffff825442f0 ? Xintr_lapic_ipi -ffffffff82544330 ? Xipi_invltlb -ffffffff82544360 ? Xipi_invlpg -ffffffff82544390 ? Xipi_invlrange -ffffffff825443d0 ? Xipi_invltlb_pcid -ffffffff82544410 ? Xipi_invlpg_pcid -ffffffff82544460 ? Xipi_invlrange_pcid -ffffffff825444d0 ? Xintr_lapic_ltimer -ffffffff82544510 ? Xintr_xen_upcall -ffffffff82544550 ? Xintr_hyperv_upcall -ffffffff82544590 ? Xintr_legacy0 -ffffffff825445d0 ? Xintr_legacy1 -ffffffff82544610 ? Xintr_legacy2 -ffffffff82544650 ? Xintr_legacy3 -ffffffff82544690 ? Xintr_legacy4 -ffffffff825446d0 ? Xintr_legacy5 -ffffffff82544710 ? Xintr_legacy6 -ffffffff82544750 ? Xintr_legacy7 -ffffffff82544790 ? Xintr_legacy8 -ffffffff825447d0 ? Xintr_legacy9 -ffffffff82544810 ? Xintr_legacy10 -ffffffff82544850 ? Xintr_legacy11 -ffffffff82544890 ? Xintr_legacy12 -ffffffff825448d0 ? Xintr_legacy13 -ffffffff82544910 ? Xintr_legacy14 -ffffffff82544950 ? Xintr_legacy15 -ffffffff82544990 ? Xintr_ioapic_edge0 -ffffffff825449d0 ? Xintr_ioapic_edge1 -ffffffff82544a10 ? Xintr_ioapic_edge2 -ffffffff82544a50 ? Xintr_ioapic_edge3 -ffffffff82544a90 ? Xintr_ioapic_edge4 -ffffffff82544ad0 ? Xintr_ioapic_edge5 -ffffffff82544b10 ? Xintr_ioapic_edge6 -ffffffff82544b50 ? Xintr_ioapic_edge7 -ffffffff82544b90 ? Xintr_ioapic_edge8 -ffffffff82544bd0 ? Xintr_ioapic_edge9 -ffffffff82544c10 ? Xintr_ioapic_edge10 -ffffffff82544c50 ? Xintr_ioapic_edge11 -ffffffff82544c90 ? Xintr_ioapic_edge12 -ffffffff82544cd0 ? Xintr_ioapic_edge13 -ffffffff82544d10 ? Xintr_ioapic_edge14 -ffffffff82544d50 ? Xintr_ioapic_edge15 -ffffffff82544d90 ? Xintr_ioapic_edge16 -ffffffff82544dd0 ? Xintr_ioapic_edge17 -ffffffff82544e10 ? Xintr_ioapic_edge18 -ffffffff82544e50 ? Xintr_ioapic_edge19 -ffffffff82544e90 ? Xintr_ioapic_edge20 -ffffffff82544ed0 ? Xintr_ioapic_edge21 -ffffffff82544f10 ? Xintr_ioapic_edge22 -ffffffff82544f50 ? Xintr_ioapic_edge23 -ffffffff82544f90 ? Xintr_ioapic_edge24 -ffffffff82544fd0 ? Xintr_ioapic_edge25 -ffffffff82545010 ? Xintr_ioapic_edge26 -ffffffff82545050 ? Xintr_ioapic_edge27 -ffffffff82545090 ? Xintr_ioapic_edge28 -ffffffff825450d0 ? Xintr_ioapic_edge29 -ffffffff82545110 ? Xintr_ioapic_edge30 -ffffffff82545150 ? Xintr_ioapic_edge31 -ffffffff82545190 ? Xintr_ioapic_edge32 -ffffffff825451d0 ? Xintr_ioapic_edge33 -ffffffff82545210 ? Xintr_ioapic_edge34 -ffffffff82545250 ? Xintr_ioapic_edge35 -ffffffff82545290 ? Xintr_ioapic_edge36 -ffffffff825452d0 ? Xintr_ioapic_edge37 -ffffffff82545310 ? Xintr_ioapic_edge38 -ffffffff82545350 ? Xintr_ioapic_edge39 -ffffffff82545390 ? Xintr_ioapic_edge40 -ffffffff825453d0 ? Xintr_ioapic_edge41 -ffffffff82545410 ? Xintr_ioapic_edge42 -ffffffff82545450 ? Xintr_ioapic_edge43 -ffffffff82545490 ? Xintr_ioapic_edge44 -ffffffff825454d0 ? Xintr_ioapic_edge45 -ffffffff82545510 ? Xintr_ioapic_edge46 -ffffffff82545550 ? Xintr_ioapic_edge47 -ffffffff82545590 ? Xintr_ioapic_edge48 -ffffffff825455d0 ? Xintr_ioapic_edge49 -ffffffff82545610 ? Xintr_ioapic_edge50 -ffffffff82545650 ? Xintr_ioapic_edge51 -ffffffff82545690 ? Xintr_ioapic_edge52 -ffffffff825456d0 ? Xintr_ioapic_edge53 -ffffffff82545710 ? Xintr_ioapic_edge54 -ffffffff82545750 ? Xintr_ioapic_edge55 -ffffffff82545790 ? Xintr_ioapic_edge56 -ffffffff825457d0 ? Xintr_ioapic_edge57 -ffffffff82545810 ? Xintr_ioapic_edge58 -ffffffff82545850 ? Xintr_ioapic_edge59 -ffffffff82545890 ? Xintr_ioapic_edge60 -ffffffff825458d0 ? Xintr_ioapic_edge61 -ffffffff82545910 ? Xintr_ioapic_edge62 -ffffffff82545950 ? Xintr_ioapic_edge63 -ffffffff82545990 ? Xintr_ioapic_level0 -ffffffff825459d0 ? Xintr_ioapic_level1 -ffffffff82545a10 ? Xintr_ioapic_level2 -ffffffff82545a50 ? Xintr_ioapic_level3 -ffffffff82545a90 ? Xintr_ioapic_level4 -ffffffff82545ad0 ? Xintr_ioapic_level5 -ffffffff82545b10 ? Xintr_ioapic_level6 -ffffffff82545b50 ? Xintr_ioapic_level7 -ffffffff82545b90 ? Xintr_ioapic_level8 -ffffffff82545bd0 ? Xintr_ioapic_level9 -ffffffff82545c10 ? Xintr_ioapic_level10 -ffffffff82545c50 ? Xintr_ioapic_level11 -ffffffff82545c90 ? Xintr_ioapic_level12 -ffffffff82545cd0 ? Xintr_ioapic_level13 -ffffffff82545d10 ? Xintr_ioapic_level14 -ffffffff82545d50 ? Xintr_ioapic_level15 -ffffffff82545d90 ? Xintr_ioapic_level16 -ffffffff82545dd0 ? Xintr_ioapic_level17 -ffffffff82545e10 ? Xintr_ioapic_level18 -ffffffff82545e50 ? Xintr_ioapic_level19 -ffffffff82545e90 ? Xintr_ioapic_level20 -ffffffff82545ed0 ? Xintr_ioapic_level21 -ffffffff82545f10 ? Xintr_ioapic_level22 -ffffffff82545f50 ? Xintr_ioapic_level23 -ffffffff82545f90 ? Xintr_ioapic_level24 -ffffffff82545fd0 ? Xintr_ioapic_level25 -ffffffff82546010 ? Xintr_ioapic_level26 -ffffffff82546050 ? Xintr_ioapic_level27 -ffffffff82546090 ? Xintr_ioapic_level28 -ffffffff825460d0 ? Xintr_ioapic_level29 -ffffffff82546110 ? Xintr_ioapic_level30 -ffffffff82546150 ? Xintr_ioapic_level31 -ffffffff82546190 ? Xintr_ioapic_level32 -ffffffff825461d0 ? Xintr_ioapic_level33 -ffffffff82546210 ? Xintr_ioapic_level34 -ffffffff82546250 ? Xintr_ioapic_level35 -ffffffff82546290 ? Xintr_ioapic_level36 -ffffffff825462d0 ? Xintr_ioapic_level37 -ffffffff82546310 ? Xintr_ioapic_level38 -ffffffff82546350 ? Xintr_ioapic_level39 -ffffffff82546390 ? Xintr_ioapic_level40 -ffffffff825463d0 ? Xintr_ioapic_level41 -ffffffff82546410 ? Xintr_ioapic_level42 -ffffffff82546450 ? Xintr_ioapic_level43 -ffffffff82546490 ? Xintr_ioapic_level44 -ffffffff825464d0 ? Xintr_ioapic_level45 -ffffffff82546510 ? Xintr_ioapic_level46 -ffffffff82546550 ? Xintr_ioapic_level47 -ffffffff82546590 ? Xintr_ioapic_level48 -ffffffff825465d0 ? Xintr_ioapic_level49 -ffffffff82546610 ? Xintr_ioapic_level50 -ffffffff82546650 ? Xintr_ioapic_level51 -ffffffff82546690 ? Xintr_ioapic_level52 -ffffffff825466d0 ? Xintr_ioapic_level53 -ffffffff82546710 ? Xintr_ioapic_level54 -ffffffff82546750 ? Xintr_ioapic_level55 -ffffffff82546790 ? Xintr_ioapic_level56 -ffffffff825467d0 ? Xintr_ioapic_level57 -ffffffff82546810 ? Xintr_ioapic_level58 -ffffffff82546850 ? Xintr_ioapic_level59 -ffffffff82546890 ? Xintr_ioapic_level60 -ffffffff825468d0 ? Xintr_ioapic_level61 -ffffffff82546910 ? Xintr_ioapic_level62 -ffffffff82546950 ? Xintr_ioapic_level63 -ffffffff82547000 ? codepatch_fill_nop -ffffffff82547000 A __cptext_start -ffffffff82547000 A __kutext_end -ffffffff825470b0 ? codepatch_maprw -ffffffff82547190 ? codepatch_unmaprw -ffffffff82547200 ? codepatch_nop -ffffffff82547360 ? codepatch_replace -ffffffff82547510 ? codepatch_call -ffffffff82547530 ? codepatch_jmp -ffffffff82548000 A __cptext_end -ffffffff82548000 A __rodata_start -ffffffff82548000 C _etext -ffffffff82548000 C etext -ffffffff82549000 r seeprom_read -ffffffff82549004 r icl_mg_pll_find_divisors.div1_vals -ffffffff82549028 r gen9bc_tgp_ddc_pin_map -ffffffff82549038 r athn_ac2qid -ffffffff82549038 r athn_ac2qid -ffffffff82549038 r athn_ac2qid -ffffffff82549044 r rtwn_get_rssi.cckoff -ffffffff8254906c r rsu_ac2qid -ffffffff8254907c r pckbc_portcmd -ffffffff82549080 r tht_fifo_write_pad.pad -ffffffff82549088 r rsu_get_rssi.cckoff -ffffffff8254909c r adlp_n_revids -ffffffff825490ec r apple_iso_trans -ffffffff825490f0 r dg2_g12_revid_step_tbl -ffffffff825490f8 r wihap_check_tx.txratetable -ffffffff825490fc r dmamode -ffffffff82549120 r gen9_edram_size_mb.sets -ffffffff8254a000 r isomappings -ffffffff8254a080 r unimappings -ffffffff8254a230 r replacements -ffffffff8254d93f r apollo_pio_rec -ffffffff825966bd r apollo_udma33_tim -ffffffff825a9ea8 r pp_r600_decoded_lanes -ffffffff825dcbef r cmd680_setup_channel.udma_tbl -ffffffff825e4813 r apollo_udma100_tim -ffffffff825e4819 r cmd0646_9_tim_udma -ffffffff825f21ce r substchar -ffffffff82642ee3 r apollo_udma133_tim -ffffffff82642eea r apollo_udma66_tim -ffffffff82642f14 r cy_pio_rec -ffffffff82647ee0 R drm_ca -ffffffff82647f08 R drm_filtops -ffffffff82647f38 R drmread_filtops -ffffffff82648000 r vga_emulops -ffffffff82648048 R vga_stdscreen -ffffffff82648078 R vga_stdscreen_mono -ffffffff826480a8 R vga_stdscreen_bf -ffffffff826480d8 R vga_40lscreen -ffffffff82648108 R vga_40lscreen_mono -ffffffff82648138 R vga_40lscreen_bf -ffffffff82648168 R vga_50lscreen -ffffffff82648198 R vga_50lscreen_mono -ffffffff826481c8 R vga_50lscreen_bf -ffffffff826481f8 R vga_screenlist -ffffffff82648208 R vga_screenlist_mono -ffffffff82648218 R vga_accessops -ffffffff82648278 r i945_wm_info -ffffffff826482b8 r bgansitopc -ffffffff826482c0 r pctoansi -ffffffff82648300 r sdma_offsets -ffffffff82648300 r sdma_offsets -ffffffff82648338 r iha_rate_tbl -ffffffff82648370 r i830_a_wm_info -ffffffff826483a8 r gen9_edram_size_mb.ways -ffffffff82648408 r aggr_periodic_times -ffffffff82648490 r jsl_ehl_revids -ffffffff82648508 r michael_final.pad -ffffffff82648530 r rt_copysa.maskarray -ffffffff82648538 r i915_wm_info -ffffffff82648540 r amdgpu_ih_clientid_jpeg -ffffffff82648540 r amdgpu_ih_clientid_uvds -ffffffff82648540 r amdgpu_ih_clientid_vcns -ffffffff82648540 r amdgpu_ih_clientid_vcns -ffffffff82648540 r amdgpu_ih_clientid_vcns -ffffffff82648578 r vga_setfontset.cmaptabb -ffffffff82648590 r tgl_revids -ffffffff826485f0 r i830_bc_wm_info -ffffffff82648660 r hsw_activate_psr2.map -ffffffff82648698 r __drm_universal_plane_init.default_modifiers -ffffffff826486a8 r iwn_tid2fifo -ffffffff826486c0 r vga_setfontset.cmaptaba -ffffffff826486c8 r crtc_offsets -ffffffff826486c8 r crtc_offsets -ffffffff826486c8 r crtc_offsets -ffffffff826486e8 r link_speed -ffffffff826486e8 r link_speed -ffffffff826486e8 r link_speed -ffffffff82648770 r rtwn_r88e_get_rssi.cckoff -ffffffff82649000 R edid_vendors -ffffffff826492c0 R edid_nvendors -ffffffff826492d0 R edid_products -ffffffff82649330 R edid_nproducts -ffffffff82649340 r _edid_modes -ffffffff8264a000 R videomode_list -ffffffff8264b080 R videomode_count -ffffffff8264c000 r ahc_hard_errors -ffffffff8264c080 r critical_sections -ffffffff8264c0b0 r patches -ffffffff8264cd50 r seqprog -ffffffff8264e000 r ahc_switch -ffffffff8264f000 r termstat_strings -ffffffff8264f020 r critical_sections -ffffffff8264f060 r seqprog -ffffffff8264fd50 r patches -ffffffff82651000 r ahd_switch -ffffffff82652000 R aic_switch -ffffffff82653000 R adw_switch -ffffffff82654000 R gdt_switch -ffffffff82655000 R twe_switch -ffffffff82656000 R ciss_switch -ffffffff82656030 R ciss_level -ffffffff82656050 R ciss_stat -ffffffff82657000 R ami_switch -ffffffff82657028 R ami_raw_switch -ffffffff82658000 R mfi_switch -ffffffff82658028 R mfi_pd_switch -ffffffff82658050 r mfi_iop_xscale -ffffffff82658080 r mfi_iop_ppc -ffffffff826580b0 r mfi_iop_gen2 -ffffffff826580e0 r mfi_iop_skinny -ffffffff82658110 r mfi_bbu_indicators -ffffffff82659000 R qlw_switch -ffffffff8265a000 R isp_2100_risc_code -ffffffff8266cbf0 R isp_2200_risc_code -ffffffff8267f990 R isp_2300_risc_code -ffffffff82699408 R qla_switch -ffffffff82699430 r qla_regs_2100 -ffffffff82699460 r qla_regs_2200 -ffffffff82699490 r qla_regs_23XX -ffffffff8269a000 R ahci_atascsi_methods -ffffffff8269b000 R nvme_switch -ffffffff8269b028 r nvme_ops -ffffffff8269c000 R mpi_switch -ffffffff8269c060 r bwi_rf_calc_nrssi_slope_11b.save_phy_regs -ffffffff8269c090 r chv_oa_mux_regs -ffffffff8269c0b0 r fiji_clock_stretcher_lookup_table -ffffffff8269c0b0 r tonga_clock_stretcher_lookup_table -ffffffff8269c0d0 r iosf_pci_devices -ffffffff8269c0f0 r link_speed -ffffffff8269c0f0 r link_speed -ffffffff8269c0f0 r link_speed -ffffffff8269c130 r drm_fb_xfrm.default_dst_pitch -ffffffff8269c130 r non_supported_protection -ffffffff8269c230 r tgl_uy_revids -ffffffff8269c280 r bwi_phy_noise_11g_rev1 -ffffffff8269c2f0 r cardslot_process_event.antonym_ev -ffffffff8269c370 r gen11_oa_mux_regs -ffffffff8269c470 r ddr2_cycle_tenths -ffffffff8269c4e0 r rtw_intr_rx.ratetbl -ffffffff8269c550 r abm_config -ffffffff8269c5c0 r getbootinfo.ports -ffffffff8269c610 r reg_offsets -ffffffff8269c620 r bwi_rf_lo_measure_11g.rf_lo_adjust -ffffffff8269c630 r init_non_clock_fields.look_up -ffffffff8269c640 r uftdi_8u232am_getrate.roundoff -ffffffff8269c690 r zyd_rx_data.rates -ffffffff8269c6b0 r ieee80211_ra_valid_tx_mcs.max_mcs -ffffffff8269c6e0 r mmio_invalidate_full.gen8_regs -ffffffff8269c710 r bwi_phy_noise_11g -ffffffff8269c720 r hpt366_pio -ffffffff8269c750 r glk_revids -ffffffff8269c790 r bwi_rf_calc_nrssi_slope_11g.save_phy3_regs -ffffffff8269c7b0 r ether_crc32_be_update.rev -ffffffff8269c7b0 r rtw_grf5101_mac_crypt.caesar -ffffffff8269c800 r snb_b_fdi_train_param -ffffffff8269c8d0 r intel_hpll_vco.elk_vco -ffffffff8269c930 r pin_offsets -ffffffff8269c970 r firmware_list -ffffffff8269c9d0 r atom_arg_shift -ffffffff8269c9d0 r atom_arg_shift -ffffffff8269ca10 r pf_syncookie_wstab -ffffffff8269ca30 r ieee80211_media_init.mopts -ffffffff8269ca90 r add_entropy_words.twist_table -ffffffff8269cb30 r urtw_8225v2_txpwr_cck -ffffffff8269cb50 r bwfm_pci_prio2fifo -ffffffff8269cb50 r ieee80211_up_to_ac.up_to_ac -ffffffff8269cc10 r paritytab -ffffffff8269cc10 r x86emu_parity_tab -ffffffff8269cc30 r legacy_connector_convert -ffffffff8269cc70 r gen7_oa_mux_regs -ffffffff8269cc90 r hsw_oa_mux_regs -ffffffff8269ccb0 r notetab -ffffffff8269ccd0 r urtw_8225v2_txpwr_cck_ch14 -ffffffff8269ccf0 r bwi_rf_calibval.rf_calibvals -ffffffff8269cd90 r pf_syncookie_msstab -ffffffff8269cdf0 r xgmi3x16_pcs_err_status_reg_aldebaran -ffffffff8269ce50 r uath_wme_init.uath_wme_11g -ffffffff8269ce70 r gen7_oa_b_counters -ffffffff8269cfd0 r icl_revids -ffffffff8269d090 r rtwn_iq_calib_run.reg_adda -ffffffff8269d0d0 r atom_def_dst -ffffffff8269d0d0 r atom_def_dst -ffffffff8269d110 r sha256_initial_hash_value -ffffffff8269d170 r otus_edca_def -ffffffff8269d190 r intel_hpll_vco.blb_vco -ffffffff8269d250 r epic_pci_subsys_info -ffffffff8269d270 r atom_arg_mask -ffffffff8269d270 r atom_arg_mask -ffffffff8269d2d0 r butmap -ffffffff8269d310 r GFX_RLC_SRM_INDEX_CNTL_DATA_OFFSETS -ffffffff8269d350 r comsoft.lsrmap -ffffffff8269d390 r tulip_mii_phy_readspecific.table -ffffffff8269d3b0 r kbl_revids -ffffffff8269d450 r intel_hpll_vco.pnv_vco -ffffffff8269d4b0 r dmapageport -ffffffff8269d570 r intel_hpll_vco.ctg_vco -ffffffff8269d630 r drm_calculate_luminance_range.pre_computed_values -ffffffff8269e000 R sili_atascsi_methods -ffffffff8269f000 R ncr53c9x_switch -ffffffff826a0000 r scf_period -ffffffff826a1000 R siop_script -ffffffff826a15a0 R lun_switch -ffffffff826a15d0 R tag_switch -ffffffff826a1660 R load_dsa -ffffffff826a16c4 R siop_led_on -ffffffff826a16cc R siop_led_off -ffffffff826a16d8 R siop_switch -ffffffff826a2000 R ep_vortex_media -ffffffff826a2100 R ep_default_to_media -ffffffff826a3000 R wi_card_ident -ffffffff826a5000 R ucode_table -ffffffff826a6000 r re_revisions -ffffffff826a6290 r re_kstats_tpl -ffffffff826a8000 R smc91cxx_media -ffffffff826a8010 R smc91cxx_mii_bitbang_ops -ffffffff826a9000 R dl10019_mii_bitbang_ops -ffffffff826a9028 R dl10022_mii_bitbang_ops -ffffffff826aa000 R ax88190_mii_bitbang_ops -ffffffff826ac000 R ac97_audio_default -ffffffff826ac020 R ac97_on_off -ffffffff826ac324 R ac97_mic_select -ffffffff826ac628 R ac97_mono_select -ffffffff826ac92c R ac97_source -ffffffff826acc30 R ac97_volume_stereo -ffffffff826acc4c R ac97_volume_mono -ffffffff826acc70 R source_info -ffffffff826ad470 R ac97_ad -ffffffff826ad580 R ac97_ak -ffffffff826ad610 R ac97_av -ffffffff826ad750 R ac97_rl -ffffffff826ad7a0 R ac97_cm -ffffffff826ad820 R ac97_cr -ffffffff826ad840 R ac97_cs -ffffffff826ad920 R ac97_cx -ffffffff826ad980 R ac97_dt -ffffffff826ad9a0 R ac97_em -ffffffff826ad9d0 R ac97_es -ffffffff826ad9f0 R ac97_is -ffffffff826ada10 R ac97_ic -ffffffff826ada90 R ac97_it -ffffffff826adac0 R ac97_ns -ffffffff826adb80 R ac97_ps -ffffffff826adbb0 R ac97_sl -ffffffff826adbd0 R ac97_st -ffffffff826add20 R ac97_vi -ffffffff826add50 R ac97_tt -ffffffff826addd0 R ac97_ti -ffffffff826addf0 R ac97_wb -ffffffff826ade10 R ac97_wo -ffffffff826adea0 R ac97_ym -ffffffff826adef0 R ac97_vendors -ffffffff826ae1f0 R ac97enhancement -ffffffff826ae2f0 R ac97feature -ffffffff826af000 R lm_chips -ffffffff826af020 R lm78_sensors -ffffffff826af1a0 R w83627hf_sensors -ffffffff826af3a0 R w83627ehf_sensors -ffffffff826af5c0 R w83627dhg_sensors -ffffffff826af7c0 R nct6776f_sensors -ffffffff826afa00 R nct6779d_sensors -ffffffff826afd60 R w83637hf_sensors -ffffffff826aff20 R w83697hf_sensors -ffffffff826b00c0 R w83781d_sensors -ffffffff826b0280 R w83782d_sensors -ffffffff826b0480 R w83783s_sensors -ffffffff826b0600 R w83791d_sensors -ffffffff826b0860 R w83792d_sensors -ffffffff826b0ae0 R as99127f_sensors -ffffffff826b1000 r ar5k_known_products -ffffffff826b1110 r ar5111_gain_opt -ffffffff826b11e0 r ar5112_gain_opt -ffffffff826b12b0 r ar5k_5ghz_channels -ffffffff826b1a00 r ar5k_2ghz_channels -ffffffff826b1f10 r ar5111_rf -ffffffff826b2350 r ar5112a_rf -ffffffff826b2890 r ar5112_rf -ffffffff826b2da0 r ar5413_rf -ffffffff826b31b0 r ar2413_rf -ffffffff826b34d0 r ar2425_rf -ffffffff826b3830 r ar5111_rfg -ffffffff826b3b30 r ar5112_rfg -ffffffff826b3e30 r ar5413_rfg -ffffffff826b4130 r ar2413_rfg -ffffffff826b4430 r ar5k_rt_11a -ffffffff826b4552 r ar5k_rt_11b -ffffffff826b4674 r ar5k_rt_11g -ffffffff826b4796 r ar5k_rt_xr -ffffffff826b5000 r ar5210_ini -ffffffff826b6000 r ar5211_mode -ffffffff826b62c0 r ar5211_ini -ffffffff826b6ad0 r ar5211_rf -ffffffff826b7000 r ar5212_pcie -ffffffff826b7080 r ar5212_mode -ffffffff826b7310 r ar5212_ini -ffffffff826b7c80 r ar5212_ar5111_mode -ffffffff826b7f20 r ar5212_ar5112_mode -ffffffff826b81b0 r ar5413_mode -ffffffff826b8b10 r ar2413_mode -ffffffff826b9430 r ar2425_mode -ffffffff826b9d90 r ar5111_bbgain -ffffffff826ba090 r ar5112_bbgain -ffffffff826bb000 r athn_5ghz_chans -ffffffff826bb020 r athn_rates -ffffffff826bc000 r athn_rates -ffffffff826bd000 r ar9160_ini -ffffffff826bd068 r ar5416_ini -ffffffff826bd0d0 r ar5416_serdes -ffffffff826bd0e8 r ar9160_1_1_addac -ffffffff826bd0f8 r ar9160_1_0_addac -ffffffff826bd108 r ar5416_2_2_addac -ffffffff826bd118 r ar5416_2_1_addac -ffffffff826bd128 r ar5416_set_power_calib.chainoffset -ffffffff826bd140 r ar9160_bank6tpc_vals -ffffffff826bd1c0 r ar5416_bank6tpc_vals -ffffffff826bd240 r ar5416_bb_rfgain_vals_2g -ffffffff826bd340 r ar5416_bb_rfgain_vals_5g -ffffffff826bd440 r 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vcn_v2_0_enc_ring_vm_funcs -ffffffff82afd2f8 r vcn_v2_0_irq_funcs -ffffffff82afe000 r vcn_v2_5_ip_funcs -ffffffff82afe0a0 R vcn_v2_5_ip_block -ffffffff82afe0b8 r vcn_v2_6_ip_funcs -ffffffff82afe158 R vcn_v2_6_ip_block -ffffffff82afe170 R vcn_v2_6_ras_hw_ops -ffffffff82afe1b0 r vcn_v2_5_dec_ring_vm_funcs -ffffffff82afe2d0 r vcn_v2_6_dec_ring_vm_funcs -ffffffff82afe3f0 r vcn_v2_5_enc_ring_vm_funcs -ffffffff82afe510 r vcn_v2_6_enc_ring_vm_funcs -ffffffff82afe630 r vcn_v2_5_irq_funcs -ffffffff82aff000 r vcn_v3_0_ip_funcs -ffffffff82aff0a0 R vcn_v3_0_ip_block -ffffffff82aff0b8 r vcn_v3_0_dec_ring_vm_funcs -ffffffff82aff1d8 r vcn_v3_0_enc_ring_vm_funcs -ffffffff82aff2f8 r vcn_v3_0_irq_funcs -ffffffff82b00000 r vcn_v4_0_ip_funcs -ffffffff82b000a0 R vcn_v4_0_ip_block -ffffffff82b000b8 r vcn_v4_0_unified_ring_vm_funcs -ffffffff82b001d8 r vcn_v4_0_irq_funcs -ffffffff82b01000 R vega10_ih_ip_funcs -ffffffff82b010a0 R vega10_ih_ip_block -ffffffff82b010b8 r vega10_ih_funcs -ffffffff82b010d8 r vega10_ih_self_irq_funcs -ffffffff82b02000 r GC_BASE -ffffffff82b02064 r HDP_BASE -ffffffff82b020c8 r MMHUB_BASE -ffffffff82b0212c r ATHUB_BASE -ffffffff82b02190 r NBIO_BASE -ffffffff82b021f4 r MP0_BASE -ffffffff82b02258 r MP1_BASE -ffffffff82b022bc r VCE_BASE -ffffffff82b02320 r VCN_BASE -ffffffff82b02384 r DF_BASE -ffffffff82b023e8 r DCE_BASE -ffffffff82b0244c r OSSSYS_BASE -ffffffff82b024b0 r SDMA0_BASE -ffffffff82b02514 r SDMA1_BASE -ffffffff82b02578 r SMUIO_BASE -ffffffff82b025dc r PWR_BASE -ffffffff82b02640 r NBIF_BASE -ffffffff82b026a4 r THM_BASE -ffffffff82b02708 r CLK_BASE -ffffffff82b03000 R vega20_ih_ip_funcs -ffffffff82b030a0 R vega20_ih_ip_block -ffffffff82b030b8 r vega20_ih_funcs -ffffffff82b030d8 r vega20_ih_self_irq_funcs -ffffffff82b04000 r GC_BASE -ffffffff82b04090 r HDP_BASE -ffffffff82b04120 r MMHUB_BASE -ffffffff82b041b0 r ATHUB_BASE -ffffffff82b04240 r NBIO_BASE -ffffffff82b042d0 r MP0_BASE -ffffffff82b04360 r MP1_BASE -ffffffff82b043f0 r UVD_BASE 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dce110_max_clks_by_state -ffffffff82b19028 r disp_clk_regs -ffffffff82b1907c r disp_clk_shift -ffffffff82b19088 r disp_clk_mask -ffffffff82b1a000 r dce112_max_clks_by_state -ffffffff82b1a028 r disp_clk_regs -ffffffff82b1a07c r disp_clk_shift -ffffffff82b1a088 r disp_clk_mask -ffffffff82b1b000 r dce120_max_clks_by_state -ffffffff82b1c000 r clk_mgr_regs -ffffffff82b1c054 r clk_mgr_shift -ffffffff82b1c060 r clk_mgr_mask -ffffffff82b1d000 r clk_mgr_regs -ffffffff82b1d054 r clk_mgr_shift -ffffffff82b1d060 r clk_mgr_mask -ffffffff82b1e000 r clk_mgr_regs -ffffffff82b1e054 r clk_mgr_shift -ffffffff82b1e060 r clk_mgr_mask -ffffffff82b1f000 r lpddr5_wm_table -ffffffff82b1f0c0 r ddr5_wm_table -ffffffff82b20000 r lpddr5_wm_table -ffffffff82b200c0 r ddr5_wm_table -ffffffff82b21000 r lpddr5_wm_table -ffffffff82b210c0 r ddr5_wm_table -ffffffff82b22000 r lpddr5_wm_table -ffffffff82b220c0 r ddr4_wm_table -ffffffff82b23000 r clk_mgr_regs_dcn321 -ffffffff82b23054 r clk_mgr_shift_dcn321 -ffffffff82b23060 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dvmm_Hw_Setting_2DTiling -ffffffff82b421b0 r dvmm_Hw_Setting_Linear -ffffffff82b43000 r global_color_matrix -ffffffff82b430b0 r input_csc_matrix -ffffffff82b44000 r funcs -ffffffff82b45000 r bios_regs -ffffffff82b45008 r dce110_res_pool_funcs -ffffffff82b450f0 r clk_src_regs -ffffffff82b451ec r dmcu_regs -ffffffff82b45248 r dmcu_shift -ffffffff82b4525c r dmcu_mask -ffffffff82b452a8 r abm_regs -ffffffff82b452e8 r abm_shift -ffffffff82b452fc r abm_mask -ffffffff82b45350 r dce110_tg_offsets -ffffffff82b45398 r res_create_funcs -ffffffff82b453c8 r plane_cap -ffffffff82b453f4 r underlay_plane_cap -ffffffff82b45420 r stoney_resource_cap -ffffffff82b4545c r carrizo_resource_cap -ffffffff82b454a0 r panel_cntl_regs -ffffffff82b454c0 r panel_cntl_shift -ffffffff82b454d0 r panel_cntl_mask -ffffffff82b45510 r link_enc_regs -ffffffff82b458d0 r link_enc_aux_regs -ffffffff82b45920 r link_enc_hpd_regs -ffffffff82b45938 r link_enc_feature -ffffffff82b45948 r cs_shift -ffffffff82b45954 r cs_mask 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db_breakpoints_inserted -ffffffff83107000 D db_ed_style -ffffffff83108000 D db_examine_format -ffffffff83108078 D db_print_format -ffffffff83109000 D db_history_size -ffffffff83109008 D db_history_curr -ffffffff83109010 D db_history_last -ffffffff8310a000 D db_tab_stop_width -ffffffff8310a004 D db_max_line -ffffffff8310a008 D db_max_width -ffffffff8310a00c D db_radix -ffffffff8310b000 D db_lastsym -ffffffff8310b008 D db_maxoff -ffffffff8310c000 D db_vars -ffffffff8310c090 D db_evars -ffffffff8310d000 D db_watchpoints_inserted -ffffffff8310d008 D db_next_free_watchpoint -ffffffff8310e000 D db_log -ffffffff8310f000 D audio_cd -ffffffff8310f020 D audio_lock -ffffffff83110000 D midi_cd -ffffffff83111000 D rnd_cold -ffffffff83111004 D rnd_slowextract -ffffffff83111008 D rnd_timeout -ffffffff83111050 D rndlock -ffffffff83111060 D rndreinit_timeout -ffffffff831110a8 D rnd_task -ffffffff83112000 D video_cd -ffffffff83113000 d rrip_table_analyze -ffffffff831130e0 d rrip_table_getname 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sched_cost_resident -ffffffff83121000 D intrmap_lock -ffffffff83122000 D nosuidcoredump -ffffffff83122008 D sigio_lock -ffffffff83123000 D smr_lock -ffffffff83123010 D smr_logintvl -ffffffff83124000 D startuphook_list -ffffffff83125000 D sysctl_lock -ffffffff83125010 D sysctl_disklock -ffffffff83125020 d openbsd -ffffffff83125024 d arg_max -ffffffff83125028 d posix_version -ffffffff8312502c d ngroups_max -ffffffff83125030 d int_one -ffffffff83125034 d maxpartitions -ffffffff83125038 d raw_part -ffffffff8312503c D allowpowerdown -ffffffff83125040 D hw_power -ffffffff83125044 d byte_order -ffffffff83125048 d page_size -ffffffff83126000 d thrsleep_queue -ffffffff83126010 d thrsleep_lock -ffffffff83127000 D tc_lock -ffffffff83127010 D windup_mtx -ffffffff83127020 d dummy_timecounter -ffffffff83127070 D timecounter -ffffffff83127078 D time_second -ffffffff83127080 d timehands -ffffffff83127088 d th0 -ffffffff83127120 d th1 -ffffffff83128000 D itimer_mtx -ffffffff83128010 D ratecheck_mtx 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pool_gc_task -ffffffff83131000 D kprintf_mutex -ffffffff83131010 D db_panic -ffffffff83131014 D splassert_ctl -ffffffff83131018 D v_putc -ffffffff83131020 D printf_flags -ffffffff83132000 D userconf_base -ffffffff83132004 D userconf_maxdev -ffffffff83132008 D userconf_totdev -ffffffff8313200c D userconf_maxlocnames -ffffffff83132010 D userconf_cnt -ffffffff83132014 D userconf_lines -ffffffff83132018 D userconf_histsz -ffffffff83132020 D userconf_cmds -ffffffff83133000 D ftlock -ffffffff83134000 d ppollcollect.poll_errintvl -ffffffff83135000 D ttydefchars -ffffffff83135014 D ttclos -ffffffff8313501b D ttopen -ffffffff83135022 D ttybg -ffffffff83135028 D ttyin -ffffffff8313502e D ttyout -ffffffff83135038 D ttylist_lock -ffffffff83136000 D linesw -ffffffff83136280 D nlinesw -ffffffff83137000 D pt_softc_lock -ffffffff83138000 d mbstat_boot_boot_cpumem -ffffffff83138080 D mbstat -ffffffff83138090 D mclsizes -ffffffff831380b0 D m_extref_mtx -ffffffff831380c0 D m_pool_allocator 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ntfs_hashlock -ffffffff83143000 D ntfs_toupper_lock -ffffffff83144000 D art_table_gc_mtx -ffffffff83144010 D art_table_gc_task -ffffffff83144040 D art_node_gc_mtx -ffffffff83144050 D art_node_gc_task -ffffffff83145000 D bpf_bufsize -ffffffff83145004 D bpf_maxbufsize -ffffffff83145008 D bpf_sysctl_lk -ffffffff83146000 D ifg_head -ffffffff83146010 D if_cloners_lock -ffffffff83146020 D if_input_task_locked -ffffffff83146050 D netlock -ffffffff83146060 D ifnetlist -ffffffff83147000 D ifiq_maxlen_drop -ffffffff83147004 D ifiq_maxlen_return -ffffffff83148000 D etherbroadcastaddr -ffffffff83148006 D ether_ipmulticast_min -ffffffff8314800c D ether_ipmulticast_max -ffffffff83148012 D ether_ip6multicast_min -ffffffff83148018 D ether_ip6multicast_max -ffffffff83149000 D etherip_cloner -ffffffff83149030 D etherip_list -ffffffff8314a000 D loop_cloner -ffffffff8314b000 D ifmedia_mtx -ffffffff8314c000 D ppp_compressors -ffffffff8314c020 D ppp_cloner -ffffffff8314d000 D ppp_pkt_init -ffffffff8314e000 D ppp_bsd_compress -ffffffff8314f000 D ppp_deflate -ffffffff8314f070 D ppp_deflate_draft -ffffffff83150000 D tun_cloner -ffffffff83150030 D tap_cloner -ffffffff83151000 D bridgeintrq -ffffffff83151038 D bridge_cloner -ffffffff83152000 d veb_cloner -ffffffff83152030 d vport_cloner -ffffffff83153000 D vlan_tagh_lk -ffffffff83153010 D vlan_cloner -ffffffff83153040 D svlan_cloner -ffffffff83154000 D pipex_list_mtx -ffffffff83154010 D pipex_prune -ffffffff83154018 D pipexoutq -ffffffff83154050 d SHAPad2 -ffffffff83155000 D rtmap_gc -ffffffff83155018 D rt_rc -ffffffff83156000 D rt_labels -ffffffff83156010 D rtlabel_mtx -ffffffff83157000 D enc_cloner -ffffffff83158000 D gre_cloner -ffffffff83158030 D gre_list -ffffffff83158040 D mgre_cloner -ffffffff83158070 D egre_cloner -ffffffff831580a0 D nvgre_cloner -ffffffff831580d0 D eoip_cloner -ffffffff83159000 D trunk_cloner -ffffffff8315a000 d aggr_cloner -ffffffff8315b000 d tpmr_cloner -ffffffff8315c000 D mpe_cloner -ffffffff8315d000 D mpw_cloner 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aq1_mac_soft_reset_rbl +ffffffff81717a00 T aq1_global_software_reset +ffffffff81717b20 T aq1_mac_soft_reset_flb +ffffffff81717ed0 T aq2_interface_buffer_read +ffffffff81718010 T aq1_fw_downld_dwords +ffffffff81718330 T aq_hw_l3_filter_set +ffffffff81718540 T aq_hw_init_tx_path +ffffffff817187b0 T aq_hw_init_rx_path +ffffffff81718fc0 T aq_set_mac_addr +ffffffff817191d0 T aq_hw_qos_set +ffffffff817198c0 T aq2_filter_art_set +ffffffff81719a70 T aq_get_linkmode +ffffffff81719ae0 T aq_txring_reset +ffffffff81719e90 T aq_rxring_reset +ffffffff8171a390 T aq_rx_fill +ffffffff8171a5a0 T aq_rxeof +ffffffff8171a920 T aq_txeof +ffffffff8171ab00 T aq_update_link_status +ffffffff8171aba0 T aq_free_slots +ffffffff8171ac40 T aq_queue_up +ffffffff8171b020 T aq_dmamem_alloc +ffffffff8171b170 T aq_dmamem_free +ffffffff8171b1e0 T aq_queue_down +ffffffff8171b490 T aq_invalidate_rx_desc_cache +ffffffff8171b510 T aq_up +ffffffff8171b930 T aq_down +ffffffff8171ba90 T aq_rxrinfo +ffffffff8171bb80 T aq_iff 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tulip_21040_auibnc_only_media_select +ffffffff8171f320 T tulip_21041_mediainfo_init +ffffffff8171f3e0 T tulip_21041_media_probe +ffffffff8171f4c0 T tulip_21041_media_poll +ffffffff8171f7f0 T tulip_mii_get_phyaddr +ffffffff8171f8b0 T tulip_2114x_media_preset +ffffffff8171fad0 T tulip_null_media_poll +ffffffff8171fb00 T tulip_21140_mediainit +ffffffff8171fb50 T tulip_21140_evalboard_media_probe +ffffffff8171fd30 T tulip_21140_accton_media_probe +ffffffff8171ff50 T tulip_21140_smc9332_media_probe +ffffffff81720170 T tulip_21140_cogent_em100_media_probe +ffffffff817202e0 T tulip_21140_znyx_zx34x_media_probe +ffffffff81720530 T tulip_2114x_media_probe +ffffffff81720560 T tulip_delay_300ns +ffffffff81720670 T tulip_srom_idle +ffffffff81721010 T tulip_srom_read +ffffffff81721db0 T tulip_mii_writebits +ffffffff81722340 T tulip_mii_turnaround +ffffffff81722b10 T tulip_mii_readbits +ffffffff81722ef0 T tulip_identify_dec_nic +ffffffff81722fa0 T tulip_identify_znyx_nic +ffffffff817232a0 T tulip_identify_smc_nic +ffffffff81723470 T tulip_identify_cogent_nic +ffffffff81723560 T tulip_identify_accton_nic +ffffffff81723690 T tulip_identify_asante_nic +ffffffff81723960 T tulip_identify_compex_nic +ffffffff81723ab0 T tulip_srom_decode +ffffffff817246e0 T tulip_read_macaddr +ffffffff81725050 T tulip_ifmedia_add +ffffffff81725140 T tulip_ifmedia_change +ffffffff81725320 T tulip_ifmedia_status +ffffffff81725390 T tulip_alloc_rxmap +ffffffff817253d0 T tulip_free_rxmap +ffffffff81725410 T tulip_alloc_txmap +ffffffff81725450 T tulip_free_txmap +ffffffff81725490 T tulip_addr_filter +ffffffff817257e0 T tulip_rx_intr +ffffffff81725e00 T tulip_txput_setup +ffffffff817260b0 T tulip_tx_intr +ffffffff817264b0 T tulip_print_abnormal_interrupt +ffffffff817264e0 T tulip_intr_handler +ffffffff81726870 T tulip_ifstart +ffffffff81726940 T tulip_intr_shared +ffffffff817269b0 T tulip_intr_normal +ffffffff81726a00 T tulip_ifioctl +ffffffff81726b00 T tulip_ifwatchdog +ffffffff81726c00 T tulip_busdma_allocmem +ffffffff81726d90 T tulip_busdma_init +ffffffff81726fb0 T tulip_initcsrs +ffffffff817270b0 T tulip_initring +ffffffff81728000 T ep_pci_match +ffffffff81728030 T ep_pci_attach +ffffffff81729000 T pcn_match +ffffffff81729070 T pcn_attach +ffffffff817297c0 T pcn_tick +ffffffff81729810 T pcn_reset +ffffffff81729880 T pcn_intr +ffffffff81729af0 T pcn_ioctl +ffffffff81729c50 T pcn_start +ffffffff8172a0a0 T pcn_watchdog +ffffffff8172a110 T pcn_txintr +ffffffff8172a5a0 T pcn_init +ffffffff8172ae40 T pcn_stop +ffffffff8172afc0 T pcn_rxintr +ffffffff8172b4d0 T pcn_spnd +ffffffff8172b5d0 T pcn_add_rxbuf +ffffffff8172b7c0 T pcn_rxdrain +ffffffff8172b860 T pcn_set_filter +ffffffff8172b9c0 T pcn_79c970_mediainit +ffffffff8172bad0 T pcn_79c970_mediachange +ffffffff8172bc60 T pcn_79c970_mediastatus +ffffffff8172bca0 T pcn_79c971_mediainit +ffffffff8172bd70 T pcn_mii_readreg +ffffffff8172be30 T pcn_mii_writereg +ffffffff8172bed0 T pcn_mii_statchg +ffffffff8172bf30 T pcn_79c971_mediachange +ffffffff8172bf80 T pcn_79c971_mediastatus +ffffffff8172c000 T siop_lookup_product +ffffffff8172c0a0 T siop_pci_attach_common +ffffffff8172c520 T siop_pci_reset +ffffffff8172d000 T siop_pci_match +ffffffff8172d050 T siop_pci_attach +ffffffff8172e000 T sii3114_read_reg +ffffffff8172e060 T sii3114_write_reg +ffffffff8172e0d0 T pdc203xx_read_reg +ffffffff8172e130 T pdc203xx_write_reg +ffffffff8172e1a0 T svwsata_read_reg +ffffffff8172e210 T svwsata_write_reg +ffffffff8172e260 T svwsata_lba48_write_reg +ffffffff8172e2b0 T pciide_pci_read +ffffffff8172e300 T pciide_pci_write +ffffffff8172e370 T default_chip_map +ffffffff8172e9d0 T artisea_chip_map +ffffffff8172ec70 T piix_chip_map +ffffffff8172f2b0 T piixsata_chip_map +ffffffff8172f7f0 T sch_chip_map +ffffffff8172fb50 T amd756_chip_map +ffffffff8172ffb0 T ixp_chip_map +ffffffff81730360 T cmd_chip_map +ffffffff817304c0 T cmd0643_9_chip_map +ffffffff817307b0 T cmd680_chip_map +ffffffff81730990 T sii3112_chip_map +ffffffff81730d20 T sii3114_chip_map +ffffffff81731260 T apollo_chip_map +ffffffff81731900 T sata_chip_map +ffffffff81731b20 T cy693_chip_map +ffffffff81731ef0 T sis_chip_map +ffffffff81732690 T natsemi_chip_map +ffffffff81732b30 T ns_scx200_chip_map +ffffffff81732f00 T acer_chip_map +ffffffff817335c0 T hpt_chip_map +ffffffff81733ae0 T pdc202xx_chip_map +ffffffff817344e0 T pdcsata_chip_map +ffffffff81734ca0 T acard_chip_map +ffffffff81734f30 T serverworks_chip_map +ffffffff81735280 T svwsata_chip_map +ffffffff81735650 T nforce_chip_map +ffffffff81735ac0 T ite_chip_map +ffffffff81735d80 T jmicron_chip_map +ffffffff81736190 T phison_chip_map +ffffffff817364f0 T rdc_chip_map +ffffffff81736980 T pciide_match +ffffffff81736a20 T pciide_attach +ffffffff81736b00 T pciide_detach +ffffffff81736b60 T pciide_activate +ffffffff81737290 T pciide_lookup_product +ffffffff81737540 T pciide_dmacmd_read +ffffffff81737570 T pciide_dmacmd_write +ffffffff817375a0 T pciide_dmactl_read +ffffffff817375d0 T pciide_dmactl_write +ffffffff81737600 T pciide_dmatbl_write +ffffffff81737630 T pciide_mapregs_compat +ffffffff817377b0 T pciide_unmapregs_compat +ffffffff81737840 T pciide_mapregs_native +ffffffff81737b30 T pciide_unmapregs_native +ffffffff81737bc0 T pciide_mapreg_dma +ffffffff81737d50 T pciide_dma_init +ffffffff81737ff0 T pciide_dma_start +ffffffff81738070 T pciide_dma_finish +ffffffff81738240 T pciide_unmapreg_dma +ffffffff81738270 T pciide_intr_flag +ffffffff81738480 T pciide_compat_intr +ffffffff81738500 T pciide_pci_intr +ffffffff817385c0 T pciide_channel_dma_setup +ffffffff81738690 T pciide_dma_table_setup +ffffffff817388e0 T pciide_irqack +ffffffff81738930 T pciide_chansetup +ffffffff81738a10 T pciide_chanfree +ffffffff81738a60 T pciide_mapchan +ffffffff81738af0 T pciide_unmap_chan +ffffffff81738bc0 T pciide_chan_candisable +ffffffff81738c30 T pciide_map_compat_intr +ffffffff81738ce0 T pciide_unmap_compat_intr +ffffffff81738d40 T pciide_print_channels +ffffffff81738e10 T pciide_print_modes +ffffffff81738e20 T default_chip_unmap +ffffffff81738f00 T sata_setup_channel +ffffffff81739020 T piix_timing_debug +ffffffff81739050 T piix_setup_channel +ffffffff81739540 T piix3_4_setup_channel +ffffffff81739d40 T piix_setup_idetim_timings +ffffffff81739db0 T piix_setup_idetim_drvs +ffffffff81739ec0 T piix_setup_sidetim_timings +ffffffff81739f30 T amd756_setup_channel +ffffffff8173a2e0 T apollo_setup_channel +ffffffff8173a630 T cmd_channel_map +ffffffff8173a970 T cmd_pci_intr +ffffffff8173aa80 T cmd646_9_irqack +ffffffff8173ab80 T cmd0643_9_setup_channel +ffffffff8173afb0 T cmd680_setup_channel +ffffffff8173b4a0 T cmd680_channel_map +ffffffff8173b7a0 T sii_fixup_cacheline +ffffffff8173ba70 T sii3112_setup_channel +ffffffff8173bc30 T sii3112_drv_probe +ffffffff8173bf80 T sii3114_mapreg_dma +ffffffff8173c240 T sii3114_chansetup +ffffffff8173c300 T sii3114_mapchan +ffffffff8173c5f0 T sii3114_dmacmd_read +ffffffff8173c630 T sii3114_dmacmd_write +ffffffff8173c670 T sii3114_dmactl_read +ffffffff8173c6b0 T sii3114_dmactl_write +ffffffff8173c6f0 T sii3114_dmatbl_write +ffffffff8173c730 T cy693_setup_channel +ffffffff8173c950 T sis_hostbr_match +ffffffff8173ca20 T sis_south_match +ffffffff8173ca60 T sis_setup_channel +ffffffff8173cdb0 T sis96x_setup_channel +ffffffff8173d060 T natsemi_irqack +ffffffff8173d0f0 T natsemi_setup_channel +ffffffff8173d4e0 T natsemi_pci_intr +ffffffff8173d5d0 T ns_scx200_setup_channel +ffffffff8173d8b0 T acer_dma_init +ffffffff8173d8f0 T acer_setup_channel +ffffffff8173dd00 T acer_pci_intr +ffffffff8173dde0 T hpt_setup_channel +ffffffff8173e130 T hpt_pci_intr +ffffffff8173e240 T pdc268_config_read +ffffffff8173e2b0 T pdc20268_setup_channel +ffffffff8173e480 T pdc202xx_setup_channel +ffffffff8173e8d0 T pdc20262_dma_start +ffffffff8173ea30 T pdc20262_dma_finish +ffffffff8173eb00 T pdc20265_pci_intr +ffffffff8173ecb0 T pdc202xx_pci_intr +ffffffff8173edc0 T pdc203xx_pci_intr +ffffffff8173eeb0 T pdc205xx_pci_intr +ffffffff8173efe0 T pdc203xx_irqack +ffffffff8173f070 T pdc203xx_setup_channel +ffffffff8173f170 T pdc205xx_do_reset +ffffffff8173f210 T pdc205xx_drv_probe +ffffffff8173f490 T pdc203xx_dma_start +ffffffff8173f550 T pdc203xx_dma_finish +ffffffff8173f640 T serverworks_setup_channel +ffffffff8173fa50 T serverworks_pci_intr +ffffffff8173fb60 T svwsata_mapreg_dma +ffffffff8173fc10 T svwsata_drv_probe +ffffffff8173fee0 T svwsata_mapchan +ffffffff8173ffd0 T svwsata_dmacmd_read +ffffffff81740000 T svwsata_dmacmd_write +ffffffff81740030 T svwsata_dmactl_read +ffffffff81740060 T svwsata_dmactl_write +ffffffff81740090 T svwsata_dmatbl_write +ffffffff817400c0 T acard_setup_channel +ffffffff817404f0 T nforce_setup_channel +ffffffff81740830 T nforce_pci_intr +ffffffff81740920 T ite_setup_channel +ffffffff81740c80 T ixp_setup_channel +ffffffff81741030 T jmicron_setup_channel +ffffffff81741290 T phison_setup_channel +ffffffff817414a0 T sch_setup_channel +ffffffff817416a0 T rdc_setup_channel +ffffffff81741ac0 t ba5_read_4_ind +ffffffff81741b50 t ba5_write_4_ind +ffffffff81742000 T ppbmatch +ffffffff81742050 T ppbattach +ffffffff817427d0 T ppbdetach +ffffffff817428f0 T ppbactivate +ffffffff81742d60 T ppb_alloc_busrange +ffffffff81742f10 T ppb_hotplug_insert +ffffffff81742f70 T ppb_hotplug_rescan +ffffffff81742fb0 T ppb_hotplug_remove +ffffffff81743110 T ppb_hotplug_insert_finish +ffffffff81743140 T ppb_intr +ffffffff81743200 T ppb_alloc_resources +ffffffff817438f0 T ppbprint +ffffffff81744000 T cy_pci_match +ffffffff81744030 T cy_pci_attach +ffffffff81745000 T rl_pci_match +ffffffff81745060 T rl_pci_attach +ffffffff81745220 T rl_pci_detach +ffffffff81746000 T re_pci_probe +ffffffff817460a0 T re_pci_attach +ffffffff817463d0 T re_pci_detach +ffffffff81746490 T re_pci_activate +ffffffff81747000 T vr_probe +ffffffff817470d0 T vr_attach +ffffffff817476a0 T vr_activate +ffffffff81747720 T vr_mii_readreg +ffffffff81747880 T vr_mii_writereg +ffffffff817479d0 T vr_miibus_readreg +ffffffff81747a40 T vr_miibus_writereg +ffffffff81747ab0 T vr_miibus_statchg +ffffffff81747ad0 T vr_setcfg +ffffffff81747cf0 T vr_iff +ffffffff81747e70 T vr_reset +ffffffff81747f80 T vr_quirks +ffffffff81748080 T vr_dmamem_alloc +ffffffff817481e0 T vr_dmamem_free +ffffffff81748250 T vr_intr +ffffffff81748480 T vr_chipinit +ffffffff81748560 T vr_ioctl +ffffffff81748700 T vr_start +ffffffff817488d0 T vr_watchdog +ffffffff81748960 T vr_wol +ffffffff81748b10 T vr_ifmedia_upd +ffffffff81748b60 T vr_ifmedia_sts +ffffffff81748bc0 T vr_tick +ffffffff81748c40 T vr_rxtick +ffffffff81748d20 T vr_stop +ffffffff81748fb0 T vr_init +ffffffff81749560 T vr_list_tx_init +ffffffff81749660 T vr_list_rx_init +ffffffff81749820 T vr_fill_rx_ring +ffffffff817498e0 T vr_alloc_mbuf +ffffffff81749a50 T vr_rxeof +ffffffff81749ce0 T vr_rxeoc +ffffffff81749e70 T vr_txeof +ffffffff8174a030 T vr_encap +ffffffff8174b000 T txp_probe +ffffffff8174b030 T txp_attach +ffffffff8174b1a0 T txp_attachhook +ffffffff8174b4d0 T txp_chip_init +ffffffff8174b690 T txp_download_fw +ffffffff8174bb10 T txp_alloc_rings +ffffffff8174c680 T txp_command +ffffffff8174c750 T txp_ifmedia_upd +ffffffff8174c860 T txp_ifmedia_sts +ffffffff8174cb20 T txp_ioctl +ffffffff8174cc40 T txp_start +ffffffff8174d000 T txp_watchdog +ffffffff8174d030 T txp_capabilities +ffffffff8174d1e0 T txp_tick +ffffffff8174d330 T txp_intr +ffffffff8174d5a0 T txp_reset_adapter +ffffffff8174d6a0 T txp_download_fw_wait +ffffffff8174d790 T txp_download_fw_section +ffffffff8174db00 T txp_dma_malloc +ffffffff8174dca0 T txp_dma_free +ffffffff8174dd20 T txp_rx_reclaim +ffffffff8174dff0 T txp_rxbuf_reclaim +ffffffff8174e270 T txp_tx_reclaim +ffffffff8174e410 T txp_init +ffffffff8174e550 T txp_stop +ffffffff8174e650 T txp_set_filter +ffffffff8174e7e0 T txp_command2 +ffffffff8174eae0 T txp_cmd_desc_numfree +ffffffff8174eb40 T txp_response +ffffffff8174ee10 T txp_rsp_fixup +ffffffff8174eef0 T txp_show_descriptor +ffffffff81750000 T init_audio_devices +ffffffff81750120 T init_BTSC +ffffffff817501e0 T set_audio +ffffffff81750570 T set_bctv_audio +ffffffff817508b0 T msp_autodetect +ffffffff81750ce0 T temp_mute +ffffffff81750d80 T set_BTSC +ffffffff81750da0 T bctv_gpio_write +ffffffff81750f10 T msp_read_id +ffffffff81750fd0 T dpl_read_id +ffffffff81751090 T dpl_autodetect +ffffffff81752000 T writeEEProm +ffffffff81752030 T readEEProm +ffffffff81752100 T signCard +ffffffff817521b0 T probeCard +ffffffff81754000 T bktr_name +ffffffff81754030 T common_bktr_attach +ffffffff81754330 t oformat_meteor_to_bt +ffffffff81754440 T common_bktr_intr +ffffffff81754a60 T video_open +ffffffff81754f10 t set_fps +ffffffff81755050 T vbi_open +ffffffff817550f0 T tuner_open +ffffffff81755140 T video_close +ffffffff81755230 T tuner_close +ffffffff81755260 T vbi_close +ffffffff81755290 T video_read +ffffffff81755450 t start_capture +ffffffff817581f0 T vbi_read +ffffffff81758310 T video_ioctl +ffffffff81759710 T bktr_common_ioctl +ffffffff81759ee0 T tuner_ioctl +ffffffff8175ac00 t remote_read +ffffffff8175ada0 T i2cWrite +ffffffff8175aec0 T i2cRead +ffffffff8175afe0 T msp_dpl_read +ffffffff8175b2a0 T msp_dpl_write +ffffffff8175b460 T msp_dpl_reset +ffffffff8175b760 t i2c_write_byte +ffffffff8175b940 t i2c_read_byte +ffffffff8175bb60 t split +ffffffff8175bd90 t getline +ffffffff8175c000 t bktr_probe +ffffffff8175c060 t bktr_attach +ffffffff8175c2e0 T bktr_get_info +ffffffff8175c3c0 T bktr_set_info +ffffffff8175c520 T get_bktr_mem +ffffffff8175c750 T free_bktr_mem +ffffffff8175c7b0 T bktropen +ffffffff8175c870 T bktrclose +ffffffff8175c8f0 T bktrread +ffffffff8175c980 T bktrwrite +ffffffff8175c9b0 T bktrioctl +ffffffff8175ca50 T bktrmmap +ffffffff8175caf0 t bktr_intr +ffffffff8175d000 T select_tuner +ffffffff8175d050 T tv_freq +ffffffff8175d2a0 T do_afc +ffffffff8175d3d0 T get_tuner_status +ffffffff8175d3f0 T tv_channel +ffffffff8175d4b0 T tuner_getchnlset +ffffffff8175e000 T xl_pci_match +ffffffff8175e030 T xl_pci_attach +ffffffff8175e380 T xl_pci_detach +ffffffff8175e410 T xl_pci_wol_power +ffffffff8175e460 T xl_pci_intr_ack +ffffffff8175f000 T fxp_pci_match +ffffffff8175f030 T fxp_pci_attach +ffffffff8175f350 T fxp_pci_detach +ffffffff81760000 T em_probe +ffffffff81760030 T em_attach +ffffffff81760530 T em_detach +ffffffff817605c0 T em_activate +ffffffff81760640 T em_defer_attach +ffffffff817606e0 T em_stop +ffffffff817607d0 T em_free_pci_resources +ffffffff81760a90 T em_setup_interface +ffffffff81760c80 T em_update_link_status +ffffffff81760e90 T em_local_timer +ffffffff81760f40 T em_82547_move_tail +ffffffff81760f80 T em_identify_hardware +ffffffff81761090 T em_allocate_pci_resources +ffffffff81761490 T em_allocate_desc_rings +ffffffff817615a0 T em_hardware_init +ffffffff81761850 T em_kstat_attach +ffffffff817619a0 T em_start +ffffffff81761c90 T em_encap +ffffffff81762140 T em_82547_move_tail_locked +ffffffff81762370 T em_82547_update_fifo_head +ffffffff817623c0 T em_ioctl +ffffffff81762690 T em_init +ffffffff81762a00 T em_get_sffpage +ffffffff81762ac0 T em_disable_intr +ffffffff81762bc0 T em_iff +ffffffff81762ed0 T em_initialize_receive_unit +ffffffff81763650 T em_enable_intr +ffffffff817637b0 T em_watchdog +ffffffff81763960 T em_enable_hw_vlans +ffffffff81763a00 T em_setup_transmit_structures +ffffffff81763c00 T em_initialize_transmit_unit +ffffffff81764260 T em_setup_receive_structures +ffffffff817643a0 T em_setup_queues_msix +ffffffff81764a10 T em_intr +ffffffff81764b10 T em_txeof +ffffffff81764ce0 T em_rxeof +ffffffff81765170 T em_rxrefill_locked +ffffffff81765280 T em_media_status +ffffffff817654a0 T em_flowstatus +ffffffff817655a0 T em_media_change +ffffffff81765700 T em_tso_setup +ffffffff817658e0 T em_tx_ctx_setup +ffffffff81765a60 T em_transmit_checksum_setup +ffffffff81765b40 T em_fill_descriptors +ffffffff81765bc0 T em_82547_fifo_workaround +ffffffff81765c30 T em_82547_tx_fifo_reset +ffffffff81766090 T em_pci_clear_mwi +ffffffff817660c0 T em_pci_set_mwi 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em_enable_queue_intr_msix +ffffffff81769000 T em_set_mac_type +ffffffff81769a20 T em_set_sfp_media_type_82575 +ffffffff81769d70 T em_translate_82542_register +ffffffff81769fa0 T em_read_sfp_data_byte +ffffffff8176a090 T em_set_media_type +ffffffff8176a300 T em_reset_hw +ffffffff8176aeb0 T em_disable_pciex_master +ffffffff8176af80 T em_check_phy_reset_block +ffffffff8176b040 T em_gate_hw_phy_config_ich8lan +ffffffff8176b0e0 t em_get_software_flag +ffffffff8176b260 T em_hv_phy_workarounds_ich8lan +ffffffff8176b5f0 T em_lv_phy_workarounds_ich8lan +ffffffff8176b6f0 t em_phy_init_script +ffffffff8176b950 T em_read_eeprom +ffffffff8176bfc0 T em_set_eee_i350 +ffffffff8176c0e0 T em_init_hw +ffffffff8176db20 T em_phy_reset +ffffffff8176dd10 T em_clear_vfta_i350 +ffffffff8176def0 T em_read_phy_reg +ffffffff8176e0a0 T em_setup_link +ffffffff81770340 T em_enable_tx_pkt_filtering +ffffffff81770700 T em_clear_hw_cntrs +ffffffff81770ff0 T em_write_phy_reg +ffffffff81771170 T em_power_up_serdes_link_82575 +ffffffff81771260 T em_copper_link_autoneg +ffffffff81771390 T em_phy_setup_autoneg +ffffffff817714f0 T em_copper_link_postconfig +ffffffff817715c0 T em_config_collision_dist +ffffffff81771650 t em_config_mac_to_phy +ffffffff817717c0 t em_config_fc_after_link_up +ffffffff81771a10 t em_config_dsp_after_link_change +ffffffff817723b0 T em_force_mac_fc +ffffffff81772480 T em_check_for_link +ffffffff81772b00 T em_get_pcs_speed_and_duplex_82575 +ffffffff81772bc0 T em_k1_gig_workaround_hv +ffffffff81772cf0 T em_link_stall_workaround_hv +ffffffff81772dd0 T em_k1_workaround_lv +ffffffff81772e90 T em_k1_workaround_lpt_lp +ffffffff81773150 t em_check_downshift +ffffffff81773200 T em_set_eee_pchlan +ffffffff817732a0 t em_polarity_reversal_workaround +ffffffff817734e0 T em_get_speed_and_duplex +ffffffff81773990 T em_access_phy_wakeup_reg_bm +ffffffff81773af0 t em_write_phy_reg_ex +ffffffff81773d60 t em_read_phy_reg_ex +ffffffff81774210 T em_access_phy_debug_regs_hv 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ixgbe_identify_hardware +ffffffff81783960 T ixgbe_allocate_pci_resources +ffffffff81783ab0 T ixgbe_allocate_queues +ffffffff81783fb0 T ixgbe_allocate_msix +ffffffff817841e0 T ixgbe_allocate_legacy +ffffffff81784300 T ixgbe_setup_interface +ffffffff81784660 T ixgbe_free_transmit_structures +ffffffff817846e0 T ixgbe_free_receive_structures +ffffffff817847a0 T ixgbe_free_pci_resources +ffffffff81784880 T ixgbe_stop +ffffffff81784b80 T ixgbe_init +ffffffff81785760 T ixgbe_start +ffffffff81785940 T ixgbe_encap +ffffffff81785d90 T ixgbe_ioctl +ffffffff817860d0 T ixgbe_rxrinfo +ffffffff81786230 T ixgbe_get_sffpage +ffffffff817863e0 T ixgbe_disable_intr +ffffffff817864b0 T ixgbe_iff +ffffffff81786620 T ixgbe_enable_intr +ffffffff81786730 T ixgbe_enable_queues +ffffffff81786840 T ixgbe_watchdog +ffffffff81786a50 T ixgbe_setup_transmit_structures +ffffffff81786b20 T ixgbe_initialize_transmit_units +ffffffff81786df0 T ixgbe_setup_receive_structures +ffffffff81786f20 T ixgbe_initialize_receive_units +ffffffff81787400 T ixgbe_config_gpie +ffffffff817874d0 T ixgbe_setup_vlan_hw_support +ffffffff81787640 T ixgbe_configure_ivars +ffffffff817877f0 T ixgbe_set_ivar +ffffffff817879a0 T ixgbe_config_link +ffffffff81787b40 T ixgbe_config_delay_values +ffffffff81787c60 t ix_kstats_tick +ffffffff81787d20 T ixgbe_enable_queue +ffffffff81787df0 T ixgbe_disable_queue +ffffffff81787ec0 T ixgbe_link_intr +ffffffff81787ed0 T ixgbe_intr +ffffffff817883a0 T ixgbe_queue_intr +ffffffff817884f0 T ixgbe_rxeof +ffffffff81788a40 T ixgbe_txeof +ffffffff81788bd0 T ixgbe_rxrefill +ffffffff81788c90 T ixgbe_legacy_intr +ffffffff81788e40 T ixgbe_update_link_status +ffffffff81788f80 T ixgbe_handle_mod +ffffffff817890a0 T ixgbe_handle_msf +ffffffff81789170 T ixgbe_handle_phy +ffffffff81789200 T ixgbe_media_status +ffffffff81789410 T ixgbe_media_change +ffffffff817894c0 T ixgbe_mc_array_itr +ffffffff81789500 T ixgbe_setup_msix +ffffffff81789590 T ixgbe_add_media_types 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ixgbe_release_eeprom_semaphore +ffffffff8178f410 T ixgbe_ready_eeprom +ffffffff8178f580 T ixgbe_shift_out_eeprom_bits +ffffffff8178f740 T ixgbe_shift_in_eeprom_bits +ffffffff8178f8a0 T ixgbe_standby_eeprom +ffffffff8178f980 T ixgbe_raise_eeprom_clk +ffffffff8178f9f0 T ixgbe_lower_eeprom_clk +ffffffff8178fa60 T ixgbe_release_eeprom +ffffffff8178fb40 T ixgbe_validate_mac_addr +ffffffff8178fba0 T ixgbe_init_uta_tables +ffffffff8178fbe0 T ixgbe_add_uc_addr +ffffffff8178fc50 T ixgbe_mta_vector +ffffffff8178fd00 T ixgbe_set_mta +ffffffff8178fdc0 T ixgbe_negotiate_fc +ffffffff8178fe70 T ixgbe_fc_autoneg_fiber +ffffffff8178ff90 T ixgbe_fc_autoneg_backplane +ffffffff81790100 T ixgbe_fc_autoneg_copper +ffffffff81790220 T ixgbe_disable_sec_rx_path_generic +ffffffff817902e0 T ixgbe_enable_sec_rx_path_generic +ffffffff81790370 T ixgbe_enable_rx +ffffffff817903b0 T ixgbe_get_pcie_msix_count_generic +ffffffff81790430 T ixgbe_insert_mac_addr_generic +ffffffff81790640 T ixgbe_set_vmdq +ffffffff81790680 T ixgbe_set_rar +ffffffff817906d0 T ixgbe_clear_vmdq +ffffffff81790710 T ixgbe_clear_vmdq_generic +ffffffff817908c0 T ixgbe_set_vmdq_generic +ffffffff81790970 T ixgbe_init_uta_tables_generic +ffffffff817909f0 T ixgbe_find_vlvf_slot +ffffffff81790aa0 T ixgbe_set_vfta_generic +ffffffff81790bb0 T ixgbe_set_vlvf_generic +ffffffff81790e40 T ixgbe_clear_vfta_generic +ffffffff81790f40 T ixgbe_need_crosstalk_fix +ffffffff81790f90 T ixgbe_check_mac_link_generic +ffffffff81791180 T ixgbe_get_device_caps_generic +ffffffff817911d0 T ixgbe_calculate_checksum +ffffffff81791290 T ixgbe_hic_unlocked +ffffffff81791450 T ixgbe_host_interface_command +ffffffff81791620 T ixgbe_clear_tx_pending +ffffffff817917e0 T ixgbe_mng_present +ffffffff81791850 T ixgbe_mng_enabled +ffffffff81791910 T ixgbe_setup_mac_link_multispeed_fiber +ffffffff81791cb0 T ixgbe_flap_tx_laser +ffffffff81791cf0 T ixgbe_check_link +ffffffff81791d40 T ixgbe_set_soft_rate_select_speed +ffffffff81791e30 T ixgbe_init_shared_code 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ixgbe_get_media_type_82599 +ffffffff81796f40 T ixgbe_get_supported_physical_layer_82599 +ffffffff81797110 T ixgbe_enable_rx_dma_82599 +ffffffff81797180 T ixgbe_read_analog_reg8_82599 +ffffffff81797240 T ixgbe_write_analog_reg8_82599 +ffffffff817972c0 T ixgbe_start_hw_82599 +ffffffff817973c0 T ixgbe_get_link_capabilities_82599 +ffffffff81797500 T ixgbe_stop_mac_link_on_d3_82599 +ffffffff817975c0 T ixgbe_read_eeprom_82599 +ffffffff817975f0 T ixgbe_start_mac_link_82599 +ffffffff817977f0 T ixgbe_verify_fw_version_82599 +ffffffff81798000 T ixgbe_init_ops_X540 +ffffffff81798220 T ixgbe_init_eeprom_params_X540 +ffffffff817982b0 T ixgbe_read_eerd_X540 +ffffffff81798340 T ixgbe_write_eewr_X540 +ffffffff817983d0 T ixgbe_update_eeprom_checksum_X540 +ffffffff817984a0 T ixgbe_validate_eeprom_checksum_X540 +ffffffff81798590 T ixgbe_calc_eeprom_checksum_X540 +ffffffff81798730 T ixgbe_reset_hw_X540 +ffffffff81798920 T ixgbe_get_media_type_X540 +ffffffff81798950 T ixgbe_get_supported_physical_layer_X540 +ffffffff817989d0 T ixgbe_start_hw_X540 +ffffffff81798a20 T ixgbe_acquire_swfw_sync_X540 +ffffffff81798e70 T ixgbe_release_swfw_sync_X540 +ffffffff81798fa0 T ixgbe_init_swfw_sync_X540 +ffffffff81799080 T ixgbe_setup_mac_link_X540 +ffffffff817990a0 T ixgbe_blink_led_start_X540 +ffffffff817991c0 T ixgbe_blink_led_stop_X540 +ffffffff817992c0 T ixgbe_get_link_capabilities_X540 +ffffffff81799300 T ixgbe_update_flash_X540 +ffffffff817994e0 T ixgbe_poll_flash_update_done_X540 +ffffffff81799570 T ixgbe_get_swfw_sync_semaphore +ffffffff81799700 T ixgbe_release_swfw_sync_semaphore +ffffffff8179a000 T ixgbe_init_ops_X550 +ffffffff8179a110 T ixgbe_dmac_config_X550 +ffffffff8179a1f0 T ixgbe_dmac_config_tcs_X550 +ffffffff8179a340 T ixgbe_dmac_update_tcs_X550 +ffffffff8179a400 T ixgbe_set_source_address_pruning_X550 +ffffffff8179a4f0 T ixgbe_init_eeprom_params_X550 +ffffffff8179a570 T ixgbe_calc_eeprom_checksum_X550 +ffffffff8179a590 T ixgbe_read_ee_hostif_X550 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+ffffffff8179bc20 T ixgbe_get_media_type_X550em +ffffffff8179bcf0 T ixgbe_setup_sfp_modules_X550em +ffffffff8179be80 T ixgbe_get_link_capabilities_X550em +ffffffff8179bf50 T ixgbe_reset_hw_X550em +ffffffff8179c3d0 T ixgbe_get_supported_physical_layer_X550em +ffffffff8179c550 T ixgbe_setup_fc_X550em +ffffffff8179c6b0 T ixgbe_init_phy_ops_X550em +ffffffff8179cb80 T ixgbe_setup_fw_link +ffffffff8179cca0 T ixgbe_fc_autoneg_fw +ffffffff8179ccd0 T ixgbe_setup_eee_fw +ffffffff8179cd30 T ixgbe_init_ops_X550EM_a +ffffffff8179ce60 T ixgbe_read_iosf_sb_reg_x550 +ffffffff8179cfd0 T ixgbe_write_iosf_sb_reg_x550 +ffffffff8179d140 T ixgbe_read_iosf_sb_reg_x550a +ffffffff8179d1d0 T ixgbe_write_iosf_sb_reg_x550a +ffffffff8179d260 T ixgbe_acquire_swfw_sync_X550a +ffffffff8179d3a0 T ixgbe_release_swfw_sync_X550a +ffffffff8179d440 T ixgbe_fc_autoneg_fiber_x550em_a +ffffffff8179d480 T ixgbe_fc_autoneg_backplane_x550em_a +ffffffff8179d5e0 T ixgbe_setup_fc_backplane_x550em_a +ffffffff8179d7d0 T ixgbe_fc_autoneg_sgmii_x550em_a +ffffffff8179d8c0 T ixgbe_init_ops_X550EM_x +ffffffff8179d980 T ixgbe_acquire_swfw_sync_X550em +ffffffff8179da40 T ixgbe_release_swfw_sync_X550em +ffffffff8179dad0 T ixgbe_iosf_wait +ffffffff8179db80 T ixgbe_get_phy_token +ffffffff8179dc00 T ixgbe_put_phy_token +ffffffff8179dc80 T ixgbe_supported_sfp_modules_X550em +ffffffff8179dd00 T ixgbe_identify_sfp_module_X550em +ffffffff8179dd80 T ixgbe_init_mac_link_ops_X550em +ffffffff8179dec0 T ixgbe_restart_an_internal_phy_x550em +ffffffff8179dfd0 T ixgbe_setup_sgmii +ffffffff8179e1a0 T ixgbe_setup_sgmii_fw +ffffffff8179e3a0 T ixgbe_setup_mac_link_sfp_x550a +ffffffff8179e590 T ixgbe_setup_mac_link_sfp_x550em +ffffffff8179e650 T ixgbe_setup_mac_link_t_X550em +ffffffff8179e700 T ixgbe_check_link_t_X550em +ffffffff8179e7e0 T ixgbe_get_lasi_ext_t_x550em +ffffffff8179e960 T ixgbe_enable_lasi_ext_t_x550em +ffffffff8179eaf0 T ixgbe_setup_kr_speed_x550em +ffffffff8179ed00 T ixgbe_reset_phy_fw +ffffffff8179edd0 T ixgbe_check_overtemp_fw +ffffffff8179ee60 T ixgbe_read_phy_reg_x550a +ffffffff8179ef00 T ixgbe_write_phy_reg_x550a +ffffffff8179efb0 T ixgbe_setup_kr_x550em +ffffffff8179f020 T ixgbe_setup_internal_phy_t_x550em +ffffffff8179f180 T ixgbe_enter_lplu_t_x550em +ffffffff8179f3d0 T ixgbe_handle_lasi_ext_t_x550em +ffffffff8179f450 T ixgbe_reset_phy_t_X550em +ffffffff8179f4a0 T ixgbe_set_mdio_speed +ffffffff8179f570 T ixgbe_init_ext_t_x550em +ffffffff8179f620 T ixgbe_setup_sfi_x550a +ffffffff8179f7d0 T ixgbe_setup_ixfi_x550em_x +ffffffff8179f9b0 T ixgbe_setup_ixfi_x550em +ffffffff8179fb90 T ixgbe_ext_phy_t_x550em_get_link +ffffffff8179fc20 T ixgbe_setup_phy_loopback_x550em +ffffffff8179fe10 T ixgbe_read_ee_hostif_buffer_X550 +ffffffff8179ffb0 T ixgbe_write_ee_hostif_data_X550 +ffffffff817a0020 T ixgbe_checksum_ptr_x550 +ffffffff817a01b0 T ixgbe_calc_checksum_X550 +ffffffff817a0340 T ixgbe_update_flash_X550 +ffffffff817a0390 T ixgbe_get_lcd_t_x550em +ffffffff817a0450 T ixgbe_set_mux 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ixgbe_setup_phy_link_speed_generic +ffffffff817a25f0 T ixgbe_get_phy_firmware_version_generic +ffffffff817a2620 T ixgbe_read_i2c_byte_generic +ffffffff817a2640 T ixgbe_write_i2c_byte_generic +ffffffff817a2660 T ixgbe_read_i2c_eeprom_generic +ffffffff817a2690 T ixgbe_write_i2c_eeprom_generic +ffffffff817a26b0 T ixgbe_identify_module_generic +ffffffff817a2720 T ixgbe_read_i2c_byte_generic_unlocked +ffffffff817a2740 T ixgbe_write_i2c_byte_generic_unlocked +ffffffff817a2760 T ixgbe_tn_check_overtemp +ffffffff817a27d0 t ixgbe_probe_phy +ffffffff817a29d0 T ixgbe_check_reset_blocked +ffffffff817a2a30 T ixgbe_validate_phy_addr +ffffffff817a2aa0 T ixgbe_get_phy_id +ffffffff817a2b50 T ixgbe_get_phy_type_from_id +ffffffff817a2c10 T ixgbe_get_copper_link_capabilities_generic +ffffffff817a2d00 T ixgbe_get_copper_speeds_supported +ffffffff817a2dc0 T ixgbe_check_phy_link_tnx +ffffffff817a3080 T ixgbe_setup_phy_link_tnx +ffffffff817a3330 T ixgbe_get_phy_firmware_version_tnx +ffffffff817a3360 T ixgbe_reset_phy_nl +ffffffff817a35f0 T ixgbe_get_sfp_init_sequence_offsets +ffffffff817a3800 T ixgbe_is_sfp +ffffffff817a3850 T ixgbe_identify_sfp_module_generic +ffffffff817a3c40 T ixgbe_identify_qsfp_module_generic +ffffffff817a3f30 T ixgbe_get_supported_phy_sfp_layer_generic +ffffffff817a40d0 T ixgbe_is_sfp_probe +ffffffff817a4120 T ixgbe_read_i2c_byte_generic_int +ffffffff817a4320 T ixgbe_clock_out_i2c_byte +ffffffff817a4480 T ixgbe_get_i2c_ack +ffffffff817a4680 T ixgbe_write_i2c_byte_generic_int +ffffffff817a47b0 T ixgbe_set_i2c_data +ffffffff817a4960 T ixgbe_raise_i2c_clk +ffffffff817a4a80 T ixgbe_lower_i2c_clk +ffffffff817a4b10 T ixgbe_clock_in_i2c_bit +ffffffff817a4cd0 T ixgbe_get_i2c_data +ffffffff817a4d80 T ixgbe_set_copper_phy_power +ffffffff817a5000 t ixl_match +ffffffff817a50a0 t ixl_attach +ffffffff817a65f0 t ixl_710_rd_ctl +ffffffff817a66b0 t ixl_710_wr_ctl +ffffffff817a6780 t ixl_710_set_rss_key +ffffffff817a6900 t ixl_710_set_rss_lut +ffffffff817a6980 t ixl_atq_exec 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uhci_pci_attach_deferred +ffffffff817da000 T ohci_pci_match +ffffffff817da040 T ohci_pci_attach +ffffffff817da330 T ohci_pci_detach +ffffffff817da3d0 T ohci_pci_attach_deferred +ffffffff817db000 T ehci_pci_match +ffffffff817db040 T ehci_pci_attach +ffffffff817db450 T ehci_pci_detach +ffffffff817db4f0 T ehci_pci_activate +ffffffff817db570 T ehci_sb700_match +ffffffff817db5c0 T ehci_pci_takecontroller +ffffffff817dc000 T xhci_pci_match +ffffffff817dc040 T xhci_pci_attach +ffffffff817dc3a0 T xhci_pci_detach +ffffffff817dc440 T xhci_pci_activate +ffffffff817dc520 T xhci_pci_takecontroller +ffffffff817dd000 T pcicbbmatch +ffffffff817dd040 T pccbbattach +ffffffff817dd3d0 T pccbbactivate +ffffffff817dd820 T cb_chipset +ffffffff817dd880 T pccbb_shutdown +ffffffff817dd980 T pccbb_power +ffffffff817ddb20 T pccbbintr +ffffffff817ddce0 T pccbb_legacy_disable +ffffffff817ddd40 T pci113x_insert +ffffffff817dde00 T pccbb_pci_callback +ffffffff817de120 T pccbb_chipinit +ffffffff817de590 T pccbb_pcmcia_attach_setup +ffffffff817de6f0 T cbbprint +ffffffff817de720 T pccbb_pcmcia_read +ffffffff817de750 T pccbb_pcmcia_write +ffffffff817de780 T pccbb_checksockstat +ffffffff817de840 T pccbbintr_function +ffffffff817de8f0 T pccbb_ctrl +ffffffff817dea30 T pccbb_detect_card +ffffffff817deaa0 T cb_detect_voltage +ffffffff817deaf0 T cb_reset +ffffffff817dec40 T pccbb_cardenable +ffffffff817ded00 T pccbb_cb_intr_establish +ffffffff817ded20 T pccbb_intr_establish +ffffffff817dee70 T pccbb_cb_intr_disestablish +ffffffff817dee80 T pccbb_intr_disestablish +ffffffff817defc0 T pccbb_pcmcia_io_alloc +ffffffff817df0c0 T pccbb_pcmcia_io_free +ffffffff817df0f0 T pccbb_pcmcia_io_map +ffffffff817df1b0 T pccbb_pcmcia_do_io_map +ffffffff817df310 T pccbb_pcmcia_io_unmap +ffffffff817df3b0 T pccbb_pcmcia_wait_ready +ffffffff817df460 T pccbb_pcmcia_socket_enable +ffffffff817df7d0 T pccbb_pcmcia_do_mem_map +ffffffff817df950 T pccbb_pcmcia_socket_disable +ffffffff817dfa70 T pccbb_pcmcia_card_detect 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sk_init_rx_ring +ffffffff817e1c90 T sk_fill_rx_ring +ffffffff817e1d10 T sk_newbuf +ffffffff817e1e70 T sk_init_tx_ring +ffffffff817e2070 T sk_ifmedia_upd +ffffffff817e20c0 T sk_ifmedia_sts +ffffffff817e2120 T sk_ioctl +ffffffff817e22e0 T sk_init +ffffffff817e2bb0 T sk_stop +ffffffff817e3260 T skc_probe +ffffffff817e32f0 T skc_reset +ffffffff817e34f0 T sk_probe +ffffffff817e3540 T sk_attach +ffffffff817e3c50 T sk_start +ffffffff817e3db0 T sk_watchdog +ffffffff817e3e30 T sk_reset +ffffffff817e3e90 T sk_tick +ffffffff817e4060 T sk_yukon_tick +ffffffff817e40c0 T sk_init_xmac +ffffffff817e47b0 T sk_init_yukon +ffffffff817e4e60 T sk_detach +ffffffff817e4f80 T sk_activate +ffffffff817e5010 T skcprint +ffffffff817e5080 T skc_attach +ffffffff817e5570 T sk_intr +ffffffff817e5970 T skc_detach +ffffffff817e59f0 T skc_activate +ffffffff817e5a30 T sk_encap +ffffffff817e5d30 T sk_txeof +ffffffff817e5fd0 T sk_rxeof +ffffffff817e6270 T sk_intr_bcom +ffffffff817e6450 T sk_intr_xmac +ffffffff817e6600 T sk_intr_yukon +ffffffff817e7000 T msk_miibus_readreg +ffffffff817e7120 T msk_miibus_writereg +ffffffff817e7240 T msk_miibus_statchg +ffffffff817e7330 T msk_iff +ffffffff817e7530 T msk_init_rx_ring +ffffffff817e75d0 T msk_fill_rx_ring +ffffffff817e7840 T msk_init_tx_ring +ffffffff817e7950 T msk_ifmedia_upd +ffffffff817e79a0 T msk_ifmedia_sts +ffffffff817e7a00 T msk_ioctl +ffffffff817e7bb0 T msk_init +ffffffff817e8530 T msk_stop +ffffffff817e8970 T mskc_probe +ffffffff817e89a0 T mskc_reset +ffffffff817e9210 T msk_probe +ffffffff817e9260 T msk_reset +ffffffff817e9350 T msk_attach +ffffffff817e9900 T msk_start +ffffffff817e9ce0 T msk_watchdog +ffffffff817e9e40 T msk_init_yukon +ffffffff817ea350 T msk_tick +ffffffff817ea3b0 T msk_fill_rx_tick +ffffffff817ea420 T msk_kstat_attach +ffffffff817ea580 T msk_detach +ffffffff817ea6f0 T msk_kstat_detach +ffffffff817ea780 T msk_activate +ffffffff817ea8b0 T mskcprint +ffffffff817ea920 T mskc_attach +ffffffff817eb110 T msk_intr +ffffffff817eb870 T mskc_detach +ffffffff817eb950 T mskc_activate +ffffffff817eb990 T msk_rxeof +ffffffff817ebb00 T msk_txeof +ffffffff817ebc40 T msk_intr_yukon +ffffffff817ebd30 T msk_kstat_read +ffffffff817ed000 T puc_pci_match +ffffffff817ed110 T puc_pci_attach +ffffffff817ed3e0 T puc_pci_detach +ffffffff817ed540 T puc_find_description +ffffffff817ed5d0 T puc_pci_intr_string +ffffffff817ed600 T puc_pci_intr_establish +ffffffff817ed710 T puc_pci_xr17v35x_intr +ffffffff817ed870 T puc_print_ports +ffffffff817eda50 T puc_common_attach +ffffffff817edbe0 T puc_port_type_name +ffffffff817edc20 T puc_print +ffffffff817edca0 T puc_submatch +ffffffff817ee000 T com_puc_match +ffffffff817ee040 T com_puc_attach +ffffffff817ee150 T com_puc_detach +ffffffff817ef000 T lpt_puc_probe +ffffffff817ef040 T lpt_puc_attach +ffffffff817ef110 T lpt_puc_detach +ffffffff817f0000 T wi_pci_match +ffffffff817f0050 T wi_pci_attach +ffffffff817f00e0 T wi_pci_activate +ffffffff817f01e0 T wi_pci_lookup +ffffffff817f03f0 T wi_pci_wakeup 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wpi_alloc_fwmem +ffffffff817fa110 T wpi_alloc_shared +ffffffff817fa150 T wpi_alloc_tx_ring +ffffffff817fa300 T wpi_alloc_rx_ring +ffffffff817fa4e0 T wpi_apm_stop +ffffffff817fa5f0 T wpi_ioctl +ffffffff817fa860 T wpi_start +ffffffff817fa9e0 T wpi_watchdog +ffffffff817faac0 T wpi_node_alloc +ffffffff817faae0 T wpi_newassoc +ffffffff817fac30 T wpi_updateedca +ffffffff817faf20 T wpi_set_key +ffffffff817fb180 T wpi_delete_key +ffffffff817fb380 T wpi_newstate +ffffffff817fb650 T wpi_media_change +ffffffff817fb7c0 T wpi_radiotap_attach +ffffffff817fb850 T wpi_calib_timeout +ffffffff817fb950 T wpi_init_task +ffffffff817fb9c0 T wpi_free_tx_ring +ffffffff817fbbb0 T wpi_free_shared +ffffffff817fbca0 T wpi_free_fwmem +ffffffff817fbd90 T wpi_free_rx_ring +ffffffff817fbed0 T wpi_stop +ffffffff817fbf30 T wpi_wakeup +ffffffff817fbfd0 T wpi_init +ffffffff817fc120 T wpi_nic_lock +ffffffff817fc1e0 T wpi_read_prom_data +ffffffff817fc5d0 T wpi_dma_contig_alloc +ffffffff817fc7c0 T wpi_dma_contig_free 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wpi_apm_stop_master +ffffffff81801580 T wpi_nic_config +ffffffff81801730 T wpi_hw_init +ffffffff81801fb0 T wpi_hw_stop +ffffffff81803000 T iwn_match +ffffffff81803030 T iwn_attach +ffffffff818038f0 T iwn_detach +ffffffff81803ce0 T iwn_activate +ffffffff81803da0 T iwn_intr +ffffffff81804270 T iwn4965_attach +ffffffff818043c0 T iwn5000_attach +ffffffff81804710 T iwn_hw_prepare +ffffffff81804a70 T iwn_read_eeprom +ffffffff81804d20 T iwn_alloc_fwmem +ffffffff81804d50 T iwn_alloc_kw +ffffffff81804d80 T iwn_alloc_ict +ffffffff81804dc0 T iwn_alloc_sched +ffffffff81804e00 T iwn_alloc_tx_ring +ffffffff81804f70 T iwn_alloc_rx_ring +ffffffff81805180 T iwn_ioctl +ffffffff81805420 T iwn_start +ffffffff818055c0 T iwn_watchdog +ffffffff818056b0 T iwn_node_alloc +ffffffff818056d0 T iwn_bgscan +ffffffff81805750 T iwn_newassoc +ffffffff81805840 T iwn_updateedca +ffffffff81805b50 T iwn_set_key +ffffffff81805c80 T iwn_delete_key +ffffffff81805d90 T iwn_updatechan +ffffffff81805e90 T iwn_updateprot +ffffffff81805f20 T iwn_updateslot +ffffffff81805fa0 T iwn_ampdu_rx_start +ffffffff81806080 T iwn_ampdu_rx_stop +ffffffff81806150 T iwn_ampdu_tx_start +ffffffff81806360 T iwn_ampdu_tx_stop +ffffffff818065e0 T iwn_newstate +ffffffff818068a0 T iwn_media_change +ffffffff81806a00 T iwn_radiotap_attach +ffffffff81806a90 T iwn_calib_timeout +ffffffff81806cb0 T iwn_init_task +ffffffff81806d20 T iwn_free_tx_ring +ffffffff81806f10 T iwn_free_sched +ffffffff81807000 T iwn_free_ict +ffffffff818070f0 T iwn_free_kw +ffffffff818071e0 T iwn_free_fwmem +ffffffff818072d0 T iwn4965_load_firmware +ffffffff81807920 T iwn4965_read_eeprom +ffffffff81807a70 T iwn4965_post_alive +ffffffff81807f40 T iwn4965_nic_config +ffffffff81808020 T iwn4965_reset_sched +ffffffff81808050 T iwn4965_update_sched +ffffffff81808130 T iwn4965_update_rxon +ffffffff818082f0 T iwn4965_get_temperature +ffffffff81808370 T iwn4965_get_rssi +ffffffff818083e0 T iwn4965_set_txpower +ffffffff818088d0 T iwn4965_init_gains +ffffffff81808a70 T iwn4965_set_gains +ffffffff81808da0 T iwn4965_add_node +ffffffff81808e30 T iwn4965_tx_done +ffffffff81808f90 T iwn4965_ampdu_tx_start +ffffffff818093a0 T iwn4965_ampdu_tx_stop +ffffffff818095a0 T iwn5000_load_firmware +ffffffff818096b0 T iwn5000_read_eeprom +ffffffff81809900 T iwn5000_post_alive +ffffffff8180a120 T iwn5000_nic_config +ffffffff8180a500 T iwn5000_reset_sched +ffffffff8180a5f0 T iwn5000_update_sched +ffffffff8180a6e0 T iwn5000_update_rxon +ffffffff8180a8d0 T iwn5000_get_temperature +ffffffff8180a930 T iwn5000_get_rssi +ffffffff8180a980 T iwn5000_set_txpower +ffffffff8180a9d0 T iwn5000_init_gains +ffffffff8180ab70 T iwn5000_set_gains +ffffffff8180ae20 T iwn5000_add_node +ffffffff8180ae50 T iwn5000_tx_done +ffffffff8180b060 T iwn5000_ampdu_tx_start +ffffffff8180b4a0 T iwn5000_ampdu_tx_stop +ffffffff8180b720 T iwn_free_rx_ring +ffffffff8180b910 T iwn_stop +ffffffff8180b990 T iwn_wakeup +ffffffff8180ba40 T iwn_init +ffffffff8180bd40 T iwn_nic_lock +ffffffff8180be00 T iwn_eeprom_lock +ffffffff8180bed0 T iwn_init_otprom +ffffffff8180c330 T iwn_clock_wait +ffffffff8180c400 T iwn_read_prom_data +ffffffff8180c7e0 T iwn_dma_contig_alloc +ffffffff8180c9d0 T iwn_dma_contig_free +ffffffff8180ca90 T iwn_reset_rx_ring +ffffffff8180cc20 T iwn_reset_tx_ring +ffffffff8180cd20 T iwn5000_ict_reset +ffffffff8180ce00 T iwn_apm_init +ffffffff8180d240 T iwn_apm_stop +ffffffff8180d380 T iwn_read_eeprom_channels +ffffffff8180d510 T iwn_read_eeprom_enhinfo +ffffffff8180d690 T iwn_scan_abort +ffffffff8180d820 T iwn_set_led +ffffffff8180d9e0 T iwn_cmd +ffffffff8180dd20 T iwn_scan +ffffffff8180e210 T iwn_auth +ffffffff8180e4c0 T iwn_run +ffffffff8180e960 T iwn_iter_func +ffffffff8180e9f0 T iwn_set_link_quality +ffffffff8180ee70 T iwn_ccmp_decap +ffffffff8180ef70 T iwn_rx_phy +ffffffff8180f050 T iwn_rx_done +ffffffff8180f660 T iwn_ra_choose +ffffffff8180f6e0 T iwn_ampdu_rate_control +ffffffff8180f820 T iwn_ht_single_rate_control +ffffffff8180fa00 T iwn_rx_compressed_ba +ffffffff8180fb90 T iwn_ampdu_txq_advance +ffffffff8180fd20 T iwn_clear_oactive +ffffffff8180fda0 T iwn5000_rx_calib_results +ffffffff8180ff10 T iwn_rx_statistics +ffffffff818100b0 T iwn4965_power_calibration +ffffffff81810100 T iwn_get_noise +ffffffff81810170 T iwn_collect_noise +ffffffff81810480 T iwn_tune_sensitivity +ffffffff81810c30 T iwn_tx_done_free_txdata +ffffffff81810ce0 T iwn_ampdu_tx_done +ffffffff81810f90 T iwn_tx_done +ffffffff818111e0 T iwn_cmd_done +ffffffff818112d0 T iwn_notif_intr +ffffffff81811940 T iwn_init_sensitivity +ffffffff81811bf0 T iwn_wakeup_intr +ffffffff81811cb0 T iwn_fatal_intr +ffffffff81811fa0 T iwn_rval2ridx +ffffffff81812020 T iwn_tx +ffffffff81812b00 T iwn_rxon_ht40_enabled +ffffffff81812b40 T iwn_set_pslevel +ffffffff81812d00 T iwn_add_broadcast_node +ffffffff81812f50 T iwn_set_critical_temp +ffffffff81813130 T iwn_set_timing +ffffffff81813300 T iwn_send_sensitivity +ffffffff81813400 T iwn_send_btcoex +ffffffff818135a0 T iwn_send_advanced_btcoex +ffffffff81813ce0 T iwn5000_runtime_calib +ffffffff81813ed0 T iwn_config +ffffffff818143b0 T iwn6000_temp_offset_calib +ffffffff81814560 T iwn2000_temp_offset_calib +ffffffff81814740 T iwn_get_active_dwell_time +ffffffff81814780 T iwn_limit_dwell +ffffffff818147f0 T iwn_get_passive_dwell_time +ffffffff81814870 T iwn_rxon_configure_ht40 +ffffffff81814910 T iwn_update_rxon_restore_power +ffffffff81814bd0 T iwn5000_query_calibration +ffffffff81814e20 T iwn5000_send_calibration +ffffffff81814f70 T iwn5000_send_wimax_coex +ffffffff81815140 T iwn5000_crystal_calib +ffffffff818152f0 T iwn_hw_stop +ffffffff818156e0 T iwn_hw_init +ffffffff81815d80 T iwn4965_load_bootcode +ffffffff81816120 T iwn5000_load_firmware_section +ffffffff81816360 T iwn_read_firmware_leg +ffffffff81816470 T iwn_read_firmware_tlv +ffffffff818166f0 T iwn_read_firmware +ffffffff81816920 T iwn_apm_stop_master +ffffffff81817000 T iwm_lookup_cmd_ver +ffffffff81817070 T iwm_is_mimo_ht_plcp +ffffffff818170b0 T iwm_is_mimo_ht_mcs +ffffffff81817100 T iwm_store_cscheme +ffffffff81817150 T iwm_firmware_store_section +ffffffff818171f0 T iwm_set_default_calib +ffffffff81817240 T iwm_fw_info_free +ffffffff81817290 T iwm_fw_version_str +ffffffff818172d0 T iwm_read_firmware +ffffffff81817b50 T iwm_read_prph_unlocked +ffffffff81817bb0 T iwm_read_prph +ffffffff81817c30 T iwm_nic_assert_locked +ffffffff81817c90 T iwm_write_prph_unlocked +ffffffff81817d00 T iwm_write_prph +ffffffff81817d90 T iwm_write_prph64 +ffffffff81817e90 T iwm_read_mem +ffffffff81817fc0 T iwm_nic_lock +ffffffff81818110 T iwm_nic_unlock +ffffffff818181c0 T iwm_write_mem +ffffffff81818300 T iwm_write_mem32 +ffffffff81818410 T iwm_poll_bit +ffffffff818184e0 T iwm_set_bits_mask_prph +ffffffff81818680 T iwm_set_bits_prph +ffffffff818186a0 T iwm_clear_bits_prph +ffffffff818186c0 T iwm_dma_contig_alloc +ffffffff818188b0 T iwm_dma_contig_free +ffffffff81818970 T iwm_alloc_rx_ring +ffffffff81818b50 T iwm_rx_addbuf +ffffffff81818d40 T iwm_free_rx_ring +ffffffff81818ff0 T iwm_disable_rx_dma +ffffffff81819210 T iwm_reset_rx_ring +ffffffff81819290 T iwm_alloc_tx_ring +ffffffff81819470 T iwm_free_tx_ring +ffffffff81819670 T iwm_reset_tx_ring +ffffffff81819830 T iwm_enable_rfkill_int +ffffffff81819950 T iwm_check_rfkill +ffffffff818199d0 T iwm_enable_interrupts +ffffffff81819a80 T iwm_enable_fwload_interrupt +ffffffff81819b50 T iwm_restore_interrupts +ffffffff81819b80 T iwm_disable_interrupts +ffffffff81819c40 T iwm_ict_reset +ffffffff81819e00 T iwm_set_hw_ready +ffffffff81819fe0 T iwm_prepare_card_hw +ffffffff8181a120 T iwm_apm_config +ffffffff8181a200 T iwm_apm_init +ffffffff8181a8f0 T iwm_apm_stop +ffffffff8181acb0 T iwm_init_msix_hw +ffffffff8181ad50 T iwm_conf_msix_hw +ffffffff8181b2a0 T iwm_clear_persistence_bit +ffffffff8181b3f0 T iwm_start_hw +ffffffff8181b610 T iwm_stop_device +ffffffff8181bc30 T iwm_nic_config +ffffffff8181bd10 T iwm_nic_rx_init +ffffffff8181bd30 T iwm_nic_rx_mq_init +ffffffff8181c130 T iwm_nic_rx_legacy_init +ffffffff8181c370 T iwm_nic_tx_init +ffffffff8181c560 T iwm_nic_init +ffffffff8181c6c0 T iwm_enable_ac_txq +ffffffff8181cb40 T iwm_enable_txq +ffffffff8181cd20 T iwm_send_cmd_pdu +ffffffff8181cda0 T iwm_disable_txq +ffffffff8181ce80 T iwm_post_alive +ffffffff8181d400 T iwm_phy_db_get_section +ffffffff8181d4a0 T iwm_phy_db_set_section +ffffffff8181d5e0 T iwm_is_valid_channel +ffffffff8181d650 T iwm_ch_id_to_ch_index +ffffffff8181d6d0 T iwm_channel_id_to_papd +ffffffff8181d770 T iwm_channel_id_to_txp +ffffffff8181d900 T iwm_phy_db_get_section_data +ffffffff8181da90 T iwm_send_phy_db_cmd +ffffffff8181db30 T iwm_send_cmd +ffffffff8181e210 T iwm_phy_db_send_all_channel_groups +ffffffff8181e3f0 T iwm_send_phy_db_data +ffffffff8181e630 T iwm_send_time_event_cmd +ffffffff8181e740 T iwm_free_resp +ffffffff8181e7c0 T iwm_protect_session +ffffffff8181e870 T iwm_unprotect_session +ffffffff8181e920 T iwm_nvm_read_chunk +ffffffff8181ea80 T iwm_nvm_read_section +ffffffff8181eb40 T iwm_fw_valid_tx_ant +ffffffff8181eb80 T iwm_fw_valid_rx_ant +ffffffff8181ebd0 T iwm_valid_siso_ant_rate_mask +ffffffff8181ec30 T iwm_init_channel_map +ffffffff8181ed90 T iwm_mimo_enabled +ffffffff8181edd0 T iwm_setup_ht_rates +ffffffff8181ee80 T iwm_setup_vht_rates +ffffffff8181ef10 T iwm_init_reorder_buffer +ffffffff8181ef70 T iwm_clear_reorder_buffer +ffffffff8181f030 T iwm_rx_ba_session_expired +ffffffff8181f130 T iwm_reorder_timer_expired +ffffffff8181f300 T iwm_release_frames +ffffffff8181f4f0 T iwm_sta_rx_agg +ffffffff8181f9e0 T iwm_send_cmd_pdu_status +ffffffff8181fa70 T iwm_mac_ctxt_task +ffffffff8181fbd0 T iwm_mac_ctxt_cmd +ffffffff8181fdd0 T iwm_updateprot +ffffffff8181fe90 T iwm_add_task +ffffffff8181ff00 T iwm_updateslot +ffffffff8181ffc0 T iwm_updateedca +ffffffff81820080 T iwm_phy_ctxt_task +ffffffff81820240 T iwm_phy_ctxt_update +ffffffff818203c0 T iwm_setrates +ffffffff81820550 T iwm_updatechan +ffffffff81820610 T iwm_updatedtim +ffffffff818206d0 T iwm_sta_tx_agg +ffffffff81820bb0 T iwm_flush_sta +ffffffff81820d50 T iwm_txq_advance +ffffffff81820f30 T iwm_clear_oactive +ffffffff81820fb0 T iwm_ba_task +ffffffff818211f0 T iwm_ampdu_rx_start +ffffffff818212d0 T iwm_ampdu_rx_stop +ffffffff818213b0 T iwm_ampdu_tx_start +ffffffff81821470 T iwm_ampdu_tx_stop +ffffffff81821550 T iwm_set_hw_address_8000 +ffffffff818217d0 T iwm_parse_nvm_data +ffffffff81821a40 T iwm_parse_nvm_sections +ffffffff81821b40 T iwm_nvm_init +ffffffff81821e00 T iwm_firmware_load_sect +ffffffff81821eb0 T iwm_firmware_load_chunk +ffffffff81822160 T iwm_load_firmware_7000 +ffffffff818223c0 T iwm_load_cpu_sections_8000 +ffffffff81822770 T iwm_load_firmware_8000 +ffffffff81822980 T iwm_load_firmware +ffffffff81822a60 T iwm_start_fw +ffffffff81822c30 T iwm_send_tx_ant_cfg +ffffffff81822cc0 T iwm_send_phy_cfg_cmd +ffffffff81822d70 T iwm_send_dqa_cmd +ffffffff81822e00 T iwm_load_ucode_wait_alive +ffffffff81822f40 T iwm_save_fw_paging +ffffffff81822fb0 T iwm_send_paging_cmd +ffffffff81823100 T iwm_free_fw_paging +ffffffff81823270 T iwm_run_init_mvm_ucode +ffffffff818235b0 T iwm_send_bt_init_conf +ffffffff81823650 T iwm_sf_config +ffffffff81823860 T iwm_config_ltr +ffffffff81823920 T iwm_get_signal_strength +ffffffff81823980 T iwm_rxmq_get_signal_strength +ffffffff818239d0 T iwm_rx_rx_phy_cmd +ffffffff81823a30 T iwm_get_noise +ffffffff81823aa0 T iwm_ccmp_decap +ffffffff81823ba0 T iwm_rx_hwdecrypt +ffffffff81823c70 T iwm_rx_frame +ffffffff81823fa0 T iwm_rx_mpdu +ffffffff818241b0 T iwm_flip_address +ffffffff81824210 T iwm_detect_duplicate +ffffffff81824330 T iwm_is_sn_less +ffffffff81824390 T iwm_oldsn_workaround +ffffffff81824450 T iwm_rx_reorder +ffffffff818249c0 T iwm_rx_mpdu_mq +ffffffff81824dc0 T iwm_ra_choose +ffffffff81824e80 T iwm_ht_single_rate_control +ffffffff818250a0 T iwm_vht_single_rate_control +ffffffff818252f0 T iwm_rx_tx_cmd_single +ffffffff818254c0 T iwm_txd_done +ffffffff81825590 T iwm_reset_sched +ffffffff81825640 T iwm_ampdu_tx_done +ffffffff818259b0 T iwm_rx_tx_cmd +ffffffff81825b90 T iwm_ampdu_rate_control +ffffffff81825d30 T iwm_rx_compressed_ba +ffffffff81825ec0 T iwm_rx_bmiss +ffffffff81825fb0 T iwm_binding_cmd +ffffffff81826130 T iwm_phy_ctxt_cmd_hdr +ffffffff818261a0 T iwm_phy_ctxt_cmd_data +ffffffff81826310 T iwm_get_vht_ctrl_pos +ffffffff81826380 T iwm_phy_ctxt_cmd_uhb +ffffffff818265b0 T iwm_phy_ctxt_cmd +ffffffff81826700 T iwm_update_sched +ffffffff818267d0 T iwm_send_cmd_status +ffffffff818268f0 T iwm_cmd_done +ffffffff81826a90 T iwm_tx_fill_cmd +ffffffff81826eb0 T iwm_rval2ridx +ffffffff81826f40 T iwm_tx +ffffffff818279e0 T iwm_flush_tx_path +ffffffff81827ab0 T iwm_wait_tx_queues_empty +ffffffff81827b70 T iwm_led_enable +ffffffff81827ba0 T iwm_led_disable +ffffffff81827bd0 T iwm_led_is_enabled +ffffffff81827c30 T iwm_led_blink_timeout +ffffffff81827cb0 T iwm_led_blink_start +ffffffff81827d00 T iwm_led_blink_stop +ffffffff81827d50 T iwm_beacon_filter_send_cmd +ffffffff81827de0 T iwm_beacon_filter_set_cqm_params +ffffffff81827e20 T iwm_update_beacon_abort +ffffffff81827f10 T iwm_power_build_cmd +ffffffff81827fa0 T iwm_power_mac_update_mode +ffffffff818281b0 T iwm_power_update_device +ffffffff81828250 T iwm_enable_beacon_filter +ffffffff81828340 T iwm_disable_beacon_filter +ffffffff81828420 T iwm_add_sta_cmd +ffffffff81828810 T iwm_add_aux_sta +ffffffff818289b0 T iwm_drain_sta +ffffffff81828b60 T iwm_rm_sta_cmd +ffffffff81828c20 T iwm_scan_rx_chain +ffffffff81828c90 T iwm_scan_rate_n_flags +ffffffff81828d90 T iwm_lmac_scan_fill_channels +ffffffff81828e70 T iwm_umac_scan_fill_channels +ffffffff81828f40 T iwm_fill_probe_req_v1 +ffffffff81828fe0 T iwm_fill_probe_req +ffffffff81829210 T iwm_lmac_scan +ffffffff81829720 T iwm_config_umac_scan +ffffffff81829930 T iwm_umac_scan_size +ffffffff818299a0 T iwm_get_scan_req_umac_chan_param +ffffffff818299f0 T iwm_get_scan_req_umac_data +ffffffff81829a40 T iwm_umac_scan +ffffffff81829ea0 T iwm_mcc_update +ffffffff81829f30 T iwm_ridx2rate +ffffffff81829fa0 T iwm_ack_rates +ffffffff8182a260 T iwm_mac_ctxt_cmd_common +ffffffff8182a570 T iwm_mac_ctxt_cmd_fill_sta +ffffffff8182a630 T iwm_update_quotas +ffffffff8182a9f0 T iwm_del_task +ffffffff8182aa50 T iwm_scan +ffffffff8182acc0 T iwm_scan_abort +ffffffff8182ade0 T iwm_bgscan +ffffffff8182ae80 T iwm_bgscan_done +ffffffff8182af20 T iwm_bgscan_done_task +ffffffff8182b170 T iwm_umac_scan_abort +ffffffff8182b200 T iwm_lmac_scan_abort +ffffffff8182b2a0 T iwm_auth +ffffffff8182b610 T iwm_deauth +ffffffff8182b970 T iwm_run +ffffffff8182bea0 T iwm_allow_mcast +ffffffff8182bfa0 T iwm_run_stop +ffffffff8182c5c0 T iwm_node_alloc +ffffffff8182c5e0 T iwm_set_key_v1 +ffffffff8182c720 T iwm_set_key +ffffffff8182c980 T iwm_delete_key_v1 +ffffffff8182cab0 T iwm_delete_key +ffffffff8182cd20 T iwm_calib_timeout +ffffffff8182cde0 T iwm_set_rate_table_vht +ffffffff8182d100 T iwm_set_rate_table +ffffffff8182d4c0 T iwm_media_change +ffffffff8182d6c0 T iwm_stop +ffffffff8182db40 T iwm_init +ffffffff8182de10 T iwm_newstate_task +ffffffff8182df90 T iwm_newstate +ffffffff8182e0f0 T iwm_endscan +ffffffff8182e140 T iwm_fill_sf_command +ffffffff8182e210 T iwm_send_soc_conf +ffffffff8182e350 T iwm_send_update_mcc_cmd +ffffffff8182e510 T iwm_send_temp_report_ths_cmd +ffffffff8182e5e0 T iwm_tt_tx_backoff +ffffffff8182e670 T iwm_fill_paging_mem +ffffffff8182e9e0 T iwm_alloc_fw_paging_mem +ffffffff8182ed80 T iwm_init_hw +ffffffff8182f400 T iwm_preinit +ffffffff8182f5a0 T iwm_start +ffffffff8182f770 T iwm_watchdog +ffffffff8182f910 T iwm_nic_error +ffffffff8182fdf0 T iwm_dump_driver_status +ffffffff8182fe90 T iwm_ioctl +ffffffff8182fff0 T iwm_nic_umac_error +ffffffff81830460 T iwm_desc_lookup +ffffffff818305f0 T iwm_rx_pkt_valid +ffffffff81830640 T iwm_rx_pkt +ffffffff81831400 T iwm_notif_intr +ffffffff81831560 T iwm_intr +ffffffff81831990 T iwm_intr_msix +ffffffff81831c20 T iwm_match +ffffffff81831c50 T iwm_attach_hook +ffffffff81831c90 T iwm_attach +ffffffff818329d0 T iwm_radiotap_attach +ffffffff81832a60 T iwm_init_task +ffffffff81832b20 T iwm_resume +ffffffff81832c60 T iwm_wakeup +ffffffff81832d10 T iwm_activate +ffffffff81833000 T iwx_lookup_cmd_ver +ffffffff81833070 T iwx_lookup_notif_ver +ffffffff818330e0 T iwx_is_mimo_ht_plcp +ffffffff81833120 T iwx_store_cscheme +ffffffff81833170 T iwx_ctxt_info_alloc_dma +ffffffff81833210 T iwx_dma_contig_alloc +ffffffff818333f0 T iwx_ctxt_info_free_paging +ffffffff81833550 T iwx_dma_contig_free +ffffffff81833610 T iwx_get_num_sections +ffffffff81833690 T iwx_init_fw_sec +ffffffff81833ae0 T iwx_fw_version_str +ffffffff81833b20 T iwx_alloc_fw_monitor_block +ffffffff81833bd0 T iwx_alloc_fw_monitor +ffffffff81833c90 T iwx_apply_debug_destination +ffffffff818341e0 T iwx_nic_lock +ffffffff81834330 T iwx_write_prph +ffffffff818343d0 T iwx_set_bits_prph +ffffffff818343f0 T iwx_clear_bits_prph +ffffffff81834410 T iwx_read_prph +ffffffff818344b0 T iwx_nic_unlock +ffffffff81834560 T iwx_set_ltr +ffffffff818346b0 T iwx_ctxt_info_init +ffffffff81834970 T iwx_ctxt_info_free_fw_img +ffffffff81834af0 T iwx_ctxt_info_gen3_init +ffffffff818350e0 T iwx_write_umac_prph +ffffffff81835190 T iwx_firmware_store_section +ffffffff81835230 T iwx_set_default_calib +ffffffff81835280 T iwx_fw_info_free +ffffffff81835310 T iwx_read_firmware +ffffffff81835da0 T iwx_prph_addr_mask +ffffffff81835de0 T iwx_read_prph_unlocked +ffffffff81835e60 T iwx_nic_assert_locked +ffffffff81835ec0 T iwx_write_prph_unlocked +ffffffff81835f40 T iwx_write_prph64 +ffffffff81836070 T iwx_read_umac_prph_unlocked +ffffffff818360f0 T iwx_read_umac_prph +ffffffff81836190 T iwx_write_umac_prph_unlocked +ffffffff81836210 T iwx_read_mem +ffffffff81836340 T iwx_write_mem +ffffffff81836480 T iwx_write_mem32 +ffffffff81836590 T iwx_poll_bit +ffffffff81836660 T iwx_set_bits_mask_prph +ffffffff81836850 T iwx_alloc_rx_ring +ffffffff81836a30 T iwx_rx_addbuf +ffffffff81836c50 T iwx_free_rx_ring +ffffffff81836f00 T iwx_disable_rx_dma +ffffffff81837160 T iwx_reset_rx_ring +ffffffff81837200 T iwx_alloc_tx_ring +ffffffff81837410 T iwx_free_tx_ring +ffffffff818376a0 T iwx_reset_tx_ring +ffffffff81837900 T iwx_enable_rfkill_int +ffffffff818379e0 T iwx_check_rfkill +ffffffff81837a60 T iwx_enable_interrupts +ffffffff81837b10 T iwx_enable_fwload_interrupt +ffffffff81837bf0 T iwx_restore_interrupts +ffffffff81837c20 T iwx_disable_interrupts +ffffffff81837ce0 T iwx_ict_reset +ffffffff81837ea0 T iwx_set_hw_ready +ffffffff81838080 T iwx_prepare_card_hw +ffffffff818381c0 T iwx_force_power_gating +ffffffff81838270 T iwx_apm_config +ffffffff81838340 T iwx_apm_init +ffffffff818385a0 T iwx_apm_stop +ffffffff81838960 T iwx_init_msix_hw +ffffffff81838a00 T iwx_conf_msix_hw +ffffffff81838fa0 T iwx_clear_persistence_bit +ffffffff81839120 T iwx_start_hw +ffffffff81839520 T iwx_stop_device +ffffffff81839a90 T iwx_nic_config +ffffffff81839b20 T iwx_nic_rx_init +ffffffff81839b80 T iwx_nic_init +ffffffff81839ca0 T iwx_enable_txq +ffffffff81839f70 T iwx_send_cmd +ffffffff8183a530 T iwx_free_resp +ffffffff8183a5b0 T iwx_disable_txq +ffffffff8183a810 T iwx_post_alive +ffffffff8183a8a0 T iwx_schedule_session_protection +ffffffff8183a970 T iwx_send_cmd_pdu +ffffffff8183a9f0 T iwx_unprotect_session +ffffffff8183aac0 T iwx_fw_valid_tx_ant +ffffffff8183ab00 T iwx_fw_valid_rx_ant +ffffffff8183ab50 T iwx_init_channel_map +ffffffff8183ad50 T iwx_mimo_enabled +ffffffff8183ad90 T iwx_setup_ht_rates +ffffffff8183ae40 T iwx_setup_vht_rates +ffffffff8183aed0 T iwx_init_reorder_buffer +ffffffff8183af30 T iwx_clear_reorder_buffer +ffffffff8183aff0 T iwx_rx_ba_session_expired +ffffffff8183b0f0 T iwx_rx_bar_frame_release +ffffffff8183b1a0 T iwx_release_frames +ffffffff8183b390 T iwx_reorder_timer_expired +ffffffff8183b560 T iwx_find_rxba_data +ffffffff8183b5f0 T iwx_sta_rx_agg_baid_cfg_cmd +ffffffff8183b840 T iwx_send_cmd_pdu_status +ffffffff8183b8d0 T iwx_sta_rx_agg_sta_cmd +ffffffff8183bb20 T iwx_sta_rx_agg +ffffffff8183bdf0 T iwx_mac_ctxt_task +ffffffff8183bf80 T iwx_mac_ctxt_cmd +ffffffff8183c180 T iwx_phy_ctxt_task +ffffffff8183c330 T iwx_phy_ctxt_update +ffffffff8183c780 T iwx_updatechan +ffffffff8183c840 T iwx_add_task +ffffffff8183c8b0 T iwx_updateprot +ffffffff8183c970 T iwx_updateslot +ffffffff8183ca30 T iwx_updateedca +ffffffff8183caf0 T iwx_updatedtim +ffffffff8183cbb0 T iwx_sta_tx_agg_start +ffffffff8183cda0 T iwx_ba_task +ffffffff8183cef0 T iwx_ampdu_rx_start +ffffffff8183cfd0 T iwx_ampdu_rx_stop +ffffffff8183d0b0 T iwx_ampdu_tx_start +ffffffff8183d160 T iwx_set_mac_addr_from_csr +ffffffff8183d380 T iwx_flip_hw_address +ffffffff8183d3d0 T iwx_is_valid_mac_addr +ffffffff8183d470 T iwx_nvm_get +ffffffff8183d750 T iwx_load_firmware +ffffffff8183d930 T iwx_start_fw +ffffffff8183db10 T iwx_pnvm_handle_section +ffffffff8183de10 T iwx_ctxt_info_gen3_set_pnvm +ffffffff8183de60 T iwx_pnvm_parse +ffffffff8183df50 T iwx_load_pnvm +ffffffff8183e2f0 T iwx_send_tx_ant_cfg +ffffffff8183e380 T iwx_send_phy_cfg_cmd +ffffffff8183e430 T iwx_send_dqa_cmd +ffffffff8183e4c0 T iwx_load_ucode_wait_alive +ffffffff8183e580 T iwx_run_init_mvm_ucode +ffffffff8183e7e0 T iwx_config_ltr +ffffffff8183e8a0 T iwx_update_rx_desc +ffffffff8183e940 T iwx_rxmq_get_signal_strength +ffffffff8183e990 T iwx_rx_rx_phy_cmd +ffffffff8183e9f0 T iwx_get_noise +ffffffff8183ea60 T iwx_ccmp_decap +ffffffff8183eba0 T iwx_rx_hwdecrypt +ffffffff8183eca0 T iwx_rx_frame +ffffffff8183ef40 T iwx_detect_duplicate +ffffffff8183f060 T iwx_is_sn_less +ffffffff8183f0c0 T iwx_oldsn_workaround +ffffffff8183f180 T iwx_rx_reorder +ffffffff8183f6f0 T iwx_rx_mpdu_mq +ffffffff8183fa30 T iwx_clear_tx_desc +ffffffff8183fbd0 T iwx_txd_done +ffffffff8183fc90 T iwx_txq_advance +ffffffff8183ffb0 T iwx_tx_update_byte_tbl +ffffffff81840050 T iwx_rx_tx_cmd +ffffffff818401c0 T iwx_clear_oactive +ffffffff81840240 T iwx_rx_compressed_ba +ffffffff818403c0 T iwx_rx_bmiss +ffffffff818404b0 T iwx_binding_cmd +ffffffff81840620 T iwx_get_vht_ctrl_pos +ffffffff81840690 T iwx_phy_ctxt_cmd_uhb_v3_v4 +ffffffff818408e0 T iwx_phy_ctxt_cmd_v3_v4 +ffffffff81840b30 T iwx_phy_ctxt_cmd +ffffffff81840c30 T iwx_send_cmd_status +ffffffff81840d50 T iwx_cmd_done +ffffffff81840e30 T iwx_fw_rateidx_ofdm +ffffffff81840e90 T iwx_fw_rateidx_cck +ffffffff81840ef0 T iwx_tx_fill_cmd +ffffffff81841190 T iwx_rval2ridx +ffffffff81841220 T iwx_tx +ffffffff81841960 T iwx_flush_sta_tids +ffffffff81841b10 T iwx_drain_sta +ffffffff81841ca0 T iwx_flush_sta +ffffffff81841f60 T iwx_beacon_filter_send_cmd +ffffffff81841ff0 T iwx_update_beacon_abort +ffffffff81842100 T iwx_power_build_cmd +ffffffff81842190 T iwx_power_mac_update_mode +ffffffff818423b0 T iwx_power_update_device +ffffffff81842450 T iwx_enable_beacon_filter +ffffffff81842560 T iwx_disable_beacon_filter +ffffffff81842650 T iwx_add_sta_cmd +ffffffff81842950 T iwx_rm_sta_cmd +ffffffff81842a10 T iwx_rm_sta +ffffffff81842e70 T iwx_disable_mgmt_queue +ffffffff81842f50 T iwx_umac_scan_fill_channels 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iwx_rs_init_v4 +ffffffff818453a0 T iwx_rs_init +ffffffff81845400 T iwx_rs_update +ffffffff818456a0 T iwx_phy_send_rlc +ffffffff81845790 T iwx_auth +ffffffff81845ae0 T iwx_deauth +ffffffff81845d80 T iwx_run +ffffffff81846210 T iwx_sf_config +ffffffff81846420 T iwx_allow_mcast +ffffffff81846520 T iwx_run_stop +ffffffff81846810 T iwx_node_alloc +ffffffff81846830 T iwx_set_key +ffffffff81846960 T iwx_add_sta_key +ffffffff81846bd0 T iwx_setkey_task +ffffffff81846cc0 T iwx_delete_key +ffffffff81846e50 T iwx_media_change +ffffffff81846ec0 T iwx_stop +ffffffff81847360 T iwx_init +ffffffff81847630 T iwx_newstate_task +ffffffff81847770 T iwx_newstate +ffffffff81847940 T iwx_endscan +ffffffff81847990 T iwx_fill_sf_command +ffffffff81847a60 T iwx_send_bt_init_conf +ffffffff81847af0 T iwx_send_soc_conf +ffffffff81847c30 T iwx_send_update_mcc_cmd +ffffffff81847dd0 T iwx_send_temp_report_ths_cmd +ffffffff81847ea0 T iwx_init_hw +ffffffff81848480 T iwx_preinit +ffffffff81848650 T iwx_start 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bce_activate +ffffffff8188f8a0 T bce_intr +ffffffff8188fb90 T bce_reset +ffffffff81890150 T bce_ioctl +ffffffff818902b0 T bce_start +ffffffff818904e0 T bce_watchdog +ffffffff81890530 T bce_mii_read +ffffffff81890670 T bce_mii_write +ffffffff818907a0 T bce_statchg +ffffffff81890b30 T bce_mediachange +ffffffff81890b80 T bce_mediastatus +ffffffff81890be0 T bce_tick +ffffffff81890c30 T bce_stop +ffffffff81890d50 T bce_init +ffffffff81891160 T bce_iff +ffffffff81891260 T bce_rxintr +ffffffff818913f0 T bce_txintr +ffffffff818914e0 T bce_add_rxbuf +ffffffff818915a0 T bce_add_mac +ffffffff81892000 T ath_pci_match +ffffffff81892060 T ath_pci_attach +ffffffff81892290 T ath_pci_detach +ffffffff81893000 T athn_pci_match +ffffffff81893030 T athn_pci_attach +ffffffff818932c0 T athn_pci_detach +ffffffff81893340 T athn_pci_activate +ffffffff818933f0 T athn_pci_read +ffffffff81893420 T athn_pci_write +ffffffff81893450 T athn_pci_write_barrier +ffffffff81893480 T athn_pci_disable_aspm +ffffffff818934f0 T athn_pci_wakeup +ffffffff81894000 T atw_pci_match +ffffffff81894030 T atw_pci_attach +ffffffff818942a0 T atw_pci_detach +ffffffff81894320 t atw_pci_enable +ffffffff818943c0 t atw_pci_disable +ffffffff81895000 T rtw_pci_match +ffffffff81895030 T rtw_pci_attach +ffffffff81895250 T rtw_pci_detach +ffffffff818952d0 T rtw_pci_enable +ffffffff81895370 T rtw_pci_disable +ffffffff81896000 T rtwn_pci_match +ffffffff81896030 T rtwn_pci_attach +ffffffff81896590 T rtwn_pci_detach +ffffffff818966a0 T rtwn_pci_activate +ffffffff818966c0 T rtwn_calib_to +ffffffff81896720 T rtwn_scan_to +ffffffff81896740 T rtwn_intr +ffffffff818969e0 T rtwn_alloc_rx_list +ffffffff81896d00 T rtwn_alloc_tx_list +ffffffff81896f40 T rtwn_free_rx_list +ffffffff81897090 T rtwn_pci_write_1 +ffffffff818970c0 T rtwn_pci_write_2 +ffffffff818970f0 T rtwn_pci_write_4 +ffffffff81897120 T rtwn_pci_read_1 +ffffffff81897150 T rtwn_pci_read_2 +ffffffff81897180 T rtwn_pci_read_4 +ffffffff818971b0 T rtwn_tx +ffffffff81897740 T rtwn_power_on +ffffffff81897770 T rtwn_dma_init +ffffffff81897b20 T rtwn_pci_load_firmware +ffffffff81897bd0 T rtwn_fw_loadpage +ffffffff81897d00 T rtwn_mac_init +ffffffff81897e40 T rtwn_bb_init +ffffffff818982f0 T rtwn_alloc_buffers +ffffffff81898320 T rtwn_pci_init +ffffffff818983f0 T rtwn_pci_stop +ffffffff81898540 T rtwn_is_oactive +ffffffff81898580 T rtwn_next_calib +ffffffff818985a0 T rtwn_cancel_calib +ffffffff818985e0 T rtwn_pci_next_scan +ffffffff81898600 T rtwn_cancel_scan +ffffffff81898640 T rtwn_wait_async +ffffffff81898670 T rtwn_free_tx_list +ffffffff818987e0 T rtwn_setup_rx_desc +ffffffff81898850 T rtwn_reset_rx_list +ffffffff818988f0 T rtwn_reset_tx_list +ffffffff81898a40 T rtwn_rx_frame +ffffffff81898ec0 T rtwn_tx_done +ffffffff81899050 T rtwn_poll_c2h_events +ffffffff81899220 T rtwn_pci_92c_stop +ffffffff81899400 T rtwn_pci_88e_stop +ffffffff818997e0 T rtwn_pci_23a_stop +ffffffff81899b80 T rtwn_88e_intr +ffffffff81899eb0 T rtwn_llt_write +ffffffff81899f70 T rtwn_llt_init +ffffffff8189a230 T rtwn_92c_power_on +ffffffff8189a6b0 T rtwn_88e_power_on +ffffffff8189aab0 T rtwn_23a_power_on +ffffffff8189af20 T rtwn_tx_report +ffffffff8189b000 T ral_pci_match +ffffffff8189b030 T ral_pci_attach +ffffffff8189b210 T ral_pci_detach +ffffffff8189b2b0 T ral_pci_activate +ffffffff8189b340 T ral_pci_wakeup +ffffffff8189c000 T acx_pci_match +ffffffff8189c030 T acx_pci_attach +ffffffff8189c260 T acx_pci_detach +ffffffff8189d000 T pgt_pci_match +ffffffff8189d030 T pgt_pci_attach +ffffffff8189d200 T pgt_pci_detach +ffffffff8189e000 T malo_pci_match +ffffffff8189e030 T malo_pci_attach +ffffffff8189e1e0 T malo_pci_detach +ffffffff8189e230 T malo_pci_activate +ffffffff8189e290 T malo_pci_wakeup +ffffffff8189f000 T bwi_pci_match +ffffffff8189f070 T bwi_pci_attach +ffffffff8189f290 T bwi_pci_detach +ffffffff8189f2e0 T bwi_pci_activate +ffffffff8189f350 T bwi_reset_bcm4331 +ffffffff8189f470 T bwi_pci_conf_write +ffffffff8189f4a0 T bwi_pci_conf_read +ffffffff8189f4d0 T bwi_pci_wakeup +ffffffff818a0000 T piixpm_match +ffffffff818a0030 T piixpm_attach +ffffffff818a04c0 T piixpm_intr +ffffffff818a05d0 T piixpm_i2c_acquire_bus +ffffffff818a06b0 T piixpm_i2c_release_bus +ffffffff818a0790 T piixpm_i2c_exec +ffffffff818a1000 T vic_match +ffffffff818a10a0 T vic_attach +ffffffff818a1430 T vic_intr +ffffffff818a14b0 T vic_query +ffffffff818a1710 T vic_alloc_data +ffffffff818a1a10 T vic_tick +ffffffff818a1a80 T vic_ioctl +ffffffff818a1cb0 T vic_start +ffffffff818a2010 T vic_watchdog +ffffffff818a2040 T vic_media_change +ffffffff818a2070 T vic_media_status +ffffffff818a2130 T vic_read +ffffffff818a2150 T vic_read_cmd +ffffffff818a21a0 T vic_getlladdr +ffffffff818a2250 T vic_alloc_dmamem +ffffffff818a23c0 T vic_rx_fill +ffffffff818a25b0 T vic_alloc_mbuf +ffffffff818a2670 T vic_init_data +ffffffff818a2a20 T vic_uninit_data +ffffffff818a2bf0 T vic_link_state +ffffffff818a2c70 T vic_write +ffffffff818a2cc0 T vic_rx_proc +ffffffff818a2f20 T vic_tx_proc +ffffffff818a30a0 T vic_iff +ffffffff818a31e0 T vic_setlladdr +ffffffff818a3240 T vic_load_txb +ffffffff818a32f0 T vic_init +ffffffff818a3490 T vic_stop +ffffffff818a35d0 T vic_rxrinfo +ffffffff818a36a0 T vic_free_dmamem +ffffffff818a4000 T vmxnet3_match +ffffffff818a4030 T vmxnet3_attach +ffffffff818a4890 T vmxnet3_intr +ffffffff818a4930 T vmxnet3_intr_event +ffffffff818a49b0 T vmxnet3_intr_intx +ffffffff818a4a20 T vmxnet3_intr_queue +ffffffff818a4ab0 T vmxnet3_dma_init +ffffffff818a4ea0 T vmxnet3_ioctl +ffffffff818a5130 T vmxnet3_start +ffffffff818a54b0 T vmxnet3_watchdog +ffffffff818a5500 T vmxnet3_media_change +ffffffff818a5530 T vmxnet3_media_status +ffffffff818a5640 T vmxnet3_link_state +ffffffff818a5700 T vmxnet3_dma_allocmem +ffffffff818a5850 T vmxnet3_alloc_txring +ffffffff818a5a00 T vmxnet3_alloc_rxring +ffffffff818a5d50 t vmx_dmamem_alloc +ffffffff818a5eb0 T vmxnet3_rxfill_tick +ffffffff818a5f20 T vmxnet3_txinit +ffffffff818a6010 T vmxnet3_rxfill +ffffffff818a6300 T vmxnet3_rxinit +ffffffff818a6440 T vmxnet3_txstop +ffffffff818a6540 T vmxnet3_rxstop +ffffffff818a66a0 T vmxnet3_enable_all_intrs +ffffffff818a6770 T vmxnet3_disable_all_intrs +ffffffff818a6840 T vmxnet3_evintr +ffffffff818a6a10 T vmxnet3_rxintr +ffffffff818a6d80 T vmxnet3_txintr +ffffffff818a6f60 T vmxnet3_init +ffffffff818a72f0 T vmxnet3_rx_csum +ffffffff818a7350 T vmxnet3_iff +ffffffff818a7490 T vmxnet3_stop +ffffffff818a7740 T vmxnet3_reset +ffffffff818a7780 t vmx_kstat_create +ffffffff818a7960 t vmx_kstat_read +ffffffff818a8000 T vmwpvs_match +ffffffff818a8040 T vmwpvs_attach +ffffffff818a8980 T vmwpvs_scsi_cmd +ffffffff818a8df0 T vmwpvs_intx +ffffffff818a8e70 T vmwpvs_msg_task +ffffffff818a90e0 T vmwpvs_intr +ffffffff818a92d0 T vmwpvs_get_config +ffffffff818a94d0 T vmwpvs_dmamem_zalloc +ffffffff818a9530 T vmwpvs_dmamem_alloc +ffffffff818a96b0 T vmwpvs_ccb_put +ffffffff818a9710 T vmwpvs_setup_rings +ffffffff818a9820 T vmwpvs_setup_msg_ring +ffffffff818a98f0 T vmwpvs_ccb_get +ffffffff818a9970 T vmwpvs_dmamem_free +ffffffff818a99f0 T vmwpvs_cmd +ffffffff818a9a90 T vmwpvs_scsi_cmd_done +ffffffff818a9c70 T vmwpvs_scsi_cmd_poll +ffffffff818aa000 T lii_match +ffffffff818aa030 T lii_attach +ffffffff818aa420 T lii_activate +ffffffff818aa520 T lii_reset +ffffffff818aa7f0 T lii_spi_configure +ffffffff818aa8e0 T lii_eeprom_present +ffffffff818aa970 T lii_eeprom_read +ffffffff818aa9a0 T lii_spi_read +ffffffff818aac60 T lii_read_macaddr +ffffffff818aadc0 T lii_intr +ffffffff818aaed0 T lii_alloc_rings +ffffffff818ab0e0 T lii_tick +ffffffff818ab130 T lii_mii_readreg +ffffffff818ab3d0 T lii_mii_writereg +ffffffff818ab670 T lii_mii_statchg +ffffffff818ab6e0 T lii_media_change +ffffffff818ab730 T lii_media_status +ffffffff818ab790 T lii_ioctl +ffffffff818ab920 T lii_start +ffffffff818abad0 T lii_watchdog +ffffffff818abb10 T lii_stop +ffffffff818abb80 T lii_init +ffffffff818ac070 T lii_iff +ffffffff818ac1b0 T lii_tx_put +ffffffff818ac2c0 T lii_free_tx_space +ffffffff818ac300 T lii_rxintr +ffffffff818ac4b0 T lii_txintr +ffffffff818ad000 T ichiic_match +ffffffff818ad030 T ichiic_attach +ffffffff818ad220 T ichiic_intr +ffffffff818ad340 T ichiic_i2c_acquire_bus +ffffffff818ad3a0 T ichiic_i2c_release_bus +ffffffff818ad3f0 T ichiic_i2c_exec +ffffffff818ae000 T viapm_match +ffffffff818ae030 T viapm_attach +ffffffff818ae680 T viapm_intr +ffffffff818ae790 T viapm_i2c_acquire_bus +ffffffff818ae7f0 T viapm_i2c_release_bus +ffffffff818ae840 T viapm_i2c_exec +ffffffff818aeb50 T viapm_refresh_sensor_data +ffffffff818aee50 T viapm_refresh +ffffffff818aee80 T val_to_uK +ffffffff818aef20 T val_to_rpm +ffffffff818aef60 T val_to_uV +ffffffff818af000 T viapm_get_timecount +ffffffff818b0000 T amdiic_match +ffffffff818b0030 T amdiic_attach +ffffffff818b0200 T amdiic_intr +ffffffff818b02d0 T amdiic_i2c_acquire_bus +ffffffff818b0330 T amdiic_i2c_release_bus +ffffffff818b0380 T amdiic_i2c_exec +ffffffff818b05e0 T amdiic_read +ffffffff818b0750 T amdiic_wait +ffffffff818b07f0 T amdiic_write +ffffffff818b1000 T nviic_match +ffffffff818b1030 T nviic_attach +ffffffff818b1270 T nviic_i2c_acquire_bus +ffffffff818b12c0 T nviic_i2c_release_bus +ffffffff818b1310 T nviic_i2c_exec +ffffffff818b15a0 T nviic_write +ffffffff818b15f0 T nviic_read +ffffffff818b2000 T sdhc_pci_match +ffffffff818b2060 T sdhc_pci_attach +ffffffff818b23a0 T sdhc_pci_activate +ffffffff818b2400 T sdhc_takecontroller +ffffffff818b24a0 T sdhc_ricohfix +ffffffff818b2610 T sdhc_pci_conf_write +ffffffff818b3000 T kate_match +ffffffff818b3170 T kate_attach +ffffffff818b34b0 T kate_refresh +ffffffff818b4000 T km_match +ffffffff818b4050 T km_attach +ffffffff818b40f0 T km_refresh +ffffffff818b5000 T ksmn_match +ffffffff818b5050 T ksmn_attach +ffffffff818b5240 T ksmn_ccd_attach +ffffffff818b5390 T ksmn_refresh +ffffffff818b54e0 T ksmn_read_reg +ffffffff818b6000 t iosf_pci_match +ffffffff818b6060 t iosf_pci_attach +ffffffff818b6100 t iosf_pci_mbi_mdr_rd +ffffffff818b6160 t iosf_pci_mbi_mdr_wr +ffffffff818b7000 T itherm_probe +ffffffff818b7030 T itherm_attach +ffffffff818b73e0 T itherm_activate +ffffffff818b7460 T itherm_enable +ffffffff818b74c0 T itherm_refresh +ffffffff818b74d0 T itherm_refresh_sensor_data +ffffffff818b78c0 T itherm_bias_temperature_sensor +ffffffff818b8000 T pchtemp_match +ffffffff818b8030 T pchtemp_attach +ffffffff818b81a0 T pchtemp_refresh +ffffffff818b9000 T rtsx_pci_match +ffffffff818b9080 T rtsx_pci_attach +ffffffff818ba000 T xspd_match +ffffffff818ba030 T xspd_attach +ffffffff818ba1f0 T xspd_intr +ffffffff818bb000 T virtio_pci_match +ffffffff818bb080 T virtio_pci_attach +ffffffff818bb420 T virtio_pci_detach +ffffffff818bb500 T virtio_pci_kick +ffffffff818bb560 T virtio_pci_read_device_config_1 +ffffffff818bb590 T virtio_pci_read_device_config_2 +ffffffff818bb5c0 T virtio_pci_read_device_config_4 +ffffffff818bb5f0 T virtio_pci_read_device_config_8 +ffffffff818bb670 T virtio_pci_write_device_config_1 +ffffffff818bb6a0 T virtio_pci_write_device_config_2 +ffffffff818bb6d0 T virtio_pci_write_device_config_4 +ffffffff818bb700 T virtio_pci_write_device_config_8 +ffffffff818bb770 T virtio_pci_read_queue_size +ffffffff818bb7e0 T virtio_pci_setup_queue +ffffffff818bbac0 T virtio_pci_set_status +ffffffff818bbbf0 T virtio_pci_negotiate_features +ffffffff818bbd30 T virtio_pci_poll_intr +ffffffff818bbda0 T virtio_pci_find_cap +ffffffff818bbf40 T virtio_pci_attach_10 +ffffffff818bc3a0 T virtio_pci_attach_09 +ffffffff818bc4e0 T virtio_pci_adjust_config_region +ffffffff818bc580 T virtio_pci_setup_msix +ffffffff818bc910 T virtio_pci_legacy_intr +ffffffff818bc9b0 T virtio_pci_legacy_intr_mpsafe +ffffffff818bca40 T virtio_pci_free_irqs +ffffffff818bcc80 T virtio_pci_negotiate_features_10 +ffffffff818bceb0 T virtio_pci_msix_establish +ffffffff818bcf80 T virtio_pci_set_msix_queue_vector +ffffffff818bd000 T virtio_pci_set_msix_config_vector +ffffffff818bd040 T virtio_pci_config_intr +ffffffff818bd080 T virtio_pci_shared_queue_intr +ffffffff818bd090 T virtio_pci_queue_intr +ffffffff818be000 T dwiic_pci_match +ffffffff818be030 T dwiic_pci_attach +ffffffff818be350 T dwiic_pci_activate +ffffffff818be3c0 T dwiic_pci_bus_scan +ffffffff818bf000 T bwfm_pci_buscore_read +ffffffff818bf060 T bwfm_pci_buscore_write +ffffffff818bf0d0 T bwfm_pci_buscore_prepare +ffffffff818bf100 T bwfm_pci_buscore_reset +ffffffff818bf2f0 T bwfm_pci_buscore_activate +ffffffff818bf320 T bwfm_pci_preinit +ffffffff818c0130 T bwfm_pci_stop +ffffffff818c01c0 T bwfm_pci_txcheck +ffffffff818c0280 T bwfm_pci_txdata +ffffffff818c05d0 T bwfm_pci_msgbuf_query_dcmd +ffffffff818c0a00 T bwfm_pci_msgbuf_set_dcmd +ffffffff818c0a50 T bwfm_pci_match +ffffffff818c0a80 T bwfm_pci_attach +ffffffff818c0cf0 T bwfm_pci_detach +ffffffff818c0d30 T bwfm_pci_activate +ffffffff818c0ee0 T bwfm_pci_intr +ffffffff818c1140 T bwfm_pci_select_core +ffffffff818c1220 T bwfm_pci_load_microcode +ffffffff818c16b0 T bwfm_pci_dmamem_alloc +ffffffff818c1850 T bwfm_pci_setup_ring +ffffffff818c1a50 T bwfm_pci_intr_enable +ffffffff818c1aa0 T bwfm_pci_hostready +ffffffff818c1b10 T bwfm_pci_fill_rx_rings +ffffffff818c1b60 T bwfm_pci_dmamem_free +ffffffff818c1bd0 T bwfm_pci_cleanup +ffffffff818c2240 T bwfm_pci_send_mb_data +ffffffff818c2360 T bwfm_pci_intmask +ffffffff818c23a0 T bwfm_pci_pktid_avail +ffffffff818c2420 T bwfm_pci_pktid_new +ffffffff818c2570 T bwfm_pci_pktid_free +ffffffff818c2620 T bwfm_pci_fill_rx_buf_ring +ffffffff818c2960 T bwfm_pci_fill_rx_ioctl_ring +ffffffff818c2cc0 T bwfm_pci_ring_write_reserve +ffffffff818c2db0 T bwfm_pci_ring_write_cancel +ffffffff818c2df0 T bwfm_pci_ring_write_commit +ffffffff818c2ed0 T bwfm_pci_ring_write_rptr +ffffffff818c2f50 T bwfm_pci_ring_write_wptr +ffffffff818c2fd0 T bwfm_pci_setup_flowring +ffffffff818c3120 T bwfm_pci_ring_bell +ffffffff818c3160 T bwfm_pci_ring_update_rptr +ffffffff818c3210 T bwfm_pci_ring_update_wptr +ffffffff818c32c0 T bwfm_pci_ring_write_reserve_multi +ffffffff818c33e0 T bwfm_pci_ring_read_avail +ffffffff818c34e0 T bwfm_pci_ring_read_commit +ffffffff818c3570 T bwfm_pci_ring_rx +ffffffff818c3770 T bwfm_pci_msg_rx +ffffffff818c3d50 T bwfm_pci_flowring_delete_cb +ffffffff818c3e00 T bwfm_pci_msgbuf_rxioctl +ffffffff818c3ef0 T bwfm_pci_intr_status +ffffffff818c3f30 T bwfm_pci_intr_ack +ffffffff818c3f70 T bwfm_pci_flowring_lookup +ffffffff818c40e0 T bwfm_pci_flowring_create +ffffffff818c4210 T bwfm_pci_flowring_create_cb +ffffffff818c4550 T bwfm_pci_flowring_delete +ffffffff818c4820 T bwfm_pci_msgbuf_h2d_mb_write +ffffffff818c4a30 T bwfm_pci_handle_mb_data +ffffffff818c4b00 T bwfm_pci_intr_disable +ffffffff818c5000 T ccp_pci_match +ffffffff818c5030 T ccp_pci_attach +ffffffff818c6000 T bnxt_match +ffffffff818c6030 T bnxt_attach +ffffffff818c6be0 T bnxt_dmamem_alloc +ffffffff818c6d70 T bnxt_dmamem_free +ffffffff818c6e00 T bnxt_hwrm_ver_get +ffffffff818c6f50 T bnxt_hwrm_nvm_get_dev_info +ffffffff818c70a0 T bnxt_hwrm_func_drv_rgtr +ffffffff818c71c0 T bnxt_hwrm_func_rgtr_async_events +ffffffff818c72e0 T bnxt_hwrm_func_qcaps +ffffffff818c73c0 T bnxt_admin_intr +ffffffff818c75b0 T bnxt_intr +ffffffff818c7a60 T bnxt_hwrm_func_qcfg +ffffffff818c7b10 T bnxt_hwrm_queue_qportcfg +ffffffff818c7be0 T bnxt_hwrm_func_reset +ffffffff818c7c90 T bnxt_mark_cpr_invalid +ffffffff818c7cf0 T bnxt_hwrm_ring_alloc +ffffffff818c7ea0 T bnxt_cfg_async_cr +ffffffff818c7fa0 T bnxt_write_cp_doorbell +ffffffff818c7fe0 T bnxt_set_cp_ring_aggint +ffffffff818c80c0 T bnxt_ioctl +ffffffff818c8250 T bnxt_start +ffffffff818c8650 T bnxt_watchdog +ffffffff818c8680 T bnxt_media_change +ffffffff818c87d0 T bnxt_media_status +ffffffff818c87f0 T bnxt_refill +ffffffff818c8850 T bnxt_media_autonegotiate +ffffffff818c8940 T bnxt_hwrm_port_phy_qcfg +ffffffff818c8dc0 T bnxt_free_slots +ffffffff818c8e60 T bnxt_hwrm_cmd_hdr_init +ffffffff818c8eb0 T hwrm_send_message +ffffffff818c8f30 T bnxt_queue_up +ffffffff818c9ab0 T bnxt_hwrm_stat_ctx_alloc +ffffffff818c9bb0 T bnxt_write_tx_doorbell +ffffffff818c9c20 T bnxt_write_rx_doorbell +ffffffff818c9ca0 T bnxt_hwrm_ring_grp_alloc +ffffffff818c9da0 T bnxt_rx_fill +ffffffff818c9eb0 T bnxt_hwrm_ring_grp_free +ffffffff818c9f90 T bnxt_hwrm_ring_free +ffffffff818ca080 T bnxt_hwrm_stat_ctx_free +ffffffff818ca170 T bnxt_queue_down +ffffffff818ca890 T bnxt_up +ffffffff818cae20 T bnxt_hwrm_vnic_ctx_alloc +ffffffff818caf00 T bnxt_hwrm_vnic_alloc +ffffffff818cb000 T bnxt_hwrm_vnic_cfg +ffffffff818cb140 T bnxt_hwrm_vnic_cfg_placement +ffffffff818cb210 T bnxt_hwrm_set_filter +ffffffff818cb3a0 T bnxt_hwrm_vnic_rss_cfg +ffffffff818cb480 T bnxt_iff +ffffffff818cb5f0 T bnxt_hwrm_vnic_free +ffffffff818cb6e0 T bnxt_hwrm_vnic_ctx_free +ffffffff818cb7d0 T bnxt_down +ffffffff818cbba0 T bnxt_hwrm_free_filter +ffffffff818cbc80 T bnxt_hwrm_cfa_l2_set_rx_mask +ffffffff818cbd60 T bnxt_rxrinfo +ffffffff818cbeb0 T bnxt_get_sffpage +ffffffff818cc1c0 T bnxt_load_mbuf +ffffffff818cc270 T bnxt_handle_async_event +ffffffff818cc2c0 T bnxt_cpr_next_cmpl +ffffffff818cc330 T bnxt_cpr_commit +ffffffff818cc360 T bnxt_cpr_rollback +ffffffff818cc390 T bnxt_write_cp_doorbell_index +ffffffff818cc410 T bnxt_rx +ffffffff818cc6b0 T bnxt_txeof +ffffffff818cc7e0 T bnxt_get_media_type +ffffffff818ccd40 T bnxt_add_media_type +ffffffff818ccf00 T _hwrm_send_message +ffffffff818cfc20 T bnxt_rx_fill_slots +ffffffff818cfe00 T bnxt_hwrm_err_map +ffffffff818cfe40 T _bnxt_hwrm_set_async_event_bit +ffffffff818d0000 t mcx_match +ffffffff818d0030 t mcx_attach +ffffffff818d0c40 T mcx_rx_fill +ffffffff818d0e90 T mcx_load_mbuf +ffffffff818d0f40 t mcx_dmamem_alloc +ffffffff818d10a0 t mcx_init_wait +ffffffff818d1130 t mcx_enable_hca +ffffffff818d1310 t mcx_issi +ffffffff818d1680 t mcx_pages +ffffffff818d1f60 t mcx_hca_max_caps +ffffffff818d24e0 t mcx_hca_set_caps +ffffffff818d29c0 t mcx_init_hca +ffffffff818d2b90 t mcx_set_driver_version +ffffffff818d2ef0 t mcx_iff +ffffffff818d3330 t mcx_alloc_uar +ffffffff818d3520 t mcx_alloc_pd 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igc_init_mac_ops_generic +ffffffff818fa050 T igc_null_ops_generic +ffffffff818fa080 T igc_config_collision_dist_generic +ffffffff818fa0f0 T igc_rar_set_generic +ffffffff818fa1d0 T igc_write_vfta_generic +ffffffff818fa220 T igc_init_rx_addrs_generic +ffffffff818fa2c0 T igc_check_alt_mac_addr_generic +ffffffff818fa440 T igc_hash_mc_addr_generic +ffffffff818fa4e0 T igc_update_mc_addr_list_generic +ffffffff818fa630 T igc_clear_hw_cntrs_base_generic +ffffffff818faa20 T igc_setup_link_generic +ffffffff818fabb0 T igc_set_fc_watermarks_generic +ffffffff818fac60 T igc_force_mac_fc_generic +ffffffff818fad20 T igc_config_fc_after_link_up_generic +ffffffff818faeb0 T igc_get_speed_and_duplex_copper_generic +ffffffff818faf50 T igc_put_hw_semaphore_generic +ffffffff818fafa0 T igc_get_auto_rd_done_generic +ffffffff818fb1f0 T igc_disable_pcie_master_generic +ffffffff818fc000 T igc_init_nvm_ops_generic +ffffffff818fc080 T igc_null_read_nvm +ffffffff818fc0b0 T igc_null_nvm_generic +ffffffff818fc0e0 T igc_reload_nvm_generic +ffffffff818fc160 T igc_null_write_nvm +ffffffff818fc190 T igc_poll_eerd_eewr_done +ffffffff818fc230 T igc_read_nvm_eerd +ffffffff818fc360 T igc_read_mac_addr_generic +ffffffff818fc440 T igc_validate_nvm_checksum_generic +ffffffff818fd000 T igc_init_phy_ops_generic +ffffffff818fd0f0 T igc_null_set_page +ffffffff818fd120 T igc_null_read_reg +ffffffff818fd150 T igc_null_phy_generic +ffffffff818fd180 T igc_null_lplu_state +ffffffff818fd1b0 T igc_null_write_reg +ffffffff818fd1e0 T igc_check_reset_block_generic +ffffffff818fd240 T igc_get_phy_id +ffffffff818fd2f0 T igc_read_phy_reg_mdic +ffffffff818fd400 T igc_write_phy_reg_mdic +ffffffff818fd500 T igc_phy_setup_autoneg +ffffffff818fd700 T igc_copper_link_autoneg +ffffffff818fd830 T igc_wait_autoneg +ffffffff818fd8f0 T igc_setup_copper_link_generic +ffffffff818fda00 T igc_phy_has_link_generic +ffffffff818fdb10 T igc_check_downshift_generic +ffffffff818fdb40 T igc_phy_hw_reset_generic +ffffffff818fdce0 T igc_power_up_phy_copper +ffffffff818fdd70 T igc_power_down_phy_copper +ffffffff818fde00 T igc_write_phy_reg_gpy +ffffffff818fe000 T igc_write_xmdio_reg +ffffffff818fe100 T igc_read_phy_reg_gpy +ffffffff818fe300 T igc_read_xmdio_reg +ffffffff818fe3f0 T __igc_access_xmdio_reg +ffffffff818ff000 T ngbe_match +ffffffff818ff030 T ngbe_attach +ffffffff818ff540 T ngbe_detach +ffffffff818ff790 T ngbe_allocate_pci_resources +ffffffff818ff890 T ngbe_allocate_queues +ffffffff818ffd90 T ngbe_allocate_isb +ffffffff818ffe20 T ngbe_init_shared_code +ffffffff819000f0 T ngbe_check_flash_load +ffffffff81900390 T ngbe_allocate_msix +ffffffff819005b0 T ngbe_setup_interface +ffffffff819007c0 T ngbe_free_isb +ffffffff819008a0 T ngbe_free_transmit_structures +ffffffff81900920 T ngbe_free_receive_structures +ffffffff819009d0 T ngbe_free_pci_resources +ffffffff81900a60 T ngbe_stop +ffffffff81900fd0 T ngbe_release_hw_control +ffffffff81901050 T ngbe_init +ffffffff81901560 T ngbe_setup_isb +ffffffff819015d0 T ngbe_configure_pb +ffffffff819016b0 T ngbe_iff +ffffffff819018a0 T ngbe_setup_vlan_hw_support +ffffffff81901960 T ngbe_setup_transmit_structures +ffffffff81901a20 T ngbe_initialize_transmit_unit +ffffffff81901da0 T ngbe_setup_receive_structures +ffffffff81901ea0 T ngbe_initialize_receive_unit +ffffffff81902360 T ngbe_get_hw_control +ffffffff819023e0 T ngbe_setup_gpie +ffffffff81902410 T ngbe_configure_ivars +ffffffff81902630 T ngbe_non_sfp_link_config +ffffffff819026e0 T ngbe_enable_intr +ffffffff81902890 t NGBE_WRITE_REG_MASK +ffffffff81902930 T ngbe_ioctl +ffffffff81902b90 T ngbe_rxrinfo +ffffffff81902ce0 T ngbe_disable_intr +ffffffff81902da0 T ngbe_media_change +ffffffff81902e40 T ngbe_media_status +ffffffff81902f50 T ngbe_update_link_status +ffffffff81903180 T ngbe_rxfill +ffffffff819032c0 T ngbe_get_buf +ffffffff819033f0 T ngbe_start +ffffffff819035a0 T ngbe_encap +ffffffff819037c0 T ngbe_disable_pcie_master +ffffffff81903880 T ngbe_reset +ffffffff819038e0 T ngbe_set_rx_drop_en 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ngbe_set_rar +ffffffff81906e70 T ngbe_init_rx_addrs +ffffffff81907030 T ngbe_update_mc_addr_list +ffffffff819071e0 T ngbe_enable_rx +ffffffff81907320 T ngbe_disable_rx +ffffffff81907440 T ngbe_clear_vfta +ffffffff81907540 T ngbe_init_uta_tables +ffffffff819075c0 T ngbe_fc_enable +ffffffff81907860 T ngbe_setup_fc +ffffffff81907940 T ngbe_check_mac_link +ffffffff81907ab0 T ngbe_set_rxpba +ffffffff81907b50 T ngbe_eepromcheck_cap +ffffffff81907c10 T ngbe_phy_led_oem_chk +ffffffff81907d00 T ngbe_set_fw_drv_ver +ffffffff81907e20 T ngbe_init_thermal_sensor_thresh +ffffffff81907ee0 T ngbe_validate_mac_addr +ffffffff81907f40 T ngbe_fc_autoneg +ffffffff819080d0 T ngbe_fc_autoneg_copper +ffffffff819081e0 T ngbe_negotiate_fc +ffffffff81908290 T ngbe_fmgr_cmd_op +ffffffff81908370 T ngbe_flash_read_dword +ffffffff81908460 T ngbe_calculate_checksum +ffffffff81908520 T ngbe_check_internal_phy_id +ffffffff81908660 T ngbe_gphy_wait_mdio_access_on +ffffffff819086e0 T ngbe_check_mng_access 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drm_atomic_get_new_connector_for_encoder +ffffffff81911ff0 T drm_atomic_get_old_crtc_for_encoder +ffffffff81912090 T drm_atomic_get_new_crtc_for_encoder +ffffffff81912130 T drm_atomic_get_connector_state +ffffffff81912340 T drm_atomic_get_bridge_state +ffffffff81912350 T drm_atomic_get_old_bridge_state +ffffffff819123b0 T drm_atomic_get_new_bridge_state +ffffffff81912410 T drm_atomic_add_encoder_bridges +ffffffff819124d0 T drm_atomic_add_affected_connectors +ffffffff819125f0 T drm_atomic_add_affected_planes +ffffffff81912710 T drm_atomic_check_only +ffffffff819131d0 T drm_atomic_commit +ffffffff819132a0 T drm_atomic_print_new_state +ffffffff81913490 T drm_atomic_nonblocking_commit +ffffffff81913530 T __drm_atomic_helper_disable_plane +ffffffff819135b0 T __drm_atomic_helper_set_config +ffffffff81913920 t drm_atomic_plane_print_state +ffffffff81913b40 t drm_atomic_crtc_print_state +ffffffff81913da0 t drm_atomic_connector_print_state +ffffffff81913ed0 T drm_state_dump +ffffffff81915000 T drm_atomic_helper_check_modeset +ffffffff81915cd0 t handle_conflicting_encoders +ffffffff81915fd0 t mode_fixup +ffffffff81916310 T drm_atomic_helper_check_wb_encoder_state +ffffffff81916370 T drm_atomic_helper_check_plane_state +ffffffff81916720 T drm_atomic_helper_check_crtc_primary_plane +ffffffff819167d0 T drm_atomic_helper_check_planes +ffffffff81916a80 T drm_atomic_helper_check +ffffffff81916b30 T drm_atomic_helper_async_check +ffffffff81916e00 T drm_atomic_helper_update_legacy_modeset_state +ffffffff81917070 T drm_atomic_helper_calc_timestamping_constants +ffffffff81917110 T drm_atomic_helper_commit_modeset_disables +ffffffff81917770 T drm_atomic_helper_commit_modeset_enables +ffffffff81917a40 T drm_atomic_helper_wait_for_fences +ffffffff81917c20 T drm_atomic_helper_wait_for_vblanks +ffffffff81917f60 T drm_atomic_helper_wait_for_flip_done +ffffffff81918120 T drm_atomic_helper_commit_tail +ffffffff81918290 T drm_atomic_helper_commit_planes +ffffffff81918600 T drm_atomic_helper_fake_vblank +ffffffff819186e0 T drm_atomic_helper_commit_hw_done +ffffffff819188b0 T drm_atomic_helper_cleanup_planes +ffffffff81918950 T drm_atomic_helper_commit_tail_rpm +ffffffff81918ac0 t try_wait_for_completion +ffffffff81918b20 T drm_atomic_helper_async_commit +ffffffff81918db0 T drm_atomic_helper_commit +ffffffff81919030 T drm_atomic_helper_prepare_planes +ffffffff819192d0 T drm_atomic_helper_unprepare_planes +ffffffff819193c0 T drm_atomic_helper_setup_commit +ffffffff81919aa0 t commit_work +ffffffff81919ac0 T drm_atomic_helper_swap_state +ffffffff8191a110 t commit_tail +ffffffff8191a330 t release_crtc_commit +ffffffff8191a370 t crtc_or_fake_commit +ffffffff8191a470 T drm_atomic_helper_wait_for_dependencies +ffffffff8191a670 T drm_atomic_helper_commit_cleanup_done +ffffffff8191a8d0 T drm_atomic_helper_commit_planes_on_crtc +ffffffff8191ab50 T drm_atomic_helper_disable_planes_on_crtc +ffffffff8191acb0 T drm_atomic_helper_update_plane +ffffffff8191ade0 T drm_atomic_helper_disable_plane +ffffffff8191aea0 T drm_atomic_helper_set_config +ffffffff8191af50 T drm_atomic_helper_disable_all +ffffffff8191b100 T drm_atomic_helper_shutdown +ffffffff8191b250 T drm_atomic_helper_duplicate_state +ffffffff8191b3a0 T drm_atomic_helper_suspend +ffffffff8191b4f0 T drm_atomic_helper_commit_duplicated_state +ffffffff8191b630 T drm_atomic_helper_resume +ffffffff8191b760 T drm_atomic_helper_page_flip +ffffffff8191b820 t page_flip_common +ffffffff8191b920 T drm_atomic_helper_page_flip_target +ffffffff8191ba40 T drm_atomic_helper_bridge_propagate_bus_fmt +ffffffff8191bab0 t set_best_encoder +ffffffff8191c000 T __drm_atomic_helper_crtc_state_reset +ffffffff8191c030 T __drm_atomic_helper_crtc_reset +ffffffff8191c090 T drm_atomic_helper_crtc_reset +ffffffff8191c130 T __drm_atomic_helper_crtc_duplicate_state +ffffffff8191c200 T drm_atomic_helper_crtc_duplicate_state +ffffffff8191c2a0 T __drm_atomic_helper_crtc_destroy_state +ffffffff8191c360 T drm_atomic_helper_crtc_destroy_state +ffffffff8191c390 T __drm_atomic_helper_plane_state_reset +ffffffff8191c460 T __drm_atomic_helper_plane_reset +ffffffff8191c4c0 T drm_atomic_helper_plane_reset +ffffffff8191c5a0 T __drm_atomic_helper_plane_destroy_state +ffffffff8191c610 T __drm_atomic_helper_plane_duplicate_state +ffffffff8191c690 T drm_atomic_helper_plane_duplicate_state +ffffffff8191c770 T drm_atomic_helper_plane_destroy_state +ffffffff8191c7f0 T __drm_atomic_helper_connector_state_reset +ffffffff8191c820 T __drm_atomic_helper_connector_reset +ffffffff8191c860 T drm_atomic_helper_connector_reset +ffffffff8191c930 T __drm_atomic_helper_connector_destroy_state +ffffffff8191c990 T drm_atomic_helper_connector_tv_margins_reset +ffffffff8191c9f0 T drm_atomic_helper_connector_tv_reset +ffffffff8191cbf0 T drm_atomic_helper_connector_tv_check +ffffffff8191ccd0 T __drm_atomic_helper_connector_duplicate_state +ffffffff8191cd60 T drm_atomic_helper_connector_duplicate_state +ffffffff8191ce40 T drm_atomic_helper_connector_destroy_state +ffffffff8191ceb0 T __drm_atomic_helper_private_obj_duplicate_state +ffffffff8191cef0 T __drm_atomic_helper_bridge_duplicate_state +ffffffff8191cf30 T drm_atomic_helper_bridge_duplicate_state +ffffffff8191cfe0 T drm_atomic_helper_bridge_destroy_state +ffffffff8191d000 T __drm_atomic_helper_bridge_reset +ffffffff8191d050 T drm_atomic_helper_bridge_reset +ffffffff8191e000 T drm_atomic_set_mode_for_crtc +ffffffff8191e220 T drm_atomic_set_mode_prop_for_crtc +ffffffff8191e4b0 T drm_atomic_set_crtc_for_plane +ffffffff8191e620 T drm_atomic_set_fb_for_plane +ffffffff8191e700 T drm_atomic_set_crtc_for_connector +ffffffff8191e860 T drm_atomic_get_property +ffffffff8191efc0 T drm_atomic_connector_commit_dpms +ffffffff8191f100 T drm_atomic_set_property +ffffffff8191fc00 T drm_mode_atomic_ioctl +ffffffff819200a0 t prepare_signaling +ffffffff81920530 t complete_signaling +ffffffff81920700 t drm_atomic_replace_property_blob_from_id +ffffffff81920870 t drm_atomic_set_writeback_fb_for_connector +ffffffff819208e0 t set_out_fence_for_connector +ffffffff81921000 T drm_is_current_master +ffffffff81921060 T drm_getmagic +ffffffff81921130 T drm_authmagic +ffffffff819211f0 T drm_master_create +ffffffff81921290 T drm_setmaster_ioctl +ffffffff81921350 t drm_new_set_master +ffffffff819214e0 T drm_dropmaster_ioctl +ffffffff819215c0 t drm_drop_master +ffffffff81921670 T drm_master_open +ffffffff81921720 T drm_master_get +ffffffff81921750 T drm_master_release +ffffffff81921830 T drm_master_put +ffffffff819218c0 T drm_file_get_master +ffffffff81921920 T drm_master_internal_acquire +ffffffff81921990 T drm_master_internal_release +ffffffff81922000 T drm_plane_create_alpha_property +ffffffff819220a0 T drm_plane_create_rotation_property +ffffffff819221e0 T drm_rotation_simplify +ffffffff81922250 T drm_plane_create_zpos_property +ffffffff81922310 T drm_plane_create_zpos_immutable_property +ffffffff819223c0 T drm_atomic_normalize_zpos +ffffffff819226b0 T drm_plane_create_blend_mode_property +ffffffff81922850 t drm_atomic_state_zpos_cmp +ffffffff81923000 T drm_bridge_add +ffffffff81923070 T devm_drm_bridge_add +ffffffff81923110 T drm_bridge_remove +ffffffff81923170 T drm_bridge_attach +ffffffff81923330 T drm_bridge_detach +ffffffff81923420 T drm_bridge_chain_mode_fixup +ffffffff819234c0 T drm_bridge_chain_mode_valid +ffffffff81923560 T drm_bridge_chain_mode_set +ffffffff819235f0 T drm_atomic_bridge_chain_disable +ffffffff819236f0 T drm_atomic_bridge_chain_post_disable +ffffffff81923920 T drm_atomic_bridge_chain_pre_enable +ffffffff81923b60 T drm_atomic_bridge_chain_enable +ffffffff81923c70 T drm_atomic_bridge_chain_check +ffffffff81924000 T drm_bridge_detect +ffffffff81924060 T drm_bridge_get_modes +ffffffff819240c0 T drm_bridge_get_edid +ffffffff81924120 T drm_bridge_hpd_enable +ffffffff819241f0 T drm_bridge_hpd_disable +ffffffff81924290 T drm_bridge_hpd_notify +ffffffff819242f0 t drm_bridge_atomic_duplicate_priv_state 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drm_crtc_enable_color_mgmt +ffffffff8192c1b0 T drm_mode_crtc_set_gamma_size +ffffffff8192c2d0 T drm_mode_gamma_set_ioctl +ffffffff8192c7b0 T drm_mode_gamma_get_ioctl +ffffffff8192c8f0 T drm_get_color_encoding_name +ffffffff8192c960 T drm_get_color_range_name +ffffffff8192c9d0 T drm_plane_create_color_properties +ffffffff8192cc30 T drm_color_lut_check +ffffffff8192d000 T drm_connector_ida_init +ffffffff8192d110 T drm_connector_ida_destroy +ffffffff8192d220 T drm_get_connector_type_name +ffffffff8192d260 T drm_connector_free_work_fn +ffffffff8192d320 T drm_connector_init +ffffffff8192d3a0 t __drm_connector_init +ffffffff8192d710 T drm_connector_init_with_ddc +ffffffff8192d7a0 T drmm_connector_init +ffffffff8192d860 t drm_connector_cleanup_action +ffffffff8192d880 T drm_connector_attach_edid_property +ffffffff8192d8a0 T drm_connector_attach_encoder +ffffffff8192d920 T drm_connector_has_possible_encoder +ffffffff8192d960 T drm_connector_cleanup +ffffffff8192dca0 T drm_connector_unregister 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+ffffffff8192eba0 T drm_mode_create_dvi_i_properties +ffffffff8192ec40 T drm_connector_attach_dp_subconnector_property +ffffffff8192ecb0 T drm_connector_attach_content_type_property +ffffffff8192ed50 T drm_mode_create_content_type_property +ffffffff8192edd0 T drm_connector_attach_tv_margin_properties +ffffffff8192ee40 T drm_mode_create_tv_margin_properties +ffffffff8192ef60 T drm_mode_create_tv_properties_legacy +ffffffff8192f1b0 T drm_mode_create_tv_properties +ffffffff8192f390 T drm_mode_create_scaling_mode_property +ffffffff8192f400 T drm_connector_attach_vrr_capable_property +ffffffff8192f490 T drm_connector_attach_scaling_mode_property +ffffffff8192f660 T drm_mode_create_aspect_ratio_property +ffffffff8192f6e0 T drm_mode_create_hdmi_colorspace_property +ffffffff8192f700 t drm_mode_create_colorspace_property +ffffffff8192f830 T drm_mode_create_dp_colorspace_property +ffffffff8192f860 T drm_mode_create_suggested_offset_properties +ffffffff8192f930 T drm_connector_set_path_property +ffffffff8192f990 T drm_connector_set_tile_property +ffffffff8192fae0 T drm_connector_set_link_status_property +ffffffff8192fb30 T drm_connector_attach_max_bpc_property +ffffffff8192fbf0 T drm_connector_attach_hdr_output_metadata_property +ffffffff8192fc40 T drm_connector_attach_colorspace_property +ffffffff8192fc90 T drm_connector_atomic_hdr_metadata_equal +ffffffff8192fd00 T drm_connector_set_vrr_capable_property +ffffffff8192fd50 T drm_connector_set_panel_orientation +ffffffff8192fe20 T drm_connector_set_panel_orientation_with_quirk +ffffffff8192ff00 T drm_connector_set_orientation_from_panel +ffffffff8192fff0 T drm_connector_create_privacy_screen_properties +ffffffff81930090 T drm_connector_attach_privacy_screen_properties +ffffffff81930100 T drm_connector_attach_privacy_screen_provider +ffffffff81930210 t drm_connector_privacy_screen_notifier +ffffffff819302b0 T drm_connector_update_privacy_screen +ffffffff81930320 T drm_connector_set_obj_prop +ffffffff81930400 T drm_connector_property_set_ioctl +ffffffff81930460 T drm_mode_getconnector +ffffffff81930960 T drm_connector_find_by_fwnode +ffffffff81930a10 T drm_connector_oob_hotplug_event +ffffffff81930b00 T drm_mode_get_tile_group +ffffffff81930bd0 T drm_mode_create_tile_group +ffffffff81930ca0 t drm_connector_free +ffffffff81930ce0 t kasprintf +ffffffff81931000 T drm_crtc_from_index +ffffffff81931060 T drm_crtc_force_disable +ffffffff819311a0 T drm_mode_set_config_internal +ffffffff81931220 T drm_crtc_register_all +ffffffff819312a0 T drm_crtc_unregister_all +ffffffff81931310 T drm_crtc_create_fence +ffffffff819313a0 T drm_crtc_init_with_planes +ffffffff81931470 t __drm_crtc_init_with_planes +ffffffff81931870 T drmm_crtc_init_with_planes +ffffffff81931970 T __drmm_crtc_alloc_with_planes +ffffffff81931ae0 T drm_crtc_cleanup +ffffffff81931c00 T drm_mode_getcrtc +ffffffff81931da0 t __drm_mode_set_config_internal +ffffffff81931f50 T drm_crtc_check_viewport +ffffffff81932000 T drm_mode_setcrtc +ffffffff81932740 T drm_mode_crtc_set_obj_prop +ffffffff819327c0 T drm_crtc_create_scaling_filter_property +ffffffff81932830 t drm_crtc_fence_get_driver_name +ffffffff819328b0 t drm_crtc_fence_get_timeline_name +ffffffff81932920 t kasprintf +ffffffff819329f0 t drmm_crtc_init_with_planes_cleanup +ffffffff81933000 T drm_helper_encoder_in_use +ffffffff81933180 T drm_helper_crtc_in_use +ffffffff819332b0 T drm_helper_disable_unused_functions +ffffffff81933330 t __drm_helper_disable_unused_functions +ffffffff81933450 T drm_crtc_helper_set_mode +ffffffff819338f0 T drm_crtc_helper_atomic_check +ffffffff81933940 T drm_connector_get_single_encoder +ffffffff81933a20 T drm_crtc_helper_set_config +ffffffff81934660 T drm_helper_connector_dpms +ffffffff81934930 T drm_helper_resume_force_mode +ffffffff81934c30 T drm_helper_force_disable_all +ffffffff81935000 T drm_atomic_helper_check_plane_damage +ffffffff819350a0 T drm_atomic_helper_dirtyfb +ffffffff81935350 T drm_atomic_helper_damage_iter_init +ffffffff819354a0 T drm_atomic_helper_damage_iter_next +ffffffff81935540 T drm_atomic_helper_damage_merged +ffffffff81936000 T displayid_iter_edid_begin +ffffffff81936050 T __displayid_iter_next +ffffffff81936300 T displayid_iter_end +ffffffff81936350 T displayid_version +ffffffff81936380 T displayid_primary_use +ffffffff81937000 T drm_mode_create_dumb +ffffffff819370e0 T drm_mode_create_dumb_ioctl +ffffffff819371c0 T drm_mode_mmap_dumb_ioctl +ffffffff81937230 T drm_mode_destroy_dumb +ffffffff81937280 T drm_mode_destroy_dumb_ioctl +ffffffff81938000 T drm_edid_header_is_valid +ffffffff81938080 T drm_edid_are_equal +ffffffff819380f0 T drm_edid_block_valid +ffffffff81938300 t edid_block_check +ffffffff81938430 t edid_block_status_print +ffffffff81938520 T drm_edid_is_valid +ffffffff819385a0 T drm_edid_valid +ffffffff819386d0 t drm_edid_block_count +ffffffff81938810 T drm_edid_override_show +ffffffff81938860 T drm_edid_override_set +ffffffff81938a00 T drm_edid_alloc +ffffffff81938ac0 T drm_edid_free +ffffffff81938b20 T drm_edid_override_reset +ffffffff81938be0 T drm_edid_override_connector_update +ffffffff81938cb0 t drm_edid_override_get +ffffffff81938da0 T drm_edid_connector_update +ffffffff819391f0 T drm_edid_connector_add_modes +ffffffff81939310 T drm_do_get_edid +ffffffff81939330 t _drm_do_get_edid +ffffffff81939750 T drm_edid_raw +ffffffff819397e0 T drm_edid_dup +ffffffff819398b0 T drm_probe_ddc +ffffffff819399b0 t drm_do_probe_ddc_edid +ffffffff81939b00 T drm_get_edid +ffffffff81939c70 T drm_connector_update_edid_property +ffffffff81939cd0 T drm_edid_read_custom +ffffffff81939dc0 T drm_edid_read_ddc +ffffffff81939ef0 T drm_edid_read +ffffffff81939f70 T drm_edid_get_panel_id +ffffffff8193a0f0 t edid_block_read +ffffffff8193a360 T drm_get_edid_switcheroo +ffffffff8193a3b0 T drm_edid_read_switcheroo +ffffffff8193a400 T drm_edid_duplicate +ffffffff8193a480 T drm_mode_find_dmt +ffffffff8193a5a0 T drm_mode_fixup_1366x768 +ffffffff8193a5f0 T drm_find_edid_extension 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drm_i2c_encoder_commit +ffffffff819440a0 T drm_i2c_encoder_mode_set +ffffffff819440c0 T drm_i2c_encoder_detect +ffffffff819440e0 T drm_i2c_encoder_save +ffffffff81944100 T drm_i2c_encoder_restore +ffffffff81945000 T drm_exec_init +ffffffff81945080 T drm_exec_fini +ffffffff81945100 t drm_exec_unlock_all +ffffffff81945270 T drm_exec_cleanup +ffffffff81945300 T drm_exec_lock_obj +ffffffff81945590 t drm_exec_obj_locked +ffffffff81945660 t dma_resv_unlock +ffffffff81945700 T drm_exec_unlock_obj +ffffffff81945890 T drm_exec_prepare_obj +ffffffff81945910 T drm_exec_prepare_array +ffffffff819459c0 t dma_resv_lock_slow_interruptible +ffffffff81945af0 t dma_resv_lock_slow +ffffffff81945bd0 t __ww_mutex_lock +ffffffff81946000 T drm_fb_helper_debug_enter +ffffffff81946100 T drm_fb_helper_debug_leave +ffffffff81946270 T drm_fb_helper_restore_fbdev_mode_unlocked +ffffffff81946310 t __drm_fb_helper_restore_fbdev_mode_unlocked +ffffffff819463c0 T drm_fb_helper_blank +ffffffff819464b0 T drm_fb_helper_prepare +ffffffff819465a0 t drm_fb_helper_resume_worker +ffffffff819465d0 t drm_fb_helper_damage_work +ffffffff81946730 T drm_fb_helper_unprepare +ffffffff81946760 T drm_fb_helper_init +ffffffff819467d0 T drm_fb_helper_alloc_info +ffffffff81946830 T drm_fb_helper_release_info +ffffffff81946880 T drm_fb_helper_unregister_info +ffffffff819468b0 T drm_fb_helper_fini +ffffffff819469b0 T drm_fb_helper_set_suspend +ffffffff819469e0 T drm_fb_helper_set_suspend_unlocked +ffffffff81946a10 T drm_fb_helper_set_par +ffffffff81946ac0 T drm_fb_helper_pan_display +ffffffff81946b90 T drm_fb_helper_fill_info +ffffffff81946c50 T drm_fb_helper_initial_config +ffffffff81946c80 t __drm_fb_helper_initial_config_and_unlock +ffffffff819472c0 T drm_fb_helper_hotplug_event +ffffffff819473f0 t drm_setup_crtcs_fb +ffffffff81947530 T drm_fb_helper_lastclose +ffffffff819475e0 T drm_fb_helper_output_poll_changed +ffffffff81948000 T drm_fbdev_dma_setup +ffffffff81948190 t drm_fbdev_dma_helper_fb_probe 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T drm_fb_release +ffffffff819515f0 T drm_framebuffer_free +ffffffff81951630 T drm_framebuffer_init +ffffffff81951790 T drm_framebuffer_unregister_private +ffffffff819517d0 T drm_framebuffer_cleanup +ffffffff81951830 T drm_framebuffer_remove +ffffffff81951cc0 T drm_framebuffer_plane_width +ffffffff81951d10 T drm_framebuffer_plane_height +ffffffff81951d60 T drm_framebuffer_print_info +ffffffff81953000 T drm_ref +ffffffff81953030 T drm_unref +ffffffff819530b0 T drm_fault +ffffffff81953280 T drm_flush +ffffffff819532b0 T udv_attach_drm +ffffffff819534a0 T drm_gem_init +ffffffff81953550 t drm_gem_init_release +ffffffff81953570 T drm_gem_object_init +ffffffff819536f0 T drm_gem_private_object_init +ffffffff81953810 T drm_gem_private_object_fini +ffffffff81953870 T drm_gem_handle_delete +ffffffff81953960 t drm_gem_object_release_handle +ffffffff819539f0 T drm_gem_dumb_map_offset +ffffffff81953b20 T drm_gem_object_lookup +ffffffff81953b90 T drm_gem_create_mmap_offset +ffffffff81953bc0 T drm_gem_handle_create_tail +ffffffff81953d30 t drm_gem_object_handle_put_unlocked +ffffffff81953e80 T drm_gem_handle_create +ffffffff81953ed0 T drm_gem_free_mmap_offset +ffffffff81953f00 T drm_gem_create_mmap_offset_size +ffffffff81953f30 T drm_gem_get_pages +ffffffff81953f80 T drm_gem_put_pages +ffffffff81953fb0 T drm_gem_objects_lookup +ffffffff81954110 T drm_gem_dma_resv_wait +ffffffff81954240 T drm_gem_close_ioctl +ffffffff81954290 T drm_gem_flink_ioctl +ffffffff81954400 T drm_gem_open_ioctl +ffffffff81954530 T drm_gem_open +ffffffff81954560 T drm_gem_release +ffffffff819545a0 T drm_gem_object_release +ffffffff819546f0 T drm_gem_lru_remove +ffffffff819547d0 T drm_gem_object_free +ffffffff81954820 T drm_gem_mmap_obj +ffffffff81954920 T drm_gem_mmap +ffffffff81954b90 T drm_gem_print_info +ffffffff81954cb0 T drm_gem_pin +ffffffff81954cf0 T drm_gem_unpin +ffffffff81954d30 T drm_gem_vmap +ffffffff81954d90 T drm_gem_vunmap +ffffffff81954e00 T drm_gem_vmap_unlocked +ffffffff81954ff0 T drm_gem_vunmap_unlocked +ffffffff819551b0 T drm_gem_lock_reservations +ffffffff819555a0 T drm_gem_unlock_reservations +ffffffff81955690 T drm_gem_lru_init +ffffffff819556d0 T drm_gem_lru_move_tail_locked +ffffffff819557d0 T drm_gem_lru_move_tail +ffffffff819558c0 T drm_gem_lru_scan +ffffffff81955ca0 T drm_gem_evict +ffffffff81956000 T drm_gem_plane_helper_prepare_fb +ffffffff81957000 T drm_gem_dma_create +ffffffff81957220 T drm_gem_dma_free_object +ffffffff819572c0 T drm_gem_dma_dumb_create_internal +ffffffff81957400 T drm_gem_dma_dumb_create +ffffffff81957440 T drm_gem_dma_fault +ffffffff819575e0 T drm_gem_dma_get_sg_table +ffffffff81957610 T drm_gem_dma_prime_import_sg_table +ffffffff81957640 T drm_gem_dma_vmap +ffffffff81958000 T drm_gem_fb_destroy +ffffffff819580c0 T drm_gem_fb_create_handle +ffffffff819580e0 T drm_gem_fb_create +ffffffff81958220 T drm_gem_fb_get_obj +ffffffff81959000 T drm_ht_create +ffffffff81959080 T drm_ht_verbose_list +ffffffff81959140 T drm_ht_insert_item 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schedule_timeout_uninterruptible +ffffffff8195b3e0 T wake_up_process +ffffffff8195b460 T autoremove_wake_function +ffffffff8195b510 T prepare_to_wait +ffffffff8195b600 T finish_wait +ffffffff8195b6b0 T flush_workqueue +ffffffff8195b6f0 T flush_work +ffffffff8195b740 T flush_delayed_work +ffffffff8195b7e0 T kthread_func +ffffffff8195b820 T kthread_run +ffffffff8195b900 T kthread_create_worker +ffffffff8195b9c0 T kthread_destroy_worker +ffffffff8195ba00 T kthread_init_work +ffffffff8195ba20 T kthread_queue_work +ffffffff8195ba60 T kthread_cancel_work_sync +ffffffff8195baa0 T kthread_flush_work +ffffffff8195bae0 T kthread_flush_worker +ffffffff8195bb20 T kthread_lookup +ffffffff8195bba0 T kthread_should_park +ffffffff8195bc20 T kthread_parkme +ffffffff8195bce0 T kthread_park +ffffffff8195bde0 T kthread_unpark +ffffffff8195be40 T kthread_should_stop +ffffffff8195bec0 T kthread_stop +ffffffff8195c020 T dmi_match +ffffffff8195c0d0 T dmi_first_match +ffffffff8195c1c0 T dmi_get_system_info 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clear_and_wake_up_bit +ffffffff819627e0 T bit_waitqueue +ffffffff81962810 T __var_waitqueue +ffffffff81962840 T drm_linux_init +ffffffff819629b0 T drm_linux_exit +ffffffff81962a10 T pci_resize_resource +ffffffff81962b60 T register_shrinker +ffffffff81962bb0 T unregister_shrinker +ffffffff81962c10 T drmbackoff +ffffffff81962ca0 T bitmap_zalloc +ffffffff81962cd0 T bitmap_free +ffffffff81962cf0 T atomic_dec_and_mutex_lock +ffffffff81962d70 T interval_tree_iter_first +ffffffff81962e20 T interval_tree_remove +ffffffff81962e40 T interval_tree_insert +ffffffff81962eb0 T syncfile_read +ffffffff81962ee0 T syncfile_write +ffffffff81962f10 T syncfile_ioctl +ffffffff81962f40 T syncfile_kqfilter +ffffffff81962f70 T syncfile_stat +ffffffff81963020 T syncfile_close +ffffffff819630c0 T syncfile_seek +ffffffff81963140 T fd_install +ffffffff81963210 T fput +ffffffff81963260 T get_unused_fd_flags +ffffffff81963370 T put_unused_fd +ffffffff81963400 T sync_file_get_fence +ffffffff819634b0 T sync_file_create +ffffffff81963540 T drm_firmware_drivers_only +ffffffff81963570 T memremap +ffffffff819635c0 T memunmap +ffffffff819635e0 T dma_tag_lookup +ffffffff81963650 T dma_alloc_coherent +ffffffff81963740 T dma_free_coherent +ffffffff81963870 T dma_get_sgtable +ffffffff81963940 T dma_map_resource +ffffffff81963a60 T component_add +ffffffff81963ad0 T component_add_typed +ffffffff81963b40 T component_bind_all +ffffffff81963bd0 T component_master_add_with_match +ffffffff81963c70 t dma_fence_stub_get_name +ffffffff81963ca0 t dma_fence_array_cb_func +ffffffff81963d20 t dma_fence_chain_cb +ffffffff81963de0 t dma_fence_chain_timo +ffffffff81964000 T drmm_kzalloc +ffffffff81964100 T drmm_kcalloc +ffffffff81964210 T drmm_kstrdup +ffffffff81964340 T drmm_kfree +ffffffff81964440 T drmm_add_action +ffffffff81964500 T drmm_add_action_or_reset +ffffffff819645d0 T drm_managed_release +ffffffff81964690 T drmm_add_final_kfree +ffffffff81965000 T mipi_dsi_attach +ffffffff81965050 T mipi_dsi_detach +ffffffff819650a0 T devm_mipi_dsi_attach +ffffffff81965110 T mipi_dsi_packet_format_is_short +ffffffff81965150 T mipi_dsi_packet_format_is_long +ffffffff81965190 T mipi_dsi_create_packet +ffffffff819652a0 T mipi_dsi_shutdown_peripheral +ffffffff81965350 T mipi_dsi_turn_on_peripheral +ffffffff81965400 T mipi_dsi_set_maximum_return_packet_size +ffffffff819654b0 T mipi_dsi_compression_mode +ffffffff81965560 T mipi_dsi_picture_parameter_set +ffffffff81965610 T mipi_dsi_generic_write +ffffffff819656d0 T mipi_dsi_generic_read +ffffffff81965780 T mipi_dsi_dcs_write_buffer +ffffffff81965840 T mipi_dsi_dcs_write +ffffffff81965990 T mipi_dsi_dcs_read +ffffffff81965a30 T mipi_dsi_dcs_nop +ffffffff81965ae0 T mipi_dsi_dcs_soft_reset +ffffffff81965b90 T mipi_dsi_dcs_get_power_mode +ffffffff81965c50 T mipi_dsi_dcs_get_pixel_format +ffffffff81965d10 T mipi_dsi_dcs_enter_sleep_mode +ffffffff81965dc0 T mipi_dsi_dcs_exit_sleep_mode +ffffffff81965e70 T mipi_dsi_dcs_set_display_off +ffffffff81965f20 T mipi_dsi_dcs_set_display_on +ffffffff81965fd0 T mipi_dsi_dcs_set_column_address +ffffffff81966090 T mipi_dsi_dcs_set_page_address +ffffffff81966150 T mipi_dsi_dcs_set_tear_off +ffffffff81966200 T mipi_dsi_dcs_set_tear_on +ffffffff819662b0 T mipi_dsi_dcs_set_pixel_format +ffffffff81967000 T __drm_mm_interval_first +ffffffff819670c0 T drm_mm_reserve_node +ffffffff81967340 t add_hole +ffffffff819674a0 T drm_mm_insert_node_in_range +ffffffff81967a90 T drm_mm_remove_node +ffffffff81967bc0 T drm_mm_replace_node +ffffffff81967da0 T drm_mm_scan_init_with_range +ffffffff81967e30 T drm_mm_scan_add_block +ffffffff81967fa0 T drm_mm_scan_remove_block +ffffffff81968020 T drm_mm_scan_color_evict +ffffffff81968100 T drm_mm_init +ffffffff819681b0 T drm_mm_takedown +ffffffff819681f0 T drm_mm_print +ffffffff81969000 T drm_modeset_register_all +ffffffff819690a0 T drm_modeset_unregister_all +ffffffff819690e0 T drm_mode_getresources +ffffffff81969390 T drm_mode_config_reset +ffffffff819694f0 T drmm_mode_config_init +ffffffff81969b70 T drm_mode_config_cleanup +ffffffff81969e90 t drm_mode_config_init_release +ffffffff81969ea0 T drm_mode_config_validate +ffffffff8196b000 T __drm_mode_object_add +ffffffff8196b100 T drm_mode_object_add +ffffffff8196b1e0 T drm_mode_object_register +ffffffff8196b230 T drm_mode_object_unregister +ffffffff8196b2d0 T drm_mode_object_lease_required +ffffffff8196b320 T __drm_mode_object_find +ffffffff8196b3d0 T drm_mode_object_find +ffffffff8196b480 T drm_mode_object_put +ffffffff8196b500 T drm_mode_object_get +ffffffff8196b560 T drm_object_attach_property +ffffffff8196b670 T drm_object_property_set_value +ffffffff8196b750 T drm_object_property_get_value +ffffffff8196b7e0 t __drm_object_property_get_value +ffffffff8196b8c0 T drm_object_property_get_default_value +ffffffff8196b990 T drm_mode_object_get_properties +ffffffff8196bad0 T drm_mode_obj_get_properties_ioctl +ffffffff8196bd20 T drm_mode_obj_find_prop_id +ffffffff8196bd80 T drm_mode_obj_set_property_ioctl +ffffffff8196d000 T drm_mode_debug_printmodeline +ffffffff8196d140 T drm_mode_vrefresh +ffffffff8196d1e0 T drm_mode_create +ffffffff8196d200 T drm_mode_destroy +ffffffff8196d240 T drm_mode_probed_add +ffffffff8196d2e0 T drm_analog_tv_mode +ffffffff8196db80 T drm_cvt_mode +ffffffff8196e000 T drm_mode_set_name +ffffffff8196e050 T drm_gtf_mode_complex +ffffffff8196e350 T drm_gtf_mode +ffffffff8196e3a0 T drm_mode_get_hv_timing +ffffffff8196e3f0 T drm_mode_init +ffffffff8196e4c0 T drm_mode_set_crtcinfo +ffffffff8196e680 T drm_mode_copy +ffffffff8196e6e0 T drm_mode_duplicate +ffffffff8196e760 T drm_mode_match +ffffffff8196e900 T drm_mode_equal +ffffffff8196e920 T drm_mode_equal_no_clocks +ffffffff8196e940 T drm_mode_equal_no_clocks_no_stereo +ffffffff8196ea00 T drm_mode_validate_driver +ffffffff8196eaf0 T drm_mode_validate_size +ffffffff8196eb40 T drm_mode_validate_ycbcr420 +ffffffff8196ebb0 T drm_mode_is_420_only +ffffffff8196ec00 T drm_get_mode_status_name +ffffffff8196ec80 T drm_mode_prune_invalid +ffffffff8196ef10 T drm_mode_sort +ffffffff8196ef40 t drm_mode_compare +ffffffff8196f0e0 T drm_connector_list_update +ffffffff8196f2b0 T drm_mode_parse_command_line_for_connector +ffffffff8196f2e0 T drm_mode_create_from_cmdline_mode +ffffffff8196f4a0 T drm_mode_convert_to_umode +ffffffff8196f640 T drm_mode_convert_umode +ffffffff8196f860 T drm_mode_is_420_also +ffffffff8196f8b0 T drm_mode_is_420 +ffffffff81970000 T drm_helper_move_panel_connectors_to_head +ffffffff819700f0 T drm_helper_mode_fill_fb_struct +ffffffff819701b0 T drm_crtc_init +ffffffff81970280 T drm_mode_config_helper_suspend +ffffffff81970310 T drm_mode_config_helper_resume +ffffffff81971000 T drm_modeset_lock_all +ffffffff81971290 T drm_modeset_acquire_init +ffffffff81971320 T drm_modeset_lock_all_ctx +ffffffff81971410 T drm_modeset_backoff +ffffffff819714e0 T drm_modeset_acquire_fini +ffffffff81971510 T drm_warn_on_modeset_not_all_locked +ffffffff81971660 T drm_modeset_unlock_all +ffffffff81971750 T drm_modeset_drop_locks +ffffffff819717e0 T drm_modeset_unlock +ffffffff819718b0 t modeset_lock +ffffffff81971bf0 T drm_modeset_lock_init +ffffffff81971c50 T drm_modeset_lock +ffffffff81971d70 T drm_modeset_lock_single_interruptible +ffffffff81971e90 t __ww_mutex_lock +ffffffff81973000 T drm_mtrr_add +ffffffff81973070 T drm_mtrr_del +ffffffff81974000 T drm_panel_init +ffffffff81974090 T drm_panel_add +ffffffff819740e0 T drm_panel_remove +ffffffff81974140 T drm_panel_prepare +ffffffff81974250 T drm_panel_unprepare +ffffffff81974360 T drm_panel_enable +ffffffff81974450 T drm_panel_disable +ffffffff81974530 T drm_panel_get_modes +ffffffff81974580 T drm_is_panel_follower +ffffffff819745d0 T drm_panel_add_follower +ffffffff81974620 T drm_panel_remove_follower +ffffffff81974640 T devm_drm_panel_add_follower +ffffffff81974690 T drm_panel_of_backlight +ffffffff81975000 T drm_get_panel_orientation_quirk +ffffffff81976000 T drm_pci_set_busid +ffffffff81976090 t kasprintf +ffffffff81977000 T drm_universal_plane_init +ffffffff819770e0 t __drm_universal_plane_init +ffffffff819775c0 T __drmm_universal_plane_alloc +ffffffff81977700 t drmm_universal_plane_alloc_release +ffffffff81977750 T __drm_universal_plane_alloc +ffffffff81977890 T drm_plane_register_all +ffffffff81977980 T drm_plane_unregister_all +ffffffff819779f0 T drm_plane_cleanup +ffffffff81977b40 T drm_plane_from_index +ffffffff81977ba0 T drm_plane_force_disable +ffffffff81977cb0 T drm_mode_plane_set_obj_prop +ffffffff81977d30 T drm_mode_getplane_res +ffffffff81977e30 T drm_mode_getplane +ffffffff81977f80 T drm_plane_check_pixel_format +ffffffff81978040 T drm_any_plane_has_format +ffffffff81978170 T drm_mode_setplane +ffffffff81978460 T drm_mode_cursor_ioctl +ffffffff819784d0 t drm_mode_cursor_common +ffffffff81978a10 T drm_mode_cursor2_ioctl +ffffffff81978a30 T drm_mode_page_flip_ioctl +ffffffff81978f90 T drm_plane_enable_fb_damage_clips +ffffffff81978fb0 T drm_plane_get_damage_clips_count +ffffffff81978ff0 T __drm_plane_get_damage_clips +ffffffff81979030 T drm_plane_get_damage_clips +ffffffff819790d0 T drm_create_scaling_filter_prop +ffffffff81979220 T drm_plane_create_scaling_filter_property +ffffffff81979290 t kvasprintf +ffffffff81979330 t kasprintf +ffffffff81979400 t create_in_format_blob +ffffffff819795f0 t __setplane_atomic +ffffffff81979790 t __setplane_internal +ffffffff819799a0 t __setplane_check +ffffffff8197a000 T drm_plane_helper_update_primary +ffffffff8197a4b0 t get_connectors_for_crtc +ffffffff8197a5c0 T drm_plane_helper_disable_primary +ffffffff8197a670 T drm_plane_helper_destroy +ffffffff8197a6a0 T drm_plane_helper_atomic_check +ffffffff8197b000 T drm_prime_remove_buf_handle +ffffffff8197b0a0 T drm_prime_init_file_private +ffffffff8197b100 T drm_prime_destroy_file_private +ffffffff8197b160 T drm_gem_dmabuf_export +ffffffff8197b1c0 T drm_gem_dmabuf_release +ffffffff8197b200 T drm_prime_fd_to_handle_ioctl +ffffffff8197b450 T drm_prime_handle_to_fd_ioctl +ffffffff8197b6d0 T drm_gem_map_attach +ffffffff8197b720 T drm_gem_map_detach +ffffffff8197b740 T drm_gem_dmabuf_vmap +ffffffff8197b760 T drm_gem_dmabuf_vunmap +ffffffff8197b780 T drm_gem_prime_mmap +ffffffff8197b7d0 T drm_prime_pages_to_sg +ffffffff8197b820 T drm_prime_get_contiguous_size +ffffffff8197b870 T drm_gem_prime_export +ffffffff8197b900 T drm_gem_prime_import_dev +ffffffff8197b960 T drm_gem_prime_import +ffffffff8197b9c0 T drm_prime_sg_to_page_array +ffffffff8197ba10 T drm_prime_sg_to_dma_addr_array +ffffffff8197ba60 T drm_prime_gem_destroy +ffffffff8197ba80 t drm_prime_add_buf_handle +ffffffff8197c000 T __drm_puts_coredump +ffffffff8197c0e0 T __drm_printfn_coredump +ffffffff8197c2b0 T __drm_puts_seq_file +ffffffff8197c2e0 T __drm_printfn_seq_file +ffffffff8197c310 T __drm_printfn_info +ffffffff8197c340 T __drm_printfn_debug +ffffffff8197c370 T __drm_printfn_err +ffffffff8197c3b0 T drm_puts +ffffffff8197c3e0 T drm_printf +ffffffff8197c460 T drm_print_bits +ffffffff8197c690 T drm_dev_printk +ffffffff8197c730 T __drm_dev_dbg +ffffffff8197c7c0 T ___drm_dbg +ffffffff8197c850 T __drm_err +ffffffff8197c8e0 T drm_print_regset32 +ffffffff8197d000 T drm_crtc_mode_valid +ffffffff8197d050 T drm_encoder_mode_valid +ffffffff8197d090 T drm_connector_mode_valid +ffffffff8197d110 T drm_kms_helper_poll_enable +ffffffff8197d250 T drm_kms_helper_poll_reschedule +ffffffff8197d2b0 T drm_helper_probe_detect +ffffffff8197d4a0 T drm_helper_probe_single_connector_modes +ffffffff8197da20 t __drm_helper_update_and_validate +ffffffff8197ddd0 T drm_kms_helper_hotplug_event +ffffffff8197de10 T drm_kms_helper_connector_hotplug_event +ffffffff8197de50 T drm_kms_helper_is_poll_worker +ffffffff8197de80 T drm_kms_helper_poll_disable +ffffffff8197df50 T drm_kms_helper_poll_init +ffffffff8197dfb0 t output_poll_execute +ffffffff8197e200 T drm_kms_helper_poll_fini +ffffffff8197e250 T drm_connector_helper_hpd_irq_event +ffffffff8197e310 t check_connector_changed +ffffffff8197e4e0 T drm_helper_hpd_irq_event +ffffffff8197e630 T drm_crtc_helper_mode_valid_fixed +ffffffff8197e680 T drm_connector_helper_get_modes_from_ddc +ffffffff8197e710 T drm_connector_helper_get_modes_fixed +ffffffff8197e880 T drm_connector_helper_get_modes +ffffffff8197e8f0 T drm_connector_helper_tv_get_modes +ffffffff8197eb30 t __delayed_work_tick +ffffffff8197f000 T drm_property_create +ffffffff8197f1f0 T drm_property_create_enum +ffffffff8197f2a0 T drm_property_add_enum +ffffffff8197f4a0 T drm_property_destroy +ffffffff8197f550 T drm_property_create_bitmask +ffffffff8197f680 T drm_property_create_range +ffffffff8197f6f0 T drm_property_create_signed_range +ffffffff8197f760 T drm_property_create_object +ffffffff8197f800 T drm_property_create_bool +ffffffff8197f860 T drm_mode_getproperty_ioctl +ffffffff8197fab0 T drm_property_create_blob +ffffffff8197fbf0 t drm_property_free_blob +ffffffff8197fc70 T drm_property_blob_put +ffffffff8197fcb0 T drm_property_destroy_user_blobs +ffffffff8197fd30 T drm_property_blob_get +ffffffff8197fd70 T drm_property_lookup_blob +ffffffff8197fd90 T drm_property_replace_global_blob +ffffffff8197fee0 T drm_property_replace_blob +ffffffff8197ff50 T drm_mode_getblob_ioctl +ffffffff81980010 T drm_mode_createblob_ioctl +ffffffff81980110 T drm_mode_destroyblob_ioctl +ffffffff81980210 T drm_property_change_valid_get +ffffffff81980470 T drm_property_change_valid_put +ffffffff81981000 T drm_rect_intersect +ffffffff81981080 T drm_rect_clip_scaled +ffffffff819812f0 T drm_rect_calc_hscale +ffffffff819813c0 T drm_rect_calc_vscale +ffffffff81981490 T drm_rect_debug_print +ffffffff819815b0 T drm_rect_rotate +ffffffff81981670 T drm_rect_rotate_inv +ffffffff81982000 T drm_self_refresh_helper_update_avg_times +ffffffff81982150 T drm_self_refresh_helper_alter_state +ffffffff819822e0 T drm_self_refresh_helper_init +ffffffff81982470 t drm_self_refresh_helper_entry_work +ffffffff819825d0 T drm_self_refresh_helper_cleanup +ffffffff81982650 t __delayed_work_tick +ffffffff81983000 T drm_suballoc_manager_init +ffffffff81983180 T drm_suballoc_manager_fini +ffffffff81983290 t drm_suballoc_try_free +ffffffff81983380 T drm_suballoc_new +ffffffff81983da0 t drm_suballoc_event +ffffffff81983ee0 T drm_suballoc_free +ffffffff81985000 T drm_syncobj_find +ffffffff81985070 T drm_syncobj_add_point +ffffffff81985180 t syncobj_wait_syncobj_func +ffffffff81985230 t syncobj_eventfd_entry_func +ffffffff81985310 T drm_syncobj_replace_fence +ffffffff819853c0 T drm_syncobj_find_fence +ffffffff81985710 t drm_syncobj_fence_add_wait +ffffffff819857e0 T drm_syncobj_free +ffffffff81985860 T drm_syncobj_create +ffffffff81985a30 T drm_syncobj_get_handle +ffffffff81985b40 T drm_syncobj_get_fd +ffffffff81985b90 T drm_syncobj_open +ffffffff81985bc0 T drm_syncobj_release +ffffffff81985c00 t drm_syncobj_release_handle +ffffffff81985cc0 T drm_syncobj_create_ioctl +ffffffff81985df0 T drm_syncobj_destroy_ioctl +ffffffff81985f30 T drm_syncobj_handle_to_fd_ioctl +ffffffff81986120 T drm_syncobj_fd_to_handle_ioctl +ffffffff819862d0 T drm_syncobj_transfer_ioctl +ffffffff819866b0 T drm_timeout_abs_to_jiffies +ffffffff81986780 T drm_syncobj_wait_ioctl +ffffffff81986900 t drm_syncobj_array_find +ffffffff81986b20 t drm_syncobj_array_free +ffffffff81986c10 T drm_syncobj_timeline_wait_ioctl +ffffffff81986d90 T drm_syncobj_eventfd_ioctl +ffffffff81986dc0 T drm_syncobj_reset_ioctl +ffffffff81986ea0 T drm_syncobj_signal_ioctl +ffffffff81987000 T drm_syncobj_timeline_signal_ioctl +ffffffff81987240 T drm_syncobj_query_ioctl +ffffffff81987450 t drm_syncobj_array_wait_timeout +ffffffff819878b0 t syncobj_wait_fence_func +ffffffff819878d0 t syncobj_eventfd_entry_fence_func +ffffffff81988000 T drm_vblank_count +ffffffff81988090 T drm_crtc_accurate_vblank_count +ffffffff819881a0 t drm_update_vblank_count +ffffffff819885e0 T drm_vblank_disable_and_save +ffffffff81988730 T drm_vblank_init +ffffffff819888b0 t vblank_disable_fn +ffffffff81988930 t drm_vblank_init_release +ffffffff819889c0 T drm_dev_has_vblank +ffffffff819889f0 T drm_crtc_vblank_waitqueue +ffffffff81988a40 T drm_calc_timestamping_constants +ffffffff81988c60 T drm_crtc_vblank_helper_get_vblank_timestamp_internal +ffffffff819891b0 T drm_crtc_vblank_helper_get_vblank_timestamp +ffffffff819891d0 T drm_crtc_vblank_count +ffffffff81989260 T drm_crtc_vblank_count_and_time +ffffffff81989320 t drm_vblank_count_and_time +ffffffff819893d0 T drm_crtc_next_vblank_start +ffffffff81989520 T drm_crtc_arm_vblank_event +ffffffff81989600 T drm_crtc_send_vblank_event +ffffffff819897b0 t send_vblank_event +ffffffff81989860 T drm_vblank_get +ffffffff81989960 t drm_vblank_enable +ffffffff81989b60 T drm_crtc_vblank_get +ffffffff81989c60 T drm_vblank_put +ffffffff81989d90 T drm_crtc_vblank_put +ffffffff81989db0 T drm_wait_one_vblank +ffffffff8198a2a0 T drm_crtc_wait_one_vblank +ffffffff8198a2c0 T drm_crtc_vblank_off +ffffffff8198a6b0 T drm_crtc_vblank_reset +ffffffff8198a7e0 T drm_crtc_set_max_vblank_count +ffffffff8198a8c0 T drm_crtc_vblank_on +ffffffff8198aa10 t drm_reset_vblank_timestamp +ffffffff8198abf0 T drm_crtc_vblank_restore +ffffffff8198afd0 T drm_legacy_modeset_ctl_ioctl +ffffffff8198b1f0 T drm_wait_vblank_ioctl +ffffffff8198b740 t drm_wait_vblank_reply +ffffffff8198b850 t drm_queue_vblank_event +ffffffff8198bb90 T drm_handle_vblank +ffffffff8198be80 t drm_handle_vblank_events +ffffffff8198c110 T drm_crtc_handle_vblank +ffffffff8198c130 T drm_crtc_get_sequence_ioctl +ffffffff8198c300 T drm_crtc_queue_sequence_ioctl +ffffffff8198c5c0 t __get_vblank_counter +ffffffff8198d000 T drm_handle_vblank_works +ffffffff8198d1a0 T drm_vblank_cancel_pending_works +ffffffff8198d2e0 T drm_vblank_work_schedule +ffffffff8198d550 T drm_vblank_work_cancel_sync +ffffffff8198d6a0 T drm_vblank_work_flush +ffffffff8198d7d0 T drm_vblank_work_init +ffffffff8198d840 T drm_vblank_worker_init +ffffffff8198e000 T drm_vma_offset_manager_init +ffffffff8198e040 T drm_vma_offset_manager_destroy +ffffffff8198e060 T drm_vma_offset_lookup_locked +ffffffff8198e0f0 T drm_vma_offset_add +ffffffff8198e180 T drm_vma_offset_remove +ffffffff8198e1d0 T drm_vma_node_allow +ffffffff8198e1f0 t vma_node_allow +ffffffff8198e310 T drm_vma_node_allow_once +ffffffff8198e330 T drm_vma_node_revoke +ffffffff8198e3b0 T drm_vma_node_is_allowed +ffffffff8198f000 T hdmi_avi_infoframe_init +ffffffff8198f070 T hdmi_avi_infoframe_check +ffffffff8198f0c0 T hdmi_avi_infoframe_pack_only +ffffffff8198f2c0 T hdmi_avi_infoframe_pack +ffffffff8198f320 T hdmi_spd_infoframe_init +ffffffff8198f3e0 T hdmi_spd_infoframe_check +ffffffff8198f430 T hdmi_spd_infoframe_pack_only +ffffffff8198f570 T hdmi_spd_infoframe_pack +ffffffff8198f6d0 T hdmi_audio_infoframe_init +ffffffff8198f720 T hdmi_audio_infoframe_check +ffffffff8198f770 T hdmi_audio_infoframe_pack_only +ffffffff8198f8d0 T hdmi_audio_infoframe_pack +ffffffff8198f920 T hdmi_audio_infoframe_pack_for_dp +ffffffff8198fa10 T hdmi_vendor_infoframe_init +ffffffff8198fa70 T hdmi_vendor_infoframe_check +ffffffff8198fb10 T hdmi_vendor_infoframe_pack_only +ffffffff8198fcd0 T hdmi_vendor_infoframe_pack +ffffffff8198fd70 T hdmi_drm_infoframe_init +ffffffff8198fdd0 T hdmi_drm_infoframe_check +ffffffff8198fe20 T hdmi_drm_infoframe_pack_only +ffffffff81990010 T hdmi_drm_infoframe_pack +ffffffff81990060 T hdmi_infoframe_check +ffffffff819901b0 T hdmi_infoframe_pack_only +ffffffff819903d0 T hdmi_infoframe_pack +ffffffff81990540 T hdmi_infoframe_log +ffffffff81991430 T hdmi_drm_infoframe_unpack_only +ffffffff81991510 T hdmi_infoframe_unpack +ffffffff81992000 T list_sort +ffffffff81993000 T radix_tree_lookup +ffffffff819930b0 T radix_tree_iter_find +ffffffff81993180 T radix_tree_delete +ffffffff81993310 T radix_tree_iter_delete +ffffffff81993330 T radix_tree_insert +ffffffff81994000 T sort +ffffffff81994040 t qsort +ffffffff81996000 T drm_dp_dual_mode_read +ffffffff81996110 T drm_dp_dual_mode_write +ffffffff819961f0 T drm_dp_dual_mode_detect +ffffffff81996490 T drm_dp_dual_mode_max_tmds_clock +ffffffff819965b0 T drm_dp_dual_mode_get_tmds_output +ffffffff819966d0 T drm_dp_dual_mode_set_tmds_output +ffffffff81996950 T drm_dp_get_dual_mode_type_name +ffffffff819969c0 T drm_lspcon_get_mode +ffffffff81996be0 T drm_lspcon_set_mode +ffffffff81997000 T drm_dp_channel_eq_ok +ffffffff81997080 T drm_dp_clock_recovery_ok +ffffffff819970f0 T drm_dp_get_adjust_request_voltage +ffffffff81997130 T drm_dp_get_adjust_request_pre_emphasis +ffffffff81997180 T drm_dp_get_adjust_tx_ffe_preset +ffffffff819971c0 T drm_dp_128b132b_lane_channel_eq_done +ffffffff81997240 T drm_dp_128b132b_lane_symbol_locked +ffffffff819972b0 T drm_dp_128b132b_eq_interlane_align_done +ffffffff819972e0 T drm_dp_128b132b_cds_interlane_align_done +ffffffff81997310 T drm_dp_128b132b_link_training_failed +ffffffff81997340 T drm_dp_read_clock_recovery_delay +ffffffff81997450 T drm_dp_read_channel_eq_delay +ffffffff81997550 T drm_dp_128b132b_read_aux_rd_interval +ffffffff81997600 T drm_dp_link_train_clock_recovery_delay +ffffffff81997690 t __8b10b_clock_recovery_delay_us +ffffffff81997710 T drm_dp_link_train_channel_eq_delay +ffffffff81997780 T drm_dp_phy_name +ffffffff819977c0 T drm_dp_lttpr_link_train_clock_recovery_delay +ffffffff819977e0 T drm_dp_lttpr_link_train_channel_eq_delay +ffffffff81997850 T drm_dp_link_rate_to_bw_code +ffffffff819978c0 T drm_dp_bw_code_to_link_rate +ffffffff81997920 T drm_dp_dpcd_probe +ffffffff81997a60 t drm_dp_dpcd_access +ffffffff81997b90 T drm_dp_dpcd_read +ffffffff81997cc0 T drm_dp_dpcd_write +ffffffff81997dd0 T drm_dp_dpcd_read_link_status +ffffffff81997df0 T drm_dp_dpcd_read_phy_link_status +ffffffff81997ef0 T drm_dp_downstream_is_type +ffffffff81997f40 T drm_dp_downstream_is_tmds +ffffffff81997fb0 T drm_dp_send_real_edid_checksum +ffffffff81998200 T drm_dp_read_dpcd_caps +ffffffff81998390 T drm_dp_read_downstream_info +ffffffff81998490 T drm_dp_downstream_max_dotclock +ffffffff819984e0 T drm_dp_downstream_max_tmds_clock +ffffffff81998580 T drm_dp_downstream_min_tmds_clock +ffffffff81998600 T drm_dp_downstream_max_bpc +ffffffff819986a0 T drm_dp_downstream_420_passthrough +ffffffff81998700 T drm_dp_downstream_444_to_420_conversion +ffffffff81998760 T drm_dp_downstream_rgb_to_ycbcr_conversion +ffffffff819987c0 T drm_dp_downstream_mode +ffffffff81998850 T drm_dp_downstream_id +ffffffff81998870 T drm_dp_downstream_debug +ffffffff81998910 T drm_dp_subconnector_type +ffffffff81998980 T drm_dp_set_subconnector_property +ffffffff819989f0 T drm_dp_read_sink_count_cap +ffffffff81998a40 T drm_dp_read_sink_count +ffffffff81998aa0 T drm_dp_remote_aux_init +ffffffff81998ad0 t drm_dp_aux_crc_work +ffffffff81998c40 T drm_dp_aux_init +ffffffff81998cf0 T drm_dp_aux_register +ffffffff81998e10 T drm_dp_aux_unregister +ffffffff81998e40 T drm_dp_psr_setup_time +ffffffff81998e90 T drm_dp_start_crc +ffffffff81998f40 T drm_dp_stop_crc +ffffffff81998fd0 T drm_dp_read_desc +ffffffff81999190 T drm_dp_dsc_sink_max_slice_count +ffffffff81999220 T drm_dp_dsc_sink_line_buf_depth +ffffffff81999260 T drm_dp_dsc_sink_supported_input_bpcs +ffffffff819992d0 T drm_dp_read_lttpr_common_caps +ffffffff81999390 T drm_dp_read_lttpr_phy_caps +ffffffff81999450 T drm_dp_lttpr_count +ffffffff819994e0 T drm_dp_lttpr_max_link_rate +ffffffff81999540 T drm_dp_lttpr_max_lane_count +ffffffff81999570 T drm_dp_lttpr_voltage_swing_level_3_supported +ffffffff819995a0 T drm_dp_lttpr_pre_emphasis_level_3_supported +ffffffff819995d0 T drm_dp_get_phy_test_pattern +ffffffff819996f0 T drm_dp_set_phy_test_pattern +ffffffff819997b0 T drm_dp_vsc_sdp_log +ffffffff81999ad0 T drm_dp_get_pcon_max_frl_bw +ffffffff81999b20 T drm_dp_pcon_frl_prepare +ffffffff81999b70 T drm_dp_pcon_is_frl_ready +ffffffff81999bd0 T drm_dp_pcon_frl_configure_1 +ffffffff81999cd0 T drm_dp_pcon_frl_configure_2 +ffffffff81999d30 T drm_dp_pcon_reset_frl_config +ffffffff81999d80 T drm_dp_pcon_frl_enable +ffffffff81999e40 T drm_dp_pcon_hdmi_link_active +ffffffff81999e90 T drm_dp_pcon_hdmi_link_mode +ffffffff81999f00 T drm_dp_pcon_hdmi_frl_link_error_count +ffffffff81999ff0 T drm_dp_pcon_enc_is_dsc_1_2 +ffffffff8199a020 T drm_dp_pcon_dsc_max_slices +ffffffff8199a0b0 T drm_dp_pcon_dsc_max_slice_width +ffffffff8199a0e0 T drm_dp_pcon_dsc_bpp_incr +ffffffff8199a120 T drm_dp_pcon_pps_default +ffffffff8199a1a0 T drm_dp_pcon_pps_override_buf +ffffffff8199a240 T drm_dp_pcon_pps_override_param +ffffffff8199a310 T drm_dp_pcon_convert_rgb_to_ycbcr +ffffffff8199a3b0 T drm_edp_backlight_set_level +ffffffff8199a480 T drm_edp_backlight_enable +ffffffff8199a690 t drm_edp_backlight_set_enable +ffffffff8199a7c0 T drm_edp_backlight_disable +ffffffff8199a800 T drm_edp_backlight_init +ffffffff8199ad60 T drm_panel_dp_aux_backlight +ffffffff8199aef0 t __128b132b_channel_eq_delay_us +ffffffff8199af70 t __8b10b_channel_eq_delay_us +ffffffff8199aff0 t drm_dp_aux_get_crc +ffffffff8199b0d0 t drm_dp_i2c_xfer +ffffffff8199b340 t drm_dp_i2c_functionality +ffffffff8199b370 t drm_dp_i2c_do_msg +ffffffff8199b740 t lock_bus +ffffffff8199b760 t trylock_bus +ffffffff8199b7b0 t unlock_bus +ffffffff8199b7d0 t dp_aux_backlight_update_status +ffffffff8199c000 T drm_dp_encode_sideband_req +ffffffff8199c440 T drm_dp_decode_sideband_req +ffffffff8199c970 T drm_dp_dump_sideband_msg_req_body +ffffffff8199cd40 T drm_dp_mst_get_port_malloc +ffffffff8199cd90 T drm_dp_mst_put_port_malloc +ffffffff8199ce80 t kref_put +ffffffff8199cec0 T drm_atomic_get_mst_payload_state +ffffffff8199cf10 T drm_dp_mst_dpcd_read +ffffffff8199d1d0 T drm_dp_mst_dpcd_write +ffffffff8199d220 t drm_dp_send_dpcd_write +ffffffff8199d460 T drm_dp_mst_connector_late_register +ffffffff8199d4e0 T drm_dp_mst_connector_early_unregister +ffffffff8199d520 T drm_dp_send_power_updown_phy +ffffffff8199d760 t drm_dp_mst_topology_put_port +ffffffff8199d880 t drm_dp_mst_wait_tx_reply +ffffffff8199dc20 T drm_dp_send_query_stream_enc_status +ffffffff8199dee0 T drm_dp_add_payload_part1 +ffffffff8199e090 T drm_dp_remove_payload +ffffffff8199e230 T drm_dp_add_payload_part2 +ffffffff8199e3e0 T drm_dp_get_vc_payload_bw +ffffffff8199e480 T drm_dp_read_mst_cap +ffffffff8199e4e0 T drm_dp_mst_topology_mgr_set_mst +ffffffff8199e790 t drm_dp_dpcd_write_payload +ffffffff8199e930 t drm_dp_mst_topology_put_mstb +ffffffff8199ea30 T drm_dp_mst_topology_mgr_suspend +ffffffff8199eaf0 t drm_dp_mst_topology_mgr_invalidate_mstb +ffffffff8199eb60 T drm_dp_mst_topology_mgr_resume +ffffffff8199eda0 T drm_dp_mst_hpd_irq_handle_event +ffffffff8199fd10 T drm_dp_mst_hpd_irq_send_new_request +ffffffff8199fd90 T drm_dp_mst_detect_port +ffffffff8199fef0 T drm_dp_mst_edid_read +ffffffff8199fff0 T drm_dp_mst_get_edid +ffffffff819a0050 T drm_dp_atomic_find_time_slots +ffffffff819a0300 T drm_atomic_get_mst_topology_state +ffffffff819a0310 T drm_dp_atomic_release_time_slots +ffffffff819a0520 T drm_dp_mst_atomic_setup_commit +ffffffff819a06b0 T drm_dp_mst_atomic_wait_for_dependencies +ffffffff819a0820 T drm_dp_mst_root_conn_atomic_check +ffffffff819a0940 T drm_dp_mst_update_slots +ffffffff819a09a0 T drm_dp_check_act_status +ffffffff819a0b30 T drm_dp_calc_pbn_mode +ffffffff819a0ba0 T drm_dp_mst_dump_topology +ffffffff819a0e20 t drm_dp_mst_dump_mstb +ffffffff819a0e90 T drm_dp_mst_add_affected_dsc_crtcs +ffffffff819a0fc0 T drm_dp_mst_dsc_aux_for_port +ffffffff819a11f0 T drm_dp_mst_atomic_enable_dsc +ffffffff819a1370 T drm_dp_mst_atomic_check +ffffffff819a1660 t drm_dp_mst_atomic_check_mstb_bw_limit +ffffffff819a18e0 t drm_dp_mst_duplicate_state +ffffffff819a1ab0 t drm_dp_mst_destroy_state +ffffffff819a1b70 T drm_atomic_get_old_mst_topology_state +ffffffff819a1b80 T drm_atomic_get_new_mst_topology_state +ffffffff819a1b90 T drm_dp_mst_topology_mgr_init +ffffffff819a1e00 t drm_dp_mst_link_probe_work +ffffffff819a2090 t drm_dp_tx_work +ffffffff819a20e0 t drm_dp_delayed_destroy_work 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get_mst_branch_device_by_guid_helper +ffffffff819a7000 T drm_dsc_dp_pps_header_init +ffffffff819a7030 T drm_dsc_dp_rc_buffer_size +ffffffff819a7090 T drm_dsc_pps_payload_pack +ffffffff819a7340 T drm_dsc_set_const_params +ffffffff819a7390 T drm_dsc_set_rc_buf_thresh +ffffffff819a7400 T drm_dsc_setup_rc_params +ffffffff819a75c0 T drm_dsc_compute_rc_parameters +ffffffff819a78c0 T drm_dsc_get_bpp_int +ffffffff819a7940 T drm_dsc_initial_scale_value +ffffffff819a7980 T drm_dsc_flatness_det_thresh +ffffffff819a8000 T drm_connector_attach_content_protection_property +ffffffff819a8030 T drm_hdcp_check_ksvs_revoked +ffffffff819a8080 T drm_hdcp_update_content_protection +ffffffff819a9000 T drm_hdmi_infoframe_set_hdr_metadata +ffffffff819a9120 T drm_hdmi_avi_infoframe_colorimetry +ffffffff819a9180 T drm_hdmi_avi_infoframe_bars +ffffffff819a91d0 T drm_hdmi_avi_infoframe_content_type +ffffffff819aa000 T drm_scdc_read +ffffffff819aa090 T drm_scdc_write +ffffffff819aa170 T drm_scdc_get_scrambling_status +ffffffff819aa250 T drm_scdc_set_scrambling +ffffffff819aa3e0 T drm_scdc_set_high_tmds_clock_ratio +ffffffff819ab000 T drm_gem_ttm_mmap +ffffffff819ab070 T drm_gem_ttm_vmap +ffffffff819ab080 T drm_gem_ttm_vunmap +ffffffff819ac000 T ttm_agp_bind +ffffffff819ac050 T ttm_agp_unbind +ffffffff819ac070 T ttm_agp_is_bound +ffffffff819ac0c0 T ttm_agp_destroy +ffffffff819ac0e0 T ttm_agp_tt_create +ffffffff819ad000 T ttm_bo_move_to_lru_tail +ffffffff819ad040 T ttm_bo_set_bulk_move +ffffffff819ad100 T ttm_bo_put +ffffffff819ad610 T ttm_bo_eviction_valuable +ffffffff819ad660 T ttm_mem_evict_first +ffffffff819add60 t ttm_bo_evict_swapout_allowable +ffffffff819adf60 t dma_resv_unlock +ffffffff819ae000 t ttm_bo_cleanup_refs +ffffffff819ae350 t ttm_bo_unreserve +ffffffff819ae430 T ttm_bo_pin +ffffffff819ae4d0 T ttm_bo_unpin +ffffffff819ae5e0 T ttm_bo_mem_space +ffffffff819ae820 t ttm_bo_add_move_fence +ffffffff819ae8e0 T ttm_bo_validate +ffffffff819aea70 T ttm_bo_init_reserved +ffffffff819aec60 T ttm_bo_init_validate +ffffffff819aed00 T ttm_bo_unmap_virtual +ffffffff819aee30 T ttm_bo_wait_ctx +ffffffff819aeec0 T ttm_bo_swapout +ffffffff819af180 t ttm_bo_handle_move_mem +ffffffff819af300 T ttm_bo_tt_destroy +ffffffff819af370 t ttm_bo_delayed_delete +ffffffff819b0000 T ttm_mem_io_reserve +ffffffff819b0060 T ttm_mem_io_free +ffffffff819b00d0 T ttm_move_memcpy +ffffffff819b0290 T ttm_bo_move_memcpy +ffffffff819b04f0 T ttm_bo_move_sync_cleanup +ffffffff819b0600 T ttm_io_prot +ffffffff819b0640 T ttm_bo_kmap +ffffffff819b0900 T ttm_bo_kunmap +ffffffff819b0a40 T ttm_bo_vmap +ffffffff819b0c30 T ttm_bo_vunmap +ffffffff819b0d20 T ttm_bo_move_accel_cleanup +ffffffff819b1000 T ttm_bo_pipeline_gutting +ffffffff819b1200 t ttm_buffer_object_transfer +ffffffff819b1430 t ttm_transfered_destroy +ffffffff819b2000 T ttm_bo_vm_reserve +ffffffff819b2180 t dma_resv_lock_interruptible +ffffffff819b22a0 T ttm_bo_vm_fault_reserved +ffffffff819b25e0 T ttm_bo_vm_fault +ffffffff819b2740 T ttm_bo_vm_reference +ffffffff819b2770 T ttm_bo_vm_detach +ffffffff819b2780 T ttm_bo_mmap_obj +ffffffff819b3000 T ttm_global_swapout +ffffffff819b30e0 T ttm_device_swapout +ffffffff819b3200 T ttm_device_init +ffffffff819b3490 T ttm_device_fini +ffffffff819b3650 T ttm_device_clear_dma_mappings +ffffffff819b3700 t ttm_device_clear_lru_dma_mappings +ffffffff819b4000 T ttm_eu_backoff_reservation +ffffffff819b4130 T ttm_eu_reserve_buffers +ffffffff819b45b0 T ttm_eu_fence_buffer_objects +ffffffff819b4700 t __ww_mutex_lock +ffffffff819b5000 T ttm_prot_from_caching +ffffffff819b6000 T ttm_pool_alloc +ffffffff819b6a40 t ttm_pool_free_range +ffffffff819b6d20 T ttm_pool_free +ffffffff819b6d80 t ttm_pool_shrink +ffffffff819b6f60 T ttm_pool_init +ffffffff819b7220 T ttm_pool_fini +ffffffff819b7420 t ttm_pool_type_fini +ffffffff819b7660 T ttm_pool_mgr_init +ffffffff819b7940 t ttm_pool_shrinker_count +ffffffff819b7990 t ttm_pool_shrinker_scan +ffffffff819b79e0 T ttm_pool_mgr_fini +ffffffff819b8000 T ttm_range_man_init_nocheck +ffffffff819b8180 T ttm_range_man_fini_nocheck +ffffffff819b8310 t ttm_range_man_alloc +ffffffff819b8460 t ttm_range_man_free +ffffffff819b84c0 t ttm_range_man_intersects +ffffffff819b8520 t ttm_range_man_compatible +ffffffff819b8580 t ttm_range_man_debug +ffffffff819b9000 T ttm_lru_bulk_move_init +ffffffff819b9020 T ttm_lru_bulk_move_tail +ffffffff819b91e0 T ttm_resource_add_bulk_move +ffffffff819b92b0 T ttm_resource_del_bulk_move +ffffffff819b93f0 T ttm_resource_move_to_lru_tail +ffffffff819b9560 T ttm_resource_init +ffffffff819b9650 T ttm_resource_fini +ffffffff819b96c0 T ttm_resource_alloc +ffffffff819b9810 T ttm_resource_free +ffffffff819b99d0 T ttm_resource_intersects +ffffffff819b9a30 T ttm_resource_compatible +ffffffff819b9a90 T ttm_resource_compat +ffffffff819b9c20 T ttm_resource_set_bo +ffffffff819b9c70 T ttm_resource_manager_init +ffffffff819b9d20 T ttm_resource_manager_evict_all +ffffffff819b9ef0 T ttm_resource_manager_usage +ffffffff819b9f50 T ttm_resource_manager_debug +ffffffff819ba040 T ttm_resource_manager_first +ffffffff819ba0d0 T ttm_resource_manager_next +ffffffff819ba1f0 T ttm_kmap_iter_iomap_init +ffffffff819ba250 T ttm_kmap_iter_linear_io_init +ffffffff819ba430 T ttm_kmap_iter_linear_io_fini +ffffffff819ba480 T ttm_resource_manager_create_debugfs +ffffffff819ba4b0 t ttm_kmap_iter_iomap_map_local +ffffffff819ba5e0 t ttm_kmap_iter_iomap_unmap_local +ffffffff819ba600 t ttm_kmap_iter_linear_io_map_local +ffffffff819bb000 T ttm_sys_man_init +ffffffff819bb130 t ttm_sys_man_alloc +ffffffff819bb1b0 t ttm_sys_man_free +ffffffff819bc000 T ttm_tt_create +ffffffff819bc100 T ttm_tt_destroy +ffffffff819bc120 T ttm_tt_init +ffffffff819bc1f0 T ttm_tt_fini +ffffffff819bc2d0 T ttm_sg_tt_init +ffffffff819bc4f0 T ttm_tt_swapin +ffffffff819bc610 T ttm_tt_swapout +ffffffff819bc660 T ttm_tt_populate +ffffffff819bc7d0 T ttm_tt_unpopulate +ffffffff819bc880 T ttm_tt_mgr_init +ffffffff819bc8e0 T ttm_kmap_iter_tt_init +ffffffff819bc940 T ttm_tt_pages_limit +ffffffff819bc970 t ttm_kmap_iter_tt_map_local +ffffffff819bc9d0 t ttm_kmap_iter_tt_unmap_local +ffffffff819bd000 T drm_sched_entity_init +ffffffff819bd170 T drm_sched_entity_modify_sched +ffffffff819bd1f0 T drm_sched_entity_is_ready +ffffffff819bd230 T drm_sched_entity_error +ffffffff819bd270 T drm_sched_entity_flush +ffffffff819bd5a0 t drm_sched_entity_kill +ffffffff819bd760 T drm_sched_entity_fini +ffffffff819bd7d0 T drm_sched_entity_destroy +ffffffff819bd870 T drm_sched_entity_set_priority +ffffffff819bd8b0 T drm_sched_entity_pop_job +ffffffff819bdb00 T drm_sched_entity_select_rq +ffffffff819bdbd0 T drm_sched_entity_push_job +ffffffff819bdd20 t drm_sched_entity_kill_jobs_cb +ffffffff819bde70 t drm_sched_entity_kill_jobs_work +ffffffff819bdef0 t drm_sched_entity_clear_dep +ffffffff819bdf10 t drm_sched_entity_wakeup +ffffffff819be000 T drm_sched_fence_slab_init +ffffffff819be060 T drm_sched_fence_slab_fini +ffffffff819be080 T drm_sched_fence_scheduled +ffffffff819be0e0 T drm_sched_fence_finished +ffffffff819be100 T drm_sched_fence_free +ffffffff819be1a0 T to_drm_sched_fence +ffffffff819be200 T drm_sched_fence_alloc +ffffffff819be280 T drm_sched_fence_init +ffffffff819be300 t drm_sched_fence_get_driver_name +ffffffff819be330 t drm_sched_fence_get_timeline_name +ffffffff819be390 t drm_sched_fence_release_scheduled +ffffffff819be480 t drm_sched_fence_release_finished +ffffffff819be4c0 t drm_sched_fence_set_deadline_finished +ffffffff819bf000 T drm_sched_rq_update_fifo +ffffffff819bf0e0 T drm_sched_rq_add_entity +ffffffff819bf170 T drm_sched_rq_remove_entity +ffffffff819bf250 T drm_sched_fault +ffffffff819bf2a0 T drm_sched_suspend_timeout +ffffffff819bf320 T drm_sched_resume_timeout +ffffffff819bf3c0 T drm_sched_stop +ffffffff819bf590 T drm_sched_start +ffffffff819bf6c0 t drm_sched_job_done_cb +ffffffff819bf6e0 t drm_sched_job_done +ffffffff819bf7b0 T drm_sched_resubmit_jobs +ffffffff819bf900 T drm_sched_job_init +ffffffff819bf990 T drm_sched_job_arm +ffffffff819bfa20 T drm_sched_job_add_dependency +ffffffff819bfb90 T drm_sched_job_add_syncobj_dependency +ffffffff819bfbf0 T drm_sched_job_add_resv_dependencies +ffffffff819bfca0 T drm_sched_job_add_implicit_dependencies +ffffffff819bfd60 T drm_sched_job_cleanup +ffffffff819bfe10 T drm_sched_wakeup_if_can_queue +ffffffff819bfed0 T drm_sched_pick_best +ffffffff819bff80 T drm_sched_init +ffffffff819c0230 t drm_sched_job_timedout +ffffffff819c0380 t drm_sched_main +ffffffff819c07b0 T drm_sched_fini +ffffffff819c0990 T drm_sched_increase_karma +ffffffff819c0ab0 t __delayed_work_tick +ffffffff819c0ad0 t drm_sched_get_cleanup_job +ffffffff819c0c10 t drm_sched_select_entity +ffffffff819c1000 t ch7017_init +ffffffff819c1140 t ch7017_dpms +ffffffff819c1380 t ch7017_mode_valid +ffffffff819c13c0 t ch7017_mode_set +ffffffff819c1670 t ch7017_detect +ffffffff819c16a0 t ch7017_get_hw_state +ffffffff819c1730 t ch7017_destroy +ffffffff819c1780 t ch7017_dump_regs +ffffffff819c2000 t ch7xxx_init +ffffffff819c22a0 t ch7xxx_dpms +ffffffff819c2380 t ch7xxx_mode_valid +ffffffff819c23c0 t ch7xxx_mode_set +ffffffff819c2940 t ch7xxx_detect +ffffffff819c2b90 t ch7xxx_get_hw_state +ffffffff819c2c70 t ch7xxx_destroy +ffffffff819c2cc0 t ch7xxx_dump_regs +ffffffff819c3000 t ivch_init +ffffffff819c3390 t ivch_dpms +ffffffff819c3660 t ivch_mode_valid +ffffffff819c36a0 t ivch_mode_set +ffffffff819c3950 t ivch_detect +ffffffff819c3980 t ivch_get_hw_state +ffffffff819c3a70 t ivch_destroy +ffffffff819c3ac0 t ivch_dump_regs +ffffffff819c4660 t ivch_reset +ffffffff819c5000 t ns2501_init +ffffffff819c5200 t ns2501_dpms +ffffffff819c5920 t ns2501_mode_valid +ffffffff819c5a00 t ns2501_mode_set +ffffffff819c6c20 t ns2501_detect +ffffffff819c6c50 t ns2501_get_hw_state +ffffffff819c6d30 t ns2501_destroy +ffffffff819c7000 t sil164_init +ffffffff819c7200 t sil164_dpms +ffffffff819c7330 t sil164_mode_valid +ffffffff819c7360 t sil164_mode_set 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intel_bios_encoder_supports_edp +ffffffff819ec410 T intel_bios_encoder_supports_dsi +ffffffff819ec440 T intel_bios_encoder_is_lspcon +ffffffff819ec490 T intel_bios_hdmi_level_shift +ffffffff819ec4f0 T intel_bios_hdmi_max_tmds_clock +ffffffff819ec580 T intel_bios_is_valid_vbt +ffffffff819ec670 T intel_bios_init +ffffffff819ee500 T intel_bios_init_panel_early +ffffffff819ee520 t intel_bios_init_panel +ffffffff819f05a0 T intel_bios_init_panel_late +ffffffff819f05c0 T intel_bios_driver_remove +ffffffff819f06b0 T intel_bios_fini_panel +ffffffff819f0790 T intel_bios_is_tv_present +ffffffff819f0810 T intel_bios_is_lvds_present +ffffffff819f08c0 T intel_bios_is_port_present +ffffffff819f0990 T intel_bios_encoder_supports_dp_dual_mode +ffffffff819f0a00 T intel_bios_is_dsi_present +ffffffff819f0ad0 T intel_bios_get_dsc_params +ffffffff819f0cf0 T intel_bios_dp_aux_ch +ffffffff819f0df0 T intel_bios_dp_has_shared_aux_ch +ffffffff819f0e80 T intel_bios_dp_boost_level +ffffffff819f0f10 T intel_bios_hdmi_boost_level +ffffffff819f0fa0 T intel_bios_hdmi_ddc_pin +ffffffff819f1100 T intel_bios_encoder_supports_typec_usb +ffffffff819f1150 T intel_bios_encoder_supports_tbt +ffffffff819f11a0 T intel_bios_encoder_lane_reversal +ffffffff819f11e0 T intel_bios_encoder_hpd_invert +ffffffff819f1220 T intel_bios_encoder_data_lookup +ffffffff819f12e0 T intel_bios_for_each_encoder +ffffffff819f1360 t opregion_get_panel_type +ffffffff819f1380 t vbt_get_panel_type +ffffffff819f1470 t pnpid_get_panel_type +ffffffff819f1650 t fallback_get_panel_type +ffffffff819f1680 t fill_detail_timing_data +ffffffff819f2000 T icl_pcode_restrict_qgv_points +ffffffff819f2120 T intel_bw_init_hw +ffffffff819f2290 t tgl_get_bw_info +ffffffff819f2880 t icl_get_bw_info +ffffffff819f2c50 T intel_bw_crtc_update +ffffffff819f2d30 t intel_bw_crtc_data_rate +ffffffff819f2e50 T intel_atomic_get_old_bw_state +ffffffff819f2e70 T intel_atomic_get_new_bw_state +ffffffff819f2e90 T intel_atomic_get_bw_state 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fixed_modeset_calc_cdclk +ffffffff819fa4b0 t vlv_get_cdclk +ffffffff819fa570 t chv_set_cdclk +ffffffff819fa8e0 t vlv_modeset_calc_cdclk +ffffffff819faab0 t vlv_set_cdclk +ffffffff819faff0 t fixed_400mhz_get_cdclk +ffffffff819fb020 t fixed_450mhz_get_cdclk +ffffffff819fb050 t gm45_get_cdclk +ffffffff819fb150 t intel_hpll_vco +ffffffff819fb280 t g33_get_cdclk +ffffffff819fb390 t i965gm_get_cdclk +ffffffff819fb490 t pnv_get_cdclk +ffffffff819fb540 t i945gm_get_cdclk +ffffffff819fb5b0 t i915gm_get_cdclk +ffffffff819fb620 t fixed_333mhz_get_cdclk +ffffffff819fb650 t fixed_266mhz_get_cdclk +ffffffff819fb680 t i85x_get_cdclk +ffffffff819fb700 t fixed_200mhz_get_cdclk +ffffffff819fb730 t fixed_133mhz_get_cdclk +ffffffff819fc000 T intel_color_load_luts +ffffffff819fc030 T intel_color_commit_noarm +ffffffff819fc080 T intel_color_commit_arm +ffffffff819fc0b0 T intel_color_post_update +ffffffff819fc100 T intel_color_prepare_commit +ffffffff819fc130 T intel_color_cleanup_commit +ffffffff819fc180 T intel_color_check +ffffffff819fc1a0 T intel_color_get_config +ffffffff819fc220 T intel_color_lut_equal +ffffffff819fc280 T intel_color_assert_luts +ffffffff819fc570 T intel_color_crtc_init +ffffffff819fc5e0 T intel_color_init +ffffffff819fc710 T intel_color_init_hooks +ffffffff819fc840 t chv_color_check +ffffffff819fcd50 t i9xx_color_commit_arm +ffffffff819fcd60 t chv_load_luts +ffffffff819fd160 t chv_read_luts +ffffffff819fd3e0 t chv_lut_equal +ffffffff819fd710 t chv_read_csc +ffffffff819fd830 t intel_color_add_affected_planes +ffffffff819fd9a0 t _check_luts +ffffffff819fdb00 t i965_load_luts +ffffffff819fde70 t i965_read_luts +ffffffff819fe240 t vlv_color_check +ffffffff819fe6e0 t vlv_load_luts +ffffffff819fe890 t i965_lut_equal +ffffffff819fea70 t vlv_read_csc +ffffffff819fec50 t i9xx_color_check +ffffffff819feed0 t i9xx_load_luts +ffffffff819ff340 t i9xx_read_luts +ffffffff819ff6e0 t i9xx_lut_equal +ffffffff819ff8f0 t icl_color_check +ffffffff819ffcf0 t icl_color_commit_noarm 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bdw_read_luts +ffffffff81a03fb0 t ivb_lut_equal +ffffffff81a04370 t ilk_assign_luts +ffffffff81a04590 t ilk_color_commit_noarm +ffffffff81a045e0 t hsw_color_commit_arm +ffffffff81a04690 t ilk_read_csc +ffffffff81a046e0 t ivb_load_luts +ffffffff81a048c0 t ivb_read_luts +ffffffff81a04d70 t ivb_load_lut_10 +ffffffff81a04f70 t ilk_color_commit_arm +ffffffff81a04ff0 t ilk_color_check +ffffffff81a05250 t ilk_load_luts +ffffffff81a054e0 t ilk_read_luts +ffffffff81a05740 t ilk_lut_equal +ffffffff81a06000 T intel_combo_phy_power_up_lanes +ffffffff81a06120 T intel_combo_phy_init +ffffffff81a065c0 T intel_combo_phy_uninit +ffffffff81a06790 t icl_combo_phy_verify_state +ffffffff81a07000 T intel_connector_init +ffffffff81a07070 T intel_connector_alloc +ffffffff81a07100 T intel_connector_free +ffffffff81a07140 T intel_connector_destroy +ffffffff81a071a0 T intel_connector_register +ffffffff81a071b0 T intel_connector_unregister +ffffffff81a071c0 T intel_connector_attach_encoder +ffffffff81a071e0 T intel_connector_get_hw_state +ffffffff81a07230 T intel_connector_get_pipe +ffffffff81a072f0 T intel_connector_update_modes +ffffffff81a07320 T intel_ddc_get_modes +ffffffff81a07390 T intel_attach_force_audio_property +ffffffff81a07430 T intel_attach_broadcast_rgb_property +ffffffff81a074d0 T intel_attach_aspect_ratio_property +ffffffff81a07530 T intel_attach_hdmi_colorspace_property +ffffffff81a07580 T intel_attach_dp_colorspace_property +ffffffff81a075d0 T intel_attach_scaling_mode_property +ffffffff81a08000 T intel_crt_port_enabled +ffffffff81a08080 T intel_crt_reset +ffffffff81a08160 T intel_crt_init +ffffffff81a08590 t hsw_crt_get_config +ffffffff81a08640 t hsw_crt_compute_config +ffffffff81a08730 t hsw_pre_pll_enable_crt +ffffffff81a087a0 t hsw_pre_enable_crt +ffffffff81a08840 t hsw_enable_crt +ffffffff81a089e0 t hsw_disable_crt +ffffffff81a08a50 t hsw_post_disable_crt +ffffffff81a08bf0 t pch_crt_compute_config +ffffffff81a08c40 t pch_disable_crt +ffffffff81a08c70 t pch_post_disable_crt +ffffffff81a08d60 t intel_crt_compute_config +ffffffff81a08db0 t intel_disable_crt +ffffffff81a08ea0 t intel_crt_get_config +ffffffff81a08f40 t intel_crt_get_hw_state +ffffffff81a09000 t intel_enable_crt +ffffffff81a090f0 t intel_spurious_crt_detect_dmi_callback +ffffffff81a09150 t intel_crt_get_modes +ffffffff81a09250 t intel_crt_detect +ffffffff81a094c0 t intel_crt_mode_valid +ffffffff81a095d0 t intel_crt_get_edid +ffffffff81a09670 t intel_crt_detect_hotplug +ffffffff81a09ac0 t intel_crt_detect_ddc +ffffffff81a09b90 t intel_crt_load_detect +ffffffff81a0b000 T intel_first_crtc +ffffffff81a0b020 T intel_crtc_for_pipe +ffffffff81a0b080 T intel_crtc_wait_for_next_vblank +ffffffff81a0b090 T intel_wait_for_vblank_if_active +ffffffff81a0b100 T intel_crtc_get_vblank_counter +ffffffff81a0b180 T intel_crtc_max_vblank_count +ffffffff81a0b210 T intel_crtc_vblank_on +ffffffff81a0b2a0 t assert_vblank_disabled +ffffffff81a0b380 T intel_crtc_vblank_off +ffffffff81a0b3b0 T intel_crtc_state_alloc +ffffffff81a0b450 T intel_crtc_state_reset +ffffffff81a0b4d0 T intel_crtc_init +ffffffff81a0b850 T intel_wait_for_vblank_workers +ffffffff81a0b910 T intel_usecs_to_scanlines +ffffffff81a0b960 T intel_pipe_update_start +ffffffff81a0bd50 T intel_pipe_update_end +ffffffff81a0c060 t intel_crtc_destroy +ffffffff81a0c090 t intel_crtc_late_register +ffffffff81a0c0c0 t intel_crtc_vblank_work +ffffffff81a0d000 T intel_output_format_name +ffffffff81a0d040 T intel_crtc_state_dump +ffffffff81a0e430 t ilk_dump_csc +ffffffff81a0f000 T intel_cursor_plane_create +ffffffff81a0f200 t i845_cursor_max_stride +ffffffff81a0f230 t i845_cursor_update_arm +ffffffff81a0f4b0 t i845_cursor_disable_arm +ffffffff81a0f4d0 t i845_cursor_get_hw_state +ffffffff81a0f580 t i845_check_cursor +ffffffff81a0f710 t i9xx_cursor_max_stride +ffffffff81a0f750 t i9xx_cursor_update_arm +ffffffff81a0fb10 t i9xx_cursor_disable_arm +ffffffff81a0fb30 t i9xx_cursor_get_hw_state +ffffffff81a0fc20 t i9xx_check_cursor +ffffffff81a0fea0 t intel_check_cursor +ffffffff81a100b0 t intel_legacy_cursor_update +ffffffff81a10470 t intel_cursor_format_mod_supported +ffffffff81a11000 T intel_is_c10phy +ffffffff81a11040 T intel_cx0_phy_set_signal_levels +ffffffff81a11630 t intel_cx0_rmw +ffffffff81a11720 T intel_c10pll_readout_hw_state +ffffffff81a118b0 T intel_c10pll_dump_hw_state +ffffffff81a11b30 T intel_cx0_phy_check_hdmi_link_rate +ffffffff81a11ca0 T intel_cx0pll_calc_state +ffffffff81a120b0 T intel_c20pll_readout_hw_state +ffffffff81a125d0 t intel_c20_sram_read +ffffffff81a126e0 T intel_c20pll_dump_hw_state +ffffffff81a12a90 T intel_c10pll_calc_port_clock +ffffffff81a12b70 T intel_c20pll_calc_port_clock +ffffffff81a12c70 T intel_mtl_tbt_calc_port_clock +ffffffff81a12dd0 T intel_mtl_pll_enable +ffffffff81a145d0 T intel_mtl_pll_disable +ffffffff81a14a40 T intel_mtl_port_pll_type +ffffffff81a14ad0 T intel_c10pll_state_verify +ffffffff81a14dc0 t __intel_cx0_read +ffffffff81a15150 t __intel_cx0_write +ffffffff81a154a0 t intel_cx0_bus_reset +ffffffff81a155d0 t intel_cx0_wait_for_ack +ffffffff81a15750 t intel_cx0_powerdown_change_sequence +ffffffff81a159b0 t intel_c20_sram_write +ffffffff81a16000 T hsw_prepare_dp_ddi_buffers +ffffffff81a161a0 T intel_wait_ddi_buf_idle +ffffffff81a163a0 T intel_ddi_set_dp_msa +ffffffff81a16570 T intel_ddi_enable_transcoder_func +ffffffff81a16650 t intel_ddi_transcoder_func_reg_val_get +ffffffff81a16900 T intel_ddi_disable_transcoder_func +ffffffff81a16af0 T intel_ddi_toggle_hdcp_bits +ffffffff81a16c10 T intel_ddi_connector_get_hw_state +ffffffff81a16d60 T intel_ddi_get_hw_state +ffffffff81a16dd0 t intel_ddi_get_encoder_pipes +ffffffff81a17220 T intel_ddi_enable_transcoder_clock +ffffffff81a172e0 T intel_ddi_disable_transcoder_clock +ffffffff81a17350 T intel_ddi_level +ffffffff81a17530 T icl_ddi_combo_get_pll +ffffffff81a175b0 T hsw_ddi_enable_clock +ffffffff81a17670 T hsw_ddi_disable_clock +ffffffff81a176b0 T hsw_ddi_is_clock_enabled +ffffffff81a17710 T intel_ddi_enable_clock +ffffffff81a17750 T intel_ddi_disable_clock +ffffffff81a17790 T intel_ddi_sanitize_encoder_pll_mapping +ffffffff81a17970 T dp_tp_ctl_reg +ffffffff81a179f0 T dp_tp_status_reg +ffffffff81a17a70 T intel_ddi_update_pipe +ffffffff81a17b00 T intel_ddi_update_active_dpll +ffffffff81a17bf0 T intel_ddi_compute_min_voltage_level +ffffffff81a17c70 T intel_ddi_get_clock +ffffffff81a17d80 T intel_ddi_port_pll_type +ffffffff81a17dc0 T hsw_ddi_get_config +ffffffff81a17eb0 t intel_ddi_get_config +ffffffff81a18800 T intel_ddi_init +ffffffff81a19580 t intel_ddi_hotplug +ffffffff81a19990 t intel_ddi_compute_output_type +ffffffff81a19a10 t intel_ddi_compute_config +ffffffff81a19b80 t intel_ddi_compute_config_late +ffffffff81a19e40 t intel_enable_ddi +ffffffff81a1a790 t intel_ddi_pre_pll_enable +ffffffff81a1a980 t intel_ddi_pre_enable +ffffffff81a1b980 t intel_disable_ddi +ffffffff81a1bb30 t intel_ddi_post_pll_disable +ffffffff81a1bc10 t intel_ddi_post_disable +ffffffff81a1c0a0 t intel_ddi_sync_state +ffffffff81a1c160 t intel_ddi_initial_fastset_check +ffffffff81a1c220 t intel_ddi_encoder_suspend +ffffffff81a1c230 t intel_ddi_encoder_shutdown +ffffffff81a1c260 t intel_ddi_get_power_domains +ffffffff81a1c3e0 t mtl_ddi_get_config +ffffffff81a1c4c0 t dg2_ddi_get_config +ffffffff81a1c510 t adls_ddi_enable_clock +ffffffff81a1c680 t adls_ddi_disable_clock +ffffffff81a1c730 t adls_ddi_is_clock_enabled +ffffffff81a1c7d0 t adls_ddi_get_config +ffffffff81a1c890 t rkl_ddi_enable_clock +ffffffff81a1ca10 t rkl_ddi_disable_clock +ffffffff81a1caa0 t rkl_ddi_is_clock_enabled +ffffffff81a1cb20 t rkl_ddi_get_config +ffffffff81a1cbf0 t dg1_ddi_enable_clock +ffffffff81a1cda0 t dg1_ddi_disable_clock +ffffffff81a1ce60 t dg1_ddi_is_clock_enabled +ffffffff81a1cf00 t dg1_ddi_get_config +ffffffff81a1cfd0 t jsl_ddi_tc_enable_clock +ffffffff81a1d060 t jsl_ddi_tc_disable_clock +ffffffff81a1d120 t jsl_ddi_tc_is_clock_enabled +ffffffff81a1d1d0 t icl_ddi_tc_port_pll_type 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lpt_digital_port_connected +ffffffff81a1f9d0 t bdw_digital_port_connected +ffffffff81a1fa40 t hsw_digital_port_connected +ffffffff81a1fab0 t intel_ddi_init_dp_connector +ffffffff81a1fb90 t intel_ddi_init_hdmi_connector +ffffffff81a1fc00 t intel_ddi_encoder_reset +ffffffff81a1fce0 t intel_ddi_encoder_destroy +ffffffff81a1fd90 t intel_ddi_encoder_late_register +ffffffff81a1fdf0 t mtl_ddi_enable_d2d +ffffffff81a1ffb0 t intel_wait_ddi_buf_active +ffffffff81a202c0 t intel_ddi_main_link_aux_domain +ffffffff81a203b0 t icl_program_mg_dp_mode +ffffffff81a20680 t intel_ddi_init_dp_buf_reg +ffffffff81a20880 t intel_disable_ddi_buf +ffffffff81a20a30 t mtl_disable_ddi_buf +ffffffff81a20e50 t intel_ddi_disable_fec_state +ffffffff81a20fa0 t mtl_ddi_prepare_link_retrain +ffffffff81a212e0 t intel_ddi_prepare_link_retrain +ffffffff81a217e0 t intel_ddi_set_link_train +ffffffff81a21930 t intel_ddi_set_idle_link_train +ffffffff81a21b00 t intel_ddi_dp_voltage_max +ffffffff81a21bc0 t intel_ddi_dp_preemph_max +ffffffff81a22000 T is_hobl_buf_trans +ffffffff81a22040 T intel_ddi_buf_trans_init +ffffffff81a22300 t mtl_get_cx0_buf_trans +ffffffff81a223e0 t dg2_get_snps_buf_trans +ffffffff81a22450 t adlp_get_combo_buf_trans +ffffffff81a22570 t adlp_get_dkl_buf_trans +ffffffff81a225d0 t adls_get_combo_buf_trans +ffffffff81a226f0 t rkl_get_combo_buf_trans +ffffffff81a22810 t dg1_get_combo_buf_trans +ffffffff81a22930 t tgl_get_combo_buf_trans +ffffffff81a22a70 t tgl_get_dkl_buf_trans +ffffffff81a22ad0 t jsl_get_combo_buf_trans +ffffffff81a22b70 t ehl_get_combo_buf_trans +ffffffff81a22c10 t icl_get_combo_buf_trans +ffffffff81a22cc0 t icl_get_mg_buf_trans +ffffffff81a22d20 t bxt_get_buf_trans +ffffffff81a22da0 t kbl_y_get_buf_trans +ffffffff81a22e40 t kbl_u_get_buf_trans +ffffffff81a22ee0 t kbl_get_buf_trans +ffffffff81a22f80 t skl_y_get_buf_trans +ffffffff81a23020 t skl_u_get_buf_trans +ffffffff81a230c0 t skl_get_buf_trans +ffffffff81a23160 t bdw_get_buf_trans +ffffffff81a231f0 t hsw_get_buf_trans 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+ffffffff81a250e0 T intel_plane_fixup_bitmasks +ffffffff81a25190 T intel_plane_disable_noatomic +ffffffff81a25380 T intel_plane_fence_y_offset +ffffffff81a253e0 T intel_has_pending_fb_unpin +ffffffff81a254d0 T intel_get_crtc_new_encoder +ffffffff81a25660 T ilk_pfit_disable +ffffffff81a25720 T intel_phy_is_combo +ffffffff81a25790 T intel_phy_is_tc +ffffffff81a25800 T intel_phy_is_snps +ffffffff81a25850 T intel_port_to_phy +ffffffff81a25900 T intel_port_to_tc +ffffffff81a25a10 T intel_aux_power_domain +ffffffff81a25a50 T intel_modeset_get_crtc_power_domains +ffffffff81a25c80 T intel_modeset_put_crtc_power_domains +ffffffff81a25cb0 T intel_encoder_destroy +ffffffff81a25ce0 T intel_encoder_get_config +ffffffff81a25d10 t intel_crtc_readout_derived_state +ffffffff81a26150 T intel_link_compute_m_n +ffffffff81a26280 T intel_panel_sanitize_ssc +ffffffff81a26360 T intel_zero_m_n +ffffffff81a263a0 T intel_set_m_n +ffffffff81a26460 T intel_cpu_transcoder_has_m2_n2 +ffffffff81a264c0 T intel_cpu_transcoder_set_m1_n1 +ffffffff81a26670 T intel_cpu_transcoder_set_m2_n2 +ffffffff81a267d0 T i9xx_set_pipeconf +ffffffff81a26980 T ilk_set_pipeconf +ffffffff81a26b50 T bdw_get_pipe_misc_bpp +ffffffff81a26c20 T ilk_get_lanes_required +ffffffff81a26c80 T intel_get_m_n +ffffffff81a26d90 T intel_cpu_transcoder_get_m1_n1 +ffffffff81a26f20 T intel_cpu_transcoder_get_m2_n2 +ffffffff81a27080 T intel_crtc_get_pipe_config +ffffffff81a270f0 T i9xx_crtc_clock_get +ffffffff81a27380 T intel_dotclock_calculate +ffffffff81a273e0 T intel_crtc_dotclock +ffffffff81a274b0 T intel_encoder_current_mode +ffffffff81a27660 T intel_fuzzy_clock_check +ffffffff81a276b0 T intel_pipe_config_compare +ffffffff81a2aa00 t pipe_config_mismatch +ffffffff81a2aaf0 t pipe_config_infoframe_mismatch +ffffffff81a2ac90 T intel_modeset_all_pipes +ffffffff81a2aea0 T intel_atomic_add_affected_planes +ffffffff81a2af70 T intel_calc_active_pipes +ffffffff81a2b000 T intel_atomic_check +ffffffff81a2d010 t copy_bigjoiner_crtc_state_nomodeset +ffffffff81a2d120 t intel_atomic_check_planes +ffffffff81a2db90 t intel_modeset_checks +ffffffff81a2dd20 t intel_atomic_check_crtcs +ffffffff81a2e140 t intel_async_flip_check_hw +ffffffff81a2e610 T intel_crtc_arm_fifo_underrun +ffffffff81a2e6b0 T intel_atomic_helper_free_state_worker +ffffffff81a2e730 T intel_atomic_commit +ffffffff81a2ea90 t intel_atomic_commit_ready +ffffffff81a2eb20 t intel_atomic_commit_work +ffffffff81a2eb40 t intel_atomic_commit_tail +ffffffff81a2fcc0 T intel_plane_destroy +ffffffff81a2fcf0 T intel_get_pipe_from_crtc_id_ioctl +ffffffff81a2fd60 T assert_port_valid +ffffffff81a2fde0 T intel_setup_outputs +ffffffff81a30670 T intel_mode_valid +ffffffff81a307f0 T intel_cpu_transcoder_mode_valid +ffffffff81a308b0 T intel_mode_valid_max_plane_size +ffffffff81a30930 T intel_init_display_hooks +ffffffff81a309b0 T intel_initial_commit +ffffffff81a30b50 T i830_enable_pipe +ffffffff81a31190 T i830_disable_pipe +ffffffff81a314c0 T intel_hpd_poll_fini +ffffffff81a315c0 T intel_scanout_needs_vtd_wa +ffffffff81a31600 t intel_crtc_copy_uapi_to_hw_state_modeset +ffffffff81a31760 t intel_atomic_cleanup_work +ffffffff81a31860 t intel_pre_plane_update +ffffffff81a31dc0 t hsw_get_pipe_config +ffffffff81a329f0 t hsw_crtc_enable +ffffffff81a33450 t hsw_crtc_disable +ffffffff81a33750 t skl_commit_modeset_enables +ffffffff81a33d20 t intel_get_transcoder_timings +ffffffff81a34030 t intel_get_pipe_src_size +ffffffff81a34150 t ilk_get_pfit_config +ffffffff81a342d0 t enabled_bigjoiner_pipes +ffffffff81a344f0 t bdw_set_pipe_misc +ffffffff81a34640 t ilk_pfit_enable +ffffffff81a34770 t intel_set_transcoder_timings +ffffffff81a34b30 t intel_update_crtc +ffffffff81a35190 t intel_commit_modeset_enables +ffffffff81a352b0 t ilk_get_pipe_config +ffffffff81a35500 t ilk_crtc_enable +ffffffff81a358a0 t ilk_crtc_disable +ffffffff81a35b30 t i9xx_get_pipe_config +ffffffff81a362b0 t valleyview_crtc_enable +ffffffff81a36710 t i9xx_crtc_disable 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ivb_display_irq_handler +ffffffff81a3b7e0 T gen8_de_pipe_underrun_mask +ffffffff81a3b820 T gen8_de_irq_handler +ffffffff81a3c3d0 T gen11_gu_misc_irq_ack +ffffffff81a3c420 T gen11_gu_misc_irq_handler +ffffffff81a3c460 T gen11_display_irq_handler +ffffffff81a3c4f0 T i8xx_enable_vblank +ffffffff81a3c560 T i915gm_enable_vblank +ffffffff81a3c610 T i965_enable_vblank +ffffffff81a3c680 T ilk_enable_vblank +ffffffff81a3c730 T bdw_enable_vblank +ffffffff81a3c8e0 T i8xx_disable_vblank +ffffffff81a3c940 T i915gm_disable_vblank +ffffffff81a3ca00 T i965_disable_vblank +ffffffff81a3ca60 T ilk_disable_vblank +ffffffff81a3cb60 T bdw_disable_vblank +ffffffff81a3cce0 T vlv_display_irq_reset +ffffffff81a3cdd0 T vlv_display_irq_postinstall +ffffffff81a3cf20 T gen8_display_irq_reset +ffffffff81a3d0b0 T gen11_display_irq_reset +ffffffff81a3d380 T gen8_irq_power_well_post_enable +ffffffff81a3d4f0 T gen8_irq_power_well_pre_disable +ffffffff81a3d600 T valleyview_enable_display_irqs +ffffffff81a3d720 T valleyview_disable_display_irqs +ffffffff81a3d830 T ilk_de_irq_postinstall +ffffffff81a3d940 T gen8_de_irq_postinstall +ffffffff81a3ddb0 T gen11_de_irq_postinstall +ffffffff81a3de20 T dg1_de_irq_postinstall +ffffffff81a3de90 T intel_display_irq_init +ffffffff81a3e000 T intel_display_power_domain_str +ffffffff81a3e060 T __intel_display_power_is_enabled +ffffffff81a3e120 T intel_display_power_is_enabled +ffffffff81a3e240 T intel_display_power_set_target_dc_state +ffffffff81a3e360 T intel_display_power_get +ffffffff81a3e3e0 t __intel_display_power_get_domain +ffffffff81a3e5d0 T intel_display_power_get_if_enabled +ffffffff81a3e700 T __intel_display_power_put_async +ffffffff81a3e8f0 t __intel_display_power_put_domain +ffffffff81a3ea60 T intel_display_power_flush_work +ffffffff81a3eb80 t release_async_put_domains +ffffffff81a3ec70 T intel_display_power_put_unchecked +ffffffff81a3ecd0 T intel_display_power_get_in_set +ffffffff81a3edb0 T intel_display_power_get_in_set_if_enabled +ffffffff81a3ee60 T intel_display_power_put_mask_in_set +ffffffff81a3ef30 T intel_power_domains_init +ffffffff81a3f180 t intel_display_power_put_async_work +ffffffff81a3f3f0 T intel_power_domains_cleanup +ffffffff81a3f410 T gen9_dbuf_slices_update +ffffffff81a3f620 T intel_power_domains_init_hw +ffffffff81a3fb20 t icl_display_core_init +ffffffff81a40320 t bxt_display_core_init +ffffffff81a40470 t vlv_cmnlane_wa +ffffffff81a40540 t assert_ved_power_gated +ffffffff81a405f0 t hsw_assert_cdclk +ffffffff81a40700 t intel_pch_reset_handshake +ffffffff81a407b0 T intel_power_domains_driver_remove +ffffffff81a408a0 T intel_power_domains_sanitize_state +ffffffff81a40990 T intel_power_domains_enable +ffffffff81a409f0 T intel_power_domains_disable +ffffffff81a40aa0 T intel_power_domains_suspend +ffffffff81a40c50 t icl_display_core_uninit +ffffffff81a40d60 t bxt_display_core_uninit +ffffffff81a40e20 T intel_power_domains_resume +ffffffff81a40ef0 T intel_display_power_suspend_late +ffffffff81a40fd0 t hsw_enable_pc8 +ffffffff81a41c80 T intel_display_power_resume_early +ffffffff81a41d70 t hsw_disable_pc8 +ffffffff81a42190 T intel_display_power_suspend +ffffffff81a42210 T intel_display_power_resume +ffffffff81a422f0 T intel_display_power_debug +ffffffff81a423b0 T intel_display_power_ddi_io_domain +ffffffff81a424a0 T intel_display_power_ddi_lanes_domain +ffffffff81a42590 T intel_display_power_aux_io_domain +ffffffff81a426a0 T intel_display_power_legacy_aux_domain +ffffffff81a427b0 T intel_display_power_tbt_aux_domain +ffffffff81a428c0 t __delayed_work_tick +ffffffff81a43000 T intel_display_power_map_init +ffffffff81a43180 t __set_power_wells +ffffffff81a43560 T intel_display_power_map_cleanup +ffffffff81a44000 T lookup_power_well +ffffffff81a440c0 T intel_power_well_enable +ffffffff81a44150 T intel_power_well_name +ffffffff81a44190 T intel_power_well_disable +ffffffff81a44200 T intel_power_well_sync_hw +ffffffff81a44270 T intel_power_well_get +ffffffff81a44310 T intel_power_well_put +ffffffff81a44410 T intel_power_well_is_enabled +ffffffff81a44430 T intel_power_well_is_enabled_cached +ffffffff81a44460 T intel_display_power_well_is_enabled +ffffffff81a44510 T intel_power_well_is_always_on +ffffffff81a44550 T intel_power_well_domains +ffffffff81a44580 T intel_power_well_refcount +ffffffff81a445b0 T gen9_sanitize_dc_state +ffffffff81a44680 T gen9_set_dc_state +ffffffff81a449e0 T gen9_enable_dc5 +ffffffff81a44c40 T skl_enable_dc6 +ffffffff81a44da0 T bxt_enable_dc9 +ffffffff81a44f50 T bxt_disable_dc9 +ffffffff81a45040 T gen9_disable_dc_states +ffffffff81a45410 T chv_phy_powergate_ch +ffffffff81a45520 t assert_chv_phy_status +ffffffff81a458d0 T chv_phy_powergate_lanes +ffffffff81a45b30 t i9xx_power_well_sync_hw_noop +ffffffff81a45b60 t i9xx_always_on_power_well_noop +ffffffff81a45b90 t i9xx_always_on_power_well_enabled +ffffffff81a45bc0 t chv_pipe_power_well_sync_hw +ffffffff81a45bf0 t chv_pipe_power_well_enable +ffffffff81a45c20 t chv_pipe_power_well_disable +ffffffff81a45c80 t chv_pipe_power_well_enabled +ffffffff81a45d80 t chv_dpio_cmn_power_well_enable +ffffffff81a45f90 t chv_dpio_cmn_power_well_disable +ffffffff81a460c0 t vlv_power_well_enabled +ffffffff81a461e0 t i830_pipes_power_well_sync_hw +ffffffff81a462d0 t i830_pipes_power_well_enable +ffffffff81a46390 t i830_pipes_power_well_disable +ffffffff81a463c0 t i830_pipes_power_well_enabled +ffffffff81a46460 t hsw_power_well_sync_hw +ffffffff81a46550 t hsw_power_well_enable +ffffffff81a467d0 t hsw_power_well_disable +ffffffff81a46890 t hsw_power_well_enabled +ffffffff81a46970 t gen9_dc_off_power_well_enable +ffffffff81a46980 t gen9_dc_off_power_well_disable +ffffffff81a46a20 t gen9_dc_off_power_well_enabled +ffffffff81a46ab0 t bxt_dpio_cmn_power_well_enable +ffffffff81a46ae0 t bxt_dpio_cmn_power_well_disable +ffffffff81a46b10 t bxt_dpio_cmn_power_well_enabled +ffffffff81a46b40 t vlv_display_power_well_enable +ffffffff81a46b70 t vlv_display_power_well_disable +ffffffff81a46be0 t vlv_dpio_cmn_power_well_enable +ffffffff81a46c60 t vlv_dpio_cmn_power_well_disable +ffffffff81a46d60 t vlv_power_well_enable +ffffffff81a46d80 t vlv_power_well_disable +ffffffff81a46da0 t icl_aux_power_well_enable +ffffffff81a47430 t icl_aux_power_well_disable +ffffffff81a476c0 t tgl_tc_cold_off_power_well_sync_hw +ffffffff81a476e0 t tgl_tc_cold_off_power_well_enable +ffffffff81a47700 t tgl_tc_cold_off_power_well_disable +ffffffff81a47720 t tgl_tc_cold_off_power_well_is_enabled +ffffffff81a47750 t xelpdp_aux_power_well_enable +ffffffff81a47820 t xelpdp_aux_power_well_disable +ffffffff81a478f0 t xelpdp_aux_power_well_enabled +ffffffff81a479a0 t chv_set_pipe_power_well +ffffffff81a47ba0 t vlv_display_power_well_init +ffffffff81a47f00 t vlv_set_power_well +ffffffff81a48120 t hsw_wait_for_power_well_enable +ffffffff81a48270 t hsw_wait_for_power_well_disable +ffffffff81a48540 t tgl_tc_cold_request +ffffffff81a49000 T intel_display_reset_prepare +ffffffff81a491e0 T intel_display_reset_finish +ffffffff81a4a000 T intel_display_rps_boost_after_vblank +ffffffff81a4a110 t do_rps_boost +ffffffff81a4a1c0 T intel_display_rps_mark_interactive +ffffffff81a4b000 T intel_dkl_phy_init +ffffffff81a4b020 T intel_dkl_phy_read +ffffffff81a4b150 T intel_dkl_phy_write +ffffffff81a4b260 T intel_dkl_phy_rmw +ffffffff81a4b390 T intel_dkl_phy_posting_read +ffffffff81a4c000 T intel_dmc_has_payload +ffffffff81a4c050 T intel_dmc_enable_pipe +ffffffff81a4c160 T intel_dmc_disable_pipe +ffffffff81a4c270 T intel_dmc_load_program +ffffffff81a4caa0 t pipedmc_clock_gating_wa +ffffffff81a4cc90 T intel_dmc_disable_program +ffffffff81a4cec0 T assert_dmc_loaded +ffffffff81a4d040 T intel_dmc_init +ffffffff81a4d300 t dmc_load_work_fn +ffffffff81a4dc10 T intel_dmc_suspend +ffffffff81a4dca0 T intel_dmc_resume +ffffffff81a4dd40 T intel_dmc_fini +ffffffff81a4de90 T intel_dmc_print_error_state +ffffffff81a4df90 T intel_dmc_debugfs_register +ffffffff81a4e000 T intel_dp_is_edp +ffffffff81a4e030 T intel_dp_is_uhbr +ffffffff81a4e070 T intel_dp_max_lane_count +ffffffff81a4e0e0 T intel_dp_link_required +ffffffff81a4e120 T intel_dp_max_data_rate +ffffffff81a4e180 T intel_dp_can_bigjoiner +ffffffff81a4e1d0 T intel_dp_get_link_train_fallback_values +ffffffff81a4e580 T intel_dp_mode_to_fec_clock +ffffffff81a4e5d0 T intel_dp_dsc_nearest_valid_bpp +ffffffff81a4e6d0 T intel_dp_dsc_get_output_bpp +ffffffff81a4e7f0 T intel_dp_dsc_get_slice_count +ffffffff81a4e980 T intel_dp_min_bpp +ffffffff81a4e9c0 T intel_dp_need_bigjoiner +ffffffff81a4ea20 T intel_dp_source_supports_tps3 +ffffffff81a4ea70 T intel_dp_source_supports_tps4 +ffffffff81a4eab0 T intel_dp_max_link_rate +ffffffff81a4eb60 T intel_dp_rate_select +ffffffff81a4ec00 T intel_dp_compute_rate +ffffffff81a4ecd0 T intel_dp_has_hdmi_sink +ffffffff81a4ed10 T intel_dp_adjust_compliance_config +ffffffff81a4ee50 T intel_dp_dsc_compute_bpp +ffffffff81a4ef00 T intel_dp_dsc_compute_config +ffffffff81a4f5d0 T intel_dp_limited_color_range +ffffffff81a4f640 T intel_dp_compute_psr_vsc_sdp +ffffffff81a4f6c0 T intel_dp_needs_vsc_sdp +ffffffff81a4f710 t intel_dp_compute_vsc_colorimetry +ffffffff81a4f890 T intel_dp_compute_config +ffffffff81a4fce0 t intel_dp_compute_output_format +ffffffff81a4ff10 t intel_dp_audio_compute_config +ffffffff81a4fff0 t intel_dp_drrs_compute_config +ffffffff81a50190 t intel_dp_compute_vsc_sdp +ffffffff81a50230 t intel_dp_compute_hdr_metadata_infoframe_sdp +ffffffff81a502c0 T intel_dp_set_link_params +ffffffff81a50300 T intel_edp_backlight_on +ffffffff81a503a0 T intel_edp_backlight_off +ffffffff81a50430 T intel_dp_sink_set_decompression_state +ffffffff81a504d0 T intel_dp_wait_source_oui +ffffffff81a505c0 T intel_dp_set_power +ffffffff81a507e0 T intel_dp_sync_state +ffffffff81a50860 t intel_dp_get_dpcd +ffffffff81a509c0 t intel_dp_reset_max_link_params +ffffffff81a50ac0 T intel_dp_initial_fastset_check +ffffffff81a50bf0 T intel_dp_check_frl_training +ffffffff81a511a0 T intel_dp_pcon_dsc_configure +ffffffff81a51390 T intel_dp_configure_protocol_converter +ffffffff81a51570 T intel_dp_get_colorimetry_status +ffffffff81a515d0 T intel_edp_fixup_vbt_bpp +ffffffff81a51660 T intel_write_dp_vsc_sdp +ffffffff81a51800 T intel_dp_set_infoframes +ffffffff81a51920 t intel_write_dp_sdp +ffffffff81a51c00 T intel_read_dp_sdp +ffffffff81a51f20 T intel_dp_get_active_pipes +ffffffff81a52140 T intel_dp_retrain_link +ffffffff81a523f0 t intel_dp_needs_link_retrain +ffffffff81a52570 T intel_dp_phy_test +ffffffff81a52c20 T intel_digital_port_connected +ffffffff81a52cd0 T intel_dp_encoder_flush_work +ffffffff81a52d30 T intel_dp_encoder_suspend +ffffffff81a52d70 T intel_dp_encoder_shutdown +ffffffff81a52db0 T intel_dp_hpd_pulse +ffffffff81a53420 T intel_dp_is_port_edp +ffffffff81a534b0 T intel_dp_init_connector +ffffffff81a54610 t intel_dp_modeset_retry_work_fn +ffffffff81a546b0 t intel_dp_set_common_rates +ffffffff81a54830 T intel_dp_mst_suspend +ffffffff81a548d0 T intel_dp_mst_resume +ffffffff81a54980 t intel_dp_output_format +ffffffff81a54ac0 t intel_dp_compute_link_config +ffffffff81a55280 t intel_dp_tmds_clock_valid +ffffffff81a55320 t intel_dp_set_sink_rates +ffffffff81a55550 t intel_dp_check_device_service_irq +ffffffff81a55b20 t intel_dp_force +ffffffff81a55c50 t intel_dp_connector_register +ffffffff81a55d20 t intel_dp_connector_unregister +ffffffff81a55d80 t intel_dp_oob_hotplug_event +ffffffff81a55e00 t intel_dp_set_edid +ffffffff81a56200 t intel_dp_get_modes +ffffffff81a562f0 t intel_dp_detect +ffffffff81a56bb0 t intel_dp_mode_valid +ffffffff81a56f30 t intel_dp_connector_atomic_check +ffffffff81a572a0 t intel_dp_get_dsc_sink_cap +ffffffff81a57410 t intel_dp_mode_min_output_bpp +ffffffff81a57470 t intel_dp_mode_valid_downstream +ffffffff81a57630 t icl_max_source_rate +ffffffff81a58000 T intel_dp_aux_pack +ffffffff81a58070 T intel_dp_aux_fini +ffffffff81a58090 T intel_dp_aux_init +ffffffff81a582a0 t xelpdp_aux_ctl_reg +ffffffff81a58370 t xelpdp_aux_data_reg +ffffffff81a58440 t tgl_aux_ctl_reg +ffffffff81a584c0 t tgl_aux_data_reg +ffffffff81a58550 t skl_aux_ctl_reg +ffffffff81a585d0 t skl_aux_data_reg +ffffffff81a58660 t ilk_aux_ctl_reg +ffffffff81a586e0 t ilk_aux_data_reg +ffffffff81a58770 t g4x_aux_ctl_reg +ffffffff81a587f0 t g4x_aux_data_reg +ffffffff81a58890 t skl_get_aux_clock_divider +ffffffff81a588c0 t hsw_get_aux_clock_divider +ffffffff81a58950 t ilk_get_aux_clock_divider +ffffffff81a589b0 t g4x_get_aux_clock_divider +ffffffff81a58a00 t skl_get_aux_send_ctl +ffffffff81a58a80 t g4x_get_aux_send_ctl +ffffffff81a58ae0 t kasprintf +ffffffff81a58bb0 t intel_dp_aux_transfer +ffffffff81a58e40 T intel_dp_aux_ch +ffffffff81a58fa0 T intel_dp_aux_irq_handler +ffffffff81a59040 t intel_dp_aux_xfer +ffffffff81a5a000 T intel_dp_aux_init_backlight_funcs +ffffffff81a5a260 t intel_dp_aux_hdr_setup_backlight +ffffffff81a5a3e0 t intel_dp_aux_hdr_get_backlight +ffffffff81a5a560 t intel_dp_aux_hdr_set_backlight +ffffffff81a5a660 t intel_dp_aux_hdr_disable_backlight +ffffffff81a5a6e0 t intel_dp_aux_hdr_enable_backlight +ffffffff81a5a910 t intel_dp_aux_vesa_setup_backlight +ffffffff81a5ab70 t intel_dp_aux_vesa_get_backlight +ffffffff81a5aba0 t intel_dp_aux_vesa_set_backlight +ffffffff81a5ac40 t intel_dp_aux_vesa_disable_backlight +ffffffff81a5acf0 t intel_dp_aux_vesa_enable_backlight +ffffffff81a5b000 T intel_dp_hdcp_init +ffffffff81a5b0b0 t intel_dp_hdcp_write_an_aksv +ffffffff81a5b1a0 t intel_dp_hdcp_read_bksv +ffffffff81a5b230 t intel_dp_hdcp_read_bstatus +ffffffff81a5b2c0 t intel_dp_hdcp_repeater_present +ffffffff81a5b370 t intel_dp_hdcp_read_ri_prime +ffffffff81a5b400 t intel_dp_hdcp_read_ksv_ready +ffffffff81a5b4a0 t intel_dp_hdcp_read_ksv_fifo +ffffffff81a5b590 t intel_dp_hdcp_read_v_prime_part +ffffffff81a5b630 t intel_dp_hdcp_toggle_signalling +ffffffff81a5b660 t intel_dp_mst_hdcp_stream_encryption +ffffffff81a5b850 t intel_dp_hdcp_check_link +ffffffff81a5b8e0 t intel_dp_hdcp_capable +ffffffff81a5b990 t intel_dp_hdcp2_capable +ffffffff81a5ba10 t intel_dp_hdcp2_write_msg +ffffffff81a5bbc0 t intel_dp_hdcp2_read_msg +ffffffff81a5c290 t intel_dp_hdcp2_config_stream_type +ffffffff81a5c2f0 t intel_dp_mst_hdcp2_stream_encryption +ffffffff81a5c550 t intel_dp_mst_hdcp2_check_link +ffffffff81a5c610 t intel_dp_hdcp2_check_link +ffffffff81a5d000 T intel_dp_init_lttpr_and_dprx_caps +ffffffff81a5d0d0 t intel_dp_init_lttpr +ffffffff81a5d3b0 T intel_dp_get_adjust_train +ffffffff81a5dab0 T intel_dp_program_link_training_pattern +ffffffff81a5dbd0 T intel_dp_set_signal_levels +ffffffff81a5df70 T intel_dp_dump_link_status +ffffffff81a5e060 T intel_dp_stop_link_train +ffffffff81a5e310 T intel_dp_start_link_train +ffffffff81a600a0 T intel_dp_128b132b_sdp_crc16 +ffffffff81a60170 t intel_dp_link_train_phy +ffffffff81a62000 T intel_dp_mst_encoder_active_links +ffffffff81a62030 T intel_dp_mst_encoder_init +ffffffff81a62270 T intel_dp_mst_source_support +ffffffff81a622b0 T intel_dp_mst_encoder_cleanup +ffffffff81a62310 T intel_dp_mst_is_master_trans +ffffffff81a62350 T intel_dp_mst_is_slave_trans +ffffffff81a62390 T intel_dp_mst_add_topology_state_for_crtc +ffffffff81a62450 t intel_dp_add_mst_connector +ffffffff81a62680 t intel_dp_mst_poll_hpd_irq +ffffffff81a626a0 t intel_dp_mst_get_hw_state +ffffffff81a62700 t intel_dp_mst_connector_late_register +ffffffff81a62770 t intel_dp_mst_connector_early_unregister +ffffffff81a627a0 t intel_dp_mst_get_modes +ffffffff81a62840 t intel_dp_mst_detect +ffffffff81a62940 t intel_dp_mst_mode_valid_ctx +ffffffff81a62b60 t intel_mst_atomic_best_encoder +ffffffff81a62bc0 t intel_dp_mst_atomic_check +ffffffff81a62d30 t intel_dp_mst_compute_config +ffffffff81a63280 t intel_dp_mst_compute_config_late +ffffffff81a63380 t intel_mst_disable_dp +ffffffff81a63460 t intel_mst_post_disable_dp +ffffffff81a63710 t intel_mst_post_pll_disable_dp +ffffffff81a63770 t intel_mst_pre_pll_enable_dp +ffffffff81a637b0 t intel_mst_pre_enable_dp +ffffffff81a639d0 t intel_mst_enable_dp +ffffffff81a63d70 t intel_dp_mst_enc_get_hw_state +ffffffff81a63db0 t intel_dp_mst_enc_get_config +ffffffff81a63dd0 t intel_dp_mst_initial_fastset_check +ffffffff81a63df0 t intel_dp_mst_encoder_destroy +ffffffff81a63e20 t intel_dp_mst_find_vcpi_slots_for_bpp +ffffffff81a65000 T bxt_port_to_phy_channel +ffffffff81a65110 T bxt_ddi_phy_set_signal_levels +ffffffff81a654e0 T bxt_ddi_phy_is_enabled +ffffffff81a65610 T bxt_ddi_phy_uninit +ffffffff81a656f0 T bxt_ddi_phy_init +ffffffff81a65910 t _bxt_ddi_phy_init +ffffffff81a65e50 T bxt_ddi_phy_verify_state +ffffffff81a66130 t __phy_reg_verify_state +ffffffff81a66230 T bxt_ddi_phy_calc_lane_lat_optim_mask +ffffffff81a662a0 T bxt_ddi_phy_set_lane_optim_mask +ffffffff81a66500 T bxt_ddi_phy_get_lane_lat_optim_mask +ffffffff81a666e0 T vlv_dig_port_to_channel +ffffffff81a66750 T vlv_dig_port_to_phy +ffffffff81a667c0 T vlv_pipe_to_channel +ffffffff81a66820 T chv_set_phy_signal_level +ffffffff81a66b70 T chv_data_lane_soft_reset +ffffffff81a66d40 T chv_phy_pre_pll_enable +ffffffff81a66fe0 T chv_phy_pre_encoder_enable +ffffffff81a67240 T chv_phy_release_cl2_override +ffffffff81a672d0 T chv_phy_post_pll_disable +ffffffff81a67380 T vlv_set_phy_signal_level +ffffffff81a674f0 T vlv_phy_pre_pll_enable +ffffffff81a675f0 T vlv_phy_pre_encoder_enable +ffffffff81a676f0 T vlv_phy_reset_lanes +ffffffff81a68000 T pnv_calc_dpll_params +ffffffff81a680c0 T i9xx_calc_dpll_params +ffffffff81a68190 T vlv_calc_dpll_params +ffffffff81a68250 T chv_calc_dpll_params +ffffffff81a68320 T bxt_find_best_dpll +ffffffff81a68340 t chv_find_best_dpll +ffffffff81a68680 T i9xx_dpll_compute_fp +ffffffff81a686c0 T vlv_compute_dpll +ffffffff81a68740 T chv_compute_dpll +ffffffff81a687c0 T intel_dpll_crtc_compute_clock +ffffffff81a688c0 T intel_dpll_crtc_get_shared_dpll +ffffffff81a68a10 T intel_dpll_init_clock_hook +ffffffff81a68b20 T i9xx_enable_pll +ffffffff81a68ef0 T vlv_enable_pll +ffffffff81a69410 T chv_enable_pll +ffffffff81a699e0 T vlv_force_pll_on +ffffffff81a69b30 T vlv_disable_pll +ffffffff81a69c00 T chv_disable_pll +ffffffff81a69d30 T i9xx_disable_pll +ffffffff81a69e50 T vlv_force_pll_off +ffffffff81a69f50 T assert_pll_enabled +ffffffff81a6a050 T assert_pll_disabled +ffffffff81a6a150 t intel_pll_is_valid +ffffffff81a6a210 t mtl_crtc_compute_clock +ffffffff81a6a2d0 t dg2_crtc_compute_clock +ffffffff81a6a350 t hsw_crtc_compute_clock +ffffffff81a6a410 t hsw_crtc_get_shared_dpll +ffffffff81a6a4b0 t ilk_crtc_compute_clock +ffffffff81a6a7b0 t ilk_crtc_get_shared_dpll +ffffffff81a6a800 t g4x_find_best_dpll +ffffffff81a6ab40 t chv_crtc_compute_clock +ffffffff81a6ac50 t vlv_crtc_compute_clock +ffffffff81a6b0f0 t g4x_crtc_compute_clock +ffffffff81a6b250 t i9xx_compute_dpll +ffffffff81a6b4d0 t pnv_crtc_compute_clock +ffffffff81a6b8b0 t i9xx_crtc_compute_clock +ffffffff81a6b9d0 t i9xx_find_best_dpll +ffffffff81a6bd10 t i8xx_crtc_compute_clock +ffffffff81a6c000 T intel_get_shared_dpll_by_id +ffffffff81a6c040 T assert_shared_dpll +ffffffff81a6c1f0 T intel_dpll_get_hw_state +ffffffff81a6c220 T icl_tc_port_to_pll_id +ffffffff81a6c250 T intel_enable_shared_dpll +ffffffff81a6c5b0 T intel_disable_shared_dpll +ffffffff81a6c840 T intel_unreference_shared_dpll_crtc +ffffffff81a6c940 T intel_shared_dpll_swap_state +ffffffff81a6ca20 T icl_set_active_port_dpll +ffffffff81a6ca60 T intel_shared_dpll_init +ffffffff81a6cc60 T intel_compute_shared_dplls +ffffffff81a6ccf0 T intel_reserve_shared_dplls +ffffffff81a6cd80 T intel_release_shared_dplls +ffffffff81a6cdc0 T intel_update_active_dpll +ffffffff81a6ce20 T intel_dpll_get_freq +ffffffff81a6ceb0 T intel_dpll_update_ref_clks +ffffffff81a6cf00 T intel_dpll_readout_hw_state +ffffffff81a6d130 T intel_dpll_sanitize_state +ffffffff81a6d210 T intel_dpll_dump_hw_state +ffffffff81a6d290 T intel_shared_dpll_state_verify +ffffffff81a6d470 t verify_single_dpll_state +ffffffff81a6d9e0 T intel_shared_dpll_verify_disabled +ffffffff81a6da60 t icl_compute_dplls +ffffffff81a6e6a0 t icl_get_dplls +ffffffff81a6e970 t icl_put_dplls +ffffffff81a6ea30 t icl_update_active_dpll +ffffffff81a6eae0 t icl_update_dpll_ref_clks +ffffffff81a6eb20 t icl_dump_hw_state +ffffffff81a6ebe0 t combo_pll_enable +ffffffff81a6edf0 t combo_pll_disable +ffffffff81a6eec0 t combo_pll_get_hw_state +ffffffff81a6ef40 t icl_ddi_combo_pll_get_freq +ffffffff81a6f110 t icl_dpll_write +ffffffff81a6f350 t adlp_cmtg_clock_gating_wa +ffffffff81a6f4b0 t icl_pll_disable +ffffffff81a6f650 t icl_pll_get_hw_state +ffffffff81a6f930 t tbt_pll_enable +ffffffff81a6fae0 t tbt_pll_disable +ffffffff81a6fb00 t tbt_pll_get_hw_state +ffffffff81a6fb20 t icl_ddi_tbt_pll_get_freq +ffffffff81a6fb90 t mg_pll_enable +ffffffff81a701a0 t mg_pll_disable +ffffffff81a701e0 t dkl_pll_get_hw_state +ffffffff81a703f0 t icl_ddi_mg_pll_get_freq +ffffffff81a704d0 t icl_calc_dpll_state +ffffffff81a70610 t intel_find_shared_dpll +ffffffff81a70930 t intel_reference_shared_dpll +ffffffff81a70b50 t intel_unreference_shared_dpll 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intel_dpt_create +ffffffff81a757e0 t dpt_insert_page +ffffffff81a75850 t dpt_clear_range +ffffffff81a75880 t dpt_insert_entries +ffffffff81a75970 t dpt_cleanup +ffffffff81a759c0 t dpt_bind_vma +ffffffff81a75a50 t dpt_unbind_vma +ffffffff81a75a80 T intel_dpt_destroy +ffffffff81a75ad0 T intel_dpt_configure +ffffffff81a75c70 t __ww_mutex_lock +ffffffff81a76000 T intel_drrs_type_str +ffffffff81a76040 T intel_drrs_is_active +ffffffff81a76070 T intel_drrs_activate +ffffffff81a76260 T intel_drrs_deactivate +ffffffff81a76420 T intel_drrs_invalidate +ffffffff81a76440 t intel_drrs_frontbuffer_update +ffffffff81a76690 T intel_drrs_flush +ffffffff81a766b0 T intel_drrs_crtc_init +ffffffff81a76750 t intel_drrs_downclock_work +ffffffff81a76870 T intel_drrs_crtc_debugfs_add +ffffffff81a768a0 T intel_drrs_connector_debugfs_add +ffffffff81a768b0 t __delayed_work_tick +ffffffff81a77000 T intel_dsb_reg_write +ffffffff81a77140 T intel_dsb_finish +ffffffff81a771c0 T intel_dsb_commit +ffffffff81a77370 T intel_dsb_wait +ffffffff81a77560 T intel_dsb_prepare +ffffffff81a776e0 T intel_dsb_cleanup +ffffffff81a78000 T intel_dsi_wait_panel_power_cycle +ffffffff81a780f0 T intel_dsi_shutdown +ffffffff81a781e0 T intel_dsi_bitrate +ffffffff81a78270 T intel_dsi_tlpx_ns +ffffffff81a782c0 T intel_dsi_get_modes +ffffffff81a782d0 T intel_dsi_mode_valid +ffffffff81a78390 T intel_dsi_host_init +ffffffff81a78440 T intel_dsi_get_panel_orientation +ffffffff81a79000 T intel_dsi_dcs_init_backlight_funcs +ffffffff81a790a0 t dcs_setup_backlight +ffffffff81a79120 t dcs_get_backlight +ffffffff81a79210 t dcs_set_backlight +ffffffff81a79300 t dcs_disable_backlight +ffffffff81a79660 t dcs_enable_backlight +ffffffff81a7a000 T intel_dsi_vbt_exec_sequence +ffffffff81a7a020 T intel_dsi_log_params +ffffffff81a7a3a0 T intel_dsi_vbt_init +ffffffff81a7a840 T intel_dsi_vbt_gpio_init +ffffffff81a7a860 T intel_dsi_vbt_gpio_cleanup +ffffffff81a7b000 T intel_dvo_init +ffffffff81a7b650 t intel_disable_dvo +ffffffff81a7b6f0 t intel_enable_dvo +ffffffff81a7b7c0 t intel_dvo_get_hw_state +ffffffff81a7b830 t intel_dvo_get_config +ffffffff81a7b8d0 t intel_dvo_compute_config +ffffffff81a7b960 t intel_dvo_pre_enable +ffffffff81a7ba60 t intel_dvo_connector_get_hw_state +ffffffff81a7baf0 t intel_dvo_enc_destroy +ffffffff81a7bb30 t intel_dvo_detect +ffffffff81a7bc30 t intel_dvo_get_modes +ffffffff81a7bca0 t intel_dvo_mode_valid +ffffffff81a7c000 T intel_fb_get_format_info +ffffffff81a7c2b0 T intel_fb_is_tiled_modifier +ffffffff81a7c2f0 t lookup_modifier +ffffffff81a7c530 T intel_fb_is_ccs_modifier +ffffffff81a7c570 T intel_fb_is_rc_ccs_cc_modifier +ffffffff81a7c5b0 T intel_fb_is_mc_ccs_modifier +ffffffff81a7c5f0 T intel_fb_plane_get_modifiers +ffffffff81a7c7d0 T intel_fb_plane_supports_modifier +ffffffff81a7c850 T intel_format_info_is_yuv_semiplanar +ffffffff81a7c8d0 T intel_fb_is_ccs_aux_plane +ffffffff81a7c980 T intel_fb_rc_ccs_cc_plane +ffffffff81a7ca50 T is_surface_linear +ffffffff81a7cbb0 T main_to_ccs_plane +ffffffff81a7cc60 T skl_ccs_to_main_plane +ffffffff81a7cda0 T skl_main_to_aux_plane +ffffffff81a7cec0 T intel_tile_size +ffffffff81a7cf00 T intel_tile_width_bytes +ffffffff81a7d320 T intel_tile_height +ffffffff81a7d380 T intel_tile_row_size +ffffffff81a7d400 T intel_fb_align_height +ffffffff81a7d480 T intel_fb_modifier_uses_dpt +ffffffff81a7d4c0 T intel_fb_uses_dpt +ffffffff81a7d520 T intel_cursor_alignment +ffffffff81a7d580 T intel_surf_alignment +ffffffff81a7d810 T intel_fb_plane_get_subsampling +ffffffff81a7d960 T intel_plane_adjust_aligned_offset +ffffffff81a7d9d0 t intel_adjust_aligned_offset +ffffffff81a7db80 T intel_plane_compute_aligned_offset +ffffffff81a7dc80 t intel_compute_aligned_offset +ffffffff81a7de40 T intel_fb_needs_pot_stride_remap +ffffffff81a7deb0 T intel_fb_supports_90_270_rotation +ffffffff81a7df10 T intel_fill_fb_info +ffffffff81a7ea10 t calc_plane_remap_info +ffffffff81a7f3c0 T intel_fb_fill_view +ffffffff81a7f430 T intel_plane_compute_gtt +ffffffff81a7f910 t intel_plane_check_stride +ffffffff81a7fa70 T intel_framebuffer_init +ffffffff81a802d0 t gen12_ccs_aux_stride +ffffffff81a80330 T intel_user_framebuffer_create +ffffffff81a80490 T intel_framebuffer_create +ffffffff81a80520 t intel_adjust_tile_offset +ffffffff81a80660 t intel_user_framebuffer_destroy +ffffffff81a806d0 t intel_user_framebuffer_create_handle +ffffffff81a80700 t intel_user_framebuffer_dirty +ffffffff81a81000 T intel_pin_and_fence_fb_obj +ffffffff81a81330 t i915_gem_object_lock +ffffffff81a81540 T intel_unpin_fb_vma +ffffffff81a815b0 T intel_plane_pin_fb +ffffffff81a818e0 T intel_plane_unpin_fb +ffffffff81a82000 T intel_fbc_cleanup +ffffffff81a821c0 T intel_fbc_pre_update +ffffffff81a82850 T intel_fbc_post_update +ffffffff81a82a00 T intel_fbc_invalidate +ffffffff81a82b80 T intel_fbc_flush +ffffffff81a82e20 T intel_fbc_atomic_check +ffffffff81a833e0 T intel_fbc_disable +ffffffff81a834a0 t __intel_fbc_disable +ffffffff81a835e0 T intel_fbc_update +ffffffff81a83ca0 T intel_fbc_reset_underrun +ffffffff81a83e00 T intel_fbc_handle_fifo_underrun_irq +ffffffff81a83ec0 T intel_fbc_add_plane +ffffffff81a83ef0 T intel_fbc_init +ffffffff81a84170 T intel_fbc_sanitize +ffffffff81a84240 T intel_fbc_crtc_debugfs_add +ffffffff81a84270 T intel_fbc_debugfs_register +ffffffff81a842a0 t intel_fbc_is_ok +ffffffff81a84410 t intel_fbc_update_state +ffffffff81a84790 t intel_fbc_underrun_work_fn +ffffffff81a84860 t ivb_fbc_activate +ffffffff81a84ab0 t ilk_fbc_deactivate +ffffffff81a84b60 t ilk_fbc_is_active +ffffffff81a84bc0 t ivb_fbc_is_compressing +ffffffff81a84c30 t snb_fbc_nuke +ffffffff81a84cb0 t ilk_fbc_program_cfb +ffffffff81a84d10 t ivb_fbc_set_false_color +ffffffff81a84d90 t snb_fbc_activate +ffffffff81a84e20 t ilk_fbc_is_compressing +ffffffff81a84e90 t ilk_fbc_activate +ffffffff81a84fc0 t i965_fbc_nuke +ffffffff81a85060 t g4x_fbc_activate +ffffffff81a85170 t g4x_fbc_deactivate +ffffffff81a85200 t g4x_fbc_is_active +ffffffff81a85260 t g4x_fbc_is_compressing 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T intel_check_cpu_fifo_underruns +ffffffff81a8ba70 T intel_check_pch_fifo_underruns +ffffffff81a8bba0 T intel_init_fifo_underrun_reporting +ffffffff81a8c000 T intel_frontbuffer_flip_prepare +ffffffff81a8c050 T intel_frontbuffer_flip_complete +ffffffff81a8c130 T intel_frontbuffer_flip +ffffffff81a8c200 T __intel_fb_invalidate +ffffffff81a8c290 T __intel_fb_flush +ffffffff81a8c380 T intel_frontbuffer_get +ffffffff81a8c4c0 t frontbuffer_active +ffffffff81a8c4f0 t frontbuffer_retire +ffffffff81a8c530 T intel_frontbuffer_put +ffffffff81a8c660 T intel_frontbuffer_track +ffffffff81a8d000 T intel_atomic_global_obj_init +ffffffff81a8d070 T intel_atomic_global_obj_cleanup +ffffffff81a8d160 T intel_atomic_get_global_obj_state +ffffffff81a8d3b0 T intel_atomic_get_old_global_obj_state +ffffffff81a8d410 T intel_atomic_get_new_global_obj_state +ffffffff81a8d470 T intel_atomic_swap_global_state +ffffffff81a8d5b0 T intel_atomic_clear_global_state +ffffffff81a8d6d0 T intel_atomic_lock_global_state +ffffffff81a8d760 T intel_atomic_serialize_global_state +ffffffff81a8d7f0 T intel_atomic_global_state_is_serialized +ffffffff81a8e000 T intel_gmbus_is_valid_pin +ffffffff81a8e100 T intel_gmbus_reset +ffffffff81a8e160 T intel_bb_set_bits +ffffffff81a8e2a0 T intel_bb_set_dir +ffffffff81a8e2d0 T intel_bb_read_bits +ffffffff81a8e460 T intel_acquire_bus +ffffffff81a8e660 T intel_release_bus +ffffffff81a8e800 T intel_send_start +ffffffff81a8e820 T intel_send_stop +ffffffff81a8e840 T intel_initiate_xfer +ffffffff81a8e860 T intel_read_byte +ffffffff81a8e880 T intel_write_byte +ffffffff81a8e8a0 T intel_gmbus_output_aksv +ffffffff81a8e970 t do_gmbus_xfer +ffffffff81a8ef70 T intel_gmbus_setup +ffffffff81a8f2f0 T intel_gmbus_teardown +ffffffff81a8f370 T intel_gmbus_get_adapter +ffffffff81a8f3f0 T intel_gmbus_force_bit +ffffffff81a8f490 T intel_gmbus_is_forced_bit +ffffffff81a8f4c0 T intel_gmbus_irq_handler +ffffffff81a8f560 t gmbus_xfer_read +ffffffff81a8f850 t gmbus_xfer_write +ffffffff81a8fa90 t gmbus_wait +ffffffff81a8fe70 t gmbus_wait_idle +ffffffff81a90000 t gmbus_xfer +ffffffff81a900e0 t gmbus_func +ffffffff81a90120 t gmbus_lock_bus +ffffffff81a90140 t gmbus_trylock_bus +ffffffff81a901a0 t gmbus_unlock_bus +ffffffff81a91000 T intel_hdcp_capable +ffffffff81a910a0 t intel_hdcp_read_valid_bksv +ffffffff81a91330 T intel_hdcp2_capable +ffffffff81a91450 T is_hdcp_supported +ffffffff81a914a0 T intel_hdcp_component_init +ffffffff81a91500 T intel_hdcp_init +ffffffff81a91680 t intel_hdcp_check_work +ffffffff81a93fc0 t intel_hdcp_prop_work +ffffffff81a94040 T intel_hdcp_enable +ffffffff81a94090 T intel_hdcp_disable +ffffffff81a941c0 t intel_hdcp_update_value +ffffffff81a94380 t _intel_hdcp2_disable +ffffffff81a94770 t _intel_hdcp_disable +ffffffff81a94a60 T intel_hdcp_update_pipe +ffffffff81a94bd0 T intel_hdcp_component_fini +ffffffff81a94c70 T intel_hdcp_cleanup +ffffffff81a94db0 T intel_hdcp_atomic_check +ffffffff81a94e40 T intel_hdcp_handle_cp_irq +ffffffff81a94f40 t __delayed_work_tick +ffffffff81a94f60 t hdcp2_authenticate_repeater_topology +ffffffff81a95220 t transcoder_name +ffffffff81a95260 t intel_hdcp_get_repeater_ctl +ffffffff81a95330 t ktime_get_raw +ffffffff81a953b0 t wait_remaining_ms_from_jiffies +ffffffff81a95440 t intel_hdcp_auth_downstream +ffffffff81a96610 t intel_write_sha_text +ffffffff81a97000 T intel_hdcp_gsc_cs_required +ffffffff81a97040 T intel_hdcp_gsc_init +ffffffff81a974b0 T intel_hdcp_gsc_fini +ffffffff81a97510 T intel_hdcp_gsc_msg_send +ffffffff81a97840 t gsc_hdcp_initiate_session +ffffffff81a97890 t gsc_hdcp_verify_receiver_cert_prepare_km +ffffffff81a978e0 t gsc_hdcp_verify_hprime +ffffffff81a97930 t gsc_hdcp_store_pairing_info +ffffffff81a97980 t gsc_hdcp_initiate_locality_check +ffffffff81a979d0 t gsc_hdcp_verify_lprime +ffffffff81a97a20 t gsc_hdcp_get_session_key +ffffffff81a97a70 t gsc_hdcp_repeater_check_flow_prepare_ack +ffffffff81a97ac0 t gsc_hdcp_verify_mprime +ffffffff81a97b10 t gsc_hdcp_enable_authentication +ffffffff81a97b60 t gsc_hdcp_close_session +ffffffff81a98000 T intel_hdmi_to_i915 +ffffffff81a98040 T hsw_write_infoframe +ffffffff81a98450 t hsw_dip_data_reg +ffffffff81a98600 T hsw_read_infoframe +ffffffff81a986c0 T intel_hdmi_infoframe_enable +ffffffff81a98760 T intel_hdmi_infoframes_enabled +ffffffff81a98880 T intel_read_infoframe +ffffffff81a98a20 T intel_hdmi_read_gcp_infoframe +ffffffff81a98b00 T intel_dp_dual_mode_set_tmds_output +ffffffff81a98bc0 T intel_hdmi_tmds_clock +ffffffff81a98c10 T intel_hdmi_bpc_possible +ffffffff81a98d30 T intel_hdmi_limited_color_range +ffffffff81a98da0 T intel_hdmi_compute_has_hdmi_sink +ffffffff81a98e10 T intel_hdmi_compute_config +ffffffff81a993c0 t intel_hdmi_compute_output_format +ffffffff81a99520 t intel_hdmi_compute_hdmi_infoframe +ffffffff81a995e0 t intel_hdmi_compute_drm_infoframe +ffffffff81a996d0 T intel_hdmi_encoder_shutdown +ffffffff81a997a0 T intel_hdmi_handle_sink_scrambling +ffffffff81a99890 T intel_infoframe_init +ffffffff81a99a30 t vlv_write_infoframe +ffffffff81a99d60 t vlv_read_infoframe +ffffffff81a99ee0 t vlv_set_infoframes +ffffffff81a9a220 t vlv_infoframes_enabled +ffffffff81a9a2b0 t g4x_write_infoframe +ffffffff81a9a550 t g4x_read_infoframe +ffffffff81a9a680 t g4x_set_infoframes +ffffffff81a9a910 t g4x_infoframes_enabled +ffffffff81a9a990 t hsw_set_infoframes +ffffffff81a9ac20 t hsw_infoframes_enabled +ffffffff81a9acb0 t ibx_write_infoframe +ffffffff81a9afc0 t ibx_read_infoframe +ffffffff81a9b130 t ibx_set_infoframes +ffffffff81a9b460 t ibx_infoframes_enabled +ffffffff81a9b4f0 t cpt_write_infoframe +ffffffff81a9b7f0 t cpt_read_infoframe +ffffffff81a9b960 t cpt_set_infoframes +ffffffff81a9bc40 t cpt_infoframes_enabled +ffffffff81a9bcb0 T intel_hdmi_init_connector +ffffffff81a9c430 T intel_hdmi_dsc_get_slice_height +ffffffff81a9c490 T intel_hdmi_dsc_get_num_slices +ffffffff81a9c610 T intel_hdmi_dsc_get_bpp +ffffffff81a9c6f0 t intel_hdmi_compute_clock +ffffffff81a9c950 t hdmi_port_clock_valid +ffffffff81a9cb70 t intel_write_infoframe +ffffffff81a9cd40 t intel_hdmi_detect +ffffffff81a9cee0 t intel_hdmi_force +ffffffff81a9cf80 t intel_hdmi_connector_register +ffffffff81a9cf90 t intel_hdmi_connector_unregister +ffffffff81a9cfa0 t intel_hdmi_set_edid +ffffffff81a9d230 t intel_hdmi_get_modes +ffffffff81a9d240 t intel_hdmi_mode_valid +ffffffff81a9d3f0 t intel_hdmi_connector_atomic_check +ffffffff81a9d420 t intel_hdmi_mode_clock_valid +ffffffff81a9d5c0 t intel_hdmi_hdcp_write_an_aksv +ffffffff81a9d700 t intel_hdmi_hdcp_read_bksv +ffffffff81a9d7d0 t intel_hdmi_hdcp_read_bstatus +ffffffff81a9d8a0 t intel_hdmi_hdcp_repeater_present +ffffffff81a9d980 t intel_hdmi_hdcp_read_ri_prime +ffffffff81a9da50 t intel_hdmi_hdcp_read_ksv_ready +ffffffff81a9db30 t intel_hdmi_hdcp_read_ksv_fifo +ffffffff81a9dc00 t intel_hdmi_hdcp_read_v_prime_part +ffffffff81a9dcf0 t intel_hdmi_hdcp_toggle_signalling +ffffffff81a9df60 t intel_hdmi_hdcp_check_link +ffffffff81a9e280 t intel_hdmi_hdcp2_capable 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i9xx_hpd_irq_ack +ffffffff81aa12d0 T i9xx_hpd_irq_handler +ffffffff81aa1480 T ibx_hpd_irq_handler +ffffffff81aa1620 T xelpdp_pica_irq_handler +ffffffff81aa18e0 T icp_irq_handler +ffffffff81aa1b70 T spt_irq_handler +ffffffff81aa1e10 T ilk_hpd_irq_handler +ffffffff81aa1f30 T bxt_hpd_irq_handler +ffffffff81aa2090 T gen11_hpd_irq_handler +ffffffff81aa2300 T intel_hpd_enable_detection +ffffffff81aa2340 T intel_hpd_irq_setup +ffffffff81aa2390 T intel_hotplug_irq_init +ffffffff81aa2610 t i915_hpd_irq_setup +ffffffff81aa2720 t i915_hpd_enable_detection +ffffffff81aa27c0 t icp_hpd_irq_setup +ffffffff81aa29b0 t icp_hpd_enable_detection +ffffffff81aa2ab0 t dg1_hpd_irq_setup +ffffffff81aa2b10 t dg1_hpd_enable_detection +ffffffff81aa2c50 t xelpdp_hpd_irq_setup +ffffffff81aa3050 t xelpdp_hpd_enable_detection +ffffffff81aa31f0 t gen11_hpd_irq_setup +ffffffff81aa3440 t gen11_hpd_enable_detection +ffffffff81aa3640 t bxt_hpd_irq_setup +ffffffff81aa37c0 t bxt_hpd_enable_detection +ffffffff81aa38a0 t spt_hpd_irq_setup +ffffffff81aa3ac0 t spt_hpd_enable_detection +ffffffff81aa3be0 t ilk_hpd_irq_setup +ffffffff81aa3e50 t ilk_hpd_enable_detection +ffffffff81aa4000 T intel_hti_init +ffffffff81aa4070 T intel_hti_uses_phy +ffffffff81aa4110 T intel_hti_dpll_mask +ffffffff81aa5000 T intel_load_detect_get_pipe +ffffffff81aa5370 t intel_modeset_disable_planes +ffffffff81aa5430 T intel_load_detect_release_pipe +ffffffff81aa6000 T intel_lpe_audio_irq_handler +ffffffff81aa6020 T intel_lpe_audio_init +ffffffff81aa6050 T intel_lpe_audio_teardown +ffffffff81aa6070 T intel_lpe_audio_notify +ffffffff81aa7000 T lspcon_detect_hdr_capability +ffffffff81aa70b0 T lspcon_write_infoframe +ffffffff81aa77f0 T lspcon_read_infoframe +ffffffff81aa7830 T lspcon_set_infoframes +ffffffff81aa7a90 T lspcon_infoframes_enabled +ffffffff81aa7c60 T lspcon_wait_pcon_mode +ffffffff81aa7c80 t lspcon_wait_mode +ffffffff81aa7f40 T lspcon_init +ffffffff81aa8340 T intel_lspcon_infoframes_enabled +ffffffff81aa8370 T lspcon_resume +ffffffff81aa8610 t lspcon_change_mode +ffffffff81aa9000 T intel_lvds_port_enabled +ffffffff81aa9080 T intel_get_lvds_encoder +ffffffff81aa90e0 T intel_is_dual_link_lvds +ffffffff81aa9140 T intel_lvds_init +ffffffff81aa97e0 t intel_enable_lvds +ffffffff81aa9920 t intel_pre_enable_lvds +ffffffff81aa9c00 t intel_lvds_compute_config +ffffffff81aa9d60 t pch_disable_lvds +ffffffff81aa9d80 t pch_post_disable_lvds +ffffffff81aa9da0 t gmch_disable_lvds +ffffffff81aa9dd0 t intel_lvds_get_hw_state +ffffffff81aa9e90 t intel_lvds_get_config +ffffffff81aa9fa0 t intel_lvds_shutdown +ffffffff81aaa040 t compute_is_dual_link_lvds +ffffffff81aaa110 t intel_no_lvds_dmi_callback +ffffffff81aaa160 t intel_disable_lvds +ffffffff81aaa280 t intel_lvds_get_modes +ffffffff81aaa2d0 t intel_lvds_mode_valid +ffffffff81aaa370 t intel_dual_link_lvds_callback +ffffffff81aab000 T _intel_modeset_lock_begin +ffffffff81aab060 T _intel_modeset_lock_loop +ffffffff81aab0a0 T _intel_modeset_lock_end +ffffffff81aac000 T intel_modeset_setup_hw_state +ffffffff81aad2d0 t intel_crtc_disable_noatomic +ffffffff81aad8b0 t intel_crtc_disable_noatomic_begin +ffffffff81aae000 T intel_modeset_verify_crtc +ffffffff81aae540 t verify_connector_state +ffffffff81aae9d0 T intel_modeset_verify_disabled +ffffffff81aaf000 T intel_opregion_notify_encoder +ffffffff81aaf180 t swsci +ffffffff81aaf4b0 T intel_opregion_notify_adapter +ffffffff81aaf510 T intel_opregion_asle_intr +ffffffff81aaf560 T intel_opregion_setup +ffffffff81aafd70 t asle_work +ffffffff81ab01e0 T intel_opregion_get_panel_type +ffffffff81ab02d0 T intel_opregion_get_edid +ffffffff81ab0390 T intel_opregion_headless_sku +ffffffff81ab03e0 T intel_opregion_register +ffffffff81ab0480 T intel_opregion_resume +ffffffff81ab0520 T intel_opregion_suspend +ffffffff81ab05d0 T intel_opregion_unregister +ffffffff81ab06a0 T intel_opregion_cleanup +ffffffff81ab0790 t intel_no_opregion_vbt_callback +ffffffff81ab07f0 t intel_use_opregion_panel_type_callback +ffffffff81ab1000 T intel_overlay_reset +ffffffff81ab1050 T intel_overlay_switch_off +ffffffff81ab1250 t intel_overlay_release_old_vid +ffffffff81ab13f0 T intel_overlay_put_image_ioctl +ffffffff81ab1700 t update_pfit_vscale_ratio +ffffffff81ab17d0 t check_overlay_dst +ffffffff81ab18a0 t check_overlay_src +ffffffff81ab1af0 t intel_overlay_do_put_image +ffffffff81ab2660 T intel_overlay_attrs_ioctl +ffffffff81ab2980 t check_gamma +ffffffff81ab2b70 T intel_overlay_setup +ffffffff81ab2de0 t intel_overlay_last_flip_retire +ffffffff81ab2e20 T intel_overlay_cleanup +ffffffff81ab2ee0 T intel_overlay_capture_error_state +ffffffff81ab2fd0 T intel_overlay_print_error_state +ffffffff81ab33a0 t intel_overlay_release_old_vid_tail +ffffffff81ab3470 t intel_overlay_off_tail +ffffffff81ab3620 t intel_overlay_flip_prepare +ffffffff81ab4000 T intel_panel_use_ssc +ffffffff81ab4060 T intel_panel_preferred_fixed_mode +ffffffff81ab40b0 T intel_panel_fixed_mode +ffffffff81ab4210 T intel_panel_downclock_mode +ffffffff81ab4300 T intel_panel_highest_mode +ffffffff81ab4360 T intel_panel_get_modes +ffffffff81ab43f0 T intel_panel_drrs_type +ffffffff81ab4420 T intel_panel_compute_config +ffffffff81ab4590 T intel_panel_add_edid_fixed_modes +ffffffff81ab4ac0 T intel_panel_add_vbt_lfp_fixed_mode +ffffffff81ab4b20 t intel_panel_add_fixed_mode +ffffffff81ab4ca0 T intel_panel_add_vbt_sdvo_fixed_mode +ffffffff81ab4d10 T intel_panel_add_encoder_fixed_mode +ffffffff81ab4d50 T intel_panel_fitting +ffffffff81ab53b0 T intel_panel_detect +ffffffff81ab5440 T intel_panel_mode_valid +ffffffff81ab54d0 T intel_panel_init_alloc +ffffffff81ab5520 T intel_panel_init +ffffffff81ab5640 T intel_panel_fini +ffffffff81ab6000 T intel_has_pch_trancoder +ffffffff81ab6060 T intel_crtc_pch_transcoder +ffffffff81ab60a0 T intel_pch_transcoder_get_m1_n1 +ffffffff81ab60f0 T intel_pch_transcoder_get_m2_n2 +ffffffff81ab6140 T ilk_pch_pre_enable +ffffffff81ab6170 T ilk_pch_enable +ffffffff81ab6750 t ilk_pch_transcoder_set_timings +ffffffff81ab69b0 T ilk_pch_disable +ffffffff81ab69d0 T ilk_pch_post_disable +ffffffff81ab6da0 T ilk_pch_get_config +ffffffff81ab6f60 T lpt_pch_enable +ffffffff81ab71d0 T lpt_pch_disable +ffffffff81ab72e0 T lpt_pch_get_config +ffffffff81ab73b0 T intel_pch_sanitize +ffffffff81ab7690 t assert_pch_dp_disabled +ffffffff81ab7810 t assert_pch_hdmi_disabled +ffffffff81ab8000 T lpt_disable_iclkip +ffffffff81ab8070 T lpt_iclkip +ffffffff81ab8100 T lpt_program_iclkip +ffffffff81ab8390 T lpt_get_iclkip +ffffffff81ab84a0 T lpt_disable_clkout_dp +ffffffff81ab8580 T intel_init_pch_refclk +ffffffff81aba000 T intel_crtc_initial_plane_config +ffffffff81abb000 T intel_pmdemand_init +ffffffff81abb120 T intel_pmdemand_init_early +ffffffff81abb1a0 T intel_pmdemand_update_phys_mask +ffffffff81abb240 T intel_pmdemand_update_port_clock +ffffffff81abb280 T intel_pmdemand_atomic_check +ffffffff81abb620 t intel_pmdemand_update_max_ddiclk +ffffffff81abb6f0 t intel_pmdemand_update_active_non_tc_phys +ffffffff81abb8f0 T intel_pmdemand_init_pmdemand_params +ffffffff81abbac0 T intel_pmdemand_program_dbuf +ffffffff81abbc50 t intel_pmdemand_wait +ffffffff81abbe40 T intel_pmdemand_pre_plane_update +ffffffff81abbf30 t intel_pmdemand_program_params +ffffffff81abc370 T intel_pmdemand_post_plane_update +ffffffff81abc450 t intel_pmdemand_duplicate_state +ffffffff81abc4e0 t intel_pmdemand_destroy_state +ffffffff81abd000 T intel_pps_lock +ffffffff81abd060 T intel_pps_unlock +ffffffff81abd0c0 T intel_pps_reset_all +ffffffff81abd210 T intel_pps_check_power_unlocked +ffffffff81abd4f0 t pps_name +ffffffff81abd590 T intel_pps_wait_power_cycle +ffffffff81abd630 t wait_panel_power_cycle +ffffffff81abd810 T intel_pps_vdd_on_unlocked +ffffffff81abdd80 T intel_pps_vdd_on +ffffffff81abdf10 T intel_pps_vdd_off_sync +ffffffff81abdfe0 t intel_pps_vdd_off_sync_unlocked +ffffffff81abe400 T intel_pps_vdd_off_unlocked +ffffffff81abe5b0 T intel_pps_on_unlocked +ffffffff81abea40 T intel_pps_on +ffffffff81abeae0 T intel_pps_off_unlocked +ffffffff81abeec0 T intel_pps_off +ffffffff81abef60 T intel_pps_backlight_on +ffffffff81abf150 T intel_pps_backlight_off +ffffffff81abf340 T intel_pps_backlight_power +ffffffff81abf530 T vlv_pps_init +ffffffff81abf710 t vlv_detach_power_sequencer +ffffffff81abf8e0 t vlv_steal_power_sequencer +ffffffff81abfa10 t pps_init_delays +ffffffff81abfeb0 t pps_init_registers +ffffffff81ac0240 T intel_pps_have_panel_power_or_vdd +ffffffff81ac0390 T intel_pps_encoder_reset +ffffffff81ac0530 t vlv_initial_power_sequencer_setup +ffffffff81ac0840 t pps_vdd_init +ffffffff81ac09f0 T intel_pps_init +ffffffff81ac0e60 t edp_panel_vdd_work +ffffffff81ac0f10 T intel_pps_init_late +ffffffff81ac1150 T intel_pps_unlock_regs_wa +ffffffff81ac1260 T intel_pps_setup +ffffffff81ac12d0 T assert_pps_unlocked +ffffffff81ac1560 t intel_pps_get_registers +ffffffff81ac1d70 t wait_panel_status +ffffffff81ac2180 t intel_pps_readout_hw_state +ffffffff81ac2330 t __delayed_work_tick +ffffffff81ac3000 T intel_psr_irq_handler +ffffffff81ac3640 t transcoder_name +ffffffff81ac3680 T intel_psr_init_dpcd +ffffffff81ac3920 T intel_psr_compute_config +ffffffff81ac3b00 t intel_psr2_config_valid +ffffffff81ac3f70 T intel_psr_get_config +ffffffff81ac4110 T intel_psr_disable +ffffffff81ac4220 t intel_psr_disable_locked +ffffffff81ac45a0 T intel_psr_pause +ffffffff81ac4790 t intel_psr_exit +ffffffff81ac4a40 T intel_psr_resume +ffffffff81ac4ad0 t intel_psr_activate +ffffffff81ac51e0 T intel_psr2_disable_plane_sel_fetch_arm +ffffffff81ac5250 T intel_psr2_program_plane_sel_fetch_arm +ffffffff81ac52f0 T intel_psr2_program_plane_sel_fetch_noarm +ffffffff81ac5460 T intel_psr2_program_trans_man_trk_ctl +ffffffff81ac5550 T intel_psr2_sel_fetch_update +ffffffff81ac5cc0 T intel_psr_pre_plane_update +ffffffff81ac5e90 t wm_optimization_wa +ffffffff81ac6020 T intel_psr_post_plane_update +ffffffff81ac6c20 T intel_psr_wait_for_idle_locked +ffffffff81ac6df0 T intel_psr_debug_set +ffffffff81ac7110 T intel_psr_invalidate +ffffffff81ac7350 T intel_psr_flush +ffffffff81ac7780 T intel_psr_init +ffffffff81ac78b0 t intel_psr_work +ffffffff81ac7a50 t tgl_dc3co_disable_work +ffffffff81ac7aa0 T intel_psr_short_pulse +ffffffff81ac7e60 T intel_psr_enabled +ffffffff81ac7ee0 T intel_psr_lock +ffffffff81ac7fa0 T intel_psr_unlock +ffffffff81ac8060 T intel_psr_debugfs_register +ffffffff81ac8090 T intel_psr_connector_debugfs_add +ffffffff81ac80c0 t _compute_psr2_sdp_prior_scanline_indication +ffffffff81ac8180 t _compute_psr2_wake_times +ffffffff81ac8270 t intel_psr2_sel_fetch_config_valid +ffffffff81ac8300 t psr2_granularity_check +ffffffff81ac83f0 t tgl_psr2_disable_dc3co +ffffffff81ac8500 t __delayed_work_tick +ffffffff81ac9000 T intel_lookup_range_min_qp +ffffffff81ac9110 T intel_lookup_range_max_qp +ffffffff81aca000 T intel_init_quirks +ffffffff81aca0f0 T intel_has_quirk +ffffffff81aca130 t quirk_ssc_force_disable +ffffffff81aca160 t quirk_invert_brightness +ffffffff81aca190 t quirk_backlight_present +ffffffff81aca1c0 t quirk_increase_t12_delay +ffffffff81aca1f0 t quirk_increase_ddi_disabled_time +ffffffff81aca220 t intel_dmi_reverse_brightness +ffffffff81aca270 t intel_dmi_no_pps_backlight +ffffffff81acb000 T intel_sdvo_port_enabled +ffffffff81acb0a0 T intel_sdvo_init +ffffffff81acc030 t intel_sdvo_compute_config +ffffffff81acc3f0 t pch_disable_sdvo +ffffffff81acc420 t pch_post_disable_sdvo +ffffffff81acc430 t intel_disable_sdvo +ffffffff81acc5a0 t intel_sdvo_pre_enable +ffffffff81accf20 t intel_enable_sdvo +ffffffff81acd0f0 t intel_sdvo_get_hw_state +ffffffff81acd1e0 t intel_sdvo_get_config +ffffffff81acd600 t intel_sdvo_set_target_input +ffffffff81acd670 t intel_sdvo_get_input_pixel_clock_range +ffffffff81acd710 t intel_sdvo_ddc_proxy_xfer +ffffffff81acd7c0 t intel_sdvo_ddc_proxy_func +ffffffff81acd7f0 t __intel_sdvo_write_cmd +ffffffff81acdca0 t proxy_lock_bus +ffffffff81acdcd0 t proxy_trylock_bus +ffffffff81acdd00 t proxy_unlock_bus +ffffffff81acdd30 t intel_sdvo_enc_destroy +ffffffff81acdd40 t intel_sdvo_set_output_timings_from_mode +ffffffff81acde40 t intel_sdvo_get_preferred_input_mode +ffffffff81ace1d0 t intel_sdvo_get_dtd_from_mode +ffffffff81ace350 t intel_sdvo_read_response +ffffffff81ace7f0 t intel_sdvo_get_value +ffffffff81ace860 t intel_sdvo_write_sdvox +ffffffff81acea50 t intel_sdvo_write_infoframe +ffffffff81acec10 t intel_sdvo_read_infoframe +ffffffff81acee30 t intel_sdvo_hotplug +ffffffff81acee70 t intel_sdvo_connector_get_hw_state +ffffffff81acef00 t intel_sdvo_detect +ffffffff81acf1f0 t intel_sdvo_connector_register +ffffffff81acf200 t intel_sdvo_connector_unregister +ffffffff81acf210 t intel_sdvo_connector_duplicate_state +ffffffff81acf290 t intel_sdvo_connector_atomic_set_property +ffffffff81acf460 t intel_sdvo_connector_atomic_get_property +ffffffff81acf680 t intel_sdvo_get_analog_edid +ffffffff81acf6b0 t intel_sdvo_connector_matches_edid +ffffffff81acf740 t intel_sdvo_get_modes +ffffffff81acf9e0 t intel_sdvo_mode_valid +ffffffff81acfaf0 t intel_sdvo_atomic_check +ffffffff81acfba0 t intel_sdvo_create_enhance_property +ffffffff81ad1000 T intel_snps_phy_wait_for_calibration +ffffffff81ad10d0 T intel_snps_phy_update_psr_power_state +ffffffff81ad1190 T intel_snps_phy_set_signal_levels +ffffffff81ad13e0 T intel_mpllb_calc_state +ffffffff81ad1570 T intel_snps_phy_check_hdmi_link_rate +ffffffff81ad1610 T intel_mpllb_enable +ffffffff81ad1850 T intel_mpllb_disable +ffffffff81ad19c0 T intel_mpllb_calc_port_clock +ffffffff81ad1a90 T intel_mpllb_readout_hw_state +ffffffff81ad1c00 T intel_mpllb_state_verify +ffffffff81ad3000 T vlv_plane_min_cdclk +ffffffff81ad30f0 T ivb_plane_min_cdclk +ffffffff81ad31b0 T hsw_plane_min_cdclk +ffffffff81ad3250 T chv_plane_check_rotation +ffffffff81ad32c0 T intel_sprite_plane_create +ffffffff81ad3610 t vlv_sprite_update_noarm +ffffffff81ad3710 t vlv_sprite_update_arm +ffffffff81ad3db0 t vlv_sprite_disable_arm +ffffffff81ad3e40 t vlv_sprite_get_hw_state +ffffffff81ad3f10 t vlv_sprite_check +ffffffff81ad3fe0 t ivb_sprite_update_noarm +ffffffff81ad4140 t ivb_sprite_update_arm +ffffffff81ad4510 t ivb_sprite_disable_arm +ffffffff81ad45c0 t ivb_sprite_get_hw_state +ffffffff81ad4680 t g4x_sprite_check +ffffffff81ad4920 t hsw_sprite_max_stride +ffffffff81ad4970 t g4x_sprite_max_stride +ffffffff81ad49e0 t ivb_sprite_min_cdclk +ffffffff81ad4b20 t g4x_sprite_update_noarm +ffffffff81ad4c80 t g4x_sprite_update_arm +ffffffff81ad50c0 t g4x_sprite_disable_arm +ffffffff81ad5170 t g4x_sprite_get_hw_state +ffffffff81ad5230 t g4x_sprite_min_cdclk +ffffffff81ad5300 t vlv_sprite_ctl +ffffffff81ad54f0 t vlv_sprite_format_mod_supported +ffffffff81ad5620 t ivb_sprite_ctl +ffffffff81ad5850 t g4x_sprite_ctl +ffffffff81ad5a10 t snb_sprite_format_mod_supported +ffffffff81ad5b00 t g4x_sprite_format_mod_supported +ffffffff81ad6000 T intel_sprite_set_colorkey_ioctl +ffffffff81ad7000 T intel_tc_port_in_tbt_alt_mode +ffffffff81ad7070 T intel_tc_port_in_dp_alt_mode +ffffffff81ad70e0 T intel_tc_port_in_legacy_mode +ffffffff81ad7150 T intel_tc_cold_requires_aux_pw +ffffffff81ad71c0 T intel_tc_port_get_lane_mask +ffffffff81ad72f0 T intel_tc_port_get_pin_assignment_mask +ffffffff81ad7420 T intel_tc_port_fia_max_lane_count +ffffffff81ad7600 T intel_tc_port_set_fia_lane_count +ffffffff81ad77d0 T intel_tc_port_init_mode +ffffffff81ad7a00 t intel_tc_port_update_mode +ffffffff81ad7db0 T intel_tc_port_sanitize_mode +ffffffff81ad80e0 T intel_tc_port_connected_locked +ffffffff81ad8240 T intel_tc_port_ref_held +ffffffff81ad82a0 T intel_tc_port_connected +ffffffff81ad8310 T intel_tc_port_link_needs_reset +ffffffff81ad83c0 T intel_tc_port_link_reset +ffffffff81ad84c0 T intel_tc_port_link_cancel_reset_work +ffffffff81ad8570 T intel_tc_port_lock +ffffffff81ad8590 t __intel_tc_port_lock +ffffffff81ad86d0 T intel_tc_port_suspend +ffffffff81ad8730 T intel_tc_port_unlock +ffffffff81ad87b0 T intel_tc_port_get_link +ffffffff81ad8840 T intel_tc_port_put_link +ffffffff81ad88f0 T intel_tc_port_init +ffffffff81ad8b30 t kasprintf +ffffffff81ad8c00 t intel_tc_port_disconnect_phy_work +ffffffff81ad8c50 t intel_tc_port_link_reset_work +ffffffff81ad8f50 T intel_tc_port_cleanup +ffffffff81ad9010 t intel_tc_port_needs_reset +ffffffff81ad9110 t tgl_tc_phy_cold_off_domain +ffffffff81ad9140 t xelpdp_tc_phy_hpd_live_status +ffffffff81ad9250 t adlp_tc_phy_is_ready +ffffffff81ad9350 t xelpdp_tc_phy_is_owned +ffffffff81ad9420 t xelpdp_tc_phy_get_hw_state +ffffffff81ad95a0 t xelpdp_tc_phy_connect +ffffffff81ad97f0 t xelpdp_tc_phy_disconnect +ffffffff81ad9930 t adlp_tc_phy_init +ffffffff81ad99a0 t tc_phy_get_current_mode +ffffffff81ad9cc0 t tc_phy_wait_for_ready +ffffffff81ad9e30 t xelpdp_tc_phy_enable_tcss_power +ffffffff81ada080 t tc_phy_verify_legacy_or_dp_alt_mode +ffffffff81ada260 t xelpdp_tc_phy_wait_for_tcss_power +ffffffff81ada470 t adlp_tc_phy_cold_off_domain +ffffffff81ada4d0 t adlp_tc_phy_hpd_live_status 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skl_wm_init +ffffffff81aef650 T intel_atomic_get_dbuf_state +ffffffff81aef670 T intel_dbuf_init +ffffffff81aef6e0 T intel_dbuf_pre_plane_update +ffffffff81aef9b0 T intel_dbuf_post_plane_update +ffffffff81aefa80 T intel_mbus_dbox_update +ffffffff81aefcf0 T skl_watermark_debugfs_register +ffffffff81aefd20 t skl_sagv_disable +ffffffff81aefe40 t skl_compute_wm +ffffffff81af3130 t skl_wm_get_hw_state_and_sanitize +ffffffff81af3920 t skl_build_plane_wm_single +ffffffff81af3cb0 t skl_compute_wm_params +ffffffff81af4080 t skl_compute_plane_wm +ffffffff81af44b0 t skl_compute_dbuf_slices +ffffffff81af49b0 t skl_ddb_entry_for_slices +ffffffff81af4af0 t intel_dbuf_duplicate_state +ffffffff81af4b80 t intel_dbuf_destroy_state +ffffffff81af5000 T pixel_format_from_register_bits +ffffffff81af5060 T vlv_dsi_wait_for_fifo_empty +ffffffff81af5120 T vlv_dsi_init +ffffffff81af5930 t intel_dsi_compute_config +ffffffff81af5a80 t intel_dsi_pre_enable +ffffffff81af7530 t bxt_dsi_enable +ffffffff81af7550 t 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assert_dsi_pll_disabled +ffffffff81afd000 T i915_gem_busy_ioctl +ffffffff81afe000 T i915_gem_clflush_object +ffffffff81afe1f0 t clflush_work +ffffffff81afe250 t clflush_release +ffffffff81aff000 T i915_lut_handle_alloc +ffffffff81aff020 T i915_lut_handle_free +ffffffff81aff040 T i915_gem_context_release +ffffffff81aff070 T i915_gem_init__contexts +ffffffff81aff0d0 T i915_gem_context_open +ffffffff81aff230 t i915_gem_create_context +ffffffff81affa00 t proto_context_close +ffffffff81affab0 t gem_context_register +ffffffff81affc50 T i915_gem_context_close +ffffffff81affda0 t context_close +ffffffff81b00460 T i915_gem_vm_create_ioctl +ffffffff81b00570 t xa_alloc +ffffffff81b005f0 T i915_gem_vm_destroy_ioctl +ffffffff81b006a0 T i915_gem_user_to_context_sseu +ffffffff81b00900 T i915_gem_context_lookup +ffffffff81b00a30 T i915_gem_context_create_ioctl +ffffffff81b00c80 t proto_context_register +ffffffff81b00dd0 T i915_gem_context_destroy_ioctl +ffffffff81b00ef0 T i915_gem_context_getparam_ioctl +ffffffff81b01310 T i915_gem_context_setparam_ioctl +ffffffff81b017c0 t set_proto_ctx_param +ffffffff81b01ee0 T i915_gem_context_reset_stats_ioctl +ffffffff81b01fe0 T i915_gem_engines_iter_next +ffffffff81b02030 T i915_gem_context_module_exit +ffffffff81b02050 T i915_gem_context_module_init +ffffffff81b020b0 t i915_gem_context_release_work +ffffffff81b02180 t intel_context_set_gem +ffffffff81b022b0 t engines_notify +ffffffff81b02420 t intel_context_unpin +ffffffff81b024b0 t kill_engines +ffffffff81b02640 t create_setparam +ffffffff81b026b0 t invalid_ext +ffffffff81b026e0 t lookup_user_engine +ffffffff81b027a0 t set_proto_ctx_engines_balance +ffffffff81b02a80 t set_proto_ctx_engines_bond +ffffffff81b02e00 t set_proto_ctx_engines_parallel_submit +ffffffff81b04000 T __i915_gem_object_create_user +ffffffff81b04020 t __i915_gem_object_create_user_ext +ffffffff81b044b0 T i915_gem_dumb_create +ffffffff81b04620 T i915_gem_create_ioctl +ffffffff81b046f0 T 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i915_gem_object_prepare_write +ffffffff81b08000 T i915_gem_execbuffer2_ioctl +ffffffff81b08ba0 t eb_select_context +ffffffff81b08c20 t eb_select_engine +ffffffff81b090a0 t eb_lookup_vmas +ffffffff81b097e0 t eb_release_vmas +ffffffff81b09b20 t eb_relocate_parse +ffffffff81b09c40 t eb_capture_stage +ffffffff81b09d80 t eb_requests_create +ffffffff81b0a160 t eb_submit +ffffffff81b0a5c0 t eb_requests_get +ffffffff81b0a630 t eb_requests_add +ffffffff81b0a7c0 t signal_fence_array +ffffffff81b0a870 t eb_requests_put +ffffffff81b0a8e0 t eb_put_engine +ffffffff81b0aa30 t parse_timeline_fences +ffffffff81b0ae30 t eb_pin_engine +ffffffff81b0b140 t eb_validate_vmas +ffffffff81b0ba30 t eb_relocate_vma +ffffffff81b0bc70 t eb_parse +ffffffff81b0c000 t eb_relocate_parse_slow +ffffffff81b0c6d0 t eb_pin_timeline +ffffffff81b0c920 t i915_gem_object_lock +ffffffff81b0cb30 t eb_pin_flags +ffffffff81b0cba0 t eb_relocate_entry +ffffffff81b0d3b0 t reloc_cache_reset +ffffffff81b0d4c0 t shadow_batch_pin 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lmem_suspend +ffffffff81b17300 T i915_gem_suspend_late +ffffffff81b17440 T i915_gem_freeze +ffffffff81b17480 T i915_gem_freeze_late +ffffffff81b17550 T i915_gem_resume +ffffffff81b176a0 t lmem_restore +ffffffff81b18000 T i915_gem_object_init_memory_region +ffffffff81b18070 T i915_gem_object_release_memory_region +ffffffff81b180d0 T i915_gem_object_create_region +ffffffff81b180f0 t __i915_gem_object_create_region +ffffffff81b18260 T i915_gem_object_create_region_at +ffffffff81b18300 T i915_gem_process_region +ffffffff81b19000 T shmem_sg_free_table +ffffffff81b19100 T shmem_sg_alloc_table +ffffffff81b19250 T __shmem_writeback +ffffffff81b19270 T __i915_gem_object_release_shmem +ffffffff81b19330 T i915_gem_object_put_pages_shmem +ffffffff81b19440 t shmem_get_pages +ffffffff81b19590 t shmem_put_pages +ffffffff81b195d0 t shmem_truncate +ffffffff81b19670 t shmem_shrink +ffffffff81b196e0 t shmem_pread +ffffffff81b19750 t shmem_pwrite +ffffffff81b19aa0 t shmem_release +ffffffff81b19af0 T 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i915_gem_stolen_remove_node +ffffffff81b1b1c0 T i915_gem_object_create_stolen +ffffffff81b1b1e0 T i915_gem_stolen_lmem_setup +ffffffff81b1b4f0 T i915_gem_stolen_smem_setup +ffffffff81b1b590 T i915_gem_object_is_stolen +ffffffff81b1b5d0 T i915_gem_stolen_initialized +ffffffff81b1b610 T i915_gem_stolen_area_address +ffffffff81b1b640 T i915_gem_stolen_area_size +ffffffff81b1b680 T i915_gem_stolen_node_address +ffffffff81b1b6c0 T i915_gem_stolen_node_offset +ffffffff81b1b6f0 T i915_gem_stolen_node_allocated +ffffffff81b1b720 T i915_gem_stolen_node_size +ffffffff81b1b750 t init_stolen_lmem +ffffffff81b1b7f0 t release_stolen_lmem +ffffffff81b1b860 t _i915_gem_object_stolen_init +ffffffff81b1bc60 t i915_gem_init_stolen +ffffffff81b1c4b0 t init_stolen_smem +ffffffff81b1c510 t release_stolen_smem +ffffffff81b1c560 t i915_gem_object_get_pages_stolen +ffffffff81b1c650 t i915_gem_object_put_pages_stolen +ffffffff81b1c680 t i915_gem_object_release_stolen +ffffffff81b1d000 T i915_gem_throttle_ioctl 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intel_rps_get_max_frequency +ffffffff81b72730 T intel_rps_get_max_raw_freq +ffffffff81b727b0 T intel_rps_get_rp0_frequency +ffffffff81b72890 T intel_rps_get_rp1_frequency +ffffffff81b72970 T intel_rps_get_rpn_frequency +ffffffff81b72a50 T gen6_rps_frequency_dump +ffffffff81b740f0 T intel_rps_set_max_frequency +ffffffff81b74360 T intel_rps_get_min_frequency +ffffffff81b74440 T intel_rps_get_min_raw_freq +ffffffff81b744c0 T intel_rps_set_min_frequency +ffffffff81b74640 T intel_rps_get_up_threshold +ffffffff81b74670 T intel_rps_set_up_threshold +ffffffff81b74750 T intel_rps_get_down_threshold +ffffffff81b74780 T intel_rps_set_down_threshold +ffffffff81b74860 T intel_rps_raise_unslice +ffffffff81b74940 T intel_rps_lower_unslice +ffffffff81b74a20 T rps_read_mask_mmio +ffffffff81b74ab0 T intel_rps_driver_register +ffffffff81b74af0 T intel_rps_driver_unregister +ffffffff81b74b40 T i915_read_mch_val +ffffffff81b74fb0 T i915_gpu_raise +ffffffff81b75040 T i915_gpu_lower +ffffffff81b750d0 T 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intel_gt_verify_workarounds +ffffffff81b80a30 T intel_engine_init_whitelist +ffffffff81b80de0 t tgl_whitelist_build +ffffffff81b80ef0 t icl_whitelist_build +ffffffff81b81080 t cml_whitelist_build +ffffffff81b810e0 t cfl_whitelist_build +ffffffff81b811e0 t glk_whitelist_build +ffffffff81b812e0 t kbl_whitelist_build +ffffffff81b813e0 t bxt_whitelist_build +ffffffff81b814c0 t skl_whitelist_build +ffffffff81b815c0 T intel_engine_apply_whitelist +ffffffff81b816c0 T intel_engine_init_workarounds +ffffffff81b83680 T intel_engine_apply_workarounds +ffffffff81b836a0 T intel_engine_verify_workarounds +ffffffff81b83f40 t gen12_ctx_workarounds_init +ffffffff81b84050 t _wa_add +ffffffff81b842e0 t gen9_ctx_workarounds_init +ffffffff81b84540 t gen8_ctx_workarounds_init +ffffffff81b84680 t gen12_gt_workarounds_init +ffffffff81b84830 t gen9_gt_workarounds_init +ffffffff81b849a0 t xehp_init_mcr +ffffffff81b85000 T uao_create_from_data +ffffffff81b85090 T uao_write +ffffffff81b850b0 T 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intel_gsc_uc_heci_cmd_submit_packet +ffffffff81b8b1d0 T intel_gsc_uc_heci_cmd_emit_mtl_header +ffffffff81b8b230 T intel_gsc_uc_heci_cmd_submit_nonpriv +ffffffff81b8b5a0 t i915_gem_object_lock +ffffffff81b8c000 T intel_guc_notify +ffffffff81b8c040 T intel_guc_init_send_regs +ffffffff81b8c0e0 T intel_guc_init_early +ffffffff81b8c230 t gen11_reset_guc_interrupts +ffffffff81b8c280 t gen11_enable_guc_interrupts +ffffffff81b8c300 t gen11_disable_guc_interrupts +ffffffff81b8c370 t gen9_reset_guc_interrupts +ffffffff81b8c440 t gen9_enable_guc_interrupts +ffffffff81b8c5b0 t gen9_disable_guc_interrupts +ffffffff81b8c6a0 T intel_guc_init_late +ffffffff81b8c6b0 T intel_guc_write_params +ffffffff81b8c8d0 T intel_guc_dump_time_info +ffffffff81b8ca10 T intel_guc_init +ffffffff81b8cba0 t guc_init_params +ffffffff81b8d340 T intel_guc_fini +ffffffff81b8d3f0 T intel_guc_send_mmio +ffffffff81b8d8d0 T intel_guc_to_host_process_recv_msg +ffffffff81b8d9c0 T intel_guc_auth_huc +ffffffff81b8da20 T intel_guc_suspend +ffffffff81b8db10 T intel_guc_resume +ffffffff81b8db40 T intel_guc_allocate_vma +ffffffff81b8dc60 T intel_guc_allocate_and_map_vma +ffffffff81b8dd10 T intel_guc_self_cfg32 +ffffffff81b8de10 T intel_guc_self_cfg64 +ffffffff81b8df10 T intel_guc_load_status +ffffffff81b8e0a0 T intel_guc_write_barrier +ffffffff81b8f000 T intel_guc_ads_print_policy_info +ffffffff81b8f020 T intel_guc_global_policies_update +ffffffff81b8f070 T intel_guc_ads_create +ffffffff81b8f560 T intel_guc_ads_init_late +ffffffff81b8f5b0 T intel_guc_ads_destroy +ffffffff81b8f610 T intel_guc_ads_reset +ffffffff81b8f680 T intel_guc_engine_usage_offset +ffffffff81b8f6c0 T intel_guc_engine_usage_record_map +ffffffff81b90000 T intel_guc_capture_getlistsize +ffffffff81b90020 t guc_capture_getlistsize +ffffffff81b90250 T intel_guc_capture_getlist +ffffffff81b91100 t guc_cap_list_num_regs +ffffffff81b91210 T intel_guc_capture_getnullheader +ffffffff81b912d0 T intel_guc_capture_print_engine_node +ffffffff81b917e0 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intel_guc_slpc_print_info +ffffffff81b9e570 T intel_guc_slpc_fini +ffffffff81b9f000 T intel_guc_wait_for_pending_msg +ffffffff81b9f150 T intel_guc_wait_for_idle +ffffffff81b9f1a0 T intel_guc_busyness_park +ffffffff81b9f2e0 T intel_guc_busyness_unpark +ffffffff81b9f390 t guc_update_pm_timestamp +ffffffff81b9f540 T intel_guc_submission_reset_prepare +ffffffff81b9fc50 t guc_flush_destroyed_contexts +ffffffff81b9fdc0 T intel_guc_submission_reset +ffffffff81b9fed0 t __guc_reset_context +ffffffff81ba01d0 T intel_guc_submission_cancel_requests +ffffffff81ba0470 T intel_guc_submission_reset_finish +ffffffff81ba0550 T intel_guc_submission_init +ffffffff81ba06d0 T intel_guc_submission_fini +ffffffff81ba0770 T intel_guc_submission_setup +ffffffff81ba0bc0 t guc_sched_engine_disabled +ffffffff81ba0bf0 t guc_sched_engine_destroy +ffffffff81ba0c50 t guc_bump_inflight_request_prio +ffffffff81ba0d40 t guc_retire_inflight_request_prio +ffffffff81ba0dc0 t guc_submission_tasklet +ffffffff81ba1190 t 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emit_fini_breadcrumb_child_no_preempt_mid_batch +ffffffff81ba7c90 t guc_parent_context_pin +ffffffff81ba7d60 t guc_parent_context_unpin +ffffffff81ba7e20 t pin_guc_id +ffffffff81ba80a0 t guc_child_context_pin +ffffffff81ba8130 t guc_child_context_unpin +ffffffff81ba8140 t guc_child_context_post_unpin +ffffffff81ba81e0 t guc_child_context_destroy +ffffffff81ba8260 t guc_context_init +ffffffff81ba8310 t submit_work_cb +ffffffff81ba8330 t cs_irq_handler +ffffffff81ba8380 t guc_irq_enable_breadcrumbs +ffffffff81ba8440 t guc_irq_disable_breadcrumbs +ffffffff81ba84e0 t __delayed_work_tick +ffffffff81ba9000 T intel_huc_register_gsc_notifier +ffffffff81ba9040 t gsc_notifier +ffffffff81ba9090 T intel_huc_unregister_gsc_notifier +ffffffff81ba9100 T intel_huc_sanitize +ffffffff81ba9170 T intel_huc_init_early +ffffffff81ba92c0 T intel_huc_init +ffffffff81ba94e0 T intel_huc_fini +ffffffff81ba9560 T intel_huc_suspend +ffffffff81ba95d0 T intel_huc_wait_for_auth_complete +ffffffff81ba96f0 T intel_huc_auth +ffffffff81ba98b0 T intel_huc_is_authenticated +ffffffff81ba9960 T intel_huc_check_status +ffffffff81ba9a50 t huc_is_fully_authenticated +ffffffff81ba9b70 T intel_huc_update_auth_status +ffffffff81ba9c80 T intel_huc_load_status +ffffffff81ba9d60 t sw_fence_dummy_notify +ffffffff81ba9d90 t huc_delayed_load_timer_callback +ffffffff81baa000 T intel_huc_debugfs_register +ffffffff81bab000 T intel_huc_fw_auth_via_gsccs +ffffffff81bab420 T intel_huc_fw_get_binary_info +ffffffff81bab6e0 T intel_huc_fw_load_and_auth_via_gsc +ffffffff81bab780 T intel_huc_fw_upload +ffffffff81bac000 T intel_uc_init_early +ffffffff81bac170 T intel_uc_init_late +ffffffff81bac1a0 T intel_uc_driver_late_release +ffffffff81bac1d0 T intel_uc_init_mmio +ffffffff81bac1f0 T intel_uc_driver_remove +ffffffff81bac280 T intel_uc_reset_prepare +ffffffff81bac300 t __uc_sanitize +ffffffff81bac430 T intel_uc_reset +ffffffff81bac480 T intel_uc_reset_finish +ffffffff81bac4d0 T intel_uc_cancel_requests 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i915_active_fini +ffffffff81bb1f30 T i915_active_acquire_preallocate_barrier +ffffffff81bb2300 t node_retire +ffffffff81bb2390 T i915_active_acquire_barrier +ffffffff81bb24f0 T i915_request_add_active_barriers +ffffffff81bb25a0 T i915_active_fence_set +ffffffff81bb2610 T i915_active_noop +ffffffff81bb2650 T i915_active_get +ffffffff81bb2680 T i915_active_put +ffffffff81bb26f0 T i915_active_create +ffffffff81bb27e0 t auto_active +ffffffff81bb2810 t auto_retire +ffffffff81bb2880 T i915_active_module_exit +ffffffff81bb28a0 T i915_active_module_init +ffffffff81bb2900 t __active_retire +ffffffff81bb2af0 t barrier_wake +ffffffff81bb3000 T intel_engine_init_cmd_parser +ffffffff81bb36f0 t gen7_render_get_cmd_length_mask +ffffffff81bb3780 t gen7_bsd_get_cmd_length_mask +ffffffff81bb3820 t gen7_blt_get_cmd_length_mask +ffffffff81bb3890 t gen9_blt_get_cmd_length_mask +ffffffff81bb3900 T intel_engine_cleanup_cmd_parser +ffffffff81bb39d0 T intel_engine_cmd_parser +ffffffff81bb4580 T i915_cmd_parser_get_version +ffffffff81bb5000 T i915_fence_context_timeout +ffffffff81bb6000 T i915_deps_init +ffffffff81bb6060 T i915_deps_fini +ffffffff81bb60f0 T i915_deps_sync +ffffffff81bb61a0 T i915_deps_add_dependency +ffffffff81bb63f0 T i915_deps_add_resv +ffffffff81bb7000 T i915_print_iommu_status +ffffffff81bb7050 T i915_driver_probe +ffffffff81bb78d0 t i915_driver_register +ffffffff81bb79c0 T inteldrm_init_backlight +ffffffff81bb7a30 t i915_welcome_messages +ffffffff81bb7bb0 T i915_driver_remove +ffffffff81bb7ca0 T i915_driver_shutdown +ffffffff81bb7e40 T i915_driver_resume_switcheroo +ffffffff81bb7ea0 t i915_drm_resume_early +ffffffff81bb7f90 t i915_drm_resume +ffffffff81bb81d0 T intagpsubmatch +ffffffff81bb8220 T intagp_print +ffffffff81bb8270 T inteldrm_wsioctl +ffffffff81bb8450 T inteldrm_wsmmap +ffffffff81bb8480 T inteldrm_alloc_screen +ffffffff81bb84b0 T inteldrm_free_screen +ffffffff81bb84d0 T inteldrm_show_screen +ffffffff81bb85a0 T inteldrm_load_font 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i915_drm_client_alloc +ffffffff81bba070 T __i915_drm_client_free +ffffffff81bbb000 T i915_gem_get_aperture_ioctl +ffffffff81bbb0d0 T i915_gem_object_unbind +ffffffff81bbb340 T i915_gem_pread_ioctl +ffffffff81bbb4d0 t i915_gem_shmem_pread +ffffffff81bbb8d0 t i915_gem_gtt_pread +ffffffff81bbbbf0 T i915_gem_pwrite_ioctl +ffffffff81bbbdc0 t i915_gem_gtt_pwrite_fast +ffffffff81bbc170 t i915_gem_shmem_pwrite +ffffffff81bbc600 T i915_gem_sw_finish_ioctl +ffffffff81bbc690 T i915_gem_runtime_suspend +ffffffff81bbc790 T i915_gem_object_ggtt_pin_ww +ffffffff81bbca30 T i915_gem_object_ggtt_pin +ffffffff81bbcb40 t i915_gem_object_lock +ffffffff81bbcd50 T i915_gem_madvise_ioctl +ffffffff81bbd150 T i915_gem_drain_freed_objects +ffffffff81bbd1c0 T i915_gem_drain_workqueue +ffffffff81bbd2a0 T i915_gem_init +ffffffff81bbd540 T i915_gem_driver_register +ffffffff81bbd550 T i915_gem_driver_unregister +ffffffff81bbd560 T i915_gem_driver_remove +ffffffff81bbd5c0 T i915_gem_driver_release +ffffffff81bbd6b0 T i915_gem_init_early +ffffffff81bbd730 T i915_gem_cleanup_early +ffffffff81bbd7b0 T i915_gem_open +ffffffff81bbd8c0 t i915_gem_gtt_prepare +ffffffff81bbe000 T i915_gem_evict_something +ffffffff81bbe440 t ungrab_vma +ffffffff81bbe570 t grab_vma +ffffffff81bbe690 T i915_gem_evict_for_node +ffffffff81bbe8d0 T i915_gem_evict_vm +ffffffff81bbf000 T i915_gem_gtt_prepare_pages +ffffffff81bbf030 T i915_gem_gtt_finish_pages +ffffffff81bbf090 T i915_gem_gtt_reserve +ffffffff81bbf140 T i915_gem_gtt_insert +ffffffff81bc0000 T i915_gem_ww_ctx_init +ffffffff81bc0060 T i915_gem_ww_unlock_single +ffffffff81bc01a0 T i915_gem_ww_ctx_fini +ffffffff81bc0210 t i915_gem_ww_ctx_unlock_all +ffffffff81bc0370 T i915_gem_ww_ctx_backoff +ffffffff81bc1000 T i915_getparam_ioctl +ffffffff81bc2000 T intel_gpu_error_find_batch +ffffffff81bc2070 T i915_error_printf +ffffffff81bc2130 T intel_gpu_error_print_vma +ffffffff81bc2160 T i915_gpu_coredump_copy_to_buffer +ffffffff81bc21b0 T __i915_gpu_coredump_free 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i915_pmu_init +ffffffff81bca2e0 t i915_pmu_exit +ffffffff81bcb000 T i915_params_dump +ffffffff81bcb670 T i915_params_copy +ffffffff81bcb870 T i915_params_free +ffffffff81bcc000 T i915_pci_register_driver +ffffffff81bcc030 T i915_pci_unregister_driver +ffffffff81bcd000 T i915_oa_config_release +ffffffff81bcd060 T i915_perf_get_oa_config +ffffffff81bcd0c0 T i915_perf_oa_timestamp_frequency +ffffffff81bcd170 T i915_oa_init_reg_state +ffffffff81bcd260 T i915_perf_open_ioctl +ffffffff81bcda80 T i915_perf_register +ffffffff81bcdab0 T i915_perf_unregister +ffffffff81bcdb20 T i915_perf_add_config_ioctl +ffffffff81bcdb70 T i915_perf_remove_config_ioctl +ffffffff81bcdbe0 T i915_perf_init +ffffffff81bce2c0 t gen7_is_valid_b_counter_addr +ffffffff81bce310 t hsw_is_valid_mux_addr +ffffffff81bce390 t hsw_enable_metric_set +ffffffff81bce450 t hsw_disable_metric_set +ffffffff81bce520 t gen7_oa_enable +ffffffff81bce690 t gen7_oa_disable +ffffffff81bce750 t gen7_oa_read +ffffffff81bcebb0 t gen7_oa_hw_tail_read +ffffffff81bcec00 t gen8_oa_read +ffffffff81bcf230 t gen8_is_valid_mux_addr +ffffffff81bcf2b0 t gen8_is_valid_flex_addr +ffffffff81bcf330 t chv_is_valid_mux_addr +ffffffff81bcf3b0 t gen8_oa_enable +ffffffff81bcf4f0 t gen8_oa_disable +ffffffff81bcf5b0 t gen8_enable_metric_set +ffffffff81bcf670 t gen8_disable_metric_set +ffffffff81bcf6d0 t gen8_oa_hw_tail_read +ffffffff81bcf720 t gen11_is_valid_mux_addr +ffffffff81bcf7e0 t gen11_disable_metric_set +ffffffff81bcf840 t xehp_is_valid_b_counter_addr +ffffffff81bcf910 t gen12_is_valid_b_counter_addr +ffffffff81bcf960 t gen12_is_valid_mux_addr +ffffffff81bcf9f0 t gen12_oa_enable +ffffffff81bcfb90 t gen12_oa_disable +ffffffff81bcfce0 t gen12_enable_metric_set +ffffffff81bcfed0 t gen12_disable_metric_set +ffffffff81bd0020 t gen12_oa_hw_tail_read +ffffffff81bd0080 T i915_perf_sysctl_register +ffffffff81bd00b0 T i915_perf_sysctl_unregister +ffffffff81bd00e0 T i915_perf_fini +ffffffff81bd0200 t destroy_config +ffffffff81bd0290 T i915_perf_ioctl_version +ffffffff81bd0390 t get_sseu_config +ffffffff81bd03e0 t emit_oa_config +ffffffff81bd0ab0 t i915_gem_object_lock +ffffffff81bd0cc0 t append_oa_status +ffffffff81bd0d40 t append_oa_sample +ffffffff81bd0ea0 t lrc_configure_all_contexts +ffffffff81bd1050 t oa_configure_all_contexts +ffffffff81bd1370 t gen8_modify_self +ffffffff81bd1540 t gen8_modify_context +ffffffff81bd16f0 t gen12_configure_oar_context +ffffffff81bd2000 T i915_query_ioctl +ffffffff81bd2100 t query_topology_info +ffffffff81bd2150 t query_engine_info +ffffffff81bd2390 t query_perf_config +ffffffff81bd2690 t query_memregion_info +ffffffff81bd2920 t query_hwconfig_blob +ffffffff81bd29a0 t query_geometry_subslices +ffffffff81bd2a30 t fill_topology_info +ffffffff81bd2bd0 t query_perf_config_data +ffffffff81bd2f30 t copy_perf_config_registers_or_number +ffffffff81bd4000 T i915_request_slab_cache +ffffffff81bd4030 t i915_fence_get_driver_name +ffffffff81bd4060 t i915_fence_get_timeline_name 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i915_request_await_external +ffffffff81bd54e0 T i915_request_await_dma_fence +ffffffff81bd5860 T i915_request_await_deps +ffffffff81bd58d0 T i915_request_await_object +ffffffff81bd5980 T __i915_request_commit +ffffffff81bd5c40 T __i915_request_queue_bh +ffffffff81bd5c80 T __i915_request_queue +ffffffff81bd5ce0 T i915_request_add +ffffffff81bd5d90 T i915_request_wait_timeout +ffffffff81bd60b0 t request_wait_wake +ffffffff81bd60d0 T i915_request_wait +ffffffff81bd6130 T i915_request_show +ffffffff81bd6360 T i915_test_request_state +ffffffff81bd64b0 T i915_request_module_exit +ffffffff81bd64e0 T i915_request_module_init +ffffffff81bd6570 t submit_notify +ffffffff81bd6660 t semaphore_notify +ffffffff81bd66b0 t __rq_watchdog_expired +ffffffff81bd6760 t __await_execution +ffffffff81bd68e0 t i915_request_await_start +ffffffff81bd6a10 t __emit_semaphore_wait +ffffffff81bd6ad0 t irq_execute_cb +ffffffff81bd7000 T i915_sg_trim +ffffffff81bd7120 T i915_refct_sgt_init +ffffffff81bd7160 T i915_rsgt_from_mm_node +ffffffff81bd7360 T i915_rsgt_from_buddy_resource +ffffffff81bd75b0 t i915_refct_sgt_release +ffffffff81bd8000 T i915_sched_lookup_priolist +ffffffff81bd8120 T __i915_priolist_free +ffffffff81bd8140 T i915_schedule +ffffffff81bd8610 T i915_sched_node_init +ffffffff81bd8670 T i915_sched_node_reinit +ffffffff81bd86b0 T __i915_sched_node_add_dependency +ffffffff81bd87c0 T i915_sched_node_add_dependency +ffffffff81bd8900 T i915_sched_node_fini +ffffffff81bd89e0 T i915_request_show_with_schedule +ffffffff81bd8ad0 T i915_sched_engine_create +ffffffff81bd8b80 t default_destroy +ffffffff81bd8bd0 t default_disabled +ffffffff81bd8c00 T i915_scheduler_module_exit +ffffffff81bd8c30 T i915_scheduler_module_init +ffffffff81bd9000 T i915_save_display +ffffffff81bd9390 T i915_restore_display +ffffffff81bda000 T i915_sw_fence_complete +ffffffff81bda040 t __i915_sw_fence_complete +ffffffff81bda1c0 T i915_sw_fence_await +ffffffff81bda240 T __i915_sw_fence_init +ffffffff81bda2b0 T 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intel_pxp_tee_component_fini +ffffffff81bfe430 T intel_pxp_tee_cmd_create_arb_session +ffffffff81bfe660 T intel_pxp_tee_end_arb_fw_session +ffffffff81bfe8d0 t i915_pxp_tee_component_bind +ffffffff81bfea40 t i915_pxp_tee_component_unbind +ffffffff81bff000 T intel_dram_detect +ffffffff81bff430 t gen11_get_dram_info +ffffffff81bff480 t bxt_get_dram_info +ffffffff81bff790 t skl_get_dram_info +ffffffff81bff970 T intel_dram_edram_detect +ffffffff81bffa00 t icl_pcode_read_mem_global_info +ffffffff81bffae0 t skl_dram_get_channel_info +ffffffff81bffcb0 t skl_dram_get_dimm_info +ffffffff81c00000 T intel_gmch_bridge_setup +ffffffff81c000d0 t intel_gmch_bridge_release +ffffffff81c00100 T intel_gmch_bar_setup +ffffffff81c002f0 T intel_gmch_bar_teardown +ffffffff81c003e0 T intel_gmch_vga_set_state +ffffffff81c01000 T intel_detect_pch +ffffffff81c011b0 t intel_pch_match +ffffffff81c01200 t intel_pch_type +ffffffff81c019c0 t intel_virt_detect_pch +ffffffff81c02000 T vlv_iosf_sb_get +ffffffff81c02020 T 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atombios_set_backlight_level +ffffffff81c11220 T atombios_dig_transmitter_setup +ffffffff81c11240 T radeon_atom_backlight_init +ffffffff81c11420 t radeon_atom_backlight_get_brightness +ffffffff81c11480 T atombios_dvo_setup +ffffffff81c11640 T atombios_digital_setup +ffffffff81c11900 T atombios_get_encoder_mode +ffffffff81c11b90 T atombios_dig_encoder_setup2 +ffffffff81c11fd0 T atombios_dig_encoder_setup +ffffffff81c11ff0 T atombios_dig_transmitter_setup2 +ffffffff81c129d0 T atombios_set_edp_panel_power +ffffffff81c12ae0 T radeon_atom_release_dig_encoder +ffffffff81c12b20 T radeon_atom_pick_dig_encoder +ffffffff81c12d40 T radeon_atom_encoder_init +ffffffff81c12e10 t atombios_external_encoder_setup +ffffffff81c13080 T radeon_atom_ext_encoder_setup_ddc +ffffffff81c130d0 T radeon_enc_destroy +ffffffff81c13180 T radeon_add_atom_encoder +ffffffff81c13590 t radeon_atombios_set_dig_info +ffffffff81c13600 t radeon_atombios_set_dac_info +ffffffff81c13670 t radeon_atom_backlight_update_status +ffffffff81c136d0 t radeon_atom_encoder_dpms +ffffffff81c13970 t radeon_atom_mode_fixup +ffffffff81c13ab0 t radeon_atom_encoder_prepare +ffffffff81c13f90 t radeon_atom_encoder_commit +ffffffff81c13fc0 t radeon_atom_encoder_mode_set +ffffffff81c14570 t radeon_atom_dig_detect +ffffffff81c14680 t radeon_atom_encoder_disable +ffffffff81c14910 t radeon_atom_encoder_dpms_avivo +ffffffff81c14b40 t radeon_atom_encoder_dpms_dig +ffffffff81c15080 t atombios_dac_setup +ffffffff81c15160 t radeon_atom_dac_detect +ffffffff81c15350 t radeon_atom_ext_dpms +ffffffff81c15380 t radeon_atom_ext_prepare +ffffffff81c153b0 t radeon_atom_ext_commit +ffffffff81c153e0 t radeon_atom_ext_mode_set +ffffffff81c15410 t radeon_atom_ext_disable +ffffffff81c16000 T radeon_atom_hw_i2c_xfer +ffffffff81c16140 t radeon_process_i2c_ch +ffffffff81c16310 T radeon_atom_hw_i2c_func +ffffffff81c17000 T btc_get_max_clock_from_voltage_dependency_table +ffffffff81c170d0 T btc_apply_voltage_dependency_rules +ffffffff81c17140 T btc_skip_blacklist_clocks +ffffffff81c17230 T btc_adjust_clock_combinations +ffffffff81c17360 T btc_apply_voltage_delta_rules +ffffffff81c17480 T btc_program_mgcg_hw_sequence +ffffffff81c17580 T btc_dpm_enabled +ffffffff81c17590 T btc_notify_uvd_to_smc +ffffffff81c17600 T btc_reset_to_default +ffffffff81c17650 T btc_read_arb_registers +ffffffff81c176e0 T btc_dpm_vblank_too_short +ffffffff81c17750 T btc_dpm_pre_set_power_state +ffffffff81c18970 T btc_dpm_set_power_state +ffffffff81c18ca0 t btc_set_power_state_conditionally_enable_ulv +ffffffff81c18dd0 T btc_dpm_post_set_power_state +ffffffff81c18ef0 t btc_update_current_ps +ffffffff81c18ff0 T btc_dpm_enable +ffffffff81c19ed0 t btc_cg_clock_gating_enable +ffffffff81c1a000 t btc_mg_clock_gating_enable +ffffffff81c1a120 t btc_ls_clock_gating_enable +ffffffff81c1a250 t btc_init_stutter_mode +ffffffff81c1a2d0 T btc_dpm_disable +ffffffff81c1a5b0 T btc_dpm_setup_asic +ffffffff81c1a690 T btc_dpm_init +ffffffff81c1aa80 T btc_dpm_fini +ffffffff81c1ab30 T btc_dpm_debugfs_print_current_performance_level +ffffffff81c1ab80 T btc_dpm_get_current_sclk +ffffffff81c1ac00 T btc_dpm_get_current_mclk +ffffffff81c1ac80 T btc_dpm_get_sclk +ffffffff81c1acd0 T btc_dpm_get_mclk +ffffffff81c1b000 T ci_dpm_powergate_uvd +ffffffff81c1b380 T ci_dpm_vblank_too_short +ffffffff81c1b410 T ci_fan_ctrl_get_fan_speed_percent +ffffffff81c1b4b0 T ci_fan_ctrl_set_fan_speed_percent +ffffffff81c1b580 T ci_fan_ctrl_set_mode +ffffffff81c1b720 t ci_fan_ctrl_set_static_mode +ffffffff81c1b7e0 t ci_thermal_start_smc_fan_control +ffffffff81c1ba20 T ci_fan_ctrl_get_mode +ffffffff81c1ba80 T ci_dpm_force_performance_level +ffffffff81c1c310 t ci_upload_dpm_level_enable_mask +ffffffff81c1c640 T ci_dpm_pre_set_power_state +ffffffff81c1c930 T ci_dpm_post_set_power_state +ffffffff81c1ca00 T ci_dpm_setup_asic +ffffffff81c1cc00 T ci_dpm_enable +ffffffff81c1e4d0 t ci_init_smc_table +ffffffff81c1f3c0 t ci_init_arb_table_index +ffffffff81c1f450 t ci_populate_initial_mc_reg_table +ffffffff81c1f690 t ci_populate_pm_base +ffffffff81c1fa00 t ci_dpm_start_smc +ffffffff81c1fa80 t ci_enable_vr_hot_gpio_interrupt +ffffffff81c1fb20 t ci_notify_smc_display_change +ffffffff81c1fbf0 t ci_enable_sclk_control +ffffffff81c1fc20 t ci_enable_ulv +ffffffff81c1fd70 t ci_enable_ds_master_switch +ffffffff81c1ff60 t ci_start_dpm +ffffffff81c20150 t ci_enable_didt +ffffffff81c20400 t ci_enable_smc_cac +ffffffff81c20590 t ci_enable_power_containment +ffffffff81c20a10 t ci_power_control_set_level +ffffffff81c20b20 t ci_enable_auto_throttle_source +ffffffff81c20c00 t ci_enable_thermal_based_sclk_dpm +ffffffff81c20d50 t ci_thermal_start_thermal_controller +ffffffff81c21050 T ci_dpm_late_enable +ffffffff81c210f0 T ci_dpm_disable +ffffffff81c217e0 T ci_dpm_set_power_state +ffffffff81c22450 t ci_update_sclk_t +ffffffff81c224c0 t ci_update_and_upload_mc_reg_table +ffffffff81c22670 t ci_unfreeze_sclk_mclk_dpm +ffffffff81c22820 t ci_notify_link_speed_change_after_state_change +ffffffff81c22950 T ci_dpm_display_configuration_changed +ffffffff81c22ae0 T ci_dpm_fini +ffffffff81c22b90 T ci_dpm_init +ffffffff81c239f0 t ci_initialize_powertune_defaults +ffffffff81c23ae0 t ci_get_leakage_voltages +ffffffff81c23c90 t ci_patch_dependency_tables_with_leakage +ffffffff81c24300 t ci_set_private_data_variables_based_on_pptable +ffffffff81c24410 T ci_dpm_debugfs_print_current_performance_level +ffffffff81c24550 T ci_dpm_print_power_state +ffffffff81c24610 T ci_dpm_get_current_sclk +ffffffff81c246e0 T ci_dpm_get_current_mclk +ffffffff81c247b0 T ci_dpm_get_sclk +ffffffff81c24800 T ci_dpm_get_mclk +ffffffff81c24850 t ci_set_valid_flag +ffffffff81c248f0 t ci_populate_all_graphic_levels +ffffffff81c24e80 t ci_populate_all_memory_levels +ffffffff81c25780 t ci_populate_smc_vce_level +ffffffff81c258a0 t ci_populate_smc_acp_level +ffffffff81c259a0 t ci_populate_smc_samu_level +ffffffff81c25aa0 t ci_do_program_memory_timing_parameters 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cik_pciep_rreg +ffffffff81c282e0 T cik_pciep_wreg +ffffffff81c28350 T cik_get_xclk +ffffffff81c283c0 T cik_mm_rdoorbell +ffffffff81c28420 T cik_mm_wdoorbell +ffffffff81c28470 T ci_mc_load_microcode +ffffffff81c287b0 T cik_ring_test +ffffffff81c28a50 T cik_fence_gfx_ring_emit +ffffffff81c28e40 T cik_fence_compute_ring_emit +ffffffff81c290c0 T cik_semaphore_ring_emit +ffffffff81c29280 T cik_copy_cpdma +ffffffff81c296d0 T cik_ring_ib_execute +ffffffff81c29c70 T cik_ib_test +ffffffff81c29f50 T cik_gfx_get_rptr +ffffffff81c29fb0 T cik_gfx_get_wptr +ffffffff81c29ff0 T cik_gfx_set_wptr +ffffffff81c2a030 T cik_compute_get_rptr +ffffffff81c2a110 T cik_compute_get_wptr +ffffffff81c2a1f0 T cik_compute_set_wptr +ffffffff81c2a270 T cik_gpu_check_soft_reset +ffffffff81c2a3e0 T cik_asic_reset +ffffffff81c2a7f0 t cik_gpu_pci_config_reset +ffffffff81c2b000 T cik_gfx_is_lockup +ffffffff81c2b070 T cik_pcie_gart_tlb_flush +ffffffff81c2b0c0 T cik_ib_parse +ffffffff81c2b0f0 T cik_vm_init +ffffffff81c2b150 T cik_vm_fini +ffffffff81c2b180 T cik_vm_flush +ffffffff81c2bdf0 T cik_enter_rlc_safe_mode +ffffffff81c2bee0 T cik_exit_rlc_safe_mode +ffffffff81c2bf20 T cik_update_cg +ffffffff81c2c420 t cik_enable_mgcg +ffffffff81c2c940 t cik_enable_cgcg +ffffffff81c2ccb0 T cik_init_cp_pg_table +ffffffff81c2cf20 T cik_get_csb_size +ffffffff81c2cfb0 T cik_get_csb_buffer +ffffffff81c2d140 T cik_irq_set +ffffffff81c2dec0 t cik_disable_interrupt_state +ffffffff81c2e380 T cik_irq_process +ffffffff81c2fb50 t cik_irq_ack +ffffffff81c304d0 T cik_resume +ffffffff81c30560 t cik_init_golden_registers +ffffffff81c30720 t cik_startup +ffffffff81c334f0 T cik_suspend +ffffffff81c338e0 T cik_init +ffffffff81c33e00 t cik_init_microcode +ffffffff81c34b50 t cik_uvd_init +ffffffff81c34c00 t cik_vce_init +ffffffff81c34cd0 t cik_cp_fini +ffffffff81c34d50 t cik_irq_fini +ffffffff81c34e60 t cik_mec_fini +ffffffff81c34f10 t cik_pcie_gart_fini +ffffffff81c35010 T cik_fini +ffffffff81c35330 T dce8_program_fmt +ffffffff81c35460 T dce8_bandwidth_update +ffffffff81c36070 T cik_get_gpu_clock_counter +ffffffff81c36130 T cik_set_uvd_clocks +ffffffff81c361b0 t cik_set_uvd_clock +ffffffff81c36320 T cik_set_vce_clocks +ffffffff81c36560 t cik_wait_for_rlc_serdes +ffffffff81c36720 t cik_mec_init +ffffffff81c36900 t cik_uvd_start +ffffffff81c369e0 t cik_vce_start +ffffffff81c36af0 t cik_irq_init +ffffffff81c37670 t cik_cp_resume +ffffffff81c38e10 t cik_uvd_resume +ffffffff81c38ee0 t cik_vce_resume +ffffffff81c38fd0 t pcie_capability_set_word +ffffffff81c390e0 t pcie_capability_read_word +ffffffff81c39180 t pcie_capability_clear_and_set_word +ffffffff81c392a0 t pcie_capability_write_word +ffffffff81c39360 t cik_get_cu_active_bitmap +ffffffff81c394e0 t radeon_bo_reserve +ffffffff81c39650 t radeon_bo_unreserve +ffffffff81c39730 t cik_update_gfx_pg +ffffffff81c398d0 t cik_compute_stop +ffffffff81c39a40 t cik_cp_compute_fini +ffffffff81c39be0 t request_firmware +ffffffff81c39c70 t release_firmware +ffffffff81c39cb0 t dce8_latency_watermark +ffffffff81c3a000 T cik_sdma_get_rptr +ffffffff81c3a070 T cik_sdma_get_wptr +ffffffff81c3a0c0 T cik_sdma_set_wptr +ffffffff81c3a110 T cik_sdma_ring_ib_execute +ffffffff81c3a510 T cik_sdma_fence_ring_emit +ffffffff81c3a6e0 t cik_sdma_hdp_flush_ring_emit +ffffffff81c3a910 T cik_sdma_semaphore_ring_emit +ffffffff81c3aa30 T cik_sdma_enable +ffffffff81c3ac10 T cik_sdma_resume +ffffffff81c3b0f0 T cik_sdma_fini +ffffffff81c3b130 T cik_copy_dma +ffffffff81c3b530 T cik_sdma_ring_test +ffffffff81c3b7e0 T cik_sdma_ib_test +ffffffff81c3ba40 T cik_sdma_is_lockup +ffffffff81c3bac0 T cik_sdma_vm_copy_pages +ffffffff81c3bbd0 T cik_sdma_vm_write_pages +ffffffff81c3bd40 T cik_sdma_vm_set_pages +ffffffff81c3bec0 T cik_sdma_vm_pad_ib +ffffffff81c3bf10 T cik_dma_vm_flush +ffffffff81c3d000 T cypress_enable_spread_spectrum +ffffffff81c3d140 T cypress_start_dpm +ffffffff81c3d190 T cypress_enable_sclk_control +ffffffff81c3d1f0 T cypress_enable_mclk_control +ffffffff81c3d250 T cypress_notify_smc_display_change +ffffffff81c3d2a0 T cypress_program_response_times +ffffffff81c3d360 T cypress_advertise_gen2_capability +ffffffff81c3d430 T cypress_notify_link_speed_change_after_state_change +ffffffff81c3d4f0 T cypress_notify_link_speed_change_before_state_change +ffffffff81c3d5b0 T cypress_get_strobe_mode_settings +ffffffff81c3d6b0 T cypress_get_mclk_frequency_ratio +ffffffff81c3d760 T cypress_map_clkf_to_ibias +ffffffff81c3d820 T cypress_convert_power_level_to_smc +ffffffff81c3dbf0 t cypress_populate_mclk_value +ffffffff81c3e000 T cypress_upload_sw_state +ffffffff81c3e180 T cypress_upload_mc_reg_table +ffffffff81c3e240 t cypress_convert_mc_reg_table_to_smc +ffffffff81c3e4d0 T cypress_calculate_burst_time +ffffffff81c3e560 T cypress_program_memory_timing_parameters +ffffffff81c3e700 T cypress_populate_smc_initial_state +ffffffff81c3eab0 T cypress_populate_smc_acpi_state +ffffffff81c3ee30 T cypress_construct_voltage_tables +ffffffff81c3efc0 T cypress_populate_smc_voltage_tables +ffffffff81c3f0f0 T cypress_get_mvdd_configuration +ffffffff81c3f1c0 T cypress_populate_mc_reg_table +ffffffff81c3f410 T cypress_get_table_locations +ffffffff81c3f4f0 T cypress_enable_display_gap +ffffffff81c3f550 T cypress_dpm_setup_asic +ffffffff81c3f640 T cypress_dpm_enable +ffffffff81c40110 t cypress_force_mc_use_s1 +ffffffff81c40390 t cypress_gfx_clock_gating_enable +ffffffff81c406a0 t cypress_mg_clock_gating_enable +ffffffff81c40920 T cypress_dpm_disable +ffffffff81c40b50 T cypress_dpm_set_power_state +ffffffff81c40d90 T cypress_dpm_display_configuration_changed +ffffffff81c40e70 T cypress_dpm_init +ffffffff81c410e0 T cypress_dpm_fini +ffffffff81c41170 T cypress_dpm_vblank_too_short +ffffffff81c411e0 t cypress_wait_for_mc_sequencer +ffffffff81c42000 T dce3_2_afmt_hdmi_write_speaker_allocation +ffffffff81c42070 T dce3_2_afmt_dp_write_speaker_allocation +ffffffff81c420e0 T dce3_2_afmt_write_sad_regs +ffffffff81c421e0 T dce3_2_audio_set_dto +ffffffff81c42320 T dce3_2_hdmi_update_acr +ffffffff81c42680 T dce3_2_set_audio_packet +ffffffff81c42810 T dce3_2_set_mute +ffffffff81c43000 T dce6_endpoint_rreg +ffffffff81c430e0 T dce6_endpoint_wreg +ffffffff81c431d0 T dce6_audio_get_pin +ffffffff81c43360 T dce6_afmt_select_pin +ffffffff81c433f0 T dce6_afmt_write_latency_fields +ffffffff81c434b0 T dce6_afmt_hdmi_write_speaker_allocation +ffffffff81c43580 T dce6_afmt_dp_write_speaker_allocation +ffffffff81c43650 T dce6_afmt_write_sad_regs +ffffffff81c43790 T dce6_audio_enable +ffffffff81c437e0 T dce6_hdmi_audio_set_dto +ffffffff81c43850 T dce6_dp_audio_set_dto +ffffffff81c44000 T eg_cg_rreg +ffffffff81c44080 T eg_cg_wreg +ffffffff81c440f0 T eg_pif_phy0_rreg +ffffffff81c44170 T eg_pif_phy0_wreg +ffffffff81c441d0 T eg_pif_phy1_rreg +ffffffff81c44250 T eg_pif_phy1_wreg +ffffffff81c442b0 T evergreen_get_allowed_info_register +ffffffff81c44340 T evergreen_tiling_fields +ffffffff81c443e0 T sumo_set_uvd_clocks +ffffffff81c444c0 t sumo_set_uvd_clock +ffffffff81c446b0 T evergreen_set_uvd_clocks +ffffffff81c44c30 T evergreen_fix_pci_max_read_req_size +ffffffff81c44df0 T dce4_program_fmt +ffffffff81c44f10 T dce4_wait_for_vblank +ffffffff81c45190 T evergreen_page_flip +ffffffff81c45320 T evergreen_page_flip_pending +ffffffff81c45390 T evergreen_get_temp +ffffffff81c45460 T sumo_get_temp +ffffffff81c454b0 T sumo_pm_init_profile +ffffffff81c455f0 T btc_pm_init_profile +ffffffff81c45700 T evergreen_pm_misc +ffffffff81c458a0 T evergreen_pm_prepare +ffffffff81c459a0 T evergreen_pm_finish +ffffffff81c45aa0 T evergreen_hpd_sense +ffffffff81c45b10 T evergreen_hpd_set_polarity +ffffffff81c45c50 T evergreen_hpd_init +ffffffff81c45d20 T evergreen_hpd_fini +ffffffff81c45dc0 T evergreen_get_number_of_dram_channels +ffffffff81c45e10 T evergreen_bandwidth_update +ffffffff81c45fd0 t evergreen_line_buffer_adjust +ffffffff81c461c0 t evergreen_program_watermarks +ffffffff81c46c20 T evergreen_mc_wait_for_idle +ffffffff81c46cc0 T evergreen_pcie_gart_tlb_flush +ffffffff81c46d90 T evergreen_mc_stop +ffffffff81c47890 T evergreen_mc_resume +ffffffff81c47fa0 T evergreen_mc_program +ffffffff81c483a0 T evergreen_ring_ib_execute +ffffffff81c48830 T evergreen_mc_init +ffffffff81c48970 T evergreen_print_gpu_status_regs +ffffffff81c489a0 T evergreen_is_display_hung +ffffffff81c48ba0 T evergreen_gpu_check_soft_reset +ffffffff81c48d00 T evergreen_gpu_pci_config_reset +ffffffff81c48e80 T evergreen_asic_reset +ffffffff81c491a0 T evergreen_gfx_is_lockup +ffffffff81c49210 T sumo_rlc_fini +ffffffff81c493c0 t radeon_bo_reserve +ffffffff81c49530 t radeon_bo_unreserve +ffffffff81c49610 T sumo_rlc_init +ffffffff81c49de0 T evergreen_rlc_resume +ffffffff81c4a150 T evergreen_get_vblank_counter +ffffffff81c4a1c0 T evergreen_disable_interrupt_state +ffffffff81c4a490 T evergreen_irq_set +ffffffff81c4aa50 T evergreen_irq_suspend +ffffffff81c4aaa0 T evergreen_irq_process +ffffffff81c4b5f0 t evergreen_irq_ack +ffffffff81c4bcb0 T evergreen_resume +ffffffff81c4bd90 t evergreen_init_golden_registers +ffffffff81c4bfa0 t evergreen_startup +ffffffff81c4d830 T evergreen_suspend +ffffffff81c4d9d0 T evergreen_init +ffffffff81c4ddd0 t evergreen_pcie_gart_fini +ffffffff81c4def0 T evergreen_fini +ffffffff81c4e0e0 T evergreen_pcie_gen2_enable +ffffffff81c4e310 T evergreen_program_aspm +ffffffff81c4e9a0 t evergreen_latency_watermark +ffffffff81c4eba0 t evergreen_uvd_start +ffffffff81c4ec50 t evergreen_cp_load_microcode +ffffffff81c4edb0 t evergreen_cp_resume +ffffffff81c4fa20 t evergreen_uvd_resume +ffffffff81c50000 T evergreen_cs_parse +ffffffff81c52760 T evergreen_dma_cs_parse +ffffffff81c538d0 T evergreen_ib_parse +ffffffff81c53d30 T evergreen_dma_ib_parse +ffffffff81c53f00 t evergreen_cs_track_check +ffffffff81c54f70 t evergreen_cs_handle_reg +ffffffff81c56dd0 t evergreen_surface_value_conv_check +ffffffff81c570a0 t evergreen_surface_check +ffffffff81c57510 t evergreen_cs_track_validate_htile +ffffffff81c577b0 t evergreen_vm_reg_valid +ffffffff81c58000 T evergreen_dma_fence_ring_emit +ffffffff81c582b0 T evergreen_dma_ring_ib_execute +ffffffff81c58600 T evergreen_copy_dma +ffffffff81c589a0 T evergreen_dma_is_lockup +ffffffff81c59000 T dce4_audio_enable +ffffffff81c59080 T evergreen_hdmi_update_acr +ffffffff81c592a0 T dce4_afmt_write_latency_fields +ffffffff81c59310 T dce4_afmt_hdmi_write_speaker_allocation +ffffffff81c59380 T dce4_afmt_dp_write_speaker_allocation +ffffffff81c593f0 T evergreen_hdmi_write_sad_regs +ffffffff81c594f0 T evergreen_set_avi_packet +ffffffff81c59690 T dce4_hdmi_audio_set_dto +ffffffff81c59770 T dce4_dp_audio_set_dto +ffffffff81c59860 T dce4_set_vbi_packet +ffffffff81c598d0 T dce4_hdmi_set_color_depth +ffffffff81c59a20 T dce4_set_audio_packet +ffffffff81c59c30 T dce4_set_mute +ffffffff81c59d40 T evergreen_hdmi_enable +ffffffff81c5a070 T evergreen_dp_enable +ffffffff81c5b000 T kv_dpm_enable_bapm +ffffffff81c5b070 T kv_dpm_enable +ffffffff81c5bf70 t kv_populate_vce_table +ffffffff81c5c1f0 t kv_populate_samu_table +ffffffff81c5c450 t kv_populate_acp_table +ffffffff81c5c5e0 t kv_start_am +ffffffff81c5c620 t kv_enable_auto_thermal_throttling +ffffffff81c5c660 t kv_enable_dpm_voltage_scaling +ffffffff81c5c6a0 t kv_set_dpm_interval +ffffffff81c5c6e0 t kv_start_dpm +ffffffff81c5c720 t kv_enable_didt +ffffffff81c5c9d0 T kv_dpm_late_enable +ffffffff81c5cbd0 T kv_dpm_powergate_uvd +ffffffff81c5cd50 T kv_dpm_disable +ffffffff81c5d0c0 T kv_dpm_force_performance_level +ffffffff81c5d240 t kv_force_dpm_lowest +ffffffff81c5d310 T kv_dpm_pre_set_power_state +ffffffff81c5d890 T kv_dpm_set_power_state +ffffffff81c5e060 t kv_set_valid_clock_range +ffffffff81c5e200 t kv_calculate_ds_divider +ffffffff81c5e370 t kv_calculate_nbps_level_settings +ffffffff81c5e4f0 t kv_update_vce_dpm +ffffffff81c5e6d0 T kv_dpm_post_set_power_state +ffffffff81c5e770 T kv_dpm_setup_asic +ffffffff81c5e7d0 T kv_dpm_init +ffffffff81c5f080 T kv_dpm_debugfs_print_current_performance_level +ffffffff81c5f0f0 T kv_dpm_get_current_sclk +ffffffff81c5f160 T kv_dpm_get_current_mclk +ffffffff81c5f190 T kv_dpm_print_power_state +ffffffff81c5f230 T kv_dpm_fini +ffffffff81c5f2d0 T kv_dpm_display_configuration_changed +ffffffff81c5f300 T kv_dpm_get_sclk +ffffffff81c5f350 T kv_dpm_get_mclk +ffffffff81c60000 T kv_notify_message_to_smu +ffffffff81c600c0 T kv_dpm_get_enable_mask +ffffffff81c60190 T kv_send_msg_to_smc_with_parameter +ffffffff81c60260 T kv_read_smc_sram_dword +ffffffff81c602f0 T kv_smc_dpm_enable +ffffffff81c60420 T kv_smc_bapm_enable +ffffffff81c60550 T kv_copy_bytes_to_smc +ffffffff81c61000 T tn_smc_rreg +ffffffff81c61080 T tn_smc_wreg +ffffffff81c610f0 T ni_mc_load_microcode +ffffffff81c612e0 T ni_init_microcode +ffffffff81c617b0 t request_firmware +ffffffff81c61840 t release_firmware +ffffffff81c61880 T cayman_get_allowed_info_register +ffffffff81c61910 T tn_get_temp +ffffffff81c619a0 T cayman_pcie_gart_tlb_flush +ffffffff81c619f0 T cayman_cp_int_cntl_setup +ffffffff81c61a40 T cayman_fence_ring_emit +ffffffff81c61dd0 T cayman_ring_ib_execute +ffffffff81c62230 T cayman_gfx_get_rptr +ffffffff81c622c0 T cayman_gfx_get_wptr +ffffffff81c62330 T cayman_gfx_set_wptr +ffffffff81c623b0 T cayman_gpu_check_soft_reset +ffffffff81c62540 T cayman_asic_reset +ffffffff81c62840 T cayman_gfx_is_lockup +ffffffff81c628b0 T cayman_resume +ffffffff81c62940 t ni_init_golden_registers +ffffffff81c62a20 t cayman_startup +ffffffff81c63e60 T cayman_suspend +ffffffff81c64050 T cayman_init +ffffffff81c643c0 t cayman_uvd_init +ffffffff81c64470 t cayman_vce_init +ffffffff81c64540 t cayman_cp_fini +ffffffff81c645c0 t cayman_pcie_gart_fini +ffffffff81c64700 T cayman_fini +ffffffff81c64980 T cayman_vm_init +ffffffff81c649e0 T cayman_vm_fini +ffffffff81c64a10 T cayman_vm_decode_fault +ffffffff81c64aa0 T cayman_vm_flush +ffffffff81c64f00 T tn_set_vce_clocks +ffffffff81c65160 t cayman_uvd_start +ffffffff81c65210 t cayman_vce_start +ffffffff81c65320 t cayman_cp_load_microcode +ffffffff81c654b0 t cayman_cp_resume +ffffffff81c66370 t cayman_uvd_resume +ffffffff81c66440 t cayman_vce_resume +ffffffff81c67000 T cayman_dma_get_rptr +ffffffff81c67070 T cayman_dma_get_wptr +ffffffff81c670c0 T cayman_dma_set_wptr +ffffffff81c67110 T cayman_dma_ring_ib_execute +ffffffff81c674a0 T cayman_dma_stop +ffffffff81c67550 T cayman_dma_resume +ffffffff81c677b0 T cayman_dma_fini +ffffffff81c67870 T cayman_dma_is_lockup +ffffffff81c678f0 T cayman_dma_vm_copy_pages +ffffffff81c679f0 T cayman_dma_vm_write_pages +ffffffff81c67b50 T cayman_dma_vm_set_pages +ffffffff81c67cc0 T cayman_dma_vm_pad_ib +ffffffff81c67d10 T cayman_dma_vm_flush +ffffffff81c69000 T ni_get_pi +ffffffff81c69030 T ni_get_ps +ffffffff81c69060 T ni_dpm_vblank_too_short +ffffffff81c690d0 T ni_dpm_force_performance_level +ffffffff81c69220 T ni_copy_and_switch_arb_sets +ffffffff81c694f0 T ni_set_uvd_clock_before_set_eng_clock +ffffffff81c69570 T ni_set_uvd_clock_after_set_eng_clock +ffffffff81c695f0 T ni_dpm_setup_asic +ffffffff81c69800 T ni_update_current_ps +ffffffff81c698c0 T ni_update_requested_ps +ffffffff81c69980 T ni_dpm_enable +ffffffff81c6a7e0 t ni_init_smc_table +ffffffff81c6b190 t ni_init_smc_spll_table +ffffffff81c6b300 t ni_init_arb_table_index +ffffffff81c6b3a0 t ni_populate_mc_reg_table +ffffffff81c6b6e0 t ni_initialize_smc_cac_tables +ffffffff81c6c960 t ni_initialize_hardware_cac_manager +ffffffff81c6ce90 t ni_populate_smc_tdp_limits +ffffffff81c6d040 t ni_program_response_times +ffffffff81c6d150 T ni_dpm_disable +ffffffff81c6d510 t ni_enable_power_containment +ffffffff81c6d5d0 t ni_enable_smc_cac +ffffffff81c6d6f0 T ni_dpm_pre_set_power_state +ffffffff81c6dcd0 T ni_dpm_set_power_state +ffffffff81c6dfc0 t ni_upload_sw_state +ffffffff81c6ebb0 t ni_upload_mc_reg_table +ffffffff81c6ed60 t ni_power_control_set_level +ffffffff81c6ee30 T ni_dpm_post_set_power_state +ffffffff81c6ef00 T ni_dpm_init +ffffffff81c6f8a0 T ni_dpm_fini +ffffffff81c6f950 T ni_dpm_print_power_state +ffffffff81c6fa20 T ni_dpm_debugfs_print_current_performance_level +ffffffff81c6fa60 T ni_dpm_get_current_sclk +ffffffff81c6fad0 T ni_dpm_get_current_mclk +ffffffff81c6fb40 T ni_dpm_get_sclk +ffffffff81c6fba0 T ni_dpm_get_mclk +ffffffff81c6fc00 t ni_do_program_memory_timing_parameters +ffffffff81c6fd40 t ni_calculate_sclk_params +ffffffff81c6ff70 t ni_calculate_power_boost_limit +ffffffff81c70130 t ni_populate_mclk_value +ffffffff81c71000 T r100_wait_for_vblank +ffffffff81c71190 T r100_page_flip +ffffffff81c71450 T r100_page_flip_pending +ffffffff81c71500 T r100_pm_get_dynpm_state +ffffffff81c71720 T r100_pm_init_profile +ffffffff81c71800 T r100_pm_misc +ffffffff81c71c40 T r100_pm_prepare +ffffffff81c71cf0 T r100_pm_finish +ffffffff81c71da0 T r100_gui_idle +ffffffff81c71de0 T r100_hpd_sense +ffffffff81c71e40 T r100_hpd_set_polarity +ffffffff81c71f00 T r100_hpd_init +ffffffff81c71fa0 T r100_hpd_fini +ffffffff81c72010 T r100_pci_gart_tlb_flush +ffffffff81c72040 T r100_pci_gart_init +ffffffff81c72110 T r100_pci_gart_get_page_entry +ffffffff81c72140 T r100_pci_gart_set_page +ffffffff81c72180 T r100_pci_gart_enable +ffffffff81c72270 T r100_pci_gart_disable +ffffffff81c722f0 T r100_pci_gart_fini +ffffffff81c72370 T r100_irq_set +ffffffff81c72450 T r100_irq_disable +ffffffff81c724c0 T r100_irq_process +ffffffff81c727c0 T r100_get_vblank_counter +ffffffff81c72810 T r100_fence_ring_emit +ffffffff81c72c70 T r100_semaphore_ring_emit +ffffffff81c72ca0 T r100_copy_blit +ffffffff81c73330 T r100_ring_start +ffffffff81c73420 T r100_gfx_get_rptr +ffffffff81c73480 T r100_gfx_get_wptr +ffffffff81c734c0 T r100_gfx_set_wptr +ffffffff81c73500 T r100_cp_init +ffffffff81c73a30 T r100_debugfs_cp_init +ffffffff81c73a60 T r100_cp_fini +ffffffff81c73b00 T r100_cp_disable +ffffffff81c73c40 T r100_gui_wait_for_idle +ffffffff81c73d30 T r100_reloc_pitch_offset +ffffffff81c73e70 T r100_packet3_load_vbpntr +ffffffff81c74110 T r100_cs_parse_packet0 +ffffffff81c74220 T r100_cs_packet_parse_vline +ffffffff81c74430 T r100_cs_track_check_pkt3_indx_buffer +ffffffff81c744b0 T r100_cs_parse +ffffffff81c756a0 T r100_cs_track_clear +ffffffff81c75a30 T r100_cs_track_check +ffffffff81c76240 T r100_mc_wait_for_idle +ffffffff81c762e0 T r100_gpu_is_lockup +ffffffff81c76340 T r100_enable_bm +ffffffff81c76390 T r100_bm_disable +ffffffff81c76440 T r100_asic_reset +ffffffff81c76770 T r100_mc_stop +ffffffff81c76930 T r100_mc_resume +ffffffff81c769f0 T r100_set_common_regs +ffffffff81c76b90 T r100_vram_init_sizes +ffffffff81c76d80 T r100_vga_set_state +ffffffff81c76de0 T r100_pll_errata_after_index +ffffffff81c76e20 T r100_pll_rreg +ffffffff81c76f50 T r100_pll_wreg +ffffffff81c77060 T r100_debugfs_rbbm_init +ffffffff81c77090 T r100_debugfs_mc_info_init +ffffffff81c770c0 T r100_set_surface_reg +ffffffff81c772d0 T r100_clear_surface_reg +ffffffff81c77380 T r100_bandwidth_update +ffffffff81c77dd0 T r100_ring_test +ffffffff81c78080 T r100_ring_ib_execute +ffffffff81c782e0 T r100_ib_test +ffffffff81c78620 T r100_vga_render_disable +ffffffff81c78680 T r100_resume +ffffffff81c78870 t r100_startup +ffffffff81c78db0 T r100_suspend +ffffffff81c78e90 T r100_fini +ffffffff81c78fa0 T r100_restore_sanity +ffffffff81c79040 T r100_init +ffffffff81c79490 t r100_set_safe_registers +ffffffff81c79510 T r100_mm_rreg_slow +ffffffff81c79590 T r100_mm_wreg_slow +ffffffff81c795f0 T r100_io_rreg +ffffffff81c79690 T r100_io_wreg +ffffffff81c79700 t r100_get_vtx_size +ffffffff81c797f0 t r100_cs_track_texture_print +ffffffff81c7a000 T r200_copy_dma +ffffffff81c7a470 T r200_packet0_check +ffffffff81c7b240 t r200_get_vtx_size_0 +ffffffff81c7b400 t r200_get_vtx_size_1 +ffffffff81c7b490 T r200_set_safe_registers +ffffffff81c7c000 T rv370_pcie_rreg +ffffffff81c7c080 T rv370_pcie_wreg +ffffffff81c7c0f0 T rv370_pcie_gart_tlb_flush +ffffffff81c7c2f0 T rv370_pcie_gart_get_page_entry +ffffffff81c7c350 T rv370_pcie_gart_set_page +ffffffff81c7c390 T rv370_pcie_gart_init +ffffffff81c7c460 T rv370_pcie_gart_enable +ffffffff81c7c7c0 T rv370_pcie_gart_disable +ffffffff81c7c940 T rv370_pcie_gart_fini +ffffffff81c7c970 T r300_fence_ring_emit +ffffffff81c7cee0 T r300_ring_start +ffffffff81c7d850 T r300_mc_wait_for_idle +ffffffff81c7d8f0 T r300_asic_reset +ffffffff81c7db10 T r300_mc_init +ffffffff81c7dbc0 T rv370_set_pcie_lanes +ffffffff81c7dd80 T rv370_get_pcie_lanes +ffffffff81c7de30 T r300_cs_parse +ffffffff81c7e1a0 t r300_packet0_check +ffffffff81c7f060 T r300_set_reg_safe +ffffffff81c7f0a0 T r300_mc_program +ffffffff81c7f230 T r300_clock_startup +ffffffff81c7f2c0 T r300_resume +ffffffff81c7f490 t r300_startup +ffffffff81c7f7f0 T r300_suspend +ffffffff81c7f870 T r300_fini +ffffffff81c7f950 T r300_init +ffffffff81c80000 T r420_pm_init_profile +ffffffff81c800f0 T r420_pipes_init +ffffffff81c802d0 T r420_mc_rreg +ffffffff81c80350 T r420_mc_wreg +ffffffff81c803c0 T r420_resume +ffffffff81c80590 t r420_startup +ffffffff81c80790 T r420_suspend +ffffffff81c80930 T r420_fini +ffffffff81c80a10 T r420_init +ffffffff81c80c90 T r420_debugfs_pipes_info_init +ffffffff81c80cc0 t r420_cp_errata_init +ffffffff81c81000 T r520_mc_wait_for_idle +ffffffff81c810a0 T r520_resume +ffffffff81c81190 t r520_startup +ffffffff81c81580 T r520_init +ffffffff81c82000 T r600_rcu_rreg +ffffffff81c82080 T r600_rcu_wreg +ffffffff81c820f0 T r600_uvd_ctx_rreg +ffffffff81c82170 T r600_uvd_ctx_wreg +ffffffff81c821e0 T r600_get_allowed_info_register +ffffffff81c82260 T r600_get_xclk +ffffffff81c82290 T r600_set_uvd_clocks +ffffffff81c827f0 T dce3_program_fmt +ffffffff81c82910 T rv6xx_get_temp +ffffffff81c82960 T r600_pm_get_dynpm_state +ffffffff81c82d70 T rs780_pm_init_profile +ffffffff81c82e80 T r600_pm_init_profile +ffffffff81c83120 T r600_pm_misc +ffffffff81c83200 T r600_gui_idle +ffffffff81c83240 T r600_hpd_sense +ffffffff81c83360 T r600_hpd_set_polarity +ffffffff81c835e0 T r600_hpd_init +ffffffff81c837c0 T r600_hpd_fini +ffffffff81c83970 T r600_pcie_gart_tlb_flush +ffffffff81c83aa0 T r600_pcie_gart_init +ffffffff81c83b40 T r600_mc_wait_for_idle +ffffffff81c83be0 T rs780_mc_rreg +ffffffff81c83c80 T rs780_mc_wreg +ffffffff81c83d10 T r600_vram_scratch_init +ffffffff81c83e10 t radeon_bo_reserve +ffffffff81c83f80 t radeon_bo_unreserve +ffffffff81c84060 T r600_vram_scratch_fini +ffffffff81c840e0 T r600_set_bios_scratch_engine_hung +ffffffff81c84130 T r600_gpu_check_soft_reset +ffffffff81c844d0 T r600_asic_reset +ffffffff81c84860 t r600_gpu_pci_config_reset +ffffffff81c84a70 T r600_gfx_is_lockup +ffffffff81c84ae0 T r6xx_remap_render_backend +ffffffff81c84ca0 T r600_count_pipe_bits +ffffffff81c84d10 T r600_pciep_rreg +ffffffff81c84d90 T r600_pciep_wreg +ffffffff81c84e00 T r600_cp_stop +ffffffff81c84e80 T r600_init_microcode +ffffffff81c85340 t request_firmware +ffffffff81c853d0 t release_firmware +ffffffff81c85410 T r600_gfx_get_rptr +ffffffff81c85470 T r600_gfx_get_wptr +ffffffff81c854b0 T r600_gfx_set_wptr +ffffffff81c854f0 T r600_cp_start +ffffffff81c85860 T r600_cp_resume +ffffffff81c85bc0 T r600_ring_init +ffffffff81c85c60 T r600_cp_fini +ffffffff81c85cf0 T r600_scratch_init +ffffffff81c85d60 T r600_ring_test +ffffffff81c86000 T r600_fence_ring_emit +ffffffff81c868a0 T r600_semaphore_ring_emit +ffffffff81c86a80 T r600_copy_cpdma +ffffffff81c87030 T r600_set_surface_reg +ffffffff81c87060 T r600_clear_surface_reg +ffffffff81c87090 T r600_vga_set_state +ffffffff81c870f0 T r600_resume +ffffffff81c87180 t r600_startup +ffffffff81c88e60 T r600_suspend +ffffffff81c88fd0 T r600_irq_suspend +ffffffff81c89090 t r600_pcie_gart_disable +ffffffff81c89290 T r600_init +ffffffff81c899f0 T r600_ih_ring_init +ffffffff81c89a60 T r600_irq_fini +ffffffff81c89ba0 t r600_pcie_gart_fini +ffffffff81c89bd0 T r600_fini +ffffffff81c89d60 T r600_ring_ib_execute +ffffffff81c8a1f0 T r600_ib_test +ffffffff81c8a4a0 T r600_ih_ring_alloc +ffffffff81c8a5c0 T r600_ih_ring_fini +ffffffff81c8a650 T r600_rlc_stop +ffffffff81c8a7e0 T r600_disable_interrupts +ffffffff81c8a890 T r600_irq_init +ffffffff81c8acf0 t r600_disable_interrupt_state +ffffffff81c8aff0 T r600_irq_disable +ffffffff81c8b0b0 T r600_irq_set +ffffffff81c8b830 t r600_irq_ack +ffffffff81c8bd60 T r600_irq_process +ffffffff81c8c960 T r600_mmio_hdp_flush +ffffffff81c8c9e0 T r600_set_pcie_lanes +ffffffff81c8cb10 T r600_get_pcie_lanes +ffffffff81c8cbe0 T r600_get_gpu_clock_counter +ffffffff81c8cc70 t r600_cp_load_microcode +ffffffff81c8cf40 t r600_uvd_resume +ffffffff81c8e000 T r600_fmt_is_valid_color +ffffffff81c8e040 T r600_fmt_is_valid_texture +ffffffff81c8e090 T r600_fmt_get_blocksize +ffffffff81c8e0d0 T r600_fmt_get_nblocksx +ffffffff81c8e120 T r600_fmt_get_nblocksy +ffffffff81c8e180 T r600_cs_common_vline_parse +ffffffff81c8e440 T r600_mip_minify +ffffffff81c8e4a0 T r600_cs_parse +ffffffff81c90360 T r600_dma_cs_next_reloc +ffffffff81c903e0 T r600_dma_cs_parse +ffffffff81c90a80 t r600_cs_track_check +ffffffff81c91bc0 t r600_cs_check_reg +ffffffff81c92ae0 t r600_is_safe_reg +ffffffff81c92b80 t r600_texture_size +ffffffff81c93000 T r600_dma_get_rptr +ffffffff81c93060 T r600_dma_get_wptr +ffffffff81c930a0 T r600_dma_set_wptr +ffffffff81c930e0 T r600_dma_stop +ffffffff81c93170 T r600_dma_resume +ffffffff81c93370 T r600_dma_fini +ffffffff81c933f0 T r600_dma_is_lockup +ffffffff81c93460 T r600_dma_ring_test +ffffffff81c936d0 T r600_dma_fence_ring_emit +ffffffff81c938b0 T r600_dma_semaphore_ring_emit +ffffffff81c939d0 T r600_dma_ib_test +ffffffff81c93bf0 T r600_dma_ring_ib_execute +ffffffff81c93f40 T r600_copy_dma +ffffffff81c95000 T r600_dpm_print_class_info +ffffffff81c952b0 T r600_dpm_print_cap_info +ffffffff81c95340 T r600_dpm_print_ps_status +ffffffff81c953d0 T r600_dpm_get_vblank_time +ffffffff81c95490 T r600_dpm_get_vrefresh +ffffffff81c95520 T r600_calculate_u_and_p +ffffffff81c955a0 T r600_calculate_at +ffffffff81c95650 T r600_gfx_clockgating_enable +ffffffff81c95750 T r600_dynamicpm_enable +ffffffff81c957a0 T r600_enable_thermal_protection +ffffffff81c95800 T r600_enable_acpi_pm +ffffffff81c95850 T r600_enable_dynamic_pcie_gen2 +ffffffff81c958a0 T r600_dynamicpm_enabled +ffffffff81c958e0 T r600_enable_sclk_control +ffffffff81c95940 T r600_enable_mclk_control +ffffffff81c959a0 T r600_enable_spll_bypass +ffffffff81c959f0 T r600_wait_for_spll_change +ffffffff81c95a70 T r600_set_bsp +ffffffff81c95ab0 T r600_set_at +ffffffff81c95b10 T r600_set_tc +ffffffff81c95b70 T r600_select_td +ffffffff81c95c20 T r600_set_vrc +ffffffff81c95c60 T r600_set_tpu +ffffffff81c95cc0 T r600_set_tpc +ffffffff81c95d20 T r600_set_sstu +ffffffff81c95d80 T r600_set_sst +ffffffff81c95dd0 T r600_set_git +ffffffff81c95e20 T r600_set_fctu +ffffffff81c95e80 T r600_set_fct +ffffffff81c95ed0 T r600_set_ctxcgtt3d_rphc +ffffffff81c95f30 T r600_set_ctxcgtt3d_rsdc +ffffffff81c95f90 T r600_set_vddc3d_oorsu +ffffffff81c95ff0 T r600_set_vddc3d_oorphc +ffffffff81c96050 T r600_set_vddc3d_oorsdc +ffffffff81c960b0 T r600_set_mpll_lock_time +ffffffff81c96100 T r600_set_mpll_reset_time +ffffffff81c96150 T r600_engine_clock_entry_enable +ffffffff81c96250 T r600_engine_clock_entry_enable_pulse_skipping +ffffffff81c96350 T r600_engine_clock_entry_enable_post_divider +ffffffff81c96450 T r600_engine_clock_entry_set_post_divider +ffffffff81c96510 T r600_engine_clock_entry_set_reference_divider +ffffffff81c965d0 T r600_engine_clock_entry_set_feedback_divider +ffffffff81c96690 T r600_engine_clock_entry_set_step_time +ffffffff81c96750 T r600_vid_rt_set_ssu +ffffffff81c967b0 T r600_vid_rt_set_vru +ffffffff81c96810 T r600_vid_rt_set_vrt +ffffffff81c96870 T r600_voltage_control_enable_pins +ffffffff81c968c0 T r600_voltage_control_program_voltages +ffffffff81c96950 T r600_voltage_control_deactivate_static_control +ffffffff81c969e0 T r600_power_level_enable +ffffffff81c96a50 T r600_power_level_set_voltage_index +ffffffff81c96ac0 T r600_power_level_set_mem_clock_index +ffffffff81c96b20 T r600_power_level_set_eng_clock_index +ffffffff81c96b90 T r600_power_level_set_watermark_id +ffffffff81c96c00 T r600_power_level_set_pcie_gen2 +ffffffff81c96c60 T r600_power_level_get_current_index +ffffffff81c96ca0 T r600_power_level_get_target_index +ffffffff81c96ce0 T r600_power_level_set_enter_index +ffffffff81c96d40 T r600_wait_for_power_level_unequal +ffffffff81c96e30 T r600_wait_for_power_level +ffffffff81c96f20 T r600_start_dpm +ffffffff81c97200 T r600_stop_dpm +ffffffff81c97250 T r600_dpm_pre_set_power_state +ffffffff81c97280 T r600_dpm_post_set_power_state +ffffffff81c972b0 T r600_is_uvd_state +ffffffff81c972f0 T r600_is_internal_thermal_sensor +ffffffff81c97330 T r600_dpm_late_enable +ffffffff81c97440 T r600_get_platform_caps +ffffffff81c974e0 T r600_parse_extended_power_table +ffffffff81c982a0 T r600_free_extended_power_table +ffffffff81c983a0 T r600_get_pcie_gen_support +ffffffff81c983f0 T r600_get_pcie_lane_support +ffffffff81c98450 T r600_encode_pci_lane_width +ffffffff81c99000 T r600_audio_update_hdmi +ffffffff81c99170 t r600_audio_status +ffffffff81c99290 T r600_hdmi_buffer_status_changed +ffffffff81c99330 T r600_hdmi_update_audio_settings +ffffffff81c99700 T r600_audio_enable +ffffffff81c99780 T r600_audio_get_pin +ffffffff81c997b0 T r600_hdmi_update_acr +ffffffff81c99b50 T r600_set_avi_packet +ffffffff81c99d50 T r600_hdmi_audio_workaround +ffffffff81c99e20 T r600_hdmi_audio_set_dto +ffffffff81c99ee0 T r600_set_vbi_packet +ffffffff81c99fa0 T r600_set_audio_packet +ffffffff81c9a270 T r600_set_mute +ffffffff81c9a380 T r600_hdmi_enable +ffffffff81c9b000 T radeon_acpi_is_pcie_performance_request_supported +ffffffff81c9b040 T radeon_acpi_pcie_notify_device_ready +ffffffff81c9b160 T radeon_acpi_pcie_performance_request +ffffffff81c9b4f0 T radeon_acpi_init +ffffffff81c9bc60 t radeon_acpi_event +ffffffff81c9bf60 T radeon_acpi_fini +ffffffff81c9c000 T radeon_agp_head_init +ffffffff81c9c050 T radeon_agp_init +ffffffff81c9c0a0 T radeon_agp_resume +ffffffff81c9c130 T radeon_agp_fini +ffffffff81c9c180 T radeon_agp_suspend +ffffffff81c9d000 T radeon_agp_disable +ffffffff81c9d120 T radeon_asic_init +ffffffff81c9d8f0 t radeon_invalid_rreg +ffffffff81c9d930 t radeon_invalid_wreg +ffffffff81c9d970 t radeon_invalid_get_allowed_info_register +ffffffff81c9e000 T radeon_atombios_i2c_init +ffffffff81c9e3a0 T radeon_atombios_lookup_gpio +ffffffff81c9e4a0 T radeon_get_atom_connector_info_from_object_table +ffffffff81c9ede0 t radeon_lookup_i2c_gpio +ffffffff81c9f0d0 t radeon_atom_apply_quirks +ffffffff81c9f4f0 T radeon_get_atom_connector_info_from_supported_devices_table +ffffffff81c9f9f0 T radeon_atom_get_clock_info +ffffffff81c9fdd0 T radeon_atombios_sideport_present +ffffffff81c9fe80 T radeon_atombios_get_tmds_info +ffffffff81c9ffc0 T radeon_atombios_get_ppll_ss_info +ffffffff81ca00e0 T radeon_atombios_get_asic_ss_info +ffffffff81ca03c0 t radeon_atombios_get_igp_ss_overrides +ffffffff81ca04d0 T radeon_atombios_get_lvds_info +ffffffff81ca0830 T radeon_atombios_get_primary_dac_info +ffffffff81ca08f0 T radeon_atom_get_tv_timings +ffffffff81ca0b30 T radeon_atombios_get_tv_info +ffffffff81ca0bf0 T radeon_atombios_get_tv_dac_info +ffffffff81ca0cf0 T radeon_atombios_get_default_voltages +ffffffff81ca0db0 T radeon_atombios_get_power_modes +ffffffff81ca1e20 T radeon_atom_get_clock_dividers +ffffffff81ca2110 T radeon_atom_get_memory_pll_dividers +ffffffff81ca2250 T radeon_atom_set_clock_gating +ffffffff81ca22a0 T radeon_atom_get_engine_clock +ffffffff81ca22f0 T radeon_atom_get_memory_clock +ffffffff81ca2340 T radeon_atom_set_engine_clock +ffffffff81ca2390 T radeon_atom_set_memory_clock +ffffffff81ca23f0 T radeon_atom_set_engine_dram_timings +ffffffff81ca2460 T radeon_atom_update_memory_dll +ffffffff81ca24b0 T radeon_atom_set_ac_timing +ffffffff81ca2500 T radeon_atom_set_voltage +ffffffff81ca25d0 T radeon_atom_get_max_vddc +ffffffff81ca26b0 T radeon_atom_get_leakage_vddc_based_on_leakage_idx +ffffffff81ca2780 T radeon_atom_get_leakage_id_from_vbios +ffffffff81ca2840 T radeon_atom_get_leakage_vddc_based_on_leakage_params +ffffffff81ca2a60 T radeon_atom_get_voltage_evv +ffffffff81ca2b20 T radeon_atom_get_voltage_gpio_settings +ffffffff81ca2c20 T radeon_atom_is_voltage_gpio +ffffffff81ca2db0 T radeon_atom_get_svi2_info +ffffffff81ca2ea0 T radeon_atom_get_max_voltage +ffffffff81ca3030 T radeon_atom_get_min_voltage +ffffffff81ca3170 T radeon_atom_get_voltage_step +ffffffff81ca3270 T radeon_atom_round_to_true_voltage +ffffffff81ca33d0 T radeon_atom_get_voltage_table +ffffffff81ca3640 T radeon_atom_get_memory_info +ffffffff81ca37f0 T radeon_atom_get_mclk_range_table +ffffffff81ca3a30 T radeon_atom_init_mc_reg_table +ffffffff81ca3ca0 T radeon_atom_initialize_bios_scratch_regs +ffffffff81ca3d70 T radeon_save_bios_scratch_regs +ffffffff81ca3e50 T radeon_restore_bios_scratch_regs +ffffffff81ca3f30 T radeon_atom_output_lock +ffffffff81ca3fc0 T radeon_atombios_connected_scratch_regs +ffffffff81ca4730 T radeon_atombios_encoder_crtc_scratch_regs +ffffffff81ca4880 T radeon_atombios_encoder_dpms_scratch_regs +ffffffff81ca4ab0 t radeon_atombios_parse_misc_flags_1_3 +ffffffff81ca4c90 t radeon_atombios_add_pplib_thermal_controller +ffffffff81ca5090 t radeon_atombios_parse_pplib_clock_info +ffffffff81ca5440 t radeon_atombios_parse_pplib_non_clock_info +ffffffff81ca6000 T radeon_audio_init +ffffffff81ca61f0 t radeon_audio_enable +ffffffff81ca6350 T radeon_audio_endpoint_rreg +ffffffff81ca6390 T radeon_audio_endpoint_wreg +ffffffff81ca63d0 T radeon_audio_get_pin +ffffffff81ca6420 T radeon_audio_detect +ffffffff81ca6580 T radeon_audio_fini +ffffffff81ca6610 T radeon_audio_mode_set +ffffffff81ca6660 T radeon_audio_dpms +ffffffff81ca66b0 T radeon_audio_decode_dfs_div +ffffffff81ca6710 T radeon_audio_component_init +ffffffff81ca6780 T radeon_audio_component_fini +ffffffff81ca67d0 t radeon_audio_hdmi_mode_set +ffffffff81ca6eb0 t radeon_audio_write_speaker_allocation +ffffffff81ca6f60 t radeon_audio_write_sad_regs +ffffffff81ca7030 t radeon_audio_set_avi_packet +ffffffff81ca7170 t radeon_audio_dp_mode_set +ffffffff81ca72f0 t radeon_audio_rreg +ffffffff81ca7340 t radeon_audio_wreg +ffffffff81ca8000 T radeon_benchmark +ffffffff81ca8940 t radeon_benchmark_move +ffffffff81ca8c20 t radeon_bo_reserve +ffffffff81ca8d90 t radeon_bo_unreserve +ffffffff81ca8e70 t radeon_benchmark_do_move +ffffffff81ca9000 T radeon_get_bios +ffffffff81ca9fc0 t igp_read_bios_from_vram +ffffffff81caa0d0 t radeon_read_bios +ffffffff81cab000 T radeon_legacy_get_engine_clock +ffffffff81cab0d0 T radeon_legacy_get_memory_clock +ffffffff81cab1a0 T radeon_get_clock_info +ffffffff81cab730 T radeon_legacy_set_engine_clock +ffffffff81caba80 T radeon_legacy_set_clock_gating +ffffffff81cad000 T radeon_combios_check_hardcoded_edid +ffffffff81cad100 t combios_get_table_offset +ffffffff81cad690 T radeon_bios_get_hardcoded_edid +ffffffff81cad710 T radeon_combios_i2c_init +ffffffff81caddb0 t combios_setup_i2c_bus +ffffffff81cae0a0 t radeon_combios_get_i2c_info_from_table +ffffffff81cae2f0 T radeon_combios_get_clock_info +ffffffff81cae4e0 T radeon_combios_sideport_present +ffffffff81cae560 T radeon_combios_get_primary_dac_info +ffffffff81cae6b0 T radeon_combios_get_tv_info +ffffffff81cae7b0 T radeon_combios_get_tv_dac_info +ffffffff81caea40 T radeon_combios_get_lvds_info +ffffffff81caf0b0 T radeon_legacy_get_tmds_info_from_table +ffffffff81caf180 T radeon_legacy_get_tmds_info_from_combios +ffffffff81caf390 T radeon_legacy_get_ext_tmds_info_from_table +ffffffff81caf5c0 T radeon_legacy_get_ext_tmds_info_from_combios +ffffffff81caf900 T radeon_get_legacy_connector_info_from_table +ffffffff81cb1a70 T radeon_get_legacy_connector_info_from_bios +ffffffff81cb2660 T radeon_combios_get_power_modes +ffffffff81cb2d30 T radeon_external_tmds_setup +ffffffff81cb2e00 T radeon_combios_external_tmds_setup +ffffffff81cb3380 T radeon_combios_asic_init +ffffffff81cb38d0 t combios_parse_mmio_table +ffffffff81cb3af0 t combios_parse_pll_table +ffffffff81cb3dc0 T radeon_combios_initialize_bios_scratch_regs +ffffffff81cb3e50 T radeon_combios_output_lock +ffffffff81cb3eb0 T radeon_combios_connected_scratch_regs +ffffffff81cb4210 T radeon_combios_encoder_crtc_scratch_regs +ffffffff81cb42f0 T radeon_combios_encoder_dpms_scratch_regs +ffffffff81cb5000 T radeon_connector_hotplug +ffffffff81cb5100 T radeon_get_monitor_bpc +ffffffff81cb5550 T radeon_connector_edid +ffffffff81cb5600 T radeon_connector_encoder_get_dp_bridge_encoder_id +ffffffff81cb5680 T radeon_connector_is_dp12_capable +ffffffff81cb5720 T radeon_add_atom_connector +ffffffff81cb65d0 T radeon_add_legacy_connector +ffffffff81cb6ac0 t radeon_dp_detect +ffffffff81cb6e60 t radeon_dvi_force +ffffffff81cb6eb0 t radeon_connector_set_property +ffffffff81cb76f0 t radeon_connector_unregister +ffffffff81cb7750 t radeon_connector_destroy +ffffffff81cb77c0 t radeon_best_single_encoder +ffffffff81cb7830 t radeon_connector_get_edid +ffffffff81cb7990 t radeon_dp_get_modes +ffffffff81cb7c90 t radeon_dp_mode_valid +ffffffff81cb7e60 t radeon_dvi_encoder +ffffffff81cb7f20 t radeon_fixup_lvds_native_mode +ffffffff81cb8060 t radeon_add_common_modes +ffffffff81cb8150 t radeon_fp_native_mode +ffffffff81cb8230 t radeon_lvds_set_property +ffffffff81cb8320 t radeon_vga_detect +ffffffff81cb85c0 t radeon_connector_analog_encoder_conflict_solve +ffffffff81cb87e0 t radeon_vga_get_modes +ffffffff81cb88c0 t radeon_vga_mode_valid +ffffffff81cb8920 t radeon_dvi_detect +ffffffff81cb8f80 t radeon_dvi_mode_valid +ffffffff81cb9100 t radeon_tv_detect +ffffffff81cb9340 t radeon_tv_get_modes +ffffffff81cb9420 t radeon_tv_mode_valid +ffffffff81cb9470 t radeon_lvds_detect +ffffffff81cb9610 t radeon_lvds_get_modes +ffffffff81cb9750 t radeon_lvds_mode_valid +ffffffff81cba000 T radeon_cs_parser_init +ffffffff81cba490 T radeon_cs_ioctl +ffffffff81cbac70 t radeon_cs_parser_fini +ffffffff81cbadf0 t radeon_cs_ib_vm_chunk +ffffffff81cbb130 T radeon_cs_packet_parse +ffffffff81cbb2e0 T radeon_cs_packet_next_is_pkt3_nop +ffffffff81cbb340 T radeon_cs_dump_packet +ffffffff81cbb3c0 T radeon_cs_packet_next_reloc +ffffffff81cbb5a0 t cmp_size_smaller_first +ffffffff81cbc000 T radeon_crtc_cursor_move +ffffffff81cbc070 t radeon_lock_cursor +ffffffff81cbc230 t radeon_cursor_move_locked +ffffffff81cbc770 T radeon_crtc_cursor_set2 +ffffffff81cbca00 t radeon_hide_cursor +ffffffff81cbcac0 t radeon_bo_reserve +ffffffff81cbcc30 t radeon_bo_unreserve +ffffffff81cbcd10 t radeon_show_cursor +ffffffff81cbcf60 T radeon_cursor_reset +ffffffff81cbd000 T radeon_is_px +ffffffff81cbd040 T radeon_program_register_sequence +ffffffff81cbd170 T radeon_pci_config_reset +ffffffff81cbd1a0 T radeon_surface_init +ffffffff81cbd360 T radeon_scratch_init +ffffffff81cbd3e0 T radeon_scratch_get +ffffffff81cbd460 T radeon_scratch_free +ffffffff81cbd4c0 T radeon_doorbell_get +ffffffff81cbd570 T radeon_doorbell_free +ffffffff81cbd5c0 T radeon_wb_disable +ffffffff81cbd5f0 T radeon_wb_fini +ffffffff81cbd690 t radeon_bo_reserve +ffffffff81cbd800 t radeon_bo_unreserve +ffffffff81cbd8e0 T radeon_wb_init +ffffffff81cbdbc0 T radeon_vram_location +ffffffff81cbdce0 T radeon_gtt_location +ffffffff81cbde10 T radeon_device_is_virtual +ffffffff81cbde40 T radeon_card_posted +ffffffff81cbe050 T radeon_update_bandwidth_info +ffffffff81cbe0d0 T radeon_boot_test_post_card +ffffffff81cbe190 T radeon_dummy_page_init +ffffffff81cbe250 T radeon_dummy_page_fini +ffffffff81cbe2b0 T radeon_atombios_init +ffffffff81cbe440 t cail_reg_read +ffffffff81cbe4a0 t cail_reg_write +ffffffff81cbe500 t cail_ioreg_read +ffffffff81cbe520 t cail_ioreg_write +ffffffff81cbe540 t cail_mc_read +ffffffff81cbe570 t cail_mc_write +ffffffff81cbe5a0 t cail_pll_read +ffffffff81cbe5d0 t cail_pll_write +ffffffff81cbe600 T radeon_atombios_fini +ffffffff81cbe6b0 T radeon_combios_init +ffffffff81cbe6f0 T radeon_combios_fini +ffffffff81cbe720 T radeon_device_init +ffffffff81cbf200 T radeon_device_fini +ffffffff81cbf310 T radeon_suspend_kms +ffffffff81cbf680 T radeon_resume_kms +ffffffff81cbf8c0 T radeon_gpu_reset +ffffffff81cc0000 T radeon_crtc_load_lut +ffffffff81cc0e60 T radeon_crtc_handle_vblank +ffffffff81cc0fd0 T radeon_get_crtc_scanoutpos +ffffffff81cc15a0 T radeon_crtc_handle_flip +ffffffff81cc16d0 T radeon_compute_pll_avivo +ffffffff81cc1c30 T radeon_compute_pll_legacy +ffffffff81cc2300 T radeon_framebuffer_init +ffffffff81cc2380 T radeon_update_display_priority +ffffffff81cc23e0 T radeon_modeset_init +ffffffff81cc2e90 T radeon_modeset_fini +ffffffff81cc2fe0 T radeon_crtc_scaling_mode_fixup +ffffffff81cc3360 T radeon_get_crtc_scanout_position +ffffffff81cc33d0 t radeon_user_framebuffer_create +ffffffff81cc3570 t radeon_crtc_gamma_set +ffffffff81cc35b0 t radeon_crtc_destroy +ffffffff81cc35f0 t radeon_crtc_set_config +ffffffff81cc36c0 t radeon_crtc_page_flip_target +ffffffff81cc3b60 t radeon_flip_work_func +ffffffff81cc3d80 t radeon_unpin_work_func +ffffffff81cc3e00 t radeon_bo_reserve +ffffffff81cc3f70 t radeon_bo_unreserve +ffffffff81cc5000 T radeon_dp_aux_transfer_native +ffffffff81cc6000 T radeondrm_probe +ffffffff81cc6060 T radeondrm_attach_kms +ffffffff81cc67a0 T radeondrm_detach_kms +ffffffff81cc6830 T radeondrm_activate_kms +ffffffff81cc68f0 T radeondrm_wsioctl +ffffffff81cc69b0 T radeondrm_wsmmap +ffffffff81cc69e0 T radeondrm_alloc_screen +ffffffff81cc6a10 T radeondrm_free_screen +ffffffff81cc6a20 T radeondrm_show_screen +ffffffff81cc6b10 T radeondrm_enter_ddb +ffffffff81cc6b70 T radeondrm_doswitch +ffffffff81cc6c10 T radeondrm_setpal +ffffffff81cc6e30 T radeondrm_attachhook +ffffffff81cc7160 T radeondrm_forcedetach +ffffffff81cc8000 T radeon_setup_encoder_clones +ffffffff81cc80b0 T radeon_get_encoder_enum +ffffffff81cc8230 T radeon_link_encoder_connector +ffffffff81cc8380 T radeon_encoder_set_active_device +ffffffff81cc8440 T radeon_get_connector_for_encoder +ffffffff81cc84b0 T radeon_get_connector_for_encoder_init +ffffffff81cc8520 T radeon_get_external_encoder +ffffffff81cc85b0 T radeon_encoder_get_dp_bridge_encoder_id +ffffffff81cc8650 T radeon_panel_mode_fixup +ffffffff81cc8820 T radeon_dig_monitor_is_duallink +ffffffff81cc8940 T radeon_encoder_is_digital +ffffffff81cc9000 T radeon_fbdev_setup +ffffffff81cc9150 T radeon_fbdev_set_suspend +ffffffff81cc91a0 T radeon_fbdev_robj_is_fb +ffffffff81cc9210 T radeondrm_burner +ffffffff81cc9290 T radeondrm_burner_cb +ffffffff81cc92c0 t radeon_fbdev_fb_helper_fb_probe +ffffffff81cc9800 t radeon_bo_reserve +ffffffff81cc9970 t radeon_bo_unreserve +ffffffff81cc9a50 t radeon_fbdev_client_unregister +ffffffff81cc9ab0 t radeon_fbdev_client_restore +ffffffff81cc9af0 t radeon_fbdev_client_hotplug +ffffffff81cca000 T radeon_fence_emit +ffffffff81cca120 T radeon_fence_process +ffffffff81cca1e0 t radeon_fence_activity +ffffffff81cca450 T radeon_fence_signaled +ffffffff81cca4c0 t radeon_fence_seq_signaled +ffffffff81cca5b0 T radeon_fence_wait_timeout +ffffffff81cca6e0 t radeon_fence_wait_seq_timeout +ffffffff81ccab50 T radeon_fence_wait +ffffffff81ccac80 T radeon_fence_wait_any +ffffffff81ccadc0 T radeon_fence_wait_next +ffffffff81ccae80 T radeon_fence_wait_empty +ffffffff81ccaf90 T radeon_fence_ref +ffffffff81ccafd0 T radeon_fence_unref +ffffffff81ccb010 T radeon_fence_count_emitted +ffffffff81ccb110 T radeon_fence_need_sync +ffffffff81ccb170 T radeon_fence_note_sync +ffffffff81ccb340 T radeon_fence_driver_start_ring +ffffffff81ccb520 T radeon_fence_driver_init +ffffffff81ccb660 T radeon_debugfs_fence_init +ffffffff81ccb690 T radeon_fence_driver_fini +ffffffff81ccb8b0 T radeon_fence_driver_force_completion +ffffffff81ccb9a0 t radeon_fence_get_driver_name +ffffffff81ccb9d0 t radeon_fence_get_timeline_name +ffffffff81ccba70 t radeon_fence_enable_signaling +ffffffff81ccbc80 t radeon_fence_is_signaled +ffffffff81ccbdc0 t radeon_fence_default_wait +ffffffff81ccbf20 t radeon_fence_any_seq_signaled +ffffffff81ccc060 t radeon_fence_check_lockup +ffffffff81ccc2b0 t __delayed_work_tick +ffffffff81ccc2d0 t radeon_fence_check_signaled +ffffffff81ccc370 t radeon_fence_wait_cb +ffffffff81ccd000 T radeon_gart_table_ram_alloc +ffffffff81ccd0c0 T radeon_gart_table_ram_free +ffffffff81ccd130 T radeon_gart_table_vram_alloc +ffffffff81ccd1b0 T radeon_gart_table_vram_pin +ffffffff81ccd2f0 t radeon_bo_reserve +ffffffff81ccd460 t radeon_bo_unreserve +ffffffff81ccd540 T radeon_gart_table_vram_unpin +ffffffff81ccd5c0 T radeon_gart_table_vram_free +ffffffff81ccd600 T radeon_gart_unbind +ffffffff81ccd720 T radeon_gart_bind +ffffffff81ccd870 T radeon_gart_init +ffffffff81ccd980 T radeon_gart_fini +ffffffff81cce000 T radeon_gem_fault +ffffffff81cce180 T radeon_gem_vm_reference +ffffffff81cce1b0 T radeon_gem_vm_detach +ffffffff81cce1c0 T radeon_gem_object_create +ffffffff81cce3a0 T radeon_gem_init +ffffffff81cce3e0 T radeon_gem_fini +ffffffff81cce3f0 t radeon_gem_object_free +ffffffff81cce440 t radeon_gem_object_open +ffffffff81cce4e0 t radeon_gem_object_close +ffffffff81cce5d0 t radeon_gem_object_mmap +ffffffff81cce670 T radeon_gem_info_ioctl +ffffffff81cce6e0 T radeon_gem_create_ioctl +ffffffff81cce800 T radeon_gem_userptr_ioctl +ffffffff81cce830 T radeon_gem_set_domain_ioctl +ffffffff81cce990 T radeon_mode_dumb_mmap +ffffffff81ccea40 T radeon_gem_mmap_ioctl +ffffffff81cceb00 T radeon_gem_busy_ioctl +ffffffff81ccebb0 T radeon_gem_wait_idle_ioctl +ffffffff81ccecc0 T radeon_gem_set_tiling_ioctl +ffffffff81cced70 T radeon_gem_get_tiling_ioctl +ffffffff81ccee40 t radeon_bo_reserve +ffffffff81ccf040 t radeon_bo_unreserve +ffffffff81ccf120 T radeon_gem_va_ioctl +ffffffff81ccf3d0 t radeon_gem_va_update_vm +ffffffff81ccf520 T radeon_gem_op_ioctl +ffffffff81ccf620 T radeon_align_pitch +ffffffff81ccf6b0 T radeon_mode_dumb_create +ffffffff81ccf800 T radeon_gem_debugfs_init +ffffffff81cd0000 T radeon_ddc_probe +ffffffff81cd00c0 T radeon_router_select_ddc_port +ffffffff81cd0320 T radeon_bb_set_bits +ffffffff81cd0490 T radeon_bb_set_dir +ffffffff81cd04c0 T radeon_bb_read_bits +ffffffff81cd05a0 T radeon_acquire_bus +ffffffff81cd09f0 T radeon_release_bus +ffffffff81cd0b60 T radeon_send_start +ffffffff81cd0b80 T radeon_send_stop +ffffffff81cd0ba0 T radeon_initiate_xfer +ffffffff81cd0bc0 T radeon_read_byte +ffffffff81cd0be0 T radeon_write_byte +ffffffff81cd0c00 T radeon_i2c_create +ffffffff81cd0e10 T radeon_i2c_destroy +ffffffff81cd0e90 T radeon_i2c_init +ffffffff81cd0ee0 T radeon_i2c_fini +ffffffff81cd0f90 T radeon_i2c_add +ffffffff81cd1140 T radeon_i2c_lookup +ffffffff81cd1310 T radeon_i2c_get_byte +ffffffff81cd13e0 T radeon_i2c_put_byte +ffffffff81cd1470 T radeon_router_select_cd_port +ffffffff81cd16d0 t radeon_hw_i2c_xfer +ffffffff81cd2270 t radeon_hw_i2c_func +ffffffff81cd22a0 t r100_hw_i2c_xfer +ffffffff81cd2960 t radeon_get_i2c_prescale +ffffffff81cd3000 T radeon_ib_get +ffffffff81cd3100 T radeon_ib_free +ffffffff81cd3140 T radeon_ib_schedule +ffffffff81cd33d0 T radeon_ib_pool_init +ffffffff81cd3470 T radeon_ib_pool_fini +ffffffff81cd34e0 T radeon_ib_ring_tests +ffffffff81cd4000 T radeon_driver_irq_handler_kms +ffffffff81cd4050 T radeon_msi_ok +ffffffff81cd4150 T radeon_irq_kms_init +ffffffff81cd43e0 t radeon_hotplug_work_func +ffffffff81cd4490 t radeon_dp_work_func +ffffffff81cd4500 T radeon_irq_kms_fini +ffffffff81cd46a0 T radeon_irq_kms_sw_irq_get +ffffffff81cd4740 T radeon_irq_kms_sw_irq_get_delayed +ffffffff81cd4780 T radeon_irq_kms_sw_irq_put +ffffffff81cd4810 T radeon_irq_kms_pflip_irq_get +ffffffff81cd48c0 T radeon_irq_kms_pflip_irq_put +ffffffff81cd4960 T radeon_irq_kms_enable_afmt +ffffffff81cd49f0 T radeon_irq_kms_disable_afmt +ffffffff81cd4a80 T radeon_irq_kms_enable_hpd +ffffffff81cd4b70 T radeon_irq_kms_disable_hpd +ffffffff81cd4c50 T radeon_irq_kms_set_irq_n_enabled +ffffffff81cd4dc0 t __delayed_work_tick +ffffffff81cd5000 T radeon_info_ioctl +ffffffff81cd5af0 t radeon_set_filp_rights +ffffffff81cd5b80 T radeon_driver_open_kms +ffffffff81cd5cb0 t radeon_bo_reserve +ffffffff81cd5e20 T radeon_driver_postclose_kms +ffffffff81cd6040 T radeon_get_vblank_counter_kms +ffffffff81cd61f0 T radeon_enable_vblank_kms +ffffffff81cd62a0 T radeon_disable_vblank_kms +ffffffff81cd7000 T radeon_crtc_set_base +ffffffff81cd7020 T radeon_crtc_do_set_base +ffffffff81cd7590 T radeon_crtc_set_base_atomic +ffffffff81cd75b0 t radeon_bo_reserve +ffffffff81cd7720 t radeon_bo_unreserve +ffffffff81cd7800 T radeon_legacy_init_crtc +ffffffff81cd7850 t radeon_crtc_dpms +ffffffff81cd7a40 t radeon_crtc_prepare +ffffffff81cd7ac0 t radeon_crtc_commit +ffffffff81cd7b30 t radeon_crtc_mode_fixup +ffffffff81cd7b50 t radeon_crtc_mode_set +ffffffff81cd8fc0 t radeon_crtc_disable +ffffffff81cda000 T radeon_legacy_get_backlight_level +ffffffff81cda050 T radeon_legacy_set_backlight_level +ffffffff81cda0a0 t radeon_legacy_lvds_update +ffffffff81cda3e0 T radeon_legacy_backlight_init +ffffffff81cda5b0 t radeon_legacy_backlight_get_brightness +ffffffff81cda610 T radeon_add_legacy_encoder +ffffffff81cda970 t radeon_legacy_backlight_update_status +ffffffff81cdaa10 t radeon_lvds_enc_destroy +ffffffff81cdaaa0 t radeon_legacy_lvds_dpms +ffffffff81cdaaf0 t radeon_legacy_mode_fixup +ffffffff81cdab60 t radeon_legacy_lvds_prepare +ffffffff81cdabf0 t radeon_legacy_lvds_commit +ffffffff81cdac70 t radeon_legacy_lvds_mode_set +ffffffff81cdae80 t radeon_legacy_encoder_disable +ffffffff81cdaed0 t radeon_legacy_tmds_int_dpms +ffffffff81cdaf90 t radeon_legacy_tmds_int_prepare +ffffffff81cdb060 t radeon_legacy_tmds_int_commit +ffffffff81cdb130 t radeon_legacy_tmds_int_mode_set +ffffffff81cdb390 t radeon_legacy_primary_dac_dpms +ffffffff81cdb4d0 t radeon_legacy_primary_dac_prepare +ffffffff81cdb530 t radeon_legacy_primary_dac_commit +ffffffff81cdb580 t radeon_legacy_primary_dac_mode_set +ffffffff81cdb710 t radeon_legacy_primary_dac_detect +ffffffff81cdb900 t radeon_legacy_tv_dac_dpms +ffffffff81cdbb10 t radeon_legacy_tv_dac_prepare +ffffffff81cdbb70 t radeon_legacy_tv_dac_commit +ffffffff81cdbbc0 t radeon_legacy_tv_dac_mode_set +ffffffff81cdbf60 t radeon_legacy_tv_dac_detect +ffffffff81cdcb60 t radeon_ext_tmds_enc_destroy +ffffffff81cdcbb0 t radeon_legacy_tmds_ext_dpms +ffffffff81cdcc80 t radeon_legacy_tmds_ext_prepare +ffffffff81cdcd50 t radeon_legacy_tmds_ext_commit +ffffffff81cdce20 t radeon_legacy_tmds_ext_mode_set +ffffffff81cdd000 T radeon_legacy_tv_mode_set +ffffffff81cde0f0 T radeon_legacy_tv_adjust_crtc_reg +ffffffff81cde200 T radeon_legacy_tv_adjust_pll1 +ffffffff81cde300 T radeon_legacy_tv_adjust_pll2 +ffffffff81cdf000 T radeon_ttm_bo_is_radeon_bo +ffffffff81cdf040 t radeon_ttm_bo_destroy +ffffffff81cdf170 T radeon_ttm_placement_from_domain +ffffffff81cdf2d0 T radeon_bo_create +ffffffff81cdf4a0 T radeon_bo_kmap +ffffffff81cdf590 T radeon_bo_check_tiling +ffffffff81cdf670 T radeon_bo_kunmap +ffffffff81cdf700 T radeon_bo_ref +ffffffff81cdf740 T radeon_bo_unref +ffffffff81cdf790 T radeon_bo_pin_restricted +ffffffff81cdfab0 T radeon_bo_pin +ffffffff81cdfad0 T radeon_bo_unpin +ffffffff81cdfb40 T radeon_bo_evict_vram +ffffffff81cdfba0 T radeon_bo_force_delete +ffffffff81cdfd00 T radeon_bo_init +ffffffff81cdfde0 T radeon_bo_fini +ffffffff81cdfe20 T radeon_bo_list_validate +ffffffff81ce0130 T radeon_bo_get_surface_reg +ffffffff81ce03b0 T radeon_bo_set_tiling_flags +ffffffff81ce06b0 T radeon_bo_get_tiling_flags +ffffffff81ce0700 T radeon_bo_move_notify +ffffffff81ce07d0 T radeon_bo_fault_reserve_notify +ffffffff81ce0a60 t ttm_bo_move_to_lru_tail_unlocked +ffffffff81ce0aa0 T radeon_bo_fence +ffffffff81ce1000 T radeon_pm_get_type_index +ffffffff81ce1080 T radeon_pm_acpi_event_handler +ffffffff81ce1160 t radeon_pm_update_profile +ffffffff81ce1280 t radeon_pm_set_clocks +ffffffff81ce1c40 T radeon_dpm_enable_uvd +ffffffff81ce1d00 T radeon_pm_compute_clocks +ffffffff81ce2710 T radeon_dpm_enable_vce +ffffffff81ce2780 T radeon_pm_suspend +ffffffff81ce2880 T radeon_pm_resume +ffffffff81ce2b70 T radeon_pm_init +ffffffff81ce3280 T radeon_pm_late_init +ffffffff81ce3340 T radeon_pm_fini +ffffffff81ce3460 t radeon_dpm_thermal_work_handler +ffffffff81ce3540 t radeon_dynpm_idle_work_handler +ffffffff81ce37c0 t __delayed_work_tick +ffffffff81ce4000 T radeon_gem_prime_get_sg_table +ffffffff81ce4030 T radeon_gem_prime_pin +ffffffff81ce40c0 t radeon_bo_reserve +ffffffff81ce4230 t radeon_bo_unreserve +ffffffff81ce4310 T radeon_gem_prime_unpin +ffffffff81ce4390 T radeon_gem_prime_export +ffffffff81ce5000 T radeon_ring_supports_scratch_reg +ffffffff81ce5030 T radeon_ring_free_size +ffffffff81ce50e0 T radeon_ring_lockup_update +ffffffff81ce5140 T radeon_ring_alloc +ffffffff81ce52c0 T radeon_ring_lock +ffffffff81ce5340 T radeon_ring_commit +ffffffff81ce5440 T radeon_ring_unlock_commit +ffffffff81ce5470 T radeon_ring_undo +ffffffff81ce54a0 T radeon_ring_unlock_undo +ffffffff81ce54c0 T radeon_ring_test_lockup +ffffffff81ce55e0 T radeon_ring_backup +ffffffff81ce5780 T radeon_ring_restore +ffffffff81ce5930 T radeon_ring_init +ffffffff81ce5b20 t radeon_bo_reserve +ffffffff81ce5c90 t radeon_bo_unreserve +ffffffff81ce5d70 T radeon_ring_fini +ffffffff81ce6000 T radeon_sa_bo_manager_init +ffffffff81ce60d0 T radeon_sa_bo_manager_fini +ffffffff81ce6100 T radeon_sa_bo_manager_start +ffffffff81ce6240 t radeon_bo_reserve +ffffffff81ce63b0 t radeon_bo_unreserve +ffffffff81ce6490 T radeon_sa_bo_manager_suspend +ffffffff81ce6540 T radeon_sa_bo_new +ffffffff81ce65b0 T radeon_sa_bo_free +ffffffff81ce7000 T radeon_semaphore_create +ffffffff81ce70e0 T radeon_semaphore_emit_signal +ffffffff81ce7170 T radeon_semaphore_emit_wait +ffffffff81ce7200 T radeon_semaphore_free +ffffffff81ce8000 T radeon_sync_create +ffffffff81ce8090 T radeon_sync_fence +ffffffff81ce8140 T radeon_sync_resv +ffffffff81ce8280 T radeon_sync_rings +ffffffff81ce8440 T radeon_sync_free +ffffffff81ce9000 T radeon_test_moves +ffffffff81ce9070 t radeon_do_test_moves +ffffffff81ce9680 T radeon_test_ring_sync +ffffffff81ce9950 t radeon_test_create_and_emit_fence +ffffffff81ce9ac0 T radeon_test_syncing +ffffffff81ce9d90 t radeon_test_ring_sync2 +ffffffff81cea100 t radeon_bo_reserve +ffffffff81cea270 t radeon_bo_unreserve +ffffffff81ceb000 T radeon_get_rdev +ffffffff81ceb030 T radeon_ttm_tt_set_userptr +ffffffff81ceb080 T radeon_ttm_tt_is_bound +ffffffff81ceb0d0 T radeon_ttm_tt_has_userptr +ffffffff81ceb120 T radeon_ttm_tt_is_readonly +ffffffff81ceb170 T radeon_ttm_init +ffffffff81ceb390 T radeon_ttm_set_active_vram_size +ffffffff81ceb3d0 t radeon_bo_reserve +ffffffff81ceb540 t radeon_bo_unreserve +ffffffff81ceb620 T radeon_ttm_fini +ffffffff81ceb6f0 t radeon_ttm_tt_create +ffffffff81ceb7d0 t radeon_ttm_tt_populate +ffffffff81ceb880 t radeon_ttm_tt_unpopulate +ffffffff81ceb970 t radeon_ttm_tt_destroy +ffffffff81ceb9c0 t radeon_evict_flags +ffffffff81cebb20 t radeon_bo_move +ffffffff81cebf20 t radeon_ttm_io_mem_reserve +ffffffff81cec000 T radeon_ucode_print_mc_hdr +ffffffff81cec0b0 t radeon_ucode_print_common_hdr +ffffffff81cec1e0 T radeon_ucode_print_smc_hdr +ffffffff81cec270 T radeon_ucode_print_gfx_hdr +ffffffff81cec340 T radeon_ucode_print_rlc_hdr +ffffffff81cec440 T radeon_ucode_print_sdma_hdr +ffffffff81cec520 T radeon_ucode_validate +ffffffff81ced000 T radeon_uvd_init +ffffffff81ced4f0 t radeon_uvd_idle_work_handler +ffffffff81ced660 t radeon_bo_reserve +ffffffff81ced860 t radeon_bo_unreserve +ffffffff81ced940 T radeon_uvd_fini +ffffffff81ceda10 T radeon_uvd_suspend +ffffffff81cedbd0 T radeon_uvd_note_usage +ffffffff81cede10 T radeon_uvd_get_destroy_msg +ffffffff81cedf20 T radeon_uvd_resume +ffffffff81cedfb0 T radeon_uvd_force_into_uvd_segment +ffffffff81cee050 T radeon_uvd_free_handles +ffffffff81cee210 T radeon_uvd_cs_parse +ffffffff81cee930 T radeon_uvd_get_create_msg +ffffffff81ceeab0 t radeon_uvd_send_msg +ffffffff81ceec50 T radeon_uvd_calc_upll_dividers +ffffffff81ceee20 T radeon_uvd_send_upll_ctlreq +ffffffff81cef160 t __delayed_work_tick +ffffffff81cf0000 T radeon_vce_init +ffffffff81cf0620 t radeon_vce_idle_work_handler +ffffffff81cf06e0 t radeon_bo_reserve +ffffffff81cf0850 t radeon_bo_unreserve +ffffffff81cf0930 T radeon_vce_fini +ffffffff81cf09b0 T radeon_vce_suspend +ffffffff81cf0a90 T radeon_vce_resume +ffffffff81cf0be0 T radeon_vce_note_usage +ffffffff81cf0d00 T radeon_vce_free_handles +ffffffff81cf0dc0 T radeon_vce_get_destroy_msg +ffffffff81cf0ff0 T radeon_vce_get_create_msg +ffffffff81cf1340 T radeon_vce_cs_reloc +ffffffff81cf1440 T radeon_vce_cs_parse +ffffffff81cf1bb0 T radeon_vce_semaphore_emit +ffffffff81cf1d70 T radeon_vce_ib_execute +ffffffff81cf1f00 T radeon_vce_fence_emit +ffffffff81cf2130 T radeon_vce_ring_test +ffffffff81cf2280 T radeon_vce_ib_test +ffffffff81cf23a0 t __delayed_work_tick +ffffffff81cf3000 T radeon_vm_manager_init +ffffffff81cf3060 T radeon_vm_manager_fini +ffffffff81cf3180 T radeon_vm_get_bos +ffffffff81cf32d0 T radeon_vm_grab_id +ffffffff81cf3460 T radeon_vm_flush +ffffffff81cf35f0 T radeon_vm_fence +ffffffff81cf36a0 T radeon_vm_bo_find +ffffffff81cf36f0 T radeon_vm_bo_add +ffffffff81cf37e0 T radeon_vm_bo_set_addr +ffffffff81cf3c30 t radeon_bo_unreserve +ffffffff81cf3d10 t radeon_vm_clear_bo +ffffffff81cf3f00 T radeon_vm_map_gart +ffffffff81cf3f40 T radeon_vm_update_page_directory +ffffffff81cf42c0 T radeon_vm_bo_update +ffffffff81cf4900 t radeon_vm_fence_pts +ffffffff81cf4990 T radeon_vm_clear_freed +ffffffff81cf4a70 T radeon_vm_clear_invalids +ffffffff81cf4b10 T radeon_vm_bo_rmv +ffffffff81cf4c00 T radeon_vm_bo_invalidate +ffffffff81cf4cb0 T radeon_vm_init +ffffffff81cf4f10 T radeon_vm_fini +ffffffff81cf51f0 t radeon_bo_reserve +ffffffff81cf5360 t radeon_vm_frag_ptes +ffffffff81cf6000 T rs400_gart_adjust_size +ffffffff81cf60c0 T rs400_gart_tlb_flush +ffffffff81cf6140 T rs400_gart_init +ffffffff81cf6240 T rs400_gart_enable +ffffffff81cf65a0 T rs400_gart_disable +ffffffff81cf6600 T rs400_gart_fini +ffffffff81cf6670 T rs400_gart_get_page_entry +ffffffff81cf66d0 T rs400_gart_set_page +ffffffff81cf6710 T rs400_mc_wait_for_idle +ffffffff81cf67b0 T rs400_mc_rreg +ffffffff81cf6840 T rs400_mc_wreg +ffffffff81cf68c0 T rs400_resume +ffffffff81cf69f0 t rs400_mc_program +ffffffff81cf6ae0 t rs400_startup +ffffffff81cf6cd0 T rs400_suspend +ffffffff81cf6d70 T rs400_fini +ffffffff81cf6e60 T rs400_init +ffffffff81cf8000 T avivo_wait_for_vblank +ffffffff81cf8280 T rs600_page_flip +ffffffff81cf8550 T rs600_page_flip_pending +ffffffff81cf85c0 T avivo_program_fmt +ffffffff81cf86e0 T rs600_pm_misc +ffffffff81cf8a20 T rs600_pm_prepare +ffffffff81cf8b20 T rs600_pm_finish +ffffffff81cf8c20 T rs600_hpd_sense +ffffffff81cf8c80 T rs600_hpd_set_polarity +ffffffff81cf8d40 T rs600_hpd_init +ffffffff81cf8e20 T rs600_hpd_fini +ffffffff81cf8ed0 T rs600_asic_reset +ffffffff81cf9140 T rs600_gart_tlb_flush +ffffffff81cf9200 T rs600_gart_get_page_entry +ffffffff81cf9260 T rs600_gart_set_page +ffffffff81cf92a0 T rs600_irq_set +ffffffff81cf9480 T rs600_irq_disable +ffffffff81cf9500 t rs600_irq_ack +ffffffff81cf96b0 T rs600_irq_process +ffffffff81cf9a10 T rs600_get_vblank_counter +ffffffff81cf9a60 T rs600_mc_wait_for_idle +ffffffff81cf9b00 T rs600_bandwidth_update +ffffffff81cf9bf0 T rs600_mc_rreg +ffffffff81cf9c70 T rs600_mc_wreg +ffffffff81cf9ce0 T rs600_set_safe_registers +ffffffff81cf9d20 T rs600_resume +ffffffff81cf9e50 t rs600_startup +ffffffff81cfa670 T rs600_suspend +ffffffff81cfa770 T rs600_fini +ffffffff81cfa870 t rs600_gart_fini +ffffffff81cfa8e0 T rs600_init +ffffffff81cfb000 T rs690_mc_wait_for_idle +ffffffff81cfb0a0 T rs690_pm_info +ffffffff81cfb310 T rs690_line_buffer_adjust +ffffffff81cfb430 T rs690_bandwidth_update +ffffffff81cfb780 t rs690_crtc_bandwidth_compute +ffffffff81cfbb70 t rs690_compute_mode_priority +ffffffff81cfbff0 T rs690_mc_rreg +ffffffff81cfc080 T rs690_mc_wreg +ffffffff81cfc100 T rs690_resume +ffffffff81cfc1f0 t rs690_startup +ffffffff81cfc4d0 T rs690_suspend +ffffffff81cfc530 T rs690_fini +ffffffff81cfc5e0 T rs690_init +ffffffff81cfd000 T rs780_dpm_enable +ffffffff81cfdbf0 T rs780_dpm_disable +ffffffff81cfdcd0 T rs780_dpm_set_power_state +ffffffff81cfe0b0 t rs780_force_voltage +ffffffff81cfe1f0 t rs780_enable_voltage_scaling +ffffffff81cfe3b0 T rs780_dpm_setup_asic +ffffffff81cfe3e0 T rs780_dpm_display_configuration_changed +ffffffff81cfe530 T rs780_dpm_init +ffffffff81cfeaa0 T rs780_dpm_print_power_state +ffffffff81cfeb30 T rs780_dpm_fini +ffffffff81cfebc0 T rs780_dpm_get_sclk +ffffffff81cfec00 T rs780_dpm_get_mclk +ffffffff81cfec30 T rs780_dpm_debugfs_print_current_performance_level +ffffffff81cfec60 T rs780_dpm_get_current_sclk +ffffffff81cfecf0 T rs780_dpm_get_current_mclk +ffffffff81cfed20 T rs780_dpm_force_performance_level +ffffffff81cfef10 t rs780_force_fbdiv +ffffffff81d00000 T rv515_ring_start +ffffffff81d00af0 T rv515_mc_wait_for_idle +ffffffff81d00b90 T rv515_vga_render_disable +ffffffff81d00be0 T rv515_mc_rreg +ffffffff81d00c70 T rv515_mc_wreg +ffffffff81d00cf0 T rv515_debugfs +ffffffff81d00d00 T rv515_mc_stop +ffffffff81d01270 T rv515_mc_resume +ffffffff81d01850 T rv515_clock_startup +ffffffff81d01910 T rv515_resume +ffffffff81d01b50 t rv515_startup +ffffffff81d02020 T rv515_suspend +ffffffff81d02090 T rv515_set_safe_registers +ffffffff81d020d0 T rv515_fini +ffffffff81d02180 T rv515_init +ffffffff81d02460 T atom_rv515_force_tv_scaler +ffffffff81d05b00 T rv515_bandwidth_avivo_update +ffffffff81d05ca0 t rv515_crtc_bandwidth_compute +ffffffff81d05fb0 t rv515_compute_mode_priority +ffffffff81d06480 T rv515_bandwidth_update +ffffffff81d07000 T rv6xx_dpm_enable +ffffffff81d07800 t rv6xx_calculate_stepping_parameters +ffffffff81d079e0 t rv6xx_program_stepping_parameters_except_lowest_entry +ffffffff81d07fb0 t rv6xx_program_stepping_parameters_lowest_entry +ffffffff81d08080 t rv6xx_enable_dynamic_pcie_gen2 +ffffffff81d08240 T rv6xx_dpm_disable +ffffffff81d084b0 T rv6xx_dpm_set_power_state +ffffffff81d08ea0 T rv6xx_setup_asic +ffffffff81d08fe0 T rv6xx_dpm_display_configuration_changed +ffffffff81d09060 T rv6xx_dpm_init +ffffffff81d095a0 T rv6xx_dpm_print_power_state +ffffffff81d09660 T rv6xx_dpm_debugfs_print_current_performance_level +ffffffff81d09690 T rv6xx_dpm_get_current_sclk +ffffffff81d09700 T rv6xx_dpm_get_current_mclk +ffffffff81d09770 T rv6xx_dpm_fini +ffffffff81d09800 T rv6xx_dpm_get_sclk +ffffffff81d09840 T rv6xx_dpm_get_mclk +ffffffff81d09880 T rv6xx_dpm_force_performance_level +ffffffff81d09a10 t rv6xx_generate_steps +ffffffff81d09d10 t rv6xx_output_stepping +ffffffff81d09e20 t rv6xx_program_mclk_stepping_entry +ffffffff81d0a090 t rv6xx_program_engine_spread_spectrum +ffffffff81d0a380 t rv6xx_step_sw_voltage +ffffffff81d0b000 T rv730_populate_sclk_value +ffffffff81d0b230 T rv730_populate_mclk_value +ffffffff81d0b470 T rv730_read_clock_registers +ffffffff81d0b590 T rv730_populate_smc_acpi_state +ffffffff81d0b740 T rv730_populate_smc_initial_state +ffffffff81d0b900 T rv730_program_memory_timing_parameters +ffffffff81d0bae0 T rv730_start_dpm +ffffffff81d0bb70 T rv730_stop_dpm +ffffffff81d0bc30 T rv730_program_dcodt +ffffffff81d0bd00 T rv730_get_odt_values +ffffffff81d0c000 T rv740_get_decoded_reference_divider +ffffffff81d0c0a0 T rv740_get_dll_speed +ffffffff81d0c2b0 T rv740_populate_sclk_value +ffffffff81d0c4b0 T rv740_populate_mclk_value +ffffffff81d0c860 T rv740_read_clock_registers +ffffffff81d0c990 T rv740_populate_smc_acpi_state +ffffffff81d0cbc0 T rv740_enable_mclk_spread_spectrum +ffffffff81d0cc10 T rv740_get_mclk_frequency_ratio +ffffffff81d0d000 T rv770_set_uvd_clocks +ffffffff81d0d570 T rv770_get_xclk +ffffffff81d0d5d0 T rv770_page_flip +ffffffff81d0d8d0 T rv770_page_flip_pending +ffffffff81d0d940 T rv770_get_temp +ffffffff81d0d9a0 T rv770_pm_misc +ffffffff81d0da80 T r700_cp_stop +ffffffff81d0db00 T r700_cp_fini +ffffffff81d0db90 T rv770_set_clk_bypass_mode +ffffffff81d0dcb0 T r700_vram_gtt_location +ffffffff81d0de40 T rv770_resume +ffffffff81d0ded0 t rv770_init_golden_registers +ffffffff81d0e060 t rv770_startup +ffffffff81d0fc00 T rv770_suspend +ffffffff81d0fe20 T rv770_init +ffffffff81d10210 t rv770_pcie_gart_fini +ffffffff81d10390 T rv770_fini +ffffffff81d10630 t rv770_uvd_start +ffffffff81d106e0 t rv770_cp_load_microcode +ffffffff81d109b0 t rv770_uvd_resume +ffffffff81d11000 T rv770_copy_dma +ffffffff81d12000 T rv770_get_ps +ffffffff81d12030 T rv770_get_pi +ffffffff81d12060 T evergreen_get_pi +ffffffff81d12090 T rv770_restore_cgcg +ffffffff81d12110 T rv770_stop_dpm +ffffffff81d121d0 T rv770_dpm_enabled +ffffffff81d12210 T rv770_enable_thermal_protection +ffffffff81d12270 T rv770_enable_acpi_pm +ffffffff81d122c0 T rv770_get_seq_value +ffffffff81d12300 T rv770_write_smc_soft_register +ffffffff81d12330 T rv770_populate_smc_t +ffffffff81d124e0 T rv770_populate_smc_sp +ffffffff81d12540 T rv770_map_clkf_to_ibias +ffffffff81d125a0 T rv770_populate_vddc_value +ffffffff81d12650 T rv770_populate_mvdd_value +ffffffff81d126a0 T rv770_calculate_memory_refresh_rate +ffffffff81d12720 T rv770_enable_backbias +ffffffff81d12780 T rv770_setup_bsp +ffffffff81d12870 T rv770_program_git +ffffffff81d128c0 T rv770_program_tp +ffffffff81d12940 T rv770_program_tpp +ffffffff81d12980 T rv770_program_sstp +ffffffff81d129c0 T rv770_program_engine_speed_parameters +ffffffff81d12a10 T rv770_program_vc +ffffffff81d12a60 T rv770_clear_vc +ffffffff81d12aa0 T rv770_upload_firmware +ffffffff81d12ae0 T rv770_populate_initial_mvdd_value +ffffffff81d12b30 T rv770_get_memory_module_index +ffffffff81d12b70 T rv770_enable_voltage_control +ffffffff81d12bc0 T rv770_halt_smc +ffffffff81d12c20 T rv770_resume_smc +ffffffff81d12c70 T rv770_set_sw_state +ffffffff81d12cd0 T rv770_set_boot_state +ffffffff81d12d20 T rv770_set_uvd_clock_before_set_eng_clock +ffffffff81d12d90 T rv770_set_uvd_clock_after_set_eng_clock +ffffffff81d12e00 T rv770_restrict_performance_levels_before_switch +ffffffff81d12e60 T rv770_dpm_force_performance_level +ffffffff81d12f20 T r7xx_start_smc +ffffffff81d12f50 T r7xx_stop_smc +ffffffff81d12f80 T rv770_read_voltage_smio_registers +ffffffff81d12fc0 T rv770_reset_smio_status +ffffffff81d13080 T rv770_get_memory_type +ffffffff81d130d0 T rv770_get_pcie_gen2_status +ffffffff81d13140 T rv770_get_max_vddc +ffffffff81d131a0 T rv770_program_response_times +ffffffff81d132f0 T rv770_enable_auto_throttle_source +ffffffff81d13470 T rv770_dpm_enable +ffffffff81d144f0 T rv770_dpm_late_enable +ffffffff81d14620 T rv770_dpm_disable +ffffffff81d14990 T rv770_dpm_set_power_state +ffffffff81d15080 t rv770_program_dcodt_after_state_switch +ffffffff81d15100 T rv770_dpm_setup_asic +ffffffff81d15470 T rv770_dpm_display_configuration_changed +ffffffff81d154f0 T rv7xx_parse_power_table +ffffffff81d15a70 T rv770_get_engine_memory_ss +ffffffff81d15b00 T rv770_dpm_init +ffffffff81d15d40 T rv770_dpm_print_power_state +ffffffff81d15e60 T rv770_dpm_debugfs_print_current_performance_level +ffffffff81d15e90 T rv770_dpm_get_current_sclk +ffffffff81d15f00 T rv770_dpm_get_current_mclk +ffffffff81d15f70 T rv770_dpm_fini +ffffffff81d16000 T rv770_dpm_get_sclk +ffffffff81d16050 T rv770_dpm_get_mclk +ffffffff81d160a0 T rv770_dpm_vblank_too_short +ffffffff81d16110 t rv770_convert_power_level_to_smc +ffffffff81d17000 T rv770_copy_bytes_to_smc +ffffffff81d17210 T rv770_start_smc +ffffffff81d17260 T rv770_reset_smc +ffffffff81d172b0 T rv770_stop_smc_clock +ffffffff81d17300 T rv770_start_smc_clock +ffffffff81d17350 T rv770_is_smc_running +ffffffff81d17390 T rv770_send_msg_to_smc +ffffffff81d17470 T rv770_wait_for_smc_inactive +ffffffff81d17510 T rv770_load_smc_ucode +ffffffff81d176a0 T rv770_read_smc_sram_dword +ffffffff81d17760 T rv770_write_smc_sram_dword +ffffffff81d18000 T si_get_allowed_info_register +ffffffff81d18090 T si_get_xclk +ffffffff81d18100 T si_get_temp +ffffffff81d18150 T si_mc_load_microcode +ffffffff81d18410 T dce6_bandwidth_update +ffffffff81d185d0 t dce6_line_buffer_adjust +ffffffff81d18780 t dce6_program_watermarks +ffffffff81d19230 T si_fence_ring_emit +ffffffff81d19690 T si_ring_ib_execute +ffffffff81d19e00 T si_gpu_check_soft_reset +ffffffff81d19fa0 T si_asic_reset +ffffffff81d1a320 t si_gpu_pci_config_reset +ffffffff81d1a640 T si_gfx_is_lockup +ffffffff81d1a6b0 T si_vram_gtt_location +ffffffff81d1a750 T si_pcie_gart_tlb_flush +ffffffff81d1a7a0 T si_ib_parse +ffffffff81d1ae40 T si_vm_init +ffffffff81d1ae80 T si_vm_fini +ffffffff81d1aeb0 T si_vm_flush +ffffffff81d1b550 T si_init_uvd_internal_cg +ffffffff81d1b5a0 T si_get_csb_size +ffffffff81d1b630 T si_get_csb_buffer +ffffffff81d1b7b0 T si_rlc_reset +ffffffff81d1b830 T si_irq_set +ffffffff81d1bd20 t si_disable_interrupt_state +ffffffff81d1bfa0 T si_irq_process +ffffffff81d1d2a0 t si_irq_ack +ffffffff81d1d890 T si_resume +ffffffff81d1d920 t si_init_golden_registers +ffffffff81d1dae0 t si_startup +ffffffff81d1ff00 T si_suspend +ffffffff81d201f0 t si_fini_cg +ffffffff81d20290 T si_init +ffffffff81d215f0 t si_cp_fini +ffffffff81d216e0 t si_irq_fini +ffffffff81d217b0 t si_pcie_gart_fini +ffffffff81d218b0 T si_fini +ffffffff81d21ad0 T si_get_gpu_clock_counter +ffffffff81d21b90 T si_set_uvd_clocks +ffffffff81d220f0 T si_set_vce_clocks +ffffffff81d22630 t si_vce_send_vcepll_ctlreq +ffffffff81d22870 t dce6_latency_watermark +ffffffff81d22ab0 t si_rlc_stop +ffffffff81d22c60 t si_vm_reg_valid +ffffffff81d22dc0 t si_vm_packet3_cp_dma_check +ffffffff81d22f30 t si_uvd_start +ffffffff81d22fe0 t si_vce_start +ffffffff81d230f0 t si_irq_init +ffffffff81d23bd0 t si_cp_load_microcode +ffffffff81d23fb0 t si_cp_resume +ffffffff81d24e70 t si_uvd_resume +ffffffff81d24f40 t si_vce_resume +ffffffff81d25030 t pcie_capability_set_word +ffffffff81d25140 t pcie_capability_read_word +ffffffff81d251e0 t pcie_capability_clear_and_set_word +ffffffff81d25300 t pcie_capability_write_word +ffffffff81d253c0 t si_update_cg +ffffffff81d25930 t si_enable_mgcg +ffffffff81d25d50 t si_enable_cgcg +ffffffff81d260e0 t request_firmware +ffffffff81d26170 t release_firmware +ffffffff81d27000 T si_dma_is_lockup +ffffffff81d27080 T si_dma_vm_copy_pages +ffffffff81d27170 T si_dma_vm_write_pages +ffffffff81d272d0 T si_dma_vm_set_pages +ffffffff81d27440 T si_dma_vm_flush +ffffffff81d278b0 T si_copy_dma +ffffffff81d28000 T si_dpm_force_performance_level +ffffffff81d28160 T si_get_ddr3_mclk_frequency_ratio +ffffffff81d281c0 T si_get_mclk_frequency_ratio +ffffffff81d28240 T si_trim_voltage_table_to_fit_state_table +ffffffff81d28350 T si_dpm_setup_asic +ffffffff81d28520 T si_fan_ctrl_get_fan_speed_percent +ffffffff81d285b0 T si_fan_ctrl_set_fan_speed_percent +ffffffff81d28670 T si_fan_ctrl_set_mode +ffffffff81d288c0 T si_fan_ctrl_get_mode +ffffffff81d28910 T si_dpm_enable +ffffffff81d29c90 t si_init_smc_table +ffffffff81d2aea0 t si_init_smc_spll_table +ffffffff81d2b020 t si_init_arb_table_index +ffffffff81d2b0b0 t si_populate_mc_reg_table +ffffffff81d2b500 t si_initialize_smc_cac_tables +ffffffff81d2d150 t si_initialize_hardware_cac_manager +ffffffff81d2d200 t si_initialize_smc_dte_tables +ffffffff81d2d400 t si_populate_smc_tdp_limits +ffffffff81d2d600 t si_populate_smc_tdp_limits_2 +ffffffff81d2d6d0 t si_program_response_times +ffffffff81d2d7f0 t si_program_ds_registers +ffffffff81d2d880 t si_dpm_start_smc +ffffffff81d2d8b0 t si_enable_auto_throttle_source +ffffffff81d2da40 t si_thermal_start_thermal_controller +ffffffff81d2df00 T si_dpm_late_enable +ffffffff81d2e050 T si_dpm_disable +ffffffff81d2e3d0 t si_enable_power_containment +ffffffff81d2e4a0 t si_enable_smc_cac +ffffffff81d2e600 T si_dpm_pre_set_power_state +ffffffff81d2f170 T si_dpm_set_power_state +ffffffff81d2f6d0 t si_halt_smc +ffffffff81d2f730 t si_upload_sw_state +ffffffff81d30130 t si_upload_smc_data +ffffffff81d30270 t si_upload_ulv_state +ffffffff81d303b0 t si_upload_mc_reg_table +ffffffff81d30550 t si_set_pcie_lane_width_in_smc +ffffffff81d305f0 t si_resume_smc +ffffffff81d30650 t si_set_vce_clock +ffffffff81d306f0 t si_notify_link_speed_change_after_state_change +ffffffff81d30820 t si_set_power_state_conditionally_enable_ulv +ffffffff81d30900 t si_power_control_set_level +ffffffff81d30a90 T si_dpm_post_set_power_state +ffffffff81d30ac0 T si_dpm_display_configuration_changed +ffffffff81d30ba0 T si_dpm_init +ffffffff81d325e0 T si_dpm_fini +ffffffff81d32690 T si_dpm_debugfs_print_current_performance_level +ffffffff81d326e0 T si_dpm_get_current_sclk +ffffffff81d32750 T si_dpm_get_current_mclk +ffffffff81d327c0 t si_do_program_memory_timing_parameters +ffffffff81d32950 t si_populate_mvdd_value +ffffffff81d329d0 t si_convert_power_level_to_smc +ffffffff81d33280 t si_calculate_sclk_params +ffffffff81d334b0 t si_program_cac_config_registers +ffffffff81d34000 T si_copy_bytes_to_smc +ffffffff81d34240 T si_start_smc +ffffffff81d34280 T si_reset_smc +ffffffff81d342c0 T si_program_jump_on_start +ffffffff81d342f0 T si_stop_smc_clock +ffffffff81d34330 T si_start_smc_clock +ffffffff81d34370 T si_is_smc_running +ffffffff81d343d0 T si_send_msg_to_smc +ffffffff81d344a0 T si_wait_for_smc_inactive +ffffffff81d34540 T si_load_smc_ucode +ffffffff81d346e0 T si_read_smc_sram_dword +ffffffff81d347b0 T si_write_smc_sram_dword +ffffffff81d35000 T sumo_get_pi +ffffffff81d35030 T sumo_gfx_clockgating_initialize +ffffffff81d35110 T sumo_program_vc +ffffffff81d35150 T sumo_clear_vc +ffffffff81d35190 T sumo_program_sstp +ffffffff81d35210 T sumo_take_smu_control +ffffffff81d35240 T sumo_get_sleep_divider_from_id +ffffffff81d35270 T sumo_get_sleep_divider_id_from_clock +ffffffff81d35320 T sumo_dpm_enable +ffffffff81d359b0 T sumo_dpm_late_enable +ffffffff81d35f70 T sumo_dpm_disable +ffffffff81d362c0 T sumo_dpm_pre_set_power_state +ffffffff81d367b0 T sumo_dpm_set_power_state +ffffffff81d37260 T sumo_dpm_post_set_power_state +ffffffff81d37300 T sumo_dpm_setup_asic +ffffffff81d37400 T sumo_dpm_display_configuration_changed +ffffffff81d37430 T sumo_convert_vid2_to_vid7 +ffffffff81d37480 T sumo_construct_sclk_voltage_mapping_table +ffffffff81d37540 T sumo_construct_vid_mapping_table +ffffffff81d376b0 T sumo_dpm_init +ffffffff81d37f60 T sumo_dpm_print_power_state +ffffffff81d38080 T sumo_dpm_debugfs_print_current_performance_level +ffffffff81d380b0 T sumo_dpm_get_current_sclk +ffffffff81d38120 T sumo_dpm_get_current_mclk +ffffffff81d38150 T sumo_dpm_get_current_vddc +ffffffff81d38220 T sumo_dpm_fini +ffffffff81d382b0 T sumo_dpm_get_sclk +ffffffff81d38300 T sumo_dpm_get_mclk +ffffffff81d38330 T sumo_dpm_force_performance_level +ffffffff81d38720 t sumo_power_level_enable +ffffffff81d38950 t sumo_program_power_level +ffffffff81d39000 T sumo_initialize_m3_arb +ffffffff81d392c0 T sumo_smu_notify_alt_vddnb_change +ffffffff81d39360 t sumo_send_msg_to_smu +ffffffff81d394f0 T sumo_smu_pg_init +ffffffff81d39510 T sumo_enable_boost_timer +ffffffff81d39640 T sumo_set_tdp_limit +ffffffff81d396c0 T sumo_boost_state_enable +ffffffff81d39710 T sumo_get_running_fw_version +ffffffff81d3a000 T trinity_dpm_enable_bapm +ffffffff81d3a080 T trinity_dpm_enable +ffffffff81d3a520 T trinity_dpm_late_enable +ffffffff81d3aa60 T trinity_dpm_disable +ffffffff81d3ae50 T trinity_dpm_force_performance_level +ffffffff81d3af00 T trinity_dpm_pre_set_power_state +ffffffff81d3b4c0 T trinity_dpm_set_power_state +ffffffff81d3ba30 T trinity_dpm_post_set_power_state +ffffffff81d3bad0 T trinity_dpm_setup_asic +ffffffff81d3bb30 T trinity_dpm_display_configuration_changed +ffffffff81d3bbc0 T trinity_dpm_init +ffffffff81d3c4a0 T trinity_dpm_print_power_state +ffffffff81d3c5b0 T trinity_dpm_debugfs_print_current_performance_level +ffffffff81d3c640 T trinity_dpm_get_current_sclk +ffffffff81d3c6a0 T trinity_dpm_get_current_mclk +ffffffff81d3c6d0 T trinity_dpm_fini +ffffffff81d3c770 T trinity_dpm_get_sclk +ffffffff81d3c7c0 T trinity_dpm_get_mclk +ffffffff81d3c7f0 t trinity_program_power_level +ffffffff81d3d000 T trinity_dpm_bapm_enable +ffffffff81d3d150 T trinity_dpm_config +ffffffff81d3d230 T trinity_dpm_force_state +ffffffff81d3d310 T trinity_dpm_n_levels_disabled +ffffffff81d3d3f0 T trinity_uvd_dpm_config +ffffffff81d3d4c0 T trinity_dpm_no_forced_level +ffffffff81d3d590 T trinity_dce_enable_voltage_adjustment +ffffffff81d3d6e0 T trinity_gfx_dynamic_mgpg_config +ffffffff81d3d7b0 T trinity_acquire_mutex +ffffffff81d3d840 T trinity_release_mutex +ffffffff81d3e000 T uvd_v1_0_get_rptr +ffffffff81d3e040 T uvd_v1_0_get_wptr +ffffffff81d3e080 T uvd_v1_0_set_wptr +ffffffff81d3e0c0 T uvd_v1_0_fence_emit +ffffffff81d3e4b0 T uvd_v1_0_resume +ffffffff81d3e610 T uvd_v1_0_init +ffffffff81d3eb90 T uvd_v1_0_start +ffffffff81d3f310 T uvd_v1_0_fini +ffffffff81d3f480 T uvd_v1_0_stop +ffffffff81d3f5f0 T uvd_v1_0_ring_test +ffffffff81d3f7c0 T uvd_v1_0_semaphore_emit +ffffffff81d3f7f0 T uvd_v1_0_ib_execute +ffffffff81d3f980 T uvd_v1_0_ib_test +ffffffff81d40000 T uvd_v2_2_fence_emit +ffffffff81d40450 T uvd_v2_2_semaphore_emit +ffffffff81d40650 T uvd_v2_2_resume +ffffffff81d41000 T uvd_v3_1_semaphore_emit +ffffffff81d42000 T uvd_v4_2_resume +ffffffff81d43000 T vce_v1_0_get_rptr +ffffffff81d43090 T vce_v1_0_get_wptr +ffffffff81d43120 T vce_v1_0_set_wptr +ffffffff81d431b0 T vce_v1_0_enable_mgcg +ffffffff81d43470 T vce_v1_0_load_fw +ffffffff81d43640 T vce_v1_0_bo_size +ffffffff81d436b0 T vce_v1_0_resume +ffffffff81d44020 T vce_v1_0_start +ffffffff81d447e0 T vce_v1_0_init +ffffffff81d45000 T vce_v2_0_enable_mgcg +ffffffff81d45070 t vce_v2_0_set_dyn_cg +ffffffff81d45260 T vce_v2_0_bo_size +ffffffff81d452d0 T vce_v2_0_resume +ffffffff81d46000 T aldebaran_reset_init +ffffffff81d460c0 t aldebaran_async_reset +ffffffff81d46120 t aldebaran_get_reset_handler +ffffffff81d461c0 T aldebaran_reset_fini +ffffffff81d46220 t aldebaran_mode2_prepare_hwcontext +ffffffff81d46340 t aldebaran_mode2_perform_reset +ffffffff81d46500 t aldebaran_mode2_restore_hwcontext +ffffffff81d469e0 t aldebaran_mode2_reset +ffffffff81d47000 T aldebaran_reg_base_init +ffffffff81d48000 T amdgpu_acpi_is_pcie_performance_request_supported +ffffffff81d48040 T amdgpu_acpi_is_power_shift_control_supported +ffffffff81d48070 T amdgpu_acpi_pcie_notify_device_ready +ffffffff81d48180 T amdgpu_acpi_pcie_performance_request +ffffffff81d48500 T amdgpu_acpi_power_shift_control +ffffffff81d48640 T amdgpu_acpi_smart_shift_update +ffffffff81d486e0 T amdgpu_acpi_get_tmr_info +ffffffff81d48770 T amdgpu_acpi_get_mem_info +ffffffff81d48830 T amdgpu_acpi_init +ffffffff81d488e0 t amdgpu_acpi_event +ffffffff81d48bf0 T amdgpu_acpi_get_backlight_caps +ffffffff81d48c40 T amdgpu_acpi_fini +ffffffff81d48c60 T amdgpu_acpi_should_gpu_reset +ffffffff81d48cb0 T amdgpu_acpi_detect +ffffffff81d495e0 T amdgpu_acpi_release +ffffffff81d4a000 T amdgpu_afmt_acr +ffffffff81d4b000 T amdgpu_amdkfd_init +ffffffff81d4b040 T amdgpu_amdkfd_fini +ffffffff81d4b070 T amdgpu_amdkfd_device_probe +ffffffff81d4b0a0 T amdgpu_amdkfd_device_init +ffffffff81d4b260 t amdgpu_amdkfd_reset_work +ffffffff81d4b2e0 T amdgpu_amdkfd_device_fini_sw +ffffffff81d4b330 T amdgpu_amdkfd_interrupt +ffffffff81d4b360 T amdgpu_amdkfd_suspend +ffffffff81d4b390 T amdgpu_amdkfd_resume +ffffffff81d4b3c0 T amdgpu_amdkfd_pre_reset +ffffffff81d4b3f0 T amdgpu_amdkfd_post_reset +ffffffff81d4b420 T amdgpu_amdkfd_gpu_reset +ffffffff81d4b480 T amdgpu_amdkfd_alloc_gtt_mem +ffffffff81d4b730 t amdgpu_bo_reserve +ffffffff81d4b890 t amdgpu_bo_unreserve +ffffffff81d4b970 T amdgpu_amdkfd_free_gtt_mem +ffffffff81d4b9e0 T amdgpu_amdkfd_alloc_gws +ffffffff81d4bac0 T amdgpu_amdkfd_free_gws +ffffffff81d4bb00 T amdgpu_amdkfd_get_fw_version +ffffffff81d4bbb0 T amdgpu_amdkfd_get_local_mem_info +ffffffff81d4bd50 T amdgpu_amdkfd_xcp_memory_size +ffffffff81d4bdf0 T amdgpu_amdkfd_get_gpu_clock_counter +ffffffff81d4be30 T amdgpu_amdkfd_get_max_engine_clock_in_mhz +ffffffff81d4be90 T amdgpu_amdkfd_get_cu_info +ffffffff81d4bfa0 T amdgpu_amdkfd_get_dmabuf_info +ffffffff81d4c0f0 T amdgpu_amdkfd_get_xgmi_hops_count +ffffffff81d4c160 T amdgpu_amdkfd_get_xgmi_bandwidth_mbytes +ffffffff81d4c1f0 T amdgpu_amdkfd_get_pcie_bandwidth_mbytes +ffffffff81d4c350 T amdgpu_amdkfd_submit_ib +ffffffff81d4c4b0 T amdgpu_amdkfd_set_compute_idle +ffffffff81d4c500 T amdgpu_amdkfd_is_kfd_vmid +ffffffff81d4c540 T amdgpu_amdkfd_flush_gpu_tlb_vmid +ffffffff81d4c670 T amdgpu_amdkfd_flush_gpu_tlb_pasid +ffffffff81d4c6b0 T amdgpu_amdkfd_have_atomics_support +ffffffff81d4c6e0 T amdgpu_amdkfd_debug_mem_fence +ffffffff81d4c700 T amdgpu_amdkfd_ras_poison_consumption_handler +ffffffff81d4c710 T amdgpu_amdkfd_send_close_event_drain_irq +ffffffff81d4c730 T amdgpu_amdkfd_ras_query_utcl2_poison_status +ffffffff81d4c780 T amdgpu_amdkfd_check_and_lock_kfd +ffffffff81d4c7b0 T amdgpu_amdkfd_unlock_kfd +ffffffff81d4c7e0 T amdgpu_amdkfd_unmap_hiq +ffffffff81d4d000 T amdgpu_atom_execute_table +ffffffff81d4d0a0 t amdgpu_atom_execute_table_locked +ffffffff81d4d3c0 T amdgpu_atom_parse +ffffffff81d4d910 T amdgpu_atom_destroy +ffffffff81d4d950 T amdgpu_atom_asic_init +ffffffff81d4da70 t get_u32 +ffffffff81d4dad0 T amdgpu_atom_parse_data_header +ffffffff81d4db70 T amdgpu_atom_parse_cmd_header +ffffffff81d4dbf0 t atom_op_move +ffffffff81d4ddc0 t atom_op_and +ffffffff81d4dfa0 t atom_op_or +ffffffff81d4e180 t atom_op_shift_left +ffffffff81d4e360 t atom_op_shift_right +ffffffff81d4e540 t atom_op_mul +ffffffff81d4e690 t atom_op_div +ffffffff81d4e800 t atom_op_add +ffffffff81d4e9e0 t atom_op_sub +ffffffff81d4ebc0 t atom_op_setport +ffffffff81d4ed40 t atom_op_setregblock +ffffffff81d4ee00 t atom_op_setfbbase +ffffffff81d4eec0 t atom_op_compare +ffffffff81d4f0a0 t atom_op_switch +ffffffff81d4f2d0 t atom_op_jump +ffffffff81d4f540 t atom_op_test +ffffffff81d4f700 t atom_op_delay +ffffffff81d4f7e0 t atom_op_calltable +ffffffff81d4f930 t atom_op_repeat +ffffffff81d4f960 t atom_op_clear +ffffffff81d4fa70 t atom_op_nop +ffffffff81d4faa0 t atom_op_eot +ffffffff81d4fad0 t atom_op_mask +ffffffff81d4fd80 t atom_op_postcard +ffffffff81d4fe30 t atom_op_beep +ffffffff81d4fe50 t atom_op_savereg +ffffffff81d4fe80 t atom_op_restorereg +ffffffff81d4feb0 t atom_op_setdatablock +ffffffff81d4fff0 t atom_op_xor +ffffffff81d501d0 t atom_op_shl +ffffffff81d503f0 t atom_op_shr +ffffffff81d50610 t atom_op_debug +ffffffff81d506c0 t atom_op_processds +ffffffff81d50780 t atom_op_mul32 +ffffffff81d508e0 t atom_op_div32 +ffffffff81d50a70 t atom_put_dst +ffffffff81d50f80 t atom_get_src_int +ffffffff81d51600 t atom_iio_execute +ffffffff81d52000 T amdgpu_atombios_lookup_i2c_gpio +ffffffff81d52260 T amdgpu_atombios_i2c_init +ffffffff81d52520 T amdgpu_atombios_lookup_gpio +ffffffff81d52620 T amdgpu_atombios_has_dce_engine_info +ffffffff81d526a0 T amdgpu_atombios_get_connector_info_from_object_table +ffffffff81d52f00 T amdgpu_atombios_get_clock_info +ffffffff81d53240 T amdgpu_atombios_get_gfx_info +ffffffff81d53300 T amdgpu_atombios_get_vram_width +ffffffff81d53390 T amdgpu_atombios_get_asic_ss_info +ffffffff81d53670 t amdgpu_atombios_get_igp_ss_overrides +ffffffff81d53790 T amdgpu_atombios_get_clock_dividers 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cz_ih_sw_init +ffffffff81df10b0 t cz_ih_sw_fini +ffffffff81df10f0 t cz_ih_hw_init +ffffffff81df1310 t cz_ih_hw_fini +ffffffff81df13e0 t cz_ih_suspend +ffffffff81df14b0 t cz_ih_resume +ffffffff81df14f0 t cz_ih_is_idle +ffffffff81df1540 t cz_ih_wait_for_idle +ffffffff81df15e0 t cz_ih_soft_reset +ffffffff81df16c0 t cz_ih_set_clockgating_state +ffffffff81df16f0 t cz_ih_set_powergating_state +ffffffff81df1720 t cz_ih_get_wptr +ffffffff81df1810 t cz_ih_decode_iv +ffffffff81df1890 t cz_ih_set_rptr +ffffffff81df2000 T dce_v10_0_disable_dce +ffffffff81df2150 t dce_v10_0_early_init +ffffffff81df2210 t dce_v10_0_sw_init +ffffffff81df2520 t dce_v10_0_sw_fini +ffffffff81df2640 t dce_v10_0_hw_init +ffffffff81df29a0 t dce_v10_0_hw_fini +ffffffff81df2b30 t dce_v10_0_suspend +ffffffff81df2b90 t dce_v10_0_resume +ffffffff81df2c00 t dce_v10_0_is_idle +ffffffff81df2c30 t dce_v10_0_wait_for_idle +ffffffff81df2c60 t dce_v10_0_check_soft_reset +ffffffff81df2c70 t dce_v10_0_soft_reset +ffffffff81df2d40 t dce_v10_0_set_clockgating_state +ffffffff81df2d70 t dce_v10_0_set_powergating_state +ffffffff81df2da0 t dce_v10_0_audio_endpt_rreg +ffffffff81df2e30 t dce_v10_0_audio_endpt_wreg +ffffffff81df2eb0 t dce_v10_0_bandwidth_update +ffffffff81df3920 t dce_v10_0_vblank_get_counter +ffffffff81df3970 t dce_v10_0_hpd_sense +ffffffff81df39d0 t dce_v10_0_hpd_set_polarity +ffffffff81df3aa0 t dce_v10_0_hpd_get_gpio_reg +ffffffff81df3ad0 t dce_v10_0_page_flip +ffffffff81df3bd0 t dce_v10_0_crtc_get_scanoutpos +ffffffff81df3c70 t dce_v10_0_encoder_add +ffffffff81df3ec0 t dce_v10_0_latency_watermark +ffffffff81df40f0 t dce_v10_0_encoder_destroy +ffffffff81df4150 t dce_v10_0_encoder_prepare +ffffffff81df4350 t dce_v10_0_encoder_commit +ffffffff81df4380 t dce_v10_0_encoder_mode_set +ffffffff81df52f0 t dce_v10_0_encoder_disable +ffffffff81df5400 t dce_v10_0_ext_dpms +ffffffff81df5430 t dce_v10_0_ext_prepare +ffffffff81df5460 t dce_v10_0_ext_commit +ffffffff81df5490 t dce_v10_0_ext_mode_set +ffffffff81df54c0 t dce_v10_0_ext_disable +ffffffff81df54f0 t dce_v10_0_set_crtc_irq_state +ffffffff81df55d0 t dce_v10_0_crtc_irq +ffffffff81df5810 t dce_v10_0_set_crtc_vblank_interrupt_state +ffffffff81df58e0 t dce_v10_0_set_crtc_vline_interrupt_state +ffffffff81df59b0 t dce_v10_0_set_pageflip_irq_state +ffffffff81df5a60 t dce_v10_0_pageflip_irq +ffffffff81df5bc0 t dce_v10_0_set_hpd_irq_state +ffffffff81df5c90 t dce_v10_0_hpd_irq +ffffffff81df5dc0 t dce_v10_0_afmt_init +ffffffff81df5ed0 t dce_v10_0_audio_init +ffffffff81df5fa0 t INIT_DELAYED_WORK +ffffffff81df5fe0 t dce_v10_0_crtc_cursor_set2 +ffffffff81df62a0 t dce_v10_0_crtc_cursor_move +ffffffff81df6370 t dce_v10_0_crtc_gamma_set +ffffffff81df63b0 t dce_v10_0_crtc_destroy +ffffffff81df63e0 t amdgpu_bo_reserve +ffffffff81df65e0 t amdgpu_bo_unreserve +ffffffff81df66c0 t dce_v10_0_lock_cursor +ffffffff81df6720 t dce_v10_0_cursor_move_locked +ffffffff81df6880 t dce_v10_0_show_cursor +ffffffff81df6920 t dce_v10_0_crtc_load_lut +ffffffff81df6cb0 t dce_v10_0_crtc_dpms +ffffffff81df6e90 t dce_v10_0_crtc_prepare +ffffffff81df6ed0 t dce_v10_0_crtc_commit +ffffffff81df6f00 t dce_v10_0_crtc_mode_fixup +ffffffff81df70b0 t dce_v10_0_crtc_mode_set +ffffffff81df7290 t dce_v10_0_crtc_set_base +ffffffff81df72b0 t dce_v10_0_crtc_set_base_atomic +ffffffff81df72d0 t dce_v10_0_crtc_disable +ffffffff81df7460 t dce_v10_0_crtc_do_set_base +ffffffff81df7b60 t __delayed_work_tick +ffffffff81df7b80 t dce_v10_0_is_display_hung +ffffffff81df8000 T dce_v11_0_disable_dce +ffffffff81df8160 t dce_v11_0_early_init +ffffffff81df8290 t dce_v11_0_sw_init +ffffffff81df85b0 t dce_v11_0_sw_fini +ffffffff81df86d0 t dce_v11_0_hw_init +ffffffff81df8a90 t dce_v11_0_hw_fini +ffffffff81df8c20 t dce_v11_0_suspend +ffffffff81df8c80 t dce_v11_0_resume +ffffffff81df8cf0 t dce_v11_0_is_idle +ffffffff81df8d20 t dce_v11_0_wait_for_idle +ffffffff81df8d50 t dce_v11_0_soft_reset +ffffffff81df8f60 t dce_v11_0_set_clockgating_state +ffffffff81df8f90 t dce_v11_0_set_powergating_state +ffffffff81df8fc0 t dce_v11_0_audio_endpt_rreg +ffffffff81df9050 t dce_v11_0_audio_endpt_wreg +ffffffff81df90d0 t dce_v11_0_bandwidth_update +ffffffff81df9b40 t dce_v11_0_vblank_get_counter +ffffffff81df9b90 t dce_v11_0_hpd_sense +ffffffff81df9bf0 t dce_v11_0_hpd_set_polarity +ffffffff81df9cc0 t dce_v11_0_hpd_get_gpio_reg +ffffffff81df9cf0 t dce_v11_0_page_flip +ffffffff81df9df0 t dce_v11_0_crtc_get_scanoutpos +ffffffff81df9e90 t dce_v11_0_encoder_add +ffffffff81dfa0e0 t dce_v11_0_latency_watermark +ffffffff81dfa310 t dce_v11_0_encoder_destroy +ffffffff81dfa370 t dce_v11_0_encoder_prepare +ffffffff81dfa570 t dce_v11_0_encoder_commit +ffffffff81dfa5a0 t dce_v11_0_encoder_mode_set +ffffffff81dfb510 t dce_v11_0_encoder_disable +ffffffff81dfb620 t dce_v11_0_ext_dpms +ffffffff81dfb650 t dce_v11_0_ext_prepare +ffffffff81dfb680 t dce_v11_0_ext_commit +ffffffff81dfb6b0 t dce_v11_0_ext_mode_set +ffffffff81dfb6e0 t dce_v11_0_ext_disable +ffffffff81dfb710 t dce_v11_0_set_crtc_irq_state +ffffffff81dfb7f0 t dce_v11_0_crtc_irq +ffffffff81dfba10 t dce_v11_0_set_crtc_vblank_interrupt_state +ffffffff81dfbae0 t dce_v11_0_set_crtc_vline_interrupt_state +ffffffff81dfbbb0 t dce_v11_0_set_pageflip_irq_state +ffffffff81dfbc60 t dce_v11_0_pageflip_irq +ffffffff81dfbdc0 t dce_v11_0_set_hpd_irq_state +ffffffff81dfbe90 t dce_v11_0_hpd_irq +ffffffff81dfbfc0 t dce_v11_0_afmt_init +ffffffff81dfc0d0 t dce_v11_0_audio_init +ffffffff81dfc1d0 t INIT_DELAYED_WORK +ffffffff81dfc210 t dce_v11_0_crtc_cursor_set2 +ffffffff81dfc4d0 t dce_v11_0_crtc_cursor_move +ffffffff81dfc5a0 t dce_v11_0_crtc_gamma_set +ffffffff81dfc5e0 t dce_v11_0_crtc_destroy +ffffffff81dfc610 t amdgpu_bo_reserve +ffffffff81dfc810 t amdgpu_bo_unreserve +ffffffff81dfc8f0 t dce_v11_0_lock_cursor +ffffffff81dfc950 t dce_v11_0_cursor_move_locked +ffffffff81dfcab0 t dce_v11_0_show_cursor +ffffffff81dfcb50 t dce_v11_0_crtc_load_lut +ffffffff81dfceb0 t dce_v11_0_crtc_dpms +ffffffff81dfd090 t dce_v11_0_crtc_prepare +ffffffff81dfd0d0 t dce_v11_0_crtc_commit +ffffffff81dfd100 t dce_v11_0_crtc_mode_fixup +ffffffff81dfd370 t dce_v11_0_crtc_mode_set +ffffffff81dfd5d0 t dce_v11_0_crtc_set_base +ffffffff81dfd5f0 t dce_v11_0_crtc_set_base_atomic +ffffffff81dfd610 t dce_v11_0_crtc_disable +ffffffff81dfd7b0 t dce_v11_0_crtc_do_set_base +ffffffff81dfdeb0 t __delayed_work_tick +ffffffff81dfe000 t df_v1_7_sw_init +ffffffff81dfe040 t df_v1_7_sw_fini +ffffffff81dfe070 t df_v1_7_enable_broadcast_mode +ffffffff81dfe1a0 t df_v1_7_get_fb_channel_number +ffffffff81dfe230 t df_v1_7_get_hbm_channel_number +ffffffff81dfe280 t df_v1_7_update_medium_grain_clock_gating +ffffffff81dfe400 t df_v1_7_get_clockgating_state +ffffffff81dfe490 t df_v1_7_enable_ecc_force_par_wr_rmw +ffffffff81dff000 t df_v3_6_sw_init +ffffffff81dff150 t df_v3_6_sw_fini +ffffffff81dff180 t df_v3_6_enable_broadcast_mode +ffffffff81dff2b0 t df_v3_6_get_fb_channel_number +ffffffff81dff390 t df_v3_6_get_hbm_channel_number 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gfx_v10_0_set_powergating_state +ffffffff81e08670 t gfx_v10_0_get_clockgating_state +ffffffff81e08780 t gfx_v10_0_get_gpu_clock_counter +ffffffff81e08c90 t gfx_v10_0_select_se_sh +ffffffff81e08d30 t gfx_v10_0_read_wave_data +ffffffff81e08f90 t gfx_v10_0_read_wave_vgprs +ffffffff81e08fc0 t gfx_v10_0_read_wave_sgprs +ffffffff81e09040 t gfx_v10_0_select_me_pipe_q +ffffffff81e09060 t gfx_v10_0_init_spm_golden_registers +ffffffff81e090d0 t gfx_v10_0_update_perfmon_mgcg +ffffffff81e09200 t wave_read_ind +ffffffff81e092f0 t wave_read_regs +ffffffff81e09450 t gfx10_kiq_set_resources +ffffffff81e09770 t gfx10_kiq_map_queues +ffffffff81e09b00 t gfx10_kiq_unmap_queues +ffffffff81e09f00 t gfx10_kiq_query_status +ffffffff81e0a1f0 t gfx10_kiq_invalidate_tlbs +ffffffff81e0a310 t gfx_v10_0_ring_get_rptr_compute +ffffffff81e0a340 t gfx_v10_0_ring_get_wptr_compute +ffffffff81e0a3b0 t gfx_v10_0_ring_set_wptr_compute +ffffffff81e0a4f0 t gfx_v10_0_ring_emit_ib_compute +ffffffff81e0a830 t gfx_v10_0_ring_emit_fence_kiq +ffffffff81e0ac60 t gfx_v10_0_ring_test_ring +ffffffff81e0aec0 t gfx_v10_0_ring_test_ib +ffffffff81e0b150 t gfx_v10_0_ring_emit_rreg +ffffffff81e0b3e0 t gfx_v10_0_ring_emit_wreg +ffffffff81e0b610 t gfx_v10_0_ring_emit_reg_wait +ffffffff81e0b660 t gfx_v10_0_ring_emit_reg_write_reg_wait +ffffffff81e0b6f0 t gfx_v10_0_wait_reg_mem +ffffffff81e0ba20 t gfx_v10_0_ring_get_rptr_gfx +ffffffff81e0ba50 t gfx_v10_0_ring_get_wptr_gfx +ffffffff81e0bb60 t gfx_v10_0_ring_set_wptr_gfx +ffffffff81e0bd70 t gfx_v10_0_ring_emit_ib_gfx +ffffffff81e0c3f0 t gfx_v10_0_ring_emit_fence +ffffffff81e0c7c0 t gfx_v10_0_ring_emit_pipeline_sync +ffffffff81e0c820 t gfx_v10_0_ring_emit_vm_flush +ffffffff81e0c9f0 t gfx_v10_0_ring_emit_hdp_flush +ffffffff81e0cac0 t gfx_v10_0_ring_emit_gds_switch +ffffffff81e0cba0 t gfx_v10_0_ring_emit_init_cond_exec +ffffffff81e0cdd0 t gfx_v10_0_ring_emit_patch_cond_exec +ffffffff81e0ce90 t gfx_v10_0_ring_emit_sb +ffffffff81e0cf80 t gfx_v10_0_ring_emit_cntxcntl +ffffffff81e0d470 t gfx_v10_0_ring_emit_frame_cntl +ffffffff81e0d580 t gfx_v10_0_ring_soft_recovery +ffffffff81e0d5f0 t gfx_v10_0_ring_preempt_ib +ffffffff81e0d760 t gfx_v10_0_emit_mem_sync +ffffffff81e0da90 t gfx_v10_0_write_data_to_reg +ffffffff81e0dca0 t gfx_v10_0_set_eop_interrupt_state +ffffffff81e0dd80 t gfx_v10_0_eop_irq +ffffffff81e0df30 t gfx_v10_0_set_gfx_eop_interrupt_state +ffffffff81e0e0d0 t gfx_v10_0_set_compute_eop_interrupt_state +ffffffff81e0e290 t gfx_v10_0_kiq_set_interrupt_state +ffffffff81e0e580 t gfx_v10_0_kiq_irq +ffffffff81e0e600 t gfx_v10_0_set_priv_reg_fault_state +ffffffff81e0e740 t gfx_v10_0_priv_reg_irq +ffffffff81e0e7a0 t gfx_v10_0_handle_priv_fault +ffffffff81e0e900 t gfx_v10_0_set_priv_inst_fault_state +ffffffff81e0ea40 t gfx_v10_0_priv_inst_irq +ffffffff81e0eaa0 t gfx_v10_0_is_rlc_enabled +ffffffff81e0eb30 t gfx_v10_0_set_safe_mode +ffffffff81e0ede0 t gfx_v10_0_unset_safe_mode +ffffffff81e0ee90 t gfx_v10_0_rlc_init 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gfx_v10_0_get_rb_active_bitmap +ffffffff81e14d20 t gfx_v10_0_get_wgp_active_bitmap_per_sh +ffffffff81e14e30 t gfx_v10_0_enable_gui_idle_interrupt +ffffffff81e14f40 t gfx_v10_0_cp_gfx_enable +ffffffff81e151b0 t gfx_v10_0_cp_compute_enable +ffffffff81e15350 t amdgpu_bo_reserve +ffffffff81e154c0 t gfx_v10_0_kiq_init_register +ffffffff81e16360 t gfx_v10_0_cp_gfx_switch_pipe +ffffffff81e16460 t gfx_v10_0_cp_gfx_set_doorbell +ffffffff81e16740 t gfx_v10_0_cp_gfx_start +ffffffff81e17130 t gfx_v10_0_update_fine_grain_clock_gating +ffffffff81e17480 t gfx_v10_0_update_medium_grain_clock_gating +ffffffff81e17bc0 t gfx_v10_0_update_3d_clock_gating +ffffffff81e17fb0 t gfx_v10_0_update_coarse_grain_clock_gating +ffffffff81e18390 t gfx_v10_cntl_pg +ffffffff81e19000 t gfx_v11_0_early_init +ffffffff81e19750 t gfx_v11_0_late_init +ffffffff81e197c0 t gfx_v11_0_sw_init +ffffffff81e19d00 t gfx_v11_0_sw_fini +ffffffff81e19f10 t gfx_v11_0_hw_init +ffffffff81e1e390 t gfx_v11_0_hw_fini +ffffffff81e1e490 t gfx_v11_0_suspend +ffffffff81e1e4d0 t gfx_v11_0_resume +ffffffff81e1e4e0 t gfx_v11_0_is_idle +ffffffff81e1e570 t gfx_v11_0_wait_for_idle +ffffffff81e1e670 t gfx_v11_0_check_soft_reset +ffffffff81e1e7a0 t gfx_v11_0_soft_reset +ffffffff81e1f4e0 t gfx_v11_0_post_soft_reset +ffffffff81e1f4f0 t gfx_v11_0_set_clockgating_state +ffffffff81e20130 t gfx_v11_0_set_powergating_state +ffffffff81e201d0 t gfx_v11_0_get_clockgating_state +ffffffff81e203a0 t gfx_v11_0_get_gpu_clock_counter +ffffffff81e20720 t gfx_v11_0_select_se_sh +ffffffff81e207c0 t gfx_v11_0_read_wave_data +ffffffff81e20a00 t gfx_v11_0_read_wave_vgprs +ffffffff81e20a30 t gfx_v11_0_read_wave_sgprs +ffffffff81e20ab0 t gfx_v11_0_select_me_pipe_q +ffffffff81e20ad0 t gfx_v11_0_update_perf_clk +ffffffff81e20c00 t gfx_v11_0_get_gfx_shadow_info +ffffffff81e20c70 t wave_read_ind +ffffffff81e20d60 t wave_read_regs +ffffffff81e20ec0 t gfx11_kiq_set_resources +ffffffff81e211e0 t gfx11_kiq_map_queues +ffffffff81e21570 t gfx11_kiq_unmap_queues +ffffffff81e21970 t gfx11_kiq_query_status +ffffffff81e21c60 t gfx11_kiq_invalidate_tlbs +ffffffff81e21d80 t gfx_v11_0_ring_get_rptr_compute +ffffffff81e21db0 t gfx_v11_0_ring_get_wptr_compute +ffffffff81e21e20 t gfx_v11_0_ring_set_wptr_compute +ffffffff81e21f60 t gfx_v11_0_ring_emit_ib_compute +ffffffff81e222a0 t gfx_v11_0_ring_emit_fence_kiq +ffffffff81e226d0 t gfx_v11_0_ring_test_ring +ffffffff81e22950 t gfx_v11_0_ring_test_ib +ffffffff81e22bf0 t gfx_v11_0_ring_emit_rreg +ffffffff81e22e80 t gfx_v11_0_ring_emit_wreg +ffffffff81e230b0 t gfx_v11_0_ring_emit_reg_wait +ffffffff81e23100 t gfx_v11_0_ring_emit_reg_write_reg_wait +ffffffff81e23170 t gfx_v11_0_wait_reg_mem +ffffffff81e234a0 t gfx_v11_0_ring_get_rptr_gfx +ffffffff81e234d0 t gfx_v11_0_ring_get_wptr_gfx +ffffffff81e235e0 t gfx_v11_0_ring_set_wptr_gfx +ffffffff81e23800 t gfx_v11_0_ring_emit_ib_gfx +ffffffff81e23e90 t gfx_v11_0_ring_emit_fence +ffffffff81e24260 t gfx_v11_0_ring_emit_pipeline_sync +ffffffff81e242c0 t gfx_v11_0_ring_emit_vm_flush +ffffffff81e24490 t gfx_v11_0_ring_emit_hdp_flush +ffffffff81e24560 t gfx_v11_0_ring_emit_gds_switch +ffffffff81e24640 t gfx_v11_0_ring_emit_init_cond_exec +ffffffff81e24870 t gfx_v11_0_ring_emit_patch_cond_exec +ffffffff81e24930 t gfx_v11_0_ring_emit_cntxcntl +ffffffff81e24a90 t gfx_v11_0_ring_emit_gfx_shadow +ffffffff81e24e50 t gfx_v11_0_ring_emit_frame_cntl +ffffffff81e24f60 t gfx_v11_0_ring_soft_recovery +ffffffff81e24fd0 t gfx_v11_0_ring_preempt_ib +ffffffff81e25140 t gfx_v11_0_emit_mem_sync +ffffffff81e25470 t gfx_v11_0_write_data_to_reg +ffffffff81e25680 t gfx_v11_0_set_eop_interrupt_state +ffffffff81e25710 t gfx_v11_0_eop_irq +ffffffff81e258c0 t gfx_v11_0_set_gfx_eop_interrupt_state +ffffffff81e25a60 t gfx_v11_0_set_compute_eop_interrupt_state +ffffffff81e25bf0 t gfx_v11_0_set_priv_reg_fault_state +ffffffff81e25d30 t gfx_v11_0_priv_reg_irq +ffffffff81e25d90 t gfx_v11_0_handle_priv_fault +ffffffff81e25ef0 t gfx_v11_0_set_priv_inst_fault_state +ffffffff81e26030 t gfx_v11_0_priv_inst_irq +ffffffff81e26090 t gfx_v11_0_rlc_gc_fed_irq +ffffffff81e260e0 t gfx_v11_0_is_rlc_enabled +ffffffff81e26170 t gfx_v11_0_set_safe_mode +ffffffff81e262d0 t gfx_v11_0_unset_safe_mode +ffffffff81e26340 t gfx_v11_0_rlc_init +ffffffff81e263c0 t gfx_v11_0_get_csb_size +ffffffff81e263f0 t gfx_v11_0_get_csb_buffer +ffffffff81e26560 t gfx_v11_0_rlc_resume +ffffffff81e272c0 t gfx_v11_0_rlc_stop +ffffffff81e273a0 t gfx_v11_0_rlc_reset +ffffffff81e27550 t gfx_v11_0_rlc_start +ffffffff81e27700 t gfx_v11_0_update_spm_vmid +ffffffff81e27800 t gfx_v11_0_init_csb +ffffffff81e27990 t gfx_v11_0_gfx_mqd_init +ffffffff81e27d70 t gfx_v11_0_compute_mqd_init +ffffffff81e282a0 t gfx_v11_0_mec_init +ffffffff81e283e0 t gfx_v11_0_compute_ring_init +ffffffff81e28520 t gfx_v11_0_rlc_autoload_buffer_init +ffffffff81e28710 t gfx_v11_0_gpu_early_init +ffffffff81e287e0 t amdgpu_bo_unreserve +ffffffff81e288c0 t gfx_v11_0_disable_gpa_mode +ffffffff81e28a60 t gfx_v11_0_cp_resume +ffffffff81e2c860 t gfx_v11_0_config_me_cache +ffffffff81e2cc20 t gfx_v11_0_config_pfp_cache +ffffffff81e2cfe0 t gfx_v11_0_config_mec_cache +ffffffff81e2d3a0 t gfx_v11_0_enable_gui_idle_interrupt +ffffffff81e2d4b0 t gfx_v11_0_cp_compute_enable +ffffffff81e2d690 t gfx_v11_0_cp_gfx_enable +ffffffff81e2d8a0 t amdgpu_bo_reserve +ffffffff81e2da10 t gfx_v11_0_kiq_init_register +ffffffff81e2e8b0 t gfx_v11_0_cp_gfx_switch_pipe +ffffffff81e2e990 t gfx_v11_0_cp_gfx_set_doorbell +ffffffff81e2eb70 t gfx_v11_0_cp_gfx_start +ffffffff81e2f3f0 t gfx_v11_cntl_pg +ffffffff81e30000 t gfx_v11_0_3_rlc_gc_fed_irq +ffffffff81e30200 t gfx_v11_0_3_poison_consumption_handler +ffffffff81e31000 t gfx_v8_0_early_init +ffffffff81e312f0 t gfx_v8_0_late_init +ffffffff81e31a10 t gfx_v8_0_sw_init +ffffffff81e31dd0 t gfx_v8_0_sw_fini +ffffffff81e31f70 t gfx_v8_0_hw_init +ffffffff81e34110 t gfx_v8_0_hw_fini +ffffffff81e345c0 t gfx_v8_0_suspend +ffffffff81e34600 t gfx_v8_0_resume +ffffffff81e34610 t gfx_v8_0_is_idle +ffffffff81e34680 t gfx_v8_0_wait_for_idle +ffffffff81e34730 t gfx_v8_0_check_soft_reset +ffffffff81e34810 t gfx_v8_0_pre_soft_reset +ffffffff81e34970 t gfx_v8_0_soft_reset +ffffffff81e34b30 t gfx_v8_0_post_soft_reset +ffffffff81e34cb0 t gfx_v8_0_set_clockgating_state +ffffffff81e34f30 t gfx_v8_0_set_powergating_state +ffffffff81e352e0 t gfx_v8_0_get_clockgating_state +ffffffff81e353c0 t gfx_v8_0_get_gpu_clock_counter +ffffffff81e35460 t gfx_v8_0_select_se_sh +ffffffff81e354c0 t gfx_v8_0_read_wave_data +ffffffff81e35960 t gfx_v8_0_read_wave_sgprs +ffffffff81e35a10 t gfx_v8_0_select_me_pipe_q +ffffffff81e35a30 t gfx_v8_0_ring_get_rptr +ffffffff81e35a60 t gfx_v8_0_ring_get_wptr_compute +ffffffff81e35a90 t gfx_v8_0_ring_set_wptr_compute +ffffffff81e35ad0 t gfx_v8_0_ring_emit_fence_kiq +ffffffff81e35ef0 t gfx_v8_0_ring_test_ring +ffffffff81e360f0 t gfx_v8_0_ring_emit_rreg +ffffffff81e36380 t gfx_v8_0_ring_emit_wreg +ffffffff81e365b0 t gfx_v8_0_ring_get_wptr_gfx +ffffffff81e36610 t gfx_v8_0_ring_set_wptr_gfx +ffffffff81e36680 t gfx_v8_0_ring_emit_ib_gfx +ffffffff81e36be0 t gfx_v8_0_ring_emit_fence_gfx +ffffffff81e370d0 t gfx_v8_0_ring_emit_pipeline_sync +ffffffff81e373c0 t gfx_v8_0_ring_emit_vm_flush +ffffffff81e37770 t gfx_v8_0_ring_emit_hdp_flush +ffffffff81e37a90 t gfx_v8_0_ring_emit_gds_switch +ffffffff81e38240 t gfx_v8_0_ring_test_ib +ffffffff81e383f0 t gfx_v8_0_ring_emit_init_cond_exec +ffffffff81e38620 t gfx_v8_0_ring_emit_patch_cond_exec +ffffffff81e386d0 t gfx_v8_ring_emit_sb +ffffffff81e387c0 t gfx_v8_ring_emit_cntxcntl +ffffffff81e38d60 t gfx_v8_0_ring_soft_recovery +ffffffff81e38d90 t gfx_v8_0_emit_mem_sync +ffffffff81e38f90 t gfx_v8_0_ring_emit_ib_compute +ffffffff81e39290 t gfx_v8_0_ring_emit_fence_compute +ffffffff81e39590 t gfx_v8_0_emit_mem_sync_compute +ffffffff81e39850 t gfx_v8_0_emit_wave_limit +ffffffff81e39a00 t gfx_v8_0_set_eop_interrupt_state +ffffffff81e39c10 t gfx_v8_0_eop_irq +ffffffff81e39d20 t gfx_v8_0_set_priv_reg_fault_state +ffffffff81e39da0 t gfx_v8_0_priv_reg_irq +ffffffff81e39ea0 t gfx_v8_0_set_priv_inst_fault_state +ffffffff81e39f20 t gfx_v8_0_priv_inst_irq +ffffffff81e3a020 t gfx_v8_0_set_cp_ecc_int_state +ffffffff81e3a280 t gfx_v8_0_cp_ecc_error_irq +ffffffff81e3a2d0 t gfx_v8_0_set_sq_int_state +ffffffff81e3a360 t gfx_v8_0_sq_irq +ffffffff81e3a3d0 t gfx_v8_0_parse_sq_irq +ffffffff81e3a620 t gfx_v8_0_is_rlc_enabled +ffffffff81e3a660 t gfx_v8_0_set_safe_mode +ffffffff81e3a760 t gfx_v8_0_unset_safe_mode +ffffffff81e3a800 t gfx_v8_0_rlc_init +ffffffff81e3a8b0 t gfx_v8_0_get_csb_size +ffffffff81e3a8e0 t gfx_v8_0_get_csb_buffer +ffffffff81e3aa50 t gfx_v8_0_cp_jump_table_num +ffffffff81e3aa90 t gfx_v8_0_rlc_resume +ffffffff81e3ae10 t gfx_v8_0_rlc_stop +ffffffff81e3ae80 t gfx_v8_0_rlc_reset +ffffffff81e3af00 t gfx_v8_0_rlc_start +ffffffff81e3af80 t gfx_v8_0_update_spm_vmid +ffffffff81e3aff0 t gfx_v8_0_init_save_restore_list +ffffffff81e3b400 t gfx_v8_0_wait_for_rlc_serdes +ffffffff81e3b620 t gfx_v8_0_sq_irq_work_func +ffffffff81e3b640 t gfx_v8_0_init_microcode +ffffffff81e3beb0 t gfx_v8_0_mec_init +ffffffff81e3bfb0 t gfx_v8_0_compute_ring_init +ffffffff81e3c0e0 t gfx_v8_0_gpu_early_init +ffffffff81e3c580 t amdgpu_bo_unreserve +ffffffff81e3c660 t gfx_v8_0_kiq_resume +ffffffff81e3c910 t gfx_v8_0_cp_gfx_resume +ffffffff81e3d3d0 t gfx_v8_0_kcq_resume +ffffffff81e3dd90 t amdgpu_bo_reserve +ffffffff81e3df00 t gfx_v8_0_mqd_commit +ffffffff81e3e0e0 t gfx_v8_0_mqd_init +ffffffff81e3e500 t gfx_v8_0_deactivate_hqd +ffffffff81e3e5c0 t gfx_v8_0_update_medium_grain_clock_gating +ffffffff81e3e900 t gfx_v8_0_update_coarse_grain_clock_gating +ffffffff81e3f000 t gfx_v9_0_ras_error_inject +ffffffff81e3f1b0 t gfx_v9_0_query_ras_error_count +ffffffff81e3fd80 t gfx_v9_0_reset_ras_error_count +ffffffff81e407b0 T gfx_v9_0_select_se_sh +ffffffff81e40850 t gfx_v9_0_early_init +ffffffff81e41380 t gfx_v9_0_late_init +ffffffff81e42270 t gfx_v9_0_sw_init +ffffffff81e42920 t gfx_v9_0_sw_fini +ffffffff81e42ae0 t gfx_v9_0_hw_init +ffffffff81e45a90 t gfx_v9_0_hw_fini +ffffffff81e46240 t gfx_v9_0_suspend +ffffffff81e46280 t gfx_v9_0_resume +ffffffff81e46290 t gfx_v9_0_is_idle +ffffffff81e46310 t gfx_v9_0_wait_for_idle +ffffffff81e46400 t gfx_v9_0_soft_reset +ffffffff81e467a0 t gfx_v9_0_set_clockgating_state +ffffffff81e46870 t gfx_v9_0_set_powergating_state +ffffffff81e46c60 t gfx_v9_0_get_clockgating_state +ffffffff81e46d70 t gfx_v9_0_get_gpu_clock_counter +ffffffff81e47500 t gfx_v9_0_read_wave_data +ffffffff81e47740 t gfx_v9_0_read_wave_vgprs +ffffffff81e477a0 t gfx_v9_0_read_wave_sgprs +ffffffff81e477d0 t gfx_v9_0_select_me_pipe_q +ffffffff81e477f0 t wave_read_ind +ffffffff81e478e0 t wave_read_regs +ffffffff81e47a30 t gfx_v9_0_kiq_set_resources +ffffffff81e47d50 t gfx_v9_0_kiq_map_queues +ffffffff81e48090 t gfx_v9_0_kiq_unmap_queues +ffffffff81e483c0 t gfx_v9_0_kiq_query_status +ffffffff81e486b0 t gfx_v9_0_kiq_invalidate_tlbs +ffffffff81e487d0 t gfx_v9_0_ring_get_rptr_compute +ffffffff81e48800 t gfx_v9_0_ring_get_wptr_compute +ffffffff81e48870 t gfx_v9_0_ring_set_wptr_compute +ffffffff81e488d0 t gfx_v9_0_ring_emit_fence_kiq +ffffffff81e48d00 t gfx_v9_0_ring_test_ring +ffffffff81e48f30 t gfx_v9_0_ring_emit_rreg +ffffffff81e491c0 t gfx_v9_0_ring_emit_wreg +ffffffff81e493f0 t gfx_v9_0_ring_emit_reg_wait +ffffffff81e49440 t gfx_v9_0_ring_emit_reg_write_reg_wait +ffffffff81e494e0 t gfx_v9_0_wait_reg_mem +ffffffff81e49810 t gfx_v9_0_ring_get_rptr_gfx +ffffffff81e49840 t gfx_v9_0_ring_get_wptr_gfx +ffffffff81e49950 t gfx_v9_0_ring_set_wptr_gfx +ffffffff81e49a80 t gfx_v9_0_ring_emit_ib_gfx +ffffffff81e4a100 t gfx_v9_0_ring_emit_fence +ffffffff81e4a4c0 t gfx_v9_0_ring_emit_pipeline_sync +ffffffff81e4a520 t gfx_v9_0_ring_emit_vm_flush +ffffffff81e4a630 t gfx_v9_0_ring_emit_hdp_flush +ffffffff81e4a700 t gfx_v9_0_ring_emit_gds_switch +ffffffff81e4a7e0 t gfx_v9_0_ring_emit_init_cond_exec +ffffffff81e4aa10 t gfx_v9_0_ring_emit_patch_cond_exec +ffffffff81e4aad0 t gfx_v9_ring_emit_sb +ffffffff81e4abc0 t gfx_v9_ring_emit_cntxcntl +ffffffff81e4b0a0 t gfx_v9_0_ring_emit_frame_cntl +ffffffff81e4b1b0 t gfx_v9_0_ring_soft_recovery +ffffffff81e4b220 t gfx_v9_0_ring_preempt_ib +ffffffff81e4b3e0 t gfx_v9_0_emit_mem_sync +ffffffff81e4b6a0 t gfx_v9_0_write_data_to_reg +ffffffff81e4b8b0 t gfx_v9_0_ring_test_ib +ffffffff81e4ba60 t gfx_v9_0_ring_patch_cntl +ffffffff81e4baa0 t gfx_v9_0_ring_patch_ce_meta +ffffffff81e4bba0 t gfx_v9_0_ring_patch_de_meta +ffffffff81e4bc70 t gfx_v9_0_ring_emit_ib_compute +ffffffff81e4bfa0 t gfx_v9_0_emit_wave_limit +ffffffff81e4c180 t gfx_v9_0_set_eop_interrupt_state +ffffffff81e4c360 t gfx_v9_0_eop_irq +ffffffff81e4c4a0 t gfx_v9_0_set_compute_eop_interrupt_state +ffffffff81e4c660 t gfx_v9_0_set_priv_reg_fault_state +ffffffff81e4c7a0 t gfx_v9_0_priv_reg_irq +ffffffff81e4c8a0 t gfx_v9_0_set_priv_inst_fault_state +ffffffff81e4c9e0 t gfx_v9_0_priv_inst_irq +ffffffff81e4cae0 t gfx_v9_0_set_cp_ecc_error_state +ffffffff81e4d370 t gfx_v9_0_is_rlc_enabled +ffffffff81e4d400 t gfx_v9_0_set_safe_mode +ffffffff81e4d560 t gfx_v9_0_unset_safe_mode +ffffffff81e4d5d0 t gfx_v9_0_rlc_init +ffffffff81e4d640 t gfx_v9_0_get_csb_size +ffffffff81e4d670 t gfx_v9_0_get_csb_buffer +ffffffff81e4d7b0 t gfx_v9_0_cp_jump_table_num +ffffffff81e4d800 t gfx_v9_0_rlc_resume +ffffffff81e4ef10 t gfx_v9_0_rlc_stop +ffffffff81e4f2b0 t gfx_v9_0_rlc_reset +ffffffff81e4f450 t gfx_v9_0_rlc_start +ffffffff81e4f5a0 t gfx_v9_0_update_spm_vmid +ffffffff81e4f5e0 t gfx_v9_0_is_rlcg_access_range +ffffffff81e4f630 t gfx_v9_0_init_csb +ffffffff81e4f7c0 t gfx_v9_0_enable_lbpw +ffffffff81e4f8b0 t gfx_v9_0_update_spm_vmid_internal +ffffffff81e4f9d0 t gfx_v9_0_init_always_on_cu_mask +ffffffff81e4fc60 t gfx_v9_0_enable_gui_idle_interrupt +ffffffff81e4fd60 t gfx_v9_0_mec_init +ffffffff81e4ff40 t gfx_v9_0_compute_ring_init +ffffffff81e50080 t gfx_v9_0_gpu_early_init +ffffffff81e504c0 t amdgpu_bo_unreserve +ffffffff81e505a0 t gfx_v9_0_cp_gfx_enable +ffffffff81e50690 t amdgpu_bo_reserve +ffffffff81e50800 t gfx_v9_0_kiq_init_register +ffffffff81e514e0 t gfx_v9_0_mqd_init +ffffffff81e51a30 t gfx_v9_0_update_medium_grain_clock_gating +ffffffff81e51f60 t gfx_v9_0_update_3d_clock_gating +ffffffff81e52350 t gfx_v9_0_update_coarse_grain_clock_gating +ffffffff81e53000 t gfx_v9_4_query_ras_error_count +ffffffff81e53e00 t gfx_v9_4_query_ras_error_status +ffffffff81e53fd0 t gfx_v9_4_reset_ras_error_count +ffffffff81e55000 T gfx_v9_4_2_do_edc_gpr_workarounds +ffffffff81e55720 T gfx_v9_4_2_init_golden_registers +ffffffff81e557b0 T gfx_v9_4_2_debug_trap_config_init +ffffffff81e55890 T gfx_v9_4_2_set_power_brake_sequence +ffffffff81e55a70 t gfx_v9_4_2_query_ras_error_count +ffffffff81e55b20 t gfx_v9_4_2_query_ras_error_status +ffffffff81e56380 t gfx_v9_4_2_reset_ras_error_count +ffffffff81e563e0 t gfx_v9_4_2_reset_ras_error_status +ffffffff81e568b0 t gfx_v9_4_2_enable_watchdog_timer +ffffffff81e56ad0 t gfx_v9_4_2_query_uctl2_poison_status +ffffffff81e56b50 t gfx_v9_4_2_run_shader +ffffffff81e56f50 t gfx_v9_4_2_wait_for_waves_assigned +ffffffff81e575a0 t gfx_v9_4_2_query_sram_edc_count +ffffffff81e578e0 t gfx_v9_4_2_query_utc_edc_count +ffffffff81e57ac0 t wave_read_ind +ffffffff81e58000 t gfx_v9_4_3_xcp_suspend +ffffffff81e580a0 t gfx_v9_4_3_xcp_resume +ffffffff81e581e0 t gfx_v9_4_3_query_ras_error_count +ffffffff81e58200 t gfx_v9_4_3_query_ras_error_status +ffffffff81e58220 t gfx_v9_4_3_reset_ras_error_count +ffffffff81e58240 t gfx_v9_4_3_reset_ras_error_status +ffffffff81e58260 t gfx_v9_4_3_enable_watchdog_timer +ffffffff81e58280 t gfx_v9_4_3_early_init +ffffffff81e58940 t gfx_v9_4_3_late_init +ffffffff81e589c0 t gfx_v9_4_3_sw_init +ffffffff81e58e20 t gfx_v9_4_3_sw_fini +ffffffff81e58fd0 t gfx_v9_4_3_hw_init +ffffffff81e59a70 t gfx_v9_4_3_hw_fini +ffffffff81e59b30 t gfx_v9_4_3_suspend +ffffffff81e59bf0 t gfx_v9_4_3_resume +ffffffff81e59c00 t gfx_v9_4_3_is_idle +ffffffff81e59db0 t gfx_v9_4_3_wait_for_idle +ffffffff81e59e40 t gfx_v9_4_3_soft_reset +ffffffff81e5a550 t gfx_v9_4_3_set_clockgating_state +ffffffff81e5a6b0 t gfx_v9_4_3_set_powergating_state +ffffffff81e5a6e0 t gfx_v9_4_3_get_clockgating_state +ffffffff81e5a850 t gfx_v9_4_3_kiq_set_resources +ffffffff81e5ab70 t gfx_v9_4_3_kiq_map_queues +ffffffff81e5aed0 t gfx_v9_4_3_kiq_unmap_queues +ffffffff81e5b250 t gfx_v9_4_3_kiq_query_status +ffffffff81e5b540 t gfx_v9_4_3_kiq_invalidate_tlbs +ffffffff81e5b660 t gfx_v9_4_3_ring_get_rptr_compute +ffffffff81e5b6a0 t gfx_v9_4_3_ring_get_wptr_compute +ffffffff81e5b710 t gfx_v9_4_3_ring_set_wptr_compute +ffffffff81e5b770 t gfx_v9_4_3_ring_emit_fence_kiq +ffffffff81e5bbc0 t gfx_v9_4_3_ring_test_ring +ffffffff81e5be20 t gfx_v9_4_3_ring_emit_rreg +ffffffff81e5c0b0 t gfx_v9_4_3_ring_emit_wreg +ffffffff81e5c2e0 t gfx_v9_4_3_ring_emit_reg_wait +ffffffff81e5c330 t gfx_v9_4_3_ring_emit_reg_write_reg_wait +ffffffff81e5c350 t gfx_v9_4_3_wait_reg_mem +ffffffff81e5c680 t gfx_v9_4_3_ring_emit_ib_compute +ffffffff81e5c9b0 t gfx_v9_4_3_ring_emit_fence +ffffffff81e5cd60 t gfx_v9_4_3_ring_emit_pipeline_sync +ffffffff81e5cdc0 t gfx_v9_4_3_ring_emit_vm_flush +ffffffff81e5cde0 t gfx_v9_4_3_ring_emit_hdp_flush +ffffffff81e5ceb0 t gfx_v9_4_3_ring_emit_gds_switch +ffffffff81e5d050 t gfx_v9_4_3_ring_test_ib +ffffffff81e5d200 t gfx_v9_4_3_emit_mem_sync +ffffffff81e5d4c0 t gfx_v9_4_3_emit_wave_limit +ffffffff81e5d6b0 t gfx_v9_4_3_write_data_to_reg +ffffffff81e5d8c0 t gfx_v9_4_3_set_eop_interrupt_state +ffffffff81e5da30 t gfx_v9_4_3_eop_irq +ffffffff81e5dbd0 t gfx_v9_4_3_xcc_set_compute_eop_interrupt_state +ffffffff81e5dd30 t gfx_v9_4_3_ih_to_xcc_inst +ffffffff81e5de00 t gfx_v9_4_3_set_priv_reg_fault_state +ffffffff81e5e1e0 t gfx_v9_4_3_priv_reg_irq +ffffffff81e5e240 t gfx_v9_4_3_fault +ffffffff81e5e3c0 t gfx_v9_4_3_set_priv_inst_fault_state +ffffffff81e5e7a0 t gfx_v9_4_3_priv_inst_irq +ffffffff81e5e800 t gfx_v9_4_3_is_rlc_enabled +ffffffff81e5e920 t gfx_v9_4_3_xcc_set_safe_mode +ffffffff81e5ebc0 t gfx_v9_4_3_xcc_unset_safe_mode +ffffffff81e5ece0 t gfx_v9_4_3_rlc_init +ffffffff81e5ed30 t gfx_v9_4_3_rlc_resume +ffffffff81e5edf0 t gfx_v9_4_3_rlc_stop +ffffffff81e5ee90 t gfx_v9_4_3_rlc_reset +ffffffff81e5f520 t gfx_v9_4_3_rlc_start +ffffffff81e5f5c0 t gfx_v9_4_3_update_spm_vmid +ffffffff81e5f7d0 t gfx_v9_4_3_is_rlcg_access_range +ffffffff81e5f880 t gfx_v9_4_3_xcc_rlc_resume +ffffffff81e600d0 t gfx_v9_4_3_xcc_rlc_stop +ffffffff81e607f0 t gfx_v9_4_3_xcc_rlc_start +ffffffff81e60b80 t gfx_v9_4_3_xcc_enable_gui_idle_interrupt +ffffffff81e60da0 t gfx_v9_4_3_xcc_select_se_sh +ffffffff81e60fa0 t gfx_v9_4_3_mec_init +ffffffff81e61290 t gfx_v9_4_3_gpu_early_init +ffffffff81e614c0 t amdgpu_bo_unreserve +ffffffff81e615a0 t gfx_v9_4_3_get_gpu_clock_counter +ffffffff81e618e0 t gfx_v9_4_3_read_wave_data +ffffffff81e61bb0 t gfx_v9_4_3_read_wave_vgprs +ffffffff81e61bd0 t gfx_v9_4_3_read_wave_sgprs +ffffffff81e61c20 t gfx_v9_4_3_select_me_pipe_q +ffffffff81e61c90 t gfx_v9_4_3_switch_compute_partition +ffffffff81e61ff0 t wave_read_ind +ffffffff81e621f0 t wave_read_regs +ffffffff81e62480 t gfx_v9_4_3_xcc_constants_init +ffffffff81e63500 t gfx_v9_4_3_xcc_cp_resume +ffffffff81e644b0 t gfx_v9_4_3_xcc_cp_compute_enable +ffffffff81e64650 t amdgpu_bo_reserve +ffffffff81e647c0 t gfx_v9_4_3_xcc_kiq_init_register +ffffffff81e66400 t gfx_v9_4_3_xcc_mqd_init +ffffffff81e66e40 t gfx_v9_4_3_xcc_fini +ffffffff81e673e0 t gfx_v9_4_3_xcc_q_fini_register +ffffffff81e67d90 t gfx_v9_4_3_xcc_update_sram_fgcg +ffffffff81e68000 t gfx_v9_4_3_xcc_update_repeater_fgcg +ffffffff81e68270 t gfx_v9_4_3_xcc_update_medium_grain_clock_gating +ffffffff81e68dc0 t gfx_v9_4_3_xcc_update_coarse_grain_clock_gating +ffffffff81e69620 t gfx_v9_4_3_inst_query_ras_err_count +ffffffff81e69880 t gfx_v9_4_3_inst_query_ras_err_status +ffffffff81e6a600 t gfx_v9_4_3_inst_reset_ras_err_count +ffffffff81e6a7c0 t gfx_v9_4_3_inst_reset_ras_err_status +ffffffff81e6af40 t gfx_v9_4_3_inst_enable_watchdog_timer +ffffffff81e6c000 t gfxhub_v1_0_get_mc_fb_offset +ffffffff81e6c090 t gfxhub_v1_0_setup_vm_pt_regs +ffffffff81e6c1d0 t gfxhub_v1_0_gart_enable +ffffffff81e6d700 t gfxhub_v1_0_gart_disable +ffffffff81e6d9a0 t gfxhub_v1_0_set_fault_enable_default +ffffffff81e6daa0 t gfxhub_v1_0_init +ffffffff81e6e000 T gfxhub_v1_1_get_xgmi_info +ffffffff81e6f000 t gfxhub_v1_2_get_mc_fb_offset +ffffffff81e6f120 t gfxhub_v1_2_setup_vm_pt_regs +ffffffff81e6f190 t gfxhub_v1_2_gart_enable +ffffffff81e6f220 t gfxhub_v1_2_gart_disable +ffffffff81e6f280 t gfxhub_v1_2_set_fault_enable_default +ffffffff81e6f2f0 t gfxhub_v1_2_init +ffffffff81e6f5f0 t gfxhub_v1_2_get_xgmi_info +ffffffff81e6f860 t gfxhub_v1_2_xcp_suspend +ffffffff81e6f8a0 t gfxhub_v1_2_xcp_resume +ffffffff81e6f910 t gfxhub_v1_2_xcc_setup_vm_pt_regs +ffffffff81e6fc30 t gfxhub_v1_2_xcc_gart_enable +ffffffff81e73070 t gfxhub_v1_2_xcc_gart_disable +ffffffff81e736e0 t gfxhub_v1_2_xcc_set_fault_enable_default +ffffffff81e74000 t gfxhub_v2_0_get_fb_location +ffffffff81e74090 t gfxhub_v2_0_get_mc_fb_offset +ffffffff81e74120 t gfxhub_v2_0_setup_vm_pt_regs +ffffffff81e74260 t gfxhub_v2_0_gart_enable +ffffffff81e75490 t gfxhub_v2_0_gart_disable +ffffffff81e756e0 t gfxhub_v2_0_set_fault_enable_default +ffffffff81e757e0 t gfxhub_v2_0_init +ffffffff81e758b0 t gfxhub_v2_0_print_l2_protection_fault_status +ffffffff81e75a80 t gfxhub_v2_0_get_invalidate_req +ffffffff81e76000 t gfxhub_v2_1_get_fb_location +ffffffff81e76090 t gfxhub_v2_1_get_mc_fb_offset +ffffffff81e76120 t gfxhub_v2_1_setup_vm_pt_regs +ffffffff81e76260 t gfxhub_v2_1_gart_enable +ffffffff81e77560 t gfxhub_v2_1_gart_disable +ffffffff81e777b0 t gfxhub_v2_1_set_fault_enable_default +ffffffff81e778d0 t gfxhub_v2_1_init +ffffffff81e779a0 t gfxhub_v2_1_get_xgmi_info +ffffffff81e77ae0 t gfxhub_v2_1_utcl2_harvest +ffffffff81e77cc0 t gfxhub_v2_1_save_regs +ffffffff81e78730 t gfxhub_v2_1_restore_regs +ffffffff81e79350 t gfxhub_v2_1_halt +ffffffff81e79720 t gfxhub_v2_1_print_l2_protection_fault_status +ffffffff81e798f0 t gfxhub_v2_1_get_invalidate_req +ffffffff81e7a000 t gfxhub_v3_0_get_fb_location +ffffffff81e7a090 t gfxhub_v3_0_get_mc_fb_offset +ffffffff81e7a120 t gfxhub_v3_0_setup_vm_pt_regs +ffffffff81e7a260 t gfxhub_v3_0_gart_enable +ffffffff81e7b560 t gfxhub_v3_0_gart_disable +ffffffff81e7b800 t gfxhub_v3_0_set_fault_enable_default +ffffffff81e7b9d0 t gfxhub_v3_0_init +ffffffff81e7baa0 t gfxhub_v3_0_print_l2_protection_fault_status +ffffffff81e7bc70 t gfxhub_v3_0_get_invalidate_req +ffffffff81e7c000 t gfxhub_v3_0_3_get_fb_location +ffffffff81e7c090 t gfxhub_v3_0_3_get_mc_fb_offset +ffffffff81e7c120 t gfxhub_v3_0_3_setup_vm_pt_regs +ffffffff81e7c260 t gfxhub_v3_0_3_gart_enable +ffffffff81e7d450 t gfxhub_v3_0_3_gart_disable +ffffffff81e7d6f0 t gfxhub_v3_0_3_set_fault_enable_default +ffffffff81e7d810 t gfxhub_v3_0_3_init +ffffffff81e7d8e0 t gfxhub_v3_0_3_print_l2_protection_fault_status +ffffffff81e7dab0 t gfxhub_v3_0_3_get_invalidate_req +ffffffff81e7e000 t gmc_v10_0_early_init +ffffffff81e7e170 t gmc_v10_0_late_init +ffffffff81e7e1e0 t gmc_v10_0_sw_init +ffffffff81e7e5d0 t gmc_v10_0_sw_fini +ffffffff81e7e620 t gmc_v10_0_hw_init +ffffffff81e7e830 t gmc_v10_0_hw_fini +ffffffff81e7e8d0 t gmc_v10_0_suspend +ffffffff81e7e970 t gmc_v10_0_resume +ffffffff81e7e9d0 t gmc_v10_0_is_idle +ffffffff81e7ea00 t gmc_v10_0_wait_for_idle +ffffffff81e7ea30 t gmc_v10_0_soft_reset +ffffffff81e7ea60 t gmc_v10_0_set_clockgating_state +ffffffff81e7eb10 t gmc_v10_0_set_powergating_state +ffffffff81e7eb40 t gmc_v10_0_get_clockgating_state +ffffffff81e7ebe0 t gmc_v10_0_flush_gpu_tlb +ffffffff81e7ee70 t gmc_v10_0_flush_gpu_tlb_pasid +ffffffff81e7f120 t gmc_v10_0_emit_flush_gpu_tlb +ffffffff81e7f2d0 t gmc_v10_0_emit_pasid_mapping +ffffffff81e7f350 t gmc_v10_0_map_mtype +ffffffff81e7f3a0 t gmc_v10_0_get_vm_pde +ffffffff81e7f490 t gmc_v10_0_get_vm_pte +ffffffff81e7f570 t gmc_v10_0_get_vbios_fb_size +ffffffff81e7f6e0 t gmc_v10_0_flush_vm_hub +ffffffff81e7fb10 t gmc_v10_0_vm_fault_interrupt_state +ffffffff81e7fbb0 t gmc_v10_0_process_interrupt +ffffffff81e7fe90 t gmc_v10_0_ecc_interrupt_state +ffffffff81e7fec0 t gmc_v10_0_gart_init +ffffffff81e80000 t gmc_v11_0_early_init +ffffffff81e801f0 t gmc_v11_0_late_init +ffffffff81e80260 t gmc_v11_0_sw_init +ffffffff81e80570 t gmc_v11_0_sw_fini +ffffffff81e805c0 t gmc_v11_0_hw_init +ffffffff81e80720 t gmc_v11_0_hw_fini +ffffffff81e807a0 t gmc_v11_0_suspend +ffffffff81e80820 t gmc_v11_0_resume +ffffffff81e80880 t gmc_v11_0_is_idle +ffffffff81e808b0 t gmc_v11_0_wait_for_idle +ffffffff81e808e0 t gmc_v11_0_soft_reset +ffffffff81e80910 t gmc_v11_0_set_clockgating_state +ffffffff81e80990 t gmc_v11_0_set_powergating_state +ffffffff81e809c0 t gmc_v11_0_get_clockgating_state +ffffffff81e80a00 t gmc_v11_0_flush_gpu_tlb +ffffffff81e80eb0 t gmc_v11_0_flush_gpu_tlb_pasid +ffffffff81e81120 t gmc_v11_0_emit_flush_gpu_tlb +ffffffff81e812d0 t gmc_v11_0_emit_pasid_mapping +ffffffff81e81350 t gmc_v11_0_map_mtype +ffffffff81e813a0 t gmc_v11_0_get_vm_pde +ffffffff81e814a0 t gmc_v11_0_get_vm_pte +ffffffff81e81580 t gmc_v11_0_get_vbios_fb_size +ffffffff81e816f0 t gmc_v11_0_vm_fault_interrupt_state +ffffffff81e81790 t gmc_v11_0_process_interrupt +ffffffff81e819c0 t gmc_v11_0_ecc_interrupt_state +ffffffff81e819f0 t gmc_v11_0_gart_init +ffffffff81e82000 t gmc_v7_0_early_init +ffffffff81e820a0 t gmc_v7_0_late_init +ffffffff81e820f0 t gmc_v7_0_sw_init +ffffffff81e82520 t gmc_v7_0_sw_fini +ffffffff81e825a0 t gmc_v7_0_hw_init +ffffffff81e82f10 t gmc_v7_0_hw_fini +ffffffff81e82fd0 t gmc_v7_0_suspend +ffffffff81e83010 t gmc_v7_0_resume +ffffffff81e83070 t gmc_v7_0_is_idle +ffffffff81e830c0 t gmc_v7_0_wait_for_idle +ffffffff81e83160 t gmc_v7_0_soft_reset +ffffffff81e833c0 t gmc_v7_0_set_clockgating_state +ffffffff81e83620 t gmc_v7_0_set_powergating_state +ffffffff81e83650 t gmc_v7_0_flush_gpu_tlb +ffffffff81e83680 t gmc_v7_0_flush_gpu_tlb_pasid +ffffffff81e83740 t gmc_v7_0_emit_flush_gpu_tlb +ffffffff81e837e0 t gmc_v7_0_emit_pasid_mapping +ffffffff81e83810 t gmc_v7_0_set_prt +ffffffff81e839d0 t gmc_v7_0_get_vm_pde +ffffffff81e83a30 t gmc_v7_0_get_vm_pte +ffffffff81e83a70 t gmc_v7_0_get_vbios_fb_size +ffffffff81e83ae0 t gmc_v7_0_vm_fault_interrupt_state +ffffffff81e83bb0 t gmc_v7_0_process_interrupt +ffffffff81e83e50 t gmc_v7_0_gart_init +ffffffff81e84000 t gmc_v8_0_early_init +ffffffff81e840a0 t gmc_v8_0_late_init +ffffffff81e840f0 t gmc_v8_0_sw_init +ffffffff81e846a0 t gmc_v8_0_sw_fini +ffffffff81e84720 t gmc_v8_0_hw_init +ffffffff81e85390 t gmc_v8_0_hw_fini +ffffffff81e85450 t gmc_v8_0_suspend +ffffffff81e85490 t gmc_v8_0_resume +ffffffff81e854f0 t gmc_v8_0_is_idle +ffffffff81e85540 t gmc_v8_0_wait_for_idle +ffffffff81e855e0 t gmc_v8_0_check_soft_reset +ffffffff81e85650 t gmc_v8_0_pre_soft_reset +ffffffff81e857c0 t gmc_v8_0_soft_reset +ffffffff81e85890 t gmc_v8_0_post_soft_reset +ffffffff81e85900 t gmc_v8_0_set_clockgating_state +ffffffff81e85ec0 t gmc_v8_0_set_powergating_state +ffffffff81e85ef0 t gmc_v8_0_get_clockgating_state +ffffffff81e85f60 t gmc_v8_0_flush_gpu_tlb +ffffffff81e85f90 t gmc_v8_0_flush_gpu_tlb_pasid +ffffffff81e86050 t gmc_v8_0_emit_flush_gpu_tlb +ffffffff81e860f0 t gmc_v8_0_emit_pasid_mapping +ffffffff81e86120 t gmc_v8_0_set_prt +ffffffff81e862e0 t gmc_v8_0_get_vm_pde +ffffffff81e86340 t gmc_v8_0_get_vm_pte +ffffffff81e86390 t gmc_v8_0_get_vbios_fb_size +ffffffff81e86400 t gmc_v8_0_vm_fault_interrupt_state +ffffffff81e864d0 t gmc_v8_0_process_interrupt +ffffffff81e86860 t gmc_v8_0_gart_init +ffffffff81e87000 T gmc_v9_0_restore_registers +ffffffff81e87160 t gmc_v9_0_early_init +ffffffff81e87510 t gmc_v9_0_late_init +ffffffff81e87620 t gmc_v9_0_sw_init +ffffffff81e87d80 t gmc_v9_0_sw_fini +ffffffff81e87e40 t gmc_v9_0_hw_init +ffffffff81e882f0 t gmc_v9_0_hw_fini +ffffffff81e883b0 t gmc_v9_0_suspend +ffffffff81e88470 t gmc_v9_0_resume +ffffffff81e884d0 t gmc_v9_0_is_idle +ffffffff81e88500 t gmc_v9_0_wait_for_idle +ffffffff81e88530 t gmc_v9_0_soft_reset +ffffffff81e88560 t gmc_v9_0_set_clockgating_state +ffffffff81e885c0 t gmc_v9_0_set_powergating_state +ffffffff81e885f0 t gmc_v9_0_get_clockgating_state +ffffffff81e88630 t gmc_v9_0_flush_gpu_tlb +ffffffff81e88cd0 t gmc_v9_0_flush_gpu_tlb_pasid +ffffffff81e89080 t gmc_v9_0_emit_flush_gpu_tlb +ffffffff81e89280 t gmc_v9_0_emit_pasid_mapping +ffffffff81e89300 t gmc_v9_0_map_mtype +ffffffff81e89340 t gmc_v9_0_get_vm_pde +ffffffff81e89440 t gmc_v9_0_get_vm_pte +ffffffff81e89770 t gmc_v9_0_override_vm_pte_flags +ffffffff81e89830 t gmc_v9_0_get_vbios_fb_size +ffffffff81e899d0 t gmc_v9_0_query_memory_partition +ffffffff81e89a30 t gmc_v9_0_vm_fault_interrupt_state +ffffffff81e89ed0 t gmc_v9_0_process_interrupt +ffffffff81e8a6d0 t gmc_v9_0_ecc_interrupt_state +ffffffff81e8a830 t gmc_v9_0_init_mem_ranges +ffffffff81e8ac50 t gmc_v9_0_gart_init +ffffffff81e8ad80 t gmc_v9_0_save_registers +ffffffff81e8b000 t hdp_v4_0_query_ras_error_count +ffffffff81e8b0c0 t hdp_v4_0_reset_ras_error_count +ffffffff81e8b1e0 t hdp_v4_0_flush_hdp +ffffffff81e8b230 t hdp_v4_0_invalidate_hdp +ffffffff81e8b310 t hdp_v4_0_update_clock_gating +ffffffff81e8b410 t hdp_v4_0_get_clockgating_state +ffffffff81e8b460 t hdp_v4_0_init_registers +ffffffff81e8c000 t hdp_v5_0_flush_hdp +ffffffff81e8c050 t hdp_v5_0_invalidate_hdp +ffffffff81e8c0f0 t hdp_v5_0_update_clock_gating +ffffffff81e8c4f0 t hdp_v5_0_get_clockgating_state +ffffffff81e8c610 t hdp_v5_0_init_registers +ffffffff81e8d000 t hdp_v5_2_flush_hdp +ffffffff81e8d050 t hdp_v5_2_update_clock_gating +ffffffff81e8d460 t hdp_v5_2_get_clockgating_state +ffffffff81e8e000 t hdp_v6_0_flush_hdp +ffffffff81e8e050 t hdp_v6_0_update_clock_gating +ffffffff81e8e380 t hdp_v6_0_get_clockgating_state +ffffffff81e8f000 t iceland_ih_early_init +ffffffff81e8f050 t iceland_ih_sw_init +ffffffff81e8f0b0 t iceland_ih_sw_fini +ffffffff81e8f0f0 t iceland_ih_hw_init +ffffffff81e8f310 t iceland_ih_hw_fini +ffffffff81e8f3e0 t iceland_ih_suspend +ffffffff81e8f4b0 t iceland_ih_resume +ffffffff81e8f4f0 t iceland_ih_is_idle +ffffffff81e8f540 t iceland_ih_wait_for_idle +ffffffff81e8f5e0 t iceland_ih_soft_reset +ffffffff81e8f6c0 t iceland_ih_set_clockgating_state +ffffffff81e8f6f0 t iceland_ih_set_powergating_state +ffffffff81e8f720 t iceland_ih_get_wptr +ffffffff81e8f810 t iceland_ih_decode_iv +ffffffff81e8f890 t iceland_ih_set_rptr +ffffffff81e90000 t ih_v6_0_early_init +ffffffff81e90050 t ih_v6_0_sw_init +ffffffff81e901b0 t ih_v6_0_sw_fini +ffffffff81e901f0 t ih_v6_0_hw_init +ffffffff81e907a0 t ih_v6_0_hw_fini +ffffffff81e90800 t ih_v6_0_suspend +ffffffff81e90860 t ih_v6_0_resume +ffffffff81e90870 t ih_v6_0_is_idle +ffffffff81e908a0 t ih_v6_0_wait_for_idle +ffffffff81e908d0 t ih_v6_0_soft_reset +ffffffff81e90900 t ih_v6_0_set_clockgating_state +ffffffff81e90a30 t ih_v6_0_set_powergating_state +ffffffff81e90bb0 t ih_v6_0_get_clockgating_state +ffffffff81e90c40 t ih_v6_0_get_wptr +ffffffff81e90d30 t ih_v6_0_set_rptr +ffffffff81e90e00 t ih_v6_0_self_irq +ffffffff81e90e70 t ih_v6_0_toggle_interrupts +ffffffff81e91050 t force_update_wptr_for_self_int +ffffffff81e92000 t ih_v6_1_early_init +ffffffff81e92050 t ih_v6_1_sw_init +ffffffff81e921b0 t ih_v6_1_sw_fini +ffffffff81e921f0 t ih_v6_1_hw_init +ffffffff81e927a0 t ih_v6_1_hw_fini +ffffffff81e92800 t ih_v6_1_suspend +ffffffff81e92860 t ih_v6_1_resume +ffffffff81e92870 t ih_v6_1_is_idle +ffffffff81e928a0 t ih_v6_1_wait_for_idle +ffffffff81e928d0 t ih_v6_1_soft_reset +ffffffff81e92900 t ih_v6_1_set_clockgating_state +ffffffff81e92a30 t ih_v6_1_set_powergating_state +ffffffff81e92bb0 t ih_v6_1_get_clockgating_state +ffffffff81e92c40 t ih_v6_1_get_wptr +ffffffff81e92d30 t ih_v6_1_set_rptr +ffffffff81e92e00 t ih_v6_1_self_irq +ffffffff81e92e70 t ih_v6_1_toggle_interrupts +ffffffff81e93050 t force_update_wptr_for_self_int +ffffffff81e94000 t imu_v11_0_init_microcode +ffffffff81e94170 t imu_v11_0_load_microcode +ffffffff81e944f0 t imu_v11_0_setup +ffffffff81e94780 t imu_v11_0_start +ffffffff81e94880 t imu_v11_0_program_rlc_ram +ffffffff81e94a40 t imu_v11_0_wait_for_reset_status +ffffffff81e94b90 t program_imu_rlc_ram +ffffffff81e95000 T imu_v11_0_3_program_rlc_ram +ffffffff81e96000 T jpeg_v1_0_early_init +ffffffff81e96080 T jpeg_v1_0_sw_init +ffffffff81e96170 T jpeg_v1_0_sw_fini +ffffffff81e96190 T jpeg_v1_0_start +ffffffff81e96c40 t jpeg_v1_0_decode_ring_get_rptr +ffffffff81e96cd0 t jpeg_v1_0_decode_ring_get_wptr +ffffffff81e96d60 t jpeg_v1_0_decode_ring_set_wptr +ffffffff81e96dd0 t jpeg_v1_0_decode_ring_emit_ib +ffffffff81e976f0 t jpeg_v1_0_decode_ring_emit_fence +ffffffff81e98030 t jpeg_v1_0_decode_ring_emit_vm_flush +ffffffff81e980a0 t jpeg_v1_0_decode_ring_nop +ffffffff81e98200 t jpeg_v1_0_decode_ring_insert_start +ffffffff81e983c0 t jpeg_v1_0_decode_ring_insert_end +ffffffff81e98580 t jpeg_v1_0_ring_begin_use +ffffffff81e98680 t jpeg_v1_0_decode_ring_emit_wreg +ffffffff81e988e0 t jpeg_v1_0_decode_ring_emit_reg_wait +ffffffff81e98d00 t jpeg_v1_0_set_interrupt_state +ffffffff81e98d30 t jpeg_v1_0_process_interrupt +ffffffff81e99000 T jpeg_v2_0_dec_ring_insert_start +ffffffff81e991a0 T jpeg_v2_0_dec_ring_insert_end +ffffffff81e99340 T jpeg_v2_0_dec_ring_emit_fence +ffffffff81e99a20 T jpeg_v2_0_dec_ring_emit_ib +ffffffff81e9a1d0 T jpeg_v2_0_dec_ring_emit_reg_wait +ffffffff81e9a580 T jpeg_v2_0_dec_ring_emit_vm_flush +ffffffff81e9a5f0 T jpeg_v2_0_dec_ring_emit_wreg +ffffffff81e9a830 T jpeg_v2_0_dec_ring_nop +ffffffff81e9a990 t jpeg_v2_0_early_init +ffffffff81e9aa20 t jpeg_v2_0_sw_init +ffffffff81e9ab50 t jpeg_v2_0_sw_fini +ffffffff81e9aba0 t jpeg_v2_0_hw_init +ffffffff81e9ac20 t jpeg_v2_0_hw_fini +ffffffff81e9ad00 t jpeg_v2_0_suspend +ffffffff81e9ad30 t jpeg_v2_0_resume +ffffffff81e9adc0 t jpeg_v2_0_is_idle +ffffffff81e9ae50 t jpeg_v2_0_wait_for_idle +ffffffff81e9ae90 t jpeg_v2_0_set_clockgating_state +ffffffff81e9af40 t jpeg_v2_0_set_powergating_state +ffffffff81e9b660 t jpeg_v2_0_dec_ring_get_rptr +ffffffff81e9b6f0 t jpeg_v2_0_dec_ring_get_wptr +ffffffff81e9b790 t jpeg_v2_0_dec_ring_set_wptr +ffffffff81e9b830 t jpeg_v2_0_set_interrupt_state +ffffffff81e9b860 t jpeg_v2_0_process_interrupt +ffffffff81e9b8f0 t jpeg_v2_0_enable_clock_gating +ffffffff81e9baa0 t jpeg_v2_0_disable_clock_gating +ffffffff81e9c000 t jpeg_v2_6_query_ras_poison_status +ffffffff81e9c150 t jpeg_v2_5_early_init +ffffffff81e9c350 t jpeg_v2_5_sw_init +ffffffff81e9c5f0 t jpeg_v2_5_sw_fini +ffffffff81e9c640 t jpeg_v2_5_hw_init +ffffffff81e9c730 t jpeg_v2_5_hw_fini +ffffffff81e9c8b0 t jpeg_v2_5_suspend +ffffffff81e9c8e0 t jpeg_v2_5_resume +ffffffff81e9c9e0 t jpeg_v2_5_is_idle +ffffffff81e9cae0 t jpeg_v2_5_wait_for_idle +ffffffff81e9cb90 t jpeg_v2_5_set_clockgating_state +ffffffff81e9cc40 t jpeg_v2_5_set_powergating_state +ffffffff81e9d370 t jpeg_v2_5_dec_ring_get_rptr +ffffffff81e9d410 t jpeg_v2_5_dec_ring_get_wptr +ffffffff81e9d4c0 t jpeg_v2_5_dec_ring_set_wptr +ffffffff81e9d570 t jpeg_v2_6_dec_ring_insert_start +ffffffff81e9d730 t jpeg_v2_6_dec_ring_insert_end +ffffffff81e9d8f0 t jpeg_v2_5_set_interrupt_state +ffffffff81e9d920 t jpeg_v2_5_process_interrupt +ffffffff81e9d9e0 t jpeg_v2_6_set_ras_interrupt_state +ffffffff81e9da10 t jpeg_v2_5_enable_clock_gating +ffffffff81e9daf0 t jpeg_v2_5_disable_clock_gating +ffffffff81e9e000 t jpeg_v3_0_early_init +ffffffff81e9e110 t jpeg_v3_0_sw_init +ffffffff81e9e240 t jpeg_v3_0_sw_fini +ffffffff81e9e290 t jpeg_v3_0_hw_init +ffffffff81e9e310 t jpeg_v3_0_hw_fini +ffffffff81e9e3f0 t jpeg_v3_0_suspend +ffffffff81e9e420 t jpeg_v3_0_resume +ffffffff81e9e4b0 t jpeg_v3_0_is_idle +ffffffff81e9e540 t jpeg_v3_0_wait_for_idle +ffffffff81e9e580 t jpeg_v3_0_set_clockgating_state +ffffffff81e9e630 t jpeg_v3_0_set_powergating_state +ffffffff81e9ee10 t jpeg_v3_0_dec_ring_get_rptr +ffffffff81e9eea0 t jpeg_v3_0_dec_ring_get_wptr +ffffffff81e9ef40 t jpeg_v3_0_dec_ring_set_wptr +ffffffff81e9efe0 t jpeg_v3_0_set_interrupt_state +ffffffff81e9f010 t jpeg_v3_0_process_interrupt +ffffffff81e9f0a0 t jpeg_v3_0_enable_clock_gating +ffffffff81e9f170 t jpeg_v3_0_disable_clock_gating +ffffffff81ea0000 t jpeg_v4_0_query_ras_poison_status +ffffffff81ea0150 t jpeg_v4_0_early_init +ffffffff81ea0220 t jpeg_v4_0_sw_init +ffffffff81ea03c0 t jpeg_v4_0_sw_fini +ffffffff81ea0410 t jpeg_v4_0_hw_init +ffffffff81ea0a40 t jpeg_v4_0_hw_fini +ffffffff81ea0b10 t jpeg_v4_0_suspend +ffffffff81ea0b40 t jpeg_v4_0_resume +ffffffff81ea0b90 t jpeg_v4_0_is_idle +ffffffff81ea0c20 t jpeg_v4_0_wait_for_idle +ffffffff81ea0c60 t jpeg_v4_0_set_clockgating_state +ffffffff81ea0d10 t jpeg_v4_0_set_powergating_state +ffffffff81ea1470 t jpeg_v4_0_dec_ring_get_rptr +ffffffff81ea1500 t jpeg_v4_0_dec_ring_get_wptr +ffffffff81ea15a0 t jpeg_v4_0_dec_ring_set_wptr +ffffffff81ea1640 t jpeg_v4_0_set_interrupt_state +ffffffff81ea1670 t jpeg_v4_0_process_interrupt +ffffffff81ea1710 t jpeg_v4_0_set_ras_interrupt_state +ffffffff81ea1740 t jpeg_v4_0_enable_clock_gating +ffffffff81ea1900 t jpeg_v4_0_disable_clock_gating +ffffffff81ea2000 t jpeg_v4_0_3_early_init +ffffffff81ea2170 t jpeg_v4_0_3_sw_init +ffffffff81ea24a0 t jpeg_v4_0_3_sw_fini +ffffffff81ea24f0 t jpeg_v4_0_3_hw_init +ffffffff81ea2f50 t jpeg_v4_0_3_hw_fini +ffffffff81ea2fe0 t jpeg_v4_0_3_suspend +ffffffff81ea3060 t jpeg_v4_0_3_resume +ffffffff81ea30b0 t jpeg_v4_0_3_is_idle +ffffffff81ea3290 t jpeg_v4_0_3_wait_for_idle +ffffffff81ea33e0 t jpeg_v4_0_3_set_clockgating_state +ffffffff81ea3470 t jpeg_v4_0_3_set_powergating_state +ffffffff81ea40d0 t jpeg_v4_0_3_dec_ring_get_rptr +ffffffff81ea4240 t jpeg_v4_0_3_dec_ring_get_wptr +ffffffff81ea43d0 t jpeg_v4_0_3_dec_ring_set_wptr +ffffffff81ea4570 t jpeg_v4_0_3_dec_ring_emit_ib +ffffffff81ea4dd0 t jpeg_v4_0_3_dec_ring_emit_fence +ffffffff81ea5560 t jpeg_v4_0_3_dec_ring_emit_vm_flush +ffffffff81ea55d0 t jpeg_v4_0_3_dec_ring_nop +ffffffff81ea5730 t jpeg_v4_0_3_dec_ring_insert_start +ffffffff81ea58d0 t jpeg_v4_0_3_dec_ring_insert_end +ffffffff81ea5a70 t jpeg_v4_0_3_dec_ring_emit_wreg +ffffffff81ea5cb0 t jpeg_v4_0_3_dec_ring_emit_reg_wait +ffffffff81ea6060 t jpeg_v4_0_3_set_interrupt_state +ffffffff81ea6090 t jpeg_v4_0_3_process_interrupt +ffffffff81ea62d0 t jpeg_v4_0_3_query_ras_error_count +ffffffff81ea63c0 t jpeg_v4_0_3_reset_ras_error_count +ffffffff81ea64b0 t jpeg_v4_0_3_disable_clock_gating +ffffffff81ea7000 t lsdma_v6_0_copy_mem +ffffffff81ea7370 t lsdma_v6_0_fill_mem +ffffffff81ea7660 t lsdma_v6_0_update_memory_power_gating +ffffffff81ea8000 t mca_v3_0_ras_block_match +ffffffff81ea8050 t mca_v3_0_mp0_query_ras_error_count +ffffffff81ea8070 t mca_v3_0_mp1_query_ras_error_count +ffffffff81ea8090 t mca_v3_0_mpio_query_ras_error_count +ffffffff81ea9000 t mes_v10_0_early_init +ffffffff81ea9060 t mes_v10_0_late_init +ffffffff81ea90b0 t mes_v10_1_sw_init +ffffffff81ea9550 t mes_v10_1_sw_fini +ffffffff81ea9670 t mes_v10_1_hw_init +ffffffff81ea9f60 t mes_v10_1_hw_fini +ffffffff81eaa050 t mes_v10_1_suspend +ffffffff81eaa160 t mes_v10_1_resume +ffffffff81eaa1b0 t mes_v10_1_kiq_hw_init +ffffffff81eaa5c0 t mes_v10_1_add_hw_queue +ffffffff81eaa740 t mes_v10_1_remove_hw_queue +ffffffff81eaa7d0 t mes_v10_1_unmap_legacy_queue +ffffffff81eaa8c0 t mes_v10_1_suspend_gang +ffffffff81eaa8f0 t mes_v10_1_resume_gang +ffffffff81eaa920 t mes_v10_1_submit_pkt_and_poll_completion +ffffffff81eaab20 t mes_v10_1_load_microcode +ffffffff81eab340 t mes_v10_1_enable +ffffffff81eab7c0 t mes_v10_1_queue_init +ffffffff81eaba60 t amdgpu_bo_unreserve +ffffffff81eabb40 t mes_v10_1_ring_get_rptr +ffffffff81eabb70 t mes_v10_1_ring_get_wptr +ffffffff81eabbe0 t mes_v10_1_ring_set_wptr +ffffffff81eac000 t mes_v11_0_early_init +ffffffff81eac060 t mes_v11_0_late_init +ffffffff81eac0d0 t mes_v11_0_sw_init +ffffffff81eac570 t mes_v11_0_sw_fini +ffffffff81eac730 t mes_v11_0_hw_init +ffffffff81eacf60 t mes_v11_0_hw_fini +ffffffff81eacf90 t mes_v11_0_suspend +ffffffff81eacfa0 t mes_v11_0_resume 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mmhub_v1_0_gart_enable +ffffffff81eb1720 t mmhub_v1_0_set_fault_enable_default +ffffffff81eb1840 t mmhub_v1_0_gart_disable +ffffffff81eb1ae0 t mmhub_v1_0_set_clockgating +ffffffff81eb1f70 t mmhub_v1_0_get_clockgating +ffffffff81eb2090 t mmhub_v1_0_setup_vm_pt_regs +ffffffff81eb21d0 t mmhub_v1_0_update_power_gating +ffffffff81eb3000 t mmhub_v1_7_query_ras_error_count +ffffffff81eb3150 t mmhub_v1_7_query_ras_error_status +ffffffff81eb3230 t mmhub_v1_7_reset_ras_error_count +ffffffff81eb32d0 t mmhub_v1_7_reset_ras_error_status +ffffffff81eb33d0 t mmhub_v1_7_get_fb_location +ffffffff81eb34f0 t mmhub_v1_7_init +ffffffff81eb3590 t mmhub_v1_7_gart_enable +ffffffff81eb4aa0 t mmhub_v1_7_set_fault_enable_default +ffffffff81eb4bc0 t mmhub_v1_7_gart_disable +ffffffff81eb4e60 t mmhub_v1_7_set_clockgating +ffffffff81eb5200 t mmhub_v1_7_get_clockgating +ffffffff81eb5320 t mmhub_v1_7_setup_vm_pt_regs +ffffffff81eb6000 t mmhub_v1_8_get_fb_location +ffffffff81eb6120 t mmhub_v1_8_init +ffffffff81eb6280 t mmhub_v1_8_gart_enable +ffffffff81eb7e90 t mmhub_v1_8_set_fault_enable_default +ffffffff81eb8060 t mmhub_v1_8_gart_disable +ffffffff81eb83a0 t mmhub_v1_8_set_clockgating +ffffffff81eb83d0 t mmhub_v1_8_get_clockgating +ffffffff81eb8400 t mmhub_v1_8_setup_vm_pt_regs +ffffffff81eb8610 t mmhub_v1_8_query_ras_error_count +ffffffff81eb8770 t mmhub_v1_8_query_ras_error_status +ffffffff81eb8a20 t mmhub_v1_8_reset_ras_error_count +ffffffff81eb8b30 t mmhub_v1_8_reset_ras_error_status +ffffffff81eba000 t mmhub_v2_0_init +ffffffff81eba0d0 t mmhub_v2_0_gart_enable +ffffffff81ebb290 t mmhub_v2_0_set_fault_enable_default +ffffffff81ebb3b0 t mmhub_v2_0_gart_disable +ffffffff81ebb640 t mmhub_v2_0_set_clockgating +ffffffff81ebb990 t mmhub_v2_0_get_clockgating +ffffffff81ebbb20 t mmhub_v2_0_setup_vm_pt_regs +ffffffff81ebbc60 t mmhub_v2_0_print_l2_protection_fault_status +ffffffff81ebbeb0 t mmhub_v2_0_get_invalidate_req +ffffffff81ebc000 t mmhub_v2_3_init +ffffffff81ebc0e0 t mmhub_v2_3_gart_enable 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mmhub_v3_0_2_get_invalidate_req +ffffffff81ec5000 t mmhub_v9_4_query_ras_error_count +ffffffff81ec5150 t mmhub_v9_4_query_ras_error_status +ffffffff81ec5230 t mmhub_v9_4_reset_ras_error_count +ffffffff81ec5300 t mmhub_v9_4_get_fb_location +ffffffff81ec5420 t mmhub_v9_4_init +ffffffff81ec5570 t mmhub_v9_4_gart_enable +ffffffff81ec6a00 t mmhub_v9_4_set_fault_enable_default +ffffffff81ec6bf0 t mmhub_v9_4_gart_disable +ffffffff81ec6f60 t mmhub_v9_4_set_clockgating +ffffffff81ec7440 t mmhub_v9_4_get_clockgating +ffffffff81ec7570 t mmhub_v9_4_setup_vm_pt_regs +ffffffff81ec75c0 t mmhub_v9_4_setup_hubid_vm_pt_regs +ffffffff81ec8000 T xgpu_ai_mailbox_set_irq_funcs +ffffffff81ec8050 T xgpu_ai_mailbox_add_irq_id +ffffffff81ec80e0 T xgpu_ai_mailbox_get_irq +ffffffff81ec8190 t xgpu_ai_mailbox_flr_work +ffffffff81ec8390 T xgpu_ai_mailbox_put_irq +ffffffff81ec83d0 t xgpu_ai_request_full_gpu_access +ffffffff81ec83f0 t xgpu_ai_release_full_gpu_access +ffffffff81ec8410 t xgpu_ai_request_init_data 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xgpu_nv_mailbox_ack_irq +ffffffff81ec97e0 t xgpu_nv_set_mailbox_rcv_irq +ffffffff81ec9860 t xgpu_nv_mailbox_rcv_irq +ffffffff81ec9910 t xgpu_nv_send_access_requests +ffffffff81eca000 T xgpu_vi_init_golden_registers +ffffffff81eca0c0 T xgpu_vi_mailbox_set_irq_funcs +ffffffff81eca110 T xgpu_vi_mailbox_add_irq_id +ffffffff81eca1a0 T xgpu_vi_mailbox_get_irq +ffffffff81eca250 t xgpu_vi_mailbox_flr_work +ffffffff81eca3a0 T xgpu_vi_mailbox_put_irq +ffffffff81eca3e0 t xgpu_vi_request_full_gpu_access +ffffffff81eca400 t xgpu_vi_release_full_gpu_access +ffffffff81eca420 t xgpu_vi_request_reset +ffffffff81eca440 t xgpu_vi_wait_reset_cmpl +ffffffff81eca520 t xgpu_vi_set_mailbox_ack_irq +ffffffff81eca5a0 t xgpu_vi_mailbox_ack_irq +ffffffff81eca5f0 t xgpu_vi_set_mailbox_rcv_irq +ffffffff81eca670 t xgpu_vi_mailbox_rcv_irq +ffffffff81eca720 t xgpu_vi_mailbox_rcv_msg +ffffffff81eca840 t xgpu_vi_send_access_requests +ffffffff81ecb000 t navi10_ih_early_init +ffffffff81ecb060 t navi10_ih_sw_init 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nbio_v4_3_sriov_sdma_doorbell_range +ffffffff81ed0f10 t nbio_v4_3_sriov_vcn_doorbell_range +ffffffff81ed0f40 t nbio_v4_3_sriov_gc_doorbell_init +ffffffff81ed0f70 t nbio_v4_3_sriov_ih_doorbell_range +ffffffff81ed0fa0 t nbio_v4_3_handle_ras_err_event_athub_intr_no_bifring +ffffffff81ed10b0 t nbio_v4_3_init_ras_err_event_athub_interrupt +ffffffff81ed10f0 t nbio_v4_3_set_ras_err_event_athub_irq_state +ffffffff81ed1200 t nbio_v4_3_process_err_event_athub_irq +ffffffff81ed2000 t nbio_v6_1_get_hdp_flush_req_offset +ffffffff81ed2040 t nbio_v6_1_get_hdp_flush_done_offset +ffffffff81ed2080 t nbio_v6_1_get_pcie_index_offset +ffffffff81ed20c0 t nbio_v6_1_get_pcie_data_offset +ffffffff81ed2100 t nbio_v6_1_get_rev_id +ffffffff81ed2190 t nbio_v6_1_mc_access_enable +ffffffff81ed2240 t nbio_v6_1_get_memsize +ffffffff81ed22b0 t nbio_v6_1_sdma_doorbell_range +ffffffff81ed2340 t nbio_v6_1_enable_doorbell_aperture +ffffffff81ed2440 t nbio_v6_1_enable_doorbell_selfring_aperture +ffffffff81ed25b0 t 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psp_v12_0_mode1_reset +ffffffff81ee1530 t psp_v12_0_ring_get_wptr +ffffffff81ee15a0 t psp_v12_0_ring_set_wptr +ffffffff81ee2000 T psp_v13_0_set_psp_funcs +ffffffff81ee2030 t psp_v13_0_init_microcode +ffffffff81ee2130 t psp_v13_0_wait_for_bootloader_steady_state +ffffffff81ee2240 t psp_v13_0_bootloader_load_kdb +ffffffff81ee2260 t psp_v13_0_bootloader_load_spl +ffffffff81ee2280 t psp_v13_0_bootloader_load_sysdrv +ffffffff81ee22a0 t psp_v13_0_bootloader_load_soc_drv +ffffffff81ee22c0 t psp_v13_0_bootloader_load_intf_drv +ffffffff81ee22e0 t psp_v13_0_bootloader_load_dbg_drv +ffffffff81ee2300 t psp_v13_0_bootloader_load_ras_drv +ffffffff81ee2320 t psp_v13_0_bootloader_load_sos +ffffffff81ee26f0 t psp_v13_0_ring_create +ffffffff81ee2d90 t psp_v13_0_ring_stop +ffffffff81ee3120 t psp_v13_0_ring_destroy +ffffffff81ee31a0 t psp_v13_0_memory_training +ffffffff81ee35d0 t psp_v13_0_ring_get_wptr +ffffffff81ee3640 t psp_v13_0_ring_set_wptr +ffffffff81ee3740 t psp_v13_0_load_usbc_pd_fw +ffffffff81ee3930 t psp_v13_0_read_usbc_pd_fw +ffffffff81ee3a50 t psp_v13_0_update_spirom +ffffffff81ee3c30 t psp_v13_0_vbflash_status +ffffffff81ee3c90 t psp_v13_0_fatal_error_recovery_quirk +ffffffff81ee3dc0 t psp_v13_0_bootloader_load_component +ffffffff81ee4030 t psp_v13_0_memory_training_send_msg +ffffffff81ee41a0 t psp_v13_0_exec_spi_cmd +ffffffff81ee5000 T psp_v13_0_4_set_psp_funcs +ffffffff81ee5030 t psp_v13_0_4_init_microcode +ffffffff81ee50d0 t psp_v13_0_4_bootloader_load_kdb +ffffffff81ee50f0 t psp_v13_0_4_bootloader_load_spl +ffffffff81ee5110 t psp_v13_0_4_bootloader_load_sysdrv +ffffffff81ee5130 t psp_v13_0_4_bootloader_load_soc_drv +ffffffff81ee5150 t psp_v13_0_4_bootloader_load_intf_drv +ffffffff81ee5170 t psp_v13_0_4_bootloader_load_dbg_drv +ffffffff81ee5190 t psp_v13_0_4_bootloader_load_sos +ffffffff81ee5500 t psp_v13_0_4_ring_create +ffffffff81ee5bb0 t psp_v13_0_4_ring_stop +ffffffff81ee5f40 t psp_v13_0_4_ring_destroy +ffffffff81ee5fc0 t psp_v13_0_4_ring_get_wptr +ffffffff81ee6030 t psp_v13_0_4_ring_set_wptr +ffffffff81ee6130 t psp_v13_0_4_bootloader_load_component +ffffffff81ee6300 t psp_v13_0_4_wait_for_bootloader +ffffffff81ee7000 T psp_v3_1_set_psp_funcs +ffffffff81ee7030 t psp_v3_1_init_microcode +ffffffff81ee70c0 t psp_v3_1_bootloader_load_sysdrv +ffffffff81ee73f0 t psp_v3_1_bootloader_load_sos +ffffffff81ee7770 t psp_v3_1_ring_create +ffffffff81ee8290 t psp_v3_1_ring_stop +ffffffff81ee84b0 t psp_v3_1_ring_destroy +ffffffff81ee8530 t psp_v3_1_smu_reload_quirk +ffffffff81ee8580 t psp_v3_1_mode1_reset +ffffffff81ee8680 t psp_v3_1_ring_get_wptr +ffffffff81ee86d0 t psp_v3_1_ring_set_wptr +ffffffff81ee9000 t sdma_v2_4_early_init +ffffffff81ee90f0 t sdma_v2_4_sw_init +ffffffff81ee94a0 t sdma_v2_4_sw_fini +ffffffff81ee9550 t sdma_v2_4_hw_init +ffffffff81ee98f0 t sdma_v2_4_hw_fini +ffffffff81ee9930 t sdma_v2_4_suspend +ffffffff81ee9970 t sdma_v2_4_resume +ffffffff81ee9980 t sdma_v2_4_is_idle +ffffffff81ee99c0 t sdma_v2_4_wait_for_idle +ffffffff81ee9a60 t sdma_v2_4_soft_reset +ffffffff81ee9ba0 t sdma_v2_4_set_clockgating_state +ffffffff81ee9bd0 t sdma_v2_4_set_powergating_state +ffffffff81ee9c00 t sdma_v2_4_ring_get_rptr +ffffffff81ee9c40 t sdma_v2_4_ring_get_wptr +ffffffff81ee9ca0 t sdma_v2_4_ring_set_wptr +ffffffff81ee9ce0 t sdma_v2_4_ring_emit_ib +ffffffff81ee9f90 t sdma_v2_4_ring_emit_fence +ffffffff81eea390 t sdma_v2_4_ring_emit_pipeline_sync +ffffffff81eea610 t sdma_v2_4_ring_emit_vm_flush +ffffffff81eea880 t sdma_v2_4_ring_emit_hdp_flush +ffffffff81eeab00 t sdma_v2_4_ring_test_ring +ffffffff81eeade0 t sdma_v2_4_ring_test_ib +ffffffff81eeafb0 t sdma_v2_4_ring_insert_nop +ffffffff81eeb0e0 t sdma_v2_4_ring_pad_ib +ffffffff81eeb210 t sdma_v2_4_ring_emit_wreg +ffffffff81eeb360 t sdma_v2_4_emit_copy_buffer +ffffffff81eeb420 t sdma_v2_4_emit_fill_buffer +ffffffff81eeb4b0 t sdma_v2_4_vm_copy_pte +ffffffff81eeb570 t sdma_v2_4_vm_write_pte +ffffffff81eeb640 t sdma_v2_4_vm_set_pte_pde +ffffffff81eeb740 t sdma_v2_4_set_trap_irq_state +ffffffff81eeb800 t sdma_v2_4_process_trap_irq +ffffffff81eeb8a0 t sdma_v2_4_process_illegal_inst_irq +ffffffff81eeb920 t sdma_v2_4_enable +ffffffff81eec000 t sdma_v3_0_early_init +ffffffff81eec100 t sdma_v3_0_sw_init +ffffffff81eec4c0 t sdma_v3_0_sw_fini +ffffffff81eec570 t sdma_v3_0_hw_init +ffffffff81eec6a0 t sdma_v3_0_hw_fini +ffffffff81eec6f0 t sdma_v3_0_suspend +ffffffff81eec740 t sdma_v3_0_resume +ffffffff81eec750 t sdma_v3_0_is_idle +ffffffff81eec790 t sdma_v3_0_wait_for_idle +ffffffff81eec830 t sdma_v3_0_check_soft_reset +ffffffff81eec890 t sdma_v3_0_pre_soft_reset +ffffffff81eec8e0 t sdma_v3_0_soft_reset +ffffffff81eec9b0 t sdma_v3_0_post_soft_reset +ffffffff81eeca00 t sdma_v3_0_set_clockgating_state +ffffffff81eecc60 t sdma_v3_0_set_powergating_state +ffffffff81eecc90 t sdma_v3_0_get_clockgating_state +ffffffff81eecd10 t sdma_v3_0_ring_get_rptr +ffffffff81eecd50 t sdma_v3_0_ring_get_wptr +ffffffff81eecdd0 t sdma_v3_0_ring_set_wptr +ffffffff81eece80 t sdma_v3_0_ring_emit_ib +ffffffff81eed130 t sdma_v3_0_ring_emit_fence +ffffffff81eed530 t sdma_v3_0_ring_emit_pipeline_sync +ffffffff81eed7b0 t sdma_v3_0_ring_emit_vm_flush +ffffffff81eeda20 t sdma_v3_0_ring_emit_hdp_flush +ffffffff81eedca0 t sdma_v3_0_ring_test_ring +ffffffff81eedf80 t sdma_v3_0_ring_test_ib +ffffffff81eee150 t sdma_v3_0_ring_insert_nop +ffffffff81eee280 t sdma_v3_0_ring_pad_ib +ffffffff81eee3b0 t sdma_v3_0_ring_emit_wreg +ffffffff81eee500 t sdma_v3_0_emit_copy_buffer +ffffffff81eee5c0 t sdma_v3_0_emit_fill_buffer +ffffffff81eee650 t sdma_v3_0_vm_copy_pte +ffffffff81eee710 t sdma_v3_0_vm_write_pte +ffffffff81eee7e0 t sdma_v3_0_vm_set_pte_pde +ffffffff81eee8e0 t sdma_v3_0_set_trap_irq_state +ffffffff81eee9a0 t sdma_v3_0_process_trap_irq +ffffffff81eeea40 t sdma_v3_0_process_illegal_inst_irq +ffffffff81eeeac0 t sdma_v3_0_ctx_switch_enable +ffffffff81eeec60 t sdma_v3_0_enable +ffffffff81eeedd0 t sdma_v3_0_gfx_resume +ffffffff81ef0000 t sdma_v4_0_early_init +ffffffff81ef02d0 t sdma_v4_0_late_init +ffffffff81ef0570 t sdma_v4_0_sw_init +ffffffff81ef09b0 t sdma_v4_0_sw_fini +ffffffff81ef0a70 t sdma_v4_0_hw_init +ffffffff81ef39d0 t sdma_v4_0_hw_fini +ffffffff81ef3a90 t sdma_v4_0_suspend +ffffffff81ef3ae0 t sdma_v4_0_resume +ffffffff81ef3b60 t sdma_v4_0_is_idle +ffffffff81ef3c90 t sdma_v4_0_wait_for_idle +ffffffff81ef3e30 t sdma_v4_0_soft_reset +ffffffff81ef3e60 t sdma_v4_0_set_clockgating_state +ffffffff81ef4360 t sdma_v4_0_set_powergating_state +ffffffff81ef4420 t sdma_v4_0_get_clockgating_state +ffffffff81ef44c0 t sdma_v4_0_query_ras_error_count +ffffffff81ef4690 t sdma_v4_0_reset_ras_error_count +ffffffff81ef47e0 t sdma_v4_0_ring_get_rptr +ffffffff81ef4840 t sdma_v4_0_ring_get_wptr +ffffffff81ef4a30 t sdma_v4_0_ring_set_wptr +ffffffff81ef4cb0 t sdma_v4_0_ring_emit_ib +ffffffff81ef4f60 t sdma_v4_0_ring_emit_fence +ffffffff81ef5380 t sdma_v4_0_ring_emit_pipeline_sync +ffffffff81ef53e0 t sdma_v4_0_ring_emit_vm_flush +ffffffff81ef5400 t sdma_v4_0_ring_emit_hdp_flush +ffffffff81ef54b0 t sdma_v4_0_ring_test_ring +ffffffff81ef5790 t sdma_v4_0_ring_test_ib +ffffffff81ef5960 t sdma_v4_0_ring_insert_nop +ffffffff81ef5a90 t sdma_v4_0_ring_pad_ib +ffffffff81ef5bc0 t sdma_v4_0_ring_emit_wreg +ffffffff81ef5d10 t sdma_v4_0_ring_emit_reg_wait +ffffffff81ef5d60 t sdma_v4_0_wait_reg_mem +ffffffff81ef6070 t sdma_v4_0_page_ring_get_wptr +ffffffff81ef6220 t sdma_v4_0_page_ring_set_wptr +ffffffff81ef63e0 t sdma_v4_0_emit_copy_buffer +ffffffff81ef64a0 t sdma_v4_0_emit_fill_buffer +ffffffff81ef6530 t sdma_v4_0_vm_copy_pte +ffffffff81ef65f0 t sdma_v4_0_vm_write_pte +ffffffff81ef66c0 t sdma_v4_0_vm_set_pte_pde +ffffffff81ef67c0 t sdma_v4_0_set_trap_irq_state +ffffffff81ef6960 t sdma_v4_0_process_trap_irq +ffffffff81ef6a90 t sdma_v4_0_process_illegal_inst_irq +ffffffff81ef6bb0 t sdma_v4_0_set_ecc_irq_state +ffffffff81ef6d50 t sdma_v4_0_process_vm_hole_irq +ffffffff81ef6d90 t sdma_v4_0_print_iv_entry +ffffffff81ef6ed0 t sdma_v4_0_process_doorbell_invalid_irq +ffffffff81ef6f10 t sdma_v4_0_process_pool_timeout_irq +ffffffff81ef6f50 t sdma_v4_0_process_srbm_write_irq +ffffffff81ef6f90 t sdma_v4_0_process_ras_data_cb +ffffffff81ef7010 t sdma_v4_0_ctx_switch_enable +ffffffff81ef76e0 t sdma_v4_0_enable +ffffffff81ef7ca0 t sdma_v4_0_gfx_enable +ffffffff81ef9000 t sdma_v4_4_query_ras_error_count +ffffffff81ef9290 t sdma_v4_4_reset_ras_error_count +ffffffff81efa000 t sdma_v4_4_2_early_init +ffffffff81efa280 t sdma_v4_4_2_late_init +ffffffff81efa2f0 t sdma_v4_4_2_sw_init +ffffffff81efa810 t sdma_v4_4_2_sw_fini +ffffffff81efa8c0 t sdma_v4_4_2_hw_init +ffffffff81efa910 t sdma_v4_4_2_hw_fini +ffffffff81efa9d0 t sdma_v4_4_2_suspend +ffffffff81efaab0 t sdma_v4_4_2_resume +ffffffff81efab00 t sdma_v4_4_2_is_idle +ffffffff81efaba0 t sdma_v4_4_2_wait_for_idle +ffffffff81efacc0 t sdma_v4_4_2_soft_reset +ffffffff81efacf0 t sdma_v4_4_2_set_clockgating_state +ffffffff81efb0f0 t sdma_v4_4_2_set_powergating_state +ffffffff81efb120 t sdma_v4_4_2_get_clockgating_state +ffffffff81efb200 t sdma_v4_4_2_xcp_suspend +ffffffff81efb2c0 t sdma_v4_4_2_xcp_resume +ffffffff81efb300 t sdma_v4_4_2_ring_get_rptr +ffffffff81efb370 t sdma_v4_4_2_ring_get_wptr +ffffffff81efb4b0 t sdma_v4_4_2_ring_set_wptr +ffffffff81efb670 t sdma_v4_4_2_ring_emit_ib +ffffffff81efb920 t sdma_v4_4_2_ring_emit_fence +ffffffff81efbd40 t sdma_v4_4_2_ring_emit_pipeline_sync +ffffffff81efbda0 t sdma_v4_4_2_ring_emit_vm_flush +ffffffff81efbdc0 t sdma_v4_4_2_ring_emit_hdp_flush +ffffffff81efbe70 t sdma_v4_4_2_ring_test_ring +ffffffff81efc150 t sdma_v4_4_2_ring_test_ib +ffffffff81efc320 t sdma_v4_4_2_ring_insert_nop +ffffffff81efc450 t sdma_v4_4_2_ring_pad_ib +ffffffff81efc580 t sdma_v4_4_2_ring_emit_wreg +ffffffff81efc6d0 t sdma_v4_4_2_ring_emit_reg_wait +ffffffff81efc720 t sdma_v4_4_2_wait_reg_mem +ffffffff81efca30 t sdma_v4_4_2_page_ring_get_wptr +ffffffff81efcb30 t sdma_v4_4_2_page_ring_set_wptr +ffffffff81efcc40 t sdma_v4_4_2_emit_copy_buffer +ffffffff81efcd00 t sdma_v4_4_2_emit_fill_buffer +ffffffff81efcd90 t sdma_v4_4_2_vm_copy_pte +ffffffff81efce50 t sdma_v4_4_2_vm_write_pte +ffffffff81efcf20 t sdma_v4_4_2_vm_set_pte_pde +ffffffff81efd020 t sdma_v4_4_2_set_trap_irq_state +ffffffff81efd100 t sdma_v4_4_2_process_trap_irq +ffffffff81efd220 t sdma_v4_4_2_process_illegal_inst_irq +ffffffff81efd2b0 t sdma_v4_4_2_set_ecc_irq_state +ffffffff81efd390 t sdma_v4_4_2_process_vm_hole_irq +ffffffff81efd470 t sdma_v4_4_2_process_doorbell_invalid_irq +ffffffff81efd550 t sdma_v4_4_2_process_pool_timeout_irq +ffffffff81efd630 t sdma_v4_4_2_process_srbm_write_irq +ffffffff81efd710 t sdma_v4_4_2_query_ras_error_count +ffffffff81efd860 t sdma_v4_4_2_reset_ras_error_count +ffffffff81efd990 t sdma_v4_4_2_inst_init_golden_registers +ffffffff81efdb10 t sdma_v4_4_2_inst_start +ffffffff81efeeb0 t sdma_v4_4_2_inst_ctx_switch_enable +ffffffff81eff180 t sdma_v4_4_2_inst_enable +ffffffff81f00000 t sdma_v5_0_early_init +ffffffff81f00130 t sdma_v5_0_sw_init +ffffffff81f00310 t sdma_v5_0_sw_fini +ffffffff81f003a0 t sdma_v5_0_hw_init +ffffffff81f01600 t sdma_v5_0_hw_fini +ffffffff81f01660 t sdma_v5_0_suspend +ffffffff81f016c0 t sdma_v5_0_resume +ffffffff81f016d0 t sdma_v5_0_is_idle +ffffffff81f01760 t sdma_v5_0_wait_for_idle +ffffffff81f01820 t sdma_v5_0_soft_reset +ffffffff81f01850 t sdma_v5_0_set_clockgating_state +ffffffff81f01a50 t sdma_v5_0_set_powergating_state +ffffffff81f01a80 t sdma_v5_0_get_clockgating_state +ffffffff81f01b20 t sdma_v5_0_ring_get_rptr +ffffffff81f01b80 t sdma_v5_0_ring_get_wptr +ffffffff81f01d20 t sdma_v5_0_ring_set_wptr +ffffffff81f02070 t sdma_v5_0_ring_emit_ib +ffffffff81f02330 t sdma_v5_0_ring_emit_fence +ffffffff81f02790 t sdma_v5_0_ring_emit_pipeline_sync +ffffffff81f02a10 t sdma_v5_0_ring_emit_vm_flush +ffffffff81f02a30 t sdma_v5_0_ring_emit_hdp_flush +ffffffff81f02cd0 t sdma_v5_0_ring_test_ring +ffffffff81f03090 t sdma_v5_0_ring_test_ib +ffffffff81f033c0 t sdma_v5_0_ring_insert_nop +ffffffff81f034f0 t sdma_v5_0_ring_pad_ib +ffffffff81f03620 t sdma_v5_0_ring_init_cond_exec +ffffffff81f03850 t sdma_v5_0_ring_patch_cond_exec +ffffffff81f03910 t sdma_v5_0_ring_emit_wreg +ffffffff81f03a60 t sdma_v5_0_ring_emit_reg_wait +ffffffff81f03ce0 t sdma_v5_0_ring_emit_reg_write_reg_wait +ffffffff81f03d60 t sdma_v5_0_ring_preempt_ib +ffffffff81f03ea0 t sdma_v5_0_ring_emit_mem_sync +ffffffff81f040b0 t sdma_v5_0_emit_copy_buffer +ffffffff81f04170 t sdma_v5_0_emit_fill_buffer +ffffffff81f04200 t sdma_v5_0_vm_copy_pte +ffffffff81f042c0 t sdma_v5_0_vm_write_pte +ffffffff81f04390 t sdma_v5_0_vm_set_pte_pde +ffffffff81f04490 t sdma_v5_0_set_trap_irq_state +ffffffff81f04520 t sdma_v5_0_process_trap_irq +ffffffff81f04630 t sdma_v5_0_process_illegal_inst_irq +ffffffff81f04660 t sdma_v5_0_mqd_init +ffffffff81f04740 t sdma_v5_0_ctx_switch_enable +ffffffff81f04a80 t sdma_v5_0_enable +ffffffff81f05000 t sdma_v5_2_early_init +ffffffff81f05130 t sdma_v5_2_sw_init +ffffffff81f05390 t sdma_v5_2_sw_fini +ffffffff81f05420 t sdma_v5_2_hw_init +ffffffff81f06fc0 t sdma_v5_2_hw_fini +ffffffff81f07020 t sdma_v5_2_suspend +ffffffff81f07080 t sdma_v5_2_resume +ffffffff81f07090 t sdma_v5_2_is_idle +ffffffff81f07140 t sdma_v5_2_wait_for_idle +ffffffff81f07240 t sdma_v5_2_soft_reset +ffffffff81f07500 t sdma_v5_2_set_clockgating_state +ffffffff81f07860 t sdma_v5_2_set_powergating_state +ffffffff81f07890 t sdma_v5_2_get_clockgating_state +ffffffff81f07920 t sdma_v5_2_ring_get_rptr +ffffffff81f07980 t sdma_v5_2_ring_get_wptr +ffffffff81f07ac0 t sdma_v5_2_ring_set_wptr +ffffffff81f07c70 t sdma_v5_2_ring_emit_ib +ffffffff81f07f30 t sdma_v5_2_ring_emit_fence +ffffffff81f08390 t sdma_v5_2_ring_emit_pipeline_sync +ffffffff81f08610 t sdma_v5_2_ring_emit_vm_flush +ffffffff81f08630 t sdma_v5_2_ring_emit_hdp_flush +ffffffff81f088d0 t sdma_v5_2_ring_test_ring +ffffffff81f08c90 t sdma_v5_2_ring_test_ib +ffffffff81f08fc0 t sdma_v5_2_ring_insert_nop +ffffffff81f090f0 t sdma_v5_2_ring_pad_ib +ffffffff81f09220 t sdma_v5_2_ring_init_cond_exec +ffffffff81f09450 t sdma_v5_2_ring_patch_cond_exec +ffffffff81f09510 t sdma_v5_2_ring_begin_use +ffffffff81f09530 t sdma_v5_2_ring_end_use +ffffffff81f09550 t sdma_v5_2_ring_emit_wreg +ffffffff81f096a0 t sdma_v5_2_ring_emit_reg_wait +ffffffff81f09920 t sdma_v5_2_ring_emit_reg_write_reg_wait +ffffffff81f099a0 t sdma_v5_2_ring_preempt_ib +ffffffff81f09b10 t sdma_v5_2_ring_emit_mem_sync +ffffffff81f09d20 t sdma_v5_2_emit_copy_buffer +ffffffff81f09de0 t sdma_v5_2_emit_fill_buffer +ffffffff81f09e70 t sdma_v5_2_vm_copy_pte +ffffffff81f09f30 t sdma_v5_2_vm_write_pte +ffffffff81f0a000 t sdma_v5_2_vm_set_pte_pde +ffffffff81f0a100 t sdma_v5_2_set_trap_irq_state +ffffffff81f0a1c0 t sdma_v5_2_process_trap_irq +ffffffff81f0a300 t sdma_v5_2_process_illegal_inst_irq +ffffffff81f0a330 t sdma_v5_2_mqd_init +ffffffff81f0a410 t sdma_v5_2_ctx_switch_enable +ffffffff81f0a820 t sdma_v5_2_enable +ffffffff81f0b000 t sdma_v6_0_early_init +ffffffff81f0b120 t sdma_v6_0_sw_init +ffffffff81f0b2e0 t sdma_v6_0_sw_fini +ffffffff81f0b370 t sdma_v6_0_hw_init +ffffffff81f0b380 t sdma_v6_0_hw_fini +ffffffff81f0b450 t sdma_v6_0_suspend +ffffffff81f0b490 t sdma_v6_0_resume +ffffffff81f0b4a0 t sdma_v6_0_is_idle +ffffffff81f0b530 t sdma_v6_0_wait_for_idle +ffffffff81f0b5f0 t sdma_v6_0_check_soft_reset +ffffffff81f0b6b0 t sdma_v6_0_soft_reset +ffffffff81f0bb70 t sdma_v6_0_set_clockgating_state +ffffffff81f0bba0 t sdma_v6_0_set_powergating_state +ffffffff81f0bbd0 t sdma_v6_0_get_clockgating_state +ffffffff81f0bc00 t sdma_v6_0_ring_get_rptr +ffffffff81f0bc60 t sdma_v6_0_ring_get_wptr +ffffffff81f0bcd0 t sdma_v6_0_ring_set_wptr +ffffffff81f0c020 t sdma_v6_0_ring_emit_ib +ffffffff81f0c2e0 t sdma_v6_0_ring_emit_fence +ffffffff81f0c740 t sdma_v6_0_ring_emit_pipeline_sync +ffffffff81f0c9c0 t sdma_v6_0_ring_emit_vm_flush +ffffffff81f0cc30 t sdma_v6_0_ring_emit_hdp_flush +ffffffff81f0ced0 t sdma_v6_0_ring_test_ring +ffffffff81f0d290 t sdma_v6_0_ring_test_ib +ffffffff81f0d5c0 t sdma_v6_0_ring_insert_nop +ffffffff81f0d6f0 t sdma_v6_0_ring_pad_ib +ffffffff81f0d820 t sdma_v6_0_ring_init_cond_exec +ffffffff81f0da50 t sdma_v6_0_ring_patch_cond_exec +ffffffff81f0db10 t sdma_v6_0_ring_emit_wreg +ffffffff81f0dc60 t sdma_v6_0_ring_emit_reg_wait +ffffffff81f0dee0 t sdma_v6_0_ring_emit_reg_write_reg_wait +ffffffff81f0df60 t sdma_v6_0_ring_preempt_ib +ffffffff81f0e0b0 t sdma_v6_0_ring_emit_mem_sync +ffffffff81f0e2c0 t sdma_v6_0_emit_copy_buffer +ffffffff81f0e380 t sdma_v6_0_emit_fill_buffer +ffffffff81f0e410 t sdma_v6_0_vm_copy_pte +ffffffff81f0e4d0 t sdma_v6_0_vm_write_pte +ffffffff81f0e5a0 t sdma_v6_0_vm_set_pte_pde +ffffffff81f0e6a0 t sdma_v6_0_set_trap_irq_state +ffffffff81f0e730 t sdma_v6_0_process_trap_irq +ffffffff81f0e860 t sdma_v6_0_process_illegal_inst_irq +ffffffff81f0e890 t sdma_v6_0_mqd_init +ffffffff81f0e9b0 t sdma_v6_0_start +ffffffff81f0ec90 t sdma_v6_0_enable +ffffffff81f0ee20 t sdma_v6_0_gfx_resume +ffffffff81f0feb0 t sdma_v6_0_gfx_stop +ffffffff81f11000 T sienna_cichlid_reset_init +ffffffff81f110c0 t sienna_cichlid_async_reset +ffffffff81f11120 t sienna_cichlid_get_reset_handler +ffffffff81f111b0 T sienna_cichlid_reset_fini +ffffffff81f11210 t sienna_cichlid_mode2_prepare_hwcontext +ffffffff81f11360 t sienna_cichlid_mode2_perform_reset +ffffffff81f113e0 t sienna_cichlid_mode2_restore_hwcontext +ffffffff81f116d0 t sienna_cichlid_mode2_reset +ffffffff81f12000 T smu_v11_0_i2c_control_init +ffffffff81f120d0 T smu_v11_0_i2c_control_fini +ffffffff81f12110 t smu_v11_0_i2c_xfer +ffffffff81f132c0 t smu_v11_0_i2c_func +ffffffff81f132f0 t smu_v11_0_i2c_enable +ffffffff81f13440 t smu_v11_0_i2c_abort +ffffffff81f13550 t lock_bus +ffffffff81f135f0 t trylock_bus +ffffffff81f13640 t unlock_bus +ffffffff81f14000 T smu_v13_0_10_reset_init +ffffffff81f140c0 t smu_v13_0_10_async_reset +ffffffff81f14120 t smu_v13_0_10_get_reset_handler +ffffffff81f141d0 T smu_v13_0_10_reset_fini +ffffffff81f14230 t smu_v13_0_10_mode2_prepare_hwcontext +ffffffff81f14360 t smu_v13_0_10_mode2_perform_reset +ffffffff81f143e0 t smu_v13_0_10_mode2_restore_hwcontext +ffffffff81f14740 t smu_v13_0_10_mode2_reset +ffffffff81f15000 t smuio_v11_0_get_rom_index_offset +ffffffff81f15040 t smuio_v11_0_get_rom_data_offset +ffffffff81f15080 t smuio_v11_0_update_rom_clock_gating +ffffffff81f151d0 t smuio_v11_0_get_clock_gating_state +ffffffff81f16000 t smuio_v11_0_6_get_rom_index_offset +ffffffff81f16040 t smuio_v11_0_6_get_rom_data_offset +ffffffff81f16080 t smuio_v11_0_6_update_rom_clock_gating +ffffffff81f161d0 t smuio_v11_0_6_get_clock_gating_state +ffffffff81f17000 t smuio_v13_0_get_rom_index_offset +ffffffff81f17040 t smuio_v13_0_get_rom_data_offset +ffffffff81f17080 t smuio_v13_0_update_rom_clock_gating +ffffffff81f171d0 t smuio_v13_0_get_clock_gating_state +ffffffff81f17270 t smuio_v13_0_get_die_id +ffffffff81f172f0 t smuio_v13_0_get_socket_id +ffffffff81f17380 t smuio_v13_0_is_host_gpu_xgmi_supported +ffffffff81f18000 t smuio_v13_0_3_get_die_id +ffffffff81f18080 t smuio_v13_0_3_get_socket_id +ffffffff81f18110 t smuio_v13_0_3_get_pkg_type +ffffffff81f19000 t smuio_v13_0_6_get_rom_index_offset +ffffffff81f19040 t smuio_v13_0_6_get_rom_data_offset +ffffffff81f1a000 t smuio_v9_0_get_rom_index_offset +ffffffff81f1a040 t smuio_v9_0_get_rom_data_offset +ffffffff81f1a080 t smuio_v9_0_update_rom_clock_gating +ffffffff81f1a1c0 t smuio_v9_0_get_clock_gating_state +ffffffff81f1b000 T soc15_grbm_select +ffffffff81f1b090 T soc15_program_register_sequence +ffffffff81f1b290 T soc15_set_virt_ops +ffffffff81f1b300 t soc15_common_early_init +ffffffff81f1b6e0 t soc15_common_late_init +ffffffff81f1b740 t soc15_common_sw_init +ffffffff81f1b7a0 t soc15_common_sw_fini +ffffffff81f1b7f0 t soc15_common_hw_init +ffffffff81f1b910 t soc15_common_hw_fini +ffffffff81f1b9e0 t soc15_common_suspend +ffffffff81f1ba20 t soc15_common_resume +ffffffff81f1ba60 t soc15_common_is_idle +ffffffff81f1ba90 t soc15_common_wait_for_idle +ffffffff81f1bac0 t soc15_common_soft_reset +ffffffff81f1baf0 t soc15_common_set_clockgating_state +ffffffff81f1be30 t soc15_common_set_powergating_state +ffffffff81f1be60 t soc15_common_get_clockgating_state +ffffffff81f1bf40 t soc15_uvd_ctx_rreg +ffffffff81f1bfe0 t soc15_uvd_ctx_wreg +ffffffff81f1c070 t soc15_didt_rreg +ffffffff81f1c110 t soc15_didt_wreg +ffffffff81f1c190 t soc15_gc_cac_rreg +ffffffff81f1c2b0 t soc15_gc_cac_wreg +ffffffff81f1c3c0 t soc15_se_cac_rreg +ffffffff81f1c4e0 t soc15_se_cac_wreg +ffffffff81f1c5f0 t soc15_read_disabled_bios +ffffffff81f1c620 t soc15_read_register +ffffffff81f1c720 t soc15_asic_reset +ffffffff81f1c820 t soc15_asic_reset_method +ffffffff81f1c9d0 t soc15_get_xclk +ffffffff81f1ca30 t soc15_set_uvd_clocks +ffffffff81f1ca60 t soc15_set_vce_clocks +ffffffff81f1ca90 t soc15_get_config_memsize +ffffffff81f1cab0 t soc15_need_full_reset +ffffffff81f1cae0 t soc15_get_pcie_usage +ffffffff81f1cc10 t soc15_need_reset_on_init +ffffffff81f1ccc0 t soc15_get_pcie_replay_count +ffffffff81f1cd30 t soc15_supports_baco +ffffffff81f1cd90 t soc15_pre_asic_init +ffffffff81f1cda0 t soc15_query_video_codecs +ffffffff81f1ce90 t vega20_get_pcie_usage +ffffffff81f1d000 T soc21_grbm_select +ffffffff81f1d090 t soc21_common_early_init +ffffffff81f1d200 t soc21_common_late_init +ffffffff81f1d2e0 t soc21_common_sw_init +ffffffff81f1d320 t soc21_common_sw_fini +ffffffff81f1d350 t soc21_common_hw_init +ffffffff81f1d410 t soc21_common_hw_fini +ffffffff81f1d4b0 t soc21_common_suspend +ffffffff81f1d550 t soc21_common_resume +ffffffff81f1d610 t soc21_common_is_idle +ffffffff81f1d640 t soc21_common_wait_for_idle +ffffffff81f1d670 t soc21_common_soft_reset +ffffffff81f1d6a0 t soc21_common_set_clockgating_state +ffffffff81f1d750 t soc21_common_set_powergating_state +ffffffff81f1d7b0 t soc21_common_get_clockgating_state +ffffffff81f1d800 t soc21_didt_rreg +ffffffff81f1d8a0 t soc21_didt_wreg +ffffffff81f1d920 t soc21_read_disabled_bios +ffffffff81f1d950 t soc21_read_register +ffffffff81f1da40 t soc21_asic_reset +ffffffff81f1db20 t soc21_asic_reset_method +ffffffff81f1dbe0 t soc21_get_xclk +ffffffff81f1dc10 t soc21_set_uvd_clocks +ffffffff81f1dc40 t soc21_set_vce_clocks +ffffffff81f1dc70 t soc21_get_config_memsize +ffffffff81f1dc90 t soc21_need_full_reset +ffffffff81f1dcf0 t soc21_init_doorbell_index +ffffffff81f1de10 t soc21_need_reset_on_init +ffffffff81f1deb0 t soc21_pre_asic_init +ffffffff81f1dee0 t soc21_update_umd_stable_pstate +ffffffff81f1df60 t soc21_query_video_codecs +ffffffff81f1f000 t tonga_ih_early_init +ffffffff81f1f050 t tonga_ih_sw_init +ffffffff81f1f0d0 t tonga_ih_sw_fini +ffffffff81f1f110 t tonga_ih_hw_init +ffffffff81f1f2f0 t tonga_ih_hw_fini +ffffffff81f1f390 t tonga_ih_suspend +ffffffff81f1f430 t tonga_ih_resume +ffffffff81f1f470 t tonga_ih_is_idle +ffffffff81f1f4c0 t tonga_ih_wait_for_idle +ffffffff81f1f560 t tonga_ih_check_soft_reset +ffffffff81f1f5c0 t tonga_ih_pre_soft_reset +ffffffff81f1f670 t tonga_ih_soft_reset +ffffffff81f1f740 t tonga_ih_post_soft_reset +ffffffff81f1f780 t tonga_ih_set_clockgating_state +ffffffff81f1f7b0 t tonga_ih_set_powergating_state +ffffffff81f1f7e0 t tonga_ih_get_wptr +ffffffff81f1f8d0 t tonga_ih_decode_iv +ffffffff81f1f950 t tonga_ih_set_rptr +ffffffff81f20000 t umc_v6_0_init_registers +ffffffff81f21000 t umc_v6_1_query_ras_error_count +ffffffff81f214e0 t umc_v6_1_query_ras_error_address +ffffffff81f217c0 t umc_v6_1_err_cnt_init +ffffffff81f22000 T umc_v6_7_convert_error_address +ffffffff81f22320 t umc_v6_7_query_ras_error_count +ffffffff81f22360 t umc_v6_7_query_ras_error_address +ffffffff81f22380 t umc_v6_7_query_ras_poison_mode +ffffffff81f223e0 t umc_v6_7_ecc_info_query_ras_error_count +ffffffff81f22400 t umc_v6_7_ecc_info_query_ras_error_address +ffffffff81f22420 t umc_v6_7_query_ecc_error_count +ffffffff81f22690 t umc_v6_7_reset_error_count_per_channel +ffffffff81f22790 t umc_v6_7_query_error_address +ffffffff81f228b0 t umc_v6_7_ecc_info_querry_ecc_error_count +ffffffff81f22a80 t umc_v6_7_ecc_info_query_error_address +ffffffff81f23000 t umc_v8_10_query_ras_error_count +ffffffff81f23040 t umc_v8_10_query_ras_error_address +ffffffff81f23060 t umc_v8_10_err_cnt_init +ffffffff81f23080 t umc_v8_10_query_ras_poison_mode +ffffffff81f230b0 t umc_v8_10_ecc_info_query_ras_error_count +ffffffff81f230d0 t umc_v8_10_ecc_info_query_ras_error_address +ffffffff81f230f0 t umc_v8_10_set_eeprom_table_version +ffffffff81f23120 t umc_v8_10_query_ecc_error_count +ffffffff81f231f0 t umc_v8_10_clear_error_count_per_channel +ffffffff81f23260 t umc_v8_10_query_error_address +ffffffff81f23390 t umc_v8_10_convert_error_address +ffffffff81f235b0 t umc_v8_10_err_cnt_init_per_channel +ffffffff81f23660 t umc_v8_10_ecc_info_query_ecc_error_count +ffffffff81f23740 t umc_v8_10_ecc_info_query_error_address +ffffffff81f24000 t umc_v8_7_query_ras_error_count +ffffffff81f24310 t umc_v8_7_query_ras_error_address +ffffffff81f244d0 t umc_v8_7_err_cnt_init +ffffffff81f24630 t umc_v8_7_ecc_info_query_ras_error_count +ffffffff81f24750 t umc_v8_7_ecc_info_query_ras_error_address +ffffffff81f25000 t uvd_v5_0_early_init +ffffffff81f25050 t uvd_v5_0_sw_init +ffffffff81f25140 t uvd_v5_0_sw_fini +ffffffff81f25190 t uvd_v5_0_hw_init +ffffffff81f25690 t uvd_v5_0_hw_fini +ffffffff81f25710 t uvd_v5_0_suspend +ffffffff81f25810 t uvd_v5_0_resume +ffffffff81f25860 t uvd_v5_0_is_idle +ffffffff81f258b0 t uvd_v5_0_wait_for_idle +ffffffff81f25940 t uvd_v5_0_soft_reset +ffffffff81f259e0 t uvd_v5_0_set_clockgating_state +ffffffff81f25b80 t uvd_v5_0_set_powergating_state +ffffffff81f25bc0 t uvd_v5_0_get_clockgating_state +ffffffff81f25c40 t uvd_v5_0_ring_get_rptr +ffffffff81f25c80 t uvd_v5_0_ring_get_wptr +ffffffff81f25cc0 t uvd_v5_0_ring_set_wptr +ffffffff81f25cf0 t uvd_v5_0_ring_emit_ib +ffffffff81f25f60 t uvd_v5_0_ring_emit_fence +ffffffff81f26510 t uvd_v5_0_ring_test_ring +ffffffff81f266b0 t uvd_v5_0_ring_insert_nop +ffffffff81f26810 t uvd_v5_0_set_interrupt_state +ffffffff81f26840 t uvd_v5_0_process_interrupt +ffffffff81f268a0 t uvd_v5_0_stop +ffffffff81f269b0 t uvd_v5_0_start +ffffffff81f28000 t uvd_v6_0_early_init +ffffffff81f28160 t uvd_v6_0_sw_init +ffffffff81f283c0 t uvd_v6_0_sw_fini +ffffffff81f28480 t uvd_v6_0_hw_init +ffffffff81f28a30 t uvd_v6_0_hw_fini +ffffffff81f28ab0 t uvd_v6_0_suspend +ffffffff81f28bb0 t uvd_v6_0_resume +ffffffff81f28c00 t uvd_v6_0_is_idle +ffffffff81f28c50 t uvd_v6_0_wait_for_idle +ffffffff81f28ce0 t uvd_v6_0_check_soft_reset +ffffffff81f28d60 t uvd_v6_0_pre_soft_reset +ffffffff81f28da0 t uvd_v6_0_soft_reset +ffffffff81f28e70 t uvd_v6_0_post_soft_reset +ffffffff81f28f10 t uvd_v6_0_set_clockgating_state +ffffffff81f290a0 t uvd_v6_0_set_powergating_state +ffffffff81f29110 t uvd_v6_0_get_clockgating_state +ffffffff81f291a0 t uvd_v6_0_ring_get_rptr +ffffffff81f291e0 t uvd_v6_0_ring_get_wptr +ffffffff81f29220 t uvd_v6_0_ring_set_wptr +ffffffff81f29250 t uvd_v6_0_ring_emit_ib +ffffffff81f295b0 t uvd_v6_0_ring_emit_fence +ffffffff81f29b60 t uvd_v6_0_ring_emit_pipeline_sync +ffffffff81f29f50 t uvd_v6_0_ring_emit_vm_flush +ffffffff81f2a2b0 t uvd_v6_0_ring_emit_hdp_flush +ffffffff81f2a2e0 t uvd_v6_0_ring_test_ring +ffffffff81f2a480 t uvd_v6_0_ring_insert_nop +ffffffff81f2a5e0 t uvd_v6_0_ring_emit_wreg +ffffffff81f2a860 t uvd_v6_0_enc_ring_get_rptr +ffffffff81f2a8c0 t uvd_v6_0_enc_ring_get_wptr +ffffffff81f2a920 t uvd_v6_0_enc_ring_set_wptr +ffffffff81f2a960 t uvd_v6_0_enc_ring_emit_ib +ffffffff81f2aba0 t uvd_v6_0_enc_ring_emit_fence +ffffffff81f2ade0 t uvd_v6_0_enc_ring_emit_pipeline_sync +ffffffff81f2af90 t uvd_v6_0_enc_ring_emit_vm_flush +ffffffff81f2b1a0 t uvd_v6_0_enc_ring_test_ring +ffffffff81f2b2f0 t uvd_v6_0_enc_ring_test_ib +ffffffff81f2b7d0 t uvd_v6_0_enc_ring_insert_end +ffffffff81f2b860 t uvd_v6_0_set_interrupt_state +ffffffff81f2b890 t uvd_v6_0_process_interrupt +ffffffff81f2b990 t uvd_v6_0_stop +ffffffff81f2baa0 t uvd_v6_0_start +ffffffff81f2d000 t uvd_v7_0_early_init +ffffffff81f2d270 t uvd_v7_0_sw_init +ffffffff81f2d690 t uvd_v7_0_sw_fini +ffffffff81f2d780 t uvd_v7_0_hw_init +ffffffff81f30540 t uvd_v7_0_hw_fini +ffffffff81f30850 t uvd_v7_0_suspend +ffffffff81f30900 t uvd_v7_0_resume +ffffffff81f30950 t uvd_v7_0_set_clockgating_state +ffffffff81f30980 t uvd_v7_0_ring_get_rptr +ffffffff81f30a20 t uvd_v7_0_ring_get_wptr +ffffffff81f30ac0 t uvd_v7_0_ring_set_wptr +ffffffff81f30b40 t uvd_v7_0_ring_patch_cs_in_place +ffffffff81f30bb0 t uvd_v7_0_ring_emit_ib +ffffffff81f30f50 t uvd_v7_0_ring_emit_fence +ffffffff81f315a0 t uvd_v7_0_ring_emit_vm_flush +ffffffff81f31610 t uvd_v7_0_ring_emit_hdp_flush +ffffffff81f31640 t uvd_v7_0_ring_test_ring +ffffffff81f318d0 t uvd_v7_0_ring_insert_nop +ffffffff81f31a70 t uvd_v7_0_ring_emit_wreg +ffffffff81f31d40 t uvd_v7_0_ring_emit_reg_wait +ffffffff81f320f0 t uvd_v7_0_enc_ring_get_rptr +ffffffff81f321e0 t uvd_v7_0_enc_ring_get_wptr +ffffffff81f322e0 t uvd_v7_0_enc_ring_set_wptr +ffffffff81f323e0 t uvd_v7_0_enc_ring_emit_ib +ffffffff81f32620 t uvd_v7_0_enc_ring_emit_fence +ffffffff81f32860 t uvd_v7_0_enc_ring_emit_vm_flush +ffffffff81f328d0 t uvd_v7_0_enc_ring_test_ring +ffffffff81f32a30 t uvd_v7_0_enc_ring_test_ib +ffffffff81f32f10 t uvd_v7_0_enc_ring_insert_end +ffffffff81f32fa0 t uvd_v7_0_enc_ring_emit_wreg +ffffffff81f330f0 t uvd_v7_0_enc_ring_emit_reg_wait +ffffffff81f332b0 t uvd_v7_0_set_interrupt_state +ffffffff81f332e0 t uvd_v7_0_process_interrupt +ffffffff81f34000 t vce_v3_0_early_init +ffffffff81f34180 t vce_v3_0_sw_init +ffffffff81f342e0 t vce_v3_0_sw_fini +ffffffff81f34330 t vce_v3_0_hw_init +ffffffff81f34400 t vce_v3_0_hw_fini +ffffffff81f344f0 t vce_v3_0_suspend +ffffffff81f345c0 t vce_v3_0_resume +ffffffff81f346a0 t vce_v3_0_is_idle +ffffffff81f34710 t vce_v3_0_wait_for_idle +ffffffff81f347c0 t vce_v3_0_check_soft_reset +ffffffff81f348c0 t vce_v3_0_pre_soft_reset +ffffffff81f34960 t vce_v3_0_soft_reset +ffffffff81f34a30 t vce_v3_0_post_soft_reset +ffffffff81f34ad0 t vce_v3_0_set_clockgating_state +ffffffff81f34dc0 t vce_v3_0_set_powergating_state +ffffffff81f355e0 t vce_v3_0_get_clockgating_state +ffffffff81f356a0 t vce_v3_0_ring_get_rptr +ffffffff81f35770 t vce_v3_0_ring_get_wptr +ffffffff81f35840 t vce_v3_0_ring_set_wptr +ffffffff81f35900 t vce_v3_0_ring_emit_ib +ffffffff81f35b40 t vce_v3_0_emit_pipeline_sync +ffffffff81f35cf0 t vce_v3_0_emit_vm_flush +ffffffff81f35f60 t vce_v3_0_set_interrupt_state +ffffffff81f35fd0 t vce_v3_0_process_interrupt +ffffffff81f36090 t vce_v3_0_stop +ffffffff81f37000 t vce_v4_0_early_init +ffffffff81f370b0 t vce_v4_0_sw_init +ffffffff81f37350 t vce_v4_0_sw_fini +ffffffff81f373d0 t vce_v4_0_hw_init +ffffffff81f37b90 t vce_v4_0_hw_fini +ffffffff81f37cc0 t vce_v4_0_suspend +ffffffff81f37de0 t vce_v4_0_resume +ffffffff81f37e90 t vce_v4_0_set_clockgating_state +ffffffff81f37ec0 t vce_v4_0_set_powergating_state +ffffffff81f37fa0 t vce_v4_0_ring_get_rptr +ffffffff81f38010 t vce_v4_0_ring_get_wptr +ffffffff81f380a0 t vce_v4_0_ring_set_wptr +ffffffff81f38130 t vce_v4_0_ring_emit_ib +ffffffff81f38370 t vce_v4_0_ring_emit_fence +ffffffff81f385b0 t vce_v4_0_emit_vm_flush +ffffffff81f38620 t vce_v4_0_ring_insert_end +ffffffff81f386b0 t vce_v4_0_emit_wreg +ffffffff81f38800 t vce_v4_0_emit_reg_wait +ffffffff81f389c0 t vce_v4_0_set_interrupt_state +ffffffff81f38a50 t vce_v4_0_process_interrupt +ffffffff81f38af0 t vce_v4_0_start +ffffffff81f3a000 T vcn_dec_sw_ring_emit_fence +ffffffff81f3a240 T vcn_dec_sw_ring_insert_end +ffffffff81f3a2d0 T vcn_dec_sw_ring_emit_ib +ffffffff81f3a510 T vcn_dec_sw_ring_emit_reg_wait +ffffffff81f3a6d0 T vcn_dec_sw_ring_emit_vm_flush +ffffffff81f3a740 T vcn_dec_sw_ring_emit_wreg +ffffffff81f3b000 T vcn_v1_0_set_pg_for_begin_use +ffffffff81f3b140 T vcn_v1_0_ring_end_use +ffffffff81f3b1b0 t vcn_v1_0_early_init +ffffffff81f3b310 t vcn_v1_0_sw_init +ffffffff81f3b5b0 t vcn_v1_0_sw_fini +ffffffff81f3b610 t vcn_v1_0_hw_init +ffffffff81f3b6e0 t vcn_v1_0_hw_fini +ffffffff81f3b7e0 t vcn_v1_0_suspend +ffffffff81f3b850 t vcn_v1_0_resume +ffffffff81f3b930 t vcn_v1_0_is_idle +ffffffff81f3b9c0 t vcn_v1_0_wait_for_idle +ffffffff81f3ba00 t vcn_v1_0_set_clockgating_state +ffffffff81f3bab0 t vcn_v1_0_set_powergating_state +ffffffff81f3c010 t vcn_v1_0_dec_ring_get_rptr +ffffffff81f3c0a0 t vcn_v1_0_dec_ring_get_wptr +ffffffff81f3c130 t vcn_v1_0_dec_ring_set_wptr +ffffffff81f3c240 t vcn_v1_0_ring_patch_cs_in_place +ffffffff81f3c400 t vcn_v1_0_dec_ring_emit_ib +ffffffff81f3c780 t vcn_v1_0_dec_ring_emit_fence +ffffffff81f3cd90 t vcn_v1_0_dec_ring_emit_vm_flush +ffffffff81f3ce00 t vcn_v1_0_dec_ring_insert_nop +ffffffff81f3cf90 t vcn_v1_0_dec_ring_insert_start +ffffffff81f3d160 t vcn_v1_0_dec_ring_insert_end +ffffffff81f3d270 t vcn_v1_0_ring_begin_use +ffffffff81f3d310 t vcn_v1_0_dec_ring_emit_wreg +ffffffff81f3d5c0 t vcn_v1_0_dec_ring_emit_reg_wait +ffffffff81f3d940 t vcn_v1_0_enc_ring_get_rptr +ffffffff81f3da20 t vcn_v1_0_enc_ring_get_wptr +ffffffff81f3db00 t vcn_v1_0_enc_ring_set_wptr +ffffffff81f3dbc0 t vcn_v1_0_enc_ring_emit_ib +ffffffff81f3de00 t vcn_v1_0_enc_ring_emit_fence +ffffffff81f3e040 t vcn_v1_0_enc_ring_emit_vm_flush +ffffffff81f3e0b0 t vcn_v1_0_enc_ring_insert_end +ffffffff81f3e140 t vcn_v1_0_enc_ring_emit_wreg +ffffffff81f3e290 t vcn_v1_0_enc_ring_emit_reg_wait +ffffffff81f3e450 t vcn_v1_0_set_interrupt_state +ffffffff81f3e480 t vcn_v1_0_process_interrupt +ffffffff81f3e530 t vcn_v1_0_idle_work_handler +ffffffff81f3e6a0 t vcn_v1_0_pause_dpg_mode +ffffffff81f3f540 t vcn_v1_0_enable_clock_gating +ffffffff81f3f970 t vcn_v1_0_disable_clock_gating +ffffffff81f3ff30 t vcn_1_0_enable_static_power_gating +ffffffff81f400e0 t vcn_v1_0_start_dpg_mode +ffffffff81f43ea0 t vcn_v1_0_start_spg_mode +ffffffff81f460a0 t vcn_v1_0_clock_gating_dpg_mode +ffffffff81f47000 T vcn_v2_0_dec_ring_insert_start +ffffffff81f471c0 T vcn_v2_0_dec_ring_insert_end +ffffffff81f472c0 T vcn_v2_0_dec_ring_insert_nop +ffffffff81f47430 T vcn_v2_0_dec_ring_emit_fence +ffffffff81f479f0 T vcn_v2_0_dec_ring_emit_ib +ffffffff81f47d50 T vcn_v2_0_dec_ring_emit_reg_wait +ffffffff81f480a0 T vcn_v2_0_dec_ring_emit_vm_flush +ffffffff81f48110 T vcn_v2_0_dec_ring_emit_wreg +ffffffff81f48390 T vcn_v2_0_enc_ring_emit_fence +ffffffff81f485d0 T vcn_v2_0_enc_ring_insert_end +ffffffff81f48660 T vcn_v2_0_enc_ring_emit_ib +ffffffff81f488a0 T vcn_v2_0_enc_ring_emit_reg_wait +ffffffff81f48a60 T vcn_v2_0_enc_ring_emit_vm_flush +ffffffff81f48ad0 T vcn_v2_0_enc_ring_emit_wreg +ffffffff81f48c20 T vcn_v2_0_dec_ring_test_ring +ffffffff81f48ec0 t vcn_v2_0_early_init +ffffffff81f49020 t vcn_v2_0_sw_init +ffffffff81f49350 t vcn_v2_0_sw_fini +ffffffff81f493d0 t vcn_v2_0_hw_init +ffffffff81f49d50 t vcn_v2_0_hw_fini +ffffffff81f49e50 t vcn_v2_0_suspend +ffffffff81f49e80 t vcn_v2_0_resume +ffffffff81f49ed0 t vcn_v2_0_is_idle +ffffffff81f49f60 t vcn_v2_0_wait_for_idle +ffffffff81f49fa0 t vcn_v2_0_set_clockgating_state +ffffffff81f4a030 t vcn_v2_0_set_powergating_state +ffffffff81f4a5f0 t vcn_v2_0_dec_ring_get_rptr +ffffffff81f4a680 t vcn_v2_0_dec_ring_get_wptr +ffffffff81f4a720 t vcn_v2_0_dec_ring_set_wptr +ffffffff81f4a860 t vcn_v2_0_enc_ring_get_rptr +ffffffff81f4a940 t vcn_v2_0_enc_ring_get_wptr +ffffffff81f4aa30 t vcn_v2_0_enc_ring_set_wptr +ffffffff81f4ab20 t vcn_v2_0_set_interrupt_state +ffffffff81f4ab50 t vcn_v2_0_process_interrupt +ffffffff81f4ac00 t vcn_v2_0_pause_dpg_mode +ffffffff81f4b3f0 t vcn_v2_0_enable_clock_gating +ffffffff81f4b680 t vcn_v2_0_disable_clock_gating +ffffffff81f4baa0 t vcn_v2_0_start +ffffffff81f50050 t vcn_v2_0_enable_static_power_gating +ffffffff81f501b0 t vcn_v2_0_clock_gating_dpg_mode +ffffffff81f50f30 t vcn_v2_0_mc_resume_dpg_mode +ffffffff81f56000 t vcn_v2_6_query_poison_status +ffffffff81f560e0 t vcn_v2_5_early_init +ffffffff81f563b0 t vcn_v2_5_sw_init +ffffffff81f56880 t vcn_v2_5_sw_fini +ffffffff81f56950 t vcn_v2_5_hw_init +ffffffff81f57390 t vcn_v2_5_hw_fini +ffffffff81f57500 t vcn_v2_5_suspend +ffffffff81f57530 t vcn_v2_5_resume +ffffffff81f57580 t vcn_v2_5_is_idle +ffffffff81f57670 t vcn_v2_5_wait_for_idle +ffffffff81f57710 t vcn_v2_5_set_clockgating_state +ffffffff81f57790 t vcn_v2_5_set_powergating_state +ffffffff81f599e0 t vcn_v2_5_dec_ring_get_rptr +ffffffff81f59a80 t vcn_v2_5_dec_ring_get_wptr +ffffffff81f59b30 t vcn_v2_5_dec_ring_set_wptr +ffffffff81f59be0 t vcn_v2_5_enc_ring_get_rptr +ffffffff81f59cd0 t vcn_v2_5_enc_ring_get_wptr +ffffffff81f59de0 t vcn_v2_5_enc_ring_set_wptr +ffffffff81f59ef0 t vcn_v2_5_set_interrupt_state +ffffffff81f59f20 t vcn_v2_5_process_interrupt +ffffffff81f5a010 t vcn_v2_6_set_ras_interrupt_state +ffffffff81f5a040 t vcn_v2_5_pause_dpg_mode +ffffffff81f5a7c0 t vcn_v2_5_enable_clock_gating +ffffffff81f5aad0 t vcn_v2_5_disable_clock_gating +ffffffff81f5afc0 t vcn_v2_5_start_dpg_mode +ffffffff81f5e990 t vcn_v2_5_clock_gating_dpg_mode +ffffffff81f5f740 t vcn_v2_5_mc_resume_dpg_mode +ffffffff81f64000 t vcn_v3_0_early_init +ffffffff81f64220 t vcn_v3_0_sw_init +ffffffff81f646e0 t vcn_v3_0_sw_fini +ffffffff81f647c0 t vcn_v3_0_hw_init +ffffffff81f65310 t vcn_v3_0_hw_fini +ffffffff81f65410 t vcn_v3_0_suspend +ffffffff81f65440 t vcn_v3_0_resume +ffffffff81f65490 t vcn_v3_0_is_idle +ffffffff81f65580 t vcn_v3_0_wait_for_idle +ffffffff81f65620 t vcn_v3_0_set_clockgating_state +ffffffff81f65730 t vcn_v3_0_set_powergating_state +ffffffff81f67cc0 t vcn_v3_0_dec_ring_get_rptr +ffffffff81f67d60 t vcn_v3_0_dec_ring_get_wptr +ffffffff81f67e10 t vcn_v3_0_dec_ring_set_wptr +ffffffff81f67f80 t vcn_v3_0_ring_patch_cs_in_place +ffffffff81f682a0 t vcn_v3_0_enc_ring_get_rptr +ffffffff81f68390 t vcn_v3_0_enc_ring_get_wptr +ffffffff81f684a0 t vcn_v3_0_enc_ring_set_wptr +ffffffff81f685b0 t vcn_v3_0_set_interrupt_state +ffffffff81f685e0 t vcn_v3_0_process_interrupt +ffffffff81f686d0 t vcn_v3_0_pause_dpg_mode +ffffffff81f68f00 t vcn_v3_0_enable_clock_gating +ffffffff81f69190 t vcn_v3_0_disable_clock_gating +ffffffff81f696c0 t vcn_v3_0_start_dpg_mode +ffffffff81f6c9b0 t vcn_v3_0_clock_gating_dpg_mode +ffffffff81f6d790 t vcn_v3_0_mc_resume_dpg_mode +ffffffff81f72000 t vcn_v4_0_query_ras_poison_status +ffffffff81f720e0 t vcn_v4_0_early_init +ffffffff81f722a0 t vcn_v4_0_sw_init +ffffffff81f72560 t vcn_v4_0_sw_fini +ffffffff81f72640 t vcn_v4_0_hw_init +ffffffff81f73070 t vcn_v4_0_hw_fini +ffffffff81f731c0 t vcn_v4_0_suspend +ffffffff81f731f0 t vcn_v4_0_resume +ffffffff81f73240 t vcn_v4_0_is_idle +ffffffff81f73340 t vcn_v4_0_wait_for_idle +ffffffff81f733f0 t vcn_v4_0_set_clockgating_state +ffffffff81f73500 t vcn_v4_0_set_powergating_state +ffffffff81f73d40 t vcn_v4_0_unified_ring_get_rptr +ffffffff81f73e20 t vcn_v4_0_unified_ring_get_wptr +ffffffff81f73f10 t vcn_v4_0_unified_ring_set_wptr +ffffffff81f74010 t vcn_v4_0_ring_patch_cs_in_place +ffffffff81f743a0 t vcn_v4_0_limit_sched +ffffffff81f74400 t vcn_v4_0_set_interrupt_state +ffffffff81f74430 t vcn_v4_0_process_interrupt +ffffffff81f744f0 t vcn_v4_0_set_ras_interrupt_state +ffffffff81f74520 t vcn_v4_0_pause_dpg_mode +ffffffff81f747a0 t vcn_v4_0_enable_clock_gating +ffffffff81f74aa0 t vcn_v4_0_disable_clock_gating +ffffffff81f74f60 t vcn_v4_0_start +ffffffff81f79a50 t vcn_v4_0_disable_clock_gating_dpg_mode +ffffffff81f7a830 t vcn_v4_0_mc_resume_dpg_mode +ffffffff81f7f000 t vcn_v4_0_3_early_init +ffffffff81f7f100 t vcn_v4_0_3_sw_init +ffffffff81f7f380 t vcn_v4_0_3_sw_fini +ffffffff81f7f440 t vcn_v4_0_3_hw_init +ffffffff81f80140 t vcn_v4_0_3_hw_fini +ffffffff81f801d0 t vcn_v4_0_3_suspend +ffffffff81f80240 t vcn_v4_0_3_resume +ffffffff81f80290 t vcn_v4_0_3_is_idle +ffffffff81f80400 t vcn_v4_0_3_wait_for_idle +ffffffff81f80500 t vcn_v4_0_3_set_clockgating_state +ffffffff81f80690 t vcn_v4_0_3_set_powergating_state +ffffffff81f80d80 t vcn_v4_0_3_unified_ring_get_rptr +ffffffff81f80ef0 t vcn_v4_0_3_unified_ring_get_wptr +ffffffff81f81080 t vcn_v4_0_3_unified_ring_set_wptr +ffffffff81f81230 t vcn_v4_0_3_set_interrupt_state +ffffffff81f81260 t vcn_v4_0_3_process_interrupt +ffffffff81f81370 t vcn_v4_0_3_query_ras_error_count +ffffffff81f81460 t vcn_v4_0_3_reset_ras_error_count +ffffffff81f81550 t vcn_v4_0_3_pause_dpg_mode +ffffffff81f81580 t vcn_v4_0_3_enable_clock_gating +ffffffff81f818a0 t vcn_v4_0_3_disable_clock_gating +ffffffff81f81d80 t vcn_v4_0_3_start +ffffffff81f864a0 t vcn_v4_0_3_disable_clock_gating_dpg_mode +ffffffff81f87240 t vcn_v4_0_3_mc_resume_dpg_mode +ffffffff81f8c000 t vega10_ih_early_init +ffffffff81f8c050 t vega10_ih_sw_init +ffffffff81f8c300 t vega10_ih_sw_fini +ffffffff81f8c340 t vega10_ih_hw_init +ffffffff81f8c6c0 t vega10_ih_hw_fini +ffffffff81f8c710 t vega10_ih_suspend +ffffffff81f8c760 t vega10_ih_resume +ffffffff81f8c770 t vega10_ih_is_idle +ffffffff81f8c7a0 t vega10_ih_wait_for_idle +ffffffff81f8c7d0 t vega10_ih_soft_reset +ffffffff81f8c800 t vega10_ih_set_clockgating_state +ffffffff81f8c950 t vega10_ih_set_powergating_state +ffffffff81f8c980 t vega10_ih_get_wptr +ffffffff81f8ca90 t vega10_ih_set_rptr +ffffffff81f8cb60 t vega10_ih_self_irq +ffffffff81f8cbe0 t vega10_ih_toggle_interrupts +ffffffff81f8d000 T vega10_reg_base_init +ffffffff81f8d150 T vega10_doorbell_index_init +ffffffff81f8e000 t vega20_ih_early_init +ffffffff81f8e050 t vega20_ih_sw_init +ffffffff81f8e330 t vega20_ih_sw_fini +ffffffff81f8e370 t vega20_ih_hw_init +ffffffff81f8e990 t vega20_ih_hw_fini +ffffffff81f8e9e0 t vega20_ih_suspend +ffffffff81f8ea30 t vega20_ih_resume +ffffffff81f8ea40 t vega20_ih_is_idle +ffffffff81f8ea70 t vega20_ih_wait_for_idle +ffffffff81f8eaa0 t vega20_ih_soft_reset +ffffffff81f8ead0 t vega20_ih_set_clockgating_state +ffffffff81f8ec00 t vega20_ih_set_powergating_state +ffffffff81f8ec30 t vega20_ih_get_wptr +ffffffff81f8ed40 t vega20_ih_set_rptr +ffffffff81f8ee10 t vega20_ih_self_irq +ffffffff81f8ee90 t vega20_ih_toggle_interrupts +ffffffff81f90000 T vega20_reg_base_init +ffffffff81f90160 T vega20_doorbell_index_init +ffffffff81f91000 T vi_srbm_select +ffffffff81f91050 T vi_set_virt_ops +ffffffff81f91090 T vi_set_ip_blocks +ffffffff81f914c0 T legacy_doorbell_index_init +ffffffff81f91570 t vi_common_early_init +ffffffff81f91860 t vi_common_late_init +ffffffff81f918a0 t vi_common_sw_init +ffffffff81f918e0 t vi_common_sw_fini +ffffffff81f91910 t vi_common_hw_init +ffffffff81f91fd0 t vi_common_hw_fini +ffffffff81f92050 t vi_common_suspend +ffffffff81f920d0 t vi_common_resume +ffffffff81f92110 t vi_common_is_idle +ffffffff81f92140 t vi_common_wait_for_idle +ffffffff81f92170 t vi_common_soft_reset +ffffffff81f921a0 t vi_common_set_clockgating_state +ffffffff81f92710 t vi_common_set_powergating_state +ffffffff81f92740 t vi_common_get_clockgating_state +ffffffff81f92800 t cz_smc_rreg +ffffffff81f92880 t cz_smc_wreg +ffffffff81f928f0 t vi_smc_rreg +ffffffff81f92970 t vi_smc_wreg +ffffffff81f929e0 t vi_pcie_rreg +ffffffff81f92a80 t vi_pcie_wreg +ffffffff81f92b10 t vi_uvd_ctx_rreg +ffffffff81f92ba0 t vi_uvd_ctx_wreg +ffffffff81f92c10 t vi_didt_rreg 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+ffffffff81f95070 T amdgpu_dm_update_connector_after_detect +ffffffff81f955c0 T amdgpu_dm_update_freesync_caps +ffffffff81f95a00 T dm_atomic_get_state +ffffffff81f95a70 T amdgpu_dm_connector_atomic_set_property +ffffffff81f95b30 T amdgpu_dm_connector_atomic_get_property +ffffffff81f95bd0 T amdgpu_dm_connector_funcs_reset +ffffffff81f95cc0 T amdgpu_dm_connector_atomic_duplicate_state +ffffffff81f95dc0 T create_validate_stream_for_sink +ffffffff81f974b0 T amdgpu_dm_connector_mode_valid +ffffffff81f97680 T convert_dc_color_depth_into_bpc +ffffffff81f976c0 t dm_encoder_helper_disable +ffffffff81f976f0 t dm_encoder_helper_atomic_check +ffffffff81f978d0 T amdgpu_dm_connector_init_helper +ffffffff81f97c30 T amdgpu_dm_get_encoder_crtc_mask +ffffffff81f97c80 T dm_restore_drm_connector_state +ffffffff81f97df0 t parse_hdmi_amd_vsdb +ffffffff81f98120 T amdgpu_dm_trigger_timing_sync +ffffffff81f982f0 T dm_write_reg_func +ffffffff81f98310 T dm_read_reg_func +ffffffff81f983b0 T amdgpu_dm_process_dmub_aux_transfer_sync +ffffffff81f985c0 T amdgpu_dm_process_dmub_set_config_sync +ffffffff81f98730 T check_seamless_boot_capability +ffffffff81f98780 T dm_execute_dmub_cmd +ffffffff81f987a0 T dm_execute_dmub_cmd_list +ffffffff81f987c0 t dm_early_init +ffffffff81f98b70 t dm_late_init +ffffffff81f98e10 t dm_sw_init +ffffffff81f993c0 t dm_sw_fini +ffffffff81f99450 t amdgpu_dm_early_fini +ffffffff81f994b0 t dm_hw_init +ffffffff81f9b2e0 t dm_hw_fini +ffffffff81f9b330 t dm_suspend +ffffffff81f9b6b0 t dm_resume +ffffffff81f9bf10 t dm_is_idle +ffffffff81f9bf40 t dm_wait_for_idle +ffffffff81f9bf70 t dm_check_soft_reset +ffffffff81f9bfa0 t dm_soft_reset +ffffffff81f9bfd0 t dm_set_clockgating_state +ffffffff81f9c000 t dm_set_powergating_state +ffffffff81f9c030 t dm_bandwidth_update +ffffffff81f9c060 t dm_vblank_get_counter +ffffffff81f9c0d0 t dm_crtc_get_scanoutpos +ffffffff81f9c190 t amdgpu_dm_dmub_reg_read +ffffffff81f9c240 t amdgpu_dm_dmub_reg_write +ffffffff81f9c270 t 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amdgpu_dm_plane_fill_plane_buffer_attributes +ffffffff81fb26a0 T amdgpu_dm_plane_helper_check_state +ffffffff81fb28c0 T amdgpu_dm_plane_fill_dc_scaling_info +ffffffff81fb2b20 T amdgpu_dm_plane_handle_cursor_update +ffffffff81fb2db0 T amdgpu_dm_plane_init +ffffffff81fb3bb0 T is_video_format +ffffffff81fb3c00 t dm_drm_plane_reset +ffffffff81fb3c90 t dm_drm_plane_duplicate_state +ffffffff81fb3d20 t dm_drm_plane_destroy_state +ffffffff81fb3d60 t dm_plane_format_mod_supported +ffffffff81fb3e90 t dm_plane_helper_prepare_fb +ffffffff81fb4140 t dm_plane_helper_cleanup_fb +ffffffff81fb41e0 t dm_plane_atomic_check +ffffffff81fb42b0 t dm_plane_atomic_async_check +ffffffff81fb42f0 t dm_plane_atomic_async_update +ffffffff81fb43a0 t amdgpu_bo_reserve +ffffffff81fb45a0 t amdgpu_bo_unreserve +ffffffff81fb5000 T dm_pp_apply_display_requirements +ffffffff81fb51d0 T dm_pp_get_clock_levels_by_type +ffffffff81fb5510 T dm_pp_get_clock_levels_by_type_with_latency +ffffffff81fb56d0 T dm_pp_get_clock_levels_by_type_with_voltage +ffffffff81fb5880 T dm_pp_notify_wm_clock_changes +ffffffff81fb58d0 T dm_pp_apply_power_level_change_request +ffffffff81fb5900 T dm_pp_apply_clock_for_voltage_request +ffffffff81fb59a0 T dm_pp_get_static_clocks +ffffffff81fb5a60 T dm_pp_get_funcs +ffffffff81fb5b70 t pp_rv_set_wm_ranges +ffffffff81fb5cf0 t pp_rv_set_pme_wa_enable +ffffffff81fb5d10 t pp_rv_set_active_display_count +ffffffff81fb5d30 t pp_rv_set_min_deep_sleep_dcfclk +ffffffff81fb5d50 t pp_rv_set_hard_min_dcefclk_by_freq +ffffffff81fb5d70 t pp_rv_set_hard_min_fclk_by_freq +ffffffff81fb5d90 t pp_nv_set_display_count +ffffffff81fb5df0 t pp_nv_set_hard_min_dcefclk_by_freq +ffffffff81fb5e60 t pp_nv_set_min_deep_sleep_dcfclk +ffffffff81fb5ec0 t pp_nv_set_voltage_by_freq +ffffffff81fb5f50 t pp_nv_set_wm_ranges +ffffffff81fb5fa0 t pp_nv_set_hard_min_uclk_by_freq +ffffffff81fb6010 t pp_nv_get_maximum_sustainable_clocks +ffffffff81fb6070 t pp_nv_get_uclk_dpm_states +ffffffff81fb60d0 t pp_nv_set_pstate_handshake_support +ffffffff81fb6120 t pp_rn_set_wm_ranges +ffffffff81fb6170 t pp_rn_get_dpm_clock_table +ffffffff81fb7000 T amdgpu_dm_set_psr_caps +ffffffff81fb7150 T amdgpu_dm_link_setup_psr +ffffffff81fb72e0 T amdgpu_dm_psr_enable +ffffffff81fb73e0 T amdgpu_dm_psr_disable +ffffffff81fb7460 T amdgpu_dm_psr_disable_all +ffffffff81fb8000 T amdgpu_dm_setup_replay +ffffffff81fb80f0 T amdgpu_dm_replay_enable +ffffffff81fb8270 T amdgpu_dm_replay_disable +ffffffff81fb9000 T dm_get_elapse_time_in_ns +ffffffff81fb9030 T dm_perf_trace_timestamp +ffffffff81fba000 T dc_assert_fp_enabled +ffffffff81fba070 T dc_fpu_begin +ffffffff81fba0c0 T dc_fpu_end +ffffffff81fbb000 T dal_vector_construct +ffffffff81fbb0d0 T dal_vector_presized_create +ffffffff81fbb340 T dal_vector_create +ffffffff81fbb460 T dal_vector_destruct +ffffffff81fbb4b0 T dal_vector_destroy +ffffffff81fbb530 T dal_vector_get_count +ffffffff81fbb560 T dal_vector_at_index +ffffffff81fbb5a0 T dal_vector_remove_at_index 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dc_fixpt_u4d19 +ffffffff81fbf160 T dc_fixpt_u3d19 +ffffffff81fbf1a0 T dc_fixpt_u2d19 +ffffffff81fbf1e0 T dc_fixpt_u0d19 +ffffffff81fbf210 T dc_fixpt_clamp_u0d14 +ffffffff81fbf260 T dc_fixpt_clamp_u0d10 +ffffffff81fbf2b0 T dc_fixpt_s4d19 +ffffffff81fc0000 T bios_parser_create +ffffffff81fc1270 t bios_parser_get_connectors_number +ffffffff81fc12d0 t bios_parser_get_connector_id +ffffffff81fc1360 t bios_parser_get_src_obj +ffffffff81fc1460 t bios_parser_get_i2c_info +ffffffff81fc1680 t bios_parser_get_hpd_info +ffffffff81fc1760 t bios_parser_get_device_tag +ffffffff81fc1960 t bios_parser_get_spread_spectrum_info +ffffffff81fc1b60 t bios_parser_get_ss_entry_number +ffffffff81fc1da0 t bios_parser_get_embedded_panel_info +ffffffff81fc2310 t bios_parser_get_gpio_pin_info +ffffffff81fc2420 t bios_parser_get_encoder_cap_info +ffffffff81fc2520 t bios_parser_set_scratch_critical_state +ffffffff81fc2530 t bios_parser_is_device_id_supported +ffffffff81fc25f0 t bios_parser_encoder_control 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bios_parser_get_hpd_info +ffffffff81fc66d0 t bios_parser_get_device_tag +ffffffff81fc69a0 t bios_parser_get_spread_spectrum_info +ffffffff81fc6d70 t bios_parser_get_ss_entry_number +ffffffff81fc6da0 t bios_parser_get_embedded_panel_info +ffffffff81fc6fa0 t bios_parser_get_gpio_pin_info +ffffffff81fc70c0 t bios_parser_get_encoder_cap_info +ffffffff81fc7230 t bios_parser_is_accelerated_mode +ffffffff81fc7240 t bios_parser_set_scratch_critical_state +ffffffff81fc7250 t bios_parser_is_device_id_supported +ffffffff81fc72c0 t bios_parser_encoder_control +ffffffff81fc7300 t bios_parser_transmitter_control +ffffffff81fc7340 t bios_parser_enable_crtc +ffffffff81fc7390 t bios_parser_set_pixel_clock +ffffffff81fc73d0 t bios_parser_set_dce_clock +ffffffff81fc7410 t bios_parser_program_crtc_timing +ffffffff81fc7450 t bios_parser_enable_disp_power_gating +ffffffff81fc7490 t firmware_parser_destroy +ffffffff81fc7550 t bios_get_board_layout_info +ffffffff81fc79f0 t bios_parser_pack_data_tables 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get_smu_clock_info_v3_1 +ffffffff81fd0210 t enable_lvtma_control +ffffffff81fd1000 T dal_bios_parser_init_cmd_tbl_helper +ffffffff81fd10a0 T dal_cmd_table_helper_controller_id_to_atom +ffffffff81fd11c0 T dal_cmd_table_helper_transmitter_bp_to_atom +ffffffff81fd1240 T dal_cmd_table_helper_encoder_mode_bp_to_atom +ffffffff81fd12d0 T dal_cmd_table_helper_assign_control_parameter +ffffffff81fd1390 T dal_cmd_table_helper_clock_source_id_to_ref_clk_src +ffffffff81fd1470 T dal_cmd_table_helper_encoder_id_to_atom +ffffffff81fd2000 T dal_bios_parser_init_cmd_tbl_helper2 +ffffffff81fd20b0 T dal_cmd_table_helper_controller_id_to_atom2 +ffffffff81fd21c0 T dal_cmd_table_helper_transmitter_bp_to_atom2 +ffffffff81fd2240 T dal_cmd_table_helper_encoder_mode_bp_to_atom2 +ffffffff81fd22d0 T dal_cmd_table_helper_clock_source_id_to_ref_clk_src2 +ffffffff81fd23b0 T dal_cmd_table_helper_encoder_id_to_atom2 +ffffffff81fd3000 T dal_cmd_tbl_helper_dce110_get_table +ffffffff81fd3030 t encoder_action_to_atom +ffffffff81fd30b0 t engine_bp_to_atom +ffffffff81fd3100 t clock_source_id_to_atom +ffffffff81fd31a0 t clock_source_id_to_atom_phy_clk_src_id +ffffffff81fd31f0 t signal_type_to_atom_dig_mode +ffffffff81fd3250 t hpd_sel_to_atom +ffffffff81fd3290 t dig_encoder_sel_to_atom +ffffffff81fd32c0 t phy_id_to_atom +ffffffff81fd3300 t disp_power_gating_action_to_atom +ffffffff81fd4000 T dal_cmd_tbl_helper_dce112_get_table2 +ffffffff81fd4030 t encoder_action_to_atom +ffffffff81fd40b0 t engine_bp_to_atom +ffffffff81fd4100 t clock_source_id_to_atom +ffffffff81fd41d0 t clock_source_id_to_atom_phy_clk_src_id +ffffffff81fd4220 t signal_type_to_atom_dig_mode +ffffffff81fd4280 t hpd_sel_to_atom +ffffffff81fd42c0 t dig_encoder_sel_to_atom +ffffffff81fd42f0 t phy_id_to_atom +ffffffff81fd4330 t disp_power_gating_action_to_atom +ffffffff81fd43a0 t dc_clock_type_to_atom +ffffffff81fd4420 t transmitter_color_depth_to_atom +ffffffff81fd5000 T dal_cmd_tbl_helper_dce112_get_table +ffffffff81fd5030 t encoder_action_to_atom +ffffffff81fd50b0 t engine_bp_to_atom +ffffffff81fd5100 t clock_source_id_to_atom +ffffffff81fd51d0 t clock_source_id_to_atom_phy_clk_src_id +ffffffff81fd5220 t signal_type_to_atom_dig_mode +ffffffff81fd5280 t hpd_sel_to_atom +ffffffff81fd52c0 t dig_encoder_sel_to_atom +ffffffff81fd52f0 t phy_id_to_atom +ffffffff81fd5330 t disp_power_gating_action_to_atom +ffffffff81fd53a0 t dc_clock_type_to_atom +ffffffff81fd5420 t transmitter_color_depth_to_atom +ffffffff81fd6000 T dal_cmd_tbl_helper_dce80_get_table +ffffffff81fd6030 t encoder_action_to_atom +ffffffff81fd60b0 t engine_bp_to_atom +ffffffff81fd6100 t clock_source_id_to_atom +ffffffff81fd61d0 t clock_source_id_to_atom_phy_clk_src_id +ffffffff81fd6220 t signal_type_to_atom_dig_mode +ffffffff81fd6280 t hpd_sel_to_atom +ffffffff81fd62c0 t dig_encoder_sel_to_atom +ffffffff81fd6310 t phy_id_to_atom +ffffffff81fd6350 t disp_power_gating_action_to_atom +ffffffff81fd7000 T clk_mgr_helper_get_active_display_cnt +ffffffff81fd70e0 T clk_mgr_helper_get_active_plane_cnt +ffffffff81fd7190 T clk_mgr_exit_optimized_pwr_state +ffffffff81fd72a0 T clk_mgr_optimize_pwr_state +ffffffff81fd7390 T dc_clk_mgr_create +ffffffff81fd7a50 T dc_destroy_clk_mgr +ffffffff81fd8000 T dentist_get_divider_from_did +ffffffff81fd8070 T dce_adjust_dp_ref_freq_for_ss +ffffffff81fd8170 T dce_get_dp_ref_freq_khz +ffffffff81fd82a0 T dce12_get_dp_ref_freq_khz +ffffffff81fd82c0 T dce_get_max_pixel_clock_for_all_paths +ffffffff81fd84d0 T dce_get_required_clocks_state +ffffffff81fd8580 T dce_set_clock +ffffffff81fd86e0 T dce_clock_read_ss_info +ffffffff81fd8800 T dce_clk_mgr_construct +ffffffff81fd89f0 t dce_update_clocks +ffffffff81fd9000 T dce110_get_min_vblank_time_us +ffffffff81fd9090 T dce110_fill_display_configs +ffffffff81fd9300 T dce11_pplib_apply_display_requirements +ffffffff81fd95f0 T dce110_clk_mgr_construct +ffffffff81fd96a0 t dce11_update_clocks +ffffffff81fda000 T dce112_set_clock +ffffffff81fda180 T dce112_set_dispclk +ffffffff81fda2a0 T dce112_set_dprefclk +ffffffff81fda310 T dce112_clk_mgr_construct +ffffffff81fda3c0 t dce112_update_clocks +ffffffff81fdb000 T dce120_clk_mgr_construct +ffffffff81fdb090 T dce121_clk_mgr_construct +ffffffff81fdb1c0 t dce12_update_clocks +ffffffff81fdc000 T rv1_clk_mgr_construct +ffffffff81fdc0c0 t rv1_update_clocks +ffffffff81fdc5a0 t rv1_init_clocks +ffffffff81fdc630 t rv1_enable_pme_wa +ffffffff81fdd000 T rv1_vbios_smu_set_dispclk +ffffffff81fdd0e0 t rv1_vbios_smu_send_msg_with_param +ffffffff81fdd1f0 T rv1_vbios_smu_set_dprefclk +ffffffff81fde000 T rv2_clk_mgr_construct +ffffffff81fdf000 T dentist_get_did_from_divider +ffffffff81fdf080 T dcn20_update_clocks_update_dpp_dto +ffffffff81fdf150 T dcn20_update_clocks_update_dentist +ffffffff81fdf640 T dcn2_update_clocks +ffffffff81fdfbc0 T dcn2_read_clocks_from_hw_dentist +ffffffff81fdfc90 T dcn2_update_clocks_fpga +ffffffff81fdfdc0 T dcn2_init_clocks +ffffffff81fdfe60 T dcn2_get_clock +ffffffff81fdfed0 T dcn20_clk_mgr_construct +ffffffff81fe0000 t dcn2_enable_pme_wa +ffffffff81fe0050 t dcn2_are_clock_states_equal +ffffffff81fe00c0 t dcn2_notify_link_rate_change +ffffffff81fe1000 T dcn201_clk_mgr_construct +ffffffff81fe1120 t dcn201_update_clocks +ffffffff81fe1340 t dcn201_init_clocks +ffffffff81fe2000 T rn_clk_mgr_construct +ffffffff81fe28a0 t rn_update_clocks +ffffffff81fe2e60 t rn_set_low_power_state +ffffffff81fe3040 t rn_init_clocks +ffffffff81fe30e0 t rn_enable_pme_wa +ffffffff81fe30f0 t rn_are_clock_states_equal +ffffffff81fe3140 t rn_notify_wm_ranges +ffffffff81fe34d0 t rn_notify_link_rate_change +ffffffff81fe4000 T rn_vbios_smu_get_smu_version +ffffffff81fe4020 t rn_vbios_smu_send_msg_with_param +ffffffff81fe41b0 T rn_vbios_smu_set_dispclk +ffffffff81fe42d0 T rn_vbios_smu_set_dprefclk +ffffffff81fe4340 T rn_vbios_smu_set_hard_min_dcfclk +ffffffff81fe43c0 T rn_vbios_smu_set_min_deep_sleep_dcfclk +ffffffff81fe4440 T rn_vbios_smu_set_phyclk +ffffffff81fe4480 T rn_vbios_smu_set_dppclk +ffffffff81fe4530 T rn_vbios_smu_set_dcn_low_power_state +ffffffff81fe4550 T rn_vbios_smu_enable_48mhz_tmdp_refclk_pwrdwn +ffffffff81fe4570 T rn_vbios_smu_enable_pme_wa +ffffffff81fe4590 T rn_vbios_smu_is_periodic_retraining_disabled +ffffffff81fe5000 T dcn3_init_clocks +ffffffff81fe53b0 t dcn3_init_clocks_fpga +ffffffff81fe53c0 T dcn3_clk_mgr_construct +ffffffff81fe5510 T dcn3_clk_mgr_destroy +ffffffff81fe5570 t dcn3_update_clocks +ffffffff81fe5990 t dcn3_enable_pme_wa +ffffffff81fe59d0 t dcn3_are_clock_states_equal +ffffffff81fe5a30 t dcn3_notify_wm_ranges +ffffffff81fe5cc0 t dcn30_notify_link_rate_change +ffffffff81fe5de0 t dcn3_set_hard_min_memclk +ffffffff81fe5e80 t dcn3_set_hard_max_memclk +ffffffff81fe5ee0 t dcn3_set_max_memclk +ffffffff81fe5f20 t dcn3_set_min_memclk +ffffffff81fe5f60 t dcn3_get_memclk_states_from_smu +ffffffff81fe60a0 t dcn3_is_smu_present +ffffffff81fe7000 T dcn30_smu_test_message +ffffffff81fe7070 t dcn30_smu_send_msg_with_param +ffffffff81fe71d0 T dcn30_smu_get_smu_version +ffffffff81fe71f0 T dcn30_smu_check_driver_if_version +ffffffff81fe7240 T dcn30_smu_check_msg_header_version +ffffffff81fe7290 T dcn30_smu_set_dram_addr_high +ffffffff81fe72b0 T dcn30_smu_set_dram_addr_low +ffffffff81fe72d0 T dcn30_smu_transfer_wm_table_smu_2_dram +ffffffff81fe72f0 T dcn30_smu_transfer_wm_table_dram_2_smu +ffffffff81fe7310 T dcn30_smu_set_hard_min_by_freq +ffffffff81fe7360 T dcn30_smu_set_hard_max_by_freq +ffffffff81fe73b0 T dcn30_smu_get_dpm_freq_by_index +ffffffff81fe7400 T dcn30_smu_get_dc_mode_max_dpm_freq +ffffffff81fe7450 T dcn30_smu_set_min_deep_sleep_dcef_clk +ffffffff81fe7470 T dcn30_smu_set_num_of_displays +ffffffff81fe7490 T dcn30_smu_set_display_refresh_from_mall +ffffffff81fe74c0 T dcn30_smu_set_external_client_df_cstate_allow +ffffffff81fe74e0 T dcn30_smu_set_pme_workaround +ffffffff81fe8000 T dcn301_smu_get_smu_version +ffffffff81fe8070 t dcn301_smu_send_msg_with_param +ffffffff81fe81f0 T dcn301_smu_set_dispclk +ffffffff81fe8290 T dcn301_smu_set_dprefclk +ffffffff81fe8340 T dcn301_smu_set_hard_min_dcfclk +ffffffff81fe83e0 T dcn301_smu_set_min_deep_sleep_dcfclk +ffffffff81fe8480 T dcn301_smu_set_dppclk +ffffffff81fe8520 T dcn301_smu_set_display_idle_optimization +ffffffff81fe8570 T dcn301_smu_enable_phy_refclk_pwrdwn +ffffffff81fe85c0 T dcn301_smu_enable_pme_wa +ffffffff81fe85e0 T dcn301_smu_set_dram_addr_high +ffffffff81fe8630 T dcn301_smu_set_dram_addr_low +ffffffff81fe8680 T dcn301_smu_transfer_dpm_table_smu_2_dram +ffffffff81fe86a0 T dcn301_smu_transfer_wm_table_dram_2_smu +ffffffff81fe9000 T vg_clk_mgr_construct +ffffffff81fe9840 T vg_clk_mgr_destroy +ffffffff81fe9890 t vg_update_clocks +ffffffff81fe9bd0 t vg_init_clocks +ffffffff81fe9c70 t vg_enable_pme_wa +ffffffff81fe9c80 t vg_are_clock_states_equal +ffffffff81fe9cd0 t vg_notify_wm_ranges +ffffffff81feb000 T dcn31_update_clocks +ffffffff81feb610 T dcn31_init_clocks +ffffffff81feb6c0 T dcn31_are_clock_states_equal +ffffffff81feb720 T dcn31_get_dtb_ref_freq_khz +ffffffff81feb750 T dcn31_clk_mgr_construct +ffffffff81febe20 T dcn31_clk_mgr_destroy +ffffffff81febe70 t dcn31_set_low_power_state +ffffffff81fec080 t dcn31_enable_pme_wa +ffffffff81fec090 t dcn31_notify_wm_ranges +ffffffff81fec410 t find_clk_for_voltage +ffffffff81fed000 T dcn31_smu_get_smu_version +ffffffff81fed020 t dcn31_smu_send_msg_with_param +ffffffff81fed230 T dcn31_smu_set_dispclk +ffffffff81fed2a0 T dcn31_smu_set_dprefclk +ffffffff81fed310 T dcn31_smu_set_hard_min_dcfclk +ffffffff81fed390 T dcn31_smu_set_min_deep_sleep_dcfclk +ffffffff81fed410 T dcn31_smu_set_dppclk +ffffffff81fed480 T dcn31_smu_set_display_idle_optimization +ffffffff81fed4d0 T dcn31_smu_enable_phy_refclk_pwrdwn +ffffffff81fed520 T dcn31_smu_enable_pme_wa +ffffffff81fed560 T dcn31_smu_set_dram_addr_high +ffffffff81fed5a0 T dcn31_smu_set_dram_addr_low +ffffffff81fed5e0 T dcn31_smu_transfer_dpm_table_smu_2_dram +ffffffff81fed620 T dcn31_smu_transfer_wm_table_dram_2_smu +ffffffff81fed660 T dcn31_smu_set_zstate_support +ffffffff81fed6d0 T dcn31_smu_set_dtbclk +ffffffff81fee000 T dcn314_update_clocks +ffffffff81fee5d0 t dcn314_disable_otg_wa +ffffffff81fee760 T dcn314_are_clock_states_equal +ffffffff81fee7c0 T dcn314_clk_mgr_construct +ffffffff81fef4d0 T dcn314_clk_mgr_destroy +ffffffff81fef520 t dcn314_enable_pme_wa +ffffffff81fef530 t dcn314_notify_wm_ranges +ffffffff81ff0000 T dcn314_smu_get_smu_version +ffffffff81ff0020 t dcn314_smu_send_msg_with_param +ffffffff81ff0250 T dcn314_smu_set_dispclk +ffffffff81ff02c0 T dcn314_smu_set_dprefclk +ffffffff81ff0330 T dcn314_smu_set_hard_min_dcfclk +ffffffff81ff03b0 T dcn314_smu_set_min_deep_sleep_dcfclk +ffffffff81ff0430 T dcn314_smu_set_dppclk +ffffffff81ff04a0 T dcn314_smu_set_display_idle_optimization +ffffffff81ff04f0 T dcn314_smu_enable_phy_refclk_pwrdwn +ffffffff81ff0540 T dcn314_smu_enable_pme_wa +ffffffff81ff0580 T dcn314_smu_set_dram_addr_high +ffffffff81ff05c0 T dcn314_smu_set_dram_addr_low +ffffffff81ff0600 T dcn314_smu_transfer_dpm_table_smu_2_dram +ffffffff81ff0640 T dcn314_smu_transfer_wm_table_dram_2_smu +ffffffff81ff0680 T dcn314_smu_set_zstate_support +ffffffff81ff06d0 T dcn314_smu_set_dtbclk +ffffffff81ff1000 T dcn315_clk_mgr_construct +ffffffff81ff1820 T dcn315_clk_mgr_destroy +ffffffff81ff1870 t dcn315_update_clocks +ffffffff81ff1db0 t dcn315_enable_pme_wa +ffffffff81ff1dc0 t dcn315_notify_wm_ranges +ffffffff81ff2140 t dcn315_disable_otg_wa +ffffffff81ff3000 T dcn315_smu_get_smu_version +ffffffff81ff3020 t dcn315_smu_send_msg_with_param +ffffffff81ff3310 T dcn315_smu_set_dispclk +ffffffff81ff3380 T dcn315_smu_set_hard_min_dcfclk +ffffffff81ff3400 T dcn315_smu_set_min_deep_sleep_dcfclk +ffffffff81ff3480 T dcn315_smu_set_dppclk +ffffffff81ff34f0 T dcn315_smu_set_display_idle_optimization +ffffffff81ff3540 T dcn315_smu_enable_phy_refclk_pwrdwn +ffffffff81ff3590 T dcn315_smu_enable_pme_wa +ffffffff81ff35d0 T dcn315_smu_set_dram_addr_high +ffffffff81ff3610 T dcn315_smu_set_dram_addr_low +ffffffff81ff3650 T dcn315_smu_transfer_dpm_table_smu_2_dram +ffffffff81ff3690 T dcn315_smu_transfer_wm_table_dram_2_smu +ffffffff81ff36d0 T dcn315_smu_get_dpref_clk +ffffffff81ff3730 T dcn315_smu_get_dtbclk +ffffffff81ff3790 T dcn315_smu_set_dtbclk +ffffffff81ff4000 T dcn316_clk_mgr_construct +ffffffff81ff4650 T dcn316_clk_mgr_destroy +ffffffff81ff46a0 t dcn316_update_clocks +ffffffff81ff4c90 t dcn316_enable_pme_wa +ffffffff81ff4ca0 t dcn316_notify_wm_ranges +ffffffff81ff5020 t find_clk_for_voltage +ffffffff81ff6000 T dcn316_smu_get_smu_version +ffffffff81ff6020 t dcn316_smu_send_msg_with_param +ffffffff81ff61b0 T dcn316_smu_set_dispclk +ffffffff81ff6220 T dcn316_smu_set_hard_min_dcfclk +ffffffff81ff62a0 T dcn316_smu_set_min_deep_sleep_dcfclk +ffffffff81ff6320 T dcn316_smu_set_dppclk +ffffffff81ff6390 T dcn316_smu_set_display_idle_optimization +ffffffff81ff63e0 T dcn316_smu_enable_phy_refclk_pwrdwn +ffffffff81ff6430 T dcn316_smu_set_dram_addr_high +ffffffff81ff6470 T dcn316_smu_set_dram_addr_low +ffffffff81ff64b0 T dcn316_smu_transfer_dpm_table_smu_2_dram +ffffffff81ff64f0 T dcn316_smu_transfer_wm_table_dram_2_smu +ffffffff81ff6530 T dcn316_smu_enable_pme_wa +ffffffff81ff6570 T dcn316_smu_set_dtbclk +ffffffff81ff65b0 T dcn316_smu_get_dpref_clk +ffffffff81ff6610 T dcn316_smu_get_smu_fclk +ffffffff81ff7000 T dcn32_init_clocks +ffffffff81ff7560 T dcn32_update_clocks_update_dpp_dto +ffffffff81ff76a0 T dcn32_clk_mgr_construct +ffffffff81ff7940 t dcn32_dump_clk_registers +ffffffff81ff7b60 T dcn32_clk_mgr_destroy +ffffffff81ff7bc0 t dcn32_update_clocks +ffffffff81ff8420 t dcn32_enable_pme_wa +ffffffff81ff8460 t dcn32_are_clock_states_equal +ffffffff81ff84d0 t dcn32_notify_wm_ranges +ffffffff81ff8650 t dcn32_set_hard_min_memclk +ffffffff81ff86e0 t dcn32_set_hard_max_memclk +ffffffff81ff8730 t dcn32_set_max_memclk +ffffffff81ff8770 t dcn32_set_min_memclk +ffffffff81ff87b0 t dcn32_get_memclk_states_from_smu +ffffffff81ff8a00 t dcn32_is_smu_present +ffffffff81ff8a30 t dcn32_get_dispclk_from_dentist +ffffffff81ff8ac0 t dcn32_update_clocks_update_dentist +ffffffff81ff9000 T dcn32_smu_send_fclk_pstate_message +ffffffff81ff9020 t dcn32_smu_send_msg_with_param +ffffffff81ff9160 T dcn32_smu_send_cab_for_uclk_message +ffffffff81ff9190 T dcn32_smu_transfer_wm_table_dram_2_smu +ffffffff81ff91b0 T dcn32_smu_set_pme_workaround +ffffffff81ff91d0 T dcn32_smu_set_hard_min_by_freq +ffffffff81ff9220 T dcn32_smu_wait_for_dmub_ack_mclk +ffffffff81ffa000 T dc_stream_adjust_vmin_vmax +ffffffff81ffa170 T dc_stream_get_last_used_drr_vtotal +ffffffff81ffa2d0 T dc_stream_get_crtc_position +ffffffff81ffa500 T dc_stream_configure_crc +ffffffff81ffa670 T dc_stream_get_crc +ffffffff81ffa750 T dc_stream_set_dyn_expansion +ffffffff81ffa9c0 T dc_stream_set_dither_option +ffffffff81ffab60 T dc_stream_set_gamut_remap +ffffffff81fface0 T dc_stream_program_csc_matrix +ffffffff81ffaf00 T dc_stream_set_static_screen_params +ffffffff81ffb080 T dc_create +ffffffff81ffb600 t dc_construct_ctx +ffffffff81ffb770 t dc_destruct +ffffffff81ffba40 T dc_hardware_init +ffffffff81ffbb10 T dc_init_callbacks +ffffffff81ffbb60 T dc_deinit_callbacks +ffffffff81ffbbb0 T dc_destroy +ffffffff81ffbc00 T dc_validate_boot_timing +ffffffff81ffbfa0 T dc_enable_stereo +ffffffff81ffc0a0 T dc_trigger_sync +ffffffff81ffc6d0 T dc_z10_restore +ffffffff81ffc710 T dc_z10_save_init +ffffffff81ffc750 T dc_commit_streams +ffffffff81ffcc30 t commit_minimal_transition_state +ffffffff81ffd060 T dc_create_state +ffffffff81ffd0f0 t dc_commit_state_no_check +ffffffff81ffe770 T dc_release_state +ffffffff81ffe7d0 T dc_acquire_release_mpc_3dlut +ffffffff81ffe8a0 T dc_post_update_surfaces_to_stream +ffffffff81ffecb0 T dc_copy_state +ffffffff81ffee80 T dc_retain_state +ffffffff81ffeeb0 T dc_set_generic_gpio_for_stereo +ffffffff81ffefc0 T dc_check_update_surfaces_for_stream +ffffffff81fff9a0 T dc_dmub_update_dirty_rect +ffffffff81fffbb0 T dc_update_planes_and_stream +ffffffff82000730 t fast_update_only +ffffffff82000a90 t commit_planes_for_stream_fast +ffffffff82000eb0 t commit_planes_for_stream +ffffffff82002430 T dc_commit_updates_for_stream +ffffffff82002a50 t copy_surface_update_to_plane +ffffffff82002e60 t copy_stream_update_to_stream +ffffffff82003500 T dc_get_current_stream_count +ffffffff82003540 T dc_get_stream_at_index +ffffffff82003590 T dc_interrupt_to_irq_source +ffffffff820035b0 T dc_interrupt_set +ffffffff82003600 T dc_interrupt_ack +ffffffff82003620 T dc_power_down_on_boot +ffffffff82003670 T dc_set_power_state +ffffffff82003850 T dc_resume +ffffffff820038d0 T dc_is_dmcu_initialized +ffffffff82003920 T get_clock_requirements_for_state +ffffffff820039a0 T dc_set_clock +ffffffff820039e0 T dc_get_clock +ffffffff82003a20 T dc_set_psr_allow_active +ffffffff82003b20 T dc_allow_idle_optimizations +ffffffff82003bc0 T dc_unlock_memory_clock_frequency +ffffffff82003c30 T dc_lock_memory_clock_frequency +ffffffff82003cc0 T dc_enable_dcmode_clk_limit +ffffffff82003e80 t blank_and_force_memclk +ffffffff82004060 T dc_is_plane_eligible_for_idle_optimizations +ffffffff820040b0 T dc_hardware_release +ffffffff82004100 T dc_mclk_switch_using_fw_based_vblank_stretch_shut_down +ffffffff82004140 T dc_is_dmub_outbox_supported +ffffffff820041a0 T dc_enable_dmub_notifications +ffffffff82004200 T dc_enable_dmub_outbox +ffffffff82004240 T dc_process_dmub_aux_transfer_async +ffffffff820043c0 T get_link_index_from_dpia_port_index +ffffffff82004470 T dc_process_dmub_set_config_async +ffffffff82004550 T dc_process_dmub_set_mst_slots +ffffffff82004640 T dc_process_dmub_dpia_hpd_int_enable +ffffffff82004700 T dc_print_dmub_diagnostic_data +ffffffff82004720 T dc_disable_accelerated_mode +ffffffff82004740 T dc_notify_vsync_int_state +ffffffff82004960 T dc_abm_save_restore +ffffffff82004b30 T dc_query_current_properties +ffffffff82004ba0 T dc_set_edp_power +ffffffff82004c10 t create_links +ffffffff82005070 t create_link_encoders +ffffffff82005150 t dc_update_viusal_confirm_color +ffffffff82006000 T pre_surface_trace +ffffffff82006030 T update_surface_trace +ffffffff82006060 T post_surface_trace +ffffffff82006090 T context_timing_trace +ffffffff82006240 T context_clock_trace +ffffffff82006270 T dc_status_to_str +ffffffff82007000 T find_color_matrix +ffffffff820070b0 T color_space_to_black_color +ffffffff82007120 T hwss_wait_for_blank_complete +ffffffff820071c0 T get_mpctree_visual_confirm_color +ffffffff82007220 T get_surface_visual_confirm_color +ffffffff820072d0 T get_hdr_visual_confirm_color +ffffffff82007390 T get_subvp_visual_confirm_color +ffffffff82007490 T hwss_build_fast_sequence +ffffffff82007b50 T hwss_execute_sequence +ffffffff82007f40 T hwss_setup_dpp +ffffffff82007fe0 T hwss_program_bias_and_scale +ffffffff82008060 T hwss_program_manual_trigger +ffffffff820080b0 T hwss_power_on_mpc_mem_pwr +ffffffff82008100 T hwss_set_output_csc +ffffffff82008150 T hwss_set_ocsc_default +ffffffff820081a0 T hwss_send_dmcub_cmd +ffffffff820081c0 T get_mclk_switch_visual_confirm_color +ffffffff82008320 T get_surface_tile_visual_confirm_color +ffffffff82009000 T link_enc_cfg_init +ffffffff820091b0 T link_enc_cfg_copy +ffffffff820091e0 T link_enc_cfg_link_encs_assign +ffffffff8200a5a0 T link_enc_cfg_validate +ffffffff8200ad40 T link_enc_cfg_link_enc_unassign +ffffffff8200aed0 T link_enc_cfg_is_transmitter_mappable +ffffffff8200aff0 T link_enc_cfg_get_stream_using_link_enc +ffffffff8200b0f0 T link_enc_cfg_get_link_using_link_enc +ffffffff8200b200 T link_enc_cfg_get_link_enc_used_by_link +ffffffff8200b380 T link_enc_cfg_get_next_avail_link_enc +ffffffff8200b4f0 T link_enc_cfg_get_link_enc_used_by_stream +ffffffff8200b510 T link_enc_cfg_get_link_enc +ffffffff8200b5a0 T link_enc_cfg_get_link_enc_used_by_stream_current +ffffffff8200b720 T link_enc_cfg_is_link_enc_avail +ffffffff8200b920 T link_enc_cfg_set_transient_mode +ffffffff8200c000 T dc_get_link_at_index +ffffffff8200c030 T dc_get_edp_links +ffffffff8200c0b0 T dc_get_edp_link_panel_inst +ffffffff8200c170 T dc_link_detect +ffffffff8200c1a0 T dc_link_detect_connection_type +ffffffff8200c1d0 T dc_link_get_status +ffffffff8200c200 T dc_link_is_hdcp14 +ffffffff8200c230 T dc_link_is_hdcp22 +ffffffff8200c260 T dc_link_clear_dprx_states +ffffffff8200c290 T dc_link_reset_cur_dp_mst_topology +ffffffff8200c2c0 T dc_link_bandwidth_kbps +ffffffff8200c2f0 T dc_get_cur_link_res_map +ffffffff8200c310 T dc_restore_link_res_map +ffffffff8200c330 T dc_link_update_dsc_config +ffffffff8200c360 T dc_is_oem_i2c_device_present +ffffffff8200c3b0 T dc_submit_i2c +ffffffff8200c3e0 T dc_submit_i2c_oem +ffffffff8200c430 T dc_link_dp_handle_automated_test +ffffffff8200c460 T dc_link_dp_set_test_pattern +ffffffff8200c490 T dc_link_set_drive_settings +ffffffff8200c520 T dc_link_set_preferred_link_settings +ffffffff8200c540 T dc_link_set_preferred_training_settings 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dc_link_dp_dpia_handle_usb4_bandwidth_allocation_for_link +ffffffff8200c9b0 T dc_link_handle_usb4_bw_alloc_response +ffffffff8200c9e0 T dc_link_check_link_loss_status +ffffffff8200ca10 T dc_link_dp_allow_hpd_rx_irq +ffffffff8200ca40 T dc_link_dp_handle_link_loss +ffffffff8200ca70 T dc_link_dp_read_hpd_rx_irq_data +ffffffff8200caa0 T dc_link_handle_hpd_rx_irq +ffffffff8200cad0 T dc_link_dp_receiver_power_ctrl +ffffffff8200cb00 T dc_link_decide_lttpr_mode +ffffffff8200cb30 T dc_link_edp_panel_backlight_power_on +ffffffff8200cb60 T dc_link_get_backlight_level +ffffffff8200cb90 T dc_link_get_backlight_level_nits +ffffffff8200cbc0 T dc_link_set_backlight_level +ffffffff8200cbf0 T dc_link_set_backlight_level_nits +ffffffff8200cc20 T dc_link_get_target_backlight_pwm +ffffffff8200cc50 T dc_link_get_psr_state +ffffffff8200cc80 T dc_link_set_psr_allow_active +ffffffff8200ccb0 T dc_link_setup_psr +ffffffff8200cce0 T dc_link_get_replay_state +ffffffff8200cd10 T dc_link_wait_for_t12 +ffffffff8200cd40 T dc_link_get_hpd_state +ffffffff8200cd70 T dc_link_enable_hpd +ffffffff8200cda0 T dc_link_disable_hpd +ffffffff8200cdd0 T dc_link_enable_hpd_filter +ffffffff8200ce00 T dc_link_validate +ffffffff8200d000 T resource_parse_asic_id +ffffffff8200d250 T dc_create_resource_pool +ffffffff8200d550 T dc_destroy_resource_pool +ffffffff8200d5c0 T resource_construct +ffffffff8200daa0 T resource_unreference_clock_source +ffffffff8200db20 T resource_reference_clock_source +ffffffff8200dba0 T resource_get_clock_source_reference +ffffffff8200dc20 T resource_are_vblanks_synchronizable +ffffffff8200de40 T resource_are_streams_timing_synchronizable +ffffffff8200df30 T resource_find_used_clk_src_for_sharing +ffffffff8200e060 T resource_get_num_mpc_splits +ffffffff8200e0f0 T resource_get_num_odm_splits +ffffffff8200e1b0 T resource_get_otg_master +ffffffff8200e250 T resource_build_scaling_params +ffffffff8200efe0 t calculate_odm_slice_in_timing_active +ffffffff8200f160 T resource_build_scaling_params_for_context +ffffffff8200f2b0 T resource_find_free_secondary_pipe_legacy +ffffffff8200f350 T resource_find_free_pipe_used_in_cur_mpc_blending_tree +ffffffff8200f3c0 T resource_is_pipe_type +ffffffff8200f440 T recource_find_free_pipe_not_used_in_cur_res_ctx +ffffffff8200f4c0 T resource_find_free_pipe_used_as_cur_sec_dpp_in_mpcc_combine +ffffffff8200f5e0 T resource_is_for_mpcc_combine +ffffffff8200f670 T resource_find_any_free_pipe +ffffffff8200f6e0 T resource_get_otg_master_for_stream +ffffffff8200f810 T resource_get_opp_head +ffffffff8200f8a0 T dc_add_plane_to_context +ffffffff8200fb60 T dc_remove_plane_from_context +ffffffff8200fd40 T dc_rem_all_planes_for_stream +ffffffff8200ff00 T dc_add_all_planes_for_stream +ffffffff82010080 T dc_is_timing_changed +ffffffff820100e0 T dc_is_stream_unchanged +ffffffff820101c0 T dc_is_stream_scaling_unchanged +ffffffff82010260 T update_audio_usage +ffffffff820102d0 T dc_add_stream_to_ctx +ffffffff820103a0 T dc_remove_stream_from_ctx +ffffffff820107b0 T resource_map_pool_resources +ffffffff82011210 t acquire_first_split_pipe +ffffffff82011380 t add_hpo_dp_link_enc_to_ctx +ffffffff82011450 t find_first_free_audio +ffffffff82011500 T dc_resource_state_copy_construct_current +ffffffff82011520 T dc_resource_state_copy_construct +ffffffff820116c0 T dc_resource_state_construct +ffffffff820116e0 T dc_resource_is_dsc_encoding_supported +ffffffff82011730 T dc_validate_with_context +ffffffff82012360 t planes_changed_for_existing_stream +ffffffff820124e0 T dc_validate_global_state +ffffffff82012860 T dc_resource_state_destruct +ffffffff82012940 T dc_resource_find_first_free_pll +ffffffff820129b0 T resource_build_info_frame +ffffffff820130e0 T resource_map_clock_resources +ffffffff82013270 T pipe_need_reprogram +ffffffff820133e0 T resource_build_bit_depth_reduction_params +ffffffff82013610 T dc_validate_stream +ffffffff820137e0 T dc_validate_plane +ffffffff82013870 T resource_pixel_format_to_bpp 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dc_copy_stream +ffffffff82017540 T dc_stream_get_status_from_state +ffffffff820175a0 T dc_stream_get_status +ffffffff82017610 T dc_optimize_timing_for_fsft +ffffffff82017660 T dc_stream_set_cursor_attributes +ffffffff82017860 t program_cursor_attributes +ffffffff820179c0 T dc_stream_set_cursor_position +ffffffff82017ae0 t program_cursor_position +ffffffff82017c20 T dc_stream_add_writeback +ffffffff82017e30 T dc_stream_remove_writeback +ffffffff82017f60 T dc_stream_warmup_writeback +ffffffff82017fa0 T dc_stream_get_vblank_counter +ffffffff82018070 T dc_stream_send_dp_sdp +ffffffff82018300 T dc_stream_get_scanoutpos +ffffffff820183e0 T dc_stream_dmdata_status_done +ffffffff820184a0 T dc_stream_set_dynamic_metadata +ffffffff82018600 T dc_stream_add_dsc_to_resource +ffffffff82018650 T dc_stream_get_pipe_ctx +ffffffff82018700 T dc_stream_log +ffffffff82019000 T enable_surface_flip_reporting +ffffffff82019030 T dc_create_plane_state +ffffffff820191d0 T dc_plane_get_status +ffffffff82019350 T dc_plane_state_retain +ffffffff82019380 T dc_plane_state_release +ffffffff820194d0 T dc_gamma_retain +ffffffff82019500 T dc_gamma_release +ffffffff82019560 T dc_create_gamma +ffffffff820195b0 T dc_transfer_func_retain +ffffffff820195e0 T dc_transfer_func_release +ffffffff82019630 T dc_create_transfer_func +ffffffff82019680 T dc_create_3dlut_func +ffffffff820196e0 T dc_3dlut_func_release +ffffffff82019730 T dc_3dlut_func_retain +ffffffff8201a000 T vm_helper_mark_vmid_used +ffffffff8201a030 T dc_setup_system_context +ffffffff8201a0c0 T dc_setup_vm_context +ffffffff8201a0f0 T dc_get_vmid_use_vector +ffffffff8201a150 T vm_helper_init +ffffffff8201b000 T dc_dmub_srv_create +ffffffff8201b0a0 T dc_dmub_srv_destroy +ffffffff8201b0f0 T dc_dmub_srv_wait_idle +ffffffff8201b150 T dc_dmub_srv_log_diagnostic_data +ffffffff8201b690 T dc_dmub_srv_clear_inbox0_ack +ffffffff8201b6f0 T dc_dmub_srv_wait_for_inbox0_ack +ffffffff8201b750 T dc_dmub_srv_send_inbox0_cmd +ffffffff8201b7b0 T dc_dmub_srv_cmd_run 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generic_reg_update_ex +ffffffff8201f330 t set_reg_field_values +ffffffff8201f4e0 T generic_reg_set_ex +ffffffff8201f6d0 T generic_reg_get +ffffffff8201f740 T generic_reg_get2 +ffffffff8201f7d0 T generic_reg_get3 +ffffffff8201f870 T generic_reg_get4 +ffffffff8201f920 T generic_reg_get5 +ffffffff8201f9e0 T generic_reg_get6 +ffffffff8201fac0 T generic_reg_get7 +ffffffff8201fbb0 T generic_reg_get8 +ffffffff8201fcc0 T generic_reg_wait +ffffffff8201ff10 T generic_write_indirect_reg +ffffffff8201ff60 T generic_read_indirect_reg +ffffffff82020000 T generic_indirect_reg_get +ffffffff820201b0 T generic_indirect_reg_update_ex +ffffffff820203c0 T generic_indirect_reg_update_ex_sync +ffffffff820205b0 T generic_indirect_reg_get_sync +ffffffff820206e0 T reg_sequence_start_gather +ffffffff82020770 T reg_sequence_start_execute +ffffffff82020910 T reg_sequence_wait_done +ffffffff82020970 T dce_version_to_string +ffffffff82021000 T dce_abm_create +ffffffff820210b0 T dce_abm_destroy +ffffffff82021100 t dce_abm_init +ffffffff82021380 t dce_abm_set_level +ffffffff82021480 t dce_abm_immediate_disable +ffffffff820214d0 t dce_abm_set_pipe +ffffffff82021620 t dce_abm_set_backlight_level_pwm +ffffffff82021810 t dce_abm_get_current_backlight +ffffffff82021840 t dce_abm_get_target_backlight +ffffffff82022000 T dce_aud_az_enable +ffffffff82022150 T dce_aud_az_disable +ffffffff82022340 T dce_aud_az_configure +ffffffff82022fc0 t check_audio_bandwidth +ffffffff82023150 T dce_aud_wall_dto_setup +ffffffff820232d0 T dce_aud_hw_init +ffffffff820234a0 T dce_aud_destroy +ffffffff820234f0 T dce_audio_create +ffffffff820235b0 t dce_aud_endpoint_valid +ffffffff82024000 T dce110_engine_destroy +ffffffff82024050 T dce110_aux_engine_construct +ffffffff820240d0 t dce_aux_configure_timeout +ffffffff820242b0 T dce_aux_transfer_raw +ffffffff82024ae0 t acquire +ffffffff82024d50 T dce_aux_transfer_dmub_raw +ffffffff82024e50 T dce_aux_transfer_with_retries +ffffffff82026000 T look_up_in_video_optimized_rate_tlb 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dcn21_dmcu_create +ffffffff82029330 T dce_dmcu_destroy +ffffffff82029380 t dce_dmcu_init +ffffffff820293b0 t dce_dmcu_load_iram +ffffffff82029510 t dce_dmcu_set_psr_enable +ffffffff82029640 t dce_dmcu_setup_psr +ffffffff82029970 t dce_get_dmcu_psr_state +ffffffff82029a50 t dce_psr_wait_loop +ffffffff82029b80 t dce_get_psr_wait_loop +ffffffff82029bb0 t dce_is_dmcu_initialized +ffffffff82029c10 t dcn10_dmcu_init +ffffffff8202a150 t dcn10_dmcu_load_iram +ffffffff8202a390 t dcn10_dmcu_set_psr_enable +ffffffff8202a520 t dcn10_dmcu_setup_psr +ffffffff8202a8e0 t dcn10_get_dmcu_psr_state +ffffffff8202aa00 t dcn10_psr_wait_loop +ffffffff8202ab10 t dcn10_get_psr_wait_loop +ffffffff8202ab40 t dcn10_is_dmcu_initialized +ffffffff8202ab70 t dcn10_send_edid_cea +ffffffff8202ad10 t dcn10_recv_amd_vsdb +ffffffff8202adc0 t dcn10_recv_edid_cea_ack +ffffffff8202ae40 t dcn10_get_scp_results +ffffffff8202af60 t dcn20_lock_phy +ffffffff8202b090 t dcn20_unlock_phy +ffffffff8202b1c0 t dcn21_dmcu_init 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dce110_link_encoder_enable_dp_output +ffffffff82032de0 T dce110_link_encoder_enable_dp_mst_output +ffffffff82032f40 T dce110_link_encoder_disable_output +ffffffff82033150 T dce110_link_encoder_dp_set_lane_settings +ffffffff820332f0 T dce110_link_encoder_dp_set_phy_pattern +ffffffff82033af0 t set_dp_phy_pattern_hbr2_compliance_cp2520_2 +ffffffff82033d10 T dce110_link_encoder_update_mst_stream_allocation_table +ffffffff82033f80 T dce110_link_encoder_connect_dig_be_to_fe +ffffffff820340b0 T dce110_link_encoder_enable_hpd +ffffffff820340e0 T dce110_link_encoder_disable_hpd +ffffffff82034110 T dce110_link_encoder_get_max_link_cap +ffffffff82035000 T dce_mem_input_construct +ffffffff82035060 T dce112_mem_input_construct +ffffffff820350c0 T dce120_mem_input_construct +ffffffff82035120 t dce_mi_program_display_marks +ffffffff820353f0 t dce_mi_allocate_dmif +ffffffff82035630 t dce_mi_free_dmif +ffffffff82035790 t dce_mi_program_surface_flip_and_addr +ffffffff82035ab0 t dce_mi_program_pte_vm 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dmub_replay_destroy +ffffffff820470e0 t dmub_replay_get_state +ffffffff820471d0 t dmub_replay_enable +ffffffff820473f0 t dmub_replay_copy_settings +ffffffff820476b0 t dmub_replay_set_power_opt +ffffffff82047750 t dmub_replay_set_coasting_vtotal +ffffffff820477e0 t dmub_replay_residency +ffffffff82048000 T dce100_enable_display_power_gating +ffffffff820480a0 T dce100_prepare_bandwidth +ffffffff820480f0 T dce100_optimize_bandwidth +ffffffff82048140 T dce100_hw_sequencer_construct +ffffffff82049000 T dce100_add_stream_to_ctx +ffffffff820490a0 T dce100_validate_plane +ffffffff820490e0 T dce100_find_first_free_match_stream_enc_for_link +ffffffff82049190 T dce100_create_resource_pool +ffffffff82049f60 t dce100_resource_destruct +ffffffff8204a220 t dce100_destroy_resource_pool +ffffffff8204a280 t dce100_panel_cntl_create +ffffffff8204a310 t dce100_link_encoder_create +ffffffff8204a410 t dce100_validate_bandwidth +ffffffff8204a550 t dce100_validate_global +ffffffff8204a5f0 t read_dce_straps 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dce110_opp_power_on_regamma_lut_v +ffffffff82054630 T dce110_opp_set_regamma_mode_v +ffffffff82055000 T dce110_opp_v_construct +ffffffff82056000 T dce110_resource_build_pipe_hw_param +ffffffff82056150 T dce110_find_first_free_match_stream_enc_for_link +ffffffff820561f0 T dce110_create_resource_pool +ffffffff82057190 t dce110_resource_destruct +ffffffff820574b0 t dce110_destroy_resource_pool +ffffffff82057510 t dce110_panel_cntl_create +ffffffff820575a0 t dce110_link_encoder_create +ffffffff820576a0 t dce110_validate_bandwidth +ffffffff82057790 t dce110_validate_global +ffffffff82057870 t dce110_acquire_underlay +ffffffff82057a50 t dce110_validate_plane +ffffffff82057ab0 t dce110_add_stream_to_ctx +ffffffff82057b80 t read_dce_straps +ffffffff82057bf0 t create_audio +ffffffff82057c20 t dce110_stream_encoder_create +ffffffff82057cc0 t dce110_hwseq_create +ffffffff82058000 T dce110_timing_generator_set_early_control +ffffffff82058070 T dce110_timing_generator_enable_crtc +ffffffff82058100 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dce110_get_crc +ffffffff8205a140 T dce110_timing_generator_construct +ffffffff8205b000 T dce110_timing_generator_v_construct +ffffffff8205b070 t dce110_timing_generator_v_program_timing +ffffffff8205b340 t dce110_timing_generator_v_enable_crtc +ffffffff8205b3d0 t dce110_timing_generator_v_disable_crtc +ffffffff8205b440 t dce110_timing_generator_v_is_counter_moving +ffffffff8205b4c0 t dce110_timing_generator_v_get_vblank_counter +ffffffff8205b510 t dce110_timing_generator_v_set_early_control +ffffffff8205b570 t dce110_timing_generator_v_wait_for_state +ffffffff8205b700 t dce110_timing_generator_v_set_blank +ffffffff8205b790 t dce110_timing_generator_v_set_overscan_color_black +ffffffff8205b830 t dce110_timing_generator_v_program_blank_color +ffffffff8205b8b0 t dce110_timing_generator_v_set_colors +ffffffff8205b9e0 t dce110_timing_generator_v_disable_vga +ffffffff8205ba10 t dce110_timing_generator_v_did_triggered_reset_occur +ffffffff8205ba50 t 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dpp1_cm_power_on_regamma_lut +ffffffff82070470 T dpp1_cm_program_regamma_lut +ffffffff82070680 T dpp1_cm_configure_regamma_lut +ffffffff82070780 T dpp1_cm_program_regamma_luta_settings +ffffffff82070920 T dpp1_cm_program_regamma_lutb_settings +ffffffff82070ac0 T dpp1_program_input_csc +ffffffff82070d10 T dpp1_program_bias_and_scale +ffffffff82070e80 T dpp1_program_degamma_lutb_settings +ffffffff82071030 T dpp1_program_degamma_luta_settings +ffffffff820711e0 T dpp1_power_on_degamma_lut +ffffffff82071260 T dpp1_set_degamma +ffffffff82071450 T dpp1_degamma_ram_select +ffffffff820714b0 T dpp1_program_degamma_lut +ffffffff820717d0 T dpp1_set_degamma_pwl +ffffffff820719a0 T dpp1_full_bypass +ffffffff82071b40 T dpp1_program_input_lut +ffffffff820721e0 T dpp1_set_hdr_multiplier +ffffffff82073000 T dpp1_dscl_calc_lb_num_partitions +ffffffff820731e0 T dpp1_dscl_is_lb_conf_valid +ffffffff82073220 T dpp1_dscl_set_scaler_manual_scale +ffffffff82074640 t dpp1_dscl_get_filter_coeffs_64p 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dcn10_plane_atomic_power_down +ffffffff82080020 T dcn10_plane_atomic_disable +ffffffff82080160 T dcn10_disable_plane +ffffffff82080300 T dcn10_init_pipes +ffffffff820809c0 T dcn10_init_hw +ffffffff82080eb0 T dcn10_power_down_on_boot +ffffffff82081000 T dcn10_reset_hw_ctx_wrap +ffffffff82081340 T dcn10_update_plane_addr +ffffffff82081460 T dcn10_set_input_transfer_func +ffffffff820815d0 T dcn10_set_output_transfer_func +ffffffff820816a0 T dcn10_pipe_control_lock +ffffffff82081770 T dcn10_cursor_lock +ffffffff82081930 T dcn10_enable_vblanks_synchronization +ffffffff82082110 T dcn10_enable_timing_synchronization +ffffffff82082510 T dcn10_enable_per_frame_crtc_position_reset +ffffffff820826e0 T dcn10_program_gamut_remap +ffffffff820828e0 T dcn10_program_output_csc +ffffffff82082a10 T dcn10_update_visual_confirm_color +ffffffff82082a90 T dcn10_update_mpcc +ffffffff82082d40 T dcn10_blank_pixel_data +ffffffff82082e80 T dcn10_set_hdr_multiplier +ffffffff82082f10 T dcn10_program_pipe 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+ffffffff8208aa20 T dcn10_aux_initialize +ffffffff8208aab0 T dcn10_link_encoder_destroy +ffffffff8208ab00 T dcn10_link_encoder_setup +ffffffff8208ac50 T dcn10_link_encoder_enable_tmds_output +ffffffff8208ad40 T dcn10_link_encoder_enable_tmds_output_with_clk_pattern_wa +ffffffff8208ae60 T dcn10_link_encoder_enable_dp_output +ffffffff8208afc0 T dcn10_link_encoder_enable_dp_mst_output +ffffffff8208b120 T dcn10_link_encoder_disable_output +ffffffff8208b2f0 T dcn10_link_encoder_dp_set_lane_settings +ffffffff8208b490 T dcn10_link_encoder_dp_set_phy_pattern +ffffffff8208bbb0 t set_dp_phy_pattern_hbr2_compliance_cp2520_2 +ffffffff8208bdb0 T dcn10_link_encoder_update_mst_stream_allocation_table +ffffffff8208c080 T dcn10_link_encoder_connect_dig_be_to_fe +ffffffff8208c1c0 T dcn10_link_encoder_enable_hpd +ffffffff8208c200 T dcn10_link_encoder_disable_hpd +ffffffff8208c240 T dcn10_get_dig_mode +ffffffff8208c2b0 T dcn10_link_encoder_get_max_link_cap +ffffffff8208c330 t program_pattern_symbols +ffffffff8208d000 T mpc1_set_bg_color +ffffffff8208d1e0 T mpc1_get_mpcc +ffffffff8208d270 T mpc1_update_stereo_mix +ffffffff8208d390 T mpc1_assert_idle_mpcc +ffffffff8208d460 T mpc1_get_mpcc_for_dpp +ffffffff8208d510 T mpc1_is_mpcc_idle +ffffffff8208d600 T mpc1_assert_mpcc_idle_before_connect +ffffffff8208d740 T mpc1_insert_plane +ffffffff8208dce0 T mpc1_remove_mpcc +ffffffff8208e0a0 T mpc1_mpc_init +ffffffff8208e3c0 T mpc1_mpc_init_single_inst +ffffffff8208e5b0 T mpc1_init_mpcc_list_from_hw +ffffffff8208e880 T mpc1_read_mpcc_state +ffffffff8208ea10 T mpc1_cursor_lock +ffffffff8208ea90 T mpc1_get_mpc_out_mux +ffffffff8208eb10 T dcn10_mpc_construct +ffffffff8208ec90 t mpc1_update_blending +ffffffff8208f000 T opp1_program_bit_depth_reduction +ffffffff8208f400 T opp1_set_dyn_expansion +ffffffff8208f570 T opp1_program_fmt +ffffffff8208f870 T opp1_program_stereo +ffffffff8208f960 T opp1_pipe_clock_control +ffffffff8208f9a0 T opp1_destroy +ffffffff8208f9f0 T dcn10_opp_construct +ffffffff82090000 T optc1_program_global_sync +ffffffff82090150 T optc1_setup_vertical_interrupt0 +ffffffff820901e0 T optc1_setup_vertical_interrupt1 +ffffffff82090250 T optc1_setup_vertical_interrupt2 +ffffffff820902c0 T optc1_program_timing +ffffffff820909a0 T optc1_is_two_pixels_per_containter +ffffffff820909f0 T optc1_set_vtg_params +ffffffff82090b20 T optc1_set_blank_data_double_buffer +ffffffff82090b60 T optc1_set_timing_double_buffer +ffffffff82090ba0 T optc1_set_blank +ffffffff82090c70 T optc1_is_blanked +ffffffff82090cf0 T optc1_enable_optc_clock +ffffffff82090f10 T optc1_disable_crtc +ffffffff82091000 T optc1_program_blank_color +ffffffff820910b0 T optc1_validate_timing +ffffffff820911b0 T optc1_get_vblank_counter +ffffffff82091210 T optc1_lock +ffffffff820912f0 T optc1_unlock +ffffffff82091360 T optc1_get_position +ffffffff820913f0 T optc1_is_counter_moving +ffffffff82091470 T optc1_did_triggered_reset_occur +ffffffff82091510 T optc1_disable_reset_trigger +ffffffff820915d0 T optc1_enable_reset_trigger +ffffffff820916e0 T optc1_enable_crtc_reset +ffffffff82091840 T optc1_wait_for_state +ffffffff82091910 T optc1_set_early_control +ffffffff82091940 T optc1_set_static_screen_control +ffffffff820919e0 T optc1_set_drr +ffffffff82091b80 T optc1_set_vtotal_min_max +ffffffff82091c20 T optc1_get_crtc_scanoutpos +ffffffff82091d30 T optc1_program_stereo +ffffffff82091f40 T optc1_is_stereo_left_eye +ffffffff82091fb0 T optc1_get_hw_timing +ffffffff820920c0 T optc1_read_otg_state +ffffffff820923d0 T optc1_get_otg_active_size +ffffffff820924e0 T optc1_clear_optc_underflow +ffffffff82092530 T optc1_tg_init +ffffffff820925e0 T optc1_is_tg_enabled +ffffffff82092650 T optc1_is_optc_underflow_occurred +ffffffff820926c0 T optc1_configure_crc +ffffffff82092930 T optc1_get_crc +ffffffff82092a30 T dcn10_timing_generator_init +ffffffff82092aa0 t optc1_enable_crtc +ffffffff82092ba0 t optc1_set_test_pattern +ffffffff82093290 t optc1_program_manual_trigger +ffffffff82093340 t optc1_setup_manual_trigger +ffffffff82094000 T dcn10_find_first_free_match_stream_enc_for_link +ffffffff820940b0 T dcn10_create_resource_pool +ffffffff82095230 t dcn10_resource_destruct +ffffffff82095540 t dcn10_destroy_resource_pool +ffffffff820955a0 t dcn10_panel_cntl_create +ffffffff82095630 t dcn10_link_encoder_create +ffffffff82095730 t dcn10_validate_bandwidth +ffffffff820957b0 t dcn10_validate_global +ffffffff82095990 t dcn10_acquire_free_pipe_for_layer +ffffffff82095ac0 t dcn10_validate_plane +ffffffff82095b10 t dcn10_add_stream_to_ctx +ffffffff82095ce0 t dcn10_patch_unknown_plane_state +ffffffff82095d40 t read_dce_straps +ffffffff82095d70 t create_audio +ffffffff82095da0 t dcn10_stream_encoder_create +ffffffff82095e40 t dcn10_hwseq_create +ffffffff82095ef0 t dcn10_get_dcc_compression_cap +ffffffff82096000 T enc1_update_generic_info_packet +ffffffff82096430 T enc1_stream_encoder_dp_set_stream_attribute +ffffffff82096910 T enc1_stream_encoder_set_stream_attribute_helper +ffffffff82096990 T enc1_stream_encoder_hdmi_set_stream_attribute +ffffffff82096f80 T enc1_stream_encoder_dvi_set_stream_attribute +ffffffff82097110 T enc1_stream_encoder_set_throttled_vcp_size +ffffffff82097330 T enc1_stream_encoder_update_dp_info_packets +ffffffff82097530 T enc1_stream_encoder_send_immediate_sdp_message +ffffffff82097940 T enc1_stream_encoder_stop_dp_info_packets +ffffffff82097b10 T enc1_stream_encoder_dp_blank +ffffffff82097cb0 T enc1_stream_encoder_dp_unblank +ffffffff82097ee0 T enc1_stream_encoder_set_avmute +ffffffff82097f20 T enc1_reset_hdmi_stream_attribute +ffffffff82097ff0 T get_audio_clock_info +ffffffff820980e0 T enc1_se_enable_audio_clock +ffffffff82098140 T enc1_se_enable_dp_audio +ffffffff82098210 T enc1_se_audio_mute_control +ffffffff82098260 T enc1_se_dp_audio_setup +ffffffff82098270 t enc1_se_audio_setup +ffffffff820983d0 T enc1_se_dp_audio_enable +ffffffff82098620 T enc1_se_dp_audio_disable +ffffffff82098790 T enc1_se_hdmi_audio_setup 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dsc2_read_state +ffffffff820a2570 t dsc2_validate_stream +ffffffff820a25d0 t dsc2_set_config +ffffffff820a3940 t dsc2_enable +ffffffff820a3af0 t dsc2_disable +ffffffff820a3c70 t dsc2_disconnect +ffffffff820a4000 T dwb2_config_dwb_cnv +ffffffff820a4200 T dwb2_disable +ffffffff820a4310 T dwb2_is_enabled +ffffffff820a43b0 T dwb2_set_stereo +ffffffff820a4490 T dwb2_set_new_content +ffffffff820a4500 T dwb2_set_scaler +ffffffff820a4880 T dcn20_dwbc_construct +ffffffff820a48d0 t dwb2_get_caps +ffffffff820a49b0 t dwb2_enable +ffffffff820a4b10 t dwb2_update +ffffffff820a4c70 t dwb2_set_warmup +ffffffff820a5000 T dwb_program_horz_scalar +ffffffff820a54c0 t wbscl_get_filter_coeffs_16p +ffffffff820a5990 t wbscl_set_scaler_filter +ffffffff820a5ba0 T dwb_program_vert_scalar +ffffffff820a7000 T hubbub2_dcc_support_swizzle +ffffffff820a70c0 T hubbub2_dcc_support_pixel_format +ffffffff820a7110 T hubbub2_get_dcc_compression_cap +ffffffff820a7350 T hubbub2_init_vm_ctx +ffffffff820a74a0 T hubbub2_init_dchub_sys_ctx +ffffffff820a76e0 T hubbub2_update_dchub +ffffffff820a78d0 T hubbub2_wm_read_state +ffffffff820a7c00 T hubbub2_get_dchub_ref_freq +ffffffff820a7ce0 T hubbub2_read_state +ffffffff820a7eb0 T hubbub2_construct +ffffffff820a7f10 t hubbub2_program_watermarks +ffffffff820a9000 T hubp2_set_vm_system_aperture_settings +ffffffff820a91e0 T hubp2_program_deadline +ffffffff820a9980 T hubp2_vready_at_or_After_vsync +ffffffff820a9a20 T hubp2_setup_interdependent +ffffffff820a9e90 T hubp2_program_size +ffffffff820aa010 T hubp2_program_rotation +ffffffff820aa180 T hubp2_dcc_control +ffffffff820aa240 T hubp2_program_pixel_format +ffffffff820aa810 T hubp2_program_surface_config +ffffffff820aaa50 T hubp2_get_lines_per_chunk +ffffffff820aab10 T hubp2_cursor_set_attributes +ffffffff820aaed0 T hubp2_dmdata_set_attributes +ffffffff820ab2b0 T hubp2_dmdata_load +ffffffff820ab340 T hubp2_dmdata_status_done +ffffffff820ab3b0 T hubp2_program_surface_flip_and_addr +ffffffff820abca0 T hubp2_enable_triplebuffer +ffffffff820abd70 T hubp2_is_triplebuffer_enabled +ffffffff820abdf0 T hubp2_set_flip_control_surface_gsl +ffffffff820abe40 T hubp2_is_flip_pending +ffffffff820abf50 T hubp2_set_blank +ffffffff820abfb0 T hubp2_set_blank_regs +ffffffff820ac0b0 T hubp2_cursor_set_position +ffffffff820ac520 T hubp2_clk_cntl +ffffffff820ac570 T hubp2_vtg_sel +ffffffff820ac5b0 T hubp2_clear_underflow +ffffffff820ac600 T hubp2_read_state_common +ffffffff820ad250 T hubp2_read_state +ffffffff820ad520 T hubp2_construct +ffffffff820ad590 t hubp2_setup +ffffffff820ada30 t hubp2_validate_dml_output +ffffffff820af000 T dcn20_set_flip_control_gsl +ffffffff820af050 T dcn20_enable_power_gating_plane +ffffffff820af4b0 T dcn20_dccg_init +ffffffff820af530 T dcn20_disable_vga +ffffffff820af5f0 T dcn20_program_triple_buffer +ffffffff820af640 T dcn20_init_blank +ffffffff820af850 T dcn20_dsc_pg_control +ffffffff820afc60 T dcn20_dpp_pg_control +ffffffff820aff10 T dcn20_hubp_pg_control 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dcn20_link_encoder_get_max_link_cap +ffffffff820b73a0 T dcn20_link_encoder_is_in_alt_mode +ffffffff820b7420 T enc2_hw_init +ffffffff820b7500 T dcn20_link_encoder_construct +ffffffff820b8000 T mmhubbub2_config_mcif_irq +ffffffff820b8130 T mmhubbub2_enable_mcif +ffffffff820b8170 T mmhubbub2_disable_mcif +ffffffff820b81b0 T mcifwb2_dump_frame +ffffffff820b82c0 T dcn20_mmhubbub_construct +ffffffff820b8310 t mmhubbub2_config_mcif_buf +ffffffff820b8960 t mmhubbub2_config_mcif_arb +ffffffff820b9000 T mpc2_update_blending +ffffffff820b92a0 T mpc2_set_denorm +ffffffff820b9310 T mpc2_set_denorm_clamp +ffffffff820b9460 T mpc2_set_output_csc +ffffffff820b9650 T mpc2_set_ocsc_default +ffffffff820b9830 T mpc20_power_on_ogam_lut +ffffffff820b98b0 T mpc2_set_output_gamma +ffffffff820ba0b0 T mpc2_assert_idle_mpcc +ffffffff820ba1c0 T mpc2_assert_mpcc_idle_before_connect +ffffffff820ba410 T dcn20_mpc_construct +ffffffff820ba4d0 t mpc2_get_mpcc_for_dpp +ffffffff820bb000 T opp2_set_disp_pattern_generator +ffffffff820bb810 T opp2_dpg_set_blank_color +ffffffff820bb990 T opp2_program_dpg_dimensions +ffffffff820bba20 T opp2_dpg_is_blanked +ffffffff820bbae0 T opp2_program_left_edge_extra_pixel +ffffffff820bbb30 T dcn20_opp_construct +ffffffff820bc000 T optc2_enable_crtc +ffffffff820bc100 T optc2_set_gsl +ffffffff820bc1f0 T optc2_set_gsl_source_select +ffffffff820bc2b0 T optc2_set_dsc_config +ffffffff820bc380 T optc2_get_dsc_status +ffffffff820bc3c0 T optc2_is_two_pixels_per_containter +ffffffff820bc3d0 T optc2_set_odm_bypass +ffffffff820bc510 T optc2_set_odm_combine +ffffffff820bc700 T optc2_get_optc_source +ffffffff820bc7d0 T optc2_triplebuffer_lock +ffffffff820bc8f0 T optc2_triplebuffer_unlock +ffffffff820bc9a0 T optc2_lock_doublebuffer_enable +ffffffff820bcb80 T optc2_lock_doublebuffer_disable +ffffffff820bcc60 T optc2_setup_manual_trigger +ffffffff820bcdf0 T optc2_program_manual_trigger +ffffffff820bce60 T optc2_configure_crc +ffffffff820bcef0 T optc2_get_last_used_drr_vtotal +ffffffff820bcf30 T dcn20_timing_generator_init +ffffffff820bcfa0 t optc2_set_dwb_source +ffffffff820bd040 t optc2_align_vblanks +ffffffff820be000 T dcn20_dpp_destroy +ffffffff820be050 T dcn20_dpp_create +ffffffff820be120 T dcn20_ipp_create +ffffffff820be1d0 T dcn20_opp_create +ffffffff820be280 T dcn20_aux_engine_create +ffffffff820be320 T dcn20_i2c_hw_create +ffffffff820be3b0 T dcn20_mpc_create +ffffffff820be440 T dcn20_hubbub_create +ffffffff820be510 T dcn20_timing_generator_create +ffffffff820be5a0 T dcn20_link_encoder_create +ffffffff820be6a0 T dcn20_stream_encoder_create +ffffffff820be760 T dcn20_hwseq_create +ffffffff820be7d0 T dcn20_clock_source_destroy +ffffffff820be820 T dcn20_dsc_create +ffffffff820be8e0 T dcn20_dsc_destroy +ffffffff820be930 T dcn20_hubp_create +ffffffff820bea00 T dcn20_build_mapped_resource +ffffffff820bec20 T dcn20_acquire_dsc +ffffffff820bed60 T dcn20_release_dsc +ffffffff820bedd0 T dcn20_add_dsc_to_stream_resource +ffffffff820bef40 T dcn20_add_stream_to_ctx +ffffffff820befd0 T dcn20_remove_stream_from_ctx +ffffffff820bf0c0 T dcn20_split_stream_for_odm +ffffffff820bf570 T dcn20_split_stream_for_mpc +ffffffff820bf6f0 T dcn20_calc_max_scaled_time +ffffffff820bf760 T dcn20_set_mcif_arb_params +ffffffff820bf8d0 T dcn20_validate_dsc +ffffffff820bfa80 T dcn20_find_secondary_pipe +ffffffff820bfc60 T dcn20_merge_pipes_for_validate +ffffffff820bfed0 T dcn20_validate_apply_pipe_split_flags +ffffffff820c0760 T dcn20_fast_validate_bw +ffffffff820c0cb0 T dcn20_validate_bandwidth +ffffffff820c0d30 T dcn20_acquire_free_pipe_for_layer +ffffffff820c0e50 T dcn20_get_dcc_compression_cap +ffffffff820c0e80 T dcn20_patch_unknown_plane_state +ffffffff820c0ee0 T dcn20_dwbc_create +ffffffff820c0ff0 T dcn20_mmhubbub_create +ffffffff820c1150 T dcn20_create_resource_pool +ffffffff820c28f0 t dcn20_resource_destruct +ffffffff820c2da0 t dcn20_destroy_resource_pool +ffffffff820c2e00 t dcn20_panel_cntl_create +ffffffff820c2e90 t read_dce_straps +ffffffff820c2ec0 t dcn20_create_audio +ffffffff820c3000 T enc2_set_dynamic_metadata +ffffffff820c3260 T enc2_stream_encoder_dp_unblank +ffffffff820c35a0 T enc2_stream_encoder_dp_set_stream_attribute +ffffffff820c3600 T enc2_get_fifo_cal_average_level +ffffffff820c3660 T dcn20_stream_encoder_construct +ffffffff820c36c0 t enc2_stream_encoder_update_hdmi_info_packets +ffffffff820c3790 t enc2_stream_encoder_stop_hdmi_info_packets +ffffffff820c3aa0 t enc2_stream_encoder_update_dp_info_packets_sdp_line_num +ffffffff820c3b60 t enc2_stream_encoder_update_dp_info_packets +ffffffff820c3c10 t enc2_read_state +ffffffff820c3d90 t enc2_dp_set_dsc_config +ffffffff820c3e60 t enc2_dp_set_dsc_pps_info_packet +ffffffff820c4330 t enc2_dp_set_odm_combine +ffffffff820c4370 t enc2_update_hdmi_info_packet +ffffffff820c5000 T dcn20_vmid_setup +ffffffff820c6000 T dccg201_create +ffffffff820c60b0 t dccg201_update_dpp_dto +ffffffff820c7000 T dpp201_construct +ffffffff820c7080 t dpp201_get_optimal_number_of_taps +ffffffff820c7440 t dpp201_cnv_setup +ffffffff820c8000 T hubbub201_construct +ffffffff820c8060 t hubbub201_program_watermarks +ffffffff820c9000 T dcn201_hubp_construct +ffffffff820c9070 t hubp201_setup +ffffffff820c9350 t hubp201_program_surface_config +ffffffff820ca000 T dcn201_update_plane_addr +ffffffff820ca2a0 T dcn201_init_blank +ffffffff820ca3e0 T dcn201_init_hw +ffffffff820cabb0 T dcn201_plane_atomic_disconnect +ffffffff820cad20 T dcn201_update_mpcc +ffffffff820cafb0 T dcn201_pipe_control_lock +ffffffff820cb0b0 T dcn201_set_cursor_attribute +ffffffff820cb140 T dcn201_set_dmdata_attributes +ffffffff820cb250 T dcn201_unblank_stream +ffffffff820cc000 T dcn201_hw_sequencer_construct +ffffffff820cd000 T dcn201_link_encoder_construct +ffffffff820cd190 t dcn201_link_encoder_is_in_alt_mode +ffffffff820cd200 t dcn201_link_encoder_get_max_link_cap +ffffffff820ce000 T dcn201_mpc_construct +ffffffff820ce0c0 t mpc201_set_out_rate_control +ffffffff820cf000 T dcn201_opp_construct +ffffffff820d0000 T optc201_is_two_pixels_per_containter +ffffffff820d0010 T dcn201_timing_generator_init +ffffffff820d0080 t optc201_validate_timing +ffffffff820d0180 t optc201_triplebuffer_unlock +ffffffff820d0230 t optc201_triplebuffer_lock +ffffffff820d0350 t optc201_get_optc_source +ffffffff820d1000 T dcn201_create_resource_pool +ffffffff820d1a30 t dcn201_resource_destruct +ffffffff820d1d30 t dcn201_destroy_resource_pool +ffffffff820d1d90 t dcn201_link_init +ffffffff820d1de0 t dcn201_link_encoder_create +ffffffff820d1e90 t dcn201_acquire_free_pipe_for_layer +ffffffff820d1fa0 t dcn201_populate_dml_writeback_from_context +ffffffff820d2000 t read_dce_straps +ffffffff820d2030 t dcn201_create_audio +ffffffff820d2060 t dcn201_stream_encoder_create +ffffffff820d2100 t dcn201_hwseq_create +ffffffff820d2170 t dcn201_get_dcc_compression_cap +ffffffff820d3000 T dccg21_create +ffffffff820d30b0 t dccg21_update_dpp_dto +ffffffff820d4000 T dcn21_dchvm_init +ffffffff820d4200 T hubbub21_init_dchub +ffffffff820d43d0 T hubbub21_program_urgent_watermarks +ffffffff820d4bf0 T hubbub21_program_stutter_watermarks +ffffffff820d50e0 T hubbub21_program_pstate_watermarks +ffffffff820d5380 T hubbub21_program_watermarks +ffffffff820d54e0 T hubbub21_wm_read_state +ffffffff820d5780 T hubbub21_construct +ffffffff820d57e0 t hubbub21_apply_DEDCN21_147_wa +ffffffff820d6000 T apply_DEDCN21_142_wa_for_hostvm_deadline +ffffffff820d62e0 T hubp21_program_deadline +ffffffff820d6310 T hubp21_program_requestor +ffffffff820d66b0 T hubp21_construct +ffffffff820d6720 t hubp21_setup +ffffffff820d6780 t hubp21_set_viewport +ffffffff820d6a80 t hubp21_program_surface_flip_and_addr +ffffffff820d7370 t hubp21_set_vm_system_aperture_settings +ffffffff820d74a0 t hubp21_init +ffffffff820d74d0 t hubp21_validate_dml_output +ffffffff820d9000 T dcn21_init_sys_ctx +ffffffff820d9110 T dcn21_s0i3_golden_init_wa +ffffffff820d9170 T dcn21_exit_optimized_pwr_state +ffffffff820d9190 T dcn21_optimize_pwr_state +ffffffff820d91c0 T dcn21_PLAT_58856_wa +ffffffff820d9260 T dcn21_set_abm_immediate_disable +ffffffff820d9390 T dcn21_set_pipe +ffffffff820d94b0 T dcn21_set_backlight_level +ffffffff820d96a0 T dcn21_is_abm_supported +ffffffff820da000 T dcn21_hw_sequencer_construct +ffffffff820db000 T dcn21_link_encoder_enable_dp_output +ffffffff820db140 t dcn21_link_encoder_acquire_phy +ffffffff820db320 T dcn21_link_encoder_construct +ffffffff820db500 t dcn21_link_encoder_enable_dp_mst_output +ffffffff820db570 t dcn21_link_encoder_disable_output +ffffffff820dc000 T dcn21_fast_validate_bw +ffffffff820dc6a0 T dcn21_create_resource_pool +ffffffff820dd9d0 t dcn21_resource_destruct +ffffffff820dde70 t dcn21_destroy_resource_pool +ffffffff820dded0 t dcn21_panel_cntl_create +ffffffff820ddf60 t dcn21_link_encoder_create +ffffffff820de060 t dcn21_validate_bandwidth +ffffffff820de0e0 t dcn21_patch_unknown_plane_state +ffffffff820de130 t dcn21_get_panel_config_defaults +ffffffff820de170 t read_dce_straps +ffffffff820de1a0 t dcn21_create_audio +ffffffff820de1d0 t dcn21_stream_encoder_create +ffffffff820de270 t dcn21_hwseq_create +ffffffff820df000 T afmt3_setup_hdmi_audio +ffffffff820df1d0 T afmt3_se_audio_setup +ffffffff820df370 T afmt3_audio_mute_control +ffffffff820df3e0 T afmt3_audio_info_immediate_update +ffffffff820df420 T afmt3_setup_dp_audio +ffffffff820df510 T afmt3_construct +ffffffff820e0000 T cm_helper_program_gamcor_xfer_func +ffffffff820e03c0 T cm3_helper_translate_curve_to_hw_format +ffffffff820e0fd0 T cm3_helper_convert_to_custom_float +ffffffff820e1420 T cm3_helper_translate_curve_to_degamma_hw_format +ffffffff820e1c40 T is_rgb_equal +ffffffff820e2000 T dccg3_create +ffffffff820e20b0 T dccg30_create +ffffffff820e3000 T dcn30_link_encoder_validate_output_with_stream +ffffffff820e3010 T dcn30_link_encoder_construct +ffffffff820e31f0 T enc3_hw_init +ffffffff820e4000 T enc3_stream_encoder_update_hdmi_info_packets +ffffffff820e4100 t enc3_update_hdmi_info_packet +ffffffff820e44f0 T enc3_stream_encoder_stop_hdmi_info_packets +ffffffff820e4ad0 T enc3_dp_set_dsc_pps_info_packet +ffffffff820e4df0 T enc3_stream_encoder_update_dp_info_packets_sdp_line_num +ffffffff820e4eb0 T enc3_stream_encoder_update_dp_info_packets +ffffffff820e5170 T enc3_audio_mute_control +ffffffff820e51e0 T enc3_se_dp_audio_setup +ffffffff820e5260 T enc3_se_dp_audio_enable +ffffffff820e5350 T enc3_se_hdmi_audio_setup +ffffffff820e5660 T dcn30_dio_stream_encoder_construct +ffffffff820e56d0 t enc3_stream_encoder_hdmi_set_stream_attribute +ffffffff820e5cd0 t enc3_stream_encoder_dvi_set_stream_attribute +ffffffff820e5ed0 t enc3_read_state +ffffffff820e6060 t enc3_dp_set_dsc_config +ffffffff820e6130 t enc3_dp_set_odm_combine +ffffffff820e7000 T dpp30_read_state +ffffffff820e7050 T dpp3_program_post_csc +ffffffff820e7240 T dpp3_set_pre_degam +ffffffff820e72f0 T dpp3_cnv_setup +ffffffff820e7bc0 T dpp3_set_cursor_attributes +ffffffff820e7d30 T dpp3_get_optimal_number_of_taps +ffffffff820e8750 T dpp3_construct +ffffffff820e87b0 t dpp3_deferred_update +ffffffff820e8b90 t dpp3_program_blnd_lut +ffffffff820e95e0 t dpp3_program_shaper +ffffffff820eb660 t dpp3_program_3dlut +ffffffff820ebe10 t dpp3_set3dlut_ram12 +ffffffff820ec000 T dpp3_program_cm_dealpha +ffffffff820ec0a0 T dpp3_program_cm_bias +ffffffff820ec190 T dpp3_program_gamcor_lut +ffffffff820ecbb0 t dpp3_power_on_gamcor_lut +ffffffff820ecce0 T dpp3_set_hdr_multiplier +ffffffff820ecd30 T dpp3_cm_set_gamut_remap +ffffffff820ed000 T dwb3_config_fc +ffffffff820ed1b0 T dwb3_set_stereo +ffffffff820ed270 T dwb3_enable +ffffffff820ed3a0 T dwb3_set_denorm +ffffffff820ed4c0 T dwb3_disable +ffffffff820ed570 T dwb3_update +ffffffff820ed6a0 T dwb3_is_enabled +ffffffff820ed740 T dwb3_set_new_content +ffffffff820ed780 T dcn30_dwbc_construct +ffffffff820ed7d0 T dwb3_set_host_read_rate_control +ffffffff820ed840 t dwb3_get_caps +ffffffff820ee000 T dwb3_ogam_set_input_transfer_func +ffffffff820ee9f0 T dwb3_set_gamut_remap +ffffffff820eeca0 T dwb3_program_hdr_mult +ffffffff820ef000 T hubbub3_init_dchub_sys_ctx +ffffffff820ef1c0 T hubbub3_program_watermarks +ffffffff820ef2c0 T hubbub3_dcc_support_swizzle +ffffffff820ef380 T hubbub3_get_dcc_compression_cap +ffffffff820ef560 T hubbub3_force_wm_propagate_to_pipes +ffffffff820ef610 T hubbub3_force_pstate_change_control +ffffffff820ef690 T hubbub3_init_watermarks +ffffffff820ef9d0 T hubbub3_construct +ffffffff820f0000 T hubp3_set_vm_system_aperture_settings +ffffffff820f0130 T hubp3_program_surface_flip_and_addr +ffffffff820f0b20 T hubp3_dcc_control +ffffffff820f0be0 T hubp3_dcc_control_sienna_cichlid +ffffffff820f0d00 T hubp3_dmdata_set_attributes +ffffffff820f0f00 T hubp3_program_surface_config +ffffffff820f11f0 T hubp3_read_state +ffffffff820f14c0 T hubp3_setup +ffffffff820f1550 T hubp3_init +ffffffff820f1580 T hubp3_construct +ffffffff820f2000 T dcn30_set_blend_lut +ffffffff820f2070 T dcn30_set_input_transfer_func +ffffffff820f21d0 T dcn30_set_output_transfer_func +ffffffff820f2500 T dcn30_update_writeback +ffffffff820f2590 t dcn30_set_writeback +ffffffff820f2740 T dcn30_mmhubbub_warmup +ffffffff820f2990 T dcn30_enable_writeback +ffffffff820f2a40 T dcn30_disable_writeback +ffffffff820f2b20 T dcn30_program_all_writeback_pipes_in_tree +ffffffff820f2e20 T dcn30_init_hw +ffffffff820f3550 T dcn30_set_avmute +ffffffff820f35b0 T dcn30_update_info_frame +ffffffff820f36a0 T dcn30_program_dmdata_engine +ffffffff820f3740 T dcn30_apply_idle_power_optimizations +ffffffff820f3c60 T dcn30_does_plane_fit_in_mall +ffffffff820f3d10 T dcn30_hardware_release +ffffffff820f3e00 T dcn30_set_disp_pattern_generator +ffffffff820f3e70 T dcn30_prepare_bandwidth +ffffffff820f3f60 T dcn30_set_static_screen_control +ffffffff820f4000 T dcn30_hw_sequencer_construct +ffffffff820f5000 T dcn30_mmhubbub_construct +ffffffff820f5050 t mmhubbub3_warmup_mcif +ffffffff820f5260 t mmhubbub3_config_mcif_buf +ffffffff820f5710 t mmhubbub3_config_mcif_arb +ffffffff820f6000 T mpc3_is_dwb_idle +ffffffff820f6070 T mpc3_set_dwb_mux +ffffffff820f60f0 T mpc3_disable_dwb_mux +ffffffff820f6170 T mpc3_set_out_rate_control +ffffffff820f6280 T mpc3_get_ogam_current +ffffffff820f6320 T mpc3_power_on_ogam_lut +ffffffff820f63f0 T mpc3_set_output_gamma +ffffffff820f7030 T mpc3_set_denorm +ffffffff820f70a0 T mpc3_set_denorm_clamp +ffffffff820f71f0 T mpc3_program_shaper +ffffffff820f93b0 t mpc3_power_on_shaper_3dlut +ffffffff820f9730 T mpc3_init_mpcc +ffffffff820f97b0 T mpc3_set_gamut_remap +ffffffff820f9a20 T mpc3_program_3dlut +ffffffff820fa190 t mpc3_set3dlut_ram12 +ffffffff820fa370 T mpc3_set_output_csc +ffffffff820fa4e0 T mpc3_set_ocsc_default +ffffffff820fa650 T mpc3_set_rmu_mux +ffffffff820fa6f0 T mpc3_get_rmu_mux_status +ffffffff820fa7a0 T mpcc3_acquire_rmu +ffffffff820fa900 T dcn30_mpc_construct +ffffffff820fa9d0 t mpcc3_release_rmu +ffffffff820fab40 t mpc3_set_mpc_mem_lp_mode +ffffffff820fb000 T optc3_triplebuffer_lock +ffffffff820fb120 T optc3_lock_doublebuffer_enable +ffffffff820fb3b0 T optc3_lock_doublebuffer_disable +ffffffff820fb4d0 T optc3_lock +ffffffff820fb5a0 T optc3_set_out_mux +ffffffff820fb5e0 T optc3_program_blank_color +ffffffff820fb710 T optc3_set_drr_trigger_window +ffffffff820fb7a0 T optc3_set_vtotal_change_limit +ffffffff820fb810 T optc3_set_dsc_config +ffffffff820fb860 T optc3_set_odm_bypass +ffffffff820fb9e0 T optc3_set_odm_combine +ffffffff820fbd30 T optc3_wait_drr_doublebuffer_pending_clear +ffffffff820fbdb0 T optc3_set_vtotal_min_max +ffffffff820fbdf0 T optc3_tg_init +ffffffff820fbe50 T dcn30_timing_generator_init +ffffffff820fc000 T dcn30_add_stream_to_ctx +ffffffff820fc020 T dcn30_populate_dml_pipes_from_context +ffffffff820fc100 T dcn30_populate_dml_writeback_from_context +ffffffff820fc160 T dcn30_calc_max_scaled_time +ffffffff820fc1c0 T dcn30_set_mcif_arb_params +ffffffff820fc330 T dcn30_acquire_post_bldn_3dlut +ffffffff820fc4c0 T dcn30_release_post_bldn_3dlut +ffffffff820fc570 T dcn30_internal_validate_bw +ffffffff820fd2e0 t dcn30_split_stream_for_mpc_or_odm +ffffffff820fd600 T dcn30_can_support_mclk_switch_using_fw_based_vblank_stretch +ffffffff820fd6e0 t is_refresh_rate_support_mclk_switch_using_fw_based_vblank_stretch +ffffffff820fd780 T dcn30_setup_mclk_switch_using_fw_based_vblank_stretch +ffffffff820fd820 T dcn30_update_soc_for_wm_a +ffffffff820fd870 T dcn30_calculate_wm_and_dlg +ffffffff820fd8e0 T dcn30_validate_bandwidth +ffffffff820fdd10 T dcn30_update_bw_bounding_box +ffffffff820fe370 T dcn30_create_resource_pool +ffffffff820ff920 t dcn30_resource_destruct +ffffffff820ffea0 t dcn30_destroy_resource_pool +ffffffff820fff00 t dcn30_panel_cntl_create +ffffffff820fff90 t dcn30_link_encoder_create +ffffffff82100040 t dcn30_get_panel_config_defaults +ffffffff821000c0 t read_dce_straps +ffffffff821000f0 t dcn30_create_audio +ffffffff82100120 t dcn30_stream_encoder_create +ffffffff821002a0 t dcn30_hwseq_create +ffffffff82101000 T vpg3_update_generic_info_packet +ffffffff821019a0 T vpg3_construct +ffffffff82102000 T dccg301_create +ffffffff82103000 T dcn301_link_encoder_construct +ffffffff82104000 T hubbub301_construct +ffffffff82105000 T dcn301_hw_sequencer_construct +ffffffff82106000 T optc301_set_drr +ffffffff82106230 T optc301_setup_manual_trigger +ffffffff82106350 T dcn301_timing_generator_init +ffffffff82107000 T dcn301_panel_cntl_construct +ffffffff82107050 t dcn301_panel_cntl_destroy +ffffffff821070a0 t dcn301_panel_cntl_hw_init +ffffffff821072b0 t dcn301_is_panel_backlight_on +ffffffff82107310 t dcn301_is_panel_powered_on +ffffffff821073c0 t dcn301_store_backlight_level +ffffffff82107460 t dcn301_get_16_bit_backlight_from_pwm +ffffffff82108000 T dcn301_create_resource_pool +ffffffff82109590 t dcn301_destruct +ffffffff82109ad0 t dcn301_destroy_resource_pool +ffffffff82109b30 t dcn301_panel_cntl_create +ffffffff82109bc0 t dcn301_link_encoder_create +ffffffff82109c70 t dcn301_calculate_wm_and_dlg +ffffffff82109ce0 t read_dce_straps +ffffffff82109d10 t dcn301_create_audio +ffffffff82109d40 t dcn301_stream_encoder_create +ffffffff82109ec0 t dcn301_hwseq_create +ffffffff8210a000 T dcn302_dpp_pg_control +ffffffff8210a2a0 T dcn302_hubp_pg_control +ffffffff8210a550 T dcn302_dsc_pg_control +ffffffff8210b000 T dcn302_hw_sequencer_construct +ffffffff8210c000 T dcn302_update_bw_bounding_box +ffffffff8210c050 T dcn302_create_resource_pool +ffffffff8210d4a0 t dcn302_resource_destruct +ffffffff8210d9e0 t dcn302_destroy_resource_pool +ffffffff8210da30 t dcn302_panel_cntl_create +ffffffff8210dac0 t dcn302_link_encoder_create +ffffffff8210db70 t dcn302_get_panel_config_defaults +ffffffff8210dbf0 t read_dce_straps +ffffffff8210dc20 t dcn302_create_audio +ffffffff8210dc50 t dcn302_stream_encoder_create +ffffffff8210ddd0 t dcn302_hwseq_create +ffffffff8210e000 T dcn303_dpp_pg_control +ffffffff8210e030 T dcn303_hubp_pg_control +ffffffff8210e060 T dcn303_dsc_pg_control +ffffffff8210e090 T dcn303_enable_power_gating_plane +ffffffff8210f000 T dcn303_hw_sequencer_construct +ffffffff82110000 T dcn303_update_bw_bounding_box +ffffffff82110050 T dcn303_create_resource_pool +ffffffff821112a0 t dcn303_resource_destruct +ffffffff821117e0 t dcn303_destroy_resource_pool +ffffffff82111830 t dcn303_panel_cntl_create +ffffffff821118c0 t dcn303_link_encoder_create +ffffffff82111970 t dcn303_get_panel_config_defaults +ffffffff821119f0 t read_dce_straps +ffffffff82111a20 t dcn303_create_audio +ffffffff82111a50 t dcn303_stream_encoder_create +ffffffff82111bd0 t dcn303_hwseq_create +ffffffff82112000 T afmt31_powerdown +ffffffff82112090 T afmt31_poweron +ffffffff82112120 T afmt31_construct +ffffffff82113000 T apg31_construct +ffffffff82113050 t apg31_se_audio_setup +ffffffff82113160 t apg31_enable +ffffffff82113270 t apg31_disable +ffffffff82114000 T dccg31_update_dpp_dto +ffffffff82114160 T dccg31_set_dpstreamclk +ffffffff821142f0 t dccg31_disable_dpstreamclk +ffffffff82114440 T dccg31_enable_symclk32_se +ffffffff82114740 T dccg31_disable_symclk32_se +ffffffff82114a10 T dccg31_enable_symclk32_le +ffffffff82114b20 T dccg31_disable_symclk32_le +ffffffff82114c10 T dccg31_set_symclk32_le_root_clock_gating +ffffffff82114d20 T dccg31_disable_dscclk +ffffffff82114f70 T dccg31_enable_dscclk +ffffffff821151e0 T dccg31_set_physymclk +ffffffff821156f0 T dccg31_set_dtbclk_dto +ffffffff821159a0 T dccg31_set_audio_dtbclk_dto +ffffffff82115ab0 T dccg31_get_dccg_ref_freq +ffffffff82115ae0 T dccg31_set_dispclk_change_mode +ffffffff82115b30 T dccg31_init +ffffffff82116110 T dccg31_otg_add_pixel +ffffffff82116150 T dccg31_otg_drop_pixel +ffffffff82116190 T dccg31_create +ffffffff82117000 T dcn31_link_encoder_set_dio_phy_mux +ffffffff82117390 T dcn31_link_encoder_construct +ffffffff82117560 T dcn31_link_encoder_construct_minimal +ffffffff821175e0 T dcn31_link_encoder_enable_dp_output +ffffffff82117820 T dcn31_link_encoder_enable_dp_mst_output +ffffffff82117a60 T dcn31_link_encoder_disable_output +ffffffff82117cd0 T dcn31_link_encoder_is_in_alt_mode +ffffffff82117e20 T dcn31_link_encoder_get_max_link_cap +ffffffff82117fa0 t enc31_hw_init +ffffffff82118000 T dcn31_hpo_dp_link_enc_enable +ffffffff82118160 T dcn31_hpo_dp_link_enc_disable +ffffffff821181d0 T dcn31_hpo_dp_link_enc_set_link_test_pattern +ffffffff82118b30 T dcn31_hpo_dp_link_enc_update_stream_allocation_table +ffffffff82118db0 T dcn31_hpo_dp_link_enc_set_throttled_vcp_size +ffffffff82119050 T dcn31_hpo_dp_link_enc_read_state +ffffffff821192f0 T dcn31_hpo_dp_link_enc_enable_dp_output +ffffffff821193f0 T dcn31_hpo_dp_link_enc_disable_output +ffffffff82119530 T dcn31_hpo_dp_link_enc_set_ffe +ffffffff82119620 T hpo_dp_link_encoder31_construct +ffffffff82119680 t dcn31_hpo_dp_link_enc_is_in_alt_mode +ffffffff8211a000 T dcn31_hpo_dp_stream_encoder_construct +ffffffff8211a070 t dcn31_hpo_dp_stream_enc_enable_stream +ffffffff8211a1b0 t dcn31_hpo_dp_stream_enc_dp_unblank +ffffffff8211a460 t dcn31_hpo_dp_stream_enc_dp_blank +ffffffff8211a560 t dcn31_hpo_dp_stream_enc_disable +ffffffff8211a5d0 t dcn31_hpo_dp_stream_enc_set_stream_attribute +ffffffff8211ae80 t dcn31_hpo_dp_stream_enc_update_dp_info_packets_sdp_line_num +ffffffff8211af40 t dcn31_hpo_dp_stream_enc_update_dp_info_packets +ffffffff8211b160 t dcn31_hpo_dp_stream_enc_stop_dp_info_packets +ffffffff8211b2f0 t dcn31_hpo_dp_stream_enc_set_dsc_pps_info_packet +ffffffff8211b590 t dcn31_hpo_dp_stream_enc_map_stream_to_link +ffffffff8211b690 t dcn31_hpo_dp_stream_enc_audio_setup +ffffffff8211b740 t dcn31_hpo_dp_stream_enc_audio_enable +ffffffff8211b810 t dcn31_hpo_dp_stream_enc_audio_disable +ffffffff8211b9c0 t dcn31_hpo_dp_stream_enc_read_state +ffffffff8211bb50 t dcn31_set_hblank_min_symbol_width +ffffffff8211c000 T hubbub31_init_dchub_sys_ctx +ffffffff8211c1e0 T hubbub31_init +ffffffff8211c280 T hubbub31_construct +ffffffff8211c320 t hubbub31_get_dcc_compression_cap +ffffffff8211c500 t hubbub31_get_dchub_ref_freq +ffffffff8211c5e0 t hubbub31_program_watermarks +ffffffff8211df00 t hubbub31_verify_allow_pstate_change_high +ffffffff8211e0c0 t dcn31_program_det_size +ffffffff8211e2a0 t dcn31_program_compbuf_size +ffffffff8211e520 t dcn31_init_crb +ffffffff8211f000 T hubp31_set_unbounded_requesting +ffffffff8211f090 T hubp31_soft_reset +ffffffff8211f0e0 T hubp31_construct +ffffffff8211f150 t hubp31_program_extended_blank +ffffffff82120000 T dcn31_init_hw +ffffffff82120850 T dcn31_dsc_pg_control +ffffffff82120ba0 T dcn31_enable_power_gating_plane +ffffffff82120e00 T dcn31_update_info_frame +ffffffff82120f30 T dcn31_z10_save_init +ffffffff82120fc0 T dcn31_z10_restore +ffffffff82121070 T dcn31_hubp_pg_control +ffffffff82121390 T dcn31_init_sys_ctx +ffffffff82121440 T dcn31_reset_hw_ctx_wrap +ffffffff82121790 T dcn31_setup_hpo_hw_control +ffffffff82122000 T dcn31_hw_sequencer_construct +ffffffff82123000 T optc31_immediate_disable_crtc +ffffffff82123100 T optc31_set_drr +ffffffff82123310 T optc3_init_odm +ffffffff82123480 T dcn31_timing_generator_init +ffffffff821234f0 t optc31_enable_crtc +ffffffff821235f0 t optc31_disable_crtc +ffffffff821236d0 t optc31_set_odm_combine +ffffffff82124000 T dcn31_panel_cntl_construct +ffffffff82124040 t dcn31_panel_cntl_destroy +ffffffff82124090 t dcn31_panel_cntl_hw_init +ffffffff82124190 t dcn31_is_panel_backlight_on +ffffffff82124230 t dcn31_is_panel_powered_on +ffffffff821242e0 t dcn31_store_backlight_level +ffffffff821243b0 t dcn31_get_16_bit_backlight_from_pwm +ffffffff82125000 T dcn31x_populate_dml_pipes_from_context +ffffffff82125180 T dcn31_populate_dml_pipes_from_context +ffffffff821255c0 T dcn31_calculate_wm_and_dlg +ffffffff82125630 T dcn31_populate_dml_writeback_from_context +ffffffff82125690 T dcn31_set_mcif_arb_params +ffffffff821256f0 T dcn31_validate_bandwidth +ffffffff82125ae0 T dcn31_create_resource_pool +ffffffff82126e80 t dcn31_resource_destruct +ffffffff821274f0 t dcn31_destroy_resource_pool +ffffffff82127550 t dcn31_panel_cntl_create +ffffffff821275c0 t dcn31_link_encoder_create +ffffffff82127670 t dcn31_link_enc_create_minimal +ffffffff82127710 t dcn31_get_panel_config_defaults +ffffffff82127750 t read_dce_straps +ffffffff82127780 t dcn31_create_audio +ffffffff821277b0 t dcn31_stream_encoder_create +ffffffff82127930 t dcn31_hpo_dp_stream_encoder_create +ffffffff82127af0 t dcn31_hpo_dp_link_encoder_create +ffffffff82127b80 t dcn31_hwseq_create +ffffffff82128000 T vpg31_powerdown +ffffffff82128090 T vpg31_poweron +ffffffff82128120 T vpg31_construct +ffffffff82129000 T dccg314_create +ffffffff821290b0 t dccg314_init +ffffffff82129210 t dccg314_set_dpstreamclk +ffffffff821295d0 t dccg314_set_dtbclk_dto +ffffffff821297c0 t dccg314_set_pixel_rate_div +ffffffff82129b30 t dccg314_set_valid_pixel_rate +ffffffff82129ba0 t dccg314_trigger_dio_fifo_resync +ffffffff82129c40 t dccg314_dpp_root_clock_control +ffffffff8212a000 T dcn314_dio_stream_encoder_construct +ffffffff8212a070 t enc314_stream_encoder_hdmi_set_stream_attribute +ffffffff8212a670 t enc314_stream_encoder_dvi_set_stream_attribute +ffffffff8212a880 t enc314_stream_encoder_dp_blank +ffffffff8212a900 t enc314_stream_encoder_dp_unblank +ffffffff8212ac80 t enc314_read_state +ffffffff8212ade0 t enc314_dp_set_dsc_config +ffffffff8212ae30 t enc314_dp_set_odm_combine +ffffffff8212ae70 t enc314_set_dig_input_mode +ffffffff8212aec0 t enc314_enable_fifo +ffffffff8212af60 t enc314_disable_fifo +ffffffff8212afb0 t enc314_reset_fifo +ffffffff8212c000 T dcn314_update_odm +ffffffff8212c600 T dcn314_dsc_pg_control +ffffffff8212c9d0 T dcn314_enable_power_gating_plane +ffffffff8212cc60 T dcn314_calculate_dccg_k1_k2_values +ffffffff8212ce10 T dcn314_set_pixels_per_cycle +ffffffff8212cf00 T dcn314_resync_fifo_dccg_dio +ffffffff8212d0a0 T dcn314_dpp_root_clock_control +ffffffff8212d100 T dcn314_disable_link_output +ffffffff8212e000 T dcn314_hw_sequencer_construct +ffffffff8212f000 T dcn314_timing_generator_init +ffffffff8212f070 t optc314_enable_crtc +ffffffff8212f170 t optc314_disable_crtc +ffffffff8212f250 t optc314_phantom_crtc_post_enable +ffffffff8212f310 t optc314_set_odm_bypass +ffffffff8212f480 t optc314_set_odm_combine +ffffffff8212f770 t optc314_set_h_timing_div_manual_mode +ffffffff82130000 T dcn314_validate_bandwidth +ffffffff82130490 T dcn314_create_resource_pool +ffffffff821317b0 t dcn314_resource_destruct +ffffffff82131e20 t dcn314_get_preferred_eng_id_dpia +ffffffff82131e50 t dcn314_destroy_resource_pool +ffffffff82131eb0 t dcn31_panel_cntl_create +ffffffff82131f20 t dcn31_link_encoder_create +ffffffff82131fd0 t dcn31_link_enc_create_minimal +ffffffff82132070 t dcn314_populate_dml_pipes_from_context +ffffffff82132100 t dcn314_update_bw_bounding_box +ffffffff82132150 t dcn314_get_panel_config_defaults +ffffffff82132190 t read_dce_straps +ffffffff821321c0 t dcn31_create_audio +ffffffff821321f0 t dcn314_stream_encoder_create +ffffffff82132370 t dcn31_hpo_dp_stream_encoder_create +ffffffff82132530 t dcn31_hpo_dp_link_encoder_create +ffffffff821325c0 t dcn314_hwseq_create +ffffffff82133000 T dcn315_create_resource_pool +ffffffff82134280 t dcn315_resource_destruct +ffffffff821348e0 t dcn315_destroy_resource_pool +ffffffff82134940 t dcn31_panel_cntl_create +ffffffff821349b0 t dcn31_link_encoder_create +ffffffff82134a60 t dcn31_link_enc_create_minimal +ffffffff82134b00 t dcn315_populate_dml_pipes_from_context +ffffffff82135200 t dcn315_get_panel_config_defaults +ffffffff82135240 t read_dce_straps +ffffffff82135270 t dcn31_create_audio +ffffffff821352a0 t dcn315_stream_encoder_create +ffffffff82135420 t dcn31_hpo_dp_stream_encoder_create +ffffffff821355e0 t dcn31_hpo_dp_link_encoder_create +ffffffff82135670 t dcn31_hwseq_create +ffffffff82136000 T dcn316_create_resource_pool +ffffffff82137290 t dcn316_resource_destruct +ffffffff821378f0 t dcn316_destroy_resource_pool +ffffffff82137950 t dcn31_panel_cntl_create +ffffffff821379c0 t dcn31_link_encoder_create +ffffffff82137a70 t dcn31_link_enc_create_minimal +ffffffff82137b10 t dcn316_populate_dml_pipes_from_context +ffffffff82137e40 t dcn316_get_panel_config_defaults +ffffffff82137e80 t read_dce_straps +ffffffff82137eb0 t dcn31_create_audio +ffffffff82137ee0 t dcn316_stream_encoder_create +ffffffff82138060 t dcn31_hpo_dp_stream_encoder_create +ffffffff82138220 t dcn31_hpo_dp_link_encoder_create +ffffffff821382b0 t dcn31_hwseq_create +ffffffff82139000 T dccg32_create +ffffffff821390b0 t dccg32_get_dccg_ref_freq +ffffffff821390e0 t dccg32_otg_add_pixel +ffffffff82139120 t dccg32_otg_drop_pixel +ffffffff82139160 t dccg32_set_dpstreamclk +ffffffff821394a0 t dccg32_set_dtbclk_dto +ffffffff821396a0 t dccg32_set_pixel_rate_div +ffffffff82139a10 t dccg32_set_valid_pixel_rate +ffffffff82139a80 t dccg32_trigger_dio_fifo_resync +ffffffff8213a000 T enc32_hw_init +ffffffff8213a090 T dcn32_link_encoder_enable_dp_output +ffffffff8213a0e0 T dcn32_link_encoder_construct +ffffffff8213a2d0 t dcn32_link_encoder_is_in_alt_mode +ffffffff8213a350 t dcn32_link_encoder_get_max_link_cap +ffffffff8213b000 T enc32_stream_encoder_dp_unblank +ffffffff8213b500 T enc32_enable_fifo +ffffffff8213b5a0 t enc32_reset_fifo +ffffffff8213b6a0 T dcn32_dio_stream_encoder_construct +ffffffff8213b710 t enc32_stream_encoder_hdmi_set_stream_attribute +ffffffff8213bc90 t enc32_stream_encoder_dvi_set_stream_attribute +ffffffff8213be10 t enc32_read_state +ffffffff8213bf70 t enc32_dp_set_dsc_config +ffffffff8213bfc0 t enc32_dp_set_odm_combine +ffffffff8213c000 t enc32_set_dig_input_mode +ffffffff8213d000 T dpp32_construct +ffffffff8213d060 t dscl32_calc_lb_num_partitions +ffffffff8213e000 T hpo_dp_link_encoder32_construct +ffffffff8213e060 t dcn32_hpo_dp_link_enc_is_in_alt_mode +ffffffff8213f000 T hubbub32_set_request_limit +ffffffff8213f130 T dcn32_program_det_size +ffffffff8213f2d0 T hubbub32_program_urgent_watermarks +ffffffff8213fa40 T hubbub32_program_stutter_watermarks +ffffffff8213fe90 T hubbub32_program_pstate_watermarks +ffffffff82140320 T hubbub32_program_usr_watermarks +ffffffff82140580 T hubbub32_force_usr_retraining_allow +ffffffff82140600 T hubbub32_force_wm_propagate_to_pipes +ffffffff821406a0 T hubbub32_init +ffffffff821407e0 T hubbub32_construct +ffffffff82140860 t hubbub32_wm_read_state +ffffffff82140c80 t hubbub32_program_watermarks +ffffffff82140d90 t hubbub32_init_watermarks +ffffffff821411d0 t dcn32_program_compbuf_size +ffffffff82141460 t dcn32_init_crb +ffffffff82142000 T hubp32_update_force_pstate_disallow +ffffffff82142090 T hubp32_update_force_cursor_pstate_disallow +ffffffff82142120 T hubp32_update_mall_sel +ffffffff821421b0 T hubp32_prepare_subvp_buffering +ffffffff82142250 T hubp32_phantom_hubp_post_enable +ffffffff82142360 T hubp32_cursor_set_attributes +ffffffff82142620 T hubp32_init +ffffffff82142650 T hubp32_construct +ffffffff82143000 T dcn32_dsc_pg_control +ffffffff82143320 T dcn32_enable_power_gating_plane +ffffffff82143590 T dcn32_hubp_pg_control +ffffffff82143800 T dcn32_apply_idle_power_optimizations +ffffffff82143af0 T dcn32_commit_subvp_config +ffffffff82143ba0 T dcn32_subvp_pipe_control_lock +ffffffff82143d70 T dcn32_subvp_pipe_control_lock_fast +ffffffff82143df0 T dcn32_set_mpc_shaper_3dlut +ffffffff82143f10 T dcn32_set_mcm_luts +ffffffff821440a0 T dcn32_set_input_transfer_func +ffffffff821441e0 T dcn32_set_output_transfer_func +ffffffff82144420 T dcn32_update_force_pstate +ffffffff82144640 T dcn32_update_mall_sel +ffffffff82144830 T dcn32_program_mall_pipe_config +ffffffff82144920 T dcn32_init_hw +ffffffff821451e0 T dcn32_update_odm +ffffffff821457e0 T dcn32_calculate_dccg_k1_k2_values +ffffffff82145a10 T dcn32_is_dp_dig_pixel_rate_div_policy +ffffffff82145ab0 T dcn32_set_pixels_per_cycle +ffffffff82145bf0 T dcn32_resync_fifo_dccg_dio +ffffffff82145d90 T dcn32_unblank_stream +ffffffff82145fa0 T dcn32_disable_link_output +ffffffff82146310 T dcn32_update_phantom_vp_position +ffffffff82146420 T dcn32_apply_update_flags_for_phantom +ffffffff821464a0 T dcn32_dsc_pg_status +ffffffff82146580 T dcn32_update_dsc_pg +ffffffff82146680 T dcn32_enable_phantom_streams +ffffffff821467c0 T dcn32_init_blank +ffffffff82146a00 T dcn32_blank_phantom +ffffffff82146b80 T dcn32_is_pipe_topology_transition_seamless +ffffffff82147000 T dcn32_hw_sequencer_init_functions +ffffffff82148000 T dcn32_mmhubbub_construct +ffffffff82148050 t mmhubbub32_warmup_mcif +ffffffff82148260 t mmhubbub32_config_mcif_buf +ffffffff82148710 t mmhubbub32_config_mcif_arb +ffffffff82149000 T mpc32_mpc_init +ffffffff821491e0 T mpc32_power_on_blnd_lut +ffffffff82149350 T mpc32_configure_post1dlut +ffffffff82149450 T mpc32_program_post1dluta_settings +ffffffff82149660 T mpc32_program_post1dlutb_settings +ffffffff82149870 T mpc32_program_post1dlut_pwl +ffffffff82149ca0 T mpc32_program_post1dlut +ffffffff82149fb0 T mpc32_configure_shaper_lut +ffffffff8214a0d0 T mpc32_program_shaper_luta_settings +ffffffff8214af60 T mpc32_program_shaper_lutb_settings +ffffffff8214bdf0 T mpc32_program_shaper_lut +ffffffff8214bf90 T mpc32_power_on_shaper_3dlut +ffffffff8214c1c0 T mpc32_program_shaper +ffffffff8214c4e0 T mpc32_select_3dlut_ram +ffffffff8214c590 T mpc32_select_3dlut_ram_mask +ffffffff8214c660 T mpc32_set3dlut_ram12 +ffffffff8214c860 T mpc32_set3dlut_ram10 +ffffffff8214c930 T mpc32_program_3dlut +ffffffff8214d300 T dcn32_mpc_construct +ffffffff8214e000 T optc32_set_h_timing_div_manual_mode +ffffffff8214e040 T dcn32_timing_generator_init +ffffffff8214e0b0 t optc32_enable_crtc +ffffffff8214e1b0 t optc32_disable_crtc +ffffffff8214e290 t optc32_phantom_crtc_post_enable +ffffffff8214e350 t optc32_disable_phantom_otg +ffffffff8214e390 t optc32_set_drr +ffffffff8214e550 t optc32_set_odm_bypass +ffffffff8214e6c0 t optc32_set_odm_combine +ffffffff8214f000 T dcn32_panel_cntl_create +ffffffff8214f070 T dcn32_acquire_post_bldn_3dlut +ffffffff8214f160 T dcn32_release_post_bldn_3dlut +ffffffff8214f210 T dcn32_retain_phantom_pipes +ffffffff8214f2f0 T dcn32_remove_phantom_pipes +ffffffff8214f460 T dcn32_add_phantom_pipes +ffffffff8214f890 T dcn32_validate_bandwidth +ffffffff8214fd70 T dcn32_populate_dml_pipes_from_context +ffffffff821501a0 T dcn32_calculate_wm_and_dlg +ffffffff82150210 T dcn32_create_resource_pool +ffffffff821502c0 t dcn32_resource_construct +ffffffff8215b800 T dcn32_acquire_free_pipe_as_secondary_dpp_pipe +ffffffff8215bb00 T dcn32_calc_num_avail_chans_for_mall +ffffffff8215bb70 t dcn32_mpc_create +ffffffff821601d0 t dcn32_dwbc_create +ffffffff82160bd0 t dcn32_mmhubbub_create +ffffffff82161080 t dcn32_resource_destruct +ffffffff82161710 t dcn32_destroy_resource_pool +ffffffff82161770 t dcn32_link_encoder_create +ffffffff82162840 t dcn32_update_bw_bounding_box +ffffffff82162890 t read_dce_straps +ffffffff821628c0 t dcn32_create_audio +ffffffff82162c40 t dcn32_stream_encoder_create +ffffffff82164a80 t dcn32_hpo_dp_stream_encoder_create +ffffffff82165860 t dcn32_hpo_dp_link_encoder_create +ffffffff82165cb0 t dcn32_hwseq_create +ffffffff821661a0 t dcn32_vpg_create +ffffffff82167000 T dcn32_helper_mall_bytes_to_ways +ffffffff82167060 T dcn32_helper_calculate_mall_bytes_for_cursor +ffffffff82167100 T dcn32_helper_calculate_num_ways_for_subvp +ffffffff82167180 T dcn32_merge_pipes_for_subvp +ffffffff82167340 T dcn32_all_pipes_have_stream_and_plane +ffffffff821673d0 T dcn32_subvp_in_use +ffffffff82167460 T dcn32_mpo_in_use +ffffffff821674d0 T dcn32_any_surfaces_rotated +ffffffff82167560 T dcn32_is_center_timing +ffffffff821675d0 T dcn32_is_psr_capable +ffffffff82167620 T dcn32_determine_det_override +ffffffff82167960 T dcn32_set_det_allocations +ffffffff82167af0 T dcn32_save_mall_state +ffffffff82167ba0 T dcn32_restore_mall_state +ffffffff82167c50 T dcn32_can_support_mclk_switch_using_fw_based_vblank_stretch +ffffffff82167e00 t is_refresh_rate_support_mclk_switch_using_fw_based_vblank_stretch +ffffffff82167eb0 T dcn32_check_native_scaling_for_res +ffffffff82167f10 T dcn32_subvp_drr_admissable +ffffffff821680d0 T dcn32_subvp_vblank_admissable +ffffffff82169000 T dcn321_link_encoder_construct +ffffffff8216a000 T dcn321_create_resource_pool +ffffffff8216a0b0 t dcn321_resource_construct +ffffffff82175550 t dcn321_mpc_create +ffffffff82179bb0 t dcn321_dwbc_create +ffffffff8217a5b0 t dcn321_mmhubbub_create +ffffffff8217aa60 t dcn321_resource_destruct +ffffffff8217b0f0 t dcn321_destroy_resource_pool +ffffffff8217b150 t dcn321_link_encoder_create +ffffffff8217c220 t dcn321_update_bw_bounding_box +ffffffff8217c270 t read_dce_straps +ffffffff8217c2a0 t dcn321_create_audio +ffffffff8217c620 t dcn321_stream_encoder_create +ffffffff8217e460 t dcn321_hpo_dp_stream_encoder_create +ffffffff8217f240 t dcn321_hpo_dp_link_encoder_create +ffffffff8217f690 t dcn321_hwseq_create +ffffffff8217fb80 t dcn321_vpg_create +ffffffff82180000 T bw_int_to_fixed_nonconst +ffffffff82180090 T bw_frc_to_fixed +ffffffff82180260 T bw_floor2 +ffffffff82180310 T bw_ceil2 +ffffffff82180390 T bw_mul +ffffffff82181000 T convert_to_custom_float_format +ffffffff82182000 T bw_calcs_init +ffffffff82182e60 T bw_calcs +ffffffff82184800 t calculate_bandwidth +ffffffff8218c000 T scaler_settings_calculation +ffffffff8218c350 T mode_support_and_system_configuration +ffffffff82192180 T display_pipe_configuration +ffffffff82192ab0 T dispclkdppclkdcfclk_deep_sleep_prefetch_parameters_watermarks_and_performance_calculation +ffffffff82198000 T dcn_bw_mod +ffffffff82198060 T dcn_bw_min2 +ffffffff821980a0 T dcn_bw_max +ffffffff821980d0 T dcn_bw_max2 +ffffffff82198110 T dcn_bw_floor2 +ffffffff821981b0 T dcn_bw_floor +ffffffff821981e0 T dcn_bw_ceil +ffffffff82198220 T dcn_bw_ceil2 +ffffffff821982d0 T dcn_bw_max3 +ffffffff82198350 T dcn_bw_max5 +ffffffff82198490 T dcn_bw_pow +ffffffff82198520 T dcn_bw_fabs +ffffffff82198560 T dcn_bw_log +ffffffff82199000 T swizzle_mode_to_macro_tile_size +ffffffff82199090 T dcn_validate_bandwidth +ffffffff8219b300 T dcn_bw_sync_calcs_and_dml +ffffffff8219b550 t dcn_bw_calc_rq_dlg_ttu +ffffffff8219bd20 T dcn_find_dcfclk_suits_all +ffffffff8219c180 T dcn_bw_update_from_pplib_fclks +ffffffff8219c300 T dcn_bw_update_from_pplib_dcfclks +ffffffff8219c3d0 T dcn_get_soc_clks +ffffffff8219c450 T dcn_bw_notify_pplib_of_wm_ranges +ffffffff8219d000 T dcn10_resource_construct_fp +ffffffff8219e000 T dcn20_populate_dml_writeback_from_context +ffffffff8219e180 T dcn20_fpu_set_wb_arb_params +ffffffff8219e330 T dcn20_calculate_dlg_params +ffffffff8219eb70 T dcn20_populate_dml_pipes_from_context +ffffffff8219fa80 T dcn20_calculate_wm +ffffffff821a0270 T dcn20_update_bounding_box +ffffffff821a04f0 T dcn20_cap_soc_clocks +ffffffff821a0850 T dcn20_patch_bounding_box +ffffffff821a0a40 T dcn20_validate_bandwidth_fp +ffffffff821a0be0 t dcn20_validate_bandwidth_internal +ffffffff821a0fe0 T dcn20_fpu_set_wm_ranges +ffffffff821a1080 T dcn20_fpu_adjust_dppclk +ffffffff821a1120 T dcn21_populate_dml_pipes_from_context +ffffffff821a1230 T dcn21_validate_bandwidth_fp +ffffffff821a1cc0 T dcn21_update_bw_bounding_box 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CalculatePrefetchSourceLines +ffffffff821c0f60 t CalculateWriteBackDelay +ffffffff821c1230 t CalculateDelayAfterScaler +ffffffff821c1590 t CalculatePrefetchSchedule +ffffffff821c22b0 t CalculateFlipSchedule +ffffffff821c2680 t adjust_ReturnBW +ffffffff821c3000 T dml20_rq_dlg_get_rq_reg +ffffffff821c3490 t dml20_rq_dlg_get_rq_params +ffffffff821c3660 T dml20_rq_dlg_get_dlg_reg +ffffffff821c5550 t get_surf_rq_param +ffffffff821c5db0 t calculate_ttu_cursor +ffffffff821c7000 T dml20v2_rq_dlg_get_rq_reg +ffffffff821c7490 t dml20v2_rq_dlg_get_rq_params +ffffffff821c7660 T dml20v2_rq_dlg_get_dlg_reg +ffffffff821c9560 t get_surf_rq_param +ffffffff821c9dc0 t calculate_ttu_cursor +ffffffff821cb000 T dml21_recalculate +ffffffff821cb710 t DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation +ffffffff821d0ed0 T dml21_ModeSupportAndSystemConfigurationFull +ffffffff821d7380 t TruncToValidBPP +ffffffff821d7910 t CalculateDCFCLKDeepSleep +ffffffff821d7c50 t CalculateVMAndRowBytes +ffffffff821d84b0 t CalculatePrefetchSourceLines +ffffffff821d8680 t CalculateWriteBackDelay +ffffffff821d8950 t CalculatePrefetchSchedulePerPlane +ffffffff821d9190 t CalculateUrgentBurstFactor +ffffffff821d95a0 t CalculateFlipSchedule +ffffffff821d9a80 t CalculateWatermarksAndDRAMSpeedChangeSupport +ffffffff821daa70 t CalculatePrefetchSchedule +ffffffff821dd000 T dml21_rq_dlg_get_rq_reg +ffffffff821dd490 t dml_rq_dlg_get_rq_params +ffffffff821dd660 T dml21_rq_dlg_get_dlg_reg +ffffffff821df930 t get_surf_rq_param +ffffffff821e0250 t calculate_ttu_cursor +ffffffff821e1000 T optc3_fpu_set_vrr_m_const +ffffffff821e14a0 T dcn30_fpu_populate_dml_writeback_from_context +ffffffff821e17b0 T dcn30_fpu_set_mcif_arb_params +ffffffff821e1920 T dcn30_fpu_update_soc_for_wm_a +ffffffff821e19f0 T dcn30_fpu_calculate_wm_and_dlg +ffffffff821e2480 T dcn30_find_dummy_latency_index_for_fw_based_mclk_switch +ffffffff821e2670 T dcn30_fpu_update_dram_channel_width_bytes +ffffffff821e26d0 T dcn30_fpu_update_max_clk +ffffffff821e2780 T dcn30_fpu_get_optimal_dcfclk_fclk_for_uclk +ffffffff821e2880 T dcn30_fpu_update_bw_bounding_box +ffffffff821e2a60 T dcn3_fpu_build_wm_range_table +ffffffff821e2d40 T patch_dcn30_soc_bounding_box +ffffffff821e3000 T dml30_recalculate +ffffffff821e35f0 t DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation +ffffffff821ea0b0 T dml30_CalculateBytePerPixelAnd256BBlockSizes +ffffffff821ea320 T dml30_CalculateWriteBackDISPCLK +ffffffff821ea490 t dml_max3 +ffffffff821ea4f0 T dml30_ModeSupportAndSystemConfigurationFull +ffffffff821f2040 t CalculateSwathAndDETConfiguration +ffffffff821f2740 t TruncToValidBPP +ffffffff821f29a0 t CalculateVMAndRowBytes +ffffffff821f3010 t CalculatePrefetchSourceLines +ffffffff821f31e0 t CalculateUrgentBurstFactor +ffffffff821f3470 t CalculateDCFCLKDeepSleep +ffffffff821f3790 t UseMinimumDCFCLK +ffffffff821f4ab0 t CalculatePrefetchSchedule +ffffffff821f5f50 t CalculateFlipSchedule +ffffffff821f6450 t CalculateWatermarksAndDRAMSpeedChangeSupport +ffffffff821f7190 t CalculateSwathWidth +ffffffff821f8000 T dml30_rq_dlg_get_rq_reg +ffffffff821f84b0 t dml_rq_dlg_get_rq_params +ffffffff821f8740 T dml30_rq_dlg_get_dlg_reg +ffffffff821fae10 t get_surf_rq_param +ffffffff821fb7a0 t calculate_ttu_cursor +ffffffff821fc000 T dcn301_update_bw_bounding_box +ffffffff821fc2e0 T dcn301_fpu_set_wm_ranges +ffffffff821fc380 T dcn301_fpu_init_soc_bounding_box +ffffffff821fc420 T dcn301_calculate_wm_and_dlg_fp +ffffffff821fc750 t calculate_wm_set_for_vlevel +ffffffff821fd000 T dcn302_fpu_update_bw_bounding_box +ffffffff821fd940 T dcn302_fpu_init_soc_bounding_box +ffffffff821fe000 T dcn303_fpu_update_bw_bounding_box +ffffffff821fe9a0 T dcn303_fpu_init_soc_bounding_box +ffffffff821ff000 T dcn31_zero_pipe_dcc_fraction +ffffffff821ff060 T dcn31_update_soc_for_wm_a +ffffffff821ff110 T dcn315_update_soc_for_wm_a +ffffffff821ff1e0 T dcn31_calculate_wm_and_dlg_fp +ffffffff821ff840 T dcn31_update_bw_bounding_box +ffffffff821ffbe0 T dcn315_update_bw_bounding_box +ffffffff821ffed0 T dcn316_update_bw_bounding_box +ffffffff82200280 T dcn_get_max_non_odm_pix_rate_100hz +ffffffff822002e0 T dcn_get_approx_det_segs_required_for_pstate +ffffffff82201000 T dml31_recalculate +ffffffff822012d0 t DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation +ffffffff82208190 T dml31_CalculateWriteBackDISPCLK +ffffffff82208300 t dml_max3 +ffffffff82208360 T dml31_ModeSupportAndSystemConfigurationFull +ffffffff82210440 t CalculateSwathAndDETConfiguration +ffffffff82210aa0 t TruncToValidBPP +ffffffff82210cf0 t CalculateDCFCLKDeepSleep +ffffffff82211010 t CalculateVMAndRowBytes +ffffffff82211650 t CalculatePrefetchSourceLines +ffffffff82211820 t CalculateUrgentBurstFactor +ffffffff82211ab0 t UseMinimumDCFCLK +ffffffff82212a40 t CalculatePrefetchSchedulePerPlane +ffffffff822131a0 t CalculateFlipSchedule +ffffffff82213730 t CalculateWatermarksAndDRAMSpeedChangeSupport +ffffffff82214350 t CalculateSwathWidth +ffffffff82214860 t CalculatePrefetchSchedule +ffffffff82215c40 t CalculateVupdateAndDynamicMetadataParameters +ffffffff82216000 T dml31_rq_dlg_get_rq_reg +ffffffff822164b0 t dml_rq_dlg_get_rq_params +ffffffff82216740 T dml31_rq_dlg_get_dlg_reg +ffffffff82219100 t get_surf_rq_param +ffffffff8221a000 T dcn314_update_bw_bounding_box_fpu +ffffffff8221a3f0 T dcn314_populate_dml_pipes_from_context_fpu +ffffffff8221b000 T dml314_recalculate +ffffffff8221b270 t DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation +ffffffff82222050 T dml314_CalculateWriteBackDISPCLK +ffffffff822221c0 t dml_max3 +ffffffff82222220 T dml314_ModeSupportAndSystemConfigurationFull +ffffffff8222a5a0 t CalculateBytePerPixelAnd256BBlockSizes +ffffffff8222a810 t CalculateSwathAndDETConfiguration +ffffffff8222ae50 t TruncToValidBPP +ffffffff8222b0a0 t CalculateDCFCLKDeepSleep +ffffffff8222b3c0 t CalculateVMAndRowBytes +ffffffff8222ba00 t CalculatePrefetchSourceLines +ffffffff8222bbd0 t CalculateUrgentBurstFactor +ffffffff8222be60 t CalculateMaxVStartup +ffffffff8222bfa0 t UseMinimumDCFCLK +ffffffff8222cf30 t CalculatePrefetchSchedulePerPlane +ffffffff8222d690 t CalculateFlipSchedule +ffffffff8222dc20 t CalculateWatermarksAndDRAMSpeedChangeSupport +ffffffff8222e840 t CalculateSwathWidth +ffffffff8222ed50 t CalculatePrefetchSchedule +ffffffff82230130 t CalculateVupdateAndDynamicMetadataParameters +ffffffff82231000 T dml314_rq_dlg_get_rq_reg +ffffffff822314b0 t dml_rq_dlg_get_rq_params +ffffffff82231740 T dml314_rq_dlg_get_dlg_reg +ffffffff82234100 t get_surf_rq_param +ffffffff82235000 T dcn32_build_wm_range_table_fpu +ffffffff82235390 T dcn32_find_dummy_latency_index_for_fw_based_mclk_switch +ffffffff82235540 T dcn32_internal_validate_bw +ffffffff822373b0 T dcn32_helper_populate_phantom_dlg_params +ffffffff82237550 T dcn32_predict_pipe_split +ffffffff82237780 T dcn32_set_phantom_stream_timing +ffffffff82237a90 T dcn32_determine_max_vratio_prefetch +ffffffff82237b70 t dcn32_split_stream_for_mpc_or_odm +ffffffff82237f20 T dcn32_calculate_wm_and_dlg_fpu +ffffffff82239650 T dcn32_patch_dpm_table +ffffffff82239860 T dcn32_update_bw_bounding_box_fpu +ffffffff8223bed0 T dcn32_zero_pipe_dcc_fraction +ffffffff8223bf30 T dcn32_allow_subvp_with_active_margin +ffffffff8223c000 T dcn32_allow_subvp_high_refresh_rate +ffffffff8223c200 T dcn32_assign_fpo_vactive_candidate +ffffffff8223c2c0 T dcn32_find_vactive_pipe +ffffffff8223c430 T dcn32_set_clock_limits +ffffffff8223c480 T dcn32_override_min_req_memclk +ffffffff8223c540 t subvp_drr_schedulable +ffffffff8223c7d0 t get_optimal_ntuple +ffffffff8223d000 T dml32_recalculate +ffffffff82241320 T dml32_ModeSupportAndSystemConfigurationFull +ffffffff82249000 T dml32_dscceComputeDelay +ffffffff82249140 T dml32_dscComputeDelay +ffffffff82249180 T IsVertical +ffffffff822491b0 T dml32_CalculateSinglePipeDPPCLKAndSCLThroughput +ffffffff822494d0 t dml_max3 +ffffffff82249530 T dml32_CalculateBytePerPixelAndBlockSizes +ffffffff82249860 T dml32_CalculateSwathAndDETConfiguration +ffffffff8224a090 T dml32_CalculateSwathWidth +ffffffff8224a950 T dml32_UnboundedRequest +ffffffff8224a9c0 T dml32_CalculateDETBufferSize +ffffffff8224b000 T dml32_CalculateODMMode +ffffffff8224b780 T dml32_CalculateRequiredDispclk +ffffffff8224b940 T dml32_RoundToDFSGranularity +ffffffff8224b9d0 T dml32_CalculateOutputLink +ffffffff8224c440 T dml32_TruncToValidBPP +ffffffff8224c770 T dml32_CalculateDPPCLK +ffffffff8224c910 T dml32_RequiredDTBCLK +ffffffff8224cb60 t dml_max4 +ffffffff8224cbe0 T dml32_DSCDelayRequirement +ffffffff8224d0a0 T dml32_CalculateSurfaceSizeInMall +ffffffff8224dbf0 T dml32_CalculateVMRowAndSwath +ffffffff8224ea00 T dml32_CalculateVMAndRowBytes +ffffffff8224f650 T dml32_CalculatePrefetchSourceLines +ffffffff8224f8a0 T dml32_CalculateMALLUseForStaticScreen +ffffffff8224f9e0 T dml32_CalculateRowBandwidth +ffffffff8224fb40 T dml32_CalculateUrgentLatency +ffffffff8224fbf0 T dml32_CalculateUrgentBurstFactor +ffffffff8224fea0 T dml32_CalculateDCFCLKDeepSleep +ffffffff822501f0 T dml32_CalculateWriteBackDelay +ffffffff82250350 T dml32_UseMinimumDCFCLK +ffffffff822513c0 T dml32_CalculateExtraLatencyBytes +ffffffff82251580 T dml32_CalculateTWait +ffffffff82251670 T dml32_CalculateVUpdateAndDynamicMetadataParameters +ffffffff822518d0 T dml32_get_return_bw_mbps +ffffffff82251a90 T dml32_get_return_bw_mbps_vm_only +ffffffff82251b70 T dml32_CalculateExtraLatency +ffffffff82251d90 T dml32_CalculatePrefetchSchedule +ffffffff822533a0 T dml32_CalculateFlipSchedule +ffffffff82253900 T dml32_CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport +ffffffff82254a10 T dml32_CalculateWriteBackDISPCLK +ffffffff82254be0 T dml32_CalculateMinAndMaxPrefetchMode +ffffffff82254c30 T dml32_CalculatePixelDeliveryTimes +ffffffff822550b0 T dml32_CalculateMetaAndPTETimes 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fetch_ip_params +ffffffff8225fbd0 t fetch_pipe_params +ffffffff82260c50 T PixelClockAdjustmentForProgressiveToInterlaceUnit +ffffffff82260cd0 T get_clk_dcf_deepsleep +ffffffff82260de0 T get_wm_urgent +ffffffff82260ef0 T get_wm_memory_trip +ffffffff82261000 T get_wm_writeback_urgent +ffffffff82261110 T get_wm_stutter_exit +ffffffff82261220 T get_wm_stutter_enter_exit +ffffffff82261330 T get_wm_z8_stutter_exit +ffffffff82261440 T get_wm_z8_stutter_enter_exit +ffffffff82261550 T get_stutter_efficiency_z8 +ffffffff82261660 T get_stutter_num_bursts_z8 +ffffffff82261770 T get_wm_dram_clock_change +ffffffff82261880 T get_wm_writeback_dram_clock_change +ffffffff82261990 T get_stutter_efficiency +ffffffff82261aa0 T get_stutter_efficiency_no_vblank +ffffffff82261bb0 T get_stutter_period +ffffffff82261cc0 T get_urgent_latency +ffffffff82261dd0 T get_urgent_extra_latency +ffffffff82261ee0 T get_nonurgent_latency +ffffffff82261ff0 T get_dram_clock_change_latency +ffffffff82262100 T get_dispclk_calculated +ffffffff82262210 T get_total_data_read_bw +ffffffff82262320 T get_return_bw +ffffffff82262430 T get_tcalc +ffffffff82262540 T get_fraction_of_urgent_bandwidth +ffffffff82262650 T get_fraction_of_urgent_bandwidth_imm_flip +ffffffff82262760 T get_cstate_max_cap_mode +ffffffff82262880 T get_comp_buffer_size_kbytes +ffffffff82262990 T get_pixel_chunk_size_in_kbyte +ffffffff82262ab0 T get_alpha_pixel_chunk_size_in_kbyte +ffffffff82262bd0 T get_meta_chunk_size_in_kbyte +ffffffff82262cf0 T get_min_pixel_chunk_size_in_byte +ffffffff82262e00 T get_min_meta_chunk_size_in_byte +ffffffff82262f20 T get_fclk_watermark +ffffffff82263030 T get_usr_retraining_watermark +ffffffff82263140 T get_comp_buffer_reserved_space_kbytes +ffffffff82263260 T get_comp_buffer_reserved_space_64bytes +ffffffff82263380 T get_comp_buffer_reserved_space_zs +ffffffff822634a0 T get_unbounded_request_enabled +ffffffff822635c0 T get_dsc_delay +ffffffff822636f0 T get_dppclk_calculated +ffffffff82263810 T get_dscclk_calculated +ffffffff82263930 T get_min_ttu_vblank +ffffffff82263a50 T get_min_ttu_vblank_in_us +ffffffff82263b70 T get_vratio_prefetch_l +ffffffff82263c90 T get_vratio_prefetch_c +ffffffff82263db0 T get_dst_x_after_scaler +ffffffff82263ed0 T get_dst_y_after_scaler +ffffffff82263ff0 T get_dst_y_per_vm_vblank +ffffffff82264110 T get_dst_y_per_row_vblank +ffffffff82264230 T get_dst_y_prefetch +ffffffff82264350 T get_dst_y_per_vm_flip +ffffffff82264470 T get_dst_y_per_row_flip +ffffffff82264590 T get_refcyc_per_vm_group_vblank +ffffffff822646b0 T get_refcyc_per_vm_group_flip +ffffffff822647d0 T get_refcyc_per_vm_req_vblank +ffffffff822648f0 T get_refcyc_per_vm_req_flip +ffffffff82264a10 T get_refcyc_per_vm_group_vblank_in_us +ffffffff82264b30 T get_refcyc_per_vm_group_flip_in_us +ffffffff82264c50 T get_refcyc_per_vm_req_vblank_in_us +ffffffff82264d70 T get_refcyc_per_vm_req_flip_in_us +ffffffff82264e90 T get_refcyc_per_vm_dmdata_in_us +ffffffff82264fb0 T get_dmdata_dl_delta_in_us +ffffffff822650d0 T get_refcyc_per_line_delivery_l_in_us +ffffffff822651f0 T get_refcyc_per_line_delivery_c_in_us +ffffffff82265310 T get_refcyc_per_line_delivery_pre_l_in_us +ffffffff82265430 T get_refcyc_per_line_delivery_pre_c_in_us +ffffffff82265550 T get_refcyc_per_req_delivery_l_in_us +ffffffff82265670 T get_refcyc_per_req_delivery_c_in_us +ffffffff82265790 T get_refcyc_per_req_delivery_pre_l_in_us +ffffffff822658b0 T get_refcyc_per_req_delivery_pre_c_in_us +ffffffff822659d0 T get_refcyc_per_cursor_req_delivery_in_us +ffffffff82265af0 T get_refcyc_per_cursor_req_delivery_pre_in_us +ffffffff82265c10 T get_refcyc_per_meta_chunk_nom_l_in_us +ffffffff82265d30 T get_refcyc_per_meta_chunk_nom_c_in_us +ffffffff82265e50 T get_refcyc_per_meta_chunk_vblank_l_in_us +ffffffff82265f70 T get_refcyc_per_meta_chunk_vblank_c_in_us +ffffffff82266090 T get_refcyc_per_meta_chunk_flip_l_in_us +ffffffff822661b0 T get_refcyc_per_meta_chunk_flip_c_in_us +ffffffff822662d0 T get_vstartup +ffffffff82266400 T get_vupdate_offset +ffffffff82266530 T get_vupdate_width +ffffffff82266650 T get_vready_offset +ffffffff82266770 T get_vready_at_or_after_vsync +ffffffff822668a0 T get_min_dst_y_next_start +ffffffff822669d0 T get_dst_y_per_pte_row_nom_l +ffffffff82266af0 T get_dst_y_per_pte_row_nom_c +ffffffff82266c10 T get_dst_y_per_meta_row_nom_l +ffffffff82266d30 T get_dst_y_per_meta_row_nom_c +ffffffff82266e50 T get_refcyc_per_pte_group_nom_l_in_us +ffffffff82266f70 T get_refcyc_per_pte_group_nom_c_in_us +ffffffff82267090 T get_refcyc_per_pte_group_vblank_l_in_us +ffffffff822671b0 T get_refcyc_per_pte_group_vblank_c_in_us +ffffffff822672d0 T get_refcyc_per_pte_group_flip_l_in_us +ffffffff822673f0 T get_refcyc_per_pte_group_flip_c_in_us +ffffffff82267510 T get_vstartup_calculated +ffffffff82267640 T get_dpte_row_height_linear_c +ffffffff82267770 T get_swath_height_l +ffffffff822678a0 T get_swath_height_c +ffffffff822679d0 T get_det_stored_buffer_size_l_bytes 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print__data_rq_misc_params_st +ffffffff8226a0c0 T print__rq_dlg_params_st +ffffffff8226a0f0 T print__dlg_sys_params_st +ffffffff8226a120 T print__data_rq_regs_st +ffffffff8226a150 T print__rq_regs_st +ffffffff8226a180 T print__dlg_regs_st +ffffffff8226a1b0 T print__ttu_regs_st +ffffffff8226b000 T dml1_extract_rq_regs +ffffffff8226b330 T dml1_rq_dlg_get_rq_params +ffffffff8226b510 t get_surf_rq_param +ffffffff8226c0c0 T dml1_rq_dlg_get_dlg_params +ffffffff8226f000 T _do_calc_rc_params +ffffffff8226ffc0 t get_qp_set +ffffffff82271000 T dc_bandwidth_in_kbps_from_timing +ffffffff82271290 T dc_dsc_stream_bandwidth_in_kbps +ffffffff822713e0 T dc_dsc_parse_dsc_dpcd +ffffffff82271680 t dsc_throughput_from_dpcd +ffffffff82271840 T dc_dsc_compute_bandwidth_range +ffffffff82271a30 t intersect_dsc_caps +ffffffff82271c00 t setup_dsc_config +ffffffff822723d0 T dc_dsc_compute_config +ffffffff822724c0 T dc_dsc_stream_bandwidth_overhead_in_kbps +ffffffff82272600 T dc_dsc_get_policy_for_timing +ffffffff822726a0 T dc_dsc_policy_set_max_target_bpp_limit +ffffffff822726d0 T dc_dsc_policy_set_enable_dsc_when_not_needed +ffffffff82272700 T dc_dsc_policy_set_disable_dsc_stream_overhead +ffffffff82272730 T dc_set_disable_128b_132b_stream_overhead +ffffffff82272760 T dc_dsc_get_default_config_option +ffffffff822727b0 t fit_num_slices_up +ffffffff82272860 t decide_dsc_target_bpp_x16 +ffffffff82273000 T calc_rc_params +ffffffff82274000 T dscc_compute_dsc_parameters +ffffffff82275000 T dal_hw_factory_dce110_init +ffffffff82275060 t define_hpd_registers +ffffffff822750b0 t define_ddc_registers +ffffffff82276000 T dal_hw_translate_dce110_init +ffffffff82276030 t offset_to_id +ffffffff82276390 t id_to_offset +ffffffff82277000 T dal_hw_factory_dce120_init +ffffffff82277060 t define_hpd_registers +ffffffff822770b0 t define_ddc_registers +ffffffff82278000 T dal_hw_translate_dce120_init +ffffffff82278030 t offset_to_id +ffffffff822783a0 t id_to_offset +ffffffff82279000 T dal_hw_factory_dce80_init +ffffffff82279060 t define_hpd_registers +ffffffff822790b0 t define_ddc_registers +ffffffff8227a000 T dal_hw_translate_dce80_init +ffffffff8227a030 t offset_to_id +ffffffff8227a7b0 t id_to_offset +ffffffff8227b000 T dal_hw_factory_dcn10_init +ffffffff8227b060 t define_hpd_registers +ffffffff8227b0b0 t define_ddc_registers +ffffffff8227b150 t define_generic_registers +ffffffff8227c000 T dal_hw_translate_dcn10_init +ffffffff8227c030 t offset_to_id +ffffffff8227c390 t id_to_offset +ffffffff8227d000 T dal_hw_factory_dcn20_init +ffffffff8227d060 t define_hpd_registers +ffffffff8227d0b0 t define_ddc_registers +ffffffff8227d160 t define_generic_registers +ffffffff8227e000 T dal_hw_translate_dcn20_init +ffffffff8227e030 t offset_to_id +ffffffff8227e2b0 t id_to_offset +ffffffff8227f000 T dal_hw_factory_dcn21_init +ffffffff8227f060 t define_hpd_registers +ffffffff8227f0b0 t define_ddc_registers +ffffffff8227f160 t define_generic_registers +ffffffff82280000 T dal_hw_translate_dcn21_init +ffffffff82280030 t offset_to_id +ffffffff822802b0 t id_to_offset +ffffffff82281000 T dal_hw_factory_dcn30_init +ffffffff82281060 t define_hpd_registers +ffffffff822810b0 t define_ddc_registers +ffffffff82281160 t define_generic_registers +ffffffff82282000 T dal_hw_translate_dcn30_init +ffffffff82282030 t offset_to_id +ffffffff822822c0 t id_to_offset +ffffffff82283000 T dal_hw_factory_dcn315_init +ffffffff82283060 t define_hpd_registers +ffffffff822830b0 t define_ddc_registers +ffffffff82283160 t define_generic_registers +ffffffff82284000 T dal_hw_translate_dcn315_init +ffffffff82284030 t offset_to_id +ffffffff822842b0 t id_to_offset +ffffffff82285000 T dal_hw_factory_dcn32_init +ffffffff82285060 t define_hpd_registers +ffffffff822850b0 t define_ddc_registers +ffffffff82285160 t define_generic_registers +ffffffff82286000 T dal_hw_translate_dcn32_init +ffffffff82286030 t offset_to_id +ffffffff82286290 t id_to_offset +ffffffff82287000 T dal_gpio_open +ffffffff822870c0 T dal_gpio_open_ex +ffffffff82287180 T dal_gpio_get_value +ffffffff82287200 T dal_gpio_set_value +ffffffff82287280 T dal_gpio_get_mode +ffffffff822872b0 T dal_gpio_lock_pin +ffffffff822872d0 T dal_gpio_unlock_pin +ffffffff822872f0 T dal_gpio_change_mode +ffffffff82287370 T dal_gpio_get_id +ffffffff822873a0 T dal_gpio_get_enum +ffffffff822873d0 T dal_gpio_set_config +ffffffff82287450 T dal_gpio_get_pin_info +ffffffff822874b0 T dal_gpio_get_sync_source +ffffffff82287540 T dal_gpio_get_output_state +ffffffff82287570 T dal_gpio_get_ddc +ffffffff822875a0 T dal_gpio_get_hpd +ffffffff822875d0 T dal_gpio_get_generic +ffffffff82287600 T dal_gpio_close +ffffffff82287650 T dal_gpio_create +ffffffff822877e0 T dal_gpio_destroy +ffffffff82288000 T dal_gpio_service_create +ffffffff82288240 T dal_gpio_service_create_irq +ffffffff82288300 T dal_gpio_create_irq +ffffffff82288380 T dal_gpio_service_create_generic_mux +ffffffff82288420 T dal_gpio_destroy_generic_mux +ffffffff822884b0 T dal_gpio_get_generic_pin_info +ffffffff82288510 T dal_gpio_service_destroy +ffffffff82288640 T dal_mux_setup_config +ffffffff822886a0 T dal_gpio_service_lock +ffffffff82288720 T dal_gpio_service_unlock +ffffffff822887a0 T dal_gpio_service_open +ffffffff822889e0 T dal_gpio_service_close +ffffffff82288a80 T dal_irq_get_source +ffffffff82288af0 T dal_irq_get_rx_source +ffffffff82288b40 T dal_irq_setup_hpd_filter +ffffffff82288ba0 T dal_gpio_destroy_irq +ffffffff82288c30 T dal_gpio_create_ddc +ffffffff82288da0 T dal_gpio_destroy_ddc +ffffffff82288e70 T dal_ddc_close +ffffffff82288ec0 T dal_ddc_open +ffffffff82289020 T dal_ddc_change_mode +ffffffff822890c0 T dal_ddc_get_line +ffffffff822890e0 T dal_ddc_set_config +ffffffff8228a000 T dal_hw_ddc_init +ffffffff8228a100 T dal_hw_ddc_get_pin +ffffffff8228a110 t dal_hw_ddc_destroy +ffffffff8228a170 t set_config +ffffffff8228b000 T dal_hw_factory_init +ffffffff8228c000 T dal_hw_generic_init +ffffffff8228c100 T dal_hw_generic_get_pin +ffffffff8228c110 t dal_hw_generic_destroy +ffffffff8228c170 t set_config +ffffffff8228d000 T dal_hw_gpio_open +ffffffff8228d0b0 T dal_hw_gpio_config_mode +ffffffff8228d1a0 T dal_hw_gpio_get_value +ffffffff8228d200 T dal_hw_gpio_set_value +ffffffff8228d290 T dal_hw_gpio_change_mode +ffffffff8228d2a0 T dal_hw_gpio_close +ffffffff8228d350 T dal_hw_gpio_construct +ffffffff8228d3b0 T dal_hw_gpio_destruct +ffffffff8228e000 T dal_hw_hpd_init +ffffffff8228e100 T dal_hw_hpd_get_pin +ffffffff8228e110 t dal_hw_hpd_destroy +ffffffff8228e170 t get_value +ffffffff8228e210 t set_config +ffffffff8228f000 T dal_hw_translate_init +ffffffff82290000 T dc_process_hdcp_msg +ffffffff82290180 t hdmi_14_process_transaction +ffffffff822902d0 t dp_11_process_transaction +ffffffff82291000 T dal_irq_service_dummy_set +ffffffff82291050 T dal_irq_service_dummy_ack +ffffffff822910a0 T dce110_vblank_set +ffffffff82291170 T to_dal_irq_source_dce110 +ffffffff822912f0 T dal_irq_service_dce110_create +ffffffff82291370 t hpd_ack +ffffffff82292000 T dal_irq_service_dce120_create +ffffffff82292080 t hpd_ack +ffffffff82293000 T dal_irq_service_dce80_create +ffffffff82293080 t hpd_ack +ffffffff82294000 T dal_irq_service_dcn10_create +ffffffff82294080 t hpd_ack +ffffffff82294130 t to_dal_irq_source_dcn10 +ffffffff82295000 T dal_irq_service_dcn20_create +ffffffff82295080 t hpd_ack +ffffffff82295130 t to_dal_irq_source_dcn20 +ffffffff82296000 T dal_irq_service_dcn201_create +ffffffff82296080 t hpd_ack +ffffffff82296130 t to_dal_irq_source_dcn201 +ffffffff82297000 T dal_irq_service_dcn21_create +ffffffff82297080 t hpd_ack +ffffffff82297130 t to_dal_irq_source_dcn21 +ffffffff82298000 T dal_irq_service_dcn30_create +ffffffff82298080 t hpd_ack +ffffffff82298130 t to_dal_irq_source_dcn30 +ffffffff82299000 T dal_irq_service_dcn302_create +ffffffff82299080 t hpd_ack +ffffffff82299130 t to_dal_irq_source_dcn302 +ffffffff8229a000 T dal_irq_service_dcn303_create +ffffffff8229a080 t hpd_ack +ffffffff8229a130 t to_dal_irq_source_dcn303 +ffffffff8229b000 T dal_irq_service_dcn31_create +ffffffff8229b080 t hpd_ack +ffffffff8229b130 t to_dal_irq_source_dcn31 +ffffffff8229c000 T dal_irq_service_dcn314_create +ffffffff8229c080 t hpd_ack +ffffffff8229c130 t to_dal_irq_source_dcn314 +ffffffff8229d000 T dal_irq_service_dcn315_create +ffffffff8229d080 t hpd_ack +ffffffff8229d130 t to_dal_irq_source_dcn315 +ffffffff8229e000 T dal_irq_service_dcn32_create +ffffffff8229e080 t hpd_ack +ffffffff8229e130 t to_dal_irq_source_dcn32 +ffffffff8229f000 T dal_irq_service_construct +ffffffff8229f070 T dal_irq_service_destroy +ffffffff8229f100 T dal_irq_service_set_generic +ffffffff8229f180 T dal_irq_service_set +ffffffff8229f330 T dal_irq_service_ack +ffffffff8229f4a0 T dal_irq_service_ack_generic +ffffffff8229f510 T dal_irq_service_to_irq_source +ffffffff822a0000 T dp_handle_automated_test +ffffffff822a0820 T dp_set_test_pattern +ffffffff822a0f00 t set_crtc_test_pattern +ffffffff822a1370 T dp_set_preferred_link_settings +ffffffff822a14c0 t dp_retrain_link_dp_test +ffffffff822a15c0 T dp_set_preferred_training_settings +ffffffff822a2000 T dp_trace_init +ffffffff822a20a0 T dp_trace_reset +ffffffff822a2130 T dp_trace_is_initialized +ffffffff822a2160 T dp_trace_detect_lt_init +ffffffff822a21b0 T dp_trace_commit_lt_init +ffffffff822a2200 T dp_trace_link_loss_increment +ffffffff822a2230 T dp_trace_lt_fail_count_update +ffffffff822a2270 T dp_trace_lt_total_count_increment +ffffffff822a22b0 T dp_trace_set_is_logged_flag +ffffffff822a22f0 T dp_trace_is_logged +ffffffff822a2330 T dp_trace_lt_result_update +ffffffff822a2370 T dp_trace_set_lt_start_timestamp +ffffffff822a2450 T dp_trace_set_lt_end_timestamp +ffffffff822a2530 T dp_trace_get_lt_end_timestamp +ffffffff822a2570 T dp_trace_get_lt_counts +ffffffff822a25b0 T dp_trace_get_link_loss_count +ffffffff822a25e0 T dp_trace_set_edp_power_timestamp +ffffffff822a26c0 T dp_trace_get_edp_poweron_timestamp +ffffffff822a26f0 T dp_trace_get_edp_poweroff_timestamp +ffffffff822a2720 T dp_trace_source_sequence +ffffffff822a3000 T dp_fpga_hpo_enable_link_and_stream +ffffffff822a4000 T set_dio_throttled_vcp_size +ffffffff822a4020 T setup_dio_stream_encoder +ffffffff822a4110 T reset_dio_stream_encoder +ffffffff822a41e0 T setup_dio_stream_attribute +ffffffff822a4380 T enable_dio_dp_link_output +ffffffff822a4410 T disable_dio_link_output +ffffffff822a4470 T set_dio_dp_link_test_pattern +ffffffff822a44d0 T set_dio_dp_lane_settings +ffffffff822a4510 T update_dio_stream_allocation_table +ffffffff822a4580 T setup_dio_audio_output +ffffffff822a45f0 T enable_dio_audio_packet +ffffffff822a46b0 T disable_dio_audio_packet +ffffffff822a4790 T can_use_dio_link_hwss +ffffffff822a47d0 T get_dio_link_hwss +ffffffff822a5000 T dp_dio_fixed_vs_pe_retimer_lane_cfg_to_hw_cfg +ffffffff822a5040 T dp_dio_fixed_vs_pe_retimer_exit_manual_automation +ffffffff822a5280 T enable_dio_fixed_vs_pe_retimer_program_4lane_output +ffffffff822a53b0 T requires_fixed_vs_pe_retimer_dio_link_hwss +ffffffff822a53f0 T get_dio_fixed_vs_pe_retimer_link_hwss +ffffffff822a5420 t enable_dio_fixed_vs_pe_retimer_dp_link_output +ffffffff822a5590 t set_dio_fixed_vs_pe_retimer_dp_link_test_pattern +ffffffff822a6000 T can_use_dpia_link_hwss +ffffffff822a6050 T get_dpia_link_hwss +ffffffff822a6080 t update_dpia_stream_allocation_table +ffffffff822a7000 T set_hpo_dp_throttled_vcp_size +ffffffff822a7030 T set_hpo_dp_hblank_min_symbol_width +ffffffff822a7120 T setup_hpo_dp_stream_encoder +ffffffff822a7170 T reset_hpo_dp_stream_encoder +ffffffff822a7190 T setup_hpo_dp_stream_attribute +ffffffff822a7210 T enable_hpo_dp_link_output +ffffffff822a7290 T disable_hpo_dp_link_output +ffffffff822a7330 T update_hpo_dp_stream_allocation_table +ffffffff822a7350 T setup_hpo_dp_audio_output +ffffffff822a7390 T enable_hpo_dp_audio_packet +ffffffff822a73b0 T disable_hpo_dp_audio_packet +ffffffff822a7400 T can_use_hpo_dp_link_hwss +ffffffff822a7430 T get_hpo_dp_link_hwss +ffffffff822a7460 t set_hpo_dp_link_test_pattern +ffffffff822a74b0 t set_hpo_dp_lane_settings +ffffffff822a8000 T requires_fixed_vs_pe_retimer_hpo_link_hwss +ffffffff822a8040 T get_hpo_fixed_vs_pe_retimer_dp_link_hwss +ffffffff822a8070 t enable_hpo_fixed_vs_pe_retimer_dp_link_output +ffffffff822a80d0 t set_hpo_fixed_vs_pe_retimer_dp_link_test_pattern +ffffffff822a8450 t set_hpo_fixed_vs_pe_retimer_dp_lane_settings +ffffffff822a84d0 t dp_hpo_fixed_vs_pe_retimer_set_tx_ffe +ffffffff822a9000 T link_reset_cur_dp_mst_topology +ffffffff822a9060 T link_detect_connection_type +ffffffff822a9180 T link_detect +ffffffff822aaa40 T link_clear_dprx_states +ffffffff822aaa70 T link_is_hdcp14 +ffffffff822aaad0 T link_is_hdcp22 +ffffffff822aab40 T link_get_status +ffffffff822aab70 T link_add_remote_sink +ffffffff822aad10 T link_remove_remote_sink +ffffffff822aadf0 t wait_for_entering_dp_alt_mode +ffffffff822ab000 T link_blank_all_dp_displays +ffffffff822ab0d0 T link_blank_dp_stream +ffffffff822ab1e0 T link_blank_all_edp_displays +ffffffff822ab2a0 T link_set_all_streams_dpms_off_for_link +ffffffff822ab3a0 T link_get_master_pipes_with_dpms_on +ffffffff822ab560 T link_resume +ffffffff822ab5a0 T link_set_dsc_on_stream +ffffffff822aba40 T link_set_dsc_pps_packet +ffffffff822abdd0 T link_set_dsc_enable +ffffffff822abe70 T link_update_dsc_config +ffffffff822abee0 T link_calculate_sst_avg_time_slots_per_mtp +ffffffff822abf50 T link_reduce_mst_payload +ffffffff822ac370 t update_mst_stream_alloc_table +ffffffff822ac5f0 T link_increase_mst_payload +ffffffff822aca00 T link_set_dpms_off +ffffffff822ad5b0 t update_psp_stream_config +ffffffff822ad7b0 t update_sst_payload +ffffffff822addf0 t get_ext_hdmi_settings +ffffffff822ae040 t write_i2c_retimer_setting +ffffffff822ae690 t write_i2c_default_retimer_setting +ffffffff822aeb80 t write_i2c_redriver_setting +ffffffff822aeca0 t disable_link +ffffffff822aee10 T link_set_dpms_on +ffffffff822af840 t enable_stream_features +ffffffff822af900 t allocate_mst_payload +ffffffff822afd60 t log_vcp_x_y +ffffffff822afee0 t write_i2c +ffffffff822aff70 t enable_link_dp +ffffffff822b1000 T link_create_link_service +ffffffff822b1470 T link_destroy_link_service +ffffffff822b14c0 T link_create +ffffffff822b2470 T link_destroy +ffffffff822b3000 T link_get_cur_link_res +ffffffff822b3150 T link_get_cur_res_map +ffffffff822b3230 T link_restore_res_map +ffffffff822b4000 T dp_link_bandwidth_kbps +ffffffff822b40a0 T link_validate_mode_timing +ffffffff822b4680 t get_tmds_output_pixel_clock_100hz +ffffffff822b46f0 T link_validate_dpia_bandwidth +ffffffff822b5000 T link_create_ddc_service +ffffffff822b5170 T link_destroy_ddc_service +ffffffff822b5200 T set_ddc_transaction_type +ffffffff822b5230 T link_is_in_aux_transaction_mode +ffffffff822b5270 T set_dongle_type +ffffffff822b52a0 T link_get_aux_defer_delay +ffffffff822b53d0 T link_query_ddc_data +ffffffff822b5780 T link_aux_transfer_raw +ffffffff822b57b0 T link_get_fixed_vs_pe_retimer_write_address +ffffffff822b5840 T link_get_fixed_vs_pe_retimer_read_address +ffffffff822b58d0 T link_configure_fixed_vs_pe_retimer +ffffffff822b59a0 T link_aux_transfer_with_retries_no_mutex +ffffffff822b59b0 T link_query_fixed_vs_pe_retimer +ffffffff822b5a80 T try_to_configure_aux_timeout +ffffffff822b5b60 T get_ddc_pin +ffffffff822b5b90 T write_scdc_data +ffffffff822b5c80 T read_scdc_data +ffffffff822b6000 T is_dp_active_dongle +ffffffff822b6040 T is_dp_branch_device +ffffffff822b6070 T dp_parse_lttpr_repeater_count +ffffffff822b60f0 T link_bw_kbps_from_raw_frl_link_rate_data +ffffffff822b6130 T dp_is_fec_supported +ffffffff822b61e0 T dp_should_enable_fec +ffffffff822b62f0 T dp_is_128b_132b_signal +ffffffff822b63c0 T dp_is_lttpr_present +ffffffff822b6430 T decide_fallback_link_setting +ffffffff822b6700 T link_dp_get_encoding_format +ffffffff822b6750 t reduce_link_rate +ffffffff822b6810 T edp_decide_link_settings +ffffffff822b6940 T decide_edp_link_settings_with_dsc +ffffffff822b6d00 T link_decide_link_settings +ffffffff822b7130 T mst_decide_link_encoding_format +ffffffff822b71b0 T dp_overwrite_extended_receiver_cap +ffffffff822b72c0 t get_active_converter_info +ffffffff822b76f0 T dpcd_set_source_specific_data +ffffffff822b7830 T dpcd_write_cable_id_to_dprx +ffffffff822b78a0 T read_is_mst_supported +ffffffff822b7950 T dp_retrieve_lttpr_cap +ffffffff822b7b60 T detect_dp_sink_caps +ffffffff822b7b70 t retrieve_link_cap +ffffffff822b8c80 T detect_edp_sink_caps +ffffffff822b8fa0 T dp_get_max_link_enc_cap +ffffffff822b9090 T dp_get_verified_link_cap +ffffffff822b90e0 T dp_get_max_link_cap +ffffffff822b92d0 T dp_verify_link_cap_with_retries +ffffffff822b97a0 T dp_is_sink_present +ffffffff822b9a20 t intersect_frl_link_bw_support +ffffffff822ba000 T dpcd_get_tunneling_device_data +ffffffff822ba0d0 T dpia_query_hpd_status +ffffffff822bb000 T link_dp_dpia_set_dptx_usb4_bw_alloc_support +ffffffff822bb1b0 T dpia_handle_bw_alloc_response +ffffffff822bb4c0 T dpia_handle_usb4_bandwidth_allocation_for_link +ffffffff822bb690 T link_dp_dpia_allocate_usb4_bandwidth_for_stream +ffffffff822bb810 T dpia_validate_usb4_bw +ffffffff822bb940 t get_lowest_dpia_index +ffffffff822bc000 T dp_parse_link_loss_status +ffffffff822bc130 T dp_handle_link_loss +ffffffff822bc240 T dp_read_hpd_rx_irq_data +ffffffff822bc370 T dp_should_allow_hpd_rx_irq +ffffffff822bc3c0 T dp_handle_hpd_rx_irq +ffffffff822bd000 T dpcd_write_rx_power_ctrl +ffffffff822bd050 T dp_enable_link_phy +ffffffff822bd0e0 T dp_disable_link_phy +ffffffff822bd1b0 T dp_set_hw_lane_settings +ffffffff822bd2a0 T dp_set_drive_settings +ffffffff822bd390 T dp_set_fec_ready +ffffffff822bd510 T dp_set_fec_enable +ffffffff822be000 T dp_log_training_result +ffffffff822be190 T dp_initialize_scrambling_data_symbols +ffffffff822be230 T dp_training_pattern_to_dpcd_training_pattern +ffffffff822be2b0 T dp_get_nibble_at_index +ffffffff822be300 T dp_wait_for_training_aux_rd_interval +ffffffff822be320 T dp_hw_to_dpcd_lane_settings +ffffffff822be400 T get_dpcd_link_rate +ffffffff822be470 T dp_translate_training_aux_read_interval +ffffffff822be4b0 T dp_get_cr_failure +ffffffff822be520 T is_repeater +ffffffff822be560 T dp_is_max_vs_reached +ffffffff822be5f0 T dp_is_cr_done +ffffffff822be6c0 T dp_is_ch_eq_done +ffffffff822be770 T dp_is_symbol_locked +ffffffff822be820 T dp_is_interlane_aligned +ffffffff822be850 T dp_check_link_loss_status +ffffffff822be8f0 T dp_get_lane_status_and_lane_adjust +ffffffff822bea40 T dp_get_lttpr_mode_override +ffffffff822beb00 T override_training_settings +ffffffff822bedc0 T decide_cr_training_pattern +ffffffff822bee00 T decide_eq_training_pattern +ffffffff822beee0 T dp_decide_lttpr_mode +ffffffff822bef80 T dp_decide_lane_settings +ffffffff822bf300 T dp_decide_training_settings +ffffffff822bf390 T configure_lttpr_mode_transparent +ffffffff822bf3e0 T dpcd_configure_lttpr_mode +ffffffff822bf5a0 T repeater_training_done +ffffffff822bf5f0 T dpcd_configure_channel_coding +ffffffff822bf650 T dpcd_set_training_pattern +ffffffff822bf700 T dpcd_set_link_settings +ffffffff822bf860 T dpcd_set_lane_settings +ffffffff822bf8a0 T dpcd_set_lt_pattern_and_lane_settings +ffffffff822bfa90 T start_clock_recovery_pattern_early +ffffffff822bfb70 T dp_set_hw_training_pattern +ffffffff822bfc30 T dp_set_hw_test_pattern +ffffffff822bfcd0 T dp_perform_link_training +ffffffff822c0550 T perform_link_training_with_retries +ffffffff822c1000 T dp_perform_128b_132b_link_training +ffffffff822c13e0 T decide_128b_132b_training_settings +ffffffff822c14e0 T dp_decide_128b_132b_lttpr_mode +ffffffff822c2000 T decide_8b_10b_training_settings +ffffffff822c2220 T dp_decide_8b_10b_lttpr_mode +ffffffff822c22f0 T perform_8b_10b_clock_recovery_sequence +ffffffff822c2620 T perform_8b_10b_channel_equalization_sequence +ffffffff822c28d0 T dp_perform_8b_10b_link_training +ffffffff822c3000 T dp_perform_link_training_skip_aux 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+ffffffff822f8d70 T amdgpu_dpm_get_current_power_state +ffffffff822f8de0 T amdgpu_dpm_set_power_state +ffffffff822f8f40 T amdgpu_dpm_dispatch_task +ffffffff822f8fe0 T amdgpu_dpm_get_performance_level +ffffffff822f9070 T amdgpu_dpm_force_performance_level +ffffffff822f9250 T amdgpu_dpm_get_pp_num_states +ffffffff822f92e0 T amdgpu_dpm_get_pp_table +ffffffff822f9370 T amdgpu_dpm_set_fine_grain_clk_vol +ffffffff822f9410 T amdgpu_dpm_odn_edit_dpm_table +ffffffff822f94b0 T amdgpu_dpm_print_clock_levels +ffffffff822f9540 T amdgpu_dpm_emit_clock_levels +ffffffff822f95e0 T amdgpu_dpm_set_ppfeature_status +ffffffff822f9670 T amdgpu_dpm_get_ppfeature_status +ffffffff822f9700 T amdgpu_dpm_force_clock_level +ffffffff822f9790 T amdgpu_dpm_get_sclk_od +ffffffff822f9810 T amdgpu_dpm_set_sclk_od +ffffffff822f9990 T amdgpu_dpm_get_mclk_od +ffffffff822f9a10 T amdgpu_dpm_set_mclk_od +ffffffff822f9b90 T amdgpu_dpm_get_power_profile_mode +ffffffff822f9c20 T amdgpu_dpm_set_power_profile_mode +ffffffff822f9cc0 T amdgpu_dpm_get_gpu_metrics +ffffffff822f9d50 T amdgpu_dpm_get_fan_control_mode +ffffffff822f9de0 T amdgpu_dpm_set_fan_speed_pwm +ffffffff822f9e70 T amdgpu_dpm_get_fan_speed_pwm +ffffffff822f9f00 T amdgpu_dpm_get_fan_speed_rpm +ffffffff822f9f90 T amdgpu_dpm_set_fan_speed_rpm +ffffffff822fa020 T amdgpu_dpm_set_fan_control_mode +ffffffff822fa0b0 T amdgpu_dpm_get_power_limit +ffffffff822fa160 T amdgpu_dpm_set_power_limit +ffffffff822fa1f0 T amdgpu_dpm_is_cclk_dpm_supported +ffffffff822fa260 T amdgpu_dpm_debugfs_print_current_performance_level +ffffffff822fa2f0 T amdgpu_dpm_get_smu_prv_buf_details +ffffffff822fa390 T amdgpu_dpm_is_overdrive_supported +ffffffff822fa400 T amdgpu_dpm_set_pp_table +ffffffff822fa4a0 T amdgpu_dpm_get_num_cpu_cores +ffffffff822fa4f0 T amdgpu_dpm_stb_debug_fs_init +ffffffff822fa540 T amdgpu_dpm_display_configuration_change +ffffffff822fa5d0 T amdgpu_dpm_get_clock_by_type +ffffffff822fa670 T amdgpu_dpm_get_display_mode_validation_clks +ffffffff822fa700 T amdgpu_dpm_get_clock_by_type_with_latency +ffffffff822fa7a0 T amdgpu_dpm_get_clock_by_type_with_voltage +ffffffff822fa840 T amdgpu_dpm_set_watermarks_for_clocks_ranges +ffffffff822fa8d0 T amdgpu_dpm_display_clock_voltage_request +ffffffff822fa960 T amdgpu_dpm_get_current_clocks +ffffffff822fa9f0 T amdgpu_dpm_notify_smu_enable_pwe +ffffffff822faa70 T amdgpu_dpm_set_active_display_count +ffffffff822fab00 T amdgpu_dpm_set_min_deep_sleep_dcefclk +ffffffff822fab90 T amdgpu_dpm_set_hard_min_dcefclk_by_freq +ffffffff822fac30 T amdgpu_dpm_set_hard_min_fclk_by_freq +ffffffff822facd0 T amdgpu_dpm_display_disable_memory_clock_switch +ffffffff822fad60 T amdgpu_dpm_get_max_sustainable_clocks_by_dc +ffffffff822fadf0 T amdgpu_dpm_get_uclk_dpm_states +ffffffff822fae90 T amdgpu_dpm_get_dpm_clock_table +ffffffff822fb000 T amdgpu_dpm_get_active_displays +ffffffff822fb0a0 T amdgpu_dpm_get_vblank_time +ffffffff822fb150 T amdgpu_dpm_get_vrefresh +ffffffff822fc000 T amdgpu_pm_sysfs_init +ffffffff822fc030 T amdgpu_pm_sysfs_fini +ffffffff822fc060 T amdgpu_debugfs_pm_init +ffffffff822fd000 T amdgpu_dpm_print_class_info +ffffffff822fd2b0 T amdgpu_dpm_print_cap_info +ffffffff822fd340 T amdgpu_dpm_print_ps_status +ffffffff822fd3d0 T amdgpu_pm_print_power_states +ffffffff822fd460 T amdgpu_get_platform_caps +ffffffff822fd500 T amdgpu_parse_extended_power_table +ffffffff822fe2d0 t amdgpu_parse_clk_voltage_dep_table +ffffffff822fe380 T amdgpu_free_extended_power_table +ffffffff822fe490 T amdgpu_add_thermal_controller +ffffffff822fe8e0 T amdgpu_get_vce_clock_state +ffffffff822fe920 T amdgpu_legacy_dpm_compute_clocks +ffffffff822fedb0 T amdgpu_dpm_thermal_work_handler +ffffffff822ff000 t pp_early_init +ffffffff822ff100 t pp_late_init +ffffffff822ff220 t pp_sw_init +ffffffff822ff2b0 t pp_sw_fini +ffffffff822ff300 t pp_hw_init +ffffffff822ff360 t pp_hw_fini +ffffffff822ff3d0 t pp_late_fini +ffffffff822ff430 t pp_suspend +ffffffff822ff480 t pp_resume +ffffffff822ff4a0 t pp_is_idle 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pp_dpm_get_pp_table +ffffffff822ffe40 t pp_dpm_set_pp_table +ffffffff822fff70 t pp_dpm_switch_power_profile +ffffffff823000b0 t pp_dpm_get_vce_clock_state +ffffffff82300100 t pp_dpm_dispatch_tasks +ffffffff82300140 t pp_dpm_load_fw +ffffffff823001b0 t pp_dpm_fw_loading_complete +ffffffff823001e0 t pp_set_powergating_by_smu +ffffffff82300360 t pp_set_clockgating_by_smu +ffffffff823003d0 t pp_set_power_limit +ffffffff82300490 t pp_get_power_limit +ffffffff82300530 t pp_get_power_profile_mode +ffffffff82300590 t pp_set_power_profile_mode +ffffffff823005f0 t pp_set_fine_grain_clk_vol +ffffffff82300650 t pp_odn_edit_dpm_table +ffffffff823006b0 t pp_dpm_set_mp1_state +ffffffff82300710 t pp_smu_i2c_bus_access +ffffffff82300770 t pp_gfx_state_change_set +ffffffff823007d0 t pp_dpm_get_sclk +ffffffff82300820 t pp_dpm_get_mclk +ffffffff82300870 t pp_display_configuration_change +ffffffff823008c0 t pp_get_display_power_level +ffffffff82300900 t pp_get_current_clocks +ffffffff82300a20 t pp_get_clock_by_type +ffffffff82300a70 t pp_get_clock_by_type_with_latency +ffffffff82300ac0 t pp_get_clock_by_type_with_voltage +ffffffff82300b10 t pp_set_watermarks_for_clocks_ranges +ffffffff82300b50 t pp_display_clock_voltage_request +ffffffff82300b90 t pp_get_display_mode_validation_clocks +ffffffff82300bf0 t pp_notify_smu_enable_pwe +ffffffff82300c50 t pp_enable_mgpu_fan_boost +ffffffff82300cb0 t pp_set_active_display_count +ffffffff82300cf0 t pp_set_hard_min_dcefclk_by_freq +ffffffff82300d50 t pp_set_hard_min_fclk_by_freq +ffffffff82300db0 t pp_set_min_deep_sleep_dcefclk +ffffffff82300e10 t pp_get_asic_baco_capability +ffffffff82300e80 t pp_get_asic_baco_state +ffffffff82300ee0 t pp_set_asic_baco_state +ffffffff82300f50 t pp_get_ppfeature_status +ffffffff82300fb0 t pp_set_ppfeature_status +ffffffff82301000 t pp_asic_reset_mode_2 +ffffffff82301060 t pp_set_df_cstate +ffffffff823010c0 t pp_set_xgmi_pstate +ffffffff82301120 t pp_get_gpu_metrics +ffffffff82301180 t pp_get_prv_buffer_details +ffffffff82301200 t pp_pm_compute_clocks +ffffffff823012c0 t pp_swctf_delayed_work_handler +ffffffff82301400 t __delayed_work_tick +ffffffff82302000 T ci_baco_set_state +ffffffff82303000 T baco_program_registers +ffffffff823030d0 t baco_cmd_handler +ffffffff82303250 T soc15_baco_program_registers +ffffffff82304000 T fiji_baco_set_state +ffffffff82305000 T phm_setup_asic +ffffffff82305050 T phm_power_down_asic +ffffffff823050a0 T phm_set_power_state +ffffffff82305110 T phm_enable_dynamic_state_management +ffffffff823051c0 T phm_disable_dynamic_state_management +ffffffff82305260 T phm_force_dpm_levels +ffffffff823052b0 T phm_apply_state_adjust_rules +ffffffff82305300 T phm_apply_clock_adjust_rules +ffffffff82305350 T phm_powerdown_uvd +ffffffff823053a0 T phm_disable_clock_power_gatings +ffffffff823053f0 T phm_pre_display_configuration_changed +ffffffff82305450 T phm_display_configuration_changed +ffffffff823054b0 T phm_notify_smc_display_config_after_ps_adjustment +ffffffff82305510 T phm_stop_thermal_controller +ffffffff82305570 T phm_register_irq_handlers +ffffffff823055c0 T phm_start_thermal_controller +ffffffff82305710 T phm_check_smc_update_required_for_display_configuration +ffffffff82305770 T phm_check_states_equal +ffffffff823057c0 T phm_store_dal_configuration_data +ffffffff82305910 T phm_get_dal_power_level +ffffffff82305970 T phm_set_cpu_power_state +ffffffff823059c0 T phm_get_performance_level +ffffffff82305a20 T phm_get_clock_info +ffffffff82305b90 T phm_get_current_shallow_sleep_clocks +ffffffff82305be0 T phm_get_clock_by_type +ffffffff82305c30 T phm_get_clock_by_type_with_latency +ffffffff82305c80 T phm_get_clock_by_type_with_voltage +ffffffff82305cd0 T phm_set_watermarks_for_clocks_ranges +ffffffff82305d20 T phm_display_clock_voltage_request +ffffffff82305d70 T phm_get_max_high_clocks +ffffffff82305dc0 T phm_disable_smc_firmware_ctf +ffffffff82305e20 T phm_set_active_display_count +ffffffff82306000 T hwmgr_early_init +ffffffff82306460 t polaris_set_asic_special_caps +ffffffff823064e0 T hwmgr_sw_init +ffffffff82306550 T hwmgr_sw_fini +ffffffff823065a0 T hwmgr_hw_init +ffffffff82306760 T hwmgr_hw_fini +ffffffff82306820 T hwmgr_suspend +ffffffff823068a0 T hwmgr_resume +ffffffff82306940 T hwmgr_handle_task +ffffffff82307000 T polaris_baco_set_state +ffffffff82308000 T pp_override_get_default_fuse_value +ffffffff82309000 T psm_init_power_state_table +ffffffff823092a0 T psm_fini_power_state_table +ffffffff82309360 T psm_set_boot_states +ffffffff82309410 T psm_set_performance_states +ffffffff823094c0 T psm_set_user_performance_state +ffffffff82309550 T psm_adjust_power_state_dynamic +ffffffff8230a000 T atomctrl_initialize_mc_reg_table +ffffffff8230a210 T atomctrl_initialize_mc_reg_table_v2_2 +ffffffff8230a420 T atomctrl_set_engine_dram_timings_rv770 +ffffffff8230a490 T atomctrl_get_memory_pll_dividers_si +ffffffff8230a570 T atomctrl_get_memory_pll_dividers_vi +ffffffff8230a5f0 T atomctrl_get_memory_pll_dividers_ai +ffffffff8230a6a0 T atomctrl_get_engine_pll_dividers_kong +ffffffff8230a720 T atomctrl_get_engine_pll_dividers_vi +ffffffff8230a7f0 T atomctrl_get_engine_pll_dividers_ai +ffffffff8230a8d0 T atomctrl_get_dfs_pll_dividers_vi +ffffffff8230a990 T atomctrl_get_reference_clock +ffffffff8230a9f0 T atomctrl_is_voltage_controlled_by_gpio_v3 +ffffffff8230aab0 T atomctrl_get_voltage_table_v3 +ffffffff8230ac10 T atomctrl_get_pp_assign_pin +ffffffff8230acf0 T atomctrl_calculate_voltage_evv_on_sclk +ffffffff8230b0c0 t GetScaledFraction +ffffffff8230b150 t fDecodeLeakageID +ffffffff8230b1b0 t fSqrt +ffffffff8230b230 T atomctrl_get_voltage_evv_on_sclk +ffffffff8230b2b0 T atomctrl_get_voltage_evv +ffffffff8230b360 T atomctrl_get_mpll_reference_clock +ffffffff8230b3d0 T atomctrl_is_asic_internal_ss_supported +ffffffff8230b420 T atomctrl_get_memory_clock_spread_spectrum +ffffffff8230b520 T atomctrl_get_engine_clock_spread_spectrum +ffffffff8230b620 T atomctrl_read_efuse +ffffffff8230b6d0 T atomctrl_set_ac_timing_ai +ffffffff8230b730 T atomctrl_get_voltage_evv_on_sclk_ai +ffffffff8230b7b0 T atomctrl_get_smc_sclk_range_table +ffffffff8230b860 T atomctrl_get_vddc_shared_railinfo +ffffffff8230b8d0 T atomctrl_get_avfs_information +ffffffff8230ba60 T atomctrl_get_svi2_info +ffffffff8230bb40 T atomctrl_get_leakage_id_from_efuse +ffffffff8230bba0 T atomctrl_get_leakage_vddc_base_on_leakage +ffffffff8230bd40 T atomctrl_get_voltage_range +ffffffff8230be00 T atomctrl_get_edc_hilo_leakage_offset_table +ffffffff8230be80 T atomctrl_get_edc_leakage_table +ffffffff8230c000 T pp_atomfwctrl_is_voltage_controlled_by_gpio_v4 +ffffffff8230c0c0 T pp_atomfwctrl_get_voltage_table_v4 +ffffffff8230c280 T pp_atomfwctrl_get_pp_assign_pin +ffffffff8230c360 T pp_atomfwctrl_enter_self_refresh +ffffffff8230c390 T pp_atomfwctrl_get_gpu_pll_dividers_vega10 +ffffffff8230c440 T pp_atomfwctrl_get_avfs_information +ffffffff8230c780 T pp_atomfwctrl_get_gpio_information +ffffffff8230c820 T pp_atomfwctrl_get_clk_information_by_clkid +ffffffff8230c8b0 T pp_atomfwctrl_get_vbios_bootup_values +ffffffff8230cc30 T pp_atomfwctrl_get_smc_dpm_information +ffffffff8230d000 T encode_pcie_lane_width +ffffffff8230d030 T decode_pcie_lane_width +ffffffff8230e000 t pp_tables_v1_0_initialize +ffffffff8230f450 t pp_tables_v1_0_uninitialize +ffffffff8230f600 T get_number_of_powerplay_table_entries_v1_0 +ffffffff8230f6b0 T get_powerplay_table_entry_v1_0 +ffffffff82310000 T pp_tables_get_response_times +ffffffff823100d0 T pp_tables_get_num_of_entries +ffffffff82310190 T pp_tables_get_entry +ffffffff823104a0 t init_non_clock_fields +ffffffff823105e0 t pp_tables_initialize +ffffffff82311760 t pp_tables_uninitialize +ffffffff82311960 t get_number_of_vce_state_table_entries +ffffffff82311a50 t get_vce_state_table_entry +ffffffff82312000 T smu10_init_function_pointers +ffffffff82312040 t smu10_hwmgr_backend_init +ffffffff823126e0 t smu10_hwmgr_backend_fini +ffffffff82312820 t smu10_setup_asic_task +ffffffff82312890 t smu10_get_power_state_size +ffffffff823128c0 t smu10_apply_state_adjust_rules +ffffffff823128f0 t smu10_dpm_force_dpm_level +ffffffff82312e70 t smu10_enable_dpm_tasks +ffffffff82312f30 t smu10_disable_dpm_tasks +ffffffff82312f60 t smu10_dpm_patch_boot_state +ffffffff82312f90 t smu10_dpm_get_pp_table_entry +ffffffff82312ff0 t smu10_dpm_get_num_of_pp_table_entries +ffffffff82313040 t smu10_powergate_vcn +ffffffff823130e0 t smu10_dpm_get_mclk +ffffffff82313140 t smu10_dpm_get_sclk +ffffffff82313190 t smu10_set_power_state_tasks +ffffffff82313200 t smu10_set_cpu_power_state +ffffffff82313230 t smu10_store_cc6_data +ffffffff823132a0 t smu10_get_dal_power_level +ffffffff823132d0 t smu10_get_performance_level +ffffffff82313370 t smu10_get_current_shallow_sleep_clocks +ffffffff823133d0 t smu10_get_clock_by_type_with_latency +ffffffff82313520 t smu10_get_clock_by_type_with_voltage +ffffffff82313630 t smu10_set_watermarks_for_clocks_ranges +ffffffff82313700 t smu10_display_clock_voltage_request +ffffffff823137a0 t smu10_get_max_high_clocks +ffffffff823137d0 t smu10_power_off_asic +ffffffff82313820 t smu10_force_clock_level +ffffffff823139e0 t smu10_print_clock_levels +ffffffff82313dd0 t smu10_gfx_off_control +ffffffff82313ee0 t smu10_read_sensor +ffffffff82314070 t smu10_set_active_display_count +ffffffff823140d0 t smu10_set_min_deep_sleep_dcefclk +ffffffff82314130 t smu10_get_power_profile_mode +ffffffff82314170 t smu10_set_power_profile_mode +ffffffff823142a0 t smu10_set_fine_grain_clk_vol +ffffffff823144b0 t smu10_powergate_mmhub +ffffffff823144d0 t smu10_smus_notify_pwe +ffffffff823144f0 t smu10_powergate_sdma +ffffffff82314510 t smu10_set_hard_min_dcefclk_by_freq +ffffffff82314570 t smu10_set_hard_min_fclk_by_freq +ffffffff823145d0 t smu10_set_hard_min_gfxclk_by_freq +ffffffff82314630 t smu10_set_soft_max_gfxclk_by_freq +ffffffff82314690 t smu10_asic_reset +ffffffff823146b0 t smu10_gfx_state_change +ffffffff823146f0 t smu10_dpm_get_pp_table_entry_callback +ffffffff82315000 T smu7_baco_get_capability +ffffffff82315060 T smu7_baco_get_state +ffffffff823150b0 T smu7_baco_set_state +ffffffff82316000 T smu7_powerdown_uvd +ffffffff82316050 T smu7_disable_clock_power_gating +ffffffff823160e0 T smu7_powergate_uvd +ffffffff823161d0 T smu7_powergate_vce +ffffffff823162c0 T smu7_update_clock_gatings +ffffffff82316670 T smu7_powergate_gfx +ffffffff82317000 T smu7_get_sleep_divider_id_from_clock +ffffffff823170a0 T smu7_init_function_pointers +ffffffff82317100 t smu7_hwmgr_backend_init +ffffffff82318ed0 t smu7_hwmgr_backend_fini +ffffffff82318f40 t smu7_setup_asic_task +ffffffff823192b0 t smu7_get_power_state_size +ffffffff823192e0 t smu7_apply_state_adjust_rules +ffffffff82319780 t smu7_force_dpm_level +ffffffff82319c90 t smu7_enable_dpm_tasks +ffffffff8231c520 t smu7_disable_dpm_tasks +ffffffff8231cb60 t smu7_dpm_patch_boot_state +ffffffff8231cca0 t smu7_get_pp_table_entry +ffffffff8231d0a0 t smu7_get_number_of_powerplay_table_entries +ffffffff8231d110 t smu7_dpm_get_mclk +ffffffff8231d1b0 t smu7_dpm_get_sclk +ffffffff8231d250 t smu7_set_power_state_tasks +ffffffff8231df70 t smu7_notify_smc_display_config_after_ps_adjustment +ffffffff8231dfa0 t smu7_display_configuration_changed_task +ffffffff8231e160 t smu7_set_max_fan_rpm_output +ffffffff8231e190 t smu7_set_max_fan_pwm_output +ffffffff8231e1b0 t smu7_set_fan_control_mode +ffffffff8231e240 t smu7_get_fan_control_mode +ffffffff8231e280 t smu7_register_irq_handlers +ffffffff8231e330 t smu7_check_smc_update_required_for_display_configuration +ffffffff8231e3e0 t smu7_check_states_equal +ffffffff8231e580 t smu7_get_performance_level +ffffffff8231e610 t smu7_get_clock_by_type +ffffffff8231e7d0 t smu7_get_clock_by_type_with_latency +ffffffff8231e9a0 t smu7_set_watermarks_for_clocks_ranges +ffffffff8231ebc0 t smu7_get_max_high_clocks +ffffffff8231ec40 t smu7_power_off_asic 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smu7_program_pt_config_registers +ffffffff82322590 t smu7_enable_didt +ffffffff82322780 T smu7_disable_didt_config +ffffffff82322850 T smu7_enable_smc_cac +ffffffff823228e0 T smu7_disable_smc_cac +ffffffff82322970 T smu7_set_power_limit +ffffffff823229d0 T smu7_enable_power_containment +ffffffff82322b60 T smu7_disable_power_containment +ffffffff82322c80 T smu7_power_control_set_level +ffffffff82323000 T smu7_fan_ctrl_get_fan_speed_info +ffffffff82323080 T smu7_fan_ctrl_get_fan_speed_pwm +ffffffff82323150 T smu7_fan_ctrl_get_fan_speed_rpm +ffffffff82323200 T smu7_fan_ctrl_set_static_mode +ffffffff82323330 T smu7_fan_ctrl_set_default_mode +ffffffff82323410 T smu7_fan_ctrl_start_smc_fan_control +ffffffff82323540 T smu7_fan_ctrl_stop_smc_fan_control +ffffffff82323560 T smu7_fan_ctrl_set_fan_speed_pwm +ffffffff82323740 T smu7_fan_ctrl_reset_fan_speed_to_default +ffffffff82323930 T smu7_fan_ctrl_set_fan_speed_rpm +ffffffff82323b10 T smu7_thermal_get_temperature +ffffffff82323b70 T smu7_thermal_disable_alert +ffffffff82323c10 T smu7_thermal_stop_thermal_controller +ffffffff82323d90 T smu7_start_thermal_controller +ffffffff82324120 T smu7_thermal_ctrl_uninitialize_thermal_controller +ffffffff82325000 T smu8_init_function_pointers +ffffffff82325040 t smu8_hwmgr_backend_init +ffffffff82325520 t smu8_hwmgr_backend_fini +ffffffff823255a0 t smu8_setup_asic_task +ffffffff82325ac0 t smu8_get_power_state_size +ffffffff82325af0 t smu8_apply_state_adjust_rules +ffffffff82325c40 t smu8_dpm_force_dpm_level +ffffffff82325f20 t smu8_enable_dpm_tasks +ffffffff823260b0 t smu8_disable_dpm_tasks +ffffffff82326190 t smu8_dpm_patch_boot_state +ffffffff823261f0 t smu8_dpm_get_pp_table_entry +ffffffff82326250 t smu8_dpm_get_num_of_pp_table_entries +ffffffff823262a0 t smu8_dpm_powerdown_uvd +ffffffff823262f0 t smu8_dpm_powergate_vce +ffffffff823264c0 t smu8_dpm_powergate_uvd +ffffffff823266d0 t smu8_dpm_powergate_acp +ffffffff82326730 t smu8_dpm_get_mclk +ffffffff82326760 t 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phm_set_field_to_u32 +ffffffff823292b0 T phm_wait_on_register +ffffffff823293a0 T phm_wait_on_indirect_register +ffffffff823294b0 T phm_wait_for_register_unequal +ffffffff82329580 T phm_wait_for_indirect_register_unequal +ffffffff82329680 T phm_cf_want_uvd_power_gating +ffffffff823296c0 T phm_cf_want_vce_power_gating +ffffffff82329700 T phm_trim_voltage_table +ffffffff82329820 T phm_get_svi2_mvdd_voltage_table +ffffffff823299a0 T phm_get_svi2_vddci_voltage_table +ffffffff82329b20 T phm_get_svi2_vdd_voltage_table +ffffffff82329bc0 T phm_trim_voltage_table_to_fit_state_table +ffffffff82329cb0 T phm_reset_single_dpm_table +ffffffff82329d10 T phm_setup_pcie_table_entry +ffffffff82329d50 T phm_get_dpm_level_enable_mask_value +ffffffff82329e30 T phm_get_voltage_index +ffffffff82329eb0 T phm_get_voltage_id +ffffffff82329f30 T phm_find_closest_vddci +ffffffff82329fa0 T phm_find_boot_level +ffffffff8232a010 T phm_get_sclk_for_voltage_evv +ffffffff8232a0d0 T phm_initializa_dynamic_state_adjustment_rule_settings +ffffffff8232a1e0 T phm_get_lowest_enabled_level +ffffffff8232a220 T phm_apply_dal_min_voltage_request +ffffffff8232a2f0 T phm_get_voltage_evv_on_sclk +ffffffff8232a3a0 T phm_irq_process +ffffffff8232a540 T smu9_register_irq_handlers +ffffffff8232a5f0 T smu_atom_get_data_table +ffffffff8232a660 T smu_get_voltage_dependency_table_ppt_v1 +ffffffff8232a760 T smu_set_watermarks_for_clocks_ranges +ffffffff8232b000 T tonga_baco_set_state +ffffffff8232c000 T vega10_baco_set_state +ffffffff8232d000 T vega10_enable_disable_vce_dpm +ffffffff8232d090 T vega10_hwmgr_init +ffffffff8232d0f0 t vega10_hwmgr_backend_init +ffffffff8232def0 t vega10_hwmgr_backend_fini +ffffffff8232df60 t vega10_setup_asic_task +ffffffff8232e090 t vega10_get_power_state_size +ffffffff8232e0c0 t vega10_apply_state_adjust_rules +ffffffff8232e420 t vega10_dpm_force_dpm_level +ffffffff8232e880 t vega10_enable_dpm_tasks +ffffffff82331650 t vega10_disable_dpm_tasks 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vega10_odn_initial_default_setting +ffffffff823352b0 t vega10_populate_all_graphic_levels +ffffffff823354c0 t vega10_populate_all_memory_levels +ffffffff82335620 t vega10_populate_single_gfx_level +ffffffff82335770 t vega10_populate_single_soc_level +ffffffff823358b0 t vega10_populate_single_memory_level +ffffffff82335a20 t vega10_get_pp_table_entry_callback_func +ffffffff82335c60 t vega10_odn_update_power_state +ffffffff82336000 T vega10_enable_didt_config +ffffffff82337870 T vega10_disable_didt_config +ffffffff82337ad0 T vega10_initialize_power_tune_defaults +ffffffff82337c10 T vega10_set_power_limit +ffffffff82337c60 T vega10_enable_power_containment +ffffffff82337d80 T vega10_disable_power_containment +ffffffff82337e50 T vega10_power_control_set_level +ffffffff82337eb0 t vega10_didt_set_mask +ffffffff82339000 t vega10_pp_tables_initialize +ffffffff8233a690 t vega10_pp_tables_uninitialize +ffffffff8233a840 T vega10_get_number_of_powerplay_table_entries +ffffffff8233a8f0 T vega10_get_powerplay_table_entry +ffffffff8233aa60 T vega10_baco_set_cap +ffffffff8233b000 T vega10_fan_ctrl_get_fan_speed_info +ffffffff8233b080 T vega10_fan_ctrl_get_fan_speed_pwm +ffffffff8233b1b0 T vega10_fan_ctrl_get_fan_speed_rpm +ffffffff8233b2b0 T vega10_fan_ctrl_set_static_mode +ffffffff8233b570 T vega10_fan_ctrl_set_default_mode +ffffffff8233b790 T vega10_fan_ctrl_start_smc_fan_control +ffffffff8233b850 T vega10_fan_ctrl_stop_smc_fan_control +ffffffff8233b910 T vega10_fan_ctrl_set_fan_speed_pwm +ffffffff8233bb50 T vega10_fan_ctrl_reset_fan_speed_to_default +ffffffff8233bc10 T vega10_fan_ctrl_set_fan_speed_rpm +ffffffff8233bdf0 T vega10_thermal_get_temperature +ffffffff8233be80 T vega10_thermal_disable_alert +ffffffff8233bf90 T vega10_thermal_stop_thermal_controller +ffffffff8233bff0 T vega10_enable_mgpu_fan_boost +ffffffff8233c100 T vega10_start_thermal_controller +ffffffff8233c6c0 T vega10_thermal_ctrl_uninitialize_thermal_controller +ffffffff8233d000 T vega12_baco_set_state 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sienna_cichlid_print_clk_levels +ffffffff82387bc0 t sienna_cichlid_force_clk_levels +ffffffff82387cf0 t sienna_cichlid_od_edit_dpm_table +ffffffff82388270 t sienna_cichlid_restore_user_od_settings +ffffffff82388300 t sienna_cichlid_get_power_profile_mode +ffffffff82388560 t sienna_cichlid_set_power_profile_mode +ffffffff82388830 t sienna_cichlid_dpm_set_vcn_enable +ffffffff823888f0 t sienna_cichlid_dpm_set_jpeg_enable +ffffffff82388970 t sienna_cichlid_read_sensor +ffffffff82389170 t sienna_cichlid_pre_display_config_changed +ffffffff823891a0 t sienna_cichlid_display_config_changed +ffffffff82389200 t sienna_cichlid_notify_smc_display_config +ffffffff82389380 t sienna_cichlid_is_dpm_running +ffffffff823893d0 t sienna_cichlid_get_fan_speed_rpm +ffffffff823894e0 t sienna_cichlid_set_watermarks_table +ffffffff82389670 t sienna_cichlid_get_thermal_temperature_range +ffffffff82389750 t sienna_cichlid_get_uclk_dpm_states +ffffffff82389860 t sienna_cichlid_set_default_od_settings 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sienna_cichlid_enable_mgpu_fan_boost +ffffffff8238b0e0 t sienna_cichlid_get_fan_parameters +ffffffff8238b120 t sienna_cichlid_gpo_control +ffffffff8238b1d0 t sienna_cichlid_get_ecc_info +ffffffff8238b2c0 t sienna_cichlid_stb_get_data_direct +ffffffff8238b360 t sienna_cichlid_get_default_config_table_settings +ffffffff8238b3d0 t sienna_cichlid_set_config_table +ffffffff8238b4a0 t sienna_cichlid_get_throttler_status_locked +ffffffff8238b600 t sienna_cichlid_get_smartshift_power_percentage +ffffffff8238b730 t sienna_cichlid_i2c_xfer +ffffffff8238b9d0 t sienna_cichlid_i2c_func +ffffffff8238c000 T smu_v11_0_init_microcode +ffffffff8238c140 T smu_v11_0_fini_microcode +ffffffff8238c190 T smu_v11_0_load_microcode +ffffffff8238c2d0 T smu_v11_0_check_fw_status +ffffffff8238c320 T smu_v11_0_check_fw_version +ffffffff8238c490 T smu_v11_0_setup_pptable +ffffffff8238c5b0 T smu_v11_0_init_smc_tables +ffffffff8238c710 T smu_v11_0_fini_smc_tables +ffffffff8238c940 T smu_v11_0_init_power +ffffffff8238c9d0 T smu_v11_0_fini_power +ffffffff8238ca30 T smu_v11_0_get_vbios_bootup_values +ffffffff8238cd90 T smu_v11_0_notify_memory_pool_location +ffffffff8238ce80 T smu_v11_0_set_min_deep_sleep_dcefclk +ffffffff8238cf00 T smu_v11_0_set_driver_table_location +ffffffff8238cf70 T smu_v11_0_set_tool_table_location +ffffffff8238cfe0 T smu_v11_0_init_display_count +ffffffff8238d040 T smu_v11_0_set_allowed_mask +ffffffff8238d110 T smu_v11_0_system_features_control +ffffffff8238d130 T smu_v11_0_notify_display_change +ffffffff8238d1a0 T smu_v11_0_init_max_sustainable_clocks +ffffffff8238d400 t smu_v11_0_get_max_sustainable_clock +ffffffff8238d520 T smu_v11_0_get_current_power_limit +ffffffff8238d5f0 T smu_v11_0_set_power_limit +ffffffff8238d730 T smu_v11_0_interrupt_work +ffffffff8238d7b0 T smu_v11_0_enable_thermal_alert +ffffffff8238d850 T smu_v11_0_disable_thermal_alert +ffffffff8238d870 T smu_v11_0_get_gfx_vdd +ffffffff8238d930 T smu_v11_0_display_clock_voltage_request +ffffffff8238da80 T smu_v11_0_set_hard_freq_limited_range +ffffffff8238db60 T smu_v11_0_gfx_off_control +ffffffff8238dbd0 T smu_v11_0_get_fan_control_mode +ffffffff8238dc20 T smu_v11_0_set_fan_speed_pwm +ffffffff8238ddd0 t smu_v11_0_set_fan_static_mode +ffffffff8238df90 T smu_v11_0_set_fan_speed_rpm +ffffffff8238e0d0 T smu_v11_0_get_fan_speed_pwm +ffffffff8238e210 T smu_v11_0_get_fan_speed_rpm +ffffffff8238e310 T smu_v11_0_set_fan_control_mode +ffffffff8238e4b0 T smu_v11_0_set_xgmi_pstate +ffffffff8238e4d0 T smu_v11_0_register_irq_handler +ffffffff8238e590 T smu_v11_0_get_max_sustainable_clocks_by_dc +ffffffff8238e620 T smu_v11_0_set_azalia_d3_pme +ffffffff8238e640 T smu_v11_0_baco_set_armd3_sequence +ffffffff8238e660 T smu_v11_0_baco_is_support +ffffffff8238e6f0 T smu_v11_0_baco_get_state +ffffffff8238e720 T smu_v11_0_baco_set_state +ffffffff8238e9d0 T smu_v11_0_baco_enter +ffffffff8238eac0 T smu_v11_0_baco_exit +ffffffff8238ebf0 T smu_v11_0_mode1_reset +ffffffff8238ec70 T smu_v11_0_handle_passthrough_sbr +ffffffff8238ec90 T smu_v11_0_get_dpm_ultimate_freq +ffffffff8238edd0 T smu_v11_0_set_soft_freq_limited_range +ffffffff8238eea0 T smu_v11_0_set_performance_level +ffffffff8238f1f0 T smu_v11_0_set_power_source +ffffffff8238f250 T smu_v11_0_get_dpm_freq_by_index +ffffffff8238f300 T smu_v11_0_get_dpm_level_count +ffffffff8238f3a0 T smu_v11_0_set_single_dpm_table +ffffffff8238f600 T smu_v11_0_get_dpm_level_range +ffffffff8238f760 T smu_v11_0_get_current_pcie_link_width_level +ffffffff8238f7b0 T smu_v11_0_get_current_pcie_link_width +ffffffff8238f810 T smu_v11_0_get_current_pcie_link_speed_level +ffffffff8238f860 T smu_v11_0_get_current_pcie_link_speed +ffffffff8238f8c0 T smu_v11_0_gfx_ulv_control +ffffffff8238f930 T smu_v11_0_deep_sleep_control +ffffffff8238fae0 T smu_v11_0_restore_user_od_settings +ffffffff8238fb70 T smu_v11_0_set_smu_mailbox_registers +ffffffff8238fbe0 t smu_v11_0_set_irq_state +ffffffff82390190 t smu_v11_0_irq_process +ffffffff82391000 T vangogh_set_ppt_funcs +ffffffff82391040 t vangogh_set_default_dpm_tables +ffffffff82391070 t vangogh_common_print_clk_levels +ffffffff823914e0 t vangogh_force_clk_levels +ffffffff82391710 t vangogh_od_edit_dpm_table +ffffffff82391c40 t vangogh_get_power_profile_mode +ffffffff82391d40 t vangogh_set_power_profile_mode +ffffffff82391e60 t vangogh_dpm_set_vcn_enable +ffffffff82391eb0 t vangogh_dpm_set_jpeg_enable +ffffffff82391f00 t vangogh_read_sensor +ffffffff82392530 t vangogh_get_apu_thermal_limit +ffffffff82392550 t vangogh_set_apu_thermal_limit +ffffffff82392570 t vangogh_is_dpm_running +ffffffff823925d0 t vangogh_set_watermarks_table +ffffffff82392750 t vangogh_set_performance_level +ffffffff82392f60 t vangogh_get_power_limit +ffffffff823930c0 t vangogh_get_ppt_limit +ffffffff82393130 t vangogh_get_dpm_clock_table +ffffffff823932a0 t vangogh_init_smc_tables +ffffffff823934e0 t vangogh_system_features_control +ffffffff82393530 t vangogh_set_power_limit +ffffffff82393680 t vangogh_get_gfxoff_status +ffffffff82393710 t vangogh_get_gfxoff_entrycount +ffffffff82393780 t vangogh_set_gfxoff_residency +ffffffff823937f0 t vangogh_get_gfxoff_residency +ffffffff82393830 t vangogh_mode2_reset +ffffffff82393970 t vangogh_common_get_gpu_metrics +ffffffff823940f0 t vangogh_post_smu_init +ffffffff82394280 t vangogh_set_fine_grain_gfx_freq_parameters +ffffffff823942f0 t vangogh_force_dpm_limit_value +ffffffff82394420 t vangogh_get_dpm_ultimate_freq +ffffffff823947e0 t vangogh_set_soft_freq_limited_range +ffffffff82394960 t vangogh_get_gpu_metrics_v2_3 +ffffffff82395000 T renoir_set_ppt_funcs +ffffffff823950a0 t renoir_get_current_power_state +ffffffff82395120 t renoir_print_clk_levels +ffffffff82395530 t renoir_force_clk_levels +ffffffff82395750 t renoir_od_edit_dpm_table +ffffffff82395a30 t renoir_get_power_profile_mode +ffffffff82395b00 t renoir_set_power_profile_mode +ffffffff82395c20 t renoir_dpm_set_vcn_enable +ffffffff82395ca0 t renoir_dpm_set_jpeg_enable +ffffffff82395d20 t renoir_read_sensor +ffffffff823960d0 t renoir_is_dpm_running +ffffffff82396110 t renoir_set_watermarks_table +ffffffff823962b0 t renoir_set_performance_level +ffffffff823967d0 t renoir_get_dpm_clock_table +ffffffff82396b20 t renoir_init_smc_tables +ffffffff82396c90 t renoir_get_enabled_mask +ffffffff82396cd0 t renoir_get_dpm_ultimate_freq +ffffffff82396f70 t renoir_get_gpu_metrics +ffffffff82397190 t renoir_gfx_state_change_set +ffffffff823971c0 t renoir_set_fine_grain_gfx_freq_parameters +ffffffff82397260 t renoir_force_dpm_limit_value +ffffffff82398000 T smu_v12_0_check_fw_status +ffffffff82398050 T smu_v12_0_check_fw_version +ffffffff823980c0 T smu_v12_0_powergate_sdma +ffffffff82398110 T smu_v12_0_set_gfx_cgpg +ffffffff82398170 T smu_v12_0_get_gfxoff_status +ffffffff82398200 T smu_v12_0_gfx_off_control +ffffffff82398320 T smu_v12_0_fini_smc_tables +ffffffff823983d0 T smu_v12_0_set_default_dpm_tables +ffffffff82398400 T smu_v12_0_mode2_reset +ffffffff82398420 T smu_v12_0_set_soft_freq_limited_range +ffffffff82398560 T smu_v12_0_set_driver_table_location +ffffffff823985d0 T smu_v12_0_get_vbios_bootup_values +ffffffff82399000 T aldebaran_set_ppt_funcs +ffffffff82399050 t aldebaran_get_allowed_feature_mask +ffffffff823990a0 t aldebaran_set_default_dpm_table +ffffffff823992a0 t aldebaran_populate_umd_state_clk +ffffffff823993a0 t aldebaran_print_clk_levels +ffffffff82399560 t aldebaran_force_clk_levels +ffffffff82399720 t aldebaran_usr_edit_dpm_table +ffffffff82399940 t aldebaran_read_sensor +ffffffff82399b60 t aldebaran_is_dpm_running +ffffffff82399bb0 t aldebaran_get_thermal_temperature_range +ffffffff82399c80 t aldebaran_set_performance_level +ffffffff82399d30 t aldebaran_get_power_limit +ffffffff82399ec0 t aldebaran_set_df_cstate +ffffffff82399f40 t aldebaran_allow_xgmi_power_down +ffffffff82399fe0 t aldebaran_i2c_control_init +ffffffff8239a0a0 t aldebaran_i2c_control_fini +ffffffff8239a0e0 t aldebaran_get_unique_id +ffffffff8239a1c0 t aldebaran_init_smc_tables +ffffffff8239a380 t aldebaran_set_mp1_state +ffffffff8239a3c0 t aldebaran_setup_pptable +ffffffff8239a490 t aldebaran_system_features_control +ffffffff8239a5f0 t aldebaran_set_power_limit +ffffffff8239a680 t aldebaran_is_baco_supported +ffffffff8239a6b0 t aldebaran_is_mode1_reset_supported +ffffffff8239a6e0 t aldebaran_is_mode2_reset_supported +ffffffff8239a710 t aldebaran_mode1_reset +ffffffff8239a7f0 t aldebaran_mode2_reset +ffffffff8239ab10 t aldebaran_set_soft_freq_limited_range +ffffffff8239ad10 t aldebaran_log_thermal_throttling_event +ffffffff8239b020 t aldebaran_get_gpu_metrics +ffffffff8239b2a0 t aldebaran_smu_handle_passthrough_sbr +ffffffff8239b2c0 t aldebaran_smu_send_hbm_bad_page_num +ffffffff8239b340 t aldebaran_get_ecc_info +ffffffff8239b4a0 t aldebaran_send_hbm_bad_channel_flag +ffffffff8239b570 t aldebaran_get_current_clk_freq_by_table +ffffffff8239b6b0 t aldebaran_get_smu_metrics_data +ffffffff8239b920 t aldebaran_upload_dpm_level +ffffffff8239ba10 t aldebaran_i2c_xfer +ffffffff8239bcb0 t aldebaran_i2c_func +ffffffff8239c000 T smu_v13_0_init_microcode +ffffffff8239c120 T smu_v13_0_fini_microcode +ffffffff8239c170 T smu_v13_0_load_microcode +ffffffff8239c1a0 T smu_v13_0_init_pptable_microcode +ffffffff8239c350 T smu_v13_0_get_pptable_from_firmware +ffffffff8239c470 T smu_v13_0_check_fw_status +ffffffff8239c4e0 T smu_v13_0_check_fw_version +ffffffff8239c560 T smu_v13_0_setup_pptable +ffffffff8239c6f0 T smu_v13_0_init_smc_tables +ffffffff8239c870 T smu_v13_0_fini_smc_tables +ffffffff8239ca80 T smu_v13_0_init_power +ffffffff8239cb00 T smu_v13_0_fini_power +ffffffff8239cb80 T smu_v13_0_get_vbios_bootup_values +ffffffff8239ce20 T smu_v13_0_notify_memory_pool_location +ffffffff8239cee0 T smu_v13_0_set_min_deep_sleep_dcefclk +ffffffff8239cf60 T smu_v13_0_set_driver_table_location +ffffffff8239cfd0 T smu_v13_0_set_tool_table_location +ffffffff8239d040 T smu_v13_0_init_display_count +ffffffff8239d080 T smu_v13_0_set_allowed_mask +ffffffff8239d150 T smu_v13_0_gfx_off_control +ffffffff8239d1d0 T smu_v13_0_system_features_control +ffffffff8239d1f0 T smu_v13_0_notify_display_change +ffffffff8239d250 T smu_v13_0_init_max_sustainable_clocks +ffffffff8239d4b0 t smu_v13_0_get_max_sustainable_clock +ffffffff8239d5d0 T smu_v13_0_get_current_power_limit +ffffffff8239d6a0 T smu_v13_0_set_power_limit +ffffffff8239d7b0 T smu_v13_0_enable_thermal_alert +ffffffff8239d840 T smu_v13_0_disable_thermal_alert +ffffffff8239d880 T smu_v13_0_get_gfx_vdd +ffffffff8239d940 T smu_v13_0_display_clock_voltage_request +ffffffff8239da90 T smu_v13_0_set_hard_freq_limited_range +ffffffff8239db70 T smu_v13_0_get_fan_control_mode +ffffffff8239dbc0 T smu_v13_0_set_fan_speed_pwm +ffffffff8239dde0 t smu_v13_0_set_fan_static_mode +ffffffff8239dfb0 T smu_v13_0_set_fan_control_mode +ffffffff8239e110 T smu_v13_0_set_fan_speed_rpm +ffffffff8239e2c0 T smu_v13_0_set_xgmi_pstate +ffffffff8239e2e0 T smu_v13_0_register_irq_handler +ffffffff8239e3b0 T smu_v13_0_get_max_sustainable_clocks_by_dc +ffffffff8239e440 T smu_v13_0_set_azalia_d3_pme +ffffffff8239e460 T smu_v13_0_wait_for_event +ffffffff8239e4b0 T smu_v13_0_get_dpm_ultimate_freq +ffffffff8239e610 T smu_v13_0_set_soft_freq_limited_range +ffffffff8239e6e0 T smu_v13_0_set_performance_level +ffffffff8239ee40 T smu_v13_0_set_power_source +ffffffff8239eea0 T smu_v13_0_get_dpm_freq_by_index +ffffffff8239ef50 T smu_v13_0_set_single_dpm_table +ffffffff8239f240 T smu_v13_0_get_current_pcie_link_width_level +ffffffff8239f290 T smu_v13_0_get_current_pcie_link_width +ffffffff8239f2f0 T smu_v13_0_get_current_pcie_link_speed_level +ffffffff8239f340 T smu_v13_0_get_current_pcie_link_speed +ffffffff8239f390 T smu_v13_0_set_vcn_enable +ffffffff8239f450 T smu_v13_0_set_jpeg_enable +ffffffff8239f470 T smu_v13_0_run_btc +ffffffff8239f4f0 T smu_v13_0_gpo_control +ffffffff8239f580 T smu_v13_0_deep_sleep_control +ffffffff8239f7e0 T smu_v13_0_gfx_ulv_control +ffffffff8239f850 T smu_v13_0_baco_set_armd3_sequence +ffffffff8239f8c0 T smu_v13_0_baco_is_support +ffffffff8239f950 T smu_v13_0_baco_get_state +ffffffff8239f980 T smu_v13_0_baco_set_state +ffffffff8239fa50 T smu_v13_0_baco_enter +ffffffff8239fb70 T smu_v13_0_baco_exit +ffffffff8239fc10 T smu_v13_0_set_gfx_power_up_by_imu +ffffffff8239fc50 T smu_v13_0_od_edit_dpm_table +ffffffff8239ff00 T smu_v13_0_set_default_dpm_tables +ffffffff8239ff30 T smu_v13_0_set_smu_mailbox_registers +ffffffff8239ffa0 T smu_v13_0_mode1_reset +ffffffff823a0020 T smu_v13_0_update_pcie_parameters +ffffffff823a0290 t smu_v13_0_set_irq_state +ffffffff823a0840 t smu_v13_0_irq_process +ffffffff823a1000 T smu_v13_0_0_set_ppt_funcs +ffffffff823a10f0 t smu_v13_0_0_get_allowed_feature_mask +ffffffff823a1230 t smu_v13_0_0_set_default_dpm_table +ffffffff823a1650 t smu_v13_0_0_populate_umd_state_clk +ffffffff823a1790 t smu_v13_0_0_print_clk_levels +ffffffff823a18a0 t smu_v13_0_0_force_clk_levels +ffffffff823a1a20 t smu_v13_0_0_od_edit_dpm_table +ffffffff823a1ef0 t smu_v13_0_0_restore_user_od_settings +ffffffff823a1fb0 t smu_v13_0_0_get_power_profile_mode +ffffffff823a20b0 t smu_v13_0_0_set_power_profile_mode +ffffffff823a2300 t smu_v13_0_0_read_sensor +ffffffff823a2520 t smu_v13_0_0_is_dpm_running +ffffffff823a2570 t smu_v13_0_0_get_fan_speed_pwm +ffffffff823a2650 t smu_v13_0_0_get_fan_speed_rpm +ffffffff823a26c0 t smu_v13_0_0_get_thermal_temperature_range +ffffffff823a27c0 t smu_v13_0_0_set_default_od_settings +ffffffff823a28f0 t smu_v13_0_0_dump_pptable +ffffffff823a2920 t smu_v13_0_0_get_power_limit +ffffffff823a2a00 t smu_v13_0_0_set_df_cstate +ffffffff823a2a20 t smu_v13_0_0_i2c_control_init +ffffffff823a2b50 t smu_v13_0_0_i2c_control_fini +ffffffff823a2b90 t smu_v13_0_0_get_unique_id +ffffffff823a2c30 t smu_v13_0_0_init_smc_tables +ffffffff823a2e80 t smu_v13_0_0_set_mp1_state +ffffffff823a2ec0 t smu_v13_0_0_setup_pptable +ffffffff823a3020 t smu_v13_0_0_system_features_control +ffffffff823a3030 t smu_v13_0_0_baco_enter +ffffffff823a3090 t smu_v13_0_0_baco_exit +ffffffff823a30f0 t smu_v13_0_0_is_mode1_reset_supported +ffffffff823a3150 t smu_v13_0_0_mode1_reset +ffffffff823a3270 t smu_v13_0_0_mode2_reset +ffffffff823a32c0 t smu_v13_0_0_enable_gfx_features +ffffffff823a3310 t smu_v13_0_0_get_dpm_ultimate_freq +ffffffff823a3430 t smu_v13_0_0_get_gpu_metrics +ffffffff823a3870 t smu_v13_0_0_enable_mgpu_fan_boost +ffffffff823a38c0 t smu_v13_0_0_smu_send_bad_mem_page_num +ffffffff823a3940 t smu_v13_0_0_get_ecc_info +ffffffff823a3a40 t smu_v13_0_0_send_bad_mem_channel_flag +ffffffff823a3ac0 t smu_v13_0_0_i2c_xfer +ffffffff823a3d60 t smu_v13_0_0_i2c_func +ffffffff823a4000 T smu_v13_0_4_set_ppt_funcs +ffffffff823a40c0 t smu_v13_0_4_print_clk_levels +ffffffff823a4130 t smu_v13_0_4_force_clk_levels +ffffffff823a43f0 t smu_v13_0_4_read_sensor +ffffffff823a46d0 t smu_v13_0_4_is_dpm_running +ffffffff823a4720 t smu_v13_0_4_set_watermarks_table +ffffffff823a48a0 t smu_v13_0_4_set_performance_level +ffffffff823a5450 t smu_v13_0_4_init_smc_tables +ffffffff823a55c0 t smu_v13_0_4_fini_smc_tables +ffffffff823a5670 t smu_v13_0_4_system_features_control +ffffffff823a56c0 t smu_v13_0_4_mode2_reset +ffffffff823a56e0 t smu_v13_0_4_get_dpm_ultimate_freq +ffffffff823a5b00 t smu_v13_0_4_get_gpu_metrics +ffffffff823a5cd0 t smu_v13_0_4_set_fine_grain_gfx_freq_parameters +ffffffff823a5d30 t smu_v13_0_4_get_current_clk_freq +ffffffff823a6000 T smu_v13_0_5_set_ppt_funcs +ffffffff823a60a0 t smu_v13_0_5_set_default_dpm_tables +ffffffff823a60d0 t smu_v13_0_5_print_clk_levels +ffffffff823a6160 t smu_v13_0_5_force_clk_levels +ffffffff823a62d0 t smu_v13_0_5_od_edit_dpm_table +ffffffff823a6580 t smu_v13_0_5_dpm_set_vcn_enable +ffffffff823a65a0 t smu_v13_0_5_dpm_set_jpeg_enable +ffffffff823a65c0 t smu_v13_0_5_read_sensor +ffffffff823a67e0 t smu_v13_0_5_is_dpm_running +ffffffff823a6830 t smu_v13_0_5_set_watermarks_table +ffffffff823a69b0 t smu_v13_0_5_set_performance_level +ffffffff823a6f50 t smu_v13_0_5_init_smc_tables +ffffffff823a70c0 t smu_v13_0_5_fini_smc_tables +ffffffff823a7170 t smu_v13_0_5_system_features_control +ffffffff823a71c0 t smu_v13_0_5_mode2_reset +ffffffff823a7240 t smu_v13_0_5_get_dpm_ultimate_freq +ffffffff823a7680 t smu_v13_0_5_get_gpu_metrics +ffffffff823a77d0 t smu_v13_0_5_set_fine_grain_gfx_freq_parameters +ffffffff823a8000 T smu_v13_0_6_set_ppt_funcs +ffffffff823a8050 t smu_v13_0_6_get_allowed_feature_mask +ffffffff823a80a0 t smu_v13_0_6_set_default_dpm_table +ffffffff823a85a0 t smu_v13_0_6_populate_umd_state_clk +ffffffff823a86a0 t smu_v13_0_6_print_clk_levels +ffffffff823a8a10 t smu_v13_0_6_force_clk_levels +ffffffff823a8bd0 t smu_v13_0_6_usr_edit_dpm_table +ffffffff823a8df0 t smu_v13_0_6_read_sensor +ffffffff823a9380 t smu_v13_0_6_is_dpm_running +ffffffff823a9400 t smu_v13_0_6_get_thermal_temperature_range +ffffffff823a9550 t smu_v13_0_6_set_performance_level +ffffffff823a9660 t smu_v13_0_6_get_power_limit +ffffffff823a9730 t smu_v13_0_6_set_df_cstate +ffffffff823a9750 t smu_v13_0_6_allow_xgmi_power_down +ffffffff823a9770 t smu_v13_0_6_i2c_control_init +ffffffff823a98a0 t smu_v13_0_6_i2c_control_fini +ffffffff823a98e0 t smu_v13_0_6_get_unique_id +ffffffff823a9960 t smu_v13_0_6_init_smc_tables +ffffffff823a9af0 t smu_v13_0_6_check_fw_status +ffffffff823a9b40 t smu_v13_0_6_setup_pptable +ffffffff823a9b70 t smu_v13_0_6_system_features_control +ffffffff823a9c10 t smu_v13_0_6_get_enabled_mask +ffffffff823a9c80 t smu_v13_0_6_set_power_limit +ffffffff823a9ca0 t smu_v13_0_6_register_irq_handler +ffffffff823a9d00 t smu_v13_0_6_is_baco_supported +ffffffff823a9d30 t smu_v13_0_6_is_mode1_reset_supported +ffffffff823a9d60 t smu_v13_0_6_is_mode2_reset_supported +ffffffff823a9d90 t smu_v13_0_6_mode1_reset +ffffffff823a9e40 t smu_v13_0_6_mode2_reset +ffffffff823aa0f0 t smu_v13_0_6_get_dpm_ultimate_freq +ffffffff823aa300 t smu_v13_0_6_set_soft_freq_limited_range +ffffffff823aa530 t smu_v13_0_6_log_thermal_throttling_event +ffffffff823aa820 t smu_v13_0_6_get_gpu_metrics +ffffffff823aab70 t smu_v13_0_6_smu_send_hbm_bad_page_num +ffffffff823aabf0 t smu_v13_0_6_get_smu_metrics_data +ffffffff823aae80 t smu_v13_0_6_upload_dpm_level +ffffffff823aaf80 t smu_v13_0_6_i2c_xfer +ffffffff823ab280 t smu_v13_0_6_i2c_func +ffffffff823ab2b0 t smu_v13_0_6_set_irq_state +ffffffff823ab540 t smu_v13_0_6_irq_process +ffffffff823ac000 T smu_v13_0_7_set_ppt_funcs +ffffffff823ac060 t smu_v13_0_7_get_allowed_feature_mask +ffffffff823ac1d0 t smu_v13_0_7_set_default_dpm_table +ffffffff823ac5f0 t smu_v13_0_7_populate_umd_state_clk +ffffffff823ac730 t smu_v13_0_7_print_clk_levels +ffffffff823ac840 t smu_v13_0_7_force_clk_levels +ffffffff823ac9c0 t smu_v13_0_7_od_edit_dpm_table +ffffffff823ace90 t smu_v13_0_7_restore_user_od_settings +ffffffff823acf50 t smu_v13_0_7_get_power_profile_mode +ffffffff823ad090 t smu_v13_0_7_set_power_profile_mode +ffffffff823ad2d0 t smu_v13_0_7_read_sensor +ffffffff823ad4e0 t smu_v13_0_7_is_dpm_running +ffffffff823ad530 t smu_v13_0_7_get_fan_speed_pwm +ffffffff823ad610 t smu_v13_0_7_get_fan_speed_rpm +ffffffff823ad680 t smu_v13_0_7_get_thermal_temperature_range +ffffffff823ad780 t smu_v13_0_7_set_default_od_settings +ffffffff823ad8b0 t smu_v13_0_7_dump_pptable +ffffffff823ad8e0 t smu_v13_0_7_get_power_limit +ffffffff823ad9c0 t smu_v13_0_7_set_df_cstate +ffffffff823ad9e0 t smu_v13_0_7_init_smc_tables +ffffffff823adbd0 t smu_v13_0_7_check_fw_status +ffffffff823adc20 t smu_v13_0_7_set_mp1_state +ffffffff823adc60 t smu_v13_0_7_setup_pptable +ffffffff823addc0 t smu_v13_0_7_baco_enter +ffffffff823ade20 t smu_v13_0_7_baco_exit +ffffffff823ade80 t smu_v13_0_7_is_mode1_reset_supported +ffffffff823adec0 t smu_v13_0_7_get_dpm_ultimate_freq +ffffffff823adfe0 t smu_v13_0_7_get_gpu_metrics +ffffffff823ae410 t smu_v13_0_7_enable_mgpu_fan_boost +ffffffff823af000 T yellow_carp_set_ppt_funcs +ffffffff823af050 t yellow_carp_set_default_dpm_tables +ffffffff823af080 t yellow_carp_print_clk_levels +ffffffff823af100 t yellow_carp_force_clk_levels +ffffffff823af3c0 t yellow_carp_od_edit_dpm_table +ffffffff823af670 t yellow_carp_dpm_set_vcn_enable +ffffffff823af690 t yellow_carp_dpm_set_jpeg_enable +ffffffff823af6b0 t yellow_carp_read_sensor +ffffffff823afa20 t yellow_carp_is_dpm_running +ffffffff823afa70 t yellow_carp_set_watermarks_table +ffffffff823afbf0 t yellow_carp_set_performance_level +ffffffff823b0680 t yellow_carp_init_smc_tables +ffffffff823b07f0 t yellow_carp_fini_smc_tables +ffffffff823b08a0 t yellow_carp_system_features_control +ffffffff823b08f0 t yellow_carp_get_gfxoff_status +ffffffff823b0980 t yellow_carp_mode2_reset +ffffffff823b0a00 t yellow_carp_get_dpm_ultimate_freq +ffffffff823b0e40 t yellow_carp_get_gpu_metrics +ffffffff823b0ff0 t yellow_carp_post_smu_init +ffffffff823b1070 t yellow_carp_set_fine_grain_gfx_freq_parameters +ffffffff823b10d0 t yellow_carp_get_current_clk_freq +ffffffff823b11d0 t yellow_carp_get_dpm_profile_freq +ffffffff823b2000 T smu_cmn_send_msg_without_waiting +ffffffff823b2170 T smu_cmn_wait_for_response +ffffffff823b22a0 T smu_cmn_send_smc_msg_with_param +ffffffff823b25b0 T smu_cmn_to_asic_specific_index +ffffffff823b26e0 t __smu_cmn_reg_print_error +ffffffff823b2920 T smu_cmn_send_smc_msg +ffffffff823b2940 T smu_cmn_send_debug_smc_msg +ffffffff823b29c0 T smu_cmn_send_debug_smc_msg_with_param +ffffffff823b2a40 T smu_cmn_feature_is_supported +ffffffff823b2af0 T smu_cmn_feature_is_enabled +ffffffff823b2be0 T smu_cmn_clk_dpm_is_enabled +ffffffff823b2ce0 T smu_cmn_get_enabled_mask +ffffffff823b2dd0 T smu_cmn_get_indep_throttler_status +ffffffff823b2e80 T smu_cmn_feature_update_enable_state +ffffffff823b2f20 T smu_cmn_feature_set_enabled +ffffffff823b2ff0 T smu_cmn_get_pp_feature_mask +ffffffff823b31a0 T smu_cmn_set_pp_feature_mask +ffffffff823b32a0 T smu_cmn_disable_all_features_with_exception +ffffffff823b3350 T smu_cmn_get_smc_version +ffffffff823b3420 T smu_cmn_update_table +ffffffff823b3580 T smu_cmn_write_watermarks_table +ffffffff823b3650 T smu_cmn_write_pptable +ffffffff823b3710 T smu_cmn_get_metrics_table +ffffffff823b3870 T smu_cmn_get_combo_pptable +ffffffff823b3940 T smu_cmn_init_soft_gpu_metrics +ffffffff823b3a30 T smu_cmn_set_mp1_state +ffffffff823b3ad0 T smu_cmn_is_audio_func_enabled +ffffffff823b4000 T pci_mcfg_init +ffffffff823b4050 T pci_lookup_segment +ffffffff823b40b0 T pci_attach_hook +ffffffff823b40e0 T pci_bus_maxdevs +ffffffff823b4110 T pci_make_tag +ffffffff823b4180 T pci_decompose_tag +ffffffff823b41e0 T pci_conf_size +ffffffff823b4240 T pci_mcfg_map_bus +ffffffff823b42c0 T pci_conf_read +ffffffff823b4410 T pci_conf_write +ffffffff823b4550 T pci_msix_table_map +ffffffff823b4680 T pci_msix_table_unmap +ffffffff823b4720 T msi_hwmask +ffffffff823b4750 T msi_hwunmask +ffffffff823b4780 T msi_addroute +ffffffff823b4880 T msi_delroute +ffffffff823b48f0 T pci_intr_map_msi +ffffffff823b4970 T msix_hwmask +ffffffff823b49a0 T msix_hwunmask +ffffffff823b49d0 T msix_addroute +ffffffff823b4bc0 T msix_delroute +ffffffff823b4d20 T pci_intr_map_msix +ffffffff823b4df0 T pci_intr_map +ffffffff823b5020 T pci_intr_string +ffffffff823b5100 T pci_intr_establish +ffffffff823b5150 T pci_intr_establish_cpu +ffffffff823b52a0 T pci_intr_disestablish +ffffffff823b52c0 T pci_init_extents +ffffffff823b54a0 T pci_probe_device_hook +ffffffff823b54e0 T pci_dev_postattach +ffffffff823b54f0 T pci_min_powerstate +ffffffff823b5500 T pci_set_powerstate_md +ffffffff823b6000 T pciide_machdep_compat_intr_establish +ffffffff823b6060 T pciide_machdep_compat_intr_disestablish +ffffffff823b7000 T vga_post_init +ffffffff823b7310 t vm86_emu_inb +ffffffff823b7360 t vm86_emu_inw +ffffffff823b73a0 t vm86_emu_inl +ffffffff823b73e0 t vm86_emu_outb +ffffffff823b7430 t vm86_emu_outw +ffffffff823b7470 t vm86_emu_outl +ffffffff823b74b0 T vga_post_call +ffffffff823b7520 T vga_post_free +ffffffff823b7590 T ddb_vgapost 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com_cardbus_attach +ffffffff823c1220 T com_cardbus_detach +ffffffff823c12c0 T com_cardbus_find_csdev +ffffffff823c1440 T com_cardbus_gofigure +ffffffff823c1900 T com_cardbus_enable +ffffffff823c19d0 T com_cardbus_disable +ffffffff823c1a20 T com_cardbus_setup +ffffffff823c2000 T xl_cardbus_match +ffffffff823c2080 T xl_cardbus_attach +ffffffff823c23f0 T xl_cardbus_detach +ffffffff823c24b0 T xl_cardbus_lookup +ffffffff823c2560 T xl_cardbus_intr_ack +ffffffff823c3000 T dc_cardbus_match +ffffffff823c3030 T dc_cardbus_attach +ffffffff823c33e0 T dc_cardbus_detach +ffffffff823c3480 T dc_cardbus_setup +ffffffff823c4000 T fxp_cardbus_match +ffffffff823c4030 T fxp_cardbus_attach +ffffffff823c4240 T fxp_cardbus_detach +ffffffff823c42d0 T fxp_cardbus_setup +ffffffff823c5000 t rl_cardbus_match +ffffffff823c5030 t rl_cardbus_attach +ffffffff823c51d0 t rl_cardbus_detach +ffffffff823c5290 T rl_cardbus_setup +ffffffff823c6000 T re_cardbus_probe +ffffffff823c6030 T re_cardbus_attach +ffffffff823c6230 T re_cardbus_detach +ffffffff823c6310 T re_cardbus_setup +ffffffff823c7000 T ath_cardbus_match +ffffffff823c7050 T ath_cardbus_attach +ffffffff823c7180 T ath_cardbus_detach +ffffffff823c7250 T ath_cardbus_enable +ffffffff823c7320 T ath_cardbus_disable +ffffffff823c7370 T ath_cardbus_power +ffffffff823c73b0 T ath_cardbus_setup +ffffffff823c8000 T athn_cardbus_match +ffffffff823c8030 T athn_cardbus_attach +ffffffff823c8170 T athn_cardbus_detach +ffffffff823c8210 T athn_cardbus_enable +ffffffff823c82e0 T athn_cardbus_disable +ffffffff823c8330 T athn_cardbus_power +ffffffff823c8370 T athn_cardbus_read +ffffffff823c83a0 T athn_cardbus_write +ffffffff823c83d0 T athn_cardbus_write_barrier +ffffffff823c8400 T athn_cardbus_setup +ffffffff823c9000 T atw_cardbus_match +ffffffff823c9030 T atw_cardbus_attach +ffffffff823c9220 T atw_cardbus_detach +ffffffff823c92e0 T atw_cardbus_enable +ffffffff823c93b0 T atw_cardbus_disable +ffffffff823c9400 T atw_cardbus_power +ffffffff823c9440 T atw_cardbus_setup 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pgt_cardbus_attach +ffffffff823cd230 T pgt_cardbus_detach +ffffffff823cd2e0 T pgt_cardbus_enable +ffffffff823cd440 T pgt_cardbus_disable +ffffffff823cd490 T pgt_cardbus_power +ffffffff823cd4f0 T pgt_cardbus_setup +ffffffff823ce000 T ehci_cardbus_match +ffffffff823ce040 T ehci_cardbus_attach +ffffffff823ce2e0 T ehci_cardbus_detach +ffffffff823cf000 T ohci_cardbus_match +ffffffff823cf040 T ohci_cardbus_attach +ffffffff823cf2e0 T ohci_cardbus_detach +ffffffff823d0000 T uhci_cardbus_match +ffffffff823d0040 T uhci_cardbus_attach +ffffffff823d0340 T uhci_cardbus_detach +ffffffff823d1000 T malo_cardbus_match +ffffffff823d1030 T malo_cardbus_attach +ffffffff823d1270 T malo_cardbus_detach +ffffffff823d1340 T malo_cardbus_enable +ffffffff823d14b0 T malo_cardbus_disable +ffffffff823d1500 T malo_cardbus_setup +ffffffff823d2000 T bwi_cardbus_match +ffffffff823d2030 T bwi_cardbus_attach +ffffffff823d22a0 T bwi_cardbus_detach +ffffffff823d2350 T bwi_cardbus_enable +ffffffff823d24b0 T bwi_cardbus_disable +ffffffff823d2500 T bwi_cardbus_setup +ffffffff823d25a0 T bwi_cardbus_conf_read +ffffffff823d25d0 T bwi_cardbus_conf_write +ffffffff823d3000 T rbus_pccbb_parent_mem +ffffffff823d3060 T rbus_pccbb_parent_io +ffffffff823d30d0 T pccbb_attach_hook +ffffffff823d4000 T pcmcia_match +ffffffff823d4050 T pcmcia_attach +ffffffff823d40d0 T pcmcia_activate +ffffffff823d4180 T pcmcia_ccr_read +ffffffff823d41d0 T pcmcia_ccr_write +ffffffff823d4240 T pcmcia_card_attach +ffffffff823d4430 T pcmcia_print +ffffffff823d4690 T pcmcia_submatch +ffffffff823d46e0 T pcmcia_card_detach +ffffffff823d4790 T pcmcia_card_deactivate +ffffffff823d4800 T pcmcia_card_gettype +ffffffff823d4860 T pcmcia_function_init +ffffffff823d48b0 T pcmcia_function_enable +ffffffff823d4ce0 T pcmcia_function_disable +ffffffff823d4e00 T pcmcia_io_map +ffffffff823d5040 T pcmcia_intr_establish +ffffffff823d52b0 T pcmcia_card_intr +ffffffff823d53d0 T pcmcia_intr_disestablish +ffffffff823d55f0 T pcmcia_intr_string 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com_pcmcia_detach +ffffffff823de5a0 T com_pcmcia_activate +ffffffff823de660 T com_pcmcia_enable1 +ffffffff823de710 T com_pcmcia_enable +ffffffff823de800 T com_pcmcia_disable +ffffffff823de840 T com_pcmcia_disable1 +ffffffff823df000 t wdc_pcmcia_match +ffffffff823df0d0 t wdc_pcmcia_attach +ffffffff823df540 T wdc_pcmcia_detach +ffffffff823df640 T wdc_pcmcia_activate +ffffffff823df760 T wdc_pcmcia_disk_device_interface_callback +ffffffff823df800 T wdc_pcmcia_disk_device_interface +ffffffff823df860 T wdc_pcmcia_lookup +ffffffff823e0000 T sm_pcmcia_match +ffffffff823e0100 T sm_pcmcia_attach +ffffffff823e0320 T sm_pcmcia_detach +ffffffff823e03c0 T sm_pcmcia_activate +ffffffff823e0450 T sm_pcmcia_funce_enaddr +ffffffff823e0470 T sm_pcmcia_ascii_enaddr +ffffffff823e0570 T sm_pcmcia_lannid_ciscallback +ffffffff823e0680 T sm_pcmcia_enable +ffffffff823e0720 T sm_pcmcia_disable +ffffffff823e1000 T xe_pcmcia_match +ffffffff823e1050 T xe_pcmcia_attach +ffffffff823e15e0 T xe_pcmcia_detach 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cmalo_cmd_set_snmp +ffffffff823e90e0 T cmalo_cmd_set_macaddr +ffffffff823e9240 T cmalo_wep +ffffffff823e92f0 T cmalo_cmd_set_reset +ffffffff823e93f0 T cmalo_select_network +ffffffff823e9530 T cmalo_cmd_set_auth +ffffffff823e95f0 T cmalo_cmd_set_assoc +ffffffff823e9950 T cmalo_reflect_network +ffffffff823e9a40 T cmalo_tx_done +ffffffff823e9b00 T cmalo_rx +ffffffff823e9d00 T cmalo_cmd_response +ffffffff823e9f30 T cmalo_event +ffffffff823e9fa0 T cmalo_tx +ffffffff823ea180 T cmalo_cmd_set_wep +ffffffff823ea3d0 T cmalo_rate2bitmap +ffffffff823ea410 T cmalo_hexdump +ffffffff823ea440 T cmalo_cmd_request +ffffffff823ea5a0 T cmalo_cmd_rsp_hwspec +ffffffff823ea610 T cmalo_cmd_rsp_scan +ffffffff823ea820 T cmalo_parse_elements +ffffffff823ea920 T cmalo_cmd_rsp_assoc +ffffffff823ea960 T cmalo_cmd_set_80211d +ffffffff823eaa50 T cmalo_cmd_set_bgscan_config +ffffffff823eabb0 T cmalo_cmd_set_bgscan_query +ffffffff823eb000 T an_pcmcia_match +ffffffff823eb060 T an_pcmcia_attach +ffffffff823eb250 T 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uguru_refresh +ffffffff8240a170 T uguru_write_multi +ffffffff8240b000 T aps_match +ffffffff8240b100 T aps_attach +ffffffff8240b3c0 T aps_activate +ffffffff8240b460 T aps_do_io +ffffffff8240b610 T aps_init +ffffffff8240b760 T aps_refresh +ffffffff8240b790 T aps_read_data +ffffffff8240b870 T aps_refresh_sensor_data +ffffffff8240c000 T _isa_bus_dmamap_create +ffffffff8240c150 T _isa_bus_dmamap_destroy +ffffffff8240c210 T _isa_bus_dmamap_load +ffffffff8240c4a0 T _isa_bus_dmamap_load_mbuf +ffffffff8240c4c0 T _isa_bus_dmamap_load_uio +ffffffff8240c4e0 T _isa_bus_dmamap_load_raw +ffffffff8240c500 T _isa_bus_dmamap_unload +ffffffff8240c5c0 T _isa_bus_dmamap_sync +ffffffff8240c6c0 T _isa_bus_dmamem_alloc +ffffffff8240c770 T isa_intr_alloc +ffffffff8240c850 T isa_intr_check +ffffffff8240c8c0 T isa_intr_establish +ffffffff8240c990 T isa_intr_disestablish +ffffffff8240c9b0 T isa_attach_hook +ffffffff8240ca10 T _isa_dma_alloc_bouncebuf +ffffffff8240caf0 T _isa_dma_free_bouncebuf +ffffffff8240cba0 T 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wsmouse_get_params +ffffffff8241b4a0 T wsmousekqfilter +ffffffff8241b500 T wsmouse_add_mux +ffffffff8241b580 T wsmouse_buttons +ffffffff8241b5c0 T wsmouse_motion +ffffffff8241b620 T wsmouse_position +ffffffff8241b720 T wsmouse_touch +ffffffff8241b7c0 T wsmouse_mtstate +ffffffff8241b9a0 T wsmouse_set +ffffffff8241bc70 T wsmouse_touch_update +ffffffff8241bd10 T wsmouse_mt_update +ffffffff8241bd50 T wsmouse_hysteresis +ffffffff8241bda0 T wsmouse_ptr_ctrl +ffffffff8241bef0 T wsmouse_mt_convert +ffffffff8241c040 T wsmouse_evq_put +ffffffff8241c0e0 T wsmouse_btn_sync +ffffffff8241c1e0 T wsmouse_motion_sync +ffffffff8241c7d0 T wsmouse_touch_sync +ffffffff8241c9b0 T wsmouse_log_input +ffffffff8241cb70 T wsmouse_log_events +ffffffff8241ccb0 T wsmouse_input_sync +ffffffff8241d2b0 T wsmouse_id_to_slot +ffffffff8241d390 T wsmouse_matching +ffffffff8241d7c0 T wsmouse_mtframe +ffffffff8241db90 T wsmouse_mt_init +ffffffff8241dd00 T wsmouse_set_mode +ffffffff8241dd60 T wsmouse_get_hw +ffffffff8241dd90 T wsmouse_configure +ffffffff8241e000 T wstpad_set_direction +ffffffff8241e180 T wstpad_is_stable +ffffffff8241e260 T wstpad_scroll_coords +ffffffff8241e350 T wstpad_scroll +ffffffff8241e4e0 T wstpad_f2scroll +ffffffff8241e790 T wstpad_edgescroll +ffffffff8241e900 T wstpad_get_sbtn +ffffffff8241ea80 T wstpad_mtbtn_contacts +ffffffff8241ebb0 T wstpad_get_mtbtn +ffffffff8241ec00 T wstpad_softbuttons +ffffffff8241ecd0 T wstpad_is_tap +ffffffff8241ed50 T wstpad_tap_filter +ffffffff8241edf0 T wstpad_tap_touch +ffffffff8241f020 T wstpad_tap_button +ffffffff8241f070 T wstpad_tap +ffffffff8241f4a0 T wstpad_tap_sync +ffffffff8241f500 T wstpad_tap_timeout +ffffffff8241f730 T wstpad_click +ffffffff8241f7d0 T wstpad_cmds +ffffffff8241fa40 T wstpad_mt_inputs +ffffffff8241fdb0 T wstpad_mt_masks +ffffffff82420130 T wstpad_touch_inputs +ffffffff82420340 T wstpad_process_input +ffffffff82420650 T wstpad_track_interval +ffffffff824207b0 T wstpad_init_deceleration +ffffffff82420880 T wstpad_decelerate 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wsmux_attach_sc +ffffffff82423660 T wsmux_set_display +ffffffff82423790 T wsmux_get_layout +ffffffff824237c0 T wsmux_set_layout +ffffffff82424000 T wsemul_pick +ffffffff82424070 T wsemul_getname +ffffffff82425000 T wsemul_getchar +ffffffff824251d0 T wsemul_local_translate +ffffffff824254b0 T wsemul_utf8_translate +ffffffff82426000 T wsemul_vt100_cnattach +ffffffff82426200 T wsemul_vt100_attach +ffffffff824264d0 T wsemul_vt100_output +ffffffff824267e0 T wsemul_vt100_detach +ffffffff82426910 T wsemul_vt100_resetop +ffffffff82426ac0 T wsemul_vt100_output_esc +ffffffff82427140 T wsemul_vt100_output_csi +ffffffff82427280 T wsemul_vt100_output_scs94 +ffffffff82427340 T wsemul_vt100_output_scs94_percent +ffffffff82427390 T wsemul_vt100_output_scs96 +ffffffff824274e0 T wsemul_vt100_output_scs96_percent +ffffffff82427530 T wsemul_vt100_output_esc_hash +ffffffff82427860 T wsemul_vt100_output_esc_spc +ffffffff82427890 T wsemul_vt100_output_string +ffffffff82427900 T wsemul_vt100_output_string_esc +ffffffff82427950 T wsemul_vt100_output_dcs +ffffffff82427a00 T wsemul_vt100_output_dcs_dollar +ffffffff82427a60 T wsemul_vt100_output_esc_percent +ffffffff82427ac0 T wsemul_vt100_init +ffffffff82427b20 T wsemul_vt100_reset +ffffffff82427c40 T wsemul_vt100_nextline +ffffffff82427cd0 T wsemul_vt100_output_normal +ffffffff82427f10 T wsemul_vt100_output_c0c1 +ffffffff82428190 T wsemul_vt100_jump_scroll +ffffffff82429000 T wsemul_vt100_scrollup +ffffffff82429150 T wsemul_vt100_scrolldown +ffffffff82429290 T wsemul_vt100_ed +ffffffff824294f0 T wsemul_vt100_el +ffffffff824295e0 T wsemul_vt100_handle_csi +ffffffff8242a570 T vt100_ansimode +ffffffff8242a5f0 T vt100_decmode +ffffffff8242a720 T vt100_selectattribute +ffffffff8242a860 T wsemul_vt100_handle_dcs +ffffffff8242b000 T vt100_initchartables +ffffffff8242b120 T vt100_setnrc +ffffffff8242c000 T wsemul_vt100_translate +ffffffff8242d000 T pckbdprobe +ffffffff8242d140 T pckbdattach +ffffffff8242d320 T pckbdactivate +ffffffff8242d3b0 T pckbd_enable +ffffffff8242d500 T pckbd_set_leds +ffffffff8242d590 T pckbd_ioctl +ffffffff8242d6e0 T pckbd_cngetc +ffffffff8242d8c0 T pckbd_cnpollc +ffffffff8242d960 T pckbd_cnbell +ffffffff8242d9b0 T pckbd_set_xtscancode +ffffffff8242db30 T pckbd_init +ffffffff8242db90 T pckbd_input +ffffffff8242de00 T pckbd_scancode_translate +ffffffff8242dee0 T pckbd_bell +ffffffff8242df30 T pckbd_hookup_bell +ffffffff8242df70 T pckbd_cnattach +ffffffff8242f000 T pmsprobe +ffffffff8242f0b0 T pmsattach +ffffffff8242f290 T pmsactivate +ffffffff8242f2f0 T pms_enable +ffffffff8242f360 T pms_ioctl +ffffffff8242f3b0 T pms_disable +ffffffff8242f3f0 T pms_sec_enable +ffffffff8242f460 T pms_sec_ioctl +ffffffff8242f4b0 T pms_sec_disable +ffffffff8242f4f0 T pms_ioctl_mouse +ffffffff8242f610 T pms_sync_mouse +ffffffff8242f670 T pms_proc_mouse +ffffffff8242f710 T pms_enable_synaptics +ffffffff8242fb40 T pms_ioctl_synaptics +ffffffff8242fc10 T pms_sync_synaptics +ffffffff8242fc70 T pms_proc_synaptics +ffffffff8242fff0 T pms_disable_synaptics +ffffffff824300d0 T pms_enable_alps +ffffffff824305f0 T pms_ioctl_alps +ffffffff824306a0 T pms_sync_alps +ffffffff82430750 T pms_proc_alps +ffffffff824309a0 T pms_enable_elantech_v1 +ffffffff82430bb0 T pms_ioctl_elantech +ffffffff82430c70 T pms_sync_elantech_v1 +ffffffff82430d50 T pms_proc_elantech_v1 +ffffffff82430ec0 T pms_enable_elantech_v2 +ffffffff82431060 T pms_sync_elantech_v2 +ffffffff82431150 T pms_proc_elantech_v2 +ffffffff824312c0 T pms_enable_elantech_v3 +ffffffff82431460 T pms_sync_elantech_v3 +ffffffff824314f0 T pms_proc_elantech_v3 +ffffffff824316e0 T pms_enable_elantech_v4 +ffffffff824318e0 T pms_sync_elantech_v4 +ffffffff824319b0 T pms_proc_elantech_v4 +ffffffff82431d00 T pms_enable_intelli +ffffffff82431ef0 T pms_cmd +ffffffff82431f60 T pms_spec_cmd +ffffffff824321f0 T pms_set_scaling +ffffffff82432280 T pms_set_resolution +ffffffff82432310 T pms_get_devid +ffffffff824323a0 T pms_get_status +ffffffff82432430 T pms_set_rate +ffffffff824324c0 T pms_reset +ffffffff82432550 T pms_dev_enable +ffffffff82432610 T pms_dev_disable +ffffffff824326d0 T pms_protocol_lookup +ffffffff824327d0 T pms_reset_detect +ffffffff82432850 T pms_reset_timo +ffffffff824328a0 T pms_reset_task +ffffffff82432960 T pms_change_state +ffffffff82432cf0 T pmsinput +ffffffff82432e90 T synaptics_set_mode +ffffffff82432f90 T synaptics_query +ffffffff82433080 T synaptics_get_hwinfo +ffffffff82433560 T synaptics_sec_proc +ffffffff82433630 T synaptics_knock +ffffffff82433890 T alps_sec_proc +ffffffff824339b0 T alps_get_hwinfo +ffffffff82433e20 T elantech_set_absolute_mode_v1 +ffffffff824340e0 T elantech_set_absolute_mode_v2 +ffffffff82434600 T elantech_ps2_cmd +ffffffff82434690 T elantech_set_absolute_mode_v3 +ffffffff82434b00 T elantech_set_absolute_mode_v4 +ffffffff82434d30 T elantech_get_hwinfo_v1 +ffffffff82434f30 T elantech_get_hwinfo_v2 +ffffffff82435240 T elantech_get_hwinfo_v3 +ffffffff82435450 T elantech_get_hwinfo_v4 +ffffffff824356c0 T elantech_knock +ffffffff82436000 T wscnprobe +ffffffff824360a0 T wscninit +ffffffff82436150 T wscn_video_init +ffffffff824361c0 T wscn_input_init +ffffffff82436230 T wscnputc +ffffffff82436240 T wscngetc +ffffffff82436250 T wscnpollc +ffffffff82437000 T skgpio_match +ffffffff82437100 T skgpio_attach +ffffffff82437350 T skgpio_gpio_read +ffffffff824373a0 T skgpio_gpio_write +ffffffff82437410 T skgpio_gpio_ctl +ffffffff824374a0 T skgpio_led_read +ffffffff824374f0 T skgpio_led_write +ffffffff82437520 T skgpio_led_ctl +ffffffff82438000 T pctrattach +ffffffff82438080 T pctropen +ffffffff824380d0 T pctrclose +ffffffff82438100 T pctrioctl +ffffffff824383d0 T pctr_reload +ffffffff82438510 T pctr_resume +ffffffff82439000 T nvramattach +ffffffff824390a0 T nvram_csum_valid +ffffffff82439130 T nvramopen +ffffffff82439180 T nvramclose +ffffffff824391b0 T nvramread +ffffffff824392d0 T nvram_get_byte +ffffffff8243a000 T hid_start_parse +ffffffff8243a070 T hid_end_parse +ffffffff8243a0b0 T hid_get_item +ffffffff8243ac60 T hid_report_size +ffffffff8243adb0 T hid_locate +ffffffff8243af20 T hid_get_data_sub +ffffffff8243b040 T hid_get_data +ffffffff8243b150 T hid_get_udata +ffffffff8243b260 T hid_is_collection +ffffffff8243b370 T hid_get_collection_data +ffffffff8243b440 T hid_get_id_of_collection +ffffffff8243c000 T hidkbd_attach +ffffffff8243c0f0 T hidkbd_parse_desc +ffffffff8243c430 T hidkbd_delayed_decode +ffffffff8243c450 T hidkbd_attach_wskbd +ffffffff8243c4e0 T hidkbd_detach +ffffffff8243c580 T hidkbd_translate +ffffffff8243c5d0 T hidkbd_apple_translate +ffffffff8243c680 T hidkbd_apple_munge +ffffffff8243c870 T hidkbd_apple_tb_munge +ffffffff8243c940 T hidkbd_apple_iso_munge +ffffffff8243ca30 T hidkbd_apple_mba_munge +ffffffff8243cb90 T hidkbd_apple_iso_mba_munge +ffffffff8243cdd0 T hidkbd_input +ffffffff8243cef0 T hidkbd_decode +ffffffff8243d280 T hidkbd_enable +ffffffff8243d2c0 T hidkbd_set_leds +ffffffff8243d3a0 T hidkbd_ioctl +ffffffff8243d440 T hidkbd_bell +ffffffff8243d490 T hidkbd_cngetc +ffffffff8243d520 T hidkbd_hookup_bell +ffffffff8243e000 T hidms_stylus_hid_parse +ffffffff8243e320 T hidms_pad_buttons_hid_parse +ffffffff8243e400 T hidms_wacom_setup +ffffffff8243e710 T hidms_setup +ffffffff8243ecb0 T hidms_attach +ffffffff8243ee00 T hidms_detach +ffffffff8243ee40 T hidms_input +ffffffff8243f0f0 T hidms_enable +ffffffff8243f140 T hidms_ioctl +ffffffff8243f310 T hidms_disable +ffffffff82440000 T hidmt_get_resolution +ffffffff82440110 T hidmt_setup +ffffffff824407b0 T hidmt_set_input_mode +ffffffff82440840 T hidmt_configure +ffffffff824408e0 T hidmt_attach +ffffffff824409f0 T hidmt_detach +ffffffff82440a30 T hidmt_input +ffffffff82440f10 T hidmt_enable +ffffffff82440f50 T hidmt_ioctl +ffffffff82441020 T hidmt_disable +ffffffff82442000 T hidcc_match +ffffffff824420e0 T hidcc_attach +ffffffff82442280 T hidcc_parse +ffffffff82442640 T hidcc_attach_wskbd +ffffffff824426f0 T hidcc_detach +ffffffff824427a0 T hidcc_intr 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usb_add_task +ffffffff82444c80 T usb_rem_task +ffffffff82444d40 T usb_rem_wait_task +ffffffff82444e50 T usbctlprint +ffffffff82444ea0 T usbopen +ffffffff82444f10 T usbclose +ffffffff82444f40 T usb_fill_udc_task +ffffffff82444fe0 T usb_fill_udf_task +ffffffff82445050 T usbioctl +ffffffff824456b0 T usb_needs_reattach +ffffffff82445700 T usb_schedsoftintr +ffffffff824457d0 T usb_tap +ffffffff82446000 T usbd_is_dying +ffffffff82446040 T usbd_deactivate +ffffffff82446070 T usbd_ref_incr +ffffffff824460a0 T usbd_ref_decr +ffffffff824460e0 T usbd_ref_wait +ffffffff82446160 T usbd_get_devcnt +ffffffff82446190 T usbd_claim_iface +ffffffff824461d0 T usbd_iface_claimed +ffffffff82446210 T usbd_open_pipe +ffffffff824462f0 T usbd_open_pipe_ival +ffffffff824463e0 T usbd_open_pipe_intr +ffffffff82446630 T usbd_alloc_xfer +ffffffff824466b0 T usbd_setup_xfer +ffffffff82446720 T usbd_transfer +ffffffff824469b0 T usbd_free_xfer +ffffffff82446a30 T usbd_close_pipe +ffffffff82446ba0 T usbd_abort_pipe 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+ffffffff82447b80 T usbd_request_async_cb +ffffffff82447c00 T usbd_get_quirks +ffffffff82447c50 T usbd_set_polling +ffffffff82447cb0 T usbd_get_endpoint_descriptor +ffffffff82447d10 T usbd_ratecheck +ffffffff82447d30 T usbd_match_device +ffffffff82447da0 T usbd_desc_iter_init +ffffffff82447e00 T usbd_desc_iter_next +ffffffff82447e80 T usbd_str +ffffffff82448000 T usbd_get_desc +ffffffff82448070 T usbd_get_device_status +ffffffff824480c0 T usbd_get_hub_descriptor +ffffffff82448130 T usbd_get_hub_ss_descriptor +ffffffff824481a0 T usbd_get_port_status +ffffffff824481f0 T usbd_set_hub_depth +ffffffff82448240 T usbd_clear_port_feature +ffffffff82448290 T usbd_clear_endpoint_feature +ffffffff824482e0 T usbd_set_port_feature +ffffffff82448330 T usbd_set_idle +ffffffff82448390 T usbd_get_report_descriptor +ffffffff824483e0 T usbd_get_hid_descriptor +ffffffff82448460 T usbd_get_config +ffffffff824484b0 T usb_detach_wait +ffffffff82448530 T usb_detach_wakeup +ffffffff82449000 T usb_block_allocmem +ffffffff82449250 T usb_block_freemem +ffffffff824492b0 T usb_allocmem +ffffffff82449500 T usb_freemem +ffffffff824495c0 T usb_syncmem +ffffffff8244a000 T usbd_errstr +ffffffff8244a070 T usbd_get_string_desc +ffffffff8244a130 T usbd_get_string +ffffffff8244a330 T usbd_cache_devinfo +ffffffff8244a670 T usbd_printBCD +ffffffff8244a6f0 T usbd_devinfo +ffffffff8244a880 T usb_delay_ms +ffffffff8244a8e0 T usbd_delay_ms +ffffffff8244a9a0 T usbd_port_disown_to_1_1 +ffffffff8244aac0 T usbd_reset_port +ffffffff8244ac80 T usbd_find_idesc +ffffffff8244ad30 T usbd_find_edesc +ffffffff8244ae50 T usbd_fill_iface_data +ffffffff8244b0c0 T usbd_parse_idesc +ffffffff8244b1f0 T usbd_free_iface_data +ffffffff8244b260 T usbd_set_config +ffffffff8244b2b0 T usbd_set_config_no +ffffffff8244b360 T usbd_set_config_index +ffffffff8244b840 T usbd_setup_pipe +ffffffff8244b930 T usbd_set_address +ffffffff8244b9f0 T usbd_getnewaddr +ffffffff8244ba70 T usbd_probe_and_attach +ffffffff8244bfd0 T usbd_print +ffffffff8244c0e0 T usbd_new_device +ffffffff8244c8b0 T usbd_reload_device_desc +ffffffff8244c920 T usb_free_device +ffffffff8244ca70 T usbd_fill_deviceinfo +ffffffff8244ce10 T usbd_get_routestring +ffffffff8244cea0 T usbd_get_location +ffffffff8244cfb0 T usbd_get_cdesc +ffffffff8244d0e0 T usbd_detach +ffffffff8244e000 T usbd_find_quirk +ffffffff8244f000 T uhub_match +ffffffff8244f060 T uhub_attach +ffffffff8244f510 T uhub_detach +ffffffff8244f640 T uhub_explore +ffffffff8244f8e0 T uhub_intr +ffffffff8244fa40 T uhub_port_connect +ffffffff82450000 T uaudio_match +ffffffff82450070 T uaudio_attach +ffffffff824501d0 T uaudio_detach +ffffffff82450380 T uaudio_open +ffffffff82450480 T uaudio_close +ffffffff824504a0 T uaudio_set_params +ffffffff824509d0 T uaudio_halt_output +ffffffff82450a20 T uaudio_halt_input +ffffffff82450a70 T uaudio_set_port +ffffffff82450ad0 T uaudio_get_port +ffffffff82450b30 T uaudio_query_devinfo +ffffffff82450b90 T uaudio_trigger_output +ffffffff82450c10 T uaudio_trigger_input +ffffffff82450c90 T uaudio_copy_output +ffffffff82450ce0 T uaudio_underrun +ffffffff82450d00 T uaudio_set_blksz +ffffffff82450dc0 T uaudio_sign_expand +ffffffff82450e00 T uaudio_req +ffffffff82450e90 T uaudio_getnum +ffffffff82450fc0 T uaudio_getdesc +ffffffff82451040 T uaudio_unit_byid +ffffffff82451080 T uaudio_tname +ffffffff824511f0 T uaudio_clkname +ffffffff82451230 T uaudio_mkname +ffffffff82451350 T uaudio_feature_fixup +ffffffff82451490 T uaudio_ranges_init +ffffffff824514d0 T uaudio_ranges_add +ffffffff82451590 T uaudio_ranges_clear +ffffffff82451600 T uaudio_ranges_decode +ffffffff82451690 T uaudio_ranges_encode +ffffffff82451710 T uaudio_ranges_getrates +ffffffff82451810 T uaudio_rates_indexof +ffffffff824518a0 T uaudio_req_ranges +ffffffff82451ec0 T uaudio_alt_getrates +ffffffff82451fa0 T uaudio_clock_id +ffffffff82452020 T uaudio_getrates +ffffffff82452100 T uaudio_feature_addent +ffffffff824522c0 T uaudio_process_srcs +ffffffff824523a0 T uaudio_process_unit +ffffffff82452fa0 T uaudio_process_nch +ffffffff82453050 T uaudio_unit_getdesc +ffffffff82453110 T uaudio_setname_dsts +ffffffff824531c0 T uaudio_setname_srcs +ffffffff82453270 T uaudio_setname_middle +ffffffff82453330 T uaudio_mixer_nchan +ffffffff824533b0 T uaudio_mixer_skip +ffffffff82453420 T uaudio_mixer_byindex +ffffffff82453540 T uaudio_process_header +ffffffff824535f0 T uaudio_process_ac_ep +ffffffff824536d0 T uaudio_process_ac +ffffffff82453ff0 T uaudio_process_as_ep +ffffffff82454160 T uaudio_process_as_general +ffffffff82454270 T uaudio_process_as_format +ffffffff824547f0 T uaudio_process_as +ffffffff82454bd0 T uaudio_fixup_params +ffffffff82454d50 T uaudio_process_conf +ffffffff82454f50 T uaudio_xfer_alloc +ffffffff82454ff0 T uaudio_xfer_free +ffffffff82455070 T uaudio_stream_close +ffffffff82455210 T uaudio_stream_open +ffffffff82455940 T uaudio_adjspf +ffffffff82455a30 T uaudio_pdata_copy +ffffffff82455be0 T uaudio_pdata_calcsizes +ffffffff82455ce0 T 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upd_sensor_invalidate +ffffffff8253fc80 T upd_sensor_update +ffffffff82540000 T uwacom_match +ffffffff825400e0 T uwacom_attach +ffffffff82540300 T uwacom_detach +ffffffff82540320 T uwacom_enable +ffffffff82540390 T uwacom_ioctl +ffffffff82540440 T uwacom_disable +ffffffff82540470 T uwacom_intr_legacy +ffffffff82540620 T uwacom_intr +ffffffff82541000 T bwfm_usb_preinit +ffffffff825414b0 T bwfm_usb_txcheck +ffffffff825414f0 T bwfm_usb_txdata +ffffffff82541630 T bwfm_usb_txctl +ffffffff825417f0 T bwfm_usb_match +ffffffff82541860 T bwfm_usb_attach +ffffffff825419f0 T bwfm_usb_detach +ffffffff82541ad0 T bwfm_usb_dl_cmd +ffffffff82541b70 T bwfm_usb_load_microcode +ffffffff82541e60 T bwfm_usb_alloc_rx_list +ffffffff82541f50 T bwfm_usb_alloc_tx_list +ffffffff82542080 T bwfm_usb_rxeof +ffffffff82542230 T bwfm_usb_free_rx_list +ffffffff825422b0 T bwfm_usb_free_tx_list +ffffffff82542330 T bwfm_usb_newbuf +ffffffff825423b0 T bwfm_usb_txeof +ffffffff825424c0 T bwfm_usb_txctl_cb +ffffffff82543000 T umstc_match +ffffffff825430b0 T umstc_attach +ffffffff825431b0 T umstc_detach +ffffffff82543200 T umstc_intr +ffffffff82543350 T umstc_brightness_task +ffffffff82544000 T uhidpp_match +ffffffff825440e0 T uhidpp_attach +ffffffff82544450 T uhidpp_detach +ffffffff82544690 T uhidpp_intr +ffffffff825448a0 T uhidpp_task +ffffffff82544930 T hidpp10_get_type +ffffffff82544a30 T hidpp10_get_name +ffffffff82544b30 T hidpp10_enable_notifications +ffffffff82544ba0 T uhidpp_is_notification +ffffffff82544c30 T uhidpp_claim_notification +ffffffff82544d50 T uhidpp_refresh +ffffffff82544e20 T uhidpp_device_refresh +ffffffff82544ed0 T uhidpp_consume_notification +ffffffff82545020 T uhidpp_device_connect +ffffffff82545310 T uhidpp_sleep +ffffffff82545340 T hidpp_get_protocol_version +ffffffff82545410 T uhidpp_device_features +ffffffff82545600 T hidpp20_battery_get_capability +ffffffff825456c0 T hidpp20_unified_battery_get_capabilities +ffffffff825457b0 T hidpp20_battery_get_level_status +ffffffff825458e0 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acpiprt_route_interrupt +ffffffff8259c000 T acpidmar_match +ffffffff8259c080 T acpidmar_attach +ffffffff8259c140 T acpidmar_activate +ffffffff8259c380 T dmar_bdf +ffffffff8259c400 T domain_map_check +ffffffff8259c580 T acpidmar_pci_attach +ffffffff8259c650 T dmar_ptmap +ffffffff8259c6d0 T domain_map_pthru +ffffffff8259c750 T domain_map_page_intel +ffffffff8259c8d0 T iommu_flush_cache +ffffffff8259c920 T iommu_alloc_page +ffffffff8259c9c0 T pte_lvl +ffffffff8259cae0 T domain_map_page_amd +ffffffff8259cbb0 T domain_unload_map +ffffffff8259cdc0 T dom_bdf +ffffffff8259ce90 T domain_load_map +ffffffff8259d0c0 T iommu_enable_translation +ffffffff8259d340 T iommu_flush_tlb +ffffffff8259d4c0 T iommu_flush_write_buffer +ffffffff8259d630 T iommu_set_rtaddr +ffffffff8259d760 T iommu_write_8 +ffffffff8259d790 T iommu_write_4 +ffffffff8259d7c0 T iommu_read_4 +ffffffff8259d7e0 T iommu_alloc_hwdte +ffffffff8259d930 T iommu_issue_qi +ffffffff8259d960 T iommu_flush_tlb_qi +ffffffff8259d990 T iommu_flush_ctx_qi +ffffffff8259d9c0 T ivhd_invalidate_domain +ffffffff8259da20 T iommu_read_8 +ffffffff8259da40 T iommu_flush_ctx +ffffffff8259db60 T iommu_enable_qi +ffffffff8259dc80 T iommu_showcfg +ffffffff8259dea0 T iommu_init +ffffffff8259e1e0 T acpidmar_intr_establish +ffffffff8259e2f0 T acpidmar_intr +ffffffff8259e480 T acpidmar_match_devscope +ffffffff8259e5c0 T domain_create +ffffffff8259e800 t dmar_dmamap_create +ffffffff8259e820 t dmar_dmamap_destroy +ffffffff8259e830 t dmar_dmamap_load +ffffffff8259e8a0 t dmar_dmamap_load_mbuf +ffffffff8259e900 t dmar_dmamap_load_uio +ffffffff8259e960 t dmar_dmamap_load_raw +ffffffff8259e9d0 t dmar_dmamap_unload +ffffffff8259ea00 t dmar_dmamap_sync +ffffffff8259ea20 t dmar_dmamem_alloc +ffffffff8259ea40 t dmar_dmamem_free +ffffffff8259ea60 t dmar_dmamem_map +ffffffff8259ea80 t dmar_dmamem_unmap +ffffffff8259eaa0 t dmar_dmamem_mmap +ffffffff8259eac0 T domain_add_device +ffffffff8259eb40 T domain_remove_device +ffffffff8259ebf0 T domain_lookup +ffffffff8259edb0 T _iommu_map +ffffffff8259ee70 T _iommu_domain +ffffffff8259eed0 T domain_map_device +ffffffff8259f1d0 T ivhd_flush_devtab +ffffffff8259f230 T acpidmar_pci_hook +ffffffff8259f3f0 T acpidmar_parse_devscope +ffffffff8259f510 T acpidmar_drhd +ffffffff8259f6e0 T acpidmar_rmrr +ffffffff8259f970 T acpidmar_atsr +ffffffff8259fb10 T acpidmar_init +ffffffff8259ff60 T acpiivhd_intr +ffffffff825a0040 T ivhd_poll_events +ffffffff825a0100 T ivhd_intr_map +ffffffff825a01b0 T _dumppte +ffffffff825a02e0 T ivhd_showpage +ffffffff825a0420 T ivhd_show_event +ffffffff825a0cc0 T ivhd_showdte +ffffffff825a0da0 T ivhd_showcmd +ffffffff825a0e60 T _ivhd_issue_command +ffffffff825a0f40 T ivhd_issue_command +ffffffff825a1210 T ivhd_invalidate_iommu_all +ffffffff825a1300 T ivhd_invalidate_interrupt_table +ffffffff825a13f0 T ivhd_showreg +ffffffff825a1530 T ivhd_checkerr +ffffffff825a1770 T ivhd_iommu_init +ffffffff825a1c50 T acpiivrs_ivhd +ffffffff825a1cc0 T acpiivrs_init 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asmc_backlight +ffffffff825a5bc0 T asmc_init +ffffffff825a5dc0 T asmc_update +ffffffff825a5f60 T asmc_detach +ffffffff825a6110 t asmc_temp +ffffffff825a62a0 t asmc_fan +ffffffff825a6460 t asmc_light +ffffffff825a7000 T acpiasus_match +ffffffff825a7030 T acpiasus_attach +ffffffff825a7150 T acpiasus_activate +ffffffff825a72e0 T acpiasus_init +ffffffff825a73c0 T acpiasus_notify +ffffffff825a8000 T thinkpad_match +ffffffff825a80b0 T thinkpad_attach +ffffffff825a84c0 T thinkpad_activate +ffffffff825a8640 T thinkpad_sensor_attach +ffffffff825a87b0 T thinkpad_get_temp +ffffffff825a8840 T thinkpad_sensor_refresh +ffffffff825a89c0 T thinkpad_get_volume_mute +ffffffff825a8a30 T thinkpad_attach_deferred +ffffffff825a8a50 T thinkpad_enable_events +ffffffff825a8c20 T thinkpad_get_kbd_backlight +ffffffff825a8cb0 T thinkpad_set_kbd_backlight +ffffffff825a8d80 T thinkpad_get_param +ffffffff825a8de0 T thinkpad_set_param +ffffffff825a8ea0 T thinkpad_battery_setchargestart +ffffffff825a8ff0 T thinkpad_battery_setchargestop +ffffffff825a9140 T thinkpad_battery_setchargemode +ffffffff825a9710 T thinkpad_hotkey +ffffffff825a9d40 T thinkpad_brightness_up +ffffffff825a9ee0 T thinkpad_brightness_down +ffffffff825aa090 T thinkpad_toggle_bluetooth +ffffffff825aa1b0 T thinkpad_volume_mute +ffffffff825aa260 T thinkpad_volume_down +ffffffff825aa310 T thinkpad_volume_up +ffffffff825aa3c0 T thinkpad_get_thinklight +ffffffff825aa410 T thinkpad_adaptive_change +ffffffff825aa530 T thinkpad_get_brightness +ffffffff825aa570 T thinkpad_toggle_wan +ffffffff825aa690 T thinkpad_cmos +ffffffff825aa740 T thinkpad_set_brightness +ffffffff825aa830 T thinkpad_set_thinklight +ffffffff825aa8f0 T thinkpad_battery_inhibit_charge +ffffffff825aaa20 T thinkpad_battery_force_discharge +ffffffff825ab000 T toshiba_match +ffffffff825ab0a0 T toshiba_attach +ffffffff825ab180 T get_param_brightness +ffffffff825ab1e0 T acpitoshiba_get_param +ffffffff825ab240 T set_param_brightness +ffffffff825ab2d0 T toshiba_update_brightness +ffffffff825ab3d0 T acpitoshiba_set_param +ffffffff825ab470 T toshiba_set_brightness +ffffffff825ab590 T toshiba_enable_events +ffffffff825ab620 T toshiba_read_events +ffffffff825ab780 T toshiba_hotkey +ffffffff825ab9b0 T toshiba_get_brightness +ffffffff825abb20 T toshiba_fn_key_brightness_up +ffffffff825abc70 T toshiba_fn_key_brightness_down +ffffffff825abdc0 T toshiba_fn_key_video_output +ffffffff825abf10 T toshiba_get_video_output +ffffffff825ac080 T toshiba_set_video_output +ffffffff825ad000 T acpisony_match +ffffffff825ad070 T acpisony_attach +ffffffff825ad0e0 T acpisony_activate +ffffffff825ad120 T acpisony_notify_setup +ffffffff825ad310 T acpisony_notify +ffffffff825ad6b0 T acpisony_find_offset +ffffffff825ad7c0 T acpisony_set_hotkey +ffffffff825ad9b0 T acpisony_brightness_down +ffffffff825adac0 T acpisony_get_brightness +ffffffff825adb40 T acpisony_set_brightness +ffffffff825ae000 T acpivideo_match +ffffffff825ae070 T acpivideo_attach +ffffffff825ae1d0 T acpivideo_getpcibus +ffffffff825ae210 T acpivideo_notify +ffffffff825ae270 T acpivideo_set_policy +ffffffff825ae340 T acpi_foundvout +ffffffff825ae410 T acpivideo_print +ffffffff825af000 T acpivout_match +ffffffff825af070 T acpivout_attach +ffffffff825af1c0 T acpivout_notify +ffffffff825af270 T acpivout_get_bcl +ffffffff825af390 T acpivout_get_brightness +ffffffff825af430 T acpivout_get_param +ffffffff825af4d0 T acpivout_set_param +ffffffff825af630 T acpivout_select_brightness +ffffffff825af700 T acpivout_find_brightness +ffffffff825af790 T acpivout_set_brightness +ffffffff825b0000 T acpipwrres_match +ffffffff825b0070 T acpipwrres_attach +ffffffff825b02b0 T acpipwrres_foundcons +ffffffff825b0440 T acpipwrres_ref_incr +ffffffff825b04d0 T acpipwrres_hascons +ffffffff825b0520 T acpipwrres_ref_decr +ffffffff825b05b0 T acpipwrres_addcons +ffffffff825b1000 T aibs_match +ffffffff825b1030 T aibs_attach +ffffffff825b1140 T aibs_probe +ffffffff825b12a0 T aibs_attach_new +ffffffff825b13c0 T aibs_attach_sif +ffffffff825b1590 T aibs_notify +ffffffff825b1600 T aibs_add_sensor +ffffffff825b1850 T aibs_getpack +ffffffff825b18d0 T aibs_refresh +ffffffff825b1930 T aibs_refresh_r +ffffffff825b1a70 T aibs_getvalue +ffffffff825b1bc0 T aibs_find_cb +ffffffff825b2000 T aplgpio_match +ffffffff825b2060 T aplgpio_attach +ffffffff825b2310 T aplgpio_intr +ffffffff825b2460 T aplgpio_read_pin +ffffffff825b24b0 T aplgpio_write_pin +ffffffff825b2520 T aplgpio_intr_establish +ffffffff825b2640 T aplgpio_intr_enable +ffffffff825b26d0 T aplgpio_intr_disable +ffffffff825b3000 T bytgpio_match +ffffffff825b3060 T bytgpio_attach +ffffffff825b3320 T bytgpio_intr +ffffffff825b3450 T bytgpio_read_pin +ffffffff825b34b0 T bytgpio_write_pin +ffffffff825b3530 T bytgpio_intr_establish +ffffffff825b35a0 T bytgpio_intr_enable +ffffffff825b3690 T bytgpio_intr_disable +ffffffff825b4000 T chvgpio_match +ffffffff825b4060 T chvgpio_attach +ffffffff825b4300 T chvgpio_intr +ffffffff825b43d0 T chvgpio_read_pin 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+ffffffff825b6fe0 T pchgpio_intr_handle +ffffffff825b70c0 T pchgpio_save_pin +ffffffff825b7280 T pchgpio_restore_pin +ffffffff825b8000 T tipmic_match +ffffffff825b8050 T tipmic_attach +ffffffff825b8250 T tipmic_write_1 +ffffffff825b8310 T tipmic_intr +ffffffff825b8470 T tipmic_get_lpat +ffffffff825b8580 T tipmic_read_pin +ffffffff825b85b0 T tipmic_write_pin +ffffffff825b85e0 T tipmic_thermal_opreg_handler +ffffffff825b8e60 T tipmic_power_opreg_handler +ffffffff825b9100 T tipmic_read_1 +ffffffff825b91d0 T tipmic_raw_to_temp +ffffffff825ba000 T ccpmic_match +ffffffff825ba050 T ccpmic_attach +ffffffff825ba130 T ccpmic_get_lpat +ffffffff825ba240 T ccpmic_read_pin +ffffffff825ba3c0 T ccpmic_write_pin +ffffffff825ba520 T ccpmic_thermal_opreg_handler +ffffffff825ba770 T ccpmic_power_opreg_handler +ffffffff825ba960 T ccpmic_read_1 +ffffffff825baa30 T ccpmic_write_1 +ffffffff825baaf0 T ccpmic_raw_to_temp +ffffffff825bb000 T com_acpi_match +ffffffff825bb120 T com_acpi_attach +ffffffff825bb3a0 T com_acpi_is_designware +ffffffff825bb400 T com_acpi_intr_designware +ffffffff825bb430 T com_acpi_is_console +ffffffff825bc000 T sdhc_acpi_match +ffffffff825bc060 T sdhc_acpi_attach +ffffffff825bc370 T sdhc_acpi_parse_resources +ffffffff825bc420 T sdhc_acpi_card_detect_gpio +ffffffff825bc480 T sdhc_acpi_card_detect_intr +ffffffff825bc4c0 T sdhc_acpi_power_on +ffffffff825bc540 T sdhc_acpi_explore +ffffffff825bc570 T sdhc_acpi_card_detect_nonremovable +ffffffff825bc5a0 T sdhc_acpi_do_explore +ffffffff825bd000 T dwiic_acpi_match +ffffffff825bd050 T dwiic_acpi_attach +ffffffff825bd410 T dwiic_acpi_parse_crs +ffffffff825bd560 T dwiic_acpi_power +ffffffff825bd670 T dwiic_acpi_get_params +ffffffff825bd7b0 T dwiic_i2c_intr_establish +ffffffff825bd830 T dwiic_i2c_intr_disestablish +ffffffff825bd850 T dwiic_i2c_intr_string +ffffffff825bd8e0 T dwiic_acpi_acquire_bus +ffffffff825bd930 T dwiic_acpi_release_bus +ffffffff825bd960 T dwiic_acpi_bus_scan +ffffffff825bd9a0 T dwiic_acpi_found_hid +ffffffff825bdd00 T dwiic_matchhids +ffffffff825bdd90 T dwiic_acpi_found_ihidev +ffffffff825be000 T dwiic_acpi_found_iatp +ffffffff825be160 T dwiic_acpi_found_ietp +ffffffff825bf000 T acpicbkbd_match +ffffffff825bf030 T acpicbkbd_attach +ffffffff825bf0d0 T acpicbkbd_activate +ffffffff825bf120 T acpicbkbd_get_backlight +ffffffff825bf1a0 T acpicbkbd_set_backlight +ffffffff825bf240 T acpicbkbd_write_backlight +ffffffff825c0000 T acpials_match +ffffffff825c0090 T acpials_attach +ffffffff825c0230 T acpials_read +ffffffff825c02b0 T acpials_addtask +ffffffff825c02f0 T acpials_notify +ffffffff825c0380 T acpials_update +ffffffff825c1000 T tpm_match +ffffffff825c1050 T tpm_attach +ffffffff825c1320 T tpm_activate +ffffffff825c1430 T tpm2_start_method +ffffffff825c14b0 T tpm_probe +ffffffff825c1560 T tpm_init_tis +ffffffff825c17d0 T tpm_init_crb +ffffffff825c1b10 T tpm_suspend +ffffffff825c1c00 T tpm_resume +ffffffff825c1c30 T tpm_write_tis +ffffffff825c1fc0 T tpm_read_tis +ffffffff825c2190 T tpm_write_crb +ffffffff825c2570 T tpm_read_crb +ffffffff825c2870 T tpm_request_locality_tis +ffffffff825c2960 T tpm_request_locality_crb +ffffffff825c2a60 T tpm_release_locality_crb +ffffffff825c2ab0 T tpm_release_locality_tis +ffffffff825c2b20 T tpm_getburst +ffffffff825c2bd0 T tpm_status +ffffffff825c2bf0 T tpm_waitfor +ffffffff825c2cd0 T tpm_waitfor_status +ffffffff825c3000 T acpihve_match +ffffffff825c30b0 T acpihve_attach +ffffffff825c4000 T acpisbs_match +ffffffff825c4030 T acpisbs_attach +ffffffff825c42b0 T acpisbs_activate +ffffffff825c4390 T acpisbs_read +ffffffff825c4450 T acpisbs_setup_sensors +ffffffff825c4550 T acpisbs_refresh_sensors +ffffffff825c46a0 T acpisbs_notify +ffffffff825c47e0 T acpi_smbus_read +ffffffff825c5000 T surface_match +ffffffff825c5060 T surface_attach +ffffffff825c50c0 T surface_hotkey +ffffffff825c6000 T ipmi_acpi_match +ffffffff825c6030 T ipmi_acpi_attach +ffffffff825c6260 T ipmi_acpi_parse_crs +ffffffff825c7000 T amdgpio_match +ffffffff825c7060 T amdgpio_attach +ffffffff825c72a0 T amdgpio_activate +ffffffff825c7390 T amdgpio_intr +ffffffff825c7530 T amdgpio_read_pin +ffffffff825c7580 T amdgpio_write_pin +ffffffff825c75f0 T amdgpio_intr_establish +ffffffff825c76e0 T amdgpio_intr_enable +ffffffff825c7760 T amdgpio_intr_disable +ffffffff825c77e0 T amdgpio_save +ffffffff825c7860 T amdgpio_restore +ffffffff825c78f0 T amdgpio_save_pin +ffffffff825c7960 T amdgpio_restore_pin +ffffffff825c79d0 T amdgpio_pin_intr +ffffffff825c8000 T acpihid_match +ffffffff825c8030 T acpihid_attach +ffffffff825c8210 T acpihid_init_dsm +ffffffff825c8370 T acpihid_eval +ffffffff825c8590 T acpihid_notify +ffffffff825c85f0 T acpihid_button_array_enable +ffffffff825c9000 t iosf_acpi_match +ffffffff825c9050 t iosf_acpi_attach +ffffffff825c9150 t iosf_acpi_mbi_mdr_rd +ffffffff825c91c0 t iosf_acpi_mbi_mdr_wr +ffffffff825ca000 T acpi_match +ffffffff825ca060 T acpi_attach +ffffffff825ca0a0 T acpi_probe +ffffffff825ca240 T acpi_map +ffffffff825ca330 T acpi_unmap +ffffffff825ca380 T acpi_bus_space_map +ffffffff825ca3a0 T acpi_bus_space_unmap +ffffffff825ca3c0 T acpi_intr_establish +ffffffff825ca500 T acpi_intr_disestablish +ffffffff825ca510 T acpi_scan +ffffffff825ca6b0 T acpi_acquire_glk +ffffffff825ca710 T acpi_release_glk +ffffffff825ca760 T acpi_attach_machdep +ffffffff825ca8f0 T acpi_sleep_cpu +ffffffff825caa90 T acpi_resume_cpu +ffffffff825cab90 T sleep_mp +ffffffff825cac80 T resume_mp +ffffffff825cad70 T acpi_iommu_device_map +ffffffff825cb000 T hibernate_resume_machdep +ffffffff825cb050 T hibernate_drop_to_real_mode +ffffffff825cb060 T hibernate_activate_resume_pt_machdep +ffffffff825cb0a0 T hibernate_switch_stack_machdep +ffffffff825cb0e0 T hibernate_flush +ffffffff825cb110 T acpi_savecpu +ffffffff825cc000 T sleep_showstate +ffffffff825cc0f0 T sleep_setstate +ffffffff825cc150 T gosleep +ffffffff825cc210 T sleep_abort +ffffffff825cc240 T sleep_resume +ffffffff825cc2b0 T suspend_finish +ffffffff825cd000 T acpiopen +ffffffff825cd0d0 T acpiclose +ffffffff825cd160 T acpiioctl +ffffffff825cd2b0 T request_sleep +ffffffff825cd330 T acpi_filtdetach +ffffffff825cd380 T acpi_filtread +ffffffff825cd3c0 T acpikqfilter +ffffffff825ce000 T acpipci_match +ffffffff825ce030 T acpipci_attach +ffffffff825ce2f0 T acpipci_osc +ffffffff825ce430 T acpipci_parse_resources +ffffffff825ce560 T acpipci_attach_bus +ffffffff825ce730 T acpipci_print +ffffffff825ce7a0 T acpipci_attach_busses +ffffffff825cf000 T efiopen +ffffffff825cf040 T eficlose +ffffffff825cf070 T efiioctl +ffffffff825cf110 T efiioc_get_table +ffffffff825cf280 T efiioc_var_get +ffffffff825cf500 T efiioc_var_next +ffffffff825cf720 T efiioc_var_set +ffffffff825cf8a0 T efi_adapt_error +ffffffff825d0000 T efi_match +ffffffff825d0060 T efi_attach +ffffffff825d0330 T efi_map_runtime +ffffffff825d04b0 T efi_enter +ffffffff825d0550 T efi_leave +ffffffff825d05d0 T efi_fault +ffffffff825d1000 T vmm_probe +ffffffff825d1050 T vmm_attach +ffffffff825d1170 T vmm_activate +ffffffff825d12b0 T vmmopen +ffffffff825d1300 T vmmclose +ffffffff825d1330 T vm_find +ffffffff825d1450 T vmmioctl +ffffffff825d16d0 T vm_create +ffffffff825d19a0 T vm_get_info +ffffffff825d1bf0 T vm_terminate +ffffffff825d1d60 T vm_resetcpu +ffffffff825d1e80 T vm_share_mem +ffffffff825d1fd0 T pledge_ioctl_vmm +ffffffff825d20c0 T vm_find_vcpu +ffffffff825d2120 T vm_create_check_mem_ranges +ffffffff825d22e0 T vm_teardown +ffffffff825d2420 T vcpu_must_stop +ffffffff825d3000 T vmm_enabled +ffffffff825d3080 T vmm_attach_machdep +ffffffff825d3230 T vmm_quiesce_vmx +ffffffff825d3400 T vmm_activate_machdep +ffffffff825d3520 T vmm_stop +ffffffff825d3650 T vmm_start +ffffffff825d3730 T vmmioctl_machdep +ffffffff825d3800 T vm_intr_pending +ffffffff825d38a0 T vm_mprotect_ept +ffffffff825d3b20 T pledge_ioctl_vmm_machdep +ffffffff825d3b70 T vm_rwvmparams +ffffffff825d3d00 T vmm_init_pvclock +ffffffff825d3dd0 T vm_rwregs +ffffffff825d3ee0 T vcpu_readregs_vmx +ffffffff825d4310 T vcpu_writeregs_vmx +ffffffff825d4780 T vcpu_readregs_svm +ffffffff825d4c30 T vcpu_writeregs_svm +ffffffff825d5100 T vmm_get_guest_memtype +ffffffff825d5180 T vmx_mprotect_ept +ffffffff825d53e0 T vmx_pmap_find_pte_ept +ffffffff825d54b0 T start_vmm_on_cpu +ffffffff825d55d0 T stop_vmm_on_cpu +ffffffff825d5670 T vmclear_on_cpu +ffffffff825d56f0 T vm_impl_init_vmx +ffffffff825d5800 T vm_impl_init_svm +ffffffff825d5910 T vm_impl_init +ffffffff825d59b0 T vm_impl_deinit +ffffffff825d59e0 T vcpu_reload_vmcs_vmx +ffffffff825d5b20 T vcpu_reset_regs_svm +ffffffff825d5eb0 T svm_setmsrbrw +ffffffff825d5fc0 T svm_setmsrbr +ffffffff825d6090 T vmm_alloc_vpid +ffffffff825d61a0 T svm_setmsrbw +ffffffff825d6280 T vmx_setmsrbr +ffffffff825d6330 T vmx_setmsrbw +ffffffff825d63e0 T vmx_setmsrbrw +ffffffff825d64f0 T svm_set_clean +ffffffff825d6540 T svm_set_dirty +ffffffff825d6590 T vcpu_reset_regs_vmx +ffffffff825d6fd0 T vcpu_vmx_check_cap +ffffffff825d70d0 T vcpu_vmx_compute_ctrl +ffffffff825d72b0 T vcpu_init_vmx +ffffffff825d7650 T vcpu_deinit_vmx +ffffffff825d77d0 T vcpu_reset_regs +ffffffff825d7810 T vcpu_init_svm +ffffffff825d79a0 T vcpu_deinit_svm +ffffffff825d7ae0 T vcpu_init +ffffffff825d7ba0 T vmm_free_vpid +ffffffff825d7c10 T vcpu_deinit +ffffffff825d7c50 T vm_run +ffffffff825d7e10 T vcpu_run_vmx +ffffffff825d8600 T vcpu_run_svm +ffffffff825d8bf0 T vmm_fpurestore +ffffffff825d8cb0 T vmm_fpusave +ffffffff825d8d30 T vmm_translate_gva +ffffffff825d9040 T vmm_update_pvclock +ffffffff825d9140 T vmx_get_exit_info +ffffffff825d91a0 T vmx_handle_exit +ffffffff825d95d0 T vmx_instruction_error_decode +ffffffff825d97a0 T vmm_get_guest_cpu_cpl +ffffffff825d9890 T vmx_handle_intr +ffffffff825d9920 T svm_handle_hlt +ffffffff825d9970 T vmx_handle_hlt +ffffffff825d9a20 T svm_handle_exit +ffffffff825d9d40 T svm_handle_np_fault +ffffffff825d9ee0 T vmm_handle_cpuid +ffffffff825da580 T svm_handle_msr +ffffffff825da850 T svm_handle_xsetbv +ffffffff825da8f0 T svm_handle_inout +ffffffff825da9f0 T vmm_inject_ud +ffffffff825daa20 T vmm_inject_db +ffffffff825daa50 T vmx_handle_np_fault +ffffffff825dabb0 T vmx_handle_inout +ffffffff825dad30 T vmx_handle_cr +ffffffff825daf30 T vmx_handle_rdmsr +ffffffff825db000 T vmx_handle_wrmsr +ffffffff825db270 T vmx_handle_xsetbv +ffffffff825db340 T vmm_inject_gp +ffffffff825db370 T vmx_get_exit_qualification +ffffffff825db3d0 T vmx_get_guest_faulttype +ffffffff825db470 T svm_get_guest_faulttype +ffffffff825db4a0 T svm_fault_page +ffffffff825db530 T vmx_fault_page +ffffffff825db680 T vmm_get_guest_cpu_mode +ffffffff825db780 T vmx_load_pdptes +ffffffff825dba00 T vmx_handle_cr0_write +ffffffff825dbc10 T vmx_handle_cr4_write +ffffffff825dbcb0 T vmm_handle_xsetbv +ffffffff825dbd40 T vmx_handle_misc_enable_msr +ffffffff825dbda0 T vmm_pat_is_valid +ffffffff825dbe80 T vmm_gpa_is_valid +ffffffff825dbef0 T vmx_exit_reason_decode +ffffffff825dbf30 T svm_exit_reason_decode +ffffffff825dcd40 T vcpu_state_decode +ffffffff825dd000 T vmm_dispatch_intr +ffffffff825dd020 T vmxon +ffffffff825dd050 T vmxoff +ffffffff825dd080 T vmclear +ffffffff825dd0b0 T vmptrld +ffffffff825dd0e0 T vmptrst +ffffffff825dd110 T vmwrite +ffffffff825dd140 T vmread +ffffffff825dd170 T invvpid +ffffffff825dd18b t invvpid_fail +ffffffff825dd192 t invvpid_ret +ffffffff825dd1b0 T invept +ffffffff825dd1cb t invept_fail +ffffffff825dd1d2 t invept_ret +ffffffff825dd1f0 T vmx_enter_guest +ffffffff825dd21b t skip_init +ffffffff825dd2e8 t no_l1df_msr +ffffffff825dd2eb t l1df_tlb_loop +ffffffff825dd304 t l1df_tlb_done +ffffffff825dd30c t l1df_load_cache +ffffffff825dd323 t done_flush +ffffffff825dd3b6 t do_resume +ffffffff825dd43b t fail_launch_or_resume +ffffffff825dd47d t fail_launch_unknown +ffffffff825dd48a t fail_launch_invalid_vmcs +ffffffff825dd497 t fail_launch_valid_vmcs +ffffffff825dd4b4 t vmx_exit_handler_asm +ffffffff825dd579 t restore_host +ffffffff825dd610 T svm_enter_guest +ffffffff825dd7a0 t restore_host_svm +ffffffff825de000 T sdmmc_match +ffffffff825de050 T sdmmc_attach +ffffffff825de390 T sdmmc_detach +ffffffff825de440 T sdmmc_activate +ffffffff825de510 T sdmmc_discover_task +ffffffff825de5d0 T sdmmc_create_thread +ffffffff825de640 T sdmmc_holds_root_device +ffffffff825de6a0 T sdmmc_task_thread +ffffffff825de890 T sdmmc_needs_discover +ffffffff825de940 T sdmmc_del_task +ffffffff825de9f0 T sdmmc_card_detach +ffffffff825dead0 T sdmmc_add_task +ffffffff825deb50 T sdmmc_card_attach +ffffffff825dec60 T sdmmc_enable +ffffffff825dedb0 T sdmmc_scan +ffffffff825dee40 T sdmmc_init +ffffffff825def40 T sdmmc_disable +ffffffff825df0a0 T sdmmc_function_free +ffffffff825df0c0 T sdmmc_delay +ffffffff825df110 T sdmmc_select_card +ffffffff825df330 T sdmmc_set_bus_power +ffffffff825df4e0 T sdmmc_function_alloc +ffffffff825df570 T sdmmc_app_command +ffffffff825df700 T sdmmc_mmc_command +ffffffff825df780 T sdmmc_go_idle_state +ffffffff825df890 T sdmmc_send_if_cond +ffffffff825df9e0 T sdmmc_set_relative_addr +ffffffff825e0000 T sdmmc_cisptr +ffffffff825e00a0 T sdmmc_read_cis +ffffffff825e03e0 T sdmmc_print_cis +ffffffff825e0550 T sdmmc_check_cis_quirks +ffffffff825e1000 T sdmmc_io_enable +ffffffff825e12a0 T sdmmc_io_reset +ffffffff825e13d0 T sdmmc_io_send_op_cond +ffffffff825e1540 T sdmmc_io_scan +ffffffff825e1690 T sdmmc_io_init +ffffffff825e17c0 T sdmmc_io_set_highspeed +ffffffff825e1a60 T sdmmc_io_set_bus_width +ffffffff825e1cf0 T sdmmc_io_function_ready +ffffffff825e1e70 T sdmmc_io_read_1 +ffffffff825e1fc0 T sdmmc_io_function_enable +ffffffff825e2390 T sdmmc_io_write_1 +ffffffff825e2510 T sdmmc_io_function_disable +ffffffff825e2790 T sdmmc_io_attach +ffffffff825e2880 T sdmmc_print +ffffffff825e2ad0 T sdmmc_submatch +ffffffff825e2b50 T sdmmc_io_detach +ffffffff825e2c00 T sdmmc_io_rw_direct +ffffffff825e2da0 T sdmmc_io_rw_extended_subr +ffffffff825e2f40 T sdmmc_io_rw_extended +ffffffff825e3340 T sdmmc_io_read_2 +ffffffff825e34a0 T sdmmc_io_write_2 +ffffffff825e3600 T sdmmc_io_read_4 +ffffffff825e3760 T sdmmc_io_write_4 +ffffffff825e38c0 T sdmmc_io_read_multi_1 +ffffffff825e39b0 T sdmmc_io_write_multi_1 +ffffffff825e3aa0 T sdmmc_io_read_region_1 +ffffffff825e3b90 T sdmmc_io_write_region_1 +ffffffff825e3c80 T sdmmc_io_xchg +ffffffff825e3e10 T sdmmc_intr_enable +ffffffff825e4080 T sdmmc_intr_disable +ffffffff825e42f0 T sdmmc_intr_establish +ffffffff825e43f0 T sdmmc_intr_disestablish +ffffffff825e44e0 T sdmmc_card_intr +ffffffff825e4530 T sdmmc_intr_task +ffffffff825e45c0 T sdmmc_io_set_blocklen +ffffffff825e5000 T sdmmc_mem_enable +ffffffff825e5450 T sdmmc_mem_send_op_cond +ffffffff825e5600 T sdmmc_mem_signal_voltage +ffffffff825e56c0 T sdmmc_mem_scan +ffffffff825e59d0 T sdmmc_decode_csd +ffffffff825e5e00 T sdmmc_decode_cid +ffffffff825e62a0 T sdmmc_mem_send_scr +ffffffff825e63e0 T sdmmc_mem_decode_scr +ffffffff825e6440 T sdmmc_mem_send_cxd_data +ffffffff825e65b0 T sdmmc_mem_set_bus_width +ffffffff825e66c0 T sdmmc_mem_sd_switch +ffffffff825e6970 T sdmmc_be512_to_bitfield512 +ffffffff825e6a20 T sdmmc_mem_mmc_switch +ffffffff825e6b10 T sdmmc_mem_init +ffffffff825e6c60 T sdmmc_mem_set_blocklen +ffffffff825e6d60 T sdmmc_mem_sd_init +ffffffff825e7140 T sdmmc_mem_mmc_init +ffffffff825e7800 T sdmmc_mem_select_transfer_mode +ffffffff825e7880 T sdmmc_mem_execute_tuning +ffffffff825e7910 T sdmmc_mem_read_block_subr +ffffffff825e7c70 T sdmmc_mem_single_read_block +ffffffff825e7d40 T sdmmc_mem_read_block +ffffffff825e7ef0 T sdmmc_mem_write_block_subr +ffffffff825e8240 T sdmmc_mem_single_write_block +ffffffff825e8310 T sdmmc_mem_write_block +ffffffff825e84c0 T sdmmc_mem_hibernate_write +ffffffff825e9000 T sdmmc_scsi_cmd +ffffffff825e91f0 T sdmmc_minphys +ffffffff825e9270 T sdmmc_scsi_attach +ffffffff825e9460 T sdmmc_alloc_ccbs +ffffffff825e95a0 T sdmmc_free_ccbs +ffffffff825e9600 T sdmmc_scsi_detach +ffffffff825e9760 T sdmmc_stimeout +ffffffff825e97e0 T sdmmc_ccb_alloc +ffffffff825e9890 T sdmmc_ccb_free +ffffffff825e9970 T sdmmc_inquiry +ffffffff825e9be0 T sdmmc_start_xs +ffffffff825e9cd0 T sdmmc_complete_xs +ffffffff825e9da0 T sdmmc_done_xs +ffffffff825e9df0 T sdmmc_scsi_hibernate_io +ffffffff825ea000 T bwfm_sdio_preinit +ffffffff825ea4a0 T bwfm_sdio_txcheck +ffffffff825ea4e0 T bwfm_sdio_txdata +ffffffff825ea550 T bwfm_sdio_txctl +ffffffff825ea6a0 T bwfm_sdio_buscore_read +ffffffff825ea6b0 T bwfm_sdio_buscore_write +ffffffff825ea6d0 T bwfm_sdio_buscore_prepare +ffffffff825ea810 T bwfm_sdio_buscore_activate +ffffffff825ea890 T bwfm_sdio_match +ffffffff825ea940 T bwfm_sdio_attach +ffffffff825eac00 T bwfm_sdio_detach +ffffffff825eac60 T bwfm_sdio_task +ffffffff825eadc0 T bwfm_sdio_write_1 +ffffffff825eadf0 T bwfm_sdio_read_1 +ffffffff825eae20 T bwfm_sdio_write_4 +ffffffff825eaed0 T bwfm_sdio_read_4 +ffffffff825eaf80 T bwfm_sdio_load_microcode +ffffffff825eb1e0 T bwfm_sdio_clkctl +ffffffff825eb310 T bwfm_sdio_dev_write +ffffffff825eb360 T bwfm_sdio_intr +ffffffff825eb3a0 T bwfm_sdio_ram_read_write +ffffffff825eb5d0 T bwfm_sdio_htclk +ffffffff825eb840 T bwfm_sdio_readshared +ffffffff825eb910 T bwfm_sdio_dev_read +ffffffff825eb950 T bwfm_sdio_rx_frames +ffffffff825ebd00 T bwfm_sdio_tx_frames +ffffffff825ebe00 T bwfm_sdio_backplane +ffffffff825ebeb0 T bwfm_sdio_buf_read +ffffffff825ebf90 T bwfm_sdio_buf_write +ffffffff825ec040 T bwfm_sdio_frame_read_write +ffffffff825ec1c0 T bwfm_sdio_newbuf +ffffffff825ec240 T bwfm_sdio_tx_ok +ffffffff825ec2a0 T bwfm_sdio_tx_ctrlframe +ffffffff825ec3a0 T bwfm_sdio_tx_dataframe +ffffffff825ec4f0 T bwfm_sdio_rx_glom +ffffffff825ed000 T onewire_match +ffffffff825ed050 T onewire_attach +ffffffff825ed0f0 T onewire_detach +ffffffff825ed160 T onewire_activate +ffffffff825ed180 T onewire_scan +ffffffff825ed3a0 T onewire_createthread +ffffffff825ed410 T onewire_print +ffffffff825ed4e0 T onewirebus_print +ffffffff825ed530 T onewire_lock +ffffffff825ed550 T onewire_unlock +ffffffff825ed570 T onewire_reset +ffffffff825ed590 T onewire_bit +ffffffff825ed5b0 T onewire_read_byte +ffffffff825ed6f0 T onewire_write_byte +ffffffff825ed7d0 T onewire_read_block +ffffffff825ed870 T onewire_write_block +ffffffff825ed910 T onewire_triplet +ffffffff825ed9f0 T onewire_matchrom +ffffffff825edb40 T onewire_search +ffffffff825edee0 T onewire_thread +ffffffff825ee000 T onewire_crc +ffffffff825ee0b0 T onewire_crc16 +ffffffff825ee170 T onewire_famname +ffffffff825ee1b0 T onewire_matchbyfam +ffffffff825ef000 T owid_match +ffffffff825ef030 T owid_attach +ffffffff825ef100 T owid_detach +ffffffff825ef140 T owid_activate +ffffffff825f0000 T owsbm_match +ffffffff825f0030 T owsbm_attach +ffffffff825f01d0 T owsbm_detach +ffffffff825f0240 T owsbm_activate +ffffffff825f0270 T owsbm_update +ffffffff825f1000 T owtemp_match +ffffffff825f1030 T owtemp_attach +ffffffff825f1130 T owtemp_detach +ffffffff825f11a0 T owtemp_activate +ffffffff825f11d0 T owtemp_update +ffffffff825f2000 T owctr_match +ffffffff825f2030 T owctr_attach +ffffffff825f2180 T owctr_detach +ffffffff825f21f0 T owctr_activate +ffffffff825f2220 T owctr_update +ffffffff825f2250 T owctr_update_counter +ffffffff825f3000 A __text_page_start +ffffffff825f3000 T Xsyscall_meltdown +ffffffff825f300c T Xsyscall +ffffffff825f326e t Xsyscall_trampback +ffffffff825f3280 T intr_user_exit +ffffffff825f32c2 t intr_user_exit_post_ast +ffffffff825f33ee t Xiretq_trampback +ffffffff825f33fa T doreti_iret +ffffffff825f4000 T alltraps +ffffffff825f4138 T recall_trap +ffffffff825f4150 T alltraps_kern +ffffffff825f4153 T alltraps_kern_meltdown +ffffffff825f5000 ? Xsyscall32 +ffffffff825f5000 A __kutext_start +ffffffff825f5000 A __text_page_end +ffffffff825f6000 ? Xtrap00 +ffffffff825f6010 ? Xtrap01 +ffffffff825f6020 ? Xtrap02 +ffffffff825f6028 c calltrap_specstk +ffffffff825f60f0 ? calltrap_specstk_tramp +ffffffff825f6110 ? Xtrap03 +ffffffff825f6120 ? Xtrap04 +ffffffff825f6130 ? Xtrap05 +ffffffff825f6140 ? Xtrap06 +ffffffff825f6150 ? Xtrap07 +ffffffff825f6160 ? Xtrap08 +ffffffff825f6170 ? Xtrap09 +ffffffff825f6180 ? Xtrap0a +ffffffff825f6190 ? Xtrap0b +ffffffff825f61a0 ? Xtrap0c +ffffffff825f61b0 ? Xtrap0d +ffffffff825f6240 ? Xtrap0e +ffffffff825f6250 ? Xintrspurious +ffffffff825f6250 ? Xtrap0f +ffffffff825f6260 ? Xtrap10 +ffffffff825f6270 ? Xtrap11 +ffffffff825f6280 ? Xtrap12 +ffffffff825f6290 ? Xtrap13 +ffffffff825f62a0 ? Xtrap14 +ffffffff825f62b0 ? Xtrap15 +ffffffff825f62c0 ? Xtrap16 +ffffffff825f62c0 ? Xtrap17 +ffffffff825f62c0 ? Xtrap18 +ffffffff825f62c0 ? Xtrap19 +ffffffff825f62c0 ? Xtrap1a +ffffffff825f62c0 ? Xtrap1b +ffffffff825f62c0 ? Xtrap1c +ffffffff825f62c0 ? Xtrap1d +ffffffff825f62c0 ? Xtrap1e +ffffffff825f62c0 ? Xtrap1f +ffffffff825f62d0 ? x2apic_eoi +ffffffff825f62f0 ? Xintr_lapic_ipi +ffffffff825f6330 ? Xipi_invltlb +ffffffff825f6360 ? Xipi_invlpg +ffffffff825f6390 ? Xipi_invlrange +ffffffff825f63d0 ? Xipi_invltlb_pcid +ffffffff825f6410 ? Xipi_invlpg_pcid +ffffffff825f6460 ? Xipi_invlrange_pcid +ffffffff825f64d0 ? Xintr_lapic_ltimer +ffffffff825f6510 ? Xintr_xen_upcall +ffffffff825f6550 ? Xintr_hyperv_upcall +ffffffff825f6590 ? Xintr_legacy0 +ffffffff825f65d0 ? Xintr_legacy1 +ffffffff825f6610 ? Xintr_legacy2 +ffffffff825f6650 ? Xintr_legacy3 +ffffffff825f6690 ? Xintr_legacy4 +ffffffff825f66d0 ? Xintr_legacy5 +ffffffff825f6710 ? Xintr_legacy6 +ffffffff825f6750 ? Xintr_legacy7 +ffffffff825f6790 ? Xintr_legacy8 +ffffffff825f67d0 ? Xintr_legacy9 +ffffffff825f6810 ? Xintr_legacy10 +ffffffff825f6850 ? Xintr_legacy11 +ffffffff825f6890 ? Xintr_legacy12 +ffffffff825f68d0 ? Xintr_legacy13 +ffffffff825f6910 ? Xintr_legacy14 +ffffffff825f6950 ? Xintr_legacy15 +ffffffff825f6990 ? Xintr_ioapic_edge0 +ffffffff825f69d0 ? Xintr_ioapic_edge1 +ffffffff825f6a10 ? Xintr_ioapic_edge2 +ffffffff825f6a50 ? Xintr_ioapic_edge3 +ffffffff825f6a90 ? Xintr_ioapic_edge4 +ffffffff825f6ad0 ? Xintr_ioapic_edge5 +ffffffff825f6b10 ? Xintr_ioapic_edge6 +ffffffff825f6b50 ? Xintr_ioapic_edge7 +ffffffff825f6b90 ? Xintr_ioapic_edge8 +ffffffff825f6bd0 ? Xintr_ioapic_edge9 +ffffffff825f6c10 ? Xintr_ioapic_edge10 +ffffffff825f6c50 ? Xintr_ioapic_edge11 +ffffffff825f6c90 ? Xintr_ioapic_edge12 +ffffffff825f6cd0 ? Xintr_ioapic_edge13 +ffffffff825f6d10 ? Xintr_ioapic_edge14 +ffffffff825f6d50 ? Xintr_ioapic_edge15 +ffffffff825f6d90 ? Xintr_ioapic_edge16 +ffffffff825f6dd0 ? Xintr_ioapic_edge17 +ffffffff825f6e10 ? Xintr_ioapic_edge18 +ffffffff825f6e50 ? Xintr_ioapic_edge19 +ffffffff825f6e90 ? Xintr_ioapic_edge20 +ffffffff825f6ed0 ? Xintr_ioapic_edge21 +ffffffff825f6f10 ? Xintr_ioapic_edge22 +ffffffff825f6f50 ? Xintr_ioapic_edge23 +ffffffff825f6f90 ? Xintr_ioapic_edge24 +ffffffff825f6fd0 ? Xintr_ioapic_edge25 +ffffffff825f7010 ? Xintr_ioapic_edge26 +ffffffff825f7050 ? Xintr_ioapic_edge27 +ffffffff825f7090 ? Xintr_ioapic_edge28 +ffffffff825f70d0 ? Xintr_ioapic_edge29 +ffffffff825f7110 ? Xintr_ioapic_edge30 +ffffffff825f7150 ? Xintr_ioapic_edge31 +ffffffff825f7190 ? Xintr_ioapic_edge32 +ffffffff825f71d0 ? Xintr_ioapic_edge33 +ffffffff825f7210 ? Xintr_ioapic_edge34 +ffffffff825f7250 ? Xintr_ioapic_edge35 +ffffffff825f7290 ? Xintr_ioapic_edge36 +ffffffff825f72d0 ? Xintr_ioapic_edge37 +ffffffff825f7310 ? Xintr_ioapic_edge38 +ffffffff825f7350 ? Xintr_ioapic_edge39 +ffffffff825f7390 ? Xintr_ioapic_edge40 +ffffffff825f73d0 ? Xintr_ioapic_edge41 +ffffffff825f7410 ? Xintr_ioapic_edge42 +ffffffff825f7450 ? Xintr_ioapic_edge43 +ffffffff825f7490 ? Xintr_ioapic_edge44 +ffffffff825f74d0 ? Xintr_ioapic_edge45 +ffffffff825f7510 ? Xintr_ioapic_edge46 +ffffffff825f7550 ? Xintr_ioapic_edge47 +ffffffff825f7590 ? Xintr_ioapic_edge48 +ffffffff825f75d0 ? Xintr_ioapic_edge49 +ffffffff825f7610 ? Xintr_ioapic_edge50 +ffffffff825f7650 ? Xintr_ioapic_edge51 +ffffffff825f7690 ? Xintr_ioapic_edge52 +ffffffff825f76d0 ? Xintr_ioapic_edge53 +ffffffff825f7710 ? Xintr_ioapic_edge54 +ffffffff825f7750 ? Xintr_ioapic_edge55 +ffffffff825f7790 ? Xintr_ioapic_edge56 +ffffffff825f77d0 ? Xintr_ioapic_edge57 +ffffffff825f7810 ? Xintr_ioapic_edge58 +ffffffff825f7850 ? Xintr_ioapic_edge59 +ffffffff825f7890 ? Xintr_ioapic_edge60 +ffffffff825f78d0 ? Xintr_ioapic_edge61 +ffffffff825f7910 ? Xintr_ioapic_edge62 +ffffffff825f7950 ? Xintr_ioapic_edge63 +ffffffff825f7990 ? Xintr_ioapic_level0 +ffffffff825f79d0 ? Xintr_ioapic_level1 +ffffffff825f7a10 ? Xintr_ioapic_level2 +ffffffff825f7a50 ? Xintr_ioapic_level3 +ffffffff825f7a90 ? Xintr_ioapic_level4 +ffffffff825f7ad0 ? Xintr_ioapic_level5 +ffffffff825f7b10 ? Xintr_ioapic_level6 +ffffffff825f7b50 ? Xintr_ioapic_level7 +ffffffff825f7b90 ? Xintr_ioapic_level8 +ffffffff825f7bd0 ? Xintr_ioapic_level9 +ffffffff825f7c10 ? Xintr_ioapic_level10 +ffffffff825f7c50 ? Xintr_ioapic_level11 +ffffffff825f7c90 ? Xintr_ioapic_level12 +ffffffff825f7cd0 ? Xintr_ioapic_level13 +ffffffff825f7d10 ? Xintr_ioapic_level14 +ffffffff825f7d50 ? Xintr_ioapic_level15 +ffffffff825f7d90 ? Xintr_ioapic_level16 +ffffffff825f7dd0 ? Xintr_ioapic_level17 +ffffffff825f7e10 ? Xintr_ioapic_level18 +ffffffff825f7e50 ? Xintr_ioapic_level19 +ffffffff825f7e90 ? Xintr_ioapic_level20 +ffffffff825f7ed0 ? Xintr_ioapic_level21 +ffffffff825f7f10 ? Xintr_ioapic_level22 +ffffffff825f7f50 ? Xintr_ioapic_level23 +ffffffff825f7f90 ? Xintr_ioapic_level24 +ffffffff825f7fd0 ? Xintr_ioapic_level25 +ffffffff825f8010 ? Xintr_ioapic_level26 +ffffffff825f8050 ? Xintr_ioapic_level27 +ffffffff825f8090 ? Xintr_ioapic_level28 +ffffffff825f80d0 ? Xintr_ioapic_level29 +ffffffff825f8110 ? Xintr_ioapic_level30 +ffffffff825f8150 ? Xintr_ioapic_level31 +ffffffff825f8190 ? Xintr_ioapic_level32 +ffffffff825f81d0 ? Xintr_ioapic_level33 +ffffffff825f8210 ? Xintr_ioapic_level34 +ffffffff825f8250 ? Xintr_ioapic_level35 +ffffffff825f8290 ? Xintr_ioapic_level36 +ffffffff825f82d0 ? Xintr_ioapic_level37 +ffffffff825f8310 ? Xintr_ioapic_level38 +ffffffff825f8350 ? Xintr_ioapic_level39 +ffffffff825f8390 ? Xintr_ioapic_level40 +ffffffff825f83d0 ? Xintr_ioapic_level41 +ffffffff825f8410 ? Xintr_ioapic_level42 +ffffffff825f8450 ? Xintr_ioapic_level43 +ffffffff825f8490 ? Xintr_ioapic_level44 +ffffffff825f84d0 ? Xintr_ioapic_level45 +ffffffff825f8510 ? Xintr_ioapic_level46 +ffffffff825f8550 ? Xintr_ioapic_level47 +ffffffff825f8590 ? Xintr_ioapic_level48 +ffffffff825f85d0 ? Xintr_ioapic_level49 +ffffffff825f8610 ? Xintr_ioapic_level50 +ffffffff825f8650 ? Xintr_ioapic_level51 +ffffffff825f8690 ? Xintr_ioapic_level52 +ffffffff825f86d0 ? Xintr_ioapic_level53 +ffffffff825f8710 ? Xintr_ioapic_level54 +ffffffff825f8750 ? Xintr_ioapic_level55 +ffffffff825f8790 ? Xintr_ioapic_level56 +ffffffff825f87d0 ? Xintr_ioapic_level57 +ffffffff825f8810 ? Xintr_ioapic_level58 +ffffffff825f8850 ? Xintr_ioapic_level59 +ffffffff825f8890 ? Xintr_ioapic_level60 +ffffffff825f88d0 ? Xintr_ioapic_level61 +ffffffff825f8910 ? Xintr_ioapic_level62 +ffffffff825f8950 ? Xintr_ioapic_level63 +ffffffff825f9000 ? codepatch_fill_nop +ffffffff825f9000 A __cptext_start +ffffffff825f9000 A __kutext_end +ffffffff825f90b0 ? codepatch_maprw +ffffffff825f9190 ? codepatch_unmaprw +ffffffff825f9200 ? codepatch_nop +ffffffff825f9360 ? codepatch_replace +ffffffff825f9510 ? codepatch_call +ffffffff825f9530 ? codepatch_jmp +ffffffff825fa000 A __cptext_end +ffffffff825fa000 A __rodata_start +ffffffff825fa000 C _etext +ffffffff825fa000 C etext +ffffffff825fb000 r seeprom_read +ffffffff825fb004 r icl_mg_pll_find_divisors.div1_vals +ffffffff825fb034 r athn_ac2qid +ffffffff825fb034 r athn_ac2qid +ffffffff825fb034 r athn_ac2qid +ffffffff825fb040 r rtwn_get_rssi.cckoff +ffffffff825fb068 r rsu_ac2qid +ffffffff825fb078 r pckbc_portcmd +ffffffff825fb07c r tht_fifo_write_pad.pad +ffffffff825fb084 r rsu_get_rssi.cckoff +ffffffff825fb0a4 r adlp_n_revids +ffffffff825fb0e8 r apple_iso_trans +ffffffff825fb0f0 r wihap_check_tx.txratetable +ffffffff825fb0f4 r dmamode +ffffffff825fb118 r gen9_edram_size_mb.sets +ffffffff825fb12c r dg2_g12_revid_step_tbl +ffffffff825fc000 r isomappings +ffffffff825fc080 r unimappings +ffffffff825fc230 r replacements +ffffffff825ff93f r apollo_pio_rec +ffffffff8264bf6b r apollo_udma33_tim +ffffffff8266107a r pp_r600_decoded_lanes +ffffffff826971d0 r cmd680_setup_channel.udma_tbl +ffffffff8269f672 r apollo_udma100_tim +ffffffff8269f678 r cmd0646_9_tim_udma +ffffffff826adac8 r substchar +ffffffff827035e3 r apollo_udma133_tim +ffffffff827035ea r apollo_udma66_tim +ffffffff82703614 r cy_pio_rec +ffffffff82708d00 R drm_ca +ffffffff82708d28 R drm_filtops +ffffffff82708d58 R drmread_filtops +ffffffff82709000 r vga_emulops +ffffffff82709048 R vga_stdscreen +ffffffff82709078 R vga_stdscreen_mono +ffffffff827090a8 R vga_stdscreen_bf +ffffffff827090d8 R vga_40lscreen +ffffffff82709108 R vga_40lscreen_mono +ffffffff82709138 R vga_40lscreen_bf +ffffffff82709168 R vga_50lscreen +ffffffff82709198 R vga_50lscreen_mono +ffffffff827091c8 R vga_50lscreen_bf +ffffffff827091f8 R vga_screenlist +ffffffff82709208 R vga_screenlist_mono +ffffffff82709218 R vga_accessops +ffffffff82709278 r i945_wm_info +ffffffff827092b8 r bgansitopc +ffffffff827092c0 r pctoansi +ffffffff82709300 r sdma_offsets +ffffffff82709300 r sdma_offsets +ffffffff82709338 r iha_rate_tbl +ffffffff82709370 r i830_a_wm_info +ffffffff827093a8 r gen9_edram_size_mb.ways +ffffffff82709408 r aggr_periodic_times +ffffffff82709500 r michael_final.pad +ffffffff82709528 r rt_copysa.maskarray +ffffffff82709530 r i915_wm_info +ffffffff82709538 r amdgpu_ih_clientid_jpeg +ffffffff82709538 r amdgpu_ih_clientid_uvds +ffffffff82709538 r amdgpu_ih_clientid_vcns +ffffffff82709538 r amdgpu_ih_clientid_vcns +ffffffff82709538 r amdgpu_ih_clientid_vcns +ffffffff82709568 r jsl_ehl_revids +ffffffff82709578 r vga_setfontset.cmaptabb +ffffffff827095e8 r i830_bc_wm_info +ffffffff82709650 r hsw_activate_psr2.map +ffffffff82709658 r tgl_revids +ffffffff82709690 r __drm_universal_plane_init.default_modifiers +ffffffff827096a0 r iwn_tid2fifo +ffffffff827096b8 r vga_setfontset.cmaptaba +ffffffff827096c0 r crtc_offsets +ffffffff827096c0 r crtc_offsets +ffffffff827096c0 r crtc_offsets +ffffffff82709768 r rtwn_r88e_get_rssi.cckoff +ffffffff8270a000 R edid_vendors +ffffffff8270a2c0 R edid_nvendors +ffffffff8270a2d0 R edid_products +ffffffff8270a330 R edid_nproducts +ffffffff8270a340 r _edid_modes +ffffffff8270b000 R videomode_list +ffffffff8270c080 R videomode_count +ffffffff8270d000 r ahc_hard_errors +ffffffff8270d080 r critical_sections +ffffffff8270d0b0 r patches +ffffffff8270dd50 r seqprog +ffffffff8270f000 r ahc_switch +ffffffff82710000 r termstat_strings +ffffffff82710020 r critical_sections +ffffffff82710060 r seqprog +ffffffff82710d50 r patches +ffffffff82712000 r ahd_switch +ffffffff82713000 R aic_switch +ffffffff82714000 R adw_switch +ffffffff82715000 R gdt_switch +ffffffff82716000 R twe_switch +ffffffff82717000 R ciss_switch +ffffffff82717030 R ciss_level +ffffffff82717050 R ciss_stat +ffffffff82718000 R ami_switch +ffffffff82718028 R ami_raw_switch +ffffffff82719000 R mfi_switch +ffffffff82719028 R mfi_pd_switch +ffffffff82719050 r mfi_iop_xscale +ffffffff82719080 r mfi_iop_ppc +ffffffff827190b0 r mfi_iop_gen2 +ffffffff827190e0 r mfi_iop_skinny +ffffffff82719110 r mfi_bbu_indicators +ffffffff8271a000 R qlw_switch +ffffffff8271b000 R isp_2100_risc_code +ffffffff8272dbf0 R isp_2200_risc_code +ffffffff82740990 R isp_2300_risc_code +ffffffff8275a408 R qla_switch +ffffffff8275a430 r qla_regs_2100 +ffffffff8275a460 r qla_regs_2200 +ffffffff8275a490 r qla_regs_23XX +ffffffff8275b000 R ahci_atascsi_methods +ffffffff8275c000 R nvme_switch +ffffffff8275c028 r nvme_ops +ffffffff8275d000 R mpi_switch +ffffffff8275d060 r bwi_rf_calc_nrssi_slope_11b.save_phy_regs +ffffffff8275d090 r chv_oa_mux_regs +ffffffff8275d0b0 r fiji_clock_stretcher_lookup_table +ffffffff8275d0b0 r tonga_clock_stretcher_lookup_table +ffffffff8275d0d0 r iosf_pci_devices +ffffffff8275d0f0 r link_speed +ffffffff8275d0f0 r link_speed +ffffffff8275d130 r drm_fb_xfrm.default_dst_pitch +ffffffff8275d130 r non_supported_protection +ffffffff8275d140 r tgl_uy_revids +ffffffff8275d2a0 r bwi_phy_noise_11g_rev1 +ffffffff8275d310 r cardslot_process_event.antonym_ev +ffffffff8275d3a0 r gen11_oa_mux_regs +ffffffff8275d440 r dpia_to_preferred_enc_id_table +ffffffff8275d4b0 r ddr2_cycle_tenths +ffffffff8275d520 r rtw_intr_rx.ratetbl +ffffffff8275d5a0 r abm_config +ffffffff8275d620 r getbootinfo.ports +ffffffff8275d670 r reg_offsets +ffffffff8275d680 r bwi_rf_lo_measure_11g.rf_lo_adjust +ffffffff8275d690 r glk_revids +ffffffff8275d6a0 r init_non_clock_fields.look_up +ffffffff8275d6b0 r uftdi_8u232am_getrate.roundoff +ffffffff8275d710 r zyd_rx_data.rates +ffffffff8275d730 r ieee80211_ra_valid_tx_mcs.max_mcs +ffffffff8275d760 r intel_engine_init_tlb_invalidation.gen8_regs +ffffffff8275d790 r bwi_phy_noise_11g +ffffffff8275d7a0 r hpt366_pio +ffffffff8275d800 r bwi_rf_calc_nrssi_slope_11g.save_phy3_regs +ffffffff8275d820 r ether_crc32_be_update.rev +ffffffff8275d820 r rtw_grf5101_mac_crypt.caesar +ffffffff8275d870 r snb_b_fdi_train_param +ffffffff8275d940 r intel_hpll_vco.elk_vco +ffffffff8275d960 r icl_revids +ffffffff8275d9c0 r pin_offsets +ffffffff8275d9e0 r amdgpu_ih_srcid_jpeg +ffffffff8275da20 r firmware_list +ffffffff8275da80 r atom_arg_shift +ffffffff8275da80 r atom_arg_shift +ffffffff8275dac0 r pf_syncookie_wstab +ffffffff8275dae0 r ieee80211_media_init.mopts +ffffffff8275db40 r add_entropy_words.twist_table +ffffffff8275dbe0 r urtw_8225v2_txpwr_cck +ffffffff8275dc00 r bwfm_pci_prio2fifo +ffffffff8275dc00 r ieee80211_up_to_ac.up_to_ac +ffffffff8275dcc0 r paritytab +ffffffff8275dcc0 r x86emu_parity_tab +ffffffff8275dce0 r legacy_connector_convert +ffffffff8275dd20 r gen7_oa_mux_regs +ffffffff8275dd40 r hsw_oa_mux_regs +ffffffff8275dd60 r notetab +ffffffff8275dd80 r urtw_8225v2_txpwr_cck_ch14 +ffffffff8275dda0 r bwi_rf_calibval.rf_calibvals +ffffffff8275de40 r pf_syncookie_msstab +ffffffff8275dea0 r xgmi3x16_pcs_err_status_reg_aldebaran +ffffffff8275df00 r uath_wme_init.uath_wme_11g +ffffffff8275df40 r gen7_oa_b_counters +ffffffff8275e140 r rtwn_iq_calib_run.reg_adda +ffffffff8275e180 r atom_def_dst +ffffffff8275e180 r atom_def_dst +ffffffff8275e1c0 r sha256_initial_hash_value +ffffffff8275e220 r otus_edca_def +ffffffff8275e240 r intel_hpll_vco.blb_vco +ffffffff8275e320 r epic_pci_subsys_info +ffffffff8275e340 r kbl_revids +ffffffff8275e360 r atom_arg_mask +ffffffff8275e360 r atom_arg_mask +ffffffff8275e3c0 r butmap +ffffffff8275e400 r GFX_RLC_SRM_INDEX_CNTL_DATA_OFFSETS +ffffffff8275e440 r comsoft.lsrmap +ffffffff8275e480 r xgmi3x16_pcs_err_noncorrectable_mask_reg_aldebaran +ffffffff8275e4a0 r tulip_mii_phy_readspecific.table +ffffffff8275e540 r intel_hpll_vco.pnv_vco +ffffffff8275e5a0 r dmapageport +ffffffff8275e660 r intel_hpll_vco.ctg_vco +ffffffff8275e720 r drm_calculate_luminance_range.pre_computed_values +ffffffff8275f000 R sili_atascsi_methods +ffffffff82760000 R ncr53c9x_switch +ffffffff82761000 r scf_period +ffffffff82762000 R siop_script +ffffffff827625a0 R lun_switch +ffffffff827625d0 R tag_switch +ffffffff82762660 R load_dsa +ffffffff827626c4 R siop_led_on +ffffffff827626cc R siop_led_off +ffffffff827626d8 R siop_switch +ffffffff82763000 R ep_vortex_media +ffffffff82763100 R ep_default_to_media +ffffffff82764000 R wi_card_ident +ffffffff82766000 R ucode_table +ffffffff82767000 r re_revisions +ffffffff82767290 r re_kstats_tpl +ffffffff82769000 R smc91cxx_media +ffffffff82769010 R smc91cxx_mii_bitbang_ops +ffffffff8276a000 R dl10019_mii_bitbang_ops +ffffffff8276a028 R dl10022_mii_bitbang_ops +ffffffff8276b000 R ax88190_mii_bitbang_ops +ffffffff8276d000 R ac97_audio_default +ffffffff8276d020 R ac97_on_off +ffffffff8276d324 R ac97_mic_select +ffffffff8276d628 R ac97_mono_select +ffffffff8276d92c R ac97_source +ffffffff8276dc30 R ac97_volume_stereo +ffffffff8276dc4c R ac97_volume_mono +ffffffff8276dc70 R source_info +ffffffff8276e470 R ac97_ad +ffffffff8276e580 R ac97_ak +ffffffff8276e610 R ac97_av +ffffffff8276e750 R ac97_rl +ffffffff8276e7a0 R ac97_cm +ffffffff8276e820 R ac97_cr +ffffffff8276e840 R ac97_cs +ffffffff8276e920 R ac97_cx +ffffffff8276e980 R ac97_dt +ffffffff8276e9a0 R ac97_em +ffffffff8276e9d0 R ac97_es +ffffffff8276e9f0 R ac97_is +ffffffff8276ea10 R ac97_ic +ffffffff8276ea90 R ac97_it +ffffffff8276eac0 R ac97_ns +ffffffff8276eb80 R ac97_ps +ffffffff8276ebb0 R ac97_sl +ffffffff8276ebd0 R ac97_st +ffffffff8276ed20 R ac97_vi +ffffffff8276ed50 R ac97_tt +ffffffff8276edd0 R ac97_ti +ffffffff8276edf0 R ac97_wb +ffffffff8276ee10 R ac97_wo +ffffffff8276eea0 R ac97_ym +ffffffff8276eef0 R ac97_vendors +ffffffff8276f1f0 R ac97enhancement +ffffffff8276f2f0 R ac97feature +ffffffff82770000 R lm_chips +ffffffff82770020 R lm78_sensors +ffffffff827701a0 R w83627hf_sensors +ffffffff827703a0 R w83627ehf_sensors +ffffffff827705c0 R w83627dhg_sensors +ffffffff827707c0 R nct6776f_sensors +ffffffff82770a00 R nct6779d_sensors +ffffffff82770d60 R w83637hf_sensors +ffffffff82770f20 R w83697hf_sensors +ffffffff827710c0 R w83781d_sensors +ffffffff82771280 R w83782d_sensors +ffffffff82771480 R w83783s_sensors +ffffffff82771600 R w83791d_sensors +ffffffff82771860 R w83792d_sensors +ffffffff82771ae0 R as99127f_sensors +ffffffff82772000 r ar5k_known_products +ffffffff82772110 r ar5111_gain_opt +ffffffff827721e0 r ar5112_gain_opt +ffffffff827722b0 r ar5k_5ghz_channels +ffffffff82772a00 r ar5k_2ghz_channels +ffffffff82772f10 r ar5111_rf +ffffffff82773350 r ar5112a_rf +ffffffff82773890 r ar5112_rf +ffffffff82773da0 r ar5413_rf +ffffffff827741b0 r ar2413_rf +ffffffff827744d0 r ar2425_rf +ffffffff82774830 r ar5111_rfg +ffffffff82774b30 r ar5112_rfg +ffffffff82774e30 r ar5413_rfg +ffffffff82775130 r ar2413_rfg +ffffffff82775430 r ar5k_rt_11a +ffffffff82775552 r ar5k_rt_11b +ffffffff82775674 r ar5k_rt_11g +ffffffff82775796 r ar5k_rt_xr +ffffffff82776000 r ar5210_ini +ffffffff82777000 r ar5211_mode +ffffffff827772c0 r ar5211_ini +ffffffff82777ad0 r ar5211_rf +ffffffff82778000 r ar5212_pcie +ffffffff82778080 r ar5212_mode +ffffffff82778310 r ar5212_ini +ffffffff82778c80 r ar5212_ar5111_mode +ffffffff82778f20 r ar5212_ar5112_mode +ffffffff827791b0 r ar5413_mode +ffffffff82779b10 r ar2413_mode +ffffffff8277a430 r ar2425_mode +ffffffff8277ad90 r ar5111_bbgain +ffffffff8277b090 r ar5112_bbgain +ffffffff8277c000 r athn_5ghz_chans +ffffffff8277c020 r athn_rates +ffffffff8277d000 r athn_rates +ffffffff8277e000 r ar9160_ini +ffffffff8277e068 r ar5416_ini +ffffffff8277e0d0 r ar5416_serdes +ffffffff8277e0e8 r ar9160_1_1_addac +ffffffff8277e0f8 r ar9160_1_0_addac +ffffffff8277e108 r ar5416_2_2_addac +ffffffff8277e118 r ar5416_2_1_addac +ffffffff8277e128 r ar5416_set_power_calib.chainoffset +ffffffff8277e140 r ar9160_bank6tpc_vals +ffffffff8277e1c0 r ar5416_bank6tpc_vals +ffffffff8277e240 r ar5416_bb_rfgain_vals_2g +ffffffff8277e340 r ar5416_bb_rfgain_vals_5g +ffffffff8277e440 r ar5416_bank6_vals +ffffffff8277e4c0 r ar9160_regs +ffffffff8277e540 r ar9160_vals_5g20 +ffffffff8277e640 r ar9160_vals_5g40 +ffffffff8277e740 r ar9160_vals_2g40 +ffffffff8277e840 r ar9160_vals_2g20 +ffffffff8277e940 r ar9160_cm_regs +ffffffff8277ec30 r ar9160_cm_vals +ffffffff8277f210 r ar5416_regs +ffffffff8277f290 r ar5416_vals_5g20 +ffffffff8277f390 r ar5416_vals_5g40 +ffffffff8277f490 r ar5416_vals_2g40 +ffffffff8277f590 r ar5416_vals_2g20 +ffffffff8277f690 r ar5416_cm_regs +ffffffff8277f980 r ar5416_cm_vals +ffffffff8277ff60 r ar5416_serdes_regs +ffffffff8277ff90 r ar5416_serdes_vals +ffffffff8277ffc0 r ar9160_1_1_addac_vals +ffffffff82780040 r ar9160_1_0_addac_vals +ffffffff827800c0 r ar5416_2_2_addac_vals +ffffffff82780150 r ar5416_2_1_addac_vals +ffffffff82781000 r ar9280_2_0_ini +ffffffff82781068 r ar9280_2_0_serdes +ffffffff82781080 r ar9280_2_0_rx_gain_23db_backoff +ffffffff827810a0 r ar9280_2_0_rx_gain_13db_backoff +ffffffff827810c0 r ar9280_2_0_rx_gain +ffffffff827810e0 r ar9280_2_0_tx_gain_high_power +ffffffff82781100 r ar9280_2_0_tx_gain +ffffffff82781120 r ar9280_init_from_rom.chainoffset +ffffffff82781130 r ar9280_2_0_regs +ffffffff82781190 r ar9280_2_0_vals_5g20 +ffffffff82781250 r ar9280_2_0_vals_5g40 +ffffffff82781310 r ar9280_2_0_vals_2g40 +ffffffff827813d0 r ar9280_2_0_vals_2g20 +ffffffff82781490 r ar9280_2_0_cm_regs +ffffffff82781740 r ar9280_2_0_cm_vals +ffffffff82781c90 r ar9280_2_0_fast_clock_regs +ffffffff82781cb0 r ar9280_2_0_fast_clock_vals_5g20 +ffffffff82781cf0 r ar9280_2_0_fast_clock_vals_5g40 +ffffffff82781d30 r ar9280_2_0_serdes_regs +ffffffff82781d60 r ar9280_2_0_serdes_vals +ffffffff82781d90 r ar9280_2_0_rx_gain_regs +ffffffff82781ea0 r ar9280_2_0_rx_gain_23db_backoff_vals_5g +ffffffff827820b0 r ar9280_2_0_rx_gain_23db_backoff_vals_2g +ffffffff827822c0 r ar9280_2_0_rx_gain_13db_backoff_vals_5g +ffffffff827824d0 r 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ar9380_2_2_tx_gain_low_ob_db_vals_5g +ffffffff8278c040 r ar9380_2_2_tx_gain_low_ob_db_vals_2g +ffffffff8278c1e0 r ar9380_2_2_tx_gain_high_power_vals_5g +ffffffff8278c380 r ar9380_2_2_tx_gain_high_power_vals_2g +ffffffff8278c520 r ar9380_2_2_tx_gain_vals_5g +ffffffff8278c6c0 r ar9380_2_2_tx_gain_vals_2g +ffffffff8278c860 r ar9485_1_1_tx_gain_regs +ffffffff8278c8f0 r ar9485_1_1_tx_gain_vals_2g +ffffffff8278ca10 r ar9380_def_rom +ffffffff8278ce50 r ar9380_def_rom_h112 +ffffffff8278d290 r ar9380_def_rom_h116 +ffffffff8278d6d0 r ar9380_def_rom_x112 +ffffffff8278db10 r ar9380_def_rom_x113 +ffffffff8278e000 R atw_txthresh_tab_lo +ffffffff8278e050 R atw_txthresh_tab_hi +ffffffff8278e0a0 r atw_attach.empty_macaddr +ffffffff8278e0b0 r atw_attach.type_strings +ffffffff8278e0d0 r atw_rfmd2958_ifn +ffffffff8278e110 r atw_rfmd2958_rf1r +ffffffff8278e150 r atw_rxintr.rate_tbl +ffffffff8278f000 r rtw_identify_sta.empty_macaddr +ffffffff82790000 r rtwn_set_key.etherzeroaddr +ffffffff82790010 r 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rt2560_rf2525_hi_r2 +ffffffff827920c0 r rt2560_rf2525_r2 +ffffffff82792100 r rt2560_rf2525e_r2 +ffffffff82792140 r rt2560_rf2526_hi_r2 +ffffffff82792180 r rt2560_rf2526_r2 +ffffffff827921c0 r rt2560_def_bbp +ffffffff82792200 r rt2560_def_mac +ffffffff82793000 r rt2661_rf5225_1 +ffffffff82793300 r rt2661_rf5225_2 +ffffffff82793600 r rt2661_def_bbp +ffffffff82793640 r rt2661_def_mac +ffffffff82794000 r rt2860_rf2850 +ffffffff82794430 r rt2860_rates +ffffffff827944f0 r rt3572_def_rf +ffffffff82794530 r rt3090_def_rf +ffffffff82794560 r rt5392_def_rf +ffffffff827945e0 r rt3290_def_rf +ffffffff82794640 r rt5390_def_rf +ffffffff827946c0 r rt5390_def_bbp +ffffffff827946f0 r rt2860_def_mac +ffffffff82796000 r acx111_reg +ffffffff82796040 r acx111_rate_map +ffffffff82797000 r acx100_reg +ffffffff82797040 r acx100_txpower_rfmd +ffffffff82797060 r gen8_rcs_offsets +ffffffff82797090 r acx100_txpower_maxim +ffffffff827970b0 r mtl_rcs_offsets +ffffffff827970f0 r digits +ffffffff827970f0 r pppdumpb.digits +ffffffff827970f0 r pppdumpm.digits +ffffffff82797140 r hangpic +ffffffff82797180 r gen11_rcs_offsets +ffffffff827971b0 r xehp_rcs_offsets +ffffffff827971e0 r dg2_rcs_offsets +ffffffff82797220 r dg2_xcs_offsets +ffffffff82797250 r gen12_xcs_offsets +ffffffff82798000 r trinity_override_mgpg_sequences +ffffffff827983c0 r voltage_swing_to_pre_emphasis +ffffffff827983d0 r sgpr_init_compute_shader +ffffffff827984a0 r intel_hpll_vco.cl_vco +ffffffff827984c0 r vgpr_init_compute_shader +ffffffff82799000 r malo_cmd_string.cmds +ffffffff827990b0 r malo_cmd_string_result.results +ffffffff8279a000 R bwi_vendor_led_act +ffffffff8279a00c R bwi_default_led_act +ffffffff8279a010 R bwi_led_duration +ffffffff8279a380 r bwi_sup_bphy +ffffffff8279a3c0 r bwi_phy_freq_11g_rev1 +ffffffff8279a5c0 r bwi_phy_rotor_11g_rev1 +ffffffff8279a6a0 r bwi_phy_noise_scale_11g_rev2 +ffffffff8279a6e0 r bwi_phy_noise_scale_11g_rev7 +ffffffff8279a720 r bwi_phy_noise_scale_11g +ffffffff8279a760 r bwi_phy_sigma_sq_11g_rev2 +ffffffff8279a7d0 r bwi_phy_sigma_sq_11g_rev7 +ffffffff8279a840 r bwi_phy_delay_11g_rev1 +ffffffff8279a920 r bwi_rf_get_gains.save_phy_regs +ffffffff8279a940 r bwi_rf_lo_find.map +ffffffff8279a960 r bwi_txpower_map_11b +ffffffff8279a9a0 r bwi_txpower_map_11g +ffffffff8279a9e0 r _bwi_rf_lo_update_11g.rf_atten_list +ffffffff8279aa20 r _bwi_rf_lo_update_11g.rf_atten_init_list +ffffffff8279aa60 r _bwi_rf_lo_update_11g.rf_lo_measure_order +ffffffff8279aaa0 r bwi_rf_set_nrssi_ofs_11g.save_phy_comm_regs +ffffffff8279aac0 r bwi_bbpid_map +ffffffff8279aaf0 r bwi_regwin_count +ffffffff8279ab40 r bwi_clkfreq +ffffffff8279ab58 r bwi_zero_addr +ffffffff8279b000 R uhci_bus_methods +ffffffff8279b030 R uhci_root_ctrl_methods +ffffffff8279b060 R uhci_root_intr_methods +ffffffff8279b090 R uhci_device_ctrl_methods +ffffffff8279b0c0 R uhci_device_intr_methods +ffffffff8279b0f0 R uhci_device_bulk_methods +ffffffff8279b120 R uhci_device_isoc_methods +ffffffff8279b150 R uhci_devd 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ehci_confd +ffffffff8279d175 R ehci_ifcd +ffffffff8279d17e R ehci_endpd +ffffffff8279d185 R ehci_hubd +ffffffff8279e000 R xhci_bus_methods +ffffffff8279e030 R xhci_root_ctrl_methods +ffffffff8279e060 R xhci_root_intr_methods +ffffffff8279e090 R xhci_device_ctrl_methods +ffffffff8279e0c0 R xhci_device_intr_methods +ffffffff8279e0f0 R xhci_device_bulk_methods +ffffffff8279e120 R xhci_device_isoc_methods +ffffffff8279e150 R xhci_devd +ffffffff8279e162 R xhci_confd +ffffffff8279e16b R xhci_ifcd +ffffffff8279e174 R xhci_endpd +ffffffff8279e17b R xhci_endpcd +ffffffff8279e181 R xhci_hubd +ffffffff827a1000 R radio_ca +ffffffff827a2000 R ipmi_ca +ffffffff827a3000 R vscsi_ca +ffffffff827a3028 R vscsi_switch +ffffffff827a3050 R vscsi_filtops +ffffffff827a4000 R mpath_ca +ffffffff827a4028 R mpath_switch +ffffffff827a5000 R softraid_ca +ffffffff827a5028 R sr_switch +ffffffff827a6000 r spdmem_basic_types +ffffffff827a60a0 r spdmem_parity_types +ffffffff827a60e0 r spdmem_ddr4_decode.ddr4_chipsize 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+ffffffff827ad000 r fqcodel_ops +ffffffff827ad038 R ifq_fqcodel_ops +ffffffff827ad040 r fqcodel_pf_ops +ffffffff827ad088 R pfq_fqcodel_ops +ffffffff827ad090 r codel_intervals +ffffffff827ae000 r pfsync_bulk_req_state_names +ffffffff827ae030 r pfsync_bulk_req_event_names +ffffffff827ae060 r pfsync_qs +ffffffff827ae0d8 r pfsync_kstat_tpl +ffffffff827ae2e0 r pfsync_acts +ffffffff827af000 r bio_mappings_RBT_INFO +ffffffff827af018 R bio_mappings_RBT_TYPE +ffffffff827b0000 R hotplugread_filtops +ffffffff827b1000 R dtps_static +ffffffff827b2000 R db_show_all_cmds +ffffffff827b2180 R db_show_cmds +ffffffff827b24c0 R db_boot_cmds +ffffffff827b25a0 R db_command_table +ffffffff827b3000 R ddb_vars +ffffffff827b4000 R audio_ca +ffffffff827b4028 R audioctlread_filtops +ffffffff827b4058 R audiowrite_filtops +ffffffff827b4088 R audioread_filtops +ffffffff827b5000 R midi_ca +ffffffff827b5028 R midiwrite_filtops +ffffffff827b5058 R midiread_filtops +ffffffff827b6000 r mulawtolin16 +ffffffff827b6200 r lintomulaw +ffffffff827b7000 R randomread_filtops +ffffffff827b7030 R randomwrite_filtops +ffffffff827b8000 R video_ca +ffffffff827b8028 R video_filtops +ffffffff827b9000 R cd9660_vfsops +ffffffff827ba000 R cd9660_vops +ffffffff827ba110 R cd9660_specvops +ffffffff827ba220 R cd9660_fifovops +ffffffff827ba330 R cd9660read_filtops +ffffffff827ba360 R cd9660write_filtops +ffffffff827ba390 R cd9660vnode_filtops +ffffffff827bb000 R udf_vfsops +ffffffff827bc000 R udf_vops +ffffffff827bc110 r mon_lens +ffffffff827bd000 r month_days +ffffffff827be000 R execsw +ffffffff827bf000 r shstrtab +ffffffff827c0000 R copyright +ffffffff827c00c0 r initpaths +ffffffff827c1000 R sysent +ffffffff827c3000 R bufq_impls +ffffffff827c4000 R kqueueops +ffffffff827c4038 R kqread_filtops +ffffffff827c4068 R proc_filtops +ffffffff827c4098 R file_filtops +ffffffff827c40c8 R timer_filtops +ffffffff827c4100 R sysfilt_ops +ffffffff827c4148 R seltrue_filtops +ffffffff827c4178 R dead_filtops +ffffffff827c41a8 R badfd_filtops +ffffffff827c41d8 r mutex_klistops +ffffffff827c41f0 r rwlock_klistops +ffffffff827c5000 R kv_exec +ffffffff827c6000 R addrmask +ffffffff827c7000 r rw_ops +ffffffff827c8000 r proc_printit.pstat +ffffffff827c9000 R pledge_syscalls +ffffffff827c9a60 r pledgenames +ffffffff827c9cb0 r pledgereq +ffffffff827ca000 r unvname_rbt_RBT_INFO +ffffffff827ca018 R unvname_rbt_RBT_TYPE +ffffffff827cb000 R sig_filtops +ffffffff827cb030 R sigprop +ffffffff827cc000 R kern_vars +ffffffff827cc2f0 R hw_vars +ffffffff827cd000 R tc_vars +ffffffff827ce000 r sys_gettimeofday.zerotz +ffffffff827cf000 r taskq_sys_name +ffffffff827cf006 r taskq_sys_mp_name +ffffffff827cf010 R systq +ffffffff827cf018 R systqmp +ffffffff827d1000 r gpt_get_fstype.gpt_uuid_openbsd +ffffffff827d1010 r gpt_get_fstype.gpt_uuid_msdos +ffffffff827d1020 r gpt_get_fstype.gpt_uuid_chromerootfs +ffffffff827d1030 r gpt_get_fstype.gpt_uuid_linux +ffffffff827d1040 r gpt_get_fstype.gpt_uuid_hfs +ffffffff827d1050 r gpt_get_fstype.gpt_uuid_unused +ffffffff827d1060 r gpt_get_fstype.gpt_uuid_efi_system +ffffffff827d1070 r gpt_get_fstype.gpt_uuid_bios_boot +ffffffff827d2000 r hiballoc_addr_RBT_INFO +ffffffff827d2018 R hiballoc_addr_RBT_TYPE +ffffffff827d3000 R logread_filtops +ffffffff827d4000 r phtree_RBT_INFO +ffffffff827d4018 R phtree_RBT_TYPE +ffffffff827d4020 r pool_lock_ops_rw +ffffffff827d4058 r pool_lock_ops_mtx +ffffffff827d5000 r pselregister.evf +ffffffff827d500c r pselregister.evff +ffffffff827d6000 R pipe_rfiltops +ffffffff827d6030 R pipe_wfiltops +ffffffff827d6060 R pipe_efiltops +ffffffff827d6090 r pipeops +ffffffff827d7000 R socketops +ffffffff827d8000 R sysvsem_vars +ffffffff827d9000 R char_type +ffffffff827d9100 R ttyread_filtops +ffffffff827d9130 R ttywrite_filtops +ffffffff827d9160 R ttyexcept_filtops +ffffffff827da000 R ptcread_filtops +ffffffff827da030 R ptcwrite_filtops +ffffffff827da060 R ptcexcept_filtops +ffffffff827dc000 R domains +ffffffff827dd000 R unixdomain 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dos2unix +ffffffff827e8140 r u2l +ffffffff827e8240 r unix2dos +ffffffff827e9008 R msdosfs_vfsops +ffffffff827ea000 R msdosfs_vops +ffffffff827ea110 R msdosfsread_filtops +ffffffff827ea140 R msdosfswrite_filtops +ffffffff827ea170 R msdosfsvnode_filtops +ffffffff827eb000 r _utf_count +ffffffff827ec000 R ntfs_vfsops +ffffffff827ed000 R ntfs_vops +ffffffff827ee000 R bpfread_filtops +ffffffff827ee030 R bpf_mbuf_ops +ffffffff827ef000 r bpf_mem_ops +ffffffff827f0000 R priq_ops +ffffffff827f0038 R ifq_priq_ops +ffffffff827f0040 r ifq_kstat_tpl +ffffffff827f0180 r ifiq_kstat_tpl +ffffffff827f1000 r ether_crc32_le_update.crctab +ffffffff827f1040 r ether_crc32_be_update.crctab +ffffffff827f2000 r lcp +ffffffff827f2078 r ipcp +ffffffff827f20f0 r ipv6cp +ffffffff827f2168 r chap +ffffffff827f21e0 r pap +ffffffff827f3000 R ifmedia_baudrate_descriptions +ffffffff827f4000 r fcstab +ffffffff827f6000 R tunread_filtops +ffffffff827f6030 R tunwrite_filtops +ffffffff827f7000 R bridge_brport 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ieee80211_phymode_name +ffffffff8280e000 r ieee80211_r_ctry +ffffffff8280eae0 r ieee80211_r_names +ffffffff8280ef80 r ieee80211_r_map +ffffffff82810000 R zeroin46_addr +ffffffff82810010 R zeroin_addr +ffffffff82811000 R inetdomain +ffffffff82811050 R inetsw +ffffffff82812000 R divertctl_vars +ffffffff82812030 R divert_usrreqs +ffffffff82813000 R icmpctl_vars +ffffffff82814000 R ipctl_vars +ffffffff82814150 R inetctlerrmap +ffffffff82815000 R rip_usrreqs +ffffffff82816000 R tcp_timer_funcs +ffffffff82817000 R tcp_usrreqs +ffffffff828170a0 R tcp6_usrreqs +ffffffff82817140 R tcpctl_vars +ffffffff82818000 R udp_usrreqs +ffffffff828180a0 R udp6_usrreqs +ffffffff82818140 R udpctl_vars +ffffffff82819000 R gre_usrreqs +ffffffff8281a000 r ipsec_ids_tree_RBT_INFO +ffffffff8281a018 R ipsec_ids_tree_RBT_TYPE +ffffffff8281a020 r ipsec_ids_flows_RBT_INFO +ffffffff8281a038 R ipsec_ids_flows_RBT_TYPE +ffffffff8281a040 R xformsw +ffffffff8281a158 R xformswNXFORMSW +ffffffff8281b000 R espctl_vars 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hmac_ipad_buffer +ffffffff8282a080 R hmac_opad_buffer +ffffffff8282b000 R enc_xform_3des +ffffffff8282b040 R enc_xform_blf +ffffffff8282b080 R enc_xform_cast5 +ffffffff8282b0c0 R enc_xform_aes +ffffffff8282b100 R enc_xform_aes_ctr +ffffffff8282b140 R enc_xform_aes_gcm +ffffffff8282b180 R enc_xform_aes_gmac +ffffffff8282b1c0 R enc_xform_aes_xts +ffffffff8282b200 R enc_xform_chacha20_poly1305 +ffffffff8282b240 R enc_xform_null +ffffffff8282b280 R auth_hash_hmac_md5_96 +ffffffff8282b2c8 R auth_hash_hmac_sha1_96 +ffffffff8282b310 R auth_hash_hmac_ripemd_160_96 +ffffffff8282b358 R auth_hash_hmac_sha2_256_128 +ffffffff8282b3a0 R auth_hash_hmac_sha2_384_192 +ffffffff8282b3e8 R auth_hash_hmac_sha2_512_256 +ffffffff8282b430 R auth_hash_gmac_aes_128 +ffffffff8282b478 R auth_hash_gmac_aes_192 +ffffffff8282b4c0 R auth_hash_gmac_aes_256 +ffffffff8282b508 R auth_hash_chacha20_poly1305 +ffffffff8282b550 R comp_algo_deflate +ffffffff8282c000 r IV +ffffffff8282d000 r idgen32_ftable +ffffffff8282e000 r Chacha20_Poly1305_Update.zeroes +ffffffff8282e010 r pad0 +ffffffff8282f000 r null_point +ffffffff8282f020 r base_point +ffffffff82830000 R mplsdomain +ffffffff82831000 R mplsctl_vars +ffffffff82832000 r nfs_nodetree_RBT_INFO +ffffffff82832018 R nfs_nodetree_RBT_TYPE +ffffffff82833000 r nfsread_filtops +ffffffff82833030 r nfswrite_filtops +ffffffff82833060 r nfsvnode_filtops +ffffffff82834000 r nfsrv_v3errmap +ffffffff828340b0 r nfsrv_v2errmap +ffffffff82835000 R nfs_vfsops +ffffffff82836000 R nfs_vops +ffffffff82836110 R nfs_specvops +ffffffff82836220 R nfs_fifovops +ffffffff82837000 r fserr_interval +ffffffff82838000 R around +ffffffff82838030 R inside +ffffffff82838060 R fragtbl124 +ffffffff82838160 R fragtbl8 +ffffffff82839000 R ffs_vfsops +ffffffff82839070 R sbtry +ffffffff82839080 R ffs_vars +ffffffff8283a000 R ffs_vops +ffffffff8283a110 R ffs_specvops +ffffffff8283a220 R ffs_fifovops +ffffffff8283c000 R mfs_vfsops +ffffffff8283d000 R mfs_vops +ffffffff8283e000 r quotatypes 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kd_nowait +ffffffff82846190 R kd_trylock +ffffffff82847000 R vmmapbsy +ffffffff82847010 r page_flagbits +ffffffff828470a8 r uvm_map_addr_RBT_INFO +ffffffff828470c0 R uvm_map_addr_RBT_TYPE +ffffffff82848000 R pmap_pager +ffffffff82848048 R bufcache_pager +ffffffff82849000 r uvm_objtree_RBT_INFO +ffffffff82849018 R uvm_objtree_RBT_TYPE +ffffffff8284a000 r uvm_pmr_addr_RBT_INFO +ffffffff8284a018 R uvm_pmr_addr_RBT_TYPE +ffffffff8284a020 r uvm_pmr_size_RBT_INFO +ffffffff8284a038 R uvm_pmr_size_RBT_TYPE +ffffffff8284a040 r uvm_pmemrange_addr_RBT_INFO +ffffffff8284a058 R uvm_pmemrange_addr_RBT_TYPE +ffffffff8284b000 R uvm_vnodeops +ffffffff8284b048 r uvn_flush.interval +ffffffff8284c000 R zeroin6_addr +ffffffff8284d000 R in6addr_any +ffffffff8284d010 R in6addr_loopback +ffffffff8284d020 R in6addr_intfacelocal_allnodes +ffffffff8284d030 R in6addr_linklocal_allnodes +ffffffff8284d040 R in6addr_linklocal_allrouters +ffffffff8284d050 R in6mask0 +ffffffff8284d060 R in6mask32 +ffffffff8284d070 R in6mask64 +ffffffff8284d080 R in6mask96 +ffffffff8284d090 R in6mask128 +ffffffff8284d0a0 R sa6_any +ffffffff8284e000 R divert6ctl_vars +ffffffff8284e030 R divert6_usrreqs +ffffffff8284f000 R inet6domain +ffffffff8284f050 R inet6sw +ffffffff82850000 R icmpv6ctl_vars +ffffffff82851000 R inet6ctlerrmap +ffffffff82851020 R ipv6ctl_vars +ffffffff82852000 R rip6_usrreqs +ffffffff82853000 R pfkey_addr +ffffffff82853010 R pfkeyv2_usrreqs +ffffffff828530b0 R pfkeydomain +ffffffff82853100 R pfkeysw +ffffffff82853160 r ealgs +ffffffff82853190 r aalgs +ffffffff828531c0 r calgs +ffffffff82854000 R sadb_exts_allowed_out +ffffffff82854090 R sadb_exts_required_out +ffffffff82856000 r opc82_byte_operation +ffffffff82856040 r opc83_long_operation +ffffffff82856080 r opc83_word_operation +ffffffff828560c0 r opcD0_byte_operation +ffffffff82856100 r opcD1_long_operation +ffffffff82856140 r opcD1_word_operation +ffffffff82857000 r crc_table +ffffffff82857400 r crc_braid_table +ffffffff82859400 r x2n_table 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cpuctl_vars +ffffffff82864000 R cpu_cpuid_features +ffffffff828641d0 R cpu_ecpuid_features +ffffffff82864260 R cpu_cpuid_ecxfeatures +ffffffff82864450 R cpu_ecpuid_ecxfeatures +ffffffff828645d0 R cpu_seff0_ebxfeatures +ffffffff828647a0 R cpu_seff0_ecxfeatures +ffffffff82864800 R cpu_seff0_edxfeatures +ffffffff828648a0 R cpu_tpm_eaxfeatures +ffffffff828648c0 R cpu_cpuid_perf_eax +ffffffff828648d0 R cpu_cpuid_apmi_edx +ffffffff828648f0 R cpu_amdspec_ebxfeatures +ffffffff828649a0 R cpu_xsave_extfeatures +ffffffff828649f0 R cpu_arch_cap_features +ffffffff82865000 R sigcode +ffffffff82865014 R sigcodecall +ffffffff82865016 R sigcoderet +ffffffff82865038 R esigcode +ffffffff82865038 R sigfill +ffffffff82865039 R sigfillsiz +ffffffff82865039 r esigfill +ffffffff8286503d r bogus_proc_pmap +ffffffff82865070 r spl_lowered +ffffffff828650a6 r intr_spl_lowered +ffffffff82865113 R _xrstor +ffffffff82865117 R _xrstors +ffffffff8286511b R _xsave +ffffffff8286511f R _xsaves +ffffffff82865123 R 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ioapic_edge_stubs +ffffffff8286d8ad R ioapic_level_stubs +ffffffff8286e000 R _stac +ffffffff8286e003 R _clac +ffffffff8286f000 R x86_bus_space_io_ops +ffffffff8286f130 R x86_bus_space_mem_ops +ffffffff82870000 ? cpu_spinup_trampoline +ffffffff828700b6 R cpu_spinup_trampoline_end +ffffffff828700b6 R mp_tramp_data_start +ffffffff828700fc R mp_tramp_data_end +ffffffff82872000 R db_acpi_cmds +ffffffff828720a0 R db_machine_command_table +ffffffff82873000 r i8254_delay.delaytab +ffffffff82874000 R rasops_cmap +ffffffff82875000 r reverse +ffffffff82875100 r ibm437_level1 +ffffffff82875230 r ibm437_level2_0 +ffffffff82875248 r ibm437_level2_1 +ffffffff82875260 r ibm437_level2_3 +ffffffff82875278 r ibm437_level2_32 +ffffffff82875290 r ibm437_level2_34 +ffffffff828752a8 r ibm437_level2_35 +ffffffff828752c0 r ibm437_level2_37 +ffffffff828752e0 r ibm437_chars_0 +ffffffff828753e0 r ibm437_chars_1 +ffffffff828753f0 r ibm437_chars_3 +ffffffff82875430 r ibm437_chars_32 +ffffffff82875460 r ibm437_chars_34 +ffffffff828754d0 r ibm437_chars_35 +ffffffff828754f0 r ibm437_chars_37 +ffffffff82876000 R mii_media_table +ffffffff82877000 R nsphy_ca +ffffffff82877028 R nsphy_funcs +ffffffff82877040 r nsphys +ffffffff82878000 R nsphyter_ca +ffffffff82878028 R nsphyter_funcs +ffffffff82878040 r nsphyterphys +ffffffff82879000 R gentbi_ca +ffffffff82879028 R gentbi_funcs +ffffffff8287a000 R qsphy_ca +ffffffff8287a028 R qsphy_funcs +ffffffff8287a040 r qsphys +ffffffff8287b000 R inphy_ca +ffffffff8287b028 R inphy_funcs +ffffffff8287b040 r inphys +ffffffff8287c000 R iophy_ca +ffffffff8287c028 R iophy_funcs +ffffffff8287c040 r iophys +ffffffff8287d000 R eephy_ca +ffffffff8287d028 R eephy_funcs +ffffffff8287d040 r eephys +ffffffff8287e000 R exphy_ca +ffffffff8287e028 R exphy_funcs +ffffffff8287f000 R rlphy_ca +ffffffff8287f028 R rlphy_funcs +ffffffff8287f040 r rlphys +ffffffff82880000 R lxtphy_ca +ffffffff82880028 R lxtphy_funcs +ffffffff82880040 R lxtphy971_funcs +ffffffff82880060 r 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R mpbios_icu_table +ffffffff828ac000 R cpu_ca +ffffffff828ad000 R lapic_timer_intrclock +ffffffff828ae000 R ioapic_ca +ffffffff828af000 R efifb_ca +ffffffff828af028 R efifb_screen_list +ffffffff828b0000 R pvbus_ca +ffffffff828b1000 R pvclock_ca +ffffffff828b2000 R vmt_ca +ffffffff828b3000 R xen_ca +ffffffff828b4000 R xs_errors +ffffffff828b5000 R xnf_ca +ffffffff828b6000 R xbf_ca +ffffffff828b6028 R xbf_switch +ffffffff828b7000 R hyperv_ca +ffffffff828b7028 R hv_guid_network +ffffffff828b7038 R hv_guid_ide +ffffffff828b7048 R hv_guid_scsi +ffffffff828b7058 R hv_guid_shutdown +ffffffff828b7068 R hv_guid_timesync +ffffffff828b7078 R hv_guid_heartbeat +ffffffff828b7088 R hv_guid_kvp +ffffffff828b8000 r kvp_pools +ffffffff828b9000 R hvn_ca +ffffffff828ba000 R hvs_ca +ffffffff828ba028 R hvs_switch +ffffffff828bb000 r virtio_device_name +ffffffff828bc000 R vio_ca +ffffffff828bc030 r virtio_net_feature_names +ffffffff828bd000 R vioblk_ca +ffffffff828bd028 R vioblk_switch +ffffffff828be000 R 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pci_subclass_dasp +ffffffff828c4c10 R pci_class +ffffffff828c4e20 r pci_known_vendors +ffffffff828c63e0 r pci_known_products +ffffffff828e9000 R vga_pci_ca +ffffffff828e9030 r vga_devs +ffffffff828ea000 R ahc_pci_ident_table +ffffffff828ea5d0 R ahc_pci_ca +ffffffff828eb000 R ahd_pci_ident_table +ffffffff828eb198 R ahd_num_pci_devs +ffffffff828eb1a0 R ahd_pci_ca +ffffffff828eb1d0 r pci_bus_modes +ffffffff828eb210 r pci_status_strings +ffffffff828eb250 r pci_status_source +ffffffff828eb290 r split_status_strings +ffffffff828ec000 R adw_pci_ca +ffffffff828ec028 R adw_pci_devices +ffffffff828ed000 r adw_3550_Default_EEPROM +ffffffff828ed080 r adw_38C0800_Default_EEPROM +ffffffff828ed100 r adw_38C1600_Default_EEPROM +ffffffff828ee000 R adw_asc3550_mcode +ffffffff828ef3a0 R adw_asc3550_mcode_data +ffffffff828ef3b0 R adw_asc38C0800_mcode +ffffffff828f0888 R adw_asc38C0800_mcode_data +ffffffff828f08a0 R adw_asc38C1600_mcode +ffffffff828f2160 R adw_asc38C1600_mcode_data +ffffffff828f3000 R twe_pci_ca +ffffffff828f3028 R twe_pci_devices +ffffffff828f4000 R arc_ca +ffffffff828f4028 R arc_switch +ffffffff828f4050 r arc_devices +ffffffff828f4190 r arc_intel +ffffffff828f4198 r arc_marvell +ffffffff828f41a0 r arc_lsi +ffffffff828f41a8 r arc_marvell2 +ffffffff828f5000 R jmb_ca +ffffffff828f5030 r jmb_devices +ffffffff828f6000 R ahci_pci_ca +ffffffff828f6028 R ahci_jmb_ca +ffffffff828f6050 r ahci_devices +ffffffff828f7000 R nvme_pci_ca +ffffffff828f7028 r nvme_msi_blacklist +ffffffff828f8000 R ami_pci_ca +ffffffff828f8030 r ami_pci_subsys +ffffffff828f8270 r ami_pci_vendors +ffffffff828f9000 R mfi_pci_ca +ffffffff828f9030 r mfi_pci_devices +ffffffff828fa000 R mfii_ca +ffffffff828fa028 R mfii_switch +ffffffff828fa050 R mfii_pd_switch +ffffffff828fa078 R mfii_iop_thunderbolt +ffffffff828fa088 R mfii_iop_25 +ffffffff828fa098 R mfii_iop_35 +ffffffff828fa0b0 R mfii_devices +ffffffff828fa140 r mfi_bbu_indicators +ffffffff828fb000 R ips_ca +ffffffff828fb028 r ips_ids +ffffffff828fb040 r ips_chips +ffffffff828fb090 r ips_names +ffffffff828fb128 r ips_switch +ffffffff828fb150 r ips_pt_switch +ffffffff828fc000 R eap_ca +ffffffff828fc028 R eap1370_hw_if +ffffffff828fc0e0 R eap1371_hw_if +ffffffff828fc198 R eap_midi_hw_if +ffffffff828fc1d0 R eap_devices +ffffffff828fd000 R auacer_pci_devices +ffffffff828fd008 R auacer_ca +ffffffff828fd030 R auacer_hw_if +ffffffff828fe000 R auich_ca +ffffffff828fe028 R auich_hw_if +ffffffff828fe0e0 r auich_devices +ffffffff828ff000 R azalia_ca +ffffffff828ff028 R azalia_hw_if +ffffffff828ff0e0 R azalia_pci_devices +ffffffff828ff120 r pin_devices +ffffffff828ff1a0 r line_colors +ffffffff828ff220 r wtypes +ffffffff82900000 r azalia_codec_init_dolby_atmos.atmos_init +ffffffff82900050 r azalia_codec_init_dolby_atmos.atmos_v23_v25 +ffffffff82901000 R envy_ca +ffffffff82901028 R envy_hw_if +ffffffff829010e0 R envy_midi_hw_if +ffffffff82902000 R emuxki_devices +ffffffff82902010 R emu_ca +ffffffff82902038 R emuxki_hw_if +ffffffff829020f0 r emuxki_recbuf_sz +ffffffff82902170 r emuxki_recsrc_szreg +ffffffff8290217c r emuxki_recsrc_bufaddrreg +ffffffff82902190 r emuxki_rate_to_pitch.logMagTable +ffffffff82902390 r emuxki_rate_to_pitch.logSlopeTable +ffffffff82903000 R auixp_pci_devices +ffffffff82903010 R auixp_ca +ffffffff82903038 R auixp_hw_if +ffffffff82904000 R clcs_ca +ffffffff82904028 R cs4280_hw_if +ffffffff829040e0 R cs4280_devices +ffffffff82905000 R yds_ca +ffffffff82905028 r yds_hw_if +ffffffff829050e0 r yds_chip_capability_list +ffffffff82905120 r yds_get_lpfk.lpfkt +ffffffff82905160 r yds_get_lpfq.lpfqt +ffffffff82906000 R auvia_ca +ffffffff82906028 R auvia_hw_if +ffffffff829060e0 R auvia_devices +ffffffff829060f0 r auvia_set_params_sub.slottab +ffffffff82907000 R gdt_pci_ca +ffffffff82908000 R ciss_pci_ca +ffffffff82908030 R ciss_pci_devices +ffffffff82909000 R qlw_pci_ca +ffffffff82909030 r qlw_devices +ffffffff82909050 r isp_1040_risc_code +ffffffff8290e9f0 r isp_1080_risc_code +ffffffff82916470 r isp_12160_risc_code +ffffffff8291e000 R qla_pci_ca +ffffffff8291e030 r qla_devices +ffffffff8291f000 R qle_ca +ffffffff8291f028 R qle_switch +ffffffff8291f050 r qle_devices +ffffffff8291f070 r isp_2400_risc_code +ffffffff8294ea50 r isp_2500_risc_code +ffffffff82981000 R mpi_pci_ca +ffffffff82981030 r mpi_devices +ffffffff82982000 R mpii_ca +ffffffff82982028 R mpii_switch +ffffffff82982050 r mpii_devices +ffffffff82983000 R sili_pci_ca +ffffffff82983030 r sili_devices +ffffffff82984000 R aq_devices +ffffffff82984060 R aq_products +ffffffff829841d0 R aq_fw1x_ops +ffffffff829841f8 R aq_fw2x_ops +ffffffff82984220 R aq2_fw_ops +ffffffff82984248 R aq_ca +ffffffff82985000 R de_ca +ffffffff82985030 r tulip_srom_conninfo +ffffffff82985120 r tulip_mii_phy_attrlist +ffffffff829851e0 r tulip_21140_znyx_zx34x_boardsw +ffffffff82985208 r tulip_21040_10baset_only_boardsw +ffffffff82985230 r tulip_21040_boardsw +ffffffff82985258 r tulip_2114x_isv_boardsw +ffffffff82985280 r tulip_21140_smc9332_boardsw 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R rdcide_udmaclk +ffffffff8298a028 R default_product_desc +ffffffff8298a040 R pciide_intel_products +ffffffff8298a630 R pciide_amd_products +ffffffff8298a690 R pciide_cmd_products +ffffffff8298a730 R pciide_via_products +ffffffff8298a810 R pciide_cypress_products +ffffffff8298a820 R pciide_sis_products +ffffffff8298a870 R pciide_natsemi_products +ffffffff8298a890 R pciide_acer_products +ffffffff8298a8a0 R pciide_triones_products +ffffffff8298a8f0 R pciide_promise_products +ffffffff8298aac0 R pciide_acard_products +ffffffff8298ab10 R pciide_serverworks_products +ffffffff8298abb0 R pciide_nvidia_products +ffffffff8298ae80 R pciide_ite_products +ffffffff8298aea0 R pciide_ati_products +ffffffff8298af20 R pciide_jmicron_products +ffffffff8298af70 R pciide_phison_products +ffffffff8298af80 R pciide_rdc_products +ffffffff8298af90 R pciide_vendors +ffffffff8298b140 R pciide_pci_ca +ffffffff8298b168 R pciide_jmb_ca +ffffffff8298b190 r piix_isp_dma +ffffffff8298b193 r piix_rtc_dma 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cy_pci_ca +ffffffff8298d030 R cy_pci_devices +ffffffff8298e000 R rl_pci_ca +ffffffff8298e030 R rl_pci_devices +ffffffff8298f000 R re_pci_devices +ffffffff8298f030 R re_pci_ca +ffffffff82990000 R vr_ca +ffffffff82991000 R txp_ca +ffffffff82991030 R txp_devices +ffffffff82992000 r cards +ffffffff82993000 r format_params +ffffffff829931a0 r pixfmt_table +ffffffff82993320 r meteor_pixfmt_table +ffffffff82994000 R bktr_ca +ffffffff82994028 R bktr_hw_if +ffffffff82995000 r tuners +ffffffff82995170 r freqTable +ffffffff82995260 r nabcst +ffffffff829952a0 r irccable +ffffffff82995310 r hrccable +ffffffff82995380 r weurope +ffffffff82995420 r jpnbcst +ffffffff82995460 r jpncable +ffffffff829954c0 r xussr +ffffffff82995530 r australia +ffffffff82995590 r france +ffffffff82996000 R xl_pci_ca +ffffffff82996030 R xl_pci_devices +ffffffff82997000 R fxp_pci_ca +ffffffff82997030 R fxp_pci_devices +ffffffff82998000 R em_devices +ffffffff82998308 R em_ca +ffffffff82998330 r em_counters +ffffffff82999000 r em_igp_cable_length_table +ffffffff82999100 r em_igp_2_cable_length_table +ffffffff8299a000 R ixgb_devices +ffffffff8299a010 R ixgb_ca +ffffffff8299b000 R ixgbe_devices +ffffffff8299b0b8 R ix_ca +ffffffff8299b0e0 r ix_counters +ffffffff8299b3e0 r ix_rxq_kstats_tpl +ffffffff8299b458 r ix_txq_kstats_tpl +ffffffff8299c000 r ixgbe_mvals_base +ffffffff8299c060 r ixgbe_mvals_X540 +ffffffff8299c0c0 r ixgbe_mvals_X550 +ffffffff8299c120 r ixgbe_mvals_X550EM_x +ffffffff8299c180 r ixgbe_mvals_X550EM_a +ffffffff8299f000 R ixl_ca +ffffffff8299f030 R ixl_port_counters +ffffffff8299f2c0 R ixl_vsi_counters +ffffffff8299f380 r ixl_devices +ffffffff8299f4c0 r ixl_710 +ffffffff8299f4e8 r ixl_722 +ffffffff8299f510 r ixl_pf_aq_regs +ffffffff8299f578 r ixl_710_decrepit +ffffffff8299f5a0 r ixl_phy_type_map +ffffffff8299f770 r ixl_speed_type_map +ffffffff8299f7b0 r ixl_hmc_pack_rxq +ffffffff8299f830 r ixl_hmc_pack_txq +ffffffff8299f8a0 r ixl_sfp_ops +ffffffff8299f8b8 r ixl_qsfp_ops +ffffffff829a0000 r dwqe_pci_devices +ffffffff829a0018 R dwqe_pci_ca +ffffffff829a1000 R xge_ca +ffffffff829a1028 R xge_devices +ffffffff829a1030 r xge_fix_mac +ffffffff829a1110 r xge_xena_dtx_cfg +ffffffff829a1170 r xge_herc_dtx_cfg +ffffffff829a2000 R thtc_ca +ffffffff829a2028 R tht_ca +ffffffff829a2050 r thtc_devices +ffffffff829a2068 r tht_link_state.interval +ffffffff829a3000 R myx_ca +ffffffff829a3028 R myx_devices +ffffffff829a4000 R oce_ca +ffffffff829a4030 R oce_devices +ffffffff829a5000 R dc_pci_ca +ffffffff829a6000 R epic_pci_ca +ffffffff829a6028 R epic_pci_devices +ffffffff829a7000 R ti_pci_ca +ffffffff829a7030 R ti_devices +ffffffff829a8000 R ne_pci_ca +ffffffff829a8030 R ne_pci_prod +ffffffff829a9000 R gem_pci_ca +ffffffff829a9030 R gem_pci_devices +ffffffff829a9050 r gem_promhdr +ffffffff829a9052 r gem_promdat +ffffffff829a905a r gem_promdat2 +ffffffff829aa000 R cas_ca +ffffffff829aa028 R cas_pci_devices +ffffffff829aa030 r cas_promhdr +ffffffff829aa032 r cas_promdat_sun +ffffffff829aa03a r cas_promdat_ns +ffffffff829aa042 r cas_promdat2 +ffffffff829ab000 R sf_pci_ca +ffffffff829ab028 R sf_pci_products +ffffffff829ac000 R sis_ca +ffffffff829ac028 R sis_devices +ffffffff829ad000 R se_devices +ffffffff829ad008 R se_ca +ffffffff829ae000 R mbg_ca +ffffffff829ae030 R mbg_devices +ffffffff829af000 R uhci_pci_ca +ffffffff829b0000 R ohci_pci_ca +ffffffff829b1000 R ehci_pci_ca +ffffffff829b2000 R xhci_pci_ca +ffffffff829b3000 R cbb_pci_ca +ffffffff829b3028 r pccbb_pcmcia_do_io_map.pcic_iowidth +ffffffff829b4000 R skc_devices +ffffffff829b4030 R skc_ca +ffffffff829b4058 R sk_ca +ffffffff829b5000 R mskc_devices +ffffffff829b50a8 R mskc_ca +ffffffff829b50d0 R msk_ca +ffffffff829b5100 r msk_mib +ffffffff829b6000 R puc_pci_ca +ffffffff829b7000 R puc_devs +ffffffff829bc000 R com_puc_ca +ffffffff829bc030 r puc_port_types +ffffffff829bd000 R lpt_puc_ca +ffffffff829be000 R wi_pci_ca +ffffffff829be030 r wi_pci_products +ffffffff829bf000 R an_pci_ca +ffffffff829bf030 R an_pci_devices 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iwn4965_post_alive.qid2fifo +ffffffff829c2700 r iwn_bands +ffffffff829c2770 r iwn_rates +ffffffff829c2820 r iwn4965_rf_gain_2ghz +ffffffff829c3000 R iwm_nvm_channels +ffffffff829c3030 R iwm_nvm_channels_8000 +ffffffff829c3070 R iwm_rates +ffffffff829c30d0 R iwm_ht_mcs2ridx +ffffffff829c3110 R iwm_tid_to_ac +ffffffff829c3118 R iwm_ac_to_tx_fifo +ffffffff829c3120 R iwm_nvm_to_read +ffffffff829c3144 r iwm_set_hw_address_8000.reserved_mac +ffffffff829c3180 r iwm_sf_full_timeout +ffffffff829c31b0 r iwm_sf_full_timeout_def +ffffffff829c31e0 r advanced_lookup +ffffffff829c3320 r iwm_devices +ffffffff829c3360 R iwm_ca +ffffffff829c4000 R iwx_9560_quz_a0_jf_b0_cfg +ffffffff829c4020 R iwx_9560_qu_c0_jf_b0_cfg +ffffffff829c4040 R iwx_qu_b0_hr1_b0 +ffffffff829c4060 R iwx_qu_b0_hr_b0 +ffffffff829c4080 R iwx_ax201_cfg_qu_hr +ffffffff829c40a0 R iwx_qu_c0_hr1_b0 +ffffffff829c40c0 R iwx_qu_c0_hr_b0 +ffffffff829c40e0 R iwx_ax201_cfg_qu_c0_hr_b0 +ffffffff829c4100 R iwx_quz_a0_hr1_b0 +ffffffff829c4120 R iwx_ax201_cfg_quz_hr +ffffffff829c4140 R iwx_cfg_so_a0_hr_b0 +ffffffff829c4160 R iwx_cfg_quz_a0_hr_b0 +ffffffff829c4180 R iwx_2ax_cfg_so_gf_a0 +ffffffff829c41a0 R iwx_2ax_cfg_so_gf_a0_long +ffffffff829c41c0 R iwx_2ax_cfg_so_gf4_a0 +ffffffff829c41e0 R iwx_2ax_cfg_so_gf4_a0_long +ffffffff829c4200 R iwx_2ax_cfg_ty_gf_a0 +ffffffff829c4220 R iwx_2ax_cfg_so_jf_b0 +ffffffff829c4240 R iwx_nvm_channels_8000 +ffffffff829c4280 R iwx_rates +ffffffff829c42e0 R iwx_mcs2ridx +ffffffff829c4320 R iwx_tid_to_ac +ffffffff829c4328 R iwx_ac_to_tx_fifo +ffffffff829c4330 r iwx_nvm_channels_uhb +ffffffff829c439e r iwx_is_valid_mac_addr.reserved_mac +ffffffff829c43b0 r iwx_sf_full_timeout +ffffffff829c43e0 r iwx_sf_full_timeout_def +ffffffff829c4410 r advanced_lookup +ffffffff829c4550 r iwx_devices +ffffffff829c4590 r iwx_dev_info_table +ffffffff829c4e18 R iwx_ca +ffffffff829c5000 R cmpci_ca +ffffffff829c5028 R cmpci_hw_if +ffffffff829c50e0 r cmpci_rate_table +ffffffff829c5120 R cmpci_devices +ffffffff829c5130 r cmpci_query_devinfo.mixer_port_names +ffffffff829c5160 r cmpci_query_devinfo.mixer_classes +ffffffff829c6000 R iha_pci_ca +ffffffff829c6028 R iha_switch +ffffffff829c7000 R pcscp_ca +ffffffff829c8000 R bge_ca +ffffffff829c8030 R bge_devices +ffffffff829c81b0 r bge_revisions +ffffffff829c8610 r bge_majorrevs +ffffffff829c8790 r bge_kstat_tpl +ffffffff829c9000 R bnx_devices +ffffffff829c9020 R bnx_ca +ffffffff829ca000 R vge_ca +ffffffff829ca028 R vge_devices +ffffffff829cb000 R stge_ca +ffffffff829cb028 R stge_mii_bitbang_ops +ffffffff829cb050 R stge_devices +ffffffff829cc000 R nfe_ca +ffffffff829cc030 R nfe_devices +ffffffff829cd000 R et_devices +ffffffff829cd008 R et_ca +ffffffff829ce000 R jme_devices +ffffffff829ce008 R jme_ca +ffffffff829cf000 R age_devices +ffffffff829cf008 R age_ca +ffffffff829d0000 R alc_devices +ffffffff829d0038 R alc_ca +ffffffff829d1000 R ale_devices +ffffffff829d1008 R ale_ca +ffffffff829d2000 R amdpm_ca +ffffffff829d2030 R amdpm_ids +ffffffff829d3000 R bce_ca +ffffffff829d3028 R bce_devices +ffffffff829d4000 R ath_pci_ca +ffffffff829d5000 R athn_pci_ca +ffffffff829d5030 r athn_pci_devices +ffffffff829d6000 R atw_pci_ca +ffffffff829d6028 R atw_pci_devices +ffffffff829d7000 R rtw_pci_ca +ffffffff829d7030 R rtw_pci_products +ffffffff829d8000 R rtwn_pci_ca +ffffffff829d8030 r rtwn_pci_devices +ffffffff829d8040 r rtl8188eu_mac +ffffffff829d81b0 r rtl8192cu_mac +ffffffff829d8310 r rtl8192ce_mac +ffffffff829d8458 r rtl8188eu_bb_prog +ffffffff829d8480 r rtl8723a_bb_prog +ffffffff829d84a8 r rtl8192ce_bb_prog_1t +ffffffff829d84d0 r rtl8192ce_bb_prog_2t +ffffffff829d8500 r rtl8188eu_bb_regs +ffffffff829d8680 r rtl8188eu_bb_vals +ffffffff829d8980 r rtl8188eu_agc_vals +ffffffff829d8b80 r rtl8723a_bb_regs +ffffffff829d8d00 r rtl8723a_bb_vals +ffffffff829d8ff0 r rtl8192ce_agc_vals +ffffffff829d9270 r rtl8192ce_bb_regs +ffffffff829d93f0 r rtl8192ce_bb_vals_1t +ffffffff829d96e0 r rtl8192ce_bb_vals_2t +ffffffff829da000 R ral_pci_ca +ffffffff829da030 R ral_pci_devices +ffffffff829db000 R acx_pci_ca +ffffffff829db028 R acx_pci_devices +ffffffff829dc000 R pgt_pci_ca +ffffffff829dc028 R pgt_pci_devices +ffffffff829dd000 R malo_pci_ca +ffffffff829dd028 R malo_pci_devices +ffffffff829de000 R bwi_pci_ca +ffffffff829de030 R bwi_pci_devices +ffffffff829df000 R piixpm_ca +ffffffff829df030 R piixpm_ids +ffffffff829e0000 R vic_ca +ffffffff829e0028 R vic_devices +ffffffff829e1000 R vmx_devices +ffffffff829e1008 R vmx_ca +ffffffff829e1030 r vmx_tx_kstat_tpl +ffffffff829e10d0 r vmx_kstat_rate +ffffffff829e10e0 r vmx_rx_kstat_tpl +ffffffff829e2000 R vmwpvs_ca +ffffffff829e2028 R vmwpvs_switch +ffffffff829e3000 R lii_ca +ffffffff829e3028 R lii_devices +ffffffff829e4000 R ichiic_ca +ffffffff829e4030 R ichiic_ids +ffffffff829e5000 R viapm_ca +ffffffff829e5030 R viapm_ids +ffffffff829e5070 r val_to_temp +ffffffff829e5870 r val_to_uV.mult +ffffffff829e6000 R amdiic_ca +ffffffff829e6028 R amdiic_ids +ffffffff829e7000 R nviic_ca +ffffffff829e7030 R nviic_ids +ffffffff829e8000 R sdhc_pci_ca +ffffffff829e9000 R kate_ca +ffffffff829e9030 r kate_proc +ffffffff829ea000 R km_ca +ffffffff829ea030 r km_devices +ffffffff829eb000 R ksmn_ca +ffffffff829eb030 r ksmn_devices +ffffffff829ec000 R iosf_pci_ca +ffffffff829ed000 R itherm_devices +ffffffff829ed008 R itherm_ca +ffffffff829ee000 R pchtemp_ca +ffffffff829ee030 R pchtemp_devices +ffffffff829ef000 R rtsx_pci_ca +ffffffff829f0000 R xspd_ca +ffffffff829f0028 R xspd_devices +ffffffff829f1000 R virtio_pci_ca +ffffffff829f2000 R dwiic_pci_ca +ffffffff829f2030 R dwiic_pci_ids +ffffffff829f3000 R bwfm_pci_ca +ffffffff829f3030 r bwfm_pci_devices +ffffffff829f4000 R ccp_pci_ca +ffffffff829f4030 r ccp_pci_devices +ffffffff829f5000 R bnxt_devices +ffffffff829f5040 R bnxt_ca +ffffffff829f6000 R mcx_ca +ffffffff829f6030 r mcx_devices +ffffffff829f6060 r mcx_rss_config +ffffffff829f60d0 r mcx_eth_cap_map +ffffffff829f62d0 r mcx_kstat_ppcnt_ieee8023 +ffffffff829f62e8 r mcx_kstat_ppcnt_rfc2863 +ffffffff829f6300 r mcx_kstat_ppcnt_rfc2819 +ffffffff829f6318 r mcx_kstat_ppcnt_rfc3635 +ffffffff829f6330 r mcx_ppcnt_ieee8023_tpl +ffffffff829f64b0 r mcx_ppcnt_rfc2863_tpl +ffffffff829f65c0 r mcx_ppcnt_rfc2819_tpl +ffffffff829f6770 r mcx_ppcnt_rfc3635_tpl +ffffffff829f68b0 r mcx_kstat_mtmp_tpl +ffffffff829f6950 r mcx_kstat_mtmp_rate +ffffffff829f6960 r mcx_queue_kstat_tpl +ffffffff829f7000 R iavf_ca +ffffffff829f7030 r iavf_devices +ffffffff829f7040 r iavf_aq_regs +ffffffff829f70b0 r iavf_link_speeds +ffffffff829f8000 R rge_ca +ffffffff829f8028 R rge_devices +ffffffff829f8030 r rge_phy_config_mac_cfg3.mac_cfg3_a438_value +ffffffff829f8050 r rge_phy_config_mac_cfg3.mac_cfg3_b88e_value +ffffffff829f80b0 r rtl8125_mac_cfg3_mcu +ffffffff829f8950 r rtl8125_mac_cfg5_mcu +ffffffff829f9970 r rtl8125_mac_bps +ffffffff829f9d70 r rtl8125b_mac_bps +ffffffff829f9f98 r rge_kstats_tpl +ffffffff829fb000 R igc_devices +ffffffff829fb040 R igc_ca +ffffffff829fc000 R ngbe_devices +ffffffff829fc008 R ngbe_ca +ffffffff829fd000 R com_pci_ca +ffffffff829fd030 R com_pci_ids +ffffffff829fe000 r agp_attach.agp_max +ffffffff829fe048 R agp_ca +ffffffff829ff000 R intagp_ca +ffffffff82a00000 r drm_plane_create_rotation_property.props +ffffffff82a01000 r drm_bridge_priv_state_funcs +ffffffff82a03000 r color_encoding_name +ffffffff82a03020 r color_range_name +ffffffff82a04000 r drm_subpixel_enum_list +ffffffff82a04060 r drm_dpms_enum_list +ffffffff82a040a0 r drm_dvi_i_select_enum_list +ffffffff82a040d0 r drm_dvi_i_subconnector_enum_list +ffffffff82a04100 r drm_tv_mode_enum_list +ffffffff82a04170 r drm_tv_select_enum_list +ffffffff82a041c0 r drm_tv_subconnector_enum_list +ffffffff82a04210 r drm_dp_subconnector_enum_list +ffffffff82a04280 r colorspace_names +ffffffff82a04300 r drm_link_status_enum_list +ffffffff82a04320 r drm_scaling_mode_enum_list +ffffffff82a04360 r drm_aspect_ratio_enum_list +ffffffff82a04390 r drm_content_type_enum_list +ffffffff82a043e0 r drm_panel_orientation_enum_list +ffffffff82a04420 r privacy_screen_enum +ffffffff82a05000 r drm_crtc_fence_ops +ffffffff82a06000 r drm_dmt_modes +ffffffff82a08940 r edid_cea_modes_1 +ffffffff82a0c4d0 r edid_cea_modes_193 +ffffffff82a0d180 r edid_quirk_list +ffffffff82a0d360 r drm_mode_do_interlace_quirk.cea_interlaced +ffffffff82a0d3a0 r edid_4k_modes +ffffffff82a0d600 r edid_est_modes +ffffffff82a0de00 r est3_modes +ffffffff82a0df60 r stereo_mandatory_modes +ffffffff82a0dfe0 r extra_modes +ffffffff82a0f000 r drm_encoder_enum_list +ffffffff82a11000 r drm_fbdev_dma_helper_funcs +ffffffff82a11010 r drm_fbdev_dma_client_funcs +ffffffff82a11030 r drm_fbdev_dma_fb_ops +ffffffff82a12000 r drm_fbdev_generic_helper_funcs +ffffffff82a12010 r drm_fbdev_generic_client_funcs +ffffffff82a12030 r drm_fbdev_generic_fb_ops +ffffffff82a14000 r drm_fb_xrgb8888_to_rgb332.dst_pixsize +ffffffff82a14004 r drm_fb_xrgb8888_to_rgb565.dst_pixsize +ffffffff82a14008 r drm_fb_xrgb8888_to_xrgb1555.dst_pixsize +ffffffff82a1400c r drm_fb_xrgb8888_to_argb1555.dst_pixsize +ffffffff82a14010 r drm_fb_xrgb8888_to_rgba5551.dst_pixsize +ffffffff82a14014 r drm_fb_xrgb8888_to_rgb888.dst_pixsize +ffffffff82a14018 r drm_fb_xrgb8888_to_argb8888.dst_pixsize +ffffffff82a1401c r drm_fb_xrgb8888_to_xrgb2101010.dst_pixsize +ffffffff82a14020 r drm_fb_xrgb8888_to_argb2101010.dst_pixsize +ffffffff82a14024 r drm_fb_xrgb8888_to_gray8.dst_pixsize +ffffffff82a14028 r drm_fb_xrgb8888_to_xbgr8888.dst_pixsize +ffffffff82a1402c r drm_fb_xrgb8888_to_abgr8888.dst_pixsize +ffffffff82a15000 r __drm_format_info.formats +ffffffff82a16000 R drm_pgops +ffffffff82a17000 r drm_gem_dma_default_funcs +ffffffff82a18000 R drm_gem_fb_funcs +ffffffff82a19000 r drm_ioctls +ffffffff82a1b000 r dma_fence_stub_ops +ffffffff82a1b040 R dma_fence_array_ops +ffffffff82a1b080 R dma_fence_chain_ops +ffffffff82a1b0c0 R dmabufops +ffffffff82a1b0f8 R syncfileops +ffffffff82a1c000 r drm_plane_type_enum_list +ffffffff82a1d000 r tv_modes_parameters +ffffffff82a1d0c0 r drm_mode_status_names +ffffffff82a1d200 r drm_named_modes +ffffffff82a1e000 r primary_plane_funcs +ffffffff82a1e068 r safe_modeset_formats +ffffffff82a1f000 r orientation_data +ffffffff82a22718 r lcd800x1280_rightside_up +ffffffff82a22730 r lcd720x1280_rightside_up +ffffffff82a22748 r lcd800x1280_leftside_up +ffffffff82a22760 r lcd1080x1920_leftside_up +ffffffff82a22778 r lcd1200x1920_rightside_up +ffffffff82a22790 r gpd_micropc +ffffffff82a227a8 r gpd_pocket +ffffffff82a227c0 r gpd_pocket2 +ffffffff82a227d8 r gpd_win +ffffffff82a227f0 r gpd_win2 +ffffffff82a22808 r itworks_tw891 +ffffffff82a22820 r lcd1600x2560_rightside_up +ffffffff82a22838 r onegx1_pro +ffffffff82a22850 r lcd1600x2560_leftside_up +ffffffff82a22868 r lcd1280x1920_rightside_up +ffffffff82a22880 r gpd_onemix2s +ffffffff82a22898 r .compoundliteral +ffffffff82a228a8 r .compoundliteral.5 +ffffffff82a228d0 r .compoundliteral.9 +ffffffff82a228f0 r .compoundliteral.17 +ffffffff82a22930 r .compoundliteral.21 +ffffffff82a22950 r .compoundliteral.23 +ffffffff82a22960 r .compoundliteral.25 +ffffffff82a22970 r .compoundliteral.29 +ffffffff82a23000 r drm_gem_prime_dmabuf_ops +ffffffff82a25000 r is_hdmi_adaptor.dp_dual_mode_hdmi_id +ffffffff82a26000 r drm_dp_phy_name.phy_names +ffffffff82a26048 r drm_dp_i2c_algo +ffffffff82a26058 r drm_dp_i2c_lock_ops +ffffffff82a26070 r dp_aux_bl_ops +ffffffff82a26090 r dpcd_quirk_list +ffffffff82a26320 r drm_dp_psr_setup_time.psr_setup_time_us +ffffffff82a27000 R drm_dp_mst_topology_state_funcs +ffffffff82a27020 r drm_dp_mst_req_type_str.req_type_str +ffffffff82a271f0 r drm_dp_mst_sideband_tx_state_str.sideband_reason_str +ffffffff82a27220 r drm_dp_mst_nak_reason_str.nak_reason_str +ffffffff82a27278 r drm_dp_mst_i2c_algo +ffffffff82a28000 r rc_parameters_1_2_444 +ffffffff82a285f0 r rc_parameters_pre_scr +ffffffff82a28920 r rc_parameters_1_2_422 +ffffffff82a28df0 r rc_parameters_1_2_420 +ffffffff82a2a000 r hdmi_colorimetry_val +ffffffff82a2b018 R ttm_bo_vm_ops +ffffffff82a2c000 r ttm_range_manager_func +ffffffff82a2d018 r ttm_kmap_iter_io_ops +ffffffff82a2d030 r ttm_kmap_iter_linear_io_ops +ffffffff82a2e000 r ttm_sys_manager_func +ffffffff82a2f000 r ttm_kmap_iter_tt_ops +ffffffff82a30000 r drm_sched_fence_ops_scheduled +ffffffff82a30040 r drm_sched_fence_ops_finished +ffffffff82a31000 R ch7017_ops +ffffffff82a32000 R ch7xxx_ops +ffffffff82a32060 r ch7xxx_ids +ffffffff82a33000 R ivch_ops +ffffffff82a33060 r backup_addresses +ffffffff82a34000 R ns2501_ops +ffffffff82a34060 r mode_agnostic_values +ffffffff82a340e0 r ns2501_modes +ffffffff82a35000 R sil164_ops +ffffffff82a36000 R tfp410_ops +ffffffff82a37000 r chv_dpll +ffffffff82a37050 r vlv_dpll +ffffffff82a370a0 r g4x_dpll +ffffffff82a370f0 r pch_dpll +ffffffff82a37138 r intel_dp_enc_funcs +ffffffff82a38000 r intel_hdmi_enc_funcs +ffffffff82a39000 r vlv_primary_formats +ffffffff82a39030 r ivb_primary_formats +ffffffff82a39050 r i965_primary_formats +ffffffff82a39070 r i8xx_primary_formats +ffffffff82a39080 r i965_plane_funcs +ffffffff82a390e8 r i8xx_plane_funcs +ffffffff82a3a000 r ilk_wm_funcs +ffffffff82a3a040 r vlv_wm_funcs +ffffffff82a3a080 r g4x_wm_funcs +ffffffff82a3a0c0 r nop_funcs +ffffffff82a3a100 r pnv_wm_funcs +ffffffff82a3a140 r i965_wm_funcs +ffffffff82a3a180 r i9xx_wm_funcs +ffffffff82a3a1c0 r i845_wm_funcs +ffffffff82a3a200 r cxsr_latency_table +ffffffff82a3b000 r gen11_dsi_encoder_funcs +ffffffff82a3b020 r gen11_dsi_connector_funcs +ffffffff82a3b098 r gen11_dsi_connector_helper_funcs +ffffffff82a3b0f8 r gen11_dsi_host_ops +ffffffff82a3c000 r intel_plane_helper_funcs +ffffffff82a3d000 r g4x_audio_funcs +ffffffff82a3d018 r ibx_audio_funcs +ffffffff82a3d030 r hsw_audio_funcs +ffffffff82a3d050 r hdmi_audio_clock +ffffffff82a3d0c0 r dp_aud_n_m +ffffffff82a3d270 r hdmi_aud_ncts_36bpp +ffffffff82a3d350 r hdmi_aud_ncts_30bpp +ffffffff82a3d430 r hdmi_aud_ncts_24bpp +ffffffff82a3e000 r intel_backlight_device_ops +ffffffff82a3e018 r bxt_pwm_funcs +ffffffff82a3e048 r cnp_pwm_funcs +ffffffff82a3e078 r lpt_pwm_funcs +ffffffff82a3e0a8 r spt_pwm_funcs +ffffffff82a3e0d8 r pch_pwm_funcs +ffffffff82a3e108 r ext_pwm_funcs +ffffffff82a3e138 r vlv_pwm_funcs +ffffffff82a3e168 r i965_pwm_funcs +ffffffff82a3e198 r i9xx_pwm_funcs +ffffffff82a3e1c8 r pwm_bl_funcs +ffffffff82a3f000 r bdb_blocks +ffffffff82a3f160 r adlp_aux_ch_map +ffffffff82a3f169 r adls_aux_ch_map +ffffffff82a3f170 r rkl_aux_ch_map +ffffffff82a3f175 r direct_aux_ch_map +ffffffff82a3f17e r translate_iboost.mapping +ffffffff82a3f181 r adlp_ddc_pin_map +ffffffff82a3f18e r adls_ddc_pin_map +ffffffff82a3f19b r rkl_pch_tgp_ddc_pin_map +ffffffff82a3f1a6 r gen9bc_tgp_ddc_pin_map +ffffffff82a3f1b1 r icp_ddc_pin_map +ffffffff82a3f1c0 r cnp_ddc_pin_map +ffffffff82a40000 r mtl_sa_info +ffffffff82a40006 r adlp_sa_info +ffffffff82a4000c r adls_sa_info +ffffffff82a40012 r rkl_sa_info +ffffffff82a40018 r tgl_sa_info +ffffffff82a40020 r intel_bw_funcs +ffffffff82a41000 r intel_cdclk_funcs +ffffffff82a41010 r mtl_cdclk_funcs +ffffffff82a41030 r mtl_cdclk_table +ffffffff82a41088 r tgl_cdclk_funcs +ffffffff82a410b0 r dg2_cdclk_table +ffffffff82a41160 r adlp_a_step_cdclk_table +ffffffff82a411e0 r rplu_cdclk_table +ffffffff82a412c8 r rplu_cdclk_funcs +ffffffff82a412f0 r adlp_cdclk_table +ffffffff82a413b0 r rkl_cdclk_table +ffffffff82a414a0 r icl_cdclk_table +ffffffff82a41588 r ehl_cdclk_funcs +ffffffff82a415a8 r icl_cdclk_funcs +ffffffff82a415c8 r bxt_cdclk_funcs +ffffffff82a415f0 r glk_cdclk_table +ffffffff82a41620 r bxt_cdclk_table +ffffffff82a41668 r skl_cdclk_funcs +ffffffff82a41688 r bdw_cdclk_funcs +ffffffff82a416a8 r hsw_cdclk_funcs +ffffffff82a416c8 r chv_cdclk_funcs +ffffffff82a416e8 r vlv_cdclk_funcs +ffffffff82a41708 r fixed_400mhz_cdclk_funcs +ffffffff82a41728 r ilk_cdclk_funcs +ffffffff82a41748 r gm45_cdclk_funcs +ffffffff82a41768 r g33_cdclk_funcs +ffffffff82a41788 r i965gm_cdclk_funcs +ffffffff82a417a8 r pnv_cdclk_funcs +ffffffff82a417c8 r i945gm_cdclk_funcs +ffffffff82a417e8 r i915gm_cdclk_funcs +ffffffff82a41808 r i915g_cdclk_funcs +ffffffff82a41828 r i865g_cdclk_funcs +ffffffff82a41848 r i85x_cdclk_funcs +ffffffff82a41868 r i845g_cdclk_funcs +ffffffff82a41888 r i830_cdclk_funcs +ffffffff82a418a8 r g33_get_cdclk.div_3200 +ffffffff82a418ae r g33_get_cdclk.div_4000 +ffffffff82a418b4 r g33_get_cdclk.div_4800 +ffffffff82a418ba r g33_get_cdclk.div_5333 +ffffffff82a418c0 r i965gm_get_cdclk.div_3200 +ffffffff82a418c3 r i965gm_get_cdclk.div_4000 +ffffffff82a418c6 r i965gm_get_cdclk.div_5333 +ffffffff82a42000 r chv_color_funcs +ffffffff82a42040 r vlv_color_funcs +ffffffff82a42080 r i965_color_funcs +ffffffff82a420c0 r i9xx_color_funcs +ffffffff82a42100 r tgl_color_funcs +ffffffff82a42140 r icl_color_funcs +ffffffff82a42180 r glk_color_funcs +ffffffff82a421c0 r skl_color_funcs +ffffffff82a42200 r bdw_color_funcs +ffffffff82a42240 r hsw_color_funcs +ffffffff82a42280 r ivb_color_funcs +ffffffff82a422c0 r ilk_color_funcs +ffffffff82a42300 r chv_cgm_csc_matrix_identity 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intel_region_map +ffffffff82abf000 r dg2_g10_revid_step_tbl +ffffffff82abf030 r dg2_g11_revid_step_tbl +ffffffff82abf050 r xehpsdv_revids +ffffffff82abf080 r adlp_rplp_revids +ffffffff82abf0a0 r adlp_revids +ffffffff82abf0e0 r adls_rpls_revids +ffffffff82abf120 r adls_revids +ffffffff82abf160 r rkl_revids +ffffffff82abf180 r bxt_revids +ffffffff82abf1c0 r skl_revids +ffffffff82abf1f0 r pvc_bd_subids +ffffffff82abf210 r pvc_ct_subids +ffffffff82ac1000 r forcewake_domain_names +ffffffff82ac1080 r __mtl_fw_ranges +ffffffff82ac11f0 r mtl_shadowed_regs +ffffffff82ac1270 r __pvc_fw_ranges +ffffffff82ac1420 r pvc_shadowed_regs +ffffffff82ac1540 r __dg2_fw_ranges +ffffffff82ac1810 r dg2_shadowed_regs +ffffffff82ac1930 r __xehp_fw_ranges +ffffffff82ac1c00 r gen12_shadowed_regs +ffffffff82ac1d20 r __gen12_fw_ranges +ffffffff82ac1f30 r __gen11_fw_ranges +ffffffff82ac20e0 r gen11_shadowed_regs +ffffffff82ac21a0 r __gen9_fw_ranges +ffffffff82ac2320 r gen8_shadowed_regs +ffffffff82ac2350 r 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cac_weights_cayman_le +ffffffff82ae2380 r cayman_cgcg_cgls_default +ffffffff82ae25c0 r cayman_mgcg_default +ffffffff82ae2f20 r cayman_sysls_default +ffffffff82ae2ff0 r cayman_cgcg_cgls_enable +ffffffff82ae3240 r cayman_cgcg_cgls_disable +ffffffff82ae34a0 r cayman_mgcg_enable +ffffffff82ae3520 r cayman_mgcg_disable +ffffffff82ae35a0 r cayman_sysls_enable +ffffffff82ae3670 r cayman_sysls_disable +ffffffff82ae4000 r rn50_reg_safe_bm +ffffffff82ae41a0 r r100_reg_safe_bm +ffffffff82ae5000 r r200_reg_safe_bm +ffffffff82ae6000 r r300_reg_safe_bm +ffffffff82ae7000 r r420_reg_safe_bm +ffffffff82ae9000 r color_formats_table +ffffffff82ae9480 r r600_reg_safe_bm +ffffffff82aec000 R r600_utc +ffffffff82aec040 R r600_dtc +ffffffff82aec080 r r600_encode_pci_lane_width.encoded_lanes +ffffffff82aee000 r r100_gfx_ring +ffffffff82aee070 r r300_gfx_ring +ffffffff82aee0e0 r rv515_gfx_ring +ffffffff82aee150 r r600_gfx_ring +ffffffff82aee1c0 r r600_dma_ring +ffffffff82aee230 r rv6xx_uvd_ring +ffffffff82aee2a0 r rv770_uvd_ring +ffffffff82aee310 r evergreen_gfx_ring +ffffffff82aee380 r evergreen_dma_ring +ffffffff82aee3f0 r cayman_gfx_ring +ffffffff82aee460 r cayman_dma_ring +ffffffff82aee4d0 r cayman_uvd_ring +ffffffff82aee540 r trinity_vce_ring +ffffffff82aee5b0 r si_gfx_ring +ffffffff82aee620 r si_dma_ring +ffffffff82aee690 r ci_gfx_ring +ffffffff82aee700 r ci_cp_ring +ffffffff82aee770 r ci_dma_ring +ffffffff82aee7e0 r ci_vce_ring +ffffffff82aef000 r object_connector_convert +ffffffff82aef060 r supported_devices_connector_convert +ffffffff82aef0a0 r supported_devices_connector_object_id_convert +ffffffff82aef0c0 r thermal_controller_names +ffffffff82aef100 r pp_lib_thermal_controller_names +ffffffff82af0000 r pin_offsets +ffffffff82af0020 r radeon_audio_acr.hdmi_predefined_acr +ffffffff82af2000 r thermal_controller_names +ffffffff82af2020 r default_primarydac_adj +ffffffff82af2120 r default_tvdac_adj +ffffffff82af2220 r default_tmds_pll +ffffffff82af3000 r radeon_dp_connector_funcs +ffffffff82af3078 r radeon_dp_connector_helper_funcs +ffffffff82af30d8 r radeon_lvds_bridge_connector_funcs +ffffffff82af3150 r radeon_vga_connector_funcs +ffffffff82af31c8 r radeon_vga_connector_helper_funcs +ffffffff82af3228 r radeon_dvi_connector_funcs +ffffffff82af32a0 r radeon_dvi_connector_helper_funcs +ffffffff82af3300 r radeon_edp_connector_funcs +ffffffff82af3378 r radeon_tv_connector_funcs +ffffffff82af33f0 r radeon_tv_connector_helper_funcs +ffffffff82af3450 r radeon_lvds_connector_funcs +ffffffff82af34c8 r radeon_lvds_connector_helper_funcs +ffffffff82af4000 r radeon_family_name +ffffffff82af43f0 r radeon_px_quirk_list +ffffffff82af5000 r radeon_fb_funcs +ffffffff82af5018 r radeon_mode_funcs +ffffffff82af5060 r radeon_tmds_pll_enum_list +ffffffff82af5080 r radeon_tv_std_enum_list +ffffffff82af5100 r radeon_underscan_enum_list +ffffffff82af5130 r radeon_audio_enum_list +ffffffff82af5160 r radeon_dither_enum_list +ffffffff82af5180 r radeon_output_csc_enum_list +ffffffff82af51c0 r radeon_crtc_funcs +ffffffff82af5280 r hpd_names +ffffffff82af52b0 r encoder_names +ffffffff82af53e0 r radeon_afmt_init.eg_offsets +ffffffff82af6000 r aux_offset +ffffffff82af7000 R radeondrm_ca +ffffffff82af7030 r pciidlist +ffffffff82afb1d0 r kms_driver +ffffffff82afb2c0 r radeon_ioctls_kms +ffffffff82afc000 r radeon_fbdev_fb_helper_funcs +ffffffff82afc010 r radeon_fbdev_client_funcs +ffffffff82afc030 r radeon_fbdev_fb_ops +ffffffff82afd000 R radeon_fence_ops +ffffffff82aff000 R radeon_gem_object_funcs +ffffffff82aff070 r radeon_gem_vm_ops +ffffffff82b00000 r radeon_i2c_algo +ffffffff82b00010 r radeon_atom_i2c_algo +ffffffff82b01000 r legacy_helper_funcs +ffffffff82b02000 r radeon_backlight_ops +ffffffff82b02018 r radeon_legacy_lvds_enc_funcs +ffffffff82b02038 r radeon_legacy_lvds_helper_funcs +ffffffff82b020a0 r radeon_legacy_tmds_int_enc_funcs +ffffffff82b020c0 r radeon_legacy_tmds_int_helper_funcs +ffffffff82b02128 r radeon_legacy_primary_dac_enc_funcs +ffffffff82b02148 r radeon_legacy_primary_dac_helper_funcs +ffffffff82b021b0 r radeon_legacy_tv_dac_enc_funcs +ffffffff82b021d0 r radeon_legacy_tv_dac_helper_funcs +ffffffff82b02238 r radeon_legacy_tmds_ext_enc_funcs +ffffffff82b02258 r radeon_legacy_tmds_ext_helper_funcs +ffffffff82b03000 r SLOPE_value +ffffffff82b03030 r YCOEF_EN_value +ffffffff82b03060 r YCOEF_value +ffffffff82b03090 r available_tv_modes +ffffffff82b03110 r hor_timing_NTSC +ffffffff82b03150 r vert_timing_NTSC +ffffffff82b03190 r hor_timing_PAL +ffffffff82b031d0 r vert_timing_PAL +ffffffff82b05000 r radeon_pm_state_type_name +ffffffff82b06000 r radeon_evict_flags.placements +ffffffff82b09000 r rs600_reg_safe_bm +ffffffff82b0b000 r rv515_reg_safe_bm +ffffffff82b0c000 r dll_speed_table +ffffffff82b0d000 r r7xx_golden_registers +ffffffff82b0d090 r r7xx_golden_dyn_gpr_registers +ffffffff82b0d100 r rv770ce_golden_registers +ffffffff82b0d160 r rv770_golden_registers +ffffffff82b0d1b0 r rv770_mgcg_init +ffffffff82b0d8f0 r rv730_golden_registers +ffffffff82b0d950 r rv730_mgcg_init +ffffffff82b0dee0 r rv710_golden_registers +ffffffff82b0df30 r rv710_mgcg_init +ffffffff82b0e1d0 r rv740_golden_registers +ffffffff82b0e360 r rv740_mgcg_init +ffffffff82b10000 r rv730_smc_int_vectors +ffffffff82b10040 r rv710_smc_int_vectors +ffffffff82b10080 r rv740_smc_int_vectors +ffffffff82b100c0 r cypress_smc_int_vectors +ffffffff82b10100 r caicos_smc_int_vectors +ffffffff82b10140 r cayman_smc_int_vectors +ffffffff82b11000 r tahiti_io_mc_regs +ffffffff82b11120 r pitcairn_io_mc_regs +ffffffff82b11240 r verde_io_mc_regs +ffffffff82b11360 r oland_io_mc_regs +ffffffff82b11480 r hainan_io_mc_regs +ffffffff82b115a0 r crtc_offsets +ffffffff82b115c0 r si_disp_int_status +ffffffff82b115e0 r tahiti_golden_registers +ffffffff82b11760 r tahiti_golden_rlc_registers +ffffffff82b117b0 r tahiti_mgcg_cgcg_init +ffffffff82b11d98 r tahiti_golden_registers2 +ffffffff82b11db0 r pitcairn_golden_registers +ffffffff82b11f00 r pitcairn_golden_rlc_registers +ffffffff82b11f40 r pitcairn_mgcg_cgcg_init +ffffffff82b123b0 r verde_golden_registers +ffffffff82b12620 r verde_golden_rlc_registers +ffffffff82b12660 r verde_mgcg_cgcg_init +ffffffff82b12ae0 r oland_golden_registers +ffffffff82b12c30 r oland_golden_rlc_registers +ffffffff82b12c70 r oland_mgcg_cgcg_init +ffffffff82b13000 r hainan_golden_registers +ffffffff82b1312c r hainan_golden_registers2 +ffffffff82b13140 r hainan_mgcg_cgcg_init +ffffffff82b134b0 r verde_rlc_save_restore_register_list +ffffffff82b13820 r si_cs_data +ffffffff82b13840 r si_SECT_CONTEXT_defs +ffffffff82b138c0 r si_SECT_CONTEXT_def_1 +ffffffff82b13c10 r si_SECT_CONTEXT_def_3 +ffffffff82b13c30 r si_SECT_CONTEXT_def_4 +ffffffff82b13ea4 r si_SECT_CONTEXT_def_5 +ffffffff82b13ea8 r si_SECT_CONTEXT_def_6 +ffffffff82b13eb0 r si_SECT_CONTEXT_def_2 +ffffffff82b142f0 r si_SECT_CONTEXT_def_7 +ffffffff82b146a0 r mc_cg_registers +ffffffff82b146d0 r si_default_state +ffffffff82b15000 r cac_weights_tahiti +ffffffff82b154d0 r lcac_tahiti +ffffffff82b15ba0 r cac_override_tahiti +ffffffff82b15bb4 r powertune_data_tahiti +ffffffff82b15bf0 r dte_data_tahiti +ffffffff82b15cc0 r dte_data_new_zealand +ffffffff82b15d90 r dte_data_malta +ffffffff82b15e60 r lcac_pitcairn +ffffffff82b16530 r cac_override_pitcairn +ffffffff82b16544 r powertune_data_pitcairn +ffffffff82b16580 r lcac_cape_verde +ffffffff82b169d0 r cac_override_cape_verde +ffffffff82b169e4 r powertune_data_cape_verde +ffffffff82b16a20 r cac_weights_cape_verde_pro +ffffffff82b16ef0 r cac_weights_heathrow +ffffffff82b173c0 r cac_weights_chelsea_xt +ffffffff82b17890 r cac_weights_chelsea_pro +ffffffff82b17d60 r cac_weights_cape_verde +ffffffff82b18230 r cac_weights_mars_pro +ffffffff82b18700 r lcac_mars_pro +ffffffff82b18a60 r cac_override_oland +ffffffff82b18a74 r powertune_data_mars_pro +ffffffff82b18ab0 r cac_weights_mars_xt +ffffffff82b18f80 r cac_weights_oland_pro +ffffffff82b19450 r cac_weights_oland_xt +ffffffff82b19920 r lcac_oland +ffffffff82b19c7c r powertune_data_oland +ffffffff82b19cc0 r cac_weights_hainan +ffffffff82b1a184 r powertune_data_hainan +ffffffff82b1a1c0 r dte_data_aruba_pro +ffffffff82b1a290 r dte_data_tahiti_pro +ffffffff82b1a360 r dte_data_curacao_pro +ffffffff82b1a430 r dte_data_neptune_xt +ffffffff82b1a500 r dte_data_sun_xt +ffffffff82b1a5d0 r dte_data_venus_xtx +ffffffff82b1a6a0 r dte_data_venus_xt +ffffffff82b1a770 r dte_data_venus_pro +ffffffff82b1a840 r dte_data_mars_pro +ffffffff82b1b000 r si_program_jump_on_start.data +ffffffff82b1c000 r sumo_dtc +ffffffff82b1d000 r trinity_mgcg_shls_default +ffffffff82b1d380 r trinity_sysls_enable +ffffffff82b1d450 r trinity_sysls_disable +ffffffff82b1f000 r GC_BASE +ffffffff82b1f0a8 r HDP_BASE +ffffffff82b1f150 r MMHUB_BASE +ffffffff82b1f1f8 r ATHUB_BASE +ffffffff82b1f2a0 r NBIO_BASE +ffffffff82b1f348 r MP0_BASE +ffffffff82b1f3f0 r MP1_BASE +ffffffff82b1f498 r DF_BASE +ffffffff82b1f540 r OSSSYS_BASE +ffffffff82b1f5e8 r SDMA0_BASE +ffffffff82b1f690 r SDMA1_BASE +ffffffff82b1f738 r SDMA2_BASE +ffffffff82b1f7e0 r SDMA3_BASE +ffffffff82b1f888 r SDMA4_BASE +ffffffff82b1f930 r SMUIO_BASE +ffffffff82b1f9d8 r THM_BASE +ffffffff82b1fa80 r UMC_BASE +ffffffff82b1fb28 r VCN_BASE +ffffffff82b20000 r amdgpu_afmt_predefined_acr +ffffffff82b21000 r atom_op_names +ffffffff82b213e0 r opcode_table +ffffffff82b21bd0 r atom_dst_to_src +ffffffff82b21c50 r atom_io_names +ffffffff82b21c80 r atom_table_names +ffffffff82b21ed0 r atom_iio_len +ffffffff82b22000 r object_connector_convert +ffffffff82b22058 R amdgpu_vbios_version_attr_group +ffffffff82b23000 r voltage_names +ffffffff82b23020 r pre_emph_names +ffffffff82b24000 r amdgpu_atombios_encoder_backlight_ops +ffffffff82b26000 r amdgpu_benchmark.common_modes +ffffffff82b27000 r amdgpu_cgs_ops +ffffffff82b28000 r amdgpu_connector_dp_funcs +ffffffff82b28078 r amdgpu_connector_dp_helper_funcs +ffffffff82b280d8 r amdgpu_connector_edp_funcs +ffffffff82b28150 r amdgpu_connector_vga_funcs +ffffffff82b281c8 r amdgpu_connector_vga_helper_funcs +ffffffff82b28228 r amdgpu_connector_dvi_funcs +ffffffff82b282a0 r amdgpu_connector_dvi_helper_funcs +ffffffff82b28300 r amdgpu_connector_lvds_funcs +ffffffff82b28378 r amdgpu_connector_lvds_helper_funcs +ffffffff82b283e0 r amdgpu_connector_add_common_modes.common_modes +ffffffff82b2a000 R amdgpu_ctx_num_entities +ffffffff82b2b000 r amdgpu_kms_driver +ffffffff82b2b0f0 r amdgpu_device_ip_reinit_late_sriov.ip_order +ffffffff82b2c000 r hw_id_map +ffffffff82b2c090 r hw_id_names +ffffffff82b2d000 r hpd_names +ffffffff82b2d030 r encoder_names +ffffffff82b2d180 r dcc_retile_formats +ffffffff82b2d270 r dcc_formats +ffffffff82b2d360 R amdgpu_mode_funcs +ffffffff82b2d3b0 r amdgpu_underscan_enum_list +ffffffff82b2d3e0 r amdgpu_audio_enum_list +ffffffff82b2d410 r amdgpu_dither_enum_list +ffffffff82b2d430 r amdgpu_fb_funcs_atomic +ffffffff82b2d448 r amdgpu_fb_funcs +ffffffff82b2e000 R amdgpu_dmabuf_ops +ffffffff82b2f000 R amdgpu_ioctls_kms +ffffffff82b2f210 R amdgpu_partition_driver +ffffffff82b2f2f8 R amdgpu_ca +ffffffff82b2f320 r pciidlist +ffffffff82b301f0 r amdgpu_unsupported_pciidlist +ffffffff82b30770 r amdgpu_kms_driver +ffffffff82b31000 r amdgpu_job_fence_ops +ffffffff82b31040 r amdgpu_fence_ops +ffffffff82b32000 r amdgpu_gem_object_funcs +ffffffff82b32070 r amdgpu_gem_vm_ops +ffffffff82b33000 R amdgpu_gtt_mgr_attr_group +ffffffff82b33018 r amdgpu_gtt_mgr_func +ffffffff82b34000 r amdgpu_atombios_i2c_algo +ffffffff82b35000 R node_id_to_phys_map +ffffffff82b36000 R amdgpu_sched_ops +ffffffff82b38000 r amdgpu_vram_names +ffffffff82b39000 r amdgpu_preempt_mgr_func +ffffffff82b3a000 R psp_ip_funcs +ffffffff82b3a0a0 R psp_v3_1_ip_block +ffffffff82b3a0b8 R psp_v10_0_ip_block +ffffffff82b3a0d0 R psp_v11_0_ip_block +ffffffff82b3a0e8 R psp_v11_0_8_ip_block +ffffffff82b3a100 R psp_v12_0_ip_block +ffffffff82b3a118 R psp_v13_0_ip_block +ffffffff82b3a130 R psp_v13_0_4_ip_block +ffffffff82b3c000 r sw_ring_info +ffffffff82b3d000 r amdgpu_evict_flags.placements +ffffffff82b41000 R amdgpu_vkms_ip_block +ffffffff82b42000 R amdgpu_vm_cpu_funcs +ffffffff82b44000 R amdgpu_vm_sdma_funcs +ffffffff82b45000 R amdgpu_vram_mgr_attr_group +ffffffff82b45018 r amdgpu_vram_mgr_func +ffffffff82b45040 r amdgpu_dummy_vram_mgr_func +ffffffff82b46000 r xgmi_pcs_err_status_reg_arct +ffffffff82b46020 r xgmi3x16_pcs_ras_fields +ffffffff82b461f0 r xgmi_pcs_ras_fields +ffffffff82b46310 r wafl_pcs_ras_fields +ffffffff82b47000 r GC_BASE +ffffffff82b470c0 r HDP_BASE +ffffffff82b47180 r MMHUB_BASE +ffffffff82b47240 r ATHUB_BASE +ffffffff82b47300 r NBIF0_BASE +ffffffff82b473c0 r MP0_BASE +ffffffff82b47480 r MP1_BASE +ffffffff82b47540 r UVD_BASE +ffffffff82b47600 r DF_BASE +ffffffff82b476c0 r OSSSYS_BASE +ffffffff82b47780 r SDMA0_BASE +ffffffff82b47840 r SDMA1_BASE +ffffffff82b47900 r SDMA2_BASE +ffffffff82b479c0 r SDMA3_BASE +ffffffff82b47a80 r SDMA4_BASE +ffffffff82b47b40 r SDMA5_BASE +ffffffff82b47c00 r SDMA6_BASE +ffffffff82b47cc0 r SDMA7_BASE +ffffffff82b47d80 r SMUIO_BASE +ffffffff82b47e40 r THM_BASE +ffffffff82b47f00 r UMC_BASE +ffffffff82b47fc0 r RSMU_BASE +ffffffff82b49000 r cz_ih_ip_funcs +ffffffff82b490a0 R cz_ih_ip_block +ffffffff82b490b8 r cz_ih_funcs +ffffffff82b4a000 r crtc_offsets +ffffffff82b4a020 r dce_v10_0_ip_funcs +ffffffff82b4a0c0 R dce_v10_0_ip_block +ffffffff82b4a0d8 R dce_v10_1_ip_block +ffffffff82b4a0f0 r dce_v10_0_display_funcs +ffffffff82b4a150 r hpd_offsets +ffffffff82b4a168 r dce_v10_0_encoder_funcs +ffffffff82b4a188 r dce_v10_0_dac_helper_funcs +ffffffff82b4a1f0 r dce_v10_0_dig_helper_funcs +ffffffff82b4a258 r dce_v10_0_ext_helper_funcs +ffffffff82b4a2c0 r dce_v10_0_audio_write_sad_regs.eld_reg_to_type +ffffffff82b4a2f0 r dce_v10_0_crtc_irq_funcs +ffffffff82b4a300 r dce_v10_0_pageflip_irq_funcs +ffffffff82b4a310 r dce_v10_0_hpd_irq_funcs +ffffffff82b4a320 r interrupt_status_offsets +ffffffff82b4a380 r dce_v10_0_crtc_funcs +ffffffff82b4a440 r dce_v10_0_crtc_helper_funcs +ffffffff82b4a4c0 r vga_control_regs +ffffffff82b4a4e0 r dig_offsets +ffffffff82b4a500 r pin_offsets +ffffffff82b4a520 r fiji_mgcg_cgcg_init +ffffffff82b4a540 r golden_settings_fiji_a10 +ffffffff82b4a570 r tonga_mgcg_cgcg_init +ffffffff82b4a590 r golden_settings_tonga_a11 +ffffffff82b4b000 r crtc_offsets +ffffffff82b4b020 r dce_v11_0_ip_funcs +ffffffff82b4b0c0 R dce_v11_0_ip_block +ffffffff82b4b0d8 R dce_v11_2_ip_block +ffffffff82b4b0f0 r dce_v11_0_display_funcs +ffffffff82b4b150 r hpd_offsets +ffffffff82b4b168 r dce_v11_0_encoder_funcs +ffffffff82b4b188 r dce_v11_0_dac_helper_funcs +ffffffff82b4b1f0 r dce_v11_0_dig_helper_funcs +ffffffff82b4b258 r dce_v11_0_ext_helper_funcs +ffffffff82b4b2c0 r dce_v11_0_audio_write_sad_regs.eld_reg_to_type +ffffffff82b4b2f0 r dce_v11_0_crtc_irq_funcs +ffffffff82b4b300 r dce_v11_0_pageflip_irq_funcs +ffffffff82b4b310 r dce_v11_0_hpd_irq_funcs +ffffffff82b4b320 r interrupt_status_offsets +ffffffff82b4b380 r dce_v11_0_crtc_funcs +ffffffff82b4b440 r dce_v11_0_crtc_helper_funcs +ffffffff82b4b4c0 r vga_control_regs +ffffffff82b4b4e0 r dig_offsets +ffffffff82b4b510 r cz_mgcg_cgcg_init +ffffffff82b4b530 r cz_golden_settings_a11 +ffffffff82b4b550 r stoney_golden_settings_a11 +ffffffff82b4b570 r polaris11_golden_settings_a11 +ffffffff82b4b5b0 r polaris10_golden_settings_a11 +ffffffff82b4c000 R df_v1_7_funcs +ffffffff82b4c070 r df_v1_7_channel_number +ffffffff82b4d000 R df_v3_6_funcs +ffffffff82b4d070 r df_v3_6_channel_number +ffffffff82b4e000 R df_v4_3_funcs +ffffffff82b4f000 r GC_BASE +ffffffff82b4f0a8 r HDP_BASE +ffffffff82b4f150 r MMHUB_BASE +ffffffff82b4f1f8 r ATHUB_BASE +ffffffff82b4f2a0 r NBIO_BASE +ffffffff82b4f348 r MP0_BASE +ffffffff82b4f3f0 r MP1_BASE +ffffffff82b4f498 r VCN0_BASE +ffffffff82b4f540 r DF_BASE +ffffffff82b4f5e8 r DCN_BASE +ffffffff82b4f690 r OSSSYS_BASE +ffffffff82b4f738 r SMUIO_BASE +ffffffff82b4f7e0 r THM_BASE +ffffffff82b50000 r gfx_v10_0_ip_funcs +ffffffff82b500a0 R gfx_v10_0_ip_block +ffffffff82b500b8 r gfx_v10_0_gfx_funcs +ffffffff82b50120 r golden_settings_gc_rlc_spm_10_0_nv10 +ffffffff82b563c0 r golden_settings_gc_rlc_spm_10_1_nv14 +ffffffff82b59de0 r golden_settings_gc_rlc_spm_10_1_2_nv12 +ffffffff82b60080 r gfx_v10_0_kiq_pm4_funcs +ffffffff82b600c0 r gfx_v10_0_ring_funcs_kiq +ffffffff82b60200 r gfx_v10_0_ring_funcs_gfx +ffffffff82b60340 r gfx_v10_0_ring_funcs_compute +ffffffff82b60480 r gfx_v10_0_eop_irq_funcs +ffffffff82b60490 r gfx_v10_0_kiq_irq_funcs +ffffffff82b604a0 r gfx_v10_0_priv_reg_irq_funcs +ffffffff82b604b0 r gfx_v10_0_priv_inst_irq_funcs +ffffffff82b604c0 r gfx_v10_0_rlc_funcs +ffffffff82b60528 r gfx_v10_0_rlc_funcs_sriov +ffffffff82b60590 r gfx10_cs_data +ffffffff82b605b0 r gfx10_SECT_CONTEXT_defs +ffffffff82b60640 r gfx10_SECT_CONTEXT_def_1 +ffffffff82b609a0 r gfx10_SECT_CONTEXT_def_3 +ffffffff82b609b0 r gfx10_SECT_CONTEXT_def_4 +ffffffff82b60c28 r gfx10_SECT_CONTEXT_def_5 +ffffffff82b60c30 r gfx10_SECT_CONTEXT_def_6 +ffffffff82b60c40 r gfx10_SECT_CONTEXT_def_2 +ffffffff82b61080 r gfx10_SECT_CONTEXT_def_7 +ffffffff82b61190 r gfx10_SECT_CONTEXT_def_8 +ffffffff82b614c0 r golden_settings_gc_10_1 +ffffffff82b61880 r golden_settings_gc_10_0_nv10 +ffffffff82b61880 r golden_settings_gc_10_1_1 +ffffffff82b61c10 r golden_settings_gc_10_1_2 +ffffffff82b61c10 r golden_settings_gc_10_1_nv14 +ffffffff82b62000 r golden_settings_gc_10_1_2_nv12 +ffffffff82b62000 r golden_settings_gc_10_3 +ffffffff82b62408 r golden_settings_gc_10_3_sienna_cichlid +ffffffff82b62410 r golden_settings_gc_10_3_2 +ffffffff82b62800 r golden_settings_gc_10_3_vangogh +ffffffff82b62a60 r golden_settings_gc_10_3_3 +ffffffff82b62c40 r golden_settings_gc_10_3_4 +ffffffff82b62fa0 r golden_settings_gc_10_3_5 +ffffffff82b632a0 r golden_settings_gc_10_0_cyan_skillfish +ffffffff82b635d0 r golden_settings_gc_10_3_6 +ffffffff82b637e0 r golden_settings_gc_10_3_7 +ffffffff82b64000 r gfx_v11_0_ip_funcs +ffffffff82b640a0 R gfx_v11_0_ip_block +ffffffff82b640b8 r gfx_v11_0_gfx_funcs +ffffffff82b64118 r gfx_v11_0_kiq_pm4_funcs +ffffffff82b64158 r gfx_v11_0_ring_funcs_kiq +ffffffff82b64298 r gfx_v11_0_ring_funcs_gfx +ffffffff82b643d8 r gfx_v11_0_ring_funcs_compute +ffffffff82b64518 r gfx_v11_0_eop_irq_funcs +ffffffff82b64528 r gfx_v11_0_priv_reg_irq_funcs +ffffffff82b64538 r gfx_v11_0_priv_inst_irq_funcs +ffffffff82b64548 r gfx_v11_0_rlc_gc_fed_irq_funcs +ffffffff82b64558 r gfx_v11_0_rlc_funcs +ffffffff82b645c0 r gfx11_cs_data +ffffffff82b645e0 r gfx11_SECT_CONTEXT_defs +ffffffff82b64660 r gfx11_SECT_CONTEXT_def_1 +ffffffff82b649c0 r gfx11_SECT_CONTEXT_def_3 +ffffffff82b649d0 r gfx11_SECT_CONTEXT_def_5 +ffffffff82b649d8 r gfx11_SECT_CONTEXT_def_6 +ffffffff82b649e0 r gfx11_SECT_CONTEXT_def_2 +ffffffff82b64e20 r gfx11_SECT_CONTEXT_def_4 +ffffffff82b650a0 r gfx11_SECT_CONTEXT_def_7 +ffffffff82b65510 r golden_settings_gc_11_0_1 +ffffffff82b655f0 r golden_settings_gc_11_0 +ffffffff82b66000 r gfx_v8_0_ip_funcs +ffffffff82b660a0 R gfx_v8_0_ip_block +ffffffff82b660b8 R gfx_v8_1_ip_block +ffffffff82b660d0 r gfx_v8_0_gfx_funcs +ffffffff82b66130 r gfx_v8_0_ring_funcs_kiq +ffffffff82b66270 r gfx_v8_0_ring_funcs_gfx +ffffffff82b663b0 r gfx_v8_0_ring_funcs_compute +ffffffff82b664f0 r amdgpu_gds_reg_offset +ffffffff82b665f0 r gfx_v8_0_eop_irq_funcs +ffffffff82b66600 r gfx_v8_0_priv_reg_irq_funcs +ffffffff82b66610 r gfx_v8_0_priv_inst_irq_funcs +ffffffff82b66620 r gfx_v8_0_cp_ecc_error_irq_funcs +ffffffff82b66630 r gfx_v8_0_sq_irq_funcs +ffffffff82b66640 r sq_edc_source_names +ffffffff82b66678 r iceland_rlc_funcs +ffffffff82b666e0 r vi_cs_data +ffffffff82b66700 r vi_SECT_CONTEXT_defs +ffffffff82b66780 r vi_SECT_CONTEXT_def_1 +ffffffff82b66ad0 r vi_SECT_CONTEXT_def_3 +ffffffff82b66af0 r vi_SECT_CONTEXT_def_4 +ffffffff82b66d64 r vi_SECT_CONTEXT_def_5 +ffffffff82b66d6c r vi_SECT_CONTEXT_def_6 +ffffffff82b66d70 r vi_SECT_CONTEXT_def_2 +ffffffff82b671c0 r vi_SECT_CONTEXT_def_7 +ffffffff82b67570 r vgpr_init_compute_shader +ffffffff82b67680 r vgpr_init_regs +ffffffff82b67710 r sgpr1_init_regs +ffffffff82b677a0 r sgpr2_init_regs +ffffffff82b67830 r sec_ded_counter_registers +ffffffff82b678a0 r iceland_mgcg_cgcg_init +ffffffff82b67ba0 r golden_settings_iceland_a11 +ffffffff82b67c60 r iceland_golden_common_all +ffffffff82b67cc0 r fiji_mgcg_cgcg_init +ffffffff82b67e70 r golden_settings_fiji_a10 +ffffffff82b67f00 r fiji_golden_common_all +ffffffff82b67f80 r tonga_mgcg_cgcg_init +ffffffff82b68310 r golden_settings_tonga_a11 +ffffffff82b683d0 r tonga_golden_common_all +ffffffff82b68430 r golden_settings_vegam_a11 +ffffffff82b68500 r vegam_golden_common_all +ffffffff82b68550 r golden_settings_polaris11_a11 +ffffffff82b68620 r polaris11_golden_common_all +ffffffff82b68670 r golden_settings_polaris10_a11 +ffffffff82b68740 r polaris10_golden_common_all +ffffffff82b687a0 r cz_mgcg_cgcg_init +ffffffff82b68b30 r cz_golden_settings_a11 +ffffffff82b68bc0 r cz_golden_common_all +ffffffff82b68c20 r stoney_mgcg_cgcg_init +ffffffff82b68c60 r stoney_golden_settings_a11 +ffffffff82b68ce0 r stoney_golden_common_all +ffffffff82b69000 R gfx_v9_0_ras_ops +ffffffff82b69040 r gfx_v9_0_ip_funcs +ffffffff82b690e0 R gfx_v9_0_ip_block +ffffffff82b69100 r ras_gfx_subblocks +ffffffff82b69b80 r gfx_v9_0_edc_counter_regs +ffffffff82b69f20 r gfx_v9_0_ras_fields +ffffffff82b6b000 r gfx_v9_0_gfx_funcs +ffffffff82b6b060 r gfx_v9_0_kiq_pm4_funcs +ffffffff82b6b0a0 r gfx_v9_0_ring_funcs_kiq +ffffffff82b6b1e0 r gfx_v9_0_ring_funcs_gfx +ffffffff82b6b320 r gfx_v9_0_sw_ring_funcs_gfx +ffffffff82b6b460 r gfx_v9_0_ring_funcs_compute +ffffffff82b6b5a0 r gfx_v9_0_eop_irq_funcs +ffffffff82b6b5b0 r gfx_v9_0_priv_reg_irq_funcs +ffffffff82b6b5c0 r gfx_v9_0_priv_inst_irq_funcs +ffffffff82b6b5d0 r gfx_v9_0_cp_ecc_error_irq_funcs +ffffffff82b6b5e0 r gfx_v9_0_rlc_funcs +ffffffff82b6b650 r gfx9_cs_data +ffffffff82b6b670 r gfx9_SECT_CONTEXT_defs +ffffffff82b6b700 r gfx9_SECT_CONTEXT_def_1 +ffffffff82b6ba50 r gfx9_SECT_CONTEXT_def_3 +ffffffff82b6ba60 r gfx9_SECT_CONTEXT_def_4 +ffffffff82b6bcd4 r gfx9_SECT_CONTEXT_def_5 +ffffffff82b6bcdc r gfx9_SECT_CONTEXT_def_6 +ffffffff82b6bce0 r gfx9_SECT_CONTEXT_def_7 +ffffffff82b6bdf0 r gfx9_SECT_CONTEXT_def_2 +ffffffff82b6c260 r gfx9_SECT_CONTEXT_def_8 +ffffffff82b6c4d0 r vgpr_init_compute_shader_arcturus +ffffffff82b6cd60 r vgpr_init_regs_arcturus +ffffffff82b6cef0 r vgpr_init_regs +ffffffff82b6d080 r sgpr1_init_regs +ffffffff82b6d210 r sgpr2_init_regs +ffffffff82b6d3a0 r golden_settings_gc_9_0 +ffffffff82b6d580 r golden_settings_gc_9_0_vg10 +ffffffff82b6d730 r golden_settings_gc_9_2_1 +ffffffff82b6d8b0 r golden_settings_gc_9_2_1_vg12 +ffffffff82b6d9f0 r golden_settings_gc_9_0_vg20 +ffffffff82b6db00 r golden_settings_gc_9_4_1_arct +ffffffff82b6dc10 r golden_settings_gc_9_1 +ffffffff82b6de50 r golden_settings_gc_9_1_rv2 +ffffffff82b6e020 r golden_settings_gc_9_1_rv1 +ffffffff82b6e0d0 r golden_settings_gc_9_1_rn +ffffffff82b6e1f0 r golden_settings_gc_9_x_common +ffffffff82b6f000 R gfx_v9_4_ras_ops +ffffffff82b6f040 r gfx_v9_4_edc_counter_regs +ffffffff82b6f420 r gfx_v9_4_ras_fields +ffffffff82b71000 R vgpr_init_regs_aldebaran +ffffffff82b711b0 R sgpr112_init_regs_aldebaran +ffffffff82b71360 R sgpr96_init_regs_aldebaran +ffffffff82b71510 R sgpr64_init_regs_aldebaran +ffffffff82b716c0 r golden_settings_gc_9_4_2_alde +ffffffff82b71720 r golden_settings_gc_9_4_2_alde_die_0 +ffffffff82b717b0 r golden_settings_gc_9_4_2_alde_die_1 +ffffffff82b71840 r sgpr112_init_compute_shader_aldebaran +ffffffff82b71a60 r sgpr96_init_compute_shader_aldebaran +ffffffff82b71c50 r sgpr64_init_compute_shader_aldebaran +ffffffff82b71dc0 r vgpr_init_compute_shader_aldebaran +ffffffff82b726a0 r gfx_v9_4_2_edc_counter_regs +ffffffff82b72a20 r gfx_v9_4_2_ras_fields +ffffffff82b743c0 r gfx_v9_4_2_utc_blocks +ffffffff82b75000 r gfx_v9_4_3_ip_funcs +ffffffff82b750a0 R gfx_v9_4_3_ip_block +ffffffff82b750b8 r gfx_v9_4_3_kiq_pm4_funcs +ffffffff82b750f8 r gfx_v9_4_3_ring_funcs_kiq +ffffffff82b75238 r gfx_v9_4_3_ring_funcs_compute +ffffffff82b75378 r gfx_v9_4_3_eop_irq_funcs +ffffffff82b75388 r gfx_v9_4_3_priv_reg_irq_funcs +ffffffff82b75398 r gfx_v9_4_3_priv_inst_irq_funcs +ffffffff82b753a8 r gfx_v9_4_3_rlc_funcs +ffffffff82b75410 r gfx_v9_4_3_gfx_funcs +ffffffff82b75470 r gfx_v9_4_3_ce_reg_list +ffffffff82b75800 r gfx_v9_4_3_ras_mem_list_array +ffffffff82b75960 r gfx_v9_4_3_ue_reg_list +ffffffff82b75d20 r gfx_v9_4_3_ras_cp_mem_list +ffffffff82b75d70 r gfx_v9_4_3_ras_gcea_mem_list +ffffffff82b75eb0 r gfx_v9_4_3_ras_gc_cane_mem_list +ffffffff82b75ec0 r gfx_v9_4_3_ras_gcutcl2_mem_list +ffffffff82b75ed0 r gfx_v9_4_3_ras_gds_mem_list +ffffffff82b75ee0 r gfx_v9_4_3_ras_lds_mem_list +ffffffff82b76100 r gfx_v9_4_3_ras_rlc_mem_list +ffffffff82b76180 r gfx_v9_4_3_ras_sp_mem_list +ffffffff82b76190 r gfx_v9_4_3_ras_spi_mem_list +ffffffff82b761d0 r gfx_v9_4_3_ras_sqc_mem_list +ffffffff82b76340 r gfx_v9_4_3_ras_sq_mem_list +ffffffff82b76380 r gfx_v9_4_3_ras_ta_mem_list +ffffffff82b763d0 r gfx_v9_4_3_ras_tcc_mem_list +ffffffff82b763e0 r gfx_v9_4_3_ras_tca_mem_list +ffffffff82b763f0 r gfx_v9_4_3_ras_tci_mem_list +ffffffff82b76400 r gfx_v9_4_3_ras_tcp_mem_list +ffffffff82b76590 r gfx_v9_4_3_ras_td_mem_list +ffffffff82b765c0 r gfx_v9_4_3_ras_tcx_mem_list +ffffffff82b76b40 r gfx_v9_4_3_ras_atc_l2_mem_list +ffffffff82b76b50 r gfx_v9_4_3_ras_utcl2_mem_list +ffffffff82b76b60 r gfx_v9_4_3_ras_vml2_mem_list +ffffffff82b76b70 r gfx_v9_4_3_ras_vml2_walker_mem_list +ffffffff82b77000 R gfxhub_v1_0_funcs +ffffffff82b78000 R gfxhub_v1_2_funcs +ffffffff82b79000 R gfxhub_v2_0_funcs +ffffffff82b79060 r gfxhub_v2_0_vmhub_funcs +ffffffff82b79070 r gfxhub_client_ids +ffffffff82b7a000 R gfxhub_v2_1_funcs +ffffffff82b7a060 r gfxhub_v2_1_vmhub_funcs +ffffffff82b7a070 r gfxhub_client_ids +ffffffff82b7b000 R gfxhub_v3_0_funcs +ffffffff82b7b060 r gfxhub_v3_0_vmhub_funcs +ffffffff82b7b070 r gfxhub_client_ids +ffffffff82b7c000 R gfxhub_v3_0_3_funcs +ffffffff82b7c060 r gfxhub_v3_0_3_vmhub_funcs +ffffffff82b7c070 r gfxhub_client_ids +ffffffff82b7d000 R gmc_v10_0_ip_funcs +ffffffff82b7d0a0 R gmc_v10_0_ip_block +ffffffff82b7d0b8 r gmc_v10_0_gmc_funcs +ffffffff82b7d110 r gmc_v10_0_irq_funcs +ffffffff82b7d120 r gmc_v10_0_ecc_funcs +ffffffff82b7e000 R gmc_v11_0_ip_funcs +ffffffff82b7e0a0 R gmc_v11_0_ip_block +ffffffff82b7e0b8 r gmc_v11_0_gmc_funcs +ffffffff82b7e110 r gmc_v11_0_irq_funcs +ffffffff82b7e120 r gmc_v11_0_ecc_funcs +ffffffff82b7f000 r gmc_v7_0_ip_funcs +ffffffff82b7f0a0 R gmc_v7_0_ip_block +ffffffff82b7f0b8 R gmc_v7_4_ip_block +ffffffff82b7f0d0 r gmc_v7_0_gmc_funcs +ffffffff82b7f128 r gmc_v7_0_irq_funcs +ffffffff82b7f138 r iceland_mgcg_cgcg_init +ffffffff82b7f150 r golden_settings_iceland_a11 +ffffffff82b7f180 r mc_cg_registers +ffffffff82b7f1b0 r mc_cg_en +ffffffff82b7f1e0 r mc_cg_ls_en +ffffffff82b80000 r gmc_v8_0_ip_funcs +ffffffff82b800a0 R gmc_v8_0_ip_block +ffffffff82b800b8 R gmc_v8_1_ip_block +ffffffff82b800d0 R gmc_v8_5_ip_block +ffffffff82b800e8 r gmc_v8_0_gmc_funcs +ffffffff82b80140 r gmc_v8_0_irq_funcs +ffffffff82b80150 r fiji_mgcg_cgcg_init +ffffffff82b80160 r golden_settings_fiji_a10 +ffffffff82b80190 r tonga_mgcg_cgcg_init +ffffffff82b801a0 r golden_settings_tonga_a11 +ffffffff82b80200 r golden_settings_polaris11_a11 +ffffffff82b80230 r golden_settings_polaris10_a11 +ffffffff82b8026c r cz_mgcg_cgcg_init +ffffffff82b80280 r stoney_mgcg_cgcg_init +ffffffff82b802a0 r golden_settings_stoney_common +ffffffff82b81000 R gmc_v9_0_ip_funcs +ffffffff82b810a0 R gmc_v9_0_ip_block +ffffffff82b810b8 r gmc_v9_0_gmc_funcs +ffffffff82b81110 r gmc_v9_0_irq_funcs +ffffffff82b81120 r gmc_v9_0_ecc_funcs +ffffffff82b81130 r gfxhub_client_ids +ffffffff82b811a0 r mmhub_client_ids_vega10 +ffffffff82b81490 r mmhub_client_ids_vega12 +ffffffff82b81790 r mmhub_client_ids_vega20 +ffffffff82b81a80 r mmhub_client_ids_arcturus +ffffffff82b83290 r mmhub_client_ids_raven +ffffffff82b83450 r mmhub_client_ids_renoir +ffffffff82b83640 r mmhub_client_ids_aldebaran +ffffffff82b84e50 r ecc_umc_mcumc_ctrl_addrs +ffffffff82b84ed0 r ecc_umc_mcumc_ctrl_mask_addrs +ffffffff82b84f50 r golden_settings_mmhub_1_0_0 +ffffffff82b84f80 r golden_settings_athub_1_0_0 +ffffffff82b85000 R hdp_v4_0_funcs +ffffffff82b86000 R hdp_v5_0_funcs +ffffffff82b87000 R hdp_v5_2_funcs +ffffffff82b88000 R hdp_v6_0_funcs +ffffffff82b89000 r iceland_ih_ip_funcs +ffffffff82b890a0 R iceland_ih_ip_block +ffffffff82b890b8 r iceland_ih_funcs +ffffffff82b8a000 r ih_v6_0_ip_funcs +ffffffff82b8a0a0 R ih_v6_0_ip_block +ffffffff82b8a0b8 r ih_v6_0_funcs +ffffffff82b8a0d8 r ih_v6_0_self_irq_funcs +ffffffff82b8b000 r ih_v6_1_ip_funcs +ffffffff82b8b0a0 R ih_v6_1_ip_block +ffffffff82b8b0b8 r ih_v6_1_funcs +ffffffff82b8b0d8 r ih_v6_1_self_irq_funcs +ffffffff82b8c000 R gfx_v11_0_imu_funcs +ffffffff82b8c030 r imu_rlc_ram_golden_11 +ffffffff82b8c680 r imu_rlc_ram_golden_11_0_2 +ffffffff82b8d000 r imu_rlc_ram_golden_11_0_3 +ffffffff82b8e000 r jpeg_v1_0_decode_ring_vm_funcs +ffffffff82b8e140 r jpeg_v1_0_irq_funcs +ffffffff82b8f000 r jpeg_v2_0_ip_funcs +ffffffff82b8f0a0 R jpeg_v2_0_ip_block +ffffffff82b8f0b8 r jpeg_v2_0_dec_ring_vm_funcs +ffffffff82b8f1f8 r jpeg_v2_0_irq_funcs +ffffffff82b90000 r jpeg_v2_5_ip_funcs +ffffffff82b900a0 R jpeg_v2_5_ip_block +ffffffff82b900b8 r jpeg_v2_6_ip_funcs +ffffffff82b90158 R jpeg_v2_6_ip_block +ffffffff82b90170 R jpeg_v2_6_ras_hw_ops +ffffffff82b901b0 r jpeg_v2_5_dec_ring_vm_funcs +ffffffff82b902f0 r jpeg_v2_6_dec_ring_vm_funcs +ffffffff82b90430 r jpeg_v2_5_irq_funcs +ffffffff82b90440 r jpeg_v2_6_ras_irq_funcs +ffffffff82b91000 r jpeg_v3_0_ip_funcs +ffffffff82b910a0 R jpeg_v3_0_ip_block +ffffffff82b910b8 r jpeg_v3_0_dec_ring_vm_funcs +ffffffff82b911f8 r jpeg_v3_0_irq_funcs +ffffffff82b92000 r jpeg_v4_0_ip_funcs +ffffffff82b920a0 R jpeg_v4_0_ip_block +ffffffff82b920b8 R jpeg_v4_0_ras_hw_ops +ffffffff82b920f8 r jpeg_v4_0_dec_ring_vm_funcs +ffffffff82b92238 r jpeg_v4_0_irq_funcs +ffffffff82b92248 r jpeg_v4_0_ras_irq_funcs +ffffffff82b93000 r jpeg_v4_0_3_ip_funcs +ffffffff82b930a0 R jpeg_v4_0_3_ip_block +ffffffff82b930b8 r jpeg_v4_0_3_dec_ring_vm_funcs +ffffffff82b931f8 r jpeg_v4_0_3_irq_funcs +ffffffff82b93208 r jpeg_v4_0_3_ras_hw_ops +ffffffff82b93250 r jpeg_v4_0_3_ue_reg_list +ffffffff82b94000 R lsdma_v6_0_funcs +ffffffff82b95000 r mca_v3_0_mp0_hw_ops +ffffffff82b95040 r mca_v3_0_mp1_hw_ops +ffffffff82b95080 r mca_v3_0_mpio_hw_ops +ffffffff82b96000 r mes_v10_1_ip_funcs +ffffffff82b960a0 R mes_v10_1_ip_block +ffffffff82b960b8 r mes_v10_1_funcs +ffffffff82b960e8 r mes_v10_1_ring_funcs +ffffffff82b97000 r mes_v11_0_ip_funcs +ffffffff82b970a0 R mes_v11_0_ip_block +ffffffff82b970b8 r mes_v11_0_funcs +ffffffff82b970e8 r mes_v11_0_ring_funcs +ffffffff82b98000 R mmhub_v1_0_funcs +ffffffff82b98050 r mmhub_v1_0_edc_cnt_regs +ffffffff82b980c0 r mmhub_v1_0_ras_fields +ffffffff82b99000 R mmhub_v1_7_funcs +ffffffff82b99050 r mmhub_v1_7_edc_cnt_regs +ffffffff82b99250 r mmhub_v1_7_ras_fields +ffffffff82b9a9c0 r mmhub_v1_7_ea_err_status_regs +ffffffff82b9b000 R mmhub_v1_8_funcs +ffffffff82b9b050 r mmhub_v1_8_ras_hw_ops +ffffffff82b9b090 r mmhub_v1_8_ce_reg_list +ffffffff82b9b180 r mmhub_v1_8_ras_memory_list +ffffffff82b9b2b0 r mmhub_v1_8_ue_reg_list +ffffffff82b9c000 R mmhub_v2_0_funcs +ffffffff82b9c050 r mmhub_v2_0_vmhub_funcs +ffffffff82b9c060 r mmhub_client_ids_navi1x +ffffffff82b9c190 r mmhub_client_ids_sienna_cichlid +ffffffff82b9c450 r mmhub_client_ids_beige_goby +ffffffff82b9d000 R mmhub_v2_3_funcs +ffffffff82b9d050 r mmhub_v2_3_vmhub_funcs +ffffffff82b9d060 r mmhub_client_ids_vangogh +ffffffff82b9e000 R mmhub_v3_0_funcs +ffffffff82b9e050 r mmhub_v3_0_vmhub_funcs +ffffffff82b9e060 r mmhub_client_ids_v3_0_0 +ffffffff82b9f000 R mmhub_v3_0_1_funcs +ffffffff82b9f050 r mmhub_v3_0_1_vmhub_funcs +ffffffff82b9f060 r mmhub_client_ids_v3_0_1 +ffffffff82ba0000 R mmhub_v3_0_2_funcs +ffffffff82ba0050 r mmhub_v3_0_2_vmhub_funcs +ffffffff82ba0060 r mmhub_client_ids_v3_0_2 +ffffffff82ba1000 R mmhub_v9_4_ras_hw_ops +ffffffff82ba1040 R mmhub_v9_4_funcs +ffffffff82ba1090 r mmhub_v9_4_edc_cnt_regs +ffffffff82ba1330 r mmhub_v9_4_ras_fields +ffffffff82ba33b0 r mmhub_v9_4_err_status_regs +ffffffff82ba4000 r xgpu_ai_mailbox_ack_irq_funcs +ffffffff82ba4010 r xgpu_ai_mailbox_rcv_irq_funcs +ffffffff82ba4020 R xgpu_ai_virt_ops +ffffffff82ba5000 r xgpu_nv_mailbox_ack_irq_funcs +ffffffff82ba5010 r xgpu_nv_mailbox_rcv_irq_funcs +ffffffff82ba5020 R xgpu_nv_virt_ops +ffffffff82ba6000 r xgpu_fiji_mgcg_cgcg_init +ffffffff82ba6240 r xgpu_fiji_golden_settings_a10 +ffffffff82ba6370 r xgpu_fiji_golden_common_all +ffffffff82ba63f0 r xgpu_tonga_mgcg_cgcg_init +ffffffff82ba6810 r xgpu_tonga_golden_settings_a11 +ffffffff82ba69d0 r xgpu_tonga_golden_common_all +ffffffff82ba6a28 r xgpu_vi_mailbox_ack_irq_funcs +ffffffff82ba6a38 r xgpu_vi_mailbox_rcv_irq_funcs +ffffffff82ba6a48 R xgpu_vi_virt_ops +ffffffff82ba7000 r navi10_ih_ip_funcs +ffffffff82ba70a0 R navi10_ih_ip_block +ffffffff82ba70b8 r navi10_ih_funcs +ffffffff82ba70d8 r navi10_ih_self_irq_funcs +ffffffff82ba8000 R nbio_v2_3_hdp_flush_reg +ffffffff82ba8048 R nbio_v2_3_funcs +ffffffff82ba9000 R nbio_v4_3_hdp_flush_reg +ffffffff82ba9048 R nbio_v4_3_funcs +ffffffff82ba9158 R nbio_v4_3_sriov_funcs +ffffffff82ba9268 r nbio_v4_3_ras_err_event_athub_irq_funcs +ffffffff82baa000 R nbio_v6_1_hdp_flush_reg +ffffffff82baa048 R nbio_v6_1_funcs +ffffffff82bab000 R nbio_v7_0_hdp_flush_reg +ffffffff82bab048 R nbio_v7_0_funcs +ffffffff82bac000 R nbio_v7_2_hdp_flush_reg +ffffffff82bac048 R nbio_v7_2_funcs +ffffffff82bad000 R nbio_v7_4_hdp_flush_reg +ffffffff82bad048 R nbio_v7_4_ras_hw_ops +ffffffff82bad088 R nbio_v7_4_funcs +ffffffff82bad198 r nbio_v7_4_ras_controller_irq_funcs +ffffffff82bad1a8 r nbio_v7_4_ras_err_event_athub_irq_funcs +ffffffff82bae000 R nbio_v7_7_hdp_flush_reg +ffffffff82bae048 R nbio_v7_7_funcs +ffffffff82baf000 R nbio_v7_9_hdp_flush_reg +ffffffff82baf048 R nbio_v7_9_funcs +ffffffff82baf158 R nbio_v7_9_ras_hw_ops +ffffffff82baf198 r nbio_v7_9_ras_controller_irq_funcs +ffffffff82baf1a8 r nbio_v7_9_ras_err_event_athub_irq_funcs +ffffffff82bb0000 r nv_common_ip_funcs +ffffffff82bb00a0 R nv_common_ip_block +ffffffff82bb00b8 r nv_asic_funcs +ffffffff82bb0180 r nv_allowed_read_registers +ffffffff82bb0300 r sc_video_codecs_encode +ffffffff82bb0310 r sc_video_codecs_decode_vcn1 +ffffffff82bb0320 r sc_video_codecs_decode_vcn0 +ffffffff82bb0330 r yc_video_codecs_decode +ffffffff82bb0340 r bg_video_codecs_encode +ffffffff82bb0350 r bg_video_codecs_decode +ffffffff82bb0360 r nv_video_codecs_encode +ffffffff82bb0370 r nv_video_codecs_decode +ffffffff82bb0380 r sc_video_codecs_encode_array +ffffffff82bb03b0 r sc_video_codecs_decode_array_vcn1 +ffffffff82bb0440 r sc_video_codecs_decode_array_vcn0 +ffffffff82bb04e0 r yc_video_codecs_decode_array +ffffffff82bb0550 r bg_video_codecs_decode_array +ffffffff82bb0590 r nv_video_codecs_encode_array +ffffffff82bb05c0 r nv_video_codecs_decode_array +ffffffff82bb1000 r psp_v10_0_funcs +ffffffff82bb2000 r psp_v11_0_funcs +ffffffff82bb3000 r psp_v11_0_8_funcs +ffffffff82bb4000 r psp_v12_0_funcs +ffffffff82bb5000 r psp_v13_0_funcs +ffffffff82bb6000 r psp_v13_0_4_funcs +ffffffff82bb7000 r psp_v3_1_funcs +ffffffff82bb8000 r sdma_v2_4_ip_funcs +ffffffff82bb80a0 R sdma_v2_4_ip_block +ffffffff82bb80b8 r sdma_v2_4_ring_funcs +ffffffff82bb81f8 r sdma_v2_4_buffer_funcs +ffffffff82bb8218 r sdma_v2_4_vm_pte_funcs +ffffffff82bb8238 r sdma_v2_4_trap_irq_funcs +ffffffff82bb8248 r sdma_v2_4_illegal_inst_irq_funcs +ffffffff82bb8260 r iceland_mgcg_cgcg_init +ffffffff82bb8280 r golden_settings_iceland_a11 +ffffffff82bb9000 r sdma_v3_0_ip_funcs +ffffffff82bb90a0 R sdma_v3_0_ip_block +ffffffff82bb90b8 R sdma_v3_1_ip_block +ffffffff82bb90d0 r sdma_v3_0_ring_funcs +ffffffff82bb9210 r sdma_v3_0_buffer_funcs +ffffffff82bb9230 r sdma_v3_0_vm_pte_funcs +ffffffff82bb9250 r sdma_v3_0_trap_irq_funcs +ffffffff82bb9260 r sdma_v3_0_illegal_inst_irq_funcs +ffffffff82bb9270 r fiji_mgcg_cgcg_init +ffffffff82bb9290 r golden_settings_fiji_a10 +ffffffff82bb92f0 r tonga_mgcg_cgcg_init +ffffffff82bb9310 r golden_settings_tonga_a11 +ffffffff82bb9390 r golden_settings_polaris11_a11 +ffffffff82bb9410 r golden_settings_polaris10_a11 +ffffffff82bb9490 r cz_mgcg_cgcg_init +ffffffff82bb94b0 r cz_golden_settings_a11 +ffffffff82bb9540 r stoney_mgcg_cgcg_init +ffffffff82bb9550 r stoney_golden_settings_a11 +ffffffff82bba000 R sdma_v4_0_ip_funcs +ffffffff82bba0a0 R sdma_v4_0_ras_hw_ops +ffffffff82bba0e0 R sdma_v4_0_ip_block +ffffffff82bba0f8 r sdma_v4_0_ring_funcs +ffffffff82bba238 r sdma_v4_0_page_ring_funcs +ffffffff82bba378 r sdma_v4_0_buffer_funcs +ffffffff82bba398 r sdma_v4_0_vm_pte_funcs +ffffffff82bba3b8 r sdma_v4_0_trap_irq_funcs +ffffffff82bba3c8 r sdma_v4_0_illegal_inst_irq_funcs +ffffffff82bba3d8 r sdma_v4_0_ecc_irq_funcs +ffffffff82bba3e8 r sdma_v4_0_vm_hole_irq_funcs +ffffffff82bba3f8 r sdma_v4_0_doorbell_invalid_irq_funcs +ffffffff82bba408 r sdma_v4_0_pool_timeout_irq_funcs +ffffffff82bba418 r sdma_v4_0_srbm_write_irq_funcs +ffffffff82bba430 r golden_settings_sdma_4 +ffffffff82bba690 r golden_settings_sdma_vg10 +ffffffff82bba740 r golden_settings_sdma_vg12 +ffffffff82bba7f0 r golden_settings_sdma0_4_2_init +ffffffff82bba810 r golden_settings_sdma0_4_2 +ffffffff82bbaaa0 r golden_settings_sdma1_4_2 +ffffffff82bbad30 r golden_settings_sdma_arct +ffffffff82bbb030 r golden_settings_sdma_aldebaran +ffffffff82bbb1a0 r golden_settings_sdma_4_1 +ffffffff82bbb2b0 r golden_settings_sdma_rv2 +ffffffff82bbb2e0 r golden_settings_sdma_rv1 +ffffffff82bbb310 r golden_settings_sdma_4_3 +ffffffff82bbb400 r sdma_v4_0_ras_fields +ffffffff82bbc000 R sdma_v4_4_ras_hw_ops +ffffffff82bbc040 r sdma_v4_4_ras_fields +ffffffff82bbd000 R sdma_v4_4_2_ip_funcs +ffffffff82bbd0a0 R sdma_v4_4_2_ip_block +ffffffff82bbd0b8 r sdma_v4_4_2_ring_funcs +ffffffff82bbd1f8 r sdma_v4_4_2_page_ring_funcs +ffffffff82bbd338 r sdma_v4_4_2_buffer_funcs +ffffffff82bbd358 r sdma_v4_4_2_vm_pte_funcs +ffffffff82bbd378 r sdma_v4_4_2_trap_irq_funcs +ffffffff82bbd388 r sdma_v4_4_2_illegal_inst_irq_funcs +ffffffff82bbd398 r sdma_v4_4_2_ecc_irq_funcs +ffffffff82bbd3a8 r sdma_v4_4_2_vm_hole_irq_funcs +ffffffff82bbd3b8 r sdma_v4_4_2_doorbell_invalid_irq_funcs +ffffffff82bbd3c8 r sdma_v4_4_2_pool_timeout_irq_funcs +ffffffff82bbd3d8 r sdma_v4_4_2_srbm_write_irq_funcs +ffffffff82bbd3e8 r sdma_v4_4_2_ras_hw_ops +ffffffff82bbd430 r sdma_v4_2_2_ue_reg_list +ffffffff82bbd460 r sdma_v4_4_2_ras_memory_list +ffffffff82bbe000 R sdma_v5_0_ip_funcs +ffffffff82bbe0a0 R sdma_v5_0_ip_block +ffffffff82bbe0b8 r sdma_v5_0_ring_funcs +ffffffff82bbe1f8 r sdma_v5_0_buffer_funcs +ffffffff82bbe218 r sdma_v5_0_vm_pte_funcs +ffffffff82bbe238 r sdma_v5_0_trap_irq_funcs +ffffffff82bbe248 r sdma_v5_0_illegal_inst_irq_funcs +ffffffff82bbe260 r golden_settings_sdma_5 +ffffffff82bbe4a0 r golden_settings_sdma_nv10 +ffffffff82bbe4d0 r golden_settings_sdma_nv14 +ffffffff82bbe500 r golden_settings_sdma_5_sriov +ffffffff82bbe6e0 r golden_settings_sdma_nv12 +ffffffff82bbe770 r golden_settings_sdma_cyan_skillfish +ffffffff82bbf000 R sdma_v5_2_ip_funcs +ffffffff82bbf0a0 R sdma_v5_2_ip_block +ffffffff82bbf0b8 r sdma_v5_2_ring_funcs +ffffffff82bbf1f8 r sdma_v5_2_buffer_funcs +ffffffff82bbf218 r sdma_v5_2_vm_pte_funcs +ffffffff82bbf238 r sdma_v5_2_trap_irq_funcs +ffffffff82bbf248 r sdma_v5_2_illegal_inst_irq_funcs +ffffffff82bc0000 R sdma_v6_0_ip_funcs +ffffffff82bc00a0 R sdma_v6_0_ip_block +ffffffff82bc00b8 r sdma_v6_0_ring_funcs +ffffffff82bc01f8 r sdma_v6_0_buffer_funcs +ffffffff82bc0218 r sdma_v6_0_vm_pte_funcs +ffffffff82bc0238 r sdma_v6_0_trap_irq_funcs +ffffffff82bc0248 r sdma_v6_0_illegal_inst_irq_funcs +ffffffff82bc1000 r smu_v11_0_i2c_algo +ffffffff82bc1010 r smu_v11_0_i2c_i2c_lock_ops +ffffffff82bc1028 r smu_v11_0_i2c_control_quirks +ffffffff82bc2000 R smuio_v11_0_funcs +ffffffff82bc3000 R smuio_v11_0_6_funcs +ffffffff82bc4000 R smuio_v13_0_funcs +ffffffff82bc5000 R smuio_v13_0_3_funcs +ffffffff82bc6000 R smuio_v13_0_6_funcs +ffffffff82bc7000 R smuio_v9_0_funcs +ffffffff82bc8000 r soc15_common_ip_funcs +ffffffff82bc80a0 R vega10_common_ip_block +ffffffff82bc80b8 r soc15_asic_funcs +ffffffff82bc8178 r vega20_asic_funcs +ffffffff82bc8238 r aqua_vanjaram_asic_funcs +ffffffff82bc8300 r soc15_allowed_read_registers +ffffffff82bc8490 r vega_video_codecs_encode +ffffffff82bc84a0 r vega_video_codecs_decode +ffffffff82bc84b0 r rv_video_codecs_decode +ffffffff82bc84c0 r rn_video_codecs_decode +ffffffff82bc84d0 r vcn_4_0_3_video_codecs_encode +ffffffff82bc84e0 r vcn_4_0_3_video_codecs_decode +ffffffff82bc84f0 r vega_video_codecs_encode_array +ffffffff82bc8520 r vega_video_codecs_decode_array +ffffffff82bc85a0 r rv_video_codecs_decode_array +ffffffff82bc8630 r rn_video_codecs_decode_array +ffffffff82bc86c0 r vcn_4_0_3_video_codecs_decode_array +ffffffff82bc9000 r soc21_common_ip_funcs +ffffffff82bc90a0 R soc21_common_ip_block +ffffffff82bc90b8 r soc21_asic_funcs +ffffffff82bc9180 r soc21_allowed_read_registers +ffffffff82bc9300 r vcn_4_0_0_video_codecs_encode_vcn1 +ffffffff82bc9310 r vcn_4_0_0_video_codecs_decode_vcn1 +ffffffff82bc9320 r vcn_4_0_0_video_codecs_encode_vcn0 +ffffffff82bc9330 r vcn_4_0_0_video_codecs_decode_vcn0 +ffffffff82bc9340 r vcn_4_0_0_video_codecs_encode_array_vcn1 +ffffffff82bc9370 r vcn_4_0_0_video_codecs_decode_array_vcn1 +ffffffff82bc93c0 r vcn_4_0_0_video_codecs_encode_array_vcn0 +ffffffff82bc9400 r vcn_4_0_0_video_codecs_decode_array_vcn0 +ffffffff82bca000 r tonga_ih_ip_funcs +ffffffff82bca0a0 R tonga_ih_ip_block +ffffffff82bca0b8 r tonga_ih_funcs +ffffffff82bcb000 R umc_v6_0_funcs +ffffffff82bcc000 R umc_v6_1_channel_idx_tbl +ffffffff82bcc080 R umc_v6_1_ras_hw_ops +ffffffff82bcd000 R umc_v6_7_channel_idx_tbl_second +ffffffff82bcd080 R umc_v6_7_channel_idx_tbl_first +ffffffff82bcd100 R umc_v6_7_ras_hw_ops +ffffffff82bce000 R umc_v8_10_channelnum_map_colbit_table +ffffffff82bce040 R umc_v8_10_channel_idx_tbl_ext0 +ffffffff82bce080 R umc_v8_10_channel_idx_tbl +ffffffff82bce0e0 R umc_v8_10_ras_hw_ops +ffffffff82bcf000 R umc_v8_7_channel_idx_tbl +ffffffff82bcf040 R umc_v8_7_ras_hw_ops +ffffffff82bd0000 r uvd_v5_0_ip_funcs +ffffffff82bd00a0 R uvd_v5_0_ip_block +ffffffff82bd00b8 r uvd_v5_0_ring_funcs +ffffffff82bd01f8 r uvd_v5_0_irq_funcs +ffffffff82bd1000 r uvd_v6_0_ip_funcs +ffffffff82bd10a0 R uvd_v6_0_ip_block +ffffffff82bd10b8 R uvd_v6_2_ip_block +ffffffff82bd10d0 R uvd_v6_3_ip_block +ffffffff82bd10e8 r uvd_v6_0_ring_vm_funcs +ffffffff82bd1228 r uvd_v6_0_ring_phys_funcs +ffffffff82bd1368 r uvd_v6_0_enc_ring_vm_funcs +ffffffff82bd14a8 r uvd_v6_0_irq_funcs +ffffffff82bd2000 R uvd_v7_0_ip_funcs +ffffffff82bd20a0 R uvd_v7_0_ip_block +ffffffff82bd20b8 r uvd_v7_0_ring_vm_funcs +ffffffff82bd21f8 r uvd_v7_0_enc_ring_vm_funcs +ffffffff82bd2338 r uvd_v7_0_irq_funcs +ffffffff82bd3000 r vce_v3_0_ip_funcs +ffffffff82bd30a0 R vce_v3_0_ip_block +ffffffff82bd30b8 R vce_v3_1_ip_block +ffffffff82bd30d0 R vce_v3_4_ip_block +ffffffff82bd30e8 r vce_v3_0_ring_vm_funcs +ffffffff82bd3228 r vce_v3_0_ring_phys_funcs +ffffffff82bd3368 r vce_v3_0_irq_funcs +ffffffff82bd4000 R vce_v4_0_ip_funcs +ffffffff82bd40a0 R vce_v4_0_ip_block +ffffffff82bd40b8 r vce_v4_0_ring_vm_funcs +ffffffff82bd41f8 r vce_v4_0_irq_funcs +ffffffff82bd5000 r vcn_v1_0_ip_funcs +ffffffff82bd50a0 R vcn_v1_0_ip_block +ffffffff82bd50b8 r vcn_v1_0_dec_ring_vm_funcs +ffffffff82bd51f8 r vcn_v1_0_enc_ring_vm_funcs +ffffffff82bd5338 r vcn_v1_0_irq_funcs +ffffffff82bd6000 r vcn_v2_0_ip_funcs +ffffffff82bd60a0 R vcn_v2_0_ip_block +ffffffff82bd60b8 r vcn_v2_0_dec_ring_vm_funcs +ffffffff82bd61f8 r vcn_v2_0_enc_ring_vm_funcs +ffffffff82bd6338 r vcn_v2_0_irq_funcs +ffffffff82bd7000 r vcn_v2_5_ip_funcs +ffffffff82bd70a0 R vcn_v2_5_ip_block +ffffffff82bd70b8 r vcn_v2_6_ip_funcs +ffffffff82bd7158 R vcn_v2_6_ip_block +ffffffff82bd7170 R vcn_v2_6_ras_hw_ops +ffffffff82bd71b0 r vcn_v2_5_dec_ring_vm_funcs +ffffffff82bd72f0 r vcn_v2_5_enc_ring_vm_funcs +ffffffff82bd7430 r vcn_v2_5_irq_funcs +ffffffff82bd7440 r vcn_v2_6_ras_irq_funcs +ffffffff82bd8000 r vcn_v3_0_ip_funcs +ffffffff82bd80a0 R vcn_v3_0_ip_block +ffffffff82bd80b8 r vcn_v3_0_dec_ring_vm_funcs +ffffffff82bd81f8 r vcn_v3_0_enc_ring_vm_funcs +ffffffff82bd8338 r vcn_v3_0_irq_funcs +ffffffff82bd9000 r vcn_v4_0_ip_funcs +ffffffff82bd90a0 R vcn_v4_0_ip_block +ffffffff82bd90b8 R vcn_v4_0_ras_hw_ops +ffffffff82bd90f8 r vcn_v4_0_irq_funcs +ffffffff82bd9108 r vcn_v4_0_ras_irq_funcs +ffffffff82bda000 r vcn_v4_0_3_ip_funcs +ffffffff82bda0a0 R vcn_v4_0_3_ip_block +ffffffff82bda0b8 r vcn_v4_0_3_unified_ring_vm_funcs +ffffffff82bda1f8 r vcn_v4_0_3_irq_funcs +ffffffff82bda208 r vcn_v4_0_3_ras_hw_ops +ffffffff82bda250 r vcn_v4_0_3_ue_reg_list +ffffffff82bdb000 R vega10_ih_ip_funcs +ffffffff82bdb0a0 R vega10_ih_ip_block +ffffffff82bdb0b8 r vega10_ih_funcs +ffffffff82bdb0d8 r vega10_ih_self_irq_funcs +ffffffff82bdc000 r GC_BASE +ffffffff82bdc064 r HDP_BASE +ffffffff82bdc0c8 r MMHUB_BASE +ffffffff82bdc12c r ATHUB_BASE +ffffffff82bdc190 r NBIO_BASE +ffffffff82bdc1f4 r MP0_BASE +ffffffff82bdc258 r MP1_BASE +ffffffff82bdc2bc r VCE_BASE +ffffffff82bdc320 r VCN_BASE +ffffffff82bdc384 r DF_BASE +ffffffff82bdc3e8 r DCE_BASE +ffffffff82bdc44c r OSSSYS_BASE +ffffffff82bdc4b0 r SDMA0_BASE +ffffffff82bdc514 r SDMA1_BASE +ffffffff82bdc578 r SMUIO_BASE +ffffffff82bdc5dc r PWR_BASE +ffffffff82bdc640 r NBIF_BASE +ffffffff82bdc6a4 r THM_BASE +ffffffff82bdc708 r CLK_BASE +ffffffff82bdd000 R vega20_ih_ip_funcs +ffffffff82bdd0a0 R vega20_ih_ip_block +ffffffff82bdd0b8 r vega20_ih_funcs +ffffffff82bdd0d8 r vega20_ih_self_irq_funcs +ffffffff82bde000 r GC_BASE +ffffffff82bde090 r HDP_BASE +ffffffff82bde120 r MMHUB_BASE +ffffffff82bde1b0 r ATHUB_BASE +ffffffff82bde240 r NBIO_BASE +ffffffff82bde2d0 r MP0_BASE +ffffffff82bde360 r MP1_BASE +ffffffff82bde3f0 r UVD_BASE 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iceland_mgcg_cgcg_init +ffffffff82bdf5a0 r fiji_mgcg_cgcg_init +ffffffff82bdf600 r tonga_mgcg_cgcg_init +ffffffff82bdf660 r cz_mgcg_cgcg_init +ffffffff82bdf6a0 r stoney_mgcg_cgcg_init +ffffffff82be0000 r amdgpu_dm_funcs +ffffffff82be00a0 R dm_ip_block +ffffffff82be00b8 R amdgpu_dm_encoder_helper_funcs +ffffffff82be0120 r dm_display_funcs +ffffffff82be0180 r hpd_disconnect_quirk_table +ffffffff82be0ef0 r amdgpu_dm_mode_funcs +ffffffff82be0f38 r amdgpu_dm_audio_component_bind_ops +ffffffff82be0f48 r amdgpu_dm_audio_component_ops +ffffffff82be0f80 r amdgpu_dm_encoder_funcs +ffffffff82be0fa0 r amdgpu_dm_connector_funcs +ffffffff82be1018 r amdgpu_dm_connector_helper_funcs +ffffffff82be1078 r amdgpu_dm_i2c_algo +ffffffff82be1088 r amdgpu_dm_backlight_ops +ffffffff82be1260 r add_fs_modes.common_rates +ffffffff82be2000 r amdgpu_dm_crtc_funcs +ffffffff82be20c0 r amdgpu_dm_crtc_helper_funcs +ffffffff82be3000 r dm_dtn_log_begin.msg +ffffffff82be300d r dm_dtn_log_end.msg +ffffffff82be3018 r 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dce110_max_clks_by_state +ffffffff82bf3028 r disp_clk_regs +ffffffff82bf307c r disp_clk_shift +ffffffff82bf3088 r disp_clk_mask +ffffffff82bf4000 r dce112_max_clks_by_state +ffffffff82bf4028 r disp_clk_regs +ffffffff82bf407c r disp_clk_shift +ffffffff82bf4088 r disp_clk_mask +ffffffff82bf5000 r dce120_max_clks_by_state +ffffffff82bf6000 r clk_mgr_regs +ffffffff82bf6054 r clk_mgr_shift +ffffffff82bf6060 r clk_mgr_mask +ffffffff82bf7000 r clk_mgr_regs +ffffffff82bf7054 r clk_mgr_shift +ffffffff82bf7060 r clk_mgr_mask +ffffffff82bf8000 r clk_mgr_regs +ffffffff82bf8054 r clk_mgr_shift +ffffffff82bf8060 r clk_mgr_mask +ffffffff82bf9000 r lpddr5_wm_table +ffffffff82bf90c0 r ddr5_wm_table +ffffffff82bfa000 r lpddr5_wm_table +ffffffff82bfa0c0 r ddr5_wm_table +ffffffff82bfb000 r lpddr5_wm_table +ffffffff82bfb0c0 r ddr5_wm_table +ffffffff82bfc000 r lpddr5_wm_table +ffffffff82bfc0c0 r ddr4_wm_table +ffffffff82bfd000 r clk_mgr_regs_dcn321 +ffffffff82bfd054 r clk_mgr_shift_dcn321 +ffffffff82bfd060 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filter_3tap_16p_upscale +ffffffff82c0c040 r filter_3tap_16p_116 +ffffffff82c0c080 r filter_3tap_16p_149 +ffffffff82c0c0c0 r filter_3tap_16p_183 +ffffffff82c0c100 r filter_3tap_64p_upscale +ffffffff82c0c1d0 r filter_3tap_64p_116 +ffffffff82c0c2a0 r filter_3tap_64p_149 +ffffffff82c0c370 r filter_3tap_64p_183 +ffffffff82c0c440 r filter_4tap_16p_upscale +ffffffff82c0c490 r filter_4tap_16p_116 +ffffffff82c0c4e0 r filter_4tap_16p_149 +ffffffff82c0c530 r filter_4tap_16p_183 +ffffffff82c0c580 r filter_4tap_64p_upscale +ffffffff82c0c690 r filter_4tap_64p_116 +ffffffff82c0c7a0 r filter_4tap_64p_149 +ffffffff82c0c8b0 r filter_4tap_64p_183 +ffffffff82c0c9c0 r filter_5tap_64p_upscale +ffffffff82c0cb10 r filter_5tap_64p_116 +ffffffff82c0cc60 r filter_5tap_64p_149 +ffffffff82c0cdb0 r filter_5tap_64p_183 +ffffffff82c0cf00 r filter_6tap_64p_upscale +ffffffff82c0d090 r filter_6tap_64p_116 +ffffffff82c0d220 r filter_6tap_64p_149 +ffffffff82c0d3b0 r filter_6tap_64p_183 +ffffffff82c0d540 r filter_7tap_64p_upscale +ffffffff82c0d710 r filter_7tap_64p_116 +ffffffff82c0d8e0 r filter_7tap_64p_149 +ffffffff82c0dab0 r filter_7tap_64p_183 +ffffffff82c0dc80 r filter_8tap_64p_upscale +ffffffff82c0de90 r filter_8tap_64p_116 +ffffffff82c0e0a0 r filter_8tap_64p_149 +ffffffff82c0e2b0 r filter_8tap_64p_183 +ffffffff82c0e4c0 r filter_2tap_16p +ffffffff82c0e4f0 r filter_2tap_64p +ffffffff82c0f000 r dce110_str_enc_funcs +ffffffff82c0f120 r audio_clock_info_table_48bpc +ffffffff82c0f2b0 r audio_clock_info_table_36bpc +ffffffff82c0f440 r audio_clock_info_table +ffffffff82c10000 r global_color_matrix +ffffffff82c100a8 r dce_transform_funcs +ffffffff82c11000 r abm_funcs +ffffffff82c12000 r psr_funcs +ffffffff82c12040 r DP_SINK_DEVICE_STR_ID_1 +ffffffff82c12045 r DP_SINK_DEVICE_STR_ID_2 +ffffffff82c13000 r replay_funcs +ffffffff82c14000 r reg_offsets +ffffffff82c15000 r bios_regs +ffffffff82c15008 r res_cap +ffffffff82c15048 r dce100_res_pool_funcs +ffffffff82c15140 r clk_src_regs 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r aux_engine_regs +ffffffff82c16d30 r aux_mask +ffffffff82c16d90 r aux_shift +ffffffff82c16db0 r i2c_hw_regs +ffffffff82c16f00 r i2c_shifts +ffffffff82c16f2c r i2c_masks +ffffffff82c16fd0 r audio_regs +ffffffff82c17104 r audio_shift +ffffffff82c1711c r audio_mask +ffffffff82c17160 r stream_enc_regs +ffffffff82c1780c r se_shift +ffffffff82c17890 r se_mask +ffffffff82c17a94 r hwseq_reg +ffffffff82c17cb0 r hwseq_shift +ffffffff82c17d30 r hwseq_mask +ffffffff82c18000 r reg_offsets +ffffffff82c18018 r dce110_compressor_funcs +ffffffff82c19000 r dce110_funcs +ffffffff82c192e8 r dce110_private_funcs +ffffffff82c1a000 r dce110_mem_input_v_funcs +ffffffff82c1a090 r dvmm_Hw_Setting_1DTiling +ffffffff82c1a120 r dvmm_Hw_Setting_2DTiling +ffffffff82c1a1b0 r dvmm_Hw_Setting_Linear +ffffffff82c1b000 r global_color_matrix +ffffffff82c1b0b0 r input_csc_matrix +ffffffff82c1c000 r funcs +ffffffff82c1d000 r bios_regs +ffffffff82c1d008 r dce110_res_pool_funcs +ffffffff82c1d100 r debug_defaults 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dmcu_shift +ffffffff82c25518 r dmcu_mask +ffffffff82c25564 r abm_regs +ffffffff82c255cc r abm_shift +ffffffff82c255f0 r abm_mask +ffffffff82c25680 r dce112_tg_offsets +ffffffff82c256c8 r res_create_funcs +ffffffff82c256f8 r plane_cap +ffffffff82c25724 r polaris_11_resource_cap +ffffffff82c25760 r polaris_10_resource_cap +ffffffff82c257a0 r panel_cntl_regs +ffffffff82c257c0 r panel_cntl_shift +ffffffff82c257d0 r panel_cntl_mask +ffffffff82c25810 r link_enc_regs +ffffffff82c25bd0 r link_enc_aux_regs +ffffffff82c25c20 r link_enc_hpd_regs +ffffffff82c25c38 r link_enc_feature +ffffffff82c25c48 r cs_shift +ffffffff82c25c54 r cs_mask +ffffffff82c25c80 r mi_regs +ffffffff82c25f98 r mi_shifts +ffffffff82c25fe0 r mi_masks +ffffffff82c26100 r ipp_regs +ffffffff82c262f8 r ipp_shift +ffffffff82c26320 r ipp_mask +ffffffff82c263c0 r xfm_regs +ffffffff82c26960 r xfm_shift +ffffffff82c269c0 r xfm_mask +ffffffff82c26b40 r opp_regs +ffffffff82c26c90 r opp_shift +ffffffff82c26cbc r opp_mask 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se_mask +ffffffff82c2aad0 r dce121_hwseq_reg +ffffffff82c2acec r dce121_hwseq_shift +ffffffff82c2ad6c r dce121_hwseq_mask +ffffffff82c2af60 r hwseq_reg +ffffffff82c2b17c r hwseq_shift +ffffffff82c2b1fc r hwseq_mask +ffffffff82c2c000 r dce120_tg_funcs +ffffffff82c2d000 r bios_regs +ffffffff82c2d008 r res_cap +ffffffff82c2d048 r dce80_res_pool_funcs +ffffffff82c2d140 r debug_defaults +ffffffff82c2d2f0 r clk_src_regs +ffffffff82c2d3ec r dmcu_regs +ffffffff82c2d448 r dmcu_shift +ffffffff82c2d45c r dmcu_mask +ffffffff82c2d4a8 r abm_regs +ffffffff82c2d510 r abm_shift +ffffffff82c2d534 r abm_mask +ffffffff82c2d5c0 r dce80_tg_offsets +ffffffff82c2d608 r plane_cap +ffffffff82c2d638 r res_create_funcs +ffffffff82c2d670 r panel_cntl_regs +ffffffff82c2d690 r panel_cntl_shift +ffffffff82c2d6a0 r panel_cntl_mask +ffffffff82c2d6e0 r link_enc_regs +ffffffff82c2daa0 r link_enc_aux_regs +ffffffff82c2daf0 r link_enc_hpd_regs +ffffffff82c2db08 r link_enc_feature +ffffffff82c2db18 r cs_shift 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dcn10_dpp_funcs +ffffffff82c32000 r dpp_input_csc_matrix +ffffffff82c34000 R dcn10_dwbc_funcs +ffffffff82c35000 r hubbub1_funcs +ffffffff82c36000 r dcn10_hubp_funcs +ffffffff82c37000 r reduceSizeAndFraction.prime_numbers +ffffffff82c39000 r dcn10_funcs +ffffffff82c392e8 r dcn10_private_funcs +ffffffff82c3a000 r dcn10_ipp_funcs +ffffffff82c3a048 r dcn20_ipp_funcs +ffffffff82c3b000 r dcn10_lnk_enc_funcs +ffffffff82c3c000 r dcn10_mpc_funcs +ffffffff82c3d000 r dcn10_opp_funcs +ffffffff82c3e000 r dcn10_tg_funcs +ffffffff82c3f000 r bios_regs +ffffffff82c3f008 r rv2_res_cap +ffffffff82c3f044 r res_cap +ffffffff82c3f080 r dcn10_res_pool_funcs +ffffffff82c3f178 r debug_defaults_drv +ffffffff82c3f320 r debug_defaults_diags +ffffffff82c3f4d0 r clk_src_regs +ffffffff82c3f620 r dmcu_regs +ffffffff82c3f67c r dmcu_shift +ffffffff82c3f690 r dmcu_mask +ffffffff82c3f6dc r abm_regs +ffffffff82c3f744 r abm_shift +ffffffff82c3f768 r abm_mask +ffffffff82c3f7f8 r res_create_funcs +ffffffff82c3f828 r plane_cap +ffffffff82c3f860 r panel_cntl_regs +ffffffff82c3f880 r panel_cntl_shift +ffffffff82c3f890 r panel_cntl_mask +ffffffff82c3f8d0 r link_enc_regs +ffffffff82c3fde0 r link_enc_aux_regs +ffffffff82c3fe20 r link_enc_hpd_regs +ffffffff82c3fe30 r le_shift +ffffffff82c3ff20 r le_mask +ffffffff82c402d8 r link_enc_feature +ffffffff82c402e8 r cs_shift +ffffffff82c402f4 r cs_mask +ffffffff82c40320 r hubp_regs +ffffffff82c409d0 r hubp_shift +ffffffff82c40a94 r hubp_mask +ffffffff82c40da0 r ipp_regs +ffffffff82c40e80 r ipp_shift +ffffffff82c40e9c r ipp_mask +ffffffff82c40f10 r tf_regs +ffffffff82c41e80 r tf_shift +ffffffff82c420e8 r tf_mask +ffffffff82c42a80 r opp_regs +ffffffff82c42b50 r opp_shift +ffffffff82c42b70 r opp_mask +ffffffff82c42bf0 r tg_regs +ffffffff82c43190 r tg_shift +ffffffff82c43264 r tg_mask +ffffffff82c435b0 r aux_engine_regs +ffffffff82c436a0 r aux_mask +ffffffff82c43700 r aux_shift +ffffffff82c43720 r i2c_hw_regs +ffffffff82c43870 r i2c_shifts +ffffffff82c4389c r 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r dccg_mask +ffffffff82c987a0 r abm_regs +ffffffff82c989a8 r abm_shift +ffffffff82c989cc r abm_mask +ffffffff82c98a58 r res_create_funcs +ffffffff82c98a88 r plane_cap +ffffffff82c98ac0 r panel_cntl_regs +ffffffff82c98ae0 r panel_cntl_shift +ffffffff82c98af0 r panel_cntl_mask +ffffffff82c98b30 r link_enc_regs +ffffffff82c99190 r link_enc_aux_regs +ffffffff82c991e0 r link_enc_hpd_regs +ffffffff82c991f4 r le_shift +ffffffff82c992e4 r le_mask +ffffffff82c9969c r link_enc_feature +ffffffff82c996ac r cs_shift +ffffffff82c996b8 r cs_mask +ffffffff82c996e0 r hubbub_reg +ffffffff82c99868 r hubbub_shift +ffffffff82c998f8 r hubbub_mask +ffffffff82c99b30 r vmid_regs +ffffffff82c99cf0 r vmid_shifts +ffffffff82c99cf8 r vmid_masks +ffffffff82c99d20 r hubp_regs +ffffffff82c9a75c r hubp_shift +ffffffff82c9a858 r hubp_mask +ffffffff82c9ac50 r dpp_regs +ffffffff82c9c6a4 r tf_shift +ffffffff82c9c978 r tf_mask +ffffffff82c9d4c0 r opp_regs +ffffffff82c9d678 r opp_shift +ffffffff82c9d6b0 r opp_mask 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abm_shift +ffffffff82cb1974 r abm_mask +ffffffff82cb1a00 r res_create_funcs +ffffffff82cb1a30 r plane_cap +ffffffff82cb1a60 r link_enc_regs +ffffffff82cb20c0 r link_enc_aux_regs +ffffffff82cb2110 r link_enc_hpd_regs +ffffffff82cb2124 r le_shift +ffffffff82cb2214 r le_mask +ffffffff82cb25cc r link_enc_feature +ffffffff82cb25dc r panel_config_defaults +ffffffff82cb2630 r debug_defaults_drv +ffffffff82cb27d8 r cs_shift +ffffffff82cb27e4 r cs_mask +ffffffff82cb280c r hubbub_reg +ffffffff82cb2994 r hubbub_shift +ffffffff82cb2a24 r hubbub_mask +ffffffff82cb2c60 r vmid_regs +ffffffff82cb2e20 r vmid_shifts +ffffffff82cb2e28 r vmid_masks +ffffffff82cb2e50 r hubp_regs +ffffffff82cb3680 r hubp_shift +ffffffff82cb377c r hubp_mask +ffffffff82cb3b70 r dpp_regs +ffffffff82cb5080 r tf_shift +ffffffff82cb5354 r tf_mask +ffffffff82cb5ea0 r opp_regs +ffffffff82cb6000 r opp_shift +ffffffff82cb6038 r opp_mask +ffffffff82cb6110 r optc_regs +ffffffff82cb66b0 r optc_shift +ffffffff82cb6784 r optc_mask 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hpo_dp_se_shift +ffffffff82cbbe18 r hpo_dp_se_mask +ffffffff82cbbec0 r apg_regs +ffffffff82cbbf00 r apg_shift +ffffffff82cbbf08 r apg_mask +ffffffff82cbbf20 r hpo_dp_link_enc_regs +ffffffff82cbc030 r hpo_dp_le_shift +ffffffff82cbc04c r hpo_dp_le_mask +ffffffff82cbc0b0 r hwseq_reg +ffffffff82cbc2cc r hwseq_shift +ffffffff82cbc34c r hwseq_mask +ffffffff82cbd000 r dccg314_funcs +ffffffff82cbe000 r dcn314_str_enc_funcs +ffffffff82cbf000 r dcn314_funcs +ffffffff82cbf2e8 r dcn314_private_funcs +ffffffff82cc0000 r bios_regs +ffffffff82cc0008 r res_cap_dcn314 +ffffffff82cc0048 r debug_defaults_diags +ffffffff82cc01f0 r clk_src_regs +ffffffff82cc0394 r dccg_regs +ffffffff82cc0484 r dccg_shift +ffffffff82cc0524 r dccg_mask +ffffffff82cc07a0 r abm_regs +ffffffff82cc0940 r abm_shift +ffffffff82cc0964 r abm_mask +ffffffff82cc09f0 r res_create_funcs +ffffffff82cc0a20 r plane_cap +ffffffff82cc0a50 r link_enc_regs +ffffffff82cc10b0 r link_enc_aux_regs +ffffffff82cc1100 r link_enc_hpd_regs +ffffffff82cc1114 r le_shift +ffffffff82cc1204 r le_mask +ffffffff82cc15bc r link_enc_feature +ffffffff82cc15cc r panel_config_defaults +ffffffff82cc1620 r debug_defaults_drv +ffffffff82cc17c8 r cs_shift +ffffffff82cc17d4 r cs_mask +ffffffff82cc17fc r hubbub_reg +ffffffff82cc1984 r hubbub_shift +ffffffff82cc1a14 r hubbub_mask +ffffffff82cc1c50 r vmid_regs +ffffffff82cc1e10 r vmid_shifts +ffffffff82cc1e18 r vmid_masks +ffffffff82cc1e40 r hubp_regs +ffffffff82cc2670 r hubp_shift +ffffffff82cc276c r hubp_mask +ffffffff82cc2b60 r dpp_regs +ffffffff82cc4070 r tf_shift +ffffffff82cc4344 r tf_mask +ffffffff82cc4e90 r opp_regs +ffffffff82cc4ff0 r opp_shift +ffffffff82cc5028 r opp_mask +ffffffff82cc5100 r optc_regs +ffffffff82cc56a0 r optc_shift +ffffffff82cc5774 r optc_mask +ffffffff82cc5abc r mpc_regs +ffffffff82cc72a8 r mpc_shift +ffffffff82cc7384 r mpc_mask +ffffffff82cc76f0 r dsc_regs +ffffffff82cc7a00 r dsc_shift +ffffffff82cc7ab8 r dsc_mask +ffffffff82cc7d90 r dwbc30_regs +ffffffff82cc7f6c r dwbc30_shift +ffffffff82cc80a0 r dwbc30_mask +ffffffff82cc8570 r mcif_wb30_regs +ffffffff82cc866c r mcif_wb30_shift +ffffffff82cc8718 r mcif_wb30_mask +ffffffff82cc89d0 r aux_engine_regs +ffffffff82cc8a98 r aux_mask +ffffffff82cc8af8 r aux_shift +ffffffff82cc8b10 r i2c_hw_regs +ffffffff82cc8c28 r i2c_shifts +ffffffff82cc8c54 r i2c_masks +ffffffff82cc8d00 r audio_regs +ffffffff82cc8e34 r audio_shift +ffffffff82cc8e4c r audio_mask +ffffffff82cc8e90 r stream_enc_regs +ffffffff82cc9534 r se_shift +ffffffff82cc9610 r se_mask +ffffffff82cc9980 r vpg_regs +ffffffff82cc9a70 r vpg_shift +ffffffff82cc9a98 r vpg_mask +ffffffff82cc9b40 r afmt_regs +ffffffff82cc9c18 r afmt_shift +ffffffff82cc9c2c r afmt_mask +ffffffff82cc9c80 r hpo_dp_stream_enc_regs +ffffffff82cc9eb0 r hpo_dp_se_shift +ffffffff82cc9ed8 r hpo_dp_se_mask +ffffffff82cc9f80 r apg_regs +ffffffff82cc9fc0 r apg_shift +ffffffff82cc9fc8 r apg_mask +ffffffff82cc9fe0 r hpo_dp_link_enc_regs +ffffffff82cca0f0 r hpo_dp_le_shift +ffffffff82cca10c r hpo_dp_le_mask +ffffffff82cca170 r hwseq_reg +ffffffff82cca38c r hwseq_shift +ffffffff82cca40c r hwseq_mask +ffffffff82ccb000 r bios_regs +ffffffff82ccb008 r res_cap_dcn31 +ffffffff82ccb050 r clk_src_regs +ffffffff82ccb1f4 r dccg_regs +ffffffff82ccb2e4 r dccg_shift +ffffffff82ccb384 r dccg_mask +ffffffff82ccb600 r abm_regs +ffffffff82ccb7a0 r abm_shift +ffffffff82ccb7c4 r abm_mask +ffffffff82ccb850 r res_create_funcs +ffffffff82ccb880 r plane_cap +ffffffff82ccb8b0 r link_enc_regs +ffffffff82ccbf10 r link_enc_aux_regs +ffffffff82ccbf60 r link_enc_hpd_regs +ffffffff82ccbf74 r le_shift +ffffffff82ccc064 r le_mask +ffffffff82ccc41c r link_enc_feature +ffffffff82ccc42c r panel_config_defaults +ffffffff82ccc480 r debug_defaults_drv +ffffffff82ccc628 r cs_shift +ffffffff82ccc634 r cs_mask +ffffffff82ccc65c r hubbub_reg +ffffffff82ccc7e4 r hubbub_shift +ffffffff82ccc874 r hubbub_mask +ffffffff82cccab0 r vmid_regs +ffffffff82cccc70 r vmid_shifts +ffffffff82cccc78 r vmid_masks +ffffffff82cccca0 r hubp_regs +ffffffff82ccd4d0 r hubp_shift +ffffffff82ccd5cc r hubp_mask +ffffffff82ccd9c0 r dpp_regs +ffffffff82cceed0 r tf_shift +ffffffff82ccf1a4 r tf_mask +ffffffff82ccfcf0 r opp_regs +ffffffff82ccfe50 r opp_shift +ffffffff82ccfe88 r opp_mask +ffffffff82ccff60 r optc_regs +ffffffff82cd0500 r optc_shift +ffffffff82cd05d4 r optc_mask +ffffffff82cd091c r mpc_regs +ffffffff82cd2108 r mpc_shift +ffffffff82cd21e4 r mpc_mask +ffffffff82cd2550 r dsc_regs +ffffffff82cd279c r dsc_shift +ffffffff82cd2854 r dsc_mask +ffffffff82cd2b30 r dwbc30_regs +ffffffff82cd2d0c r dwbc30_shift +ffffffff82cd2e40 r dwbc30_mask +ffffffff82cd3310 r mcif_wb30_regs +ffffffff82cd340c r mcif_wb30_shift +ffffffff82cd34b8 r mcif_wb30_mask +ffffffff82cd3770 r aux_engine_regs +ffffffff82cd3838 r aux_mask +ffffffff82cd3898 r aux_shift +ffffffff82cd38b0 r i2c_hw_regs +ffffffff82cd39c8 r i2c_shifts +ffffffff82cd39f4 r i2c_masks +ffffffff82cd3aa0 r audio_regs +ffffffff82cd3bd4 r audio_shift +ffffffff82cd3bec r audio_mask +ffffffff82cd3c30 r stream_enc_regs +ffffffff82cd42d4 r se_shift +ffffffff82cd43b0 r se_mask +ffffffff82cd4720 r vpg_regs +ffffffff82cd4810 r vpg_shift +ffffffff82cd4838 r vpg_mask +ffffffff82cd48e0 r afmt_regs +ffffffff82cd49b8 r afmt_shift +ffffffff82cd49cc r afmt_mask +ffffffff82cd4a20 r hpo_dp_stream_enc_regs +ffffffff82cd4c50 r hpo_dp_se_shift +ffffffff82cd4c78 r hpo_dp_se_mask +ffffffff82cd4d20 r apg_regs +ffffffff82cd4d60 r apg_shift +ffffffff82cd4d68 r apg_mask +ffffffff82cd4d80 r hpo_dp_link_enc_regs +ffffffff82cd4e90 r hpo_dp_le_shift +ffffffff82cd4eac r hpo_dp_le_mask +ffffffff82cd4f10 r hwseq_reg +ffffffff82cd512c r hwseq_shift +ffffffff82cd51ac r hwseq_mask +ffffffff82cd6000 r bios_regs +ffffffff82cd6008 r res_cap_dcn31 +ffffffff82cd6050 r clk_src_regs +ffffffff82cd61f4 r dccg_regs +ffffffff82cd62e4 r dccg_shift +ffffffff82cd6384 r dccg_mask +ffffffff82cd6600 r abm_regs +ffffffff82cd67a0 r abm_shift +ffffffff82cd67c4 r abm_mask +ffffffff82cd6850 r res_create_funcs +ffffffff82cd6880 r plane_cap +ffffffff82cd68b0 r link_enc_regs +ffffffff82cd6f10 r link_enc_aux_regs +ffffffff82cd6f60 r link_enc_hpd_regs +ffffffff82cd6f74 r le_shift +ffffffff82cd7064 r le_mask +ffffffff82cd741c r link_enc_feature +ffffffff82cd742c r panel_config_defaults +ffffffff82cd7480 r debug_defaults_drv +ffffffff82cd7628 r cs_shift +ffffffff82cd7634 r cs_mask +ffffffff82cd765c r hubbub_reg +ffffffff82cd77e4 r hubbub_shift +ffffffff82cd7874 r hubbub_mask +ffffffff82cd7ab0 r vmid_regs +ffffffff82cd7c70 r vmid_shifts +ffffffff82cd7c78 r vmid_masks +ffffffff82cd7ca0 r hubp_regs +ffffffff82cd84d0 r hubp_shift +ffffffff82cd85cc r hubp_mask +ffffffff82cd89c0 r dpp_regs +ffffffff82cd9ed0 r tf_shift +ffffffff82cda1a4 r tf_mask +ffffffff82cdacf0 r opp_regs +ffffffff82cdae50 r opp_shift +ffffffff82cdae88 r opp_mask +ffffffff82cdaf60 r optc_regs +ffffffff82cdb500 r optc_shift +ffffffff82cdb5d4 r optc_mask +ffffffff82cdb91c r mpc_regs +ffffffff82cdd108 r mpc_shift +ffffffff82cdd1e4 r mpc_mask +ffffffff82cdd550 r dsc_regs +ffffffff82cdd79c r dsc_shift +ffffffff82cdd854 r dsc_mask +ffffffff82cddb30 r dwbc30_regs +ffffffff82cddd0c r dwbc30_shift +ffffffff82cdde40 r dwbc30_mask +ffffffff82cde310 r mcif_wb30_regs +ffffffff82cde40c r mcif_wb30_shift +ffffffff82cde4b8 r mcif_wb30_mask +ffffffff82cde770 r aux_engine_regs +ffffffff82cde838 r aux_mask +ffffffff82cde898 r aux_shift +ffffffff82cde8b0 r i2c_hw_regs +ffffffff82cde9c8 r i2c_shifts +ffffffff82cde9f4 r i2c_masks +ffffffff82cdeaa0 r audio_regs +ffffffff82cdebd4 r audio_shift +ffffffff82cdebec r audio_mask +ffffffff82cdec30 r stream_enc_regs +ffffffff82cdf2d4 r se_shift +ffffffff82cdf3b0 r se_mask +ffffffff82cdf720 r vpg_regs +ffffffff82cdf810 r vpg_shift +ffffffff82cdf838 r vpg_mask +ffffffff82cdf8e0 r afmt_regs +ffffffff82cdf9b8 r afmt_shift +ffffffff82cdf9cc r afmt_mask +ffffffff82cdfa20 r hpo_dp_stream_enc_regs +ffffffff82cdfc50 r hpo_dp_se_shift +ffffffff82cdfc78 r hpo_dp_se_mask +ffffffff82cdfd20 r apg_regs +ffffffff82cdfd60 r apg_shift +ffffffff82cdfd68 r apg_mask +ffffffff82cdfd80 r hpo_dp_link_enc_regs +ffffffff82cdfe90 r hpo_dp_le_shift +ffffffff82cdfeac r hpo_dp_le_mask +ffffffff82cdff10 r hwseq_reg +ffffffff82ce012c r hwseq_shift +ffffffff82ce01ac r hwseq_mask +ffffffff82ce1000 r dccg32_funcs +ffffffff82ce2000 r dcn32_link_enc_funcs +ffffffff82ce3000 r dcn32_str_enc_funcs +ffffffff82ce4000 r hubbub32_funcs +ffffffff82ce5000 r dcn32_funcs +ffffffff82ce52e8 r dcn32_private_funcs +ffffffff82ce6000 r dcn32_mmhubbub_funcs +ffffffff82ce7000 r dcn32_mpc_funcs +ffffffff82ce8000 r res_cap_dcn32 +ffffffff82ce803c r dccg_shift +ffffffff82ce80dc r dccg_mask +ffffffff82ce8350 r abm_shift +ffffffff82ce8374 r abm_mask +ffffffff82ce8400 r res_create_funcs +ffffffff82ce8430 r plane_cap +ffffffff82ce845c r le_shift +ffffffff82ce854c r le_mask +ffffffff82ce8904 r link_enc_feature +ffffffff82ce8918 r debug_defaults_drv +ffffffff82ce8ac0 r cs_shift +ffffffff82ce8acc r cs_mask +ffffffff82ce8af4 r hubbub_shift +ffffffff82ce8b84 r hubbub_mask +ffffffff82ce8dbc r vmid_shifts +ffffffff82ce8dc4 r vmid_masks +ffffffff82ce8de4 r hubp_shift +ffffffff82ce8ee0 r hubp_mask +ffffffff82ce92d0 r tf_shift +ffffffff82ce95a4 r tf_mask +ffffffff82cea0e8 r opp_shift +ffffffff82cea120 r opp_mask +ffffffff82cea1f4 r optc_shift +ffffffff82cea2c8 r optc_mask +ffffffff82cea610 r mpc_shift +ffffffff82cea6ec r mpc_mask +ffffffff82ceaa58 r dsc_shift +ffffffff82ceab10 r dsc_mask +ffffffff82ceade8 r dwbc30_shift +ffffffff82ceaf1c r dwbc30_mask +ffffffff82ceb3e4 r mcif_wb30_shift +ffffffff82ceb490 r mcif_wb30_mask +ffffffff82ceb73c r aux_mask +ffffffff82ceb79c r aux_shift +ffffffff82ceb7b4 r i2c_shifts +ffffffff82ceb7e0 r i2c_masks +ffffffff82ceb884 r audio_shift +ffffffff82ceb89c r audio_mask +ffffffff82ceb8d8 r se_shift +ffffffff82ceb9b4 r se_mask +ffffffff82cebd20 r vpg_shift +ffffffff82cebd48 r vpg_mask +ffffffff82cebddc r afmt_shift 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+ffffffff82cf00e8 r opp_shift +ffffffff82cf0120 r opp_mask +ffffffff82cf01f4 r optc_shift +ffffffff82cf02c8 r optc_mask +ffffffff82cf0610 r mpc_shift +ffffffff82cf06ec r mpc_mask +ffffffff82cf0a58 r dsc_shift +ffffffff82cf0b10 r dsc_mask +ffffffff82cf0de8 r dwbc30_shift +ffffffff82cf0f1c r dwbc30_mask +ffffffff82cf13e4 r mcif_wb30_shift +ffffffff82cf1490 r mcif_wb30_mask +ffffffff82cf173c r aux_mask +ffffffff82cf179c r aux_shift +ffffffff82cf17b4 r i2c_shifts +ffffffff82cf17e0 r i2c_masks +ffffffff82cf1884 r audio_shift +ffffffff82cf189c r audio_mask +ffffffff82cf18d8 r se_shift +ffffffff82cf19b4 r se_mask +ffffffff82cf1d20 r vpg_shift +ffffffff82cf1d48 r vpg_mask +ffffffff82cf1ddc r afmt_shift +ffffffff82cf1df0 r afmt_mask +ffffffff82cf1e34 r hpo_dp_se_shift +ffffffff82cf1e5c r hpo_dp_se_mask +ffffffff82cf1efc r apg_shift +ffffffff82cf1f04 r apg_mask +ffffffff82cf1f1c r hpo_dp_le_shift +ffffffff82cf1f38 r hpo_dp_le_mask +ffffffff82cf1f9c r hwseq_shift +ffffffff82cf201c r hwseq_mask +ffffffff82cf4000 R dcn10_soc_defaults +ffffffff82cf408c R dcn10_ip_defaults +ffffffff82d00000 r dml20_funcs +ffffffff82d00030 r dml20v2_funcs +ffffffff82d00060 r dml21_funcs +ffffffff82d00090 r dml30_funcs +ffffffff82d000c0 r dml31_funcs +ffffffff82d000f0 r dml314_funcs +ffffffff82d00120 r dml32_funcs +ffffffff82d03000 r qp_table_444_8bpc_max +ffffffff82d03940 r qp_table_444_8bpc_min +ffffffff82d04280 r qp_table_444_10bpc_max +ffffffff82d04ec0 r qp_table_444_10bpc_min +ffffffff82d05b00 r qp_table_444_12bpc_max +ffffffff82d06a40 r qp_table_444_12bpc_min +ffffffff82d07980 r qp_table_422_8bpc_max +ffffffff82d07ec0 r qp_table_422_8bpc_min +ffffffff82d08400 r qp_table_422_10bpc_max +ffffffff82d08b40 r qp_table_422_10bpc_min +ffffffff82d09280 r qp_table_422_12bpc_max +ffffffff82d09bc0 r qp_table_422_12bpc_min +ffffffff82d0a500 r qp_table_420_8bpc_max +ffffffff82d0a940 r qp_table_420_8bpc_min +ffffffff82d0ad80 r qp_table_420_10bpc_max +ffffffff82d0b340 r qp_table_420_10bpc_min +ffffffff82d0b900 r qp_table_420_12bpc_max +ffffffff82d0c040 r qp_table_420_12bpc_min +ffffffff82d0e000 r funcs +ffffffff82d0e050 r hpd_regs +ffffffff82d0e1a0 r hpd_shift +ffffffff82d0e1b0 r hpd_mask +ffffffff82d0e1c0 r ddc_data_regs +ffffffff82d0e3a0 r ddc_clk_regs +ffffffff82d0e580 r ddc_shift +ffffffff82d0e5a8 r ddc_mask +ffffffff82d0f000 r funcs +ffffffff82d10000 r funcs +ffffffff82d10050 r hpd_regs +ffffffff82d101a0 r hpd_shift +ffffffff82d101b0 r hpd_mask +ffffffff82d101c0 r ddc_data_regs +ffffffff82d103a0 r ddc_clk_regs +ffffffff82d10580 r ddc_shift +ffffffff82d105a8 r ddc_mask +ffffffff82d11000 r funcs +ffffffff82d12000 r funcs +ffffffff82d12050 r hpd_regs +ffffffff82d121a0 r hpd_shift +ffffffff82d121b0 r hpd_mask +ffffffff82d121c0 r ddc_data_regs +ffffffff82d123a0 r ddc_clk_regs +ffffffff82d12580 r ddc_shift +ffffffff82d125a8 r ddc_mask +ffffffff82d13000 r funcs +ffffffff82d14000 r funcs +ffffffff82d14050 r hpd_regs +ffffffff82d141a0 r hpd_shift +ffffffff82d141b0 r hpd_mask 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+ffffffff82d1e730 r generic_regs +ffffffff82d1e7a0 r generic_shift +ffffffff82d1e7b0 r generic_mask +ffffffff82d1f000 r funcs +ffffffff82d20000 r funcs +ffffffff82d21000 r funcs +ffffffff82d22000 r funcs +ffffffff82d23000 r hdmi_14_protection +ffffffff82d23010 r dp_11_protection +ffffffff82d23020 r hdcp_i2c_offsets +ffffffff82d23050 r hdcp_dpcd_addrs +ffffffff82d24000 r irq_service_funcs_dce110 +ffffffff82d24008 r dummy_irq_info_funcs +ffffffff82d24018 r hpd_irq_info_funcs +ffffffff82d24028 r hpd_rx_irq_info_funcs +ffffffff82d24038 r pflip_irq_info_funcs +ffffffff82d24048 r vupdate_irq_info_funcs +ffffffff82d24058 r vblank_irq_info_funcs +ffffffff82d24070 r irq_source_info_dce110 +ffffffff82d26000 r irq_service_funcs_dce120 +ffffffff82d26008 r dummy_irq_info_funcs +ffffffff82d26018 r hpd_irq_info_funcs +ffffffff82d26028 r hpd_rx_irq_info_funcs +ffffffff82d26038 r pflip_irq_info_funcs +ffffffff82d26048 r vupdate_irq_info_funcs +ffffffff82d26058 r vblank_irq_info_funcs +ffffffff82d26070 r irq_source_info_dce120 +ffffffff82d28000 r irq_service_funcs_dce80 +ffffffff82d28008 r dummy_irq_info_funcs +ffffffff82d28018 r hpd_irq_info_funcs +ffffffff82d28028 r hpd_rx_irq_info_funcs +ffffffff82d28038 r pflip_irq_info_funcs +ffffffff82d28048 r vupdate_irq_info_funcs +ffffffff82d28058 r vblank_irq_info_funcs +ffffffff82d28070 r irq_source_info_dce80 +ffffffff82d2a000 r irq_service_funcs_dcn10 +ffffffff82d2a008 r dummy_irq_info_funcs +ffffffff82d2a018 r hpd_irq_info_funcs +ffffffff82d2a028 r hpd_rx_irq_info_funcs +ffffffff82d2a038 r pflip_irq_info_funcs +ffffffff82d2a048 r vupdate_no_lock_irq_info_funcs +ffffffff82d2a058 r vblank_irq_info_funcs +ffffffff82d2a068 r vline0_irq_info_funcs +ffffffff82d2a080 r irq_source_info_dcn10 +ffffffff82d2c000 r irq_service_funcs_dcn20 +ffffffff82d2c008 r dummy_irq_info_funcs +ffffffff82d2c018 r hpd_irq_info_funcs +ffffffff82d2c028 r hpd_rx_irq_info_funcs +ffffffff82d2c038 r pflip_irq_info_funcs +ffffffff82d2c048 r vupdate_no_lock_irq_info_funcs +ffffffff82d2c058 r vblank_irq_info_funcs +ffffffff82d2c068 r vline0_irq_info_funcs +ffffffff82d2c080 r irq_source_info_dcn20 +ffffffff82d2e000 r irq_service_funcs_dcn201 +ffffffff82d2e008 r dummy_irq_info_funcs +ffffffff82d2e018 r hpd_irq_info_funcs +ffffffff82d2e028 r hpd_rx_irq_info_funcs +ffffffff82d2e038 r pflip_irq_info_funcs +ffffffff82d2e048 r vupdate_no_lock_irq_info_funcs +ffffffff82d2e058 r vblank_irq_info_funcs +ffffffff82d2e068 r vline0_irq_info_funcs +ffffffff82d2e080 r irq_source_info_dcn201 +ffffffff82d30000 r irq_source_info_dcn21 +ffffffff82d31290 r irq_service_funcs_dcn21 +ffffffff82d31298 r dummy_irq_info_funcs +ffffffff82d312a8 r hpd_irq_info_funcs +ffffffff82d312b8 r hpd_rx_irq_info_funcs +ffffffff82d312c8 r pflip_irq_info_funcs +ffffffff82d312d8 r vupdate_no_lock_irq_info_funcs +ffffffff82d312e8 r vblank_irq_info_funcs +ffffffff82d312f8 r vline0_irq_info_funcs +ffffffff82d31308 r dmub_outbox_irq_info_funcs +ffffffff82d32000 r irq_source_info_dcn30 +ffffffff82d33290 r irq_service_funcs_dcn30 +ffffffff82d33298 r dummy_irq_info_funcs +ffffffff82d332a8 r hpd_irq_info_funcs +ffffffff82d332b8 r hpd_rx_irq_info_funcs +ffffffff82d332c8 r pflip_irq_info_funcs +ffffffff82d332d8 r vupdate_no_lock_irq_info_funcs +ffffffff82d332e8 r vblank_irq_info_funcs +ffffffff82d332f8 r vline0_irq_info_funcs +ffffffff82d33308 r dmub_trace_irq_info_funcs +ffffffff82d34000 r irq_source_info_dcn302 +ffffffff82d35290 r irq_service_funcs_dcn302 +ffffffff82d35298 r dummy_irq_info_funcs +ffffffff82d352a8 r hpd_irq_info_funcs +ffffffff82d352b8 r hpd_rx_irq_info_funcs +ffffffff82d352c8 r pflip_irq_info_funcs +ffffffff82d352d8 r vupdate_no_lock_irq_info_funcs +ffffffff82d352e8 r vblank_irq_info_funcs +ffffffff82d352f8 r vline0_irq_info_funcs +ffffffff82d35308 r dmub_trace_irq_info_funcs +ffffffff82d36000 r irq_service_funcs_dcn303 +ffffffff82d36008 r dummy_irq_info_funcs +ffffffff82d36018 r hpd_irq_info_funcs +ffffffff82d36028 r hpd_rx_irq_info_funcs +ffffffff82d36038 r pflip_irq_info_funcs +ffffffff82d36048 r vupdate_no_lock_irq_info_funcs +ffffffff82d36058 r vblank_irq_info_funcs +ffffffff82d36068 r vline0_irq_info_funcs +ffffffff82d36080 r irq_source_info_dcn303 +ffffffff82d38000 r irq_source_info_dcn31 +ffffffff82d39290 r irq_service_funcs_dcn31 +ffffffff82d39298 r dummy_irq_info_funcs +ffffffff82d392a8 r hpd_irq_info_funcs +ffffffff82d392b8 r hpd_rx_irq_info_funcs +ffffffff82d392c8 r pflip_irq_info_funcs +ffffffff82d392d8 r vupdate_no_lock_irq_info_funcs +ffffffff82d392e8 r vblank_irq_info_funcs +ffffffff82d392f8 r vline0_irq_info_funcs +ffffffff82d39308 r outbox_irq_info_funcs +ffffffff82d3a000 r irq_source_info_dcn314 +ffffffff82d3b290 r irq_service_funcs_dcn314 +ffffffff82d3b298 r dummy_irq_info_funcs +ffffffff82d3b2a8 r hpd_irq_info_funcs +ffffffff82d3b2b8 r hpd_rx_irq_info_funcs +ffffffff82d3b2c8 r pflip_irq_info_funcs +ffffffff82d3b2d8 r vupdate_no_lock_irq_info_funcs +ffffffff82d3b2e8 r vblank_irq_info_funcs +ffffffff82d3b2f8 r vline0_irq_info_funcs +ffffffff82d3b308 r outbox_irq_info_funcs +ffffffff82d3c000 r irq_source_info_dcn315 +ffffffff82d3d290 r irq_service_funcs_dcn315 +ffffffff82d3d298 r dummy_irq_info_funcs +ffffffff82d3d2a8 r hpd_irq_info_funcs +ffffffff82d3d2b8 r hpd_rx_irq_info_funcs +ffffffff82d3d2c8 r pflip_irq_info_funcs +ffffffff82d3d2d8 r vupdate_no_lock_irq_info_funcs +ffffffff82d3d2e8 r vblank_irq_info_funcs +ffffffff82d3d2f8 r vline0_irq_info_funcs +ffffffff82d3d308 r outbox_irq_info_funcs +ffffffff82d3e000 r irq_source_info_dcn32 +ffffffff82d3f290 r irq_service_funcs_dcn32 +ffffffff82d3f298 r dummy_irq_info_funcs +ffffffff82d3f2a8 r hpd_irq_info_funcs +ffffffff82d3f2b8 r hpd_rx_irq_info_funcs +ffffffff82d3f2c8 r pflip_irq_info_funcs +ffffffff82d3f2d8 r vupdate_no_lock_irq_info_funcs +ffffffff82d3f2e8 r vblank_irq_info_funcs +ffffffff82d3f2f8 r vline0_irq_info_funcs +ffffffff82d3f308 r outbox_irq_info_funcs +ffffffff82d41000 r dio_link_hwss +ffffffff82d42000 r dio_fixed_vs_pe_retimer_link_hwss +ffffffff82d43000 r dpia_link_hwss +ffffffff82d44000 r hpo_dp_link_hwss +ffffffff82d45000 r hpo_fixed_vs_pe_retimer_dp_link_hwss +ffffffff82d46000 r DP_SINK_BRANCH_DEV_NAME_7580 +ffffffff82d47000 r DP_VGA_DONGLE_BRANCH_DEV_NAME +ffffffff82d47006 r DP_DVI_CONVERTER_ID_4 +ffffffff82d4700d r DP_DVI_CONVERTER_ID_5 +ffffffff82d48000 r dp_lt_fallbacks +ffffffff82d4c000 r mandatory_dpcd_partitions +ffffffff82d4d000 r DP_VGA_LVDS_CONVERTER_ID_2 +ffffffff82d4d007 r DP_VGA_LVDS_CONVERTER_ID_3 +ffffffff82d4e000 r virtual_lnk_enc_funcs +ffffffff82d4f000 r virtual_link_hwss +ffffffff82d50000 r virtual_str_enc_funcs +ffffffff82d51000 R dmub_srv_dcn20_regs +ffffffff82d52000 R dmub_srv_dcn21_regs +ffffffff82d53000 R dmub_srv_dcn30_regs +ffffffff82d54000 R dmub_srv_dcn301_regs +ffffffff82d55000 R dmub_srv_dcn302_regs +ffffffff82d56000 R dmub_srv_dcn303_regs +ffffffff82d57000 R dmub_srv_dcn31_regs +ffffffff82d58000 R dmub_srv_dcn314_regs +ffffffff82d59000 R dmub_srv_dcn315_regs +ffffffff82d5a000 R dmub_srv_dcn316_regs +ffffffff82d5b000 R dmub_srv_dcn32_regs +ffffffff82d5c000 r numerator01 +ffffffff82d5c020 r numerator02 +ffffffff82d5c040 r numerator04 +ffffffff82d5c060 r numerator05 +ffffffff82d60000 r abm_settings +ffffffff82d60020 r abm_settings_config0 +ffffffff82d60060 r abm_settings_config1 +ffffffff82d600a0 r abm_settings_config2 +ffffffff82d600d8 r min_reduction_table_v_2_2 +ffffffff82d600e5 r max_reduction_table_v_2_2 +ffffffff82d600f2 r min_reduction_table +ffffffff82d600ff r max_reduction_table +ffffffff82d60110 r custom_backlight_curve0 +ffffffff82d61000 R amdgpu_pp_profile_name +ffffffff82d62000 r pp_lib_thermal_controller_names +ffffffff82d63000 r pp_ip_funcs +ffffffff82d630a0 R pp_smu_ip_block +ffffffff82d630b8 r pp_dpm_funcs +ffffffff82d64000 r gpio_tbl +ffffffff82d640f0 r enable_fb_req_rej_tbl +ffffffff82d64140 r use_bclk_tbl +ffffffff82d64310 r turn_off_plls_tbl +ffffffff82d64640 r enter_baco_tbl +ffffffff82d64730 r exit_baco_tbl +ffffffff82d64850 r clean_baco_tbl +ffffffff82d65000 r gpio_tbl +ffffffff82d650f0 r enable_fb_req_rej_tbl +ffffffff82d65140 r use_bclk_tbl +ffffffff82d652e0 r turn_off_plls_tbl +ffffffff82d65370 r clk_req_b_tbl +ffffffff82d65490 r enter_baco_tbl +ffffffff82d655b0 r exit_baco_tbl +ffffffff82d656d0 r clean_baco_tbl +ffffffff82d66000 r gpio_tbl +ffffffff82d660f0 r enable_fb_req_rej_tbl +ffffffff82d66140 r use_bclk_tbl_vg +ffffffff82d66200 r turn_off_plls_tbl_vg +ffffffff82d66350 r use_bclk_tbl +ffffffff82d66440 r turn_off_plls_tbl +ffffffff82d665f0 r clk_req_b_tbl +ffffffff82d66710 r enter_baco_tbl +ffffffff82d66830 r exit_baco_tbl +ffffffff82d66950 r clean_baco_tbl +ffffffff82d67000 r vega10_fuses_default +ffffffff82d76000 r pp_r600_encode_lanes +ffffffff82d77000 R pptable_v1_0_funcs +ffffffff82d78000 R pptable_funcs +ffffffff82d78020 r soft_dummy_pp_table +ffffffff82d79000 r smu10_hwmgr_funcs +ffffffff82d7a000 r smu7_hwmgr_funcs +ffffffff82d7a2f8 r smu7_irq_funcs +ffffffff82d7a310 r SMU7ThermalPolicy +ffffffff82d7b000 r GCCACConfig_Polaris10 +ffffffff82d7b1b0 r DIDTConfig_Polaris10 +ffffffff82d7ba50 r GCCACConfig_Polaris11 +ffffffff82d7bc00 r DIDTConfig_Polaris11_Kicker +ffffffff82d7c4a0 r DIDTConfig_Polaris11 +ffffffff82d7cd40 r DIDTConfig_Polaris12 +ffffffff82d7d5e0 r GCCACConfig_VegaM +ffffffff82d7d790 r DIDTConfig_VegaM +ffffffff82d7f000 r smu8_hwmgr_funcs +ffffffff82d7f2f0 r SMU7ThermalPolicy +ffffffff82d80000 r smu9_irq_funcs +ffffffff82d81000 r gpio_tbl_iceland +ffffffff82d81060 r gpio_tbl +ffffffff82d81150 r enable_fb_req_rej_tbl +ffffffff82d811a0 r use_bclk_tbl +ffffffff82d81370 r turn_off_plls_tbl +ffffffff82d81610 r enter_baco_tbl +ffffffff82d81730 r exit_baco_tbl_iceland +ffffffff82d81870 r clean_baco_tbl_iceland +ffffffff82d81890 r exit_baco_tbl +ffffffff82d819b0 r clean_baco_tbl +ffffffff82d82000 r pre_baco_tbl +ffffffff82d82090 r enter_baco_tbl +ffffffff82d822b0 r exit_baco_tbl +ffffffff82d82520 r clean_baco_tbl +ffffffff82d83000 r vega10_hwmgr_funcs +ffffffff82d832f0 r channel_number +ffffffff82d83320 r SMU7ThermalWithDelayPolicy +ffffffff82d84000 r SEDiDtStallCtrlConfig_vega10 +ffffffff82d84110 r SEDiDtStallPatternConfig_vega10 +ffffffff82d842e0 r SEDiDtWeightConfig_Vega10 +ffffffff82d843b0 r SEDiDtCtrl1Config_Vega10 +ffffffff82d84440 r SEDiDtCtrl2Config_Vega10 +ffffffff82d84510 r SEDiDtCtrl3Config_vega10 +ffffffff82d84820 r SEDiDtTuningCtrlConfig_Vega10 +ffffffff82d848b0 r SELCacConfig_Vega10 +ffffffff82d84a40 r SEDiDtCtrl0Config_Vega10 +ffffffff82d84d10 r AvfsPSMInitConfig_vega10 +ffffffff82d84d90 r SEEDCStallPatternConfig_Vega10 +ffffffff82d84ea0 r SEEDCStallDelayConfig_Vega10 +ffffffff82d84f80 r SEEDCCtrlConfig_Vega10 +ffffffff82d85040 r PSMSEEDCStallPatternConfig_Vega10 +ffffffff82d850c0 r PSMSEEDCStallDelayConfig_Vega10 +ffffffff82d851d0 r PSMSEEDCCtrlResetConfig_Vega10 +ffffffff82d85290 r PSMSEEDCCtrlConfig_Vega10 +ffffffff82d85350 r SEEDCForceStallPatternConfig_Vega10 +ffffffff82d853e0 r SEEDCCtrlForceStallConfig_Vega10 +ffffffff82d86000 R vega10_pptable_funcs +ffffffff82d87000 r pre_baco_tbl +ffffffff82d87090 r enter_baco_tbl +ffffffff82d872b0 r exit_baco_tbl +ffffffff82d87520 r clean_baco_tbl +ffffffff82d88000 r vega12_hwmgr_funcs +ffffffff82d882f0 r SMU7ThermalWithDelayPolicy +ffffffff82d88340 r link_width +ffffffff82d89000 R vega12_pptable_funcs +ffffffff82d8a000 r clean_baco_tbl +ffffffff82d8b000 r vega20_hwmgr_funcs +ffffffff82d8b2f0 r SMU7ThermalWithDelayPolicy +ffffffff82d8b340 r link_width +ffffffff82d8c000 R vega20_pptable_funcs +ffffffff82d8d000 R ci_smu_funcs +ffffffff82d8d0e0 r defaults_hawaii_pro +ffffffff82d8d12c r defaults_hawaii_xt +ffffffff82d8d178 r defaults_saturn_xt +ffffffff82d8d1c4 r defaults_bonaire_xt +ffffffff82d8d210 r ci_program_jump_on_start.data +ffffffff82d8e000 R fiji_smu_funcs +ffffffff82d8e0e0 r avfs_graphics_level +ffffffff82d8e240 r fiji_power_tune_data_set_array +ffffffff82d8e246 r fiji_clock_stretch_amount_conversion +ffffffff82d8e260 r fiji_clock_stretcher_ddt_table +ffffffff82d8f000 R iceland_smu_funcs +ffffffff82d8f0e0 r defaults_icelandxt +ffffffff82d8f12c r defaults_icelandpro +ffffffff82d8f178 r defaults_iceland +ffffffff82d90000 R polaris10_smu_funcs +ffffffff82d900e0 r avfs_graphics_level_polaris10 +ffffffff82d902a0 r avfs_memory_level_polaris10 +ffffffff82d902c0 r polaris10_power_tune_data_set_array +ffffffff82d90310 r Range_Table +ffffffff82d91000 R smu10_smu_funcs +ffffffff82d92000 r smu7_program_jump_on_start.data +ffffffff82d92010 r pwr_virus_table_pre +ffffffff82d92680 r pwr_virus_table_post +ffffffff82d92f80 r pwr_virus_section1 +ffffffff82d93610 r pwr_virus_section2 +ffffffff82d93660 r pwr_virus_section3 +ffffffff82d9aab0 r pwr_virus_section4 +ffffffff82d9ae80 r pwr_virus_section5 +ffffffff82d9b490 r pwr_virus_section6 +ffffffff82d9d000 R smu8_smu_funcs +ffffffff82d9e000 R tonga_smu_funcs +ffffffff82d9e0e0 r tonga_power_tune_data_set_array +ffffffff82d9e12c r tonga_clock_stretch_amount_conversion +ffffffff82d9e140 r tonga_clock_stretcher_ddt_table +ffffffff82d9f000 R vega10_smu_funcs +ffffffff82da0000 R vega12_smu_funcs +ffffffff82da1000 R vega20_smu_funcs +ffffffff82da2000 R vegam_smu_funcs +ffffffff82da20e0 r vegam_power_tune_data_set_array +ffffffff82da2130 r Range_Table +ffffffff82da3000 R smu_ip_funcs +ffffffff82da30a0 R smu_v11_0_ip_block +ffffffff82da30b8 R smu_v12_0_ip_block +ffffffff82da30d0 R smu_v13_0_ip_block +ffffffff82da30e8 r swsmu_pm_funcs +ffffffff82da4000 r arcturus_ppt_funcs +ffffffff82da43f0 r arcturus_table_map +ffffffff82da4470 r arcturus_pwr_src_map +ffffffff82da4480 r arcturus_workload_map +ffffffff82da44d0 r smu11_thermal_policy +ffffffff82da4528 r arcturus_i2c_algo +ffffffff82da4538 r arcturus_i2c_control_quirks +ffffffff82da4550 r arcturus_throttler_map +ffffffff82da4570 r arcturus_message_map +ffffffff82da4ff0 r arcturus_clk_map +ffffffff82da50b0 r arcturus_feature_mask_map +ffffffff82da6000 r cyan_skillfish_ppt_funcs +ffffffff82da7000 r navi10_ppt_funcs +ffffffff82da73f0 r smu11_thermal_policy +ffffffff82da7448 r navi10_i2c_algo +ffffffff82da7458 r navi10_i2c_control_quirks +ffffffff82da7470 r navi1x_throttler_map +ffffffff82da7490 r NoDbiPrbs7 +ffffffff82da8490 r DbiPrbs7 +ffffffff82daa000 r sienna_cichlid_ppt_funcs +ffffffff82daa3f0 r smu11_thermal_policy +ffffffff82daa448 r sienna_cichlid_i2c_algo +ffffffff82daa458 r sienna_cichlid_i2c_control_quirks +ffffffff82daa470 r sienna_cichlid_throttler_map +ffffffff82dab000 r smu_v11_0_irq_funcs +ffffffff82dab010 r link_width +ffffffff82dac000 r vangogh_ppt_funcs +ffffffff82dac3e8 r vangogh_throttler_map +ffffffff82dad000 r renoir_ppt_funcs +ffffffff82dad3e8 r renoir_throttler_map +ffffffff82dae000 r aldebaran_ppt_funcs +ffffffff82dae3f0 r aldebaran_clk_map +ffffffff82dae4b0 r aldebaran_table_map +ffffffff82dae530 r smu13_thermal_policy +ffffffff82dae588 r aldebaran_i2c_algo +ffffffff82dae598 r aldebaran_i2c_control_quirks +ffffffff82dae5b0 r aldebaran_throttler_map +ffffffff82dae5d0 r aldebaran_message_map +ffffffff82daf050 r aldebaran_feature_mask_map +ffffffff82db0000 R pmfw_decoded_link_speed +ffffffff82db0020 R pmfw_decoded_link_width +ffffffff82db0040 r smu_v13_0_irq_funcs +ffffffff82db1000 r smu_v13_0_0_ppt_funcs +ffffffff82db13f0 r smu13_thermal_policy +ffffffff82db1448 r smu_v13_0_0_i2c_algo +ffffffff82db1458 r smu_v13_0_0_i2c_control_quirks +ffffffff82db1470 r smu_v13_0_0_throttler_map +ffffffff82db2000 r smu_v13_0_4_ppt_funcs +ffffffff82db3000 r smu_v13_0_5_ppt_funcs +ffffffff82db4000 r smu_v13_0_6_ppt_funcs +ffffffff82db43f0 r smu_v13_0_6_message_map +ffffffff82db4e70 r smu_v13_0_6_clk_map +ffffffff82db4f30 r smu_v13_0_6_table_map +ffffffff82db4fb0 r smu_v13_0_6_i2c_algo +ffffffff82db4fc0 r smu_v13_0_6_i2c_control_quirks +ffffffff82db4fd0 r smu_v13_0_6_irq_funcs +ffffffff82db4fe0 r smu_v13_0_6_throttler_map +ffffffff82db4ff0 r smu_v13_0_6_feature_mask_map +ffffffff82db6000 r smu_v13_0_7_ppt_funcs +ffffffff82db63f0 r smu13_thermal_policy +ffffffff82db6450 r smu_v13_0_7_throttler_map +ffffffff82db7000 r yellow_carp_ppt_funcs +ffffffff82db8000 R link_speed +ffffffff82db8020 r __smu_message_names +ffffffff82db9000 R pchb_ca +ffffffff82dba000 R amas_ca +ffffffff82dba028 R amas_devices +ffffffff82dba040 r amas_feature +ffffffff82dbb000 R cardslot_ca +ffffffff82dbc000 R cardbus_ca +ffffffff82dbd000 R com_cardbus_ca +ffffffff82dbe000 R xl_cardbus_ca +ffffffff82dbe030 R xl_cardbus_products +ffffffff82dbf000 R dc_cardbus_ca +ffffffff82dbf030 R dc_cardbus_devices +ffffffff82dc0000 R fxp_cardbus_ca +ffffffff82dc0028 R fxp_cardbus_devices +ffffffff82dc1000 R rl_cardbus_devices +ffffffff82dc1028 R rl_cardbus_ca +ffffffff82dc2000 R re_cardbus_ca +ffffffff82dc2028 R re_cardbus_devices +ffffffff82dc3000 R ath_cardbus_ca +ffffffff82dc4000 R athn_cardbus_ca +ffffffff82dc4030 r athn_cardbus_devices +ffffffff82dc5000 R atw_cardbus_ca +ffffffff82dc5028 R atw_cardbus_devices +ffffffff82dc6000 R rtw_cardbus_ca +ffffffff82dc6028 R rtw_cardbus_devices +ffffffff82dc7000 R ral_cardbus_ca +ffffffff82dc7030 r ral_cardbus_devices +ffffffff82dc8000 R acx_cardbus_ca +ffffffff82dc8028 r acx_cardbus_devices +ffffffff82dc9000 R pgt_cardbus_ca +ffffffff82dc9028 R pgt_cardbus_devices +ffffffff82dca000 R ehci_cardbus_ca +ffffffff82dcb000 R ohci_cardbus_ca +ffffffff82dcc000 R uhci_cardbus_ca +ffffffff82dcd000 R malo_cardbus_ca +ffffffff82dcd028 r malo_cardbus_devices +ffffffff82dce000 R bwi_cardbus_ca +ffffffff82dce030 r bwi_cardbus_devices +ffffffff82dcf000 R pcmcia_ca +ffffffff82dd0000 r pcmcia_parse_cis_tuple.init_cfe +ffffffff82dd1000 r pcmcia_cis_quirks +ffffffff82dd2000 R ep_pcmcia_ca +ffffffff82dd3000 R ne_pcmcia_ca +ffffffff82dd3030 R ne2000devs +ffffffff82dd5000 R aic_pcmcia_ca +ffffffff82dd6000 R com_pcmcia_ca +ffffffff82dd7000 R wdc_pcmcia_ca +ffffffff82dd8000 R sm_pcmcia_ca +ffffffff82dd9000 R xe_pcmcia_ca +ffffffff82dda000 R wi_pcmcia_ca +ffffffff82dda030 r wi_pcmcia_products +ffffffff82ddb000 R malo_pcmcia_ca +ffffffff82ddc000 R an_pcmcia_ca +ffffffff82ddd000 R pcib_ca +ffffffff82dde000 R amdpcib_ca +ffffffff82dde028 R amdpcib_devices +ffffffff82ddf000 R tcpcib_ca +ffffffff82ddf028 R tcpcib_devices +ffffffff82de0000 R aapic_ca +ffffffff82de1000 R hme_pci_ca +ffffffff82de1028 r hme_promhdr +ffffffff82de102a r hme_promdat +ffffffff82de2000 R isa_ca +ffffffff82de3000 R isadma_ca +ffffffff82de4000 R fdc_ca +ffffffff82de5000 R fd_ca +ffffffff82de6000 R com_isa_ca +ffffffff82de7000 R pckbc_isa_ca +ffffffff82de8000 R vga_isa_ca +ffffffff82de9000 R wdc_isa_ca +ffffffff82dea000 R mpu_midi_hw_if +ffffffff82deb000 R mpu_isa_ca +ffffffff82dec000 R pcppi_ca +ffffffff82ded000 R spkr_ca +ffffffff82ded030 r pitchtab +ffffffff82dee000 R lpt_isa_ca +ffffffff82def000 R wbsio_ca +ffffffff82df0000 R schsio_ca +ffffffff82df1000 R lm_isa_ca +ffffffff82df1028 R lm_wbsio_ca +ffffffff82df2000 R it_sensors +ffffffff82df2110 R it_vrfact +ffffffff82df2140 R it_fan_regs +ffffffff82df2160 R it_fan_ext_regs +ffffffff82df2178 R it_ca +ffffffff82df3000 R abitkv_sensors +ffffffff82df3200 R abitaa_sensors +ffffffff82df3480 R abitav_sensors +ffffffff82df3700 R abitas_sensors +ffffffff82df3980 R abitax_sensors +ffffffff82df3bc0 R abitm4_sensors +ffffffff82df3e80 R abitan_sensors +ffffffff82df4120 R abital_sensors +ffffffff82df43a0 R abitaw_sensors +ffffffff82df4700 R abitni_sensors +ffffffff82df49a0 R abitat_sensors +ffffffff82df4cc0 R abitan2_sensors +ffffffff82df4f60 R abitab_sensors +ffffffff82df5220 R abitan3_sensors +ffffffff82df5500 R abitaw2_sensors +ffffffff82df5860 R abitat2_sensors +ffffffff82df5b60 R abitab2_sensors +ffffffff82df5ea0 R abitin_sensors +ffffffff82df61e0 R uguru_ca +ffffffff82df7000 R aps_ca +ffffffff82df8000 R wsdisplay_emul_ca +ffffffff82df8030 r charClass +ffffffff82df9000 r usl_syncops +ffffffff82dfa000 R wsevent_filtops +ffffffff82dfb000 R wskbd_ca +ffffffff82dfc000 r latin1_to_upper +ffffffff82dfd000 R wsmouse_ca +ffffffff82dfe000 R cyrillic_to_koi8 +ffffffff82dfe060 R unicode_to_latin2 +ffffffff82dfe0e0 R unicode_to_latin7 +ffffffff82dff000 R wsemul_vt100_ops +ffffffff82e00000 r decspcgr2uni +ffffffff82e00100 r dectech2uni +ffffffff82e00200 r nrctable +ffffffff82e01000 r vt100_fkeys +ffffffff82e010c0 r vt100_pfkeys +ffffffff82e010e0 r vt100_numpad +ffffffff82e02000 R pckbd_ca +ffffffff82e02028 R pckbd_accessops +ffffffff82e02040 R pckbd_consops +ffffffff82e02060 R pckbd_keymapdata +ffffffff82e02070 R pckbd_xtbl2 +ffffffff82e02100 R pckbd_xtbl2_ext +ffffffff82e03000 r pckbd_keydesc_us +ffffffff82e03250 r pckbd_keydesc_de +ffffffff82e032f0 r pckbd_keydesc_de_nodead +ffffffff82e03310 r pckbd_keydesc_fr +ffffffff82e033d0 r pckbd_keydesc_fr_dvorak_bepo +ffffffff82e03510 r pckbd_keydesc_dk +ffffffff82e035a0 r pckbd_keydesc_dk_nodead +ffffffff82e035b0 r pckbd_keydesc_it +ffffffff82e03640 r pckbd_keydesc_uk +ffffffff82e036e0 r pckbd_keydesc_jp +ffffffff82e03750 r pckbd_keydesc_sv +ffffffff82e03780 r pckbd_keydesc_sv_nodead +ffffffff82e03790 r pckbd_keydesc_no +ffffffff82e037c0 r pckbd_keydesc_no_nodead +ffffffff82e037d0 r pckbd_keydesc_us_declk +ffffffff82e03860 r pckbd_keydesc_us_dvorak +ffffffff82e03900 r pckbd_keydesc_us_colemak +ffffffff82e03948 r pckbd_keydesc_swapctrlcaps +ffffffff82e03960 r pckbd_keydesc_iopener +ffffffff82e039b0 r pckbd_keydesc_es +ffffffff82e03a50 r pckbd_keydesc_be +ffffffff82e03b10 r pckbd_keydesc_ru +ffffffff82e03c80 r pckbd_keydesc_ua +ffffffff82e03e10 r pckbd_keydesc_sg +ffffffff82e03ec0 r pckbd_keydesc_sg_nodead +ffffffff82e03ee0 r pckbd_keydesc_sf +ffffffff82e03f00 r pckbd_keydesc_pt +ffffffff82e03f90 r pckbd_keydesc_lt +ffffffff82e04070 r pckbd_keydesc_la +ffffffff82e04100 r pckbd_keydesc_br +ffffffff82e04180 r pckbd_keydesc_tr +ffffffff82e04230 r pckbd_keydesc_tr_nodead +ffffffff82e04250 r pckbd_keydesc_pl +ffffffff82e042b0 r pckbd_keydesc_hu +ffffffff82e043c0 r pckbd_keydesc_si +ffffffff82e044d0 r pckbd_keydesc_cf +ffffffff82e045a0 r pckbd_keydesc_cf_nodead +ffffffff82e045c0 r pckbd_keydesc_lv +ffffffff82e04640 r pckbd_keydesc_nl +ffffffff82e04720 r pckbd_keydesc_nl_nodead +ffffffff82e04740 r pckbd_keydesc_is +ffffffff82e047cc r pckbd_keydesc_is_nodead +ffffffff82e047e0 r pckbd_keydesc_ee +ffffffff82e04890 r pckbd_keydesc_ee_nodead +ffffffff82e048b0 R pckbd_keydesctab +ffffffff82e05000 R pms_ca +ffffffff82e05028 R pms_accessops +ffffffff82e05040 R pms_sec_accessops +ffffffff82e05060 R pms_protocols +ffffffff82e051e0 r alps_models +ffffffff82e06000 R skgpio_led_offset +ffffffff82e06008 R skgpio_ca +ffffffff82e07000 R hidkbd_trtab +ffffffff82e07100 r apple_fn_trans +ffffffff82e07120 r apple_tb_trans +ffffffff82e07140 r apple_mba_trans +ffffffff82e08000 r hidcc_attach_wskbd.accessops +ffffffff82e08020 r hidcc_keysyms +ffffffff82e09000 R usb_ca +ffffffff82e0a000 R usb_known_products +ffffffff82e15f90 R usb_known_vendors +ffffffff82e187b0 R usbd_error_strs +ffffffff82e19000 R usb_quirks +ffffffff82e19390 R usb_dev_quirks +ffffffff82e19398 R usbd_no_quirk +ffffffff82e1a000 R uhub_ca +ffffffff82e1a028 R uhub_uhub_ca +ffffffff82e1b000 R uaudio_ca +ffffffff82e1b028 R uaudio_hw_if +ffffffff82e1b0e0 R uaudio_rates +ffffffff82e1b120 r uaudio_clkname.names +ffffffff82e1b140 r uaudio_feature_addent.features +ffffffff82e1c000 R uvideo_ca +ffffffff82e1c028 R uvideo_hw_if +ffffffff82e1c100 R uvideo_devs +ffffffff82e1d000 r utvfu_select_norm.pal +ffffffff82e1d040 r utvfu_select_norm.ntsc +ffffffff82e1d080 r utvfu_setup_capture.setup +ffffffff82e1d180 r utvfu_audio_start_chip.setup +ffffffff82e1d1c8 r utvfu_audio_stop_chip.setup +ffffffff82e1d1d8 R utvfu_ca +ffffffff82e1d200 R utvfu_vid_hw_if +ffffffff82e1d2d0 R utvfu_au_hw_if +ffffffff82e1e000 R udl_ca +ffffffff82e1e030 r udl_devs +ffffffff82e1e0b0 r udl_modes +ffffffff82e1f000 R umidi_hw_if +ffffffff82e1f030 R umidi_ca +ffffffff82e1f060 r umidi_evlen +ffffffff82e1f080 r packet_length +ffffffff82e20000 r quirk_name +ffffffff82e21000 R ucom_ca +ffffffff82e22000 R ugen_ca +ffffffff82e22028 R ugenread_intr_filtops +ffffffff82e22058 R ugenread_isoc_filtops +ffffffff82e23000 R uhidev_ca +ffffffff82e23030 r uhid_graphire_report_descr +ffffffff82e230b0 r uhid_graphire3_4x5_report_descr +ffffffff82e23160 r uhid_xb360gp_report_descr +ffffffff82e23210 r uhid_xbonegp_report_descr +ffffffff82e24000 R uhid_ca +ffffffff82e24028 R uhidread_filtops +ffffffff82e25000 R fido_ca +ffffffff82e26000 R ujoy_ca +ffffffff82e27000 r ukbd_keydesc_us +ffffffff82e272a0 r ukbd_keydesc_de +ffffffff82e27350 r ukbd_keydesc_de_nodead +ffffffff82e27370 r ukbd_keydesc_fr +ffffffff82e27430 r ukbd_keydesc_fr_apple +ffffffff82e27570 r ukbd_keydesc_fr_dvorak_bepo +ffffffff82e276b0 r ukbd_keydesc_dk +ffffffff82e27750 r ukbd_keydesc_dk_nodead +ffffffff82e27760 r ukbd_keydesc_it +ffffffff82e27800 r ukbd_keydesc_uk +ffffffff82e278b0 r ukbd_keydesc_jp +ffffffff82e27920 r ukbd_keydesc_sv +ffffffff82e27950 r ukbd_keydesc_sv_nodead +ffffffff82e27960 r ukbd_keydesc_no +ffffffff82e27990 r ukbd_keydesc_no_nodead +ffffffff82e279a0 r ukbd_keydesc_us_dvorak +ffffffff82e27a40 r ukbd_keydesc_us_colemak +ffffffff82e27a88 r ukbd_keydesc_swapctrlcaps +ffffffff82e27aa0 r ukbd_keydesc_iopener +ffffffff82e27af0 r ukbd_keydesc_es +ffffffff82e27b90 r ukbd_keydesc_be +ffffffff82e27c50 r ukbd_keydesc_ru +ffffffff82e27dc0 r ukbd_keydesc_ua +ffffffff82e27f60 r ukbd_keydesc_sg +ffffffff82e28020 r ukbd_keydesc_sg_nodead +ffffffff82e28040 r ukbd_keydesc_sf +ffffffff82e28060 r ukbd_keydesc_pt +ffffffff82e280f0 r ukbd_keydesc_pt_apple +ffffffff82e28110 r ukbd_keydesc_lt +ffffffff82e281f0 r ukbd_keydesc_la +ffffffff82e28290 r ukbd_keydesc_br +ffffffff82e28320 r ukbd_keydesc_tr +ffffffff82e283e0 r ukbd_keydesc_tr_nodead +ffffffff82e28400 r ukbd_keydesc_pl +ffffffff82e28460 r ukbd_keydesc_hu +ffffffff82e28570 r ukbd_keydesc_si +ffffffff82e28690 r ukbd_keydesc_cf +ffffffff82e28770 r ukbd_keydesc_cf_nodead +ffffffff82e28790 r ukbd_keydesc_lv +ffffffff82e28810 r ukbd_keydesc_nl +ffffffff82e288f0 r ukbd_keydesc_nl_nodead +ffffffff82e28910 r ukbd_keydesc_is +ffffffff82e289a4 r ukbd_keydesc_is_nodead +ffffffff82e289b0 r ukbd_keydesc_ee +ffffffff82e28a60 r ukbd_keydesc_ee_nodead +ffffffff82e28a80 R ukbd_keydesctab +ffffffff82e29000 R ukbd_countrylayout +ffffffff82e29090 R ukbd_consops +ffffffff82e290b0 R ukbd_accessops +ffffffff82e290c8 R ukbd_ca +ffffffff82e290f0 R ukbd_never_console +ffffffff82e2a000 R ums_accessops +ffffffff82e2a018 R ums_ca +ffffffff82e2b000 R umt_accessops +ffffffff82e2b018 R umt_ca +ffffffff82e2c000 R uts_devs +ffffffff82e2c010 R uts_accessops +ffffffff82e2c028 R uts_ca +ffffffff82e2d000 R ubcmtp_accessops +ffffffff82e2d018 R ubcmtp_ca +ffffffff82e2d040 r ubcmtp_devices +ffffffff82e2e000 R ucycom_methods +ffffffff82e2e040 R ucycom_devs +ffffffff82e2e050 R ucycom_ca +ffffffff82e2f000 R uslhcom_methods +ffffffff82e2f040 R uslhcom_ca +ffffffff82e2f068 r uslhcom_devs +ffffffff82e30000 R ulpt_ca +ffffffff82e31000 R umass_ca +ffffffff82e31028 R umass_bbb_methods +ffffffff82e31040 R umass_cbi_methods +ffffffff82e32000 R umass_quirks +ffffffff82e33000 R umass_scsi_switch +ffffffff82e34000 R uthum_devs +ffffffff82e34008 R uthum_ca +ffffffff82e34030 r uthum_sensor_type_s +ffffffff82e35000 R ugold_devs +ffffffff82e35018 R ugold_ca +ffffffff82e36000 R utrh_devs +ffffffff82e36008 R utrh_ca +ffffffff82e37000 R uoakrh_devs +ffffffff82e37008 R uoakrh_ca +ffffffff82e37030 R uoakrh_methods +ffffffff82e38000 R uoaklux_devs +ffffffff82e38008 R uoaklux_ca +ffffffff82e38030 R uoaklux_methods +ffffffff82e39000 R uoakv_devs +ffffffff82e39008 R uoakv_ca +ffffffff82e39030 R uoakv_methods +ffffffff82e3a000 R uonerng_ca +ffffffff82e3b000 R urng_ca +ffffffff82e3b030 r urng_devs +ffffffff82e3c000 R udcf_ca +ffffffff82e3c028 r udcf_devs +ffffffff82e3d000 R umbg_ca +ffffffff82e3e000 R uvisor_methods +ffffffff82e3e040 R uvisor_ca +ffffffff82e3e070 r uvisor_devs +ffffffff82e3f000 R udsbr_hw_if +ffffffff82e3f028 R udsbr_ca +ffffffff82e40000 R utwitch_devs +ffffffff82e40008 R utwitch_ca +ffffffff82e41000 R aue_devs +ffffffff82e411b0 R aue_ca +ffffffff82e42000 R axe_devs +ffffffff82e420d0 R axe_ca +ffffffff82e43000 R axen_devs +ffffffff82e43020 R axen_ca +ffffffff82e44000 R smsc_ca +ffffffff82e44030 r smsc_devs +ffffffff82e45000 R cue_ca +ffffffff82e46000 R kue_devs +ffffffff82e46088 R kue_ca +ffffffff82e47000 R cdce_devs +ffffffff82e47048 R cdce_ca +ffffffff82e48000 R urndis_ca +ffffffff82e48030 R urndis_class +ffffffff82e49000 R mos_devs +ffffffff82e49018 R mos_ca +ffffffff82e4a000 R mue_devs +ffffffff82e4a020 R mue_ca +ffffffff82e4b000 R udav_ca +ffffffff82e4b030 r udav_devs +ffffffff82e4c000 R upl_ca +ffffffff82e4d000 R ugl_ca +ffffffff82e4e000 R url_ca +ffffffff82e4e030 r url_devs +ffffffff82e4f000 R ure_devs +ffffffff82e4f0e8 R ure_ca +ffffffff82e50000 R uaq_devs +ffffffff82e50018 R uaq_ca +ffffffff82e51000 R umodem_methods +ffffffff82e51040 R umodem_ca +ffffffff82e52000 R uftdi_methods +ffffffff82e52040 R uftdi_ca +ffffffff82e52070 r uftdi_devs +ffffffff82e53000 R uplcom_methods +ffffffff82e53040 R uplcom_ca +ffffffff82e53070 r uplcom_devs +ffffffff82e54000 R umct_methods +ffffffff82e54040 R umct_ca +ffffffff82e54070 r umct_devs +ffffffff82e55000 R uvscom_methods +ffffffff82e55040 R uvscom_ca +ffffffff82e55070 r uvscom_devs +ffffffff82e56000 R ubsa_methods +ffffffff82e56040 R ubsa_devs +ffffffff82e56060 R ubsa_ca +ffffffff82e57000 R ukspan_ca +ffffffff82e57028 r ukspan_devs +ffffffff82e57030 r ukspan_methods +ffffffff82e58000 R uslcom_methods +ffffffff82e58040 R uslcom_ca +ffffffff82e58070 r uslcom_devs +ffffffff82e59000 R uark_methods +ffffffff82e59040 R uark_ca +ffffffff82e59068 r uark_devs +ffffffff82e5a000 R moscom_methods +ffffffff82e5a040 R moscom_ca +ffffffff82e5a068 r moscom_devs +ffffffff82e5b000 R umcs_methods +ffffffff82e5b040 R umcs_devs +ffffffff82e5b050 R umcs_ca +ffffffff82e5c000 R uscom_methods +ffffffff82e5c040 R uscom_ca +ffffffff82e5c068 r uscom_devs +ffffffff82e5d000 R ucrcom_methods +ffffffff82e5d040 R ucrcom_ca +ffffffff82e5e000 R uxrcom_methods +ffffffff82e5e040 R uxrcom_ca +ffffffff82e5e068 r uxrcom_devs +ffffffff82e5f000 R uipaq_methods +ffffffff82e5f040 R uipaq_ca +ffffffff82e5f070 r uipaq_devs +ffffffff82e60000 R umsm_methods +ffffffff82e60040 R umsm_ca +ffffffff82e60070 r umsm_devs +ffffffff82e61000 R uchcom_methods +ffffffff82e61040 R uchcom_ca +ffffffff82e61068 r uchcom_devs +ffffffff82e61080 r dividers +ffffffff82e62000 R uticom_methods +ffffffff82e62040 R uticom_ca +ffffffff82e62070 r uticom_devs +ffffffff82e63000 R wi_usb_devs +ffffffff82e630f0 R wi_usb_ca +ffffffff82e64000 R atu_ca +ffffffff82e65000 R ural_ca +ffffffff82e65030 r ural_devs +ffffffff82e650a0 r ural_rf2522_r2 +ffffffff82e650e0 r ural_rf2524_r2 +ffffffff82e65120 r ural_rf2525_hi_r2 +ffffffff82e65160 r ural_rf2525_r2 +ffffffff82e651a0 r ural_rf2525e_r2 +ffffffff82e651e0 r ural_rf2526_hi_r2 +ffffffff82e65220 r ural_rf2526_r2 +ffffffff82e65260 r ural_def_bbp +ffffffff82e652a0 r ural_def_mac +ffffffff82e66000 R rum_ca +ffffffff82e66030 r rum_devs +ffffffff82e66110 r rum_rf5225 +ffffffff82e66460 r rum_rf5226 +ffffffff82e667b0 r rum_def_bbp +ffffffff82e667f0 r rum_def_mac +ffffffff82e67000 R run_ca +ffffffff82e67030 r run_devs +ffffffff82e67430 r rt2860_rf2850 +ffffffff82e67860 r rt2860_rates +ffffffff82e67920 r rt5592_freqs_40mhz +ffffffff82e67a60 r rt5592_freqs_20mhz +ffffffff82e67ba0 r rt5592_2ghz_def_rf +ffffffff82e67be0 r rt5592_chan_5ghz +ffffffff82e67e30 r rt5592_def_bbp +ffffffff82e67e70 r rt5592_bbp_r196 +ffffffff82e67ed0 r rt5390_def_bbp +ffffffff82e67f00 r rt3572_def_rf +ffffffff82e67f40 r rt3070_def_rf +ffffffff82e67f70 r rt3593_def_rf +ffffffff82e67fb0 r rt5592_def_rf +ffffffff82e67fe0 r rt5392_def_rf +ffffffff82e68060 r rt5390_def_rf +ffffffff82e680e0 r rt2870_def_mac +ffffffff82e69000 R mtw_ca +ffffffff82e69030 r mtw_devs +ffffffff82e69070 r rt2860_rates +ffffffff82e69130 r mt7601_rf_chan +ffffffff82e691a0 r mt7601_def_bbp +ffffffff82e692d0 r mt7601_rf_bank0 +ffffffff82e69330 r mt7601_rf_bank4 +ffffffff82e693b0 r mt7601_rf_bank5 +ffffffff82e69430 r mt7601_def_mac +ffffffff82e6a000 R zyd_ca +ffffffff82e6a030 r zyd_devs +ffffffff82e6a1b0 r zyd_rfmd_init.phyini +ffffffff82e6a2e0 r zyd_rfmd_init.rfini +ffffffff82e6a330 r zyd_rfmd_set_channel.rfprog +ffffffff82e6a3a0 r zyd_al2230_init.phyini +ffffffff82e6a480 r zyd_al2230_init.rfini +ffffffff82e6a4e0 r zyd_al2230_init_b.phyini +ffffffff82e6a5d0 r zyd_al2230_init_b.rfini +ffffffff82e6a620 r zyd_al2230_set_channel.rfprog +ffffffff82e6a6d0 r zyd_al7230B_init.phyini_1 +ffffffff82e6a7b0 r zyd_al7230B_init.rfini_1 +ffffffff82e6a7f0 r zyd_al7230B_set_channel.rfprog +ffffffff82e6a860 r zyd_al7230B_set_channel.rfsc +ffffffff82e6a890 r zyd_al2210_init.phyini +ffffffff82e6a8f0 r zyd_al2210_init.rfini +ffffffff82e6a920 r zyd_al2210_set_channel.rfprog +ffffffff82e6a960 r zyd_gct_init.phyini +ffffffff82e6a9b0 r zyd_gct_init.rfini +ffffffff82e6aa50 r zyd_gct_set_channel.rfprog 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+ffffffff83211000 D acct_lock +ffffffff83211010 D acctsuspend +ffffffff83211014 D acctresume +ffffffff83211018 D acctrate +ffffffff83212000 D ticks +ffffffff83213000 D fhdlk +ffffffff83214000 D kqueue_klist_lock +ffffffff83214010 D kq_timeoutmax +ffffffff83215000 D stackgap_random +ffffffff83216000 D nprocesses +ffffffff83216004 D nthreads +ffffffff83216008 D fork_tfmrate +ffffffff83217000 D kthread_q +ffffffff83218000 D nkmempages +ffffffff83218008 D malloc_mtx +ffffffff83218020 D memname +ffffffff832184b0 D sysctl_kmemlock +ffffffff832184c0 D malloc_errintvl +ffffffff83219000 D maxdmap +ffffffff83219008 D maxsmap +ffffffff83219010 D rlimit_lock +ffffffff8321a000 D sched_cost_load +ffffffff8321a004 D sched_cost_priority +ffffffff8321a008 D sched_cost_runnable +ffffffff8321a00c D sched_cost_resident +ffffffff8321b000 D intrmap_lock +ffffffff8321c000 D nosuidcoredump +ffffffff8321c008 D sigio_lock +ffffffff8321d000 D smr_lock +ffffffff8321d010 D smr_logintvl +ffffffff8321e000 D startuphook_list +ffffffff8321f000 D sysctl_lock +ffffffff8321f010 D sysctl_disklock +ffffffff8321f020 d openbsd +ffffffff8321f024 d arg_max +ffffffff8321f028 d posix_version +ffffffff8321f02c d ngroups_max +ffffffff8321f030 d int_one +ffffffff8321f034 d maxpartitions +ffffffff8321f038 d raw_part +ffffffff8321f03c D allowpowerdown +ffffffff8321f040 D hw_power +ffffffff8321f044 d byte_order +ffffffff8321f048 d page_size +ffffffff83220000 d thrsleep_queue +ffffffff83220010 d thrsleep_lock +ffffffff83221000 D tc_lock +ffffffff83221010 D windup_mtx +ffffffff83221020 d dummy_timecounter +ffffffff83221070 D timecounter +ffffffff83221078 D time_second +ffffffff83221080 d timehands +ffffffff83221088 d th0 +ffffffff83221120 d th1 +ffffffff83222000 D itimer_mtx +ffffffff83222010 D ratecheck_mtx +ffffffff83222020 D ppsratecheck_mtx +ffffffff83222030 D resettodr_to +ffffffff83222078 D resettodr_task +ffffffff83223000 D timeout_mutex +ffffffff83224000 D wdog_auto +ffffffff83225000 D taskq_sys +ffffffff83225050 D taskq_sys_mp +ffffffff83226000 d update_loadavg.to +ffffffff83226048 D ccpu +ffffffff83226050 d schedcpu.to +ffffffff83226098 D perflevel +ffffffff8322609c D perfpolicy +ffffffff832260a0 D setperf_to +ffffffff83227000 D autoconf_attdet_mtx +ffffffff83227010 D msgs +ffffffff83228000 d evcount_list +ffffffff83228010 d evcount_percpu_init_list +ffffffff83229000 D syslogf_rwlock +ffffffff83229010 D log_mtx +ffffffff83229020 D logstash_in +ffffffff83229028 D logstash_out +ffffffff83229030 D logstash_rwlock +ffffffff8322a000 D pool_head +ffffffff8322a010 D pool_lock +ffffffff8322a020 D pool_debug +ffffffff8322a028 D pool_allocator_single +ffffffff8322a040 D pool_allocator_multi +ffffffff8322a058 D pool_allocator_multi_ni +ffffffff8322a070 D pool_gc_tick +ffffffff8322a0b8 D pool_gc_task +ffffffff8322b000 D kprintf_mutex +ffffffff8322b010 D db_panic +ffffffff8322b014 D splassert_ctl +ffffffff8322b018 D v_putc +ffffffff8322b020 D printf_flags +ffffffff8322c000 D userconf_base +ffffffff8322c004 D userconf_maxdev +ffffffff8322c008 D userconf_totdev +ffffffff8322c00c D userconf_maxlocnames +ffffffff8322c010 D userconf_cnt +ffffffff8322c014 D userconf_lines +ffffffff8322c018 D userconf_histsz +ffffffff8322c020 D userconf_cmds +ffffffff8322d000 D ftlock +ffffffff8322e000 d ppollcollect.poll_errintvl +ffffffff8322f000 D ttydefchars +ffffffff8322f014 D ttclos +ffffffff8322f01b D ttopen +ffffffff8322f022 D ttybg +ffffffff8322f028 D ttyin +ffffffff8322f02e D ttyout +ffffffff8322f038 D ttylist_lock +ffffffff83230000 D linesw +ffffffff83230280 D nlinesw +ffffffff83231000 D pt_softc_lock +ffffffff83232000 d mbstat_boot_boot_cpumem +ffffffff83232080 D mbstat +ffffffff83232090 D mclsizes +ffffffff832320b0 D m_extref_mtx +ffffffff832320c0 D m_pool_allocator +ffffffff83233000 D somaxconn +ffffffff83233004 D sominconn +ffffffff83233008 D sosplice_lock +ffffffff83234000 D sb_max +ffffffff83235000 D unp_df_lock +ffffffff83235010 D unp_gc_lock +ffffffff83235020 D unp_rights_mtx +ffffffff83235030 D unp_ino_mtx +ffffffff83235040 D unp_gc_task +ffffffff83235070 D unpst_sendspace +ffffffff83235074 D unpst_recvspace +ffffffff83235078 D unpsq_sendspace +ffffffff8323507c D unpsq_recvspace +ffffffff83235080 D unpdg_sendspace +ffffffff83235084 D unpdg_recvspace +ffffffff83236000 D doingcache +ffffffff83237000 D maxvfsconf +ffffffff83237010 d vfsconflist +ffffffff83238000 D lockf_lock +ffffffff83238010 D maxlocksperuid +ffffffff83239000 D iftovt_tab +ffffffff83239040 D vttoif_tab +ffffffff83239064 D suid_clear +ffffffff83239068 D vnode_mtx +ffffffff83239078 D vfs_stall_lock +ffffffff83239090 D vtypes +ffffffff832390e0 D vtags +ffffffff8323a000 D syncer_maxdelay +ffffffff8323a004 D syncdelay +ffffffff8323b000 D dosdirtemplate +ffffffff8323c000 D ntfs_hashlock +ffffffff8323d000 D ntfs_toupper_lock +ffffffff8323e000 D art_table_gc_mtx +ffffffff8323e010 D art_table_gc_task +ffffffff8323e040 D art_node_gc_mtx +ffffffff8323e050 D art_node_gc_task +ffffffff8323f000 D bpf_bufsize +ffffffff8323f004 D bpf_maxbufsize +ffffffff8323f008 D bpf_sysctl_lk +ffffffff83240000 D ifg_head +ffffffff83240010 D if_cloners_lock +ffffffff83240020 D if_input_task_locked +ffffffff83240050 D netlock +ffffffff83240060 D ifnetlist +ffffffff83241000 D ifiq_maxlen_drop +ffffffff83241004 D ifiq_maxlen_return +ffffffff83242000 D etherbroadcastaddr +ffffffff83242006 D ether_ipmulticast_min +ffffffff8324200c D ether_ipmulticast_max +ffffffff83242012 D ether_ip6multicast_min +ffffffff83242018 D ether_ip6multicast_max +ffffffff83243000 D etherip_cloner +ffffffff83243030 D etherip_list +ffffffff83244000 D loop_cloner +ffffffff83245000 D ifmedia_mtx +ffffffff83246000 D ppp_compressors +ffffffff83246020 D ppp_cloner +ffffffff83247000 D ppp_pkt_init +ffffffff83248000 D ppp_bsd_compress +ffffffff83249000 D ppp_deflate +ffffffff83249070 D ppp_deflate_draft +ffffffff8324a000 D tun_cloner +ffffffff8324a030 D tap_cloner +ffffffff8324b000 D bridgeintrq +ffffffff8324b038 D bridge_cloner +ffffffff8324c000 d veb_cloner +ffffffff8324c030 d vport_cloner +ffffffff8324d000 D vlan_tagh_lk +ffffffff8324d010 D vlan_cloner +ffffffff8324d040 D svlan_cloner +ffffffff8324e000 D pipex_list_mtx +ffffffff8324e010 D pipex_prune +ffffffff8324e018 D pipexoutq +ffffffff8324e050 d SHAPad2 +ffffffff8324f000 D rtmap_gc +ffffffff8324f018 D rt_rc +ffffffff83250000 D rt_labels +ffffffff83250010 D rtlabel_mtx +ffffffff83251000 D enc_cloner +ffffffff83252000 D gre_cloner +ffffffff83252030 D gre_list +ffffffff83252040 D mgre_cloner +ffffffff83252070 D egre_cloner +ffffffff832520a0 D nvgre_cloner +ffffffff832520d0 D eoip_cloner +ffffffff83253000 D trunk_cloner +ffffffff83254000 d aggr_cloner +ffffffff83255000 d tpmr_cloner +ffffffff83256000 D mpe_cloner +ffffffff83257000 D mpw_cloner +ffffffff83258000 D mpip_cloner +ffffffff83259000 d bpe_cloner +ffffffff83259030 d bpe_lock +ffffffff8325a000 D vether_cloner +ffffffff8325b000 D pair_cloner +ffffffff8325c000 d vxlan_cloner +ffffffff8325c030 d vxlan_lock +ffffffff8325c040 d vxlan_teps +ffffffff8325d000 D underload_interval +ffffffff8325d010 D wg_cloner +ffffffff8325e000 d stoeplitz_keyseed +ffffffff8325f000 D ieee80211_cache_size +ffffffff83260000 D arpt_prune +ffffffff83260004 D arpt_keep +ffffffff83260008 D arpt_down +ffffffff83260010 D arpinq +ffffffff83260048 D arp_mtx +ffffffff83260058 D arp_maxtries +ffffffff83261000 D ipport_firstauto +ffffffff83261004 D ipport_lastauto +ffffffff83261008 D ipport_hifirstauto +ffffffff8326100c D ipport_hilastauto +ffffffff83262000 D divert_sendspace +ffffffff83262004 D divert_recvspace +ffffffff83262008 D divbhashsize +ffffffff83263000 D icmptstamprepl +ffffffff83263004 D icmperrppslim +ffffffff83263008 D icmp_redirtimeout +ffffffff83264000 D ipsendredirects +ffffffff83264004 D ip_defttl +ffffffff83264008 D ip_mtudisc +ffffffff8326400c D ip_mtudisc_timeout +ffffffff83264010 D ipq_mutex +ffffffff83264020 D ip_maxqueue +ffffffff83264028 D ipintrq +ffffffff83264060 d ipsend_task +ffffffff83264090 d ipsendraw_task +ffffffff83265000 D ip_mrtproto +ffffffff83265004 d sin +ffffffff83266000 D rip_sendspace +ffffffff83266008 D rip_recvspace +ffffffff83267000 D tcprexmtthresh +ffffffff83267004 D tcptv_keep_init +ffffffff83267008 D tcp_rst_ppslim +ffffffff8326700c D tcp_ackdrop_ppslim +ffffffff83267010 D tcp_syn_hash_size +ffffffff83267014 D tcp_syn_cache_limit +ffffffff83267018 D tcp_syn_bucket_limit +ffffffff8326701c D tcp_syn_use_limit +ffffffff83267020 D syn_cache_mtx +ffffffff83268000 D tcp_outflags +ffffffff83269000 D tcp_timer_mtx +ffffffff83269010 D tcp_mssdflt +ffffffff83269014 D tcp_rttdflt +ffffffff83269018 D tcp_do_rfc1323 +ffffffff8326901c D tcp_do_sack +ffffffff83269020 D tcp_do_rfc3390 +ffffffff83269024 D tcp_do_tso +ffffffff83269028 D tcp_reass_limit +ffffffff8326902c D tcp_sackhole_limit +ffffffff8326a000 D tcp_backoff +ffffffff8326a034 D tcp_totbackoff +ffffffff8326b000 D tcp_sendspace +ffffffff8326b004 D tcp_recvspace +ffffffff8326b008 D tcp_autorcvbuf_inc +ffffffff8326c000 D udpcksum +ffffffff8326c004 D udp_sendspace +ffffffff8326c008 D udp_recvspace +ffffffff8326d000 D ipsec_flows_mtx +ffffffff8326d010 D ipsec_ids_idle +ffffffff8326d014 D ipsec_ids_next_flow +ffffffff8326d018 D ipsec_policy_head +ffffffff8326d028 D ipsp_ids_gc_timeout +ffffffff8326d070 D tdb_sadb_mtx +ffffffff8326d080 d tdb_hashmask +ffffffff8326e000 D ipo_tdb_mtx +ffffffff8326e010 D ipsec_acquire_mtx +ffffffff8326e020 D ipsec_acquire_head +ffffffff8326f000 D ipsec_keep_invalid +ffffffff8326f004 D ipsec_require_pfs +ffffffff8326f008 D ipsec_soft_timeout +ffffffff8326f00c D ipsec_exp_timeout +ffffffff8326f010 D ipsec_soft_first_use +ffffffff8326f014 D ipsec_exp_first_use +ffffffff8326f018 D ipsec_expire_acquire +ffffffff8326f01c D esp_enable +ffffffff8326f020 D ah_enable +ffffffff83270000 D udpencap_enable +ffffffff83270004 D udpencap_port +ffffffff83271000 D carp_vh_rc +ffffffff83271020 D carp_sc_rc +ffffffff83271040 D carp_opts +ffffffff83271058 D carp_cloner +ffffffff83271088 d carp_send_na.mcast +ffffffff83272000 d PADDING +ffffffff83273000 d PADDING +ffffffff83274000 d weak_keys +ffffffff83275000 D swcr_id +ffffffff83276000 D window_inflate +ffffffff83276004 D window_deflate +ffffffff83277000 D ghash_update +ffffffff83278000 D mpls_defttl +ffffffff83278004 D mpls_mapttl_ip +ffffffff83279000 D nfskevq_lock +ffffffff8327a000 D nfs_backoff +ffffffff8327a020 D nfs_ptimers +ffffffff8327b000 D desirednfsrvcache +ffffffff8327b010 D nonidempotent +ffffffff8327b070 D nfsv2_repstat +ffffffff8327c000 D nfsv2_type +ffffffff8327c030 D nfsv3_type +ffffffff8327c060 D nv2tov_type +ffffffff8327c080 D nv3tov_type +ffffffff8327c0a0 D nfsv3_procid +ffffffff8327c100 D nfsv2_procid +ffffffff8327c15c d nfsv3err_getattr +ffffffff8327c170 d nfsv3err_setattr +ffffffff8327c190 d nfsv3err_lookup +ffffffff8327c1a4 d nfsv3err_access +ffffffff8327c1b0 d nfsv3err_readlink +ffffffff8327c1d0 d nfsv3err_read +ffffffff8327c1f0 d nfsv3err_write +ffffffff8327c210 d nfsv3err_create +ffffffff8327c230 d nfsv3err_mkdir +ffffffff8327c250 d nfsv3err_symlink +ffffffff8327c270 d nfsv3err_mknod +ffffffff8327c290 d nfsv3err_remove +ffffffff8327c2b0 d nfsv3err_rmdir +ffffffff8327c2d0 d nfsv3err_rename +ffffffff8327c300 d nfsv3err_link +ffffffff8327c330 d nfsv3err_readdir +ffffffff8327c350 d nfsv3err_readdirplus +ffffffff8327c366 d nfsv3err_fsstat +ffffffff8327c372 d nfsv3err_fsinfo +ffffffff8327c37c d nfsv3err_pathconf +ffffffff8327c386 d nfsv3err_commit +ffffffff8327d000 D nfsrv3_procs +ffffffff8327d0b8 D nfs_niothreads +ffffffff8327e000 D fragtbl +ffffffff8327f000 D ffs_vtbl +ffffffff83280000 D softdep_typenames +ffffffff83280070 D tickdelay +ffffffff83281000 D dirchk +ffffffff83282000 D desireddquot +ffffffff83283000 D amap_list_lock +ffffffff83284000 d uao_list_lock +ffffffff83285000 d uvmexp_countersboot_boot_cpumem +ffffffff832850c0 D uvmexp_counters +ffffffff832850c8 D vm_min_kernel_address +ffffffff83286000 D no_constraint +ffffffff83287000 d uvm_kmapent_warn_rate +ffffffff83288000 D maxslp +ffffffff83289000 D uvmpagerops +ffffffff8328a000 D uvm_swap_data_lock +ffffffff8328a010 D swap_syscall_lock +ffffffff8328a020 D oommtx +ffffffff8328b000 D uvm_doswapencrypt +ffffffff8328c000 D gif_list +ffffffff8328c010 D gif_cloner +ffffffff8328d000 d sec_cloner +ffffffff8328d030 d sec_tdb_gc_mtx +ffffffff8328d040 d sec_tdb_gc_task +ffffffff8328e000 D divert6_sendspace +ffffffff8328e004 D divert6_recvspace +ffffffff8328e008 D divb6hashsize +ffffffff8328f000 d in6_get_hw_ifid.allone +ffffffff83290000 D ip6_sendredirects +ffffffff83290004 D ip6_defhlim +ffffffff83290008 D ip6_defmcasthlim +ffffffff8329000c D ip6_maxfragpackets +ffffffff83290010 D ip6_maxfrags +ffffffff83290014 D ip6_log_interval +ffffffff83290018 D ip6_hdrnestlimit +ffffffff8329001c D ip6_dad_count +ffffffff83290020 D ip6_auto_flowlabel +ffffffff83290024 D ip6_use_deprecated +ffffffff83290028 D ip6_neighborgcthresh +ffffffff8329002c D ip6_maxdynroutes +ffffffff83290030 D rip6_sendspace +ffffffff83290038 D rip6_recvspace +ffffffff83290040 D icmp6_redirtimeout +ffffffff83290044 D icmp6errppslim +ffffffff83290048 D ip6_mtudisc_timeout +ffffffff83291000 D frag6_mutex +ffffffff83292000 d icmp6_mtudisc_hiwat +ffffffff83292004 d icmp6_mtudisc_lowat +ffffffff83293000 d randomtab_20 +ffffffff83294000 D ip6intrq +ffffffff83294038 d ip6send_task +ffffffff83295000 D nd6_timer_next +ffffffff83295008 D nd6_expire_next +ffffffff83295010 D nd6_delay +ffffffff83295014 D nd6_umaxtries +ffffffff83295018 D nd6_mmaxtries +ffffffff8329501c D nd6_gctimer +ffffffff83295020 D nd6_maxndopt +ffffffff83295028 D nd6_mtx +ffffffff83295038 D nd6_list +ffffffff83296000 d dadq +ffffffff83297000 D pfkeyv2_mtx +ffffffff83297010 d pfkeyv2_seq +ffffffff83298000 D sadb_exts_allowed_in +ffffffff83298090 D sadb_exts_required_in +ffffffff83299000 D cold +ffffffff8329a000 D bdevsw +ffffffff8329a460 D nblkdev +ffffffff8329a470 D cdevsw +ffffffff8329c400 D nchrdev +ffffffff8329c404 D mem_no +ffffffff8329c408 D swapdev +ffffffff8329c410 D constab +ffffffff8329d000 D machine +ffffffff8329d008 D cpu_idle_cycle_fcn +ffffffff8329d010 D lid_action +ffffffff8329d014 D pwr_action +ffffffff8329d018 D isa_constraint +ffffffff8329d028 D dma_constraint +ffffffff8329d040 D uvm_md_constraints +ffffffff8329d058 D delay_func +ffffffff8329d060 D initclock_func +ffffffff8329d068 D startclock_func +ffffffff8329d070 D bootinfo_size +ffffffff8329d074 D waittime +ffffffff8329d078 D dumpmag +ffffffff8329e000 D tsc_rdtsc +ffffffff8329e008 D tsc_timecounter +ffffffff8329e058 D tsc_is_synchronized +ffffffff8329f000 D local_apic +ffffffff8329f020 D lapic_id +ffffffff8329f080 D lapic_tpr +ffffffff8329f0a0 d lapic_ppr +ffffffff8329f100 d lapic_isr +ffffffff832a0000 D warn_once +ffffffff832a1000 d errata +ffffffff832a2000 D cpu_ucode_mtx +ffffffff832a3000 D mem_owner_bios +ffffffff832a3008 D mrops +ffffffff832a3028 D mtrrmask +ffffffff832a3030 D mtrrtomrt +ffffffff832a4000 D pmap_pg_wc +ffffffff832a4008 D pmaps_lock +ffffffff832a4018 d pmap_maxkvaddr +ffffffff832a5000 D kv_physwait +ffffffff832a6000 D fpu_save_len +ffffffff832a7000 D i8259_pic +ffffffff832a8000 D softintr_pic +ffffffff832a9000 D ipifunc +ffffffff832aa000 D setperf_mp_mutex +ffffffff832ab000 D db_Grp6 +ffffffff832ab040 D db_Grp7 +ffffffff832ab100 D db_Grp8 +ffffffff832ab140 D db_Grp9 +ffffffff832ab200 D db_GrpA +ffffffff832ab240 D db_GrpB +ffffffff832ab280 D db_GrpC +ffffffff832ab2c0 D db_inst_0f0x +ffffffff832ab440 D db_inst_0f2x +ffffffff832ab5c0 D db_inst_0f3x +ffffffff832ab740 D db_inst_0f8x +ffffffff832ab8c0 D db_inst_0f9x +ffffffff832aba40 D db_inst_0fax +ffffffff832abbc0 D db_inst_0fbx +ffffffff832abd40 D db_inst_0fcx +ffffffff832abec0 D db_inst_0f +ffffffff832abf40 D db_Esc92 +ffffffff832abf80 D db_Esc94 +ffffffff832abfc0 D db_Esc95 +ffffffff832ac000 D db_Esc96 +ffffffff832ac040 D db_Esc97 +ffffffff832ac080 D db_Esca5 +ffffffff832ac0c0 D db_Escb4 +ffffffff832ac100 D db_Esce3 +ffffffff832ac140 D db_Escf4 +ffffffff832ac180 D db_Esc8 +ffffffff832ac240 D db_Esc9 +ffffffff832ac300 D db_Esca +ffffffff832ac3c0 D db_Escb +ffffffff832ac480 D db_Escc +ffffffff832ac540 D db_Escd +ffffffff832ac600 D db_Esce +ffffffff832ac6c0 D db_Escf +ffffffff832ac780 D db_Esc_inst +ffffffff832ac7c0 D db_Grp1 +ffffffff832ac800 D db_Grp2 +ffffffff832ac840 D db_Grp3 +ffffffff832ac900 D db_Grp4 +ffffffff832ac9c0 D db_Grp5 +ffffffff832aca80 D db_inst_table +ffffffff832ae280 D db_bad_inst +ffffffff832ae2a0 D db_index_reg_16 +ffffffff832ae2e0 D db_reg +ffffffff832ae4e0 D db_seg_reg +ffffffff832ae520 D db_lengths +ffffffff832af000 D db_regs +ffffffff832af1e0 D db_eregs +ffffffff832af1f0 D db_reg_args +ffffffff832b0000 D timer_mutex +ffffffff832b0010 d i8254_timecounter +ffffffff832b1000 D spleen8x16 +ffffffff832b1058 D spleen12x24 +ffffffff832b10b0 D spleen16x32 +ffffffff832b1108 D spleen32x64 +ffffffff832b1160 d builtin_fonts +ffffffff832b11e0 d wsfont_add.cookiegen +ffffffff832b11f0 d spleen8x16_data +ffffffff832b1ff0 d spleen12x24_data +ffffffff832b49f0 d spleen16x32_data +ffffffff832b81f0 d spleen32x64_data +ffffffff832c7000 D nsphy_cd +ffffffff832c8000 D nsphyter_cd +ffffffff832c9000 D gentbi_cd +ffffffff832ca000 D qsphy_cd +ffffffff832cb000 D inphy_cd +ffffffff832cc000 D iophy_cd +ffffffff832cd000 D eephy_cd +ffffffff832ce000 D exphy_cd +ffffffff832cf000 D rlphy_cd +ffffffff832d0000 D lxtphy_cd +ffffffff832d1000 D luphy_cd +ffffffff832d2000 D mtdphy_cd +ffffffff832d3000 D icsphy_cd +ffffffff832d4000 D sqphy_cd +ffffffff832d5000 D tqphy_cd +ffffffff832d6000 D ukphy_cd +ffffffff832d7000 D dcphy_cd +ffffffff832d8000 D bmtphy_cd +ffffffff832d9000 D brgphy_cd +ffffffff832da000 D xmphy_cd +ffffffff832db000 D amphy_cd +ffffffff832dc000 D acphy_cd +ffffffff832dd000 D nsgphy_cd +ffffffff832de000 D urlphy_cd +ffffffff832df000 D rgephy_cd +ffffffff832e0000 D ciphy_cd +ffffffff832e1000 D ipgphy_cd +ffffffff832e2000 D etphy_cd +ffffffff832e3000 D jmphy_cd +ffffffff832e4000 D atphy_cd +ffffffff832e5000 D scsi_autoconf +ffffffff832e5008 D scsibus_cd +ffffffff832e6000 D cd_cd +ffffffff832e7000 D ch_cd +ffffffff832e7020 D chquirks +ffffffff832e8000 D sd_cd +ffffffff832e9000 D st_cd +ffffffff832ea000 D uk_cd +ffffffff832eb000 D safte_cd +ffffffff832ec000 D ses_cd +ffffffff832ed000 D sym_cd +ffffffff832ed020 D sym_devices +ffffffff832ed070 D asym_devices +ffffffff832ee000 D rdac_cd +ffffffff832ee020 D rdac_devices +ffffffff832ef000 D emc_cd +ffffffff832ef020 D emc_devices +ffffffff832f0000 D hds_cd +ffffffff832f0020 D hds_devices +ffffffff832f1000 D atapiscsi_cd +ffffffff832f2000 D wd_cd +ffffffff832f2020 d wddumpmulti +ffffffff832f3000 D mainbus_cd +ffffffff832f3020 D mba_iba +ffffffff832f4000 D bios_cd +ffffffff832f4020 D smbios_uninfo +ffffffff832f5000 D mpbios_cd +ffffffff832f5020 d mp_conf +ffffffff832f5070 d extint_bus +ffffffff832f50a0 d smi_bus +ffffffff832f50d0 d nmi_bus +ffffffff832f6000 D cpu_info_full_primary +ffffffff832f9000 D cpu_info_list +ffffffff832f9008 D mp_cpu_funcs +ffffffff832f9020 D cpu_cd +ffffffff832f9040 D cpu_info +ffffffff832fa000 D local_pic +ffffffff832fa090 D lapic_readreg +ffffffff832fa098 D lapic_writereg +ffffffff832fa0a0 D x86_ipi +ffffffff832fb000 D ioapic_cold +ffffffff832fb008 D ioapic_cd +ffffffff832fc000 D efifb_std_descr +ffffffff832fc030 D efifb_descrs +ffffffff832fc038 D efifb_accessops +ffffffff832fc098 D efifb_cd +ffffffff832fd000 D pvbus_cd +ffffffff832fd020 D pvbus_types +ffffffff832fd0e0 D pvbus_dma_tag +ffffffff832fe000 D pvclock_cd +ffffffff832fe020 D pvclock_timecounter +ffffffff832ff000 D vmt_tclo_rpc +ffffffff832ff0d0 D vmt_cd +ffffffff83300000 D xen_cd +ffffffff83300020 D xen_bus_dma_tag +ffffffff83301000 D xnf_cd +ffffffff83302000 D xbf_cd +ffffffff83303000 D hv_msg_dispatch +ffffffff83303110 D hv_timecounter +ffffffff83303160 D hyperv_cd +ffffffff83304000 d hv_ic_devs +ffffffff83305000 D hvn_cd +ffffffff83306000 D hvs_cd +ffffffff83307000 D virtio_cd +ffffffff83308000 D vio_cd +ffffffff83309000 D vioblk_cd +ffffffff8330a000 D viomb_cd +ffffffff8330b000 D viornd_cd +ffffffff8330c000 D vioscsi_cd +ffffffff8330d000 D vmmci_cd +ffffffff8330e000 D pci_cd +ffffffff8330f000 D arc_fw_hdr +ffffffff8330f008 D arc_cd +ffffffff83310000 D jmb_cd +ffffffff83311000 D mfii_cd +ffffffff83312000 D ips_cd +ffffffff83313000 D eap_cd +ffffffff83314000 D auacer_cd +ffffffff83315000 D auich_cd +ffffffff83316000 D azalia_cd +ffffffff83317000 D envy_cd +ffffffff83317020 D envy_matchids +ffffffff83317030 D envy_rates +ffffffff833170b0 D ak4524_dac +ffffffff833170d8 D ak4524_adc +ffffffff83317100 D ak4358_dac +ffffffff83317128 D ak5365_adc +ffffffff83317150 D unkenvy_codec +ffffffff83317180 D envy_cards +ffffffff833173f0 D envy_cards_ht +ffffffff83317600 d julia_eeprom +ffffffff83318000 D emu_cd +ffffffff83319000 D auixp_cd +ffffffff8331a000 D clcs_cd +ffffffff8331b000 D yds_cd +ffffffff8331c000 D auvia_cd +ffffffff8331d000 D qle_cd +ffffffff8331e000 D mpii_cd +ffffffff8331f000 D aq_cd +ffffffff83320000 D de_cd +ffffffff83321000 D pcn_cd +ffffffff83322000 D wdc_sii3114_vtbl +ffffffff83322038 D wdc_pdc203xx_vtbl +ffffffff83322070 D wdc_svwsata_vtbl +ffffffff833220a8 D pciide_cd +ffffffff833220d0 d sis_hostbr_type +ffffffff83323000 D ppb_cd +ffffffff83324000 D vr_cd +ffffffff83324020 D vr_devices +ffffffff83325000 D txp_cd +ffffffff83326000 D bt848_card_signature +ffffffff83327000 D bktr_cd +ffffffff83328000 D em_cd +ffffffff83329000 D ixgb_cd +ffffffff8332a000 D ix_cd +ffffffff8332a020 D ixgbe_smart_speed +ffffffff8332a024 D ixgbe_enable_msix +ffffffff8332b000 D ixl_cd +ffffffff8332b020 d ixl_sff_lock +ffffffff8332c000 D xge_cd +ffffffff8332d000 D thtc_cd +ffffffff8332d020 D tht_cd +ffffffff8332d040 D tht_txt_desc +ffffffff8332d068 D tht_rxf_desc +ffffffff8332d090 D tht_rxd_desc +ffffffff8332d0b8 D tht_txf_desc +ffffffff8332e000 D myx_cd +ffffffff8332f000 D oce_cd +ffffffff83330000 D dc_devs +ffffffff83331000 D cas_cd +ffffffff83332000 D sis_cd +ffffffff83333000 D se_cd +ffffffff83334000 D mbg_cd +ffffffff83335000 D cbb_cd +ffffffff83335020 D yc_chipsets +ffffffff833351b0 d pccbb_funcs +ffffffff833351e0 d pccbb_pcmcia_funcs +ffffffff83336000 D skc_cd +ffffffff83336020 D sk_cd +ffffffff83337000 D mskc_cd +ffffffff83337020 D msk_cd +ffffffff83338000 D puc_cd +ffffffff83339000 D puc_ndevs +ffffffff8333a000 D iwi_cd +ffffffff8333b000 D wpi_cd +ffffffff8333c000 D iwn_cd +ffffffff8333d000 D iwm_cd +ffffffff8333e000 D iwx_cd +ffffffff8333f000 D cmpci_cd +ffffffff83340000 D iha_cd +ffffffff83341000 D pcscp_cd +ffffffff83341020 D pcscp_glue +ffffffff83342000 D bge_cd +ffffffff83343000 D bnx_firmwares +ffffffff83343160 D bnx_rv2ps +ffffffff833431c0 D bnx_cd +ffffffff833431e0 d flash_5709 +ffffffff83343210 d flash_table +ffffffff83344000 D vge_cd +ffffffff83345000 D stge_cd +ffffffff83346000 D nfe_cd +ffffffff83347000 D et_cd +ffffffff83348000 D jme_cd +ffffffff83349000 D age_cd +ffffffff8334a000 D alc_dma_burst +ffffffff8334a020 D alc_cd +ffffffff8334b000 D ale_cd +ffffffff8334c000 D amdpm_cd +ffffffff8334c020 d amdpm_timecounter +ffffffff8334d000 D bce_cd +ffffffff8334e000 D rtwn_cd +ffffffff8334f000 d ral_rt2560_opns +ffffffff8334f028 d ral_rt2661_opns +ffffffff8334f050 d ral_rt2860_opns +ffffffff83350000 D piixpm_cd +ffffffff83351000 D vic_cd +ffffffff83352000 D vmx_cd +ffffffff83353000 D vmwpvs_cd +ffffffff83354000 D lii_cd +ffffffff83355000 D ichiic_cd +ffffffff83356000 D viapm_cd +ffffffff83356020 d viapm_timecounter +ffffffff83357000 D amdiic_cd +ffffffff83358000 D nviic_cd +ffffffff83359000 D kate_cd +ffffffff8335a000 D km_cd +ffffffff8335b000 D cpu_model_offsets +ffffffff8335b070 D ksmn_cd +ffffffff8335c000 D itherm_cd +ffffffff8335d000 D pchtemp_cd +ffffffff8335e000 D xspd_cd +ffffffff8335f000 D virtio_pci_ops +ffffffff83360000 D bwfm_pci_buscore_ops +ffffffff83360030 D bwfm_pci_bus_ops +ffffffff83360058 D bwfm_pci_msgbuf_ops +ffffffff83361000 D bnxt_cd +ffffffff83362000 D mcx_cd +ffffffff83363000 D iavf_cd +ffffffff83364000 D rge_cd +ffffffff83365000 D igc_cd +ffffffff83366000 D ngbe_cd +ffffffff83367000 D agp_cd +ffffffff83368000 D intagp_cd +ffffffff83368020 D agp_i810_methods +ffffffff83369000 D reservation_ww_class +ffffffff8336a000 d bridge_lock +ffffffff8336a010 d bridge_list +ffffffff8336b000 d drm_connector_enum_list +ffffffff8336b1f8 d connector_list_lock +ffffffff8336b208 d connector_list +ffffffff8336c000 d kernel_fb_helper_list +ffffffff8336c010 d kernel_fb_helper_lock +ffffffff8336d000 D drm_global_mutex +ffffffff8336e000 D i2c_bit_algo +ffffffff8336e010 d drm_fence_context_count +ffffffff8336e018 d dma_fence_stub_mtx +ffffffff8336e028 D wait_bit_mtx +ffffffff8336e038 D shrinkers +ffffffff8336f000 d crtc_ww_class +ffffffff83370000 d panel_lock +ffffffff83370010 d panel_list +ffffffff83371000 d ttm_global_mutex +ffffffff83372000 D drm_sched_policy +ffffffff83373000 D intel_bbops +ffffffff83374000 d i915_sys_placement +ffffffff83374020 d i915_ttm_bo_driver +ffffffff83375000 d mchdev_lock +ffffffff83376000 D inteldrm_stdscreen +ffffffff83376030 D inteldrm_scrlist +ffffffff83376038 D inteldrm_screenlist +ffffffff83376048 D inteldrm_accessops +ffffffff833760a8 D inteldrm_cd +ffffffff83377000 d capture_mutex +ffffffff83378000 d mitigations +ffffffff83379000 D i915_modparams +ffffffff8337a000 d schedule_lock +ffffffff8337b000 d unbind_fence_ops +ffffffff8337c000 D intel_graphics_stolen_res +ffffffff8337d000 D btc_valid_sclk +ffffffff8337e000 d evergreen_cs_packet_parse_vline.vline_start_end +ffffffff8337e020 d evergreen_cs_packet_parse_vline.vline_status +ffffffff8337f000 d r600_cs_packet_parse_vline.vline_start_end +ffffffff8337f008 d r600_cs_packet_parse_vline.vline_status +ffffffff83380000 d r100_asic +ffffffff833802e0 d r200_asic +ffffffff833805c0 d r300_asic_pcie +ffffffff833808a0 d r300_asic +ffffffff83380b80 d r420_asic +ffffffff83380e60 d rs400_asic +ffffffff83381140 d rs600_asic +ffffffff83381420 d rs690_asic +ffffffff83381700 d rv515_asic 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radeon_pcie_gen2 +ffffffff8338501c D radeon_msi +ffffffff83385020 D radeon_lockup_timeout +ffffffff83385024 D radeon_dpm +ffffffff83385028 D radeon_aspm +ffffffff8338502c D radeon_runtime_pm +ffffffff83385030 D radeon_vm_size +ffffffff83385034 D radeon_vm_block_size +ffffffff83385038 D radeon_use_pflipirq +ffffffff8338503c D radeon_bapm +ffffffff83385040 D radeon_backlight +ffffffff83385044 D radeon_auxch +ffffffff83385048 D radeon_uvd +ffffffff8338504c D radeon_vce +ffffffff83385050 D radeon_si_support +ffffffff83385054 D radeon_cik_support +ffffffff83385058 D radeondrm_cd +ffffffff83385078 D radeondrm_stdscreen +ffffffff833850a8 D radeondrm_scrlist +ffffffff833850b0 D radeondrm_screenlist +ffffffff833850c0 D radeondrm_accessops +ffffffff83386000 D radeon_bbops +ffffffff83387000 d radeon_bo_driver +ffffffff83388000 d verde_pg_init +ffffffff83389000 d cac_weights_pitcairn +ffffffff833894d0 d cac_weights_oland +ffffffff8338a000 d aldebaran_mode2_handler +ffffffff8338b000 d amdgpu_vbios_version_attrs +ffffffff8338c000 D amdgpu_asic_name +ffffffff8338d000 D amdgpu_vram_limit +ffffffff8338d004 D amdgpu_gart_size +ffffffff8338d008 D amdgpu_gtt_size +ffffffff8338d00c D amdgpu_moverate +ffffffff8338d010 D amdgpu_audio +ffffffff8338d014 D amdgpu_pcie_gen2 +ffffffff8338d018 D amdgpu_msi +ffffffff8338d01c D amdgpu_dpm +ffffffff8338d020 D amdgpu_fw_load_type +ffffffff8338d024 D amdgpu_aspm +ffffffff8338d028 D amdgpu_runtime_pm +ffffffff8338d02c D amdgpu_ip_block_mask +ffffffff8338d030 D amdgpu_bapm +ffffffff8338d034 D amdgpu_vm_size +ffffffff8338d038 D amdgpu_vm_fragment_size +ffffffff8338d03c D amdgpu_vm_block_size +ffffffff8338d040 D amdgpu_vm_update_mode +ffffffff8338d044 D amdgpu_dc +ffffffff8338d048 D amdgpu_sched_jobs +ffffffff8338d04c D amdgpu_sched_hw_submission +ffffffff8338d050 D amdgpu_cg_mask +ffffffff8338d058 D amdgpu_pg_mask +ffffffff8338d05c D amdgpu_sdma_phase_quantum +ffffffff8338d060 D amdgpu_pp_feature_mask +ffffffff8338d064 D amdgpu_lbpw +ffffffff8338d068 D amdgpu_compute_multipipe +ffffffff8338d06c D amdgpu_gpu_recovery +ffffffff8338d070 D amdgpu_smu_pptable_id +ffffffff8338d074 D amdgpu_dc_feature_mask +ffffffff8338d078 D amdgpu_async_gfx_ring +ffffffff8338d07c D amdgpu_mcbp +ffffffff8338d080 D amdgpu_discovery +ffffffff8338d084 D amdgpu_noretry +ffffffff8338d088 D amdgpu_force_asic_type +ffffffff8338d08c D amdgpu_tmz +ffffffff8338d090 D amdgpu_reset_method +ffffffff8338d094 D amdgpu_num_kcq +ffffffff8338d098 D amdgpu_use_xgmi_p2p +ffffffff8338d09c D amdgpu_sg_display +ffffffff8338d0a0 D amdgpu_user_partt_mode +ffffffff8338d0a8 D mgpu_info +ffffffff8338d558 D amdgpu_ras_enable +ffffffff8338d55c D amdgpu_ras_mask +ffffffff8338d560 D amdgpu_bad_page_threshold +ffffffff8338d564 D amdgpu_backlight +ffffffff8338d568 D amdgpu_cd +ffffffff8338d588 D amdgpu_stdscreen +ffffffff8338d5b8 D amdgpu_scrlist +ffffffff8338d5c0 D amdgpu_screenlist +ffffffff8338d5d0 D amdgpu_accessops +ffffffff8338e000 d amdgpu_gtt_mgr_attributes +ffffffff8338f000 D amdgpu_bbops +ffffffff83390000 D soc15_ih_clientid_name +ffffffff83391000 D ras_error_string +ffffffff83391030 D ras_block_string +ffffffff833910c0 D ras_mca_block_string +ffffffff83392000 d amdgpu_bo_driver +ffffffff83393000 d amdgpu_vram_mgr_attributes +ffffffff83394000 d xgmi_mutex +ffffffff83394010 D xgmi_ras_hw_ops +ffffffff83394050 D xgmi_ras +ffffffff83395000 D aqua_vanjaram_xcp_funcs +ffffffff83396000 D gfx_v11_0_3_ras +ffffffff83397000 d gfx_v9_0_ras +ffffffff83398000 D gfx_v9_4_ras +ffffffff83399000 D gfx_v9_4_2_ras_ops +ffffffff83399040 D gfx_v9_4_2_ras +ffffffff8339a000 D gfx_v9_4_3_xcp_funcs +ffffffff8339a020 D gfx_v9_4_3_ras_ops +ffffffff8339a060 D gfx_v9_4_3_ras +ffffffff8339b000 D gfxhub_v1_2_xcp_funcs +ffffffff8339c000 D hdp_v4_0_ras_hw_ops +ffffffff8339c040 D hdp_v4_0_ras +ffffffff8339d000 d jpeg_v2_6_ras +ffffffff8339e000 d jpeg_v4_0_ras +ffffffff8339f000 d jpeg_v4_0_3_ras +ffffffff833a0000 D mca_v3_0_mp0_ras +ffffffff833a0058 D mca_v3_0_mp1_ras +ffffffff833a00b0 D mca_v3_0_mpio_ras +ffffffff833a1000 D mmhub_v1_0_ras_hw_ops +ffffffff833a1040 D mmhub_v1_0_ras +ffffffff833a2000 D mmhub_v1_7_ras_hw_ops +ffffffff833a2040 D mmhub_v1_7_ras +ffffffff833a3000 D mmhub_v1_8_ras +ffffffff833a4000 D mmhub_v9_4_ras +ffffffff833a5000 D nbio_v4_3_ras +ffffffff833a6000 D nbio_v7_4_ras +ffffffff833a7000 D nbio_v7_9_ras +ffffffff833a8000 d sriov_sc_video_codecs_encode +ffffffff833a8010 d sriov_sc_video_codecs_decode_vcn1 +ffffffff833a8020 d sriov_sc_video_codecs_decode_vcn0 +ffffffff833a8030 d sriov_sc_video_codecs_encode_array +ffffffff833a8060 d sriov_sc_video_codecs_decode_array_vcn1 +ffffffff833a80f0 d sriov_sc_video_codecs_decode_array_vcn0 +ffffffff833a9000 d sdma_v4_0_ras +ffffffff833aa000 D sdma_v4_4_ras +ffffffff833ab000 D sdma_v4_4_2_xcp_funcs +ffffffff833ab020 d sdma_v4_4_2_ras +ffffffff833ac000 d sdma_v6_0_3_ras +ffffffff833ad000 d sienna_cichlid_mode2_handler +ffffffff833ae000 d smu_v13_0_10_mode2_handler +ffffffff833af000 d sriov_vcn_4_0_0_video_codecs_encode_vcn1 +ffffffff833af010 d sriov_vcn_4_0_0_video_codecs_decode_vcn1 +ffffffff833af020 d sriov_vcn_4_0_0_video_codecs_encode_vcn0 +ffffffff833af030 d sriov_vcn_4_0_0_video_codecs_decode_vcn0 +ffffffff833af040 d sriov_vcn_4_0_0_video_codecs_encode_array_vcn1 +ffffffff833af070 d sriov_vcn_4_0_0_video_codecs_decode_array_vcn1 +ffffffff833af100 d sriov_vcn_4_0_0_video_codecs_encode_array_vcn0 +ffffffff833af140 d sriov_vcn_4_0_0_video_codecs_decode_array_vcn0 +ffffffff833b0000 D umc_v6_1_ras +ffffffff833b1000 D umc_v6_7_ras +ffffffff833b2000 D umc_v8_10_ras +ffffffff833b3000 D umc_v8_7_ras +ffffffff833b4000 d vcn_v2_6_ras +ffffffff833b5000 d vcn_v4_0_unified_ring_vm_funcs +ffffffff833b5140 d vcn_v4_0_ras +ffffffff833b6000 d vcn_v4_0_3_ras +ffffffff833b7000 d amdgpu_dm_mode_config_helperfuncs +ffffffff833b7010 d dm_atomic_state_funcs +ffffffff833b8000 d construct_integrated_info.result +ffffffff833b8004 d bios_parser_get_firmware_info.result +ffffffff833b9000 d dce_funcs +ffffffff833ba000 d dce110_funcs +ffffffff833bb000 d dce112_funcs +ffffffff833bc000 d dce120_funcs +ffffffff833bd000 d rv1_clk_funcs +ffffffff833bd090 d rv1_clk_internal_funcs +ffffffff833be000 d rv2_clk_internal_funcs +ffffffff833bf000 d dcn2_funcs +ffffffff833c0000 d dcn201_funcs +ffffffff833c1000 d dcn21_funcs +ffffffff833c1090 d rn_bw_params +ffffffff833c2000 D dcn3_fpga_funcs +ffffffff833c2090 d dcn3_funcs +ffffffff833c3000 d vg_funcs +ffffffff833c3090 d dummy_clocks +ffffffff833c31c0 d vg_bw_params +ffffffff833c4000 d dcn31_funcs +ffffffff833c4090 d dcn31_bw_params +ffffffff833c5000 d dcn314_funcs +ffffffff833c5090 d dcn314_bw_params +ffffffff833c6000 d dcn315_funcs +ffffffff833c6090 d dcn315_bw_params +ffffffff833c7000 d dcn316_funcs +ffffffff833c7090 d dcn316_bw_params +ffffffff833c8000 d dcn32_funcs +ffffffff833c9000 d dcn10_dpp_cap +ffffffff833ca000 d dcn20_dpp_funcs +ffffffff833ca110 d dcn20_dpp_cap +ffffffff833cb000 d dcn20_hubp_funcs +ffffffff833cc000 d dcn20_opp_funcs +ffffffff833cd000 d dcn20_tg_funcs +ffffffff833ce000 d dcn201_dpp_funcs +ffffffff833ce110 d dcn201_dpp_cap +ffffffff833cf000 d dcn201_hubp_funcs +ffffffff833d0000 d dcn201_opp_funcs +ffffffff833d1000 d dcn201_tg_funcs +ffffffff833d2000 d dcn201_res_pool_funcs +ffffffff833d20f8 d dcn201_ip +ffffffff833d22b0 d dcn201_soc +ffffffff833d4000 d dcn21_hubp_funcs +ffffffff833d5000 d dcn30_afmt_funcs +ffffffff833d6000 d dcn30_dpp_funcs +ffffffff833d6110 d dcn30_dpp_cap +ffffffff833d7000 d dcn30_hubp_funcs +ffffffff833d8000 d dcn30_tg_funcs +ffffffff833d9000 d dcn30_vpg_funcs +ffffffff833da000 d dcn30_tg_funcs +ffffffff833db000 d res_cap_dcn301 +ffffffff833db040 d dcn301_res_pool_funcs +ffffffff833dc000 d dcn302_res_pool_funcs +ffffffff833dd000 d dcn303_res_pool_funcs +ffffffff833de000 d dcn31_afmt_funcs +ffffffff833df000 d dcn31_apg_funcs +ffffffff833e0000 d dcn31_hpo_dp_link_encoder_funcs +ffffffff833e1000 d dcn31_hubp_funcs +ffffffff833e2000 d dcn31_tg_funcs +ffffffff833e3000 d dcn31_res_pool_funcs +ffffffff833e4000 d dcn31_vpg_funcs +ffffffff833e5000 d dcn314_tg_funcs +ffffffff833e6000 d dcn314_res_pool_funcs +ffffffff833e7000 d dcn315_res_pool_funcs +ffffffff833e8000 d dcn316_res_pool_funcs +ffffffff833e9000 d dcn32_dpp_funcs +ffffffff833e9110 d dcn32_dpp_cap +ffffffff833ea000 d dcn32_hpo_dp_link_encoder_funcs +ffffffff833eb000 d dcn32_hubp_funcs +ffffffff833ec000 d dcn32_tg_funcs +ffffffff833ed000 d dcn32_res_pool_funcs +ffffffff833ee000 d dcn321_res_pool_funcs +ffffffff833ef000 D dcn1_0_ip +ffffffff833ef1b8 D dcn1_0_soc +ffffffff833f1000 D dcn2_0_ip +ffffffff833f11b8 D dcn2_0_nv14_ip +ffffffff833f1370 D dcn2_0_soc +ffffffff833f26a8 D dcn2_0_nv14_soc +ffffffff833f39e0 D dcn2_0_nv12_soc +ffffffff833f4d18 D dcn2_1_ip +ffffffff833f4ed0 D dcn2_1_soc +ffffffff833f6208 D ddr4_wm_table_gs +ffffffff833f62c8 D lpddr4_wm_table_gs +ffffffff833f6388 D lpddr4_wm_table_with_disabled_ppt +ffffffff833f6448 D ddr4_wm_table_rn +ffffffff833f6508 D ddr4_1R_wm_table_rn +ffffffff833f65c8 D lpddr4_wm_table_rn +ffffffff833f7000 D dcn3_0_ip +ffffffff833f71b8 D dcn3_0_soc +ffffffff833f9000 D dcn3_01_ip +ffffffff833f91b8 D dcn3_01_soc +ffffffff833fa4f0 D ddr4_wm_table +ffffffff833fa5b0 D lpddr5_wm_table +ffffffff833fb000 D dcn3_02_ip +ffffffff833fb1b8 D dcn3_02_soc +ffffffff833fd000 D dcn3_03_ip +ffffffff833fd1b8 D dcn3_03_soc +ffffffff833ff000 D dcn3_1_ip +ffffffff833ff1b8 D dcn3_15_ip +ffffffff833ff370 D dcn3_16_ip +ffffffff833ff528 d dcn3_15_soc +ffffffff83400860 d dcn3_1_soc +ffffffff83401b98 d dcn3_16_soc +ffffffff83403000 D dcn3_14_ip +ffffffff834031b8 d dcn3_14_soc +ffffffff83405000 D dcn3_2_ip +ffffffff834051b8 D dcn3_2_soc +ffffffff83407000 D dcn3_21_ip +ffffffff834071b8 D dcn3_21_soc +ffffffff83409000 d dsc_policy_max_target_bpp_limit +ffffffff8340a000 D DIDTEDCConfig_P12 +ffffffff8340a070 d smu7_profiling +ffffffff8340b000 d cyan_skillfish_table_map +ffffffff8340b080 d cyan_skillfish_message_map +ffffffff8340c000 d navi10_table_map +ffffffff8340c080 d navi10_pwr_src_map +ffffffff8340c090 d navi10_workload_map +ffffffff8340c0e0 d navi10_message_map +ffffffff8340cb60 d navi10_clk_map +ffffffff8340cc20 d navi10_feature_mask_map +ffffffff8340d000 d sienna_cichlid_table_map +ffffffff8340d080 d sienna_cichlid_pwr_src_map +ffffffff8340d090 d sienna_cichlid_workload_map +ffffffff8340d0e0 d sienna_cichlid_message_map +ffffffff8340db60 d sienna_cichlid_clk_map +ffffffff8340dc20 d sienna_cichlid_feature_mask_map +ffffffff8340e000 d vangogh_message_map +ffffffff8340ea80 d vangogh_table_map +ffffffff8340eb00 d vangogh_workload_map +ffffffff8340eb50 d vangogh_feature_mask_map +ffffffff8340f000 d renoir_table_map +ffffffff8340f080 d renoir_workload_map +ffffffff8340f0d0 d renoir_message_map +ffffffff8340fb50 d renoir_clk_map +ffffffff83410000 d smu_v13_0_0_message_map +ffffffff83410a80 d smu_v13_0_0_feature_mask_map +ffffffff83410e50 d smu_v13_0_0_table_map +ffffffff83410ed0 d smu_v13_0_0_pwr_src_map +ffffffff83410ee0 d smu_v13_0_0_workload_map +ffffffff83410f30 d smu_v13_0_0_clk_map +ffffffff83411000 d smu_v13_0_4_table_map +ffffffff83411080 d smu_v13_0_4_message_map +ffffffff83411b00 d smu_v13_0_4_feature_mask_map +ffffffff83412000 d smu_v13_0_5_table_map +ffffffff83412080 d smu_v13_0_5_message_map +ffffffff83412b00 d smu_v13_0_5_feature_mask_map +ffffffff83413000 d smu_v13_0_7_message_map +ffffffff83413a80 d smu_v13_0_7_feature_mask_map +ffffffff83413e50 d smu_v13_0_7_table_map +ffffffff83413ed0 d smu_v13_0_7_pwr_src_map +ffffffff83413ee0 d smu_v13_0_7_workload_map +ffffffff83413f30 d smu_v13_0_7_clk_map +ffffffff83414000 d yellow_carp_table_map +ffffffff83414080 d yellow_carp_message_map +ffffffff83414b00 d yellow_carp_feature_mask_map +ffffffff83415000 D pci_conf_lock +ffffffff83415010 D pci_bus_dma_tag +ffffffff83415088 D msi_pic +ffffffff83415118 D msix_pic +ffffffff83416000 D pchb_cd +ffffffff83417000 D amas_cd +ffffffff83418000 D cardslot_cd +ffffffff83419000 D cardbus_cd +ffffffff8341a000 d csdevs +ffffffff8341b000 d ral_rt2560_opns +ffffffff8341b028 d ral_rt2661_opns +ffffffff8341b050 d ral_rt2860_opns +ffffffff8341c000 D pcmcia_cd +ffffffff8341d000 D pcmcia_3cxem556_func0 +ffffffff8341d0b8 D pcmcia_3cxem556_func0_cfe0 +ffffffff8341d158 D pcmcia_megahertz_xjem1144_func0 +ffffffff8341d210 D pcmcia_megahertz_xjem1144_func0_cfe0 +ffffffff8341d2b0 d pcmcia_3cxem556_func1 +ffffffff8341d368 d pcmcia_3cxem556_func1_cfe0 +ffffffff8341d408 d pcmcia_megahertz_xjem1144_func1 +ffffffff8341d4c0 d pcmcia_megahertz_xjem1144_func1_cfe0 +ffffffff8341d560 d pcmcia_sierra_a555_func1 +ffffffff8341d618 d pcmcia_sierra_a555_func1_cfe0 +ffffffff8341d6b8 d pcmcia_sveclancard_func0 +ffffffff8341d770 d pcmcia_sveclancard_func0_cfe0 +ffffffff8341e000 D ep_pcmcia_prod +ffffffff8341f000 D aic_pcmcia_prod +ffffffff83420000 D com_pcmcia_prod +ffffffff83421000 D wdc_pcmcia_pr +ffffffff83422000 D sm_pcmcia_prod +ffffffff83423000 D xe_cd +ffffffff83424000 D pcib_cd +ffffffff83425000 D amdpcib_cd +ffffffff83426000 D tcpcib_cd +ffffffff83427000 D aapic_cd +ffffffff83428000 D hme_cd +ffffffff83429000 D isa_cd +ffffffff8342a000 D isadma_cd +ffffffff8342b000 D fdc_cd +ffffffff8342c000 D fd_types +ffffffff8342c1f8 D fd_cd +ffffffff8342d000 D mpu_cd +ffffffff8342e000 D pcppi_cd +ffffffff8342f000 D spkr_cd +ffffffff83430000 D wbsio_cd +ffffffff83431000 D schsio_cd +ffffffff83432000 D it_cd +ffffffff83433000 D uguru_cd +ffffffff83434000 D aps_cd +ffffffff83435000 D isa_bus_dma_tag +ffffffff83436000 D wsdisplay_cd +ffffffff83436020 D wsdisplay_cons +ffffffff83436058 D wsdisplay_defaultscreens +ffffffff83437000 D wskbd_cd +ffffffff83437020 D wskbd_default_bell_data +ffffffff83437030 D wskbd_default_keyrepeat_data +ffffffff83437040 D wskbd_srcops +ffffffff83438000 d compose_tab +ffffffff83439000 D wsmouse_cd +ffffffff83439020 D wsmouse_srcops +ffffffff8343a000 D wsmux_srcops +ffffffff8343a030 D wsmux_tree_lock +ffffffff8343b000 D vt100_output +ffffffff8343c000 D pckbd_cd +ffffffff8343d000 D pms_cd +ffffffff8343d020 d synaptics_params +ffffffff8343d030 d alps_params +ffffffff8343e000 D skgpio_cd +ffffffff8343f000 D pctr_conf_lock +ffffffff83440000 D ukbd_keymapdata +ffffffff83441000 D usbrev_str +ffffffff83441030 D usb_cd +ffffffff83442000 d usbd_ratecheck.errinterval +ffffffff83443000 D uhub_cd +ffffffff83444000 D uaudio_cd +ffffffff83445000 D uvideo_ctrls +ffffffff834452d8 D uvideo_cd +ffffffff83446000 D utvfu_norm_params +ffffffff83446030 D utvfu_cd +ffffffff83447000 D udl_reg_vals_640x480_60 +ffffffff83447020 D udl_reg_vals_640x480_67 +ffffffff83447040 D udl_reg_vals_640x480_72 +ffffffff83447060 D udl_reg_vals_640x480_75 +ffffffff83447080 D udl_reg_vals_800x480_61 +ffffffff834470a0 D udl_reg_vals_800x600_56 +ffffffff834470c0 D udl_reg_vals_800x600_60 +ffffffff834470e0 D udl_reg_vals_800x600_72 +ffffffff83447100 D udl_reg_vals_800x600_74 +ffffffff83447120 D udl_reg_vals_800x600_75 +ffffffff83447140 D udl_reg_vals_1024x768_60 +ffffffff83447160 D udl_reg_vals_1024x768_70 +ffffffff83447180 D udl_reg_vals_1024x768_75 +ffffffff834471a0 D udl_reg_vals_1280x800_60 +ffffffff834471c0 D udl_reg_vals_1280x960_60 +ffffffff834471e0 D udl_reg_vals_1280x1024_60 +ffffffff83447200 D udl_reg_vals_1280x1024_75 +ffffffff83447220 D udl_reg_vals_1366x768_60 +ffffffff83447240 D udl_reg_vals_1440x900_60 +ffffffff83447260 D udl_reg_vals_1440x900_59 +ffffffff83447280 D udl_reg_vals_1440x900_75 +ffffffff834472a0 D udl_reg_vals_1680x1050_60 +ffffffff834472c0 D udl_reg_vals_1600x1200_60 +ffffffff834472e0 D udl_reg_vals_1920x1080_60 +ffffffff83447300 D udl_null_key_1 +ffffffff83447310 D udl_decomp_table +ffffffff83448510 D udl_cd +ffffffff83448530 D udl_stdscreen +ffffffff83448560 D udl_scrlist +ffffffff83448568 D udl_screenlist +ffffffff83448578 D udl_accessops +ffffffff83449000 D umidi_cd +ffffffff8344a000 d umq_YAMAHA_YAMAHA_UX256_ANYIFACE +ffffffff8344a020 d umq_ROLAND_ROLAND_UM1_2 +ffffffff8344a040 d umq_ROLAND_ROLAND_SC8850_2 +ffffffff8344a060 d umq_ROLAND_ROLAND_SD90_2 +ffffffff8344a080 d umq_ROLAND_ROLAND_UM880N_0 +ffffffff8344a0a0 d umq_ROLAND_ROLAND_UA100_2 +ffffffff8344a0c0 d umq_ROLAND_ROLAND_UM4_2 +ffffffff8344a0e0 d umq_ROLAND_ROLAND_U8_2 +ffffffff8344a100 d umq_ROLAND_ROLAND_UM2_2 +ffffffff8344a120 d umq_ROLAND_ROLAND_SC8820_2 +ffffffff8344a140 d umq_ROLAND_ROLAND_PC300_2 +ffffffff8344a160 d umq_ROLAND_ROLAND_SK500_2 +ffffffff8344a180 d umq_ROLAND_ROLAND_SCD70_2 +ffffffff8344a1a0 d umq_ROLAND_ROLAND_UM550_0 +ffffffff8344a1c0 d umq_ROLAND_ROLAND_SD20_0 +ffffffff8344a1e0 d umq_ROLAND_ROLAND_SD80_0 +ffffffff8344a200 d umq_ROLAND_ROLAND_UA700_3 +ffffffff8344a220 d umq_ROLAND_ROLAND_UMONE_ANYIFACE +ffffffff8344a240 D umidi_quirklist +ffffffff8344a4a0 d umq_YAMAHA_YAMAHA_UX256_ANYIFACE_fixed_ep_desc +ffffffff8344a4c0 d umq_YAMAHA_YAMAHA_UX256_ANYIFACE_fixed_ep_endpoints +ffffffff8344a4d0 d umq_ROLAND_ROLAND_UM1_2_fixed_ep_desc +ffffffff8344a4f0 d umq_ROLAND_ROLAND_UM1_2_fixed_ep_endpoints +ffffffff8344a500 d umq_ROLAND_ROLAND_SC8850_2_fixed_ep_desc +ffffffff8344a520 d umq_ROLAND_ROLAND_SC8850_2_fixed_ep_endpoints +ffffffff8344a530 d umq_ROLAND_ROLAND_SD90_2_fixed_ep_desc +ffffffff8344a550 d umq_ROLAND_ROLAND_SD90_2_fixed_ep_endpoints +ffffffff8344a560 d umq_ROLAND_ROLAND_UM880N_0_fixed_ep_desc +ffffffff8344a580 d umq_ROLAND_ROLAND_UM880N_0_fixed_ep_endpoints +ffffffff8344a590 d umq_ROLAND_ROLAND_UA100_2_fixed_ep_desc +ffffffff8344a5b0 d umq_ROLAND_ROLAND_UA100_2_fixed_ep_endpoints +ffffffff8344a5c0 d umq_ROLAND_ROLAND_UM4_2_fixed_ep_desc +ffffffff8344a5e0 d umq_ROLAND_ROLAND_UM4_2_fixed_ep_endpoints +ffffffff8344a5f0 d umq_ROLAND_ROLAND_U8_2_fixed_ep_desc +ffffffff8344a610 d umq_ROLAND_ROLAND_U8_2_fixed_ep_endpoints +ffffffff8344a620 d umq_ROLAND_ROLAND_UM2_2_fixed_ep_desc +ffffffff8344a640 d umq_ROLAND_ROLAND_UM2_2_fixed_ep_endpoints +ffffffff8344a650 d umq_ROLAND_ROLAND_SC8820_2_fixed_ep_desc +ffffffff8344a670 d umq_ROLAND_ROLAND_SC8820_2_fixed_ep_endpoints +ffffffff8344a680 d umq_ROLAND_ROLAND_PC300_2_fixed_ep_desc +ffffffff8344a6a0 d umq_ROLAND_ROLAND_PC300_2_fixed_ep_endpoints +ffffffff8344a6b0 d umq_ROLAND_ROLAND_SK500_2_fixed_ep_desc +ffffffff8344a6d0 d umq_ROLAND_ROLAND_SK500_2_fixed_ep_endpoints +ffffffff8344a6e0 d umq_ROLAND_ROLAND_SCD70_2_fixed_ep_desc +ffffffff8344a700 d umq_ROLAND_ROLAND_SCD70_2_fixed_ep_endpoints +ffffffff8344a710 d umq_ROLAND_ROLAND_UM550_0_fixed_ep_desc +ffffffff8344a730 d umq_ROLAND_ROLAND_UM550_0_fixed_ep_endpoints +ffffffff8344a740 d umq_ROLAND_ROLAND_SD20_0_fixed_ep_desc +ffffffff8344a760 d umq_ROLAND_ROLAND_SD20_0_fixed_ep_endpoints +ffffffff8344a770 d umq_ROLAND_ROLAND_SD80_0_fixed_ep_desc +ffffffff8344a790 d umq_ROLAND_ROLAND_SD80_0_fixed_ep_endpoints +ffffffff8344a7a0 d umq_ROLAND_ROLAND_UA700_3_fixed_ep_desc +ffffffff8344a7c0 d umq_ROLAND_ROLAND_UA700_3_fixed_ep_endpoints +ffffffff8344a7d0 d umq_ROLAND_ROLAND_UMONE_ANYIFACE_fixed_ep_desc +ffffffff8344a7f0 d umq_ROLAND_ROLAND_UMONE_ANYIFACE_fixed_ep_endpoints +ffffffff8344b000 D ucom_cd +ffffffff8344b020 D sysctl_ucomlock +ffffffff8344c000 D ugen_cd +ffffffff8344d000 D uhidev_cd +ffffffff8344d020 d uhidev_use_rdesc.reportbuf +ffffffff8344e000 D uhid_cd +ffffffff8344f000 D fido_cd +ffffffff83450000 D ujoy_cd +ffffffff83451000 D ukbd_cd +ffffffff83452000 D ums_cd +ffffffff83452020 d ums_fix_elecom_descriptor.match +ffffffff83453000 D umt_cd +ffffffff83454000 D def_scale +ffffffff83454020 D uts_cd +ffffffff83455000 D ubcmtp_cd +ffffffff83455020 d ubcmtp_wsmousecfg +ffffffff83456000 D ucycom_cd +ffffffff83457000 D uslhcom_cd +ffffffff83458000 D ulpt_fwdevs +ffffffff83458060 D ulpt_cd +ffffffff83458080 D ulptusein +ffffffff83459000 D umass_cd +ffffffff83459020 d umass_bbb_transfer.dCBWtag +ffffffff8345a000 D uthum_cd +ffffffff8345b000 D ugold_cd +ffffffff8345b020 d cmd_init +ffffffff8345b028 d cmd_type +ffffffff8345b030 d cmd_data +ffffffff8345c000 D utrh_cd +ffffffff8345d000 D uoakrh_cd +ffffffff8345e000 D uoaklux_cd +ffffffff8345f000 D uoakv_cd +ffffffff83460000 D uonerng_cd +ffffffff83461000 D urng_cd +ffffffff83462000 D udcf_cd +ffffffff83463000 D umbg_cd +ffffffff83464000 D uvisor_cd +ffffffff83465000 D udsbr_cd +ffffffff83466000 D utwitch_cd +ffffffff83467000 D aue_cd +ffffffff83468000 D axe_cd +ffffffff83469000 D axen_cd +ffffffff8346a000 D smsc_cd +ffffffff8346b000 D cue_devs +ffffffff8346b010 D cue_cd +ffffffff8346c000 D kue_cd +ffffffff8346d000 D cdce_cd +ffffffff8346e000 D urndis_cd +ffffffff8346f000 D mos_cd +ffffffff83470000 D mue_cd +ffffffff83471000 D udav_cd +ffffffff83472000 D upl_devs +ffffffff83472008 D upl_cd +ffffffff83473000 D ugl_devs +ffffffff83473008 D ugl_cd +ffffffff83474000 D url_cd +ffffffff83475000 D ure_cd +ffffffff83476000 D uaq_cd +ffffffff83477000 D umodem_cd +ffffffff83478000 D uftdi_cd +ffffffff83479000 D uplcom_cd +ffffffff8347a000 D umct_cd +ffffffff8347b000 D uvscom_cd +ffffffff8347c000 D ubsa_cd +ffffffff8347d000 D ukspan_cd +ffffffff8347e000 D uslcom_cd +ffffffff8347f000 D uark_cd +ffffffff83480000 D moscom_cd +ffffffff83481000 D umcs_cd +ffffffff83482000 D uscom_cd +ffffffff83483000 D ucrcom_cd +ffffffff83484000 D uxrcom_cd +ffffffff83485000 D uipaq_cd +ffffffff83486000 D umsm_cd +ffffffff83487000 D uchcom_cd +ffffffff83488000 D uticom_cd +ffffffff83489000 D wi_func_usb +ffffffff83489060 D wi_usb_cd +ffffffff8348a000 D atu_cd +ffffffff8348a020 D atu_devs +ffffffff8348a270 D atu_radfirm +ffffffff8348b000 D ural_cd +ffffffff8348c000 D rum_cd +ffffffff8348d000 D run_cd +ffffffff8348d020 D rt3070_freqs +ffffffff8348e000 D mtw_cd +ffffffff8348f000 D zyd_cd +ffffffff83490000 D upgt_cd +ffffffff83491000 D urtw_cd +ffffffff83492000 D urtwn_cd +ffffffff83493000 D rsu_cd +ffffffff83494000 D otus_cd +ffffffff83494020 d AR_PLCP_HDR_INTR +ffffffff83495000 D umb_xfer_tout +ffffffff83495010 D umb_uuid_basic_connect +ffffffff83495020 D umb_uuid_context_internet +ffffffff83495030 D umb_uuid_qmi_mbim +ffffffff83495040 D umb_cd +ffffffff83495060 D umb_delay +ffffffff83495070 D umb_qmi_alloc_cid +ffffffff83495080 D umb_qmi_fcc_auth +ffffffff83496000 D uath_cd +ffffffff83497000 D uow_cd +ffffffff83498000 D uberry_cd +ffffffff83499000 D upd_cd +ffffffff83499020 d upd_usage_roots +ffffffff834990a0 d upd_usage_batdep +ffffffff8349a000 D uwacom_cd +ffffffff8349a020 d uwacom_attach.wacom_report_buf +ffffffff8349b000 D bwfm_usb_bus_ops +ffffffff8349c000 D umstc_cd +ffffffff8349d000 D uhidpp_cd +ffffffff8349e000 D ucc_cd +ffffffff8349f000 D iic_cd +ffffffff834a0000 D probe_addrs_sensor +ffffffff834a0008 D probe_addrs_eeprom +ffffffff834a1000 D lmtemp_cd +ffffffff834a2000 D lmn_worklist +ffffffff834a2240 D lmn_cd +ffffffff834a3000 D lmenv_cd +ffffffff834a4000 D maxtmp_cd +ffffffff834a5000 D adc_cd +ffffffff834a6000 D admtemp_cd +ffffffff834a7000 D admlc_cd +ffffffff834a8000 D admtm_cd +ffffffff834a9000 D admtmp_cd +ffffffff834aa000 D admtt_cd +ffffffff834ab000 D maxds_cd +ffffffff834ac000 D adt_chips +ffffffff834ac160 D worklist +ffffffff834ac1a0 D adt_cd +ffffffff834ad000 D admcts_cd +ffffffff834ae000 D wbng_cd +ffffffff834af000 D nvt_cd +ffffffff834b0000 D adl_worklist +ffffffff834b0138 D adl_cd +ffffffff834b1000 D andl_cd +ffffffff834b2000 D sdtemp_cd +ffffffff834b3000 D lisa_cd +ffffffff834b4000 D ihidev_cd +ffffffff834b5000 D ikbd_cd +ffffffff834b6000 D ims_cd +ffffffff834b7000 D imt_cd +ffffffff834b8000 D iatp_cd +ffffffff834b9000 D ietp_cd +ffffffff834ba000 D bgw_cd +ffffffff834bb000 D icc_cd +ffffffff834bc000 D gpio_cd +ffffffff834bd000 D acpi_cd +ffffffff834bd020 D acpi_pcidevs +ffffffff834bd030 D acpi_pcirootdevs +ffffffff834bd040 D acpi_taskq +ffffffff834bd050 d acpi_indicator.save_led_state +ffffffff834bd060 d acpi_getprop.prop_guid +ffffffff834bd070 d acpi_getpropint.prop_guid +ffffffff834bd080 D acpi_skip_hids +ffffffff834bd0f0 D acpi_isa_hids +ffffffff834be000 D aml_intlen +ffffffff834be010 D aml_table +ffffffff834beaf0 d osstring +ffffffff834beb10 D aml_defobj +ffffffff834beca0 D aml_valid_osi +ffffffff834bed78 D acpi_max_osi +ffffffff834bed80 D aml_regionspace +ffffffff834c0000 D acpitimer_cd +ffffffff834c0020 d acpi_timecounter +ffffffff834c1000 D acpiac_cd +ffffffff834c1020 D acpiac_hids +ffffffff834c2000 D acpibat_cd +ffffffff834c2020 D acpibat_hids +ffffffff834c3000 D acpibtn_cd +ffffffff834c3020 D acpibtn_hids +ffffffff834c4000 D acpicmos_cd +ffffffff834c4020 D acpicmos_hids +ffffffff834c5000 D acpicpu_cd +ffffffff834c5020 D acpicpu_hids +ffffffff834c5030 d acpicpu_set_pdc.cpu_oscuuid +ffffffff834c6000 D acpihpet_cd +ffffffff834c6020 d hpet_timecounter +ffffffff834c7000 D acpiec_cd +ffffffff834c7020 D acpiec_hids +ffffffff834c8000 D acpitz_cd +ffffffff834c8020 D acpitz_perflevel +ffffffff834c9000 D acpimadt_cd +ffffffff834ca000 D acpimcfg_cd +ffffffff834cb000 D acpiprt_map_list +ffffffff834cb010 D acpiprt_cd +ffffffff834cb030 D acpiprt_pri +ffffffff834cc000 D acpidmar_force_cm +ffffffff834cc008 D acpidmar_cd +ffffffff834cc030 D vtd_faults +ffffffff834cd000 D acpidock_cd +ffffffff834ce000 D abl_cd +ffffffff834ce020 D abl_hids +ffffffff834cf000 D asmc_cd +ffffffff834cf020 D asmc_hids +ffffffff834d0000 D acpiasus_cd +ffffffff834d0020 D acpiasus_hids +ffffffff834d1000 D acpithinkpad_cd +ffffffff834d1020 D acpithinkpad_hids +ffffffff834d2000 D acpitoshiba_cd +ffffffff834d2020 D acpitoshiba_hids +ffffffff834d3000 D acpisony_cd +ffffffff834d4000 D acpivideo_cd +ffffffff834d5000 D acpivout_cd +ffffffff834d6000 D acpipwrres_cd +ffffffff834d7000 D aibs_cd +ffffffff834d7020 d aibs_hids +ffffffff834d8000 D aplgpio_cd +ffffffff834d8020 D aplgpio_hids +ffffffff834d9000 D bytgpio_cd +ffffffff834d9020 D bytgpio_hids +ffffffff834da000 D chvgpio_cd +ffffffff834da020 D chvgpio_hids +ffffffff834db000 D glkgpio_cd +ffffffff834db020 D glkgpio_hids +ffffffff834dc000 D pchgpio_cd +ffffffff834dc020 D pchgpio_hids +ffffffff834dc080 D pchgpio_devices +ffffffff834dd000 D tipmic_cd +ffffffff834dd020 D tipmic_thermal_regmap +ffffffff834dd030 D tipmic_power_regmap +ffffffff834de000 D ccpmic_cd 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acpipci_osc.uuid +ffffffff834ed000 D efi_cd +ffffffff834ee000 D vmm_cd +ffffffff834ef000 D vmm_hv_signature +ffffffff834f0000 D sdmmc_cd +ffffffff834f1000 D bwfm_sdio_bus_ops +ffffffff834f1028 D bwfm_sdio_buscore_ops +ffffffff834f2000 D onewire_cd +ffffffff834f3000 D owid_cd +ffffffff834f4000 D owsbm_cd +ffffffff834f5000 D owtemp_cd +ffffffff834f6000 D owctr_cd +ffffffff834f7000 D hz +ffffffff834f7004 D tick +ffffffff834f7008 D tick_nsec +ffffffff834f700c D initialvnodes +ffffffff834f7010 D maxprocess +ffffffff834f7014 D maxthread +ffffffff834f7018 D maxfiles +ffffffff834f7020 D nmbclust +ffffffff834f7028 D bufcachepercent +ffffffff834f702c D fscale +ffffffff834f7030 D shminfo +ffffffff834f7044 D seminfo +ffffffff834f8000 D extraloc +ffffffff834f8100 D rextraloc +ffffffff834f8110 D locnames +ffffffff834f81f0 D locnamp +ffffffff834f8410 D pv_size +ffffffff834f8420 D pv +ffffffff834f8640 d loc +ffffffff834f8ad0 D cfdata +ffffffff834ff638 D cfroots +ffffffff834ff644 D cfroots_size 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