--- 7.4/2024-02-01T07:17:04Z/2024-01-15T00:00:00Z/nm-bsd-ot14.txt Sat Feb 3 05:23:26 2024 +++ 7.4/2024-02-01T07:17:04Z/2024-01-16T00:00:00Z/nm-bsd-ot14.txt Sat Feb 3 08:21:26 2024 @@ -2,14 +2,14 @@ 00011006 A mp_pdirpa 0001419d A acpi_pdirpa 01000000 A __kernel_phys_base -02542000 T __kernel_kutext_phys -02546000 C __kernel_cptext_phys -02547000 C __kernel_rodata_phys -02e02000 R __kernel_kutext_page_phys -02e04000 C __kernel_randomdata_phys -030b0000 R __kernel_data_phys -033e9000 D __kernel_kudata_phys -033ea000 C __kernel_bss_phys +02543000 T __kernel_kutext_phys +02547000 C __kernel_cptext_phys +02548000 C __kernel_rodata_phys +02e03000 R __kernel_kutext_page_phys +02e05000 C __kernel_randomdata_phys +030b1000 R __kernel_data_phys +033ea000 D __kernel_kudata_phys +033eb000 C __kernel_bss_phys 03800000 B __kernel_phys_end 80000000 A __kernel_virt_to_phys ffffffff80000000 A __kernel_base @@ -5684,18 +5684,18 @@ ffffffff812a45d0 T exec_timekeep_map ffffffff812a4770 T exec_sigcode_map ffffffff812a5000 T sys_exit ffffffff812a5020 T exit1 -ffffffff812a5740 T sys___threxit -ffffffff812a57a0 T process_untrace -ffffffff812a5830 T process_reparent -ffffffff812a59a0 T process_clear_orphan -ffffffff812a5a10 T exit2 -ffffffff812a5a80 T proc_free -ffffffff812a5ae0 T reaper -ffffffff812a5cb0 T process_zap -ffffffff812a5e80 T dowait6 -ffffffff812a6310 T proc_finish_wait -ffffffff812a6420 T sys_wait4 -ffffffff812a6570 T sys_waitid +ffffffff812a5750 T sys___threxit +ffffffff812a57b0 T process_untrace +ffffffff812a5840 T process_reparent +ffffffff812a59b0 T process_clear_orphan +ffffffff812a5a20 T exit2 +ffffffff812a5a90 T proc_free +ffffffff812a5af0 T reaper +ffffffff812a5cc0 T process_zap +ffffffff812a5e90 T dowait6 +ffffffff812a6320 T proc_finish_wait +ffffffff812a6430 T sys_wait4 +ffffffff812a6580 T sys_waitid ffffffff812a7000 T fork_return ffffffff812a7040 T sys_fork ffffffff812a7090 T fork1 @@ -5794,18 +5794,19 @@ ffffffff812b1410 T inferior ffffffff812b1460 T tfind ffffffff812b14c0 T tfind_user ffffffff812b1550 T prfind -ffffffff812b15b0 T pgfind -ffffffff812b1600 T zombiefind -ffffffff812b1660 T enternewpgrp -ffffffff812b1800 T zapverauth -ffffffff812b1830 T enterthispgrp -ffffffff812b1970 T fixjobc -ffffffff812b1b10 T pgdelete -ffffffff812b1bc0 T leavepgrp -ffffffff812b1c60 T killjobc -ffffffff812b1d20 T proc_printit -ffffffff812b1f20 T db_kill_cmd -ffffffff812b1f80 T db_show_all_procs +ffffffff812b15b0 T priterator +ffffffff812b1650 T pgfind +ffffffff812b16a0 T zombiefind +ffffffff812b1700 T enternewpgrp +ffffffff812b18a0 T zapverauth +ffffffff812b18d0 T enterthispgrp +ffffffff812b1a10 T fixjobc +ffffffff812b1bb0 T pgdelete +ffffffff812b1c60 T leavepgrp +ffffffff812b1d00 T killjobc +ffffffff812b1dc0 T proc_printit +ffffffff812b1fc0 T db_kill_cmd +ffffffff812b2020 T db_show_all_procs ffffffff812b3000 T crset ffffffff812b3050 T sys_getpid ffffffff812b3090 T sys_getthrid @@ -6054,35 +6055,35 @@ ffffffff812ca2e0 T sysctl_proc_cwd ffffffff812ca480 T sysctl_proc_nobroadcastkill ffffffff812ca600 T sysctl_proc_vmmap ffffffff812ca850 T sysctl_file -ffffffff812cb7b0 T sysctl_sysvipc -ffffffff812cba30 T sysctl_intrcnt -ffffffff812cba50 T sysctl_cptime2 -ffffffff812cbb30 T sysctl_audio -ffffffff812cbc10 T sysctl_video -ffffffff812cbcf0 T sysctl_cpustats -ffffffff812cbe50 T sysctl_rdstring -ffffffff812cbf00 T sysctl_rdint -ffffffff812cbf80 T sysctl_int -ffffffff812cc040 T sysctl_securelevel_int -ffffffff812cc180 T sysctl_tstring -ffffffff812cc1d0 T sysctl_rdstruct -ffffffff812cc240 T sysctl_utc_offset -ffffffff812cc310 T sysctl_bounded_arr -ffffffff812cc3b0 T sysctl_diskinit -ffffffff812cc7b0 T sysctl_sensors -ffffffff812cc9e0 T sysctl_rdquad -ffffffff812cca60 T sysctl_hwbattery -ffffffff812ccbe0 T sysctl_hwchargemode -ffffffff812ccc70 T sysctl_int_bounded -ffffffff812ccdb0 T sysctl_hwchargestart -ffffffff812cce40 T sysctl_hwchargestop -ffffffff812cced0 T sysctl_int_lower -ffffffff812ccfe0 T sysctl_quad -ffffffff812cd0a0 T sysctl_string -ffffffff812cd190 T sysctl__string -ffffffff812cd2f0 T sysctl_struct -ffffffff812cd3c0 T fill_file -ffffffff812cdbc0 T fill_kproc +ffffffff812cb790 T sysctl_sysvipc +ffffffff812cba10 T sysctl_intrcnt +ffffffff812cba30 T sysctl_cptime2 +ffffffff812cbb10 T sysctl_audio +ffffffff812cbbf0 T sysctl_video +ffffffff812cbcd0 T sysctl_cpustats +ffffffff812cbe30 T sysctl_rdstring +ffffffff812cbee0 T sysctl_rdint +ffffffff812cbf60 T sysctl_int +ffffffff812cc020 T sysctl_securelevel_int +ffffffff812cc160 T sysctl_tstring +ffffffff812cc1b0 T sysctl_rdstruct +ffffffff812cc220 T sysctl_utc_offset +ffffffff812cc2f0 T sysctl_bounded_arr +ffffffff812cc390 T sysctl_diskinit +ffffffff812cc790 T sysctl_sensors +ffffffff812cc9c0 T sysctl_rdquad +ffffffff812cca40 T sysctl_hwbattery +ffffffff812ccbc0 T sysctl_hwchargemode +ffffffff812ccc50 T sysctl_int_bounded +ffffffff812ccd90 T sysctl_hwchargestart +ffffffff812cce20 T sysctl_hwchargestop +ffffffff812cceb0 T sysctl_int_lower +ffffffff812ccfc0 T sysctl_quad +ffffffff812cd080 T sysctl_string +ffffffff812cd170 T sysctl__string +ffffffff812cd2d0 T sysctl_struct +ffffffff812cd3a0 T fill_file +ffffffff812cdba0 T fill_kproc ffffffff812cf000 T sleep_queue_init ffffffff812cf060 T tsleep ffffffff812cf1e0 T sleep_setup @@ -17967,12193 +17968,12181 @@ ffffffff818ba700 T virtio_pci_write_device_config_8 ffffffff818ba770 T virtio_pci_read_queue_size ffffffff818ba7e0 T virtio_pci_setup_queue ffffffff818baac0 T virtio_pci_set_status -ffffffff818bab40 T virtio_pci_negotiate_features -ffffffff818bac80 T virtio_pci_poll_intr -ffffffff818bacf0 T virtio_pci_find_cap -ffffffff818bae90 T virtio_pci_attach_10 -ffffffff818bb2f0 T virtio_pci_attach_09 -ffffffff818bb430 T virtio_pci_adjust_config_region -ffffffff818bb4d0 T virtio_pci_setup_msix -ffffffff818bb860 T virtio_pci_legacy_intr -ffffffff818bb900 T virtio_pci_legacy_intr_mpsafe -ffffffff818bb990 T virtio_pci_free_irqs -ffffffff818bbbd0 T virtio_pci_negotiate_features_10 -ffffffff818bbe00 T virtio_pci_msix_establish -ffffffff818bbed0 T virtio_pci_set_msix_queue_vector -ffffffff818bbf50 T virtio_pci_set_msix_config_vector -ffffffff818bbf90 T virtio_pci_config_intr -ffffffff818bbfd0 T virtio_pci_shared_queue_intr -ffffffff818bbfe0 T virtio_pci_queue_intr -ffffffff818bc000 T dwiic_pci_match -ffffffff818bc030 T dwiic_pci_attach -ffffffff818bc350 T dwiic_pci_activate -ffffffff818bc3c0 T dwiic_pci_bus_scan -ffffffff818bd000 T bwfm_pci_buscore_read -ffffffff818bd060 T bwfm_pci_buscore_write -ffffffff818bd0d0 T bwfm_pci_buscore_prepare -ffffffff818bd100 T bwfm_pci_buscore_reset -ffffffff818bd2f0 T bwfm_pci_buscore_activate -ffffffff818bd320 T bwfm_pci_preinit -ffffffff818be130 T bwfm_pci_stop -ffffffff818be1c0 T bwfm_pci_txcheck -ffffffff818be280 T bwfm_pci_txdata -ffffffff818be5d0 T bwfm_pci_msgbuf_query_dcmd -ffffffff818bea00 T bwfm_pci_msgbuf_set_dcmd -ffffffff818bea50 T bwfm_pci_match -ffffffff818bea80 T bwfm_pci_attach -ffffffff818becf0 T bwfm_pci_detach -ffffffff818bed30 T bwfm_pci_activate -ffffffff818beee0 T bwfm_pci_intr -ffffffff818bf140 T bwfm_pci_select_core -ffffffff818bf220 T bwfm_pci_load_microcode -ffffffff818bf6b0 T bwfm_pci_dmamem_alloc -ffffffff818bf850 T bwfm_pci_setup_ring -ffffffff818bfa50 T bwfm_pci_intr_enable -ffffffff818bfaa0 T bwfm_pci_hostready -ffffffff818bfb10 T bwfm_pci_fill_rx_rings -ffffffff818bfb60 T bwfm_pci_dmamem_free -ffffffff818bfbd0 T bwfm_pci_cleanup -ffffffff818c0240 T bwfm_pci_send_mb_data -ffffffff818c0360 T bwfm_pci_intmask -ffffffff818c03a0 T bwfm_pci_pktid_avail -ffffffff818c0420 T bwfm_pci_pktid_new -ffffffff818c0570 T bwfm_pci_pktid_free -ffffffff818c0620 T bwfm_pci_fill_rx_buf_ring -ffffffff818c0960 T bwfm_pci_fill_rx_ioctl_ring -ffffffff818c0cc0 T bwfm_pci_ring_write_reserve -ffffffff818c0db0 T bwfm_pci_ring_write_cancel -ffffffff818c0df0 T bwfm_pci_ring_write_commit -ffffffff818c0ed0 T bwfm_pci_ring_write_rptr -ffffffff818c0f50 T bwfm_pci_ring_write_wptr -ffffffff818c0fd0 T bwfm_pci_setup_flowring -ffffffff818c1120 T bwfm_pci_ring_bell -ffffffff818c1160 T bwfm_pci_ring_update_rptr -ffffffff818c1210 T bwfm_pci_ring_update_wptr -ffffffff818c12c0 T bwfm_pci_ring_write_reserve_multi -ffffffff818c13e0 T bwfm_pci_ring_read_avail -ffffffff818c14e0 T bwfm_pci_ring_read_commit -ffffffff818c1570 T bwfm_pci_ring_rx -ffffffff818c1770 T bwfm_pci_msg_rx -ffffffff818c1d50 T bwfm_pci_flowring_delete_cb -ffffffff818c1e00 T bwfm_pci_msgbuf_rxioctl -ffffffff818c1ef0 T bwfm_pci_intr_status -ffffffff818c1f30 T bwfm_pci_intr_ack -ffffffff818c1f70 T bwfm_pci_flowring_lookup -ffffffff818c20e0 T bwfm_pci_flowring_create -ffffffff818c2210 T bwfm_pci_flowring_create_cb -ffffffff818c2550 T bwfm_pci_flowring_delete -ffffffff818c2820 T bwfm_pci_msgbuf_h2d_mb_write -ffffffff818c2a30 T bwfm_pci_handle_mb_data -ffffffff818c2b00 T bwfm_pci_intr_disable -ffffffff818c3000 T ccp_pci_match -ffffffff818c3030 T ccp_pci_attach -ffffffff818c4000 T bnxt_match -ffffffff818c4030 T bnxt_attach -ffffffff818c4be0 T bnxt_dmamem_alloc -ffffffff818c4d70 T bnxt_dmamem_free -ffffffff818c4e00 T bnxt_hwrm_ver_get -ffffffff818c4f50 T bnxt_hwrm_nvm_get_dev_info -ffffffff818c50a0 T bnxt_hwrm_func_drv_rgtr -ffffffff818c51c0 T bnxt_hwrm_func_rgtr_async_events -ffffffff818c52e0 T bnxt_hwrm_func_qcaps -ffffffff818c53c0 T bnxt_admin_intr -ffffffff818c55b0 T bnxt_intr -ffffffff818c5a60 T bnxt_hwrm_func_qcfg -ffffffff818c5b10 T bnxt_hwrm_queue_qportcfg -ffffffff818c5be0 T bnxt_hwrm_func_reset -ffffffff818c5c90 T bnxt_mark_cpr_invalid -ffffffff818c5cf0 T bnxt_hwrm_ring_alloc -ffffffff818c5ea0 T bnxt_cfg_async_cr -ffffffff818c5fa0 T bnxt_write_cp_doorbell -ffffffff818c5fe0 T bnxt_set_cp_ring_aggint -ffffffff818c60c0 T bnxt_ioctl -ffffffff818c6250 T bnxt_start -ffffffff818c6650 T bnxt_watchdog -ffffffff818c6680 T bnxt_media_change -ffffffff818c67d0 T bnxt_media_status -ffffffff818c67f0 T bnxt_refill -ffffffff818c6850 T bnxt_media_autonegotiate -ffffffff818c6940 T bnxt_hwrm_port_phy_qcfg -ffffffff818c6dc0 T bnxt_free_slots -ffffffff818c6e60 T bnxt_hwrm_cmd_hdr_init -ffffffff818c6eb0 T hwrm_send_message -ffffffff818c6f30 T bnxt_queue_up -ffffffff818c7ab0 T bnxt_hwrm_stat_ctx_alloc -ffffffff818c7bb0 T bnxt_write_tx_doorbell -ffffffff818c7c20 T bnxt_write_rx_doorbell -ffffffff818c7ca0 T bnxt_hwrm_ring_grp_alloc -ffffffff818c7da0 T bnxt_rx_fill -ffffffff818c7eb0 T bnxt_hwrm_ring_grp_free -ffffffff818c7f90 T bnxt_hwrm_ring_free -ffffffff818c8080 T bnxt_hwrm_stat_ctx_free -ffffffff818c8170 T bnxt_queue_down -ffffffff818c8890 T bnxt_up -ffffffff818c8e20 T bnxt_hwrm_vnic_ctx_alloc -ffffffff818c8f00 T bnxt_hwrm_vnic_alloc -ffffffff818c9000 T bnxt_hwrm_vnic_cfg -ffffffff818c9140 T bnxt_hwrm_vnic_cfg_placement -ffffffff818c9210 T bnxt_hwrm_set_filter -ffffffff818c93a0 T bnxt_hwrm_vnic_rss_cfg -ffffffff818c9480 T bnxt_iff -ffffffff818c95f0 T bnxt_hwrm_vnic_free -ffffffff818c96e0 T bnxt_hwrm_vnic_ctx_free -ffffffff818c97d0 T bnxt_down -ffffffff818c9ba0 T bnxt_hwrm_free_filter -ffffffff818c9c80 T bnxt_hwrm_cfa_l2_set_rx_mask -ffffffff818c9d60 T bnxt_rxrinfo -ffffffff818c9eb0 T bnxt_get_sffpage -ffffffff818ca1c0 T bnxt_load_mbuf -ffffffff818ca270 T bnxt_handle_async_event -ffffffff818ca2c0 T bnxt_cpr_next_cmpl -ffffffff818ca330 T bnxt_cpr_commit -ffffffff818ca360 T bnxt_cpr_rollback -ffffffff818ca390 T bnxt_write_cp_doorbell_index -ffffffff818ca410 T bnxt_rx -ffffffff818ca6b0 T bnxt_txeof -ffffffff818ca7e0 T bnxt_get_media_type -ffffffff818cad40 T bnxt_add_media_type -ffffffff818caf00 T _hwrm_send_message -ffffffff818cdc20 T bnxt_rx_fill_slots -ffffffff818cde00 T bnxt_hwrm_err_map -ffffffff818cde40 T _bnxt_hwrm_set_async_event_bit -ffffffff818ce000 t mcx_match -ffffffff818ce030 t mcx_attach -ffffffff818cec40 T mcx_rx_fill -ffffffff818cee90 T mcx_load_mbuf -ffffffff818cef40 t mcx_dmamem_alloc -ffffffff818cf0a0 t mcx_init_wait -ffffffff818cf130 t mcx_enable_hca -ffffffff818cf310 t mcx_issi -ffffffff818cf680 t mcx_pages -ffffffff818cff60 t mcx_hca_max_caps -ffffffff818d04e0 t mcx_hca_set_caps -ffffffff818d09c0 t mcx_init_hca -ffffffff818d0b90 t mcx_set_driver_version -ffffffff818d0ef0 t mcx_iff -ffffffff818d1330 t mcx_alloc_uar -ffffffff818d1520 t mcx_alloc_pd -ffffffff818d1700 t mcx_alloc_tdomain -ffffffff818d18e0 t mcx_admin_intr -ffffffff818d1a90 t mcx_create_eq -ffffffff818d2030 t mcx_query_nic_vport_context -ffffffff818d23e0 t mcx_query_special_contexts -ffffffff818d25c0 t mcx_set_port_mtu -ffffffff818d26d0 t mcx_ioctl -ffffffff818d49a0 t mcx_start -ffffffff818d4ea0 t mcx_watchdog -ffffffff818d4ed0 t mcx_media_change -ffffffff818d5190 t mcx_media_status -ffffffff818d52e0 t mcx_media_add_types -ffffffff818d5400 t mcx_refill -ffffffff818d5470 t mcx_cq_intr -ffffffff818d5a50 t mcx_calibrate -ffffffff818d5bf0 t mcx_port_change -ffffffff818d5d40 t mcx_kstat_attach -ffffffff818d6110 t mcx_teardown_hca -ffffffff818d6300 t mcx_dmamem_free -ffffffff818d6370 t mcx_set_issi -ffffffff818d6520 t mcx_set_flow_table_entry_mac -ffffffff818d69f0 t mcx_delete_flow_table_entry -ffffffff818d6e70 t mcx_access_hca_reg -ffffffff818d7280 t mcx_cmdq_exec -ffffffff818d7500 t mcx_down -ffffffff818d84c0 t mcx_create_flow_table -ffffffff818d8870 t mcx_create_flow_group -ffffffff818d8d40 t mcx_set_flow_table_root -ffffffff818d90c0 t mcx_create_rqt -ffffffff818d94c0 t mcx_create_tir_direct -ffffffff818d97e0 t mcx_create_tir_indirect -ffffffff818d9b20 t mcx_set_flow_table_entry_proto -ffffffff818da000 t mcx_ready_sq -ffffffff818da390 t mcx_ready_rq -ffffffff818da720 t mcx_calibrate_first -ffffffff818da810 t mcx_create_rq -ffffffff818dad20 t mcx_destroy_sq -ffffffff818dafd0 t mcx_destroy_cq -ffffffff818db290 t mcx_destroy_flow_table -ffffffff818db600 t mcx_kstat_attach_ppcnt -ffffffff818db730 t mcx_kstat_ppcnt_read -ffffffff818db850 t mcx_kstat_mtmp_read -ffffffff818db9e0 t mcx_kstat_queue_read -ffffffff818dc9a0 t mcx_timecounter_read -ffffffff818dd000 t iavf_match -ffffffff818dd030 t iavf_attach -ffffffff818dd8a0 t iavf_reset -ffffffff818ddb60 t iavf_dmamem_alloc -ffffffff818ddcc0 t iavf_arq_fill -ffffffff818ddf80 t iavf_arq_timeout -ffffffff818ddfb0 t iavf_init_admin_queue -ffffffff818de160 t iavf_get_version -ffffffff818de360 t iavf_get_vf_resources -ffffffff818de530 t iavf_config_irq_map -ffffffff818de710 t iavf_intr -ffffffff818ded90 t iavf_ioctl -ffffffff818df2f0 t iavf_start -ffffffff818df650 t iavf_watchdog -ffffffff818df680 t iavf_media_change -ffffffff818df6b0 t iavf_media_status -ffffffff818df740 t iavf_dmamem_free -ffffffff818df7b0 t iavf_arq_unfill -ffffffff818df8b0 t iavf_down -ffffffff818dfc40 t iavf_up -ffffffff818e0610 t iavf_queue_select -ffffffff818e0800 t iavf_txr_free -ffffffff818e0900 t iavf_rxr_free -ffffffff818e0a10 t iavf_rxfill -ffffffff818e0d20 t iavf_rxrefill -ffffffff818e0d40 t iavf_process_arq -ffffffff818e11c0 t iavf_add_del_addr -ffffffff818e2000 T rge_match -ffffffff818e2030 T rge_attach -ffffffff818e24c0 T rge_activate -ffffffff818e2600 T rge_intr -ffffffff818e28f0 T rge_config_imtype -ffffffff818e2960 T rge_chipinit -ffffffff818e2a70 T rge_get_macaddr -ffffffff818e2c40 T rge_allocmem -ffffffff818e3040 T rge_ioctl -ffffffff818e31f0 T rge_start -ffffffff818e33d0 T rge_watchdog -ffffffff818e3410 T rge_wol -ffffffff818e3640 T rge_tick -ffffffff818e36c0 T rge_txstart -ffffffff818e36f0 T rge_ifmedia_upd -ffffffff818e3cc0 T rge_ifmedia_sts -ffffffff818e3db0 T rge_add_media_types -ffffffff818e3e60 T rge_kstat_attach -ffffffff818e4140 T rge_wol_power -ffffffff818e4220 T rge_rxeof -ffffffff818e4660 T rge_txeof -ffffffff818e4870 T rge_init -ffffffff818e5f20 T rge_setup_intr -ffffffff818e6090 T rge_encap -ffffffff818e6360 T rge_stop -ffffffff818e6640 T rge_iff -ffffffff818e67c0 T rge_set_macaddr -ffffffff818e6890 T rge_rx_list_init -ffffffff818e6950 T rge_tx_list_init -ffffffff818e6a20 T rge_phy_config -ffffffff818e76d0 T rge_disable_aspm_clkreq -ffffffff818e77d0 T rge_read_csi -ffffffff818e7880 T rge_write_csi -ffffffff818e7950 T rge_write_mac_ocp -ffffffff818e79a0 T rge_read_mac_ocp -ffffffff818e7a20 T rge_hw_reset -ffffffff818e7b20 T rge_write_phy_ocp -ffffffff818e7be0 T rge_read_phy_ocp -ffffffff818e7c90 T rge_read_phy -ffffffff818e7d60 T rge_write_phy -ffffffff818e7e40 T rge_get_link_status -ffffffff818e7ea0 T rge_newbuf -ffffffff818e8030 T rge_discard_rxbuf -ffffffff818e80a0 T rge_fill_rx_ring -ffffffff818e8120 T rge_reset -ffffffff818e8390 T rge_exit_oob -ffffffff818e8b90 T rge_set_phy_power -ffffffff818e8df0 T rge_hw_init -ffffffff818e9540 T rge_ephy_config -ffffffff818e9590 T rge_ephy_config_mac_cfg3 -ffffffff818e97e0 T rge_ephy_config_mac_cfg5 -ffffffff818e98c0 T rge_write_ephy -ffffffff818e9b20 T rge_read_ephy -ffffffff818e9da0 T rge_phy_config_mac_cfg3 -ffffffff818eb8d0 T rge_phy_config_mac_cfg5 -ffffffff818ec420 T rge_patch_phy_mcu -ffffffff818ec740 T rge_phy_config_mcu -ffffffff818ecf40 T rge_switch_mcu_ram_page -ffffffff818ecfd0 T rge_disable_phy_ocp_pwrsave -ffffffff818ed1a0 T rge_disable_hw_im -ffffffff818ed1d0 T rge_disable_sim_im -ffffffff818ed230 T rge_setup_sim_im -ffffffff818ed2b0 T rge_link_state -ffffffff818ed330 t rge_kstat_read -ffffffff818ed4d0 t rge_kstat_copy -ffffffff818ee000 T igc_match -ffffffff818ee030 T igc_attach -ffffffff818ee360 T igc_detach -ffffffff818ee550 T igc_identify_hardware -ffffffff818ee5c0 T igc_allocate_pci_resources -ffffffff818ee6e0 T igc_allocate_queues -ffffffff818eebd0 T igc_is_valid_ether_addr -ffffffff818eec30 T igc_allocate_msix -ffffffff818eee70 T igc_setup_interface -ffffffff818ef0b0 T igc_reset -ffffffff818ef1f0 T igc_update_link_status -ffffffff818ef300 T igc_get_hw_control -ffffffff818ef360 T igc_release_hw_control -ffffffff818ef3c0 T igc_free_pci_resources -ffffffff818ef4a0 T igc_stop -ffffffff818ef7a0 T igc_free_transmit_structures -ffffffff818ef820 T igc_free_receive_structures -ffffffff818ef8d0 T igc_setup_msix -ffffffff818ef960 T igc_dma_malloc -ffffffff818efac0 T igc_rxrefill -ffffffff818efb90 T igc_dma_free -ffffffff818efc40 T igc_init_dmac -ffffffff818efee0 T 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drm_dp_downstream_420_passthrough -ffffffff8198c700 T drm_dp_downstream_444_to_420_conversion -ffffffff8198c760 T drm_dp_downstream_rgb_to_ycbcr_conversion -ffffffff8198c7c0 T drm_dp_downstream_mode -ffffffff8198c850 T drm_dp_downstream_id -ffffffff8198c870 T drm_dp_downstream_debug -ffffffff8198c910 T drm_dp_subconnector_type -ffffffff8198c980 T drm_dp_set_subconnector_property -ffffffff8198c9f0 T drm_dp_read_sink_count_cap -ffffffff8198ca40 T drm_dp_read_sink_count -ffffffff8198caa0 T drm_dp_remote_aux_init -ffffffff8198cad0 t drm_dp_aux_crc_work -ffffffff8198cc40 T drm_dp_aux_init -ffffffff8198ccf0 T drm_dp_aux_register -ffffffff8198ce10 T drm_dp_aux_unregister -ffffffff8198ce40 T drm_dp_psr_setup_time -ffffffff8198ce90 T drm_dp_start_crc -ffffffff8198cf40 T drm_dp_stop_crc -ffffffff8198cfd0 T drm_dp_read_desc -ffffffff8198d190 T drm_dp_dsc_sink_max_slice_count -ffffffff8198d220 T drm_dp_dsc_sink_line_buf_depth -ffffffff8198d260 T drm_dp_dsc_sink_supported_input_bpcs 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drm_dp_pcon_enc_is_dsc_1_2 -ffffffff8198e020 T drm_dp_pcon_dsc_max_slices -ffffffff8198e0b0 T drm_dp_pcon_dsc_max_slice_width -ffffffff8198e0e0 T drm_dp_pcon_dsc_bpp_incr -ffffffff8198e120 T drm_dp_pcon_pps_default -ffffffff8198e1a0 T drm_dp_pcon_pps_override_buf -ffffffff8198e240 T drm_dp_pcon_pps_override_param -ffffffff8198e310 T drm_dp_pcon_convert_rgb_to_ycbcr -ffffffff8198e3b0 T drm_edp_backlight_set_level -ffffffff8198e480 T drm_edp_backlight_enable -ffffffff8198e690 t drm_edp_backlight_set_enable -ffffffff8198e7c0 T drm_edp_backlight_disable -ffffffff8198e800 T drm_edp_backlight_init -ffffffff8198ed60 T drm_panel_dp_aux_backlight -ffffffff8198eef0 t __128b132b_channel_eq_delay_us -ffffffff8198ef70 t __8b10b_channel_eq_delay_us -ffffffff8198eff0 t drm_dp_aux_get_crc -ffffffff8198f0d0 t drm_dp_i2c_xfer -ffffffff8198f340 t drm_dp_i2c_functionality -ffffffff8198f370 t drm_dp_i2c_do_msg -ffffffff8198f740 t lock_bus -ffffffff8198f760 t trylock_bus -ffffffff8198f7b0 t unlock_bus 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bwfm_pci_buscore_prepare +ffffffff818be100 T bwfm_pci_buscore_reset +ffffffff818be2f0 T bwfm_pci_buscore_activate +ffffffff818be320 T bwfm_pci_preinit +ffffffff818bf130 T bwfm_pci_stop +ffffffff818bf1c0 T bwfm_pci_txcheck +ffffffff818bf280 T bwfm_pci_txdata +ffffffff818bf5d0 T bwfm_pci_msgbuf_query_dcmd +ffffffff818bfa00 T bwfm_pci_msgbuf_set_dcmd +ffffffff818bfa50 T bwfm_pci_match +ffffffff818bfa80 T bwfm_pci_attach +ffffffff818bfcf0 T bwfm_pci_detach +ffffffff818bfd30 T bwfm_pci_activate +ffffffff818bfee0 T bwfm_pci_intr +ffffffff818c0140 T bwfm_pci_select_core +ffffffff818c0220 T bwfm_pci_load_microcode +ffffffff818c06b0 T bwfm_pci_dmamem_alloc +ffffffff818c0850 T bwfm_pci_setup_ring +ffffffff818c0a50 T bwfm_pci_intr_enable +ffffffff818c0aa0 T bwfm_pci_hostready +ffffffff818c0b10 T bwfm_pci_fill_rx_rings +ffffffff818c0b60 T bwfm_pci_dmamem_free +ffffffff818c0bd0 T bwfm_pci_cleanup +ffffffff818c1240 T bwfm_pci_send_mb_data +ffffffff818c1360 T bwfm_pci_intmask +ffffffff818c13a0 T bwfm_pci_pktid_avail +ffffffff818c1420 T bwfm_pci_pktid_new +ffffffff818c1570 T bwfm_pci_pktid_free +ffffffff818c1620 T bwfm_pci_fill_rx_buf_ring +ffffffff818c1960 T bwfm_pci_fill_rx_ioctl_ring +ffffffff818c1cc0 T bwfm_pci_ring_write_reserve +ffffffff818c1db0 T bwfm_pci_ring_write_cancel +ffffffff818c1df0 T bwfm_pci_ring_write_commit +ffffffff818c1ed0 T bwfm_pci_ring_write_rptr +ffffffff818c1f50 T bwfm_pci_ring_write_wptr +ffffffff818c1fd0 T bwfm_pci_setup_flowring +ffffffff818c2120 T bwfm_pci_ring_bell +ffffffff818c2160 T bwfm_pci_ring_update_rptr +ffffffff818c2210 T bwfm_pci_ring_update_wptr +ffffffff818c22c0 T bwfm_pci_ring_write_reserve_multi +ffffffff818c23e0 T bwfm_pci_ring_read_avail +ffffffff818c24e0 T bwfm_pci_ring_read_commit +ffffffff818c2570 T bwfm_pci_ring_rx +ffffffff818c2770 T bwfm_pci_msg_rx +ffffffff818c2d50 T bwfm_pci_flowring_delete_cb +ffffffff818c2e00 T bwfm_pci_msgbuf_rxioctl +ffffffff818c2ef0 T bwfm_pci_intr_status +ffffffff818c2f30 T bwfm_pci_intr_ack +ffffffff818c2f70 T bwfm_pci_flowring_lookup +ffffffff818c30e0 T bwfm_pci_flowring_create +ffffffff818c3210 T bwfm_pci_flowring_create_cb +ffffffff818c3550 T bwfm_pci_flowring_delete +ffffffff818c3820 T bwfm_pci_msgbuf_h2d_mb_write +ffffffff818c3a30 T bwfm_pci_handle_mb_data +ffffffff818c3b00 T bwfm_pci_intr_disable +ffffffff818c4000 T ccp_pci_match +ffffffff818c4030 T ccp_pci_attach +ffffffff818c5000 T bnxt_match +ffffffff818c5030 T bnxt_attach +ffffffff818c5be0 T bnxt_dmamem_alloc +ffffffff818c5d70 T bnxt_dmamem_free +ffffffff818c5e00 T bnxt_hwrm_ver_get +ffffffff818c5f50 T bnxt_hwrm_nvm_get_dev_info +ffffffff818c60a0 T bnxt_hwrm_func_drv_rgtr +ffffffff818c61c0 T bnxt_hwrm_func_rgtr_async_events +ffffffff818c62e0 T bnxt_hwrm_func_qcaps +ffffffff818c63c0 T bnxt_admin_intr +ffffffff818c65b0 T bnxt_intr +ffffffff818c6a60 T bnxt_hwrm_func_qcfg +ffffffff818c6b10 T bnxt_hwrm_queue_qportcfg +ffffffff818c6be0 T bnxt_hwrm_func_reset +ffffffff818c6c90 T bnxt_mark_cpr_invalid +ffffffff818c6cf0 T bnxt_hwrm_ring_alloc +ffffffff818c6ea0 T bnxt_cfg_async_cr +ffffffff818c6fa0 T bnxt_write_cp_doorbell +ffffffff818c6fe0 T bnxt_set_cp_ring_aggint +ffffffff818c70c0 T bnxt_ioctl +ffffffff818c7250 T bnxt_start +ffffffff818c7650 T bnxt_watchdog +ffffffff818c7680 T bnxt_media_change +ffffffff818c77d0 T bnxt_media_status +ffffffff818c77f0 T bnxt_refill +ffffffff818c7850 T bnxt_media_autonegotiate +ffffffff818c7940 T bnxt_hwrm_port_phy_qcfg +ffffffff818c7dc0 T bnxt_free_slots +ffffffff818c7e60 T bnxt_hwrm_cmd_hdr_init +ffffffff818c7eb0 T hwrm_send_message +ffffffff818c7f30 T bnxt_queue_up +ffffffff818c8ab0 T bnxt_hwrm_stat_ctx_alloc +ffffffff818c8bb0 T bnxt_write_tx_doorbell +ffffffff818c8c20 T bnxt_write_rx_doorbell +ffffffff818c8ca0 T bnxt_hwrm_ring_grp_alloc +ffffffff818c8da0 T bnxt_rx_fill +ffffffff818c8eb0 T bnxt_hwrm_ring_grp_free +ffffffff818c8f90 T bnxt_hwrm_ring_free +ffffffff818c9080 T bnxt_hwrm_stat_ctx_free +ffffffff818c9170 T bnxt_queue_down +ffffffff818c9890 T bnxt_up +ffffffff818c9e20 T bnxt_hwrm_vnic_ctx_alloc +ffffffff818c9f00 T bnxt_hwrm_vnic_alloc +ffffffff818ca000 T bnxt_hwrm_vnic_cfg +ffffffff818ca140 T bnxt_hwrm_vnic_cfg_placement +ffffffff818ca210 T bnxt_hwrm_set_filter +ffffffff818ca3a0 T bnxt_hwrm_vnic_rss_cfg +ffffffff818ca480 T bnxt_iff +ffffffff818ca5f0 T bnxt_hwrm_vnic_free +ffffffff818ca6e0 T bnxt_hwrm_vnic_ctx_free +ffffffff818ca7d0 T bnxt_down +ffffffff818caba0 T bnxt_hwrm_free_filter +ffffffff818cac80 T bnxt_hwrm_cfa_l2_set_rx_mask +ffffffff818cad60 T bnxt_rxrinfo +ffffffff818caeb0 T bnxt_get_sffpage +ffffffff818cb1c0 T bnxt_load_mbuf +ffffffff818cb270 T bnxt_handle_async_event +ffffffff818cb2c0 T bnxt_cpr_next_cmpl +ffffffff818cb330 T bnxt_cpr_commit +ffffffff818cb360 T bnxt_cpr_rollback +ffffffff818cb390 T bnxt_write_cp_doorbell_index +ffffffff818cb410 T bnxt_rx +ffffffff818cb6b0 T bnxt_txeof +ffffffff818cb7e0 T bnxt_get_media_type +ffffffff818cbd40 T bnxt_add_media_type +ffffffff818cbf00 T _hwrm_send_message +ffffffff818cec20 T bnxt_rx_fill_slots +ffffffff818cee00 T bnxt_hwrm_err_map +ffffffff818cee40 T _bnxt_hwrm_set_async_event_bit +ffffffff818cf000 t mcx_match +ffffffff818cf030 t mcx_attach +ffffffff818cfc40 T mcx_rx_fill +ffffffff818cfe90 T mcx_load_mbuf +ffffffff818cff40 t mcx_dmamem_alloc +ffffffff818d00a0 t mcx_init_wait +ffffffff818d0130 t mcx_enable_hca +ffffffff818d0310 t mcx_issi +ffffffff818d0680 t mcx_pages +ffffffff818d0f60 t mcx_hca_max_caps +ffffffff818d14e0 t mcx_hca_set_caps +ffffffff818d19c0 t mcx_init_hca +ffffffff818d1b90 t mcx_set_driver_version +ffffffff818d1ef0 t mcx_iff +ffffffff818d2330 t mcx_alloc_uar +ffffffff818d2520 t mcx_alloc_pd +ffffffff818d2700 t mcx_alloc_tdomain +ffffffff818d28e0 t mcx_admin_intr +ffffffff818d2a90 t mcx_create_eq +ffffffff818d3030 t mcx_query_nic_vport_context +ffffffff818d33e0 t mcx_query_special_contexts +ffffffff818d35c0 t mcx_set_port_mtu +ffffffff818d36d0 t mcx_ioctl +ffffffff818d59a0 t mcx_start +ffffffff818d5ea0 t mcx_watchdog +ffffffff818d5ed0 t mcx_media_change +ffffffff818d6190 t mcx_media_status +ffffffff818d62e0 t mcx_media_add_types +ffffffff818d6400 t mcx_refill +ffffffff818d6470 t mcx_cq_intr +ffffffff818d6a50 t mcx_calibrate +ffffffff818d6bf0 t mcx_port_change +ffffffff818d6d40 t mcx_kstat_attach +ffffffff818d7110 t mcx_teardown_hca +ffffffff818d7300 t mcx_dmamem_free +ffffffff818d7370 t mcx_set_issi +ffffffff818d7520 t mcx_set_flow_table_entry_mac +ffffffff818d79f0 t mcx_delete_flow_table_entry +ffffffff818d7e70 t mcx_access_hca_reg +ffffffff818d8280 t mcx_cmdq_exec +ffffffff818d8500 t mcx_down +ffffffff818d94c0 t mcx_create_flow_table +ffffffff818d9870 t mcx_create_flow_group +ffffffff818d9d40 t mcx_set_flow_table_root +ffffffff818da0c0 t mcx_create_rqt +ffffffff818da4c0 t mcx_create_tir_direct +ffffffff818da7e0 t mcx_create_tir_indirect +ffffffff818dab20 t mcx_set_flow_table_entry_proto +ffffffff818db000 t mcx_ready_sq +ffffffff818db390 t mcx_ready_rq +ffffffff818db720 t mcx_calibrate_first +ffffffff818db810 t mcx_create_rq +ffffffff818dbd20 t mcx_destroy_sq +ffffffff818dbfd0 t mcx_destroy_cq +ffffffff818dc290 t mcx_destroy_flow_table +ffffffff818dc600 t mcx_kstat_attach_ppcnt +ffffffff818dc730 t mcx_kstat_ppcnt_read +ffffffff818dc850 t mcx_kstat_mtmp_read +ffffffff818dc9e0 t mcx_kstat_queue_read +ffffffff818dd9a0 t mcx_timecounter_read +ffffffff818de000 t iavf_match +ffffffff818de030 t iavf_attach +ffffffff818de8a0 t iavf_reset +ffffffff818deb60 t iavf_dmamem_alloc +ffffffff818decc0 t iavf_arq_fill +ffffffff818def80 t iavf_arq_timeout +ffffffff818defb0 t iavf_init_admin_queue +ffffffff818df160 t iavf_get_version +ffffffff818df360 t iavf_get_vf_resources +ffffffff818df530 t iavf_config_irq_map +ffffffff818df710 t iavf_intr +ffffffff818dfd90 t iavf_ioctl +ffffffff818e02f0 t iavf_start +ffffffff818e0650 t iavf_watchdog +ffffffff818e0680 t iavf_media_change +ffffffff818e06b0 t iavf_media_status +ffffffff818e0740 t iavf_dmamem_free +ffffffff818e07b0 t iavf_arq_unfill +ffffffff818e08b0 t iavf_down +ffffffff818e0c40 t iavf_up +ffffffff818e1610 t iavf_queue_select +ffffffff818e1800 t iavf_txr_free +ffffffff818e1900 t iavf_rxr_free +ffffffff818e1a10 t iavf_rxfill +ffffffff818e1d20 t iavf_rxrefill +ffffffff818e1d40 t iavf_process_arq +ffffffff818e21c0 t iavf_add_del_addr +ffffffff818e3000 T rge_match +ffffffff818e3030 T rge_attach +ffffffff818e34c0 T rge_activate +ffffffff818e3600 T rge_intr +ffffffff818e38f0 T rge_config_imtype +ffffffff818e3960 T rge_chipinit +ffffffff818e3a70 T rge_get_macaddr +ffffffff818e3c40 T rge_allocmem +ffffffff818e4040 T rge_ioctl +ffffffff818e41f0 T rge_start +ffffffff818e43d0 T rge_watchdog +ffffffff818e4410 T rge_wol +ffffffff818e4640 T rge_tick +ffffffff818e46c0 T rge_txstart +ffffffff818e46f0 T rge_ifmedia_upd +ffffffff818e4cc0 T rge_ifmedia_sts +ffffffff818e4db0 T rge_add_media_types +ffffffff818e4e60 T rge_kstat_attach +ffffffff818e5140 T rge_wol_power +ffffffff818e5220 T rge_rxeof +ffffffff818e5660 T rge_txeof +ffffffff818e5870 T rge_init +ffffffff818e6f20 T rge_setup_intr +ffffffff818e7090 T rge_encap +ffffffff818e7360 T rge_stop +ffffffff818e7640 T rge_iff +ffffffff818e77c0 T rge_set_macaddr +ffffffff818e7890 T rge_rx_list_init +ffffffff818e7950 T rge_tx_list_init +ffffffff818e7a20 T rge_phy_config +ffffffff818e86d0 T rge_disable_aspm_clkreq +ffffffff818e87d0 T rge_read_csi +ffffffff818e8880 T rge_write_csi +ffffffff818e8950 T rge_write_mac_ocp +ffffffff818e89a0 T rge_read_mac_ocp +ffffffff818e8a20 T rge_hw_reset +ffffffff818e8b20 T rge_write_phy_ocp +ffffffff818e8be0 T rge_read_phy_ocp +ffffffff818e8c90 T rge_read_phy +ffffffff818e8d60 T rge_write_phy +ffffffff818e8e40 T rge_get_link_status +ffffffff818e8ea0 T rge_newbuf +ffffffff818e9030 T rge_discard_rxbuf +ffffffff818e90a0 T rge_fill_rx_ring +ffffffff818e9120 T rge_reset +ffffffff818e9390 T rge_exit_oob +ffffffff818e9b90 T rge_set_phy_power +ffffffff818e9df0 T rge_hw_init +ffffffff818ea540 T rge_ephy_config +ffffffff818ea590 T rge_ephy_config_mac_cfg3 +ffffffff818ea7e0 T rge_ephy_config_mac_cfg5 +ffffffff818ea8c0 T rge_write_ephy +ffffffff818eab20 T rge_read_ephy +ffffffff818eada0 T rge_phy_config_mac_cfg3 +ffffffff818ec8d0 T rge_phy_config_mac_cfg5 +ffffffff818ed420 T rge_patch_phy_mcu +ffffffff818ed740 T rge_phy_config_mcu +ffffffff818edf40 T rge_switch_mcu_ram_page +ffffffff818edfd0 T rge_disable_phy_ocp_pwrsave +ffffffff818ee1a0 T rge_disable_hw_im +ffffffff818ee1d0 T rge_disable_sim_im +ffffffff818ee230 T rge_setup_sim_im +ffffffff818ee2b0 T rge_link_state +ffffffff818ee330 t rge_kstat_read +ffffffff818ee4d0 t rge_kstat_copy +ffffffff818ef000 T igc_match +ffffffff818ef030 T igc_attach +ffffffff818ef360 T igc_detach +ffffffff818ef550 T igc_identify_hardware +ffffffff818ef5c0 T igc_allocate_pci_resources +ffffffff818ef6e0 T igc_allocate_queues +ffffffff818efbd0 T igc_is_valid_ether_addr +ffffffff818efc30 T igc_allocate_msix +ffffffff818efe70 T igc_setup_interface +ffffffff818f00b0 T igc_reset +ffffffff818f01f0 T igc_update_link_status +ffffffff818f0300 T igc_get_hw_control +ffffffff818f0360 T igc_release_hw_control +ffffffff818f03c0 T igc_free_pci_resources +ffffffff818f04a0 T igc_stop +ffffffff818f07a0 T igc_free_transmit_structures +ffffffff818f0820 T igc_free_receive_structures +ffffffff818f08d0 T igc_setup_msix +ffffffff818f0960 T igc_dma_malloc +ffffffff818f0ac0 T igc_rxrefill +ffffffff818f0b90 T igc_dma_free +ffffffff818f0c40 T igc_init_dmac +ffffffff818f0ee0 T igc_intr_queue +ffffffff818f0ff0 T igc_intr_link +ffffffff818f1170 T igc_ioctl +ffffffff818f1450 T igc_start +ffffffff818f1880 T igc_watchdog +ffffffff818f18b0 T igc_media_change +ffffffff818f19c0 T igc_media_status +ffffffff818f1b60 T igc_init +ffffffff818f2050 T igc_setup_transmit_structures +ffffffff818f2110 T igc_initialize_transmit_unit +ffffffff818f2330 T igc_setup_receive_structures +ffffffff818f2490 T igc_initialize_receive_unit +ffffffff818f2850 T igc_iff +ffffffff818f29a0 T igc_configure_queues +ffffffff818f2bb0 T igc_rxfill +ffffffff818f2cf0 T igc_enable_intr +ffffffff818f2dc0 T igc_tx_ctx_setup +ffffffff818f2ed0 T igc_txeof +ffffffff818f3090 T igc_disable_intr +ffffffff818f3130 T igc_rxrinfo +ffffffff818f3260 T igc_get_buf +ffffffff818f33a0 T igc_rxeof +ffffffff818f3740 T igc_rx_checksum +ffffffff818f3790 T igc_set_queues +ffffffff818f3870 T igc_enable_queue +ffffffff818f38a0 T igc_allocate_transmit_buffers +ffffffff818f39c0 T igc_setup_transmit_ring +ffffffff818f3b00 T igc_free_transmit_buffers +ffffffff818f3c20 T igc_allocate_receive_buffers +ffffffff818f3d50 T igc_setup_receive_ring +ffffffff818f3e10 T igc_initialize_rss_mapping +ffffffff818f4030 T igc_free_receive_buffers +ffffffff818f5000 T igc_init_mac_params +ffffffff818f5040 T igc_init_nvm_params +ffffffff818f5080 T igc_init_phy_params +ffffffff818f50c0 T igc_set_mac_type +ffffffff818f5160 T igc_setup_init_funcs +ffffffff818f52c0 T igc_update_mc_addr_list +ffffffff818f5300 T igc_check_for_link +ffffffff818f5340 T igc_reset_hw +ffffffff818f5380 T igc_init_hw +ffffffff818f53c0 T igc_get_speed_and_duplex +ffffffff818f5400 T igc_rar_set +ffffffff818f5440 T igc_check_reset_block +ffffffff818f5480 T igc_get_phy_info +ffffffff818f54c0 T igc_phy_hw_reset +ffffffff818f5500 T igc_read_mac_addr +ffffffff818f5530 T igc_validate_nvm_checksum +ffffffff818f6000 T igc_acquire_phy_base +ffffffff818f6030 T igc_release_phy_base +ffffffff818f6060 T igc_init_hw_base +ffffffff818f6150 T igc_power_down_phy_copper_base +ffffffff818f7000 T igc_init_nvm_params_i225 +ffffffff818f7170 T igc_acquire_nvm_i225 +ffffffff818f7240 T igc_release_nvm_i225 +ffffffff818f72b0 T igc_get_flash_presence_i225 +ffffffff818f7300 T igc_read_nvm_srrd_i225 +ffffffff818f73e0 T igc_write_nvm_srwr_i225 +ffffffff818f75a0 T igc_validate_nvm_checksum_i225 +ffffffff818f7630 T igc_update_nvm_checksum_i225 +ffffffff818f77c0 T igc_init_mac_params_i225 +ffffffff818f7880 T igc_reset_hw_i225 +ffffffff818f79a0 T igc_init_hw_i225 +ffffffff818f79b0 T igc_check_for_link_i225 +ffffffff818f7a70 T igc_acquire_swfw_sync_i225 +ffffffff818f7b50 T igc_release_swfw_sync_i225 +ffffffff818f7bd0 T igc_setup_copper_link_i225 +ffffffff818f7c60 T igc_init_phy_params_i225 +ffffffff818f7d40 T igc_get_hw_semaphore_i225 +ffffffff818f7ef0 T __igc_write_nvm_srwr +ffffffff818f8020 T igc_update_flash_i225 +ffffffff818f83f0 T igc_set_flsw_flash_burst_counter_i225 +ffffffff818f8450 T igc_write_erase_flash_command_i225 +ffffffff818f8550 T igc_pool_flash_update_done_i225 +ffffffff818f85e0 T igc_set_ltr_i225 +ffffffff818f8850 T igc_init_function_pointers_i225 +ffffffff818f88c0 T igc_set_eee_i225 +ffffffff818f9000 T igc_init_mac_ops_generic +ffffffff818f9050 T igc_null_ops_generic +ffffffff818f9080 T igc_config_collision_dist_generic +ffffffff818f90f0 T igc_rar_set_generic +ffffffff818f91d0 T igc_write_vfta_generic +ffffffff818f9220 T igc_init_rx_addrs_generic +ffffffff818f92c0 T igc_check_alt_mac_addr_generic +ffffffff818f9440 T igc_hash_mc_addr_generic +ffffffff818f94e0 T igc_update_mc_addr_list_generic +ffffffff818f9630 T igc_clear_hw_cntrs_base_generic +ffffffff818f9a20 T igc_setup_link_generic +ffffffff818f9bb0 T igc_set_fc_watermarks_generic +ffffffff818f9c60 T igc_force_mac_fc_generic +ffffffff818f9d20 T igc_config_fc_after_link_up_generic +ffffffff818f9eb0 T igc_get_speed_and_duplex_copper_generic +ffffffff818f9f50 T igc_put_hw_semaphore_generic +ffffffff818f9fa0 T igc_get_auto_rd_done_generic +ffffffff818fa1f0 T igc_disable_pcie_master_generic +ffffffff818fb000 T igc_init_nvm_ops_generic +ffffffff818fb080 T igc_null_read_nvm +ffffffff818fb0b0 T igc_null_nvm_generic +ffffffff818fb0e0 T igc_reload_nvm_generic +ffffffff818fb160 T igc_null_write_nvm +ffffffff818fb190 T igc_poll_eerd_eewr_done +ffffffff818fb230 T igc_read_nvm_eerd +ffffffff818fb360 T igc_read_mac_addr_generic +ffffffff818fb440 T igc_validate_nvm_checksum_generic +ffffffff818fc000 T igc_init_phy_ops_generic +ffffffff818fc0f0 T igc_null_set_page +ffffffff818fc120 T igc_null_read_reg +ffffffff818fc150 T igc_null_phy_generic +ffffffff818fc180 T igc_null_lplu_state +ffffffff818fc1b0 T igc_null_write_reg +ffffffff818fc1e0 T igc_check_reset_block_generic +ffffffff818fc240 T igc_get_phy_id +ffffffff818fc2f0 T igc_read_phy_reg_mdic +ffffffff818fc400 T igc_write_phy_reg_mdic +ffffffff818fc500 T igc_phy_setup_autoneg +ffffffff818fc700 T igc_copper_link_autoneg +ffffffff818fc830 T igc_wait_autoneg +ffffffff818fc8f0 T igc_setup_copper_link_generic +ffffffff818fca00 T igc_phy_has_link_generic +ffffffff818fcb10 T igc_check_downshift_generic +ffffffff818fcb40 T igc_phy_hw_reset_generic +ffffffff818fcce0 T igc_power_up_phy_copper +ffffffff818fcd70 T igc_power_down_phy_copper +ffffffff818fce00 T igc_write_phy_reg_gpy +ffffffff818fd000 T igc_write_xmdio_reg +ffffffff818fd100 T igc_read_phy_reg_gpy +ffffffff818fd300 T igc_read_xmdio_reg +ffffffff818fd3f0 T __igc_access_xmdio_reg +ffffffff818fe000 T ngbe_match +ffffffff818fe030 T ngbe_attach +ffffffff818fe540 T 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drm_connector_attach_scaling_mode_property +ffffffff8192c3e0 T drm_mode_create_aspect_ratio_property +ffffffff8192c460 T drm_mode_create_hdmi_colorspace_property +ffffffff8192c4e0 T drm_mode_create_dp_colorspace_property +ffffffff8192c560 T drm_mode_create_suggested_offset_properties +ffffffff8192c630 T drm_connector_set_path_property +ffffffff8192c690 T drm_connector_set_tile_property +ffffffff8192c7e0 T drm_connector_set_link_status_property +ffffffff8192c830 T drm_connector_attach_max_bpc_property +ffffffff8192c8f0 T drm_connector_attach_hdr_output_metadata_property +ffffffff8192c940 T drm_connector_attach_colorspace_property +ffffffff8192c990 T drm_connector_atomic_hdr_metadata_equal +ffffffff8192ca00 T drm_connector_set_vrr_capable_property +ffffffff8192ca50 T drm_connector_set_panel_orientation +ffffffff8192cb20 T drm_connector_set_panel_orientation_with_quirk +ffffffff8192cc00 T drm_connector_set_orientation_from_panel +ffffffff8192ccf0 T drm_connector_create_privacy_screen_properties +ffffffff8192cd90 T drm_connector_attach_privacy_screen_properties +ffffffff8192ce00 T drm_connector_attach_privacy_screen_provider +ffffffff8192cf10 t drm_connector_privacy_screen_notifier +ffffffff8192cfb0 T drm_connector_update_privacy_screen +ffffffff8192d020 T drm_connector_set_obj_prop +ffffffff8192d100 T drm_connector_property_set_ioctl +ffffffff8192d160 T drm_mode_getconnector +ffffffff8192d660 T drm_connector_find_by_fwnode +ffffffff8192d710 T drm_connector_oob_hotplug_event +ffffffff8192d800 T drm_mode_get_tile_group +ffffffff8192d8d0 T drm_mode_create_tile_group +ffffffff8192d9a0 t drm_connector_free +ffffffff8192d9e0 t kasprintf +ffffffff8192e000 T drm_crtc_from_index +ffffffff8192e060 T drm_crtc_force_disable +ffffffff8192e1a0 T drm_mode_set_config_internal +ffffffff8192e220 T drm_crtc_register_all +ffffffff8192e2a0 T drm_crtc_unregister_all +ffffffff8192e310 T drm_crtc_create_fence +ffffffff8192e3a0 T drm_crtc_init_with_planes +ffffffff8192e470 t __drm_crtc_init_with_planes +ffffffff8192e870 T drmm_crtc_init_with_planes +ffffffff8192e970 T __drmm_crtc_alloc_with_planes +ffffffff8192eae0 T drm_crtc_cleanup +ffffffff8192ec00 T drm_mode_getcrtc +ffffffff8192eda0 t __drm_mode_set_config_internal +ffffffff8192ef50 T drm_crtc_check_viewport +ffffffff8192f000 T drm_mode_setcrtc +ffffffff8192f740 T drm_mode_crtc_set_obj_prop +ffffffff8192f7c0 T drm_crtc_create_scaling_filter_property +ffffffff8192f830 t drm_crtc_fence_get_driver_name +ffffffff8192f8b0 t drm_crtc_fence_get_timeline_name +ffffffff8192f920 t kasprintf +ffffffff8192f9f0 t drmm_crtc_init_with_planes_cleanup +ffffffff81930000 T drm_helper_encoder_in_use +ffffffff81930180 T drm_helper_crtc_in_use +ffffffff819302b0 T drm_helper_disable_unused_functions +ffffffff81930330 t __drm_helper_disable_unused_functions +ffffffff81930450 T drm_crtc_helper_set_mode +ffffffff819308f0 T drm_connector_get_single_encoder +ffffffff819309d0 T drm_crtc_helper_set_config +ffffffff81931610 T drm_helper_connector_dpms +ffffffff819318e0 T drm_helper_resume_force_mode +ffffffff81931be0 T drm_helper_force_disable_all +ffffffff81932000 T drm_atomic_helper_check_plane_damage +ffffffff819320a0 T drm_atomic_helper_dirtyfb +ffffffff81932350 T drm_atomic_helper_damage_iter_init +ffffffff819324a0 T drm_atomic_helper_damage_iter_next +ffffffff81932540 T drm_atomic_helper_damage_merged +ffffffff81933000 T displayid_iter_edid_begin +ffffffff81933050 T __displayid_iter_next +ffffffff81933300 T displayid_iter_end +ffffffff81934000 T drm_mode_create_dumb +ffffffff819340e0 T drm_mode_create_dumb_ioctl +ffffffff819341c0 T drm_mode_mmap_dumb_ioctl +ffffffff81934230 T drm_mode_destroy_dumb +ffffffff819342a0 T drm_mode_destroy_dumb_ioctl +ffffffff81935000 T drm_edid_header_is_valid +ffffffff81935080 T drm_edid_are_equal +ffffffff819350f0 T drm_edid_block_valid +ffffffff81935300 t edid_block_check +ffffffff81935430 t edid_block_status_print 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T drm_match_cea_mode +ffffffff81937270 T drm_display_mode_from_cea_vic +ffffffff819372e0 T drm_edid_get_monitor_name +ffffffff81937380 t get_monitor_name +ffffffff81937870 T drm_edid_to_sad +ffffffff81937a70 T drm_edid_to_speaker_allocation +ffffffff81937c20 T drm_av_sync_delay +ffffffff81937cd0 T drm_detect_hdmi_monitor +ffffffff81937df0 T drm_detect_monitor_audio +ffffffff81937fe0 T drm_default_rgb_quant_range +ffffffff81938020 T drm_edid_connector_update +ffffffff81938080 t _drm_edid_connector_update +ffffffff81939d00 t _drm_update_tile_info +ffffffff81939fa0 t _drm_edid_connector_property_update +ffffffff8193a150 T drm_add_modes_noedid +ffffffff8193a240 T drm_set_preferred_mode +ffffffff8193a2a0 T drm_hdmi_avi_infoframe_from_display_mode +ffffffff8193a520 T drm_hdmi_avi_infoframe_quant_range +ffffffff8193a5c0 T drm_hdmi_vendor_infoframe_from_display_mode +ffffffff8193a680 t connector_bad_edid +ffffffff8193a840 t edid_filter_invalid_blocks +ffffffff8193a9e0 t drm_for_each_detailed_block +ffffffff8193abf0 t __cea_db_iter_next +ffffffff8193ae70 t update_display_info +ffffffff8193bcf0 t get_monitor_range +ffffffff8193bd90 t do_detailed_mode +ffffffff8193c710 t do_cvt_mode +ffffffff8193c950 t drm_mode_std +ffffffff8193cdf0 t do_standard_modes +ffffffff8193cf30 t drm_monitor_supports_rb +ffffffff8193d3d0 t drm_gtf2_hbreak +ffffffff8193d7c0 t drm_gtf2_m +ffffffff8193dbb0 t drm_gtf2_2c +ffffffff8193dfa0 t drm_gtf2_k +ffffffff8193e390 t drm_gtf2_2j +ffffffff8193e780 t do_established_modes +ffffffff8193e980 t drm_match_hdmi_mode +ffffffff8193eb00 t do_inferred_modes +ffffffff8193f060 t mode_in_range +ffffffff81940000 T drm_encoder_register_all +ffffffff81940080 T drm_encoder_unregister_all +ffffffff819400f0 T drm_encoder_init +ffffffff819401c0 t __drm_encoder_init +ffffffff81940380 T drm_encoder_cleanup +ffffffff819404b0 T __drmm_encoder_alloc +ffffffff819405d0 T drmm_encoder_init +ffffffff819406b0 T drm_mode_getencoder +ffffffff81940830 t kasprintf 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drm_fb_helper_set_suspend +ffffffff81942b30 T drm_fb_helper_set_suspend_unlocked +ffffffff81942b60 T drm_fb_helper_set_par +ffffffff81942c50 T drm_fb_helper_pan_display +ffffffff81942d20 T drm_fb_helper_fill_info +ffffffff81942de0 T drm_fb_helper_initial_config +ffffffff81942e10 t __drm_fb_helper_initial_config_and_unlock +ffffffff81943360 T drm_fb_helper_hotplug_event +ffffffff819434d0 t drm_setup_crtcs_fb +ffffffff81943610 T drm_fb_helper_lastclose +ffffffff819436c0 T drm_fb_helper_output_poll_changed +ffffffff819436e0 T drm_fbdev_generic_setup +ffffffff81943860 t drm_fbdev_client_unregister +ffffffff819438d0 t drm_fbdev_client_restore +ffffffff81943970 t drm_fbdev_client_hotplug +ffffffff81943ba0 t drm_fbdev_cleanup +ffffffff81943c60 t drm_fb_helper_generic_probe +ffffffff81944000 T drm_dev_needs_global_mutex +ffffffff81944060 T drm_file_alloc +ffffffff819442c0 T drm_file_free +ffffffff819444f0 T drm_lastclose +ffffffff81944560 T drm_release +ffffffff819445b0 T drm_release_noglobal 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drm_fb_xrgb8888_to_rgb565 +ffffffff81946990 t drm_fb_xrgb8888_to_rgb565_swab_line +ffffffff81946a10 t drm_fb_xrgb8888_to_rgb565_line +ffffffff81946b20 T drm_fb_xrgb8888_to_rgb888 +ffffffff81946b80 t drm_fb_xrgb8888_to_rgb888_line +ffffffff81946c10 T drm_fb_xrgb8888_to_xrgb2101010 +ffffffff81946c70 t drm_fb_xrgb8888_to_xrgb2101010_line +ffffffff81946cf0 T drm_fb_xrgb8888_to_gray8 +ffffffff81946d50 t drm_fb_xrgb8888_to_gray8_line +ffffffff81946dc0 T drm_fb_blit +ffffffff81947260 T drm_fb_xrgb8888_to_mono +ffffffff819475f0 T drm_fb_build_fourcc_list +ffffffff81947910 t drm_fb_rgb888_to_xrgb8888_line +ffffffff819479f0 t drm_fb_rgb565_to_xrgb8888_line +ffffffff81948000 T drm_mode_legacy_fb_format +ffffffff819480f0 T drm_driver_legacy_fb_format +ffffffff819481f0 T __drm_format_info +ffffffff81948270 T drm_format_info +ffffffff81948320 T drm_get_format_info +ffffffff819483f0 T drm_format_info_block_width +ffffffff81948440 T drm_format_info_block_height +ffffffff81948490 T drm_format_info_bpp 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T drm_gem_close_ioctl +ffffffff8194d1f0 T drm_gem_flink_ioctl +ffffffff8194d360 T drm_gem_open_ioctl +ffffffff8194d490 T drm_gem_open +ffffffff8194d4c0 T drm_gem_release +ffffffff8194d500 T drm_gem_object_release +ffffffff8194d650 T drm_gem_lru_remove +ffffffff8194d730 T drm_gem_object_free +ffffffff8194d780 T drm_gem_mmap_obj +ffffffff8194d880 T drm_gem_mmap +ffffffff8194daf0 T drm_gem_print_info +ffffffff8194dc10 T drm_gem_pin +ffffffff8194dc50 T drm_gem_unpin +ffffffff8194dc90 T drm_gem_vmap +ffffffff8194dcf0 T drm_gem_vunmap +ffffffff8194dd60 T drm_gem_lock_reservations +ffffffff8194dfc0 T drm_gem_unlock_reservations +ffffffff8194e0b0 T drm_gem_lru_init +ffffffff8194e0f0 T drm_gem_lru_move_tail +ffffffff8194e1e0 T drm_gem_lru_scan +ffffffff8194e5c0 t __ww_mutex_lock +ffffffff8194f000 T drm_gem_plane_helper_prepare_fb +ffffffff81950000 T drm_gem_fb_destroy +ffffffff819500c0 T drm_gem_fb_create_handle +ffffffff819500e0 T drm_gem_fb_create +ffffffff81951000 T drm_ht_create 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dmi_first_match +ffffffff819541c0 T dmi_get_system_info +ffffffff81954230 T dmi_check_system +ffffffff81954330 T alloc_pages +ffffffff81954400 T __free_pages +ffffffff81954570 T __pagevec_release +ffffffff81954610 T kmap +ffffffff81954650 T kunmap_va +ffffffff81954670 T kmap_atomic_prot +ffffffff81954700 T kunmap_atomic +ffffffff81954780 T vmap +ffffffff81954860 T vunmap +ffffffff819548b0 T is_vmalloc_addr +ffffffff819548f0 T print_hex_dump +ffffffff819549c0 T memchr_inv +ffffffff81954a30 T panic_cmp +ffffffff81954a50 T linux_root_RB_INSERT_COLOR +ffffffff81954c50 T linux_root_RB_REMOVE_COLOR +ffffffff81954f80 T linux_root_RB_REMOVE +ffffffff819550c0 T linux_root_RB_INSERT +ffffffff81955130 T linux_root_RB_FIND +ffffffff81955180 T linux_root_RB_NFIND +ffffffff819551d0 T linux_root_RB_NEXT +ffffffff81955240 T linux_root_RB_PREV +ffffffff819552b0 T linux_root_RB_MINMAX +ffffffff81955300 T idr_init +ffffffff81955330 T idr_destroy +ffffffff81955470 T idr_tree_SPLAY_REMOVE +ffffffff819554f0 T idr_preload +ffffffff81955580 T idr_alloc +ffffffff81955710 T idr_tree_SPLAY_INSERT +ffffffff819557b0 T idr_replace +ffffffff81955830 T idr_remove +ffffffff819558f0 T idr_find +ffffffff81955960 T idr_get_next +ffffffff81955a90 T idr_for_each +ffffffff81955ba0 T idr_cmp +ffffffff81955be0 T idr_tree_SPLAY +ffffffff81955d10 T idr_tree_SPLAY_MINMAX +ffffffff81955e00 T ida_init +ffffffff81955e30 T ida_destroy +ffffffff81955e40 T ida_simple_get +ffffffff81955e60 T ida_simple_remove +ffffffff81955e80 T ida_alloc_min +ffffffff81955ea0 T ida_alloc_max +ffffffff81955ec0 T ida_free +ffffffff81955ee0 T xarray_cmp +ffffffff81955f20 T xarray_tree_SPLAY_INSERT +ffffffff81955fc0 T xarray_tree_SPLAY +ffffffff819560f0 T xarray_tree_SPLAY_REMOVE +ffffffff81956170 T xarray_tree_SPLAY_MINMAX +ffffffff81956260 T xa_init_flags +ffffffff819562e0 T xa_destroy +ffffffff81956420 T __xa_alloc +ffffffff819565a0 T __xa_alloc_cyclic +ffffffff81956600 T __xa_erase +ffffffff819566c0 T __xa_load +ffffffff81956730 T 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drm_mode_config_init_release +ffffffff81961ea0 T drm_mode_config_validate +ffffffff81963000 T __drm_mode_object_add +ffffffff81963100 T drm_mode_object_add +ffffffff819631e0 T drm_mode_object_register +ffffffff81963230 T drm_mode_object_unregister +ffffffff819632d0 T drm_mode_object_lease_required +ffffffff81963320 T __drm_mode_object_find +ffffffff819633d0 T drm_mode_object_find +ffffffff81963480 T drm_mode_object_put +ffffffff81963500 T drm_mode_object_get +ffffffff81963560 T drm_object_attach_property +ffffffff81963670 T drm_object_property_set_value +ffffffff81963750 T drm_object_property_get_value +ffffffff819637e0 t __drm_object_property_get_value +ffffffff819638c0 T drm_object_property_get_default_value +ffffffff81963990 T drm_mode_object_get_properties +ffffffff81963ad0 T drm_mode_obj_get_properties_ioctl +ffffffff81963d20 T drm_mode_obj_find_prop_id +ffffffff81963d80 T drm_mode_obj_set_property_ioctl +ffffffff81965000 T drm_mode_debug_printmodeline +ffffffff81965140 T drm_mode_vrefresh +ffffffff819651e0 T drm_mode_create +ffffffff81965200 T drm_mode_destroy +ffffffff81965240 T drm_mode_probed_add +ffffffff819652e0 T drm_cvt_mode +ffffffff81965760 T drm_mode_set_name +ffffffff819657b0 T drm_gtf_mode_complex +ffffffff81965ab0 T drm_gtf_mode +ffffffff81965b00 T drm_mode_get_hv_timing +ffffffff81965b50 T drm_mode_init +ffffffff81965c20 T drm_mode_set_crtcinfo +ffffffff81965de0 T drm_mode_copy +ffffffff81965e40 T drm_mode_duplicate +ffffffff81965ec0 T drm_mode_match +ffffffff81966060 T drm_mode_equal +ffffffff81966080 T drm_mode_equal_no_clocks +ffffffff819660a0 T drm_mode_equal_no_clocks_no_stereo +ffffffff81966160 T drm_mode_validate_driver +ffffffff81966250 T drm_mode_validate_size +ffffffff819662a0 T drm_mode_validate_ycbcr420 +ffffffff81966310 T drm_mode_is_420_only +ffffffff81966360 T drm_get_mode_status_name +ffffffff819663e0 T drm_mode_prune_invalid +ffffffff81966670 T drm_mode_sort +ffffffff819666a0 t drm_mode_compare +ffffffff81966840 T drm_connector_list_update +ffffffff81966a10 T drm_mode_parse_command_line_for_connector +ffffffff81966a40 T drm_mode_create_from_cmdline_mode +ffffffff81966b30 T drm_mode_convert_to_umode +ffffffff81966cd0 T drm_mode_convert_umode +ffffffff81966ef0 T drm_mode_is_420_also +ffffffff81966f40 T drm_mode_is_420 +ffffffff81967000 T drm_helper_move_panel_connectors_to_head +ffffffff819670f0 T drm_helper_mode_fill_fb_struct +ffffffff819671b0 T drm_crtc_init +ffffffff81967280 T drm_mode_config_helper_suspend +ffffffff81967310 T drm_mode_config_helper_resume +ffffffff81968000 T drm_modeset_lock_all +ffffffff81968290 T drm_modeset_acquire_init +ffffffff81968320 T drm_modeset_lock_all_ctx +ffffffff81968410 T drm_modeset_backoff +ffffffff819684e0 T drm_modeset_acquire_fini +ffffffff81968510 T drm_warn_on_modeset_not_all_locked +ffffffff81968660 T drm_modeset_unlock_all +ffffffff81968750 T drm_modeset_drop_locks +ffffffff819687e0 T drm_modeset_unlock +ffffffff819688b0 t modeset_lock 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create_in_format_blob +ffffffff819705f0 t __setplane_atomic +ffffffff81970790 t __setplane_internal +ffffffff819709a0 t __setplane_check +ffffffff81971000 T drm_plane_helper_update_primary +ffffffff819714b0 t get_connectors_for_crtc +ffffffff819715c0 T drm_plane_helper_disable_primary +ffffffff81971670 T drm_plane_helper_destroy +ffffffff819716a0 T drm_plane_helper_atomic_check +ffffffff81972000 T drm_prime_remove_buf_handle +ffffffff819720a0 T drm_prime_init_file_private +ffffffff81972100 T drm_prime_destroy_file_private +ffffffff81972160 T drm_gem_dmabuf_export +ffffffff819721c0 T drm_gem_dmabuf_release +ffffffff81972200 T drm_gem_prime_fd_to_handle +ffffffff81972420 T drm_gem_prime_import +ffffffff81972480 t drm_prime_add_buf_handle +ffffffff819725c0 T drm_prime_fd_to_handle_ioctl +ffffffff81972610 T drm_gem_prime_handle_to_fd +ffffffff81972840 T drm_prime_handle_to_fd_ioctl +ffffffff819728a0 T drm_gem_map_attach +ffffffff819728c0 T drm_gem_map_detach +ffffffff819728e0 T drm_gem_dmabuf_vmap +ffffffff81972900 T drm_gem_dmabuf_vunmap +ffffffff81972920 T drm_gem_prime_mmap +ffffffff81972970 T drm_prime_pages_to_sg +ffffffff819729c0 T drm_prime_get_contiguous_size +ffffffff81972a10 T drm_gem_prime_export +ffffffff81972aa0 T drm_gem_prime_import_dev +ffffffff81972b00 T drm_prime_sg_to_page_array +ffffffff81972b50 T drm_prime_sg_to_dma_addr_array +ffffffff81972ba0 T drm_prime_gem_destroy +ffffffff81973000 T __drm_puts_coredump +ffffffff819730e0 T __drm_printfn_coredump +ffffffff819732b0 T __drm_puts_seq_file +ffffffff819732e0 T __drm_printfn_seq_file +ffffffff81973310 T __drm_printfn_info +ffffffff81973340 T __drm_printfn_debug +ffffffff81973370 T __drm_printfn_err +ffffffff819733b0 T drm_puts +ffffffff819733e0 T drm_printf +ffffffff81973460 T drm_print_bits +ffffffff81973690 T drm_dev_printk +ffffffff81973730 T __drm_dev_dbg +ffffffff819737c0 T ___drm_dbg +ffffffff81973850 T __drm_err +ffffffff819738e0 T drm_print_regset32 +ffffffff81974000 T drm_crtc_mode_valid +ffffffff81974050 T drm_encoder_mode_valid +ffffffff81974090 T drm_connector_mode_valid +ffffffff81974110 T drm_kms_helper_poll_enable +ffffffff81974200 T drm_helper_probe_detect +ffffffff819743f0 T drm_helper_probe_single_connector_modes +ffffffff81974990 t __drm_helper_update_and_validate +ffffffff81974d40 T drm_kms_helper_hotplug_event +ffffffff81974d80 T drm_kms_helper_connector_hotplug_event +ffffffff81974dc0 T drm_kms_helper_is_poll_worker +ffffffff81974df0 T drm_kms_helper_poll_disable +ffffffff81974e70 T drm_kms_helper_poll_init +ffffffff81974ed0 t output_poll_execute +ffffffff81975120 T drm_kms_helper_poll_fini +ffffffff819751a0 T drm_connector_helper_hpd_irq_event +ffffffff81975260 t check_connector_changed +ffffffff81975430 T drm_helper_hpd_irq_event +ffffffff81975580 T drm_crtc_helper_mode_valid_fixed +ffffffff819755d0 T drm_connector_helper_get_modes_from_ddc +ffffffff81975660 T drm_connector_helper_get_modes_fixed +ffffffff819757d0 T drm_connector_helper_get_modes +ffffffff81975830 t __delayed_work_tick +ffffffff81976000 T drm_property_create +ffffffff819761f0 T drm_property_create_enum +ffffffff819762a0 T drm_property_add_enum +ffffffff819764a0 T drm_property_destroy +ffffffff81976550 T drm_property_create_bitmask +ffffffff81976680 T drm_property_create_range +ffffffff819766f0 T drm_property_create_signed_range +ffffffff81976760 T drm_property_create_object +ffffffff81976800 T drm_property_create_bool +ffffffff81976860 T drm_mode_getproperty_ioctl +ffffffff81976ab0 T drm_property_create_blob +ffffffff81976bf0 t drm_property_free_blob +ffffffff81976c70 T drm_property_blob_put +ffffffff81976cb0 T drm_property_destroy_user_blobs +ffffffff81976d30 T drm_property_blob_get +ffffffff81976d70 T drm_property_lookup_blob +ffffffff81976d90 T drm_property_replace_global_blob +ffffffff81976ee0 T drm_property_replace_blob +ffffffff81976f50 T drm_mode_getblob_ioctl +ffffffff81977010 T drm_mode_createblob_ioctl +ffffffff81977110 T drm_mode_destroyblob_ioctl +ffffffff81977210 T drm_property_change_valid_get +ffffffff81977470 T drm_property_change_valid_put +ffffffff81978000 T drm_rect_intersect +ffffffff81978080 T drm_rect_clip_scaled +ffffffff819782f0 T drm_rect_calc_hscale +ffffffff819783c0 T drm_rect_calc_vscale +ffffffff81978490 T drm_rect_debug_print +ffffffff819785b0 T drm_rect_rotate +ffffffff81978670 T drm_rect_rotate_inv +ffffffff81979000 T drm_self_refresh_helper_update_avg_times +ffffffff81979150 T drm_self_refresh_helper_alter_state +ffffffff819792e0 T drm_self_refresh_helper_init +ffffffff81979470 t drm_self_refresh_helper_entry_work +ffffffff819795d0 T drm_self_refresh_helper_cleanup +ffffffff81979650 t __delayed_work_tick +ffffffff8197a000 T drm_syncobj_find +ffffffff8197a070 T drm_syncobj_add_point +ffffffff8197a160 t syncobj_wait_syncobj_func +ffffffff8197a210 T drm_syncobj_replace_fence +ffffffff8197a2a0 T drm_syncobj_find_fence +ffffffff8197a5f0 t drm_syncobj_fence_add_wait +ffffffff8197a6c0 T drm_syncobj_free +ffffffff8197a750 T drm_syncobj_create +ffffffff8197a8f0 t drm_syncobj_assign_null_handle +ffffffff8197aa00 T drm_syncobj_get_handle +ffffffff8197ab20 T drm_syncobj_get_fd +ffffffff8197ab70 T drm_syncobj_open +ffffffff8197aba0 T drm_syncobj_release +ffffffff8197abe0 t drm_syncobj_release_handle +ffffffff8197ac90 T drm_syncobj_create_ioctl +ffffffff8197adb0 T drm_syncobj_destroy_ioctl +ffffffff8197aed0 T drm_syncobj_handle_to_fd_ioctl +ffffffff8197b0c0 T drm_syncobj_fd_to_handle_ioctl +ffffffff8197b2b0 T drm_syncobj_transfer_ioctl +ffffffff8197b6d0 T drm_timeout_abs_to_jiffies +ffffffff8197b7a0 T drm_syncobj_wait_ioctl +ffffffff8197b920 t drm_syncobj_array_find +ffffffff8197bb50 t drm_syncobj_array_free +ffffffff8197bc30 T drm_syncobj_timeline_wait_ioctl +ffffffff8197bdb0 T drm_syncobj_reset_ioctl +ffffffff8197bf10 T drm_syncobj_signal_ioctl +ffffffff8197c000 T drm_syncobj_timeline_signal_ioctl +ffffffff8197c240 T drm_syncobj_query_ioctl +ffffffff8197c450 t drm_syncobj_array_wait_timeout +ffffffff8197c8b0 t syncobj_wait_fence_func +ffffffff8197d000 T drm_vblank_count +ffffffff8197d090 T drm_crtc_accurate_vblank_count +ffffffff8197d1a0 t drm_update_vblank_count +ffffffff8197d5f0 T drm_vblank_disable_and_save +ffffffff8197d740 T drm_vblank_init +ffffffff8197d8c0 t vblank_disable_fn +ffffffff8197d940 t drm_vblank_init_release +ffffffff8197d9d0 T drm_dev_has_vblank +ffffffff8197da00 T drm_crtc_vblank_waitqueue +ffffffff8197da50 T drm_calc_timestamping_constants +ffffffff8197dc70 T drm_crtc_vblank_helper_get_vblank_timestamp_internal +ffffffff8197e1c0 T drm_crtc_vblank_helper_get_vblank_timestamp +ffffffff8197e1e0 T drm_crtc_vblank_count +ffffffff8197e270 T drm_crtc_vblank_count_and_time +ffffffff8197e330 t drm_vblank_count_and_time +ffffffff8197e3e0 T drm_crtc_arm_vblank_event +ffffffff8197e4c0 T drm_crtc_send_vblank_event +ffffffff8197e670 t send_vblank_event +ffffffff8197e720 T drm_vblank_get +ffffffff8197e820 t drm_vblank_enable +ffffffff8197ea20 T drm_crtc_vblank_get +ffffffff8197eb20 T drm_vblank_put +ffffffff8197ec50 T drm_crtc_vblank_put +ffffffff8197ec70 T drm_wait_one_vblank +ffffffff8197f160 T drm_crtc_wait_one_vblank +ffffffff8197f180 T drm_crtc_vblank_off +ffffffff8197f570 T drm_crtc_vblank_reset +ffffffff8197f6a0 T drm_crtc_set_max_vblank_count +ffffffff8197f780 T drm_crtc_vblank_on +ffffffff8197f8d0 t drm_reset_vblank_timestamp +ffffffff8197fad0 T drm_crtc_vblank_restore +ffffffff8197fec0 T drm_legacy_modeset_ctl_ioctl +ffffffff819800e0 T drm_wait_vblank_ioctl +ffffffff81980630 t drm_wait_vblank_reply +ffffffff81980740 t drm_queue_vblank_event +ffffffff81980a80 T drm_handle_vblank +ffffffff81980d70 t drm_handle_vblank_events +ffffffff81981000 T drm_crtc_handle_vblank +ffffffff81981020 T drm_crtc_get_sequence_ioctl +ffffffff819811f0 T drm_crtc_queue_sequence_ioctl +ffffffff819814b0 t __get_vblank_counter +ffffffff81982000 T drm_handle_vblank_works +ffffffff819821a0 T drm_vblank_cancel_pending_works +ffffffff819822e0 T drm_vblank_work_schedule +ffffffff81982550 T drm_vblank_work_cancel_sync +ffffffff819826a0 T drm_vblank_work_flush +ffffffff819827d0 T drm_vblank_work_init +ffffffff81982840 T drm_vblank_worker_init +ffffffff81983000 T drm_vma_offset_manager_init +ffffffff81983040 T drm_vma_offset_manager_destroy +ffffffff81983060 T drm_vma_offset_lookup_locked +ffffffff819830f0 T drm_vma_offset_add +ffffffff81983180 T drm_vma_offset_remove +ffffffff819831d0 T drm_vma_node_allow +ffffffff819831f0 t vma_node_allow +ffffffff81983310 T drm_vma_node_allow_once +ffffffff81983330 T drm_vma_node_revoke +ffffffff819833b0 T drm_vma_node_is_allowed +ffffffff81984000 T hdmi_avi_infoframe_init +ffffffff81984080 T hdmi_avi_infoframe_check +ffffffff819840d0 T hdmi_avi_infoframe_pack_only +ffffffff819842d0 T hdmi_avi_infoframe_pack +ffffffff81984330 T hdmi_spd_infoframe_init +ffffffff819843f0 T hdmi_spd_infoframe_check +ffffffff81984440 T hdmi_spd_infoframe_pack_only +ffffffff81984580 T hdmi_spd_infoframe_pack +ffffffff819846e0 T hdmi_audio_infoframe_init +ffffffff81984730 T hdmi_audio_infoframe_check +ffffffff81984780 T hdmi_audio_infoframe_pack_only +ffffffff819848e0 T hdmi_audio_infoframe_pack +ffffffff81984930 T hdmi_audio_infoframe_pack_for_dp +ffffffff81984a20 T hdmi_vendor_infoframe_init +ffffffff81984a80 T hdmi_vendor_infoframe_check +ffffffff81984b20 T hdmi_vendor_infoframe_pack_only +ffffffff81984ce0 T hdmi_vendor_infoframe_pack +ffffffff81984d80 T hdmi_drm_infoframe_init +ffffffff81984de0 T hdmi_drm_infoframe_check +ffffffff81984e30 T hdmi_drm_infoframe_pack_only +ffffffff81985020 T hdmi_drm_infoframe_pack +ffffffff81985070 T hdmi_infoframe_check +ffffffff819851c0 T hdmi_infoframe_pack_only +ffffffff819853e0 T hdmi_infoframe_pack +ffffffff81985550 T hdmi_infoframe_log +ffffffff81986440 T hdmi_drm_infoframe_unpack_only +ffffffff81986520 T hdmi_infoframe_unpack +ffffffff81987000 T list_sort +ffffffff81988000 T radix_tree_lookup +ffffffff819880b0 T radix_tree_iter_find +ffffffff81988180 T radix_tree_delete +ffffffff81988310 T radix_tree_iter_delete +ffffffff81988330 T radix_tree_insert +ffffffff81989000 T sort +ffffffff81989040 t qsort +ffffffff8198b000 T drm_dp_dual_mode_read +ffffffff8198b110 T drm_dp_dual_mode_write +ffffffff8198b1f0 T drm_dp_dual_mode_detect +ffffffff8198b490 T drm_dp_dual_mode_max_tmds_clock +ffffffff8198b5b0 T drm_dp_dual_mode_get_tmds_output +ffffffff8198b6d0 T drm_dp_dual_mode_set_tmds_output +ffffffff8198b950 T drm_dp_get_dual_mode_type_name +ffffffff8198b9c0 T drm_lspcon_get_mode +ffffffff8198bbe0 T drm_lspcon_set_mode +ffffffff8198c000 T drm_dp_channel_eq_ok +ffffffff8198c080 T drm_dp_clock_recovery_ok +ffffffff8198c0f0 T drm_dp_get_adjust_request_voltage +ffffffff8198c130 T drm_dp_get_adjust_request_pre_emphasis +ffffffff8198c180 T drm_dp_get_adjust_tx_ffe_preset +ffffffff8198c1c0 T drm_dp_128b132b_lane_channel_eq_done +ffffffff8198c240 T drm_dp_128b132b_lane_symbol_locked +ffffffff8198c2b0 T drm_dp_128b132b_eq_interlane_align_done +ffffffff8198c2e0 T drm_dp_128b132b_cds_interlane_align_done +ffffffff8198c310 T drm_dp_128b132b_link_training_failed +ffffffff8198c340 T drm_dp_read_clock_recovery_delay +ffffffff8198c450 T drm_dp_read_channel_eq_delay +ffffffff8198c550 T drm_dp_128b132b_read_aux_rd_interval +ffffffff8198c600 T drm_dp_link_train_clock_recovery_delay +ffffffff8198c690 t __8b10b_clock_recovery_delay_us +ffffffff8198c710 T drm_dp_link_train_channel_eq_delay +ffffffff8198c780 T drm_dp_phy_name +ffffffff8198c7c0 T drm_dp_lttpr_link_train_clock_recovery_delay +ffffffff8198c7e0 T drm_dp_lttpr_link_train_channel_eq_delay +ffffffff8198c850 T drm_dp_link_rate_to_bw_code +ffffffff8198c8c0 T drm_dp_bw_code_to_link_rate +ffffffff8198c920 T drm_dp_dpcd_probe +ffffffff8198ca60 t drm_dp_dpcd_access +ffffffff8198cb90 T drm_dp_dpcd_read +ffffffff8198ccc0 T drm_dp_dpcd_write +ffffffff8198cdd0 T drm_dp_dpcd_read_link_status +ffffffff8198cdf0 T drm_dp_dpcd_read_phy_link_status +ffffffff8198cef0 T drm_dp_downstream_is_type +ffffffff8198cf40 T drm_dp_downstream_is_tmds +ffffffff8198cfb0 T drm_dp_send_real_edid_checksum +ffffffff8198d200 T drm_dp_read_dpcd_caps +ffffffff8198d390 T drm_dp_read_downstream_info +ffffffff8198d490 T drm_dp_downstream_max_dotclock +ffffffff8198d4e0 T drm_dp_downstream_max_tmds_clock +ffffffff8198d580 T drm_dp_downstream_min_tmds_clock +ffffffff8198d600 T drm_dp_downstream_max_bpc +ffffffff8198d6a0 T drm_dp_downstream_420_passthrough +ffffffff8198d700 T drm_dp_downstream_444_to_420_conversion +ffffffff8198d760 T drm_dp_downstream_rgb_to_ycbcr_conversion +ffffffff8198d7c0 T drm_dp_downstream_mode +ffffffff8198d850 T drm_dp_downstream_id +ffffffff8198d870 T drm_dp_downstream_debug +ffffffff8198d910 T drm_dp_subconnector_type +ffffffff8198d980 T drm_dp_set_subconnector_property +ffffffff8198d9f0 T drm_dp_read_sink_count_cap +ffffffff8198da40 T drm_dp_read_sink_count +ffffffff8198daa0 T drm_dp_remote_aux_init +ffffffff8198dad0 t drm_dp_aux_crc_work +ffffffff8198dc40 T drm_dp_aux_init +ffffffff8198dcf0 T drm_dp_aux_register +ffffffff8198de10 T drm_dp_aux_unregister +ffffffff8198de40 T drm_dp_psr_setup_time +ffffffff8198de90 T drm_dp_start_crc +ffffffff8198df40 T drm_dp_stop_crc +ffffffff8198dfd0 T drm_dp_read_desc +ffffffff8198e190 T drm_dp_dsc_sink_max_slice_count +ffffffff8198e220 T drm_dp_dsc_sink_line_buf_depth +ffffffff8198e260 T drm_dp_dsc_sink_supported_input_bpcs +ffffffff8198e2d0 T drm_dp_read_lttpr_common_caps +ffffffff8198e390 T drm_dp_read_lttpr_phy_caps +ffffffff8198e450 T drm_dp_lttpr_count +ffffffff8198e4e0 T drm_dp_lttpr_max_link_rate +ffffffff8198e540 T drm_dp_lttpr_max_lane_count +ffffffff8198e570 T drm_dp_lttpr_voltage_swing_level_3_supported +ffffffff8198e5a0 T drm_dp_lttpr_pre_emphasis_level_3_supported +ffffffff8198e5d0 T drm_dp_get_phy_test_pattern +ffffffff8198e6f0 T drm_dp_set_phy_test_pattern +ffffffff8198e7b0 T drm_dp_vsc_sdp_log +ffffffff8198ead0 T drm_dp_get_pcon_max_frl_bw +ffffffff8198eb20 T drm_dp_pcon_frl_prepare +ffffffff8198eb70 T drm_dp_pcon_is_frl_ready +ffffffff8198ebd0 T drm_dp_pcon_frl_configure_1 +ffffffff8198ecd0 T drm_dp_pcon_frl_configure_2 +ffffffff8198ed30 T drm_dp_pcon_reset_frl_config +ffffffff8198ed80 T drm_dp_pcon_frl_enable +ffffffff8198ee40 T drm_dp_pcon_hdmi_link_active +ffffffff8198ee90 T drm_dp_pcon_hdmi_link_mode +ffffffff8198ef00 T drm_dp_pcon_hdmi_frl_link_error_count +ffffffff8198eff0 T drm_dp_pcon_enc_is_dsc_1_2 +ffffffff8198f020 T drm_dp_pcon_dsc_max_slices +ffffffff8198f0b0 T drm_dp_pcon_dsc_max_slice_width +ffffffff8198f0e0 T drm_dp_pcon_dsc_bpp_incr +ffffffff8198f120 T drm_dp_pcon_pps_default +ffffffff8198f1a0 T drm_dp_pcon_pps_override_buf +ffffffff8198f240 T drm_dp_pcon_pps_override_param +ffffffff8198f310 T drm_dp_pcon_convert_rgb_to_ycbcr +ffffffff8198f3b0 T drm_edp_backlight_set_level +ffffffff8198f480 T drm_edp_backlight_enable +ffffffff8198f690 t drm_edp_backlight_set_enable +ffffffff8198f7c0 T drm_edp_backlight_disable +ffffffff8198f800 T drm_edp_backlight_init +ffffffff8198fd60 T drm_panel_dp_aux_backlight +ffffffff8198fef0 t __128b132b_channel_eq_delay_us +ffffffff8198ff70 t __8b10b_channel_eq_delay_us +ffffffff8198fff0 t drm_dp_aux_get_crc +ffffffff819900d0 t drm_dp_i2c_xfer +ffffffff81990340 t drm_dp_i2c_functionality +ffffffff81990370 t drm_dp_i2c_do_msg +ffffffff81990740 t lock_bus +ffffffff81990760 t trylock_bus +ffffffff819907b0 t unlock_bus +ffffffff819907d0 t dp_aux_backlight_update_status +ffffffff81991000 T drm_dp_encode_sideband_req +ffffffff81991440 T drm_dp_decode_sideband_req +ffffffff81991970 T drm_dp_dump_sideband_msg_req_body +ffffffff81991d40 T drm_dp_mst_get_port_malloc +ffffffff81991d90 T drm_dp_mst_put_port_malloc +ffffffff81991e80 t kref_put +ffffffff81991ec0 T drm_atomic_get_mst_payload_state +ffffffff81991f10 T drm_dp_mst_dpcd_read +ffffffff819921d0 T drm_dp_mst_dpcd_write +ffffffff81992220 t drm_dp_send_dpcd_write +ffffffff81992460 T drm_dp_mst_connector_late_register +ffffffff819924e0 T drm_dp_mst_connector_early_unregister +ffffffff81992520 T drm_dp_send_power_updown_phy +ffffffff81992760 t drm_dp_mst_topology_put_port +ffffffff81992890 t drm_dp_mst_wait_tx_reply +ffffffff81992c30 T drm_dp_send_query_stream_enc_status +ffffffff81992ef0 T drm_dp_add_payload_part1 +ffffffff819930a0 T drm_dp_remove_payload +ffffffff81993240 T drm_dp_add_payload_part2 +ffffffff819933f0 T drm_dp_get_vc_payload_bw +ffffffff81993490 T drm_dp_read_mst_cap +ffffffff819934f0 T drm_dp_mst_topology_mgr_set_mst +ffffffff819937a0 t drm_dp_dpcd_write_payload +ffffffff81993940 t drm_dp_mst_topology_put_mstb +ffffffff81993a40 T drm_dp_mst_topology_mgr_suspend +ffffffff81993b00 t drm_dp_mst_topology_mgr_invalidate_mstb +ffffffff81993b70 T drm_dp_mst_topology_mgr_resume +ffffffff81993db0 T drm_dp_mst_hpd_irq_handle_event +ffffffff81994d20 T drm_dp_mst_hpd_irq_send_new_request +ffffffff81994da0 T drm_dp_mst_detect_port +ffffffff81994f00 T drm_dp_mst_get_edid +ffffffff81995010 T drm_dp_atomic_find_time_slots +ffffffff819952c0 T drm_atomic_get_mst_topology_state +ffffffff819952d0 T drm_dp_atomic_release_time_slots +ffffffff819954e0 T drm_dp_mst_atomic_setup_commit +ffffffff81995670 T drm_dp_mst_atomic_wait_for_dependencies +ffffffff819957e0 T drm_dp_mst_root_conn_atomic_check +ffffffff81995900 T drm_dp_mst_update_slots +ffffffff81995960 T drm_dp_check_act_status +ffffffff81995af0 T drm_dp_calc_pbn_mode +ffffffff81995b60 T drm_dp_mst_dump_topology +ffffffff81995da0 t drm_dp_mst_dump_mstb +ffffffff81995e10 T drm_dp_mst_add_affected_dsc_crtcs +ffffffff81995f40 T drm_dp_mst_dsc_aux_for_port +ffffffff81996170 T drm_dp_mst_atomic_enable_dsc +ffffffff819962f0 T drm_dp_mst_atomic_check +ffffffff819965e0 t drm_dp_mst_atomic_check_mstb_bw_limit +ffffffff81996860 t drm_dp_mst_duplicate_state +ffffffff81996a30 t drm_dp_mst_destroy_state +ffffffff81996af0 T drm_atomic_get_old_mst_topology_state +ffffffff81996b00 T drm_atomic_get_new_mst_topology_state +ffffffff81996b10 T drm_dp_mst_topology_mgr_init +ffffffff81996d80 t drm_dp_mst_link_probe_work +ffffffff81997010 t drm_dp_tx_work +ffffffff81997060 t drm_dp_delayed_destroy_work +ffffffff81997510 t drm_dp_mst_up_req_work +ffffffff81997a30 T drm_dp_mst_topology_mgr_destroy +ffffffff81997ac0 t drm_dp_mst_is_virtual_dpcd +ffffffff81997ba0 t drm_dp_free_mst_branch_device +ffffffff81997be0 t drm_dp_mst_topology_get_port_validated_locked +ffffffff81997c60 t drm_dp_mst_dump_sideband_msg_tx +ffffffff81997e70 t process_single_down_tx_qlock +ffffffff81997fe0 t process_single_tx_qlock +ffffffff819984b0 t drm_dp_msg_data_crc4 +ffffffff819985e0 t drm_dp_payload_send_msg +ffffffff81998a40 t drm_dp_mst_topology_get_mstb_validated_locked +ffffffff81998ac0 t drm_dp_get_one_sb_msg +ffffffff81999200 t drm_dp_get_mst_branch_device +ffffffff81999360 t drm_dp_check_and_send_link_address +ffffffff81999430 t drm_dp_send_link_address +ffffffff8199a0f0 t drm_dp_send_enum_path_resources +ffffffff8199a350 t drm_dp_port_set_pdt +ffffffff8199a620 t drm_dp_mst_port_add_connector +ffffffff8199a800 t drm_dp_mst_i2c_xfer +ffffffff8199af20 t drm_dp_mst_i2c_functionality +ffffffff8199af50 t get_mst_branch_device_by_guid_helper +ffffffff8199b000 T drm_dsc_dp_pps_header_init +ffffffff8199b030 T drm_dsc_dp_rc_buffer_size +ffffffff8199b090 T drm_dsc_pps_payload_pack +ffffffff8199b340 T drm_dsc_compute_rc_parameters +ffffffff8199c000 T drm_connector_attach_content_protection_property +ffffffff8199c030 T drm_hdcp_check_ksvs_revoked +ffffffff8199c080 T drm_hdcp_update_content_protection +ffffffff8199d000 T drm_hdmi_infoframe_set_hdr_metadata +ffffffff8199d120 T drm_hdmi_avi_infoframe_colorimetry +ffffffff8199d170 T drm_hdmi_avi_infoframe_bars +ffffffff8199d1c0 T drm_hdmi_avi_infoframe_content_type +ffffffff8199e000 T drm_scdc_read +ffffffff8199e090 T drm_scdc_write +ffffffff8199e170 T drm_scdc_get_scrambling_status +ffffffff8199e230 T drm_scdc_set_scrambling +ffffffff8199e380 T drm_scdc_set_high_tmds_clock_ratio +ffffffff8199f000 T drm_gem_ttm_mmap +ffffffff8199f070 T drm_gem_ttm_vmap +ffffffff8199f080 T drm_gem_ttm_vunmap +ffffffff819a0000 T ttm_agp_bind +ffffffff819a0050 T ttm_agp_unbind +ffffffff819a0070 T ttm_agp_is_bound +ffffffff819a00c0 T ttm_agp_destroy +ffffffff819a00e0 T ttm_agp_tt_create +ffffffff819a1000 T ttm_bo_move_to_lru_tail +ffffffff819a1040 T ttm_bo_set_bulk_move +ffffffff819a1100 T ttm_bo_delayed_delete +ffffffff819a13e0 t ttm_bo_cleanup_refs +ffffffff819a1780 T ttm_bo_put +ffffffff819a1d30 T ttm_bo_lock_delayed_workqueue +ffffffff819a1db0 T ttm_bo_unlock_delayed_workqueue +ffffffff819a1e20 T ttm_bo_eviction_valuable +ffffffff819a1e70 T ttm_mem_evict_first +ffffffff819a2580 t ttm_bo_evict_swapout_allowable +ffffffff819a2780 t dma_resv_unlock +ffffffff819a2820 t ttm_bo_unreserve +ffffffff819a2900 T ttm_bo_pin +ffffffff819a29a0 T ttm_bo_unpin +ffffffff819a2ab0 T ttm_bo_mem_space +ffffffff819a2cf0 t ttm_bo_add_move_fence +ffffffff819a2db0 T ttm_bo_validate +ffffffff819a2f40 T ttm_bo_init_reserved +ffffffff819a3160 T ttm_bo_init_validate +ffffffff819a3200 T ttm_bo_unmap_virtual +ffffffff819a3320 T ttm_bo_wait +ffffffff819a33a0 T ttm_bo_swapout +ffffffff819a3670 t ttm_bo_handle_move_mem +ffffffff819a37f0 T ttm_bo_tt_destroy +ffffffff819a4000 T ttm_mem_io_reserve +ffffffff819a4060 T ttm_mem_io_free +ffffffff819a40d0 T ttm_move_memcpy +ffffffff819a4290 T ttm_bo_move_memcpy +ffffffff819a44c0 T ttm_bo_move_sync_cleanup +ffffffff819a45b0 T ttm_io_prot +ffffffff819a45f0 T ttm_bo_kmap +ffffffff819a48a0 T ttm_bo_kunmap +ffffffff819a49e0 T ttm_bo_vmap +ffffffff819a4bd0 T ttm_bo_vunmap +ffffffff819a4cc0 T ttm_bo_move_accel_cleanup +ffffffff819a4f80 T ttm_bo_pipeline_gutting +ffffffff819a5220 t ttm_buffer_object_transfer +ffffffff819a5460 t ttm_transfered_destroy +ffffffff819a6000 T ttm_bo_vm_reserve +ffffffff819a6180 t dma_resv_lock_interruptible +ffffffff819a62a0 T ttm_bo_vm_fault_reserved +ffffffff819a65c0 T ttm_bo_vm_fault +ffffffff819a6720 T ttm_bo_vm_reference +ffffffff819a6750 T ttm_bo_vm_detach +ffffffff819a6760 T ttm_bo_mmap_obj +ffffffff819a7000 T ttm_global_swapout +ffffffff819a70e0 T ttm_device_swapout +ffffffff819a7200 T ttm_device_init +ffffffff819a7450 t ttm_device_delayed_workqueue +ffffffff819a74e0 T ttm_device_fini +ffffffff819a76c0 T ttm_device_clear_dma_mappings +ffffffff819a7770 t ttm_device_clear_lru_dma_mappings +ffffffff819a7820 t __delayed_work_tick +ffffffff819a8000 T ttm_eu_backoff_reservation +ffffffff819a8130 T ttm_eu_reserve_buffers +ffffffff819a85b0 T ttm_eu_fence_buffer_objects +ffffffff819a8700 t __ww_mutex_lock +ffffffff819a9000 T ttm_prot_from_caching +ffffffff819aa000 T ttm_pool_alloc +ffffffff819aaa60 t ttm_pool_free_range +ffffffff819aad20 T ttm_pool_free +ffffffff819aad80 t ttm_pool_shrink +ffffffff819aaf60 T ttm_pool_init +ffffffff819ab210 T ttm_pool_fini +ffffffff819ab3e0 t ttm_pool_type_fini +ffffffff819ab620 T ttm_pool_mgr_init +ffffffff819ab900 t ttm_pool_shrinker_count +ffffffff819ab950 t ttm_pool_shrinker_scan +ffffffff819ab9a0 T ttm_pool_mgr_fini +ffffffff819ac000 T ttm_range_man_init_nocheck +ffffffff819ac180 T ttm_range_man_fini_nocheck +ffffffff819ac310 t ttm_range_man_alloc +ffffffff819ac450 t ttm_range_man_free +ffffffff819ac4b0 t ttm_range_man_intersects +ffffffff819ac510 t ttm_range_man_compatible +ffffffff819ac570 t ttm_range_man_debug +ffffffff819ad000 T ttm_lru_bulk_move_init +ffffffff819ad020 T ttm_lru_bulk_move_tail +ffffffff819ad1e0 T ttm_resource_add_bulk_move +ffffffff819ad2b0 T ttm_resource_del_bulk_move +ffffffff819ad3f0 T ttm_resource_move_to_lru_tail +ffffffff819ad560 T ttm_resource_init +ffffffff819ad660 T ttm_resource_fini +ffffffff819ad6d0 T ttm_resource_alloc +ffffffff819ad820 T ttm_resource_free +ffffffff819ad9e0 T ttm_resource_intersects +ffffffff819ada40 T ttm_resource_compatible +ffffffff819adaa0 T ttm_resource_compat +ffffffff819adc30 T ttm_resource_set_bo +ffffffff819adc80 T ttm_resource_manager_init +ffffffff819add30 T ttm_resource_manager_evict_all +ffffffff819adf00 T ttm_resource_manager_usage +ffffffff819adf60 T ttm_resource_manager_debug +ffffffff819ae050 T ttm_resource_manager_first +ffffffff819ae0e0 T ttm_resource_manager_next +ffffffff819ae200 T ttm_kmap_iter_iomap_init +ffffffff819ae260 T ttm_kmap_iter_linear_io_init +ffffffff819ae430 T ttm_kmap_iter_linear_io_fini +ffffffff819ae480 T ttm_resource_manager_create_debugfs +ffffffff819ae4b0 t ttm_kmap_iter_iomap_map_local +ffffffff819ae5e0 t ttm_kmap_iter_iomap_unmap_local +ffffffff819ae600 t ttm_kmap_iter_linear_io_map_local +ffffffff819af000 T ttm_sys_man_init +ffffffff819af130 t ttm_sys_man_alloc +ffffffff819af1b0 t ttm_sys_man_free +ffffffff819b0000 T ttm_tt_create +ffffffff819b0100 T ttm_tt_destroy +ffffffff819b0120 T ttm_tt_init +ffffffff819b01f0 T ttm_tt_fini +ffffffff819b02d0 T ttm_sg_tt_init +ffffffff819b04f0 T ttm_tt_swapin +ffffffff819b0610 T ttm_tt_swapout +ffffffff819b0660 T ttm_tt_populate +ffffffff819b07d0 T ttm_tt_unpopulate +ffffffff819b0880 T ttm_tt_mgr_init +ffffffff819b08e0 T ttm_kmap_iter_tt_init +ffffffff819b0940 t ttm_kmap_iter_tt_map_local +ffffffff819b09a0 t ttm_kmap_iter_tt_unmap_local +ffffffff819b1000 T drm_sched_entity_init +ffffffff819b1180 T drm_sched_entity_modify_sched +ffffffff819b1200 T drm_sched_entity_is_ready +ffffffff819b1240 T drm_sched_entity_flush +ffffffff819b15a0 T drm_sched_entity_fini +ffffffff819b18c0 T drm_sched_entity_destroy +ffffffff819b1910 T drm_sched_entity_set_priority +ffffffff819b1950 T drm_sched_entity_pop_job +ffffffff819b1b90 T drm_sched_entity_select_rq +ffffffff819b1c70 T drm_sched_entity_push_job +ffffffff819b1d70 t drm_sched_entity_kill_jobs_cb +ffffffff819b1dc0 t drm_sched_entity_kill_jobs_work +ffffffff819b1e30 t drm_sched_entity_clear_dep +ffffffff819b1e50 t drm_sched_entity_wakeup +ffffffff819b2000 T drm_sched_fence_slab_init +ffffffff819b2060 T drm_sched_fence_slab_fini +ffffffff819b2080 T drm_sched_fence_scheduled +ffffffff819b2090 T drm_sched_fence_finished +ffffffff819b20b0 T drm_sched_fence_free +ffffffff819b2150 T to_drm_sched_fence +ffffffff819b21b0 T drm_sched_fence_alloc +ffffffff819b2230 T drm_sched_fence_init +ffffffff819b22b0 t drm_sched_fence_get_driver_name +ffffffff819b22e0 t drm_sched_fence_get_timeline_name +ffffffff819b2340 t drm_sched_fence_release_scheduled +ffffffff819b2430 t drm_sched_fence_release_finished +ffffffff819b3000 T drm_sched_rq_add_entity +ffffffff819b3090 T drm_sched_rq_remove_entity +ffffffff819b3130 T drm_sched_dependency_optimized +ffffffff819b31d0 T drm_sched_fault +ffffffff819b3200 T drm_sched_suspend_timeout +ffffffff819b3280 T drm_sched_resume_timeout +ffffffff819b3320 T drm_sched_increase_karma +ffffffff819b3340 T drm_sched_increase_karma_ext +ffffffff819b3490 T drm_sched_reset_karma +ffffffff819b34b0 T drm_sched_stop +ffffffff819b3680 T drm_sched_start +ffffffff819b3790 t drm_sched_job_done_cb +ffffffff819b37b0 t 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intel_ddi_toggle_hdcp_bits +ffffffff819f6c30 T intel_ddi_connector_get_hw_state +ffffffff819f6d80 T intel_ddi_get_hw_state +ffffffff819f6df0 t intel_ddi_get_encoder_pipes +ffffffff819f7240 T intel_ddi_enable_pipe_clock +ffffffff819f7300 T intel_ddi_disable_pipe_clock +ffffffff819f7370 T intel_ddi_level +ffffffff819f7550 T icl_ddi_combo_get_pll +ffffffff819f75d0 T hsw_ddi_enable_clock +ffffffff819f7690 T hsw_ddi_disable_clock +ffffffff819f76d0 T hsw_ddi_is_clock_enabled +ffffffff819f7730 T intel_ddi_enable_clock +ffffffff819f7770 T intel_ddi_disable_clock +ffffffff819f77b0 T intel_ddi_sanitize_encoder_pll_mapping +ffffffff819f7990 T dp_tp_ctl_reg +ffffffff819f7a10 T dp_tp_status_reg +ffffffff819f7a90 T intel_ddi_update_pipe +ffffffff819f7b20 T intel_ddi_compute_min_voltage_level +ffffffff819f7b90 T intel_ddi_get_clock +ffffffff819f7ca0 T hsw_ddi_get_config +ffffffff819f7d90 t intel_ddi_get_config +ffffffff819f85d0 T intel_ddi_init +ffffffff819f9160 t intel_ddi_hotplug +ffffffff819f9560 t intel_ddi_compute_output_type +ffffffff819f95e0 t intel_ddi_compute_config +ffffffff819f9730 t intel_ddi_compute_config_late +ffffffff819f99f0 t intel_enable_ddi +ffffffff819fa1f0 t intel_ddi_pre_pll_enable +ffffffff819fa390 t intel_ddi_pre_enable +ffffffff819fb020 t intel_disable_ddi +ffffffff819fb1a0 t intel_ddi_post_disable +ffffffff819fb6a0 t intel_ddi_sync_state +ffffffff819fb750 t intel_ddi_initial_fastset_check +ffffffff819fb810 t intel_ddi_encoder_suspend +ffffffff819fb8c0 t intel_ddi_encoder_shutdown +ffffffff819fb980 t intel_ddi_get_power_domains +ffffffff819fbb30 t dg2_ddi_get_config +ffffffff819fbb80 t adls_ddi_enable_clock +ffffffff819fbd10 t adls_ddi_disable_clock +ffffffff819fbdd0 t adls_ddi_is_clock_enabled +ffffffff819fbe70 t adls_ddi_get_config +ffffffff819fbf30 t rkl_ddi_enable_clock +ffffffff819fc0b0 t rkl_ddi_disable_clock +ffffffff819fc150 t rkl_ddi_is_clock_enabled +ffffffff819fc1d0 t rkl_ddi_get_config +ffffffff819fc2a0 t dg1_ddi_enable_clock +ffffffff819fc450 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hsw_set_signal_levels +ffffffff819fef60 t intel_ddi_update_prepare +ffffffff819ff0e0 t intel_ddi_update_complete +ffffffff819ff120 t lpt_digital_port_connected +ffffffff819ff190 t bdw_digital_port_connected +ffffffff819ff200 t hsw_digital_port_connected +ffffffff819ff270 t intel_ddi_encoder_reset +ffffffff819ff350 t intel_ddi_encoder_destroy +ffffffff819ff400 t icl_program_mg_dp_mode +ffffffff819ff6c0 t intel_ddi_init_dp_buf_reg +ffffffff819ff870 t intel_disable_ddi_buf +ffffffff819ffb80 t intel_ddi_prepare_link_retrain +ffffffff81a00220 t intel_ddi_set_link_train +ffffffff81a00380 t intel_ddi_set_idle_link_train +ffffffff81a005a0 t intel_ddi_dp_voltage_max +ffffffff81a00660 t intel_ddi_dp_preemph_max +ffffffff81a01000 T is_hobl_buf_trans +ffffffff81a01040 T intel_ddi_buf_trans_init +ffffffff81a012f0 t dg2_get_snps_buf_trans +ffffffff81a01360 t adlp_get_combo_buf_trans +ffffffff81a01480 t adlp_get_dkl_buf_trans +ffffffff81a014e0 t adls_get_combo_buf_trans +ffffffff81a01600 t rkl_get_combo_buf_trans +ffffffff81a01720 t dg1_get_combo_buf_trans +ffffffff81a01840 t tgl_get_combo_buf_trans +ffffffff81a01980 t tgl_get_dkl_buf_trans +ffffffff81a019e0 t jsl_get_combo_buf_trans +ffffffff81a01a80 t ehl_get_combo_buf_trans +ffffffff81a01b20 t icl_get_combo_buf_trans +ffffffff81a01bd0 t icl_get_mg_buf_trans +ffffffff81a01c30 t bxt_get_buf_trans +ffffffff81a01cb0 t kbl_y_get_buf_trans +ffffffff81a01d50 t kbl_u_get_buf_trans +ffffffff81a01df0 t kbl_get_buf_trans +ffffffff81a01e90 t skl_y_get_buf_trans +ffffffff81a01f30 t skl_u_get_buf_trans +ffffffff81a01fd0 t skl_get_buf_trans +ffffffff81a02070 t bdw_get_buf_trans +ffffffff81a02100 t hsw_get_buf_trans +ffffffff81a03000 T intel_update_watermarks +ffffffff81a03040 T vlv_get_hpll_vco +ffffffff81a03090 T vlv_get_cck_clock +ffffffff81a03140 T vlv_get_cck_clock_hpll +ffffffff81a03240 T is_trans_port_sync_mode +ffffffff81a03280 T intel_crtc_bigjoiner_slave_pipes +ffffffff81a032e0 T intel_crtc_is_bigjoiner_slave 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intel_get_crtc_new_encoder +ffffffff81a04b60 T ilk_pfit_disable +ffffffff81a04c20 T intel_phy_is_combo +ffffffff81a04c90 T intel_phy_is_tc +ffffffff81a04d00 T intel_phy_is_snps +ffffffff81a04d50 T intel_port_to_phy +ffffffff81a04e00 T intel_port_to_tc +ffffffff81a04f10 T intel_aux_power_domain +ffffffff81a04f50 T intel_modeset_get_crtc_power_domains +ffffffff81a05170 T intel_modeset_put_crtc_power_domains +ffffffff81a051a0 T intel_display_suspend +ffffffff81a05240 T intel_encoder_destroy +ffffffff81a05270 T intel_encoder_get_config +ffffffff81a052a0 t intel_crtc_readout_derived_state +ffffffff81a056e0 T intel_link_compute_m_n +ffffffff81a05810 T intel_zero_m_n +ffffffff81a05850 T intel_set_m_n +ffffffff81a05910 T intel_cpu_transcoder_has_m2_n2 +ffffffff81a05970 T intel_cpu_transcoder_set_m1_n1 +ffffffff81a05b30 T intel_cpu_transcoder_set_m2_n2 +ffffffff81a05c90 T i9xx_set_pipeconf +ffffffff81a05e40 T ilk_set_pipeconf +ffffffff81a06010 T bdw_get_pipemisc_bpp +ffffffff81a060f0 T ilk_get_lanes_required +ffffffff81a06150 T intel_get_m_n +ffffffff81a06260 T intel_cpu_transcoder_get_m1_n1 +ffffffff81a06400 T intel_cpu_transcoder_get_m2_n2 +ffffffff81a06570 T intel_crtc_get_pipe_config +ffffffff81a065e0 T intel_get_load_detect_pipe +ffffffff81a06950 t intel_modeset_disable_planes +ffffffff81a06a10 T intel_release_load_detect_pipe +ffffffff81a06ae0 T i9xx_crtc_clock_get +ffffffff81a06d70 T intel_dotclock_calculate +ffffffff81a06dd0 T intel_crtc_dotclock +ffffffff81a06ea0 T intel_encoder_current_mode +ffffffff81a07050 T intel_fuzzy_clock_check +ffffffff81a070a0 T intel_pipe_config_compare +ffffffff81a09b40 t pipe_config_mismatch +ffffffff81a09c30 t pipe_config_infoframe_mismatch +ffffffff81a09dd0 T intel_modeset_all_pipes +ffffffff81a09f80 T intel_atomic_add_affected_planes +ffffffff81a0a050 T intel_crtc_update_active_timings +ffffffff81a0a150 T intel_calc_active_pipes +ffffffff81a0a1e0 T intel_crtc_arm_fifo_underrun +ffffffff81a0a280 T intel_plane_destroy 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intel_modeset_checks +ffffffff81a15740 t intel_atomic_check_crtcs +ffffffff81a15bf0 t intel_async_flip_check_hw +ffffffff81a16050 t intel_crtc_copy_uapi_to_hw_state_modeset +ffffffff81a161b0 t intel_atomic_commit_ready +ffffffff81a16240 t intel_atomic_commit_work +ffffffff81a16260 t intel_atomic_commit_tail +ffffffff81a17610 t intel_atomic_cleanup_work +ffffffff81a17730 t intel_ddi_crt_present +ffffffff81a17800 t ilk_has_edp_a +ffffffff81a18000 T intel_display_power_domain_str +ffffffff81a18060 T __intel_display_power_is_enabled +ffffffff81a18120 T intel_display_power_is_enabled +ffffffff81a18240 T intel_display_power_set_target_dc_state +ffffffff81a18360 T intel_display_power_get +ffffffff81a183e0 t __intel_display_power_get_domain +ffffffff81a185c0 T intel_display_power_get_if_enabled +ffffffff81a186f0 T __intel_display_power_put_async +ffffffff81a188b0 t __intel_display_power_put_domain +ffffffff81a18a20 T intel_display_power_flush_work +ffffffff81a18b40 t release_async_put_domains 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icl_display_core_uninit +ffffffff81a1ace0 t bxt_display_core_uninit +ffffffff81a1ad90 T intel_power_domains_resume +ffffffff81a1ae60 T intel_display_power_suspend_late +ffffffff81a1af50 t hsw_enable_pc8 +ffffffff81a1b8d0 T intel_display_power_resume_early +ffffffff81a1b9c0 t hsw_disable_pc8 +ffffffff81a1be20 T intel_display_power_suspend +ffffffff81a1bea0 T intel_display_power_resume +ffffffff81a1bf80 T intel_display_power_debug +ffffffff81a1c040 T intel_display_power_ddi_io_domain +ffffffff81a1c120 T intel_display_power_ddi_lanes_domain +ffffffff81a1c200 T intel_display_power_legacy_aux_domain +ffffffff81a1c310 T intel_display_power_tbt_aux_domain +ffffffff81a1c420 t __delayed_work_tick +ffffffff81a1d000 T intel_display_power_map_init +ffffffff81a1d170 t __set_power_wells +ffffffff81a1d550 T intel_display_power_map_cleanup +ffffffff81a1e000 T lookup_power_well +ffffffff81a1e0c0 T intel_power_well_enable +ffffffff81a1e150 T intel_power_well_name +ffffffff81a1e190 T intel_power_well_disable +ffffffff81a1e200 T intel_power_well_sync_hw +ffffffff81a1e270 T intel_power_well_get +ffffffff81a1e310 T intel_power_well_put +ffffffff81a1e410 T intel_power_well_is_enabled +ffffffff81a1e430 T intel_power_well_is_enabled_cached +ffffffff81a1e460 T intel_display_power_well_is_enabled +ffffffff81a1e510 T intel_power_well_is_always_on +ffffffff81a1e550 T intel_power_well_domains +ffffffff81a1e580 T intel_power_well_refcount +ffffffff81a1e5b0 T gen9_sanitize_dc_state +ffffffff81a1e680 T gen9_set_dc_state +ffffffff81a1e9e0 T gen9_enable_dc5 +ffffffff81a1ec40 T skl_enable_dc6 +ffffffff81a1ed90 T bxt_enable_dc9 +ffffffff81a1ef40 T bxt_disable_dc9 +ffffffff81a1f030 T gen9_disable_dc_states +ffffffff81a1f400 T chv_phy_powergate_ch +ffffffff81a1f510 t assert_chv_phy_status +ffffffff81a1f8c0 T chv_phy_powergate_lanes +ffffffff81a1fb70 t i9xx_power_well_sync_hw_noop +ffffffff81a1fba0 t i9xx_always_on_power_well_noop +ffffffff81a1fbd0 t i9xx_always_on_power_well_enabled +ffffffff81a1fc00 t chv_pipe_power_well_sync_hw +ffffffff81a1fc30 t chv_pipe_power_well_enable +ffffffff81a1fc60 t chv_pipe_power_well_disable +ffffffff81a1fcc0 t chv_pipe_power_well_enabled +ffffffff81a1fdc0 t chv_dpio_cmn_power_well_enable +ffffffff81a1ffd0 t chv_dpio_cmn_power_well_disable +ffffffff81a20100 t vlv_power_well_enabled +ffffffff81a20220 t i830_pipes_power_well_sync_hw +ffffffff81a20310 t i830_pipes_power_well_enable +ffffffff81a203d0 t i830_pipes_power_well_disable +ffffffff81a20400 t i830_pipes_power_well_enabled +ffffffff81a204a0 t hsw_power_well_sync_hw +ffffffff81a20590 t hsw_power_well_enable +ffffffff81a20810 t hsw_power_well_disable +ffffffff81a208c0 t hsw_power_well_enabled +ffffffff81a209a0 t gen9_dc_off_power_well_enable +ffffffff81a209b0 t gen9_dc_off_power_well_disable +ffffffff81a20a50 t gen9_dc_off_power_well_enabled +ffffffff81a20ae0 t bxt_dpio_cmn_power_well_enable +ffffffff81a20b10 t bxt_dpio_cmn_power_well_disable +ffffffff81a20b40 t bxt_dpio_cmn_power_well_enabled +ffffffff81a20b70 t vlv_display_power_well_enable +ffffffff81a20ba0 t vlv_display_power_well_disable +ffffffff81a20c10 t vlv_dpio_cmn_power_well_enable +ffffffff81a20c90 t vlv_dpio_cmn_power_well_disable +ffffffff81a20d90 t vlv_power_well_enable +ffffffff81a20db0 t vlv_power_well_disable +ffffffff81a20dd0 t icl_aux_power_well_enable +ffffffff81a21420 t icl_aux_power_well_disable +ffffffff81a21690 t tgl_tc_cold_off_power_well_sync_hw +ffffffff81a216b0 t tgl_tc_cold_off_power_well_enable +ffffffff81a216d0 t tgl_tc_cold_off_power_well_disable +ffffffff81a216f0 t tgl_tc_cold_off_power_well_is_enabled +ffffffff81a21720 t xelpdp_aux_power_well_enable +ffffffff81a21800 t xelpdp_aux_power_well_disable +ffffffff81a218e0 t xelpdp_aux_power_well_enabled +ffffffff81a21990 t chv_set_pipe_power_well +ffffffff81a21b90 t vlv_display_power_well_init +ffffffff81a21e20 t vlv_set_power_well +ffffffff81a22040 t hsw_wait_for_power_well_enable +ffffffff81a22180 t hsw_wait_for_power_well_disable +ffffffff81a22450 t tgl_tc_cold_request +ffffffff81a23000 T intel_dkl_phy_read +ffffffff81a23100 T intel_dkl_phy_write +ffffffff81a231e0 T intel_dkl_phy_rmw +ffffffff81a232f0 T intel_dkl_phy_posting_read +ffffffff81a24000 T intel_dmc_has_payload +ffffffff81a24040 T intel_dmc_load_program +ffffffff81a24850 t pipedmc_clock_gating_wa +ffffffff81a24a40 T intel_dmc_disable_program +ffffffff81a24c60 T assert_dmc_loaded +ffffffff81a24db0 T intel_dmc_ucode_init +ffffffff81a25080 t dmc_load_work_fn +ffffffff81a258d0 T intel_dmc_ucode_suspend +ffffffff81a25940 T intel_dmc_ucode_resume +ffffffff81a259e0 T intel_dmc_ucode_fini +ffffffff81a25b10 T intel_dmc_print_error_state +ffffffff81a25bc0 T intel_dmc_debugfs_register +ffffffff81a26000 T intel_dp_is_edp +ffffffff81a26030 T intel_dp_is_uhbr +ffffffff81a26070 T intel_dp_max_lane_count +ffffffff81a260e0 T intel_dp_link_required +ffffffff81a26120 T intel_dp_max_data_rate +ffffffff81a26180 T intel_dp_can_bigjoiner +ffffffff81a261d0 T intel_dp_get_link_train_fallback_values +ffffffff81a26580 T intel_dp_mode_to_fec_clock +ffffffff81a265d0 T intel_dp_min_bpp +ffffffff81a26610 T intel_dp_source_supports_tps3 +ffffffff81a26660 T intel_dp_source_supports_tps4 +ffffffff81a26690 T intel_dp_max_link_rate +ffffffff81a26740 T intel_dp_rate_select +ffffffff81a267e0 T intel_dp_compute_rate +ffffffff81a268b0 T intel_dp_adjust_compliance_config +ffffffff81a269f0 T intel_dp_limited_color_range +ffffffff81a26a60 T intel_dp_compute_psr_vsc_sdp +ffffffff81a26ae0 T intel_dp_needs_vsc_sdp +ffffffff81a26b30 t intel_dp_compute_vsc_colorimetry +ffffffff81a26cb0 T intel_dp_compute_config +ffffffff81a270f0 t intel_dp_compute_output_format +ffffffff81a27320 t intel_dp_drrs_compute_config +ffffffff81a274c0 t intel_dp_compute_vsc_sdp +ffffffff81a27560 t intel_dp_compute_hdr_metadata_infoframe_sdp +ffffffff81a275f0 T intel_dp_set_link_params +ffffffff81a27630 T intel_edp_backlight_on +ffffffff81a276d0 T intel_edp_backlight_off +ffffffff81a27760 T intel_dp_sink_set_decompression_state +ffffffff81a27800 T intel_dp_wait_source_oui +ffffffff81a278c0 T intel_dp_set_power +ffffffff81a27ae0 T intel_dp_sync_state +ffffffff81a27b60 t intel_dp_get_dpcd +ffffffff81a27cc0 t intel_dp_reset_max_link_params +ffffffff81a27dc0 T intel_dp_initial_fastset_check +ffffffff81a27ea0 T intel_dp_check_frl_training +ffffffff81a28450 T intel_dp_pcon_dsc_configure +ffffffff81a28640 T intel_dp_configure_protocol_converter +ffffffff81a287b0 T intel_dp_get_colorimetry_status +ffffffff81a28810 T intel_edp_fixup_vbt_bpp +ffffffff81a288a0 T intel_write_dp_vsc_sdp +ffffffff81a28a40 T intel_dp_set_infoframes +ffffffff81a28b70 t intel_write_dp_sdp +ffffffff81a28e50 T intel_read_dp_sdp +ffffffff81a29170 T intel_dp_retrain_link +ffffffff81a295d0 T intel_dp_phy_test +ffffffff81a29c90 T intel_digital_port_connected +ffffffff81a29d40 T intel_dp_encoder_flush_work +ffffffff81a29d90 T intel_dp_encoder_suspend +ffffffff81a29dd0 T intel_dp_encoder_shutdown +ffffffff81a29e10 T intel_dp_hpd_pulse +ffffffff81a2a480 T intel_dp_is_port_edp +ffffffff81a2a4e0 T intel_dp_init_connector +ffffffff81a2b5b0 t intel_dp_modeset_retry_work_fn +ffffffff81a2b650 t intel_dp_set_common_rates +ffffffff81a2b7d0 T intel_dp_mst_suspend +ffffffff81a2b870 T intel_dp_mst_resume +ffffffff81a2b920 t intel_dp_compute_link_config +ffffffff81a2c690 t intel_dp_dsc_compute_bpp +ffffffff81a2c740 t intel_dp_dsc_get_output_bpp +ffffffff81a2c880 t intel_dp_dsc_get_slice_count +ffffffff81a2c9e0 t intel_dp_set_sink_rates +ffffffff81a2cc10 t intel_dp_needs_link_retrain +ffffffff81a2cd90 t intel_dp_check_device_service_irq +ffffffff81a2d360 t intel_dp_force +ffffffff81a2d4a0 t intel_dp_connector_register +ffffffff81a2d580 t intel_dp_connector_unregister +ffffffff81a2d5e0 t intel_dp_oob_hotplug_event +ffffffff81a2d660 t intel_dp_set_edid +ffffffff81a2da90 t intel_dp_get_modes +ffffffff81a2db90 t intel_dp_detect +ffffffff81a2e460 t intel_dp_mode_valid +ffffffff81a2e8c0 t intel_dp_connector_atomic_check +ffffffff81a2ec30 t intel_dp_get_dsc_sink_cap +ffffffff81a2eda0 t intel_dp_mode_valid_downstream +ffffffff81a2efe0 t icl_max_source_rate +ffffffff81a30000 T intel_dp_aux_fini +ffffffff81a30020 T intel_dp_aux_init +ffffffff81a30220 t xelpdp_aux_ctl_reg +ffffffff81a302e0 t xelpdp_aux_data_reg +ffffffff81a303b0 t tgl_aux_ctl_reg +ffffffff81a30430 t tgl_aux_data_reg +ffffffff81a304c0 t skl_aux_ctl_reg +ffffffff81a30540 t skl_aux_data_reg +ffffffff81a305d0 t ilk_aux_ctl_reg +ffffffff81a30650 t ilk_aux_data_reg +ffffffff81a306e0 t g4x_aux_ctl_reg +ffffffff81a30760 t g4x_aux_data_reg +ffffffff81a307f0 t skl_get_aux_clock_divider +ffffffff81a30820 t hsw_get_aux_clock_divider +ffffffff81a308b0 t ilk_get_aux_clock_divider +ffffffff81a30910 t g4x_get_aux_clock_divider +ffffffff81a30960 t skl_get_aux_send_ctl +ffffffff81a309e0 t g4x_get_aux_send_ctl +ffffffff81a30a30 t kasprintf +ffffffff81a30b00 t intel_dp_aux_transfer +ffffffff81a30d90 t intel_dp_aux_xfer +ffffffff81a32000 T intel_dp_aux_init_backlight_funcs +ffffffff81a32220 t intel_dp_aux_hdr_setup_backlight +ffffffff81a32370 t intel_dp_aux_hdr_get_backlight +ffffffff81a324e0 t intel_dp_aux_hdr_set_backlight +ffffffff81a325d0 t intel_dp_aux_hdr_disable_backlight +ffffffff81a32650 t intel_dp_aux_hdr_enable_backlight +ffffffff81a32870 t intel_dp_aux_vesa_setup_backlight +ffffffff81a32a20 t intel_dp_aux_vesa_get_backlight +ffffffff81a32a50 t intel_dp_aux_vesa_set_backlight +ffffffff81a32af0 t intel_dp_aux_vesa_disable_backlight +ffffffff81a32ba0 t intel_dp_aux_vesa_enable_backlight +ffffffff81a33000 T intel_dp_hdcp_init +ffffffff81a330b0 t intel_dp_hdcp_write_an_aksv +ffffffff81a331a0 t intel_dp_hdcp_read_bksv +ffffffff81a33230 t intel_dp_hdcp_read_bstatus +ffffffff81a332c0 t intel_dp_hdcp_repeater_present +ffffffff81a33370 t intel_dp_hdcp_read_ri_prime +ffffffff81a33400 t intel_dp_hdcp_read_ksv_ready +ffffffff81a334a0 t intel_dp_hdcp_read_ksv_fifo +ffffffff81a33590 t intel_dp_hdcp_read_v_prime_part +ffffffff81a33630 t intel_dp_hdcp_toggle_signalling +ffffffff81a33660 t intel_dp_mst_hdcp_stream_encryption +ffffffff81a33850 t intel_dp_hdcp_check_link +ffffffff81a338e0 t intel_dp_hdcp_capable +ffffffff81a33990 t intel_dp_hdcp2_capable +ffffffff81a33a10 t intel_dp_hdcp2_write_msg +ffffffff81a33bc0 t intel_dp_hdcp2_read_msg +ffffffff81a34290 t intel_dp_hdcp2_config_stream_type +ffffffff81a342f0 t intel_dp_mst_hdcp2_stream_encryption +ffffffff81a34550 t intel_dp_mst_hdcp2_check_link +ffffffff81a34610 t intel_dp_hdcp2_check_link +ffffffff81a35000 T intel_dp_init_lttpr_and_dprx_caps +ffffffff81a350d0 t intel_dp_init_lttpr +ffffffff81a35310 T intel_dp_get_adjust_train +ffffffff81a359e0 T intel_dp_program_link_training_pattern +ffffffff81a35ae0 T intel_dp_set_signal_levels +ffffffff81a35e50 T intel_dp_dump_link_status +ffffffff81a35f20 T intel_dp_stop_link_train +ffffffff81a36150 T intel_dp_start_link_train +ffffffff81a37200 t intel_dp_link_train_phy +ffffffff81a39000 T intel_dp_mst_encoder_active_links +ffffffff81a39030 T intel_dp_mst_encoder_init +ffffffff81a39270 T intel_dp_mst_source_support +ffffffff81a392b0 T intel_dp_mst_encoder_cleanup +ffffffff81a39310 T intel_dp_mst_is_master_trans +ffffffff81a39350 T intel_dp_mst_is_slave_trans +ffffffff81a39390 T intel_dp_mst_add_topology_state_for_crtc +ffffffff81a39450 t intel_dp_add_mst_connector +ffffffff81a39660 t intel_dp_mst_poll_hpd_irq +ffffffff81a39680 t intel_dp_mst_get_hw_state +ffffffff81a396e0 t intel_dp_mst_connector_late_register +ffffffff81a39750 t intel_dp_mst_connector_early_unregister +ffffffff81a39780 t intel_dp_mst_get_modes +ffffffff81a39820 t intel_dp_mst_detect +ffffffff81a39920 t intel_dp_mst_mode_valid_ctx +ffffffff81a39ac0 t intel_mst_atomic_best_encoder +ffffffff81a39b20 t intel_dp_mst_atomic_check +ffffffff81a39c90 t intel_dp_mst_compute_config +ffffffff81a39fa0 t intel_dp_mst_compute_config_late +ffffffff81a3a090 t intel_mst_disable_dp +ffffffff81a3a170 t intel_mst_post_disable_dp +ffffffff81a3a420 t intel_mst_pre_pll_enable_dp +ffffffff81a3a470 t intel_mst_pre_enable_dp +ffffffff81a3a690 t intel_mst_enable_dp +ffffffff81a3aa70 t intel_dp_mst_enc_get_hw_state +ffffffff81a3aab0 t intel_dp_mst_enc_get_config +ffffffff81a3aad0 t intel_dp_mst_initial_fastset_check +ffffffff81a3aaf0 t intel_dp_mst_encoder_destroy +ffffffff81a3b000 T bxt_port_to_phy_channel +ffffffff81a3b110 T bxt_ddi_phy_set_signal_levels +ffffffff81a3b630 T bxt_ddi_phy_is_enabled +ffffffff81a3b780 T bxt_ddi_phy_uninit +ffffffff81a3b880 T bxt_ddi_phy_init +ffffffff81a3baa0 t _bxt_ddi_phy_init +ffffffff81a3c0a0 T bxt_ddi_phy_verify_state +ffffffff81a3c400 t __phy_reg_verify_state +ffffffff81a3c500 T bxt_ddi_phy_calc_lane_lat_optim_mask +ffffffff81a3c570 T bxt_ddi_phy_set_lane_optim_mask +ffffffff81a3c890 T bxt_ddi_phy_get_lane_lat_optim_mask +ffffffff81a3cad0 T chv_set_phy_signal_level +ffffffff81a3ce20 T chv_data_lane_soft_reset +ffffffff81a3cff0 T chv_phy_pre_pll_enable +ffffffff81a3d290 T chv_phy_pre_encoder_enable +ffffffff81a3d4f0 T chv_phy_release_cl2_override +ffffffff81a3d580 T chv_phy_post_pll_disable +ffffffff81a3d630 T vlv_set_phy_signal_level +ffffffff81a3d7a0 T vlv_phy_pre_pll_enable +ffffffff81a3d8a0 T vlv_phy_pre_encoder_enable +ffffffff81a3d9a0 T vlv_phy_reset_lanes +ffffffff81a3e000 T pnv_calc_dpll_params +ffffffff81a3e0c0 T i9xx_calc_dpll_params +ffffffff81a3e190 T vlv_calc_dpll_params +ffffffff81a3e250 T chv_calc_dpll_params +ffffffff81a3e320 T bxt_find_best_dpll +ffffffff81a3e340 t chv_find_best_dpll +ffffffff81a3e680 T i9xx_dpll_compute_fp +ffffffff81a3e6c0 T vlv_compute_dpll +ffffffff81a3e740 T chv_compute_dpll +ffffffff81a3e7c0 T intel_dpll_crtc_compute_clock +ffffffff81a3e8c0 T intel_dpll_crtc_get_shared_dpll +ffffffff81a3ea10 T intel_dpll_init_clock_hook +ffffffff81a3eb10 T i9xx_enable_pll +ffffffff81a3eea0 T vlv_enable_pll +ffffffff81a3f3e0 T chv_enable_pll +ffffffff81a3fa30 T vlv_force_pll_on +ffffffff81a3fb80 T vlv_disable_pll +ffffffff81a3fc40 T chv_disable_pll +ffffffff81a3fd70 T i9xx_disable_pll +ffffffff81a3fe70 T vlv_force_pll_off +ffffffff81a3ff60 T assert_pll_enabled +ffffffff81a40040 T assert_pll_disabled +ffffffff81a40120 t intel_pll_is_valid +ffffffff81a401f0 t dg2_crtc_compute_clock +ffffffff81a40270 t hsw_crtc_compute_clock +ffffffff81a40330 t hsw_crtc_get_shared_dpll +ffffffff81a403d0 t ilk_crtc_compute_clock +ffffffff81a406d0 t ilk_crtc_get_shared_dpll +ffffffff81a40720 t g4x_find_best_dpll +ffffffff81a40a60 t chv_crtc_compute_clock +ffffffff81a40b70 t vlv_crtc_compute_clock +ffffffff81a41010 t g4x_crtc_compute_clock +ffffffff81a41170 t i9xx_compute_dpll +ffffffff81a413e0 t pnv_crtc_compute_clock +ffffffff81a417c0 t i9xx_crtc_compute_clock +ffffffff81a418e0 t i9xx_find_best_dpll +ffffffff81a41c20 t i8xx_crtc_compute_clock +ffffffff81a42000 T intel_get_shared_dpll_by_id +ffffffff81a42040 T intel_get_shared_dpll_id +ffffffff81a420d0 T assert_shared_dpll +ffffffff81a421f0 T intel_dpll_get_hw_state +ffffffff81a42220 T icl_tc_port_to_pll_id +ffffffff81a42250 T intel_enable_shared_dpll +ffffffff81a42540 T intel_disable_shared_dpll +ffffffff81a42780 T intel_shared_dpll_swap_state +ffffffff81a42860 T icl_set_active_port_dpll +ffffffff81a428a0 T intel_shared_dpll_init +ffffffff81a42ab0 T intel_compute_shared_dplls +ffffffff81a42b40 T intel_reserve_shared_dplls +ffffffff81a42bd0 T intel_release_shared_dplls +ffffffff81a42c10 T intel_update_active_dpll +ffffffff81a42c70 T intel_dpll_get_freq +ffffffff81a42d00 T intel_dpll_update_ref_clks +ffffffff81a42d50 T intel_dpll_readout_hw_state +ffffffff81a42ed0 T intel_dpll_sanitize_state +ffffffff81a42fb0 T intel_dpll_dump_hw_state +ffffffff81a43030 T intel_shared_dpll_state_verify +ffffffff81a43150 t verify_single_dpll_state +ffffffff81a43470 T intel_shared_dpll_verify_disabled +ffffffff81a434f0 t icl_compute_dplls +ffffffff81a44120 t icl_get_dplls +ffffffff81a44470 t icl_put_dplls +ffffffff81a44530 t icl_update_active_dpll +ffffffff81a445e0 t icl_update_dpll_ref_clks +ffffffff81a44620 t icl_dump_hw_state +ffffffff81a446e0 t combo_pll_enable +ffffffff81a44900 t combo_pll_disable +ffffffff81a449f0 t combo_pll_get_hw_state +ffffffff81a44a80 t icl_ddi_combo_pll_get_freq +ffffffff81a44c50 t icl_dpll_write +ffffffff81a44ef0 t adlp_cmtg_clock_gating_wa +ffffffff81a45050 t icl_pll_disable +ffffffff81a451f0 t icl_pll_get_hw_state +ffffffff81a45530 t tbt_pll_enable +ffffffff81a456e0 t tbt_pll_disable +ffffffff81a45700 t tbt_pll_get_hw_state +ffffffff81a45720 t icl_ddi_tbt_pll_get_freq +ffffffff81a45790 t mg_pll_enable +ffffffff81a45d20 t mg_pll_disable +ffffffff81a45d60 t dkl_pll_get_hw_state +ffffffff81a45f30 t icl_ddi_mg_pll_get_freq +ffffffff81a46010 t icl_calc_dpll_state +ffffffff81a46150 t intel_find_shared_dpll +ffffffff81a46470 t intel_reference_shared_dpll +ffffffff81a46640 t intel_unreference_shared_dpll +ffffffff81a467a0 t mg_pll_get_hw_state +ffffffff81a469f0 t bxt_compute_dpll +ffffffff81a46cf0 t bxt_get_dpll +ffffffff81a46dc0 t intel_put_dpll +ffffffff81a46e20 t bxt_update_dpll_ref_clks +ffffffff81a46e60 t bxt_dump_hw_state +ffffffff81a46f10 t bxt_ddi_pll_enable +ffffffff81a47a30 t bxt_ddi_pll_disable +ffffffff81a47c40 t bxt_ddi_pll_get_hw_state +ffffffff81a480d0 t bxt_ddi_pll_get_freq +ffffffff81a48160 t bxt_ddi_set_dpll_hw_state +ffffffff81a48350 t skl_compute_dpll +ffffffff81a48ab0 t skl_get_dpll +ffffffff81a48b60 t skl_update_dpll_ref_clks +ffffffff81a48ba0 t skl_dump_hw_state +ffffffff81a48c00 t skl_ddi_dpll0_enable +ffffffff81a48cc0 t skl_ddi_dpll0_disable +ffffffff81a48cf0 t skl_ddi_dpll0_get_hw_state +ffffffff81a48df0 t skl_ddi_pll_get_freq +ffffffff81a48e80 t skl_ddi_wrpll_get_freq +ffffffff81a48fe0 t skl_ddi_pll_enable +ffffffff81a491f0 t skl_ddi_pll_disable +ffffffff81a49280 t skl_ddi_pll_get_hw_state +ffffffff81a493a0 t hsw_compute_dpll +ffffffff81a49bc0 t hsw_get_dpll +ffffffff81a49d10 t hsw_update_dpll_ref_clks +ffffffff81a49d80 t hsw_dump_hw_state +ffffffff81a49db0 t hsw_ddi_wrpll_enable +ffffffff81a49e30 t hsw_ddi_wrpll_disable +ffffffff81a49f10 t hsw_ddi_wrpll_get_hw_state +ffffffff81a49fb0 t hsw_ddi_wrpll_get_freq +ffffffff81a4a0a0 t hsw_ddi_spll_enable +ffffffff81a4a100 t hsw_ddi_spll_disable +ffffffff81a4a1d0 t hsw_ddi_spll_get_hw_state +ffffffff81a4a260 t hsw_ddi_spll_get_freq +ffffffff81a4a300 t hsw_ddi_lcpll_enable +ffffffff81a4a330 t hsw_ddi_lcpll_disable +ffffffff81a4a360 t hsw_ddi_lcpll_get_hw_state +ffffffff81a4a390 t hsw_ddi_lcpll_get_freq +ffffffff81a4a410 t ibx_compute_dpll +ffffffff81a4a440 t ibx_get_dpll +ffffffff81a4a540 t ibx_dump_hw_state +ffffffff81a4a5a0 t ibx_pch_dpll_enable +ffffffff81a4a750 t ibx_pch_dpll_disable +ffffffff81a4a7d0 t ibx_pch_dpll_get_hw_state +ffffffff81a4b000 T intel_dpt_pin +ffffffff81a4b1e0 T intel_dpt_unpin +ffffffff81a4b250 T intel_dpt_resume +ffffffff81a4b330 T intel_dpt_suspend +ffffffff81a4b400 T intel_dpt_create +ffffffff81a4b7e0 t dpt_insert_page +ffffffff81a4b850 t dpt_clear_range +ffffffff81a4b880 t dpt_insert_entries +ffffffff81a4b970 t dpt_cleanup +ffffffff81a4b9c0 t dpt_bind_vma +ffffffff81a4ba50 t dpt_unbind_vma +ffffffff81a4ba80 T intel_dpt_destroy +ffffffff81a4bad0 t __ww_mutex_lock +ffffffff81a4c000 T intel_drrs_type_str +ffffffff81a4c040 T intel_drrs_is_active +ffffffff81a4c070 T intel_drrs_activate +ffffffff81a4c250 T intel_drrs_deactivate +ffffffff81a4c330 t intel_drrs_set_state +ffffffff81a4c480 T intel_drrs_invalidate +ffffffff81a4c4a0 t intel_drrs_frontbuffer_update +ffffffff81a4c5d0 T intel_drrs_flush +ffffffff81a4c5f0 T intel_crtc_drrs_init +ffffffff81a4c690 t intel_drrs_downclock_work +ffffffff81a4c6f0 t __delayed_work_tick +ffffffff81a4d000 T intel_dsb_indexed_reg_write +ffffffff81a4d140 T intel_dsb_reg_write +ffffffff81a4d230 T intel_dsb_commit +ffffffff81a4d670 T intel_dsb_prepare +ffffffff81a4d800 T intel_dsb_cleanup +ffffffff81a4e000 T intel_dsi_bitrate +ffffffff81a4e0a0 T intel_dsi_tlpx_ns +ffffffff81a4e0f0 T intel_dsi_get_modes +ffffffff81a4e100 T intel_dsi_mode_valid +ffffffff81a4e1c0 T intel_dsi_host_init +ffffffff81a4e270 T intel_dsi_get_panel_orientation +ffffffff81a4f000 T intel_dsi_dcs_init_backlight_funcs +ffffffff81a4f0a0 t dcs_setup_backlight +ffffffff81a4f100 t dcs_get_backlight +ffffffff81a4f1f0 t dcs_set_backlight +ffffffff81a4f2e0 t dcs_disable_backlight +ffffffff81a4f640 t dcs_enable_backlight +ffffffff81a50000 T intel_dsi_vbt_exec_sequence +ffffffff81a50020 T intel_dsi_log_params +ffffffff81a503a0 T intel_dsi_vbt_init +ffffffff81a50840 T intel_dsi_vbt_gpio_init +ffffffff81a50860 T intel_dsi_vbt_gpio_cleanup +ffffffff81a51000 T intel_dvo_init +ffffffff81a514f0 t intel_disable_dvo +ffffffff81a515a0 t intel_enable_dvo +ffffffff81a51690 t intel_dvo_get_hw_state +ffffffff81a51700 t intel_dvo_get_config +ffffffff81a517a0 t intel_dvo_compute_config +ffffffff81a51830 t intel_dvo_pre_enable +ffffffff81a51920 t intel_dvo_connector_get_hw_state +ffffffff81a519a0 t intel_dvo_enc_destroy +ffffffff81a519e0 t intel_dvo_detect +ffffffff81a51ae0 t intel_dvo_get_modes +ffffffff81a51b50 t intel_dvo_mode_valid +ffffffff81a52000 T intel_fb_get_format_info +ffffffff81a52230 T intel_fb_is_ccs_modifier +ffffffff81a52400 T intel_fb_is_rc_ccs_cc_modifier +ffffffff81a525d0 T intel_fb_is_mc_ccs_modifier +ffffffff81a527a0 T intel_fb_plane_get_modifiers +ffffffff81a528e0 T intel_fb_plane_supports_modifier +ffffffff81a52960 T intel_format_info_is_yuv_semiplanar +ffffffff81a52c00 T intel_fb_is_ccs_aux_plane +ffffffff81a52e40 T intel_fb_rc_ccs_cc_plane +ffffffff81a530a0 T is_surface_linear +ffffffff81a53100 t intel_fb_is_gen12_ccs_aux_plane +ffffffff81a53400 T main_to_ccs_plane +ffffffff81a536e0 T skl_ccs_to_main_plane +ffffffff81a539d0 T skl_main_to_aux_plane +ffffffff81a53c30 T intel_tile_size +ffffffff81a53c70 T intel_tile_width_bytes +ffffffff81a53ec0 T intel_tile_height +ffffffff81a53f20 T intel_tile_row_size +ffffffff81a53fa0 T intel_fb_align_height +ffffffff81a54010 T intel_fb_uses_dpt +ffffffff81a54060 T intel_cursor_alignment +ffffffff81a540c0 T intel_surf_alignment +ffffffff81a542b0 T intel_fb_plane_get_subsampling +ffffffff81a54390 T intel_plane_adjust_aligned_offset +ffffffff81a54400 t intel_adjust_aligned_offset +ffffffff81a545d0 T intel_plane_compute_aligned_offset +ffffffff81a546d0 t intel_compute_aligned_offset +ffffffff81a548a0 T intel_fb_needs_pot_stride_remap +ffffffff81a54900 T intel_fb_supports_90_270_rotation +ffffffff81a54950 T intel_fill_fb_info +ffffffff81a553b0 t calc_plane_remap_info +ffffffff81a55d40 T intel_fb_fill_view +ffffffff81a55da0 T intel_plane_compute_gtt +ffffffff81a564b0 T intel_framebuffer_init +ffffffff81a57100 t intel_fb_modifier_to_tiling +ffffffff81a57310 t gen12_ccs_aux_stride +ffffffff81a57370 T intel_user_framebuffer_create +ffffffff81a574b0 T intel_framebuffer_create +ffffffff81a57540 t intel_adjust_tile_offset +ffffffff81a57680 t intel_plane_can_remap +ffffffff81a578f0 t intel_user_framebuffer_destroy +ffffffff81a57950 t intel_user_framebuffer_create_handle +ffffffff81a57980 t intel_user_framebuffer_dirty +ffffffff81a58000 T intel_pin_and_fence_fb_obj +ffffffff81a58330 t i915_gem_object_lock +ffffffff81a58540 T intel_unpin_fb_vma +ffffffff81a585b0 T intel_plane_pin_fb +ffffffff81a588e0 T intel_plane_unpin_fb +ffffffff81a59000 T intel_fbc_cleanup +ffffffff81a591c0 T intel_fbc_pre_update +ffffffff81a59810 T intel_fbc_post_update +ffffffff81a59a60 T intel_fbc_invalidate +ffffffff81a59c80 T intel_fbc_flush +ffffffff81a59f20 T intel_fbc_atomic_check +ffffffff81a5a4c0 T intel_fbc_disable +ffffffff81a5a580 t __intel_fbc_disable +ffffffff81a5a710 T intel_fbc_update +ffffffff81a5ae00 T intel_fbc_reset_underrun +ffffffff81a5af60 T intel_fbc_handle_fifo_underrun_irq +ffffffff81a5b010 T intel_fbc_add_plane +ffffffff81a5b040 T intel_fbc_init +ffffffff81a5b2d0 T intel_fbc_sanitize +ffffffff81a5b3a0 T intel_fbc_crtc_debugfs_add +ffffffff81a5b3d0 T intel_fbc_debugfs_register +ffffffff81a5b400 t intel_fbc_is_ok +ffffffff81a5b540 t intel_fbc_update_state +ffffffff81a5b8c0 t intel_fbc_underrun_work_fn +ffffffff81a5b9e0 t ivb_fbc_activate +ffffffff81a5bc40 t ilk_fbc_deactivate +ffffffff81a5bcf0 t ilk_fbc_is_active +ffffffff81a5bd50 t ivb_fbc_is_compressing +ffffffff81a5bdc0 t snb_fbc_nuke +ffffffff81a5be40 t ilk_fbc_program_cfb +ffffffff81a5be80 t ivb_fbc_set_false_color +ffffffff81a5bf40 t snb_fbc_activate +ffffffff81a5bfd0 t ilk_fbc_is_compressing +ffffffff81a5c040 t ilk_fbc_activate +ffffffff81a5c170 t i965_fbc_nuke +ffffffff81a5c210 t g4x_fbc_activate +ffffffff81a5c320 t g4x_fbc_deactivate +ffffffff81a5c3b0 t g4x_fbc_is_active +ffffffff81a5c410 t g4x_fbc_is_compressing +ffffffff81a5c470 t g4x_fbc_program_cfb +ffffffff81a5c4a0 t i8xx_fbc_activate +ffffffff81a5c610 t i8xx_fbc_deactivate +ffffffff81a5c6e0 t i8xx_fbc_is_active +ffffffff81a5c740 t i8xx_fbc_is_compressing +ffffffff81a5c7a0 t i8xx_fbc_program_cfb +ffffffff81a5c820 t i8xx_fbc_nuke +ffffffff81a5d000 T intel_fbdev_init +ffffffff81a5d4e0 t intel_fbdev_suspend_worker +ffffffff81a5d510 T intel_fbdev_initial_config_async +ffffffff81a5d580 T intel_fbdev_unregister +ffffffff81a5d5c0 T intel_fbdev_set_suspend +ffffffff81a5d5f0 T intel_fbdev_fini +ffffffff81a5d680 T intel_fbdev_output_poll_changed +ffffffff81a5d720 T intel_fbdev_restore_mode +ffffffff81a5d7a0 T intel_fbdev_framebuffer +ffffffff81a5d7e0 t intelfb_create +ffffffff81a5ddd0 t intel_fbdev_set_par +ffffffff81a5e000 T assert_fdi_tx_enabled +ffffffff81a5e0e0 T assert_fdi_tx_disabled +ffffffff81a5e1c0 T assert_fdi_rx_enabled +ffffffff81a5e280 T assert_fdi_rx_disabled +ffffffff81a5e340 T assert_fdi_tx_pll_enabled +ffffffff81a5e3f0 T assert_fdi_rx_pll_enabled +ffffffff81a5e4b0 T assert_fdi_rx_pll_disabled +ffffffff81a5e570 T intel_fdi_link_train +ffffffff81a5e590 T intel_fdi_pll_freq_update +ffffffff81a5e640 T intel_fdi_link_freq +ffffffff81a5e690 T ilk_fdi_compute_config +ffffffff81a5e9d0 T intel_fdi_normal_train +ffffffff81a5eb60 T hsw_fdi_link_train +ffffffff81a5f040 T hsw_fdi_disable +ffffffff81a5f1a0 T ilk_fdi_pll_enable +ffffffff81a5f3a0 T ilk_fdi_pll_disable +ffffffff81a5f4d0 T ilk_fdi_disable +ffffffff81a5f720 T intel_fdi_init_hook +ffffffff81a5f780 t ilk_fdi_link_train +ffffffff81a5fde0 t gen6_fdi_link_train +ffffffff81a60620 t ivb_manual_fdi_link_train +ffffffff81a60eb0 t cpt_set_fdi_bc_bifurcation +ffffffff81a62000 T intel_set_cpu_fifo_underrun_reporting +ffffffff81a623c0 T intel_set_pch_fifo_underrun_reporting +ffffffff81a625f0 T intel_cpu_fifo_underrun_irq_handler +ffffffff81a627e0 T intel_pch_fifo_underrun_irq_handler +ffffffff81a62860 T intel_check_cpu_fifo_underruns +ffffffff81a62a70 T intel_check_pch_fifo_underruns +ffffffff81a63000 T intel_frontbuffer_flip_prepare +ffffffff81a63050 T intel_frontbuffer_flip_complete +ffffffff81a63130 T intel_frontbuffer_flip +ffffffff81a63200 T __intel_fb_invalidate +ffffffff81a63290 T __intel_fb_flush +ffffffff81a63380 T intel_frontbuffer_get +ffffffff81a634b0 t frontbuffer_active +ffffffff81a634e0 t frontbuffer_retire +ffffffff81a63520 T intel_frontbuffer_put +ffffffff81a636b0 T intel_frontbuffer_track +ffffffff81a64000 T intel_atomic_global_obj_init +ffffffff81a64070 T intel_atomic_global_obj_cleanup +ffffffff81a64160 T intel_atomic_get_global_obj_state +ffffffff81a643b0 T intel_atomic_get_old_global_obj_state +ffffffff81a64410 T intel_atomic_get_new_global_obj_state +ffffffff81a64470 T intel_atomic_swap_global_state +ffffffff81a645b0 T intel_atomic_clear_global_state +ffffffff81a646d0 T intel_atomic_lock_global_state +ffffffff81a64760 T intel_atomic_serialize_global_state +ffffffff81a65000 T intel_gmbus_is_valid_pin +ffffffff81a65100 T intel_gmbus_reset +ffffffff81a65160 T intel_bb_set_bits +ffffffff81a652a0 T intel_bb_set_dir +ffffffff81a652d0 T intel_bb_read_bits +ffffffff81a65450 T intel_acquire_bus +ffffffff81a65650 T intel_release_bus +ffffffff81a657f0 T intel_send_start +ffffffff81a65810 T intel_send_stop +ffffffff81a65830 T intel_initiate_xfer +ffffffff81a65850 T intel_read_byte +ffffffff81a65870 T intel_write_byte +ffffffff81a65890 T intel_gmbus_output_aksv +ffffffff81a65960 t do_gmbus_xfer +ffffffff81a65f60 T intel_gmbus_setup +ffffffff81a662e0 T intel_gmbus_teardown +ffffffff81a66360 T intel_gmbus_get_adapter +ffffffff81a663e0 T intel_gmbus_force_bit +ffffffff81a66480 T intel_gmbus_is_forced_bit +ffffffff81a664b0 t gmbus_xfer_read +ffffffff81a66790 t gmbus_xfer_write +ffffffff81a669d0 t gmbus_wait +ffffffff81a66db0 t gmbus_wait_idle +ffffffff81a66f40 t gmbus_xfer +ffffffff81a67020 t gmbus_func +ffffffff81a67060 t gmbus_lock_bus +ffffffff81a67080 t gmbus_trylock_bus +ffffffff81a670e0 t gmbus_unlock_bus +ffffffff81a68000 T intel_hdcp_capable +ffffffff81a680a0 t intel_hdcp_read_valid_bksv +ffffffff81a68330 T intel_hdcp2_capable +ffffffff81a68410 T is_hdcp_supported +ffffffff81a68460 T intel_hdcp_component_init +ffffffff81a68490 T intel_hdcp_init +ffffffff81a685d0 t intel_hdcp_check_work +ffffffff81a6b100 t intel_hdcp_prop_work +ffffffff81a6b180 T intel_hdcp_enable +ffffffff81a6b1d0 T intel_hdcp_disable +ffffffff81a6b300 t intel_hdcp_update_value +ffffffff81a6b4c0 t _intel_hdcp2_disable +ffffffff81a6b8b0 t _intel_hdcp_disable +ffffffff81a6bba0 T intel_hdcp_update_pipe +ffffffff81a6bd10 T intel_hdcp_component_fini +ffffffff81a6bd50 T intel_hdcp_cleanup +ffffffff81a6be90 T intel_hdcp_atomic_check +ffffffff81a6bf20 T intel_hdcp_handle_cp_irq +ffffffff81a6c020 t __delayed_work_tick +ffffffff81a6c040 t hdcp2_authenticate_repeater_topology +ffffffff81a6c300 t transcoder_name +ffffffff81a6c340 t intel_hdcp_get_repeater_ctl +ffffffff81a6c410 t ktime_get_raw +ffffffff81a6c490 t wait_remaining_ms_from_jiffies +ffffffff81a6c520 t intel_hdcp_auth_downstream +ffffffff81a6d6f0 t intel_write_sha_text +ffffffff81a6e000 T hsw_write_infoframe +ffffffff81a6e420 t hsw_dip_data_reg +ffffffff81a6e5e0 T hsw_read_infoframe +ffffffff81a6e6a0 T intel_hdmi_infoframe_enable +ffffffff81a6e740 T intel_hdmi_infoframes_enabled +ffffffff81a6e850 T intel_read_infoframe +ffffffff81a6e9f0 T intel_hdmi_read_gcp_infoframe +ffffffff81a6eae0 T intel_dp_dual_mode_set_tmds_output +ffffffff81a6eba0 T intel_hdmi_tmds_clock +ffffffff81a6ebf0 T intel_hdmi_bpc_possible +ffffffff81a6ed20 T intel_hdmi_limited_color_range +ffffffff81a6ed90 T intel_hdmi_compute_config +ffffffff81a6f3d0 t intel_hdmi_compute_output_format +ffffffff81a6f500 t intel_hdmi_compute_drm_infoframe +ffffffff81a6f5f0 T intel_hdmi_encoder_shutdown +ffffffff81a6f6c0 T intel_hdmi_handle_sink_scrambling +ffffffff81a6f7c0 T intel_infoframe_init +ffffffff81a6f960 t vlv_write_infoframe +ffffffff81a6fcc0 t vlv_read_infoframe +ffffffff81a6fe80 t vlv_set_infoframes +ffffffff81a701e0 t vlv_infoframes_enabled +ffffffff81a70280 t g4x_write_infoframe +ffffffff81a70520 t g4x_read_infoframe +ffffffff81a70660 t g4x_set_infoframes +ffffffff81a708f0 t g4x_infoframes_enabled +ffffffff81a70970 t hsw_set_infoframes +ffffffff81a70c00 t hsw_infoframes_enabled +ffffffff81a70c90 t ibx_write_infoframe +ffffffff81a70fa0 t ibx_read_infoframe +ffffffff81a71110 t ibx_set_infoframes +ffffffff81a71460 t ibx_infoframes_enabled +ffffffff81a714f0 t cpt_write_infoframe +ffffffff81a717f0 t cpt_read_infoframe +ffffffff81a71960 t cpt_set_infoframes +ffffffff81a71c40 t cpt_infoframes_enabled +ffffffff81a71cb0 T intel_hdmi_init_connector +ffffffff81a721e0 T intel_hdmi_dsc_get_slice_height +ffffffff81a72240 T intel_hdmi_dsc_get_num_slices +ffffffff81a723c0 T intel_hdmi_dsc_get_bpp +ffffffff81a724a0 t intel_hdmi_compute_clock +ffffffff81a72760 t hdmi_port_clock_valid +ffffffff81a72960 t intel_write_infoframe +ffffffff81a72b30 t gen9bc_tgp_port_to_ddc_pin +ffffffff81a72bd0 t mcc_port_to_ddc_pin +ffffffff81a72c30 t icl_port_to_ddc_pin +ffffffff81a72ce0 t cnp_port_to_ddc_pin +ffffffff81a72d50 t chv_port_to_ddc_pin +ffffffff81a72db0 t g4x_port_to_ddc_pin +ffffffff81a72e10 t intel_hdmi_detect +ffffffff81a72fc0 t intel_hdmi_force +ffffffff81a73070 t intel_hdmi_connector_register +ffffffff81a73080 t intel_hdmi_connector_unregister +ffffffff81a73090 t intel_hdmi_set_edid +ffffffff81a73330 t intel_hdmi_get_modes +ffffffff81a73370 t intel_hdmi_mode_valid +ffffffff81a73510 t intel_hdmi_mode_clock_valid +ffffffff81a736a0 t intel_hdmi_hdcp_write_an_aksv +ffffffff81a737e0 t intel_hdmi_hdcp_read_bksv +ffffffff81a738b0 t intel_hdmi_hdcp_read_bstatus +ffffffff81a73980 t intel_hdmi_hdcp_repeater_present +ffffffff81a73a60 t intel_hdmi_hdcp_read_ri_prime +ffffffff81a73b30 t intel_hdmi_hdcp_read_ksv_ready +ffffffff81a73c10 t intel_hdmi_hdcp_read_ksv_fifo +ffffffff81a73ce0 t intel_hdmi_hdcp_read_v_prime_part +ffffffff81a73dd0 t intel_hdmi_hdcp_toggle_signalling +ffffffff81a74050 t intel_hdmi_hdcp_check_link +ffffffff81a74370 t intel_hdmi_hdcp2_capable +ffffffff81a74430 t intel_hdmi_hdcp2_write_msg +ffffffff81a74520 t intel_hdmi_hdcp2_read_msg +ffffffff81a74920 t intel_hdmi_hdcp2_check_link +ffffffff81a75000 T intel_hpd_pin_default +ffffffff81a75030 T intel_encoder_hotplug +ffffffff81a75160 T intel_hpd_trigger_irq +ffffffff81a751d0 T intel_hpd_irq_handler +ffffffff81a755f0 T intel_hpd_init +ffffffff81a75700 T intel_hpd_poll_enable +ffffffff81a75780 T intel_hpd_poll_disable +ffffffff81a757e0 T intel_hpd_init_work +ffffffff81a758b0 t i915_hotplug_work_func +ffffffff81a75be0 t i915_digport_work_func +ffffffff81a75d60 t i915_hpd_poll_init_work +ffffffff81a75e60 t intel_hpd_irq_storm_reenable_work +ffffffff81a76180 T intel_hpd_cancel_work +ffffffff81a762a0 T intel_hpd_disable +ffffffff81a76330 T intel_hpd_enable +ffffffff81a763a0 t __delayed_work_tick +ffffffff81a77000 T intel_lpe_audio_irq_handler +ffffffff81a77020 T intel_lpe_audio_init +ffffffff81a77050 T intel_lpe_audio_teardown +ffffffff81a77070 T intel_lpe_audio_notify +ffffffff81a78000 T lspcon_detect_hdr_capability +ffffffff81a780b0 T lspcon_write_infoframe +ffffffff81a787f0 T lspcon_read_infoframe +ffffffff81a78830 T lspcon_set_infoframes +ffffffff81a78a90 T lspcon_infoframes_enabled +ffffffff81a78c60 T lspcon_wait_pcon_mode +ffffffff81a78c80 t lspcon_wait_mode +ffffffff81a78f40 T lspcon_init +ffffffff81a79340 T intel_lspcon_infoframes_enabled +ffffffff81a79370 T lspcon_resume +ffffffff81a79610 t lspcon_change_mode +ffffffff81a7a000 T intel_lvds_port_enabled +ffffffff81a7a080 T intel_get_lvds_encoder +ffffffff81a7a0e0 T intel_is_dual_link_lvds +ffffffff81a7a140 T intel_lvds_init +ffffffff81a7a800 t intel_enable_lvds +ffffffff81a7a940 t intel_pre_enable_lvds +ffffffff81a7ac20 t intel_lvds_compute_config +ffffffff81a7ad80 t pch_disable_lvds +ffffffff81a7ada0 t pch_post_disable_lvds +ffffffff81a7adc0 t gmch_disable_lvds +ffffffff81a7adf0 t intel_lvds_get_hw_state +ffffffff81a7aeb0 t intel_lvds_get_config +ffffffff81a7afb0 t intel_lvds_shutdown +ffffffff81a7b050 t compute_is_dual_link_lvds +ffffffff81a7b120 t intel_no_lvds_dmi_callback +ffffffff81a7b170 t intel_disable_lvds +ffffffff81a7b290 t intel_lvds_get_modes +ffffffff81a7b2c0 t intel_lvds_mode_valid +ffffffff81a7b360 t intel_dual_link_lvds_callback +ffffffff81a7c000 T intel_modeset_setup_hw_state +ffffffff81a7e000 T intel_modeset_verify_crtc +ffffffff81a7e3a0 t verify_connector_state +ffffffff81a7e650 T intel_modeset_verify_disabled +ffffffff81a7f000 T intel_opregion_notify_encoder +ffffffff81a7f170 t swsci +ffffffff81a7f4a0 T intel_opregion_notify_adapter +ffffffff81a7f500 T intel_opregion_asle_intr +ffffffff81a7f550 T intel_opregion_setup +ffffffff81a7fd60 t asle_work +ffffffff81a801d0 T intel_opregion_get_panel_type +ffffffff81a802c0 T intel_opregion_get_edid +ffffffff81a803a0 T intel_opregion_headless_sku +ffffffff81a803f0 T intel_opregion_register +ffffffff81a80480 T intel_opregion_resume +ffffffff81a80510 T intel_opregion_suspend +ffffffff81a805b0 T intel_opregion_unregister +ffffffff81a80730 t intel_no_opregion_vbt_callback +ffffffff81a80790 t intel_use_opregion_panel_type_callback +ffffffff81a81000 T intel_overlay_reset +ffffffff81a81050 T intel_overlay_switch_off +ffffffff81a81250 t intel_overlay_release_old_vid +ffffffff81a813f0 T intel_overlay_put_image_ioctl +ffffffff81a81700 t update_pfit_vscale_ratio +ffffffff81a817d0 t check_overlay_dst +ffffffff81a818a0 t check_overlay_src +ffffffff81a81af0 t intel_overlay_do_put_image +ffffffff81a82640 T intel_overlay_attrs_ioctl +ffffffff81a82960 t check_gamma +ffffffff81a82b50 T intel_overlay_setup +ffffffff81a82da0 t intel_overlay_last_flip_retire +ffffffff81a82de0 T intel_overlay_cleanup +ffffffff81a82ea0 T intel_overlay_capture_error_state +ffffffff81a82f90 T intel_overlay_print_error_state +ffffffff81a83360 t intel_overlay_release_old_vid_tail +ffffffff81a83430 t intel_overlay_off_tail +ffffffff81a835e0 t intel_overlay_flip_prepare +ffffffff81a84000 T intel_panel_use_ssc +ffffffff81a84060 T intel_panel_preferred_fixed_mode +ffffffff81a840b0 T intel_panel_fixed_mode +ffffffff81a84170 T intel_panel_downclock_mode +ffffffff81a84260 T intel_panel_highest_mode +ffffffff81a842c0 T intel_panel_get_modes +ffffffff81a84350 T intel_panel_drrs_type +ffffffff81a843a0 T intel_panel_compute_config +ffffffff81a84510 T intel_panel_add_edid_fixed_modes +ffffffff81a84a40 T intel_panel_add_vbt_lfp_fixed_mode +ffffffff81a84aa0 t intel_panel_add_fixed_mode +ffffffff81a84c20 T intel_panel_add_vbt_sdvo_fixed_mode +ffffffff81a84c90 T intel_panel_add_encoder_fixed_mode +ffffffff81a84cd0 T intel_panel_fitting +ffffffff81a85330 T intel_panel_detect +ffffffff81a853c0 T intel_panel_mode_valid +ffffffff81a854d0 T intel_panel_init_alloc +ffffffff81a85520 T intel_panel_init +ffffffff81a855e0 T intel_panel_fini +ffffffff81a86000 T intel_has_pch_trancoder +ffffffff81a86060 T intel_crtc_pch_transcoder +ffffffff81a860a0 T intel_pch_transcoder_get_m1_n1 +ffffffff81a860f0 T intel_pch_transcoder_get_m2_n2 +ffffffff81a86140 T ilk_pch_pre_enable +ffffffff81a86170 T ilk_pch_enable +ffffffff81a86710 t ilk_pch_transcoder_set_timings +ffffffff81a86990 T ilk_pch_disable +ffffffff81a869b0 T ilk_pch_post_disable +ffffffff81a86d00 T ilk_pch_get_config +ffffffff81a86ec0 T lpt_pch_enable +ffffffff81a870f0 T lpt_pch_disable +ffffffff81a87200 T lpt_pch_get_config +ffffffff81a872d0 T intel_pch_sanitize +ffffffff81a875b0 t assert_pch_dp_disabled +ffffffff81a876a0 t assert_pch_hdmi_disabled +ffffffff81a88000 T lpt_disable_iclkip +ffffffff81a88070 T lpt_iclkip +ffffffff81a88100 T lpt_program_iclkip +ffffffff81a88390 T lpt_get_iclkip +ffffffff81a884a0 T lpt_disable_clkout_dp +ffffffff81a88580 T intel_init_pch_refclk +ffffffff81a8a000 T intel_crtc_initial_plane_config +ffffffff81a8b000 T intel_pps_lock +ffffffff81a8b060 T intel_pps_unlock +ffffffff81a8b0c0 T intel_pps_reset_all +ffffffff81a8b210 T intel_pps_check_power_unlocked +ffffffff81a8b3c0 T intel_pps_wait_power_cycle +ffffffff81a8b460 t wait_panel_power_cycle +ffffffff81a8b5b0 T intel_pps_vdd_on_unlocked +ffffffff81a8b980 T intel_pps_vdd_on +ffffffff81a8ba80 T intel_pps_vdd_off_sync +ffffffff81a8bb50 t intel_pps_vdd_off_sync_unlocked +ffffffff81a8be20 T intel_pps_vdd_off_unlocked +ffffffff81a8bf30 T intel_pps_on_unlocked +ffffffff81a8c210 T intel_pps_on +ffffffff81a8c2b0 T intel_pps_off_unlocked +ffffffff81a8c500 T intel_pps_off +ffffffff81a8c5a0 T intel_pps_backlight_on +ffffffff81a8c790 T intel_pps_backlight_off +ffffffff81a8c980 T intel_pps_backlight_power +ffffffff81a8cb70 T vlv_pps_init +ffffffff81a8ccd0 t vlv_detach_power_sequencer +ffffffff81a8ce30 t vlv_steal_power_sequencer +ffffffff81a8cf60 t pps_init_delays +ffffffff81a8d3f0 t pps_init_registers +ffffffff81a8d780 T intel_pps_have_panel_power_or_vdd +ffffffff81a8d8d0 T intel_pps_encoder_reset +ffffffff81a8da60 t vlv_initial_power_sequencer_setup +ffffffff81a8dd10 t pps_vdd_init +ffffffff81a8de20 T intel_pps_init +ffffffff81a8dfa0 t edp_panel_vdd_work +ffffffff81a8e050 T intel_pps_init_late +ffffffff81a8e1c0 T intel_pps_unlock_regs_wa +ffffffff81a8e2d0 T intel_pps_setup +ffffffff81a8e340 T assert_pps_unlocked +ffffffff81a8e590 t intel_pps_get_registers +ffffffff81a8ec60 t wait_panel_status +ffffffff81a8ef30 t intel_pps_readout_hw_state +ffffffff81a8f0e0 t __delayed_work_tick +ffffffff81a90000 T intel_psr_irq_handler +ffffffff81a90650 t transcoder_name +ffffffff81a90690 T intel_psr_init_dpcd +ffffffff81a90920 T intel_psr_compute_config +ffffffff81a90b00 t intel_psr2_config_valid +ffffffff81a90f60 T intel_psr_get_config +ffffffff81a91100 T intel_psr_disable +ffffffff81a91210 t intel_psr_disable_locked +ffffffff81a916a0 T intel_psr_pause +ffffffff81a91890 t intel_psr_exit +ffffffff81a91b60 T intel_psr_resume +ffffffff81a91bf0 t intel_psr_activate +ffffffff81a923f0 T intel_psr2_disable_plane_sel_fetch +ffffffff81a92460 T intel_psr2_program_plane_sel_fetch +ffffffff81a92630 T intel_psr2_program_trans_man_trk_ctl +ffffffff81a92720 T intel_psr2_sel_fetch_update +ffffffff81a92df0 T intel_psr_pre_plane_update +ffffffff81a92f70 T intel_psr_post_plane_update +ffffffff81a93960 T intel_psr_wait_for_idle_locked +ffffffff81a93b00 T intel_psr_debug_set +ffffffff81a93d30 t psr_irq_control +ffffffff81a93e60 T intel_psr_invalidate +ffffffff81a940c0 T intel_psr_flush +ffffffff81a94550 T intel_psr_init +ffffffff81a94680 t intel_psr_work +ffffffff81a94820 t tgl_dc3co_disable_work +ffffffff81a94870 T intel_psr_short_pulse +ffffffff81a94c30 T intel_psr_enabled +ffffffff81a94cb0 T intel_psr_lock +ffffffff81a94d70 T intel_psr_unlock +ffffffff81a94e30 t _compute_psr2_sdp_prior_scanline_indication +ffffffff81a94ef0 t _compute_psr2_wake_times +ffffffff81a94fe0 t intel_psr2_sel_fetch_config_valid +ffffffff81a950f0 t psr2_granularity_check +ffffffff81a951b0 t tgl_psr2_disable_dc3co +ffffffff81a952e0 t __delayed_work_tick +ffffffff81a96000 T intel_lookup_range_min_qp +ffffffff81a960c0 T intel_lookup_range_max_qp +ffffffff81a97000 T intel_init_quirks +ffffffff81a970f0 T intel_has_quirk +ffffffff81a97130 t quirk_ssc_force_disable +ffffffff81a97160 t quirk_invert_brightness +ffffffff81a97190 t quirk_backlight_present +ffffffff81a971c0 t quirk_increase_t12_delay +ffffffff81a971f0 t quirk_increase_ddi_disabled_time +ffffffff81a97220 t intel_dmi_reverse_brightness +ffffffff81a97270 t intel_dmi_no_pps_backlight +ffffffff81a98000 T intel_sdvo_port_enabled +ffffffff81a980a0 T intel_sdvo_init +ffffffff81a989f0 t intel_sdvo_compute_config +ffffffff81a98db0 t pch_disable_sdvo +ffffffff81a98de0 t pch_post_disable_sdvo +ffffffff81a98df0 t intel_disable_sdvo +ffffffff81a98f60 t intel_sdvo_pre_enable +ffffffff81a998e0 t intel_enable_sdvo +ffffffff81a99ad0 t intel_sdvo_get_hw_state +ffffffff81a99bc0 t intel_sdvo_get_config +ffffffff81a9a0f0 t intel_sdvo_ddc_proxy_xfer +ffffffff81a9a1a0 t intel_sdvo_ddc_proxy_func +ffffffff81a9a1d0 t __intel_sdvo_write_cmd +ffffffff81a9a680 t proxy_lock_bus +ffffffff81a9a6b0 t proxy_trylock_bus +ffffffff81a9a6e0 t proxy_unlock_bus +ffffffff81a9a710 t intel_sdvo_enc_destroy +ffffffff81a9a720 t intel_sdvo_set_output_timings_from_mode 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intel_tc_port_in_tbt_alt_mode +ffffffff81aa4070 T intel_tc_port_in_dp_alt_mode +ffffffff81aa40e0 T intel_tc_port_in_legacy_mode +ffffffff81aa4150 T intel_tc_cold_requires_aux_pw +ffffffff81aa41a0 T intel_tc_port_get_lane_mask +ffffffff81aa4300 T intel_tc_port_get_pin_assignment_mask +ffffffff81aa4460 T intel_tc_port_fia_max_lane_count +ffffffff81aa45a0 T intel_tc_port_set_fia_lane_count +ffffffff81aa47a0 T intel_tc_port_init_mode +ffffffff81aa4bf0 t intel_tc_port_update_mode +ffffffff81aa50f0 T intel_tc_port_sanitize_mode +ffffffff81aa54a0 T intel_tc_port_connected +ffffffff81aa5590 T intel_tc_port_lock +ffffffff81aa55b0 t tc_port_live_status_mask +ffffffff81aa5870 T intel_tc_port_unlock +ffffffff81aa58f0 t __intel_tc_port_lock +ffffffff81aa5af0 T intel_tc_port_flush_work +ffffffff81aa5b10 T intel_tc_port_ref_held +ffffffff81aa5b60 T intel_tc_port_get_link +ffffffff81aa5be0 T intel_tc_port_put_link +ffffffff81aa5c70 T intel_tc_port_init +ffffffff81aa5ef0 t intel_tc_port_disconnect_phy_work +ffffffff81aa5f40 t tc_phy_status_complete +ffffffff81aa6050 t tc_phy_take_ownership +ffffffff81aa61f0 t __delayed_work_tick +ffffffff81aa7000 T intel_tv_init +ffffffff81aa7430 t intel_tv_compute_config +ffffffff81aa78e0 t intel_tv_get_config +ffffffff81aa7da0 t intel_tv_pre_enable +ffffffff81aa86c0 t intel_enable_tv +ffffffff81aa8720 t intel_disable_tv +ffffffff81aa8780 t intel_tv_get_hw_state +ffffffff81aa87e0 t intel_tv_connector_duplicate_state +ffffffff81aa8860 t intel_tv_mode_to_mode +ffffffff81aa89b0 t intel_tv_get_modes +ffffffff81aa8cf0 t intel_tv_detect +ffffffff81aa9140 t intel_tv_mode_valid +ffffffff81aa91f0 t intel_tv_atomic_check +ffffffff81aaa000 T intel_dsc_source_support +ffffffff81aaa060 T intel_dsc_compute_params +ffffffff81aaa4f0 T intel_dsc_power_domain +ffffffff81aaa5a0 T intel_dsc_dsi_pps_write +ffffffff81aaa840 T intel_dsc_dp_pps_write +ffffffff81aaa930 T intel_uncompressed_joiner_enable +ffffffff81aaaa50 T intel_dsc_enable +ffffffff81aac320 T intel_dsc_disable +ffffffff81aac4a0 T intel_dsc_get_config +ffffffff81aad000 T intel_vga_disable +ffffffff81aad120 T intel_vga_redisable_power_on +ffffffff81aad1c0 T intel_vga_redisable +ffffffff81aad280 T intel_vga_reset_io_mem +ffffffff81aad2e0 T intel_vga_register +ffffffff81aad310 T intel_vga_unregister +ffffffff81aae000 T intel_vrr_is_capable +ffffffff81aae080 T intel_vrr_check_modeset +ffffffff81aae110 T intel_vrr_vmin_vblank_start +ffffffff81aae170 T intel_vrr_vmax_vblank_start +ffffffff81aae1d0 T intel_vrr_compute_config +ffffffff81aae340 T intel_vrr_enable +ffffffff81aae510 T intel_vrr_send_push +ffffffff81aae590 T intel_vrr_is_push_sent +ffffffff81aae620 T intel_vrr_disable +ffffffff81aae6f0 T intel_vrr_get_config +ffffffff81aaf000 T skl_update_scaler_crtc +ffffffff81aaf0b0 t skl_update_scaler +ffffffff81aaf3f0 T skl_update_scaler_plane +ffffffff81aaf7e0 T intel_atomic_setup_scalers +ffffffff81aafd40 T skl_pfit_enable +ffffffff81ab0230 T skl_program_plane_scaler +ffffffff81ab08e0 T skl_detach_scalers +ffffffff81ab0a40 T skl_scaler_disable +ffffffff81ab1000 T skl_format_to_fourcc +ffffffff81ab1180 T icl_is_nv12_y_plane +ffffffff81ab11f0 T icl_is_hdr_plane +ffffffff81ab1230 T skl_calc_main_surface_offset +ffffffff81ab1470 T skl_universal_plane_create +ffffffff81ab1b40 t icl_plane_min_width +ffffffff81ab1cd0 t icl_hdr_plane_max_width +ffffffff81ab1d20 t icl_sdr_plane_max_width +ffffffff81ab1d50 t icl_plane_max_height +ffffffff81ab1d80 t icl_plane_min_cdclk +ffffffff81ab1dc0 t glk_plane_max_width +ffffffff81ab1e70 t skl_plane_max_height +ffffffff81ab1ea0 t glk_plane_min_cdclk +ffffffff81ab1f10 t skl_plane_max_width +ffffffff81ab1fe0 t skl_plane_min_cdclk +ffffffff81ab2050 t skl_plane_max_stride +ffffffff81ab20f0 t icl_plane_update_noarm +ffffffff81ab29a0 t icl_plane_update_arm +ffffffff81ab2b10 t icl_plane_disable_arm +ffffffff81ab2c20 t skl_plane_update_noarm +ffffffff81ab2dc0 t skl_plane_update_arm +ffffffff81ab30d0 t skl_plane_disable_arm +ffffffff81ab3180 t skl_plane_get_hw_state +ffffffff81ab3250 t skl_plane_check +ffffffff81ab3e70 t skl_plane_async_flip +ffffffff81ab3fa0 t skl_plane_enable_flip_done +ffffffff81ab4000 t skl_plane_disable_flip_done +ffffffff81ab4060 T skl_get_initial_plane_config +ffffffff81ab4780 t skl_plane_aux_dist +ffffffff81ab4870 t skl_surf_address +ffffffff81ab4990 t skl_plane_check_nv12_rotation +ffffffff81ab4a30 t skl_plane_ctl +ffffffff81ab50a0 t glk_plane_color_ctl +ffffffff81ab51e0 t skl_check_main_ccs_coordinates +ffffffff81ab5370 t gen12_plane_format_mod_supported +ffffffff81ab55c0 t skl_plane_format_mod_supported +ffffffff81ab6000 T intel_enabled_dbuf_slices_mask +ffffffff81ab6130 T intel_sagv_pre_plane_update +ffffffff81ab62c0 T intel_sagv_post_plane_update +ffffffff81ab6530 T intel_can_enable_sagv +ffffffff81ab65a0 T skl_ddb_dbuf_slice_mask +ffffffff81ab6650 T skl_write_plane_wm +ffffffff81ab6a70 T skl_write_cursor_wm +ffffffff81ab6dd0 T skl_ddb_allocation_overlaps +ffffffff81ab6e70 T skl_wm_get_hw_state +ffffffff81ab7430 t skl_pipe_wm_get_hw_state +ffffffff81ab7780 t skl_compute_dbuf_slices +ffffffff81ab7c80 T skl_wm_sanitize +ffffffff81ab7ee0 T intel_wm_state_verify +ffffffff81ab8790 T skl_watermark_ipc_enabled +ffffffff81ab87c0 T skl_watermark_ipc_update +ffffffff81ab8870 T skl_watermark_ipc_init +ffffffff81ab8970 T skl_wm_init +ffffffff81ab9070 T intel_atomic_get_dbuf_state +ffffffff81ab9090 T intel_dbuf_init +ffffffff81ab9100 T intel_dbuf_pre_plane_update +ffffffff81ab93e0 T intel_dbuf_post_plane_update +ffffffff81ab94b0 T intel_mbus_dbox_update +ffffffff81ab9720 T skl_watermark_ipc_debugfs_register +ffffffff81ab9750 t skl_sagv_disable +ffffffff81ab9870 t skl_ddb_entry_for_slices +ffffffff81ab99b0 t skl_compute_wm +ffffffff81abc7e0 t skl_build_plane_wm_single +ffffffff81abcaf0 t skl_compute_wm_params +ffffffff81abcee0 t skl_compute_plane_wm +ffffffff81abd3b0 t intel_dbuf_duplicate_state +ffffffff81abd440 t intel_dbuf_destroy_state +ffffffff81abe000 T pixel_format_from_register_bits +ffffffff81abe060 T vlv_dsi_wait_for_fifo_empty +ffffffff81abe120 T vlv_dsi_init +ffffffff81abe960 t intel_dsi_compute_config +ffffffff81abeab0 t intel_dsi_pre_enable +ffffffff81ac0670 t bxt_dsi_enable +ffffffff81ac06d0 t intel_dsi_disable +ffffffff81ac0980 t intel_dsi_post_disable +ffffffff81ac1600 t intel_dsi_get_hw_state +ffffffff81ac18d0 t intel_dsi_get_config +ffffffff81ac2070 t intel_dsi_shutdown +ffffffff81ac2160 t intel_dsi_encoder_destroy +ffffffff81ac2190 t intel_dsi_prepare +ffffffff81ac2e80 t dpi_send_cmd +ffffffff81ac3000 t intel_dsi_host_attach +ffffffff81ac3030 t intel_dsi_host_detach +ffffffff81ac3060 t intel_dsi_host_transfer +ffffffff81ac34c0 t vlv_dsi_mode_valid +ffffffff81ac4000 T vlv_dsi_pll_compute +ffffffff81ac43a0 t vlv_dsi_pclk +ffffffff81ac4540 T vlv_dsi_pll_enable +ffffffff81ac4770 T vlv_dsi_pll_disable +ffffffff81ac47f0 T bxt_dsi_pll_is_enabled +ffffffff81ac48c0 T bxt_dsi_pll_disable +ffffffff81ac49c0 T vlv_dsi_get_pclk +ffffffff81ac4a60 T bxt_dsi_get_pclk +ffffffff81ac4b20 T vlv_dsi_reset_clocks +ffffffff81ac4bb0 T bxt_dsi_pll_compute +ffffffff81ac4d50 T bxt_dsi_pll_enable +ffffffff81ac50c0 T bxt_dsi_reset_clocks +ffffffff81ac51e0 T assert_dsi_pll_enabled +ffffffff81ac52c0 T assert_dsi_pll_disabled +ffffffff81ac6000 T i915_gem_busy_ioctl +ffffffff81ac7000 T i915_gem_clflush_object +ffffffff81ac7200 t clflush_work +ffffffff81ac7260 t clflush_release +ffffffff81ac8000 T i915_lut_handle_alloc +ffffffff81ac8020 T i915_lut_handle_free +ffffffff81ac8040 T i915_gem_context_release +ffffffff81ac8070 T i915_gem_init__contexts +ffffffff81ac80d0 T i915_gem_context_open +ffffffff81ac8230 t i915_gem_create_context +ffffffff81ac89a0 t proto_context_close +ffffffff81ac8a50 t gem_context_register +ffffffff81ac8bf0 T i915_gem_context_close +ffffffff81ac8d40 t context_close +ffffffff81ac93e0 T i915_gem_vm_create_ioctl +ffffffff81ac94f0 t xa_alloc +ffffffff81ac9570 T i915_gem_vm_destroy_ioctl +ffffffff81ac9620 T i915_gem_user_to_context_sseu +ffffffff81ac9880 T i915_gem_context_lookup +ffffffff81ac99b0 T i915_gem_context_create_ioctl +ffffffff81ac9c20 t proto_context_register +ffffffff81ac9d70 T i915_gem_context_destroy_ioctl +ffffffff81ac9e90 T i915_gem_context_getparam_ioctl +ffffffff81aca2b0 T i915_gem_context_setparam_ioctl +ffffffff81aca760 t set_proto_ctx_param +ffffffff81acae00 T i915_gem_context_reset_stats_ioctl +ffffffff81acaf00 T i915_gem_engines_iter_next +ffffffff81acaf50 T i915_gem_context_module_exit +ffffffff81acaf70 T i915_gem_context_module_init +ffffffff81acafd0 t i915_gem_context_release_work +ffffffff81acb0a0 t intel_context_set_gem +ffffffff81acb1b0 t engines_notify +ffffffff81acb320 t intel_context_unpin +ffffffff81acb3b0 t kill_engines +ffffffff81acb540 t create_setparam +ffffffff81acb5b0 t invalid_ext +ffffffff81acb5e0 t lookup_user_engine +ffffffff81acb6a0 t set_proto_ctx_engines_balance +ffffffff81acb980 t set_proto_ctx_engines_bond +ffffffff81acbd00 t set_proto_ctx_engines_parallel_submit +ffffffff81acd000 T __i915_gem_object_create_user +ffffffff81acd020 t __i915_gem_object_create_user_ext +ffffffff81acd4d0 T i915_gem_dumb_create +ffffffff81acd640 T i915_gem_create_ioctl +ffffffff81acd710 T i915_gem_create_ext_ioctl +ffffffff81acd8d0 t ext_set_placements +ffffffff81acdce0 t ext_set_protected +ffffffff81ace000 T i915_gem_prime_export +ffffffff81ace090 T i915_gem_prime_import +ffffffff81acf000 T i915_gem_cpu_write_needs_clflush +ffffffff81acf060 T i915_gem_object_flush_if_display +ffffffff81acf270 t i915_gem_object_unlock +ffffffff81acf330 T i915_gem_object_flush_if_display_locked +ffffffff81acf3b0 T i915_gem_object_set_to_wc_domain +ffffffff81acf4b0 t flush_write_domain +ffffffff81acf600 T i915_gem_object_set_to_gtt_domain +ffffffff81acf750 T i915_gem_object_set_cache_level +ffffffff81acf7f0 T i915_gem_get_caching_ioctl +ffffffff81acf890 T i915_gem_set_caching_ioctl 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intel_timeline_create_from_engine +ffffffff81b412e0 T __intel_timeline_pin +ffffffff81b41310 T intel_timeline_pin +ffffffff81b41430 T intel_timeline_reset_seqno +ffffffff81b41460 T intel_timeline_enter +ffffffff81b41540 T intel_timeline_exit +ffffffff81b41610 T intel_timeline_get_seqno +ffffffff81b41670 t __intel_timeline_get_seqno +ffffffff81b41710 T intel_timeline_read_hwsp +ffffffff81b417e0 T intel_timeline_unpin +ffffffff81b41830 T __intel_timeline_free +ffffffff81b418c0 T intel_gt_fini_timelines +ffffffff81b418f0 T intel_gt_show_timelines +ffffffff81b41c80 t __timeline_active +ffffffff81b41cc0 t __timeline_retire +ffffffff81b42000 T intel_engine_init_ctx_wa +ffffffff81b42b00 T intel_engine_emit_ctx_wa +ffffffff81b42c20 T intel_gt_init_workarounds +ffffffff81b43e40 T intel_gt_apply_workarounds +ffffffff81b43e60 t wa_list_apply +ffffffff81b43fa0 T intel_gt_verify_workarounds +ffffffff81b44110 T intel_engine_init_whitelist +ffffffff81b445c0 t tgl_whitelist_build +ffffffff81b446b0 t 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dg1_irq_handler +ffffffff81b89760 t gen11_irq_handler +ffffffff81b898b0 t gen8_irq_handler +ffffffff81b89990 t ilk_irq_handler +ffffffff81b8a840 t i9xx_pipestat_irq_ack +ffffffff81b8a9b0 t i9xx_hpd_irq_handler +ffffffff81b8abc0 t valleyview_pipestat_irq_handler +ffffffff81b8adc0 t i9xx_pipe_crc_irq_handler +ffffffff81b8af10 t gen8_de_irq_handler +ffffffff81b8c260 t ilk_hpd_irq_handler +ffffffff81b8c380 t cpt_irq_handler +ffffffff81b8c7a0 t ibx_hpd_irq_handler +ffffffff81b8c940 t i915_enable_asle_pipestat +ffffffff81b8cb30 t gen8_de_irq_postinstall +ffffffff81b8e000 T i915_memcpy_from_wc +ffffffff81b8e120 T i915_unaligned_memcpy_from_wc +ffffffff81b8e240 T i915_memcpy_init_early +ffffffff81b8f000 T i915_mitigate_clear_residuals +ffffffff81b90000 T i915_init +ffffffff81b90230 t i915_check_nomodeset +ffffffff81b902b0 t i915_mock_selftests +ffffffff81b902e0 t i915_pmu_init +ffffffff81b90310 t i915_pmu_exit +ffffffff81b91000 T i915_params_dump +ffffffff81b94120 T i915_params_copy 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T __i915_sched_node_add_dependency +ffffffff81ba17c0 T i915_sched_node_add_dependency +ffffffff81ba1900 T i915_sched_node_fini +ffffffff81ba19e0 T i915_request_show_with_schedule +ffffffff81ba1ad0 T i915_sched_engine_create +ffffffff81ba1b80 t default_destroy +ffffffff81ba1bd0 t default_disabled +ffffffff81ba1c00 T i915_scheduler_module_exit +ffffffff81ba1c30 T i915_scheduler_module_init +ffffffff81ba2000 T i915_save_display +ffffffff81ba2360 T i915_restore_display +ffffffff81ba3000 T i915_sw_fence_complete +ffffffff81ba3040 t __i915_sw_fence_complete +ffffffff81ba31c0 T i915_sw_fence_await +ffffffff81ba3240 T __i915_sw_fence_init +ffffffff81ba32b0 T i915_sw_fence_reinit +ffffffff81ba32f0 T i915_sw_fence_commit +ffffffff81ba3330 T i915_sw_fence_await_sw_fence +ffffffff81ba3350 t __i915_sw_fence_await_sw_fence +ffffffff81ba3570 T i915_sw_fence_await_sw_fence_gfp +ffffffff81ba3590 T i915_sw_fence_await_dma_fence +ffffffff81ba37c0 t dma_i915_sw_fence_wake +ffffffff81ba3840 t irq_i915_sw_fence_work +ffffffff81ba3880 t timer_i915_sw_fence_wake +ffffffff81ba3960 t dma_i915_sw_fence_wake_timer +ffffffff81ba39f0 T __i915_sw_fence_await_dma_fence +ffffffff81ba3b30 t __dma_i915_sw_fence_wake +ffffffff81ba3b90 T i915_sw_fence_await_reservation +ffffffff81ba3c70 t i915_sw_fence_wake +ffffffff81ba4000 T dma_fence_work_init +ffffffff81ba4080 t fence_notify +ffffffff81ba4170 t fence_work +ffffffff81ba41d0 T dma_fence_work_chain +ffffffff81ba4220 t get_driver_name +ffffffff81ba4250 t get_timeline_name +ffffffff81ba4290 t fence_release +ffffffff81ba5000 T i915_switcheroo_register +ffffffff81ba5030 T i915_switcheroo_unregister +ffffffff81ba6000 T i915_syncmap_init +ffffffff81ba6030 T i915_syncmap_is_later +ffffffff81ba6130 T i915_syncmap_set +ffffffff81ba61e0 t __sync_set +ffffffff81ba64d0 T i915_syncmap_free +ffffffff81ba6530 t __sync_free +ffffffff81ba7000 T i915_setup_sysfs +ffffffff81ba7030 T i915_teardown_sysfs +ffffffff81ba8000 T i915_ttm_buddy_man_init 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i915_vma_instance +ffffffff81bac110 t vma_create +ffffffff81bac5a0 T i915_vma_work +ffffffff81bac610 T i915_vma_wait_for_bind +ffffffff81bac690 T i915_vma_bind +ffffffff81bac9e0 T i915_vma_pin_iomap +ffffffff81bacbb0 T i915_vma_flush_writes +ffffffff81bacc00 T i915_vma_unpin_iomap +ffffffff81bacc70 T i915_vma_unpin_and_release +ffffffff81bacce0 T i915_vma_misplaced +ffffffff81bacd80 T __i915_vma_set_map_and_fenceable +ffffffff81bacdf0 T i915_gem_valid_gtt_space +ffffffff81bace80 T vma_invalidate_tlb +ffffffff81bacec0 T i915_vma_pin_ww +ffffffff81bad590 t i915_vma_insert +ffffffff81bad8f0 T i915_ggtt_pin +ffffffff81bad9d0 t __i915_ggtt_pin +ffffffff81badb40 t i915_gem_object_lock +ffffffff81badd50 T i915_vma_close +ffffffff81bade20 T i915_vma_reopen +ffffffff81badea0 T i915_vma_destroy_locked +ffffffff81badf90 t release_references +ffffffff81bae0c0 T i915_vma_destroy +ffffffff81bae200 T i915_vma_parked +ffffffff81bae4d0 T i915_vma_revoke_mmap +ffffffff81bae5d0 T _i915_vma_move_to_active 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T i915_vma_resource_unbind +ffffffff81bb0300 T __i915_vma_resource_init +ffffffff81bb0360 t i915_vma_resource_fence_notify +ffffffff81bb0420 T i915_vma_resource_bind_dep_sync +ffffffff81bb05a0 T i915_vma_resource_bind_dep_sync_all +ffffffff81bb0640 T i915_vma_resource_bind_dep_await +ffffffff81bb07e0 T i915_vma_resource_module_exit +ffffffff81bb0800 T i915_vma_resource_module_init +ffffffff81bb0860 t get_driver_name +ffffffff81bb0890 t get_timeline_name +ffffffff81bb08c0 t unbind_fence_release +ffffffff81bb0900 t i915_vma_resource_unbind_work +ffffffff81bb1000 T intel_platform_name +ffffffff81bb1090 T intel_device_info_print +ffffffff81bb1d30 T intel_device_info_subplatform_init +ffffffff81bb20e0 T intel_device_info_runtime_init +ffffffff81bb27d0 T intel_driver_caps_print +ffffffff81bb3000 T intel_dram_detect +ffffffff81bb31b0 t gen11_get_dram_info +ffffffff81bb3200 t bxt_get_dram_info +ffffffff81bb3510 t skl_get_dram_info +ffffffff81bb36f0 T intel_dram_edram_detect +ffffffff81bb3780 t icl_pcode_read_mem_global_info +ffffffff81bb3860 t skl_dram_get_channel_info +ffffffff81bb3a30 t skl_dram_get_dimm_info +ffffffff81bb4000 T intel_memory_region_lookup +ffffffff81bb40e0 T intel_memory_region_by_type +ffffffff81bb41a0 T intel_memory_region_reserve +ffffffff81bb41c0 T intel_memory_region_debug +ffffffff81bb4220 T intel_memory_region_create +ffffffff81bb4390 T intel_memory_region_set_name +ffffffff81bb4410 T intel_memory_region_avail +ffffffff81bb4490 T intel_memory_region_destroy +ffffffff81bb4500 T intel_memory_regions_hw_probe +ffffffff81bb4650 T intel_memory_regions_driver_release +ffffffff81bb5000 T intel_detect_pch +ffffffff81bb51b0 t intel_pch_match +ffffffff81bb5200 t intel_pch_type +ffffffff81bb59c0 t intel_virt_detect_pch +ffffffff81bb6000 T snb_pcode_read +ffffffff81bb60d0 t __snb_pcode_rw +ffffffff81bb6260 T snb_pcode_write_timeout +ffffffff81bb6330 T skl_pcode_request +ffffffff81bb6670 T intel_pcode_init +ffffffff81bb66d0 T snb_pcode_read_p +ffffffff81bb67e0 T snb_pcode_write_p +ffffffff81bb7000 T intel_set_memory_cxsr +ffffffff81bb70a0 t _intel_set_memory_cxsr +ffffffff81bb7340 T intel_wm_plane_visible +ffffffff81bb73a0 T ilk_wm_max_level +ffffffff81bb7410 T intel_print_wm_latency +ffffffff81bb7570 T ilk_disable_lp_wm +ffffffff81bb7650 T g4x_wm_get_hw_state +ffffffff81bb7e50 T g4x_wm_sanitize +ffffffff81bb7ff0 t g4x_program_watermarks +ffffffff81bb8390 T vlv_wm_get_hw_state +ffffffff81bb9010 t vlv_invalidate_wms +ffffffff81bb9190 T vlv_wm_sanitize +ffffffff81bb92f0 t vlv_program_watermarks +ffffffff81bb9a40 T ilk_wm_get_hw_state +ffffffff81bb9ec0 T intel_init_clock_gating +ffffffff81bb9ee0 T intel_suspend_hw +ffffffff81bb9f90 T intel_init_clock_gating_hooks +ffffffff81bba1f0 T intel_init_pm +ffffffff81bbac20 t intel_get_cxsr_latency +ffffffff81bbace0 T intel_pm_setup +ffffffff81bbad20 t chv_set_memory_dvfs +ffffffff81bbaee0 t pvc_init_clock_gating +ffffffff81bbb090 t dg2_init_clock_gating +ffffffff81bbb1e0 t xehpsdv_init_clock_gating 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t i85x_init_clock_gating +ffffffff81bbd4c0 t i830_init_clock_gating +ffffffff81bbd4f0 t nop_init_clock_gating +ffffffff81bbd520 t ilk_compute_pipe_wm +ffffffff81bbd8c0 t ilk_compute_intermediate_wm +ffffffff81bbdb10 t ilk_initial_watermarks +ffffffff81bbdb90 t ilk_optimize_watermarks +ffffffff81bbdc40 t ilk_compute_wm_level +ffffffff81bbe1b0 t ilk_validate_wm_level +ffffffff81bbe2f0 t ilk_compute_wm_maximums +ffffffff81bbe520 t ilk_program_watermarks +ffffffff81bbf210 t ilk_wm_merge +ffffffff81bbf490 t vlv_compute_pipe_wm +ffffffff81bc0280 t vlv_compute_intermediate_wm +ffffffff81bc05a0 t vlv_initial_watermarks +ffffffff81bc0620 t vlv_atomic_update_fifo +ffffffff81bc0920 t vlv_optimize_watermarks +ffffffff81bc09e0 t g4x_compute_pipe_wm +ffffffff81bc1690 t g4x_compute_intermediate_wm +ffffffff81bc1af0 t g4x_initial_watermarks +ffffffff81bc1b90 t g4x_optimize_watermarks +ffffffff81bc1c70 t pnv_update_wm +ffffffff81bc2330 t i965_update_wm +ffffffff81bc26f0 t i9xx_update_wm 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intel_wopcm_init_early +ffffffff81bd1080 T intel_wopcm_init +ffffffff81bd2000 T vlv_iosf_sb_get +ffffffff81bd2020 T vlv_iosf_sb_put +ffffffff81bd2040 T vlv_punit_read +ffffffff81bd2090 t vlv_sideband_rw +ffffffff81bd2240 T vlv_punit_write +ffffffff81bd2290 T vlv_bunit_read +ffffffff81bd22e0 T vlv_bunit_write +ffffffff81bd2330 T vlv_nc_read +ffffffff81bd2380 T vlv_iosf_sb_read +ffffffff81bd23d0 T vlv_iosf_sb_write +ffffffff81bd2420 T vlv_cck_read +ffffffff81bd2470 T vlv_cck_write +ffffffff81bd24c0 T vlv_ccu_read +ffffffff81bd2510 T vlv_ccu_write +ffffffff81bd2560 T vlv_dpio_read +ffffffff81bd2630 T vlv_dpio_write +ffffffff81bd26a0 T vlv_flisdsi_read +ffffffff81bd26f0 T vlv_flisdsi_write +ffffffff81bd3000 T vlv_suspend_complete +ffffffff81bd3a40 T vlv_resume_prepare +ffffffff81bd4480 T vlv_suspend_init +ffffffff81bd44f0 T vlv_suspend_cleanup +ffffffff81bd4550 t vlv_wait_for_pw_status +ffffffff81bd5000 T atom_execute_table_scratch_unlocked +ffffffff81bd50a0 t atom_execute_table_locked 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radeon_bo_reserve +ffffffff81bdc8f0 t radeon_bo_unreserve +ffffffff81bdc9d0 t atombios_disable_ss +ffffffff81bdcab0 t atombios_crtc_program_pll +ffffffff81bdcd60 t atombios_crtc_prepare +ffffffff81bdce20 t atombios_crtc_commit +ffffffff81bdcea0 t atombios_crtc_mode_fixup +ffffffff81bddbb0 t atombios_crtc_disable +ffffffff81bdde10 t radeon_get_shared_dp_ppll +ffffffff81bddf00 t radeon_get_shared_nondp_ppll +ffffffff81bdf000 T radeon_atom_copy_swap +ffffffff81bdf020 T radeon_dp_aux_init +ffffffff81bdf110 t radeon_dp_aux_transfer_atom +ffffffff81bdf2e0 T radeon_dp_getsinktype +ffffffff81bdf350 T radeon_dp_getdpcd +ffffffff81bdf4c0 T radeon_dp_get_panel_mode +ffffffff81bdf5d0 T radeon_dp_set_link_config +ffffffff81bdf650 t radeon_dp_get_dp_link_config +ffffffff81bdf7e0 T radeon_dp_mode_valid_helper +ffffffff81bdf890 T radeon_dp_needs_link_train +ffffffff81bdf900 T radeon_dp_set_rx_power_state +ffffffff81bdf980 T radeon_dp_link_train +ffffffff81be0100 t radeon_process_aux_ch +ffffffff81be02b0 t dp_get_adjust_train +ffffffff81be1000 T atombios_get_backlight_level +ffffffff81be1070 T atombios_set_backlight_level +ffffffff81be1220 T atombios_dig_transmitter_setup +ffffffff81be1240 T radeon_atom_backlight_init +ffffffff81be1420 t radeon_atom_backlight_get_brightness +ffffffff81be1480 T atombios_dvo_setup +ffffffff81be1640 T atombios_digital_setup +ffffffff81be1900 T atombios_get_encoder_mode +ffffffff81be1b90 T atombios_dig_encoder_setup2 +ffffffff81be1fd0 T atombios_dig_encoder_setup +ffffffff81be1ff0 T atombios_dig_transmitter_setup2 +ffffffff81be29d0 T atombios_set_edp_panel_power +ffffffff81be2ae0 T radeon_atom_release_dig_encoder +ffffffff81be2b20 T radeon_atom_pick_dig_encoder +ffffffff81be2d40 T radeon_atom_encoder_init +ffffffff81be2e10 t atombios_external_encoder_setup +ffffffff81be3080 T radeon_atom_ext_encoder_setup_ddc +ffffffff81be30d0 T radeon_enc_destroy +ffffffff81be3180 T radeon_add_atom_encoder +ffffffff81be3590 t radeon_atombios_set_dig_info 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btc_get_max_clock_from_voltage_dependency_table +ffffffff81be70d0 T btc_apply_voltage_dependency_rules +ffffffff81be7140 T btc_skip_blacklist_clocks +ffffffff81be7230 T btc_adjust_clock_combinations +ffffffff81be7360 T btc_apply_voltage_delta_rules +ffffffff81be7480 T btc_program_mgcg_hw_sequence +ffffffff81be7580 T btc_dpm_enabled +ffffffff81be7590 T btc_notify_uvd_to_smc +ffffffff81be7600 T btc_reset_to_default +ffffffff81be7650 T btc_read_arb_registers +ffffffff81be76e0 T btc_dpm_vblank_too_short +ffffffff81be7750 T btc_dpm_pre_set_power_state +ffffffff81be8970 T btc_dpm_set_power_state +ffffffff81be8ca0 t btc_set_power_state_conditionally_enable_ulv +ffffffff81be8dd0 T btc_dpm_post_set_power_state +ffffffff81be8ef0 t btc_update_current_ps +ffffffff81be8ff0 T btc_dpm_enable +ffffffff81be9ed0 t btc_cg_clock_gating_enable +ffffffff81bea000 t btc_mg_clock_gating_enable +ffffffff81bea120 t btc_ls_clock_gating_enable +ffffffff81bea250 t btc_init_stutter_mode +ffffffff81bea2d0 T btc_dpm_disable +ffffffff81bea5b0 T btc_dpm_setup_asic +ffffffff81bea690 T btc_dpm_init +ffffffff81beaa80 T btc_dpm_fini +ffffffff81beab30 T btc_dpm_debugfs_print_current_performance_level +ffffffff81beab80 T btc_dpm_get_current_sclk +ffffffff81beac00 T btc_dpm_get_current_mclk +ffffffff81beac80 T btc_dpm_get_sclk +ffffffff81beacd0 T btc_dpm_get_mclk +ffffffff81beb000 T ci_dpm_powergate_uvd +ffffffff81beb380 T ci_dpm_vblank_too_short +ffffffff81beb410 T ci_fan_ctrl_get_fan_speed_percent +ffffffff81beb4b0 T ci_fan_ctrl_set_fan_speed_percent +ffffffff81beb580 T ci_fan_ctrl_set_mode +ffffffff81beb720 t ci_fan_ctrl_set_static_mode +ffffffff81beb7e0 t ci_thermal_start_smc_fan_control +ffffffff81beba20 T ci_fan_ctrl_get_mode +ffffffff81beba80 T ci_dpm_force_performance_level +ffffffff81bec310 t ci_upload_dpm_level_enable_mask +ffffffff81bec640 T ci_dpm_pre_set_power_state +ffffffff81bec930 T ci_dpm_post_set_power_state +ffffffff81beca00 T ci_dpm_setup_asic +ffffffff81becc00 T ci_dpm_enable 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ci_update_and_upload_mc_reg_table +ffffffff81bf2670 t ci_unfreeze_sclk_mclk_dpm +ffffffff81bf2820 t ci_notify_link_speed_change_after_state_change +ffffffff81bf2950 T ci_dpm_display_configuration_changed +ffffffff81bf2ae0 T ci_dpm_fini +ffffffff81bf2b90 T ci_dpm_init +ffffffff81bf39f0 t ci_initialize_powertune_defaults +ffffffff81bf3ae0 t ci_get_leakage_voltages +ffffffff81bf3c90 t ci_patch_dependency_tables_with_leakage +ffffffff81bf4300 t ci_set_private_data_variables_based_on_pptable +ffffffff81bf4410 T ci_dpm_debugfs_print_current_performance_level +ffffffff81bf4550 T ci_dpm_print_power_state +ffffffff81bf4610 T ci_dpm_get_current_sclk +ffffffff81bf46e0 T ci_dpm_get_current_mclk +ffffffff81bf47b0 T ci_dpm_get_sclk +ffffffff81bf4800 T ci_dpm_get_mclk +ffffffff81bf4850 t ci_set_valid_flag +ffffffff81bf48f0 t ci_populate_all_graphic_levels +ffffffff81bf4e80 t ci_populate_all_memory_levels +ffffffff81bf5780 t ci_populate_smc_vce_level +ffffffff81bf58a0 t ci_populate_smc_acp_level +ffffffff81bf59a0 t ci_populate_smc_samu_level +ffffffff81bf5aa0 t ci_do_program_memory_timing_parameters +ffffffff81bf5cc0 t ci_populate_smc_uvd_level +ffffffff81bf5e10 t ci_populate_smc_initial_state +ffffffff81bf5eb0 t ci_populate_bapm_parameters_in_dpm_table +ffffffff81bf6040 t ci_populate_smc_voltage_table +ffffffff81bf6160 t ci_min_max_v_gnbl_pm_lid_from_bapm_vddc +ffffffff81bf63c0 t ci_enable_sclk_mclk_dpm +ffffffff81bf6730 t ci_thermal_enable_alert +ffffffff81bf68e0 t ci_enable_vce_dpm +ffffffff81bf7000 T ci_copy_bytes_to_smc +ffffffff81bf7240 T ci_start_smc +ffffffff81bf7280 T ci_reset_smc +ffffffff81bf72c0 T ci_program_jump_on_start +ffffffff81bf72f0 T ci_stop_smc_clock +ffffffff81bf7330 T ci_start_smc_clock +ffffffff81bf7370 T ci_is_smc_running +ffffffff81bf73e0 T ci_load_smc_ucode +ffffffff81bf7570 T ci_read_smc_sram_dword +ffffffff81bf7640 T ci_write_smc_sram_dword +ffffffff81bf8000 T cik_get_allowed_info_register +ffffffff81bf80a0 T cik_didt_rreg +ffffffff81bf8140 T cik_didt_wreg +ffffffff81bf81c0 T ci_get_temp +ffffffff81bf8210 T kv_get_temp +ffffffff81bf8260 T cik_pciep_rreg +ffffffff81bf82e0 T cik_pciep_wreg +ffffffff81bf8350 T cik_get_xclk +ffffffff81bf83c0 T cik_mm_rdoorbell +ffffffff81bf8420 T cik_mm_wdoorbell +ffffffff81bf8470 T ci_mc_load_microcode +ffffffff81bf87b0 T cik_ring_test +ffffffff81bf8a50 T cik_fence_gfx_ring_emit +ffffffff81bf8e40 T cik_fence_compute_ring_emit +ffffffff81bf90c0 T cik_semaphore_ring_emit +ffffffff81bf9280 T cik_copy_cpdma +ffffffff81bf96d0 T cik_ring_ib_execute +ffffffff81bf9c70 T cik_ib_test +ffffffff81bf9f50 T cik_gfx_get_rptr +ffffffff81bf9fb0 T cik_gfx_get_wptr +ffffffff81bf9ff0 T cik_gfx_set_wptr +ffffffff81bfa030 T cik_compute_get_rptr +ffffffff81bfa110 T cik_compute_get_wptr +ffffffff81bfa1f0 T cik_compute_set_wptr +ffffffff81bfa270 T cik_gpu_check_soft_reset +ffffffff81bfa3e0 T cik_asic_reset +ffffffff81bfa7f0 t cik_gpu_pci_config_reset +ffffffff81bfb000 T cik_gfx_is_lockup +ffffffff81bfb070 T cik_pcie_gart_tlb_flush +ffffffff81bfb0c0 T cik_ib_parse +ffffffff81bfb0f0 T cik_vm_init +ffffffff81bfb150 T cik_vm_fini +ffffffff81bfb180 T cik_vm_flush +ffffffff81bfbdf0 T cik_enter_rlc_safe_mode +ffffffff81bfbee0 T cik_exit_rlc_safe_mode +ffffffff81bfbf20 T cik_update_cg +ffffffff81bfc410 t cik_enable_mgcg +ffffffff81bfc930 t cik_enable_cgcg +ffffffff81bfcca0 T cik_init_cp_pg_table +ffffffff81bfcf10 T cik_get_csb_size +ffffffff81bfcfa0 T cik_get_csb_buffer +ffffffff81bfd130 T cik_irq_set +ffffffff81bfdeb0 t cik_disable_interrupt_state +ffffffff81bfe370 T cik_irq_process +ffffffff81bffb40 t cik_irq_ack +ffffffff81c004c0 T cik_resume +ffffffff81c00550 t cik_init_golden_registers +ffffffff81c00710 t cik_startup +ffffffff81c034e0 T cik_suspend +ffffffff81c038d0 T cik_init +ffffffff81c03df0 t cik_init_microcode +ffffffff81c04b40 t cik_uvd_init +ffffffff81c04bf0 t cik_vce_init +ffffffff81c04cc0 t cik_cp_fini +ffffffff81c04d40 t cik_irq_fini +ffffffff81c04e50 t cik_mec_fini +ffffffff81c04f00 t cik_pcie_gart_fini +ffffffff81c05000 T cik_fini +ffffffff81c05320 T dce8_program_fmt +ffffffff81c05450 T dce8_bandwidth_update +ffffffff81c06060 T cik_get_gpu_clock_counter +ffffffff81c06120 T cik_set_uvd_clocks +ffffffff81c061a0 t cik_set_uvd_clock +ffffffff81c06310 T cik_set_vce_clocks +ffffffff81c06550 t cik_wait_for_rlc_serdes +ffffffff81c06710 t cik_mec_init +ffffffff81c068f0 t cik_uvd_start +ffffffff81c069d0 t cik_vce_start +ffffffff81c06ae0 t cik_irq_init +ffffffff81c07660 t cik_cp_resume +ffffffff81c08e00 t cik_uvd_resume +ffffffff81c08ed0 t cik_vce_resume +ffffffff81c08fc0 t pcie_capability_set_word +ffffffff81c090d0 t pcie_capability_read_word +ffffffff81c09170 t pcie_capability_clear_and_set_word +ffffffff81c09290 t pcie_capability_write_word +ffffffff81c09350 t cik_get_cu_active_bitmap +ffffffff81c094d0 t radeon_bo_reserve +ffffffff81c09640 t radeon_bo_unreserve +ffffffff81c09720 t cik_update_gfx_pg +ffffffff81c098c0 t cik_compute_stop +ffffffff81c09a30 t cik_cp_compute_fini +ffffffff81c09bd0 t request_firmware +ffffffff81c09c60 t release_firmware +ffffffff81c09ca0 t dce8_latency_watermark +ffffffff81c0a000 T cik_sdma_get_rptr +ffffffff81c0a070 T cik_sdma_get_wptr +ffffffff81c0a0c0 T cik_sdma_set_wptr +ffffffff81c0a110 T cik_sdma_ring_ib_execute +ffffffff81c0a510 T cik_sdma_fence_ring_emit +ffffffff81c0a6e0 t cik_sdma_hdp_flush_ring_emit +ffffffff81c0a910 T cik_sdma_semaphore_ring_emit +ffffffff81c0aa30 T cik_sdma_enable +ffffffff81c0ac10 T cik_sdma_resume +ffffffff81c0b0f0 T cik_sdma_fini +ffffffff81c0b130 T cik_copy_dma +ffffffff81c0b530 T cik_sdma_ring_test +ffffffff81c0b7e0 T cik_sdma_ib_test +ffffffff81c0ba40 T cik_sdma_is_lockup +ffffffff81c0bac0 T cik_sdma_vm_copy_pages +ffffffff81c0bbd0 T cik_sdma_vm_write_pages +ffffffff81c0bd40 T cik_sdma_vm_set_pages +ffffffff81c0bec0 T cik_sdma_vm_pad_ib +ffffffff81c0bf10 T cik_dma_vm_flush +ffffffff81c0d000 T cypress_enable_spread_spectrum +ffffffff81c0d140 T cypress_start_dpm +ffffffff81c0d190 T cypress_enable_sclk_control +ffffffff81c0d1f0 T cypress_enable_mclk_control +ffffffff81c0d250 T cypress_notify_smc_display_change +ffffffff81c0d2a0 T cypress_program_response_times +ffffffff81c0d360 T cypress_advertise_gen2_capability +ffffffff81c0d430 T cypress_notify_link_speed_change_after_state_change +ffffffff81c0d4f0 T cypress_notify_link_speed_change_before_state_change +ffffffff81c0d5b0 T cypress_get_strobe_mode_settings +ffffffff81c0d6b0 T cypress_get_mclk_frequency_ratio +ffffffff81c0d760 T cypress_map_clkf_to_ibias +ffffffff81c0d820 T cypress_convert_power_level_to_smc +ffffffff81c0dbf0 t cypress_populate_mclk_value +ffffffff81c0e000 T cypress_upload_sw_state +ffffffff81c0e180 T cypress_upload_mc_reg_table +ffffffff81c0e240 t cypress_convert_mc_reg_table_to_smc +ffffffff81c0e4d0 T cypress_calculate_burst_time +ffffffff81c0e560 T cypress_program_memory_timing_parameters +ffffffff81c0e700 T cypress_populate_smc_initial_state +ffffffff81c0eab0 T cypress_populate_smc_acpi_state +ffffffff81c0ee30 T cypress_construct_voltage_tables +ffffffff81c0efc0 T cypress_populate_smc_voltage_tables +ffffffff81c0f0f0 T cypress_get_mvdd_configuration +ffffffff81c0f1c0 T cypress_populate_mc_reg_table +ffffffff81c0f410 T cypress_get_table_locations +ffffffff81c0f4f0 T cypress_enable_display_gap +ffffffff81c0f550 T cypress_dpm_setup_asic +ffffffff81c0f640 T cypress_dpm_enable +ffffffff81c10110 t cypress_force_mc_use_s1 +ffffffff81c10390 t cypress_gfx_clock_gating_enable +ffffffff81c106a0 t cypress_mg_clock_gating_enable +ffffffff81c10920 T cypress_dpm_disable +ffffffff81c10b50 T cypress_dpm_set_power_state +ffffffff81c10d90 T cypress_dpm_display_configuration_changed +ffffffff81c10e70 T cypress_dpm_init +ffffffff81c110e0 T cypress_dpm_fini +ffffffff81c11170 T cypress_dpm_vblank_too_short +ffffffff81c111e0 t cypress_wait_for_mc_sequencer +ffffffff81c12000 T dce3_2_afmt_hdmi_write_speaker_allocation +ffffffff81c12070 T dce3_2_afmt_dp_write_speaker_allocation +ffffffff81c120e0 T dce3_2_afmt_write_sad_regs +ffffffff81c121e0 T dce3_2_audio_set_dto +ffffffff81c12320 T dce3_2_hdmi_update_acr +ffffffff81c12680 T dce3_2_set_audio_packet +ffffffff81c12810 T dce3_2_set_mute +ffffffff81c13000 T dce6_endpoint_rreg +ffffffff81c130e0 T dce6_endpoint_wreg +ffffffff81c131d0 T dce6_audio_get_pin +ffffffff81c13360 T dce6_afmt_select_pin +ffffffff81c133f0 T dce6_afmt_write_latency_fields +ffffffff81c134b0 T dce6_afmt_hdmi_write_speaker_allocation +ffffffff81c13580 T dce6_afmt_dp_write_speaker_allocation +ffffffff81c13650 T dce6_afmt_write_sad_regs +ffffffff81c13790 T dce6_audio_enable +ffffffff81c137e0 T dce6_hdmi_audio_set_dto +ffffffff81c13850 T dce6_dp_audio_set_dto +ffffffff81c14000 T eg_cg_rreg +ffffffff81c14080 T eg_cg_wreg +ffffffff81c140f0 T eg_pif_phy0_rreg +ffffffff81c14170 T eg_pif_phy0_wreg +ffffffff81c141d0 T eg_pif_phy1_rreg +ffffffff81c14250 T eg_pif_phy1_wreg +ffffffff81c142b0 T evergreen_get_allowed_info_register +ffffffff81c14340 T evergreen_tiling_fields +ffffffff81c143e0 T sumo_set_uvd_clocks +ffffffff81c144c0 t sumo_set_uvd_clock +ffffffff81c146b0 T evergreen_set_uvd_clocks +ffffffff81c14c30 T evergreen_fix_pci_max_read_req_size +ffffffff81c14df0 T dce4_program_fmt +ffffffff81c14f10 T dce4_wait_for_vblank +ffffffff81c15190 T evergreen_page_flip +ffffffff81c15320 T evergreen_page_flip_pending +ffffffff81c15390 T evergreen_get_temp +ffffffff81c15460 T sumo_get_temp +ffffffff81c154b0 T sumo_pm_init_profile +ffffffff81c155f0 T btc_pm_init_profile +ffffffff81c15700 T evergreen_pm_misc +ffffffff81c158a0 T evergreen_pm_prepare +ffffffff81c159a0 T evergreen_pm_finish +ffffffff81c15aa0 T evergreen_hpd_sense +ffffffff81c15b10 T evergreen_hpd_set_polarity +ffffffff81c15c50 T evergreen_hpd_init +ffffffff81c15d20 T evergreen_hpd_fini +ffffffff81c15dc0 T evergreen_get_number_of_dram_channels +ffffffff81c15e10 T evergreen_bandwidth_update +ffffffff81c15fd0 t evergreen_line_buffer_adjust +ffffffff81c161c0 t evergreen_program_watermarks +ffffffff81c16c20 T evergreen_mc_wait_for_idle +ffffffff81c16cc0 T evergreen_pcie_gart_tlb_flush +ffffffff81c16d90 T evergreen_mc_stop +ffffffff81c17890 T evergreen_mc_resume +ffffffff81c17fa0 T evergreen_mc_program +ffffffff81c183a0 T evergreen_ring_ib_execute +ffffffff81c18830 T evergreen_mc_init +ffffffff81c18970 T evergreen_print_gpu_status_regs +ffffffff81c189a0 T evergreen_is_display_hung +ffffffff81c18ba0 T evergreen_gpu_check_soft_reset +ffffffff81c18d00 T evergreen_gpu_pci_config_reset +ffffffff81c18e80 T evergreen_asic_reset +ffffffff81c191a0 T evergreen_gfx_is_lockup +ffffffff81c19210 T sumo_rlc_fini +ffffffff81c193c0 t radeon_bo_reserve +ffffffff81c19530 t radeon_bo_unreserve +ffffffff81c19610 T sumo_rlc_init +ffffffff81c19de0 T evergreen_rlc_resume +ffffffff81c1a150 T evergreen_get_vblank_counter +ffffffff81c1a1c0 T evergreen_disable_interrupt_state +ffffffff81c1a490 T evergreen_irq_set +ffffffff81c1aa50 T evergreen_irq_suspend +ffffffff81c1aaa0 T evergreen_irq_process +ffffffff81c1b5f0 t evergreen_irq_ack +ffffffff81c1bcb0 T evergreen_resume +ffffffff81c1bd90 t evergreen_init_golden_registers +ffffffff81c1bfa0 t evergreen_startup +ffffffff81c1d830 T evergreen_suspend +ffffffff81c1d9d0 T evergreen_init +ffffffff81c1ddd0 t evergreen_pcie_gart_fini +ffffffff81c1def0 T evergreen_fini +ffffffff81c1e0e0 T evergreen_pcie_gen2_enable +ffffffff81c1e310 T evergreen_program_aspm +ffffffff81c1e9a0 t evergreen_latency_watermark +ffffffff81c1eba0 t evergreen_uvd_start +ffffffff81c1ec50 t evergreen_cp_load_microcode +ffffffff81c1edb0 t evergreen_cp_resume +ffffffff81c1fa20 t evergreen_uvd_resume +ffffffff81c20000 T evergreen_cs_parse +ffffffff81c22760 T evergreen_dma_cs_parse +ffffffff81c238d0 T evergreen_ib_parse +ffffffff81c23d30 T evergreen_dma_ib_parse +ffffffff81c23f00 t evergreen_cs_track_check +ffffffff81c24f70 t evergreen_cs_handle_reg +ffffffff81c26dd0 t evergreen_surface_value_conv_check +ffffffff81c270a0 t evergreen_surface_check +ffffffff81c27510 t evergreen_cs_track_validate_htile +ffffffff81c277b0 t evergreen_vm_reg_valid +ffffffff81c28000 T evergreen_dma_fence_ring_emit +ffffffff81c282b0 T evergreen_dma_ring_ib_execute +ffffffff81c28600 T evergreen_copy_dma +ffffffff81c289a0 T evergreen_dma_is_lockup +ffffffff81c29000 T dce4_audio_enable +ffffffff81c29080 T evergreen_hdmi_update_acr +ffffffff81c292a0 T dce4_afmt_write_latency_fields +ffffffff81c29310 T dce4_afmt_hdmi_write_speaker_allocation +ffffffff81c29380 T dce4_afmt_dp_write_speaker_allocation +ffffffff81c293f0 T evergreen_hdmi_write_sad_regs +ffffffff81c294f0 T evergreen_set_avi_packet +ffffffff81c29690 T dce4_hdmi_audio_set_dto +ffffffff81c29770 T dce4_dp_audio_set_dto +ffffffff81c29860 T dce4_set_vbi_packet +ffffffff81c298d0 T dce4_hdmi_set_color_depth +ffffffff81c29a20 T dce4_set_audio_packet +ffffffff81c29c30 T dce4_set_mute +ffffffff81c29d40 T evergreen_hdmi_enable +ffffffff81c2a070 T evergreen_dp_enable +ffffffff81c2b000 T kv_dpm_enable_bapm +ffffffff81c2b070 T kv_dpm_enable +ffffffff81c2bf70 t kv_populate_vce_table +ffffffff81c2c1f0 t kv_populate_samu_table +ffffffff81c2c450 t kv_populate_acp_table +ffffffff81c2c5e0 t kv_start_am +ffffffff81c2c620 t kv_enable_auto_thermal_throttling +ffffffff81c2c660 t kv_enable_dpm_voltage_scaling +ffffffff81c2c6a0 t kv_set_dpm_interval +ffffffff81c2c6e0 t kv_start_dpm +ffffffff81c2c720 t kv_enable_didt +ffffffff81c2c9d0 T kv_dpm_late_enable +ffffffff81c2cbd0 T kv_dpm_powergate_uvd +ffffffff81c2cd50 T kv_dpm_disable +ffffffff81c2d0c0 T kv_dpm_force_performance_level +ffffffff81c2d240 t kv_force_dpm_lowest +ffffffff81c2d310 T kv_dpm_pre_set_power_state +ffffffff81c2d890 T kv_dpm_set_power_state +ffffffff81c2e060 t kv_set_valid_clock_range +ffffffff81c2e200 t kv_calculate_ds_divider +ffffffff81c2e370 t kv_calculate_nbps_level_settings +ffffffff81c2e4f0 t kv_update_vce_dpm +ffffffff81c2e6d0 T kv_dpm_post_set_power_state +ffffffff81c2e770 T kv_dpm_setup_asic +ffffffff81c2e7d0 T kv_dpm_init +ffffffff81c2f080 T kv_dpm_debugfs_print_current_performance_level +ffffffff81c2f0f0 T kv_dpm_get_current_sclk +ffffffff81c2f160 T kv_dpm_get_current_mclk +ffffffff81c2f190 T kv_dpm_print_power_state +ffffffff81c2f230 T kv_dpm_fini +ffffffff81c2f2d0 T kv_dpm_display_configuration_changed +ffffffff81c2f300 T kv_dpm_get_sclk +ffffffff81c2f350 T kv_dpm_get_mclk +ffffffff81c30000 T kv_notify_message_to_smu +ffffffff81c300c0 T kv_dpm_get_enable_mask +ffffffff81c30190 T kv_send_msg_to_smc_with_parameter +ffffffff81c30260 T kv_read_smc_sram_dword +ffffffff81c302f0 T kv_smc_dpm_enable +ffffffff81c30420 T kv_smc_bapm_enable +ffffffff81c30550 T kv_copy_bytes_to_smc +ffffffff81c31000 T tn_smc_rreg +ffffffff81c31080 T tn_smc_wreg +ffffffff81c310f0 T ni_mc_load_microcode +ffffffff81c312e0 T ni_init_microcode +ffffffff81c317b0 t request_firmware +ffffffff81c31840 t release_firmware +ffffffff81c31880 T cayman_get_allowed_info_register +ffffffff81c31910 T tn_get_temp +ffffffff81c319a0 T cayman_pcie_gart_tlb_flush +ffffffff81c319f0 T cayman_cp_int_cntl_setup +ffffffff81c31a40 T cayman_fence_ring_emit +ffffffff81c31dd0 T cayman_ring_ib_execute +ffffffff81c32230 T cayman_gfx_get_rptr +ffffffff81c322c0 T cayman_gfx_get_wptr +ffffffff81c32330 T cayman_gfx_set_wptr +ffffffff81c323b0 T cayman_gpu_check_soft_reset +ffffffff81c32540 T cayman_asic_reset +ffffffff81c32840 T cayman_gfx_is_lockup +ffffffff81c328b0 T cayman_resume +ffffffff81c32940 t ni_init_golden_registers +ffffffff81c32a20 t cayman_startup +ffffffff81c33e60 T cayman_suspend +ffffffff81c34050 T cayman_init +ffffffff81c343c0 t cayman_uvd_init +ffffffff81c34470 t cayman_vce_init +ffffffff81c34540 t cayman_cp_fini +ffffffff81c345c0 t cayman_pcie_gart_fini +ffffffff81c34700 T cayman_fini +ffffffff81c34980 T cayman_vm_init +ffffffff81c349e0 T cayman_vm_fini +ffffffff81c34a10 T cayman_vm_decode_fault +ffffffff81c34aa0 T cayman_vm_flush +ffffffff81c34f00 T tn_set_vce_clocks +ffffffff81c35160 t cayman_uvd_start +ffffffff81c35210 t cayman_vce_start +ffffffff81c35320 t cayman_cp_load_microcode +ffffffff81c354b0 t cayman_cp_resume +ffffffff81c36370 t cayman_uvd_resume +ffffffff81c36440 t cayman_vce_resume +ffffffff81c37000 T cayman_dma_get_rptr +ffffffff81c37070 T cayman_dma_get_wptr +ffffffff81c370c0 T cayman_dma_set_wptr +ffffffff81c37110 T cayman_dma_ring_ib_execute +ffffffff81c374a0 T cayman_dma_stop +ffffffff81c37550 T cayman_dma_resume +ffffffff81c377b0 T cayman_dma_fini +ffffffff81c37870 T cayman_dma_is_lockup +ffffffff81c378f0 T cayman_dma_vm_copy_pages +ffffffff81c379f0 T cayman_dma_vm_write_pages +ffffffff81c37b50 T cayman_dma_vm_set_pages +ffffffff81c37cc0 T cayman_dma_vm_pad_ib +ffffffff81c37d10 T cayman_dma_vm_flush +ffffffff81c39000 T ni_get_pi +ffffffff81c39030 T ni_get_ps +ffffffff81c39060 T ni_dpm_vblank_too_short +ffffffff81c390d0 T ni_dpm_force_performance_level +ffffffff81c39220 T ni_copy_and_switch_arb_sets +ffffffff81c394f0 T ni_set_uvd_clock_before_set_eng_clock +ffffffff81c39570 T ni_set_uvd_clock_after_set_eng_clock +ffffffff81c395f0 T ni_dpm_setup_asic +ffffffff81c39800 T ni_update_current_ps +ffffffff81c398c0 T ni_update_requested_ps +ffffffff81c39980 T ni_dpm_enable +ffffffff81c3a7e0 t ni_init_smc_table +ffffffff81c3b190 t ni_init_smc_spll_table +ffffffff81c3b300 t ni_init_arb_table_index +ffffffff81c3b3a0 t ni_populate_mc_reg_table +ffffffff81c3b6e0 t ni_initialize_smc_cac_tables +ffffffff81c3c960 t ni_initialize_hardware_cac_manager +ffffffff81c3ce90 t ni_populate_smc_tdp_limits +ffffffff81c3d040 t ni_program_response_times +ffffffff81c3d150 T ni_dpm_disable +ffffffff81c3d510 t ni_enable_power_containment +ffffffff81c3d5d0 t ni_enable_smc_cac +ffffffff81c3d6f0 T ni_dpm_pre_set_power_state +ffffffff81c3dcd0 T ni_dpm_set_power_state +ffffffff81c3dfc0 t ni_upload_sw_state +ffffffff81c3ebb0 t ni_upload_mc_reg_table +ffffffff81c3ed60 t ni_power_control_set_level +ffffffff81c3ee30 T ni_dpm_post_set_power_state +ffffffff81c3ef00 T ni_dpm_init +ffffffff81c3f8a0 T ni_dpm_fini +ffffffff81c3f950 T ni_dpm_print_power_state +ffffffff81c3fa20 T ni_dpm_debugfs_print_current_performance_level +ffffffff81c3fa60 T ni_dpm_get_current_sclk +ffffffff81c3fad0 T ni_dpm_get_current_mclk +ffffffff81c3fb40 T ni_dpm_get_sclk +ffffffff81c3fba0 T ni_dpm_get_mclk +ffffffff81c3fc00 t ni_do_program_memory_timing_parameters +ffffffff81c3fd40 t ni_calculate_sclk_params +ffffffff81c3ff70 t ni_calculate_power_boost_limit +ffffffff81c40130 t ni_populate_mclk_value +ffffffff81c41000 T r100_wait_for_vblank +ffffffff81c41190 T r100_page_flip +ffffffff81c41450 T r100_page_flip_pending +ffffffff81c41500 T r100_pm_get_dynpm_state +ffffffff81c41720 T r100_pm_init_profile +ffffffff81c41800 T r100_pm_misc +ffffffff81c41c40 T r100_pm_prepare +ffffffff81c41cf0 T r100_pm_finish +ffffffff81c41da0 T r100_gui_idle +ffffffff81c41de0 T r100_hpd_sense +ffffffff81c41e40 T r100_hpd_set_polarity +ffffffff81c41f00 T r100_hpd_init +ffffffff81c41fa0 T r100_hpd_fini +ffffffff81c42010 T r100_pci_gart_tlb_flush +ffffffff81c42040 T r100_pci_gart_init +ffffffff81c42110 T r100_pci_gart_get_page_entry +ffffffff81c42140 T r100_pci_gart_set_page +ffffffff81c42180 T r100_pci_gart_enable +ffffffff81c42270 T r100_pci_gart_disable +ffffffff81c422f0 T r100_pci_gart_fini +ffffffff81c42370 T r100_irq_set +ffffffff81c42450 T r100_irq_disable +ffffffff81c424c0 T r100_irq_process +ffffffff81c427c0 T r100_get_vblank_counter +ffffffff81c42810 T r100_fence_ring_emit +ffffffff81c42c70 T r100_semaphore_ring_emit +ffffffff81c42ca0 T r100_copy_blit +ffffffff81c43330 T r100_ring_start +ffffffff81c43420 T r100_gfx_get_rptr +ffffffff81c43480 T r100_gfx_get_wptr +ffffffff81c434c0 T r100_gfx_set_wptr +ffffffff81c43500 T r100_cp_init +ffffffff81c43a30 T r100_debugfs_cp_init +ffffffff81c43a60 T r100_cp_fini +ffffffff81c43b00 T r100_cp_disable +ffffffff81c43c40 T r100_gui_wait_for_idle +ffffffff81c43d30 T r100_reloc_pitch_offset +ffffffff81c43e70 T r100_packet3_load_vbpntr +ffffffff81c44110 T r100_cs_parse_packet0 +ffffffff81c44220 T r100_cs_packet_parse_vline +ffffffff81c44430 T r100_cs_track_check_pkt3_indx_buffer +ffffffff81c444b0 T r100_cs_parse +ffffffff81c456a0 T r100_cs_track_clear +ffffffff81c45a30 T r100_cs_track_check +ffffffff81c46240 T r100_mc_wait_for_idle +ffffffff81c462e0 T r100_gpu_is_lockup +ffffffff81c46340 T r100_enable_bm +ffffffff81c46390 T r100_bm_disable +ffffffff81c46440 T r100_asic_reset +ffffffff81c46770 T r100_mc_stop +ffffffff81c46930 T r100_mc_resume +ffffffff81c469f0 T r100_set_common_regs +ffffffff81c46b90 T r100_vram_init_sizes +ffffffff81c46d80 T r100_vga_set_state +ffffffff81c46de0 T r100_pll_errata_after_index +ffffffff81c46e20 T r100_pll_rreg +ffffffff81c46f50 T r100_pll_wreg +ffffffff81c47060 T r100_debugfs_rbbm_init +ffffffff81c47090 T r100_debugfs_mc_info_init +ffffffff81c470c0 T r100_set_surface_reg +ffffffff81c472d0 T r100_clear_surface_reg +ffffffff81c47380 T r100_bandwidth_update +ffffffff81c47dd0 T r100_ring_test +ffffffff81c48080 T r100_ring_ib_execute +ffffffff81c482e0 T r100_ib_test +ffffffff81c48620 T r100_vga_render_disable +ffffffff81c48680 T r100_resume +ffffffff81c48870 t r100_startup +ffffffff81c48db0 T r100_suspend +ffffffff81c48e90 T r100_fini +ffffffff81c48fa0 T r100_restore_sanity +ffffffff81c49040 T r100_init +ffffffff81c49490 t r100_set_safe_registers +ffffffff81c49510 T r100_mm_rreg_slow +ffffffff81c49590 T r100_mm_wreg_slow +ffffffff81c495f0 T r100_io_rreg +ffffffff81c49690 T r100_io_wreg +ffffffff81c49700 t r100_get_vtx_size +ffffffff81c497f0 t r100_cs_track_texture_print +ffffffff81c4a000 T r200_copy_dma +ffffffff81c4a470 T r200_packet0_check +ffffffff81c4b240 t r200_get_vtx_size_0 +ffffffff81c4b400 t r200_get_vtx_size_1 +ffffffff81c4b490 T r200_set_safe_registers +ffffffff81c4c000 T rv370_pcie_rreg +ffffffff81c4c080 T rv370_pcie_wreg +ffffffff81c4c0f0 T rv370_pcie_gart_tlb_flush +ffffffff81c4c2f0 T rv370_pcie_gart_get_page_entry +ffffffff81c4c350 T rv370_pcie_gart_set_page +ffffffff81c4c390 T rv370_pcie_gart_init +ffffffff81c4c460 T rv370_pcie_gart_enable +ffffffff81c4c7c0 T rv370_pcie_gart_disable +ffffffff81c4c940 T rv370_pcie_gart_fini +ffffffff81c4c970 T r300_fence_ring_emit +ffffffff81c4cee0 T r300_ring_start +ffffffff81c4d850 T r300_mc_wait_for_idle +ffffffff81c4d8f0 T r300_asic_reset +ffffffff81c4db10 T r300_mc_init +ffffffff81c4dbc0 T rv370_set_pcie_lanes +ffffffff81c4dd80 T rv370_get_pcie_lanes +ffffffff81c4de30 T r300_cs_parse +ffffffff81c4e1a0 t r300_packet0_check +ffffffff81c4f060 T r300_set_reg_safe +ffffffff81c4f0a0 T r300_mc_program +ffffffff81c4f230 T r300_clock_startup +ffffffff81c4f2c0 T r300_resume +ffffffff81c4f490 t r300_startup +ffffffff81c4f7f0 T r300_suspend +ffffffff81c4f870 T r300_fini +ffffffff81c4f950 T r300_init +ffffffff81c50000 T r420_pm_init_profile +ffffffff81c500f0 T r420_pipes_init +ffffffff81c502d0 T r420_mc_rreg +ffffffff81c50350 T r420_mc_wreg +ffffffff81c503c0 T r420_resume +ffffffff81c50590 t r420_startup +ffffffff81c50790 T r420_suspend +ffffffff81c50930 T r420_fini +ffffffff81c50a10 T r420_init +ffffffff81c50c90 T r420_debugfs_pipes_info_init +ffffffff81c50cc0 t r420_cp_errata_init +ffffffff81c51000 T r520_mc_wait_for_idle +ffffffff81c510a0 T r520_resume +ffffffff81c51190 t r520_startup +ffffffff81c51580 T r520_init +ffffffff81c52000 T r600_rcu_rreg +ffffffff81c52080 T r600_rcu_wreg +ffffffff81c520f0 T r600_uvd_ctx_rreg +ffffffff81c52170 T r600_uvd_ctx_wreg +ffffffff81c521e0 T r600_get_allowed_info_register +ffffffff81c52260 T r600_get_xclk +ffffffff81c52290 T r600_set_uvd_clocks +ffffffff81c527f0 T dce3_program_fmt +ffffffff81c52910 T rv6xx_get_temp +ffffffff81c52960 T r600_pm_get_dynpm_state +ffffffff81c52d70 T rs780_pm_init_profile +ffffffff81c52e80 T r600_pm_init_profile +ffffffff81c53120 T r600_pm_misc +ffffffff81c53200 T r600_gui_idle +ffffffff81c53240 T r600_hpd_sense +ffffffff81c53360 T r600_hpd_set_polarity +ffffffff81c535e0 T r600_hpd_init +ffffffff81c537c0 T r600_hpd_fini +ffffffff81c53970 T r600_pcie_gart_tlb_flush +ffffffff81c53aa0 T r600_pcie_gart_init +ffffffff81c53b40 T r600_mc_wait_for_idle +ffffffff81c53be0 T rs780_mc_rreg +ffffffff81c53c80 T rs780_mc_wreg +ffffffff81c53d10 T r600_vram_scratch_init +ffffffff81c53e10 t radeon_bo_reserve +ffffffff81c53f80 t radeon_bo_unreserve +ffffffff81c54060 T r600_vram_scratch_fini +ffffffff81c540e0 T r600_set_bios_scratch_engine_hung +ffffffff81c54130 T r600_gpu_check_soft_reset +ffffffff81c544d0 T r600_asic_reset +ffffffff81c54860 t r600_gpu_pci_config_reset +ffffffff81c54a70 T r600_gfx_is_lockup +ffffffff81c54ae0 T r6xx_remap_render_backend +ffffffff81c54ca0 T r600_count_pipe_bits +ffffffff81c54d10 T r600_pciep_rreg +ffffffff81c54d90 T r600_pciep_wreg +ffffffff81c54e00 T r600_cp_stop +ffffffff81c54e80 T r600_init_microcode +ffffffff81c55340 t request_firmware +ffffffff81c553d0 t release_firmware +ffffffff81c55410 T r600_gfx_get_rptr +ffffffff81c55470 T r600_gfx_get_wptr +ffffffff81c554b0 T r600_gfx_set_wptr +ffffffff81c554f0 T r600_cp_start +ffffffff81c55860 T r600_cp_resume +ffffffff81c55bc0 T r600_ring_init +ffffffff81c55c60 T r600_cp_fini +ffffffff81c55cf0 T r600_scratch_init +ffffffff81c55d60 T r600_ring_test +ffffffff81c56000 T r600_fence_ring_emit +ffffffff81c568a0 T r600_semaphore_ring_emit +ffffffff81c56a80 T r600_copy_cpdma +ffffffff81c57030 T r600_set_surface_reg +ffffffff81c57060 T r600_clear_surface_reg +ffffffff81c57090 T r600_vga_set_state +ffffffff81c570f0 T r600_resume +ffffffff81c57180 t r600_startup +ffffffff81c58e60 T r600_suspend +ffffffff81c58fd0 T r600_irq_suspend +ffffffff81c59090 t r600_pcie_gart_disable +ffffffff81c59290 T r600_init +ffffffff81c599f0 T r600_ih_ring_init +ffffffff81c59a60 T r600_irq_fini +ffffffff81c59ba0 t r600_pcie_gart_fini +ffffffff81c59bd0 T r600_fini +ffffffff81c59d60 T r600_ring_ib_execute +ffffffff81c5a1f0 T r600_ib_test +ffffffff81c5a4a0 T r600_ih_ring_alloc +ffffffff81c5a5c0 T r600_ih_ring_fini +ffffffff81c5a650 T r600_rlc_stop +ffffffff81c5a7e0 T r600_disable_interrupts +ffffffff81c5a890 T r600_irq_init +ffffffff81c5acf0 t r600_disable_interrupt_state +ffffffff81c5aff0 T r600_irq_disable +ffffffff81c5b0b0 T r600_irq_set +ffffffff81c5b830 t r600_irq_ack +ffffffff81c5bd60 T r600_irq_process +ffffffff81c5c960 T r600_mmio_hdp_flush +ffffffff81c5c9e0 T r600_set_pcie_lanes +ffffffff81c5cb10 T r600_get_pcie_lanes +ffffffff81c5cbe0 T r600_get_gpu_clock_counter +ffffffff81c5cc70 t r600_cp_load_microcode +ffffffff81c5cf40 t r600_uvd_resume +ffffffff81c5e000 T r600_fmt_is_valid_color +ffffffff81c5e040 T r600_fmt_is_valid_texture +ffffffff81c5e090 T r600_fmt_get_blocksize +ffffffff81c5e0d0 T r600_fmt_get_nblocksx +ffffffff81c5e120 T r600_fmt_get_nblocksy +ffffffff81c5e180 T r600_cs_common_vline_parse +ffffffff81c5e440 T r600_mip_minify +ffffffff81c5e4a0 T r600_cs_parse +ffffffff81c60360 T r600_dma_cs_next_reloc +ffffffff81c603e0 T r600_dma_cs_parse +ffffffff81c60a80 t r600_cs_track_check +ffffffff81c61bc0 t r600_cs_check_reg +ffffffff81c62ae0 t r600_is_safe_reg +ffffffff81c62b80 t r600_texture_size +ffffffff81c63000 T r600_dma_get_rptr +ffffffff81c63060 T r600_dma_get_wptr +ffffffff81c630a0 T r600_dma_set_wptr +ffffffff81c630e0 T r600_dma_stop +ffffffff81c63170 T r600_dma_resume +ffffffff81c63370 T r600_dma_fini +ffffffff81c633f0 T r600_dma_is_lockup +ffffffff81c63460 T r600_dma_ring_test +ffffffff81c636d0 T r600_dma_fence_ring_emit +ffffffff81c638b0 T r600_dma_semaphore_ring_emit +ffffffff81c639d0 T r600_dma_ib_test +ffffffff81c63bf0 T r600_dma_ring_ib_execute +ffffffff81c63f40 T r600_copy_dma +ffffffff81c65000 T r600_dpm_print_class_info +ffffffff81c652b0 T r600_dpm_print_cap_info +ffffffff81c65340 T r600_dpm_print_ps_status +ffffffff81c653d0 T r600_dpm_get_vblank_time +ffffffff81c65490 T r600_dpm_get_vrefresh +ffffffff81c65520 T r600_calculate_u_and_p +ffffffff81c655a0 T r600_calculate_at +ffffffff81c65650 T r600_gfx_clockgating_enable +ffffffff81c65750 T r600_dynamicpm_enable +ffffffff81c657a0 T r600_enable_thermal_protection +ffffffff81c65800 T r600_enable_acpi_pm +ffffffff81c65850 T r600_enable_dynamic_pcie_gen2 +ffffffff81c658a0 T r600_dynamicpm_enabled +ffffffff81c658e0 T r600_enable_sclk_control +ffffffff81c65940 T r600_enable_mclk_control +ffffffff81c659a0 T r600_enable_spll_bypass +ffffffff81c659f0 T r600_wait_for_spll_change +ffffffff81c65a70 T r600_set_bsp +ffffffff81c65ab0 T r600_set_at +ffffffff81c65b10 T r600_set_tc +ffffffff81c65b70 T r600_select_td +ffffffff81c65c20 T r600_set_vrc +ffffffff81c65c60 T r600_set_tpu +ffffffff81c65cc0 T r600_set_tpc +ffffffff81c65d20 T r600_set_sstu +ffffffff81c65d80 T r600_set_sst +ffffffff81c65dd0 T r600_set_git +ffffffff81c65e20 T r600_set_fctu +ffffffff81c65e80 T r600_set_fct +ffffffff81c65ed0 T r600_set_ctxcgtt3d_rphc +ffffffff81c65f30 T r600_set_ctxcgtt3d_rsdc +ffffffff81c65f90 T r600_set_vddc3d_oorsu +ffffffff81c65ff0 T r600_set_vddc3d_oorphc +ffffffff81c66050 T r600_set_vddc3d_oorsdc +ffffffff81c660b0 T r600_set_mpll_lock_time +ffffffff81c66100 T r600_set_mpll_reset_time +ffffffff81c66150 T r600_engine_clock_entry_enable +ffffffff81c66250 T r600_engine_clock_entry_enable_pulse_skipping +ffffffff81c66350 T r600_engine_clock_entry_enable_post_divider +ffffffff81c66450 T r600_engine_clock_entry_set_post_divider +ffffffff81c66510 T r600_engine_clock_entry_set_reference_divider +ffffffff81c665d0 T r600_engine_clock_entry_set_feedback_divider +ffffffff81c66690 T r600_engine_clock_entry_set_step_time +ffffffff81c66750 T r600_vid_rt_set_ssu +ffffffff81c667b0 T r600_vid_rt_set_vru +ffffffff81c66810 T r600_vid_rt_set_vrt +ffffffff81c66870 T r600_voltage_control_enable_pins +ffffffff81c668c0 T r600_voltage_control_program_voltages +ffffffff81c66950 T r600_voltage_control_deactivate_static_control +ffffffff81c669e0 T r600_power_level_enable +ffffffff81c66a50 T r600_power_level_set_voltage_index +ffffffff81c66ac0 T r600_power_level_set_mem_clock_index +ffffffff81c66b20 T r600_power_level_set_eng_clock_index +ffffffff81c66b90 T r600_power_level_set_watermark_id +ffffffff81c66c00 T r600_power_level_set_pcie_gen2 +ffffffff81c66c60 T r600_power_level_get_current_index +ffffffff81c66ca0 T r600_power_level_get_target_index +ffffffff81c66ce0 T r600_power_level_set_enter_index +ffffffff81c66d40 T r600_wait_for_power_level_unequal +ffffffff81c66e30 T r600_wait_for_power_level +ffffffff81c66f20 T r600_start_dpm +ffffffff81c67200 T r600_stop_dpm +ffffffff81c67250 T r600_dpm_pre_set_power_state +ffffffff81c67280 T r600_dpm_post_set_power_state +ffffffff81c672b0 T r600_is_uvd_state +ffffffff81c672f0 T r600_is_internal_thermal_sensor +ffffffff81c67330 T r600_dpm_late_enable +ffffffff81c67440 T r600_get_platform_caps +ffffffff81c674e0 T r600_parse_extended_power_table +ffffffff81c682a0 T r600_free_extended_power_table +ffffffff81c683a0 T r600_get_pcie_gen_support +ffffffff81c683f0 T r600_get_pcie_lane_support +ffffffff81c68450 T r600_encode_pci_lane_width +ffffffff81c69000 T r600_audio_update_hdmi +ffffffff81c69170 t r600_audio_status +ffffffff81c69290 T r600_hdmi_buffer_status_changed +ffffffff81c69330 T r600_hdmi_update_audio_settings +ffffffff81c69700 T r600_audio_enable +ffffffff81c69780 T r600_audio_get_pin +ffffffff81c697b0 T r600_hdmi_update_acr +ffffffff81c69b50 T r600_set_avi_packet +ffffffff81c69d50 T r600_hdmi_audio_workaround +ffffffff81c69e20 T r600_hdmi_audio_set_dto +ffffffff81c69ee0 T r600_set_vbi_packet +ffffffff81c69fa0 T r600_set_audio_packet +ffffffff81c6a270 T r600_set_mute +ffffffff81c6a380 T r600_hdmi_enable +ffffffff81c6b000 T radeon_acpi_is_pcie_performance_request_supported +ffffffff81c6b050 T radeon_acpi_pcie_notify_device_ready +ffffffff81c6b170 T radeon_acpi_pcie_performance_request +ffffffff81c6b500 T radeon_acpi_init +ffffffff81c6bc80 t radeon_acpi_event +ffffffff81c6bf80 T radeon_acpi_fini +ffffffff81c6c000 T radeon_agp_head_init +ffffffff81c6c050 T radeon_agp_init +ffffffff81c6c0a0 T radeon_agp_resume +ffffffff81c6c130 T radeon_agp_fini +ffffffff81c6c180 T radeon_agp_suspend +ffffffff81c6d000 T radeon_agp_disable +ffffffff81c6d120 T radeon_asic_init +ffffffff81c6d8f0 t radeon_invalid_rreg +ffffffff81c6d930 t radeon_invalid_wreg +ffffffff81c6d970 t radeon_invalid_get_allowed_info_register +ffffffff81c6e000 T radeon_atombios_i2c_init +ffffffff81c6e3a0 T radeon_atombios_lookup_gpio +ffffffff81c6e4a0 T radeon_get_atom_connector_info_from_object_table +ffffffff81c6ede0 t radeon_lookup_i2c_gpio +ffffffff81c6f0d0 t radeon_atom_apply_quirks +ffffffff81c6f4f0 T radeon_get_atom_connector_info_from_supported_devices_table +ffffffff81c6f9f0 T radeon_atom_get_clock_info +ffffffff81c6fdd0 T radeon_atombios_sideport_present +ffffffff81c6fe80 T radeon_atombios_get_tmds_info +ffffffff81c6ffc0 T radeon_atombios_get_ppll_ss_info +ffffffff81c700e0 T radeon_atombios_get_asic_ss_info +ffffffff81c703c0 t radeon_atombios_get_igp_ss_overrides +ffffffff81c704d0 T radeon_atombios_get_lvds_info +ffffffff81c70830 T radeon_atombios_get_primary_dac_info +ffffffff81c708f0 T radeon_atom_get_tv_timings +ffffffff81c70b30 T radeon_atombios_get_tv_info +ffffffff81c70bf0 T radeon_atombios_get_tv_dac_info +ffffffff81c70cf0 T radeon_atombios_get_default_voltages +ffffffff81c70db0 T radeon_atombios_get_power_modes +ffffffff81c71e20 T radeon_atom_get_clock_dividers +ffffffff81c72110 T radeon_atom_get_memory_pll_dividers +ffffffff81c72250 T radeon_atom_set_clock_gating +ffffffff81c722a0 T radeon_atom_get_engine_clock +ffffffff81c722f0 T radeon_atom_get_memory_clock +ffffffff81c72340 T radeon_atom_set_engine_clock +ffffffff81c72390 T radeon_atom_set_memory_clock +ffffffff81c723f0 T radeon_atom_set_engine_dram_timings +ffffffff81c72460 T radeon_atom_update_memory_dll +ffffffff81c724b0 T radeon_atom_set_ac_timing +ffffffff81c72500 T radeon_atom_set_voltage +ffffffff81c725d0 T radeon_atom_get_max_vddc +ffffffff81c726b0 T radeon_atom_get_leakage_vddc_based_on_leakage_idx +ffffffff81c72780 T radeon_atom_get_leakage_id_from_vbios +ffffffff81c72840 T radeon_atom_get_leakage_vddc_based_on_leakage_params +ffffffff81c72a60 T radeon_atom_get_voltage_evv +ffffffff81c72b20 T radeon_atom_get_voltage_gpio_settings +ffffffff81c72c20 T radeon_atom_is_voltage_gpio +ffffffff81c72db0 T radeon_atom_get_svi2_info +ffffffff81c72ea0 T radeon_atom_get_max_voltage +ffffffff81c73030 T radeon_atom_get_min_voltage +ffffffff81c73170 T radeon_atom_get_voltage_step +ffffffff81c73270 T radeon_atom_round_to_true_voltage +ffffffff81c733d0 T radeon_atom_get_voltage_table +ffffffff81c73640 T radeon_atom_get_memory_info +ffffffff81c737f0 T radeon_atom_get_mclk_range_table +ffffffff81c73a30 T radeon_atom_init_mc_reg_table +ffffffff81c73ca0 T radeon_atom_initialize_bios_scratch_regs +ffffffff81c73d70 T radeon_save_bios_scratch_regs +ffffffff81c73e50 T radeon_restore_bios_scratch_regs +ffffffff81c73f30 T radeon_atom_output_lock +ffffffff81c73fc0 T radeon_atombios_connected_scratch_regs +ffffffff81c74730 T radeon_atombios_encoder_crtc_scratch_regs +ffffffff81c74880 T radeon_atombios_encoder_dpms_scratch_regs +ffffffff81c74ab0 t radeon_atombios_parse_misc_flags_1_3 +ffffffff81c74c90 t radeon_atombios_add_pplib_thermal_controller +ffffffff81c75090 t radeon_atombios_parse_pplib_clock_info +ffffffff81c75440 t radeon_atombios_parse_pplib_non_clock_info +ffffffff81c76000 T radeon_audio_init +ffffffff81c762a0 T radeon_audio_endpoint_rreg +ffffffff81c762e0 T radeon_audio_endpoint_wreg +ffffffff81c76320 T radeon_audio_get_pin +ffffffff81c76370 T radeon_audio_detect +ffffffff81c76690 T radeon_audio_fini +ffffffff81c767e0 T radeon_audio_mode_set +ffffffff81c76830 T radeon_audio_dpms +ffffffff81c76880 T radeon_audio_decode_dfs_div +ffffffff81c768e0 t radeon_audio_hdmi_mode_set +ffffffff81c76fc0 t radeon_audio_write_speaker_allocation +ffffffff81c77070 t radeon_audio_write_sad_regs +ffffffff81c77140 t radeon_audio_set_avi_packet +ffffffff81c77280 t radeon_audio_dp_mode_set +ffffffff81c77400 t radeon_audio_rreg +ffffffff81c77450 t radeon_audio_wreg +ffffffff81c78000 T radeon_benchmark +ffffffff81c78940 t radeon_benchmark_move +ffffffff81c78c20 t radeon_bo_reserve +ffffffff81c78d90 t radeon_bo_unreserve +ffffffff81c78e70 t radeon_benchmark_do_move +ffffffff81c79000 T radeon_get_bios +ffffffff81c79fc0 t igp_read_bios_from_vram +ffffffff81c7a0d0 t radeon_read_bios +ffffffff81c7b000 T radeon_legacy_get_engine_clock +ffffffff81c7b0d0 T radeon_legacy_get_memory_clock +ffffffff81c7b1a0 T radeon_get_clock_info +ffffffff81c7b730 T radeon_legacy_set_engine_clock +ffffffff81c7ba80 T radeon_legacy_set_clock_gating +ffffffff81c7d000 T radeon_combios_check_hardcoded_edid +ffffffff81c7d100 t combios_get_table_offset +ffffffff81c7d690 T radeon_bios_get_hardcoded_edid +ffffffff81c7d710 T radeon_combios_i2c_init +ffffffff81c7ddb0 t combios_setup_i2c_bus +ffffffff81c7e0a0 t radeon_combios_get_i2c_info_from_table +ffffffff81c7e2f0 T radeon_combios_get_clock_info +ffffffff81c7e4e0 T radeon_combios_sideport_present +ffffffff81c7e560 T radeon_combios_get_primary_dac_info +ffffffff81c7e6b0 T radeon_combios_get_tv_info +ffffffff81c7e7b0 T radeon_combios_get_tv_dac_info +ffffffff81c7ea40 T radeon_combios_get_lvds_info +ffffffff81c7f0b0 T radeon_legacy_get_tmds_info_from_table +ffffffff81c7f180 T radeon_legacy_get_tmds_info_from_combios +ffffffff81c7f390 T radeon_legacy_get_ext_tmds_info_from_table +ffffffff81c7f5c0 T radeon_legacy_get_ext_tmds_info_from_combios +ffffffff81c7f900 T radeon_get_legacy_connector_info_from_table +ffffffff81c81a70 T radeon_get_legacy_connector_info_from_bios +ffffffff81c82660 T radeon_combios_get_power_modes +ffffffff81c82d30 T radeon_external_tmds_setup +ffffffff81c82e00 T radeon_combios_external_tmds_setup +ffffffff81c83380 T radeon_combios_asic_init +ffffffff81c838d0 t combios_parse_mmio_table +ffffffff81c83af0 t combios_parse_pll_table +ffffffff81c83dc0 T radeon_combios_initialize_bios_scratch_regs +ffffffff81c83e50 T radeon_combios_output_lock +ffffffff81c83eb0 T radeon_combios_connected_scratch_regs +ffffffff81c84210 T radeon_combios_encoder_crtc_scratch_regs +ffffffff81c842f0 T radeon_combios_encoder_dpms_scratch_regs +ffffffff81c85000 T radeon_connector_hotplug +ffffffff81c85100 T radeon_get_monitor_bpc +ffffffff81c85550 T radeon_connector_edid +ffffffff81c85600 T radeon_connector_encoder_get_dp_bridge_encoder_id +ffffffff81c85680 T radeon_connector_is_dp12_capable +ffffffff81c85720 T radeon_add_atom_connector +ffffffff81c865d0 T radeon_add_legacy_connector +ffffffff81c86ac0 t radeon_dp_detect +ffffffff81c86e60 t radeon_dvi_force +ffffffff81c86eb0 t radeon_connector_set_property +ffffffff81c876f0 t radeon_connector_unregister +ffffffff81c87750 t radeon_connector_destroy +ffffffff81c877c0 t radeon_best_single_encoder +ffffffff81c87830 t radeon_connector_get_edid +ffffffff81c87990 t radeon_dp_get_modes +ffffffff81c87c90 t radeon_dp_mode_valid +ffffffff81c87e60 t radeon_dvi_encoder +ffffffff81c87f20 t radeon_fixup_lvds_native_mode +ffffffff81c88060 t radeon_add_common_modes +ffffffff81c88150 t radeon_fp_native_mode +ffffffff81c88230 t radeon_lvds_set_property +ffffffff81c88320 t radeon_vga_detect +ffffffff81c885c0 t radeon_connector_analog_encoder_conflict_solve +ffffffff81c887e0 t radeon_vga_get_modes +ffffffff81c888c0 t radeon_vga_mode_valid +ffffffff81c88920 t radeon_dvi_detect +ffffffff81c88f90 t radeon_dvi_mode_valid +ffffffff81c89110 t radeon_tv_detect +ffffffff81c89350 t radeon_tv_get_modes +ffffffff81c89430 t radeon_tv_mode_valid +ffffffff81c89480 t radeon_lvds_detect +ffffffff81c89620 t radeon_lvds_get_modes +ffffffff81c89760 t radeon_lvds_mode_valid +ffffffff81c8a000 T radeon_cs_parser_init +ffffffff81c8a490 T radeon_cs_ioctl +ffffffff81c8ac70 t radeon_cs_parser_fini +ffffffff81c8adf0 t radeon_cs_ib_vm_chunk +ffffffff81c8b130 T radeon_cs_packet_parse +ffffffff81c8b2e0 T radeon_cs_packet_next_is_pkt3_nop +ffffffff81c8b340 T radeon_cs_dump_packet +ffffffff81c8b3c0 T radeon_cs_packet_next_reloc +ffffffff81c8b5a0 t cmp_size_smaller_first +ffffffff81c8c000 T radeon_crtc_cursor_move +ffffffff81c8c070 t radeon_lock_cursor +ffffffff81c8c230 t radeon_cursor_move_locked +ffffffff81c8c770 T radeon_crtc_cursor_set2 +ffffffff81c8ca00 t radeon_hide_cursor +ffffffff81c8cac0 t radeon_bo_reserve +ffffffff81c8cc30 t radeon_bo_unreserve +ffffffff81c8cd10 t radeon_show_cursor +ffffffff81c8cf60 T radeon_cursor_reset +ffffffff81c8d000 T radeon_is_px +ffffffff81c8d040 T radeon_program_register_sequence +ffffffff81c8d170 T radeon_pci_config_reset +ffffffff81c8d1a0 T radeon_surface_init +ffffffff81c8d360 T radeon_scratch_init +ffffffff81c8d3e0 T radeon_scratch_get +ffffffff81c8d460 T radeon_scratch_free +ffffffff81c8d4c0 T radeon_doorbell_get +ffffffff81c8d570 T radeon_doorbell_free +ffffffff81c8d5c0 T radeon_wb_disable +ffffffff81c8d5f0 T radeon_wb_fini +ffffffff81c8d690 t radeon_bo_reserve +ffffffff81c8d800 t radeon_bo_unreserve +ffffffff81c8d8e0 T radeon_wb_init +ffffffff81c8dbc0 T radeon_vram_location +ffffffff81c8dce0 T radeon_gtt_location +ffffffff81c8de10 T radeon_device_is_virtual +ffffffff81c8de40 T radeon_card_posted +ffffffff81c8e050 T radeon_update_bandwidth_info +ffffffff81c8e0d0 T radeon_boot_test_post_card +ffffffff81c8e190 T radeon_dummy_page_init +ffffffff81c8e250 T radeon_dummy_page_fini +ffffffff81c8e2b0 T radeon_atombios_init +ffffffff81c8e440 t cail_reg_read +ffffffff81c8e4a0 t cail_reg_write +ffffffff81c8e500 t cail_ioreg_read +ffffffff81c8e520 t cail_ioreg_write +ffffffff81c8e540 t cail_mc_read +ffffffff81c8e570 t cail_mc_write +ffffffff81c8e5a0 t cail_pll_read +ffffffff81c8e5d0 t cail_pll_write +ffffffff81c8e600 T radeon_atombios_fini +ffffffff81c8e6b0 T radeon_combios_init +ffffffff81c8e6f0 T radeon_combios_fini +ffffffff81c8e720 T radeon_device_init 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radeon_unpin_work_func +ffffffff81c93e20 t radeon_bo_reserve +ffffffff81c93f90 t radeon_bo_unreserve +ffffffff81c95000 T radeon_dp_aux_transfer_native +ffffffff81c96000 T radeondrm_probe +ffffffff81c96060 T radeondrm_attach_kms +ffffffff81c967a0 T radeondrm_detach_kms +ffffffff81c96830 T radeondrm_activate_kms +ffffffff81c968f0 T radeondrm_wsioctl +ffffffff81c969b0 T radeondrm_wsmmap +ffffffff81c969e0 T radeondrm_alloc_screen +ffffffff81c96a10 T radeondrm_free_screen +ffffffff81c96a20 T radeondrm_show_screen +ffffffff81c96b00 T radeondrm_enter_ddb +ffffffff81c96b60 T radeondrm_doswitch +ffffffff81c96bf0 T radeondrm_setpal +ffffffff81c96e10 T radeondrm_attachhook +ffffffff81c97140 T radeondrm_forcedetach +ffffffff81c98000 T radeon_setup_encoder_clones +ffffffff81c980b0 T radeon_get_encoder_enum +ffffffff81c98230 T radeon_link_encoder_connector +ffffffff81c98380 T radeon_encoder_set_active_device +ffffffff81c98440 T radeon_get_connector_for_encoder +ffffffff81c984b0 T radeon_get_connector_for_encoder_init +ffffffff81c98520 T radeon_get_external_encoder +ffffffff81c985b0 T radeon_encoder_get_dp_bridge_encoder_id +ffffffff81c98650 T radeon_panel_mode_fixup +ffffffff81c98820 T radeon_dig_monitor_is_duallink +ffffffff81c98940 T radeon_encoder_is_digital +ffffffff81c99000 T radeon_align_pitch +ffffffff81c99090 T radeon_fbdev_init +ffffffff81c991e0 T radeondrm_burner_cb +ffffffff81c99210 T radeon_fbdev_fini +ffffffff81c99280 T radeon_fbdev_set_suspend +ffffffff81c992d0 T radeon_fbdev_robj_is_fb +ffffffff81c99320 T radeondrm_burner +ffffffff81c993a0 t radeonfb_create +ffffffff81c997b0 t radeon_bo_reserve +ffffffff81c99920 t radeon_bo_unreserve +ffffffff81c9a000 T radeon_fence_emit +ffffffff81c9a120 T radeon_fence_process +ffffffff81c9a1e0 t radeon_fence_activity +ffffffff81c9a450 T radeon_fence_signaled +ffffffff81c9a4c0 t radeon_fence_seq_signaled +ffffffff81c9a5b0 T radeon_fence_wait_timeout +ffffffff81c9a6e0 t radeon_fence_wait_seq_timeout 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radeon_gem_object_mmap +ffffffff81c9e670 T radeon_gem_info_ioctl +ffffffff81c9e6e0 T radeon_gem_pread_ioctl +ffffffff81c9e730 T radeon_gem_pwrite_ioctl +ffffffff81c9e780 T radeon_gem_create_ioctl +ffffffff81c9e8a0 T radeon_gem_userptr_ioctl +ffffffff81c9e8d0 T radeon_gem_set_domain_ioctl +ffffffff81c9ea30 T radeon_mode_dumb_mmap +ffffffff81c9eae0 T radeon_gem_mmap_ioctl +ffffffff81c9eba0 T radeon_gem_busy_ioctl +ffffffff81c9ec50 T radeon_gem_wait_idle_ioctl +ffffffff81c9ed60 T radeon_gem_set_tiling_ioctl +ffffffff81c9ee10 T radeon_gem_get_tiling_ioctl +ffffffff81c9eee0 t radeon_bo_reserve +ffffffff81c9f0e0 t radeon_bo_unreserve +ffffffff81c9f1c0 T radeon_gem_va_ioctl +ffffffff81c9f470 t radeon_gem_va_update_vm +ffffffff81c9f5c0 T radeon_gem_op_ioctl +ffffffff81c9f6c0 T radeon_mode_dumb_create +ffffffff81c9f7c0 T radeon_gem_debugfs_init +ffffffff81ca0000 T radeon_ddc_probe +ffffffff81ca00c0 T radeon_router_select_ddc_port +ffffffff81ca0320 T radeon_bb_set_bits +ffffffff81ca0490 T radeon_bb_set_dir +ffffffff81ca04c0 T radeon_bb_read_bits +ffffffff81ca05a0 T radeon_acquire_bus +ffffffff81ca09f0 T radeon_release_bus +ffffffff81ca0b60 T radeon_send_start +ffffffff81ca0b80 T radeon_send_stop +ffffffff81ca0ba0 T radeon_initiate_xfer +ffffffff81ca0bc0 T radeon_read_byte +ffffffff81ca0be0 T radeon_write_byte +ffffffff81ca0c00 T radeon_i2c_create +ffffffff81ca0e10 T radeon_i2c_destroy +ffffffff81ca0e90 T radeon_i2c_init +ffffffff81ca0ee0 T radeon_i2c_fini +ffffffff81ca0f90 T radeon_i2c_add +ffffffff81ca1140 T radeon_i2c_lookup +ffffffff81ca1310 T radeon_i2c_get_byte +ffffffff81ca13e0 T radeon_i2c_put_byte +ffffffff81ca1470 T radeon_router_select_cd_port +ffffffff81ca16d0 t radeon_hw_i2c_xfer +ffffffff81ca2270 t radeon_hw_i2c_func +ffffffff81ca22a0 t r100_hw_i2c_xfer +ffffffff81ca2960 t radeon_get_i2c_prescale +ffffffff81ca3000 T radeon_ib_get +ffffffff81ca3100 T radeon_ib_free +ffffffff81ca3150 T radeon_ib_schedule +ffffffff81ca33e0 T radeon_ib_pool_init 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radeon_legacy_backlight_get_brightness +ffffffff81caa610 T radeon_add_legacy_encoder +ffffffff81caa970 t radeon_legacy_backlight_update_status +ffffffff81caaa10 t radeon_lvds_enc_destroy +ffffffff81caaaa0 t radeon_legacy_lvds_dpms +ffffffff81caaaf0 t radeon_legacy_mode_fixup +ffffffff81caab60 t radeon_legacy_lvds_prepare +ffffffff81caabf0 t radeon_legacy_lvds_commit +ffffffff81caac70 t radeon_legacy_lvds_mode_set +ffffffff81caae80 t radeon_legacy_encoder_disable +ffffffff81caaed0 t radeon_legacy_tmds_int_dpms +ffffffff81caaf90 t radeon_legacy_tmds_int_prepare +ffffffff81cab060 t radeon_legacy_tmds_int_commit +ffffffff81cab130 t radeon_legacy_tmds_int_mode_set +ffffffff81cab390 t radeon_legacy_primary_dac_dpms +ffffffff81cab4d0 t radeon_legacy_primary_dac_prepare +ffffffff81cab530 t radeon_legacy_primary_dac_commit +ffffffff81cab580 t radeon_legacy_primary_dac_mode_set +ffffffff81cab710 t radeon_legacy_primary_dac_detect +ffffffff81cab900 t radeon_legacy_tv_dac_dpms +ffffffff81cabb10 t radeon_legacy_tv_dac_prepare +ffffffff81cabb70 t radeon_legacy_tv_dac_commit +ffffffff81cabbc0 t radeon_legacy_tv_dac_mode_set +ffffffff81cabf60 t radeon_legacy_tv_dac_detect +ffffffff81cacb60 t radeon_ext_tmds_enc_destroy +ffffffff81cacbb0 t radeon_legacy_tmds_ext_dpms +ffffffff81cacc80 t radeon_legacy_tmds_ext_prepare +ffffffff81cacd50 t radeon_legacy_tmds_ext_commit +ffffffff81cace20 t radeon_legacy_tmds_ext_mode_set +ffffffff81cad000 T radeon_legacy_tv_mode_set +ffffffff81cae0f0 T radeon_legacy_tv_adjust_crtc_reg +ffffffff81cae200 T radeon_legacy_tv_adjust_pll1 +ffffffff81cae300 T radeon_legacy_tv_adjust_pll2 +ffffffff81caf000 T radeon_ttm_bo_is_radeon_bo +ffffffff81caf040 t radeon_ttm_bo_destroy +ffffffff81caf170 T radeon_ttm_placement_from_domain +ffffffff81caf2e0 T radeon_bo_create +ffffffff81caf4b0 T radeon_bo_kmap +ffffffff81caf590 T radeon_bo_check_tiling +ffffffff81caf670 T radeon_bo_kunmap +ffffffff81caf700 T radeon_bo_ref +ffffffff81caf740 T radeon_bo_unref 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T radeon_pm_resume +ffffffff81cb2b70 T radeon_pm_init +ffffffff81cb3280 T radeon_pm_late_init +ffffffff81cb3340 T radeon_pm_fini +ffffffff81cb3460 t radeon_dpm_thermal_work_handler +ffffffff81cb3540 t radeon_dynpm_idle_work_handler +ffffffff81cb3850 t __delayed_work_tick +ffffffff81cb4000 T radeon_gem_prime_get_sg_table +ffffffff81cb4030 T radeon_gem_prime_pin +ffffffff81cb40c0 t radeon_bo_reserve +ffffffff81cb4230 t radeon_bo_unreserve +ffffffff81cb4310 T radeon_gem_prime_unpin +ffffffff81cb4390 T radeon_gem_prime_export +ffffffff81cb5000 T radeon_ring_supports_scratch_reg +ffffffff81cb5030 T radeon_ring_free_size +ffffffff81cb50e0 T radeon_ring_lockup_update +ffffffff81cb5140 T radeon_ring_alloc +ffffffff81cb52c0 T radeon_ring_lock +ffffffff81cb5340 T radeon_ring_commit +ffffffff81cb5440 T radeon_ring_unlock_commit +ffffffff81cb5470 T radeon_ring_undo +ffffffff81cb54a0 T radeon_ring_unlock_undo +ffffffff81cb54c0 T radeon_ring_test_lockup +ffffffff81cb55e0 T radeon_ring_backup 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radeon_ttm_io_mem_reserve +ffffffff81cbcf00 t radeon_ttm_tt_unbind +ffffffff81cbcfb0 t ttm_bo_move_null +ffffffff81cbd030 t radeon_move_blit +ffffffff81cbe000 T radeon_ucode_print_mc_hdr +ffffffff81cbe0b0 t radeon_ucode_print_common_hdr +ffffffff81cbe1e0 T radeon_ucode_print_smc_hdr +ffffffff81cbe270 T radeon_ucode_print_gfx_hdr +ffffffff81cbe340 T radeon_ucode_print_rlc_hdr +ffffffff81cbe440 T radeon_ucode_print_sdma_hdr +ffffffff81cbe520 T radeon_ucode_validate +ffffffff81cbf000 T radeon_uvd_init +ffffffff81cbf4f0 t radeon_uvd_idle_work_handler +ffffffff81cbf660 t radeon_bo_reserve +ffffffff81cbf860 t radeon_bo_unreserve +ffffffff81cbf940 T radeon_uvd_fini +ffffffff81cbfa10 T radeon_uvd_suspend +ffffffff81cbfbd0 T radeon_uvd_note_usage +ffffffff81cbfe10 T radeon_uvd_get_destroy_msg +ffffffff81cbff20 T radeon_uvd_resume +ffffffff81cbffb0 T radeon_uvd_force_into_uvd_segment +ffffffff81cc0050 T radeon_uvd_free_handles +ffffffff81cc0210 T radeon_uvd_cs_parse +ffffffff81cc0930 T radeon_uvd_get_create_msg +ffffffff81cc0ab0 t radeon_uvd_send_msg +ffffffff81cc0c50 T radeon_uvd_calc_upll_dividers +ffffffff81cc0e20 T radeon_uvd_send_upll_ctlreq +ffffffff81cc1160 t __delayed_work_tick +ffffffff81cc2000 T radeon_vce_init +ffffffff81cc2620 t radeon_vce_idle_work_handler +ffffffff81cc26e0 t radeon_bo_reserve +ffffffff81cc2850 t radeon_bo_unreserve +ffffffff81cc2930 T radeon_vce_fini +ffffffff81cc29b0 T radeon_vce_suspend +ffffffff81cc2a90 T radeon_vce_resume +ffffffff81cc2be0 T radeon_vce_note_usage +ffffffff81cc2d00 T radeon_vce_free_handles +ffffffff81cc2dc0 T radeon_vce_get_destroy_msg +ffffffff81cc2ff0 T radeon_vce_get_create_msg +ffffffff81cc3340 T radeon_vce_cs_reloc +ffffffff81cc3440 T radeon_vce_cs_parse +ffffffff81cc3bb0 T radeon_vce_semaphore_emit +ffffffff81cc3d70 T radeon_vce_ib_execute +ffffffff81cc3f00 T radeon_vce_fence_emit +ffffffff81cc4130 T radeon_vce_ring_test +ffffffff81cc4280 T radeon_vce_ib_test +ffffffff81cc43a0 t __delayed_work_tick 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rs690_mc_rreg +ffffffff81cce080 T rs690_mc_wreg +ffffffff81cce100 T rs690_resume +ffffffff81cce1f0 t rs690_startup +ffffffff81cce4d0 T rs690_suspend +ffffffff81cce530 T rs690_fini +ffffffff81cce5e0 T rs690_init +ffffffff81ccf000 T rs780_dpm_enable +ffffffff81ccfbf0 T rs780_dpm_disable +ffffffff81ccfcd0 T rs780_dpm_set_power_state +ffffffff81cd00b0 t rs780_force_voltage +ffffffff81cd01f0 t rs780_enable_voltage_scaling +ffffffff81cd03b0 T rs780_dpm_setup_asic +ffffffff81cd03e0 T rs780_dpm_display_configuration_changed +ffffffff81cd0530 T rs780_dpm_init +ffffffff81cd0aa0 T rs780_dpm_print_power_state +ffffffff81cd0b30 T rs780_dpm_fini +ffffffff81cd0bc0 T rs780_dpm_get_sclk +ffffffff81cd0c00 T rs780_dpm_get_mclk +ffffffff81cd0c30 T rs780_dpm_debugfs_print_current_performance_level +ffffffff81cd0c60 T rs780_dpm_get_current_sclk +ffffffff81cd0cf0 T rs780_dpm_get_current_mclk +ffffffff81cd0d20 T rs780_dpm_force_performance_level +ffffffff81cd0f10 t rs780_force_fbdiv +ffffffff81cd2000 T rv515_ring_start +ffffffff81cd2af0 T rv515_mc_wait_for_idle +ffffffff81cd2b90 T rv515_vga_render_disable +ffffffff81cd2be0 T rv515_mc_rreg +ffffffff81cd2c70 T rv515_mc_wreg +ffffffff81cd2cf0 T rv515_debugfs +ffffffff81cd2d00 T rv515_mc_stop +ffffffff81cd3270 T rv515_mc_resume +ffffffff81cd3850 T rv515_clock_startup +ffffffff81cd3910 T rv515_resume +ffffffff81cd3b50 t rv515_startup +ffffffff81cd4020 T rv515_suspend +ffffffff81cd4090 T rv515_set_safe_registers +ffffffff81cd40d0 T rv515_fini +ffffffff81cd4180 T rv515_init +ffffffff81cd4460 T atom_rv515_force_tv_scaler +ffffffff81cd7b00 T rv515_bandwidth_avivo_update +ffffffff81cd7ca0 t rv515_crtc_bandwidth_compute +ffffffff81cd7fb0 t rv515_compute_mode_priority +ffffffff81cd8480 T rv515_bandwidth_update +ffffffff81cd9000 T rv6xx_dpm_enable +ffffffff81cd9800 t rv6xx_calculate_stepping_parameters +ffffffff81cd99e0 t rv6xx_program_stepping_parameters_except_lowest_entry +ffffffff81cd9fb0 t rv6xx_program_stepping_parameters_lowest_entry +ffffffff81cda080 t rv6xx_enable_dynamic_pcie_gen2 +ffffffff81cda240 T rv6xx_dpm_disable +ffffffff81cda4b0 T rv6xx_dpm_set_power_state +ffffffff81cdaea0 T rv6xx_setup_asic +ffffffff81cdafe0 T rv6xx_dpm_display_configuration_changed +ffffffff81cdb060 T rv6xx_dpm_init +ffffffff81cdb5a0 T rv6xx_dpm_print_power_state +ffffffff81cdb660 T rv6xx_dpm_debugfs_print_current_performance_level +ffffffff81cdb690 T rv6xx_dpm_get_current_sclk +ffffffff81cdb700 T rv6xx_dpm_get_current_mclk +ffffffff81cdb770 T rv6xx_dpm_fini +ffffffff81cdb800 T rv6xx_dpm_get_sclk +ffffffff81cdb840 T rv6xx_dpm_get_mclk +ffffffff81cdb880 T rv6xx_dpm_force_performance_level +ffffffff81cdba10 t rv6xx_generate_steps +ffffffff81cdbd10 t rv6xx_output_stepping +ffffffff81cdbe20 t rv6xx_program_mclk_stepping_entry +ffffffff81cdc090 t rv6xx_program_engine_spread_spectrum +ffffffff81cdc380 t rv6xx_step_sw_voltage +ffffffff81cdd000 T rv730_populate_sclk_value +ffffffff81cdd230 T rv730_populate_mclk_value +ffffffff81cdd470 T rv730_read_clock_registers +ffffffff81cdd590 T rv730_populate_smc_acpi_state +ffffffff81cdd740 T rv730_populate_smc_initial_state +ffffffff81cdd900 T rv730_program_memory_timing_parameters +ffffffff81cddae0 T rv730_start_dpm +ffffffff81cddb70 T rv730_stop_dpm +ffffffff81cddc30 T rv730_program_dcodt +ffffffff81cddd00 T rv730_get_odt_values +ffffffff81cde000 T rv740_get_decoded_reference_divider +ffffffff81cde0a0 T rv740_get_dll_speed +ffffffff81cde2b0 T rv740_populate_sclk_value +ffffffff81cde4b0 T rv740_populate_mclk_value +ffffffff81cde860 T rv740_read_clock_registers +ffffffff81cde990 T rv740_populate_smc_acpi_state +ffffffff81cdebc0 T rv740_enable_mclk_spread_spectrum +ffffffff81cdec10 T rv740_get_mclk_frequency_ratio +ffffffff81cdf000 T rv770_set_uvd_clocks +ffffffff81cdf570 T rv770_get_xclk +ffffffff81cdf5d0 T rv770_page_flip +ffffffff81cdf8d0 T rv770_page_flip_pending +ffffffff81cdf940 T rv770_get_temp +ffffffff81cdf9a0 T rv770_pm_misc +ffffffff81cdfa80 T r700_cp_stop +ffffffff81cdfb00 T r700_cp_fini +ffffffff81cdfb90 T rv770_set_clk_bypass_mode +ffffffff81cdfcb0 T r700_vram_gtt_location +ffffffff81cdfe40 T rv770_resume +ffffffff81cdfed0 t rv770_init_golden_registers +ffffffff81ce0060 t rv770_startup +ffffffff81ce1c00 T rv770_suspend +ffffffff81ce1e20 T rv770_init +ffffffff81ce2210 t rv770_pcie_gart_fini +ffffffff81ce2390 T rv770_fini +ffffffff81ce2630 t rv770_uvd_start +ffffffff81ce26e0 t rv770_cp_load_microcode +ffffffff81ce29b0 t rv770_uvd_resume +ffffffff81ce3000 T rv770_copy_dma +ffffffff81ce4000 T rv770_get_ps +ffffffff81ce4030 T rv770_get_pi +ffffffff81ce4060 T evergreen_get_pi +ffffffff81ce4090 T rv770_restore_cgcg +ffffffff81ce4110 T rv770_stop_dpm +ffffffff81ce41d0 T rv770_dpm_enabled +ffffffff81ce4210 T rv770_enable_thermal_protection +ffffffff81ce4270 T rv770_enable_acpi_pm +ffffffff81ce42c0 T rv770_get_seq_value +ffffffff81ce4300 T rv770_write_smc_soft_register +ffffffff81ce4330 T rv770_populate_smc_t +ffffffff81ce44e0 T rv770_populate_smc_sp +ffffffff81ce4540 T rv770_map_clkf_to_ibias +ffffffff81ce45a0 T rv770_populate_vddc_value +ffffffff81ce4650 T rv770_populate_mvdd_value +ffffffff81ce46a0 T rv770_calculate_memory_refresh_rate +ffffffff81ce4720 T rv770_enable_backbias +ffffffff81ce4780 T rv770_setup_bsp +ffffffff81ce4870 T rv770_program_git +ffffffff81ce48c0 T rv770_program_tp +ffffffff81ce4940 T rv770_program_tpp +ffffffff81ce4980 T rv770_program_sstp +ffffffff81ce49c0 T rv770_program_engine_speed_parameters +ffffffff81ce4a10 T rv770_program_vc +ffffffff81ce4a60 T rv770_clear_vc +ffffffff81ce4aa0 T rv770_upload_firmware +ffffffff81ce4ae0 T rv770_populate_initial_mvdd_value +ffffffff81ce4b30 T rv770_get_memory_module_index +ffffffff81ce4b70 T rv770_enable_voltage_control +ffffffff81ce4bc0 T rv770_halt_smc +ffffffff81ce4c20 T rv770_resume_smc +ffffffff81ce4c70 T rv770_set_sw_state +ffffffff81ce4cd0 T rv770_set_boot_state +ffffffff81ce4d20 T rv770_set_uvd_clock_before_set_eng_clock +ffffffff81ce4d90 T rv770_set_uvd_clock_after_set_eng_clock +ffffffff81ce4e00 T rv770_restrict_performance_levels_before_switch +ffffffff81ce4e60 T rv770_dpm_force_performance_level +ffffffff81ce4f20 T r7xx_start_smc +ffffffff81ce4f50 T r7xx_stop_smc +ffffffff81ce4f80 T rv770_read_voltage_smio_registers +ffffffff81ce4fc0 T rv770_reset_smio_status +ffffffff81ce5080 T rv770_get_memory_type +ffffffff81ce50d0 T rv770_get_pcie_gen2_status +ffffffff81ce5140 T rv770_get_max_vddc +ffffffff81ce51a0 T rv770_program_response_times +ffffffff81ce52f0 T rv770_enable_auto_throttle_source +ffffffff81ce5470 T rv770_dpm_enable +ffffffff81ce64f0 T rv770_dpm_late_enable +ffffffff81ce6620 T rv770_dpm_disable +ffffffff81ce6990 T rv770_dpm_set_power_state +ffffffff81ce7080 t rv770_program_dcodt_after_state_switch +ffffffff81ce7100 T rv770_dpm_setup_asic +ffffffff81ce7470 T rv770_dpm_display_configuration_changed +ffffffff81ce74f0 T rv7xx_parse_power_table +ffffffff81ce7a70 T rv770_get_engine_memory_ss +ffffffff81ce7b00 T rv770_dpm_init +ffffffff81ce7d40 T rv770_dpm_print_power_state +ffffffff81ce7e60 T rv770_dpm_debugfs_print_current_performance_level +ffffffff81ce7e90 T rv770_dpm_get_current_sclk +ffffffff81ce7f00 T rv770_dpm_get_current_mclk +ffffffff81ce7f70 T rv770_dpm_fini +ffffffff81ce8000 T rv770_dpm_get_sclk +ffffffff81ce8050 T rv770_dpm_get_mclk +ffffffff81ce80a0 T rv770_dpm_vblank_too_short +ffffffff81ce8110 t rv770_convert_power_level_to_smc +ffffffff81ce9000 T rv770_copy_bytes_to_smc +ffffffff81ce9210 T rv770_start_smc +ffffffff81ce9260 T rv770_reset_smc +ffffffff81ce92b0 T rv770_stop_smc_clock +ffffffff81ce9300 T rv770_start_smc_clock +ffffffff81ce9350 T rv770_is_smc_running +ffffffff81ce9390 T rv770_send_msg_to_smc +ffffffff81ce9470 T rv770_wait_for_smc_inactive +ffffffff81ce9510 T rv770_load_smc_ucode +ffffffff81ce96a0 T rv770_read_smc_sram_dword +ffffffff81ce9760 T rv770_write_smc_sram_dword +ffffffff81cea000 T si_get_allowed_info_register +ffffffff81cea090 T si_get_xclk +ffffffff81cea100 T si_get_temp +ffffffff81cea150 T si_mc_load_microcode +ffffffff81cea410 T dce6_bandwidth_update +ffffffff81cea5d0 t dce6_line_buffer_adjust +ffffffff81cea780 t dce6_program_watermarks +ffffffff81ceb230 T si_fence_ring_emit +ffffffff81ceb690 T si_ring_ib_execute +ffffffff81cebe00 T si_gpu_check_soft_reset +ffffffff81cebfa0 T si_asic_reset +ffffffff81cec320 t si_gpu_pci_config_reset +ffffffff81cec640 T si_gfx_is_lockup +ffffffff81cec6b0 T si_vram_gtt_location +ffffffff81cec750 T si_pcie_gart_tlb_flush +ffffffff81cec7a0 T si_ib_parse +ffffffff81cece40 T si_vm_init +ffffffff81cece80 T si_vm_fini +ffffffff81ceceb0 T si_vm_flush +ffffffff81ced550 T si_init_uvd_internal_cg +ffffffff81ced5a0 T si_get_csb_size +ffffffff81ced630 T si_get_csb_buffer +ffffffff81ced7b0 T si_rlc_reset +ffffffff81ced830 T si_irq_set +ffffffff81cedd20 t si_disable_interrupt_state +ffffffff81cedfa0 T si_irq_process +ffffffff81cef2a0 t si_irq_ack +ffffffff81cef890 T si_resume +ffffffff81cef920 t si_init_golden_registers +ffffffff81cefae0 t si_startup +ffffffff81cf1f00 T si_suspend +ffffffff81cf21f0 t si_fini_cg +ffffffff81cf2290 T si_init +ffffffff81cf35f0 t si_cp_fini +ffffffff81cf36e0 t si_irq_fini +ffffffff81cf37b0 t si_pcie_gart_fini +ffffffff81cf38b0 T si_fini +ffffffff81cf3ad0 T si_get_gpu_clock_counter +ffffffff81cf3b90 T si_set_uvd_clocks +ffffffff81cf40f0 T si_set_vce_clocks +ffffffff81cf4630 t si_vce_send_vcepll_ctlreq +ffffffff81cf4870 t dce6_latency_watermark +ffffffff81cf4ab0 t si_rlc_stop +ffffffff81cf4c60 t si_vm_reg_valid +ffffffff81cf4dc0 t si_vm_packet3_cp_dma_check +ffffffff81cf4f30 t si_uvd_start +ffffffff81cf4fe0 t si_vce_start +ffffffff81cf50f0 t si_irq_init +ffffffff81cf5bd0 t si_cp_load_microcode +ffffffff81cf5fb0 t si_cp_resume +ffffffff81cf6e70 t si_uvd_resume +ffffffff81cf6f40 t si_vce_resume +ffffffff81cf7030 t pcie_capability_set_word +ffffffff81cf7140 t pcie_capability_read_word +ffffffff81cf71e0 t pcie_capability_clear_and_set_word +ffffffff81cf7300 t pcie_capability_write_word +ffffffff81cf73c0 t si_update_cg +ffffffff81cf7920 t si_enable_mgcg +ffffffff81cf7d40 t si_enable_cgcg +ffffffff81cf80d0 t request_firmware +ffffffff81cf8160 t release_firmware +ffffffff81cf9000 T si_dma_is_lockup +ffffffff81cf9080 T si_dma_vm_copy_pages +ffffffff81cf9170 T si_dma_vm_write_pages +ffffffff81cf92d0 T si_dma_vm_set_pages +ffffffff81cf9440 T si_dma_vm_flush +ffffffff81cf98b0 T si_copy_dma +ffffffff81cfa000 T si_dpm_force_performance_level +ffffffff81cfa160 T si_get_ddr3_mclk_frequency_ratio +ffffffff81cfa1c0 T si_get_mclk_frequency_ratio +ffffffff81cfa240 T si_trim_voltage_table_to_fit_state_table +ffffffff81cfa350 T si_dpm_setup_asic +ffffffff81cfa520 T si_fan_ctrl_get_fan_speed_percent +ffffffff81cfa5b0 T si_fan_ctrl_set_fan_speed_percent +ffffffff81cfa670 T si_fan_ctrl_set_mode +ffffffff81cfa8c0 T si_fan_ctrl_get_mode +ffffffff81cfa910 T si_dpm_enable +ffffffff81cfbc90 t si_init_smc_table +ffffffff81cfcea0 t si_init_smc_spll_table +ffffffff81cfd020 t si_init_arb_table_index +ffffffff81cfd0b0 t si_populate_mc_reg_table +ffffffff81cfd500 t si_initialize_smc_cac_tables +ffffffff81cff150 t si_initialize_hardware_cac_manager +ffffffff81cff200 t si_initialize_smc_dte_tables +ffffffff81cff400 t si_populate_smc_tdp_limits +ffffffff81cff600 t si_populate_smc_tdp_limits_2 +ffffffff81cff6d0 t si_program_response_times +ffffffff81cff7f0 t si_program_ds_registers +ffffffff81cff880 t si_dpm_start_smc +ffffffff81cff8b0 t si_enable_auto_throttle_source +ffffffff81cffa40 t si_thermal_start_thermal_controller +ffffffff81cfff00 T si_dpm_late_enable +ffffffff81d00050 T si_dpm_disable +ffffffff81d003d0 t si_enable_power_containment +ffffffff81d004a0 t si_enable_smc_cac +ffffffff81d00600 T si_dpm_pre_set_power_state +ffffffff81d01170 T si_dpm_set_power_state +ffffffff81d016d0 t si_halt_smc +ffffffff81d01730 t si_upload_sw_state +ffffffff81d02130 t si_upload_smc_data +ffffffff81d02270 t si_upload_ulv_state +ffffffff81d023b0 t si_upload_mc_reg_table +ffffffff81d02550 t si_set_pcie_lane_width_in_smc +ffffffff81d025f0 t si_resume_smc +ffffffff81d02650 t si_set_vce_clock +ffffffff81d026f0 t si_notify_link_speed_change_after_state_change +ffffffff81d02820 t si_set_power_state_conditionally_enable_ulv +ffffffff81d02900 t si_power_control_set_level +ffffffff81d02a90 T si_dpm_post_set_power_state +ffffffff81d02ac0 T si_dpm_display_configuration_changed +ffffffff81d02ba0 T si_dpm_init +ffffffff81d045e0 T si_dpm_fini +ffffffff81d04690 T si_dpm_debugfs_print_current_performance_level +ffffffff81d046e0 T si_dpm_get_current_sclk +ffffffff81d04750 T si_dpm_get_current_mclk +ffffffff81d047c0 t si_do_program_memory_timing_parameters +ffffffff81d04950 t si_populate_mvdd_value +ffffffff81d049d0 t si_convert_power_level_to_smc +ffffffff81d05280 t si_calculate_sclk_params +ffffffff81d054b0 t si_program_cac_config_registers +ffffffff81d06000 T si_copy_bytes_to_smc +ffffffff81d06240 T si_start_smc +ffffffff81d06280 T si_reset_smc +ffffffff81d062c0 T si_program_jump_on_start +ffffffff81d062f0 T si_stop_smc_clock +ffffffff81d06330 T si_start_smc_clock +ffffffff81d06370 T si_is_smc_running +ffffffff81d063d0 T si_send_msg_to_smc +ffffffff81d064a0 T si_wait_for_smc_inactive +ffffffff81d06540 T si_load_smc_ucode +ffffffff81d066e0 T si_read_smc_sram_dword +ffffffff81d067b0 T si_write_smc_sram_dword +ffffffff81d07000 T sumo_get_pi +ffffffff81d07030 T sumo_gfx_clockgating_initialize +ffffffff81d07110 T sumo_program_vc +ffffffff81d07150 T sumo_clear_vc +ffffffff81d07190 T sumo_program_sstp +ffffffff81d07210 T sumo_take_smu_control +ffffffff81d07240 T sumo_get_sleep_divider_from_id +ffffffff81d07270 T sumo_get_sleep_divider_id_from_clock +ffffffff81d07320 T sumo_dpm_enable +ffffffff81d079b0 T sumo_dpm_late_enable +ffffffff81d07f70 T sumo_dpm_disable +ffffffff81d082c0 T sumo_dpm_pre_set_power_state +ffffffff81d087b0 T sumo_dpm_set_power_state +ffffffff81d09260 T sumo_dpm_post_set_power_state +ffffffff81d09300 T sumo_dpm_setup_asic +ffffffff81d09400 T sumo_dpm_display_configuration_changed +ffffffff81d09430 T sumo_convert_vid2_to_vid7 +ffffffff81d09480 T sumo_construct_sclk_voltage_mapping_table +ffffffff81d09540 T sumo_construct_vid_mapping_table +ffffffff81d096b0 T sumo_dpm_init +ffffffff81d09f60 T sumo_dpm_print_power_state +ffffffff81d0a080 T sumo_dpm_debugfs_print_current_performance_level +ffffffff81d0a0b0 T sumo_dpm_get_current_sclk +ffffffff81d0a120 T sumo_dpm_get_current_mclk +ffffffff81d0a150 T sumo_dpm_get_current_vddc +ffffffff81d0a220 T sumo_dpm_fini +ffffffff81d0a2b0 T sumo_dpm_get_sclk +ffffffff81d0a300 T sumo_dpm_get_mclk +ffffffff81d0a330 T sumo_dpm_force_performance_level +ffffffff81d0a720 t sumo_power_level_enable +ffffffff81d0a950 t sumo_program_power_level +ffffffff81d0b000 T sumo_initialize_m3_arb +ffffffff81d0b2c0 T sumo_smu_notify_alt_vddnb_change +ffffffff81d0b360 t sumo_send_msg_to_smu +ffffffff81d0b4f0 T sumo_smu_pg_init +ffffffff81d0b510 T sumo_enable_boost_timer +ffffffff81d0b640 T sumo_set_tdp_limit +ffffffff81d0b6c0 T sumo_boost_state_enable +ffffffff81d0b710 T sumo_get_running_fw_version +ffffffff81d0c000 T trinity_dpm_enable_bapm +ffffffff81d0c080 T trinity_dpm_enable +ffffffff81d0c520 T trinity_dpm_late_enable +ffffffff81d0ca60 T trinity_dpm_disable +ffffffff81d0ce50 T trinity_dpm_force_performance_level +ffffffff81d0cf00 T trinity_dpm_pre_set_power_state +ffffffff81d0d4c0 T trinity_dpm_set_power_state +ffffffff81d0da30 T trinity_dpm_post_set_power_state +ffffffff81d0dad0 T trinity_dpm_setup_asic +ffffffff81d0db30 T trinity_dpm_display_configuration_changed +ffffffff81d0dbc0 T trinity_dpm_init +ffffffff81d0e4a0 T trinity_dpm_print_power_state +ffffffff81d0e5b0 T trinity_dpm_debugfs_print_current_performance_level +ffffffff81d0e640 T trinity_dpm_get_current_sclk +ffffffff81d0e6a0 T trinity_dpm_get_current_mclk +ffffffff81d0e6d0 T trinity_dpm_fini +ffffffff81d0e770 T trinity_dpm_get_sclk +ffffffff81d0e7c0 T trinity_dpm_get_mclk +ffffffff81d0e7f0 t trinity_program_power_level +ffffffff81d0f000 T trinity_dpm_bapm_enable +ffffffff81d0f150 T trinity_dpm_config +ffffffff81d0f230 T trinity_dpm_force_state +ffffffff81d0f310 T trinity_dpm_n_levels_disabled +ffffffff81d0f3f0 T trinity_uvd_dpm_config +ffffffff81d0f4c0 T trinity_dpm_no_forced_level +ffffffff81d0f590 T trinity_dce_enable_voltage_adjustment +ffffffff81d0f6e0 T trinity_gfx_dynamic_mgpg_config +ffffffff81d0f7b0 T trinity_acquire_mutex +ffffffff81d0f840 T trinity_release_mutex +ffffffff81d10000 T uvd_v1_0_get_rptr +ffffffff81d10040 T uvd_v1_0_get_wptr +ffffffff81d10080 T uvd_v1_0_set_wptr +ffffffff81d100c0 T uvd_v1_0_fence_emit +ffffffff81d104b0 T uvd_v1_0_resume +ffffffff81d10610 T uvd_v1_0_init +ffffffff81d10b90 T uvd_v1_0_start +ffffffff81d11310 T uvd_v1_0_fini +ffffffff81d11480 T uvd_v1_0_stop +ffffffff81d115f0 T uvd_v1_0_ring_test +ffffffff81d117c0 T uvd_v1_0_semaphore_emit +ffffffff81d117f0 T uvd_v1_0_ib_execute +ffffffff81d11980 T uvd_v1_0_ib_test +ffffffff81d12000 T uvd_v2_2_fence_emit +ffffffff81d12450 T uvd_v2_2_semaphore_emit +ffffffff81d12650 T uvd_v2_2_resume +ffffffff81d13000 T uvd_v3_1_semaphore_emit +ffffffff81d14000 T uvd_v4_2_resume +ffffffff81d15000 T vce_v1_0_get_rptr +ffffffff81d15090 T vce_v1_0_get_wptr +ffffffff81d15120 T vce_v1_0_set_wptr +ffffffff81d151b0 T vce_v1_0_enable_mgcg +ffffffff81d15470 T vce_v1_0_load_fw +ffffffff81d15640 T vce_v1_0_bo_size +ffffffff81d156b0 T vce_v1_0_resume +ffffffff81d16020 T vce_v1_0_start +ffffffff81d167e0 T vce_v1_0_init +ffffffff81d17000 T vce_v2_0_enable_mgcg +ffffffff81d17070 t vce_v2_0_set_dyn_cg +ffffffff81d17260 T vce_v2_0_bo_size +ffffffff81d172d0 T vce_v2_0_resume +ffffffff81d18000 T aldebaran_reset_init +ffffffff81d180c0 t aldebaran_async_reset +ffffffff81d18120 t aldebaran_get_reset_handler +ffffffff81d181c0 T aldebaran_reset_fini +ffffffff81d18220 t aldebaran_mode2_prepare_hwcontext +ffffffff81d18340 t aldebaran_mode2_perform_reset +ffffffff81d18500 t aldebaran_mode2_restore_hwcontext +ffffffff81d189e0 t aldebaran_mode2_reset +ffffffff81d19000 T aldebaran_reg_base_init +ffffffff81d1a000 T amdgpu_acpi_is_pcie_performance_request_supported +ffffffff81d1a040 T amdgpu_acpi_is_power_shift_control_supported +ffffffff81d1a070 T amdgpu_acpi_pcie_notify_device_ready +ffffffff81d1a180 T amdgpu_acpi_pcie_performance_request +ffffffff81d1a500 T amdgpu_acpi_power_shift_control +ffffffff81d1a640 T amdgpu_acpi_smart_shift_update +ffffffff81d1a6e0 T amdgpu_acpi_init +ffffffff81d1a7a0 t amdgpu_acpi_event +ffffffff81d1aab0 T amdgpu_acpi_get_backlight_caps +ffffffff81d1ab00 T amdgpu_acpi_fini +ffffffff81d1ab20 T amdgpu_acpi_should_gpu_reset +ffffffff81d1ab70 T amdgpu_acpi_detect +ffffffff81d1c000 T amdgpu_afmt_acr +ffffffff81d1d000 T amdgpu_amdkfd_init +ffffffff81d1d040 T amdgpu_amdkfd_fini +ffffffff81d1d070 T amdgpu_amdkfd_device_probe +ffffffff81d1d0a0 T amdgpu_amdkfd_device_init +ffffffff81d1d260 t amdgpu_amdkfd_reset_work +ffffffff81d1d2e0 T amdgpu_amdkfd_device_fini_sw +ffffffff81d1d330 T amdgpu_amdkfd_interrupt +ffffffff81d1d360 T amdgpu_amdkfd_suspend +ffffffff81d1d390 T amdgpu_amdkfd_resume_iommu +ffffffff81d1d3c0 T amdgpu_amdkfd_resume +ffffffff81d1d3f0 T amdgpu_amdkfd_pre_reset +ffffffff81d1d420 T amdgpu_amdkfd_post_reset +ffffffff81d1d450 T amdgpu_amdkfd_gpu_reset +ffffffff81d1d4b0 T amdgpu_amdkfd_alloc_gtt_mem +ffffffff81d1d750 t amdgpu_bo_reserve +ffffffff81d1d8b0 t amdgpu_bo_unreserve +ffffffff81d1d990 T amdgpu_amdkfd_free_gtt_mem +ffffffff81d1da00 T amdgpu_amdkfd_alloc_gws +ffffffff81d1dae0 T amdgpu_amdkfd_free_gws +ffffffff81d1db20 T amdgpu_amdkfd_get_fw_version +ffffffff81d1dbd0 T amdgpu_amdkfd_get_local_mem_info +ffffffff81d1dca0 T amdgpu_amdkfd_get_gpu_clock_counter +ffffffff81d1dce0 T amdgpu_amdkfd_get_max_engine_clock_in_mhz +ffffffff81d1dd60 T amdgpu_amdkfd_get_cu_info +ffffffff81d1deb0 T amdgpu_amdkfd_get_dmabuf_info +ffffffff81d1dff0 T amdgpu_amdkfd_get_xgmi_hops_count +ffffffff81d1e060 T amdgpu_amdkfd_get_xgmi_bandwidth_mbytes +ffffffff81d1e0f0 T amdgpu_amdkfd_get_pcie_bandwidth_mbytes +ffffffff81d1e250 T amdgpu_amdkfd_submit_ib +ffffffff81d1e3b0 T amdgpu_amdkfd_set_compute_idle +ffffffff81d1e400 T amdgpu_amdkfd_is_kfd_vmid +ffffffff81d1e440 T amdgpu_amdkfd_flush_gpu_tlb_vmid +ffffffff81d1e4e0 T amdgpu_amdkfd_flush_gpu_tlb_pasid +ffffffff81d1e510 T amdgpu_amdkfd_have_atomics_support +ffffffff81d1e540 T amdgpu_amdkfd_ras_poison_consumption_handler +ffffffff81d1e5a0 T amdgpu_amdkfd_ras_query_utcl2_poison_status +ffffffff81d1f000 T amdgpu_atom_execute_table +ffffffff81d1f0a0 t amdgpu_atom_execute_table_locked +ffffffff81d1f3c0 T amdgpu_atom_parse +ffffffff81d1f940 T amdgpu_atom_destroy +ffffffff81d1f980 T amdgpu_atom_asic_init +ffffffff81d1faa0 t get_u32 +ffffffff81d1fb00 T amdgpu_atom_parse_data_header +ffffffff81d1fba0 T amdgpu_atom_parse_cmd_header +ffffffff81d1fc20 t atom_op_move +ffffffff81d1fdf0 t atom_op_and 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atom_op_shr +ffffffff81d22640 t atom_op_debug +ffffffff81d226f0 t atom_op_processds +ffffffff81d227b0 t atom_op_mul32 +ffffffff81d22910 t atom_op_div32 +ffffffff81d22aa0 t atom_put_dst +ffffffff81d22fb0 t atom_get_src_int +ffffffff81d23630 t atom_iio_execute +ffffffff81d24000 T amdgpu_atombios_lookup_i2c_gpio +ffffffff81d24260 T amdgpu_atombios_i2c_init +ffffffff81d24520 T amdgpu_atombios_lookup_gpio +ffffffff81d24620 T amdgpu_atombios_has_dce_engine_info +ffffffff81d246a0 T amdgpu_atombios_get_connector_info_from_object_table +ffffffff81d24f00 T amdgpu_atombios_get_clock_info +ffffffff81d25240 T amdgpu_atombios_get_gfx_info +ffffffff81d25300 T amdgpu_atombios_get_vram_width +ffffffff81d25390 T amdgpu_atombios_get_asic_ss_info +ffffffff81d25670 t amdgpu_atombios_get_igp_ss_overrides +ffffffff81d25790 T amdgpu_atombios_get_clock_dividers +ffffffff81d259b0 T amdgpu_atombios_has_gpu_virtualization_table +ffffffff81d25a00 T amdgpu_atombios_scratch_regs_lock +ffffffff81d25a60 T amdgpu_atombios_scratch_regs_engine_hung +ffffffff81d25ab0 T amdgpu_atombios_scratch_regs_set_backlight_level +ffffffff81d25b10 T amdgpu_atombios_scratch_need_asic_init +ffffffff81d25b60 T amdgpu_atombios_copy_swap +ffffffff81d25b80 T amdgpu_atombios_fini +ffffffff81d25c30 T amdgpu_atombios_init +ffffffff81d25ed0 t cail_reg_read +ffffffff81d25ef0 t cail_reg_write +ffffffff81d25f10 t cail_mc_read +ffffffff81d25f40 t cail_mc_write +ffffffff81d25f70 t cail_pll_read +ffffffff81d25fa0 t cail_pll_write +ffffffff81d25fd0 T amdgpu_atombios_get_data_table +ffffffff81d27000 T amdgpu_atombios_crtc_overscan_setup +ffffffff81d27150 T amdgpu_atombios_crtc_scaler_setup +ffffffff81d271d0 T amdgpu_atombios_crtc_lock +ffffffff81d27230 T amdgpu_atombios_crtc_enable +ffffffff81d27290 T amdgpu_atombios_crtc_blank +ffffffff81d272f0 T amdgpu_atombios_crtc_powergate +ffffffff81d27360 T amdgpu_atombios_crtc_powergate_init +ffffffff81d273d0 T amdgpu_atombios_crtc_set_dtd_timing +ffffffff81d27500 T amdgpu_atombios_crtc_set_disp_eng_pll +ffffffff81d275f0 T amdgpu_atombios_crtc_set_dce_clock +ffffffff81d276e0 T amdgpu_atombios_crtc_program_pll +ffffffff81d27a00 T amdgpu_atombios_crtc_prepare_pll +ffffffff81d27f00 T amdgpu_atombios_crtc_set_pll +ffffffff81d29000 T amdgpu_atombios_dp_aux_init +ffffffff81d29090 t amdgpu_atombios_dp_aux_transfer +ffffffff81d29200 T amdgpu_atombios_dp_get_sinktype +ffffffff81d29270 T amdgpu_atombios_dp_get_dpcd +ffffffff81d29420 T amdgpu_atombios_dp_get_panel_mode +ffffffff81d29510 T amdgpu_atombios_dp_set_link_config +ffffffff81d29590 t amdgpu_atombios_dp_get_dp_link_config +ffffffff81d29720 T amdgpu_atombios_dp_mode_valid_helper +ffffffff81d297a0 T amdgpu_atombios_dp_needs_link_train +ffffffff81d29810 T amdgpu_atombios_dp_set_rx_power_state +ffffffff81d29890 T amdgpu_atombios_dp_link_train +ffffffff81d29df0 t amdgpu_atombios_dp_process_aux_ch +ffffffff81d29f50 t amdgpu_atombios_dp_get_adjust_train +ffffffff81d2b000 T amdgpu_atombios_encoder_get_backlight_level_from_reg +ffffffff81d2b050 T amdgpu_atombios_encoder_set_backlight_level_to_reg +ffffffff81d2b0a0 T amdgpu_atombios_encoder_get_backlight_level +ffffffff81d2b100 T amdgpu_atombios_encoder_set_backlight_level +ffffffff81d2b210 T amdgpu_atombios_encoder_setup_dig_transmitter +ffffffff81d2bc30 T amdgpu_atombios_encoder_init_backlight +ffffffff81d2bdd0 t amdgpu_atombios_encoder_get_backlight_brightness +ffffffff81d2be30 T amdgpu_atombios_encoder_fini_backlight +ffffffff81d2bec0 T amdgpu_atombios_encoder_is_digital +ffffffff81d2bf10 T amdgpu_atombios_encoder_mode_fixup +ffffffff81d2bff0 T amdgpu_atombios_encoder_get_encoder_mode +ffffffff81d2c190 T amdgpu_atombios_encoder_setup_dig_encoder +ffffffff81d2c670 t amdgpu_atombios_encoder_get_bpc +ffffffff81d2c6c0 T amdgpu_atombios_encoder_set_edp_panel_power +ffffffff81d2c7c0 T amdgpu_atombios_encoder_dpms +ffffffff81d2c930 t amdgpu_atombios_encoder_setup_dig +ffffffff81d2cce0 t amdgpu_atombios_encoder_setup_dvo +ffffffff81d2ce90 T amdgpu_atombios_encoder_set_crtc_source +ffffffff81d2d270 T amdgpu_atombios_encoder_init_dig +ffffffff81d2d340 t amdgpu_atombios_encoder_setup_external_encoder +ffffffff81d2d5b0 T amdgpu_atombios_encoder_dac_detect +ffffffff81d2d770 T amdgpu_atombios_encoder_dig_detect +ffffffff81d2d870 T amdgpu_atombios_encoder_setup_ext_encoder_ddc +ffffffff81d2d8c0 T amdgpu_atombios_encoder_set_bios_scratch_regs +ffffffff81d2de10 T amdgpu_atombios_encoder_get_lcd_info +ffffffff81d2e170 T amdgpu_atombios_encoder_get_dig_info +ffffffff81d2e1e0 t amdgpu_atombios_encoder_update_backlight_status +ffffffff81d2f000 T amdgpu_atombios_i2c_xfer +ffffffff81d2f370 T amdgpu_atombios_i2c_func +ffffffff81d2f3a0 T amdgpu_atombios_i2c_channel_trans +ffffffff81d30000 T amdgpu_atomfirmware_query_firmware_capability +ffffffff81d300a0 T amdgpu_atomfirmware_gpu_virtualization_supported +ffffffff81d300e0 T amdgpu_atomfirmware_scratch_regs_init +ffffffff81d30160 T amdgpu_atomfirmware_allocate_fb_scratch +ffffffff81d30350 T amdgpu_atomfirmware_get_vram_info +ffffffff81d307c0 t convert_atom_mem_type_to_vram_type +ffffffff81d30830 T amdgpu_atomfirmware_mem_ecc_supported +ffffffff81d308e0 T amdgpu_atomfirmware_sram_ecc_supported +ffffffff81d30920 T amdgpu_atomfirmware_dynamic_boot_config_supported +ffffffff81d30960 T amdgpu_atomfirmware_ras_rom_addr +ffffffff81d30a10 T amdgpu_atomfirmware_get_clock_info +ffffffff81d30c60 T amdgpu_atomfirmware_get_gfx_info +ffffffff81d30e00 T amdgpu_atomfirmware_mem_training_supported +ffffffff81d30e40 T amdgpu_atomfirmware_get_fw_reserved_fb_size +ffffffff81d30ed0 T amdgpu_atomfirmware_asic_init +ffffffff81d32000 T amdgpu_benchmark +ffffffff81d32790 t amdgpu_benchmark_move +ffffffff81d33000 T amdgpu_read_bios +ffffffff81d33190 t check_atom_bios +ffffffff81d332a0 T amdgpu_get_bios +ffffffff81d337c0 t igp_read_bios_from_vram +ffffffff81d33900 t amdgpu_read_platform_bios +ffffffff81d339d0 T amdgpu_soc15_read_bios_from_rom +ffffffff81d34000 T amdgpu_bo_list_create +ffffffff81d342a0 T amdgpu_bo_list_get +ffffffff81d34310 T amdgpu_bo_list_get_list +ffffffff81d34490 T amdgpu_bo_list_put +ffffffff81d34540 T amdgpu_bo_create_list_entry_array +ffffffff81d34690 T amdgpu_bo_list_ioctl +ffffffff81d35000 T amdgpu_cgs_create_device +ffffffff81d35080 T amdgpu_cgs_destroy_device +ffffffff81d350a0 t amdgpu_cgs_read_register +ffffffff81d350c0 t amdgpu_cgs_write_register +ffffffff81d350e0 t amdgpu_cgs_read_ind_register +ffffffff81d351c0 t amdgpu_cgs_write_ind_register +ffffffff81d35270 t amdgpu_cgs_get_firmware_info +ffffffff81d36000 T amdgpu_connector_hotplug +ffffffff81d36110 T amdgpu_connector_get_monitor_bpc +ffffffff81d363a0 T amdgpu_connector_edid +ffffffff81d36450 T amdgpu_connector_encoder_get_dp_bridge_encoder_id +ffffffff81d364d0 T amdgpu_connector_is_dp12_capable +ffffffff81d36560 T amdgpu_connector_add +ffffffff81d37150 t amdgpu_connector_dp_detect +ffffffff81d374a0 t amdgpu_connector_dvi_force +ffffffff81d374f0 t amdgpu_connector_set_property +ffffffff81d37a60 t amdgpu_connector_late_register +ffffffff81d37ac0 t amdgpu_connector_unregister +ffffffff81d37b20 t amdgpu_connector_destroy +ffffffff81d37b90 t amdgpu_connector_best_single_encoder +ffffffff81d37c00 t amdgpu_connector_dp_get_modes +ffffffff81d37f00 t amdgpu_connector_dp_mode_valid +ffffffff81d38010 t amdgpu_connector_dvi_encoder +ffffffff81d380d0 t amdgpu_connector_get_edid +ffffffff81d38250 t amdgpu_connector_fixup_lcd_native_mode +ffffffff81d38390 t amdgpu_connector_add_common_modes +ffffffff81d38480 t amdgpu_connector_lcd_native_mode +ffffffff81d38560 t amdgpu_connector_set_lcd_property +ffffffff81d38650 t amdgpu_connector_vga_detect +ffffffff81d38890 t amdgpu_connector_vga_get_modes +ffffffff81d38970 t amdgpu_connector_vga_mode_valid +ffffffff81d389c0 t amdgpu_connector_dvi_detect +ffffffff81d38db0 t amdgpu_connector_dvi_mode_valid +ffffffff81d38e60 t amdgpu_connector_lvds_detect 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amdgpu_vm_cpu_update +ffffffff81da9160 t amdgpu_vm_cpu_commit +ffffffff81daa000 T amdgpu_vm_pt_clear +ffffffff81daa420 T amdgpu_vm_pt_create +ffffffff81daa910 T amdgpu_vm_pt_free_work +ffffffff81daabc0 t amdgpu_vm_pt_free +ffffffff81daaca0 T amdgpu_vm_pt_free_root +ffffffff81daacc0 t amdgpu_vm_pt_free_dfs +ffffffff81dab0f0 T amdgpu_vm_pt_is_root_clean +ffffffff81dab1c0 T amdgpu_vm_pde_update +ffffffff81dab2b0 T amdgpu_vm_ptes_update +ffffffff81dabc00 t amdgpu_vm_pt_next +ffffffff81dabd10 t amdgpu_vm_pt_next_dfs +ffffffff81dabe50 t amdgpu_vm_pt_sibling +ffffffff81dac000 t amdgpu_vm_sdma_map_table +ffffffff81dac060 t amdgpu_vm_sdma_prepare +ffffffff81dac100 t amdgpu_vm_sdma_update +ffffffff81dac5b0 t amdgpu_vm_sdma_commit +ffffffff81dad000 T amdgpu_vram_mgr_bo_visible_size +ffffffff81dad100 T amdgpu_vram_mgr_reserve_range +ffffffff81dad1e0 t amdgpu_vram_mgr_do_reserve +ffffffff81dad360 T amdgpu_vram_mgr_query_page_status +ffffffff81dad440 T amdgpu_vram_mgr_alloc_sgt +ffffffff81dad490 T amdgpu_vram_mgr_free_sgt +ffffffff81dad4c0 T amdgpu_vram_mgr_vis_usage +ffffffff81dad4f0 T amdgpu_vram_mgr_init +ffffffff81dad6c0 T amdgpu_vram_mgr_fini +ffffffff81dad8e0 t amdgpu_vram_mgr_new +ffffffff81dade90 t amdgpu_vram_mgr_del +ffffffff81dadf70 t amdgpu_vram_mgr_intersects +ffffffff81dadff0 t amdgpu_vram_mgr_compatible +ffffffff81dae060 t amdgpu_vram_mgr_debug +ffffffff81daf000 t amdgpu_xgmi_hive_release +ffffffff81daf050 T amdgpu_get_xgmi_hive +ffffffff81daf0a0 T amdgpu_put_xgmi_hive +ffffffff81daf0f0 T amdgpu_xgmi_set_pstate +ffffffff81daf140 T amdgpu_xgmi_update_topology +ffffffff81daf1f0 T amdgpu_xgmi_get_hops_count +ffffffff81daf260 T amdgpu_xgmi_get_num_links +ffffffff81daf2d0 T amdgpu_xgmi_add_device +ffffffff81daf4f0 T amdgpu_xgmi_remove_device +ffffffff81daf640 T amdgpu_xgmi_get_relative_phy_addr +ffffffff81daf680 t amdgpu_ras_error_inject_xgmi +ffffffff81daf7f0 t amdgpu_xgmi_query_ras_error_count +ffffffff81dafe30 t amdgpu_xgmi_reset_ras_error_count +ffffffff81db0150 t amdgpu_xgmi_ras_late_init +ffffffff81db1000 T arct_reg_base_init +ffffffff81db2000 T athub_v1_0_set_clockgating +ffffffff81db2210 T athub_v1_0_get_clockgating +ffffffff81db3000 T athub_v2_0_set_clockgating +ffffffff81db31e0 T athub_v2_0_get_clockgating +ffffffff81db4000 T athub_v2_1_set_clockgating +ffffffff81db41f0 T athub_v2_1_get_clockgating +ffffffff81db5000 T athub_v3_0_set_clockgating +ffffffff81db50d0 T athub_v3_0_get_clockgating +ffffffff81db5120 t athub_v3_0_get_cg_cntl +ffffffff81db51c0 t athub_v3_0_set_cg_cntl +ffffffff81db6000 t cz_ih_early_init +ffffffff81db6050 t cz_ih_sw_init +ffffffff81db60b0 t cz_ih_sw_fini +ffffffff81db60f0 t cz_ih_hw_init +ffffffff81db6310 t cz_ih_hw_fini +ffffffff81db63e0 t cz_ih_suspend +ffffffff81db64b0 t cz_ih_resume +ffffffff81db64f0 t cz_ih_is_idle +ffffffff81db6540 t cz_ih_wait_for_idle +ffffffff81db65e0 t cz_ih_soft_reset +ffffffff81db66c0 t cz_ih_set_clockgating_state +ffffffff81db66f0 t cz_ih_set_powergating_state +ffffffff81db6720 t cz_ih_get_wptr +ffffffff81db6810 t cz_ih_decode_iv +ffffffff81db6890 t cz_ih_set_rptr +ffffffff81db7000 T dce_v10_0_disable_dce +ffffffff81db7150 t dce_v10_0_early_init +ffffffff81db7210 t dce_v10_0_sw_init +ffffffff81db7510 t dce_v10_0_sw_fini +ffffffff81db7630 t dce_v10_0_hw_init +ffffffff81db7990 t dce_v10_0_hw_fini +ffffffff81db7b10 t dce_v10_0_suspend +ffffffff81db7b70 t dce_v10_0_resume +ffffffff81db7be0 t dce_v10_0_is_idle +ffffffff81db7c10 t dce_v10_0_wait_for_idle +ffffffff81db7c40 t dce_v10_0_check_soft_reset +ffffffff81db7c50 t dce_v10_0_soft_reset +ffffffff81db7d20 t dce_v10_0_set_clockgating_state +ffffffff81db7d50 t dce_v10_0_set_powergating_state +ffffffff81db7d80 t dce_v10_0_audio_endpt_rreg +ffffffff81db7e10 t dce_v10_0_audio_endpt_wreg +ffffffff81db7e90 t dce_v10_0_bandwidth_update +ffffffff81db8900 t dce_v10_0_vblank_get_counter +ffffffff81db8950 t dce_v10_0_hpd_sense +ffffffff81db89b0 t dce_v10_0_hpd_set_polarity +ffffffff81db8a80 t dce_v10_0_hpd_get_gpio_reg +ffffffff81db8ab0 t dce_v10_0_page_flip +ffffffff81db8bb0 t dce_v10_0_crtc_get_scanoutpos +ffffffff81db8c50 t dce_v10_0_encoder_add +ffffffff81db8ea0 t dce_v10_0_latency_watermark +ffffffff81db90d0 t dce_v10_0_encoder_destroy +ffffffff81db9130 t dce_v10_0_encoder_prepare +ffffffff81db9330 t dce_v10_0_encoder_commit +ffffffff81db9360 t dce_v10_0_encoder_mode_set +ffffffff81dba2d0 t dce_v10_0_encoder_disable +ffffffff81dba3e0 t dce_v10_0_ext_dpms +ffffffff81dba410 t dce_v10_0_ext_prepare +ffffffff81dba440 t dce_v10_0_ext_commit +ffffffff81dba470 t dce_v10_0_ext_mode_set +ffffffff81dba4a0 t dce_v10_0_ext_disable +ffffffff81dba4d0 t dce_v10_0_set_crtc_irq_state +ffffffff81dba5b0 t dce_v10_0_crtc_irq +ffffffff81dba7f0 t dce_v10_0_set_crtc_vblank_interrupt_state +ffffffff81dba8c0 t dce_v10_0_set_crtc_vline_interrupt_state +ffffffff81dba990 t dce_v10_0_set_pageflip_irq_state +ffffffff81dbaa40 t dce_v10_0_pageflip_irq +ffffffff81dbaba0 t dce_v10_0_set_hpd_irq_state +ffffffff81dbac70 t dce_v10_0_hpd_irq +ffffffff81dbad90 t dce_v10_0_afmt_init +ffffffff81dbaea0 t dce_v10_0_audio_init +ffffffff81dbaf70 t dce_v10_0_crtc_cursor_set2 +ffffffff81dbb230 t dce_v10_0_crtc_cursor_move +ffffffff81dbb300 t dce_v10_0_crtc_gamma_set +ffffffff81dbb340 t dce_v10_0_crtc_destroy +ffffffff81dbb370 t amdgpu_bo_reserve +ffffffff81dbb570 t amdgpu_bo_unreserve +ffffffff81dbb650 t dce_v10_0_lock_cursor +ffffffff81dbb6b0 t dce_v10_0_cursor_move_locked +ffffffff81dbb810 t dce_v10_0_show_cursor +ffffffff81dbb8b0 t dce_v10_0_crtc_load_lut +ffffffff81dbbc40 t dce_v10_0_crtc_dpms +ffffffff81dbbe20 t dce_v10_0_crtc_prepare +ffffffff81dbbe60 t dce_v10_0_crtc_commit +ffffffff81dbbe90 t dce_v10_0_crtc_mode_fixup +ffffffff81dbc040 t dce_v10_0_crtc_mode_set +ffffffff81dbc220 t dce_v10_0_crtc_set_base +ffffffff81dbc240 t dce_v10_0_crtc_set_base_atomic +ffffffff81dbc260 t dce_v10_0_crtc_disable +ffffffff81dbc3f0 t dce_v10_0_crtc_do_set_base +ffffffff81dbcaf0 t dce_v10_0_is_display_hung +ffffffff81dbd000 T dce_v11_0_disable_dce +ffffffff81dbd160 t dce_v11_0_early_init +ffffffff81dbd290 t dce_v11_0_sw_init +ffffffff81dbd590 t dce_v11_0_sw_fini +ffffffff81dbd6b0 t dce_v11_0_hw_init +ffffffff81dbda70 t dce_v11_0_hw_fini +ffffffff81dbdbf0 t dce_v11_0_suspend +ffffffff81dbdc50 t dce_v11_0_resume +ffffffff81dbdcc0 t dce_v11_0_is_idle +ffffffff81dbdcf0 t dce_v11_0_wait_for_idle +ffffffff81dbdd20 t dce_v11_0_soft_reset +ffffffff81dbdf30 t dce_v11_0_set_clockgating_state +ffffffff81dbdf60 t dce_v11_0_set_powergating_state +ffffffff81dbdf90 t dce_v11_0_audio_endpt_rreg +ffffffff81dbe020 t dce_v11_0_audio_endpt_wreg +ffffffff81dbe0a0 t dce_v11_0_bandwidth_update +ffffffff81dbeb10 t dce_v11_0_vblank_get_counter +ffffffff81dbeb60 t dce_v11_0_hpd_sense +ffffffff81dbebc0 t dce_v11_0_hpd_set_polarity +ffffffff81dbec90 t dce_v11_0_hpd_get_gpio_reg +ffffffff81dbecc0 t dce_v11_0_page_flip +ffffffff81dbedc0 t dce_v11_0_crtc_get_scanoutpos +ffffffff81dbee60 t dce_v11_0_encoder_add +ffffffff81dbf0b0 t dce_v11_0_latency_watermark +ffffffff81dbf2e0 t dce_v11_0_encoder_destroy +ffffffff81dbf340 t dce_v11_0_encoder_prepare +ffffffff81dbf540 t dce_v11_0_encoder_commit +ffffffff81dbf570 t dce_v11_0_encoder_mode_set +ffffffff81dc04e0 t dce_v11_0_encoder_disable +ffffffff81dc05f0 t dce_v11_0_ext_dpms +ffffffff81dc0620 t dce_v11_0_ext_prepare +ffffffff81dc0650 t dce_v11_0_ext_commit +ffffffff81dc0680 t dce_v11_0_ext_mode_set +ffffffff81dc06b0 t dce_v11_0_ext_disable +ffffffff81dc06e0 t dce_v11_0_set_crtc_irq_state +ffffffff81dc07c0 t dce_v11_0_crtc_irq +ffffffff81dc09e0 t dce_v11_0_set_crtc_vblank_interrupt_state +ffffffff81dc0ab0 t dce_v11_0_set_crtc_vline_interrupt_state +ffffffff81dc0b80 t dce_v11_0_set_pageflip_irq_state +ffffffff81dc0c30 t dce_v11_0_pageflip_irq +ffffffff81dc0d90 t dce_v11_0_set_hpd_irq_state +ffffffff81dc0e60 t dce_v11_0_hpd_irq +ffffffff81dc0f80 t dce_v11_0_afmt_init +ffffffff81dc1090 t dce_v11_0_audio_init +ffffffff81dc1190 t dce_v11_0_crtc_cursor_set2 +ffffffff81dc1450 t dce_v11_0_crtc_cursor_move +ffffffff81dc1520 t dce_v11_0_crtc_gamma_set +ffffffff81dc1560 t dce_v11_0_crtc_destroy +ffffffff81dc1590 t amdgpu_bo_reserve +ffffffff81dc1790 t amdgpu_bo_unreserve +ffffffff81dc1870 t dce_v11_0_lock_cursor +ffffffff81dc18d0 t dce_v11_0_cursor_move_locked +ffffffff81dc1a30 t dce_v11_0_show_cursor +ffffffff81dc1ad0 t dce_v11_0_crtc_load_lut +ffffffff81dc1e30 t dce_v11_0_crtc_dpms +ffffffff81dc2010 t dce_v11_0_crtc_prepare +ffffffff81dc2050 t dce_v11_0_crtc_commit +ffffffff81dc2080 t dce_v11_0_crtc_mode_fixup +ffffffff81dc22f0 t dce_v11_0_crtc_mode_set +ffffffff81dc2550 t dce_v11_0_crtc_set_base +ffffffff81dc2570 t dce_v11_0_crtc_set_base_atomic +ffffffff81dc2590 t dce_v11_0_crtc_disable +ffffffff81dc2730 t dce_v11_0_crtc_do_set_base +ffffffff81dc3000 t df_v1_7_sw_init +ffffffff81dc3040 t df_v1_7_sw_fini +ffffffff81dc3070 t df_v1_7_enable_broadcast_mode +ffffffff81dc3190 t df_v1_7_get_fb_channel_number +ffffffff81dc3210 t df_v1_7_get_hbm_channel_number +ffffffff81dc3260 t df_v1_7_update_medium_grain_clock_gating +ffffffff81dc33d0 t df_v1_7_get_clockgating_state +ffffffff81dc3460 t df_v1_7_enable_ecc_force_par_wr_rmw +ffffffff81dc4000 t df_v3_6_sw_init +ffffffff81dc4150 t df_v3_6_sw_fini +ffffffff81dc4180 t df_v3_6_enable_broadcast_mode +ffffffff81dc42a0 t df_v3_6_get_fb_channel_number +ffffffff81dc4380 t df_v3_6_get_hbm_channel_number +ffffffff81dc43d0 t df_v3_6_update_medium_grain_clock_gating +ffffffff81dc4570 t df_v3_6_get_clockgating_state +ffffffff81dc4600 t df_v3_6_pmc_start +ffffffff81dc4900 t df_v3_6_pmc_stop +ffffffff81dc4ba0 t df_v3_6_pmc_get_count +ffffffff81dc4d30 t df_v3_6_get_fica +ffffffff81dc4e20 t df_v3_6_set_fica +ffffffff81dc4f00 t df_v3_6_query_ras_poison_mode +ffffffff81dc6000 T dimgrey_cavefish_reg_base_init +ffffffff81dc7000 T emu_soc_asic_init +ffffffff81dc8000 t gfx_v10_0_early_init +ffffffff81dc82f0 t gfx_v10_0_late_init +ffffffff81dc8360 t gfx_v10_0_sw_init +ffffffff81dc8890 t gfx_v10_0_sw_fini +ffffffff81dc8bd0 t gfx_v10_0_hw_init +ffffffff81dcb740 t gfx_v10_0_hw_fini +ffffffff81dcba30 t gfx_v10_0_suspend +ffffffff81dcba70 t gfx_v10_0_resume +ffffffff81dcba80 t gfx_v10_0_is_idle +ffffffff81dcbb10 t gfx_v10_0_wait_for_idle +ffffffff81dcbbf0 t gfx_v10_0_soft_reset +ffffffff81dcbf40 t gfx_v10_0_set_clockgating_state +ffffffff81dcc1e0 t gfx_v10_0_set_powergating_state +ffffffff81dcc2a0 t gfx_v10_0_get_clockgating_state +ffffffff81dcc3b0 t gfx10_kiq_set_resources +ffffffff81dcc6d0 t gfx10_kiq_map_queues +ffffffff81dcca60 t gfx10_kiq_unmap_queues +ffffffff81dcce60 t gfx10_kiq_query_status +ffffffff81dcd150 t gfx10_kiq_invalidate_tlbs +ffffffff81dcd270 t gfx_v10_0_ring_get_rptr_compute +ffffffff81dcd2a0 t gfx_v10_0_ring_get_wptr_compute +ffffffff81dcd310 t gfx_v10_0_ring_set_wptr_compute +ffffffff81dcd450 t gfx_v10_0_ring_emit_ib_compute +ffffffff81dcd790 t gfx_v10_0_ring_emit_fence_kiq +ffffffff81dcdbd0 t gfx_v10_0_ring_test_ring +ffffffff81dcde30 t gfx_v10_0_ring_test_ib +ffffffff81dce0c0 t gfx_v10_0_ring_emit_rreg +ffffffff81dce350 t gfx_v10_0_ring_emit_wreg +ffffffff81dce580 t gfx_v10_0_ring_emit_reg_wait +ffffffff81dce5d0 t gfx_v10_0_ring_emit_reg_write_reg_wait +ffffffff81dce660 t gfx_v10_0_wait_reg_mem +ffffffff81dce990 t gfx_v10_0_ring_get_rptr_gfx +ffffffff81dce9c0 t gfx_v10_0_ring_get_wptr_gfx +ffffffff81dcead0 t gfx_v10_0_ring_set_wptr_gfx +ffffffff81dcece0 t gfx_v10_0_ring_emit_ib_gfx +ffffffff81dcf380 t gfx_v10_0_ring_emit_fence +ffffffff81dcf750 t gfx_v10_0_ring_emit_pipeline_sync +ffffffff81dcf7b0 t gfx_v10_0_ring_emit_vm_flush +ffffffff81dcf980 t gfx_v10_0_ring_emit_hdp_flush +ffffffff81dcfa50 t gfx_v10_0_ring_emit_gds_switch +ffffffff81dcfb30 t gfx_v10_0_ring_emit_init_cond_exec +ffffffff81dcfd60 t gfx_v10_0_ring_emit_patch_cond_exec +ffffffff81dcfe20 t gfx_v10_0_ring_emit_sb +ffffffff81dcff10 t gfx_v10_0_ring_emit_cntxcntl +ffffffff81dd0400 t gfx_v10_0_ring_emit_frame_cntl +ffffffff81dd0510 t gfx_v10_0_ring_soft_recovery +ffffffff81dd0580 t gfx_v10_0_ring_preempt_ib +ffffffff81dd06f0 t gfx_v10_0_emit_mem_sync +ffffffff81dd0a20 t gfx_v10_0_write_data_to_reg +ffffffff81dd0c30 t gfx_v10_0_set_eop_interrupt_state +ffffffff81dd0d10 t gfx_v10_0_eop_irq +ffffffff81dd0ed0 t gfx_v10_0_set_gfx_eop_interrupt_state +ffffffff81dd1060 t gfx_v10_0_set_compute_eop_interrupt_state +ffffffff81dd1210 t gfx_v10_0_kiq_set_interrupt_state +ffffffff81dd14f0 t gfx_v10_0_kiq_irq +ffffffff81dd1570 t gfx_v10_0_set_priv_reg_fault_state +ffffffff81dd1690 t gfx_v10_0_priv_reg_irq +ffffffff81dd16f0 t gfx_v10_0_handle_priv_fault +ffffffff81dd1860 t gfx_v10_0_set_priv_inst_fault_state +ffffffff81dd1980 t gfx_v10_0_priv_inst_irq +ffffffff81dd19e0 t gfx_v10_0_is_rlc_enabled +ffffffff81dd1a60 t gfx_v10_0_set_safe_mode +ffffffff81dd1d00 t gfx_v10_0_unset_safe_mode +ffffffff81dd1db0 t gfx_v10_0_rlc_init +ffffffff81dd1e30 t gfx_v10_0_get_csb_size +ffffffff81dd1e60 t gfx_v10_0_get_csb_buffer +ffffffff81dd1fd0 t gfx_v10_0_rlc_resume +ffffffff81dd2a00 t gfx_v10_0_rlc_stop +ffffffff81dd2ae0 t gfx_v10_0_rlc_reset +ffffffff81dd2c80 t gfx_v10_0_rlc_start +ffffffff81dd2e20 t gfx_v10_0_update_spm_vmid +ffffffff81dd2f50 t gfx_v10_0_wait_for_rlc_autoload_complete +ffffffff81dd3830 t gfx_v10_0_init_csb +ffffffff81dd3b00 t gfx_v10_0_rlc_backdoor_autoload_config_mec_cache +ffffffff81dd3db0 t gfx_v10_0_is_rlcg_access_range +ffffffff81dd3de0 t gfx_v10_0_gfx_mqd_init +ffffffff81dd41c0 t gfx_v10_0_compute_mqd_init +ffffffff81dd4660 t gfx_v10_0_me_init +ffffffff81dd4e50 t gfx_v10_0_mec_init +ffffffff81dd5060 t gfx_v10_0_compute_ring_init +ffffffff81dd51a0 t gfx_v10_0_rlc_backdoor_autoload_buffer_init +ffffffff81dd5400 t gfx_v10_0_gpu_early_init +ffffffff81dd5660 t amdgpu_bo_unreserve +ffffffff81dd5740 t gfx_v10_0_get_gpu_clock_counter +ffffffff81dd5c40 t gfx_v10_0_select_se_sh +ffffffff81dd5ce0 t gfx_v10_0_read_wave_data +ffffffff81dd5f40 t gfx_v10_0_read_wave_vgprs +ffffffff81dd5f70 t gfx_v10_0_read_wave_sgprs +ffffffff81dd5ff0 t gfx_v10_0_select_me_pipe_q +ffffffff81dd6010 t gfx_v10_0_init_spm_golden_registers +ffffffff81dd6080 t gfx_v10_0_update_perfmon_mgcg +ffffffff81dd61a0 t wave_read_ind +ffffffff81dd6280 t wave_read_regs +ffffffff81dd63e0 t gfx_v10_0_cp_resume +ffffffff81dd8f90 t gfx_v10_3_get_disabled_sa +ffffffff81dd90a0 t gfx_v10_0_get_rb_active_bitmap +ffffffff81dd91c0 t gfx_v10_0_get_wgp_active_bitmap_per_sh +ffffffff81dd92d0 t gfx_v10_0_enable_gui_idle_interrupt +ffffffff81dd93e0 t gfx_v10_0_cp_gfx_enable +ffffffff81dd9620 t gfx_v10_0_cp_compute_enable +ffffffff81dd97b0 t amdgpu_bo_reserve +ffffffff81dd9920 t gfx_v10_0_kiq_init_register +ffffffff81dda760 t gfx_v10_0_cp_gfx_switch_pipe +ffffffff81dda860 t gfx_v10_0_cp_gfx_set_doorbell +ffffffff81ddab30 t gfx_v10_0_cp_gfx_start +ffffffff81ddb520 t gfx_v10_0_update_fine_grain_clock_gating +ffffffff81ddb850 t gfx_v10_0_update_medium_grain_clock_gating +ffffffff81ddbf60 t gfx_v10_0_update_3d_clock_gating +ffffffff81ddc330 t gfx_v10_0_update_coarse_grain_clock_gating +ffffffff81ddc6f0 t gfx_v10_cntl_pg +ffffffff81ddd000 t gfx_v11_0_early_init +ffffffff81ddd270 t gfx_v11_0_late_init +ffffffff81ddd2e0 t gfx_v11_0_sw_init +ffffffff81dddc90 t gfx_v11_0_sw_fini +ffffffff81dddf60 t gfx_v11_0_hw_init +ffffffff81de2450 t gfx_v11_0_hw_fini +ffffffff81de26c0 t gfx_v11_0_suspend +ffffffff81de2700 t gfx_v11_0_resume +ffffffff81de2710 t gfx_v11_0_is_idle +ffffffff81de27a0 t gfx_v11_0_wait_for_idle +ffffffff81de2880 t gfx_v11_0_check_soft_reset +ffffffff81de29b0 t gfx_v11_0_soft_reset +ffffffff81de3670 t gfx_v11_0_post_soft_reset +ffffffff81de3680 t gfx_v11_0_set_clockgating_state +ffffffff81de4260 t gfx_v11_0_set_powergating_state +ffffffff81de4300 t gfx_v11_0_get_clockgating_state +ffffffff81de44d0 t gfx11_kiq_set_resources +ffffffff81de47f0 t gfx11_kiq_map_queues +ffffffff81de4b80 t gfx11_kiq_unmap_queues +ffffffff81de4f80 t gfx11_kiq_query_status +ffffffff81de5270 t gfx11_kiq_invalidate_tlbs +ffffffff81de5390 t gfx_v11_0_ring_get_rptr_compute +ffffffff81de53c0 t gfx_v11_0_ring_get_wptr_compute +ffffffff81de5430 t gfx_v11_0_ring_set_wptr_compute +ffffffff81de5580 t gfx_v11_0_ring_emit_ib_compute +ffffffff81de58c0 t gfx_v11_0_ring_emit_fence_kiq +ffffffff81de5cf0 t gfx_v11_0_ring_test_ring +ffffffff81de5f70 t gfx_v11_0_ring_test_ib +ffffffff81de6210 t gfx_v11_0_ring_emit_rreg +ffffffff81de64a0 t gfx_v11_0_ring_emit_wreg +ffffffff81de66d0 t gfx_v11_0_ring_emit_reg_wait +ffffffff81de6720 t gfx_v11_0_ring_emit_reg_write_reg_wait +ffffffff81de6790 t gfx_v11_0_wait_reg_mem +ffffffff81de6ac0 t gfx_v11_0_ring_get_rptr_gfx +ffffffff81de6af0 t gfx_v11_0_ring_get_wptr_gfx +ffffffff81de6c00 t gfx_v11_0_ring_set_wptr_gfx +ffffffff81de6e10 t gfx_v11_0_ring_emit_ib_gfx +ffffffff81de74a0 t gfx_v11_0_ring_emit_fence +ffffffff81de7870 t gfx_v11_0_ring_emit_pipeline_sync +ffffffff81de78d0 t gfx_v11_0_ring_emit_vm_flush +ffffffff81de7aa0 t gfx_v11_0_ring_emit_hdp_flush +ffffffff81de7b70 t gfx_v11_0_ring_emit_gds_switch +ffffffff81de7c50 t gfx_v11_0_ring_emit_init_cond_exec +ffffffff81de7e80 t gfx_v11_0_ring_emit_patch_cond_exec +ffffffff81de7f40 t gfx_v11_0_ring_emit_cntxcntl +ffffffff81de80a0 t gfx_v11_0_ring_emit_frame_cntl +ffffffff81de81b0 t gfx_v11_0_ring_soft_recovery +ffffffff81de8220 t gfx_v11_0_ring_preempt_ib +ffffffff81de8390 t gfx_v11_0_emit_mem_sync +ffffffff81de86c0 t gfx_v11_0_write_data_to_reg +ffffffff81de88d0 t gfx_v11_0_set_eop_interrupt_state +ffffffff81de8960 t gfx_v11_0_eop_irq +ffffffff81de8b20 t gfx_v11_0_set_gfx_eop_interrupt_state +ffffffff81de8cb0 t gfx_v11_0_set_compute_eop_interrupt_state +ffffffff81de8e40 t gfx_v11_0_set_priv_reg_fault_state +ffffffff81de8f60 t gfx_v11_0_priv_reg_irq +ffffffff81de8fc0 t gfx_v11_0_handle_priv_fault +ffffffff81de9130 t gfx_v11_0_set_priv_inst_fault_state +ffffffff81de9250 t gfx_v11_0_priv_inst_irq +ffffffff81de92b0 t gfx_v11_0_is_rlc_enabled +ffffffff81de9330 t gfx_v11_0_set_safe_mode +ffffffff81de9480 t gfx_v11_0_unset_safe_mode +ffffffff81de94f0 t gfx_v11_0_rlc_init +ffffffff81de9570 t gfx_v11_0_get_csb_size +ffffffff81de95a0 t gfx_v11_0_get_csb_buffer +ffffffff81de9710 t gfx_v11_0_rlc_resume +ffffffff81dea430 t gfx_v11_0_rlc_stop +ffffffff81dea510 t gfx_v11_0_rlc_reset +ffffffff81dea6b0 t gfx_v11_0_rlc_start +ffffffff81dea850 t gfx_v11_0_update_spm_vmid +ffffffff81dea950 t gfx_v11_0_init_csb +ffffffff81deaad0 t gfx_v11_0_gfx_mqd_init +ffffffff81deaea0 t gfx_v11_0_compute_mqd_init +ffffffff81deb3c0 t gfx_v11_0_mec_init +ffffffff81deb500 t gfx_v11_0_compute_ring_init +ffffffff81deb640 t gfx_v11_0_init_toc_microcode +ffffffff81deb7e0 t gfx_v11_0_rlc_autoload_buffer_init +ffffffff81deb9d0 t gfx_v11_0_gpu_early_init +ffffffff81deba70 t amdgpu_bo_unreserve +ffffffff81debb50 t gfx_v11_0_get_gpu_clock_counter +ffffffff81debeb0 t gfx_v11_0_select_se_sh +ffffffff81debf50 t gfx_v11_0_read_wave_data +ffffffff81dec190 t gfx_v11_0_read_wave_vgprs +ffffffff81dec1c0 t gfx_v11_0_read_wave_sgprs +ffffffff81dec240 t gfx_v11_0_select_me_pipe_q +ffffffff81dec260 t gfx_v11_0_update_perf_clk +ffffffff81dec390 t wave_read_ind +ffffffff81dec470 t wave_read_regs +ffffffff81dec5d0 t gfx_v11_0_disable_gpa_mode +ffffffff81dec760 t gfx_v11_0_cp_resume +ffffffff81df0690 t gfx_v11_0_config_me_cache +ffffffff81df0a30 t gfx_v11_0_config_pfp_cache +ffffffff81df0dd0 t gfx_v11_0_config_mec_cache +ffffffff81df1170 t gfx_v11_0_enable_gui_idle_interrupt +ffffffff81df1280 t gfx_v11_0_cp_compute_enable +ffffffff81df1450 t gfx_v11_0_cp_gfx_enable +ffffffff81df1640 t amdgpu_bo_reserve +ffffffff81df17b0 t gfx_v11_0_kiq_init_register +ffffffff81df2600 t gfx_v11_0_cp_gfx_switch_pipe +ffffffff81df26e0 t gfx_v11_0_cp_gfx_set_doorbell +ffffffff81df28c0 t gfx_v11_0_cp_gfx_start +ffffffff81df3140 t gfx_v11_cntl_pg +ffffffff81df4000 t gfx_v8_0_early_init +ffffffff81df41f0 t gfx_v8_0_late_init +ffffffff81df4920 t gfx_v8_0_sw_init +ffffffff81df4d10 t gfx_v8_0_sw_fini +ffffffff81df4fd0 t gfx_v8_0_hw_init +ffffffff81df71c0 t gfx_v8_0_hw_fini +ffffffff81df76b0 t gfx_v8_0_suspend +ffffffff81df76f0 t gfx_v8_0_resume +ffffffff81df7700 t gfx_v8_0_is_idle +ffffffff81df7770 t gfx_v8_0_wait_for_idle +ffffffff81df7820 t gfx_v8_0_check_soft_reset +ffffffff81df7900 t gfx_v8_0_pre_soft_reset +ffffffff81df7a80 t gfx_v8_0_soft_reset +ffffffff81df7c40 t gfx_v8_0_post_soft_reset +ffffffff81df7de0 t gfx_v8_0_set_clockgating_state +ffffffff81df8060 t gfx_v8_0_set_powergating_state +ffffffff81df8410 t gfx_v8_0_get_clockgating_state +ffffffff81df84f0 t gfx_v8_0_get_gpu_clock_counter +ffffffff81df8590 t gfx_v8_0_select_se_sh +ffffffff81df85f0 t gfx_v8_0_read_wave_data +ffffffff81df8a90 t gfx_v8_0_read_wave_sgprs +ffffffff81df8b40 t gfx_v8_0_select_me_pipe_q +ffffffff81df8b60 t gfx_v8_0_ring_get_rptr +ffffffff81df8b90 t gfx_v8_0_ring_get_wptr_compute +ffffffff81df8bc0 t gfx_v8_0_ring_set_wptr_compute +ffffffff81df8c00 t gfx_v8_0_ring_emit_fence_kiq +ffffffff81df9020 t gfx_v8_0_ring_test_ring +ffffffff81df9220 t gfx_v8_0_ring_emit_rreg +ffffffff81df94b0 t gfx_v8_0_ring_emit_wreg +ffffffff81df96e0 t gfx_v8_0_ring_get_wptr_gfx +ffffffff81df9740 t gfx_v8_0_ring_set_wptr_gfx +ffffffff81df97b0 t gfx_v8_0_ring_emit_ib_gfx +ffffffff81df9d10 t gfx_v8_0_ring_emit_fence_gfx +ffffffff81dfa200 t gfx_v8_0_ring_emit_pipeline_sync +ffffffff81dfa4f0 t gfx_v8_0_ring_emit_vm_flush +ffffffff81dfa8a0 t gfx_v8_0_ring_emit_hdp_flush +ffffffff81dfabc0 t gfx_v8_0_ring_emit_gds_switch +ffffffff81dfb370 t gfx_v8_0_ring_test_ib +ffffffff81dfb520 t gfx_v8_0_ring_emit_init_cond_exec +ffffffff81dfb750 t gfx_v8_0_ring_emit_patch_cond_exec +ffffffff81dfb800 t gfx_v8_ring_emit_sb +ffffffff81dfb8f0 t gfx_v8_ring_emit_cntxcntl +ffffffff81dfbe90 t gfx_v8_0_ring_soft_recovery +ffffffff81dfbec0 t gfx_v8_0_emit_mem_sync +ffffffff81dfc0c0 t gfx_v8_0_ring_emit_ib_compute +ffffffff81dfc3c0 t gfx_v8_0_ring_emit_fence_compute +ffffffff81dfc6c0 t gfx_v8_0_emit_mem_sync_compute +ffffffff81dfc980 t gfx_v8_0_emit_wave_limit +ffffffff81dfcb30 t gfx_v8_0_set_eop_interrupt_state +ffffffff81dfcd40 t gfx_v8_0_eop_irq +ffffffff81dfce70 t gfx_v8_0_set_priv_reg_fault_state +ffffffff81dfcef0 t gfx_v8_0_priv_reg_irq +ffffffff81dfd010 t gfx_v8_0_set_priv_inst_fault_state +ffffffff81dfd090 t gfx_v8_0_priv_inst_irq +ffffffff81dfd1b0 t gfx_v8_0_set_cp_ecc_int_state +ffffffff81dfd410 t gfx_v8_0_cp_ecc_error_irq +ffffffff81dfd460 t gfx_v8_0_set_sq_int_state +ffffffff81dfd4f0 t gfx_v8_0_sq_irq +ffffffff81dfd590 t gfx_v8_0_parse_sq_irq +ffffffff81dfd7e0 t gfx_v8_0_is_rlc_enabled +ffffffff81dfd820 t gfx_v8_0_set_safe_mode +ffffffff81dfd920 t gfx_v8_0_unset_safe_mode +ffffffff81dfd9c0 t gfx_v8_0_rlc_init +ffffffff81dfda70 t gfx_v8_0_get_csb_size +ffffffff81dfdaa0 t gfx_v8_0_get_csb_buffer +ffffffff81dfdc10 t gfx_v8_0_cp_jump_table_num +ffffffff81dfdc50 t gfx_v8_0_rlc_resume +ffffffff81dfdfd0 t gfx_v8_0_rlc_stop +ffffffff81dfe040 t gfx_v8_0_rlc_reset +ffffffff81dfe0c0 t gfx_v8_0_rlc_start +ffffffff81dfe140 t gfx_v8_0_update_spm_vmid +ffffffff81dfe1b0 t gfx_v8_0_init_save_restore_list +ffffffff81dfe5c0 t gfx_v8_0_wait_for_rlc_serdes +ffffffff81dfe7e0 t gfx_v8_0_sq_irq_work_func +ffffffff81dfe800 t gfx_v8_0_init_microcode +ffffffff81dff2e0 t gfx_v8_0_mec_init +ffffffff81dff3e0 t gfx_v8_0_compute_ring_init +ffffffff81dff520 t gfx_v8_0_gpu_early_init +ffffffff81dff9c0 t request_firmware +ffffffff81dffa50 t amdgpu_bo_unreserve +ffffffff81dffb30 t gfx_v8_0_kiq_resume +ffffffff81dffd90 t gfx_v8_0_cp_gfx_resume +ffffffff81e00870 t gfx_v8_0_kcq_resume +ffffffff81e012c0 t amdgpu_bo_reserve +ffffffff81e01430 t gfx_v8_0_mqd_commit +ffffffff81e01610 t gfx_v8_0_mqd_init +ffffffff81e01a30 t gfx_v8_0_deactivate_hqd +ffffffff81e01af0 t gfx_v8_0_update_medium_grain_clock_gating +ffffffff81e01e20 t gfx_v8_0_update_coarse_grain_clock_gating +ffffffff81e03000 t gfx_v9_0_ras_error_inject +ffffffff81e031a0 t gfx_v9_0_query_ras_error_count +ffffffff81e03d40 t gfx_v9_0_reset_ras_error_count +ffffffff81e04740 T gfx_v9_0_select_se_sh +ffffffff81e047e0 t gfx_v9_0_early_init +ffffffff81e04b10 t gfx_v9_0_late_init +ffffffff81e058e0 t gfx_v9_0_sw_init +ffffffff81e05d80 t gfx_v9_0_sw_fini +ffffffff81e06030 t gfx_v9_0_hw_init +ffffffff81e09080 t gfx_v9_0_hw_fini +ffffffff81e097f0 t gfx_v9_0_suspend +ffffffff81e09830 t gfx_v9_0_resume +ffffffff81e09840 t gfx_v9_0_is_idle +ffffffff81e098c0 t gfx_v9_0_wait_for_idle +ffffffff81e099a0 t gfx_v9_0_soft_reset +ffffffff81e09d30 t gfx_v9_0_set_clockgating_state +ffffffff81e09e00 t gfx_v9_0_set_powergating_state +ffffffff81e0a1e0 t gfx_v9_0_get_clockgating_state +ffffffff81e0a2f0 t gfx_v9_0_kiq_set_resources +ffffffff81e0a610 t gfx_v9_0_kiq_map_queues +ffffffff81e0a950 t gfx_v9_0_kiq_unmap_queues +ffffffff81e0acd0 t gfx_v9_0_kiq_query_status +ffffffff81e0afc0 t gfx_v9_0_kiq_invalidate_tlbs +ffffffff81e0b0e0 t gfx_v9_0_ring_get_rptr_compute +ffffffff81e0b110 t gfx_v9_0_ring_get_wptr_compute +ffffffff81e0b180 t gfx_v9_0_ring_set_wptr_compute +ffffffff81e0b1e0 t gfx_v9_0_ring_emit_fence_kiq +ffffffff81e0b610 t gfx_v9_0_ring_test_ring +ffffffff81e0b840 t gfx_v9_0_ring_emit_rreg +ffffffff81e0bad0 t gfx_v9_0_ring_emit_wreg +ffffffff81e0bd00 t gfx_v9_0_ring_emit_reg_wait +ffffffff81e0bd50 t gfx_v9_0_ring_emit_reg_write_reg_wait +ffffffff81e0bdf0 t gfx_v9_0_wait_reg_mem +ffffffff81e0c120 t gfx_v9_0_ring_get_rptr_gfx +ffffffff81e0c150 t gfx_v9_0_ring_get_wptr_gfx +ffffffff81e0c260 t gfx_v9_0_ring_set_wptr_gfx +ffffffff81e0c390 t gfx_v9_0_ring_emit_ib_gfx +ffffffff81e0c8c0 t gfx_v9_0_ring_emit_fence +ffffffff81e0cc70 t gfx_v9_0_ring_emit_pipeline_sync +ffffffff81e0ccd0 t gfx_v9_0_ring_emit_vm_flush +ffffffff81e0cde0 t gfx_v9_0_ring_emit_hdp_flush +ffffffff81e0ceb0 t gfx_v9_0_ring_emit_gds_switch +ffffffff81e0cf90 t gfx_v9_0_ring_test_ib +ffffffff81e0d140 t gfx_v9_0_ring_emit_init_cond_exec +ffffffff81e0d370 t gfx_v9_0_ring_emit_patch_cond_exec +ffffffff81e0d430 t gfx_v9_ring_emit_sb +ffffffff81e0d520 t gfx_v9_ring_emit_cntxcntl +ffffffff81e0d910 t gfx_v9_0_ring_emit_frame_cntl +ffffffff81e0da20 t gfx_v9_0_ring_soft_recovery +ffffffff81e0da90 t gfx_v9_0_emit_mem_sync +ffffffff81e0dd50 t gfx_v9_0_write_data_to_reg +ffffffff81e0df60 t gfx_v9_0_ring_emit_ib_compute +ffffffff81e0e290 t gfx_v9_0_emit_wave_limit +ffffffff81e0e470 t gfx_v9_0_set_eop_interrupt_state +ffffffff81e0e640 t gfx_v9_0_eop_irq +ffffffff81e0e770 t gfx_v9_0_set_compute_eop_interrupt_state +ffffffff81e0e920 t gfx_v9_0_set_priv_reg_fault_state +ffffffff81e0ea40 t gfx_v9_0_priv_reg_irq +ffffffff81e0eb60 t gfx_v9_0_set_priv_inst_fault_state +ffffffff81e0ec80 t gfx_v9_0_priv_inst_irq +ffffffff81e0eda0 t gfx_v9_0_set_cp_ecc_error_state +ffffffff81e0f5d0 t gfx_v9_0_is_rlc_enabled +ffffffff81e0f650 t gfx_v9_0_set_safe_mode +ffffffff81e0f7a0 t gfx_v9_0_unset_safe_mode +ffffffff81e0f810 t gfx_v9_0_rlc_init +ffffffff81e10020 t gfx_v9_0_get_csb_size +ffffffff81e10050 t gfx_v9_0_get_csb_buffer +ffffffff81e10190 t gfx_v9_0_cp_jump_table_num +ffffffff81e101e0 t gfx_v9_0_rlc_resume +ffffffff81e10f70 t gfx_v9_0_rlc_stop +ffffffff81e11400 t gfx_v9_0_rlc_reset +ffffffff81e11590 t gfx_v9_0_rlc_start +ffffffff81e116d0 t gfx_v9_0_update_spm_vmid +ffffffff81e11800 t gfx_v9_0_is_rlcg_access_range +ffffffff81e11850 t gfx_v9_0_init_always_on_cu_mask +ffffffff81e11b80 t gfx_v9_0_init_csb +ffffffff81e11d10 t gfx_v9_0_enable_lbpw +ffffffff81e11e00 t gfx_v9_0_enable_gui_idle_interrupt +ffffffff81e11f00 t gfx_v9_0_init_microcode +ffffffff81e12a30 t gfx_v9_0_mec_init +ffffffff81e12c20 t gfx_v9_0_compute_ring_init +ffffffff81e12d60 t gfx_v9_0_gpu_early_init +ffffffff81e13260 t request_firmware +ffffffff81e132f0 t amdgpu_bo_unreserve +ffffffff81e133d0 t gfx_v9_0_get_gpu_clock_counter +ffffffff81e13b50 t gfx_v9_0_read_wave_data +ffffffff81e13d90 t gfx_v9_0_read_wave_vgprs +ffffffff81e13db0 t gfx_v9_0_read_wave_sgprs +ffffffff81e13e00 t gfx_v9_0_select_me_pipe_q +ffffffff81e13e20 t wave_read_ind +ffffffff81e13f10 t wave_read_regs +ffffffff81e14060 t gfx_v9_0_cp_gfx_enable +ffffffff81e14140 t amdgpu_bo_reserve +ffffffff81e142b0 t gfx_v9_0_kiq_init_register +ffffffff81e14f30 t gfx_v9_0_mqd_init +ffffffff81e15470 t gfx_v9_0_update_medium_grain_clock_gating +ffffffff81e15980 t gfx_v9_0_update_3d_clock_gating +ffffffff81e15d60 t gfx_v9_0_update_coarse_grain_clock_gating +ffffffff81e17000 t gfx_v9_4_ras_error_inject +ffffffff81e17130 t gfx_v9_4_query_ras_error_count +ffffffff81e17ef0 t gfx_v9_4_query_ras_error_status +ffffffff81e180b0 t gfx_v9_4_reset_ras_error_count +ffffffff81e19000 T gfx_v9_4_2_do_edc_gpr_workarounds +ffffffff81e19760 T gfx_v9_4_2_init_golden_registers +ffffffff81e197f0 T gfx_v9_4_2_debug_trap_config_init +ffffffff81e19890 T gfx_v9_4_2_set_power_brake_sequence +ffffffff81e19a60 t gfx_v9_4_2_ras_error_inject +ffffffff81e19b90 t gfx_v9_4_2_query_ras_error_count +ffffffff81e19c40 t gfx_v9_4_2_query_ras_error_status +ffffffff81e1a480 t gfx_v9_4_2_reset_ras_error_count +ffffffff81e1a4e0 t gfx_v9_4_2_reset_ras_error_status +ffffffff81e1a9a0 t gfx_v9_4_2_enable_watchdog_timer +ffffffff81e1abc0 t gfx_v9_4_2_query_uctl2_poison_status +ffffffff81e1ac40 t gfx_v9_4_2_run_shader +ffffffff81e1b040 t gfx_v9_4_2_wait_for_waves_assigned +ffffffff81e1b690 t gfx_v9_4_2_query_sram_edc_count +ffffffff81e1b9d0 t gfx_v9_4_2_query_utc_edc_count +ffffffff81e1bba0 t wave_read_ind +ffffffff81e1c000 t gfxhub_v1_0_get_mc_fb_offset +ffffffff81e1c090 t gfxhub_v1_0_setup_vm_pt_regs +ffffffff81e1c1d0 t gfxhub_v1_0_gart_enable +ffffffff81e1d670 t gfxhub_v1_0_gart_disable +ffffffff81e1d900 t gfxhub_v1_0_set_fault_enable_default +ffffffff81e1d9f0 t gfxhub_v1_0_init +ffffffff81e1e000 T gfxhub_v1_1_get_xgmi_info +ffffffff81e1f000 t gfxhub_v2_0_get_fb_location +ffffffff81e1f090 t gfxhub_v2_0_get_mc_fb_offset +ffffffff81e1f120 t gfxhub_v2_0_setup_vm_pt_regs +ffffffff81e1f260 t gfxhub_v2_0_gart_enable +ffffffff81e20420 t gfxhub_v2_0_gart_disable +ffffffff81e20660 t gfxhub_v2_0_set_fault_enable_default +ffffffff81e20750 t gfxhub_v2_0_init +ffffffff81e20820 t gfxhub_v2_0_print_l2_protection_fault_status +ffffffff81e209f0 t gfxhub_v2_0_get_invalidate_req +ffffffff81e21000 t gfxhub_v2_1_get_fb_location +ffffffff81e21090 t gfxhub_v2_1_get_mc_fb_offset +ffffffff81e21120 t gfxhub_v2_1_setup_vm_pt_regs +ffffffff81e21260 t gfxhub_v2_1_gart_enable +ffffffff81e224f0 t gfxhub_v2_1_gart_disable +ffffffff81e22770 t gfxhub_v2_1_set_fault_enable_default +ffffffff81e22880 t gfxhub_v2_1_init +ffffffff81e22950 t gfxhub_v2_1_get_xgmi_info +ffffffff81e22a80 t gfxhub_v2_1_utcl2_harvest +ffffffff81e22c60 t gfxhub_v2_1_save_regs +ffffffff81e23690 t gfxhub_v2_1_restore_regs +ffffffff81e24260 t gfxhub_v2_1_halt +ffffffff81e24620 t gfxhub_v2_1_print_l2_protection_fault_status +ffffffff81e247f0 t gfxhub_v2_1_get_invalidate_req +ffffffff81e25000 t gfxhub_v3_0_get_fb_location +ffffffff81e25090 t gfxhub_v3_0_get_mc_fb_offset +ffffffff81e25120 t gfxhub_v3_0_setup_vm_pt_regs +ffffffff81e25260 t gfxhub_v3_0_gart_enable +ffffffff81e264a0 t gfxhub_v3_0_gart_disable +ffffffff81e26720 t gfxhub_v3_0_set_fault_enable_default +ffffffff81e26ac0 t gfxhub_v3_0_init +ffffffff81e26b90 t gfxhub_v3_0_print_l2_protection_fault_status +ffffffff81e26d60 t gfxhub_v3_0_get_invalidate_req +ffffffff81e27000 t gfxhub_v3_0_3_get_fb_location +ffffffff81e27090 t gfxhub_v3_0_3_get_mc_fb_offset +ffffffff81e27120 t gfxhub_v3_0_3_setup_vm_pt_regs +ffffffff81e27260 t gfxhub_v3_0_3_gart_enable +ffffffff81e284b0 t gfxhub_v3_0_3_gart_disable +ffffffff81e28740 t gfxhub_v3_0_3_set_fault_enable_default +ffffffff81e28850 t gfxhub_v3_0_3_init +ffffffff81e28920 t gfxhub_v3_0_3_print_l2_protection_fault_status +ffffffff81e28af0 t gfxhub_v3_0_3_get_invalidate_req +ffffffff81e29000 t gmc_v10_0_early_init +ffffffff81e291e0 t gmc_v10_0_late_init +ffffffff81e29250 t gmc_v10_0_sw_init +ffffffff81e29630 t gmc_v10_0_sw_fini +ffffffff81e29680 t gmc_v10_0_hw_init +ffffffff81e29840 t gmc_v10_0_hw_fini +ffffffff81e298d0 t gmc_v10_0_suspend +ffffffff81e29960 t gmc_v10_0_resume +ffffffff81e299c0 t gmc_v10_0_is_idle +ffffffff81e299f0 t gmc_v10_0_wait_for_idle +ffffffff81e29a20 t gmc_v10_0_soft_reset +ffffffff81e29a50 t gmc_v10_0_set_clockgating_state +ffffffff81e29b00 t gmc_v10_0_set_powergating_state +ffffffff81e29b30 t gmc_v10_0_get_clockgating_state +ffffffff81e29bd0 t gmc_v10_0_flush_gpu_tlb +ffffffff81e29e80 t gmc_v10_0_flush_gpu_tlb_pasid +ffffffff81e2a0a0 t gmc_v10_0_emit_flush_gpu_tlb +ffffffff81e2a260 t gmc_v10_0_emit_pasid_mapping +ffffffff81e2a2d0 t gmc_v10_0_map_mtype +ffffffff81e2a320 t gmc_v10_0_get_vm_pde +ffffffff81e2a410 t gmc_v10_0_get_vm_pte +ffffffff81e2a4c0 t gmc_v10_0_get_vbios_fb_size +ffffffff81e2a630 t gmc_v10_0_flush_vm_hub +ffffffff81e2aa60 t gmc_v10_0_vm_fault_interrupt_state +ffffffff81e2aad0 t gmc_v10_0_process_interrupt +ffffffff81e2ad90 t gmc_v10_0_ecc_interrupt_state +ffffffff81e2adc0 t gmc_v10_0_gart_init +ffffffff81e2b000 t gmc_v11_0_early_init +ffffffff81e2b210 t gmc_v11_0_late_init +ffffffff81e2b280 t gmc_v11_0_sw_init +ffffffff81e2b570 t gmc_v11_0_sw_fini +ffffffff81e2b5c0 t gmc_v11_0_hw_init +ffffffff81e2b700 t gmc_v11_0_hw_fini +ffffffff81e2b780 t gmc_v11_0_suspend +ffffffff81e2b800 t gmc_v11_0_resume +ffffffff81e2b860 t gmc_v11_0_is_idle +ffffffff81e2b890 t gmc_v11_0_wait_for_idle +ffffffff81e2b8c0 t gmc_v11_0_soft_reset +ffffffff81e2b8f0 t gmc_v11_0_set_clockgating_state +ffffffff81e2b970 t gmc_v11_0_set_powergating_state +ffffffff81e2b9a0 t gmc_v11_0_get_clockgating_state +ffffffff81e2b9e0 t gmc_v11_0_flush_gpu_tlb +ffffffff81e2be80 t gmc_v11_0_flush_gpu_tlb_pasid +ffffffff81e2c070 t gmc_v11_0_emit_flush_gpu_tlb +ffffffff81e2c220 t gmc_v11_0_emit_pasid_mapping +ffffffff81e2c290 t gmc_v11_0_map_mtype +ffffffff81e2c2e0 t gmc_v11_0_get_vm_pde +ffffffff81e2c3e0 t gmc_v11_0_get_vm_pte +ffffffff81e2c490 t gmc_v11_0_get_vbios_fb_size +ffffffff81e2c600 t gmc_v11_0_vm_fault_interrupt_state +ffffffff81e2c670 t gmc_v11_0_process_interrupt +ffffffff81e2c890 t gmc_v11_0_ecc_interrupt_state +ffffffff81e2c8c0 t gmc_v11_0_gart_init +ffffffff81e2d000 t gmc_v7_0_early_init +ffffffff81e2d090 t gmc_v7_0_late_init +ffffffff81e2d0e0 t gmc_v7_0_sw_init +ffffffff81e2d5a0 t gmc_v7_0_sw_fini +ffffffff81e2d650 t gmc_v7_0_hw_init +ffffffff81e2dfc0 t gmc_v7_0_hw_fini +ffffffff81e2e080 t gmc_v7_0_suspend +ffffffff81e2e0c0 t gmc_v7_0_resume +ffffffff81e2e120 t gmc_v7_0_is_idle +ffffffff81e2e170 t gmc_v7_0_wait_for_idle +ffffffff81e2e210 t gmc_v7_0_soft_reset +ffffffff81e2e470 t gmc_v7_0_set_clockgating_state +ffffffff81e2e6d0 t gmc_v7_0_set_powergating_state +ffffffff81e2e700 t gmc_v7_0_flush_gpu_tlb +ffffffff81e2e730 t gmc_v7_0_flush_gpu_tlb_pasid +ffffffff81e2e7f0 t gmc_v7_0_emit_flush_gpu_tlb +ffffffff81e2e890 t gmc_v7_0_emit_pasid_mapping +ffffffff81e2e8c0 t gmc_v7_0_set_prt +ffffffff81e2ea80 t gmc_v7_0_get_vm_pde +ffffffff81e2eae0 t gmc_v7_0_get_vm_pte +ffffffff81e2eb20 t gmc_v7_0_get_vbios_fb_size +ffffffff81e2eb90 t gmc_v7_0_vm_fault_interrupt_state +ffffffff81e2ec60 t gmc_v7_0_process_interrupt +ffffffff81e2ef00 t gmc_v7_0_gart_init +ffffffff81e2f000 t gmc_v8_0_early_init +ffffffff81e2f090 t gmc_v8_0_late_init +ffffffff81e2f0e0 t gmc_v8_0_sw_init +ffffffff81e2f720 t gmc_v8_0_sw_fini +ffffffff81e2f7d0 t gmc_v8_0_hw_init +ffffffff81e30440 t gmc_v8_0_hw_fini +ffffffff81e30500 t gmc_v8_0_suspend +ffffffff81e30540 t gmc_v8_0_resume +ffffffff81e305a0 t gmc_v8_0_is_idle +ffffffff81e305f0 t gmc_v8_0_wait_for_idle +ffffffff81e30690 t gmc_v8_0_check_soft_reset +ffffffff81e30700 t gmc_v8_0_pre_soft_reset +ffffffff81e30870 t gmc_v8_0_soft_reset +ffffffff81e30940 t gmc_v8_0_post_soft_reset +ffffffff81e309b0 t gmc_v8_0_set_clockgating_state +ffffffff81e30f70 t gmc_v8_0_set_powergating_state +ffffffff81e30fa0 t gmc_v8_0_get_clockgating_state +ffffffff81e31010 t gmc_v8_0_flush_gpu_tlb +ffffffff81e31040 t gmc_v8_0_flush_gpu_tlb_pasid +ffffffff81e31100 t gmc_v8_0_emit_flush_gpu_tlb +ffffffff81e311a0 t gmc_v8_0_emit_pasid_mapping +ffffffff81e311d0 t gmc_v8_0_set_prt +ffffffff81e31390 t gmc_v8_0_get_vm_pde +ffffffff81e313f0 t gmc_v8_0_get_vm_pte +ffffffff81e31440 t gmc_v8_0_get_vbios_fb_size +ffffffff81e314b0 t gmc_v8_0_vm_fault_interrupt_state +ffffffff81e31580 t gmc_v8_0_process_interrupt +ffffffff81e31910 t gmc_v8_0_gart_init +ffffffff81e32000 T gmc_v9_0_restore_registers +ffffffff81e32150 t gmc_v9_0_early_init +ffffffff81e32500 t gmc_v9_0_late_init +ffffffff81e32610 t gmc_v9_0_sw_init +ffffffff81e32bc0 t gmc_v9_0_sw_fini +ffffffff81e32c30 t gmc_v9_0_hw_init +ffffffff81e33030 t gmc_v9_0_hw_fini +ffffffff81e330e0 t gmc_v9_0_suspend +ffffffff81e33190 t gmc_v9_0_resume +ffffffff81e331f0 t gmc_v9_0_is_idle +ffffffff81e33220 t gmc_v9_0_wait_for_idle +ffffffff81e33250 t gmc_v9_0_soft_reset +ffffffff81e33280 t gmc_v9_0_set_clockgating_state +ffffffff81e332e0 t gmc_v9_0_set_powergating_state +ffffffff81e33310 t gmc_v9_0_get_clockgating_state +ffffffff81e33350 t gmc_v9_0_flush_gpu_tlb +ffffffff81e33980 t gmc_v9_0_flush_gpu_tlb_pasid +ffffffff81e33c50 t gmc_v9_0_emit_flush_gpu_tlb +ffffffff81e33e50 t gmc_v9_0_emit_pasid_mapping +ffffffff81e33ec0 t gmc_v9_0_map_mtype +ffffffff81e33f00 t gmc_v9_0_get_vm_pde +ffffffff81e34000 t gmc_v9_0_get_vm_pte +ffffffff81e340d0 t gmc_v9_0_get_vbios_fb_size +ffffffff81e34260 t gmc_v9_0_vm_fault_interrupt_state +ffffffff81e345e0 t gmc_v9_0_process_interrupt +ffffffff81e34c10 t gmc_v9_0_ecc_interrupt_state +ffffffff81e34d70 t gmc_v9_0_gart_init +ffffffff81e34e50 t gmc_v9_0_save_registers +ffffffff81e35000 t hdp_v4_0_query_ras_error_count +ffffffff81e350c0 t hdp_v4_0_reset_ras_error_count +ffffffff81e351e0 t hdp_v4_0_flush_hdp +ffffffff81e35230 t hdp_v4_0_invalidate_hdp +ffffffff81e35300 t hdp_v4_0_update_clock_gating +ffffffff81e35400 t hdp_v4_0_get_clockgating_state +ffffffff81e35450 t hdp_v4_0_init_registers +ffffffff81e36000 t hdp_v5_0_flush_hdp +ffffffff81e36050 t hdp_v5_0_invalidate_hdp +ffffffff81e360f0 t hdp_v5_0_update_clock_gating +ffffffff81e364e0 t hdp_v5_0_get_clockgating_state +ffffffff81e36600 t hdp_v5_0_init_registers +ffffffff81e37000 t hdp_v5_2_flush_hdp +ffffffff81e37050 t hdp_v5_2_update_clock_gating +ffffffff81e37440 t hdp_v5_2_get_clockgating_state +ffffffff81e38000 t hdp_v6_0_flush_hdp +ffffffff81e38050 t hdp_v6_0_update_clock_gating +ffffffff81e38360 t hdp_v6_0_get_clockgating_state +ffffffff81e39000 t iceland_ih_early_init +ffffffff81e39050 t iceland_ih_sw_init +ffffffff81e390b0 t iceland_ih_sw_fini +ffffffff81e390f0 t iceland_ih_hw_init +ffffffff81e39310 t iceland_ih_hw_fini +ffffffff81e393e0 t iceland_ih_suspend +ffffffff81e394b0 t iceland_ih_resume +ffffffff81e394f0 t iceland_ih_is_idle +ffffffff81e39540 t iceland_ih_wait_for_idle +ffffffff81e395e0 t iceland_ih_soft_reset +ffffffff81e396c0 t iceland_ih_set_clockgating_state +ffffffff81e396f0 t iceland_ih_set_powergating_state +ffffffff81e39720 t iceland_ih_get_wptr +ffffffff81e39810 t iceland_ih_decode_iv +ffffffff81e39890 t iceland_ih_set_rptr +ffffffff81e3a000 t ih_v6_0_early_init +ffffffff81e3a050 t ih_v6_0_sw_init +ffffffff81e3a1b0 t ih_v6_0_sw_fini +ffffffff81e3a1f0 t ih_v6_0_hw_init +ffffffff81e3a770 t ih_v6_0_hw_fini +ffffffff81e3a7d0 t ih_v6_0_suspend +ffffffff81e3a830 t ih_v6_0_resume +ffffffff81e3a840 t ih_v6_0_is_idle +ffffffff81e3a870 t ih_v6_0_wait_for_idle +ffffffff81e3a8a0 t ih_v6_0_soft_reset +ffffffff81e3a8d0 t ih_v6_0_set_clockgating_state +ffffffff81e3a9f0 t ih_v6_0_set_powergating_state +ffffffff81e3ab60 t ih_v6_0_get_clockgating_state +ffffffff81e3abf0 t ih_v6_0_get_wptr +ffffffff81e3ace0 t ih_v6_0_set_rptr +ffffffff81e3adb0 t ih_v6_0_self_irq +ffffffff81e3ae20 t ih_v6_0_toggle_interrupts +ffffffff81e3b000 t force_update_wptr_for_self_int +ffffffff81e3c000 t imu_v11_0_init_microcode +ffffffff81e3c1f0 t imu_v11_0_load_microcode +ffffffff81e3c550 t imu_v11_0_setup +ffffffff81e3c7d0 t imu_v11_0_start +ffffffff81e3c8c0 t imu_v11_0_program_rlc_ram +ffffffff81e3ca70 t imu_v11_0_wait_for_reset_status +ffffffff81e3cbc0 t program_imu_rlc_ram +ffffffff81e3d000 T imu_v11_0_3_program_rlc_ram +ffffffff81e3e000 T jpeg_v1_0_early_init +ffffffff81e3e060 T jpeg_v1_0_sw_init +ffffffff81e3e130 T jpeg_v1_0_sw_fini +ffffffff81e3e150 T jpeg_v1_0_start +ffffffff81e3ebf0 t jpeg_v1_0_decode_ring_get_rptr +ffffffff81e3ec80 t jpeg_v1_0_decode_ring_get_wptr +ffffffff81e3ed10 t jpeg_v1_0_decode_ring_set_wptr +ffffffff81e3ed80 t jpeg_v1_0_decode_ring_emit_ib +ffffffff81e3f6a0 t jpeg_v1_0_decode_ring_emit_fence +ffffffff81e3ffe0 t jpeg_v1_0_decode_ring_emit_vm_flush +ffffffff81e40050 t jpeg_v1_0_decode_ring_nop +ffffffff81e401b0 t jpeg_v1_0_decode_ring_insert_start +ffffffff81e40370 t jpeg_v1_0_decode_ring_insert_end +ffffffff81e40530 t jpeg_v1_0_ring_begin_use +ffffffff81e40630 t jpeg_v1_0_decode_ring_emit_wreg +ffffffff81e40890 t jpeg_v1_0_decode_ring_emit_reg_wait +ffffffff81e40cb0 t jpeg_v1_0_set_interrupt_state +ffffffff81e40ce0 t jpeg_v1_0_process_interrupt +ffffffff81e41000 T jpeg_v2_0_dec_ring_insert_start +ffffffff81e411a0 T jpeg_v2_0_dec_ring_insert_end +ffffffff81e41340 T jpeg_v2_0_dec_ring_emit_fence +ffffffff81e41a20 T jpeg_v2_0_dec_ring_emit_ib +ffffffff81e421d0 T jpeg_v2_0_dec_ring_emit_reg_wait +ffffffff81e42580 T jpeg_v2_0_dec_ring_emit_vm_flush +ffffffff81e425f0 T jpeg_v2_0_dec_ring_emit_wreg +ffffffff81e42830 T jpeg_v2_0_dec_ring_nop +ffffffff81e42990 t jpeg_v2_0_early_init +ffffffff81e42a00 t jpeg_v2_0_sw_init +ffffffff81e42b10 t jpeg_v2_0_sw_fini +ffffffff81e42b60 t jpeg_v2_0_hw_init +ffffffff81e42be0 t jpeg_v2_0_hw_fini +ffffffff81e42cc0 t jpeg_v2_0_suspend +ffffffff81e42cf0 t jpeg_v2_0_resume +ffffffff81e42d80 t jpeg_v2_0_is_idle +ffffffff81e42e00 t jpeg_v2_0_wait_for_idle +ffffffff81e42ef0 t jpeg_v2_0_set_clockgating_state +ffffffff81e42fa0 t jpeg_v2_0_set_powergating_state +ffffffff81e437a0 t jpeg_v2_0_dec_ring_get_rptr +ffffffff81e43830 t jpeg_v2_0_dec_ring_get_wptr +ffffffff81e438d0 t jpeg_v2_0_dec_ring_set_wptr +ffffffff81e43970 t jpeg_v2_0_set_interrupt_state +ffffffff81e439a0 t jpeg_v2_0_process_interrupt +ffffffff81e43a30 t jpeg_v2_0_enable_clock_gating +ffffffff81e43bd0 t jpeg_v2_0_disable_clock_gating +ffffffff81e44000 t jpeg_v2_6_query_ras_poison_status +ffffffff81e44140 t jpeg_v2_5_early_init +ffffffff81e44400 t jpeg_v2_5_sw_init +ffffffff81e44650 t jpeg_v2_5_sw_fini +ffffffff81e446a0 t jpeg_v2_5_hw_init +ffffffff81e44790 t jpeg_v2_5_hw_fini +ffffffff81e448d0 t jpeg_v2_5_suspend +ffffffff81e44900 t jpeg_v2_5_resume +ffffffff81e44a00 t jpeg_v2_5_is_idle +ffffffff81e44b00 t jpeg_v2_5_wait_for_idle +ffffffff81e44c30 t jpeg_v2_5_set_clockgating_state +ffffffff81e44da0 t jpeg_v2_5_set_powergating_state +ffffffff81e45450 t jpeg_v2_5_dec_ring_get_rptr +ffffffff81e454f0 t jpeg_v2_5_dec_ring_get_wptr +ffffffff81e455a0 t jpeg_v2_5_dec_ring_set_wptr +ffffffff81e45650 t jpeg_v2_6_dec_ring_insert_start +ffffffff81e45810 t jpeg_v2_6_dec_ring_insert_end +ffffffff81e459d0 t jpeg_v2_5_set_interrupt_state +ffffffff81e45a00 t jpeg_v2_5_process_interrupt +ffffffff81e45ae0 t jpeg_v2_5_enable_clock_gating +ffffffff81e45bb0 t jpeg_v2_5_disable_clock_gating +ffffffff81e46000 t jpeg_v3_0_early_init +ffffffff81e460f0 t jpeg_v3_0_sw_init +ffffffff81e46200 t jpeg_v3_0_sw_fini +ffffffff81e46250 t jpeg_v3_0_hw_init +ffffffff81e462d0 t jpeg_v3_0_hw_fini +ffffffff81e463b0 t jpeg_v3_0_suspend +ffffffff81e463e0 t jpeg_v3_0_resume +ffffffff81e46470 t jpeg_v3_0_is_idle +ffffffff81e464f0 t jpeg_v3_0_wait_for_idle +ffffffff81e465e0 t jpeg_v3_0_set_clockgating_state +ffffffff81e46690 t jpeg_v3_0_set_powergating_state +ffffffff81e46f30 t jpeg_v3_0_dec_ring_get_rptr +ffffffff81e46fc0 t jpeg_v3_0_dec_ring_get_wptr +ffffffff81e47060 t jpeg_v3_0_dec_ring_set_wptr +ffffffff81e47100 t jpeg_v3_0_set_interrupt_state +ffffffff81e47130 t jpeg_v3_0_process_interrupt +ffffffff81e471c0 t jpeg_v3_0_enable_clock_gating +ffffffff81e47290 t jpeg_v3_0_disable_clock_gating +ffffffff81e48000 t jpeg_v4_0_early_init +ffffffff81e48080 t jpeg_v4_0_sw_init +ffffffff81e48190 t jpeg_v4_0_sw_fini +ffffffff81e481e0 t jpeg_v4_0_hw_init +ffffffff81e48300 t jpeg_v4_0_hw_fini +ffffffff81e483e0 t jpeg_v4_0_suspend +ffffffff81e48410 t jpeg_v4_0_resume +ffffffff81e48460 t jpeg_v4_0_is_idle +ffffffff81e484e0 t jpeg_v4_0_wait_for_idle +ffffffff81e485d0 t jpeg_v4_0_set_clockgating_state +ffffffff81e48680 t jpeg_v4_0_set_powergating_state +ffffffff81e48e90 t jpeg_v4_0_dec_ring_get_rptr +ffffffff81e48f20 t jpeg_v4_0_dec_ring_get_wptr +ffffffff81e48fc0 t jpeg_v4_0_dec_ring_set_wptr +ffffffff81e49060 t jpeg_v4_0_set_interrupt_state +ffffffff81e49090 t jpeg_v4_0_process_interrupt +ffffffff81e49130 t jpeg_v4_0_enable_clock_gating +ffffffff81e492e0 t jpeg_v4_0_disable_clock_gating +ffffffff81e4a000 t lsdma_v6_0_copy_mem +ffffffff81e4a350 t lsdma_v6_0_fill_mem +ffffffff81e4a630 t lsdma_v6_0_update_memory_power_gating +ffffffff81e4b000 t mca_v3_0_mp0_query_ras_error_count +ffffffff81e4b020 t mca_v3_0_ras_block_match +ffffffff81e4b070 t mca_v3_0_mp1_query_ras_error_count +ffffffff81e4b090 t mca_v3_0_mpio_query_ras_error_count +ffffffff81e4b0b0 t mca_v3_0_init +ffffffff81e4c000 t mes_v10_0_early_init +ffffffff81e4c060 t mes_v10_0_late_init +ffffffff81e4c0b0 t mes_v10_1_sw_init +ffffffff81e4c580 t mes_v10_1_sw_fini +ffffffff81e4c6a0 t mes_v10_1_hw_init +ffffffff81e4cf70 t mes_v10_1_hw_fini +ffffffff81e4d060 t mes_v10_1_suspend +ffffffff81e4d170 t mes_v10_1_resume +ffffffff81e4d1c0 t mes_v10_1_kiq_hw_init +ffffffff81e4d5d0 t mes_v10_1_add_hw_queue +ffffffff81e4d750 t mes_v10_1_remove_hw_queue +ffffffff81e4d7e0 t mes_v10_1_unmap_legacy_queue +ffffffff81e4d8d0 t mes_v10_1_suspend_gang +ffffffff81e4d900 t mes_v10_1_resume_gang +ffffffff81e4d930 t mes_v10_1_submit_pkt_and_poll_completion +ffffffff81e4db30 t mes_v10_1_load_microcode +ffffffff81e4e330 t mes_v10_1_enable +ffffffff81e4e7a0 t mes_v10_1_queue_init +ffffffff81e4ea40 t amdgpu_bo_unreserve +ffffffff81e4eb20 t mes_v10_1_ring_get_rptr +ffffffff81e4eb50 t mes_v10_1_ring_get_wptr +ffffffff81e4ebc0 t mes_v10_1_ring_set_wptr +ffffffff81e4f000 t mes_v11_0_early_init +ffffffff81e4f060 t mes_v11_0_late_init +ffffffff81e4f0d0 t mes_v11_0_sw_init +ffffffff81e4f5b0 t mes_v11_0_sw_fini +ffffffff81e4f770 t mes_v11_0_hw_init +ffffffff81e4ff80 t mes_v11_0_hw_fini +ffffffff81e4ffb0 t mes_v11_0_suspend +ffffffff81e4ffc0 t mes_v11_0_resume +ffffffff81e50010 t mes_v11_0_kiq_hw_init +ffffffff81e50210 t mes_v11_0_kiq_hw_fini +ffffffff81e50650 t mes_v11_0_add_hw_queue +ffffffff81e50840 t mes_v11_0_remove_hw_queue +ffffffff81e508d0 t mes_v11_0_unmap_legacy_queue +ffffffff81e509d0 t mes_v11_0_suspend_gang +ffffffff81e50a00 t mes_v11_0_resume_gang +ffffffff81e50a30 t mes_v11_0_misc_op +ffffffff81e50b80 t mes_v11_0_submit_pkt_and_poll_completion +ffffffff81e50da0 t mes_v11_0_load_microcode +ffffffff81e51510 t mes_v11_0_enable +ffffffff81e51a00 t mes_v11_0_queue_init +ffffffff81e52490 t amdgpu_bo_unreserve +ffffffff81e52570 t mes_v11_0_mqd_init +ffffffff81e52770 t mes_v11_0_ring_get_rptr +ffffffff81e527a0 t mes_v11_0_ring_get_wptr +ffffffff81e52810 t mes_v11_0_ring_set_wptr +ffffffff81e53000 t mmhub_v1_0_query_ras_error_count +ffffffff81e53150 t mmhub_v1_0_reset_ras_error_count +ffffffff81e53200 t mmhub_v1_0_get_fb_location +ffffffff81e53310 t mmhub_v1_0_init +ffffffff81e533c0 t mmhub_v1_0_gart_enable +ffffffff81e546a0 t mmhub_v1_0_set_fault_enable_default +ffffffff81e547b0 t mmhub_v1_0_gart_disable +ffffffff81e54a40 t mmhub_v1_0_set_clockgating +ffffffff81e54eb0 t mmhub_v1_0_get_clockgating +ffffffff81e54fd0 t mmhub_v1_0_setup_vm_pt_regs +ffffffff81e55110 t mmhub_v1_0_update_power_gating +ffffffff81e56000 t mmhub_v1_7_query_ras_error_count +ffffffff81e56150 t mmhub_v1_7_query_ras_error_status +ffffffff81e56230 t mmhub_v1_7_reset_ras_error_count +ffffffff81e562d0 t mmhub_v1_7_reset_ras_error_status +ffffffff81e563c0 t mmhub_v1_7_get_fb_location +ffffffff81e564d0 t mmhub_v1_7_init +ffffffff81e56570 t mmhub_v1_7_gart_enable +ffffffff81e57a00 t mmhub_v1_7_set_fault_enable_default +ffffffff81e57b10 t mmhub_v1_7_gart_disable +ffffffff81e57da0 t mmhub_v1_7_set_clockgating +ffffffff81e58120 t mmhub_v1_7_get_clockgating +ffffffff81e58240 t mmhub_v1_7_setup_vm_pt_regs +ffffffff81e59000 t mmhub_v2_0_init +ffffffff81e590d0 t mmhub_v2_0_gart_enable +ffffffff81e5a210 t mmhub_v2_0_set_fault_enable_default +ffffffff81e5a320 t mmhub_v2_0_gart_disable +ffffffff81e5a5a0 t mmhub_v2_0_set_clockgating +ffffffff81e5a8e0 t mmhub_v2_0_get_clockgating +ffffffff81e5aa70 t mmhub_v2_0_setup_vm_pt_regs +ffffffff81e5abb0 t mmhub_v2_0_print_l2_protection_fault_status +ffffffff81e5ae00 t mmhub_v2_0_get_invalidate_req +ffffffff81e5b000 t mmhub_v2_3_init +ffffffff81e5b0e0 t mmhub_v2_3_gart_enable +ffffffff81e5c430 t mmhub_v2_3_set_fault_enable_default +ffffffff81e5c530 t mmhub_v2_3_gart_disable +ffffffff81e5c7c0 t mmhub_v2_3_set_clockgating +ffffffff81e5cc40 t mmhub_v2_3_get_clockgating +ffffffff81e5ce30 t mmhub_v2_3_setup_vm_pt_regs +ffffffff81e5cf70 t mmhub_v2_3_print_l2_protection_fault_status +ffffffff81e5d180 t mmhub_v2_3_get_invalidate_req +ffffffff81e5e000 t mmhub_v3_0_get_fb_location +ffffffff81e5e090 t mmhub_v3_0_get_mc_fb_offset +ffffffff81e5e120 t mmhub_v3_0_init +ffffffff81e5e1f0 t mmhub_v3_0_gart_enable +ffffffff81e5f350 t mmhub_v3_0_set_fault_enable_default +ffffffff81e5f460 t mmhub_v3_0_gart_disable +ffffffff81e5f6e0 t mmhub_v3_0_set_clockgating +ffffffff81e5f8b0 t mmhub_v3_0_get_clockgating +ffffffff81e5f960 t mmhub_v3_0_setup_vm_pt_regs +ffffffff81e5faa0 t mmhub_v3_0_print_l2_protection_fault_status +ffffffff81e5fca0 t mmhub_v3_0_get_invalidate_req +ffffffff81e60000 t mmhub_v3_0_1_get_fb_location +ffffffff81e60090 t mmhub_v3_0_1_get_mc_fb_offset +ffffffff81e60120 t mmhub_v3_0_1_init +ffffffff81e601f0 t mmhub_v3_0_1_gart_enable +ffffffff81e61440 t mmhub_v3_0_1_set_fault_enable_default +ffffffff81e61540 t mmhub_v3_0_1_gart_disable +ffffffff81e617d0 t mmhub_v3_0_1_set_clockgating +ffffffff81e61990 t mmhub_v3_0_1_get_clockgating +ffffffff81e61a40 t mmhub_v3_0_1_setup_vm_pt_regs +ffffffff81e61b80 t mmhub_v3_0_1_print_l2_protection_fault_status +ffffffff81e61d80 t mmhub_v3_0_1_get_invalidate_req +ffffffff81e62000 t mmhub_v3_0_2_get_fb_location +ffffffff81e62090 t mmhub_v3_0_2_get_mc_fb_offset +ffffffff81e62120 t mmhub_v3_0_2_init +ffffffff81e621f0 t mmhub_v3_0_2_gart_enable +ffffffff81e63340 t mmhub_v3_0_2_set_fault_enable_default +ffffffff81e63450 t mmhub_v3_0_2_gart_disable +ffffffff81e636d0 t mmhub_v3_0_2_set_clockgating +ffffffff81e63700 t mmhub_v3_0_2_get_clockgating +ffffffff81e63730 t mmhub_v3_0_2_setup_vm_pt_regs +ffffffff81e63870 t mmhub_v3_0_2_print_l2_protection_fault_status +ffffffff81e63a50 t mmhub_v3_0_2_get_invalidate_req +ffffffff81e64000 t mmhub_v9_4_query_ras_error_count +ffffffff81e64150 t mmhub_v9_4_query_ras_error_status +ffffffff81e64230 t mmhub_v9_4_reset_ras_error_count +ffffffff81e64300 t mmhub_v9_4_get_fb_location +ffffffff81e64410 t mmhub_v9_4_init +ffffffff81e64560 t mmhub_v9_4_gart_enable +ffffffff81e65980 t mmhub_v9_4_set_fault_enable_default +ffffffff81e65b60 t mmhub_v9_4_gart_disable +ffffffff81e65ec0 t mmhub_v9_4_set_clockgating +ffffffff81e66380 t mmhub_v9_4_get_clockgating +ffffffff81e664b0 t mmhub_v9_4_setup_vm_pt_regs +ffffffff81e66500 t mmhub_v9_4_setup_hubid_vm_pt_regs +ffffffff81e67000 T xgpu_ai_mailbox_set_irq_funcs +ffffffff81e67050 T xgpu_ai_mailbox_add_irq_id +ffffffff81e670e0 T xgpu_ai_mailbox_get_irq +ffffffff81e67190 t xgpu_ai_mailbox_flr_work +ffffffff81e67390 T xgpu_ai_mailbox_put_irq +ffffffff81e673d0 t xgpu_ai_request_full_gpu_access +ffffffff81e673f0 t xgpu_ai_release_full_gpu_access +ffffffff81e67410 t xgpu_ai_request_init_data +ffffffff81e67470 t xgpu_ai_request_reset +ffffffff81e67520 t xgpu_ai_mailbox_trans_msg +ffffffff81e67740 t xgpu_ai_set_mailbox_ack_irq +ffffffff81e677d0 t xgpu_ai_mailbox_ack_irq +ffffffff81e67820 t xgpu_ai_set_mailbox_rcv_irq +ffffffff81e678b0 t xgpu_ai_mailbox_rcv_irq +ffffffff81e67990 t xgpu_ai_send_access_requests +ffffffff81e67a80 t xgpu_ai_poll_msg +ffffffff81e68000 T xgpu_nv_mailbox_set_irq_funcs +ffffffff81e68050 T xgpu_nv_mailbox_add_irq_id +ffffffff81e680e0 T xgpu_nv_mailbox_get_irq +ffffffff81e68190 t xgpu_nv_mailbox_flr_work +ffffffff81e683b0 T xgpu_nv_mailbox_put_irq +ffffffff81e683f0 t xgpu_nv_request_full_gpu_access +ffffffff81e68410 t xgpu_nv_release_full_gpu_access +ffffffff81e68430 t xgpu_nv_request_init_data +ffffffff81e68450 t xgpu_nv_request_reset +ffffffff81e68550 t xgpu_nv_mailbox_trans_msg +ffffffff81e686f0 t xgpu_nv_set_mailbox_ack_irq +ffffffff81e68770 t xgpu_nv_mailbox_ack_irq +ffffffff81e687c0 t xgpu_nv_set_mailbox_rcv_irq +ffffffff81e68840 t xgpu_nv_mailbox_rcv_irq +ffffffff81e688f0 t xgpu_nv_send_access_requests +ffffffff81e69000 T xgpu_vi_init_golden_registers +ffffffff81e690c0 T xgpu_vi_mailbox_set_irq_funcs +ffffffff81e69110 T xgpu_vi_mailbox_add_irq_id +ffffffff81e691a0 T xgpu_vi_mailbox_get_irq +ffffffff81e69250 t xgpu_vi_mailbox_flr_work +ffffffff81e693a0 T xgpu_vi_mailbox_put_irq +ffffffff81e693e0 t xgpu_vi_request_full_gpu_access +ffffffff81e69400 t xgpu_vi_release_full_gpu_access +ffffffff81e69420 t xgpu_vi_request_reset +ffffffff81e69440 t xgpu_vi_wait_reset_cmpl +ffffffff81e69520 t xgpu_vi_set_mailbox_ack_irq +ffffffff81e695a0 t xgpu_vi_mailbox_ack_irq +ffffffff81e695f0 t xgpu_vi_set_mailbox_rcv_irq +ffffffff81e69670 t xgpu_vi_mailbox_rcv_irq +ffffffff81e69720 t xgpu_vi_mailbox_rcv_msg +ffffffff81e69840 t xgpu_vi_send_access_requests +ffffffff81e6a000 t navi10_ih_early_init +ffffffff81e6a060 t navi10_ih_sw_init +ffffffff81e6a1d0 t navi10_ih_sw_fini +ffffffff81e6a210 t navi10_ih_hw_init +ffffffff81e6a620 t navi10_ih_hw_fini +ffffffff81e6a680 t navi10_ih_suspend +ffffffff81e6a6e0 t navi10_ih_resume +ffffffff81e6a6f0 t navi10_ih_is_idle +ffffffff81e6a720 t navi10_ih_wait_for_idle +ffffffff81e6a750 t navi10_ih_soft_reset +ffffffff81e6a780 t navi10_ih_set_clockgating_state +ffffffff81e6a8a0 t navi10_ih_set_powergating_state +ffffffff81e6a8d0 t navi10_ih_get_clockgating_state +ffffffff81e6a960 t navi10_ih_get_wptr +ffffffff81e6aa70 t navi10_ih_set_rptr +ffffffff81e6ab40 t navi10_ih_self_irq +ffffffff81e6abc0 t navi10_ih_toggle_interrupts +ffffffff81e6ad30 t force_update_wptr_for_self_int +ffffffff81e6c000 t nbio_v2_3_get_hdp_flush_req_offset +ffffffff81e6c040 t nbio_v2_3_get_hdp_flush_done_offset +ffffffff81e6c080 t nbio_v2_3_get_pcie_index_offset +ffffffff81e6c0c0 t nbio_v2_3_get_pcie_data_offset +ffffffff81e6c100 t nbio_v2_3_get_rev_id +ffffffff81e6c160 t nbio_v2_3_mc_access_enable +ffffffff81e6c210 t nbio_v2_3_get_memsize +ffffffff81e6c280 t nbio_v2_3_sdma_doorbell_range +ffffffff81e6c320 t nbio_v2_3_vcn_doorbell_range +ffffffff81e6c3a0 t nbio_v2_3_enable_doorbell_aperture +ffffffff81e6c490 t nbio_v2_3_enable_doorbell_selfring_aperture +ffffffff81e6c5f0 t nbio_v2_3_ih_doorbell_range +ffffffff81e6c700 t nbio_v2_3_update_medium_grain_clock_gating +ffffffff81e6c7a0 t nbio_v2_3_update_medium_grain_light_sleep +ffffffff81e6c840 t nbio_v2_3_get_clockgating_state +ffffffff81e6c8c0 t nbio_v2_3_ih_control +ffffffff81e6ca10 t nbio_v2_3_init_registers +ffffffff81e6caa0 t nbio_v2_3_remap_hdp_registers +ffffffff81e6cbb0 t nbio_v2_3_enable_aspm +ffffffff81e6cc50 t nbio_v2_3_program_aspm +ffffffff81e6d2e0 t nbio_v2_3_apply_lc_spc_mode_wa +ffffffff81e6d370 t nbio_v2_3_apply_l1_link_width_reconfig_wa +ffffffff81e6d3e0 t nbio_v2_3_clear_doorbell_interrupt +ffffffff81e6e000 t nbio_v4_3_get_hdp_flush_req_offset +ffffffff81e6e040 t nbio_v4_3_get_hdp_flush_done_offset +ffffffff81e6e080 t nbio_v4_3_get_pcie_index_offset +ffffffff81e6e0b0 t nbio_v4_3_get_pcie_data_offset +ffffffff81e6e0f0 t nbio_v4_3_get_rev_id +ffffffff81e6e170 t nbio_v4_3_mc_access_enable +ffffffff81e6e220 t nbio_v4_3_get_memsize +ffffffff81e6e290 t nbio_v4_3_sdma_doorbell_range +ffffffff81e6e400 t nbio_v4_3_vcn_doorbell_range +ffffffff81e6e5b0 t nbio_v4_3_gc_doorbell_init +ffffffff81e6e6a0 t nbio_v4_3_enable_doorbell_aperture +ffffffff81e6e790 t nbio_v4_3_enable_doorbell_selfring_aperture +ffffffff81e6e8f0 t nbio_v4_3_ih_doorbell_range +ffffffff81e6ea10 t nbio_v4_3_update_medium_grain_clock_gating +ffffffff81e6eb50 t nbio_v4_3_update_medium_grain_light_sleep +ffffffff81e6ec80 t nbio_v4_3_get_clockgating_state +ffffffff81e6ed90 t nbio_v4_3_ih_control +ffffffff81e6eee0 t nbio_v4_3_init_registers +ffffffff81e6f000 t nbio_v4_3_remap_hdp_registers +ffffffff81e6f110 t nbio_v4_3_program_aspm +ffffffff81e6fdb0 t nbio_v4_3_get_rom_offset +ffffffff81e6fe40 t nbio_v4_3_sriov_sdma_doorbell_range +ffffffff81e6fe70 t nbio_v4_3_sriov_vcn_doorbell_range +ffffffff81e6fea0 t nbio_v4_3_sriov_gc_doorbell_init +ffffffff81e6fed0 t nbio_v4_3_sriov_ih_doorbell_range +ffffffff81e70000 t nbio_v6_1_get_hdp_flush_req_offset +ffffffff81e70040 t nbio_v6_1_get_hdp_flush_done_offset +ffffffff81e70080 t nbio_v6_1_get_pcie_index_offset +ffffffff81e700c0 t nbio_v6_1_get_pcie_data_offset +ffffffff81e70100 t nbio_v6_1_get_rev_id +ffffffff81e70180 t nbio_v6_1_mc_access_enable +ffffffff81e70230 t nbio_v6_1_get_memsize +ffffffff81e702a0 t nbio_v6_1_sdma_doorbell_range +ffffffff81e70330 t nbio_v6_1_enable_doorbell_aperture +ffffffff81e70420 t nbio_v6_1_enable_doorbell_selfring_aperture +ffffffff81e70580 t nbio_v6_1_ih_doorbell_range +ffffffff81e70690 t nbio_v6_1_update_medium_grain_clock_gating +ffffffff81e70730 t nbio_v6_1_update_medium_grain_light_sleep +ffffffff81e707d0 t nbio_v6_1_get_clockgating_state +ffffffff81e70850 t nbio_v6_1_ih_control +ffffffff81e709a0 t nbio_v6_1_init_registers +ffffffff81e70a70 t nbio_v6_1_remap_hdp_registers +ffffffff81e70b80 t nbio_v6_1_program_aspm +ffffffff81e71000 t nbio_v7_0_get_hdp_flush_req_offset +ffffffff81e71040 t nbio_v7_0_get_hdp_flush_done_offset +ffffffff81e71080 t nbio_v7_0_get_pcie_index_offset +ffffffff81e710c0 t nbio_v7_0_get_pcie_data_offset +ffffffff81e71100 t nbio_v7_0_get_rev_id +ffffffff81e71180 t nbio_v7_0_mc_access_enable +ffffffff81e71230 t nbio_v7_0_get_memsize +ffffffff81e712a0 t nbio_v7_0_sdma_doorbell_range +ffffffff81e71330 t nbio_v7_0_vcn_doorbell_range +ffffffff81e713b0 t nbio_v7_0_enable_doorbell_aperture +ffffffff81e714a0 t nbio_v7_0_enable_doorbell_selfring_aperture +ffffffff81e714d0 t nbio_v7_0_ih_doorbell_range +ffffffff81e715e0 t nbio_v7_0_update_medium_grain_clock_gating +ffffffff81e71710 t nbio_v7_0_update_medium_grain_light_sleep +ffffffff81e717b0 t nbio_v7_0_get_clockgating_state +ffffffff81e71830 t nbio_v7_0_ih_control +ffffffff81e71980 t nbio_v7_0_init_registers +ffffffff81e719d0 t nbio_v7_0_remap_hdp_registers +ffffffff81e71ae0 t nbio_7_0_read_syshub_ind_mmr +ffffffff81e71bb0 t nbio_7_0_write_syshub_ind_mmr +ffffffff81e72000 t nbio_v7_2_get_hdp_flush_req_offset +ffffffff81e72040 t nbio_v7_2_get_hdp_flush_done_offset +ffffffff81e72080 t nbio_v7_2_get_pcie_index_offset +ffffffff81e720c0 t nbio_v7_2_get_pcie_data_offset +ffffffff81e72100 t nbio_v7_2_get_pcie_port_index_offset +ffffffff81e72130 t nbio_v7_2_get_pcie_port_data_offset +ffffffff81e72170 t nbio_v7_2_get_rev_id +ffffffff81e72250 t nbio_v7_2_mc_access_enable +ffffffff81e72390 t nbio_v7_2_get_memsize +ffffffff81e72400 t nbio_v7_2_sdma_doorbell_range +ffffffff81e724a0 t nbio_v7_2_vcn_doorbell_range +ffffffff81e72520 t nbio_v7_2_enable_doorbell_aperture +ffffffff81e72600 t nbio_v7_2_enable_doorbell_selfring_aperture +ffffffff81e72760 t nbio_v7_2_ih_doorbell_range +ffffffff81e727f0 t nbio_v7_2_update_medium_grain_clock_gating +ffffffff81e728b0 t nbio_v7_2_update_medium_grain_light_sleep +ffffffff81e72a40 t nbio_v7_2_get_clockgating_state +ffffffff81e72ad0 t nbio_v7_2_ih_control +ffffffff81e72c20 t nbio_v7_2_init_registers +ffffffff81e72de0 t nbio_v7_2_remap_hdp_registers +ffffffff81e73000 t nbio_v7_4_query_ras_error_count +ffffffff81e731a0 t nbio_v7_4_handle_ras_controller_intr_no_bifring +ffffffff81e733e0 t nbio_v7_4_handle_ras_err_event_athub_intr_no_bifring +ffffffff81e73590 t nbio_v7_4_init_ras_controller_interrupt +ffffffff81e735d0 t nbio_v7_4_init_ras_err_event_athub_interrupt +ffffffff81e73610 t nbio_v7_4_get_hdp_flush_req_offset +ffffffff81e73650 t nbio_v7_4_get_hdp_flush_done_offset +ffffffff81e73690 t nbio_v7_4_get_pcie_index_offset +ffffffff81e736d0 t nbio_v7_4_get_pcie_data_offset +ffffffff81e73710 t nbio_v7_4_get_rev_id +ffffffff81e737d0 t nbio_v7_4_mc_access_enable +ffffffff81e73880 t nbio_v7_4_get_memsize +ffffffff81e738f0 t nbio_v7_4_sdma_doorbell_range +ffffffff81e739c0 t nbio_v7_4_vcn_doorbell_range +ffffffff81e73a60 t nbio_v7_4_enable_doorbell_aperture +ffffffff81e73b50 t nbio_v7_4_enable_doorbell_selfring_aperture +ffffffff81e73cb0 t nbio_v7_4_ih_doorbell_range +ffffffff81e73dc0 t nbio_v7_4_enable_doorbell_interrupt +ffffffff81e73f00 t nbio_v7_4_update_medium_grain_clock_gating +ffffffff81e73f30 t nbio_v7_4_update_medium_grain_light_sleep +ffffffff81e73fd0 t nbio_v7_4_get_clockgating_state +ffffffff81e74050 t nbio_v7_4_ih_control +ffffffff81e741a0 t nbio_v7_4_init_registers +ffffffff81e74290 t nbio_v7_4_remap_hdp_registers +ffffffff81e743a0 t nbio_v7_4_program_aspm +ffffffff81e747b0 t nbio_v7_4_set_ras_controller_irq_state +ffffffff81e74940 t nbio_v7_4_process_ras_controller_irq +ffffffff81e74970 t nbio_v7_4_set_ras_err_event_athub_irq_state +ffffffff81e74b00 t nbio_v7_4_process_err_event_athub_irq +ffffffff81e75000 t nbio_v7_7_get_hdp_flush_req_offset +ffffffff81e75040 t nbio_v7_7_get_hdp_flush_done_offset +ffffffff81e75080 t nbio_v7_7_get_pcie_index_offset +ffffffff81e750c0 t nbio_v7_7_get_pcie_data_offset +ffffffff81e75100 t nbio_v7_7_get_pcie_port_index_offset +ffffffff81e75130 t nbio_v7_7_get_pcie_port_data_offset +ffffffff81e75170 t nbio_v7_7_get_rev_id +ffffffff81e751f0 t nbio_v7_7_mc_access_enable +ffffffff81e752a0 t nbio_v7_7_get_memsize +ffffffff81e75310 t nbio_v7_7_sdma_doorbell_range +ffffffff81e753a0 t nbio_v7_7_vcn_doorbell_range +ffffffff81e75420 t nbio_v7_7_enable_doorbell_aperture +ffffffff81e75500 t nbio_v7_7_enable_doorbell_selfring_aperture +ffffffff81e75660 t nbio_v7_7_ih_doorbell_range +ffffffff81e75770 t nbio_v7_7_update_medium_grain_clock_gating +ffffffff81e758b0 t nbio_v7_7_update_medium_grain_light_sleep +ffffffff81e75ac0 t nbio_v7_7_get_clockgating_state +ffffffff81e75bd0 t nbio_v7_7_ih_control +ffffffff81e75d20 t nbio_v7_7_init_registers +ffffffff81e75e20 t nbio_v7_7_remap_hdp_registers +ffffffff81e76000 T nv_grbm_select +ffffffff81e760a0 T nv_set_virt_ops +ffffffff81e760e0 t nv_common_early_init +ffffffff81e764d0 t nv_common_late_init +ffffffff81e76540 t nv_common_sw_init +ffffffff81e76580 t nv_common_sw_fini +ffffffff81e765b0 t nv_common_hw_init +ffffffff81e766c0 t nv_common_hw_fini +ffffffff81e76720 t nv_common_suspend +ffffffff81e76780 t nv_common_resume +ffffffff81e767c0 t nv_common_is_idle +ffffffff81e767f0 t nv_common_wait_for_idle +ffffffff81e76820 t nv_common_soft_reset +ffffffff81e76850 t nv_common_set_clockgating_state +ffffffff81e76920 t nv_common_set_powergating_state +ffffffff81e76950 t nv_common_get_clockgating_state +ffffffff81e769c0 t nv_pcie_rreg +ffffffff81e76a20 t nv_pcie_wreg +ffffffff81e76a80 t nv_pcie_rreg64 +ffffffff81e76ae0 t nv_pcie_wreg64 +ffffffff81e76b40 t nv_didt_rreg +ffffffff81e76be0 t nv_didt_wreg +ffffffff81e76c60 t nv_read_disabled_bios +ffffffff81e76c90 t nv_read_register +ffffffff81e76d80 t nv_vga_set_state +ffffffff81e76db0 t nv_asic_reset +ffffffff81e76ef0 t nv_asic_reset_method +ffffffff81e76fe0 t nv_get_xclk +ffffffff81e77010 t nv_set_uvd_clocks +ffffffff81e77040 t nv_set_vce_clocks +ffffffff81e77070 t nv_get_config_memsize +ffffffff81e77090 t nv_need_full_reset +ffffffff81e770c0 t nv_init_doorbell_index +ffffffff81e771f0 t nv_need_reset_on_init +ffffffff81e77280 t nv_get_pcie_replay_count +ffffffff81e772b0 t nv_pre_asic_init +ffffffff81e772e0 t nv_update_umd_stable_pstate +ffffffff81e773a0 t nv_query_video_codecs +ffffffff81e78000 T psp_v10_0_set_psp_funcs +ffffffff81e78030 t psp_v10_0_init_microcode +ffffffff81e782a0 t psp_v10_0_ring_init +ffffffff81e78320 t psp_v10_0_ring_create +ffffffff81e78630 t psp_v10_0_ring_stop +ffffffff81e78820 t psp_v10_0_ring_destroy +ffffffff81e788a0 t psp_v10_0_mode1_reset +ffffffff81e788f0 t psp_v10_0_ring_get_wptr +ffffffff81e78950 t psp_v10_0_ring_set_wptr +ffffffff81e79000 T psp_v11_0_set_psp_funcs +ffffffff81e79030 t psp_v11_0_init_microcode +ffffffff81e79450 t psp_v11_0_bootloader_load_kdb +ffffffff81e79470 t psp_v11_0_bootloader_load_spl +ffffffff81e79490 t psp_v11_0_bootloader_load_sysdrv +ffffffff81e794b0 t psp_v11_0_bootloader_load_sos +ffffffff81e79800 t psp_v11_0_ring_init +ffffffff81e79880 t psp_v11_0_ring_create +ffffffff81e79f10 t psp_v11_0_ring_stop +ffffffff81e7a130 t psp_v11_0_ring_destroy +ffffffff81e7a1b0 t psp_v11_0_mode1_reset +ffffffff81e7a2b0 t psp_v11_0_memory_training +ffffffff81e7a730 t psp_v11_0_ring_get_wptr +ffffffff81e7a780 t psp_v11_0_ring_set_wptr +ffffffff81e7a8c0 t psp_v11_0_load_usbc_pd_fw +ffffffff81e7aab0 t psp_v11_0_read_usbc_pd_fw +ffffffff81e7abd0 t release_firmware +ffffffff81e7ac10 t psp_v11_0_bootloader_load_component +ffffffff81e7add0 t psp_v11_0_wait_for_bootloader +ffffffff81e7afa0 t psp_v11_0_memory_training_send_msg +ffffffff81e7c000 T psp_v11_0_8_set_psp_funcs +ffffffff81e7c030 t psp_v11_0_8_ring_init +ffffffff81e7c0b0 t psp_v11_0_8_ring_create +ffffffff81e7c740 t psp_v11_0_8_ring_stop +ffffffff81e7cad0 t psp_v11_0_8_ring_destroy +ffffffff81e7cb50 t psp_v11_0_8_ring_get_wptr +ffffffff81e7cbc0 t psp_v11_0_8_ring_set_wptr +ffffffff81e7d000 T psp_v12_0_set_psp_funcs +ffffffff81e7d030 t psp_v12_0_init_microcode +ffffffff81e7d2a0 t psp_v12_0_bootloader_load_sysdrv +ffffffff81e7d5c0 t psp_v12_0_bootloader_load_sos +ffffffff81e7d920 t psp_v12_0_ring_init +ffffffff81e7df00 t psp_v12_0_ring_create +ffffffff81e7e460 t psp_v12_0_ring_stop +ffffffff81e7e680 t psp_v12_0_ring_destroy +ffffffff81e7e700 t psp_v12_0_mode1_reset +ffffffff81e7e800 t psp_v12_0_ring_get_wptr +ffffffff81e7e870 t psp_v12_0_ring_set_wptr +ffffffff81e7f000 T psp_v13_0_set_psp_funcs +ffffffff81e7f030 t psp_v13_0_init_microcode +ffffffff81e7f160 t psp_v13_0_bootloader_load_kdb +ffffffff81e7f180 t psp_v13_0_bootloader_load_spl +ffffffff81e7f1a0 t psp_v13_0_bootloader_load_sysdrv +ffffffff81e7f1c0 t psp_v13_0_bootloader_load_soc_drv +ffffffff81e7f1e0 t psp_v13_0_bootloader_load_intf_drv +ffffffff81e7f200 t psp_v13_0_bootloader_load_dbg_drv +ffffffff81e7f220 t psp_v13_0_bootloader_load_ras_drv +ffffffff81e7f240 t psp_v13_0_bootloader_load_sos +ffffffff81e7f5a0 t psp_v13_0_ring_init +ffffffff81e7f620 t psp_v13_0_ring_create +ffffffff81e7fcb0 t psp_v13_0_ring_stop +ffffffff81e80040 t psp_v13_0_ring_destroy +ffffffff81e800c0 t psp_v13_0_memory_training +ffffffff81e804f0 t psp_v13_0_ring_get_wptr +ffffffff81e80560 t psp_v13_0_ring_set_wptr +ffffffff81e80660 t psp_v13_0_load_usbc_pd_fw +ffffffff81e80850 t psp_v13_0_read_usbc_pd_fw +ffffffff81e80970 t psp_v13_0_update_spirom +ffffffff81e80b40 t psp_v13_0_vbflash_status +ffffffff81e80ba0 t psp_v13_0_bootloader_load_component +ffffffff81e80d70 t psp_v13_0_wait_for_bootloader +ffffffff81e80f40 t psp_v13_0_memory_training_send_msg +ffffffff81e810a0 t psp_v13_0_exec_spi_cmd +ffffffff81e82000 T psp_v13_0_4_set_psp_funcs +ffffffff81e82030 t psp_v13_0_4_init_microcode +ffffffff81e82100 t psp_v13_0_4_bootloader_load_kdb +ffffffff81e82120 t psp_v13_0_4_bootloader_load_spl +ffffffff81e82140 t psp_v13_0_4_bootloader_load_sysdrv +ffffffff81e82160 t psp_v13_0_4_bootloader_load_soc_drv +ffffffff81e82180 t psp_v13_0_4_bootloader_load_intf_drv +ffffffff81e821a0 t psp_v13_0_4_bootloader_load_dbg_drv +ffffffff81e821c0 t psp_v13_0_4_bootloader_load_sos +ffffffff81e82530 t psp_v13_0_4_ring_init +ffffffff81e825b0 t psp_v13_0_4_ring_create +ffffffff81e82c50 t psp_v13_0_4_ring_stop +ffffffff81e82fe0 t psp_v13_0_4_ring_destroy +ffffffff81e83060 t psp_v13_0_4_ring_get_wptr +ffffffff81e830d0 t psp_v13_0_4_ring_set_wptr +ffffffff81e831d0 t psp_v13_0_4_bootloader_load_component +ffffffff81e833a0 t psp_v13_0_4_wait_for_bootloader +ffffffff81e84000 T psp_v3_1_set_psp_funcs +ffffffff81e84030 t psp_v3_1_init_microcode +ffffffff81e840f0 t psp_v3_1_bootloader_load_sysdrv +ffffffff81e84410 t psp_v3_1_bootloader_load_sos +ffffffff81e84770 t psp_v3_1_ring_init +ffffffff81e847f0 t psp_v3_1_ring_create +ffffffff81e852f0 t psp_v3_1_ring_stop +ffffffff81e85510 t psp_v3_1_ring_destroy +ffffffff81e85590 t psp_v3_1_smu_reload_quirk +ffffffff81e855e0 t psp_v3_1_mode1_reset +ffffffff81e856e0 t psp_v3_1_ring_get_wptr +ffffffff81e85730 t psp_v3_1_ring_set_wptr +ffffffff81e86000 t sdma_v2_4_early_init +ffffffff81e860f0 t sdma_v2_4_sw_init +ffffffff81e86580 t sdma_v2_4_sw_fini +ffffffff81e86660 t sdma_v2_4_hw_init +ffffffff81e86a10 t sdma_v2_4_hw_fini +ffffffff81e86a50 t sdma_v2_4_suspend +ffffffff81e86a90 t sdma_v2_4_resume +ffffffff81e86aa0 t sdma_v2_4_is_idle +ffffffff81e86ae0 t sdma_v2_4_wait_for_idle +ffffffff81e86b80 t sdma_v2_4_soft_reset +ffffffff81e86cc0 t sdma_v2_4_set_clockgating_state +ffffffff81e86cf0 t sdma_v2_4_set_powergating_state +ffffffff81e86d20 t sdma_v2_4_ring_get_rptr +ffffffff81e86d60 t sdma_v2_4_ring_get_wptr +ffffffff81e86dc0 t sdma_v2_4_ring_set_wptr +ffffffff81e86e00 t sdma_v2_4_ring_emit_ib +ffffffff81e870b0 t sdma_v2_4_ring_emit_fence +ffffffff81e874b0 t sdma_v2_4_ring_emit_pipeline_sync +ffffffff81e87730 t sdma_v2_4_ring_emit_vm_flush +ffffffff81e879a0 t sdma_v2_4_ring_emit_hdp_flush +ffffffff81e87c20 t sdma_v2_4_ring_test_ring +ffffffff81e87f00 t sdma_v2_4_ring_test_ib +ffffffff81e880d0 t sdma_v2_4_ring_insert_nop +ffffffff81e88200 t sdma_v2_4_ring_pad_ib +ffffffff81e88330 t sdma_v2_4_ring_emit_wreg +ffffffff81e88480 t sdma_v2_4_emit_copy_buffer +ffffffff81e88540 t sdma_v2_4_emit_fill_buffer +ffffffff81e885d0 t sdma_v2_4_vm_copy_pte +ffffffff81e88690 t sdma_v2_4_vm_write_pte +ffffffff81e88760 t sdma_v2_4_vm_set_pte_pde +ffffffff81e88860 t sdma_v2_4_set_trap_irq_state +ffffffff81e88920 t sdma_v2_4_process_trap_irq +ffffffff81e889c0 t sdma_v2_4_process_illegal_inst_irq +ffffffff81e88a40 t sdma_v2_4_enable +ffffffff81e89000 t sdma_v3_0_early_init +ffffffff81e89100 t sdma_v3_0_sw_init +ffffffff81e895b0 t sdma_v3_0_sw_fini +ffffffff81e89690 t sdma_v3_0_hw_init +ffffffff81e897c0 t sdma_v3_0_hw_fini +ffffffff81e89810 t sdma_v3_0_suspend +ffffffff81e89860 t sdma_v3_0_resume +ffffffff81e89870 t sdma_v3_0_is_idle +ffffffff81e898b0 t sdma_v3_0_wait_for_idle +ffffffff81e89950 t sdma_v3_0_check_soft_reset +ffffffff81e899b0 t sdma_v3_0_pre_soft_reset +ffffffff81e89a00 t sdma_v3_0_soft_reset +ffffffff81e89ad0 t sdma_v3_0_post_soft_reset +ffffffff81e89b20 t sdma_v3_0_set_clockgating_state +ffffffff81e89d80 t sdma_v3_0_set_powergating_state +ffffffff81e89db0 t sdma_v3_0_get_clockgating_state +ffffffff81e89e30 t sdma_v3_0_ring_get_rptr +ffffffff81e89e70 t sdma_v3_0_ring_get_wptr +ffffffff81e89ef0 t sdma_v3_0_ring_set_wptr +ffffffff81e89fa0 t sdma_v3_0_ring_emit_ib +ffffffff81e8a250 t sdma_v3_0_ring_emit_fence +ffffffff81e8a650 t sdma_v3_0_ring_emit_pipeline_sync +ffffffff81e8a8d0 t sdma_v3_0_ring_emit_vm_flush +ffffffff81e8ab40 t sdma_v3_0_ring_emit_hdp_flush +ffffffff81e8adc0 t sdma_v3_0_ring_test_ring +ffffffff81e8b0a0 t sdma_v3_0_ring_test_ib +ffffffff81e8b270 t sdma_v3_0_ring_insert_nop +ffffffff81e8b3a0 t sdma_v3_0_ring_pad_ib +ffffffff81e8b4d0 t sdma_v3_0_ring_emit_wreg +ffffffff81e8b620 t sdma_v3_0_emit_copy_buffer +ffffffff81e8b6e0 t sdma_v3_0_emit_fill_buffer +ffffffff81e8b770 t sdma_v3_0_vm_copy_pte +ffffffff81e8b830 t sdma_v3_0_vm_write_pte +ffffffff81e8b900 t sdma_v3_0_vm_set_pte_pde +ffffffff81e8ba00 t sdma_v3_0_set_trap_irq_state +ffffffff81e8bac0 t sdma_v3_0_process_trap_irq +ffffffff81e8bb60 t sdma_v3_0_process_illegal_inst_irq +ffffffff81e8bbe0 t sdma_v3_0_ctx_switch_enable +ffffffff81e8bd80 t sdma_v3_0_enable +ffffffff81e8bef0 t sdma_v3_0_gfx_resume +ffffffff81e8d000 t sdma_v4_0_early_init +ffffffff81e8d5b0 t sdma_v4_0_late_init +ffffffff81e8d850 t sdma_v4_0_sw_init +ffffffff81e8dbc0 t sdma_v4_0_sw_fini +ffffffff81e8dc80 t sdma_v4_0_hw_init +ffffffff81e90c00 t sdma_v4_0_hw_fini +ffffffff81e90cc0 t sdma_v4_0_suspend +ffffffff81e90d10 t sdma_v4_0_resume +ffffffff81e90d90 t sdma_v4_0_is_idle +ffffffff81e90ec0 t sdma_v4_0_wait_for_idle +ffffffff81e91060 t sdma_v4_0_soft_reset +ffffffff81e91090 t sdma_v4_0_set_clockgating_state +ffffffff81e91590 t sdma_v4_0_set_powergating_state +ffffffff81e91650 t sdma_v4_0_get_clockgating_state +ffffffff81e916f0 t sdma_v4_0_query_ras_error_count +ffffffff81e918c0 t sdma_v4_0_reset_ras_error_count +ffffffff81e91a10 t sdma_v4_0_ring_get_rptr +ffffffff81e91a70 t sdma_v4_0_ring_get_wptr +ffffffff81e91c60 t sdma_v4_0_ring_set_wptr +ffffffff81e91ee0 t sdma_v4_0_ring_emit_ib +ffffffff81e92190 t sdma_v4_0_ring_emit_fence +ffffffff81e925b0 t sdma_v4_0_ring_emit_pipeline_sync +ffffffff81e92610 t sdma_v4_0_ring_emit_vm_flush +ffffffff81e92630 t sdma_v4_0_ring_emit_hdp_flush +ffffffff81e926e0 t sdma_v4_0_ring_test_ring +ffffffff81e929c0 t sdma_v4_0_ring_test_ib +ffffffff81e92b90 t sdma_v4_0_ring_insert_nop +ffffffff81e92cc0 t sdma_v4_0_ring_pad_ib +ffffffff81e92df0 t sdma_v4_0_ring_emit_wreg +ffffffff81e92f40 t sdma_v4_0_ring_emit_reg_wait +ffffffff81e92f90 t sdma_v4_0_wait_reg_mem +ffffffff81e932a0 t sdma_v4_0_page_ring_get_wptr +ffffffff81e93450 t sdma_v4_0_page_ring_set_wptr +ffffffff81e93610 t sdma_v4_0_emit_copy_buffer +ffffffff81e936d0 t sdma_v4_0_emit_fill_buffer +ffffffff81e93760 t sdma_v4_0_vm_copy_pte +ffffffff81e93820 t sdma_v4_0_vm_write_pte +ffffffff81e938f0 t sdma_v4_0_vm_set_pte_pde +ffffffff81e939f0 t sdma_v4_0_set_trap_irq_state +ffffffff81e93b90 t sdma_v4_0_process_trap_irq +ffffffff81e93cd0 t sdma_v4_0_process_illegal_inst_irq +ffffffff81e93df0 t sdma_v4_0_set_ecc_irq_state +ffffffff81e93f90 t sdma_v4_0_process_vm_hole_irq +ffffffff81e93fd0 t sdma_v4_0_print_iv_entry +ffffffff81e94110 t sdma_v4_0_process_doorbell_invalid_irq +ffffffff81e94150 t sdma_v4_0_process_pool_timeout_irq +ffffffff81e94190 t sdma_v4_0_process_srbm_write_irq +ffffffff81e941d0 t sdma_v4_0_process_ras_data_cb +ffffffff81e94250 t sdma_v4_0_ctx_switch_enable +ffffffff81e94920 t sdma_v4_0_enable +ffffffff81e94ee0 t sdma_v4_0_gfx_enable +ffffffff81e96000 t sdma_v4_4_query_ras_error_count +ffffffff81e96250 t sdma_v4_4_reset_ras_error_count +ffffffff81e97000 t sdma_v5_0_early_init +ffffffff81e97130 t sdma_v5_0_sw_init +ffffffff81e97410 t sdma_v5_0_sw_fini +ffffffff81e974a0 t sdma_v5_0_hw_init +ffffffff81e98710 t sdma_v5_0_hw_fini +ffffffff81e98770 t sdma_v5_0_suspend +ffffffff81e987d0 t sdma_v5_0_resume +ffffffff81e987e0 t sdma_v5_0_is_idle +ffffffff81e98870 t sdma_v5_0_wait_for_idle +ffffffff81e98930 t sdma_v5_0_soft_reset +ffffffff81e98960 t sdma_v5_0_set_clockgating_state +ffffffff81e98b60 t sdma_v5_0_set_powergating_state +ffffffff81e98b90 t sdma_v5_0_get_clockgating_state +ffffffff81e98c30 t sdma_v5_0_ring_get_rptr +ffffffff81e98c90 t sdma_v5_0_ring_get_wptr +ffffffff81e98e30 t sdma_v5_0_ring_set_wptr +ffffffff81e99180 t sdma_v5_0_ring_emit_ib +ffffffff81e99440 t sdma_v5_0_ring_emit_fence +ffffffff81e998a0 t sdma_v5_0_ring_emit_pipeline_sync +ffffffff81e99b20 t sdma_v5_0_ring_emit_vm_flush +ffffffff81e99b40 t sdma_v5_0_ring_emit_hdp_flush +ffffffff81e99de0 t sdma_v5_0_ring_test_ring +ffffffff81e9a1a0 t sdma_v5_0_ring_test_ib +ffffffff81e9a4d0 t sdma_v5_0_ring_insert_nop +ffffffff81e9a600 t sdma_v5_0_ring_pad_ib +ffffffff81e9a730 t sdma_v5_0_ring_init_cond_exec +ffffffff81e9a960 t sdma_v5_0_ring_patch_cond_exec +ffffffff81e9aa20 t sdma_v5_0_ring_emit_wreg +ffffffff81e9ab70 t sdma_v5_0_ring_emit_reg_wait +ffffffff81e9adf0 t sdma_v5_0_ring_emit_reg_write_reg_wait +ffffffff81e9ae70 t sdma_v5_0_ring_preempt_ib +ffffffff81e9afb0 t sdma_v5_0_ring_emit_mem_sync +ffffffff81e9b1c0 t sdma_v5_0_emit_copy_buffer +ffffffff81e9b280 t sdma_v5_0_emit_fill_buffer +ffffffff81e9b310 t sdma_v5_0_vm_copy_pte +ffffffff81e9b3d0 t sdma_v5_0_vm_write_pte +ffffffff81e9b4a0 t sdma_v5_0_vm_set_pte_pde +ffffffff81e9b5a0 t sdma_v5_0_set_trap_irq_state +ffffffff81e9b630 t sdma_v5_0_process_trap_irq +ffffffff81e9b740 t sdma_v5_0_process_illegal_inst_irq +ffffffff81e9b770 t sdma_v5_0_mqd_init +ffffffff81e9b850 t sdma_v5_0_ctx_switch_enable +ffffffff81e9bb70 t sdma_v5_0_enable +ffffffff81e9c000 t sdma_v5_2_early_init +ffffffff81e9c130 t sdma_v5_2_sw_init +ffffffff81e9c400 t sdma_v5_2_sw_fini +ffffffff81e9c490 t sdma_v5_2_hw_init +ffffffff81e9c7c0 t sdma_v5_2_hw_fini +ffffffff81e9c820 t sdma_v5_2_suspend +ffffffff81e9c880 t sdma_v5_2_resume +ffffffff81e9c890 t sdma_v5_2_is_idle +ffffffff81e9c940 t sdma_v5_2_wait_for_idle +ffffffff81e9ca40 t sdma_v5_2_soft_reset +ffffffff81e9cce0 t sdma_v5_2_set_clockgating_state +ffffffff81e9d000 t sdma_v5_2_set_powergating_state +ffffffff81e9d030 t sdma_v5_2_get_clockgating_state +ffffffff81e9d0c0 t sdma_v5_2_ring_get_rptr +ffffffff81e9d120 t sdma_v5_2_ring_get_wptr +ffffffff81e9d260 t sdma_v5_2_ring_set_wptr +ffffffff81e9d410 t sdma_v5_2_ring_emit_ib +ffffffff81e9d6d0 t sdma_v5_2_ring_emit_fence +ffffffff81e9db30 t sdma_v5_2_ring_emit_pipeline_sync +ffffffff81e9ddb0 t sdma_v5_2_ring_emit_vm_flush +ffffffff81e9ddd0 t sdma_v5_2_ring_emit_hdp_flush +ffffffff81e9e070 t sdma_v5_2_ring_test_ring +ffffffff81e9e430 t sdma_v5_2_ring_test_ib +ffffffff81e9e760 t sdma_v5_2_ring_insert_nop +ffffffff81e9e890 t sdma_v5_2_ring_pad_ib +ffffffff81e9e9c0 t sdma_v5_2_ring_init_cond_exec +ffffffff81e9ebf0 t sdma_v5_2_ring_patch_cond_exec +ffffffff81e9ecb0 t sdma_v5_2_ring_begin_use +ffffffff81e9ecd0 t sdma_v5_2_ring_end_use +ffffffff81e9ecf0 t sdma_v5_2_ring_emit_wreg +ffffffff81e9ee40 t sdma_v5_2_ring_emit_reg_wait +ffffffff81e9f0c0 t sdma_v5_2_ring_emit_reg_write_reg_wait +ffffffff81e9f140 t sdma_v5_2_ring_preempt_ib +ffffffff81e9f2b0 t sdma_v5_2_ring_emit_mem_sync +ffffffff81e9f4c0 t sdma_v5_2_emit_copy_buffer +ffffffff81e9f580 t sdma_v5_2_emit_fill_buffer +ffffffff81e9f610 t sdma_v5_2_vm_copy_pte +ffffffff81e9f6d0 t sdma_v5_2_vm_write_pte +ffffffff81e9f7a0 t sdma_v5_2_vm_set_pte_pde +ffffffff81e9f8a0 t sdma_v5_2_set_trap_irq_state +ffffffff81e9f960 t sdma_v5_2_process_trap_irq +ffffffff81e9faa0 t sdma_v5_2_process_illegal_inst_irq +ffffffff81e9fad0 t sdma_v5_2_mqd_init +ffffffff81e9fbb0 t sdma_v5_2_ctx_switch_enable +ffffffff81e9ffc0 t sdma_v5_2_enable +ffffffff81ea03c0 t sdma_v5_2_gfx_resume +ffffffff81ea2000 t sdma_v6_0_early_init +ffffffff81ea2100 t sdma_v6_0_sw_init +ffffffff81ea22e0 t sdma_v6_0_sw_fini +ffffffff81ea2370 t sdma_v6_0_hw_init +ffffffff81ea2380 t sdma_v6_0_hw_fini +ffffffff81ea23d0 t sdma_v6_0_suspend +ffffffff81ea2420 t sdma_v6_0_resume +ffffffff81ea2430 t sdma_v6_0_is_idle +ffffffff81ea24c0 t sdma_v6_0_wait_for_idle +ffffffff81ea2580 t sdma_v6_0_check_soft_reset +ffffffff81ea2640 t sdma_v6_0_soft_reset +ffffffff81ea2ad0 t sdma_v6_0_set_clockgating_state +ffffffff81ea2b00 t sdma_v6_0_set_powergating_state +ffffffff81ea2b30 t sdma_v6_0_get_clockgating_state +ffffffff81ea2b60 t sdma_v6_0_ring_get_rptr +ffffffff81ea2bc0 t sdma_v6_0_ring_get_wptr +ffffffff81ea2c30 t sdma_v6_0_ring_set_wptr +ffffffff81ea2f80 t sdma_v6_0_ring_emit_ib +ffffffff81ea3240 t sdma_v6_0_ring_emit_fence +ffffffff81ea36a0 t sdma_v6_0_ring_emit_pipeline_sync +ffffffff81ea3920 t sdma_v6_0_ring_emit_vm_flush +ffffffff81ea3940 t sdma_v6_0_ring_emit_hdp_flush +ffffffff81ea3be0 t sdma_v6_0_ring_test_ring +ffffffff81ea3fa0 t sdma_v6_0_ring_test_ib +ffffffff81ea42d0 t sdma_v6_0_ring_insert_nop +ffffffff81ea4400 t sdma_v6_0_ring_pad_ib +ffffffff81ea4530 t sdma_v6_0_ring_init_cond_exec +ffffffff81ea4760 t sdma_v6_0_ring_patch_cond_exec +ffffffff81ea4820 t sdma_v6_0_ring_emit_wreg +ffffffff81ea4970 t sdma_v6_0_ring_emit_reg_wait +ffffffff81ea4bf0 t sdma_v6_0_ring_emit_reg_write_reg_wait +ffffffff81ea4c70 t sdma_v6_0_ring_preempt_ib +ffffffff81ea4dc0 t sdma_v6_0_ring_emit_mem_sync +ffffffff81ea4fd0 t sdma_v6_0_emit_copy_buffer +ffffffff81ea5090 t sdma_v6_0_emit_fill_buffer +ffffffff81ea5120 t sdma_v6_0_vm_copy_pte +ffffffff81ea51e0 t sdma_v6_0_vm_write_pte +ffffffff81ea52b0 t sdma_v6_0_vm_set_pte_pde +ffffffff81ea53b0 t sdma_v6_0_set_trap_irq_state +ffffffff81ea5440 t sdma_v6_0_process_trap_irq +ffffffff81ea5570 t sdma_v6_0_process_illegal_inst_irq +ffffffff81ea55a0 t sdma_v6_0_mqd_init +ffffffff81ea56b0 t sdma_v6_0_start +ffffffff81ea5910 t sdma_v6_0_enable +ffffffff81ea5a90 t sdma_v6_0_gfx_resume +ffffffff81ea6a90 t sdma_v6_0_gfx_stop +ffffffff81ea7000 T sienna_cichlid_reset_init +ffffffff81ea70c0 t sienna_cichlid_async_reset +ffffffff81ea7120 t sienna_cichlid_get_reset_handler +ffffffff81ea7180 T sienna_cichlid_reset_fini +ffffffff81ea71e0 t sienna_cichlid_mode2_prepare_hwcontext +ffffffff81ea7330 t sienna_cichlid_mode2_perform_reset +ffffffff81ea73b0 t sienna_cichlid_mode2_restore_hwcontext +ffffffff81ea76a0 t sienna_cichlid_mode2_reset +ffffffff81ea8000 T smu_v11_0_i2c_control_init +ffffffff81ea80d0 T smu_v11_0_i2c_control_fini +ffffffff81ea8110 t smu_v11_0_i2c_xfer +ffffffff81ea9240 t smu_v11_0_i2c_func +ffffffff81ea9270 t smu_v11_0_i2c_enable +ffffffff81ea93b0 t smu_v11_0_i2c_abort +ffffffff81ea94b0 t lock_bus +ffffffff81ea9550 t trylock_bus +ffffffff81ea95a0 t unlock_bus +ffffffff81eaa000 t smuio_v11_0_get_rom_index_offset +ffffffff81eaa040 t smuio_v11_0_get_rom_data_offset +ffffffff81eaa080 t smuio_v11_0_update_rom_clock_gating +ffffffff81eaa1c0 t smuio_v11_0_get_clock_gating_state +ffffffff81eab000 t smuio_v11_0_6_get_rom_index_offset +ffffffff81eab040 t smuio_v11_0_6_get_rom_data_offset +ffffffff81eab080 t smuio_v11_0_6_update_rom_clock_gating +ffffffff81eab1c0 t smuio_v11_0_6_get_clock_gating_state +ffffffff81eac000 t smuio_v13_0_get_rom_index_offset +ffffffff81eac040 t smuio_v13_0_get_rom_data_offset +ffffffff81eac080 t smuio_v13_0_update_rom_clock_gating +ffffffff81eac1c0 t smuio_v13_0_get_clock_gating_state +ffffffff81eac260 t smuio_v13_0_get_die_id +ffffffff81eac2e0 t smuio_v13_0_get_socket_id +ffffffff81eac360 t smuio_v13_0_is_host_gpu_xgmi_supported +ffffffff81ead000 t smuio_v13_0_6_get_rom_index_offset +ffffffff81ead040 t smuio_v13_0_6_get_rom_data_offset +ffffffff81eae000 t smuio_v9_0_get_rom_index_offset +ffffffff81eae040 t smuio_v9_0_get_rom_data_offset +ffffffff81eae080 t smuio_v9_0_update_rom_clock_gating +ffffffff81eae1c0 t smuio_v9_0_get_clock_gating_state +ffffffff81eaf000 T soc15_grbm_select +ffffffff81eaf080 T soc15_program_register_sequence +ffffffff81eaf280 T soc15_set_virt_ops +ffffffff81eaf2f0 t soc15_common_early_init +ffffffff81eaf680 t soc15_common_late_init +ffffffff81eaf6c0 t soc15_common_sw_init +ffffffff81eaf720 t soc15_common_sw_fini +ffffffff81eaf770 t soc15_common_hw_init +ffffffff81eaf8a0 t soc15_common_hw_fini +ffffffff81eaf970 t soc15_common_suspend +ffffffff81eaf9b0 t soc15_common_resume +ffffffff81eaf9f0 t soc15_common_is_idle +ffffffff81eafa20 t soc15_common_wait_for_idle +ffffffff81eafa50 t soc15_common_soft_reset +ffffffff81eafa80 t soc15_common_set_clockgating_state +ffffffff81eafdc0 t soc15_common_set_powergating_state +ffffffff81eafdf0 t soc15_common_get_clockgating_state +ffffffff81eafed0 t soc15_pcie_rreg +ffffffff81eaff30 t soc15_pcie_wreg +ffffffff81eaff90 t soc15_pcie_rreg64 +ffffffff81eafff0 t soc15_pcie_wreg64 +ffffffff81eb0050 t soc15_uvd_ctx_rreg +ffffffff81eb00f0 t soc15_uvd_ctx_wreg +ffffffff81eb0180 t soc15_didt_rreg +ffffffff81eb0220 t soc15_didt_wreg +ffffffff81eb02a0 t soc15_gc_cac_rreg +ffffffff81eb03c0 t soc15_gc_cac_wreg +ffffffff81eb04d0 t soc15_se_cac_rreg +ffffffff81eb05f0 t soc15_se_cac_wreg +ffffffff81eb0700 t soc15_read_disabled_bios +ffffffff81eb0730 t soc15_read_register +ffffffff81eb0830 t soc15_vga_set_state +ffffffff81eb0860 t soc15_asic_reset +ffffffff81eb0960 t soc15_asic_reset_method +ffffffff81eb0ae0 t soc15_get_xclk +ffffffff81eb0b30 t soc15_set_uvd_clocks +ffffffff81eb0b60 t soc15_set_vce_clocks +ffffffff81eb0b90 t soc15_get_config_memsize +ffffffff81eb0bb0 t soc15_need_full_reset +ffffffff81eb0be0 t soc15_get_pcie_usage +ffffffff81eb0d10 t soc15_need_reset_on_init +ffffffff81eb0db0 t soc15_get_pcie_replay_count +ffffffff81eb0e20 t soc15_supports_baco +ffffffff81eb0e80 t soc15_pre_asic_init +ffffffff81eb0e90 t soc15_query_video_codecs +ffffffff81eb0f40 t vega20_get_pcie_usage +ffffffff81eb2000 T soc21_grbm_select +ffffffff81eb2080 t soc21_common_early_init +ffffffff81eb22d0 t soc21_common_late_init +ffffffff81eb2300 t soc21_common_sw_init +ffffffff81eb2330 t soc21_common_sw_fini +ffffffff81eb2360 t soc21_common_hw_init +ffffffff81eb2430 t soc21_common_hw_fini +ffffffff81eb2490 t soc21_common_suspend +ffffffff81eb24f0 t soc21_common_resume +ffffffff81eb25c0 t soc21_common_is_idle +ffffffff81eb25f0 t soc21_common_wait_for_idle +ffffffff81eb2620 t soc21_common_soft_reset +ffffffff81eb2650 t soc21_common_set_clockgating_state +ffffffff81eb2700 t soc21_common_set_powergating_state +ffffffff81eb2760 t soc21_common_get_clockgating_state +ffffffff81eb27b0 t soc21_pcie_rreg +ffffffff81eb2810 t soc21_pcie_wreg +ffffffff81eb2870 t soc21_pcie_rreg64 +ffffffff81eb28d0 t soc21_pcie_wreg64 +ffffffff81eb2930 t soc21_didt_rreg +ffffffff81eb29d0 t soc21_didt_wreg +ffffffff81eb2a50 t soc21_read_disabled_bios +ffffffff81eb2a80 t soc21_read_register +ffffffff81eb2b70 t soc21_vga_set_state +ffffffff81eb2ba0 t soc21_asic_reset +ffffffff81eb2c80 t soc21_asic_reset_method +ffffffff81eb2d40 t soc21_get_xclk +ffffffff81eb2d70 t soc21_set_uvd_clocks +ffffffff81eb2da0 t soc21_set_vce_clocks +ffffffff81eb2dd0 t soc21_get_config_memsize +ffffffff81eb2df0 t soc21_need_full_reset +ffffffff81eb2e50 t soc21_init_doorbell_index +ffffffff81eb2f70 t soc21_need_reset_on_init +ffffffff81eb3000 t soc21_get_pcie_replay_count +ffffffff81eb3030 t soc21_pre_asic_init +ffffffff81eb3060 t soc21_update_umd_stable_pstate +ffffffff81eb30d0 t soc21_query_video_codecs +ffffffff81eb4000 t tonga_ih_early_init +ffffffff81eb4050 t tonga_ih_sw_init +ffffffff81eb40d0 t tonga_ih_sw_fini +ffffffff81eb4110 t tonga_ih_hw_init +ffffffff81eb42f0 t tonga_ih_hw_fini +ffffffff81eb4390 t tonga_ih_suspend +ffffffff81eb4430 t tonga_ih_resume +ffffffff81eb4470 t tonga_ih_is_idle +ffffffff81eb44c0 t tonga_ih_wait_for_idle +ffffffff81eb4560 t tonga_ih_check_soft_reset +ffffffff81eb45c0 t tonga_ih_pre_soft_reset +ffffffff81eb4670 t tonga_ih_soft_reset +ffffffff81eb4740 t tonga_ih_post_soft_reset +ffffffff81eb4780 t tonga_ih_set_clockgating_state +ffffffff81eb47b0 t tonga_ih_set_powergating_state +ffffffff81eb47e0 t tonga_ih_get_wptr +ffffffff81eb48d0 t tonga_ih_decode_iv +ffffffff81eb4950 t tonga_ih_set_rptr +ffffffff81eb5000 t umc_v6_0_init_registers +ffffffff81eb6000 t umc_v6_1_query_ras_error_count +ffffffff81eb64e0 t umc_v6_1_query_ras_error_address +ffffffff81eb67c0 t umc_v6_1_err_cnt_init +ffffffff81eb7000 t umc_v6_7_query_ras_error_count +ffffffff81eb7400 t umc_v6_7_query_ras_error_address +ffffffff81eb7580 t umc_v6_7_query_ras_poison_mode +ffffffff81eb75e0 t umc_v6_7_convert_error_address +ffffffff81eb7900 t umc_v6_7_ecc_info_query_ras_error_count +ffffffff81eb7b20 t umc_v6_7_ecc_info_query_ras_error_address +ffffffff81eb8000 t umc_v8_10_query_ras_error_count +ffffffff81eb8280 t umc_v8_10_query_ras_error_address +ffffffff81eb8800 t umc_v8_10_err_cnt_init +ffffffff81eb8980 t umc_v8_10_query_ras_poison_mode +ffffffff81eb9000 t umc_v8_7_query_ras_error_count +ffffffff81eb9310 t umc_v8_7_query_ras_error_address +ffffffff81eb94d0 t umc_v8_7_err_cnt_init +ffffffff81eb9630 t umc_v8_7_ecc_info_query_ras_error_count +ffffffff81eb9750 t umc_v8_7_ecc_info_query_ras_error_address +ffffffff81eba000 t uvd_v5_0_early_init +ffffffff81eba050 t uvd_v5_0_sw_init +ffffffff81eba140 t uvd_v5_0_sw_fini +ffffffff81eba190 t uvd_v5_0_hw_init +ffffffff81eba690 t uvd_v5_0_hw_fini +ffffffff81eba710 t uvd_v5_0_suspend +ffffffff81eba810 t uvd_v5_0_resume +ffffffff81eba860 t uvd_v5_0_is_idle +ffffffff81eba8b0 t uvd_v5_0_wait_for_idle +ffffffff81eba940 t uvd_v5_0_soft_reset +ffffffff81eba9e0 t uvd_v5_0_set_clockgating_state +ffffffff81ebab80 t uvd_v5_0_set_powergating_state +ffffffff81ebabc0 t uvd_v5_0_get_clockgating_state +ffffffff81ebac40 t uvd_v5_0_ring_get_rptr +ffffffff81ebac80 t uvd_v5_0_ring_get_wptr +ffffffff81ebacc0 t uvd_v5_0_ring_set_wptr +ffffffff81ebacf0 t uvd_v5_0_ring_emit_ib +ffffffff81ebaf60 t uvd_v5_0_ring_emit_fence +ffffffff81ebb510 t uvd_v5_0_ring_test_ring +ffffffff81ebb6b0 t uvd_v5_0_ring_insert_nop +ffffffff81ebb810 t uvd_v5_0_set_interrupt_state +ffffffff81ebb840 t uvd_v5_0_process_interrupt +ffffffff81ebb8a0 t uvd_v5_0_stop +ffffffff81ebb9b0 t uvd_v5_0_start +ffffffff81ebd000 t uvd_v6_0_early_init +ffffffff81ebd160 t uvd_v6_0_sw_init +ffffffff81ebd3c0 t uvd_v6_0_sw_fini +ffffffff81ebd480 t uvd_v6_0_hw_init +ffffffff81ebda30 t uvd_v6_0_hw_fini +ffffffff81ebdab0 t uvd_v6_0_suspend +ffffffff81ebdbb0 t uvd_v6_0_resume +ffffffff81ebdc00 t uvd_v6_0_is_idle +ffffffff81ebdc50 t uvd_v6_0_wait_for_idle +ffffffff81ebdce0 t uvd_v6_0_check_soft_reset +ffffffff81ebdd60 t uvd_v6_0_pre_soft_reset +ffffffff81ebdda0 t uvd_v6_0_soft_reset +ffffffff81ebde70 t uvd_v6_0_post_soft_reset +ffffffff81ebdf10 t uvd_v6_0_set_clockgating_state +ffffffff81ebe0a0 t uvd_v6_0_set_powergating_state +ffffffff81ebe110 t uvd_v6_0_get_clockgating_state +ffffffff81ebe1a0 t uvd_v6_0_ring_get_rptr +ffffffff81ebe1e0 t uvd_v6_0_ring_get_wptr +ffffffff81ebe220 t uvd_v6_0_ring_set_wptr +ffffffff81ebe250 t uvd_v6_0_ring_emit_ib +ffffffff81ebe5b0 t uvd_v6_0_ring_emit_fence +ffffffff81ebeb60 t uvd_v6_0_ring_emit_pipeline_sync +ffffffff81ebef50 t uvd_v6_0_ring_emit_vm_flush +ffffffff81ebf2b0 t uvd_v6_0_ring_emit_hdp_flush +ffffffff81ebf2e0 t uvd_v6_0_ring_test_ring +ffffffff81ebf480 t uvd_v6_0_ring_insert_nop +ffffffff81ebf5e0 t uvd_v6_0_ring_emit_wreg +ffffffff81ebf860 t uvd_v6_0_enc_ring_get_rptr +ffffffff81ebf8c0 t uvd_v6_0_enc_ring_get_wptr +ffffffff81ebf920 t uvd_v6_0_enc_ring_set_wptr +ffffffff81ebf960 t uvd_v6_0_enc_ring_emit_ib +ffffffff81ebfba0 t uvd_v6_0_enc_ring_emit_fence +ffffffff81ebfde0 t uvd_v6_0_enc_ring_emit_pipeline_sync +ffffffff81ebff90 t uvd_v6_0_enc_ring_emit_vm_flush +ffffffff81ec01a0 t uvd_v6_0_enc_ring_test_ring +ffffffff81ec02f0 t uvd_v6_0_enc_ring_test_ib +ffffffff81ec07d0 t uvd_v6_0_enc_ring_insert_end +ffffffff81ec0860 t uvd_v6_0_set_interrupt_state +ffffffff81ec0890 t uvd_v6_0_process_interrupt +ffffffff81ec0990 t uvd_v6_0_stop +ffffffff81ec0aa0 t uvd_v6_0_start +ffffffff81ec2000 t uvd_v7_0_early_init +ffffffff81ec2280 t uvd_v7_0_sw_init +ffffffff81ec2680 t uvd_v7_0_sw_fini +ffffffff81ec2770 t uvd_v7_0_hw_init +ffffffff81ec5530 t uvd_v7_0_hw_fini +ffffffff81ec5840 t uvd_v7_0_suspend +ffffffff81ec58f0 t uvd_v7_0_resume +ffffffff81ec5940 t uvd_v7_0_set_clockgating_state +ffffffff81ec5970 t uvd_v7_0_ring_get_rptr +ffffffff81ec5a10 t uvd_v7_0_ring_get_wptr +ffffffff81ec5ab0 t uvd_v7_0_ring_set_wptr +ffffffff81ec5b30 t uvd_v7_0_ring_patch_cs_in_place +ffffffff81ec5ba0 t uvd_v7_0_ring_emit_ib +ffffffff81ec5f40 t uvd_v7_0_ring_emit_fence +ffffffff81ec6590 t uvd_v7_0_ring_emit_vm_flush +ffffffff81ec6600 t uvd_v7_0_ring_emit_hdp_flush +ffffffff81ec6630 t uvd_v7_0_ring_test_ring +ffffffff81ec68c0 t uvd_v7_0_ring_insert_nop +ffffffff81ec6a60 t uvd_v7_0_ring_emit_wreg +ffffffff81ec6d30 t uvd_v7_0_ring_emit_reg_wait +ffffffff81ec70e0 t uvd_v7_0_enc_ring_get_rptr +ffffffff81ec71d0 t uvd_v7_0_enc_ring_get_wptr +ffffffff81ec72d0 t uvd_v7_0_enc_ring_set_wptr +ffffffff81ec73d0 t uvd_v7_0_enc_ring_emit_ib +ffffffff81ec7610 t uvd_v7_0_enc_ring_emit_fence +ffffffff81ec7850 t uvd_v7_0_enc_ring_emit_vm_flush +ffffffff81ec78c0 t uvd_v7_0_enc_ring_test_ring +ffffffff81ec7a20 t uvd_v7_0_enc_ring_test_ib +ffffffff81ec7f00 t uvd_v7_0_enc_ring_insert_end +ffffffff81ec7f90 t uvd_v7_0_enc_ring_emit_wreg +ffffffff81ec80e0 t uvd_v7_0_enc_ring_emit_reg_wait +ffffffff81ec82a0 t uvd_v7_0_set_interrupt_state +ffffffff81ec82d0 t uvd_v7_0_process_interrupt +ffffffff81ec9000 t vce_v3_0_early_init +ffffffff81ec91a0 t vce_v3_0_sw_init +ffffffff81ec9300 t vce_v3_0_sw_fini +ffffffff81ec9350 t vce_v3_0_hw_init +ffffffff81ec9420 t vce_v3_0_hw_fini +ffffffff81ec9510 t vce_v3_0_suspend +ffffffff81ec95e0 t vce_v3_0_resume +ffffffff81ec96c0 t vce_v3_0_is_idle +ffffffff81ec9730 t vce_v3_0_wait_for_idle +ffffffff81ec97e0 t vce_v3_0_check_soft_reset +ffffffff81ec98e0 t vce_v3_0_pre_soft_reset +ffffffff81ec9980 t vce_v3_0_soft_reset +ffffffff81ec9a50 t vce_v3_0_post_soft_reset +ffffffff81ec9af0 t vce_v3_0_set_clockgating_state +ffffffff81ec9de0 t vce_v3_0_set_powergating_state +ffffffff81eca600 t vce_v3_0_get_clockgating_state +ffffffff81eca6c0 t vce_v3_0_ring_get_rptr +ffffffff81eca790 t vce_v3_0_ring_get_wptr +ffffffff81eca860 t vce_v3_0_ring_set_wptr +ffffffff81eca920 t vce_v3_0_ring_emit_ib +ffffffff81ecab60 t vce_v3_0_emit_pipeline_sync +ffffffff81ecad10 t vce_v3_0_emit_vm_flush +ffffffff81ecaf80 t vce_v3_0_set_interrupt_state +ffffffff81ecaff0 t vce_v3_0_process_interrupt +ffffffff81ecb0b0 t vce_v3_0_stop +ffffffff81ecc000 t vce_v4_0_early_init +ffffffff81ecc0b0 t vce_v4_0_sw_init +ffffffff81ecc340 t vce_v4_0_sw_fini +ffffffff81ecc3c0 t vce_v4_0_hw_init +ffffffff81eccb80 t vce_v4_0_hw_fini +ffffffff81ecccb0 t vce_v4_0_suspend +ffffffff81eccdd0 t vce_v4_0_resume +ffffffff81ecce80 t vce_v4_0_set_clockgating_state +ffffffff81ecceb0 t vce_v4_0_set_powergating_state +ffffffff81eccf90 t vce_v4_0_ring_get_rptr +ffffffff81ecd000 t vce_v4_0_ring_get_wptr +ffffffff81ecd090 t vce_v4_0_ring_set_wptr +ffffffff81ecd120 t vce_v4_0_ring_emit_ib +ffffffff81ecd360 t vce_v4_0_ring_emit_fence +ffffffff81ecd5a0 t vce_v4_0_emit_vm_flush +ffffffff81ecd610 t vce_v4_0_ring_insert_end +ffffffff81ecd6a0 t vce_v4_0_emit_wreg +ffffffff81ecd7f0 t vce_v4_0_emit_reg_wait +ffffffff81ecd9b0 t vce_v4_0_set_interrupt_state +ffffffff81ecda40 t vce_v4_0_process_interrupt +ffffffff81ecdae0 t vce_v4_0_start +ffffffff81ecf000 T vcn_dec_sw_ring_emit_fence +ffffffff81ecf240 T vcn_dec_sw_ring_insert_end +ffffffff81ecf2d0 T vcn_dec_sw_ring_emit_ib +ffffffff81ecf510 T vcn_dec_sw_ring_emit_reg_wait +ffffffff81ecf6d0 T vcn_dec_sw_ring_emit_vm_flush +ffffffff81ecf740 T vcn_dec_sw_ring_emit_wreg +ffffffff81ed0000 T vcn_v1_0_set_pg_for_begin_use +ffffffff81ed0140 T vcn_v1_0_ring_end_use +ffffffff81ed01b0 t vcn_v1_0_early_init +ffffffff81ed0280 t vcn_v1_0_sw_init +ffffffff81ed0500 t vcn_v1_0_sw_fini +ffffffff81ed0560 t vcn_v1_0_hw_init +ffffffff81ed0630 t vcn_v1_0_hw_fini +ffffffff81ed0730 t vcn_v1_0_suspend +ffffffff81ed07a0 t vcn_v1_0_resume +ffffffff81ed0880 t vcn_v1_0_is_idle +ffffffff81ed0910 t vcn_v1_0_wait_for_idle +ffffffff81ed0a00 t vcn_v1_0_set_clockgating_state +ffffffff81ed0ab0 t vcn_v1_0_set_powergating_state +ffffffff81ed1450 t vcn_v1_0_dec_ring_get_rptr +ffffffff81ed14e0 t vcn_v1_0_dec_ring_get_wptr +ffffffff81ed1570 t vcn_v1_0_dec_ring_set_wptr +ffffffff81ed1680 t vcn_v1_0_ring_patch_cs_in_place +ffffffff81ed1840 t vcn_v1_0_dec_ring_emit_ib +ffffffff81ed1bc0 t vcn_v1_0_dec_ring_emit_fence +ffffffff81ed21e0 t vcn_v1_0_dec_ring_emit_vm_flush +ffffffff81ed2250 t vcn_v1_0_dec_ring_insert_nop +ffffffff81ed23e0 t vcn_v1_0_dec_ring_insert_start +ffffffff81ed25b0 t vcn_v1_0_dec_ring_insert_end +ffffffff81ed26c0 t vcn_v1_0_ring_begin_use +ffffffff81ed2760 t vcn_v1_0_dec_ring_emit_wreg +ffffffff81ed2a10 t vcn_v1_0_dec_ring_emit_reg_wait +ffffffff81ed2d90 t vcn_v1_0_enc_ring_get_rptr +ffffffff81ed2e60 t vcn_v1_0_enc_ring_get_wptr +ffffffff81ed2f30 t vcn_v1_0_enc_ring_set_wptr +ffffffff81ed2ff0 t vcn_v1_0_enc_ring_emit_ib +ffffffff81ed3230 t vcn_v1_0_enc_ring_emit_fence +ffffffff81ed3470 t vcn_v1_0_enc_ring_emit_vm_flush +ffffffff81ed34e0 t vcn_v1_0_enc_ring_insert_end +ffffffff81ed3570 t vcn_v1_0_enc_ring_emit_wreg +ffffffff81ed36c0 t vcn_v1_0_enc_ring_emit_reg_wait +ffffffff81ed3880 t vcn_v1_0_set_interrupt_state +ffffffff81ed38b0 t vcn_v1_0_process_interrupt +ffffffff81ed3960 t vcn_v1_0_idle_work_handler +ffffffff81ed3ad0 t vcn_v1_0_pause_dpg_mode +ffffffff81ed4bc0 t vcn_v1_0_enable_clock_gating +ffffffff81ed4fd0 t vcn_v1_0_disable_clock_gating +ffffffff81ed5560 t vcn_1_0_enable_static_power_gating +ffffffff81ed5780 t vcn_v1_0_start_dpg_mode +ffffffff81ed93b0 t vcn_v1_0_start_spg_mode +ffffffff81edb5d0 t vcn_v1_0_clock_gating_dpg_mode +ffffffff81edc000 T vcn_v2_0_dec_ring_insert_start +ffffffff81edc1c0 T vcn_v2_0_dec_ring_insert_end +ffffffff81edc2c0 T vcn_v2_0_dec_ring_insert_nop +ffffffff81edc430 T vcn_v2_0_dec_ring_emit_fence +ffffffff81edc9f0 T vcn_v2_0_dec_ring_emit_ib +ffffffff81edcd50 T vcn_v2_0_dec_ring_emit_reg_wait +ffffffff81edd0a0 T vcn_v2_0_dec_ring_emit_vm_flush +ffffffff81edd110 T vcn_v2_0_dec_ring_emit_wreg +ffffffff81edd390 T vcn_v2_0_enc_ring_emit_fence +ffffffff81edd5d0 T vcn_v2_0_enc_ring_insert_end +ffffffff81edd660 T vcn_v2_0_enc_ring_emit_ib +ffffffff81edd8a0 T vcn_v2_0_enc_ring_emit_reg_wait +ffffffff81edda60 T vcn_v2_0_enc_ring_emit_vm_flush +ffffffff81eddad0 T vcn_v2_0_enc_ring_emit_wreg +ffffffff81eddc20 T vcn_v2_0_dec_ring_test_ring +ffffffff81eddec0 t vcn_v2_0_early_init +ffffffff81eddf90 t vcn_v2_0_sw_init +ffffffff81ede2a0 t vcn_v2_0_sw_fini +ffffffff81ede320 t vcn_v2_0_hw_init +ffffffff81edec70 t vcn_v2_0_hw_fini +ffffffff81eded70 t vcn_v2_0_suspend +ffffffff81ededa0 t vcn_v2_0_resume +ffffffff81ededf0 t vcn_v2_0_is_idle +ffffffff81edee80 t vcn_v2_0_wait_for_idle +ffffffff81edef70 t vcn_v2_0_set_clockgating_state +ffffffff81edf000 t vcn_v2_0_set_powergating_state +ffffffff81ee12e0 t vcn_v2_0_dec_ring_get_rptr +ffffffff81ee1370 t vcn_v2_0_dec_ring_get_wptr +ffffffff81ee1410 t vcn_v2_0_dec_ring_set_wptr +ffffffff81ee1540 t vcn_v2_0_enc_ring_get_rptr +ffffffff81ee1610 t vcn_v2_0_enc_ring_get_wptr +ffffffff81ee1700 t vcn_v2_0_enc_ring_set_wptr +ffffffff81ee17f0 t vcn_v2_0_set_interrupt_state +ffffffff81ee1820 t vcn_v2_0_process_interrupt +ffffffff81ee18d0 t vcn_v2_0_pause_dpg_mode +ffffffff81ee2220 t vcn_v2_0_enable_clock_gating +ffffffff81ee24a0 t vcn_v2_0_disable_clock_gating +ffffffff81ee28a0 t vcn_v2_0_enable_static_power_gating +ffffffff81ee2a80 t vcn_v2_0_start_dpg_mode +ffffffff81ee7650 t vcn_v2_0_clock_gating_dpg_mode +ffffffff81ee8000 t vcn_v2_6_query_poison_status +ffffffff81ee80d0 t vcn_v2_5_early_init +ffffffff81ee8440 t vcn_v2_5_sw_init +ffffffff81ee88b0 t vcn_v2_5_sw_fini +ffffffff81ee8980 t vcn_v2_5_hw_init +ffffffff81ee9390 t vcn_v2_5_hw_fini +ffffffff81ee94d0 t vcn_v2_5_suspend +ffffffff81ee9500 t vcn_v2_5_resume +ffffffff81ee9550 t vcn_v2_5_is_idle +ffffffff81ee9640 t vcn_v2_5_wait_for_idle +ffffffff81ee9770 t vcn_v2_5_set_clockgating_state +ffffffff81ee97f0 t vcn_v2_5_set_powergating_state +ffffffff81eea0b0 t vcn_v2_5_dec_ring_get_rptr +ffffffff81eea150 t vcn_v2_5_dec_ring_get_wptr +ffffffff81eea200 t vcn_v2_5_dec_ring_set_wptr +ffffffff81eea2b0 t vcn_v2_5_enc_ring_get_rptr +ffffffff81eea3a0 t vcn_v2_5_enc_ring_get_wptr +ffffffff81eea4a0 t vcn_v2_5_enc_ring_set_wptr +ffffffff81eea5a0 t vcn_v2_5_set_interrupt_state +ffffffff81eea5d0 t vcn_v2_5_process_interrupt +ffffffff81eea6f0 t vcn_v2_5_pause_dpg_mode +ffffffff81eeb050 t vcn_v2_5_enable_clock_gating +ffffffff81eeb350 t vcn_v2_5_disable_clock_gating +ffffffff81eeb870 t vcn_v2_5_start +ffffffff81eef7b0 t vcn_v2_5_clock_gating_dpg_mode +ffffffff81ef0160 t vcn_v2_5_mc_resume_dpg_mode +ffffffff81ef4000 t vcn_v3_0_early_init +ffffffff81ef4200 t vcn_v3_0_sw_init +ffffffff81ef46a0 t vcn_v3_0_sw_fini +ffffffff81ef4780 t vcn_v3_0_hw_init +ffffffff81ef52b0 t vcn_v3_0_hw_fini +ffffffff81ef53b0 t vcn_v3_0_suspend +ffffffff81ef53e0 t vcn_v3_0_resume +ffffffff81ef5430 t vcn_v3_0_is_idle +ffffffff81ef5520 t vcn_v3_0_wait_for_idle +ffffffff81ef5650 t vcn_v3_0_set_clockgating_state +ffffffff81ef5760 t vcn_v3_0_set_powergating_state +ffffffff81ef8010 t vcn_v3_0_dec_ring_get_rptr +ffffffff81ef80b0 t vcn_v3_0_dec_ring_get_wptr +ffffffff81ef8160 t vcn_v3_0_dec_ring_set_wptr +ffffffff81ef82d0 t vcn_v3_0_ring_patch_cs_in_place +ffffffff81ef85f0 t vcn_v3_0_enc_ring_get_rptr +ffffffff81ef86e0 t vcn_v3_0_enc_ring_get_wptr +ffffffff81ef87e0 t vcn_v3_0_enc_ring_set_wptr +ffffffff81ef88e0 t vcn_v3_0_set_interrupt_state +ffffffff81ef8910 t vcn_v3_0_process_interrupt +ffffffff81ef8a00 t vcn_v3_0_pause_dpg_mode +ffffffff81ef9350 t vcn_v3_0_enable_clock_gating +ffffffff81ef95d0 t vcn_v3_0_disable_clock_gating +ffffffff81ef9b50 t vcn_v3_0_start_dpg_mode +ffffffff81efe960 t vcn_v3_0_clock_gating_dpg_mode +ffffffff81f00000 t vcn_v4_0_early_init +ffffffff81f00120 t vcn_v4_0_sw_init +ffffffff81f00370 t vcn_v4_0_sw_fini +ffffffff81f00450 t vcn_v4_0_hw_init +ffffffff81f00e90 t vcn_v4_0_hw_fini +ffffffff81f00f90 t vcn_v4_0_suspend +ffffffff81f00fc0 t vcn_v4_0_resume +ffffffff81f01010 t vcn_v4_0_is_idle +ffffffff81f01110 t vcn_v4_0_wait_for_idle +ffffffff81f01240 t vcn_v4_0_set_clockgating_state +ffffffff81f01350 t vcn_v4_0_set_powergating_state +ffffffff81f03960 t vcn_v4_0_unified_ring_get_rptr +ffffffff81f03a40 t vcn_v4_0_unified_ring_get_wptr +ffffffff81f03b30 t vcn_v4_0_unified_ring_set_wptr +ffffffff81f03c30 t vcn_v4_0_ring_patch_cs_in_place +ffffffff81f03eb0 t vcn_v4_0_set_interrupt_state +ffffffff81f03ee0 t vcn_v4_0_process_interrupt +ffffffff81f03fa0 t vcn_v4_0_pause_dpg_mode +ffffffff81f04340 t vcn_v4_0_enable_clock_gating +ffffffff81f04630 t vcn_v4_0_disable_clock_gating +ffffffff81f04b70 t vcn_v4_0_start_dpg_mode +ffffffff81f09140 t vcn_v4_0_disable_clock_gating_dpg_mode +ffffffff81f0a000 t vega10_ih_early_init +ffffffff81f0a050 t vega10_ih_sw_init +ffffffff81f0a300 t vega10_ih_sw_fini +ffffffff81f0a340 t vega10_ih_hw_init +ffffffff81f0a6b0 t vega10_ih_hw_fini +ffffffff81f0a700 t vega10_ih_suspend +ffffffff81f0a750 t vega10_ih_resume +ffffffff81f0a760 t vega10_ih_is_idle +ffffffff81f0a790 t vega10_ih_wait_for_idle +ffffffff81f0a7c0 t vega10_ih_soft_reset +ffffffff81f0a7f0 t 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vi_set_uvd_clock +ffffffff81f12000 T amdgpu_dm_find_first_crtc_matching_connector +ffffffff81f12070 T amdgpu_dm_update_connector_after_detect +ffffffff81f125b0 T amdgpu_dm_update_freesync_caps +ffffffff81f12ab0 T dm_atomic_get_state +ffffffff81f12b20 T amdgpu_dm_connector_atomic_set_property +ffffffff81f12be0 T amdgpu_dm_connector_atomic_get_property +ffffffff81f12c80 T amdgpu_dm_connector_funcs_reset +ffffffff81f12d70 T amdgpu_dm_connector_atomic_duplicate_state +ffffffff81f12e70 T create_validate_stream_for_sink +ffffffff81f13b80 T amdgpu_dm_connector_mode_valid +ffffffff81f13d30 T convert_dc_color_depth_into_bpc +ffffffff81f13d70 t dm_encoder_helper_disable +ffffffff81f13da0 t dm_encoder_helper_atomic_check +ffffffff81f13f80 T amdgpu_dm_connector_init_helper +ffffffff81f14240 T amdgpu_dm_get_encoder_crtc_mask +ffffffff81f14290 T dm_restore_drm_connector_state +ffffffff81f14400 T amdgpu_dm_trigger_timing_sync +ffffffff81f145d0 T dm_write_reg_func +ffffffff81f145f0 T dm_read_reg_func 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dm_crtc_duplicate_state +ffffffff81f239f0 t dm_crtc_destroy_state +ffffffff81f23a30 t dm_crtc_helper_mode_fixup +ffffffff81f23a60 t dm_crtc_helper_disable +ffffffff81f23a90 t dm_crtc_helper_atomic_check +ffffffff81f24000 T dm_helpers_parse_edid_caps +ffffffff81f24200 T dm_helpers_dp_update_branch_info +ffffffff81f24230 T dm_helpers_dp_mst_write_payload_allocation_table +ffffffff81f245f0 T dm_helpers_dp_mst_poll_pending_down_reply +ffffffff81f24620 T dm_helpers_dp_mst_clear_payload_allocation_table +ffffffff81f24650 T dm_helpers_dp_mst_poll_for_allocation_change_trigger +ffffffff81f246c0 T dm_helpers_dp_mst_send_payload_allocation +ffffffff81f24790 T dm_dtn_log_begin +ffffffff81f247e0 T dm_dtn_log_append_v +ffffffff81f24930 T dm_dtn_log_end +ffffffff81f24980 T dm_helpers_dp_mst_start_top_mgr +ffffffff81f24a20 T dm_helpers_dp_mst_stop_top_mgr +ffffffff81f24ac0 T dm_helpers_dp_read_dpcd +ffffffff81f24b40 T dm_helpers_dp_write_dpcd +ffffffff81f24bc0 T dm_helpers_submit_i2c +ffffffff81f24ce0 T dm_helpers_dp_write_dsc_enable +ffffffff81f25260 T dm_helpers_is_dp_sink_present +ffffffff81f252f0 T dm_helpers_read_local_edid +ffffffff81f25480 T dm_helper_dmub_aux_transfer_sync +ffffffff81f254a0 T dm_helpers_dmub_set_config_sync +ffffffff81f254c0 T dm_set_dcn_clocks +ffffffff81f254f0 T dm_helpers_smu_timeout +ffffffff81f25520 T dm_helpers_init_panel_settings +ffffffff81f25590 T dm_helpers_override_panel_settings +ffffffff81f255d0 T dm_helpers_allocate_gpu_mem +ffffffff81f256d0 T dm_helpers_free_gpu_mem +ffffffff81f25760 T dm_helpers_dmub_outbox_interrupt_control +ffffffff81f257f0 T dm_helpers_mst_enable_stream_features +ffffffff81f25900 T dm_helpers_dp_handle_test_pattern_request +ffffffff81f25c30 T dm_set_phyd32clk +ffffffff81f25c60 T dm_helpers_enable_periodic_detection +ffffffff81f25c90 t execute_synaptics_rc_command +ffffffff81f26000 T amdgpu_dm_irq_register_interrupt +ffffffff81f261a0 t dm_irq_work_func +ffffffff81f261c0 T amdgpu_dm_irq_unregister_interrupt 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try_disable_dsc +ffffffff81f2b000 T amd_get_format_info +ffffffff81f2b020 T fill_blending_from_plane_state +ffffffff81f2b0c0 T fill_plane_buffer_attributes +ffffffff81f2b630 T dm_plane_helper_check_state +ffffffff81f2b850 T fill_dc_scaling_info +ffffffff81f2bab0 T handle_cursor_update +ffffffff81f2bd40 T amdgpu_dm_plane_init +ffffffff81f2ca70 t dm_drm_plane_reset +ffffffff81f2cb00 t dm_drm_plane_duplicate_state +ffffffff81f2cb90 t dm_drm_plane_destroy_state +ffffffff81f2cbd0 t dm_plane_format_mod_supported +ffffffff81f2cd00 t dm_plane_helper_prepare_fb +ffffffff81f2cfb0 t dm_plane_helper_cleanup_fb +ffffffff81f2d050 t dm_plane_atomic_check +ffffffff81f2d120 t dm_plane_atomic_async_check +ffffffff81f2d160 t dm_plane_atomic_async_update +ffffffff81f2d210 t amdgpu_bo_reserve +ffffffff81f2d410 t amdgpu_bo_unreserve +ffffffff81f2e000 T dm_pp_apply_display_requirements +ffffffff81f2e1d0 T dm_pp_get_clock_levels_by_type +ffffffff81f2e510 T dm_pp_get_clock_levels_by_type_with_latency +ffffffff81f2e6d0 T dm_pp_get_clock_levels_by_type_with_voltage +ffffffff81f2e880 T dm_pp_notify_wm_clock_changes +ffffffff81f2e8d0 T dm_pp_apply_power_level_change_request +ffffffff81f2e900 T dm_pp_apply_clock_for_voltage_request +ffffffff81f2e9a0 T dm_pp_get_static_clocks +ffffffff81f2ea60 T dm_pp_get_funcs +ffffffff81f2eb70 t pp_rv_set_wm_ranges +ffffffff81f2ecf0 t pp_rv_set_pme_wa_enable +ffffffff81f2ed10 t pp_rv_set_active_display_count +ffffffff81f2ed30 t pp_rv_set_min_deep_sleep_dcfclk +ffffffff81f2ed50 t pp_rv_set_hard_min_dcefclk_by_freq +ffffffff81f2ed70 t pp_rv_set_hard_min_fclk_by_freq +ffffffff81f2ed90 t pp_nv_set_display_count +ffffffff81f2edf0 t pp_nv_set_hard_min_dcefclk_by_freq +ffffffff81f2ee60 t pp_nv_set_min_deep_sleep_dcfclk +ffffffff81f2eec0 t pp_nv_set_voltage_by_freq +ffffffff81f2ef50 t pp_nv_set_wm_ranges +ffffffff81f2efa0 t pp_nv_set_hard_min_uclk_by_freq +ffffffff81f2f010 t pp_nv_get_maximum_sustainable_clocks +ffffffff81f2f070 t pp_nv_get_uclk_dpm_states +ffffffff81f2f0d0 t pp_nv_set_pstate_handshake_support +ffffffff81f2f120 t pp_rn_set_wm_ranges +ffffffff81f2f170 t pp_rn_get_dpm_clock_table +ffffffff81f30000 T amdgpu_dm_set_psr_caps +ffffffff81f30150 T amdgpu_dm_link_setup_psr +ffffffff81f302e0 T amdgpu_dm_psr_enable +ffffffff81f303e0 T amdgpu_dm_psr_disable +ffffffff81f30460 T amdgpu_dm_psr_disable_all +ffffffff81f31000 T dm_get_elapse_time_in_ns +ffffffff81f31030 T dm_perf_trace_timestamp +ffffffff81f32000 T dc_assert_fp_enabled +ffffffff81f32070 T dc_fpu_begin +ffffffff81f320c0 T dc_fpu_end +ffffffff81f33000 T dal_vector_construct +ffffffff81f330d0 T dal_vector_presized_create +ffffffff81f33340 T dal_vector_create +ffffffff81f33460 T dal_vector_destruct +ffffffff81f334b0 T dal_vector_destroy +ffffffff81f33530 T dal_vector_get_count +ffffffff81f33560 T dal_vector_at_index +ffffffff81f335a0 T dal_vector_remove_at_index +ffffffff81f33630 T dal_vector_set_at_index +ffffffff81f33690 T dal_vector_insert_at +ffffffff81f33790 T dal_vector_reserve +ffffffff81f33840 T dal_vector_append +ffffffff81f33940 T dal_vector_clone +ffffffff81f339f0 T dal_vector_capacity +ffffffff81f33a20 T dal_vector_clear +ffffffff81f34000 T fixed_point_to_int_frac +ffffffff81f341f0 T convert_float_matrix +ffffffff81f342b0 T reduce_fraction +ffffffff81f35000 T is_rgb_cspace +ffffffff81f35080 T is_lower_pipe_tree_visible +ffffffff81f350e0 T is_upper_pipe_tree_visible +ffffffff81f35140 T is_pipe_tree_visible +ffffffff81f351c0 T build_prescale_params +ffffffff81f36000 T dc_fixpt_from_fraction +ffffffff81f361c0 T dc_fixpt_mul +ffffffff81f36360 T dc_fixpt_sqr +ffffffff81f364d0 T dc_fixpt_recip +ffffffff81f36540 T dc_fixpt_sinc +ffffffff81f36730 T dc_fixpt_sin +ffffffff81f36760 T dc_fixpt_cos +ffffffff81f36850 T dc_fixpt_exp +ffffffff81f36b30 t fixed31_32_exp_from_taylor_series +ffffffff81f36f10 T dc_fixpt_log +ffffffff81f37120 T dc_fixpt_u4d19 +ffffffff81f37160 T dc_fixpt_u3d19 +ffffffff81f371a0 T dc_fixpt_u2d19 +ffffffff81f371e0 T dc_fixpt_u0d19 +ffffffff81f37210 T dc_fixpt_clamp_u0d14 +ffffffff81f37260 T dc_fixpt_clamp_u0d10 +ffffffff81f372b0 T dc_fixpt_s4d19 +ffffffff81f38000 T bios_parser_create +ffffffff81f39270 t bios_parser_get_connectors_number +ffffffff81f392d0 t bios_parser_get_connector_id +ffffffff81f39360 t bios_parser_get_src_obj +ffffffff81f39470 t bios_parser_get_i2c_info +ffffffff81f39690 t bios_parser_get_hpd_info +ffffffff81f39770 t bios_parser_get_device_tag +ffffffff81f39970 t bios_parser_get_spread_spectrum_info +ffffffff81f39b70 t bios_parser_get_ss_entry_number +ffffffff81f39db0 t bios_parser_get_embedded_panel_info +ffffffff81f3a320 t bios_parser_get_gpio_pin_info +ffffffff81f3a430 t bios_parser_get_encoder_cap_info +ffffffff81f3a530 t bios_parser_set_scratch_critical_state +ffffffff81f3a540 t bios_parser_is_device_id_supported +ffffffff81f3a600 t bios_parser_encoder_control +ffffffff81f3a640 t bios_parser_transmitter_control +ffffffff81f3a680 t bios_parser_enable_crtc +ffffffff81f3a6d0 t bios_parser_adjust_pixel_clock +ffffffff81f3a710 t bios_parser_set_pixel_clock +ffffffff81f3a750 t bios_parser_set_dce_clock +ffffffff81f3a790 t bios_parser_enable_spread_spectrum_on_ppll +ffffffff81f3a7e0 t bios_parser_program_crtc_timing +ffffffff81f3a820 t bios_parser_program_display_engine_pll +ffffffff81f3a860 t bios_parser_enable_disp_power_gating +ffffffff81f3a8a0 t bios_parser_destroy +ffffffff81f3a960 t bios_get_board_layout_info +ffffffff81f3abe0 t get_bios_object +ffffffff81f3adb0 t get_ss_info_from_ss_info_table +ffffffff81f3af80 t get_ss_info_v3_1 +ffffffff81f3b0f0 t get_ss_entry_number_from_ss_info_tbl +ffffffff81f3c000 T firmware_parser_create +ffffffff81f3de50 t bios_parser_get_connectors_number +ffffffff81f3dfc0 t bios_parser_get_connector_id +ffffffff81f3e020 t bios_parser_get_src_obj +ffffffff81f3e2c0 t bios_parser_get_i2c_info +ffffffff81f3e560 t bios_parser_get_hpd_info +ffffffff81f3e6d0 t bios_parser_get_device_tag +ffffffff81f3e9a0 t bios_parser_get_spread_spectrum_info +ffffffff81f3ed70 t bios_parser_get_ss_entry_number +ffffffff81f3eda0 t bios_parser_get_embedded_panel_info +ffffffff81f3efa0 t bios_parser_get_gpio_pin_info +ffffffff81f3f0c0 t bios_parser_get_encoder_cap_info +ffffffff81f3f230 t bios_parser_is_accelerated_mode +ffffffff81f3f240 t bios_parser_set_scratch_critical_state +ffffffff81f3f250 t bios_parser_is_device_id_supported +ffffffff81f3f2c0 t bios_parser_encoder_control +ffffffff81f3f300 t bios_parser_transmitter_control +ffffffff81f3f340 t bios_parser_enable_crtc +ffffffff81f3f390 t bios_parser_set_pixel_clock +ffffffff81f3f3d0 t bios_parser_set_dce_clock +ffffffff81f3f410 t bios_parser_program_crtc_timing +ffffffff81f3f450 t bios_parser_enable_disp_power_gating +ffffffff81f3f490 t firmware_parser_destroy +ffffffff81f3f550 t bios_get_board_layout_info +ffffffff81f3f9f0 t bios_parser_pack_data_tables +ffffffff81f3fa20 t bios_get_atom_dc_golden_table +ffffffff81f3fb60 t bios_parser_enable_lvtma_control +ffffffff81f3fbb0 t bios_parser_get_soc_bb_info +ffffffff81f3fcc0 t bios_parser_get_disp_connector_caps_info +ffffffff81f3fe20 t bios_parser_get_lttpr_caps +ffffffff81f3ff70 t bios_parser_get_lttpr_interop +ffffffff81f400b0 t bios_parser_get_connector_speed_cap_info +ffffffff81f40200 t get_bios_object +ffffffff81f40360 t get_bios_object_from_path_v3 +ffffffff81f41000 T object_id_from_bios_object_id +ffffffff81f42000 T bios_get_image +ffffffff81f42050 T bios_is_accelerated_mode +ffffffff81f420b0 T bios_set_scratch_acc_mode_change +ffffffff81f420f0 T bios_set_scratch_critical_state +ffffffff81f42130 T bios_get_vga_enabled_displays +ffffffff81f43000 T dal_bios_parser_create +ffffffff81f43070 T dal_bios_parser_destroy +ffffffff81f44000 T dal_bios_parser_init_cmd_tbl +ffffffff81f44810 t encoder_control_digx_v3 +ffffffff81f44910 t encoder_control_digx_v4 +ffffffff81f44a10 t encoder_control_digx_v5 +ffffffff81f44b60 t encoder_control_dig1_v1 +ffffffff81f44be0 t encoder_control_dig2_v1 +ffffffff81f44c60 t encoder_control_dig_v1 +ffffffff81f44cc0 t transmitter_control_v2 +ffffffff81f44e60 t transmitter_control_v3 +ffffffff81f45010 t transmitter_control_v4 +ffffffff81f451c0 t transmitter_control_v1_5 +ffffffff81f45330 t transmitter_control_v1_6 +ffffffff81f45490 t set_pixel_clock_v3 +ffffffff81f45600 t set_pixel_clock_v5 +ffffffff81f457a0 t set_pixel_clock_v6 +ffffffff81f45940 t set_pixel_clock_v7 +ffffffff81f45b10 t enable_spread_spectrum_on_ppll_v1 +ffffffff81f45c30 t enable_spread_spectrum_on_ppll_v2 +ffffffff81f45d60 t enable_spread_spectrum_on_ppll_v3 +ffffffff81f45e70 t adjust_display_pll_v2 +ffffffff81f45fc0 t adjust_display_pll_v3 +ffffffff81f46130 t dac1_encoder_control_v1 +ffffffff81f461b0 t dac2_encoder_control_v1 +ffffffff81f46230 t dac1_output_control_v1 +ffffffff81f46290 t dac2_output_control_v1 +ffffffff81f462f0 t set_crtc_using_dtd_timing_v3 +ffffffff81f46440 t set_crtc_timing_v1 +ffffffff81f465c0 t enable_crtc_v1 +ffffffff81f46660 t enable_crtc_mem_req_v1 +ffffffff81f46700 t program_clock_v5 +ffffffff81f46810 t program_clock_v6 +ffffffff81f46930 t external_encoder_control_v3 +ffffffff81f46ae0 t enable_disp_power_gating_v2_1 +ffffffff81f46bb0 t set_dce_clock_v2_1 +ffffffff81f47000 T dal_firmware_parser_init_cmd_tbl +ffffffff81f473d0 t encoder_control_digx_v1_5 +ffffffff81f475a0 t encoder_control_fallback +ffffffff81f47600 t transmitter_control_v1_6 +ffffffff81f477b0 t transmitter_control_v1_7 +ffffffff81f479b0 t transmitter_control_fallback +ffffffff81f47a10 t set_pixel_clock_v7 +ffffffff81f47c70 t set_pixel_clock_fallback +ffffffff81f47cd0 t set_crtc_using_dtd_timing_v3 +ffffffff81f47e20 t enable_crtc_v1 +ffffffff81f47ec0 t external_encoder_control_v3 +ffffffff81f47ef0 t enable_disp_power_gating_v2_1 +ffffffff81f48050 t enable_disp_power_gating_fallback +ffffffff81f480b0 t set_dce_clock_v2_1 +ffffffff81f481e0 t get_smu_clock_info_v3_1 +ffffffff81f48250 t enable_lvtma_control +ffffffff81f49000 T dal_bios_parser_init_cmd_tbl_helper +ffffffff81f490a0 T dal_cmd_table_helper_controller_id_to_atom +ffffffff81f491c0 T dal_cmd_table_helper_transmitter_bp_to_atom +ffffffff81f49240 T dal_cmd_table_helper_encoder_mode_bp_to_atom +ffffffff81f492d0 T dal_cmd_table_helper_assign_control_parameter +ffffffff81f49390 T dal_cmd_table_helper_clock_source_id_to_ref_clk_src +ffffffff81f49470 T dal_cmd_table_helper_encoder_id_to_atom +ffffffff81f4a000 T dal_bios_parser_init_cmd_tbl_helper2 +ffffffff81f4a0b0 T dal_cmd_table_helper_controller_id_to_atom2 +ffffffff81f4a1c0 T dal_cmd_table_helper_transmitter_bp_to_atom2 +ffffffff81f4a240 T dal_cmd_table_helper_encoder_mode_bp_to_atom2 +ffffffff81f4a2d0 T dal_cmd_table_helper_clock_source_id_to_ref_clk_src2 +ffffffff81f4a3b0 T dal_cmd_table_helper_encoder_id_to_atom2 +ffffffff81f4b000 T dal_cmd_tbl_helper_dce110_get_table ffffffff81f4b030 t encoder_action_to_atom ffffffff81f4b0b0 t engine_bp_to_atom ffffffff81f4b100 t clock_source_id_to_atom -ffffffff81f4b1d0 t clock_source_id_to_atom_phy_clk_src_id -ffffffff81f4b220 t signal_type_to_atom_dig_mode -ffffffff81f4b280 t hpd_sel_to_atom -ffffffff81f4b2c0 t dig_encoder_sel_to_atom -ffffffff81f4b2f0 t phy_id_to_atom -ffffffff81f4b330 t disp_power_gating_action_to_atom -ffffffff81f4b3a0 t dc_clock_type_to_atom -ffffffff81f4b420 t transmitter_color_depth_to_atom -ffffffff81f4c000 T dal_cmd_tbl_helper_dce112_get_table +ffffffff81f4b1a0 t clock_source_id_to_atom_phy_clk_src_id +ffffffff81f4b1f0 t signal_type_to_atom_dig_mode +ffffffff81f4b250 t hpd_sel_to_atom +ffffffff81f4b290 t dig_encoder_sel_to_atom +ffffffff81f4b2c0 t phy_id_to_atom +ffffffff81f4b300 t disp_power_gating_action_to_atom +ffffffff81f4c000 T dal_cmd_tbl_helper_dce112_get_table2 ffffffff81f4c030 t encoder_action_to_atom ffffffff81f4c0b0 t engine_bp_to_atom ffffffff81f4c100 t clock_source_id_to_atom @@ -30165,7 +30154,7 @@ ffffffff81f4c2f0 t phy_id_to_atom ffffffff81f4c330 t disp_power_gating_action_to_atom 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dcn31_smu_transfer_dpm_table_smu_2_dram +ffffffff81f65610 T dcn31_smu_transfer_wm_table_dram_2_smu +ffffffff81f65650 T dcn31_smu_set_zstate_support +ffffffff81f656c0 T dcn31_smu_set_dtbclk +ffffffff81f66000 T dcn314_update_clocks +ffffffff81f66600 t dcn314_disable_otg_wa +ffffffff81f66790 T dcn314_are_clock_states_equal +ffffffff81f667f0 T dcn314_clk_mgr_construct +ffffffff81f67520 T dcn314_clk_mgr_destroy +ffffffff81f67570 t dcn314_enable_pme_wa +ffffffff81f67580 t dcn314_notify_wm_ranges +ffffffff81f68000 T dcn314_smu_get_smu_version +ffffffff81f68020 t dcn314_smu_send_msg_with_param +ffffffff81f68240 T dcn314_smu_set_dispclk +ffffffff81f682b0 T dcn314_smu_set_dprefclk +ffffffff81f68320 T dcn314_smu_set_hard_min_dcfclk +ffffffff81f683a0 T dcn314_smu_set_min_deep_sleep_dcfclk +ffffffff81f68420 T dcn314_smu_set_dppclk +ffffffff81f68490 T dcn314_smu_set_display_idle_optimization +ffffffff81f684e0 T dcn314_smu_enable_phy_refclk_pwrdwn +ffffffff81f68530 T dcn314_smu_enable_pme_wa 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dc_dmub_srv_p_state_delegate +ffffffff81faded0 T dc_dmub_srv_query_caps_cmd +ffffffff81fadfc0 T dc_dmub_srv_get_visual_confirm_color_cmd +ffffffff81fae150 T dc_dmub_setup_subvp_dmub_command +ffffffff81faeb10 T dc_dmub_srv_get_diagnostic_data +ffffffff81faeb50 T dc_send_update_cursor_info_to_dmu +ffffffff81faedf0 T dc_dmub_check_min_version +ffffffff81faf000 T dc_edid_parser_send_cea +ffffffff81faf0b0 T dc_edid_parser_recv_cea_ack +ffffffff81faf140 T dc_edid_parser_recv_amd_vsdb +ffffffff81fb0000 T generic_reg_update_ex +ffffffff81fb0230 t set_reg_field_values +ffffffff81fb03e0 T generic_reg_set_ex +ffffffff81fb04d0 t dmub_reg_value_burst_set_pack +ffffffff81fb0680 T generic_reg_get +ffffffff81fb06f0 T generic_reg_get2 +ffffffff81fb0780 T generic_reg_get3 +ffffffff81fb0820 T generic_reg_get4 +ffffffff81fb08d0 T generic_reg_get5 +ffffffff81fb0990 T generic_reg_get6 +ffffffff81fb0a70 T generic_reg_get7 +ffffffff81fb0b60 T generic_reg_get8 +ffffffff81fb0c70 T generic_reg_wait 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dce_aud_wall_dto_setup +ffffffff81fb42d0 T dce_aud_hw_init +ffffffff81fb44a0 T dce_aud_destroy +ffffffff81fb44f0 T dce_audio_create +ffffffff81fb45b0 t dce_aud_endpoint_valid +ffffffff81fb5000 T dce110_engine_destroy +ffffffff81fb5050 T dce110_aux_engine_construct +ffffffff81fb50d0 t dce_aux_configure_timeout +ffffffff81fb52b0 T dce_aux_transfer_raw +ffffffff81fb5ae0 t acquire +ffffffff81fb5d50 T dce_aux_transfer_dmub_raw +ffffffff81fb5e50 T dce_aux_transfer_with_retries +ffffffff81fb7000 T look_up_in_video_optimized_rate_tlb +ffffffff81fb7070 T dce110_clk_src_construct +ffffffff81fb7270 t calc_pll_max_vco_construct +ffffffff81fb7410 T dce112_clk_src_construct +ffffffff81fb74a0 T dcn20_clk_src_construct +ffffffff81fb7550 T dcn3_clk_src_construct +ffffffff81fb7600 T dcn31_clk_src_construct +ffffffff81fb76b0 T dcn301_clk_src_construct +ffffffff81fb7760 t dce110_clock_source_power_down +ffffffff81fb77f0 t dce110_program_pix_clk +ffffffff81fb7e80 t dce110_get_pix_clk_dividers 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program_multi_taps_filter +ffffffff81fd3000 T dmub_abm_create +ffffffff81fd30b0 T dmub_abm_destroy +ffffffff81fd3100 t dmub_abm_init +ffffffff81fd34e0 t dmub_abm_set_level +ffffffff81fd36a0 t dmub_abm_get_current_backlight +ffffffff81fd36d0 t dmub_abm_get_target_backlight +ffffffff81fd3700 t dmub_abm_init_config +ffffffff81fd3810 t dmub_abm_set_pause +ffffffff81fd4000 T dmub_hw_lock_mgr_cmd +ffffffff81fd40b0 T dmub_hw_lock_mgr_inbox0_cmd +ffffffff81fd40f0 T should_use_dmub_lock +ffffffff81fd5000 T dmub_enable_outbox_notification +ffffffff81fd6000 T dmub_psr_create +ffffffff81fd6090 T dmub_psr_destroy +ffffffff81fd60e0 t dmub_psr_copy_settings +ffffffff81fd65a0 t dmub_psr_enable +ffffffff81fd6730 t dmub_psr_get_state +ffffffff81fd6a20 t dmub_psr_set_level +ffffffff81fd6b10 t dmub_psr_force_static +ffffffff81fd6bc0 t dmub_psr_get_residency +ffffffff81fd6c10 t dmub_psr_set_sink_vtotal_in_psr_active +ffffffff81fd6cd0 t dmub_psr_set_power_opt +ffffffff81fd7000 T dce100_enable_display_power_gating +ffffffff81fd70a0 T dce100_prepare_bandwidth +ffffffff81fd70f0 T dce100_optimize_bandwidth +ffffffff81fd7140 T dce100_hw_sequencer_construct +ffffffff81fd8000 T dce100_add_stream_to_ctx +ffffffff81fd80a0 T dce100_validate_plane +ffffffff81fd80e0 T dce100_find_first_free_match_stream_enc_for_link +ffffffff81fd8190 T dce100_create_resource_pool +ffffffff81fd8f50 t dce100_resource_destruct +ffffffff81fd9210 t dce100_destroy_resource_pool +ffffffff81fd9270 t dce100_panel_cntl_create +ffffffff81fd9300 t dce100_link_encoder_create +ffffffff81fd9400 t dce100_validate_bandwidth +ffffffff81fd9540 t dce100_validate_global +ffffffff81fd95e0 t read_dce_straps +ffffffff81fd9650 t create_audio +ffffffff81fd9680 t dce100_stream_encoder_create +ffffffff81fd9720 t dce100_hwseq_create +ffffffff81fda000 T dce110_compressor_power_up_fbc +ffffffff81fda130 T dce110_compressor_enable_fbc +ffffffff81fda340 T dce110_compressor_is_fbc_enabled_in_hw +ffffffff81fda3f0 T dce110_compressor_disable_fbc +ffffffff81fda6c0 T dce110_compressor_program_compressed_surface_address_and_pitch +ffffffff81fda7e0 T dce110_compressor_set_fbc_invalidation_triggers +ffffffff81fda860 T dce110_compressor_create +ffffffff81fda900 T dce110_compressor_construct +ffffffff81fda980 T dce110_compressor_destroy +ffffffff81fda9d0 T get_max_support_fbc_buffersize +ffffffff81fdb000 T dce110_update_info_frame +ffffffff81fdb0d0 T dce110_enable_stream +ffffffff81fdb1d0 T dce110_edp_wait_for_hpd_ready +ffffffff81fdb410 T dce110_edp_power_control +ffffffff81fdb8d0 T dce110_edp_wait_for_T12 +ffffffff81fdba60 T dce110_edp_backlight_control +ffffffff81fdbd80 T dce110_enable_audio_stream +ffffffff81fdbe90 T dce110_disable_audio_stream +ffffffff81fdc000 T dce110_disable_stream +ffffffff81fdc140 T dce110_unblank_stream +ffffffff81fdc240 T dce110_blank_stream +ffffffff81fdc390 T dce110_set_avmute +ffffffff81fdc3e0 T dce110_enable_accelerated_mode +ffffffff81fdc790 t power_down_all_hw_blocks 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cm3_helper_convert_to_custom_float +ffffffff82070420 T cm3_helper_translate_curve_to_degamma_hw_format +ffffffff82070c40 T is_rgb_equal +ffffffff82071000 T dccg3_create +ffffffff820710b0 T dccg30_create +ffffffff82072000 T dcn30_link_encoder_validate_output_with_stream +ffffffff82072010 T dcn30_link_encoder_construct +ffffffff820721f0 T enc3_hw_init +ffffffff82073000 T enc3_stream_encoder_update_hdmi_info_packets +ffffffff82073100 t enc3_update_hdmi_info_packet +ffffffff820734f0 T enc3_stream_encoder_stop_hdmi_info_packets +ffffffff82073ad0 T enc3_dp_set_dsc_pps_info_packet +ffffffff82073df0 T enc3_stream_encoder_update_dp_info_packets +ffffffff82074030 T enc3_audio_mute_control +ffffffff820740a0 T enc3_se_dp_audio_setup +ffffffff82074120 T enc3_se_dp_audio_enable +ffffffff82074210 T enc3_se_hdmi_audio_setup +ffffffff82074520 T dcn30_dio_stream_encoder_construct +ffffffff82074590 t enc3_stream_encoder_hdmi_set_stream_attribute +ffffffff82074b90 t enc3_stream_encoder_dvi_set_stream_attribute +ffffffff82074d90 t enc3_read_state +ffffffff82074f20 t enc3_dp_set_dsc_config +ffffffff82074ff0 t enc3_dp_set_odm_combine +ffffffff82076000 T dpp30_read_state +ffffffff82076050 T dpp3_program_post_csc +ffffffff82076240 T dpp3_set_pre_degam +ffffffff820762f0 T dpp3_cnv_setup +ffffffff82076bc0 T dpp3_set_cursor_attributes +ffffffff82076d30 T dpp3_get_optimal_number_of_taps +ffffffff82077750 T dpp3_construct +ffffffff820777b0 t dpp3_deferred_update +ffffffff82077b90 t dpp3_program_blnd_lut +ffffffff82078610 t dpp3_program_shaper +ffffffff8207a6a0 t dpp3_program_3dlut +ffffffff8207ae50 t dpp3_set3dlut_ram12 +ffffffff8207c000 T dpp3_program_cm_dealpha +ffffffff8207c0a0 T dpp3_program_cm_bias +ffffffff8207c190 T dpp3_program_gamcor_lut +ffffffff8207cbb0 t dpp3_power_on_gamcor_lut +ffffffff8207cce0 T dpp3_set_hdr_multiplier +ffffffff8207cd30 T dpp3_cm_set_gamut_remap +ffffffff8207d000 T dwb3_config_fc +ffffffff8207d1b0 T dwb3_set_stereo +ffffffff8207d270 T dwb3_enable +ffffffff8207d3a0 T dwb3_set_denorm +ffffffff8207d4c0 T dwb3_disable +ffffffff8207d570 T dwb3_update +ffffffff8207d6a0 T dwb3_is_enabled +ffffffff8207d740 T dwb3_set_new_content +ffffffff8207d780 t dwb3_get_caps +ffffffff8207d820 T dcn30_dwbc_construct +ffffffff8207d870 T dwb3_set_host_read_rate_control +ffffffff8207e000 T dwb3_ogam_set_input_transfer_func +ffffffff8207e9f0 T dwb3_set_gamut_remap +ffffffff8207eca0 T dwb3_program_hdr_mult +ffffffff8207f000 T hubbub3_init_dchub_sys_ctx +ffffffff8207f1c0 T hubbub3_program_watermarks +ffffffff8207f2c0 T hubbub3_dcc_support_swizzle +ffffffff8207f380 T hubbub3_get_dcc_compression_cap +ffffffff8207f560 T hubbub3_force_wm_propagate_to_pipes +ffffffff8207f610 T hubbub3_force_pstate_change_control +ffffffff8207f690 T hubbub3_init_watermarks +ffffffff8207f9d0 T hubbub3_construct +ffffffff82080000 T hubp3_set_vm_system_aperture_settings +ffffffff82080130 T hubp3_program_surface_flip_and_addr +ffffffff82080b20 T hubp3_dcc_control +ffffffff82080be0 T hubp3_dcc_control_sienna_cichlid +ffffffff82080d00 T hubp3_dmdata_set_attributes +ffffffff82080f00 T hubp3_program_surface_config +ffffffff820811f0 T hubp3_read_state +ffffffff82081460 T hubp3_setup +ffffffff820814f0 T hubp3_init +ffffffff82081520 T hubp3_construct +ffffffff82082000 T dcn30_set_blend_lut +ffffffff82082070 T dcn30_set_input_transfer_func +ffffffff820821d0 T dcn30_set_output_transfer_func +ffffffff82082500 T dcn30_update_writeback +ffffffff82082590 t dcn30_set_writeback +ffffffff82082740 T dcn30_mmhubbub_warmup +ffffffff82082990 T dcn30_enable_writeback +ffffffff82082a60 T dcn30_disable_writeback +ffffffff82082b40 T dcn30_program_all_writeback_pipes_in_tree +ffffffff82082e40 T dcn30_init_hw +ffffffff820836c0 T dcn30_set_avmute +ffffffff82083720 T dcn30_update_info_frame +ffffffff820837f0 T dcn30_program_dmdata_engine +ffffffff82083890 T dcn30_apply_idle_power_optimizations +ffffffff82083e10 T dcn30_does_plane_fit_in_mall +ffffffff82083ec0 T dcn30_hardware_release +ffffffff82083fb0 T dcn30_set_disp_pattern_generator +ffffffff82084020 T dcn30_prepare_bandwidth +ffffffff82085000 T dcn30_hw_sequencer_construct +ffffffff82086000 t mmhubbub3_warmup_mcif +ffffffff82086210 t mmhubbub3_config_mcif_buf +ffffffff820866c0 t mmhubbub3_config_mcif_arb +ffffffff82086b10 T dcn30_mmhubbub_construct +ffffffff82087000 T mpc3_is_dwb_idle +ffffffff82087070 T mpc3_set_dwb_mux +ffffffff820870f0 T mpc3_disable_dwb_mux +ffffffff82087170 T mpc3_set_out_rate_control +ffffffff82087280 T mpc3_get_ogam_current +ffffffff82087320 T mpc3_power_on_ogam_lut +ffffffff820873f0 T mpc3_set_output_gamma +ffffffff82088030 T mpc3_set_denorm +ffffffff820880a0 T mpc3_set_denorm_clamp +ffffffff820881f0 T mpc3_program_shaper +ffffffff8208a3b0 t mpc3_power_on_shaper_3dlut +ffffffff8208a730 T mpc3_init_mpcc +ffffffff8208a7b0 T mpc3_set_gamut_remap +ffffffff8208aa20 T mpc3_program_3dlut +ffffffff8208b190 t mpc3_set3dlut_ram12 +ffffffff8208b370 T mpc3_set_output_csc +ffffffff8208b4e0 T mpc3_set_ocsc_default +ffffffff8208b650 T mpc3_set_rmu_mux +ffffffff8208b6f0 T mpc3_get_rmu_mux_status +ffffffff8208b7a0 T mpcc3_acquire_rmu +ffffffff8208b900 t mpcc3_release_rmu +ffffffff8208ba70 t mpc3_set_mpc_mem_lp_mode +ffffffff8208bbc0 T dcn30_mpc_construct +ffffffff8208c000 T optc3_triplebuffer_lock +ffffffff8208c120 T optc3_lock_doublebuffer_enable +ffffffff8208c3b0 T optc3_lock_doublebuffer_disable +ffffffff8208c4c0 T optc3_lock +ffffffff8208c590 T optc3_set_out_mux +ffffffff8208c5d0 T optc3_program_blank_color +ffffffff8208c700 T optc3_set_drr_trigger_window +ffffffff8208c790 T optc3_set_vtotal_change_limit +ffffffff8208c800 T optc3_set_dsc_config +ffffffff8208c850 T optc3_set_odm_bypass +ffffffff8208c9d0 T optc3_wait_drr_doublebuffer_pending_clear +ffffffff8208ca50 T optc3_set_vtotal_min_max +ffffffff8208ca90 T optc3_tg_init +ffffffff8208caf0 T dcn30_timing_generator_init +ffffffff8208cb60 t optc3_set_odm_combine +ffffffff8208d000 T dcn30_add_stream_to_ctx +ffffffff8208d020 T dcn30_populate_dml_pipes_from_context +ffffffff8208d100 T dcn30_populate_dml_writeback_from_context +ffffffff8208d160 T dcn30_calc_max_scaled_time +ffffffff8208d1c0 T dcn30_set_mcif_arb_params +ffffffff8208d330 T dcn30_acquire_post_bldn_3dlut +ffffffff8208d4c0 T dcn30_release_post_bldn_3dlut +ffffffff8208d570 T dcn30_internal_validate_bw +ffffffff8208e2c0 t dcn30_split_stream_for_mpc_or_odm +ffffffff8208e5e0 T dcn30_can_support_mclk_switch_using_fw_based_vblank_stretch +ffffffff8208e6b0 t is_refresh_rate_support_mclk_switch_using_fw_based_vblank_stretch +ffffffff8208e750 T dcn30_setup_mclk_switch_using_fw_based_vblank_stretch +ffffffff8208e7f0 T dcn30_update_soc_for_wm_a +ffffffff8208e840 T dcn30_calculate_wm_and_dlg +ffffffff8208e8b0 T dcn30_validate_bandwidth +ffffffff8208ece0 T dcn30_update_bw_bounding_box +ffffffff8208f520 T dcn30_create_resource_pool +ffffffff82090aa0 t dcn30_resource_destruct +ffffffff82091010 t dcn30_destroy_resource_pool +ffffffff82091070 t dcn30_panel_cntl_create +ffffffff82091100 t dcn30_link_encoder_create +ffffffff820911b0 t dcn30_get_panel_config_defaults +ffffffff82091220 t read_dce_straps +ffffffff82091250 t dcn30_create_audio +ffffffff82091280 t dcn30_stream_encoder_create +ffffffff82091400 t dcn30_hwseq_create +ffffffff82092000 T vpg3_update_generic_info_packet +ffffffff820929a0 T vpg3_construct +ffffffff82093000 T dccg301_create +ffffffff82094000 T dcn301_link_encoder_construct +ffffffff82095000 T hubbub301_construct +ffffffff82096000 T dcn301_hw_sequencer_construct +ffffffff82097000 T dcn301_panel_cntl_construct +ffffffff82097050 t dcn301_panel_cntl_destroy +ffffffff820970a0 t dcn301_panel_cntl_hw_init +ffffffff820972b0 t dcn301_is_panel_backlight_on +ffffffff82097310 t dcn301_is_panel_powered_on +ffffffff820973c0 t dcn301_store_backlight_level +ffffffff82097460 t dcn301_get_16_bit_backlight_from_pwm +ffffffff82098000 T dcn301_create_resource_pool +ffffffff820995a0 t dcn301_destruct +ffffffff82099ae0 t dcn301_destroy_resource_pool +ffffffff82099b40 t dcn301_panel_cntl_create +ffffffff82099bd0 t dcn301_link_encoder_create +ffffffff82099c80 t dcn301_calculate_wm_and_dlg +ffffffff82099cf0 t read_dce_straps +ffffffff82099d20 t dcn301_create_audio +ffffffff82099d50 t dcn301_stream_encoder_create +ffffffff82099ed0 t dcn301_hwseq_create +ffffffff8209a000 T dcn302_dpp_pg_control +ffffffff8209a2a0 T dcn302_hubp_pg_control +ffffffff8209a550 T dcn302_dsc_pg_control +ffffffff8209b000 T dcn302_hw_sequencer_construct +ffffffff8209c000 T dcn302_update_bw_bounding_box +ffffffff8209c050 T dcn302_create_resource_pool +ffffffff8209d3d0 t dcn302_resource_destruct +ffffffff8209d8e0 t dcn302_destroy_resource_pool +ffffffff8209d930 t dcn302_panel_cntl_create +ffffffff8209d9c0 t dcn302_link_encoder_create +ffffffff8209da70 t dcn302_get_panel_config_defaults +ffffffff8209dae0 t read_dce_straps +ffffffff8209db10 t dcn302_create_audio +ffffffff8209db40 t dcn302_stream_encoder_create +ffffffff8209dcc0 t dcn302_hwseq_create +ffffffff8209e000 T dcn303_dpp_pg_control +ffffffff8209e030 T dcn303_hubp_pg_control +ffffffff8209e060 T dcn303_dsc_pg_control +ffffffff8209e090 T dcn303_enable_power_gating_plane +ffffffff8209f000 T dcn303_hw_sequencer_construct +ffffffff820a0000 T dcn303_update_bw_bounding_box +ffffffff820a0050 T dcn303_create_resource_pool +ffffffff820a1270 t dcn303_resource_destruct +ffffffff820a1790 t dcn303_destroy_resource_pool +ffffffff820a17e0 t dcn303_panel_cntl_create +ffffffff820a1870 t dcn303_link_encoder_create +ffffffff820a1920 t dcn303_get_panel_config_defaults +ffffffff820a1990 t read_dce_straps +ffffffff820a19c0 t dcn303_create_audio +ffffffff820a19f0 t dcn303_stream_encoder_create +ffffffff820a1b70 t dcn303_hwseq_create +ffffffff820a2000 T afmt31_powerdown +ffffffff820a2090 T afmt31_poweron +ffffffff820a2120 T afmt31_construct +ffffffff820a3000 T apg31_construct +ffffffff820a3050 t apg31_se_audio_setup +ffffffff820a3160 t apg31_audio_mute_control +ffffffff820a31a0 t apg31_enable +ffffffff820a32b0 t apg31_disable +ffffffff820a4000 T dccg31_update_dpp_dto +ffffffff820a4160 T dccg31_set_dpstreamclk +ffffffff820a42f0 t dccg31_disable_dpstreamclk +ffffffff820a4440 T dccg31_enable_symclk32_se +ffffffff820a4740 T dccg31_disable_symclk32_se +ffffffff820a4a10 T dccg31_enable_symclk32_le +ffffffff820a4bf0 T dccg31_disable_symclk32_le +ffffffff820a4d90 T dccg31_disable_dscclk +ffffffff820a4f50 T dccg31_enable_dscclk +ffffffff820a5120 T dccg31_set_physymclk +ffffffff820a5630 T dccg31_set_dtbclk_dto +ffffffff820a58e0 T dccg31_set_audio_dtbclk_dto +ffffffff820a59f0 T dccg31_get_dccg_ref_freq +ffffffff820a5a20 T dccg31_set_dispclk_change_mode +ffffffff820a5a70 T dccg31_init +ffffffff820a5fd0 T dccg31_otg_add_pixel +ffffffff820a6010 T dccg31_otg_drop_pixel +ffffffff820a6050 T dccg31_create +ffffffff820a7000 T dcn31_link_encoder_set_dio_phy_mux +ffffffff820a7390 T dcn31_link_encoder_construct +ffffffff820a7560 T dcn31_link_encoder_construct_minimal +ffffffff820a75e0 T dcn31_link_encoder_enable_dp_output +ffffffff820a7820 T dcn31_link_encoder_enable_dp_mst_output +ffffffff820a7a60 T dcn31_link_encoder_disable_output +ffffffff820a7cd0 T dcn31_link_encoder_is_in_alt_mode +ffffffff820a7e10 T dcn31_link_encoder_get_max_link_cap +ffffffff820a7f80 t enc31_hw_init +ffffffff820a8000 T dcn31_hpo_dp_link_enc_enable +ffffffff820a8160 T dcn31_hpo_dp_link_enc_disable +ffffffff820a81d0 T dcn31_hpo_dp_link_enc_set_link_test_pattern +ffffffff820a8b20 T dcn31_hpo_dp_link_enc_update_stream_allocation_table +ffffffff820a8da0 T dcn31_hpo_dp_link_enc_set_throttled_vcp_size +ffffffff820a9040 T dcn31_hpo_dp_link_enc_read_state +ffffffff820a92f0 T dcn31_hpo_dp_link_enc_enable_dp_output +ffffffff820a93f0 T dcn31_hpo_dp_link_enc_disable_output +ffffffff820a9530 T dcn31_hpo_dp_link_enc_set_ffe +ffffffff820a9620 T hpo_dp_link_encoder31_construct +ffffffff820a9680 t dcn31_hpo_dp_link_enc_is_in_alt_mode +ffffffff820aa000 T dcn31_hpo_dp_stream_encoder_construct +ffffffff820aa070 t dcn31_hpo_dp_stream_enc_enable_stream +ffffffff820aa1b0 t dcn31_hpo_dp_stream_enc_dp_unblank +ffffffff820aa460 t dcn31_hpo_dp_stream_enc_dp_blank +ffffffff820aa560 t dcn31_hpo_dp_stream_enc_disable +ffffffff820aa5d0 t dcn31_hpo_dp_stream_enc_set_stream_attribute +ffffffff820aae80 t dcn31_hpo_dp_stream_enc_update_dp_info_packets +ffffffff820ab040 t dcn31_hpo_dp_stream_enc_stop_dp_info_packets +ffffffff820ab1d0 t dcn31_hpo_dp_stream_enc_set_dsc_pps_info_packet +ffffffff820ab470 t dcn31_hpo_dp_stream_enc_map_stream_to_link +ffffffff820ab570 t dcn31_hpo_dp_stream_enc_mute_control +ffffffff820ab5e0 t dcn31_hpo_dp_stream_enc_audio_setup +ffffffff820ab690 t dcn31_hpo_dp_stream_enc_audio_enable +ffffffff820ab760 t dcn31_hpo_dp_stream_enc_audio_disable +ffffffff820ab910 t dcn31_hpo_dp_stream_enc_read_state +ffffffff820abaa0 t dcn31_set_hblank_min_symbol_width +ffffffff820ac000 T hubbub31_init_dchub_sys_ctx +ffffffff820ac1e0 T hubbub31_construct +ffffffff820ac280 t hubbub31_get_dcc_compression_cap +ffffffff820ac460 t hubbub31_get_dchub_ref_freq +ffffffff820ac540 t hubbub31_program_watermarks +ffffffff820ade60 t hubbub31_verify_allow_pstate_change_high +ffffffff820ae020 t dcn31_program_det_size +ffffffff820ae200 t dcn31_program_compbuf_size +ffffffff820ae480 t dcn31_init_crb +ffffffff820af000 T hubp31_set_unbounded_requesting +ffffffff820af090 T hubp31_soft_reset +ffffffff820af0e0 T hubp31_construct +ffffffff820af150 t hubp31_program_extended_blank +ffffffff820b0000 T dcn31_init_hw +ffffffff820b0930 T dcn31_dsc_pg_control +ffffffff820b0c80 T dcn31_enable_power_gating_plane +ffffffff820b0ee0 T dcn31_update_info_frame +ffffffff820b0fb0 T dcn31_z10_save_init +ffffffff820b1070 T dcn31_z10_restore +ffffffff820b1150 T dcn31_hubp_pg_control +ffffffff820b1470 T dcn31_init_sys_ctx +ffffffff820b1520 T dcn31_reset_hw_ctx_wrap +ffffffff820b18b0 T dcn31_setup_hpo_hw_control +ffffffff820b2000 T dcn31_hw_sequencer_construct +ffffffff820b3000 T optc31_immediate_disable_crtc +ffffffff820b3100 T optc31_set_drr +ffffffff820b3310 T optc3_init_odm +ffffffff820b3480 T dcn31_timing_generator_init +ffffffff820b34f0 t optc31_enable_crtc +ffffffff820b35f0 t optc31_disable_crtc +ffffffff820b36d0 t optc31_set_odm_combine +ffffffff820b4000 T dcn31_panel_cntl_construct +ffffffff820b4040 t dcn31_panel_cntl_destroy +ffffffff820b4090 t dcn31_panel_cntl_hw_init +ffffffff820b4180 t dcn31_is_panel_backlight_on +ffffffff820b4220 t dcn31_is_panel_powered_on +ffffffff820b42d0 t dcn31_store_backlight_level +ffffffff820b4390 t dcn31_get_16_bit_backlight_from_pwm +ffffffff820b5000 T dcn31_populate_dml_pipes_from_context +ffffffff820b5340 T dcn31_calculate_wm_and_dlg +ffffffff820b53b0 T dcn31_populate_dml_writeback_from_context +ffffffff820b5410 T dcn31_set_mcif_arb_params +ffffffff820b5470 T dcn31_validate_bandwidth +ffffffff820b5850 T dcn31_create_resource_pool +ffffffff820b6bc0 t dcn31_resource_destruct +ffffffff820b7220 t dcn31_destroy_resource_pool +ffffffff820b7280 t dcn31_panel_cntl_create +ffffffff820b72f0 t dcn31_link_encoder_create +ffffffff820b73a0 t dcn31_link_enc_create_minimal +ffffffff820b7440 t dcn31_get_panel_config_defaults +ffffffff820b74b0 t read_dce_straps +ffffffff820b74e0 t dcn31_create_audio +ffffffff820b7510 t dcn31_stream_encoder_create +ffffffff820b7690 t dcn31_hpo_dp_stream_encoder_create +ffffffff820b7850 t dcn31_hpo_dp_link_encoder_create +ffffffff820b78e0 t dcn31_hwseq_create +ffffffff820b8000 T vpg31_powerdown +ffffffff820b8090 T vpg31_poweron +ffffffff820b8120 T vpg31_construct +ffffffff820b9000 T dccg314_create +ffffffff820b90b0 t dccg314_set_dpstreamclk +ffffffff820b9470 t dccg314_set_dtbclk_dto +ffffffff820b9660 t dccg314_set_pixel_rate_div +ffffffff820b99d0 t dccg314_set_valid_pixel_rate +ffffffff820b9a40 t dccg314_dpp_root_clock_control +ffffffff820ba000 T dcn314_dio_stream_encoder_construct +ffffffff820ba070 t enc314_stream_encoder_hdmi_set_stream_attribute +ffffffff820ba670 t enc314_stream_encoder_dvi_set_stream_attribute +ffffffff820ba870 t enc314_stream_encoder_dp_blank +ffffffff820ba8c0 t enc314_stream_encoder_dp_unblank +ffffffff820bac00 t enc314_read_state +ffffffff820bad60 t enc314_dp_set_dsc_config +ffffffff820badb0 t enc314_dp_set_odm_combine +ffffffff820badf0 t enc314_set_dig_input_mode +ffffffff820bae40 t enc314_enable_fifo +ffffffff820baee0 t enc314_disable_fifo +ffffffff820baf30 t enc314_reset_fifo +ffffffff820bc000 T dcn314_update_odm +ffffffff820bc5f0 T dcn314_dsc_pg_control +ffffffff820bc9c0 T dcn314_enable_power_gating_plane +ffffffff820bcc50 T dcn314_calculate_dccg_k1_k2_values +ffffffff820bcde0 T dcn314_set_pixels_per_cycle +ffffffff820bced0 T dcn314_dpp_root_clock_control +ffffffff820bcf30 T dcn314_hubp_pg_control +ffffffff820be000 T dcn314_hw_sequencer_construct +ffffffff820bf000 T dcn314_timing_generator_init +ffffffff820bf070 t optc314_enable_crtc +ffffffff820bf170 t optc314_disable_crtc +ffffffff820bf250 t optc314_phantom_crtc_post_enable +ffffffff820bf310 t optc314_set_odm_bypass +ffffffff820bf480 t optc314_set_odm_combine +ffffffff820bf770 t optc314_set_h_timing_div_manual_mode +ffffffff820c0000 T dcn314_validate_bandwidth +ffffffff820c04c0 T dcn314_create_resource_pool +ffffffff820c1790 t dcn314_resource_destruct +ffffffff820c1df0 t dcn314_destroy_resource_pool +ffffffff820c1e50 t dcn31_panel_cntl_create +ffffffff820c1ec0 t dcn31_link_encoder_create +ffffffff820c1f70 t dcn31_link_enc_create_minimal +ffffffff820c2010 t dcn314_populate_dml_pipes_from_context +ffffffff820c20a0 t dcn314_update_bw_bounding_box +ffffffff820c20f0 t dcn314_get_panel_config_defaults +ffffffff820c2160 t read_dce_straps +ffffffff820c2190 t dcn31_create_audio +ffffffff820c21c0 t dcn314_stream_encoder_create +ffffffff820c2340 t dcn31_hpo_dp_stream_encoder_create +ffffffff820c2500 t dcn31_hpo_dp_link_encoder_create +ffffffff820c2590 t dcn314_hwseq_create +ffffffff820c3000 T dcn315_create_resource_pool +ffffffff820c4260 t dcn315_resource_destruct +ffffffff820c48c0 t dcn315_destroy_resource_pool +ffffffff820c4920 t dcn31_panel_cntl_create +ffffffff820c4990 t dcn31_link_encoder_create +ffffffff820c4a40 t dcn31_link_enc_create_minimal +ffffffff820c4ae0 t dcn315_populate_dml_pipes_from_context +ffffffff820c5170 t dcn315_get_panel_config_defaults +ffffffff820c51e0 t read_dce_straps +ffffffff820c5210 t dcn31_create_audio +ffffffff820c5240 t dcn315_stream_encoder_create +ffffffff820c53c0 t dcn31_hpo_dp_stream_encoder_create +ffffffff820c5580 t dcn31_hpo_dp_link_encoder_create +ffffffff820c5610 t dcn31_hwseq_create +ffffffff820c6000 T dcn316_create_resource_pool +ffffffff820c72a0 t dcn316_resource_destruct +ffffffff820c7900 t dcn316_destroy_resource_pool +ffffffff820c7960 t dcn31_panel_cntl_create +ffffffff820c79d0 t dcn31_link_encoder_create +ffffffff820c7a80 t dcn31_link_enc_create_minimal +ffffffff820c7b20 t dcn316_populate_dml_pipes_from_context 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mpc32_power_on_shaper_3dlut +ffffffff820dbc40 t mpc32_set3dlut_ram12 +ffffffff820dc000 T optc32_set_h_timing_div_manual_mode +ffffffff820dc040 T dcn32_timing_generator_init +ffffffff820dc0b0 t optc32_enable_crtc +ffffffff820dc1b0 t optc32_disable_crtc +ffffffff820dc290 t optc32_phantom_crtc_post_enable +ffffffff820dc350 t optc32_disable_phantom_otg +ffffffff820dc390 t optc32_set_drr +ffffffff820dc5e0 t optc32_set_odm_bypass +ffffffff820dc750 t optc32_set_odm_combine +ffffffff820dd000 T dcn32_panel_cntl_create +ffffffff820dd070 T dcn32_acquire_post_bldn_3dlut +ffffffff820dd160 T dcn32_release_post_bldn_3dlut +ffffffff820dd210 T dcn32_retain_phantom_pipes +ffffffff820dd2f0 T dcn32_remove_phantom_pipes +ffffffff820dd440 T dcn32_add_phantom_pipes +ffffffff820dd870 T dcn32_validate_bandwidth +ffffffff820ddd50 T dcn32_populate_dml_pipes_from_context +ffffffff820de140 T dcn32_calculate_wm_and_dlg +ffffffff820de1b0 T dcn32_create_resource_pool +ffffffff820de260 t dcn32_resource_construct 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dcn32_any_surfaces_rotated +ffffffff820f5570 T dcn32_determine_det_override +ffffffff820f58b0 T dcn32_set_det_allocations +ffffffff820f5a30 T dcn32_save_mall_state +ffffffff820f5ae0 T dcn32_restore_mall_state +ffffffff820f6000 T dcn321_link_encoder_construct +ffffffff820f7000 T dcn321_create_resource_pool +ffffffff820f70b0 t dcn321_resource_construct +ffffffff821025f0 t dcn321_mpc_create +ffffffff82106c60 t dcn321_dwbc_create +ffffffff82107690 t dcn321_mmhubbub_create +ffffffff82107b70 t dcn321_resource_destruct +ffffffff821081e0 t dcn321_destroy_resource_pool +ffffffff82108240 t dcn321_link_encoder_create +ffffffff82109310 t dcn321_update_bw_bounding_box +ffffffff82109360 t read_dce_straps +ffffffff82109390 t dcn321_create_audio +ffffffff82109730 t dcn321_stream_encoder_create +ffffffff8210b5c0 t dcn321_hpo_dp_stream_encoder_create +ffffffff8210c3c0 t dcn321_hpo_dp_link_encoder_create +ffffffff8210c840 t dcn321_hwseq_create +ffffffff8210cd30 t dcn321_vpg_create +ffffffff8210e000 T bw_int_to_fixed_nonconst +ffffffff8210e090 T bw_frc_to_fixed +ffffffff8210e260 T bw_floor2 +ffffffff8210e310 T bw_ceil2 +ffffffff8210e390 T bw_mul +ffffffff8210f000 T convert_to_custom_float_format +ffffffff82110000 T bw_calcs_init +ffffffff82110e60 T bw_calcs +ffffffff82112800 t calculate_bandwidth +ffffffff8211a000 T scaler_settings_calculation +ffffffff8211a350 T mode_support_and_system_configuration +ffffffff82120180 T display_pipe_configuration +ffffffff82120ab0 T dispclkdppclkdcfclk_deep_sleep_prefetch_parameters_watermarks_and_performance_calculation +ffffffff82126000 T dcn_bw_mod +ffffffff82126060 T dcn_bw_min2 +ffffffff821260a0 T dcn_bw_max +ffffffff821260d0 T dcn_bw_max2 +ffffffff82126110 T dcn_bw_floor2 +ffffffff821261b0 T dcn_bw_floor +ffffffff821261e0 T dcn_bw_ceil +ffffffff82126220 T dcn_bw_ceil2 +ffffffff821262d0 T dcn_bw_max3 +ffffffff82126350 T dcn_bw_max5 +ffffffff82126490 T dcn_bw_pow +ffffffff82126520 T dcn_bw_fabs +ffffffff82126560 T dcn_bw_log +ffffffff82127000 T swizzle_mode_to_macro_tile_size +ffffffff82127090 T dcn_validate_bandwidth +ffffffff82129300 T dcn_bw_sync_calcs_and_dml +ffffffff82129550 t dcn_bw_calc_rq_dlg_ttu +ffffffff82129d20 T dcn_find_dcfclk_suits_all +ffffffff8212a180 T dcn_bw_update_from_pplib_fclks +ffffffff8212a300 T dcn_bw_update_from_pplib_dcfclks +ffffffff8212a3d0 T dcn_get_soc_clks +ffffffff8212a450 T dcn_bw_notify_pplib_of_wm_ranges +ffffffff8212b000 T dcn20_populate_dml_writeback_from_context +ffffffff8212b180 T dcn20_fpu_set_wb_arb_params +ffffffff8212b330 T dcn20_calculate_dlg_params +ffffffff8212bb00 T dcn20_populate_dml_pipes_from_context +ffffffff8212c9a0 T dcn20_calculate_wm +ffffffff8212d190 T dcn20_update_bounding_box +ffffffff8212d410 T dcn20_cap_soc_clocks +ffffffff8212d770 T dcn20_patch_bounding_box +ffffffff8212d8e0 T dcn20_validate_bandwidth_fp +ffffffff8212da80 t dcn20_validate_bandwidth_internal +ffffffff8212de80 T dcn20_fpu_set_wm_ranges +ffffffff8212df20 T dcn20_fpu_adjust_dppclk +ffffffff8212dfc0 T dcn21_populate_dml_pipes_from_context +ffffffff8212e0d0 T dcn21_validate_bandwidth_fp +ffffffff8212eb50 T dcn21_update_bw_bounding_box +ffffffff8212ef60 T dcn21_clk_mgr_set_bw_params_wm_table +ffffffff8212efc0 T dcn201_populate_dml_writeback_from_context_fpu +ffffffff8212f2c0 t calculate_wm_set_for_vlevel +ffffffff82130000 T dml20_recalculate +ffffffff82130740 t dml20_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation +ffffffff82135bf0 T dml20_ModeSupportAndSystemConfigurationFull +ffffffff8213cfc0 t TruncToValidBPP +ffffffff8213d1a0 t CalculateVMAndRowBytes +ffffffff8213d860 t CalculatePrefetchSourceLines +ffffffff8213da30 t CalculateWriteBackDelay +ffffffff8213dd00 t CalculatePrefetchSchedule +ffffffff8213ebb0 t CalculateFlipSchedule +ffffffff8213ef80 t adjust_ReturnBW +ffffffff82140000 T dml20v2_recalculate +ffffffff82140740 t dml20v2_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation +ffffffff82145d80 T dml20v2_ModeSupportAndSystemConfigurationFull +ffffffff8214d060 t TruncToValidBPP +ffffffff8214d5f0 t CalculateVMAndRowBytes +ffffffff8214dcb0 t CalculatePrefetchSourceLines +ffffffff8214de80 t CalculateWriteBackDelay +ffffffff8214e150 t CalculateDelayAfterScaler +ffffffff8214e4b0 t CalculatePrefetchSchedule +ffffffff8214f1d0 t CalculateFlipSchedule +ffffffff8214f5a0 t adjust_ReturnBW +ffffffff82150000 T dml20_rq_dlg_get_rq_reg +ffffffff82150490 t dml20_rq_dlg_get_rq_params +ffffffff82150660 T dml20_rq_dlg_get_dlg_reg +ffffffff82152550 t get_surf_rq_param +ffffffff82152db0 t calculate_ttu_cursor +ffffffff82154000 T dml20v2_rq_dlg_get_rq_reg +ffffffff82154490 t dml20v2_rq_dlg_get_rq_params +ffffffff82154660 T dml20v2_rq_dlg_get_dlg_reg +ffffffff82156560 t get_surf_rq_param +ffffffff82156dc0 t calculate_ttu_cursor +ffffffff82158000 T dml21_recalculate +ffffffff82158710 t DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation +ffffffff8215def0 T dml21_ModeSupportAndSystemConfigurationFull +ffffffff821642d0 t TruncToValidBPP +ffffffff82164860 t CalculateDCFCLKDeepSleep +ffffffff82164ba0 t CalculateVMAndRowBytes +ffffffff82165400 t CalculatePrefetchSourceLines +ffffffff821655d0 t CalculateWriteBackDelay +ffffffff821658a0 t CalculatePrefetchSchedulePerPlane +ffffffff821660c0 t CalculateUrgentBurstFactor +ffffffff821664d0 t CalculateFlipSchedule +ffffffff821669b0 t CalculateWatermarksAndDRAMSpeedChangeSupport +ffffffff821679a0 t CalculatePrefetchSchedule +ffffffff8216a000 T dml21_rq_dlg_get_rq_reg +ffffffff8216a490 t dml_rq_dlg_get_rq_params +ffffffff8216a660 T dml21_rq_dlg_get_dlg_reg +ffffffff8216c930 t get_surf_rq_param +ffffffff8216d250 t calculate_ttu_cursor +ffffffff8216e000 T optc3_fpu_set_vrr_m_const +ffffffff8216e4a0 T dcn30_fpu_populate_dml_writeback_from_context +ffffffff8216e7b0 T dcn30_fpu_set_mcif_arb_params +ffffffff8216e920 T dcn30_fpu_update_soc_for_wm_a +ffffffff8216e9f0 T dcn30_fpu_calculate_wm_and_dlg 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dcn31_update_soc_for_wm_a +ffffffff8218c110 T dcn315_update_soc_for_wm_a +ffffffff8218c1e0 T dcn31_calculate_wm_and_dlg_fp +ffffffff8218c840 T dcn31_update_bw_bounding_box +ffffffff8218cc00 T dcn315_update_bw_bounding_box +ffffffff8218cf00 T dcn316_update_bw_bounding_box +ffffffff8218d2e0 T dcn_get_max_non_odm_pix_rate_100hz +ffffffff8218d340 T dcn_get_approx_det_segs_required_for_pstate +ffffffff8218e000 T dml31_recalculate +ffffffff8218e2d0 t DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation +ffffffff821951f0 T dml31_CalculateWriteBackDISPCLK +ffffffff82195360 t dml_max3 +ffffffff821953c0 T dml31_ModeSupportAndSystemConfigurationFull +ffffffff8219e2a0 t CalculateSwathAndDETConfiguration +ffffffff8219e900 t TruncToValidBPP +ffffffff8219eb50 t CalculateDCFCLKDeepSleep +ffffffff8219ee70 t CalculateVMAndRowBytes +ffffffff8219f4b0 t CalculatePrefetchSourceLines +ffffffff8219f680 t CalculateUrgentBurstFactor +ffffffff8219f910 t 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dcn32_predict_pipe_split +ffffffff821c35e0 T insert_entry_into_table_sorted +ffffffff821c3a30 T dcn32_set_phantom_stream_timing +ffffffff821c3cd0 t dcn32_split_stream_for_mpc_or_odm +ffffffff821c4080 T dcn32_calculate_wm_and_dlg_fpu +ffffffff821c5610 T dcn32_patch_dpm_table +ffffffff821c5820 T dcn32_update_bw_bounding_box_fpu +ffffffff821c6fb0 T dcn32_zero_pipe_dcc_fraction +ffffffff821c7010 T dcn32_allow_subvp_with_active_margin +ffffffff821c70e0 t subvp_drr_schedulable +ffffffff821c8000 T dml32_recalculate +ffffffff821cc300 T dml32_ModeSupportAndSystemConfigurationFull +ffffffff821d4000 T dml32_dscceComputeDelay +ffffffff821d4140 T dml32_dscComputeDelay +ffffffff821d4180 T IsVertical +ffffffff821d41b0 T dml32_CalculateSinglePipeDPPCLKAndSCLThroughput +ffffffff821d44d0 t dml_max3 +ffffffff821d4530 T dml32_CalculateBytePerPixelAndBlockSizes +ffffffff821d4860 T dml32_CalculateSwathAndDETConfiguration +ffffffff821d5090 T dml32_CalculateSwathWidth +ffffffff821d5950 T dml32_UnboundedRequest +ffffffff821d59c0 T dml32_CalculateDETBufferSize +ffffffff821d6000 T dml32_CalculateODMMode +ffffffff821d6780 T dml32_CalculateRequiredDispclk +ffffffff821d6940 T dml32_RoundToDFSGranularity +ffffffff821d69d0 T dml32_CalculateOutputLink +ffffffff821d7440 T dml32_TruncToValidBPP +ffffffff821d7780 T dml32_CalculateDPPCLK +ffffffff821d7920 T dml32_RequiredDTBCLK +ffffffff821d7b70 t dml_max4 +ffffffff821d7bf0 T dml32_DSCDelayRequirement +ffffffff821d80b0 T dml32_CalculateSurfaceSizeInMall +ffffffff821d8b70 T dml32_CalculateVMRowAndSwath +ffffffff821d9980 T dml32_CalculateVMAndRowBytes +ffffffff821da5d0 T dml32_CalculatePrefetchSourceLines +ffffffff821da820 T dml32_CalculateMALLUseForStaticScreen +ffffffff821da960 T dml32_CalculateRowBandwidth +ffffffff821daac0 T dml32_CalculateUrgentLatency +ffffffff821dab70 T dml32_CalculateUrgentBurstFactor +ffffffff821dae20 T dml32_CalculateDCFCLKDeepSleep +ffffffff821db170 T dml32_CalculateWriteBackDelay +ffffffff821db2d0 T dml32_UseMinimumDCFCLK +ffffffff821dc340 T dml32_CalculateExtraLatencyBytes +ffffffff821dc500 T dml32_CalculateTWait +ffffffff821dc5f0 T dml32_CalculateVUpdateAndDynamicMetadataParameters +ffffffff821dc850 T dml32_get_return_bw_mbps +ffffffff821dca10 T dml32_get_return_bw_mbps_vm_only +ffffffff821dcaf0 T dml32_CalculateExtraLatency +ffffffff821dcd10 T dml32_CalculatePrefetchSchedule +ffffffff821de2e0 T dml32_CalculateFlipSchedule +ffffffff821de840 T dml32_CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport +ffffffff821df960 T dml32_CalculateWriteBackDISPCLK +ffffffff821dfb30 T dml32_CalculateMinAndMaxPrefetchMode +ffffffff821dfb70 T dml32_CalculatePixelDeliveryTimes +ffffffff821dfff0 T dml32_CalculateMetaAndPTETimes +ffffffff821e0750 T dml32_CalculateVMGroupAndRequestTimes +ffffffff821e0c90 T dml32_CalculateDCCConfiguration +ffffffff821e12a0 T dml32_CalculateStutterEfficiency +ffffffff821e21c0 T dml32_CalculateMaxDETAndMinCompressedBufferSize +ffffffff821e22b0 T dml32_CalculateVActiveBandwithSupport +ffffffff821e2420 T dml32_CalculatePrefetchBandwithSupport +ffffffff821e26b0 T dml32_CalculateBandwidthAvailableForImmediateFlip +ffffffff821e2800 T dml32_CalculateImmediateFlipBandwithSupport +ffffffff821e2a80 T dml32_CalculateDETSwathFillLatencyHiding +ffffffff821e3000 T dml32_rq_dlg_get_rq_reg +ffffffff821e36a0 T dml32_rq_dlg_get_dlg_reg +ffffffff821e6000 T dcn321_insert_entry_into_table_sorted +ffffffff821e6450 T dcn321_update_bw_bounding_box_fpu +ffffffff821e8000 T dml_init_instance +ffffffff821e8310 T dml_get_status_message +ffffffff821e8350 T dml_log_pipe_params +ffffffff821e8380 T dml_log_mode_support_params +ffffffff821e9000 T dml_get_voltage_level +ffffffff821e9240 t fetch_socbb_params +ffffffff821e9720 t fetch_ip_params +ffffffff821e9bc0 t fetch_pipe_params +ffffffff821eac40 T PixelClockAdjustmentForProgressiveToInterlaceUnit +ffffffff821eacc0 T get_clk_dcf_deepsleep +ffffffff821eadd0 T get_wm_urgent +ffffffff821eaee0 T get_wm_memory_trip +ffffffff821eaff0 T get_wm_writeback_urgent +ffffffff821eb100 T get_wm_stutter_exit +ffffffff821eb210 T get_wm_stutter_enter_exit +ffffffff821eb320 T get_wm_z8_stutter_exit +ffffffff821eb430 T get_wm_z8_stutter_enter_exit +ffffffff821eb540 T get_stutter_efficiency_z8 +ffffffff821eb650 T get_stutter_num_bursts_z8 +ffffffff821eb760 T get_wm_dram_clock_change +ffffffff821eb870 T get_wm_writeback_dram_clock_change +ffffffff821eb980 T get_stutter_efficiency +ffffffff821eba90 T get_stutter_efficiency_no_vblank +ffffffff821ebba0 T get_stutter_period +ffffffff821ebcb0 T get_urgent_latency +ffffffff821ebdc0 T get_urgent_extra_latency +ffffffff821ebed0 T get_nonurgent_latency +ffffffff821ebfe0 T get_dram_clock_change_latency +ffffffff821ec0f0 T get_dispclk_calculated +ffffffff821ec200 T get_total_data_read_bw +ffffffff821ec310 T get_return_bw +ffffffff821ec420 T get_tcalc +ffffffff821ec530 T get_fraction_of_urgent_bandwidth +ffffffff821ec640 T get_fraction_of_urgent_bandwidth_imm_flip +ffffffff821ec750 T get_cstate_max_cap_mode +ffffffff821ec870 T get_comp_buffer_size_kbytes +ffffffff821ec980 T get_pixel_chunk_size_in_kbyte +ffffffff821ecaa0 T get_alpha_pixel_chunk_size_in_kbyte +ffffffff821ecbc0 T get_meta_chunk_size_in_kbyte +ffffffff821ecce0 T get_min_pixel_chunk_size_in_byte +ffffffff821ecdf0 T get_min_meta_chunk_size_in_byte +ffffffff821ecf10 T get_fclk_watermark +ffffffff821ed020 T get_usr_retraining_watermark +ffffffff821ed130 T get_comp_buffer_reserved_space_kbytes +ffffffff821ed250 T get_comp_buffer_reserved_space_64bytes +ffffffff821ed370 T get_comp_buffer_reserved_space_zs +ffffffff821ed490 T get_unbounded_request_enabled +ffffffff821ed5b0 T get_dsc_delay +ffffffff821ed6e0 T get_dppclk_calculated +ffffffff821ed800 T get_dscclk_calculated +ffffffff821ed920 T get_min_ttu_vblank +ffffffff821eda40 T get_min_ttu_vblank_in_us +ffffffff821edb60 T get_vratio_prefetch_l +ffffffff821edc80 T get_vratio_prefetch_c +ffffffff821edda0 T get_dst_x_after_scaler +ffffffff821edec0 T get_dst_y_after_scaler +ffffffff821edfe0 T get_dst_y_per_vm_vblank +ffffffff821ee100 T get_dst_y_per_row_vblank +ffffffff821ee220 T get_dst_y_prefetch +ffffffff821ee340 T get_dst_y_per_vm_flip +ffffffff821ee460 T get_dst_y_per_row_flip +ffffffff821ee580 T get_refcyc_per_vm_group_vblank +ffffffff821ee6a0 T get_refcyc_per_vm_group_flip +ffffffff821ee7c0 T get_refcyc_per_vm_req_vblank +ffffffff821ee8e0 T get_refcyc_per_vm_req_flip +ffffffff821eea00 T get_refcyc_per_vm_group_vblank_in_us +ffffffff821eeb20 T get_refcyc_per_vm_group_flip_in_us +ffffffff821eec40 T get_refcyc_per_vm_req_vblank_in_us +ffffffff821eed60 T get_refcyc_per_vm_req_flip_in_us +ffffffff821eee80 T get_refcyc_per_vm_dmdata_in_us +ffffffff821eefa0 T get_dmdata_dl_delta_in_us +ffffffff821ef0c0 T get_refcyc_per_line_delivery_l_in_us +ffffffff821ef1e0 T get_refcyc_per_line_delivery_c_in_us +ffffffff821ef300 T get_refcyc_per_line_delivery_pre_l_in_us +ffffffff821ef420 T get_refcyc_per_line_delivery_pre_c_in_us +ffffffff821ef540 T get_refcyc_per_req_delivery_l_in_us +ffffffff821ef660 T get_refcyc_per_req_delivery_c_in_us +ffffffff821ef780 T get_refcyc_per_req_delivery_pre_l_in_us +ffffffff821ef8a0 T get_refcyc_per_req_delivery_pre_c_in_us +ffffffff821ef9c0 T get_refcyc_per_cursor_req_delivery_in_us +ffffffff821efae0 T get_refcyc_per_cursor_req_delivery_pre_in_us +ffffffff821efc00 T get_refcyc_per_meta_chunk_nom_l_in_us +ffffffff821efd20 T get_refcyc_per_meta_chunk_nom_c_in_us +ffffffff821efe40 T get_refcyc_per_meta_chunk_vblank_l_in_us +ffffffff821eff60 T get_refcyc_per_meta_chunk_vblank_c_in_us +ffffffff821f0080 T get_refcyc_per_meta_chunk_flip_l_in_us +ffffffff821f01a0 T get_refcyc_per_meta_chunk_flip_c_in_us +ffffffff821f02c0 T get_vstartup +ffffffff821f03f0 T get_vupdate_offset +ffffffff821f0520 T get_vupdate_width +ffffffff821f0640 T get_vready_offset +ffffffff821f0760 T get_vready_at_or_after_vsync +ffffffff821f0890 T get_min_dst_y_next_start +ffffffff821f09c0 T get_dst_y_per_pte_row_nom_l +ffffffff821f0ae0 T get_dst_y_per_pte_row_nom_c +ffffffff821f0c00 T get_dst_y_per_meta_row_nom_l +ffffffff821f0d20 T get_dst_y_per_meta_row_nom_c +ffffffff821f0e40 T get_refcyc_per_pte_group_nom_l_in_us +ffffffff821f0f60 T get_refcyc_per_pte_group_nom_c_in_us +ffffffff821f1080 T get_refcyc_per_pte_group_vblank_l_in_us +ffffffff821f11a0 T get_refcyc_per_pte_group_vblank_c_in_us +ffffffff821f12c0 T get_refcyc_per_pte_group_flip_l_in_us +ffffffff821f13e0 T get_refcyc_per_pte_group_flip_c_in_us +ffffffff821f1500 T get_vstartup_calculated +ffffffff821f1630 T get_dpte_row_height_linear_c +ffffffff821f1760 T get_swath_height_l +ffffffff821f1890 T get_swath_height_c +ffffffff821f19c0 T get_det_stored_buffer_size_l_bytes +ffffffff821f1af0 T get_det_stored_buffer_size_c_bytes +ffffffff821f1c20 T get_dpte_group_size_in_bytes +ffffffff821f1d50 T get_vm_group_size_in_bytes +ffffffff821f1e80 T get_dpte_row_height_linear_l +ffffffff821f1fb0 T get_pte_buffer_mode +ffffffff821f20e0 T get_subviewport_lines_needed_in_mall +ffffffff821f2210 T get_total_immediate_flip_bytes +ffffffff821f2330 T get_total_immediate_flip_bw +ffffffff821f2510 T get_total_prefetch_bw +ffffffff821f26f0 T get_total_surface_size_in_mall_bytes +ffffffff821f2890 T get_det_buffer_size_kbytes +ffffffff821f29c0 T get_is_phantom_pipe +ffffffff821f2af0 T Calculate256BBlockSizes +ffffffff821f2be0 T CalculateMinAndMaxPrefetchMode +ffffffff821f2c60 T ModeSupportAndSystemConfiguration +ffffffff821f2f70 T CalculateWriteBackDISPCLK +ffffffff821f4000 T print__rq_params_st +ffffffff821f4030 T print__data_rq_sizing_params_st +ffffffff821f4060 T print__data_rq_dlg_params_st +ffffffff821f4090 T print__data_rq_misc_params_st +ffffffff821f40c0 T print__rq_dlg_params_st +ffffffff821f40f0 T print__dlg_sys_params_st +ffffffff821f4120 T print__data_rq_regs_st +ffffffff821f4150 T print__rq_regs_st +ffffffff821f4180 T print__dlg_regs_st +ffffffff821f41b0 T print__ttu_regs_st +ffffffff821f5000 T dml1_extract_rq_regs +ffffffff821f5330 T dml1_rq_dlg_get_rq_params +ffffffff821f5510 t get_surf_rq_param +ffffffff821f60c0 T dml1_rq_dlg_get_dlg_params +ffffffff821f9000 T _do_calc_rc_params +ffffffff821f9fc0 t get_qp_set +ffffffff821fb000 T dc_dsc_parse_dsc_dpcd +ffffffff821fb2a0 t dsc_throughput_from_dpcd +ffffffff821fb460 T dc_dsc_compute_bandwidth_range +ffffffff821fb630 t intersect_dsc_caps +ffffffff821fb800 t setup_dsc_config +ffffffff821fbf80 T dc_dsc_compute_config +ffffffff821fc080 T dc_dsc_stream_bandwidth_in_kbps +ffffffff821fc1d0 T dc_dsc_stream_bandwidth_overhead_in_kbps +ffffffff821fc310 T dc_dsc_get_policy_for_timing +ffffffff821fc3b0 T dc_dsc_policy_set_max_target_bpp_limit +ffffffff821fc3e0 T dc_dsc_policy_set_enable_dsc_when_not_needed +ffffffff821fc410 T dc_dsc_policy_set_disable_dsc_stream_overhead +ffffffff821fc440 t decide_dsc_target_bpp_x16 +ffffffff821fd000 T calc_rc_params +ffffffff821fe000 T dscc_compute_dsc_parameters +ffffffff821ff000 T dal_hw_factory_dce110_init +ffffffff821ff060 t define_hpd_registers +ffffffff821ff0b0 t define_ddc_registers +ffffffff82200000 T dal_hw_translate_dce110_init +ffffffff82200030 t offset_to_id +ffffffff82200390 t id_to_offset +ffffffff82201000 T dal_hw_factory_dce120_init +ffffffff82201060 t define_hpd_registers +ffffffff822010b0 t define_ddc_registers +ffffffff82202000 T dal_hw_translate_dce120_init +ffffffff82202030 t offset_to_id +ffffffff822023a0 t id_to_offset +ffffffff82203000 T dal_hw_factory_dce80_init +ffffffff82203060 t define_hpd_registers +ffffffff822030b0 t define_ddc_registers +ffffffff82204000 T dal_hw_translate_dce80_init +ffffffff82204030 t offset_to_id +ffffffff822047b0 t id_to_offset +ffffffff82205000 T dal_hw_factory_dcn10_init +ffffffff82205060 t define_hpd_registers +ffffffff822050b0 t define_ddc_registers +ffffffff82205150 t define_generic_registers +ffffffff82206000 T dal_hw_translate_dcn10_init +ffffffff82206030 t offset_to_id +ffffffff82206390 t id_to_offset +ffffffff82207000 T dal_hw_factory_dcn20_init +ffffffff82207060 t define_hpd_registers +ffffffff822070b0 t define_ddc_registers +ffffffff82207160 t define_generic_registers +ffffffff82208000 T dal_hw_translate_dcn20_init +ffffffff82208030 t offset_to_id +ffffffff822082b0 t id_to_offset +ffffffff82209000 T dal_hw_factory_dcn21_init +ffffffff82209060 t define_hpd_registers +ffffffff822090b0 t define_ddc_registers +ffffffff82209160 t define_generic_registers +ffffffff8220a000 T dal_hw_translate_dcn21_init +ffffffff8220a030 t offset_to_id +ffffffff8220a2b0 t id_to_offset +ffffffff8220b000 T dal_hw_factory_dcn30_init +ffffffff8220b060 t define_hpd_registers +ffffffff8220b0b0 t define_ddc_registers +ffffffff8220b160 t define_generic_registers +ffffffff8220c000 T dal_hw_translate_dcn30_init +ffffffff8220c030 t offset_to_id +ffffffff8220c2c0 t id_to_offset +ffffffff8220d000 T dal_hw_factory_dcn315_init +ffffffff8220d060 t define_hpd_registers +ffffffff8220d0b0 t define_ddc_registers +ffffffff8220d160 t define_generic_registers +ffffffff8220e000 T dal_hw_translate_dcn315_init +ffffffff8220e030 t offset_to_id +ffffffff8220e2b0 t id_to_offset +ffffffff8220f000 T dal_hw_factory_dcn32_init +ffffffff8220f060 t define_hpd_registers +ffffffff8220f0b0 t define_ddc_registers +ffffffff8220f160 t define_generic_registers +ffffffff82210000 T dal_hw_translate_dcn32_init +ffffffff82210030 t offset_to_id +ffffffff82210290 t id_to_offset +ffffffff82211000 T dal_gpio_open +ffffffff822110c0 T dal_gpio_open_ex +ffffffff82211180 T dal_gpio_get_value +ffffffff82211200 T dal_gpio_set_value +ffffffff82211280 T dal_gpio_get_mode +ffffffff822112b0 T dal_gpio_lock_pin +ffffffff822112d0 T dal_gpio_unlock_pin +ffffffff822112f0 T dal_gpio_change_mode +ffffffff82211370 T dal_gpio_get_id +ffffffff822113a0 T dal_gpio_get_enum +ffffffff822113d0 T dal_gpio_set_config +ffffffff82211450 T dal_gpio_get_pin_info +ffffffff822114b0 T dal_gpio_get_sync_source +ffffffff82211540 T dal_gpio_get_output_state +ffffffff82211570 T dal_gpio_get_ddc +ffffffff822115a0 T dal_gpio_get_hpd +ffffffff822115d0 T dal_gpio_get_generic +ffffffff82211600 T dal_gpio_close +ffffffff82211650 T dal_gpio_create +ffffffff822117e0 T dal_gpio_destroy +ffffffff82212000 T dal_gpio_service_create +ffffffff82212240 T dal_gpio_service_create_irq +ffffffff82212300 T dal_gpio_create_irq +ffffffff82212380 T dal_gpio_service_create_generic_mux +ffffffff82212420 T dal_gpio_destroy_generic_mux +ffffffff822124b0 T dal_gpio_get_generic_pin_info +ffffffff82212510 T dal_gpio_service_destroy +ffffffff82212640 T dal_mux_setup_config +ffffffff822126a0 T dal_gpio_service_lock +ffffffff82212720 T dal_gpio_service_unlock +ffffffff822127a0 T dal_gpio_service_open +ffffffff822129e0 T dal_gpio_service_close +ffffffff82212a80 T dal_irq_get_source +ffffffff82212af0 T dal_irq_get_rx_source +ffffffff82212b40 T dal_irq_setup_hpd_filter +ffffffff82212ba0 T dal_gpio_destroy_irq +ffffffff82212c30 T dal_gpio_create_ddc +ffffffff82212da0 T dal_gpio_destroy_ddc +ffffffff82212e70 T dal_ddc_close +ffffffff82212ec0 T dal_ddc_open +ffffffff82213020 T dal_ddc_change_mode +ffffffff822130c0 T dal_ddc_get_line +ffffffff822130e0 T dal_ddc_set_config +ffffffff82214000 T dal_hw_ddc_init +ffffffff82214100 T dal_hw_ddc_get_pin +ffffffff82214110 t dal_hw_ddc_destroy +ffffffff82214170 t set_config +ffffffff82215000 T dal_hw_factory_init +ffffffff82216000 T dal_hw_generic_init +ffffffff82216100 T dal_hw_generic_get_pin +ffffffff82216110 t dal_hw_generic_destroy +ffffffff82216170 t set_config +ffffffff82217000 T dal_hw_gpio_open +ffffffff822170b0 T dal_hw_gpio_config_mode +ffffffff822171a0 T dal_hw_gpio_get_value +ffffffff82217200 T dal_hw_gpio_set_value +ffffffff82217290 T dal_hw_gpio_change_mode +ffffffff822172a0 T dal_hw_gpio_close +ffffffff82217350 T dal_hw_gpio_construct +ffffffff822173b0 T dal_hw_gpio_destruct +ffffffff82218000 T dal_hw_hpd_init +ffffffff82218100 T dal_hw_hpd_get_pin +ffffffff82218110 t dal_hw_hpd_destroy +ffffffff82218170 t get_value +ffffffff82218210 t set_config +ffffffff82219000 T dal_hw_translate_init +ffffffff8221a000 T dc_process_hdcp_msg +ffffffff8221a180 t hdmi_14_process_transaction +ffffffff8221a2d0 t dp_11_process_transaction +ffffffff8221b000 T dal_irq_service_dummy_set +ffffffff8221b050 T dal_irq_service_dummy_ack +ffffffff8221b0a0 T dce110_vblank_set +ffffffff8221b170 T to_dal_irq_source_dce110 +ffffffff8221b2f0 T dal_irq_service_dce110_create +ffffffff8221b370 t hpd_ack +ffffffff8221c000 T dal_irq_service_dce120_create ffffffff8221c080 t hpd_ack -ffffffff8221d000 T dal_irq_service_dcn10_create +ffffffff8221d000 T dal_irq_service_dce80_create ffffffff8221d080 t hpd_ack -ffffffff8221d130 t to_dal_irq_source_dcn10 -ffffffff8221e000 T dal_irq_service_dcn20_create +ffffffff8221e000 T dal_irq_service_dcn10_create ffffffff8221e080 t hpd_ack -ffffffff8221e130 t to_dal_irq_source_dcn20 -ffffffff8221f000 T dal_irq_service_dcn201_create +ffffffff8221e130 t to_dal_irq_source_dcn10 +ffffffff8221f000 T dal_irq_service_dcn20_create ffffffff8221f080 t hpd_ack -ffffffff8221f130 t to_dal_irq_source_dcn201 -ffffffff82220000 T dal_irq_service_dcn21_create +ffffffff8221f130 t to_dal_irq_source_dcn20 +ffffffff82220000 T dal_irq_service_dcn201_create ffffffff82220080 t hpd_ack -ffffffff82220130 t to_dal_irq_source_dcn21 -ffffffff82221000 T dal_irq_service_dcn30_create +ffffffff82220130 t to_dal_irq_source_dcn201 +ffffffff82221000 T dal_irq_service_dcn21_create ffffffff82221080 t hpd_ack -ffffffff82221130 t to_dal_irq_source_dcn30 -ffffffff82222000 T dal_irq_service_dcn302_create +ffffffff82221130 t to_dal_irq_source_dcn21 +ffffffff82222000 T dal_irq_service_dcn30_create ffffffff82222080 t hpd_ack -ffffffff82222130 t to_dal_irq_source_dcn302 -ffffffff82223000 T dal_irq_service_dcn303_create +ffffffff82222130 t to_dal_irq_source_dcn30 +ffffffff82223000 T dal_irq_service_dcn302_create ffffffff82223080 t hpd_ack -ffffffff82223130 t to_dal_irq_source_dcn303 -ffffffff82224000 T dal_irq_service_dcn31_create +ffffffff82223130 t to_dal_irq_source_dcn302 +ffffffff82224000 T dal_irq_service_dcn303_create ffffffff82224080 t hpd_ack -ffffffff82224130 t to_dal_irq_source_dcn31 -ffffffff82225000 T dal_irq_service_dcn314_create +ffffffff82224130 t to_dal_irq_source_dcn303 +ffffffff82225000 T dal_irq_service_dcn31_create ffffffff82225080 t hpd_ack -ffffffff82225130 t to_dal_irq_source_dcn314 -ffffffff82226000 T dal_irq_service_dcn315_create +ffffffff82225130 t to_dal_irq_source_dcn31 +ffffffff82226000 T dal_irq_service_dcn314_create ffffffff82226080 t hpd_ack -ffffffff82226130 t to_dal_irq_source_dcn315 -ffffffff82227000 T dal_irq_service_dcn32_create +ffffffff82226130 t to_dal_irq_source_dcn314 +ffffffff82227000 T dal_irq_service_dcn315_create ffffffff82227080 t hpd_ack -ffffffff82227130 t to_dal_irq_source_dcn32 -ffffffff82228000 T dal_irq_service_construct -ffffffff82228070 T dal_irq_service_destroy -ffffffff82228100 T dal_irq_service_set_generic -ffffffff82228180 T dal_irq_service_set -ffffffff822282a0 T dal_irq_service_ack -ffffffff822283a0 T dal_irq_service_ack_generic -ffffffff82228410 T dal_irq_service_to_irq_source -ffffffff82229000 T dp_trace_init -ffffffff822290a0 T dp_trace_reset -ffffffff82229130 T dc_dp_trace_is_initialized -ffffffff82229160 T dp_trace_detect_lt_init -ffffffff822291b0 T dp_trace_commit_lt_init -ffffffff82229200 T dp_trace_link_loss_increment -ffffffff82229230 T dp_trace_lt_fail_count_update -ffffffff82229270 T dp_trace_lt_total_count_increment -ffffffff822292b0 T dc_dp_trace_set_is_logged_flag -ffffffff822292f0 T dc_dp_trace_is_logged -ffffffff82229330 T dp_trace_lt_result_update -ffffffff82229370 T dp_trace_set_lt_start_timestamp -ffffffff82229450 T dp_trace_set_lt_end_timestamp -ffffffff82229530 T dc_dp_trace_get_lt_end_timestamp -ffffffff82229570 T dc_dp_trace_get_lt_counts -ffffffff822295b0 T dc_dp_trace_get_link_loss_count -ffffffff822295e0 T dp_trace_set_edp_power_timestamp -ffffffff822296c0 T dp_trace_get_edp_poweron_timestamp -ffffffff822296f0 T dp_trace_get_edp_poweroff_timestamp -ffffffff8222a000 T set_dio_throttled_vcp_size -ffffffff8222a020 T setup_dio_stream_encoder -ffffffff8222a0e0 T reset_dio_stream_encoder -ffffffff8222a1a0 T setup_dio_stream_attribute -ffffffff8222a320 T enable_dio_dp_link_output -ffffffff8222a390 T disable_dio_link_output -ffffffff8222a3d0 T set_dio_dp_link_test_pattern -ffffffff8222a410 T set_dio_dp_lane_settings -ffffffff8222a450 T can_use_dio_link_hwss -ffffffff8222a490 T get_dio_link_hwss -ffffffff8222a4c0 t update_dio_stream_allocation_table -ffffffff8222b000 T can_use_dpia_link_hwss -ffffffff8222b050 T get_dpia_link_hwss -ffffffff8222b080 t update_dpia_stream_allocation_table -ffffffff8222c000 T can_use_hpo_dp_link_hwss -ffffffff8222c030 T get_hpo_dp_link_hwss -ffffffff8222c060 t set_hpo_dp_hblank_min_symbol_width -ffffffff8222c130 t set_hpo_dp_throttled_vcp_size -ffffffff8222c160 t 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-ffffffff82526890 T vmx_handle_intr -ffffffff82526920 T svm_handle_hlt -ffffffff82526970 T vmx_handle_hlt -ffffffff82526a20 T svm_handle_exit -ffffffff82526d40 T svm_handle_np_fault -ffffffff82526ee0 T vmm_handle_cpuid -ffffffff82527580 T svm_handle_msr -ffffffff82527850 T svm_handle_xsetbv -ffffffff825278f0 T svm_handle_inout -ffffffff825279f0 T vmm_inject_ud -ffffffff82527a20 T vmm_inject_db -ffffffff82527a50 T vmx_handle_np_fault -ffffffff82527bb0 T vmx_handle_inout -ffffffff82527d30 T vmx_handle_cr -ffffffff82527f30 T vmx_handle_rdmsr -ffffffff82528000 T vmx_handle_wrmsr -ffffffff82528270 T vmx_handle_xsetbv -ffffffff82528340 T vmm_inject_gp -ffffffff82528370 T vmx_get_exit_qualification -ffffffff825283d0 T vmx_get_guest_faulttype -ffffffff82528470 T svm_get_guest_faulttype -ffffffff825284a0 T svm_fault_page -ffffffff82528530 T vmx_fault_page -ffffffff82528680 T vmm_get_guest_cpu_mode -ffffffff82528780 T vmx_load_pdptes -ffffffff82528a00 T vmx_handle_cr0_write -ffffffff82528c10 T vmx_handle_cr4_write -ffffffff82528cb0 T vmm_handle_xsetbv -ffffffff82528d40 T vmx_handle_misc_enable_msr -ffffffff82528da0 T vmm_pat_is_valid -ffffffff82528e80 T vmm_gpa_is_valid -ffffffff82528ef0 T vmx_exit_reason_decode -ffffffff82528f30 T svm_exit_reason_decode -ffffffff82529d40 T vcpu_state_decode -ffffffff8252a000 T vmm_dispatch_intr -ffffffff8252a020 T vmxon -ffffffff8252a050 T vmxoff -ffffffff8252a080 T vmclear -ffffffff8252a0b0 T vmptrld -ffffffff8252a0e0 T vmptrst -ffffffff8252a110 T vmwrite -ffffffff8252a140 T vmread -ffffffff8252a170 T invvpid -ffffffff8252a18b t invvpid_fail -ffffffff8252a192 t invvpid_ret -ffffffff8252a1b0 T invept -ffffffff8252a1cb t invept_fail -ffffffff8252a1d2 t invept_ret -ffffffff8252a1f0 T vmx_enter_guest -ffffffff8252a21b t skip_init -ffffffff8252a2e8 t no_l1df_msr -ffffffff8252a2eb t l1df_tlb_loop -ffffffff8252a304 t l1df_tlb_done -ffffffff8252a30c t l1df_load_cache -ffffffff8252a323 t done_flush -ffffffff8252a3b6 t do_resume -ffffffff8252a43b t fail_launch_or_resume -ffffffff8252a47d t fail_launch_unknown -ffffffff8252a48a t fail_launch_invalid_vmcs -ffffffff8252a497 t fail_launch_valid_vmcs -ffffffff8252a4b4 t vmx_exit_handler_asm -ffffffff8252a579 t restore_host -ffffffff8252a610 T svm_enter_guest -ffffffff8252a7a0 t restore_host_svm -ffffffff8252b000 T sdmmc_match -ffffffff8252b050 T sdmmc_attach -ffffffff8252b390 T sdmmc_detach -ffffffff8252b440 T sdmmc_activate -ffffffff8252b510 T sdmmc_discover_task -ffffffff8252b5d0 T sdmmc_create_thread -ffffffff8252b640 T sdmmc_holds_root_device -ffffffff8252b6a0 T sdmmc_task_thread -ffffffff8252b890 T sdmmc_needs_discover -ffffffff8252b940 T sdmmc_del_task -ffffffff8252b9f0 T sdmmc_card_detach -ffffffff8252bad0 T sdmmc_add_task -ffffffff8252bb50 T sdmmc_card_attach -ffffffff8252bc60 T sdmmc_enable -ffffffff8252bdb0 T sdmmc_scan -ffffffff8252be40 T sdmmc_init -ffffffff8252bf40 T sdmmc_disable -ffffffff8252c0a0 T sdmmc_function_free -ffffffff8252c0c0 T sdmmc_delay -ffffffff8252c110 T sdmmc_select_card -ffffffff8252c330 T sdmmc_set_bus_power -ffffffff8252c4e0 T sdmmc_function_alloc -ffffffff8252c570 T sdmmc_app_command -ffffffff8252c700 T sdmmc_mmc_command -ffffffff8252c780 T sdmmc_go_idle_state -ffffffff8252c890 T sdmmc_send_if_cond -ffffffff8252c9e0 T sdmmc_set_relative_addr -ffffffff8252d000 T sdmmc_cisptr -ffffffff8252d0a0 T sdmmc_read_cis -ffffffff8252d3e0 T sdmmc_print_cis -ffffffff8252d550 T sdmmc_check_cis_quirks -ffffffff8252e000 T sdmmc_io_enable -ffffffff8252e2a0 T sdmmc_io_reset -ffffffff8252e3d0 T sdmmc_io_send_op_cond -ffffffff8252e540 T sdmmc_io_scan -ffffffff8252e690 T sdmmc_io_init -ffffffff8252e7c0 T sdmmc_io_set_highspeed -ffffffff8252ea60 T sdmmc_io_set_bus_width -ffffffff8252ecf0 T sdmmc_io_function_ready -ffffffff8252ee70 T sdmmc_io_read_1 -ffffffff8252efc0 T sdmmc_io_function_enable -ffffffff8252f390 T sdmmc_io_write_1 -ffffffff8252f510 T sdmmc_io_function_disable -ffffffff8252f790 T sdmmc_io_attach -ffffffff8252f880 T sdmmc_print -ffffffff8252fad0 T sdmmc_submatch -ffffffff8252fb50 T sdmmc_io_detach -ffffffff8252fc00 T sdmmc_io_rw_direct -ffffffff8252fda0 T sdmmc_io_rw_extended_subr -ffffffff8252ff40 T sdmmc_io_rw_extended -ffffffff82530340 T sdmmc_io_read_2 -ffffffff825304a0 T sdmmc_io_write_2 -ffffffff82530600 T sdmmc_io_read_4 -ffffffff82530760 T sdmmc_io_write_4 -ffffffff825308c0 T sdmmc_io_read_multi_1 -ffffffff825309b0 T sdmmc_io_write_multi_1 -ffffffff82530aa0 T sdmmc_io_read_region_1 -ffffffff82530b90 T sdmmc_io_write_region_1 -ffffffff82530c80 T sdmmc_io_xchg -ffffffff82530e10 T sdmmc_intr_enable -ffffffff82531080 T sdmmc_intr_disable -ffffffff825312f0 T sdmmc_intr_establish -ffffffff825313f0 T sdmmc_intr_disestablish -ffffffff825314e0 T sdmmc_card_intr -ffffffff82531530 T sdmmc_intr_task -ffffffff825315c0 T sdmmc_io_set_blocklen -ffffffff82532000 T sdmmc_mem_enable -ffffffff82532450 T sdmmc_mem_send_op_cond -ffffffff82532600 T sdmmc_mem_signal_voltage -ffffffff825326c0 T sdmmc_mem_scan -ffffffff825329d0 T sdmmc_decode_csd -ffffffff82532e00 T sdmmc_decode_cid -ffffffff825332a0 T sdmmc_mem_send_scr -ffffffff825333e0 T sdmmc_mem_decode_scr -ffffffff82533440 T sdmmc_mem_send_cxd_data -ffffffff825335b0 T sdmmc_mem_set_bus_width -ffffffff825336c0 T sdmmc_mem_sd_switch -ffffffff82533970 T sdmmc_be512_to_bitfield512 -ffffffff82533a20 T sdmmc_mem_mmc_switch -ffffffff82533b10 T sdmmc_mem_init -ffffffff82533c60 T sdmmc_mem_set_blocklen -ffffffff82533d60 T sdmmc_mem_sd_init -ffffffff82534140 T sdmmc_mem_mmc_init -ffffffff82534800 T sdmmc_mem_select_transfer_mode -ffffffff82534880 T sdmmc_mem_execute_tuning -ffffffff82534910 T sdmmc_mem_read_block_subr -ffffffff82534c70 T sdmmc_mem_single_read_block -ffffffff82534d40 T sdmmc_mem_read_block -ffffffff82534ef0 T sdmmc_mem_write_block_subr -ffffffff82535240 T sdmmc_mem_single_write_block -ffffffff82535310 T sdmmc_mem_write_block -ffffffff825354c0 T sdmmc_mem_hibernate_write -ffffffff82536000 T sdmmc_scsi_cmd -ffffffff825361f0 T sdmmc_minphys -ffffffff82536270 T sdmmc_scsi_attach -ffffffff82536460 T sdmmc_alloc_ccbs -ffffffff825365a0 T sdmmc_free_ccbs -ffffffff82536600 T sdmmc_scsi_detach -ffffffff82536760 T sdmmc_stimeout -ffffffff825367e0 T sdmmc_ccb_alloc -ffffffff82536890 T sdmmc_ccb_free -ffffffff82536970 T sdmmc_inquiry -ffffffff82536be0 T sdmmc_start_xs -ffffffff82536cd0 T sdmmc_complete_xs -ffffffff82536da0 T sdmmc_done_xs -ffffffff82536df0 T sdmmc_scsi_hibernate_io -ffffffff82537000 T bwfm_sdio_preinit -ffffffff825374a0 T bwfm_sdio_txcheck -ffffffff825374e0 T bwfm_sdio_txdata -ffffffff82537550 T bwfm_sdio_txctl -ffffffff825376a0 T bwfm_sdio_buscore_read -ffffffff825376b0 T bwfm_sdio_buscore_write -ffffffff825376d0 T bwfm_sdio_buscore_prepare -ffffffff82537810 T bwfm_sdio_buscore_activate -ffffffff82537890 T bwfm_sdio_match -ffffffff82537940 T bwfm_sdio_attach -ffffffff82537c00 T bwfm_sdio_detach -ffffffff82537c60 T bwfm_sdio_task -ffffffff82537dc0 T bwfm_sdio_write_1 -ffffffff82537df0 T bwfm_sdio_read_1 -ffffffff82537e20 T bwfm_sdio_write_4 -ffffffff82537ed0 T bwfm_sdio_read_4 -ffffffff82537f80 T bwfm_sdio_load_microcode -ffffffff825381e0 T bwfm_sdio_clkctl -ffffffff82538310 T bwfm_sdio_dev_write -ffffffff82538360 T bwfm_sdio_intr -ffffffff825383a0 T bwfm_sdio_ram_read_write -ffffffff825385d0 T bwfm_sdio_htclk -ffffffff82538840 T bwfm_sdio_readshared -ffffffff82538910 T bwfm_sdio_dev_read -ffffffff82538950 T bwfm_sdio_rx_frames -ffffffff82538d00 T bwfm_sdio_tx_frames -ffffffff82538e00 T bwfm_sdio_backplane -ffffffff82538eb0 T bwfm_sdio_buf_read -ffffffff82538f90 T bwfm_sdio_buf_write -ffffffff82539040 T bwfm_sdio_frame_read_write -ffffffff825391c0 T bwfm_sdio_newbuf -ffffffff82539240 T bwfm_sdio_tx_ok -ffffffff825392a0 T bwfm_sdio_tx_ctrlframe -ffffffff825393a0 T bwfm_sdio_tx_dataframe -ffffffff825394f0 T bwfm_sdio_rx_glom -ffffffff8253a000 T onewire_match -ffffffff8253a050 T onewire_attach -ffffffff8253a0f0 T onewire_detach -ffffffff8253a160 T onewire_activate -ffffffff8253a180 T onewire_scan -ffffffff8253a3a0 T onewire_createthread -ffffffff8253a410 T onewire_print -ffffffff8253a4e0 T onewirebus_print -ffffffff8253a530 T onewire_lock -ffffffff8253a550 T onewire_unlock -ffffffff8253a570 T onewire_reset -ffffffff8253a590 T onewire_bit -ffffffff8253a5b0 T onewire_read_byte -ffffffff8253a6f0 T onewire_write_byte -ffffffff8253a7d0 T onewire_read_block -ffffffff8253a870 T onewire_write_block -ffffffff8253a910 T onewire_triplet -ffffffff8253a9f0 T onewire_matchrom -ffffffff8253ab40 T onewire_search -ffffffff8253aee0 T onewire_thread -ffffffff8253b000 T onewire_crc -ffffffff8253b0b0 T onewire_crc16 -ffffffff8253b170 T onewire_famname -ffffffff8253b1b0 T onewire_matchbyfam -ffffffff8253c000 T owid_match -ffffffff8253c030 T owid_attach -ffffffff8253c100 T owid_detach -ffffffff8253c140 T owid_activate -ffffffff8253d000 T owsbm_match -ffffffff8253d030 T owsbm_attach -ffffffff8253d1d0 T owsbm_detach -ffffffff8253d240 T owsbm_activate -ffffffff8253d270 T owsbm_update -ffffffff8253e000 T owtemp_match -ffffffff8253e030 T owtemp_attach -ffffffff8253e130 T owtemp_detach -ffffffff8253e1a0 T owtemp_activate -ffffffff8253e1d0 T owtemp_update -ffffffff8253f000 T owctr_match -ffffffff8253f030 T owctr_attach -ffffffff8253f180 T owctr_detach -ffffffff8253f1f0 T owctr_activate -ffffffff8253f220 T owctr_update -ffffffff8253f250 T owctr_update_counter -ffffffff82540000 A __text_page_start -ffffffff82540000 T Xsyscall_meltdown -ffffffff8254000c T Xsyscall -ffffffff8254026e t Xsyscall_trampback -ffffffff82540280 T intr_user_exit -ffffffff825402c2 t intr_user_exit_post_ast -ffffffff825403ee t Xiretq_trampback -ffffffff825403fa T doreti_iret -ffffffff82541000 T alltraps -ffffffff82541138 T recall_trap -ffffffff82541150 T alltraps_kern -ffffffff82541153 T alltraps_kern_meltdown -ffffffff82542000 ? Xsyscall32 -ffffffff82542000 A __kutext_start -ffffffff82542000 A __text_page_end -ffffffff82543000 ? Xtrap00 -ffffffff82543010 ? Xtrap01 -ffffffff82543020 ? Xtrap02 -ffffffff82543028 c calltrap_specstk -ffffffff825430f0 ? calltrap_specstk_tramp -ffffffff82543110 ? Xtrap03 -ffffffff82543120 ? Xtrap04 -ffffffff82543130 ? Xtrap05 -ffffffff82543140 ? Xtrap06 -ffffffff82543150 ? Xtrap07 -ffffffff82543160 ? Xtrap08 -ffffffff82543170 ? Xtrap09 -ffffffff82543180 ? Xtrap0a -ffffffff82543190 ? Xtrap0b -ffffffff825431a0 ? Xtrap0c -ffffffff825431b0 ? Xtrap0d -ffffffff82543240 ? Xtrap0e -ffffffff82543250 ? Xintrspurious -ffffffff82543250 ? Xtrap0f -ffffffff82543260 ? Xtrap10 -ffffffff82543270 ? Xtrap11 -ffffffff82543280 ? Xtrap12 -ffffffff82543290 ? Xtrap13 -ffffffff825432a0 ? Xtrap14 -ffffffff825432b0 ? Xtrap15 -ffffffff825432c0 ? Xtrap16 -ffffffff825432c0 ? Xtrap17 -ffffffff825432c0 ? Xtrap18 -ffffffff825432c0 ? Xtrap19 -ffffffff825432c0 ? Xtrap1a -ffffffff825432c0 ? Xtrap1b -ffffffff825432c0 ? Xtrap1c -ffffffff825432c0 ? Xtrap1d -ffffffff825432c0 ? Xtrap1e -ffffffff825432c0 ? Xtrap1f -ffffffff825432d0 ? x2apic_eoi -ffffffff825432f0 ? Xintr_lapic_ipi -ffffffff82543330 ? Xipi_invltlb -ffffffff82543360 ? Xipi_invlpg -ffffffff82543390 ? Xipi_invlrange -ffffffff825433d0 ? Xipi_invltlb_pcid -ffffffff82543410 ? Xipi_invlpg_pcid -ffffffff82543460 ? Xipi_invlrange_pcid -ffffffff825434d0 ? Xintr_lapic_ltimer -ffffffff82543510 ? Xintr_xen_upcall -ffffffff82543550 ? Xintr_hyperv_upcall -ffffffff82543590 ? Xintr_legacy0 -ffffffff825435d0 ? Xintr_legacy1 -ffffffff82543610 ? Xintr_legacy2 -ffffffff82543650 ? Xintr_legacy3 -ffffffff82543690 ? Xintr_legacy4 -ffffffff825436d0 ? Xintr_legacy5 -ffffffff82543710 ? Xintr_legacy6 -ffffffff82543750 ? Xintr_legacy7 -ffffffff82543790 ? Xintr_legacy8 -ffffffff825437d0 ? Xintr_legacy9 -ffffffff82543810 ? Xintr_legacy10 -ffffffff82543850 ? Xintr_legacy11 -ffffffff82543890 ? Xintr_legacy12 -ffffffff825438d0 ? Xintr_legacy13 -ffffffff82543910 ? Xintr_legacy14 -ffffffff82543950 ? Xintr_legacy15 -ffffffff82543990 ? Xintr_ioapic_edge0 -ffffffff825439d0 ? Xintr_ioapic_edge1 -ffffffff82543a10 ? Xintr_ioapic_edge2 -ffffffff82543a50 ? Xintr_ioapic_edge3 -ffffffff82543a90 ? Xintr_ioapic_edge4 -ffffffff82543ad0 ? Xintr_ioapic_edge5 -ffffffff82543b10 ? Xintr_ioapic_edge6 -ffffffff82543b50 ? Xintr_ioapic_edge7 -ffffffff82543b90 ? Xintr_ioapic_edge8 -ffffffff82543bd0 ? Xintr_ioapic_edge9 -ffffffff82543c10 ? Xintr_ioapic_edge10 -ffffffff82543c50 ? Xintr_ioapic_edge11 -ffffffff82543c90 ? Xintr_ioapic_edge12 -ffffffff82543cd0 ? Xintr_ioapic_edge13 -ffffffff82543d10 ? Xintr_ioapic_edge14 -ffffffff82543d50 ? Xintr_ioapic_edge15 -ffffffff82543d90 ? Xintr_ioapic_edge16 -ffffffff82543dd0 ? Xintr_ioapic_edge17 -ffffffff82543e10 ? Xintr_ioapic_edge18 -ffffffff82543e50 ? Xintr_ioapic_edge19 -ffffffff82543e90 ? Xintr_ioapic_edge20 -ffffffff82543ed0 ? Xintr_ioapic_edge21 -ffffffff82543f10 ? Xintr_ioapic_edge22 -ffffffff82543f50 ? Xintr_ioapic_edge23 -ffffffff82543f90 ? Xintr_ioapic_edge24 -ffffffff82543fd0 ? Xintr_ioapic_edge25 -ffffffff82544010 ? Xintr_ioapic_edge26 -ffffffff82544050 ? Xintr_ioapic_edge27 -ffffffff82544090 ? Xintr_ioapic_edge28 -ffffffff825440d0 ? Xintr_ioapic_edge29 -ffffffff82544110 ? Xintr_ioapic_edge30 -ffffffff82544150 ? Xintr_ioapic_edge31 -ffffffff82544190 ? Xintr_ioapic_edge32 -ffffffff825441d0 ? Xintr_ioapic_edge33 -ffffffff82544210 ? Xintr_ioapic_edge34 -ffffffff82544250 ? Xintr_ioapic_edge35 -ffffffff82544290 ? Xintr_ioapic_edge36 -ffffffff825442d0 ? Xintr_ioapic_edge37 -ffffffff82544310 ? Xintr_ioapic_edge38 -ffffffff82544350 ? Xintr_ioapic_edge39 -ffffffff82544390 ? Xintr_ioapic_edge40 -ffffffff825443d0 ? Xintr_ioapic_edge41 -ffffffff82544410 ? Xintr_ioapic_edge42 -ffffffff82544450 ? Xintr_ioapic_edge43 -ffffffff82544490 ? Xintr_ioapic_edge44 -ffffffff825444d0 ? Xintr_ioapic_edge45 -ffffffff82544510 ? Xintr_ioapic_edge46 -ffffffff82544550 ? Xintr_ioapic_edge47 -ffffffff82544590 ? Xintr_ioapic_edge48 -ffffffff825445d0 ? Xintr_ioapic_edge49 -ffffffff82544610 ? Xintr_ioapic_edge50 -ffffffff82544650 ? Xintr_ioapic_edge51 -ffffffff82544690 ? Xintr_ioapic_edge52 -ffffffff825446d0 ? Xintr_ioapic_edge53 -ffffffff82544710 ? Xintr_ioapic_edge54 -ffffffff82544750 ? Xintr_ioapic_edge55 -ffffffff82544790 ? Xintr_ioapic_edge56 -ffffffff825447d0 ? Xintr_ioapic_edge57 -ffffffff82544810 ? Xintr_ioapic_edge58 -ffffffff82544850 ? Xintr_ioapic_edge59 -ffffffff82544890 ? Xintr_ioapic_edge60 -ffffffff825448d0 ? Xintr_ioapic_edge61 -ffffffff82544910 ? Xintr_ioapic_edge62 -ffffffff82544950 ? Xintr_ioapic_edge63 -ffffffff82544990 ? Xintr_ioapic_level0 -ffffffff825449d0 ? Xintr_ioapic_level1 -ffffffff82544a10 ? Xintr_ioapic_level2 -ffffffff82544a50 ? Xintr_ioapic_level3 -ffffffff82544a90 ? Xintr_ioapic_level4 -ffffffff82544ad0 ? Xintr_ioapic_level5 -ffffffff82544b10 ? Xintr_ioapic_level6 -ffffffff82544b50 ? Xintr_ioapic_level7 -ffffffff82544b90 ? Xintr_ioapic_level8 -ffffffff82544bd0 ? Xintr_ioapic_level9 -ffffffff82544c10 ? Xintr_ioapic_level10 -ffffffff82544c50 ? Xintr_ioapic_level11 -ffffffff82544c90 ? Xintr_ioapic_level12 -ffffffff82544cd0 ? Xintr_ioapic_level13 -ffffffff82544d10 ? Xintr_ioapic_level14 -ffffffff82544d50 ? Xintr_ioapic_level15 -ffffffff82544d90 ? Xintr_ioapic_level16 -ffffffff82544dd0 ? Xintr_ioapic_level17 -ffffffff82544e10 ? Xintr_ioapic_level18 -ffffffff82544e50 ? Xintr_ioapic_level19 -ffffffff82544e90 ? Xintr_ioapic_level20 -ffffffff82544ed0 ? Xintr_ioapic_level21 -ffffffff82544f10 ? Xintr_ioapic_level22 -ffffffff82544f50 ? Xintr_ioapic_level23 -ffffffff82544f90 ? Xintr_ioapic_level24 -ffffffff82544fd0 ? Xintr_ioapic_level25 -ffffffff82545010 ? Xintr_ioapic_level26 -ffffffff82545050 ? Xintr_ioapic_level27 -ffffffff82545090 ? Xintr_ioapic_level28 -ffffffff825450d0 ? Xintr_ioapic_level29 -ffffffff82545110 ? Xintr_ioapic_level30 -ffffffff82545150 ? Xintr_ioapic_level31 -ffffffff82545190 ? Xintr_ioapic_level32 -ffffffff825451d0 ? Xintr_ioapic_level33 -ffffffff82545210 ? Xintr_ioapic_level34 -ffffffff82545250 ? Xintr_ioapic_level35 -ffffffff82545290 ? Xintr_ioapic_level36 -ffffffff825452d0 ? Xintr_ioapic_level37 -ffffffff82545310 ? Xintr_ioapic_level38 -ffffffff82545350 ? Xintr_ioapic_level39 -ffffffff82545390 ? Xintr_ioapic_level40 -ffffffff825453d0 ? Xintr_ioapic_level41 -ffffffff82545410 ? Xintr_ioapic_level42 -ffffffff82545450 ? Xintr_ioapic_level43 -ffffffff82545490 ? Xintr_ioapic_level44 -ffffffff825454d0 ? Xintr_ioapic_level45 -ffffffff82545510 ? Xintr_ioapic_level46 -ffffffff82545550 ? Xintr_ioapic_level47 -ffffffff82545590 ? Xintr_ioapic_level48 -ffffffff825455d0 ? Xintr_ioapic_level49 -ffffffff82545610 ? Xintr_ioapic_level50 -ffffffff82545650 ? Xintr_ioapic_level51 -ffffffff82545690 ? Xintr_ioapic_level52 -ffffffff825456d0 ? Xintr_ioapic_level53 -ffffffff82545710 ? Xintr_ioapic_level54 -ffffffff82545750 ? Xintr_ioapic_level55 -ffffffff82545790 ? Xintr_ioapic_level56 -ffffffff825457d0 ? Xintr_ioapic_level57 -ffffffff82545810 ? Xintr_ioapic_level58 -ffffffff82545850 ? Xintr_ioapic_level59 -ffffffff82545890 ? Xintr_ioapic_level60 -ffffffff825458d0 ? Xintr_ioapic_level61 -ffffffff82545910 ? Xintr_ioapic_level62 -ffffffff82545950 ? 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dp_trace_set_lt_start_timestamp +ffffffff8222a450 T dp_trace_set_lt_end_timestamp +ffffffff8222a530 T dc_dp_trace_get_lt_end_timestamp +ffffffff8222a570 T dc_dp_trace_get_lt_counts +ffffffff8222a5b0 T dc_dp_trace_get_link_loss_count +ffffffff8222a5e0 T dp_trace_set_edp_power_timestamp +ffffffff8222a6c0 T dp_trace_get_edp_poweron_timestamp +ffffffff8222a6f0 T dp_trace_get_edp_poweroff_timestamp +ffffffff8222b000 T set_dio_throttled_vcp_size +ffffffff8222b020 T setup_dio_stream_encoder +ffffffff8222b0e0 T reset_dio_stream_encoder +ffffffff8222b1a0 T setup_dio_stream_attribute +ffffffff8222b320 T enable_dio_dp_link_output +ffffffff8222b390 T disable_dio_link_output +ffffffff8222b3d0 T set_dio_dp_link_test_pattern +ffffffff8222b410 T set_dio_dp_lane_settings +ffffffff8222b450 T can_use_dio_link_hwss +ffffffff8222b490 T get_dio_link_hwss +ffffffff8222b4c0 t update_dio_stream_allocation_table +ffffffff8222c000 T can_use_dpia_link_hwss +ffffffff8222c050 T get_dpia_link_hwss +ffffffff8222c080 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amdgpu_dpm_send_hbm_bad_channel_flag +ffffffff8224c580 T amdgpu_dpm_get_dpm_freq_range +ffffffff8224c620 T amdgpu_dpm_set_soft_freq_range +ffffffff8224c6c0 T amdgpu_dpm_write_watermarks_table +ffffffff8224c740 T amdgpu_dpm_wait_for_event +ffffffff8224c7d0 T amdgpu_dpm_set_residency_gfxoff +ffffffff8224c850 T amdgpu_dpm_get_residency_gfxoff +ffffffff8224c8d0 T amdgpu_dpm_get_entrycount_gfxoff +ffffffff8224c950 T amdgpu_dpm_get_status_gfxoff +ffffffff8224c9d0 T amdgpu_dpm_get_thermal_throttling_counter +ffffffff8224ca20 T amdgpu_dpm_gfx_state_change +ffffffff8224ca90 T amdgpu_dpm_get_ecc_info +ffffffff8224cb10 T amdgpu_dpm_get_vce_clock_state +ffffffff8224cba0 T amdgpu_dpm_get_current_power_state +ffffffff8224cc10 T amdgpu_dpm_set_power_state +ffffffff8224cd70 T amdgpu_dpm_dispatch_task +ffffffff8224ce10 T amdgpu_dpm_get_performance_level +ffffffff8224cea0 T amdgpu_dpm_force_performance_level +ffffffff8224d080 T amdgpu_dpm_get_pp_num_states +ffffffff8224d110 T amdgpu_dpm_get_pp_table +ffffffff8224d1a0 T amdgpu_dpm_set_fine_grain_clk_vol +ffffffff8224d240 T amdgpu_dpm_odn_edit_dpm_table +ffffffff8224d2e0 T amdgpu_dpm_print_clock_levels +ffffffff8224d370 T amdgpu_dpm_emit_clock_levels +ffffffff8224d410 T amdgpu_dpm_set_ppfeature_status +ffffffff8224d4a0 T amdgpu_dpm_get_ppfeature_status +ffffffff8224d530 T amdgpu_dpm_force_clock_level +ffffffff8224d5c0 T amdgpu_dpm_get_sclk_od +ffffffff8224d640 T amdgpu_dpm_set_sclk_od +ffffffff8224d7c0 T amdgpu_dpm_get_mclk_od +ffffffff8224d840 T amdgpu_dpm_set_mclk_od +ffffffff8224d9c0 T amdgpu_dpm_get_power_profile_mode +ffffffff8224da50 T amdgpu_dpm_set_power_profile_mode +ffffffff8224daf0 T amdgpu_dpm_get_gpu_metrics +ffffffff8224db80 T amdgpu_dpm_get_fan_control_mode +ffffffff8224dc10 T amdgpu_dpm_set_fan_speed_pwm +ffffffff8224dca0 T amdgpu_dpm_get_fan_speed_pwm +ffffffff8224dd30 T amdgpu_dpm_get_fan_speed_rpm +ffffffff8224ddc0 T amdgpu_dpm_set_fan_speed_rpm +ffffffff8224de50 T amdgpu_dpm_set_fan_control_mode +ffffffff8224dee0 T amdgpu_dpm_get_power_limit +ffffffff8224df90 T amdgpu_dpm_set_power_limit +ffffffff8224e020 T amdgpu_dpm_is_cclk_dpm_supported +ffffffff8224e090 T amdgpu_dpm_debugfs_print_current_performance_level +ffffffff8224e120 T amdgpu_dpm_get_smu_prv_buf_details +ffffffff8224e1c0 T amdgpu_dpm_is_overdrive_supported +ffffffff8224e230 T amdgpu_dpm_set_pp_table +ffffffff8224e2d0 T amdgpu_dpm_get_num_cpu_cores +ffffffff8224e320 T amdgpu_dpm_stb_debug_fs_init +ffffffff8224e370 T amdgpu_dpm_display_configuration_change +ffffffff8224e400 T amdgpu_dpm_get_clock_by_type +ffffffff8224e4a0 T amdgpu_dpm_get_display_mode_validation_clks +ffffffff8224e530 T amdgpu_dpm_get_clock_by_type_with_latency +ffffffff8224e5d0 T amdgpu_dpm_get_clock_by_type_with_voltage +ffffffff8224e670 T amdgpu_dpm_set_watermarks_for_clocks_ranges +ffffffff8224e700 T amdgpu_dpm_display_clock_voltage_request +ffffffff8224e790 T amdgpu_dpm_get_current_clocks +ffffffff8224e820 T amdgpu_dpm_notify_smu_enable_pwe +ffffffff8224e8a0 T amdgpu_dpm_set_active_display_count +ffffffff8224e930 T amdgpu_dpm_set_min_deep_sleep_dcefclk +ffffffff8224e9c0 T amdgpu_dpm_set_hard_min_dcefclk_by_freq +ffffffff8224ea60 T amdgpu_dpm_set_hard_min_fclk_by_freq +ffffffff8224eb00 T amdgpu_dpm_display_disable_memory_clock_switch +ffffffff8224eb90 T amdgpu_dpm_get_max_sustainable_clocks_by_dc +ffffffff8224ec20 T amdgpu_dpm_get_uclk_dpm_states +ffffffff8224ecc0 T amdgpu_dpm_get_dpm_clock_table +ffffffff8224f000 T amdgpu_dpm_get_active_displays +ffffffff8224f0a0 T amdgpu_dpm_get_vblank_time +ffffffff8224f150 T amdgpu_dpm_get_vrefresh +ffffffff82250000 T amdgpu_pm_sysfs_init +ffffffff82250030 T amdgpu_pm_sysfs_fini +ffffffff82250060 T amdgpu_debugfs_pm_init +ffffffff82251000 T amdgpu_dpm_print_class_info +ffffffff822512b0 T amdgpu_dpm_print_cap_info +ffffffff82251340 T amdgpu_dpm_print_ps_status +ffffffff822513d0 T amdgpu_pm_print_power_states +ffffffff82251460 T amdgpu_get_platform_caps +ffffffff82251500 T amdgpu_parse_extended_power_table +ffffffff822522d0 t amdgpu_parse_clk_voltage_dep_table +ffffffff82252380 T amdgpu_free_extended_power_table +ffffffff82252490 T amdgpu_add_thermal_controller +ffffffff822528d0 T amdgpu_get_vce_clock_state +ffffffff82252910 T amdgpu_legacy_dpm_compute_clocks +ffffffff82252da0 T amdgpu_dpm_thermal_work_handler +ffffffff82253000 t pp_early_init +ffffffff82253100 t pp_late_init +ffffffff82253220 t pp_sw_init +ffffffff822532b0 t pp_sw_fini +ffffffff82253340 t pp_hw_init +ffffffff822533a0 t pp_hw_fini +ffffffff82253410 t pp_late_fini +ffffffff82253470 t pp_suspend +ffffffff822534c0 t pp_resume +ffffffff822534e0 t pp_is_idle +ffffffff82253510 t pp_wait_for_idle +ffffffff82253540 t pp_sw_reset +ffffffff82253570 t pp_set_clockgating_state +ffffffff822535a0 t pp_set_powergating_state +ffffffff822535d0 t pp_dpm_set_fan_control_mode +ffffffff82253640 t pp_dpm_get_fan_control_mode +ffffffff822536b0 t pp_dpm_set_fan_speed_pwm +ffffffff82253710 t pp_dpm_get_fan_speed_pwm +ffffffff82253770 t pp_dpm_force_clock_level +ffffffff822537d0 t pp_dpm_print_clock_levels +ffffffff82253830 t pp_dpm_emit_clock_levels +ffffffff82253890 t pp_dpm_force_performance_level +ffffffff82253930 t pp_dpm_get_sclk_od +ffffffff82253990 t pp_dpm_set_sclk_od +ffffffff822539f0 t pp_dpm_get_mclk_od +ffffffff82253a50 t pp_dpm_set_mclk_od +ffffffff82253ab0 t pp_dpm_read_sensor +ffffffff82253b70 t pp_dpm_get_performance_level +ffffffff82253bb0 t pp_dpm_get_current_power_state +ffffffff82253c30 t pp_dpm_get_fan_speed_rpm +ffffffff82253c90 t pp_dpm_set_fan_speed_rpm +ffffffff82253cf0 t pp_dpm_get_pp_num_states +ffffffff82253e30 t pp_dpm_get_pp_table +ffffffff82253e80 t pp_dpm_set_pp_table +ffffffff82253fb0 t pp_dpm_switch_power_profile +ffffffff822540f0 t pp_dpm_get_vce_clock_state +ffffffff82254140 t pp_dpm_dispatch_tasks +ffffffff82254180 t pp_dpm_load_fw +ffffffff822541f0 t pp_dpm_fw_loading_complete +ffffffff82254220 t pp_set_powergating_by_smu +ffffffff822543a0 t pp_set_clockgating_by_smu +ffffffff82254410 t pp_set_power_limit +ffffffff822544d0 t pp_get_power_limit +ffffffff82254570 t pp_get_power_profile_mode +ffffffff822545d0 t pp_set_power_profile_mode +ffffffff82254630 t pp_set_fine_grain_clk_vol +ffffffff82254690 t pp_odn_edit_dpm_table +ffffffff822546f0 t pp_dpm_set_mp1_state +ffffffff82254750 t pp_smu_i2c_bus_access +ffffffff822547b0 t pp_gfx_state_change_set +ffffffff82254810 t pp_dpm_get_sclk +ffffffff82254860 t pp_dpm_get_mclk +ffffffff822548b0 t pp_display_configuration_change +ffffffff82254900 t pp_get_display_power_level +ffffffff82254940 t pp_get_current_clocks +ffffffff82254a60 t pp_get_clock_by_type +ffffffff82254ab0 t pp_get_clock_by_type_with_latency +ffffffff82254b00 t pp_get_clock_by_type_with_voltage +ffffffff82254b50 t pp_set_watermarks_for_clocks_ranges +ffffffff82254b90 t pp_display_clock_voltage_request +ffffffff82254bd0 t pp_get_display_mode_validation_clocks +ffffffff82254c30 t pp_notify_smu_enable_pwe +ffffffff82254c90 t pp_enable_mgpu_fan_boost +ffffffff82254cf0 t pp_set_active_display_count +ffffffff82254d30 t pp_set_hard_min_dcefclk_by_freq +ffffffff82254d90 t pp_set_hard_min_fclk_by_freq +ffffffff82254df0 t pp_set_min_deep_sleep_dcefclk +ffffffff82254e50 t pp_get_asic_baco_capability +ffffffff82254ec0 t pp_get_asic_baco_state +ffffffff82254f20 t pp_set_asic_baco_state +ffffffff82254f90 t pp_get_ppfeature_status +ffffffff82254ff0 t pp_set_ppfeature_status +ffffffff82255040 t pp_asic_reset_mode_2 +ffffffff822550a0 t pp_set_df_cstate +ffffffff82255100 t pp_set_xgmi_pstate +ffffffff82255160 t pp_get_gpu_metrics +ffffffff822551c0 t pp_get_prv_buffer_details +ffffffff82255240 t pp_pm_compute_clocks +ffffffff82255310 t pp_swctf_delayed_work_handler +ffffffff82255450 t __delayed_work_tick +ffffffff82256000 T ci_baco_set_state +ffffffff82257000 T baco_program_registers +ffffffff822570d0 t baco_cmd_handler +ffffffff82257250 T soc15_baco_program_registers +ffffffff82258000 T fiji_baco_set_state +ffffffff82259000 T phm_setup_asic +ffffffff82259050 T phm_power_down_asic +ffffffff822590a0 T phm_set_power_state +ffffffff82259110 T phm_enable_dynamic_state_management +ffffffff822591c0 T phm_disable_dynamic_state_management +ffffffff82259260 T phm_force_dpm_levels +ffffffff822592b0 T phm_apply_state_adjust_rules +ffffffff82259300 T phm_apply_clock_adjust_rules +ffffffff82259350 T phm_powerdown_uvd +ffffffff822593a0 T phm_disable_clock_power_gatings +ffffffff822593f0 T phm_pre_display_configuration_changed +ffffffff82259450 T phm_display_configuration_changed +ffffffff822594b0 T phm_notify_smc_display_config_after_ps_adjustment +ffffffff82259510 T phm_stop_thermal_controller +ffffffff82259570 T phm_register_irq_handlers +ffffffff822595c0 T phm_start_thermal_controller +ffffffff82259710 T phm_check_smc_update_required_for_display_configuration +ffffffff82259770 T phm_check_states_equal +ffffffff822597c0 T phm_store_dal_configuration_data +ffffffff82259910 T phm_get_dal_power_level +ffffffff82259970 T phm_set_cpu_power_state +ffffffff822599c0 T phm_get_performance_level +ffffffff82259a20 T phm_get_clock_info +ffffffff82259b90 T phm_get_current_shallow_sleep_clocks +ffffffff82259be0 T phm_get_clock_by_type +ffffffff82259c30 T phm_get_clock_by_type_with_latency +ffffffff82259c80 T phm_get_clock_by_type_with_voltage +ffffffff82259cd0 T phm_set_watermarks_for_clocks_ranges +ffffffff82259d20 T phm_display_clock_voltage_request +ffffffff82259d70 T phm_get_max_high_clocks +ffffffff82259dc0 T phm_disable_smc_firmware_ctf +ffffffff82259e20 T phm_set_active_display_count +ffffffff8225a000 T hwmgr_early_init +ffffffff8225a460 t polaris_set_asic_special_caps +ffffffff8225a4e0 T hwmgr_sw_init +ffffffff8225a550 T hwmgr_sw_fini +ffffffff8225a5a0 T hwmgr_hw_init +ffffffff8225a760 T hwmgr_hw_fini +ffffffff8225a820 T hwmgr_suspend +ffffffff8225a8a0 T hwmgr_resume +ffffffff8225a940 T hwmgr_handle_task +ffffffff8225b000 T polaris_baco_set_state +ffffffff8225c000 T pp_override_get_default_fuse_value +ffffffff8225d000 T psm_init_power_state_table +ffffffff8225d2a0 T psm_fini_power_state_table +ffffffff8225d360 T psm_set_boot_states +ffffffff8225d410 T psm_set_performance_states +ffffffff8225d4c0 T psm_set_user_performance_state +ffffffff8225d550 T psm_adjust_power_state_dynamic +ffffffff8225e000 T atomctrl_initialize_mc_reg_table +ffffffff8225e210 T atomctrl_initialize_mc_reg_table_v2_2 +ffffffff8225e420 T atomctrl_set_engine_dram_timings_rv770 +ffffffff8225e490 T atomctrl_get_memory_pll_dividers_si +ffffffff8225e570 T atomctrl_get_memory_pll_dividers_vi +ffffffff8225e5f0 T atomctrl_get_memory_pll_dividers_ai +ffffffff8225e6a0 T atomctrl_get_engine_pll_dividers_kong +ffffffff8225e720 T atomctrl_get_engine_pll_dividers_vi +ffffffff8225e7f0 T atomctrl_get_engine_pll_dividers_ai +ffffffff8225e8d0 T atomctrl_get_dfs_pll_dividers_vi +ffffffff8225e990 T atomctrl_get_reference_clock +ffffffff8225e9f0 T atomctrl_is_voltage_controlled_by_gpio_v3 +ffffffff8225eab0 T atomctrl_get_voltage_table_v3 +ffffffff8225ec10 T atomctrl_get_pp_assign_pin +ffffffff8225ecf0 T atomctrl_calculate_voltage_evv_on_sclk +ffffffff8225f0c0 t GetScaledFraction +ffffffff8225f150 t fDecodeLeakageID +ffffffff8225f1b0 t fSqrt +ffffffff8225f230 T atomctrl_get_voltage_evv_on_sclk +ffffffff8225f2b0 T atomctrl_get_voltage_evv +ffffffff8225f360 T atomctrl_get_mpll_reference_clock +ffffffff8225f3d0 T atomctrl_is_asic_internal_ss_supported +ffffffff8225f420 T atomctrl_get_memory_clock_spread_spectrum +ffffffff8225f520 T atomctrl_get_engine_clock_spread_spectrum +ffffffff8225f620 T atomctrl_read_efuse +ffffffff8225f6d0 T atomctrl_set_ac_timing_ai +ffffffff8225f730 T atomctrl_get_voltage_evv_on_sclk_ai +ffffffff8225f7b0 T atomctrl_get_smc_sclk_range_table +ffffffff8225f860 T atomctrl_get_vddc_shared_railinfo +ffffffff8225f8d0 T atomctrl_get_avfs_information +ffffffff8225fa60 T atomctrl_get_svi2_info +ffffffff8225fb40 T atomctrl_get_leakage_id_from_efuse +ffffffff8225fba0 T atomctrl_get_leakage_vddc_base_on_leakage +ffffffff8225fd40 T atomctrl_get_voltage_range +ffffffff8225fe00 T atomctrl_get_edc_hilo_leakage_offset_table +ffffffff8225fe80 T atomctrl_get_edc_leakage_table +ffffffff82260000 T pp_atomfwctrl_is_voltage_controlled_by_gpio_v4 +ffffffff822600c0 T pp_atomfwctrl_get_voltage_table_v4 +ffffffff82260280 T pp_atomfwctrl_get_pp_assign_pin +ffffffff82260360 T pp_atomfwctrl_enter_self_refresh +ffffffff82260390 T pp_atomfwctrl_get_gpu_pll_dividers_vega10 +ffffffff82260440 T pp_atomfwctrl_get_avfs_information +ffffffff82260780 T pp_atomfwctrl_get_gpio_information +ffffffff82260820 T pp_atomfwctrl_get_clk_information_by_clkid +ffffffff822608b0 T pp_atomfwctrl_get_vbios_bootup_values +ffffffff82260c30 T pp_atomfwctrl_get_smc_dpm_information +ffffffff82261000 T encode_pcie_lane_width +ffffffff82261030 T decode_pcie_lane_width +ffffffff82262000 t pp_tables_v1_0_initialize +ffffffff82263450 t pp_tables_v1_0_uninitialize +ffffffff82263600 T get_number_of_powerplay_table_entries_v1_0 +ffffffff822636b0 T get_powerplay_table_entry_v1_0 +ffffffff82264000 T pp_tables_get_response_times +ffffffff822640d0 T pp_tables_get_num_of_entries +ffffffff82264190 T pp_tables_get_entry +ffffffff822644a0 t init_non_clock_fields +ffffffff822645e0 t pp_tables_initialize +ffffffff82265760 t pp_tables_uninitialize +ffffffff82265960 t get_number_of_vce_state_table_entries +ffffffff82265a50 t get_vce_state_table_entry +ffffffff82266000 T smu10_init_function_pointers +ffffffff82266040 t smu10_hwmgr_backend_init +ffffffff822666e0 t smu10_hwmgr_backend_fini +ffffffff82266820 t smu10_setup_asic_task +ffffffff82266890 t smu10_get_power_state_size +ffffffff822668c0 t smu10_apply_state_adjust_rules +ffffffff822668f0 t smu10_dpm_force_dpm_level +ffffffff82266e70 t smu10_enable_dpm_tasks +ffffffff82266f30 t smu10_disable_dpm_tasks +ffffffff82266f60 t smu10_dpm_patch_boot_state +ffffffff82266f90 t smu10_dpm_get_pp_table_entry +ffffffff82266ff0 t smu10_dpm_get_num_of_pp_table_entries +ffffffff82267040 t smu10_powergate_vcn +ffffffff822670e0 t smu10_dpm_get_mclk +ffffffff82267140 t smu10_dpm_get_sclk +ffffffff82267190 t smu10_set_power_state_tasks +ffffffff82267200 t smu10_set_cpu_power_state +ffffffff82267230 t smu10_store_cc6_data +ffffffff822672a0 t smu10_get_dal_power_level +ffffffff822672d0 t smu10_get_performance_level +ffffffff82267370 t smu10_get_current_shallow_sleep_clocks +ffffffff822673d0 t smu10_get_clock_by_type_with_latency +ffffffff82267520 t smu10_get_clock_by_type_with_voltage +ffffffff82267630 t smu10_set_watermarks_for_clocks_ranges +ffffffff82267700 t smu10_display_clock_voltage_request +ffffffff822677a0 t smu10_get_max_high_clocks +ffffffff822677d0 t smu10_power_off_asic +ffffffff82267820 t smu10_force_clock_level +ffffffff822679e0 t smu10_print_clock_levels +ffffffff82267dd0 t smu10_gfx_off_control +ffffffff82267ee0 t smu10_read_sensor +ffffffff82268070 t smu10_set_active_display_count +ffffffff822680d0 t smu10_set_min_deep_sleep_dcefclk +ffffffff82268130 t smu10_get_power_profile_mode +ffffffff82268170 t smu10_set_power_profile_mode +ffffffff822682a0 t smu10_set_fine_grain_clk_vol +ffffffff822684b0 t smu10_powergate_mmhub +ffffffff822684d0 t smu10_smus_notify_pwe +ffffffff822684f0 t smu10_powergate_sdma +ffffffff82268510 t smu10_set_hard_min_dcefclk_by_freq +ffffffff82268570 t smu10_set_hard_min_fclk_by_freq +ffffffff822685d0 t smu10_set_hard_min_gfxclk_by_freq +ffffffff82268630 t smu10_set_soft_max_gfxclk_by_freq +ffffffff82268690 t smu10_asic_reset +ffffffff822686b0 t smu10_gfx_state_change +ffffffff822686f0 t smu10_dpm_get_pp_table_entry_callback +ffffffff82269000 T smu7_baco_get_capability +ffffffff82269060 T smu7_baco_get_state +ffffffff822690b0 T smu7_baco_set_state +ffffffff8226a000 T smu7_powerdown_uvd +ffffffff8226a050 T smu7_disable_clock_power_gating +ffffffff8226a0e0 T smu7_powergate_uvd +ffffffff8226a1d0 T smu7_powergate_vce +ffffffff8226a2c0 T smu7_update_clock_gatings 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fiji_is_hw_avfs_present +ffffffff822ac360 t fiji_update_dpm_settings +ffffffff822ac750 t fiji_program_memory_timing_parameters +ffffffff822ac920 t fiji_populate_smc_acp_level +ffffffff822aca60 t fiji_populate_smc_uvd_level +ffffffff822acc10 t fiji_populate_smc_boot_level +ffffffff822acce0 t fiji_populate_smc_initailial_state +ffffffff822acd90 t fiji_populate_bapm_parameters_in_dpm_table +ffffffff822ad0a0 t fiji_populate_clock_stretcher_data_table +ffffffff822ad640 t fiji_populate_vr_config +ffffffff822ad700 t fiji_init_arb_table_index +ffffffff822ad780 t fiji_populate_pm_fuses +ffffffff822ad9e0 t fiji_setup_dpm_led_config +ffffffff822adab0 t fiji_get_dependency_volt_by_clk +ffffffff822ae000 t iceland_smu_init +ffffffff822ae090 t iceland_start_smu +ffffffff822ae3f0 t iceland_request_smu_load_specific_fw +ffffffff822ae420 t iceland_process_firmware_header +ffffffff822ae590 t iceland_update_sclk_threshold +ffffffff822ae7e0 t iceland_thermal_setup_fan_table +ffffffff822aea60 t iceland_init_smc_table +ffffffff822af4b0 t iceland_populate_all_graphic_levels +ffffffff822afa40 t iceland_populate_all_memory_levels +ffffffff822b0250 t iceland_initialize_mc_reg_table +ffffffff822b0de0 t iceland_get_offsetof +ffffffff822b0e60 t iceland_get_mac_definition +ffffffff822b0ec0 t iceland_is_dpm_running +ffffffff822b0f10 t iceland_program_memory_timing_parameters +ffffffff822b10d0 t iceland_populate_smc_boot_level +ffffffff822b11d0 t iceland_populate_smc_initial_state +ffffffff822b1280 t iceland_populate_bapm_parameters_in_dpm_table +ffffffff822b13f0 t iceland_populate_smc_svi2_config +ffffffff822b1490 t iceland_populate_initial_mc_reg_table +ffffffff822b16f0 t iceland_populate_pm_fuses +ffffffff822b1a20 t iceland_populate_smc_voltage_table +ffffffff822b2000 t polaris10_smu_init +ffffffff822b2090 t polaris10_start_smu +ffffffff822b2640 t polaris10_update_smc_table +ffffffff822b28b0 t polaris10_process_firmware_header +ffffffff822b2a00 t polaris10_update_sclk_threshold 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polaris10_populate_avfs_parameters +ffffffff822b5fd0 t polaris10_populate_vr_config +ffffffff822b6100 t polaris10_populate_pm_fuses +ffffffff822b6360 t polaris10_get_dependency_volt_by_clk +ffffffff822b6530 t polaris10_calculate_sclk_params +ffffffff822b7000 t smu10_smu_init +ffffffff822b7130 t smu10_smu_fini +ffffffff822b71c0 t smu10_start_smu +ffffffff822b7270 t smu10_read_arg_from_smc +ffffffff822b72d0 t smu10_send_msg_to_smc +ffffffff822b7520 t smu10_send_msg_to_smc_with_parameter +ffffffff822b77c0 t smu10_smc_table_manager +ffffffff822b8000 T smu7_copy_bytes_from_smc +ffffffff822b8250 T smu7_read_smc_sram_dword +ffffffff822b8340 T smu7_copy_bytes_to_smc +ffffffff822b8630 T smu7_program_jump_on_start +ffffffff822b8680 T smu7_is_smc_ram_running +ffffffff822b8700 T smu7_send_msg_to_smc +ffffffff822b87c0 T smu7_send_msg_to_smc_with_parameter +ffffffff822b88b0 T smu7_get_argument +ffffffff822b88d0 T smu7_send_msg_to_smc_offset +ffffffff822b88f0 T smu7_convert_fw_type_to_cgs +ffffffff822b89c0 T smu7_write_smc_sram_dword +ffffffff822b8ab0 T smu7_request_smu_load_fw +ffffffff822b9430 T smu7_check_fw_load_finish +ffffffff822b9490 T smu7_reload_firmware +ffffffff822b94b0 T smu7_upload_smu_firmware_image +ffffffff822b9650 T smu7_setup_pwr_virus +ffffffff822b9a20 T smu7_init +ffffffff822b9b40 T smu7_smu_fini +ffffffff822ba000 t smu8_smu_init +ffffffff822ba2c0 t smu8_smu_fini +ffffffff822ba360 t smu8_start_smu +ffffffff822bb420 t smu8_check_fw_load_finish +ffffffff822bb510 t smu8_get_argument +ffffffff822bb560 t smu8_send_msg_to_smc +ffffffff822bb570 t smu8_send_msg_to_smc_with_parameter +ffffffff822bb770 t smu8_download_pptable_settings +ffffffff822bb850 t smu8_upload_pptable_settings +ffffffff822bb920 t smu8_is_dpm_running +ffffffff822bc000 T smu9_is_smc_ram_running +ffffffff822bc050 T smu9_send_msg_to_smc +ffffffff822bc190 t smu9_wait_for_response +ffffffff822bc290 t smu9_send_msg_to_smc_without_waiting +ffffffff822bc330 T smu9_send_msg_to_smc_with_parameter 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t tonga_start_smu +ffffffff822be420 t tonga_update_smc_table +ffffffff822be5c0 t tonga_process_firmware_header +ffffffff822be710 t tonga_update_sclk_threshold +ffffffff822be960 t tonga_thermal_setup_fan_table +ffffffff822bebe0 t tonga_init_smc_table +ffffffff822bfa30 t tonga_populate_all_graphic_levels +ffffffff822bffd0 t tonga_populate_all_memory_levels +ffffffff822c06d0 t tonga_initialize_mc_reg_table +ffffffff822c1260 t tonga_get_offsetof +ffffffff822c12f0 t tonga_get_mac_definition +ffffffff822c1350 t tonga_is_dpm_running +ffffffff822c13a0 t tonga_update_dpm_settings +ffffffff822c1790 t tonga_program_memory_timing_parameters +ffffffff822c1950 t tonga_populate_smc_acp_level +ffffffff822c1ad0 t tonga_populate_smc_uvd_level +ffffffff822c1cc0 t tonga_populate_smc_boot_level +ffffffff822c1df0 t tonga_populate_bapm_parameters_in_dpm_table +ffffffff822c1f50 t tonga_populate_clock_stretcher_data_table +ffffffff822c2610 t tonga_populate_vr_config +ffffffff822c26e0 t tonga_init_arb_table_index +ffffffff822c2760 t tonga_populate_pm_fuses +ffffffff822c2990 t tonga_populate_initial_mc_reg_table +ffffffff822c2bf0 t tonga_get_dependency_volt_by_clk +ffffffff822c3000 T vega10_enable_smc_features +ffffffff822c3040 T vega10_get_enabled_smc_features +ffffffff822c30a0 t vega10_smu_init +ffffffff822c33f0 t vega10_smu_fini +ffffffff822c34d0 t vega10_start_smu +ffffffff822c3610 t vega10_is_dpm_running +ffffffff822c3660 t vega10_smc_table_manager +ffffffff822c4000 T vega12_enable_smc_features +ffffffff822c40d0 T vega12_get_enabled_smc_features +ffffffff822c4190 t vega12_smu_init +ffffffff822c4520 t vega12_smu_fini +ffffffff822c4630 t vega12_start_smu +ffffffff822c46e0 t vega12_is_dpm_running +ffffffff822c4780 t vega12_smc_table_manager +ffffffff822c5000 T vega20_is_smc_ram_running +ffffffff822c5050 T vega20_set_activity_monitor_coeff +ffffffff822c5160 T vega20_get_activity_monitor_coeff +ffffffff822c52b0 T vega20_enable_smc_features +ffffffff822c5380 T vega20_get_enabled_smc_features +ffffffff822c5450 T vega20_set_pptable_driver_address +ffffffff822c54f0 t vega20_smu_init +ffffffff822c58c0 t vega20_smu_fini +ffffffff822c59c0 t vega20_start_smu +ffffffff822c5aa0 t vega20_get_argument +ffffffff822c5b00 t vega20_send_msg_to_smc +ffffffff822c5d50 t vega20_send_msg_to_smc_with_parameter +ffffffff822c5ff0 t vega20_is_dpm_running +ffffffff822c6090 t vega20_smc_table_manager +ffffffff822c7000 t vegam_smu_init +ffffffff822c7090 t vegam_start_smu +ffffffff822c7460 t vegam_update_smc_table +ffffffff822c76d0 t vegam_process_firmware_header +ffffffff822c7820 t vegam_update_sclk_threshold +ffffffff822c7900 t vegam_thermal_setup_fan_table +ffffffff822c7960 t vegam_thermal_avfs_enable +ffffffff822c79f0 t vegam_init_smc_table +ffffffff822c86b0 t vegam_populate_all_graphic_levels +ffffffff822c8df0 t vegam_populate_all_memory_levels +ffffffff822c9110 t vegam_get_offsetof +ffffffff822c91a0 t vegam_get_mac_definition +ffffffff822c9200 t vegam_is_dpm_running +ffffffff822c9250 t vegam_is_hw_avfs_present +ffffffff822c92a0 t vegam_program_memory_timing_parameters +ffffffff822c94d0 t vegam_populate_smc_uvd_level +ffffffff822c96e0 t vegam_populate_smc_boot_level +ffffffff822c97c0 t vegam_populate_smc_initial_state +ffffffff822c9870 t vegam_populate_bapm_parameters_in_dpm_table +ffffffff822c9a10 t vegam_populate_clock_stretcher_data_table +ffffffff822c9c30 t vegam_populate_avfs_parameters +ffffffff822c9f70 t vegam_populate_vr_config +ffffffff822ca0a0 t vegam_populate_pm_fuses +ffffffff822ca300 t vegam_get_dependency_volt_by_clk +ffffffff822ca4e0 t vegam_calculate_sclk_params +ffffffff822cb000 T smu_set_residency_gfxoff +ffffffff822cb050 T smu_get_residency_gfxoff +ffffffff822cb0a0 T smu_get_entrycount_gfxoff +ffffffff822cb0f0 T smu_get_status_gfxoff +ffffffff822cb150 T smu_set_soft_freq_range +ffffffff822cb190 T smu_get_dpm_freq_range +ffffffff822cb1e0 T smu_set_gfx_power_up_by_imu +ffffffff822cb270 T is_support_sw_smu +ffffffff822cb2b0 T is_support_cclk_dpm +ffffffff822cb310 T smu_allow_xgmi_power_down +ffffffff822cb3d0 T smu_write_watermarks_table +ffffffff822cb440 T smu_set_ac_dc +ffffffff822cb540 t smu_early_init +ffffffff822cb7a0 t smu_late_init +ffffffff822cbb40 t smu_sw_init +ffffffff822cc320 t smu_sw_fini +ffffffff822cc570 t smu_hw_init +ffffffff822cc990 t smu_hw_fini +ffffffff822cca90 t smu_late_fini +ffffffff822ccab0 t smu_suspend +ffffffff822ccb80 t smu_resume +ffffffff822ccde0 t smu_set_clockgating_state +ffffffff822cce10 t smu_set_powergating_state +ffffffff822cce40 T smu_get_power_limit +ffffffff822ccf80 T smu_mode1_reset_is_support +ffffffff822ccfd0 T smu_mode2_reset_is_support +ffffffff822cd020 T smu_mode1_reset +ffffffff822cd070 T smu_handle_passthrough_sbr +ffffffff822cd0c0 T smu_get_ecc_info +ffffffff822cd110 T smu_wait_for_event +ffffffff822cd160 T smu_stb_collect_info +ffffffff822cd1c0 T amdgpu_smu_stb_debug_fs_init +ffffffff822cd1f0 T smu_send_hbm_bad_pages_num +ffffffff822cd240 T smu_send_hbm_bad_channel_flag +ffffffff822cd290 t smu_set_fan_control_mode +ffffffff822cd350 t smu_get_fan_control_mode +ffffffff822cd3d0 t smu_set_fan_speed_pwm +ffffffff822cd480 t smu_get_fan_speed_pwm +ffffffff822cd4e0 t smu_force_ppclk_levels +ffffffff822cd5a0 t smu_print_ppclk_levels +ffffffff822cd610 t smu_emit_ppclk_levels +ffffffff822cd680 t smu_force_performance_level +ffffffff822cd920 t smu_read_sensor +ffffffff822cdb60 t smu_get_performance_level +ffffffff822cdbd0 t smu_get_current_power_state +ffffffff822cdc30 t smu_get_fan_speed_rpm +ffffffff822cdc90 t smu_set_fan_speed_rpm +ffffffff822cdd40 t smu_get_power_num_states +ffffffff822cddc0 t smu_sys_get_pp_table +ffffffff822cde30 t smu_sys_set_pp_table +ffffffff822ce020 t smu_switch_power_profile +ffffffff822ce130 t smu_handle_dpm_task +ffffffff822ce1e0 t smu_load_microcode +ffffffff822ce2c0 t smu_dpm_set_power_gate +ffffffff822ce630 t smu_set_power_limit +ffffffff822ce760 t smu_get_power_profile_mode +ffffffff822ce7c0 t smu_set_power_profile_mode +ffffffff822ce820 t smu_od_edit_dpm_table +ffffffff822ce880 t smu_set_mp1_state +ffffffff822ce8e0 t smu_gfx_state_change_set +ffffffff822ce920 t smu_get_sclk +ffffffff822ce9a0 t smu_get_mclk +ffffffff822cea20 t smu_display_configuration_change +ffffffff822ceab0 t smu_get_clock_by_type_with_latency +ffffffff822ceb60 t smu_display_clock_voltage_request +ffffffff822cebc0 t smu_enable_mgpu_fan_boost +ffffffff822cec20 t smu_set_display_count +ffffffff822cec90 t smu_set_deep_sleep_dcefclk +ffffffff822ced00 t smu_get_baco_capability +ffffffff822ced60 t smu_baco_set_state +ffffffff822cee40 t smu_sys_get_pp_feature_mask +ffffffff822ceeb0 t smu_sys_set_pp_feature_mask +ffffffff822cef20 t smu_mode2_reset +ffffffff822cefc0 t smu_set_df_cstate +ffffffff822cf070 t smu_set_xgmi_pstate +ffffffff822cf120 t smu_sys_get_gpu_metrics +ffffffff822cf180 t smu_set_watermarks_for_clock_ranges +ffffffff822cf200 t smu_display_disable_memory_clock_switch +ffffffff822cf260 t smu_get_max_sustainable_clocks_by_dc +ffffffff822cf2c0 t smu_get_uclk_dpm_states +ffffffff822cf320 t smu_get_dpm_clock_table +ffffffff822cf380 t smu_get_prv_buffer_details +ffffffff822cf3f0 t smu_set_user_clk_dependencies +ffffffff822cf470 t smu_adjust_power_state_dynamic +ffffffff822cf6c0 t smu_apply_default_config_table_settings +ffffffff822cf770 t smu_restore_dpm_user_profile +ffffffff822cfb90 t smu_throttling_logging_work_fn +ffffffff822cfbe0 t smu_interrupt_work_fn +ffffffff822cfc30 t smu_swctf_delayed_work_handler +ffffffff822cfd30 t __delayed_work_tick +ffffffff822cfd50 t smu_alloc_dummy_read_table +ffffffff822cfe10 t smu_smc_hw_setup +ffffffff822d0560 t smu_set_default_dpm_table +ffffffff822d0710 t smu_get_thermal_temperature_range +ffffffff822d0800 t smu_smc_hw_cleanup +ffffffff822d1000 T arcturus_set_ppt_funcs +ffffffff822d1050 t arcturus_run_btc +ffffffff822d1100 t arcturus_get_allowed_feature_mask +ffffffff822d1150 t arcturus_set_default_dpm_table +ffffffff822d1360 t arcturus_populate_umd_state_clk +ffffffff822d1420 t arcturus_print_clk_levels +ffffffff822d1660 t arcturus_force_clk_levels +ffffffff822d18b0 t arcturus_get_power_profile_mode +ffffffff822d1b40 t arcturus_set_power_profile_mode +ffffffff822d1e30 t arcturus_dpm_set_vcn_enable +ffffffff822d1f00 t arcturus_read_sensor +ffffffff822d20e0 t arcturus_is_dpm_running +ffffffff822d2130 t arcturus_get_fan_speed_pwm +ffffffff822d2270 t arcturus_get_fan_speed_rpm +ffffffff822d2380 t arcturus_get_thermal_temperature_range +ffffffff822d2470 t arcturus_set_performance_level +ffffffff822d2580 t arcturus_dump_pptable +ffffffff822d25b0 t arcturus_get_power_limit +ffffffff822d26b0 t arcturus_set_df_cstate +ffffffff822d27c0 t arcturus_allow_xgmi_power_down +ffffffff822d28b0 t arcturus_i2c_control_init +ffffffff822d29e0 t arcturus_i2c_control_fini +ffffffff822d2a20 t arcturus_get_unique_id +ffffffff822d2b40 t arcturus_init_smc_tables +ffffffff822d2cb0 t arcturus_setup_pptable +ffffffff822d2df0 t arcturus_set_fan_speed_pwm +ffffffff822d2f90 t arcturus_set_fan_speed_rpm +ffffffff822d30b0 t arcturus_log_thermal_throttling_event +ffffffff822d34a0 t arcturus_get_gpu_metrics +ffffffff822d36b0 t arcturus_get_fan_parameters +ffffffff822d36f0 t arcturus_get_current_clk_freq_by_table +ffffffff822d3830 t arcturus_get_smu_metrics_data +ffffffff822d3aa0 t arcturus_upload_dpm_level +ffffffff822d3b90 t arcturus_i2c_xfer +ffffffff822d3e30 t arcturus_i2c_func +ffffffff822d3e60 t arcturus_set_fan_static_mode +ffffffff822d5000 T cyan_skillfish_set_ppt_funcs +ffffffff822d5030 t cyan_skillfish_print_clk_levels +ffffffff822d5150 t cyan_skillfish_od_edit_dpm_table +ffffffff822d5430 t cyan_skillfish_read_sensor +ffffffff822d55e0 t cyan_skillfish_is_dpm_running +ffffffff822d5680 t cyan_skillfish_init_smc_tables +ffffffff822d5760 t cyan_skillfish_get_enabled_mask +ffffffff822d57a0 t cyan_skillfish_get_dpm_ultimate_freq +ffffffff822d5860 t cyan_skillfish_get_gpu_metrics +ffffffff822d5b00 t cyan_skillfish_get_smu_metrics_data +ffffffff822d6000 T navi10_set_ppt_funcs +ffffffff822d6050 t navi10_run_btc +ffffffff822d60d0 t navi10_get_allowed_feature_mask +ffffffff822d63a0 t navi10_set_default_dpm_table +ffffffff822d6810 t navi10_populate_umd_state_clk +ffffffff822d69d0 t navi10_print_clk_levels +ffffffff822d6b60 t navi10_emit_clk_levels +ffffffff822d6d80 t navi10_force_clk_levels +ffffffff822d6eb0 t navi10_od_edit_dpm_table +ffffffff822d7460 t navi10_get_clock_by_type_with_latency +ffffffff822d7560 t navi10_get_power_profile_mode +ffffffff822d77c0 t navi10_set_power_profile_mode +ffffffff822d7a90 t navi10_dpm_set_vcn_enable +ffffffff822d7b20 t navi10_dpm_set_jpeg_enable +ffffffff822d7ba0 t navi10_read_sensor +ffffffff822d7d20 t navi10_pre_display_config_changed +ffffffff822d7dc0 t navi10_display_config_changed +ffffffff822d7e40 t navi10_notify_smc_display_config +ffffffff822d7fc0 t navi10_is_dpm_running +ffffffff822d8010 t navi10_get_fan_speed_rpm +ffffffff822d80b0 t navi10_set_watermarks_table +ffffffff822d8250 t navi10_get_thermal_temperature_range +ffffffff822d8340 t navi10_get_uclk_dpm_states +ffffffff822d8450 t navi10_set_default_od_settings +ffffffff822d86b0 t navi10_display_disable_memory_clock_switch +ffffffff822d8730 t navi10_get_power_limit +ffffffff822d8850 t navi10_update_pcie_parameters +ffffffff822d89c0 t navi10_i2c_control_init +ffffffff822d8af0 t navi10_i2c_control_fini +ffffffff822d8b30 t navi10_init_smc_tables +ffffffff822d8d60 t navi10_setup_pptable +ffffffff822d8f80 t navi10_baco_enter +ffffffff822d8fd0 t navi10_baco_exit +ffffffff822d90d0 t navi1x_get_gpu_metrics +ffffffff822d9a70 t navi10_enable_mgpu_fan_boost +ffffffff822d9af0 t navi10_get_fan_parameters +ffffffff822d9b30 t navi10_post_smu_init +ffffffff822d9db0 t navi10_get_default_config_table_settings +ffffffff822d9e00 t navi10_set_config_table +ffffffff822d9eb0 t navi1x_get_smu_metrics_data +ffffffff822da540 t navi10_od_setting_check_range +ffffffff822da5f0 t navi10_i2c_xfer +ffffffff822da890 t navi10_i2c_func +ffffffff822da8c0 t navi10_umc_hybrid_cdr_workaround +ffffffff822db000 T sienna_cichlid_set_ppt_funcs +ffffffff822db050 t sienna_cichlid_run_btc +ffffffff822db0d0 t sienna_cichlid_get_allowed_feature_mask +ffffffff822db350 t sienna_cichlid_set_default_dpm_table +ffffffff822db930 t sienna_cichlid_populate_umd_state_clk +ffffffff822db9f0 t sienna_cichlid_print_clk_levels +ffffffff822dbbc0 t sienna_cichlid_force_clk_levels +ffffffff822dbcf0 t sienna_cichlid_od_edit_dpm_table +ffffffff822dc270 t sienna_cichlid_restore_user_od_settings +ffffffff822dc300 t sienna_cichlid_get_power_profile_mode +ffffffff822dc560 t sienna_cichlid_set_power_profile_mode +ffffffff822dc830 t sienna_cichlid_dpm_set_vcn_enable +ffffffff822dc8f0 t sienna_cichlid_dpm_set_jpeg_enable +ffffffff822dc970 t sienna_cichlid_read_sensor +ffffffff822dd170 t sienna_cichlid_pre_display_config_changed +ffffffff822dd1a0 t sienna_cichlid_display_config_changed +ffffffff822dd200 t sienna_cichlid_notify_smc_display_config +ffffffff822dd380 t sienna_cichlid_is_dpm_running +ffffffff822dd3d0 t sienna_cichlid_get_fan_speed_rpm +ffffffff822dd4e0 t sienna_cichlid_set_watermarks_table +ffffffff822dd670 t sienna_cichlid_get_thermal_temperature_range +ffffffff822dd750 t sienna_cichlid_get_uclk_dpm_states +ffffffff822dd860 t sienna_cichlid_set_default_od_settings +ffffffff822dda10 t sienna_cichlid_display_disable_memory_clock_switch +ffffffff822dda90 t sienna_cichlid_dump_pptable +ffffffff822ddac0 t sienna_cichlid_get_power_limit +ffffffff822ddb90 t sienna_cichlid_update_pcie_parameters +ffffffff822ddce0 t sienna_cichlid_i2c_control_init +ffffffff822dde10 t sienna_cichlid_i2c_control_fini +ffffffff822dde50 t sienna_cichlid_get_unique_id +ffffffff822ddfa0 t sienna_cichlid_init_smc_tables +ffffffff822de2c0 t sienna_cichlid_set_mp1_state +ffffffff822de300 t sienna_cichlid_setup_pptable +ffffffff822de740 t sienna_cichlid_system_features_control +ffffffff822de7d0 t sienna_cichlid_baco_enter +ffffffff822de820 t sienna_cichlid_baco_exit +ffffffff822de920 t sienna_cichlid_is_mode1_reset_supported +ffffffff822de9a0 t sienna_cichlid_is_mode2_reset_supported +ffffffff822de9d0 t sienna_cichlid_mode2_reset +ffffffff822deb10 t sienna_cichlid_get_dpm_ultimate_freq +ffffffff822deb30 t sienna_cichlid_get_gpu_metrics +ffffffff822df0b0 t sienna_cichlid_enable_mgpu_fan_boost +ffffffff822df100 t sienna_cichlid_get_fan_parameters +ffffffff822df140 t sienna_cichlid_gpo_control +ffffffff822df1f0 t sienna_cichlid_get_ecc_info +ffffffff822df2e0 t sienna_cichlid_stb_get_data_direct +ffffffff822df380 t sienna_cichlid_get_default_config_table_settings +ffffffff822df3f0 t sienna_cichlid_set_config_table +ffffffff822df4c0 t sienna_cichlid_get_throttler_status_locked +ffffffff822df620 t sienna_cichlid_get_smartshift_power_percentage +ffffffff822df750 t sienna_cichlid_i2c_xfer +ffffffff822df9f0 t sienna_cichlid_i2c_func +ffffffff822e0000 T smu_v11_0_init_microcode +ffffffff822e02b0 T smu_v11_0_fini_microcode +ffffffff822e0330 T smu_v11_0_load_microcode +ffffffff822e0470 T smu_v11_0_check_fw_status +ffffffff822e04c0 T smu_v11_0_check_fw_version +ffffffff822e0670 T smu_v11_0_setup_pptable +ffffffff822e0790 T smu_v11_0_init_smc_tables +ffffffff822e08f0 T smu_v11_0_fini_smc_tables +ffffffff822e0b20 T smu_v11_0_init_power +ffffffff822e0bb0 T smu_v11_0_fini_power +ffffffff822e0c10 T smu_v11_0_get_vbios_bootup_values +ffffffff822e0f70 T smu_v11_0_notify_memory_pool_location +ffffffff822e1060 T smu_v11_0_set_min_deep_sleep_dcefclk +ffffffff822e10e0 T smu_v11_0_set_driver_table_location +ffffffff822e1150 T smu_v11_0_set_tool_table_location +ffffffff822e11c0 T smu_v11_0_init_display_count +ffffffff822e1220 T smu_v11_0_set_allowed_mask +ffffffff822e12f0 T smu_v11_0_system_features_control +ffffffff822e1310 T smu_v11_0_notify_display_change +ffffffff822e1380 T smu_v11_0_init_max_sustainable_clocks +ffffffff822e15e0 t smu_v11_0_get_max_sustainable_clock +ffffffff822e1700 T smu_v11_0_get_current_power_limit +ffffffff822e17d0 T smu_v11_0_set_power_limit +ffffffff822e1910 T smu_v11_0_interrupt_work +ffffffff822e1990 T smu_v11_0_enable_thermal_alert +ffffffff822e1a30 T smu_v11_0_disable_thermal_alert +ffffffff822e1a50 T smu_v11_0_get_gfx_vdd +ffffffff822e1b10 T smu_v11_0_display_clock_voltage_request +ffffffff822e1c60 T smu_v11_0_set_hard_freq_limited_range +ffffffff822e1d40 T smu_v11_0_gfx_off_control +ffffffff822e1db0 T smu_v11_0_get_fan_control_mode +ffffffff822e1e00 T smu_v11_0_set_fan_speed_pwm +ffffffff822e1fa0 t smu_v11_0_set_fan_static_mode +ffffffff822e2150 T smu_v11_0_set_fan_speed_rpm +ffffffff822e2270 T smu_v11_0_get_fan_speed_pwm +ffffffff822e23b0 T smu_v11_0_get_fan_speed_rpm +ffffffff822e24b0 T smu_v11_0_set_fan_control_mode +ffffffff822e2650 T smu_v11_0_set_xgmi_pstate +ffffffff822e2670 T smu_v11_0_register_irq_handler +ffffffff822e2730 T smu_v11_0_get_max_sustainable_clocks_by_dc +ffffffff822e27c0 T smu_v11_0_set_azalia_d3_pme +ffffffff822e27e0 T smu_v11_0_baco_set_armd3_sequence +ffffffff822e2800 T smu_v11_0_baco_is_support +ffffffff822e2890 T smu_v11_0_baco_get_state +ffffffff822e28c0 T smu_v11_0_baco_set_state +ffffffff822e2b70 T smu_v11_0_baco_enter +ffffffff822e2c60 T smu_v11_0_baco_exit +ffffffff822e2d00 T smu_v11_0_mode1_reset +ffffffff822e2d80 T smu_v11_0_handle_passthrough_sbr +ffffffff822e2da0 T smu_v11_0_get_dpm_ultimate_freq +ffffffff822e2ee0 T smu_v11_0_set_soft_freq_limited_range +ffffffff822e2fb0 T smu_v11_0_set_performance_level +ffffffff822e3300 T smu_v11_0_set_power_source +ffffffff822e3360 T smu_v11_0_get_dpm_freq_by_index +ffffffff822e3410 T smu_v11_0_get_dpm_level_count +ffffffff822e34b0 T smu_v11_0_set_single_dpm_table +ffffffff822e3710 T smu_v11_0_get_dpm_level_range +ffffffff822e3870 T smu_v11_0_get_current_pcie_link_width_level +ffffffff822e38c0 T smu_v11_0_get_current_pcie_link_width +ffffffff822e3920 T smu_v11_0_get_current_pcie_link_speed_level +ffffffff822e3970 T smu_v11_0_get_current_pcie_link_speed +ffffffff822e39d0 T smu_v11_0_gfx_ulv_control +ffffffff822e3a40 T smu_v11_0_deep_sleep_control +ffffffff822e3bf0 T smu_v11_0_restore_user_od_settings +ffffffff822e3c80 T smu_v11_0_set_smu_mailbox_registers +ffffffff822e3cf0 t smu_v11_0_set_irq_state +ffffffff822e4280 t smu_v11_0_irq_process +ffffffff822e5000 T vangogh_set_ppt_funcs +ffffffff822e5040 t vangogh_set_default_dpm_tables +ffffffff822e5070 t vangogh_common_print_clk_levels +ffffffff822e54e0 t vangogh_force_clk_levels +ffffffff822e5710 t vangogh_od_edit_dpm_table +ffffffff822e5c40 t vangogh_get_power_profile_mode +ffffffff822e5d10 t vangogh_set_power_profile_mode +ffffffff822e5e30 t vangogh_dpm_set_vcn_enable +ffffffff822e5e80 t vangogh_dpm_set_jpeg_enable +ffffffff822e5ed0 t vangogh_read_sensor +ffffffff822e6480 t vangogh_is_dpm_running +ffffffff822e64e0 t vangogh_set_watermarks_table +ffffffff822e6660 t vangogh_set_performance_level +ffffffff822e6e70 t vangogh_get_power_limit +ffffffff822e6fd0 t vangogh_get_ppt_limit +ffffffff822e7040 t vangogh_get_dpm_clock_table +ffffffff822e71b0 t vangogh_init_smc_tables +ffffffff822e73f0 t vangogh_system_features_control +ffffffff822e7440 t vangogh_set_power_limit +ffffffff822e75a0 t vangogh_get_gfxoff_status +ffffffff822e7630 t vangogh_get_gfxoff_entrycount +ffffffff822e76a0 t vangogh_set_gfxoff_residency +ffffffff822e7710 t vangogh_get_gfxoff_residency +ffffffff822e7750 t vangogh_mode2_reset +ffffffff822e7890 t vangogh_common_get_gpu_metrics +ffffffff822e7ef0 t vangogh_post_smu_init +ffffffff822e8090 t vangogh_set_fine_grain_gfx_freq_parameters +ffffffff822e8100 t vangogh_force_dpm_limit_value +ffffffff822e8230 t vangogh_get_dpm_ultimate_freq +ffffffff822e85f0 t vangogh_set_soft_freq_limited_range +ffffffff822e9000 T renoir_set_ppt_funcs +ffffffff822e90a0 t renoir_get_current_power_state +ffffffff822e9120 t renoir_print_clk_levels +ffffffff822e9530 t renoir_force_clk_levels +ffffffff822e9750 t renoir_od_edit_dpm_table +ffffffff822e9a30 t renoir_get_power_profile_mode +ffffffff822e9b00 t renoir_set_power_profile_mode +ffffffff822e9c20 t renoir_dpm_set_vcn_enable +ffffffff822e9ca0 t renoir_dpm_set_jpeg_enable +ffffffff822e9d20 t renoir_read_sensor +ffffffff822ea0d0 t renoir_is_dpm_running +ffffffff822ea110 t renoir_set_watermarks_table +ffffffff822ea2b0 t renoir_set_performance_level +ffffffff822ea7d0 t renoir_get_dpm_clock_table +ffffffff822eab20 t renoir_init_smc_tables +ffffffff822eac90 t renoir_get_enabled_mask +ffffffff822eacd0 t renoir_get_dpm_ultimate_freq +ffffffff822eaf70 t renoir_get_gpu_metrics +ffffffff822eb190 t renoir_gfx_state_change_set +ffffffff822eb1c0 t renoir_set_fine_grain_gfx_freq_parameters +ffffffff822eb260 t renoir_force_dpm_limit_value +ffffffff822ec000 T smu_v12_0_check_fw_status +ffffffff822ec050 T smu_v12_0_check_fw_version +ffffffff822ec110 T smu_v12_0_powergate_sdma +ffffffff822ec150 T smu_v12_0_set_gfx_cgpg +ffffffff822ec1b0 T smu_v12_0_get_gfxoff_status +ffffffff822ec240 T smu_v12_0_gfx_off_control +ffffffff822ec360 T smu_v12_0_fini_smc_tables +ffffffff822ec410 T smu_v12_0_set_default_dpm_tables +ffffffff822ec440 T smu_v12_0_mode2_reset +ffffffff822ec460 T smu_v12_0_set_soft_freq_limited_range +ffffffff822ec5a0 T smu_v12_0_set_driver_table_location +ffffffff822ec610 T smu_v12_0_get_vbios_bootup_values +ffffffff822ed000 T aldebaran_set_ppt_funcs +ffffffff822ed040 t aldebaran_get_allowed_feature_mask +ffffffff822ed090 t aldebaran_set_default_dpm_table +ffffffff822ed290 t aldebaran_populate_umd_state_clk +ffffffff822ed390 t aldebaran_print_clk_levels +ffffffff822ed550 t aldebaran_force_clk_levels +ffffffff822ed710 t aldebaran_usr_edit_dpm_table +ffffffff822ed930 t aldebaran_read_sensor +ffffffff822edb80 t aldebaran_is_dpm_running +ffffffff822edbd0 t aldebaran_get_thermal_temperature_range +ffffffff822edca0 t aldebaran_set_performance_level +ffffffff822edd50 t aldebaran_get_power_limit +ffffffff822edee0 t aldebaran_set_df_cstate +ffffffff822edf60 t aldebaran_allow_xgmi_power_down +ffffffff822ee000 t aldebaran_i2c_control_init +ffffffff822ee0c0 t aldebaran_i2c_control_fini +ffffffff822ee100 t aldebaran_get_unique_id +ffffffff822ee1e0 t aldebaran_init_smc_tables +ffffffff822ee3a0 t aldebaran_set_mp1_state +ffffffff822ee3e0 t aldebaran_setup_pptable +ffffffff822ee4b0 t aldebaran_system_features_control +ffffffff822ee610 t aldebaran_set_power_limit +ffffffff822ee6a0 t aldebaran_is_baco_supported +ffffffff822ee6d0 t aldebaran_is_mode1_reset_supported +ffffffff822ee700 t aldebaran_is_mode2_reset_supported +ffffffff822ee730 t aldebaran_mode1_reset +ffffffff822ee810 t aldebaran_mode2_reset +ffffffff822eeb30 t aldebaran_set_soft_freq_limited_range +ffffffff822eed30 t aldebaran_log_thermal_throttling_event +ffffffff822ef040 t aldebaran_get_gpu_metrics +ffffffff822ef2c0 t aldebaran_smu_handle_passthrough_sbr +ffffffff822ef2e0 t aldebaran_smu_send_hbm_bad_page_num +ffffffff822ef360 t aldebaran_get_ecc_info +ffffffff822ef4c0 t aldebaran_send_hbm_bad_channel_flag +ffffffff822ef590 t aldebaran_get_current_clk_freq_by_table +ffffffff822ef760 t aldebaran_upload_dpm_level +ffffffff822ef850 t aldebaran_i2c_xfer +ffffffff822efaf0 t aldebaran_i2c_func +ffffffff822f0000 T smu_v13_0_init_microcode +ffffffff822f01d0 T smu_v13_0_fini_microcode +ffffffff822f0250 T smu_v13_0_load_microcode +ffffffff822f0280 T smu_v13_0_init_pptable_microcode +ffffffff822f0430 T smu_v13_0_get_pptable_from_firmware +ffffffff822f0550 T smu_v13_0_check_fw_status +ffffffff822f05c0 T smu_v13_0_check_fw_version +ffffffff822f06f0 T smu_v13_0_setup_pptable +ffffffff822f0880 T smu_v13_0_init_smc_tables +ffffffff822f09d0 T smu_v13_0_fini_smc_tables +ffffffff822f0bc0 T smu_v13_0_init_power +ffffffff822f0c40 T smu_v13_0_fini_power +ffffffff822f0cc0 T smu_v13_0_get_vbios_bootup_values +ffffffff822f0f60 T smu_v13_0_notify_memory_pool_location +ffffffff822f1020 T smu_v13_0_set_min_deep_sleep_dcefclk +ffffffff822f10a0 T smu_v13_0_set_driver_table_location +ffffffff822f1110 T smu_v13_0_set_tool_table_location +ffffffff822f1180 T smu_v13_0_init_display_count +ffffffff822f11c0 T smu_v13_0_set_allowed_mask +ffffffff822f1290 T smu_v13_0_gfx_off_control +ffffffff822f1300 T smu_v13_0_system_features_control +ffffffff822f1320 T smu_v13_0_notify_display_change +ffffffff822f1390 T smu_v13_0_init_max_sustainable_clocks +ffffffff822f15f0 t smu_v13_0_get_max_sustainable_clock +ffffffff822f1710 T smu_v13_0_get_current_power_limit +ffffffff822f17e0 T smu_v13_0_set_power_limit +ffffffff822f18f0 T smu_v13_0_enable_thermal_alert +ffffffff822f1980 T smu_v13_0_disable_thermal_alert +ffffffff822f19c0 T smu_v13_0_get_gfx_vdd +ffffffff822f1a80 T smu_v13_0_display_clock_voltage_request +ffffffff822f1bd0 T smu_v13_0_set_hard_freq_limited_range +ffffffff822f1cb0 T smu_v13_0_get_fan_control_mode +ffffffff822f1d00 T smu_v13_0_set_fan_speed_pwm +ffffffff822f1f10 t smu_v13_0_set_fan_static_mode +ffffffff822f20d0 T smu_v13_0_set_fan_control_mode +ffffffff822f2230 T smu_v13_0_set_fan_speed_rpm +ffffffff822f23d0 T smu_v13_0_set_xgmi_pstate +ffffffff822f23f0 T smu_v13_0_register_irq_handler +ffffffff822f24c0 T smu_v13_0_get_max_sustainable_clocks_by_dc +ffffffff822f2550 T smu_v13_0_set_azalia_d3_pme +ffffffff822f2570 T smu_v13_0_wait_for_event +ffffffff822f25d0 T smu_v13_0_get_dpm_ultimate_freq +ffffffff822f2730 T smu_v13_0_set_soft_freq_limited_range +ffffffff822f2800 T smu_v13_0_set_performance_level +ffffffff822f2f60 T smu_v13_0_set_power_source +ffffffff822f2fc0 T smu_v13_0_set_single_dpm_table +ffffffff822f32b0 T smu_v13_0_get_dpm_level_range +ffffffff822f3440 T smu_v13_0_get_current_pcie_link_width_level +ffffffff822f3490 T smu_v13_0_get_current_pcie_link_width +ffffffff822f34f0 T smu_v13_0_get_current_pcie_link_speed_level +ffffffff822f3540 T smu_v13_0_get_current_pcie_link_speed +ffffffff822f3590 T smu_v13_0_set_vcn_enable +ffffffff822f3640 T smu_v13_0_set_jpeg_enable +ffffffff822f3660 T smu_v13_0_run_btc +ffffffff822f36e0 T smu_v13_0_gpo_control +ffffffff822f3770 T smu_v13_0_deep_sleep_control +ffffffff822f39d0 T smu_v13_0_gfx_ulv_control +ffffffff822f3a40 T smu_v13_0_baco_set_armd3_sequence +ffffffff822f3a60 T smu_v13_0_baco_is_support +ffffffff822f3af0 T smu_v13_0_baco_get_state +ffffffff822f3b20 T smu_v13_0_baco_set_state +ffffffff822f3be0 T smu_v13_0_baco_enter +ffffffff822f3cf0 T smu_v13_0_baco_exit +ffffffff822f3d90 T smu_v13_0_set_gfx_power_up_by_imu +ffffffff822f3dd0 T smu_v13_0_od_edit_dpm_table +ffffffff822f4080 T smu_v13_0_set_default_dpm_tables +ffffffff822f40b0 T smu_v13_0_set_smu_mailbox_registers +ffffffff822f4120 T smu_v13_0_mode1_reset +ffffffff822f41a0 T smu_v13_0_update_pcie_parameters +ffffffff822f4410 t smu_v13_0_set_irq_state +ffffffff822f49a0 t smu_v13_0_irq_process +ffffffff822f5000 T smu_v13_0_0_set_ppt_funcs +ffffffff822f50e0 t smu_v13_0_0_get_allowed_feature_mask +ffffffff822f5220 t smu_v13_0_0_set_default_dpm_table +ffffffff822f5640 t smu_v13_0_0_populate_umd_state_clk +ffffffff822f5780 t smu_v13_0_0_print_clk_levels +ffffffff822f5890 t smu_v13_0_0_force_clk_levels +ffffffff822f5a10 t smu_v13_0_0_get_power_profile_mode +ffffffff822f5c70 t smu_v13_0_0_set_power_profile_mode +ffffffff822f5ec0 t smu_v13_0_0_read_sensor +ffffffff822f60e0 t smu_v13_0_0_is_dpm_running +ffffffff822f6130 t smu_v13_0_0_get_fan_speed_pwm +ffffffff822f6210 t smu_v13_0_0_get_fan_speed_rpm +ffffffff822f6280 t smu_v13_0_0_get_thermal_temperature_range +ffffffff822f6380 t smu_v13_0_0_dump_pptable +ffffffff822f63b0 t smu_v13_0_0_get_power_limit +ffffffff822f6490 t smu_v13_0_0_set_df_cstate +ffffffff822f64b0 t smu_v13_0_0_i2c_control_init +ffffffff822f65e0 t smu_v13_0_0_i2c_control_fini +ffffffff822f6620 t smu_v13_0_0_get_unique_id +ffffffff822f66c0 t smu_v13_0_0_init_smc_tables +ffffffff822f68b0 t smu_v13_0_0_set_mp1_state +ffffffff822f68f0 t smu_v13_0_0_setup_pptable +ffffffff822f6a30 t smu_v13_0_0_system_features_control +ffffffff822f6a40 t smu_v13_0_0_baco_enter +ffffffff822f6a90 t smu_v13_0_0_baco_exit +ffffffff822f6af0 t smu_v13_0_0_is_mode1_reset_supported +ffffffff822f6b50 t smu_v13_0_0_mode1_reset +ffffffff822f6be0 t smu_v13_0_0_get_dpm_ultimate_freq +ffffffff822f6d00 t smu_v13_0_0_get_gpu_metrics +ffffffff822f7120 t smu_v13_0_0_enable_mgpu_fan_boost +ffffffff822f7170 t smu_v13_0_0_smu_send_bad_mem_page_num +ffffffff822f71f0 t smu_v13_0_0_send_bad_mem_channel_flag +ffffffff822f7270 t smu_v13_0_0_i2c_xfer +ffffffff822f7510 t smu_v13_0_0_i2c_func +ffffffff822f8000 T smu_v13_0_4_set_ppt_funcs +ffffffff822f80b0 t smu_v13_0_4_print_clk_levels +ffffffff822f8120 t smu_v13_0_4_force_clk_levels +ffffffff822f83c0 t smu_v13_0_4_read_sensor +ffffffff822f8670 t smu_v13_0_4_is_dpm_running +ffffffff822f86c0 t smu_v13_0_4_set_watermarks_table +ffffffff822f8840 t smu_v13_0_4_set_performance_level +ffffffff822f8d80 t smu_v13_0_4_init_smc_tables +ffffffff822f8ef0 t smu_v13_0_4_fini_smc_tables +ffffffff822f8fa0 t smu_v13_0_4_system_features_control +ffffffff822f8ff0 t smu_v13_0_4_mode2_reset +ffffffff822f9010 t smu_v13_0_4_get_dpm_ultimate_freq +ffffffff822f9430 t smu_v13_0_4_get_gpu_metrics +ffffffff822f9600 t smu_v13_0_4_set_fine_grain_gfx_freq_parameters +ffffffff822f9660 t smu_v13_0_4_get_current_clk_freq +ffffffff822fa000 T smu_v13_0_5_set_ppt_funcs +ffffffff822fa090 t smu_v13_0_5_set_default_dpm_tables +ffffffff822fa0c0 t smu_v13_0_5_print_clk_levels +ffffffff822fa150 t smu_v13_0_5_force_clk_levels +ffffffff822fa2b0 t smu_v13_0_5_od_edit_dpm_table +ffffffff822fa560 t smu_v13_0_5_dpm_set_vcn_enable +ffffffff822fa580 t smu_v13_0_5_dpm_set_jpeg_enable +ffffffff822fa5a0 t smu_v13_0_5_read_sensor +ffffffff822fa7c0 t smu_v13_0_5_is_dpm_running +ffffffff822fa810 t smu_v13_0_5_set_watermarks_table +ffffffff822fa990 t smu_v13_0_5_set_performance_level +ffffffff822fab70 t smu_v13_0_5_init_smc_tables +ffffffff822face0 t smu_v13_0_5_fini_smc_tables +ffffffff822fad90 t smu_v13_0_5_system_features_control +ffffffff822fade0 t smu_v13_0_5_mode2_reset +ffffffff822fae60 t smu_v13_0_5_get_dpm_ultimate_freq +ffffffff822fb2a0 t smu_v13_0_5_get_gpu_metrics +ffffffff822fb3f0 t smu_v13_0_5_set_fine_grain_gfx_freq_parameters +ffffffff822fc000 T smu_v13_0_7_set_ppt_funcs +ffffffff822fc050 t smu_v13_0_7_get_allowed_feature_mask +ffffffff822fc1c0 t smu_v13_0_7_set_default_dpm_table +ffffffff822fc5e0 t smu_v13_0_7_populate_umd_state_clk +ffffffff822fc720 t smu_v13_0_7_print_clk_levels +ffffffff822fc830 t smu_v13_0_7_force_clk_levels +ffffffff822fc9b0 t smu_v13_0_7_get_power_profile_mode +ffffffff822fcc90 t smu_v13_0_7_set_power_profile_mode +ffffffff822fced0 t smu_v13_0_7_read_sensor +ffffffff822fd0e0 t smu_v13_0_7_is_dpm_running +ffffffff822fd130 t smu_v13_0_7_get_fan_speed_pwm +ffffffff822fd210 t smu_v13_0_7_get_fan_speed_rpm +ffffffff822fd280 t smu_v13_0_7_get_thermal_temperature_range +ffffffff822fd380 t smu_v13_0_7_dump_pptable +ffffffff822fd3b0 t smu_v13_0_7_get_power_limit +ffffffff822fd490 t smu_v13_0_7_set_df_cstate +ffffffff822fd4b0 t smu_v13_0_7_init_smc_tables +ffffffff822fd6a0 t smu_v13_0_7_check_fw_status +ffffffff822fd6f0 t smu_v13_0_7_set_mp1_state +ffffffff822fd730 t smu_v13_0_7_setup_pptable +ffffffff822fd890 t smu_v13_0_7_baco_enter +ffffffff822fd8e0 t smu_v13_0_7_baco_exit +ffffffff822fd940 t smu_v13_0_7_is_mode1_reset_supported +ffffffff822fd980 t smu_v13_0_7_get_dpm_ultimate_freq +ffffffff822fdaa0 t smu_v13_0_7_get_gpu_metrics +ffffffff822fdeb0 t smu_v13_0_7_enable_mgpu_fan_boost +ffffffff822fe000 T yellow_carp_set_ppt_funcs +ffffffff822fe040 t yellow_carp_set_default_dpm_tables +ffffffff822fe070 t yellow_carp_print_clk_levels +ffffffff822fe0e0 t yellow_carp_force_clk_levels +ffffffff822fe380 t yellow_carp_od_edit_dpm_table +ffffffff822fe630 t yellow_carp_dpm_set_vcn_enable +ffffffff822fe650 t yellow_carp_dpm_set_jpeg_enable +ffffffff822fe670 t yellow_carp_read_sensor +ffffffff822fe9e0 t yellow_carp_is_dpm_running +ffffffff822fea30 t yellow_carp_set_watermarks_table +ffffffff822febb0 t yellow_carp_set_performance_level +ffffffff822ff0f0 t yellow_carp_init_smc_tables +ffffffff822ff260 t yellow_carp_fini_smc_tables +ffffffff822ff310 t yellow_carp_system_features_control +ffffffff822ff360 t yellow_carp_get_gfxoff_status +ffffffff822ff3f0 t yellow_carp_mode2_reset +ffffffff822ff470 t yellow_carp_get_dpm_ultimate_freq +ffffffff822ff8b0 t yellow_carp_get_gpu_metrics +ffffffff822ffa60 t yellow_carp_post_smu_init +ffffffff822ffae0 t yellow_carp_set_fine_grain_gfx_freq_parameters +ffffffff822ffb40 t yellow_carp_get_current_clk_freq +ffffffff82300000 T smu_cmn_send_msg_without_waiting +ffffffff82300170 T smu_cmn_wait_for_response +ffffffff823002a0 T smu_cmn_send_smc_msg_with_param +ffffffff823005b0 T smu_cmn_to_asic_specific_index +ffffffff823006c0 t __smu_cmn_reg_print_error +ffffffff82300900 T smu_cmn_send_smc_msg +ffffffff82300920 T smu_cmn_send_debug_smc_msg +ffffffff823009a0 T smu_cmn_feature_is_supported +ffffffff82300a50 T smu_cmn_feature_is_enabled +ffffffff82300b40 T smu_cmn_clk_dpm_is_enabled +ffffffff82300c40 T smu_cmn_get_enabled_mask +ffffffff82300d30 T smu_cmn_get_indep_throttler_status +ffffffff82300de0 T smu_cmn_feature_update_enable_state +ffffffff82300e80 T smu_cmn_feature_set_enabled +ffffffff82300f50 T smu_cmn_get_pp_feature_mask +ffffffff82301100 T smu_cmn_set_pp_feature_mask +ffffffff82301200 T smu_cmn_disable_all_features_with_exception +ffffffff823012b0 T smu_cmn_get_smc_version +ffffffff82301380 T smu_cmn_update_table +ffffffff823014e0 T smu_cmn_write_watermarks_table +ffffffff823015b0 T smu_cmn_write_pptable +ffffffff82301670 T smu_cmn_get_metrics_table +ffffffff823017d0 T smu_cmn_get_combo_pptable +ffffffff823018a0 T smu_cmn_init_soft_gpu_metrics +ffffffff82301980 T smu_cmn_set_mp1_state +ffffffff82301a20 T smu_cmn_is_audio_func_enabled +ffffffff82302000 T pci_mcfg_init +ffffffff82302050 T pci_lookup_segment +ffffffff823020b0 T pci_attach_hook +ffffffff823020e0 T pci_bus_maxdevs +ffffffff82302110 T pci_make_tag +ffffffff82302180 T pci_decompose_tag +ffffffff823021e0 T pci_conf_size +ffffffff82302240 T pci_mcfg_map_bus +ffffffff823022c0 T pci_conf_read +ffffffff82302410 T pci_conf_write +ffffffff82302550 T pci_msix_table_map +ffffffff82302680 T pci_msix_table_unmap +ffffffff82302720 T msi_hwmask +ffffffff82302750 T msi_hwunmask +ffffffff82302780 T msi_addroute +ffffffff82302880 T msi_delroute +ffffffff823028f0 T pci_intr_map_msi +ffffffff82302970 T msix_hwmask +ffffffff823029a0 T msix_hwunmask +ffffffff823029d0 T msix_addroute +ffffffff82302bc0 T msix_delroute +ffffffff82302d20 T pci_intr_map_msix +ffffffff82302df0 T pci_intr_map +ffffffff82303020 T pci_intr_string +ffffffff82303100 T pci_intr_establish +ffffffff82303150 T pci_intr_establish_cpu +ffffffff823032a0 T pci_intr_disestablish +ffffffff823032c0 T pci_init_extents +ffffffff823034a0 T pci_probe_device_hook +ffffffff823034e0 T pci_dev_postattach +ffffffff823034f0 T pci_min_powerstate +ffffffff82303500 T pci_set_powerstate_md +ffffffff82304000 T pciide_machdep_compat_intr_establish +ffffffff82304060 T pciide_machdep_compat_intr_disestablish +ffffffff82305000 T vga_post_init +ffffffff82305310 t vm86_emu_inb +ffffffff82305360 t vm86_emu_inw +ffffffff823053a0 t vm86_emu_inl +ffffffff823053e0 t vm86_emu_outb +ffffffff82305430 t vm86_emu_outw +ffffffff82305470 t vm86_emu_outl +ffffffff823054b0 T vga_post_call +ffffffff82305520 T vga_post_free +ffffffff82305590 T ddb_vgapost +ffffffff82306000 T pchbmatch +ffffffff82306040 T pchbattach +ffffffff823064a0 T pchbactivate +ffffffff82306510 T pchb_amd64ht_attach +ffffffff82306660 T pchb_rnd +ffffffff823066e0 T pchb_print +ffffffff82307000 T amas_match +ffffffff82307050 T amas_attach +ffffffff823070b0 T amas_intl_nodes +ffffffff82307140 T amas_get_pagerange +ffffffff82308000 T agp_flush_cache +ffffffff82308030 T agp_flush_cache_range +ffffffff82308040 T agp_init_map +ffffffff82308110 T agp_destroy_map +ffffffff82308150 T agp_map_subregion +ffffffff82308180 T agp_unmap_subregion +ffffffff823081b0 T agp_map_atomic +ffffffff823081e0 T agp_unmap_atomic +ffffffff82309000 T cardslotmatch +ffffffff82309050 T cardslotattach +ffffffff823092a0 T cardslot_event +ffffffff82309300 T cardslot_cb_print +ffffffff82309350 T cardslot_16_print +ffffffff823093a0 T cardslot_16_submatch +ffffffff823093f0 T cardslot_event_throw +ffffffff82309490 T cardslot_process_event +ffffffff8230a000 T cardbusmatch +ffffffff8230a050 T cardbusattach +ffffffff8230a130 T cardbus_read_tuples +ffffffff8230a4e0 T parse_tuple +ffffffff8230a750 T cardbus_attach_card +ffffffff8230aed0 T enable_function +ffffffff8230af70 T decode_tuples +ffffffff8230b050 T cardbusprint +ffffffff8230b140 T cardbussubmatch +ffffffff8230b1a0 T disable_function +ffffffff8230b200 T cardbus_detach_card +ffffffff8230b2e0 T cardbus_intr_establish +ffffffff8230b310 T cardbus_intr_disestablish +ffffffff8230b330 T cardbus_function_enable +ffffffff8230b410 T cardbus_function_disable +ffffffff8230b470 T cardbus_matchbyid +ffffffff8230b4e0 T decode_tuple +ffffffff8230c000 T cardbus_mapreg_map +ffffffff8230c1a0 T cardbus_mapreg_unmap +ffffffff8230d000 T cardbus_read_exrom +ffffffff8230e000 T rbus_space_alloc +ffffffff8230e060 T rbus_space_alloc_subregion +ffffffff8230e230 T rbus_space_free +ffffffff8230e2c0 T rbus_new_body +ffffffff8230e350 T rbus_new_root_delegate +ffffffff8230e420 T rbus_new_root_share +ffffffff8230f000 T com_cardbus_match +ffffffff8230f070 T com_cardbus_attach +ffffffff8230f220 T com_cardbus_detach +ffffffff8230f2c0 T com_cardbus_find_csdev +ffffffff8230f440 T com_cardbus_gofigure +ffffffff8230f900 T com_cardbus_enable +ffffffff8230f9d0 T com_cardbus_disable +ffffffff8230fa20 T com_cardbus_setup +ffffffff82310000 T xl_cardbus_match +ffffffff82310080 T xl_cardbus_attach +ffffffff823103f0 T xl_cardbus_detach +ffffffff823104b0 T xl_cardbus_lookup +ffffffff82310560 T xl_cardbus_intr_ack +ffffffff82311000 T dc_cardbus_match +ffffffff82311030 T dc_cardbus_attach +ffffffff823113e0 T dc_cardbus_detach +ffffffff82311480 T dc_cardbus_setup +ffffffff82312000 T fxp_cardbus_match +ffffffff82312030 T fxp_cardbus_attach +ffffffff82312240 T fxp_cardbus_detach +ffffffff823122d0 T fxp_cardbus_setup +ffffffff82313000 t rl_cardbus_match +ffffffff82313030 t rl_cardbus_attach +ffffffff823131d0 t rl_cardbus_detach +ffffffff82313290 T rl_cardbus_setup +ffffffff82314000 T re_cardbus_probe +ffffffff82314030 T re_cardbus_attach +ffffffff82314230 T re_cardbus_detach +ffffffff82314310 T re_cardbus_setup +ffffffff82315000 T ath_cardbus_match +ffffffff82315050 T ath_cardbus_attach +ffffffff82315180 T ath_cardbus_detach +ffffffff82315250 T ath_cardbus_enable +ffffffff82315320 T ath_cardbus_disable +ffffffff82315370 T ath_cardbus_power +ffffffff823153b0 T ath_cardbus_setup +ffffffff82316000 T athn_cardbus_match +ffffffff82316030 T athn_cardbus_attach +ffffffff82316170 T athn_cardbus_detach +ffffffff82316210 T athn_cardbus_enable +ffffffff823162e0 T athn_cardbus_disable +ffffffff82316330 T athn_cardbus_power +ffffffff82316370 T athn_cardbus_read +ffffffff823163a0 T athn_cardbus_write +ffffffff823163d0 T athn_cardbus_write_barrier +ffffffff82316400 T athn_cardbus_setup +ffffffff82317000 T atw_cardbus_match +ffffffff82317030 T atw_cardbus_attach +ffffffff82317220 T atw_cardbus_detach +ffffffff823172e0 T atw_cardbus_enable +ffffffff823173b0 T atw_cardbus_disable +ffffffff82317400 T atw_cardbus_power +ffffffff82317440 T atw_cardbus_setup +ffffffff82318000 T rtw_cardbus_match +ffffffff82318030 T rtw_cardbus_attach +ffffffff82318270 T rtw_cardbus_detach +ffffffff82318390 T rtw_cardbus_intr_ack +ffffffff823183b0 T rtw_cardbus_funcregen +ffffffff82318410 T rtw_cardbus_enable +ffffffff82318570 T rtw_cardbus_disable +ffffffff82318650 T rtw_cardbus_power +ffffffff82318690 T rtw_cardbus_setup +ffffffff82319000 T ral_cardbus_match +ffffffff82319030 T ral_cardbus_attach +ffffffff82319230 T ral_cardbus_detach +ffffffff823192e0 T ral_cardbus_activate +ffffffff82319370 T ral_cardbus_enable +ffffffff823194d0 T ral_cardbus_disable +ffffffff82319520 T ral_cardbus_setup +ffffffff823195c0 T ral_cardbus_wakeup +ffffffff8231a000 T acx_cardbus_match +ffffffff8231a030 T acx_cardbus_attach +ffffffff8231a260 T acx_cardbus_detach +ffffffff8231a380 T acx_cardbus_enable +ffffffff8231a450 T acx_cardbus_disable +ffffffff8231a4a0 T acx_cardbus_power +ffffffff8231a4e0 T acx_cardbus_setup +ffffffff8231b000 T pgt_cardbus_match +ffffffff8231b030 T pgt_cardbus_attach +ffffffff8231b230 T pgt_cardbus_detach +ffffffff8231b2e0 T pgt_cardbus_enable +ffffffff8231b440 T pgt_cardbus_disable +ffffffff8231b490 T pgt_cardbus_power +ffffffff8231b4f0 T pgt_cardbus_setup +ffffffff8231c000 T ehci_cardbus_match +ffffffff8231c040 T ehci_cardbus_attach +ffffffff8231c2e0 T ehci_cardbus_detach +ffffffff8231d000 T ohci_cardbus_match +ffffffff8231d040 T ohci_cardbus_attach +ffffffff8231d2e0 T ohci_cardbus_detach +ffffffff8231e000 T uhci_cardbus_match +ffffffff8231e040 T uhci_cardbus_attach +ffffffff8231e340 T uhci_cardbus_detach +ffffffff8231f000 T malo_cardbus_match +ffffffff8231f030 T malo_cardbus_attach +ffffffff8231f270 T malo_cardbus_detach +ffffffff8231f340 T malo_cardbus_enable +ffffffff8231f4b0 T malo_cardbus_disable +ffffffff8231f500 T malo_cardbus_setup +ffffffff82320000 T bwi_cardbus_match +ffffffff82320030 T bwi_cardbus_attach +ffffffff823202a0 T bwi_cardbus_detach +ffffffff82320350 T bwi_cardbus_enable +ffffffff823204b0 T bwi_cardbus_disable +ffffffff82320500 T bwi_cardbus_setup +ffffffff823205a0 T bwi_cardbus_conf_read +ffffffff823205d0 T bwi_cardbus_conf_write +ffffffff82321000 T rbus_pccbb_parent_mem +ffffffff82321060 T rbus_pccbb_parent_io +ffffffff823210d0 T pccbb_attach_hook +ffffffff82322000 T pcmcia_match +ffffffff82322050 T pcmcia_attach +ffffffff823220d0 T pcmcia_activate +ffffffff82322180 T pcmcia_ccr_read +ffffffff823221d0 T pcmcia_ccr_write +ffffffff82322240 T pcmcia_card_attach +ffffffff82322430 T pcmcia_print +ffffffff82322690 T pcmcia_submatch +ffffffff823226e0 T pcmcia_card_detach +ffffffff82322790 T pcmcia_card_deactivate +ffffffff82322800 T pcmcia_card_gettype +ffffffff82322860 T pcmcia_function_init +ffffffff823228b0 T pcmcia_function_enable +ffffffff82322ce0 T pcmcia_function_disable +ffffffff82322e00 T pcmcia_io_map +ffffffff82323040 T pcmcia_intr_establish +ffffffff823232b0 T pcmcia_card_intr +ffffffff823233d0 T pcmcia_intr_disestablish +ffffffff823235f0 T pcmcia_intr_string +ffffffff82324000 T pcmcia_cis_read_1 +ffffffff823240f0 T pcmcia_read_cis +ffffffff823241e0 T pcmcia_scan_cis +ffffffff82325cd0 T pcmcia_parse_cis_tuple +ffffffff82326e60 T pcmcia_print_cis +ffffffff82328000 T pcmcia_check_cis_quirks +ffffffff82329000 T ep_pcmcia_match +ffffffff82329110 T ep_pcmcia_attach +ffffffff82329520 T ep_pcmcia_detach +ffffffff823295c0 T ep_pcmcia_activate +ffffffff823296a0 T ep_pcmcia_lookup +ffffffff823297b0 T ep_pcmcia_enable1 +ffffffff82329860 T ep_pcmcia_get_enaddr +ffffffff8232a000 T ne_pcmcia_match +ffffffff8232a140 T ne_pcmcia_attach +ffffffff8232a760 T ne_pcmcia_detach +ffffffff8232a820 T ne_pcmcia_activate +ffffffff8232a910 T ne_pcmcia_get_enaddr +ffffffff8232aaf0 T ne_pcmcia_dl10019_get_enaddr +ffffffff8232ad30 T ne_pcmcia_ax88190_set_iobase +ffffffff8232b000 T aic_pcmcia_match +ffffffff8232b0b0 T aic_pcmcia_attach +ffffffff8232b2b0 T aic_pcmcia_detach +ffffffff8232c000 T com_pcmcia_match +ffffffff8232c220 T com_pcmcia_attach +ffffffff8232c500 T com_pcmcia_detach +ffffffff8232c5a0 T com_pcmcia_activate +ffffffff8232c660 T com_pcmcia_enable1 +ffffffff8232c710 T com_pcmcia_enable +ffffffff8232c800 T com_pcmcia_disable +ffffffff8232c840 T com_pcmcia_disable1 +ffffffff8232d000 t wdc_pcmcia_match +ffffffff8232d0d0 t wdc_pcmcia_attach +ffffffff8232d540 T wdc_pcmcia_detach +ffffffff8232d640 T wdc_pcmcia_activate +ffffffff8232d760 T wdc_pcmcia_disk_device_interface_callback +ffffffff8232d800 T wdc_pcmcia_disk_device_interface +ffffffff8232d860 T wdc_pcmcia_lookup +ffffffff8232e000 T sm_pcmcia_match +ffffffff8232e100 T sm_pcmcia_attach +ffffffff8232e320 T sm_pcmcia_detach +ffffffff8232e3c0 T sm_pcmcia_activate +ffffffff8232e450 T sm_pcmcia_funce_enaddr +ffffffff8232e470 T sm_pcmcia_ascii_enaddr +ffffffff8232e570 T sm_pcmcia_lannid_ciscallback +ffffffff8232e680 T sm_pcmcia_enable +ffffffff8232e720 T sm_pcmcia_disable +ffffffff8232f000 T xe_pcmcia_match +ffffffff8232f050 T xe_pcmcia_attach +ffffffff8232f5e0 T xe_pcmcia_detach +ffffffff8232f6a0 T xe_pcmcia_activate +ffffffff8232f990 T xe_pcmcia_interpret_manfid +ffffffff8232fa30 T xe_pcmcia_funce_enaddr +ffffffff8232fa50 T xe_ioctl +ffffffff8232fda0 T xe_start +ffffffff82330030 T xe_watchdog +ffffffff82330070 T xe_intr +ffffffff82330430 T xe_full_reset +ffffffff82330a00 T xe_mdi_read +ffffffff82331390 T xe_mdi_write +ffffffff82331c90 T xe_statchg +ffffffff82331cc0 T xe_mediachange +ffffffff82331d50 T xe_mediastatus +ffffffff82331db0 T xe_init +ffffffff82331e10 T xe_stop +ffffffff82331f40 T xe_reset +ffffffff823320b0 T xe_pcmcia_lan_nid_ciscallback +ffffffff82332200 T xe_pcmcia_manfid_ciscallback +ffffffff82332320 T xe_get +ffffffff823325c0 T xe_set_address +ffffffff82332870 T xe_cycle_power +ffffffff82333000 T wi_pcmcia_match +ffffffff82333130 T wi_pcmcia_attach +ffffffff823333e0 T wi_pcmcia_detach +ffffffff823334a0 T wi_pcmcia_activate +ffffffff82333590 T wi_pcmcia_wakeup +ffffffff82334000 T malo_pcmcia_match +ffffffff82334050 T malo_pcmcia_attach +ffffffff82334220 T malo_pcmcia_detach +ffffffff823342b0 T malo_pcmcia_activate +ffffffff82334520 T cmalo_intr +ffffffff82334780 T cmalo_attach +ffffffff82334c80 T cmalo_detach +ffffffff82334d60 T cmalo_stop +ffffffff82334ea0 T malo_pcmcia_wakeup +ffffffff82334f40 T cmalo_init +ffffffff82335250 T cmalo_intr_mask +ffffffff823352e0 T cmalo_fw_alloc +ffffffff823353b0 T cmalo_fw_load_helper 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athn_usb_ampdu_tx_stop_cb +ffffffff82488f40 T athn_usb_clean_nodes +ffffffff82489000 T athn_usb_updateedca_cb +ffffffff82489040 T athn_usb_updateslot_cb +ffffffff82489080 T athn_usb_set_key_cb +ffffffff82489140 T athn_usb_delete_key_cb +ffffffff824891a0 T athn_usb_bcneof +ffffffff82489200 T athn_usb_swba +ffffffff82489360 T athn_usb_tx_status +ffffffff824893d0 T athn_usb_rx_wmi_ctrl +ffffffff824895f0 T athn_usb_rx_radiotap +ffffffff824897e0 T athn_usb_rx_frame +ffffffff82489a50 T athn_usb_rxeof +ffffffff82489d70 T athn_usb_txeof +ffffffff82489e30 T athn_usb_tx +ffffffff8248b000 T uow_match +ffffffff8248b070 T uow_attach +ffffffff8248b510 T uow_detach +ffffffff8248b5e0 T uow_activate +ffffffff8248b650 T uow_intr +ffffffff8248b6a0 T uow_reset +ffffffff8248b6c0 T uow_ow_reset +ffffffff8248b710 T uow_ow_bit +ffffffff8248b790 T uow_ow_read_byte +ffffffff8248b810 T uow_ow_write_byte +ffffffff8248b870 T uow_ow_read_block +ffffffff8248b900 T uow_ow_write_block +ffffffff8248b970 T uow_ow_matchrom +ffffffff8248ba40 T uow_cmd +ffffffff8248bb80 T uow_read +ffffffff8248bc90 T uow_write +ffffffff8248bd70 T uow_ow_search +ffffffff8248c000 T uberry_match +ffffffff8248c070 T uberry_attach +ffffffff8248c1f0 T uberry_detach +ffffffff8248c220 T uberry_charge +ffffffff8248c2d0 T uberry_pearlmode +ffffffff8248d000 T upd_match +ffffffff8248d140 T upd_attach +ffffffff8248d3b0 T upd_detach +ffffffff8248d4a0 T upd_lookup_usage_entry +ffffffff8248d560 T upd_intr +ffffffff8248d590 T upd_attach_sensor_tree +ffffffff8248d860 T upd_refresh +ffffffff8248d980 T upd_request_children +ffffffff8248daa0 T upd_update_report_cb +ffffffff8248db90 T upd_lookup_sensor +ffffffff8248dc00 T upd_sensor_invalidate +ffffffff8248dc80 T upd_sensor_update +ffffffff8248e000 T uwacom_match +ffffffff8248e0e0 T uwacom_attach +ffffffff8248e300 T uwacom_detach +ffffffff8248e320 T uwacom_enable +ffffffff8248e390 T uwacom_ioctl +ffffffff8248e440 T uwacom_disable +ffffffff8248e470 T uwacom_intr_legacy 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hidpp20_battery_status_is_charging +ffffffff82493df0 T hidpp20_unified_battery_status_is_charging +ffffffff82493e30 T hidpp_send_validate +ffffffff82493e80 T hidpp_send_report +ffffffff82495000 T ucc_match +ffffffff824950a0 T ucc_attach +ffffffff824951b0 T ucc_detach +ffffffff82495210 T ucc_intr +ffffffff82495250 T ucc_enable +ffffffff82496000 T iic_match +ffffffff82496050 T iic_attach +ffffffff824960c0 T iicbus_print +ffffffff82496110 T iic_print +ffffffff82496180 T iic_search +ffffffff82496250 T iic_is_compatible +ffffffff82497000 T iic_exec +ffffffff824972c0 T iic_smbus_write_byte +ffffffff824973c0 T iic_smbus_read_byte +ffffffff824974f0 T iic_smbus_receive_byte +ffffffff82498000 T iicprobeinit +ffffffff82498040 T iicprobenc +ffffffff824980f0 T iicprobew +ffffffff824981a0 T iicprobe +ffffffff82498270 T lm75probe +ffffffff82499780 T adm1032cloneprobe +ffffffff82499af0 T iic_ignore_addr +ffffffff82499ba0 T iic_dump +ffffffff8249a020 T iic_probe_sensor +ffffffff8249f990 T iic_probe_eeprom +ffffffff8249fa50 T iic_scan +ffffffff824a0000 T i2c_wait_for_scl +ffffffff824a00f0 T i2c_bitbang_send_stop +ffffffff824a0170 T i2c_bitbang_send_start +ffffffff824a02d0 T i2c_bitbang_initiate_xfer +ffffffff824a0360 T i2c_bitbang_write_byte +ffffffff824a0600 T i2c_bitbang_read_byte +ffffffff824a1000 T lmtemp_match +ffffffff824a10b0 T lmtemp_attach +ffffffff824a1300 T lmtemp_refresh_sensor_data +ffffffff824a13e0 T lmtemp_temp_read +ffffffff824a2000 T lmn_match +ffffffff824a2050 T lmn_attach +ffffffff824a2190 T lmn_refresh +ffffffff824a3000 T lmenv_match +ffffffff824a30b0 T lmenv_attach +ffffffff824a3600 T lmenv_refresh +ffffffff824a4000 T maxtmp_match +ffffffff824a4150 T maxtmp_attach +ffffffff824a42e0 T maxtmp_refresh +ffffffff824a4350 T maxtmp_readport +ffffffff824a5000 T adc_match +ffffffff824a5070 T adc_attach +ffffffff824a5310 T adc_refresh +ffffffff824a6000 T admtemp_match +ffffffff824a6110 T admtemp_attach +ffffffff824a6410 T admtemp_refresh +ffffffff824a7000 T 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parse_input +ffffffff824bf000 T bgw_match +ffffffff824bf0f0 T bgw_attach +ffffffff824bf2f0 T bgw_refresh +ffffffff824c0000 T icc_match +ffffffff824c00a0 T icc_attach +ffffffff824c01a0 T icc_intr +ffffffff824c01e0 T icc_enable +ffffffff824c0220 T icc_detach +ffffffff824c1000 T gpio_match +ffffffff824c1050 T gpio_attach +ffffffff824c10a0 T gpio_detach +ffffffff824c1130 T gpio_submatch +ffffffff824c11b0 T gpio_search +ffffffff824c1240 T gpioopen +ffffffff824c12c0 T gpio_print +ffffffff824c1350 T gpiobus_print +ffffffff824c13a0 T gpio_pin_map +ffffffff824c1470 T gpio_npins +ffffffff824c1580 T gpio_pin_unmap +ffffffff824c15e0 T gpio_pin_read +ffffffff824c1610 T gpio_pin_write +ffffffff824c1640 T gpio_pin_ctl +ffffffff824c1670 T gpio_pin_caps +ffffffff824c16b0 T gpioclose +ffffffff824c1720 T gpio_pinbyname +ffffffff824c1790 T gpio_ioctl +ffffffff824c2030 T gpioioctl +ffffffff824c3000 T acpi_pci_conf_read_1 +ffffffff824c3050 T acpi_pci_conf_read_2 +ffffffff824c30a0 T acpi_pci_conf_read_4 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thinkpad_volume_down +ffffffff824f8310 T thinkpad_volume_up +ffffffff824f83c0 T thinkpad_get_thinklight +ffffffff824f8410 T thinkpad_adaptive_change +ffffffff824f8530 T thinkpad_get_brightness +ffffffff824f8570 T thinkpad_toggle_wan +ffffffff824f8690 T thinkpad_cmos +ffffffff824f8740 T thinkpad_set_brightness +ffffffff824f8830 T thinkpad_set_thinklight +ffffffff824f88f0 T thinkpad_battery_inhibit_charge +ffffffff824f8a20 T thinkpad_battery_force_discharge +ffffffff824f9000 T toshiba_match +ffffffff824f90a0 T toshiba_attach +ffffffff824f9180 T get_param_brightness +ffffffff824f91e0 T acpitoshiba_get_param +ffffffff824f9240 T set_param_brightness +ffffffff824f92d0 T toshiba_update_brightness +ffffffff824f93d0 T acpitoshiba_set_param +ffffffff824f9470 T toshiba_set_brightness +ffffffff824f9590 T toshiba_enable_events +ffffffff824f9620 T toshiba_read_events +ffffffff824f9780 T toshiba_hotkey +ffffffff824f99b0 T toshiba_get_brightness +ffffffff824f9b20 T toshiba_fn_key_brightness_up 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aplgpio_attach +ffffffff82500310 T aplgpio_intr +ffffffff82500460 T aplgpio_read_pin +ffffffff825004b0 T aplgpio_write_pin +ffffffff82500520 T aplgpio_intr_establish +ffffffff82500640 T aplgpio_intr_enable +ffffffff825006d0 T aplgpio_intr_disable +ffffffff82501000 T bytgpio_match +ffffffff82501060 T bytgpio_attach +ffffffff82501320 T bytgpio_intr +ffffffff82501450 T bytgpio_read_pin +ffffffff825014b0 T bytgpio_write_pin +ffffffff82501530 T bytgpio_intr_establish +ffffffff825015a0 T bytgpio_intr_enable +ffffffff82501690 T bytgpio_intr_disable +ffffffff82502000 T chvgpio_match +ffffffff82502060 T chvgpio_attach +ffffffff82502300 T chvgpio_intr +ffffffff825023d0 T chvgpio_read_pin +ffffffff82502480 T chvgpio_write_pin +ffffffff82502540 T chvgpio_intr_establish +ffffffff82502710 T chvgpio_intr_enable +ffffffff825027e0 T chvgpio_intr_disable +ffffffff825028b0 T chvgpio_opreg_handler +ffffffff82502930 T chvgpio_check_pin +ffffffff82503000 T glkgpio_match +ffffffff82503060 T glkgpio_attach +ffffffff82503310 T glkgpio_intr +ffffffff82503460 T glkgpio_read_pin +ffffffff825034c0 T glkgpio_write_pin +ffffffff82503530 T glkgpio_intr_establish +ffffffff82503650 T glkgpio_intr_enable +ffffffff825036e0 T glkgpio_intr_disable +ffffffff82504000 T pchgpio_match +ffffffff82504060 T pchgpio_attach +ffffffff82504530 T pchgpio_activate +ffffffff825045e0 T pchgpio_intr +ffffffff82504800 T pchgpio_read_pin +ffffffff825048f0 T pchgpio_write_pin +ffffffff82504a00 T pchgpio_intr_establish +ffffffff82504c20 T pchgpio_intr_enable +ffffffff82504d50 T pchgpio_intr_disable +ffffffff82504e80 T pchgpio_save +ffffffff82504ef0 T pchgpio_restore +ffffffff82504f60 T pchgpio_find_group +ffffffff82504fe0 T pchgpio_intr_handle +ffffffff825050c0 T pchgpio_save_pin +ffffffff82505280 T pchgpio_restore_pin +ffffffff82506000 T tipmic_match +ffffffff82506050 T tipmic_attach +ffffffff82506250 T tipmic_write_1 +ffffffff82506310 T tipmic_intr +ffffffff82506470 T tipmic_get_lpat +ffffffff82506580 T tipmic_read_pin +ffffffff825065b0 T tipmic_write_pin +ffffffff825065e0 T tipmic_thermal_opreg_handler +ffffffff82506e60 T tipmic_power_opreg_handler +ffffffff82507100 T tipmic_read_1 +ffffffff825071d0 T tipmic_raw_to_temp +ffffffff82508000 T ccpmic_match +ffffffff82508050 T ccpmic_attach +ffffffff82508130 T ccpmic_get_lpat +ffffffff82508240 T ccpmic_read_pin +ffffffff825083c0 T ccpmic_write_pin +ffffffff82508520 T ccpmic_thermal_opreg_handler +ffffffff82508770 T ccpmic_power_opreg_handler +ffffffff82508960 T ccpmic_read_1 +ffffffff82508a30 T ccpmic_write_1 +ffffffff82508af0 T ccpmic_raw_to_temp +ffffffff82509000 T com_acpi_match +ffffffff82509120 T com_acpi_attach +ffffffff825093a0 T com_acpi_is_designware +ffffffff82509400 T com_acpi_intr_designware +ffffffff82509430 T com_acpi_is_console +ffffffff8250a000 T sdhc_acpi_match +ffffffff8250a060 T sdhc_acpi_attach +ffffffff8250a370 T sdhc_acpi_parse_resources +ffffffff8250a420 T sdhc_acpi_card_detect_gpio +ffffffff8250a480 T sdhc_acpi_card_detect_intr +ffffffff8250a4c0 T sdhc_acpi_power_on +ffffffff8250a540 T sdhc_acpi_explore +ffffffff8250a570 T sdhc_acpi_card_detect_nonremovable +ffffffff8250a5a0 T sdhc_acpi_do_explore +ffffffff8250b000 T dwiic_acpi_match +ffffffff8250b050 T dwiic_acpi_attach +ffffffff8250b410 T dwiic_acpi_parse_crs +ffffffff8250b560 T dwiic_acpi_power +ffffffff8250b670 T dwiic_acpi_get_params +ffffffff8250b7b0 T dwiic_i2c_intr_establish +ffffffff8250b830 T dwiic_i2c_intr_disestablish +ffffffff8250b850 T dwiic_i2c_intr_string +ffffffff8250b8e0 T dwiic_acpi_acquire_bus +ffffffff8250b930 T dwiic_acpi_release_bus +ffffffff8250b960 T dwiic_acpi_bus_scan +ffffffff8250b9a0 T dwiic_acpi_found_hid +ffffffff8250bd00 T dwiic_matchhids +ffffffff8250bd90 T dwiic_acpi_found_ihidev +ffffffff8250c000 T dwiic_acpi_found_iatp +ffffffff8250c160 T dwiic_acpi_found_ietp +ffffffff8250d000 T acpicbkbd_match +ffffffff8250d030 T acpicbkbd_attach +ffffffff8250d0d0 T acpicbkbd_activate +ffffffff8250d120 T acpicbkbd_get_backlight +ffffffff8250d1a0 T acpicbkbd_set_backlight +ffffffff8250d240 T acpicbkbd_write_backlight +ffffffff8250e000 T acpials_match +ffffffff8250e090 T acpials_attach +ffffffff8250e230 T acpials_read +ffffffff8250e2b0 T acpials_addtask +ffffffff8250e2f0 T acpials_notify +ffffffff8250e380 T acpials_update +ffffffff8250f000 T tpm_match +ffffffff8250f050 T tpm_attach +ffffffff8250f320 T tpm_activate +ffffffff8250f430 T tpm2_start_method +ffffffff8250f4b0 T tpm_probe +ffffffff8250f560 T tpm_init_tis +ffffffff8250f7d0 T tpm_init_crb +ffffffff8250fb10 T tpm_suspend +ffffffff8250fc00 T tpm_resume +ffffffff8250fc30 T tpm_write_tis +ffffffff8250ffc0 T tpm_read_tis +ffffffff82510190 T tpm_write_crb +ffffffff82510570 T tpm_read_crb +ffffffff82510870 T tpm_request_locality_tis +ffffffff82510960 T tpm_request_locality_crb +ffffffff82510a60 T tpm_release_locality_crb +ffffffff82510ab0 T tpm_release_locality_tis +ffffffff82510b20 T tpm_getburst +ffffffff82510bd0 T tpm_status +ffffffff82510bf0 T tpm_waitfor +ffffffff82510cd0 T tpm_waitfor_status +ffffffff82511000 T acpihve_match +ffffffff825110b0 T acpihve_attach +ffffffff82512000 T acpisbs_match +ffffffff82512030 T acpisbs_attach +ffffffff825122b0 T acpisbs_activate +ffffffff82512390 T acpisbs_read +ffffffff82512450 T acpisbs_setup_sensors +ffffffff82512550 T acpisbs_refresh_sensors +ffffffff825126a0 T acpisbs_notify +ffffffff825127e0 T acpi_smbus_read +ffffffff82513000 T surface_match +ffffffff82513060 T surface_attach +ffffffff825130c0 T surface_hotkey +ffffffff82514000 T ipmi_acpi_match +ffffffff82514030 T ipmi_acpi_attach +ffffffff82514260 T ipmi_acpi_parse_crs +ffffffff82515000 T amdgpio_match +ffffffff82515060 T amdgpio_attach +ffffffff825152a0 T amdgpio_activate +ffffffff82515390 T amdgpio_intr +ffffffff82515530 T amdgpio_read_pin +ffffffff82515580 T amdgpio_write_pin +ffffffff825155f0 T amdgpio_intr_establish +ffffffff825156e0 T amdgpio_intr_enable +ffffffff82515760 T amdgpio_intr_disable +ffffffff825157e0 T amdgpio_save +ffffffff82515860 T amdgpio_restore +ffffffff825158f0 T amdgpio_save_pin +ffffffff82515960 T amdgpio_restore_pin +ffffffff825159d0 T amdgpio_pin_intr +ffffffff82516000 T acpihid_match +ffffffff82516030 T acpihid_attach +ffffffff82516210 T acpihid_init_dsm +ffffffff82516370 T acpihid_eval +ffffffff82516590 T acpihid_notify +ffffffff825165f0 T acpihid_button_array_enable +ffffffff82517000 t iosf_acpi_match +ffffffff82517050 t iosf_acpi_attach +ffffffff82517150 t iosf_acpi_mbi_mdr_rd +ffffffff825171c0 t iosf_acpi_mbi_mdr_wr +ffffffff82518000 T acpi_match +ffffffff82518060 T acpi_attach +ffffffff825180a0 T acpi_probe +ffffffff82518240 T acpi_map +ffffffff82518330 T acpi_unmap +ffffffff82518380 T acpi_bus_space_map +ffffffff825183a0 T acpi_bus_space_unmap +ffffffff825183c0 T acpi_intr_establish +ffffffff82518500 T acpi_intr_disestablish +ffffffff82518510 T acpi_scan +ffffffff825186b0 T acpi_acquire_glk +ffffffff82518710 T acpi_release_glk +ffffffff82518760 T acpi_attach_machdep +ffffffff825188f0 T acpi_sleep_cpu +ffffffff82518a90 T acpi_resume_cpu +ffffffff82518b90 T sleep_mp +ffffffff82518c80 T resume_mp +ffffffff82518d70 T acpi_iommu_device_map +ffffffff82519000 T hibernate_resume_machdep +ffffffff82519050 T hibernate_drop_to_real_mode +ffffffff82519060 T hibernate_activate_resume_pt_machdep +ffffffff825190a0 T hibernate_switch_stack_machdep +ffffffff825190e0 T hibernate_flush +ffffffff82519110 T acpi_savecpu +ffffffff8251a000 T sleep_showstate +ffffffff8251a0f0 T sleep_setstate +ffffffff8251a150 T gosleep +ffffffff8251a210 T sleep_abort +ffffffff8251a240 T sleep_resume +ffffffff8251a2b0 T suspend_finish +ffffffff8251b000 T acpiopen +ffffffff8251b0d0 T acpiclose +ffffffff8251b160 T acpiioctl +ffffffff8251b2b0 T request_sleep +ffffffff8251b330 T acpi_filtdetach +ffffffff8251b380 T acpi_filtread +ffffffff8251b3c0 T acpikqfilter +ffffffff8251c000 T acpipci_match +ffffffff8251c030 T acpipci_attach +ffffffff8251c2f0 T acpipci_osc +ffffffff8251c430 T acpipci_parse_resources +ffffffff8251c560 T acpipci_attach_bus +ffffffff8251c730 T acpipci_print +ffffffff8251c7a0 T acpipci_attach_busses +ffffffff8251d000 T efiopen +ffffffff8251d040 T eficlose +ffffffff8251d070 T efiioctl +ffffffff8251d110 T efiioc_get_table +ffffffff8251d280 T efiioc_var_get +ffffffff8251d500 T efiioc_var_next +ffffffff8251d720 T efiioc_var_set +ffffffff8251d8a0 T efi_adapt_error +ffffffff8251e000 T efi_match +ffffffff8251e060 T efi_attach +ffffffff8251e330 T efi_map_runtime +ffffffff8251e4b0 T efi_enter +ffffffff8251e550 T efi_leave +ffffffff8251e5d0 T efi_fault +ffffffff8251f000 T vmm_probe +ffffffff8251f050 T vmm_attach +ffffffff8251f170 T vmm_activate +ffffffff8251f2b0 T vmmopen +ffffffff8251f300 T vmmclose +ffffffff8251f330 T vm_find +ffffffff8251f450 T vmmioctl +ffffffff8251f6d0 T vm_create +ffffffff8251f9a0 T vm_get_info +ffffffff8251fbf0 T vm_terminate +ffffffff8251fd60 T vm_resetcpu +ffffffff8251fe80 T vm_share_mem +ffffffff8251ffd0 T pledge_ioctl_vmm +ffffffff825200c0 T vm_find_vcpu +ffffffff82520120 T vm_create_check_mem_ranges +ffffffff825202e0 T vm_teardown +ffffffff82520420 T vcpu_must_stop +ffffffff82521000 T vmm_enabled +ffffffff82521080 T vmm_attach_machdep +ffffffff82521230 T vmm_quiesce_vmx +ffffffff82521400 T vmm_activate_machdep +ffffffff82521520 T vmm_stop +ffffffff82521650 T vmm_start +ffffffff82521730 T vmmioctl_machdep +ffffffff82521800 T vm_intr_pending +ffffffff825218a0 T vm_mprotect_ept +ffffffff82521b20 T pledge_ioctl_vmm_machdep +ffffffff82521b70 T vm_rwvmparams +ffffffff82521d00 T vmm_init_pvclock +ffffffff82521dd0 T vm_rwregs +ffffffff82521ee0 T vcpu_readregs_vmx +ffffffff82522310 T vcpu_writeregs_vmx +ffffffff82522780 T vcpu_readregs_svm +ffffffff82522c30 T vcpu_writeregs_svm +ffffffff82523100 T vmm_get_guest_memtype +ffffffff82523180 T vmx_mprotect_ept +ffffffff825233e0 T vmx_pmap_find_pte_ept +ffffffff825234b0 T start_vmm_on_cpu +ffffffff825235d0 T stop_vmm_on_cpu +ffffffff82523670 T vmclear_on_cpu +ffffffff825236f0 T vm_impl_init_vmx +ffffffff82523800 T vm_impl_init_svm +ffffffff82523910 T vm_impl_init +ffffffff825239b0 T vm_impl_deinit +ffffffff825239e0 T vcpu_reload_vmcs_vmx +ffffffff82523b20 T vcpu_reset_regs_svm +ffffffff82523eb0 T svm_setmsrbrw +ffffffff82523fc0 T svm_setmsrbr +ffffffff82524090 T vmm_alloc_vpid +ffffffff825241a0 T svm_setmsrbw +ffffffff82524280 T vmx_setmsrbr +ffffffff82524330 T vmx_setmsrbw +ffffffff825243e0 T vmx_setmsrbrw +ffffffff825244f0 T svm_set_clean +ffffffff82524540 T svm_set_dirty +ffffffff82524590 T vcpu_reset_regs_vmx +ffffffff82524fd0 T vcpu_vmx_check_cap +ffffffff825250d0 T vcpu_vmx_compute_ctrl +ffffffff825252b0 T vcpu_init_vmx +ffffffff82525650 T vcpu_deinit_vmx +ffffffff825257d0 T vcpu_reset_regs +ffffffff82525810 T vcpu_init_svm +ffffffff825259a0 T vcpu_deinit_svm +ffffffff82525ae0 T vcpu_init +ffffffff82525ba0 T vmm_free_vpid +ffffffff82525c10 T vcpu_deinit +ffffffff82525c50 T vm_run +ffffffff82525e10 T vcpu_run_vmx +ffffffff82526600 T vcpu_run_svm +ffffffff82526bf0 T vmm_fpurestore +ffffffff82526cb0 T vmm_fpusave +ffffffff82526d30 T vmm_translate_gva +ffffffff82527040 T vmm_update_pvclock +ffffffff82527140 T vmx_get_exit_info +ffffffff825271a0 T vmx_handle_exit +ffffffff825275d0 T vmx_instruction_error_decode +ffffffff825277a0 T vmm_get_guest_cpu_cpl +ffffffff82527890 T vmx_handle_intr +ffffffff82527920 T svm_handle_hlt +ffffffff82527970 T vmx_handle_hlt +ffffffff82527a20 T svm_handle_exit +ffffffff82527d40 T svm_handle_np_fault +ffffffff82527ee0 T vmm_handle_cpuid +ffffffff82528580 T svm_handle_msr +ffffffff82528850 T svm_handle_xsetbv +ffffffff825288f0 T svm_handle_inout +ffffffff825289f0 T vmm_inject_ud +ffffffff82528a20 T vmm_inject_db +ffffffff82528a50 T vmx_handle_np_fault +ffffffff82528bb0 T vmx_handle_inout +ffffffff82528d30 T vmx_handle_cr +ffffffff82528f30 T vmx_handle_rdmsr +ffffffff82529000 T vmx_handle_wrmsr +ffffffff82529270 T vmx_handle_xsetbv +ffffffff82529340 T vmm_inject_gp +ffffffff82529370 T vmx_get_exit_qualification +ffffffff825293d0 T vmx_get_guest_faulttype +ffffffff82529470 T svm_get_guest_faulttype +ffffffff825294a0 T svm_fault_page +ffffffff82529530 T vmx_fault_page +ffffffff82529680 T vmm_get_guest_cpu_mode +ffffffff82529780 T vmx_load_pdptes +ffffffff82529a00 T vmx_handle_cr0_write +ffffffff82529c10 T vmx_handle_cr4_write +ffffffff82529cb0 T vmm_handle_xsetbv +ffffffff82529d40 T vmx_handle_misc_enable_msr +ffffffff82529da0 T vmm_pat_is_valid +ffffffff82529e80 T vmm_gpa_is_valid +ffffffff82529ef0 T vmx_exit_reason_decode +ffffffff82529f30 T svm_exit_reason_decode +ffffffff8252ad40 T vcpu_state_decode +ffffffff8252b000 T vmm_dispatch_intr +ffffffff8252b020 T vmxon +ffffffff8252b050 T vmxoff +ffffffff8252b080 T vmclear +ffffffff8252b0b0 T vmptrld +ffffffff8252b0e0 T vmptrst +ffffffff8252b110 T vmwrite +ffffffff8252b140 T vmread +ffffffff8252b170 T invvpid +ffffffff8252b18b t invvpid_fail +ffffffff8252b192 t invvpid_ret +ffffffff8252b1b0 T invept +ffffffff8252b1cb t invept_fail +ffffffff8252b1d2 t invept_ret +ffffffff8252b1f0 T vmx_enter_guest +ffffffff8252b21b t skip_init +ffffffff8252b2e8 t no_l1df_msr +ffffffff8252b2eb t l1df_tlb_loop +ffffffff8252b304 t l1df_tlb_done +ffffffff8252b30c t l1df_load_cache +ffffffff8252b323 t done_flush +ffffffff8252b3b6 t do_resume +ffffffff8252b43b t fail_launch_or_resume +ffffffff8252b47d t fail_launch_unknown +ffffffff8252b48a t fail_launch_invalid_vmcs +ffffffff8252b497 t fail_launch_valid_vmcs +ffffffff8252b4b4 t vmx_exit_handler_asm +ffffffff8252b579 t restore_host +ffffffff8252b610 T svm_enter_guest +ffffffff8252b7a0 t restore_host_svm +ffffffff8252c000 T sdmmc_match +ffffffff8252c050 T sdmmc_attach +ffffffff8252c390 T sdmmc_detach +ffffffff8252c440 T sdmmc_activate +ffffffff8252c510 T sdmmc_discover_task +ffffffff8252c5d0 T sdmmc_create_thread +ffffffff8252c640 T sdmmc_holds_root_device +ffffffff8252c6a0 T sdmmc_task_thread +ffffffff8252c890 T sdmmc_needs_discover +ffffffff8252c940 T sdmmc_del_task +ffffffff8252c9f0 T sdmmc_card_detach +ffffffff8252cad0 T sdmmc_add_task +ffffffff8252cb50 T sdmmc_card_attach +ffffffff8252cc60 T sdmmc_enable +ffffffff8252cdb0 T sdmmc_scan +ffffffff8252ce40 T sdmmc_init +ffffffff8252cf40 T sdmmc_disable +ffffffff8252d0a0 T sdmmc_function_free +ffffffff8252d0c0 T sdmmc_delay +ffffffff8252d110 T sdmmc_select_card +ffffffff8252d330 T sdmmc_set_bus_power +ffffffff8252d4e0 T sdmmc_function_alloc +ffffffff8252d570 T sdmmc_app_command +ffffffff8252d700 T sdmmc_mmc_command +ffffffff8252d780 T sdmmc_go_idle_state +ffffffff8252d890 T sdmmc_send_if_cond +ffffffff8252d9e0 T sdmmc_set_relative_addr +ffffffff8252e000 T sdmmc_cisptr +ffffffff8252e0a0 T sdmmc_read_cis +ffffffff8252e3e0 T sdmmc_print_cis +ffffffff8252e550 T sdmmc_check_cis_quirks +ffffffff8252f000 T sdmmc_io_enable +ffffffff8252f2a0 T sdmmc_io_reset +ffffffff8252f3d0 T sdmmc_io_send_op_cond +ffffffff8252f540 T sdmmc_io_scan +ffffffff8252f690 T sdmmc_io_init +ffffffff8252f7c0 T sdmmc_io_set_highspeed +ffffffff8252fa60 T sdmmc_io_set_bus_width +ffffffff8252fcf0 T sdmmc_io_function_ready +ffffffff8252fe70 T sdmmc_io_read_1 +ffffffff8252ffc0 T sdmmc_io_function_enable +ffffffff82530390 T sdmmc_io_write_1 +ffffffff82530510 T sdmmc_io_function_disable +ffffffff82530790 T sdmmc_io_attach +ffffffff82530880 T sdmmc_print +ffffffff82530ad0 T sdmmc_submatch +ffffffff82530b50 T sdmmc_io_detach +ffffffff82530c00 T sdmmc_io_rw_direct +ffffffff82530da0 T sdmmc_io_rw_extended_subr +ffffffff82530f40 T sdmmc_io_rw_extended +ffffffff82531340 T sdmmc_io_read_2 +ffffffff825314a0 T sdmmc_io_write_2 +ffffffff82531600 T sdmmc_io_read_4 +ffffffff82531760 T sdmmc_io_write_4 +ffffffff825318c0 T sdmmc_io_read_multi_1 +ffffffff825319b0 T sdmmc_io_write_multi_1 +ffffffff82531aa0 T sdmmc_io_read_region_1 +ffffffff82531b90 T sdmmc_io_write_region_1 +ffffffff82531c80 T sdmmc_io_xchg +ffffffff82531e10 T sdmmc_intr_enable +ffffffff82532080 T sdmmc_intr_disable +ffffffff825322f0 T sdmmc_intr_establish +ffffffff825323f0 T sdmmc_intr_disestablish +ffffffff825324e0 T sdmmc_card_intr +ffffffff82532530 T sdmmc_intr_task +ffffffff825325c0 T sdmmc_io_set_blocklen +ffffffff82533000 T sdmmc_mem_enable +ffffffff82533450 T sdmmc_mem_send_op_cond +ffffffff82533600 T sdmmc_mem_signal_voltage +ffffffff825336c0 T sdmmc_mem_scan +ffffffff825339d0 T sdmmc_decode_csd +ffffffff82533e00 T sdmmc_decode_cid +ffffffff825342a0 T sdmmc_mem_send_scr +ffffffff825343e0 T sdmmc_mem_decode_scr +ffffffff82534440 T sdmmc_mem_send_cxd_data +ffffffff825345b0 T sdmmc_mem_set_bus_width +ffffffff825346c0 T sdmmc_mem_sd_switch +ffffffff82534970 T sdmmc_be512_to_bitfield512 +ffffffff82534a20 T sdmmc_mem_mmc_switch +ffffffff82534b10 T sdmmc_mem_init +ffffffff82534c60 T sdmmc_mem_set_blocklen +ffffffff82534d60 T sdmmc_mem_sd_init +ffffffff82535140 T sdmmc_mem_mmc_init +ffffffff82535800 T sdmmc_mem_select_transfer_mode +ffffffff82535880 T sdmmc_mem_execute_tuning +ffffffff82535910 T sdmmc_mem_read_block_subr +ffffffff82535c70 T sdmmc_mem_single_read_block +ffffffff82535d40 T sdmmc_mem_read_block +ffffffff82535ef0 T sdmmc_mem_write_block_subr +ffffffff82536240 T sdmmc_mem_single_write_block +ffffffff82536310 T sdmmc_mem_write_block +ffffffff825364c0 T sdmmc_mem_hibernate_write +ffffffff82537000 T sdmmc_scsi_cmd +ffffffff825371f0 T sdmmc_minphys +ffffffff82537270 T sdmmc_scsi_attach +ffffffff82537460 T sdmmc_alloc_ccbs +ffffffff825375a0 T sdmmc_free_ccbs +ffffffff82537600 T sdmmc_scsi_detach +ffffffff82537760 T sdmmc_stimeout +ffffffff825377e0 T sdmmc_ccb_alloc +ffffffff82537890 T sdmmc_ccb_free +ffffffff82537970 T sdmmc_inquiry +ffffffff82537be0 T sdmmc_start_xs +ffffffff82537cd0 T sdmmc_complete_xs +ffffffff82537da0 T sdmmc_done_xs +ffffffff82537df0 T sdmmc_scsi_hibernate_io +ffffffff82538000 T bwfm_sdio_preinit +ffffffff825384a0 T bwfm_sdio_txcheck +ffffffff825384e0 T bwfm_sdio_txdata +ffffffff82538550 T bwfm_sdio_txctl +ffffffff825386a0 T bwfm_sdio_buscore_read +ffffffff825386b0 T bwfm_sdio_buscore_write +ffffffff825386d0 T bwfm_sdio_buscore_prepare +ffffffff82538810 T bwfm_sdio_buscore_activate +ffffffff82538890 T bwfm_sdio_match +ffffffff82538940 T bwfm_sdio_attach +ffffffff82538c00 T bwfm_sdio_detach +ffffffff82538c60 T bwfm_sdio_task +ffffffff82538dc0 T bwfm_sdio_write_1 +ffffffff82538df0 T bwfm_sdio_read_1 +ffffffff82538e20 T bwfm_sdio_write_4 +ffffffff82538ed0 T bwfm_sdio_read_4 +ffffffff82538f80 T bwfm_sdio_load_microcode +ffffffff825391e0 T bwfm_sdio_clkctl +ffffffff82539310 T bwfm_sdio_dev_write +ffffffff82539360 T bwfm_sdio_intr +ffffffff825393a0 T bwfm_sdio_ram_read_write +ffffffff825395d0 T bwfm_sdio_htclk +ffffffff82539840 T bwfm_sdio_readshared +ffffffff82539910 T bwfm_sdio_dev_read +ffffffff82539950 T bwfm_sdio_rx_frames +ffffffff82539d00 T bwfm_sdio_tx_frames +ffffffff82539e00 T bwfm_sdio_backplane +ffffffff82539eb0 T bwfm_sdio_buf_read +ffffffff82539f90 T bwfm_sdio_buf_write +ffffffff8253a040 T bwfm_sdio_frame_read_write +ffffffff8253a1c0 T bwfm_sdio_newbuf +ffffffff8253a240 T bwfm_sdio_tx_ok +ffffffff8253a2a0 T bwfm_sdio_tx_ctrlframe +ffffffff8253a3a0 T bwfm_sdio_tx_dataframe +ffffffff8253a4f0 T bwfm_sdio_rx_glom +ffffffff8253b000 T onewire_match +ffffffff8253b050 T onewire_attach +ffffffff8253b0f0 T onewire_detach +ffffffff8253b160 T onewire_activate +ffffffff8253b180 T onewire_scan +ffffffff8253b3a0 T onewire_createthread +ffffffff8253b410 T onewire_print +ffffffff8253b4e0 T onewirebus_print +ffffffff8253b530 T onewire_lock +ffffffff8253b550 T onewire_unlock +ffffffff8253b570 T onewire_reset +ffffffff8253b590 T onewire_bit +ffffffff8253b5b0 T onewire_read_byte +ffffffff8253b6f0 T onewire_write_byte +ffffffff8253b7d0 T onewire_read_block +ffffffff8253b870 T onewire_write_block +ffffffff8253b910 T onewire_triplet +ffffffff8253b9f0 T onewire_matchrom +ffffffff8253bb40 T onewire_search +ffffffff8253bee0 T onewire_thread +ffffffff8253c000 T onewire_crc +ffffffff8253c0b0 T onewire_crc16 +ffffffff8253c170 T onewire_famname +ffffffff8253c1b0 T onewire_matchbyfam +ffffffff8253d000 T owid_match +ffffffff8253d030 T owid_attach +ffffffff8253d100 T owid_detach +ffffffff8253d140 T owid_activate +ffffffff8253e000 T owsbm_match +ffffffff8253e030 T owsbm_attach +ffffffff8253e1d0 T owsbm_detach +ffffffff8253e240 T owsbm_activate +ffffffff8253e270 T owsbm_update +ffffffff8253f000 T owtemp_match +ffffffff8253f030 T owtemp_attach +ffffffff8253f130 T owtemp_detach +ffffffff8253f1a0 T owtemp_activate +ffffffff8253f1d0 T owtemp_update +ffffffff82540000 T owctr_match +ffffffff82540030 T owctr_attach +ffffffff82540180 T owctr_detach +ffffffff825401f0 T owctr_activate +ffffffff82540220 T owctr_update +ffffffff82540250 T owctr_update_counter +ffffffff82541000 A __text_page_start +ffffffff82541000 T Xsyscall_meltdown +ffffffff8254100c T Xsyscall +ffffffff8254126e t Xsyscall_trampback +ffffffff82541280 T intr_user_exit +ffffffff825412c2 t intr_user_exit_post_ast +ffffffff825413ee t Xiretq_trampback +ffffffff825413fa T doreti_iret +ffffffff82542000 T alltraps +ffffffff82542138 T recall_trap +ffffffff82542150 T alltraps_kern +ffffffff82542153 T alltraps_kern_meltdown +ffffffff82543000 ? Xsyscall32 +ffffffff82543000 A __kutext_start +ffffffff82543000 A __text_page_end +ffffffff82544000 ? Xtrap00 +ffffffff82544010 ? Xtrap01 +ffffffff82544020 ? Xtrap02 +ffffffff82544028 c calltrap_specstk +ffffffff825440f0 ? calltrap_specstk_tramp +ffffffff82544110 ? Xtrap03 +ffffffff82544120 ? Xtrap04 +ffffffff82544130 ? Xtrap05 +ffffffff82544140 ? Xtrap06 +ffffffff82544150 ? Xtrap07 +ffffffff82544160 ? Xtrap08 +ffffffff82544170 ? Xtrap09 +ffffffff82544180 ? Xtrap0a +ffffffff82544190 ? Xtrap0b +ffffffff825441a0 ? Xtrap0c +ffffffff825441b0 ? Xtrap0d +ffffffff82544240 ? Xtrap0e +ffffffff82544250 ? Xintrspurious +ffffffff82544250 ? Xtrap0f +ffffffff82544260 ? Xtrap10 +ffffffff82544270 ? Xtrap11 +ffffffff82544280 ? Xtrap12 +ffffffff82544290 ? Xtrap13 +ffffffff825442a0 ? Xtrap14 +ffffffff825442b0 ? Xtrap15 +ffffffff825442c0 ? Xtrap16 +ffffffff825442c0 ? Xtrap17 +ffffffff825442c0 ? Xtrap18 +ffffffff825442c0 ? Xtrap19 +ffffffff825442c0 ? Xtrap1a +ffffffff825442c0 ? Xtrap1b +ffffffff825442c0 ? Xtrap1c +ffffffff825442c0 ? Xtrap1d +ffffffff825442c0 ? Xtrap1e +ffffffff825442c0 ? Xtrap1f +ffffffff825442d0 ? x2apic_eoi +ffffffff825442f0 ? Xintr_lapic_ipi +ffffffff82544330 ? Xipi_invltlb +ffffffff82544360 ? Xipi_invlpg +ffffffff82544390 ? Xipi_invlrange +ffffffff825443d0 ? Xipi_invltlb_pcid +ffffffff82544410 ? Xipi_invlpg_pcid +ffffffff82544460 ? Xipi_invlrange_pcid +ffffffff825444d0 ? Xintr_lapic_ltimer +ffffffff82544510 ? Xintr_xen_upcall +ffffffff82544550 ? Xintr_hyperv_upcall +ffffffff82544590 ? Xintr_legacy0 +ffffffff825445d0 ? Xintr_legacy1 +ffffffff82544610 ? Xintr_legacy2 +ffffffff82544650 ? Xintr_legacy3 +ffffffff82544690 ? Xintr_legacy4 +ffffffff825446d0 ? Xintr_legacy5 +ffffffff82544710 ? Xintr_legacy6 +ffffffff82544750 ? Xintr_legacy7 +ffffffff82544790 ? Xintr_legacy8 +ffffffff825447d0 ? Xintr_legacy9 +ffffffff82544810 ? Xintr_legacy10 +ffffffff82544850 ? Xintr_legacy11 +ffffffff82544890 ? Xintr_legacy12 +ffffffff825448d0 ? Xintr_legacy13 +ffffffff82544910 ? Xintr_legacy14 +ffffffff82544950 ? Xintr_legacy15 +ffffffff82544990 ? Xintr_ioapic_edge0 +ffffffff825449d0 ? Xintr_ioapic_edge1 +ffffffff82544a10 ? Xintr_ioapic_edge2 +ffffffff82544a50 ? Xintr_ioapic_edge3 +ffffffff82544a90 ? Xintr_ioapic_edge4 +ffffffff82544ad0 ? Xintr_ioapic_edge5 +ffffffff82544b10 ? Xintr_ioapic_edge6 +ffffffff82544b50 ? Xintr_ioapic_edge7 +ffffffff82544b90 ? Xintr_ioapic_edge8 +ffffffff82544bd0 ? Xintr_ioapic_edge9 +ffffffff82544c10 ? Xintr_ioapic_edge10 +ffffffff82544c50 ? Xintr_ioapic_edge11 +ffffffff82544c90 ? Xintr_ioapic_edge12 +ffffffff82544cd0 ? Xintr_ioapic_edge13 +ffffffff82544d10 ? Xintr_ioapic_edge14 +ffffffff82544d50 ? Xintr_ioapic_edge15 +ffffffff82544d90 ? Xintr_ioapic_edge16 +ffffffff82544dd0 ? Xintr_ioapic_edge17 +ffffffff82544e10 ? Xintr_ioapic_edge18 +ffffffff82544e50 ? Xintr_ioapic_edge19 +ffffffff82544e90 ? Xintr_ioapic_edge20 +ffffffff82544ed0 ? Xintr_ioapic_edge21 +ffffffff82544f10 ? Xintr_ioapic_edge22 +ffffffff82544f50 ? Xintr_ioapic_edge23 +ffffffff82544f90 ? Xintr_ioapic_edge24 +ffffffff82544fd0 ? Xintr_ioapic_edge25 +ffffffff82545010 ? Xintr_ioapic_edge26 +ffffffff82545050 ? Xintr_ioapic_edge27 +ffffffff82545090 ? Xintr_ioapic_edge28 +ffffffff825450d0 ? Xintr_ioapic_edge29 +ffffffff82545110 ? Xintr_ioapic_edge30 +ffffffff82545150 ? Xintr_ioapic_edge31 +ffffffff82545190 ? Xintr_ioapic_edge32 +ffffffff825451d0 ? Xintr_ioapic_edge33 +ffffffff82545210 ? Xintr_ioapic_edge34 +ffffffff82545250 ? Xintr_ioapic_edge35 +ffffffff82545290 ? Xintr_ioapic_edge36 +ffffffff825452d0 ? Xintr_ioapic_edge37 +ffffffff82545310 ? Xintr_ioapic_edge38 +ffffffff82545350 ? Xintr_ioapic_edge39 +ffffffff82545390 ? Xintr_ioapic_edge40 +ffffffff825453d0 ? Xintr_ioapic_edge41 +ffffffff82545410 ? Xintr_ioapic_edge42 +ffffffff82545450 ? Xintr_ioapic_edge43 +ffffffff82545490 ? Xintr_ioapic_edge44 +ffffffff825454d0 ? Xintr_ioapic_edge45 +ffffffff82545510 ? Xintr_ioapic_edge46 +ffffffff82545550 ? Xintr_ioapic_edge47 +ffffffff82545590 ? Xintr_ioapic_edge48 +ffffffff825455d0 ? Xintr_ioapic_edge49 +ffffffff82545610 ? Xintr_ioapic_edge50 +ffffffff82545650 ? Xintr_ioapic_edge51 +ffffffff82545690 ? Xintr_ioapic_edge52 +ffffffff825456d0 ? Xintr_ioapic_edge53 +ffffffff82545710 ? Xintr_ioapic_edge54 +ffffffff82545750 ? Xintr_ioapic_edge55 +ffffffff82545790 ? Xintr_ioapic_edge56 +ffffffff825457d0 ? Xintr_ioapic_edge57 +ffffffff82545810 ? Xintr_ioapic_edge58 +ffffffff82545850 ? Xintr_ioapic_edge59 +ffffffff82545890 ? Xintr_ioapic_edge60 +ffffffff825458d0 ? Xintr_ioapic_edge61 +ffffffff82545910 ? Xintr_ioapic_edge62 +ffffffff82545950 ? Xintr_ioapic_edge63 +ffffffff82545990 ? Xintr_ioapic_level0 +ffffffff825459d0 ? Xintr_ioapic_level1 +ffffffff82545a10 ? Xintr_ioapic_level2 +ffffffff82545a50 ? Xintr_ioapic_level3 +ffffffff82545a90 ? Xintr_ioapic_level4 +ffffffff82545ad0 ? Xintr_ioapic_level5 +ffffffff82545b10 ? Xintr_ioapic_level6 +ffffffff82545b50 ? Xintr_ioapic_level7 +ffffffff82545b90 ? Xintr_ioapic_level8 +ffffffff82545bd0 ? Xintr_ioapic_level9 +ffffffff82545c10 ? Xintr_ioapic_level10 +ffffffff82545c50 ? Xintr_ioapic_level11 +ffffffff82545c90 ? Xintr_ioapic_level12 +ffffffff82545cd0 ? Xintr_ioapic_level13 +ffffffff82545d10 ? Xintr_ioapic_level14 +ffffffff82545d50 ? Xintr_ioapic_level15 +ffffffff82545d90 ? Xintr_ioapic_level16 +ffffffff82545dd0 ? Xintr_ioapic_level17 +ffffffff82545e10 ? Xintr_ioapic_level18 +ffffffff82545e50 ? Xintr_ioapic_level19 +ffffffff82545e90 ? Xintr_ioapic_level20 +ffffffff82545ed0 ? Xintr_ioapic_level21 +ffffffff82545f10 ? Xintr_ioapic_level22 +ffffffff82545f50 ? Xintr_ioapic_level23 +ffffffff82545f90 ? Xintr_ioapic_level24 +ffffffff82545fd0 ? Xintr_ioapic_level25 +ffffffff82546010 ? Xintr_ioapic_level26 +ffffffff82546050 ? Xintr_ioapic_level27 +ffffffff82546090 ? Xintr_ioapic_level28 +ffffffff825460d0 ? Xintr_ioapic_level29 +ffffffff82546110 ? Xintr_ioapic_level30 +ffffffff82546150 ? Xintr_ioapic_level31 +ffffffff82546190 ? Xintr_ioapic_level32 +ffffffff825461d0 ? Xintr_ioapic_level33 +ffffffff82546210 ? Xintr_ioapic_level34 +ffffffff82546250 ? Xintr_ioapic_level35 +ffffffff82546290 ? Xintr_ioapic_level36 +ffffffff825462d0 ? Xintr_ioapic_level37 +ffffffff82546310 ? Xintr_ioapic_level38 +ffffffff82546350 ? Xintr_ioapic_level39 +ffffffff82546390 ? Xintr_ioapic_level40 +ffffffff825463d0 ? Xintr_ioapic_level41 +ffffffff82546410 ? Xintr_ioapic_level42 +ffffffff82546450 ? Xintr_ioapic_level43 +ffffffff82546490 ? Xintr_ioapic_level44 +ffffffff825464d0 ? Xintr_ioapic_level45 +ffffffff82546510 ? Xintr_ioapic_level46 +ffffffff82546550 ? Xintr_ioapic_level47 +ffffffff82546590 ? Xintr_ioapic_level48 +ffffffff825465d0 ? Xintr_ioapic_level49 +ffffffff82546610 ? Xintr_ioapic_level50 +ffffffff82546650 ? Xintr_ioapic_level51 +ffffffff82546690 ? Xintr_ioapic_level52 +ffffffff825466d0 ? Xintr_ioapic_level53 +ffffffff82546710 ? Xintr_ioapic_level54 +ffffffff82546750 ? Xintr_ioapic_level55 +ffffffff82546790 ? Xintr_ioapic_level56 +ffffffff825467d0 ? Xintr_ioapic_level57 +ffffffff82546810 ? Xintr_ioapic_level58 +ffffffff82546850 ? Xintr_ioapic_level59 +ffffffff82546890 ? Xintr_ioapic_level60 +ffffffff825468d0 ? Xintr_ioapic_level61 +ffffffff82546910 ? Xintr_ioapic_level62 +ffffffff82546950 ? Xintr_ioapic_level63 +ffffffff82547000 ? codepatch_fill_nop +ffffffff82547000 A __cptext_start +ffffffff82547000 A __kutext_end +ffffffff825470b0 ? codepatch_maprw +ffffffff82547190 ? codepatch_unmaprw +ffffffff82547200 ? codepatch_nop +ffffffff82547360 ? codepatch_replace +ffffffff82547510 ? codepatch_call +ffffffff82547530 ? codepatch_jmp +ffffffff82548000 A __cptext_end +ffffffff82548000 A __rodata_start +ffffffff82548000 C _etext +ffffffff82548000 C etext +ffffffff82549000 r seeprom_read +ffffffff82549004 r icl_mg_pll_find_divisors.div1_vals +ffffffff82549028 r gen9bc_tgp_ddc_pin_map +ffffffff82549038 r athn_ac2qid +ffffffff82549038 r athn_ac2qid +ffffffff82549038 r athn_ac2qid +ffffffff82549044 r rtwn_get_rssi.cckoff +ffffffff8254906c r rsu_ac2qid +ffffffff8254907c r pckbc_portcmd +ffffffff82549080 r tht_fifo_write_pad.pad +ffffffff82549088 r rsu_get_rssi.cckoff +ffffffff8254909c r adlp_n_revids +ffffffff825490ec r apple_iso_trans +ffffffff825490f0 r dg2_g12_revid_step_tbl +ffffffff825490f8 r wihap_check_tx.txratetable +ffffffff825490fc r dmamode +ffffffff82549120 r gen9_edram_size_mb.sets +ffffffff8254a000 r isomappings +ffffffff8254a080 r unimappings +ffffffff8254a230 r replacements +ffffffff8254d93f r apollo_pio_rec +ffffffff825966bd r apollo_udma33_tim +ffffffff825a9ea8 r pp_r600_decoded_lanes +ffffffff825dcbef r cmd680_setup_channel.udma_tbl +ffffffff825e4813 r apollo_udma100_tim +ffffffff825e4819 r cmd0646_9_tim_udma +ffffffff825f21ce r substchar +ffffffff82642ee3 r apollo_udma133_tim +ffffffff82642eea r apollo_udma66_tim +ffffffff82642f14 r cy_pio_rec +ffffffff82647ee0 R drm_ca +ffffffff82647f08 R drm_filtops +ffffffff82647f38 R drmread_filtops +ffffffff82648000 r vga_emulops +ffffffff82648048 R vga_stdscreen +ffffffff82648078 R vga_stdscreen_mono +ffffffff826480a8 R vga_stdscreen_bf +ffffffff826480d8 R vga_40lscreen +ffffffff82648108 R vga_40lscreen_mono +ffffffff82648138 R vga_40lscreen_bf +ffffffff82648168 R vga_50lscreen +ffffffff82648198 R vga_50lscreen_mono +ffffffff826481c8 R vga_50lscreen_bf +ffffffff826481f8 R vga_screenlist +ffffffff82648208 R vga_screenlist_mono +ffffffff82648218 R vga_accessops +ffffffff82648278 r i945_wm_info +ffffffff826482b8 r bgansitopc +ffffffff826482c0 r pctoansi +ffffffff82648300 r sdma_offsets +ffffffff82648300 r sdma_offsets +ffffffff82648338 r iha_rate_tbl +ffffffff82648370 r i830_a_wm_info +ffffffff826483a8 r gen9_edram_size_mb.ways +ffffffff82648408 r aggr_periodic_times +ffffffff82648490 r jsl_ehl_revids +ffffffff82648508 r michael_final.pad +ffffffff82648530 r rt_copysa.maskarray +ffffffff82648538 r i915_wm_info +ffffffff82648540 r amdgpu_ih_clientid_jpeg +ffffffff82648540 r amdgpu_ih_clientid_uvds +ffffffff82648540 r amdgpu_ih_clientid_vcns +ffffffff82648540 r amdgpu_ih_clientid_vcns +ffffffff82648540 r amdgpu_ih_clientid_vcns +ffffffff82648578 r vga_setfontset.cmaptabb +ffffffff82648590 r tgl_revids +ffffffff826485f0 r i830_bc_wm_info +ffffffff82648660 r hsw_activate_psr2.map +ffffffff82648698 r __drm_universal_plane_init.default_modifiers +ffffffff826486a8 r iwn_tid2fifo +ffffffff826486c0 r vga_setfontset.cmaptaba +ffffffff826486c8 r crtc_offsets +ffffffff826486c8 r crtc_offsets +ffffffff826486c8 r crtc_offsets +ffffffff826486e8 r link_speed +ffffffff826486e8 r link_speed +ffffffff826486e8 r link_speed +ffffffff82648770 r rtwn_r88e_get_rssi.cckoff +ffffffff82649000 R edid_vendors +ffffffff826492c0 R edid_nvendors +ffffffff826492d0 R edid_products +ffffffff82649330 R edid_nproducts +ffffffff82649340 r _edid_modes +ffffffff8264a000 R videomode_list +ffffffff8264b080 R videomode_count +ffffffff8264c000 r ahc_hard_errors +ffffffff8264c080 r critical_sections +ffffffff8264c0b0 r patches +ffffffff8264cd50 r seqprog +ffffffff8264e000 r ahc_switch +ffffffff8264f000 r termstat_strings +ffffffff8264f020 r critical_sections +ffffffff8264f060 r seqprog +ffffffff8264fd50 r patches +ffffffff82651000 r ahd_switch +ffffffff82652000 R aic_switch +ffffffff82653000 R adw_switch +ffffffff82654000 R gdt_switch +ffffffff82655000 R twe_switch +ffffffff82656000 R ciss_switch +ffffffff82656030 R ciss_level +ffffffff82656050 R ciss_stat +ffffffff82657000 R ami_switch +ffffffff82657028 R ami_raw_switch +ffffffff82658000 R mfi_switch +ffffffff82658028 R mfi_pd_switch +ffffffff82658050 r mfi_iop_xscale +ffffffff82658080 r mfi_iop_ppc +ffffffff826580b0 r mfi_iop_gen2 +ffffffff826580e0 r mfi_iop_skinny +ffffffff82658110 r mfi_bbu_indicators +ffffffff82659000 R qlw_switch +ffffffff8265a000 R isp_2100_risc_code +ffffffff8266cbf0 R isp_2200_risc_code +ffffffff8267f990 R isp_2300_risc_code +ffffffff82699408 R qla_switch +ffffffff82699430 r qla_regs_2100 +ffffffff82699460 r qla_regs_2200 +ffffffff82699490 r qla_regs_23XX +ffffffff8269a000 R ahci_atascsi_methods +ffffffff8269b000 R nvme_switch +ffffffff8269b028 r nvme_ops +ffffffff8269c000 R mpi_switch +ffffffff8269c060 r bwi_rf_calc_nrssi_slope_11b.save_phy_regs +ffffffff8269c090 r chv_oa_mux_regs +ffffffff8269c0b0 r fiji_clock_stretcher_lookup_table +ffffffff8269c0b0 r tonga_clock_stretcher_lookup_table +ffffffff8269c0d0 r iosf_pci_devices +ffffffff8269c0f0 r link_speed +ffffffff8269c0f0 r link_speed +ffffffff8269c0f0 r link_speed +ffffffff8269c130 r drm_fb_xfrm.default_dst_pitch +ffffffff8269c130 r non_supported_protection +ffffffff8269c230 r tgl_uy_revids +ffffffff8269c280 r bwi_phy_noise_11g_rev1 +ffffffff8269c2f0 r cardslot_process_event.antonym_ev +ffffffff8269c370 r gen11_oa_mux_regs +ffffffff8269c470 r ddr2_cycle_tenths +ffffffff8269c4e0 r rtw_intr_rx.ratetbl +ffffffff8269c550 r abm_config +ffffffff8269c5c0 r getbootinfo.ports +ffffffff8269c610 r reg_offsets +ffffffff8269c620 r bwi_rf_lo_measure_11g.rf_lo_adjust +ffffffff8269c630 r init_non_clock_fields.look_up +ffffffff8269c640 r uftdi_8u232am_getrate.roundoff +ffffffff8269c690 r zyd_rx_data.rates +ffffffff8269c6b0 r ieee80211_ra_valid_tx_mcs.max_mcs +ffffffff8269c6e0 r mmio_invalidate_full.gen8_regs +ffffffff8269c710 r bwi_phy_noise_11g +ffffffff8269c720 r hpt366_pio +ffffffff8269c750 r glk_revids +ffffffff8269c790 r bwi_rf_calc_nrssi_slope_11g.save_phy3_regs +ffffffff8269c7b0 r ether_crc32_be_update.rev +ffffffff8269c7b0 r rtw_grf5101_mac_crypt.caesar +ffffffff8269c800 r snb_b_fdi_train_param +ffffffff8269c8d0 r intel_hpll_vco.elk_vco +ffffffff8269c930 r pin_offsets +ffffffff8269c970 r firmware_list +ffffffff8269c9d0 r atom_arg_shift +ffffffff8269c9d0 r atom_arg_shift +ffffffff8269ca10 r pf_syncookie_wstab +ffffffff8269ca30 r ieee80211_media_init.mopts +ffffffff8269ca90 r add_entropy_words.twist_table +ffffffff8269cb30 r urtw_8225v2_txpwr_cck +ffffffff8269cb50 r bwfm_pci_prio2fifo +ffffffff8269cb50 r ieee80211_up_to_ac.up_to_ac +ffffffff8269cc10 r paritytab +ffffffff8269cc10 r x86emu_parity_tab +ffffffff8269cc30 r legacy_connector_convert +ffffffff8269cc70 r gen7_oa_mux_regs +ffffffff8269cc90 r hsw_oa_mux_regs +ffffffff8269ccb0 r notetab +ffffffff8269ccd0 r urtw_8225v2_txpwr_cck_ch14 +ffffffff8269ccf0 r bwi_rf_calibval.rf_calibvals +ffffffff8269cd90 r pf_syncookie_msstab +ffffffff8269cdf0 r xgmi3x16_pcs_err_status_reg_aldebaran +ffffffff8269ce50 r uath_wme_init.uath_wme_11g +ffffffff8269ce70 r gen7_oa_b_counters +ffffffff8269cfd0 r icl_revids +ffffffff8269d090 r rtwn_iq_calib_run.reg_adda +ffffffff8269d0d0 r atom_def_dst +ffffffff8269d0d0 r atom_def_dst +ffffffff8269d110 r sha256_initial_hash_value +ffffffff8269d170 r otus_edca_def +ffffffff8269d190 r intel_hpll_vco.blb_vco +ffffffff8269d250 r epic_pci_subsys_info +ffffffff8269d270 r atom_arg_mask +ffffffff8269d270 r atom_arg_mask +ffffffff8269d2d0 r butmap +ffffffff8269d310 r GFX_RLC_SRM_INDEX_CNTL_DATA_OFFSETS +ffffffff8269d350 r comsoft.lsrmap +ffffffff8269d390 r tulip_mii_phy_readspecific.table +ffffffff8269d3b0 r kbl_revids +ffffffff8269d450 r intel_hpll_vco.pnv_vco +ffffffff8269d4b0 r dmapageport +ffffffff8269d570 r intel_hpll_vco.ctg_vco +ffffffff8269d630 r drm_calculate_luminance_range.pre_computed_values +ffffffff8269e000 R sili_atascsi_methods +ffffffff8269f000 R ncr53c9x_switch +ffffffff826a0000 r scf_period +ffffffff826a1000 R siop_script +ffffffff826a15a0 R lun_switch +ffffffff826a15d0 R tag_switch +ffffffff826a1660 R load_dsa +ffffffff826a16c4 R siop_led_on +ffffffff826a16cc R siop_led_off +ffffffff826a16d8 R siop_switch +ffffffff826a2000 R ep_vortex_media +ffffffff826a2100 R ep_default_to_media +ffffffff826a3000 R wi_card_ident +ffffffff826a5000 R ucode_table +ffffffff826a6000 r re_revisions +ffffffff826a6290 r re_kstats_tpl +ffffffff826a8000 R smc91cxx_media +ffffffff826a8010 R smc91cxx_mii_bitbang_ops +ffffffff826a9000 R dl10019_mii_bitbang_ops +ffffffff826a9028 R dl10022_mii_bitbang_ops +ffffffff826aa000 R ax88190_mii_bitbang_ops +ffffffff826ac000 R ac97_audio_default +ffffffff826ac020 R ac97_on_off +ffffffff826ac324 R ac97_mic_select +ffffffff826ac628 R ac97_mono_select +ffffffff826ac92c R ac97_source +ffffffff826acc30 R ac97_volume_stereo +ffffffff826acc4c R ac97_volume_mono +ffffffff826acc70 R source_info +ffffffff826ad470 R ac97_ad +ffffffff826ad580 R ac97_ak +ffffffff826ad610 R ac97_av +ffffffff826ad750 R ac97_rl +ffffffff826ad7a0 R ac97_cm +ffffffff826ad820 R ac97_cr +ffffffff826ad840 R ac97_cs +ffffffff826ad920 R ac97_cx +ffffffff826ad980 R ac97_dt +ffffffff826ad9a0 R ac97_em +ffffffff826ad9d0 R ac97_es +ffffffff826ad9f0 R ac97_is +ffffffff826ada10 R ac97_ic +ffffffff826ada90 R ac97_it +ffffffff826adac0 R ac97_ns +ffffffff826adb80 R ac97_ps +ffffffff826adbb0 R ac97_sl +ffffffff826adbd0 R ac97_st +ffffffff826add20 R ac97_vi +ffffffff826add50 R ac97_tt +ffffffff826addd0 R ac97_ti +ffffffff826addf0 R ac97_wb +ffffffff826ade10 R ac97_wo +ffffffff826adea0 R ac97_ym +ffffffff826adef0 R ac97_vendors +ffffffff826ae1f0 R ac97enhancement +ffffffff826ae2f0 R ac97feature +ffffffff826af000 R lm_chips +ffffffff826af020 R lm78_sensors +ffffffff826af1a0 R w83627hf_sensors +ffffffff826af3a0 R w83627ehf_sensors +ffffffff826af5c0 R w83627dhg_sensors +ffffffff826af7c0 R nct6776f_sensors +ffffffff826afa00 R nct6779d_sensors +ffffffff826afd60 R w83637hf_sensors +ffffffff826aff20 R w83697hf_sensors +ffffffff826b00c0 R w83781d_sensors +ffffffff826b0280 R w83782d_sensors +ffffffff826b0480 R w83783s_sensors +ffffffff826b0600 R w83791d_sensors +ffffffff826b0860 R w83792d_sensors +ffffffff826b0ae0 R as99127f_sensors +ffffffff826b1000 r ar5k_known_products +ffffffff826b1110 r ar5111_gain_opt +ffffffff826b11e0 r ar5112_gain_opt +ffffffff826b12b0 r ar5k_5ghz_channels +ffffffff826b1a00 r ar5k_2ghz_channels +ffffffff826b1f10 r ar5111_rf +ffffffff826b2350 r ar5112a_rf +ffffffff826b2890 r ar5112_rf +ffffffff826b2da0 r ar5413_rf +ffffffff826b31b0 r ar2413_rf +ffffffff826b34d0 r ar2425_rf +ffffffff826b3830 r ar5111_rfg +ffffffff826b3b30 r ar5112_rfg +ffffffff826b3e30 r ar5413_rfg +ffffffff826b4130 r ar2413_rfg +ffffffff826b4430 r ar5k_rt_11a +ffffffff826b4552 r ar5k_rt_11b +ffffffff826b4674 r ar5k_rt_11g +ffffffff826b4796 r ar5k_rt_xr +ffffffff826b5000 r ar5210_ini +ffffffff826b6000 r ar5211_mode +ffffffff826b62c0 r ar5211_ini +ffffffff826b6ad0 r ar5211_rf +ffffffff826b7000 r ar5212_pcie +ffffffff826b7080 r ar5212_mode +ffffffff826b7310 r ar5212_ini +ffffffff826b7c80 r ar5212_ar5111_mode +ffffffff826b7f20 r ar5212_ar5112_mode +ffffffff826b81b0 r ar5413_mode +ffffffff826b8b10 r ar2413_mode +ffffffff826b9430 r ar2425_mode +ffffffff826b9d90 r ar5111_bbgain +ffffffff826ba090 r ar5112_bbgain +ffffffff826bb000 r athn_5ghz_chans +ffffffff826bb020 r athn_rates +ffffffff826bc000 r athn_rates +ffffffff826bd000 r ar9160_ini +ffffffff826bd068 r ar5416_ini +ffffffff826bd0d0 r ar5416_serdes +ffffffff826bd0e8 r ar9160_1_1_addac +ffffffff826bd0f8 r ar9160_1_0_addac +ffffffff826bd108 r ar5416_2_2_addac +ffffffff826bd118 r ar5416_2_1_addac +ffffffff826bd128 r ar5416_set_power_calib.chainoffset +ffffffff826bd140 r ar9160_bank6tpc_vals +ffffffff826bd1c0 r ar5416_bank6tpc_vals +ffffffff826bd240 r ar5416_bb_rfgain_vals_2g +ffffffff826bd340 r ar5416_bb_rfgain_vals_5g +ffffffff826bd440 r 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ar9380_2_2_tx_gain_high_power_vals_5g +ffffffff826cb380 r ar9380_2_2_tx_gain_high_power_vals_2g +ffffffff826cb520 r ar9380_2_2_tx_gain_vals_5g +ffffffff826cb6c0 r ar9380_2_2_tx_gain_vals_2g +ffffffff826cb860 r ar9485_1_1_tx_gain_regs +ffffffff826cb8f0 r ar9485_1_1_tx_gain_vals_2g +ffffffff826cba10 r ar9380_def_rom +ffffffff826cbe50 r ar9380_def_rom_h112 +ffffffff826cc290 r ar9380_def_rom_h116 +ffffffff826cc6d0 r ar9380_def_rom_x112 +ffffffff826ccb10 r ar9380_def_rom_x113 +ffffffff826cd000 R atw_txthresh_tab_lo +ffffffff826cd050 R atw_txthresh_tab_hi +ffffffff826cd0a0 r atw_attach.empty_macaddr +ffffffff826cd0b0 r atw_attach.type_strings +ffffffff826cd0d0 r atw_rfmd2958_ifn +ffffffff826cd110 r atw_rfmd2958_rf1r +ffffffff826cd150 r atw_rxintr.rate_tbl +ffffffff826ce000 r rtw_identify_sta.empty_macaddr +ffffffff826cf000 r rtwn_set_key.etherzeroaddr +ffffffff826cf010 r rtl8188eu_rf_prog +ffffffff826cf030 r rtl8188ftv_rf_prog +ffffffff826cf050 r rtl8192e_rf_prog +ffffffff826cf080 r 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xhci_root_ctrl_methods +ffffffff826dd060 R xhci_root_intr_methods +ffffffff826dd090 R xhci_device_ctrl_methods +ffffffff826dd0c0 R xhci_device_intr_methods +ffffffff826dd0f0 R xhci_device_bulk_methods +ffffffff826dd120 R xhci_device_isoc_methods +ffffffff826dd150 R xhci_devd +ffffffff826dd162 R xhci_confd +ffffffff826dd16b R xhci_ifcd +ffffffff826dd174 R xhci_endpd +ffffffff826dd17b R xhci_endpcd +ffffffff826dd181 R xhci_hubd +ffffffff826e0000 R radio_ca +ffffffff826e1000 R ipmi_ca +ffffffff826e2000 R vscsi_ca +ffffffff826e2028 R vscsi_switch +ffffffff826e2050 R vscsi_filtops +ffffffff826e3000 R mpath_ca +ffffffff826e3028 R mpath_switch +ffffffff826e4000 R softraid_ca +ffffffff826e4028 R sr_switch +ffffffff826e5000 r spdmem_basic_types +ffffffff826e50a0 r spdmem_parity_types +ffffffff826e50e0 r spdmem_ddr4_decode.ddr4_chipsize +ffffffff826e6000 R kstat_rlock_ops +ffffffff826e6010 R kstat_wlock_ops +ffffffff826e6020 R kstat_mutex_ops +ffffffff826e6030 R kstat_cpu_ops +ffffffff826e6040 r kstat_id_tree_RBT_INFO +ffffffff826e6058 R kstat_id_tree_RBT_TYPE +ffffffff826e6060 r kstat_pv_tree_RBT_INFO +ffffffff826e6078 R kstat_pv_tree_RBT_TYPE +ffffffff826e6080 r kstat_nm_tree_RBT_INFO +ffffffff826e6098 R kstat_nm_tree_RBT_TYPE +ffffffff826e7000 r fuse_rd_filtops +ffffffff826e8000 R fusefs_vfsops +ffffffff826e8070 R fusefs_vars +ffffffff826e9000 R fusefs_vops +ffffffff826e9110 R fusefsread_filtops +ffffffff826e9140 R fusefswrite_filtops +ffffffff826e9170 R fusefsvnode_filtops +ffffffff826ea000 r pf_state_tree_RBT_INFO +ffffffff826ea018 R pf_state_tree_RBT_TYPE +ffffffff826ea020 r pf_state_tree_id_RBT_INFO +ffffffff826ea038 R pf_state_tree_id_RBT_TYPE +ffffffff826ea040 r pf_translate_af.zero +ffffffff826eb000 R hfsc_ops +ffffffff826eb038 R ifq_hfsc_ops +ffffffff826eb040 R hfsc_pf_ops +ffffffff826eb088 R pfq_hfsc_ops +ffffffff826ec000 r fqcodel_ops +ffffffff826ec038 R ifq_fqcodel_ops +ffffffff826ec040 r fqcodel_pf_ops +ffffffff826ec088 R pfq_fqcodel_ops +ffffffff826ec090 r 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zeroin_addr +ffffffff82750000 R inetdomain +ffffffff82750050 R inetsw +ffffffff82751000 R divertctl_vars +ffffffff82751030 R divert_usrreqs +ffffffff82752000 R icmpctl_vars +ffffffff82753000 R ipctl_vars +ffffffff82753150 R inetctlerrmap +ffffffff82754000 R rip_usrreqs +ffffffff82755000 R tcp_timer_funcs +ffffffff82756000 R tcp_usrreqs +ffffffff827560a0 R tcp6_usrreqs +ffffffff82756140 R tcpctl_vars +ffffffff82757000 R udp_usrreqs +ffffffff827570a0 R udp6_usrreqs +ffffffff82757140 R udpctl_vars +ffffffff82758000 R gre_usrreqs +ffffffff82759000 r ipsec_ids_tree_RBT_INFO +ffffffff82759018 R ipsec_ids_tree_RBT_TYPE +ffffffff82759020 r ipsec_ids_flows_RBT_INFO +ffffffff82759038 R ipsec_ids_flows_RBT_TYPE +ffffffff82759040 R xformsw +ffffffff82759158 R xformswNXFORMSW +ffffffff8275a000 R espctl_vars +ffffffff8275a050 R ahctl_vars +ffffffff8275a070 R ipcompctl_vars +ffffffff8275a090 R ipsecctl_vars +ffffffff8275b000 R ipseczeroes +ffffffff8275c000 r carp_set_state.carp_states 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enc_xform_aes +ffffffff8276a100 R enc_xform_aes_ctr +ffffffff8276a140 R enc_xform_aes_gcm +ffffffff8276a180 R enc_xform_aes_gmac +ffffffff8276a1c0 R enc_xform_aes_xts +ffffffff8276a200 R enc_xform_chacha20_poly1305 +ffffffff8276a240 R enc_xform_null +ffffffff8276a280 R auth_hash_hmac_md5_96 +ffffffff8276a2c8 R auth_hash_hmac_sha1_96 +ffffffff8276a310 R auth_hash_hmac_ripemd_160_96 +ffffffff8276a358 R auth_hash_hmac_sha2_256_128 +ffffffff8276a3a0 R auth_hash_hmac_sha2_384_192 +ffffffff8276a3e8 R auth_hash_hmac_sha2_512_256 +ffffffff8276a430 R auth_hash_gmac_aes_128 +ffffffff8276a478 R auth_hash_gmac_aes_192 +ffffffff8276a4c0 R auth_hash_gmac_aes_256 +ffffffff8276a508 R auth_hash_chacha20_poly1305 +ffffffff8276a550 R comp_algo_deflate +ffffffff8276b000 r IV +ffffffff8276c000 r idgen32_ftable +ffffffff8276d000 r Chacha20_Poly1305_Update.zeroes +ffffffff8276d010 r pad0 +ffffffff8276e000 r null_point +ffffffff8276e020 r base_point +ffffffff8276f000 R mplsdomain +ffffffff82770000 R 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uvm_map_addr_RBT_TYPE +ffffffff82787000 R pmap_pager +ffffffff82787048 R bufcache_pager +ffffffff82788000 r uvm_objtree_RBT_INFO +ffffffff82788018 R uvm_objtree_RBT_TYPE +ffffffff82789000 r uvm_pmr_addr_RBT_INFO +ffffffff82789018 R uvm_pmr_addr_RBT_TYPE +ffffffff82789020 r uvm_pmr_size_RBT_INFO +ffffffff82789038 R uvm_pmr_size_RBT_TYPE +ffffffff82789040 r uvm_pmemrange_addr_RBT_INFO +ffffffff82789058 R uvm_pmemrange_addr_RBT_TYPE +ffffffff8278a000 R uvm_vnodeops +ffffffff8278a048 r uvn_flush.interval +ffffffff8278b000 R zeroin6_addr +ffffffff8278c000 R in6addr_any +ffffffff8278c010 R in6addr_loopback +ffffffff8278c020 R in6addr_intfacelocal_allnodes +ffffffff8278c030 R in6addr_linklocal_allnodes +ffffffff8278c040 R in6addr_linklocal_allrouters +ffffffff8278c050 R in6mask0 +ffffffff8278c060 R in6mask32 +ffffffff8278c070 R in6mask64 +ffffffff8278c080 R in6mask96 +ffffffff8278c090 R in6mask128 +ffffffff8278c0a0 R sa6_any +ffffffff8278d000 R divert6ctl_vars +ffffffff8278d030 R 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R scsi_readsafe_cmd +ffffffff827d8000 R scsibus_ca +ffffffff827d8030 R scsi_quirk_patterns +ffffffff827d9000 R cd_ca +ffffffff827d9030 R cd_patterns +ffffffff827da000 R ch_ca +ffffffff827da030 R ch_patterns +ffffffff827db000 R sd_ca +ffffffff827db030 R sd_patterns +ffffffff827dc000 R st_quirk_patterns +ffffffff827dc210 R st_ca +ffffffff827dc240 R st_patterns +ffffffff827dd000 R uk_ca +ffffffff827de000 R safte_ca +ffffffff827df000 R ses_ca +ffffffff827e0000 R sym_ca +ffffffff827e0028 R sym_mpath_sym_ops +ffffffff827e0048 R sym_mpath_asym_ops +ffffffff827e1000 R rdac_ca +ffffffff827e1028 R rdac_mpath_ops +ffffffff827e2000 R emc_ca +ffffffff827e2028 R emc_mpath_ops +ffffffff827e3000 R hds_ca +ffffffff827e3028 R hds_mpath_ops +ffffffff827e4000 R atapiscsi_ca +ffffffff827e4028 r atapiscsi_switch +ffffffff827e5000 R wd_ca +ffffffff827e6000 R atascsi_switch +ffffffff827e7000 R mainbus_ca +ffffffff827e8000 R bios_ca +ffffffff827e9000 R mpbios_ca +ffffffff827e9030 r loc_where +ffffffff827ea000 R mpbios_icu_table +ffffffff827eb000 R cpu_ca +ffffffff827ec000 R lapic_timer_intrclock +ffffffff827ed000 R ioapic_ca +ffffffff827ee000 R efifb_ca +ffffffff827ee028 R efifb_screen_list +ffffffff827ef000 R pvbus_ca +ffffffff827f0000 R pvclock_ca +ffffffff827f1000 R vmt_ca +ffffffff827f2000 R xen_ca +ffffffff827f3000 R xs_errors +ffffffff827f4000 R xnf_ca +ffffffff827f5000 R xbf_ca +ffffffff827f5028 R xbf_switch +ffffffff827f6000 R hyperv_ca +ffffffff827f6028 R hv_guid_network +ffffffff827f6038 R hv_guid_ide +ffffffff827f6048 R hv_guid_scsi +ffffffff827f6058 R hv_guid_shutdown +ffffffff827f6068 R hv_guid_timesync +ffffffff827f6078 R hv_guid_heartbeat +ffffffff827f6088 R hv_guid_kvp +ffffffff827f7000 r kvp_pools +ffffffff827f8000 R hvn_ca +ffffffff827f9000 R hvs_ca +ffffffff827f9028 R hvs_switch +ffffffff827fa000 r virtio_device_name +ffffffff827fb000 R vio_ca +ffffffff827fb030 r virtio_net_feature_names +ffffffff827fc000 R vioblk_ca +ffffffff827fc028 R vioblk_switch +ffffffff827fd000 R viomb_ca +ffffffff827fd030 r viomb_feature_names +ffffffff827fe000 R viornd_ca +ffffffff827ff000 R vioscsi_ca +ffffffff827ff028 R vioscsi_switch +ffffffff827ff050 R vioscsi_vq_names +ffffffff82800000 R vmmci_ca +ffffffff82801000 R pci_ca +ffffffff82802000 r pci_quirks +ffffffff82803000 R pci_subclass_prehistoric +ffffffff82803050 R pci_subclass_mass_storage +ffffffff82803160 R pci_subclass_network +ffffffff82803250 R pci_subclass_display +ffffffff828032d0 R pci_subclass_multimedia +ffffffff82803360 R pci_subclass_memory +ffffffff828033c0 R pci_subclass_bridge +ffffffff82803510 R pci_subclass_communications +ffffffff828035d0 R pci_subclass_system +ffffffff828036c0 R pci_subclass_input +ffffffff82803770 R pci_subclass_dock +ffffffff828037c0 R pci_subclass_processor +ffffffff82803880 R pci_subclass_serialbus +ffffffff82803990 R pci_subclass_wireless +ffffffff82803a70 R pci_subclass_i2o +ffffffff82803aa0 R pci_subclass_satcom +ffffffff82803b20 R pci_subclass_crypto +ffffffff82803b80 R pci_subclass_dasp +ffffffff82803c10 R pci_class +ffffffff82803e20 r pci_known_vendors +ffffffff828053e0 r pci_known_products +ffffffff82828000 R vga_pci_ca +ffffffff82828030 r vga_devs +ffffffff82829000 R ahc_pci_ident_table +ffffffff828295d0 R ahc_pci_ca +ffffffff8282a000 R ahd_pci_ident_table +ffffffff8282a198 R ahd_num_pci_devs +ffffffff8282a1a0 R ahd_pci_ca +ffffffff8282a1d0 r pci_bus_modes +ffffffff8282a210 r pci_status_strings +ffffffff8282a250 r pci_status_source +ffffffff8282a290 r split_status_strings +ffffffff8282b000 R adw_pci_ca +ffffffff8282b028 R adw_pci_devices +ffffffff8282c000 r adw_3550_Default_EEPROM +ffffffff8282c080 r adw_38C0800_Default_EEPROM +ffffffff8282c100 r adw_38C1600_Default_EEPROM +ffffffff8282d000 R adw_asc3550_mcode +ffffffff8282e3a0 R adw_asc3550_mcode_data +ffffffff8282e3b0 R adw_asc38C0800_mcode +ffffffff8282f888 R adw_asc38C0800_mcode_data +ffffffff8282f8a0 R adw_asc38C1600_mcode +ffffffff82831160 R adw_asc38C1600_mcode_data +ffffffff82832000 R twe_pci_ca +ffffffff82832028 R twe_pci_devices +ffffffff82833000 R arc_ca +ffffffff82833028 R arc_switch +ffffffff82833050 r arc_devices +ffffffff82833190 r arc_intel +ffffffff82833198 r arc_marvell +ffffffff828331a0 r arc_lsi +ffffffff828331a8 r arc_marvell2 +ffffffff82834000 R jmb_ca +ffffffff82834030 r jmb_devices +ffffffff82835000 R ahci_pci_ca +ffffffff82835028 R ahci_jmb_ca +ffffffff82835050 r ahci_devices +ffffffff82836000 R nvme_pci_ca +ffffffff82836028 r nvme_msi_blacklist +ffffffff82837000 R ami_pci_ca +ffffffff82837030 r ami_pci_subsys +ffffffff82837270 r ami_pci_vendors +ffffffff82838000 R mfi_pci_ca +ffffffff82838030 r mfi_pci_devices +ffffffff82839000 R mfii_ca +ffffffff82839028 R mfii_switch +ffffffff82839050 R mfii_pd_switch +ffffffff82839078 R mfii_iop_thunderbolt +ffffffff82839088 R mfii_iop_25 +ffffffff82839098 R mfii_iop_35 +ffffffff828390b0 R mfii_devices +ffffffff82839140 r mfi_bbu_indicators +ffffffff8283a000 R ips_ca +ffffffff8283a028 r ips_ids +ffffffff8283a040 r ips_chips +ffffffff8283a090 r ips_names +ffffffff8283a128 r ips_switch +ffffffff8283a150 r ips_pt_switch +ffffffff8283b000 R eap_ca +ffffffff8283b028 R eap1370_hw_if +ffffffff8283b0e0 R eap1371_hw_if +ffffffff8283b198 R eap_midi_hw_if +ffffffff8283b1d0 R eap_devices +ffffffff8283c000 R auacer_pci_devices +ffffffff8283c008 R auacer_ca +ffffffff8283c030 R auacer_hw_if +ffffffff8283d000 R auich_ca +ffffffff8283d028 R auich_hw_if +ffffffff8283d0e0 r auich_devices +ffffffff8283e000 R azalia_ca +ffffffff8283e028 R azalia_hw_if +ffffffff8283e0e0 R azalia_pci_devices +ffffffff8283e120 r pin_devices +ffffffff8283e1a0 r line_colors +ffffffff8283e220 r wtypes +ffffffff8283f000 r azalia_codec_init_dolby_atmos.atmos_init +ffffffff8283f050 r azalia_codec_init_dolby_atmos.atmos_v23_v25 +ffffffff82840000 R envy_ca +ffffffff82840028 R envy_hw_if +ffffffff828400e0 R envy_midi_hw_if +ffffffff82841000 R emuxki_devices +ffffffff82841010 R emu_ca +ffffffff82841038 R emuxki_hw_if +ffffffff828410f0 r emuxki_recbuf_sz +ffffffff82841170 r emuxki_recsrc_szreg +ffffffff8284117c r emuxki_recsrc_bufaddrreg +ffffffff82841190 r emuxki_rate_to_pitch.logMagTable +ffffffff82841390 r emuxki_rate_to_pitch.logSlopeTable +ffffffff82842000 R auixp_pci_devices +ffffffff82842010 R auixp_ca +ffffffff82842038 R auixp_hw_if +ffffffff82843000 R clcs_ca +ffffffff82843028 R cs4280_hw_if +ffffffff828430e0 R cs4280_devices +ffffffff82844000 R yds_ca +ffffffff82844028 r yds_hw_if +ffffffff828440e0 r yds_chip_capability_list +ffffffff82844120 r yds_get_lpfk.lpfkt +ffffffff82844160 r yds_get_lpfq.lpfqt +ffffffff82845000 R auvia_ca +ffffffff82845028 R auvia_hw_if +ffffffff828450e0 R auvia_devices +ffffffff828450f0 r auvia_set_params_sub.slottab +ffffffff82846000 R gdt_pci_ca +ffffffff82847000 R ciss_pci_ca +ffffffff82847030 R ciss_pci_devices +ffffffff82848000 R qlw_pci_ca +ffffffff82848030 r qlw_devices +ffffffff82848050 r isp_1040_risc_code +ffffffff8284d9f0 r isp_1080_risc_code +ffffffff82855470 r isp_12160_risc_code +ffffffff8285d000 R qla_pci_ca +ffffffff8285d030 r qla_devices +ffffffff8285e000 R qle_ca +ffffffff8285e028 R qle_switch +ffffffff8285e050 r qle_devices +ffffffff8285e070 r isp_2400_risc_code +ffffffff8288da50 r isp_2500_risc_code +ffffffff828c0000 R mpi_pci_ca +ffffffff828c0030 r mpi_devices +ffffffff828c1000 R mpii_ca +ffffffff828c1028 R mpii_switch +ffffffff828c1050 r mpii_devices +ffffffff828c2000 R sili_pci_ca +ffffffff828c2030 r sili_devices +ffffffff828c3000 R aq_devices +ffffffff828c3060 R aq_products +ffffffff828c31d0 R aq_fw1x_ops +ffffffff828c31f8 R aq_fw2x_ops +ffffffff828c3220 R aq2_fw_ops +ffffffff828c3248 R aq_ca +ffffffff828c4000 R de_ca +ffffffff828c4030 r tulip_srom_conninfo +ffffffff828c4120 r tulip_mii_phy_attrlist +ffffffff828c41e0 r tulip_21140_znyx_zx34x_boardsw +ffffffff828c4208 r tulip_21040_10baset_only_boardsw +ffffffff828c4230 r tulip_21040_boardsw +ffffffff828c4258 r tulip_2114x_isv_boardsw +ffffffff828c4280 r tulip_21140_smc9332_boardsw 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R rdcide_udmaclk +ffffffff828c9028 R default_product_desc +ffffffff828c9040 R pciide_intel_products +ffffffff828c9630 R pciide_amd_products +ffffffff828c9690 R pciide_cmd_products +ffffffff828c9730 R pciide_via_products +ffffffff828c9810 R pciide_cypress_products +ffffffff828c9820 R pciide_sis_products +ffffffff828c9870 R pciide_natsemi_products +ffffffff828c9890 R pciide_acer_products +ffffffff828c98a0 R pciide_triones_products +ffffffff828c98f0 R pciide_promise_products +ffffffff828c9ac0 R pciide_acard_products +ffffffff828c9b10 R pciide_serverworks_products +ffffffff828c9bb0 R pciide_nvidia_products +ffffffff828c9e80 R pciide_ite_products +ffffffff828c9ea0 R pciide_ati_products +ffffffff828c9f20 R pciide_jmicron_products +ffffffff828c9f70 R pciide_phison_products +ffffffff828c9f80 R pciide_rdc_products +ffffffff828c9f90 R pciide_vendors +ffffffff828ca140 R pciide_pci_ca +ffffffff828ca168 R pciide_jmb_ca +ffffffff828ca190 r piix_isp_dma +ffffffff828ca193 r piix_rtc_dma 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cy_pci_ca +ffffffff828cc030 R cy_pci_devices +ffffffff828cd000 R rl_pci_ca +ffffffff828cd030 R rl_pci_devices +ffffffff828ce000 R re_pci_devices +ffffffff828ce030 R re_pci_ca +ffffffff828cf000 R vr_ca +ffffffff828d0000 R txp_ca +ffffffff828d0030 R txp_devices +ffffffff828d1000 r cards +ffffffff828d2000 r format_params +ffffffff828d21a0 r pixfmt_table +ffffffff828d2320 r meteor_pixfmt_table +ffffffff828d3000 R bktr_ca +ffffffff828d3028 R bktr_hw_if +ffffffff828d4000 r tuners +ffffffff828d4170 r freqTable +ffffffff828d4260 r nabcst +ffffffff828d42a0 r irccable +ffffffff828d4310 r hrccable +ffffffff828d4380 r weurope +ffffffff828d4420 r jpnbcst +ffffffff828d4460 r jpncable +ffffffff828d44c0 r xussr +ffffffff828d4530 r australia +ffffffff828d4590 r france +ffffffff828d5000 R xl_pci_ca +ffffffff828d5030 R xl_pci_devices +ffffffff828d6000 R fxp_pci_ca +ffffffff828d6030 R fxp_pci_devices +ffffffff828d7000 R em_devices +ffffffff828d7308 R em_ca +ffffffff828d7330 r em_counters +ffffffff828d8000 r em_igp_cable_length_table +ffffffff828d8100 r em_igp_2_cable_length_table +ffffffff828d9000 R ixgb_devices +ffffffff828d9010 R ixgb_ca +ffffffff828da000 R ixgbe_devices +ffffffff828da0b8 R ix_ca +ffffffff828da0e0 r ix_counters +ffffffff828da3e0 r ix_rxq_kstats_tpl +ffffffff828da458 r ix_txq_kstats_tpl +ffffffff828db000 r ixgbe_mvals_base +ffffffff828db060 r ixgbe_mvals_X540 +ffffffff828db0c0 r ixgbe_mvals_X550 +ffffffff828db120 r ixgbe_mvals_X550EM_x +ffffffff828db180 r ixgbe_mvals_X550EM_a +ffffffff828de000 R ixl_ca +ffffffff828de030 R ixl_port_counters +ffffffff828de2c0 R ixl_vsi_counters +ffffffff828de380 r ixl_devices +ffffffff828de4c0 r ixl_710 +ffffffff828de4e8 r ixl_722 +ffffffff828de510 r ixl_pf_aq_regs +ffffffff828de578 r ixl_710_decrepit +ffffffff828de5a0 r ixl_phy_type_map +ffffffff828de770 r ixl_speed_type_map +ffffffff828de7b0 r ixl_hmc_pack_rxq +ffffffff828de830 r ixl_hmc_pack_txq +ffffffff828de8a0 r ixl_sfp_ops +ffffffff828de8b8 r ixl_qsfp_ops +ffffffff828df000 r dwqe_pci_devices +ffffffff828df018 R dwqe_pci_ca +ffffffff828e0000 R xge_ca +ffffffff828e0028 R xge_devices +ffffffff828e0030 r xge_fix_mac +ffffffff828e0110 r xge_xena_dtx_cfg +ffffffff828e0170 r xge_herc_dtx_cfg +ffffffff828e1000 R thtc_ca +ffffffff828e1028 R tht_ca +ffffffff828e1050 r thtc_devices +ffffffff828e1068 r tht_link_state.interval +ffffffff828e2000 R myx_ca +ffffffff828e2028 R myx_devices +ffffffff828e3000 R oce_ca +ffffffff828e3030 R oce_devices +ffffffff828e4000 R dc_pci_ca +ffffffff828e5000 R epic_pci_ca +ffffffff828e5028 R epic_pci_devices +ffffffff828e6000 R ti_pci_ca +ffffffff828e6030 R ti_devices +ffffffff828e7000 R ne_pci_ca +ffffffff828e7030 R ne_pci_prod +ffffffff828e8000 R gem_pci_ca +ffffffff828e8030 R gem_pci_devices +ffffffff828e8050 r gem_promhdr +ffffffff828e8052 r gem_promdat +ffffffff828e805a r gem_promdat2 +ffffffff828e9000 R cas_ca +ffffffff828e9028 R cas_pci_devices +ffffffff828e9030 r cas_promhdr +ffffffff828e9032 r cas_promdat_sun +ffffffff828e903a r cas_promdat_ns +ffffffff828e9042 r cas_promdat2 +ffffffff828ea000 R sf_pci_ca +ffffffff828ea028 R sf_pci_products +ffffffff828eb000 R sis_ca +ffffffff828eb028 R sis_devices +ffffffff828ec000 R se_devices +ffffffff828ec008 R se_ca +ffffffff828ed000 R mbg_ca +ffffffff828ed030 R mbg_devices +ffffffff828ee000 R uhci_pci_ca +ffffffff828ef000 R ohci_pci_ca +ffffffff828f0000 R ehci_pci_ca +ffffffff828f1000 R xhci_pci_ca +ffffffff828f2000 R cbb_pci_ca +ffffffff828f2028 r pccbb_pcmcia_do_io_map.pcic_iowidth +ffffffff828f3000 R skc_devices +ffffffff828f3030 R skc_ca +ffffffff828f3058 R sk_ca +ffffffff828f4000 R mskc_devices +ffffffff828f40a8 R mskc_ca +ffffffff828f40d0 R msk_ca +ffffffff828f4100 r msk_mib +ffffffff828f5000 R puc_pci_ca +ffffffff828f6000 R puc_devs +ffffffff828fb000 R com_puc_ca +ffffffff828fb030 r puc_port_types +ffffffff828fc000 R lpt_puc_ca +ffffffff828fd000 R wi_pci_ca +ffffffff828fd030 r wi_pci_products +ffffffff828fe000 R an_pci_ca +ffffffff828fe030 R an_pci_devices +ffffffff828ff000 R iwi_devices +ffffffff828ff010 R iwi_ca +ffffffff82900000 R wpi_ca +ffffffff82900028 r wpi_devices +ffffffff82900030 r wpi_rates +ffffffff82900050 r wpi_rf_gain_5ghz +ffffffff829000a0 r wpi_dsp_gain_5ghz +ffffffff829000f0 r wpi_rf_gain_2ghz +ffffffff82900140 r wpi_dsp_gain_2ghz +ffffffff82900190 r wpi_pmgt +ffffffff82900310 r wpi_bands +ffffffff82901000 R iwn_mcs2ridx +ffffffff82901020 R iwn_ca +ffffffff82901050 r iwn_devices +ffffffff829010e8 r iwn4965_sensitivity_limits +ffffffff82901124 r iwn5000_sensitivity_limits +ffffffff82901160 r iwn5150_sensitivity_limits +ffffffff8290119c r iwn1000_sensitivity_limits +ffffffff829011d8 r iwn6000_sensitivity_limits +ffffffff82901214 r iwn2000_sensitivity_limits +ffffffff82901250 r iwn_fw_errmsg +ffffffff82901340 r iwn4965_set_txpower.tdiv +ffffffff82901360 r iwn4965_rf_gain_5ghz +ffffffff829013d0 r iwn4965_dsp_gain_5ghz +ffffffff82901440 r iwn4965_dsp_gain_2ghz +ffffffff829014b0 r iwn_pmgt +ffffffff829016f0 r iwn4965_post_alive.qid2fifo +ffffffff82901700 r iwn_bands +ffffffff82901770 r iwn_rates +ffffffff82901820 r iwn4965_rf_gain_2ghz +ffffffff82902000 R iwm_nvm_channels +ffffffff82902030 R iwm_nvm_channels_8000 +ffffffff82902070 R iwm_rates +ffffffff829020d0 R iwm_ht_mcs2ridx +ffffffff82902110 R iwm_tid_to_ac +ffffffff82902118 R iwm_ac_to_tx_fifo +ffffffff82902120 R iwm_nvm_to_read +ffffffff82902144 r iwm_set_hw_address_8000.reserved_mac +ffffffff82902180 r iwm_sf_full_timeout +ffffffff829021b0 r iwm_sf_full_timeout_def +ffffffff829021e0 r advanced_lookup +ffffffff82902320 r iwm_devices +ffffffff82902360 R iwm_ca +ffffffff82903000 R iwx_9560_quz_a0_jf_b0_cfg +ffffffff82903020 R iwx_9560_qu_c0_jf_b0_cfg +ffffffff82903040 R iwx_qu_b0_hr1_b0 +ffffffff82903060 R iwx_qu_b0_hr_b0 +ffffffff82903080 R iwx_ax201_cfg_qu_hr +ffffffff829030a0 R iwx_qu_c0_hr1_b0 +ffffffff829030c0 R iwx_qu_c0_hr_b0 +ffffffff829030e0 R iwx_ax201_cfg_qu_c0_hr_b0 +ffffffff82903100 R iwx_quz_a0_hr1_b0 +ffffffff82903120 R iwx_ax201_cfg_quz_hr +ffffffff82903140 R iwx_cfg_so_a0_hr_b0 +ffffffff82903160 R iwx_cfg_quz_a0_hr_b0 +ffffffff82903180 R iwx_2ax_cfg_so_gf_a0 +ffffffff829031a0 R iwx_2ax_cfg_so_gf_a0_long +ffffffff829031c0 R iwx_2ax_cfg_so_gf4_a0 +ffffffff829031e0 R iwx_2ax_cfg_so_gf4_a0_long +ffffffff82903200 R iwx_2ax_cfg_ty_gf_a0 +ffffffff82903220 R iwx_2ax_cfg_so_jf_b0 +ffffffff82903240 R iwx_nvm_channels_8000 +ffffffff82903280 R iwx_rates +ffffffff829032e0 R iwx_mcs2ridx +ffffffff82903320 R iwx_tid_to_ac +ffffffff82903328 R iwx_ac_to_tx_fifo +ffffffff82903330 r iwx_nvm_channels_uhb +ffffffff8290339e r iwx_is_valid_mac_addr.reserved_mac +ffffffff829033b0 r iwx_sf_full_timeout +ffffffff829033e0 r iwx_sf_full_timeout_def +ffffffff82903410 r advanced_lookup +ffffffff82903550 r iwx_devices +ffffffff82903590 r iwx_dev_info_table +ffffffff82903e18 R iwx_ca +ffffffff82904000 R cmpci_ca +ffffffff82904028 R cmpci_hw_if +ffffffff829040e0 r cmpci_rate_table +ffffffff82904120 R cmpci_devices +ffffffff82904130 r cmpci_query_devinfo.mixer_port_names +ffffffff82904160 r cmpci_query_devinfo.mixer_classes +ffffffff82905000 R iha_pci_ca +ffffffff82905028 R iha_switch +ffffffff82906000 R pcscp_ca +ffffffff82907000 R bge_ca +ffffffff82907030 R bge_devices +ffffffff829071b0 r bge_revisions +ffffffff82907610 r bge_majorrevs +ffffffff82907790 r bge_kstat_tpl +ffffffff82908000 R bnx_devices +ffffffff82908020 R bnx_ca +ffffffff82909000 R vge_ca +ffffffff82909028 R vge_devices +ffffffff8290a000 R stge_ca +ffffffff8290a028 R stge_mii_bitbang_ops +ffffffff8290a050 R stge_devices +ffffffff8290b000 R nfe_ca +ffffffff8290b030 R nfe_devices +ffffffff8290c000 R et_devices +ffffffff8290c008 R et_ca +ffffffff8290d000 R jme_devices +ffffffff8290d008 R jme_ca +ffffffff8290e000 R age_devices +ffffffff8290e008 R age_ca +ffffffff8290f000 R alc_devices +ffffffff8290f038 R alc_ca +ffffffff82910000 R ale_devices +ffffffff82910008 R ale_ca +ffffffff82911000 R amdpm_ca +ffffffff82911030 R amdpm_ids +ffffffff82912000 R bce_ca +ffffffff82912028 R bce_devices +ffffffff82913000 R ath_pci_ca +ffffffff82914000 R athn_pci_ca +ffffffff82914030 r athn_pci_devices +ffffffff82915000 R atw_pci_ca +ffffffff82915028 R atw_pci_devices +ffffffff82916000 R rtw_pci_ca +ffffffff82916030 R rtw_pci_products +ffffffff82917000 R rtwn_pci_ca +ffffffff82917030 r rtwn_pci_devices +ffffffff82917040 r rtl8188eu_mac +ffffffff829171b0 r rtl8192cu_mac +ffffffff82917310 r rtl8192ce_mac +ffffffff82917458 r rtl8188eu_bb_prog +ffffffff82917480 r rtl8723a_bb_prog +ffffffff829174a8 r rtl8192ce_bb_prog_1t +ffffffff829174d0 r rtl8192ce_bb_prog_2t +ffffffff82917500 r rtl8188eu_bb_regs +ffffffff82917680 r rtl8188eu_bb_vals +ffffffff82917980 r rtl8188eu_agc_vals +ffffffff82917b80 r rtl8723a_bb_regs +ffffffff82917d00 r rtl8723a_bb_vals +ffffffff82917ff0 r rtl8192ce_agc_vals +ffffffff82918270 r rtl8192ce_bb_regs +ffffffff829183f0 r rtl8192ce_bb_vals_1t +ffffffff829186e0 r rtl8192ce_bb_vals_2t +ffffffff82919000 R ral_pci_ca +ffffffff82919030 R ral_pci_devices +ffffffff8291a000 R acx_pci_ca +ffffffff8291a028 R acx_pci_devices +ffffffff8291b000 R pgt_pci_ca +ffffffff8291b028 R pgt_pci_devices +ffffffff8291c000 R malo_pci_ca +ffffffff8291c028 R malo_pci_devices +ffffffff8291d000 R bwi_pci_ca +ffffffff8291d030 R bwi_pci_devices +ffffffff8291e000 R piixpm_ca +ffffffff8291e030 R piixpm_ids +ffffffff8291f000 R vic_ca +ffffffff8291f028 R vic_devices +ffffffff82920000 R vmx_devices +ffffffff82920008 R vmx_ca +ffffffff82920030 r vmx_tx_kstat_tpl +ffffffff829200d0 r vmx_kstat_rate +ffffffff829200e0 r vmx_rx_kstat_tpl +ffffffff82921000 R vmwpvs_ca +ffffffff82921028 R vmwpvs_switch +ffffffff82922000 R lii_ca +ffffffff82922028 R lii_devices +ffffffff82923000 R ichiic_ca +ffffffff82923030 R ichiic_ids +ffffffff82924000 R viapm_ca +ffffffff82924030 R viapm_ids +ffffffff82924070 r val_to_temp +ffffffff82924870 r val_to_uV.mult +ffffffff82925000 R amdiic_ca +ffffffff82925028 R amdiic_ids +ffffffff82926000 R nviic_ca +ffffffff82926030 R nviic_ids +ffffffff82927000 R sdhc_pci_ca +ffffffff82928000 R kate_ca +ffffffff82928030 r kate_proc +ffffffff82929000 R km_ca +ffffffff82929030 r km_devices +ffffffff8292a000 R ksmn_ca +ffffffff8292a030 r ksmn_devices +ffffffff8292b000 R iosf_pci_ca +ffffffff8292c000 R itherm_devices +ffffffff8292c008 R itherm_ca +ffffffff8292d000 R pchtemp_ca +ffffffff8292d030 R pchtemp_devices +ffffffff8292e000 R rtsx_pci_ca +ffffffff8292f000 R xspd_ca +ffffffff8292f028 R xspd_devices +ffffffff82930000 R virtio_pci_ca +ffffffff82931000 R dwiic_pci_ca +ffffffff82931030 R dwiic_pci_ids +ffffffff82932000 R bwfm_pci_ca +ffffffff82932030 r bwfm_pci_devices +ffffffff82933000 R ccp_pci_ca +ffffffff82933030 r ccp_pci_devices +ffffffff82934000 R bnxt_devices +ffffffff82934040 R bnxt_ca +ffffffff82935000 R mcx_ca +ffffffff82935030 r mcx_devices +ffffffff82935060 r mcx_rss_config +ffffffff829350d0 r mcx_eth_cap_map +ffffffff829352d0 r mcx_kstat_ppcnt_ieee8023 +ffffffff829352e8 r mcx_kstat_ppcnt_rfc2863 +ffffffff82935300 r mcx_kstat_ppcnt_rfc2819 +ffffffff82935318 r mcx_kstat_ppcnt_rfc3635 +ffffffff82935330 r mcx_ppcnt_ieee8023_tpl +ffffffff829354b0 r mcx_ppcnt_rfc2863_tpl +ffffffff829355c0 r mcx_ppcnt_rfc2819_tpl +ffffffff82935770 r mcx_ppcnt_rfc3635_tpl +ffffffff829358b0 r mcx_kstat_mtmp_tpl +ffffffff82935950 r mcx_kstat_mtmp_rate +ffffffff82935960 r mcx_queue_kstat_tpl +ffffffff82936000 R iavf_ca +ffffffff82936030 r iavf_devices +ffffffff82936040 r iavf_aq_regs +ffffffff829360b0 r iavf_link_speeds +ffffffff82937000 R rge_ca +ffffffff82937028 R rge_devices +ffffffff82937030 r rge_phy_config_mac_cfg3.mac_cfg3_a438_value +ffffffff82937050 r rge_phy_config_mac_cfg3.mac_cfg3_b88e_value +ffffffff829370b0 r rtl8125_mac_cfg3_mcu +ffffffff82937950 r rtl8125_mac_cfg5_mcu +ffffffff82938970 r rtl8125_mac_bps +ffffffff82938d70 r rtl8125b_mac_bps +ffffffff82938f98 r rge_kstats_tpl +ffffffff8293a000 R igc_devices +ffffffff8293a040 R igc_ca +ffffffff8293b000 R ngbe_devices +ffffffff8293b008 R ngbe_ca +ffffffff8293c000 R com_pci_ca +ffffffff8293c030 R com_pci_ids +ffffffff8293d000 r agp_attach.agp_max +ffffffff8293d048 R agp_ca +ffffffff8293e000 R intagp_ca +ffffffff8293f000 r drm_plane_create_rotation_property.props +ffffffff82940000 r drm_bridge_priv_state_funcs +ffffffff82942000 r color_encoding_name +ffffffff82942020 r color_range_name +ffffffff82943000 r drm_subpixel_enum_list +ffffffff82943060 r drm_dpms_enum_list +ffffffff829430a0 r drm_dvi_i_select_enum_list +ffffffff829430d0 r drm_dvi_i_subconnector_enum_list +ffffffff82943100 r drm_tv_select_enum_list +ffffffff82943150 r drm_tv_subconnector_enum_list +ffffffff829431a0 r drm_dp_subconnector_enum_list +ffffffff82943210 r drm_link_status_enum_list +ffffffff82943230 r drm_scaling_mode_enum_list +ffffffff82943270 r drm_aspect_ratio_enum_list +ffffffff829432a0 r hdmi_colorspaces +ffffffff82943370 r dp_colorspaces +ffffffff82943450 r drm_content_type_enum_list +ffffffff829434a0 r drm_panel_orientation_enum_list +ffffffff829434e0 r privacy_screen_enum +ffffffff82944000 r drm_crtc_fence_ops +ffffffff82945000 r drm_dmt_modes +ffffffff82947940 r edid_cea_modes_1 +ffffffff8294b4d0 r edid_cea_modes_193 +ffffffff8294c180 r edid_quirk_list +ffffffff8294c360 r edid_4k_modes +ffffffff8294c5c0 r edid_est_modes +ffffffff8294cdc0 r est3_modes +ffffffff8294cf20 r stereo_mandatory_modes +ffffffff8294cfa0 r extra_modes +ffffffff8294d000 r drm_encoder_enum_list +ffffffff8294e000 r drm_fbdev_client_funcs +ffffffff8294e020 r drm_fb_helper_generic_funcs +ffffffff8294e028 r drm_fbdev_fb_ops +ffffffff8294f000 r drm_fb_xrgb8888_to_rgb332.dst_pixsize +ffffffff8294f004 r drm_fb_xrgb8888_to_rgb565.dst_pixsize +ffffffff8294f008 r drm_fb_xrgb8888_to_rgb888.dst_pixsize +ffffffff8294f00c r drm_fb_xrgb8888_to_xrgb2101010.dst_pixsize +ffffffff8294f010 r drm_fb_xrgb8888_to_gray8.dst_pixsize +ffffffff8294f014 r drm_fb_rgb888_to_xrgb8888.dst_pixsize +ffffffff8294f018 r drm_fb_rgb565_to_xrgb8888.dst_pixsize +ffffffff82950000 r __drm_format_info.formats +ffffffff82951000 R drm_pgops +ffffffff82952000 R drm_gem_fb_funcs +ffffffff82953000 r drm_ioctls +ffffffff82955000 r dma_fence_stub_ops +ffffffff82955038 R dma_fence_array_ops +ffffffff82955070 R dma_fence_chain_ops +ffffffff829550a8 R dmabufops +ffffffff829550e0 R syncfileops +ffffffff82956000 r drm_plane_type_enum_list +ffffffff82957000 r drm_mode_status_names +ffffffff82958000 r primary_plane_funcs +ffffffff82958068 r safe_modeset_formats +ffffffff82959000 r orientation_data +ffffffff8295c718 r lcd800x1280_rightside_up +ffffffff8295c730 r lcd720x1280_rightside_up +ffffffff8295c748 r lcd800x1280_leftside_up +ffffffff8295c760 r lcd1080x1920_leftside_up +ffffffff8295c778 r lcd1200x1920_rightside_up +ffffffff8295c790 r gpd_micropc +ffffffff8295c7a8 r gpd_pocket +ffffffff8295c7c0 r gpd_pocket2 +ffffffff8295c7d8 r gpd_win +ffffffff8295c7f0 r gpd_win2 +ffffffff8295c808 r itworks_tw891 +ffffffff8295c820 r lcd1600x2560_rightside_up +ffffffff8295c838 r onegx1_pro +ffffffff8295c850 r lcd1600x2560_leftside_up +ffffffff8295c868 r lcd1280x1920_rightside_up +ffffffff8295c880 r gpd_onemix2s +ffffffff8295c898 r .compoundliteral +ffffffff8295c8a8 r .compoundliteral.5 +ffffffff8295c8d0 r .compoundliteral.9 +ffffffff8295c8f0 r .compoundliteral.17 +ffffffff8295c930 r .compoundliteral.21 +ffffffff8295c950 r .compoundliteral.23 +ffffffff8295c960 r .compoundliteral.25 +ffffffff8295c970 r .compoundliteral.29 +ffffffff8295d000 r drm_gem_prime_dmabuf_ops +ffffffff8295f000 r is_hdmi_adaptor.dp_dual_mode_hdmi_id +ffffffff82960000 r drm_dp_phy_name.phy_names +ffffffff82960048 r drm_dp_i2c_algo +ffffffff82960058 r drm_dp_i2c_lock_ops +ffffffff82960070 r dp_aux_bl_ops +ffffffff82960090 r dpcd_quirk_list +ffffffff82960320 r drm_dp_psr_setup_time.psr_setup_time_us +ffffffff82961000 R drm_dp_mst_topology_state_funcs +ffffffff82961020 r drm_dp_mst_req_type_str.req_type_str +ffffffff829611f0 r drm_dp_mst_sideband_tx_state_str.sideband_reason_str +ffffffff82961220 r drm_dp_mst_nak_reason_str.nak_reason_str +ffffffff82961278 r drm_dp_mst_i2c_algo +ffffffff82962000 r hdmi_colorimetry_val +ffffffff82963000 r ttm_bo_init_reserved.sys_mem +ffffffff82964000 r ttm_bo_pipeline_gutting.sys_mem +ffffffff82965018 R ttm_bo_vm_ops +ffffffff82966000 r ttm_range_manager_func +ffffffff82967018 r ttm_kmap_iter_io_ops +ffffffff82967030 r ttm_kmap_iter_linear_io_ops +ffffffff82968000 r ttm_sys_manager_func +ffffffff82969000 r ttm_kmap_iter_tt_ops +ffffffff8296a000 r drm_sched_fence_ops_scheduled +ffffffff8296a038 r drm_sched_fence_ops_finished +ffffffff8296b000 R ch7017_ops +ffffffff8296c000 R ch7xxx_ops +ffffffff8296c060 r ch7xxx_ids +ffffffff8296d000 R ivch_ops +ffffffff8296d060 r backup_addresses +ffffffff8296e000 R ns2501_ops +ffffffff8296e060 r mode_agnostic_values +ffffffff8296e0e0 r ns2501_modes +ffffffff8296f000 R sil164_ops +ffffffff82970000 R tfp410_ops +ffffffff82971000 r chv_dpll +ffffffff82971050 r vlv_dpll +ffffffff829710a0 r g4x_dpll +ffffffff829710f0 r pch_dpll +ffffffff82971138 r intel_dp_enc_funcs +ffffffff82972000 r intel_hdmi_enc_funcs +ffffffff82973000 r vlv_primary_formats +ffffffff82973030 r ivb_primary_formats +ffffffff82973050 r i965_primary_formats +ffffffff82973070 r i8xx_primary_formats +ffffffff82973080 r i965_plane_funcs +ffffffff829730e8 r i8xx_plane_funcs +ffffffff82974000 r gen11_dsi_encoder_funcs +ffffffff82974020 r gen11_dsi_connector_funcs +ffffffff82974098 r gen11_dsi_connector_helper_funcs +ffffffff829740e8 r gen11_dsi_host_ops +ffffffff82975000 r intel_plane_helper_funcs +ffffffff82976000 r g4x_audio_funcs +ffffffff82976010 r ilk_audio_funcs +ffffffff82976020 r hsw_audio_funcs +ffffffff82976030 r hdmi_audio_clock +ffffffff829760a0 r dp_aud_n_m +ffffffff82976250 r hdmi_aud_ncts_36bpp +ffffffff82976330 r hdmi_aud_ncts_30bpp +ffffffff82976410 r hdmi_aud_ncts_24bpp +ffffffff82977000 r intel_backlight_device_ops +ffffffff82977018 r bxt_pwm_funcs +ffffffff82977048 r cnp_pwm_funcs +ffffffff82977078 r lpt_pwm_funcs +ffffffff829770a8 r spt_pwm_funcs +ffffffff829770d8 r pch_pwm_funcs +ffffffff82977108 r ext_pwm_funcs +ffffffff82977138 r vlv_pwm_funcs +ffffffff82977168 r i965_pwm_funcs +ffffffff82977198 r i9xx_pwm_funcs +ffffffff829771c8 r pwm_bl_funcs +ffffffff82978000 r bdb_blocks +ffffffff82978160 r translate_iboost.mapping +ffffffff82978163 r adlp_ddc_pin_map +ffffffff8297816a r adls_ddc_pin_map +ffffffff82978170 r rkl_pch_tgp_ddc_pin_map +ffffffff82978175 r icp_ddc_pin_map +ffffffff8297817f r cnp_ddc_pin_map +ffffffff82979000 r mtl_sa_info +ffffffff82979006 r adlp_sa_info +ffffffff8297900c r adls_sa_info +ffffffff82979012 r rkl_sa_info +ffffffff82979018 r tgl_sa_info +ffffffff82979020 r intel_bw_funcs +ffffffff8297a000 r intel_cdclk_funcs +ffffffff8297a010 r tgl_cdclk_funcs +ffffffff8297a030 r dg2_cdclk_table +ffffffff8297a0e0 r adlp_a_step_cdclk_table +ffffffff8297a160 r adlp_cdclk_table +ffffffff8297a220 r rkl_cdclk_table +ffffffff8297a310 r icl_cdclk_table +ffffffff8297a3f8 r ehl_cdclk_funcs +ffffffff8297a418 r icl_cdclk_funcs +ffffffff8297a438 r bxt_cdclk_funcs +ffffffff8297a460 r glk_cdclk_table +ffffffff8297a490 r bxt_cdclk_table +ffffffff8297a4d8 r skl_cdclk_funcs +ffffffff8297a4f8 r bdw_cdclk_funcs +ffffffff8297a518 r hsw_cdclk_funcs +ffffffff8297a538 r chv_cdclk_funcs +ffffffff8297a558 r vlv_cdclk_funcs +ffffffff8297a578 r fixed_400mhz_cdclk_funcs +ffffffff8297a598 r ilk_cdclk_funcs +ffffffff8297a5b8 r gm45_cdclk_funcs +ffffffff8297a5d8 r g33_cdclk_funcs +ffffffff8297a5f8 r i965gm_cdclk_funcs +ffffffff8297a618 r pnv_cdclk_funcs +ffffffff8297a638 r i945gm_cdclk_funcs +ffffffff8297a658 r i915gm_cdclk_funcs +ffffffff8297a678 r i915g_cdclk_funcs +ffffffff8297a698 r i865g_cdclk_funcs +ffffffff8297a6b8 r i85x_cdclk_funcs +ffffffff8297a6d8 r i845g_cdclk_funcs +ffffffff8297a6f8 r i830_cdclk_funcs +ffffffff8297a718 r g33_get_cdclk.div_3200 +ffffffff8297a71e r g33_get_cdclk.div_4000 +ffffffff8297a724 r g33_get_cdclk.div_4800 +ffffffff8297a72a r g33_get_cdclk.div_5333 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cayman_reg_safe_bm +ffffffff82a0b000 r evergreen_reg_safe_bm +ffffffff82a0e000 r evergreen_hdmi_write_sad_regs.eld_reg_to_type +ffffffff82a0f000 r didt_config_kv +ffffffff82a10000 r barts_io_mc_regs +ffffffff82a100f0 r turks_io_mc_regs +ffffffff82a101e0 r caicos_io_mc_regs +ffffffff82a102d0 r cayman_io_mc_regs +ffffffff82a103c0 r cayman_golden_registers +ffffffff82a10580 r cayman_golden_registers2 +ffffffff82a105d0 r dvst_golden_registers +ffffffff82a10860 r dvst_golden_registers2 +ffffffff82a10890 r scrapper_golden_registers +ffffffff82a10d70 r tn_rlc_save_restore_register_list +ffffffff82a10f60 r cayman_cs_data +ffffffff82a10fa0 r SECT_CONTEXT_defs +ffffffff82a11020 r SECT_CLEAR_defs +ffffffff82a11040 r SECT_CTRLCONST_defs +ffffffff82a11060 r SECT_CONTEXT_def_2 +ffffffff82a11080 r SECT_CONTEXT_def_4 +ffffffff82a11210 r SECT_CONTEXT_def_5 +ffffffff82a11230 r SECT_CONTEXT_def_1 +ffffffff82a119d0 r SECT_CONTEXT_def_3 +ffffffff82a11ab0 r SECT_CONTEXT_def_6 +ffffffff82a11b90 r SECT_CONTEXT_def_7 +ffffffff82a12018 r SECT_CLEAR_def_1 +ffffffff82a12024 r SECT_CTRLCONST_def_1 +ffffffff82a12030 r cayman_default_state +ffffffff82a13000 r cac_weights_cayman_xt +ffffffff82a13128 r cac_weights_cayman_pro +ffffffff82a13250 r cac_weights_cayman_le +ffffffff82a13380 r cayman_cgcg_cgls_default +ffffffff82a135c0 r cayman_mgcg_default +ffffffff82a13f20 r cayman_sysls_default +ffffffff82a13ff0 r cayman_cgcg_cgls_enable +ffffffff82a14240 r cayman_cgcg_cgls_disable +ffffffff82a144a0 r cayman_mgcg_enable +ffffffff82a14520 r cayman_mgcg_disable +ffffffff82a145a0 r cayman_sysls_enable +ffffffff82a14670 r cayman_sysls_disable +ffffffff82a15000 r rn50_reg_safe_bm +ffffffff82a151a0 r r100_reg_safe_bm +ffffffff82a16000 r r200_reg_safe_bm +ffffffff82a17000 r r300_reg_safe_bm +ffffffff82a18000 r r420_reg_safe_bm +ffffffff82a1a000 r color_formats_table +ffffffff82a1a480 r r600_reg_safe_bm +ffffffff82a1d000 R r600_utc +ffffffff82a1d040 R r600_dtc +ffffffff82a1d080 r r600_encode_pci_lane_width.encoded_lanes +ffffffff82a1f000 r r100_gfx_ring +ffffffff82a1f070 r r300_gfx_ring +ffffffff82a1f0e0 r rv515_gfx_ring +ffffffff82a1f150 r r600_gfx_ring +ffffffff82a1f1c0 r r600_dma_ring +ffffffff82a1f230 r rv6xx_uvd_ring +ffffffff82a1f2a0 r rv770_uvd_ring +ffffffff82a1f310 r evergreen_gfx_ring +ffffffff82a1f380 r evergreen_dma_ring +ffffffff82a1f3f0 r cayman_gfx_ring +ffffffff82a1f460 r cayman_dma_ring +ffffffff82a1f4d0 r cayman_uvd_ring +ffffffff82a1f540 r trinity_vce_ring +ffffffff82a1f5b0 r si_gfx_ring +ffffffff82a1f620 r si_dma_ring +ffffffff82a1f690 r ci_gfx_ring +ffffffff82a1f700 r ci_cp_ring +ffffffff82a1f770 r ci_dma_ring +ffffffff82a1f7e0 r ci_vce_ring +ffffffff82a20000 r object_connector_convert +ffffffff82a20060 r supported_devices_connector_convert +ffffffff82a200a0 r supported_devices_connector_object_id_convert +ffffffff82a200c0 r thermal_controller_names +ffffffff82a20100 r pp_lib_thermal_controller_names +ffffffff82a21000 r pin_offsets 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radeon_tmds_pll_enum_list +ffffffff82a26080 r radeon_tv_std_enum_list +ffffffff82a26100 r radeon_underscan_enum_list +ffffffff82a26130 r radeon_audio_enum_list +ffffffff82a26160 r radeon_dither_enum_list +ffffffff82a26180 r radeon_output_csc_enum_list +ffffffff82a261c0 r radeon_crtc_funcs +ffffffff82a26280 r hpd_names +ffffffff82a262b0 r encoder_names +ffffffff82a263e0 r radeon_afmt_init.eg_offsets +ffffffff82a27000 r aux_offset +ffffffff82a28000 R radeondrm_ca +ffffffff82a28030 r pciidlist +ffffffff82a2c1d0 r kms_driver +ffffffff82a2c2c0 r radeon_ioctls_kms +ffffffff82a2d000 r radeon_fb_helper_funcs +ffffffff82a2d008 r radeonfb_ops +ffffffff82a2e000 R radeon_fence_ops +ffffffff82a30000 R radeon_gem_object_funcs +ffffffff82a30060 r radeon_gem_vm_ops +ffffffff82a31000 r radeon_i2c_algo +ffffffff82a31010 r radeon_atom_i2c_algo +ffffffff82a32000 r legacy_helper_funcs +ffffffff82a33000 r radeon_backlight_ops +ffffffff82a33018 r radeon_legacy_lvds_enc_funcs +ffffffff82a33038 r radeon_legacy_lvds_helper_funcs +ffffffff82a330a0 r radeon_legacy_tmds_int_enc_funcs +ffffffff82a330c0 r radeon_legacy_tmds_int_helper_funcs +ffffffff82a33128 r radeon_legacy_primary_dac_enc_funcs +ffffffff82a33148 r radeon_legacy_primary_dac_helper_funcs +ffffffff82a331b0 r radeon_legacy_tv_dac_enc_funcs +ffffffff82a331d0 r radeon_legacy_tv_dac_helper_funcs +ffffffff82a33238 r radeon_legacy_tmds_ext_enc_funcs +ffffffff82a33258 r radeon_legacy_tmds_ext_helper_funcs +ffffffff82a34000 r SLOPE_value +ffffffff82a34030 r YCOEF_EN_value +ffffffff82a34060 r YCOEF_value +ffffffff82a34090 r available_tv_modes +ffffffff82a34110 r hor_timing_NTSC +ffffffff82a34150 r vert_timing_NTSC +ffffffff82a34190 r hor_timing_PAL +ffffffff82a341d0 r vert_timing_PAL +ffffffff82a36000 r radeon_pm_state_type_name +ffffffff82a37000 r radeon_evict_flags.placements +ffffffff82a3a000 r rs600_reg_safe_bm +ffffffff82a3c000 r rv515_reg_safe_bm +ffffffff82a3d000 r dll_speed_table +ffffffff82a3e000 r r7xx_golden_registers +ffffffff82a3e090 r r7xx_golden_dyn_gpr_registers +ffffffff82a3e100 r rv770ce_golden_registers +ffffffff82a3e160 r rv770_golden_registers +ffffffff82a3e1b0 r rv770_mgcg_init +ffffffff82a3e8f0 r rv730_golden_registers +ffffffff82a3e950 r rv730_mgcg_init +ffffffff82a3eee0 r rv710_golden_registers +ffffffff82a3ef30 r rv710_mgcg_init +ffffffff82a3f1d0 r rv740_golden_registers +ffffffff82a3f360 r rv740_mgcg_init +ffffffff82a41000 r rv730_smc_int_vectors +ffffffff82a41040 r rv710_smc_int_vectors +ffffffff82a41080 r rv740_smc_int_vectors +ffffffff82a410c0 r cypress_smc_int_vectors +ffffffff82a41100 r caicos_smc_int_vectors +ffffffff82a41140 r cayman_smc_int_vectors +ffffffff82a42000 r tahiti_io_mc_regs +ffffffff82a42120 r pitcairn_io_mc_regs +ffffffff82a42240 r verde_io_mc_regs +ffffffff82a42360 r oland_io_mc_regs +ffffffff82a42480 r hainan_io_mc_regs +ffffffff82a425a0 r crtc_offsets +ffffffff82a425c0 r si_disp_int_status +ffffffff82a425e0 r tahiti_golden_registers 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si_SECT_CONTEXT_def_6 +ffffffff82a44eb0 r si_SECT_CONTEXT_def_2 +ffffffff82a452f0 r si_SECT_CONTEXT_def_7 +ffffffff82a456a0 r mc_cg_registers +ffffffff82a456d0 r si_default_state +ffffffff82a46000 r cac_weights_tahiti +ffffffff82a464d0 r lcac_tahiti +ffffffff82a46ba0 r cac_override_tahiti +ffffffff82a46bb4 r powertune_data_tahiti +ffffffff82a46bf0 r dte_data_tahiti +ffffffff82a46cc0 r dte_data_new_zealand +ffffffff82a46d90 r dte_data_malta +ffffffff82a46e60 r lcac_pitcairn +ffffffff82a47530 r cac_override_pitcairn +ffffffff82a47544 r powertune_data_pitcairn +ffffffff82a47580 r lcac_cape_verde +ffffffff82a479d0 r cac_override_cape_verde +ffffffff82a479e4 r powertune_data_cape_verde +ffffffff82a47a20 r cac_weights_cape_verde_pro +ffffffff82a47ef0 r cac_weights_heathrow +ffffffff82a483c0 r cac_weights_chelsea_xt +ffffffff82a48890 r cac_weights_chelsea_pro +ffffffff82a48d60 r cac_weights_cape_verde +ffffffff82a49230 r cac_weights_mars_pro +ffffffff82a49700 r lcac_mars_pro +ffffffff82a49a60 r cac_override_oland +ffffffff82a49a74 r powertune_data_mars_pro +ffffffff82a49ab0 r cac_weights_mars_xt +ffffffff82a49f80 r cac_weights_oland_pro +ffffffff82a4a450 r cac_weights_oland_xt +ffffffff82a4a920 r lcac_oland +ffffffff82a4ac7c r powertune_data_oland +ffffffff82a4acc0 r cac_weights_hainan +ffffffff82a4b184 r powertune_data_hainan +ffffffff82a4b1c0 r dte_data_aruba_pro +ffffffff82a4b290 r dte_data_tahiti_pro +ffffffff82a4b360 r dte_data_curacao_pro +ffffffff82a4b430 r dte_data_neptune_xt +ffffffff82a4b500 r dte_data_sun_xt +ffffffff82a4b5d0 r dte_data_venus_xtx +ffffffff82a4b6a0 r dte_data_venus_xt +ffffffff82a4b770 r dte_data_venus_pro +ffffffff82a4b840 r dte_data_mars_pro +ffffffff82a4c000 r si_program_jump_on_start.data +ffffffff82a4d000 r sumo_dtc +ffffffff82a4e000 r trinity_mgcg_shls_default +ffffffff82a4e380 r trinity_sysls_enable +ffffffff82a4e450 r trinity_sysls_disable +ffffffff82a50000 r GC_BASE +ffffffff82a500a8 r HDP_BASE +ffffffff82a50150 r MMHUB_BASE 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amdgpu_cgs_ops +ffffffff82a59000 r amdgpu_connector_dp_funcs +ffffffff82a59078 r amdgpu_connector_dp_helper_funcs +ffffffff82a590c8 r amdgpu_connector_edp_funcs +ffffffff82a59140 r amdgpu_connector_vga_funcs +ffffffff82a591b8 r amdgpu_connector_vga_helper_funcs +ffffffff82a59208 r amdgpu_connector_dvi_funcs +ffffffff82a59280 r amdgpu_connector_dvi_helper_funcs +ffffffff82a592d0 r amdgpu_connector_lvds_funcs +ffffffff82a59348 r amdgpu_connector_lvds_helper_funcs +ffffffff82a593a0 r amdgpu_connector_add_common_modes.common_modes +ffffffff82a5b000 R amdgpu_ctx_num_entities +ffffffff82a5c000 r amdgpu_kms_driver +ffffffff82a5c0f0 r amdgpu_device_ip_reinit_late_sriov.ip_order +ffffffff82a5d000 r hw_id_map +ffffffff82a5d090 r hw_id_names +ffffffff82a5e000 r hpd_names +ffffffff82a5e030 r encoder_names +ffffffff82a5e180 r dcc_retile_formats +ffffffff82a5e270 r dcc_formats +ffffffff82a5e360 R amdgpu_mode_funcs +ffffffff82a5e3b0 r amdgpu_underscan_enum_list +ffffffff82a5e3e0 r amdgpu_audio_enum_list +ffffffff82a5e410 r amdgpu_dither_enum_list +ffffffff82a5e430 r amdgpu_fb_funcs_atomic +ffffffff82a5e448 r amdgpu_fb_funcs +ffffffff82a5f000 R amdgpu_dmabuf_ops +ffffffff82a60000 R amdgpu_ioctls_kms +ffffffff82a60210 R amdgpu_ca +ffffffff82a60240 r pciidlist +ffffffff82a61130 r amdgpu_unsupported_pciidlist +ffffffff82a616b0 r amdgpu_kms_driver +ffffffff82a62000 r amdgpu_job_fence_ops +ffffffff82a62038 r amdgpu_fence_ops +ffffffff82a63000 r amdgpu_gem_object_funcs +ffffffff82a63060 r amdgpu_gem_vm_ops +ffffffff82a65000 R amdgpu_gtt_mgr_attr_group +ffffffff82a65018 r amdgpu_gtt_mgr_func +ffffffff82a66000 r amdgpu_atombios_i2c_algo +ffffffff82a67000 R amdgpu_sched_ops +ffffffff82a69000 r amdgpu_vram_names +ffffffff82a6a000 r amdgpu_preempt_mgr_func +ffffffff82a6b000 R psp_ip_funcs +ffffffff82a6b0a0 R psp_v3_1_ip_block +ffffffff82a6b0b8 R psp_v10_0_ip_block +ffffffff82a6b0d0 R psp_v11_0_ip_block +ffffffff82a6b0e8 R psp_v11_0_8_ip_block +ffffffff82a6b100 R psp_v12_0_ip_block +ffffffff82a6b118 R psp_v13_0_ip_block +ffffffff82a6b130 R psp_v13_0_4_ip_block +ffffffff82a6d000 r amdgpu_evict_flags.placements +ffffffff82a71000 R amdgpu_vkms_ip_block +ffffffff82a73000 R amdgpu_vm_cpu_funcs +ffffffff82a75000 R amdgpu_vm_sdma_funcs +ffffffff82a76000 R amdgpu_vram_mgr_attr_group +ffffffff82a76018 r amdgpu_vram_mgr_func +ffffffff82a77000 r xgmi_pcs_err_status_reg_arct +ffffffff82a78000 r GC_BASE +ffffffff82a780c0 r HDP_BASE +ffffffff82a78180 r MMHUB_BASE +ffffffff82a78240 r ATHUB_BASE +ffffffff82a78300 r NBIF0_BASE +ffffffff82a783c0 r MP0_BASE +ffffffff82a78480 r MP1_BASE +ffffffff82a78540 r UVD_BASE +ffffffff82a78600 r DF_BASE +ffffffff82a786c0 r OSSSYS_BASE +ffffffff82a78780 r SDMA0_BASE +ffffffff82a78840 r SDMA1_BASE +ffffffff82a78900 r SDMA2_BASE +ffffffff82a789c0 r SDMA3_BASE +ffffffff82a78a80 r SDMA4_BASE +ffffffff82a78b40 r SDMA5_BASE +ffffffff82a78c00 r SDMA6_BASE +ffffffff82a78cc0 r SDMA7_BASE +ffffffff82a78d80 r SMUIO_BASE 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dce_v10_0_encoder_funcs +ffffffff82a7b188 r dce_v10_0_dac_helper_funcs +ffffffff82a7b1f0 r dce_v10_0_dig_helper_funcs +ffffffff82a7b258 r dce_v10_0_ext_helper_funcs +ffffffff82a7b2c0 r dce_v10_0_audio_write_sad_regs.eld_reg_to_type +ffffffff82a7b2f0 r dce_v10_0_crtc_irq_funcs +ffffffff82a7b300 r dce_v10_0_pageflip_irq_funcs +ffffffff82a7b310 r dce_v10_0_hpd_irq_funcs ffffffff82a7b320 r interrupt_status_offsets -ffffffff82a7b380 r dce_v11_0_crtc_funcs -ffffffff82a7b440 r dce_v11_0_crtc_helper_funcs +ffffffff82a7b380 r dce_v10_0_crtc_funcs +ffffffff82a7b440 r dce_v10_0_crtc_helper_funcs ffffffff82a7b4c0 r vga_control_regs ffffffff82a7b4e0 r dig_offsets -ffffffff82a7b510 r cz_mgcg_cgcg_init -ffffffff82a7b530 r cz_golden_settings_a11 -ffffffff82a7b550 r stoney_golden_settings_a11 -ffffffff82a7b570 r polaris11_golden_settings_a11 -ffffffff82a7b5b0 r polaris10_golden_settings_a11 -ffffffff82a7c000 R df_v1_7_funcs -ffffffff82a7c070 r df_v1_7_channel_number -ffffffff82a7d000 R df_v3_6_funcs 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golden_settings_gc_10_3_sienna_cichlid -ffffffff82a91390 r golden_settings_gc_10_3_2 -ffffffff82a91780 r golden_settings_gc_10_3_vangogh -ffffffff82a919e0 r golden_settings_gc_10_3_3 -ffffffff82a91bc0 r golden_settings_gc_10_3_4 -ffffffff82a91f20 r golden_settings_gc_10_3_5 -ffffffff82a92220 r golden_settings_gc_10_0_cyan_skillfish -ffffffff82a92550 r golden_settings_gc_10_3_6 -ffffffff82a92760 r golden_settings_gc_10_3_7 -ffffffff82a93000 r gfx_v11_0_ip_funcs -ffffffff82a930a0 R gfx_v11_0_ip_block -ffffffff82a930b8 r gfx_v11_0_kiq_pm4_funcs -ffffffff82a930f8 r gfx_v11_0_ring_funcs_kiq -ffffffff82a93218 r gfx_v11_0_ring_funcs_gfx -ffffffff82a93338 r gfx_v11_0_ring_funcs_compute -ffffffff82a93458 r gfx_v11_0_eop_irq_funcs -ffffffff82a93468 r gfx_v11_0_priv_reg_irq_funcs -ffffffff82a93478 r gfx_v11_0_priv_inst_irq_funcs -ffffffff82a93488 r gfx_v11_0_rlc_funcs -ffffffff82a934f0 r gfx11_cs_data -ffffffff82a93510 r gfx11_SECT_CONTEXT_defs -ffffffff82a93590 r gfx11_SECT_CONTEXT_def_1 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sq_edc_source_names -ffffffff82a955f8 r iceland_rlc_funcs -ffffffff82a95660 r vi_cs_data -ffffffff82a95680 r vi_SECT_CONTEXT_defs -ffffffff82a95700 r vi_SECT_CONTEXT_def_1 -ffffffff82a95a50 r vi_SECT_CONTEXT_def_3 -ffffffff82a95a70 r vi_SECT_CONTEXT_def_4 -ffffffff82a95ce4 r vi_SECT_CONTEXT_def_5 -ffffffff82a95cec r vi_SECT_CONTEXT_def_6 -ffffffff82a95cf0 r vi_SECT_CONTEXT_def_2 -ffffffff82a96140 r vi_SECT_CONTEXT_def_7 -ffffffff82a964f0 r vgpr_init_compute_shader -ffffffff82a96600 r vgpr_init_regs -ffffffff82a96690 r sgpr1_init_regs -ffffffff82a96720 r sgpr2_init_regs -ffffffff82a967b0 r sec_ded_counter_registers -ffffffff82a96820 r iceland_mgcg_cgcg_init -ffffffff82a96b20 r golden_settings_iceland_a11 -ffffffff82a96be0 r iceland_golden_common_all -ffffffff82a96c40 r fiji_mgcg_cgcg_init -ffffffff82a96df0 r golden_settings_fiji_a10 -ffffffff82a96e80 r fiji_golden_common_all -ffffffff82a96f00 r tonga_mgcg_cgcg_init -ffffffff82a97290 r golden_settings_tonga_a11 -ffffffff82a97350 r tonga_golden_common_all -ffffffff82a973b0 r golden_settings_vegam_a11 -ffffffff82a97480 r vegam_golden_common_all -ffffffff82a974d0 r golden_settings_polaris11_a11 -ffffffff82a975a0 r polaris11_golden_common_all -ffffffff82a975f0 r golden_settings_polaris10_a11 -ffffffff82a976c0 r polaris10_golden_common_all -ffffffff82a97720 r cz_mgcg_cgcg_init -ffffffff82a97ab0 r cz_golden_settings_a11 -ffffffff82a97b40 r cz_golden_common_all -ffffffff82a97ba0 r stoney_mgcg_cgcg_init -ffffffff82a97be0 r stoney_golden_settings_a11 -ffffffff82a97c60 r stoney_golden_common_all -ffffffff82a98000 R gfx_v9_0_ras_ops -ffffffff82a98040 r gfx_v9_0_ip_funcs -ffffffff82a980e0 R gfx_v9_0_ip_block -ffffffff82a98100 r ras_gfx_subblocks -ffffffff82a98b80 r gfx_v9_0_edc_counter_regs -ffffffff82a98f20 r gfx_v9_0_ras_fields -ffffffff82a9a000 r gfx_v9_0_kiq_pm4_funcs -ffffffff82a9a040 r gfx_v9_0_ring_funcs_kiq -ffffffff82a9a160 r gfx_v9_0_ring_funcs_gfx -ffffffff82a9a280 r gfx_v9_0_ring_funcs_compute -ffffffff82a9a3a0 r gfx_v9_0_eop_irq_funcs -ffffffff82a9a3b0 r gfx_v9_0_priv_reg_irq_funcs -ffffffff82a9a3c0 r gfx_v9_0_priv_inst_irq_funcs -ffffffff82a9a3d0 r gfx_v9_0_cp_ecc_error_irq_funcs -ffffffff82a9a3e0 r gfx_v9_0_rlc_funcs -ffffffff82a9a450 r gfx9_cs_data -ffffffff82a9a470 r gfx9_SECT_CONTEXT_defs -ffffffff82a9a500 r gfx9_SECT_CONTEXT_def_1 -ffffffff82a9a850 r gfx9_SECT_CONTEXT_def_3 -ffffffff82a9a860 r gfx9_SECT_CONTEXT_def_4 -ffffffff82a9aad4 r gfx9_SECT_CONTEXT_def_5 -ffffffff82a9aadc r gfx9_SECT_CONTEXT_def_6 -ffffffff82a9aae0 r gfx9_SECT_CONTEXT_def_7 -ffffffff82a9abf0 r gfx9_SECT_CONTEXT_def_2 -ffffffff82a9b060 r gfx9_SECT_CONTEXT_def_8 -ffffffff82a9b2d0 r vgpr_init_compute_shader_arcturus -ffffffff82a9bb60 r vgpr_init_regs_arcturus -ffffffff82a9bcf0 r vgpr_init_regs -ffffffff82a9be80 r sgpr1_init_regs -ffffffff82a9c010 r sgpr2_init_regs -ffffffff82a9c198 r gfx_v9_0_gfx_funcs -ffffffff82a9c1e0 r golden_settings_gc_9_0 -ffffffff82a9c3c0 r golden_settings_gc_9_0_vg10 -ffffffff82a9c570 r golden_settings_gc_9_2_1 -ffffffff82a9c6f0 r golden_settings_gc_9_2_1_vg12 -ffffffff82a9c830 r golden_settings_gc_9_0_vg20 -ffffffff82a9c940 r golden_settings_gc_9_4_1_arct -ffffffff82a9ca50 r golden_settings_gc_9_1 -ffffffff82a9cc90 r golden_settings_gc_9_1_rv2 -ffffffff82a9ce60 r golden_settings_gc_9_1_rv1 -ffffffff82a9cf10 r golden_settings_gc_9_1_rn -ffffffff82a9d030 r golden_settings_gc_9_x_common -ffffffff82a9e000 R gfx_v9_4_ras_ops -ffffffff82a9e040 r gfx_v9_4_edc_counter_regs -ffffffff82a9e420 r gfx_v9_4_ras_fields -ffffffff82aa0000 R vgpr_init_regs_aldebaran -ffffffff82aa01b0 R sgpr112_init_regs_aldebaran -ffffffff82aa0360 R sgpr96_init_regs_aldebaran -ffffffff82aa0510 R sgpr64_init_regs_aldebaran -ffffffff82aa06c0 r golden_settings_gc_9_4_2_alde -ffffffff82aa0720 r golden_settings_gc_9_4_2_alde_die_0 -ffffffff82aa07b0 r golden_settings_gc_9_4_2_alde_die_1 -ffffffff82aa0840 r sgpr112_init_compute_shader_aldebaran -ffffffff82aa0a60 r sgpr96_init_compute_shader_aldebaran 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dce_v11_0_dac_helper_funcs +ffffffff82a7c1f0 r dce_v11_0_dig_helper_funcs +ffffffff82a7c258 r dce_v11_0_ext_helper_funcs +ffffffff82a7c2c0 r dce_v11_0_audio_write_sad_regs.eld_reg_to_type +ffffffff82a7c2f0 r dce_v11_0_crtc_irq_funcs +ffffffff82a7c300 r dce_v11_0_pageflip_irq_funcs +ffffffff82a7c310 r dce_v11_0_hpd_irq_funcs +ffffffff82a7c320 r interrupt_status_offsets +ffffffff82a7c380 r dce_v11_0_crtc_funcs +ffffffff82a7c440 r dce_v11_0_crtc_helper_funcs +ffffffff82a7c4c0 r vga_control_regs +ffffffff82a7c4e0 r dig_offsets +ffffffff82a7c510 r cz_mgcg_cgcg_init +ffffffff82a7c530 r cz_golden_settings_a11 +ffffffff82a7c550 r stoney_golden_settings_a11 +ffffffff82a7c570 r polaris11_golden_settings_a11 +ffffffff82a7c5b0 r polaris10_golden_settings_a11 +ffffffff82a7d000 R df_v1_7_funcs +ffffffff82a7d070 r df_v1_7_channel_number +ffffffff82a7e000 R df_v3_6_funcs +ffffffff82a7e070 r df_v3_6_channel_number +ffffffff82a7f000 r GC_BASE +ffffffff82a7f0a8 r HDP_BASE +ffffffff82a7f150 r MMHUB_BASE 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+ffffffff82a80990 r gfx10_SECT_CONTEXT_def_4 +ffffffff82a80c08 r gfx10_SECT_CONTEXT_def_5 +ffffffff82a80c10 r gfx10_SECT_CONTEXT_def_6 +ffffffff82a80c20 r gfx10_SECT_CONTEXT_def_2 +ffffffff82a81060 r gfx10_SECT_CONTEXT_def_7 +ffffffff82a81170 r gfx10_SECT_CONTEXT_def_8 +ffffffff82a814a0 r gfx_v10_0_gfx_funcs +ffffffff82a814e0 r golden_settings_gc_rlc_spm_10_0_nv10 +ffffffff82a87780 r golden_settings_gc_rlc_spm_10_1_nv14 +ffffffff82a8b1a0 r golden_settings_gc_rlc_spm_10_1_2_nv12 +ffffffff82a91440 r golden_settings_gc_10_1 +ffffffff82a91800 r golden_settings_gc_10_0_nv10 +ffffffff82a91800 r golden_settings_gc_10_1_1 +ffffffff82a91b90 r golden_settings_gc_10_1_2 +ffffffff82a91b90 r golden_settings_gc_10_1_nv14 +ffffffff82a91f80 r golden_settings_gc_10_1_2_nv12 +ffffffff82a91f80 r golden_settings_gc_10_3 +ffffffff82a92388 r golden_settings_gc_10_3_sienna_cichlid +ffffffff82a92390 r golden_settings_gc_10_3_2 +ffffffff82a92780 r golden_settings_gc_10_3_vangogh +ffffffff82a929e0 r golden_settings_gc_10_3_3 +ffffffff82a92bc0 r golden_settings_gc_10_3_4 +ffffffff82a92f20 r golden_settings_gc_10_3_5 +ffffffff82a93220 r golden_settings_gc_10_0_cyan_skillfish +ffffffff82a93550 r golden_settings_gc_10_3_6 +ffffffff82a93760 r golden_settings_gc_10_3_7 +ffffffff82a94000 r gfx_v11_0_ip_funcs +ffffffff82a940a0 R gfx_v11_0_ip_block +ffffffff82a940b8 r gfx_v11_0_kiq_pm4_funcs +ffffffff82a940f8 r gfx_v11_0_ring_funcs_kiq +ffffffff82a94218 r gfx_v11_0_ring_funcs_gfx +ffffffff82a94338 r gfx_v11_0_ring_funcs_compute +ffffffff82a94458 r gfx_v11_0_eop_irq_funcs +ffffffff82a94468 r gfx_v11_0_priv_reg_irq_funcs +ffffffff82a94478 r gfx_v11_0_priv_inst_irq_funcs +ffffffff82a94488 r gfx_v11_0_rlc_funcs +ffffffff82a944f0 r gfx11_cs_data +ffffffff82a94510 r gfx11_SECT_CONTEXT_defs +ffffffff82a94590 r gfx11_SECT_CONTEXT_def_1 +ffffffff82a948f0 r gfx11_SECT_CONTEXT_def_3 +ffffffff82a94900 r gfx11_SECT_CONTEXT_def_5 +ffffffff82a94908 r gfx11_SECT_CONTEXT_def_6 +ffffffff82a94910 r gfx11_SECT_CONTEXT_def_2 +ffffffff82a94d50 r gfx11_SECT_CONTEXT_def_4 +ffffffff82a94fd0 r gfx11_SECT_CONTEXT_def_7 +ffffffff82a95438 r gfx_v11_0_gfx_funcs +ffffffff82a95480 r golden_settings_gc_11_0_1 +ffffffff82a95560 r golden_settings_gc_11_0 +ffffffff82a96000 r gfx_v8_0_ip_funcs +ffffffff82a960a0 R gfx_v8_0_ip_block +ffffffff82a960b8 R gfx_v8_1_ip_block +ffffffff82a960d0 r gfx_v8_0_gfx_funcs +ffffffff82a96110 r gfx_v8_0_ring_funcs_kiq +ffffffff82a96230 r gfx_v8_0_ring_funcs_gfx +ffffffff82a96350 r gfx_v8_0_ring_funcs_compute +ffffffff82a96470 r amdgpu_gds_reg_offset +ffffffff82a96570 r gfx_v8_0_eop_irq_funcs +ffffffff82a96580 r gfx_v8_0_priv_reg_irq_funcs +ffffffff82a96590 r gfx_v8_0_priv_inst_irq_funcs +ffffffff82a965a0 r gfx_v8_0_cp_ecc_error_irq_funcs +ffffffff82a965b0 r gfx_v8_0_sq_irq_funcs +ffffffff82a965c0 r sq_edc_source_names +ffffffff82a965f8 r iceland_rlc_funcs +ffffffff82a96660 r vi_cs_data +ffffffff82a96680 r vi_SECT_CONTEXT_defs +ffffffff82a96700 r vi_SECT_CONTEXT_def_1 +ffffffff82a96a50 r vi_SECT_CONTEXT_def_3 +ffffffff82a96a70 r vi_SECT_CONTEXT_def_4 +ffffffff82a96ce4 r vi_SECT_CONTEXT_def_5 +ffffffff82a96cec r vi_SECT_CONTEXT_def_6 +ffffffff82a96cf0 r vi_SECT_CONTEXT_def_2 +ffffffff82a97140 r vi_SECT_CONTEXT_def_7 +ffffffff82a974f0 r vgpr_init_compute_shader +ffffffff82a97600 r vgpr_init_regs +ffffffff82a97690 r sgpr1_init_regs +ffffffff82a97720 r sgpr2_init_regs +ffffffff82a977b0 r sec_ded_counter_registers +ffffffff82a97820 r iceland_mgcg_cgcg_init +ffffffff82a97b20 r golden_settings_iceland_a11 +ffffffff82a97be0 r iceland_golden_common_all +ffffffff82a97c40 r fiji_mgcg_cgcg_init +ffffffff82a97df0 r golden_settings_fiji_a10 +ffffffff82a97e80 r fiji_golden_common_all +ffffffff82a97f00 r tonga_mgcg_cgcg_init +ffffffff82a98290 r golden_settings_tonga_a11 +ffffffff82a98350 r tonga_golden_common_all +ffffffff82a983b0 r golden_settings_vegam_a11 +ffffffff82a98480 r vegam_golden_common_all +ffffffff82a984d0 r golden_settings_polaris11_a11 +ffffffff82a985a0 r polaris11_golden_common_all +ffffffff82a985f0 r golden_settings_polaris10_a11 +ffffffff82a986c0 r polaris10_golden_common_all +ffffffff82a98720 r cz_mgcg_cgcg_init +ffffffff82a98ab0 r cz_golden_settings_a11 +ffffffff82a98b40 r cz_golden_common_all +ffffffff82a98ba0 r stoney_mgcg_cgcg_init +ffffffff82a98be0 r stoney_golden_settings_a11 +ffffffff82a98c60 r stoney_golden_common_all +ffffffff82a99000 R gfx_v9_0_ras_ops +ffffffff82a99040 r gfx_v9_0_ip_funcs +ffffffff82a990e0 R gfx_v9_0_ip_block +ffffffff82a99100 r ras_gfx_subblocks +ffffffff82a99b80 r gfx_v9_0_edc_counter_regs +ffffffff82a99f20 r gfx_v9_0_ras_fields +ffffffff82a9b000 r gfx_v9_0_kiq_pm4_funcs +ffffffff82a9b040 r gfx_v9_0_ring_funcs_kiq +ffffffff82a9b160 r gfx_v9_0_ring_funcs_gfx +ffffffff82a9b280 r gfx_v9_0_ring_funcs_compute +ffffffff82a9b3a0 r gfx_v9_0_eop_irq_funcs +ffffffff82a9b3b0 r gfx_v9_0_priv_reg_irq_funcs +ffffffff82a9b3c0 r gfx_v9_0_priv_inst_irq_funcs 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r gfx_v9_4_2_edc_counter_regs +ffffffff82aa2a20 r gfx_v9_4_2_ras_fields +ffffffff82aa43c0 r gfx_v9_4_2_utc_blocks +ffffffff82aa5000 R gfxhub_v1_0_funcs +ffffffff82aa6000 R gfxhub_v2_0_funcs +ffffffff82aa6060 r gfxhub_v2_0_vmhub_funcs ffffffff82aa6070 r gfxhub_client_ids -ffffffff82aa7000 R gfxhub_v3_0_funcs -ffffffff82aa7060 r gfxhub_v3_0_vmhub_funcs +ffffffff82aa7000 R gfxhub_v2_1_funcs +ffffffff82aa7060 r gfxhub_v2_1_vmhub_funcs ffffffff82aa7070 r gfxhub_client_ids -ffffffff82aa8000 R gfxhub_v3_0_3_funcs -ffffffff82aa8060 r gfxhub_v3_0_3_vmhub_funcs +ffffffff82aa8000 R gfxhub_v3_0_funcs +ffffffff82aa8060 r gfxhub_v3_0_vmhub_funcs ffffffff82aa8070 r gfxhub_client_ids -ffffffff82aa9000 R gmc_v10_0_ip_funcs -ffffffff82aa90a0 R gmc_v10_0_ip_block -ffffffff82aa90b8 r gmc_v10_0_gmc_funcs -ffffffff82aa9100 r gmc_v10_0_irq_funcs -ffffffff82aa9110 r gmc_v10_0_ecc_funcs -ffffffff82aaa000 R gmc_v11_0_ip_funcs -ffffffff82aaa0a0 R gmc_v11_0_ip_block -ffffffff82aaa0b8 r gmc_v11_0_gmc_funcs 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iceland_ih_ip_funcs -ffffffff82ab50a0 R iceland_ih_ip_block -ffffffff82ab50b8 r iceland_ih_funcs -ffffffff82ab6000 r ih_v6_0_ip_funcs -ffffffff82ab60a0 R ih_v6_0_ip_block -ffffffff82ab60b8 r ih_v6_0_funcs -ffffffff82ab60d8 r ih_v6_0_self_irq_funcs -ffffffff82ab7000 R gfx_v11_0_imu_funcs -ffffffff82ab7030 r imu_rlc_ram_golden_11 -ffffffff82ab7680 r imu_rlc_ram_golden_11_0_2 -ffffffff82ab8000 r imu_rlc_ram_golden_11_0_3 -ffffffff82ab9000 r jpeg_v1_0_decode_ring_vm_funcs -ffffffff82ab9120 r jpeg_v1_0_irq_funcs -ffffffff82aba000 r jpeg_v2_0_ip_funcs -ffffffff82aba0a0 R jpeg_v2_0_ip_block -ffffffff82aba0b8 r jpeg_v2_0_dec_ring_vm_funcs -ffffffff82aba1d8 r jpeg_v2_0_irq_funcs -ffffffff82abb000 r jpeg_v2_5_ip_funcs -ffffffff82abb0a0 R jpeg_v2_5_ip_block -ffffffff82abb0b8 r jpeg_v2_6_ip_funcs -ffffffff82abb158 R jpeg_v2_6_ip_block -ffffffff82abb170 R jpeg_v2_6_ras_hw_ops -ffffffff82abb1b0 r jpeg_v2_5_dec_ring_vm_funcs -ffffffff82abb2d0 r jpeg_v2_6_dec_ring_vm_funcs -ffffffff82abb3f0 r jpeg_v2_5_irq_funcs -ffffffff82abc000 r jpeg_v3_0_ip_funcs -ffffffff82abc0a0 R jpeg_v3_0_ip_block -ffffffff82abc0b8 r jpeg_v3_0_dec_ring_vm_funcs -ffffffff82abc1d8 r jpeg_v3_0_irq_funcs -ffffffff82abd000 r jpeg_v4_0_ip_funcs -ffffffff82abd0a0 R jpeg_v4_0_ip_block -ffffffff82abd0b8 r jpeg_v4_0_dec_ring_vm_funcs -ffffffff82abd1d8 r jpeg_v4_0_irq_funcs -ffffffff82abe000 R lsdma_v6_0_funcs -ffffffff82abf000 R mca_v3_0_mp0_hw_ops -ffffffff82abf040 R mca_v3_0_mp1_hw_ops -ffffffff82abf080 R mca_v3_0_mpio_hw_ops -ffffffff82abf0c0 R mca_v3_0_funcs -ffffffff82ac0000 r mes_v10_1_ip_funcs -ffffffff82ac00a0 R mes_v10_1_ip_block -ffffffff82ac00b8 r mes_v10_1_funcs -ffffffff82ac00e8 r mes_v10_1_ring_funcs -ffffffff82ac1000 r mes_v11_0_ip_funcs -ffffffff82ac10a0 R mes_v11_0_ip_block -ffffffff82ac10b8 r mes_v11_0_funcs -ffffffff82ac10e8 r mes_v11_0_ring_funcs -ffffffff82ac2000 R mmhub_v1_0_funcs -ffffffff82ac2050 r mmhub_v1_0_edc_cnt_regs -ffffffff82ac20c0 r mmhub_v1_0_ras_fields -ffffffff82ac3000 R mmhub_v1_7_funcs -ffffffff82ac3050 r mmhub_v1_7_edc_cnt_regs -ffffffff82ac3250 r mmhub_v1_7_ras_fields -ffffffff82ac49c0 r mmhub_v1_7_ea_err_status_regs -ffffffff82ac5000 R mmhub_v2_0_funcs -ffffffff82ac5050 r mmhub_v2_0_vmhub_funcs -ffffffff82ac5060 r mmhub_client_ids_navi1x -ffffffff82ac5190 r mmhub_client_ids_sienna_cichlid -ffffffff82ac5450 r mmhub_client_ids_beige_goby -ffffffff82ac6000 R mmhub_v2_3_funcs -ffffffff82ac6050 r mmhub_v2_3_vmhub_funcs -ffffffff82ac6060 r mmhub_client_ids_vangogh -ffffffff82ac7000 R mmhub_v3_0_funcs -ffffffff82ac7050 r mmhub_v3_0_vmhub_funcs -ffffffff82ac7060 r mmhub_client_ids_v3_0_0 -ffffffff82ac8000 R mmhub_v3_0_1_funcs -ffffffff82ac8050 r mmhub_v3_0_1_vmhub_funcs -ffffffff82ac8060 r mmhub_client_ids_v3_0_1 -ffffffff82ac9000 R mmhub_v3_0_2_funcs -ffffffff82ac9050 r mmhub_v3_0_2_vmhub_funcs -ffffffff82ac9060 r mmhub_client_ids_v3_0_2 -ffffffff82aca000 R mmhub_v9_4_ras_hw_ops -ffffffff82aca040 R mmhub_v9_4_funcs -ffffffff82aca090 r mmhub_v9_4_edc_cnt_regs -ffffffff82aca330 r mmhub_v9_4_ras_fields -ffffffff82acc3b0 r mmhub_v9_4_err_status_regs -ffffffff82acd000 r xgpu_ai_mailbox_ack_irq_funcs -ffffffff82acd010 r xgpu_ai_mailbox_rcv_irq_funcs -ffffffff82acd020 R xgpu_ai_virt_ops -ffffffff82ace000 r xgpu_nv_mailbox_ack_irq_funcs -ffffffff82ace010 r xgpu_nv_mailbox_rcv_irq_funcs -ffffffff82ace020 R xgpu_nv_virt_ops -ffffffff82acf000 r xgpu_fiji_mgcg_cgcg_init -ffffffff82acf240 r xgpu_fiji_golden_settings_a10 -ffffffff82acf370 r xgpu_fiji_golden_common_all -ffffffff82acf3f0 r xgpu_tonga_mgcg_cgcg_init -ffffffff82acf810 r xgpu_tonga_golden_settings_a11 -ffffffff82acf9d0 r xgpu_tonga_golden_common_all -ffffffff82acfa28 r xgpu_vi_mailbox_ack_irq_funcs -ffffffff82acfa38 r xgpu_vi_mailbox_rcv_irq_funcs -ffffffff82acfa48 R xgpu_vi_virt_ops -ffffffff82ad0000 r navi10_ih_ip_funcs -ffffffff82ad00a0 R navi10_ih_ip_block -ffffffff82ad00b8 r navi10_ih_funcs -ffffffff82ad00d8 r navi10_ih_self_irq_funcs -ffffffff82ad1000 R nbio_v2_3_hdp_flush_reg -ffffffff82ad1048 R nbio_v2_3_funcs -ffffffff82ad2000 R nbio_v4_3_hdp_flush_reg -ffffffff82ad2048 R nbio_v4_3_funcs -ffffffff82ad2130 R nbio_v4_3_sriov_funcs -ffffffff82ad3000 R nbio_v6_1_hdp_flush_reg -ffffffff82ad3048 R nbio_v6_1_funcs -ffffffff82ad4000 R nbio_v7_0_hdp_flush_reg -ffffffff82ad4048 R nbio_v7_0_funcs -ffffffff82ad5000 R nbio_v7_2_hdp_flush_reg -ffffffff82ad5048 R nbio_v7_2_funcs -ffffffff82ad6000 R nbio_v7_4_hdp_flush_reg -ffffffff82ad6048 R nbio_v7_4_ras_hw_ops -ffffffff82ad6088 R nbio_v7_4_funcs -ffffffff82ad6170 r nbio_v7_4_ras_controller_irq_funcs -ffffffff82ad6180 r nbio_v7_4_ras_err_event_athub_irq_funcs -ffffffff82ad7000 R nbio_v7_7_hdp_flush_reg -ffffffff82ad7048 R nbio_v7_7_funcs -ffffffff82ad8000 r nv_common_ip_funcs -ffffffff82ad80a0 R nv_common_ip_block -ffffffff82ad80b8 r nv_asic_funcs -ffffffff82ad8170 r nv_allowed_read_registers -ffffffff82ad82f0 r nv_video_codecs_encode -ffffffff82ad8300 r sc_video_codecs_decode -ffffffff82ad8310 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mes_v11_0_funcs +ffffffff82ac20e8 r mes_v11_0_ring_funcs +ffffffff82ac3000 R mmhub_v1_0_funcs +ffffffff82ac3050 r mmhub_v1_0_edc_cnt_regs +ffffffff82ac30c0 r mmhub_v1_0_ras_fields +ffffffff82ac4000 R mmhub_v1_7_funcs +ffffffff82ac4050 r mmhub_v1_7_edc_cnt_regs +ffffffff82ac4250 r mmhub_v1_7_ras_fields +ffffffff82ac59c0 r mmhub_v1_7_ea_err_status_regs +ffffffff82ac6000 R mmhub_v2_0_funcs +ffffffff82ac6050 r mmhub_v2_0_vmhub_funcs +ffffffff82ac6060 r mmhub_client_ids_navi1x +ffffffff82ac6190 r mmhub_client_ids_sienna_cichlid +ffffffff82ac6450 r mmhub_client_ids_beige_goby +ffffffff82ac7000 R mmhub_v2_3_funcs +ffffffff82ac7050 r mmhub_v2_3_vmhub_funcs +ffffffff82ac7060 r mmhub_client_ids_vangogh +ffffffff82ac8000 R mmhub_v3_0_funcs +ffffffff82ac8050 r mmhub_v3_0_vmhub_funcs +ffffffff82ac8060 r mmhub_client_ids_v3_0_0 +ffffffff82ac9000 R mmhub_v3_0_1_funcs +ffffffff82ac9050 r mmhub_v3_0_1_vmhub_funcs +ffffffff82ac9060 r mmhub_client_ids_v3_0_1 +ffffffff82aca000 R mmhub_v3_0_2_funcs +ffffffff82aca050 r mmhub_v3_0_2_vmhub_funcs +ffffffff82aca060 r mmhub_client_ids_v3_0_2 +ffffffff82acb000 R mmhub_v9_4_ras_hw_ops +ffffffff82acb040 R mmhub_v9_4_funcs +ffffffff82acb090 r mmhub_v9_4_edc_cnt_regs +ffffffff82acb330 r mmhub_v9_4_ras_fields +ffffffff82acd3b0 r mmhub_v9_4_err_status_regs +ffffffff82ace000 r xgpu_ai_mailbox_ack_irq_funcs +ffffffff82ace010 r xgpu_ai_mailbox_rcv_irq_funcs +ffffffff82ace020 R xgpu_ai_virt_ops +ffffffff82acf000 r xgpu_nv_mailbox_ack_irq_funcs +ffffffff82acf010 r xgpu_nv_mailbox_rcv_irq_funcs +ffffffff82acf020 R xgpu_nv_virt_ops +ffffffff82ad0000 r xgpu_fiji_mgcg_cgcg_init +ffffffff82ad0240 r xgpu_fiji_golden_settings_a10 +ffffffff82ad0370 r xgpu_fiji_golden_common_all +ffffffff82ad03f0 r xgpu_tonga_mgcg_cgcg_init +ffffffff82ad0810 r xgpu_tonga_golden_settings_a11 +ffffffff82ad09d0 r xgpu_tonga_golden_common_all +ffffffff82ad0a28 r xgpu_vi_mailbox_ack_irq_funcs +ffffffff82ad0a38 r xgpu_vi_mailbox_rcv_irq_funcs +ffffffff82ad0a48 R xgpu_vi_virt_ops +ffffffff82ad1000 r navi10_ih_ip_funcs +ffffffff82ad10a0 R navi10_ih_ip_block +ffffffff82ad10b8 r navi10_ih_funcs +ffffffff82ad10d8 r navi10_ih_self_irq_funcs +ffffffff82ad2000 R nbio_v2_3_hdp_flush_reg +ffffffff82ad2048 R nbio_v2_3_funcs +ffffffff82ad3000 R nbio_v4_3_hdp_flush_reg +ffffffff82ad3048 R nbio_v4_3_funcs +ffffffff82ad3130 R nbio_v4_3_sriov_funcs +ffffffff82ad4000 R nbio_v6_1_hdp_flush_reg +ffffffff82ad4048 R nbio_v6_1_funcs +ffffffff82ad5000 R nbio_v7_0_hdp_flush_reg +ffffffff82ad5048 R nbio_v7_0_funcs +ffffffff82ad6000 R nbio_v7_2_hdp_flush_reg +ffffffff82ad6048 R nbio_v7_2_funcs +ffffffff82ad7000 R nbio_v7_4_hdp_flush_reg +ffffffff82ad7048 R nbio_v7_4_ras_hw_ops +ffffffff82ad7088 R nbio_v7_4_funcs +ffffffff82ad7170 r nbio_v7_4_ras_controller_irq_funcs +ffffffff82ad7180 r nbio_v7_4_ras_err_event_athub_irq_funcs +ffffffff82ad8000 R nbio_v7_7_hdp_flush_reg +ffffffff82ad8048 R nbio_v7_7_funcs +ffffffff82ad9000 r nv_common_ip_funcs +ffffffff82ad90a0 R nv_common_ip_block +ffffffff82ad90b8 r nv_asic_funcs +ffffffff82ad9170 r nv_allowed_read_registers +ffffffff82ad92f0 r nv_video_codecs_encode +ffffffff82ad9300 r sc_video_codecs_decode +ffffffff82ad9310 r yc_video_codecs_decode +ffffffff82ad9320 r bg_video_codecs_encode +ffffffff82ad9330 r bg_video_codecs_decode +ffffffff82ad9340 r nv_video_codecs_decode +ffffffff82ad9350 r nv_video_codecs_encode_array +ffffffff82ad9380 r sc_video_codecs_decode_array +ffffffff82ad9420 r yc_video_codecs_decode_array +ffffffff82ad9490 r bg_video_codecs_decode_array +ffffffff82ad94d0 r nv_video_codecs_decode_array +ffffffff82ada000 r psp_v10_0_funcs +ffffffff82adb000 r psp_v11_0_funcs +ffffffff82adc000 r psp_v11_0_8_funcs +ffffffff82add000 r psp_v12_0_funcs +ffffffff82ade000 r psp_v13_0_funcs +ffffffff82adf000 r psp_v13_0_4_funcs +ffffffff82ae0000 r psp_v3_1_funcs +ffffffff82ae1000 r sdma_v2_4_ip_funcs +ffffffff82ae10a0 R sdma_v2_4_ip_block +ffffffff82ae10b8 r sdma_v2_4_ring_funcs +ffffffff82ae11d8 r sdma_v2_4_buffer_funcs +ffffffff82ae11f8 r sdma_v2_4_vm_pte_funcs +ffffffff82ae1218 r sdma_v2_4_trap_irq_funcs +ffffffff82ae1228 r sdma_v2_4_illegal_inst_irq_funcs +ffffffff82ae1240 r iceland_mgcg_cgcg_init +ffffffff82ae1260 r golden_settings_iceland_a11 +ffffffff82ae2000 r sdma_v3_0_ip_funcs +ffffffff82ae20a0 R sdma_v3_0_ip_block +ffffffff82ae20b8 R sdma_v3_1_ip_block +ffffffff82ae20d0 r sdma_v3_0_ring_funcs +ffffffff82ae21f0 r sdma_v3_0_buffer_funcs +ffffffff82ae2210 r sdma_v3_0_vm_pte_funcs +ffffffff82ae2230 r sdma_v3_0_trap_irq_funcs +ffffffff82ae2240 r sdma_v3_0_illegal_inst_irq_funcs +ffffffff82ae2250 r fiji_mgcg_cgcg_init +ffffffff82ae2270 r golden_settings_fiji_a10 +ffffffff82ae22d0 r tonga_mgcg_cgcg_init +ffffffff82ae22f0 r golden_settings_tonga_a11 +ffffffff82ae2370 r golden_settings_polaris11_a11 +ffffffff82ae23f0 r golden_settings_polaris10_a11 +ffffffff82ae2470 r cz_mgcg_cgcg_init +ffffffff82ae2490 r cz_golden_settings_a11 +ffffffff82ae2520 r stoney_mgcg_cgcg_init +ffffffff82ae2530 r stoney_golden_settings_a11 +ffffffff82ae3000 R sdma_v4_0_ip_funcs +ffffffff82ae30a0 R sdma_v4_0_ras_hw_ops +ffffffff82ae30e0 R sdma_v4_0_ip_block +ffffffff82ae30f8 r sdma_v4_0_ring_funcs_2nd_mmhub +ffffffff82ae3218 r sdma_v4_0_ring_funcs +ffffffff82ae3338 r sdma_v4_0_page_ring_funcs_2nd_mmhub +ffffffff82ae3458 r sdma_v4_0_page_ring_funcs +ffffffff82ae3578 r sdma_v4_0_buffer_funcs +ffffffff82ae3598 r sdma_v4_0_vm_pte_funcs +ffffffff82ae35b8 r sdma_v4_0_trap_irq_funcs +ffffffff82ae35c8 r sdma_v4_0_illegal_inst_irq_funcs +ffffffff82ae35d8 r sdma_v4_0_ecc_irq_funcs +ffffffff82ae35e8 r sdma_v4_0_vm_hole_irq_funcs +ffffffff82ae35f8 r sdma_v4_0_doorbell_invalid_irq_funcs +ffffffff82ae3608 r sdma_v4_0_pool_timeout_irq_funcs +ffffffff82ae3618 r sdma_v4_0_srbm_write_irq_funcs +ffffffff82ae3630 r golden_settings_sdma_4 +ffffffff82ae3890 r golden_settings_sdma_vg10 +ffffffff82ae3940 r golden_settings_sdma_vg12 +ffffffff82ae39f0 r golden_settings_sdma0_4_2_init +ffffffff82ae3a10 r golden_settings_sdma0_4_2 +ffffffff82ae3ca0 r golden_settings_sdma1_4_2 +ffffffff82ae3f30 r golden_settings_sdma_arct +ffffffff82ae4230 r golden_settings_sdma_aldebaran +ffffffff82ae43a0 r golden_settings_sdma_4_1 +ffffffff82ae44b0 r golden_settings_sdma_rv2 +ffffffff82ae44e0 r golden_settings_sdma_rv1 +ffffffff82ae4510 r golden_settings_sdma_4_3 +ffffffff82ae4600 r sdma_v4_0_ras_fields +ffffffff82ae5000 R sdma_v4_4_ras_hw_ops +ffffffff82ae5040 r sdma_v4_4_ras_fields +ffffffff82ae6000 R sdma_v5_0_ip_funcs +ffffffff82ae60a0 R sdma_v5_0_ip_block +ffffffff82ae60b8 r sdma_v5_0_ring_funcs +ffffffff82ae61d8 r sdma_v5_0_buffer_funcs +ffffffff82ae61f8 r sdma_v5_0_vm_pte_funcs +ffffffff82ae6218 r sdma_v5_0_trap_irq_funcs +ffffffff82ae6228 r sdma_v5_0_illegal_inst_irq_funcs +ffffffff82ae6240 r golden_settings_sdma_5 +ffffffff82ae6480 r golden_settings_sdma_nv10 +ffffffff82ae64b0 r golden_settings_sdma_nv14 +ffffffff82ae64e0 r golden_settings_sdma_5_sriov +ffffffff82ae66c0 r golden_settings_sdma_nv12 +ffffffff82ae6750 r golden_settings_sdma_cyan_skillfish +ffffffff82ae7000 R sdma_v5_2_ip_funcs +ffffffff82ae70a0 R sdma_v5_2_ip_block +ffffffff82ae70b8 r sdma_v5_2_ring_funcs +ffffffff82ae71d8 r sdma_v5_2_buffer_funcs +ffffffff82ae71f8 r sdma_v5_2_vm_pte_funcs +ffffffff82ae7218 r sdma_v5_2_trap_irq_funcs +ffffffff82ae7228 r sdma_v5_2_illegal_inst_irq_funcs +ffffffff82ae8000 R sdma_v6_0_ip_funcs +ffffffff82ae80a0 R sdma_v6_0_ip_block +ffffffff82ae80b8 r sdma_v6_0_ring_funcs +ffffffff82ae81d8 r sdma_v6_0_buffer_funcs +ffffffff82ae81f8 r sdma_v6_0_vm_pte_funcs +ffffffff82ae8218 r sdma_v6_0_trap_irq_funcs +ffffffff82ae8228 r sdma_v6_0_illegal_inst_irq_funcs +ffffffff82ae9000 r smu_v11_0_i2c_algo +ffffffff82ae9010 r smu_v11_0_i2c_i2c_lock_ops +ffffffff82ae9028 r smu_v11_0_i2c_control_quirks +ffffffff82aea000 R smuio_v11_0_funcs +ffffffff82aeb000 R smuio_v11_0_6_funcs +ffffffff82aec000 R smuio_v13_0_funcs +ffffffff82aed000 R smuio_v13_0_6_funcs +ffffffff82aee000 R smuio_v9_0_funcs +ffffffff82aef000 r soc15_common_ip_funcs +ffffffff82aef0a0 R vega10_common_ip_block +ffffffff82aef0b8 r soc15_asic_funcs +ffffffff82aef170 r vega20_asic_funcs +ffffffff82aef230 r soc15_allowed_read_registers +ffffffff82aef3c0 r vega_video_codecs_encode +ffffffff82aef3d0 r vega_video_codecs_decode +ffffffff82aef3e0 r rv_video_codecs_decode +ffffffff82aef3f0 r rn_video_codecs_decode +ffffffff82aef400 r vega_video_codecs_encode_array +ffffffff82aef430 r vega_video_codecs_decode_array +ffffffff82aef4b0 r rv_video_codecs_decode_array +ffffffff82aef540 r rn_video_codecs_decode_array +ffffffff82af0000 r soc21_common_ip_funcs +ffffffff82af00a0 R soc21_common_ip_block +ffffffff82af00b8 r soc21_asic_funcs +ffffffff82af0170 r soc21_allowed_read_registers +ffffffff82af02f0 r vcn_4_0_0_video_codecs_encode_vcn1 +ffffffff82af0300 r vcn_4_0_0_video_codecs_decode_vcn1 +ffffffff82af0310 r vcn_4_0_0_video_codecs_encode_vcn0 +ffffffff82af0320 r vcn_4_0_0_video_codecs_decode_vcn0 +ffffffff82af0330 r vcn_4_0_0_video_codecs_encode_array_vcn1 +ffffffff82af0360 r vcn_4_0_0_video_codecs_decode_array_vcn1 +ffffffff82af03b0 r vcn_4_0_0_video_codecs_encode_array_vcn0 +ffffffff82af03e0 r vcn_4_0_0_video_codecs_decode_array_vcn0 +ffffffff82af1000 r tonga_ih_ip_funcs +ffffffff82af10a0 R tonga_ih_ip_block +ffffffff82af10b8 r tonga_ih_funcs +ffffffff82af2000 R umc_v6_0_funcs +ffffffff82af3000 R umc_v6_1_channel_idx_tbl +ffffffff82af3080 R umc_v6_1_ras_hw_ops +ffffffff82af4000 R umc_v6_7_channel_idx_tbl_second +ffffffff82af4080 R umc_v6_7_channel_idx_tbl_first +ffffffff82af4100 R umc_v6_7_ras_hw_ops +ffffffff82af5000 R umc_v8_10_channelnum_map_colbit_table +ffffffff82af5040 R umc_v8_10_channel_idx_tbl +ffffffff82af50a0 R umc_v8_10_ras_hw_ops +ffffffff82af6000 R umc_v8_7_channel_idx_tbl +ffffffff82af6040 R umc_v8_7_ras_hw_ops +ffffffff82af7000 r uvd_v5_0_ip_funcs +ffffffff82af70a0 R uvd_v5_0_ip_block +ffffffff82af70b8 r uvd_v5_0_ring_funcs +ffffffff82af71d8 r uvd_v5_0_irq_funcs +ffffffff82af8000 r uvd_v6_0_ip_funcs +ffffffff82af80a0 R uvd_v6_0_ip_block +ffffffff82af80b8 R uvd_v6_2_ip_block +ffffffff82af80d0 R uvd_v6_3_ip_block +ffffffff82af80e8 r uvd_v6_0_ring_vm_funcs +ffffffff82af8208 r uvd_v6_0_ring_phys_funcs +ffffffff82af8328 r uvd_v6_0_enc_ring_vm_funcs +ffffffff82af8448 r uvd_v6_0_irq_funcs +ffffffff82af9000 R uvd_v7_0_ip_funcs +ffffffff82af90a0 R uvd_v7_0_ip_block +ffffffff82af90b8 r uvd_v7_0_ring_vm_funcs +ffffffff82af91d8 r uvd_v7_0_enc_ring_vm_funcs +ffffffff82af92f8 r uvd_v7_0_irq_funcs +ffffffff82afa000 r vce_v3_0_ip_funcs +ffffffff82afa0a0 R vce_v3_0_ip_block +ffffffff82afa0b8 R vce_v3_1_ip_block +ffffffff82afa0d0 R vce_v3_4_ip_block +ffffffff82afa0e8 r vce_v3_0_ring_vm_funcs +ffffffff82afa208 r vce_v3_0_ring_phys_funcs +ffffffff82afa328 r vce_v3_0_irq_funcs +ffffffff82afb000 R vce_v4_0_ip_funcs +ffffffff82afb0a0 R vce_v4_0_ip_block +ffffffff82afb0b8 r vce_v4_0_ring_vm_funcs +ffffffff82afb1d8 r vce_v4_0_irq_funcs +ffffffff82afc000 r vcn_v1_0_ip_funcs +ffffffff82afc0a0 R vcn_v1_0_ip_block +ffffffff82afc0b8 r vcn_v1_0_dec_ring_vm_funcs +ffffffff82afc1d8 r vcn_v1_0_enc_ring_vm_funcs +ffffffff82afc2f8 r vcn_v1_0_irq_funcs +ffffffff82afd000 r vcn_v2_0_ip_funcs +ffffffff82afd0a0 R vcn_v2_0_ip_block +ffffffff82afd0b8 r vcn_v2_0_dec_ring_vm_funcs +ffffffff82afd1d8 r vcn_v2_0_enc_ring_vm_funcs +ffffffff82afd2f8 r vcn_v2_0_irq_funcs +ffffffff82afe000 r vcn_v2_5_ip_funcs +ffffffff82afe0a0 R vcn_v2_5_ip_block +ffffffff82afe0b8 r vcn_v2_6_ip_funcs +ffffffff82afe158 R vcn_v2_6_ip_block +ffffffff82afe170 R vcn_v2_6_ras_hw_ops +ffffffff82afe1b0 r vcn_v2_5_dec_ring_vm_funcs +ffffffff82afe2d0 r vcn_v2_6_dec_ring_vm_funcs +ffffffff82afe3f0 r vcn_v2_5_enc_ring_vm_funcs +ffffffff82afe510 r vcn_v2_6_enc_ring_vm_funcs +ffffffff82afe630 r vcn_v2_5_irq_funcs +ffffffff82aff000 r vcn_v3_0_ip_funcs +ffffffff82aff0a0 R vcn_v3_0_ip_block +ffffffff82aff0b8 r vcn_v3_0_dec_ring_vm_funcs +ffffffff82aff1d8 r vcn_v3_0_enc_ring_vm_funcs +ffffffff82aff2f8 r vcn_v3_0_irq_funcs +ffffffff82b00000 r vcn_v4_0_ip_funcs +ffffffff82b000a0 R vcn_v4_0_ip_block +ffffffff82b000b8 r vcn_v4_0_unified_ring_vm_funcs +ffffffff82b001d8 r vcn_v4_0_irq_funcs +ffffffff82b01000 R vega10_ih_ip_funcs +ffffffff82b010a0 R vega10_ih_ip_block +ffffffff82b010b8 r vega10_ih_funcs +ffffffff82b010d8 r vega10_ih_self_irq_funcs +ffffffff82b02000 r GC_BASE +ffffffff82b02064 r HDP_BASE +ffffffff82b020c8 r MMHUB_BASE +ffffffff82b0212c r ATHUB_BASE +ffffffff82b02190 r NBIO_BASE +ffffffff82b021f4 r MP0_BASE +ffffffff82b02258 r MP1_BASE +ffffffff82b022bc r VCE_BASE +ffffffff82b02320 r VCN_BASE +ffffffff82b02384 r DF_BASE +ffffffff82b023e8 r DCE_BASE +ffffffff82b0244c r OSSSYS_BASE +ffffffff82b024b0 r SDMA0_BASE +ffffffff82b02514 r SDMA1_BASE +ffffffff82b02578 r SMUIO_BASE +ffffffff82b025dc r PWR_BASE +ffffffff82b02640 r NBIF_BASE +ffffffff82b026a4 r THM_BASE +ffffffff82b02708 r CLK_BASE +ffffffff82b03000 R vega20_ih_ip_funcs +ffffffff82b030a0 R vega20_ih_ip_block +ffffffff82b030b8 r vega20_ih_funcs +ffffffff82b030d8 r vega20_ih_self_irq_funcs +ffffffff82b04000 r GC_BASE +ffffffff82b04090 r HDP_BASE +ffffffff82b04120 r MMHUB_BASE +ffffffff82b041b0 r ATHUB_BASE +ffffffff82b04240 r NBIO_BASE +ffffffff82b042d0 r MP0_BASE +ffffffff82b04360 r MP1_BASE +ffffffff82b043f0 r UVD_BASE +ffffffff82b04480 r VCE_BASE +ffffffff82b04510 r DF_BASE +ffffffff82b045a0 r DCE_BASE +ffffffff82b04630 r OSSSYS_BASE +ffffffff82b046c0 r SDMA0_BASE +ffffffff82b04750 r SDMA1_BASE +ffffffff82b047e0 r SMUIO_BASE +ffffffff82b04870 r THM_BASE +ffffffff82b04900 r CLK_BASE +ffffffff82b04990 r UMC_BASE +ffffffff82b04a20 r RSMU_BASE +ffffffff82b05000 r vi_common_ip_block +ffffffff82b05018 r vi_common_ip_funcs +ffffffff82b050b8 r vi_asic_funcs +ffffffff82b05170 r vi_allowed_read_registers +ffffffff82b053d0 r topaz_video_codecs_encode +ffffffff82b053e0 r topaz_video_codecs_decode +ffffffff82b053f0 r tonga_video_codecs_encode +ffffffff82b05400 r tonga_video_codecs_decode +ffffffff82b05410 r polaris_video_codecs_encode +ffffffff82b05420 r cz_video_codecs_decode +ffffffff82b05430 r tonga_video_codecs_encode_array +ffffffff82b05450 r tonga_video_codecs_decode_array +ffffffff82b054a0 r polaris_video_codecs_encode_array +ffffffff82b054d0 r cz_video_codecs_decode_array +ffffffff82b05550 r iceland_mgcg_cgcg_init +ffffffff82b05590 r fiji_mgcg_cgcg_init +ffffffff82b055f0 r tonga_mgcg_cgcg_init +ffffffff82b05650 r cz_mgcg_cgcg_init +ffffffff82b05690 r stoney_mgcg_cgcg_init +ffffffff82b06000 r amdgpu_dm_funcs +ffffffff82b060a0 R dm_ip_block +ffffffff82b060b8 R amdgpu_dm_encoder_helper_funcs +ffffffff82b06120 r dm_display_funcs +ffffffff82b06180 r hpd_disconnect_quirk_table +ffffffff82b06ef0 r amdgpu_dm_mode_funcs +ffffffff82b06f38 r amdgpu_dm_audio_component_bind_ops +ffffffff82b06f48 r amdgpu_dm_audio_component_ops +ffffffff82b06f80 r amdgpu_dm_encoder_funcs +ffffffff82b06fa0 r amdgpu_dm_connector_funcs +ffffffff82b07018 r amdgpu_dm_connector_helper_funcs +ffffffff82b07068 r amdgpu_dm_i2c_algo +ffffffff82b07240 r add_fs_modes.common_rates +ffffffff82b07270 r amdgpu_dm_backlight_ops +ffffffff82b08000 r amdgpu_dm_crtc_funcs +ffffffff82b080c0 r amdgpu_dm_crtc_helper_funcs +ffffffff82b09000 r dm_dtn_log_begin.msg +ffffffff82b0900d r dm_dtn_log_end.msg +ffffffff82b09018 r SYNAPTICS_DEVICE_ID +ffffffff82b0a000 r dm_crtc_irq_funcs +ffffffff82b0a010 r dm_vline0_irq_funcs +ffffffff82b0a020 r dm_dmub_outbox_irq_funcs +ffffffff82b0a030 r dm_vupdate_irq_funcs +ffffffff82b0a040 r dm_dmub_trace_irq_funcs +ffffffff82b0a050 r dm_pageflip_irq_funcs +ffffffff82b0a060 r dm_hpd_irq_funcs +ffffffff82b0b000 r amdgpu_dm_encoder_funcs +ffffffff82b0b020 r dm_mst_cbs +ffffffff82b0b030 r dm_dp_mst_connector_funcs +ffffffff82b0b0a8 r dm_dp_mst_connector_helper_funcs +ffffffff82b0c000 r dm_plane_funcs +ffffffff82b0c068 r dm_plane_helper_funcs ffffffff82b0e000 r vbios_funcs -ffffffff82b13000 r command_table_helper_funcs +ffffffff82b0f000 r vbios_funcs ffffffff82b14000 r command_table_helper_funcs ffffffff82b15000 r command_table_helper_funcs ffffffff82b16000 r command_table_helper_funcs -ffffffff82b17000 r dce80_max_clks_by_state -ffffffff82b17028 r disp_clk_regs -ffffffff82b1707c r disp_clk_shift -ffffffff82b17088 r disp_clk_mask -ffffffff82b18000 r dce110_max_clks_by_state +ffffffff82b17000 r command_table_helper_funcs +ffffffff82b18000 r dce80_max_clks_by_state ffffffff82b18028 r disp_clk_regs ffffffff82b1807c r disp_clk_shift ffffffff82b18088 r disp_clk_mask -ffffffff82b19000 r dce112_max_clks_by_state +ffffffff82b19000 r dce110_max_clks_by_state ffffffff82b19028 r disp_clk_regs ffffffff82b1907c r disp_clk_shift ffffffff82b19088 r disp_clk_mask -ffffffff82b1a000 r dce120_max_clks_by_state -ffffffff82b1b000 r clk_mgr_regs -ffffffff82b1b054 r clk_mgr_shift -ffffffff82b1b060 r clk_mgr_mask +ffffffff82b1a000 r dce112_max_clks_by_state +ffffffff82b1a028 r disp_clk_regs +ffffffff82b1a07c r disp_clk_shift +ffffffff82b1a088 r disp_clk_mask +ffffffff82b1b000 r dce120_max_clks_by_state ffffffff82b1c000 r clk_mgr_regs ffffffff82b1c054 r clk_mgr_shift ffffffff82b1c060 r clk_mgr_mask ffffffff82b1d000 r clk_mgr_regs ffffffff82b1d054 r clk_mgr_shift ffffffff82b1d060 r clk_mgr_mask -ffffffff82b1e000 r lpddr5_wm_table -ffffffff82b1e0c0 r ddr5_wm_table +ffffffff82b1e000 r clk_mgr_regs +ffffffff82b1e054 r clk_mgr_shift +ffffffff82b1e060 r clk_mgr_mask ffffffff82b1f000 r lpddr5_wm_table ffffffff82b1f0c0 r ddr5_wm_table ffffffff82b20000 r lpddr5_wm_table ffffffff82b200c0 r ddr5_wm_table ffffffff82b21000 r lpddr5_wm_table -ffffffff82b210c0 r ddr4_wm_table -ffffffff82b22000 r clk_mgr_regs_dcn321 -ffffffff82b22054 r clk_mgr_shift_dcn321 -ffffffff82b22060 r clk_mgr_mask_dcn321 -ffffffff82b22084 r clk_mgr_regs_dcn32 -ffffffff82b220d8 r clk_mgr_shift_dcn32 -ffffffff82b220e4 r clk_mgr_mask_dcn32 -ffffffff82b23000 r DC_BUILD_ID -ffffffff82b25000 r output_csc_matrix -ffffffff82b250e0 r black_color_format -ffffffff82b26000 r DP_SINK_BRANCH_DEV_NAME_7580 -ffffffff82b27000 r DP_VGA_DONGLE_BRANCH_DEV_NAME -ffffffff82b27006 r DP_DVI_CONVERTER_ID_4 -ffffffff82b2700d r DP_DVI_CONVERTER_ID_5 -ffffffff82b28000 r DP_VGA_LVDS_CONVERTER_ID_2 -ffffffff82b28007 r DP_VGA_LVDS_CONVERTER_ID_3 -ffffffff82b28010 r dp_lt_fallbacks -ffffffff82b29000 r mandatory_dpcd_partitions -ffffffff82b2b000 r dce_funcs -ffffffff82b2c000 r funcs -ffffffff82b2d000 R video_optimized_pixel_rates -ffffffff82b2d1b0 r dce110_clk_src_funcs -ffffffff82b2d1d8 r dce112_clk_src_funcs -ffffffff82b2d200 r dcn20_clk_src_funcs -ffffffff82b2d228 r dcn3_clk_src_funcs -ffffffff82b2d250 r dcn31_clk_src_funcs -ffffffff82b2e000 r dce_funcs -ffffffff82b2e068 r dcn10_funcs -ffffffff82b2e0d0 r dcn20_funcs -ffffffff82b2e138 r dcn21_funcs -ffffffff82b2f000 r dce_ipp_funcs -ffffffff82b30000 r dce110_lnk_enc_funcs -ffffffff82b31000 r dce_mi_funcs -ffffffff82b31090 r dce112_mi_funcs -ffffffff82b31120 r dce120_mi_funcs -ffffffff82b311b0 r pte_settings -ffffffff82b32000 r funcs -ffffffff82b33000 r dce_link_panel_cntl_funcs -ffffffff82b34000 r filter_3tap_16p_upscale -ffffffff82b34040 r filter_3tap_16p_116 -ffffffff82b34080 r filter_3tap_16p_149 -ffffffff82b340c0 r filter_3tap_16p_183 -ffffffff82b34100 r filter_3tap_64p_upscale -ffffffff82b341d0 r filter_3tap_64p_116 -ffffffff82b342a0 r filter_3tap_64p_149 -ffffffff82b34370 r filter_3tap_64p_183 -ffffffff82b34440 r filter_4tap_16p_upscale -ffffffff82b34490 r filter_4tap_16p_116 -ffffffff82b344e0 r filter_4tap_16p_149 -ffffffff82b34530 r filter_4tap_16p_183 -ffffffff82b34580 r filter_4tap_64p_upscale -ffffffff82b34690 r filter_4tap_64p_116 -ffffffff82b347a0 r filter_4tap_64p_149 -ffffffff82b348b0 r filter_4tap_64p_183 -ffffffff82b349c0 r filter_5tap_64p_upscale -ffffffff82b34b10 r filter_5tap_64p_116 -ffffffff82b34c60 r filter_5tap_64p_149 -ffffffff82b34db0 r filter_5tap_64p_183 -ffffffff82b34f00 r filter_6tap_64p_upscale -ffffffff82b35090 r filter_6tap_64p_116 -ffffffff82b35220 r filter_6tap_64p_149 -ffffffff82b353b0 r filter_6tap_64p_183 -ffffffff82b35540 r filter_7tap_64p_upscale -ffffffff82b35710 r filter_7tap_64p_116 -ffffffff82b358e0 r filter_7tap_64p_149 -ffffffff82b35ab0 r filter_7tap_64p_183 -ffffffff82b35c80 r filter_8tap_64p_upscale -ffffffff82b35e90 r filter_8tap_64p_116 -ffffffff82b360a0 r filter_8tap_64p_149 -ffffffff82b362b0 r filter_8tap_64p_183 -ffffffff82b364c0 r filter_2tap_16p -ffffffff82b364f0 r filter_2tap_64p -ffffffff82b37000 r dce110_str_enc_funcs -ffffffff82b37110 r audio_clock_info_table_48bpc -ffffffff82b372a0 r audio_clock_info_table_36bpc -ffffffff82b37430 r audio_clock_info_table -ffffffff82b38000 r global_color_matrix -ffffffff82b380a8 r dce_transform_funcs -ffffffff82b39000 r abm_funcs -ffffffff82b3a000 r psr_funcs -ffffffff82b3a040 r DP_SINK_DEVICE_STR_ID_1 -ffffffff82b3a045 r DP_SINK_DEVICE_STR_ID_2 -ffffffff82b3b000 r reg_offsets -ffffffff82b3c000 r bios_regs -ffffffff82b3c008 r res_cap -ffffffff82b3c048 r dce100_res_pool_funcs -ffffffff82b3c130 r clk_src_regs -ffffffff82b3c22c r dmcu_regs -ffffffff82b3c288 r dmcu_shift -ffffffff82b3c29c r dmcu_mask -ffffffff82b3c2e8 r abm_regs -ffffffff82b3c328 r abm_shift -ffffffff82b3c33c r abm_mask -ffffffff82b3c390 r dce100_tg_offsets -ffffffff82b3c3d8 r plane_cap -ffffffff82b3c408 r res_create_funcs -ffffffff82b3c440 r panel_cntl_regs -ffffffff82b3c460 r panel_cntl_shift -ffffffff82b3c470 r panel_cntl_mask -ffffffff82b3c4b0 r link_enc_regs -ffffffff82b3c870 r link_enc_aux_regs -ffffffff82b3c8c0 r link_enc_hpd_regs -ffffffff82b3c8d8 r link_enc_feature -ffffffff82b3c8e8 r cs_shift -ffffffff82b3c8f4 r cs_mask -ffffffff82b3c920 r mi_regs -ffffffff82b3cc38 r mi_shifts -ffffffff82b3cc80 r mi_masks -ffffffff82b3cda0 r ipp_regs -ffffffff82b3cf98 r ipp_shift -ffffffff82b3cfc0 r ipp_mask -ffffffff82b3d060 r xfm_regs -ffffffff82b3d600 r xfm_shift -ffffffff82b3d660 r xfm_mask -ffffffff82b3d7e0 r opp_regs -ffffffff82b3d930 r opp_shift -ffffffff82b3d95c r opp_mask -ffffffff82b3da10 r aux_engine_regs -ffffffff82b3db00 r aux_mask -ffffffff82b3db60 r aux_shift -ffffffff82b3db80 r i2c_hw_regs -ffffffff82b3dcd0 r i2c_shifts -ffffffff82b3dcfc r i2c_masks -ffffffff82b3dda0 r audio_regs -ffffffff82b3ded4 r audio_shift -ffffffff82b3deec r audio_mask -ffffffff82b3df30 r stream_enc_regs -ffffffff82b3e5dc r se_shift -ffffffff82b3e660 r se_mask -ffffffff82b3e864 r hwseq_reg -ffffffff82b3ea80 r hwseq_shift -ffffffff82b3eb00 r hwseq_mask -ffffffff82b3f000 r reg_offsets -ffffffff82b3f018 r dce110_compressor_funcs -ffffffff82b40000 r dce110_funcs -ffffffff82b402c0 r dce110_private_funcs -ffffffff82b41000 r dce110_mem_input_v_funcs -ffffffff82b41090 r dvmm_Hw_Setting_1DTiling -ffffffff82b41120 r dvmm_Hw_Setting_2DTiling -ffffffff82b411b0 r dvmm_Hw_Setting_Linear -ffffffff82b42000 r global_color_matrix -ffffffff82b420b0 r input_csc_matrix -ffffffff82b43000 r funcs -ffffffff82b44000 r bios_regs -ffffffff82b44008 r dce110_res_pool_funcs -ffffffff82b440f0 r clk_src_regs -ffffffff82b441ec r dmcu_regs -ffffffff82b44248 r dmcu_shift -ffffffff82b4425c r dmcu_mask -ffffffff82b442a8 r abm_regs -ffffffff82b442e8 r abm_shift -ffffffff82b442fc r abm_mask -ffffffff82b44350 r dce110_tg_offsets -ffffffff82b44398 r res_create_funcs -ffffffff82b443c8 r plane_cap -ffffffff82b443f4 r underlay_plane_cap -ffffffff82b44420 r stoney_resource_cap -ffffffff82b4445c r carrizo_resource_cap -ffffffff82b444a0 r panel_cntl_regs -ffffffff82b444c0 r panel_cntl_shift -ffffffff82b444d0 r panel_cntl_mask -ffffffff82b44510 r link_enc_regs -ffffffff82b448d0 r link_enc_aux_regs -ffffffff82b44920 r link_enc_hpd_regs -ffffffff82b44938 r link_enc_feature -ffffffff82b44948 r cs_shift -ffffffff82b44954 r cs_mask -ffffffff82b44980 r mi_regs -ffffffff82b44b0c r mi_shifts -ffffffff82b44b54 r mi_masks -ffffffff82b44c70 r ipp_regs -ffffffff82b44d6c r ipp_shift -ffffffff82b44d94 r ipp_mask -ffffffff82b44e30 r xfm_regs -ffffffff82b45100 r xfm_shift -ffffffff82b45160 r xfm_mask -ffffffff82b452e0 r opp_regs -ffffffff82b45430 r opp_shift -ffffffff82b4545c r opp_mask -ffffffff82b45510 r aux_engine_regs -ffffffff82b45600 r aux_mask -ffffffff82b45660 r aux_shift -ffffffff82b45680 r i2c_hw_regs -ffffffff82b457d0 r i2c_shifts -ffffffff82b457fc r i2c_masks -ffffffff82b458a0 r audio_regs -ffffffff82b459d4 r audio_shift -ffffffff82b459ec r audio_mask -ffffffff82b45a30 r stream_enc_regs -ffffffff82b45d0c r se_shift -ffffffff82b45d90 r se_mask -ffffffff82b45f94 r hwseq_stoney_reg -ffffffff82b461b0 r hwseq_cz_reg -ffffffff82b463cc r hwseq_shift -ffffffff82b4644c r hwseq_mask -ffffffff82b47000 r dce110_tg_funcs -ffffffff82b48000 r dce110_tg_v_funcs -ffffffff82b49000 r dce110_xfmv_funcs -ffffffff82b4a000 r reg_offsets +ffffffff82b210c0 r ddr5_wm_table +ffffffff82b22000 r lpddr5_wm_table +ffffffff82b220c0 r ddr4_wm_table +ffffffff82b23000 r clk_mgr_regs_dcn321 +ffffffff82b23054 r clk_mgr_shift_dcn321 +ffffffff82b23060 r clk_mgr_mask_dcn321 +ffffffff82b23084 r clk_mgr_regs_dcn32 +ffffffff82b230d8 r clk_mgr_shift_dcn32 +ffffffff82b230e4 r clk_mgr_mask_dcn32 +ffffffff82b24000 r DC_BUILD_ID +ffffffff82b26000 r output_csc_matrix +ffffffff82b260e0 r black_color_format +ffffffff82b27000 r DP_SINK_BRANCH_DEV_NAME_7580 +ffffffff82b28000 r DP_VGA_DONGLE_BRANCH_DEV_NAME +ffffffff82b28006 r DP_DVI_CONVERTER_ID_4 +ffffffff82b2800d r DP_DVI_CONVERTER_ID_5 +ffffffff82b29000 r DP_VGA_LVDS_CONVERTER_ID_2 +ffffffff82b29007 r DP_VGA_LVDS_CONVERTER_ID_3 +ffffffff82b29010 r dp_lt_fallbacks +ffffffff82b2a000 r mandatory_dpcd_partitions +ffffffff82b2c000 r dce_funcs +ffffffff82b2d000 r funcs +ffffffff82b2e000 R video_optimized_pixel_rates +ffffffff82b2e1b0 r dce110_clk_src_funcs +ffffffff82b2e1d8 r dce112_clk_src_funcs +ffffffff82b2e200 r dcn20_clk_src_funcs +ffffffff82b2e228 r dcn3_clk_src_funcs +ffffffff82b2e250 r dcn31_clk_src_funcs +ffffffff82b2f000 r dce_funcs +ffffffff82b2f068 r dcn10_funcs +ffffffff82b2f0d0 r dcn20_funcs +ffffffff82b2f138 r dcn21_funcs +ffffffff82b30000 r dce_ipp_funcs +ffffffff82b31000 r dce110_lnk_enc_funcs +ffffffff82b32000 r dce_mi_funcs +ffffffff82b32090 r dce112_mi_funcs +ffffffff82b32120 r dce120_mi_funcs +ffffffff82b321b0 r pte_settings +ffffffff82b33000 r funcs +ffffffff82b34000 r dce_link_panel_cntl_funcs +ffffffff82b35000 r filter_3tap_16p_upscale +ffffffff82b35040 r filter_3tap_16p_116 +ffffffff82b35080 r filter_3tap_16p_149 +ffffffff82b350c0 r filter_3tap_16p_183 +ffffffff82b35100 r filter_3tap_64p_upscale +ffffffff82b351d0 r filter_3tap_64p_116 +ffffffff82b352a0 r filter_3tap_64p_149 +ffffffff82b35370 r filter_3tap_64p_183 +ffffffff82b35440 r filter_4tap_16p_upscale +ffffffff82b35490 r filter_4tap_16p_116 +ffffffff82b354e0 r filter_4tap_16p_149 +ffffffff82b35530 r filter_4tap_16p_183 +ffffffff82b35580 r filter_4tap_64p_upscale +ffffffff82b35690 r filter_4tap_64p_116 +ffffffff82b357a0 r filter_4tap_64p_149 +ffffffff82b358b0 r filter_4tap_64p_183 +ffffffff82b359c0 r filter_5tap_64p_upscale +ffffffff82b35b10 r filter_5tap_64p_116 +ffffffff82b35c60 r filter_5tap_64p_149 +ffffffff82b35db0 r filter_5tap_64p_183 +ffffffff82b35f00 r filter_6tap_64p_upscale +ffffffff82b36090 r filter_6tap_64p_116 +ffffffff82b36220 r filter_6tap_64p_149 +ffffffff82b363b0 r filter_6tap_64p_183 +ffffffff82b36540 r filter_7tap_64p_upscale +ffffffff82b36710 r filter_7tap_64p_116 +ffffffff82b368e0 r filter_7tap_64p_149 +ffffffff82b36ab0 r filter_7tap_64p_183 +ffffffff82b36c80 r filter_8tap_64p_upscale +ffffffff82b36e90 r filter_8tap_64p_116 +ffffffff82b370a0 r filter_8tap_64p_149 +ffffffff82b372b0 r filter_8tap_64p_183 +ffffffff82b374c0 r filter_2tap_16p +ffffffff82b374f0 r filter_2tap_64p +ffffffff82b38000 r dce110_str_enc_funcs +ffffffff82b38110 r audio_clock_info_table_48bpc +ffffffff82b382a0 r audio_clock_info_table_36bpc +ffffffff82b38430 r audio_clock_info_table +ffffffff82b39000 r global_color_matrix +ffffffff82b390a8 r dce_transform_funcs +ffffffff82b3a000 r abm_funcs +ffffffff82b3b000 r psr_funcs +ffffffff82b3b040 r DP_SINK_DEVICE_STR_ID_1 +ffffffff82b3b045 r DP_SINK_DEVICE_STR_ID_2 +ffffffff82b3c000 r reg_offsets +ffffffff82b3d000 r bios_regs +ffffffff82b3d008 r res_cap +ffffffff82b3d048 r dce100_res_pool_funcs +ffffffff82b3d130 r clk_src_regs +ffffffff82b3d22c r dmcu_regs +ffffffff82b3d288 r dmcu_shift +ffffffff82b3d29c r dmcu_mask +ffffffff82b3d2e8 r abm_regs +ffffffff82b3d328 r abm_shift +ffffffff82b3d33c r abm_mask +ffffffff82b3d390 r dce100_tg_offsets +ffffffff82b3d3d8 r plane_cap +ffffffff82b3d408 r res_create_funcs +ffffffff82b3d440 r panel_cntl_regs +ffffffff82b3d460 r panel_cntl_shift +ffffffff82b3d470 r panel_cntl_mask +ffffffff82b3d4b0 r link_enc_regs +ffffffff82b3d870 r link_enc_aux_regs +ffffffff82b3d8c0 r link_enc_hpd_regs +ffffffff82b3d8d8 r link_enc_feature +ffffffff82b3d8e8 r cs_shift +ffffffff82b3d8f4 r cs_mask +ffffffff82b3d920 r mi_regs +ffffffff82b3dc38 r mi_shifts +ffffffff82b3dc80 r mi_masks +ffffffff82b3dda0 r ipp_regs +ffffffff82b3df98 r ipp_shift +ffffffff82b3dfc0 r ipp_mask +ffffffff82b3e060 r xfm_regs +ffffffff82b3e600 r xfm_shift +ffffffff82b3e660 r xfm_mask +ffffffff82b3e7e0 r opp_regs +ffffffff82b3e930 r opp_shift +ffffffff82b3e95c r opp_mask +ffffffff82b3ea10 r aux_engine_regs +ffffffff82b3eb00 r aux_mask +ffffffff82b3eb60 r aux_shift +ffffffff82b3eb80 r i2c_hw_regs +ffffffff82b3ecd0 r i2c_shifts +ffffffff82b3ecfc r i2c_masks +ffffffff82b3eda0 r audio_regs +ffffffff82b3eed4 r audio_shift +ffffffff82b3eeec r audio_mask +ffffffff82b3ef30 r stream_enc_regs +ffffffff82b3f5dc r se_shift +ffffffff82b3f660 r se_mask +ffffffff82b3f864 r hwseq_reg +ffffffff82b3fa80 r hwseq_shift +ffffffff82b3fb00 r hwseq_mask +ffffffff82b40000 r reg_offsets +ffffffff82b40018 r dce110_compressor_funcs +ffffffff82b41000 r dce110_funcs +ffffffff82b412c0 r dce110_private_funcs +ffffffff82b42000 r dce110_mem_input_v_funcs +ffffffff82b42090 r dvmm_Hw_Setting_1DTiling +ffffffff82b42120 r dvmm_Hw_Setting_2DTiling +ffffffff82b421b0 r dvmm_Hw_Setting_Linear +ffffffff82b43000 r global_color_matrix +ffffffff82b430b0 r input_csc_matrix +ffffffff82b44000 r funcs +ffffffff82b45000 r bios_regs +ffffffff82b45008 r dce110_res_pool_funcs +ffffffff82b450f0 r clk_src_regs +ffffffff82b451ec r dmcu_regs +ffffffff82b45248 r dmcu_shift +ffffffff82b4525c r dmcu_mask +ffffffff82b452a8 r abm_regs +ffffffff82b452e8 r abm_shift +ffffffff82b452fc r abm_mask +ffffffff82b45350 r dce110_tg_offsets +ffffffff82b45398 r res_create_funcs +ffffffff82b453c8 r plane_cap +ffffffff82b453f4 r underlay_plane_cap +ffffffff82b45420 r stoney_resource_cap +ffffffff82b4545c r carrizo_resource_cap +ffffffff82b454a0 r panel_cntl_regs +ffffffff82b454c0 r panel_cntl_shift +ffffffff82b454d0 r panel_cntl_mask +ffffffff82b45510 r link_enc_regs +ffffffff82b458d0 r link_enc_aux_regs +ffffffff82b45920 r link_enc_hpd_regs +ffffffff82b45938 r link_enc_feature +ffffffff82b45948 r cs_shift +ffffffff82b45954 r cs_mask +ffffffff82b45980 r mi_regs +ffffffff82b45b0c r mi_shifts +ffffffff82b45b54 r mi_masks +ffffffff82b45c70 r ipp_regs +ffffffff82b45d6c r ipp_shift +ffffffff82b45d94 r ipp_mask +ffffffff82b45e30 r xfm_regs +ffffffff82b46100 r xfm_shift +ffffffff82b46160 r xfm_mask +ffffffff82b462e0 r opp_regs +ffffffff82b46430 r opp_shift +ffffffff82b4645c r opp_mask +ffffffff82b46510 r aux_engine_regs +ffffffff82b46600 r aux_mask +ffffffff82b46660 r aux_shift +ffffffff82b46680 r i2c_hw_regs +ffffffff82b467d0 r i2c_shifts +ffffffff82b467fc r i2c_masks +ffffffff82b468a0 r audio_regs +ffffffff82b469d4 r audio_shift +ffffffff82b469ec r audio_mask +ffffffff82b46a30 r stream_enc_regs +ffffffff82b46d0c r se_shift +ffffffff82b46d90 r se_mask +ffffffff82b46f94 r hwseq_stoney_reg +ffffffff82b471b0 r hwseq_cz_reg +ffffffff82b473cc r hwseq_shift +ffffffff82b4744c r hwseq_mask +ffffffff82b48000 r dce110_tg_funcs +ffffffff82b49000 r dce110_tg_v_funcs +ffffffff82b4a000 r dce110_xfmv_funcs ffffffff82b4b000 r reg_offsets -ffffffff82b4c000 r bios_regs -ffffffff82b4c008 r dce112_res_pool_funcs -ffffffff82b4c0f0 r clk_src_regs -ffffffff82b4c2e8 r dmcu_regs -ffffffff82b4c344 r dmcu_shift -ffffffff82b4c358 r dmcu_mask -ffffffff82b4c3a4 r abm_regs -ffffffff82b4c3e4 r abm_shift -ffffffff82b4c3f8 r abm_mask -ffffffff82b4c440 r dce112_tg_offsets -ffffffff82b4c488 r res_create_funcs -ffffffff82b4c4b8 r plane_cap -ffffffff82b4c4e4 r polaris_11_resource_cap -ffffffff82b4c520 r polaris_10_resource_cap -ffffffff82b4c560 r panel_cntl_regs -ffffffff82b4c580 r panel_cntl_shift -ffffffff82b4c590 r panel_cntl_mask -ffffffff82b4c5d0 r link_enc_regs -ffffffff82b4c990 r link_enc_aux_regs -ffffffff82b4c9e0 r link_enc_hpd_regs -ffffffff82b4c9f8 r link_enc_feature -ffffffff82b4ca08 r cs_shift -ffffffff82b4ca14 r cs_mask -ffffffff82b4ca40 r mi_regs -ffffffff82b4cd58 r mi_shifts -ffffffff82b4cda0 r mi_masks -ffffffff82b4cec0 r ipp_regs -ffffffff82b4d0b8 r ipp_shift -ffffffff82b4d0e0 r ipp_mask -ffffffff82b4d180 r xfm_regs -ffffffff82b4d720 r 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-ffffffff82c11da8 r vpg_shift -ffffffff82c11dd0 r vpg_mask -ffffffff82c11e64 r afmt_shift -ffffffff82c11e78 r afmt_mask -ffffffff82c11ebc r hpo_dp_se_shift -ffffffff82c11ee4 r hpo_dp_se_mask -ffffffff82c11f84 r apg_shift -ffffffff82c11f8c r apg_mask -ffffffff82c11fa4 r hpo_dp_le_shift -ffffffff82c11fc0 r hpo_dp_le_mask -ffffffff82c12024 r hwseq_shift -ffffffff82c120a4 r hwseq_mask -ffffffff82c13000 r dcn321_link_enc_funcs -ffffffff82c14000 r res_cap_dcn321 -ffffffff82c14040 r debug_defaults_diags -ffffffff82c141b8 r dccg_shift -ffffffff82c14250 r dccg_mask -ffffffff82c144b0 r abm_shift -ffffffff82c144c4 r abm_mask -ffffffff82c14510 r res_create_funcs -ffffffff82c14540 r res_create_maximus_funcs -ffffffff82c14570 r plane_cap -ffffffff82c1459c r le_shift -ffffffff82c1468c r le_mask -ffffffff82c14a44 r link_enc_feature -ffffffff82c14a58 r debug_defaults_drv -ffffffff82c14bd0 r cs_shift -ffffffff82c14bdc r cs_mask -ffffffff82c14c04 r hubbub_shift -ffffffff82c14c8c r hubbub_mask -ffffffff82c14ea8 r vmid_shifts -ffffffff82c14eb0 r vmid_masks -ffffffff82c14ed0 r hubp_shift -ffffffff82c14fcc r hubp_mask -ffffffff82c153bc r tf_shift -ffffffff82c1568c r tf_mask -ffffffff82c161cc r opp_shift -ffffffff82c16204 r opp_mask -ffffffff82c162d8 r optc_shift -ffffffff82c16398 r optc_mask -ffffffff82c16698 r mpc_shift -ffffffff82c16774 r mpc_mask -ffffffff82c16ae0 r dsc_shift -ffffffff82c16b98 r dsc_mask -ffffffff82c16e70 r dwbc30_shift -ffffffff82c16fa4 r dwbc30_mask -ffffffff82c1746c r mcif_wb30_shift -ffffffff82c17518 r mcif_wb30_mask -ffffffff82c177c4 r aux_mask -ffffffff82c17824 r aux_shift -ffffffff82c1783c r i2c_shifts -ffffffff82c17868 r i2c_masks -ffffffff82c1790c r audio_shift -ffffffff82c17924 r audio_mask -ffffffff82c17960 r se_shift -ffffffff82c17a3c r se_mask -ffffffff82c17da8 r vpg_shift -ffffffff82c17dd0 r vpg_mask -ffffffff82c17e64 r afmt_shift -ffffffff82c17e78 r afmt_mask -ffffffff82c17ebc r hpo_dp_se_shift -ffffffff82c17ee4 r hpo_dp_se_mask -ffffffff82c17f84 r apg_shift -ffffffff82c17f8c r apg_mask -ffffffff82c17fa4 r hpo_dp_le_shift -ffffffff82c17fc0 r hpo_dp_le_mask -ffffffff82c18024 r hwseq_shift -ffffffff82c180a4 r hwseq_mask -ffffffff82c1a000 R dcn10_soc_defaults -ffffffff82c1a08c R dcn10_ip_defaults -ffffffff82c25000 R dml20_funcs -ffffffff82c25030 R dml20v2_funcs -ffffffff82c25060 R dml21_funcs -ffffffff82c25090 R dml30_funcs -ffffffff82c250c0 R dml31_funcs -ffffffff82c250f0 R dml314_funcs -ffffffff82c25120 R dml32_funcs -ffffffff82c28000 R qp_table_422_10bpc_min -ffffffff82c28740 R qp_table_444_8bpc_max -ffffffff82c29080 R qp_table_420_12bpc_max -ffffffff82c297c0 R qp_table_444_10bpc_min -ffffffff82c2a400 R qp_table_420_8bpc_max -ffffffff82c2a840 R qp_table_444_8bpc_min -ffffffff82c2b180 R qp_table_444_12bpc_min -ffffffff82c2c0c0 R qp_table_420_12bpc_min -ffffffff82c2c800 R qp_table_422_12bpc_min -ffffffff82c2d140 R qp_table_422_12bpc_max -ffffffff82c2da80 R qp_table_444_12bpc_max -ffffffff82c2e9c0 R qp_table_420_8bpc_min -ffffffff82c2ee00 R qp_table_422_8bpc_min -ffffffff82c2f340 R qp_table_422_10bpc_max -ffffffff82c2fa80 R qp_table_420_10bpc_max -ffffffff82c30040 R qp_table_420_10bpc_min -ffffffff82c30600 R qp_table_444_10bpc_max -ffffffff82c31240 R qp_table_422_8bpc_max -ffffffff82c33000 r funcs -ffffffff82c33050 r hpd_regs -ffffffff82c331a0 r hpd_shift -ffffffff82c331b0 r hpd_mask -ffffffff82c331c0 r ddc_data_regs -ffffffff82c333a0 r ddc_clk_regs -ffffffff82c33580 r ddc_shift -ffffffff82c335a8 r ddc_mask +ffffffff82b4c000 r reg_offsets +ffffffff82b4d000 r bios_regs +ffffffff82b4d008 r dce112_res_pool_funcs +ffffffff82b4d0f0 r clk_src_regs +ffffffff82b4d2e8 r dmcu_regs +ffffffff82b4d344 r dmcu_shift +ffffffff82b4d358 r dmcu_mask +ffffffff82b4d3a4 r abm_regs +ffffffff82b4d3e4 r abm_shift +ffffffff82b4d3f8 r abm_mask +ffffffff82b4d440 r dce112_tg_offsets +ffffffff82b4d488 r res_create_funcs +ffffffff82b4d4b8 r plane_cap +ffffffff82b4d4e4 r polaris_11_resource_cap +ffffffff82b4d520 r polaris_10_resource_cap +ffffffff82b4d560 r panel_cntl_regs +ffffffff82b4d580 r panel_cntl_shift +ffffffff82b4d590 r panel_cntl_mask +ffffffff82b4d5d0 r link_enc_regs +ffffffff82b4d990 r link_enc_aux_regs +ffffffff82b4d9e0 r link_enc_hpd_regs +ffffffff82b4d9f8 r link_enc_feature +ffffffff82b4da08 r cs_shift +ffffffff82b4da14 r cs_mask +ffffffff82b4da40 r mi_regs +ffffffff82b4dd58 r mi_shifts +ffffffff82b4dda0 r mi_masks +ffffffff82b4dec0 r ipp_regs +ffffffff82b4e0b8 r ipp_shift +ffffffff82b4e0e0 r ipp_mask +ffffffff82b4e180 r xfm_regs +ffffffff82b4e720 r xfm_shift +ffffffff82b4e780 r xfm_mask +ffffffff82b4e900 r opp_regs +ffffffff82b4ea50 r opp_shift +ffffffff82b4ea7c r opp_mask +ffffffff82b4eb30 r aux_engine_regs +ffffffff82b4ec20 r aux_mask +ffffffff82b4ec80 r aux_shift +ffffffff82b4eca0 r i2c_hw_regs +ffffffff82b4edf0 r i2c_shifts +ffffffff82b4ee1c r i2c_masks +ffffffff82b4eec0 r audio_regs +ffffffff82b4efc8 r audio_shift +ffffffff82b4efe0 r audio_mask +ffffffff82b4f020 r stream_enc_regs +ffffffff82b4f5d8 r se_shift +ffffffff82b4f65c r se_mask +ffffffff82b4f860 r hwseq_reg +ffffffff82b4fa7c r hwseq_shift +ffffffff82b4fafc r hwseq_mask +ffffffff82b50000 r bios_regs +ffffffff82b50008 r res_cap +ffffffff82b50048 r dce120_res_pool_funcs +ffffffff82b50130 r debug_defaults +ffffffff82b502b0 r clk_src_regs +ffffffff82b504a8 r dmcu_regs +ffffffff82b50504 r dmcu_shift +ffffffff82b50518 r dmcu_mask +ffffffff82b50564 r abm_regs +ffffffff82b505a4 r abm_shift +ffffffff82b505b8 r abm_mask +ffffffff82b50600 r dce120_tg_offsets +ffffffff82b50648 r dce121_res_create_funcs +ffffffff82b50678 r res_create_funcs +ffffffff82b506a8 r plane_cap +ffffffff82b506e0 r panel_cntl_regs +ffffffff82b50700 r panel_cntl_shift +ffffffff82b50710 r panel_cntl_mask +ffffffff82b50750 r link_enc_regs +ffffffff82b50b10 r link_enc_aux_regs +ffffffff82b50b60 r link_enc_hpd_regs +ffffffff82b50b78 r link_enc_feature +ffffffff82b50b88 r cs_shift +ffffffff82b50b94 r cs_mask +ffffffff82b50bc0 r mi_regs +ffffffff82b50ed8 r mi_shifts +ffffffff82b50f20 r mi_masks +ffffffff82b51040 r ipp_regs +ffffffff82b51238 r ipp_shift +ffffffff82b51260 r ipp_mask +ffffffff82b51300 r xfm_regs +ffffffff82b518a0 r xfm_shift +ffffffff82b51900 r xfm_mask +ffffffff82b51a80 r opp_regs +ffffffff82b51bd0 r opp_shift +ffffffff82b51bfc r opp_mask +ffffffff82b51cb0 r aux_engine_regs +ffffffff82b51da0 r aux_mask +ffffffff82b51e00 r aux_shift +ffffffff82b51e20 r i2c_hw_regs +ffffffff82b51f70 r i2c_shifts +ffffffff82b51f9c r i2c_masks +ffffffff82b52040 r audio_regs +ffffffff82b52174 r audio_shift +ffffffff82b5218c r audio_mask +ffffffff82b521d0 r stream_enc_regs +ffffffff82b52788 r se_shift +ffffffff82b5280c r se_mask +ffffffff82b52a10 r dce121_hwseq_reg +ffffffff82b52c2c r dce121_hwseq_shift +ffffffff82b52cac r dce121_hwseq_mask +ffffffff82b52ea0 r hwseq_reg +ffffffff82b530bc r hwseq_shift +ffffffff82b5313c r hwseq_mask +ffffffff82b54000 r dce120_tg_funcs +ffffffff82b55000 r bios_regs +ffffffff82b55008 r res_cap +ffffffff82b55048 r dce80_res_pool_funcs +ffffffff82b55130 r clk_src_regs +ffffffff82b5522c r dmcu_regs +ffffffff82b55288 r dmcu_shift +ffffffff82b5529c r dmcu_mask +ffffffff82b552e8 r abm_regs +ffffffff82b55328 r abm_shift +ffffffff82b5533c r abm_mask +ffffffff82b55390 r dce80_tg_offsets +ffffffff82b553d8 r plane_cap +ffffffff82b55408 r res_create_funcs +ffffffff82b55440 r panel_cntl_regs +ffffffff82b55460 r panel_cntl_shift +ffffffff82b55470 r panel_cntl_mask +ffffffff82b554b0 r link_enc_regs +ffffffff82b55870 r link_enc_aux_regs +ffffffff82b558c0 r link_enc_hpd_regs +ffffffff82b558d8 r link_enc_feature +ffffffff82b558e8 r cs_shift +ffffffff82b558f4 r cs_mask +ffffffff82b55920 r mi_regs +ffffffff82b55c38 r mi_shifts +ffffffff82b55c80 r mi_masks +ffffffff82b55da0 r ipp_regs +ffffffff82b55f98 r ipp_shift +ffffffff82b55fc0 r ipp_mask +ffffffff82b56060 r xfm_regs +ffffffff82b56600 r xfm_shift +ffffffff82b56660 r xfm_mask +ffffffff82b567e0 r opp_regs +ffffffff82b56930 r opp_shift +ffffffff82b5695c r opp_mask +ffffffff82b56a10 r aux_engine_regs +ffffffff82b56b00 r aux_mask +ffffffff82b56b60 r aux_shift +ffffffff82b56b80 r i2c_hw_regs +ffffffff82b56cd0 r i2c_shifts +ffffffff82b56cfc r i2c_masks +ffffffff82b56da0 r audio_regs +ffffffff82b56ed4 r audio_shift +ffffffff82b56eec r audio_mask +ffffffff82b56f30 r stream_enc_regs +ffffffff82b575dc r se_shift +ffffffff82b57660 r se_mask +ffffffff82b57864 r hwseq_reg +ffffffff82b57a80 r hwseq_shift +ffffffff82b57b00 r hwseq_mask +ffffffff82b57cf4 r res_cap_81 +ffffffff82b57d30 r res_cap_83 +ffffffff82b58000 r reg_offsets +ffffffff82b58048 r dce80_tg_funcs +ffffffff82b59000 r dcn10_dpp_funcs +ffffffff82b5a000 r dpp_input_csc_matrix +ffffffff82b5c000 r hubbub1_funcs +ffffffff82b5d000 r dcn10_hubp_funcs +ffffffff82b5e000 r reduceSizeAndFraction.prime_numbers +ffffffff82b60000 r dcn10_funcs +ffffffff82b602c0 r dcn10_private_funcs +ffffffff82b61000 r dcn10_ipp_funcs +ffffffff82b61048 r dcn20_ipp_funcs +ffffffff82b62000 r dcn10_lnk_enc_funcs +ffffffff82b63000 r dcn10_mpc_funcs +ffffffff82b64000 r dcn10_opp_funcs +ffffffff82b65000 r dcn10_tg_funcs +ffffffff82b66000 r bios_regs +ffffffff82b66008 r rv2_res_cap +ffffffff82b66044 r res_cap +ffffffff82b66080 r dcn10_res_pool_funcs +ffffffff82b66168 r debug_defaults_drv +ffffffff82b662e0 r debug_defaults_diags +ffffffff82b66460 r clk_src_regs +ffffffff82b665b0 r dmcu_regs +ffffffff82b6660c r dmcu_shift +ffffffff82b66620 r dmcu_mask +ffffffff82b6666c r abm_regs +ffffffff82b666ac r abm_shift +ffffffff82b666c0 r abm_mask +ffffffff82b66708 r res_create_funcs +ffffffff82b66738 r res_create_maximus_funcs +ffffffff82b66768 r plane_cap +ffffffff82b667a0 r panel_cntl_regs +ffffffff82b667c0 r panel_cntl_shift +ffffffff82b667d0 r panel_cntl_mask +ffffffff82b66810 r link_enc_regs +ffffffff82b66d20 r link_enc_aux_regs +ffffffff82b66d60 r link_enc_hpd_regs +ffffffff82b66d70 r le_shift +ffffffff82b66e60 r le_mask +ffffffff82b67218 r link_enc_feature +ffffffff82b67228 r cs_shift +ffffffff82b67234 r cs_mask +ffffffff82b67260 r hubp_regs +ffffffff82b67910 r hubp_shift +ffffffff82b679d4 r hubp_mask +ffffffff82b67ce0 r ipp_regs +ffffffff82b67dc0 r ipp_shift +ffffffff82b67ddc r ipp_mask +ffffffff82b67e50 r tf_regs +ffffffff82b68db0 r tf_shift +ffffffff82b69018 r tf_mask +ffffffff82b699b0 r opp_regs +ffffffff82b69a80 r opp_shift +ffffffff82b69aa0 r opp_mask +ffffffff82b69b20 r tg_regs +ffffffff82b6a020 r tg_shift +ffffffff82b6a0e0 r tg_mask +ffffffff82b6a3e0 r aux_engine_regs +ffffffff82b6a4d0 r aux_mask +ffffffff82b6a530 r aux_shift +ffffffff82b6a550 r i2c_hw_regs +ffffffff82b6a6a0 r i2c_shifts +ffffffff82b6a6cc r i2c_masks +ffffffff82b6a770 r mpc_regs +ffffffff82b6a890 r mpc_shift +ffffffff82b6a8a8 r mpc_mask +ffffffff82b6a904 r hubbub_reg +ffffffff82b6aa78 r hubbub_shift +ffffffff82b6ab00 r hubbub_mask +ffffffff82b6ad20 r audio_regs +ffffffff82b6add0 r audio_shift +ffffffff82b6ade8 r audio_mask +ffffffff82b6ae30 r stream_enc_regs +ffffffff82b6b380 r se_shift +ffffffff82b6b45c r se_mask +ffffffff82b6b7c8 r hwseq_reg +ffffffff82b6b9e4 r hwseq_shift +ffffffff82b6ba64 r hwseq_mask +ffffffff82b6c000 r audio_clock_info_table_48bpc +ffffffff82b6c190 r audio_clock_info_table_36bpc +ffffffff82b6c320 r audio_clock_info_table +ffffffff82b6c4e0 r dcn10_str_enc_funcs +ffffffff82b6d000 r dccg2_funcs +ffffffff82b6f000 r dpp_input_csc_matrix +ffffffff82b70000 R dcn20_dsc_funcs +ffffffff82b71000 R dcn20_dwbc_funcs +ffffffff82b72000 r filter_12tap_16p_upscale +ffffffff82b720e0 r filter_12tap_16p_117 +ffffffff82b721c0 r filter_12tap_16p_150 +ffffffff82b722a0 r filter_12tap_16p_183 +ffffffff82b72380 r filter_11tap_16p_upscale +ffffffff82b72450 r filter_11tap_16p_117 +ffffffff82b72520 r filter_11tap_16p_150 +ffffffff82b725f0 r filter_11tap_16p_183 +ffffffff82b726c0 r filter_10tap_16p_upscale +ffffffff82b72780 r filter_10tap_16p_117 +ffffffff82b72840 r filter_10tap_16p_150 +ffffffff82b72900 r filter_10tap_16p_183 +ffffffff82b729c0 r filter_9tap_16p_upscale +ffffffff82b72a70 r filter_9tap_16p_117 +ffffffff82b72b20 r filter_9tap_16p_150 +ffffffff82b72bd0 r filter_9tap_16p_183 +ffffffff82b72c80 r filter_8tap_16p_upscale +ffffffff82b72d10 r filter_8tap_16p_117 +ffffffff82b72da0 r filter_8tap_16p_150 +ffffffff82b72e30 r filter_8tap_16p_183 +ffffffff82b72ec0 r filter_7tap_16p_upscale +ffffffff82b72f40 r filter_7tap_16p_117 +ffffffff82b72fc0 r filter_7tap_16p_150 +ffffffff82b73040 r filter_7tap_16p_183 +ffffffff82b730c0 r filter_6tap_16p_upscale +ffffffff82b73130 r filter_6tap_16p_117 +ffffffff82b731a0 r filter_6tap_16p_150 +ffffffff82b73210 r filter_6tap_16p_183 +ffffffff82b73280 r filter_5tap_16p_upscale +ffffffff82b732e0 r filter_5tap_16p_117 +ffffffff82b73340 r filter_5tap_16p_150 +ffffffff82b733a0 r filter_5tap_16p_183 +ffffffff82b73400 r filter_4tap_16p_upscale +ffffffff82b73450 r filter_4tap_16p_117 +ffffffff82b734a0 r filter_4tap_16p_150 +ffffffff82b734f0 r filter_4tap_16p_183 +ffffffff82b73540 r filter_3tap_16p_upscale +ffffffff82b73580 r filter_3tap_16p_117 +ffffffff82b735c0 r filter_3tap_16p_150 +ffffffff82b73600 r filter_3tap_16p_183 +ffffffff82b74000 r hubbub2_funcs +ffffffff82b75000 r dcn20_funcs +ffffffff82b752c0 r dcn20_private_funcs +ffffffff82b76000 r dcn20_link_enc_funcs +ffffffff82b760e0 r dcn2_mpll_cfg +ffffffff82b77000 R dcn20_mmhubbub_funcs +ffffffff82b78000 R dcn20_mpc_funcs +ffffffff82b79000 r tf_regs +ffffffff82b7a920 r tf_shift +ffffffff82b7aba4 r tf_mask +ffffffff82b7b5c0 r ipp_regs +ffffffff82b7b710 r ipp_shift +ffffffff82b7b72c r ipp_mask +ffffffff82b7b7a0 r opp_regs +ffffffff82b7b9b0 r opp_shift +ffffffff82b7b9e8 r opp_mask +ffffffff82b7bac0 r aux_engine_regs +ffffffff82b7bbb0 r aux_mask +ffffffff82b7bc10 r aux_shift +ffffffff82b7bc30 r i2c_hw_regs +ffffffff82b7bd80 r i2c_shifts +ffffffff82b7bdac r i2c_masks +ffffffff82b7be50 r mpc_regs +ffffffff82b7c398 r mpc_shift +ffffffff82b7c3e0 r mpc_mask +ffffffff82b7c4f4 r hubbub_reg +ffffffff82b7c668 r hubbub_shift +ffffffff82b7c6f0 r hubbub_mask +ffffffff82b7c90c r res_cap_nv10 +ffffffff82b7c950 r vmid_regs +ffffffff82b7cb10 r vmid_shifts +ffffffff82b7cb18 r vmid_masks +ffffffff82b7cb40 r tg_regs +ffffffff82b7d2c0 r tg_shift +ffffffff82b7d380 r tg_mask +ffffffff82b7d680 r link_enc_regs +ffffffff82b7de20 r link_enc_aux_regs +ffffffff82b7de80 r link_enc_hpd_regs +ffffffff82b7de98 r le_shift +ffffffff82b7df88 r le_mask +ffffffff82b7e340 r stream_enc_regs +ffffffff82b7eb38 r se_shift +ffffffff82b7ec14 r se_mask +ffffffff82b7ef80 r hwseq_reg +ffffffff82b7f19c r hwseq_shift +ffffffff82b7f21c r hwseq_mask +ffffffff82b7f410 r dsc_regs +ffffffff82b7f8a8 r dsc_shift +ffffffff82b7f960 r dsc_mask +ffffffff82b7fc40 r hubp_regs +ffffffff82b80888 r hubp_shift +ffffffff82b80984 r hubp_mask +ffffffff82b80d80 r dwbc20_regs +ffffffff82b80e38 r dwbc20_shift +ffffffff82b80eb8 r dwbc20_mask +ffffffff82b810b0 r mcif_wb20_regs +ffffffff82b81190 r mcif_wb20_shift +ffffffff82b81230 r mcif_wb20_mask +ffffffff82b814b0 r link_enc_feature +ffffffff82b814c0 r bios_regs +ffffffff82b814c8 r dcn20_res_pool_funcs +ffffffff82b815b0 r res_cap_nv14 +ffffffff82b815f0 r debug_defaults_drv +ffffffff82b81768 r debug_defaults_diags +ffffffff82b818e0 r clk_src_regs +ffffffff82b81ad8 r dccg_regs +ffffffff82b81bc4 r dccg_shift +ffffffff82b81c5c r dccg_mask +ffffffff82b81ebc r dmcu_regs +ffffffff82b81f18 r dmcu_shift +ffffffff82b81f2c r dmcu_mask +ffffffff82b81f78 r abm_regs +ffffffff82b81fb8 r abm_shift +ffffffff82b81fcc r abm_mask +ffffffff82b82018 r res_create_funcs +ffffffff82b82048 r res_create_maximus_funcs +ffffffff82b82078 r plane_cap +ffffffff82b820b0 r panel_cntl_regs +ffffffff82b820d0 r panel_cntl_shift +ffffffff82b820e0 r panel_cntl_mask +ffffffff82b8211c r cs_shift +ffffffff82b82128 r cs_mask +ffffffff82b82150 r audio_regs +ffffffff82b82284 r audio_shift +ffffffff82b8229c r audio_mask +ffffffff82b83000 r dcn20_str_enc_funcs +ffffffff82b84000 r dccg201_funcs +ffffffff82b85000 r hubbub201_funcs +ffffffff82b86000 r dcn201_funcs +ffffffff82b862c0 r dcn201_private_funcs +ffffffff82b87000 r dcn201_link_enc_funcs +ffffffff82b88000 R dcn201_mpc_funcs +ffffffff82b89000 r bios_regs +ffffffff82b89008 r res_cap_dnc201 +ffffffff82b89048 r debug_defaults_drv +ffffffff82b891c0 r clk_src_regs +ffffffff82b89268 r dccg_regs +ffffffff82b89354 r dccg_shift +ffffffff82b893ec r dccg_mask +ffffffff82b89650 r res_create_funcs +ffffffff82b89680 r res_create_maximus_funcs +ffffffff82b896b0 r plane_cap +ffffffff82b896e0 r link_enc_regs +ffffffff82b89970 r link_enc_aux_regs +ffffffff82b89990 r link_enc_hpd_regs +ffffffff82b89998 r le_shift +ffffffff82b89a88 r le_mask +ffffffff82b89e40 r link_enc_feature +ffffffff82b89e50 r cs_shift +ffffffff82b89e5c r cs_mask +ffffffff82b89e90 r hubp_regs +ffffffff82b8a620 r hubp_shift +ffffffff82b8a6f8 r hubp_mask +ffffffff82b8aa60 r ipp_regs +ffffffff82b8ab40 r ipp_shift +ffffffff82b8ab5c r ipp_mask +ffffffff82b8abd0 r tf_regs +ffffffff82b8bc10 r tf_shift +ffffffff82b8be94 r tf_mask +ffffffff82b8c8b0 r opp_regs +ffffffff82b8c960 r opp_shift +ffffffff82b8c998 r opp_mask +ffffffff82b8ca70 r aux_engine_regs +ffffffff82b8cac0 r aux_mask +ffffffff82b8cb20 r aux_shift +ffffffff82b8cb40 r i2c_hw_regs +ffffffff82b8cbb0 r i2c_shifts +ffffffff82b8cbdc r i2c_masks +ffffffff82b8cc80 r tg_regs +ffffffff82b8cf00 r tg_shift +ffffffff82b8cfc0 r tg_mask +ffffffff82b8d2c0 r mpc_regs +ffffffff82b8d808 r mpc_shift +ffffffff82b8d854 r mpc_mask +ffffffff82b8d97c r hubbub_reg +ffffffff82b8daf0 r hubbub_shift +ffffffff82b8db78 r hubbub_mask +ffffffff82b8dda0 r audio_regs +ffffffff82b8ddf8 r audio_shift +ffffffff82b8de10 r audio_mask +ffffffff82b8de50 r stream_enc_regs +ffffffff82b8e0f8 r se_shift +ffffffff82b8e1d4 r se_mask +ffffffff82b8e540 r hwseq_reg +ffffffff82b8e75c r hwseq_shift +ffffffff82b8e7dc r hwseq_mask +ffffffff82b8f000 r dccg21_funcs +ffffffff82b90000 r hubbub21_funcs +ffffffff82b91000 r dcn21_funcs +ffffffff82b912c0 r dcn21_private_funcs +ffffffff82b92000 r dcn21_link_enc_funcs +ffffffff82b920e0 r dcn21_mpll_cfg_ref +ffffffff82b93000 r bios_regs +ffffffff82b93008 r res_cap_rn +ffffffff82b93048 r dcn21_res_pool_funcs +ffffffff82b93130 r debug_defaults_drv +ffffffff82b932a8 r debug_defaults_diags +ffffffff82b93420 r clk_src_regs +ffffffff82b935c4 r dccg_regs +ffffffff82b936b0 r dccg_shift +ffffffff82b93748 r dccg_mask +ffffffff82b939a8 r dmcu_regs +ffffffff82b93a04 r dmcu_shift +ffffffff82b93a18 r dmcu_mask +ffffffff82b93a64 r abm_regs +ffffffff82b93aa4 r abm_shift +ffffffff82b93ab8 r abm_mask +ffffffff82b93b00 r res_create_funcs +ffffffff82b93b30 r res_create_maximus_funcs +ffffffff82b93b60 r plane_cap +ffffffff82b93b90 r panel_cntl_regs +ffffffff82b93bb0 r panel_cntl_shift +ffffffff82b93bc0 r panel_cntl_mask +ffffffff82b93c00 r link_enc_regs +ffffffff82b94260 r link_enc_aux_regs +ffffffff82b942b0 r link_enc_hpd_regs +ffffffff82b942c4 r le_shift +ffffffff82b943b4 r le_mask +ffffffff82b9476c r link_enc_feature +ffffffff82b9477c r panel_config_defaults +ffffffff82b947b8 r cs_shift +ffffffff82b947c4 r cs_mask +ffffffff82b947f0 r hubp_regs +ffffffff82b95020 r hubp_shift +ffffffff82b9511c r hubp_mask +ffffffff82b95510 r ipp_regs +ffffffff82b955f0 r ipp_shift +ffffffff82b9560c r ipp_mask +ffffffff82b95680 r tf_regs +ffffffff82b96740 r tf_shift +ffffffff82b969c4 r tf_mask +ffffffff82b973e0 r opp_regs +ffffffff82b975f0 r opp_shift +ffffffff82b97628 r opp_mask +ffffffff82b97700 r tg_regs +ffffffff82b97c00 r tg_shift +ffffffff82b97cc0 r tg_mask +ffffffff82b97fc0 r aux_engine_regs +ffffffff82b98088 r aux_mask +ffffffff82b980e8 r aux_shift +ffffffff82b98100 r i2c_hw_regs +ffffffff82b98218 r i2c_shifts +ffffffff82b98244 r i2c_masks +ffffffff82b982e8 r mpc_regs +ffffffff82b98830 r mpc_shift +ffffffff82b98878 r mpc_mask +ffffffff82b9898c r hubbub_reg +ffffffff82b98b00 r hubbub_shift +ffffffff82b98b88 r hubbub_mask +ffffffff82b98db0 r vmid_regs +ffffffff82b98f70 r vmid_shifts +ffffffff82b98f78 r vmid_masks +ffffffff82b98fa0 r dsc_regs +ffffffff82b99438 r dsc_shift +ffffffff82b994f0 r dsc_mask +ffffffff82b997d0 r audio_regs +ffffffff82b998d8 r audio_shift +ffffffff82b998f0 r audio_mask +ffffffff82b99930 r stream_enc_regs +ffffffff82b99fd4 r se_shift +ffffffff82b9a0b0 r se_mask +ffffffff82b9a41c r hwseq_reg +ffffffff82b9a638 r hwseq_shift +ffffffff82b9a6b8 r hwseq_mask +ffffffff82b9b000 r dccg3_funcs +ffffffff82b9c000 r dcn30_link_enc_funcs +ffffffff82b9d000 r dcn30_str_enc_funcs +ffffffff82b9e000 r dpp_input_csc_matrix +ffffffff82b9f000 R dcn30_dwbc_funcs +ffffffff82ba0000 r hubbub30_funcs +ffffffff82ba1000 r dcn30_funcs +ffffffff82ba12c0 r dcn30_private_funcs +ffffffff82ba2000 R dcn30_mmhubbub_funcs +ffffffff82ba3000 R dcn30_mpc_funcs +ffffffff82ba4000 r bios_regs +ffffffff82ba4008 r res_cap_dcn3 +ffffffff82ba4048 r dcn30_res_pool_funcs +ffffffff82ba4130 r debug_defaults_drv +ffffffff82ba42a8 r debug_defaults_diags +ffffffff82ba4420 r clk_src_regs +ffffffff82ba4618 r dccg_regs +ffffffff82ba4704 r dccg_shift +ffffffff82ba479c r dccg_mask +ffffffff82ba4a00 r abm_regs +ffffffff82ba4b80 r abm_shift +ffffffff82ba4b94 r abm_mask +ffffffff82ba4be0 r res_create_funcs +ffffffff82ba4c10 r res_create_maximus_funcs +ffffffff82ba4c40 r plane_cap +ffffffff82ba4c70 r panel_cntl_regs +ffffffff82ba4c90 r panel_cntl_shift +ffffffff82ba4ca0 r panel_cntl_mask +ffffffff82ba4ce0 r link_enc_regs +ffffffff82ba5480 r link_enc_aux_regs +ffffffff82ba54e0 r link_enc_hpd_regs +ffffffff82ba54f8 r le_shift +ffffffff82ba55e8 r le_mask +ffffffff82ba59a0 r link_enc_feature +ffffffff82ba59b0 r cs_shift +ffffffff82ba59bc r cs_mask +ffffffff82ba59e4 r hubbub_reg +ffffffff82ba5b58 r hubbub_shift +ffffffff82ba5be0 r hubbub_mask +ffffffff82ba5e00 r vmid_regs +ffffffff82ba5fc0 r vmid_shifts +ffffffff82ba5fc8 r vmid_masks +ffffffff82ba5ff0 r hubp_regs +ffffffff82ba6c38 r hubp_shift +ffffffff82ba6d34 r hubp_mask +ffffffff82ba7130 r dpp_regs +ffffffff82ba90b0 r tf_shift +ffffffff82ba9380 r tf_mask +ffffffff82ba9ec0 r opp_regs +ffffffff82baa0d0 r opp_shift +ffffffff82baa108 r opp_mask +ffffffff82baa1e0 r optc_regs +ffffffff82baa960 r optc_shift +ffffffff82baaa20 r optc_mask +ffffffff82baad20 r mpc_regs +ffffffff82bac50c r mpc_shift +ffffffff82bac5e8 r mpc_mask +ffffffff82bac960 r dsc_regs +ffffffff82bacdf8 r dsc_shift +ffffffff82baceb0 r dsc_mask +ffffffff82bad190 r dwbc30_regs +ffffffff82bad36c r dwbc30_shift +ffffffff82bad4a0 r dwbc30_mask +ffffffff82bad970 r mcif_wb30_regs +ffffffff82bada6c r mcif_wb30_shift +ffffffff82badb18 r mcif_wb30_mask +ffffffff82baddd0 r aux_engine_regs +ffffffff82badec0 r aux_mask +ffffffff82badf20 r aux_shift +ffffffff82badf40 r i2c_hw_regs +ffffffff82bae090 r i2c_shifts +ffffffff82bae0bc r i2c_masks +ffffffff82bae160 r audio_regs +ffffffff82bae294 r audio_shift +ffffffff82bae2ac r audio_mask +ffffffff82bae2f0 r stream_enc_regs +ffffffff82baeae8 r se_shift +ffffffff82baebc4 r se_mask +ffffffff82baef30 r vpg_regs +ffffffff82baefbc r vpg_shift +ffffffff82baefe4 r vpg_mask +ffffffff82baf080 r afmt_regs +ffffffff82baf17c r afmt_shift +ffffffff82baf190 r afmt_mask +ffffffff82baf1d4 r hwseq_reg +ffffffff82baf3f0 r hwseq_shift +ffffffff82baf470 r hwseq_mask +ffffffff82bb0000 r dccg301_funcs +ffffffff82bb1000 r dcn301_link_enc_funcs +ffffffff82bb2000 r hubbub301_funcs +ffffffff82bb3000 r dcn301_funcs +ffffffff82bb32c0 r dcn301_private_funcs +ffffffff82bb4000 r dcn301_link_panel_cntl_funcs +ffffffff82bb5000 r bios_regs +ffffffff82bb5008 r debug_defaults_drv +ffffffff82bb5180 r debug_defaults_diags +ffffffff82bb5300 r clk_src_regs +ffffffff82bb5450 r dccg_regs +ffffffff82bb553c r dccg_shift +ffffffff82bb55d4 r dccg_mask +ffffffff82bb5840 r abm_regs +ffffffff82bb5940 r abm_shift +ffffffff82bb5954 r abm_mask +ffffffff82bb59a0 r res_create_funcs +ffffffff82bb59d0 r res_create_maximus_funcs +ffffffff82bb5a00 r plane_cap +ffffffff82bb5a30 r panel_cntl_regs +ffffffff82bb5a70 r panel_cntl_shift +ffffffff82bb5a80 r panel_cntl_mask +ffffffff82bb5ac0 r link_enc_regs +ffffffff82bb5fd0 r link_enc_aux_regs +ffffffff82bb6010 r link_enc_hpd_regs +ffffffff82bb6020 r le_shift +ffffffff82bb6110 r le_mask +ffffffff82bb64c8 r link_enc_feature +ffffffff82bb64d8 r cs_shift +ffffffff82bb64e4 r cs_mask +ffffffff82bb650c r hubbub_reg +ffffffff82bb6680 r hubbub_shift +ffffffff82bb6708 r hubbub_mask +ffffffff82bb6930 r vmid_regs +ffffffff82bb6af0 r vmid_shifts +ffffffff82bb6af8 r vmid_masks +ffffffff82bb6b20 r hubp_regs +ffffffff82bb7350 r hubp_shift +ffffffff82bb744c r hubp_mask +ffffffff82bb7840 r dpp_regs +ffffffff82bb8d40 r tf_shift +ffffffff82bb9010 r tf_mask +ffffffff82bb9b50 r opp_regs +ffffffff82bb9cb0 r opp_shift +ffffffff82bb9ce8 r opp_mask +ffffffff82bb9dc0 r optc_regs +ffffffff82bba2c0 r optc_shift +ffffffff82bba380 r optc_mask +ffffffff82bba680 r mpc_regs +ffffffff82bbbe6c r mpc_shift +ffffffff82bbbf48 r mpc_mask +ffffffff82bbc2c0 r dsc_regs +ffffffff82bbc50c r dsc_shift +ffffffff82bbc5c4 r dsc_mask +ffffffff82bbc8a0 r dwbc30_regs +ffffffff82bbca7c r dwbc30_shift +ffffffff82bbcbb0 r dwbc30_mask +ffffffff82bbd080 r mcif_wb30_regs +ffffffff82bbd17c r mcif_wb30_shift +ffffffff82bbd228 r mcif_wb30_mask +ffffffff82bbd4e0 r aux_engine_regs +ffffffff82bbd580 r aux_mask +ffffffff82bbd5e0 r aux_shift +ffffffff82bbd600 r i2c_hw_regs +ffffffff82bbd6e0 r i2c_shifts +ffffffff82bbd70c r i2c_masks +ffffffff82bbd7b0 r audio_regs +ffffffff82bbd8e4 r audio_shift +ffffffff82bbd8fc r audio_mask +ffffffff82bbd940 r stream_enc_regs +ffffffff82bbde90 r se_shift +ffffffff82bbdf6c r se_mask +ffffffff82bbe2e0 r vpg_regs +ffffffff82bbe330 r vpg_shift +ffffffff82bbe358 r vpg_mask +ffffffff82bbe3f0 r afmt_regs +ffffffff82bbe480 r afmt_shift +ffffffff82bbe494 r afmt_mask +ffffffff82bbe4d8 r hwseq_reg +ffffffff82bbe6f4 r hwseq_shift +ffffffff82bbe774 r hwseq_mask +ffffffff82bbf000 r bios_regs +ffffffff82bbf008 r res_cap_dcn302 +ffffffff82bbf048 r debug_defaults_drv +ffffffff82bbf1c0 r debug_defaults_diags +ffffffff82bbf340 r clk_src_regs +ffffffff82bbf4e4 r dccg_regs +ffffffff82bbf5d0 r dccg_shift +ffffffff82bbf668 r dccg_mask +ffffffff82bbf8d0 r abm_regs +ffffffff82bbfa10 r abm_shift +ffffffff82bbfa24 r abm_mask +ffffffff82bbfa70 r res_create_funcs +ffffffff82bbfaa0 r res_create_maximus_funcs +ffffffff82bbfad0 r plane_cap +ffffffff82bbfb00 r panel_cntl_regs +ffffffff82bbfb20 r panel_cntl_shift +ffffffff82bbfb30 r panel_cntl_mask +ffffffff82bbfb70 r link_enc_regs +ffffffff82bc01d0 r link_enc_aux_regs +ffffffff82bc0220 r link_enc_hpd_regs +ffffffff82bc0234 r le_shift +ffffffff82bc0324 r le_mask +ffffffff82bc06dc r link_enc_feature +ffffffff82bc06ec r cs_shift +ffffffff82bc06f8 r cs_mask +ffffffff82bc0720 r hubbub_reg +ffffffff82bc0894 r hubbub_shift +ffffffff82bc091c r hubbub_mask +ffffffff82bc0b40 r vmid_regs +ffffffff82bc0d00 r vmid_shifts +ffffffff82bc0d08 r vmid_masks +ffffffff82bc0d30 r hubp_regs +ffffffff82bc176c r hubp_shift +ffffffff82bc1868 r hubp_mask +ffffffff82bc1c60 r dpp_regs +ffffffff82bc36a0 r tf_shift +ffffffff82bc3970 r tf_mask +ffffffff82bc44b0 r opp_regs +ffffffff82bc4668 r opp_shift +ffffffff82bc46a0 r opp_mask +ffffffff82bc4780 r optc_regs +ffffffff82bc4dc0 r optc_shift +ffffffff82bc4e80 r optc_mask +ffffffff82bc5180 r mpc_regs +ffffffff82bc696c r mpc_shift +ffffffff82bc6a48 r mpc_mask +ffffffff82bc6dc0 r dsc_regs +ffffffff82bc7194 r dsc_shift +ffffffff82bc724c r dsc_mask +ffffffff82bc7530 r dwbc30_regs +ffffffff82bc770c r dwbc30_shift +ffffffff82bc7840 r dwbc30_mask +ffffffff82bc7d10 r mcif_wb30_regs +ffffffff82bc7e0c r mcif_wb30_shift +ffffffff82bc7eb8 r mcif_wb30_mask +ffffffff82bc8170 r aux_engine_regs +ffffffff82bc8238 r aux_mask +ffffffff82bc8298 r aux_shift +ffffffff82bc82b0 r i2c_hw_regs +ffffffff82bc83c8 r i2c_shifts +ffffffff82bc83f4 r i2c_masks +ffffffff82bc84a0 r audio_regs +ffffffff82bc85d4 r audio_shift +ffffffff82bc85ec r audio_mask +ffffffff82bc8630 r stream_enc_regs +ffffffff82bc8cd4 r se_shift +ffffffff82bc8db0 r se_mask +ffffffff82bc9120 r vpg_regs +ffffffff82bc9198 r vpg_shift +ffffffff82bc91c0 r vpg_mask +ffffffff82bc9260 r afmt_regs +ffffffff82bc9338 r afmt_shift +ffffffff82bc934c r afmt_mask +ffffffff82bc9390 r hwseq_reg +ffffffff82bc95ac r hwseq_shift +ffffffff82bc962c r hwseq_mask +ffffffff82bca000 r bios_regs +ffffffff82bca008 r res_cap_dcn303 +ffffffff82bca048 r debug_defaults_drv +ffffffff82bca1c0 r debug_defaults_diags +ffffffff82bca340 r clk_src_regs +ffffffff82bca3e8 r dccg_regs +ffffffff82bca4d4 r dccg_shift +ffffffff82bca56c r dccg_mask +ffffffff82bca7d0 r abm_regs +ffffffff82bca850 r abm_shift +ffffffff82bca864 r abm_mask +ffffffff82bca8b0 r res_create_funcs +ffffffff82bca8e0 r res_create_maximus_funcs +ffffffff82bca910 r plane_cap +ffffffff82bca940 r panel_cntl_regs +ffffffff82bca960 r panel_cntl_shift +ffffffff82bca970 r panel_cntl_mask +ffffffff82bca9b0 r link_enc_regs +ffffffff82bcac40 r link_enc_aux_regs +ffffffff82bcac60 r link_enc_hpd_regs +ffffffff82bcac68 r le_shift +ffffffff82bcad58 r le_mask +ffffffff82bcb110 r link_enc_feature +ffffffff82bcb120 r cs_shift +ffffffff82bcb12c r cs_mask +ffffffff82bcb154 r hubbub_reg +ffffffff82bcb2c8 r hubbub_shift +ffffffff82bcb350 r hubbub_mask +ffffffff82bcb570 r vmid_regs +ffffffff82bcb730 r vmid_shifts +ffffffff82bcb738 r vmid_masks +ffffffff82bcb760 r hubp_regs +ffffffff82bcbb78 r hubp_shift +ffffffff82bcbc74 r hubp_mask +ffffffff82bcc070 r dpp_regs +ffffffff82bccaf0 r tf_shift +ffffffff82bccdc0 r tf_mask +ffffffff82bcd900 r opp_regs +ffffffff82bcd9b0 r opp_shift +ffffffff82bcd9e8 r opp_mask +ffffffff82bcdac0 r optc_regs +ffffffff82bcdd40 r optc_shift +ffffffff82bcde00 r optc_mask +ffffffff82bce100 r mpc_regs +ffffffff82bcf8ec r mpc_shift +ffffffff82bcf9c8 r mpc_mask +ffffffff82bcfd40 r dsc_regs +ffffffff82bcfec8 r dsc_shift +ffffffff82bcff80 r dsc_mask +ffffffff82bd0260 r dwbc30_regs +ffffffff82bd043c r dwbc30_shift +ffffffff82bd0570 r dwbc30_mask +ffffffff82bd0a40 r mcif_wb30_regs +ffffffff82bd0b3c r mcif_wb30_shift +ffffffff82bd0be8 r mcif_wb30_mask +ffffffff82bd0ea0 r aux_engine_regs +ffffffff82bd0ef0 r aux_mask +ffffffff82bd0f50 r aux_shift +ffffffff82bd0f70 r i2c_hw_regs +ffffffff82bd0fe0 r i2c_shifts +ffffffff82bd100c r i2c_masks +ffffffff82bd10b0 r audio_regs +ffffffff82bd11e4 r audio_shift +ffffffff82bd11fc r audio_mask +ffffffff82bd1240 r stream_enc_regs +ffffffff82bd14e8 r se_shift +ffffffff82bd15c4 r se_mask +ffffffff82bd1930 r vpg_regs +ffffffff82bd196c r vpg_shift +ffffffff82bd1994 r vpg_mask +ffffffff82bd1a30 r afmt_regs +ffffffff82bd1a9c r afmt_shift +ffffffff82bd1ab0 r afmt_mask +ffffffff82bd1af4 r hwseq_reg +ffffffff82bd1d10 r hwseq_shift +ffffffff82bd1d90 r hwseq_mask +ffffffff82bd2000 r dccg31_funcs +ffffffff82bd3000 r dcn31_link_enc_funcs +ffffffff82bd4000 r dcn30_str_enc_funcs +ffffffff82bd5000 r hubbub31_funcs +ffffffff82bd6000 r dcn31_funcs +ffffffff82bd62c0 r dcn31_private_funcs +ffffffff82bd7000 r dcn31_link_panel_cntl_funcs +ffffffff82bd8000 r bios_regs +ffffffff82bd8008 r res_cap_dcn31 +ffffffff82bd8048 r debug_defaults_diags +ffffffff82bd81c0 r clk_src_regs +ffffffff82bd8370 r clk_src_regs_b0 +ffffffff82bd8514 r dccg_regs +ffffffff82bd8600 r dccg_shift +ffffffff82bd8698 r dccg_mask +ffffffff82bd8900 r abm_regs +ffffffff82bd8a00 r abm_shift +ffffffff82bd8a14 r abm_mask +ffffffff82bd8a60 r res_create_funcs +ffffffff82bd8a90 r res_create_maximus_funcs +ffffffff82bd8ac0 r plane_cap +ffffffff82bd8af0 r link_enc_regs +ffffffff82bd9150 r link_enc_aux_regs +ffffffff82bd91a0 r link_enc_hpd_regs +ffffffff82bd91b4 r le_shift +ffffffff82bd92a4 r le_mask +ffffffff82bd965c r link_enc_feature +ffffffff82bd966c r panel_config_defaults +ffffffff82bd96a8 r debug_defaults_drv +ffffffff82bd9820 r cs_shift +ffffffff82bd982c r cs_mask +ffffffff82bd9854 r hubbub_reg +ffffffff82bd99c8 r hubbub_shift +ffffffff82bd9a50 r hubbub_mask +ffffffff82bd9c70 r vmid_regs +ffffffff82bd9e30 r vmid_shifts +ffffffff82bd9e38 r vmid_masks +ffffffff82bd9e60 r hubp_regs +ffffffff82bda690 r hubp_shift +ffffffff82bda78c r hubp_mask +ffffffff82bdab80 r dpp_regs +ffffffff82bdc080 r tf_shift +ffffffff82bdc350 r tf_mask +ffffffff82bdce90 r opp_regs +ffffffff82bdcff0 r opp_shift +ffffffff82bdd028 r opp_mask +ffffffff82bdd100 r optc_regs +ffffffff82bdd600 r optc_shift +ffffffff82bdd6c0 r optc_mask +ffffffff82bdd9c0 r mpc_regs +ffffffff82bdf1ac r mpc_shift +ffffffff82bdf288 r mpc_mask +ffffffff82bdf600 r dsc_regs +ffffffff82bdf84c r dsc_shift +ffffffff82bdf904 r dsc_mask +ffffffff82bdfbe0 r dwbc30_regs +ffffffff82bdfdbc r dwbc30_shift +ffffffff82bdfef0 r dwbc30_mask +ffffffff82be03c0 r mcif_wb30_regs +ffffffff82be04bc r mcif_wb30_shift +ffffffff82be0568 r mcif_wb30_mask +ffffffff82be0820 r aux_engine_regs +ffffffff82be08e8 r aux_mask +ffffffff82be0948 r aux_shift +ffffffff82be0960 r i2c_hw_regs +ffffffff82be0a78 r i2c_shifts +ffffffff82be0aa4 r i2c_masks +ffffffff82be0b50 r audio_regs +ffffffff82be0c84 r audio_shift +ffffffff82be0c9c r audio_mask +ffffffff82be0cd8 r se_shift +ffffffff82be0db4 r se_mask +ffffffff82be1120 r vpg_regs +ffffffff82be1210 r vpg_shift +ffffffff82be1238 r vpg_mask +ffffffff82be12e0 r afmt_regs +ffffffff82be13b8 r afmt_shift +ffffffff82be13cc r afmt_mask +ffffffff82be1420 r stream_enc_regs +ffffffff82be2ac0 r hpo_dp_stream_enc_regs +ffffffff82be2cf0 r hpo_dp_se_shift +ffffffff82be2d18 r hpo_dp_se_mask +ffffffff82be2dc0 r apg_regs +ffffffff82be2e00 r apg_shift +ffffffff82be2e08 r apg_mask +ffffffff82be2e20 r hpo_dp_link_enc_regs +ffffffff82be2f30 r hpo_dp_le_shift +ffffffff82be2f4c r hpo_dp_le_mask +ffffffff82be2fb0 r hwseq_reg +ffffffff82be31cc r hwseq_shift +ffffffff82be324c r hwseq_mask +ffffffff82be4000 r dccg314_funcs +ffffffff82be5000 r dcn314_str_enc_funcs +ffffffff82be6000 r dcn314_funcs +ffffffff82be62c0 r dcn314_private_funcs +ffffffff82be7000 r bios_regs +ffffffff82be7008 r res_cap_dcn314 +ffffffff82be7048 r debug_defaults_diags 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tf_shift +ffffffff82beb1a0 r tf_mask +ffffffff82bebce0 r opp_regs +ffffffff82bebe40 r opp_shift +ffffffff82bebe78 r opp_mask +ffffffff82bebf50 r optc_regs +ffffffff82bec450 r optc_shift +ffffffff82bec510 r optc_mask +ffffffff82bec810 r mpc_regs +ffffffff82bedffc r mpc_shift +ffffffff82bee0d8 r mpc_mask +ffffffff82bee450 r dsc_regs +ffffffff82bee760 r dsc_shift +ffffffff82bee818 r dsc_mask +ffffffff82beeaf0 r dwbc30_regs +ffffffff82beeccc r dwbc30_shift +ffffffff82beee00 r dwbc30_mask +ffffffff82bef2d0 r mcif_wb30_regs +ffffffff82bef3cc r mcif_wb30_shift +ffffffff82bef478 r mcif_wb30_mask +ffffffff82bef730 r aux_engine_regs +ffffffff82bef7f8 r aux_mask +ffffffff82bef858 r aux_shift +ffffffff82bef870 r i2c_hw_regs +ffffffff82bef988 r i2c_shifts +ffffffff82bef9b4 r i2c_masks +ffffffff82befa60 r audio_regs +ffffffff82befb94 r audio_shift +ffffffff82befbac r audio_mask +ffffffff82befbf0 r stream_enc_regs +ffffffff82bf0294 r se_shift +ffffffff82bf0370 r se_mask +ffffffff82bf06e0 r vpg_regs +ffffffff82bf07d0 r vpg_shift +ffffffff82bf07f8 r vpg_mask +ffffffff82bf08a0 r afmt_regs +ffffffff82bf0978 r afmt_shift +ffffffff82bf098c r afmt_mask +ffffffff82bf09e0 r hpo_dp_stream_enc_regs +ffffffff82bf0c10 r hpo_dp_se_shift +ffffffff82bf0c38 r hpo_dp_se_mask +ffffffff82bf0ce0 r apg_regs +ffffffff82bf0d20 r apg_shift +ffffffff82bf0d28 r apg_mask +ffffffff82bf0d40 r hpo_dp_link_enc_regs +ffffffff82bf0e50 r hpo_dp_le_shift +ffffffff82bf0e6c r hpo_dp_le_mask +ffffffff82bf0ed0 r hwseq_reg +ffffffff82bf10ec r hwseq_shift +ffffffff82bf116c r hwseq_mask +ffffffff82bf2000 r bios_regs +ffffffff82bf2008 r res_cap_dcn31 +ffffffff82bf2048 r debug_defaults_diags +ffffffff82bf21c0 r clk_src_regs +ffffffff82bf2364 r dccg_regs +ffffffff82bf2450 r dccg_shift +ffffffff82bf24e8 r dccg_mask +ffffffff82bf2750 r abm_regs +ffffffff82bf2850 r abm_shift +ffffffff82bf2864 r abm_mask +ffffffff82bf28b0 r res_create_funcs +ffffffff82bf28e0 r res_create_maximus_funcs +ffffffff82bf2910 r plane_cap +ffffffff82bf2940 r link_enc_regs +ffffffff82bf2fa0 r link_enc_aux_regs +ffffffff82bf2ff0 r link_enc_hpd_regs +ffffffff82bf3004 r le_shift +ffffffff82bf30f4 r le_mask +ffffffff82bf34ac r link_enc_feature +ffffffff82bf34bc r panel_config_defaults +ffffffff82bf34f8 r debug_defaults_drv +ffffffff82bf3670 r cs_shift +ffffffff82bf367c r cs_mask +ffffffff82bf36a4 r hubbub_reg +ffffffff82bf3818 r hubbub_shift +ffffffff82bf38a0 r hubbub_mask +ffffffff82bf3ac0 r vmid_regs +ffffffff82bf3c80 r vmid_shifts +ffffffff82bf3c88 r vmid_masks +ffffffff82bf3cb0 r hubp_regs +ffffffff82bf44e0 r hubp_shift +ffffffff82bf45dc r hubp_mask +ffffffff82bf49d0 r dpp_regs +ffffffff82bf5ed0 r tf_shift +ffffffff82bf61a0 r tf_mask +ffffffff82bf6ce0 r opp_regs +ffffffff82bf6e40 r opp_shift +ffffffff82bf6e78 r opp_mask +ffffffff82bf6f50 r optc_regs +ffffffff82bf7450 r optc_shift +ffffffff82bf7510 r optc_mask +ffffffff82bf7810 r mpc_regs +ffffffff82bf8ffc r mpc_shift +ffffffff82bf90d8 r mpc_mask +ffffffff82bf9450 r dsc_regs +ffffffff82bf969c r dsc_shift +ffffffff82bf9754 r dsc_mask +ffffffff82bf9a30 r dwbc30_regs +ffffffff82bf9c0c r dwbc30_shift +ffffffff82bf9d40 r dwbc30_mask +ffffffff82bfa210 r mcif_wb30_regs +ffffffff82bfa30c r mcif_wb30_shift +ffffffff82bfa3b8 r mcif_wb30_mask +ffffffff82bfa670 r aux_engine_regs +ffffffff82bfa738 r aux_mask +ffffffff82bfa798 r aux_shift +ffffffff82bfa7b0 r i2c_hw_regs +ffffffff82bfa8c8 r i2c_shifts +ffffffff82bfa8f4 r i2c_masks +ffffffff82bfa9a0 r audio_regs +ffffffff82bfaad4 r audio_shift +ffffffff82bfaaec r audio_mask +ffffffff82bfab30 r stream_enc_regs +ffffffff82bfb1d4 r se_shift +ffffffff82bfb2b0 r se_mask +ffffffff82bfb620 r vpg_regs +ffffffff82bfb710 r vpg_shift +ffffffff82bfb738 r vpg_mask +ffffffff82bfb7e0 r afmt_regs +ffffffff82bfb8b8 r afmt_shift +ffffffff82bfb8cc r afmt_mask +ffffffff82bfb920 r hpo_dp_stream_enc_regs +ffffffff82bfbb50 r hpo_dp_se_shift +ffffffff82bfbb78 r hpo_dp_se_mask +ffffffff82bfbc20 r apg_regs +ffffffff82bfbc60 r apg_shift +ffffffff82bfbc68 r apg_mask +ffffffff82bfbc80 r hpo_dp_link_enc_regs +ffffffff82bfbd90 r hpo_dp_le_shift +ffffffff82bfbdac r hpo_dp_le_mask +ffffffff82bfbe10 r hwseq_reg +ffffffff82bfc02c r hwseq_shift +ffffffff82bfc0ac r hwseq_mask +ffffffff82bfd000 r bios_regs +ffffffff82bfd008 r res_cap_dcn31 +ffffffff82bfd048 r debug_defaults_diags +ffffffff82bfd1c0 r clk_src_regs +ffffffff82bfd364 r dccg_regs +ffffffff82bfd450 r dccg_shift +ffffffff82bfd4e8 r dccg_mask +ffffffff82bfd750 r abm_regs +ffffffff82bfd850 r abm_shift +ffffffff82bfd864 r abm_mask +ffffffff82bfd8b0 r res_create_funcs +ffffffff82bfd8e0 r res_create_maximus_funcs +ffffffff82bfd910 r plane_cap +ffffffff82bfd940 r link_enc_regs +ffffffff82bfdfa0 r link_enc_aux_regs +ffffffff82bfdff0 r link_enc_hpd_regs +ffffffff82bfe004 r le_shift +ffffffff82bfe0f4 r le_mask +ffffffff82bfe4ac r link_enc_feature +ffffffff82bfe4bc r panel_config_defaults +ffffffff82bfe4f8 r debug_defaults_drv +ffffffff82bfe670 r cs_shift +ffffffff82bfe67c r cs_mask +ffffffff82bfe6a4 r hubbub_reg +ffffffff82bfe818 r hubbub_shift +ffffffff82bfe8a0 r hubbub_mask +ffffffff82bfeac0 r vmid_regs +ffffffff82bfec80 r vmid_shifts +ffffffff82bfec88 r vmid_masks +ffffffff82bfecb0 r hubp_regs +ffffffff82bff4e0 r hubp_shift +ffffffff82bff5dc r hubp_mask +ffffffff82bff9d0 r dpp_regs +ffffffff82c00ed0 r tf_shift +ffffffff82c011a0 r tf_mask +ffffffff82c01ce0 r opp_regs +ffffffff82c01e40 r opp_shift +ffffffff82c01e78 r opp_mask +ffffffff82c01f50 r optc_regs +ffffffff82c02450 r optc_shift +ffffffff82c02510 r optc_mask +ffffffff82c02810 r mpc_regs +ffffffff82c03ffc r mpc_shift +ffffffff82c040d8 r mpc_mask +ffffffff82c04450 r dsc_regs +ffffffff82c0469c r dsc_shift +ffffffff82c04754 r dsc_mask +ffffffff82c04a30 r dwbc30_regs +ffffffff82c04c0c r dwbc30_shift +ffffffff82c04d40 r dwbc30_mask +ffffffff82c05210 r mcif_wb30_regs +ffffffff82c0530c r mcif_wb30_shift +ffffffff82c053b8 r mcif_wb30_mask +ffffffff82c05670 r aux_engine_regs +ffffffff82c05738 r aux_mask +ffffffff82c05798 r aux_shift +ffffffff82c057b0 r i2c_hw_regs +ffffffff82c058c8 r i2c_shifts +ffffffff82c058f4 r i2c_masks +ffffffff82c059a0 r audio_regs +ffffffff82c05ad4 r audio_shift +ffffffff82c05aec r audio_mask +ffffffff82c05b30 r stream_enc_regs +ffffffff82c061d4 r se_shift +ffffffff82c062b0 r se_mask +ffffffff82c06620 r vpg_regs +ffffffff82c06710 r vpg_shift +ffffffff82c06738 r vpg_mask +ffffffff82c067e0 r afmt_regs +ffffffff82c068b8 r afmt_shift +ffffffff82c068cc r afmt_mask +ffffffff82c06920 r hpo_dp_stream_enc_regs +ffffffff82c06b50 r hpo_dp_se_shift +ffffffff82c06b78 r hpo_dp_se_mask +ffffffff82c06c20 r apg_regs +ffffffff82c06c60 r apg_shift +ffffffff82c06c68 r apg_mask +ffffffff82c06c80 r hpo_dp_link_enc_regs +ffffffff82c06d90 r hpo_dp_le_shift +ffffffff82c06dac r hpo_dp_le_mask +ffffffff82c06e10 r hwseq_reg +ffffffff82c0702c r hwseq_shift +ffffffff82c070ac r hwseq_mask +ffffffff82c08000 r dccg32_funcs +ffffffff82c09000 r dcn32_link_enc_funcs +ffffffff82c0a000 r dcn32_str_enc_funcs +ffffffff82c0b000 r hubbub32_funcs +ffffffff82c0c000 r dcn32_funcs +ffffffff82c0c2c0 r dcn32_private_funcs +ffffffff82c0d000 R dcn32_mmhubbub_funcs +ffffffff82c0e000 R dcn32_mpc_funcs +ffffffff82c0f000 r res_cap_dcn32 +ffffffff82c0f040 r debug_defaults_diags +ffffffff82c0f1b8 r dccg_shift +ffffffff82c0f250 r dccg_mask +ffffffff82c0f4b0 r abm_shift +ffffffff82c0f4c4 r abm_mask +ffffffff82c0f510 r res_create_funcs +ffffffff82c0f540 r res_create_maximus_funcs +ffffffff82c0f570 r plane_cap +ffffffff82c0f59c r le_shift +ffffffff82c0f68c r le_mask +ffffffff82c0fa44 r link_enc_feature +ffffffff82c0fa58 r debug_defaults_drv +ffffffff82c0fbd0 r cs_shift +ffffffff82c0fbdc r cs_mask +ffffffff82c0fc04 r hubbub_shift +ffffffff82c0fc8c r hubbub_mask +ffffffff82c0fea8 r vmid_shifts +ffffffff82c0feb0 r vmid_masks +ffffffff82c0fed0 r hubp_shift +ffffffff82c0ffcc r hubp_mask +ffffffff82c103bc r tf_shift +ffffffff82c1068c r tf_mask +ffffffff82c111cc r opp_shift +ffffffff82c11204 r opp_mask +ffffffff82c112d8 r optc_shift +ffffffff82c11398 r optc_mask +ffffffff82c11698 r mpc_shift +ffffffff82c11774 r mpc_mask +ffffffff82c11ae0 r dsc_shift +ffffffff82c11b98 r dsc_mask +ffffffff82c11e70 r dwbc30_shift +ffffffff82c11fa4 r dwbc30_mask +ffffffff82c1246c r mcif_wb30_shift +ffffffff82c12518 r mcif_wb30_mask +ffffffff82c127c4 r aux_mask +ffffffff82c12824 r aux_shift +ffffffff82c1283c r i2c_shifts +ffffffff82c12868 r i2c_masks +ffffffff82c1290c r audio_shift +ffffffff82c12924 r audio_mask +ffffffff82c12960 r se_shift +ffffffff82c12a3c r se_mask +ffffffff82c12da8 r vpg_shift +ffffffff82c12dd0 r vpg_mask +ffffffff82c12e64 r afmt_shift +ffffffff82c12e78 r afmt_mask +ffffffff82c12ebc r hpo_dp_se_shift +ffffffff82c12ee4 r hpo_dp_se_mask +ffffffff82c12f84 r apg_shift +ffffffff82c12f8c r apg_mask +ffffffff82c12fa4 r hpo_dp_le_shift +ffffffff82c12fc0 r hpo_dp_le_mask +ffffffff82c13024 r hwseq_shift +ffffffff82c130a4 r hwseq_mask +ffffffff82c14000 r dcn321_link_enc_funcs +ffffffff82c15000 r res_cap_dcn321 +ffffffff82c15040 r debug_defaults_diags +ffffffff82c151b8 r dccg_shift +ffffffff82c15250 r dccg_mask +ffffffff82c154b0 r abm_shift +ffffffff82c154c4 r abm_mask +ffffffff82c15510 r res_create_funcs +ffffffff82c15540 r res_create_maximus_funcs +ffffffff82c15570 r plane_cap +ffffffff82c1559c r le_shift +ffffffff82c1568c r le_mask +ffffffff82c15a44 r link_enc_feature +ffffffff82c15a58 r debug_defaults_drv +ffffffff82c15bd0 r cs_shift +ffffffff82c15bdc r cs_mask +ffffffff82c15c04 r hubbub_shift +ffffffff82c15c8c r hubbub_mask +ffffffff82c15ea8 r vmid_shifts +ffffffff82c15eb0 r vmid_masks +ffffffff82c15ed0 r hubp_shift +ffffffff82c15fcc r hubp_mask +ffffffff82c163bc r tf_shift +ffffffff82c1668c r tf_mask +ffffffff82c171cc r opp_shift +ffffffff82c17204 r opp_mask +ffffffff82c172d8 r optc_shift +ffffffff82c17398 r optc_mask +ffffffff82c17698 r mpc_shift +ffffffff82c17774 r mpc_mask +ffffffff82c17ae0 r dsc_shift +ffffffff82c17b98 r dsc_mask +ffffffff82c17e70 r dwbc30_shift +ffffffff82c17fa4 r dwbc30_mask +ffffffff82c1846c r mcif_wb30_shift +ffffffff82c18518 r mcif_wb30_mask +ffffffff82c187c4 r aux_mask +ffffffff82c18824 r aux_shift +ffffffff82c1883c r i2c_shifts +ffffffff82c18868 r i2c_masks +ffffffff82c1890c r audio_shift +ffffffff82c18924 r audio_mask +ffffffff82c18960 r se_shift +ffffffff82c18a3c r se_mask +ffffffff82c18da8 r vpg_shift +ffffffff82c18dd0 r vpg_mask +ffffffff82c18e64 r afmt_shift +ffffffff82c18e78 r afmt_mask +ffffffff82c18ebc r hpo_dp_se_shift +ffffffff82c18ee4 r hpo_dp_se_mask +ffffffff82c18f84 r apg_shift +ffffffff82c18f8c r apg_mask +ffffffff82c18fa4 r hpo_dp_le_shift +ffffffff82c18fc0 r hpo_dp_le_mask +ffffffff82c19024 r hwseq_shift +ffffffff82c190a4 r hwseq_mask +ffffffff82c1b000 R dcn10_soc_defaults +ffffffff82c1b08c R dcn10_ip_defaults +ffffffff82c26000 R dml20_funcs +ffffffff82c26030 R dml20v2_funcs +ffffffff82c26060 R dml21_funcs +ffffffff82c26090 R dml30_funcs +ffffffff82c260c0 R dml31_funcs +ffffffff82c260f0 R dml314_funcs +ffffffff82c26120 R dml32_funcs +ffffffff82c29000 R qp_table_422_10bpc_min +ffffffff82c29740 R qp_table_444_8bpc_max +ffffffff82c2a080 R qp_table_420_12bpc_max +ffffffff82c2a7c0 R qp_table_444_10bpc_min +ffffffff82c2b400 R qp_table_420_8bpc_max +ffffffff82c2b840 R qp_table_444_8bpc_min +ffffffff82c2c180 R qp_table_444_12bpc_min +ffffffff82c2d0c0 R qp_table_420_12bpc_min +ffffffff82c2d800 R qp_table_422_12bpc_min +ffffffff82c2e140 R qp_table_422_12bpc_max +ffffffff82c2ea80 R qp_table_444_12bpc_max +ffffffff82c2f9c0 R qp_table_420_8bpc_min +ffffffff82c2fe00 R qp_table_422_8bpc_min +ffffffff82c30340 R qp_table_422_10bpc_max +ffffffff82c30a80 R qp_table_420_10bpc_max +ffffffff82c31040 R qp_table_420_10bpc_min +ffffffff82c31600 R qp_table_444_10bpc_max +ffffffff82c32240 R qp_table_422_8bpc_max ffffffff82c34000 r funcs +ffffffff82c34050 r hpd_regs +ffffffff82c341a0 r hpd_shift +ffffffff82c341b0 r hpd_mask +ffffffff82c341c0 r ddc_data_regs +ffffffff82c343a0 r ddc_clk_regs +ffffffff82c34580 r ddc_shift +ffffffff82c345a8 r ddc_mask ffffffff82c35000 r funcs -ffffffff82c35050 r hpd_regs -ffffffff82c351a0 r hpd_shift -ffffffff82c351b0 r hpd_mask -ffffffff82c351c0 r ddc_data_regs -ffffffff82c353a0 r ddc_clk_regs -ffffffff82c35580 r ddc_shift -ffffffff82c355a8 r ddc_mask ffffffff82c36000 r funcs +ffffffff82c36050 r hpd_regs +ffffffff82c361a0 r hpd_shift +ffffffff82c361b0 r hpd_mask +ffffffff82c361c0 r ddc_data_regs +ffffffff82c363a0 r ddc_clk_regs +ffffffff82c36580 r ddc_shift +ffffffff82c365a8 r ddc_mask ffffffff82c37000 r funcs -ffffffff82c37050 r hpd_regs -ffffffff82c371a0 r hpd_shift -ffffffff82c371b0 r hpd_mask -ffffffff82c371c0 r ddc_data_regs -ffffffff82c373a0 r ddc_clk_regs -ffffffff82c37580 r ddc_shift -ffffffff82c375a8 r ddc_mask ffffffff82c38000 r funcs +ffffffff82c38050 r hpd_regs +ffffffff82c381a0 r hpd_shift +ffffffff82c381b0 r hpd_mask +ffffffff82c381c0 r ddc_data_regs +ffffffff82c383a0 r ddc_clk_regs +ffffffff82c38580 r ddc_shift +ffffffff82c385a8 r ddc_mask ffffffff82c39000 r funcs -ffffffff82c39050 r hpd_regs -ffffffff82c391a0 r hpd_shift -ffffffff82c391b0 r hpd_mask -ffffffff82c391c0 r ddc_data_regs -ffffffff82c393a0 r ddc_clk_regs -ffffffff82c39580 r ddc_shift -ffffffff82c395a8 r ddc_mask -ffffffff82c395d0 r generic_regs -ffffffff82c39640 r generic_shift -ffffffff82c39650 r generic_mask ffffffff82c3a000 r funcs +ffffffff82c3a050 r hpd_regs +ffffffff82c3a1a0 r hpd_shift +ffffffff82c3a1b0 r hpd_mask +ffffffff82c3a1c0 r ddc_data_regs +ffffffff82c3a3a0 r ddc_clk_regs +ffffffff82c3a580 r ddc_shift +ffffffff82c3a5a8 r ddc_mask +ffffffff82c3a5d0 r generic_regs +ffffffff82c3a640 r generic_shift +ffffffff82c3a650 r generic_mask ffffffff82c3b000 r funcs -ffffffff82c3b050 r hpd_regs -ffffffff82c3b1a0 r hpd_shift -ffffffff82c3b1b0 r hpd_mask -ffffffff82c3b1c0 r ddc_data_regs_dcn -ffffffff82c3b370 r ddc_clk_regs_dcn -ffffffff82c3b520 r ddc_shift -ffffffff82c3b640 r ddc_mask -ffffffff82c3b760 r generic_regs -ffffffff82c3b7d0 r generic_shift -ffffffff82c3b7e0 r generic_mask ffffffff82c3c000 r funcs +ffffffff82c3c050 r hpd_regs +ffffffff82c3c1a0 r hpd_shift +ffffffff82c3c1b0 r hpd_mask +ffffffff82c3c1c0 r ddc_data_regs_dcn +ffffffff82c3c370 r ddc_clk_regs_dcn +ffffffff82c3c520 r ddc_shift +ffffffff82c3c640 r ddc_mask +ffffffff82c3c760 r generic_regs +ffffffff82c3c7d0 r generic_shift +ffffffff82c3c7e0 r generic_mask ffffffff82c3d000 r funcs -ffffffff82c3d050 r hpd_regs -ffffffff82c3d168 r hpd_shift -ffffffff82c3d178 r hpd_mask -ffffffff82c3d190 r ddc_data_regs_dcn -ffffffff82c3d2c0 r ddc_clk_regs_dcn -ffffffff82c3d3f0 r ddc_shift -ffffffff82c3d4e0 r ddc_mask -ffffffff82c3d5d0 r generic_regs -ffffffff82c3d604 r generic_shift -ffffffff82c3d60c r generic_mask ffffffff82c3e000 r funcs +ffffffff82c3e050 r hpd_regs +ffffffff82c3e168 r hpd_shift +ffffffff82c3e178 r hpd_mask +ffffffff82c3e190 r ddc_data_regs_dcn +ffffffff82c3e2c0 r ddc_clk_regs_dcn +ffffffff82c3e3f0 r ddc_shift +ffffffff82c3e4e0 r ddc_mask +ffffffff82c3e5d0 r generic_regs +ffffffff82c3e604 r generic_shift +ffffffff82c3e60c r generic_mask ffffffff82c3f000 r funcs -ffffffff82c3f050 r hpd_regs -ffffffff82c3f1a0 r hpd_shift -ffffffff82c3f1b0 r hpd_mask -ffffffff82c3f1c0 r ddc_data_regs_dcn -ffffffff82c3f370 r ddc_clk_regs_dcn -ffffffff82c3f520 r ddc_shift -ffffffff82c3f640 r ddc_mask -ffffffff82c3f760 r generic_regs -ffffffff82c3f7d0 r generic_shift -ffffffff82c3f7e0 r generic_mask ffffffff82c40000 r funcs +ffffffff82c40050 r hpd_regs +ffffffff82c401a0 r hpd_shift +ffffffff82c401b0 r hpd_mask +ffffffff82c401c0 r ddc_data_regs_dcn +ffffffff82c40370 r ddc_clk_regs_dcn +ffffffff82c40520 r ddc_shift +ffffffff82c40640 r ddc_mask +ffffffff82c40760 r generic_regs +ffffffff82c407d0 r generic_shift +ffffffff82c407e0 r generic_mask ffffffff82c41000 r funcs -ffffffff82c41050 r hpd_regs -ffffffff82c41168 r hpd_shift -ffffffff82c41178 r hpd_mask -ffffffff82c41190 r ddc_data_regs_dcn -ffffffff82c41300 r ddc_clk_regs_dcn -ffffffff82c41470 r ddc_shift -ffffffff82c41560 r ddc_mask -ffffffff82c41650 r generic_regs -ffffffff82c416c0 r generic_shift -ffffffff82c416d0 r generic_mask ffffffff82c42000 r funcs +ffffffff82c42050 r hpd_regs +ffffffff82c42168 r hpd_shift +ffffffff82c42178 r hpd_mask +ffffffff82c42190 r ddc_data_regs_dcn +ffffffff82c42300 r ddc_clk_regs_dcn +ffffffff82c42470 r ddc_shift +ffffffff82c42560 r ddc_mask +ffffffff82c42650 r generic_regs +ffffffff82c426c0 r generic_shift +ffffffff82c426d0 r generic_mask ffffffff82c43000 r funcs -ffffffff82c43050 r hpd_regs -ffffffff82c43168 r hpd_shift -ffffffff82c43178 r hpd_mask -ffffffff82c43190 r ddc_data_regs_dcn -ffffffff82c43340 r ddc_clk_regs_dcn -ffffffff82c434f0 r ddc_shift -ffffffff82c43610 r ddc_mask -ffffffff82c43730 r generic_regs -ffffffff82c437a0 r generic_shift -ffffffff82c437b0 r generic_mask ffffffff82c44000 r funcs +ffffffff82c44050 r hpd_regs +ffffffff82c44168 r hpd_shift +ffffffff82c44178 r hpd_mask +ffffffff82c44190 r ddc_data_regs_dcn +ffffffff82c44340 r ddc_clk_regs_dcn +ffffffff82c444f0 r ddc_shift +ffffffff82c44610 r ddc_mask +ffffffff82c44730 r generic_regs +ffffffff82c447a0 r generic_shift +ffffffff82c447b0 r generic_mask ffffffff82c45000 r funcs ffffffff82c46000 r funcs ffffffff82c47000 r funcs -ffffffff82c48000 r hdmi_14_protection -ffffffff82c48010 r dp_11_protection -ffffffff82c48020 r hdcp_i2c_offsets -ffffffff82c48050 r hdcp_dpcd_addrs -ffffffff82c49000 r irq_service_funcs_dce110 -ffffffff82c49008 r dummy_irq_info_funcs -ffffffff82c49018 r hpd_irq_info_funcs -ffffffff82c49028 r hpd_rx_irq_info_funcs -ffffffff82c49038 r pflip_irq_info_funcs -ffffffff82c49048 r vupdate_irq_info_funcs -ffffffff82c49058 r vblank_irq_info_funcs -ffffffff82c49070 r irq_source_info_dce110 -ffffffff82c4b000 r irq_service_funcs_dce120 -ffffffff82c4b008 r dummy_irq_info_funcs -ffffffff82c4b018 r hpd_irq_info_funcs -ffffffff82c4b028 r hpd_rx_irq_info_funcs -ffffffff82c4b038 r pflip_irq_info_funcs -ffffffff82c4b048 r vupdate_irq_info_funcs -ffffffff82c4b058 r vblank_irq_info_funcs -ffffffff82c4b070 r irq_source_info_dce120 -ffffffff82c4d000 r irq_service_funcs_dce80 -ffffffff82c4d008 r dummy_irq_info_funcs -ffffffff82c4d018 r hpd_irq_info_funcs -ffffffff82c4d028 r hpd_rx_irq_info_funcs -ffffffff82c4d038 r pflip_irq_info_funcs -ffffffff82c4d048 r vupdate_irq_info_funcs -ffffffff82c4d058 r vblank_irq_info_funcs -ffffffff82c4d070 r irq_source_info_dce80 -ffffffff82c4f000 r irq_service_funcs_dcn10 -ffffffff82c4f008 r dummy_irq_info_funcs -ffffffff82c4f018 r hpd_irq_info_funcs -ffffffff82c4f028 r hpd_rx_irq_info_funcs -ffffffff82c4f038 r pflip_irq_info_funcs -ffffffff82c4f048 r vupdate_no_lock_irq_info_funcs -ffffffff82c4f058 r vblank_irq_info_funcs -ffffffff82c4f068 r vline0_irq_info_funcs -ffffffff82c4f080 r irq_source_info_dcn10 -ffffffff82c51000 r irq_service_funcs_dcn20 -ffffffff82c51008 r dummy_irq_info_funcs -ffffffff82c51018 r hpd_irq_info_funcs -ffffffff82c51028 r hpd_rx_irq_info_funcs -ffffffff82c51038 r pflip_irq_info_funcs -ffffffff82c51048 r vupdate_no_lock_irq_info_funcs -ffffffff82c51058 r vblank_irq_info_funcs -ffffffff82c51068 r vline0_irq_info_funcs -ffffffff82c51080 r irq_source_info_dcn20 -ffffffff82c53000 r irq_service_funcs_dcn201 -ffffffff82c53008 r dummy_irq_info_funcs -ffffffff82c53018 r hpd_irq_info_funcs -ffffffff82c53028 r hpd_rx_irq_info_funcs -ffffffff82c53038 r pflip_irq_info_funcs -ffffffff82c53048 r vupdate_no_lock_irq_info_funcs -ffffffff82c53058 r vblank_irq_info_funcs -ffffffff82c53068 r vline0_irq_info_funcs -ffffffff82c53080 r irq_source_info_dcn201 -ffffffff82c55000 r irq_source_info_dcn21 -ffffffff82c56290 r irq_service_funcs_dcn21 -ffffffff82c56298 r dummy_irq_info_funcs -ffffffff82c562a8 r hpd_irq_info_funcs -ffffffff82c562b8 r hpd_rx_irq_info_funcs -ffffffff82c562c8 r pflip_irq_info_funcs -ffffffff82c562d8 r vupdate_no_lock_irq_info_funcs -ffffffff82c562e8 r vblank_irq_info_funcs -ffffffff82c562f8 r vline0_irq_info_funcs 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-ffffffff82c78095 r max_reduction_table_v_2_2 -ffffffff82c780a2 r min_reduction_table -ffffffff82c780af r max_reduction_table -ffffffff82c79000 R amdgpu_pp_profile_name -ffffffff82c7a000 r pp_lib_thermal_controller_names -ffffffff82c7b000 r pp_ip_funcs -ffffffff82c7b0a0 R pp_smu_ip_block -ffffffff82c7b0b8 r pp_dpm_funcs -ffffffff82c7c000 r gpio_tbl -ffffffff82c7c0f0 r enable_fb_req_rej_tbl -ffffffff82c7c140 r use_bclk_tbl -ffffffff82c7c310 r turn_off_plls_tbl -ffffffff82c7c640 r enter_baco_tbl -ffffffff82c7c730 r exit_baco_tbl -ffffffff82c7c850 r clean_baco_tbl +ffffffff82c48000 r funcs +ffffffff82c49000 r hdmi_14_protection +ffffffff82c49010 r dp_11_protection +ffffffff82c49020 r hdcp_i2c_offsets +ffffffff82c49050 r hdcp_dpcd_addrs +ffffffff82c4a000 r irq_service_funcs_dce110 +ffffffff82c4a008 r dummy_irq_info_funcs +ffffffff82c4a018 r hpd_irq_info_funcs +ffffffff82c4a028 r hpd_rx_irq_info_funcs +ffffffff82c4a038 r pflip_irq_info_funcs +ffffffff82c4a048 r vupdate_irq_info_funcs +ffffffff82c4a058 r vblank_irq_info_funcs +ffffffff82c4a070 r irq_source_info_dce110 +ffffffff82c4c000 r irq_service_funcs_dce120 +ffffffff82c4c008 r dummy_irq_info_funcs +ffffffff82c4c018 r hpd_irq_info_funcs +ffffffff82c4c028 r hpd_rx_irq_info_funcs +ffffffff82c4c038 r pflip_irq_info_funcs +ffffffff82c4c048 r vupdate_irq_info_funcs +ffffffff82c4c058 r vblank_irq_info_funcs +ffffffff82c4c070 r irq_source_info_dce120 +ffffffff82c4e000 r irq_service_funcs_dce80 +ffffffff82c4e008 r dummy_irq_info_funcs +ffffffff82c4e018 r hpd_irq_info_funcs +ffffffff82c4e028 r hpd_rx_irq_info_funcs +ffffffff82c4e038 r pflip_irq_info_funcs +ffffffff82c4e048 r vupdate_irq_info_funcs +ffffffff82c4e058 r vblank_irq_info_funcs +ffffffff82c4e070 r irq_source_info_dce80 +ffffffff82c50000 r irq_service_funcs_dcn10 +ffffffff82c50008 r dummy_irq_info_funcs +ffffffff82c50018 r hpd_irq_info_funcs +ffffffff82c50028 r hpd_rx_irq_info_funcs +ffffffff82c50038 r pflip_irq_info_funcs +ffffffff82c50048 r vupdate_no_lock_irq_info_funcs +ffffffff82c50058 r vblank_irq_info_funcs +ffffffff82c50068 r vline0_irq_info_funcs +ffffffff82c50080 r irq_source_info_dcn10 +ffffffff82c52000 r irq_service_funcs_dcn20 +ffffffff82c52008 r dummy_irq_info_funcs +ffffffff82c52018 r hpd_irq_info_funcs +ffffffff82c52028 r hpd_rx_irq_info_funcs +ffffffff82c52038 r pflip_irq_info_funcs +ffffffff82c52048 r vupdate_no_lock_irq_info_funcs +ffffffff82c52058 r vblank_irq_info_funcs +ffffffff82c52068 r vline0_irq_info_funcs +ffffffff82c52080 r irq_source_info_dcn20 +ffffffff82c54000 r irq_service_funcs_dcn201 +ffffffff82c54008 r dummy_irq_info_funcs +ffffffff82c54018 r hpd_irq_info_funcs +ffffffff82c54028 r hpd_rx_irq_info_funcs +ffffffff82c54038 r pflip_irq_info_funcs +ffffffff82c54048 r vupdate_no_lock_irq_info_funcs +ffffffff82c54058 r vblank_irq_info_funcs +ffffffff82c54068 r vline0_irq_info_funcs +ffffffff82c54080 r irq_source_info_dcn201 +ffffffff82c56000 r irq_source_info_dcn21 +ffffffff82c57290 r irq_service_funcs_dcn21 +ffffffff82c57298 r dummy_irq_info_funcs +ffffffff82c572a8 r hpd_irq_info_funcs +ffffffff82c572b8 r hpd_rx_irq_info_funcs +ffffffff82c572c8 r pflip_irq_info_funcs +ffffffff82c572d8 r vupdate_no_lock_irq_info_funcs +ffffffff82c572e8 r vblank_irq_info_funcs +ffffffff82c572f8 r vline0_irq_info_funcs +ffffffff82c57308 r dmub_outbox_irq_info_funcs +ffffffff82c58000 r irq_source_info_dcn30 +ffffffff82c59290 r irq_service_funcs_dcn30 +ffffffff82c59298 r dummy_irq_info_funcs +ffffffff82c592a8 r hpd_irq_info_funcs +ffffffff82c592b8 r hpd_rx_irq_info_funcs +ffffffff82c592c8 r pflip_irq_info_funcs +ffffffff82c592d8 r vupdate_no_lock_irq_info_funcs +ffffffff82c592e8 r vblank_irq_info_funcs +ffffffff82c592f8 r vline0_irq_info_funcs +ffffffff82c59308 r dmub_trace_irq_info_funcs +ffffffff82c5a000 r irq_source_info_dcn302 +ffffffff82c5b290 r irq_service_funcs_dcn302 +ffffffff82c5b298 r dummy_irq_info_funcs +ffffffff82c5b2a8 r hpd_irq_info_funcs +ffffffff82c5b2b8 r hpd_rx_irq_info_funcs +ffffffff82c5b2c8 r pflip_irq_info_funcs +ffffffff82c5b2d8 r vupdate_no_lock_irq_info_funcs +ffffffff82c5b2e8 r vblank_irq_info_funcs +ffffffff82c5b2f8 r vline0_irq_info_funcs +ffffffff82c5b308 r dmub_trace_irq_info_funcs +ffffffff82c5c000 r irq_service_funcs_dcn303 +ffffffff82c5c008 r dummy_irq_info_funcs +ffffffff82c5c018 r hpd_irq_info_funcs +ffffffff82c5c028 r hpd_rx_irq_info_funcs +ffffffff82c5c038 r pflip_irq_info_funcs +ffffffff82c5c048 r vupdate_no_lock_irq_info_funcs +ffffffff82c5c058 r vblank_irq_info_funcs +ffffffff82c5c068 r vline0_irq_info_funcs +ffffffff82c5c080 r irq_source_info_dcn303 +ffffffff82c5e000 r irq_source_info_dcn31 +ffffffff82c5f290 r irq_service_funcs_dcn31 +ffffffff82c5f298 r dummy_irq_info_funcs +ffffffff82c5f2a8 r hpd_irq_info_funcs +ffffffff82c5f2b8 r hpd_rx_irq_info_funcs +ffffffff82c5f2c8 r pflip_irq_info_funcs +ffffffff82c5f2d8 r vupdate_no_lock_irq_info_funcs +ffffffff82c5f2e8 r vblank_irq_info_funcs +ffffffff82c5f2f8 r vline0_irq_info_funcs +ffffffff82c5f308 r outbox_irq_info_funcs +ffffffff82c60000 r irq_source_info_dcn314 +ffffffff82c61290 r irq_service_funcs_dcn314 +ffffffff82c61298 r dummy_irq_info_funcs +ffffffff82c612a8 r hpd_irq_info_funcs +ffffffff82c612b8 r hpd_rx_irq_info_funcs +ffffffff82c612c8 r pflip_irq_info_funcs +ffffffff82c612d8 r vupdate_no_lock_irq_info_funcs +ffffffff82c612e8 r vblank_irq_info_funcs +ffffffff82c612f8 r vline0_irq_info_funcs +ffffffff82c61308 r outbox_irq_info_funcs +ffffffff82c62000 r irq_source_info_dcn315 +ffffffff82c63290 r irq_service_funcs_dcn315 +ffffffff82c63298 r dummy_irq_info_funcs +ffffffff82c632a8 r hpd_irq_info_funcs +ffffffff82c632b8 r hpd_rx_irq_info_funcs +ffffffff82c632c8 r pflip_irq_info_funcs +ffffffff82c632d8 r vupdate_no_lock_irq_info_funcs +ffffffff82c632e8 r vblank_irq_info_funcs +ffffffff82c632f8 r vline0_irq_info_funcs +ffffffff82c63308 r outbox_irq_info_funcs +ffffffff82c64000 r irq_source_info_dcn32 +ffffffff82c65290 r irq_service_funcs_dcn32 +ffffffff82c65298 r dummy_irq_info_funcs +ffffffff82c652a8 r hpd_irq_info_funcs +ffffffff82c652b8 r hpd_rx_irq_info_funcs +ffffffff82c652c8 r pflip_irq_info_funcs +ffffffff82c652d8 r vupdate_no_lock_irq_info_funcs +ffffffff82c652e8 r vblank_irq_info_funcs +ffffffff82c652f8 r vline0_irq_info_funcs +ffffffff82c65308 r outbox_irq_info_funcs +ffffffff82c66000 r dio_link_hwss +ffffffff82c67000 r dpia_link_hwss +ffffffff82c68000 r hpo_dp_link_hwss +ffffffff82c69000 r virtual_lnk_enc_funcs +ffffffff82c6a000 r virtual_link_hwss +ffffffff82c6b000 r virtual_str_enc_funcs +ffffffff82c6c000 R dmub_srv_dcn20_regs +ffffffff82c6d000 R dmub_srv_dcn21_regs +ffffffff82c6e000 R dmub_srv_dcn30_regs +ffffffff82c6f000 R dmub_srv_dcn301_regs +ffffffff82c70000 R dmub_srv_dcn302_regs +ffffffff82c71000 R dmub_srv_dcn303_regs +ffffffff82c72000 R dmub_srv_dcn31_regs +ffffffff82c73000 R dmub_srv_dcn314_regs +ffffffff82c74000 R dmub_srv_dcn315_regs +ffffffff82c75000 R dmub_srv_dcn316_regs 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rtw_dwelltime -ffffffff830df004 D rtw_macbangbits_timeout -ffffffff830df008 D rtw_cd -ffffffff830e0000 D ral_cd -ffffffff830e1000 D rt3090_freqs -ffffffff830e2000 D acx_beacon_intvl -ffffffff830e2008 D acx_cd -ffffffff830e3000 D pgt_cd -ffffffff830e4000 D sf_cd -ffffffff830e5000 D malo_cd -ffffffff830e6000 D bwi_cd -ffffffff830e6020 D bwi_constraint -ffffffff830e6030 D bwi_pa_mode -ffffffff830e7000 D iosf_cd -ffffffff830e7020 d iosf_lock -ffffffff830e7030 d iosf_mbi_mtx -ffffffff830e8000 D uhci_cd -ffffffff830e9000 D ohci_cd -ffffffff830ea000 D ehci_cd -ffffffff830eb000 D xhci_cd -ffffffff830ec000 D ccp_cd -ffffffff830ed000 D sdhc_functions -ffffffff830ed068 D sdhc_cd -ffffffff830ee000 D rtsx_functions -ffffffff830ee068 D rtsx_cd -ffffffff830ef000 D radio_cd -ffffffff830f0000 D kcs_if -ffffffff830f0040 D smic_if -ffffffff830f0080 D bt_if -ffffffff830f00c0 D ipmi_cd -ffffffff830f00e0 D maxsdrlen -ffffffff830f1000 D vscsi_cd -ffffffff830f2000 D mpath_cd -ffffffff830f3000 D softraid_cd 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db_breakpoints_inserted -ffffffff83106000 D db_ed_style -ffffffff83107000 D db_examine_format -ffffffff83107078 D db_print_format -ffffffff83108000 D db_history_size -ffffffff83108008 D db_history_curr -ffffffff83108010 D db_history_last -ffffffff83109000 D db_tab_stop_width -ffffffff83109004 D db_max_line -ffffffff83109008 D db_max_width -ffffffff8310900c D db_radix -ffffffff8310a000 D db_lastsym -ffffffff8310a008 D db_maxoff -ffffffff8310b000 D db_vars -ffffffff8310b090 D db_evars -ffffffff8310c000 D db_watchpoints_inserted -ffffffff8310c008 D db_next_free_watchpoint -ffffffff8310d000 D db_log -ffffffff8310e000 D audio_cd -ffffffff8310e020 D audio_lock -ffffffff8310f000 D midi_cd -ffffffff83110000 D rnd_cold -ffffffff83110004 D rnd_slowextract -ffffffff83110008 D rnd_timeout -ffffffff83110050 D rndlock -ffffffff83110060 D rndreinit_timeout -ffffffff831100a8 D rnd_task -ffffffff83111000 D video_cd -ffffffff83112000 d rrip_table_analyze -ffffffff831120e0 d rrip_table_getname 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sched_cost_resident -ffffffff83120000 D intrmap_lock -ffffffff83121000 D nosuidcoredump -ffffffff83121008 D sigio_lock -ffffffff83122000 D smr_lock -ffffffff83122010 D smr_logintvl -ffffffff83123000 D startuphook_list -ffffffff83124000 D sysctl_lock -ffffffff83124010 D sysctl_disklock -ffffffff83124020 d openbsd -ffffffff83124024 d arg_max -ffffffff83124028 d posix_version -ffffffff8312402c d ngroups_max -ffffffff83124030 d int_one -ffffffff83124034 d maxpartitions -ffffffff83124038 d raw_part -ffffffff8312403c D allowpowerdown -ffffffff83124040 D hw_power -ffffffff83124044 d byte_order -ffffffff83124048 d page_size -ffffffff83125000 d thrsleep_queue -ffffffff83125010 d thrsleep_lock -ffffffff83126000 D tc_lock -ffffffff83126010 D windup_mtx -ffffffff83126020 d dummy_timecounter -ffffffff83126070 D timecounter -ffffffff83126078 D time_second -ffffffff83126080 d timehands -ffffffff83126088 d th0 -ffffffff83126120 d th1 -ffffffff83127000 D itimer_mtx -ffffffff83127010 D ratecheck_mtx -ffffffff83127020 D ppsratecheck_mtx -ffffffff83127030 D resettodr_to -ffffffff83127078 D resettodr_task -ffffffff83128000 D timeout_mutex -ffffffff83129000 D wdog_auto -ffffffff8312a000 D taskq_sys -ffffffff8312a050 D taskq_sys_mp -ffffffff8312b000 d update_loadavg.to -ffffffff8312b048 D ccpu -ffffffff8312b050 d schedcpu.to -ffffffff8312b098 D perflevel -ffffffff8312b09c D perfpolicy -ffffffff8312b0a0 D setperf_to -ffffffff8312c000 D autoconf_attdet_mtx -ffffffff8312c010 D msgs -ffffffff8312d000 d evcount_list -ffffffff8312d010 d evcount_percpu_init_list -ffffffff8312e000 D syslogf_rwlock -ffffffff8312e010 D log_mtx -ffffffff8312e020 D logstash_in -ffffffff8312e028 D logstash_out -ffffffff8312e030 D logstash_rwlock -ffffffff8312f000 D pool_head -ffffffff8312f010 D pool_lock -ffffffff8312f020 D pool_debug -ffffffff8312f028 D pool_allocator_single -ffffffff8312f040 D pool_allocator_multi -ffffffff8312f058 D pool_allocator_multi_ni -ffffffff8312f070 D pool_gc_tick -ffffffff8312f0b8 D pool_gc_task -ffffffff83130000 D kprintf_mutex -ffffffff83130010 D db_panic -ffffffff83130014 D splassert_ctl -ffffffff83130018 D v_putc -ffffffff83130020 D printf_flags -ffffffff83131000 D userconf_base -ffffffff83131004 D userconf_maxdev -ffffffff83131008 D userconf_totdev -ffffffff8313100c D userconf_maxlocnames -ffffffff83131010 D userconf_cnt -ffffffff83131014 D userconf_lines -ffffffff83131018 D userconf_histsz -ffffffff83131020 D userconf_cmds -ffffffff83132000 D ftlock -ffffffff83133000 d ppollcollect.poll_errintvl -ffffffff83134000 D ttydefchars -ffffffff83134014 D ttclos -ffffffff8313401b D ttopen -ffffffff83134022 D ttybg -ffffffff83134028 D ttyin -ffffffff8313402e D ttyout -ffffffff83134038 D ttylist_lock -ffffffff83135000 D linesw -ffffffff83135280 D nlinesw -ffffffff83136000 D pt_softc_lock -ffffffff83137000 d mbstat_boot_boot_cpumem -ffffffff83137080 D mbstat -ffffffff83137090 D mclsizes -ffffffff831370b0 D m_extref_mtx -ffffffff831370c0 D m_pool_allocator -ffffffff83138000 D somaxconn -ffffffff83138004 D sominconn -ffffffff83138008 D sosplice_lock -ffffffff83139000 D sb_max -ffffffff8313a000 D unp_df_lock -ffffffff8313a010 D unp_gc_lock -ffffffff8313a020 D unp_rights_mtx -ffffffff8313a030 D unp_ino_mtx -ffffffff8313a040 D unp_gc_task -ffffffff8313a070 D unpst_sendspace -ffffffff8313a074 D unpst_recvspace -ffffffff8313a078 D unpsq_sendspace -ffffffff8313a07c D unpsq_recvspace -ffffffff8313a080 D unpdg_sendspace -ffffffff8313a084 D unpdg_recvspace -ffffffff8313b000 D doingcache -ffffffff8313c000 D maxvfsconf -ffffffff8313c010 d vfsconflist -ffffffff8313d000 D lockf_lock -ffffffff8313d010 D maxlocksperuid -ffffffff8313e000 D iftovt_tab -ffffffff8313e040 D vttoif_tab -ffffffff8313e064 D suid_clear -ffffffff8313e068 D vnode_mtx -ffffffff8313e078 D vfs_stall_lock -ffffffff8313e090 D vtypes -ffffffff8313e0e0 D vtags -ffffffff8313f000 D syncer_maxdelay -ffffffff8313f004 D syncdelay -ffffffff83140000 D dosdirtemplate -ffffffff83141000 D ntfs_hashlock -ffffffff83142000 D ntfs_toupper_lock -ffffffff83143000 D art_table_gc_mtx -ffffffff83143010 D art_table_gc_task -ffffffff83143040 D art_node_gc_mtx -ffffffff83143050 D art_node_gc_task -ffffffff83144000 D bpf_bufsize -ffffffff83144004 D bpf_maxbufsize -ffffffff83144008 D bpf_sysctl_lk -ffffffff83145000 D ifg_head -ffffffff83145010 D if_cloners_lock -ffffffff83145020 D if_input_task_locked -ffffffff83145050 D netlock -ffffffff83145060 D ifnetlist -ffffffff83146000 D ifiq_maxlen_drop -ffffffff83146004 D ifiq_maxlen_return -ffffffff83147000 D etherbroadcastaddr -ffffffff83147006 D ether_ipmulticast_min -ffffffff8314700c D ether_ipmulticast_max -ffffffff83147012 D ether_ip6multicast_min -ffffffff83147018 D ether_ip6multicast_max -ffffffff83148000 D etherip_cloner -ffffffff83148030 D etherip_list -ffffffff83149000 D loop_cloner -ffffffff8314a000 D ifmedia_mtx -ffffffff8314b000 D ppp_compressors -ffffffff8314b020 D ppp_cloner -ffffffff8314c000 D ppp_pkt_init -ffffffff8314d000 D ppp_bsd_compress -ffffffff8314e000 D ppp_deflate -ffffffff8314e070 D ppp_deflate_draft -ffffffff8314f000 D tun_cloner -ffffffff8314f030 D tap_cloner -ffffffff83150000 D bridgeintrq -ffffffff83150038 D bridge_cloner -ffffffff83151000 d veb_cloner -ffffffff83151030 d vport_cloner -ffffffff83152000 D vlan_tagh_lk -ffffffff83152010 D vlan_cloner -ffffffff83152040 D svlan_cloner -ffffffff83153000 D pipex_list_mtx -ffffffff83153010 D pipex_prune -ffffffff83153018 D pipexoutq -ffffffff83153050 d SHAPad2 -ffffffff83154000 D rtmap_gc -ffffffff83154018 D rt_rc -ffffffff83155000 D rt_labels -ffffffff83155010 D rtlabel_mtx -ffffffff83156000 D enc_cloner -ffffffff83157000 D gre_cloner -ffffffff83157030 D gre_list -ffffffff83157040 D mgre_cloner -ffffffff83157070 D egre_cloner -ffffffff831570a0 D nvgre_cloner -ffffffff831570d0 D eoip_cloner -ffffffff83158000 D trunk_cloner -ffffffff83159000 d aggr_cloner -ffffffff8315a000 d tpmr_cloner -ffffffff8315b000 D mpe_cloner -ffffffff8315c000 D mpw_cloner -ffffffff8315d000 D mpip_cloner -ffffffff8315e000 d bpe_cloner -ffffffff8315e030 d bpe_lock -ffffffff8315f000 D vether_cloner -ffffffff83160000 D pair_cloner -ffffffff83161000 d vxlan_cloner -ffffffff83161030 d vxlan_lock -ffffffff83161040 d vxlan_teps -ffffffff83162000 D underload_interval -ffffffff83162010 D wg_cloner -ffffffff83163000 d stoeplitz_keyseed -ffffffff83164000 D ieee80211_cache_size -ffffffff83165000 D arpt_prune -ffffffff83165004 D arpt_keep -ffffffff83165008 D arpt_down -ffffffff83165010 D arpinq -ffffffff83165048 D arp_mtx -ffffffff83165058 D arp_maxtries -ffffffff83166000 D ipport_firstauto -ffffffff83166004 D ipport_lastauto -ffffffff83166008 D ipport_hifirstauto -ffffffff8316600c D ipport_hilastauto -ffffffff83167000 D divert_sendspace -ffffffff83167004 D divert_recvspace -ffffffff83167008 D divbhashsize -ffffffff83168000 D icmptstamprepl -ffffffff83168004 D icmperrppslim -ffffffff83168008 D icmp_redirtimeout -ffffffff83169000 D ipsendredirects -ffffffff83169004 D ip_defttl -ffffffff83169008 D ip_mtudisc -ffffffff8316900c D ip_mtudisc_timeout -ffffffff83169010 D ipq_mutex -ffffffff83169020 D ip_maxqueue -ffffffff83169028 D ipintrq -ffffffff83169060 d ipsend_task -ffffffff83169090 d ipsendraw_task -ffffffff8316a000 D ip_mrtproto -ffffffff8316a004 d sin -ffffffff8316b000 D rip_sendspace -ffffffff8316b008 D rip_recvspace -ffffffff8316c000 D tcprexmtthresh -ffffffff8316c004 D tcptv_keep_init -ffffffff8316c008 D tcp_rst_ppslim -ffffffff8316c00c D tcp_ackdrop_ppslim -ffffffff8316c010 D tcp_syn_hash_size -ffffffff8316c014 D tcp_syn_cache_limit -ffffffff8316c018 D tcp_syn_bucket_limit -ffffffff8316c01c D tcp_syn_use_limit -ffffffff8316c020 D syn_cache_mtx -ffffffff8316d000 D tcp_outflags -ffffffff8316e000 D tcp_timer_mtx -ffffffff8316e010 D tcp_mssdflt -ffffffff8316e014 D tcp_rttdflt -ffffffff8316e018 D tcp_do_rfc1323 -ffffffff8316e01c D tcp_do_sack -ffffffff8316e020 D tcp_do_rfc3390 -ffffffff8316e024 D tcp_do_tso -ffffffff8316e028 D tcp_reass_limit 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ah_enable -ffffffff83175000 D udpencap_enable -ffffffff83175004 D udpencap_port -ffffffff83176000 D carp_vh_rc -ffffffff83176020 D carp_sc_rc -ffffffff83176040 D carp_opts -ffffffff83176058 D carp_cloner -ffffffff83176088 d carp_send_na.mcast -ffffffff83177000 d PADDING +ffffffff82c7e140 r use_bclk_tbl +ffffffff82c7e2e0 r turn_off_plls_tbl +ffffffff82c7e370 r clk_req_b_tbl +ffffffff82c7e490 r enter_baco_tbl +ffffffff82c7e5b0 r exit_baco_tbl +ffffffff82c7e6d0 r clean_baco_tbl +ffffffff82c7f000 r gpio_tbl +ffffffff82c7f0f0 r enable_fb_req_rej_tbl +ffffffff82c7f140 r use_bclk_tbl_vg +ffffffff82c7f200 r turn_off_plls_tbl_vg +ffffffff82c7f350 r use_bclk_tbl +ffffffff82c7f440 r turn_off_plls_tbl +ffffffff82c7f5f0 r clk_req_b_tbl +ffffffff82c7f710 r enter_baco_tbl +ffffffff82c7f830 r exit_baco_tbl +ffffffff82c7f950 r clean_baco_tbl +ffffffff82c80000 r vega10_fuses_default +ffffffff82c8f000 r pp_r600_encode_lanes +ffffffff82c90000 R pptable_v1_0_funcs +ffffffff82c91000 R pptable_funcs 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PSMSEEDCCtrlResetConfig_Vega10 +ffffffff82c9e290 r PSMSEEDCCtrlConfig_Vega10 +ffffffff82c9e350 r SEEDCForceStallPatternConfig_Vega10 +ffffffff82c9e3e0 r SEEDCCtrlForceStallConfig_Vega10 +ffffffff82c9f000 R vega10_pptable_funcs +ffffffff82ca0000 r pre_baco_tbl +ffffffff82ca0090 r enter_baco_tbl +ffffffff82ca02b0 r exit_baco_tbl +ffffffff82ca0520 r clean_baco_tbl +ffffffff82ca1000 r vega12_hwmgr_funcs +ffffffff82ca12f0 r SMU7ThermalWithDelayPolicy +ffffffff82ca1340 r link_width +ffffffff82ca2000 R vega12_pptable_funcs +ffffffff82ca3000 r clean_baco_tbl +ffffffff82ca4000 r vega20_hwmgr_funcs +ffffffff82ca42f0 r SMU7ThermalWithDelayPolicy +ffffffff82ca4340 r link_width +ffffffff82ca5000 R vega20_pptable_funcs +ffffffff82ca6000 R ci_smu_funcs +ffffffff82ca60e0 r defaults_hawaii_pro +ffffffff82ca612c r defaults_hawaii_xt +ffffffff82ca6178 r defaults_saturn_xt +ffffffff82ca61c4 r defaults_bonaire_xt +ffffffff82ca6210 r ci_program_jump_on_start.data +ffffffff82ca7000 R fiji_smu_funcs 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R smu8_smu_funcs +ffffffff82cb7000 R tonga_smu_funcs +ffffffff82cb70e0 r tonga_power_tune_data_set_array +ffffffff82cb712c r tonga_clock_stretch_amount_conversion +ffffffff82cb7140 r tonga_clock_stretcher_ddt_table +ffffffff82cb8000 R vega10_smu_funcs +ffffffff82cb9000 R vega12_smu_funcs +ffffffff82cba000 R vega20_smu_funcs +ffffffff82cbb000 R vegam_smu_funcs +ffffffff82cbb0e0 r vegam_power_tune_data_set_array +ffffffff82cbb130 r Range_Table +ffffffff82cbc000 R smu_ip_funcs +ffffffff82cbc0a0 R smu_v11_0_ip_block +ffffffff82cbc0b8 R smu_v12_0_ip_block +ffffffff82cbc0d0 R smu_v13_0_ip_block +ffffffff82cbc0e8 r swsmu_pm_funcs +ffffffff82cbd000 r arcturus_ppt_funcs +ffffffff82cbd3d0 r arcturus_table_map +ffffffff82cbd450 r arcturus_pwr_src_map +ffffffff82cbd460 r arcturus_workload_map +ffffffff82cbd4a0 r smu11_thermal_policy +ffffffff82cbd4f8 r arcturus_i2c_algo +ffffffff82cbd508 r arcturus_i2c_control_quirks +ffffffff82cbd520 r arcturus_throttler_map +ffffffff82cbd540 r arcturus_message_map +ffffffff82cbdf90 r arcturus_clk_map +ffffffff82cbe050 r arcturus_feature_mask_map +ffffffff82cbf000 r cyan_skillfish_ppt_funcs +ffffffff82cc0000 r navi10_ppt_funcs +ffffffff82cc03d0 r smu11_thermal_policy +ffffffff82cc0428 r navi10_i2c_algo +ffffffff82cc0438 r navi10_i2c_control_quirks +ffffffff82cc0450 r navi1x_throttler_map +ffffffff82cc0470 r NoDbiPrbs7 +ffffffff82cc1470 r DbiPrbs7 +ffffffff82cc3000 r sienna_cichlid_ppt_funcs +ffffffff82cc33d0 r smu11_thermal_policy +ffffffff82cc3428 r sienna_cichlid_i2c_algo +ffffffff82cc3438 r sienna_cichlid_i2c_control_quirks +ffffffff82cc3450 r sienna_cichlid_throttler_map +ffffffff82cc4000 r smu_v11_0_irq_funcs +ffffffff82cc4010 r link_width +ffffffff82cc5000 r vangogh_ppt_funcs +ffffffff82cc53d0 r vangogh_throttler_map +ffffffff82cc6000 r renoir_ppt_funcs +ffffffff82cc63d0 r renoir_throttler_map +ffffffff82cc7000 r aldebaran_ppt_funcs +ffffffff82cc73d0 r aldebaran_clk_map +ffffffff82cc7490 r aldebaran_table_map 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cardslot_ca +ffffffff82cd3000 R cardbus_ca +ffffffff82cd4000 R com_cardbus_ca +ffffffff82cd5000 R xl_cardbus_ca +ffffffff82cd5030 R xl_cardbus_products +ffffffff82cd6000 R dc_cardbus_ca +ffffffff82cd6030 R dc_cardbus_devices +ffffffff82cd7000 R fxp_cardbus_ca +ffffffff82cd7028 R fxp_cardbus_devices +ffffffff82cd8000 R rl_cardbus_devices +ffffffff82cd8028 R rl_cardbus_ca +ffffffff82cd9000 R re_cardbus_ca +ffffffff82cd9028 R re_cardbus_devices +ffffffff82cda000 R ath_cardbus_ca +ffffffff82cdb000 R athn_cardbus_ca +ffffffff82cdb030 r athn_cardbus_devices +ffffffff82cdc000 R atw_cardbus_ca +ffffffff82cdc028 R atw_cardbus_devices +ffffffff82cdd000 R rtw_cardbus_ca +ffffffff82cdd028 R rtw_cardbus_devices +ffffffff82cde000 R ral_cardbus_ca +ffffffff82cde030 r ral_cardbus_devices +ffffffff82cdf000 R acx_cardbus_ca +ffffffff82cdf028 r acx_cardbus_devices +ffffffff82ce0000 R pgt_cardbus_ca +ffffffff82ce0028 R pgt_cardbus_devices +ffffffff82ce1000 R ehci_cardbus_ca +ffffffff82ce2000 R ohci_cardbus_ca +ffffffff82ce3000 R uhci_cardbus_ca +ffffffff82ce4000 R malo_cardbus_ca +ffffffff82ce4028 r malo_cardbus_devices +ffffffff82ce5000 R bwi_cardbus_ca +ffffffff82ce5030 r bwi_cardbus_devices +ffffffff82ce6000 R pcmcia_ca +ffffffff82ce7000 r pcmcia_parse_cis_tuple.init_cfe +ffffffff82ce8000 r pcmcia_cis_quirks +ffffffff82ce9000 R ep_pcmcia_ca +ffffffff82cea000 R ne_pcmcia_ca +ffffffff82cea030 R ne2000devs +ffffffff82cec000 R aic_pcmcia_ca +ffffffff82ced000 R com_pcmcia_ca +ffffffff82cee000 R wdc_pcmcia_ca +ffffffff82cef000 R sm_pcmcia_ca +ffffffff82cf0000 R xe_pcmcia_ca +ffffffff82cf1000 R wi_pcmcia_ca +ffffffff82cf1030 r wi_pcmcia_products +ffffffff82cf2000 R malo_pcmcia_ca +ffffffff82cf3000 R an_pcmcia_ca +ffffffff82cf4000 R pcib_ca +ffffffff82cf5000 R amdpcib_ca +ffffffff82cf5028 R amdpcib_devices +ffffffff82cf6000 R tcpcib_ca +ffffffff82cf6028 R tcpcib_devices +ffffffff82cf7000 R aapic_ca +ffffffff82cf8000 R hme_pci_ca +ffffffff82cf8028 r hme_promhdr +ffffffff82cf802a r hme_promdat +ffffffff82cf9000 R isa_ca +ffffffff82cfa000 R isadma_ca +ffffffff82cfb000 R fdc_ca +ffffffff82cfc000 R fd_ca +ffffffff82cfd000 R com_isa_ca +ffffffff82cfe000 R pckbc_isa_ca +ffffffff82cff000 R vga_isa_ca +ffffffff82d00000 R wdc_isa_ca +ffffffff82d01000 R mpu_midi_hw_if +ffffffff82d02000 R mpu_isa_ca +ffffffff82d03000 R pcppi_ca +ffffffff82d04000 R spkr_ca +ffffffff82d04030 r pitchtab +ffffffff82d05000 R lpt_isa_ca +ffffffff82d06000 R wbsio_ca +ffffffff82d07000 R schsio_ca +ffffffff82d08000 R lm_isa_ca +ffffffff82d08028 R lm_wbsio_ca +ffffffff82d09000 R it_sensors +ffffffff82d09110 R it_vrfact +ffffffff82d09140 R it_fan_regs +ffffffff82d09160 R it_fan_ext_regs +ffffffff82d09178 R it_ca +ffffffff82d0a000 R abitkv_sensors +ffffffff82d0a200 R abitaa_sensors +ffffffff82d0a480 R abitav_sensors +ffffffff82d0a700 R abitas_sensors +ffffffff82d0a980 R abitax_sensors +ffffffff82d0abc0 R abitm4_sensors +ffffffff82d0ae80 R abitan_sensors +ffffffff82d0b120 R abital_sensors +ffffffff82d0b3a0 R abitaw_sensors +ffffffff82d0b700 R abitni_sensors +ffffffff82d0b9a0 R abitat_sensors +ffffffff82d0bcc0 R abitan2_sensors +ffffffff82d0bf60 R abitab_sensors +ffffffff82d0c220 R abitan3_sensors +ffffffff82d0c500 R abitaw2_sensors +ffffffff82d0c860 R abitat2_sensors +ffffffff82d0cb60 R abitab2_sensors +ffffffff82d0cea0 R abitin_sensors +ffffffff82d0d1e0 R uguru_ca +ffffffff82d0e000 R aps_ca +ffffffff82d0f000 R wsdisplay_emul_ca +ffffffff82d0f030 r charClass +ffffffff82d10000 r usl_syncops +ffffffff82d11000 R wsevent_filtops +ffffffff82d12000 R wskbd_ca +ffffffff82d13000 r latin1_to_upper +ffffffff82d14000 R wsmouse_ca +ffffffff82d15000 R cyrillic_to_koi8 +ffffffff82d15060 R unicode_to_latin2 +ffffffff82d150e0 R unicode_to_latin7 +ffffffff82d16000 R wsemul_vt100_ops +ffffffff82d17000 r decspcgr2uni +ffffffff82d17100 r dectech2uni +ffffffff82d17200 r nrctable +ffffffff82d18000 r vt100_fkeys +ffffffff82d180c0 r vt100_pfkeys +ffffffff82d180e0 r vt100_numpad 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r pckbd_keydesc_es +ffffffff82d1aa50 r pckbd_keydesc_be +ffffffff82d1ab10 r pckbd_keydesc_ru +ffffffff82d1ac80 r pckbd_keydesc_ua +ffffffff82d1ae10 r pckbd_keydesc_sg +ffffffff82d1aec0 r pckbd_keydesc_sg_nodead +ffffffff82d1aee0 r pckbd_keydesc_sf +ffffffff82d1af00 r pckbd_keydesc_pt +ffffffff82d1af90 r pckbd_keydesc_lt +ffffffff82d1b070 r pckbd_keydesc_la +ffffffff82d1b100 r pckbd_keydesc_br +ffffffff82d1b180 r pckbd_keydesc_tr +ffffffff82d1b230 r pckbd_keydesc_tr_nodead +ffffffff82d1b250 r pckbd_keydesc_pl +ffffffff82d1b2b0 r pckbd_keydesc_hu +ffffffff82d1b3c0 r pckbd_keydesc_si +ffffffff82d1b4d0 r pckbd_keydesc_cf +ffffffff82d1b5a0 r pckbd_keydesc_cf_nodead +ffffffff82d1b5c0 r pckbd_keydesc_lv +ffffffff82d1b640 r pckbd_keydesc_nl +ffffffff82d1b720 r pckbd_keydesc_nl_nodead +ffffffff82d1b740 r pckbd_keydesc_is +ffffffff82d1b7cc r pckbd_keydesc_is_nodead +ffffffff82d1b7e0 r pckbd_keydesc_ee +ffffffff82d1b890 r pckbd_keydesc_ee_nodead +ffffffff82d1b8b0 R pckbd_keydesctab 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uvideo_hw_if +ffffffff82d33100 R uvideo_devs +ffffffff82d34000 r utvfu_select_norm.pal +ffffffff82d34040 r utvfu_select_norm.ntsc +ffffffff82d34080 r utvfu_setup_capture.setup +ffffffff82d34180 r utvfu_audio_start_chip.setup +ffffffff82d341c8 r utvfu_audio_stop_chip.setup +ffffffff82d341d8 R utvfu_ca +ffffffff82d34200 R utvfu_vid_hw_if +ffffffff82d342d0 R utvfu_au_hw_if +ffffffff82d35000 R udl_ca +ffffffff82d35030 r udl_devs +ffffffff82d350b0 r udl_modes +ffffffff82d36000 R umidi_hw_if +ffffffff82d36030 R umidi_ca +ffffffff82d36060 r umidi_evlen +ffffffff82d36080 r packet_length +ffffffff82d37000 r quirk_name +ffffffff82d38000 R ucom_ca +ffffffff82d39000 R ugen_ca +ffffffff82d39028 R ugenread_intr_filtops +ffffffff82d39058 R ugenread_isoc_filtops +ffffffff82d3a000 R uhidev_ca +ffffffff82d3a030 r uhid_graphire_report_descr +ffffffff82d3a0b0 r uhid_graphire3_4x5_report_descr +ffffffff82d3a160 r uhid_xb360gp_report_descr +ffffffff82d3a210 r uhid_xbonegp_report_descr +ffffffff82d3b000 R uhid_ca +ffffffff82d3b028 R uhidread_filtops +ffffffff82d3c000 R fido_ca +ffffffff82d3d000 R ujoy_ca +ffffffff82d3e000 r ukbd_keydesc_us +ffffffff82d3e2a0 r ukbd_keydesc_de +ffffffff82d3e350 r ukbd_keydesc_de_nodead +ffffffff82d3e370 r ukbd_keydesc_fr +ffffffff82d3e430 r ukbd_keydesc_fr_apple +ffffffff82d3e570 r ukbd_keydesc_fr_dvorak_bepo +ffffffff82d3e6b0 r ukbd_keydesc_dk +ffffffff82d3e750 r ukbd_keydesc_dk_nodead +ffffffff82d3e760 r ukbd_keydesc_it +ffffffff82d3e800 r ukbd_keydesc_uk +ffffffff82d3e8b0 r ukbd_keydesc_jp +ffffffff82d3e920 r ukbd_keydesc_sv +ffffffff82d3e950 r ukbd_keydesc_sv_nodead +ffffffff82d3e960 r ukbd_keydesc_no +ffffffff82d3e990 r ukbd_keydesc_no_nodead +ffffffff82d3e9a0 r ukbd_keydesc_us_dvorak +ffffffff82d3ea40 r ukbd_keydesc_us_colemak +ffffffff82d3ea88 r ukbd_keydesc_swapctrlcaps +ffffffff82d3eaa0 r ukbd_keydesc_iopener +ffffffff82d3eaf0 r ukbd_keydesc_es +ffffffff82d3eb90 r ukbd_keydesc_be +ffffffff82d3ec50 r ukbd_keydesc_ru +ffffffff82d3edc0 r ukbd_keydesc_ua +ffffffff82d3ef60 r ukbd_keydesc_sg +ffffffff82d3f020 r ukbd_keydesc_sg_nodead +ffffffff82d3f040 r ukbd_keydesc_sf +ffffffff82d3f060 r ukbd_keydesc_pt +ffffffff82d3f0f0 r ukbd_keydesc_pt_apple +ffffffff82d3f110 r ukbd_keydesc_lt +ffffffff82d3f1f0 r ukbd_keydesc_la +ffffffff82d3f290 r ukbd_keydesc_br +ffffffff82d3f320 r ukbd_keydesc_tr +ffffffff82d3f3e0 r ukbd_keydesc_tr_nodead +ffffffff82d3f400 r ukbd_keydesc_pl +ffffffff82d3f460 r ukbd_keydesc_hu +ffffffff82d3f570 r ukbd_keydesc_si +ffffffff82d3f690 r ukbd_keydesc_cf +ffffffff82d3f770 r ukbd_keydesc_cf_nodead +ffffffff82d3f790 r ukbd_keydesc_lv +ffffffff82d3f810 r ukbd_keydesc_nl +ffffffff82d3f8f0 r ukbd_keydesc_nl_nodead +ffffffff82d3f910 r ukbd_keydesc_is +ffffffff82d3f9a4 r ukbd_keydesc_is_nodead +ffffffff82d3f9b0 r ukbd_keydesc_ee +ffffffff82d3fa60 r ukbd_keydesc_ee_nodead +ffffffff82d3fa80 R ukbd_keydesctab +ffffffff82d40000 R ukbd_countrylayout +ffffffff82d40090 R ukbd_consops +ffffffff82d400b0 R ukbd_accessops +ffffffff82d400c8 R ukbd_ca +ffffffff82d400f0 R ukbd_never_console +ffffffff82d41000 R ums_accessops +ffffffff82d41018 R ums_ca +ffffffff82d42000 R umt_accessops +ffffffff82d42018 R umt_ca +ffffffff82d43000 R uts_devs +ffffffff82d43010 R uts_accessops +ffffffff82d43028 R uts_ca +ffffffff82d44000 R ubcmtp_accessops +ffffffff82d44018 R ubcmtp_ca +ffffffff82d44040 r ubcmtp_devices +ffffffff82d45000 R ucycom_methods +ffffffff82d45040 R ucycom_devs +ffffffff82d45050 R ucycom_ca +ffffffff82d46000 R uslhcom_methods +ffffffff82d46040 R uslhcom_ca +ffffffff82d46068 r uslhcom_devs +ffffffff82d47000 R ulpt_ca +ffffffff82d48000 R umass_ca +ffffffff82d48028 R umass_bbb_methods +ffffffff82d48040 R umass_cbi_methods +ffffffff82d49000 R umass_quirks +ffffffff82d4a000 R umass_scsi_switch +ffffffff82d4b000 R uthum_devs +ffffffff82d4b008 R uthum_ca +ffffffff82d4b030 r uthum_sensor_type_s +ffffffff82d4c000 R ugold_devs +ffffffff82d4c018 R ugold_ca +ffffffff82d4d000 R utrh_devs +ffffffff82d4d008 R utrh_ca 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fxp_int_delay +ffffffff830cd004 D fxp_bundle_max +ffffffff830cd008 D fxp_min_size_mask +ffffffff830cd010 D fxp_cd +ffffffff830cd030 d tx_threshold +ffffffff830cd040 d fxp_cb_config_template +ffffffff830ce000 D rl_cd +ffffffff830cf000 D re_cd +ffffffff830d0000 D dc_cd +ffffffff830d1000 D smc91cxx_idstrs +ffffffff830d1080 D sm_cd +ffffffff830d2000 D epic_cd +ffffffff830d3000 D ne_cd +ffffffff830d3020 d ne2000_detect.test_pattern +ffffffff830d4000 D gem_cd +ffffffff830d5000 D ti_cd +ffffffff830d6000 D com_cd +ffffffff830d6020 D comdefaultrate +ffffffff830d6024 D comconsrate +ffffffff830d6028 D comconscflag +ffffffff830d6030 d comcnattach.comcons +ffffffff830d7000 D pckbc_slot_names +ffffffff830d7010 D pckbc_cd +ffffffff830d8000 D ac97civ +ffffffff830d9000 D cy_cd +ffffffff830da000 D lpt_cd +ffffffff830db000 D lm_cd +ffffffff830dc000 D ath_dwelltime +ffffffff830dc004 D ath_calinterval +ffffffff830dc008 D ath_outdoor +ffffffff830dc00c D ath_xchanmode +ffffffff830dc010 D ath_softcrypto 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D ehci_cd +ffffffff830ec000 D xhci_cd +ffffffff830ed000 D ccp_cd +ffffffff830ee000 D sdhc_functions +ffffffff830ee068 D sdhc_cd +ffffffff830ef000 D rtsx_functions +ffffffff830ef068 D rtsx_cd +ffffffff830f0000 D radio_cd +ffffffff830f1000 D kcs_if +ffffffff830f1040 D smic_if +ffffffff830f1080 D bt_if +ffffffff830f10c0 D ipmi_cd +ffffffff830f10e0 D maxsdrlen +ffffffff830f2000 D vscsi_cd +ffffffff830f3000 D mpath_cd +ffffffff830f4000 D softraid_cd +ffffffff830f4020 D smd +ffffffff830f5000 D spdmem_cd +ffffffff830f6000 D dwiic_cd +ffffffff830f7000 D dwqe_cd +ffffffff830f8000 D kstat_lock +ffffffff830f8010 D kstat_next_id +ffffffff830f8018 D kstat_default_lock +ffffffff830f9000 D pf_inp_mtx +ffffffff830f9010 D pf_hdr_limit +ffffffff830f9020 D pf_pool_limits +ffffffff830f9090 D pf_state_list +ffffffff830f90c0 D pf_purge_states_task +ffffffff830f90f0 D pf_purge_states_to +ffffffff830f9138 D pf_purge_states_collect +ffffffff830f9140 D pf_purge_to +ffffffff830f9188 D pf_purge_task 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dt_static_sched_steal +ffffffff831043b0 D dt_static_sched_unsleep +ffffffff83104420 D dt_static_sched_wakeup +ffffffff83104490 D dt_static_raw_syscalls_sys_enter +ffffffff83104500 D dt_static_raw_syscalls_sys_exit +ffffffff83104570 D dt_static_uvm_fault +ffffffff831045e0 D dt_static_uvm_map_insert +ffffffff83104650 D dt_static_uvm_map_remove +ffffffff831046c0 D dt_static_uvm_malloc +ffffffff83104730 D dt_static_uvm_free +ffffffff831047a0 D dt_static_uvm_pool_get +ffffffff83104810 D dt_static_uvm_pool_put +ffffffff83104880 D dt_static_vfs_bufcache_rel +ffffffff831048f0 D dt_static_vfs_bufcache_take +ffffffff83104960 D dt_static_vfs_cleaner +ffffffff831049d0 D dt_static_vmm_guest_enter +ffffffff83104a40 D dt_static_vmm_guest_exit +ffffffff83104ab0 D dt_static_vmm_inout +ffffffff83104b20 D dt_static_smr_call +ffffffff83104b90 D dt_static_smr_called +ffffffff83104c00 D dt_static_smr_barrier_enter +ffffffff83104c70 D dt_static_smr_barrier_exit +ffffffff83104ce0 D dt_static_smr_wakeup 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D hw_power +ffffffff83125044 d byte_order +ffffffff83125048 d page_size +ffffffff83126000 d thrsleep_queue +ffffffff83126010 d thrsleep_lock +ffffffff83127000 D tc_lock +ffffffff83127010 D windup_mtx +ffffffff83127020 d dummy_timecounter +ffffffff83127070 D timecounter +ffffffff83127078 D time_second +ffffffff83127080 d timehands +ffffffff83127088 d th0 +ffffffff83127120 d th1 +ffffffff83128000 D itimer_mtx +ffffffff83128010 D ratecheck_mtx +ffffffff83128020 D ppsratecheck_mtx +ffffffff83128030 D resettodr_to +ffffffff83128078 D resettodr_task +ffffffff83129000 D timeout_mutex +ffffffff8312a000 D wdog_auto +ffffffff8312b000 D taskq_sys +ffffffff8312b050 D taskq_sys_mp +ffffffff8312c000 d update_loadavg.to +ffffffff8312c048 D ccpu +ffffffff8312c050 d schedcpu.to +ffffffff8312c098 D perflevel +ffffffff8312c09c D perfpolicy +ffffffff8312c0a0 D setperf_to +ffffffff8312d000 D autoconf_attdet_mtx +ffffffff8312d010 D msgs +ffffffff8312e000 d evcount_list +ffffffff8312e010 d evcount_percpu_init_list +ffffffff8312f000 D syslogf_rwlock +ffffffff8312f010 D log_mtx +ffffffff8312f020 D logstash_in +ffffffff8312f028 D logstash_out +ffffffff8312f030 D logstash_rwlock +ffffffff83130000 D pool_head +ffffffff83130010 D pool_lock +ffffffff83130020 D pool_debug +ffffffff83130028 D pool_allocator_single +ffffffff83130040 D pool_allocator_multi +ffffffff83130058 D pool_allocator_multi_ni +ffffffff83130070 D pool_gc_tick +ffffffff831300b8 D pool_gc_task +ffffffff83131000 D kprintf_mutex +ffffffff83131010 D db_panic +ffffffff83131014 D splassert_ctl +ffffffff83131018 D v_putc +ffffffff83131020 D printf_flags +ffffffff83132000 D userconf_base +ffffffff83132004 D userconf_maxdev +ffffffff83132008 D userconf_totdev +ffffffff8313200c D userconf_maxlocnames +ffffffff83132010 D userconf_cnt +ffffffff83132014 D userconf_lines +ffffffff83132018 D userconf_histsz +ffffffff83132020 D userconf_cmds +ffffffff83133000 D ftlock +ffffffff83134000 d ppollcollect.poll_errintvl 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ifiq_maxlen_return +ffffffff83148000 D etherbroadcastaddr +ffffffff83148006 D ether_ipmulticast_min +ffffffff8314800c D ether_ipmulticast_max +ffffffff83148012 D ether_ip6multicast_min +ffffffff83148018 D ether_ip6multicast_max +ffffffff83149000 D etherip_cloner +ffffffff83149030 D etherip_list +ffffffff8314a000 D loop_cloner +ffffffff8314b000 D ifmedia_mtx +ffffffff8314c000 D ppp_compressors +ffffffff8314c020 D ppp_cloner +ffffffff8314d000 D ppp_pkt_init +ffffffff8314e000 D ppp_bsd_compress +ffffffff8314f000 D ppp_deflate +ffffffff8314f070 D ppp_deflate_draft +ffffffff83150000 D tun_cloner +ffffffff83150030 D tap_cloner +ffffffff83151000 D bridgeintrq +ffffffff83151038 D bridge_cloner +ffffffff83152000 d veb_cloner +ffffffff83152030 d vport_cloner +ffffffff83153000 D vlan_tagh_lk +ffffffff83153010 D vlan_cloner +ffffffff83153040 D svlan_cloner +ffffffff83154000 D pipex_list_mtx +ffffffff83154010 D pipex_prune +ffffffff83154018 D pipexoutq +ffffffff83154050 d SHAPad2 +ffffffff83155000 D rtmap_gc +ffffffff83155018 D rt_rc +ffffffff83156000 D rt_labels +ffffffff83156010 D rtlabel_mtx +ffffffff83157000 D enc_cloner +ffffffff83158000 D gre_cloner +ffffffff83158030 D gre_list +ffffffff83158040 D mgre_cloner +ffffffff83158070 D egre_cloner +ffffffff831580a0 D nvgre_cloner +ffffffff831580d0 D eoip_cloner +ffffffff83159000 D trunk_cloner +ffffffff8315a000 d aggr_cloner +ffffffff8315b000 d tpmr_cloner +ffffffff8315c000 D mpe_cloner +ffffffff8315d000 D mpw_cloner +ffffffff8315e000 D mpip_cloner +ffffffff8315f000 d bpe_cloner +ffffffff8315f030 d bpe_lock +ffffffff83160000 D vether_cloner +ffffffff83161000 D pair_cloner +ffffffff83162000 d vxlan_cloner +ffffffff83162030 d vxlan_lock +ffffffff83162040 d vxlan_teps +ffffffff83163000 D underload_interval +ffffffff83163010 D wg_cloner +ffffffff83164000 d stoeplitz_keyseed +ffffffff83165000 D ieee80211_cache_size +ffffffff83166000 D arpt_prune +ffffffff83166004 D arpt_keep +ffffffff83166008 D arpt_down +ffffffff83166010 D arpinq +ffffffff83166048 D arp_mtx +ffffffff83166058 D arp_maxtries +ffffffff83167000 D ipport_firstauto +ffffffff83167004 D ipport_lastauto +ffffffff83167008 D ipport_hifirstauto +ffffffff8316700c D ipport_hilastauto +ffffffff83168000 D divert_sendspace +ffffffff83168004 D divert_recvspace +ffffffff83168008 D divbhashsize +ffffffff83169000 D icmptstamprepl +ffffffff83169004 D icmperrppslim +ffffffff83169008 D icmp_redirtimeout +ffffffff8316a000 D ipsendredirects +ffffffff8316a004 D ip_defttl +ffffffff8316a008 D ip_mtudisc +ffffffff8316a00c D ip_mtudisc_timeout +ffffffff8316a010 D ipq_mutex +ffffffff8316a020 D ip_maxqueue +ffffffff8316a028 D ipintrq +ffffffff8316a060 d ipsend_task +ffffffff8316a090 d ipsendraw_task +ffffffff8316b000 D ip_mrtproto +ffffffff8316b004 d sin +ffffffff8316c000 D rip_sendspace +ffffffff8316c008 D rip_recvspace +ffffffff8316d000 D tcprexmtthresh +ffffffff8316d004 D tcptv_keep_init +ffffffff8316d008 D tcp_rst_ppslim +ffffffff8316d00c D tcp_ackdrop_ppslim +ffffffff8316d010 D tcp_syn_hash_size +ffffffff8316d014 D tcp_syn_cache_limit +ffffffff8316d018 D tcp_syn_bucket_limit +ffffffff8316d01c D tcp_syn_use_limit +ffffffff8316d020 D syn_cache_mtx +ffffffff8316e000 D tcp_outflags +ffffffff8316f000 D tcp_timer_mtx +ffffffff8316f010 D tcp_mssdflt +ffffffff8316f014 D tcp_rttdflt +ffffffff8316f018 D tcp_do_rfc1323 +ffffffff8316f01c D tcp_do_sack +ffffffff8316f020 D tcp_do_rfc3390 +ffffffff8316f024 D tcp_do_tso +ffffffff8316f028 D tcp_reass_limit +ffffffff8316f02c D tcp_sackhole_limit +ffffffff83170000 D tcp_backoff +ffffffff83170034 D tcp_totbackoff +ffffffff83171000 D tcp_sendspace +ffffffff83171004 D tcp_recvspace +ffffffff83171008 D tcp_autorcvbuf_inc +ffffffff83172000 D udpcksum +ffffffff83172004 D udp_sendspace +ffffffff83172008 D udp_recvspace +ffffffff83173000 D ipsec_flows_mtx +ffffffff83173010 D ipsec_ids_idle +ffffffff83173014 D ipsec_ids_next_flow +ffffffff83173018 D ipsec_policy_head +ffffffff83173028 D ipsp_ids_gc_timeout +ffffffff83173070 D tdb_sadb_mtx +ffffffff83173080 d tdb_hashmask +ffffffff83174000 D ipo_tdb_mtx +ffffffff83174010 D ipsec_acquire_mtx +ffffffff83174020 D ipsec_acquire_head +ffffffff83175000 D ipsec_keep_invalid +ffffffff83175004 D ipsec_require_pfs +ffffffff83175008 D ipsec_soft_timeout +ffffffff8317500c D ipsec_exp_timeout +ffffffff83175010 D ipsec_soft_first_use +ffffffff83175014 D ipsec_exp_first_use +ffffffff83175018 D ipsec_expire_acquire +ffffffff8317501c D esp_enable +ffffffff83175020 D ah_enable +ffffffff83176000 D udpencap_enable +ffffffff83176004 D udpencap_port +ffffffff83177000 D carp_vh_rc +ffffffff83177020 D carp_sc_rc +ffffffff83177040 D carp_opts +ffffffff83177058 D carp_cloner +ffffffff83177088 d carp_send_na.mcast ffffffff83178000 d PADDING -ffffffff83179000 d weak_keys -ffffffff8317a000 D swcr_id -ffffffff8317b000 D window_inflate -ffffffff8317b004 D window_deflate -ffffffff8317c000 D ghash_update -ffffffff8317d000 D mpls_defttl -ffffffff8317d004 D mpls_mapttl_ip -ffffffff8317e000 D nfskevq_lock -ffffffff8317f000 D nfs_backoff -ffffffff8317f020 D nfs_ptimers -ffffffff83180000 D desirednfsrvcache -ffffffff83180010 D nonidempotent -ffffffff83180070 D nfsv2_repstat -ffffffff83181000 D nfsv2_type -ffffffff83181030 D nfsv3_type -ffffffff83181060 D nv2tov_type -ffffffff83181080 D nv3tov_type -ffffffff831810a0 D nfsv3_procid -ffffffff83181100 D nfsv2_procid -ffffffff8318115c d nfsv3err_getattr -ffffffff83181170 d nfsv3err_setattr -ffffffff83181190 d nfsv3err_lookup -ffffffff831811a4 d nfsv3err_access -ffffffff831811b0 d nfsv3err_readlink -ffffffff831811d0 d nfsv3err_read -ffffffff831811f0 d nfsv3err_write -ffffffff83181210 d nfsv3err_create -ffffffff83181230 d nfsv3err_mkdir -ffffffff83181250 d nfsv3err_symlink -ffffffff83181270 d nfsv3err_mknod -ffffffff83181290 d nfsv3err_remove -ffffffff831812b0 d nfsv3err_rmdir -ffffffff831812d0 d nfsv3err_rename -ffffffff83181300 d nfsv3err_link -ffffffff83181330 d nfsv3err_readdir -ffffffff83181350 d nfsv3err_readdirplus -ffffffff83181366 d nfsv3err_fsstat -ffffffff83181372 d nfsv3err_fsinfo -ffffffff8318137c d nfsv3err_pathconf -ffffffff83181386 d nfsv3err_commit -ffffffff83182000 D nfsrv3_procs -ffffffff831820b8 D nfs_niothreads -ffffffff83183000 D fragtbl -ffffffff83184000 D ffs_vtbl -ffffffff83185000 D softdep_typenames -ffffffff83185070 D tickdelay -ffffffff83186000 D dirchk -ffffffff83187000 D desireddquot -ffffffff83188000 D amap_list_lock -ffffffff83189000 d uao_list_lock -ffffffff8318a000 d uvmexp_countersboot_boot_cpumem -ffffffff8318a0c0 D uvmexp_counters -ffffffff8318a0c8 D vm_min_kernel_address -ffffffff8318b000 D no_constraint -ffffffff8318c000 d uvm_kmapent_warn_rate -ffffffff8318d000 D maxslp -ffffffff8318e000 D uvmpagerops -ffffffff8318f000 D uvm_swap_data_lock -ffffffff8318f010 D swap_syscall_lock -ffffffff8318f020 D oommtx -ffffffff83190000 D uvm_doswapencrypt -ffffffff83191000 D gif_list -ffffffff83191010 D gif_cloner -ffffffff83192000 d sec_cloner -ffffffff83192030 d sec_tdb_gc_mtx -ffffffff83192040 d sec_tdb_gc_task -ffffffff83193000 D divert6_sendspace -ffffffff83193004 D divert6_recvspace -ffffffff83193008 D divb6hashsize -ffffffff83194000 d in6_get_hw_ifid.allone -ffffffff83195000 D ip6_sendredirects -ffffffff83195004 D ip6_defhlim -ffffffff83195008 D ip6_defmcasthlim -ffffffff8319500c D ip6_maxfragpackets -ffffffff83195010 D ip6_maxfrags -ffffffff83195014 D ip6_log_interval -ffffffff83195018 D ip6_hdrnestlimit -ffffffff8319501c D ip6_dad_count -ffffffff83195020 D ip6_auto_flowlabel -ffffffff83195024 D ip6_use_deprecated -ffffffff83195028 D ip6_neighborgcthresh -ffffffff8319502c D ip6_maxdynroutes -ffffffff83195030 D rip6_sendspace -ffffffff83195038 D rip6_recvspace -ffffffff83195040 D icmp6_redirtimeout -ffffffff83195044 D icmp6errppslim -ffffffff83195048 D ip6_mtudisc_timeout -ffffffff83196000 D frag6_mutex -ffffffff83197000 d icmp6_mtudisc_hiwat -ffffffff83197004 d icmp6_mtudisc_lowat -ffffffff83198000 d randomtab_20 -ffffffff83199000 D ip6intrq -ffffffff83199038 d ip6send_task -ffffffff8319a000 D nd6_timer_next -ffffffff8319a008 D nd6_expire_next -ffffffff8319a010 D nd6_delay -ffffffff8319a014 D nd6_umaxtries -ffffffff8319a018 D nd6_mmaxtries -ffffffff8319a01c D nd6_gctimer -ffffffff8319a020 D nd6_maxndopt -ffffffff8319a028 D nd6_mtx -ffffffff8319a038 D nd6_list -ffffffff8319b000 d dadq -ffffffff8319c000 D pfkeyv2_mtx -ffffffff8319c010 d pfkeyv2_seq -ffffffff8319d000 D sadb_exts_allowed_in -ffffffff8319d090 D sadb_exts_required_in -ffffffff8319e000 D cold -ffffffff8319f000 D bdevsw -ffffffff8319f460 D nblkdev -ffffffff8319f470 D cdevsw -ffffffff831a1400 D nchrdev -ffffffff831a1404 D mem_no -ffffffff831a1408 D swapdev -ffffffff831a1410 D constab -ffffffff831a2000 D machine -ffffffff831a2008 D cpu_idle_cycle_fcn -ffffffff831a2010 D lid_action -ffffffff831a2014 D pwr_action -ffffffff831a2018 D isa_constraint -ffffffff831a2028 D dma_constraint -ffffffff831a2040 D uvm_md_constraints -ffffffff831a2058 D delay_func -ffffffff831a2060 D initclock_func -ffffffff831a2068 D startclock_func -ffffffff831a2070 D bootinfo_size -ffffffff831a2074 D waittime -ffffffff831a2078 D dumpmag -ffffffff831a3000 D tsc_rdtsc -ffffffff831a3008 D tsc_timecounter -ffffffff831a3058 D tsc_is_synchronized -ffffffff831a4000 D local_apic -ffffffff831a4020 D lapic_id -ffffffff831a4080 D lapic_tpr -ffffffff831a40a0 d lapic_ppr -ffffffff831a4100 d lapic_isr -ffffffff831a5000 D warn_once -ffffffff831a6000 d errata -ffffffff831a7000 D cpu_ucode_mtx -ffffffff831a8000 D mem_owner_bios -ffffffff831a8008 D mrops -ffffffff831a8028 D mtrrmask -ffffffff831a8030 D mtrrtomrt -ffffffff831a9000 D pmap_pg_wc -ffffffff831a9008 D pmaps_lock -ffffffff831a9018 d pmap_maxkvaddr -ffffffff831aa000 D kv_physwait -ffffffff831ab000 D fpu_save_len -ffffffff831ac000 D i8259_pic -ffffffff831ad000 D softintr_pic -ffffffff831ae000 D ipifunc -ffffffff831af000 D setperf_mp_mutex -ffffffff831b0000 D db_Grp6 -ffffffff831b0040 D db_Grp7 -ffffffff831b0100 D db_Grp8 -ffffffff831b0140 D db_Grp9 -ffffffff831b0200 D db_GrpA -ffffffff831b0240 D db_GrpB -ffffffff831b0280 D db_GrpC -ffffffff831b02c0 D db_inst_0f0x -ffffffff831b0440 D db_inst_0f2x -ffffffff831b05c0 D db_inst_0f3x -ffffffff831b0740 D db_inst_0f8x -ffffffff831b08c0 D db_inst_0f9x -ffffffff831b0a40 D db_inst_0fax -ffffffff831b0bc0 D db_inst_0fbx -ffffffff831b0d40 D db_inst_0fcx -ffffffff831b0ec0 D db_inst_0f -ffffffff831b0f40 D db_Esc92 -ffffffff831b0f80 D db_Esc94 -ffffffff831b0fc0 D db_Esc95 -ffffffff831b1000 D db_Esc96 -ffffffff831b1040 D db_Esc97 -ffffffff831b1080 D db_Esca5 -ffffffff831b10c0 D db_Escb4 -ffffffff831b1100 D db_Esce3 -ffffffff831b1140 D db_Escf4 -ffffffff831b1180 D db_Esc8 -ffffffff831b1240 D db_Esc9 -ffffffff831b1300 D db_Esca -ffffffff831b13c0 D db_Escb -ffffffff831b1480 D db_Escc -ffffffff831b1540 D db_Escd -ffffffff831b1600 D db_Esce -ffffffff831b16c0 D db_Escf -ffffffff831b1780 D db_Esc_inst -ffffffff831b17c0 D db_Grp1 -ffffffff831b1800 D db_Grp2 -ffffffff831b1840 D db_Grp3 -ffffffff831b1900 D db_Grp4 -ffffffff831b19c0 D db_Grp5 -ffffffff831b1a80 D db_inst_table -ffffffff831b3280 D db_bad_inst -ffffffff831b32a0 D db_index_reg_16 -ffffffff831b32e0 D db_reg -ffffffff831b34e0 D db_seg_reg -ffffffff831b3520 D db_lengths -ffffffff831b4000 D db_regs -ffffffff831b41e0 D db_eregs -ffffffff831b41f0 D db_reg_args -ffffffff831b5000 D timer_mutex -ffffffff831b5010 d i8254_timecounter -ffffffff831b6000 D spleen8x16 -ffffffff831b6058 D spleen12x24 -ffffffff831b60b0 D spleen16x32 -ffffffff831b6108 D spleen32x64 -ffffffff831b6160 d builtin_fonts -ffffffff831b61e0 d wsfont_add.cookiegen -ffffffff831b61f0 d spleen8x16_data -ffffffff831b6ff0 d spleen12x24_data -ffffffff831b99f0 d spleen16x32_data -ffffffff831bd1f0 d spleen32x64_data -ffffffff831cc000 D nsphy_cd -ffffffff831cd000 D nsphyter_cd -ffffffff831ce000 D gentbi_cd -ffffffff831cf000 D qsphy_cd -ffffffff831d0000 D inphy_cd -ffffffff831d1000 D iophy_cd -ffffffff831d2000 D eephy_cd -ffffffff831d3000 D exphy_cd -ffffffff831d4000 D rlphy_cd -ffffffff831d5000 D lxtphy_cd -ffffffff831d6000 D luphy_cd -ffffffff831d7000 D mtdphy_cd -ffffffff831d8000 D icsphy_cd -ffffffff831d9000 D sqphy_cd -ffffffff831da000 D tqphy_cd -ffffffff831db000 D ukphy_cd -ffffffff831dc000 D dcphy_cd -ffffffff831dd000 D bmtphy_cd -ffffffff831de000 D brgphy_cd -ffffffff831df000 D xmphy_cd -ffffffff831e0000 D amphy_cd -ffffffff831e1000 D acphy_cd -ffffffff831e2000 D nsgphy_cd -ffffffff831e3000 D urlphy_cd -ffffffff831e4000 D rgephy_cd -ffffffff831e5000 D ciphy_cd -ffffffff831e6000 D ipgphy_cd -ffffffff831e7000 D etphy_cd -ffffffff831e8000 D jmphy_cd -ffffffff831e9000 D atphy_cd -ffffffff831ea000 D scsi_autoconf -ffffffff831ea008 D scsibus_cd -ffffffff831eb000 D cd_cd -ffffffff831ec000 D ch_cd -ffffffff831ec020 D chquirks -ffffffff831ed000 D sd_cd -ffffffff831ee000 D st_cd -ffffffff831ef000 D uk_cd -ffffffff831f0000 D safte_cd -ffffffff831f1000 D ses_cd -ffffffff831f2000 D sym_cd -ffffffff831f2020 D sym_devices -ffffffff831f2070 D asym_devices -ffffffff831f3000 D rdac_cd -ffffffff831f3020 D rdac_devices -ffffffff831f4000 D emc_cd -ffffffff831f4020 D emc_devices -ffffffff831f5000 D hds_cd -ffffffff831f5020 D hds_devices -ffffffff831f6000 D atapiscsi_cd -ffffffff831f7000 D wd_cd -ffffffff831f7020 d wddumpmulti -ffffffff831f8000 D mainbus_cd -ffffffff831f8020 D mba_iba -ffffffff831f9000 D bios_cd -ffffffff831f9020 D smbios_uninfo -ffffffff831fa000 D mpbios_cd -ffffffff831fa020 d mp_conf -ffffffff831fa070 d extint_bus -ffffffff831fa0a0 d smi_bus -ffffffff831fa0d0 d nmi_bus -ffffffff831fb000 D cpu_info_full_primary -ffffffff831fe000 D cpu_info_list -ffffffff831fe008 D mp_cpu_funcs -ffffffff831fe020 D cpu_cd -ffffffff831fe040 D cpu_info -ffffffff831ff000 D local_pic -ffffffff831ff090 D lapic_readreg -ffffffff831ff098 D lapic_writereg -ffffffff831ff0a0 D x86_ipi -ffffffff83200000 D ioapic_cold -ffffffff83200008 D ioapic_cd -ffffffff83201000 D efifb_std_descr -ffffffff83201030 D efifb_descrs -ffffffff83201038 D efifb_accessops -ffffffff83201098 D efifb_cd -ffffffff83202000 D pvbus_cd -ffffffff83202020 D pvbus_types -ffffffff832020e0 D pvbus_dma_tag -ffffffff83203000 D pvclock_cd -ffffffff83203020 D pvclock_timecounter -ffffffff83204000 D vmt_tclo_rpc -ffffffff832040d0 D vmt_cd -ffffffff83205000 D xen_cd -ffffffff83205020 D xen_bus_dma_tag -ffffffff83206000 D xnf_cd -ffffffff83207000 D xbf_cd -ffffffff83208000 D hv_msg_dispatch -ffffffff83208110 D hv_timecounter -ffffffff83208160 D hyperv_cd -ffffffff83209000 d hv_ic_devs -ffffffff8320a000 D hvn_cd -ffffffff8320b000 D hvs_cd -ffffffff8320c000 D virtio_cd -ffffffff8320d000 D vio_cd -ffffffff8320e000 D vioblk_cd -ffffffff8320f000 D viomb_cd -ffffffff83210000 D viornd_cd -ffffffff83211000 D vioscsi_cd -ffffffff83212000 D vmmci_cd -ffffffff83213000 D pci_cd -ffffffff83214000 D arc_fw_hdr -ffffffff83214008 D arc_cd -ffffffff83215000 D jmb_cd -ffffffff83216000 D mfii_cd -ffffffff83217000 D ips_cd -ffffffff83218000 D eap_cd -ffffffff83219000 D auacer_cd -ffffffff8321a000 D auich_cd -ffffffff8321b000 D azalia_cd -ffffffff8321c000 D envy_cd -ffffffff8321c020 D envy_matchids -ffffffff8321c030 D envy_rates -ffffffff8321c0b0 D ak4524_dac -ffffffff8321c0d8 D ak4524_adc -ffffffff8321c100 D ak4358_dac -ffffffff8321c128 D ak5365_adc -ffffffff8321c150 D unkenvy_codec -ffffffff8321c180 D envy_cards -ffffffff8321c3f0 D envy_cards_ht -ffffffff8321c600 d julia_eeprom -ffffffff8321d000 D emu_cd -ffffffff8321e000 D auixp_cd -ffffffff8321f000 D clcs_cd -ffffffff83220000 D yds_cd -ffffffff83221000 D auvia_cd -ffffffff83222000 D qle_cd -ffffffff83223000 D mpii_cd -ffffffff83224000 D aq_cd -ffffffff83225000 D de_cd -ffffffff83226000 D pcn_cd -ffffffff83227000 D wdc_sii3114_vtbl -ffffffff83227038 D wdc_pdc203xx_vtbl -ffffffff83227070 D wdc_svwsata_vtbl -ffffffff832270a8 D pciide_cd -ffffffff832270d0 d sis_hostbr_type -ffffffff83228000 D ppb_cd -ffffffff83229000 D vr_cd -ffffffff83229020 D vr_devices -ffffffff8322a000 D txp_cd -ffffffff8322b000 D bt848_card_signature -ffffffff8322c000 D bktr_cd -ffffffff8322d000 D em_cd -ffffffff8322e000 D ixgb_cd -ffffffff8322f000 D ix_cd -ffffffff8322f020 D ixgbe_smart_speed -ffffffff8322f024 D ixgbe_enable_msix -ffffffff83230000 D ixl_cd -ffffffff83230020 d ixl_sff_lock -ffffffff83231000 D xge_cd -ffffffff83232000 D thtc_cd -ffffffff83232020 D tht_cd -ffffffff83232040 D tht_txt_desc -ffffffff83232068 D tht_rxf_desc -ffffffff83232090 D tht_rxd_desc -ffffffff832320b8 D tht_txf_desc -ffffffff83233000 D myx_cd -ffffffff83234000 D oce_cd -ffffffff83235000 D dc_devs -ffffffff83236000 D cas_cd -ffffffff83237000 D sis_cd -ffffffff83238000 D se_cd -ffffffff83239000 D mbg_cd -ffffffff8323a000 D cbb_cd -ffffffff8323a020 D yc_chipsets -ffffffff8323a1b0 d pccbb_funcs -ffffffff8323a1e0 d pccbb_pcmcia_funcs -ffffffff8323b000 D skc_cd -ffffffff8323b020 D sk_cd -ffffffff8323c000 D mskc_cd -ffffffff8323c020 D msk_cd -ffffffff8323d000 D puc_cd -ffffffff8323e000 D puc_ndevs -ffffffff8323f000 D iwi_cd -ffffffff83240000 D wpi_cd -ffffffff83241000 D iwn_cd -ffffffff83242000 D iwm_cd -ffffffff83243000 D iwx_cd -ffffffff83244000 D cmpci_cd -ffffffff83245000 D iha_cd -ffffffff83246000 D pcscp_cd -ffffffff83246020 D pcscp_glue -ffffffff83247000 D bge_cd -ffffffff83248000 D bnx_firmwares -ffffffff83248160 D bnx_rv2ps -ffffffff832481c0 D bnx_cd -ffffffff832481e0 d flash_5709 -ffffffff83248210 d flash_table -ffffffff83249000 D vge_cd -ffffffff8324a000 D stge_cd -ffffffff8324b000 D nfe_cd -ffffffff8324c000 D et_cd -ffffffff8324d000 D jme_cd -ffffffff8324e000 D age_cd -ffffffff8324f000 D alc_dma_burst -ffffffff8324f020 D alc_cd -ffffffff83250000 D ale_cd -ffffffff83251000 D amdpm_cd -ffffffff83251020 d amdpm_timecounter -ffffffff83252000 D bce_cd -ffffffff83253000 D rtwn_cd -ffffffff83254000 d ral_rt2560_opns -ffffffff83254028 d ral_rt2661_opns -ffffffff83254050 d ral_rt2860_opns -ffffffff83255000 D piixpm_cd -ffffffff83256000 D vic_cd -ffffffff83257000 D vmx_cd -ffffffff83258000 D vmwpvs_cd -ffffffff83259000 D lii_cd -ffffffff8325a000 D ichiic_cd -ffffffff8325b000 D viapm_cd -ffffffff8325b020 d viapm_timecounter -ffffffff8325c000 D amdiic_cd -ffffffff8325d000 D nviic_cd -ffffffff8325e000 D kate_cd -ffffffff8325f000 D km_cd -ffffffff83260000 D cpu_model_offsets -ffffffff83260070 D ksmn_cd -ffffffff83261000 D itherm_cd -ffffffff83262000 D pchtemp_cd -ffffffff83263000 D xspd_cd -ffffffff83264000 D virtio_pci_ops -ffffffff83265000 D bwfm_pci_buscore_ops -ffffffff83265030 D bwfm_pci_bus_ops -ffffffff83265058 D bwfm_pci_msgbuf_ops -ffffffff83266000 D bnxt_cd -ffffffff83267000 D mcx_cd -ffffffff83268000 D iavf_cd -ffffffff83269000 D rge_cd -ffffffff8326a000 D igc_cd -ffffffff8326b000 D ngbe_cd -ffffffff8326c000 D agp_cd -ffffffff8326d000 D intagp_cd -ffffffff8326d020 D agp_i810_methods -ffffffff8326e000 D reservation_ww_class -ffffffff8326f000 d bridge_lock -ffffffff8326f010 d bridge_list -ffffffff83270000 d drm_connector_enum_list -ffffffff832701f8 d connector_list_lock -ffffffff83270208 d connector_list -ffffffff83271000 d kernel_fb_helper_list -ffffffff83271010 d kernel_fb_helper_lock -ffffffff83272000 D drm_global_mutex -ffffffff83273000 D i2c_bit_algo -ffffffff83273010 d drm_fence_context_count -ffffffff83273018 d dma_fence_stub_mtx -ffffffff83273028 D wait_bit_mtx -ffffffff83273038 D shrinkers -ffffffff83274000 d crtc_ww_class -ffffffff83275000 d panel_lock -ffffffff83275010 d panel_list -ffffffff83276000 d ttm_global_mutex -ffffffff83277000 D intel_bbops -ffffffff83278000 d i915_sys_placement -ffffffff83278020 d i915_ttm_bo_driver -ffffffff83279000 d mchdev_lock -ffffffff8327a000 D inteldrm_stdscreen -ffffffff8327a030 D inteldrm_scrlist -ffffffff8327a038 D inteldrm_screenlist -ffffffff8327a048 D inteldrm_accessops -ffffffff8327a0a8 D inteldrm_cd -ffffffff8327b000 d capture_mutex -ffffffff8327c000 d mitigations -ffffffff8327d000 D i915_modparams -ffffffff8327e000 d schedule_lock -ffffffff8327f000 d unbind_fence_ops -ffffffff83280000 D intel_graphics_stolen_res -ffffffff83281000 D btc_valid_sclk -ffffffff83282000 d evergreen_cs_packet_parse_vline.vline_start_end -ffffffff83282020 d evergreen_cs_packet_parse_vline.vline_status -ffffffff83283000 d r600_cs_packet_parse_vline.vline_start_end -ffffffff83283008 d r600_cs_packet_parse_vline.vline_status -ffffffff83284000 d r100_asic -ffffffff832842e0 d r200_asic -ffffffff832845c0 d r300_asic_pcie -ffffffff832848a0 d r300_asic -ffffffff83284b80 d r420_asic -ffffffff83284e60 d rs400_asic -ffffffff83285140 d rs600_asic -ffffffff83285420 d rs690_asic -ffffffff83285700 d rv515_asic -ffffffff832859e0 d r520_asic -ffffffff83285cc0 d r600_asic -ffffffff83285fa0 d rv6xx_asic -ffffffff83286280 d rs780_asic -ffffffff83286560 d rv770_asic -ffffffff83286840 d evergreen_asic -ffffffff83286b20 d sumo_asic -ffffffff83286e00 d btc_asic -ffffffff832870e0 d cayman_asic -ffffffff832873c0 d trinity_asic -ffffffff832876a0 d si_asic -ffffffff83287980 d ci_asic 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ioapic_cd +ffffffff83202000 D efifb_std_descr +ffffffff83202030 D efifb_descrs +ffffffff83202038 D efifb_accessops +ffffffff83202098 D efifb_cd +ffffffff83203000 D pvbus_cd +ffffffff83203020 D pvbus_types +ffffffff832030e0 D pvbus_dma_tag +ffffffff83204000 D pvclock_cd +ffffffff83204020 D pvclock_timecounter +ffffffff83205000 D vmt_tclo_rpc +ffffffff832050d0 D vmt_cd +ffffffff83206000 D xen_cd +ffffffff83206020 D xen_bus_dma_tag +ffffffff83207000 D xnf_cd +ffffffff83208000 D xbf_cd +ffffffff83209000 D hv_msg_dispatch +ffffffff83209110 D hv_timecounter +ffffffff83209160 D hyperv_cd +ffffffff8320a000 d hv_ic_devs +ffffffff8320b000 D hvn_cd +ffffffff8320c000 D hvs_cd +ffffffff8320d000 D virtio_cd +ffffffff8320e000 D vio_cd +ffffffff8320f000 D vioblk_cd +ffffffff83210000 D viomb_cd +ffffffff83211000 D viornd_cd +ffffffff83212000 D vioscsi_cd +ffffffff83213000 D vmmci_cd +ffffffff83214000 D pci_cd +ffffffff83215000 D arc_fw_hdr +ffffffff83215008 D arc_cd +ffffffff83216000 D jmb_cd +ffffffff83217000 D mfii_cd +ffffffff83218000 D ips_cd +ffffffff83219000 D eap_cd +ffffffff8321a000 D auacer_cd +ffffffff8321b000 D auich_cd +ffffffff8321c000 D azalia_cd +ffffffff8321d000 D envy_cd +ffffffff8321d020 D envy_matchids +ffffffff8321d030 D envy_rates +ffffffff8321d0b0 D ak4524_dac +ffffffff8321d0d8 D ak4524_adc +ffffffff8321d100 D ak4358_dac +ffffffff8321d128 D ak5365_adc +ffffffff8321d150 D unkenvy_codec +ffffffff8321d180 D envy_cards +ffffffff8321d3f0 D envy_cards_ht +ffffffff8321d600 d julia_eeprom +ffffffff8321e000 D emu_cd +ffffffff8321f000 D auixp_cd +ffffffff83220000 D clcs_cd +ffffffff83221000 D yds_cd +ffffffff83222000 D auvia_cd +ffffffff83223000 D qle_cd +ffffffff83224000 D mpii_cd +ffffffff83225000 D aq_cd +ffffffff83226000 D de_cd +ffffffff83227000 D pcn_cd +ffffffff83228000 D wdc_sii3114_vtbl +ffffffff83228038 D wdc_pdc203xx_vtbl +ffffffff83228070 D wdc_svwsata_vtbl +ffffffff832280a8 D pciide_cd +ffffffff832280d0 d sis_hostbr_type +ffffffff83229000 D ppb_cd +ffffffff8322a000 D vr_cd +ffffffff8322a020 D vr_devices +ffffffff8322b000 D txp_cd +ffffffff8322c000 D bt848_card_signature +ffffffff8322d000 D bktr_cd +ffffffff8322e000 D em_cd +ffffffff8322f000 D ixgb_cd +ffffffff83230000 D ix_cd +ffffffff83230020 D ixgbe_smart_speed +ffffffff83230024 D ixgbe_enable_msix +ffffffff83231000 D ixl_cd +ffffffff83231020 d ixl_sff_lock +ffffffff83232000 D xge_cd +ffffffff83233000 D thtc_cd +ffffffff83233020 D tht_cd +ffffffff83233040 D tht_txt_desc +ffffffff83233068 D tht_rxf_desc +ffffffff83233090 D tht_rxd_desc +ffffffff832330b8 D tht_txf_desc +ffffffff83234000 D myx_cd +ffffffff83235000 D oce_cd +ffffffff83236000 D dc_devs +ffffffff83237000 D cas_cd +ffffffff83238000 D sis_cd +ffffffff83239000 D se_cd +ffffffff8323a000 D mbg_cd +ffffffff8323b000 D cbb_cd +ffffffff8323b020 D yc_chipsets +ffffffff8323b1b0 d pccbb_funcs +ffffffff8323b1e0 d pccbb_pcmcia_funcs +ffffffff8323c000 D skc_cd +ffffffff8323c020 D sk_cd +ffffffff8323d000 D mskc_cd +ffffffff8323d020 D msk_cd +ffffffff8323e000 D puc_cd +ffffffff8323f000 D puc_ndevs +ffffffff83240000 D iwi_cd +ffffffff83241000 D wpi_cd +ffffffff83242000 D iwn_cd +ffffffff83243000 D iwm_cd +ffffffff83244000 D iwx_cd +ffffffff83245000 D cmpci_cd +ffffffff83246000 D iha_cd +ffffffff83247000 D pcscp_cd +ffffffff83247020 D pcscp_glue +ffffffff83248000 D bge_cd +ffffffff83249000 D bnx_firmwares +ffffffff83249160 D bnx_rv2ps +ffffffff832491c0 D bnx_cd +ffffffff832491e0 d flash_5709 +ffffffff83249210 d flash_table +ffffffff8324a000 D vge_cd +ffffffff8324b000 D stge_cd +ffffffff8324c000 D nfe_cd +ffffffff8324d000 D et_cd +ffffffff8324e000 D jme_cd +ffffffff8324f000 D age_cd +ffffffff83250000 D alc_dma_burst +ffffffff83250020 D alc_cd +ffffffff83251000 D ale_cd +ffffffff83252000 D amdpm_cd +ffffffff83252020 d amdpm_timecounter +ffffffff83253000 D bce_cd +ffffffff83254000 D rtwn_cd +ffffffff83255000 d ral_rt2560_opns +ffffffff83255028 d ral_rt2661_opns +ffffffff83255050 d ral_rt2860_opns +ffffffff83256000 D piixpm_cd +ffffffff83257000 D vic_cd +ffffffff83258000 D vmx_cd +ffffffff83259000 D vmwpvs_cd +ffffffff8325a000 D lii_cd +ffffffff8325b000 D ichiic_cd +ffffffff8325c000 D viapm_cd +ffffffff8325c020 d viapm_timecounter +ffffffff8325d000 D amdiic_cd +ffffffff8325e000 D nviic_cd +ffffffff8325f000 D kate_cd +ffffffff83260000 D km_cd +ffffffff83261000 D cpu_model_offsets +ffffffff83261070 D ksmn_cd +ffffffff83262000 D itherm_cd +ffffffff83263000 D pchtemp_cd +ffffffff83264000 D xspd_cd +ffffffff83265000 D virtio_pci_ops +ffffffff83266000 D bwfm_pci_buscore_ops +ffffffff83266030 D bwfm_pci_bus_ops +ffffffff83266058 D bwfm_pci_msgbuf_ops +ffffffff83267000 D bnxt_cd +ffffffff83268000 D mcx_cd +ffffffff83269000 D iavf_cd +ffffffff8326a000 D rge_cd +ffffffff8326b000 D igc_cd +ffffffff8326c000 D ngbe_cd +ffffffff8326d000 D agp_cd +ffffffff8326e000 D intagp_cd +ffffffff8326e020 D agp_i810_methods +ffffffff8326f000 D reservation_ww_class +ffffffff83270000 d bridge_lock +ffffffff83270010 d bridge_list +ffffffff83271000 d drm_connector_enum_list +ffffffff832711f8 d connector_list_lock +ffffffff83271208 d connector_list +ffffffff83272000 d kernel_fb_helper_list +ffffffff83272010 d kernel_fb_helper_lock +ffffffff83273000 D drm_global_mutex +ffffffff83274000 D i2c_bit_algo +ffffffff83274010 d drm_fence_context_count +ffffffff83274018 d dma_fence_stub_mtx +ffffffff83274028 D wait_bit_mtx +ffffffff83274038 D shrinkers +ffffffff83275000 d crtc_ww_class +ffffffff83276000 d panel_lock +ffffffff83276010 d panel_list +ffffffff83277000 d ttm_global_mutex +ffffffff83278000 D intel_bbops +ffffffff83279000 d i915_sys_placement +ffffffff83279020 d i915_ttm_bo_driver +ffffffff8327a000 d mchdev_lock +ffffffff8327b000 D inteldrm_stdscreen +ffffffff8327b030 D inteldrm_scrlist +ffffffff8327b038 D inteldrm_screenlist +ffffffff8327b048 D inteldrm_accessops +ffffffff8327b0a8 D inteldrm_cd +ffffffff8327c000 d capture_mutex +ffffffff8327d000 d mitigations +ffffffff8327e000 D i915_modparams +ffffffff8327f000 d schedule_lock +ffffffff83280000 d unbind_fence_ops +ffffffff83281000 D intel_graphics_stolen_res +ffffffff83282000 D btc_valid_sclk +ffffffff83283000 d evergreen_cs_packet_parse_vline.vline_start_end +ffffffff83283020 d evergreen_cs_packet_parse_vline.vline_status +ffffffff83284000 d r600_cs_packet_parse_vline.vline_start_end +ffffffff83284008 d r600_cs_packet_parse_vline.vline_status +ffffffff83285000 d r100_asic +ffffffff832852e0 d r200_asic +ffffffff832855c0 d r300_asic_pcie +ffffffff832858a0 d r300_asic +ffffffff83285b80 d r420_asic +ffffffff83285e60 d rs400_asic +ffffffff83286140 d rs600_asic +ffffffff83286420 d rs690_asic +ffffffff83286700 d rv515_asic +ffffffff832869e0 d r520_asic +ffffffff83286cc0 d r600_asic +ffffffff83286fa0 d rv6xx_asic +ffffffff83287280 d rs780_asic +ffffffff83287560 d rv770_asic +ffffffff83287840 d evergreen_asic +ffffffff83287b20 d sumo_asic +ffffffff83287e00 d btc_asic +ffffffff832880e0 d cayman_asic +ffffffff832883c0 d trinity_asic +ffffffff832886a0 d si_asic +ffffffff83288980 d ci_asic +ffffffff83288c60 d kv_asic +ffffffff83289000 d dce6_funcs +ffffffff83289018 d dce6_hdmi_funcs +ffffffff83289088 d dce6_dp_funcs +ffffffff832890f8 d dce4_funcs +ffffffff83289110 d dce4_hdmi_funcs +ffffffff83289180 d dce4_dp_funcs +ffffffff832891f0 d dce32_funcs +ffffffff83289208 d dce32_hdmi_funcs +ffffffff83289278 d dce32_dp_funcs +ffffffff832892e8 d r600_funcs +ffffffff83289300 d r600_hdmi_funcs +ffffffff8328a000 D radeon_modeset +ffffffff8328a004 D radeon_dynclks +ffffffff8328a008 D radeon_agpmode +ffffffff8328a00c D radeon_gart_size +ffffffff8328a010 D radeon_tv +ffffffff8328a014 D radeon_audio +ffffffff8328a018 D radeon_pcie_gen2 +ffffffff8328a01c D radeon_msi +ffffffff8328a020 D radeon_lockup_timeout +ffffffff8328a024 D radeon_dpm +ffffffff8328a028 D radeon_aspm +ffffffff8328a02c D radeon_runtime_pm +ffffffff8328a030 D radeon_vm_size +ffffffff8328a034 D radeon_vm_block_size +ffffffff8328a038 D radeon_use_pflipirq +ffffffff8328a03c D radeon_bapm +ffffffff8328a040 D radeon_backlight +ffffffff8328a044 D radeon_auxch +ffffffff8328a048 D radeon_uvd +ffffffff8328a04c D radeon_vce +ffffffff8328a050 D radeon_si_support +ffffffff8328a054 D radeon_cik_support +ffffffff8328a058 D radeondrm_cd +ffffffff8328a078 D radeondrm_stdscreen +ffffffff8328a0a8 D radeondrm_scrlist +ffffffff8328a0b0 D radeondrm_screenlist +ffffffff8328a0c0 D radeondrm_accessops +ffffffff8328b000 D radeon_bbops +ffffffff8328c000 d radeon_bo_driver +ffffffff8328d000 d verde_pg_init +ffffffff8328e000 d cac_weights_pitcairn +ffffffff8328e4d0 d cac_weights_oland +ffffffff8328f000 d aldebaran_mode2_handler +ffffffff83290000 d amdgpu_vbios_version_attrs +ffffffff83291000 D amdgpu_asic_name +ffffffff83292000 D amdgpu_gart_size +ffffffff83292004 D amdgpu_gtt_size +ffffffff83292008 D amdgpu_moverate +ffffffff8329200c D amdgpu_audio +ffffffff83292010 D amdgpu_pcie_gen2 +ffffffff83292014 D amdgpu_msi +ffffffff83292018 D amdgpu_dpm +ffffffff8329201c D amdgpu_fw_load_type +ffffffff83292020 D amdgpu_aspm +ffffffff83292024 D amdgpu_runtime_pm +ffffffff83292028 D amdgpu_ip_block_mask +ffffffff8329202c D amdgpu_bapm +ffffffff83292030 D amdgpu_vm_size +ffffffff83292034 D amdgpu_vm_fragment_size +ffffffff83292038 D amdgpu_vm_block_size +ffffffff8329203c D amdgpu_vm_update_mode +ffffffff83292040 D amdgpu_dc +ffffffff83292044 D amdgpu_sched_jobs +ffffffff83292048 D amdgpu_sched_hw_submission +ffffffff83292050 D amdgpu_cg_mask +ffffffff83292058 D amdgpu_pg_mask +ffffffff8329205c D amdgpu_sdma_phase_quantum +ffffffff83292060 D amdgpu_pp_feature_mask +ffffffff83292064 D amdgpu_lbpw +ffffffff83292068 D amdgpu_compute_multipipe +ffffffff8329206c D amdgpu_gpu_recovery +ffffffff83292070 D amdgpu_smu_pptable_id +ffffffff83292074 D amdgpu_dc_feature_mask +ffffffff83292078 D amdgpu_async_gfx_ring +ffffffff8329207c D amdgpu_discovery +ffffffff83292080 D amdgpu_noretry +ffffffff83292084 D amdgpu_force_asic_type +ffffffff83292088 D amdgpu_tmz +ffffffff8329208c D amdgpu_reset_method +ffffffff83292090 D amdgpu_num_kcq +ffffffff83292094 D amdgpu_use_xgmi_p2p +ffffffff83292098 D amdgpu_sg_display +ffffffff832920a0 D mgpu_info +ffffffff83292250 D amdgpu_ras_enable +ffffffff83292254 D amdgpu_ras_mask +ffffffff83292258 D amdgpu_bad_page_threshold +ffffffff8329225c D amdgpu_backlight +ffffffff83292260 D amdgpu_cd +ffffffff83292280 D amdgpu_stdscreen +ffffffff832922b0 D amdgpu_scrlist +ffffffff832922b8 D amdgpu_screenlist +ffffffff832922c8 D amdgpu_accessops +ffffffff83293000 d amdgpu_gtt_mgr_attributes +ffffffff83294000 D amdgpu_bbops +ffffffff83295000 D soc15_ih_clientid_name +ffffffff83296000 D ras_error_string +ffffffff83296030 D ras_block_string +ffffffff832960c0 D ras_mca_block_string +ffffffff83297000 d amdgpu_bo_driver +ffffffff83298000 d amdgpu_vram_mgr_attributes +ffffffff83299000 D amdgpu_xgmi_hive_type +ffffffff83299008 d xgmi_mutex +ffffffff83299018 D xgmi_ras_hw_ops +ffffffff83299058 D xgmi_ras +ffffffff8329a000 d gfx_v9_0_ras +ffffffff8329b000 D gfx_v9_4_ras +ffffffff8329c000 D gfx_v9_4_2_ras_ops +ffffffff8329c040 D gfx_v9_4_2_ras +ffffffff8329d000 D hdp_v4_0_ras_hw_ops +ffffffff8329d040 D hdp_v4_0_ras +ffffffff8329e000 d jpeg_v2_6_ras +ffffffff8329f000 D mca_v3_0_mp0_ras +ffffffff8329f058 D mca_v3_0_mp1_ras +ffffffff8329f0b0 D mca_v3_0_mpio_ras +ffffffff832a0000 D mmhub_v1_0_ras_hw_ops +ffffffff832a0040 D mmhub_v1_0_ras +ffffffff832a1000 D mmhub_v1_7_ras_hw_ops +ffffffff832a1040 D mmhub_v1_7_ras +ffffffff832a2000 D mmhub_v9_4_ras +ffffffff832a3000 D nbio_v7_4_ras +ffffffff832a4000 d sriov_sc_video_codecs_encode +ffffffff832a4010 d sriov_sc_video_codecs_decode +ffffffff832a4020 d sriov_sc_video_codecs_encode_array +ffffffff832a4050 d sriov_sc_video_codecs_decode_array +ffffffff832a5000 d sdma_v4_0_ras +ffffffff832a6000 D sdma_v4_4_ras +ffffffff832a7000 d sienna_cichlid_mode2_handler +ffffffff832a8000 D umc_v6_1_ras +ffffffff832a9000 D umc_v6_7_ras +ffffffff832aa000 D umc_v8_10_ras +ffffffff832ab000 D umc_v8_7_ras +ffffffff832ac000 d vcn_v2_6_ras +ffffffff832ad000 d amdgpu_dm_mode_config_helperfuncs +ffffffff832ad010 d dm_atomic_state_funcs +ffffffff832ae000 d construct_integrated_info.result +ffffffff832ae004 d bios_parser_get_firmware_info.result +ffffffff832af000 d dce_funcs +ffffffff832b0000 d dce110_funcs +ffffffff832b1000 d dce112_funcs +ffffffff832b2000 d dce120_funcs +ffffffff832b3000 d rv1_clk_funcs +ffffffff832b3088 d rv1_clk_internal_funcs +ffffffff832b4000 d rv2_clk_internal_funcs +ffffffff832b5000 d dcn2_funcs +ffffffff832b6000 D dcn201_funcs +ffffffff832b7000 d dcn21_funcs +ffffffff832b7088 d rn_bw_params +ffffffff832b8000 D dcn3_fpga_funcs +ffffffff832b8088 d dcn3_funcs +ffffffff832b9000 d vg_funcs +ffffffff832b9088 d dummy_clocks +ffffffff832b91b8 d vg_bw_params +ffffffff832ba000 d dcn31_funcs +ffffffff832ba088 d dcn31_bw_params +ffffffff832bb000 d dcn314_funcs +ffffffff832bb088 d dcn314_bw_params +ffffffff832bc000 d dcn315_funcs +ffffffff832bc088 d dcn315_bw_params +ffffffff832bd000 d dcn316_funcs +ffffffff832bd088 d dcn316_bw_params +ffffffff832be000 d dcn32_funcs +ffffffff832bf000 d dcn10_dpp_cap +ffffffff832c0000 D aperture_default_system +ffffffff832c1000 d dcn20_dpp_funcs +ffffffff832c1110 d dcn20_dpp_cap +ffffffff832c2000 d dcn20_hubp_funcs +ffffffff832c3000 d dcn20_opp_funcs +ffffffff832c4000 d dcn20_tg_funcs +ffffffff832c5000 d dcn201_dpp_funcs +ffffffff832c5110 d dcn201_dpp_cap +ffffffff832c6000 d dcn201_hubp_funcs +ffffffff832c7000 d dcn201_opp_funcs +ffffffff832c8000 d dcn201_tg_funcs +ffffffff832c9000 D dcn201_ip +ffffffff832c91b8 D dcn201_soc +ffffffff832c9b88 d dcn201_res_pool_funcs +ffffffff832ca000 d dcn21_hubp_funcs +ffffffff832cb000 d dcn30_afmt_funcs +ffffffff832cc000 d dcn30_dpp_funcs +ffffffff832cc110 d dcn30_dpp_cap +ffffffff832cd000 d dcn30_hubp_funcs +ffffffff832ce000 d dcn30_tg_funcs +ffffffff832cf000 d dcn30_vpg_funcs +ffffffff832d0000 d res_cap_dcn301 +ffffffff832d0040 d dcn301_res_pool_funcs +ffffffff832d1000 d dcn302_res_pool_funcs +ffffffff832d2000 d dcn303_res_pool_funcs +ffffffff832d3000 d dcn31_afmt_funcs +ffffffff832d4000 d dcn31_apg_funcs +ffffffff832d5000 d dcn31_hpo_dp_link_encoder_funcs +ffffffff832d6000 d dcn31_hubp_funcs +ffffffff832d7000 d dcn31_tg_funcs +ffffffff832d8000 d dcn31_res_pool_funcs +ffffffff832d9000 d dcn31_vpg_funcs +ffffffff832da000 d dcn314_tg_funcs +ffffffff832db000 d dcn314_res_pool_funcs +ffffffff832dc000 d dcn315_res_pool_funcs +ffffffff832dd000 d dcn316_res_pool_funcs +ffffffff832de000 d dcn32_dpp_funcs +ffffffff832de110 d dcn32_dpp_cap +ffffffff832df000 d dcn32_hpo_dp_link_encoder_funcs +ffffffff832e0000 d dcn32_hubp_funcs +ffffffff832e1000 d dcn32_tg_funcs +ffffffff832e2000 d dcn32_res_pool_funcs +ffffffff832e3000 d dcn321_res_pool_funcs +ffffffff832e4000 D dcn1_0_ip +ffffffff832e41b8 D dcn1_0_soc +ffffffff832e5000 D dcn2_0_ip +ffffffff832e51b8 D dcn2_0_nv14_ip +ffffffff832e5370 D dcn2_0_soc +ffffffff832e5d40 D dcn2_0_nv14_soc +ffffffff832e6710 D dcn2_1_ip +ffffffff832e68c8 D dcn2_1_soc +ffffffff832e7298 D ddr4_wm_table_gs +ffffffff832e7358 D lpddr4_wm_table_gs +ffffffff832e7418 D lpddr4_wm_table_with_disabled_ppt +ffffffff832e74d8 D ddr4_wm_table_rn +ffffffff832e7598 D ddr4_1R_wm_table_rn +ffffffff832e7658 D lpddr4_wm_table_rn +ffffffff832e8000 D dcn3_0_ip +ffffffff832e81b8 D dcn3_0_soc +ffffffff832e9000 D dcn3_01_ip +ffffffff832e91b8 D dcn3_01_soc +ffffffff832e9b88 D ddr4_wm_table +ffffffff832e9c48 D lpddr5_wm_table +ffffffff832ea000 D dcn3_02_ip +ffffffff832ea1b8 D dcn3_02_soc +ffffffff832eb000 D dcn3_03_ip +ffffffff832eb1b8 D dcn3_03_soc +ffffffff832ec000 D dcn3_1_ip +ffffffff832ec1b8 D dcn3_15_ip +ffffffff832ec370 D dcn3_16_ip +ffffffff832ec528 d dcn3_15_soc +ffffffff832ecef8 d dcn3_1_soc +ffffffff832ed8c8 d dcn3_16_soc +ffffffff832ef000 D dcn3_14_ip +ffffffff832ef1b8 D dcn3_14_soc +ffffffff832f0000 D dcn3_2_ip +ffffffff832f01b8 D dcn3_2_soc +ffffffff832f1000 D dcn3_21_ip +ffffffff832f11b8 D dcn3_21_soc +ffffffff832f2000 d dsc_policy_max_target_bpp_limit +ffffffff832f3000 D DIDTEDCConfig_P12 +ffffffff832f3070 d smu7_profiling +ffffffff832f4000 d cyan_skillfish_table_map +ffffffff832f4080 d cyan_skillfish_message_map +ffffffff832f5000 d navi10_table_map +ffffffff832f5080 d navi10_pwr_src_map +ffffffff832f5090 d navi10_workload_map +ffffffff832f50d0 d navi10_message_map +ffffffff832f5b20 d navi10_clk_map +ffffffff832f5be0 d navi10_feature_mask_map +ffffffff832f6000 d sienna_cichlid_message_map +ffffffff832f6a50 d sienna_cichlid_table_map +ffffffff832f6ad0 d sienna_cichlid_pwr_src_map +ffffffff832f6ae0 d sienna_cichlid_workload_map +ffffffff832f6b20 d sienna_cichlid_clk_map +ffffffff832f6be0 d sienna_cichlid_feature_mask_map +ffffffff832f7000 d vangogh_message_map +ffffffff832f7a50 d vangogh_table_map +ffffffff832f7ad0 d vangogh_workload_map +ffffffff832f7b10 d vangogh_feature_mask_map +ffffffff832f8000 d renoir_table_map +ffffffff832f8080 d renoir_workload_map +ffffffff832f80c0 d renoir_message_map +ffffffff832f8b10 d renoir_clk_map +ffffffff832f9000 d smu_v13_0_0_message_map +ffffffff832f9a50 d smu_v13_0_0_feature_mask_map +ffffffff832f9e20 d smu_v13_0_0_table_map +ffffffff832f9ea0 d smu_v13_0_0_pwr_src_map +ffffffff832f9eb0 d smu_v13_0_0_workload_map +ffffffff832f9ef0 d smu_v13_0_0_clk_map +ffffffff832fa000 d smu_v13_0_4_message_map +ffffffff832faa50 d smu_v13_0_4_table_map +ffffffff832faad0 d smu_v13_0_4_feature_mask_map +ffffffff832fb000 d smu_v13_0_5_table_map +ffffffff832fb080 d smu_v13_0_5_message_map +ffffffff832fbad0 d smu_v13_0_5_feature_mask_map +ffffffff832fc000 d smu_v13_0_7_message_map +ffffffff832fca50 d smu_v13_0_7_feature_mask_map +ffffffff832fce20 d smu_v13_0_7_table_map +ffffffff832fcea0 d smu_v13_0_7_pwr_src_map +ffffffff832fceb0 d smu_v13_0_7_workload_map +ffffffff832fcef0 d smu_v13_0_7_clk_map +ffffffff832fd000 d yellow_carp_table_map +ffffffff832fd080 d yellow_carp_message_map +ffffffff832fdad0 d yellow_carp_feature_mask_map +ffffffff832fe000 D pci_conf_lock +ffffffff832fe010 D pci_bus_dma_tag +ffffffff832fe088 D msi_pic +ffffffff832fe118 D msix_pic +ffffffff832ff000 D pchb_cd +ffffffff83300000 D amas_cd +ffffffff83301000 D cardslot_cd +ffffffff83302000 D cardbus_cd +ffffffff83303000 d csdevs +ffffffff83304000 d ral_rt2560_opns +ffffffff83304028 d ral_rt2661_opns +ffffffff83304050 d ral_rt2860_opns +ffffffff83305000 D pcmcia_cd +ffffffff83306000 D pcmcia_3cxem556_func0 +ffffffff833060b8 D pcmcia_3cxem556_func0_cfe0 +ffffffff83306158 D pcmcia_megahertz_xjem1144_func0 +ffffffff83306210 D pcmcia_megahertz_xjem1144_func0_cfe0 +ffffffff833062b0 d pcmcia_3cxem556_func1 +ffffffff83306368 d pcmcia_3cxem556_func1_cfe0 +ffffffff83306408 d pcmcia_megahertz_xjem1144_func1 +ffffffff833064c0 d pcmcia_megahertz_xjem1144_func1_cfe0 +ffffffff83306560 d pcmcia_sierra_a555_func1 +ffffffff83306618 d pcmcia_sierra_a555_func1_cfe0 +ffffffff833066b8 d pcmcia_sveclancard_func0 +ffffffff83306770 d pcmcia_sveclancard_func0_cfe0 +ffffffff83307000 D ep_pcmcia_prod +ffffffff83308000 D aic_pcmcia_prod +ffffffff83309000 D com_pcmcia_prod +ffffffff8330a000 D wdc_pcmcia_pr +ffffffff8330b000 D sm_pcmcia_prod +ffffffff8330c000 D xe_cd +ffffffff8330d000 D pcib_cd +ffffffff8330e000 D amdpcib_cd +ffffffff8330f000 D tcpcib_cd +ffffffff83310000 D aapic_cd +ffffffff83311000 D hme_cd +ffffffff83312000 D isa_cd +ffffffff83313000 D isadma_cd +ffffffff83314000 D fdc_cd +ffffffff83315000 D fd_types +ffffffff833151f8 D fd_cd +ffffffff83316000 D mpu_cd +ffffffff83317000 D pcppi_cd +ffffffff83318000 D spkr_cd +ffffffff83319000 D wbsio_cd +ffffffff8331a000 D schsio_cd +ffffffff8331b000 D it_cd +ffffffff8331c000 D uguru_cd +ffffffff8331d000 D aps_cd +ffffffff8331e000 D isa_bus_dma_tag +ffffffff8331f000 D wsdisplay_cd +ffffffff8331f020 D wsdisplay_cons +ffffffff8331f058 D wsdisplay_defaultscreens +ffffffff83320000 D wskbd_cd +ffffffff83320020 D wskbd_default_bell_data +ffffffff83320030 D wskbd_default_keyrepeat_data +ffffffff83320040 D wskbd_srcops +ffffffff83321000 d compose_tab +ffffffff83322000 D wsmouse_cd +ffffffff83322020 D wsmouse_srcops +ffffffff83323000 D wsmux_srcops +ffffffff83323030 D wsmux_tree_lock +ffffffff83324000 D vt100_output +ffffffff83325000 D pckbd_cd +ffffffff83326000 D pms_cd +ffffffff83326020 d synaptics_params +ffffffff83326030 d alps_params +ffffffff83327000 D skgpio_cd +ffffffff83328000 D pctr_conf_lock +ffffffff83329000 D ukbd_keymapdata +ffffffff8332a000 D usbrev_str +ffffffff8332a030 D usb_cd +ffffffff8332b000 d usbd_ratecheck.errinterval +ffffffff8332c000 D uhub_cd +ffffffff8332d000 D uaudio_cd +ffffffff8332e000 D uvideo_ctrls +ffffffff8332e2d8 D uvideo_cd +ffffffff8332f000 D utvfu_norm_params +ffffffff8332f030 D utvfu_cd +ffffffff83330000 D udl_reg_vals_640x480_60 +ffffffff83330020 D udl_reg_vals_640x480_67 +ffffffff83330040 D udl_reg_vals_640x480_72 +ffffffff83330060 D udl_reg_vals_640x480_75 +ffffffff83330080 D udl_reg_vals_800x480_61 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umq_ROLAND_ROLAND_U8_2_fixed_ep_endpoints +ffffffff83333620 d umq_ROLAND_ROLAND_UM2_2_fixed_ep_desc +ffffffff83333640 d umq_ROLAND_ROLAND_UM2_2_fixed_ep_endpoints +ffffffff83333650 d umq_ROLAND_ROLAND_SC8820_2_fixed_ep_desc +ffffffff83333670 d umq_ROLAND_ROLAND_SC8820_2_fixed_ep_endpoints +ffffffff83333680 d umq_ROLAND_ROLAND_PC300_2_fixed_ep_desc +ffffffff833336a0 d umq_ROLAND_ROLAND_PC300_2_fixed_ep_endpoints +ffffffff833336b0 d umq_ROLAND_ROLAND_SK500_2_fixed_ep_desc +ffffffff833336d0 d umq_ROLAND_ROLAND_SK500_2_fixed_ep_endpoints +ffffffff833336e0 d umq_ROLAND_ROLAND_SCD70_2_fixed_ep_desc +ffffffff83333700 d umq_ROLAND_ROLAND_SCD70_2_fixed_ep_endpoints +ffffffff83333710 d umq_ROLAND_ROLAND_UM550_0_fixed_ep_desc +ffffffff83333730 d umq_ROLAND_ROLAND_UM550_0_fixed_ep_endpoints +ffffffff83333740 d umq_ROLAND_ROLAND_SD20_0_fixed_ep_desc +ffffffff83333760 d umq_ROLAND_ROLAND_SD20_0_fixed_ep_endpoints +ffffffff83333770 d umq_ROLAND_ROLAND_SD80_0_fixed_ep_desc +ffffffff83333790 d umq_ROLAND_ROLAND_SD80_0_fixed_ep_endpoints +ffffffff833337a0 d umq_ROLAND_ROLAND_UA700_3_fixed_ep_desc +ffffffff833337c0 d umq_ROLAND_ROLAND_UA700_3_fixed_ep_endpoints +ffffffff833337d0 d umq_ROLAND_ROLAND_UMONE_ANYIFACE_fixed_ep_desc +ffffffff833337f0 d umq_ROLAND_ROLAND_UMONE_ANYIFACE_fixed_ep_endpoints +ffffffff83334000 D ucom_cd +ffffffff83334020 D sysctl_ucomlock +ffffffff83335000 D ugen_cd +ffffffff83336000 D uhidev_cd +ffffffff83336020 d uhidev_use_rdesc.reportbuf +ffffffff83337000 D uhid_cd +ffffffff83338000 D fido_cd +ffffffff83339000 D ujoy_cd +ffffffff8333a000 D ukbd_cd +ffffffff8333b000 D ums_cd +ffffffff8333b020 d ums_fix_elecom_descriptor.match +ffffffff8333c000 D umt_cd +ffffffff8333d000 D def_scale +ffffffff8333d020 D uts_cd +ffffffff8333e000 D ubcmtp_cd +ffffffff8333e020 d ubcmtp_wsmousecfg +ffffffff8333f000 D ucycom_cd +ffffffff83340000 D uslhcom_cd +ffffffff83341000 D ulpt_fwdevs +ffffffff83341060 D ulpt_cd +ffffffff83341080 D ulptusein +ffffffff83342000 D umass_cd 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acpi_getprop.prop_guid +ffffffff833a6070 d acpi_getpropint.prop_guid +ffffffff833a6080 D acpi_skip_hids +ffffffff833a60f0 D acpi_isa_hids +ffffffff833a7000 D aml_intlen +ffffffff833a7010 D aml_table +ffffffff833a7af0 d osstring +ffffffff833a7b10 D aml_defobj +ffffffff833a7ca0 D aml_valid_osi +ffffffff833a7d78 D acpi_max_osi +ffffffff833a7d80 D aml_regionspace +ffffffff833a9000 D acpitimer_cd +ffffffff833a9020 d acpi_timecounter +ffffffff833aa000 D acpiac_cd +ffffffff833aa020 D acpiac_hids +ffffffff833ab000 D acpibat_cd +ffffffff833ab020 D acpibat_hids +ffffffff833ac000 D acpibtn_cd +ffffffff833ac020 D acpibtn_hids +ffffffff833ad000 D acpicmos_cd +ffffffff833ad020 D acpicmos_hids +ffffffff833ae000 D acpicpu_cd +ffffffff833ae020 D acpicpu_hids +ffffffff833ae030 d acpicpu_set_pdc.cpu_oscuuid +ffffffff833af000 D acpihpet_cd +ffffffff833af020 d hpet_timecounter +ffffffff833b0000 D acpiec_cd +ffffffff833b0020 D acpiec_hids +ffffffff833b1000 D acpitz_cd +ffffffff833b1020 D acpitz_perflevel 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chvgpio_hids +ffffffff833c4000 D glkgpio_cd +ffffffff833c4020 D glkgpio_hids +ffffffff833c5000 D pchgpio_cd +ffffffff833c5020 D pchgpio_hids +ffffffff833c5080 D pchgpio_devices +ffffffff833c6000 D tipmic_cd +ffffffff833c6020 D tipmic_thermal_regmap +ffffffff833c6030 D tipmic_power_regmap +ffffffff833c7000 D ccpmic_cd +ffffffff833c7020 D ccpmic_thermal_regmap +ffffffff833c7023 D ccpmic_power_regmap +ffffffff833c8000 D com_hids +ffffffff833c9000 D sdhc_hids +ffffffff833ca000 D dwiic_hids +ffffffff833ca050 D ihidev_hids +ffffffff833ca070 D ietp_hids +ffffffff833ca220 D iatp_hids +ffffffff833ca240 d dwiic_acpi_found_ihidev.i2c_hid_guid +ffffffff833cb000 D acpicbkbd_cd +ffffffff833cb020 D acpicbkbd_hids +ffffffff833cc000 D acpials_cd +ffffffff833cc020 D acpials_hids +ffffffff833cd000 D tpm_cd +ffffffff833cd020 D tpm_hids +ffffffff833ce000 D acpihve_cd +ffffffff833cf000 D acpisbs_cd +ffffffff833cf020 D acpisbs_hids +ffffffff833d0000 D acpisurface_cd +ffffffff833d0020 D acpisurface_hids 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wdc_alloc_queue.inited +ffffffff833ed008 B wdc_xfer_pool +ffffffff833ed1b0 B wdc_xfer_iopool +ffffffff833ee000 B aic_debug +ffffffff833ef000 B gdt_cnt +ffffffff833ef004 B gdt_polling +ffffffff833ef005 B gdt_from_wait +ffffffff833ef008 b gdt_exec_ccb.__level +ffffffff833ef00c B gdt_wait_index +ffffffff833ef010 B gdt_wait_gdt +ffffffff833f0000 B sili_error_pmp_ports +ffffffff833f1000 B ncr53c9x_debug +ffffffff833f1008 b ecb_iopool +ffffffff833f1048 b ecb_pool_initialized +ffffffff833f1050 b ecb_pool +ffffffff833f11f8 B sdebug +ffffffff833f2000 B epic_copy_small +ffffffff833f3000 B comconsaddr +ffffffff833f3008 B comconsiot +ffffffff833f3010 B comconsioh +ffffffff833f3018 B comconsfreq +ffffffff833f301c B comcons_reg_width +ffffffff833f3020 B commajor +ffffffff833f3024 B comconsunit +ffffffff833f3028 B comcons_reg_shift +ffffffff833f302c B comconsattached +ffffffff833f4000 B pckbc_console +ffffffff833f4004 B pckbc_console_attached +ffffffff833f4008 B pckbc_consdata +ffffffff833f40e0 b pckbc_cons_slotdata +ffffffff833f5000 b cy_poll.counter +ffffffff833f6000 B atw_xindiv2 +ffffffff833f7000 B rtw_rfprog_fallback +ffffffff833f7004 B rtw_do_chip_reset +ffffffff833f8000 b malo_cmd_string.cmd_buf +ffffffff833f9000 b iosf_mbi +ffffffff833fa000 B uhcixfer +ffffffff833fb000 B ohcixfer +ffffffff833fb008 b ohci_intr.ohci_intr_tv +ffffffff833fc000 B ehcixfer +ffffffff833fd000 B xhcixfer +ffffffff833fe000 B ipmi_enabled +ffffffff833fe008 B ipmi_sensor_list +ffffffff833ff000 B mpath +ffffffff83400000 B sr_bootuuid +ffffffff83400010 B sr_bootkey +ffffffff83400030 B softraid0 +ffffffff83400038 B sr_hotplug_callbacks +ffffffff83401000 B gf_pow +ffffffff83401300 B gf_map +ffffffff83401b00 B gf_log +ffffffff83402000 b ksym_syms +ffffffff83402008 b ksym_syms_size +ffffffff83403000 B kstat_version +ffffffff83403008 B kstat_id_tree +ffffffff83403010 B kstat_pv_tree +ffffffff83403018 B kstat_nm_tree +ffffffff83403020 b kstat_init.initialized +ffffffff83403028 B kstat_pool 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ipcounters +ffffffff834d4020 B ipqent_pool +ffffffff834d41c8 B ipq_pool +ffffffff834d4370 B ipq +ffffffff834d4378 b ipsend_mq +ffffffff834d43a8 b ipsendraw_mq +ffffffff834d5000 B ip_mrouter +ffffffff834d5800 b mrt_api_config +ffffffff834d5810 B mrt_count +ffffffff834d6010 B ip_mrouterq +ffffffff834d6048 b ip_mforward.srctun +ffffffff834d6050 B mrtstat +ffffffff834d7000 B rawcbtable +ffffffff834d8000 B tcp_debug +ffffffff834eea80 B tcp_debx +ffffffff834ef000 B tcp_rst_ppslim_count +ffffffff834ef004 B tcp_ackdrop_ppslim_count +ffffffff834ef008 B tcp_saveti6 +ffffffff834ef044 B tcp_saveti +ffffffff834ef070 B tcp_ackdrop_ppslim_last +ffffffff834ef080 B tcp_rst_ppslim_last +ffffffff834ef090 B syn_cache_pool +ffffffff834ef240 B tcp_syn_cache +ffffffff834ef2a0 B tcp_syn_cache_active +ffffffff834f0000 B tcp_ack_on_push +ffffffff834f0004 B tcp_do_ecn +ffffffff834f0008 B tcp_iss +ffffffff834f0010 B tcp_starttime +ffffffff834f0018 B tcpcb_pool +ffffffff834f01c0 B tcpqe_pool +ffffffff834f0368 B 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b nfsv3err_null +ffffffff83505000 B nfsd_waiting +ffffffff83505004 B nfssvc_sockhead_flag +ffffffff83505008 B nfssvc_sockhead +ffffffff83505018 B nfs_udpsock +ffffffff83505020 B nfsd_head +ffffffff83505030 b nfs_numnfsd +ffffffff83505038 B nfsrv_descript_pl +ffffffff835051e0 B nfsd_head_flag +ffffffff835051f0 B nfs_asyncdaemon +ffffffff83506000 B nfs_diskless +ffffffff83507000 B nfs_numasync +ffffffff83508000 b ffs_alloc.fsfull_last +ffffffff83508010 b ffs_realloccg.fsfull_last +ffffffff83508020 b ffs_inode_alloc.fsnoinodes_last +ffffffff83509000 B ffs_ino_pool +ffffffff835091a8 B ffs_dinode2_pool +ffffffff83509350 B ffs_dinode1_pool +ffffffff835094f8 b ffs_init.done +ffffffff8350a000 B lk +ffffffff8350a008 B softdep_workitem_pending +ffffffff8350a010 B worklist_tail +ffffffff8350a018 B num_on_worklist +ffffffff8350a020 B filesys_syncer +ffffffff8350a028 B softdep_worklist_busy +ffffffff8350a02c B req_clear_inodedeps +ffffffff8350a030 B proc_waiting +ffffffff8350a034 B req_clear_remove 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newdirblk_pool +ffffffff8350b858 B num_dirrem +ffffffff8350b860 B stat_indir_blk_ptrs +ffffffff8350b864 B stat_inode_bitmap +ffffffff8350b868 B stat_direct_blk_ptrs +ffffffff8350b86c B stat_dir_entry +ffffffff8350b870 B stat_sync_limit_hit +ffffffff8350b874 B stat_worklist_push +ffffffff8350b878 B stat_ino_limit_push +ffffffff8350b87c B stat_ino_limit_hit +ffffffff8350b880 B stat_countp +ffffffff8350b888 B stat_blk_limit_push +ffffffff8350b88c B stat_blk_limit_hit +ffffffff8350b890 b clear_remove.next +ffffffff8350b894 b clear_inodedeps.next +ffffffff8350b898 B softdep_freequeue +ffffffff8350c000 b mfs_minor +ffffffff8350d000 B ufs_mindirhashsize +ffffffff8350d004 B ufs_dirhashmem +ffffffff8350d008 B ufs_dirhashmaxmem +ffffffff8350d010 B ufsdirhash_mtx +ffffffff8350d020 B ufsdirhash_pool +ffffffff8350d1c8 B ufsdirhash_list +ffffffff8350d1d8 B ufs_dirhashcheck +ffffffff8350d1e0 B ufsdirhash_key +ffffffff8350e000 B ihashkey +ffffffff8350e010 B ihashtbl +ffffffff8350e018 B ihash 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udv_lock +ffffffff83519000 b uvmadvice +ffffffff8351a000 b uvm_pause.toggle +ffffffff8351b000 B uvmexp +ffffffff8351b158 B uvm +ffffffff8351c000 B kernel_map +ffffffff8351c008 b kernel_map_store +ffffffff8351d000 B uvm_maxkaddr +ffffffff8351d008 b uvm_kmapent_mtx +ffffffff8351d018 b uvm_kmapent_last_warn_time +ffffffff8351d028 B uvm_map_entry_kmem_pool +ffffffff8351d1d0 B uvm_map_entry_pool +ffffffff8351d380 b uvm_map_init.kernel_map_entry +ffffffff83547380 B uvm_vmspace_pool +ffffffff83548000 B malloc_conf +ffffffff83549000 B uvm_wxabort +ffffffff8354a000 B vm_nphysseg +ffffffff8354a010 B vm_physmem +ffffffff8354a310 b virtual_space_start +ffffffff8354a318 b virtual_space_end +ffffffff8354b000 B psegs +ffffffff8354b100 B uvm_pseg_lck +ffffffff8354c000 B uvm_nowait_failed +ffffffff8354d000 B oom +ffffffff8354d008 B swap_priority +ffffffff8354d010 B swapmap +ffffffff8354d018 B vndxfer_pool +ffffffff8354d1c0 B vndbuf_pool +ffffffff8354d370 B oompps +ffffffff8354e000 B kcur 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icmp6_mtudisc_timeout_q +ffffffff83556040 B icmp6_redirect_timeout_q +ffffffff83556078 B icmp6counters +ffffffff83556080 b icmp6_redirect_diag.buf +ffffffff83556480 b icmp6errppslim_last +ffffffff83556490 b icmp6errpps_count +ffffffff83557000 b ip6send_mq +ffffffff83557030 B ip6counters +ffffffff83557040 B ip6_soiikey +ffffffff83558000 B ip6_mrouter_ver +ffffffff83558010 B ip6_mrouter +ffffffff83558810 B ip6_mrouterq +ffffffff83558848 B mrt6stat +ffffffff835588b0 B ip6_mrtproto +ffffffff83559000 B ip6_id_ctx +ffffffff8355a000 b mld6_init.hbh_buf +ffffffff8355a008 B mld6_timers_are_running +ffffffff8355a010 b ip6_opts +ffffffff8355b000 B nd6_maxnudhint +ffffffff8355b004 B nd6_debug +ffffffff8355b008 B nd6_pool +ffffffff8355b1b0 B nd6_expire_task +ffffffff8355b1e0 B nd6_timer_to +ffffffff8355b228 B nd6_slowtimo_ch +ffffffff8355b270 B nd6_expire_timeout +ffffffff8355b2b8 B ln_hold_total +ffffffff8355b2bc B nd6_inuse +ffffffff8355c000 B rawin6pcbtable +ffffffff8355c078 B rip6counters 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idt +ffffffff8355e538 b cpu_init_extents.already_done +ffffffff8355e540 B lo32_vaddr +ffffffff8355e548 B lo32_paddr +ffffffff8355e550 B tramp_pdirpa +ffffffff8355e558 B early_pte_pages +ffffffff8355e560 B bootinfo +ffffffff8355f560 B avail_start +ffffffff8355f568 B avail_end +ffffffff8355f570 B bios_memmap +ffffffff8355f578 B bios_efiinfo +ffffffff8355f580 B mmap +ffffffff8355f588 B kern_end +ffffffff8355f590 B dumpmem_paddr +ffffffff8355f5a0 B idt_allocmap +ffffffff8355f6a0 B cpuresetfn +ffffffff8355f6a8 B bios_bootmac +ffffffff8355f6b0 B bios_ucode +ffffffff8355f6b8 B amd64_delay_quality +ffffffff8355f6c0 B dumpmem_low +ffffffff8355f6c8 B dumpmem_high +ffffffff8355f6d0 B cpu_class +ffffffff83560000 B cpuspeed +ffffffff83560004 B amd64_has_xcrypt +ffffffff83560010 B cpu_model +ffffffff83560040 B setperf_setup +ffffffff83560048 B has_rdrand +ffffffff8356004c B has_rdseed +ffffffff83560050 B amd64_has_pclmul +ffffffff83560054 B amd64_has_aesni +ffffffff83561000 B tsc_is_invariant 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kernel_pmap_store +ffffffff83568110 B cr3_reuse_pcid +ffffffff83568118 b cr3_pcid_temp +ffffffff83568120 B virtual_avail +ffffffff83568128 B pg_xo +ffffffff83568130 B protection_codes +ffffffff83568170 B pmap_use_pcid +ffffffff83568174 b cr3_pcid_proc +ffffffff83568178 B cr3_pcid_proc_intel +ffffffff83568180 B pmaps +ffffffff83568188 B pmap_pmap_pool +ffffffff83568330 B pmap_pv_pool +ffffffff835684d8 B pmap_pdp_pool +ffffffff83569000 B fpu_mxcsr_mask +ffffffff83569008 B xsave_mask +ffffffff8356a000 B x86_soft_intrs +ffffffff8356b000 B i8259_imen +ffffffff8356c000 B intr_shared_edge +ffffffff8356c008 B fake_softclock_intrhand +ffffffff8356c078 B fake_softnet_intrhand +ffffffff8356c0e8 B fake_softtty_intrhand +ffffffff8356c158 B fake_timer_intrhand +ffffffff8356c1c8 B fake_ipi_intrhand +ffffffff8356c238 B fake_xen_intrhand +ffffffff8356c2a8 B fake_hyperv_intrhand +ffffffff8356d000 B atdevbase +ffffffff8356d010 b ioport_ex_storage +ffffffff8356d2e0 B ioport_ex +ffffffff8356d2f0 b iomem_ex_storage +ffffffff8356d5c0 B iomem_ex +ffffffff8356d5c8 b ioport_malloc_safe +ffffffff8356e000 B mp_perflevel +ffffffff8356e008 B ul_setperf +ffffffff8356f000 B cn_tab +ffffffff83570000 B ddb_mp_mutex +ffffffff83570010 B ddb_state +ffffffff83570018 B ddb_regs +ffffffff835700c8 B db_switch_cpu +ffffffff835700d0 B db_switch_to_cpu +ffffffff835700d8 B ddb_active_cpu +ffffffff83571000 B rtclock_tval +ffffffff83571008 B i8254_ticked +ffffffff8357100c B i8254_offset +ffffffff83571010 B i8254_lastcount +ffffffff83571018 b rtcstart.rtcdrain_timeout +ffffffff83571060 B rtc_update_century +ffffffff83571068 B rtc_todr +ffffffff83572000 B k8pnow_current_state +ffffffff83573000 B bus_clock +ffffffff83573008 b est_fqlist +ffffffff83574000 B k1x_current_state +ffffffff83575000 B rotatedfonts +ffffffff83575008 B rasops_framebuffers ffffffff83576000 b stamp_attr ffffffff83576010 b stamp ffffffff83577000 b stamp_attr ffffffff83577010 b stamp -ffffffff83577110 b stamp_mutex -ffffffff83578000 B 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update_dpia_stream_allocation_table.__warned.4 +ffffffff836e8000 b dmub_srv_hw_init.__warned +ffffffff836e9000 b coordinates_x +ffffffff836ee050 b dc_fixpt_add.__warned +ffffffff836ee054 b dc_fixpt_sub.__warned +ffffffff836ee058 b build_evenly_distributed_points.__warned +ffffffff836ef000 b pq_initialized +ffffffff836ef001 b de_pg_initialized +ffffffff836ef010 b pq_table +ffffffff836f0020 b de_pq_table +ffffffff836f2000 b psr_su_set_y_granularity.__warned +ffffffff836f2004 b fill_backlight_transform_table_v_2_2.__warned +ffffffff836f2008 b fill_backlight_transform_table.__warned +ffffffff836f3000 b mod_vmid_get_for_ptb.__warned +ffffffff836f4000 b cyan_skillfish_sclk_default +ffffffff836f4004 b cyan_skillfish_user_settings.0 +ffffffff836f4008 b cyan_skillfish_user_settings.1 +ffffffff836f5000 B pci_mcfgt +ffffffff836f5008 B pci_mcfg_addr +ffffffff836f5010 B pci_mcfg_min_bus +ffffffff836f5014 B pci_mcfg_max_bus +ffffffff836f5020 B pci_mcfgh +ffffffff836f5820 b pci_intr_string.irqstr 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wsdisplay_console_device +ffffffff836ff038 B wsdisplay_clearonclose +ffffffff836ff03c B wsdisplay_cons_pollmode +ffffffff836ff040 B wsdisplay_cons_kbd_pollc +ffffffff836ff048 B ws_get_param +ffffffff836ff050 B ws_set_param +ffffffff83700000 b wskbd_console_data +ffffffff83700040 b wskbd_console_initted +ffffffff83700048 b wskbd_console_device +ffffffff83700050 B wskbd_get_backlight +ffffffff83700058 B wskbd_set_backlight +ffffffff83700060 b wskbd_cngetc.num +ffffffff83700064 b wskbd_cngetc.pos +ffffffff83701000 b compose_tab_inorder +ffffffff83702000 B nwsmux +ffffffff83702008 B wsmuxdevs +ffffffff83703000 B wsemul_vt100_console_emuldata +ffffffff83704000 B pckbd_consdata +ffffffff83704038 B pckbd_bell_fn +ffffffff83704040 B pckbd_bell_fn_arg +ffffffff83705000 b wscninit.initted +ffffffff83706000 B pctr_isamd +ffffffff83706004 B pctr_isintel +ffffffff83706008 B pctr_intel_cap +ffffffff83706010 B pctr_fn +ffffffff83707000 b nvram_initialized +ffffffff83708000 B hidkbd_is_console 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+ffffffff8370f010 b probe_val +ffffffff8370f110 B skip_fc +ffffffff8370f118 B ignore_addrs +ffffffff8370f120 b iic_dump.iicvalcnt +ffffffff83710000 B acpi_softc +ffffffff83710008 B acpiwqpool +ffffffff837101b0 B acpi_enabled +ffffffff837101b4 b acpi_maptable.tblid +ffffffff837101b8 b acpi_add_device.nacpicpus +ffffffff837101bc B acpi_force_bm +ffffffff837101c0 B mouse_has_softbtn +ffffffff837101c4 B acpi_evindex +ffffffff837101c8 B acpi_poll_enabled +ffffffff837101cc B acpi_hasprocfvs +ffffffff837101d0 B acpi_haspci +ffffffff83711000 B aml_root +ffffffff83711060 B aml_lastscope +ffffffff83711068 B aml_ophash +ffffffff83711070 b aml_mnem.mnemstr +ffffffff83711090 B aml_notify_list +ffffffff83711098 B acpi_nalloc +ffffffff837110a0 b acpi_sleep.acpinowait +ffffffff837110b0 b aml_nodename.namebuf +ffffffff83711130 b aml_getname.namebuf +ffffffff837111b0 b aml_getname.p +ffffffff837111b8 b global_lock_count +ffffffff837111c0 b aml_eisaid.id +ffffffff837111c8 B aml_global_lock +ffffffff837111d0 b aml_mapresource.map +ffffffff83711210 b aml_val_to_string.buffer +ffffffff83711310 B aml_error +ffffffff83711314 B odp +ffffffff83711318 B maxdp +ffffffff8371131c B aml_busy +ffffffff83712000 B scope +ffffffff83713000 B acpibtn_lids +ffffffff83714000 B cst_stats +ffffffff83715000 B acpihpet_attached +ffffffff83716000 b acpiec_wait.acpiecnowait +ffffffff83717000 B acpitz_cpu_setperf +ffffffff83718000 B acpimadt_busses +ffffffff8371b000 B acpimadt_isa_bus +ffffffff8371b030 b lapic_map +ffffffff8371c000 B acpidmar_ddb +ffffffff8371c010 b dmar_bdf.bdf +ffffffff8371c030 B acpidmar_sc +ffffffff8371c038 B domain_map_page +ffffffff8371c040 b dom_bdf.mmm +ffffffff8371c070 b iommu_init.niommu +ffffffff8371c078 b acpidmar_pci_attach.dom +ffffffff8371c080 b sid_flag +ffffffff8375c080 b ivhd_showpage.show +ffffffff8375c084 b ivhd_iommu_init.niommu +ffffffff8375c088 b acpidmar_intr.ofe.0 +ffffffff8375c090 b acpidmar_intr.ofe.1 +ffffffff8375d000 b dwiic_i2c_intr_string.irqstr +ffffffff8375e000 B acpihve_attached +ffffffff8375f000 B efi_jmpbuf +ffffffff83760000 B vm_pool +ffffffff837601a8 B vcpu_pool +ffffffff83760350 B vmm_softc +ffffffff83761000 B l1tf_flush_region +ffffffff83762000 B sdmmc_verbose +ffffffff83763000 B utc_offset +ffffffff83763008 B bufpages +ffffffff83763010 B utsname +ffffffff83764000 B mountroot +ffffffff83765000 B __kernel_bss_end ffffffff83800000 B _end ffffffff83800000 B end