--- 7.4/2024-02-01T07:17:04Z/2024-01-11T00:00:00Z/nm-bsd-ot14.txt Fri Feb 2 18:03:25 2024 +++ 7.4/2024-02-01T07:17:04Z/2024-01-12T00:00:00Z/nm-bsd-ot14.txt Fri Feb 2 20:45:38 2024 @@ -2,14 +2,14 @@ 00011006 A mp_pdirpa 0001419d A acpi_pdirpa 01000000 A __kernel_phys_base -02541000 T __kernel_kutext_phys -02545000 C __kernel_cptext_phys -02546000 C __kernel_rodata_phys -02e01000 R __kernel_kutext_page_phys -02e03000 C __kernel_randomdata_phys -030b1000 R __kernel_data_phys -033ea000 D __kernel_kudata_phys -033eb000 C __kernel_bss_phys +02542000 T __kernel_kutext_phys +02546000 C __kernel_cptext_phys +02547000 C __kernel_rodata_phys +02e02000 R __kernel_kutext_page_phys +02e04000 C __kernel_randomdata_phys +030b2000 R __kernel_data_phys +033eb000 D __kernel_kudata_phys +033ec000 C __kernel_bss_phys 03800000 B __kernel_phys_end 80000000 A __kernel_virt_to_phys ffffffff80000000 A __kernel_base @@ -6931,23226 +6931,23214 @@ ffffffff8132b500 T klist_solock ffffffff8132b540 T klist_sounlock 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drm_dp_pcon_reset_frl_config -ffffffff8198cd80 T drm_dp_pcon_frl_enable -ffffffff8198ce40 T drm_dp_pcon_hdmi_link_active -ffffffff8198ce90 T drm_dp_pcon_hdmi_link_mode -ffffffff8198cf00 T drm_dp_pcon_hdmi_frl_link_error_count -ffffffff8198cff0 T drm_dp_pcon_enc_is_dsc_1_2 -ffffffff8198d020 T drm_dp_pcon_dsc_max_slices -ffffffff8198d0b0 T drm_dp_pcon_dsc_max_slice_width -ffffffff8198d0e0 T drm_dp_pcon_dsc_bpp_incr -ffffffff8198d120 T drm_dp_pcon_pps_default -ffffffff8198d1a0 T drm_dp_pcon_pps_override_buf -ffffffff8198d240 T drm_dp_pcon_pps_override_param -ffffffff8198d310 T drm_dp_pcon_convert_rgb_to_ycbcr -ffffffff8198d3b0 T drm_edp_backlight_set_level -ffffffff8198d480 T drm_edp_backlight_enable -ffffffff8198d690 t drm_edp_backlight_set_enable -ffffffff8198d7c0 T drm_edp_backlight_disable -ffffffff8198d800 T drm_edp_backlight_init -ffffffff8198dd60 T drm_panel_dp_aux_backlight -ffffffff8198def0 t __128b132b_channel_eq_delay_us -ffffffff8198df70 t __8b10b_channel_eq_delay_us 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+ffffffff813fd1a0 T ieee80211_crypto_detach +ffffffff813fd260 T ieee80211_crypto_clear_groupkeys +ffffffff813fd3b0 T ieee80211_cipher_keylen +ffffffff813fd410 T ieee80211_get_txkey +ffffffff813fd490 T ieee80211_get_rxkey +ffffffff813fd570 T ieee80211_encrypt +ffffffff813fd5f0 T ieee80211_decrypt +ffffffff813fd760 T ieee80211_prf +ffffffff813fd880 T ieee80211_kdf +ffffffff813fd9e0 T ieee80211_derive_ptk +ffffffff813fdb50 T ieee80211_derive_pmkid +ffffffff813fdc70 T ieee80211_eapol_key_mic +ffffffff813fdda0 T ieee80211_eapol_key_check_mic +ffffffff813fde20 T ieee80211_eapol_key_encrypt +ffffffff813fdfd0 T ieee80211_eapol_key_decrypt +ffffffff813fe0e0 T ieee80211_pmksa_add +ffffffff813fe230 T ieee80211_pmksa_find +ffffffff813ff000 T ieee80211_bip_set_key +ffffffff813ff080 T ieee80211_bip_delete_key +ffffffff813ff0f0 T ieee80211_bip_encap +ffffffff813ff300 T ieee80211_bip_decap +ffffffff81400000 T ieee80211_ccmp_set_key +ffffffff81400080 T ieee80211_ccmp_delete_key +ffffffff814000f0 T ieee80211_ccmp_encrypt +ffffffff814005c0 t ieee80211_ccmp_phase1 +ffffffff81400940 T ieee80211_ccmp_get_pn +ffffffff81400a50 T ieee80211_ccmp_decrypt +ffffffff81401000 T ieee80211_tkip_set_key +ffffffff814010a0 T ieee80211_tkip_delete_key +ffffffff81401110 T ieee80211_tkip_mic +ffffffff81401290 T ieee80211_tkip_encrypt +ffffffff814016e0 t Phase1 +ffffffff81401870 t Phase2 +ffffffff81401aa0 T ieee80211_tkip_get_tsc +ffffffff81401bb0 T ieee80211_tkip_decrypt +ffffffff814020a0 T ieee80211_michael_mic_failure +ffffffff81402230 T ieee80211_michael_mic_failure_timeout +ffffffff81402260 t ieee80211_tkip_deauth +ffffffff81403000 T ieee80211_wep_set_key +ffffffff81403060 T ieee80211_wep_delete_key +ffffffff814030d0 T ieee80211_wep_encrypt +ffffffff814034a0 T ieee80211_wep_decrypt +ffffffff81404000 T ieee80211_get_hdrlen +ffffffff81404090 T ieee80211_input_hwdecrypt +ffffffff81404270 T ieee80211_inputm +ffffffff81404d60 T ieee80211_input_ba +ffffffff81405040 T ieee80211_amsdu_decap +ffffffff814052d0 T ieee80211_decap +ffffffff81405470 T ieee80211_recv_pspoll +ffffffff81405580 T ieee80211_recv_bar +ffffffff81405660 T ieee80211_input +ffffffff814056d0 T ieee80211_ba_move_window +ffffffff81405820 T ieee80211_input_ba_seq +ffffffff814059c0 T ieee80211_input_ba_flush +ffffffff81405af0 T ieee80211_input_ba_gap_skip +ffffffff81405b90 T ieee80211_input_ba_gap_timeout +ffffffff81405cb0 T ieee80211_enqueue_data +ffffffff81405e90 T ieee80211_amsdu_decap_validate +ffffffff81405f50 T ieee80211_parse_edca_params_body +ffffffff814060b0 T ieee80211_parse_edca_params +ffffffff81406100 T ieee80211_parse_wmm_params +ffffffff81406150 T ieee80211_parse_rsn_cipher +ffffffff81406200 T ieee80211_parse_rsn_akm +ffffffff814062b0 T ieee80211_parse_rsn_body +ffffffff81406530 T ieee80211_parse_rsn +ffffffff81406580 T ieee80211_parse_wpa +ffffffff814065e0 T ieee80211_save_ie +ffffffff814066a0 T ieee80211_recv_probe_resp +ffffffff814073e0 T ieee80211_recv_probe_req +ffffffff814076a0 T ieee80211_recv_auth +ffffffff81407740 T ieee80211_recv_assoc_req +ffffffff814080c0 T ieee80211_recv_assoc_resp +ffffffff81408640 T ieee80211_recv_deauth +ffffffff814087b0 T ieee80211_recv_disassoc +ffffffff814088c0 T ieee80211_recv_addba_req +ffffffff81408c60 T ieee80211_addba_req_refuse +ffffffff81408d00 T ieee80211_addba_req_accept +ffffffff81408d90 T ieee80211_recv_addba_resp +ffffffff81408ee0 T ieee80211_addba_resp_refuse +ffffffff81408f20 T ieee80211_addba_resp_accept +ffffffff81408fa0 T ieee80211_recv_delba +ffffffff81409120 T ieee80211_recv_sa_query_req +ffffffff81409190 T ieee80211_recv_sa_query_resp +ffffffff81409200 T ieee80211_recv_action +ffffffff81409330 T ieee80211_recv_mgmt +ffffffff81409480 T ieee80211_bar_tid +ffffffff8140a000 T ieee80211_node2req +ffffffff8140a370 T ieee80211_req2node +ffffffff8140a480 T ieee80211_disable_wep +ffffffff8140a590 T ieee80211_disable_rsn +ffffffff8140a5f0 T ieee80211_ioctl +ffffffff8140ba70 t ieee80211_ioctl_setnwkeys +ffffffff8140bc50 t ieee80211_ioctl_setwpaparms +ffffffff8140c000 T ieee80211_inact_timeout +ffffffff8140c0a0 T ieee80211_node_cache_timeout +ffffffff8140c0e0 T ieee80211_clean_nodes +ffffffff8140c400 T ieee80211_print_ess +ffffffff8140c5f0 T ieee80211_print_ess_list +ffffffff8140c660 T ieee80211_get_ess +ffffffff8140c6f0 T ieee80211_del_ess +ffffffff8140c840 T ieee80211_add_ess +ffffffff8140ceb0 T ieee80211_ess_adjust_rssi +ffffffff8140cf20 T ieee80211_ess_calculate_score +ffffffff8140d080 T ieee80211_ess_is_better +ffffffff8140d1d0 T ieee80211_match_ess +ffffffff8140d2c0 T ieee80211_switch_ess +ffffffff8140d530 T ieee80211_set_ess +ffffffff8140d800 T ieee80211_deselect_ess +ffffffff8140d860 T ieee80211_node_attach +ffffffff8140da40 T ieee80211_node_alloc +ffffffff8140da60 T ieee80211_node_free +ffffffff8140db10 T ieee80211_node_copy +ffffffff8140dcc0 T ieee80211_node_getrssi +ffffffff8140dcf0 T ieee80211_node_checkrssi +ffffffff8140dd80 T ieee80211_set_tim +ffffffff8140ddf0 T ieee80211_alloc_node_helper +ffffffff8140de70 T ieee80211_node_lateattach +ffffffff8140df30 T ieee80211_node_detach +ffffffff8140e0b0 T ieee80211_free_allnodes +ffffffff8140e1d0 T ieee80211_reset_scan +ffffffff8140e260 T ieee80211_node_raise_inact +ffffffff8140e2a0 T ieee80211_begin_scan +ffffffff8140e450 T ieee80211_node_cleanup +ffffffff8140e500 T ieee80211_iterate_nodes +ffffffff8140e590 T ieee80211_next_scan +ffffffff8140e6c0 T ieee80211_end_scan +ffffffff8140ec20 T ieee80211_create_ibss +ffffffff8140f0f0 T ieee80211_match_bss +ffffffff8140f510 T ieee80211_node_free_unref_cb +ffffffff8140f580 T ieee80211_node_tx_stopped +ffffffff8140f690 T ieee80211_node_switch_bss +ffffffff8140f960 T ieee80211_node_tx_flushed +ffffffff8140fae0 T ieee80211_find_node +ffffffff8140fb80 T ieee80211_node_join_bss +ffffffff8140fd70 T ieee80211_choose_rsnparams +ffffffff8140fea0 T ieee80211_node_choose_bss +ffffffff81410090 T ieee80211_free_node +ffffffff81410180 T ieee80211_node_cmp +ffffffff814101a0 T ieee80211_clean_inactive_nodes +ffffffff81410260 T ieee80211_get_rate +ffffffff814102c0 T ieee80211_ba_del +ffffffff814103b0 T ieee80211_node_set_timeouts +ffffffff814104b0 T ieee80211_node_addba_request_ac_be_to +ffffffff814104d0 T ieee80211_node_addba_request_ac_bk_to +ffffffff81410500 T ieee80211_node_addba_request_ac_vi_to +ffffffff81410530 T ieee80211_node_addba_request_ac_vo_to +ffffffff81410560 T ieee80211_setup_node +ffffffff814106f0 T ieee80211_alloc_node +ffffffff81410790 T ieee80211_dup_bss +ffffffff81410860 T ieee80211_find_txnode +ffffffff81410a70 T ieee80211_find_rxnode +ffffffff81410d80 T ieee80211_node_tx_ba_clear +ffffffff81410df0 T ieee80211_release_node +ffffffff81410e80 T ieee80211_clean_cached +ffffffff81410f10 T ieee80211_node_leave +ffffffff81411160 T ieee80211_setup_htcaps +ffffffff81411210 T ieee80211_clear_htcaps +ffffffff81411290 T ieee80211_40mhz_valid_secondary_above +ffffffff81411320 T ieee80211_40mhz_valid_secondary_below +ffffffff814113a0 T ieee80211_40mhz_center_freq_valid +ffffffff81411400 T ieee80211_setup_htop +ffffffff814114e0 T ieee80211_setup_vhtcaps +ffffffff81411560 T ieee80211_80mhz_center_freq_valid +ffffffff814115d0 T ieee80211_setup_vhtop +ffffffff814116d0 T ieee80211_clear_vhtcaps +ffffffff81411720 T ieee80211_setup_rates +ffffffff814117f0 T ieee80211_node_trigger_addba_req +ffffffff81411850 T ieee80211_node_addba_request +ffffffff81411880 T ieee80211_iserp_sta +ffffffff81411a40 T ieee80211_needs_auth +ffffffff81411a70 T ieee80211_node_join_ht +ffffffff81411ac0 T ieee80211_node_join_rsn +ffffffff81411bd0 T ieee80211_count_longslotsta +ffffffff81411c20 T ieee80211_count_nonerpsta +ffffffff81411c80 T ieee80211_count_pssta +ffffffff81411cd0 T ieee80211_count_rekeysta +ffffffff81411d20 T ieee80211_node_join_11g +ffffffff81411eb0 T ieee80211_node_join +ffffffff814121a0 T ieee80211_node_leave_ht +ffffffff814122c0 T ieee80211_node_leave_vht +ffffffff81412310 T ieee80211_node_leave_rsn +ffffffff81412440 T ieee80211_node_leave_11g +ffffffff81412620 T ieee80211_node_leave_pwrsave +ffffffff814127e0 T ieee80211_ibss_merge +ffffffff81412ae0 T ieee80211_notify_dtim +ffffffff81412bc0 T ieee80211_ess_cmp +ffffffff81412be0 t ieee80211_tree_RBT_COMPARE +ffffffff81412c00 t ieee80211_ess_tree_RBT_COMPARE +ffffffff81413000 T ieee80211_output +ffffffff814130f0 T ieee80211_action_name +ffffffff81413140 T ieee80211_mgmt_output +ffffffff814133a0 T ieee80211_pwrsave +ffffffff814134d0 T ieee80211_up_to_ac +ffffffff81413590 T ieee80211_classify +ffffffff81413680 T ieee80211_can_use_ampdu +ffffffff814136e0 T ieee80211_tx_compressed_bar +ffffffff81413820 T ieee80211_get_compressed_bar +ffffffff81413900 T ieee80211_encap +ffffffff81413d80 T ieee80211_add_capinfo +ffffffff81413e10 T ieee80211_add_ssid +ffffffff81413e70 T ieee80211_add_rates +ffffffff81413ee0 T ieee80211_add_ds_params +ffffffff81413f40 T ieee80211_add_tim +ffffffff81414080 T ieee80211_add_ibss_params +ffffffff814140b0 T ieee80211_add_edca_params +ffffffff81414240 T ieee80211_add_erp +ffffffff814142e0 T ieee80211_add_qos_capability +ffffffff81414320 T ieee80211_add_wme_info +ffffffff81414360 T ieee80211_add_wme_param +ffffffff81414500 T ieee80211_add_rsn_body +ffffffff81414810 T ieee80211_add_rsn +ffffffff81414870 T ieee80211_add_wpa +ffffffff814148e0 T ieee80211_add_xrates +ffffffff81414970 T ieee80211_add_htcaps +ffffffff81414a50 T ieee80211_add_htop +ffffffff81414b20 T ieee80211_add_vhtcaps +ffffffff81414bd0 T ieee80211_add_tie +ffffffff81414c20 T ieee80211_getmgmt +ffffffff81414ce0 T ieee80211_get_probe_req +ffffffff814150e0 T ieee80211_get_probe_resp +ffffffff81415690 T ieee80211_get_auth +ffffffff81415720 T ieee80211_get_deauth +ffffffff814157a0 T ieee80211_get_assoc_req +ffffffff81415c90 T ieee80211_get_assoc_resp +ffffffff81416080 T ieee80211_get_disassoc +ffffffff81416100 T ieee80211_get_addba_req +ffffffff81416200 T ieee80211_output_ba_move_window +ffffffff81416300 T ieee80211_output_ba_move_window_to_first_unacked +ffffffff814164d0 T ieee80211_output_ba_record_ack +ffffffff81416600 T ieee80211_get_addba_resp +ffffffff81416700 T ieee80211_get_delba +ffffffff814167a0 T ieee80211_get_sa_query +ffffffff81416830 T ieee80211_get_action +ffffffff81416ac0 T ieee80211_send_mgmt +ffffffff81416e40 T ieee80211_get_rts +ffffffff81416ed0 T ieee80211_get_cts_to_self +ffffffff81416f60 T ieee80211_beacon_alloc +ffffffff81418000 T ieee80211_eapol_key_input +ffffffff81418210 T ieee80211_recv_eapol_key_req +ffffffff81418360 T ieee80211_recv_4way_msg3 +ffffffff81418cf0 T ieee80211_recv_4way_msg2or4 +ffffffff81418e30 T ieee80211_recv_4way_msg1 +ffffffff81419110 T ieee80211_recv_wpa_group_msg1 +ffffffff81419410 T ieee80211_recv_rsn_group_msg1 +ffffffff81419920 T ieee80211_recv_group_msg2 +ffffffff81419a70 T ieee80211_recv_4way_msg2 +ffffffff81419c70 T ieee80211_must_update_group_key +ffffffff81419cd0 T ieee80211_recv_4way_msg4 +ffffffff8141a000 T ieee80211_send_eapol_key +ffffffff8141a1f0 T ieee80211_eapol_timeout +ffffffff8141a270 T ieee80211_send_4way_msg1 +ffffffff8141a530 T ieee80211_send_4way_msg3 +ffffffff8141aa80 T ieee80211_send_group_msg1 +ffffffff8141afa0 T ieee80211_add_gtk_kde +ffffffff8141b060 T ieee80211_add_pmkid_kde +ffffffff8141b0b0 T ieee80211_add_igtk_kde +ffffffff8141b180 T ieee80211_get_eapol_key +ffffffff8141b240 T ieee80211_send_4way_msg2 +ffffffff8141b460 T ieee80211_send_4way_msg4 +ffffffff8141b650 T ieee80211_send_group_msg2 +ffffffff8141b830 T ieee80211_send_eapol_key_req +ffffffff8141c000 T ieee80211_proto_attach +ffffffff8141c0b0 T ieee80211_newstate +ffffffff8141cd90 T ieee80211_proto_detach +ffffffff8141cdd0 T ieee80211_print_essid +ffffffff8141cf50 T ieee80211_fix_rate +ffffffff8141d250 T ieee80211_reset_erp +ffffffff8141d370 T ieee80211_set_shortslottime +ffffffff8141d3d0 T ieee80211_keyrun +ffffffff8141d540 T ieee80211_setkeys +ffffffff8141d780 t ieee80211_node_gtk_rekey +ffffffff8141d7e0 T ieee80211_setkeysdone +ffffffff8141d8e0 T ieee80211_gtk_rekey_timeout +ffffffff8141d930 T ieee80211_sa_query_timeout +ffffffff8141da00 T ieee80211_sa_query_request +ffffffff8141da80 T ieee80211_ht_negotiate +ffffffff8141dc50 T ieee80211_vht_negotiate +ffffffff8141de70 T ieee80211_tx_ba_timeout +ffffffff8141df90 T ieee80211_delba_request +ffffffff8141e100 T ieee80211_rx_ba_timeout +ffffffff8141e190 T ieee80211_addba_request +ffffffff8141e360 T ieee80211_auth_open_confirm +ffffffff8141e410 T ieee80211_try_another_bss +ffffffff8141e520 T ieee80211_auth_open +ffffffff8141e820 T ieee80211_set_beacon_miss_threshold +ffffffff8141e8b0 T ieee80211_stop_ampdu_tx +ffffffff8141e9c0 T ieee80211_check_wpa_supplicant_failure +ffffffff8141ea40 T ieee80211_set_link_state +ffffffff8141ead0 T ieee80211_rtm_80211info_task +ffffffff8141f000 T ieee80211_ra_get_ht_rateset +ffffffff8141f080 T ieee80211_ra_use_ht_sgi +ffffffff8141f100 T ieee80211_ra_get_txrate +ffffffff8141f190 T ieee80211_ra_next_lower_intra_rate +ffffffff8141f320 T ieee80211_ra_next_intra_rate +ffffffff8141f4a0 T ieee80211_ra_next_rateset +ffffffff8141f6b0 T ieee80211_ra_best_mcs_in_rateset +ffffffff8141f730 T ieee80211_ra_probe_next_rateset +ffffffff8141f9e0 T ieee80211_ra_next_mcs +ffffffff8141fa30 T ieee80211_ra_probe_clear +ffffffff8141fa70 T ieee80211_ra_probe_done +ffffffff8141fab0 T ieee80211_ra_intra_mode_ra_finished +ffffffff8141fe20 T ieee80211_ra_trigger_next_rateset +ffffffff8141fe90 T ieee80211_ra_inter_mode_ra_finished +ffffffff8141fec0 T ieee80211_ra_best_rate +ffffffff8141ff60 T ieee80211_ra_probe_next_rate +ffffffff81420000 T ieee80211_ra_valid_tx_mcs +ffffffff81420080 T ieee80211_ra_valid_rates +ffffffff81420150 T ieee80211_ra_probe_valid +ffffffff814201a0 T ieee80211_ra_add_stats_ht +ffffffff81420430 T ieee80211_ra_choose +ffffffff81420860 T ieee80211_ra_node_init +ffffffff81421000 T ieee80211_ra_vht_get_rateset +ffffffff814210a0 T ieee80211_ra_vht_use_sgi +ffffffff81421190 T ieee80211_ra_vht_get_txrate +ffffffff81421230 T ieee80211_ra_vht_next_lower_intra_rate +ffffffff81421270 T ieee80211_ra_vht_get_max_mcs +ffffffff814212f0 T ieee80211_ra_vht_next_intra_rate +ffffffff814213e0 T ieee80211_ra_vht_next_rateset +ffffffff814215e0 T ieee80211_ra_vht_best_mcs_in_rateset +ffffffff81421680 T ieee80211_ra_vht_probe_next_rateset +ffffffff81421a10 T ieee80211_ra_vht_next_mcs +ffffffff81421aa0 T ieee80211_ra_vht_probe_clear +ffffffff81421ad0 T ieee80211_ra_vht_probe_done +ffffffff81421b20 T ieee80211_ra_vht_intra_mode_ra_finished +ffffffff81421fc0 T ieee80211_ra_vht_trigger_next_rateset +ffffffff81422030 T ieee80211_ra_vht_inter_mode_ra_finished +ffffffff81422060 T ieee80211_ra_vht_best_rate +ffffffff814223d0 T ieee80211_ra_vht_probe_next_rate +ffffffff81422480 T ieee80211_ra_vht_init_valid_rates +ffffffff81422670 T ieee80211_ra_vht_probe_valid +ffffffff814226c0 T ieee80211_ra_vht_add_stats +ffffffff81422b10 T ieee80211_ra_vht_choose +ffffffff81422fe0 T ieee80211_ra_vht_node_init +ffffffff81424000 T ieee80211_rssadapt_choose +ffffffff814240e0 T ieee80211_rssadapt_updatestats +ffffffff81424170 T ieee80211_rssadapt_input +ffffffff814241b0 T ieee80211_rssadapt_lower_rate +ffffffff81424230 T ieee80211_rssadapt_raise_rate +ffffffff81425000 T bsearch +ffffffff814250b0 T ieee80211_regdomain_compare_cn +ffffffff814250d0 T ieee80211_regdomain_compare_rn +ffffffff814250f0 T ieee80211_name2countrycode +ffffffff81425190 T ieee80211_name2regdomain +ffffffff81425230 T ieee80211_countrycode2name +ffffffff814252c0 T ieee80211_regdomain2name +ffffffff81425340 T ieee80211_regdomain2flag +ffffffff81425400 T ieee80211_countrycode2regdomain +ffffffff81426000 T arptimer +ffffffff81426080 T arptfree +ffffffff81426170 T arpinit +ffffffff814261f0 T arp_rtrequest +ffffffff81426630 T arprequest +ffffffff81426770 T arpinvalidate +ffffffff814267d0 T arpreply +ffffffff814268c0 T arpresolve +ffffffff81426d30 T arppullup +ffffffff81426df0 T arpinput +ffffffff81426e50 T arpintr +ffffffff81426f00 T in_arpinput +ffffffff81427320 T arplookup +ffffffff81427410 T arpcache +ffffffff81427790 T arpproxy +ffffffff81427870 T revarpinput +ffffffff814278c0 T in_revarpinput +ffffffff81427980 T revarprequest +ffffffff81427ac0 T revarpwhoarewe +ffffffff81427cb0 T revarpwhoami +ffffffff81428000 T igmp_init +ffffffff81428090 T rti_fill +ffffffff81428160 T rti_find +ffffffff81428240 T rti_delete +ffffffff814282d0 T igmp_input +ffffffff814283a0 T igmp_input_if +ffffffff81428b40 T igmp_joingroup +ffffffff81428c80 T igmp_sendpkt +ffffffff81428e00 T igmp_leavegroup +ffffffff81428e80 T igmp_fasttimo +ffffffff81428f10 T igmp_checktimer +ffffffff81428ff0 T igmp_slowtimo +ffffffff81429050 T igmp_sysctl +ffffffff81429170 T igmp_sysctl_igmpstat +ffffffff8142a000 T in_canforward +ffffffff8142a060 T in_socktrim +ffffffff8142a0c0 T in_mask2len +ffffffff8142a1b0 T in_len2mask +ffffffff8142a270 T in_nam2sin +ffffffff8142a2d0 T in_sa2sin +ffffffff8142a310 T in_control +ffffffff8142a350 T in_ioctl +ffffffff8142a6b0 T in_ioctl_get +ffffffff8142a820 T in_ioctl_set_ifaddr +ffffffff8142aa00 T in_ioctl_change_ifaddr +ffffffff8142ae00 T in_scrubhost +ffffffff8142ae30 T in_addhost +ffffffff8142ae60 T in_ifscrub +ffffffff8142af00 T in_ifinit +ffffffff8142b1a0 T in_purgeaddr +ffffffff8142b2a0 T in_remove_prefix +ffffffff8142b310 T in_insert_prefix +ffffffff8142b390 T in_addmulti +ffffffff8142b540 T in_delmulti +ffffffff8142b690 T in_broadcast +ffffffff8142b720 T in_hasmulti +ffffffff8142b7c0 T in_ifdetach +ffffffff8142b850 T in_prefixlen2mask +ffffffff8142c000 T in_init +ffffffff8142c060 T in_pcbhash +ffffffff8142c170 T in_pcblhash +ffffffff8142c210 T in_pcbinit +ffffffff8142c2c0 T in_baddynamic +ffffffff8142c330 T in_rootonly +ffffffff8142c3b0 T in_pcballoc +ffffffff8142c540 T in_pcbresize +ffffffff8142c700 T in_pcbhash_insert +ffffffff8142c8c0 T in_pcbbind_locked +ffffffff8142cbb0 T in_pcbaddrisavail_lock +ffffffff8142cdf0 T in_pcbpickport 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inet_nat64_inet +ffffffff8142f2b0 T inet_nat64_inet6 +ffffffff8142f390 T inet_nat46 +ffffffff8142f430 T inet_nat46_inet +ffffffff8142f490 T inet_nat46_inet6 +ffffffff81430000 T inet_ntop +ffffffff814300c0 t inet_ntop6 +ffffffff81430620 T sockaddr_ntop +ffffffff81431000 T divert_attach +ffffffff81431090 T divert_detach +ffffffff814310e0 T divert_lock +ffffffff81431140 T divert_unlock +ffffffff814311a0 T divert_bind +ffffffff814311e0 T divert_shutdown +ffffffff81431220 T divert_send +ffffffff81431260 T divert_init +ffffffff814312b0 T divert_output +ffffffff81431550 T divert_packet +ffffffff814317d0 T divert_sysctl_divstat +ffffffff81431880 T divert_sysctl +ffffffff81432000 T icmp_init +ffffffff81432080 T icmp_mtudisc_timeout +ffffffff81432180 T icmp_do_error +ffffffff814324a0 T icmp_ratelimit +ffffffff81432500 T icmp_error +ffffffff81432580 T icmp_reflect +ffffffff814328a0 T icmp_send +ffffffff81432980 T icmp_input +ffffffff81432a20 T icmp_input_if +ffffffff814332e0 T iptime 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carp_hmac_generate +ffffffff81465950 T carp_hmac_verify +ffffffff81465ad0 T carp_proto_input +ffffffff81465b50 T carp_proto_input_if +ffffffff81465eb0 T carp_proto_input_c +ffffffff81466460 T carp6_proto_input +ffffffff814664e0 T carp6_proto_input_if +ffffffff814667c0 T carp_group_demote_count +ffffffff81466820 T carp_set_state +ffffffff814669b0 T carp_setrun +ffffffff81466c50 T carp_master_down +ffffffff81466e40 T carp_sysctl_carpstat +ffffffff81466f70 T carp_sysctl +ffffffff81467110 T carpattach +ffffffff81467170 T carp_new_vhost +ffffffff814673c0 T carp_addr_updated +ffffffff81467630 T carp_carpdev_state +ffffffff81467870 T carpdetach +ffffffff81467ae0 T carp_ioctl +ffffffff81468330 T carp_start +ffffffff814683c0 T carp_enqueue +ffffffff81468480 T carp_output +ffffffff81468540 T carp_timer_ad +ffffffff81468580 T carp_timer_down +ffffffff814685c0 T carp_destroy_vhosts +ffffffff81468720 T carp_del_all_timeouts +ffffffff814687d0 T carp_group_demote_adj +ffffffff81468920 T carp_set_state_all +ffffffff814689d0 T carp_setrun_all +ffffffff81468a80 T carp_multicast_cleanup +ffffffff81468c60 T carp_prepare_ad +ffffffff81468d50 T carp_send_ad_all +ffffffff81468eb0 T carp_vhe_send_ad_all +ffffffff81468f50 T carp_send_ad +ffffffff81469860 T carp_send_arp +ffffffff814698f0 T carp_send_na +ffffffff81469980 T carp_update_lsmask +ffffffff81469ab0 T carp_iamatch +ffffffff81469b20 T carp_ourether +ffffffff81469c60 T carp_vhe_match +ffffffff81469d00 T carp_input +ffffffff81469ee0 T carp_lsdrop +ffffffff81469ff0 T carp_ether_purgemulti +ffffffff8146a120 T carp_set_ifp +ffffffff8146a460 T carp_check_dup_vhids +ffffffff8146a5b0 T carp_set_enaddr +ffffffff8146a840 T carp_set_vhe_enaddr +ffffffff8146a8c0 T carp_join_multicast +ffffffff8146a970 T carp_set_addr +ffffffff8146ab40 T carp_set_addr6 +ffffffff8146ac70 T carp_join_multicast6 +ffffffff8146add0 T carp_vhids_ioctl +ffffffff8146b050 T carp_ether_addmulti +ffffffff8146b230 T carp_ether_delmulti +ffffffff8146b3d0 T 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Xrecurse_lapic_ltimer +ffffffff815d62d0 T Xintr_lapic_ltimer_untramp +ffffffff815d6410 T Xresume_lapic_ltimer +ffffffff815d6460 T Xrecurse_xen_upcall +ffffffff815d64e0 T Xintr_xen_upcall_untramp +ffffffff815d6620 T Xresume_xen_upcall +ffffffff815d6670 T Xrecurse_hyperv_upcall +ffffffff815d66f0 T Xintr_hyperv_upcall_untramp +ffffffff815d6830 T Xresume_hyperv_upcall +ffffffff815d6880 T Xrecurse_legacy0 +ffffffff815d6900 T Xresume_legacy0 +ffffffff815d6930 T Xintr_legacy0_untramp +ffffffff815d6b60 T Xrecurse_legacy1 +ffffffff815d6be0 T Xresume_legacy1 +ffffffff815d6c10 T Xintr_legacy1_untramp +ffffffff815d6e40 T Xrecurse_legacy2 +ffffffff815d6ec0 T Xresume_legacy2 +ffffffff815d6ef0 T Xintr_legacy2_untramp +ffffffff815d7120 T Xrecurse_legacy3 +ffffffff815d71a0 T Xresume_legacy3 +ffffffff815d71d0 T Xintr_legacy3_untramp +ffffffff815d7400 T Xrecurse_legacy4 +ffffffff815d7480 T Xresume_legacy4 +ffffffff815d74b0 T Xintr_legacy4_untramp +ffffffff815d76e0 T Xrecurse_legacy5 +ffffffff815d7760 T Xresume_legacy5 +ffffffff815d7790 T Xintr_legacy5_untramp +ffffffff815d79c0 T Xrecurse_legacy6 +ffffffff815d7a40 T Xresume_legacy6 +ffffffff815d7a70 T Xintr_legacy6_untramp +ffffffff815d7ca0 T Xrecurse_legacy7 +ffffffff815d7d20 T Xresume_legacy7 +ffffffff815d7d50 T Xintr_legacy7_untramp +ffffffff815d7f80 T Xrecurse_legacy8 +ffffffff815d8000 T Xresume_legacy8 +ffffffff815d8030 T Xintr_legacy8_untramp +ffffffff815d8260 T Xrecurse_legacy9 +ffffffff815d82e0 T Xresume_legacy9 +ffffffff815d8310 T Xintr_legacy9_untramp +ffffffff815d8540 T Xrecurse_legacy10 +ffffffff815d85c0 T Xresume_legacy10 +ffffffff815d85f0 T Xintr_legacy10_untramp +ffffffff815d8820 T Xrecurse_legacy11 +ffffffff815d88a0 T Xresume_legacy11 +ffffffff815d88d0 T Xintr_legacy11_untramp +ffffffff815d8b00 T Xrecurse_legacy12 +ffffffff815d8b80 T Xresume_legacy12 +ffffffff815d8bb0 T Xintr_legacy12_untramp +ffffffff815d8de0 T Xrecurse_legacy13 +ffffffff815d8e60 T Xresume_legacy13 +ffffffff815d8e90 T Xintr_legacy13_untramp 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Xintr_ioapic_edge5_untramp +ffffffff815da760 T Xrecurse_ioapic_edge6 +ffffffff815da7e0 T Xresume_ioapic_edge6 +ffffffff815da810 T Xintr_ioapic_edge6_untramp +ffffffff815daa30 T Xrecurse_ioapic_edge7 +ffffffff815daab0 T Xresume_ioapic_edge7 +ffffffff815daae0 T Xintr_ioapic_edge7_untramp +ffffffff815dad00 T Xrecurse_ioapic_edge8 +ffffffff815dad80 T Xresume_ioapic_edge8 +ffffffff815dadb0 T Xintr_ioapic_edge8_untramp +ffffffff815dafd0 T Xrecurse_ioapic_edge9 +ffffffff815db050 T Xresume_ioapic_edge9 +ffffffff815db080 T Xintr_ioapic_edge9_untramp +ffffffff815db2a0 T Xrecurse_ioapic_edge10 +ffffffff815db320 T Xresume_ioapic_edge10 +ffffffff815db350 T Xintr_ioapic_edge10_untramp +ffffffff815db570 T Xrecurse_ioapic_edge11 +ffffffff815db5f0 T Xresume_ioapic_edge11 +ffffffff815db620 T Xintr_ioapic_edge11_untramp +ffffffff815db840 T Xrecurse_ioapic_edge12 +ffffffff815db8c0 T Xresume_ioapic_edge12 +ffffffff815db8f0 T Xintr_ioapic_edge12_untramp +ffffffff815dbb10 T Xrecurse_ioapic_edge13 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Xresume_ioapic_level16 +ffffffff815e8940 T Xintr_ioapic_level16_untramp +ffffffff815e8c50 T Xrecurse_ioapic_level17 +ffffffff815e8cd0 T Xresume_ioapic_level17 +ffffffff815e8d00 T Xintr_ioapic_level17_untramp +ffffffff815e9010 T Xrecurse_ioapic_level18 +ffffffff815e9090 T Xresume_ioapic_level18 +ffffffff815e90c0 T Xintr_ioapic_level18_untramp +ffffffff815e93d0 T Xrecurse_ioapic_level19 +ffffffff815e9450 T Xresume_ioapic_level19 +ffffffff815e9480 T Xintr_ioapic_level19_untramp +ffffffff815e9790 T Xrecurse_ioapic_level20 +ffffffff815e9810 T Xresume_ioapic_level20 +ffffffff815e9840 T Xintr_ioapic_level20_untramp +ffffffff815e9b50 T Xrecurse_ioapic_level21 +ffffffff815e9bd0 T Xresume_ioapic_level21 +ffffffff815e9c00 T Xintr_ioapic_level21_untramp +ffffffff815e9f10 T Xrecurse_ioapic_level22 +ffffffff815e9f90 T Xresume_ioapic_level22 +ffffffff815e9fc0 T Xintr_ioapic_level22_untramp +ffffffff815ea2d0 T Xrecurse_ioapic_level23 +ffffffff815ea350 T Xresume_ioapic_level23 +ffffffff815ea380 T Xintr_ioapic_level23_untramp +ffffffff815ea690 T Xrecurse_ioapic_level24 +ffffffff815ea710 T Xresume_ioapic_level24 +ffffffff815ea740 T Xintr_ioapic_level24_untramp +ffffffff815eaa50 T Xrecurse_ioapic_level25 +ffffffff815eaad0 T Xresume_ioapic_level25 +ffffffff815eab00 T Xintr_ioapic_level25_untramp +ffffffff815eae10 T Xrecurse_ioapic_level26 +ffffffff815eae90 T Xresume_ioapic_level26 +ffffffff815eaec0 T Xintr_ioapic_level26_untramp +ffffffff815eb1d0 T Xrecurse_ioapic_level27 +ffffffff815eb250 T Xresume_ioapic_level27 +ffffffff815eb280 T Xintr_ioapic_level27_untramp +ffffffff815eb590 T Xrecurse_ioapic_level28 +ffffffff815eb610 T Xresume_ioapic_level28 +ffffffff815eb640 T Xintr_ioapic_level28_untramp +ffffffff815eb950 T Xrecurse_ioapic_level29 +ffffffff815eb9d0 T Xresume_ioapic_level29 +ffffffff815eba00 T Xintr_ioapic_level29_untramp +ffffffff815ebd10 T Xrecurse_ioapic_level30 +ffffffff815ebd90 T Xresume_ioapic_level30 +ffffffff815ebdc0 T Xintr_ioapic_level30_untramp +ffffffff815ec0d0 T Xrecurse_ioapic_level31 +ffffffff815ec150 T Xresume_ioapic_level31 +ffffffff815ec180 T Xintr_ioapic_level31_untramp +ffffffff815ec490 T Xrecurse_ioapic_level32 +ffffffff815ec510 T Xresume_ioapic_level32 +ffffffff815ec540 T Xintr_ioapic_level32_untramp +ffffffff815ec850 T Xrecurse_ioapic_level33 +ffffffff815ec8d0 T Xresume_ioapic_level33 +ffffffff815ec900 T Xintr_ioapic_level33_untramp +ffffffff815ecc10 T Xrecurse_ioapic_level34 +ffffffff815ecc90 T Xresume_ioapic_level34 +ffffffff815eccc0 T Xintr_ioapic_level34_untramp +ffffffff815ecfd0 T Xrecurse_ioapic_level35 +ffffffff815ed050 T Xresume_ioapic_level35 +ffffffff815ed080 T Xintr_ioapic_level35_untramp +ffffffff815ed390 T Xrecurse_ioapic_level36 +ffffffff815ed410 T Xresume_ioapic_level36 +ffffffff815ed440 T Xintr_ioapic_level36_untramp +ffffffff815ed750 T Xrecurse_ioapic_level37 +ffffffff815ed7d0 T Xresume_ioapic_level37 +ffffffff815ed800 T Xintr_ioapic_level37_untramp +ffffffff815edb10 T Xrecurse_ioapic_level38 +ffffffff815edb90 T Xresume_ioapic_level38 +ffffffff815edbc0 T Xintr_ioapic_level38_untramp +ffffffff815eded0 T Xrecurse_ioapic_level39 +ffffffff815edf50 T Xresume_ioapic_level39 +ffffffff815edf80 T Xintr_ioapic_level39_untramp +ffffffff815ee290 T Xrecurse_ioapic_level40 +ffffffff815ee310 T Xresume_ioapic_level40 +ffffffff815ee340 T Xintr_ioapic_level40_untramp +ffffffff815ee650 T Xrecurse_ioapic_level41 +ffffffff815ee6d0 T Xresume_ioapic_level41 +ffffffff815ee700 T Xintr_ioapic_level41_untramp +ffffffff815eea10 T Xrecurse_ioapic_level42 +ffffffff815eea90 T Xresume_ioapic_level42 +ffffffff815eeac0 T Xintr_ioapic_level42_untramp +ffffffff815eedd0 T Xrecurse_ioapic_level43 +ffffffff815eee50 T Xresume_ioapic_level43 +ffffffff815eee80 T Xintr_ioapic_level43_untramp +ffffffff815ef190 T Xrecurse_ioapic_level44 +ffffffff815ef210 T Xresume_ioapic_level44 +ffffffff815ef240 T Xintr_ioapic_level44_untramp +ffffffff815ef550 T Xrecurse_ioapic_level45 +ffffffff815ef5d0 T Xresume_ioapic_level45 +ffffffff815ef600 T Xintr_ioapic_level45_untramp +ffffffff815ef910 T Xrecurse_ioapic_level46 +ffffffff815ef990 T Xresume_ioapic_level46 +ffffffff815ef9c0 T Xintr_ioapic_level46_untramp +ffffffff815efcd0 T Xrecurse_ioapic_level47 +ffffffff815efd50 T Xresume_ioapic_level47 +ffffffff815efd80 T Xintr_ioapic_level47_untramp +ffffffff815f0090 T Xrecurse_ioapic_level48 +ffffffff815f0110 T Xresume_ioapic_level48 +ffffffff815f0140 T Xintr_ioapic_level48_untramp +ffffffff815f0450 T Xrecurse_ioapic_level49 +ffffffff815f04d0 T Xresume_ioapic_level49 +ffffffff815f0500 T Xintr_ioapic_level49_untramp +ffffffff815f0810 T Xrecurse_ioapic_level50 +ffffffff815f0890 T Xresume_ioapic_level50 +ffffffff815f08c0 T Xintr_ioapic_level50_untramp +ffffffff815f0bd0 T Xrecurse_ioapic_level51 +ffffffff815f0c50 T Xresume_ioapic_level51 +ffffffff815f0c80 T Xintr_ioapic_level51_untramp +ffffffff815f0f90 T Xrecurse_ioapic_level52 +ffffffff815f1010 T Xresume_ioapic_level52 +ffffffff815f1040 T Xintr_ioapic_level52_untramp +ffffffff815f1350 T Xrecurse_ioapic_level53 +ffffffff815f13d0 T Xresume_ioapic_level53 +ffffffff815f1400 T Xintr_ioapic_level53_untramp +ffffffff815f1710 T Xrecurse_ioapic_level54 +ffffffff815f1790 T Xresume_ioapic_level54 +ffffffff815f17c0 T Xintr_ioapic_level54_untramp +ffffffff815f1ad0 T Xrecurse_ioapic_level55 +ffffffff815f1b50 T Xresume_ioapic_level55 +ffffffff815f1b80 T Xintr_ioapic_level55_untramp +ffffffff815f1e90 T Xrecurse_ioapic_level56 +ffffffff815f1f10 T Xresume_ioapic_level56 +ffffffff815f1f40 T Xintr_ioapic_level56_untramp +ffffffff815f2250 T Xrecurse_ioapic_level57 +ffffffff815f22d0 T Xresume_ioapic_level57 +ffffffff815f2300 T Xintr_ioapic_level57_untramp +ffffffff815f2610 T Xrecurse_ioapic_level58 +ffffffff815f2690 T Xresume_ioapic_level58 +ffffffff815f26c0 T Xintr_ioapic_level58_untramp +ffffffff815f29d0 T Xrecurse_ioapic_level59 +ffffffff815f2a50 T Xresume_ioapic_level59 +ffffffff815f2a80 T Xintr_ioapic_level59_untramp +ffffffff815f2d90 T Xrecurse_ioapic_level60 +ffffffff815f2e10 T Xresume_ioapic_level60 +ffffffff815f2e40 T Xintr_ioapic_level60_untramp +ffffffff815f3150 T Xrecurse_ioapic_level61 +ffffffff815f31d0 T Xresume_ioapic_level61 +ffffffff815f3200 T Xintr_ioapic_level61_untramp +ffffffff815f3510 T Xrecurse_ioapic_level62 +ffffffff815f3590 T Xresume_ioapic_level62 +ffffffff815f35c0 T Xintr_ioapic_level62_untramp +ffffffff815f38d0 T Xrecurse_ioapic_level63 +ffffffff815f3950 T Xresume_ioapic_level63 +ffffffff815f3980 T Xintr_ioapic_level63_untramp +ffffffff815f3c90 T retpoline_r13 +ffffffff815f3cb0 T Xsofttty +ffffffff815f3cf0 T Xsoftnet +ffffffff815f3d30 T Xsoftclock +ffffffff815f4000 T kcopy +ffffffff815f40d0 T copyout +ffffffff815f4160 T _copyin +ffffffff815f4200 T copy_fault +ffffffff815f4230 T copyoutstr +ffffffff815f42c0 T _copyinstr +ffffffff815f4340 T copystr_fault +ffffffff815f4349 t copystr_return +ffffffff815f5000 T Xspllower +ffffffff815f5080 T Xdoreti +ffffffff815f6000 T mds_handler_ivb +ffffffff815f6070 T mds_handler_bdw +ffffffff815f60e0 T mds_handler_skl +ffffffff815f6100 T mds_handler_skl_sse +ffffffff815f6180 T mds_handler_skl_avx +ffffffff815f6200 T mds_handler_silvermont +ffffffff815f6260 T mds_handler_knights +ffffffff815f7000 T intr_default_setup +ffffffff815f7080 T x86_nmi +ffffffff815f70d0 T intr_calculatemasks +ffffffff815f7470 T intr_allocate_slot_cpu +ffffffff815f7610 T intr_allocate_slot +ffffffff815f78d0 T intr_establish +ffffffff815f7d30 T intr_disestablish +ffffffff815f7e70 T intr_handler +ffffffff815f7f30 T cpu_intr_init +ffffffff815f8180 T intr_printconfig +ffffffff815f81b0 T intr_barrier +ffffffff815f81d0 T splraise +ffffffff815f8240 T spllower +ffffffff815f82b0 T softintr +ffffffff815f9000 T x86_bus_space_io_read_1 +ffffffff815f9030 T x86_bus_space_io_read_2 +ffffffff815f9060 T x86_bus_space_io_read_4 +ffffffff815f9090 T x86_bus_space_io_read_8 +ffffffff815f90b0 T x86_bus_space_io_read_multi_1 +ffffffff815f90f0 T x86_bus_space_io_read_multi_2 +ffffffff815f9130 T x86_bus_space_io_read_multi_4 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x86_bus_space_mem_set_region_2 +ffffffff815fa1e0 T x86_bus_space_mem_set_region_4 +ffffffff815fa280 T x86_bus_space_mem_set_region_8 +ffffffff815fa320 T x86_bus_space_mem_copy_1 +ffffffff815fa470 T x86_bus_space_mem_copy_2 +ffffffff815fa5d0 T x86_bus_space_mem_copy_4 +ffffffff815fa720 T x86_bus_space_mem_copy_8 +ffffffff815fa890 T x86_bus_space_mem_vaddr +ffffffff815fa8c0 T x86_bus_space_mem_mmap +ffffffff815fa8f0 T x86_bus_space_init +ffffffff815fa990 T x86_bus_space_mallocok +ffffffff815fa9c0 T bus_space_map +ffffffff815fac20 T x86_mem_add_mapping +ffffffff815fad50 T _bus_space_map +ffffffff815faea0 T bus_space_alloc +ffffffff815fb100 T _bus_space_unmap +ffffffff815fb230 T bus_space_unmap +ffffffff815fb400 T bus_space_free +ffffffff815fb420 T bus_space_subregion +ffffffff815fc000 T _bus_dmamap_create +ffffffff815fc0b0 T _bus_dmamap_destroy +ffffffff815fc0e0 T _bus_dmamap_load +ffffffff815fc180 T _bus_dmamap_load_buffer +ffffffff815fc450 T _bus_dmamap_load_mbuf +ffffffff815fc560 T _bus_dmamap_load_uio +ffffffff815fc6f0 T _bus_dmamap_load_raw +ffffffff815fc960 T _bus_dmamap_unload +ffffffff815fc9a0 T _bus_dmamap_sync +ffffffff815fc9d0 T _bus_dmamem_alloc +ffffffff815fca20 T _bus_dmamem_alloc_range +ffffffff815fcb90 T _bus_dmamem_free +ffffffff815fcc70 T _bus_dmamem_map +ffffffff815fce70 T _bus_dmamem_unmap +ffffffff815fcf10 T _bus_dmamem_mmap +ffffffff815fd000 T cpu_spinup_finish +ffffffff815fe000 T x86_64_ipi_halt +ffffffff815fe0b0 T x86_64_ipi_nop +ffffffff815fe0e0 T x86_64_ipi_vmclear_vmm +ffffffff815fe0f0 T x86_64_ipi_reload_mtrr +ffffffff815fe140 T x86_64_ipi_start_vmm +ffffffff815fe150 T x86_64_ipi_stop_vmm +ffffffff815fe160 T x86_64_ipi_wbinvd +ffffffff815ff000 T x86_send_ipi +ffffffff815ff060 T x86_fast_ipi +ffffffff815ff0c0 T x86_broadcast_ipi +ffffffff815ff150 T x86_ipi_handler +ffffffff81600000 T mp_setperf +ffffffff81600060 T x86_setperf_ipi +ffffffff81600080 T mp_setperf_init +ffffffff81601000 T apic_format_redir +ffffffff81602000 T consinit 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mpii_board_info +ffffffff8170c0f0 T mpii_portfacts +ffffffff8170c220 T mpii_target_map +ffffffff8170c310 T mpii_cfg_coalescing +ffffffff8170c3e0 T mpii_eventnotify +ffffffff8170c5b0 T mpii_portenable +ffffffff8170c6a0 T mpii_intr +ffffffff8170caf0 T mpii_ioctl +ffffffff8170cc00 T mpii_create_sensors +ffffffff8170cd90 T mpii_dmamem_free +ffffffff8170ce20 T mpii_get_ccb +ffffffff8170ceb0 T mpii_reply +ffffffff8170cf80 T mpii_event_process +ffffffff8170d230 T mpii_load_xs_sas3 +ffffffff8170d3d0 T mpii_load_xs +ffffffff8170d5c0 T mpii_req_cfg_header +ffffffff8170d780 T mpii_req_cfg_page +ffffffff8170d9d0 T mpii_wait_ne +ffffffff8170dae0 T mpii_reset_soft +ffffffff8170dd10 T mpii_reset_hard +ffffffff8170dff0 T mpii_handshake_send +ffffffff8170e3f0 T mpii_handshake_recv_dword +ffffffff8170e6a0 T mpii_handshake_recv +ffffffff8170e900 T mpii_empty_done +ffffffff8170e930 T mpii_push_reply +ffffffff8170e9b0 T mpii_poll +ffffffff8170eb90 T mpii_eventack +ffffffff8170ed80 T mpii_eventack_done +ffffffff8170ee00 T mpii_start +ffffffff8170eed0 T mpii_event_sas +ffffffff8170f2e0 T mpii_eventnotify_done +ffffffff8170f320 T mpii_event_raid +ffffffff8170f650 T mpii_find_dev +ffffffff8170f6b0 T mpii_insert_dev +ffffffff8170f730 T mpii_remove_dev +ffffffff8170f7b0 T mpii_event_discovery +ffffffff8170f810 T mpii_sas_remove_device +ffffffff8170f9d0 T mpii_event_done +ffffffff8170fa90 T mpii_wait +ffffffff8170fc00 T mpii_dmamem_alloc +ffffffff8170fda0 T mpii_scsi_cmd_tmo_handler +ffffffff8170ff00 T mpii_put_ccb +ffffffff8170ffa0 T mpii_poll_done +ffffffff8170ffd0 T mpii_wait_done +ffffffff81710010 T mpii_scsi_cmd_done +ffffffff81710280 T mpii_scsi_cmd_tmo +ffffffff81710380 T mpii_scsi_cmd_tmo_done +ffffffff817103a0 T mpii_ioctl_cache +ffffffff817105f0 T mpii_ioctl_inq +ffffffff817106a0 T mpii_ioctl_vol +ffffffff81710930 T mpii_ioctl_disk +ffffffff81710b10 T mpii_find_vol +ffffffff81710b60 T mpii_bio_hs +ffffffff81710d30 T mpii_bio_disk +ffffffff81710f80 T mpii_bio_volstate +ffffffff81711120 T mpii_refresh_sensors +ffffffff81712000 T sili_pci_match +ffffffff817120a0 T sili_pci_attach +ffffffff817123a0 T sili_pci_detach +ffffffff81712450 T sili_pci_activate +ffffffff81712490 T sili_lookup +ffffffff81713000 T aq_fw1x_reset +ffffffff81713050 T aq1_get_mac_addr +ffffffff81713130 T aq_fw1x_set_mode +ffffffff81713160 T aq_fw1x_get_mode +ffffffff81713190 T aq_fw1x_get_stats +ffffffff817131c0 T aq_fw2x_reset +ffffffff81713250 T aq_fw2x_set_mode +ffffffff817133f0 T aq_fw2x_get_mode +ffffffff81713580 T aq_fw2x_get_stats +ffffffff817135b0 T aq2_fw_reset +ffffffff81713740 T aq2_get_mac_addr +ffffffff817137e0 T aq2_fw_set_mode +ffffffff817139f0 T aq2_fw_get_mode +ffffffff81713ac0 T aq2_fw_get_stats +ffffffff81713af0 T aq_match +ffffffff81713b20 T aq_attach +ffffffff81714770 T aq_activate +ffffffff817147a0 T aq_lookup +ffffffff81714820 T aq_intr +ffffffff817149b0 T aq_intr_link +ffffffff81714ac0 T aq1_fw_reboot +ffffffff81714d10 T aq2_fw_reboot +ffffffff81715160 T aq_hw_reset +ffffffff817152c0 T aq_init_rss +ffffffff81715630 T aq_hw_init +ffffffff81715940 T aq_ifmedia_change +ffffffff81715a30 T aq_ifmedia_status +ffffffff81715b30 T aq_ioctl +ffffffff81715d70 T aq_start +ffffffff817160c0 T aq_watchdog +ffffffff817160f0 T aq_set_linkmode +ffffffff81716120 T aq_refill +ffffffff81716190 T aq_intr_queue +ffffffff81716270 T aq_enable_intr +ffffffff81716390 T aq1_fw_read_version +ffffffff81716430 T aq1_mac_soft_reset +ffffffff81716460 T aq1_fw_version_init +ffffffff817165e0 T aq1_hw_init_ucp +ffffffff81716760 T aq1_mac_soft_reset_rbl +ffffffff81716a00 T aq1_global_software_reset +ffffffff81716b20 T aq1_mac_soft_reset_flb +ffffffff81716ed0 T aq2_interface_buffer_read +ffffffff81717010 T aq1_fw_downld_dwords +ffffffff81717330 T aq_hw_l3_filter_set +ffffffff81717540 T aq_hw_init_tx_path +ffffffff817177b0 T aq_hw_init_rx_path +ffffffff81717fc0 T aq_set_mac_addr +ffffffff817181d0 T aq_hw_qos_set +ffffffff817188c0 T aq2_filter_art_set +ffffffff81718a70 T aq_get_linkmode +ffffffff81718ae0 T aq_txring_reset +ffffffff81718e90 T aq_rxring_reset +ffffffff81719390 T aq_rx_fill +ffffffff817195a0 T aq_rxeof +ffffffff81719920 T aq_txeof +ffffffff81719b00 T aq_update_link_status +ffffffff81719ba0 T aq_free_slots +ffffffff81719c40 T aq_queue_up +ffffffff8171a020 T aq_dmamem_alloc +ffffffff8171a170 T aq_dmamem_free +ffffffff8171a1e0 T aq_queue_down +ffffffff8171a490 T aq_invalidate_rx_desc_cache +ffffffff8171a510 T aq_up +ffffffff8171a930 T aq_down +ffffffff8171aa90 T aq_rxrinfo +ffffffff8171ab80 T aq_iff +ffffffff8171b000 T tulip_probe +ffffffff8171b060 T tulip_attach +ffffffff8171ba80 T tulip_timeout_callback +ffffffff8171bad0 T tulip_timeout +ffffffff8171bb40 T tulip_txprobe +ffffffff8171bc80 T tulip_txput +ffffffff8171c1f0 T tulip_media_set +ffffffff8171c7f0 T tulip_reset +ffffffff8171cbb0 T tulip_mii_autonegotiate +ffffffff8171ceb0 T tulip_mii_readreg +ffffffff8171d060 T tulip_mii_writereg +ffffffff8171d220 T tulip_linkup +ffffffff8171d2f0 T tulip_init +ffffffff8171d470 T tulip_media_print +ffffffff8171d4c0 T tulip_media_link_monitor +ffffffff8171d6f0 T tulip_mii_map_abilities +ffffffff8171d780 T tulip_media_poll +ffffffff8171dc60 T tulip_mii_phy_readspecific +ffffffff8171de20 T tulip_media_select +ffffffff8171df30 T tulip_21040_mediainfo_init +ffffffff8171e030 T tulip_21040_media_probe +ffffffff8171e120 T tulip_21040_10baset_only_media_probe +ffffffff8171e1e0 T tulip_21040_10baset_only_media_select +ffffffff8171e240 T tulip_21040_auibnc_only_media_probe +ffffffff8171e2d0 T tulip_21040_auibnc_only_media_select +ffffffff8171e320 T tulip_21041_mediainfo_init +ffffffff8171e3e0 T tulip_21041_media_probe +ffffffff8171e4c0 T tulip_21041_media_poll +ffffffff8171e7f0 T tulip_mii_get_phyaddr +ffffffff8171e8b0 T tulip_2114x_media_preset +ffffffff8171ead0 T tulip_null_media_poll +ffffffff8171eb00 T tulip_21140_mediainit +ffffffff8171eb50 T tulip_21140_evalboard_media_probe +ffffffff8171ed30 T tulip_21140_accton_media_probe +ffffffff8171ef50 T tulip_21140_smc9332_media_probe +ffffffff8171f170 T tulip_21140_cogent_em100_media_probe +ffffffff8171f2e0 T tulip_21140_znyx_zx34x_media_probe +ffffffff8171f530 T tulip_2114x_media_probe +ffffffff8171f560 T tulip_delay_300ns +ffffffff8171f670 T tulip_srom_idle +ffffffff81720010 T tulip_srom_read +ffffffff81720db0 T tulip_mii_writebits +ffffffff81721340 T tulip_mii_turnaround +ffffffff81721b10 T tulip_mii_readbits +ffffffff81721ef0 T tulip_identify_dec_nic +ffffffff81721fa0 T tulip_identify_znyx_nic +ffffffff817222a0 T tulip_identify_smc_nic +ffffffff81722470 T tulip_identify_cogent_nic +ffffffff81722560 T tulip_identify_accton_nic +ffffffff81722690 T tulip_identify_asante_nic +ffffffff81722960 T tulip_identify_compex_nic +ffffffff81722ab0 T tulip_srom_decode +ffffffff817236e0 T tulip_read_macaddr +ffffffff81724050 T tulip_ifmedia_add +ffffffff81724140 T tulip_ifmedia_change +ffffffff81724320 T tulip_ifmedia_status +ffffffff81724390 T tulip_alloc_rxmap +ffffffff817243d0 T tulip_free_rxmap +ffffffff81724410 T tulip_alloc_txmap +ffffffff81724450 T tulip_free_txmap +ffffffff81724490 T tulip_addr_filter +ffffffff817247e0 T tulip_rx_intr +ffffffff81724e00 T tulip_txput_setup +ffffffff817250b0 T tulip_tx_intr +ffffffff817254b0 T tulip_print_abnormal_interrupt +ffffffff817254e0 T tulip_intr_handler +ffffffff81725870 T tulip_ifstart +ffffffff81725940 T tulip_intr_shared +ffffffff817259b0 T tulip_intr_normal +ffffffff81725a00 T tulip_ifioctl +ffffffff81725b00 T tulip_ifwatchdog +ffffffff81725c00 T tulip_busdma_allocmem +ffffffff81725d90 T tulip_busdma_init +ffffffff81725fb0 T tulip_initcsrs +ffffffff817260b0 T tulip_initring +ffffffff81727000 T ep_pci_match +ffffffff81727030 T ep_pci_attach +ffffffff81728000 T pcn_match +ffffffff81728070 T pcn_attach +ffffffff817287c0 T pcn_tick +ffffffff81728810 T pcn_reset +ffffffff81728880 T pcn_intr +ffffffff81728af0 T pcn_ioctl +ffffffff81728c50 T pcn_start +ffffffff817290a0 T pcn_watchdog +ffffffff81729110 T pcn_txintr +ffffffff817295a0 T pcn_init +ffffffff81729e40 T pcn_stop +ffffffff81729fc0 T pcn_rxintr +ffffffff8172a4d0 T pcn_spnd +ffffffff8172a5d0 T pcn_add_rxbuf +ffffffff8172a7c0 T pcn_rxdrain +ffffffff8172a860 T pcn_set_filter +ffffffff8172a9c0 T pcn_79c970_mediainit +ffffffff8172aad0 T pcn_79c970_mediachange +ffffffff8172ac60 T pcn_79c970_mediastatus +ffffffff8172aca0 T pcn_79c971_mediainit +ffffffff8172ad70 T pcn_mii_readreg +ffffffff8172ae30 T pcn_mii_writereg +ffffffff8172aed0 T pcn_mii_statchg +ffffffff8172af30 T pcn_79c971_mediachange +ffffffff8172af80 T pcn_79c971_mediastatus +ffffffff8172b000 T siop_lookup_product +ffffffff8172b0a0 T siop_pci_attach_common +ffffffff8172b520 T siop_pci_reset +ffffffff8172c000 T siop_pci_match +ffffffff8172c050 T siop_pci_attach +ffffffff8172d000 T sii3114_read_reg +ffffffff8172d060 T sii3114_write_reg +ffffffff8172d0d0 T pdc203xx_read_reg +ffffffff8172d130 T pdc203xx_write_reg +ffffffff8172d1a0 T svwsata_read_reg +ffffffff8172d210 T svwsata_write_reg +ffffffff8172d260 T svwsata_lba48_write_reg +ffffffff8172d2b0 T pciide_pci_read +ffffffff8172d300 T pciide_pci_write +ffffffff8172d370 T default_chip_map +ffffffff8172d9d0 T artisea_chip_map +ffffffff8172dc70 T piix_chip_map +ffffffff8172e2b0 T piixsata_chip_map +ffffffff8172e7f0 T sch_chip_map +ffffffff8172eb50 T amd756_chip_map +ffffffff8172efb0 T ixp_chip_map +ffffffff8172f360 T cmd_chip_map +ffffffff8172f4c0 T cmd0643_9_chip_map +ffffffff8172f7b0 T cmd680_chip_map +ffffffff8172f990 T sii3112_chip_map +ffffffff8172fd20 T sii3114_chip_map +ffffffff81730260 T apollo_chip_map +ffffffff81730900 T sata_chip_map +ffffffff81730b20 T cy693_chip_map +ffffffff81730ef0 T sis_chip_map +ffffffff81731690 T natsemi_chip_map +ffffffff81731b30 T ns_scx200_chip_map +ffffffff81731f00 T acer_chip_map +ffffffff817325c0 T hpt_chip_map +ffffffff81732ae0 T pdc202xx_chip_map +ffffffff817334e0 T pdcsata_chip_map +ffffffff81733ca0 T acard_chip_map +ffffffff81733f30 T serverworks_chip_map +ffffffff81734280 T svwsata_chip_map +ffffffff81734650 T nforce_chip_map +ffffffff81734ac0 T ite_chip_map +ffffffff81734d80 T jmicron_chip_map +ffffffff81735190 T phison_chip_map +ffffffff817354f0 T rdc_chip_map +ffffffff81735980 T pciide_match +ffffffff81735a20 T pciide_attach +ffffffff81735b00 T pciide_detach +ffffffff81735b60 T pciide_activate +ffffffff81736290 T pciide_lookup_product +ffffffff81736540 T pciide_dmacmd_read +ffffffff81736570 T pciide_dmacmd_write +ffffffff817365a0 T pciide_dmactl_read +ffffffff817365d0 T pciide_dmactl_write +ffffffff81736600 T pciide_dmatbl_write +ffffffff81736630 T pciide_mapregs_compat +ffffffff817367b0 T pciide_unmapregs_compat +ffffffff81736840 T pciide_mapregs_native +ffffffff81736b30 T pciide_unmapregs_native +ffffffff81736bc0 T pciide_mapreg_dma +ffffffff81736d50 T pciide_dma_init +ffffffff81736ff0 T pciide_dma_start +ffffffff81737070 T pciide_dma_finish +ffffffff81737240 T pciide_unmapreg_dma +ffffffff81737270 T pciide_intr_flag +ffffffff81737480 T pciide_compat_intr +ffffffff81737500 T pciide_pci_intr +ffffffff817375c0 T pciide_channel_dma_setup +ffffffff81737690 T pciide_dma_table_setup +ffffffff817378e0 T pciide_irqack +ffffffff81737930 T pciide_chansetup +ffffffff81737a10 T pciide_chanfree +ffffffff81737a60 T pciide_mapchan +ffffffff81737af0 T pciide_unmap_chan +ffffffff81737bc0 T pciide_chan_candisable +ffffffff81737c30 T pciide_map_compat_intr +ffffffff81737ce0 T pciide_unmap_compat_intr +ffffffff81737d40 T pciide_print_channels +ffffffff81737e10 T pciide_print_modes +ffffffff81737e20 T default_chip_unmap +ffffffff81737f00 T sata_setup_channel +ffffffff81738020 T piix_timing_debug +ffffffff81738050 T piix_setup_channel +ffffffff81738540 T piix3_4_setup_channel +ffffffff81738d40 T piix_setup_idetim_timings +ffffffff81738db0 T piix_setup_idetim_drvs +ffffffff81738ec0 T piix_setup_sidetim_timings +ffffffff81738f30 T amd756_setup_channel +ffffffff817392e0 T apollo_setup_channel +ffffffff81739630 T cmd_channel_map +ffffffff81739970 T cmd_pci_intr +ffffffff81739a80 T cmd646_9_irqack +ffffffff81739b80 T cmd0643_9_setup_channel +ffffffff81739fb0 T cmd680_setup_channel +ffffffff8173a4a0 T cmd680_channel_map +ffffffff8173a7a0 T sii_fixup_cacheline +ffffffff8173aa70 T sii3112_setup_channel +ffffffff8173ac30 T sii3112_drv_probe +ffffffff8173af80 T sii3114_mapreg_dma +ffffffff8173b240 T sii3114_chansetup +ffffffff8173b300 T sii3114_mapchan +ffffffff8173b5f0 T sii3114_dmacmd_read +ffffffff8173b630 T sii3114_dmacmd_write +ffffffff8173b670 T sii3114_dmactl_read +ffffffff8173b6b0 T sii3114_dmactl_write +ffffffff8173b6f0 T sii3114_dmatbl_write +ffffffff8173b730 T cy693_setup_channel +ffffffff8173b950 T sis_hostbr_match +ffffffff8173ba20 T sis_south_match +ffffffff8173ba60 T sis_setup_channel +ffffffff8173bdb0 T sis96x_setup_channel +ffffffff8173c060 T natsemi_irqack +ffffffff8173c0f0 T natsemi_setup_channel +ffffffff8173c4e0 T natsemi_pci_intr +ffffffff8173c5d0 T ns_scx200_setup_channel +ffffffff8173c8b0 T acer_dma_init +ffffffff8173c8f0 T acer_setup_channel +ffffffff8173cd00 T acer_pci_intr +ffffffff8173cde0 T hpt_setup_channel +ffffffff8173d130 T hpt_pci_intr +ffffffff8173d240 T pdc268_config_read +ffffffff8173d2b0 T pdc20268_setup_channel +ffffffff8173d480 T pdc202xx_setup_channel +ffffffff8173d8d0 T pdc20262_dma_start +ffffffff8173da30 T pdc20262_dma_finish +ffffffff8173db00 T pdc20265_pci_intr +ffffffff8173dcb0 T pdc202xx_pci_intr +ffffffff8173ddc0 T pdc203xx_pci_intr +ffffffff8173deb0 T pdc205xx_pci_intr +ffffffff8173dfe0 T pdc203xx_irqack +ffffffff8173e070 T pdc203xx_setup_channel +ffffffff8173e170 T pdc205xx_do_reset +ffffffff8173e210 T pdc205xx_drv_probe +ffffffff8173e490 T pdc203xx_dma_start +ffffffff8173e550 T pdc203xx_dma_finish +ffffffff8173e640 T serverworks_setup_channel +ffffffff8173ea50 T serverworks_pci_intr +ffffffff8173eb60 T svwsata_mapreg_dma +ffffffff8173ec10 T svwsata_drv_probe +ffffffff8173eee0 T svwsata_mapchan +ffffffff8173efd0 T svwsata_dmacmd_read +ffffffff8173f000 T svwsata_dmacmd_write +ffffffff8173f030 T svwsata_dmactl_read +ffffffff8173f060 T svwsata_dmactl_write +ffffffff8173f090 T svwsata_dmatbl_write +ffffffff8173f0c0 T acard_setup_channel +ffffffff8173f4f0 T nforce_setup_channel +ffffffff8173f830 T nforce_pci_intr +ffffffff8173f920 T ite_setup_channel +ffffffff8173fc80 T ixp_setup_channel +ffffffff81740030 T jmicron_setup_channel +ffffffff81740290 T phison_setup_channel +ffffffff817404a0 T sch_setup_channel +ffffffff817406a0 T rdc_setup_channel +ffffffff81740ac0 t ba5_read_4_ind +ffffffff81740b50 t ba5_write_4_ind +ffffffff81741000 T ppbmatch +ffffffff81741050 T ppbattach +ffffffff817417d0 T ppbdetach +ffffffff817418f0 T ppbactivate +ffffffff81741d60 T ppb_alloc_busrange +ffffffff81741f10 T ppb_hotplug_insert +ffffffff81741f70 T ppb_hotplug_rescan +ffffffff81741fb0 T ppb_hotplug_remove +ffffffff81742110 T ppb_hotplug_insert_finish +ffffffff81742140 T ppb_intr +ffffffff81742200 T ppb_alloc_resources +ffffffff817428f0 T ppbprint +ffffffff81743000 T cy_pci_match +ffffffff81743030 T cy_pci_attach +ffffffff81744000 T rl_pci_match +ffffffff81744060 T rl_pci_attach +ffffffff81744220 T rl_pci_detach +ffffffff81745000 T re_pci_probe +ffffffff817450a0 T re_pci_attach +ffffffff817453d0 T re_pci_detach +ffffffff81745490 T re_pci_activate +ffffffff81746000 T vr_probe +ffffffff817460d0 T vr_attach +ffffffff817466a0 T vr_activate +ffffffff81746720 T vr_mii_readreg +ffffffff81746880 T vr_mii_writereg +ffffffff817469d0 T vr_miibus_readreg +ffffffff81746a40 T vr_miibus_writereg +ffffffff81746ab0 T vr_miibus_statchg +ffffffff81746ad0 T vr_setcfg +ffffffff81746cf0 T vr_iff +ffffffff81746e70 T vr_reset +ffffffff81746f80 T vr_quirks +ffffffff81747080 T vr_dmamem_alloc +ffffffff817471e0 T vr_dmamem_free +ffffffff81747250 T vr_intr +ffffffff81747480 T vr_chipinit +ffffffff81747560 T vr_ioctl +ffffffff81747700 T vr_start +ffffffff817478d0 T vr_watchdog +ffffffff81747960 T vr_wol +ffffffff81747b10 T vr_ifmedia_upd +ffffffff81747b60 T vr_ifmedia_sts +ffffffff81747bc0 T vr_tick +ffffffff81747c40 T vr_rxtick +ffffffff81747d20 T vr_stop +ffffffff81747fb0 T vr_init +ffffffff81748560 T vr_list_tx_init +ffffffff81748660 T vr_list_rx_init +ffffffff81748820 T vr_fill_rx_ring +ffffffff817488e0 T vr_alloc_mbuf +ffffffff81748a50 T vr_rxeof +ffffffff81748ce0 T vr_rxeoc +ffffffff81748e70 T vr_txeof +ffffffff81749030 T vr_encap +ffffffff8174a000 T txp_probe +ffffffff8174a030 T txp_attach +ffffffff8174a1a0 T txp_attachhook +ffffffff8174a4d0 T txp_chip_init +ffffffff8174a690 T txp_download_fw +ffffffff8174ab10 T txp_alloc_rings +ffffffff8174b680 T txp_command +ffffffff8174b750 T txp_ifmedia_upd +ffffffff8174b860 T txp_ifmedia_sts +ffffffff8174bb20 T txp_ioctl +ffffffff8174bc40 T txp_start +ffffffff8174c000 T txp_watchdog +ffffffff8174c030 T txp_capabilities +ffffffff8174c1e0 T txp_tick +ffffffff8174c330 T txp_intr +ffffffff8174c5a0 T txp_reset_adapter +ffffffff8174c6a0 T txp_download_fw_wait +ffffffff8174c790 T txp_download_fw_section +ffffffff8174cb00 T txp_dma_malloc +ffffffff8174cca0 T txp_dma_free +ffffffff8174cd20 T txp_rx_reclaim +ffffffff8174cff0 T txp_rxbuf_reclaim +ffffffff8174d270 T txp_tx_reclaim +ffffffff8174d410 T txp_init +ffffffff8174d550 T txp_stop +ffffffff8174d650 T txp_set_filter +ffffffff8174d7e0 T txp_command2 +ffffffff8174dae0 T txp_cmd_desc_numfree +ffffffff8174db40 T txp_response +ffffffff8174de10 T txp_rsp_fixup +ffffffff8174def0 T txp_show_descriptor +ffffffff8174f000 T init_audio_devices +ffffffff8174f120 T init_BTSC +ffffffff8174f1e0 T set_audio +ffffffff8174f570 T set_bctv_audio +ffffffff8174f8b0 T msp_autodetect +ffffffff8174fce0 T temp_mute +ffffffff8174fd80 T set_BTSC +ffffffff8174fda0 T bctv_gpio_write +ffffffff8174ff10 T msp_read_id +ffffffff8174ffd0 T dpl_read_id +ffffffff81750090 T dpl_autodetect +ffffffff81751000 T writeEEProm +ffffffff81751030 T readEEProm +ffffffff81751100 T signCard +ffffffff817511b0 T probeCard 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em_setup_interface +ffffffff8175fc80 T em_update_link_status +ffffffff8175fe90 T em_local_timer +ffffffff8175ff40 T em_82547_move_tail +ffffffff8175ff80 T em_identify_hardware +ffffffff81760090 T em_allocate_pci_resources +ffffffff81760490 T em_allocate_desc_rings +ffffffff817605a0 T em_hardware_init +ffffffff81760850 T em_kstat_attach +ffffffff817609a0 T em_start +ffffffff81760c90 T em_encap +ffffffff81761140 T em_82547_move_tail_locked +ffffffff81761370 T em_82547_update_fifo_head +ffffffff817613c0 T em_ioctl +ffffffff81761690 T em_init +ffffffff81761a00 T em_get_sffpage +ffffffff81761ac0 T em_disable_intr +ffffffff81761bc0 T em_iff +ffffffff81761ed0 T em_initialize_receive_unit +ffffffff81762650 T em_enable_intr +ffffffff817627b0 T em_watchdog +ffffffff81762960 T em_enable_hw_vlans +ffffffff81762a00 T em_setup_transmit_structures +ffffffff81762c00 T em_initialize_transmit_unit +ffffffff81763260 T em_setup_receive_structures +ffffffff817633a0 T em_setup_queues_msix +ffffffff81763a10 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em_hv_phy_workarounds_ich8lan +ffffffff8176a5f0 T em_lv_phy_workarounds_ich8lan +ffffffff8176a6f0 t em_phy_init_script +ffffffff8176a950 T em_read_eeprom +ffffffff8176afc0 T em_set_eee_i350 +ffffffff8176b0e0 T em_init_hw +ffffffff8176cb20 T em_phy_reset +ffffffff8176cd10 T em_clear_vfta_i350 +ffffffff8176cef0 T em_read_phy_reg +ffffffff8176d0a0 T em_setup_link +ffffffff8176f340 T em_enable_tx_pkt_filtering +ffffffff8176f700 T em_clear_hw_cntrs +ffffffff8176fff0 T em_write_phy_reg +ffffffff81770170 T em_power_up_serdes_link_82575 +ffffffff81770260 T em_copper_link_autoneg +ffffffff81770390 T em_phy_setup_autoneg +ffffffff817704f0 T em_copper_link_postconfig +ffffffff817705c0 T em_config_collision_dist +ffffffff81770650 t em_config_mac_to_phy +ffffffff817707c0 t em_config_fc_after_link_up +ffffffff81770a10 t em_config_dsp_after_link_change +ffffffff817713b0 T em_force_mac_fc +ffffffff81771480 T em_check_for_link +ffffffff81771b00 T em_get_pcs_speed_and_duplex_82575 +ffffffff81771bc0 T em_k1_gig_workaround_hv +ffffffff81771cf0 T em_link_stall_workaround_hv +ffffffff81771dd0 T em_k1_workaround_lv +ffffffff81771e90 T em_k1_workaround_lpt_lp +ffffffff81772150 t em_check_downshift +ffffffff81772200 T em_set_eee_pchlan +ffffffff817722a0 t em_polarity_reversal_workaround +ffffffff817724e0 T em_get_speed_and_duplex +ffffffff81772990 T em_access_phy_wakeup_reg_bm +ffffffff81772af0 t em_write_phy_reg_ex +ffffffff81772d60 t em_read_phy_reg_ex +ffffffff81773210 T em_access_phy_debug_regs_hv +ffffffff817732e0 T em_access_phy_reg_hv +ffffffff81773450 t em_swfw_sync_acquire +ffffffff81773600 t em_swfw_sync_release +ffffffff81773770 T em_sgmii_uses_mdio_82575 +ffffffff817737d0 T em_read_phy_reg_i2c +ffffffff817738b0 T em_write_phy_reg_i2c +ffffffff81773980 T em_phy_hw_reset +ffffffff81773f90 T em_oem_bits_config_pchlan +ffffffff81774100 T em_initialize_M88E1512_phy +ffffffff817742c0 T em_init_eeprom_params +ffffffff817747d0 T em_get_flash_presence_i210 +ffffffff81774830 t em_acquire_eeprom +ffffffff81774a20 t em_read_eeprom_ich8 +ffffffff81774bf0 t em_release_eeprom +ffffffff81774d60 t em_standby_eeprom +ffffffff81774f50 t em_shift_out_ee_bits +ffffffff817750f0 t em_shift_in_ee_bits +ffffffff81775230 T em_validate_eeprom_checksum +ffffffff817753d0 T em_write_eeprom +ffffffff817756f0 T em_update_eeprom_checksum +ffffffff81775810 t em_commit_shadow_ram +ffffffff81775d70 t em_write_eeprom_microwire +ffffffff81775ef0 t em_write_eeprom_spi +ffffffff817760b0 T em_read_part_num +ffffffff81776150 T em_read_mac_addr +ffffffff817762d0 T em_mc_addr_list_update +ffffffff817763e0 T em_hash_mc_addr +ffffffff817764e0 T em_mta_set +ffffffff81776650 T em_rar_set +ffffffff81776780 T em_get_bus_info +ffffffff81776910 T em_check_mng_mode +ffffffff81776990 T em_valid_nvm_bank_detect_ich8lan +ffffffff81776b40 T em_read_eeprom_spt +ffffffff81776e00 t em_release_software_flag +ffffffff81776eb0 T em_read_ich8_data32 +ffffffff81777020 t em_ich8_cycle_init +ffffffff817771c0 t em_ich8_flash_cycle +ffffffff81777310 T em_configure_k1_ich8lan +ffffffff81777530 t em_toggle_lanphypc_pch_lpt +ffffffff81777690 t em_copper_link_ggp_setup +ffffffff81777940 t em_copper_link_82580_setup +ffffffff817779d0 t em_copper_link_rtl8211_setup +ffffffff81777c60 t em_phy_reset_dsp +ffffffff81777ce0 t em_get_hw_eeprom_semaphore +ffffffff81777e50 t em_shift_out_mdi_bits +ffffffff81777fe0 t em_erase_ich8_4k_segment +ffffffff81778220 t em_write_ich8_byte +ffffffff81778390 t em_read_ich8_data +ffffffff81779000 T em_lookup_gcu +ffffffff81779030 T em_attach_miibus +ffffffff81779060 T gcu_miibus_readreg +ffffffff817791d0 T gcu_miibus_writereg +ffffffff81779320 T gcu_miibus_statchg +ffffffff8177a000 T ixgb_probe +ffffffff8177a030 T ixgb_attach +ffffffff8177a470 T ixgb_local_timer +ffffffff8177a520 T ixgb_identify_hardware +ffffffff8177a620 T ixgb_allocate_pci_resources +ffffffff8177a7b0 T ixgb_dma_malloc +ffffffff8177a9b0 T ixgb_hardware_init +ffffffff8177aa70 T ixgb_setup_interface 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ixgb_free_receive_structures +ffffffff8177d6e0 T ixgb_allocate_transmit_structures +ffffffff8177d760 T ixgb_transmit_checksum_setup +ffffffff8177d860 T ixgb_get_buf +ffffffff8177da10 T ixgb_allocate_receive_structures +ffffffff8177db90 T ixgb_receive_checksum +ffffffff8177dbf0 T ixgb_write_pci_cfg +ffffffff8177e000 T ixgb_validate_eeprom_checksum +ffffffff8177e080 T ixgb_read_eeprom +ffffffff8177e2f0 T ixgb_update_eeprom_checksum +ffffffff8177e350 T ixgb_write_eeprom +ffffffff8177e830 t ixgb_shift_out_bits +ffffffff8177e970 T ixgb_get_eeprom_data +ffffffff8177ea10 T ixgb_get_eeprom_word +ffffffff8177eae0 T ixgb_get_ee_mac_addr +ffffffff8177ebe0 T ixgb_get_ee_pba_number +ffffffff8177eca0 T ixgb_get_ee_device_id +ffffffff8177f000 T ixgb_mac_reset +ffffffff8177f1e0 T ixgb_adapter_stop +ffffffff8177f320 T ixgb_init_hw +ffffffff8177f620 T ixgb_init_rx_addrs +ffffffff8177f750 T mac_addr_valid +ffffffff8177f7b0 T ixgb_clear_vfta +ffffffff8177f830 T ixgb_clear_hw_cntrs +ffffffff8177ff10 T ixgb_setup_fc +ffffffff817800a0 T ixgb_check_for_link +ffffffff817802b0 T ixgb_rar_set +ffffffff81780320 T ixgb_mc_addr_list_update +ffffffff817805a0 T ixgb_write_vfta +ffffffff817805d0 T ixgb_read_phy_reg +ffffffff81780ad0 T ixgb_write_phy_reg +ffffffff81780fc0 T ixgb_check_for_bad_link +ffffffff81781080 T ixgb_led_on +ffffffff817810d0 T ixgb_led_off +ffffffff81782000 T ixgbe_probe +ffffffff81782030 T ixgbe_attach +ffffffff81782580 T ixgbe_detach +ffffffff81782790 T ixgbe_activate +ffffffff817828a0 T ixgbe_identify_hardware +ffffffff81782960 T ixgbe_allocate_pci_resources +ffffffff81782ab0 T ixgbe_allocate_queues +ffffffff81782fb0 T ixgbe_allocate_msix +ffffffff817831e0 T ixgbe_allocate_legacy +ffffffff81783300 T ixgbe_setup_interface +ffffffff81783660 T ixgbe_free_transmit_structures +ffffffff817836e0 T ixgbe_free_receive_structures +ffffffff817837a0 T ixgbe_free_pci_resources +ffffffff81783880 T ixgbe_stop +ffffffff81783b80 T ixgbe_init +ffffffff81784760 T ixgbe_start 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ixgbe_free_receive_buffers +ffffffff817897e0 T ixgbe_rx_checksum +ffffffff81789830 T ixgbe_read_pci_cfg +ffffffff81789890 T ixgbe_write_pci_cfg +ffffffff81789910 t ix_kstats_read +ffffffff81789ad0 t ix_rxq_kstats_read +ffffffff81789c30 t ix_txq_kstats_read +ffffffff8178a000 T ixgbe_init_ops_generic +ffffffff8178a270 T ixgbe_init_eeprom_params_generic +ffffffff8178a320 T ixgbe_read_eerd_generic +ffffffff8178a420 T ixgbe_read_eeprom_bit_bang_generic +ffffffff8178a6c0 T ixgbe_write_eeprom_generic +ffffffff8178ab10 T ixgbe_validate_eeprom_checksum_generic +ffffffff8178abc0 T ixgbe_update_eeprom_checksum_generic +ffffffff8178ac40 T ixgbe_calc_eeprom_checksum_generic +ffffffff8178ade0 T ixgbe_init_hw_generic +ffffffff8178ae40 T ixgbe_start_hw_generic +ffffffff8178af60 T ixgbe_clear_hw_cntrs_generic +ffffffff8178b940 T ixgbe_enable_rx_dma_generic +ffffffff8178b9a0 T ixgbe_get_mac_addr_generic +ffffffff8178ba30 T ixgbe_stop_adapter_generic +ffffffff8178bbb0 T ixgbe_get_bus_info_generic +ffffffff8178bc60 T ixgbe_set_lan_id_multi_port_pcie +ffffffff8178bd30 T ixgbe_acquire_swfw_sync +ffffffff8178bf60 T ixgbe_release_swfw_sync +ffffffff8178c010 T prot_autoc_read_generic +ffffffff8178c070 T prot_autoc_write_generic +ffffffff8178c0c0 T ixgbe_led_on_generic +ffffffff8178c180 T ixgbe_led_off_generic +ffffffff8178c230 T ixgbe_blink_led_start_generic +ffffffff8178c3a0 T ixgbe_blink_led_stop_generic +ffffffff8178c4c0 T ixgbe_set_rar_generic +ffffffff8178c5e0 T ixgbe_clear_rar_generic +ffffffff8178c6e0 T ixgbe_init_rx_addrs_generic +ffffffff8178c8e0 T ixgbe_update_mc_addr_list_generic +ffffffff8178cae0 T ixgbe_enable_mc_generic +ffffffff8178cb50 T ixgbe_disable_mc_generic +ffffffff8178cbb0 T ixgbe_enable_rx_generic +ffffffff8178cc70 T ixgbe_disable_rx_generic +ffffffff8178cd50 T ixgbe_fc_enable_generic +ffffffff8178d180 T ixgbe_setup_fc_generic +ffffffff8178d450 T ixgbe_fc_autoneg +ffffffff8178d730 T ixgbe_device_supports_autoneg_fc +ffffffff8178d820 T ixgbe_start_hw_gen2 +ffffffff8178da00 T ixgbe_identify_phy +ffffffff8178da60 T ixgbe_set_pci_config_data_generic +ffffffff8178dad0 T ixgbe_disable_rx +ffffffff8178db10 T ixgbe_disable_pcie_master +ffffffff8178dc60 T ixgbe_read_eerd_buffer_generic +ffffffff8178dda0 T ixgbe_poll_eerd_eewr_done +ffffffff8178de40 T ixgbe_write_eewr_buffer_generic +ffffffff8178dfc0 T ixgbe_write_eewr_generic +ffffffff8178e010 T ixgbe_acquire_eeprom +ffffffff8178e190 T ixgbe_get_eeprom_semaphore +ffffffff8178e3a0 T ixgbe_release_eeprom_semaphore +ffffffff8178e410 T ixgbe_ready_eeprom +ffffffff8178e580 T ixgbe_shift_out_eeprom_bits +ffffffff8178e740 T ixgbe_shift_in_eeprom_bits +ffffffff8178e8a0 T ixgbe_standby_eeprom +ffffffff8178e980 T ixgbe_raise_eeprom_clk +ffffffff8178e9f0 T ixgbe_lower_eeprom_clk +ffffffff8178ea60 T ixgbe_release_eeprom +ffffffff8178eb40 T ixgbe_validate_mac_addr +ffffffff8178eba0 T ixgbe_init_uta_tables +ffffffff8178ebe0 T ixgbe_add_uc_addr +ffffffff8178ec50 T ixgbe_mta_vector +ffffffff8178ed00 T ixgbe_set_mta +ffffffff8178edc0 T ixgbe_negotiate_fc +ffffffff8178ee70 T ixgbe_fc_autoneg_fiber +ffffffff8178ef90 T ixgbe_fc_autoneg_backplane +ffffffff8178f100 T ixgbe_fc_autoneg_copper +ffffffff8178f220 T ixgbe_disable_sec_rx_path_generic +ffffffff8178f2e0 T ixgbe_enable_sec_rx_path_generic +ffffffff8178f370 T ixgbe_enable_rx +ffffffff8178f3b0 T ixgbe_get_pcie_msix_count_generic +ffffffff8178f430 T ixgbe_insert_mac_addr_generic +ffffffff8178f640 T ixgbe_set_vmdq +ffffffff8178f680 T ixgbe_set_rar +ffffffff8178f6d0 T ixgbe_clear_vmdq +ffffffff8178f710 T ixgbe_clear_vmdq_generic +ffffffff8178f8c0 T ixgbe_set_vmdq_generic +ffffffff8178f970 T ixgbe_init_uta_tables_generic +ffffffff8178f9f0 T ixgbe_find_vlvf_slot +ffffffff8178faa0 T ixgbe_set_vfta_generic +ffffffff8178fbb0 T ixgbe_set_vlvf_generic +ffffffff8178fe40 T ixgbe_clear_vfta_generic +ffffffff8178ff40 T ixgbe_need_crosstalk_fix +ffffffff8178ff90 T ixgbe_check_mac_link_generic +ffffffff81790180 T ixgbe_get_device_caps_generic +ffffffff817901d0 T ixgbe_calculate_checksum +ffffffff81790290 T ixgbe_hic_unlocked +ffffffff81790450 T ixgbe_host_interface_command +ffffffff81790620 T ixgbe_clear_tx_pending +ffffffff817907e0 T ixgbe_mng_present +ffffffff81790850 T ixgbe_mng_enabled +ffffffff81790910 T ixgbe_setup_mac_link_multispeed_fiber +ffffffff81790cb0 T ixgbe_flap_tx_laser +ffffffff81790cf0 T ixgbe_check_link +ffffffff81790d40 T ixgbe_set_soft_rate_select_speed +ffffffff81790e30 T ixgbe_init_shared_code +ffffffff81790ee0 T ixgbe_set_mac_type +ffffffff81791080 T ixgbe_init_hw +ffffffff817910c0 T ixgbe_get_media_type +ffffffff81791100 T ixgbe_read_mbx +ffffffff81791160 T ixgbe_write_mbx +ffffffff817911b0 T ixgbe_check_for_msg +ffffffff817911f0 T ixgbe_check_for_ack +ffffffff81791230 T ixgbe_check_for_rst +ffffffff81791270 T ixgbe_poll_for_msg +ffffffff81791330 T ixgbe_poll_for_ack +ffffffff817913f0 T ixgbe_read_posted_mbx +ffffffff817914d0 T ixgbe_write_posted_mbx +ffffffff817915a0 T ixgbe_init_mbx_ops_generic +ffffffff817915e0 T ixgbe_read_v2p_mailbox +ffffffff81791650 T ixgbe_check_for_bit_pf +ffffffff817916e0 T ixgbe_check_for_msg_pf +ffffffff81791790 T ixgbe_check_for_ack_pf +ffffffff81791830 T ixgbe_check_for_rst_pf +ffffffff81791920 T ixgbe_obtain_mbx_lock_pf +ffffffff817919b0 T ixgbe_write_mbx_pf +ffffffff81791b80 T ixgbe_read_mbx_pf +ffffffff81791c90 T ixgbe_init_mbx_params_pf +ffffffff81792000 T ixgbe_set_pcie_completion_timeout +ffffffff81792090 T ixgbe_init_ops_82598 +ffffffff817921e0 T ixgbe_init_phy_ops_82598 +ffffffff817922d0 T ixgbe_start_hw_82598 +ffffffff81792480 T ixgbe_reset_hw_82598 +ffffffff817927b0 T ixgbe_get_media_type_82598 +ffffffff81792870 T ixgbe_get_supported_physical_layer_82598 +ffffffff81792a40 T ixgbe_read_analog_reg8_82598 +ffffffff81792b00 T ixgbe_write_analog_reg8_82598 +ffffffff81792b80 T ixgbe_set_lan_id_multi_port_pcie_82598 +ffffffff81792c20 T ixgbe_enable_rx_dma_82598 +ffffffff81792c70 T ixgbe_set_vmdq_82598 +ffffffff81792d20 T ixgbe_clear_vmdq_82598 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ixgbe_get_swfw_sync_semaphore +ffffffff81798700 T ixgbe_release_swfw_sync_semaphore +ffffffff81799000 T ixgbe_init_ops_X550 +ffffffff81799110 T ixgbe_dmac_config_X550 +ffffffff817991f0 T ixgbe_dmac_config_tcs_X550 +ffffffff81799340 T ixgbe_dmac_update_tcs_X550 +ffffffff81799400 T ixgbe_set_source_address_pruning_X550 +ffffffff817994f0 T ixgbe_init_eeprom_params_X550 +ffffffff81799570 T ixgbe_calc_eeprom_checksum_X550 +ffffffff81799590 T ixgbe_read_ee_hostif_X550 +ffffffff81799660 T ixgbe_write_ee_hostif_X550 +ffffffff81799720 T ixgbe_update_eeprom_checksum_X550 +ffffffff817998c0 T ixgbe_validate_eeprom_checksum_X550 +ffffffff81799a10 T ixgbe_disable_rx_x550 +ffffffff81799b30 T ixgbe_led_on_t_X550em +ffffffff81799bf0 T ixgbe_led_off_t_X550em +ffffffff81799cb0 T ixgbe_read_cs4227 +ffffffff81799ce0 T ixgbe_write_cs4227 +ffffffff81799d10 T ixgbe_read_pe +ffffffff81799d60 T ixgbe_write_pe +ffffffff81799dc0 T ixgbe_reset_cs4227 +ffffffff8179a050 T ixgbe_check_cs4227 +ffffffff8179a200 T ixgbe_setup_mux_ctl +ffffffff8179a290 T ixgbe_identify_phy_x550em +ffffffff8179a4a0 T ixgbe_read_mng_if_sel_x550em +ffffffff8179a520 T ixgbe_fw_phy_activity +ffffffff8179a640 T ixgbe_get_phy_id_fw +ffffffff8179a750 T ixgbe_identify_phy_fw +ffffffff8179a870 T ixgbe_shutdown_fw_phy +ffffffff8179a8d0 T ixgbe_read_phy_reg_x550em +ffffffff8179a900 T ixgbe_write_phy_reg_x550em +ffffffff8179a930 T ixgbe_init_ops_X550EM +ffffffff8179abd0 T ixgbe_get_bus_info_X550em +ffffffff8179ac20 T ixgbe_get_media_type_X550em +ffffffff8179acf0 T ixgbe_setup_sfp_modules_X550em +ffffffff8179ae80 T ixgbe_get_link_capabilities_X550em +ffffffff8179af50 T ixgbe_reset_hw_X550em +ffffffff8179b3d0 T ixgbe_get_supported_physical_layer_X550em +ffffffff8179b550 T ixgbe_setup_fc_X550em +ffffffff8179b6b0 T ixgbe_init_phy_ops_X550em +ffffffff8179bb80 T ixgbe_setup_fw_link +ffffffff8179bca0 T ixgbe_fc_autoneg_fw +ffffffff8179bcd0 T ixgbe_setup_eee_fw +ffffffff8179bd30 T ixgbe_init_ops_X550EM_a +ffffffff8179be60 T ixgbe_read_iosf_sb_reg_x550 +ffffffff8179bfd0 T ixgbe_write_iosf_sb_reg_x550 +ffffffff8179c140 T ixgbe_read_iosf_sb_reg_x550a +ffffffff8179c1d0 T ixgbe_write_iosf_sb_reg_x550a +ffffffff8179c260 T ixgbe_acquire_swfw_sync_X550a +ffffffff8179c3a0 T ixgbe_release_swfw_sync_X550a +ffffffff8179c440 T ixgbe_fc_autoneg_fiber_x550em_a +ffffffff8179c480 T ixgbe_fc_autoneg_backplane_x550em_a +ffffffff8179c5e0 T ixgbe_setup_fc_backplane_x550em_a +ffffffff8179c7d0 T ixgbe_fc_autoneg_sgmii_x550em_a +ffffffff8179c8c0 T ixgbe_init_ops_X550EM_x +ffffffff8179c980 T ixgbe_acquire_swfw_sync_X550em +ffffffff8179ca40 T ixgbe_release_swfw_sync_X550em +ffffffff8179cad0 T ixgbe_iosf_wait +ffffffff8179cb80 T ixgbe_get_phy_token +ffffffff8179cc00 T ixgbe_put_phy_token +ffffffff8179cc80 T ixgbe_supported_sfp_modules_X550em +ffffffff8179cd00 T ixgbe_identify_sfp_module_X550em +ffffffff8179cd80 T ixgbe_init_mac_link_ops_X550em +ffffffff8179cec0 T ixgbe_restart_an_internal_phy_x550em +ffffffff8179cfd0 T ixgbe_setup_sgmii +ffffffff8179d1a0 T ixgbe_setup_sgmii_fw +ffffffff8179d3a0 T ixgbe_setup_mac_link_sfp_x550a +ffffffff8179d590 T ixgbe_setup_mac_link_sfp_x550em +ffffffff8179d650 T ixgbe_setup_mac_link_t_X550em +ffffffff8179d700 T ixgbe_check_link_t_X550em +ffffffff8179d7e0 T ixgbe_get_lasi_ext_t_x550em +ffffffff8179d960 T ixgbe_enable_lasi_ext_t_x550em +ffffffff8179daf0 T ixgbe_setup_kr_speed_x550em +ffffffff8179dd00 T ixgbe_reset_phy_fw +ffffffff8179ddd0 T ixgbe_check_overtemp_fw +ffffffff8179de60 T ixgbe_read_phy_reg_x550a +ffffffff8179df00 T ixgbe_write_phy_reg_x550a +ffffffff8179dfb0 T ixgbe_setup_kr_x550em +ffffffff8179e020 T ixgbe_setup_internal_phy_t_x550em +ffffffff8179e180 T ixgbe_enter_lplu_t_x550em +ffffffff8179e3d0 T ixgbe_handle_lasi_ext_t_x550em +ffffffff8179e450 T ixgbe_reset_phy_t_X550em +ffffffff8179e4a0 T ixgbe_set_mdio_speed +ffffffff8179e570 T ixgbe_init_ext_t_x550em +ffffffff8179e620 T ixgbe_setup_sfi_x550a +ffffffff8179e7d0 T ixgbe_setup_ixfi_x550em_x +ffffffff8179e9b0 T ixgbe_setup_ixfi_x550em +ffffffff8179eb90 T ixgbe_ext_phy_t_x550em_get_link +ffffffff8179ec20 T ixgbe_setup_phy_loopback_x550em +ffffffff8179ee10 T ixgbe_read_ee_hostif_buffer_X550 +ffffffff8179efb0 T ixgbe_write_ee_hostif_data_X550 +ffffffff8179f020 T ixgbe_checksum_ptr_x550 +ffffffff8179f1b0 T ixgbe_calc_checksum_X550 +ffffffff8179f340 T ixgbe_update_flash_X550 +ffffffff8179f390 T ixgbe_get_lcd_t_x550em +ffffffff8179f450 T ixgbe_set_mux +ffffffff817a0000 T ixgbe_read_i2c_combined_generic_int +ffffffff817a0260 T ixgbe_i2c_start +ffffffff817a03b0 t ixgbe_out_i2c_byte_ack +ffffffff817a0400 T ixgbe_clock_in_i2c_byte +ffffffff817a0500 T ixgbe_clock_out_i2c_bit +ffffffff817a0610 T ixgbe_i2c_stop +ffffffff817a0790 T ixgbe_i2c_bus_clear +ffffffff817a08a0 T ixgbe_read_i2c_combined_generic +ffffffff817a08c0 T ixgbe_read_i2c_combined_generic_unlocked +ffffffff817a08e0 T ixgbe_write_i2c_combined_generic_int +ffffffff817a0aa0 T ixgbe_write_i2c_combined_generic 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iwi_alloc_cmd_ring +ffffffff817f2f70 T iwi_alloc_tx_ring +ffffffff817f3170 T iwi_alloc_rx_ring +ffffffff817f3350 T iwi_read_prom_word +ffffffff817f39d0 T iwi_ioctl +ffffffff817f3b50 T iwi_start +ffffffff817f3cb0 T iwi_watchdog +ffffffff817f3d40 T iwi_newstate +ffffffff817f3fa0 T iwi_send_mgmt +ffffffff817f3fd0 T iwi_media_change +ffffffff817f4030 T iwi_media_status +ffffffff817f41a0 T iwi_init_task +ffffffff817f4210 T iwi_free_tx_ring +ffffffff817f4310 T iwi_free_cmd_ring +ffffffff817f43c0 T iwi_stop +ffffffff817f4650 T iwi_wakeup +ffffffff817f46f0 T iwi_init +ffffffff817f4bd0 T iwi_reset_cmd_ring +ffffffff817f4c10 T iwi_reset_tx_ring +ffffffff817f4cb0 T iwi_free_rx_ring +ffffffff817f4d60 T iwi_reset_rx_ring +ffffffff817f4d90 T iwi_rate +ffffffff817f4e40 T iwi_find_txnode +ffffffff817f4f50 T iwi_scan +ffffffff817f51e0 T iwi_auth_and_assoc +ffffffff817f5840 T iwi_set_chan +ffffffff817f59f0 T iwi_frame_intr +ffffffff817f5d20 T iwi_notification_intr +ffffffff817f5e20 T iwi_rx_intr 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iwn5000_send_calibration +ffffffff81813f70 T iwn5000_send_wimax_coex +ffffffff81814140 T iwn5000_crystal_calib +ffffffff818142f0 T iwn_hw_stop +ffffffff818146e0 T iwn_hw_init +ffffffff81814d80 T iwn4965_load_bootcode +ffffffff81815120 T iwn5000_load_firmware_section +ffffffff81815360 T iwn_read_firmware_leg +ffffffff81815470 T iwn_read_firmware_tlv +ffffffff818156f0 T iwn_read_firmware +ffffffff81815920 T iwn_apm_stop_master +ffffffff81816000 T iwm_lookup_cmd_ver +ffffffff81816070 T iwm_is_mimo_ht_plcp +ffffffff818160b0 T iwm_is_mimo_ht_mcs +ffffffff81816100 T iwm_store_cscheme +ffffffff81816150 T iwm_firmware_store_section +ffffffff818161f0 T iwm_set_default_calib +ffffffff81816240 T iwm_fw_info_free +ffffffff81816290 T iwm_fw_version_str +ffffffff818162d0 T iwm_read_firmware +ffffffff81816b50 T iwm_read_prph_unlocked +ffffffff81816bb0 T iwm_read_prph +ffffffff81816c30 T iwm_nic_assert_locked +ffffffff81816c90 T iwm_write_prph_unlocked +ffffffff81816d00 T iwm_write_prph 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iwm_channel_id_to_papd +ffffffff8181c770 T iwm_channel_id_to_txp +ffffffff8181c900 T iwm_phy_db_get_section_data +ffffffff8181ca90 T iwm_send_phy_db_cmd +ffffffff8181cb30 T iwm_send_cmd +ffffffff8181d210 T iwm_phy_db_send_all_channel_groups +ffffffff8181d3f0 T iwm_send_phy_db_data +ffffffff8181d630 T iwm_send_time_event_cmd +ffffffff8181d740 T iwm_free_resp +ffffffff8181d7c0 T iwm_protect_session +ffffffff8181d870 T iwm_unprotect_session +ffffffff8181d920 T iwm_nvm_read_chunk +ffffffff8181da80 T iwm_nvm_read_section +ffffffff8181db40 T iwm_fw_valid_tx_ant +ffffffff8181db80 T iwm_fw_valid_rx_ant +ffffffff8181dbd0 T iwm_valid_siso_ant_rate_mask +ffffffff8181dc30 T iwm_init_channel_map +ffffffff8181dd90 T iwm_mimo_enabled +ffffffff8181ddd0 T iwm_setup_ht_rates +ffffffff8181de80 T iwm_setup_vht_rates +ffffffff8181df10 T iwm_init_reorder_buffer +ffffffff8181df70 T iwm_clear_reorder_buffer +ffffffff8181e030 T iwm_rx_ba_session_expired +ffffffff8181e130 T iwm_reorder_timer_expired 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T iwm_auth +ffffffff8182a610 T iwm_deauth +ffffffff8182a970 T iwm_run +ffffffff8182aea0 T iwm_allow_mcast +ffffffff8182afa0 T iwm_run_stop +ffffffff8182b5c0 T iwm_node_alloc +ffffffff8182b5e0 T iwm_set_key_v1 +ffffffff8182b720 T iwm_set_key +ffffffff8182b980 T iwm_delete_key_v1 +ffffffff8182bab0 T iwm_delete_key +ffffffff8182bd20 T iwm_calib_timeout +ffffffff8182bde0 T iwm_set_rate_table_vht +ffffffff8182c100 T iwm_set_rate_table +ffffffff8182c4c0 T iwm_media_change +ffffffff8182c6c0 T iwm_stop +ffffffff8182cb40 T iwm_init +ffffffff8182ce10 T iwm_newstate_task +ffffffff8182cf90 T iwm_newstate +ffffffff8182d0f0 T iwm_endscan +ffffffff8182d140 T iwm_fill_sf_command +ffffffff8182d210 T iwm_send_soc_conf +ffffffff8182d350 T iwm_send_update_mcc_cmd +ffffffff8182d510 T iwm_send_temp_report_ths_cmd +ffffffff8182d5e0 T iwm_tt_tx_backoff +ffffffff8182d670 T iwm_fill_paging_mem +ffffffff8182d9e0 T iwm_alloc_fw_paging_mem +ffffffff8182dd80 T iwm_init_hw +ffffffff8182e400 T iwm_preinit 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iwx_dma_contig_free +ffffffff81832610 T iwx_get_num_sections +ffffffff81832690 T iwx_init_fw_sec +ffffffff81832ae0 T iwx_fw_version_str +ffffffff81832b20 T iwx_alloc_fw_monitor_block +ffffffff81832bd0 T iwx_alloc_fw_monitor +ffffffff81832c90 T iwx_apply_debug_destination +ffffffff818331e0 T iwx_nic_lock +ffffffff81833330 T iwx_write_prph +ffffffff818333d0 T iwx_set_bits_prph +ffffffff818333f0 T iwx_clear_bits_prph +ffffffff81833410 T iwx_read_prph +ffffffff818334b0 T iwx_nic_unlock +ffffffff81833560 T iwx_set_ltr +ffffffff818336b0 T iwx_ctxt_info_init +ffffffff81833970 T iwx_ctxt_info_free_fw_img +ffffffff81833af0 T iwx_ctxt_info_gen3_init +ffffffff818340e0 T iwx_write_umac_prph +ffffffff81834190 T iwx_firmware_store_section +ffffffff81834230 T iwx_set_default_calib +ffffffff81834280 T iwx_fw_info_free +ffffffff81834310 T iwx_read_firmware +ffffffff81834da0 T iwx_prph_addr_mask +ffffffff81834de0 T iwx_read_prph_unlocked +ffffffff81834e60 T iwx_nic_assert_locked +ffffffff81834ec0 T iwx_write_prph_unlocked +ffffffff81834f40 T iwx_write_prph64 +ffffffff81835070 T iwx_read_umac_prph_unlocked +ffffffff818350f0 T iwx_read_umac_prph +ffffffff81835190 T iwx_write_umac_prph_unlocked +ffffffff81835210 T iwx_read_mem +ffffffff81835340 T iwx_write_mem +ffffffff81835480 T iwx_write_mem32 +ffffffff81835590 T iwx_poll_bit +ffffffff81835660 T iwx_set_bits_mask_prph +ffffffff81835850 T iwx_alloc_rx_ring +ffffffff81835a30 T iwx_rx_addbuf +ffffffff81835c50 T iwx_free_rx_ring +ffffffff81835f00 T iwx_disable_rx_dma +ffffffff81836160 T iwx_reset_rx_ring +ffffffff81836200 T iwx_alloc_tx_ring +ffffffff81836410 T iwx_free_tx_ring +ffffffff818366a0 T iwx_reset_tx_ring +ffffffff81836900 T iwx_enable_rfkill_int +ffffffff818369e0 T iwx_check_rfkill +ffffffff81836a60 T iwx_enable_interrupts +ffffffff81836b10 T iwx_enable_fwload_interrupt +ffffffff81836bf0 T iwx_restore_interrupts +ffffffff81836c20 T iwx_disable_interrupts +ffffffff81836ce0 T iwx_ict_reset +ffffffff81836ea0 T iwx_set_hw_ready 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iwx_setup_vht_rates +ffffffff81839ed0 T iwx_init_reorder_buffer +ffffffff81839f30 T iwx_clear_reorder_buffer +ffffffff81839ff0 T iwx_rx_ba_session_expired +ffffffff8183a0f0 T iwx_rx_bar_frame_release +ffffffff8183a1a0 T iwx_release_frames +ffffffff8183a390 T iwx_reorder_timer_expired +ffffffff8183a560 T iwx_find_rxba_data +ffffffff8183a5f0 T iwx_sta_rx_agg_baid_cfg_cmd +ffffffff8183a840 T iwx_send_cmd_pdu_status +ffffffff8183a8d0 T iwx_sta_rx_agg_sta_cmd +ffffffff8183ab20 T iwx_sta_rx_agg +ffffffff8183adf0 T iwx_mac_ctxt_task +ffffffff8183af80 T iwx_mac_ctxt_cmd +ffffffff8183b180 T iwx_phy_ctxt_task +ffffffff8183b330 T iwx_phy_ctxt_update +ffffffff8183b780 T iwx_updatechan +ffffffff8183b840 T iwx_add_task +ffffffff8183b8b0 T iwx_updateprot +ffffffff8183b970 T iwx_updateslot +ffffffff8183ba30 T iwx_updateedca +ffffffff8183baf0 T iwx_updatedtim +ffffffff8183bbb0 T iwx_sta_tx_agg_start +ffffffff8183bda0 T iwx_ba_task +ffffffff8183bef0 T iwx_ampdu_rx_start +ffffffff8183bfd0 T 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alc_mii_readreg_816x +ffffffff81880c90 T alc_mii_readreg_813x +ffffffff81880da0 T alc_miibus_writereg +ffffffff81880f60 T alc_mii_writereg_816x +ffffffff81881070 T alc_mii_writereg_813x +ffffffff81881170 T alc_miibus_statchg +ffffffff81881520 T alc_stop_mac +ffffffff81881610 T alc_start_queue +ffffffff818816c0 T alc_mac_config +ffffffff818817a0 T alc_aspm +ffffffff81881870 T alc_dsp_fixup +ffffffff81881e50 T alc_miidbg_readreg +ffffffff81881e90 T alc_miidbg_writereg +ffffffff81881ee0 T alc_miiext_readreg +ffffffff81882010 T alc_miiext_writereg +ffffffff81882150 T alc_mediastatus +ffffffff818821c0 T alc_mediachange +ffffffff81882220 T alc_get_macaddr +ffffffff81882240 T alc_get_macaddr_816x +ffffffff818824c0 T alc_get_macaddr_813x +ffffffff81882960 T alc_get_macaddr_par +ffffffff81882a10 T alc_disable_l0s_l1 +ffffffff81882aa0 T alc_phy_reset +ffffffff81882ac0 T alc_phy_reset_816x +ffffffff81883350 T alc_phy_reset_813x +ffffffff81883730 T alc_phy_down +ffffffff81883850 T alc_aspm_816x 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+ffffffff8188c270 T ale_init_tx_ring +ffffffff8188c360 T ale_rxvlan +ffffffff8188d000 T amdpm_match +ffffffff8188d030 T amdpm_attach +ffffffff8188d360 T amdpm_activate +ffffffff8188d3d0 T amdpm_rnd_callout +ffffffff8188d430 T amdpm_i2c_acquire_bus +ffffffff8188d490 T amdpm_i2c_release_bus +ffffffff8188d4e0 T amdpm_i2c_exec +ffffffff8188d850 T amdpm_get_timecount +ffffffff8188d880 T amdpm_intr +ffffffff8188e000 T bce_probe +ffffffff8188e030 T bce_attach +ffffffff8188e830 T bce_activate +ffffffff8188e8a0 T bce_intr +ffffffff8188eb90 T bce_reset +ffffffff8188f150 T bce_ioctl +ffffffff8188f2b0 T bce_start +ffffffff8188f4e0 T bce_watchdog +ffffffff8188f530 T bce_mii_read +ffffffff8188f670 T bce_mii_write +ffffffff8188f7a0 T bce_statchg +ffffffff8188fb30 T bce_mediachange +ffffffff8188fb80 T bce_mediastatus +ffffffff8188fbe0 T bce_tick +ffffffff8188fc30 T bce_stop +ffffffff8188fd50 T bce_init +ffffffff81890160 T bce_iff +ffffffff81890260 T bce_rxintr +ffffffff818903f0 T bce_txintr +ffffffff818904e0 T bce_add_rxbuf +ffffffff818905a0 T bce_add_mac +ffffffff81891000 T ath_pci_match +ffffffff81891060 T ath_pci_attach +ffffffff81891290 T ath_pci_detach +ffffffff81892000 T athn_pci_match +ffffffff81892030 T athn_pci_attach +ffffffff818922c0 T athn_pci_detach +ffffffff81892340 T athn_pci_activate +ffffffff818923f0 T athn_pci_read +ffffffff81892420 T athn_pci_write +ffffffff81892450 T athn_pci_write_barrier +ffffffff81892480 T athn_pci_disable_aspm +ffffffff818924f0 T athn_pci_wakeup +ffffffff81893000 T atw_pci_match +ffffffff81893030 T atw_pci_attach +ffffffff818932a0 T atw_pci_detach +ffffffff81893320 t atw_pci_enable +ffffffff818933c0 t atw_pci_disable +ffffffff81894000 T rtw_pci_match +ffffffff81894030 T rtw_pci_attach +ffffffff81894250 T rtw_pci_detach +ffffffff818942d0 T rtw_pci_enable +ffffffff81894370 T rtw_pci_disable +ffffffff81895000 T rtwn_pci_match +ffffffff81895030 T rtwn_pci_attach +ffffffff81895590 T rtwn_pci_detach +ffffffff818956a0 T rtwn_pci_activate +ffffffff818956c0 T rtwn_calib_to +ffffffff81895720 T rtwn_scan_to +ffffffff81895740 T rtwn_intr +ffffffff818959e0 T rtwn_alloc_rx_list +ffffffff81895d00 T rtwn_alloc_tx_list +ffffffff81895f40 T rtwn_free_rx_list +ffffffff81896090 T rtwn_pci_write_1 +ffffffff818960c0 T rtwn_pci_write_2 +ffffffff818960f0 T rtwn_pci_write_4 +ffffffff81896120 T rtwn_pci_read_1 +ffffffff81896150 T rtwn_pci_read_2 +ffffffff81896180 T rtwn_pci_read_4 +ffffffff818961b0 T rtwn_tx +ffffffff81896740 T rtwn_power_on +ffffffff81896770 T rtwn_dma_init +ffffffff81896b20 T rtwn_pci_load_firmware +ffffffff81896bd0 T rtwn_fw_loadpage +ffffffff81896d00 T rtwn_mac_init +ffffffff81896e40 T rtwn_bb_init +ffffffff818972f0 T rtwn_alloc_buffers +ffffffff81897320 T rtwn_pci_init +ffffffff818973f0 T rtwn_pci_stop +ffffffff81897540 T rtwn_is_oactive +ffffffff81897580 T rtwn_next_calib +ffffffff818975a0 T rtwn_cancel_calib +ffffffff818975e0 T rtwn_pci_next_scan +ffffffff81897600 T rtwn_cancel_scan +ffffffff81897640 T rtwn_wait_async +ffffffff81897670 T rtwn_free_tx_list +ffffffff818977e0 T rtwn_setup_rx_desc +ffffffff81897850 T rtwn_reset_rx_list +ffffffff818978f0 T rtwn_reset_tx_list +ffffffff81897a40 T rtwn_rx_frame +ffffffff81897ec0 T rtwn_tx_done +ffffffff81898050 T rtwn_poll_c2h_events +ffffffff81898220 T rtwn_pci_92c_stop +ffffffff81898400 T rtwn_pci_88e_stop +ffffffff818987e0 T rtwn_pci_23a_stop +ffffffff81898b80 T rtwn_88e_intr +ffffffff81898eb0 T rtwn_llt_write +ffffffff81898f70 T rtwn_llt_init +ffffffff81899230 T rtwn_92c_power_on +ffffffff818996b0 T rtwn_88e_power_on +ffffffff81899ab0 T rtwn_23a_power_on +ffffffff81899f20 T rtwn_tx_report +ffffffff8189a000 T ral_pci_match +ffffffff8189a030 T ral_pci_attach +ffffffff8189a210 T ral_pci_detach +ffffffff8189a2b0 T ral_pci_activate +ffffffff8189a340 T ral_pci_wakeup +ffffffff8189b000 T acx_pci_match +ffffffff8189b030 T acx_pci_attach +ffffffff8189b260 T acx_pci_detach +ffffffff8189c000 T pgt_pci_match +ffffffff8189c030 T pgt_pci_attach +ffffffff8189c200 T pgt_pci_detach +ffffffff8189d000 T malo_pci_match +ffffffff8189d030 T malo_pci_attach +ffffffff8189d1e0 T malo_pci_detach +ffffffff8189d230 T malo_pci_activate +ffffffff8189d290 T malo_pci_wakeup +ffffffff8189e000 T bwi_pci_match +ffffffff8189e070 T bwi_pci_attach +ffffffff8189e290 T bwi_pci_detach +ffffffff8189e2e0 T bwi_pci_activate +ffffffff8189e350 T bwi_reset_bcm4331 +ffffffff8189e470 T bwi_pci_conf_write +ffffffff8189e4a0 T bwi_pci_conf_read +ffffffff8189e4d0 T bwi_pci_wakeup +ffffffff8189f000 T piixpm_match +ffffffff8189f030 T piixpm_attach +ffffffff8189f4c0 T piixpm_intr +ffffffff8189f5d0 T piixpm_i2c_acquire_bus +ffffffff8189f6b0 T piixpm_i2c_release_bus +ffffffff8189f790 T piixpm_i2c_exec +ffffffff818a0000 T vic_match +ffffffff818a00a0 T vic_attach +ffffffff818a0430 T vic_intr +ffffffff818a04b0 T vic_query +ffffffff818a0710 T vic_alloc_data +ffffffff818a0a10 T vic_tick +ffffffff818a0a80 T vic_ioctl +ffffffff818a0cb0 T vic_start +ffffffff818a1010 T vic_watchdog +ffffffff818a1040 T vic_media_change +ffffffff818a1070 T vic_media_status +ffffffff818a1130 T vic_read +ffffffff818a1150 T vic_read_cmd +ffffffff818a11a0 T vic_getlladdr +ffffffff818a1250 T vic_alloc_dmamem +ffffffff818a13c0 T vic_rx_fill +ffffffff818a15b0 T vic_alloc_mbuf +ffffffff818a1670 T vic_init_data +ffffffff818a1a20 T vic_uninit_data +ffffffff818a1bf0 T vic_link_state +ffffffff818a1c70 T vic_write +ffffffff818a1cc0 T vic_rx_proc +ffffffff818a1f20 T vic_tx_proc +ffffffff818a20a0 T vic_iff +ffffffff818a21e0 T vic_setlladdr +ffffffff818a2240 T vic_load_txb +ffffffff818a22f0 T vic_init +ffffffff818a2490 T vic_stop +ffffffff818a25d0 T vic_rxrinfo +ffffffff818a26a0 T vic_free_dmamem +ffffffff818a3000 T vmxnet3_match +ffffffff818a3030 T vmxnet3_attach +ffffffff818a3890 T vmxnet3_intr +ffffffff818a3930 T vmxnet3_intr_event +ffffffff818a39b0 T vmxnet3_intr_intx +ffffffff818a3a20 T vmxnet3_intr_queue +ffffffff818a3ab0 T vmxnet3_dma_init +ffffffff818a3ea0 T vmxnet3_ioctl +ffffffff818a4130 T vmxnet3_start +ffffffff818a44b0 T vmxnet3_watchdog +ffffffff818a4500 T vmxnet3_media_change +ffffffff818a4530 T vmxnet3_media_status +ffffffff818a4640 T vmxnet3_link_state +ffffffff818a4700 T vmxnet3_dma_allocmem +ffffffff818a4850 T vmxnet3_alloc_txring +ffffffff818a4a00 T vmxnet3_alloc_rxring +ffffffff818a4d50 t vmx_dmamem_alloc +ffffffff818a4eb0 T vmxnet3_rxfill_tick +ffffffff818a4f20 T vmxnet3_txinit +ffffffff818a5010 T vmxnet3_rxfill +ffffffff818a5300 T vmxnet3_rxinit +ffffffff818a5440 T vmxnet3_txstop +ffffffff818a5540 T vmxnet3_rxstop +ffffffff818a56a0 T vmxnet3_enable_all_intrs +ffffffff818a5770 T vmxnet3_disable_all_intrs +ffffffff818a5840 T vmxnet3_evintr +ffffffff818a5a10 T vmxnet3_rxintr +ffffffff818a5d80 T vmxnet3_txintr +ffffffff818a5f60 T vmxnet3_init +ffffffff818a62f0 T vmxnet3_rx_csum +ffffffff818a6350 T vmxnet3_iff +ffffffff818a6490 T vmxnet3_stop +ffffffff818a6740 T vmxnet3_reset +ffffffff818a6780 t vmx_kstat_create +ffffffff818a6960 t vmx_kstat_read +ffffffff818a7000 T vmwpvs_match +ffffffff818a7040 T vmwpvs_attach +ffffffff818a7980 T vmwpvs_scsi_cmd +ffffffff818a7df0 T vmwpvs_intx +ffffffff818a7e70 T vmwpvs_msg_task +ffffffff818a80e0 T vmwpvs_intr +ffffffff818a82d0 T vmwpvs_get_config +ffffffff818a84d0 T vmwpvs_dmamem_zalloc +ffffffff818a8530 T vmwpvs_dmamem_alloc +ffffffff818a86b0 T vmwpvs_ccb_put +ffffffff818a8710 T vmwpvs_setup_rings +ffffffff818a8820 T vmwpvs_setup_msg_ring +ffffffff818a88f0 T vmwpvs_ccb_get +ffffffff818a8970 T vmwpvs_dmamem_free +ffffffff818a89f0 T vmwpvs_cmd +ffffffff818a8a90 T vmwpvs_scsi_cmd_done +ffffffff818a8c70 T vmwpvs_scsi_cmd_poll +ffffffff818a9000 T lii_match +ffffffff818a9030 T lii_attach +ffffffff818a9420 T lii_activate +ffffffff818a9520 T lii_reset +ffffffff818a97f0 T lii_spi_configure +ffffffff818a98e0 T lii_eeprom_present +ffffffff818a9970 T lii_eeprom_read +ffffffff818a99a0 T lii_spi_read +ffffffff818a9c60 T lii_read_macaddr +ffffffff818a9dc0 T lii_intr +ffffffff818a9ed0 T lii_alloc_rings +ffffffff818aa0e0 T lii_tick +ffffffff818aa130 T lii_mii_readreg +ffffffff818aa3d0 T lii_mii_writereg +ffffffff818aa670 T lii_mii_statchg +ffffffff818aa6e0 T lii_media_change +ffffffff818aa730 T lii_media_status +ffffffff818aa790 T lii_ioctl +ffffffff818aa920 T lii_start +ffffffff818aaad0 T lii_watchdog +ffffffff818aab10 T lii_stop +ffffffff818aab80 T lii_init +ffffffff818ab070 T lii_iff +ffffffff818ab1b0 T lii_tx_put +ffffffff818ab2c0 T lii_free_tx_space +ffffffff818ab300 T lii_rxintr +ffffffff818ab4b0 T lii_txintr +ffffffff818ac000 T ichiic_match +ffffffff818ac030 T ichiic_attach +ffffffff818ac220 T ichiic_intr +ffffffff818ac340 T ichiic_i2c_acquire_bus +ffffffff818ac3a0 T ichiic_i2c_release_bus +ffffffff818ac3f0 T ichiic_i2c_exec +ffffffff818ad000 T viapm_match +ffffffff818ad030 T viapm_attach +ffffffff818ad680 T viapm_intr +ffffffff818ad790 T viapm_i2c_acquire_bus +ffffffff818ad7f0 T viapm_i2c_release_bus +ffffffff818ad840 T viapm_i2c_exec +ffffffff818adb50 T viapm_refresh_sensor_data +ffffffff818ade50 T viapm_refresh +ffffffff818ade80 T val_to_uK +ffffffff818adf20 T val_to_rpm +ffffffff818adf60 T val_to_uV +ffffffff818ae000 T viapm_get_timecount +ffffffff818af000 T amdiic_match +ffffffff818af030 T amdiic_attach +ffffffff818af200 T amdiic_intr +ffffffff818af2d0 T amdiic_i2c_acquire_bus +ffffffff818af330 T amdiic_i2c_release_bus +ffffffff818af380 T amdiic_i2c_exec +ffffffff818af5e0 T amdiic_read +ffffffff818af750 T amdiic_wait +ffffffff818af7f0 T amdiic_write +ffffffff818b0000 T nviic_match +ffffffff818b0030 T nviic_attach +ffffffff818b0270 T nviic_i2c_acquire_bus +ffffffff818b02c0 T nviic_i2c_release_bus +ffffffff818b0310 T nviic_i2c_exec +ffffffff818b05a0 T nviic_write +ffffffff818b05f0 T nviic_read +ffffffff818b1000 T sdhc_pci_match +ffffffff818b1060 T sdhc_pci_attach +ffffffff818b13a0 T sdhc_pci_activate +ffffffff818b1400 T sdhc_takecontroller +ffffffff818b14a0 T sdhc_ricohfix +ffffffff818b1610 T sdhc_pci_conf_write +ffffffff818b2000 T kate_match +ffffffff818b2170 T kate_attach +ffffffff818b24b0 T kate_refresh +ffffffff818b3000 T km_match +ffffffff818b3050 T km_attach +ffffffff818b30f0 T km_refresh +ffffffff818b4000 T ksmn_match +ffffffff818b4050 T ksmn_attach +ffffffff818b4240 T ksmn_ccd_attach +ffffffff818b4390 T ksmn_refresh +ffffffff818b44e0 T ksmn_read_reg +ffffffff818b5000 t iosf_pci_match +ffffffff818b5060 t iosf_pci_attach +ffffffff818b5100 t iosf_pci_mbi_mdr_rd +ffffffff818b5160 t iosf_pci_mbi_mdr_wr +ffffffff818b6000 T itherm_probe +ffffffff818b6030 T itherm_attach +ffffffff818b63e0 T itherm_activate +ffffffff818b6460 T itherm_enable +ffffffff818b64c0 T itherm_refresh +ffffffff818b64d0 T itherm_refresh_sensor_data +ffffffff818b68c0 T itherm_bias_temperature_sensor +ffffffff818b7000 T pchtemp_match +ffffffff818b7030 T pchtemp_attach +ffffffff818b71a0 T pchtemp_refresh +ffffffff818b8000 T rtsx_pci_match +ffffffff818b8080 T rtsx_pci_attach +ffffffff818b9000 T xspd_match +ffffffff818b9030 T xspd_attach +ffffffff818b91f0 T xspd_intr +ffffffff818ba000 T virtio_pci_match +ffffffff818ba080 T virtio_pci_attach +ffffffff818ba420 T virtio_pci_detach +ffffffff818ba500 T virtio_pci_kick +ffffffff818ba560 T virtio_pci_read_device_config_1 +ffffffff818ba590 T virtio_pci_read_device_config_2 +ffffffff818ba5c0 T virtio_pci_read_device_config_4 +ffffffff818ba5f0 T virtio_pci_read_device_config_8 +ffffffff818ba670 T virtio_pci_write_device_config_1 +ffffffff818ba6a0 T virtio_pci_write_device_config_2 +ffffffff818ba6d0 T virtio_pci_write_device_config_4 +ffffffff818ba700 T virtio_pci_write_device_config_8 +ffffffff818ba770 T virtio_pci_read_queue_size +ffffffff818ba7e0 T virtio_pci_setup_queue +ffffffff818baac0 T virtio_pci_set_status +ffffffff818bab40 T virtio_pci_negotiate_features +ffffffff818bac80 T virtio_pci_poll_intr +ffffffff818bacf0 T virtio_pci_find_cap +ffffffff818bae90 T virtio_pci_attach_10 +ffffffff818bb2f0 T virtio_pci_attach_09 +ffffffff818bb430 T virtio_pci_adjust_config_region +ffffffff818bb4d0 T virtio_pci_setup_msix +ffffffff818bb860 T virtio_pci_legacy_intr +ffffffff818bb900 T virtio_pci_legacy_intr_mpsafe +ffffffff818bb990 T virtio_pci_free_irqs +ffffffff818bbbd0 T virtio_pci_negotiate_features_10 +ffffffff818bbe00 T virtio_pci_msix_establish +ffffffff818bbed0 T virtio_pci_set_msix_queue_vector +ffffffff818bbf50 T virtio_pci_set_msix_config_vector +ffffffff818bbf90 T virtio_pci_config_intr +ffffffff818bbfd0 T virtio_pci_shared_queue_intr +ffffffff818bbfe0 T virtio_pci_queue_intr +ffffffff818bc000 T dwiic_pci_match +ffffffff818bc030 T dwiic_pci_attach +ffffffff818bc350 T dwiic_pci_activate +ffffffff818bc3c0 T dwiic_pci_bus_scan +ffffffff818bd000 T bwfm_pci_buscore_read +ffffffff818bd060 T bwfm_pci_buscore_write +ffffffff818bd0d0 T bwfm_pci_buscore_prepare +ffffffff818bd100 T bwfm_pci_buscore_reset +ffffffff818bd2f0 T bwfm_pci_buscore_activate +ffffffff818bd320 T bwfm_pci_preinit +ffffffff818be130 T bwfm_pci_stop +ffffffff818be1c0 T bwfm_pci_txcheck +ffffffff818be280 T bwfm_pci_txdata +ffffffff818be5d0 T bwfm_pci_msgbuf_query_dcmd +ffffffff818bea00 T bwfm_pci_msgbuf_set_dcmd +ffffffff818bea50 T bwfm_pci_match +ffffffff818bea80 T bwfm_pci_attach +ffffffff818becf0 T bwfm_pci_detach +ffffffff818bed30 T bwfm_pci_activate +ffffffff818beee0 T bwfm_pci_intr +ffffffff818bf140 T bwfm_pci_select_core +ffffffff818bf220 T bwfm_pci_load_microcode +ffffffff818bf6b0 T bwfm_pci_dmamem_alloc +ffffffff818bf850 T bwfm_pci_setup_ring +ffffffff818bfa50 T bwfm_pci_intr_enable +ffffffff818bfaa0 T bwfm_pci_hostready +ffffffff818bfb10 T bwfm_pci_fill_rx_rings +ffffffff818bfb60 T bwfm_pci_dmamem_free +ffffffff818bfbd0 T bwfm_pci_cleanup +ffffffff818c0240 T bwfm_pci_send_mb_data +ffffffff818c0360 T bwfm_pci_intmask +ffffffff818c03a0 T bwfm_pci_pktid_avail +ffffffff818c0420 T bwfm_pci_pktid_new +ffffffff818c0570 T bwfm_pci_pktid_free +ffffffff818c0620 T bwfm_pci_fill_rx_buf_ring +ffffffff818c0960 T bwfm_pci_fill_rx_ioctl_ring +ffffffff818c0cc0 T bwfm_pci_ring_write_reserve +ffffffff818c0db0 T bwfm_pci_ring_write_cancel +ffffffff818c0df0 T bwfm_pci_ring_write_commit +ffffffff818c0ed0 T bwfm_pci_ring_write_rptr +ffffffff818c0f50 T bwfm_pci_ring_write_wptr +ffffffff818c0fd0 T bwfm_pci_setup_flowring +ffffffff818c1120 T bwfm_pci_ring_bell +ffffffff818c1160 T bwfm_pci_ring_update_rptr +ffffffff818c1210 T bwfm_pci_ring_update_wptr +ffffffff818c12c0 T bwfm_pci_ring_write_reserve_multi +ffffffff818c13e0 T bwfm_pci_ring_read_avail +ffffffff818c14e0 T bwfm_pci_ring_read_commit +ffffffff818c1570 T bwfm_pci_ring_rx +ffffffff818c1770 T bwfm_pci_msg_rx +ffffffff818c1d50 T bwfm_pci_flowring_delete_cb +ffffffff818c1e00 T bwfm_pci_msgbuf_rxioctl +ffffffff818c1ef0 T bwfm_pci_intr_status +ffffffff818c1f30 T bwfm_pci_intr_ack +ffffffff818c1f70 T bwfm_pci_flowring_lookup +ffffffff818c20e0 T bwfm_pci_flowring_create +ffffffff818c2210 T bwfm_pci_flowring_create_cb +ffffffff818c2550 T bwfm_pci_flowring_delete +ffffffff818c2820 T bwfm_pci_msgbuf_h2d_mb_write +ffffffff818c2a30 T bwfm_pci_handle_mb_data +ffffffff818c2b00 T bwfm_pci_intr_disable +ffffffff818c3000 T ccp_pci_match +ffffffff818c3030 T ccp_pci_attach +ffffffff818c4000 T bnxt_match +ffffffff818c4030 T bnxt_attach +ffffffff818c4be0 T bnxt_dmamem_alloc +ffffffff818c4d70 T bnxt_dmamem_free +ffffffff818c4e00 T bnxt_hwrm_ver_get +ffffffff818c4f50 T bnxt_hwrm_nvm_get_dev_info +ffffffff818c50a0 T bnxt_hwrm_func_drv_rgtr +ffffffff818c51c0 T bnxt_hwrm_func_rgtr_async_events +ffffffff818c52e0 T bnxt_hwrm_func_qcaps +ffffffff818c53c0 T bnxt_admin_intr +ffffffff818c55b0 T bnxt_intr +ffffffff818c5a60 T bnxt_hwrm_func_qcfg +ffffffff818c5b10 T bnxt_hwrm_queue_qportcfg +ffffffff818c5be0 T bnxt_hwrm_func_reset +ffffffff818c5c90 T bnxt_mark_cpr_invalid +ffffffff818c5cf0 T bnxt_hwrm_ring_alloc +ffffffff818c5ea0 T bnxt_cfg_async_cr +ffffffff818c5fa0 T bnxt_write_cp_doorbell +ffffffff818c5fe0 T bnxt_set_cp_ring_aggint +ffffffff818c60c0 T bnxt_ioctl +ffffffff818c6250 T bnxt_start +ffffffff818c6650 T bnxt_watchdog +ffffffff818c6680 T bnxt_media_change +ffffffff818c67d0 T bnxt_media_status +ffffffff818c67f0 T bnxt_refill +ffffffff818c6850 T bnxt_media_autonegotiate +ffffffff818c6940 T bnxt_hwrm_port_phy_qcfg +ffffffff818c6dc0 T bnxt_free_slots +ffffffff818c6e60 T bnxt_hwrm_cmd_hdr_init +ffffffff818c6eb0 T hwrm_send_message +ffffffff818c6f30 T bnxt_queue_up +ffffffff818c7ab0 T bnxt_hwrm_stat_ctx_alloc +ffffffff818c7bb0 T bnxt_write_tx_doorbell +ffffffff818c7c20 T bnxt_write_rx_doorbell +ffffffff818c7ca0 T bnxt_hwrm_ring_grp_alloc +ffffffff818c7da0 T bnxt_rx_fill +ffffffff818c7eb0 T bnxt_hwrm_ring_grp_free +ffffffff818c7f90 T bnxt_hwrm_ring_free +ffffffff818c8080 T bnxt_hwrm_stat_ctx_free +ffffffff818c8170 T bnxt_queue_down +ffffffff818c8890 T bnxt_up +ffffffff818c8e20 T bnxt_hwrm_vnic_ctx_alloc +ffffffff818c8f00 T bnxt_hwrm_vnic_alloc +ffffffff818c9000 T bnxt_hwrm_vnic_cfg +ffffffff818c9140 T bnxt_hwrm_vnic_cfg_placement +ffffffff818c9210 T bnxt_hwrm_set_filter +ffffffff818c93a0 T bnxt_hwrm_vnic_rss_cfg +ffffffff818c9480 T bnxt_iff +ffffffff818c95f0 T bnxt_hwrm_vnic_free +ffffffff818c96e0 T bnxt_hwrm_vnic_ctx_free +ffffffff818c97d0 T bnxt_down +ffffffff818c9ba0 T bnxt_hwrm_free_filter +ffffffff818c9c80 T bnxt_hwrm_cfa_l2_set_rx_mask +ffffffff818c9d60 T bnxt_rxrinfo +ffffffff818c9eb0 T bnxt_get_sffpage +ffffffff818ca1c0 T bnxt_load_mbuf +ffffffff818ca270 T bnxt_handle_async_event +ffffffff818ca2c0 T bnxt_cpr_next_cmpl +ffffffff818ca330 T bnxt_cpr_commit +ffffffff818ca360 T bnxt_cpr_rollback +ffffffff818ca390 T bnxt_write_cp_doorbell_index +ffffffff818ca410 T bnxt_rx +ffffffff818ca6b0 T bnxt_txeof +ffffffff818ca7e0 T bnxt_get_media_type +ffffffff818cad40 T bnxt_add_media_type +ffffffff818caf00 T _hwrm_send_message +ffffffff818cdc20 T bnxt_rx_fill_slots +ffffffff818cde00 T bnxt_hwrm_err_map +ffffffff818cde40 T _bnxt_hwrm_set_async_event_bit +ffffffff818ce000 t mcx_match +ffffffff818ce030 t mcx_attach +ffffffff818cec40 T mcx_rx_fill +ffffffff818cee90 T mcx_load_mbuf +ffffffff818cef40 t mcx_dmamem_alloc +ffffffff818cf0a0 t mcx_init_wait +ffffffff818cf130 t mcx_enable_hca +ffffffff818cf310 t mcx_issi +ffffffff818cf680 t mcx_pages +ffffffff818cff60 t mcx_hca_max_caps +ffffffff818d04e0 t mcx_hca_set_caps +ffffffff818d09c0 t mcx_init_hca +ffffffff818d0b90 t mcx_set_driver_version +ffffffff818d0ef0 t mcx_iff +ffffffff818d1330 t mcx_alloc_uar +ffffffff818d1520 t mcx_alloc_pd +ffffffff818d1700 t mcx_alloc_tdomain +ffffffff818d18e0 t mcx_admin_intr +ffffffff818d1a90 t mcx_create_eq +ffffffff818d2030 t mcx_query_nic_vport_context +ffffffff818d23e0 t mcx_query_special_contexts +ffffffff818d25c0 t mcx_set_port_mtu +ffffffff818d26d0 t mcx_ioctl +ffffffff818d49a0 t mcx_start +ffffffff818d4ea0 t mcx_watchdog +ffffffff818d4ed0 t mcx_media_change +ffffffff818d5190 t mcx_media_status +ffffffff818d52e0 t mcx_media_add_types +ffffffff818d5400 t mcx_refill +ffffffff818d5470 t mcx_cq_intr +ffffffff818d5a50 t mcx_calibrate +ffffffff818d5bf0 t mcx_port_change +ffffffff818d5d40 t mcx_kstat_attach +ffffffff818d6110 t mcx_teardown_hca +ffffffff818d6300 t mcx_dmamem_free +ffffffff818d6370 t mcx_set_issi +ffffffff818d6520 t mcx_set_flow_table_entry_mac +ffffffff818d69f0 t mcx_delete_flow_table_entry +ffffffff818d6e70 t mcx_access_hca_reg +ffffffff818d7280 t mcx_cmdq_exec +ffffffff818d7500 t mcx_down +ffffffff818d84c0 t mcx_create_flow_table +ffffffff818d8870 t mcx_create_flow_group +ffffffff818d8d40 t mcx_set_flow_table_root +ffffffff818d90c0 t mcx_create_rqt +ffffffff818d94c0 t mcx_create_tir_direct +ffffffff818d97e0 t mcx_create_tir_indirect +ffffffff818d9b20 t mcx_set_flow_table_entry_proto +ffffffff818da000 t mcx_ready_sq +ffffffff818da390 t mcx_ready_rq +ffffffff818da720 t mcx_calibrate_first +ffffffff818da810 t mcx_create_rq +ffffffff818dad20 t mcx_destroy_sq +ffffffff818dafd0 t mcx_destroy_cq +ffffffff818db290 t mcx_destroy_flow_table +ffffffff818db600 t mcx_kstat_attach_ppcnt +ffffffff818db730 t mcx_kstat_ppcnt_read +ffffffff818db850 t mcx_kstat_mtmp_read +ffffffff818db9e0 t mcx_kstat_queue_read +ffffffff818dc9a0 t mcx_timecounter_read +ffffffff818dd000 t iavf_match +ffffffff818dd030 t iavf_attach +ffffffff818dd8a0 t iavf_reset +ffffffff818ddb60 t iavf_dmamem_alloc +ffffffff818ddcc0 t iavf_arq_fill +ffffffff818ddf80 t iavf_arq_timeout +ffffffff818ddfb0 t iavf_init_admin_queue +ffffffff818de160 t iavf_get_version +ffffffff818de360 t iavf_get_vf_resources +ffffffff818de530 t iavf_config_irq_map +ffffffff818de710 t iavf_intr +ffffffff818ded90 t iavf_ioctl +ffffffff818df2f0 t iavf_start +ffffffff818df650 t iavf_watchdog +ffffffff818df680 t iavf_media_change +ffffffff818df6b0 t iavf_media_status +ffffffff818df740 t iavf_dmamem_free +ffffffff818df7b0 t iavf_arq_unfill +ffffffff818df8b0 t iavf_down +ffffffff818dfc40 t iavf_up +ffffffff818e0610 t iavf_queue_select +ffffffff818e0800 t iavf_txr_free +ffffffff818e0900 t iavf_rxr_free +ffffffff818e0a10 t iavf_rxfill +ffffffff818e0d20 t iavf_rxrefill +ffffffff818e0d40 t iavf_process_arq +ffffffff818e11c0 t iavf_add_del_addr +ffffffff818e2000 T rge_match +ffffffff818e2030 T rge_attach +ffffffff818e24c0 T rge_activate +ffffffff818e2600 T rge_intr +ffffffff818e28f0 T rge_config_imtype +ffffffff818e2960 T rge_chipinit +ffffffff818e2a70 T rge_get_macaddr +ffffffff818e2c40 T rge_allocmem +ffffffff818e3040 T rge_ioctl +ffffffff818e31f0 T rge_start +ffffffff818e33d0 T rge_watchdog +ffffffff818e3410 T rge_wol +ffffffff818e3640 T rge_tick +ffffffff818e36c0 T rge_txstart +ffffffff818e36f0 T rge_ifmedia_upd +ffffffff818e3cc0 T rge_ifmedia_sts +ffffffff818e3db0 T rge_add_media_types +ffffffff818e3e60 T rge_kstat_attach +ffffffff818e4140 T rge_wol_power +ffffffff818e4220 T rge_rxeof +ffffffff818e4660 T rge_txeof +ffffffff818e4870 T rge_init +ffffffff818e5f20 T rge_setup_intr +ffffffff818e6090 T rge_encap +ffffffff818e6360 T rge_stop +ffffffff818e6640 T rge_iff +ffffffff818e67c0 T rge_set_macaddr +ffffffff818e6890 T rge_rx_list_init +ffffffff818e6950 T rge_tx_list_init +ffffffff818e6a20 T rge_phy_config +ffffffff818e76d0 T rge_disable_aspm_clkreq +ffffffff818e77d0 T rge_read_csi +ffffffff818e7880 T rge_write_csi +ffffffff818e7950 T rge_write_mac_ocp +ffffffff818e79a0 T rge_read_mac_ocp +ffffffff818e7a20 T rge_hw_reset +ffffffff818e7b20 T rge_write_phy_ocp +ffffffff818e7be0 T rge_read_phy_ocp +ffffffff818e7c90 T rge_read_phy +ffffffff818e7d60 T rge_write_phy +ffffffff818e7e40 T rge_get_link_status +ffffffff818e7ea0 T rge_newbuf +ffffffff818e8030 T rge_discard_rxbuf +ffffffff818e80a0 T rge_fill_rx_ring +ffffffff818e8120 T rge_reset +ffffffff818e8390 T rge_exit_oob +ffffffff818e8b90 T rge_set_phy_power +ffffffff818e8df0 T rge_hw_init +ffffffff818e9540 T rge_ephy_config +ffffffff818e9590 T rge_ephy_config_mac_cfg3 +ffffffff818e97e0 T rge_ephy_config_mac_cfg5 +ffffffff818e98c0 T rge_write_ephy +ffffffff818e9b20 T rge_read_ephy +ffffffff818e9da0 T rge_phy_config_mac_cfg3 +ffffffff818eb8d0 T rge_phy_config_mac_cfg5 +ffffffff818ec420 T rge_patch_phy_mcu +ffffffff818ec740 T rge_phy_config_mcu +ffffffff818ecf40 T rge_switch_mcu_ram_page +ffffffff818ecfd0 T rge_disable_phy_ocp_pwrsave +ffffffff818ed1a0 T rge_disable_hw_im +ffffffff818ed1d0 T rge_disable_sim_im +ffffffff818ed230 T rge_setup_sim_im +ffffffff818ed2b0 T rge_link_state +ffffffff818ed330 t rge_kstat_read +ffffffff818ed4d0 t rge_kstat_copy +ffffffff818ee000 T igc_match +ffffffff818ee030 T igc_attach +ffffffff818ee360 T igc_detach +ffffffff818ee550 T igc_identify_hardware +ffffffff818ee5c0 T igc_allocate_pci_resources +ffffffff818ee6e0 T igc_allocate_queues +ffffffff818eebd0 T igc_is_valid_ether_addr +ffffffff818eec30 T igc_allocate_msix +ffffffff818eee70 T igc_setup_interface +ffffffff818ef0b0 T igc_reset +ffffffff818ef1f0 T igc_update_link_status +ffffffff818ef300 T igc_get_hw_control +ffffffff818ef360 T igc_release_hw_control +ffffffff818ef3c0 T igc_free_pci_resources +ffffffff818ef4a0 T igc_stop +ffffffff818ef7a0 T igc_free_transmit_structures +ffffffff818ef820 T igc_free_receive_structures +ffffffff818ef8d0 T igc_setup_msix +ffffffff818ef960 T igc_dma_malloc +ffffffff818efac0 T igc_rxrefill +ffffffff818efb90 T igc_dma_free +ffffffff818efc40 T igc_init_dmac +ffffffff818efee0 T igc_intr_queue +ffffffff818efff0 T igc_intr_link +ffffffff818f0170 T igc_ioctl +ffffffff818f0450 T igc_start +ffffffff818f0880 T igc_watchdog +ffffffff818f08b0 T igc_media_change +ffffffff818f09c0 T igc_media_status +ffffffff818f0b60 T igc_init +ffffffff818f1050 T igc_setup_transmit_structures +ffffffff818f1110 T igc_initialize_transmit_unit +ffffffff818f1330 T igc_setup_receive_structures +ffffffff818f1490 T igc_initialize_receive_unit +ffffffff818f1850 T igc_iff +ffffffff818f19a0 T igc_configure_queues +ffffffff818f1bb0 T igc_rxfill +ffffffff818f1cf0 T igc_enable_intr +ffffffff818f1dc0 T igc_tx_ctx_setup +ffffffff818f1ed0 T igc_txeof +ffffffff818f2090 T igc_disable_intr +ffffffff818f2130 T igc_rxrinfo +ffffffff818f2260 T igc_get_buf +ffffffff818f23a0 T igc_rxeof +ffffffff818f2740 T igc_rx_checksum +ffffffff818f2790 T igc_set_queues +ffffffff818f2870 T igc_enable_queue +ffffffff818f28a0 T igc_allocate_transmit_buffers +ffffffff818f29c0 T igc_setup_transmit_ring +ffffffff818f2b00 T igc_free_transmit_buffers +ffffffff818f2c20 T igc_allocate_receive_buffers +ffffffff818f2d50 T igc_setup_receive_ring +ffffffff818f2e10 T igc_initialize_rss_mapping +ffffffff818f3030 T igc_free_receive_buffers +ffffffff818f4000 T igc_init_mac_params +ffffffff818f4040 T igc_init_nvm_params +ffffffff818f4080 T igc_init_phy_params +ffffffff818f40c0 T igc_set_mac_type +ffffffff818f4160 T igc_setup_init_funcs +ffffffff818f42c0 T igc_update_mc_addr_list +ffffffff818f4300 T igc_check_for_link +ffffffff818f4340 T igc_reset_hw +ffffffff818f4380 T igc_init_hw +ffffffff818f43c0 T igc_get_speed_and_duplex +ffffffff818f4400 T igc_rar_set +ffffffff818f4440 T igc_check_reset_block +ffffffff818f4480 T igc_get_phy_info +ffffffff818f44c0 T igc_phy_hw_reset +ffffffff818f4500 T igc_read_mac_addr +ffffffff818f4530 T igc_validate_nvm_checksum +ffffffff818f5000 T igc_acquire_phy_base +ffffffff818f5030 T igc_release_phy_base +ffffffff818f5060 T igc_init_hw_base +ffffffff818f5150 T igc_power_down_phy_copper_base +ffffffff818f6000 T igc_init_nvm_params_i225 +ffffffff818f6170 T igc_acquire_nvm_i225 +ffffffff818f6240 T igc_release_nvm_i225 +ffffffff818f62b0 T igc_get_flash_presence_i225 +ffffffff818f6300 T igc_read_nvm_srrd_i225 +ffffffff818f63e0 T igc_write_nvm_srwr_i225 +ffffffff818f65a0 T igc_validate_nvm_checksum_i225 +ffffffff818f6630 T igc_update_nvm_checksum_i225 +ffffffff818f67c0 T igc_init_mac_params_i225 +ffffffff818f6880 T igc_reset_hw_i225 +ffffffff818f69a0 T igc_init_hw_i225 +ffffffff818f69b0 T igc_check_for_link_i225 +ffffffff818f6a70 T igc_acquire_swfw_sync_i225 +ffffffff818f6b50 T igc_release_swfw_sync_i225 +ffffffff818f6bd0 T igc_setup_copper_link_i225 +ffffffff818f6c60 T igc_init_phy_params_i225 +ffffffff818f6d40 T igc_get_hw_semaphore_i225 +ffffffff818f6ef0 T __igc_write_nvm_srwr +ffffffff818f7020 T igc_update_flash_i225 +ffffffff818f73f0 T igc_set_flsw_flash_burst_counter_i225 +ffffffff818f7450 T igc_write_erase_flash_command_i225 +ffffffff818f7550 T igc_pool_flash_update_done_i225 +ffffffff818f75e0 T igc_set_ltr_i225 +ffffffff818f7850 T igc_init_function_pointers_i225 +ffffffff818f78c0 T igc_set_eee_i225 +ffffffff818f8000 T igc_init_mac_ops_generic +ffffffff818f8050 T igc_null_ops_generic +ffffffff818f8080 T igc_config_collision_dist_generic +ffffffff818f80f0 T igc_rar_set_generic +ffffffff818f81d0 T igc_write_vfta_generic +ffffffff818f8220 T igc_init_rx_addrs_generic +ffffffff818f82c0 T igc_check_alt_mac_addr_generic +ffffffff818f8440 T igc_hash_mc_addr_generic +ffffffff818f84e0 T igc_update_mc_addr_list_generic +ffffffff818f8630 T igc_clear_hw_cntrs_base_generic +ffffffff818f8a20 T igc_setup_link_generic +ffffffff818f8bb0 T igc_set_fc_watermarks_generic +ffffffff818f8c60 T igc_force_mac_fc_generic +ffffffff818f8d20 T igc_config_fc_after_link_up_generic +ffffffff818f8eb0 T igc_get_speed_and_duplex_copper_generic +ffffffff818f8f50 T igc_put_hw_semaphore_generic +ffffffff818f8fa0 T igc_get_auto_rd_done_generic +ffffffff818f91f0 T igc_disable_pcie_master_generic +ffffffff818fa000 T igc_init_nvm_ops_generic +ffffffff818fa080 T igc_null_read_nvm +ffffffff818fa0b0 T igc_null_nvm_generic +ffffffff818fa0e0 T igc_reload_nvm_generic +ffffffff818fa160 T igc_null_write_nvm +ffffffff818fa190 T igc_poll_eerd_eewr_done +ffffffff818fa230 T igc_read_nvm_eerd +ffffffff818fa360 T igc_read_mac_addr_generic +ffffffff818fa440 T igc_validate_nvm_checksum_generic +ffffffff818fb000 T igc_init_phy_ops_generic +ffffffff818fb0f0 T igc_null_set_page +ffffffff818fb120 T igc_null_read_reg +ffffffff818fb150 T igc_null_phy_generic +ffffffff818fb180 T igc_null_lplu_state +ffffffff818fb1b0 T igc_null_write_reg +ffffffff818fb1e0 T igc_check_reset_block_generic +ffffffff818fb240 T igc_get_phy_id +ffffffff818fb2f0 T igc_read_phy_reg_mdic +ffffffff818fb400 T igc_write_phy_reg_mdic +ffffffff818fb500 T igc_phy_setup_autoneg +ffffffff818fb700 T igc_copper_link_autoneg +ffffffff818fb830 T igc_wait_autoneg +ffffffff818fb8f0 T igc_setup_copper_link_generic +ffffffff818fba00 T igc_phy_has_link_generic +ffffffff818fbb10 T igc_check_downshift_generic +ffffffff818fbb40 T igc_phy_hw_reset_generic +ffffffff818fbce0 T igc_power_up_phy_copper +ffffffff818fbd70 T igc_power_down_phy_copper +ffffffff818fbe00 T igc_write_phy_reg_gpy +ffffffff818fc000 T igc_write_xmdio_reg +ffffffff818fc100 T igc_read_phy_reg_gpy +ffffffff818fc300 T igc_read_xmdio_reg +ffffffff818fc3f0 T __igc_access_xmdio_reg +ffffffff818fd000 T ngbe_match +ffffffff818fd030 T ngbe_attach +ffffffff818fd540 T ngbe_detach +ffffffff818fd790 T ngbe_allocate_pci_resources +ffffffff818fd890 T ngbe_allocate_queues +ffffffff818fdd90 T ngbe_allocate_isb +ffffffff818fde20 T ngbe_init_shared_code +ffffffff818fe0f0 T ngbe_check_flash_load +ffffffff818fe390 T ngbe_allocate_msix +ffffffff818fe5b0 T ngbe_setup_interface +ffffffff818fe7c0 T ngbe_free_isb +ffffffff818fe8a0 T ngbe_free_transmit_structures +ffffffff818fe920 T ngbe_free_receive_structures +ffffffff818fe9d0 T ngbe_free_pci_resources +ffffffff818fea60 T ngbe_stop +ffffffff818fefd0 T ngbe_release_hw_control +ffffffff818ff050 T ngbe_init +ffffffff818ff560 T ngbe_setup_isb +ffffffff818ff5d0 T ngbe_configure_pb +ffffffff818ff6b0 T ngbe_iff +ffffffff818ff8a0 T ngbe_setup_vlan_hw_support +ffffffff818ff960 T ngbe_setup_transmit_structures +ffffffff818ffa20 T ngbe_initialize_transmit_unit +ffffffff818ffda0 T ngbe_setup_receive_structures +ffffffff818ffea0 T ngbe_initialize_receive_unit +ffffffff81900360 T ngbe_get_hw_control +ffffffff819003e0 T ngbe_setup_gpie +ffffffff81900410 T ngbe_configure_ivars +ffffffff81900630 T ngbe_non_sfp_link_config +ffffffff819006e0 T ngbe_enable_intr +ffffffff81900890 t NGBE_WRITE_REG_MASK +ffffffff81900930 T ngbe_ioctl +ffffffff81900b90 T ngbe_rxrinfo +ffffffff81900ce0 T ngbe_disable_intr +ffffffff81900da0 T ngbe_media_change +ffffffff81900e40 T ngbe_media_status +ffffffff81900f50 T ngbe_update_link_status +ffffffff81901180 T ngbe_rxfill +ffffffff819012c0 T ngbe_get_buf +ffffffff819013f0 T ngbe_start +ffffffff819015a0 T ngbe_encap +ffffffff819017c0 T ngbe_disable_pcie_master +ffffffff81901880 T ngbe_reset +ffffffff819018e0 T ngbe_set_rx_drop_en +ffffffff819019f0 T ngbe_watchdog +ffffffff81901ac0 T ngbe_setup_msix +ffffffff81901b50 T ngbe_intr_queue +ffffffff81901c50 T ngbe_intr_link +ffffffff81901d40 T ngbe_dma_malloc +ffffffff81901ea0 T ngbe_dma_free +ffffffff81901f50 T ngbe_rxrefill +ffffffff81902000 T ngbe_free_receive_buffers +ffffffff81902110 T ngbe_free_transmit_buffers +ffffffff81902230 T ngbe_allocate_receive_buffers +ffffffff81902360 T ngbe_allocate_transmit_buffers +ffffffff81902480 T ngbe_setup_receive_ring +ffffffff81902570 T ngbe_setup_transmit_ring +ffffffff819026b0 T ngbe_addr_list_itr +ffffffff819026f0 T ngbe_setup_psrtype +ffffffff81902720 T ngbe_initialize_rss_mapping +ffffffff81902940 T ngbe_handle_phy_event +ffffffff819029e0 T ngbe_enable_queue +ffffffff81902a40 T ngbe_rxeof +ffffffff81902db0 T ngbe_txeof +ffffffff81902f50 T ngbe_init_eeprom_params +ffffffff81902fd0 T ngbe_init_hw +ffffffff81903040 T ngbe_init_ops +ffffffff81903250 T ngbe_phy_reset +ffffffff819033d0 T ngbe_phy_read_reg +ffffffff81903470 T ngbe_phy_write_reg +ffffffff81903510 T ngbe_phy_setup_link +ffffffff81903770 T ngbe_phy_led_ctrl +ffffffff81903860 T ngbe_phy_check_overtemp +ffffffff819038b0 T ngbe_phy_identify +ffffffff819038f0 T ngbe_phy_init +ffffffff81903b10 T ngbe_phy_check_event +ffffffff81903b70 T ngbe_phy_get_advertised_pause +ffffffff81903bd0 T ngbe_phy_get_lp_advertised_pause +ffffffff81903c80 T ngbe_phy_set_pause_advertisement +ffffffff81903d00 T ngbe_phy_setup +ffffffff81903e90 T ngbe_clear_hw_cntrs +ffffffff819040d0 T ngbe_get_mac_addr +ffffffff81904180 T ngbe_stop_adapter +ffffffff819043c0 T ngbe_get_bus_info +ffffffff81904470 T ngbe_set_lan_id_multi_port_pcie +ffffffff819044d0 T ngbe_acquire_swfw_sync +ffffffff81904730 T ngbe_release_swfw_sync +ffffffff81904870 T ngbe_reset_hw +ffffffff81904ab0 T ngbe_get_media_type +ffffffff81904ae0 T ngbe_disable_sec_rx_path +ffffffff81904ba0 T ngbe_enable_sec_rx_path +ffffffff81904c10 T ngbe_enable_rx_dma +ffffffff81904c60 T ngbe_start_hw +ffffffff81904d20 T ngbe_set_rar +ffffffff81904e70 T ngbe_init_rx_addrs +ffffffff81905030 T ngbe_update_mc_addr_list +ffffffff819051e0 T ngbe_enable_rx +ffffffff81905320 T ngbe_disable_rx +ffffffff81905440 T ngbe_clear_vfta +ffffffff81905540 T ngbe_init_uta_tables +ffffffff819055c0 T ngbe_fc_enable +ffffffff81905860 T ngbe_setup_fc +ffffffff81905940 T ngbe_check_mac_link +ffffffff81905ab0 T ngbe_set_rxpba +ffffffff81905b50 T ngbe_eepromcheck_cap +ffffffff81905c10 T ngbe_phy_led_oem_chk +ffffffff81905d00 T ngbe_set_fw_drv_ver +ffffffff81905e20 T ngbe_init_thermal_sensor_thresh +ffffffff81905ee0 T ngbe_validate_mac_addr +ffffffff81905f40 T ngbe_fc_autoneg +ffffffff819060d0 T ngbe_fc_autoneg_copper +ffffffff819061e0 T ngbe_negotiate_fc +ffffffff81906290 T ngbe_fmgr_cmd_op +ffffffff81906370 T ngbe_flash_read_dword +ffffffff81906460 T ngbe_calculate_checksum +ffffffff81906520 T ngbe_check_internal_phy_id +ffffffff81906660 T ngbe_gphy_wait_mdio_access_on +ffffffff819066e0 T ngbe_check_mng_access +ffffffff81906730 T ngbe_mng_present +ffffffff81906780 T ngbe_check_reset_blocked +ffffffff81906800 T ngbe_set_ivar +ffffffff819068f0 T ngbe_pbthresh_setup +ffffffff819069b0 T ngbe_disable_queue +ffffffff81906a10 T ngbe_host_interface_command +ffffffff81906de0 T ngbe_tx_ctx_setup +ffffffff81906e70 T ngbe_read_pci_cfg_word +ffffffff81906ed0 T ngbe_set_pci_config_data +ffffffff81906f60 T ngbe_get_copper_link_capabilities +ffffffff81906fb0 T ngbe_get_eeprom_semaphore +ffffffff81907110 T ngbe_release_eeprom_semaphore +ffffffff819071c0 T ngbe_gphy_dis_eee +ffffffff819072e0 T ngbe_gphy_efuse_calibration +ffffffff81907690 T ngbe_hpbthresh +ffffffff81907720 T ngbe_lpbthresh +ffffffff81907760 T ngbe_mta_vector +ffffffff819077b0 T ngbe_setup_copper_link +ffffffff81907800 T ngbe_reset_misc +ffffffff81907b60 T ngbe_set_mta +ffffffff81907bd0 T ngbe_rx_checksum +ffffffff81908000 T com_pci_match +ffffffff81908030 T com_pci_attach +ffffffff81908310 T com_pci_detach +ffffffff819083b0 T com_pci_activate +ffffffff819084a0 T com_pci_intr_designware +ffffffff81909000 T agpdev_print +ffffffff81909050 T agpbus_probe +ffffffff819090c0 T agpvga_match +ffffffff81909130 T agp_attach_bus +ffffffff819091b0 T agp_probe +ffffffff819091e0 T agp_attach +ffffffff81909300 T agp_alloc_gatt +ffffffff819094c0 T agp_alloc_dmamem +ffffffff819095f0 T agp_free_dmamem +ffffffff81909650 T agp_free_gatt +ffffffff819096d0 T agp_generic_enable +ffffffff81909860 T agp_find_device +ffffffff819098b0 T agp_state +ffffffff819098e0 T agp_get_info +ffffffff81909980 T agp_acquire +ffffffff819099d0 T agp_release +ffffffff81909a20 T agp_enable +ffffffff81909a50 T agp_mmap +ffffffff8190a000 T agp_i810_probe +ffffffff8190a060 T agp_i810_attach +ffffffff8190a570 T agp_i810_activate +ffffffff8190a5b0 T agp_i810_bind_page +ffffffff8190a670 T agp_i810_unbind_page +ffffffff8190a730 T agp_i810_flush_tlb +ffffffff8190a760 T agp_i810_enable +ffffffff8190a790 T agp_i810_get_chiptype +ffffffff8190aa00 T intagp_gmch_match +ffffffff8190aa60 T agp_i810_configure +ffffffff8190aba0 T intagp_write_gtt +ffffffff8190b000 T dma_resv_init +ffffffff8190b060 T dma_resv_fini +ffffffff8190b160 T dma_resv_reserve_fences +ffffffff8190b320 T dma_resv_add_fence +ffffffff8190b4a0 T dma_resv_replace_fences +ffffffff8190b550 T dma_resv_iter_first_unlocked +ffffffff8190b5e0 t dma_resv_iter_walk_unlocked +ffffffff8190b6d0 T dma_resv_iter_next_unlocked +ffffffff8190b760 T dma_resv_iter_first +ffffffff8190b7f0 T dma_resv_iter_next +ffffffff8190b870 T dma_resv_copy_fences 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__drm_atomic_state_free +ffffffff8190f7e0 T drm_atomic_get_crtc_state +ffffffff8190f930 T drm_atomic_get_plane_state +ffffffff8190fb20 T drm_atomic_private_obj_init +ffffffff8190fc10 T drm_atomic_private_obj_fini +ffffffff8190fca0 T drm_atomic_get_private_obj_state +ffffffff8190fe50 T drm_atomic_get_old_private_obj_state +ffffffff8190feb0 T drm_atomic_get_new_private_obj_state +ffffffff8190ff10 T drm_atomic_get_old_connector_for_encoder +ffffffff8190ff80 T drm_atomic_get_new_connector_for_encoder +ffffffff8190fff0 T drm_atomic_get_connector_state +ffffffff81910200 T drm_atomic_get_bridge_state +ffffffff81910210 T drm_atomic_get_old_bridge_state +ffffffff81910270 T drm_atomic_get_new_bridge_state +ffffffff819102d0 T drm_atomic_add_encoder_bridges +ffffffff81910390 T drm_atomic_add_affected_connectors +ffffffff819104b0 T drm_atomic_add_affected_planes +ffffffff819105d0 T drm_atomic_check_only +ffffffff81911090 T drm_atomic_commit +ffffffff81911160 T drm_atomic_print_new_state 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T drm_atomic_helper_commit_modeset_enables +ffffffff81914a40 T drm_atomic_helper_wait_for_fences +ffffffff81914b40 T drm_atomic_helper_wait_for_vblanks +ffffffff81914e80 T drm_atomic_helper_wait_for_flip_done +ffffffff81915040 T drm_atomic_helper_commit_tail +ffffffff819151c0 T drm_atomic_helper_commit_planes +ffffffff81915450 T drm_atomic_helper_fake_vblank +ffffffff81915530 T drm_atomic_helper_commit_hw_done +ffffffff81915700 T drm_atomic_helper_cleanup_planes +ffffffff819157b0 T drm_atomic_helper_commit_tail_rpm +ffffffff81915930 t try_wait_for_completion +ffffffff81915990 T drm_atomic_helper_async_commit +ffffffff81915c20 T drm_atomic_helper_commit +ffffffff81915ee0 T drm_atomic_helper_prepare_planes +ffffffff81916090 T drm_atomic_helper_setup_commit +ffffffff81916770 t commit_work +ffffffff81916790 T drm_atomic_helper_swap_state +ffffffff81916de0 t commit_tail +ffffffff819170d0 t release_crtc_commit +ffffffff81917110 t crtc_or_fake_commit +ffffffff81917210 T drm_atomic_helper_wait_for_dependencies +ffffffff81917410 T drm_atomic_helper_commit_cleanup_done +ffffffff81917670 T drm_atomic_helper_commit_planes_on_crtc +ffffffff819178b0 T drm_atomic_helper_disable_planes_on_crtc +ffffffff81917a10 T drm_atomic_helper_update_plane +ffffffff81917b40 T drm_atomic_helper_disable_plane +ffffffff81917c00 T drm_atomic_helper_set_config +ffffffff81917cb0 T drm_atomic_helper_disable_all +ffffffff81917e60 T drm_atomic_helper_shutdown +ffffffff81917fb0 T drm_atomic_helper_duplicate_state +ffffffff81918100 T drm_atomic_helper_suspend +ffffffff81918250 T drm_atomic_helper_commit_duplicated_state +ffffffff81918390 T drm_atomic_helper_resume +ffffffff819184c0 T drm_atomic_helper_page_flip +ffffffff81918580 t page_flip_common +ffffffff81918680 T drm_atomic_helper_page_flip_target +ffffffff819187a0 T drm_atomic_helper_bridge_propagate_bus_fmt +ffffffff81918810 t set_best_encoder +ffffffff81919000 T __drm_atomic_helper_crtc_state_reset +ffffffff81919030 T __drm_atomic_helper_crtc_reset +ffffffff81919090 T drm_atomic_helper_crtc_reset +ffffffff81919130 T __drm_atomic_helper_crtc_duplicate_state +ffffffff81919200 T drm_atomic_helper_crtc_duplicate_state +ffffffff819192a0 T __drm_atomic_helper_crtc_destroy_state +ffffffff81919360 T drm_atomic_helper_crtc_destroy_state +ffffffff81919390 T __drm_atomic_helper_plane_state_reset +ffffffff81919460 T __drm_atomic_helper_plane_reset +ffffffff819194c0 T drm_atomic_helper_plane_reset +ffffffff819195a0 T __drm_atomic_helper_plane_destroy_state +ffffffff81919610 T __drm_atomic_helper_plane_duplicate_state +ffffffff81919690 T drm_atomic_helper_plane_duplicate_state +ffffffff81919770 T drm_atomic_helper_plane_destroy_state +ffffffff819197f0 T __drm_atomic_helper_connector_state_reset +ffffffff81919820 T __drm_atomic_helper_connector_reset +ffffffff81919860 T drm_atomic_helper_connector_reset +ffffffff81919930 T __drm_atomic_helper_connector_destroy_state +ffffffff81919990 T drm_atomic_helper_connector_tv_reset +ffffffff819199f0 T __drm_atomic_helper_connector_duplicate_state +ffffffff81919a80 T drm_atomic_helper_connector_duplicate_state +ffffffff81919b60 T drm_atomic_helper_connector_destroy_state +ffffffff81919bd0 T __drm_atomic_helper_private_obj_duplicate_state +ffffffff81919c10 T __drm_atomic_helper_bridge_duplicate_state +ffffffff81919c50 T drm_atomic_helper_bridge_duplicate_state +ffffffff81919d00 T drm_atomic_helper_bridge_destroy_state +ffffffff81919d20 T __drm_atomic_helper_bridge_reset +ffffffff81919d70 T drm_atomic_helper_bridge_reset +ffffffff8191a000 T drm_atomic_set_mode_for_crtc +ffffffff8191a220 T drm_atomic_set_mode_prop_for_crtc +ffffffff8191a4b0 T drm_atomic_set_crtc_for_plane +ffffffff8191a620 T drm_atomic_set_fb_for_plane +ffffffff8191a700 T drm_atomic_set_crtc_for_connector +ffffffff8191a860 T drm_atomic_get_property +ffffffff8191af50 T drm_atomic_connector_commit_dpms +ffffffff8191b090 T drm_atomic_set_property +ffffffff8191ba20 T drm_mode_atomic_ioctl +ffffffff8191be50 t prepare_signaling +ffffffff8191c2d0 t complete_signaling +ffffffff8191c4a0 t drm_atomic_replace_property_blob_from_id +ffffffff8191c580 t drm_atomic_set_writeback_fb_for_connector +ffffffff8191c5f0 t set_out_fence_for_connector +ffffffff8191d000 T drm_is_current_master +ffffffff8191d060 T drm_getmagic +ffffffff8191d130 T drm_authmagic +ffffffff8191d1f0 T drm_master_create +ffffffff8191d290 T drm_setmaster_ioctl +ffffffff8191d350 t drm_new_set_master +ffffffff8191d4e0 T drm_dropmaster_ioctl +ffffffff8191d5c0 t drm_drop_master +ffffffff8191d670 T drm_master_open +ffffffff8191d720 T drm_master_get +ffffffff8191d750 T drm_master_release +ffffffff8191d830 T drm_master_put +ffffffff8191d8c0 T drm_file_get_master +ffffffff8191d920 T drm_master_internal_acquire +ffffffff8191d990 T drm_master_internal_release +ffffffff8191e000 T drm_plane_create_alpha_property +ffffffff8191e0a0 T drm_plane_create_rotation_property +ffffffff8191e1e0 T drm_rotation_simplify +ffffffff8191e250 T drm_plane_create_zpos_property +ffffffff8191e310 T drm_plane_create_zpos_immutable_property +ffffffff8191e3c0 T drm_atomic_normalize_zpos +ffffffff8191e6c0 T drm_plane_create_blend_mode_property +ffffffff8191e860 t drm_atomic_state_zpos_cmp +ffffffff8191f000 T drm_bridge_add +ffffffff8191f070 T devm_drm_bridge_add +ffffffff8191f110 T drm_bridge_remove +ffffffff8191f170 T drm_bridge_attach +ffffffff8191f330 T drm_bridge_detach +ffffffff8191f420 T drm_bridge_chain_mode_fixup +ffffffff8191f4c0 T drm_bridge_chain_mode_valid +ffffffff8191f560 T drm_bridge_chain_disable +ffffffff8191f5f0 T drm_bridge_chain_post_disable +ffffffff8191f660 T drm_bridge_chain_mode_set +ffffffff8191f6f0 T drm_bridge_chain_pre_enable +ffffffff8191f780 T drm_bridge_chain_enable +ffffffff8191f7f0 T drm_atomic_bridge_chain_disable +ffffffff8191f8f0 T drm_atomic_bridge_chain_post_disable +ffffffff8191fb20 T drm_atomic_bridge_chain_pre_enable +ffffffff8191fd60 T drm_atomic_bridge_chain_enable +ffffffff8191fe70 T drm_atomic_bridge_chain_check +ffffffff81920200 T drm_bridge_detect +ffffffff81920260 T drm_bridge_get_modes +ffffffff819202c0 T drm_bridge_get_edid +ffffffff81920320 T drm_bridge_hpd_enable +ffffffff819203f0 T drm_bridge_hpd_disable +ffffffff81920490 T drm_bridge_hpd_notify +ffffffff819204f0 t drm_bridge_atomic_duplicate_priv_state +ffffffff81920510 t drm_bridge_atomic_destroy_priv_state +ffffffff81920530 t select_bus_fmt_recursive +ffffffff81921000 T drm_buddy_init +ffffffff81921470 T drm_buddy_fini +ffffffff81921560 T drm_get_buddy +ffffffff819215a0 T drm_buddy_free_block +ffffffff819215f0 t __drm_buddy_free +ffffffff81921740 T drm_buddy_free_list +ffffffff81921800 T drm_buddy_block_trim +ffffffff81921a60 t __alloc_range +ffffffff81921d40 T drm_buddy_alloc_blocks +ffffffff81922350 t __drm_buddy_alloc_range +ffffffff819223e0 T drm_buddy_block_print +ffffffff81922420 T drm_buddy_print +ffffffff81922590 T drm_buddy_module_exit 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drm_client_rotation +ffffffff81926e20 T drm_client_modeset_check +ffffffff81926ec0 t drm_client_modeset_commit_atomic +ffffffff819270c0 T drm_client_modeset_commit_locked +ffffffff81927260 T drm_client_modeset_commit +ffffffff819272d0 T drm_client_modeset_dpms +ffffffff81927520 t drm_connector_pick_cmdline_mode +ffffffff81928000 T drm_color_ctm_s31_32_to_qm_n +ffffffff819280d0 T drm_crtc_enable_color_mgmt +ffffffff819281b0 T drm_mode_crtc_set_gamma_size +ffffffff819282d0 T drm_mode_gamma_set_ioctl +ffffffff819287b0 T drm_mode_gamma_get_ioctl +ffffffff819288f0 T drm_get_color_encoding_name +ffffffff81928960 T drm_get_color_range_name +ffffffff819289d0 T drm_plane_create_color_properties +ffffffff81928c30 T drm_color_lut_check +ffffffff81929000 T drm_connector_ida_init +ffffffff81929110 T drm_connector_ida_destroy +ffffffff81929220 T drm_get_connector_type_name +ffffffff81929260 T drm_connector_free_work_fn +ffffffff81929320 T drm_connector_init +ffffffff819293a0 t __drm_connector_init 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drm_mode_create_dp_colorspace_property +ffffffff8192b560 T drm_mode_create_suggested_offset_properties +ffffffff8192b630 T drm_connector_set_path_property +ffffffff8192b690 T drm_connector_set_tile_property +ffffffff8192b7e0 T drm_connector_set_link_status_property +ffffffff8192b830 T drm_connector_attach_max_bpc_property +ffffffff8192b8f0 T drm_connector_attach_hdr_output_metadata_property +ffffffff8192b940 T drm_connector_attach_colorspace_property +ffffffff8192b990 T drm_connector_atomic_hdr_metadata_equal +ffffffff8192ba00 T drm_connector_set_vrr_capable_property +ffffffff8192ba50 T drm_connector_set_panel_orientation +ffffffff8192bb20 T drm_connector_set_panel_orientation_with_quirk +ffffffff8192bc00 T drm_connector_set_orientation_from_panel +ffffffff8192bcf0 T drm_connector_create_privacy_screen_properties +ffffffff8192bd90 T drm_connector_attach_privacy_screen_properties +ffffffff8192be00 T drm_connector_attach_privacy_screen_provider +ffffffff8192bf10 t drm_connector_privacy_screen_notifier +ffffffff8192bfb0 T drm_connector_update_privacy_screen +ffffffff8192c020 T drm_connector_set_obj_prop +ffffffff8192c100 T drm_connector_property_set_ioctl +ffffffff8192c160 T drm_mode_getconnector +ffffffff8192c660 T drm_connector_find_by_fwnode +ffffffff8192c710 T drm_connector_oob_hotplug_event +ffffffff8192c800 T drm_mode_get_tile_group +ffffffff8192c8d0 T drm_mode_create_tile_group +ffffffff8192c9a0 t drm_connector_free +ffffffff8192c9e0 t kasprintf +ffffffff8192d000 T drm_crtc_from_index +ffffffff8192d060 T drm_crtc_force_disable +ffffffff8192d1a0 T drm_mode_set_config_internal +ffffffff8192d220 T drm_crtc_register_all +ffffffff8192d2a0 T drm_crtc_unregister_all +ffffffff8192d310 T drm_crtc_create_fence +ffffffff8192d3a0 T drm_crtc_init_with_planes +ffffffff8192d470 t __drm_crtc_init_with_planes +ffffffff8192d870 T drmm_crtc_init_with_planes +ffffffff8192d970 T __drmm_crtc_alloc_with_planes +ffffffff8192dae0 T drm_crtc_cleanup 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drm_atomic_helper_check_plane_damage +ffffffff819310a0 T drm_atomic_helper_dirtyfb +ffffffff81931350 T drm_atomic_helper_damage_iter_init +ffffffff819314a0 T drm_atomic_helper_damage_iter_next +ffffffff81931540 T drm_atomic_helper_damage_merged +ffffffff81932000 T displayid_iter_edid_begin +ffffffff81932050 T __displayid_iter_next +ffffffff81932300 T displayid_iter_end +ffffffff81933000 T drm_mode_create_dumb +ffffffff819330e0 T drm_mode_create_dumb_ioctl +ffffffff819331c0 T drm_mode_mmap_dumb_ioctl +ffffffff81933230 T drm_mode_destroy_dumb +ffffffff819332a0 T drm_mode_destroy_dumb_ioctl +ffffffff81934000 T drm_edid_header_is_valid +ffffffff81934080 T drm_edid_are_equal +ffffffff819340f0 T drm_edid_block_valid +ffffffff81934300 t edid_block_check +ffffffff81934430 t edid_block_status_print +ffffffff81934520 T drm_edid_is_valid +ffffffff819345a0 T drm_edid_override_set +ffffffff81934610 T drm_connector_update_edid_property +ffffffff819347c0 T drm_edid_override_reset +ffffffff819348f0 T drm_add_override_edid_modes +ffffffff81934ab0 T drm_add_edid_modes +ffffffff81934ba0 T drm_do_get_edid +ffffffff81934bc0 t _drm_do_get_edid +ffffffff81934fb0 T drm_edid_raw +ffffffff81935040 T drm_edid_alloc +ffffffff81935100 T drm_edid_dup +ffffffff819351d0 T drm_edid_free +ffffffff81935230 T drm_probe_ddc +ffffffff81935330 t drm_do_probe_ddc_edid +ffffffff81935480 T drm_get_edid +ffffffff819355c0 T drm_edid_read_custom +ffffffff819356b0 T drm_edid_read_ddc +ffffffff819357e0 T drm_edid_read +ffffffff81935860 T drm_edid_get_panel_id +ffffffff81935940 t edid_block_read +ffffffff81935bb0 T drm_get_edid_switcheroo +ffffffff81935c00 T drm_edid_duplicate +ffffffff81935c80 T drm_mode_find_dmt +ffffffff81935da0 T drm_mode_fixup_1366x768 +ffffffff81935df0 T drm_find_edid_extension +ffffffff81935ff0 T drm_match_cea_mode +ffffffff81936270 T drm_display_mode_from_cea_vic +ffffffff819362e0 T drm_edid_get_monitor_name +ffffffff81936380 t get_monitor_name +ffffffff81936870 T drm_edid_to_sad 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drm_i2c_encoder_commit +ffffffff819400a0 T drm_i2c_encoder_mode_set +ffffffff819400c0 T drm_i2c_encoder_detect +ffffffff819400e0 T drm_i2c_encoder_save +ffffffff81940100 T drm_i2c_encoder_restore +ffffffff81941000 T drm_fb_helper_debug_enter +ffffffff81941100 T drm_fb_helper_debug_leave +ffffffff81941270 T drm_fb_helper_restore_fbdev_mode_unlocked +ffffffff81941310 t __drm_fb_helper_restore_fbdev_mode_unlocked +ffffffff819413c0 T drm_fb_helper_blank +ffffffff819414b0 T drm_fb_helper_prepare +ffffffff81941590 t drm_fb_helper_resume_worker +ffffffff819415c0 t drm_fb_helper_damage_work +ffffffff81941900 T drm_fb_helper_init +ffffffff81941970 T drm_fb_helper_alloc_fbi +ffffffff819419d0 T drm_fb_helper_unregister_fbi +ffffffff81941a00 T drm_fb_helper_fini +ffffffff81941b00 T drm_fb_helper_set_suspend +ffffffff81941b30 T drm_fb_helper_set_suspend_unlocked +ffffffff81941b60 T drm_fb_helper_set_par +ffffffff81941c50 T drm_fb_helper_pan_display +ffffffff81941d20 T drm_fb_helper_fill_info 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drm_send_event_timestamp_locked +ffffffff81943820 t drm_send_event_helper +ffffffff819439f0 T drm_send_event_locked +ffffffff81943a10 T drm_send_event +ffffffff81943a60 T mock_drm_getfile +ffffffff81944000 T drm_flip_work_allocate_task +ffffffff81944060 T drm_flip_work_queue_task +ffffffff819440b0 T drm_flip_work_queue +ffffffff81944150 T drm_flip_work_commit +ffffffff819441d0 T drm_flip_work_init +ffffffff81944240 t flip_worker +ffffffff81944320 T drm_flip_work_cleanup +ffffffff81945000 T drm_fb_clip_offset +ffffffff81945040 T drm_fb_memcpy +ffffffff819452f0 T drm_fb_swab +ffffffff81945400 t drm_fb_swab32_line +ffffffff81945460 t drm_fb_swab16_line +ffffffff819454c0 t drm_fb_xfrm +ffffffff819457b0 T drm_fb_xrgb8888_to_rgb332 +ffffffff81945810 t drm_fb_xrgb8888_to_rgb332_line +ffffffff81945910 T drm_fb_xrgb8888_to_rgb565 +ffffffff81945990 t drm_fb_xrgb8888_to_rgb565_swab_line +ffffffff81945a10 t drm_fb_xrgb8888_to_rgb565_line +ffffffff81945b20 T drm_fb_xrgb8888_to_rgb888 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drm_gem_init +ffffffff8194b550 t drm_gem_init_release +ffffffff8194b570 T drm_gem_object_init +ffffffff8194b6c0 T drm_gem_private_object_init +ffffffff8194b7b0 T drm_gem_handle_delete +ffffffff8194b8a0 t drm_gem_object_release_handle +ffffffff8194b930 T drm_gem_dumb_map_offset +ffffffff8194ba60 T drm_gem_object_lookup +ffffffff8194bad0 T drm_gem_create_mmap_offset +ffffffff8194bb00 T drm_gem_dumb_destroy +ffffffff8194bb20 T drm_gem_handle_create_tail +ffffffff8194bc90 t drm_gem_object_handle_put_unlocked +ffffffff8194bde0 T drm_gem_handle_create +ffffffff8194be30 T drm_gem_free_mmap_offset +ffffffff8194be60 T drm_gem_create_mmap_offset_size +ffffffff8194be90 T drm_gem_get_pages +ffffffff8194bee0 T drm_gem_put_pages +ffffffff8194bf10 T drm_gem_objects_lookup +ffffffff8194c070 T drm_gem_dma_resv_wait +ffffffff8194c1a0 T drm_gem_close_ioctl +ffffffff8194c1f0 T drm_gem_flink_ioctl +ffffffff8194c360 T drm_gem_open_ioctl +ffffffff8194c490 T drm_gem_open +ffffffff8194c4c0 T drm_gem_release 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drm_ht_remove_key +ffffffff81950300 T drm_ht_remove_item +ffffffff81950350 T drm_ht_remove +ffffffff81951000 T drm_getunique +ffffffff819510a0 T drm_getclient +ffffffff81951110 T drm_noop +ffffffff81951160 T drm_invalid_op +ffffffff81951190 T drm_version +ffffffff819513a0 T pledge_ioctl_drm +ffffffff81951470 T drm_ioctl_kernel +ffffffff819514c0 T drm_ioctl +ffffffff81951510 T drm_ioctl_flags +ffffffff81951560 T drm_do_ioctl +ffffffff81951890 T drmioctl +ffffffff819519e0 t drm_getstats +ffffffff81951a30 t drm_setversion +ffffffff81951b90 t drm_getcap +ffffffff81951d70 t drm_setclientcap +ffffffff81952000 T tasklet_unlock_wait +ffffffff81952080 T tasklet_unlock_spin_wait +ffffffff81952100 T tasklet_run +ffffffff81952160 T set_current_state +ffffffff81952200 T __set_current_state +ffffffff81952290 T schedule +ffffffff819522d0 T schedule_timeout +ffffffff81952380 T schedule_timeout_uninterruptible +ffffffff819523e0 T wake_up_process +ffffffff81952460 T autoremove_wake_function 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sg_copy_from_buffer +ffffffff81955af0 T i2c_master_xfer +ffffffff81955c20 T __i2c_transfer +ffffffff81955cd0 T i2c_transfer +ffffffff81955da0 T i2c_bb_master_xfer +ffffffff81955e80 T i2c_bb_functionality +ffffffff81955eb0 T i2c_bit_add_bus +ffffffff81955ef0 T vga_disable_bridge +ffffffff81955fa0 T vga_get_uninterruptible +ffffffff81955ff0 T vga_put +ffffffff81956070 T acpi_get_table +ffffffff81956130 T acpi_put_table +ffffffff81956160 T acpi_get_handle +ffffffff819561b0 T acpi_get_name +ffffffff81956250 T acpi_evaluate_object +ffffffff819564b0 T drm_linux_acpi_notify +ffffffff81956530 T register_acpi_notifier +ffffffff81956570 T unregister_acpi_notifier +ffffffff81956600 T acpi_format_exception +ffffffff81956650 T backlight_do_update_status +ffffffff81956670 T backlight_device_register +ffffffff81956720 T backlight_device_unregister +ffffffff81956780 T backlight_schedule_update_status +ffffffff819567a0 T backlight_enable +ffffffff819567e0 T backlight_disable +ffffffff81956820 T backlight_device_get_by_name +ffffffff81956890 T dev_set_drvdata +ffffffff81956930 T dev_get_drvdata +ffffffff81956990 T drm_sysfs_hotplug_event +ffffffff819569b0 T drm_sysfs_connector_hotplug_event +ffffffff819569d0 T drm_sysfs_connector_status_event +ffffffff819569f0 T dma_fence_get +ffffffff81956a30 T dma_fence_get_rcu +ffffffff81956a70 T dma_fence_get_rcu_safe +ffffffff81956ab0 T dma_fence_release +ffffffff81956ae0 T dma_fence_put +ffffffff81956b50 T dma_fence_signal_timestamp_locked +ffffffff81956c00 T dma_fence_signal +ffffffff81956d30 T dma_fence_signal_locked +ffffffff81956e40 T dma_fence_signal_timestamp +ffffffff81956f20 T dma_fence_is_signaled +ffffffff81956f90 T dma_fence_is_signaled_locked +ffffffff819570d0 T dma_fence_timestamp +ffffffff81957170 T dma_fence_wait_timeout +ffffffff819571d0 T dma_fence_default_wait +ffffffff819573b0 T dma_fence_wait +ffffffff81957410 T dma_fence_enable_sw_signaling +ffffffff81957560 T dma_fence_init +ffffffff819575c0 T dma_fence_add_callback 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dma_fence_chain_signaled +ffffffff819589d0 t dma_fence_chain_release +ffffffff81958b10 T dma_fence_is_container +ffffffff81958b60 T dmabuf_read +ffffffff81958b90 T dmabuf_write +ffffffff81958bc0 T dmabuf_ioctl +ffffffff81958bf0 T dmabuf_kqfilter +ffffffff81958c20 T dmabuf_stat +ffffffff81958ce0 T dmabuf_close +ffffffff81958d50 T dmabuf_seek +ffffffff81958de0 T dma_buf_export +ffffffff81958e90 T dma_buf_get +ffffffff81958f20 T dma_buf_put +ffffffff81958fd0 T dma_buf_fd +ffffffff819590e0 T get_dma_buf +ffffffff81959120 T pcie_get_speed_cap +ffffffff819592d0 T printk +ffffffff81959370 T pcie_get_width_cap +ffffffff81959460 T pcie_aspm_enabled +ffffffff819594f0 T wait_on_bit +ffffffff819595c0 T wait_on_bit_timeout +ffffffff81959690 T wake_up_bit +ffffffff819596d0 T clear_and_wake_up_bit +ffffffff81959720 T bit_waitqueue +ffffffff81959750 T __var_waitqueue +ffffffff81959780 T drm_linux_init +ffffffff819598f0 T drm_linux_exit +ffffffff81959950 T pci_resize_resource +ffffffff81959aa0 T register_shrinker +ffffffff81959af0 T unregister_shrinker +ffffffff81959b50 T drmbackoff +ffffffff81959be0 T bitmap_zalloc +ffffffff81959c10 T bitmap_free +ffffffff81959c30 T atomic_dec_and_mutex_lock +ffffffff81959cb0 T interval_tree_iter_first +ffffffff81959d60 T interval_tree_remove +ffffffff81959d80 T interval_tree_insert +ffffffff81959df0 T syncfile_read +ffffffff81959e20 T syncfile_write +ffffffff81959e50 T syncfile_ioctl +ffffffff81959e80 T syncfile_kqfilter +ffffffff81959eb0 T syncfile_stat +ffffffff81959f60 T syncfile_close +ffffffff8195a000 T syncfile_seek +ffffffff8195a080 T fd_install +ffffffff8195a150 T fput +ffffffff8195a1a0 T get_unused_fd_flags +ffffffff8195a2b0 T put_unused_fd +ffffffff8195a340 T sync_file_get_fence +ffffffff8195a3f0 T sync_file_create +ffffffff8195a480 T drm_firmware_drivers_only +ffffffff8195a4b0 T memremap +ffffffff8195a500 T memunmap +ffffffff8195a520 T dma_tag_lookup +ffffffff8195a590 T dma_alloc_coherent +ffffffff8195a680 T dma_free_coherent +ffffffff8195a7b0 T dma_get_sgtable +ffffffff8195a880 T dma_map_resource +ffffffff8195a9a0 T component_compare_of +ffffffff8195a9f0 T drm_of_component_match_add +ffffffff8195aa50 T component_master_add_with_match +ffffffff8195aa90 t dma_fence_stub_get_name +ffffffff8195aac0 t dma_fence_array_cb_func +ffffffff8195ab40 t dma_fence_chain_cb +ffffffff8195ac00 t dma_fence_chain_timo +ffffffff8195b000 T drmm_kzalloc +ffffffff8195b100 T drmm_kcalloc +ffffffff8195b210 T drmm_kstrdup +ffffffff8195b340 T drmm_kfree +ffffffff8195b440 T drmm_add_action +ffffffff8195b500 T drmm_add_action_or_reset +ffffffff8195b5d0 T drm_managed_release +ffffffff8195b690 T drmm_add_final_kfree +ffffffff8195c000 T mipi_dsi_attach +ffffffff8195c050 T mipi_dsi_detach +ffffffff8195c0a0 T devm_mipi_dsi_attach +ffffffff8195c110 T mipi_dsi_packet_format_is_short +ffffffff8195c150 T mipi_dsi_packet_format_is_long +ffffffff8195c190 T mipi_dsi_create_packet +ffffffff8195c2a0 T mipi_dsi_shutdown_peripheral +ffffffff8195c350 T mipi_dsi_turn_on_peripheral +ffffffff8195c400 T mipi_dsi_set_maximum_return_packet_size +ffffffff8195c4b0 T mipi_dsi_compression_mode +ffffffff8195c560 T mipi_dsi_picture_parameter_set +ffffffff8195c610 T mipi_dsi_generic_write +ffffffff8195c6d0 T mipi_dsi_generic_read +ffffffff8195c780 T mipi_dsi_dcs_write_buffer +ffffffff8195c840 T mipi_dsi_dcs_write +ffffffff8195c990 T mipi_dsi_dcs_read +ffffffff8195ca30 T mipi_dsi_dcs_nop +ffffffff8195cae0 T mipi_dsi_dcs_soft_reset +ffffffff8195cb90 T mipi_dsi_dcs_get_power_mode +ffffffff8195cc50 T mipi_dsi_dcs_get_pixel_format +ffffffff8195cd10 T mipi_dsi_dcs_enter_sleep_mode +ffffffff8195cdc0 T mipi_dsi_dcs_exit_sleep_mode +ffffffff8195ce70 T mipi_dsi_dcs_set_display_off +ffffffff8195cf20 T mipi_dsi_dcs_set_display_on +ffffffff8195cfd0 T mipi_dsi_dcs_set_column_address +ffffffff8195d090 T mipi_dsi_dcs_set_page_address +ffffffff8195d150 T mipi_dsi_dcs_set_tear_off +ffffffff8195d200 T mipi_dsi_dcs_set_tear_on +ffffffff8195d2b0 T mipi_dsi_dcs_set_pixel_format +ffffffff8195e000 T __drm_mm_interval_first +ffffffff8195e0c0 T drm_mm_reserve_node +ffffffff8195e340 t add_hole +ffffffff8195e4a0 T drm_mm_insert_node_in_range +ffffffff8195ea90 T drm_mm_remove_node +ffffffff8195ebc0 T drm_mm_replace_node +ffffffff8195eda0 T drm_mm_scan_init_with_range +ffffffff8195ee30 T drm_mm_scan_add_block +ffffffff8195efa0 T drm_mm_scan_remove_block +ffffffff8195f020 T drm_mm_scan_color_evict +ffffffff8195f100 T drm_mm_init +ffffffff8195f1b0 T drm_mm_takedown +ffffffff8195f1f0 T drm_mm_print +ffffffff81960000 T drm_modeset_register_all +ffffffff819600a0 T drm_modeset_unregister_all +ffffffff819600e0 T drm_mode_getresources +ffffffff81960390 T drm_mode_config_reset +ffffffff819604f0 T drmm_mode_config_init +ffffffff81960b70 T drm_mode_config_cleanup +ffffffff81960e90 t drm_mode_config_init_release +ffffffff81960ea0 T drm_mode_config_validate +ffffffff81962000 T __drm_mode_object_add +ffffffff81962100 T drm_mode_object_add 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+ffffffff81964760 T drm_mode_set_name +ffffffff819647b0 T drm_gtf_mode_complex +ffffffff81964ab0 T drm_gtf_mode +ffffffff81964b00 T drm_mode_get_hv_timing +ffffffff81964b50 T drm_mode_init +ffffffff81964c20 T drm_mode_set_crtcinfo +ffffffff81964de0 T drm_mode_copy +ffffffff81964e40 T drm_mode_duplicate +ffffffff81964ec0 T drm_mode_match +ffffffff81965060 T drm_mode_equal +ffffffff81965080 T drm_mode_equal_no_clocks +ffffffff819650a0 T drm_mode_equal_no_clocks_no_stereo +ffffffff81965160 T drm_mode_validate_driver +ffffffff81965250 T drm_mode_validate_size +ffffffff819652a0 T drm_mode_validate_ycbcr420 +ffffffff81965310 T drm_mode_is_420_only +ffffffff81965360 T drm_get_mode_status_name +ffffffff819653e0 T drm_mode_prune_invalid +ffffffff81965670 T drm_mode_sort +ffffffff819656a0 t drm_mode_compare +ffffffff81965840 T drm_connector_list_update +ffffffff81965a10 T drm_mode_parse_command_line_for_connector +ffffffff81965a40 T drm_mode_create_from_cmdline_mode +ffffffff81965b30 T drm_mode_convert_to_umode +ffffffff81965cd0 T drm_mode_convert_umode +ffffffff81965ef0 T drm_mode_is_420_also +ffffffff81965f40 T drm_mode_is_420 +ffffffff81966000 T drm_helper_move_panel_connectors_to_head +ffffffff819660f0 T drm_helper_mode_fill_fb_struct +ffffffff819661b0 T drm_crtc_init +ffffffff81966280 T drm_mode_config_helper_suspend +ffffffff81966310 T drm_mode_config_helper_resume +ffffffff81967000 T drm_modeset_lock_all +ffffffff81967290 T drm_modeset_acquire_init +ffffffff81967320 T drm_modeset_lock_all_ctx +ffffffff81967410 T drm_modeset_backoff +ffffffff819674e0 T drm_modeset_acquire_fini +ffffffff81967510 T drm_warn_on_modeset_not_all_locked +ffffffff81967660 T drm_modeset_unlock_all +ffffffff81967750 T drm_modeset_drop_locks +ffffffff819677e0 T drm_modeset_unlock +ffffffff819678b0 t modeset_lock +ffffffff81967bf0 T drm_modeset_lock_init +ffffffff81967c50 T drm_modeset_lock +ffffffff81967d70 T drm_modeset_lock_single_interruptible +ffffffff81967e90 t __ww_mutex_lock +ffffffff81969000 T drm_mtrr_add +ffffffff81969070 T drm_mtrr_del +ffffffff8196a000 T drm_panel_init +ffffffff8196a040 T drm_panel_add +ffffffff8196a090 T drm_panel_remove +ffffffff8196a0f0 T drm_panel_prepare +ffffffff8196a140 T drm_panel_unprepare +ffffffff8196a190 T drm_panel_enable +ffffffff8196a230 T drm_panel_disable +ffffffff8196a2c0 T drm_panel_get_modes +ffffffff8196a310 T drm_panel_of_backlight +ffffffff8196b000 T drm_get_panel_orientation_quirk +ffffffff8196c000 T drm_pci_set_busid +ffffffff8196c090 t kasprintf +ffffffff8196d000 T drm_universal_plane_init +ffffffff8196d0e0 t __drm_universal_plane_init +ffffffff8196d5c0 T __drmm_universal_plane_alloc +ffffffff8196d700 t drmm_universal_plane_alloc_release +ffffffff8196d750 T __drm_universal_plane_alloc +ffffffff8196d890 T drm_plane_register_all +ffffffff8196d980 T drm_plane_unregister_all +ffffffff8196d9f0 T drm_plane_cleanup +ffffffff8196db40 T drm_plane_from_index +ffffffff8196dba0 T drm_plane_force_disable +ffffffff8196dcb0 T drm_mode_plane_set_obj_prop +ffffffff8196dd30 T drm_mode_getplane_res +ffffffff8196de30 T drm_mode_getplane +ffffffff8196df80 T drm_plane_check_pixel_format +ffffffff8196e040 T drm_any_plane_has_format +ffffffff8196e170 T drm_mode_setplane +ffffffff8196e460 T drm_mode_cursor_ioctl +ffffffff8196e4d0 t drm_mode_cursor_common +ffffffff8196ea10 T drm_mode_cursor2_ioctl +ffffffff8196ea30 T drm_mode_page_flip_ioctl +ffffffff8196ef90 T drm_plane_enable_fb_damage_clips +ffffffff8196efb0 T drm_plane_get_damage_clips_count +ffffffff8196eff0 T __drm_plane_get_damage_clips +ffffffff8196f030 T drm_plane_get_damage_clips +ffffffff8196f0d0 T drm_create_scaling_filter_prop +ffffffff8196f220 T drm_plane_create_scaling_filter_property +ffffffff8196f290 t kvasprintf +ffffffff8196f330 t kasprintf +ffffffff8196f400 t create_in_format_blob +ffffffff8196f5f0 t __setplane_atomic +ffffffff8196f790 t __setplane_internal +ffffffff8196f9a0 t __setplane_check +ffffffff81970000 T drm_plane_helper_update_primary +ffffffff819704b0 t get_connectors_for_crtc +ffffffff819705c0 T drm_plane_helper_disable_primary +ffffffff81970670 T drm_plane_helper_destroy +ffffffff819706a0 T drm_plane_helper_atomic_check +ffffffff81971000 T drm_prime_remove_buf_handle +ffffffff819710a0 T drm_prime_init_file_private +ffffffff81971100 T drm_prime_destroy_file_private +ffffffff81971160 T drm_gem_dmabuf_export +ffffffff819711c0 T drm_gem_dmabuf_release +ffffffff81971200 T drm_gem_prime_fd_to_handle +ffffffff81971420 T drm_gem_prime_import +ffffffff81971480 t drm_prime_add_buf_handle +ffffffff819715c0 T drm_prime_fd_to_handle_ioctl +ffffffff81971610 T drm_gem_prime_handle_to_fd +ffffffff81971840 T drm_prime_handle_to_fd_ioctl +ffffffff819718a0 T drm_gem_map_attach +ffffffff819718c0 T drm_gem_map_detach +ffffffff819718e0 T drm_gem_dmabuf_vmap +ffffffff81971900 T drm_gem_dmabuf_vunmap +ffffffff81971920 T drm_gem_prime_mmap +ffffffff81971970 T drm_prime_pages_to_sg +ffffffff819719c0 T drm_prime_get_contiguous_size +ffffffff81971a10 T drm_gem_prime_export +ffffffff81971aa0 T drm_gem_prime_import_dev +ffffffff81971b00 T drm_prime_sg_to_page_array +ffffffff81971b50 T drm_prime_sg_to_dma_addr_array +ffffffff81971ba0 T drm_prime_gem_destroy +ffffffff81972000 T __drm_puts_coredump +ffffffff819720e0 T __drm_printfn_coredump +ffffffff819722b0 T __drm_puts_seq_file +ffffffff819722e0 T __drm_printfn_seq_file +ffffffff81972310 T __drm_printfn_info +ffffffff81972340 T __drm_printfn_debug +ffffffff81972370 T __drm_printfn_err +ffffffff819723b0 T drm_puts +ffffffff819723e0 T drm_printf +ffffffff81972460 T drm_print_bits +ffffffff81972690 T drm_dev_printk +ffffffff81972730 T __drm_dev_dbg +ffffffff819727c0 T ___drm_dbg +ffffffff81972850 T __drm_err +ffffffff819728e0 T drm_print_regset32 +ffffffff81973000 T drm_crtc_mode_valid +ffffffff81973050 T drm_encoder_mode_valid +ffffffff81973090 T drm_connector_mode_valid +ffffffff81973110 T drm_kms_helper_poll_enable +ffffffff81973200 T drm_helper_probe_detect +ffffffff819733f0 T drm_helper_probe_single_connector_modes +ffffffff81973990 t __drm_helper_update_and_validate +ffffffff81973d40 T drm_kms_helper_hotplug_event +ffffffff81973d80 T drm_kms_helper_connector_hotplug_event +ffffffff81973dc0 T drm_kms_helper_is_poll_worker +ffffffff81973df0 T drm_kms_helper_poll_disable +ffffffff81973e70 T drm_kms_helper_poll_init +ffffffff81973ed0 t output_poll_execute +ffffffff81974120 T drm_kms_helper_poll_fini +ffffffff819741a0 T drm_connector_helper_hpd_irq_event +ffffffff81974260 t check_connector_changed +ffffffff81974430 T drm_helper_hpd_irq_event +ffffffff81974580 T drm_crtc_helper_mode_valid_fixed +ffffffff819745d0 T drm_connector_helper_get_modes_from_ddc +ffffffff81974660 T drm_connector_helper_get_modes_fixed +ffffffff819747d0 T drm_connector_helper_get_modes +ffffffff81974830 t __delayed_work_tick +ffffffff81975000 T drm_property_create +ffffffff819751f0 T drm_property_create_enum +ffffffff819752a0 T drm_property_add_enum +ffffffff819754a0 T drm_property_destroy +ffffffff81975550 T drm_property_create_bitmask +ffffffff81975680 T drm_property_create_range +ffffffff819756f0 T drm_property_create_signed_range +ffffffff81975760 T drm_property_create_object +ffffffff81975800 T drm_property_create_bool +ffffffff81975860 T drm_mode_getproperty_ioctl +ffffffff81975ab0 T drm_property_create_blob +ffffffff81975bf0 t drm_property_free_blob +ffffffff81975c70 T drm_property_blob_put +ffffffff81975cb0 T drm_property_destroy_user_blobs +ffffffff81975d30 T drm_property_blob_get +ffffffff81975d70 T drm_property_lookup_blob +ffffffff81975d90 T drm_property_replace_global_blob +ffffffff81975ee0 T drm_property_replace_blob +ffffffff81975f50 T drm_mode_getblob_ioctl +ffffffff81976010 T drm_mode_createblob_ioctl +ffffffff81976110 T drm_mode_destroyblob_ioctl +ffffffff81976210 T drm_property_change_valid_get +ffffffff81976470 T drm_property_change_valid_put +ffffffff81977000 T drm_rect_intersect +ffffffff81977080 T drm_rect_clip_scaled +ffffffff819772f0 T drm_rect_calc_hscale +ffffffff819773c0 T drm_rect_calc_vscale +ffffffff81977490 T drm_rect_debug_print +ffffffff819775b0 T drm_rect_rotate +ffffffff81977670 T drm_rect_rotate_inv +ffffffff81978000 T drm_self_refresh_helper_update_avg_times +ffffffff81978150 T drm_self_refresh_helper_alter_state +ffffffff819782e0 T drm_self_refresh_helper_init +ffffffff81978470 t drm_self_refresh_helper_entry_work +ffffffff819785d0 T drm_self_refresh_helper_cleanup +ffffffff81978650 t __delayed_work_tick +ffffffff81979000 T drm_syncobj_find +ffffffff81979070 T drm_syncobj_add_point +ffffffff81979160 t syncobj_wait_syncobj_func +ffffffff81979210 T drm_syncobj_replace_fence +ffffffff819792a0 T drm_syncobj_find_fence +ffffffff819795f0 t drm_syncobj_fence_add_wait +ffffffff819796c0 T drm_syncobj_free +ffffffff81979750 T drm_syncobj_create +ffffffff819798f0 t drm_syncobj_assign_null_handle +ffffffff81979a00 T drm_syncobj_get_handle +ffffffff81979b20 T drm_syncobj_get_fd +ffffffff81979b70 T drm_syncobj_open +ffffffff81979ba0 T drm_syncobj_release +ffffffff81979be0 t drm_syncobj_release_handle +ffffffff81979c90 T drm_syncobj_create_ioctl +ffffffff81979db0 T drm_syncobj_destroy_ioctl +ffffffff81979ed0 T drm_syncobj_handle_to_fd_ioctl +ffffffff8197a0c0 T drm_syncobj_fd_to_handle_ioctl +ffffffff8197a2b0 T drm_syncobj_transfer_ioctl +ffffffff8197a6d0 T drm_timeout_abs_to_jiffies +ffffffff8197a7a0 T drm_syncobj_wait_ioctl +ffffffff8197a920 t drm_syncobj_array_find +ffffffff8197ab50 t drm_syncobj_array_free +ffffffff8197ac30 T drm_syncobj_timeline_wait_ioctl +ffffffff8197adb0 T drm_syncobj_reset_ioctl +ffffffff8197af10 T drm_syncobj_signal_ioctl +ffffffff8197b000 T drm_syncobj_timeline_signal_ioctl +ffffffff8197b240 T drm_syncobj_query_ioctl +ffffffff8197b450 t drm_syncobj_array_wait_timeout +ffffffff8197b8b0 t syncobj_wait_fence_func +ffffffff8197c000 T drm_vblank_count +ffffffff8197c090 T drm_crtc_accurate_vblank_count +ffffffff8197c1a0 t drm_update_vblank_count +ffffffff8197c5f0 T drm_vblank_disable_and_save +ffffffff8197c740 T drm_vblank_init +ffffffff8197c8c0 t vblank_disable_fn +ffffffff8197c940 t drm_vblank_init_release +ffffffff8197c9d0 T drm_dev_has_vblank +ffffffff8197ca00 T drm_crtc_vblank_waitqueue +ffffffff8197ca50 T drm_calc_timestamping_constants +ffffffff8197cc70 T drm_crtc_vblank_helper_get_vblank_timestamp_internal +ffffffff8197d1c0 T drm_crtc_vblank_helper_get_vblank_timestamp +ffffffff8197d1e0 T drm_crtc_vblank_count +ffffffff8197d270 T drm_crtc_vblank_count_and_time +ffffffff8197d330 t drm_vblank_count_and_time +ffffffff8197d3e0 T drm_crtc_arm_vblank_event +ffffffff8197d4c0 T drm_crtc_send_vblank_event +ffffffff8197d670 t send_vblank_event +ffffffff8197d720 T drm_vblank_get +ffffffff8197d820 t drm_vblank_enable +ffffffff8197da20 T drm_crtc_vblank_get +ffffffff8197db20 T drm_vblank_put +ffffffff8197dc50 T drm_crtc_vblank_put +ffffffff8197dc70 T drm_wait_one_vblank +ffffffff8197e160 T drm_crtc_wait_one_vblank +ffffffff8197e180 T drm_crtc_vblank_off +ffffffff8197e570 T drm_crtc_vblank_reset +ffffffff8197e6a0 T drm_crtc_set_max_vblank_count +ffffffff8197e780 T drm_crtc_vblank_on +ffffffff8197e8d0 t drm_reset_vblank_timestamp +ffffffff8197ead0 T drm_crtc_vblank_restore +ffffffff8197eec0 T drm_legacy_modeset_ctl_ioctl +ffffffff8197f0e0 T drm_wait_vblank_ioctl +ffffffff8197f630 t drm_wait_vblank_reply +ffffffff8197f740 t drm_queue_vblank_event +ffffffff8197fa80 T drm_handle_vblank +ffffffff8197fd70 t drm_handle_vblank_events +ffffffff81980000 T drm_crtc_handle_vblank +ffffffff81980020 T drm_crtc_get_sequence_ioctl +ffffffff819801f0 T drm_crtc_queue_sequence_ioctl +ffffffff819804b0 t __get_vblank_counter +ffffffff81981000 T drm_handle_vblank_works +ffffffff819811a0 T drm_vblank_cancel_pending_works +ffffffff819812e0 T drm_vblank_work_schedule +ffffffff81981550 T drm_vblank_work_cancel_sync +ffffffff819816a0 T drm_vblank_work_flush +ffffffff819817d0 T drm_vblank_work_init +ffffffff81981840 T drm_vblank_worker_init +ffffffff81982000 T drm_vma_offset_manager_init +ffffffff81982040 T drm_vma_offset_manager_destroy +ffffffff81982060 T drm_vma_offset_lookup_locked +ffffffff819820f0 T drm_vma_offset_add +ffffffff81982180 T drm_vma_offset_remove +ffffffff819821d0 T drm_vma_node_allow +ffffffff819821f0 t vma_node_allow +ffffffff81982310 T drm_vma_node_allow_once +ffffffff81982330 T drm_vma_node_revoke +ffffffff819823b0 T drm_vma_node_is_allowed +ffffffff81983000 T hdmi_avi_infoframe_init +ffffffff81983080 T hdmi_avi_infoframe_check +ffffffff819830d0 T hdmi_avi_infoframe_pack_only +ffffffff819832d0 T hdmi_avi_infoframe_pack +ffffffff81983330 T hdmi_spd_infoframe_init +ffffffff819833f0 T hdmi_spd_infoframe_check +ffffffff81983440 T hdmi_spd_infoframe_pack_only +ffffffff81983580 T hdmi_spd_infoframe_pack +ffffffff819836e0 T hdmi_audio_infoframe_init +ffffffff81983730 T hdmi_audio_infoframe_check +ffffffff81983780 T hdmi_audio_infoframe_pack_only +ffffffff819838e0 T hdmi_audio_infoframe_pack +ffffffff81983930 T hdmi_audio_infoframe_pack_for_dp +ffffffff81983a20 T hdmi_vendor_infoframe_init +ffffffff81983a80 T hdmi_vendor_infoframe_check +ffffffff81983b20 T hdmi_vendor_infoframe_pack_only +ffffffff81983ce0 T hdmi_vendor_infoframe_pack +ffffffff81983d80 T hdmi_drm_infoframe_init +ffffffff81983de0 T hdmi_drm_infoframe_check +ffffffff81983e30 T hdmi_drm_infoframe_pack_only +ffffffff81984020 T hdmi_drm_infoframe_pack +ffffffff81984070 T hdmi_infoframe_check +ffffffff819841c0 T hdmi_infoframe_pack_only +ffffffff819843e0 T hdmi_infoframe_pack +ffffffff81984550 T hdmi_infoframe_log +ffffffff81985440 T hdmi_drm_infoframe_unpack_only +ffffffff81985520 T hdmi_infoframe_unpack +ffffffff81986000 T list_sort +ffffffff81987000 T radix_tree_lookup +ffffffff819870b0 T radix_tree_iter_find +ffffffff81987180 T radix_tree_delete +ffffffff81987310 T radix_tree_iter_delete +ffffffff81987330 T radix_tree_insert +ffffffff81988000 T sort +ffffffff81988040 t qsort +ffffffff8198a000 T drm_dp_dual_mode_read +ffffffff8198a110 T drm_dp_dual_mode_write +ffffffff8198a1f0 T drm_dp_dual_mode_detect +ffffffff8198a490 T drm_dp_dual_mode_max_tmds_clock +ffffffff8198a5b0 T drm_dp_dual_mode_get_tmds_output +ffffffff8198a6d0 T drm_dp_dual_mode_set_tmds_output +ffffffff8198a950 T drm_dp_get_dual_mode_type_name +ffffffff8198a9c0 T drm_lspcon_get_mode +ffffffff8198abe0 T drm_lspcon_set_mode +ffffffff8198b000 T drm_dp_channel_eq_ok +ffffffff8198b080 T drm_dp_clock_recovery_ok +ffffffff8198b0f0 T drm_dp_get_adjust_request_voltage +ffffffff8198b130 T drm_dp_get_adjust_request_pre_emphasis +ffffffff8198b180 T drm_dp_get_adjust_tx_ffe_preset +ffffffff8198b1c0 T drm_dp_128b132b_lane_channel_eq_done +ffffffff8198b240 T drm_dp_128b132b_lane_symbol_locked +ffffffff8198b2b0 T drm_dp_128b132b_eq_interlane_align_done +ffffffff8198b2e0 T drm_dp_128b132b_cds_interlane_align_done +ffffffff8198b310 T drm_dp_128b132b_link_training_failed +ffffffff8198b340 T drm_dp_read_clock_recovery_delay +ffffffff8198b450 T drm_dp_read_channel_eq_delay +ffffffff8198b550 T drm_dp_128b132b_read_aux_rd_interval +ffffffff8198b600 T drm_dp_link_train_clock_recovery_delay +ffffffff8198b690 t __8b10b_clock_recovery_delay_us +ffffffff8198b710 T drm_dp_link_train_channel_eq_delay +ffffffff8198b780 T drm_dp_phy_name +ffffffff8198b7c0 T drm_dp_lttpr_link_train_clock_recovery_delay +ffffffff8198b7e0 T drm_dp_lttpr_link_train_channel_eq_delay +ffffffff8198b850 T drm_dp_link_rate_to_bw_code +ffffffff8198b8c0 T drm_dp_bw_code_to_link_rate +ffffffff8198b920 T drm_dp_dpcd_probe +ffffffff8198ba60 t drm_dp_dpcd_access +ffffffff8198bb90 T drm_dp_dpcd_read +ffffffff8198bcc0 T drm_dp_dpcd_write +ffffffff8198bdd0 T drm_dp_dpcd_read_link_status +ffffffff8198bdf0 T drm_dp_dpcd_read_phy_link_status +ffffffff8198bef0 T drm_dp_downstream_is_type +ffffffff8198bf40 T drm_dp_downstream_is_tmds +ffffffff8198bfb0 T drm_dp_send_real_edid_checksum +ffffffff8198c200 T drm_dp_read_dpcd_caps +ffffffff8198c390 T drm_dp_read_downstream_info +ffffffff8198c490 T drm_dp_downstream_max_dotclock +ffffffff8198c4e0 T drm_dp_downstream_max_tmds_clock +ffffffff8198c580 T drm_dp_downstream_min_tmds_clock +ffffffff8198c600 T drm_dp_downstream_max_bpc +ffffffff8198c6a0 T drm_dp_downstream_420_passthrough +ffffffff8198c700 T drm_dp_downstream_444_to_420_conversion +ffffffff8198c760 T drm_dp_downstream_rgb_to_ycbcr_conversion +ffffffff8198c7c0 T drm_dp_downstream_mode +ffffffff8198c850 T drm_dp_downstream_id +ffffffff8198c870 T drm_dp_downstream_debug +ffffffff8198c910 T drm_dp_subconnector_type +ffffffff8198c980 T drm_dp_set_subconnector_property +ffffffff8198c9f0 T drm_dp_read_sink_count_cap +ffffffff8198ca40 T drm_dp_read_sink_count +ffffffff8198caa0 T drm_dp_remote_aux_init +ffffffff8198cad0 t drm_dp_aux_crc_work +ffffffff8198cc40 T drm_dp_aux_init +ffffffff8198ccf0 T drm_dp_aux_register +ffffffff8198ce10 T drm_dp_aux_unregister +ffffffff8198ce40 T drm_dp_psr_setup_time +ffffffff8198ce90 T drm_dp_start_crc +ffffffff8198cf40 T drm_dp_stop_crc +ffffffff8198cfd0 T drm_dp_read_desc +ffffffff8198d190 T drm_dp_dsc_sink_max_slice_count +ffffffff8198d220 T drm_dp_dsc_sink_line_buf_depth +ffffffff8198d260 T drm_dp_dsc_sink_supported_input_bpcs +ffffffff8198d2d0 T drm_dp_read_lttpr_common_caps +ffffffff8198d390 T drm_dp_read_lttpr_phy_caps +ffffffff8198d450 T drm_dp_lttpr_count +ffffffff8198d4e0 T drm_dp_lttpr_max_link_rate +ffffffff8198d540 T drm_dp_lttpr_max_lane_count +ffffffff8198d570 T drm_dp_lttpr_voltage_swing_level_3_supported +ffffffff8198d5a0 T drm_dp_lttpr_pre_emphasis_level_3_supported +ffffffff8198d5d0 T drm_dp_get_phy_test_pattern +ffffffff8198d6f0 T drm_dp_set_phy_test_pattern +ffffffff8198d7b0 T drm_dp_vsc_sdp_log +ffffffff8198dad0 T drm_dp_get_pcon_max_frl_bw +ffffffff8198db20 T drm_dp_pcon_frl_prepare +ffffffff8198db70 T drm_dp_pcon_is_frl_ready +ffffffff8198dbd0 T drm_dp_pcon_frl_configure_1 +ffffffff8198dcd0 T drm_dp_pcon_frl_configure_2 +ffffffff8198dd30 T drm_dp_pcon_reset_frl_config +ffffffff8198dd80 T drm_dp_pcon_frl_enable +ffffffff8198de40 T drm_dp_pcon_hdmi_link_active +ffffffff8198de90 T drm_dp_pcon_hdmi_link_mode +ffffffff8198df00 T drm_dp_pcon_hdmi_frl_link_error_count +ffffffff8198dff0 T drm_dp_pcon_enc_is_dsc_1_2 +ffffffff8198e020 T drm_dp_pcon_dsc_max_slices +ffffffff8198e0b0 T drm_dp_pcon_dsc_max_slice_width +ffffffff8198e0e0 T drm_dp_pcon_dsc_bpp_incr +ffffffff8198e120 T drm_dp_pcon_pps_default +ffffffff8198e1a0 T drm_dp_pcon_pps_override_buf +ffffffff8198e240 T drm_dp_pcon_pps_override_param +ffffffff8198e310 T drm_dp_pcon_convert_rgb_to_ycbcr +ffffffff8198e3b0 T drm_edp_backlight_set_level +ffffffff8198e480 T drm_edp_backlight_enable +ffffffff8198e690 t drm_edp_backlight_set_enable +ffffffff8198e7c0 T drm_edp_backlight_disable +ffffffff8198e800 T drm_edp_backlight_init +ffffffff8198ed60 T drm_panel_dp_aux_backlight +ffffffff8198eef0 t __128b132b_channel_eq_delay_us +ffffffff8198ef70 t __8b10b_channel_eq_delay_us +ffffffff8198eff0 t drm_dp_aux_get_crc +ffffffff8198f0d0 t drm_dp_i2c_xfer +ffffffff8198f340 t drm_dp_i2c_functionality +ffffffff8198f370 t drm_dp_i2c_do_msg +ffffffff8198f740 t lock_bus +ffffffff8198f760 t trylock_bus +ffffffff8198f7b0 t unlock_bus +ffffffff8198f7d0 t dp_aux_backlight_update_status +ffffffff81990000 T drm_dp_encode_sideband_req +ffffffff81990440 T drm_dp_decode_sideband_req +ffffffff81990970 T drm_dp_dump_sideband_msg_req_body +ffffffff81990d40 T drm_dp_mst_get_port_malloc +ffffffff81990d90 T drm_dp_mst_put_port_malloc +ffffffff81990e80 t kref_put +ffffffff81990ec0 T drm_atomic_get_mst_payload_state +ffffffff81990f10 T drm_dp_mst_dpcd_read +ffffffff819911d0 T drm_dp_mst_dpcd_write +ffffffff81991220 t drm_dp_send_dpcd_write +ffffffff81991460 T drm_dp_mst_connector_late_register +ffffffff819914e0 T drm_dp_mst_connector_early_unregister +ffffffff81991520 T drm_dp_send_power_updown_phy +ffffffff81991760 t drm_dp_mst_topology_put_port +ffffffff81991890 t drm_dp_mst_wait_tx_reply +ffffffff81991c30 T drm_dp_send_query_stream_enc_status +ffffffff81991ef0 T drm_dp_add_payload_part1 +ffffffff819920a0 T drm_dp_remove_payload +ffffffff81992240 T drm_dp_add_payload_part2 +ffffffff819923f0 T drm_dp_get_vc_payload_bw +ffffffff81992490 T drm_dp_read_mst_cap +ffffffff819924f0 T drm_dp_mst_topology_mgr_set_mst +ffffffff819927a0 t drm_dp_dpcd_write_payload +ffffffff81992940 t drm_dp_mst_topology_put_mstb +ffffffff81992a40 T drm_dp_mst_topology_mgr_suspend +ffffffff81992b00 t drm_dp_mst_topology_mgr_invalidate_mstb +ffffffff81992b70 T drm_dp_mst_topology_mgr_resume +ffffffff81992db0 T drm_dp_mst_hpd_irq_handle_event +ffffffff81993d20 T drm_dp_mst_hpd_irq_send_new_request +ffffffff81993da0 T drm_dp_mst_detect_port +ffffffff81993f00 T drm_dp_mst_get_edid +ffffffff81994010 T drm_dp_atomic_find_time_slots +ffffffff819942c0 T drm_atomic_get_mst_topology_state +ffffffff819942d0 T drm_dp_atomic_release_time_slots +ffffffff819944e0 T drm_dp_mst_atomic_setup_commit +ffffffff81994670 T drm_dp_mst_atomic_wait_for_dependencies +ffffffff819947e0 T drm_dp_mst_root_conn_atomic_check +ffffffff81994900 T drm_dp_mst_update_slots +ffffffff81994960 T drm_dp_check_act_status +ffffffff81994af0 T drm_dp_calc_pbn_mode +ffffffff81994b60 T drm_dp_mst_dump_topology +ffffffff81994da0 t drm_dp_mst_dump_mstb +ffffffff81994e10 T drm_dp_mst_add_affected_dsc_crtcs +ffffffff81994f40 T drm_dp_mst_dsc_aux_for_port +ffffffff81995170 T drm_dp_mst_atomic_enable_dsc +ffffffff819952f0 T drm_dp_mst_atomic_check +ffffffff819955e0 t drm_dp_mst_atomic_check_mstb_bw_limit +ffffffff81995860 t drm_dp_mst_duplicate_state +ffffffff81995a30 t drm_dp_mst_destroy_state +ffffffff81995af0 T drm_atomic_get_old_mst_topology_state +ffffffff81995b00 T drm_atomic_get_new_mst_topology_state +ffffffff81995b10 T drm_dp_mst_topology_mgr_init +ffffffff81995d80 t drm_dp_mst_link_probe_work +ffffffff81996010 t drm_dp_tx_work +ffffffff81996060 t drm_dp_delayed_destroy_work +ffffffff81996510 t drm_dp_mst_up_req_work +ffffffff81996a30 T drm_dp_mst_topology_mgr_destroy +ffffffff81996ac0 t drm_dp_mst_is_virtual_dpcd +ffffffff81996ba0 t drm_dp_free_mst_branch_device +ffffffff81996be0 t drm_dp_mst_topology_get_port_validated_locked +ffffffff81996c60 t drm_dp_mst_dump_sideband_msg_tx +ffffffff81996e70 t process_single_down_tx_qlock +ffffffff81996fe0 t process_single_tx_qlock +ffffffff819974b0 t drm_dp_msg_data_crc4 +ffffffff819975e0 t drm_dp_payload_send_msg +ffffffff81997a40 t drm_dp_mst_topology_get_mstb_validated_locked +ffffffff81997ac0 t drm_dp_get_one_sb_msg +ffffffff81998200 t drm_dp_get_mst_branch_device +ffffffff81998360 t drm_dp_check_and_send_link_address +ffffffff81998430 t drm_dp_send_link_address +ffffffff819990f0 t drm_dp_send_enum_path_resources +ffffffff81999350 t drm_dp_port_set_pdt +ffffffff81999620 t drm_dp_mst_port_add_connector +ffffffff81999800 t drm_dp_mst_i2c_xfer +ffffffff81999f20 t drm_dp_mst_i2c_functionality +ffffffff81999f50 t get_mst_branch_device_by_guid_helper +ffffffff8199a000 T drm_dsc_dp_pps_header_init +ffffffff8199a030 T drm_dsc_dp_rc_buffer_size +ffffffff8199a090 T drm_dsc_pps_payload_pack +ffffffff8199a340 T drm_dsc_compute_rc_parameters +ffffffff8199b000 T drm_connector_attach_content_protection_property +ffffffff8199b030 T drm_hdcp_check_ksvs_revoked +ffffffff8199b080 T drm_hdcp_update_content_protection +ffffffff8199c000 T drm_hdmi_infoframe_set_hdr_metadata +ffffffff8199c120 T drm_hdmi_avi_infoframe_colorimetry +ffffffff8199c170 T drm_hdmi_avi_infoframe_bars +ffffffff8199c1c0 T drm_hdmi_avi_infoframe_content_type +ffffffff8199d000 T drm_scdc_read +ffffffff8199d090 T drm_scdc_write +ffffffff8199d170 T drm_scdc_get_scrambling_status +ffffffff8199d230 T drm_scdc_set_scrambling +ffffffff8199d380 T drm_scdc_set_high_tmds_clock_ratio +ffffffff8199e000 T drm_gem_ttm_mmap +ffffffff8199e070 T drm_gem_ttm_vmap +ffffffff8199e080 T drm_gem_ttm_vunmap +ffffffff8199f000 T ttm_agp_bind +ffffffff8199f050 T ttm_agp_unbind +ffffffff8199f070 T ttm_agp_is_bound +ffffffff8199f0c0 T ttm_agp_destroy +ffffffff8199f0e0 T ttm_agp_tt_create +ffffffff819a0000 T ttm_bo_move_to_lru_tail +ffffffff819a0040 T ttm_bo_set_bulk_move +ffffffff819a0100 T ttm_bo_delayed_delete +ffffffff819a03e0 t ttm_bo_cleanup_refs +ffffffff819a0780 T ttm_bo_put +ffffffff819a0d30 T ttm_bo_lock_delayed_workqueue +ffffffff819a0db0 T ttm_bo_unlock_delayed_workqueue +ffffffff819a0e20 T ttm_bo_eviction_valuable +ffffffff819a0e70 T ttm_mem_evict_first +ffffffff819a1580 t ttm_bo_evict_swapout_allowable +ffffffff819a1780 t dma_resv_unlock +ffffffff819a1820 t ttm_bo_unreserve +ffffffff819a1900 T ttm_bo_pin +ffffffff819a19a0 T ttm_bo_unpin +ffffffff819a1ab0 T ttm_bo_mem_space +ffffffff819a1cf0 t ttm_bo_add_move_fence +ffffffff819a1db0 T ttm_bo_validate +ffffffff819a1f40 T ttm_bo_init_reserved +ffffffff819a2160 T ttm_bo_init_validate +ffffffff819a2200 T ttm_bo_unmap_virtual +ffffffff819a2320 T ttm_bo_wait +ffffffff819a23a0 T ttm_bo_swapout +ffffffff819a2670 t ttm_bo_handle_move_mem +ffffffff819a27f0 T ttm_bo_tt_destroy +ffffffff819a3000 T ttm_mem_io_reserve +ffffffff819a3060 T ttm_mem_io_free +ffffffff819a30d0 T ttm_move_memcpy +ffffffff819a3290 T ttm_bo_move_memcpy +ffffffff819a34c0 T ttm_bo_move_sync_cleanup +ffffffff819a35b0 T ttm_io_prot +ffffffff819a35f0 T ttm_bo_kmap +ffffffff819a38a0 T ttm_bo_kunmap +ffffffff819a39e0 T ttm_bo_vmap +ffffffff819a3bd0 T ttm_bo_vunmap +ffffffff819a3cc0 T ttm_bo_move_accel_cleanup +ffffffff819a3f80 T ttm_bo_pipeline_gutting +ffffffff819a4220 t ttm_buffer_object_transfer +ffffffff819a4460 t ttm_transfered_destroy +ffffffff819a5000 T ttm_bo_vm_reserve +ffffffff819a5180 t dma_resv_lock_interruptible +ffffffff819a52a0 T ttm_bo_vm_fault_reserved +ffffffff819a55c0 T ttm_bo_vm_fault +ffffffff819a5720 T ttm_bo_vm_reference +ffffffff819a5750 T ttm_bo_vm_detach +ffffffff819a5760 T ttm_bo_mmap_obj +ffffffff819a6000 T ttm_global_swapout +ffffffff819a60e0 T ttm_device_swapout +ffffffff819a6200 T ttm_device_init +ffffffff819a6450 t ttm_device_delayed_workqueue +ffffffff819a64e0 T ttm_device_fini +ffffffff819a66c0 T ttm_device_clear_dma_mappings +ffffffff819a6770 t ttm_device_clear_lru_dma_mappings +ffffffff819a6820 t __delayed_work_tick +ffffffff819a7000 T ttm_eu_backoff_reservation +ffffffff819a7130 T ttm_eu_reserve_buffers +ffffffff819a75b0 T ttm_eu_fence_buffer_objects +ffffffff819a7700 t __ww_mutex_lock +ffffffff819a8000 T ttm_prot_from_caching +ffffffff819a9000 T ttm_pool_alloc +ffffffff819a9a60 t ttm_pool_free_range +ffffffff819a9d20 T ttm_pool_free +ffffffff819a9d80 t ttm_pool_shrink +ffffffff819a9f60 T ttm_pool_init +ffffffff819aa210 T ttm_pool_fini +ffffffff819aa3e0 t ttm_pool_type_fini +ffffffff819aa620 T ttm_pool_mgr_init +ffffffff819aa900 t ttm_pool_shrinker_count +ffffffff819aa950 t ttm_pool_shrinker_scan +ffffffff819aa9a0 T ttm_pool_mgr_fini +ffffffff819ab000 T ttm_range_man_init_nocheck +ffffffff819ab180 T ttm_range_man_fini_nocheck +ffffffff819ab310 t ttm_range_man_alloc +ffffffff819ab450 t ttm_range_man_free +ffffffff819ab4b0 t ttm_range_man_intersects +ffffffff819ab510 t ttm_range_man_compatible +ffffffff819ab570 t ttm_range_man_debug +ffffffff819ac000 T ttm_lru_bulk_move_init +ffffffff819ac020 T ttm_lru_bulk_move_tail +ffffffff819ac1e0 T ttm_resource_add_bulk_move +ffffffff819ac2b0 T ttm_resource_del_bulk_move +ffffffff819ac3f0 T ttm_resource_move_to_lru_tail +ffffffff819ac560 T ttm_resource_init +ffffffff819ac660 T ttm_resource_fini +ffffffff819ac6d0 T ttm_resource_alloc +ffffffff819ac820 T ttm_resource_free +ffffffff819ac9e0 T ttm_resource_intersects +ffffffff819aca40 T ttm_resource_compatible +ffffffff819acaa0 T ttm_resource_compat +ffffffff819acc30 T ttm_resource_set_bo +ffffffff819acc80 T ttm_resource_manager_init +ffffffff819acd30 T ttm_resource_manager_evict_all +ffffffff819acf00 T ttm_resource_manager_usage +ffffffff819acf60 T ttm_resource_manager_debug +ffffffff819ad050 T ttm_resource_manager_first +ffffffff819ad0e0 T ttm_resource_manager_next +ffffffff819ad200 T ttm_kmap_iter_iomap_init +ffffffff819ad260 T ttm_kmap_iter_linear_io_init +ffffffff819ad430 T ttm_kmap_iter_linear_io_fini +ffffffff819ad480 T ttm_resource_manager_create_debugfs +ffffffff819ad4b0 t ttm_kmap_iter_iomap_map_local +ffffffff819ad5e0 t ttm_kmap_iter_iomap_unmap_local +ffffffff819ad600 t ttm_kmap_iter_linear_io_map_local +ffffffff819ae000 T ttm_sys_man_init +ffffffff819ae130 t ttm_sys_man_alloc +ffffffff819ae1b0 t ttm_sys_man_free +ffffffff819af000 T ttm_tt_create +ffffffff819af100 T ttm_tt_destroy +ffffffff819af120 T ttm_tt_init +ffffffff819af1f0 T ttm_tt_fini +ffffffff819af2d0 T ttm_sg_tt_init +ffffffff819af4f0 T ttm_tt_swapin +ffffffff819af610 T ttm_tt_swapout +ffffffff819af660 T ttm_tt_populate +ffffffff819af7d0 T ttm_tt_unpopulate +ffffffff819af880 T ttm_tt_mgr_init +ffffffff819af8e0 T ttm_kmap_iter_tt_init +ffffffff819af940 t ttm_kmap_iter_tt_map_local +ffffffff819af9a0 t ttm_kmap_iter_tt_unmap_local +ffffffff819b0000 T drm_sched_entity_init +ffffffff819b0180 T drm_sched_entity_modify_sched +ffffffff819b0200 T drm_sched_entity_is_ready +ffffffff819b0240 T drm_sched_entity_flush +ffffffff819b05a0 T drm_sched_entity_fini +ffffffff819b08c0 T drm_sched_entity_destroy +ffffffff819b0910 T drm_sched_entity_set_priority +ffffffff819b0950 T drm_sched_entity_pop_job +ffffffff819b0b90 T drm_sched_entity_select_rq +ffffffff819b0c70 T drm_sched_entity_push_job +ffffffff819b0d70 t drm_sched_entity_kill_jobs_cb +ffffffff819b0dc0 t drm_sched_entity_kill_jobs_work +ffffffff819b0e30 t drm_sched_entity_clear_dep +ffffffff819b0e50 t drm_sched_entity_wakeup +ffffffff819b1000 T drm_sched_fence_slab_init +ffffffff819b1060 T drm_sched_fence_slab_fini +ffffffff819b1080 T drm_sched_fence_scheduled +ffffffff819b1090 T drm_sched_fence_finished +ffffffff819b10b0 T drm_sched_fence_free +ffffffff819b1150 T to_drm_sched_fence +ffffffff819b11b0 T drm_sched_fence_alloc +ffffffff819b1230 T drm_sched_fence_init +ffffffff819b12b0 t drm_sched_fence_get_driver_name +ffffffff819b12e0 t drm_sched_fence_get_timeline_name +ffffffff819b1340 t drm_sched_fence_release_scheduled +ffffffff819b1430 t drm_sched_fence_release_finished +ffffffff819b2000 T drm_sched_rq_add_entity +ffffffff819b2090 T drm_sched_rq_remove_entity +ffffffff819b2130 T drm_sched_dependency_optimized +ffffffff819b21d0 T drm_sched_fault +ffffffff819b2200 T drm_sched_suspend_timeout +ffffffff819b2280 T drm_sched_resume_timeout +ffffffff819b2320 T drm_sched_increase_karma +ffffffff819b2340 T drm_sched_increase_karma_ext +ffffffff819b2490 T drm_sched_reset_karma +ffffffff819b24b0 T drm_sched_stop +ffffffff819b2680 T drm_sched_start +ffffffff819b2790 t drm_sched_job_done_cb +ffffffff819b27b0 t drm_sched_job_done +ffffffff819b2880 T drm_sched_resubmit_jobs +ffffffff819b29e0 T drm_sched_resubmit_jobs_ext +ffffffff819b2b40 T drm_sched_job_init +ffffffff819b2bd0 T drm_sched_job_arm +ffffffff819b2c60 T drm_sched_job_add_dependency +ffffffff819b2dd0 T drm_sched_job_add_implicit_dependencies +ffffffff819b2e90 T drm_sched_job_cleanup +ffffffff819b2f40 T drm_sched_wakeup +ffffffff819b3000 T drm_sched_pick_best +ffffffff819b30b0 T drm_sched_init +ffffffff819b3330 t drm_sched_job_timedout +ffffffff819b3480 t drm_sched_main +ffffffff819b38d0 T drm_sched_fini +ffffffff819b3ad0 t __delayed_work_tick +ffffffff819b3af0 t drm_sched_get_cleanup_job +ffffffff819b3c30 t drm_sched_select_entity +ffffffff819b4000 t ch7017_init +ffffffff819b4140 t ch7017_dpms +ffffffff819b4380 t ch7017_mode_valid +ffffffff819b43c0 t ch7017_mode_set +ffffffff819b4670 t ch7017_detect +ffffffff819b46a0 t ch7017_get_hw_state +ffffffff819b4730 t ch7017_destroy +ffffffff819b4780 t ch7017_dump_regs +ffffffff819b5000 t ch7xxx_init +ffffffff819b52a0 t ch7xxx_dpms +ffffffff819b5380 t ch7xxx_mode_valid +ffffffff819b53c0 t ch7xxx_mode_set +ffffffff819b5870 t ch7xxx_detect +ffffffff819b5ac0 t ch7xxx_get_hw_state +ffffffff819b5ba0 t ch7xxx_destroy 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intel_bios_is_lvds_present +ffffffff819daaa0 T intel_bios_is_port_present +ffffffff819dab20 T intel_bios_is_port_edp +ffffffff819dab90 T intel_bios_encoder_data_lookup +ffffffff819dabd0 T intel_bios_is_port_dp_dual_mode +ffffffff819dac40 T intel_bios_is_dsi_present +ffffffff819dad10 T intel_bios_get_dsc_params +ffffffff819daf30 T intel_bios_is_port_hpd_inverted +ffffffff819daff0 T intel_bios_is_lspcon_present +ffffffff819db050 T intel_bios_is_lane_reversal_needed +ffffffff819db0a0 T intel_bios_port_aux_ch +ffffffff819db2e0 T intel_bios_max_tmds_clock +ffffffff819db380 T intel_bios_hdmi_level_shift +ffffffff819db3e0 T intel_bios_encoder_dp_boost_level +ffffffff819db470 T intel_bios_encoder_hdmi_boost_level +ffffffff819db500 T intel_bios_dp_max_link_rate +ffffffff819db590 T intel_bios_dp_max_lane_count +ffffffff819db5f0 T intel_bios_alternate_ddc_pin +ffffffff819db760 T intel_bios_encoder_supports_typec_usb +ffffffff819db7b0 T intel_bios_encoder_supports_tbt +ffffffff819db800 t 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intel_crtc_for_pipe +ffffffff819ef080 T intel_crtc_wait_for_next_vblank +ffffffff819ef090 T intel_wait_for_vblank_if_active +ffffffff819ef100 T intel_crtc_get_vblank_counter +ffffffff819ef180 T intel_crtc_max_vblank_count +ffffffff819ef210 T intel_crtc_vblank_on +ffffffff819ef2e0 T intel_crtc_vblank_off +ffffffff819ef380 T intel_crtc_state_alloc +ffffffff819ef420 T intel_crtc_state_reset +ffffffff819ef4a0 T intel_crtc_init +ffffffff819ef800 T intel_wait_for_vblank_workers +ffffffff819ef8c0 T intel_usecs_to_scanlines +ffffffff819ef910 T intel_pipe_update_start +ffffffff819efcd0 T intel_pipe_update_end +ffffffff819effc0 t intel_crtc_destroy +ffffffff819efff0 t intel_crtc_late_register +ffffffff819f0020 t intel_crtc_vblank_work +ffffffff819f1000 T intel_crtc_state_dump +ffffffff819f3000 T intel_cursor_plane_create +ffffffff819f3200 t i845_cursor_max_stride +ffffffff819f3230 t i845_cursor_update_arm +ffffffff819f3480 t i845_cursor_disable_arm +ffffffff819f34a0 t i845_cursor_get_hw_state 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intel_ddi_level +ffffffff819f6550 T icl_ddi_combo_get_pll +ffffffff819f65d0 T hsw_ddi_enable_clock +ffffffff819f6690 T hsw_ddi_disable_clock +ffffffff819f66d0 T hsw_ddi_is_clock_enabled +ffffffff819f6730 T intel_ddi_enable_clock +ffffffff819f6770 T intel_ddi_disable_clock +ffffffff819f67b0 T intel_ddi_sanitize_encoder_pll_mapping +ffffffff819f6990 T dp_tp_ctl_reg +ffffffff819f6a10 T dp_tp_status_reg +ffffffff819f6a90 T intel_ddi_update_pipe +ffffffff819f6b20 T intel_ddi_compute_min_voltage_level +ffffffff819f6b90 T intel_ddi_get_clock +ffffffff819f6ca0 T hsw_ddi_get_config +ffffffff819f6d90 t intel_ddi_get_config +ffffffff819f75d0 T intel_ddi_init +ffffffff819f8160 t intel_ddi_hotplug +ffffffff819f8560 t intel_ddi_compute_output_type +ffffffff819f85e0 t intel_ddi_compute_config +ffffffff819f8730 t intel_ddi_compute_config_late +ffffffff819f89f0 t intel_enable_ddi +ffffffff819f91f0 t intel_ddi_pre_pll_enable +ffffffff819f9390 t intel_ddi_pre_enable +ffffffff819fa020 t intel_disable_ddi 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icl_ddi_combo_get_config +ffffffff819fb920 t icl_ddi_combo_enable_clock +ffffffff819fba80 t icl_ddi_combo_disable_clock +ffffffff819fbb20 t icl_ddi_combo_is_clock_enabled +ffffffff819fbba0 t icl_ddi_tc_enable_clock +ffffffff819fbd80 t icl_ddi_tc_disable_clock +ffffffff819fbe50 t icl_ddi_tc_is_clock_enabled +ffffffff819fbf00 t icl_ddi_tc_get_config +ffffffff819fc150 t bxt_ddi_get_config +ffffffff819fc1c0 t skl_ddi_enable_clock +ffffffff819fc2d0 t skl_ddi_disable_clock +ffffffff819fc360 t skl_ddi_is_clock_enabled +ffffffff819fc3d0 t skl_ddi_get_config +ffffffff819fc460 t icl_combo_phy_set_signal_levels +ffffffff819fcfb0 t tgl_dkl_phy_set_signal_levels +ffffffff819fd2c0 t icl_mg_phy_set_signal_levels +ffffffff819fdbf0 t hsw_set_signal_levels +ffffffff819fdf60 t intel_ddi_update_prepare +ffffffff819fe0e0 t intel_ddi_update_complete +ffffffff819fe120 t lpt_digital_port_connected +ffffffff819fe190 t bdw_digital_port_connected +ffffffff819fe200 t hsw_digital_port_connected +ffffffff819fe270 t intel_ddi_encoder_reset +ffffffff819fe350 t intel_ddi_encoder_destroy +ffffffff819fe400 t icl_program_mg_dp_mode +ffffffff819fe6c0 t intel_ddi_init_dp_buf_reg +ffffffff819fe870 t intel_disable_ddi_buf +ffffffff819feb80 t intel_ddi_prepare_link_retrain +ffffffff819ff220 t intel_ddi_set_link_train +ffffffff819ff380 t intel_ddi_set_idle_link_train +ffffffff819ff5a0 t intel_ddi_dp_voltage_max +ffffffff819ff660 t intel_ddi_dp_preemph_max +ffffffff81a00000 T is_hobl_buf_trans +ffffffff81a00040 T intel_ddi_buf_trans_init +ffffffff81a002f0 t dg2_get_snps_buf_trans +ffffffff81a00360 t adlp_get_combo_buf_trans +ffffffff81a00480 t adlp_get_dkl_buf_trans +ffffffff81a004e0 t adls_get_combo_buf_trans +ffffffff81a00600 t rkl_get_combo_buf_trans +ffffffff81a00720 t dg1_get_combo_buf_trans +ffffffff81a00840 t tgl_get_combo_buf_trans +ffffffff81a00980 t tgl_get_dkl_buf_trans +ffffffff81a009e0 t jsl_get_combo_buf_trans +ffffffff81a00a80 t ehl_get_combo_buf_trans +ffffffff81a00b20 t icl_get_combo_buf_trans +ffffffff81a00bd0 t icl_get_mg_buf_trans +ffffffff81a00c30 t bxt_get_buf_trans +ffffffff81a00cb0 t kbl_y_get_buf_trans +ffffffff81a00d50 t kbl_u_get_buf_trans +ffffffff81a00df0 t kbl_get_buf_trans +ffffffff81a00e90 t skl_y_get_buf_trans +ffffffff81a00f30 t skl_u_get_buf_trans +ffffffff81a00fd0 t skl_get_buf_trans +ffffffff81a01070 t bdw_get_buf_trans +ffffffff81a01100 t hsw_get_buf_trans +ffffffff81a02000 T intel_update_watermarks +ffffffff81a02040 T vlv_get_hpll_vco +ffffffff81a02090 T vlv_get_cck_clock +ffffffff81a02140 T vlv_get_cck_clock_hpll +ffffffff81a02240 T is_trans_port_sync_mode +ffffffff81a02280 T intel_crtc_bigjoiner_slave_pipes +ffffffff81a022e0 T intel_crtc_is_bigjoiner_slave +ffffffff81a02340 T intel_crtc_is_bigjoiner_master +ffffffff81a023a0 T intel_master_crtc +ffffffff81a02430 T assert_transcoder +ffffffff81a02580 t transcoder_name +ffffffff81a025c0 T vlv_wait_port_ready +ffffffff81a02710 T intel_enable_transcoder +ffffffff81a029f0 T intel_disable_transcoder +ffffffff81a02ce0 T intel_rotation_info_size +ffffffff81a02d30 T intel_remapped_info_size +ffffffff81a02e60 T intel_plane_uses_fence +ffffffff81a02eb0 T intel_fb_xy_to_linear +ffffffff81a02f00 T intel_add_fb_offsets +ffffffff81a02f50 T intel_plane_fb_max_stride +ffffffff81a02fd0 T intel_set_plane_visible +ffffffff81a03020 T intel_plane_fixup_bitmasks +ffffffff81a030d0 T intel_plane_disable_noatomic +ffffffff81a032c0 T intel_plane_fence_y_offset +ffffffff81a03320 T intel_display_prepare_reset +ffffffff81a03500 T intel_display_finish_reset +ffffffff81a03710 t __intel_display_resume +ffffffff81a03820 T intel_modeset_init_hw +ffffffff81a038e0 T intel_has_pending_fb_unpin +ffffffff81a039d0 T intel_get_crtc_new_encoder +ffffffff81a03b60 T ilk_pfit_disable +ffffffff81a03c20 T intel_phy_is_combo +ffffffff81a03c90 T intel_phy_is_tc +ffffffff81a03d00 T intel_phy_is_snps +ffffffff81a03d50 T intel_port_to_phy +ffffffff81a03e00 T intel_port_to_tc +ffffffff81a03f10 T intel_aux_power_domain +ffffffff81a03f50 T intel_modeset_get_crtc_power_domains +ffffffff81a04170 T intel_modeset_put_crtc_power_domains +ffffffff81a041a0 T intel_display_suspend +ffffffff81a04240 T intel_encoder_destroy +ffffffff81a04270 T intel_encoder_get_config +ffffffff81a042a0 t intel_crtc_readout_derived_state +ffffffff81a046e0 T intel_link_compute_m_n +ffffffff81a04810 T intel_zero_m_n +ffffffff81a04850 T intel_set_m_n +ffffffff81a04910 T intel_cpu_transcoder_has_m2_n2 +ffffffff81a04970 T intel_cpu_transcoder_set_m1_n1 +ffffffff81a04b30 T intel_cpu_transcoder_set_m2_n2 +ffffffff81a04c90 T i9xx_set_pipeconf +ffffffff81a04e40 T ilk_set_pipeconf +ffffffff81a05010 T bdw_get_pipemisc_bpp +ffffffff81a050f0 T ilk_get_lanes_required +ffffffff81a05150 T intel_get_m_n +ffffffff81a05260 T intel_cpu_transcoder_get_m1_n1 +ffffffff81a05400 T intel_cpu_transcoder_get_m2_n2 +ffffffff81a05570 T intel_crtc_get_pipe_config +ffffffff81a055e0 T intel_get_load_detect_pipe +ffffffff81a05950 t intel_modeset_disable_planes +ffffffff81a05a10 T intel_release_load_detect_pipe +ffffffff81a05ae0 T i9xx_crtc_clock_get +ffffffff81a05d70 T intel_dotclock_calculate +ffffffff81a05dd0 T intel_crtc_dotclock +ffffffff81a05ea0 T intel_encoder_current_mode +ffffffff81a06050 T intel_fuzzy_clock_check +ffffffff81a060a0 T intel_pipe_config_compare +ffffffff81a08b40 t pipe_config_mismatch +ffffffff81a08c30 t pipe_config_infoframe_mismatch +ffffffff81a08dd0 T intel_modeset_all_pipes +ffffffff81a08f80 T intel_atomic_add_affected_planes +ffffffff81a09050 T intel_crtc_update_active_timings +ffffffff81a09150 T intel_calc_active_pipes +ffffffff81a091e0 T intel_crtc_arm_fifo_underrun +ffffffff81a09280 T intel_plane_destroy +ffffffff81a092b0 T intel_get_pipe_from_crtc_id_ioctl +ffffffff81a09320 T intel_cpu_transcoder_mode_valid +ffffffff81a093e0 T intel_mode_valid_max_plane_size +ffffffff81a09460 T intel_init_display_hooks +ffffffff81a09540 T intel_modeset_init_noirq +ffffffff81a097d0 t intel_atomic_helper_free_state_worker +ffffffff81a09850 T intel_modeset_init_nogem +ffffffff81a0a8c0 T intel_modeset_init +ffffffff81a0aae0 T i830_enable_pipe +ffffffff81a0b110 T i830_disable_pipe +ffffffff81a0b440 T intel_display_resume +ffffffff81a0b580 T intel_modeset_driver_remove +ffffffff81a0b630 T intel_modeset_driver_remove_noirq +ffffffff81a0b7a0 T intel_modeset_driver_remove_nogem +ffffffff81a0b7e0 T intel_modeset_probe_defer +ffffffff81a0b810 T intel_display_driver_register +ffffffff81a0b870 T intel_display_driver_unregister +ffffffff81a0b8f0 T intel_scanout_needs_vtd_wa +ffffffff81a0b930 t wait_for_pipe_scanline_moving +ffffffff81a0bb80 t hsw_get_pipe_config +ffffffff81a0ca10 t hsw_crtc_enable +ffffffff81a0d400 t hsw_crtc_disable +ffffffff81a0d5b0 t skl_commit_modeset_enables +ffffffff81a0db80 t intel_get_transcoder_timings +ffffffff81a0de40 t ilk_get_pfit_config +ffffffff81a0dfc0 t enabled_bigjoiner_pipes +ffffffff81a0e1e0 t bdw_set_pipemisc +ffffffff81a0e320 t ilk_pfit_enable +ffffffff81a0e450 t intel_set_transcoder_timings +ffffffff81a0e800 t intel_update_crtc +ffffffff81a0edd0 t intel_pre_plane_update +ffffffff81a0f2f0 t intel_commit_modeset_enables +ffffffff81a0f410 t ilk_get_pipe_config +ffffffff81a0f740 t ilk_crtc_enable +ffffffff81a0fdd0 t ilk_crtc_disable +ffffffff81a10070 t i9xx_get_pipe_config +ffffffff81a10920 t valleyview_crtc_enable +ffffffff81a10d60 t i9xx_crtc_disable +ffffffff81a11100 t i9xx_pfit_enable +ffffffff81a11270 t i9xx_crtc_enable +ffffffff81a115f0 t intel_mode_valid +ffffffff81a11770 t intel_atomic_check +ffffffff81a136d0 t intel_atomic_commit +ffffffff81a13a30 t copy_bigjoiner_crtc_state_nomodeset +ffffffff81a13b40 t intel_atomic_check_planes +ffffffff81a145b0 t intel_modeset_checks +ffffffff81a14740 t intel_atomic_check_crtcs +ffffffff81a14bf0 t intel_async_flip_check_hw +ffffffff81a15050 t intel_crtc_copy_uapi_to_hw_state_modeset +ffffffff81a151b0 t intel_atomic_commit_ready +ffffffff81a15240 t intel_atomic_commit_work +ffffffff81a15260 t intel_atomic_commit_tail +ffffffff81a16610 t intel_atomic_cleanup_work +ffffffff81a16730 t intel_ddi_crt_present +ffffffff81a16800 t ilk_has_edp_a +ffffffff81a17000 T intel_display_power_domain_str +ffffffff81a17060 T __intel_display_power_is_enabled +ffffffff81a17120 T intel_display_power_is_enabled +ffffffff81a17240 T intel_display_power_set_target_dc_state +ffffffff81a17360 T intel_display_power_get +ffffffff81a173e0 t __intel_display_power_get_domain +ffffffff81a175c0 T intel_display_power_get_if_enabled +ffffffff81a176f0 T __intel_display_power_put_async +ffffffff81a178b0 t __intel_display_power_put_domain +ffffffff81a17a20 T intel_display_power_flush_work +ffffffff81a17b40 t release_async_put_domains +ffffffff81a17c30 T intel_display_power_put_unchecked +ffffffff81a17c90 T intel_display_power_get_in_set +ffffffff81a17d70 T intel_display_power_get_in_set_if_enabled +ffffffff81a17e20 T intel_display_power_put_mask_in_set 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intel_display_power_resume_early +ffffffff81a1a9c0 t hsw_disable_pc8 +ffffffff81a1ae20 T intel_display_power_suspend +ffffffff81a1aea0 T intel_display_power_resume +ffffffff81a1af80 T intel_display_power_debug +ffffffff81a1b040 T intel_display_power_ddi_io_domain +ffffffff81a1b120 T intel_display_power_ddi_lanes_domain +ffffffff81a1b200 T intel_display_power_legacy_aux_domain +ffffffff81a1b310 T intel_display_power_tbt_aux_domain +ffffffff81a1b420 t __delayed_work_tick +ffffffff81a1c000 T intel_display_power_map_init +ffffffff81a1c170 t __set_power_wells +ffffffff81a1c550 T intel_display_power_map_cleanup +ffffffff81a1d000 T lookup_power_well +ffffffff81a1d0c0 T intel_power_well_enable +ffffffff81a1d150 T intel_power_well_name +ffffffff81a1d190 T intel_power_well_disable +ffffffff81a1d200 T intel_power_well_sync_hw +ffffffff81a1d270 T intel_power_well_get +ffffffff81a1d310 T intel_power_well_put +ffffffff81a1d410 T intel_power_well_is_enabled +ffffffff81a1d430 T intel_power_well_is_enabled_cached +ffffffff81a1d460 T intel_display_power_well_is_enabled +ffffffff81a1d510 T intel_power_well_is_always_on +ffffffff81a1d550 T intel_power_well_domains +ffffffff81a1d580 T intel_power_well_refcount +ffffffff81a1d5b0 T gen9_sanitize_dc_state +ffffffff81a1d680 T gen9_set_dc_state +ffffffff81a1d9e0 T gen9_enable_dc5 +ffffffff81a1dc40 T skl_enable_dc6 +ffffffff81a1dd90 T bxt_enable_dc9 +ffffffff81a1df40 T bxt_disable_dc9 +ffffffff81a1e030 T gen9_disable_dc_states +ffffffff81a1e400 T chv_phy_powergate_ch +ffffffff81a1e510 t assert_chv_phy_status +ffffffff81a1e8c0 T chv_phy_powergate_lanes +ffffffff81a1eb70 t i9xx_power_well_sync_hw_noop +ffffffff81a1eba0 t i9xx_always_on_power_well_noop +ffffffff81a1ebd0 t i9xx_always_on_power_well_enabled +ffffffff81a1ec00 t chv_pipe_power_well_sync_hw +ffffffff81a1ec30 t chv_pipe_power_well_enable +ffffffff81a1ec60 t chv_pipe_power_well_disable +ffffffff81a1ecc0 t chv_pipe_power_well_enabled +ffffffff81a1edc0 t chv_dpio_cmn_power_well_enable +ffffffff81a1efd0 t chv_dpio_cmn_power_well_disable +ffffffff81a1f100 t vlv_power_well_enabled +ffffffff81a1f220 t i830_pipes_power_well_sync_hw +ffffffff81a1f310 t i830_pipes_power_well_enable +ffffffff81a1f3d0 t i830_pipes_power_well_disable +ffffffff81a1f400 t i830_pipes_power_well_enabled +ffffffff81a1f4a0 t hsw_power_well_sync_hw +ffffffff81a1f590 t hsw_power_well_enable +ffffffff81a1f810 t hsw_power_well_disable +ffffffff81a1f8c0 t hsw_power_well_enabled +ffffffff81a1f9a0 t gen9_dc_off_power_well_enable +ffffffff81a1f9b0 t gen9_dc_off_power_well_disable +ffffffff81a1fa50 t gen9_dc_off_power_well_enabled +ffffffff81a1fae0 t bxt_dpio_cmn_power_well_enable +ffffffff81a1fb10 t bxt_dpio_cmn_power_well_disable +ffffffff81a1fb40 t bxt_dpio_cmn_power_well_enabled +ffffffff81a1fb70 t vlv_display_power_well_enable +ffffffff81a1fba0 t vlv_display_power_well_disable +ffffffff81a1fc10 t vlv_dpio_cmn_power_well_enable +ffffffff81a1fc90 t vlv_dpio_cmn_power_well_disable +ffffffff81a1fd90 t vlv_power_well_enable +ffffffff81a1fdb0 t vlv_power_well_disable +ffffffff81a1fdd0 t icl_aux_power_well_enable +ffffffff81a20420 t icl_aux_power_well_disable +ffffffff81a20690 t tgl_tc_cold_off_power_well_sync_hw +ffffffff81a206b0 t tgl_tc_cold_off_power_well_enable +ffffffff81a206d0 t tgl_tc_cold_off_power_well_disable +ffffffff81a206f0 t tgl_tc_cold_off_power_well_is_enabled +ffffffff81a20720 t xelpdp_aux_power_well_enable +ffffffff81a20800 t xelpdp_aux_power_well_disable +ffffffff81a208e0 t xelpdp_aux_power_well_enabled +ffffffff81a20990 t chv_set_pipe_power_well +ffffffff81a20b90 t vlv_display_power_well_init +ffffffff81a20e20 t vlv_set_power_well +ffffffff81a21040 t hsw_wait_for_power_well_enable +ffffffff81a21180 t hsw_wait_for_power_well_disable +ffffffff81a21450 t tgl_tc_cold_request +ffffffff81a22000 T intel_dkl_phy_read +ffffffff81a22100 T intel_dkl_phy_write +ffffffff81a221e0 T intel_dkl_phy_rmw +ffffffff81a222f0 T intel_dkl_phy_posting_read +ffffffff81a23000 T intel_dmc_has_payload +ffffffff81a23040 T intel_dmc_load_program +ffffffff81a23850 t pipedmc_clock_gating_wa +ffffffff81a23a40 T intel_dmc_disable_program +ffffffff81a23c60 T assert_dmc_loaded +ffffffff81a23db0 T intel_dmc_ucode_init +ffffffff81a24080 t dmc_load_work_fn +ffffffff81a248d0 T intel_dmc_ucode_suspend +ffffffff81a24940 T intel_dmc_ucode_resume +ffffffff81a249e0 T intel_dmc_ucode_fini +ffffffff81a24b10 T intel_dmc_print_error_state +ffffffff81a24bc0 T intel_dmc_debugfs_register +ffffffff81a25000 T intel_dp_is_edp +ffffffff81a25030 T intel_dp_is_uhbr +ffffffff81a25070 T intel_dp_max_lane_count +ffffffff81a250e0 T intel_dp_link_required +ffffffff81a25120 T intel_dp_max_data_rate +ffffffff81a25180 T intel_dp_can_bigjoiner +ffffffff81a251d0 T intel_dp_get_link_train_fallback_values +ffffffff81a25580 T intel_dp_mode_to_fec_clock +ffffffff81a255d0 T intel_dp_min_bpp +ffffffff81a25610 T intel_dp_source_supports_tps3 +ffffffff81a25660 T intel_dp_source_supports_tps4 +ffffffff81a25690 T intel_dp_max_link_rate +ffffffff81a25740 T intel_dp_rate_select +ffffffff81a257e0 T intel_dp_compute_rate +ffffffff81a258b0 T intel_dp_adjust_compliance_config +ffffffff81a259f0 T intel_dp_limited_color_range +ffffffff81a25a60 T intel_dp_compute_psr_vsc_sdp +ffffffff81a25ae0 T intel_dp_needs_vsc_sdp +ffffffff81a25b30 t intel_dp_compute_vsc_colorimetry +ffffffff81a25cb0 T intel_dp_compute_config +ffffffff81a260f0 t intel_dp_compute_output_format +ffffffff81a26320 t intel_dp_drrs_compute_config +ffffffff81a264c0 t intel_dp_compute_vsc_sdp +ffffffff81a26560 t intel_dp_compute_hdr_metadata_infoframe_sdp +ffffffff81a265f0 T intel_dp_set_link_params +ffffffff81a26630 T intel_edp_backlight_on +ffffffff81a266d0 T intel_edp_backlight_off +ffffffff81a26760 T intel_dp_sink_set_decompression_state +ffffffff81a26800 T intel_dp_wait_source_oui +ffffffff81a268c0 T intel_dp_set_power +ffffffff81a26ae0 T intel_dp_sync_state +ffffffff81a26b60 t intel_dp_get_dpcd +ffffffff81a26cc0 t intel_dp_reset_max_link_params +ffffffff81a26dc0 T intel_dp_initial_fastset_check +ffffffff81a26ea0 T intel_dp_check_frl_training +ffffffff81a27450 T intel_dp_pcon_dsc_configure +ffffffff81a27640 T intel_dp_configure_protocol_converter +ffffffff81a277b0 T intel_dp_get_colorimetry_status +ffffffff81a27810 T intel_edp_fixup_vbt_bpp +ffffffff81a278a0 T intel_write_dp_vsc_sdp +ffffffff81a27a40 T intel_dp_set_infoframes +ffffffff81a27b70 t intel_write_dp_sdp +ffffffff81a27e50 T intel_read_dp_sdp +ffffffff81a28170 T intel_dp_retrain_link +ffffffff81a285d0 T intel_dp_phy_test +ffffffff81a28c90 T intel_digital_port_connected +ffffffff81a28d40 T intel_dp_encoder_flush_work +ffffffff81a28d90 T intel_dp_encoder_suspend +ffffffff81a28dd0 T intel_dp_encoder_shutdown +ffffffff81a28e10 T intel_dp_hpd_pulse +ffffffff81a29480 T intel_dp_is_port_edp +ffffffff81a294e0 T intel_dp_init_connector +ffffffff81a2a5b0 t intel_dp_modeset_retry_work_fn +ffffffff81a2a650 t intel_dp_set_common_rates +ffffffff81a2a7d0 T intel_dp_mst_suspend +ffffffff81a2a870 T intel_dp_mst_resume +ffffffff81a2a920 t intel_dp_compute_link_config +ffffffff81a2b690 t intel_dp_dsc_compute_bpp +ffffffff81a2b740 t intel_dp_dsc_get_output_bpp +ffffffff81a2b880 t intel_dp_dsc_get_slice_count +ffffffff81a2b9e0 t intel_dp_set_sink_rates +ffffffff81a2bc10 t intel_dp_needs_link_retrain +ffffffff81a2bd90 t intel_dp_check_device_service_irq +ffffffff81a2c360 t intel_dp_force +ffffffff81a2c4a0 t intel_dp_connector_register +ffffffff81a2c580 t intel_dp_connector_unregister +ffffffff81a2c5e0 t intel_dp_oob_hotplug_event +ffffffff81a2c660 t intel_dp_set_edid +ffffffff81a2ca90 t intel_dp_get_modes +ffffffff81a2cb90 t intel_dp_detect +ffffffff81a2d460 t intel_dp_mode_valid +ffffffff81a2d8c0 t intel_dp_connector_atomic_check +ffffffff81a2dc30 t intel_dp_get_dsc_sink_cap +ffffffff81a2dda0 t intel_dp_mode_valid_downstream +ffffffff81a2dfe0 t icl_max_source_rate +ffffffff81a2f000 T intel_dp_aux_fini +ffffffff81a2f020 T intel_dp_aux_init +ffffffff81a2f220 t xelpdp_aux_ctl_reg +ffffffff81a2f2e0 t xelpdp_aux_data_reg +ffffffff81a2f3b0 t tgl_aux_ctl_reg +ffffffff81a2f430 t tgl_aux_data_reg +ffffffff81a2f4c0 t skl_aux_ctl_reg +ffffffff81a2f540 t skl_aux_data_reg +ffffffff81a2f5d0 t ilk_aux_ctl_reg +ffffffff81a2f650 t ilk_aux_data_reg +ffffffff81a2f6e0 t g4x_aux_ctl_reg +ffffffff81a2f760 t g4x_aux_data_reg +ffffffff81a2f7f0 t skl_get_aux_clock_divider +ffffffff81a2f820 t hsw_get_aux_clock_divider +ffffffff81a2f8b0 t ilk_get_aux_clock_divider +ffffffff81a2f910 t g4x_get_aux_clock_divider +ffffffff81a2f960 t skl_get_aux_send_ctl +ffffffff81a2f9e0 t g4x_get_aux_send_ctl +ffffffff81a2fa30 t kasprintf +ffffffff81a2fb00 t intel_dp_aux_transfer +ffffffff81a2fd90 t intel_dp_aux_xfer +ffffffff81a31000 T intel_dp_aux_init_backlight_funcs +ffffffff81a31220 t intel_dp_aux_hdr_setup_backlight +ffffffff81a31370 t intel_dp_aux_hdr_get_backlight +ffffffff81a314e0 t intel_dp_aux_hdr_set_backlight +ffffffff81a315d0 t intel_dp_aux_hdr_disable_backlight +ffffffff81a31650 t intel_dp_aux_hdr_enable_backlight +ffffffff81a31870 t intel_dp_aux_vesa_setup_backlight +ffffffff81a31a20 t intel_dp_aux_vesa_get_backlight +ffffffff81a31a50 t intel_dp_aux_vesa_set_backlight +ffffffff81a31af0 t intel_dp_aux_vesa_disable_backlight +ffffffff81a31ba0 t intel_dp_aux_vesa_enable_backlight +ffffffff81a32000 T intel_dp_hdcp_init +ffffffff81a320b0 t intel_dp_hdcp_write_an_aksv +ffffffff81a321a0 t intel_dp_hdcp_read_bksv +ffffffff81a32230 t intel_dp_hdcp_read_bstatus +ffffffff81a322c0 t intel_dp_hdcp_repeater_present +ffffffff81a32370 t intel_dp_hdcp_read_ri_prime +ffffffff81a32400 t intel_dp_hdcp_read_ksv_ready +ffffffff81a324a0 t intel_dp_hdcp_read_ksv_fifo +ffffffff81a32590 t intel_dp_hdcp_read_v_prime_part +ffffffff81a32630 t intel_dp_hdcp_toggle_signalling +ffffffff81a32660 t intel_dp_mst_hdcp_stream_encryption +ffffffff81a32850 t intel_dp_hdcp_check_link +ffffffff81a328e0 t intel_dp_hdcp_capable +ffffffff81a32990 t intel_dp_hdcp2_capable +ffffffff81a32a10 t intel_dp_hdcp2_write_msg +ffffffff81a32bc0 t intel_dp_hdcp2_read_msg +ffffffff81a33290 t intel_dp_hdcp2_config_stream_type +ffffffff81a332f0 t intel_dp_mst_hdcp2_stream_encryption +ffffffff81a33550 t intel_dp_mst_hdcp2_check_link +ffffffff81a33610 t intel_dp_hdcp2_check_link +ffffffff81a34000 T intel_dp_init_lttpr_and_dprx_caps +ffffffff81a340d0 t intel_dp_init_lttpr +ffffffff81a34310 T intel_dp_get_adjust_train +ffffffff81a349e0 T intel_dp_program_link_training_pattern +ffffffff81a34ae0 T intel_dp_set_signal_levels +ffffffff81a34e50 T intel_dp_dump_link_status +ffffffff81a34f20 T intel_dp_stop_link_train +ffffffff81a35150 T intel_dp_start_link_train +ffffffff81a36200 t intel_dp_link_train_phy +ffffffff81a38000 T intel_dp_mst_encoder_active_links +ffffffff81a38030 T intel_dp_mst_encoder_init +ffffffff81a38270 T intel_dp_mst_source_support +ffffffff81a382b0 T intel_dp_mst_encoder_cleanup +ffffffff81a38310 T intel_dp_mst_is_master_trans +ffffffff81a38350 T intel_dp_mst_is_slave_trans +ffffffff81a38390 T intel_dp_mst_add_topology_state_for_crtc +ffffffff81a38450 t intel_dp_add_mst_connector +ffffffff81a38660 t intel_dp_mst_poll_hpd_irq +ffffffff81a38680 t intel_dp_mst_get_hw_state +ffffffff81a386e0 t intel_dp_mst_connector_late_register +ffffffff81a38750 t intel_dp_mst_connector_early_unregister +ffffffff81a38780 t intel_dp_mst_get_modes +ffffffff81a38820 t intel_dp_mst_detect +ffffffff81a38920 t intel_dp_mst_mode_valid_ctx +ffffffff81a38ac0 t intel_mst_atomic_best_encoder +ffffffff81a38b20 t intel_dp_mst_atomic_check +ffffffff81a38c90 t intel_dp_mst_compute_config +ffffffff81a38fa0 t intel_dp_mst_compute_config_late +ffffffff81a39090 t intel_mst_disable_dp +ffffffff81a39170 t intel_mst_post_disable_dp +ffffffff81a39420 t intel_mst_pre_pll_enable_dp +ffffffff81a39470 t intel_mst_pre_enable_dp +ffffffff81a39690 t intel_mst_enable_dp +ffffffff81a39a70 t intel_dp_mst_enc_get_hw_state +ffffffff81a39ab0 t intel_dp_mst_enc_get_config +ffffffff81a39ad0 t intel_dp_mst_initial_fastset_check +ffffffff81a39af0 t intel_dp_mst_encoder_destroy +ffffffff81a3a000 T bxt_port_to_phy_channel +ffffffff81a3a110 T bxt_ddi_phy_set_signal_levels +ffffffff81a3a630 T bxt_ddi_phy_is_enabled +ffffffff81a3a780 T bxt_ddi_phy_uninit +ffffffff81a3a880 T bxt_ddi_phy_init +ffffffff81a3aaa0 t _bxt_ddi_phy_init +ffffffff81a3b0a0 T bxt_ddi_phy_verify_state +ffffffff81a3b400 t __phy_reg_verify_state +ffffffff81a3b500 T bxt_ddi_phy_calc_lane_lat_optim_mask +ffffffff81a3b570 T bxt_ddi_phy_set_lane_optim_mask +ffffffff81a3b890 T bxt_ddi_phy_get_lane_lat_optim_mask +ffffffff81a3bad0 T chv_set_phy_signal_level +ffffffff81a3be20 T chv_data_lane_soft_reset +ffffffff81a3bff0 T chv_phy_pre_pll_enable +ffffffff81a3c290 T chv_phy_pre_encoder_enable +ffffffff81a3c4f0 T chv_phy_release_cl2_override +ffffffff81a3c580 T chv_phy_post_pll_disable +ffffffff81a3c630 T vlv_set_phy_signal_level +ffffffff81a3c7a0 T vlv_phy_pre_pll_enable +ffffffff81a3c8a0 T vlv_phy_pre_encoder_enable +ffffffff81a3c9a0 T vlv_phy_reset_lanes +ffffffff81a3d000 T pnv_calc_dpll_params +ffffffff81a3d0c0 T i9xx_calc_dpll_params +ffffffff81a3d190 T vlv_calc_dpll_params +ffffffff81a3d250 T chv_calc_dpll_params +ffffffff81a3d320 T bxt_find_best_dpll +ffffffff81a3d340 t chv_find_best_dpll +ffffffff81a3d680 T i9xx_dpll_compute_fp +ffffffff81a3d6c0 T vlv_compute_dpll +ffffffff81a3d740 T chv_compute_dpll +ffffffff81a3d7c0 T intel_dpll_crtc_compute_clock +ffffffff81a3d8c0 T intel_dpll_crtc_get_shared_dpll +ffffffff81a3da10 T intel_dpll_init_clock_hook +ffffffff81a3db10 T i9xx_enable_pll +ffffffff81a3dea0 T vlv_enable_pll +ffffffff81a3e3e0 T chv_enable_pll +ffffffff81a3ea30 T vlv_force_pll_on +ffffffff81a3eb80 T vlv_disable_pll +ffffffff81a3ec40 T chv_disable_pll +ffffffff81a3ed70 T i9xx_disable_pll +ffffffff81a3ee70 T vlv_force_pll_off +ffffffff81a3ef60 T assert_pll_enabled +ffffffff81a3f040 T assert_pll_disabled +ffffffff81a3f120 t intel_pll_is_valid +ffffffff81a3f1f0 t dg2_crtc_compute_clock +ffffffff81a3f270 t hsw_crtc_compute_clock +ffffffff81a3f330 t hsw_crtc_get_shared_dpll +ffffffff81a3f3d0 t ilk_crtc_compute_clock +ffffffff81a3f6d0 t ilk_crtc_get_shared_dpll +ffffffff81a3f720 t g4x_find_best_dpll +ffffffff81a3fa60 t chv_crtc_compute_clock +ffffffff81a3fb70 t vlv_crtc_compute_clock +ffffffff81a40010 t g4x_crtc_compute_clock +ffffffff81a40170 t i9xx_compute_dpll +ffffffff81a403e0 t pnv_crtc_compute_clock +ffffffff81a407c0 t i9xx_crtc_compute_clock +ffffffff81a408e0 t i9xx_find_best_dpll +ffffffff81a40c20 t i8xx_crtc_compute_clock +ffffffff81a41000 T intel_get_shared_dpll_by_id +ffffffff81a41040 T intel_get_shared_dpll_id +ffffffff81a410d0 T assert_shared_dpll +ffffffff81a411f0 T intel_dpll_get_hw_state +ffffffff81a41220 T icl_tc_port_to_pll_id +ffffffff81a41250 T intel_enable_shared_dpll +ffffffff81a41540 T intel_disable_shared_dpll +ffffffff81a41780 T intel_shared_dpll_swap_state +ffffffff81a41860 T icl_set_active_port_dpll +ffffffff81a418a0 T intel_shared_dpll_init +ffffffff81a41ab0 T intel_compute_shared_dplls +ffffffff81a41b40 T intel_reserve_shared_dplls +ffffffff81a41bd0 T intel_release_shared_dplls +ffffffff81a41c10 T intel_update_active_dpll +ffffffff81a41c70 T intel_dpll_get_freq +ffffffff81a41d00 T intel_dpll_update_ref_clks +ffffffff81a41d50 T intel_dpll_readout_hw_state +ffffffff81a41ed0 T intel_dpll_sanitize_state +ffffffff81a41fb0 T intel_dpll_dump_hw_state +ffffffff81a42030 T intel_shared_dpll_state_verify +ffffffff81a42150 t verify_single_dpll_state +ffffffff81a42470 T intel_shared_dpll_verify_disabled +ffffffff81a424f0 t icl_compute_dplls +ffffffff81a43120 t icl_get_dplls +ffffffff81a43470 t icl_put_dplls +ffffffff81a43530 t icl_update_active_dpll +ffffffff81a435e0 t icl_update_dpll_ref_clks +ffffffff81a43620 t icl_dump_hw_state +ffffffff81a436e0 t combo_pll_enable +ffffffff81a43900 t combo_pll_disable +ffffffff81a439f0 t combo_pll_get_hw_state +ffffffff81a43a80 t icl_ddi_combo_pll_get_freq +ffffffff81a43c50 t icl_dpll_write +ffffffff81a43ef0 t adlp_cmtg_clock_gating_wa +ffffffff81a44050 t icl_pll_disable +ffffffff81a441f0 t icl_pll_get_hw_state +ffffffff81a44530 t tbt_pll_enable +ffffffff81a446e0 t tbt_pll_disable +ffffffff81a44700 t tbt_pll_get_hw_state +ffffffff81a44720 t icl_ddi_tbt_pll_get_freq +ffffffff81a44790 t mg_pll_enable +ffffffff81a44d20 t mg_pll_disable +ffffffff81a44d60 t dkl_pll_get_hw_state +ffffffff81a44f30 t icl_ddi_mg_pll_get_freq +ffffffff81a45010 t icl_calc_dpll_state +ffffffff81a45150 t intel_find_shared_dpll +ffffffff81a45470 t intel_reference_shared_dpll +ffffffff81a45640 t intel_unreference_shared_dpll +ffffffff81a457a0 t mg_pll_get_hw_state +ffffffff81a459f0 t bxt_compute_dpll +ffffffff81a45cf0 t bxt_get_dpll +ffffffff81a45dc0 t intel_put_dpll +ffffffff81a45e20 t bxt_update_dpll_ref_clks +ffffffff81a45e60 t bxt_dump_hw_state +ffffffff81a45f10 t bxt_ddi_pll_enable +ffffffff81a46a30 t bxt_ddi_pll_disable +ffffffff81a46c40 t bxt_ddi_pll_get_hw_state +ffffffff81a470d0 t bxt_ddi_pll_get_freq +ffffffff81a47160 t bxt_ddi_set_dpll_hw_state +ffffffff81a47350 t skl_compute_dpll +ffffffff81a47ab0 t skl_get_dpll +ffffffff81a47b60 t skl_update_dpll_ref_clks +ffffffff81a47ba0 t skl_dump_hw_state +ffffffff81a47c00 t skl_ddi_dpll0_enable +ffffffff81a47cc0 t skl_ddi_dpll0_disable +ffffffff81a47cf0 t skl_ddi_dpll0_get_hw_state +ffffffff81a47df0 t skl_ddi_pll_get_freq +ffffffff81a47e80 t skl_ddi_wrpll_get_freq +ffffffff81a47fe0 t skl_ddi_pll_enable +ffffffff81a481f0 t skl_ddi_pll_disable +ffffffff81a48280 t skl_ddi_pll_get_hw_state +ffffffff81a483a0 t hsw_compute_dpll +ffffffff81a48bc0 t hsw_get_dpll +ffffffff81a48d10 t hsw_update_dpll_ref_clks +ffffffff81a48d80 t hsw_dump_hw_state +ffffffff81a48db0 t hsw_ddi_wrpll_enable +ffffffff81a48e30 t hsw_ddi_wrpll_disable +ffffffff81a48f10 t hsw_ddi_wrpll_get_hw_state +ffffffff81a48fb0 t hsw_ddi_wrpll_get_freq +ffffffff81a490a0 t hsw_ddi_spll_enable +ffffffff81a49100 t hsw_ddi_spll_disable +ffffffff81a491d0 t hsw_ddi_spll_get_hw_state +ffffffff81a49260 t hsw_ddi_spll_get_freq +ffffffff81a49300 t hsw_ddi_lcpll_enable +ffffffff81a49330 t hsw_ddi_lcpll_disable +ffffffff81a49360 t hsw_ddi_lcpll_get_hw_state +ffffffff81a49390 t hsw_ddi_lcpll_get_freq +ffffffff81a49410 t ibx_compute_dpll +ffffffff81a49440 t ibx_get_dpll +ffffffff81a49540 t ibx_dump_hw_state +ffffffff81a495a0 t ibx_pch_dpll_enable +ffffffff81a49750 t ibx_pch_dpll_disable +ffffffff81a497d0 t ibx_pch_dpll_get_hw_state +ffffffff81a4a000 T intel_dpt_pin +ffffffff81a4a1e0 T intel_dpt_unpin +ffffffff81a4a250 T intel_dpt_resume +ffffffff81a4a330 T intel_dpt_suspend +ffffffff81a4a400 T intel_dpt_create +ffffffff81a4a7e0 t dpt_insert_page +ffffffff81a4a850 t dpt_clear_range +ffffffff81a4a880 t dpt_insert_entries +ffffffff81a4a970 t dpt_cleanup +ffffffff81a4a9c0 t dpt_bind_vma +ffffffff81a4aa50 t dpt_unbind_vma +ffffffff81a4aa80 T intel_dpt_destroy +ffffffff81a4aad0 t __ww_mutex_lock +ffffffff81a4b000 T intel_drrs_type_str +ffffffff81a4b040 T intel_drrs_is_active +ffffffff81a4b070 T intel_drrs_activate +ffffffff81a4b250 T intel_drrs_deactivate +ffffffff81a4b330 t intel_drrs_set_state +ffffffff81a4b480 T intel_drrs_invalidate +ffffffff81a4b4a0 t intel_drrs_frontbuffer_update +ffffffff81a4b5d0 T intel_drrs_flush +ffffffff81a4b5f0 T intel_crtc_drrs_init +ffffffff81a4b690 t intel_drrs_downclock_work +ffffffff81a4b6f0 t __delayed_work_tick +ffffffff81a4c000 T intel_dsb_indexed_reg_write +ffffffff81a4c140 T intel_dsb_reg_write +ffffffff81a4c230 T intel_dsb_commit +ffffffff81a4c670 T intel_dsb_prepare +ffffffff81a4c800 T intel_dsb_cleanup +ffffffff81a4d000 T intel_dsi_bitrate +ffffffff81a4d0a0 T intel_dsi_tlpx_ns +ffffffff81a4d0f0 T intel_dsi_get_modes +ffffffff81a4d100 T intel_dsi_mode_valid +ffffffff81a4d1c0 T intel_dsi_host_init +ffffffff81a4d270 T intel_dsi_get_panel_orientation +ffffffff81a4e000 T intel_dsi_dcs_init_backlight_funcs +ffffffff81a4e0a0 t dcs_setup_backlight +ffffffff81a4e100 t dcs_get_backlight +ffffffff81a4e1f0 t dcs_set_backlight +ffffffff81a4e2e0 t dcs_disable_backlight +ffffffff81a4e640 t dcs_enable_backlight +ffffffff81a4f000 T intel_dsi_vbt_exec_sequence +ffffffff81a4f020 T intel_dsi_log_params +ffffffff81a4f3a0 T intel_dsi_vbt_init +ffffffff81a4f840 T intel_dsi_vbt_gpio_init +ffffffff81a4f860 T intel_dsi_vbt_gpio_cleanup +ffffffff81a50000 T intel_dvo_init +ffffffff81a504f0 t intel_disable_dvo +ffffffff81a505a0 t intel_enable_dvo +ffffffff81a50690 t intel_dvo_get_hw_state +ffffffff81a50700 t intel_dvo_get_config +ffffffff81a507a0 t intel_dvo_compute_config +ffffffff81a50830 t intel_dvo_pre_enable +ffffffff81a50920 t intel_dvo_connector_get_hw_state +ffffffff81a509a0 t intel_dvo_enc_destroy +ffffffff81a509e0 t intel_dvo_detect +ffffffff81a50ae0 t intel_dvo_get_modes +ffffffff81a50b50 t intel_dvo_mode_valid +ffffffff81a51000 T intel_fb_get_format_info +ffffffff81a51230 T intel_fb_is_ccs_modifier +ffffffff81a51400 T intel_fb_is_rc_ccs_cc_modifier +ffffffff81a515d0 T intel_fb_is_mc_ccs_modifier +ffffffff81a517a0 T intel_fb_plane_get_modifiers +ffffffff81a518e0 T intel_fb_plane_supports_modifier +ffffffff81a51960 T intel_format_info_is_yuv_semiplanar +ffffffff81a51c00 T intel_fb_is_ccs_aux_plane +ffffffff81a51e40 T intel_fb_rc_ccs_cc_plane +ffffffff81a520a0 T is_surface_linear +ffffffff81a52100 t intel_fb_is_gen12_ccs_aux_plane +ffffffff81a52400 T main_to_ccs_plane +ffffffff81a526e0 T skl_ccs_to_main_plane +ffffffff81a529d0 T skl_main_to_aux_plane +ffffffff81a52c30 T intel_tile_size +ffffffff81a52c70 T intel_tile_width_bytes +ffffffff81a52ec0 T intel_tile_height +ffffffff81a52f20 T intel_tile_row_size +ffffffff81a52fa0 T intel_fb_align_height +ffffffff81a53010 T intel_fb_uses_dpt +ffffffff81a53060 T intel_cursor_alignment +ffffffff81a530c0 T intel_surf_alignment +ffffffff81a532b0 T intel_fb_plane_get_subsampling +ffffffff81a53390 T intel_plane_adjust_aligned_offset +ffffffff81a53400 t intel_adjust_aligned_offset +ffffffff81a535d0 T intel_plane_compute_aligned_offset +ffffffff81a536d0 t intel_compute_aligned_offset +ffffffff81a538a0 T intel_fb_needs_pot_stride_remap +ffffffff81a53900 T intel_fb_supports_90_270_rotation +ffffffff81a53950 T intel_fill_fb_info +ffffffff81a543b0 t calc_plane_remap_info +ffffffff81a54d40 T intel_fb_fill_view +ffffffff81a54da0 T intel_plane_compute_gtt +ffffffff81a554b0 T intel_framebuffer_init +ffffffff81a56100 t intel_fb_modifier_to_tiling +ffffffff81a56310 t gen12_ccs_aux_stride +ffffffff81a56370 T intel_user_framebuffer_create +ffffffff81a564b0 T intel_framebuffer_create +ffffffff81a56540 t intel_adjust_tile_offset +ffffffff81a56680 t intel_plane_can_remap +ffffffff81a568f0 t intel_user_framebuffer_destroy +ffffffff81a56950 t intel_user_framebuffer_create_handle +ffffffff81a56980 t intel_user_framebuffer_dirty +ffffffff81a57000 T intel_pin_and_fence_fb_obj +ffffffff81a57330 t i915_gem_object_lock +ffffffff81a57540 T intel_unpin_fb_vma +ffffffff81a575b0 T intel_plane_pin_fb +ffffffff81a578e0 T intel_plane_unpin_fb +ffffffff81a58000 T intel_fbc_cleanup +ffffffff81a581c0 T intel_fbc_pre_update +ffffffff81a58810 T intel_fbc_post_update +ffffffff81a58a60 T intel_fbc_invalidate +ffffffff81a58c80 T intel_fbc_flush +ffffffff81a58f20 T intel_fbc_atomic_check +ffffffff81a594c0 T intel_fbc_disable +ffffffff81a59580 t __intel_fbc_disable +ffffffff81a59710 T intel_fbc_update +ffffffff81a59e00 T intel_fbc_reset_underrun +ffffffff81a59f60 T intel_fbc_handle_fifo_underrun_irq +ffffffff81a5a010 T intel_fbc_add_plane +ffffffff81a5a040 T intel_fbc_init +ffffffff81a5a2d0 T intel_fbc_sanitize +ffffffff81a5a3a0 T intel_fbc_crtc_debugfs_add +ffffffff81a5a3d0 T intel_fbc_debugfs_register +ffffffff81a5a400 t intel_fbc_is_ok +ffffffff81a5a540 t intel_fbc_update_state +ffffffff81a5a8c0 t intel_fbc_underrun_work_fn +ffffffff81a5a9e0 t ivb_fbc_activate +ffffffff81a5ac40 t ilk_fbc_deactivate +ffffffff81a5acf0 t ilk_fbc_is_active +ffffffff81a5ad50 t ivb_fbc_is_compressing +ffffffff81a5adc0 t snb_fbc_nuke +ffffffff81a5ae40 t ilk_fbc_program_cfb +ffffffff81a5ae80 t ivb_fbc_set_false_color +ffffffff81a5af40 t snb_fbc_activate +ffffffff81a5afd0 t ilk_fbc_is_compressing +ffffffff81a5b040 t ilk_fbc_activate +ffffffff81a5b170 t i965_fbc_nuke +ffffffff81a5b210 t g4x_fbc_activate +ffffffff81a5b320 t g4x_fbc_deactivate +ffffffff81a5b3b0 t g4x_fbc_is_active +ffffffff81a5b410 t g4x_fbc_is_compressing +ffffffff81a5b470 t g4x_fbc_program_cfb +ffffffff81a5b4a0 t i8xx_fbc_activate +ffffffff81a5b610 t i8xx_fbc_deactivate +ffffffff81a5b6e0 t i8xx_fbc_is_active +ffffffff81a5b740 t i8xx_fbc_is_compressing +ffffffff81a5b7a0 t i8xx_fbc_program_cfb +ffffffff81a5b820 t i8xx_fbc_nuke +ffffffff81a5c000 T intel_fbdev_init +ffffffff81a5c4e0 t intel_fbdev_suspend_worker +ffffffff81a5c510 T intel_fbdev_initial_config_async +ffffffff81a5c580 T intel_fbdev_unregister +ffffffff81a5c5c0 T intel_fbdev_set_suspend +ffffffff81a5c5f0 T intel_fbdev_fini +ffffffff81a5c680 T intel_fbdev_output_poll_changed +ffffffff81a5c720 T intel_fbdev_restore_mode +ffffffff81a5c7a0 T intel_fbdev_framebuffer +ffffffff81a5c7e0 t intelfb_create +ffffffff81a5cdd0 t intel_fbdev_set_par +ffffffff81a5d000 T assert_fdi_tx_enabled +ffffffff81a5d0e0 T assert_fdi_tx_disabled +ffffffff81a5d1c0 T assert_fdi_rx_enabled +ffffffff81a5d280 T assert_fdi_rx_disabled +ffffffff81a5d340 T assert_fdi_tx_pll_enabled +ffffffff81a5d3f0 T assert_fdi_rx_pll_enabled +ffffffff81a5d4b0 T assert_fdi_rx_pll_disabled +ffffffff81a5d570 T intel_fdi_link_train +ffffffff81a5d590 T intel_fdi_pll_freq_update +ffffffff81a5d640 T intel_fdi_link_freq +ffffffff81a5d690 T ilk_fdi_compute_config +ffffffff81a5d9d0 T intel_fdi_normal_train +ffffffff81a5db60 T hsw_fdi_link_train +ffffffff81a5e040 T hsw_fdi_disable +ffffffff81a5e1a0 T ilk_fdi_pll_enable +ffffffff81a5e3a0 T ilk_fdi_pll_disable +ffffffff81a5e4d0 T ilk_fdi_disable +ffffffff81a5e720 T intel_fdi_init_hook +ffffffff81a5e780 t ilk_fdi_link_train +ffffffff81a5ede0 t gen6_fdi_link_train +ffffffff81a5f620 t ivb_manual_fdi_link_train +ffffffff81a5feb0 t cpt_set_fdi_bc_bifurcation +ffffffff81a61000 T intel_set_cpu_fifo_underrun_reporting +ffffffff81a613c0 T intel_set_pch_fifo_underrun_reporting +ffffffff81a615f0 T intel_cpu_fifo_underrun_irq_handler +ffffffff81a617e0 T intel_pch_fifo_underrun_irq_handler +ffffffff81a61860 T intel_check_cpu_fifo_underruns +ffffffff81a61a70 T intel_check_pch_fifo_underruns +ffffffff81a62000 T intel_frontbuffer_flip_prepare +ffffffff81a62050 T intel_frontbuffer_flip_complete +ffffffff81a62130 T intel_frontbuffer_flip +ffffffff81a62200 T __intel_fb_invalidate +ffffffff81a62290 T __intel_fb_flush +ffffffff81a62380 T intel_frontbuffer_get +ffffffff81a624b0 t frontbuffer_active +ffffffff81a624e0 t frontbuffer_retire +ffffffff81a62520 T intel_frontbuffer_put +ffffffff81a626b0 T intel_frontbuffer_track +ffffffff81a63000 T intel_atomic_global_obj_init +ffffffff81a63070 T intel_atomic_global_obj_cleanup +ffffffff81a63160 T intel_atomic_get_global_obj_state +ffffffff81a633b0 T intel_atomic_get_old_global_obj_state +ffffffff81a63410 T intel_atomic_get_new_global_obj_state +ffffffff81a63470 T intel_atomic_swap_global_state +ffffffff81a635b0 T intel_atomic_clear_global_state +ffffffff81a636d0 T intel_atomic_lock_global_state +ffffffff81a63760 T intel_atomic_serialize_global_state +ffffffff81a64000 T intel_gmbus_is_valid_pin +ffffffff81a64100 T intel_gmbus_reset +ffffffff81a64160 T intel_bb_set_bits +ffffffff81a642a0 T intel_bb_set_dir +ffffffff81a642d0 T intel_bb_read_bits +ffffffff81a64450 T intel_acquire_bus +ffffffff81a64650 T intel_release_bus +ffffffff81a647f0 T intel_send_start +ffffffff81a64810 T intel_send_stop +ffffffff81a64830 T intel_initiate_xfer +ffffffff81a64850 T intel_read_byte +ffffffff81a64870 T intel_write_byte +ffffffff81a64890 T intel_gmbus_output_aksv +ffffffff81a64960 t do_gmbus_xfer +ffffffff81a64f60 T intel_gmbus_setup +ffffffff81a652e0 T intel_gmbus_teardown +ffffffff81a65360 T intel_gmbus_get_adapter +ffffffff81a653e0 T intel_gmbus_force_bit +ffffffff81a65480 T intel_gmbus_is_forced_bit +ffffffff81a654b0 t gmbus_xfer_read +ffffffff81a65790 t gmbus_xfer_write +ffffffff81a659d0 t gmbus_wait +ffffffff81a65db0 t gmbus_wait_idle +ffffffff81a65f40 t gmbus_xfer +ffffffff81a66020 t gmbus_func +ffffffff81a66060 t gmbus_lock_bus +ffffffff81a66080 t gmbus_trylock_bus +ffffffff81a660e0 t gmbus_unlock_bus +ffffffff81a67000 T intel_hdcp_capable +ffffffff81a670a0 t intel_hdcp_read_valid_bksv +ffffffff81a67330 T intel_hdcp2_capable +ffffffff81a67410 T is_hdcp_supported +ffffffff81a67460 T intel_hdcp_component_init +ffffffff81a67490 T intel_hdcp_init +ffffffff81a675d0 t intel_hdcp_check_work +ffffffff81a6a100 t intel_hdcp_prop_work +ffffffff81a6a180 T intel_hdcp_enable +ffffffff81a6a1d0 T intel_hdcp_disable +ffffffff81a6a300 t intel_hdcp_update_value +ffffffff81a6a4c0 t _intel_hdcp2_disable +ffffffff81a6a8b0 t _intel_hdcp_disable +ffffffff81a6aba0 T intel_hdcp_update_pipe +ffffffff81a6ad10 T intel_hdcp_component_fini +ffffffff81a6ad50 T intel_hdcp_cleanup +ffffffff81a6ae90 T intel_hdcp_atomic_check +ffffffff81a6af20 T intel_hdcp_handle_cp_irq +ffffffff81a6b020 t __delayed_work_tick +ffffffff81a6b040 t hdcp2_authenticate_repeater_topology +ffffffff81a6b300 t transcoder_name +ffffffff81a6b340 t intel_hdcp_get_repeater_ctl +ffffffff81a6b410 t ktime_get_raw +ffffffff81a6b490 t wait_remaining_ms_from_jiffies +ffffffff81a6b520 t intel_hdcp_auth_downstream +ffffffff81a6c6f0 t intel_write_sha_text +ffffffff81a6d000 T hsw_write_infoframe +ffffffff81a6d420 t hsw_dip_data_reg +ffffffff81a6d5e0 T hsw_read_infoframe +ffffffff81a6d6a0 T intel_hdmi_infoframe_enable +ffffffff81a6d740 T intel_hdmi_infoframes_enabled +ffffffff81a6d850 T intel_read_infoframe +ffffffff81a6d9f0 T intel_hdmi_read_gcp_infoframe +ffffffff81a6dae0 T intel_dp_dual_mode_set_tmds_output +ffffffff81a6dba0 T intel_hdmi_tmds_clock +ffffffff81a6dbf0 T intel_hdmi_bpc_possible +ffffffff81a6dd20 T intel_hdmi_limited_color_range +ffffffff81a6dd90 T intel_hdmi_compute_config +ffffffff81a6e3d0 t intel_hdmi_compute_output_format +ffffffff81a6e500 t intel_hdmi_compute_drm_infoframe +ffffffff81a6e5f0 T intel_hdmi_encoder_shutdown +ffffffff81a6e6c0 T intel_hdmi_handle_sink_scrambling +ffffffff81a6e7c0 T intel_infoframe_init +ffffffff81a6e960 t vlv_write_infoframe +ffffffff81a6ecc0 t vlv_read_infoframe +ffffffff81a6ee80 t vlv_set_infoframes +ffffffff81a6f1e0 t vlv_infoframes_enabled +ffffffff81a6f280 t g4x_write_infoframe +ffffffff81a6f520 t g4x_read_infoframe +ffffffff81a6f660 t g4x_set_infoframes +ffffffff81a6f8f0 t g4x_infoframes_enabled +ffffffff81a6f970 t hsw_set_infoframes +ffffffff81a6fc00 t hsw_infoframes_enabled +ffffffff81a6fc90 t ibx_write_infoframe +ffffffff81a6ffa0 t ibx_read_infoframe +ffffffff81a70110 t ibx_set_infoframes +ffffffff81a70460 t ibx_infoframes_enabled +ffffffff81a704f0 t cpt_write_infoframe +ffffffff81a707f0 t cpt_read_infoframe +ffffffff81a70960 t cpt_set_infoframes +ffffffff81a70c40 t cpt_infoframes_enabled +ffffffff81a70cb0 T intel_hdmi_init_connector +ffffffff81a711e0 T intel_hdmi_dsc_get_slice_height +ffffffff81a71240 T intel_hdmi_dsc_get_num_slices +ffffffff81a713c0 T intel_hdmi_dsc_get_bpp +ffffffff81a714a0 t intel_hdmi_compute_clock +ffffffff81a71760 t hdmi_port_clock_valid +ffffffff81a71960 t intel_write_infoframe +ffffffff81a71b30 t gen9bc_tgp_port_to_ddc_pin +ffffffff81a71bd0 t mcc_port_to_ddc_pin +ffffffff81a71c30 t icl_port_to_ddc_pin +ffffffff81a71ce0 t cnp_port_to_ddc_pin +ffffffff81a71d50 t chv_port_to_ddc_pin +ffffffff81a71db0 t g4x_port_to_ddc_pin +ffffffff81a71e10 t intel_hdmi_detect +ffffffff81a71fc0 t intel_hdmi_force +ffffffff81a72070 t intel_hdmi_connector_register +ffffffff81a72080 t intel_hdmi_connector_unregister +ffffffff81a72090 t intel_hdmi_set_edid +ffffffff81a72330 t intel_hdmi_get_modes +ffffffff81a72370 t intel_hdmi_mode_valid +ffffffff81a72510 t intel_hdmi_mode_clock_valid +ffffffff81a726a0 t intel_hdmi_hdcp_write_an_aksv +ffffffff81a727e0 t intel_hdmi_hdcp_read_bksv +ffffffff81a728b0 t intel_hdmi_hdcp_read_bstatus +ffffffff81a72980 t intel_hdmi_hdcp_repeater_present +ffffffff81a72a60 t intel_hdmi_hdcp_read_ri_prime +ffffffff81a72b30 t intel_hdmi_hdcp_read_ksv_ready +ffffffff81a72c10 t intel_hdmi_hdcp_read_ksv_fifo +ffffffff81a72ce0 t intel_hdmi_hdcp_read_v_prime_part +ffffffff81a72dd0 t intel_hdmi_hdcp_toggle_signalling +ffffffff81a73050 t intel_hdmi_hdcp_check_link +ffffffff81a73370 t intel_hdmi_hdcp2_capable +ffffffff81a73430 t intel_hdmi_hdcp2_write_msg +ffffffff81a73520 t intel_hdmi_hdcp2_read_msg +ffffffff81a73920 t intel_hdmi_hdcp2_check_link +ffffffff81a74000 T intel_hpd_pin_default +ffffffff81a74030 T intel_encoder_hotplug +ffffffff81a74160 T intel_hpd_trigger_irq +ffffffff81a741d0 T intel_hpd_irq_handler +ffffffff81a745f0 T intel_hpd_init +ffffffff81a74700 T intel_hpd_poll_enable +ffffffff81a74780 T intel_hpd_poll_disable +ffffffff81a747e0 T intel_hpd_init_work +ffffffff81a748b0 t i915_hotplug_work_func +ffffffff81a74be0 t i915_digport_work_func +ffffffff81a74d60 t i915_hpd_poll_init_work +ffffffff81a74e60 t intel_hpd_irq_storm_reenable_work +ffffffff81a75180 T intel_hpd_cancel_work +ffffffff81a752a0 T intel_hpd_disable +ffffffff81a75330 T intel_hpd_enable +ffffffff81a753a0 t __delayed_work_tick +ffffffff81a76000 T intel_lpe_audio_irq_handler +ffffffff81a76020 T intel_lpe_audio_init +ffffffff81a76050 T intel_lpe_audio_teardown +ffffffff81a76070 T intel_lpe_audio_notify +ffffffff81a77000 T lspcon_detect_hdr_capability +ffffffff81a770b0 T lspcon_write_infoframe +ffffffff81a777f0 T lspcon_read_infoframe +ffffffff81a77830 T lspcon_set_infoframes +ffffffff81a77a90 T lspcon_infoframes_enabled +ffffffff81a77c60 T lspcon_wait_pcon_mode +ffffffff81a77c80 t lspcon_wait_mode +ffffffff81a77f40 T lspcon_init +ffffffff81a78340 T intel_lspcon_infoframes_enabled +ffffffff81a78370 T lspcon_resume +ffffffff81a78610 t lspcon_change_mode +ffffffff81a79000 T intel_lvds_port_enabled +ffffffff81a79080 T intel_get_lvds_encoder +ffffffff81a790e0 T intel_is_dual_link_lvds +ffffffff81a79140 T intel_lvds_init +ffffffff81a79800 t intel_enable_lvds +ffffffff81a79940 t intel_pre_enable_lvds +ffffffff81a79c20 t intel_lvds_compute_config +ffffffff81a79d80 t pch_disable_lvds +ffffffff81a79da0 t pch_post_disable_lvds +ffffffff81a79dc0 t gmch_disable_lvds +ffffffff81a79df0 t intel_lvds_get_hw_state +ffffffff81a79eb0 t intel_lvds_get_config +ffffffff81a79fb0 t intel_lvds_shutdown +ffffffff81a7a050 t compute_is_dual_link_lvds +ffffffff81a7a120 t intel_no_lvds_dmi_callback +ffffffff81a7a170 t intel_disable_lvds +ffffffff81a7a290 t intel_lvds_get_modes +ffffffff81a7a2c0 t intel_lvds_mode_valid +ffffffff81a7a360 t intel_dual_link_lvds_callback +ffffffff81a7b000 T intel_modeset_setup_hw_state +ffffffff81a7d000 T intel_modeset_verify_crtc +ffffffff81a7d3a0 t verify_connector_state +ffffffff81a7d650 T intel_modeset_verify_disabled +ffffffff81a7e000 T intel_opregion_notify_encoder +ffffffff81a7e170 t swsci +ffffffff81a7e4a0 T intel_opregion_notify_adapter +ffffffff81a7e500 T intel_opregion_asle_intr +ffffffff81a7e550 T intel_opregion_setup +ffffffff81a7ed60 t asle_work +ffffffff81a7f1d0 T intel_opregion_get_panel_type +ffffffff81a7f2c0 T intel_opregion_get_edid +ffffffff81a7f3a0 T intel_opregion_headless_sku +ffffffff81a7f3f0 T intel_opregion_register +ffffffff81a7f480 T intel_opregion_resume +ffffffff81a7f510 T intel_opregion_suspend +ffffffff81a7f5b0 T intel_opregion_unregister +ffffffff81a7f730 t intel_no_opregion_vbt_callback +ffffffff81a7f790 t intel_use_opregion_panel_type_callback +ffffffff81a80000 T intel_overlay_reset +ffffffff81a80050 T intel_overlay_switch_off +ffffffff81a80250 t intel_overlay_release_old_vid +ffffffff81a803f0 T intel_overlay_put_image_ioctl +ffffffff81a80700 t update_pfit_vscale_ratio +ffffffff81a807d0 t check_overlay_dst +ffffffff81a808a0 t check_overlay_src +ffffffff81a80af0 t intel_overlay_do_put_image +ffffffff81a81640 T intel_overlay_attrs_ioctl +ffffffff81a81960 t check_gamma +ffffffff81a81b50 T intel_overlay_setup +ffffffff81a81da0 t intel_overlay_last_flip_retire +ffffffff81a81de0 T intel_overlay_cleanup +ffffffff81a81ea0 T intel_overlay_capture_error_state +ffffffff81a81f90 T intel_overlay_print_error_state +ffffffff81a82360 t intel_overlay_release_old_vid_tail +ffffffff81a82430 t intel_overlay_off_tail +ffffffff81a825e0 t intel_overlay_flip_prepare +ffffffff81a83000 T intel_panel_use_ssc +ffffffff81a83060 T intel_panel_preferred_fixed_mode +ffffffff81a830b0 T intel_panel_fixed_mode +ffffffff81a83170 T intel_panel_downclock_mode +ffffffff81a83260 T intel_panel_highest_mode +ffffffff81a832c0 T intel_panel_get_modes +ffffffff81a83350 T intel_panel_drrs_type +ffffffff81a833a0 T intel_panel_compute_config +ffffffff81a83510 T intel_panel_add_edid_fixed_modes +ffffffff81a83a40 T intel_panel_add_vbt_lfp_fixed_mode +ffffffff81a83aa0 t intel_panel_add_fixed_mode +ffffffff81a83c20 T intel_panel_add_vbt_sdvo_fixed_mode +ffffffff81a83c90 T intel_panel_add_encoder_fixed_mode +ffffffff81a83cd0 T intel_panel_fitting +ffffffff81a84330 T intel_panel_detect +ffffffff81a843c0 T intel_panel_mode_valid +ffffffff81a844d0 T intel_panel_init_alloc +ffffffff81a84520 T intel_panel_init +ffffffff81a845e0 T intel_panel_fini +ffffffff81a85000 T intel_has_pch_trancoder +ffffffff81a85060 T intel_crtc_pch_transcoder +ffffffff81a850a0 T intel_pch_transcoder_get_m1_n1 +ffffffff81a850f0 T intel_pch_transcoder_get_m2_n2 +ffffffff81a85140 T ilk_pch_pre_enable +ffffffff81a85170 T ilk_pch_enable +ffffffff81a85710 t ilk_pch_transcoder_set_timings +ffffffff81a85990 T ilk_pch_disable +ffffffff81a859b0 T ilk_pch_post_disable +ffffffff81a85d00 T ilk_pch_get_config +ffffffff81a85ec0 T lpt_pch_enable +ffffffff81a860f0 T lpt_pch_disable +ffffffff81a86200 T lpt_pch_get_config +ffffffff81a862d0 T intel_pch_sanitize +ffffffff81a865b0 t assert_pch_dp_disabled +ffffffff81a866a0 t assert_pch_hdmi_disabled +ffffffff81a87000 T lpt_disable_iclkip +ffffffff81a87070 T lpt_iclkip +ffffffff81a87100 T lpt_program_iclkip +ffffffff81a87390 T lpt_get_iclkip +ffffffff81a874a0 T lpt_disable_clkout_dp +ffffffff81a87580 T intel_init_pch_refclk +ffffffff81a89000 T intel_crtc_initial_plane_config +ffffffff81a8a000 T intel_pps_lock +ffffffff81a8a060 T intel_pps_unlock +ffffffff81a8a0c0 T intel_pps_reset_all +ffffffff81a8a210 T intel_pps_check_power_unlocked +ffffffff81a8a3c0 T intel_pps_wait_power_cycle +ffffffff81a8a460 t wait_panel_power_cycle +ffffffff81a8a5b0 T intel_pps_vdd_on_unlocked +ffffffff81a8a980 T intel_pps_vdd_on +ffffffff81a8aa80 T intel_pps_vdd_off_sync +ffffffff81a8ab50 t intel_pps_vdd_off_sync_unlocked +ffffffff81a8ae20 T intel_pps_vdd_off_unlocked +ffffffff81a8af30 T intel_pps_on_unlocked +ffffffff81a8b210 T intel_pps_on +ffffffff81a8b2b0 T intel_pps_off_unlocked +ffffffff81a8b500 T intel_pps_off +ffffffff81a8b5a0 T intel_pps_backlight_on +ffffffff81a8b790 T intel_pps_backlight_off +ffffffff81a8b980 T intel_pps_backlight_power +ffffffff81a8bb70 T vlv_pps_init +ffffffff81a8bcd0 t vlv_detach_power_sequencer +ffffffff81a8be30 t vlv_steal_power_sequencer +ffffffff81a8bf60 t pps_init_delays +ffffffff81a8c3f0 t pps_init_registers +ffffffff81a8c780 T intel_pps_have_panel_power_or_vdd +ffffffff81a8c8d0 T intel_pps_encoder_reset +ffffffff81a8ca60 t vlv_initial_power_sequencer_setup +ffffffff81a8cd10 t pps_vdd_init +ffffffff81a8ce20 T intel_pps_init +ffffffff81a8cfa0 t edp_panel_vdd_work +ffffffff81a8d050 T intel_pps_init_late +ffffffff81a8d1c0 T intel_pps_unlock_regs_wa +ffffffff81a8d2d0 T intel_pps_setup +ffffffff81a8d340 T assert_pps_unlocked +ffffffff81a8d590 t intel_pps_get_registers +ffffffff81a8dc60 t wait_panel_status +ffffffff81a8df30 t intel_pps_readout_hw_state +ffffffff81a8e0e0 t __delayed_work_tick +ffffffff81a8f000 T intel_psr_irq_handler +ffffffff81a8f650 t transcoder_name +ffffffff81a8f690 T intel_psr_init_dpcd +ffffffff81a8f920 T intel_psr_compute_config +ffffffff81a8fb00 t intel_psr2_config_valid +ffffffff81a8ff60 T intel_psr_get_config +ffffffff81a90100 T intel_psr_disable +ffffffff81a90210 t intel_psr_disable_locked +ffffffff81a906a0 T intel_psr_pause +ffffffff81a90890 t intel_psr_exit +ffffffff81a90b60 T intel_psr_resume +ffffffff81a90bf0 t intel_psr_activate +ffffffff81a913f0 T intel_psr2_disable_plane_sel_fetch +ffffffff81a91460 T intel_psr2_program_plane_sel_fetch +ffffffff81a91630 T intel_psr2_program_trans_man_trk_ctl +ffffffff81a91720 T intel_psr2_sel_fetch_update +ffffffff81a91df0 T intel_psr_pre_plane_update +ffffffff81a91f70 T intel_psr_post_plane_update +ffffffff81a92960 T intel_psr_wait_for_idle_locked +ffffffff81a92b00 T intel_psr_debug_set +ffffffff81a92d30 t psr_irq_control +ffffffff81a92e60 T intel_psr_invalidate +ffffffff81a930c0 T intel_psr_flush +ffffffff81a93550 T intel_psr_init +ffffffff81a93680 t intel_psr_work +ffffffff81a93820 t tgl_dc3co_disable_work +ffffffff81a93870 T intel_psr_short_pulse +ffffffff81a93c30 T intel_psr_enabled +ffffffff81a93cb0 T intel_psr_lock +ffffffff81a93d70 T intel_psr_unlock +ffffffff81a93e30 t _compute_psr2_sdp_prior_scanline_indication +ffffffff81a93ef0 t _compute_psr2_wake_times +ffffffff81a93fe0 t intel_psr2_sel_fetch_config_valid +ffffffff81a940f0 t psr2_granularity_check +ffffffff81a941b0 t tgl_psr2_disable_dc3co +ffffffff81a942e0 t __delayed_work_tick +ffffffff81a95000 T intel_lookup_range_min_qp +ffffffff81a950c0 T intel_lookup_range_max_qp +ffffffff81a96000 T intel_init_quirks +ffffffff81a960f0 T intel_has_quirk +ffffffff81a96130 t quirk_ssc_force_disable +ffffffff81a96160 t quirk_invert_brightness +ffffffff81a96190 t quirk_backlight_present +ffffffff81a961c0 t quirk_increase_t12_delay +ffffffff81a961f0 t quirk_increase_ddi_disabled_time +ffffffff81a96220 t intel_dmi_reverse_brightness +ffffffff81a96270 t intel_dmi_no_pps_backlight +ffffffff81a97000 T intel_sdvo_port_enabled +ffffffff81a970a0 T intel_sdvo_init +ffffffff81a979f0 t intel_sdvo_compute_config +ffffffff81a97db0 t pch_disable_sdvo +ffffffff81a97de0 t pch_post_disable_sdvo +ffffffff81a97df0 t intel_disable_sdvo +ffffffff81a97f60 t intel_sdvo_pre_enable +ffffffff81a988e0 t intel_enable_sdvo +ffffffff81a98ad0 t intel_sdvo_get_hw_state +ffffffff81a98bc0 t intel_sdvo_get_config +ffffffff81a990f0 t intel_sdvo_ddc_proxy_xfer +ffffffff81a991a0 t intel_sdvo_ddc_proxy_func +ffffffff81a991d0 t __intel_sdvo_write_cmd +ffffffff81a99680 t proxy_lock_bus +ffffffff81a996b0 t proxy_trylock_bus +ffffffff81a996e0 t proxy_unlock_bus +ffffffff81a99710 t intel_sdvo_enc_destroy +ffffffff81a99720 t intel_sdvo_set_output_timings_from_mode +ffffffff81a99820 t intel_sdvo_get_preferred_input_mode +ffffffff81a99bb0 t intel_sdvo_get_dtd_from_mode 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vlv_sprite_get_hw_state +ffffffff81aa0380 t vlv_sprite_check +ffffffff81aa0450 t ivb_sprite_update_noarm +ffffffff81aa05b0 t ivb_sprite_update_arm +ffffffff81aa0980 t ivb_sprite_disable_arm +ffffffff81aa0a30 t ivb_sprite_get_hw_state +ffffffff81aa0af0 t g4x_sprite_check +ffffffff81aa0d90 t hsw_sprite_max_stride +ffffffff81aa0de0 t g4x_sprite_max_stride +ffffffff81aa0e50 t ivb_sprite_min_cdclk +ffffffff81aa0f90 t g4x_sprite_update_noarm +ffffffff81aa10f0 t g4x_sprite_update_arm +ffffffff81aa1520 t g4x_sprite_disable_arm +ffffffff81aa15d0 t g4x_sprite_get_hw_state +ffffffff81aa1690 t g4x_sprite_min_cdclk +ffffffff81aa1760 t vlv_sprite_ctl +ffffffff81aa1950 t vlv_sprite_format_mod_supported +ffffffff81aa1a80 t ivb_sprite_ctl +ffffffff81aa1cb0 t g4x_sprite_ctl +ffffffff81aa1e70 t snb_sprite_format_mod_supported +ffffffff81aa1f60 t g4x_sprite_format_mod_supported +ffffffff81aa3000 T intel_tc_port_in_tbt_alt_mode +ffffffff81aa3070 T intel_tc_port_in_dp_alt_mode +ffffffff81aa30e0 T intel_tc_port_in_legacy_mode +ffffffff81aa3150 T intel_tc_cold_requires_aux_pw +ffffffff81aa31a0 T intel_tc_port_get_lane_mask +ffffffff81aa3300 T intel_tc_port_get_pin_assignment_mask +ffffffff81aa3460 T intel_tc_port_fia_max_lane_count +ffffffff81aa35a0 T intel_tc_port_set_fia_lane_count +ffffffff81aa37a0 T intel_tc_port_init_mode +ffffffff81aa3bf0 t intel_tc_port_update_mode +ffffffff81aa40f0 T intel_tc_port_sanitize_mode +ffffffff81aa44a0 T intel_tc_port_connected +ffffffff81aa4590 T intel_tc_port_lock +ffffffff81aa45b0 t tc_port_live_status_mask +ffffffff81aa4870 T intel_tc_port_unlock +ffffffff81aa48f0 t __intel_tc_port_lock +ffffffff81aa4af0 T intel_tc_port_flush_work +ffffffff81aa4b10 T intel_tc_port_ref_held +ffffffff81aa4b60 T intel_tc_port_get_link +ffffffff81aa4be0 T intel_tc_port_put_link +ffffffff81aa4c70 T intel_tc_port_init +ffffffff81aa4ef0 t intel_tc_port_disconnect_phy_work +ffffffff81aa4f40 t tc_phy_status_complete +ffffffff81aa5050 t tc_phy_take_ownership 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skl_format_to_fourcc +ffffffff81ab0180 T icl_is_nv12_y_plane +ffffffff81ab01f0 T icl_is_hdr_plane +ffffffff81ab0230 T skl_calc_main_surface_offset +ffffffff81ab0470 T skl_universal_plane_create +ffffffff81ab0b40 t icl_plane_min_width +ffffffff81ab0cd0 t icl_hdr_plane_max_width +ffffffff81ab0d20 t icl_sdr_plane_max_width +ffffffff81ab0d50 t icl_plane_max_height +ffffffff81ab0d80 t icl_plane_min_cdclk +ffffffff81ab0dc0 t glk_plane_max_width +ffffffff81ab0e70 t skl_plane_max_height +ffffffff81ab0ea0 t glk_plane_min_cdclk +ffffffff81ab0f10 t skl_plane_max_width +ffffffff81ab0fe0 t skl_plane_min_cdclk +ffffffff81ab1050 t skl_plane_max_stride +ffffffff81ab10f0 t icl_plane_update_noarm +ffffffff81ab19a0 t icl_plane_update_arm +ffffffff81ab1b10 t icl_plane_disable_arm +ffffffff81ab1c20 t skl_plane_update_noarm +ffffffff81ab1dc0 t skl_plane_update_arm +ffffffff81ab20d0 t skl_plane_disable_arm +ffffffff81ab2180 t skl_plane_get_hw_state +ffffffff81ab2250 t skl_plane_check +ffffffff81ab2e70 t skl_plane_async_flip +ffffffff81ab2fa0 t skl_plane_enable_flip_done +ffffffff81ab3000 t skl_plane_disable_flip_done +ffffffff81ab3060 T skl_get_initial_plane_config +ffffffff81ab3780 t skl_plane_aux_dist +ffffffff81ab3870 t skl_surf_address +ffffffff81ab3990 t skl_plane_check_nv12_rotation +ffffffff81ab3a30 t skl_plane_ctl +ffffffff81ab40a0 t glk_plane_color_ctl +ffffffff81ab41e0 t skl_check_main_ccs_coordinates +ffffffff81ab4370 t gen12_plane_format_mod_supported +ffffffff81ab45c0 t skl_plane_format_mod_supported +ffffffff81ab5000 T intel_enabled_dbuf_slices_mask +ffffffff81ab5130 T intel_sagv_pre_plane_update +ffffffff81ab52c0 T intel_sagv_post_plane_update +ffffffff81ab5530 T intel_can_enable_sagv +ffffffff81ab55a0 T skl_ddb_dbuf_slice_mask +ffffffff81ab5650 T skl_write_plane_wm +ffffffff81ab5a70 T skl_write_cursor_wm +ffffffff81ab5dd0 T skl_ddb_allocation_overlaps +ffffffff81ab5e70 T skl_wm_get_hw_state +ffffffff81ab6430 t skl_pipe_wm_get_hw_state +ffffffff81ab6780 t skl_compute_dbuf_slices +ffffffff81ab6c80 T skl_wm_sanitize +ffffffff81ab6ee0 T intel_wm_state_verify +ffffffff81ab7790 T skl_watermark_ipc_enabled +ffffffff81ab77c0 T skl_watermark_ipc_update +ffffffff81ab7870 T skl_watermark_ipc_init +ffffffff81ab7970 T skl_wm_init +ffffffff81ab8070 T intel_atomic_get_dbuf_state +ffffffff81ab8090 T intel_dbuf_init +ffffffff81ab8100 T intel_dbuf_pre_plane_update +ffffffff81ab83e0 T intel_dbuf_post_plane_update +ffffffff81ab84b0 T intel_mbus_dbox_update +ffffffff81ab8720 T skl_watermark_ipc_debugfs_register +ffffffff81ab8750 t skl_sagv_disable +ffffffff81ab8870 t skl_ddb_entry_for_slices +ffffffff81ab89b0 t skl_compute_wm +ffffffff81abb7e0 t skl_build_plane_wm_single +ffffffff81abbaf0 t skl_compute_wm_params +ffffffff81abbee0 t skl_compute_plane_wm +ffffffff81abc3b0 t intel_dbuf_duplicate_state +ffffffff81abc440 t intel_dbuf_destroy_state +ffffffff81abd000 T pixel_format_from_register_bits +ffffffff81abd060 T vlv_dsi_wait_for_fifo_empty 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i915_gem_object_set_to_cpu_domain +ffffffff81acef80 T i915_gem_set_domain_ioctl +ffffffff81acf170 T i915_gem_object_prepare_read +ffffffff81acf2c0 T i915_gem_object_prepare_write +ffffffff81ad0000 T i915_gem_execbuffer2_ioctl +ffffffff81ad0b80 t eb_select_context +ffffffff81ad0c00 t eb_select_engine +ffffffff81ad1000 t eb_lookup_vmas +ffffffff81ad1710 t eb_release_vmas +ffffffff81ad19d0 t eb_relocate_parse +ffffffff81ad1af0 t eb_capture_stage +ffffffff81ad1c30 t eb_requests_create +ffffffff81ad2010 t eb_submit +ffffffff81ad2460 t eb_requests_get +ffffffff81ad24d0 t eb_requests_add +ffffffff81ad2660 t signal_fence_array +ffffffff81ad2710 t eb_requests_put +ffffffff81ad2780 t eb_put_engine +ffffffff81ad2890 t parse_timeline_fences +ffffffff81ad2c80 t eb_pin_engine +ffffffff81ad2f50 t eb_validate_vmas +ffffffff81ad37e0 t eb_relocate_vma +ffffffff81ad3a20 t eb_parse +ffffffff81ad3db0 t eb_relocate_parse_slow +ffffffff81ad4480 t eb_pin_timeline +ffffffff81ad4650 t i915_gem_object_lock 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i915_gem_object_has_iomem +ffffffff81ada910 T i915_gem_object_evictable +ffffffff81ada9c0 T i915_gem_object_migratable +ffffffff81adaa00 T i915_gem_object_can_migrate +ffffffff81adab70 T i915_gem_object_migrate +ffffffff81adac10 T __i915_gem_object_migrate +ffffffff81adacb0 T i915_gem_object_placement_possible +ffffffff81adad40 T i915_gem_object_needs_ccs_pages +ffffffff81adade0 T i915_gem_init__objects +ffffffff81adae10 t __i915_gem_free_work +ffffffff81adae60 T i915_objects_module_exit +ffffffff81adae80 T i915_objects_module_init +ffffffff81adaee0 T i915_gem_object_get_moving_fence +ffffffff81adaf00 T i915_gem_object_wait_moving_fence +ffffffff81adaf80 T i915_gem_object_has_unknown_state +ffffffff81adafb0 t i915_gem_free_object +ffffffff81adb040 t i915_gem_close_object +ffffffff81adc000 T __i915_gem_object_set_pages +ffffffff81adc2f0 T ____i915_gem_object_get_pages +ffffffff81adc360 T __i915_gem_object_get_pages +ffffffff81adc3c0 T i915_gem_object_pin_pages_unlocked +ffffffff81adc4e0 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gen5_gt_enable_irq +ffffffff81b180f0 T gen5_gt_disable_irq +ffffffff81b18130 T gen5_gt_irq_reset +ffffffff81b181c0 T gen5_gt_irq_postinstall +ffffffff81b19000 T intel_gt_mcr_init +ffffffff81b191f0 T intel_gt_mcr_read +ffffffff81b19210 t rw_with_mcr_steering +ffffffff81b193a0 T intel_gt_mcr_unicast_write +ffffffff81b193d0 T intel_gt_mcr_multicast_write +ffffffff81b19400 T intel_gt_mcr_multicast_write_fw +ffffffff81b19450 T intel_gt_mcr_get_nonterminated_steering +ffffffff81b19580 T intel_gt_mcr_read_any_fw +ffffffff81b19760 T intel_gt_mcr_read_any +ffffffff81b19860 T intel_gt_mcr_report_steering +ffffffff81b19ac0 T intel_gt_mcr_get_ss_steering +ffffffff81b1a000 T intel_gt_pm_init_early +ffffffff81b1a070 T intel_gt_pm_init +ffffffff81b1a0b0 T intel_gt_pm_fini +ffffffff81b1a0d0 T intel_gt_resume +ffffffff81b1a3a0 t gt_sanitize +ffffffff81b1a540 t intel_gt_pm_get +ffffffff81b1a5b0 t intel_gt_pm_put +ffffffff81b1a620 T intel_gt_suspend_prepare +ffffffff81b1a720 T intel_gt_suspend_late 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intel_gt_sysfs_register +ffffffff81b1e030 T intel_gt_sysfs_unregister +ffffffff81b1f000 T intel_gt_sysfs_pm_init +ffffffff81b20000 T intel_vm_no_concurrent_access_wa +ffffffff81b20050 T alloc_pt_lmem +ffffffff81b200c0 T alloc_pt_dma +ffffffff81b20130 T map_pt_dma +ffffffff81b20190 T map_pt_dma_locked +ffffffff81b201f0 T i915_vm_lock_objects +ffffffff81b20230 t i915_gem_object_lock +ffffffff81b20440 T i915_address_space_fini +ffffffff81b20460 T i915_vm_resv_release +ffffffff81b204a0 T i915_vm_release +ffffffff81b204d0 T i915_address_space_init +ffffffff81b20670 t __i915_vm_release +ffffffff81b20740 T __px_vaddr +ffffffff81b20780 T __px_dma +ffffffff81b207c0 T __px_page +ffffffff81b20800 T fill_page_dma +ffffffff81b208c0 T setup_scratch_page +ffffffff81b20ae0 T free_scratch +ffffffff81b20b70 T gtt_write_workarounds +ffffffff81b20d20 T setup_private_pat +ffffffff81b20fc0 T __vm_create_scratch_for_read +ffffffff81b21070 T __vm_create_scratch_for_read_pinned +ffffffff81b211e0 t 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intel_migrate_create_context +ffffffff81b26510 T intel_context_migrate_copy +ffffffff81b26e00 t emit_pte +ffffffff81b271b0 t emit_copy_ccs +ffffffff81b27300 T intel_context_migrate_clear +ffffffff81b27830 T intel_migrate_copy +ffffffff81b279f0 T intel_migrate_clear +ffffffff81b27b80 T intel_migrate_fini +ffffffff81b27bc0 t xehpsdv_insert_pte +ffffffff81b27c30 t xehpsdv_toggle_pdes +ffffffff81b27c90 t insert_pte +ffffffff81b28000 T intel_mocs_init_engine +ffffffff81b28200 t get_mocs_settings +ffffffff81b284b0 T intel_set_mocs_index +ffffffff81b28520 T intel_mocs_init +ffffffff81b29000 T alloc_pt +ffffffff81b290b0 T __alloc_pd +ffffffff81b29160 T alloc_pd +ffffffff81b29230 T free_px +ffffffff81b29290 T __set_pd_entry +ffffffff81b29300 T clear_pd_entry +ffffffff81b29380 T release_pd_entry +ffffffff81b29450 T i915_ppgtt_init_hw +ffffffff81b294c0 T i915_ppgtt_create +ffffffff81b294f0 T ppgtt_bind_vma +ffffffff81b29590 T ppgtt_unbind_vma +ffffffff81b29610 T i915_vm_alloc_pt_stash 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intel_reset_guc +ffffffff81b2e540 T intel_gt_set_wedged +ffffffff81b2e5d0 t __intel_gt_set_wedged +ffffffff81b2e7f0 T intel_gt_unset_wedged +ffffffff81b2e850 t __intel_gt_unset_wedged +ffffffff81b2ea30 T intel_gt_reset +ffffffff81b2f020 t reset_finish +ffffffff81b2f100 T __intel_engine_reset_bh +ffffffff81b2f360 T intel_engine_reset +ffffffff81b2f370 T intel_gt_handle_error +ffffffff81b2f820 T intel_gt_reset_trylock +ffffffff81b2f960 T intel_gt_reset_unlock +ffffffff81b2f990 T intel_gt_terminally_wedged +ffffffff81b2fae0 T intel_gt_set_wedged_on_init +ffffffff81b2fb60 T intel_gt_set_wedged_on_fini +ffffffff81b2fbe0 T intel_gt_init_reset +ffffffff81b2fc70 T intel_gt_fini_reset +ffffffff81b2fca0 T __intel_init_wedge +ffffffff81b2fd20 t intel_wedge_me +ffffffff81b2fdf0 T __intel_fini_wedge +ffffffff81b2fe60 t gen8_reset_engines +ffffffff81b30100 t gen6_reset_engines +ffffffff81b30170 t ilk_do_reset +ffffffff81b30240 t g4x_do_reset +ffffffff81b304d0 t g33_do_reset +ffffffff81b30610 t i915_do_reset +ffffffff81b30880 t __gen11_reset_engines +ffffffff81b30cf0 t __gen6_reset_engines +ffffffff81b30e20 t nop_submit_request +ffffffff81b30e90 t __delayed_work_tick +ffffffff81b31000 T intel_ring_update_space +ffffffff81b31040 T __intel_ring_pin +ffffffff81b31070 T intel_ring_pin +ffffffff81b311d0 T intel_ring_reset +ffffffff81b31210 T intel_ring_unpin +ffffffff81b312b0 T intel_engine_create_ring +ffffffff81b31440 T intel_ring_free +ffffffff81b31490 T intel_ring_begin +ffffffff81b31610 t wait_for_space +ffffffff81b31710 T intel_ring_cacheline_align +ffffffff81b32000 T intel_ring_submission_setup +ffffffff81b326f0 t i915_gem_object_lock +ffffffff81b32900 t ring_release +ffffffff81b32a50 t xcs_resume +ffffffff81b33030 t xcs_sanitize +ffffffff81b330a0 t reset_prepare +ffffffff81b331d0 t reset_rewind +ffffffff81b33280 t reset_cancel +ffffffff81b33310 t reset_finish +ffffffff81b33340 t add_to_engine +ffffffff81b333c0 t remove_from_engine +ffffffff81b33450 t ring_request_alloc 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intel_sseu_subslice_total +ffffffff81b3c1c0 T intel_sseu_get_hsw_subslices +ffffffff81b3c270 T intel_sseu_copy_eumask_to_user +ffffffff81b3c5c0 T intel_sseu_copy_ssmask_to_user +ffffffff81b3c740 T intel_sseu_info_init +ffffffff81b3d6b0 t cherryview_sseu_info_init +ffffffff81b3d8d0 t hsw_sseu_info_init +ffffffff81b3dba0 T intel_sseu_make_rpcs +ffffffff81b3dd50 T intel_sseu_dump +ffffffff81b3df50 T intel_sseu_print_topology +ffffffff81b3e210 T intel_sseu_print_ss_info +ffffffff81b3e270 T intel_slicemask_from_xehp_dssmask +ffffffff81b3e2c0 t gen11_compute_sseu_info +ffffffff81b3f000 T intel_sseu_status +ffffffff81b3f840 T intel_sseu_debugfs_register +ffffffff81b40000 T intel_gt_init_timelines +ffffffff81b40060 T __intel_timeline_create +ffffffff81b40220 T intel_timeline_create_from_engine +ffffffff81b402e0 T __intel_timeline_pin +ffffffff81b40310 T intel_timeline_pin +ffffffff81b40430 T intel_timeline_reset_seqno +ffffffff81b40460 T intel_timeline_enter +ffffffff81b40540 T intel_timeline_exit +ffffffff81b40610 T intel_timeline_get_seqno +ffffffff81b40670 t __intel_timeline_get_seqno +ffffffff81b40710 T intel_timeline_read_hwsp +ffffffff81b407e0 T intel_timeline_unpin +ffffffff81b40830 T __intel_timeline_free +ffffffff81b408c0 T intel_gt_fini_timelines +ffffffff81b408f0 T intel_gt_show_timelines +ffffffff81b40c80 t __timeline_active +ffffffff81b40cc0 t __timeline_retire +ffffffff81b41000 T intel_engine_init_ctx_wa +ffffffff81b41b00 T intel_engine_emit_ctx_wa +ffffffff81b41c20 T intel_gt_init_workarounds +ffffffff81b42e40 T intel_gt_apply_workarounds +ffffffff81b42e60 t wa_list_apply +ffffffff81b42fa0 T intel_gt_verify_workarounds +ffffffff81b43110 T intel_engine_init_whitelist +ffffffff81b435c0 t tgl_whitelist_build +ffffffff81b436b0 t icl_whitelist_build +ffffffff81b43850 t cml_whitelist_build +ffffffff81b438b0 t cfl_whitelist_build +ffffffff81b439b0 t glk_whitelist_build +ffffffff81b43ab0 t kbl_whitelist_build +ffffffff81b43bb0 t bxt_whitelist_build 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gen9_reset_guc_interrupts +ffffffff81b49480 t gen9_enable_guc_interrupts +ffffffff81b495a0 t gen9_disable_guc_interrupts +ffffffff81b49680 T intel_guc_init_late +ffffffff81b49690 T intel_guc_write_params +ffffffff81b498a0 T intel_guc_dump_time_info +ffffffff81b499d0 T intel_guc_init +ffffffff81b49b40 t guc_init_params +ffffffff81b4a0d0 T intel_guc_fini +ffffffff81b4a190 T intel_guc_send_mmio +ffffffff81b4a650 T intel_guc_to_host_process_recv_msg +ffffffff81b4a730 T intel_guc_auth_huc +ffffffff81b4a790 T intel_guc_suspend +ffffffff81b4a850 T intel_guc_resume +ffffffff81b4a880 T intel_guc_allocate_vma +ffffffff81b4a970 T intel_guc_allocate_and_map_vma +ffffffff81b4aa10 T intel_guc_self_cfg32 +ffffffff81b4aaf0 T intel_guc_self_cfg64 +ffffffff81b4abd0 T intel_guc_load_status +ffffffff81b4ad50 T intel_guc_write_barrier +ffffffff81b4b000 T intel_guc_ads_print_policy_info +ffffffff81b4b020 T intel_guc_global_policies_update +ffffffff81b4b070 T intel_guc_ads_create +ffffffff81b4b640 T intel_guc_ads_init_late +ffffffff81b4b690 T intel_guc_ads_destroy +ffffffff81b4b6f0 T intel_guc_ads_reset +ffffffff81b4b760 T intel_guc_engine_usage_offset +ffffffff81b4b7a0 T intel_guc_engine_usage_record_map +ffffffff81b4c000 T intel_guc_capture_getlistsize +ffffffff81b4c020 t guc_capture_getlistsize +ffffffff81b4c230 T intel_guc_capture_getlist +ffffffff81b4d0f0 t guc_cap_list_num_regs +ffffffff81b4d200 T intel_guc_capture_getnullheader +ffffffff81b4d2b0 T intel_guc_capture_print_engine_node +ffffffff81b4d7c0 T intel_guc_capture_free_node +ffffffff81b4d840 T intel_guc_capture_get_matching_node +ffffffff81b4d9a0 t guc_capture_find_ecode +ffffffff81b4da20 T intel_guc_capture_process +ffffffff81b4e980 T intel_guc_capture_destroy +ffffffff81b4ece0 T intel_guc_capture_init +ffffffff81b4f450 t guc_capture_log_get_register +ffffffff81b4f7f0 t guc_capture_alloc_steered_lists_xe_hpg +ffffffff81b50000 T intel_guc_ct_init_early +ffffffff81b50120 t ct_incoming_request_worker_func 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intel_gpu_error_find_batch +ffffffff81b7d070 T i915_error_printf +ffffffff81b7d130 T intel_gpu_error_print_vma +ffffffff81b7d160 T i915_gpu_coredump_copy_to_buffer +ffffffff81b7d1b0 T __i915_gpu_coredump_free +ffffffff81b7d340 T intel_engine_coredump_alloc +ffffffff81b7db70 T intel_engine_coredump_add_request +ffffffff81b7dde0 t capture_vma +ffffffff81b7deb0 T intel_engine_coredump_add_vma +ffffffff81b7dfd0 T i915_gpu_coredump_alloc +ffffffff81b7e230 T intel_gt_coredump_alloc +ffffffff81b7ea70 T i915_vma_capture_prepare +ffffffff81b7eb20 T i915_vma_capture_finish +ffffffff81b7eb80 T i915_gpu_coredump +ffffffff81b7f350 T i915_error_state_store +ffffffff81b7f3b0 T i915_capture_error_state +ffffffff81b7f470 T i915_first_error_state +ffffffff81b7f4e0 T i915_reset_error_state +ffffffff81b7f580 T i915_disable_error_state +ffffffff81b80000 T i915_reg_read_ioctl +ffffffff81b81000 T gen3_irq_reset +ffffffff81b810d0 T gen2_irq_reset +ffffffff81b811a0 T gen3_irq_init +ffffffff81b812e0 T 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i915_oa_config_release +ffffffff81b96060 T i915_perf_get_oa_config +ffffffff81b960c0 T i915_oa_init_reg_state +ffffffff81b961b0 T i915_perf_open_ioctl +ffffffff81b966e0 T i915_perf_register +ffffffff81b96710 T i915_perf_unregister +ffffffff81b96780 T i915_perf_add_config_ioctl +ffffffff81b967d0 T i915_perf_remove_config_ioctl +ffffffff81b96840 T i915_perf_init +ffffffff81b96bc0 t gen7_is_valid_b_counter_addr +ffffffff81b96c10 t hsw_is_valid_mux_addr +ffffffff81b96c90 t hsw_enable_metric_set +ffffffff81b96d70 t hsw_disable_metric_set +ffffffff81b96e80 t gen7_oa_enable +ffffffff81b96fe0 t gen7_oa_disable +ffffffff81b970a0 t gen7_oa_read +ffffffff81b975c0 t gen7_oa_hw_tail_read +ffffffff81b97610 t gen8_oa_read +ffffffff81b97c60 t gen8_is_valid_mux_addr +ffffffff81b97ce0 t gen8_is_valid_flex_addr +ffffffff81b97d60 t chv_is_valid_mux_addr +ffffffff81b97de0 t gen8_oa_enable +ffffffff81b97f20 t gen8_oa_disable +ffffffff81b97fe0 t gen8_enable_metric_set +ffffffff81b980a0 t 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i915_sched_node_fini +ffffffff81ba09e0 T i915_request_show_with_schedule +ffffffff81ba0ad0 T i915_sched_engine_create +ffffffff81ba0b80 t default_destroy +ffffffff81ba0bd0 t default_disabled +ffffffff81ba0c00 T i915_scheduler_module_exit +ffffffff81ba0c30 T i915_scheduler_module_init +ffffffff81ba1000 T i915_save_display +ffffffff81ba1360 T i915_restore_display +ffffffff81ba2000 T i915_sw_fence_complete +ffffffff81ba2040 t __i915_sw_fence_complete +ffffffff81ba21c0 T i915_sw_fence_await +ffffffff81ba2240 T __i915_sw_fence_init +ffffffff81ba22b0 T i915_sw_fence_reinit +ffffffff81ba22f0 T i915_sw_fence_commit +ffffffff81ba2330 T i915_sw_fence_await_sw_fence +ffffffff81ba2350 t __i915_sw_fence_await_sw_fence +ffffffff81ba2570 T i915_sw_fence_await_sw_fence_gfp +ffffffff81ba2590 T i915_sw_fence_await_dma_fence +ffffffff81ba27c0 t dma_i915_sw_fence_wake +ffffffff81ba2840 t irq_i915_sw_fence_work +ffffffff81ba2880 t timer_i915_sw_fence_wake +ffffffff81ba2960 t dma_i915_sw_fence_wake_timer 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i915_ttm_buddy_man_visible_size +ffffffff81ba7500 T i915_ttm_buddy_man_avail +ffffffff81ba7560 t i915_ttm_buddy_man_alloc +ffffffff81ba7880 t i915_ttm_buddy_man_free +ffffffff81ba78f0 t i915_ttm_buddy_man_intersects +ffffffff81ba79a0 t i915_ttm_buddy_man_compatible +ffffffff81ba7a50 t i915_ttm_buddy_man_debug +ffffffff81ba8000 T i915_user_extensions +ffffffff81ba9000 T __i915_printk +ffffffff81ba90e0 T add_taint_for_CI +ffffffff81ba9110 T cancel_timer +ffffffff81ba9160 T set_timer_ms +ffffffff81ba9210 T i915_vtd_active +ffffffff81baa000 T intel_vgpu_detect +ffffffff81baa030 T intel_vgpu_register +ffffffff81baa090 T intel_vgpu_active +ffffffff81baa0c0 T intel_vgpu_has_full_ppgtt +ffffffff81baa100 T intel_vgpu_has_hwsp_emulation +ffffffff81baa140 T intel_vgpu_has_huge_gtt +ffffffff81baa180 T intel_vgt_deballoon +ffffffff81baa3c0 T intel_vgt_balloon +ffffffff81bab000 T i915_vma_instance +ffffffff81bab110 t vma_create +ffffffff81bab5a0 T i915_vma_work +ffffffff81bab610 T i915_vma_wait_for_bind +ffffffff81bab690 T i915_vma_bind +ffffffff81bab9e0 T i915_vma_pin_iomap +ffffffff81babbb0 T i915_vma_flush_writes +ffffffff81babc00 T i915_vma_unpin_iomap +ffffffff81babc70 T i915_vma_unpin_and_release +ffffffff81babce0 T i915_vma_misplaced +ffffffff81babd80 T __i915_vma_set_map_and_fenceable +ffffffff81babdf0 T i915_gem_valid_gtt_space +ffffffff81babe80 T vma_invalidate_tlb +ffffffff81babec0 T i915_vma_pin_ww +ffffffff81bac590 t i915_vma_insert +ffffffff81bac8f0 T i915_ggtt_pin +ffffffff81bac9d0 t __i915_ggtt_pin +ffffffff81bacb40 t i915_gem_object_lock +ffffffff81bacd50 T i915_vma_close +ffffffff81bace20 T i915_vma_reopen +ffffffff81bacea0 T i915_vma_destroy_locked +ffffffff81bacf90 t release_references +ffffffff81bad0c0 T i915_vma_destroy +ffffffff81bad200 T i915_vma_parked +ffffffff81bad4d0 T i915_vma_revoke_mmap +ffffffff81bad5d0 T _i915_vma_move_to_active +ffffffff81bad800 T __i915_vma_evict +ffffffff81badb50 T __i915_vma_unbind +ffffffff81badbf0 T i915_vma_unbind +ffffffff81badd40 T i915_vma_unbind_async +ffffffff81badeb0 t __i915_vma_unbind_async +ffffffff81badf70 T i915_vma_unbind_unlocked +ffffffff81bae080 T i915_vma_make_unshrinkable +ffffffff81bae0c0 T i915_vma_make_shrinkable +ffffffff81bae0e0 T i915_vma_make_purgeable +ffffffff81bae100 T i915_vma_module_exit +ffffffff81bae120 T i915_vma_module_init +ffffffff81bae180 t __i915_vma_active +ffffffff81bae1d0 t __i915_vma_retire +ffffffff81bae220 t __vma_bind +ffffffff81bae2c0 t __vma_release +ffffffff81bae340 t intel_rotate_pages +ffffffff81bae6a0 t intel_remap_pages +ffffffff81bae9e0 t intel_partial_pages +ffffffff81baeaa0 t remap_contiguous_pages +ffffffff81baf000 T i915_vma_resource_alloc +ffffffff81baf050 T i915_vma_resource_free +ffffffff81baf090 T i915_vma_resource_unhold +ffffffff81baf0a0 t __i915_vma_resource_unhold +ffffffff81baf190 T i915_vma_resource_hold +ffffffff81baf1e0 T i915_vma_resource_unbind +ffffffff81baf300 T __i915_vma_resource_init +ffffffff81baf360 t i915_vma_resource_fence_notify +ffffffff81baf420 T i915_vma_resource_bind_dep_sync +ffffffff81baf5a0 T i915_vma_resource_bind_dep_sync_all +ffffffff81baf640 T i915_vma_resource_bind_dep_await +ffffffff81baf7e0 T i915_vma_resource_module_exit +ffffffff81baf800 T i915_vma_resource_module_init +ffffffff81baf860 t get_driver_name +ffffffff81baf890 t get_timeline_name +ffffffff81baf8c0 t unbind_fence_release +ffffffff81baf900 t i915_vma_resource_unbind_work +ffffffff81bb0000 T intel_platform_name +ffffffff81bb0090 T intel_device_info_print +ffffffff81bb0d30 T intel_device_info_subplatform_init +ffffffff81bb10e0 T intel_device_info_runtime_init +ffffffff81bb17d0 T intel_driver_caps_print +ffffffff81bb2000 T intel_dram_detect +ffffffff81bb21b0 t gen11_get_dram_info +ffffffff81bb2200 t bxt_get_dram_info +ffffffff81bb2510 t skl_get_dram_info +ffffffff81bb26f0 T intel_dram_edram_detect +ffffffff81bb2780 t icl_pcode_read_mem_global_info +ffffffff81bb2860 t skl_dram_get_channel_info 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gen12lp_init_clock_gating +ffffffff81bba540 t dg1_init_clock_gating +ffffffff81bba630 t icl_init_clock_gating +ffffffff81bba6f0 t cfl_init_clock_gating +ffffffff81bba810 t gen9_init_clock_gating +ffffffff81bba920 t skl_init_clock_gating +ffffffff81bbaa60 t kbl_init_clock_gating +ffffffff81bbac70 t bxt_init_clock_gating +ffffffff81bbadd0 t glk_init_clock_gating +ffffffff81bbae30 t bdw_init_clock_gating +ffffffff81bbb280 t chv_init_clock_gating +ffffffff81bbb430 t hsw_init_clock_gating +ffffffff81bbb580 t ivb_init_clock_gating +ffffffff81bbb790 t g4x_disable_trickle_feed +ffffffff81bbb8f0 t cpt_init_clock_gating +ffffffff81bbbc30 t vlv_init_clock_gating +ffffffff81bbbd40 t gen6_init_clock_gating +ffffffff81bbbf40 t ilk_init_clock_gating +ffffffff81bbc110 t g4x_init_clock_gating +ffffffff81bbc1d0 t i965gm_init_clock_gating +ffffffff81bbc2a0 t i965g_init_clock_gating +ffffffff81bbc320 t gen3_init_clock_gating +ffffffff81bbc420 t i85x_init_clock_gating +ffffffff81bbc4c0 t i830_init_clock_gating +ffffffff81bbc4f0 t nop_init_clock_gating +ffffffff81bbc520 t ilk_compute_pipe_wm +ffffffff81bbc8c0 t ilk_compute_intermediate_wm +ffffffff81bbcb10 t ilk_initial_watermarks +ffffffff81bbcb90 t ilk_optimize_watermarks +ffffffff81bbcc40 t ilk_compute_wm_level +ffffffff81bbd1b0 t ilk_validate_wm_level +ffffffff81bbd2f0 t ilk_compute_wm_maximums +ffffffff81bbd520 t ilk_program_watermarks +ffffffff81bbe210 t ilk_wm_merge +ffffffff81bbe490 t vlv_compute_pipe_wm +ffffffff81bbf280 t vlv_compute_intermediate_wm +ffffffff81bbf5a0 t vlv_initial_watermarks +ffffffff81bbf620 t vlv_atomic_update_fifo +ffffffff81bbf920 t vlv_optimize_watermarks +ffffffff81bbf9e0 t g4x_compute_pipe_wm +ffffffff81bc0690 t g4x_compute_intermediate_wm +ffffffff81bc0af0 t g4x_initial_watermarks +ffffffff81bc0b90 t g4x_optimize_watermarks +ffffffff81bc0c70 t pnv_update_wm +ffffffff81bc1330 t i965_update_wm +ffffffff81bc16f0 t i9xx_update_wm +ffffffff81bc1e80 t i845_update_wm +ffffffff81bc3000 T intel_region_ttm_device_init +ffffffff81bc3070 T intel_region_ttm_device_fini +ffffffff81bc3090 T intel_region_to_ttm_type +ffffffff81bc30d0 T intel_region_ttm_init +ffffffff81bc3170 T intel_region_ttm_fini +ffffffff81bc33d0 T intel_region_ttm_resource_to_rsgt +ffffffff81bc3410 T intel_region_ttm_resource_free +ffffffff81bc4000 T intel_runtime_pm_get_raw +ffffffff81bc4090 T intel_runtime_pm_get +ffffffff81bc4140 T intel_runtime_pm_get_if_in_use +ffffffff81bc41f0 T intel_runtime_pm_get_if_active +ffffffff81bc42a0 T intel_runtime_pm_get_noresume +ffffffff81bc43d0 T intel_runtime_pm_put_raw +ffffffff81bc4460 T intel_runtime_pm_put_unchecked +ffffffff81bc4520 T intel_runtime_pm_enable +ffffffff81bc4550 T intel_runtime_pm_disable +ffffffff81bc4580 T intel_runtime_pm_driver_release +ffffffff81bc4610 T intel_runtime_pm_init_early +ffffffff81bc5000 T intel_sbi_read +ffffffff81bc5050 t intel_sbi_rw +ffffffff81bc5240 T intel_sbi_write +ffffffff81bc6000 T intel_step_init +ffffffff81bc63f0 T intel_step_name +ffffffff81bc6430 t pvc_step_lookup +ffffffff81bc7000 T gen3_stolen_base +ffffffff81bc7050 T gen11_stolen_base +ffffffff81bc70d0 T i830_stolen_size +ffffffff81bc7150 T gen3_stolen_size +ffffffff81bc71c0 T gen6_stolen_size +ffffffff81bc7210 T chv_stolen_size +ffffffff81bc7280 T gen8_stolen_size +ffffffff81bc72e0 T gen9_stolen_size +ffffffff81bc7360 T intel_init_stolen_res +ffffffff81bc8000 T intel_uncore_mmio_debug_init_early +ffffffff81bc8060 T intel_uncore_forcewake_domain_to_str +ffffffff81bc80d0 T intel_uncore_fw_release_timer +ffffffff81bc81f0 T intel_uncore_suspend +ffffffff81bc8240 t intel_uncore_forcewake_reset +ffffffff81bc8510 T intel_uncore_resume_early +ffffffff81bc8640 T intel_uncore_unclaimed_mmio +ffffffff81bc86b0 T intel_uncore_runtime_resume +ffffffff81bc86e0 T intel_uncore_forcewake_get +ffffffff81bc8850 T intel_uncore_forcewake_user_get +ffffffff81bc8970 T intel_uncore_forcewake_get__locked +ffffffff81bc8a40 T intel_uncore_forcewake_user_put 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atom_execute_table +ffffffff81bd4460 T atom_parse +ffffffff81bd4610 T atom_destroy +ffffffff81bd4650 T atom_asic_init +ffffffff81bd4860 t get_u32 +ffffffff81bd48c0 T atom_parse_data_header +ffffffff81bd4960 T atom_parse_cmd_header +ffffffff81bd49e0 T atom_allocate_fb_scratch +ffffffff81bd4ab0 t atom_op_move +ffffffff81bd4c80 t atom_op_and +ffffffff81bd4e60 t atom_op_or +ffffffff81bd5040 t atom_op_shift_left +ffffffff81bd5220 t atom_op_shift_right +ffffffff81bd5400 t atom_op_mul +ffffffff81bd5550 t atom_op_div +ffffffff81bd56c0 t atom_op_add +ffffffff81bd58a0 t atom_op_sub +ffffffff81bd5a80 t atom_op_setport +ffffffff81bd5c00 t atom_op_setregblock +ffffffff81bd5cc0 t atom_op_setfbbase +ffffffff81bd5d80 t atom_op_compare +ffffffff81bd5f60 t atom_op_switch +ffffffff81bd6190 t atom_op_jump +ffffffff81bd6400 t atom_op_test +ffffffff81bd65c0 t atom_op_delay +ffffffff81bd66a0 t atom_op_calltable +ffffffff81bd67f0 t atom_op_repeat +ffffffff81bd6820 t atom_op_clear +ffffffff81bd6930 t atom_op_nop +ffffffff81bd6960 t atom_op_eot +ffffffff81bd6990 t atom_op_mask +ffffffff81bd6c40 t atom_op_postcard +ffffffff81bd6cf0 t atom_op_beep +ffffffff81bd6d10 t atom_op_savereg +ffffffff81bd6d40 t atom_op_restorereg +ffffffff81bd6d70 t atom_op_setdatablock +ffffffff81bd6eb0 t atom_op_xor +ffffffff81bd7090 t atom_op_shl +ffffffff81bd72b0 t atom_op_shr +ffffffff81bd74d0 t atom_op_debug +ffffffff81bd7500 t atom_put_dst +ffffffff81bd7a10 t atom_get_src_int +ffffffff81bd8090 t atom_iio_execute +ffffffff81bd9000 T atombios_crtc_dpms +ffffffff81bd9300 T atombios_crtc_set_base +ffffffff81bd9350 t dce4_crtc_do_set_base +ffffffff81bd9e90 t avivo_crtc_do_set_base +ffffffff81bda730 T atombios_crtc_set_base_atomic +ffffffff81bda780 T radeon_atom_disp_eng_pll_init +ffffffff81bda860 t atombios_crtc_set_disp_eng_pll +ffffffff81bda970 t atombios_crtc_program_ss +ffffffff81bdac00 T atombios_crtc_mode_set +ffffffff81bdb690 T radeon_atombios_init_crtc +ffffffff81bdb780 t radeon_bo_reserve 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dp_get_adjust_train +ffffffff81be0000 T atombios_get_backlight_level +ffffffff81be0070 T atombios_set_backlight_level +ffffffff81be0220 T atombios_dig_transmitter_setup +ffffffff81be0240 T radeon_atom_backlight_init +ffffffff81be0420 t radeon_atom_backlight_get_brightness +ffffffff81be0480 T atombios_dvo_setup +ffffffff81be0640 T atombios_digital_setup +ffffffff81be0900 T atombios_get_encoder_mode +ffffffff81be0b90 T atombios_dig_encoder_setup2 +ffffffff81be0fd0 T atombios_dig_encoder_setup +ffffffff81be0ff0 T atombios_dig_transmitter_setup2 +ffffffff81be19d0 T atombios_set_edp_panel_power +ffffffff81be1ae0 T radeon_atom_release_dig_encoder +ffffffff81be1b20 T radeon_atom_pick_dig_encoder +ffffffff81be1d40 T radeon_atom_encoder_init +ffffffff81be1e10 t atombios_external_encoder_setup +ffffffff81be2080 T radeon_atom_ext_encoder_setup_ddc +ffffffff81be20d0 T radeon_enc_destroy +ffffffff81be2180 T radeon_add_atom_encoder +ffffffff81be2590 t radeon_atombios_set_dig_info +ffffffff81be2600 t radeon_atombios_set_dac_info +ffffffff81be2670 t radeon_atom_backlight_update_status +ffffffff81be26d0 t radeon_atom_encoder_dpms +ffffffff81be2970 t radeon_atom_mode_fixup +ffffffff81be2ab0 t radeon_atom_encoder_prepare +ffffffff81be2f90 t radeon_atom_encoder_commit +ffffffff81be2fc0 t radeon_atom_encoder_mode_set +ffffffff81be3570 t radeon_atom_dig_detect +ffffffff81be3680 t radeon_atom_encoder_disable +ffffffff81be3910 t radeon_atom_encoder_dpms_avivo +ffffffff81be3b40 t radeon_atom_encoder_dpms_dig +ffffffff81be4080 t atombios_dac_setup +ffffffff81be4160 t radeon_atom_dac_detect +ffffffff81be4350 t radeon_atom_ext_dpms +ffffffff81be4380 t radeon_atom_ext_prepare +ffffffff81be43b0 t radeon_atom_ext_commit +ffffffff81be43e0 t radeon_atom_ext_mode_set +ffffffff81be4410 t radeon_atom_ext_disable +ffffffff81be5000 T radeon_atom_hw_i2c_xfer +ffffffff81be5140 t radeon_process_i2c_ch +ffffffff81be5310 T radeon_atom_hw_i2c_func +ffffffff81be6000 T btc_get_max_clock_from_voltage_dependency_table +ffffffff81be60d0 T btc_apply_voltage_dependency_rules +ffffffff81be6140 T btc_skip_blacklist_clocks +ffffffff81be6230 T btc_adjust_clock_combinations +ffffffff81be6360 T btc_apply_voltage_delta_rules +ffffffff81be6480 T btc_program_mgcg_hw_sequence +ffffffff81be6580 T btc_dpm_enabled +ffffffff81be6590 T btc_notify_uvd_to_smc +ffffffff81be6600 T btc_reset_to_default +ffffffff81be6650 T btc_read_arb_registers +ffffffff81be66e0 T btc_dpm_vblank_too_short +ffffffff81be6750 T btc_dpm_pre_set_power_state +ffffffff81be7970 T btc_dpm_set_power_state +ffffffff81be7ca0 t btc_set_power_state_conditionally_enable_ulv +ffffffff81be7dd0 T btc_dpm_post_set_power_state +ffffffff81be7ef0 t btc_update_current_ps +ffffffff81be7ff0 T btc_dpm_enable +ffffffff81be8ed0 t btc_cg_clock_gating_enable +ffffffff81be9000 t btc_mg_clock_gating_enable +ffffffff81be9120 t btc_ls_clock_gating_enable +ffffffff81be9250 t btc_init_stutter_mode +ffffffff81be92d0 T btc_dpm_disable +ffffffff81be95b0 T btc_dpm_setup_asic +ffffffff81be9690 T btc_dpm_init +ffffffff81be9a80 T btc_dpm_fini +ffffffff81be9b30 T btc_dpm_debugfs_print_current_performance_level +ffffffff81be9b80 T btc_dpm_get_current_sclk +ffffffff81be9c00 T btc_dpm_get_current_mclk +ffffffff81be9c80 T btc_dpm_get_sclk +ffffffff81be9cd0 T btc_dpm_get_mclk +ffffffff81bea000 T ci_dpm_powergate_uvd +ffffffff81bea380 T ci_dpm_vblank_too_short +ffffffff81bea410 T ci_fan_ctrl_get_fan_speed_percent +ffffffff81bea4b0 T ci_fan_ctrl_set_fan_speed_percent +ffffffff81bea580 T ci_fan_ctrl_set_mode +ffffffff81bea720 t ci_fan_ctrl_set_static_mode +ffffffff81bea7e0 t ci_thermal_start_smc_fan_control +ffffffff81beaa20 T ci_fan_ctrl_get_mode +ffffffff81beaa80 T ci_dpm_force_performance_level +ffffffff81beb310 t ci_upload_dpm_level_enable_mask +ffffffff81beb640 T ci_dpm_pre_set_power_state +ffffffff81beb930 T ci_dpm_post_set_power_state +ffffffff81beba00 T ci_dpm_setup_asic +ffffffff81bebc00 T ci_dpm_enable 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ci_update_and_upload_mc_reg_table +ffffffff81bf1670 t ci_unfreeze_sclk_mclk_dpm +ffffffff81bf1820 t ci_notify_link_speed_change_after_state_change +ffffffff81bf1950 T ci_dpm_display_configuration_changed +ffffffff81bf1ae0 T ci_dpm_fini +ffffffff81bf1b90 T ci_dpm_init +ffffffff81bf29f0 t ci_initialize_powertune_defaults +ffffffff81bf2ae0 t ci_get_leakage_voltages +ffffffff81bf2c90 t ci_patch_dependency_tables_with_leakage +ffffffff81bf3300 t ci_set_private_data_variables_based_on_pptable +ffffffff81bf3410 T ci_dpm_debugfs_print_current_performance_level +ffffffff81bf3550 T ci_dpm_print_power_state +ffffffff81bf3610 T ci_dpm_get_current_sclk +ffffffff81bf36e0 T ci_dpm_get_current_mclk +ffffffff81bf37b0 T ci_dpm_get_sclk +ffffffff81bf3800 T ci_dpm_get_mclk +ffffffff81bf3850 t ci_set_valid_flag +ffffffff81bf38f0 t ci_populate_all_graphic_levels +ffffffff81bf3e80 t ci_populate_all_memory_levels +ffffffff81bf4780 t ci_populate_smc_vce_level +ffffffff81bf48a0 t ci_populate_smc_acp_level +ffffffff81bf49a0 t ci_populate_smc_samu_level +ffffffff81bf4aa0 t ci_do_program_memory_timing_parameters +ffffffff81bf4cc0 t ci_populate_smc_uvd_level +ffffffff81bf4e10 t ci_populate_smc_initial_state +ffffffff81bf4eb0 t ci_populate_bapm_parameters_in_dpm_table +ffffffff81bf5040 t ci_populate_smc_voltage_table +ffffffff81bf5160 t ci_min_max_v_gnbl_pm_lid_from_bapm_vddc +ffffffff81bf53c0 t ci_enable_sclk_mclk_dpm +ffffffff81bf5730 t ci_thermal_enable_alert +ffffffff81bf58e0 t ci_enable_vce_dpm +ffffffff81bf6000 T ci_copy_bytes_to_smc +ffffffff81bf6240 T ci_start_smc +ffffffff81bf6280 T ci_reset_smc +ffffffff81bf62c0 T ci_program_jump_on_start +ffffffff81bf62f0 T ci_stop_smc_clock +ffffffff81bf6330 T ci_start_smc_clock +ffffffff81bf6370 T ci_is_smc_running +ffffffff81bf63e0 T ci_load_smc_ucode +ffffffff81bf6570 T ci_read_smc_sram_dword +ffffffff81bf6640 T ci_write_smc_sram_dword +ffffffff81bf7000 T cik_get_allowed_info_register +ffffffff81bf70a0 T cik_didt_rreg +ffffffff81bf7140 T cik_didt_wreg +ffffffff81bf71c0 T ci_get_temp +ffffffff81bf7210 T kv_get_temp +ffffffff81bf7260 T cik_pciep_rreg +ffffffff81bf72e0 T cik_pciep_wreg +ffffffff81bf7350 T cik_get_xclk +ffffffff81bf73c0 T cik_mm_rdoorbell +ffffffff81bf7420 T cik_mm_wdoorbell +ffffffff81bf7470 T ci_mc_load_microcode +ffffffff81bf77b0 T cik_ring_test +ffffffff81bf7a50 T cik_fence_gfx_ring_emit +ffffffff81bf7e40 T cik_fence_compute_ring_emit +ffffffff81bf80c0 T cik_semaphore_ring_emit +ffffffff81bf8280 T cik_copy_cpdma +ffffffff81bf86d0 T cik_ring_ib_execute +ffffffff81bf8c70 T cik_ib_test +ffffffff81bf8f50 T cik_gfx_get_rptr +ffffffff81bf8fb0 T cik_gfx_get_wptr +ffffffff81bf8ff0 T cik_gfx_set_wptr +ffffffff81bf9030 T cik_compute_get_rptr +ffffffff81bf9110 T cik_compute_get_wptr +ffffffff81bf91f0 T cik_compute_set_wptr +ffffffff81bf9270 T cik_gpu_check_soft_reset +ffffffff81bf93e0 T cik_asic_reset +ffffffff81bf97f0 t cik_gpu_pci_config_reset +ffffffff81bfa000 T cik_gfx_is_lockup +ffffffff81bfa070 T cik_pcie_gart_tlb_flush +ffffffff81bfa0c0 T cik_ib_parse +ffffffff81bfa0f0 T cik_vm_init +ffffffff81bfa150 T cik_vm_fini +ffffffff81bfa180 T cik_vm_flush +ffffffff81bfadf0 T cik_enter_rlc_safe_mode +ffffffff81bfaee0 T cik_exit_rlc_safe_mode +ffffffff81bfaf20 T cik_update_cg +ffffffff81bfb410 t cik_enable_mgcg +ffffffff81bfb930 t cik_enable_cgcg +ffffffff81bfbca0 T cik_init_cp_pg_table +ffffffff81bfbf10 T cik_get_csb_size +ffffffff81bfbfa0 T cik_get_csb_buffer +ffffffff81bfc130 T cik_irq_set +ffffffff81bfceb0 t cik_disable_interrupt_state +ffffffff81bfd370 T cik_irq_process +ffffffff81bfeb40 t cik_irq_ack +ffffffff81bff4c0 T cik_resume +ffffffff81bff550 t cik_init_golden_registers +ffffffff81bff710 t cik_startup +ffffffff81c024e0 T cik_suspend +ffffffff81c028d0 T cik_init +ffffffff81c02df0 t cik_init_microcode +ffffffff81c03b40 t cik_uvd_init +ffffffff81c03bf0 t cik_vce_init +ffffffff81c03cc0 t cik_cp_fini +ffffffff81c03d40 t cik_irq_fini +ffffffff81c03e50 t cik_mec_fini +ffffffff81c03f00 t cik_pcie_gart_fini +ffffffff81c04000 T cik_fini +ffffffff81c04320 T dce8_program_fmt +ffffffff81c04450 T dce8_bandwidth_update +ffffffff81c05060 T cik_get_gpu_clock_counter +ffffffff81c05120 T cik_set_uvd_clocks +ffffffff81c051a0 t cik_set_uvd_clock +ffffffff81c05310 T cik_set_vce_clocks +ffffffff81c05550 t cik_wait_for_rlc_serdes +ffffffff81c05710 t cik_mec_init +ffffffff81c058f0 t cik_uvd_start +ffffffff81c059d0 t cik_vce_start +ffffffff81c05ae0 t cik_irq_init +ffffffff81c06660 t cik_cp_resume +ffffffff81c07e00 t cik_uvd_resume +ffffffff81c07ed0 t cik_vce_resume +ffffffff81c07fc0 t pcie_capability_set_word +ffffffff81c080d0 t pcie_capability_read_word +ffffffff81c08170 t pcie_capability_clear_and_set_word +ffffffff81c08290 t pcie_capability_write_word +ffffffff81c08350 t cik_get_cu_active_bitmap +ffffffff81c084d0 t radeon_bo_reserve +ffffffff81c08640 t radeon_bo_unreserve +ffffffff81c08720 t cik_update_gfx_pg +ffffffff81c088c0 t cik_compute_stop +ffffffff81c08a30 t cik_cp_compute_fini +ffffffff81c08bd0 t request_firmware +ffffffff81c08c60 t release_firmware +ffffffff81c08ca0 t dce8_latency_watermark +ffffffff81c09000 T cik_sdma_get_rptr +ffffffff81c09070 T cik_sdma_get_wptr +ffffffff81c090c0 T cik_sdma_set_wptr +ffffffff81c09110 T cik_sdma_ring_ib_execute +ffffffff81c09510 T cik_sdma_fence_ring_emit +ffffffff81c096e0 t cik_sdma_hdp_flush_ring_emit +ffffffff81c09910 T cik_sdma_semaphore_ring_emit +ffffffff81c09a30 T cik_sdma_enable +ffffffff81c09c10 T cik_sdma_resume +ffffffff81c0a0f0 T cik_sdma_fini +ffffffff81c0a130 T cik_copy_dma +ffffffff81c0a530 T cik_sdma_ring_test +ffffffff81c0a7e0 T cik_sdma_ib_test +ffffffff81c0aa40 T cik_sdma_is_lockup +ffffffff81c0aac0 T cik_sdma_vm_copy_pages +ffffffff81c0abd0 T cik_sdma_vm_write_pages +ffffffff81c0ad40 T cik_sdma_vm_set_pages +ffffffff81c0aec0 T cik_sdma_vm_pad_ib +ffffffff81c0af10 T cik_dma_vm_flush +ffffffff81c0c000 T cypress_enable_spread_spectrum +ffffffff81c0c140 T cypress_start_dpm +ffffffff81c0c190 T cypress_enable_sclk_control +ffffffff81c0c1f0 T cypress_enable_mclk_control +ffffffff81c0c250 T cypress_notify_smc_display_change +ffffffff81c0c2a0 T cypress_program_response_times +ffffffff81c0c360 T cypress_advertise_gen2_capability +ffffffff81c0c430 T cypress_notify_link_speed_change_after_state_change +ffffffff81c0c4f0 T cypress_notify_link_speed_change_before_state_change +ffffffff81c0c5b0 T cypress_get_strobe_mode_settings +ffffffff81c0c6b0 T cypress_get_mclk_frequency_ratio +ffffffff81c0c760 T cypress_map_clkf_to_ibias +ffffffff81c0c820 T cypress_convert_power_level_to_smc +ffffffff81c0cbf0 t cypress_populate_mclk_value +ffffffff81c0d000 T cypress_upload_sw_state +ffffffff81c0d180 T cypress_upload_mc_reg_table +ffffffff81c0d240 t cypress_convert_mc_reg_table_to_smc +ffffffff81c0d4d0 T cypress_calculate_burst_time +ffffffff81c0d560 T cypress_program_memory_timing_parameters +ffffffff81c0d700 T cypress_populate_smc_initial_state +ffffffff81c0dab0 T cypress_populate_smc_acpi_state +ffffffff81c0de30 T cypress_construct_voltage_tables +ffffffff81c0dfc0 T cypress_populate_smc_voltage_tables +ffffffff81c0e0f0 T cypress_get_mvdd_configuration +ffffffff81c0e1c0 T cypress_populate_mc_reg_table +ffffffff81c0e410 T cypress_get_table_locations +ffffffff81c0e4f0 T cypress_enable_display_gap +ffffffff81c0e550 T cypress_dpm_setup_asic +ffffffff81c0e640 T cypress_dpm_enable +ffffffff81c0f110 t cypress_force_mc_use_s1 +ffffffff81c0f390 t cypress_gfx_clock_gating_enable +ffffffff81c0f6a0 t cypress_mg_clock_gating_enable +ffffffff81c0f920 T cypress_dpm_disable +ffffffff81c0fb50 T cypress_dpm_set_power_state +ffffffff81c0fd90 T cypress_dpm_display_configuration_changed +ffffffff81c0fe70 T cypress_dpm_init +ffffffff81c100e0 T cypress_dpm_fini +ffffffff81c10170 T cypress_dpm_vblank_too_short +ffffffff81c101e0 t cypress_wait_for_mc_sequencer +ffffffff81c11000 T dce3_2_afmt_hdmi_write_speaker_allocation +ffffffff81c11070 T dce3_2_afmt_dp_write_speaker_allocation +ffffffff81c110e0 T dce3_2_afmt_write_sad_regs +ffffffff81c111e0 T dce3_2_audio_set_dto +ffffffff81c11320 T dce3_2_hdmi_update_acr +ffffffff81c11680 T dce3_2_set_audio_packet +ffffffff81c11810 T dce3_2_set_mute +ffffffff81c12000 T dce6_endpoint_rreg +ffffffff81c120e0 T dce6_endpoint_wreg +ffffffff81c121d0 T dce6_audio_get_pin +ffffffff81c12360 T dce6_afmt_select_pin +ffffffff81c123f0 T dce6_afmt_write_latency_fields +ffffffff81c124b0 T dce6_afmt_hdmi_write_speaker_allocation +ffffffff81c12580 T dce6_afmt_dp_write_speaker_allocation +ffffffff81c12650 T dce6_afmt_write_sad_regs +ffffffff81c12790 T dce6_audio_enable +ffffffff81c127e0 T dce6_hdmi_audio_set_dto +ffffffff81c12850 T dce6_dp_audio_set_dto +ffffffff81c13000 T eg_cg_rreg +ffffffff81c13080 T eg_cg_wreg +ffffffff81c130f0 T eg_pif_phy0_rreg +ffffffff81c13170 T eg_pif_phy0_wreg +ffffffff81c131d0 T eg_pif_phy1_rreg +ffffffff81c13250 T eg_pif_phy1_wreg +ffffffff81c132b0 T evergreen_get_allowed_info_register +ffffffff81c13340 T evergreen_tiling_fields +ffffffff81c133e0 T sumo_set_uvd_clocks +ffffffff81c134c0 t sumo_set_uvd_clock +ffffffff81c136b0 T evergreen_set_uvd_clocks +ffffffff81c13c30 T evergreen_fix_pci_max_read_req_size +ffffffff81c13df0 T dce4_program_fmt +ffffffff81c13f10 T dce4_wait_for_vblank +ffffffff81c14190 T evergreen_page_flip +ffffffff81c14320 T evergreen_page_flip_pending +ffffffff81c14390 T evergreen_get_temp +ffffffff81c14460 T sumo_get_temp +ffffffff81c144b0 T sumo_pm_init_profile +ffffffff81c145f0 T btc_pm_init_profile +ffffffff81c14700 T evergreen_pm_misc +ffffffff81c148a0 T evergreen_pm_prepare +ffffffff81c149a0 T evergreen_pm_finish +ffffffff81c14aa0 T evergreen_hpd_sense +ffffffff81c14b10 T evergreen_hpd_set_polarity +ffffffff81c14c50 T evergreen_hpd_init +ffffffff81c14d20 T evergreen_hpd_fini +ffffffff81c14dc0 T evergreen_get_number_of_dram_channels +ffffffff81c14e10 T evergreen_bandwidth_update +ffffffff81c14fd0 t evergreen_line_buffer_adjust +ffffffff81c151c0 t evergreen_program_watermarks +ffffffff81c15c20 T evergreen_mc_wait_for_idle +ffffffff81c15cc0 T evergreen_pcie_gart_tlb_flush +ffffffff81c15d90 T evergreen_mc_stop +ffffffff81c16890 T evergreen_mc_resume +ffffffff81c16fa0 T evergreen_mc_program +ffffffff81c173a0 T evergreen_ring_ib_execute +ffffffff81c17830 T evergreen_mc_init +ffffffff81c17970 T evergreen_print_gpu_status_regs +ffffffff81c179a0 T evergreen_is_display_hung +ffffffff81c17ba0 T evergreen_gpu_check_soft_reset +ffffffff81c17d00 T evergreen_gpu_pci_config_reset +ffffffff81c17e80 T evergreen_asic_reset +ffffffff81c181a0 T evergreen_gfx_is_lockup +ffffffff81c18210 T sumo_rlc_fini +ffffffff81c183c0 t radeon_bo_reserve +ffffffff81c18530 t radeon_bo_unreserve +ffffffff81c18610 T sumo_rlc_init +ffffffff81c18de0 T evergreen_rlc_resume +ffffffff81c19150 T evergreen_get_vblank_counter +ffffffff81c191c0 T evergreen_disable_interrupt_state +ffffffff81c19490 T evergreen_irq_set +ffffffff81c19a50 T evergreen_irq_suspend +ffffffff81c19aa0 T evergreen_irq_process +ffffffff81c1a5f0 t evergreen_irq_ack +ffffffff81c1acb0 T evergreen_resume +ffffffff81c1ad90 t evergreen_init_golden_registers +ffffffff81c1afa0 t evergreen_startup +ffffffff81c1c830 T evergreen_suspend +ffffffff81c1c9d0 T evergreen_init +ffffffff81c1cdd0 t evergreen_pcie_gart_fini +ffffffff81c1cef0 T evergreen_fini +ffffffff81c1d0e0 T evergreen_pcie_gen2_enable +ffffffff81c1d310 T evergreen_program_aspm +ffffffff81c1d9a0 t evergreen_latency_watermark +ffffffff81c1dba0 t evergreen_uvd_start +ffffffff81c1dc50 t evergreen_cp_load_microcode +ffffffff81c1ddb0 t evergreen_cp_resume +ffffffff81c1ea20 t evergreen_uvd_resume +ffffffff81c1f000 T evergreen_cs_parse +ffffffff81c21760 T evergreen_dma_cs_parse +ffffffff81c228d0 T evergreen_ib_parse +ffffffff81c22d30 T evergreen_dma_ib_parse +ffffffff81c22f00 t evergreen_cs_track_check +ffffffff81c23f70 t evergreen_cs_handle_reg +ffffffff81c25dd0 t evergreen_surface_value_conv_check +ffffffff81c260a0 t evergreen_surface_check +ffffffff81c26510 t evergreen_cs_track_validate_htile +ffffffff81c267b0 t evergreen_vm_reg_valid +ffffffff81c27000 T evergreen_dma_fence_ring_emit +ffffffff81c272b0 T evergreen_dma_ring_ib_execute +ffffffff81c27600 T evergreen_copy_dma +ffffffff81c279a0 T evergreen_dma_is_lockup +ffffffff81c28000 T dce4_audio_enable +ffffffff81c28080 T evergreen_hdmi_update_acr +ffffffff81c282a0 T dce4_afmt_write_latency_fields +ffffffff81c28310 T dce4_afmt_hdmi_write_speaker_allocation +ffffffff81c28380 T dce4_afmt_dp_write_speaker_allocation +ffffffff81c283f0 T evergreen_hdmi_write_sad_regs +ffffffff81c284f0 T evergreen_set_avi_packet +ffffffff81c28690 T dce4_hdmi_audio_set_dto +ffffffff81c28770 T dce4_dp_audio_set_dto +ffffffff81c28860 T dce4_set_vbi_packet +ffffffff81c288d0 T dce4_hdmi_set_color_depth +ffffffff81c28a20 T dce4_set_audio_packet +ffffffff81c28c30 T dce4_set_mute +ffffffff81c28d40 T evergreen_hdmi_enable +ffffffff81c29070 T evergreen_dp_enable +ffffffff81c2a000 T kv_dpm_enable_bapm +ffffffff81c2a070 T kv_dpm_enable +ffffffff81c2af70 t kv_populate_vce_table +ffffffff81c2b1f0 t kv_populate_samu_table +ffffffff81c2b450 t kv_populate_acp_table +ffffffff81c2b5e0 t kv_start_am +ffffffff81c2b620 t kv_enable_auto_thermal_throttling +ffffffff81c2b660 t kv_enable_dpm_voltage_scaling +ffffffff81c2b6a0 t kv_set_dpm_interval +ffffffff81c2b6e0 t kv_start_dpm +ffffffff81c2b720 t kv_enable_didt +ffffffff81c2b9d0 T kv_dpm_late_enable +ffffffff81c2bbd0 T kv_dpm_powergate_uvd +ffffffff81c2bd50 T kv_dpm_disable +ffffffff81c2c0c0 T kv_dpm_force_performance_level +ffffffff81c2c240 t kv_force_dpm_lowest +ffffffff81c2c310 T kv_dpm_pre_set_power_state +ffffffff81c2c890 T kv_dpm_set_power_state +ffffffff81c2d060 t kv_set_valid_clock_range +ffffffff81c2d200 t kv_calculate_ds_divider +ffffffff81c2d370 t kv_calculate_nbps_level_settings +ffffffff81c2d4f0 t kv_update_vce_dpm +ffffffff81c2d6d0 T kv_dpm_post_set_power_state +ffffffff81c2d770 T kv_dpm_setup_asic +ffffffff81c2d7d0 T kv_dpm_init +ffffffff81c2e080 T kv_dpm_debugfs_print_current_performance_level +ffffffff81c2e0f0 T kv_dpm_get_current_sclk +ffffffff81c2e160 T kv_dpm_get_current_mclk +ffffffff81c2e190 T kv_dpm_print_power_state +ffffffff81c2e230 T kv_dpm_fini +ffffffff81c2e2d0 T kv_dpm_display_configuration_changed +ffffffff81c2e300 T kv_dpm_get_sclk +ffffffff81c2e350 T kv_dpm_get_mclk +ffffffff81c2f000 T kv_notify_message_to_smu +ffffffff81c2f0c0 T kv_dpm_get_enable_mask +ffffffff81c2f190 T kv_send_msg_to_smc_with_parameter +ffffffff81c2f260 T kv_read_smc_sram_dword +ffffffff81c2f2f0 T kv_smc_dpm_enable +ffffffff81c2f420 T kv_smc_bapm_enable +ffffffff81c2f550 T kv_copy_bytes_to_smc +ffffffff81c30000 T tn_smc_rreg +ffffffff81c30080 T tn_smc_wreg +ffffffff81c300f0 T ni_mc_load_microcode +ffffffff81c302e0 T ni_init_microcode +ffffffff81c307b0 t request_firmware +ffffffff81c30840 t release_firmware +ffffffff81c30880 T cayman_get_allowed_info_register +ffffffff81c30910 T tn_get_temp +ffffffff81c309a0 T cayman_pcie_gart_tlb_flush +ffffffff81c309f0 T cayman_cp_int_cntl_setup +ffffffff81c30a40 T cayman_fence_ring_emit +ffffffff81c30dd0 T cayman_ring_ib_execute +ffffffff81c31230 T cayman_gfx_get_rptr +ffffffff81c312c0 T cayman_gfx_get_wptr +ffffffff81c31330 T cayman_gfx_set_wptr +ffffffff81c313b0 T cayman_gpu_check_soft_reset +ffffffff81c31540 T cayman_asic_reset +ffffffff81c31840 T cayman_gfx_is_lockup +ffffffff81c318b0 T cayman_resume +ffffffff81c31940 t ni_init_golden_registers +ffffffff81c31a20 t cayman_startup +ffffffff81c32e60 T cayman_suspend +ffffffff81c33050 T cayman_init +ffffffff81c333c0 t cayman_uvd_init +ffffffff81c33470 t cayman_vce_init +ffffffff81c33540 t cayman_cp_fini +ffffffff81c335c0 t cayman_pcie_gart_fini +ffffffff81c33700 T cayman_fini +ffffffff81c33980 T cayman_vm_init +ffffffff81c339e0 T cayman_vm_fini +ffffffff81c33a10 T cayman_vm_decode_fault +ffffffff81c33aa0 T cayman_vm_flush +ffffffff81c33f00 T tn_set_vce_clocks +ffffffff81c34160 t cayman_uvd_start +ffffffff81c34210 t cayman_vce_start +ffffffff81c34320 t cayman_cp_load_microcode +ffffffff81c344b0 t cayman_cp_resume +ffffffff81c35370 t cayman_uvd_resume +ffffffff81c35440 t cayman_vce_resume +ffffffff81c36000 T cayman_dma_get_rptr +ffffffff81c36070 T cayman_dma_get_wptr +ffffffff81c360c0 T cayman_dma_set_wptr +ffffffff81c36110 T cayman_dma_ring_ib_execute +ffffffff81c364a0 T cayman_dma_stop +ffffffff81c36550 T cayman_dma_resume +ffffffff81c367b0 T cayman_dma_fini +ffffffff81c36870 T cayman_dma_is_lockup +ffffffff81c368f0 T cayman_dma_vm_copy_pages +ffffffff81c369f0 T cayman_dma_vm_write_pages +ffffffff81c36b50 T cayman_dma_vm_set_pages +ffffffff81c36cc0 T cayman_dma_vm_pad_ib +ffffffff81c36d10 T cayman_dma_vm_flush +ffffffff81c38000 T ni_get_pi +ffffffff81c38030 T ni_get_ps +ffffffff81c38060 T ni_dpm_vblank_too_short +ffffffff81c380d0 T ni_dpm_force_performance_level +ffffffff81c38220 T ni_copy_and_switch_arb_sets +ffffffff81c384f0 T ni_set_uvd_clock_before_set_eng_clock +ffffffff81c38570 T ni_set_uvd_clock_after_set_eng_clock +ffffffff81c385f0 T ni_dpm_setup_asic +ffffffff81c38800 T ni_update_current_ps +ffffffff81c388c0 T ni_update_requested_ps +ffffffff81c38980 T ni_dpm_enable +ffffffff81c397e0 t ni_init_smc_table +ffffffff81c3a190 t ni_init_smc_spll_table +ffffffff81c3a300 t ni_init_arb_table_index +ffffffff81c3a3a0 t ni_populate_mc_reg_table +ffffffff81c3a6e0 t ni_initialize_smc_cac_tables +ffffffff81c3b960 t ni_initialize_hardware_cac_manager +ffffffff81c3be90 t ni_populate_smc_tdp_limits +ffffffff81c3c040 t ni_program_response_times +ffffffff81c3c150 T ni_dpm_disable +ffffffff81c3c510 t ni_enable_power_containment +ffffffff81c3c5d0 t ni_enable_smc_cac +ffffffff81c3c6f0 T ni_dpm_pre_set_power_state +ffffffff81c3ccd0 T ni_dpm_set_power_state +ffffffff81c3cfc0 t ni_upload_sw_state +ffffffff81c3dbb0 t ni_upload_mc_reg_table +ffffffff81c3dd60 t ni_power_control_set_level +ffffffff81c3de30 T ni_dpm_post_set_power_state +ffffffff81c3df00 T ni_dpm_init +ffffffff81c3e8a0 T ni_dpm_fini +ffffffff81c3e950 T ni_dpm_print_power_state +ffffffff81c3ea20 T ni_dpm_debugfs_print_current_performance_level +ffffffff81c3ea60 T ni_dpm_get_current_sclk +ffffffff81c3ead0 T ni_dpm_get_current_mclk +ffffffff81c3eb40 T ni_dpm_get_sclk +ffffffff81c3eba0 T ni_dpm_get_mclk +ffffffff81c3ec00 t ni_do_program_memory_timing_parameters +ffffffff81c3ed40 t ni_calculate_sclk_params +ffffffff81c3ef70 t ni_calculate_power_boost_limit +ffffffff81c3f130 t ni_populate_mclk_value +ffffffff81c40000 T r100_wait_for_vblank +ffffffff81c40190 T r100_page_flip +ffffffff81c40450 T r100_page_flip_pending +ffffffff81c40500 T r100_pm_get_dynpm_state +ffffffff81c40720 T r100_pm_init_profile +ffffffff81c40800 T r100_pm_misc +ffffffff81c40c40 T r100_pm_prepare +ffffffff81c40cf0 T r100_pm_finish +ffffffff81c40da0 T r100_gui_idle +ffffffff81c40de0 T r100_hpd_sense +ffffffff81c40e40 T r100_hpd_set_polarity +ffffffff81c40f00 T r100_hpd_init +ffffffff81c40fa0 T r100_hpd_fini +ffffffff81c41010 T r100_pci_gart_tlb_flush +ffffffff81c41040 T r100_pci_gart_init +ffffffff81c41110 T r100_pci_gart_get_page_entry +ffffffff81c41140 T r100_pci_gart_set_page +ffffffff81c41180 T r100_pci_gart_enable +ffffffff81c41270 T r100_pci_gart_disable +ffffffff81c412f0 T r100_pci_gart_fini +ffffffff81c41370 T r100_irq_set +ffffffff81c41450 T r100_irq_disable +ffffffff81c414c0 T r100_irq_process +ffffffff81c417c0 T r100_get_vblank_counter +ffffffff81c41810 T r100_fence_ring_emit +ffffffff81c41c70 T r100_semaphore_ring_emit +ffffffff81c41ca0 T r100_copy_blit +ffffffff81c42330 T r100_ring_start +ffffffff81c42420 T r100_gfx_get_rptr +ffffffff81c42480 T r100_gfx_get_wptr +ffffffff81c424c0 T r100_gfx_set_wptr +ffffffff81c42500 T r100_cp_init +ffffffff81c42a30 T r100_debugfs_cp_init +ffffffff81c42a60 T r100_cp_fini +ffffffff81c42b00 T r100_cp_disable +ffffffff81c42c40 T r100_gui_wait_for_idle +ffffffff81c42d30 T r100_reloc_pitch_offset +ffffffff81c42e70 T r100_packet3_load_vbpntr +ffffffff81c43110 T r100_cs_parse_packet0 +ffffffff81c43220 T r100_cs_packet_parse_vline +ffffffff81c43430 T r100_cs_track_check_pkt3_indx_buffer +ffffffff81c434b0 T r100_cs_parse +ffffffff81c446a0 T r100_cs_track_clear +ffffffff81c44a30 T r100_cs_track_check +ffffffff81c45240 T r100_mc_wait_for_idle +ffffffff81c452e0 T r100_gpu_is_lockup +ffffffff81c45340 T r100_enable_bm +ffffffff81c45390 T r100_bm_disable +ffffffff81c45440 T r100_asic_reset +ffffffff81c45770 T r100_mc_stop +ffffffff81c45930 T r100_mc_resume +ffffffff81c459f0 T r100_set_common_regs +ffffffff81c45b90 T r100_vram_init_sizes +ffffffff81c45d80 T r100_vga_set_state +ffffffff81c45de0 T r100_pll_errata_after_index +ffffffff81c45e20 T r100_pll_rreg +ffffffff81c45f50 T r100_pll_wreg +ffffffff81c46060 T r100_debugfs_rbbm_init +ffffffff81c46090 T r100_debugfs_mc_info_init +ffffffff81c460c0 T r100_set_surface_reg +ffffffff81c462d0 T r100_clear_surface_reg +ffffffff81c46380 T r100_bandwidth_update +ffffffff81c46dd0 T r100_ring_test +ffffffff81c47080 T r100_ring_ib_execute +ffffffff81c472e0 T r100_ib_test +ffffffff81c47620 T r100_vga_render_disable +ffffffff81c47680 T r100_resume +ffffffff81c47870 t r100_startup +ffffffff81c47db0 T r100_suspend +ffffffff81c47e90 T r100_fini +ffffffff81c47fa0 T r100_restore_sanity +ffffffff81c48040 T r100_init +ffffffff81c48490 t r100_set_safe_registers +ffffffff81c48510 T r100_mm_rreg_slow +ffffffff81c48590 T r100_mm_wreg_slow +ffffffff81c485f0 T r100_io_rreg +ffffffff81c48690 T r100_io_wreg +ffffffff81c48700 t r100_get_vtx_size +ffffffff81c487f0 t r100_cs_track_texture_print +ffffffff81c49000 T r200_copy_dma +ffffffff81c49470 T r200_packet0_check +ffffffff81c4a240 t r200_get_vtx_size_0 +ffffffff81c4a400 t r200_get_vtx_size_1 +ffffffff81c4a490 T r200_set_safe_registers +ffffffff81c4b000 T rv370_pcie_rreg +ffffffff81c4b080 T rv370_pcie_wreg +ffffffff81c4b0f0 T rv370_pcie_gart_tlb_flush +ffffffff81c4b2f0 T rv370_pcie_gart_get_page_entry +ffffffff81c4b350 T rv370_pcie_gart_set_page +ffffffff81c4b390 T rv370_pcie_gart_init +ffffffff81c4b460 T rv370_pcie_gart_enable +ffffffff81c4b7c0 T rv370_pcie_gart_disable +ffffffff81c4b940 T rv370_pcie_gart_fini +ffffffff81c4b970 T r300_fence_ring_emit +ffffffff81c4bee0 T r300_ring_start +ffffffff81c4c850 T r300_mc_wait_for_idle +ffffffff81c4c8f0 T r300_asic_reset +ffffffff81c4cb10 T r300_mc_init +ffffffff81c4cbc0 T rv370_set_pcie_lanes +ffffffff81c4cd80 T rv370_get_pcie_lanes +ffffffff81c4ce30 T r300_cs_parse +ffffffff81c4d1a0 t r300_packet0_check +ffffffff81c4e060 T r300_set_reg_safe +ffffffff81c4e0a0 T r300_mc_program +ffffffff81c4e230 T r300_clock_startup +ffffffff81c4e2c0 T r300_resume +ffffffff81c4e490 t r300_startup +ffffffff81c4e7f0 T r300_suspend +ffffffff81c4e870 T r300_fini +ffffffff81c4e950 T r300_init +ffffffff81c4f000 T r420_pm_init_profile +ffffffff81c4f0f0 T r420_pipes_init +ffffffff81c4f2d0 T r420_mc_rreg +ffffffff81c4f350 T r420_mc_wreg +ffffffff81c4f3c0 T r420_resume +ffffffff81c4f590 t r420_startup +ffffffff81c4f790 T r420_suspend +ffffffff81c4f930 T r420_fini +ffffffff81c4fa10 T r420_init +ffffffff81c4fc90 T r420_debugfs_pipes_info_init +ffffffff81c4fcc0 t r420_cp_errata_init +ffffffff81c50000 T r520_mc_wait_for_idle +ffffffff81c500a0 T r520_resume +ffffffff81c50190 t r520_startup +ffffffff81c50580 T r520_init +ffffffff81c51000 T r600_rcu_rreg +ffffffff81c51080 T r600_rcu_wreg +ffffffff81c510f0 T r600_uvd_ctx_rreg +ffffffff81c51170 T r600_uvd_ctx_wreg +ffffffff81c511e0 T r600_get_allowed_info_register +ffffffff81c51260 T r600_get_xclk +ffffffff81c51290 T r600_set_uvd_clocks +ffffffff81c517f0 T dce3_program_fmt +ffffffff81c51910 T rv6xx_get_temp +ffffffff81c51960 T r600_pm_get_dynpm_state +ffffffff81c51d70 T rs780_pm_init_profile +ffffffff81c51e80 T r600_pm_init_profile +ffffffff81c52120 T r600_pm_misc +ffffffff81c52200 T r600_gui_idle +ffffffff81c52240 T r600_hpd_sense +ffffffff81c52360 T r600_hpd_set_polarity +ffffffff81c525e0 T r600_hpd_init +ffffffff81c527c0 T r600_hpd_fini +ffffffff81c52970 T r600_pcie_gart_tlb_flush +ffffffff81c52aa0 T r600_pcie_gart_init +ffffffff81c52b40 T r600_mc_wait_for_idle +ffffffff81c52be0 T rs780_mc_rreg +ffffffff81c52c80 T rs780_mc_wreg +ffffffff81c52d10 T r600_vram_scratch_init +ffffffff81c52e10 t radeon_bo_reserve +ffffffff81c52f80 t radeon_bo_unreserve +ffffffff81c53060 T r600_vram_scratch_fini +ffffffff81c530e0 T r600_set_bios_scratch_engine_hung +ffffffff81c53130 T r600_gpu_check_soft_reset +ffffffff81c534d0 T r600_asic_reset +ffffffff81c53860 t r600_gpu_pci_config_reset +ffffffff81c53a70 T r600_gfx_is_lockup +ffffffff81c53ae0 T r6xx_remap_render_backend +ffffffff81c53ca0 T r600_count_pipe_bits +ffffffff81c53d10 T r600_pciep_rreg +ffffffff81c53d90 T r600_pciep_wreg +ffffffff81c53e00 T r600_cp_stop +ffffffff81c53e80 T r600_init_microcode +ffffffff81c54340 t request_firmware +ffffffff81c543d0 t release_firmware +ffffffff81c54410 T r600_gfx_get_rptr +ffffffff81c54470 T r600_gfx_get_wptr +ffffffff81c544b0 T r600_gfx_set_wptr +ffffffff81c544f0 T r600_cp_start +ffffffff81c54860 T r600_cp_resume +ffffffff81c54bc0 T r600_ring_init +ffffffff81c54c60 T r600_cp_fini +ffffffff81c54cf0 T r600_scratch_init +ffffffff81c54d60 T r600_ring_test +ffffffff81c55000 T r600_fence_ring_emit +ffffffff81c558a0 T r600_semaphore_ring_emit +ffffffff81c55a80 T r600_copy_cpdma +ffffffff81c56030 T r600_set_surface_reg +ffffffff81c56060 T r600_clear_surface_reg +ffffffff81c56090 T r600_vga_set_state +ffffffff81c560f0 T r600_resume +ffffffff81c56180 t r600_startup +ffffffff81c57e60 T r600_suspend +ffffffff81c57fd0 T r600_irq_suspend +ffffffff81c58090 t r600_pcie_gart_disable +ffffffff81c58290 T r600_init +ffffffff81c589f0 T r600_ih_ring_init +ffffffff81c58a60 T r600_irq_fini +ffffffff81c58ba0 t r600_pcie_gart_fini +ffffffff81c58bd0 T r600_fini +ffffffff81c58d60 T r600_ring_ib_execute +ffffffff81c591f0 T r600_ib_test +ffffffff81c594a0 T r600_ih_ring_alloc +ffffffff81c595c0 T r600_ih_ring_fini +ffffffff81c59650 T r600_rlc_stop +ffffffff81c597e0 T r600_disable_interrupts +ffffffff81c59890 T r600_irq_init +ffffffff81c59cf0 t r600_disable_interrupt_state +ffffffff81c59ff0 T r600_irq_disable +ffffffff81c5a0b0 T r600_irq_set +ffffffff81c5a830 t r600_irq_ack +ffffffff81c5ad60 T r600_irq_process +ffffffff81c5b960 T r600_mmio_hdp_flush +ffffffff81c5b9e0 T r600_set_pcie_lanes +ffffffff81c5bb10 T r600_get_pcie_lanes +ffffffff81c5bbe0 T r600_get_gpu_clock_counter +ffffffff81c5bc70 t r600_cp_load_microcode +ffffffff81c5bf40 t r600_uvd_resume +ffffffff81c5d000 T r600_fmt_is_valid_color +ffffffff81c5d040 T r600_fmt_is_valid_texture +ffffffff81c5d090 T r600_fmt_get_blocksize +ffffffff81c5d0d0 T r600_fmt_get_nblocksx +ffffffff81c5d120 T r600_fmt_get_nblocksy +ffffffff81c5d180 T r600_cs_common_vline_parse +ffffffff81c5d440 T r600_mip_minify +ffffffff81c5d4a0 T r600_cs_parse +ffffffff81c5f360 T r600_dma_cs_next_reloc +ffffffff81c5f3e0 T r600_dma_cs_parse +ffffffff81c5fa80 t r600_cs_track_check +ffffffff81c60bc0 t r600_cs_check_reg +ffffffff81c61ae0 t r600_is_safe_reg +ffffffff81c61b80 t r600_texture_size +ffffffff81c62000 T r600_dma_get_rptr +ffffffff81c62060 T r600_dma_get_wptr +ffffffff81c620a0 T r600_dma_set_wptr +ffffffff81c620e0 T r600_dma_stop +ffffffff81c62170 T r600_dma_resume +ffffffff81c62370 T r600_dma_fini +ffffffff81c623f0 T r600_dma_is_lockup +ffffffff81c62460 T r600_dma_ring_test +ffffffff81c626d0 T r600_dma_fence_ring_emit +ffffffff81c628b0 T r600_dma_semaphore_ring_emit +ffffffff81c629d0 T r600_dma_ib_test +ffffffff81c62bf0 T r600_dma_ring_ib_execute +ffffffff81c62f40 T r600_copy_dma +ffffffff81c64000 T r600_dpm_print_class_info +ffffffff81c642b0 T r600_dpm_print_cap_info +ffffffff81c64340 T r600_dpm_print_ps_status +ffffffff81c643d0 T r600_dpm_get_vblank_time +ffffffff81c64490 T r600_dpm_get_vrefresh +ffffffff81c64520 T r600_calculate_u_and_p +ffffffff81c645a0 T r600_calculate_at +ffffffff81c64650 T r600_gfx_clockgating_enable +ffffffff81c64750 T r600_dynamicpm_enable +ffffffff81c647a0 T r600_enable_thermal_protection +ffffffff81c64800 T r600_enable_acpi_pm +ffffffff81c64850 T r600_enable_dynamic_pcie_gen2 +ffffffff81c648a0 T r600_dynamicpm_enabled +ffffffff81c648e0 T r600_enable_sclk_control +ffffffff81c64940 T r600_enable_mclk_control +ffffffff81c649a0 T r600_enable_spll_bypass +ffffffff81c649f0 T r600_wait_for_spll_change +ffffffff81c64a70 T r600_set_bsp +ffffffff81c64ab0 T r600_set_at +ffffffff81c64b10 T r600_set_tc +ffffffff81c64b70 T r600_select_td +ffffffff81c64c20 T r600_set_vrc +ffffffff81c64c60 T r600_set_tpu +ffffffff81c64cc0 T r600_set_tpc +ffffffff81c64d20 T r600_set_sstu +ffffffff81c64d80 T r600_set_sst +ffffffff81c64dd0 T r600_set_git +ffffffff81c64e20 T r600_set_fctu +ffffffff81c64e80 T r600_set_fct +ffffffff81c64ed0 T r600_set_ctxcgtt3d_rphc +ffffffff81c64f30 T r600_set_ctxcgtt3d_rsdc +ffffffff81c64f90 T r600_set_vddc3d_oorsu +ffffffff81c64ff0 T r600_set_vddc3d_oorphc +ffffffff81c65050 T r600_set_vddc3d_oorsdc +ffffffff81c650b0 T r600_set_mpll_lock_time +ffffffff81c65100 T r600_set_mpll_reset_time +ffffffff81c65150 T r600_engine_clock_entry_enable +ffffffff81c65250 T r600_engine_clock_entry_enable_pulse_skipping +ffffffff81c65350 T r600_engine_clock_entry_enable_post_divider +ffffffff81c65450 T r600_engine_clock_entry_set_post_divider +ffffffff81c65510 T r600_engine_clock_entry_set_reference_divider +ffffffff81c655d0 T r600_engine_clock_entry_set_feedback_divider +ffffffff81c65690 T r600_engine_clock_entry_set_step_time +ffffffff81c65750 T r600_vid_rt_set_ssu +ffffffff81c657b0 T r600_vid_rt_set_vru +ffffffff81c65810 T r600_vid_rt_set_vrt +ffffffff81c65870 T r600_voltage_control_enable_pins +ffffffff81c658c0 T r600_voltage_control_program_voltages +ffffffff81c65950 T r600_voltage_control_deactivate_static_control +ffffffff81c659e0 T r600_power_level_enable +ffffffff81c65a50 T r600_power_level_set_voltage_index +ffffffff81c65ac0 T r600_power_level_set_mem_clock_index +ffffffff81c65b20 T r600_power_level_set_eng_clock_index +ffffffff81c65b90 T r600_power_level_set_watermark_id +ffffffff81c65c00 T r600_power_level_set_pcie_gen2 +ffffffff81c65c60 T r600_power_level_get_current_index +ffffffff81c65ca0 T r600_power_level_get_target_index +ffffffff81c65ce0 T r600_power_level_set_enter_index +ffffffff81c65d40 T r600_wait_for_power_level_unequal +ffffffff81c65e30 T r600_wait_for_power_level +ffffffff81c65f20 T r600_start_dpm +ffffffff81c66200 T r600_stop_dpm +ffffffff81c66250 T r600_dpm_pre_set_power_state +ffffffff81c66280 T r600_dpm_post_set_power_state +ffffffff81c662b0 T r600_is_uvd_state +ffffffff81c662f0 T r600_is_internal_thermal_sensor +ffffffff81c66330 T r600_dpm_late_enable +ffffffff81c66440 T r600_get_platform_caps +ffffffff81c664e0 T r600_parse_extended_power_table +ffffffff81c672a0 T r600_free_extended_power_table +ffffffff81c673a0 T r600_get_pcie_gen_support +ffffffff81c673f0 T r600_get_pcie_lane_support +ffffffff81c67450 T r600_encode_pci_lane_width +ffffffff81c68000 T r600_audio_update_hdmi +ffffffff81c68170 t r600_audio_status +ffffffff81c68290 T r600_hdmi_buffer_status_changed +ffffffff81c68330 T r600_hdmi_update_audio_settings +ffffffff81c68700 T r600_audio_enable +ffffffff81c68780 T r600_audio_get_pin +ffffffff81c687b0 T r600_hdmi_update_acr +ffffffff81c68b50 T r600_set_avi_packet +ffffffff81c68d50 T r600_hdmi_audio_workaround +ffffffff81c68e20 T r600_hdmi_audio_set_dto +ffffffff81c68ee0 T r600_set_vbi_packet +ffffffff81c68fa0 T r600_set_audio_packet +ffffffff81c69270 T r600_set_mute +ffffffff81c69380 T r600_hdmi_enable +ffffffff81c6a000 T radeon_acpi_is_pcie_performance_request_supported +ffffffff81c6a050 T radeon_acpi_pcie_notify_device_ready +ffffffff81c6a170 T radeon_acpi_pcie_performance_request +ffffffff81c6a500 T radeon_acpi_init +ffffffff81c6ac80 t radeon_acpi_event +ffffffff81c6af80 T radeon_acpi_fini +ffffffff81c6b000 T radeon_agp_head_init +ffffffff81c6b050 T radeon_agp_init +ffffffff81c6b0a0 T radeon_agp_resume +ffffffff81c6b130 T radeon_agp_fini +ffffffff81c6b180 T radeon_agp_suspend +ffffffff81c6c000 T radeon_agp_disable +ffffffff81c6c120 T radeon_asic_init +ffffffff81c6c8f0 t radeon_invalid_rreg +ffffffff81c6c930 t radeon_invalid_wreg +ffffffff81c6c970 t radeon_invalid_get_allowed_info_register +ffffffff81c6d000 T radeon_atombios_i2c_init +ffffffff81c6d3a0 T radeon_atombios_lookup_gpio +ffffffff81c6d4a0 T radeon_get_atom_connector_info_from_object_table +ffffffff81c6dde0 t radeon_lookup_i2c_gpio +ffffffff81c6e0d0 t radeon_atom_apply_quirks +ffffffff81c6e4f0 T radeon_get_atom_connector_info_from_supported_devices_table +ffffffff81c6e9f0 T radeon_atom_get_clock_info +ffffffff81c6edd0 T radeon_atombios_sideport_present +ffffffff81c6ee80 T radeon_atombios_get_tmds_info +ffffffff81c6efc0 T radeon_atombios_get_ppll_ss_info +ffffffff81c6f0e0 T radeon_atombios_get_asic_ss_info +ffffffff81c6f3c0 t radeon_atombios_get_igp_ss_overrides +ffffffff81c6f4d0 T radeon_atombios_get_lvds_info +ffffffff81c6f830 T radeon_atombios_get_primary_dac_info +ffffffff81c6f8f0 T radeon_atom_get_tv_timings +ffffffff81c6fb30 T radeon_atombios_get_tv_info +ffffffff81c6fbf0 T radeon_atombios_get_tv_dac_info +ffffffff81c6fcf0 T radeon_atombios_get_default_voltages +ffffffff81c6fdb0 T radeon_atombios_get_power_modes +ffffffff81c70e20 T radeon_atom_get_clock_dividers +ffffffff81c71110 T radeon_atom_get_memory_pll_dividers +ffffffff81c71250 T radeon_atom_set_clock_gating +ffffffff81c712a0 T radeon_atom_get_engine_clock +ffffffff81c712f0 T radeon_atom_get_memory_clock +ffffffff81c71340 T radeon_atom_set_engine_clock +ffffffff81c71390 T radeon_atom_set_memory_clock +ffffffff81c713f0 T radeon_atom_set_engine_dram_timings +ffffffff81c71460 T radeon_atom_update_memory_dll +ffffffff81c714b0 T radeon_atom_set_ac_timing +ffffffff81c71500 T radeon_atom_set_voltage +ffffffff81c715d0 T radeon_atom_get_max_vddc +ffffffff81c716b0 T radeon_atom_get_leakage_vddc_based_on_leakage_idx +ffffffff81c71780 T radeon_atom_get_leakage_id_from_vbios +ffffffff81c71840 T radeon_atom_get_leakage_vddc_based_on_leakage_params +ffffffff81c71a60 T radeon_atom_get_voltage_evv +ffffffff81c71b20 T radeon_atom_get_voltage_gpio_settings +ffffffff81c71c20 T radeon_atom_is_voltage_gpio +ffffffff81c71db0 T radeon_atom_get_svi2_info +ffffffff81c71ea0 T radeon_atom_get_max_voltage +ffffffff81c72030 T radeon_atom_get_min_voltage +ffffffff81c72170 T radeon_atom_get_voltage_step +ffffffff81c72270 T radeon_atom_round_to_true_voltage +ffffffff81c723d0 T radeon_atom_get_voltage_table +ffffffff81c72640 T radeon_atom_get_memory_info +ffffffff81c727f0 T radeon_atom_get_mclk_range_table +ffffffff81c72a30 T radeon_atom_init_mc_reg_table +ffffffff81c72ca0 T radeon_atom_initialize_bios_scratch_regs +ffffffff81c72d70 T radeon_save_bios_scratch_regs +ffffffff81c72e50 T radeon_restore_bios_scratch_regs +ffffffff81c72f30 T radeon_atom_output_lock +ffffffff81c72fc0 T radeon_atombios_connected_scratch_regs +ffffffff81c73730 T radeon_atombios_encoder_crtc_scratch_regs +ffffffff81c73880 T radeon_atombios_encoder_dpms_scratch_regs +ffffffff81c73ab0 t radeon_atombios_parse_misc_flags_1_3 +ffffffff81c73c90 t radeon_atombios_add_pplib_thermal_controller +ffffffff81c74090 t radeon_atombios_parse_pplib_clock_info +ffffffff81c74440 t radeon_atombios_parse_pplib_non_clock_info +ffffffff81c75000 T radeon_audio_init +ffffffff81c752a0 T radeon_audio_endpoint_rreg +ffffffff81c752e0 T radeon_audio_endpoint_wreg +ffffffff81c75320 T radeon_audio_get_pin +ffffffff81c75370 T radeon_audio_detect +ffffffff81c75690 T radeon_audio_fini +ffffffff81c757e0 T radeon_audio_mode_set +ffffffff81c75830 T radeon_audio_dpms +ffffffff81c75880 T radeon_audio_decode_dfs_div +ffffffff81c758e0 t radeon_audio_hdmi_mode_set +ffffffff81c75fc0 t radeon_audio_write_speaker_allocation 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combios_setup_i2c_bus +ffffffff81c7d0a0 t radeon_combios_get_i2c_info_from_table +ffffffff81c7d2f0 T radeon_combios_get_clock_info +ffffffff81c7d4e0 T radeon_combios_sideport_present +ffffffff81c7d560 T radeon_combios_get_primary_dac_info +ffffffff81c7d6b0 T radeon_combios_get_tv_info +ffffffff81c7d7b0 T radeon_combios_get_tv_dac_info +ffffffff81c7da40 T radeon_combios_get_lvds_info +ffffffff81c7e0b0 T radeon_legacy_get_tmds_info_from_table +ffffffff81c7e180 T radeon_legacy_get_tmds_info_from_combios +ffffffff81c7e390 T radeon_legacy_get_ext_tmds_info_from_table +ffffffff81c7e5c0 T radeon_legacy_get_ext_tmds_info_from_combios +ffffffff81c7e900 T radeon_get_legacy_connector_info_from_table +ffffffff81c80a70 T radeon_get_legacy_connector_info_from_bios +ffffffff81c81660 T radeon_combios_get_power_modes +ffffffff81c81d30 T radeon_external_tmds_setup +ffffffff81c81e00 T radeon_combios_external_tmds_setup +ffffffff81c82380 T radeon_combios_asic_init +ffffffff81c828d0 t combios_parse_mmio_table +ffffffff81c82af0 t combios_parse_pll_table +ffffffff81c82dc0 T radeon_combios_initialize_bios_scratch_regs +ffffffff81c82e50 T radeon_combios_output_lock +ffffffff81c82eb0 T radeon_combios_connected_scratch_regs +ffffffff81c83210 T radeon_combios_encoder_crtc_scratch_regs +ffffffff81c832f0 T radeon_combios_encoder_dpms_scratch_regs +ffffffff81c84000 T radeon_connector_hotplug +ffffffff81c84100 T radeon_get_monitor_bpc +ffffffff81c84550 T radeon_connector_edid +ffffffff81c84600 T radeon_connector_encoder_get_dp_bridge_encoder_id +ffffffff81c84680 T radeon_connector_is_dp12_capable +ffffffff81c84720 T radeon_add_atom_connector +ffffffff81c855d0 T radeon_add_legacy_connector +ffffffff81c85ac0 t radeon_dp_detect +ffffffff81c85e60 t radeon_dvi_force +ffffffff81c85eb0 t radeon_connector_set_property +ffffffff81c866f0 t radeon_connector_unregister +ffffffff81c86750 t radeon_connector_destroy +ffffffff81c867c0 t radeon_best_single_encoder +ffffffff81c86830 t radeon_connector_get_edid +ffffffff81c86990 t radeon_dp_get_modes +ffffffff81c86c90 t radeon_dp_mode_valid +ffffffff81c86e60 t radeon_dvi_encoder +ffffffff81c86f20 t radeon_fixup_lvds_native_mode +ffffffff81c87060 t radeon_add_common_modes +ffffffff81c87150 t radeon_fp_native_mode +ffffffff81c87230 t radeon_lvds_set_property +ffffffff81c87320 t radeon_vga_detect +ffffffff81c875c0 t radeon_connector_analog_encoder_conflict_solve +ffffffff81c877e0 t radeon_vga_get_modes +ffffffff81c878c0 t radeon_vga_mode_valid +ffffffff81c87920 t radeon_dvi_detect +ffffffff81c87f90 t radeon_dvi_mode_valid +ffffffff81c88110 t radeon_tv_detect +ffffffff81c88350 t radeon_tv_get_modes +ffffffff81c88430 t radeon_tv_mode_valid +ffffffff81c88480 t radeon_lvds_detect +ffffffff81c88620 t radeon_lvds_get_modes +ffffffff81c88760 t radeon_lvds_mode_valid +ffffffff81c89000 T radeon_cs_parser_init +ffffffff81c89490 T radeon_cs_ioctl +ffffffff81c89c70 t radeon_cs_parser_fini +ffffffff81c89df0 t radeon_cs_ib_vm_chunk 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radeon_wb_disable +ffffffff81c8c5f0 T radeon_wb_fini +ffffffff81c8c690 t radeon_bo_reserve +ffffffff81c8c800 t radeon_bo_unreserve +ffffffff81c8c8e0 T radeon_wb_init +ffffffff81c8cbc0 T radeon_vram_location +ffffffff81c8cce0 T radeon_gtt_location +ffffffff81c8ce10 T radeon_device_is_virtual +ffffffff81c8ce40 T radeon_card_posted +ffffffff81c8d050 T radeon_update_bandwidth_info +ffffffff81c8d0d0 T radeon_boot_test_post_card +ffffffff81c8d190 T radeon_dummy_page_init +ffffffff81c8d250 T radeon_dummy_page_fini +ffffffff81c8d2b0 T radeon_atombios_init +ffffffff81c8d440 t cail_reg_read +ffffffff81c8d4a0 t cail_reg_write +ffffffff81c8d500 t cail_ioreg_read +ffffffff81c8d520 t cail_ioreg_write +ffffffff81c8d540 t cail_mc_read +ffffffff81c8d570 t cail_mc_write +ffffffff81c8d5a0 t cail_pll_read +ffffffff81c8d5d0 t cail_pll_write +ffffffff81c8d600 T radeon_atombios_fini +ffffffff81c8d6b0 T radeon_combios_init +ffffffff81c8d6f0 T radeon_combios_fini +ffffffff81c8d720 T radeon_device_init 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radeon_unpin_work_func +ffffffff81c92e20 t radeon_bo_reserve +ffffffff81c92f90 t radeon_bo_unreserve +ffffffff81c94000 T radeon_dp_aux_transfer_native +ffffffff81c95000 T radeondrm_probe +ffffffff81c95060 T radeondrm_attach_kms +ffffffff81c957a0 T radeondrm_detach_kms +ffffffff81c95830 T radeondrm_activate_kms +ffffffff81c958f0 T radeondrm_wsioctl +ffffffff81c959b0 T radeondrm_wsmmap +ffffffff81c959e0 T radeondrm_alloc_screen +ffffffff81c95a10 T radeondrm_free_screen +ffffffff81c95a20 T radeondrm_show_screen +ffffffff81c95b00 T radeondrm_enter_ddb +ffffffff81c95b60 T radeondrm_doswitch +ffffffff81c95bf0 T radeondrm_setpal +ffffffff81c95e10 T radeondrm_attachhook +ffffffff81c96140 T radeondrm_forcedetach +ffffffff81c97000 T radeon_setup_encoder_clones +ffffffff81c970b0 T radeon_get_encoder_enum +ffffffff81c97230 T radeon_link_encoder_connector +ffffffff81c97380 T radeon_encoder_set_active_device +ffffffff81c97440 T radeon_get_connector_for_encoder +ffffffff81c974b0 T radeon_get_connector_for_encoder_init +ffffffff81c97520 T radeon_get_external_encoder +ffffffff81c975b0 T radeon_encoder_get_dp_bridge_encoder_id +ffffffff81c97650 T radeon_panel_mode_fixup +ffffffff81c97820 T radeon_dig_monitor_is_duallink +ffffffff81c97940 T radeon_encoder_is_digital +ffffffff81c98000 T radeon_align_pitch +ffffffff81c98090 T radeon_fbdev_init +ffffffff81c981e0 T radeondrm_burner_cb +ffffffff81c98210 T radeon_fbdev_fini +ffffffff81c98280 T radeon_fbdev_set_suspend +ffffffff81c982d0 T radeon_fbdev_robj_is_fb +ffffffff81c98320 T radeondrm_burner +ffffffff81c983a0 t radeonfb_create +ffffffff81c987b0 t radeon_bo_reserve +ffffffff81c98920 t radeon_bo_unreserve +ffffffff81c99000 T radeon_fence_emit +ffffffff81c99120 T radeon_fence_process +ffffffff81c991e0 t radeon_fence_activity +ffffffff81c99450 T radeon_fence_signaled +ffffffff81c994c0 t radeon_fence_seq_signaled +ffffffff81c995b0 T radeon_fence_wait_timeout +ffffffff81c996e0 t radeon_fence_wait_seq_timeout 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radeon_gem_object_mmap +ffffffff81c9d670 T radeon_gem_info_ioctl +ffffffff81c9d6e0 T radeon_gem_pread_ioctl +ffffffff81c9d730 T radeon_gem_pwrite_ioctl +ffffffff81c9d780 T radeon_gem_create_ioctl +ffffffff81c9d8a0 T radeon_gem_userptr_ioctl +ffffffff81c9d8d0 T radeon_gem_set_domain_ioctl +ffffffff81c9da30 T radeon_mode_dumb_mmap +ffffffff81c9dae0 T radeon_gem_mmap_ioctl +ffffffff81c9dba0 T radeon_gem_busy_ioctl +ffffffff81c9dc50 T radeon_gem_wait_idle_ioctl +ffffffff81c9dd60 T radeon_gem_set_tiling_ioctl +ffffffff81c9de10 T radeon_gem_get_tiling_ioctl +ffffffff81c9dee0 t radeon_bo_reserve +ffffffff81c9e0e0 t radeon_bo_unreserve +ffffffff81c9e1c0 T radeon_gem_va_ioctl +ffffffff81c9e470 t radeon_gem_va_update_vm +ffffffff81c9e5c0 T radeon_gem_op_ioctl +ffffffff81c9e6c0 T radeon_mode_dumb_create +ffffffff81c9e7c0 T radeon_gem_debugfs_init +ffffffff81c9f000 T radeon_ddc_probe +ffffffff81c9f0c0 T radeon_router_select_ddc_port +ffffffff81c9f320 T radeon_bb_set_bits +ffffffff81c9f490 T radeon_bb_set_dir +ffffffff81c9f4c0 T radeon_bb_read_bits +ffffffff81c9f5a0 T radeon_acquire_bus +ffffffff81c9f9f0 T radeon_release_bus +ffffffff81c9fb60 T radeon_send_start +ffffffff81c9fb80 T radeon_send_stop +ffffffff81c9fba0 T radeon_initiate_xfer +ffffffff81c9fbc0 T radeon_read_byte +ffffffff81c9fbe0 T radeon_write_byte +ffffffff81c9fc00 T radeon_i2c_create +ffffffff81c9fe10 T radeon_i2c_destroy +ffffffff81c9fe90 T radeon_i2c_init +ffffffff81c9fee0 T radeon_i2c_fini +ffffffff81c9ff90 T radeon_i2c_add +ffffffff81ca0140 T radeon_i2c_lookup +ffffffff81ca0310 T radeon_i2c_get_byte +ffffffff81ca03e0 T radeon_i2c_put_byte +ffffffff81ca0470 T radeon_router_select_cd_port +ffffffff81ca06d0 t radeon_hw_i2c_xfer +ffffffff81ca1270 t radeon_hw_i2c_func +ffffffff81ca12a0 t r100_hw_i2c_xfer +ffffffff81ca1960 t radeon_get_i2c_prescale +ffffffff81ca2000 T radeon_ib_get +ffffffff81ca2100 T radeon_ib_free +ffffffff81ca2150 T radeon_ib_schedule +ffffffff81ca23e0 T radeon_ib_pool_init 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radeon_legacy_backlight_get_brightness +ffffffff81ca9610 T radeon_add_legacy_encoder +ffffffff81ca9970 t radeon_legacy_backlight_update_status +ffffffff81ca9a10 t radeon_lvds_enc_destroy +ffffffff81ca9aa0 t radeon_legacy_lvds_dpms +ffffffff81ca9af0 t radeon_legacy_mode_fixup +ffffffff81ca9b60 t radeon_legacy_lvds_prepare +ffffffff81ca9bf0 t radeon_legacy_lvds_commit +ffffffff81ca9c70 t radeon_legacy_lvds_mode_set +ffffffff81ca9e80 t radeon_legacy_encoder_disable +ffffffff81ca9ed0 t radeon_legacy_tmds_int_dpms +ffffffff81ca9f90 t radeon_legacy_tmds_int_prepare +ffffffff81caa060 t radeon_legacy_tmds_int_commit +ffffffff81caa130 t radeon_legacy_tmds_int_mode_set +ffffffff81caa390 t radeon_legacy_primary_dac_dpms +ffffffff81caa4d0 t radeon_legacy_primary_dac_prepare +ffffffff81caa530 t radeon_legacy_primary_dac_commit +ffffffff81caa580 t radeon_legacy_primary_dac_mode_set +ffffffff81caa710 t radeon_legacy_primary_dac_detect +ffffffff81caa900 t radeon_legacy_tv_dac_dpms +ffffffff81caab10 t radeon_legacy_tv_dac_prepare +ffffffff81caab70 t radeon_legacy_tv_dac_commit +ffffffff81caabc0 t radeon_legacy_tv_dac_mode_set +ffffffff81caaf60 t radeon_legacy_tv_dac_detect +ffffffff81cabb60 t radeon_ext_tmds_enc_destroy +ffffffff81cabbb0 t radeon_legacy_tmds_ext_dpms +ffffffff81cabc80 t radeon_legacy_tmds_ext_prepare +ffffffff81cabd50 t radeon_legacy_tmds_ext_commit +ffffffff81cabe20 t radeon_legacy_tmds_ext_mode_set +ffffffff81cac000 T radeon_legacy_tv_mode_set +ffffffff81cad0f0 T radeon_legacy_tv_adjust_crtc_reg +ffffffff81cad200 T radeon_legacy_tv_adjust_pll1 +ffffffff81cad300 T radeon_legacy_tv_adjust_pll2 +ffffffff81cae000 T radeon_ttm_bo_is_radeon_bo +ffffffff81cae040 t radeon_ttm_bo_destroy +ffffffff81cae170 T radeon_ttm_placement_from_domain +ffffffff81cae2e0 T radeon_bo_create +ffffffff81cae4b0 T radeon_bo_kmap +ffffffff81cae590 T radeon_bo_check_tiling +ffffffff81cae670 T radeon_bo_kunmap +ffffffff81cae700 T radeon_bo_ref +ffffffff81cae740 T radeon_bo_unref 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T radeon_pm_resume +ffffffff81cb1b70 T radeon_pm_init +ffffffff81cb2280 T radeon_pm_late_init +ffffffff81cb2340 T radeon_pm_fini +ffffffff81cb2460 t radeon_dpm_thermal_work_handler +ffffffff81cb2540 t radeon_dynpm_idle_work_handler +ffffffff81cb2850 t __delayed_work_tick +ffffffff81cb3000 T radeon_gem_prime_get_sg_table +ffffffff81cb3030 T radeon_gem_prime_pin +ffffffff81cb30c0 t radeon_bo_reserve +ffffffff81cb3230 t radeon_bo_unreserve +ffffffff81cb3310 T radeon_gem_prime_unpin +ffffffff81cb3390 T radeon_gem_prime_export +ffffffff81cb4000 T radeon_ring_supports_scratch_reg +ffffffff81cb4030 T radeon_ring_free_size +ffffffff81cb40e0 T radeon_ring_lockup_update +ffffffff81cb4140 T radeon_ring_alloc +ffffffff81cb42c0 T radeon_ring_lock +ffffffff81cb4340 T radeon_ring_commit +ffffffff81cb4440 T radeon_ring_unlock_commit +ffffffff81cb4470 T radeon_ring_undo +ffffffff81cb44a0 T radeon_ring_unlock_undo +ffffffff81cb44c0 T radeon_ring_test_lockup +ffffffff81cb45e0 T radeon_ring_backup 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radeon_ttm_io_mem_reserve +ffffffff81cbbf00 t radeon_ttm_tt_unbind +ffffffff81cbbfb0 t ttm_bo_move_null +ffffffff81cbc030 t radeon_move_blit +ffffffff81cbd000 T radeon_ucode_print_mc_hdr +ffffffff81cbd0b0 t radeon_ucode_print_common_hdr +ffffffff81cbd1e0 T radeon_ucode_print_smc_hdr +ffffffff81cbd270 T radeon_ucode_print_gfx_hdr +ffffffff81cbd340 T radeon_ucode_print_rlc_hdr +ffffffff81cbd440 T radeon_ucode_print_sdma_hdr +ffffffff81cbd520 T radeon_ucode_validate +ffffffff81cbe000 T radeon_uvd_init +ffffffff81cbe4f0 t radeon_uvd_idle_work_handler +ffffffff81cbe660 t radeon_bo_reserve +ffffffff81cbe860 t radeon_bo_unreserve +ffffffff81cbe940 T radeon_uvd_fini +ffffffff81cbea10 T radeon_uvd_suspend +ffffffff81cbebd0 T radeon_uvd_note_usage +ffffffff81cbee10 T radeon_uvd_get_destroy_msg +ffffffff81cbef20 T radeon_uvd_resume +ffffffff81cbefb0 T radeon_uvd_force_into_uvd_segment +ffffffff81cbf050 T radeon_uvd_free_handles +ffffffff81cbf210 T radeon_uvd_cs_parse +ffffffff81cbf930 T radeon_uvd_get_create_msg +ffffffff81cbfab0 t radeon_uvd_send_msg +ffffffff81cbfc50 T radeon_uvd_calc_upll_dividers +ffffffff81cbfe20 T radeon_uvd_send_upll_ctlreq +ffffffff81cc0160 t __delayed_work_tick +ffffffff81cc1000 T radeon_vce_init +ffffffff81cc1620 t radeon_vce_idle_work_handler +ffffffff81cc16e0 t radeon_bo_reserve +ffffffff81cc1850 t radeon_bo_unreserve +ffffffff81cc1930 T radeon_vce_fini +ffffffff81cc19b0 T radeon_vce_suspend +ffffffff81cc1a90 T radeon_vce_resume +ffffffff81cc1be0 T radeon_vce_note_usage +ffffffff81cc1d00 T radeon_vce_free_handles +ffffffff81cc1dc0 T radeon_vce_get_destroy_msg +ffffffff81cc1ff0 T radeon_vce_get_create_msg +ffffffff81cc2340 T radeon_vce_cs_reloc +ffffffff81cc2440 T radeon_vce_cs_parse +ffffffff81cc2bb0 T radeon_vce_semaphore_emit +ffffffff81cc2d70 T radeon_vce_ib_execute +ffffffff81cc2f00 T radeon_vce_fence_emit +ffffffff81cc3130 T radeon_vce_ring_test +ffffffff81cc3280 T radeon_vce_ib_test +ffffffff81cc33a0 t __delayed_work_tick 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rs690_mc_rreg +ffffffff81ccd080 T rs690_mc_wreg +ffffffff81ccd100 T rs690_resume +ffffffff81ccd1f0 t rs690_startup +ffffffff81ccd4d0 T rs690_suspend +ffffffff81ccd530 T rs690_fini +ffffffff81ccd5e0 T rs690_init +ffffffff81cce000 T rs780_dpm_enable +ffffffff81ccebf0 T rs780_dpm_disable +ffffffff81ccecd0 T rs780_dpm_set_power_state +ffffffff81ccf0b0 t rs780_force_voltage +ffffffff81ccf1f0 t rs780_enable_voltage_scaling +ffffffff81ccf3b0 T rs780_dpm_setup_asic +ffffffff81ccf3e0 T rs780_dpm_display_configuration_changed +ffffffff81ccf530 T rs780_dpm_init +ffffffff81ccfaa0 T rs780_dpm_print_power_state +ffffffff81ccfb30 T rs780_dpm_fini +ffffffff81ccfbc0 T rs780_dpm_get_sclk +ffffffff81ccfc00 T rs780_dpm_get_mclk +ffffffff81ccfc30 T rs780_dpm_debugfs_print_current_performance_level +ffffffff81ccfc60 T rs780_dpm_get_current_sclk +ffffffff81ccfcf0 T rs780_dpm_get_current_mclk +ffffffff81ccfd20 T rs780_dpm_force_performance_level +ffffffff81ccff10 t rs780_force_fbdiv +ffffffff81cd1000 T rv515_ring_start +ffffffff81cd1af0 T rv515_mc_wait_for_idle +ffffffff81cd1b90 T rv515_vga_render_disable +ffffffff81cd1be0 T rv515_mc_rreg +ffffffff81cd1c70 T rv515_mc_wreg +ffffffff81cd1cf0 T rv515_debugfs +ffffffff81cd1d00 T rv515_mc_stop +ffffffff81cd2270 T rv515_mc_resume +ffffffff81cd2850 T rv515_clock_startup +ffffffff81cd2910 T rv515_resume +ffffffff81cd2b50 t rv515_startup +ffffffff81cd3020 T rv515_suspend +ffffffff81cd3090 T rv515_set_safe_registers +ffffffff81cd30d0 T rv515_fini +ffffffff81cd3180 T rv515_init +ffffffff81cd3460 T atom_rv515_force_tv_scaler +ffffffff81cd6b00 T rv515_bandwidth_avivo_update +ffffffff81cd6ca0 t rv515_crtc_bandwidth_compute +ffffffff81cd6fb0 t rv515_compute_mode_priority +ffffffff81cd7480 T rv515_bandwidth_update +ffffffff81cd8000 T rv6xx_dpm_enable +ffffffff81cd8800 t rv6xx_calculate_stepping_parameters +ffffffff81cd89e0 t rv6xx_program_stepping_parameters_except_lowest_entry +ffffffff81cd8fb0 t rv6xx_program_stepping_parameters_lowest_entry +ffffffff81cd9080 t rv6xx_enable_dynamic_pcie_gen2 +ffffffff81cd9240 T rv6xx_dpm_disable +ffffffff81cd94b0 T rv6xx_dpm_set_power_state +ffffffff81cd9ea0 T rv6xx_setup_asic +ffffffff81cd9fe0 T rv6xx_dpm_display_configuration_changed +ffffffff81cda060 T rv6xx_dpm_init +ffffffff81cda5a0 T rv6xx_dpm_print_power_state +ffffffff81cda660 T rv6xx_dpm_debugfs_print_current_performance_level +ffffffff81cda690 T rv6xx_dpm_get_current_sclk +ffffffff81cda700 T rv6xx_dpm_get_current_mclk +ffffffff81cda770 T rv6xx_dpm_fini +ffffffff81cda800 T rv6xx_dpm_get_sclk +ffffffff81cda840 T rv6xx_dpm_get_mclk +ffffffff81cda880 T rv6xx_dpm_force_performance_level +ffffffff81cdaa10 t rv6xx_generate_steps +ffffffff81cdad10 t rv6xx_output_stepping +ffffffff81cdae20 t rv6xx_program_mclk_stepping_entry +ffffffff81cdb090 t rv6xx_program_engine_spread_spectrum +ffffffff81cdb380 t rv6xx_step_sw_voltage +ffffffff81cdc000 T rv730_populate_sclk_value +ffffffff81cdc230 T rv730_populate_mclk_value +ffffffff81cdc470 T rv730_read_clock_registers +ffffffff81cdc590 T rv730_populate_smc_acpi_state +ffffffff81cdc740 T rv730_populate_smc_initial_state +ffffffff81cdc900 T rv730_program_memory_timing_parameters +ffffffff81cdcae0 T rv730_start_dpm +ffffffff81cdcb70 T rv730_stop_dpm +ffffffff81cdcc30 T rv730_program_dcodt +ffffffff81cdcd00 T rv730_get_odt_values +ffffffff81cdd000 T rv740_get_decoded_reference_divider +ffffffff81cdd0a0 T rv740_get_dll_speed +ffffffff81cdd2b0 T rv740_populate_sclk_value +ffffffff81cdd4b0 T rv740_populate_mclk_value +ffffffff81cdd860 T rv740_read_clock_registers +ffffffff81cdd990 T rv740_populate_smc_acpi_state +ffffffff81cddbc0 T rv740_enable_mclk_spread_spectrum +ffffffff81cddc10 T rv740_get_mclk_frequency_ratio +ffffffff81cde000 T rv770_set_uvd_clocks +ffffffff81cde570 T rv770_get_xclk +ffffffff81cde5d0 T rv770_page_flip +ffffffff81cde8d0 T rv770_page_flip_pending +ffffffff81cde940 T rv770_get_temp +ffffffff81cde9a0 T rv770_pm_misc +ffffffff81cdea80 T r700_cp_stop +ffffffff81cdeb00 T r700_cp_fini +ffffffff81cdeb90 T rv770_set_clk_bypass_mode +ffffffff81cdecb0 T r700_vram_gtt_location +ffffffff81cdee40 T rv770_resume +ffffffff81cdeed0 t rv770_init_golden_registers +ffffffff81cdf060 t rv770_startup +ffffffff81ce0c00 T rv770_suspend +ffffffff81ce0e20 T rv770_init +ffffffff81ce1210 t rv770_pcie_gart_fini +ffffffff81ce1390 T rv770_fini +ffffffff81ce1630 t rv770_uvd_start +ffffffff81ce16e0 t rv770_cp_load_microcode +ffffffff81ce19b0 t rv770_uvd_resume +ffffffff81ce2000 T rv770_copy_dma +ffffffff81ce3000 T rv770_get_ps +ffffffff81ce3030 T rv770_get_pi +ffffffff81ce3060 T evergreen_get_pi +ffffffff81ce3090 T rv770_restore_cgcg +ffffffff81ce3110 T rv770_stop_dpm +ffffffff81ce31d0 T rv770_dpm_enabled +ffffffff81ce3210 T rv770_enable_thermal_protection +ffffffff81ce3270 T rv770_enable_acpi_pm +ffffffff81ce32c0 T rv770_get_seq_value +ffffffff81ce3300 T rv770_write_smc_soft_register +ffffffff81ce3330 T rv770_populate_smc_t +ffffffff81ce34e0 T rv770_populate_smc_sp +ffffffff81ce3540 T rv770_map_clkf_to_ibias +ffffffff81ce35a0 T rv770_populate_vddc_value +ffffffff81ce3650 T rv770_populate_mvdd_value +ffffffff81ce36a0 T rv770_calculate_memory_refresh_rate +ffffffff81ce3720 T rv770_enable_backbias +ffffffff81ce3780 T rv770_setup_bsp +ffffffff81ce3870 T rv770_program_git +ffffffff81ce38c0 T rv770_program_tp +ffffffff81ce3940 T rv770_program_tpp +ffffffff81ce3980 T rv770_program_sstp +ffffffff81ce39c0 T rv770_program_engine_speed_parameters +ffffffff81ce3a10 T rv770_program_vc +ffffffff81ce3a60 T rv770_clear_vc +ffffffff81ce3aa0 T rv770_upload_firmware +ffffffff81ce3ae0 T rv770_populate_initial_mvdd_value +ffffffff81ce3b30 T rv770_get_memory_module_index +ffffffff81ce3b70 T rv770_enable_voltage_control +ffffffff81ce3bc0 T rv770_halt_smc +ffffffff81ce3c20 T rv770_resume_smc +ffffffff81ce3c70 T rv770_set_sw_state +ffffffff81ce3cd0 T rv770_set_boot_state +ffffffff81ce3d20 T rv770_set_uvd_clock_before_set_eng_clock +ffffffff81ce3d90 T rv770_set_uvd_clock_after_set_eng_clock +ffffffff81ce3e00 T rv770_restrict_performance_levels_before_switch +ffffffff81ce3e60 T rv770_dpm_force_performance_level +ffffffff81ce3f20 T r7xx_start_smc +ffffffff81ce3f50 T r7xx_stop_smc +ffffffff81ce3f80 T rv770_read_voltage_smio_registers +ffffffff81ce3fc0 T rv770_reset_smio_status +ffffffff81ce4080 T rv770_get_memory_type +ffffffff81ce40d0 T rv770_get_pcie_gen2_status +ffffffff81ce4140 T rv770_get_max_vddc +ffffffff81ce41a0 T rv770_program_response_times +ffffffff81ce42f0 T rv770_enable_auto_throttle_source +ffffffff81ce4470 T rv770_dpm_enable +ffffffff81ce54f0 T rv770_dpm_late_enable +ffffffff81ce5620 T rv770_dpm_disable +ffffffff81ce5990 T rv770_dpm_set_power_state +ffffffff81ce6080 t rv770_program_dcodt_after_state_switch +ffffffff81ce6100 T rv770_dpm_setup_asic +ffffffff81ce6470 T rv770_dpm_display_configuration_changed +ffffffff81ce64f0 T rv7xx_parse_power_table +ffffffff81ce6a70 T rv770_get_engine_memory_ss +ffffffff81ce6b00 T rv770_dpm_init +ffffffff81ce6d40 T rv770_dpm_print_power_state +ffffffff81ce6e60 T rv770_dpm_debugfs_print_current_performance_level +ffffffff81ce6e90 T rv770_dpm_get_current_sclk +ffffffff81ce6f00 T rv770_dpm_get_current_mclk +ffffffff81ce6f70 T rv770_dpm_fini +ffffffff81ce7000 T rv770_dpm_get_sclk +ffffffff81ce7050 T rv770_dpm_get_mclk +ffffffff81ce70a0 T rv770_dpm_vblank_too_short +ffffffff81ce7110 t rv770_convert_power_level_to_smc +ffffffff81ce8000 T rv770_copy_bytes_to_smc +ffffffff81ce8210 T rv770_start_smc +ffffffff81ce8260 T rv770_reset_smc +ffffffff81ce82b0 T rv770_stop_smc_clock +ffffffff81ce8300 T rv770_start_smc_clock +ffffffff81ce8350 T rv770_is_smc_running +ffffffff81ce8390 T rv770_send_msg_to_smc +ffffffff81ce8470 T rv770_wait_for_smc_inactive +ffffffff81ce8510 T rv770_load_smc_ucode +ffffffff81ce86a0 T rv770_read_smc_sram_dword +ffffffff81ce8760 T rv770_write_smc_sram_dword +ffffffff81ce9000 T si_get_allowed_info_register +ffffffff81ce9090 T si_get_xclk +ffffffff81ce9100 T si_get_temp +ffffffff81ce9150 T si_mc_load_microcode +ffffffff81ce9410 T dce6_bandwidth_update +ffffffff81ce95d0 t dce6_line_buffer_adjust +ffffffff81ce9780 t dce6_program_watermarks +ffffffff81cea230 T si_fence_ring_emit +ffffffff81cea690 T si_ring_ib_execute +ffffffff81ceae00 T si_gpu_check_soft_reset +ffffffff81ceafa0 T si_asic_reset +ffffffff81ceb320 t si_gpu_pci_config_reset +ffffffff81ceb640 T si_gfx_is_lockup +ffffffff81ceb6b0 T si_vram_gtt_location +ffffffff81ceb750 T si_pcie_gart_tlb_flush +ffffffff81ceb7a0 T si_ib_parse +ffffffff81cebe40 T si_vm_init +ffffffff81cebe80 T si_vm_fini +ffffffff81cebeb0 T si_vm_flush +ffffffff81cec550 T si_init_uvd_internal_cg +ffffffff81cec5a0 T si_get_csb_size +ffffffff81cec630 T si_get_csb_buffer +ffffffff81cec7b0 T si_rlc_reset +ffffffff81cec830 T si_irq_set +ffffffff81cecd20 t si_disable_interrupt_state +ffffffff81cecfa0 T si_irq_process +ffffffff81cee2a0 t si_irq_ack +ffffffff81cee890 T si_resume +ffffffff81cee920 t si_init_golden_registers +ffffffff81ceeae0 t si_startup +ffffffff81cf0f00 T si_suspend +ffffffff81cf11f0 t si_fini_cg +ffffffff81cf1290 T si_init +ffffffff81cf25f0 t si_cp_fini +ffffffff81cf26e0 t si_irq_fini +ffffffff81cf27b0 t si_pcie_gart_fini +ffffffff81cf28b0 T si_fini +ffffffff81cf2ad0 T si_get_gpu_clock_counter +ffffffff81cf2b90 T si_set_uvd_clocks +ffffffff81cf30f0 T si_set_vce_clocks +ffffffff81cf3630 t si_vce_send_vcepll_ctlreq +ffffffff81cf3870 t dce6_latency_watermark +ffffffff81cf3ab0 t si_rlc_stop +ffffffff81cf3c60 t si_vm_reg_valid +ffffffff81cf3dc0 t si_vm_packet3_cp_dma_check +ffffffff81cf3f30 t si_uvd_start +ffffffff81cf3fe0 t si_vce_start +ffffffff81cf40f0 t si_irq_init +ffffffff81cf4bd0 t si_cp_load_microcode +ffffffff81cf4fb0 t si_cp_resume +ffffffff81cf5e70 t si_uvd_resume +ffffffff81cf5f40 t si_vce_resume +ffffffff81cf6030 t pcie_capability_set_word +ffffffff81cf6140 t pcie_capability_read_word +ffffffff81cf61e0 t pcie_capability_clear_and_set_word +ffffffff81cf6300 t pcie_capability_write_word +ffffffff81cf63c0 t si_update_cg +ffffffff81cf6920 t si_enable_mgcg +ffffffff81cf6d40 t si_enable_cgcg +ffffffff81cf70d0 t request_firmware +ffffffff81cf7160 t release_firmware +ffffffff81cf8000 T si_dma_is_lockup +ffffffff81cf8080 T si_dma_vm_copy_pages +ffffffff81cf8170 T si_dma_vm_write_pages +ffffffff81cf82d0 T si_dma_vm_set_pages +ffffffff81cf8440 T si_dma_vm_flush +ffffffff81cf88b0 T si_copy_dma +ffffffff81cf9000 T si_dpm_force_performance_level +ffffffff81cf9160 T si_get_ddr3_mclk_frequency_ratio +ffffffff81cf91c0 T si_get_mclk_frequency_ratio +ffffffff81cf9240 T si_trim_voltage_table_to_fit_state_table +ffffffff81cf9350 T si_dpm_setup_asic +ffffffff81cf9520 T si_fan_ctrl_get_fan_speed_percent +ffffffff81cf95b0 T si_fan_ctrl_set_fan_speed_percent +ffffffff81cf9670 T si_fan_ctrl_set_mode +ffffffff81cf98c0 T si_fan_ctrl_get_mode +ffffffff81cf9910 T si_dpm_enable +ffffffff81cfac90 t si_init_smc_table +ffffffff81cfbea0 t si_init_smc_spll_table +ffffffff81cfc020 t si_init_arb_table_index +ffffffff81cfc0b0 t si_populate_mc_reg_table +ffffffff81cfc500 t si_initialize_smc_cac_tables +ffffffff81cfe150 t si_initialize_hardware_cac_manager +ffffffff81cfe200 t si_initialize_smc_dte_tables +ffffffff81cfe400 t si_populate_smc_tdp_limits +ffffffff81cfe600 t si_populate_smc_tdp_limits_2 +ffffffff81cfe6d0 t si_program_response_times +ffffffff81cfe7f0 t si_program_ds_registers +ffffffff81cfe880 t si_dpm_start_smc +ffffffff81cfe8b0 t si_enable_auto_throttle_source +ffffffff81cfea40 t si_thermal_start_thermal_controller +ffffffff81cfef00 T si_dpm_late_enable +ffffffff81cff050 T si_dpm_disable +ffffffff81cff3d0 t si_enable_power_containment +ffffffff81cff4a0 t si_enable_smc_cac +ffffffff81cff600 T si_dpm_pre_set_power_state +ffffffff81d00170 T si_dpm_set_power_state +ffffffff81d006d0 t si_halt_smc +ffffffff81d00730 t si_upload_sw_state +ffffffff81d01130 t si_upload_smc_data +ffffffff81d01270 t si_upload_ulv_state +ffffffff81d013b0 t si_upload_mc_reg_table +ffffffff81d01550 t si_set_pcie_lane_width_in_smc +ffffffff81d015f0 t si_resume_smc +ffffffff81d01650 t si_set_vce_clock +ffffffff81d016f0 t si_notify_link_speed_change_after_state_change +ffffffff81d01820 t si_set_power_state_conditionally_enable_ulv +ffffffff81d01900 t si_power_control_set_level +ffffffff81d01a90 T si_dpm_post_set_power_state +ffffffff81d01ac0 T si_dpm_display_configuration_changed +ffffffff81d01ba0 T si_dpm_init +ffffffff81d035e0 T si_dpm_fini +ffffffff81d03690 T si_dpm_debugfs_print_current_performance_level +ffffffff81d036e0 T si_dpm_get_current_sclk +ffffffff81d03750 T si_dpm_get_current_mclk +ffffffff81d037c0 t si_do_program_memory_timing_parameters +ffffffff81d03950 t si_populate_mvdd_value +ffffffff81d039d0 t si_convert_power_level_to_smc +ffffffff81d04280 t si_calculate_sclk_params +ffffffff81d044b0 t si_program_cac_config_registers +ffffffff81d05000 T si_copy_bytes_to_smc +ffffffff81d05240 T si_start_smc +ffffffff81d05280 T si_reset_smc +ffffffff81d052c0 T si_program_jump_on_start +ffffffff81d052f0 T si_stop_smc_clock +ffffffff81d05330 T si_start_smc_clock +ffffffff81d05370 T si_is_smc_running +ffffffff81d053d0 T si_send_msg_to_smc +ffffffff81d054a0 T si_wait_for_smc_inactive +ffffffff81d05540 T si_load_smc_ucode +ffffffff81d056e0 T si_read_smc_sram_dword +ffffffff81d057b0 T si_write_smc_sram_dword +ffffffff81d06000 T sumo_get_pi +ffffffff81d06030 T sumo_gfx_clockgating_initialize +ffffffff81d06110 T sumo_program_vc +ffffffff81d06150 T sumo_clear_vc +ffffffff81d06190 T sumo_program_sstp +ffffffff81d06210 T sumo_take_smu_control +ffffffff81d06240 T sumo_get_sleep_divider_from_id +ffffffff81d06270 T sumo_get_sleep_divider_id_from_clock +ffffffff81d06320 T sumo_dpm_enable +ffffffff81d069b0 T sumo_dpm_late_enable +ffffffff81d06f70 T sumo_dpm_disable +ffffffff81d072c0 T sumo_dpm_pre_set_power_state +ffffffff81d077b0 T sumo_dpm_set_power_state +ffffffff81d08260 T sumo_dpm_post_set_power_state +ffffffff81d08300 T sumo_dpm_setup_asic +ffffffff81d08400 T sumo_dpm_display_configuration_changed +ffffffff81d08430 T sumo_convert_vid2_to_vid7 +ffffffff81d08480 T sumo_construct_sclk_voltage_mapping_table +ffffffff81d08540 T sumo_construct_vid_mapping_table +ffffffff81d086b0 T sumo_dpm_init +ffffffff81d08f60 T sumo_dpm_print_power_state +ffffffff81d09080 T sumo_dpm_debugfs_print_current_performance_level +ffffffff81d090b0 T sumo_dpm_get_current_sclk +ffffffff81d09120 T sumo_dpm_get_current_mclk +ffffffff81d09150 T sumo_dpm_get_current_vddc +ffffffff81d09220 T sumo_dpm_fini +ffffffff81d092b0 T sumo_dpm_get_sclk +ffffffff81d09300 T sumo_dpm_get_mclk +ffffffff81d09330 T sumo_dpm_force_performance_level +ffffffff81d09720 t sumo_power_level_enable +ffffffff81d09950 t sumo_program_power_level +ffffffff81d0a000 T sumo_initialize_m3_arb +ffffffff81d0a2c0 T sumo_smu_notify_alt_vddnb_change +ffffffff81d0a360 t sumo_send_msg_to_smu +ffffffff81d0a4f0 T sumo_smu_pg_init +ffffffff81d0a510 T sumo_enable_boost_timer +ffffffff81d0a640 T sumo_set_tdp_limit +ffffffff81d0a6c0 T sumo_boost_state_enable +ffffffff81d0a710 T sumo_get_running_fw_version +ffffffff81d0b000 T trinity_dpm_enable_bapm +ffffffff81d0b080 T trinity_dpm_enable +ffffffff81d0b520 T trinity_dpm_late_enable +ffffffff81d0ba60 T trinity_dpm_disable +ffffffff81d0be50 T trinity_dpm_force_performance_level +ffffffff81d0bf00 T trinity_dpm_pre_set_power_state +ffffffff81d0c4c0 T trinity_dpm_set_power_state +ffffffff81d0ca30 T trinity_dpm_post_set_power_state +ffffffff81d0cad0 T trinity_dpm_setup_asic +ffffffff81d0cb30 T trinity_dpm_display_configuration_changed +ffffffff81d0cbc0 T trinity_dpm_init +ffffffff81d0d4a0 T trinity_dpm_print_power_state +ffffffff81d0d5b0 T trinity_dpm_debugfs_print_current_performance_level +ffffffff81d0d640 T trinity_dpm_get_current_sclk +ffffffff81d0d6a0 T trinity_dpm_get_current_mclk +ffffffff81d0d6d0 T trinity_dpm_fini +ffffffff81d0d770 T trinity_dpm_get_sclk +ffffffff81d0d7c0 T trinity_dpm_get_mclk +ffffffff81d0d7f0 t trinity_program_power_level +ffffffff81d0e000 T trinity_dpm_bapm_enable +ffffffff81d0e150 T trinity_dpm_config +ffffffff81d0e230 T trinity_dpm_force_state +ffffffff81d0e310 T trinity_dpm_n_levels_disabled +ffffffff81d0e3f0 T trinity_uvd_dpm_config +ffffffff81d0e4c0 T trinity_dpm_no_forced_level +ffffffff81d0e590 T trinity_dce_enable_voltage_adjustment +ffffffff81d0e6e0 T trinity_gfx_dynamic_mgpg_config +ffffffff81d0e7b0 T trinity_acquire_mutex +ffffffff81d0e840 T trinity_release_mutex +ffffffff81d0f000 T uvd_v1_0_get_rptr +ffffffff81d0f040 T uvd_v1_0_get_wptr +ffffffff81d0f080 T uvd_v1_0_set_wptr +ffffffff81d0f0c0 T uvd_v1_0_fence_emit +ffffffff81d0f4b0 T uvd_v1_0_resume +ffffffff81d0f610 T uvd_v1_0_init +ffffffff81d0fb90 T uvd_v1_0_start +ffffffff81d10310 T uvd_v1_0_fini +ffffffff81d10480 T uvd_v1_0_stop +ffffffff81d105f0 T uvd_v1_0_ring_test +ffffffff81d107c0 T uvd_v1_0_semaphore_emit +ffffffff81d107f0 T uvd_v1_0_ib_execute +ffffffff81d10980 T uvd_v1_0_ib_test +ffffffff81d11000 T uvd_v2_2_fence_emit +ffffffff81d11450 T uvd_v2_2_semaphore_emit +ffffffff81d11650 T uvd_v2_2_resume +ffffffff81d12000 T uvd_v3_1_semaphore_emit +ffffffff81d13000 T uvd_v4_2_resume +ffffffff81d14000 T vce_v1_0_get_rptr +ffffffff81d14090 T vce_v1_0_get_wptr +ffffffff81d14120 T vce_v1_0_set_wptr +ffffffff81d141b0 T vce_v1_0_enable_mgcg +ffffffff81d14470 T vce_v1_0_load_fw +ffffffff81d14640 T vce_v1_0_bo_size +ffffffff81d146b0 T vce_v1_0_resume +ffffffff81d15020 T vce_v1_0_start +ffffffff81d157e0 T vce_v1_0_init +ffffffff81d16000 T vce_v2_0_enable_mgcg +ffffffff81d16070 t vce_v2_0_set_dyn_cg +ffffffff81d16260 T vce_v2_0_bo_size +ffffffff81d162d0 T vce_v2_0_resume +ffffffff81d17000 T aldebaran_reset_init +ffffffff81d170c0 t aldebaran_async_reset +ffffffff81d17120 t aldebaran_get_reset_handler +ffffffff81d171c0 T aldebaran_reset_fini +ffffffff81d17220 t aldebaran_mode2_prepare_hwcontext +ffffffff81d17340 t aldebaran_mode2_perform_reset +ffffffff81d17500 t aldebaran_mode2_restore_hwcontext +ffffffff81d179e0 t aldebaran_mode2_reset +ffffffff81d18000 T aldebaran_reg_base_init +ffffffff81d19000 T amdgpu_acpi_is_pcie_performance_request_supported +ffffffff81d19040 T amdgpu_acpi_is_power_shift_control_supported +ffffffff81d19070 T amdgpu_acpi_pcie_notify_device_ready +ffffffff81d19180 T amdgpu_acpi_pcie_performance_request +ffffffff81d19500 T amdgpu_acpi_power_shift_control +ffffffff81d19640 T amdgpu_acpi_smart_shift_update +ffffffff81d196e0 T amdgpu_acpi_init +ffffffff81d197a0 t amdgpu_acpi_event +ffffffff81d19ab0 T amdgpu_acpi_get_backlight_caps +ffffffff81d19b00 T amdgpu_acpi_fini +ffffffff81d19b20 T amdgpu_acpi_should_gpu_reset +ffffffff81d19b70 T amdgpu_acpi_detect +ffffffff81d1b000 T amdgpu_afmt_acr +ffffffff81d1c000 T amdgpu_amdkfd_init +ffffffff81d1c040 T amdgpu_amdkfd_fini +ffffffff81d1c070 T amdgpu_amdkfd_device_probe +ffffffff81d1c0a0 T amdgpu_amdkfd_device_init +ffffffff81d1c260 t amdgpu_amdkfd_reset_work +ffffffff81d1c2e0 T amdgpu_amdkfd_device_fini_sw +ffffffff81d1c330 T amdgpu_amdkfd_interrupt +ffffffff81d1c360 T amdgpu_amdkfd_suspend +ffffffff81d1c390 T amdgpu_amdkfd_resume_iommu +ffffffff81d1c3c0 T amdgpu_amdkfd_resume +ffffffff81d1c3f0 T amdgpu_amdkfd_pre_reset +ffffffff81d1c420 T amdgpu_amdkfd_post_reset +ffffffff81d1c450 T amdgpu_amdkfd_gpu_reset +ffffffff81d1c4b0 T amdgpu_amdkfd_alloc_gtt_mem +ffffffff81d1c750 t amdgpu_bo_reserve +ffffffff81d1c8b0 t amdgpu_bo_unreserve +ffffffff81d1c990 T amdgpu_amdkfd_free_gtt_mem +ffffffff81d1ca00 T amdgpu_amdkfd_alloc_gws +ffffffff81d1cae0 T amdgpu_amdkfd_free_gws +ffffffff81d1cb20 T amdgpu_amdkfd_get_fw_version +ffffffff81d1cbd0 T amdgpu_amdkfd_get_local_mem_info +ffffffff81d1cca0 T amdgpu_amdkfd_get_gpu_clock_counter +ffffffff81d1cce0 T amdgpu_amdkfd_get_max_engine_clock_in_mhz +ffffffff81d1cd60 T amdgpu_amdkfd_get_cu_info +ffffffff81d1ceb0 T amdgpu_amdkfd_get_dmabuf_info +ffffffff81d1cff0 T amdgpu_amdkfd_get_xgmi_hops_count +ffffffff81d1d060 T amdgpu_amdkfd_get_xgmi_bandwidth_mbytes +ffffffff81d1d0f0 T amdgpu_amdkfd_get_pcie_bandwidth_mbytes +ffffffff81d1d250 T amdgpu_amdkfd_submit_ib +ffffffff81d1d3b0 T amdgpu_amdkfd_set_compute_idle +ffffffff81d1d400 T amdgpu_amdkfd_is_kfd_vmid +ffffffff81d1d440 T amdgpu_amdkfd_flush_gpu_tlb_vmid +ffffffff81d1d4e0 T amdgpu_amdkfd_flush_gpu_tlb_pasid +ffffffff81d1d510 T amdgpu_amdkfd_have_atomics_support +ffffffff81d1d540 T amdgpu_amdkfd_ras_poison_consumption_handler +ffffffff81d1d5a0 T amdgpu_amdkfd_ras_query_utcl2_poison_status +ffffffff81d1e000 T amdgpu_atom_execute_table +ffffffff81d1e0a0 t amdgpu_atom_execute_table_locked +ffffffff81d1e3c0 T amdgpu_atom_parse +ffffffff81d1e940 T amdgpu_atom_destroy +ffffffff81d1e980 T amdgpu_atom_asic_init +ffffffff81d1eaa0 t get_u32 +ffffffff81d1eb00 T amdgpu_atom_parse_data_header +ffffffff81d1eba0 T amdgpu_atom_parse_cmd_header +ffffffff81d1ec20 t atom_op_move +ffffffff81d1edf0 t atom_op_and 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amdgpu_atombios_scratch_regs_engine_hung +ffffffff81d24ab0 T amdgpu_atombios_scratch_regs_set_backlight_level +ffffffff81d24b10 T amdgpu_atombios_scratch_need_asic_init +ffffffff81d24b60 T amdgpu_atombios_copy_swap +ffffffff81d24b80 T amdgpu_atombios_fini +ffffffff81d24c30 T amdgpu_atombios_init +ffffffff81d24ed0 t cail_reg_read +ffffffff81d24ef0 t cail_reg_write +ffffffff81d24f10 t cail_mc_read +ffffffff81d24f40 t cail_mc_write +ffffffff81d24f70 t cail_pll_read +ffffffff81d24fa0 t cail_pll_write +ffffffff81d24fd0 T amdgpu_atombios_get_data_table +ffffffff81d26000 T amdgpu_atombios_crtc_overscan_setup +ffffffff81d26150 T amdgpu_atombios_crtc_scaler_setup +ffffffff81d261d0 T amdgpu_atombios_crtc_lock +ffffffff81d26230 T amdgpu_atombios_crtc_enable +ffffffff81d26290 T amdgpu_atombios_crtc_blank +ffffffff81d262f0 T amdgpu_atombios_crtc_powergate +ffffffff81d26360 T amdgpu_atombios_crtc_powergate_init +ffffffff81d263d0 T amdgpu_atombios_crtc_set_dtd_timing +ffffffff81d26500 T amdgpu_atombios_crtc_set_disp_eng_pll +ffffffff81d265f0 T amdgpu_atombios_crtc_set_dce_clock +ffffffff81d266e0 T amdgpu_atombios_crtc_program_pll +ffffffff81d26a00 T amdgpu_atombios_crtc_prepare_pll +ffffffff81d26f00 T amdgpu_atombios_crtc_set_pll +ffffffff81d28000 T amdgpu_atombios_dp_aux_init +ffffffff81d28090 t amdgpu_atombios_dp_aux_transfer +ffffffff81d28200 T amdgpu_atombios_dp_get_sinktype +ffffffff81d28270 T amdgpu_atombios_dp_get_dpcd +ffffffff81d28420 T amdgpu_atombios_dp_get_panel_mode +ffffffff81d28510 T amdgpu_atombios_dp_set_link_config +ffffffff81d28590 t amdgpu_atombios_dp_get_dp_link_config +ffffffff81d28720 T amdgpu_atombios_dp_mode_valid_helper +ffffffff81d287a0 T amdgpu_atombios_dp_needs_link_train +ffffffff81d28810 T amdgpu_atombios_dp_set_rx_power_state +ffffffff81d28890 T amdgpu_atombios_dp_link_train +ffffffff81d28df0 t amdgpu_atombios_dp_process_aux_ch +ffffffff81d28f50 t amdgpu_atombios_dp_get_adjust_train +ffffffff81d2a000 T amdgpu_atombios_encoder_get_backlight_level_from_reg +ffffffff81d2a050 T amdgpu_atombios_encoder_set_backlight_level_to_reg +ffffffff81d2a0a0 T amdgpu_atombios_encoder_get_backlight_level +ffffffff81d2a100 T amdgpu_atombios_encoder_set_backlight_level +ffffffff81d2a210 T amdgpu_atombios_encoder_setup_dig_transmitter +ffffffff81d2ac30 T amdgpu_atombios_encoder_init_backlight +ffffffff81d2add0 t amdgpu_atombios_encoder_get_backlight_brightness +ffffffff81d2ae30 T amdgpu_atombios_encoder_fini_backlight +ffffffff81d2aec0 T amdgpu_atombios_encoder_is_digital +ffffffff81d2af10 T amdgpu_atombios_encoder_mode_fixup +ffffffff81d2aff0 T amdgpu_atombios_encoder_get_encoder_mode +ffffffff81d2b190 T amdgpu_atombios_encoder_setup_dig_encoder +ffffffff81d2b670 t amdgpu_atombios_encoder_get_bpc +ffffffff81d2b6c0 T amdgpu_atombios_encoder_set_edp_panel_power +ffffffff81d2b7c0 T amdgpu_atombios_encoder_dpms +ffffffff81d2b930 t amdgpu_atombios_encoder_setup_dig +ffffffff81d2bce0 t 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amdgpu_atomfirmware_allocate_fb_scratch +ffffffff81d2f350 T amdgpu_atomfirmware_get_vram_info +ffffffff81d2f7c0 t convert_atom_mem_type_to_vram_type +ffffffff81d2f830 T amdgpu_atomfirmware_mem_ecc_supported +ffffffff81d2f8e0 T amdgpu_atomfirmware_sram_ecc_supported +ffffffff81d2f920 T amdgpu_atomfirmware_dynamic_boot_config_supported +ffffffff81d2f960 T amdgpu_atomfirmware_ras_rom_addr +ffffffff81d2fa10 T amdgpu_atomfirmware_get_clock_info +ffffffff81d2fc60 T amdgpu_atomfirmware_get_gfx_info +ffffffff81d2fe00 T amdgpu_atomfirmware_mem_training_supported +ffffffff81d2fe40 T amdgpu_atomfirmware_get_fw_reserved_fb_size +ffffffff81d2fed0 T amdgpu_atomfirmware_asic_init +ffffffff81d31000 T amdgpu_benchmark +ffffffff81d31790 t amdgpu_benchmark_move +ffffffff81d32000 T amdgpu_read_bios +ffffffff81d32190 t check_atom_bios +ffffffff81d322a0 T amdgpu_get_bios +ffffffff81d327c0 t igp_read_bios_from_vram +ffffffff81d32900 t amdgpu_read_platform_bios +ffffffff81d329d0 T amdgpu_soc15_read_bios_from_rom +ffffffff81d33000 T amdgpu_bo_list_create +ffffffff81d332a0 T amdgpu_bo_list_get +ffffffff81d33310 T amdgpu_bo_list_get_list +ffffffff81d33490 T amdgpu_bo_list_put +ffffffff81d33540 T amdgpu_bo_create_list_entry_array +ffffffff81d33690 T amdgpu_bo_list_ioctl +ffffffff81d34000 T amdgpu_cgs_create_device +ffffffff81d34080 T amdgpu_cgs_destroy_device +ffffffff81d340a0 t amdgpu_cgs_read_register +ffffffff81d340c0 t amdgpu_cgs_write_register +ffffffff81d340e0 t amdgpu_cgs_read_ind_register +ffffffff81d341c0 t amdgpu_cgs_write_ind_register +ffffffff81d34270 t amdgpu_cgs_get_firmware_info +ffffffff81d35000 T amdgpu_connector_hotplug +ffffffff81d35110 T amdgpu_connector_get_monitor_bpc +ffffffff81d353a0 T amdgpu_connector_edid +ffffffff81d35450 T amdgpu_connector_encoder_get_dp_bridge_encoder_id +ffffffff81d354d0 T amdgpu_connector_is_dp12_capable +ffffffff81d35560 T amdgpu_connector_add +ffffffff81d36150 t amdgpu_connector_dp_detect +ffffffff81d364a0 t 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amdgpu_vm_cpu_update +ffffffff81da8160 t amdgpu_vm_cpu_commit +ffffffff81da9000 T amdgpu_vm_pt_clear +ffffffff81da9420 T amdgpu_vm_pt_create +ffffffff81da9910 T amdgpu_vm_pt_free_work +ffffffff81da9bc0 t amdgpu_vm_pt_free +ffffffff81da9ca0 T amdgpu_vm_pt_free_root +ffffffff81da9cc0 t amdgpu_vm_pt_free_dfs +ffffffff81daa0f0 T amdgpu_vm_pt_is_root_clean +ffffffff81daa1c0 T amdgpu_vm_pde_update +ffffffff81daa2b0 T amdgpu_vm_ptes_update +ffffffff81daac00 t amdgpu_vm_pt_next +ffffffff81daad10 t amdgpu_vm_pt_next_dfs +ffffffff81daae50 t amdgpu_vm_pt_sibling +ffffffff81dab000 t amdgpu_vm_sdma_map_table +ffffffff81dab060 t amdgpu_vm_sdma_prepare +ffffffff81dab100 t amdgpu_vm_sdma_update +ffffffff81dab5b0 t amdgpu_vm_sdma_commit +ffffffff81dac000 T amdgpu_vram_mgr_bo_visible_size +ffffffff81dac100 T amdgpu_vram_mgr_reserve_range +ffffffff81dac1e0 t amdgpu_vram_mgr_do_reserve +ffffffff81dac360 T amdgpu_vram_mgr_query_page_status +ffffffff81dac440 T amdgpu_vram_mgr_alloc_sgt +ffffffff81dac490 T amdgpu_vram_mgr_free_sgt +ffffffff81dac4c0 T amdgpu_vram_mgr_vis_usage +ffffffff81dac4f0 T amdgpu_vram_mgr_init +ffffffff81dac6c0 T amdgpu_vram_mgr_fini +ffffffff81dac8e0 t amdgpu_vram_mgr_new +ffffffff81dace90 t amdgpu_vram_mgr_del +ffffffff81dacf70 t amdgpu_vram_mgr_intersects +ffffffff81dacff0 t amdgpu_vram_mgr_compatible +ffffffff81dad060 t amdgpu_vram_mgr_debug +ffffffff81dae000 t amdgpu_xgmi_hive_release +ffffffff81dae050 T amdgpu_get_xgmi_hive +ffffffff81dae0a0 T amdgpu_put_xgmi_hive +ffffffff81dae0f0 T amdgpu_xgmi_set_pstate +ffffffff81dae140 T amdgpu_xgmi_update_topology +ffffffff81dae1f0 T amdgpu_xgmi_get_hops_count +ffffffff81dae260 T amdgpu_xgmi_get_num_links +ffffffff81dae2d0 T amdgpu_xgmi_add_device +ffffffff81dae4f0 T amdgpu_xgmi_remove_device +ffffffff81dae640 T amdgpu_xgmi_get_relative_phy_addr +ffffffff81dae680 t amdgpu_ras_error_inject_xgmi +ffffffff81dae7f0 t amdgpu_xgmi_query_ras_error_count +ffffffff81daee30 t amdgpu_xgmi_reset_ras_error_count +ffffffff81daf150 t amdgpu_xgmi_ras_late_init +ffffffff81db0000 T arct_reg_base_init +ffffffff81db1000 T athub_v1_0_set_clockgating +ffffffff81db1210 T athub_v1_0_get_clockgating +ffffffff81db2000 T athub_v2_0_set_clockgating +ffffffff81db21e0 T athub_v2_0_get_clockgating +ffffffff81db3000 T athub_v2_1_set_clockgating +ffffffff81db31f0 T athub_v2_1_get_clockgating +ffffffff81db4000 T athub_v3_0_set_clockgating +ffffffff81db40d0 T athub_v3_0_get_clockgating +ffffffff81db4120 t athub_v3_0_get_cg_cntl +ffffffff81db41c0 t athub_v3_0_set_cg_cntl +ffffffff81db5000 t cz_ih_early_init +ffffffff81db5050 t cz_ih_sw_init +ffffffff81db50b0 t cz_ih_sw_fini +ffffffff81db50f0 t cz_ih_hw_init +ffffffff81db5310 t cz_ih_hw_fini +ffffffff81db53e0 t cz_ih_suspend +ffffffff81db54b0 t cz_ih_resume +ffffffff81db54f0 t cz_ih_is_idle +ffffffff81db5540 t cz_ih_wait_for_idle +ffffffff81db55e0 t cz_ih_soft_reset +ffffffff81db56c0 t cz_ih_set_clockgating_state +ffffffff81db56f0 t cz_ih_set_powergating_state +ffffffff81db5720 t cz_ih_get_wptr +ffffffff81db5810 t cz_ih_decode_iv +ffffffff81db5890 t cz_ih_set_rptr +ffffffff81db6000 T dce_v10_0_disable_dce +ffffffff81db6150 t dce_v10_0_early_init +ffffffff81db6210 t dce_v10_0_sw_init +ffffffff81db6510 t dce_v10_0_sw_fini +ffffffff81db6630 t dce_v10_0_hw_init +ffffffff81db6990 t dce_v10_0_hw_fini +ffffffff81db6b10 t dce_v10_0_suspend +ffffffff81db6b70 t dce_v10_0_resume +ffffffff81db6be0 t dce_v10_0_is_idle +ffffffff81db6c10 t dce_v10_0_wait_for_idle +ffffffff81db6c40 t dce_v10_0_check_soft_reset +ffffffff81db6c50 t dce_v10_0_soft_reset +ffffffff81db6d20 t dce_v10_0_set_clockgating_state +ffffffff81db6d50 t dce_v10_0_set_powergating_state +ffffffff81db6d80 t dce_v10_0_audio_endpt_rreg +ffffffff81db6e10 t dce_v10_0_audio_endpt_wreg +ffffffff81db6e90 t dce_v10_0_bandwidth_update +ffffffff81db7900 t dce_v10_0_vblank_get_counter +ffffffff81db7950 t dce_v10_0_hpd_sense +ffffffff81db79b0 t dce_v10_0_hpd_set_polarity +ffffffff81db7a80 t dce_v10_0_hpd_get_gpio_reg +ffffffff81db7ab0 t dce_v10_0_page_flip +ffffffff81db7bb0 t dce_v10_0_crtc_get_scanoutpos +ffffffff81db7c50 t dce_v10_0_encoder_add +ffffffff81db7ea0 t dce_v10_0_latency_watermark +ffffffff81db80d0 t dce_v10_0_encoder_destroy +ffffffff81db8130 t dce_v10_0_encoder_prepare +ffffffff81db8330 t dce_v10_0_encoder_commit +ffffffff81db8360 t dce_v10_0_encoder_mode_set +ffffffff81db92d0 t dce_v10_0_encoder_disable +ffffffff81db93e0 t dce_v10_0_ext_dpms +ffffffff81db9410 t dce_v10_0_ext_prepare +ffffffff81db9440 t dce_v10_0_ext_commit +ffffffff81db9470 t dce_v10_0_ext_mode_set +ffffffff81db94a0 t dce_v10_0_ext_disable +ffffffff81db94d0 t dce_v10_0_set_crtc_irq_state +ffffffff81db95b0 t dce_v10_0_crtc_irq +ffffffff81db97f0 t dce_v10_0_set_crtc_vblank_interrupt_state +ffffffff81db98c0 t dce_v10_0_set_crtc_vline_interrupt_state +ffffffff81db9990 t dce_v10_0_set_pageflip_irq_state +ffffffff81db9a40 t dce_v10_0_pageflip_irq +ffffffff81db9ba0 t dce_v10_0_set_hpd_irq_state +ffffffff81db9c70 t dce_v10_0_hpd_irq +ffffffff81db9d90 t dce_v10_0_afmt_init +ffffffff81db9ea0 t dce_v10_0_audio_init +ffffffff81db9f70 t dce_v10_0_crtc_cursor_set2 +ffffffff81dba230 t dce_v10_0_crtc_cursor_move +ffffffff81dba300 t dce_v10_0_crtc_gamma_set +ffffffff81dba340 t dce_v10_0_crtc_destroy +ffffffff81dba370 t amdgpu_bo_reserve +ffffffff81dba570 t amdgpu_bo_unreserve +ffffffff81dba650 t dce_v10_0_lock_cursor +ffffffff81dba6b0 t dce_v10_0_cursor_move_locked +ffffffff81dba810 t dce_v10_0_show_cursor +ffffffff81dba8b0 t dce_v10_0_crtc_load_lut +ffffffff81dbac40 t dce_v10_0_crtc_dpms +ffffffff81dbae20 t dce_v10_0_crtc_prepare +ffffffff81dbae60 t dce_v10_0_crtc_commit +ffffffff81dbae90 t dce_v10_0_crtc_mode_fixup +ffffffff81dbb040 t dce_v10_0_crtc_mode_set +ffffffff81dbb220 t dce_v10_0_crtc_set_base +ffffffff81dbb240 t dce_v10_0_crtc_set_base_atomic +ffffffff81dbb260 t dce_v10_0_crtc_disable +ffffffff81dbb3f0 t dce_v10_0_crtc_do_set_base +ffffffff81dbbaf0 t dce_v10_0_is_display_hung +ffffffff81dbc000 T dce_v11_0_disable_dce +ffffffff81dbc160 t dce_v11_0_early_init +ffffffff81dbc290 t dce_v11_0_sw_init +ffffffff81dbc590 t dce_v11_0_sw_fini +ffffffff81dbc6b0 t dce_v11_0_hw_init +ffffffff81dbca70 t dce_v11_0_hw_fini +ffffffff81dbcbf0 t dce_v11_0_suspend +ffffffff81dbcc50 t dce_v11_0_resume +ffffffff81dbccc0 t dce_v11_0_is_idle +ffffffff81dbccf0 t dce_v11_0_wait_for_idle +ffffffff81dbcd20 t dce_v11_0_soft_reset +ffffffff81dbcf30 t dce_v11_0_set_clockgating_state +ffffffff81dbcf60 t dce_v11_0_set_powergating_state +ffffffff81dbcf90 t dce_v11_0_audio_endpt_rreg +ffffffff81dbd020 t dce_v11_0_audio_endpt_wreg +ffffffff81dbd0a0 t dce_v11_0_bandwidth_update +ffffffff81dbdb10 t dce_v11_0_vblank_get_counter +ffffffff81dbdb60 t dce_v11_0_hpd_sense +ffffffff81dbdbc0 t dce_v11_0_hpd_set_polarity +ffffffff81dbdc90 t dce_v11_0_hpd_get_gpio_reg +ffffffff81dbdcc0 t dce_v11_0_page_flip +ffffffff81dbddc0 t dce_v11_0_crtc_get_scanoutpos +ffffffff81dbde60 t dce_v11_0_encoder_add +ffffffff81dbe0b0 t dce_v11_0_latency_watermark +ffffffff81dbe2e0 t dce_v11_0_encoder_destroy +ffffffff81dbe340 t dce_v11_0_encoder_prepare +ffffffff81dbe540 t dce_v11_0_encoder_commit +ffffffff81dbe570 t dce_v11_0_encoder_mode_set +ffffffff81dbf4e0 t dce_v11_0_encoder_disable +ffffffff81dbf5f0 t dce_v11_0_ext_dpms +ffffffff81dbf620 t dce_v11_0_ext_prepare +ffffffff81dbf650 t dce_v11_0_ext_commit +ffffffff81dbf680 t dce_v11_0_ext_mode_set +ffffffff81dbf6b0 t dce_v11_0_ext_disable +ffffffff81dbf6e0 t dce_v11_0_set_crtc_irq_state +ffffffff81dbf7c0 t dce_v11_0_crtc_irq +ffffffff81dbf9e0 t dce_v11_0_set_crtc_vblank_interrupt_state +ffffffff81dbfab0 t dce_v11_0_set_crtc_vline_interrupt_state +ffffffff81dbfb80 t dce_v11_0_set_pageflip_irq_state +ffffffff81dbfc30 t dce_v11_0_pageflip_irq +ffffffff81dbfd90 t dce_v11_0_set_hpd_irq_state +ffffffff81dbfe60 t dce_v11_0_hpd_irq +ffffffff81dbff80 t dce_v11_0_afmt_init +ffffffff81dc0090 t dce_v11_0_audio_init +ffffffff81dc0190 t dce_v11_0_crtc_cursor_set2 +ffffffff81dc0450 t dce_v11_0_crtc_cursor_move +ffffffff81dc0520 t dce_v11_0_crtc_gamma_set +ffffffff81dc0560 t dce_v11_0_crtc_destroy +ffffffff81dc0590 t amdgpu_bo_reserve +ffffffff81dc0790 t amdgpu_bo_unreserve +ffffffff81dc0870 t dce_v11_0_lock_cursor +ffffffff81dc08d0 t dce_v11_0_cursor_move_locked +ffffffff81dc0a30 t dce_v11_0_show_cursor +ffffffff81dc0ad0 t dce_v11_0_crtc_load_lut +ffffffff81dc0e30 t dce_v11_0_crtc_dpms +ffffffff81dc1010 t dce_v11_0_crtc_prepare +ffffffff81dc1050 t dce_v11_0_crtc_commit +ffffffff81dc1080 t dce_v11_0_crtc_mode_fixup +ffffffff81dc12f0 t dce_v11_0_crtc_mode_set +ffffffff81dc1550 t dce_v11_0_crtc_set_base +ffffffff81dc1570 t dce_v11_0_crtc_set_base_atomic +ffffffff81dc1590 t dce_v11_0_crtc_disable +ffffffff81dc1730 t dce_v11_0_crtc_do_set_base +ffffffff81dc2000 t df_v1_7_sw_init +ffffffff81dc2040 t df_v1_7_sw_fini +ffffffff81dc2070 t df_v1_7_enable_broadcast_mode +ffffffff81dc2190 t df_v1_7_get_fb_channel_number +ffffffff81dc2210 t df_v1_7_get_hbm_channel_number +ffffffff81dc2260 t df_v1_7_update_medium_grain_clock_gating +ffffffff81dc23d0 t df_v1_7_get_clockgating_state +ffffffff81dc2460 t df_v1_7_enable_ecc_force_par_wr_rmw +ffffffff81dc3000 t df_v3_6_sw_init +ffffffff81dc3150 t df_v3_6_sw_fini +ffffffff81dc3180 t df_v3_6_enable_broadcast_mode +ffffffff81dc32a0 t df_v3_6_get_fb_channel_number +ffffffff81dc3380 t df_v3_6_get_hbm_channel_number +ffffffff81dc33d0 t df_v3_6_update_medium_grain_clock_gating +ffffffff81dc3570 t df_v3_6_get_clockgating_state +ffffffff81dc3600 t df_v3_6_pmc_start +ffffffff81dc3900 t df_v3_6_pmc_stop +ffffffff81dc3ba0 t df_v3_6_pmc_get_count +ffffffff81dc3d30 t df_v3_6_get_fica +ffffffff81dc3e20 t df_v3_6_set_fica +ffffffff81dc3f00 t df_v3_6_query_ras_poison_mode +ffffffff81dc5000 T dimgrey_cavefish_reg_base_init +ffffffff81dc6000 T emu_soc_asic_init +ffffffff81dc7000 t gfx_v10_0_early_init +ffffffff81dc72f0 t gfx_v10_0_late_init +ffffffff81dc7360 t gfx_v10_0_sw_init +ffffffff81dc7890 t gfx_v10_0_sw_fini +ffffffff81dc7bd0 t gfx_v10_0_hw_init +ffffffff81dca740 t gfx_v10_0_hw_fini +ffffffff81dcaa30 t gfx_v10_0_suspend +ffffffff81dcaa70 t gfx_v10_0_resume +ffffffff81dcaa80 t gfx_v10_0_is_idle +ffffffff81dcab10 t gfx_v10_0_wait_for_idle +ffffffff81dcabf0 t gfx_v10_0_soft_reset +ffffffff81dcaf40 t gfx_v10_0_set_clockgating_state +ffffffff81dcb1e0 t gfx_v10_0_set_powergating_state +ffffffff81dcb2a0 t gfx_v10_0_get_clockgating_state +ffffffff81dcb3b0 t gfx10_kiq_set_resources +ffffffff81dcb6d0 t gfx10_kiq_map_queues +ffffffff81dcba60 t gfx10_kiq_unmap_queues +ffffffff81dcbe60 t gfx10_kiq_query_status +ffffffff81dcc150 t gfx10_kiq_invalidate_tlbs +ffffffff81dcc270 t gfx_v10_0_ring_get_rptr_compute +ffffffff81dcc2a0 t gfx_v10_0_ring_get_wptr_compute +ffffffff81dcc310 t gfx_v10_0_ring_set_wptr_compute +ffffffff81dcc450 t gfx_v10_0_ring_emit_ib_compute +ffffffff81dcc790 t gfx_v10_0_ring_emit_fence_kiq +ffffffff81dccbd0 t gfx_v10_0_ring_test_ring +ffffffff81dcce30 t gfx_v10_0_ring_test_ib +ffffffff81dcd0c0 t gfx_v10_0_ring_emit_rreg +ffffffff81dcd350 t gfx_v10_0_ring_emit_wreg +ffffffff81dcd580 t gfx_v10_0_ring_emit_reg_wait +ffffffff81dcd5d0 t gfx_v10_0_ring_emit_reg_write_reg_wait +ffffffff81dcd660 t gfx_v10_0_wait_reg_mem +ffffffff81dcd990 t gfx_v10_0_ring_get_rptr_gfx +ffffffff81dcd9c0 t gfx_v10_0_ring_get_wptr_gfx +ffffffff81dcdad0 t gfx_v10_0_ring_set_wptr_gfx +ffffffff81dcdce0 t gfx_v10_0_ring_emit_ib_gfx +ffffffff81dce380 t gfx_v10_0_ring_emit_fence +ffffffff81dce750 t gfx_v10_0_ring_emit_pipeline_sync +ffffffff81dce7b0 t gfx_v10_0_ring_emit_vm_flush +ffffffff81dce980 t gfx_v10_0_ring_emit_hdp_flush +ffffffff81dcea50 t gfx_v10_0_ring_emit_gds_switch +ffffffff81dceb30 t gfx_v10_0_ring_emit_init_cond_exec +ffffffff81dced60 t gfx_v10_0_ring_emit_patch_cond_exec +ffffffff81dcee20 t gfx_v10_0_ring_emit_sb +ffffffff81dcef10 t gfx_v10_0_ring_emit_cntxcntl +ffffffff81dcf400 t gfx_v10_0_ring_emit_frame_cntl +ffffffff81dcf510 t gfx_v10_0_ring_soft_recovery +ffffffff81dcf580 t gfx_v10_0_ring_preempt_ib +ffffffff81dcf6f0 t gfx_v10_0_emit_mem_sync +ffffffff81dcfa20 t gfx_v10_0_write_data_to_reg +ffffffff81dcfc30 t gfx_v10_0_set_eop_interrupt_state +ffffffff81dcfd10 t gfx_v10_0_eop_irq +ffffffff81dcfed0 t gfx_v10_0_set_gfx_eop_interrupt_state +ffffffff81dd0060 t gfx_v10_0_set_compute_eop_interrupt_state +ffffffff81dd0210 t gfx_v10_0_kiq_set_interrupt_state +ffffffff81dd04f0 t gfx_v10_0_kiq_irq +ffffffff81dd0570 t gfx_v10_0_set_priv_reg_fault_state +ffffffff81dd0690 t gfx_v10_0_priv_reg_irq +ffffffff81dd06f0 t gfx_v10_0_handle_priv_fault +ffffffff81dd0860 t gfx_v10_0_set_priv_inst_fault_state +ffffffff81dd0980 t gfx_v10_0_priv_inst_irq +ffffffff81dd09e0 t gfx_v10_0_is_rlc_enabled +ffffffff81dd0a60 t gfx_v10_0_set_safe_mode +ffffffff81dd0d00 t gfx_v10_0_unset_safe_mode +ffffffff81dd0db0 t gfx_v10_0_rlc_init +ffffffff81dd0e30 t gfx_v10_0_get_csb_size +ffffffff81dd0e60 t gfx_v10_0_get_csb_buffer +ffffffff81dd0fd0 t gfx_v10_0_rlc_resume +ffffffff81dd1a00 t gfx_v10_0_rlc_stop +ffffffff81dd1ae0 t gfx_v10_0_rlc_reset +ffffffff81dd1c80 t gfx_v10_0_rlc_start +ffffffff81dd1e20 t gfx_v10_0_update_spm_vmid +ffffffff81dd1f50 t gfx_v10_0_wait_for_rlc_autoload_complete +ffffffff81dd2830 t gfx_v10_0_init_csb +ffffffff81dd2b00 t gfx_v10_0_rlc_backdoor_autoload_config_mec_cache +ffffffff81dd2db0 t gfx_v10_0_is_rlcg_access_range +ffffffff81dd2de0 t gfx_v10_0_gfx_mqd_init +ffffffff81dd31c0 t gfx_v10_0_compute_mqd_init +ffffffff81dd3660 t gfx_v10_0_me_init +ffffffff81dd3e50 t gfx_v10_0_mec_init +ffffffff81dd4060 t gfx_v10_0_compute_ring_init +ffffffff81dd41a0 t gfx_v10_0_rlc_backdoor_autoload_buffer_init +ffffffff81dd4400 t gfx_v10_0_gpu_early_init +ffffffff81dd4660 t amdgpu_bo_unreserve +ffffffff81dd4740 t gfx_v10_0_get_gpu_clock_counter +ffffffff81dd4c40 t gfx_v10_0_select_se_sh +ffffffff81dd4ce0 t gfx_v10_0_read_wave_data +ffffffff81dd4f40 t gfx_v10_0_read_wave_vgprs +ffffffff81dd4f70 t gfx_v10_0_read_wave_sgprs +ffffffff81dd4ff0 t gfx_v10_0_select_me_pipe_q +ffffffff81dd5010 t gfx_v10_0_init_spm_golden_registers +ffffffff81dd5080 t gfx_v10_0_update_perfmon_mgcg +ffffffff81dd51a0 t wave_read_ind +ffffffff81dd5280 t wave_read_regs +ffffffff81dd53e0 t gfx_v10_0_cp_resume +ffffffff81dd7f90 t gfx_v10_3_get_disabled_sa +ffffffff81dd80a0 t gfx_v10_0_get_rb_active_bitmap +ffffffff81dd81c0 t gfx_v10_0_get_wgp_active_bitmap_per_sh +ffffffff81dd82d0 t gfx_v10_0_enable_gui_idle_interrupt +ffffffff81dd83e0 t gfx_v10_0_cp_gfx_enable +ffffffff81dd8620 t gfx_v10_0_cp_compute_enable +ffffffff81dd87b0 t amdgpu_bo_reserve +ffffffff81dd8920 t gfx_v10_0_kiq_init_register +ffffffff81dd9760 t gfx_v10_0_cp_gfx_switch_pipe +ffffffff81dd9860 t gfx_v10_0_cp_gfx_set_doorbell +ffffffff81dd9b30 t gfx_v10_0_cp_gfx_start +ffffffff81dda520 t gfx_v10_0_update_fine_grain_clock_gating +ffffffff81dda850 t gfx_v10_0_update_medium_grain_clock_gating +ffffffff81ddaf60 t gfx_v10_0_update_3d_clock_gating +ffffffff81ddb330 t gfx_v10_0_update_coarse_grain_clock_gating +ffffffff81ddb6f0 t gfx_v10_cntl_pg +ffffffff81ddc000 t gfx_v11_0_early_init +ffffffff81ddc270 t gfx_v11_0_late_init +ffffffff81ddc2e0 t gfx_v11_0_sw_init +ffffffff81ddcc90 t gfx_v11_0_sw_fini +ffffffff81ddcf60 t gfx_v11_0_hw_init +ffffffff81de1450 t gfx_v11_0_hw_fini +ffffffff81de16c0 t gfx_v11_0_suspend +ffffffff81de1700 t gfx_v11_0_resume +ffffffff81de1710 t gfx_v11_0_is_idle +ffffffff81de17a0 t gfx_v11_0_wait_for_idle +ffffffff81de1880 t gfx_v11_0_check_soft_reset +ffffffff81de19b0 t gfx_v11_0_soft_reset +ffffffff81de2670 t gfx_v11_0_post_soft_reset +ffffffff81de2680 t gfx_v11_0_set_clockgating_state +ffffffff81de3260 t gfx_v11_0_set_powergating_state +ffffffff81de3300 t gfx_v11_0_get_clockgating_state +ffffffff81de34d0 t gfx11_kiq_set_resources +ffffffff81de37f0 t gfx11_kiq_map_queues +ffffffff81de3b80 t gfx11_kiq_unmap_queues +ffffffff81de3f80 t gfx11_kiq_query_status +ffffffff81de4270 t gfx11_kiq_invalidate_tlbs +ffffffff81de4390 t gfx_v11_0_ring_get_rptr_compute +ffffffff81de43c0 t gfx_v11_0_ring_get_wptr_compute +ffffffff81de4430 t gfx_v11_0_ring_set_wptr_compute +ffffffff81de4580 t gfx_v11_0_ring_emit_ib_compute +ffffffff81de48c0 t gfx_v11_0_ring_emit_fence_kiq +ffffffff81de4cf0 t gfx_v11_0_ring_test_ring +ffffffff81de4f70 t gfx_v11_0_ring_test_ib +ffffffff81de5210 t gfx_v11_0_ring_emit_rreg +ffffffff81de54a0 t gfx_v11_0_ring_emit_wreg +ffffffff81de56d0 t gfx_v11_0_ring_emit_reg_wait +ffffffff81de5720 t gfx_v11_0_ring_emit_reg_write_reg_wait +ffffffff81de5790 t gfx_v11_0_wait_reg_mem +ffffffff81de5ac0 t gfx_v11_0_ring_get_rptr_gfx +ffffffff81de5af0 t gfx_v11_0_ring_get_wptr_gfx +ffffffff81de5c00 t gfx_v11_0_ring_set_wptr_gfx +ffffffff81de5e10 t gfx_v11_0_ring_emit_ib_gfx +ffffffff81de64a0 t gfx_v11_0_ring_emit_fence +ffffffff81de6870 t gfx_v11_0_ring_emit_pipeline_sync +ffffffff81de68d0 t gfx_v11_0_ring_emit_vm_flush +ffffffff81de6aa0 t gfx_v11_0_ring_emit_hdp_flush +ffffffff81de6b70 t gfx_v11_0_ring_emit_gds_switch +ffffffff81de6c50 t gfx_v11_0_ring_emit_init_cond_exec +ffffffff81de6e80 t gfx_v11_0_ring_emit_patch_cond_exec +ffffffff81de6f40 t gfx_v11_0_ring_emit_cntxcntl +ffffffff81de70a0 t gfx_v11_0_ring_emit_frame_cntl +ffffffff81de71b0 t gfx_v11_0_ring_soft_recovery +ffffffff81de7220 t gfx_v11_0_ring_preempt_ib +ffffffff81de7390 t gfx_v11_0_emit_mem_sync +ffffffff81de76c0 t gfx_v11_0_write_data_to_reg +ffffffff81de78d0 t gfx_v11_0_set_eop_interrupt_state +ffffffff81de7960 t gfx_v11_0_eop_irq +ffffffff81de7b20 t gfx_v11_0_set_gfx_eop_interrupt_state +ffffffff81de7cb0 t gfx_v11_0_set_compute_eop_interrupt_state +ffffffff81de7e40 t gfx_v11_0_set_priv_reg_fault_state +ffffffff81de7f60 t gfx_v11_0_priv_reg_irq +ffffffff81de7fc0 t gfx_v11_0_handle_priv_fault +ffffffff81de8130 t gfx_v11_0_set_priv_inst_fault_state +ffffffff81de8250 t gfx_v11_0_priv_inst_irq +ffffffff81de82b0 t gfx_v11_0_is_rlc_enabled +ffffffff81de8330 t gfx_v11_0_set_safe_mode +ffffffff81de8480 t gfx_v11_0_unset_safe_mode +ffffffff81de84f0 t gfx_v11_0_rlc_init +ffffffff81de8570 t gfx_v11_0_get_csb_size +ffffffff81de85a0 t gfx_v11_0_get_csb_buffer +ffffffff81de8710 t gfx_v11_0_rlc_resume +ffffffff81de9430 t gfx_v11_0_rlc_stop +ffffffff81de9510 t gfx_v11_0_rlc_reset +ffffffff81de96b0 t gfx_v11_0_rlc_start +ffffffff81de9850 t gfx_v11_0_update_spm_vmid +ffffffff81de9950 t gfx_v11_0_init_csb +ffffffff81de9ad0 t gfx_v11_0_gfx_mqd_init +ffffffff81de9ea0 t gfx_v11_0_compute_mqd_init +ffffffff81dea3c0 t gfx_v11_0_mec_init +ffffffff81dea500 t gfx_v11_0_compute_ring_init +ffffffff81dea640 t gfx_v11_0_init_toc_microcode +ffffffff81dea7e0 t gfx_v11_0_rlc_autoload_buffer_init +ffffffff81dea9d0 t gfx_v11_0_gpu_early_init +ffffffff81deaa70 t amdgpu_bo_unreserve +ffffffff81deab50 t gfx_v11_0_get_gpu_clock_counter +ffffffff81deaeb0 t gfx_v11_0_select_se_sh +ffffffff81deaf50 t gfx_v11_0_read_wave_data +ffffffff81deb190 t gfx_v11_0_read_wave_vgprs +ffffffff81deb1c0 t gfx_v11_0_read_wave_sgprs +ffffffff81deb240 t gfx_v11_0_select_me_pipe_q +ffffffff81deb260 t gfx_v11_0_update_perf_clk +ffffffff81deb390 t wave_read_ind +ffffffff81deb470 t wave_read_regs +ffffffff81deb5d0 t gfx_v11_0_disable_gpa_mode +ffffffff81deb760 t gfx_v11_0_cp_resume +ffffffff81def690 t gfx_v11_0_config_me_cache +ffffffff81defa30 t gfx_v11_0_config_pfp_cache +ffffffff81defdd0 t gfx_v11_0_config_mec_cache +ffffffff81df0170 t gfx_v11_0_enable_gui_idle_interrupt +ffffffff81df0280 t gfx_v11_0_cp_compute_enable +ffffffff81df0450 t gfx_v11_0_cp_gfx_enable +ffffffff81df0640 t amdgpu_bo_reserve +ffffffff81df07b0 t gfx_v11_0_kiq_init_register +ffffffff81df1600 t gfx_v11_0_cp_gfx_switch_pipe +ffffffff81df16e0 t gfx_v11_0_cp_gfx_set_doorbell +ffffffff81df18c0 t gfx_v11_0_cp_gfx_start +ffffffff81df2140 t gfx_v11_cntl_pg +ffffffff81df3000 t gfx_v8_0_early_init +ffffffff81df31f0 t gfx_v8_0_late_init +ffffffff81df3920 t gfx_v8_0_sw_init +ffffffff81df3d10 t gfx_v8_0_sw_fini +ffffffff81df3fd0 t gfx_v8_0_hw_init +ffffffff81df61c0 t gfx_v8_0_hw_fini +ffffffff81df66b0 t gfx_v8_0_suspend +ffffffff81df66f0 t gfx_v8_0_resume +ffffffff81df6700 t gfx_v8_0_is_idle +ffffffff81df6770 t gfx_v8_0_wait_for_idle +ffffffff81df6820 t gfx_v8_0_check_soft_reset +ffffffff81df6900 t gfx_v8_0_pre_soft_reset +ffffffff81df6a80 t gfx_v8_0_soft_reset +ffffffff81df6c40 t gfx_v8_0_post_soft_reset +ffffffff81df6de0 t gfx_v8_0_set_clockgating_state +ffffffff81df7060 t gfx_v8_0_set_powergating_state +ffffffff81df7410 t gfx_v8_0_get_clockgating_state +ffffffff81df74f0 t gfx_v8_0_get_gpu_clock_counter +ffffffff81df7590 t gfx_v8_0_select_se_sh +ffffffff81df75f0 t gfx_v8_0_read_wave_data +ffffffff81df7a90 t gfx_v8_0_read_wave_sgprs +ffffffff81df7b40 t gfx_v8_0_select_me_pipe_q +ffffffff81df7b60 t gfx_v8_0_ring_get_rptr +ffffffff81df7b90 t gfx_v8_0_ring_get_wptr_compute +ffffffff81df7bc0 t gfx_v8_0_ring_set_wptr_compute +ffffffff81df7c00 t gfx_v8_0_ring_emit_fence_kiq +ffffffff81df8020 t gfx_v8_0_ring_test_ring +ffffffff81df8220 t gfx_v8_0_ring_emit_rreg +ffffffff81df84b0 t gfx_v8_0_ring_emit_wreg +ffffffff81df86e0 t gfx_v8_0_ring_get_wptr_gfx +ffffffff81df8740 t gfx_v8_0_ring_set_wptr_gfx +ffffffff81df87b0 t gfx_v8_0_ring_emit_ib_gfx +ffffffff81df8d10 t gfx_v8_0_ring_emit_fence_gfx +ffffffff81df9200 t gfx_v8_0_ring_emit_pipeline_sync +ffffffff81df94f0 t gfx_v8_0_ring_emit_vm_flush +ffffffff81df98a0 t gfx_v8_0_ring_emit_hdp_flush +ffffffff81df9bc0 t gfx_v8_0_ring_emit_gds_switch +ffffffff81dfa370 t gfx_v8_0_ring_test_ib +ffffffff81dfa520 t gfx_v8_0_ring_emit_init_cond_exec +ffffffff81dfa750 t gfx_v8_0_ring_emit_patch_cond_exec +ffffffff81dfa800 t gfx_v8_ring_emit_sb +ffffffff81dfa8f0 t gfx_v8_ring_emit_cntxcntl +ffffffff81dfae90 t gfx_v8_0_ring_soft_recovery +ffffffff81dfaec0 t gfx_v8_0_emit_mem_sync +ffffffff81dfb0c0 t gfx_v8_0_ring_emit_ib_compute +ffffffff81dfb3c0 t gfx_v8_0_ring_emit_fence_compute +ffffffff81dfb6c0 t gfx_v8_0_emit_mem_sync_compute +ffffffff81dfb980 t gfx_v8_0_emit_wave_limit +ffffffff81dfbb30 t gfx_v8_0_set_eop_interrupt_state +ffffffff81dfbd40 t gfx_v8_0_eop_irq +ffffffff81dfbe70 t gfx_v8_0_set_priv_reg_fault_state +ffffffff81dfbef0 t gfx_v8_0_priv_reg_irq +ffffffff81dfc010 t gfx_v8_0_set_priv_inst_fault_state +ffffffff81dfc090 t gfx_v8_0_priv_inst_irq +ffffffff81dfc1b0 t gfx_v8_0_set_cp_ecc_int_state +ffffffff81dfc410 t gfx_v8_0_cp_ecc_error_irq +ffffffff81dfc460 t gfx_v8_0_set_sq_int_state +ffffffff81dfc4f0 t gfx_v8_0_sq_irq +ffffffff81dfc590 t gfx_v8_0_parse_sq_irq +ffffffff81dfc7e0 t gfx_v8_0_is_rlc_enabled +ffffffff81dfc820 t gfx_v8_0_set_safe_mode +ffffffff81dfc920 t gfx_v8_0_unset_safe_mode +ffffffff81dfc9c0 t gfx_v8_0_rlc_init +ffffffff81dfca70 t gfx_v8_0_get_csb_size +ffffffff81dfcaa0 t gfx_v8_0_get_csb_buffer +ffffffff81dfcc10 t gfx_v8_0_cp_jump_table_num +ffffffff81dfcc50 t gfx_v8_0_rlc_resume +ffffffff81dfcfd0 t gfx_v8_0_rlc_stop +ffffffff81dfd040 t gfx_v8_0_rlc_reset +ffffffff81dfd0c0 t gfx_v8_0_rlc_start +ffffffff81dfd140 t gfx_v8_0_update_spm_vmid +ffffffff81dfd1b0 t gfx_v8_0_init_save_restore_list +ffffffff81dfd5c0 t gfx_v8_0_wait_for_rlc_serdes +ffffffff81dfd7e0 t gfx_v8_0_sq_irq_work_func +ffffffff81dfd800 t gfx_v8_0_init_microcode +ffffffff81dfe2e0 t gfx_v8_0_mec_init +ffffffff81dfe3e0 t gfx_v8_0_compute_ring_init +ffffffff81dfe520 t gfx_v8_0_gpu_early_init +ffffffff81dfe9c0 t request_firmware +ffffffff81dfea50 t amdgpu_bo_unreserve +ffffffff81dfeb30 t gfx_v8_0_kiq_resume +ffffffff81dfed90 t gfx_v8_0_cp_gfx_resume +ffffffff81dff870 t gfx_v8_0_kcq_resume +ffffffff81e002c0 t amdgpu_bo_reserve +ffffffff81e00430 t gfx_v8_0_mqd_commit +ffffffff81e00610 t gfx_v8_0_mqd_init +ffffffff81e00a30 t gfx_v8_0_deactivate_hqd +ffffffff81e00af0 t gfx_v8_0_update_medium_grain_clock_gating +ffffffff81e00e20 t gfx_v8_0_update_coarse_grain_clock_gating +ffffffff81e02000 t gfx_v9_0_ras_error_inject +ffffffff81e021a0 t gfx_v9_0_query_ras_error_count +ffffffff81e02d40 t gfx_v9_0_reset_ras_error_count +ffffffff81e03740 T gfx_v9_0_select_se_sh +ffffffff81e037e0 t gfx_v9_0_early_init +ffffffff81e03b10 t gfx_v9_0_late_init +ffffffff81e048e0 t gfx_v9_0_sw_init +ffffffff81e04d80 t gfx_v9_0_sw_fini +ffffffff81e05030 t gfx_v9_0_hw_init +ffffffff81e08080 t gfx_v9_0_hw_fini +ffffffff81e087f0 t gfx_v9_0_suspend +ffffffff81e08830 t gfx_v9_0_resume +ffffffff81e08840 t gfx_v9_0_is_idle +ffffffff81e088c0 t gfx_v9_0_wait_for_idle +ffffffff81e089a0 t gfx_v9_0_soft_reset +ffffffff81e08d30 t gfx_v9_0_set_clockgating_state +ffffffff81e08e00 t gfx_v9_0_set_powergating_state +ffffffff81e091e0 t gfx_v9_0_get_clockgating_state +ffffffff81e092f0 t gfx_v9_0_kiq_set_resources +ffffffff81e09610 t gfx_v9_0_kiq_map_queues +ffffffff81e09950 t gfx_v9_0_kiq_unmap_queues +ffffffff81e09cd0 t gfx_v9_0_kiq_query_status +ffffffff81e09fc0 t gfx_v9_0_kiq_invalidate_tlbs +ffffffff81e0a0e0 t gfx_v9_0_ring_get_rptr_compute +ffffffff81e0a110 t gfx_v9_0_ring_get_wptr_compute +ffffffff81e0a180 t gfx_v9_0_ring_set_wptr_compute +ffffffff81e0a1e0 t gfx_v9_0_ring_emit_fence_kiq +ffffffff81e0a610 t gfx_v9_0_ring_test_ring +ffffffff81e0a840 t gfx_v9_0_ring_emit_rreg +ffffffff81e0aad0 t gfx_v9_0_ring_emit_wreg +ffffffff81e0ad00 t gfx_v9_0_ring_emit_reg_wait +ffffffff81e0ad50 t gfx_v9_0_ring_emit_reg_write_reg_wait +ffffffff81e0adf0 t gfx_v9_0_wait_reg_mem +ffffffff81e0b120 t gfx_v9_0_ring_get_rptr_gfx +ffffffff81e0b150 t gfx_v9_0_ring_get_wptr_gfx +ffffffff81e0b260 t gfx_v9_0_ring_set_wptr_gfx +ffffffff81e0b390 t gfx_v9_0_ring_emit_ib_gfx +ffffffff81e0b8c0 t gfx_v9_0_ring_emit_fence +ffffffff81e0bc70 t gfx_v9_0_ring_emit_pipeline_sync +ffffffff81e0bcd0 t gfx_v9_0_ring_emit_vm_flush +ffffffff81e0bde0 t gfx_v9_0_ring_emit_hdp_flush +ffffffff81e0beb0 t gfx_v9_0_ring_emit_gds_switch +ffffffff81e0bf90 t gfx_v9_0_ring_test_ib +ffffffff81e0c140 t gfx_v9_0_ring_emit_init_cond_exec +ffffffff81e0c370 t gfx_v9_0_ring_emit_patch_cond_exec +ffffffff81e0c430 t gfx_v9_ring_emit_sb +ffffffff81e0c520 t gfx_v9_ring_emit_cntxcntl +ffffffff81e0c910 t gfx_v9_0_ring_emit_frame_cntl +ffffffff81e0ca20 t gfx_v9_0_ring_soft_recovery +ffffffff81e0ca90 t gfx_v9_0_emit_mem_sync +ffffffff81e0cd50 t gfx_v9_0_write_data_to_reg +ffffffff81e0cf60 t gfx_v9_0_ring_emit_ib_compute +ffffffff81e0d290 t gfx_v9_0_emit_wave_limit +ffffffff81e0d470 t gfx_v9_0_set_eop_interrupt_state +ffffffff81e0d640 t gfx_v9_0_eop_irq +ffffffff81e0d770 t gfx_v9_0_set_compute_eop_interrupt_state +ffffffff81e0d920 t gfx_v9_0_set_priv_reg_fault_state +ffffffff81e0da40 t gfx_v9_0_priv_reg_irq +ffffffff81e0db60 t gfx_v9_0_set_priv_inst_fault_state +ffffffff81e0dc80 t gfx_v9_0_priv_inst_irq +ffffffff81e0dda0 t gfx_v9_0_set_cp_ecc_error_state +ffffffff81e0e5d0 t gfx_v9_0_is_rlc_enabled +ffffffff81e0e650 t gfx_v9_0_set_safe_mode +ffffffff81e0e7a0 t gfx_v9_0_unset_safe_mode +ffffffff81e0e810 t gfx_v9_0_rlc_init +ffffffff81e0f020 t gfx_v9_0_get_csb_size +ffffffff81e0f050 t gfx_v9_0_get_csb_buffer +ffffffff81e0f190 t gfx_v9_0_cp_jump_table_num +ffffffff81e0f1e0 t gfx_v9_0_rlc_resume +ffffffff81e0ff70 t gfx_v9_0_rlc_stop +ffffffff81e10400 t gfx_v9_0_rlc_reset +ffffffff81e10590 t gfx_v9_0_rlc_start +ffffffff81e106d0 t gfx_v9_0_update_spm_vmid +ffffffff81e10800 t gfx_v9_0_is_rlcg_access_range +ffffffff81e10850 t gfx_v9_0_init_always_on_cu_mask +ffffffff81e10b80 t gfx_v9_0_init_csb +ffffffff81e10d10 t gfx_v9_0_enable_lbpw +ffffffff81e10e00 t gfx_v9_0_enable_gui_idle_interrupt +ffffffff81e10f00 t gfx_v9_0_init_microcode +ffffffff81e11a30 t gfx_v9_0_mec_init +ffffffff81e11c20 t gfx_v9_0_compute_ring_init +ffffffff81e11d60 t gfx_v9_0_gpu_early_init +ffffffff81e12260 t request_firmware +ffffffff81e122f0 t amdgpu_bo_unreserve +ffffffff81e123d0 t gfx_v9_0_get_gpu_clock_counter +ffffffff81e12b50 t gfx_v9_0_read_wave_data +ffffffff81e12d90 t gfx_v9_0_read_wave_vgprs +ffffffff81e12db0 t gfx_v9_0_read_wave_sgprs +ffffffff81e12e00 t gfx_v9_0_select_me_pipe_q +ffffffff81e12e20 t wave_read_ind +ffffffff81e12f10 t wave_read_regs +ffffffff81e13060 t gfx_v9_0_cp_gfx_enable +ffffffff81e13140 t amdgpu_bo_reserve +ffffffff81e132b0 t gfx_v9_0_kiq_init_register +ffffffff81e13f30 t gfx_v9_0_mqd_init +ffffffff81e14470 t gfx_v9_0_update_medium_grain_clock_gating +ffffffff81e14980 t gfx_v9_0_update_3d_clock_gating +ffffffff81e14d60 t gfx_v9_0_update_coarse_grain_clock_gating +ffffffff81e16000 t gfx_v9_4_ras_error_inject +ffffffff81e16130 t gfx_v9_4_query_ras_error_count +ffffffff81e16ef0 t gfx_v9_4_query_ras_error_status +ffffffff81e170b0 t gfx_v9_4_reset_ras_error_count +ffffffff81e18000 T gfx_v9_4_2_do_edc_gpr_workarounds +ffffffff81e18760 T gfx_v9_4_2_init_golden_registers +ffffffff81e187f0 T gfx_v9_4_2_debug_trap_config_init +ffffffff81e18890 T gfx_v9_4_2_set_power_brake_sequence +ffffffff81e18a60 t gfx_v9_4_2_ras_error_inject +ffffffff81e18b90 t gfx_v9_4_2_query_ras_error_count +ffffffff81e18c40 t gfx_v9_4_2_query_ras_error_status +ffffffff81e19480 t gfx_v9_4_2_reset_ras_error_count +ffffffff81e194e0 t gfx_v9_4_2_reset_ras_error_status +ffffffff81e199a0 t gfx_v9_4_2_enable_watchdog_timer +ffffffff81e19bc0 t gfx_v9_4_2_query_uctl2_poison_status +ffffffff81e19c40 t gfx_v9_4_2_run_shader +ffffffff81e1a040 t gfx_v9_4_2_wait_for_waves_assigned +ffffffff81e1a690 t gfx_v9_4_2_query_sram_edc_count +ffffffff81e1a9d0 t gfx_v9_4_2_query_utc_edc_count +ffffffff81e1aba0 t wave_read_ind +ffffffff81e1b000 t gfxhub_v1_0_get_mc_fb_offset +ffffffff81e1b090 t gfxhub_v1_0_setup_vm_pt_regs +ffffffff81e1b1d0 t gfxhub_v1_0_gart_enable +ffffffff81e1c670 t gfxhub_v1_0_gart_disable +ffffffff81e1c900 t gfxhub_v1_0_set_fault_enable_default +ffffffff81e1c9f0 t gfxhub_v1_0_init +ffffffff81e1d000 T gfxhub_v1_1_get_xgmi_info +ffffffff81e1e000 t gfxhub_v2_0_get_fb_location +ffffffff81e1e090 t gfxhub_v2_0_get_mc_fb_offset +ffffffff81e1e120 t gfxhub_v2_0_setup_vm_pt_regs +ffffffff81e1e260 t gfxhub_v2_0_gart_enable +ffffffff81e1f420 t gfxhub_v2_0_gart_disable +ffffffff81e1f660 t gfxhub_v2_0_set_fault_enable_default +ffffffff81e1f750 t gfxhub_v2_0_init +ffffffff81e1f820 t gfxhub_v2_0_print_l2_protection_fault_status +ffffffff81e1f9f0 t gfxhub_v2_0_get_invalidate_req +ffffffff81e20000 t gfxhub_v2_1_get_fb_location +ffffffff81e20090 t gfxhub_v2_1_get_mc_fb_offset +ffffffff81e20120 t gfxhub_v2_1_setup_vm_pt_regs +ffffffff81e20260 t gfxhub_v2_1_gart_enable +ffffffff81e214f0 t gfxhub_v2_1_gart_disable +ffffffff81e21770 t gfxhub_v2_1_set_fault_enable_default +ffffffff81e21880 t gfxhub_v2_1_init +ffffffff81e21950 t gfxhub_v2_1_get_xgmi_info +ffffffff81e21a80 t gfxhub_v2_1_utcl2_harvest +ffffffff81e21c60 t gfxhub_v2_1_save_regs +ffffffff81e22690 t gfxhub_v2_1_restore_regs +ffffffff81e23260 t gfxhub_v2_1_halt +ffffffff81e23620 t gfxhub_v2_1_print_l2_protection_fault_status +ffffffff81e237f0 t gfxhub_v2_1_get_invalidate_req +ffffffff81e24000 t gfxhub_v3_0_get_fb_location +ffffffff81e24090 t gfxhub_v3_0_get_mc_fb_offset +ffffffff81e24120 t gfxhub_v3_0_setup_vm_pt_regs +ffffffff81e24260 t gfxhub_v3_0_gart_enable +ffffffff81e254a0 t gfxhub_v3_0_gart_disable +ffffffff81e25720 t gfxhub_v3_0_set_fault_enable_default +ffffffff81e25ac0 t gfxhub_v3_0_init +ffffffff81e25b90 t gfxhub_v3_0_print_l2_protection_fault_status +ffffffff81e25d60 t gfxhub_v3_0_get_invalidate_req +ffffffff81e26000 t gfxhub_v3_0_3_get_fb_location +ffffffff81e26090 t gfxhub_v3_0_3_get_mc_fb_offset +ffffffff81e26120 t gfxhub_v3_0_3_setup_vm_pt_regs +ffffffff81e26260 t gfxhub_v3_0_3_gart_enable +ffffffff81e274b0 t gfxhub_v3_0_3_gart_disable +ffffffff81e27740 t gfxhub_v3_0_3_set_fault_enable_default +ffffffff81e27850 t gfxhub_v3_0_3_init +ffffffff81e27920 t gfxhub_v3_0_3_print_l2_protection_fault_status +ffffffff81e27af0 t gfxhub_v3_0_3_get_invalidate_req +ffffffff81e28000 t gmc_v10_0_early_init +ffffffff81e281e0 t gmc_v10_0_late_init +ffffffff81e28250 t gmc_v10_0_sw_init +ffffffff81e28630 t gmc_v10_0_sw_fini +ffffffff81e28680 t gmc_v10_0_hw_init +ffffffff81e28840 t gmc_v10_0_hw_fini +ffffffff81e288d0 t gmc_v10_0_suspend +ffffffff81e28960 t gmc_v10_0_resume +ffffffff81e289c0 t gmc_v10_0_is_idle +ffffffff81e289f0 t gmc_v10_0_wait_for_idle +ffffffff81e28a20 t gmc_v10_0_soft_reset +ffffffff81e28a50 t gmc_v10_0_set_clockgating_state +ffffffff81e28b00 t gmc_v10_0_set_powergating_state +ffffffff81e28b30 t gmc_v10_0_get_clockgating_state +ffffffff81e28bd0 t gmc_v10_0_flush_gpu_tlb +ffffffff81e28e80 t gmc_v10_0_flush_gpu_tlb_pasid +ffffffff81e290a0 t gmc_v10_0_emit_flush_gpu_tlb +ffffffff81e29260 t gmc_v10_0_emit_pasid_mapping +ffffffff81e292d0 t gmc_v10_0_map_mtype +ffffffff81e29320 t gmc_v10_0_get_vm_pde +ffffffff81e29410 t gmc_v10_0_get_vm_pte +ffffffff81e294c0 t gmc_v10_0_get_vbios_fb_size +ffffffff81e29630 t gmc_v10_0_flush_vm_hub +ffffffff81e29a60 t gmc_v10_0_vm_fault_interrupt_state +ffffffff81e29ad0 t gmc_v10_0_process_interrupt +ffffffff81e29d90 t gmc_v10_0_ecc_interrupt_state +ffffffff81e29dc0 t gmc_v10_0_gart_init +ffffffff81e2a000 t gmc_v11_0_early_init +ffffffff81e2a210 t gmc_v11_0_late_init +ffffffff81e2a280 t gmc_v11_0_sw_init +ffffffff81e2a570 t gmc_v11_0_sw_fini +ffffffff81e2a5c0 t gmc_v11_0_hw_init +ffffffff81e2a700 t gmc_v11_0_hw_fini +ffffffff81e2a780 t gmc_v11_0_suspend +ffffffff81e2a800 t gmc_v11_0_resume +ffffffff81e2a860 t gmc_v11_0_is_idle +ffffffff81e2a890 t gmc_v11_0_wait_for_idle +ffffffff81e2a8c0 t gmc_v11_0_soft_reset +ffffffff81e2a8f0 t gmc_v11_0_set_clockgating_state +ffffffff81e2a970 t gmc_v11_0_set_powergating_state +ffffffff81e2a9a0 t gmc_v11_0_get_clockgating_state +ffffffff81e2a9e0 t gmc_v11_0_flush_gpu_tlb +ffffffff81e2ae80 t gmc_v11_0_flush_gpu_tlb_pasid +ffffffff81e2b070 t gmc_v11_0_emit_flush_gpu_tlb +ffffffff81e2b220 t gmc_v11_0_emit_pasid_mapping +ffffffff81e2b290 t gmc_v11_0_map_mtype +ffffffff81e2b2e0 t gmc_v11_0_get_vm_pde +ffffffff81e2b3e0 t gmc_v11_0_get_vm_pte +ffffffff81e2b490 t gmc_v11_0_get_vbios_fb_size +ffffffff81e2b600 t gmc_v11_0_vm_fault_interrupt_state +ffffffff81e2b670 t gmc_v11_0_process_interrupt +ffffffff81e2b890 t gmc_v11_0_ecc_interrupt_state +ffffffff81e2b8c0 t gmc_v11_0_gart_init +ffffffff81e2c000 t gmc_v7_0_early_init +ffffffff81e2c090 t gmc_v7_0_late_init +ffffffff81e2c0e0 t gmc_v7_0_sw_init +ffffffff81e2c5a0 t gmc_v7_0_sw_fini +ffffffff81e2c650 t gmc_v7_0_hw_init +ffffffff81e2cfc0 t gmc_v7_0_hw_fini +ffffffff81e2d080 t gmc_v7_0_suspend +ffffffff81e2d0c0 t gmc_v7_0_resume +ffffffff81e2d120 t gmc_v7_0_is_idle +ffffffff81e2d170 t gmc_v7_0_wait_for_idle +ffffffff81e2d210 t gmc_v7_0_soft_reset +ffffffff81e2d470 t gmc_v7_0_set_clockgating_state +ffffffff81e2d6d0 t gmc_v7_0_set_powergating_state +ffffffff81e2d700 t gmc_v7_0_flush_gpu_tlb +ffffffff81e2d730 t gmc_v7_0_flush_gpu_tlb_pasid +ffffffff81e2d7f0 t gmc_v7_0_emit_flush_gpu_tlb +ffffffff81e2d890 t gmc_v7_0_emit_pasid_mapping +ffffffff81e2d8c0 t gmc_v7_0_set_prt +ffffffff81e2da80 t gmc_v7_0_get_vm_pde +ffffffff81e2dae0 t gmc_v7_0_get_vm_pte +ffffffff81e2db20 t gmc_v7_0_get_vbios_fb_size +ffffffff81e2db90 t gmc_v7_0_vm_fault_interrupt_state +ffffffff81e2dc60 t gmc_v7_0_process_interrupt +ffffffff81e2df00 t gmc_v7_0_gart_init +ffffffff81e2e000 t gmc_v8_0_early_init +ffffffff81e2e090 t gmc_v8_0_late_init +ffffffff81e2e0e0 t gmc_v8_0_sw_init +ffffffff81e2e720 t gmc_v8_0_sw_fini +ffffffff81e2e7d0 t gmc_v8_0_hw_init +ffffffff81e2f440 t gmc_v8_0_hw_fini +ffffffff81e2f500 t gmc_v8_0_suspend +ffffffff81e2f540 t gmc_v8_0_resume +ffffffff81e2f5a0 t gmc_v8_0_is_idle +ffffffff81e2f5f0 t gmc_v8_0_wait_for_idle +ffffffff81e2f690 t gmc_v8_0_check_soft_reset +ffffffff81e2f700 t gmc_v8_0_pre_soft_reset +ffffffff81e2f870 t gmc_v8_0_soft_reset +ffffffff81e2f940 t gmc_v8_0_post_soft_reset +ffffffff81e2f9b0 t gmc_v8_0_set_clockgating_state +ffffffff81e2ff70 t gmc_v8_0_set_powergating_state +ffffffff81e2ffa0 t gmc_v8_0_get_clockgating_state +ffffffff81e30010 t gmc_v8_0_flush_gpu_tlb +ffffffff81e30040 t gmc_v8_0_flush_gpu_tlb_pasid +ffffffff81e30100 t gmc_v8_0_emit_flush_gpu_tlb +ffffffff81e301a0 t gmc_v8_0_emit_pasid_mapping +ffffffff81e301d0 t gmc_v8_0_set_prt +ffffffff81e30390 t gmc_v8_0_get_vm_pde +ffffffff81e303f0 t gmc_v8_0_get_vm_pte +ffffffff81e30440 t gmc_v8_0_get_vbios_fb_size +ffffffff81e304b0 t gmc_v8_0_vm_fault_interrupt_state +ffffffff81e30580 t gmc_v8_0_process_interrupt +ffffffff81e30910 t gmc_v8_0_gart_init +ffffffff81e31000 T gmc_v9_0_restore_registers +ffffffff81e31150 t gmc_v9_0_early_init +ffffffff81e31500 t gmc_v9_0_late_init +ffffffff81e31610 t gmc_v9_0_sw_init +ffffffff81e31bc0 t gmc_v9_0_sw_fini +ffffffff81e31c30 t gmc_v9_0_hw_init +ffffffff81e32030 t gmc_v9_0_hw_fini +ffffffff81e320e0 t gmc_v9_0_suspend +ffffffff81e32190 t gmc_v9_0_resume +ffffffff81e321f0 t gmc_v9_0_is_idle +ffffffff81e32220 t gmc_v9_0_wait_for_idle +ffffffff81e32250 t gmc_v9_0_soft_reset +ffffffff81e32280 t gmc_v9_0_set_clockgating_state +ffffffff81e322e0 t gmc_v9_0_set_powergating_state +ffffffff81e32310 t gmc_v9_0_get_clockgating_state +ffffffff81e32350 t gmc_v9_0_flush_gpu_tlb +ffffffff81e32980 t gmc_v9_0_flush_gpu_tlb_pasid +ffffffff81e32c50 t gmc_v9_0_emit_flush_gpu_tlb +ffffffff81e32e50 t gmc_v9_0_emit_pasid_mapping +ffffffff81e32ec0 t gmc_v9_0_map_mtype +ffffffff81e32f00 t gmc_v9_0_get_vm_pde +ffffffff81e33000 t gmc_v9_0_get_vm_pte +ffffffff81e330d0 t gmc_v9_0_get_vbios_fb_size +ffffffff81e33260 t gmc_v9_0_vm_fault_interrupt_state +ffffffff81e335e0 t gmc_v9_0_process_interrupt +ffffffff81e33c10 t gmc_v9_0_ecc_interrupt_state +ffffffff81e33d70 t gmc_v9_0_gart_init +ffffffff81e33e50 t gmc_v9_0_save_registers +ffffffff81e34000 t hdp_v4_0_query_ras_error_count +ffffffff81e340c0 t hdp_v4_0_reset_ras_error_count +ffffffff81e341e0 t hdp_v4_0_flush_hdp +ffffffff81e34230 t hdp_v4_0_invalidate_hdp +ffffffff81e34300 t hdp_v4_0_update_clock_gating +ffffffff81e34400 t hdp_v4_0_get_clockgating_state +ffffffff81e34450 t hdp_v4_0_init_registers +ffffffff81e35000 t hdp_v5_0_flush_hdp +ffffffff81e35050 t hdp_v5_0_invalidate_hdp +ffffffff81e350f0 t hdp_v5_0_update_clock_gating +ffffffff81e354e0 t hdp_v5_0_get_clockgating_state +ffffffff81e35600 t hdp_v5_0_init_registers +ffffffff81e36000 t hdp_v5_2_flush_hdp +ffffffff81e36050 t hdp_v5_2_update_clock_gating +ffffffff81e36440 t hdp_v5_2_get_clockgating_state +ffffffff81e37000 t hdp_v6_0_flush_hdp +ffffffff81e37050 t hdp_v6_0_update_clock_gating +ffffffff81e37360 t hdp_v6_0_get_clockgating_state +ffffffff81e38000 t iceland_ih_early_init +ffffffff81e38050 t iceland_ih_sw_init +ffffffff81e380b0 t iceland_ih_sw_fini +ffffffff81e380f0 t iceland_ih_hw_init +ffffffff81e38310 t iceland_ih_hw_fini +ffffffff81e383e0 t iceland_ih_suspend +ffffffff81e384b0 t iceland_ih_resume +ffffffff81e384f0 t iceland_ih_is_idle +ffffffff81e38540 t iceland_ih_wait_for_idle +ffffffff81e385e0 t iceland_ih_soft_reset +ffffffff81e386c0 t iceland_ih_set_clockgating_state +ffffffff81e386f0 t iceland_ih_set_powergating_state +ffffffff81e38720 t iceland_ih_get_wptr +ffffffff81e38810 t iceland_ih_decode_iv +ffffffff81e38890 t iceland_ih_set_rptr +ffffffff81e39000 t ih_v6_0_early_init +ffffffff81e39050 t ih_v6_0_sw_init +ffffffff81e391b0 t ih_v6_0_sw_fini +ffffffff81e391f0 t ih_v6_0_hw_init +ffffffff81e39770 t ih_v6_0_hw_fini +ffffffff81e397d0 t ih_v6_0_suspend +ffffffff81e39830 t ih_v6_0_resume +ffffffff81e39840 t ih_v6_0_is_idle +ffffffff81e39870 t ih_v6_0_wait_for_idle +ffffffff81e398a0 t ih_v6_0_soft_reset +ffffffff81e398d0 t ih_v6_0_set_clockgating_state +ffffffff81e399f0 t ih_v6_0_set_powergating_state +ffffffff81e39b60 t ih_v6_0_get_clockgating_state +ffffffff81e39bf0 t ih_v6_0_get_wptr +ffffffff81e39ce0 t ih_v6_0_set_rptr +ffffffff81e39db0 t ih_v6_0_self_irq +ffffffff81e39e20 t ih_v6_0_toggle_interrupts +ffffffff81e3a000 t force_update_wptr_for_self_int +ffffffff81e3b000 t imu_v11_0_init_microcode +ffffffff81e3b1f0 t imu_v11_0_load_microcode +ffffffff81e3b550 t imu_v11_0_setup +ffffffff81e3b7d0 t imu_v11_0_start +ffffffff81e3b8c0 t imu_v11_0_program_rlc_ram +ffffffff81e3ba70 t imu_v11_0_wait_for_reset_status +ffffffff81e3bbc0 t program_imu_rlc_ram +ffffffff81e3c000 T imu_v11_0_3_program_rlc_ram +ffffffff81e3d000 T jpeg_v1_0_early_init +ffffffff81e3d060 T jpeg_v1_0_sw_init +ffffffff81e3d130 T jpeg_v1_0_sw_fini +ffffffff81e3d150 T jpeg_v1_0_start +ffffffff81e3dbf0 t jpeg_v1_0_decode_ring_get_rptr +ffffffff81e3dc80 t jpeg_v1_0_decode_ring_get_wptr +ffffffff81e3dd10 t jpeg_v1_0_decode_ring_set_wptr +ffffffff81e3dd80 t jpeg_v1_0_decode_ring_emit_ib +ffffffff81e3e6a0 t jpeg_v1_0_decode_ring_emit_fence +ffffffff81e3efe0 t jpeg_v1_0_decode_ring_emit_vm_flush +ffffffff81e3f050 t jpeg_v1_0_decode_ring_nop +ffffffff81e3f1b0 t jpeg_v1_0_decode_ring_insert_start +ffffffff81e3f370 t jpeg_v1_0_decode_ring_insert_end +ffffffff81e3f530 t jpeg_v1_0_ring_begin_use +ffffffff81e3f630 t jpeg_v1_0_decode_ring_emit_wreg +ffffffff81e3f890 t jpeg_v1_0_decode_ring_emit_reg_wait +ffffffff81e3fcb0 t jpeg_v1_0_set_interrupt_state +ffffffff81e3fce0 t jpeg_v1_0_process_interrupt +ffffffff81e40000 T jpeg_v2_0_dec_ring_insert_start +ffffffff81e401a0 T jpeg_v2_0_dec_ring_insert_end +ffffffff81e40340 T jpeg_v2_0_dec_ring_emit_fence +ffffffff81e40a20 T jpeg_v2_0_dec_ring_emit_ib +ffffffff81e411d0 T jpeg_v2_0_dec_ring_emit_reg_wait +ffffffff81e41580 T jpeg_v2_0_dec_ring_emit_vm_flush +ffffffff81e415f0 T jpeg_v2_0_dec_ring_emit_wreg +ffffffff81e41830 T jpeg_v2_0_dec_ring_nop +ffffffff81e41990 t jpeg_v2_0_early_init +ffffffff81e41a00 t jpeg_v2_0_sw_init +ffffffff81e41b10 t jpeg_v2_0_sw_fini +ffffffff81e41b60 t jpeg_v2_0_hw_init +ffffffff81e41be0 t jpeg_v2_0_hw_fini +ffffffff81e41cc0 t jpeg_v2_0_suspend +ffffffff81e41cf0 t jpeg_v2_0_resume +ffffffff81e41d80 t jpeg_v2_0_is_idle +ffffffff81e41e00 t jpeg_v2_0_wait_for_idle +ffffffff81e41ef0 t jpeg_v2_0_set_clockgating_state +ffffffff81e41fa0 t jpeg_v2_0_set_powergating_state +ffffffff81e427a0 t jpeg_v2_0_dec_ring_get_rptr +ffffffff81e42830 t jpeg_v2_0_dec_ring_get_wptr +ffffffff81e428d0 t jpeg_v2_0_dec_ring_set_wptr +ffffffff81e42970 t jpeg_v2_0_set_interrupt_state +ffffffff81e429a0 t jpeg_v2_0_process_interrupt +ffffffff81e42a30 t jpeg_v2_0_enable_clock_gating +ffffffff81e42bd0 t jpeg_v2_0_disable_clock_gating +ffffffff81e43000 t jpeg_v2_6_query_ras_poison_status +ffffffff81e43140 t jpeg_v2_5_early_init +ffffffff81e43400 t jpeg_v2_5_sw_init +ffffffff81e43650 t jpeg_v2_5_sw_fini +ffffffff81e436a0 t jpeg_v2_5_hw_init +ffffffff81e43790 t jpeg_v2_5_hw_fini +ffffffff81e438d0 t jpeg_v2_5_suspend +ffffffff81e43900 t jpeg_v2_5_resume +ffffffff81e43a00 t jpeg_v2_5_is_idle +ffffffff81e43b00 t jpeg_v2_5_wait_for_idle +ffffffff81e43c30 t jpeg_v2_5_set_clockgating_state +ffffffff81e43da0 t jpeg_v2_5_set_powergating_state +ffffffff81e44450 t jpeg_v2_5_dec_ring_get_rptr +ffffffff81e444f0 t jpeg_v2_5_dec_ring_get_wptr +ffffffff81e445a0 t jpeg_v2_5_dec_ring_set_wptr +ffffffff81e44650 t jpeg_v2_6_dec_ring_insert_start +ffffffff81e44810 t jpeg_v2_6_dec_ring_insert_end +ffffffff81e449d0 t jpeg_v2_5_set_interrupt_state +ffffffff81e44a00 t jpeg_v2_5_process_interrupt +ffffffff81e44ae0 t jpeg_v2_5_enable_clock_gating +ffffffff81e44bb0 t jpeg_v2_5_disable_clock_gating +ffffffff81e45000 t jpeg_v3_0_early_init +ffffffff81e450f0 t jpeg_v3_0_sw_init +ffffffff81e45200 t jpeg_v3_0_sw_fini +ffffffff81e45250 t jpeg_v3_0_hw_init +ffffffff81e452d0 t jpeg_v3_0_hw_fini +ffffffff81e453b0 t jpeg_v3_0_suspend +ffffffff81e453e0 t jpeg_v3_0_resume +ffffffff81e45470 t jpeg_v3_0_is_idle +ffffffff81e454f0 t jpeg_v3_0_wait_for_idle +ffffffff81e455e0 t jpeg_v3_0_set_clockgating_state +ffffffff81e45690 t jpeg_v3_0_set_powergating_state +ffffffff81e45f30 t jpeg_v3_0_dec_ring_get_rptr +ffffffff81e45fc0 t jpeg_v3_0_dec_ring_get_wptr +ffffffff81e46060 t jpeg_v3_0_dec_ring_set_wptr +ffffffff81e46100 t jpeg_v3_0_set_interrupt_state +ffffffff81e46130 t jpeg_v3_0_process_interrupt +ffffffff81e461c0 t jpeg_v3_0_enable_clock_gating +ffffffff81e46290 t jpeg_v3_0_disable_clock_gating +ffffffff81e47000 t jpeg_v4_0_early_init +ffffffff81e47080 t jpeg_v4_0_sw_init +ffffffff81e47190 t jpeg_v4_0_sw_fini +ffffffff81e471e0 t jpeg_v4_0_hw_init +ffffffff81e47300 t jpeg_v4_0_hw_fini +ffffffff81e473e0 t jpeg_v4_0_suspend +ffffffff81e47410 t jpeg_v4_0_resume +ffffffff81e47460 t jpeg_v4_0_is_idle +ffffffff81e474e0 t jpeg_v4_0_wait_for_idle +ffffffff81e475d0 t jpeg_v4_0_set_clockgating_state +ffffffff81e47680 t jpeg_v4_0_set_powergating_state +ffffffff81e47e90 t jpeg_v4_0_dec_ring_get_rptr +ffffffff81e47f20 t jpeg_v4_0_dec_ring_get_wptr +ffffffff81e47fc0 t jpeg_v4_0_dec_ring_set_wptr +ffffffff81e48060 t jpeg_v4_0_set_interrupt_state +ffffffff81e48090 t jpeg_v4_0_process_interrupt +ffffffff81e48130 t jpeg_v4_0_enable_clock_gating +ffffffff81e482e0 t jpeg_v4_0_disable_clock_gating +ffffffff81e49000 t lsdma_v6_0_copy_mem +ffffffff81e49350 t lsdma_v6_0_fill_mem +ffffffff81e49630 t lsdma_v6_0_update_memory_power_gating +ffffffff81e4a000 t mca_v3_0_mp0_query_ras_error_count +ffffffff81e4a020 t mca_v3_0_ras_block_match +ffffffff81e4a070 t mca_v3_0_mp1_query_ras_error_count +ffffffff81e4a090 t mca_v3_0_mpio_query_ras_error_count +ffffffff81e4a0b0 t mca_v3_0_init +ffffffff81e4b000 t mes_v10_0_early_init +ffffffff81e4b060 t mes_v10_0_late_init +ffffffff81e4b0b0 t mes_v10_1_sw_init +ffffffff81e4b580 t mes_v10_1_sw_fini +ffffffff81e4b6a0 t mes_v10_1_hw_init +ffffffff81e4bf70 t mes_v10_1_hw_fini +ffffffff81e4c060 t mes_v10_1_suspend +ffffffff81e4c170 t mes_v10_1_resume +ffffffff81e4c1c0 t mes_v10_1_kiq_hw_init +ffffffff81e4c5d0 t mes_v10_1_add_hw_queue +ffffffff81e4c750 t mes_v10_1_remove_hw_queue +ffffffff81e4c7e0 t mes_v10_1_unmap_legacy_queue +ffffffff81e4c8d0 t mes_v10_1_suspend_gang +ffffffff81e4c900 t mes_v10_1_resume_gang +ffffffff81e4c930 t mes_v10_1_submit_pkt_and_poll_completion +ffffffff81e4cb30 t mes_v10_1_load_microcode +ffffffff81e4d330 t mes_v10_1_enable +ffffffff81e4d7a0 t mes_v10_1_queue_init +ffffffff81e4da40 t amdgpu_bo_unreserve +ffffffff81e4db20 t mes_v10_1_ring_get_rptr +ffffffff81e4db50 t mes_v10_1_ring_get_wptr +ffffffff81e4dbc0 t mes_v10_1_ring_set_wptr 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mes_v11_0_ring_get_wptr +ffffffff81e51810 t mes_v11_0_ring_set_wptr +ffffffff81e52000 t mmhub_v1_0_query_ras_error_count +ffffffff81e52150 t mmhub_v1_0_reset_ras_error_count +ffffffff81e52200 t mmhub_v1_0_get_fb_location +ffffffff81e52310 t mmhub_v1_0_init +ffffffff81e523c0 t mmhub_v1_0_gart_enable +ffffffff81e536a0 t mmhub_v1_0_set_fault_enable_default +ffffffff81e537b0 t mmhub_v1_0_gart_disable +ffffffff81e53a40 t mmhub_v1_0_set_clockgating +ffffffff81e53eb0 t mmhub_v1_0_get_clockgating +ffffffff81e53fd0 t mmhub_v1_0_setup_vm_pt_regs +ffffffff81e54110 t mmhub_v1_0_update_power_gating +ffffffff81e55000 t mmhub_v1_7_query_ras_error_count +ffffffff81e55150 t mmhub_v1_7_query_ras_error_status +ffffffff81e55230 t mmhub_v1_7_reset_ras_error_count +ffffffff81e552d0 t mmhub_v1_7_reset_ras_error_status +ffffffff81e553c0 t mmhub_v1_7_get_fb_location +ffffffff81e554d0 t mmhub_v1_7_init +ffffffff81e55570 t mmhub_v1_7_gart_enable +ffffffff81e56a00 t mmhub_v1_7_set_fault_enable_default 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+ffffffff81e66990 t xgpu_ai_send_access_requests +ffffffff81e66a80 t xgpu_ai_poll_msg +ffffffff81e67000 T xgpu_nv_mailbox_set_irq_funcs +ffffffff81e67050 T xgpu_nv_mailbox_add_irq_id +ffffffff81e670e0 T xgpu_nv_mailbox_get_irq +ffffffff81e67190 t xgpu_nv_mailbox_flr_work +ffffffff81e673b0 T xgpu_nv_mailbox_put_irq +ffffffff81e673f0 t xgpu_nv_request_full_gpu_access +ffffffff81e67410 t xgpu_nv_release_full_gpu_access +ffffffff81e67430 t xgpu_nv_request_init_data +ffffffff81e67450 t xgpu_nv_request_reset +ffffffff81e67550 t xgpu_nv_mailbox_trans_msg +ffffffff81e676f0 t xgpu_nv_set_mailbox_ack_irq +ffffffff81e67770 t xgpu_nv_mailbox_ack_irq +ffffffff81e677c0 t xgpu_nv_set_mailbox_rcv_irq +ffffffff81e67840 t xgpu_nv_mailbox_rcv_irq +ffffffff81e678f0 t xgpu_nv_send_access_requests +ffffffff81e68000 T xgpu_vi_init_golden_registers +ffffffff81e680c0 T xgpu_vi_mailbox_set_irq_funcs +ffffffff81e68110 T xgpu_vi_mailbox_add_irq_id +ffffffff81e681a0 T xgpu_vi_mailbox_get_irq +ffffffff81e68250 t xgpu_vi_mailbox_flr_work +ffffffff81e683a0 T xgpu_vi_mailbox_put_irq +ffffffff81e683e0 t xgpu_vi_request_full_gpu_access +ffffffff81e68400 t xgpu_vi_release_full_gpu_access +ffffffff81e68420 t xgpu_vi_request_reset +ffffffff81e68440 t xgpu_vi_wait_reset_cmpl +ffffffff81e68520 t xgpu_vi_set_mailbox_ack_irq +ffffffff81e685a0 t xgpu_vi_mailbox_ack_irq +ffffffff81e685f0 t xgpu_vi_set_mailbox_rcv_irq +ffffffff81e68670 t xgpu_vi_mailbox_rcv_irq +ffffffff81e68720 t xgpu_vi_mailbox_rcv_msg +ffffffff81e68840 t xgpu_vi_send_access_requests +ffffffff81e69000 t navi10_ih_early_init +ffffffff81e69060 t navi10_ih_sw_init +ffffffff81e691d0 t navi10_ih_sw_fini +ffffffff81e69210 t navi10_ih_hw_init +ffffffff81e69620 t navi10_ih_hw_fini +ffffffff81e69680 t navi10_ih_suspend +ffffffff81e696e0 t navi10_ih_resume +ffffffff81e696f0 t navi10_ih_is_idle +ffffffff81e69720 t navi10_ih_wait_for_idle +ffffffff81e69750 t navi10_ih_soft_reset +ffffffff81e69780 t navi10_ih_set_clockgating_state +ffffffff81e698a0 t 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nbio_v4_3_enable_doorbell_aperture +ffffffff81e6d790 t nbio_v4_3_enable_doorbell_selfring_aperture +ffffffff81e6d8f0 t nbio_v4_3_ih_doorbell_range +ffffffff81e6da10 t nbio_v4_3_update_medium_grain_clock_gating +ffffffff81e6db50 t nbio_v4_3_update_medium_grain_light_sleep +ffffffff81e6dc80 t nbio_v4_3_get_clockgating_state +ffffffff81e6dd90 t nbio_v4_3_ih_control +ffffffff81e6dee0 t nbio_v4_3_init_registers +ffffffff81e6e000 t nbio_v4_3_remap_hdp_registers +ffffffff81e6e110 t nbio_v4_3_program_aspm +ffffffff81e6edb0 t nbio_v4_3_get_rom_offset +ffffffff81e6ee40 t nbio_v4_3_sriov_sdma_doorbell_range +ffffffff81e6ee70 t nbio_v4_3_sriov_vcn_doorbell_range +ffffffff81e6eea0 t nbio_v4_3_sriov_gc_doorbell_init +ffffffff81e6eed0 t nbio_v4_3_sriov_ih_doorbell_range +ffffffff81e6f000 t nbio_v6_1_get_hdp_flush_req_offset +ffffffff81e6f040 t nbio_v6_1_get_hdp_flush_done_offset +ffffffff81e6f080 t nbio_v6_1_get_pcie_index_offset +ffffffff81e6f0c0 t nbio_v6_1_get_pcie_data_offset +ffffffff81e6f100 t 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+ffffffff81e74500 t nbio_v7_7_enable_doorbell_selfring_aperture +ffffffff81e74660 t nbio_v7_7_ih_doorbell_range +ffffffff81e74770 t nbio_v7_7_update_medium_grain_clock_gating +ffffffff81e748b0 t nbio_v7_7_update_medium_grain_light_sleep +ffffffff81e74ac0 t nbio_v7_7_get_clockgating_state +ffffffff81e74bd0 t nbio_v7_7_ih_control +ffffffff81e74d20 t nbio_v7_7_init_registers +ffffffff81e74e20 t nbio_v7_7_remap_hdp_registers +ffffffff81e75000 T nv_grbm_select +ffffffff81e750a0 T nv_set_virt_ops +ffffffff81e750e0 t nv_common_early_init +ffffffff81e754d0 t nv_common_late_init +ffffffff81e75540 t nv_common_sw_init +ffffffff81e75580 t nv_common_sw_fini +ffffffff81e755b0 t nv_common_hw_init +ffffffff81e756c0 t nv_common_hw_fini +ffffffff81e75720 t nv_common_suspend +ffffffff81e75780 t nv_common_resume +ffffffff81e757c0 t nv_common_is_idle +ffffffff81e757f0 t nv_common_wait_for_idle +ffffffff81e75820 t nv_common_soft_reset +ffffffff81e75850 t nv_common_set_clockgating_state +ffffffff81e75920 t nv_common_set_powergating_state +ffffffff81e75950 t nv_common_get_clockgating_state +ffffffff81e759c0 t nv_pcie_rreg +ffffffff81e75a20 t nv_pcie_wreg +ffffffff81e75a80 t nv_pcie_rreg64 +ffffffff81e75ae0 t nv_pcie_wreg64 +ffffffff81e75b40 t nv_didt_rreg +ffffffff81e75be0 t nv_didt_wreg +ffffffff81e75c60 t nv_read_disabled_bios +ffffffff81e75c90 t nv_read_register +ffffffff81e75d80 t nv_vga_set_state +ffffffff81e75db0 t nv_asic_reset +ffffffff81e75ef0 t nv_asic_reset_method +ffffffff81e75fe0 t nv_get_xclk +ffffffff81e76010 t nv_set_uvd_clocks +ffffffff81e76040 t nv_set_vce_clocks +ffffffff81e76070 t nv_get_config_memsize +ffffffff81e76090 t nv_need_full_reset +ffffffff81e760c0 t nv_init_doorbell_index +ffffffff81e761f0 t nv_need_reset_on_init +ffffffff81e76280 t nv_get_pcie_replay_count +ffffffff81e762b0 t nv_pre_asic_init +ffffffff81e762e0 t nv_update_umd_stable_pstate +ffffffff81e763a0 t nv_query_video_codecs +ffffffff81e77000 T psp_v10_0_set_psp_funcs +ffffffff81e77030 t psp_v10_0_init_microcode +ffffffff81e772a0 t psp_v10_0_ring_init +ffffffff81e77320 t psp_v10_0_ring_create +ffffffff81e77630 t psp_v10_0_ring_stop +ffffffff81e77820 t psp_v10_0_ring_destroy +ffffffff81e778a0 t psp_v10_0_mode1_reset +ffffffff81e778f0 t psp_v10_0_ring_get_wptr +ffffffff81e77950 t psp_v10_0_ring_set_wptr +ffffffff81e78000 T psp_v11_0_set_psp_funcs +ffffffff81e78030 t psp_v11_0_init_microcode +ffffffff81e78450 t psp_v11_0_bootloader_load_kdb +ffffffff81e78470 t psp_v11_0_bootloader_load_spl +ffffffff81e78490 t psp_v11_0_bootloader_load_sysdrv +ffffffff81e784b0 t psp_v11_0_bootloader_load_sos +ffffffff81e78800 t psp_v11_0_ring_init +ffffffff81e78880 t psp_v11_0_ring_create +ffffffff81e78f10 t psp_v11_0_ring_stop +ffffffff81e79130 t psp_v11_0_ring_destroy +ffffffff81e791b0 t psp_v11_0_mode1_reset +ffffffff81e792b0 t psp_v11_0_memory_training +ffffffff81e79730 t psp_v11_0_ring_get_wptr +ffffffff81e79780 t psp_v11_0_ring_set_wptr +ffffffff81e798c0 t psp_v11_0_load_usbc_pd_fw +ffffffff81e79ab0 t psp_v11_0_read_usbc_pd_fw +ffffffff81e79bd0 t release_firmware +ffffffff81e79c10 t psp_v11_0_bootloader_load_component +ffffffff81e79dd0 t psp_v11_0_wait_for_bootloader +ffffffff81e79fa0 t psp_v11_0_memory_training_send_msg +ffffffff81e7b000 T psp_v11_0_8_set_psp_funcs +ffffffff81e7b030 t psp_v11_0_8_ring_init +ffffffff81e7b0b0 t psp_v11_0_8_ring_create +ffffffff81e7b740 t psp_v11_0_8_ring_stop +ffffffff81e7bad0 t psp_v11_0_8_ring_destroy +ffffffff81e7bb50 t psp_v11_0_8_ring_get_wptr +ffffffff81e7bbc0 t psp_v11_0_8_ring_set_wptr +ffffffff81e7c000 T psp_v12_0_set_psp_funcs +ffffffff81e7c030 t psp_v12_0_init_microcode +ffffffff81e7c2a0 t psp_v12_0_bootloader_load_sysdrv +ffffffff81e7c5c0 t psp_v12_0_bootloader_load_sos +ffffffff81e7c920 t psp_v12_0_ring_init +ffffffff81e7cf00 t psp_v12_0_ring_create +ffffffff81e7d460 t psp_v12_0_ring_stop +ffffffff81e7d680 t psp_v12_0_ring_destroy +ffffffff81e7d700 t psp_v12_0_mode1_reset +ffffffff81e7d800 t psp_v12_0_ring_get_wptr +ffffffff81e7d870 t psp_v12_0_ring_set_wptr +ffffffff81e7e000 T psp_v13_0_set_psp_funcs +ffffffff81e7e030 t psp_v13_0_init_microcode +ffffffff81e7e160 t psp_v13_0_bootloader_load_kdb +ffffffff81e7e180 t psp_v13_0_bootloader_load_spl +ffffffff81e7e1a0 t psp_v13_0_bootloader_load_sysdrv +ffffffff81e7e1c0 t psp_v13_0_bootloader_load_soc_drv +ffffffff81e7e1e0 t psp_v13_0_bootloader_load_intf_drv +ffffffff81e7e200 t psp_v13_0_bootloader_load_dbg_drv +ffffffff81e7e220 t psp_v13_0_bootloader_load_ras_drv +ffffffff81e7e240 t psp_v13_0_bootloader_load_sos +ffffffff81e7e5a0 t psp_v13_0_ring_init +ffffffff81e7e620 t psp_v13_0_ring_create +ffffffff81e7ecb0 t psp_v13_0_ring_stop +ffffffff81e7f040 t psp_v13_0_ring_destroy +ffffffff81e7f0c0 t psp_v13_0_memory_training +ffffffff81e7f4f0 t psp_v13_0_ring_get_wptr +ffffffff81e7f560 t psp_v13_0_ring_set_wptr +ffffffff81e7f660 t psp_v13_0_load_usbc_pd_fw +ffffffff81e7f850 t psp_v13_0_read_usbc_pd_fw +ffffffff81e7f970 t psp_v13_0_update_spirom +ffffffff81e7fb40 t psp_v13_0_vbflash_status +ffffffff81e7fba0 t psp_v13_0_bootloader_load_component +ffffffff81e7fd70 t psp_v13_0_wait_for_bootloader +ffffffff81e7ff40 t psp_v13_0_memory_training_send_msg +ffffffff81e800a0 t psp_v13_0_exec_spi_cmd +ffffffff81e81000 T psp_v13_0_4_set_psp_funcs +ffffffff81e81030 t psp_v13_0_4_init_microcode +ffffffff81e81100 t psp_v13_0_4_bootloader_load_kdb +ffffffff81e81120 t psp_v13_0_4_bootloader_load_spl +ffffffff81e81140 t psp_v13_0_4_bootloader_load_sysdrv +ffffffff81e81160 t psp_v13_0_4_bootloader_load_soc_drv +ffffffff81e81180 t psp_v13_0_4_bootloader_load_intf_drv +ffffffff81e811a0 t psp_v13_0_4_bootloader_load_dbg_drv +ffffffff81e811c0 t psp_v13_0_4_bootloader_load_sos +ffffffff81e81530 t psp_v13_0_4_ring_init +ffffffff81e815b0 t psp_v13_0_4_ring_create +ffffffff81e81c50 t psp_v13_0_4_ring_stop +ffffffff81e81fe0 t psp_v13_0_4_ring_destroy +ffffffff81e82060 t psp_v13_0_4_ring_get_wptr +ffffffff81e820d0 t psp_v13_0_4_ring_set_wptr +ffffffff81e821d0 t psp_v13_0_4_bootloader_load_component +ffffffff81e823a0 t psp_v13_0_4_wait_for_bootloader +ffffffff81e83000 T psp_v3_1_set_psp_funcs +ffffffff81e83030 t psp_v3_1_init_microcode +ffffffff81e830f0 t psp_v3_1_bootloader_load_sysdrv +ffffffff81e83410 t psp_v3_1_bootloader_load_sos +ffffffff81e83770 t psp_v3_1_ring_init +ffffffff81e837f0 t psp_v3_1_ring_create +ffffffff81e842f0 t psp_v3_1_ring_stop +ffffffff81e84510 t psp_v3_1_ring_destroy +ffffffff81e84590 t psp_v3_1_smu_reload_quirk +ffffffff81e845e0 t psp_v3_1_mode1_reset +ffffffff81e846e0 t psp_v3_1_ring_get_wptr +ffffffff81e84730 t psp_v3_1_ring_set_wptr +ffffffff81e85000 t sdma_v2_4_early_init +ffffffff81e850f0 t sdma_v2_4_sw_init +ffffffff81e85580 t sdma_v2_4_sw_fini +ffffffff81e85660 t sdma_v2_4_hw_init +ffffffff81e85a10 t sdma_v2_4_hw_fini +ffffffff81e85a50 t sdma_v2_4_suspend +ffffffff81e85a90 t sdma_v2_4_resume +ffffffff81e85aa0 t sdma_v2_4_is_idle +ffffffff81e85ae0 t sdma_v2_4_wait_for_idle +ffffffff81e85b80 t sdma_v2_4_soft_reset +ffffffff81e85cc0 t sdma_v2_4_set_clockgating_state +ffffffff81e85cf0 t sdma_v2_4_set_powergating_state +ffffffff81e85d20 t sdma_v2_4_ring_get_rptr +ffffffff81e85d60 t sdma_v2_4_ring_get_wptr +ffffffff81e85dc0 t sdma_v2_4_ring_set_wptr +ffffffff81e85e00 t sdma_v2_4_ring_emit_ib +ffffffff81e860b0 t sdma_v2_4_ring_emit_fence +ffffffff81e864b0 t sdma_v2_4_ring_emit_pipeline_sync +ffffffff81e86730 t sdma_v2_4_ring_emit_vm_flush +ffffffff81e869a0 t sdma_v2_4_ring_emit_hdp_flush +ffffffff81e86c20 t sdma_v2_4_ring_test_ring +ffffffff81e86f00 t sdma_v2_4_ring_test_ib +ffffffff81e870d0 t sdma_v2_4_ring_insert_nop +ffffffff81e87200 t sdma_v2_4_ring_pad_ib +ffffffff81e87330 t sdma_v2_4_ring_emit_wreg +ffffffff81e87480 t sdma_v2_4_emit_copy_buffer +ffffffff81e87540 t sdma_v2_4_emit_fill_buffer +ffffffff81e875d0 t sdma_v2_4_vm_copy_pte +ffffffff81e87690 t sdma_v2_4_vm_write_pte +ffffffff81e87760 t sdma_v2_4_vm_set_pte_pde +ffffffff81e87860 t sdma_v2_4_set_trap_irq_state +ffffffff81e87920 t sdma_v2_4_process_trap_irq +ffffffff81e879c0 t sdma_v2_4_process_illegal_inst_irq +ffffffff81e87a40 t sdma_v2_4_enable +ffffffff81e88000 t sdma_v3_0_early_init +ffffffff81e88100 t sdma_v3_0_sw_init +ffffffff81e885b0 t sdma_v3_0_sw_fini +ffffffff81e88690 t sdma_v3_0_hw_init +ffffffff81e887c0 t sdma_v3_0_hw_fini +ffffffff81e88810 t sdma_v3_0_suspend +ffffffff81e88860 t sdma_v3_0_resume +ffffffff81e88870 t sdma_v3_0_is_idle +ffffffff81e888b0 t sdma_v3_0_wait_for_idle +ffffffff81e88950 t sdma_v3_0_check_soft_reset +ffffffff81e889b0 t sdma_v3_0_pre_soft_reset +ffffffff81e88a00 t sdma_v3_0_soft_reset +ffffffff81e88ad0 t sdma_v3_0_post_soft_reset +ffffffff81e88b20 t sdma_v3_0_set_clockgating_state +ffffffff81e88d80 t sdma_v3_0_set_powergating_state +ffffffff81e88db0 t sdma_v3_0_get_clockgating_state +ffffffff81e88e30 t sdma_v3_0_ring_get_rptr +ffffffff81e88e70 t sdma_v3_0_ring_get_wptr +ffffffff81e88ef0 t sdma_v3_0_ring_set_wptr +ffffffff81e88fa0 t sdma_v3_0_ring_emit_ib +ffffffff81e89250 t sdma_v3_0_ring_emit_fence +ffffffff81e89650 t sdma_v3_0_ring_emit_pipeline_sync +ffffffff81e898d0 t sdma_v3_0_ring_emit_vm_flush +ffffffff81e89b40 t sdma_v3_0_ring_emit_hdp_flush +ffffffff81e89dc0 t sdma_v3_0_ring_test_ring +ffffffff81e8a0a0 t sdma_v3_0_ring_test_ib +ffffffff81e8a270 t sdma_v3_0_ring_insert_nop +ffffffff81e8a3a0 t sdma_v3_0_ring_pad_ib +ffffffff81e8a4d0 t sdma_v3_0_ring_emit_wreg +ffffffff81e8a620 t sdma_v3_0_emit_copy_buffer +ffffffff81e8a6e0 t sdma_v3_0_emit_fill_buffer +ffffffff81e8a770 t sdma_v3_0_vm_copy_pte +ffffffff81e8a830 t sdma_v3_0_vm_write_pte +ffffffff81e8a900 t sdma_v3_0_vm_set_pte_pde +ffffffff81e8aa00 t sdma_v3_0_set_trap_irq_state +ffffffff81e8aac0 t sdma_v3_0_process_trap_irq +ffffffff81e8ab60 t sdma_v3_0_process_illegal_inst_irq +ffffffff81e8abe0 t sdma_v3_0_ctx_switch_enable +ffffffff81e8ad80 t sdma_v3_0_enable +ffffffff81e8aef0 t sdma_v3_0_gfx_resume +ffffffff81e8c000 t sdma_v4_0_early_init +ffffffff81e8c5b0 t sdma_v4_0_late_init +ffffffff81e8c850 t sdma_v4_0_sw_init +ffffffff81e8cbc0 t sdma_v4_0_sw_fini +ffffffff81e8cc80 t sdma_v4_0_hw_init +ffffffff81e8fc00 t sdma_v4_0_hw_fini +ffffffff81e8fcc0 t sdma_v4_0_suspend +ffffffff81e8fd10 t sdma_v4_0_resume +ffffffff81e8fd90 t sdma_v4_0_is_idle +ffffffff81e8fec0 t sdma_v4_0_wait_for_idle +ffffffff81e90060 t sdma_v4_0_soft_reset +ffffffff81e90090 t sdma_v4_0_set_clockgating_state +ffffffff81e90590 t sdma_v4_0_set_powergating_state +ffffffff81e90650 t sdma_v4_0_get_clockgating_state +ffffffff81e906f0 t sdma_v4_0_query_ras_error_count +ffffffff81e908c0 t sdma_v4_0_reset_ras_error_count +ffffffff81e90a10 t sdma_v4_0_ring_get_rptr +ffffffff81e90a70 t sdma_v4_0_ring_get_wptr +ffffffff81e90c60 t sdma_v4_0_ring_set_wptr +ffffffff81e90ee0 t sdma_v4_0_ring_emit_ib +ffffffff81e91190 t sdma_v4_0_ring_emit_fence +ffffffff81e915b0 t sdma_v4_0_ring_emit_pipeline_sync +ffffffff81e91610 t sdma_v4_0_ring_emit_vm_flush +ffffffff81e91630 t sdma_v4_0_ring_emit_hdp_flush +ffffffff81e916e0 t sdma_v4_0_ring_test_ring +ffffffff81e919c0 t sdma_v4_0_ring_test_ib +ffffffff81e91b90 t sdma_v4_0_ring_insert_nop +ffffffff81e91cc0 t sdma_v4_0_ring_pad_ib +ffffffff81e91df0 t sdma_v4_0_ring_emit_wreg +ffffffff81e91f40 t sdma_v4_0_ring_emit_reg_wait +ffffffff81e91f90 t sdma_v4_0_wait_reg_mem +ffffffff81e922a0 t sdma_v4_0_page_ring_get_wptr +ffffffff81e92450 t sdma_v4_0_page_ring_set_wptr +ffffffff81e92610 t sdma_v4_0_emit_copy_buffer +ffffffff81e926d0 t sdma_v4_0_emit_fill_buffer +ffffffff81e92760 t sdma_v4_0_vm_copy_pte +ffffffff81e92820 t sdma_v4_0_vm_write_pte +ffffffff81e928f0 t sdma_v4_0_vm_set_pte_pde +ffffffff81e929f0 t sdma_v4_0_set_trap_irq_state +ffffffff81e92b90 t sdma_v4_0_process_trap_irq +ffffffff81e92cd0 t sdma_v4_0_process_illegal_inst_irq +ffffffff81e92df0 t sdma_v4_0_set_ecc_irq_state +ffffffff81e92f90 t sdma_v4_0_process_vm_hole_irq +ffffffff81e92fd0 t sdma_v4_0_print_iv_entry +ffffffff81e93110 t sdma_v4_0_process_doorbell_invalid_irq +ffffffff81e93150 t sdma_v4_0_process_pool_timeout_irq +ffffffff81e93190 t sdma_v4_0_process_srbm_write_irq +ffffffff81e931d0 t sdma_v4_0_process_ras_data_cb +ffffffff81e93250 t sdma_v4_0_ctx_switch_enable +ffffffff81e93920 t sdma_v4_0_enable +ffffffff81e93ee0 t sdma_v4_0_gfx_enable +ffffffff81e95000 t sdma_v4_4_query_ras_error_count +ffffffff81e95250 t sdma_v4_4_reset_ras_error_count +ffffffff81e96000 t sdma_v5_0_early_init +ffffffff81e96130 t sdma_v5_0_sw_init +ffffffff81e96410 t sdma_v5_0_sw_fini +ffffffff81e964a0 t sdma_v5_0_hw_init +ffffffff81e97710 t sdma_v5_0_hw_fini +ffffffff81e97770 t sdma_v5_0_suspend +ffffffff81e977d0 t sdma_v5_0_resume +ffffffff81e977e0 t sdma_v5_0_is_idle +ffffffff81e97870 t sdma_v5_0_wait_for_idle +ffffffff81e97930 t sdma_v5_0_soft_reset +ffffffff81e97960 t sdma_v5_0_set_clockgating_state +ffffffff81e97b60 t sdma_v5_0_set_powergating_state +ffffffff81e97b90 t sdma_v5_0_get_clockgating_state +ffffffff81e97c30 t sdma_v5_0_ring_get_rptr +ffffffff81e97c90 t sdma_v5_0_ring_get_wptr +ffffffff81e97e30 t sdma_v5_0_ring_set_wptr +ffffffff81e98180 t sdma_v5_0_ring_emit_ib +ffffffff81e98440 t sdma_v5_0_ring_emit_fence +ffffffff81e988a0 t sdma_v5_0_ring_emit_pipeline_sync +ffffffff81e98b20 t sdma_v5_0_ring_emit_vm_flush +ffffffff81e98b40 t sdma_v5_0_ring_emit_hdp_flush +ffffffff81e98de0 t sdma_v5_0_ring_test_ring +ffffffff81e991a0 t sdma_v5_0_ring_test_ib +ffffffff81e994d0 t sdma_v5_0_ring_insert_nop +ffffffff81e99600 t sdma_v5_0_ring_pad_ib +ffffffff81e99730 t sdma_v5_0_ring_init_cond_exec +ffffffff81e99960 t sdma_v5_0_ring_patch_cond_exec +ffffffff81e99a20 t sdma_v5_0_ring_emit_wreg +ffffffff81e99b70 t sdma_v5_0_ring_emit_reg_wait +ffffffff81e99df0 t sdma_v5_0_ring_emit_reg_write_reg_wait +ffffffff81e99e70 t sdma_v5_0_ring_preempt_ib +ffffffff81e99fb0 t sdma_v5_0_ring_emit_mem_sync +ffffffff81e9a1c0 t sdma_v5_0_emit_copy_buffer +ffffffff81e9a280 t sdma_v5_0_emit_fill_buffer +ffffffff81e9a310 t sdma_v5_0_vm_copy_pte +ffffffff81e9a3d0 t sdma_v5_0_vm_write_pte +ffffffff81e9a4a0 t sdma_v5_0_vm_set_pte_pde +ffffffff81e9a5a0 t sdma_v5_0_set_trap_irq_state +ffffffff81e9a630 t sdma_v5_0_process_trap_irq +ffffffff81e9a740 t sdma_v5_0_process_illegal_inst_irq +ffffffff81e9a770 t sdma_v5_0_mqd_init +ffffffff81e9a850 t sdma_v5_0_ctx_switch_enable +ffffffff81e9ab70 t sdma_v5_0_enable +ffffffff81e9b000 t sdma_v5_2_early_init +ffffffff81e9b130 t sdma_v5_2_sw_init +ffffffff81e9b400 t sdma_v5_2_sw_fini +ffffffff81e9b490 t sdma_v5_2_hw_init +ffffffff81e9b7c0 t sdma_v5_2_hw_fini +ffffffff81e9b820 t sdma_v5_2_suspend +ffffffff81e9b880 t sdma_v5_2_resume +ffffffff81e9b890 t sdma_v5_2_is_idle +ffffffff81e9b940 t sdma_v5_2_wait_for_idle +ffffffff81e9ba40 t sdma_v5_2_soft_reset +ffffffff81e9bce0 t sdma_v5_2_set_clockgating_state +ffffffff81e9c000 t sdma_v5_2_set_powergating_state +ffffffff81e9c030 t sdma_v5_2_get_clockgating_state +ffffffff81e9c0c0 t sdma_v5_2_ring_get_rptr +ffffffff81e9c120 t sdma_v5_2_ring_get_wptr +ffffffff81e9c260 t sdma_v5_2_ring_set_wptr +ffffffff81e9c410 t sdma_v5_2_ring_emit_ib +ffffffff81e9c6d0 t sdma_v5_2_ring_emit_fence +ffffffff81e9cb30 t sdma_v5_2_ring_emit_pipeline_sync +ffffffff81e9cdb0 t sdma_v5_2_ring_emit_vm_flush +ffffffff81e9cdd0 t sdma_v5_2_ring_emit_hdp_flush +ffffffff81e9d070 t sdma_v5_2_ring_test_ring +ffffffff81e9d430 t sdma_v5_2_ring_test_ib +ffffffff81e9d760 t sdma_v5_2_ring_insert_nop +ffffffff81e9d890 t sdma_v5_2_ring_pad_ib +ffffffff81e9d9c0 t sdma_v5_2_ring_init_cond_exec +ffffffff81e9dbf0 t sdma_v5_2_ring_patch_cond_exec +ffffffff81e9dcb0 t sdma_v5_2_ring_begin_use +ffffffff81e9dcd0 t sdma_v5_2_ring_end_use +ffffffff81e9dcf0 t sdma_v5_2_ring_emit_wreg +ffffffff81e9de40 t sdma_v5_2_ring_emit_reg_wait +ffffffff81e9e0c0 t sdma_v5_2_ring_emit_reg_write_reg_wait +ffffffff81e9e140 t sdma_v5_2_ring_preempt_ib +ffffffff81e9e2b0 t sdma_v5_2_ring_emit_mem_sync +ffffffff81e9e4c0 t sdma_v5_2_emit_copy_buffer +ffffffff81e9e580 t sdma_v5_2_emit_fill_buffer +ffffffff81e9e610 t sdma_v5_2_vm_copy_pte +ffffffff81e9e6d0 t sdma_v5_2_vm_write_pte +ffffffff81e9e7a0 t sdma_v5_2_vm_set_pte_pde +ffffffff81e9e8a0 t sdma_v5_2_set_trap_irq_state +ffffffff81e9e960 t sdma_v5_2_process_trap_irq +ffffffff81e9eaa0 t sdma_v5_2_process_illegal_inst_irq +ffffffff81e9ead0 t sdma_v5_2_mqd_init +ffffffff81e9ebb0 t sdma_v5_2_ctx_switch_enable +ffffffff81e9efc0 t sdma_v5_2_enable +ffffffff81e9f3c0 t sdma_v5_2_gfx_resume +ffffffff81ea1000 t sdma_v6_0_early_init +ffffffff81ea1100 t sdma_v6_0_sw_init +ffffffff81ea12e0 t sdma_v6_0_sw_fini +ffffffff81ea1370 t sdma_v6_0_hw_init +ffffffff81ea1380 t sdma_v6_0_hw_fini +ffffffff81ea13d0 t sdma_v6_0_suspend +ffffffff81ea1420 t sdma_v6_0_resume +ffffffff81ea1430 t sdma_v6_0_is_idle +ffffffff81ea14c0 t sdma_v6_0_wait_for_idle +ffffffff81ea1580 t sdma_v6_0_check_soft_reset +ffffffff81ea1640 t sdma_v6_0_soft_reset +ffffffff81ea1ad0 t sdma_v6_0_set_clockgating_state +ffffffff81ea1b00 t sdma_v6_0_set_powergating_state +ffffffff81ea1b30 t sdma_v6_0_get_clockgating_state +ffffffff81ea1b60 t sdma_v6_0_ring_get_rptr +ffffffff81ea1bc0 t sdma_v6_0_ring_get_wptr +ffffffff81ea1c30 t sdma_v6_0_ring_set_wptr +ffffffff81ea1f80 t sdma_v6_0_ring_emit_ib +ffffffff81ea2240 t sdma_v6_0_ring_emit_fence +ffffffff81ea26a0 t sdma_v6_0_ring_emit_pipeline_sync +ffffffff81ea2920 t sdma_v6_0_ring_emit_vm_flush +ffffffff81ea2940 t sdma_v6_0_ring_emit_hdp_flush +ffffffff81ea2be0 t sdma_v6_0_ring_test_ring +ffffffff81ea2fa0 t sdma_v6_0_ring_test_ib +ffffffff81ea32d0 t sdma_v6_0_ring_insert_nop +ffffffff81ea3400 t sdma_v6_0_ring_pad_ib +ffffffff81ea3530 t sdma_v6_0_ring_init_cond_exec +ffffffff81ea3760 t sdma_v6_0_ring_patch_cond_exec +ffffffff81ea3820 t sdma_v6_0_ring_emit_wreg +ffffffff81ea3970 t sdma_v6_0_ring_emit_reg_wait +ffffffff81ea3bf0 t sdma_v6_0_ring_emit_reg_write_reg_wait +ffffffff81ea3c70 t sdma_v6_0_ring_preempt_ib +ffffffff81ea3dc0 t sdma_v6_0_ring_emit_mem_sync +ffffffff81ea3fd0 t sdma_v6_0_emit_copy_buffer +ffffffff81ea4090 t sdma_v6_0_emit_fill_buffer +ffffffff81ea4120 t sdma_v6_0_vm_copy_pte +ffffffff81ea41e0 t sdma_v6_0_vm_write_pte +ffffffff81ea42b0 t sdma_v6_0_vm_set_pte_pde +ffffffff81ea43b0 t sdma_v6_0_set_trap_irq_state +ffffffff81ea4440 t sdma_v6_0_process_trap_irq +ffffffff81ea4570 t sdma_v6_0_process_illegal_inst_irq +ffffffff81ea45a0 t sdma_v6_0_mqd_init +ffffffff81ea46b0 t sdma_v6_0_start +ffffffff81ea4910 t sdma_v6_0_enable +ffffffff81ea4a90 t sdma_v6_0_gfx_resume +ffffffff81ea5a90 t sdma_v6_0_gfx_stop +ffffffff81ea6000 T sienna_cichlid_reset_init +ffffffff81ea60c0 t sienna_cichlid_async_reset +ffffffff81ea6120 t sienna_cichlid_get_reset_handler +ffffffff81ea6180 T sienna_cichlid_reset_fini +ffffffff81ea61e0 t sienna_cichlid_mode2_prepare_hwcontext +ffffffff81ea6330 t sienna_cichlid_mode2_perform_reset +ffffffff81ea63b0 t sienna_cichlid_mode2_restore_hwcontext +ffffffff81ea66a0 t sienna_cichlid_mode2_reset +ffffffff81ea7000 T smu_v11_0_i2c_control_init +ffffffff81ea70d0 T smu_v11_0_i2c_control_fini +ffffffff81ea7110 t smu_v11_0_i2c_xfer +ffffffff81ea8240 t smu_v11_0_i2c_func +ffffffff81ea8270 t smu_v11_0_i2c_enable +ffffffff81ea83b0 t smu_v11_0_i2c_abort +ffffffff81ea84b0 t lock_bus +ffffffff81ea8550 t trylock_bus +ffffffff81ea85a0 t unlock_bus +ffffffff81ea9000 t smuio_v11_0_get_rom_index_offset +ffffffff81ea9040 t smuio_v11_0_get_rom_data_offset +ffffffff81ea9080 t smuio_v11_0_update_rom_clock_gating +ffffffff81ea91c0 t smuio_v11_0_get_clock_gating_state +ffffffff81eaa000 t smuio_v11_0_6_get_rom_index_offset +ffffffff81eaa040 t smuio_v11_0_6_get_rom_data_offset +ffffffff81eaa080 t smuio_v11_0_6_update_rom_clock_gating +ffffffff81eaa1c0 t smuio_v11_0_6_get_clock_gating_state +ffffffff81eab000 t smuio_v13_0_get_rom_index_offset +ffffffff81eab040 t smuio_v13_0_get_rom_data_offset +ffffffff81eab080 t smuio_v13_0_update_rom_clock_gating +ffffffff81eab1c0 t smuio_v13_0_get_clock_gating_state +ffffffff81eab260 t smuio_v13_0_get_die_id +ffffffff81eab2e0 t smuio_v13_0_get_socket_id +ffffffff81eab360 t smuio_v13_0_is_host_gpu_xgmi_supported +ffffffff81eac000 t smuio_v13_0_6_get_rom_index_offset +ffffffff81eac040 t smuio_v13_0_6_get_rom_data_offset +ffffffff81ead000 t smuio_v9_0_get_rom_index_offset +ffffffff81ead040 t smuio_v9_0_get_rom_data_offset +ffffffff81ead080 t smuio_v9_0_update_rom_clock_gating +ffffffff81ead1c0 t smuio_v9_0_get_clock_gating_state +ffffffff81eae000 T soc15_grbm_select +ffffffff81eae080 T soc15_program_register_sequence +ffffffff81eae280 T soc15_set_virt_ops +ffffffff81eae2f0 t soc15_common_early_init +ffffffff81eae680 t soc15_common_late_init +ffffffff81eae6c0 t soc15_common_sw_init +ffffffff81eae720 t soc15_common_sw_fini +ffffffff81eae770 t soc15_common_hw_init +ffffffff81eae8a0 t soc15_common_hw_fini +ffffffff81eae970 t soc15_common_suspend +ffffffff81eae9b0 t soc15_common_resume +ffffffff81eae9f0 t soc15_common_is_idle +ffffffff81eaea20 t soc15_common_wait_for_idle +ffffffff81eaea50 t soc15_common_soft_reset +ffffffff81eaea80 t soc15_common_set_clockgating_state +ffffffff81eaedc0 t soc15_common_set_powergating_state +ffffffff81eaedf0 t soc15_common_get_clockgating_state +ffffffff81eaeed0 t soc15_pcie_rreg +ffffffff81eaef30 t soc15_pcie_wreg +ffffffff81eaef90 t soc15_pcie_rreg64 +ffffffff81eaeff0 t soc15_pcie_wreg64 +ffffffff81eaf050 t soc15_uvd_ctx_rreg +ffffffff81eaf0f0 t soc15_uvd_ctx_wreg +ffffffff81eaf180 t soc15_didt_rreg +ffffffff81eaf220 t soc15_didt_wreg +ffffffff81eaf2a0 t soc15_gc_cac_rreg +ffffffff81eaf3c0 t soc15_gc_cac_wreg +ffffffff81eaf4d0 t soc15_se_cac_rreg +ffffffff81eaf5f0 t soc15_se_cac_wreg +ffffffff81eaf700 t soc15_read_disabled_bios +ffffffff81eaf730 t soc15_read_register +ffffffff81eaf830 t soc15_vga_set_state +ffffffff81eaf860 t soc15_asic_reset +ffffffff81eaf960 t soc15_asic_reset_method +ffffffff81eafae0 t soc15_get_xclk +ffffffff81eafb30 t soc15_set_uvd_clocks +ffffffff81eafb60 t soc15_set_vce_clocks +ffffffff81eafb90 t soc15_get_config_memsize +ffffffff81eafbb0 t soc15_need_full_reset +ffffffff81eafbe0 t soc15_get_pcie_usage +ffffffff81eafd10 t soc15_need_reset_on_init +ffffffff81eafdb0 t soc15_get_pcie_replay_count +ffffffff81eafe20 t soc15_supports_baco +ffffffff81eafe80 t soc15_pre_asic_init +ffffffff81eafe90 t soc15_query_video_codecs +ffffffff81eaff40 t vega20_get_pcie_usage +ffffffff81eb1000 T soc21_grbm_select +ffffffff81eb1080 t soc21_common_early_init +ffffffff81eb12d0 t soc21_common_late_init +ffffffff81eb1300 t soc21_common_sw_init +ffffffff81eb1330 t soc21_common_sw_fini +ffffffff81eb1360 t soc21_common_hw_init +ffffffff81eb1430 t soc21_common_hw_fini +ffffffff81eb1490 t soc21_common_suspend +ffffffff81eb14f0 t soc21_common_resume +ffffffff81eb15c0 t soc21_common_is_idle +ffffffff81eb15f0 t soc21_common_wait_for_idle +ffffffff81eb1620 t soc21_common_soft_reset +ffffffff81eb1650 t soc21_common_set_clockgating_state +ffffffff81eb1700 t soc21_common_set_powergating_state +ffffffff81eb1760 t soc21_common_get_clockgating_state +ffffffff81eb17b0 t soc21_pcie_rreg +ffffffff81eb1810 t soc21_pcie_wreg +ffffffff81eb1870 t soc21_pcie_rreg64 +ffffffff81eb18d0 t soc21_pcie_wreg64 +ffffffff81eb1930 t soc21_didt_rreg +ffffffff81eb19d0 t soc21_didt_wreg +ffffffff81eb1a50 t soc21_read_disabled_bios +ffffffff81eb1a80 t soc21_read_register +ffffffff81eb1b70 t soc21_vga_set_state +ffffffff81eb1ba0 t soc21_asic_reset +ffffffff81eb1c80 t soc21_asic_reset_method +ffffffff81eb1d40 t soc21_get_xclk +ffffffff81eb1d70 t soc21_set_uvd_clocks +ffffffff81eb1da0 t soc21_set_vce_clocks +ffffffff81eb1dd0 t soc21_get_config_memsize +ffffffff81eb1df0 t soc21_need_full_reset +ffffffff81eb1e50 t soc21_init_doorbell_index +ffffffff81eb1f70 t soc21_need_reset_on_init +ffffffff81eb2000 t soc21_get_pcie_replay_count +ffffffff81eb2030 t soc21_pre_asic_init +ffffffff81eb2060 t soc21_update_umd_stable_pstate +ffffffff81eb20d0 t soc21_query_video_codecs +ffffffff81eb3000 t tonga_ih_early_init +ffffffff81eb3050 t tonga_ih_sw_init +ffffffff81eb30d0 t tonga_ih_sw_fini +ffffffff81eb3110 t tonga_ih_hw_init +ffffffff81eb32f0 t tonga_ih_hw_fini +ffffffff81eb3390 t tonga_ih_suspend +ffffffff81eb3430 t tonga_ih_resume +ffffffff81eb3470 t tonga_ih_is_idle +ffffffff81eb34c0 t tonga_ih_wait_for_idle +ffffffff81eb3560 t tonga_ih_check_soft_reset +ffffffff81eb35c0 t tonga_ih_pre_soft_reset +ffffffff81eb3670 t tonga_ih_soft_reset +ffffffff81eb3740 t tonga_ih_post_soft_reset +ffffffff81eb3780 t tonga_ih_set_clockgating_state +ffffffff81eb37b0 t tonga_ih_set_powergating_state +ffffffff81eb37e0 t tonga_ih_get_wptr +ffffffff81eb38d0 t tonga_ih_decode_iv +ffffffff81eb3950 t tonga_ih_set_rptr +ffffffff81eb4000 t umc_v6_0_init_registers +ffffffff81eb5000 t umc_v6_1_query_ras_error_count +ffffffff81eb54e0 t umc_v6_1_query_ras_error_address +ffffffff81eb57c0 t umc_v6_1_err_cnt_init +ffffffff81eb6000 t umc_v6_7_query_ras_error_count +ffffffff81eb6400 t umc_v6_7_query_ras_error_address +ffffffff81eb6580 t umc_v6_7_query_ras_poison_mode +ffffffff81eb65e0 t umc_v6_7_convert_error_address +ffffffff81eb6900 t umc_v6_7_ecc_info_query_ras_error_count +ffffffff81eb6b20 t umc_v6_7_ecc_info_query_ras_error_address +ffffffff81eb7000 t umc_v8_10_query_ras_error_count +ffffffff81eb7280 t umc_v8_10_query_ras_error_address +ffffffff81eb7800 t umc_v8_10_err_cnt_init +ffffffff81eb7980 t umc_v8_10_query_ras_poison_mode +ffffffff81eb8000 t umc_v8_7_query_ras_error_count +ffffffff81eb8310 t umc_v8_7_query_ras_error_address +ffffffff81eb84d0 t umc_v8_7_err_cnt_init +ffffffff81eb8630 t umc_v8_7_ecc_info_query_ras_error_count +ffffffff81eb8750 t umc_v8_7_ecc_info_query_ras_error_address +ffffffff81eb9000 t uvd_v5_0_early_init +ffffffff81eb9050 t uvd_v5_0_sw_init +ffffffff81eb9140 t uvd_v5_0_sw_fini +ffffffff81eb9190 t uvd_v5_0_hw_init +ffffffff81eb9690 t uvd_v5_0_hw_fini +ffffffff81eb9710 t uvd_v5_0_suspend +ffffffff81eb9810 t uvd_v5_0_resume +ffffffff81eb9860 t uvd_v5_0_is_idle +ffffffff81eb98b0 t uvd_v5_0_wait_for_idle +ffffffff81eb9940 t uvd_v5_0_soft_reset +ffffffff81eb99e0 t uvd_v5_0_set_clockgating_state +ffffffff81eb9b80 t uvd_v5_0_set_powergating_state +ffffffff81eb9bc0 t uvd_v5_0_get_clockgating_state +ffffffff81eb9c40 t uvd_v5_0_ring_get_rptr +ffffffff81eb9c80 t uvd_v5_0_ring_get_wptr +ffffffff81eb9cc0 t uvd_v5_0_ring_set_wptr +ffffffff81eb9cf0 t uvd_v5_0_ring_emit_ib +ffffffff81eb9f60 t uvd_v5_0_ring_emit_fence +ffffffff81eba510 t uvd_v5_0_ring_test_ring +ffffffff81eba6b0 t uvd_v5_0_ring_insert_nop +ffffffff81eba810 t uvd_v5_0_set_interrupt_state +ffffffff81eba840 t uvd_v5_0_process_interrupt +ffffffff81eba8a0 t uvd_v5_0_stop +ffffffff81eba9b0 t uvd_v5_0_start +ffffffff81ebc000 t uvd_v6_0_early_init +ffffffff81ebc160 t uvd_v6_0_sw_init +ffffffff81ebc3c0 t uvd_v6_0_sw_fini +ffffffff81ebc480 t uvd_v6_0_hw_init +ffffffff81ebca30 t uvd_v6_0_hw_fini +ffffffff81ebcab0 t uvd_v6_0_suspend +ffffffff81ebcbb0 t uvd_v6_0_resume +ffffffff81ebcc00 t uvd_v6_0_is_idle +ffffffff81ebcc50 t uvd_v6_0_wait_for_idle +ffffffff81ebcce0 t uvd_v6_0_check_soft_reset +ffffffff81ebcd60 t uvd_v6_0_pre_soft_reset +ffffffff81ebcda0 t uvd_v6_0_soft_reset +ffffffff81ebce70 t uvd_v6_0_post_soft_reset +ffffffff81ebcf10 t uvd_v6_0_set_clockgating_state +ffffffff81ebd0a0 t uvd_v6_0_set_powergating_state +ffffffff81ebd110 t uvd_v6_0_get_clockgating_state +ffffffff81ebd1a0 t uvd_v6_0_ring_get_rptr +ffffffff81ebd1e0 t uvd_v6_0_ring_get_wptr +ffffffff81ebd220 t uvd_v6_0_ring_set_wptr +ffffffff81ebd250 t uvd_v6_0_ring_emit_ib +ffffffff81ebd5b0 t uvd_v6_0_ring_emit_fence +ffffffff81ebdb60 t uvd_v6_0_ring_emit_pipeline_sync +ffffffff81ebdf50 t uvd_v6_0_ring_emit_vm_flush +ffffffff81ebe2b0 t uvd_v6_0_ring_emit_hdp_flush +ffffffff81ebe2e0 t uvd_v6_0_ring_test_ring +ffffffff81ebe480 t uvd_v6_0_ring_insert_nop +ffffffff81ebe5e0 t uvd_v6_0_ring_emit_wreg +ffffffff81ebe860 t uvd_v6_0_enc_ring_get_rptr +ffffffff81ebe8c0 t uvd_v6_0_enc_ring_get_wptr +ffffffff81ebe920 t uvd_v6_0_enc_ring_set_wptr +ffffffff81ebe960 t uvd_v6_0_enc_ring_emit_ib +ffffffff81ebeba0 t uvd_v6_0_enc_ring_emit_fence +ffffffff81ebede0 t uvd_v6_0_enc_ring_emit_pipeline_sync +ffffffff81ebef90 t uvd_v6_0_enc_ring_emit_vm_flush +ffffffff81ebf1a0 t uvd_v6_0_enc_ring_test_ring +ffffffff81ebf2f0 t uvd_v6_0_enc_ring_test_ib +ffffffff81ebf7d0 t uvd_v6_0_enc_ring_insert_end +ffffffff81ebf860 t uvd_v6_0_set_interrupt_state +ffffffff81ebf890 t uvd_v6_0_process_interrupt +ffffffff81ebf990 t uvd_v6_0_stop +ffffffff81ebfaa0 t uvd_v6_0_start +ffffffff81ec1000 t uvd_v7_0_early_init +ffffffff81ec1280 t uvd_v7_0_sw_init +ffffffff81ec1680 t uvd_v7_0_sw_fini +ffffffff81ec1770 t uvd_v7_0_hw_init +ffffffff81ec4530 t uvd_v7_0_hw_fini +ffffffff81ec4840 t uvd_v7_0_suspend +ffffffff81ec48f0 t uvd_v7_0_resume +ffffffff81ec4940 t uvd_v7_0_set_clockgating_state +ffffffff81ec4970 t uvd_v7_0_ring_get_rptr +ffffffff81ec4a10 t uvd_v7_0_ring_get_wptr +ffffffff81ec4ab0 t uvd_v7_0_ring_set_wptr +ffffffff81ec4b30 t uvd_v7_0_ring_patch_cs_in_place +ffffffff81ec4ba0 t uvd_v7_0_ring_emit_ib +ffffffff81ec4f40 t uvd_v7_0_ring_emit_fence +ffffffff81ec5590 t uvd_v7_0_ring_emit_vm_flush +ffffffff81ec5600 t uvd_v7_0_ring_emit_hdp_flush +ffffffff81ec5630 t uvd_v7_0_ring_test_ring +ffffffff81ec58c0 t uvd_v7_0_ring_insert_nop +ffffffff81ec5a60 t uvd_v7_0_ring_emit_wreg +ffffffff81ec5d30 t uvd_v7_0_ring_emit_reg_wait +ffffffff81ec60e0 t uvd_v7_0_enc_ring_get_rptr +ffffffff81ec61d0 t uvd_v7_0_enc_ring_get_wptr +ffffffff81ec62d0 t uvd_v7_0_enc_ring_set_wptr +ffffffff81ec63d0 t uvd_v7_0_enc_ring_emit_ib +ffffffff81ec6610 t uvd_v7_0_enc_ring_emit_fence +ffffffff81ec6850 t uvd_v7_0_enc_ring_emit_vm_flush +ffffffff81ec68c0 t uvd_v7_0_enc_ring_test_ring +ffffffff81ec6a20 t uvd_v7_0_enc_ring_test_ib +ffffffff81ec6f00 t uvd_v7_0_enc_ring_insert_end +ffffffff81ec6f90 t uvd_v7_0_enc_ring_emit_wreg +ffffffff81ec70e0 t uvd_v7_0_enc_ring_emit_reg_wait +ffffffff81ec72a0 t uvd_v7_0_set_interrupt_state +ffffffff81ec72d0 t uvd_v7_0_process_interrupt +ffffffff81ec8000 t vce_v3_0_early_init +ffffffff81ec81a0 t vce_v3_0_sw_init +ffffffff81ec8300 t vce_v3_0_sw_fini +ffffffff81ec8350 t vce_v3_0_hw_init +ffffffff81ec8420 t vce_v3_0_hw_fini +ffffffff81ec8510 t vce_v3_0_suspend +ffffffff81ec85e0 t vce_v3_0_resume +ffffffff81ec86c0 t vce_v3_0_is_idle +ffffffff81ec8730 t vce_v3_0_wait_for_idle +ffffffff81ec87e0 t vce_v3_0_check_soft_reset +ffffffff81ec88e0 t vce_v3_0_pre_soft_reset +ffffffff81ec8980 t vce_v3_0_soft_reset +ffffffff81ec8a50 t vce_v3_0_post_soft_reset +ffffffff81ec8af0 t vce_v3_0_set_clockgating_state +ffffffff81ec8de0 t vce_v3_0_set_powergating_state +ffffffff81ec9600 t vce_v3_0_get_clockgating_state +ffffffff81ec96c0 t vce_v3_0_ring_get_rptr +ffffffff81ec9790 t vce_v3_0_ring_get_wptr +ffffffff81ec9860 t vce_v3_0_ring_set_wptr +ffffffff81ec9920 t vce_v3_0_ring_emit_ib +ffffffff81ec9b60 t vce_v3_0_emit_pipeline_sync +ffffffff81ec9d10 t vce_v3_0_emit_vm_flush +ffffffff81ec9f80 t vce_v3_0_set_interrupt_state +ffffffff81ec9ff0 t vce_v3_0_process_interrupt +ffffffff81eca0b0 t vce_v3_0_stop +ffffffff81ecb000 t vce_v4_0_early_init +ffffffff81ecb0b0 t vce_v4_0_sw_init +ffffffff81ecb340 t vce_v4_0_sw_fini +ffffffff81ecb3c0 t vce_v4_0_hw_init +ffffffff81ecbb80 t vce_v4_0_hw_fini +ffffffff81ecbcb0 t vce_v4_0_suspend +ffffffff81ecbdd0 t vce_v4_0_resume +ffffffff81ecbe80 t vce_v4_0_set_clockgating_state +ffffffff81ecbeb0 t vce_v4_0_set_powergating_state +ffffffff81ecbf90 t vce_v4_0_ring_get_rptr +ffffffff81ecc000 t vce_v4_0_ring_get_wptr +ffffffff81ecc090 t vce_v4_0_ring_set_wptr +ffffffff81ecc120 t vce_v4_0_ring_emit_ib +ffffffff81ecc360 t vce_v4_0_ring_emit_fence +ffffffff81ecc5a0 t vce_v4_0_emit_vm_flush +ffffffff81ecc610 t vce_v4_0_ring_insert_end +ffffffff81ecc6a0 t vce_v4_0_emit_wreg +ffffffff81ecc7f0 t vce_v4_0_emit_reg_wait +ffffffff81ecc9b0 t vce_v4_0_set_interrupt_state +ffffffff81ecca40 t vce_v4_0_process_interrupt +ffffffff81eccae0 t vce_v4_0_start +ffffffff81ece000 T vcn_dec_sw_ring_emit_fence +ffffffff81ece240 T vcn_dec_sw_ring_insert_end +ffffffff81ece2d0 T vcn_dec_sw_ring_emit_ib +ffffffff81ece510 T vcn_dec_sw_ring_emit_reg_wait +ffffffff81ece6d0 T vcn_dec_sw_ring_emit_vm_flush +ffffffff81ece740 T vcn_dec_sw_ring_emit_wreg +ffffffff81ecf000 T vcn_v1_0_set_pg_for_begin_use +ffffffff81ecf140 T vcn_v1_0_ring_end_use +ffffffff81ecf1b0 t vcn_v1_0_early_init +ffffffff81ecf280 t vcn_v1_0_sw_init +ffffffff81ecf500 t vcn_v1_0_sw_fini +ffffffff81ecf560 t vcn_v1_0_hw_init +ffffffff81ecf630 t vcn_v1_0_hw_fini +ffffffff81ecf730 t vcn_v1_0_suspend +ffffffff81ecf7a0 t vcn_v1_0_resume +ffffffff81ecf880 t vcn_v1_0_is_idle +ffffffff81ecf910 t vcn_v1_0_wait_for_idle +ffffffff81ecfa00 t vcn_v1_0_set_clockgating_state +ffffffff81ecfab0 t vcn_v1_0_set_powergating_state +ffffffff81ed0450 t vcn_v1_0_dec_ring_get_rptr +ffffffff81ed04e0 t vcn_v1_0_dec_ring_get_wptr +ffffffff81ed0570 t vcn_v1_0_dec_ring_set_wptr +ffffffff81ed0680 t vcn_v1_0_ring_patch_cs_in_place +ffffffff81ed0840 t vcn_v1_0_dec_ring_emit_ib +ffffffff81ed0bc0 t vcn_v1_0_dec_ring_emit_fence +ffffffff81ed11e0 t vcn_v1_0_dec_ring_emit_vm_flush +ffffffff81ed1250 t vcn_v1_0_dec_ring_insert_nop +ffffffff81ed13e0 t vcn_v1_0_dec_ring_insert_start +ffffffff81ed15b0 t vcn_v1_0_dec_ring_insert_end +ffffffff81ed16c0 t vcn_v1_0_ring_begin_use +ffffffff81ed1760 t vcn_v1_0_dec_ring_emit_wreg +ffffffff81ed1a10 t vcn_v1_0_dec_ring_emit_reg_wait +ffffffff81ed1d90 t vcn_v1_0_enc_ring_get_rptr +ffffffff81ed1e60 t vcn_v1_0_enc_ring_get_wptr +ffffffff81ed1f30 t vcn_v1_0_enc_ring_set_wptr +ffffffff81ed1ff0 t vcn_v1_0_enc_ring_emit_ib +ffffffff81ed2230 t vcn_v1_0_enc_ring_emit_fence +ffffffff81ed2470 t vcn_v1_0_enc_ring_emit_vm_flush +ffffffff81ed24e0 t vcn_v1_0_enc_ring_insert_end +ffffffff81ed2570 t vcn_v1_0_enc_ring_emit_wreg +ffffffff81ed26c0 t vcn_v1_0_enc_ring_emit_reg_wait +ffffffff81ed2880 t vcn_v1_0_set_interrupt_state +ffffffff81ed28b0 t vcn_v1_0_process_interrupt +ffffffff81ed2960 t vcn_v1_0_idle_work_handler +ffffffff81ed2ad0 t vcn_v1_0_pause_dpg_mode +ffffffff81ed3bc0 t vcn_v1_0_enable_clock_gating +ffffffff81ed3fd0 t vcn_v1_0_disable_clock_gating +ffffffff81ed4560 t vcn_1_0_enable_static_power_gating +ffffffff81ed4780 t vcn_v1_0_start_dpg_mode +ffffffff81ed83b0 t vcn_v1_0_start_spg_mode +ffffffff81eda5d0 t vcn_v1_0_clock_gating_dpg_mode +ffffffff81edb000 T vcn_v2_0_dec_ring_insert_start +ffffffff81edb1c0 T vcn_v2_0_dec_ring_insert_end +ffffffff81edb2c0 T vcn_v2_0_dec_ring_insert_nop +ffffffff81edb430 T vcn_v2_0_dec_ring_emit_fence +ffffffff81edb9f0 T vcn_v2_0_dec_ring_emit_ib +ffffffff81edbd50 T vcn_v2_0_dec_ring_emit_reg_wait +ffffffff81edc0a0 T vcn_v2_0_dec_ring_emit_vm_flush +ffffffff81edc110 T vcn_v2_0_dec_ring_emit_wreg +ffffffff81edc390 T vcn_v2_0_enc_ring_emit_fence +ffffffff81edc5d0 T vcn_v2_0_enc_ring_insert_end +ffffffff81edc660 T vcn_v2_0_enc_ring_emit_ib +ffffffff81edc8a0 T vcn_v2_0_enc_ring_emit_reg_wait +ffffffff81edca60 T vcn_v2_0_enc_ring_emit_vm_flush +ffffffff81edcad0 T vcn_v2_0_enc_ring_emit_wreg +ffffffff81edcc20 T vcn_v2_0_dec_ring_test_ring +ffffffff81edcec0 t vcn_v2_0_early_init +ffffffff81edcf90 t vcn_v2_0_sw_init +ffffffff81edd2a0 t vcn_v2_0_sw_fini +ffffffff81edd320 t vcn_v2_0_hw_init +ffffffff81eddc70 t vcn_v2_0_hw_fini +ffffffff81eddd70 t vcn_v2_0_suspend +ffffffff81eddda0 t vcn_v2_0_resume +ffffffff81edddf0 t vcn_v2_0_is_idle +ffffffff81edde80 t vcn_v2_0_wait_for_idle +ffffffff81eddf70 t vcn_v2_0_set_clockgating_state +ffffffff81ede000 t vcn_v2_0_set_powergating_state +ffffffff81ee02e0 t vcn_v2_0_dec_ring_get_rptr +ffffffff81ee0370 t vcn_v2_0_dec_ring_get_wptr +ffffffff81ee0410 t vcn_v2_0_dec_ring_set_wptr +ffffffff81ee0540 t vcn_v2_0_enc_ring_get_rptr +ffffffff81ee0610 t vcn_v2_0_enc_ring_get_wptr +ffffffff81ee0700 t vcn_v2_0_enc_ring_set_wptr +ffffffff81ee07f0 t vcn_v2_0_set_interrupt_state +ffffffff81ee0820 t vcn_v2_0_process_interrupt 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vcn_v2_5_enc_ring_get_wptr +ffffffff81ee94a0 t vcn_v2_5_enc_ring_set_wptr +ffffffff81ee95a0 t vcn_v2_5_set_interrupt_state +ffffffff81ee95d0 t vcn_v2_5_process_interrupt +ffffffff81ee96f0 t vcn_v2_5_pause_dpg_mode +ffffffff81eea050 t vcn_v2_5_enable_clock_gating +ffffffff81eea350 t vcn_v2_5_disable_clock_gating +ffffffff81eea870 t vcn_v2_5_start +ffffffff81eee7b0 t vcn_v2_5_clock_gating_dpg_mode +ffffffff81eef160 t vcn_v2_5_mc_resume_dpg_mode +ffffffff81ef3000 t vcn_v3_0_early_init +ffffffff81ef3200 t vcn_v3_0_sw_init +ffffffff81ef36a0 t vcn_v3_0_sw_fini +ffffffff81ef3780 t vcn_v3_0_hw_init +ffffffff81ef42b0 t vcn_v3_0_hw_fini +ffffffff81ef43b0 t vcn_v3_0_suspend +ffffffff81ef43e0 t vcn_v3_0_resume +ffffffff81ef4430 t vcn_v3_0_is_idle +ffffffff81ef4520 t vcn_v3_0_wait_for_idle +ffffffff81ef4650 t vcn_v3_0_set_clockgating_state +ffffffff81ef4760 t vcn_v3_0_set_powergating_state +ffffffff81ef7010 t vcn_v3_0_dec_ring_get_rptr +ffffffff81ef70b0 t vcn_v3_0_dec_ring_get_wptr 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vi_set_uvd_clock +ffffffff81f11000 T amdgpu_dm_find_first_crtc_matching_connector +ffffffff81f11070 T amdgpu_dm_update_connector_after_detect +ffffffff81f115b0 T amdgpu_dm_update_freesync_caps +ffffffff81f11ab0 T dm_atomic_get_state +ffffffff81f11b20 T amdgpu_dm_connector_atomic_set_property +ffffffff81f11be0 T amdgpu_dm_connector_atomic_get_property +ffffffff81f11c80 T amdgpu_dm_connector_funcs_reset +ffffffff81f11d70 T amdgpu_dm_connector_atomic_duplicate_state +ffffffff81f11e70 T create_validate_stream_for_sink +ffffffff81f12b80 T amdgpu_dm_connector_mode_valid +ffffffff81f12d30 T convert_dc_color_depth_into_bpc +ffffffff81f12d70 t dm_encoder_helper_disable +ffffffff81f12da0 t dm_encoder_helper_atomic_check +ffffffff81f12f80 T amdgpu_dm_connector_init_helper +ffffffff81f13240 T amdgpu_dm_get_encoder_crtc_mask +ffffffff81f13290 T dm_restore_drm_connector_state +ffffffff81f13400 T amdgpu_dm_trigger_timing_sync +ffffffff81f135d0 T dm_write_reg_func +ffffffff81f135f0 T dm_read_reg_func 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dm_helper_dmub_aux_transfer_sync +ffffffff81f244a0 T dm_helpers_dmub_set_config_sync +ffffffff81f244c0 T dm_set_dcn_clocks +ffffffff81f244f0 T dm_helpers_smu_timeout +ffffffff81f24520 T dm_helpers_init_panel_settings +ffffffff81f24590 T dm_helpers_override_panel_settings +ffffffff81f245d0 T dm_helpers_allocate_gpu_mem +ffffffff81f246d0 T dm_helpers_free_gpu_mem +ffffffff81f24760 T dm_helpers_dmub_outbox_interrupt_control +ffffffff81f247f0 T dm_helpers_mst_enable_stream_features +ffffffff81f24900 T dm_helpers_dp_handle_test_pattern_request +ffffffff81f24c30 T dm_set_phyd32clk +ffffffff81f24c60 T dm_helpers_enable_periodic_detection +ffffffff81f24c90 t execute_synaptics_rc_command +ffffffff81f25000 T amdgpu_dm_irq_register_interrupt +ffffffff81f251a0 t dm_irq_work_func +ffffffff81f251c0 T amdgpu_dm_irq_unregister_interrupt +ffffffff81f25340 T amdgpu_dm_irq_init +ffffffff81f25430 T amdgpu_dm_irq_fini +ffffffff81f255d0 T amdgpu_dm_irq_suspend +ffffffff81f256e0 T amdgpu_dm_irq_resume_early +ffffffff81f258a0 T amdgpu_dm_irq_resume_late +ffffffff81f25a60 T amdgpu_dm_set_irq_funcs +ffffffff81f25b20 T amdgpu_dm_outbox_init +ffffffff81f25b50 T amdgpu_dm_hpd_init +ffffffff81f25c00 T amdgpu_dm_hpd_fini +ffffffff81f25cb0 t amdgpu_dm_set_crtc_irq_state +ffffffff81f25d30 t amdgpu_dm_irq_handler +ffffffff81f25f30 t amdgpu_dm_set_vline0_irq_state +ffffffff81f25fb0 t amdgpu_dm_set_dmub_outbox_irq_state +ffffffff81f26000 t amdgpu_dm_set_vupdate_irq_state +ffffffff81f26080 t amdgpu_dm_set_dmub_trace_irq_state +ffffffff81f260d0 t amdgpu_dm_set_pflip_irq_state +ffffffff81f26150 t amdgpu_dm_set_hpd_irq_state +ffffffff81f27000 T needs_dsc_aux_workaround +ffffffff81f27050 T is_synaptics_cascaded_panamera +ffffffff81f270f0 T dm_dp_create_fake_mst_encoders +ffffffff81f271a0 T dm_handle_mst_sideband_msg_ready_event +ffffffff81f273e0 T amdgpu_dm_initialize_dp_connector +ffffffff81f274e0 t kasprintf +ffffffff81f275b0 t dm_dp_aux_transfer +ffffffff81f276f0 T dm_mst_get_pbn_divider +ffffffff81f27750 T compute_mst_dsc_configs_for_state +ffffffff81f279d0 t is_dsc_need_re_compute +ffffffff81f27ba0 t compute_mst_dsc_configs_for_link +ffffffff81f28140 T pre_validate_dsc +ffffffff81f286f0 T dm_dp_mst_is_port_support_mode +ffffffff81f28920 t amdgpu_dm_encoder_destroy +ffffffff81f28930 t dm_dp_add_mst_connector +ffffffff81f28af0 t dm_handle_mst_down_rep_msg_ready +ffffffff81f28b10 t amdgpu_dm_mst_connector_late_register +ffffffff81f28b60 t amdgpu_dm_mst_connector_early_unregister +ffffffff81f28c00 t dm_dp_mst_connector_destroy +ffffffff81f28c80 t dm_dp_mst_get_modes +ffffffff81f290b0 t dm_dp_mst_detect +ffffffff81f29240 t dm_mst_atomic_best_encoder +ffffffff81f292a0 t dm_dp_mst_atomic_check +ffffffff81f292d0 t set_dsc_configs_from_fairness_vars +ffffffff81f29510 t increase_dsc_bpp +ffffffff81f29a00 t try_disable_dsc +ffffffff81f2a000 T amd_get_format_info +ffffffff81f2a020 T fill_blending_from_plane_state +ffffffff81f2a0c0 T fill_plane_buffer_attributes +ffffffff81f2a630 T dm_plane_helper_check_state +ffffffff81f2a850 T fill_dc_scaling_info +ffffffff81f2aab0 T handle_cursor_update +ffffffff81f2ad40 T amdgpu_dm_plane_init +ffffffff81f2ba70 t dm_drm_plane_reset +ffffffff81f2bb00 t dm_drm_plane_duplicate_state +ffffffff81f2bb90 t dm_drm_plane_destroy_state +ffffffff81f2bbd0 t dm_plane_format_mod_supported +ffffffff81f2bd00 t dm_plane_helper_prepare_fb +ffffffff81f2bfb0 t dm_plane_helper_cleanup_fb +ffffffff81f2c050 t dm_plane_atomic_check +ffffffff81f2c120 t dm_plane_atomic_async_check +ffffffff81f2c160 t dm_plane_atomic_async_update +ffffffff81f2c210 t amdgpu_bo_reserve +ffffffff81f2c410 t amdgpu_bo_unreserve +ffffffff81f2d000 T dm_pp_apply_display_requirements +ffffffff81f2d1d0 T dm_pp_get_clock_levels_by_type +ffffffff81f2d510 T dm_pp_get_clock_levels_by_type_with_latency +ffffffff81f2d6d0 T dm_pp_get_clock_levels_by_type_with_voltage +ffffffff81f2d880 T dm_pp_notify_wm_clock_changes +ffffffff81f2d8d0 T dm_pp_apply_power_level_change_request +ffffffff81f2d900 T dm_pp_apply_clock_for_voltage_request +ffffffff81f2d9a0 T dm_pp_get_static_clocks +ffffffff81f2da60 T dm_pp_get_funcs +ffffffff81f2db70 t pp_rv_set_wm_ranges +ffffffff81f2dcf0 t pp_rv_set_pme_wa_enable +ffffffff81f2dd10 t pp_rv_set_active_display_count +ffffffff81f2dd30 t pp_rv_set_min_deep_sleep_dcfclk +ffffffff81f2dd50 t pp_rv_set_hard_min_dcefclk_by_freq +ffffffff81f2dd70 t pp_rv_set_hard_min_fclk_by_freq +ffffffff81f2dd90 t pp_nv_set_display_count +ffffffff81f2ddf0 t pp_nv_set_hard_min_dcefclk_by_freq +ffffffff81f2de60 t pp_nv_set_min_deep_sleep_dcfclk +ffffffff81f2dec0 t pp_nv_set_voltage_by_freq +ffffffff81f2df50 t pp_nv_set_wm_ranges +ffffffff81f2dfa0 t pp_nv_set_hard_min_uclk_by_freq +ffffffff81f2e010 t pp_nv_get_maximum_sustainable_clocks +ffffffff81f2e070 t pp_nv_get_uclk_dpm_states +ffffffff81f2e0d0 t pp_nv_set_pstate_handshake_support +ffffffff81f2e120 t pp_rn_set_wm_ranges +ffffffff81f2e170 t pp_rn_get_dpm_clock_table +ffffffff81f2f000 T amdgpu_dm_set_psr_caps +ffffffff81f2f150 T amdgpu_dm_link_setup_psr +ffffffff81f2f2e0 T amdgpu_dm_psr_enable +ffffffff81f2f3e0 T amdgpu_dm_psr_disable +ffffffff81f2f460 T amdgpu_dm_psr_disable_all +ffffffff81f30000 T dm_get_elapse_time_in_ns +ffffffff81f30030 T dm_perf_trace_timestamp +ffffffff81f31000 T dc_assert_fp_enabled +ffffffff81f31070 T dc_fpu_begin +ffffffff81f310c0 T dc_fpu_end +ffffffff81f32000 T dal_vector_construct +ffffffff81f320d0 T dal_vector_presized_create +ffffffff81f32340 T dal_vector_create +ffffffff81f32460 T dal_vector_destruct +ffffffff81f324b0 T dal_vector_destroy +ffffffff81f32530 T dal_vector_get_count +ffffffff81f32560 T dal_vector_at_index +ffffffff81f325a0 T dal_vector_remove_at_index +ffffffff81f32630 T dal_vector_set_at_index +ffffffff81f32690 T dal_vector_insert_at +ffffffff81f32790 T dal_vector_reserve +ffffffff81f32840 T dal_vector_append +ffffffff81f32940 T dal_vector_clone +ffffffff81f329f0 T dal_vector_capacity +ffffffff81f32a20 T dal_vector_clear +ffffffff81f33000 T fixed_point_to_int_frac +ffffffff81f331f0 T convert_float_matrix +ffffffff81f332b0 T reduce_fraction +ffffffff81f34000 T is_rgb_cspace +ffffffff81f34080 T is_lower_pipe_tree_visible +ffffffff81f340e0 T is_upper_pipe_tree_visible +ffffffff81f34140 T is_pipe_tree_visible +ffffffff81f341c0 T build_prescale_params +ffffffff81f35000 T dc_fixpt_from_fraction +ffffffff81f351c0 T dc_fixpt_mul +ffffffff81f35360 T dc_fixpt_sqr +ffffffff81f354d0 T dc_fixpt_recip +ffffffff81f35540 T dc_fixpt_sinc +ffffffff81f35730 T dc_fixpt_sin +ffffffff81f35760 T dc_fixpt_cos +ffffffff81f35850 T dc_fixpt_exp +ffffffff81f35b30 t fixed31_32_exp_from_taylor_series +ffffffff81f35f10 T dc_fixpt_log +ffffffff81f36120 T dc_fixpt_u4d19 +ffffffff81f36160 T dc_fixpt_u3d19 +ffffffff81f361a0 T dc_fixpt_u2d19 +ffffffff81f361e0 T dc_fixpt_u0d19 +ffffffff81f36210 T dc_fixpt_clamp_u0d14 +ffffffff81f36260 T dc_fixpt_clamp_u0d10 +ffffffff81f362b0 T dc_fixpt_s4d19 +ffffffff81f37000 T bios_parser_create +ffffffff81f38270 t bios_parser_get_connectors_number +ffffffff81f382d0 t bios_parser_get_connector_id +ffffffff81f38360 t bios_parser_get_src_obj +ffffffff81f38470 t bios_parser_get_i2c_info +ffffffff81f38690 t bios_parser_get_hpd_info +ffffffff81f38770 t bios_parser_get_device_tag +ffffffff81f38970 t bios_parser_get_spread_spectrum_info +ffffffff81f38b70 t bios_parser_get_ss_entry_number +ffffffff81f38db0 t bios_parser_get_embedded_panel_info +ffffffff81f39320 t bios_parser_get_gpio_pin_info +ffffffff81f39430 t bios_parser_get_encoder_cap_info +ffffffff81f39530 t bios_parser_set_scratch_critical_state +ffffffff81f39540 t bios_parser_is_device_id_supported +ffffffff81f39600 t bios_parser_encoder_control +ffffffff81f39640 t bios_parser_transmitter_control +ffffffff81f39680 t bios_parser_enable_crtc +ffffffff81f396d0 t bios_parser_adjust_pixel_clock +ffffffff81f39710 t bios_parser_set_pixel_clock +ffffffff81f39750 t bios_parser_set_dce_clock +ffffffff81f39790 t bios_parser_enable_spread_spectrum_on_ppll +ffffffff81f397e0 t bios_parser_program_crtc_timing +ffffffff81f39820 t bios_parser_program_display_engine_pll +ffffffff81f39860 t bios_parser_enable_disp_power_gating +ffffffff81f398a0 t bios_parser_destroy +ffffffff81f39960 t bios_get_board_layout_info +ffffffff81f39be0 t get_bios_object +ffffffff81f39db0 t get_ss_info_from_ss_info_table +ffffffff81f39f80 t get_ss_info_v3_1 +ffffffff81f3a0f0 t get_ss_entry_number_from_ss_info_tbl +ffffffff81f3b000 T firmware_parser_create +ffffffff81f3ce50 t bios_parser_get_connectors_number +ffffffff81f3cfc0 t bios_parser_get_connector_id +ffffffff81f3d020 t bios_parser_get_src_obj +ffffffff81f3d2c0 t bios_parser_get_i2c_info +ffffffff81f3d560 t bios_parser_get_hpd_info +ffffffff81f3d6d0 t bios_parser_get_device_tag +ffffffff81f3d9a0 t bios_parser_get_spread_spectrum_info +ffffffff81f3dd70 t bios_parser_get_ss_entry_number +ffffffff81f3dda0 t bios_parser_get_embedded_panel_info +ffffffff81f3dfa0 t bios_parser_get_gpio_pin_info +ffffffff81f3e0c0 t bios_parser_get_encoder_cap_info +ffffffff81f3e230 t bios_parser_is_accelerated_mode +ffffffff81f3e240 t bios_parser_set_scratch_critical_state +ffffffff81f3e250 t bios_parser_is_device_id_supported +ffffffff81f3e2c0 t bios_parser_encoder_control +ffffffff81f3e300 t bios_parser_transmitter_control +ffffffff81f3e340 t bios_parser_enable_crtc +ffffffff81f3e390 t bios_parser_set_pixel_clock +ffffffff81f3e3d0 t bios_parser_set_dce_clock +ffffffff81f3e410 t bios_parser_program_crtc_timing +ffffffff81f3e450 t bios_parser_enable_disp_power_gating +ffffffff81f3e490 t firmware_parser_destroy +ffffffff81f3e550 t bios_get_board_layout_info +ffffffff81f3e9f0 t bios_parser_pack_data_tables +ffffffff81f3ea20 t bios_get_atom_dc_golden_table +ffffffff81f3eb60 t bios_parser_enable_lvtma_control +ffffffff81f3ebb0 t bios_parser_get_soc_bb_info +ffffffff81f3ecc0 t bios_parser_get_disp_connector_caps_info +ffffffff81f3ee20 t bios_parser_get_lttpr_caps +ffffffff81f3ef70 t bios_parser_get_lttpr_interop +ffffffff81f3f0b0 t bios_parser_get_connector_speed_cap_info +ffffffff81f3f200 t get_bios_object +ffffffff81f3f360 t get_bios_object_from_path_v3 +ffffffff81f40000 T object_id_from_bios_object_id +ffffffff81f41000 T bios_get_image +ffffffff81f41050 T bios_is_accelerated_mode +ffffffff81f410b0 T bios_set_scratch_acc_mode_change +ffffffff81f410f0 T bios_set_scratch_critical_state +ffffffff81f41130 T bios_get_vga_enabled_displays +ffffffff81f42000 T dal_bios_parser_create +ffffffff81f42070 T dal_bios_parser_destroy +ffffffff81f43000 T dal_bios_parser_init_cmd_tbl +ffffffff81f43810 t encoder_control_digx_v3 +ffffffff81f43910 t encoder_control_digx_v4 +ffffffff81f43a10 t encoder_control_digx_v5 +ffffffff81f43b60 t encoder_control_dig1_v1 +ffffffff81f43be0 t encoder_control_dig2_v1 +ffffffff81f43c60 t encoder_control_dig_v1 +ffffffff81f43cc0 t transmitter_control_v2 +ffffffff81f43e60 t transmitter_control_v3 +ffffffff81f44010 t transmitter_control_v4 +ffffffff81f441c0 t transmitter_control_v1_5 +ffffffff81f44330 t transmitter_control_v1_6 +ffffffff81f44490 t set_pixel_clock_v3 +ffffffff81f44600 t set_pixel_clock_v5 +ffffffff81f447a0 t set_pixel_clock_v6 +ffffffff81f44940 t set_pixel_clock_v7 +ffffffff81f44b10 t enable_spread_spectrum_on_ppll_v1 +ffffffff81f44c30 t enable_spread_spectrum_on_ppll_v2 +ffffffff81f44d60 t enable_spread_spectrum_on_ppll_v3 +ffffffff81f44e70 t adjust_display_pll_v2 +ffffffff81f44fc0 t adjust_display_pll_v3 +ffffffff81f45130 t dac1_encoder_control_v1 +ffffffff81f451b0 t dac2_encoder_control_v1 +ffffffff81f45230 t dac1_output_control_v1 +ffffffff81f45290 t dac2_output_control_v1 +ffffffff81f452f0 t set_crtc_using_dtd_timing_v3 +ffffffff81f45440 t set_crtc_timing_v1 +ffffffff81f455c0 t enable_crtc_v1 +ffffffff81f45660 t enable_crtc_mem_req_v1 +ffffffff81f45700 t program_clock_v5 +ffffffff81f45810 t program_clock_v6 +ffffffff81f45930 t external_encoder_control_v3 +ffffffff81f45ae0 t enable_disp_power_gating_v2_1 +ffffffff81f45bb0 t set_dce_clock_v2_1 +ffffffff81f46000 T dal_firmware_parser_init_cmd_tbl +ffffffff81f463d0 t encoder_control_digx_v1_5 +ffffffff81f465a0 t encoder_control_fallback +ffffffff81f46600 t transmitter_control_v1_6 +ffffffff81f467b0 t transmitter_control_v1_7 +ffffffff81f469b0 t transmitter_control_fallback +ffffffff81f46a10 t set_pixel_clock_v7 +ffffffff81f46c70 t set_pixel_clock_fallback +ffffffff81f46cd0 t set_crtc_using_dtd_timing_v3 +ffffffff81f46e20 t enable_crtc_v1 +ffffffff81f46ec0 t external_encoder_control_v3 +ffffffff81f46ef0 t enable_disp_power_gating_v2_1 +ffffffff81f47050 t enable_disp_power_gating_fallback +ffffffff81f470b0 t set_dce_clock_v2_1 +ffffffff81f471e0 t get_smu_clock_info_v3_1 +ffffffff81f47250 t enable_lvtma_control +ffffffff81f48000 T dal_bios_parser_init_cmd_tbl_helper +ffffffff81f480a0 T dal_cmd_table_helper_controller_id_to_atom +ffffffff81f481c0 T dal_cmd_table_helper_transmitter_bp_to_atom +ffffffff81f48240 T dal_cmd_table_helper_encoder_mode_bp_to_atom +ffffffff81f482d0 T dal_cmd_table_helper_assign_control_parameter +ffffffff81f48390 T dal_cmd_table_helper_clock_source_id_to_ref_clk_src +ffffffff81f48470 T dal_cmd_table_helper_encoder_id_to_atom +ffffffff81f49000 T dal_bios_parser_init_cmd_tbl_helper2 +ffffffff81f490b0 T dal_cmd_table_helper_controller_id_to_atom2 +ffffffff81f491c0 T dal_cmd_table_helper_transmitter_bp_to_atom2 +ffffffff81f49240 T dal_cmd_table_helper_encoder_mode_bp_to_atom2 +ffffffff81f492d0 T dal_cmd_table_helper_clock_source_id_to_ref_clk_src2 +ffffffff81f493b0 T dal_cmd_table_helper_encoder_id_to_atom2 +ffffffff81f4a000 T dal_cmd_tbl_helper_dce110_get_table ffffffff81f4a030 t encoder_action_to_atom ffffffff81f4a0b0 t engine_bp_to_atom ffffffff81f4a100 t clock_source_id_to_atom -ffffffff81f4a1d0 t clock_source_id_to_atom_phy_clk_src_id -ffffffff81f4a220 t signal_type_to_atom_dig_mode -ffffffff81f4a280 t hpd_sel_to_atom -ffffffff81f4a2c0 t dig_encoder_sel_to_atom -ffffffff81f4a2f0 t phy_id_to_atom -ffffffff81f4a330 t disp_power_gating_action_to_atom -ffffffff81f4a3a0 t dc_clock_type_to_atom -ffffffff81f4a420 t transmitter_color_depth_to_atom -ffffffff81f4b000 T dal_cmd_tbl_helper_dce112_get_table +ffffffff81f4a1a0 t clock_source_id_to_atom_phy_clk_src_id +ffffffff81f4a1f0 t signal_type_to_atom_dig_mode +ffffffff81f4a250 t hpd_sel_to_atom +ffffffff81f4a290 t dig_encoder_sel_to_atom +ffffffff81f4a2c0 t phy_id_to_atom +ffffffff81f4a300 t disp_power_gating_action_to_atom +ffffffff81f4b000 T dal_cmd_tbl_helper_dce112_get_table2 ffffffff81f4b030 t encoder_action_to_atom ffffffff81f4b0b0 t engine_bp_to_atom ffffffff81f4b100 t clock_source_id_to_atom @@ -30162,7 +30150,7 @@ ffffffff81f4b2f0 t phy_id_to_atom ffffffff81f4b330 t disp_power_gating_action_to_atom ffffffff81f4b3a0 t dc_clock_type_to_atom ffffffff81f4b420 t transmitter_color_depth_to_atom -ffffffff81f4c000 T dal_cmd_tbl_helper_dce80_get_table +ffffffff81f4c000 T dal_cmd_tbl_helper_dce112_get_table ffffffff81f4c030 t encoder_action_to_atom ffffffff81f4c0b0 t engine_bp_to_atom ffffffff81f4c100 t clock_source_id_to_atom @@ -30170,25666 +30158,25678 @@ ffffffff81f4c1d0 t clock_source_id_to_atom_phy_clk_src ffffffff81f4c220 t signal_type_to_atom_dig_mode ffffffff81f4c280 t hpd_sel_to_atom ffffffff81f4c2c0 t dig_encoder_sel_to_atom -ffffffff81f4c310 t phy_id_to_atom -ffffffff81f4c350 t disp_power_gating_action_to_atom -ffffffff81f4d000 T clk_mgr_helper_get_active_display_cnt -ffffffff81f4d0e0 T clk_mgr_helper_get_active_plane_cnt -ffffffff81f4d190 T clk_mgr_exit_optimized_pwr_state -ffffffff81f4d290 T clk_mgr_optimize_pwr_state -ffffffff81f4d390 T dc_clk_mgr_create -ffffffff81f4da50 T dc_destroy_clk_mgr -ffffffff81f4e000 T dentist_get_divider_from_did -ffffffff81f4e070 T dce_adjust_dp_ref_freq_for_ss -ffffffff81f4e170 T dce_get_dp_ref_freq_khz -ffffffff81f4e2a0 T dce12_get_dp_ref_freq_khz -ffffffff81f4e2c0 T dce_get_max_pixel_clock_for_all_paths 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dal_gpio_service_unlock -ffffffff822107a0 T dal_gpio_service_open -ffffffff822109e0 T dal_gpio_service_close -ffffffff82210a80 T dal_irq_get_source -ffffffff82210af0 T dal_irq_get_rx_source -ffffffff82210b40 T dal_irq_setup_hpd_filter -ffffffff82210ba0 T dal_gpio_destroy_irq -ffffffff82210c30 T dal_gpio_create_ddc -ffffffff82210da0 T dal_gpio_destroy_ddc -ffffffff82210e70 T dal_ddc_close -ffffffff82210ec0 T dal_ddc_open -ffffffff82211020 T dal_ddc_change_mode -ffffffff822110c0 T dal_ddc_get_line -ffffffff822110e0 T dal_ddc_set_config -ffffffff82212000 T dal_hw_ddc_init -ffffffff82212100 T dal_hw_ddc_get_pin -ffffffff82212110 t dal_hw_ddc_destroy -ffffffff82212170 t set_config -ffffffff82213000 T dal_hw_factory_init -ffffffff82214000 T dal_hw_generic_init -ffffffff82214100 T dal_hw_generic_get_pin -ffffffff82214110 t dal_hw_generic_destroy -ffffffff82214170 t set_config -ffffffff82215000 T dal_hw_gpio_open -ffffffff822150b0 T dal_hw_gpio_config_mode -ffffffff822151a0 T dal_hw_gpio_get_value -ffffffff82215200 T dal_hw_gpio_set_value -ffffffff82215290 T dal_hw_gpio_change_mode -ffffffff822152a0 T dal_hw_gpio_close -ffffffff82215350 T dal_hw_gpio_construct -ffffffff822153b0 T dal_hw_gpio_destruct -ffffffff82216000 T dal_hw_hpd_init -ffffffff82216100 T dal_hw_hpd_get_pin -ffffffff82216110 t dal_hw_hpd_destroy -ffffffff82216170 t get_value -ffffffff82216210 t set_config -ffffffff82217000 T dal_hw_translate_init -ffffffff82218000 T dc_process_hdcp_msg -ffffffff82218180 t hdmi_14_process_transaction -ffffffff822182d0 t dp_11_process_transaction -ffffffff82219000 T dal_irq_service_dummy_set -ffffffff82219050 T dal_irq_service_dummy_ack -ffffffff822190a0 T dce110_vblank_set -ffffffff82219170 T to_dal_irq_source_dce110 -ffffffff822192f0 T dal_irq_service_dce110_create -ffffffff82219370 t hpd_ack -ffffffff8221a000 T dal_irq_service_dce120_create -ffffffff8221a080 t hpd_ack -ffffffff8221b000 T dal_irq_service_dce80_create +ffffffff81f4c2f0 t phy_id_to_atom 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rv1_update_clocks +ffffffff81f535a0 t rv1_init_clocks +ffffffff81f53630 t rv1_enable_pme_wa +ffffffff81f54000 T rv1_vbios_smu_set_dispclk +ffffffff81f540f0 t rv1_vbios_smu_send_msg_with_param +ffffffff81f54200 T rv1_vbios_smu_set_dprefclk +ffffffff81f55000 T rv2_clk_mgr_construct +ffffffff81f56000 T dentist_get_did_from_divider +ffffffff81f56080 T dcn20_update_clocks_update_dpp_dto +ffffffff81f56150 T dcn20_update_clocks_update_dentist +ffffffff81f56630 T dcn2_update_clocks +ffffffff81f56bb0 T dcn2_read_clocks_from_hw_dentist +ffffffff81f56c80 T dcn2_update_clocks_fpga +ffffffff81f56db0 T dcn2_init_clocks +ffffffff81f56e50 T dcn2_get_clock +ffffffff81f56ec0 T dcn20_clk_mgr_construct +ffffffff81f57010 t dcn2_enable_pme_wa +ffffffff81f57060 t dcn2_are_clock_states_equal +ffffffff81f570d0 t dcn2_notify_link_rate_change +ffffffff81f58000 t dcn201_update_clocks +ffffffff81f58220 t dcn201_init_clocks +ffffffff81f582c0 T dcn201_clk_mgr_construct +ffffffff81f59000 T rn_clk_mgr_construct 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+ffffffff81f5c3c0 T dcn3_clk_mgr_construct +ffffffff81f5c520 T dcn3_clk_mgr_destroy +ffffffff81f5c590 t dcn3_update_clocks +ffffffff81f5c9e0 t dcn3_enable_pme_wa +ffffffff81f5ca20 t dcn3_are_clock_states_equal +ffffffff81f5ca80 t dcn3_notify_wm_ranges +ffffffff81f5cd10 t dcn30_notify_link_rate_change +ffffffff81f5ce30 t dcn3_set_hard_min_memclk +ffffffff81f5ced0 t dcn3_set_hard_max_memclk +ffffffff81f5cf30 t dcn3_set_max_memclk +ffffffff81f5cf70 t dcn3_set_min_memclk +ffffffff81f5cfb0 t dcn3_get_memclk_states_from_smu +ffffffff81f5d0f0 t dcn3_is_smu_present +ffffffff81f5e000 T dcn30_smu_test_message +ffffffff81f5e070 t dcn30_smu_send_msg_with_param +ffffffff81f5e1d0 T dcn30_smu_get_smu_version +ffffffff81f5e1f0 T dcn30_smu_check_driver_if_version +ffffffff81f5e240 T dcn30_smu_check_msg_header_version +ffffffff81f5e290 T dcn30_smu_set_dram_addr_high +ffffffff81f5e2b0 T dcn30_smu_set_dram_addr_low +ffffffff81f5e2d0 T dcn30_smu_transfer_wm_table_smu_2_dram +ffffffff81f5e2f0 T dcn30_smu_transfer_wm_table_dram_2_smu +ffffffff81f5e310 T dcn30_smu_set_hard_min_by_freq +ffffffff81f5e360 T dcn30_smu_set_hard_max_by_freq +ffffffff81f5e3b0 T dcn30_smu_get_dpm_freq_by_index +ffffffff81f5e400 T dcn30_smu_get_dc_mode_max_dpm_freq +ffffffff81f5e450 T dcn30_smu_set_min_deep_sleep_dcef_clk +ffffffff81f5e470 T dcn30_smu_set_num_of_displays +ffffffff81f5e490 T dcn30_smu_set_display_refresh_from_mall +ffffffff81f5e4c0 T dcn30_smu_set_external_client_df_cstate_allow +ffffffff81f5e4e0 T dcn30_smu_set_pme_workaround +ffffffff81f5f000 T dcn301_smu_get_smu_version +ffffffff81f5f070 t dcn301_smu_send_msg_with_param +ffffffff81f5f1f0 T dcn301_smu_set_dispclk +ffffffff81f5f290 T dcn301_smu_set_dprefclk +ffffffff81f5f340 T dcn301_smu_set_hard_min_dcfclk +ffffffff81f5f3e0 T dcn301_smu_set_min_deep_sleep_dcfclk +ffffffff81f5f480 T dcn301_smu_set_dppclk +ffffffff81f5f520 T dcn301_smu_set_display_idle_optimization +ffffffff81f5f570 T dcn301_smu_enable_phy_refclk_pwrdwn +ffffffff81f5f5c0 T dcn301_smu_enable_pme_wa +ffffffff81f5f5e0 T dcn301_smu_set_dram_addr_high +ffffffff81f5f630 T dcn301_smu_set_dram_addr_low +ffffffff81f5f680 T dcn301_smu_transfer_dpm_table_smu_2_dram +ffffffff81f5f6a0 T dcn301_smu_transfer_wm_table_dram_2_smu +ffffffff81f60000 T vg_clk_mgr_construct +ffffffff81f60820 T vg_clk_mgr_destroy +ffffffff81f60870 t vg_update_clocks +ffffffff81f60be0 t vg_init_clocks +ffffffff81f60c80 t vg_enable_pme_wa +ffffffff81f60c90 t vg_are_clock_states_equal +ffffffff81f60ce0 t vg_notify_wm_ranges +ffffffff81f62000 T dcn31_update_clocks +ffffffff81f62650 T dcn31_init_clocks +ffffffff81f62700 T dcn31_are_clock_states_equal +ffffffff81f62760 T dcn31_get_dtb_ref_freq_khz +ffffffff81f62790 T dcn31_clk_mgr_construct +ffffffff81f62e80 T dcn31_clk_mgr_destroy +ffffffff81f62ed0 t dcn31_set_low_power_state +ffffffff81f630e0 t dcn31_enable_pme_wa +ffffffff81f630f0 t dcn31_notify_wm_ranges +ffffffff81f63470 t find_clk_for_voltage +ffffffff81f64000 T dcn31_smu_get_smu_version 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dcn314_enable_pme_wa +ffffffff81f66580 t dcn314_notify_wm_ranges +ffffffff81f67000 T dcn314_smu_get_smu_version +ffffffff81f67020 t dcn314_smu_send_msg_with_param +ffffffff81f67240 T dcn314_smu_set_dispclk +ffffffff81f672b0 T dcn314_smu_set_dprefclk +ffffffff81f67320 T dcn314_smu_set_hard_min_dcfclk +ffffffff81f673a0 T dcn314_smu_set_min_deep_sleep_dcfclk +ffffffff81f67420 T dcn314_smu_set_dppclk +ffffffff81f67490 T dcn314_smu_set_display_idle_optimization +ffffffff81f674e0 T dcn314_smu_enable_phy_refclk_pwrdwn +ffffffff81f67530 T dcn314_smu_enable_pme_wa +ffffffff81f67570 T dcn314_smu_set_dram_addr_high +ffffffff81f675b0 T dcn314_smu_set_dram_addr_low +ffffffff81f675f0 T dcn314_smu_transfer_dpm_table_smu_2_dram +ffffffff81f67630 T dcn314_smu_transfer_wm_table_dram_2_smu +ffffffff81f67670 T dcn314_smu_set_zstate_support +ffffffff81f676c0 T dcn314_smu_set_dtbclk +ffffffff81f68000 T dcn315_clk_mgr_construct +ffffffff81f68980 T dcn315_clk_mgr_destroy +ffffffff81f689d0 t dcn315_update_clocks +ffffffff81f68fe0 t dcn315_enable_pme_wa +ffffffff81f68ff0 t dcn315_notify_wm_ranges +ffffffff81f6a000 T dcn315_smu_get_smu_version +ffffffff81f6a020 t dcn315_smu_send_msg_with_param +ffffffff81f6a310 T dcn315_smu_set_dispclk +ffffffff81f6a380 T dcn315_smu_set_hard_min_dcfclk +ffffffff81f6a400 T dcn315_smu_set_min_deep_sleep_dcfclk +ffffffff81f6a480 T dcn315_smu_set_dppclk +ffffffff81f6a4f0 T dcn315_smu_set_display_idle_optimization +ffffffff81f6a540 T dcn315_smu_enable_phy_refclk_pwrdwn +ffffffff81f6a590 T dcn315_smu_enable_pme_wa +ffffffff81f6a5d0 T dcn315_smu_set_dram_addr_high +ffffffff81f6a610 T dcn315_smu_set_dram_addr_low +ffffffff81f6a650 T dcn315_smu_transfer_dpm_table_smu_2_dram +ffffffff81f6a690 T dcn315_smu_transfer_wm_table_dram_2_smu +ffffffff81f6a6d0 T dcn315_smu_get_dpref_clk +ffffffff81f6a730 T dcn315_smu_get_dtbclk +ffffffff81f6a790 T dcn315_smu_set_dtbclk +ffffffff81f6b000 T dcn316_clk_mgr_construct +ffffffff81f6b710 T dcn316_clk_mgr_destroy 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dcn32_init_clocks +ffffffff81f6e4c0 T dcn32_clk_mgr_construct +ffffffff81f6e760 t dcn32_dump_clk_registers +ffffffff81f6e980 T dcn32_clk_mgr_destroy +ffffffff81f6e9f0 t dcn32_update_clocks +ffffffff81f6f110 t dcn32_enable_pme_wa +ffffffff81f6f150 t dcn32_are_clock_states_equal +ffffffff81f6f1c0 t dcn32_notify_wm_ranges +ffffffff81f6f340 t dcn32_set_hard_min_memclk +ffffffff81f6f3e0 t dcn32_set_hard_max_memclk +ffffffff81f6f440 t dcn32_get_memclk_states_from_smu +ffffffff81f6f630 t dcn32_is_smu_present +ffffffff81f70000 T dcn32_smu_send_fclk_pstate_message +ffffffff81f70020 t dcn32_smu_send_msg_with_param +ffffffff81f70160 T dcn32_smu_send_cab_for_uclk_message +ffffffff81f70190 T dcn32_smu_transfer_wm_table_dram_2_smu +ffffffff81f701b0 T dcn32_smu_set_pme_workaround +ffffffff81f701d0 T dcn32_smu_set_hard_min_by_freq +ffffffff81f71000 T dc_stream_adjust_vmin_vmax +ffffffff81f71170 T dc_stream_get_last_used_drr_vtotal +ffffffff81f712d0 T dc_stream_get_crtc_position +ffffffff81f71500 T dc_stream_configure_crc +ffffffff81f71760 T dc_stream_get_crc +ffffffff81f71840 T dc_stream_set_dyn_expansion +ffffffff81f71ab0 T dc_stream_set_dither_option +ffffffff81f71c50 T dc_stream_set_gamut_remap +ffffffff81f71dd0 T dc_stream_program_csc_matrix +ffffffff81f71ff0 T dc_stream_set_static_screen_params +ffffffff81f72170 T dc_create +ffffffff81f726e0 t dc_construct_ctx +ffffffff81f72840 t dc_destruct +ffffffff81f72b00 T dc_hardware_init +ffffffff81f72c10 T dc_init_callbacks +ffffffff81f72c40 T dc_deinit_callbacks +ffffffff81f72c70 T dc_destroy +ffffffff81f72cc0 T dc_validate_boot_timing +ffffffff81f73040 T dc_enable_stereo +ffffffff81f73140 T dc_trigger_sync +ffffffff81f73770 T dc_z10_restore +ffffffff81f737b0 T dc_z10_save_init +ffffffff81f737f0 T dc_commit_streams +ffffffff81f73c90 t commit_minimal_transition_state +ffffffff81f740b0 T dc_create_state +ffffffff81f74140 t dc_commit_state_no_check +ffffffff81f75640 T dc_release_state +ffffffff81f756a0 T dc_commit_state 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dce110_clk_src_construct +ffffffff81fb6270 t calc_pll_max_vco_construct +ffffffff81fb6410 T dce112_clk_src_construct +ffffffff81fb64a0 T dcn20_clk_src_construct +ffffffff81fb6550 T dcn3_clk_src_construct +ffffffff81fb6600 T dcn31_clk_src_construct +ffffffff81fb66b0 T dcn301_clk_src_construct +ffffffff81fb6760 t dce110_clock_source_power_down +ffffffff81fb67f0 t dce110_program_pix_clk +ffffffff81fb6e80 t dce110_get_pix_clk_dividers +ffffffff81fb7500 t get_pixel_clk_frequency_100hz +ffffffff81fb7610 t get_ss_info_from_atombios +ffffffff81fb78e0 t dce112_program_pix_clk +ffffffff81fb7b60 t dce112_get_pix_clk_dividers +ffffffff81fb7c70 t dcn20_program_pix_clk +ffffffff81fb7d00 t dcn20_override_dp_pix_clk +ffffffff81fb7df0 t dcn3_program_pix_clk +ffffffff81fb7f70 t dcn3_get_pix_clk_dividers +ffffffff81fb8040 t dcn31_program_pix_clk +ffffffff81fb9000 T dce_dmcu_create +ffffffff81fb90c0 T dcn10_dmcu_create +ffffffff81fb9180 T dcn20_dmcu_create +ffffffff81fb9240 T dcn21_dmcu_create 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dce_enable_fe_clock +ffffffff81fbc040 T dce_pipe_control_lock +ffffffff81fbc240 T dce_set_blender_mode +ffffffff81fbc350 T dce_clock_gating_power_up +ffffffff81fbc3f0 T dce_crtc_switch_to_clk_src +ffffffff81fbc5b0 T dce_use_lut +ffffffff81fbd000 T dce_i2c_oem_device_present +ffffffff81fbd080 T dce_i2c_submit_command +ffffffff81fbe000 T acquire_i2c_hw_engine +ffffffff81fbe3a0 T dce_i2c_submit_command_hw +ffffffff81fbece0 t set_speed +ffffffff81fbee30 T dce_i2c_hw_construct +ffffffff81fbeea0 T dce100_i2c_hw_construct +ffffffff81fbef10 T dce112_i2c_hw_construct +ffffffff81fbef80 T dcn1_i2c_hw_construct +ffffffff81fbeff0 T dcn2_i2c_hw_construct +ffffffff81fbf080 t is_hw_busy +ffffffff81fc0000 T dce_i2c_sw_construct +ffffffff81fc0030 T dce_i2c_engine_acquire_sw +ffffffff81fc00d0 T dce_i2c_submit_command_sw +ffffffff81fc08a0 t write_byte_sw +ffffffff81fc1000 T dce_ipp_construct +ffffffff81fc1050 T dce_ipp_destroy +ffffffff81fc10a0 t dce_ipp_cursor_set_position +ffffffff81fc11d0 t dce_ipp_cursor_set_attributes +ffffffff81fc1460 t dce_ipp_program_prescale +ffffffff81fc1620 t dce_ipp_program_input_lut +ffffffff81fc1a90 t dce_ipp_set_degamma +ffffffff81fc2000 T dce110_get_dig_frontend +ffffffff81fc20c0 T dce110_link_encoder_set_dp_phy_pattern_training_pattern +ffffffff81fc2160 T dce110_psr_program_dp_dphy_fast_training +ffffffff81fc21d0 T dce110_psr_program_secondary_packet +ffffffff81fc2240 T dce110_is_dig_enabled +ffffffff81fc22a0 T dce110_link_encoder_validate_dvi_output +ffffffff81fc2350 T dce110_link_encoder_validate_dp_output +ffffffff81fc2380 T dce110_link_encoder_construct +ffffffff81fc2550 T dce110_link_encoder_validate_output_with_stream +ffffffff81fc2700 T dce110_link_encoder_hw_init +ffffffff81fc2920 T dce110_link_encoder_destroy +ffffffff81fc2970 T dce110_link_encoder_setup +ffffffff81fc2aa0 T dce110_link_encoder_enable_tmds_output +ffffffff81fc2b90 T dce110_link_encoder_enable_lvds_output +ffffffff81fc2c80 T dce110_link_encoder_enable_dp_output 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dce_mi_program_surface_config +ffffffff81fc64f0 t dce_mi_is_flip_pending +ffffffff81fc6580 t program_nbp_watermark +ffffffff81fc6780 t dce112_mi_program_display_marks +ffffffff81fc6c90 t dce120_mi_program_display_marks +ffffffff81fc7150 t dce120_program_stutter_watermark +ffffffff81fc8000 T dce110_opp_set_clamping +ffffffff81fc82b0 T dce110_opp_program_bit_depth_reduction +ffffffff81fc8a80 T dce110_opp_program_clamping_and_pixel_encoding +ffffffff81fc8c20 T dce110_opp_set_dyn_expansion +ffffffff81fc8d70 T dce110_opp_program_fmt +ffffffff81fc8ef0 T dce110_opp_construct +ffffffff81fc8f50 T dce110_opp_destroy +ffffffff81fc9000 T dce_panel_cntl_construct +ffffffff81fc9060 t dce_panel_cntl_destroy +ffffffff81fc90b0 t dce_panel_cntl_hw_init +ffffffff81fc92f0 t dce_is_panel_backlight_on +ffffffff81fc93a0 t dce_is_panel_powered_on +ffffffff81fc9450 t dce_store_backlight_level +ffffffff81fc94f0 t dce_driver_set_backlight +ffffffff81fc9670 t dce_get_16_bit_backlight_from_pwm +ffffffff81fca000 T get_filter_3tap_16p +ffffffff81fca090 T get_filter_3tap_64p +ffffffff81fca120 T get_filter_4tap_16p +ffffffff81fca1b0 T get_filter_4tap_64p +ffffffff81fca240 T get_filter_5tap_64p +ffffffff81fca2d0 T get_filter_6tap_64p +ffffffff81fca360 T get_filter_7tap_64p +ffffffff81fca3f0 T get_filter_8tap_64p +ffffffff81fca480 T get_filter_2tap_16p +ffffffff81fca4b0 T get_filter_2tap_64p +ffffffff81fcb000 T dce110_se_audio_mute_control +ffffffff81fcb050 T dce110_se_dp_audio_setup +ffffffff81fcb060 t dce110_se_audio_setup +ffffffff81fcb1c0 T dce110_se_dp_audio_enable +ffffffff81fcb400 T dce110_se_dp_audio_disable +ffffffff81fcb560 T dce110_se_hdmi_audio_setup +ffffffff81fcba60 T dce110_se_hdmi_audio_disable +ffffffff81fcbac0 T dce110_stream_encoder_construct +ffffffff81fcbb10 t dce110_stream_encoder_dp_set_stream_attribute +ffffffff81fcc160 t dce110_stream_encoder_hdmi_set_stream_attribute +ffffffff81fcc690 t dce110_stream_encoder_dvi_set_stream_attribute +ffffffff81fcc7c0 t dce110_stream_encoder_lvds_set_stream_attribute +ffffffff81fcc8a0 t dce110_stream_encoder_set_throttled_vcp_size +ffffffff81fccaa0 t dce110_stream_encoder_update_hdmi_info_packets +ffffffff81fcd190 t dce110_stream_encoder_stop_hdmi_info_packets +ffffffff81fcd430 t dce110_stream_encoder_update_dp_info_packets +ffffffff81fcd5c0 t dce110_stream_encoder_stop_dp_info_packets +ffffffff81fcd730 t dce110_stream_encoder_dp_blank +ffffffff81fcd870 t dce110_stream_encoder_dp_unblank +ffffffff81fcda30 t setup_stereo_sync +ffffffff81fcdab0 t dce110_stream_encoder_set_avmute +ffffffff81fcdaf0 t dig_connect_to_otg +ffffffff81fcdb30 t dce110_reset_hdmi_stream_attribute +ffffffff81fcdc30 t dig_source_otg +ffffffff81fcdca0 t dce110_stream_encoder_set_stream_attribute_helper +ffffffff81fcdd90 t dce110_update_generic_info_packet +ffffffff81fcf000 T dce_transform_get_optimal_number_of_taps +ffffffff81fcf300 T dce110_opp_set_csc_adjustment +ffffffff81fcf3c0 t program_color_matrix +ffffffff81fcf5f0 T dce110_opp_set_csc_default +ffffffff81fcf730 T dce110_opp_program_regamma_pwl +ffffffff81fcffe0 T dce110_opp_power_on_regamma_lut +ffffffff81fd00a0 T dce110_opp_set_regamma_mode +ffffffff81fd0110 T dce_transform_construct +ffffffff81fd0190 t dce_transform_reset +ffffffff81fd01d0 t dce_transform_set_scaler +ffffffff81fd0c70 t dce_transform_set_pixel_storage_depth +ffffffff81fd1120 t dce_transform_set_gamut_remap +ffffffff81fd1460 t program_multi_taps_filter +ffffffff81fd2000 T dmub_abm_create +ffffffff81fd20b0 T dmub_abm_destroy +ffffffff81fd2100 t dmub_abm_init +ffffffff81fd24e0 t dmub_abm_set_level +ffffffff81fd26a0 t dmub_abm_get_current_backlight +ffffffff81fd26d0 t dmub_abm_get_target_backlight +ffffffff81fd2700 t dmub_abm_init_config +ffffffff81fd2810 t dmub_abm_set_pause +ffffffff81fd3000 T dmub_hw_lock_mgr_cmd +ffffffff81fd30b0 T dmub_hw_lock_mgr_inbox0_cmd +ffffffff81fd30f0 T should_use_dmub_lock +ffffffff81fd4000 T dmub_enable_outbox_notification +ffffffff81fd5000 T dmub_psr_create +ffffffff81fd5090 T dmub_psr_destroy +ffffffff81fd50e0 t dmub_psr_copy_settings +ffffffff81fd55a0 t dmub_psr_enable +ffffffff81fd5730 t dmub_psr_get_state +ffffffff81fd5a20 t dmub_psr_set_level +ffffffff81fd5b10 t dmub_psr_force_static +ffffffff81fd5bc0 t dmub_psr_get_residency +ffffffff81fd5c10 t dmub_psr_set_sink_vtotal_in_psr_active +ffffffff81fd5cd0 t dmub_psr_set_power_opt +ffffffff81fd6000 T dce100_enable_display_power_gating +ffffffff81fd60a0 T dce100_prepare_bandwidth +ffffffff81fd60f0 T dce100_optimize_bandwidth +ffffffff81fd6140 T dce100_hw_sequencer_construct +ffffffff81fd7000 T dce100_add_stream_to_ctx +ffffffff81fd70a0 T dce100_validate_plane +ffffffff81fd70e0 T dce100_find_first_free_match_stream_enc_for_link +ffffffff81fd7190 T dce100_create_resource_pool +ffffffff81fd7f50 t dce100_resource_destruct +ffffffff81fd8210 t dce100_destroy_resource_pool +ffffffff81fd8270 t dce100_panel_cntl_create +ffffffff81fd8300 t dce100_link_encoder_create +ffffffff81fd8400 t dce100_validate_bandwidth +ffffffff81fd8540 t dce100_validate_global +ffffffff81fd85e0 t read_dce_straps +ffffffff81fd8650 t create_audio +ffffffff81fd8680 t dce100_stream_encoder_create +ffffffff81fd8720 t dce100_hwseq_create +ffffffff81fd9000 T dce110_compressor_power_up_fbc +ffffffff81fd9130 T dce110_compressor_enable_fbc +ffffffff81fd9340 T dce110_compressor_is_fbc_enabled_in_hw +ffffffff81fd93f0 T dce110_compressor_disable_fbc +ffffffff81fd96c0 T dce110_compressor_program_compressed_surface_address_and_pitch +ffffffff81fd97e0 T dce110_compressor_set_fbc_invalidation_triggers +ffffffff81fd9860 T dce110_compressor_create +ffffffff81fd9900 T dce110_compressor_construct +ffffffff81fd9980 T dce110_compressor_destroy +ffffffff81fd99d0 T get_max_support_fbc_buffersize +ffffffff81fda000 T dce110_update_info_frame +ffffffff81fda0d0 T dce110_enable_stream +ffffffff81fda1d0 T dce110_edp_wait_for_hpd_ready +ffffffff81fda410 T dce110_edp_power_control +ffffffff81fda8d0 T dce110_edp_wait_for_T12 +ffffffff81fdaa60 T dce110_edp_backlight_control +ffffffff81fdad80 T dce110_enable_audio_stream +ffffffff81fdae90 T dce110_disable_audio_stream +ffffffff81fdb000 T dce110_disable_stream +ffffffff81fdb140 T dce110_unblank_stream +ffffffff81fdb240 T dce110_blank_stream +ffffffff81fdb390 T dce110_set_avmute +ffffffff81fdb3e0 T dce110_enable_accelerated_mode +ffffffff81fdb790 t power_down_all_hw_blocks +ffffffff81fdb950 T dce110_set_safe_displaymarks +ffffffff81fdba70 T dce110_apply_ctx_to_hw +ffffffff81fdc340 t enable_fbc +ffffffff81fdc4f0 T dce110_power_down +ffffffff81fdc5e0 T dce110_prepare_bandwidth +ffffffff81fdc710 T dce110_optimize_bandwidth +ffffffff81fdc8e0 T dce110_set_backlight_level +ffffffff81fdc9f0 T dce110_set_abm_immediate_disable +ffffffff81fdca70 T dce110_set_pipe +ffffffff81fdcae0 T dce110_enable_lvds_link_output +ffffffff81fdcb40 T dce110_enable_tmds_link_output +ffffffff81fdcbb0 T dce110_enable_dp_link_output +ffffffff81fdcdc0 T dce110_disable_link_output +ffffffff81fdcef0 T dce110_hw_sequencer_construct +ffffffff81fdcf40 t enable_display_pipe_clock_gating +ffffffff81fdcf70 t build_audio_output +ffffffff81fdd0d0 t init_hw +ffffffff81fdd370 t dce110_power_down_fe +ffffffff81fdd440 t dce110_apply_ctx_for_surface +ffffffff81fddb90 t dce110_post_unlock_program_front_end +ffffffff81fddbc0 t update_plane_addr +ffffffff81fddc30 t dce110_wait_for_mpcc_disconnect +ffffffff81fddc60 t dce110_update_pending_status +ffffffff81fddd40 t get_position +ffffffff81fdddd0 t dce110_enable_per_frame_crtc_position_reset +ffffffff81fde070 t dce110_enable_timing_synchronization +ffffffff81fde360 t set_drr +ffffffff81fde440 t set_static_screen_control +ffffffff81fde510 t dce110_set_cursor_position +ffffffff81fde660 t dce110_set_cursor_attribute +ffffffff81fde720 t program_gamut_remap +ffffffff81fde870 t program_output_csc +ffffffff81fde970 t init_pipes +ffffffff81fde9a0 t dce110_reset_hw_ctx_wrap +ffffffff81fdebf0 t dce110_set_input_transfer_func +ffffffff81fded80 t dce110_set_output_transfer_func +ffffffff81fdf690 t dce110_enable_display_power_gating +ffffffff81fdf800 t dce110_enable_stream_timing +ffffffff81fe0000 T dce110_mem_input_v_construct +ffffffff81fe0040 t dce_mem_input_v_program_display_marks +ffffffff81fe00c0 t dce_mem_input_program_chroma_display_marks +ffffffff81fe0140 t dce110_allocate_mem_input_v +ffffffff81fe0250 t dce110_free_mem_input_v +ffffffff81fe0280 t dce_mem_input_v_program_surface_flip_and_addr +ffffffff81fe03d0 t dce_mem_input_v_program_pte_vm +ffffffff81fe06a0 t dce_mem_input_v_program_surface_config +ffffffff81fe0a70 t dce_mem_input_v_is_surface_pending +ffffffff81fe0ae0 t program_urgency_watermark +ffffffff81fe0bf0 t program_nbp_watermark +ffffffff81fe0d60 t program_stutter_watermark +ffffffff81fe1000 T dce110_opp_v_set_csc_default +ffffffff81fe1300 t program_color_matrix_v +ffffffff81fe1470 t configure_graphics_mode_v +ffffffff81fe1560 T dce110_opp_v_set_csc_adjustment +ffffffff81fe2000 T dce110_opp_program_regamma_pwl_v +ffffffff81fe24b0 t power_on_lut +ffffffff81fe25d0 T dce110_opp_power_on_regamma_lut_v +ffffffff81fe2630 T dce110_opp_set_regamma_mode_v +ffffffff81fe3000 T dce110_opp_v_construct +ffffffff81fe4000 T dce110_resource_build_pipe_hw_param +ffffffff81fe4150 T dce110_find_first_free_match_stream_enc_for_link +ffffffff81fe41f0 T dce110_create_resource_pool +ffffffff81fe5190 t dce110_resource_destruct +ffffffff81fe54b0 t dce110_destroy_resource_pool +ffffffff81fe5510 t dce110_panel_cntl_create +ffffffff81fe55a0 t dce110_link_encoder_create +ffffffff81fe56a0 t dce110_validate_bandwidth +ffffffff81fe5790 t dce110_validate_global +ffffffff81fe5870 t dce110_acquire_underlay +ffffffff81fe5a50 t dce110_validate_plane +ffffffff81fe5ab0 t dce110_add_stream_to_ctx +ffffffff81fe5b80 t read_dce_straps +ffffffff81fe5bf0 t create_audio +ffffffff81fe5c20 t dce110_stream_encoder_create +ffffffff81fe5cc0 t dce110_hwseq_create +ffffffff81fe6000 T dce110_timing_generator_set_early_control +ffffffff81fe6070 T dce110_timing_generator_enable_crtc +ffffffff81fe6100 T dce110_timing_generator_program_blank_color +ffffffff81fe6190 T dce110_timing_generator_disable_crtc +ffffffff81fe61e0 T dce110_timing_generator_program_timing_generator +ffffffff81fe63d0 T dce110_timing_generator_set_drr +ffffffff81fe6510 T dce110_timing_generator_set_static_screen_control +ffffffff81fe65a0 T dce110_timing_generator_get_vblank_counter +ffffffff81fe6600 T dce110_timing_generator_get_position +ffffffff81fe66a0 T dce110_timing_generator_get_crtc_scanoutpos +ffffffff81fe6790 T dce110_timing_generator_program_blanking +ffffffff81fe6a00 T dce110_timing_generator_set_test_pattern +ffffffff81fe6cf0 T dce110_timing_generator_validate_timing +ffffffff81fe6db0 T dce110_timing_generator_wait_for_vblank +ffffffff81fe6f20 T dce110_timing_generator_is_counter_moving +ffffffff81fe6fa0 T dce110_timing_generator_wait_for_vactive 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dscl2_calc_lb_num_partitions +ffffffff82029400 T dpp2_cnv_set_alpha_keyer +ffffffff82029680 T dpp2_set_cursor_attributes +ffffffff820297e0 T oppn20_dummy_program_regamma_pwl +ffffffff82029810 T dpp2_construct +ffffffff82029890 t dpp2_cnv_setup +ffffffff8202b000 T dpp2_set_degamma_pwl +ffffffff8202b3b0 T dpp2_set_degamma +ffffffff8202b560 T dpp2_cm_set_gamut_remap +ffffffff8202b790 T dpp2_program_input_csc +ffffffff8202b9c0 T dpp20_program_blnd_lut +ffffffff8202c120 T dpp20_program_shaper +ffffffff8202e0c0 T dpp20_program_3dlut +ffffffff8202e790 t dpp20_set3dlut_ram12 +ffffffff8202e960 T dpp2_set_hdr_multiplier +ffffffff8202f000 t dsc2_get_enc_caps +ffffffff8202f080 t dsc2_read_state +ffffffff8202f230 t dsc2_validate_stream +ffffffff8202f290 t dsc2_set_config +ffffffff82030610 t dsc2_get_packed_pps +ffffffff820307b0 t dsc2_enable +ffffffff82030960 t dsc2_disable +ffffffff82030ae0 t dsc2_disconnect +ffffffff82030b50 T dsc2_construct +ffffffff82030ba0 t dsc_prepare_config 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hubbub2_init_dchub_sys_ctx +ffffffff820356e0 T hubbub2_update_dchub +ffffffff820358d0 T hubbub2_wm_read_state +ffffffff82035c60 T hubbub2_get_dchub_ref_freq +ffffffff82035d40 T hubbub2_read_state +ffffffff82035e90 T hubbub2_construct +ffffffff82035ef0 t hubbub2_program_watermarks +ffffffff82037000 T hubp2_set_vm_system_aperture_settings +ffffffff820371e0 T hubp2_program_deadline +ffffffff82037980 T hubp2_vready_at_or_After_vsync +ffffffff82037a20 T hubp2_setup_interdependent +ffffffff82037e90 T hubp2_program_size +ffffffff82038010 T hubp2_program_rotation +ffffffff82038180 T hubp2_dcc_control +ffffffff82038240 T hubp2_program_pixel_format +ffffffff82038810 T hubp2_program_surface_config +ffffffff82038a50 T hubp2_get_lines_per_chunk +ffffffff82038b10 T hubp2_cursor_set_attributes +ffffffff82038ed0 T hubp2_dmdata_set_attributes +ffffffff820392b0 T hubp2_dmdata_load +ffffffff82039340 T hubp2_dmdata_status_done +ffffffff820393b0 T hubp2_program_surface_flip_and_addr +ffffffff82039ca0 T hubp2_enable_triplebuffer +ffffffff82039d70 T hubp2_is_triplebuffer_enabled +ffffffff82039df0 T hubp2_set_flip_control_surface_gsl +ffffffff82039e40 T hubp2_is_flip_pending +ffffffff82039f50 T hubp2_set_blank +ffffffff82039fb0 T hubp2_set_blank_regs +ffffffff8203a0b0 T hubp2_cursor_set_position +ffffffff8203a520 T hubp2_clk_cntl +ffffffff8203a570 T hubp2_vtg_sel +ffffffff8203a5b0 T hubp2_clear_underflow +ffffffff8203a600 T hubp2_read_state_common +ffffffff8203b250 T hubp2_read_state +ffffffff8203b520 T hubp2_construct +ffffffff8203b590 t hubp2_setup +ffffffff8203ba30 t hubp2_validate_dml_output +ffffffff8203d000 T dcn20_set_flip_control_gsl +ffffffff8203d050 T dcn20_enable_power_gating_plane +ffffffff8203d410 T dcn20_dccg_init +ffffffff8203d490 T dcn20_disable_vga +ffffffff8203d550 T dcn20_program_triple_buffer +ffffffff8203d5a0 T dcn20_init_blank +ffffffff8203d790 T dcn20_dsc_pg_control +ffffffff8203dba0 T dcn20_dpp_pg_control +ffffffff8203de50 T dcn20_hubp_pg_control +ffffffff8203e100 T dcn20_plane_atomic_disable +ffffffff8203e230 t dcn20_setup_gsl_group_as_lock +ffffffff8203e490 T dcn20_disable_plane +ffffffff8203e610 T dcn20_disable_pixel_data +ffffffff8203e630 T dcn20_blank_pixel_data +ffffffff8203e830 T dcn20_enable_stream_timing +ffffffff8203edd0 T dcn20_program_output_csc +ffffffff8203eec0 T dcn20_set_output_transfer_func +ffffffff8203f040 T dcn20_set_blend_lut +ffffffff8203f0b0 T dcn20_set_shaper_3dlut +ffffffff8203f170 T dcn20_set_input_transfer_func +ffffffff8203f330 T dcn20_update_odm +ffffffff8203f420 T dcn20_pipe_control_lock +ffffffff8203f740 T dcn20_program_front_end_for_ctx +ffffffff82040240 t dcn20_program_pipe +ffffffff82040cf0 T dcn20_post_unlock_program_front_end +ffffffff82041040 T dcn20_prepare_bandwidth +ffffffff82041190 T dcn20_optimize_bandwidth +ffffffff82041360 T dcn20_update_bandwidth +ffffffff82041620 T dcn20_enable_writeback +ffffffff82041770 T dcn20_disable_writeback +ffffffff82041800 T dcn20_wait_for_blank_complete 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dcn20_link_encoder_enable_dp_output +ffffffff820442f0 T dcn20_link_encoder_get_max_link_cap +ffffffff820443a0 T dcn20_link_encoder_is_in_alt_mode +ffffffff82044420 T enc2_hw_init +ffffffff82044500 T dcn20_link_encoder_construct +ffffffff82045000 T mmhubbub2_config_mcif_irq +ffffffff82045130 T mmhubbub2_enable_mcif +ffffffff82045170 T mmhubbub2_disable_mcif +ffffffff820451b0 T mcifwb2_dump_frame +ffffffff820452c0 t mmhubbub2_config_mcif_buf +ffffffff82045910 t mmhubbub2_config_mcif_arb +ffffffff82045d20 T dcn20_mmhubbub_construct +ffffffff82046000 T mpc2_update_blending +ffffffff820462a0 T mpc2_set_denorm +ffffffff82046310 T mpc2_set_denorm_clamp +ffffffff82046460 T mpc2_set_output_csc +ffffffff82046650 T mpc2_set_ocsc_default +ffffffff82046830 T mpc20_power_on_ogam_lut +ffffffff820468b0 T mpc2_set_output_gamma +ffffffff820470b0 T mpc2_assert_idle_mpcc +ffffffff820471c0 T mpc2_assert_mpcc_idle_before_connect +ffffffff82047410 t mpc2_get_mpcc_for_dpp +ffffffff820474d0 T dcn20_mpc_construct +ffffffff82048000 T opp2_set_disp_pattern_generator +ffffffff82048810 T opp2_dpg_set_blank_color +ffffffff82048990 T opp2_program_dpg_dimensions +ffffffff82048a20 T opp2_dpg_is_blanked +ffffffff82048ae0 T opp2_program_left_edge_extra_pixel +ffffffff82048b30 T dcn20_opp_construct +ffffffff82049000 T optc2_enable_crtc +ffffffff82049100 T optc2_set_gsl +ffffffff820491f0 T optc2_set_gsl_source_select +ffffffff820492b0 T optc2_set_dsc_config +ffffffff82049380 T optc2_get_dsc_status +ffffffff820493c0 T optc2_is_two_pixels_per_containter +ffffffff820493d0 T optc2_set_odm_bypass +ffffffff82049510 T optc2_set_odm_combine +ffffffff82049700 T optc2_get_optc_source +ffffffff820497d0 T optc2_triplebuffer_lock +ffffffff820498f0 T optc2_triplebuffer_unlock +ffffffff820499a0 T optc2_lock_doublebuffer_enable +ffffffff82049b80 T optc2_lock_doublebuffer_disable +ffffffff82049c60 T optc2_setup_manual_trigger +ffffffff82049d80 T optc2_program_manual_trigger +ffffffff82049df0 T optc2_configure_crc +ffffffff82049e80 T optc2_get_last_used_drr_vtotal +ffffffff82049ec0 T dcn20_timing_generator_init +ffffffff82049f30 t optc2_set_dwb_source +ffffffff82049fc0 t optc2_align_vblanks +ffffffff8204b000 T dcn20_dpp_destroy +ffffffff8204b050 T dcn20_dpp_create +ffffffff8204b120 T dcn20_ipp_create +ffffffff8204b1d0 T dcn20_opp_create +ffffffff8204b280 T dcn20_aux_engine_create +ffffffff8204b320 T dcn20_i2c_hw_create +ffffffff8204b3b0 T dcn20_mpc_create +ffffffff8204b440 T dcn20_hubbub_create +ffffffff8204b510 T dcn20_timing_generator_create +ffffffff8204b5b0 T dcn20_link_encoder_create +ffffffff8204b6b0 T dcn20_stream_encoder_create +ffffffff8204b770 T dcn20_hwseq_create +ffffffff8204b7e0 T dcn20_clock_source_destroy +ffffffff8204b830 T dcn20_dsc_create +ffffffff8204b8f0 T dcn20_dsc_destroy +ffffffff8204b940 T dcn20_hubp_create +ffffffff8204ba10 T dcn20_build_mapped_resource +ffffffff8204bc30 T dcn20_acquire_dsc +ffffffff8204bd70 T dcn20_release_dsc +ffffffff8204bde0 T dcn20_add_dsc_to_stream_resource +ffffffff8204bf50 T dcn20_add_stream_to_ctx +ffffffff8204c0e0 T dcn20_remove_stream_from_ctx +ffffffff8204c1d0 T dcn20_split_stream_for_odm +ffffffff8204c680 T dcn20_split_stream_for_mpc +ffffffff8204c800 T dcn20_calc_max_scaled_time +ffffffff8204c870 T dcn20_set_mcif_arb_params +ffffffff8204c9e0 T dcn20_validate_dsc +ffffffff8204cb80 T dcn20_find_secondary_pipe +ffffffff8204cd60 T dcn20_merge_pipes_for_validate +ffffffff8204cfd0 T dcn20_validate_apply_pipe_split_flags +ffffffff8204d860 T dcn20_fast_validate_bw +ffffffff8204ddb0 T dcn20_validate_bandwidth +ffffffff8204de30 T dcn20_acquire_idle_pipe_for_layer +ffffffff8204df50 T dcn20_get_dcc_compression_cap +ffffffff8204df80 T dcn20_patch_unknown_plane_state +ffffffff8204dfe0 T dcn20_dwbc_create +ffffffff8204e0f0 T dcn20_mmhubbub_create +ffffffff8204e250 T dcn20_create_resource_pool +ffffffff8204fa30 t dcn20_resource_destruct +ffffffff8204fed0 t dcn20_destroy_resource_pool +ffffffff8204ff30 t dcn20_panel_cntl_create +ffffffff8204ffc0 t read_dce_straps +ffffffff8204fff0 t dcn20_create_audio +ffffffff82051000 T enc2_set_dynamic_metadata +ffffffff82051260 T enc2_stream_encoder_dp_unblank +ffffffff82051590 T enc2_stream_encoder_dp_set_stream_attribute +ffffffff820515f0 T enc2_get_fifo_cal_average_level +ffffffff82051650 T dcn20_stream_encoder_construct +ffffffff820516b0 t enc2_stream_encoder_update_hdmi_info_packets +ffffffff82051780 t enc2_stream_encoder_stop_hdmi_info_packets +ffffffff82051a90 t enc2_stream_encoder_update_dp_info_packets +ffffffff82051b40 t enc2_read_state +ffffffff82051cc0 t enc2_dp_set_dsc_config +ffffffff82051d90 t enc2_dp_set_dsc_pps_info_packet +ffffffff82052260 t enc2_dp_set_odm_combine +ffffffff820522a0 t enc2_update_hdmi_info_packet +ffffffff82053000 T dcn20_vmid_setup +ffffffff82054000 T dccg201_create +ffffffff820540b0 t dccg201_update_dpp_dto +ffffffff82055000 T dpp201_construct +ffffffff82055080 t dpp201_get_optimal_number_of_taps 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T dcn21_PLAT_58856_wa +ffffffff82067220 T dcn21_set_abm_immediate_disable +ffffffff82067350 T dcn21_set_pipe +ffffffff82067460 T dcn21_set_backlight_level +ffffffff82067640 T dcn21_is_abm_supported +ffffffff82068000 T dcn21_hw_sequencer_construct +ffffffff82069000 T dcn21_link_encoder_enable_dp_output +ffffffff82069140 t dcn21_link_encoder_acquire_phy +ffffffff82069320 T dcn21_link_encoder_construct +ffffffff82069500 t dcn21_link_encoder_enable_dp_mst_output +ffffffff82069570 t dcn21_link_encoder_disable_output +ffffffff8206a000 T dcn21_fast_validate_bw +ffffffff8206a680 T dcn21_create_resource_pool +ffffffff8206b9f0 t dcn21_resource_destruct +ffffffff8206be90 t dcn21_destroy_resource_pool +ffffffff8206bef0 t dcn21_panel_cntl_create +ffffffff8206bf80 t dcn21_link_encoder_create +ffffffff8206c080 t dcn21_validate_bandwidth +ffffffff8206c100 t dcn21_patch_unknown_plane_state +ffffffff8206c150 t dcn21_get_panel_config_defaults +ffffffff8206c1c0 t read_dce_straps +ffffffff8206c1f0 t dcn21_create_audio +ffffffff8206c220 t dcn21_stream_encoder_create +ffffffff8206c2c0 t dcn21_hwseq_create +ffffffff8206d000 T afmt3_setup_hdmi_audio +ffffffff8206d1d0 T afmt3_se_audio_setup +ffffffff8206d370 T afmt3_audio_mute_control +ffffffff8206d3e0 T afmt3_audio_info_immediate_update +ffffffff8206d420 T afmt3_setup_dp_audio +ffffffff8206d510 T afmt3_construct +ffffffff8206e000 T cm_helper_program_gamcor_xfer_func +ffffffff8206e3c0 T cm3_helper_translate_curve_to_hw_format +ffffffff8206efd0 T cm3_helper_convert_to_custom_float +ffffffff8206f420 T cm3_helper_translate_curve_to_degamma_hw_format +ffffffff8206fc40 T is_rgb_equal +ffffffff82070000 T dccg3_create +ffffffff820700b0 T dccg30_create +ffffffff82071000 T dcn30_link_encoder_validate_output_with_stream +ffffffff82071010 T dcn30_link_encoder_construct +ffffffff820711f0 T enc3_hw_init +ffffffff82072000 T enc3_stream_encoder_update_hdmi_info_packets +ffffffff82072100 t enc3_update_hdmi_info_packet +ffffffff820724f0 T enc3_stream_encoder_stop_hdmi_info_packets +ffffffff82072ad0 T enc3_dp_set_dsc_pps_info_packet +ffffffff82072df0 T enc3_stream_encoder_update_dp_info_packets +ffffffff82073030 T enc3_audio_mute_control +ffffffff820730a0 T enc3_se_dp_audio_setup +ffffffff82073120 T enc3_se_dp_audio_enable +ffffffff82073210 T enc3_se_hdmi_audio_setup +ffffffff82073520 T dcn30_dio_stream_encoder_construct +ffffffff82073590 t enc3_stream_encoder_hdmi_set_stream_attribute +ffffffff82073b90 t enc3_stream_encoder_dvi_set_stream_attribute +ffffffff82073d90 t enc3_read_state +ffffffff82073f20 t enc3_dp_set_dsc_config +ffffffff82073ff0 t enc3_dp_set_odm_combine +ffffffff82075000 T dpp30_read_state +ffffffff82075050 T dpp3_program_post_csc +ffffffff82075240 T dpp3_set_pre_degam +ffffffff820752f0 T dpp3_cnv_setup +ffffffff82075bc0 T dpp3_set_cursor_attributes +ffffffff82075d30 T dpp3_get_optimal_number_of_taps +ffffffff82076750 T dpp3_construct +ffffffff820767b0 t dpp3_deferred_update +ffffffff82076b90 t dpp3_program_blnd_lut +ffffffff82077610 t dpp3_program_shaper +ffffffff820796a0 t dpp3_program_3dlut +ffffffff82079e50 t dpp3_set3dlut_ram12 +ffffffff8207b000 T dpp3_program_cm_dealpha +ffffffff8207b0a0 T dpp3_program_cm_bias +ffffffff8207b190 T dpp3_program_gamcor_lut +ffffffff8207bbb0 t dpp3_power_on_gamcor_lut +ffffffff8207bce0 T dpp3_set_hdr_multiplier +ffffffff8207bd30 T dpp3_cm_set_gamut_remap +ffffffff8207c000 T dwb3_config_fc +ffffffff8207c1b0 T dwb3_set_stereo +ffffffff8207c270 T dwb3_enable +ffffffff8207c3a0 T dwb3_set_denorm +ffffffff8207c4c0 T dwb3_disable +ffffffff8207c570 T dwb3_update +ffffffff8207c6a0 T dwb3_is_enabled +ffffffff8207c740 T dwb3_set_new_content +ffffffff8207c780 t dwb3_get_caps +ffffffff8207c820 T dcn30_dwbc_construct +ffffffff8207c870 T dwb3_set_host_read_rate_control +ffffffff8207d000 T dwb3_ogam_set_input_transfer_func +ffffffff8207d9f0 T dwb3_set_gamut_remap +ffffffff8207dca0 T dwb3_program_hdr_mult +ffffffff8207e000 T hubbub3_init_dchub_sys_ctx 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dcn30_set_writeback +ffffffff82081740 T dcn30_mmhubbub_warmup +ffffffff82081990 T dcn30_enable_writeback +ffffffff82081a60 T dcn30_disable_writeback +ffffffff82081b40 T dcn30_program_all_writeback_pipes_in_tree +ffffffff82081e40 T dcn30_init_hw +ffffffff820826c0 T dcn30_set_avmute +ffffffff82082720 T dcn30_update_info_frame +ffffffff820827f0 T dcn30_program_dmdata_engine +ffffffff82082890 T dcn30_apply_idle_power_optimizations +ffffffff82082e10 T dcn30_does_plane_fit_in_mall +ffffffff82082ec0 T dcn30_hardware_release +ffffffff82082fb0 T dcn30_set_disp_pattern_generator +ffffffff82083020 T dcn30_prepare_bandwidth +ffffffff82084000 T dcn30_hw_sequencer_construct +ffffffff82085000 t mmhubbub3_warmup_mcif +ffffffff82085210 t mmhubbub3_config_mcif_buf +ffffffff820856c0 t mmhubbub3_config_mcif_arb +ffffffff82085b10 T dcn30_mmhubbub_construct +ffffffff82086000 T mpc3_is_dwb_idle +ffffffff82086070 T mpc3_set_dwb_mux +ffffffff820860f0 T mpc3_disable_dwb_mux +ffffffff82086170 T mpc3_set_out_rate_control +ffffffff82086280 T mpc3_get_ogam_current +ffffffff82086320 T mpc3_power_on_ogam_lut +ffffffff820863f0 T mpc3_set_output_gamma +ffffffff82087030 T mpc3_set_denorm +ffffffff820870a0 T mpc3_set_denorm_clamp +ffffffff820871f0 T mpc3_program_shaper +ffffffff820893b0 t mpc3_power_on_shaper_3dlut +ffffffff82089730 T mpc3_init_mpcc +ffffffff820897b0 T mpc3_set_gamut_remap +ffffffff82089a20 T mpc3_program_3dlut +ffffffff8208a190 t mpc3_set3dlut_ram12 +ffffffff8208a370 T mpc3_set_output_csc +ffffffff8208a4e0 T mpc3_set_ocsc_default +ffffffff8208a650 T mpc3_set_rmu_mux +ffffffff8208a6f0 T mpc3_get_rmu_mux_status +ffffffff8208a7a0 T mpcc3_acquire_rmu +ffffffff8208a900 t mpcc3_release_rmu +ffffffff8208aa70 t mpc3_set_mpc_mem_lp_mode +ffffffff8208abc0 T dcn30_mpc_construct +ffffffff8208b000 T optc3_triplebuffer_lock +ffffffff8208b120 T optc3_lock_doublebuffer_enable +ffffffff8208b3b0 T optc3_lock_doublebuffer_disable +ffffffff8208b4c0 T optc3_lock +ffffffff8208b590 T optc3_set_out_mux +ffffffff8208b5d0 T optc3_program_blank_color +ffffffff8208b700 T optc3_set_drr_trigger_window +ffffffff8208b790 T optc3_set_vtotal_change_limit +ffffffff8208b800 T optc3_set_dsc_config +ffffffff8208b850 T optc3_set_odm_bypass +ffffffff8208b9d0 T optc3_wait_drr_doublebuffer_pending_clear +ffffffff8208ba50 T optc3_set_vtotal_min_max +ffffffff8208ba90 T optc3_tg_init +ffffffff8208baf0 T dcn30_timing_generator_init +ffffffff8208bb60 t optc3_set_odm_combine +ffffffff8208c000 T dcn30_add_stream_to_ctx +ffffffff8208c020 T dcn30_populate_dml_pipes_from_context +ffffffff8208c100 T dcn30_populate_dml_writeback_from_context +ffffffff8208c160 T dcn30_calc_max_scaled_time +ffffffff8208c1c0 T dcn30_set_mcif_arb_params +ffffffff8208c330 T dcn30_acquire_post_bldn_3dlut +ffffffff8208c4c0 T dcn30_release_post_bldn_3dlut +ffffffff8208c570 T dcn30_internal_validate_bw +ffffffff8208d2c0 t dcn30_split_stream_for_mpc_or_odm +ffffffff8208d5e0 T dcn30_can_support_mclk_switch_using_fw_based_vblank_stretch +ffffffff8208d6b0 t is_refresh_rate_support_mclk_switch_using_fw_based_vblank_stretch +ffffffff8208d750 T dcn30_setup_mclk_switch_using_fw_based_vblank_stretch +ffffffff8208d7f0 T dcn30_update_soc_for_wm_a +ffffffff8208d840 T dcn30_calculate_wm_and_dlg +ffffffff8208d8b0 T dcn30_validate_bandwidth +ffffffff8208dce0 T dcn30_update_bw_bounding_box +ffffffff8208e520 T dcn30_create_resource_pool +ffffffff8208faa0 t dcn30_resource_destruct +ffffffff82090010 t dcn30_destroy_resource_pool +ffffffff82090070 t dcn30_panel_cntl_create +ffffffff82090100 t dcn30_link_encoder_create +ffffffff820901b0 t dcn30_get_panel_config_defaults +ffffffff82090220 t read_dce_straps +ffffffff82090250 t dcn30_create_audio +ffffffff82090280 t dcn30_stream_encoder_create +ffffffff82090400 t dcn30_hwseq_create +ffffffff82091000 T vpg3_update_generic_info_packet +ffffffff820919a0 T vpg3_construct +ffffffff82092000 T dccg301_create +ffffffff82093000 T dcn301_link_encoder_construct +ffffffff82094000 T hubbub301_construct +ffffffff82095000 T dcn301_hw_sequencer_construct +ffffffff82096000 T dcn301_panel_cntl_construct +ffffffff82096050 t dcn301_panel_cntl_destroy +ffffffff820960a0 t dcn301_panel_cntl_hw_init +ffffffff820962b0 t dcn301_is_panel_backlight_on +ffffffff82096310 t dcn301_is_panel_powered_on +ffffffff820963c0 t dcn301_store_backlight_level +ffffffff82096460 t dcn301_get_16_bit_backlight_from_pwm +ffffffff82097000 T dcn301_create_resource_pool +ffffffff820985a0 t dcn301_destruct +ffffffff82098ae0 t dcn301_destroy_resource_pool +ffffffff82098b40 t dcn301_panel_cntl_create +ffffffff82098bd0 t dcn301_link_encoder_create +ffffffff82098c80 t dcn301_calculate_wm_and_dlg +ffffffff82098cf0 t read_dce_straps +ffffffff82098d20 t dcn301_create_audio +ffffffff82098d50 t dcn301_stream_encoder_create +ffffffff82098ed0 t dcn301_hwseq_create +ffffffff82099000 T dcn302_dpp_pg_control +ffffffff820992a0 T dcn302_hubp_pg_control +ffffffff82099550 T dcn302_dsc_pg_control +ffffffff8209a000 T dcn302_hw_sequencer_construct +ffffffff8209b000 T dcn302_update_bw_bounding_box +ffffffff8209b050 T dcn302_create_resource_pool +ffffffff8209c3d0 t dcn302_resource_destruct +ffffffff8209c8e0 t dcn302_destroy_resource_pool +ffffffff8209c930 t dcn302_panel_cntl_create +ffffffff8209c9c0 t dcn302_link_encoder_create +ffffffff8209ca70 t dcn302_get_panel_config_defaults +ffffffff8209cae0 t read_dce_straps +ffffffff8209cb10 t dcn302_create_audio +ffffffff8209cb40 t dcn302_stream_encoder_create +ffffffff8209ccc0 t dcn302_hwseq_create +ffffffff8209d000 T dcn303_dpp_pg_control +ffffffff8209d030 T dcn303_hubp_pg_control +ffffffff8209d060 T dcn303_dsc_pg_control +ffffffff8209d090 T dcn303_enable_power_gating_plane +ffffffff8209e000 T dcn303_hw_sequencer_construct +ffffffff8209f000 T dcn303_update_bw_bounding_box +ffffffff8209f050 T dcn303_create_resource_pool +ffffffff820a0270 t dcn303_resource_destruct +ffffffff820a0790 t dcn303_destroy_resource_pool +ffffffff820a07e0 t dcn303_panel_cntl_create +ffffffff820a0870 t dcn303_link_encoder_create +ffffffff820a0920 t dcn303_get_panel_config_defaults +ffffffff820a0990 t read_dce_straps +ffffffff820a09c0 t dcn303_create_audio +ffffffff820a09f0 t dcn303_stream_encoder_create +ffffffff820a0b70 t dcn303_hwseq_create +ffffffff820a1000 T afmt31_powerdown +ffffffff820a1090 T afmt31_poweron +ffffffff820a1120 T afmt31_construct +ffffffff820a2000 T apg31_construct +ffffffff820a2050 t apg31_se_audio_setup +ffffffff820a2160 t apg31_audio_mute_control +ffffffff820a21a0 t apg31_enable +ffffffff820a22b0 t apg31_disable +ffffffff820a3000 T dccg31_update_dpp_dto +ffffffff820a3160 T dccg31_set_dpstreamclk +ffffffff820a32f0 t dccg31_disable_dpstreamclk +ffffffff820a3440 T dccg31_enable_symclk32_se +ffffffff820a3740 T dccg31_disable_symclk32_se +ffffffff820a3a10 T dccg31_enable_symclk32_le +ffffffff820a3bf0 T dccg31_disable_symclk32_le +ffffffff820a3d90 T dccg31_disable_dscclk +ffffffff820a3f50 T dccg31_enable_dscclk +ffffffff820a4120 T dccg31_set_physymclk +ffffffff820a4630 T dccg31_set_dtbclk_dto +ffffffff820a48e0 T dccg31_set_audio_dtbclk_dto +ffffffff820a49f0 T dccg31_get_dccg_ref_freq +ffffffff820a4a20 T dccg31_set_dispclk_change_mode +ffffffff820a4a70 T dccg31_init +ffffffff820a4fd0 T dccg31_otg_add_pixel +ffffffff820a5010 T dccg31_otg_drop_pixel +ffffffff820a5050 T dccg31_create +ffffffff820a6000 T dcn31_link_encoder_set_dio_phy_mux +ffffffff820a6390 T dcn31_link_encoder_construct +ffffffff820a6560 T dcn31_link_encoder_construct_minimal +ffffffff820a65e0 T dcn31_link_encoder_enable_dp_output +ffffffff820a6820 T dcn31_link_encoder_enable_dp_mst_output +ffffffff820a6a60 T dcn31_link_encoder_disable_output +ffffffff820a6cd0 T dcn31_link_encoder_is_in_alt_mode +ffffffff820a6e10 T dcn31_link_encoder_get_max_link_cap +ffffffff820a6f80 t enc31_hw_init +ffffffff820a7000 T dcn31_hpo_dp_link_enc_enable +ffffffff820a7160 T dcn31_hpo_dp_link_enc_disable +ffffffff820a71d0 T dcn31_hpo_dp_link_enc_set_link_test_pattern +ffffffff820a7b20 T dcn31_hpo_dp_link_enc_update_stream_allocation_table +ffffffff820a7da0 T dcn31_hpo_dp_link_enc_set_throttled_vcp_size +ffffffff820a8040 T dcn31_hpo_dp_link_enc_read_state +ffffffff820a82f0 T dcn31_hpo_dp_link_enc_enable_dp_output +ffffffff820a83f0 T dcn31_hpo_dp_link_enc_disable_output +ffffffff820a8530 T dcn31_hpo_dp_link_enc_set_ffe +ffffffff820a8620 T hpo_dp_link_encoder31_construct +ffffffff820a8680 t dcn31_hpo_dp_link_enc_is_in_alt_mode +ffffffff820a9000 T dcn31_hpo_dp_stream_encoder_construct +ffffffff820a9070 t dcn31_hpo_dp_stream_enc_enable_stream +ffffffff820a91b0 t dcn31_hpo_dp_stream_enc_dp_unblank +ffffffff820a9460 t dcn31_hpo_dp_stream_enc_dp_blank +ffffffff820a9560 t dcn31_hpo_dp_stream_enc_disable +ffffffff820a95d0 t dcn31_hpo_dp_stream_enc_set_stream_attribute +ffffffff820a9e80 t dcn31_hpo_dp_stream_enc_update_dp_info_packets +ffffffff820aa040 t dcn31_hpo_dp_stream_enc_stop_dp_info_packets +ffffffff820aa1d0 t dcn31_hpo_dp_stream_enc_set_dsc_pps_info_packet +ffffffff820aa470 t dcn31_hpo_dp_stream_enc_map_stream_to_link +ffffffff820aa570 t dcn31_hpo_dp_stream_enc_mute_control +ffffffff820aa5e0 t dcn31_hpo_dp_stream_enc_audio_setup +ffffffff820aa690 t dcn31_hpo_dp_stream_enc_audio_enable +ffffffff820aa760 t dcn31_hpo_dp_stream_enc_audio_disable +ffffffff820aa910 t dcn31_hpo_dp_stream_enc_read_state +ffffffff820aaaa0 t dcn31_set_hblank_min_symbol_width +ffffffff820ab000 T hubbub31_init_dchub_sys_ctx +ffffffff820ab1e0 T hubbub31_construct +ffffffff820ab280 t hubbub31_get_dcc_compression_cap +ffffffff820ab460 t hubbub31_get_dchub_ref_freq +ffffffff820ab540 t hubbub31_program_watermarks +ffffffff820ace60 t hubbub31_verify_allow_pstate_change_high +ffffffff820ad020 t dcn31_program_det_size +ffffffff820ad200 t dcn31_program_compbuf_size +ffffffff820ad480 t dcn31_init_crb +ffffffff820ae000 T hubp31_set_unbounded_requesting +ffffffff820ae090 T hubp31_soft_reset +ffffffff820ae0e0 T hubp31_construct +ffffffff820ae150 t hubp31_program_extended_blank +ffffffff820af000 T dcn31_init_hw +ffffffff820af930 T dcn31_dsc_pg_control +ffffffff820afc80 T dcn31_enable_power_gating_plane +ffffffff820afee0 T dcn31_update_info_frame +ffffffff820affb0 T dcn31_z10_save_init +ffffffff820b0070 T dcn31_z10_restore +ffffffff820b0150 T dcn31_hubp_pg_control +ffffffff820b0470 T dcn31_init_sys_ctx +ffffffff820b0520 T dcn31_reset_hw_ctx_wrap +ffffffff820b08b0 T dcn31_setup_hpo_hw_control +ffffffff820b1000 T dcn31_hw_sequencer_construct +ffffffff820b2000 T optc31_immediate_disable_crtc +ffffffff820b2100 T optc31_set_drr +ffffffff820b2310 T optc3_init_odm +ffffffff820b2480 T dcn31_timing_generator_init +ffffffff820b24f0 t optc31_enable_crtc +ffffffff820b25f0 t optc31_disable_crtc +ffffffff820b26d0 t optc31_set_odm_combine +ffffffff820b3000 T dcn31_panel_cntl_construct +ffffffff820b3040 t dcn31_panel_cntl_destroy +ffffffff820b3090 t dcn31_panel_cntl_hw_init +ffffffff820b3180 t dcn31_is_panel_backlight_on +ffffffff820b3220 t dcn31_is_panel_powered_on +ffffffff820b32d0 t dcn31_store_backlight_level +ffffffff820b3390 t dcn31_get_16_bit_backlight_from_pwm +ffffffff820b4000 T dcn31_populate_dml_pipes_from_context +ffffffff820b4340 T dcn31_calculate_wm_and_dlg +ffffffff820b43b0 T dcn31_populate_dml_writeback_from_context +ffffffff820b4410 T dcn31_set_mcif_arb_params +ffffffff820b4470 T dcn31_validate_bandwidth +ffffffff820b4850 T dcn31_create_resource_pool +ffffffff820b5bc0 t dcn31_resource_destruct +ffffffff820b6220 t dcn31_destroy_resource_pool +ffffffff820b6280 t dcn31_panel_cntl_create +ffffffff820b62f0 t dcn31_link_encoder_create +ffffffff820b63a0 t dcn31_link_enc_create_minimal +ffffffff820b6440 t dcn31_get_panel_config_defaults +ffffffff820b64b0 t read_dce_straps +ffffffff820b64e0 t dcn31_create_audio +ffffffff820b6510 t dcn31_stream_encoder_create +ffffffff820b6690 t dcn31_hpo_dp_stream_encoder_create +ffffffff820b6850 t dcn31_hpo_dp_link_encoder_create +ffffffff820b68e0 t dcn31_hwseq_create +ffffffff820b7000 T vpg31_powerdown +ffffffff820b7090 T vpg31_poweron +ffffffff820b7120 T vpg31_construct +ffffffff820b8000 T dccg314_create +ffffffff820b80b0 t dccg314_set_dpstreamclk +ffffffff820b8470 t dccg314_set_dtbclk_dto +ffffffff820b8660 t dccg314_set_pixel_rate_div +ffffffff820b89d0 t dccg314_set_valid_pixel_rate +ffffffff820b8a40 t dccg314_dpp_root_clock_control +ffffffff820b9000 T dcn314_dio_stream_encoder_construct +ffffffff820b9070 t enc314_stream_encoder_hdmi_set_stream_attribute +ffffffff820b9670 t enc314_stream_encoder_dvi_set_stream_attribute +ffffffff820b9870 t enc314_stream_encoder_dp_blank +ffffffff820b98c0 t enc314_stream_encoder_dp_unblank +ffffffff820b9c00 t enc314_read_state +ffffffff820b9d60 t enc314_dp_set_dsc_config +ffffffff820b9db0 t enc314_dp_set_odm_combine +ffffffff820b9df0 t enc314_set_dig_input_mode +ffffffff820b9e40 t enc314_enable_fifo +ffffffff820b9ee0 t enc314_disable_fifo +ffffffff820b9f30 t enc314_reset_fifo +ffffffff820bb000 T dcn314_update_odm +ffffffff820bb5f0 T dcn314_dsc_pg_control +ffffffff820bb9c0 T dcn314_enable_power_gating_plane +ffffffff820bbc50 T dcn314_calculate_dccg_k1_k2_values +ffffffff820bbde0 T dcn314_set_pixels_per_cycle +ffffffff820bbed0 T dcn314_dpp_root_clock_control +ffffffff820bbf30 T dcn314_hubp_pg_control +ffffffff820bd000 T dcn314_hw_sequencer_construct +ffffffff820be000 T dcn314_timing_generator_init +ffffffff820be070 t optc314_enable_crtc +ffffffff820be170 t optc314_disable_crtc +ffffffff820be250 t optc314_phantom_crtc_post_enable +ffffffff820be310 t optc314_set_odm_bypass +ffffffff820be480 t optc314_set_odm_combine +ffffffff820be770 t optc314_set_h_timing_div_manual_mode +ffffffff820bf000 T dcn314_validate_bandwidth +ffffffff820bf4c0 T dcn314_create_resource_pool +ffffffff820c0790 t dcn314_resource_destruct +ffffffff820c0df0 t dcn314_destroy_resource_pool +ffffffff820c0e50 t dcn31_panel_cntl_create +ffffffff820c0ec0 t dcn31_link_encoder_create +ffffffff820c0f70 t dcn31_link_enc_create_minimal +ffffffff820c1010 t dcn314_populate_dml_pipes_from_context +ffffffff820c10a0 t dcn314_update_bw_bounding_box +ffffffff820c10f0 t dcn314_get_panel_config_defaults +ffffffff820c1160 t read_dce_straps +ffffffff820c1190 t dcn31_create_audio +ffffffff820c11c0 t dcn314_stream_encoder_create +ffffffff820c1340 t dcn31_hpo_dp_stream_encoder_create +ffffffff820c1500 t dcn31_hpo_dp_link_encoder_create +ffffffff820c1590 t dcn314_hwseq_create +ffffffff820c2000 T dcn315_create_resource_pool +ffffffff820c3260 t dcn315_resource_destruct +ffffffff820c38c0 t dcn315_destroy_resource_pool +ffffffff820c3920 t dcn31_panel_cntl_create +ffffffff820c3990 t dcn31_link_encoder_create +ffffffff820c3a40 t dcn31_link_enc_create_minimal +ffffffff820c3ae0 t dcn315_populate_dml_pipes_from_context +ffffffff820c4170 t dcn315_get_panel_config_defaults +ffffffff820c41e0 t read_dce_straps +ffffffff820c4210 t dcn31_create_audio +ffffffff820c4240 t dcn315_stream_encoder_create +ffffffff820c43c0 t dcn31_hpo_dp_stream_encoder_create +ffffffff820c4580 t dcn31_hpo_dp_link_encoder_create +ffffffff820c4610 t dcn31_hwseq_create +ffffffff820c5000 T dcn316_create_resource_pool +ffffffff820c62a0 t dcn316_resource_destruct +ffffffff820c6900 t dcn316_destroy_resource_pool +ffffffff820c6960 t dcn31_panel_cntl_create +ffffffff820c69d0 t dcn31_link_encoder_create +ffffffff820c6a80 t dcn31_link_enc_create_minimal +ffffffff820c6b20 t dcn316_populate_dml_pipes_from_context +ffffffff820c6e50 t dcn316_get_panel_config_defaults +ffffffff820c6ec0 t read_dce_straps +ffffffff820c6ef0 t dcn31_create_audio +ffffffff820c6f20 t dcn316_stream_encoder_create +ffffffff820c70a0 t dcn31_hpo_dp_stream_encoder_create +ffffffff820c7260 t dcn31_hpo_dp_link_encoder_create +ffffffff820c72f0 t dcn31_hwseq_create +ffffffff820c8000 T dccg32_create +ffffffff820c80b0 t dccg32_get_dccg_ref_freq +ffffffff820c80e0 t dccg32_otg_add_pixel +ffffffff820c8120 t dccg32_otg_drop_pixel +ffffffff820c8160 t dccg32_set_dpstreamclk +ffffffff820c8490 t dccg32_set_dtbclk_dto +ffffffff820c8690 t dccg32_set_pixel_rate_div +ffffffff820c8a60 t dccg32_set_valid_pixel_rate +ffffffff820c9000 T enc32_hw_init +ffffffff820c9090 T dcn32_link_encoder_enable_dp_output +ffffffff820c90e0 T dcn32_link_encoder_construct +ffffffff820c92c0 t dcn32_link_encoder_is_in_alt_mode +ffffffff820c9340 t dcn32_link_encoder_get_max_link_cap +ffffffff820ca000 T dcn32_dio_stream_encoder_construct +ffffffff820ca070 t enc32_stream_encoder_hdmi_set_stream_attribute +ffffffff820ca5c0 t enc32_stream_encoder_dvi_set_stream_attribute +ffffffff820ca740 t enc32_stream_encoder_dp_unblank +ffffffff820cac00 t enc32_read_state +ffffffff820cad60 t enc32_dp_set_dsc_config +ffffffff820cadb0 t enc32_dp_set_odm_combine +ffffffff820cadf0 t enc32_set_dig_input_mode +ffffffff820cb000 T dpp32_construct +ffffffff820cb060 t dscl32_calc_lb_num_partitions +ffffffff820cc000 T hpo_dp_link_encoder32_construct +ffffffff820cc060 t dcn32_hpo_dp_link_enc_is_in_alt_mode +ffffffff820cd000 T dcn32_program_det_size +ffffffff820cd1a0 T hubbub32_program_urgent_watermarks +ffffffff820cd910 T hubbub32_program_stutter_watermarks +ffffffff820cdd60 T hubbub32_program_pstate_watermarks +ffffffff820ce1f0 T hubbub32_program_usr_watermarks +ffffffff820ce440 T hubbub32_force_usr_retraining_allow +ffffffff820ce4c0 T hubbub32_force_wm_propagate_to_pipes +ffffffff820ce560 T hubbub32_construct +ffffffff820ce5e0 t hubbub32_wm_read_state +ffffffff820ceaa0 t hubbub32_program_watermarks +ffffffff820cebb0 t hubbub32_init_watermarks +ffffffff820ceff0 t dcn32_program_compbuf_size +ffffffff820cf270 t dcn32_init_crb +ffffffff820d0000 T hubp32_update_force_pstate_disallow +ffffffff820d0090 T hubp32_update_mall_sel +ffffffff820d0120 T hubp32_prepare_subvp_buffering +ffffffff820d01c0 T hubp32_phantom_hubp_post_enable +ffffffff820d02d0 T hubp32_cursor_set_attributes +ffffffff820d0590 T hubp32_construct +ffffffff820d1000 T dcn32_dsc_pg_control +ffffffff820d1320 T dcn32_enable_power_gating_plane +ffffffff820d14c0 T dcn32_hubp_pg_control +ffffffff820d1730 T dcn32_apply_idle_power_optimizations +ffffffff820d19a0 t dcn32_calculate_cab_allocation +ffffffff820d1d50 T dcn32_commit_subvp_config +ffffffff820d1e00 T dcn32_subvp_pipe_control_lock +ffffffff820d1fd0 T dcn32_set_mcm_luts +ffffffff820d2160 T dcn32_set_input_transfer_func +ffffffff820d22a0 T dcn32_set_output_transfer_func +ffffffff820d24b0 T dcn32_subvp_update_force_pstate +ffffffff820d2600 T dcn32_update_mall_sel +ffffffff820d2770 T dcn32_program_mall_pipe_config +ffffffff820d2860 T dcn32_init_hw +ffffffff820d3020 T dcn32_update_odm +ffffffff820d3610 T dcn32_calculate_dccg_k1_k2_values +ffffffff820d3810 T dcn32_is_dp_dig_pixel_rate_div_policy +ffffffff820d38a0 T dcn32_set_pixels_per_cycle +ffffffff820d39e0 T dcn32_unblank_stream +ffffffff820d3bc0 T dcn32_disable_link_output +ffffffff820d3e90 T dcn32_update_phantom_vp_position +ffffffff820d3fa0 T dcn32_dsc_pg_status +ffffffff820d4080 T dcn32_update_dsc_pg +ffffffff820d5000 T dcn32_hw_sequencer_init_functions +ffffffff820d6000 t mmhubbub32_warmup_mcif +ffffffff820d6210 t mmhubbub32_config_mcif_buf +ffffffff820d66c0 t mmhubbub32_config_mcif_arb +ffffffff820d6ad0 T dcn32_mmhubbub_construct +ffffffff820d7000 t mpc32_mpc_init +ffffffff820d71e0 t mpc32_program_post1dlut +ffffffff820d7cf0 t mpc32_program_shaper +ffffffff820d9f80 t mpc32_program_3dlut +ffffffff820da950 T dcn32_mpc_construct +ffffffff820daa10 t mpc32_power_on_shaper_3dlut +ffffffff820dac40 t mpc32_set3dlut_ram12 +ffffffff820db000 T optc32_set_h_timing_div_manual_mode +ffffffff820db040 T dcn32_timing_generator_init +ffffffff820db0b0 t optc32_enable_crtc +ffffffff820db1b0 t optc32_disable_crtc +ffffffff820db290 t optc32_phantom_crtc_post_enable +ffffffff820db350 t optc32_disable_phantom_otg +ffffffff820db390 t optc32_set_drr +ffffffff820db5e0 t optc32_set_odm_bypass +ffffffff820db750 t optc32_set_odm_combine +ffffffff820dc000 T dcn32_panel_cntl_create +ffffffff820dc070 T dcn32_acquire_post_bldn_3dlut +ffffffff820dc160 T dcn32_release_post_bldn_3dlut +ffffffff820dc210 T dcn32_retain_phantom_pipes +ffffffff820dc2f0 T dcn32_remove_phantom_pipes +ffffffff820dc440 T dcn32_add_phantom_pipes +ffffffff820dc870 T dcn32_validate_bandwidth +ffffffff820dcd50 T dcn32_populate_dml_pipes_from_context +ffffffff820dd140 T dcn32_calculate_wm_and_dlg +ffffffff820dd1b0 T dcn32_create_resource_pool +ffffffff820dd260 t dcn32_resource_construct +ffffffff820e8800 T dcn32_acquire_idle_pipe_for_head_pipe_in_layer +ffffffff820e8a30 T dcn32_calc_num_avail_chans_for_mall +ffffffff820e8aa0 t dcn32_mpc_create +ffffffff820ed110 t dcn32_dwbc_create +ffffffff820edb40 t dcn32_mmhubbub_create +ffffffff820ee020 t dcn32_resource_destruct +ffffffff820ee690 t dcn32_destroy_resource_pool +ffffffff820ee6f0 t dcn32_link_encoder_create +ffffffff820ef7c0 t dcn32_update_bw_bounding_box +ffffffff820ef810 t read_dce_straps +ffffffff820ef840 t dcn32_create_audio +ffffffff820efbe0 t dcn32_stream_encoder_create +ffffffff820f1a70 t dcn32_hpo_dp_stream_encoder_create +ffffffff820f2870 t dcn32_hpo_dp_link_encoder_create +ffffffff820f2cf0 t dcn32_hwseq_create +ffffffff820f31e0 t dcn32_vpg_create +ffffffff820f4000 T dcn32_helper_calculate_num_ways_for_subvp +ffffffff820f4190 T dcn32_merge_pipes_for_subvp +ffffffff820f4350 T dcn32_all_pipes_have_stream_and_plane +ffffffff820f43e0 T dcn32_subvp_in_use +ffffffff820f4470 T dcn32_mpo_in_use +ffffffff820f44e0 T dcn32_any_surfaces_rotated +ffffffff820f4570 T dcn32_determine_det_override +ffffffff820f48b0 T dcn32_set_det_allocations +ffffffff820f4a30 T dcn32_save_mall_state +ffffffff820f4ae0 T dcn32_restore_mall_state +ffffffff820f5000 T dcn321_link_encoder_construct +ffffffff820f6000 T dcn321_create_resource_pool +ffffffff820f60b0 t dcn321_resource_construct +ffffffff821015f0 t dcn321_mpc_create +ffffffff82105c60 t dcn321_dwbc_create +ffffffff82106690 t dcn321_mmhubbub_create +ffffffff82106b70 t dcn321_resource_destruct +ffffffff821071e0 t dcn321_destroy_resource_pool +ffffffff82107240 t dcn321_link_encoder_create +ffffffff82108310 t dcn321_update_bw_bounding_box +ffffffff82108360 t read_dce_straps +ffffffff82108390 t dcn321_create_audio +ffffffff82108730 t dcn321_stream_encoder_create +ffffffff8210a5c0 t dcn321_hpo_dp_stream_encoder_create +ffffffff8210b3c0 t dcn321_hpo_dp_link_encoder_create +ffffffff8210b840 t dcn321_hwseq_create +ffffffff8210bd30 t dcn321_vpg_create +ffffffff8210d000 T bw_int_to_fixed_nonconst +ffffffff8210d090 T bw_frc_to_fixed +ffffffff8210d260 T bw_floor2 +ffffffff8210d310 T bw_ceil2 +ffffffff8210d390 T bw_mul +ffffffff8210e000 T convert_to_custom_float_format +ffffffff8210f000 T bw_calcs_init +ffffffff8210fe60 T bw_calcs +ffffffff82111800 t calculate_bandwidth +ffffffff82119000 T scaler_settings_calculation +ffffffff82119350 T mode_support_and_system_configuration +ffffffff8211f180 T display_pipe_configuration +ffffffff8211fab0 T dispclkdppclkdcfclk_deep_sleep_prefetch_parameters_watermarks_and_performance_calculation +ffffffff82125000 T dcn_bw_mod +ffffffff82125060 T dcn_bw_min2 +ffffffff821250a0 T dcn_bw_max +ffffffff821250d0 T dcn_bw_max2 +ffffffff82125110 T dcn_bw_floor2 +ffffffff821251b0 T dcn_bw_floor +ffffffff821251e0 T dcn_bw_ceil +ffffffff82125220 T dcn_bw_ceil2 +ffffffff821252d0 T dcn_bw_max3 +ffffffff82125350 T dcn_bw_max5 +ffffffff82125490 T dcn_bw_pow +ffffffff82125520 T dcn_bw_fabs +ffffffff82125560 T dcn_bw_log +ffffffff82126000 T swizzle_mode_to_macro_tile_size +ffffffff82126090 T dcn_validate_bandwidth +ffffffff82128300 T dcn_bw_sync_calcs_and_dml +ffffffff82128550 t dcn_bw_calc_rq_dlg_ttu +ffffffff82128d20 T dcn_find_dcfclk_suits_all +ffffffff82129180 T dcn_bw_update_from_pplib_fclks +ffffffff82129300 T dcn_bw_update_from_pplib_dcfclks +ffffffff821293d0 T dcn_get_soc_clks +ffffffff82129450 T dcn_bw_notify_pplib_of_wm_ranges +ffffffff8212a000 T dcn20_populate_dml_writeback_from_context +ffffffff8212a180 T dcn20_fpu_set_wb_arb_params +ffffffff8212a330 T dcn20_calculate_dlg_params +ffffffff8212ab00 T dcn20_populate_dml_pipes_from_context +ffffffff8212b9a0 T dcn20_calculate_wm +ffffffff8212c190 T dcn20_update_bounding_box +ffffffff8212c410 T dcn20_cap_soc_clocks +ffffffff8212c770 T dcn20_patch_bounding_box +ffffffff8212c8e0 T dcn20_validate_bandwidth_fp +ffffffff8212ca80 t dcn20_validate_bandwidth_internal +ffffffff8212ce80 T dcn20_fpu_set_wm_ranges +ffffffff8212cf20 T dcn20_fpu_adjust_dppclk +ffffffff8212cfc0 T dcn21_populate_dml_pipes_from_context +ffffffff8212d0d0 T dcn21_validate_bandwidth_fp +ffffffff8212db50 T dcn21_update_bw_bounding_box +ffffffff8212df60 T dcn21_clk_mgr_set_bw_params_wm_table +ffffffff8212dfc0 T dcn201_populate_dml_writeback_from_context_fpu +ffffffff8212e2c0 t calculate_wm_set_for_vlevel +ffffffff8212f000 T dml20_recalculate +ffffffff8212f740 t dml20_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation +ffffffff82134bf0 T dml20_ModeSupportAndSystemConfigurationFull +ffffffff8213bfc0 t TruncToValidBPP +ffffffff8213c1a0 t CalculateVMAndRowBytes +ffffffff8213c860 t CalculatePrefetchSourceLines +ffffffff8213ca30 t CalculateWriteBackDelay +ffffffff8213cd00 t CalculatePrefetchSchedule +ffffffff8213dbb0 t CalculateFlipSchedule +ffffffff8213df80 t adjust_ReturnBW +ffffffff8213f000 T dml20v2_recalculate +ffffffff8213f740 t dml20v2_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation +ffffffff82144d80 T dml20v2_ModeSupportAndSystemConfigurationFull +ffffffff8214c060 t TruncToValidBPP +ffffffff8214c5f0 t CalculateVMAndRowBytes +ffffffff8214ccb0 t CalculatePrefetchSourceLines +ffffffff8214ce80 t CalculateWriteBackDelay +ffffffff8214d150 t CalculateDelayAfterScaler +ffffffff8214d4b0 t CalculatePrefetchSchedule +ffffffff8214e1d0 t CalculateFlipSchedule +ffffffff8214e5a0 t adjust_ReturnBW +ffffffff8214f000 T dml20_rq_dlg_get_rq_reg +ffffffff8214f490 t dml20_rq_dlg_get_rq_params +ffffffff8214f660 T dml20_rq_dlg_get_dlg_reg +ffffffff82151550 t get_surf_rq_param +ffffffff82151db0 t calculate_ttu_cursor +ffffffff82153000 T dml20v2_rq_dlg_get_rq_reg +ffffffff82153490 t dml20v2_rq_dlg_get_rq_params +ffffffff82153660 T dml20v2_rq_dlg_get_dlg_reg +ffffffff82155560 t get_surf_rq_param +ffffffff82155dc0 t calculate_ttu_cursor +ffffffff82157000 T dml21_recalculate +ffffffff82157710 t DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation +ffffffff8215cef0 T dml21_ModeSupportAndSystemConfigurationFull +ffffffff821632d0 t TruncToValidBPP +ffffffff82163860 t CalculateDCFCLKDeepSleep +ffffffff82163ba0 t CalculateVMAndRowBytes +ffffffff82164400 t CalculatePrefetchSourceLines +ffffffff821645d0 t CalculateWriteBackDelay +ffffffff821648a0 t CalculatePrefetchSchedulePerPlane +ffffffff821650c0 t CalculateUrgentBurstFactor +ffffffff821654d0 t CalculateFlipSchedule +ffffffff821659b0 t CalculateWatermarksAndDRAMSpeedChangeSupport +ffffffff821669a0 t CalculatePrefetchSchedule +ffffffff82169000 T dml21_rq_dlg_get_rq_reg +ffffffff82169490 t dml_rq_dlg_get_rq_params +ffffffff82169660 T dml21_rq_dlg_get_dlg_reg +ffffffff8216b930 t get_surf_rq_param +ffffffff8216c250 t calculate_ttu_cursor +ffffffff8216d000 T optc3_fpu_set_vrr_m_const +ffffffff8216d4a0 T dcn30_fpu_populate_dml_writeback_from_context +ffffffff8216d7b0 T dcn30_fpu_set_mcif_arb_params +ffffffff8216d920 T dcn30_fpu_update_soc_for_wm_a +ffffffff8216d9f0 T dcn30_fpu_calculate_wm_and_dlg +ffffffff8216e300 T dcn30_fpu_update_dram_channel_width_bytes +ffffffff8216e360 T dcn30_fpu_update_max_clk +ffffffff8216e410 T dcn30_fpu_get_optimal_dcfclk_fclk_for_uclk +ffffffff8216e510 T dcn30_fpu_update_bw_bounding_box +ffffffff8216e6f0 T dcn30_find_dummy_latency_index_for_fw_based_mclk_switch +ffffffff8216e8d0 T dcn3_fpu_build_wm_range_table +ffffffff8216ebb0 T patch_dcn30_soc_bounding_box +ffffffff8216f000 T dml30_recalculate +ffffffff8216f5f0 t DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation +ffffffff821760e0 T dml30_CalculateBytePerPixelAnd256BBlockSizes +ffffffff82176350 T dml30_CalculateWriteBackDISPCLK +ffffffff821764c0 t dml_max3 +ffffffff82176520 T dml30_ModeSupportAndSystemConfigurationFull +ffffffff8217df80 t CalculateSwathAndDETConfiguration +ffffffff8217e680 t TruncToValidBPP +ffffffff8217e8e0 t CalculateVMAndRowBytes +ffffffff8217ef50 t CalculatePrefetchSourceLines +ffffffff8217f120 t CalculateUrgentBurstFactor +ffffffff8217f3b0 t CalculateDCFCLKDeepSleep +ffffffff8217f6d0 t UseMinimumDCFCLK +ffffffff821809f0 t CalculatePrefetchSchedule +ffffffff82181e90 t CalculateFlipSchedule +ffffffff82182390 t CalculateWatermarksAndDRAMSpeedChangeSupport +ffffffff821830d0 t CalculateSwathWidth +ffffffff82184000 T dml30_rq_dlg_get_rq_reg +ffffffff821844b0 t dml_rq_dlg_get_rq_params +ffffffff82184740 T dml30_rq_dlg_get_dlg_reg +ffffffff82186e20 t get_surf_rq_param +ffffffff821877b0 t calculate_ttu_cursor +ffffffff82188000 T dcn301_update_bw_bounding_box +ffffffff821882f0 T dcn301_fpu_set_wm_ranges +ffffffff82188390 T dcn301_fpu_init_soc_bounding_box +ffffffff82188430 T dcn301_calculate_wm_and_dlg_fp +ffffffff82188760 t calculate_wm_set_for_vlevel +ffffffff82189000 T dcn302_fpu_update_bw_bounding_box +ffffffff82189ae0 T dcn302_fpu_init_soc_bounding_box +ffffffff8218a000 T dcn303_fpu_update_bw_bounding_box +ffffffff8218ab40 T dcn303_fpu_init_soc_bounding_box +ffffffff8218b000 T dcn31_zero_pipe_dcc_fraction +ffffffff8218b060 T dcn31_update_soc_for_wm_a +ffffffff8218b110 T dcn315_update_soc_for_wm_a +ffffffff8218b1e0 T dcn31_calculate_wm_and_dlg_fp +ffffffff8218b840 T dcn31_update_bw_bounding_box +ffffffff8218bc00 T dcn315_update_bw_bounding_box +ffffffff8218bf00 T dcn316_update_bw_bounding_box +ffffffff8218c2e0 T dcn_get_max_non_odm_pix_rate_100hz +ffffffff8218c340 T dcn_get_approx_det_segs_required_for_pstate +ffffffff8218d000 T dml31_recalculate +ffffffff8218d2d0 t DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation +ffffffff821941f0 T dml31_CalculateWriteBackDISPCLK +ffffffff82194360 t dml_max3 +ffffffff821943c0 T dml31_ModeSupportAndSystemConfigurationFull +ffffffff8219d2a0 t CalculateSwathAndDETConfiguration +ffffffff8219d900 t TruncToValidBPP +ffffffff8219db50 t CalculateDCFCLKDeepSleep +ffffffff8219de70 t CalculateVMAndRowBytes +ffffffff8219e4b0 t CalculatePrefetchSourceLines +ffffffff8219e680 t CalculateUrgentBurstFactor +ffffffff8219e910 t CalculatePrefetchSchedulePerPlane +ffffffff8219f050 t CalculateFlipSchedule +ffffffff8219f5d0 t CalculateWatermarksAndDRAMSpeedChangeSupport +ffffffff821a01f0 t CalculateSwathWidth +ffffffff821a0700 t CalculatePrefetchSchedule +ffffffff821a1ba0 t CalculateVupdateAndDynamicMetadataParameters +ffffffff821a2000 T dml31_rq_dlg_get_rq_reg +ffffffff821a24b0 t dml_rq_dlg_get_rq_params +ffffffff821a2740 T dml31_rq_dlg_get_dlg_reg +ffffffff821a5150 t get_surf_rq_param +ffffffff821a6000 T dcn314_update_bw_bounding_box_fpu +ffffffff821a6450 T dcn314_populate_dml_pipes_from_context_fpu +ffffffff821a7000 T dml314_recalculate +ffffffff821a7270 t DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation +ffffffff821ae0a0 T dml314_CalculateWriteBackDISPCLK +ffffffff821ae210 t dml_max3 +ffffffff821ae270 T dml314_ModeSupportAndSystemConfigurationFull +ffffffff821b6fb0 t CalculateBytePerPixelAnd256BBlockSizes +ffffffff821b7220 t CalculateSwathAndDETConfiguration +ffffffff821b7860 t TruncToValidBPP +ffffffff821b7ab0 t CalculateDCFCLKDeepSleep +ffffffff821b7dd0 t CalculateVMAndRowBytes +ffffffff821b8410 t CalculatePrefetchSourceLines +ffffffff821b85e0 t CalculateUrgentBurstFactor +ffffffff821b8870 t CalculateMaxVStartup +ffffffff821b89b0 t CalculatePrefetchSchedulePerPlane +ffffffff821b90f0 t CalculateFlipSchedule +ffffffff821b9670 t CalculateWatermarksAndDRAMSpeedChangeSupport +ffffffff821ba290 t CalculateSwathWidth +ffffffff821ba7a0 t CalculatePrefetchSchedule +ffffffff821bbc40 t CalculateVupdateAndDynamicMetadataParameters +ffffffff821bc000 T dml314_rq_dlg_get_rq_reg +ffffffff821bc4b0 t dml_rq_dlg_get_rq_params +ffffffff821bc740 T dml314_rq_dlg_get_dlg_reg +ffffffff821bf160 t get_surf_rq_param +ffffffff821c0000 T dcn32_build_wm_range_table_fpu +ffffffff821c0390 T dcn32_find_dummy_latency_index_for_fw_based_mclk_switch +ffffffff821c05c0 T dcn32_internal_validate_bw +ffffffff821c2210 T dcn32_helper_populate_phantom_dlg_params +ffffffff821c23b0 T dcn32_predict_pipe_split +ffffffff821c25e0 T insert_entry_into_table_sorted +ffffffff821c2a30 T dcn32_set_phantom_stream_timing +ffffffff821c2cd0 t dcn32_split_stream_for_mpc_or_odm +ffffffff821c3080 T dcn32_calculate_wm_and_dlg_fpu +ffffffff821c4610 T dcn32_patch_dpm_table +ffffffff821c4820 T dcn32_update_bw_bounding_box_fpu +ffffffff821c5fb0 T dcn32_zero_pipe_dcc_fraction +ffffffff821c6010 T dcn32_allow_subvp_with_active_margin +ffffffff821c60e0 t subvp_drr_schedulable +ffffffff821c7000 T dml32_recalculate +ffffffff821cb300 T dml32_ModeSupportAndSystemConfigurationFull +ffffffff821d3000 T dml32_dscceComputeDelay +ffffffff821d3140 T dml32_dscComputeDelay +ffffffff821d3180 T IsVertical +ffffffff821d31b0 T dml32_CalculateSinglePipeDPPCLKAndSCLThroughput +ffffffff821d34d0 t dml_max3 +ffffffff821d3530 T dml32_CalculateBytePerPixelAndBlockSizes +ffffffff821d3860 T dml32_CalculateSwathAndDETConfiguration +ffffffff821d4090 T dml32_CalculateSwathWidth +ffffffff821d4950 T dml32_UnboundedRequest +ffffffff821d49c0 T dml32_CalculateDETBufferSize +ffffffff821d5000 T dml32_CalculateODMMode +ffffffff821d5780 T dml32_CalculateRequiredDispclk +ffffffff821d5940 T dml32_RoundToDFSGranularity +ffffffff821d59d0 T dml32_CalculateOutputLink +ffffffff821d6440 T dml32_TruncToValidBPP +ffffffff821d6780 T dml32_CalculateDPPCLK +ffffffff821d6920 T dml32_RequiredDTBCLK +ffffffff821d6b70 t dml_max4 +ffffffff821d6bf0 T dml32_DSCDelayRequirement +ffffffff821d70b0 T dml32_CalculateSurfaceSizeInMall +ffffffff821d7b70 T dml32_CalculateVMRowAndSwath +ffffffff821d8980 T dml32_CalculateVMAndRowBytes +ffffffff821d95d0 T dml32_CalculatePrefetchSourceLines +ffffffff821d9820 T dml32_CalculateMALLUseForStaticScreen +ffffffff821d9960 T dml32_CalculateRowBandwidth +ffffffff821d9ac0 T dml32_CalculateUrgentLatency +ffffffff821d9b70 T dml32_CalculateUrgentBurstFactor +ffffffff821d9e20 T dml32_CalculateDCFCLKDeepSleep +ffffffff821da170 T dml32_CalculateWriteBackDelay +ffffffff821da2d0 T dml32_UseMinimumDCFCLK +ffffffff821db340 T dml32_CalculateExtraLatencyBytes +ffffffff821db500 T dml32_CalculateTWait +ffffffff821db5f0 T dml32_CalculateVUpdateAndDynamicMetadataParameters +ffffffff821db850 T dml32_get_return_bw_mbps +ffffffff821dba10 T dml32_get_return_bw_mbps_vm_only +ffffffff821dbaf0 T dml32_CalculateExtraLatency +ffffffff821dbd10 T dml32_CalculatePrefetchSchedule +ffffffff821dd2e0 T dml32_CalculateFlipSchedule +ffffffff821dd840 T dml32_CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport +ffffffff821de960 T dml32_CalculateWriteBackDISPCLK +ffffffff821deb30 T dml32_CalculateMinAndMaxPrefetchMode +ffffffff821deb70 T dml32_CalculatePixelDeliveryTimes +ffffffff821deff0 T dml32_CalculateMetaAndPTETimes +ffffffff821df750 T dml32_CalculateVMGroupAndRequestTimes +ffffffff821dfc90 T dml32_CalculateDCCConfiguration +ffffffff821e02a0 T dml32_CalculateStutterEfficiency +ffffffff821e11c0 T dml32_CalculateMaxDETAndMinCompressedBufferSize +ffffffff821e12b0 T dml32_CalculateVActiveBandwithSupport +ffffffff821e1420 T dml32_CalculatePrefetchBandwithSupport +ffffffff821e16b0 T dml32_CalculateBandwidthAvailableForImmediateFlip +ffffffff821e1800 T dml32_CalculateImmediateFlipBandwithSupport +ffffffff821e1a80 T dml32_CalculateDETSwathFillLatencyHiding +ffffffff821e2000 T dml32_rq_dlg_get_rq_reg +ffffffff821e26a0 T dml32_rq_dlg_get_dlg_reg +ffffffff821e5000 T dcn321_insert_entry_into_table_sorted +ffffffff821e5450 T dcn321_update_bw_bounding_box_fpu +ffffffff821e7000 T dml_init_instance +ffffffff821e7310 T dml_get_status_message +ffffffff821e7350 T dml_log_pipe_params +ffffffff821e7380 T dml_log_mode_support_params +ffffffff821e8000 T dml_get_voltage_level +ffffffff821e8240 t fetch_socbb_params +ffffffff821e8720 t fetch_ip_params +ffffffff821e8bc0 t fetch_pipe_params +ffffffff821e9c40 T PixelClockAdjustmentForProgressiveToInterlaceUnit +ffffffff821e9cc0 T get_clk_dcf_deepsleep +ffffffff821e9dd0 T get_wm_urgent +ffffffff821e9ee0 T get_wm_memory_trip +ffffffff821e9ff0 T get_wm_writeback_urgent +ffffffff821ea100 T get_wm_stutter_exit +ffffffff821ea210 T get_wm_stutter_enter_exit +ffffffff821ea320 T get_wm_z8_stutter_exit +ffffffff821ea430 T get_wm_z8_stutter_enter_exit +ffffffff821ea540 T get_stutter_efficiency_z8 +ffffffff821ea650 T get_stutter_num_bursts_z8 +ffffffff821ea760 T get_wm_dram_clock_change +ffffffff821ea870 T get_wm_writeback_dram_clock_change +ffffffff821ea980 T get_stutter_efficiency +ffffffff821eaa90 T get_stutter_efficiency_no_vblank +ffffffff821eaba0 T get_stutter_period +ffffffff821eacb0 T get_urgent_latency +ffffffff821eadc0 T get_urgent_extra_latency +ffffffff821eaed0 T get_nonurgent_latency +ffffffff821eafe0 T get_dram_clock_change_latency +ffffffff821eb0f0 T get_dispclk_calculated +ffffffff821eb200 T get_total_data_read_bw +ffffffff821eb310 T get_return_bw +ffffffff821eb420 T get_tcalc +ffffffff821eb530 T get_fraction_of_urgent_bandwidth +ffffffff821eb640 T get_fraction_of_urgent_bandwidth_imm_flip +ffffffff821eb750 T get_cstate_max_cap_mode +ffffffff821eb870 T get_comp_buffer_size_kbytes +ffffffff821eb980 T get_pixel_chunk_size_in_kbyte +ffffffff821ebaa0 T get_alpha_pixel_chunk_size_in_kbyte +ffffffff821ebbc0 T get_meta_chunk_size_in_kbyte +ffffffff821ebce0 T get_min_pixel_chunk_size_in_byte +ffffffff821ebdf0 T get_min_meta_chunk_size_in_byte +ffffffff821ebf10 T get_fclk_watermark +ffffffff821ec020 T get_usr_retraining_watermark +ffffffff821ec130 T get_comp_buffer_reserved_space_kbytes +ffffffff821ec250 T get_comp_buffer_reserved_space_64bytes +ffffffff821ec370 T get_comp_buffer_reserved_space_zs +ffffffff821ec490 T get_unbounded_request_enabled +ffffffff821ec5b0 T get_dsc_delay +ffffffff821ec6e0 T get_dppclk_calculated +ffffffff821ec800 T get_dscclk_calculated +ffffffff821ec920 T get_min_ttu_vblank +ffffffff821eca40 T get_min_ttu_vblank_in_us +ffffffff821ecb60 T get_vratio_prefetch_l +ffffffff821ecc80 T get_vratio_prefetch_c +ffffffff821ecda0 T get_dst_x_after_scaler +ffffffff821ecec0 T get_dst_y_after_scaler +ffffffff821ecfe0 T get_dst_y_per_vm_vblank +ffffffff821ed100 T get_dst_y_per_row_vblank +ffffffff821ed220 T get_dst_y_prefetch +ffffffff821ed340 T get_dst_y_per_vm_flip +ffffffff821ed460 T get_dst_y_per_row_flip +ffffffff821ed580 T get_refcyc_per_vm_group_vblank +ffffffff821ed6a0 T get_refcyc_per_vm_group_flip +ffffffff821ed7c0 T get_refcyc_per_vm_req_vblank +ffffffff821ed8e0 T get_refcyc_per_vm_req_flip +ffffffff821eda00 T get_refcyc_per_vm_group_vblank_in_us +ffffffff821edb20 T get_refcyc_per_vm_group_flip_in_us +ffffffff821edc40 T get_refcyc_per_vm_req_vblank_in_us +ffffffff821edd60 T get_refcyc_per_vm_req_flip_in_us +ffffffff821ede80 T get_refcyc_per_vm_dmdata_in_us +ffffffff821edfa0 T get_dmdata_dl_delta_in_us +ffffffff821ee0c0 T get_refcyc_per_line_delivery_l_in_us +ffffffff821ee1e0 T get_refcyc_per_line_delivery_c_in_us +ffffffff821ee300 T get_refcyc_per_line_delivery_pre_l_in_us +ffffffff821ee420 T get_refcyc_per_line_delivery_pre_c_in_us +ffffffff821ee540 T get_refcyc_per_req_delivery_l_in_us +ffffffff821ee660 T get_refcyc_per_req_delivery_c_in_us +ffffffff821ee780 T get_refcyc_per_req_delivery_pre_l_in_us +ffffffff821ee8a0 T get_refcyc_per_req_delivery_pre_c_in_us +ffffffff821ee9c0 T get_refcyc_per_cursor_req_delivery_in_us +ffffffff821eeae0 T get_refcyc_per_cursor_req_delivery_pre_in_us +ffffffff821eec00 T get_refcyc_per_meta_chunk_nom_l_in_us +ffffffff821eed20 T get_refcyc_per_meta_chunk_nom_c_in_us +ffffffff821eee40 T get_refcyc_per_meta_chunk_vblank_l_in_us +ffffffff821eef60 T get_refcyc_per_meta_chunk_vblank_c_in_us +ffffffff821ef080 T get_refcyc_per_meta_chunk_flip_l_in_us +ffffffff821ef1a0 T get_refcyc_per_meta_chunk_flip_c_in_us +ffffffff821ef2c0 T get_vstartup +ffffffff821ef3f0 T get_vupdate_offset +ffffffff821ef520 T get_vupdate_width +ffffffff821ef640 T get_vready_offset +ffffffff821ef760 T get_vready_at_or_after_vsync +ffffffff821ef890 T get_min_dst_y_next_start +ffffffff821ef9c0 T get_dst_y_per_pte_row_nom_l +ffffffff821efae0 T get_dst_y_per_pte_row_nom_c +ffffffff821efc00 T get_dst_y_per_meta_row_nom_l +ffffffff821efd20 T get_dst_y_per_meta_row_nom_c +ffffffff821efe40 T get_refcyc_per_pte_group_nom_l_in_us +ffffffff821eff60 T get_refcyc_per_pte_group_nom_c_in_us +ffffffff821f0080 T get_refcyc_per_pte_group_vblank_l_in_us +ffffffff821f01a0 T get_refcyc_per_pte_group_vblank_c_in_us +ffffffff821f02c0 T get_refcyc_per_pte_group_flip_l_in_us +ffffffff821f03e0 T get_refcyc_per_pte_group_flip_c_in_us +ffffffff821f0500 T get_vstartup_calculated +ffffffff821f0630 T get_dpte_row_height_linear_c +ffffffff821f0760 T get_swath_height_l +ffffffff821f0890 T get_swath_height_c +ffffffff821f09c0 T get_det_stored_buffer_size_l_bytes +ffffffff821f0af0 T get_det_stored_buffer_size_c_bytes +ffffffff821f0c20 T get_dpte_group_size_in_bytes +ffffffff821f0d50 T get_vm_group_size_in_bytes +ffffffff821f0e80 T get_dpte_row_height_linear_l +ffffffff821f0fb0 T get_pte_buffer_mode +ffffffff821f10e0 T get_subviewport_lines_needed_in_mall +ffffffff821f1210 T get_total_immediate_flip_bytes +ffffffff821f1330 T get_total_immediate_flip_bw +ffffffff821f1510 T get_total_prefetch_bw +ffffffff821f16f0 T get_total_surface_size_in_mall_bytes +ffffffff821f1890 T get_det_buffer_size_kbytes +ffffffff821f19c0 T get_is_phantom_pipe +ffffffff821f1af0 T Calculate256BBlockSizes +ffffffff821f1be0 T CalculateMinAndMaxPrefetchMode +ffffffff821f1c60 T ModeSupportAndSystemConfiguration +ffffffff821f1f70 T CalculateWriteBackDISPCLK +ffffffff821f3000 T print__rq_params_st +ffffffff821f3030 T print__data_rq_sizing_params_st +ffffffff821f3060 T print__data_rq_dlg_params_st +ffffffff821f3090 T print__data_rq_misc_params_st +ffffffff821f30c0 T print__rq_dlg_params_st +ffffffff821f30f0 T print__dlg_sys_params_st +ffffffff821f3120 T print__data_rq_regs_st +ffffffff821f3150 T print__rq_regs_st +ffffffff821f3180 T print__dlg_regs_st +ffffffff821f31b0 T print__ttu_regs_st +ffffffff821f4000 T dml1_extract_rq_regs +ffffffff821f4330 T dml1_rq_dlg_get_rq_params +ffffffff821f4510 t get_surf_rq_param +ffffffff821f50c0 T dml1_rq_dlg_get_dlg_params +ffffffff821f8000 T _do_calc_rc_params +ffffffff821f8fc0 t get_qp_set +ffffffff821fa000 T dc_dsc_parse_dsc_dpcd +ffffffff821fa2a0 t dsc_throughput_from_dpcd +ffffffff821fa460 T dc_dsc_compute_bandwidth_range +ffffffff821fa630 t intersect_dsc_caps +ffffffff821fa800 t setup_dsc_config +ffffffff821faf80 T dc_dsc_compute_config +ffffffff821fb080 T dc_dsc_stream_bandwidth_in_kbps +ffffffff821fb1d0 T dc_dsc_stream_bandwidth_overhead_in_kbps +ffffffff821fb310 T dc_dsc_get_policy_for_timing +ffffffff821fb3b0 T dc_dsc_policy_set_max_target_bpp_limit +ffffffff821fb3e0 T dc_dsc_policy_set_enable_dsc_when_not_needed +ffffffff821fb410 T dc_dsc_policy_set_disable_dsc_stream_overhead +ffffffff821fb440 t decide_dsc_target_bpp_x16 +ffffffff821fc000 T calc_rc_params +ffffffff821fd000 T dscc_compute_dsc_parameters +ffffffff821fe000 T dal_hw_factory_dce110_init +ffffffff821fe060 t define_hpd_registers +ffffffff821fe0b0 t define_ddc_registers +ffffffff821ff000 T dal_hw_translate_dce110_init +ffffffff821ff030 t offset_to_id +ffffffff821ff390 t id_to_offset +ffffffff82200000 T dal_hw_factory_dce120_init +ffffffff82200060 t define_hpd_registers +ffffffff822000b0 t define_ddc_registers +ffffffff82201000 T dal_hw_translate_dce120_init +ffffffff82201030 t offset_to_id +ffffffff822013a0 t id_to_offset +ffffffff82202000 T dal_hw_factory_dce80_init +ffffffff82202060 t define_hpd_registers +ffffffff822020b0 t define_ddc_registers +ffffffff82203000 T dal_hw_translate_dce80_init +ffffffff82203030 t offset_to_id +ffffffff822037b0 t id_to_offset +ffffffff82204000 T dal_hw_factory_dcn10_init +ffffffff82204060 t define_hpd_registers +ffffffff822040b0 t define_ddc_registers +ffffffff82204150 t define_generic_registers +ffffffff82205000 T dal_hw_translate_dcn10_init +ffffffff82205030 t offset_to_id +ffffffff82205390 t id_to_offset +ffffffff82206000 T dal_hw_factory_dcn20_init +ffffffff82206060 t define_hpd_registers +ffffffff822060b0 t define_ddc_registers +ffffffff82206160 t define_generic_registers +ffffffff82207000 T dal_hw_translate_dcn20_init +ffffffff82207030 t offset_to_id +ffffffff822072b0 t id_to_offset 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dal_gpio_service_create_irq +ffffffff82211300 T dal_gpio_create_irq +ffffffff82211380 T dal_gpio_service_create_generic_mux +ffffffff82211420 T dal_gpio_destroy_generic_mux +ffffffff822114b0 T dal_gpio_get_generic_pin_info +ffffffff82211510 T dal_gpio_service_destroy +ffffffff82211640 T dal_mux_setup_config +ffffffff822116a0 T dal_gpio_service_lock +ffffffff82211720 T dal_gpio_service_unlock +ffffffff822117a0 T dal_gpio_service_open +ffffffff822119e0 T dal_gpio_service_close +ffffffff82211a80 T dal_irq_get_source +ffffffff82211af0 T dal_irq_get_rx_source +ffffffff82211b40 T dal_irq_setup_hpd_filter +ffffffff82211ba0 T dal_gpio_destroy_irq +ffffffff82211c30 T dal_gpio_create_ddc +ffffffff82211da0 T dal_gpio_destroy_ddc +ffffffff82211e70 T dal_ddc_close +ffffffff82211ec0 T dal_ddc_open +ffffffff82212020 T dal_ddc_change_mode +ffffffff822120c0 T dal_ddc_get_line +ffffffff822120e0 T dal_ddc_set_config +ffffffff82213000 T dal_hw_ddc_init +ffffffff82213100 T dal_hw_ddc_get_pin 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to_dal_irq_source_dcn303 +ffffffff82224000 T dal_irq_service_dcn31_create ffffffff82224080 t hpd_ack -ffffffff82224130 t to_dal_irq_source_dcn314 -ffffffff82225000 T dal_irq_service_dcn315_create +ffffffff82224130 t to_dal_irq_source_dcn31 +ffffffff82225000 T dal_irq_service_dcn314_create ffffffff82225080 t hpd_ack -ffffffff82225130 t to_dal_irq_source_dcn315 -ffffffff82226000 T dal_irq_service_dcn32_create +ffffffff82225130 t to_dal_irq_source_dcn314 +ffffffff82226000 T dal_irq_service_dcn315_create ffffffff82226080 t hpd_ack -ffffffff82226130 t to_dal_irq_source_dcn32 -ffffffff82227000 T dal_irq_service_construct -ffffffff82227070 T dal_irq_service_destroy -ffffffff82227100 T dal_irq_service_set_generic -ffffffff82227180 T dal_irq_service_set -ffffffff822272a0 T dal_irq_service_ack -ffffffff822273a0 T dal_irq_service_ack_generic -ffffffff82227410 T dal_irq_service_to_irq_source -ffffffff82228000 T dp_trace_init -ffffffff822280a0 T dp_trace_reset -ffffffff82228130 T dc_dp_trace_is_initialized -ffffffff82228160 T dp_trace_detect_lt_init -ffffffff822281b0 T dp_trace_commit_lt_init -ffffffff82228200 T dp_trace_link_loss_increment -ffffffff82228230 T dp_trace_lt_fail_count_update -ffffffff82228270 T dp_trace_lt_total_count_increment -ffffffff822282b0 T dc_dp_trace_set_is_logged_flag -ffffffff822282f0 T dc_dp_trace_is_logged -ffffffff82228330 T dp_trace_lt_result_update -ffffffff82228370 T dp_trace_set_lt_start_timestamp -ffffffff82228450 T dp_trace_set_lt_end_timestamp -ffffffff82228530 T dc_dp_trace_get_lt_end_timestamp -ffffffff82228570 T dc_dp_trace_get_lt_counts -ffffffff822285b0 T dc_dp_trace_get_link_loss_count -ffffffff822285e0 T dp_trace_set_edp_power_timestamp -ffffffff822286c0 T dp_trace_get_edp_poweron_timestamp -ffffffff822286f0 T dp_trace_get_edp_poweroff_timestamp -ffffffff82229000 T set_dio_throttled_vcp_size -ffffffff82229020 T setup_dio_stream_encoder -ffffffff822290e0 T reset_dio_stream_encoder -ffffffff822291a0 T setup_dio_stream_attribute -ffffffff82229320 T enable_dio_dp_link_output -ffffffff82229390 T disable_dio_link_output -ffffffff822293d0 T set_dio_dp_link_test_pattern -ffffffff82229410 T set_dio_dp_lane_settings -ffffffff82229450 T can_use_dio_link_hwss -ffffffff82229490 T get_dio_link_hwss -ffffffff822294c0 t update_dio_stream_allocation_table -ffffffff8222a000 T can_use_dpia_link_hwss -ffffffff8222a050 T get_dpia_link_hwss -ffffffff8222a080 t update_dpia_stream_allocation_table -ffffffff8222b000 T can_use_hpo_dp_link_hwss -ffffffff8222b030 T get_hpo_dp_link_hwss -ffffffff8222b060 t set_hpo_dp_hblank_min_symbol_width -ffffffff8222b130 t set_hpo_dp_throttled_vcp_size -ffffffff8222b160 t enable_hpo_dp_link_output -ffffffff8222b290 t set_hpo_dp_link_test_pattern -ffffffff8222b2d0 t set_hpo_dp_lane_settings -ffffffff8222b300 t update_hpo_dp_stream_allocation_table -ffffffff8222b320 t setup_hpo_dp_stream_encoder -ffffffff8222b490 t reset_hpo_dp_stream_encoder -ffffffff8222b580 t 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sdmmc_io_rw_direct -ffffffff8252eda0 T sdmmc_io_rw_extended_subr -ffffffff8252ef40 T sdmmc_io_rw_extended -ffffffff8252f340 T sdmmc_io_read_2 -ffffffff8252f4a0 T sdmmc_io_write_2 -ffffffff8252f600 T sdmmc_io_read_4 -ffffffff8252f760 T sdmmc_io_write_4 -ffffffff8252f8c0 T sdmmc_io_read_multi_1 -ffffffff8252f9b0 T sdmmc_io_write_multi_1 -ffffffff8252faa0 T sdmmc_io_read_region_1 -ffffffff8252fb90 T sdmmc_io_write_region_1 -ffffffff8252fc80 T sdmmc_io_xchg -ffffffff8252fe10 T sdmmc_intr_enable -ffffffff82530080 T sdmmc_intr_disable -ffffffff825302f0 T sdmmc_intr_establish -ffffffff825303f0 T sdmmc_intr_disestablish -ffffffff825304e0 T sdmmc_card_intr -ffffffff82530530 T sdmmc_intr_task -ffffffff825305c0 T sdmmc_io_set_blocklen -ffffffff82531000 T sdmmc_mem_enable -ffffffff82531450 T sdmmc_mem_send_op_cond -ffffffff82531600 T sdmmc_mem_signal_voltage -ffffffff825316c0 T sdmmc_mem_scan -ffffffff825319d0 T sdmmc_decode_csd -ffffffff82531e00 T sdmmc_decode_cid -ffffffff825322a0 T sdmmc_mem_send_scr -ffffffff825323e0 T sdmmc_mem_decode_scr -ffffffff82532440 T sdmmc_mem_send_cxd_data -ffffffff825325b0 T sdmmc_mem_set_bus_width -ffffffff825326c0 T sdmmc_mem_sd_switch -ffffffff82532970 T sdmmc_be512_to_bitfield512 -ffffffff82532a20 T sdmmc_mem_mmc_switch -ffffffff82532b10 T sdmmc_mem_init -ffffffff82532c60 T sdmmc_mem_set_blocklen -ffffffff82532d60 T sdmmc_mem_sd_init -ffffffff82533140 T sdmmc_mem_mmc_init -ffffffff82533800 T sdmmc_mem_select_transfer_mode -ffffffff82533880 T sdmmc_mem_execute_tuning -ffffffff82533910 T sdmmc_mem_read_block_subr -ffffffff82533c70 T sdmmc_mem_single_read_block -ffffffff82533d40 T sdmmc_mem_read_block -ffffffff82533ef0 T sdmmc_mem_write_block_subr -ffffffff82534240 T sdmmc_mem_single_write_block -ffffffff82534310 T sdmmc_mem_write_block -ffffffff825344c0 T sdmmc_mem_hibernate_write -ffffffff82535000 T sdmmc_scsi_cmd -ffffffff825351f0 T sdmmc_minphys -ffffffff82535270 T sdmmc_scsi_attach -ffffffff82535460 T sdmmc_alloc_ccbs -ffffffff825355a0 T sdmmc_free_ccbs -ffffffff82535600 T sdmmc_scsi_detach -ffffffff82535760 T sdmmc_stimeout -ffffffff825357e0 T sdmmc_ccb_alloc -ffffffff82535890 T sdmmc_ccb_free -ffffffff82535970 T sdmmc_inquiry -ffffffff82535be0 T sdmmc_start_xs -ffffffff82535cd0 T sdmmc_complete_xs -ffffffff82535da0 T sdmmc_done_xs -ffffffff82535df0 T sdmmc_scsi_hibernate_io -ffffffff82536000 T bwfm_sdio_preinit -ffffffff825364a0 T bwfm_sdio_txcheck -ffffffff825364e0 T bwfm_sdio_txdata -ffffffff82536550 T bwfm_sdio_txctl -ffffffff825366a0 T bwfm_sdio_buscore_read -ffffffff825366b0 T bwfm_sdio_buscore_write -ffffffff825366d0 T bwfm_sdio_buscore_prepare -ffffffff82536810 T bwfm_sdio_buscore_activate -ffffffff82536890 T bwfm_sdio_match -ffffffff82536940 T bwfm_sdio_attach -ffffffff82536c00 T bwfm_sdio_detach -ffffffff82536c60 T bwfm_sdio_task -ffffffff82536dc0 T bwfm_sdio_write_1 -ffffffff82536df0 T bwfm_sdio_read_1 -ffffffff82536e20 T bwfm_sdio_write_4 -ffffffff82536ed0 T bwfm_sdio_read_4 -ffffffff82536f80 T bwfm_sdio_load_microcode -ffffffff825371e0 T bwfm_sdio_clkctl -ffffffff82537310 T bwfm_sdio_dev_write -ffffffff82537360 T bwfm_sdio_intr -ffffffff825373a0 T bwfm_sdio_ram_read_write -ffffffff825375d0 T bwfm_sdio_htclk -ffffffff82537840 T bwfm_sdio_readshared -ffffffff82537910 T bwfm_sdio_dev_read -ffffffff82537950 T bwfm_sdio_rx_frames -ffffffff82537d00 T bwfm_sdio_tx_frames -ffffffff82537e00 T bwfm_sdio_backplane -ffffffff82537eb0 T bwfm_sdio_buf_read -ffffffff82537f90 T bwfm_sdio_buf_write -ffffffff82538040 T bwfm_sdio_frame_read_write -ffffffff825381c0 T bwfm_sdio_newbuf -ffffffff82538240 T bwfm_sdio_tx_ok -ffffffff825382a0 T bwfm_sdio_tx_ctrlframe -ffffffff825383a0 T bwfm_sdio_tx_dataframe -ffffffff825384f0 T bwfm_sdio_rx_glom -ffffffff82539000 T onewire_match -ffffffff82539050 T onewire_attach -ffffffff825390f0 T onewire_detach -ffffffff82539160 T onewire_activate -ffffffff82539180 T onewire_scan -ffffffff825393a0 T onewire_createthread -ffffffff82539410 T onewire_print -ffffffff825394e0 T onewirebus_print -ffffffff82539530 T onewire_lock -ffffffff82539550 T onewire_unlock -ffffffff82539570 T onewire_reset -ffffffff82539590 T onewire_bit -ffffffff825395b0 T onewire_read_byte -ffffffff825396f0 T onewire_write_byte -ffffffff825397d0 T onewire_read_block -ffffffff82539870 T onewire_write_block -ffffffff82539910 T onewire_triplet -ffffffff825399f0 T onewire_matchrom -ffffffff82539b40 T onewire_search -ffffffff82539ee0 T onewire_thread -ffffffff8253a000 T onewire_crc -ffffffff8253a0b0 T onewire_crc16 -ffffffff8253a170 T onewire_famname -ffffffff8253a1b0 T onewire_matchbyfam -ffffffff8253b000 T owid_match -ffffffff8253b030 T owid_attach -ffffffff8253b100 T owid_detach -ffffffff8253b140 T owid_activate -ffffffff8253c000 T owsbm_match -ffffffff8253c030 T owsbm_attach -ffffffff8253c1d0 T owsbm_detach -ffffffff8253c240 T owsbm_activate -ffffffff8253c270 T owsbm_update -ffffffff8253d000 T owtemp_match -ffffffff8253d030 T owtemp_attach -ffffffff8253d130 T owtemp_detach -ffffffff8253d1a0 T owtemp_activate -ffffffff8253d1d0 T owtemp_update -ffffffff8253e000 T owctr_match -ffffffff8253e030 T owctr_attach -ffffffff8253e180 T owctr_detach -ffffffff8253e1f0 T owctr_activate -ffffffff8253e220 T owctr_update -ffffffff8253e250 T owctr_update_counter -ffffffff8253f000 A __text_page_start -ffffffff8253f000 T Xsyscall_meltdown -ffffffff8253f00c T Xsyscall -ffffffff8253f26e t Xsyscall_trampback -ffffffff8253f280 T intr_user_exit -ffffffff8253f2c2 t intr_user_exit_post_ast -ffffffff8253f3ee t Xiretq_trampback -ffffffff8253f3fa T doreti_iret -ffffffff82540000 T alltraps -ffffffff82540138 T recall_trap -ffffffff82540150 T alltraps_kern -ffffffff82540153 T alltraps_kern_meltdown -ffffffff82541000 ? Xsyscall32 -ffffffff82541000 A __kutext_start -ffffffff82541000 A __text_page_end -ffffffff82542000 ? Xtrap00 -ffffffff82542010 ? Xtrap01 -ffffffff82542020 ? Xtrap02 -ffffffff82542028 c calltrap_specstk -ffffffff825420f0 ? calltrap_specstk_tramp -ffffffff82542110 ? Xtrap03 -ffffffff82542120 ? Xtrap04 -ffffffff82542130 ? Xtrap05 -ffffffff82542140 ? Xtrap06 -ffffffff82542150 ? Xtrap07 -ffffffff82542160 ? Xtrap08 -ffffffff82542170 ? Xtrap09 -ffffffff82542180 ? Xtrap0a -ffffffff82542190 ? Xtrap0b -ffffffff825421a0 ? Xtrap0c -ffffffff825421b0 ? Xtrap0d -ffffffff82542240 ? Xtrap0e -ffffffff82542250 ? Xintrspurious -ffffffff82542250 ? Xtrap0f -ffffffff82542260 ? Xtrap10 -ffffffff82542270 ? Xtrap11 -ffffffff82542280 ? Xtrap12 -ffffffff82542290 ? Xtrap13 -ffffffff825422a0 ? Xtrap14 -ffffffff825422b0 ? Xtrap15 -ffffffff825422c0 ? Xtrap16 -ffffffff825422c0 ? Xtrap17 -ffffffff825422c0 ? Xtrap18 -ffffffff825422c0 ? Xtrap19 -ffffffff825422c0 ? Xtrap1a -ffffffff825422c0 ? Xtrap1b -ffffffff825422c0 ? Xtrap1c -ffffffff825422c0 ? Xtrap1d -ffffffff825422c0 ? Xtrap1e -ffffffff825422c0 ? Xtrap1f -ffffffff825422d0 ? x2apic_eoi -ffffffff825422f0 ? Xintr_lapic_ipi -ffffffff82542330 ? Xipi_invltlb -ffffffff82542360 ? Xipi_invlpg -ffffffff82542390 ? Xipi_invlrange -ffffffff825423d0 ? Xipi_invltlb_pcid -ffffffff82542410 ? Xipi_invlpg_pcid -ffffffff82542460 ? Xipi_invlrange_pcid -ffffffff825424d0 ? Xintr_lapic_ltimer -ffffffff82542510 ? Xintr_xen_upcall -ffffffff82542550 ? Xintr_hyperv_upcall -ffffffff82542590 ? Xintr_legacy0 -ffffffff825425d0 ? Xintr_legacy1 -ffffffff82542610 ? Xintr_legacy2 -ffffffff82542650 ? Xintr_legacy3 -ffffffff82542690 ? Xintr_legacy4 -ffffffff825426d0 ? Xintr_legacy5 -ffffffff82542710 ? Xintr_legacy6 -ffffffff82542750 ? Xintr_legacy7 -ffffffff82542790 ? Xintr_legacy8 -ffffffff825427d0 ? Xintr_legacy9 -ffffffff82542810 ? Xintr_legacy10 -ffffffff82542850 ? Xintr_legacy11 -ffffffff82542890 ? Xintr_legacy12 -ffffffff825428d0 ? Xintr_legacy13 -ffffffff82542910 ? Xintr_legacy14 -ffffffff82542950 ? Xintr_legacy15 -ffffffff82542990 ? Xintr_ioapic_edge0 -ffffffff825429d0 ? Xintr_ioapic_edge1 -ffffffff82542a10 ? Xintr_ioapic_edge2 -ffffffff82542a50 ? Xintr_ioapic_edge3 -ffffffff82542a90 ? Xintr_ioapic_edge4 -ffffffff82542ad0 ? Xintr_ioapic_edge5 -ffffffff82542b10 ? Xintr_ioapic_edge6 -ffffffff82542b50 ? Xintr_ioapic_edge7 -ffffffff82542b90 ? Xintr_ioapic_edge8 -ffffffff82542bd0 ? Xintr_ioapic_edge9 -ffffffff82542c10 ? Xintr_ioapic_edge10 -ffffffff82542c50 ? Xintr_ioapic_edge11 -ffffffff82542c90 ? Xintr_ioapic_edge12 -ffffffff82542cd0 ? Xintr_ioapic_edge13 -ffffffff82542d10 ? Xintr_ioapic_edge14 -ffffffff82542d50 ? Xintr_ioapic_edge15 -ffffffff82542d90 ? Xintr_ioapic_edge16 -ffffffff82542dd0 ? Xintr_ioapic_edge17 -ffffffff82542e10 ? Xintr_ioapic_edge18 -ffffffff82542e50 ? Xintr_ioapic_edge19 -ffffffff82542e90 ? Xintr_ioapic_edge20 -ffffffff82542ed0 ? Xintr_ioapic_edge21 -ffffffff82542f10 ? Xintr_ioapic_edge22 -ffffffff82542f50 ? Xintr_ioapic_edge23 -ffffffff82542f90 ? Xintr_ioapic_edge24 -ffffffff82542fd0 ? Xintr_ioapic_edge25 -ffffffff82543010 ? Xintr_ioapic_edge26 -ffffffff82543050 ? Xintr_ioapic_edge27 -ffffffff82543090 ? Xintr_ioapic_edge28 -ffffffff825430d0 ? Xintr_ioapic_edge29 -ffffffff82543110 ? Xintr_ioapic_edge30 -ffffffff82543150 ? Xintr_ioapic_edge31 -ffffffff82543190 ? Xintr_ioapic_edge32 -ffffffff825431d0 ? Xintr_ioapic_edge33 -ffffffff82543210 ? Xintr_ioapic_edge34 -ffffffff82543250 ? Xintr_ioapic_edge35 -ffffffff82543290 ? Xintr_ioapic_edge36 -ffffffff825432d0 ? Xintr_ioapic_edge37 -ffffffff82543310 ? Xintr_ioapic_edge38 -ffffffff82543350 ? Xintr_ioapic_edge39 -ffffffff82543390 ? Xintr_ioapic_edge40 -ffffffff825433d0 ? Xintr_ioapic_edge41 -ffffffff82543410 ? Xintr_ioapic_edge42 -ffffffff82543450 ? Xintr_ioapic_edge43 -ffffffff82543490 ? Xintr_ioapic_edge44 -ffffffff825434d0 ? Xintr_ioapic_edge45 -ffffffff82543510 ? Xintr_ioapic_edge46 -ffffffff82543550 ? Xintr_ioapic_edge47 -ffffffff82543590 ? Xintr_ioapic_edge48 -ffffffff825435d0 ? Xintr_ioapic_edge49 -ffffffff82543610 ? Xintr_ioapic_edge50 -ffffffff82543650 ? Xintr_ioapic_edge51 -ffffffff82543690 ? Xintr_ioapic_edge52 -ffffffff825436d0 ? Xintr_ioapic_edge53 -ffffffff82543710 ? Xintr_ioapic_edge54 -ffffffff82543750 ? Xintr_ioapic_edge55 -ffffffff82543790 ? Xintr_ioapic_edge56 -ffffffff825437d0 ? Xintr_ioapic_edge57 -ffffffff82543810 ? Xintr_ioapic_edge58 -ffffffff82543850 ? Xintr_ioapic_edge59 -ffffffff82543890 ? Xintr_ioapic_edge60 -ffffffff825438d0 ? Xintr_ioapic_edge61 -ffffffff82543910 ? Xintr_ioapic_edge62 -ffffffff82543950 ? Xintr_ioapic_edge63 -ffffffff82543990 ? Xintr_ioapic_level0 -ffffffff825439d0 ? Xintr_ioapic_level1 -ffffffff82543a10 ? Xintr_ioapic_level2 -ffffffff82543a50 ? Xintr_ioapic_level3 -ffffffff82543a90 ? Xintr_ioapic_level4 -ffffffff82543ad0 ? Xintr_ioapic_level5 -ffffffff82543b10 ? Xintr_ioapic_level6 -ffffffff82543b50 ? Xintr_ioapic_level7 -ffffffff82543b90 ? Xintr_ioapic_level8 -ffffffff82543bd0 ? Xintr_ioapic_level9 -ffffffff82543c10 ? Xintr_ioapic_level10 -ffffffff82543c50 ? Xintr_ioapic_level11 -ffffffff82543c90 ? Xintr_ioapic_level12 -ffffffff82543cd0 ? Xintr_ioapic_level13 -ffffffff82543d10 ? Xintr_ioapic_level14 -ffffffff82543d50 ? Xintr_ioapic_level15 -ffffffff82543d90 ? Xintr_ioapic_level16 -ffffffff82543dd0 ? Xintr_ioapic_level17 -ffffffff82543e10 ? Xintr_ioapic_level18 -ffffffff82543e50 ? Xintr_ioapic_level19 -ffffffff82543e90 ? Xintr_ioapic_level20 -ffffffff82543ed0 ? Xintr_ioapic_level21 -ffffffff82543f10 ? Xintr_ioapic_level22 -ffffffff82543f50 ? Xintr_ioapic_level23 -ffffffff82543f90 ? Xintr_ioapic_level24 -ffffffff82543fd0 ? Xintr_ioapic_level25 -ffffffff82544010 ? Xintr_ioapic_level26 -ffffffff82544050 ? Xintr_ioapic_level27 -ffffffff82544090 ? Xintr_ioapic_level28 -ffffffff825440d0 ? Xintr_ioapic_level29 -ffffffff82544110 ? Xintr_ioapic_level30 -ffffffff82544150 ? Xintr_ioapic_level31 -ffffffff82544190 ? Xintr_ioapic_level32 -ffffffff825441d0 ? Xintr_ioapic_level33 -ffffffff82544210 ? Xintr_ioapic_level34 -ffffffff82544250 ? Xintr_ioapic_level35 -ffffffff82544290 ? Xintr_ioapic_level36 -ffffffff825442d0 ? Xintr_ioapic_level37 -ffffffff82544310 ? Xintr_ioapic_level38 -ffffffff82544350 ? Xintr_ioapic_level39 -ffffffff82544390 ? Xintr_ioapic_level40 -ffffffff825443d0 ? Xintr_ioapic_level41 -ffffffff82544410 ? Xintr_ioapic_level42 -ffffffff82544450 ? Xintr_ioapic_level43 -ffffffff82544490 ? Xintr_ioapic_level44 -ffffffff825444d0 ? Xintr_ioapic_level45 -ffffffff82544510 ? Xintr_ioapic_level46 -ffffffff82544550 ? Xintr_ioapic_level47 -ffffffff82544590 ? Xintr_ioapic_level48 -ffffffff825445d0 ? Xintr_ioapic_level49 -ffffffff82544610 ? Xintr_ioapic_level50 -ffffffff82544650 ? Xintr_ioapic_level51 -ffffffff82544690 ? Xintr_ioapic_level52 -ffffffff825446d0 ? Xintr_ioapic_level53 -ffffffff82544710 ? Xintr_ioapic_level54 -ffffffff82544750 ? Xintr_ioapic_level55 -ffffffff82544790 ? Xintr_ioapic_level56 -ffffffff825447d0 ? Xintr_ioapic_level57 -ffffffff82544810 ? Xintr_ioapic_level58 -ffffffff82544850 ? Xintr_ioapic_level59 -ffffffff82544890 ? Xintr_ioapic_level60 -ffffffff825448d0 ? Xintr_ioapic_level61 -ffffffff82544910 ? Xintr_ioapic_level62 -ffffffff82544950 ? Xintr_ioapic_level63 -ffffffff82545000 ? codepatch_fill_nop -ffffffff82545000 A __cptext_start -ffffffff82545000 A __kutext_end -ffffffff825450b0 ? codepatch_maprw -ffffffff82545190 ? codepatch_unmaprw -ffffffff82545200 ? codepatch_nop -ffffffff82545360 ? codepatch_replace -ffffffff82545510 ? codepatch_call -ffffffff82545530 ? codepatch_jmp -ffffffff82546000 A __cptext_end -ffffffff82546000 A __rodata_start -ffffffff82546000 C _etext -ffffffff82546000 C etext -ffffffff82547000 r seeprom_read -ffffffff82547004 r icl_mg_pll_find_divisors.div1_vals -ffffffff82547028 r gen9bc_tgp_ddc_pin_map -ffffffff82547038 r athn_ac2qid -ffffffff82547038 r athn_ac2qid -ffffffff82547038 r athn_ac2qid -ffffffff82547044 r rtwn_get_rssi.cckoff -ffffffff8254706c r rsu_ac2qid -ffffffff8254707c r pckbc_portcmd -ffffffff82547080 r tht_fifo_write_pad.pad -ffffffff82547088 r rsu_get_rssi.cckoff -ffffffff8254709c r adlp_n_revids -ffffffff825470ec r apple_iso_trans -ffffffff825470f0 r dg2_g12_revid_step_tbl -ffffffff825470f8 r wihap_check_tx.txratetable -ffffffff825470fc r dmamode -ffffffff82547120 r gen9_edram_size_mb.sets -ffffffff82548000 r isomappings -ffffffff82548080 r unimappings -ffffffff82548230 r replacements -ffffffff8254b93f r apollo_pio_rec -ffffffff825946a6 r apollo_udma33_tim -ffffffff825a7e91 r pp_r600_decoded_lanes -ffffffff825dabf7 r cmd680_setup_channel.udma_tbl -ffffffff825e281b r apollo_udma100_tim -ffffffff825e2821 r cmd0646_9_tim_udma -ffffffff825f01d6 r substchar -ffffffff82640ef0 r apollo_udma133_tim -ffffffff82640ef7 r apollo_udma66_tim -ffffffff82640f21 r cy_pio_rec -ffffffff82645ef0 R drm_ca -ffffffff82645f18 R drm_filtops -ffffffff82645f48 R drmread_filtops -ffffffff82646000 r vga_emulops -ffffffff82646048 R vga_stdscreen -ffffffff82646078 R vga_stdscreen_mono -ffffffff826460a8 R vga_stdscreen_bf -ffffffff826460d8 R vga_40lscreen -ffffffff82646108 R vga_40lscreen_mono -ffffffff82646138 R vga_40lscreen_bf -ffffffff82646168 R vga_50lscreen -ffffffff82646198 R vga_50lscreen_mono -ffffffff826461c8 R vga_50lscreen_bf -ffffffff826461f8 R vga_screenlist -ffffffff82646208 R vga_screenlist_mono -ffffffff82646218 R vga_accessops -ffffffff82646278 r i945_wm_info -ffffffff826462b8 r bgansitopc -ffffffff826462c0 r pctoansi -ffffffff82646300 r sdma_offsets -ffffffff82646300 r sdma_offsets -ffffffff82646338 r iha_rate_tbl -ffffffff82646370 r i830_a_wm_info -ffffffff826463a8 r gen9_edram_size_mb.ways -ffffffff82646408 r aggr_periodic_times -ffffffff82646490 r jsl_ehl_revids -ffffffff82646508 r michael_final.pad -ffffffff82646530 r rt_copysa.maskarray -ffffffff82646538 r i915_wm_info -ffffffff82646540 r amdgpu_ih_clientid_jpeg -ffffffff82646540 r amdgpu_ih_clientid_uvds -ffffffff82646540 r amdgpu_ih_clientid_vcns -ffffffff82646540 r amdgpu_ih_clientid_vcns -ffffffff82646540 r amdgpu_ih_clientid_vcns -ffffffff82646578 r vga_setfontset.cmaptabb -ffffffff82646590 r tgl_revids -ffffffff826465f0 r i830_bc_wm_info -ffffffff82646660 r hsw_activate_psr2.map -ffffffff82646698 r __drm_universal_plane_init.default_modifiers -ffffffff826466a8 r iwn_tid2fifo -ffffffff826466c0 r vga_setfontset.cmaptaba -ffffffff826466c8 r crtc_offsets -ffffffff826466c8 r crtc_offsets -ffffffff826466c8 r crtc_offsets -ffffffff826466e8 r link_speed -ffffffff826466e8 r link_speed -ffffffff826466e8 r link_speed -ffffffff82646770 r rtwn_r88e_get_rssi.cckoff -ffffffff82647000 R edid_vendors -ffffffff826472c0 R edid_nvendors -ffffffff826472d0 R edid_products -ffffffff82647330 R edid_nproducts -ffffffff82647340 r _edid_modes -ffffffff82648000 R videomode_list -ffffffff82649080 R videomode_count -ffffffff8264a000 r ahc_hard_errors -ffffffff8264a080 r critical_sections -ffffffff8264a0b0 r patches -ffffffff8264ad50 r seqprog -ffffffff8264c000 r ahc_switch -ffffffff8264d000 r termstat_strings -ffffffff8264d020 r critical_sections -ffffffff8264d060 r seqprog -ffffffff8264dd50 r patches -ffffffff8264f000 r ahd_switch -ffffffff82650000 R aic_switch -ffffffff82651000 R adw_switch -ffffffff82652000 R gdt_switch -ffffffff82653000 R twe_switch -ffffffff82654000 R ciss_switch -ffffffff82654030 R ciss_level -ffffffff82654050 R ciss_stat -ffffffff82655000 R ami_switch -ffffffff82655028 R ami_raw_switch -ffffffff82656000 R mfi_switch -ffffffff82656028 R mfi_pd_switch -ffffffff82656050 r mfi_iop_xscale -ffffffff82656080 r mfi_iop_ppc -ffffffff826560b0 r mfi_iop_gen2 -ffffffff826560e0 r mfi_iop_skinny -ffffffff82656110 r mfi_bbu_indicators -ffffffff82657000 R qlw_switch -ffffffff82658000 R isp_2100_risc_code -ffffffff8266abf0 R isp_2200_risc_code -ffffffff8267d990 R isp_2300_risc_code -ffffffff82697408 R qla_switch -ffffffff82697430 r qla_regs_2100 -ffffffff82697460 r qla_regs_2200 -ffffffff82697490 r qla_regs_23XX -ffffffff82698000 R ahci_atascsi_methods -ffffffff82699000 R nvme_switch -ffffffff82699028 r nvme_ops -ffffffff8269a000 R mpi_switch -ffffffff8269a060 r bwi_rf_calc_nrssi_slope_11b.save_phy_regs -ffffffff8269a090 r chv_oa_mux_regs -ffffffff8269a0b0 r fiji_clock_stretcher_lookup_table -ffffffff8269a0b0 r tonga_clock_stretcher_lookup_table -ffffffff8269a0d0 r iosf_pci_devices -ffffffff8269a0f0 r link_speed -ffffffff8269a0f0 r link_speed -ffffffff8269a0f0 r link_speed -ffffffff8269a130 r drm_fb_xfrm.default_dst_pitch -ffffffff8269a130 r non_supported_protection -ffffffff8269a230 r tgl_uy_revids -ffffffff8269a280 r bwi_phy_noise_11g_rev1 -ffffffff8269a2f0 r cardslot_process_event.antonym_ev -ffffffff8269a370 r gen11_oa_mux_regs -ffffffff8269a470 r ddr2_cycle_tenths -ffffffff8269a4e0 r rtw_intr_rx.ratetbl -ffffffff8269a550 r abm_config -ffffffff8269a5c0 r getbootinfo.ports -ffffffff8269a610 r reg_offsets -ffffffff8269a620 r bwi_rf_lo_measure_11g.rf_lo_adjust -ffffffff8269a630 r init_non_clock_fields.look_up -ffffffff8269a640 r uftdi_8u232am_getrate.roundoff -ffffffff8269a690 r zyd_rx_data.rates -ffffffff8269a6b0 r ieee80211_ra_valid_tx_mcs.max_mcs -ffffffff8269a6e0 r mmio_invalidate_full.gen8_regs -ffffffff8269a710 r bwi_phy_noise_11g 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dp_trace_set_lt_start_timestamp +ffffffff82229450 T dp_trace_set_lt_end_timestamp +ffffffff82229530 T dc_dp_trace_get_lt_end_timestamp +ffffffff82229570 T dc_dp_trace_get_lt_counts +ffffffff822295b0 T dc_dp_trace_get_link_loss_count +ffffffff822295e0 T dp_trace_set_edp_power_timestamp +ffffffff822296c0 T dp_trace_get_edp_poweron_timestamp +ffffffff822296f0 T dp_trace_get_edp_poweroff_timestamp +ffffffff8222a000 T set_dio_throttled_vcp_size +ffffffff8222a020 T setup_dio_stream_encoder +ffffffff8222a0e0 T reset_dio_stream_encoder +ffffffff8222a1a0 T setup_dio_stream_attribute +ffffffff8222a320 T enable_dio_dp_link_output +ffffffff8222a390 T disable_dio_link_output +ffffffff8222a3d0 T set_dio_dp_link_test_pattern +ffffffff8222a410 T set_dio_dp_lane_settings +ffffffff8222a450 T can_use_dio_link_hwss +ffffffff8222a490 T get_dio_link_hwss +ffffffff8222a4c0 t update_dio_stream_allocation_table +ffffffff8222b000 T can_use_dpia_link_hwss +ffffffff8222b050 T get_dpia_link_hwss +ffffffff8222b080 t update_dpia_stream_allocation_table +ffffffff8222c000 T can_use_hpo_dp_link_hwss +ffffffff8222c030 T get_hpo_dp_link_hwss +ffffffff8222c060 t set_hpo_dp_hblank_min_symbol_width +ffffffff8222c130 t set_hpo_dp_throttled_vcp_size +ffffffff8222c160 t enable_hpo_dp_link_output +ffffffff8222c290 t set_hpo_dp_link_test_pattern +ffffffff8222c2d0 t set_hpo_dp_lane_settings +ffffffff8222c300 t update_hpo_dp_stream_allocation_table +ffffffff8222c320 t setup_hpo_dp_stream_encoder +ffffffff8222c490 t reset_hpo_dp_stream_encoder +ffffffff8222c580 t setup_hpo_dp_stream_attribute +ffffffff8222c5e0 t disable_hpo_dp_link_output +ffffffff8222d000 T virtual_link_encoder_construct +ffffffff8222d060 t virtual_link_encoder_validate_output_with_stream +ffffffff8222d090 t virtual_link_encoder_hw_init +ffffffff8222d0c0 t virtual_link_encoder_setup +ffffffff8222d0f0 t virtual_link_encoder_enable_tmds_output +ffffffff8222d120 t virtual_link_encoder_enable_dp_output +ffffffff8222d150 t virtual_link_encoder_enable_dp_mst_output +ffffffff8222d180 t virtual_link_encoder_disable_output +ffffffff8222d1b0 t virtual_link_encoder_dp_set_lane_settings +ffffffff8222d1e0 t virtual_link_encoder_dp_set_phy_pattern +ffffffff8222d210 t virtual_link_encoder_update_mst_stream_allocation_table +ffffffff8222d240 t virtual_link_encoder_connect_dig_be_to_fe +ffffffff8222d270 t virtual_link_encoder_destroy +ffffffff8222d2c0 t virtual_link_encoder_get_max_link_cap +ffffffff8222e000 T virtual_setup_stream_encoder +ffffffff8222e030 T virtual_setup_stream_attribute +ffffffff8222e060 T virtual_reset_stream_encoder +ffffffff8222e090 T get_virtual_link_hwss +ffffffff8222e0c0 t virtual_disable_link_output +ffffffff8222f000 T virtual_stream_encoder_construct +ffffffff8222f050 T virtual_stream_encoder_create +ffffffff8222f110 t virtual_stream_encoder_dp_set_stream_attribute +ffffffff8222f140 t virtual_stream_encoder_hdmi_set_stream_attribute +ffffffff8222f170 t virtual_stream_encoder_dvi_set_stream_attribute +ffffffff8222f1a0 t virtual_stream_encoder_set_throttled_vcp_size +ffffffff8222f1d0 t virtual_stream_encoder_update_hdmi_info_packets +ffffffff8222f200 t virtual_stream_encoder_stop_hdmi_info_packets +ffffffff8222f230 t virtual_stream_encoder_update_dp_info_packets +ffffffff8222f260 t virtual_stream_encoder_stop_dp_info_packets +ffffffff8222f290 t virtual_stream_encoder_dp_blank +ffffffff8222f2c0 t virtual_stream_encoder_dp_unblank +ffffffff8222f2f0 t virtual_audio_mute_control +ffffffff8222f320 t virtual_setup_stereo_sync +ffffffff8222f350 t virtual_stream_encoder_set_avmute +ffffffff8222f380 t virtual_dig_connect_to_otg +ffffffff8222f3b0 t virtual_stream_encoder_reset_hdmi_stream_attribute +ffffffff8222f3e0 t virtual_stream_encoder_set_dsc_pps_info_packet +ffffffff8222f410 t virtual_enc_dp_set_odm_combine +ffffffff82230000 T dmub_dcn20_use_cached_inbox +ffffffff82230040 T dmub_dcn20_reset +ffffffff82230210 T dmub_dcn20_reset_release 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dmub_dcn31_get_gpint_dataout +ffffffff82234d90 T dmub_dcn31_get_fw_boot_status +ffffffff82234dc0 T dmub_dcn31_enable_dmub_boot_options +ffffffff82234e40 T dmub_dcn31_skip_dmub_panel_power_sequence +ffffffff82234ea0 T dmub_dcn31_setup_outbox0 +ffffffff82234ef0 T dmub_dcn31_get_outbox0_wptr +ffffffff82234f20 T dmub_dcn31_set_outbox0_rptr +ffffffff82234f50 T dmub_dcn31_get_current_time +ffffffff82234f80 T dmub_dcn31_get_diagnostic_data +ffffffff82235430 T dmub_dcn31_should_detect +ffffffff82236000 T dmub_dcn314_is_psrsu_supported +ffffffff82237000 T dmub_dcn32_reset +ffffffff82237200 T dmub_dcn32_reset_release +ffffffff822372d0 T dmub_dcn32_backdoor_load +ffffffff82237540 T dmub_dcn32_backdoor_load_zfb_mode +ffffffff82237730 T dmub_dcn32_setup_windows +ffffffff82237a80 T dmub_dcn32_setup_mailbox +ffffffff82237ad0 T dmub_dcn32_get_inbox1_wptr +ffffffff82237b00 T dmub_dcn32_get_inbox1_rptr +ffffffff82237b30 T dmub_dcn32_set_inbox1_wptr +ffffffff82237b60 T dmub_dcn32_setup_out_mailbox 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dmub_srv_get_outbox0_msg +ffffffff8223bae0 T dmub_srv_get_diagnostic_data +ffffffff8223bb30 T dmub_srv_should_detect +ffffffff8223bb80 T dmub_srv_clear_inbox0_ack +ffffffff8223bbd0 T dmub_srv_wait_for_inbox0_ack +ffffffff8223bc80 T dmub_srv_send_inbox0_cmd +ffffffff8223c000 T dmub_srv_stat_get_notification +ffffffff8223d000 T setup_x_points_distribution +ffffffff8223d170 T log_x_points_distribution +ffffffff8223d1a0 T precompute_pq +ffffffff8223d370 t compute_pq +ffffffff8223d570 T precompute_de_pq +ffffffff8223d6d0 t compute_de_pq +ffffffff8223d990 T calculate_user_regamma_coeff +ffffffff8223dd70 t apply_lut_1d +ffffffff8223e0a0 T calculate_user_regamma_ramp +ffffffff8223e980 T mod_color_calculate_degamma_params +ffffffff8223ed80 t build_evenly_distributed_points +ffffffff8223ef00 t scale_gamma +ffffffff8223f0b0 t build_de_pq +ffffffff8223f290 t build_degamma +ffffffff8223f660 t build_hlg_degamma +ffffffff8223f870 t map_regamma_hw_to_x_user +ffffffff8223ff90 T mod_color_calculate_regamma_params +ffffffff822418b0 t scale_gamma_dx +ffffffff82241f90 T mod_color_calculate_degamma_curve +ffffffff82242250 t translate_from_linear_space +ffffffff82242590 t build_coefficients +ffffffff82242710 t calculate_mapped_value +ffffffff82243000 T mod_color_is_table_init +ffffffff82243050 T mod_color_get_table +ffffffff822430a0 T mod_color_set_table_init_state +ffffffff82244000 T mod_freesync_create +ffffffff82244070 T mod_freesync_destroy +ffffffff822440b0 T mod_freesync_calc_v_total_from_refresh +ffffffff82244140 T mod_freesync_get_vmin_vmax +ffffffff82244180 T mod_freesync_get_v_position +ffffffff82244200 T mod_freesync_build_vrr_infopacket +ffffffff82244920 T mod_freesync_build_vrr_params +ffffffff82244c90 T mod_freesync_calc_nominal_field_rate +ffffffff82244cf0 T mod_freesync_handle_preflip +ffffffff82245120 T mod_freesync_handle_v_update +ffffffff822455d0 T mod_freesync_get_settings +ffffffff82245640 T mod_freesync_calc_field_rate_from_timing +ffffffff82245690 T mod_freesync_get_freesync_enabled +ffffffff822456c0 T mod_freesync_is_valid_range +ffffffff82246000 T mod_build_vsc_infopacket +ffffffff82246210 T mod_build_hf_vsif_infopacket +ffffffff82247000 T dmub_init_abm_config +ffffffff82247550 t fill_iram_v_2_3 +ffffffff822479e0 T dmcu_load_iram +ffffffff822481d0 T is_psr_su_specific_panel +ffffffff82248270 T mod_power_calc_psr_configs +ffffffff82248360 T mod_power_only_edp +ffffffff822483b0 T psr_su_set_y_granularity +ffffffff82249000 T mod_vmid_get_for_ptb +ffffffff82249220 T mod_vmid_reset +ffffffff822492e0 T mod_vmid_create +ffffffff82249420 T mod_vmid_destroy +ffffffff8224a000 T amdgpu_dpm_get_sclk +ffffffff8224a090 T amdgpu_dpm_get_mclk +ffffffff8224a120 T amdgpu_dpm_set_powergating_by_smu +ffffffff8224a200 T amdgpu_dpm_set_gfx_power_up_by_imu +ffffffff8224a310 T amdgpu_dpm_baco_enter +ffffffff8224a3a0 T amdgpu_dpm_baco_exit +ffffffff8224a430 T amdgpu_dpm_set_mp1_state +ffffffff8224a4d0 T amdgpu_dpm_is_baco_supported +ffffffff8224a580 T amdgpu_dpm_mode2_reset +ffffffff8224a610 T amdgpu_dpm_baco_reset +ffffffff8224a6c0 T amdgpu_dpm_is_mode1_reset_supported +ffffffff8224a730 T amdgpu_dpm_mode1_reset +ffffffff8224a7b0 T amdgpu_dpm_switch_power_profile +ffffffff8224a860 T amdgpu_dpm_set_xgmi_pstate +ffffffff8224a900 T amdgpu_dpm_set_df_cstate +ffffffff8224a9a0 T amdgpu_dpm_allow_xgmi_power_down +ffffffff8224aa20 T amdgpu_dpm_enable_mgpu_fan_boost +ffffffff8224aab0 T amdgpu_dpm_set_clockgating_by_smu +ffffffff8224ab50 T amdgpu_dpm_smu_i2c_bus_access +ffffffff8224abf0 T amdgpu_pm_acpi_event_handler +ffffffff8224acb0 T amdgpu_dpm_read_sensor +ffffffff8224ad70 T amdgpu_dpm_compute_clocks +ffffffff8224ae70 T amdgpu_dpm_enable_uvd +ffffffff8224b060 T amdgpu_dpm_enable_vce +ffffffff8224b250 T amdgpu_dpm_enable_jpeg +ffffffff8224b350 T amdgpu_pm_load_smu_firmware +ffffffff8224b400 T amdgpu_dpm_handle_passthrough_sbr +ffffffff8224b480 T amdgpu_dpm_send_hbm_bad_pages_num +ffffffff8224b500 T amdgpu_dpm_send_hbm_bad_channel_flag +ffffffff8224b580 T amdgpu_dpm_get_dpm_freq_range +ffffffff8224b620 T amdgpu_dpm_set_soft_freq_range +ffffffff8224b6c0 T amdgpu_dpm_write_watermarks_table +ffffffff8224b740 T amdgpu_dpm_wait_for_event +ffffffff8224b7d0 T amdgpu_dpm_set_residency_gfxoff +ffffffff8224b850 T amdgpu_dpm_get_residency_gfxoff +ffffffff8224b8d0 T amdgpu_dpm_get_entrycount_gfxoff +ffffffff8224b950 T amdgpu_dpm_get_status_gfxoff +ffffffff8224b9d0 T amdgpu_dpm_get_thermal_throttling_counter +ffffffff8224ba20 T amdgpu_dpm_gfx_state_change +ffffffff8224ba90 T amdgpu_dpm_get_ecc_info +ffffffff8224bb10 T amdgpu_dpm_get_vce_clock_state +ffffffff8224bba0 T amdgpu_dpm_get_current_power_state +ffffffff8224bc10 T amdgpu_dpm_set_power_state +ffffffff8224bd70 T amdgpu_dpm_dispatch_task +ffffffff8224be10 T amdgpu_dpm_get_performance_level +ffffffff8224bea0 T amdgpu_dpm_force_performance_level +ffffffff8224c080 T amdgpu_dpm_get_pp_num_states +ffffffff8224c110 T amdgpu_dpm_get_pp_table +ffffffff8224c1a0 T amdgpu_dpm_set_fine_grain_clk_vol +ffffffff8224c240 T amdgpu_dpm_odn_edit_dpm_table +ffffffff8224c2e0 T amdgpu_dpm_print_clock_levels +ffffffff8224c370 T amdgpu_dpm_emit_clock_levels +ffffffff8224c410 T amdgpu_dpm_set_ppfeature_status +ffffffff8224c4a0 T amdgpu_dpm_get_ppfeature_status +ffffffff8224c530 T amdgpu_dpm_force_clock_level +ffffffff8224c5c0 T amdgpu_dpm_get_sclk_od +ffffffff8224c640 T amdgpu_dpm_set_sclk_od +ffffffff8224c7c0 T amdgpu_dpm_get_mclk_od +ffffffff8224c840 T amdgpu_dpm_set_mclk_od +ffffffff8224c9c0 T amdgpu_dpm_get_power_profile_mode +ffffffff8224ca50 T amdgpu_dpm_set_power_profile_mode +ffffffff8224caf0 T amdgpu_dpm_get_gpu_metrics +ffffffff8224cb80 T amdgpu_dpm_get_fan_control_mode +ffffffff8224cc10 T amdgpu_dpm_set_fan_speed_pwm +ffffffff8224cca0 T amdgpu_dpm_get_fan_speed_pwm +ffffffff8224cd30 T amdgpu_dpm_get_fan_speed_rpm +ffffffff8224cdc0 T amdgpu_dpm_set_fan_speed_rpm +ffffffff8224ce50 T amdgpu_dpm_set_fan_control_mode +ffffffff8224cee0 T amdgpu_dpm_get_power_limit +ffffffff8224cf90 T amdgpu_dpm_set_power_limit +ffffffff8224d020 T amdgpu_dpm_is_cclk_dpm_supported +ffffffff8224d090 T amdgpu_dpm_debugfs_print_current_performance_level +ffffffff8224d120 T amdgpu_dpm_get_smu_prv_buf_details +ffffffff8224d1c0 T amdgpu_dpm_is_overdrive_supported +ffffffff8224d230 T amdgpu_dpm_set_pp_table +ffffffff8224d2d0 T amdgpu_dpm_get_num_cpu_cores +ffffffff8224d320 T amdgpu_dpm_stb_debug_fs_init +ffffffff8224d370 T amdgpu_dpm_display_configuration_change +ffffffff8224d400 T amdgpu_dpm_get_clock_by_type +ffffffff8224d4a0 T amdgpu_dpm_get_display_mode_validation_clks +ffffffff8224d530 T amdgpu_dpm_get_clock_by_type_with_latency +ffffffff8224d5d0 T amdgpu_dpm_get_clock_by_type_with_voltage +ffffffff8224d670 T amdgpu_dpm_set_watermarks_for_clocks_ranges +ffffffff8224d700 T amdgpu_dpm_display_clock_voltage_request +ffffffff8224d790 T amdgpu_dpm_get_current_clocks +ffffffff8224d820 T amdgpu_dpm_notify_smu_enable_pwe +ffffffff8224d8a0 T amdgpu_dpm_set_active_display_count +ffffffff8224d930 T amdgpu_dpm_set_min_deep_sleep_dcefclk +ffffffff8224d9c0 T amdgpu_dpm_set_hard_min_dcefclk_by_freq +ffffffff8224da60 T amdgpu_dpm_set_hard_min_fclk_by_freq +ffffffff8224db00 T amdgpu_dpm_display_disable_memory_clock_switch +ffffffff8224db90 T amdgpu_dpm_get_max_sustainable_clocks_by_dc +ffffffff8224dc20 T amdgpu_dpm_get_uclk_dpm_states +ffffffff8224dcc0 T amdgpu_dpm_get_dpm_clock_table +ffffffff8224e000 T amdgpu_dpm_get_active_displays +ffffffff8224e0a0 T amdgpu_dpm_get_vblank_time +ffffffff8224e150 T amdgpu_dpm_get_vrefresh +ffffffff8224f000 T amdgpu_pm_sysfs_init +ffffffff8224f030 T amdgpu_pm_sysfs_fini +ffffffff8224f060 T amdgpu_debugfs_pm_init +ffffffff82250000 T amdgpu_dpm_print_class_info +ffffffff822502b0 T amdgpu_dpm_print_cap_info +ffffffff82250340 T amdgpu_dpm_print_ps_status +ffffffff822503d0 T amdgpu_pm_print_power_states +ffffffff82250460 T amdgpu_get_platform_caps +ffffffff82250500 T amdgpu_parse_extended_power_table +ffffffff822512d0 t amdgpu_parse_clk_voltage_dep_table +ffffffff82251380 T amdgpu_free_extended_power_table +ffffffff82251490 T amdgpu_add_thermal_controller +ffffffff822518d0 T amdgpu_get_vce_clock_state +ffffffff82251910 T amdgpu_legacy_dpm_compute_clocks +ffffffff82251da0 T amdgpu_dpm_thermal_work_handler +ffffffff82252000 t pp_early_init +ffffffff82252100 t pp_late_init +ffffffff82252220 t pp_sw_init +ffffffff822522b0 t pp_sw_fini +ffffffff82252340 t pp_hw_init +ffffffff822523a0 t pp_hw_fini +ffffffff82252410 t pp_late_fini +ffffffff82252470 t pp_suspend +ffffffff822524c0 t pp_resume +ffffffff822524e0 t pp_is_idle +ffffffff82252510 t pp_wait_for_idle +ffffffff82252540 t pp_sw_reset +ffffffff82252570 t pp_set_clockgating_state +ffffffff822525a0 t pp_set_powergating_state +ffffffff822525d0 t pp_dpm_set_fan_control_mode +ffffffff82252640 t pp_dpm_get_fan_control_mode +ffffffff822526b0 t pp_dpm_set_fan_speed_pwm +ffffffff82252710 t pp_dpm_get_fan_speed_pwm +ffffffff82252770 t pp_dpm_force_clock_level +ffffffff822527d0 t pp_dpm_print_clock_levels +ffffffff82252830 t pp_dpm_emit_clock_levels +ffffffff82252890 t pp_dpm_force_performance_level +ffffffff82252930 t pp_dpm_get_sclk_od +ffffffff82252990 t pp_dpm_set_sclk_od +ffffffff822529f0 t pp_dpm_get_mclk_od +ffffffff82252a50 t pp_dpm_set_mclk_od +ffffffff82252ab0 t pp_dpm_read_sensor +ffffffff82252b70 t pp_dpm_get_performance_level +ffffffff82252bb0 t pp_dpm_get_current_power_state +ffffffff82252c30 t pp_dpm_get_fan_speed_rpm +ffffffff82252c90 t pp_dpm_set_fan_speed_rpm +ffffffff82252cf0 t pp_dpm_get_pp_num_states +ffffffff82252e30 t pp_dpm_get_pp_table +ffffffff82252e80 t pp_dpm_set_pp_table +ffffffff82252fb0 t pp_dpm_switch_power_profile +ffffffff822530f0 t pp_dpm_get_vce_clock_state +ffffffff82253140 t pp_dpm_dispatch_tasks +ffffffff82253180 t pp_dpm_load_fw +ffffffff822531f0 t pp_dpm_fw_loading_complete +ffffffff82253220 t pp_set_powergating_by_smu +ffffffff822533a0 t pp_set_clockgating_by_smu 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pp_enable_mgpu_fan_boost +ffffffff82253cf0 t pp_set_active_display_count +ffffffff82253d30 t pp_set_hard_min_dcefclk_by_freq +ffffffff82253d90 t pp_set_hard_min_fclk_by_freq +ffffffff82253df0 t pp_set_min_deep_sleep_dcefclk +ffffffff82253e50 t pp_get_asic_baco_capability +ffffffff82253ec0 t pp_get_asic_baco_state +ffffffff82253f20 t pp_set_asic_baco_state +ffffffff82253f90 t pp_get_ppfeature_status +ffffffff82253ff0 t pp_set_ppfeature_status +ffffffff82254040 t pp_asic_reset_mode_2 +ffffffff822540a0 t pp_set_df_cstate +ffffffff82254100 t pp_set_xgmi_pstate +ffffffff82254160 t pp_get_gpu_metrics +ffffffff822541c0 t pp_get_prv_buffer_details +ffffffff82254240 t pp_pm_compute_clocks +ffffffff82254310 t pp_swctf_delayed_work_handler +ffffffff82254450 t __delayed_work_tick +ffffffff82255000 T ci_baco_set_state +ffffffff82256000 T baco_program_registers +ffffffff822560d0 t baco_cmd_handler +ffffffff82256250 T soc15_baco_program_registers +ffffffff82257000 T fiji_baco_set_state +ffffffff82258000 T phm_setup_asic +ffffffff82258050 T phm_power_down_asic +ffffffff822580a0 T phm_set_power_state +ffffffff82258110 T phm_enable_dynamic_state_management +ffffffff822581c0 T phm_disable_dynamic_state_management +ffffffff82258260 T phm_force_dpm_levels +ffffffff822582b0 T phm_apply_state_adjust_rules +ffffffff82258300 T phm_apply_clock_adjust_rules +ffffffff82258350 T phm_powerdown_uvd +ffffffff822583a0 T phm_disable_clock_power_gatings +ffffffff822583f0 T phm_pre_display_configuration_changed +ffffffff82258450 T phm_display_configuration_changed +ffffffff822584b0 T phm_notify_smc_display_config_after_ps_adjustment +ffffffff82258510 T phm_stop_thermal_controller +ffffffff82258570 T phm_register_irq_handlers +ffffffff822585c0 T phm_start_thermal_controller +ffffffff82258710 T phm_check_smc_update_required_for_display_configuration +ffffffff82258770 T phm_check_states_equal +ffffffff822587c0 T phm_store_dal_configuration_data +ffffffff82258910 T phm_get_dal_power_level +ffffffff82258970 T phm_set_cpu_power_state +ffffffff822589c0 T phm_get_performance_level +ffffffff82258a20 T phm_get_clock_info +ffffffff82258b90 T phm_get_current_shallow_sleep_clocks +ffffffff82258be0 T phm_get_clock_by_type +ffffffff82258c30 T phm_get_clock_by_type_with_latency +ffffffff82258c80 T phm_get_clock_by_type_with_voltage +ffffffff82258cd0 T phm_set_watermarks_for_clocks_ranges +ffffffff82258d20 T phm_display_clock_voltage_request +ffffffff82258d70 T phm_get_max_high_clocks +ffffffff82258dc0 T phm_disable_smc_firmware_ctf +ffffffff82258e20 T phm_set_active_display_count +ffffffff82259000 T hwmgr_early_init +ffffffff82259460 t polaris_set_asic_special_caps +ffffffff822594e0 T hwmgr_sw_init +ffffffff82259550 T hwmgr_sw_fini +ffffffff822595a0 T hwmgr_hw_init +ffffffff82259760 T hwmgr_hw_fini +ffffffff82259820 T hwmgr_suspend +ffffffff822598a0 T hwmgr_resume +ffffffff82259940 T hwmgr_handle_task +ffffffff8225a000 T polaris_baco_set_state +ffffffff8225b000 T pp_override_get_default_fuse_value +ffffffff8225c000 T psm_init_power_state_table +ffffffff8225c2a0 T psm_fini_power_state_table +ffffffff8225c360 T psm_set_boot_states +ffffffff8225c410 T psm_set_performance_states +ffffffff8225c4c0 T psm_set_user_performance_state +ffffffff8225c550 T psm_adjust_power_state_dynamic +ffffffff8225d000 T atomctrl_initialize_mc_reg_table +ffffffff8225d210 T atomctrl_initialize_mc_reg_table_v2_2 +ffffffff8225d420 T atomctrl_set_engine_dram_timings_rv770 +ffffffff8225d490 T atomctrl_get_memory_pll_dividers_si +ffffffff8225d570 T atomctrl_get_memory_pll_dividers_vi +ffffffff8225d5f0 T atomctrl_get_memory_pll_dividers_ai +ffffffff8225d6a0 T atomctrl_get_engine_pll_dividers_kong +ffffffff8225d720 T atomctrl_get_engine_pll_dividers_vi +ffffffff8225d7f0 T atomctrl_get_engine_pll_dividers_ai +ffffffff8225d8d0 T atomctrl_get_dfs_pll_dividers_vi +ffffffff8225d990 T atomctrl_get_reference_clock +ffffffff8225d9f0 T atomctrl_is_voltage_controlled_by_gpio_v3 +ffffffff8225dab0 T atomctrl_get_voltage_table_v3 +ffffffff8225dc10 T atomctrl_get_pp_assign_pin +ffffffff8225dcf0 T atomctrl_calculate_voltage_evv_on_sclk +ffffffff8225e0c0 t GetScaledFraction +ffffffff8225e150 t fDecodeLeakageID +ffffffff8225e1b0 t fSqrt +ffffffff8225e230 T atomctrl_get_voltage_evv_on_sclk +ffffffff8225e2b0 T atomctrl_get_voltage_evv +ffffffff8225e360 T atomctrl_get_mpll_reference_clock +ffffffff8225e3d0 T atomctrl_is_asic_internal_ss_supported +ffffffff8225e420 T atomctrl_get_memory_clock_spread_spectrum +ffffffff8225e520 T atomctrl_get_engine_clock_spread_spectrum +ffffffff8225e620 T atomctrl_read_efuse +ffffffff8225e6d0 T atomctrl_set_ac_timing_ai +ffffffff8225e730 T atomctrl_get_voltage_evv_on_sclk_ai +ffffffff8225e7b0 T atomctrl_get_smc_sclk_range_table +ffffffff8225e860 T atomctrl_get_vddc_shared_railinfo +ffffffff8225e8d0 T atomctrl_get_avfs_information +ffffffff8225ea60 T atomctrl_get_svi2_info +ffffffff8225eb40 T atomctrl_get_leakage_id_from_efuse +ffffffff8225eba0 T atomctrl_get_leakage_vddc_base_on_leakage +ffffffff8225ed40 T atomctrl_get_voltage_range +ffffffff8225ee00 T atomctrl_get_edc_hilo_leakage_offset_table +ffffffff8225ee80 T atomctrl_get_edc_leakage_table +ffffffff8225f000 T pp_atomfwctrl_is_voltage_controlled_by_gpio_v4 +ffffffff8225f0c0 T pp_atomfwctrl_get_voltage_table_v4 +ffffffff8225f280 T pp_atomfwctrl_get_pp_assign_pin +ffffffff8225f360 T pp_atomfwctrl_enter_self_refresh +ffffffff8225f390 T pp_atomfwctrl_get_gpu_pll_dividers_vega10 +ffffffff8225f440 T pp_atomfwctrl_get_avfs_information +ffffffff8225f780 T pp_atomfwctrl_get_gpio_information +ffffffff8225f820 T pp_atomfwctrl_get_clk_information_by_clkid +ffffffff8225f8b0 T pp_atomfwctrl_get_vbios_bootup_values +ffffffff8225fc30 T pp_atomfwctrl_get_smc_dpm_information +ffffffff82260000 T encode_pcie_lane_width +ffffffff82260030 T decode_pcie_lane_width +ffffffff82261000 t pp_tables_v1_0_initialize +ffffffff82262450 t pp_tables_v1_0_uninitialize +ffffffff82262600 T get_number_of_powerplay_table_entries_v1_0 +ffffffff822626b0 T get_powerplay_table_entry_v1_0 +ffffffff82263000 T pp_tables_get_response_times +ffffffff822630d0 T pp_tables_get_num_of_entries +ffffffff82263190 T pp_tables_get_entry +ffffffff822634a0 t init_non_clock_fields +ffffffff822635e0 t pp_tables_initialize +ffffffff82264760 t pp_tables_uninitialize +ffffffff82264960 t get_number_of_vce_state_table_entries +ffffffff82264a50 t get_vce_state_table_entry +ffffffff82265000 T smu10_init_function_pointers +ffffffff82265040 t smu10_hwmgr_backend_init +ffffffff822656e0 t smu10_hwmgr_backend_fini +ffffffff82265820 t smu10_setup_asic_task +ffffffff82265890 t smu10_get_power_state_size +ffffffff822658c0 t smu10_apply_state_adjust_rules +ffffffff822658f0 t smu10_dpm_force_dpm_level +ffffffff82265e70 t smu10_enable_dpm_tasks +ffffffff82265f30 t smu10_disable_dpm_tasks +ffffffff82265f60 t smu10_dpm_patch_boot_state +ffffffff82265f90 t smu10_dpm_get_pp_table_entry +ffffffff82265ff0 t smu10_dpm_get_num_of_pp_table_entries +ffffffff82266040 t smu10_powergate_vcn +ffffffff822660e0 t smu10_dpm_get_mclk +ffffffff82266140 t smu10_dpm_get_sclk +ffffffff82266190 t smu10_set_power_state_tasks +ffffffff82266200 t smu10_set_cpu_power_state +ffffffff82266230 t smu10_store_cc6_data +ffffffff822662a0 t smu10_get_dal_power_level +ffffffff822662d0 t smu10_get_performance_level +ffffffff82266370 t smu10_get_current_shallow_sleep_clocks +ffffffff822663d0 t smu10_get_clock_by_type_with_latency +ffffffff82266520 t smu10_get_clock_by_type_with_voltage +ffffffff82266630 t smu10_set_watermarks_for_clocks_ranges +ffffffff82266700 t smu10_display_clock_voltage_request +ffffffff822667a0 t smu10_get_max_high_clocks +ffffffff822667d0 t smu10_power_off_asic +ffffffff82266820 t smu10_force_clock_level +ffffffff822669e0 t smu10_print_clock_levels +ffffffff82266dd0 t smu10_gfx_off_control +ffffffff82266ee0 t smu10_read_sensor +ffffffff82267070 t smu10_set_active_display_count +ffffffff822670d0 t smu10_set_min_deep_sleep_dcefclk +ffffffff82267130 t smu10_get_power_profile_mode +ffffffff82267170 t smu10_set_power_profile_mode +ffffffff822672a0 t smu10_set_fine_grain_clk_vol +ffffffff822674b0 t smu10_powergate_mmhub +ffffffff822674d0 t smu10_smus_notify_pwe +ffffffff822674f0 t smu10_powergate_sdma +ffffffff82267510 t smu10_set_hard_min_dcefclk_by_freq +ffffffff82267570 t smu10_set_hard_min_fclk_by_freq +ffffffff822675d0 t smu10_set_hard_min_gfxclk_by_freq +ffffffff82267630 t smu10_set_soft_max_gfxclk_by_freq +ffffffff82267690 t smu10_asic_reset +ffffffff822676b0 t smu10_gfx_state_change +ffffffff822676f0 t smu10_dpm_get_pp_table_entry_callback +ffffffff82268000 T smu7_baco_get_capability +ffffffff82268060 T smu7_baco_get_state +ffffffff822680b0 T smu7_baco_set_state +ffffffff82269000 T smu7_powerdown_uvd +ffffffff82269050 T smu7_disable_clock_power_gating +ffffffff822690e0 T smu7_powergate_uvd +ffffffff822691d0 T smu7_powergate_vce +ffffffff822692c0 T smu7_update_clock_gatings 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smu7_get_power_profile_mode +ffffffff82272c50 t smu7_set_power_profile_mode +ffffffff82272eb0 t smu7_odn_edit_dpm_table +ffffffff82273060 t phm_add_voltage +ffffffff82273170 t smu7_copy_and_switch_arb_sets +ffffffff822733a0 t smu7_check_dpm_table_updated +ffffffff82273500 t smu7_odn_initial_default_setting +ffffffff82273630 t smu7_set_dpm_event_sources +ffffffff82273750 t smu7_get_pp_table_entry_callback_func_v0 +ffffffff82273c10 t smu7_get_pp_table_entry_callback_func_v1 +ffffffff82275000 T smu7_enable_didt_config +ffffffff822753b0 t smu7_program_pt_config_registers +ffffffff82275580 t smu7_enable_didt +ffffffff82275770 T smu7_disable_didt_config +ffffffff82275830 T smu7_enable_smc_cac +ffffffff822758c0 T smu7_disable_smc_cac +ffffffff82275950 T smu7_set_power_limit +ffffffff822759b0 T smu7_enable_power_containment +ffffffff82275b40 T smu7_disable_power_containment +ffffffff82275c60 T smu7_power_control_set_level +ffffffff82276000 T smu7_fan_ctrl_get_fan_speed_info +ffffffff82276080 T smu7_fan_ctrl_get_fan_speed_pwm +ffffffff82276150 T smu7_fan_ctrl_get_fan_speed_rpm +ffffffff82276200 T smu7_fan_ctrl_set_static_mode +ffffffff82276330 T smu7_fan_ctrl_set_default_mode +ffffffff82276410 T smu7_fan_ctrl_start_smc_fan_control +ffffffff82276540 T smu7_fan_ctrl_stop_smc_fan_control +ffffffff82276560 T smu7_fan_ctrl_set_fan_speed_pwm +ffffffff82276740 T smu7_fan_ctrl_reset_fan_speed_to_default +ffffffff82276930 T smu7_fan_ctrl_set_fan_speed_rpm +ffffffff82276b10 T smu7_thermal_get_temperature +ffffffff82276b70 T smu7_thermal_disable_alert +ffffffff82276c10 T smu7_thermal_stop_thermal_controller +ffffffff82276d90 T smu7_start_thermal_controller +ffffffff82277120 T smu7_thermal_ctrl_uninitialize_thermal_controller +ffffffff82278000 T smu8_init_function_pointers +ffffffff82278040 t smu8_hwmgr_backend_init +ffffffff82278520 t smu8_hwmgr_backend_fini +ffffffff822785a0 t smu8_setup_asic_task +ffffffff82278ac0 t smu8_get_power_state_size +ffffffff82278af0 t smu8_apply_state_adjust_rules +ffffffff82278c40 t smu8_dpm_force_dpm_level +ffffffff82278f20 t smu8_enable_dpm_tasks +ffffffff822790b0 t smu8_disable_dpm_tasks +ffffffff82279190 t smu8_dpm_patch_boot_state +ffffffff822791f0 t smu8_dpm_get_pp_table_entry +ffffffff82279250 t smu8_dpm_get_num_of_pp_table_entries +ffffffff822792a0 t smu8_dpm_powerdown_uvd +ffffffff822792f0 t smu8_dpm_powergate_vce +ffffffff822794c0 t smu8_dpm_powergate_uvd +ffffffff822796d0 t smu8_dpm_powergate_acp +ffffffff82279730 t smu8_dpm_get_mclk +ffffffff82279760 t smu8_dpm_get_sclk +ffffffff822797d0 t smu8_set_power_state_tasks +ffffffff82279ad0 t smu8_set_cpu_power_state +ffffffff82279b50 t smu8_store_cc6_data +ffffffff82279bd0 t smu8_get_dal_power_level +ffffffff82279c50 t smu8_get_performance_level +ffffffff82279d50 t smu8_get_current_shallow_sleep_clocks +ffffffff82279db0 t smu8_get_clock_by_type +ffffffff82279ef0 t smu8_get_max_high_clocks +ffffffff82279fb0 t smu8_power_off_asic +ffffffff8227a030 t smu8_force_clock_level +ffffffff8227a0a0 t smu8_print_clock_levels +ffffffff8227a280 t smu8_read_sensor +ffffffff8227a590 t smu8_notify_cac_buffer_info +ffffffff8227a640 t smu8_get_thermal_temperature_range +ffffffff8227a6c0 t smu8_dpm_get_pp_table_entry_callback +ffffffff8227b000 T smu9_baco_get_capability +ffffffff8227b0d0 T smu9_baco_get_state +ffffffff8227c000 T convert_to_vid +ffffffff8227c050 T convert_to_vddc +ffffffff8227c090 T phm_copy_clock_limits_array +ffffffff8227c170 T phm_copy_overdrive_settings_limits_array +ffffffff8227c250 T phm_set_field_to_u32 +ffffffff8227c2b0 T phm_wait_on_register +ffffffff8227c3a0 T phm_wait_on_indirect_register +ffffffff8227c4b0 T phm_wait_for_register_unequal +ffffffff8227c580 T phm_wait_for_indirect_register_unequal +ffffffff8227c680 T phm_cf_want_uvd_power_gating +ffffffff8227c6c0 T phm_cf_want_vce_power_gating +ffffffff8227c700 T phm_trim_voltage_table +ffffffff8227c820 T phm_get_svi2_mvdd_voltage_table +ffffffff8227c9a0 T phm_get_svi2_vddci_voltage_table +ffffffff8227cb20 T phm_get_svi2_vdd_voltage_table +ffffffff8227cbc0 T phm_trim_voltage_table_to_fit_state_table +ffffffff8227ccb0 T phm_reset_single_dpm_table +ffffffff8227cd10 T phm_setup_pcie_table_entry +ffffffff8227cd50 T phm_get_dpm_level_enable_mask_value +ffffffff8227ce30 T phm_get_voltage_index +ffffffff8227ceb0 T phm_get_voltage_id +ffffffff8227cf30 T phm_find_closest_vddci +ffffffff8227cfa0 T phm_find_boot_level +ffffffff8227d010 T phm_get_sclk_for_voltage_evv +ffffffff8227d0d0 T phm_initializa_dynamic_state_adjustment_rule_settings +ffffffff8227d1e0 T phm_get_lowest_enabled_level +ffffffff8227d220 T phm_apply_dal_min_voltage_request +ffffffff8227d2f0 T phm_get_voltage_evv_on_sclk +ffffffff8227d3a0 T phm_irq_process +ffffffff8227d540 T smu9_register_irq_handlers +ffffffff8227d5f0 T smu_atom_get_data_table +ffffffff8227d660 T smu_get_voltage_dependency_table_ppt_v1 +ffffffff8227d760 T smu_set_watermarks_for_clocks_ranges +ffffffff8227e000 T tonga_baco_set_state +ffffffff8227f000 T vega10_baco_set_state +ffffffff82280000 T vega10_enable_disable_vce_dpm +ffffffff82280090 T vega10_hwmgr_init +ffffffff822800f0 t vega10_hwmgr_backend_init +ffffffff82280ef0 t vega10_hwmgr_backend_fini +ffffffff82280f60 t vega10_setup_asic_task +ffffffff82281090 t vega10_get_power_state_size +ffffffff822810c0 t vega10_apply_state_adjust_rules +ffffffff82281420 t vega10_dpm_force_dpm_level +ffffffff82281880 t vega10_enable_dpm_tasks +ffffffff82284650 t vega10_disable_dpm_tasks +ffffffff82284c30 t vega10_patch_boot_state +ffffffff82284c60 t vega10_get_pp_table_entry +ffffffff82284cd0 t vega10_power_gate_vce +ffffffff82284d70 t vega10_power_gate_uvd +ffffffff82284e10 t vega10_dpm_get_mclk +ffffffff82284eb0 t vega10_dpm_get_sclk +ffffffff82284f50 t vega10_set_power_state_tasks +ffffffff822858b0 t vega10_notify_smc_display_config_after_ps_adjustment +ffffffff82285a60 t vega10_display_configuration_changed_task +ffffffff82285b30 t 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vega12_thermal_get_temperature +ffffffff822971e0 T vega12_thermal_disable_alert +ffffffff82297270 T vega12_thermal_stop_thermal_controller +ffffffff82297300 T vega12_start_thermal_controller +ffffffff82298000 T vega20_baco_get_capability +ffffffff822980c0 T vega20_baco_get_state +ffffffff82298150 T vega20_baco_set_state +ffffffff82298350 T vega20_baco_apply_vdci_flush_workaround +ffffffff82299000 T vega20_hwmgr_init +ffffffff82299040 t vega20_hwmgr_backend_init +ffffffff82299940 t vega20_hwmgr_backend_fini +ffffffff822999a0 t vega20_setup_asic_task +ffffffff82299a90 t vega20_apply_clocks_adjust_rules +ffffffff82299f40 t vega20_dpm_force_dpm_level +ffffffff8229a6c0 t vega20_enable_dpm_tasks +ffffffff8229ab00 t vega20_disable_dpm_tasks +ffffffff8229aca0 t vega20_power_gate_vce +ffffffff8229add0 t vega20_power_gate_uvd +ffffffff8229ae80 t vega20_dpm_get_mclk +ffffffff8229af80 t vega20_dpm_get_sclk +ffffffff8229b080 t vega20_notify_smc_display_config_after_ps_adjustment +ffffffff8229b1c0 t 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vega20_setup_single_dpm_table +ffffffff822a0360 t vega20_setup_memclk_dpm_table +ffffffff822a03f0 t vega20_get_max_sustainable_clock +ffffffff822a1000 T vega20_set_power_limit +ffffffff822a1050 T vega20_validate_power_level_request +ffffffff822a1090 T vega20_power_control_set_level +ffffffff822a2000 t vega20_pp_tables_initialize +ffffffff822a2760 t vega20_pp_tables_uninitialize +ffffffff822a3000 T vega20_fan_ctrl_stop_smc_fan_control +ffffffff822a3090 T vega20_fan_ctrl_start_smc_fan_control +ffffffff822a3120 T vega20_fan_ctrl_get_fan_speed_pwm +ffffffff822a3250 T vega20_fan_ctrl_set_fan_speed_pwm +ffffffff822a3440 t vega20_fan_ctrl_set_static_mode +ffffffff822a35f0 T vega20_fan_ctrl_get_fan_speed_info +ffffffff822a3630 T vega20_fan_ctrl_get_fan_speed_rpm +ffffffff822a3690 T vega20_fan_ctrl_set_fan_speed_rpm +ffffffff822a3830 T vega20_thermal_get_temperature +ffffffff822a38c0 T vega20_thermal_disable_alert +ffffffff822a3950 T vega20_thermal_stop_thermal_controller +ffffffff822a39e0 T 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vega20_get_enabled_smc_features +ffffffff822c4450 T vega20_set_pptable_driver_address +ffffffff822c44f0 t vega20_smu_init +ffffffff822c48c0 t vega20_smu_fini +ffffffff822c49c0 t vega20_start_smu +ffffffff822c4aa0 t vega20_get_argument +ffffffff822c4b00 t vega20_send_msg_to_smc +ffffffff822c4d50 t vega20_send_msg_to_smc_with_parameter +ffffffff822c4ff0 t vega20_is_dpm_running +ffffffff822c5090 t vega20_smc_table_manager +ffffffff822c6000 t vegam_smu_init +ffffffff822c6090 t vegam_start_smu +ffffffff822c6460 t vegam_update_smc_table +ffffffff822c66d0 t vegam_process_firmware_header +ffffffff822c6820 t vegam_update_sclk_threshold +ffffffff822c6900 t vegam_thermal_setup_fan_table +ffffffff822c6960 t vegam_thermal_avfs_enable +ffffffff822c69f0 t vegam_init_smc_table +ffffffff822c76b0 t vegam_populate_all_graphic_levels +ffffffff822c7df0 t vegam_populate_all_memory_levels +ffffffff822c8110 t vegam_get_offsetof +ffffffff822c81a0 t vegam_get_mac_definition +ffffffff822c8200 t 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T smu_send_hbm_bad_channel_flag +ffffffff822cc290 t smu_set_fan_control_mode +ffffffff822cc350 t smu_get_fan_control_mode +ffffffff822cc3d0 t smu_set_fan_speed_pwm +ffffffff822cc480 t smu_get_fan_speed_pwm +ffffffff822cc4e0 t smu_force_ppclk_levels +ffffffff822cc5a0 t smu_print_ppclk_levels +ffffffff822cc610 t smu_emit_ppclk_levels +ffffffff822cc680 t smu_force_performance_level +ffffffff822cc920 t smu_read_sensor +ffffffff822ccb60 t smu_get_performance_level +ffffffff822ccbd0 t smu_get_current_power_state +ffffffff822ccc30 t smu_get_fan_speed_rpm +ffffffff822ccc90 t smu_set_fan_speed_rpm +ffffffff822ccd40 t smu_get_power_num_states +ffffffff822ccdc0 t smu_sys_get_pp_table +ffffffff822cce30 t smu_sys_set_pp_table +ffffffff822cd020 t smu_switch_power_profile +ffffffff822cd130 t smu_handle_dpm_task +ffffffff822cd1e0 t smu_load_microcode +ffffffff822cd2c0 t smu_dpm_set_power_gate +ffffffff822cd630 t smu_set_power_limit +ffffffff822cd760 t smu_get_power_profile_mode +ffffffff822cd7c0 t smu_set_power_profile_mode +ffffffff822cd820 t smu_od_edit_dpm_table +ffffffff822cd880 t smu_set_mp1_state +ffffffff822cd8e0 t smu_gfx_state_change_set +ffffffff822cd920 t smu_get_sclk +ffffffff822cd9a0 t smu_get_mclk +ffffffff822cda20 t smu_display_configuration_change +ffffffff822cdab0 t smu_get_clock_by_type_with_latency +ffffffff822cdb60 t smu_display_clock_voltage_request +ffffffff822cdbc0 t smu_enable_mgpu_fan_boost +ffffffff822cdc20 t smu_set_display_count +ffffffff822cdc90 t smu_set_deep_sleep_dcefclk +ffffffff822cdd00 t smu_get_baco_capability +ffffffff822cdd60 t smu_baco_set_state +ffffffff822cde40 t smu_sys_get_pp_feature_mask +ffffffff822cdeb0 t smu_sys_set_pp_feature_mask +ffffffff822cdf20 t smu_mode2_reset +ffffffff822cdfc0 t smu_set_df_cstate +ffffffff822ce070 t smu_set_xgmi_pstate +ffffffff822ce120 t smu_sys_get_gpu_metrics +ffffffff822ce180 t smu_set_watermarks_for_clock_ranges +ffffffff822ce200 t smu_display_disable_memory_clock_switch +ffffffff822ce260 t smu_get_max_sustainable_clocks_by_dc +ffffffff822ce2c0 t smu_get_uclk_dpm_states +ffffffff822ce320 t smu_get_dpm_clock_table +ffffffff822ce380 t smu_get_prv_buffer_details +ffffffff822ce3f0 t smu_set_user_clk_dependencies +ffffffff822ce470 t smu_adjust_power_state_dynamic +ffffffff822ce6c0 t smu_apply_default_config_table_settings +ffffffff822ce770 t smu_restore_dpm_user_profile +ffffffff822ceb90 t smu_throttling_logging_work_fn +ffffffff822cebe0 t smu_interrupt_work_fn +ffffffff822cec30 t smu_swctf_delayed_work_handler +ffffffff822ced30 t __delayed_work_tick +ffffffff822ced50 t smu_alloc_dummy_read_table +ffffffff822cee10 t smu_smc_hw_setup +ffffffff822cf560 t smu_set_default_dpm_table +ffffffff822cf710 t smu_get_thermal_temperature_range +ffffffff822cf800 t smu_smc_hw_cleanup +ffffffff822d0000 T arcturus_set_ppt_funcs +ffffffff822d0050 t arcturus_run_btc +ffffffff822d0100 t arcturus_get_allowed_feature_mask +ffffffff822d0150 t arcturus_set_default_dpm_table +ffffffff822d0360 t arcturus_populate_umd_state_clk +ffffffff822d0420 t arcturus_print_clk_levels +ffffffff822d0660 t arcturus_force_clk_levels +ffffffff822d08b0 t arcturus_get_power_profile_mode +ffffffff822d0b40 t arcturus_set_power_profile_mode +ffffffff822d0e30 t arcturus_dpm_set_vcn_enable +ffffffff822d0f00 t arcturus_read_sensor +ffffffff822d10e0 t arcturus_is_dpm_running +ffffffff822d1130 t arcturus_get_fan_speed_pwm +ffffffff822d1270 t arcturus_get_fan_speed_rpm +ffffffff822d1380 t arcturus_get_thermal_temperature_range +ffffffff822d1470 t arcturus_set_performance_level +ffffffff822d1580 t arcturus_dump_pptable +ffffffff822d15b0 t arcturus_get_power_limit +ffffffff822d16b0 t arcturus_set_df_cstate +ffffffff822d17c0 t arcturus_allow_xgmi_power_down +ffffffff822d18b0 t arcturus_i2c_control_init +ffffffff822d19e0 t arcturus_i2c_control_fini +ffffffff822d1a20 t arcturus_get_unique_id +ffffffff822d1b40 t arcturus_init_smc_tables +ffffffff822d1cb0 t arcturus_setup_pptable +ffffffff822d1df0 t arcturus_set_fan_speed_pwm +ffffffff822d1f90 t arcturus_set_fan_speed_rpm +ffffffff822d20b0 t arcturus_log_thermal_throttling_event +ffffffff822d24a0 t arcturus_get_gpu_metrics +ffffffff822d26b0 t arcturus_get_fan_parameters +ffffffff822d26f0 t arcturus_get_current_clk_freq_by_table +ffffffff822d2830 t arcturus_get_smu_metrics_data +ffffffff822d2aa0 t arcturus_upload_dpm_level +ffffffff822d2b90 t arcturus_i2c_xfer +ffffffff822d2e30 t arcturus_i2c_func +ffffffff822d2e60 t arcturus_set_fan_static_mode +ffffffff822d4000 T cyan_skillfish_set_ppt_funcs +ffffffff822d4030 t cyan_skillfish_print_clk_levels +ffffffff822d4150 t cyan_skillfish_od_edit_dpm_table +ffffffff822d4430 t cyan_skillfish_read_sensor +ffffffff822d45e0 t cyan_skillfish_is_dpm_running +ffffffff822d4680 t cyan_skillfish_init_smc_tables +ffffffff822d4760 t cyan_skillfish_get_enabled_mask +ffffffff822d47a0 t cyan_skillfish_get_dpm_ultimate_freq +ffffffff822d4860 t cyan_skillfish_get_gpu_metrics +ffffffff822d4b00 t cyan_skillfish_get_smu_metrics_data +ffffffff822d5000 T navi10_set_ppt_funcs +ffffffff822d5050 t navi10_run_btc +ffffffff822d50d0 t navi10_get_allowed_feature_mask +ffffffff822d53a0 t navi10_set_default_dpm_table +ffffffff822d5810 t navi10_populate_umd_state_clk +ffffffff822d59d0 t navi10_print_clk_levels +ffffffff822d5b60 t navi10_emit_clk_levels +ffffffff822d5d80 t navi10_force_clk_levels +ffffffff822d5eb0 t navi10_od_edit_dpm_table +ffffffff822d6460 t navi10_get_clock_by_type_with_latency +ffffffff822d6560 t navi10_get_power_profile_mode +ffffffff822d67c0 t navi10_set_power_profile_mode +ffffffff822d6a90 t navi10_dpm_set_vcn_enable +ffffffff822d6b20 t navi10_dpm_set_jpeg_enable +ffffffff822d6ba0 t navi10_read_sensor +ffffffff822d6d20 t navi10_pre_display_config_changed +ffffffff822d6dc0 t navi10_display_config_changed +ffffffff822d6e40 t navi10_notify_smc_display_config +ffffffff822d6fc0 t navi10_is_dpm_running +ffffffff822d7010 t navi10_get_fan_speed_rpm +ffffffff822d70b0 t navi10_set_watermarks_table +ffffffff822d7250 t navi10_get_thermal_temperature_range +ffffffff822d7340 t navi10_get_uclk_dpm_states +ffffffff822d7450 t navi10_set_default_od_settings +ffffffff822d76b0 t navi10_display_disable_memory_clock_switch +ffffffff822d7730 t navi10_get_power_limit +ffffffff822d7850 t navi10_update_pcie_parameters +ffffffff822d79c0 t navi10_i2c_control_init +ffffffff822d7af0 t navi10_i2c_control_fini +ffffffff822d7b30 t navi10_init_smc_tables +ffffffff822d7d60 t navi10_setup_pptable +ffffffff822d7f80 t navi10_baco_enter +ffffffff822d7fd0 t navi10_baco_exit +ffffffff822d80d0 t navi1x_get_gpu_metrics +ffffffff822d8a70 t navi10_enable_mgpu_fan_boost +ffffffff822d8af0 t navi10_get_fan_parameters +ffffffff822d8b30 t navi10_post_smu_init +ffffffff822d8db0 t navi10_get_default_config_table_settings +ffffffff822d8e00 t navi10_set_config_table +ffffffff822d8eb0 t navi1x_get_smu_metrics_data +ffffffff822d9540 t navi10_od_setting_check_range +ffffffff822d95f0 t navi10_i2c_xfer +ffffffff822d9890 t navi10_i2c_func +ffffffff822d98c0 t navi10_umc_hybrid_cdr_workaround +ffffffff822da000 T sienna_cichlid_set_ppt_funcs +ffffffff822da050 t sienna_cichlid_run_btc +ffffffff822da0d0 t sienna_cichlid_get_allowed_feature_mask +ffffffff822da350 t sienna_cichlid_set_default_dpm_table +ffffffff822da930 t sienna_cichlid_populate_umd_state_clk +ffffffff822da9f0 t sienna_cichlid_print_clk_levels +ffffffff822dabc0 t sienna_cichlid_force_clk_levels +ffffffff822dacf0 t sienna_cichlid_od_edit_dpm_table +ffffffff822db270 t sienna_cichlid_restore_user_od_settings +ffffffff822db300 t sienna_cichlid_get_power_profile_mode +ffffffff822db560 t sienna_cichlid_set_power_profile_mode +ffffffff822db830 t sienna_cichlid_dpm_set_vcn_enable +ffffffff822db8f0 t sienna_cichlid_dpm_set_jpeg_enable +ffffffff822db970 t sienna_cichlid_read_sensor +ffffffff822dc170 t sienna_cichlid_pre_display_config_changed +ffffffff822dc1a0 t sienna_cichlid_display_config_changed +ffffffff822dc200 t sienna_cichlid_notify_smc_display_config +ffffffff822dc380 t sienna_cichlid_is_dpm_running +ffffffff822dc3d0 t sienna_cichlid_get_fan_speed_rpm +ffffffff822dc4e0 t sienna_cichlid_set_watermarks_table +ffffffff822dc670 t sienna_cichlid_get_thermal_temperature_range +ffffffff822dc750 t sienna_cichlid_get_uclk_dpm_states +ffffffff822dc860 t sienna_cichlid_set_default_od_settings +ffffffff822dca10 t sienna_cichlid_display_disable_memory_clock_switch +ffffffff822dca90 t sienna_cichlid_dump_pptable +ffffffff822dcac0 t sienna_cichlid_get_power_limit +ffffffff822dcb90 t sienna_cichlid_update_pcie_parameters +ffffffff822dcce0 t sienna_cichlid_i2c_control_init +ffffffff822dce10 t sienna_cichlid_i2c_control_fini +ffffffff822dce50 t sienna_cichlid_get_unique_id +ffffffff822dcfa0 t sienna_cichlid_init_smc_tables +ffffffff822dd2c0 t sienna_cichlid_set_mp1_state +ffffffff822dd300 t sienna_cichlid_setup_pptable +ffffffff822dd740 t sienna_cichlid_system_features_control +ffffffff822dd7d0 t sienna_cichlid_baco_enter +ffffffff822dd820 t sienna_cichlid_baco_exit +ffffffff822dd920 t sienna_cichlid_is_mode1_reset_supported +ffffffff822dd9a0 t sienna_cichlid_is_mode2_reset_supported +ffffffff822dd9d0 t sienna_cichlid_mode2_reset +ffffffff822ddb10 t sienna_cichlid_get_dpm_ultimate_freq +ffffffff822ddb30 t sienna_cichlid_get_gpu_metrics +ffffffff822de0b0 t sienna_cichlid_enable_mgpu_fan_boost +ffffffff822de100 t sienna_cichlid_get_fan_parameters +ffffffff822de140 t sienna_cichlid_gpo_control +ffffffff822de1f0 t sienna_cichlid_get_ecc_info +ffffffff822de2e0 t sienna_cichlid_stb_get_data_direct +ffffffff822de380 t sienna_cichlid_get_default_config_table_settings +ffffffff822de3f0 t sienna_cichlid_set_config_table +ffffffff822de4c0 t sienna_cichlid_get_throttler_status_locked +ffffffff822de620 t sienna_cichlid_get_smartshift_power_percentage +ffffffff822de750 t sienna_cichlid_i2c_xfer +ffffffff822de9f0 t sienna_cichlid_i2c_func +ffffffff822df000 T smu_v11_0_init_microcode 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+ffffffff822e0700 T smu_v11_0_get_current_power_limit +ffffffff822e07d0 T smu_v11_0_set_power_limit +ffffffff822e0910 T smu_v11_0_interrupt_work +ffffffff822e0990 T smu_v11_0_enable_thermal_alert +ffffffff822e0a30 T smu_v11_0_disable_thermal_alert +ffffffff822e0a50 T smu_v11_0_get_gfx_vdd +ffffffff822e0b10 T smu_v11_0_display_clock_voltage_request +ffffffff822e0c60 T smu_v11_0_set_hard_freq_limited_range +ffffffff822e0d40 T smu_v11_0_gfx_off_control +ffffffff822e0db0 T smu_v11_0_get_fan_control_mode +ffffffff822e0e00 T smu_v11_0_set_fan_speed_pwm +ffffffff822e0fa0 t smu_v11_0_set_fan_static_mode +ffffffff822e1150 T smu_v11_0_set_fan_speed_rpm +ffffffff822e1270 T smu_v11_0_get_fan_speed_pwm +ffffffff822e13b0 T smu_v11_0_get_fan_speed_rpm +ffffffff822e14b0 T smu_v11_0_set_fan_control_mode +ffffffff822e1650 T smu_v11_0_set_xgmi_pstate +ffffffff822e1670 T smu_v11_0_register_irq_handler +ffffffff822e1730 T smu_v11_0_get_max_sustainable_clocks_by_dc +ffffffff822e17c0 T smu_v11_0_set_azalia_d3_pme +ffffffff822e17e0 T smu_v11_0_baco_set_armd3_sequence +ffffffff822e1800 T smu_v11_0_baco_is_support +ffffffff822e1890 T smu_v11_0_baco_get_state +ffffffff822e18c0 T smu_v11_0_baco_set_state +ffffffff822e1b70 T smu_v11_0_baco_enter +ffffffff822e1c60 T smu_v11_0_baco_exit +ffffffff822e1d00 T smu_v11_0_mode1_reset +ffffffff822e1d80 T smu_v11_0_handle_passthrough_sbr +ffffffff822e1da0 T smu_v11_0_get_dpm_ultimate_freq +ffffffff822e1ee0 T smu_v11_0_set_soft_freq_limited_range +ffffffff822e1fb0 T smu_v11_0_set_performance_level +ffffffff822e2300 T smu_v11_0_set_power_source +ffffffff822e2360 T smu_v11_0_get_dpm_freq_by_index +ffffffff822e2410 T smu_v11_0_get_dpm_level_count +ffffffff822e24b0 T smu_v11_0_set_single_dpm_table +ffffffff822e2710 T smu_v11_0_get_dpm_level_range +ffffffff822e2870 T smu_v11_0_get_current_pcie_link_width_level +ffffffff822e28c0 T smu_v11_0_get_current_pcie_link_width +ffffffff822e2920 T smu_v11_0_get_current_pcie_link_speed_level +ffffffff822e2970 T smu_v11_0_get_current_pcie_link_speed +ffffffff822e29d0 T smu_v11_0_gfx_ulv_control +ffffffff822e2a40 T smu_v11_0_deep_sleep_control +ffffffff822e2bf0 T smu_v11_0_restore_user_od_settings +ffffffff822e2c80 T smu_v11_0_set_smu_mailbox_registers +ffffffff822e2cf0 t smu_v11_0_set_irq_state +ffffffff822e3280 t smu_v11_0_irq_process +ffffffff822e4000 T vangogh_set_ppt_funcs +ffffffff822e4040 t vangogh_set_default_dpm_tables +ffffffff822e4070 t vangogh_common_print_clk_levels +ffffffff822e44e0 t vangogh_force_clk_levels +ffffffff822e4710 t vangogh_od_edit_dpm_table +ffffffff822e4c40 t vangogh_get_power_profile_mode +ffffffff822e4d10 t vangogh_set_power_profile_mode +ffffffff822e4e30 t vangogh_dpm_set_vcn_enable +ffffffff822e4e80 t vangogh_dpm_set_jpeg_enable +ffffffff822e4ed0 t vangogh_read_sensor +ffffffff822e5480 t vangogh_is_dpm_running +ffffffff822e54e0 t vangogh_set_watermarks_table +ffffffff822e5660 t vangogh_set_performance_level +ffffffff822e5e70 t vangogh_get_power_limit +ffffffff822e5fd0 t vangogh_get_ppt_limit +ffffffff822e6040 t vangogh_get_dpm_clock_table +ffffffff822e61b0 t vangogh_init_smc_tables +ffffffff822e63f0 t vangogh_system_features_control +ffffffff822e6440 t vangogh_set_power_limit +ffffffff822e65a0 t vangogh_get_gfxoff_status +ffffffff822e6630 t vangogh_get_gfxoff_entrycount +ffffffff822e66a0 t vangogh_set_gfxoff_residency +ffffffff822e6710 t vangogh_get_gfxoff_residency +ffffffff822e6750 t vangogh_mode2_reset +ffffffff822e6890 t vangogh_common_get_gpu_metrics +ffffffff822e6ef0 t vangogh_post_smu_init +ffffffff822e7090 t vangogh_set_fine_grain_gfx_freq_parameters +ffffffff822e7100 t vangogh_force_dpm_limit_value +ffffffff822e7230 t vangogh_get_dpm_ultimate_freq +ffffffff822e75f0 t vangogh_set_soft_freq_limited_range +ffffffff822e8000 T renoir_set_ppt_funcs +ffffffff822e80a0 t renoir_get_current_power_state +ffffffff822e8120 t renoir_print_clk_levels +ffffffff822e8530 t renoir_force_clk_levels +ffffffff822e8750 t renoir_od_edit_dpm_table +ffffffff822e8a30 t renoir_get_power_profile_mode +ffffffff822e8b00 t renoir_set_power_profile_mode +ffffffff822e8c20 t renoir_dpm_set_vcn_enable +ffffffff822e8ca0 t renoir_dpm_set_jpeg_enable +ffffffff822e8d20 t renoir_read_sensor +ffffffff822e90d0 t renoir_is_dpm_running +ffffffff822e9110 t renoir_set_watermarks_table +ffffffff822e92b0 t renoir_set_performance_level +ffffffff822e97d0 t renoir_get_dpm_clock_table +ffffffff822e9b20 t renoir_init_smc_tables +ffffffff822e9c90 t renoir_get_enabled_mask +ffffffff822e9cd0 t renoir_get_dpm_ultimate_freq +ffffffff822e9f70 t renoir_get_gpu_metrics +ffffffff822ea190 t renoir_gfx_state_change_set +ffffffff822ea1c0 t renoir_set_fine_grain_gfx_freq_parameters +ffffffff822ea260 t renoir_force_dpm_limit_value +ffffffff822eb000 T smu_v12_0_check_fw_status +ffffffff822eb050 T smu_v12_0_check_fw_version +ffffffff822eb110 T smu_v12_0_powergate_sdma +ffffffff822eb150 T smu_v12_0_set_gfx_cgpg +ffffffff822eb1b0 T smu_v12_0_get_gfxoff_status +ffffffff822eb240 T smu_v12_0_gfx_off_control +ffffffff822eb360 T smu_v12_0_fini_smc_tables +ffffffff822eb410 T smu_v12_0_set_default_dpm_tables +ffffffff822eb440 T smu_v12_0_mode2_reset +ffffffff822eb460 T smu_v12_0_set_soft_freq_limited_range +ffffffff822eb5a0 T smu_v12_0_set_driver_table_location +ffffffff822eb610 T smu_v12_0_get_vbios_bootup_values +ffffffff822ec000 T aldebaran_set_ppt_funcs +ffffffff822ec040 t aldebaran_get_allowed_feature_mask +ffffffff822ec090 t aldebaran_set_default_dpm_table +ffffffff822ec290 t aldebaran_populate_umd_state_clk +ffffffff822ec390 t aldebaran_print_clk_levels +ffffffff822ec550 t aldebaran_force_clk_levels +ffffffff822ec710 t aldebaran_usr_edit_dpm_table +ffffffff822ec930 t aldebaran_read_sensor +ffffffff822ecb80 t aldebaran_is_dpm_running +ffffffff822ecbd0 t aldebaran_get_thermal_temperature_range +ffffffff822ecca0 t aldebaran_set_performance_level +ffffffff822ecd50 t aldebaran_get_power_limit +ffffffff822ecee0 t aldebaran_set_df_cstate +ffffffff822ecf60 t aldebaran_allow_xgmi_power_down +ffffffff822ed000 t aldebaran_i2c_control_init +ffffffff822ed0c0 t aldebaran_i2c_control_fini +ffffffff822ed100 t aldebaran_get_unique_id +ffffffff822ed1e0 t aldebaran_init_smc_tables +ffffffff822ed3a0 t aldebaran_set_mp1_state +ffffffff822ed3e0 t aldebaran_setup_pptable +ffffffff822ed4b0 t aldebaran_system_features_control +ffffffff822ed610 t aldebaran_set_power_limit +ffffffff822ed6a0 t aldebaran_is_baco_supported +ffffffff822ed6d0 t aldebaran_is_mode1_reset_supported +ffffffff822ed700 t aldebaran_is_mode2_reset_supported +ffffffff822ed730 t aldebaran_mode1_reset +ffffffff822ed810 t aldebaran_mode2_reset +ffffffff822edb30 t aldebaran_set_soft_freq_limited_range +ffffffff822edd30 t aldebaran_log_thermal_throttling_event +ffffffff822ee040 t aldebaran_get_gpu_metrics +ffffffff822ee2c0 t aldebaran_smu_handle_passthrough_sbr +ffffffff822ee2e0 t aldebaran_smu_send_hbm_bad_page_num +ffffffff822ee360 t aldebaran_get_ecc_info +ffffffff822ee4c0 t aldebaran_send_hbm_bad_channel_flag +ffffffff822ee590 t aldebaran_get_current_clk_freq_by_table +ffffffff822ee760 t aldebaran_upload_dpm_level +ffffffff822ee850 t aldebaran_i2c_xfer +ffffffff822eeaf0 t aldebaran_i2c_func +ffffffff822ef000 T smu_v13_0_init_microcode +ffffffff822ef1d0 T smu_v13_0_fini_microcode +ffffffff822ef250 T smu_v13_0_load_microcode +ffffffff822ef280 T smu_v13_0_init_pptable_microcode +ffffffff822ef430 T smu_v13_0_get_pptable_from_firmware +ffffffff822ef550 T smu_v13_0_check_fw_status +ffffffff822ef5c0 T smu_v13_0_check_fw_version +ffffffff822ef6f0 T smu_v13_0_setup_pptable +ffffffff822ef880 T smu_v13_0_init_smc_tables +ffffffff822ef9d0 T smu_v13_0_fini_smc_tables +ffffffff822efbc0 T smu_v13_0_init_power +ffffffff822efc40 T smu_v13_0_fini_power +ffffffff822efcc0 T smu_v13_0_get_vbios_bootup_values +ffffffff822eff60 T smu_v13_0_notify_memory_pool_location +ffffffff822f0020 T smu_v13_0_set_min_deep_sleep_dcefclk +ffffffff822f00a0 T smu_v13_0_set_driver_table_location +ffffffff822f0110 T smu_v13_0_set_tool_table_location +ffffffff822f0180 T smu_v13_0_init_display_count +ffffffff822f01c0 T smu_v13_0_set_allowed_mask +ffffffff822f0290 T smu_v13_0_gfx_off_control +ffffffff822f0300 T smu_v13_0_system_features_control +ffffffff822f0320 T smu_v13_0_notify_display_change +ffffffff822f0390 T smu_v13_0_init_max_sustainable_clocks +ffffffff822f05f0 t smu_v13_0_get_max_sustainable_clock +ffffffff822f0710 T smu_v13_0_get_current_power_limit +ffffffff822f07e0 T smu_v13_0_set_power_limit +ffffffff822f08f0 T smu_v13_0_enable_thermal_alert +ffffffff822f0980 T smu_v13_0_disable_thermal_alert +ffffffff822f09c0 T smu_v13_0_get_gfx_vdd +ffffffff822f0a80 T smu_v13_0_display_clock_voltage_request +ffffffff822f0bd0 T smu_v13_0_set_hard_freq_limited_range +ffffffff822f0cb0 T smu_v13_0_get_fan_control_mode +ffffffff822f0d00 T smu_v13_0_set_fan_speed_pwm +ffffffff822f0f10 t smu_v13_0_set_fan_static_mode +ffffffff822f10d0 T smu_v13_0_set_fan_control_mode +ffffffff822f1230 T smu_v13_0_set_fan_speed_rpm +ffffffff822f13d0 T smu_v13_0_set_xgmi_pstate +ffffffff822f13f0 T smu_v13_0_register_irq_handler +ffffffff822f14c0 T smu_v13_0_get_max_sustainable_clocks_by_dc +ffffffff822f1550 T smu_v13_0_set_azalia_d3_pme +ffffffff822f1570 T smu_v13_0_wait_for_event +ffffffff822f15d0 T smu_v13_0_get_dpm_ultimate_freq +ffffffff822f1730 T smu_v13_0_set_soft_freq_limited_range +ffffffff822f1800 T smu_v13_0_set_performance_level +ffffffff822f1f60 T smu_v13_0_set_power_source +ffffffff822f1fc0 T smu_v13_0_set_single_dpm_table +ffffffff822f22b0 T smu_v13_0_get_dpm_level_range +ffffffff822f2440 T smu_v13_0_get_current_pcie_link_width_level +ffffffff822f2490 T smu_v13_0_get_current_pcie_link_width +ffffffff822f24f0 T smu_v13_0_get_current_pcie_link_speed_level +ffffffff822f2540 T smu_v13_0_get_current_pcie_link_speed +ffffffff822f2590 T smu_v13_0_set_vcn_enable +ffffffff822f2640 T smu_v13_0_set_jpeg_enable +ffffffff822f2660 T smu_v13_0_run_btc +ffffffff822f26e0 T smu_v13_0_gpo_control +ffffffff822f2770 T smu_v13_0_deep_sleep_control +ffffffff822f29d0 T smu_v13_0_gfx_ulv_control +ffffffff822f2a40 T smu_v13_0_baco_set_armd3_sequence +ffffffff822f2a60 T smu_v13_0_baco_is_support +ffffffff822f2af0 T smu_v13_0_baco_get_state +ffffffff822f2b20 T smu_v13_0_baco_set_state +ffffffff822f2be0 T smu_v13_0_baco_enter +ffffffff822f2cf0 T smu_v13_0_baco_exit +ffffffff822f2d90 T smu_v13_0_set_gfx_power_up_by_imu +ffffffff822f2dd0 T smu_v13_0_od_edit_dpm_table +ffffffff822f3080 T smu_v13_0_set_default_dpm_tables +ffffffff822f30b0 T smu_v13_0_set_smu_mailbox_registers +ffffffff822f3120 T smu_v13_0_mode1_reset +ffffffff822f31a0 T smu_v13_0_update_pcie_parameters +ffffffff822f3410 t smu_v13_0_set_irq_state +ffffffff822f39a0 t smu_v13_0_irq_process +ffffffff822f4000 T smu_v13_0_0_set_ppt_funcs +ffffffff822f40e0 t smu_v13_0_0_get_allowed_feature_mask +ffffffff822f4220 t smu_v13_0_0_set_default_dpm_table +ffffffff822f4640 t smu_v13_0_0_populate_umd_state_clk +ffffffff822f4780 t smu_v13_0_0_print_clk_levels +ffffffff822f4890 t smu_v13_0_0_force_clk_levels +ffffffff822f4a10 t smu_v13_0_0_get_power_profile_mode +ffffffff822f4c70 t smu_v13_0_0_set_power_profile_mode +ffffffff822f4ec0 t smu_v13_0_0_read_sensor +ffffffff822f50e0 t smu_v13_0_0_is_dpm_running +ffffffff822f5130 t smu_v13_0_0_get_fan_speed_pwm +ffffffff822f5210 t smu_v13_0_0_get_fan_speed_rpm +ffffffff822f5280 t smu_v13_0_0_get_thermal_temperature_range +ffffffff822f5380 t smu_v13_0_0_dump_pptable +ffffffff822f53b0 t smu_v13_0_0_get_power_limit +ffffffff822f5490 t smu_v13_0_0_set_df_cstate +ffffffff822f54b0 t smu_v13_0_0_i2c_control_init +ffffffff822f55e0 t smu_v13_0_0_i2c_control_fini +ffffffff822f5620 t smu_v13_0_0_get_unique_id +ffffffff822f56c0 t smu_v13_0_0_init_smc_tables +ffffffff822f58b0 t smu_v13_0_0_set_mp1_state +ffffffff822f58f0 t smu_v13_0_0_setup_pptable +ffffffff822f5a30 t smu_v13_0_0_system_features_control +ffffffff822f5a40 t smu_v13_0_0_baco_enter +ffffffff822f5a90 t smu_v13_0_0_baco_exit +ffffffff822f5af0 t smu_v13_0_0_is_mode1_reset_supported +ffffffff822f5b50 t smu_v13_0_0_mode1_reset +ffffffff822f5be0 t smu_v13_0_0_get_dpm_ultimate_freq +ffffffff822f5d00 t smu_v13_0_0_get_gpu_metrics +ffffffff822f6120 t smu_v13_0_0_enable_mgpu_fan_boost +ffffffff822f6170 t smu_v13_0_0_smu_send_bad_mem_page_num +ffffffff822f61f0 t smu_v13_0_0_send_bad_mem_channel_flag +ffffffff822f6270 t smu_v13_0_0_i2c_xfer +ffffffff822f6510 t smu_v13_0_0_i2c_func +ffffffff822f7000 T smu_v13_0_4_set_ppt_funcs +ffffffff822f70b0 t smu_v13_0_4_print_clk_levels +ffffffff822f7120 t smu_v13_0_4_force_clk_levels +ffffffff822f73c0 t smu_v13_0_4_read_sensor +ffffffff822f7670 t smu_v13_0_4_is_dpm_running +ffffffff822f76c0 t smu_v13_0_4_set_watermarks_table +ffffffff822f7840 t smu_v13_0_4_set_performance_level +ffffffff822f7d80 t smu_v13_0_4_init_smc_tables +ffffffff822f7ef0 t smu_v13_0_4_fini_smc_tables +ffffffff822f7fa0 t smu_v13_0_4_system_features_control +ffffffff822f7ff0 t smu_v13_0_4_mode2_reset +ffffffff822f8010 t smu_v13_0_4_get_dpm_ultimate_freq +ffffffff822f8430 t smu_v13_0_4_get_gpu_metrics +ffffffff822f8600 t smu_v13_0_4_set_fine_grain_gfx_freq_parameters +ffffffff822f8660 t smu_v13_0_4_get_current_clk_freq +ffffffff822f9000 T smu_v13_0_5_set_ppt_funcs +ffffffff822f9090 t smu_v13_0_5_set_default_dpm_tables +ffffffff822f90c0 t smu_v13_0_5_print_clk_levels +ffffffff822f9150 t smu_v13_0_5_force_clk_levels +ffffffff822f92b0 t smu_v13_0_5_od_edit_dpm_table +ffffffff822f9560 t smu_v13_0_5_dpm_set_vcn_enable +ffffffff822f9580 t smu_v13_0_5_dpm_set_jpeg_enable +ffffffff822f95a0 t smu_v13_0_5_read_sensor +ffffffff822f97c0 t smu_v13_0_5_is_dpm_running +ffffffff822f9810 t smu_v13_0_5_set_watermarks_table +ffffffff822f9990 t smu_v13_0_5_set_performance_level +ffffffff822f9b70 t smu_v13_0_5_init_smc_tables +ffffffff822f9ce0 t smu_v13_0_5_fini_smc_tables +ffffffff822f9d90 t smu_v13_0_5_system_features_control +ffffffff822f9de0 t smu_v13_0_5_mode2_reset +ffffffff822f9e60 t smu_v13_0_5_get_dpm_ultimate_freq +ffffffff822fa2a0 t smu_v13_0_5_get_gpu_metrics +ffffffff822fa3f0 t smu_v13_0_5_set_fine_grain_gfx_freq_parameters +ffffffff822fb000 T smu_v13_0_7_set_ppt_funcs +ffffffff822fb050 t smu_v13_0_7_get_allowed_feature_mask +ffffffff822fb1c0 t smu_v13_0_7_set_default_dpm_table +ffffffff822fb5e0 t smu_v13_0_7_populate_umd_state_clk +ffffffff822fb720 t smu_v13_0_7_print_clk_levels +ffffffff822fb830 t smu_v13_0_7_force_clk_levels +ffffffff822fb9b0 t smu_v13_0_7_get_power_profile_mode +ffffffff822fbc90 t smu_v13_0_7_set_power_profile_mode +ffffffff822fbed0 t smu_v13_0_7_read_sensor +ffffffff822fc0e0 t smu_v13_0_7_is_dpm_running +ffffffff822fc130 t smu_v13_0_7_get_fan_speed_pwm +ffffffff822fc210 t smu_v13_0_7_get_fan_speed_rpm +ffffffff822fc280 t smu_v13_0_7_get_thermal_temperature_range +ffffffff822fc380 t smu_v13_0_7_dump_pptable +ffffffff822fc3b0 t smu_v13_0_7_get_power_limit +ffffffff822fc490 t smu_v13_0_7_set_df_cstate +ffffffff822fc4b0 t smu_v13_0_7_init_smc_tables +ffffffff822fc6a0 t smu_v13_0_7_check_fw_status +ffffffff822fc6f0 t smu_v13_0_7_set_mp1_state +ffffffff822fc730 t smu_v13_0_7_setup_pptable +ffffffff822fc890 t smu_v13_0_7_baco_enter +ffffffff822fc8e0 t smu_v13_0_7_baco_exit +ffffffff822fc940 t smu_v13_0_7_is_mode1_reset_supported +ffffffff822fc980 t smu_v13_0_7_get_dpm_ultimate_freq +ffffffff822fcaa0 t smu_v13_0_7_get_gpu_metrics +ffffffff822fceb0 t smu_v13_0_7_enable_mgpu_fan_boost +ffffffff822fd000 T yellow_carp_set_ppt_funcs +ffffffff822fd040 t yellow_carp_set_default_dpm_tables +ffffffff822fd070 t yellow_carp_print_clk_levels +ffffffff822fd0e0 t yellow_carp_force_clk_levels +ffffffff822fd380 t yellow_carp_od_edit_dpm_table +ffffffff822fd630 t yellow_carp_dpm_set_vcn_enable +ffffffff822fd650 t yellow_carp_dpm_set_jpeg_enable +ffffffff822fd670 t yellow_carp_read_sensor +ffffffff822fd9e0 t yellow_carp_is_dpm_running +ffffffff822fda30 t yellow_carp_set_watermarks_table +ffffffff822fdbb0 t yellow_carp_set_performance_level +ffffffff822fe0f0 t yellow_carp_init_smc_tables +ffffffff822fe260 t yellow_carp_fini_smc_tables +ffffffff822fe310 t yellow_carp_system_features_control +ffffffff822fe360 t yellow_carp_get_gfxoff_status +ffffffff822fe3f0 t yellow_carp_mode2_reset +ffffffff822fe470 t yellow_carp_get_dpm_ultimate_freq +ffffffff822fe8b0 t yellow_carp_get_gpu_metrics +ffffffff822fea60 t yellow_carp_post_smu_init +ffffffff822feae0 t yellow_carp_set_fine_grain_gfx_freq_parameters +ffffffff822feb40 t yellow_carp_get_current_clk_freq +ffffffff822ff000 T smu_cmn_send_msg_without_waiting +ffffffff822ff170 T smu_cmn_wait_for_response +ffffffff822ff2a0 T smu_cmn_send_smc_msg_with_param +ffffffff822ff5b0 T smu_cmn_to_asic_specific_index +ffffffff822ff6c0 t __smu_cmn_reg_print_error +ffffffff822ff900 T smu_cmn_send_smc_msg +ffffffff822ff920 T smu_cmn_send_debug_smc_msg +ffffffff822ff9a0 T smu_cmn_feature_is_supported +ffffffff822ffa50 T smu_cmn_feature_is_enabled +ffffffff822ffb40 T smu_cmn_clk_dpm_is_enabled +ffffffff822ffc40 T smu_cmn_get_enabled_mask +ffffffff822ffd30 T smu_cmn_get_indep_throttler_status +ffffffff822ffde0 T smu_cmn_feature_update_enable_state +ffffffff822ffe80 T smu_cmn_feature_set_enabled +ffffffff822fff50 T smu_cmn_get_pp_feature_mask +ffffffff82300100 T smu_cmn_set_pp_feature_mask +ffffffff82300200 T smu_cmn_disable_all_features_with_exception +ffffffff823002b0 T smu_cmn_get_smc_version +ffffffff82300380 T smu_cmn_update_table +ffffffff823004e0 T smu_cmn_write_watermarks_table +ffffffff823005b0 T smu_cmn_write_pptable +ffffffff82300670 T smu_cmn_get_metrics_table +ffffffff823007d0 T smu_cmn_get_combo_pptable +ffffffff823008a0 T smu_cmn_init_soft_gpu_metrics +ffffffff82300980 T smu_cmn_set_mp1_state +ffffffff82300a20 T smu_cmn_is_audio_func_enabled +ffffffff82301000 T pci_mcfg_init +ffffffff82301050 T pci_lookup_segment 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pci_dev_postattach +ffffffff823024f0 T pci_min_powerstate +ffffffff82302500 T pci_set_powerstate_md +ffffffff82303000 T pciide_machdep_compat_intr_establish +ffffffff82303060 T pciide_machdep_compat_intr_disestablish +ffffffff82304000 T vga_post_init +ffffffff82304310 t vm86_emu_inb +ffffffff82304360 t vm86_emu_inw +ffffffff823043a0 t vm86_emu_inl +ffffffff823043e0 t vm86_emu_outb +ffffffff82304430 t vm86_emu_outw +ffffffff82304470 t vm86_emu_outl +ffffffff823044b0 T vga_post_call +ffffffff82304520 T vga_post_free +ffffffff82304590 T ddb_vgapost +ffffffff82305000 T pchbmatch +ffffffff82305040 T pchbattach +ffffffff823054a0 T pchbactivate +ffffffff82305510 T pchb_amd64ht_attach +ffffffff82305660 T pchb_rnd +ffffffff823056e0 T pchb_print +ffffffff82306000 T amas_match +ffffffff82306050 T amas_attach +ffffffff823060b0 T amas_intl_nodes +ffffffff82306140 T amas_get_pagerange +ffffffff82307000 T agp_flush_cache +ffffffff82307030 T agp_flush_cache_range +ffffffff82307040 T agp_init_map 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cardbus_function_enable +ffffffff8230a410 T cardbus_function_disable +ffffffff8230a470 T cardbus_matchbyid +ffffffff8230a4e0 T decode_tuple +ffffffff8230b000 T cardbus_mapreg_map +ffffffff8230b1a0 T cardbus_mapreg_unmap +ffffffff8230c000 T cardbus_read_exrom +ffffffff8230d000 T rbus_space_alloc +ffffffff8230d060 T rbus_space_alloc_subregion +ffffffff8230d230 T rbus_space_free +ffffffff8230d2c0 T rbus_new_body +ffffffff8230d350 T rbus_new_root_delegate +ffffffff8230d420 T rbus_new_root_share +ffffffff8230e000 T com_cardbus_match +ffffffff8230e070 T com_cardbus_attach +ffffffff8230e220 T com_cardbus_detach +ffffffff8230e2c0 T com_cardbus_find_csdev +ffffffff8230e440 T com_cardbus_gofigure +ffffffff8230e900 T com_cardbus_enable +ffffffff8230e9d0 T com_cardbus_disable +ffffffff8230ea20 T com_cardbus_setup +ffffffff8230f000 T xl_cardbus_match +ffffffff8230f080 T xl_cardbus_attach +ffffffff8230f3f0 T xl_cardbus_detach +ffffffff8230f4b0 T xl_cardbus_lookup +ffffffff8230f560 T xl_cardbus_intr_ack +ffffffff82310000 T dc_cardbus_match +ffffffff82310030 T dc_cardbus_attach +ffffffff823103e0 T dc_cardbus_detach +ffffffff82310480 T dc_cardbus_setup +ffffffff82311000 T fxp_cardbus_match +ffffffff82311030 T fxp_cardbus_attach +ffffffff82311240 T fxp_cardbus_detach +ffffffff823112d0 T fxp_cardbus_setup +ffffffff82312000 t rl_cardbus_match +ffffffff82312030 t rl_cardbus_attach +ffffffff823121d0 t rl_cardbus_detach +ffffffff82312290 T rl_cardbus_setup +ffffffff82313000 T re_cardbus_probe +ffffffff82313030 T re_cardbus_attach +ffffffff82313230 T re_cardbus_detach +ffffffff82313310 T re_cardbus_setup +ffffffff82314000 T ath_cardbus_match +ffffffff82314050 T ath_cardbus_attach +ffffffff82314180 T ath_cardbus_detach +ffffffff82314250 T ath_cardbus_enable +ffffffff82314320 T ath_cardbus_disable +ffffffff82314370 T ath_cardbus_power +ffffffff823143b0 T ath_cardbus_setup +ffffffff82315000 T athn_cardbus_match +ffffffff82315030 T athn_cardbus_attach +ffffffff82315170 T athn_cardbus_detach +ffffffff82315210 T athn_cardbus_enable +ffffffff823152e0 T athn_cardbus_disable +ffffffff82315330 T athn_cardbus_power +ffffffff82315370 T athn_cardbus_read +ffffffff823153a0 T athn_cardbus_write +ffffffff823153d0 T athn_cardbus_write_barrier +ffffffff82315400 T athn_cardbus_setup +ffffffff82316000 T atw_cardbus_match +ffffffff82316030 T atw_cardbus_attach +ffffffff82316220 T atw_cardbus_detach +ffffffff823162e0 T atw_cardbus_enable +ffffffff823163b0 T atw_cardbus_disable +ffffffff82316400 T atw_cardbus_power +ffffffff82316440 T atw_cardbus_setup +ffffffff82317000 T rtw_cardbus_match +ffffffff82317030 T rtw_cardbus_attach +ffffffff82317270 T rtw_cardbus_detach +ffffffff82317390 T rtw_cardbus_intr_ack +ffffffff823173b0 T rtw_cardbus_funcregen +ffffffff82317410 T rtw_cardbus_enable +ffffffff82317570 T rtw_cardbus_disable +ffffffff82317650 T rtw_cardbus_power +ffffffff82317690 T rtw_cardbus_setup +ffffffff82318000 T ral_cardbus_match +ffffffff82318030 T ral_cardbus_attach +ffffffff82318230 T ral_cardbus_detach +ffffffff823182e0 T ral_cardbus_activate +ffffffff82318370 T ral_cardbus_enable +ffffffff823184d0 T ral_cardbus_disable +ffffffff82318520 T ral_cardbus_setup +ffffffff823185c0 T ral_cardbus_wakeup +ffffffff82319000 T acx_cardbus_match +ffffffff82319030 T acx_cardbus_attach +ffffffff82319260 T acx_cardbus_detach +ffffffff82319380 T acx_cardbus_enable +ffffffff82319450 T acx_cardbus_disable +ffffffff823194a0 T acx_cardbus_power +ffffffff823194e0 T acx_cardbus_setup +ffffffff8231a000 T pgt_cardbus_match +ffffffff8231a030 T pgt_cardbus_attach +ffffffff8231a230 T pgt_cardbus_detach +ffffffff8231a2e0 T pgt_cardbus_enable +ffffffff8231a440 T pgt_cardbus_disable +ffffffff8231a490 T pgt_cardbus_power +ffffffff8231a4f0 T pgt_cardbus_setup +ffffffff8231b000 T ehci_cardbus_match +ffffffff8231b040 T ehci_cardbus_attach +ffffffff8231b2e0 T ehci_cardbus_detach +ffffffff8231c000 T ohci_cardbus_match +ffffffff8231c040 T ohci_cardbus_attach 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pcmcia_ccr_write +ffffffff82321240 T pcmcia_card_attach +ffffffff82321430 T pcmcia_print +ffffffff82321690 T pcmcia_submatch +ffffffff823216e0 T pcmcia_card_detach +ffffffff82321790 T pcmcia_card_deactivate +ffffffff82321800 T pcmcia_card_gettype +ffffffff82321860 T pcmcia_function_init +ffffffff823218b0 T pcmcia_function_enable +ffffffff82321ce0 T pcmcia_function_disable +ffffffff82321e00 T pcmcia_io_map +ffffffff82322040 T pcmcia_intr_establish +ffffffff823222b0 T pcmcia_card_intr +ffffffff823223d0 T pcmcia_intr_disestablish +ffffffff823225f0 T pcmcia_intr_string +ffffffff82323000 T pcmcia_cis_read_1 +ffffffff823230f0 T pcmcia_read_cis +ffffffff823231e0 T pcmcia_scan_cis +ffffffff82324cd0 T pcmcia_parse_cis_tuple +ffffffff82325e60 T pcmcia_print_cis +ffffffff82327000 T pcmcia_check_cis_quirks +ffffffff82328000 T ep_pcmcia_match +ffffffff82328110 T ep_pcmcia_attach +ffffffff82328520 T ep_pcmcia_detach +ffffffff823285c0 T ep_pcmcia_activate +ffffffff823286a0 T ep_pcmcia_lookup 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wdc_pcmcia_disk_device_interface_callback +ffffffff8232c800 T wdc_pcmcia_disk_device_interface +ffffffff8232c860 T wdc_pcmcia_lookup +ffffffff8232d000 T sm_pcmcia_match +ffffffff8232d100 T sm_pcmcia_attach +ffffffff8232d320 T sm_pcmcia_detach +ffffffff8232d3c0 T sm_pcmcia_activate +ffffffff8232d450 T sm_pcmcia_funce_enaddr +ffffffff8232d470 T sm_pcmcia_ascii_enaddr +ffffffff8232d570 T sm_pcmcia_lannid_ciscallback +ffffffff8232d680 T sm_pcmcia_enable +ffffffff8232d720 T sm_pcmcia_disable +ffffffff8232e000 T xe_pcmcia_match +ffffffff8232e050 T xe_pcmcia_attach +ffffffff8232e5e0 T xe_pcmcia_detach +ffffffff8232e6a0 T xe_pcmcia_activate +ffffffff8232e990 T xe_pcmcia_interpret_manfid +ffffffff8232ea30 T xe_pcmcia_funce_enaddr +ffffffff8232ea50 T xe_ioctl +ffffffff8232eda0 T xe_start +ffffffff8232f030 T xe_watchdog +ffffffff8232f070 T xe_intr +ffffffff8232f430 T xe_full_reset +ffffffff8232fa00 T xe_mdi_read +ffffffff82330390 T xe_mdi_write +ffffffff82330c90 T xe_statchg +ffffffff82330cc0 T xe_mediachange +ffffffff82330d50 T xe_mediastatus +ffffffff82330db0 T xe_init +ffffffff82330e10 T xe_stop +ffffffff82330f40 T xe_reset +ffffffff823310b0 T xe_pcmcia_lan_nid_ciscallback +ffffffff82331200 T xe_pcmcia_manfid_ciscallback +ffffffff82331320 T xe_get +ffffffff823315c0 T xe_set_address +ffffffff82331870 T xe_cycle_power +ffffffff82332000 T wi_pcmcia_match +ffffffff82332130 T wi_pcmcia_attach +ffffffff823323e0 T wi_pcmcia_detach +ffffffff823324a0 T wi_pcmcia_activate +ffffffff82332590 T wi_pcmcia_wakeup +ffffffff82333000 T malo_pcmcia_match +ffffffff82333050 T malo_pcmcia_attach +ffffffff82333220 T malo_pcmcia_detach +ffffffff823332b0 T malo_pcmcia_activate +ffffffff82333520 T cmalo_intr +ffffffff82333780 T cmalo_attach +ffffffff82333c80 T cmalo_detach +ffffffff82333d60 T cmalo_stop +ffffffff82333ea0 T malo_pcmcia_wakeup +ffffffff82333f40 T cmalo_init +ffffffff82334250 T cmalo_intr_mask +ffffffff823342e0 T cmalo_fw_alloc +ffffffff823343b0 T cmalo_fw_load_helper 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domain_map_pthru +ffffffff824e9750 T domain_map_page_intel +ffffffff824e98d0 T iommu_flush_cache +ffffffff824e9920 T iommu_alloc_page +ffffffff824e99c0 T pte_lvl +ffffffff824e9ae0 T domain_map_page_amd +ffffffff824e9bb0 T domain_unload_map +ffffffff824e9dc0 T dom_bdf +ffffffff824e9e90 T domain_load_map +ffffffff824ea0c0 T iommu_enable_translation +ffffffff824ea340 T iommu_flush_tlb +ffffffff824ea4c0 T iommu_flush_write_buffer +ffffffff824ea630 T iommu_set_rtaddr +ffffffff824ea760 T iommu_write_8 +ffffffff824ea790 T iommu_write_4 +ffffffff824ea7c0 T iommu_read_4 +ffffffff824ea7e0 T iommu_alloc_hwdte +ffffffff824ea930 T iommu_issue_qi +ffffffff824ea960 T iommu_flush_tlb_qi +ffffffff824ea990 T iommu_flush_ctx_qi +ffffffff824ea9c0 T ivhd_invalidate_domain +ffffffff824eaa20 T iommu_read_8 +ffffffff824eaa40 T iommu_flush_ctx +ffffffff824eab60 T iommu_enable_qi +ffffffff824eac80 T iommu_showcfg +ffffffff824eaea0 T iommu_init +ffffffff824eb1e0 T acpidmar_intr_establish +ffffffff824eb2f0 T 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thinkpad_volume_down +ffffffff824f7310 T thinkpad_volume_up +ffffffff824f73c0 T thinkpad_get_thinklight +ffffffff824f7410 T thinkpad_adaptive_change +ffffffff824f7530 T thinkpad_get_brightness +ffffffff824f7570 T thinkpad_toggle_wan +ffffffff824f7690 T thinkpad_cmos +ffffffff824f7740 T thinkpad_set_brightness +ffffffff824f7830 T thinkpad_set_thinklight +ffffffff824f78f0 T thinkpad_battery_inhibit_charge +ffffffff824f7a20 T thinkpad_battery_force_discharge +ffffffff824f8000 T toshiba_match +ffffffff824f80a0 T toshiba_attach +ffffffff824f8180 T get_param_brightness +ffffffff824f81e0 T acpitoshiba_get_param +ffffffff824f8240 T set_param_brightness +ffffffff824f82d0 T toshiba_update_brightness +ffffffff824f83d0 T acpitoshiba_set_param +ffffffff824f8470 T toshiba_set_brightness +ffffffff824f8590 T toshiba_enable_events +ffffffff824f8620 T toshiba_read_events +ffffffff824f8780 T toshiba_hotkey +ffffffff824f89b0 T toshiba_get_brightness +ffffffff824f8b20 T toshiba_fn_key_brightness_up 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aplgpio_attach +ffffffff824ff310 T aplgpio_intr +ffffffff824ff460 T aplgpio_read_pin +ffffffff824ff4b0 T aplgpio_write_pin +ffffffff824ff520 T aplgpio_intr_establish +ffffffff824ff640 T aplgpio_intr_enable +ffffffff824ff6d0 T aplgpio_intr_disable +ffffffff82500000 T bytgpio_match +ffffffff82500060 T bytgpio_attach +ffffffff82500320 T bytgpio_intr +ffffffff82500450 T bytgpio_read_pin +ffffffff825004b0 T bytgpio_write_pin +ffffffff82500530 T bytgpio_intr_establish +ffffffff825005a0 T bytgpio_intr_enable +ffffffff82500690 T bytgpio_intr_disable +ffffffff82501000 T chvgpio_match +ffffffff82501060 T chvgpio_attach +ffffffff82501300 T chvgpio_intr +ffffffff825013d0 T chvgpio_read_pin +ffffffff82501480 T chvgpio_write_pin +ffffffff82501540 T chvgpio_intr_establish +ffffffff82501710 T chvgpio_intr_enable +ffffffff825017e0 T chvgpio_intr_disable +ffffffff825018b0 T chvgpio_opreg_handler +ffffffff82501930 T chvgpio_check_pin +ffffffff82502000 T glkgpio_match +ffffffff82502060 T glkgpio_attach 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+ffffffff82514860 T amdgpio_restore +ffffffff825148f0 T amdgpio_save_pin +ffffffff82514960 T amdgpio_restore_pin +ffffffff825149d0 T amdgpio_pin_intr +ffffffff82515000 T acpihid_match +ffffffff82515030 T acpihid_attach +ffffffff82515210 T acpihid_init_dsm +ffffffff82515370 T acpihid_eval +ffffffff82515590 T acpihid_notify +ffffffff825155f0 T acpihid_button_array_enable +ffffffff82516000 t iosf_acpi_match +ffffffff82516050 t iosf_acpi_attach +ffffffff82516150 t iosf_acpi_mbi_mdr_rd +ffffffff825161c0 t iosf_acpi_mbi_mdr_wr +ffffffff82517000 T acpi_match +ffffffff82517060 T acpi_attach +ffffffff825170a0 T acpi_probe +ffffffff82517240 T acpi_map +ffffffff82517330 T acpi_unmap +ffffffff82517380 T acpi_bus_space_map +ffffffff825173a0 T acpi_bus_space_unmap +ffffffff825173c0 T acpi_intr_establish +ffffffff82517500 T acpi_intr_disestablish +ffffffff82517510 T acpi_scan +ffffffff825176b0 T acpi_acquire_glk +ffffffff82517710 T acpi_release_glk +ffffffff82517760 T acpi_attach_machdep +ffffffff825178f0 T acpi_sleep_cpu +ffffffff82517a90 T acpi_resume_cpu +ffffffff82517b90 T sleep_mp +ffffffff82517c80 T resume_mp +ffffffff82517d70 T acpi_iommu_device_map +ffffffff82518000 T hibernate_resume_machdep +ffffffff82518050 T hibernate_drop_to_real_mode +ffffffff82518060 T hibernate_activate_resume_pt_machdep +ffffffff825180a0 T hibernate_switch_stack_machdep +ffffffff825180e0 T hibernate_flush +ffffffff82518110 T acpi_savecpu +ffffffff82519000 T sleep_showstate +ffffffff825190f0 T sleep_setstate +ffffffff82519150 T gosleep +ffffffff82519210 T sleep_abort +ffffffff82519240 T sleep_resume +ffffffff825192b0 T suspend_finish +ffffffff8251a000 T acpiopen +ffffffff8251a0d0 T acpiclose +ffffffff8251a160 T acpiioctl +ffffffff8251a2b0 T request_sleep +ffffffff8251a330 T acpi_filtdetach +ffffffff8251a380 T acpi_filtread +ffffffff8251a3c0 T acpikqfilter +ffffffff8251b000 T acpipci_match +ffffffff8251b030 T acpipci_attach +ffffffff8251b2f0 T acpipci_osc +ffffffff8251b430 T acpipci_parse_resources +ffffffff8251b560 T acpipci_attach_bus +ffffffff8251b730 T acpipci_print +ffffffff8251b7a0 T acpipci_attach_busses +ffffffff8251c000 T efiopen +ffffffff8251c040 T eficlose +ffffffff8251c070 T efiioctl +ffffffff8251c110 T efiioc_get_table +ffffffff8251c280 T efiioc_var_get +ffffffff8251c500 T efiioc_var_next +ffffffff8251c720 T efiioc_var_set +ffffffff8251c8a0 T efi_adapt_error +ffffffff8251d000 T efi_match +ffffffff8251d060 T efi_attach +ffffffff8251d330 T efi_map_runtime +ffffffff8251d4b0 T efi_enter +ffffffff8251d550 T efi_leave +ffffffff8251d5d0 T efi_fault +ffffffff8251e000 T vmm_probe +ffffffff8251e050 T vmm_attach +ffffffff8251e170 T vmm_activate +ffffffff8251e2b0 T vmmopen +ffffffff8251e300 T vmmclose +ffffffff8251e330 T vm_find +ffffffff8251e450 T vmmioctl +ffffffff8251e6d0 T vm_create +ffffffff8251e9a0 T vm_get_info +ffffffff8251ebf0 T vm_terminate +ffffffff8251ed60 T vm_resetcpu +ffffffff8251ee80 T vm_share_mem +ffffffff8251efd0 T pledge_ioctl_vmm +ffffffff8251f0c0 T vm_find_vcpu +ffffffff8251f120 T vm_create_check_mem_ranges +ffffffff8251f2e0 T vm_teardown +ffffffff8251f420 T vcpu_must_stop +ffffffff82520000 T vmm_enabled +ffffffff82520080 T vmm_attach_machdep +ffffffff82520230 T vmm_quiesce_vmx +ffffffff82520400 T vmm_activate_machdep +ffffffff82520520 T vmm_stop +ffffffff82520650 T vmm_start +ffffffff82520730 T vmmioctl_machdep +ffffffff82520800 T vm_intr_pending +ffffffff825208a0 T vm_mprotect_ept +ffffffff82520b20 T pledge_ioctl_vmm_machdep +ffffffff82520b70 T vm_rwvmparams +ffffffff82520d00 T vmm_init_pvclock +ffffffff82520dd0 T vm_rwregs +ffffffff82520ee0 T vcpu_readregs_vmx +ffffffff82521310 T vcpu_writeregs_vmx +ffffffff82521780 T vcpu_readregs_svm +ffffffff82521c30 T vcpu_writeregs_svm +ffffffff82522100 T vmm_get_guest_memtype +ffffffff82522180 T vmx_mprotect_ept +ffffffff825223e0 T vmx_pmap_find_pte_ept +ffffffff825224b0 T start_vmm_on_cpu +ffffffff825225d0 T stop_vmm_on_cpu +ffffffff82522670 T vmclear_on_cpu +ffffffff825226f0 T vm_impl_init_vmx +ffffffff82522800 T vm_impl_init_svm +ffffffff82522910 T vm_impl_init +ffffffff825229b0 T vm_impl_deinit +ffffffff825229e0 T vcpu_reload_vmcs_vmx +ffffffff82522b20 T vcpu_reset_regs_svm +ffffffff82522eb0 T svm_setmsrbrw +ffffffff82522fc0 T svm_setmsrbr +ffffffff82523090 T vmm_alloc_vpid +ffffffff825231a0 T svm_setmsrbw +ffffffff82523280 T vmx_setmsrbr +ffffffff82523330 T vmx_setmsrbw +ffffffff825233e0 T vmx_setmsrbrw +ffffffff825234f0 T svm_set_clean +ffffffff82523540 T svm_set_dirty +ffffffff82523590 T vcpu_reset_regs_vmx +ffffffff82523fd0 T vcpu_vmx_check_cap +ffffffff825240d0 T vcpu_vmx_compute_ctrl +ffffffff825242b0 T vcpu_init_vmx +ffffffff82524650 T vcpu_deinit_vmx +ffffffff825247d0 T vcpu_reset_regs +ffffffff82524810 T vcpu_init_svm +ffffffff825249a0 T vcpu_deinit_svm +ffffffff82524ae0 T vcpu_init +ffffffff82524ba0 T vmm_free_vpid +ffffffff82524c10 T vcpu_deinit +ffffffff82524c50 T vm_run +ffffffff82524e10 T vcpu_run_vmx +ffffffff82525600 T vcpu_run_svm +ffffffff82525bf0 T vmm_fpurestore +ffffffff82525cb0 T vmm_fpusave +ffffffff82525d30 T vmm_translate_gva +ffffffff82526040 T vmm_update_pvclock +ffffffff82526140 T vmx_get_exit_info +ffffffff825261a0 T vmx_handle_exit +ffffffff825265d0 T vmx_instruction_error_decode +ffffffff825267a0 T vmm_get_guest_cpu_cpl +ffffffff82526890 T vmx_handle_intr +ffffffff82526920 T svm_handle_hlt +ffffffff82526970 T vmx_handle_hlt +ffffffff82526a20 T svm_handle_exit +ffffffff82526d40 T svm_handle_np_fault +ffffffff82526ee0 T vmm_handle_cpuid +ffffffff82527580 T svm_handle_msr +ffffffff82527850 T svm_handle_xsetbv +ffffffff825278f0 T svm_handle_inout +ffffffff825279f0 T vmm_inject_ud +ffffffff82527a20 T vmm_inject_db +ffffffff82527a50 T vmx_handle_np_fault +ffffffff82527bb0 T vmx_handle_inout +ffffffff82527d30 T vmx_handle_cr +ffffffff82527f30 T vmx_handle_rdmsr +ffffffff82528000 T vmx_handle_wrmsr +ffffffff82528270 T vmx_handle_xsetbv +ffffffff82528340 T vmm_inject_gp +ffffffff82528370 T vmx_get_exit_qualification +ffffffff825283d0 T vmx_get_guest_faulttype +ffffffff82528470 T svm_get_guest_faulttype +ffffffff825284a0 T svm_fault_page +ffffffff82528530 T vmx_fault_page +ffffffff82528680 T vmm_get_guest_cpu_mode +ffffffff82528780 T vmx_load_pdptes +ffffffff82528a00 T vmx_handle_cr0_write +ffffffff82528c10 T vmx_handle_cr4_write +ffffffff82528cb0 T vmm_handle_xsetbv +ffffffff82528d40 T vmx_handle_misc_enable_msr +ffffffff82528da0 T vmm_pat_is_valid +ffffffff82528e80 T vmm_gpa_is_valid +ffffffff82528ef0 T vmx_exit_reason_decode +ffffffff82528f30 T svm_exit_reason_decode +ffffffff82529d40 T vcpu_state_decode +ffffffff8252a000 T vmm_dispatch_intr +ffffffff8252a020 T vmxon +ffffffff8252a050 T vmxoff +ffffffff8252a080 T vmclear +ffffffff8252a0b0 T vmptrld +ffffffff8252a0e0 T vmptrst +ffffffff8252a110 T vmwrite +ffffffff8252a140 T vmread +ffffffff8252a170 T invvpid +ffffffff8252a18b t invvpid_fail +ffffffff8252a192 t invvpid_ret +ffffffff8252a1b0 T invept +ffffffff8252a1cb t invept_fail +ffffffff8252a1d2 t invept_ret +ffffffff8252a1f0 T vmx_enter_guest +ffffffff8252a21b t skip_init +ffffffff8252a2e8 t no_l1df_msr +ffffffff8252a2eb t l1df_tlb_loop +ffffffff8252a304 t l1df_tlb_done +ffffffff8252a30c t l1df_load_cache +ffffffff8252a323 t done_flush +ffffffff8252a3b6 t do_resume +ffffffff8252a43b t fail_launch_or_resume +ffffffff8252a47d t fail_launch_unknown +ffffffff8252a48a t fail_launch_invalid_vmcs +ffffffff8252a497 t fail_launch_valid_vmcs +ffffffff8252a4b4 t vmx_exit_handler_asm +ffffffff8252a579 t restore_host +ffffffff8252a610 T svm_enter_guest +ffffffff8252a7a0 t restore_host_svm +ffffffff8252b000 T sdmmc_match +ffffffff8252b050 T sdmmc_attach +ffffffff8252b390 T sdmmc_detach +ffffffff8252b440 T sdmmc_activate +ffffffff8252b510 T sdmmc_discover_task +ffffffff8252b5d0 T sdmmc_create_thread +ffffffff8252b640 T sdmmc_holds_root_device +ffffffff8252b6a0 T sdmmc_task_thread +ffffffff8252b890 T sdmmc_needs_discover +ffffffff8252b940 T sdmmc_del_task +ffffffff8252b9f0 T sdmmc_card_detach +ffffffff8252bad0 T sdmmc_add_task +ffffffff8252bb50 T sdmmc_card_attach +ffffffff8252bc60 T sdmmc_enable +ffffffff8252bdb0 T sdmmc_scan +ffffffff8252be40 T sdmmc_init +ffffffff8252bf40 T sdmmc_disable +ffffffff8252c0a0 T sdmmc_function_free +ffffffff8252c0c0 T sdmmc_delay +ffffffff8252c110 T sdmmc_select_card +ffffffff8252c330 T sdmmc_set_bus_power +ffffffff8252c4e0 T sdmmc_function_alloc +ffffffff8252c570 T sdmmc_app_command +ffffffff8252c700 T sdmmc_mmc_command +ffffffff8252c780 T sdmmc_go_idle_state +ffffffff8252c890 T sdmmc_send_if_cond +ffffffff8252c9e0 T sdmmc_set_relative_addr +ffffffff8252d000 T sdmmc_cisptr +ffffffff8252d0a0 T sdmmc_read_cis +ffffffff8252d3e0 T sdmmc_print_cis +ffffffff8252d550 T sdmmc_check_cis_quirks +ffffffff8252e000 T sdmmc_io_enable +ffffffff8252e2a0 T sdmmc_io_reset +ffffffff8252e3d0 T sdmmc_io_send_op_cond +ffffffff8252e540 T sdmmc_io_scan +ffffffff8252e690 T sdmmc_io_init +ffffffff8252e7c0 T sdmmc_io_set_highspeed +ffffffff8252ea60 T sdmmc_io_set_bus_width +ffffffff8252ecf0 T sdmmc_io_function_ready +ffffffff8252ee70 T sdmmc_io_read_1 +ffffffff8252efc0 T sdmmc_io_function_enable +ffffffff8252f390 T sdmmc_io_write_1 +ffffffff8252f510 T sdmmc_io_function_disable +ffffffff8252f790 T sdmmc_io_attach +ffffffff8252f880 T sdmmc_print +ffffffff8252fad0 T sdmmc_submatch +ffffffff8252fb50 T sdmmc_io_detach +ffffffff8252fc00 T sdmmc_io_rw_direct +ffffffff8252fda0 T sdmmc_io_rw_extended_subr +ffffffff8252ff40 T sdmmc_io_rw_extended +ffffffff82530340 T sdmmc_io_read_2 +ffffffff825304a0 T sdmmc_io_write_2 +ffffffff82530600 T sdmmc_io_read_4 +ffffffff82530760 T sdmmc_io_write_4 +ffffffff825308c0 T sdmmc_io_read_multi_1 +ffffffff825309b0 T sdmmc_io_write_multi_1 +ffffffff82530aa0 T sdmmc_io_read_region_1 +ffffffff82530b90 T sdmmc_io_write_region_1 +ffffffff82530c80 T sdmmc_io_xchg +ffffffff82530e10 T sdmmc_intr_enable +ffffffff82531080 T sdmmc_intr_disable +ffffffff825312f0 T sdmmc_intr_establish +ffffffff825313f0 T sdmmc_intr_disestablish +ffffffff825314e0 T sdmmc_card_intr +ffffffff82531530 T sdmmc_intr_task +ffffffff825315c0 T sdmmc_io_set_blocklen +ffffffff82532000 T sdmmc_mem_enable +ffffffff82532450 T sdmmc_mem_send_op_cond +ffffffff82532600 T sdmmc_mem_signal_voltage +ffffffff825326c0 T sdmmc_mem_scan +ffffffff825329d0 T sdmmc_decode_csd +ffffffff82532e00 T sdmmc_decode_cid +ffffffff825332a0 T sdmmc_mem_send_scr +ffffffff825333e0 T sdmmc_mem_decode_scr +ffffffff82533440 T sdmmc_mem_send_cxd_data +ffffffff825335b0 T sdmmc_mem_set_bus_width +ffffffff825336c0 T sdmmc_mem_sd_switch +ffffffff82533970 T sdmmc_be512_to_bitfield512 +ffffffff82533a20 T sdmmc_mem_mmc_switch +ffffffff82533b10 T sdmmc_mem_init +ffffffff82533c60 T sdmmc_mem_set_blocklen +ffffffff82533d60 T sdmmc_mem_sd_init +ffffffff82534140 T sdmmc_mem_mmc_init +ffffffff82534800 T sdmmc_mem_select_transfer_mode +ffffffff82534880 T sdmmc_mem_execute_tuning +ffffffff82534910 T sdmmc_mem_read_block_subr +ffffffff82534c70 T sdmmc_mem_single_read_block +ffffffff82534d40 T sdmmc_mem_read_block +ffffffff82534ef0 T sdmmc_mem_write_block_subr +ffffffff82535240 T sdmmc_mem_single_write_block +ffffffff82535310 T sdmmc_mem_write_block +ffffffff825354c0 T sdmmc_mem_hibernate_write +ffffffff82536000 T sdmmc_scsi_cmd +ffffffff825361f0 T sdmmc_minphys +ffffffff82536270 T sdmmc_scsi_attach +ffffffff82536460 T sdmmc_alloc_ccbs +ffffffff825365a0 T sdmmc_free_ccbs +ffffffff82536600 T sdmmc_scsi_detach +ffffffff82536760 T sdmmc_stimeout +ffffffff825367e0 T sdmmc_ccb_alloc +ffffffff82536890 T sdmmc_ccb_free +ffffffff82536970 T sdmmc_inquiry +ffffffff82536be0 T sdmmc_start_xs +ffffffff82536cd0 T sdmmc_complete_xs +ffffffff82536da0 T sdmmc_done_xs +ffffffff82536df0 T sdmmc_scsi_hibernate_io +ffffffff82537000 T bwfm_sdio_preinit +ffffffff825374a0 T bwfm_sdio_txcheck +ffffffff825374e0 T bwfm_sdio_txdata +ffffffff82537550 T bwfm_sdio_txctl +ffffffff825376a0 T bwfm_sdio_buscore_read +ffffffff825376b0 T bwfm_sdio_buscore_write +ffffffff825376d0 T bwfm_sdio_buscore_prepare +ffffffff82537810 T bwfm_sdio_buscore_activate +ffffffff82537890 T bwfm_sdio_match +ffffffff82537940 T bwfm_sdio_attach +ffffffff82537c00 T bwfm_sdio_detach +ffffffff82537c60 T bwfm_sdio_task +ffffffff82537dc0 T bwfm_sdio_write_1 +ffffffff82537df0 T bwfm_sdio_read_1 +ffffffff82537e20 T bwfm_sdio_write_4 +ffffffff82537ed0 T bwfm_sdio_read_4 +ffffffff82537f80 T bwfm_sdio_load_microcode +ffffffff825381e0 T bwfm_sdio_clkctl +ffffffff82538310 T bwfm_sdio_dev_write +ffffffff82538360 T bwfm_sdio_intr +ffffffff825383a0 T bwfm_sdio_ram_read_write +ffffffff825385d0 T bwfm_sdio_htclk +ffffffff82538840 T bwfm_sdio_readshared +ffffffff82538910 T bwfm_sdio_dev_read +ffffffff82538950 T bwfm_sdio_rx_frames +ffffffff82538d00 T bwfm_sdio_tx_frames +ffffffff82538e00 T bwfm_sdio_backplane +ffffffff82538eb0 T bwfm_sdio_buf_read +ffffffff82538f90 T bwfm_sdio_buf_write +ffffffff82539040 T bwfm_sdio_frame_read_write +ffffffff825391c0 T bwfm_sdio_newbuf +ffffffff82539240 T bwfm_sdio_tx_ok +ffffffff825392a0 T bwfm_sdio_tx_ctrlframe +ffffffff825393a0 T bwfm_sdio_tx_dataframe +ffffffff825394f0 T bwfm_sdio_rx_glom +ffffffff8253a000 T onewire_match +ffffffff8253a050 T onewire_attach +ffffffff8253a0f0 T onewire_detach +ffffffff8253a160 T onewire_activate +ffffffff8253a180 T onewire_scan +ffffffff8253a3a0 T onewire_createthread +ffffffff8253a410 T onewire_print +ffffffff8253a4e0 T onewirebus_print +ffffffff8253a530 T onewire_lock +ffffffff8253a550 T onewire_unlock +ffffffff8253a570 T onewire_reset +ffffffff8253a590 T onewire_bit +ffffffff8253a5b0 T onewire_read_byte +ffffffff8253a6f0 T onewire_write_byte +ffffffff8253a7d0 T onewire_read_block +ffffffff8253a870 T onewire_write_block +ffffffff8253a910 T onewire_triplet +ffffffff8253a9f0 T onewire_matchrom +ffffffff8253ab40 T onewire_search +ffffffff8253aee0 T onewire_thread +ffffffff8253b000 T onewire_crc +ffffffff8253b0b0 T onewire_crc16 +ffffffff8253b170 T onewire_famname +ffffffff8253b1b0 T onewire_matchbyfam +ffffffff8253c000 T owid_match +ffffffff8253c030 T owid_attach +ffffffff8253c100 T owid_detach +ffffffff8253c140 T owid_activate +ffffffff8253d000 T owsbm_match +ffffffff8253d030 T owsbm_attach +ffffffff8253d1d0 T owsbm_detach +ffffffff8253d240 T owsbm_activate +ffffffff8253d270 T owsbm_update +ffffffff8253e000 T owtemp_match +ffffffff8253e030 T owtemp_attach +ffffffff8253e130 T owtemp_detach +ffffffff8253e1a0 T owtemp_activate +ffffffff8253e1d0 T owtemp_update +ffffffff8253f000 T owctr_match +ffffffff8253f030 T owctr_attach +ffffffff8253f180 T owctr_detach +ffffffff8253f1f0 T owctr_activate +ffffffff8253f220 T owctr_update +ffffffff8253f250 T owctr_update_counter +ffffffff82540000 A __text_page_start +ffffffff82540000 T Xsyscall_meltdown +ffffffff8254000c T Xsyscall +ffffffff8254026e t Xsyscall_trampback +ffffffff82540280 T intr_user_exit +ffffffff825402c2 t intr_user_exit_post_ast +ffffffff825403ee t Xiretq_trampback +ffffffff825403fa T doreti_iret +ffffffff82541000 T alltraps +ffffffff82541138 T recall_trap +ffffffff82541150 T alltraps_kern +ffffffff82541153 T alltraps_kern_meltdown +ffffffff82542000 ? Xsyscall32 +ffffffff82542000 A __kutext_start +ffffffff82542000 A __text_page_end +ffffffff82543000 ? Xtrap00 +ffffffff82543010 ? Xtrap01 +ffffffff82543020 ? Xtrap02 +ffffffff82543028 c calltrap_specstk +ffffffff825430f0 ? calltrap_specstk_tramp +ffffffff82543110 ? Xtrap03 +ffffffff82543120 ? Xtrap04 +ffffffff82543130 ? Xtrap05 +ffffffff82543140 ? Xtrap06 +ffffffff82543150 ? Xtrap07 +ffffffff82543160 ? Xtrap08 +ffffffff82543170 ? Xtrap09 +ffffffff82543180 ? Xtrap0a +ffffffff82543190 ? Xtrap0b +ffffffff825431a0 ? Xtrap0c +ffffffff825431b0 ? Xtrap0d +ffffffff82543240 ? Xtrap0e +ffffffff82543250 ? Xintrspurious +ffffffff82543250 ? Xtrap0f +ffffffff82543260 ? Xtrap10 +ffffffff82543270 ? Xtrap11 +ffffffff82543280 ? Xtrap12 +ffffffff82543290 ? Xtrap13 +ffffffff825432a0 ? Xtrap14 +ffffffff825432b0 ? Xtrap15 +ffffffff825432c0 ? Xtrap16 +ffffffff825432c0 ? Xtrap17 +ffffffff825432c0 ? Xtrap18 +ffffffff825432c0 ? Xtrap19 +ffffffff825432c0 ? Xtrap1a +ffffffff825432c0 ? Xtrap1b +ffffffff825432c0 ? Xtrap1c +ffffffff825432c0 ? Xtrap1d +ffffffff825432c0 ? Xtrap1e +ffffffff825432c0 ? Xtrap1f +ffffffff825432d0 ? x2apic_eoi +ffffffff825432f0 ? Xintr_lapic_ipi +ffffffff82543330 ? Xipi_invltlb +ffffffff82543360 ? Xipi_invlpg +ffffffff82543390 ? Xipi_invlrange +ffffffff825433d0 ? Xipi_invltlb_pcid +ffffffff82543410 ? Xipi_invlpg_pcid +ffffffff82543460 ? Xipi_invlrange_pcid +ffffffff825434d0 ? Xintr_lapic_ltimer +ffffffff82543510 ? Xintr_xen_upcall +ffffffff82543550 ? Xintr_hyperv_upcall +ffffffff82543590 ? Xintr_legacy0 +ffffffff825435d0 ? Xintr_legacy1 +ffffffff82543610 ? Xintr_legacy2 +ffffffff82543650 ? Xintr_legacy3 +ffffffff82543690 ? Xintr_legacy4 +ffffffff825436d0 ? Xintr_legacy5 +ffffffff82543710 ? Xintr_legacy6 +ffffffff82543750 ? Xintr_legacy7 +ffffffff82543790 ? Xintr_legacy8 +ffffffff825437d0 ? Xintr_legacy9 +ffffffff82543810 ? Xintr_legacy10 +ffffffff82543850 ? Xintr_legacy11 +ffffffff82543890 ? Xintr_legacy12 +ffffffff825438d0 ? Xintr_legacy13 +ffffffff82543910 ? Xintr_legacy14 +ffffffff82543950 ? Xintr_legacy15 +ffffffff82543990 ? Xintr_ioapic_edge0 +ffffffff825439d0 ? Xintr_ioapic_edge1 +ffffffff82543a10 ? Xintr_ioapic_edge2 +ffffffff82543a50 ? Xintr_ioapic_edge3 +ffffffff82543a90 ? Xintr_ioapic_edge4 +ffffffff82543ad0 ? Xintr_ioapic_edge5 +ffffffff82543b10 ? Xintr_ioapic_edge6 +ffffffff82543b50 ? Xintr_ioapic_edge7 +ffffffff82543b90 ? Xintr_ioapic_edge8 +ffffffff82543bd0 ? Xintr_ioapic_edge9 +ffffffff82543c10 ? Xintr_ioapic_edge10 +ffffffff82543c50 ? Xintr_ioapic_edge11 +ffffffff82543c90 ? Xintr_ioapic_edge12 +ffffffff82543cd0 ? Xintr_ioapic_edge13 +ffffffff82543d10 ? Xintr_ioapic_edge14 +ffffffff82543d50 ? Xintr_ioapic_edge15 +ffffffff82543d90 ? Xintr_ioapic_edge16 +ffffffff82543dd0 ? Xintr_ioapic_edge17 +ffffffff82543e10 ? Xintr_ioapic_edge18 +ffffffff82543e50 ? Xintr_ioapic_edge19 +ffffffff82543e90 ? Xintr_ioapic_edge20 +ffffffff82543ed0 ? Xintr_ioapic_edge21 +ffffffff82543f10 ? Xintr_ioapic_edge22 +ffffffff82543f50 ? Xintr_ioapic_edge23 +ffffffff82543f90 ? Xintr_ioapic_edge24 +ffffffff82543fd0 ? Xintr_ioapic_edge25 +ffffffff82544010 ? Xintr_ioapic_edge26 +ffffffff82544050 ? Xintr_ioapic_edge27 +ffffffff82544090 ? Xintr_ioapic_edge28 +ffffffff825440d0 ? Xintr_ioapic_edge29 +ffffffff82544110 ? Xintr_ioapic_edge30 +ffffffff82544150 ? Xintr_ioapic_edge31 +ffffffff82544190 ? Xintr_ioapic_edge32 +ffffffff825441d0 ? Xintr_ioapic_edge33 +ffffffff82544210 ? Xintr_ioapic_edge34 +ffffffff82544250 ? Xintr_ioapic_edge35 +ffffffff82544290 ? Xintr_ioapic_edge36 +ffffffff825442d0 ? Xintr_ioapic_edge37 +ffffffff82544310 ? Xintr_ioapic_edge38 +ffffffff82544350 ? Xintr_ioapic_edge39 +ffffffff82544390 ? Xintr_ioapic_edge40 +ffffffff825443d0 ? Xintr_ioapic_edge41 +ffffffff82544410 ? Xintr_ioapic_edge42 +ffffffff82544450 ? Xintr_ioapic_edge43 +ffffffff82544490 ? Xintr_ioapic_edge44 +ffffffff825444d0 ? Xintr_ioapic_edge45 +ffffffff82544510 ? Xintr_ioapic_edge46 +ffffffff82544550 ? Xintr_ioapic_edge47 +ffffffff82544590 ? Xintr_ioapic_edge48 +ffffffff825445d0 ? Xintr_ioapic_edge49 +ffffffff82544610 ? Xintr_ioapic_edge50 +ffffffff82544650 ? Xintr_ioapic_edge51 +ffffffff82544690 ? Xintr_ioapic_edge52 +ffffffff825446d0 ? Xintr_ioapic_edge53 +ffffffff82544710 ? Xintr_ioapic_edge54 +ffffffff82544750 ? Xintr_ioapic_edge55 +ffffffff82544790 ? Xintr_ioapic_edge56 +ffffffff825447d0 ? Xintr_ioapic_edge57 +ffffffff82544810 ? Xintr_ioapic_edge58 +ffffffff82544850 ? Xintr_ioapic_edge59 +ffffffff82544890 ? Xintr_ioapic_edge60 +ffffffff825448d0 ? Xintr_ioapic_edge61 +ffffffff82544910 ? Xintr_ioapic_edge62 +ffffffff82544950 ? Xintr_ioapic_edge63 +ffffffff82544990 ? Xintr_ioapic_level0 +ffffffff825449d0 ? Xintr_ioapic_level1 +ffffffff82544a10 ? Xintr_ioapic_level2 +ffffffff82544a50 ? Xintr_ioapic_level3 +ffffffff82544a90 ? Xintr_ioapic_level4 +ffffffff82544ad0 ? Xintr_ioapic_level5 +ffffffff82544b10 ? Xintr_ioapic_level6 +ffffffff82544b50 ? Xintr_ioapic_level7 +ffffffff82544b90 ? Xintr_ioapic_level8 +ffffffff82544bd0 ? Xintr_ioapic_level9 +ffffffff82544c10 ? Xintr_ioapic_level10 +ffffffff82544c50 ? Xintr_ioapic_level11 +ffffffff82544c90 ? Xintr_ioapic_level12 +ffffffff82544cd0 ? Xintr_ioapic_level13 +ffffffff82544d10 ? Xintr_ioapic_level14 +ffffffff82544d50 ? Xintr_ioapic_level15 +ffffffff82544d90 ? Xintr_ioapic_level16 +ffffffff82544dd0 ? Xintr_ioapic_level17 +ffffffff82544e10 ? Xintr_ioapic_level18 +ffffffff82544e50 ? Xintr_ioapic_level19 +ffffffff82544e90 ? Xintr_ioapic_level20 +ffffffff82544ed0 ? Xintr_ioapic_level21 +ffffffff82544f10 ? Xintr_ioapic_level22 +ffffffff82544f50 ? Xintr_ioapic_level23 +ffffffff82544f90 ? Xintr_ioapic_level24 +ffffffff82544fd0 ? Xintr_ioapic_level25 +ffffffff82545010 ? Xintr_ioapic_level26 +ffffffff82545050 ? Xintr_ioapic_level27 +ffffffff82545090 ? Xintr_ioapic_level28 +ffffffff825450d0 ? Xintr_ioapic_level29 +ffffffff82545110 ? Xintr_ioapic_level30 +ffffffff82545150 ? Xintr_ioapic_level31 +ffffffff82545190 ? Xintr_ioapic_level32 +ffffffff825451d0 ? Xintr_ioapic_level33 +ffffffff82545210 ? Xintr_ioapic_level34 +ffffffff82545250 ? Xintr_ioapic_level35 +ffffffff82545290 ? Xintr_ioapic_level36 +ffffffff825452d0 ? Xintr_ioapic_level37 +ffffffff82545310 ? Xintr_ioapic_level38 +ffffffff82545350 ? Xintr_ioapic_level39 +ffffffff82545390 ? Xintr_ioapic_level40 +ffffffff825453d0 ? Xintr_ioapic_level41 +ffffffff82545410 ? Xintr_ioapic_level42 +ffffffff82545450 ? Xintr_ioapic_level43 +ffffffff82545490 ? Xintr_ioapic_level44 +ffffffff825454d0 ? Xintr_ioapic_level45 +ffffffff82545510 ? Xintr_ioapic_level46 +ffffffff82545550 ? Xintr_ioapic_level47 +ffffffff82545590 ? Xintr_ioapic_level48 +ffffffff825455d0 ? Xintr_ioapic_level49 +ffffffff82545610 ? Xintr_ioapic_level50 +ffffffff82545650 ? Xintr_ioapic_level51 +ffffffff82545690 ? Xintr_ioapic_level52 +ffffffff825456d0 ? Xintr_ioapic_level53 +ffffffff82545710 ? Xintr_ioapic_level54 +ffffffff82545750 ? Xintr_ioapic_level55 +ffffffff82545790 ? Xintr_ioapic_level56 +ffffffff825457d0 ? Xintr_ioapic_level57 +ffffffff82545810 ? Xintr_ioapic_level58 +ffffffff82545850 ? Xintr_ioapic_level59 +ffffffff82545890 ? Xintr_ioapic_level60 +ffffffff825458d0 ? Xintr_ioapic_level61 +ffffffff82545910 ? Xintr_ioapic_level62 +ffffffff82545950 ? Xintr_ioapic_level63 +ffffffff82546000 ? codepatch_fill_nop +ffffffff82546000 A __cptext_start +ffffffff82546000 A __kutext_end +ffffffff825460b0 ? codepatch_maprw +ffffffff82546190 ? codepatch_unmaprw +ffffffff82546200 ? codepatch_nop +ffffffff82546360 ? codepatch_replace +ffffffff82546510 ? codepatch_call +ffffffff82546530 ? codepatch_jmp +ffffffff82547000 A __cptext_end +ffffffff82547000 A __rodata_start +ffffffff82547000 C _etext +ffffffff82547000 C etext +ffffffff82548000 r seeprom_read +ffffffff82548004 r icl_mg_pll_find_divisors.div1_vals +ffffffff82548028 r gen9bc_tgp_ddc_pin_map +ffffffff82548038 r athn_ac2qid +ffffffff82548038 r athn_ac2qid +ffffffff82548038 r athn_ac2qid +ffffffff82548044 r rtwn_get_rssi.cckoff +ffffffff8254806c r rsu_ac2qid +ffffffff8254807c r pckbc_portcmd +ffffffff82548080 r tht_fifo_write_pad.pad +ffffffff82548088 r rsu_get_rssi.cckoff +ffffffff8254809c r adlp_n_revids +ffffffff825480ec r apple_iso_trans +ffffffff825480f0 r dg2_g12_revid_step_tbl +ffffffff825480f8 r wihap_check_tx.txratetable +ffffffff825480fc r dmamode +ffffffff82548120 r gen9_edram_size_mb.sets +ffffffff82549000 r isomappings +ffffffff82549080 r unimappings +ffffffff82549230 r replacements +ffffffff8254c93f r apollo_pio_rec +ffffffff8259569f r apollo_udma33_tim +ffffffff825a8e8a r pp_r600_decoded_lanes +ffffffff825dbbe6 r cmd680_setup_channel.udma_tbl +ffffffff825e380a r apollo_udma100_tim +ffffffff825e3810 r cmd0646_9_tim_udma +ffffffff825f11c5 r substchar +ffffffff82641eb4 r apollo_udma133_tim +ffffffff82641ebb r apollo_udma66_tim +ffffffff82641ee5 r cy_pio_rec +ffffffff82646eb8 R drm_ca +ffffffff82646ee0 R drm_filtops +ffffffff82646f10 R drmread_filtops +ffffffff82647000 r vga_emulops +ffffffff82647048 R vga_stdscreen +ffffffff82647078 R vga_stdscreen_mono +ffffffff826470a8 R vga_stdscreen_bf +ffffffff826470d8 R vga_40lscreen +ffffffff82647108 R vga_40lscreen_mono +ffffffff82647138 R vga_40lscreen_bf +ffffffff82647168 R vga_50lscreen +ffffffff82647198 R vga_50lscreen_mono +ffffffff826471c8 R vga_50lscreen_bf +ffffffff826471f8 R vga_screenlist +ffffffff82647208 R vga_screenlist_mono +ffffffff82647218 R vga_accessops +ffffffff82647278 r i945_wm_info +ffffffff826472b8 r bgansitopc +ffffffff826472c0 r pctoansi +ffffffff82647300 r sdma_offsets +ffffffff82647300 r sdma_offsets +ffffffff82647338 r iha_rate_tbl +ffffffff82647370 r i830_a_wm_info +ffffffff826473a8 r gen9_edram_size_mb.ways +ffffffff82647408 r aggr_periodic_times +ffffffff82647490 r jsl_ehl_revids +ffffffff82647508 r michael_final.pad +ffffffff82647530 r rt_copysa.maskarray +ffffffff82647538 r i915_wm_info +ffffffff82647540 r amdgpu_ih_clientid_jpeg +ffffffff82647540 r amdgpu_ih_clientid_uvds +ffffffff82647540 r amdgpu_ih_clientid_vcns +ffffffff82647540 r amdgpu_ih_clientid_vcns +ffffffff82647540 r amdgpu_ih_clientid_vcns +ffffffff82647578 r vga_setfontset.cmaptabb +ffffffff82647590 r tgl_revids +ffffffff826475f0 r i830_bc_wm_info +ffffffff82647660 r hsw_activate_psr2.map +ffffffff82647698 r __drm_universal_plane_init.default_modifiers +ffffffff826476a8 r iwn_tid2fifo +ffffffff826476c0 r vga_setfontset.cmaptaba +ffffffff826476c8 r crtc_offsets +ffffffff826476c8 r crtc_offsets +ffffffff826476c8 r crtc_offsets +ffffffff826476e8 r link_speed +ffffffff826476e8 r link_speed +ffffffff826476e8 r link_speed +ffffffff82647770 r rtwn_r88e_get_rssi.cckoff +ffffffff82648000 R edid_vendors +ffffffff826482c0 R edid_nvendors +ffffffff826482d0 R edid_products +ffffffff82648330 R edid_nproducts +ffffffff82648340 r _edid_modes +ffffffff82649000 R videomode_list +ffffffff8264a080 R videomode_count +ffffffff8264b000 r ahc_hard_errors +ffffffff8264b080 r critical_sections +ffffffff8264b0b0 r patches +ffffffff8264bd50 r seqprog +ffffffff8264d000 r ahc_switch +ffffffff8264e000 r termstat_strings +ffffffff8264e020 r critical_sections +ffffffff8264e060 r seqprog +ffffffff8264ed50 r patches +ffffffff82650000 r ahd_switch +ffffffff82651000 R aic_switch +ffffffff82652000 R adw_switch +ffffffff82653000 R gdt_switch +ffffffff82654000 R twe_switch +ffffffff82655000 R ciss_switch +ffffffff82655030 R ciss_level +ffffffff82655050 R ciss_stat +ffffffff82656000 R ami_switch +ffffffff82656028 R ami_raw_switch +ffffffff82657000 R mfi_switch +ffffffff82657028 R mfi_pd_switch +ffffffff82657050 r mfi_iop_xscale +ffffffff82657080 r mfi_iop_ppc +ffffffff826570b0 r mfi_iop_gen2 +ffffffff826570e0 r mfi_iop_skinny +ffffffff82657110 r mfi_bbu_indicators +ffffffff82658000 R qlw_switch +ffffffff82659000 R isp_2100_risc_code +ffffffff8266bbf0 R isp_2200_risc_code +ffffffff8267e990 R isp_2300_risc_code +ffffffff82698408 R qla_switch +ffffffff82698430 r qla_regs_2100 +ffffffff82698460 r qla_regs_2200 +ffffffff82698490 r qla_regs_23XX +ffffffff82699000 R ahci_atascsi_methods +ffffffff8269a000 R nvme_switch +ffffffff8269a028 r nvme_ops +ffffffff8269b000 R mpi_switch +ffffffff8269b060 r bwi_rf_calc_nrssi_slope_11b.save_phy_regs +ffffffff8269b090 r chv_oa_mux_regs +ffffffff8269b0b0 r fiji_clock_stretcher_lookup_table +ffffffff8269b0b0 r tonga_clock_stretcher_lookup_table +ffffffff8269b0d0 r iosf_pci_devices +ffffffff8269b0f0 r link_speed +ffffffff8269b0f0 r link_speed +ffffffff8269b0f0 r link_speed +ffffffff8269b130 r drm_fb_xfrm.default_dst_pitch +ffffffff8269b130 r non_supported_protection +ffffffff8269b230 r tgl_uy_revids +ffffffff8269b280 r bwi_phy_noise_11g_rev1 +ffffffff8269b2f0 r cardslot_process_event.antonym_ev +ffffffff8269b370 r gen11_oa_mux_regs +ffffffff8269b470 r ddr2_cycle_tenths +ffffffff8269b4e0 r rtw_intr_rx.ratetbl +ffffffff8269b550 r abm_config +ffffffff8269b5c0 r getbootinfo.ports +ffffffff8269b610 r reg_offsets +ffffffff8269b620 r bwi_rf_lo_measure_11g.rf_lo_adjust +ffffffff8269b630 r init_non_clock_fields.look_up +ffffffff8269b640 r uftdi_8u232am_getrate.roundoff +ffffffff8269b690 r zyd_rx_data.rates +ffffffff8269b6b0 r ieee80211_ra_valid_tx_mcs.max_mcs +ffffffff8269b6e0 r mmio_invalidate_full.gen8_regs +ffffffff8269b710 r bwi_phy_noise_11g +ffffffff8269b720 r hpt366_pio +ffffffff8269b750 r glk_revids +ffffffff8269b790 r bwi_rf_calc_nrssi_slope_11g.save_phy3_regs +ffffffff8269b7b0 r ether_crc32_be_update.rev +ffffffff8269b7b0 r rtw_grf5101_mac_crypt.caesar +ffffffff8269b800 r snb_b_fdi_train_param +ffffffff8269b8d0 r intel_hpll_vco.elk_vco +ffffffff8269b930 r pin_offsets +ffffffff8269b970 r firmware_list +ffffffff8269b9d0 r atom_arg_shift +ffffffff8269b9d0 r atom_arg_shift +ffffffff8269ba10 r pf_syncookie_wstab +ffffffff8269ba30 r ieee80211_media_init.mopts +ffffffff8269ba90 r add_entropy_words.twist_table +ffffffff8269bb30 r urtw_8225v2_txpwr_cck +ffffffff8269bb50 r bwfm_pci_prio2fifo +ffffffff8269bb50 r ieee80211_up_to_ac.up_to_ac +ffffffff8269bc10 r paritytab +ffffffff8269bc10 r x86emu_parity_tab +ffffffff8269bc30 r legacy_connector_convert +ffffffff8269bc70 r gen7_oa_mux_regs +ffffffff8269bc90 r hsw_oa_mux_regs +ffffffff8269bcb0 r notetab +ffffffff8269bcd0 r urtw_8225v2_txpwr_cck_ch14 +ffffffff8269bcf0 r bwi_rf_calibval.rf_calibvals +ffffffff8269bd90 r pf_syncookie_msstab +ffffffff8269bdf0 r xgmi3x16_pcs_err_status_reg_aldebaran +ffffffff8269be50 r uath_wme_init.uath_wme_11g +ffffffff8269be70 r gen7_oa_b_counters +ffffffff8269bfd0 r icl_revids +ffffffff8269c090 r rtwn_iq_calib_run.reg_adda +ffffffff8269c0d0 r atom_def_dst +ffffffff8269c0d0 r atom_def_dst +ffffffff8269c110 r sha256_initial_hash_value +ffffffff8269c170 r otus_edca_def +ffffffff8269c190 r intel_hpll_vco.blb_vco +ffffffff8269c250 r epic_pci_subsys_info +ffffffff8269c270 r atom_arg_mask +ffffffff8269c270 r atom_arg_mask +ffffffff8269c2d0 r butmap +ffffffff8269c310 r GFX_RLC_SRM_INDEX_CNTL_DATA_OFFSETS +ffffffff8269c350 r comsoft.lsrmap +ffffffff8269c390 r tulip_mii_phy_readspecific.table +ffffffff8269c3b0 r kbl_revids +ffffffff8269c450 r intel_hpll_vco.pnv_vco +ffffffff8269c4b0 r dmapageport +ffffffff8269c570 r intel_hpll_vco.ctg_vco +ffffffff8269c630 r drm_calculate_luminance_range.pre_computed_values +ffffffff8269d000 R sili_atascsi_methods +ffffffff8269e000 R ncr53c9x_switch +ffffffff8269f000 r scf_period +ffffffff826a0000 R siop_script +ffffffff826a05a0 R lun_switch +ffffffff826a05d0 R tag_switch +ffffffff826a0660 R load_dsa +ffffffff826a06c4 R siop_led_on +ffffffff826a06cc R siop_led_off +ffffffff826a06d8 R siop_switch +ffffffff826a1000 R ep_vortex_media +ffffffff826a1100 R ep_default_to_media +ffffffff826a2000 R wi_card_ident +ffffffff826a4000 R ucode_table +ffffffff826a5000 r re_revisions +ffffffff826a5290 r re_kstats_tpl +ffffffff826a7000 R smc91cxx_media +ffffffff826a7010 R smc91cxx_mii_bitbang_ops +ffffffff826a8000 R dl10019_mii_bitbang_ops +ffffffff826a8028 R dl10022_mii_bitbang_ops +ffffffff826a9000 R ax88190_mii_bitbang_ops +ffffffff826ab000 R ac97_audio_default +ffffffff826ab020 R ac97_on_off +ffffffff826ab324 R ac97_mic_select +ffffffff826ab628 R ac97_mono_select +ffffffff826ab92c R ac97_source +ffffffff826abc30 R ac97_volume_stereo +ffffffff826abc4c R ac97_volume_mono +ffffffff826abc70 R source_info +ffffffff826ac470 R ac97_ad +ffffffff826ac580 R ac97_ak +ffffffff826ac610 R ac97_av +ffffffff826ac750 R ac97_rl +ffffffff826ac7a0 R ac97_cm +ffffffff826ac820 R ac97_cr +ffffffff826ac840 R ac97_cs +ffffffff826ac920 R ac97_cx +ffffffff826ac980 R ac97_dt +ffffffff826ac9a0 R ac97_em +ffffffff826ac9d0 R ac97_es +ffffffff826ac9f0 R ac97_is +ffffffff826aca10 R ac97_ic +ffffffff826aca90 R ac97_it +ffffffff826acac0 R ac97_ns +ffffffff826acb80 R ac97_ps +ffffffff826acbb0 R ac97_sl +ffffffff826acbd0 R ac97_st +ffffffff826acd20 R ac97_vi +ffffffff826acd50 R ac97_tt +ffffffff826acdd0 R ac97_ti +ffffffff826acdf0 R ac97_wb +ffffffff826ace10 R ac97_wo +ffffffff826acea0 R ac97_ym +ffffffff826acef0 R ac97_vendors +ffffffff826ad1f0 R ac97enhancement +ffffffff826ad2f0 R ac97feature +ffffffff826ae000 R lm_chips +ffffffff826ae020 R lm78_sensors +ffffffff826ae1a0 R w83627hf_sensors +ffffffff826ae3a0 R w83627ehf_sensors +ffffffff826ae5c0 R w83627dhg_sensors +ffffffff826ae7c0 R nct6776f_sensors +ffffffff826aea00 R nct6779d_sensors +ffffffff826aed60 R w83637hf_sensors +ffffffff826aef20 R w83697hf_sensors +ffffffff826af0c0 R w83781d_sensors +ffffffff826af280 R w83782d_sensors +ffffffff826af480 R w83783s_sensors +ffffffff826af600 R w83791d_sensors +ffffffff826af860 R w83792d_sensors +ffffffff826afae0 R as99127f_sensors +ffffffff826b0000 r ar5k_known_products +ffffffff826b0110 r ar5111_gain_opt +ffffffff826b01e0 r ar5112_gain_opt +ffffffff826b02b0 r ar5k_5ghz_channels +ffffffff826b0a00 r ar5k_2ghz_channels +ffffffff826b0f10 r ar5111_rf +ffffffff826b1350 r ar5112a_rf +ffffffff826b1890 r ar5112_rf +ffffffff826b1da0 r ar5413_rf +ffffffff826b21b0 r ar2413_rf +ffffffff826b24d0 r ar2425_rf +ffffffff826b2830 r ar5111_rfg +ffffffff826b2b30 r ar5112_rfg +ffffffff826b2e30 r ar5413_rfg +ffffffff826b3130 r ar2413_rfg +ffffffff826b3430 r ar5k_rt_11a +ffffffff826b3552 r ar5k_rt_11b +ffffffff826b3674 r ar5k_rt_11g +ffffffff826b3796 r ar5k_rt_xr +ffffffff826b4000 r ar5210_ini +ffffffff826b5000 r ar5211_mode +ffffffff826b52c0 r ar5211_ini +ffffffff826b5ad0 r ar5211_rf +ffffffff826b6000 r ar5212_pcie +ffffffff826b6080 r ar5212_mode +ffffffff826b6310 r ar5212_ini +ffffffff826b6c80 r ar5212_ar5111_mode +ffffffff826b6f20 r ar5212_ar5112_mode +ffffffff826b71b0 r ar5413_mode +ffffffff826b7b10 r ar2413_mode +ffffffff826b8430 r ar2425_mode +ffffffff826b8d90 r ar5111_bbgain +ffffffff826b9090 r ar5112_bbgain +ffffffff826ba000 r athn_5ghz_chans +ffffffff826ba020 r athn_rates +ffffffff826bb000 r athn_rates +ffffffff826bc000 r ar9160_ini +ffffffff826bc068 r ar5416_ini +ffffffff826bc0d0 r ar5416_serdes +ffffffff826bc0e8 r ar9160_1_1_addac +ffffffff826bc0f8 r ar9160_1_0_addac +ffffffff826bc108 r ar5416_2_2_addac +ffffffff826bc118 r ar5416_2_1_addac +ffffffff826bc128 r ar5416_set_power_calib.chainoffset +ffffffff826bc140 r ar9160_bank6tpc_vals +ffffffff826bc1c0 r ar5416_bank6tpc_vals +ffffffff826bc240 r ar5416_bb_rfgain_vals_2g +ffffffff826bc340 r ar5416_bb_rfgain_vals_5g +ffffffff826bc440 r ar5416_bank6_vals +ffffffff826bc4c0 r ar9160_regs +ffffffff826bc540 r ar9160_vals_5g20 +ffffffff826bc640 r ar9160_vals_5g40 +ffffffff826bc740 r ar9160_vals_2g40 +ffffffff826bc840 r ar9160_vals_2g20 +ffffffff826bc940 r ar9160_cm_regs +ffffffff826bcc30 r ar9160_cm_vals +ffffffff826bd210 r ar5416_regs +ffffffff826bd290 r ar5416_vals_5g20 +ffffffff826bd390 r ar5416_vals_5g40 +ffffffff826bd490 r ar5416_vals_2g40 +ffffffff826bd590 r ar5416_vals_2g20 +ffffffff826bd690 r ar5416_cm_regs +ffffffff826bd980 r ar5416_cm_vals +ffffffff826bdf60 r ar5416_serdes_regs +ffffffff826bdf90 r ar5416_serdes_vals +ffffffff826bdfc0 r ar9160_1_1_addac_vals +ffffffff826be040 r ar9160_1_0_addac_vals +ffffffff826be0c0 r ar5416_2_2_addac_vals +ffffffff826be150 r ar5416_2_1_addac_vals +ffffffff826bf000 r ar9280_2_0_ini +ffffffff826bf068 r ar9280_2_0_serdes +ffffffff826bf080 r ar9280_2_0_rx_gain_23db_backoff +ffffffff826bf0a0 r ar9280_2_0_rx_gain_13db_backoff +ffffffff826bf0c0 r ar9280_2_0_rx_gain +ffffffff826bf0e0 r ar9280_2_0_tx_gain_high_power +ffffffff826bf100 r ar9280_2_0_tx_gain +ffffffff826bf120 r ar9280_init_from_rom.chainoffset +ffffffff826bf130 r ar9280_2_0_regs +ffffffff826bf190 r ar9280_2_0_vals_5g20 +ffffffff826bf250 r ar9280_2_0_vals_5g40 +ffffffff826bf310 r ar9280_2_0_vals_2g40 +ffffffff826bf3d0 r ar9280_2_0_vals_2g20 +ffffffff826bf490 r ar9280_2_0_cm_regs +ffffffff826bf740 r ar9280_2_0_cm_vals +ffffffff826bfc90 r ar9280_2_0_fast_clock_regs +ffffffff826bfcb0 r ar9280_2_0_fast_clock_vals_5g20 +ffffffff826bfcf0 r ar9280_2_0_fast_clock_vals_5g40 +ffffffff826bfd30 r ar9280_2_0_serdes_regs +ffffffff826bfd60 r ar9280_2_0_serdes_vals +ffffffff826bfd90 r ar9280_2_0_rx_gain_regs +ffffffff826bfea0 r ar9280_2_0_rx_gain_23db_backoff_vals_5g +ffffffff826c00b0 r ar9280_2_0_rx_gain_23db_backoff_vals_2g +ffffffff826c02c0 r ar9280_2_0_rx_gain_13db_backoff_vals_5g +ffffffff826c04d0 r ar9280_2_0_rx_gain_13db_backoff_vals_2g +ffffffff826c06e0 r ar9280_2_0_rx_gain_vals_5g +ffffffff826c08f0 r ar9280_2_0_rx_gain_vals_2g +ffffffff826c0b00 r ar9280_2_0_tx_gain_regs +ffffffff826c0b40 r ar9280_2_0_tx_gain_high_power_vals_5g +ffffffff826c0bc0 r ar9280_2_0_tx_gain_high_power_vals_2g +ffffffff826c0c40 r ar9280_2_0_tx_gain_vals_5g +ffffffff826c0cc0 r ar9280_2_0_tx_gain_vals_2g +ffffffff826c1000 r ar9271_ini +ffffffff826c1068 r ar9285_1_2_ini +ffffffff826c10d0 r ar9280_2_0_serdes +ffffffff826c10e8 r ar9271_tx_gain_high_power +ffffffff826c1108 r ar9271_tx_gain +ffffffff826c1128 r ar9285_2_0_tx_gain_high_power +ffffffff826c1148 r ar9285_2_0_tx_gain +ffffffff826c1168 r ar9285_1_2_tx_gain_high_power +ffffffff826c1188 r ar9285_1_2_tx_gain +ffffffff826c11b0 r ar9271_regs +ffffffff826c1410 r ar9271_vals_2g40 +ffffffff826c18d0 r ar9271_vals_2g20 +ffffffff826c1d90 r ar9271_cm_regs +ffffffff826c2020 r ar9271_cm_vals +ffffffff826c2540 r ar9285_1_2_regs +ffffffff826c27a0 r ar9285_1_2_vals_2g40 +ffffffff826c2c60 r ar9285_1_2_vals_2g20 +ffffffff826c3120 r ar9285_1_2_cm_regs +ffffffff826c33a0 r ar9285_1_2_cm_vals +ffffffff826c3890 r ar9280_2_0_serdes_regs +ffffffff826c38c0 r ar9280_2_0_serdes_vals +ffffffff826c38f0 r ar9271_tx_gain_regs +ffffffff826c3940 r ar9271_tx_gain_high_power_vals_2g +ffffffff826c39d0 r ar9271_tx_gain_vals_2g +ffffffff826c3a60 r ar9285_1_2_tx_gain_regs +ffffffff826c3ab0 r ar9285_2_0_tx_gain_high_power_vals_2g +ffffffff826c3b50 r ar9285_2_0_tx_gain_vals_2g +ffffffff826c3bf0 r ar9285_1_2_tx_gain_high_power_vals_2g +ffffffff826c3c90 r ar9285_1_2_tx_gain_vals_2g +ffffffff826c4000 r ar9287_1_1_ini +ffffffff826c4068 r ar9280_2_0_serdes +ffffffff826c4080 r ar9287_1_1_rx_gain +ffffffff826c40a0 r ar9287_1_1_tx_gain +ffffffff826c40c0 r ar9287_1_1_regs +ffffffff826c4120 r ar9287_1_1_vals_2g40 +ffffffff826c41d0 r ar9287_1_1_vals_2g20 +ffffffff826c4280 r ar9287_1_1_cm_regs +ffffffff826c4560 r ar9287_1_1_cm_vals +ffffffff826c4b20 r ar9280_2_0_serdes_regs +ffffffff826c4b50 r ar9280_2_0_serdes_vals +ffffffff826c4b80 r ar9287_1_1_rx_gain_regs +ffffffff826c4d90 r ar9287_1_1_rx_gain_vals_2g +ffffffff826c51a0 r ar9287_1_1_tx_gain_regs +ffffffff826c5200 r ar9287_1_1_tx_gain_vals_2g +ffffffff826c6000 r athn_rates +ffffffff826c7000 r ar9485_1_1_ini +ffffffff826c7068 r ar9485_1_1_serdes +ffffffff826c7080 r ar9380_2_2_ini +ffffffff826c70e8 r ar9380_2_2_serdes +ffffffff826c7100 r ar9380_2_2_rx_gain_wo_xlna +ffffffff826c7120 r ar9380_2_2_rx_gain +ffffffff826c7140 r ar9485_1_1_rx_gain +ffffffff826c7160 r ar9380_2_2_tx_gain_high_ob_db +ffffffff826c7180 r ar9380_2_2_tx_gain_low_ob_db +ffffffff826c71a0 r ar9380_2_2_tx_gain_high_power +ffffffff826c71c0 r ar9380_2_2_tx_gain +ffffffff826c71e0 r ar9485_1_1_tx_gain +ffffffff826c7200 r ar9485_1_1_regs +ffffffff826c7270 r ar9485_1_1_vals_2g40 +ffffffff826c7350 r ar9485_1_1_vals_2g20 +ffffffff826c7430 r ar9485_1_1_cm_regs +ffffffff826c7720 r ar9485_1_1_cm_vals +ffffffff826c7d00 r ar9485_1_1_serdes_regs +ffffffff826c7d0c r ar9485_1_1_serdes_vals +ffffffff826c7d20 r ar9380_2_2_regs +ffffffff826c7db0 r ar9380_2_2_vals_5g20 +ffffffff826c7ed0 r ar9380_2_2_vals_5g40 +ffffffff826c7ff0 r ar9380_2_2_vals_2g40 +ffffffff826c8110 r ar9380_2_2_vals_2g20 +ffffffff826c8230 r ar9380_2_2_cm_regs +ffffffff826c85d0 r ar9380_2_2_cm_vals +ffffffff826c8d00 r ar9380_2_2_fast_clock_regs +ffffffff826c8d20 r ar9380_2_2_fast_clock_vals_5g20 +ffffffff826c8d50 r ar9380_2_2_fast_clock_vals_5g40 +ffffffff826c8d74 r ar9380_2_2_serdes_regs +ffffffff826c8d80 r ar9380_2_2_serdes_vals +ffffffff826c8d90 r ar9380_2_2_rx_gain_regs +ffffffff826c8f90 r ar9380_2_2_rx_gain_wo_xlna_vals +ffffffff826c9390 r ar9380_2_2_rx_gain_vals +ffffffff826c9790 r ar9485_1_1_rx_gain_regs +ffffffff826c9890 r ar9485_1_1_rx_gain_vals +ffffffff826c9a90 r ar9380_2_2_tx_gain_regs +ffffffff826c9b60 r ar9380_2_2_tx_gain_high_ob_db_vals_5g +ffffffff826c9d00 r ar9380_2_2_tx_gain_high_ob_db_vals_2g +ffffffff826c9ea0 r ar9380_2_2_tx_gain_low_ob_db_vals_5g +ffffffff826ca040 r ar9380_2_2_tx_gain_low_ob_db_vals_2g +ffffffff826ca1e0 r ar9380_2_2_tx_gain_high_power_vals_5g +ffffffff826ca380 r ar9380_2_2_tx_gain_high_power_vals_2g +ffffffff826ca520 r ar9380_2_2_tx_gain_vals_5g +ffffffff826ca6c0 r ar9380_2_2_tx_gain_vals_2g +ffffffff826ca860 r ar9485_1_1_tx_gain_regs +ffffffff826ca8f0 r ar9485_1_1_tx_gain_vals_2g +ffffffff826caa10 r ar9380_def_rom +ffffffff826cae50 r ar9380_def_rom_h112 +ffffffff826cb290 r ar9380_def_rom_h116 +ffffffff826cb6d0 r ar9380_def_rom_x112 +ffffffff826cbb10 r ar9380_def_rom_x113 +ffffffff826cc000 R atw_txthresh_tab_lo +ffffffff826cc050 R atw_txthresh_tab_hi +ffffffff826cc0a0 r atw_attach.empty_macaddr +ffffffff826cc0b0 r atw_attach.type_strings +ffffffff826cc0d0 r atw_rfmd2958_ifn +ffffffff826cc110 r atw_rfmd2958_rf1r +ffffffff826cc150 r atw_rxintr.rate_tbl +ffffffff826cd000 r rtw_identify_sta.empty_macaddr +ffffffff826ce000 r rtwn_set_key.etherzeroaddr +ffffffff826ce010 r rtl8188eu_rf_prog +ffffffff826ce030 r rtl8188ftv_rf_prog +ffffffff826ce050 r rtl8192e_rf_prog +ffffffff826ce080 r rtl8188ce_rf_prog +ffffffff826ce0a0 r rtl8188ru_rf_prog +ffffffff826ce0c0 r rtl8188cu_rf_prog +ffffffff826ce0e0 r rtl8192ce_rf_prog +ffffffff826ce110 r rtl8188ru_txagc +ffffffff826ce170 r rtl8188eu_rf_regs +ffffffff826ce230 r rtl8188eu_rf_vals +ffffffff826ce3b0 r rtl8188ftv_rf_regs +ffffffff826ce490 r rtl8188ftv_rf_vals +ffffffff826ce640 r rtl8192e_rf_regs +ffffffff826ce710 r rtl8192e_rf_vals +ffffffff826ce8b0 r rtl8192e_rf2_regs +ffffffff826ce950 r rtl8192e_rf2_vals +ffffffff826cea90 r rtl8192ce_rf1_regs +ffffffff826cebb0 r rtl8188ce_rf_vals +ffffffff826cedf0 r rtl8188ru_rf_vals +ffffffff826cf030 r rtl8188cu_rf_vals +ffffffff826cf270 r rtl8192ce_rf1_vals +ffffffff826cf4b0 r rtl8192ce_rf2_regs +ffffffff826cf500 r rtl8192ce_rf2_vals +ffffffff826cf5a0 r rtl8192cu_txagc +ffffffff826d0000 r rt2560_rf2522_r2 +ffffffff826d0040 r rt2560_rf2524_r2 +ffffffff826d0080 r rt2560_rf2525_hi_r2 +ffffffff826d00c0 r rt2560_rf2525_r2 +ffffffff826d0100 r rt2560_rf2525e_r2 +ffffffff826d0140 r rt2560_rf2526_hi_r2 +ffffffff826d0180 r rt2560_rf2526_r2 +ffffffff826d01c0 r rt2560_def_bbp +ffffffff826d0200 r rt2560_def_mac +ffffffff826d1000 r rt2661_rf5225_1 +ffffffff826d1300 r rt2661_rf5225_2 +ffffffff826d1600 r rt2661_def_bbp +ffffffff826d1640 r rt2661_def_mac +ffffffff826d2000 r rt2860_rf2850 +ffffffff826d2430 r rt2860_rates +ffffffff826d24f0 r rt3572_def_rf +ffffffff826d2530 r rt3090_def_rf +ffffffff826d2560 r rt5392_def_rf +ffffffff826d25e0 r rt3290_def_rf +ffffffff826d2640 r rt5390_def_rf +ffffffff826d26c0 r rt5390_def_bbp +ffffffff826d26f0 r rt2860_def_mac +ffffffff826d4000 r acx111_reg +ffffffff826d4040 r acx111_rate_map +ffffffff826d5000 r acx100_reg +ffffffff826d5040 r acx100_txpower_rfmd +ffffffff826d5060 r gen8_rcs_offsets +ffffffff826d5090 r acx100_txpower_maxim +ffffffff826d50b0 r digits +ffffffff826d50b0 r pppdumpb.digits +ffffffff826d50b0 r pppdumpm.digits +ffffffff826d5100 r hangpic +ffffffff826d5140 r gen11_rcs_offsets +ffffffff826d5170 r xehp_rcs_offsets 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xhci_root_ctrl_methods +ffffffff826dc060 R xhci_root_intr_methods +ffffffff826dc090 R xhci_device_ctrl_methods +ffffffff826dc0c0 R xhci_device_intr_methods +ffffffff826dc0f0 R xhci_device_bulk_methods +ffffffff826dc120 R xhci_device_isoc_methods +ffffffff826dc150 R xhci_devd +ffffffff826dc162 R xhci_confd +ffffffff826dc16b R xhci_ifcd +ffffffff826dc174 R xhci_endpd +ffffffff826dc17b R xhci_endpcd +ffffffff826dc181 R xhci_hubd +ffffffff826df000 R radio_ca +ffffffff826e0000 R ipmi_ca +ffffffff826e1000 R vscsi_ca +ffffffff826e1028 R vscsi_switch +ffffffff826e1050 R vscsi_filtops +ffffffff826e2000 R mpath_ca +ffffffff826e2028 R mpath_switch +ffffffff826e3000 R softraid_ca +ffffffff826e3028 R sr_switch +ffffffff826e4000 r spdmem_basic_types +ffffffff826e40a0 r spdmem_parity_types +ffffffff826e40e0 r spdmem_ddr4_decode.ddr4_chipsize +ffffffff826e5000 R kstat_rlock_ops +ffffffff826e5010 R kstat_wlock_ops +ffffffff826e5020 R kstat_mutex_ops +ffffffff826e5030 R kstat_cpu_ops +ffffffff826e5040 r kstat_id_tree_RBT_INFO +ffffffff826e5058 R kstat_id_tree_RBT_TYPE +ffffffff826e5060 r kstat_pv_tree_RBT_INFO +ffffffff826e5078 R kstat_pv_tree_RBT_TYPE +ffffffff826e5080 r kstat_nm_tree_RBT_INFO +ffffffff826e5098 R kstat_nm_tree_RBT_TYPE +ffffffff826e6000 r fuse_rd_filtops +ffffffff826e7000 R fusefs_vfsops +ffffffff826e7070 R fusefs_vars +ffffffff826e8000 R fusefs_vops +ffffffff826e8110 R fusefsread_filtops +ffffffff826e8140 R fusefswrite_filtops +ffffffff826e8170 R fusefsvnode_filtops +ffffffff826e9000 r pf_state_tree_RBT_INFO +ffffffff826e9018 R pf_state_tree_RBT_TYPE +ffffffff826e9020 r pf_state_tree_id_RBT_INFO +ffffffff826e9038 R pf_state_tree_id_RBT_TYPE +ffffffff826e9040 r pf_translate_af.zero +ffffffff826ea000 R hfsc_ops +ffffffff826ea038 R ifq_hfsc_ops +ffffffff826ea040 R hfsc_pf_ops +ffffffff826ea088 R pfq_hfsc_ops +ffffffff826eb000 r fqcodel_ops +ffffffff826eb038 R ifq_fqcodel_ops +ffffffff826eb040 r fqcodel_pf_ops +ffffffff826eb088 R pfq_fqcodel_ops +ffffffff826eb090 r codel_intervals +ffffffff826ec000 r pfsync_bulk_req_state_names +ffffffff826ec030 r pfsync_bulk_req_event_names +ffffffff826ec060 r pfsync_qs +ffffffff826ec0d8 r pfsync_kstat_tpl +ffffffff826ec2e0 r pfsync_acts +ffffffff826ed000 r bio_mappings_RBT_INFO +ffffffff826ed018 R bio_mappings_RBT_TYPE +ffffffff826ee000 R hotplugread_filtops +ffffffff826ef000 R dtps_static +ffffffff826f0000 R db_show_all_cmds +ffffffff826f0180 R db_show_cmds +ffffffff826f04c0 R db_boot_cmds +ffffffff826f05a0 R db_command_table +ffffffff826f1000 R ddb_vars +ffffffff826f2000 R audio_ca +ffffffff826f2028 R audioctlread_filtops +ffffffff826f2058 R audiowrite_filtops +ffffffff826f2088 R audioread_filtops +ffffffff826f3000 R midi_ca +ffffffff826f3028 R midiwrite_filtops +ffffffff826f3058 R midiread_filtops +ffffffff826f4000 r mulawtolin16 +ffffffff826f4200 r lintomulaw +ffffffff826f5000 R randomread_filtops +ffffffff826f5030 R randomwrite_filtops +ffffffff826f6000 R video_ca +ffffffff826f6028 R video_filtops +ffffffff826f7000 R cd9660_vfsops +ffffffff826f8000 R cd9660_vops +ffffffff826f8110 R cd9660_specvops +ffffffff826f8220 R cd9660_fifovops +ffffffff826f8330 R cd9660read_filtops +ffffffff826f8360 R cd9660write_filtops +ffffffff826f8390 R cd9660vnode_filtops +ffffffff826f9000 R udf_vfsops +ffffffff826fa000 R udf_vops +ffffffff826fa110 r mon_lens +ffffffff826fb000 r month_days +ffffffff826fc000 R execsw +ffffffff826fd000 r shstrtab +ffffffff826fe000 R copyright +ffffffff826fe0c0 r initpaths +ffffffff826ff000 R sysent +ffffffff82701000 R bufq_impls +ffffffff82702000 R kqueueops +ffffffff82702038 R kqread_filtops +ffffffff82702068 R proc_filtops +ffffffff82702098 R file_filtops +ffffffff827020c8 R timer_filtops +ffffffff82702100 R sysfilt_ops +ffffffff82702148 R seltrue_filtops +ffffffff82702178 R dead_filtops +ffffffff827021a8 R badfd_filtops +ffffffff827021d8 r mutex_klistops +ffffffff827021f0 r rwlock_klistops +ffffffff82703000 R kv_exec +ffffffff82704000 R addrmask +ffffffff82705000 r rw_ops +ffffffff82706000 r proc_printit.pstat +ffffffff82707000 R pledge_syscalls +ffffffff82707a60 r pledgenames +ffffffff82707cb0 r pledgereq +ffffffff82708000 r unvname_rbt_RBT_INFO +ffffffff82708018 R unvname_rbt_RBT_TYPE +ffffffff82709000 R sig_filtops +ffffffff82709030 R sigprop +ffffffff8270a000 R kern_vars +ffffffff8270a2f0 R hw_vars +ffffffff8270b000 R tc_vars +ffffffff8270c000 r sys_gettimeofday.zerotz +ffffffff8270d000 r taskq_sys_name +ffffffff8270d006 r taskq_sys_mp_name +ffffffff8270d010 R systq +ffffffff8270d018 R systqmp +ffffffff8270f000 r gpt_get_fstype.gpt_uuid_openbsd +ffffffff8270f010 r gpt_get_fstype.gpt_uuid_msdos +ffffffff8270f020 r gpt_get_fstype.gpt_uuid_chromerootfs +ffffffff8270f030 r gpt_get_fstype.gpt_uuid_linux +ffffffff8270f040 r gpt_get_fstype.gpt_uuid_hfs +ffffffff8270f050 r gpt_get_fstype.gpt_uuid_unused +ffffffff8270f060 r gpt_get_fstype.gpt_uuid_efi_system +ffffffff8270f070 r gpt_get_fstype.gpt_uuid_bios_boot +ffffffff82710000 r hiballoc_addr_RBT_INFO +ffffffff82710018 R hiballoc_addr_RBT_TYPE +ffffffff82711000 R logread_filtops +ffffffff82712000 r phtree_RBT_INFO +ffffffff82712018 R phtree_RBT_TYPE +ffffffff82712020 r pool_lock_ops_rw +ffffffff82712058 r pool_lock_ops_mtx +ffffffff82713000 r pselregister.evf +ffffffff8271300c r pselregister.evff +ffffffff82714000 R pipe_rfiltops +ffffffff82714030 R pipe_wfiltops +ffffffff82714060 R pipe_efiltops +ffffffff82714090 r pipeops +ffffffff82715000 R socketops +ffffffff82716000 R sysvsem_vars +ffffffff82717000 R char_type +ffffffff82717100 R ttyread_filtops +ffffffff82717130 R ttywrite_filtops +ffffffff82717160 R ttyexcept_filtops +ffffffff82718000 R ptcread_filtops +ffffffff82718030 R ptcwrite_filtops +ffffffff82718060 R ptcexcept_filtops +ffffffff8271a000 R domains +ffffffff8271b000 R unixdomain +ffffffff8271b050 R unixsw +ffffffff8271c000 R solisten_filtops +ffffffff8271c030 R soread_filtops +ffffffff8271c060 R sowrite_filtops +ffffffff8271c090 R soexcept_filtops +ffffffff8271c0c0 R socket_klistops +ffffffff8271d000 R sun_noname +ffffffff8271d010 R uipc_usrreqs +ffffffff8271d0b0 R uipc_dgram_usrreqs +ffffffff8271d150 R unpstctl_vars +ffffffff8271d180 R unpsqctl_vars +ffffffff8271d1b0 R unpdgctl_vars +ffffffff8271e000 r namecache_rb_cache_RBT_INFO +ffffffff8271e018 R namecache_rb_cache_RBT_TYPE +ffffffff8271f000 R generic_filtops +ffffffff82720000 r buf_rb_bufs_RBT_INFO +ffffffff82720018 R buf_rb_bufs_RBT_TYPE +ffffffff82720020 r typename +ffffffff82721000 R sync_vops +ffffffff82722000 R vnops +ffffffff82723000 R spec_vops +ffffffff82724000 R dead_vops +ffffffff82725000 R fifo_vops +ffffffff82725110 R fiforead_filtops +ffffffff82725140 R fifowrite_filtops +ffffffff82725170 R fifoexcept_filtops +ffffffff82726000 R regyear +ffffffff82726020 R leapyear +ffffffff82726040 r dos2unix +ffffffff82726140 r u2l +ffffffff82726240 r unix2dos +ffffffff82727008 R msdosfs_vfsops +ffffffff82728000 R msdosfs_vops +ffffffff82728110 R msdosfsread_filtops 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pci_subclass_dasp +ffffffff82802c10 R pci_class +ffffffff82802e20 r pci_known_vendors +ffffffff828043e0 r pci_known_products +ffffffff82827000 R vga_pci_ca +ffffffff82827030 r vga_devs +ffffffff82828000 R ahc_pci_ident_table +ffffffff828285d0 R ahc_pci_ca +ffffffff82829000 R ahd_pci_ident_table +ffffffff82829198 R ahd_num_pci_devs +ffffffff828291a0 R ahd_pci_ca +ffffffff828291d0 r pci_bus_modes +ffffffff82829210 r pci_status_strings +ffffffff82829250 r pci_status_source +ffffffff82829290 r split_status_strings +ffffffff8282a000 R adw_pci_ca +ffffffff8282a028 R adw_pci_devices +ffffffff8282b000 r adw_3550_Default_EEPROM +ffffffff8282b080 r adw_38C0800_Default_EEPROM +ffffffff8282b100 r adw_38C1600_Default_EEPROM +ffffffff8282c000 R adw_asc3550_mcode +ffffffff8282d3a0 R adw_asc3550_mcode_data +ffffffff8282d3b0 R adw_asc38C0800_mcode +ffffffff8282e888 R adw_asc38C0800_mcode_data +ffffffff8282e8a0 R adw_asc38C1600_mcode +ffffffff82830160 R adw_asc38C1600_mcode_data +ffffffff82831000 R twe_pci_ca +ffffffff82831028 R twe_pci_devices +ffffffff82832000 R arc_ca +ffffffff82832028 R arc_switch +ffffffff82832050 r arc_devices +ffffffff82832190 r arc_intel +ffffffff82832198 r arc_marvell +ffffffff828321a0 r arc_lsi +ffffffff828321a8 r arc_marvell2 +ffffffff82833000 R jmb_ca +ffffffff82833030 r jmb_devices +ffffffff82834000 R ahci_pci_ca +ffffffff82834028 R ahci_jmb_ca +ffffffff82834050 r ahci_devices +ffffffff82835000 R nvme_pci_ca +ffffffff82835028 r nvme_msi_blacklist +ffffffff82836000 R ami_pci_ca +ffffffff82836030 r ami_pci_subsys +ffffffff82836270 r ami_pci_vendors +ffffffff82837000 R mfi_pci_ca +ffffffff82837030 r mfi_pci_devices +ffffffff82838000 R mfii_ca +ffffffff82838028 R mfii_switch +ffffffff82838050 R mfii_pd_switch +ffffffff82838078 R mfii_iop_thunderbolt +ffffffff82838088 R mfii_iop_25 +ffffffff82838098 R mfii_iop_35 +ffffffff828380b0 R mfii_devices +ffffffff82838140 r mfi_bbu_indicators +ffffffff82839000 R ips_ca +ffffffff82839028 r ips_ids +ffffffff82839040 r ips_chips +ffffffff82839090 r ips_names +ffffffff82839128 r ips_switch +ffffffff82839150 r ips_pt_switch +ffffffff8283a000 R eap_ca +ffffffff8283a028 R eap1370_hw_if +ffffffff8283a0e0 R eap1371_hw_if +ffffffff8283a198 R eap_midi_hw_if +ffffffff8283a1d0 R eap_devices +ffffffff8283b000 R auacer_pci_devices +ffffffff8283b008 R auacer_ca +ffffffff8283b030 R auacer_hw_if +ffffffff8283c000 R auich_ca +ffffffff8283c028 R auich_hw_if +ffffffff8283c0e0 r auich_devices +ffffffff8283d000 R azalia_ca +ffffffff8283d028 R azalia_hw_if +ffffffff8283d0e0 R azalia_pci_devices +ffffffff8283d120 r pin_devices +ffffffff8283d1a0 r line_colors +ffffffff8283d220 r wtypes +ffffffff8283e000 r azalia_codec_init_dolby_atmos.atmos_init +ffffffff8283e050 r azalia_codec_init_dolby_atmos.atmos_v23_v25 +ffffffff8283f000 R envy_ca +ffffffff8283f028 R envy_hw_if +ffffffff8283f0e0 R envy_midi_hw_if +ffffffff82840000 R emuxki_devices +ffffffff82840010 R emu_ca +ffffffff82840038 R emuxki_hw_if +ffffffff828400f0 r emuxki_recbuf_sz +ffffffff82840170 r emuxki_recsrc_szreg +ffffffff8284017c r emuxki_recsrc_bufaddrreg +ffffffff82840190 r emuxki_rate_to_pitch.logMagTable +ffffffff82840390 r emuxki_rate_to_pitch.logSlopeTable +ffffffff82841000 R auixp_pci_devices +ffffffff82841010 R auixp_ca +ffffffff82841038 R auixp_hw_if +ffffffff82842000 R clcs_ca +ffffffff82842028 R cs4280_hw_if +ffffffff828420e0 R cs4280_devices +ffffffff82843000 R yds_ca +ffffffff82843028 r yds_hw_if +ffffffff828430e0 r yds_chip_capability_list +ffffffff82843120 r yds_get_lpfk.lpfkt +ffffffff82843160 r yds_get_lpfq.lpfqt +ffffffff82844000 R auvia_ca +ffffffff82844028 R auvia_hw_if +ffffffff828440e0 R auvia_devices +ffffffff828440f0 r auvia_set_params_sub.slottab +ffffffff82845000 R gdt_pci_ca +ffffffff82846000 R ciss_pci_ca +ffffffff82846030 R ciss_pci_devices +ffffffff82847000 R qlw_pci_ca +ffffffff82847030 r qlw_devices +ffffffff82847050 r isp_1040_risc_code +ffffffff8284c9f0 r isp_1080_risc_code +ffffffff82854470 r isp_12160_risc_code +ffffffff8285c000 R qla_pci_ca +ffffffff8285c030 r qla_devices +ffffffff8285d000 R qle_ca +ffffffff8285d028 R qle_switch +ffffffff8285d050 r qle_devices +ffffffff8285d070 r isp_2400_risc_code +ffffffff8288ca50 r isp_2500_risc_code +ffffffff828bf000 R mpi_pci_ca +ffffffff828bf030 r mpi_devices +ffffffff828c0000 R mpii_ca +ffffffff828c0028 R mpii_switch +ffffffff828c0050 r mpii_devices +ffffffff828c1000 R sili_pci_ca +ffffffff828c1030 r sili_devices +ffffffff828c2000 R aq_devices +ffffffff828c2060 R aq_products +ffffffff828c21d0 R aq_fw1x_ops +ffffffff828c21f8 R aq_fw2x_ops +ffffffff828c2220 R aq2_fw_ops +ffffffff828c2248 R aq_ca +ffffffff828c3000 R de_ca +ffffffff828c3030 r tulip_srom_conninfo +ffffffff828c3120 r tulip_mii_phy_attrlist +ffffffff828c31e0 r tulip_21140_znyx_zx34x_boardsw +ffffffff828c3208 r tulip_21040_10baset_only_boardsw +ffffffff828c3230 r tulip_21040_boardsw +ffffffff828c3258 r tulip_2114x_isv_boardsw +ffffffff828c3280 r tulip_21140_smc9332_boardsw +ffffffff828c32a8 r tulip_21040_auibnc_only_boardsw +ffffffff828c32d0 r tulip_21140_cogent_em100_boardsw +ffffffff828c32f8 r tulip_21140_accton_boardsw +ffffffff828c3320 r tulip_21140_eb_boardsw +ffffffff828c3348 r tulip_21041_boardsw +ffffffff828c3370 r tulip_read_macaddr.testpat +ffffffff828c3380 r tulip_vendors +ffffffff828c3430 r tulip_media_to_ifmedia +ffffffff828c3490 r tulip_chipdescs +ffffffff828c4000 R ep_pci_ca +ffffffff828c4030 R ep_pci_devices +ffffffff828c5000 R pcn_ca +ffffffff828c5028 R pcn_devices +ffffffff828c5030 r pcn_79c970_rcvfw +ffffffff828c5050 r pcn_79c970_xmtsp +ffffffff828c5070 r pcn_79c970_xmtfw +ffffffff828c5090 r pcn_79c971_rcvfw +ffffffff828c50b0 r pcn_79c971_xmtsp_sram +ffffffff828c50d0 r pcn_79c971_xmtsp +ffffffff828c50f0 r pcn_79c971_xmtfw +ffffffff828c5110 r pcn_variants +ffffffff828c6000 R siop_products +ffffffff828c7000 R siop_pci_ca +ffffffff828c8000 R rdcide_setup +ffffffff828c8005 R rdcide_hold +ffffffff828c800a R rdcide_udmatim +ffffffff828c8010 R rdcide_udmaclk +ffffffff828c8028 R default_product_desc +ffffffff828c8040 R pciide_intel_products +ffffffff828c8630 R pciide_amd_products +ffffffff828c8690 R pciide_cmd_products +ffffffff828c8730 R pciide_via_products +ffffffff828c8810 R pciide_cypress_products +ffffffff828c8820 R pciide_sis_products +ffffffff828c8870 R pciide_natsemi_products +ffffffff828c8890 R pciide_acer_products +ffffffff828c88a0 R pciide_triones_products +ffffffff828c88f0 R pciide_promise_products +ffffffff828c8ac0 R pciide_acard_products +ffffffff828c8b10 R pciide_serverworks_products +ffffffff828c8bb0 R pciide_nvidia_products +ffffffff828c8e80 R pciide_ite_products +ffffffff828c8ea0 R pciide_ati_products +ffffffff828c8f20 R pciide_jmicron_products +ffffffff828c8f70 R pciide_phison_products +ffffffff828c8f80 R pciide_rdc_products +ffffffff828c8f90 R pciide_vendors +ffffffff828c9140 R pciide_pci_ca +ffffffff828c9168 R pciide_jmb_ca +ffffffff828c9190 r piix_isp_dma +ffffffff828c9193 r piix_rtc_dma +ffffffff828c9196 r apollo_pio_set +ffffffff828c919b r cmd0643_9_data_tim_pio +ffffffff828c91a0 r cmd0643_9_data_tim_dma +ffffffff828c91a3 r cmd680_channel_map.init_val +ffffffff828c91b1 r cmd680_setup_channel.udma2_tbl +ffffffff828c91b8 r cmd680_setup_channel.dma_tbl +ffffffff828c91be r cmd680_setup_channel.pio_tbl +ffffffff828c91d0 r satalink_ba5_regmap +ffffffff828c9690 r sii3114_chansetup.channel_names +ffffffff828c96b0 r cy_pio_pulse +ffffffff828c96c0 r sis_udma133new_tim +ffffffff828c96e0 r sis_pio133new_tim +ffffffff828c96f4 r sis_dma133new_tim +ffffffff828c9700 r sis_udma66_tim +ffffffff828c9706 r sis_udma100new_tim +ffffffff828c970c r sis_udma133old_tim +ffffffff828c9713 r sis_pio_act +ffffffff828c9718 r sis_pio_rec +ffffffff828c971d r natsemi_pio_pulse +ffffffff828c9722 r natsemi_pio_recover +ffffffff828c9727 r natsemi_dma_pulse +ffffffff828c972a r natsemi_dma_recover +ffffffff828c9730 r scx200_udma33 +ffffffff828c973c r scx200_dma33 +ffffffff828c9750 r scx200_pio33 +ffffffff828c9778 r acer_udma +ffffffff828c977e r acer_pio +ffffffff828c9790 r hpt370_pio +ffffffff828c97a4 r hpt370_dma +ffffffff828c97b0 r hpt370_udma +ffffffff828c97d0 r hpt372_pio +ffffffff828c97e4 r hpt372_dma +ffffffff828c97f0 r hpt372_udma +ffffffff828c980c r hpt366_dma +ffffffff828c9820 r hpt366_udma +ffffffff828c9840 r hpt374_pio +ffffffff828c9854 r hpt374_dma +ffffffff828c9860 r hpt374_udma +ffffffff828c987c r pdc2xx_pa +ffffffff828c9881 r pdc2xx_pb +ffffffff828c9886 r pdc2xx_dma_mb +ffffffff828c9889 r pdc2xx_dma_mc +ffffffff828c988c r pdc2xx_udma_mc +ffffffff828c9892 r acard_act_udma +ffffffff828c9899 r acard_rec_udma +ffffffff828c98a0 r acard_udma_conf +ffffffff828c98a7 r acard_act_dma +ffffffff828c98aa r acard_rec_dma +ffffffff828c98ad r acard_act_pio +ffffffff828c98b2 r acard_rec_pio +ffffffff828c98b7 r nforce_udma +ffffffff828c98be r nforce_pio +ffffffff828c98c3 r ixp_mdma_timings +ffffffff828c98c6 r ixp_pio_timings +ffffffff828ca000 R ppb_ca +ffffffff828cb000 R cy_pci_ca +ffffffff828cb030 R cy_pci_devices +ffffffff828cc000 R rl_pci_ca +ffffffff828cc030 R rl_pci_devices +ffffffff828cd000 R re_pci_devices +ffffffff828cd030 R re_pci_ca +ffffffff828ce000 R vr_ca +ffffffff828cf000 R txp_ca +ffffffff828cf030 R txp_devices +ffffffff828d0000 r cards +ffffffff828d1000 r format_params +ffffffff828d11a0 r pixfmt_table +ffffffff828d1320 r meteor_pixfmt_table +ffffffff828d2000 R bktr_ca +ffffffff828d2028 R bktr_hw_if +ffffffff828d3000 r tuners +ffffffff828d3170 r freqTable +ffffffff828d3260 r nabcst +ffffffff828d32a0 r irccable +ffffffff828d3310 r hrccable +ffffffff828d3380 r weurope +ffffffff828d3420 r jpnbcst +ffffffff828d3460 r jpncable +ffffffff828d34c0 r xussr +ffffffff828d3530 r australia +ffffffff828d3590 r france +ffffffff828d4000 R xl_pci_ca +ffffffff828d4030 R xl_pci_devices +ffffffff828d5000 R fxp_pci_ca +ffffffff828d5030 R fxp_pci_devices +ffffffff828d6000 R em_devices +ffffffff828d6308 R em_ca +ffffffff828d6330 r em_counters +ffffffff828d7000 r em_igp_cable_length_table +ffffffff828d7100 r em_igp_2_cable_length_table +ffffffff828d8000 R ixgb_devices +ffffffff828d8010 R ixgb_ca +ffffffff828d9000 R ixgbe_devices +ffffffff828d90b8 R ix_ca +ffffffff828d90e0 r ix_counters +ffffffff828d93e0 r ix_rxq_kstats_tpl +ffffffff828d9458 r ix_txq_kstats_tpl +ffffffff828da000 r ixgbe_mvals_base +ffffffff828da060 r ixgbe_mvals_X540 +ffffffff828da0c0 r ixgbe_mvals_X550 +ffffffff828da120 r ixgbe_mvals_X550EM_x +ffffffff828da180 r ixgbe_mvals_X550EM_a +ffffffff828dd000 R ixl_ca +ffffffff828dd030 R ixl_port_counters +ffffffff828dd2c0 R ixl_vsi_counters +ffffffff828dd380 r ixl_devices +ffffffff828dd4c0 r ixl_710 +ffffffff828dd4e8 r ixl_722 +ffffffff828dd510 r ixl_pf_aq_regs +ffffffff828dd578 r ixl_710_decrepit +ffffffff828dd5a0 r ixl_phy_type_map +ffffffff828dd770 r ixl_speed_type_map +ffffffff828dd7b0 r ixl_hmc_pack_rxq +ffffffff828dd830 r ixl_hmc_pack_txq +ffffffff828dd8a0 r ixl_sfp_ops +ffffffff828dd8b8 r ixl_qsfp_ops +ffffffff828de000 r dwqe_pci_devices +ffffffff828de018 R dwqe_pci_ca +ffffffff828df000 R xge_ca +ffffffff828df028 R xge_devices +ffffffff828df030 r xge_fix_mac +ffffffff828df110 r xge_xena_dtx_cfg +ffffffff828df170 r xge_herc_dtx_cfg +ffffffff828e0000 R thtc_ca +ffffffff828e0028 R tht_ca +ffffffff828e0050 r thtc_devices +ffffffff828e0068 r tht_link_state.interval +ffffffff828e1000 R myx_ca +ffffffff828e1028 R myx_devices +ffffffff828e2000 R oce_ca +ffffffff828e2030 R oce_devices +ffffffff828e3000 R dc_pci_ca +ffffffff828e4000 R epic_pci_ca +ffffffff828e4028 R epic_pci_devices +ffffffff828e5000 R ti_pci_ca +ffffffff828e5030 R ti_devices +ffffffff828e6000 R ne_pci_ca +ffffffff828e6030 R ne_pci_prod +ffffffff828e7000 R gem_pci_ca +ffffffff828e7030 R gem_pci_devices +ffffffff828e7050 r gem_promhdr +ffffffff828e7052 r gem_promdat +ffffffff828e705a r gem_promdat2 +ffffffff828e8000 R cas_ca +ffffffff828e8028 R cas_pci_devices +ffffffff828e8030 r cas_promhdr +ffffffff828e8032 r cas_promdat_sun +ffffffff828e803a r cas_promdat_ns +ffffffff828e8042 r cas_promdat2 +ffffffff828e9000 R sf_pci_ca +ffffffff828e9028 R sf_pci_products +ffffffff828ea000 R sis_ca +ffffffff828ea028 R sis_devices +ffffffff828eb000 R se_devices +ffffffff828eb008 R se_ca +ffffffff828ec000 R mbg_ca +ffffffff828ec030 R mbg_devices +ffffffff828ed000 R uhci_pci_ca +ffffffff828ee000 R ohci_pci_ca +ffffffff828ef000 R ehci_pci_ca +ffffffff828f0000 R xhci_pci_ca +ffffffff828f1000 R cbb_pci_ca +ffffffff828f1028 r pccbb_pcmcia_do_io_map.pcic_iowidth +ffffffff828f2000 R skc_devices +ffffffff828f2030 R skc_ca +ffffffff828f2058 R sk_ca +ffffffff828f3000 R mskc_devices +ffffffff828f30a8 R mskc_ca +ffffffff828f30d0 R msk_ca +ffffffff828f3100 r msk_mib +ffffffff828f4000 R puc_pci_ca +ffffffff828f5000 R puc_devs +ffffffff828fa000 R com_puc_ca +ffffffff828fa030 r puc_port_types +ffffffff828fb000 R lpt_puc_ca +ffffffff828fc000 R wi_pci_ca +ffffffff828fc030 r wi_pci_products +ffffffff828fd000 R an_pci_ca +ffffffff828fd030 R an_pci_devices +ffffffff828fe000 R iwi_devices +ffffffff828fe010 R iwi_ca +ffffffff828ff000 R wpi_ca +ffffffff828ff028 r wpi_devices +ffffffff828ff030 r wpi_rates +ffffffff828ff050 r wpi_rf_gain_5ghz +ffffffff828ff0a0 r wpi_dsp_gain_5ghz +ffffffff828ff0f0 r wpi_rf_gain_2ghz +ffffffff828ff140 r wpi_dsp_gain_2ghz +ffffffff828ff190 r wpi_pmgt +ffffffff828ff310 r wpi_bands +ffffffff82900000 R iwn_mcs2ridx +ffffffff82900020 R iwn_ca +ffffffff82900050 r iwn_devices +ffffffff829000e8 r iwn4965_sensitivity_limits +ffffffff82900124 r iwn5000_sensitivity_limits +ffffffff82900160 r iwn5150_sensitivity_limits +ffffffff8290019c r iwn1000_sensitivity_limits +ffffffff829001d8 r iwn6000_sensitivity_limits +ffffffff82900214 r iwn2000_sensitivity_limits +ffffffff82900250 r iwn_fw_errmsg +ffffffff82900340 r iwn4965_set_txpower.tdiv +ffffffff82900360 r iwn4965_rf_gain_5ghz +ffffffff829003d0 r iwn4965_dsp_gain_5ghz +ffffffff82900440 r iwn4965_dsp_gain_2ghz +ffffffff829004b0 r iwn_pmgt +ffffffff829006f0 r iwn4965_post_alive.qid2fifo +ffffffff82900700 r iwn_bands +ffffffff82900770 r iwn_rates +ffffffff82900820 r iwn4965_rf_gain_2ghz +ffffffff82901000 R iwm_nvm_channels +ffffffff82901030 R iwm_nvm_channels_8000 +ffffffff82901070 R iwm_rates +ffffffff829010d0 R iwm_ht_mcs2ridx +ffffffff82901110 R iwm_tid_to_ac +ffffffff82901118 R iwm_ac_to_tx_fifo +ffffffff82901120 R iwm_nvm_to_read +ffffffff82901144 r iwm_set_hw_address_8000.reserved_mac +ffffffff82901180 r iwm_sf_full_timeout +ffffffff829011b0 r iwm_sf_full_timeout_def +ffffffff829011e0 r advanced_lookup +ffffffff82901320 r iwm_devices +ffffffff82901360 R iwm_ca +ffffffff82902000 R iwx_9560_quz_a0_jf_b0_cfg +ffffffff82902020 R iwx_9560_qu_c0_jf_b0_cfg +ffffffff82902040 R iwx_qu_b0_hr1_b0 +ffffffff82902060 R iwx_qu_b0_hr_b0 +ffffffff82902080 R iwx_ax201_cfg_qu_hr +ffffffff829020a0 R iwx_qu_c0_hr1_b0 +ffffffff829020c0 R iwx_qu_c0_hr_b0 +ffffffff829020e0 R iwx_ax201_cfg_qu_c0_hr_b0 +ffffffff82902100 R iwx_quz_a0_hr1_b0 +ffffffff82902120 R iwx_ax201_cfg_quz_hr +ffffffff82902140 R iwx_cfg_so_a0_hr_b0 +ffffffff82902160 R iwx_cfg_quz_a0_hr_b0 +ffffffff82902180 R iwx_2ax_cfg_so_gf_a0 +ffffffff829021a0 R iwx_2ax_cfg_so_gf_a0_long +ffffffff829021c0 R iwx_2ax_cfg_so_gf4_a0 +ffffffff829021e0 R iwx_2ax_cfg_so_gf4_a0_long +ffffffff82902200 R iwx_2ax_cfg_ty_gf_a0 +ffffffff82902220 R iwx_2ax_cfg_so_jf_b0 +ffffffff82902240 R iwx_nvm_channels_8000 +ffffffff82902280 R iwx_rates +ffffffff829022e0 R iwx_mcs2ridx +ffffffff82902320 R iwx_tid_to_ac +ffffffff82902328 R iwx_ac_to_tx_fifo +ffffffff82902330 r iwx_nvm_channels_uhb +ffffffff8290239e r iwx_is_valid_mac_addr.reserved_mac +ffffffff829023b0 r iwx_sf_full_timeout +ffffffff829023e0 r iwx_sf_full_timeout_def +ffffffff82902410 r advanced_lookup +ffffffff82902550 r iwx_devices +ffffffff82902590 r iwx_dev_info_table +ffffffff82902e18 R iwx_ca +ffffffff82903000 R cmpci_ca +ffffffff82903028 R cmpci_hw_if +ffffffff829030e0 r cmpci_rate_table +ffffffff82903120 R cmpci_devices +ffffffff82903130 r cmpci_query_devinfo.mixer_port_names +ffffffff82903160 r cmpci_query_devinfo.mixer_classes +ffffffff82904000 R iha_pci_ca +ffffffff82904028 R iha_switch +ffffffff82905000 R pcscp_ca +ffffffff82906000 R bge_ca +ffffffff82906030 R bge_devices +ffffffff829061b0 r bge_revisions +ffffffff82906610 r bge_majorrevs +ffffffff82906790 r bge_kstat_tpl +ffffffff82907000 R bnx_devices +ffffffff82907020 R bnx_ca +ffffffff82908000 R vge_ca +ffffffff82908028 R vge_devices +ffffffff82909000 R stge_ca +ffffffff82909028 R stge_mii_bitbang_ops +ffffffff82909050 R stge_devices +ffffffff8290a000 R nfe_ca +ffffffff8290a030 R nfe_devices +ffffffff8290b000 R et_devices +ffffffff8290b008 R et_ca +ffffffff8290c000 R jme_devices +ffffffff8290c008 R jme_ca +ffffffff8290d000 R age_devices +ffffffff8290d008 R age_ca +ffffffff8290e000 R alc_devices +ffffffff8290e038 R alc_ca +ffffffff8290f000 R ale_devices +ffffffff8290f008 R ale_ca +ffffffff82910000 R amdpm_ca +ffffffff82910030 R amdpm_ids +ffffffff82911000 R bce_ca +ffffffff82911028 R bce_devices +ffffffff82912000 R ath_pci_ca +ffffffff82913000 R athn_pci_ca +ffffffff82913030 r athn_pci_devices +ffffffff82914000 R atw_pci_ca +ffffffff82914028 R atw_pci_devices +ffffffff82915000 R rtw_pci_ca +ffffffff82915030 R rtw_pci_products +ffffffff82916000 R rtwn_pci_ca +ffffffff82916030 r rtwn_pci_devices +ffffffff82916040 r rtl8188eu_mac +ffffffff829161b0 r rtl8192cu_mac +ffffffff82916310 r rtl8192ce_mac +ffffffff82916458 r rtl8188eu_bb_prog +ffffffff82916480 r rtl8723a_bb_prog +ffffffff829164a8 r rtl8192ce_bb_prog_1t +ffffffff829164d0 r rtl8192ce_bb_prog_2t +ffffffff82916500 r rtl8188eu_bb_regs +ffffffff82916680 r rtl8188eu_bb_vals +ffffffff82916980 r rtl8188eu_agc_vals +ffffffff82916b80 r rtl8723a_bb_regs +ffffffff82916d00 r rtl8723a_bb_vals +ffffffff82916ff0 r rtl8192ce_agc_vals +ffffffff82917270 r rtl8192ce_bb_regs +ffffffff829173f0 r rtl8192ce_bb_vals_1t +ffffffff829176e0 r rtl8192ce_bb_vals_2t +ffffffff82918000 R ral_pci_ca +ffffffff82918030 R ral_pci_devices +ffffffff82919000 R acx_pci_ca +ffffffff82919028 R acx_pci_devices +ffffffff8291a000 R pgt_pci_ca +ffffffff8291a028 R pgt_pci_devices +ffffffff8291b000 R malo_pci_ca +ffffffff8291b028 R malo_pci_devices +ffffffff8291c000 R bwi_pci_ca +ffffffff8291c030 R bwi_pci_devices +ffffffff8291d000 R piixpm_ca +ffffffff8291d030 R piixpm_ids +ffffffff8291e000 R vic_ca +ffffffff8291e028 R vic_devices +ffffffff8291f000 R vmx_devices +ffffffff8291f008 R vmx_ca +ffffffff8291f030 r vmx_tx_kstat_tpl +ffffffff8291f0d0 r vmx_kstat_rate +ffffffff8291f0e0 r vmx_rx_kstat_tpl +ffffffff82920000 R vmwpvs_ca +ffffffff82920028 R vmwpvs_switch +ffffffff82921000 R lii_ca +ffffffff82921028 R lii_devices +ffffffff82922000 R ichiic_ca +ffffffff82922030 R ichiic_ids +ffffffff82923000 R viapm_ca +ffffffff82923030 R viapm_ids +ffffffff82923070 r val_to_temp +ffffffff82923870 r val_to_uV.mult +ffffffff82924000 R amdiic_ca +ffffffff82924028 R amdiic_ids +ffffffff82925000 R nviic_ca +ffffffff82925030 R nviic_ids +ffffffff82926000 R sdhc_pci_ca +ffffffff82927000 R kate_ca +ffffffff82927030 r kate_proc +ffffffff82928000 R km_ca +ffffffff82928030 r km_devices +ffffffff82929000 R ksmn_ca +ffffffff82929030 r ksmn_devices +ffffffff8292a000 R iosf_pci_ca +ffffffff8292b000 R itherm_devices +ffffffff8292b008 R itherm_ca +ffffffff8292c000 R pchtemp_ca +ffffffff8292c030 R pchtemp_devices +ffffffff8292d000 R rtsx_pci_ca +ffffffff8292e000 R xspd_ca +ffffffff8292e028 R xspd_devices +ffffffff8292f000 R virtio_pci_ca +ffffffff82930000 R dwiic_pci_ca +ffffffff82930030 R dwiic_pci_ids +ffffffff82931000 R bwfm_pci_ca +ffffffff82931030 r bwfm_pci_devices +ffffffff82932000 R ccp_pci_ca +ffffffff82932030 r ccp_pci_devices +ffffffff82933000 R bnxt_devices +ffffffff82933040 R bnxt_ca +ffffffff82934000 R mcx_ca +ffffffff82934030 r mcx_devices +ffffffff82934060 r mcx_rss_config +ffffffff829340d0 r mcx_eth_cap_map +ffffffff829342d0 r mcx_kstat_ppcnt_ieee8023 +ffffffff829342e8 r mcx_kstat_ppcnt_rfc2863 +ffffffff82934300 r mcx_kstat_ppcnt_rfc2819 +ffffffff82934318 r mcx_kstat_ppcnt_rfc3635 +ffffffff82934330 r mcx_ppcnt_ieee8023_tpl +ffffffff829344b0 r mcx_ppcnt_rfc2863_tpl +ffffffff829345c0 r mcx_ppcnt_rfc2819_tpl +ffffffff82934770 r mcx_ppcnt_rfc3635_tpl +ffffffff829348b0 r mcx_kstat_mtmp_tpl +ffffffff82934950 r mcx_kstat_mtmp_rate +ffffffff82934960 r mcx_queue_kstat_tpl +ffffffff82935000 R iavf_ca +ffffffff82935030 r iavf_devices +ffffffff82935040 r iavf_aq_regs +ffffffff829350b0 r iavf_link_speeds +ffffffff82936000 R rge_ca +ffffffff82936028 R rge_devices +ffffffff82936030 r rge_phy_config_mac_cfg3.mac_cfg3_a438_value +ffffffff82936050 r rge_phy_config_mac_cfg3.mac_cfg3_b88e_value +ffffffff829360b0 r rtl8125_mac_cfg3_mcu +ffffffff82936950 r rtl8125_mac_cfg5_mcu +ffffffff82937970 r rtl8125_mac_bps +ffffffff82937d70 r rtl8125b_mac_bps +ffffffff82937f98 r rge_kstats_tpl +ffffffff82939000 R igc_devices +ffffffff82939040 R igc_ca +ffffffff8293a000 R ngbe_devices +ffffffff8293a008 R ngbe_ca +ffffffff8293b000 R com_pci_ca +ffffffff8293b030 R com_pci_ids +ffffffff8293c000 r agp_attach.agp_max +ffffffff8293c048 R agp_ca +ffffffff8293d000 R intagp_ca +ffffffff8293e000 r drm_plane_create_rotation_property.props +ffffffff8293f000 r drm_bridge_priv_state_funcs +ffffffff82941000 r color_encoding_name +ffffffff82941020 r color_range_name +ffffffff82942000 r drm_subpixel_enum_list +ffffffff82942060 r drm_dpms_enum_list +ffffffff829420a0 r drm_dvi_i_select_enum_list +ffffffff829420d0 r drm_dvi_i_subconnector_enum_list +ffffffff82942100 r drm_tv_select_enum_list +ffffffff82942150 r drm_tv_subconnector_enum_list +ffffffff829421a0 r drm_dp_subconnector_enum_list +ffffffff82942210 r drm_link_status_enum_list +ffffffff82942230 r drm_scaling_mode_enum_list +ffffffff82942270 r drm_aspect_ratio_enum_list +ffffffff829422a0 r hdmi_colorspaces +ffffffff82942370 r dp_colorspaces +ffffffff82942450 r drm_content_type_enum_list +ffffffff829424a0 r drm_panel_orientation_enum_list +ffffffff829424e0 r privacy_screen_enum +ffffffff82943000 r drm_crtc_fence_ops +ffffffff82944000 r drm_dmt_modes +ffffffff82946940 r edid_cea_modes_1 +ffffffff8294a4d0 r edid_cea_modes_193 +ffffffff8294b180 r edid_quirk_list +ffffffff8294b360 r edid_4k_modes +ffffffff8294b5c0 r edid_est_modes +ffffffff8294bdc0 r est3_modes +ffffffff8294bf20 r stereo_mandatory_modes +ffffffff8294bfa0 r extra_modes +ffffffff8294c000 r drm_encoder_enum_list +ffffffff8294d000 r drm_fbdev_client_funcs +ffffffff8294d020 r drm_fb_helper_generic_funcs +ffffffff8294d028 r drm_fbdev_fb_ops +ffffffff8294e000 r drm_fb_xrgb8888_to_rgb332.dst_pixsize +ffffffff8294e004 r drm_fb_xrgb8888_to_rgb565.dst_pixsize +ffffffff8294e008 r drm_fb_xrgb8888_to_rgb888.dst_pixsize +ffffffff8294e00c r drm_fb_xrgb8888_to_xrgb2101010.dst_pixsize +ffffffff8294e010 r drm_fb_xrgb8888_to_gray8.dst_pixsize +ffffffff8294e014 r drm_fb_rgb888_to_xrgb8888.dst_pixsize +ffffffff8294e018 r drm_fb_rgb565_to_xrgb8888.dst_pixsize +ffffffff8294f000 r __drm_format_info.formats +ffffffff82950000 R drm_pgops +ffffffff82951000 R drm_gem_fb_funcs +ffffffff82952000 r drm_ioctls +ffffffff82954000 r dma_fence_stub_ops +ffffffff82954038 R dma_fence_array_ops +ffffffff82954070 R dma_fence_chain_ops +ffffffff829540a8 R dmabufops +ffffffff829540e0 R syncfileops +ffffffff82955000 r drm_plane_type_enum_list +ffffffff82956000 r drm_mode_status_names +ffffffff82957000 r primary_plane_funcs +ffffffff82957068 r safe_modeset_formats +ffffffff82958000 r orientation_data +ffffffff8295b718 r lcd800x1280_rightside_up +ffffffff8295b730 r lcd720x1280_rightside_up +ffffffff8295b748 r lcd800x1280_leftside_up +ffffffff8295b760 r lcd1080x1920_leftside_up +ffffffff8295b778 r lcd1200x1920_rightside_up +ffffffff8295b790 r gpd_micropc +ffffffff8295b7a8 r gpd_pocket +ffffffff8295b7c0 r gpd_pocket2 +ffffffff8295b7d8 r gpd_win +ffffffff8295b7f0 r gpd_win2 +ffffffff8295b808 r itworks_tw891 +ffffffff8295b820 r lcd1600x2560_rightside_up +ffffffff8295b838 r onegx1_pro +ffffffff8295b850 r lcd1600x2560_leftside_up +ffffffff8295b868 r lcd1280x1920_rightside_up +ffffffff8295b880 r gpd_onemix2s +ffffffff8295b898 r .compoundliteral +ffffffff8295b8a8 r .compoundliteral.5 +ffffffff8295b8d0 r .compoundliteral.9 +ffffffff8295b8f0 r .compoundliteral.17 +ffffffff8295b930 r .compoundliteral.21 +ffffffff8295b950 r .compoundliteral.23 +ffffffff8295b960 r .compoundliteral.25 +ffffffff8295b970 r .compoundliteral.29 +ffffffff8295c000 r drm_gem_prime_dmabuf_ops +ffffffff8295e000 r is_hdmi_adaptor.dp_dual_mode_hdmi_id +ffffffff8295f000 r drm_dp_phy_name.phy_names +ffffffff8295f048 r drm_dp_i2c_algo +ffffffff8295f058 r drm_dp_i2c_lock_ops +ffffffff8295f070 r dp_aux_bl_ops +ffffffff8295f090 r dpcd_quirk_list +ffffffff8295f320 r drm_dp_psr_setup_time.psr_setup_time_us +ffffffff82960000 R drm_dp_mst_topology_state_funcs +ffffffff82960020 r drm_dp_mst_req_type_str.req_type_str +ffffffff829601f0 r drm_dp_mst_sideband_tx_state_str.sideband_reason_str +ffffffff82960220 r drm_dp_mst_nak_reason_str.nak_reason_str +ffffffff82960278 r drm_dp_mst_i2c_algo +ffffffff82961000 r hdmi_colorimetry_val +ffffffff82962000 r ttm_bo_init_reserved.sys_mem +ffffffff82963000 r ttm_bo_pipeline_gutting.sys_mem +ffffffff82964018 R ttm_bo_vm_ops +ffffffff82965000 r ttm_range_manager_func +ffffffff82966018 r ttm_kmap_iter_io_ops +ffffffff82966030 r ttm_kmap_iter_linear_io_ops +ffffffff82967000 r ttm_sys_manager_func +ffffffff82968000 r ttm_kmap_iter_tt_ops +ffffffff82969000 r drm_sched_fence_ops_scheduled +ffffffff82969038 r drm_sched_fence_ops_finished +ffffffff8296a000 R ch7017_ops +ffffffff8296b000 R ch7xxx_ops +ffffffff8296b060 r ch7xxx_ids +ffffffff8296c000 R ivch_ops +ffffffff8296c060 r backup_addresses +ffffffff8296d000 R ns2501_ops +ffffffff8296d060 r mode_agnostic_values +ffffffff8296d0e0 r ns2501_modes +ffffffff8296e000 R sil164_ops +ffffffff8296f000 R tfp410_ops +ffffffff82970000 r chv_dpll +ffffffff82970050 r vlv_dpll +ffffffff829700a0 r g4x_dpll +ffffffff829700f0 r pch_dpll +ffffffff82970138 r intel_dp_enc_funcs +ffffffff82971000 r intel_hdmi_enc_funcs +ffffffff82972000 r vlv_primary_formats +ffffffff82972030 r ivb_primary_formats +ffffffff82972050 r i965_primary_formats +ffffffff82972070 r i8xx_primary_formats +ffffffff82972080 r i965_plane_funcs +ffffffff829720e8 r i8xx_plane_funcs +ffffffff82973000 r gen11_dsi_encoder_funcs +ffffffff82973020 r gen11_dsi_connector_funcs +ffffffff82973098 r gen11_dsi_connector_helper_funcs +ffffffff829730e8 r gen11_dsi_host_ops +ffffffff82974000 r intel_plane_helper_funcs +ffffffff82975000 r g4x_audio_funcs +ffffffff82975010 r ilk_audio_funcs +ffffffff82975020 r hsw_audio_funcs +ffffffff82975030 r hdmi_audio_clock +ffffffff829750a0 r dp_aud_n_m +ffffffff82975250 r hdmi_aud_ncts_36bpp +ffffffff82975330 r hdmi_aud_ncts_30bpp +ffffffff82975410 r hdmi_aud_ncts_24bpp +ffffffff82976000 r intel_backlight_device_ops +ffffffff82976018 r bxt_pwm_funcs +ffffffff82976048 r cnp_pwm_funcs +ffffffff82976078 r lpt_pwm_funcs +ffffffff829760a8 r spt_pwm_funcs +ffffffff829760d8 r pch_pwm_funcs +ffffffff82976108 r ext_pwm_funcs +ffffffff82976138 r vlv_pwm_funcs +ffffffff82976168 r i965_pwm_funcs +ffffffff82976198 r i9xx_pwm_funcs +ffffffff829761c8 r pwm_bl_funcs +ffffffff82977000 r bdb_blocks +ffffffff82977160 r translate_iboost.mapping +ffffffff82977163 r adlp_ddc_pin_map +ffffffff8297716a r adls_ddc_pin_map +ffffffff82977170 r rkl_pch_tgp_ddc_pin_map +ffffffff82977175 r icp_ddc_pin_map +ffffffff8297717f r cnp_ddc_pin_map +ffffffff82978000 r mtl_sa_info +ffffffff82978006 r adlp_sa_info +ffffffff8297800c r adls_sa_info +ffffffff82978012 r rkl_sa_info +ffffffff82978018 r tgl_sa_info +ffffffff82978020 r intel_bw_funcs +ffffffff82979000 r intel_cdclk_funcs +ffffffff82979010 r tgl_cdclk_funcs +ffffffff82979030 r dg2_cdclk_table +ffffffff829790e0 r adlp_a_step_cdclk_table +ffffffff82979160 r adlp_cdclk_table +ffffffff82979220 r rkl_cdclk_table +ffffffff82979310 r icl_cdclk_table +ffffffff829793f8 r ehl_cdclk_funcs +ffffffff82979418 r icl_cdclk_funcs +ffffffff82979438 r bxt_cdclk_funcs +ffffffff82979460 r glk_cdclk_table +ffffffff82979490 r bxt_cdclk_table +ffffffff829794d8 r skl_cdclk_funcs +ffffffff829794f8 r bdw_cdclk_funcs +ffffffff82979518 r hsw_cdclk_funcs +ffffffff82979538 r chv_cdclk_funcs +ffffffff82979558 r vlv_cdclk_funcs +ffffffff82979578 r fixed_400mhz_cdclk_funcs +ffffffff82979598 r ilk_cdclk_funcs +ffffffff829795b8 r gm45_cdclk_funcs +ffffffff829795d8 r g33_cdclk_funcs +ffffffff829795f8 r i965gm_cdclk_funcs +ffffffff82979618 r pnv_cdclk_funcs +ffffffff82979638 r i945gm_cdclk_funcs +ffffffff82979658 r i915gm_cdclk_funcs +ffffffff82979678 r i915g_cdclk_funcs +ffffffff82979698 r i865g_cdclk_funcs +ffffffff829796b8 r i85x_cdclk_funcs +ffffffff829796d8 r i845g_cdclk_funcs +ffffffff829796f8 r i830_cdclk_funcs +ffffffff82979718 r g33_get_cdclk.div_3200 +ffffffff8297971e r g33_get_cdclk.div_4000 +ffffffff82979724 r g33_get_cdclk.div_4800 +ffffffff8297972a r g33_get_cdclk.div_5333 +ffffffff82979730 r i965gm_get_cdclk.div_3200 +ffffffff82979733 r i965gm_get_cdclk.div_4000 +ffffffff82979736 r i965gm_get_cdclk.div_5333 +ffffffff8297a000 r chv_color_funcs +ffffffff8297a028 r i965_color_funcs +ffffffff8297a050 r i9xx_color_funcs +ffffffff8297a078 r icl_color_funcs +ffffffff8297a0a0 r glk_color_funcs +ffffffff8297a0c8 r skl_color_funcs +ffffffff8297a0f0 r bdw_color_funcs +ffffffff8297a118 r hsw_color_funcs +ffffffff8297a140 r ivb_color_funcs +ffffffff8297a168 r ilk_color_funcs +ffffffff8297a190 r ilk_csc_off_zero +ffffffff8297a1a0 r ilk_csc_coeff_rgb_to_ycbcr +ffffffff8297a1b2 r ilk_csc_postoff_rgb_to_ycbcr +ffffffff8297a1c0 r ilk_csc_coeff_limited_range +ffffffff8297a1d2 r ilk_csc_postoff_limited_range +ffffffff8297a1e0 r ilk_csc_coeff_identity +ffffffff8297b000 r icl_procmon_values +ffffffff8297c000 r force_audio_names +ffffffff8297c040 r broadcast_rgb_names +ffffffff8297d000 r intel_crt_connector_funcs +ffffffff8297d078 r intel_crt_enc_funcs +ffffffff8297d0a0 r intel_spurious_crt_detect +ffffffff8297d4a8 r intel_crt_connector_helper_funcs +ffffffff8297e000 r g4x_crtc_funcs +ffffffff8297e0c0 r i965_crtc_funcs +ffffffff8297e180 r i915gm_crtc_funcs +ffffffff8297e240 r i915_crtc_funcs +ffffffff8297e300 r i8xx_crtc_funcs +ffffffff8297e3c0 r bdw_crtc_funcs +ffffffff8297e480 r ilk_crtc_funcs +ffffffff8297f000 r output_type_str +ffffffff8297f060 r output_format_str +ffffffff82980000 r intel_cursor_plane_funcs +ffffffff82980068 r intel_cursor_formats +ffffffff82981000 r intel_ddi_funcs +ffffffff82981020 r index_to_dp_signal_levels +ffffffff82981030 r gen9_chicken_trans_reg_by_port.trans +ffffffff82982000 r tgl_combo_phy_trans_edp_hbr2_hobl +ffffffff82982010 r _tgl_combo_phy_trans_edp_hbr2_hobl +ffffffff82982080 r dg2_snps_trans_uhbr +ffffffff82982090 r dg2_snps_trans +ffffffff829820a0 r _dg2_snps_trans_uhbr +ffffffff82982160 r _dg2_snps_trans +ffffffff829821d8 r icl_combo_phy_trans_hdmi +ffffffff829821f0 r _icl_combo_phy_trans_hdmi +ffffffff82982248 r adlp_combo_phy_trans_edp_hbr3 +ffffffff82982258 r adlp_combo_phy_trans_edp_up_to_hbr2 +ffffffff82982270 r _adlp_combo_phy_trans_dp_hbr2_edp_hbr3 +ffffffff829822f0 r _adlp_combo_phy_trans_edp_hbr2 +ffffffff82982368 r adlp_combo_phy_trans_dp_hbr2_hbr3 +ffffffff82982378 r adlp_combo_phy_trans_dp_hbr +ffffffff82982390 r _adlp_combo_phy_trans_dp_hbr2_hbr3 +ffffffff82982410 r _adlp_combo_phy_trans_dp_hbr +ffffffff82982488 r tgl_dkl_phy_trans_hdmi +ffffffff829824a0 r _tgl_dkl_phy_trans_hdmi +ffffffff82982518 r adlp_dkl_phy_trans_dp_hbr2_hbr3 +ffffffff82982528 r adlp_dkl_phy_trans_dp_hbr +ffffffff82982540 r _adlp_dkl_phy_trans_dp_hbr2_hbr3 +ffffffff829825c0 r _adlp_dkl_phy_trans_dp_hbr +ffffffff82982638 r adls_combo_phy_trans_edp_hbr3 +ffffffff82982648 r adls_combo_phy_trans_edp_hbr2 +ffffffff82982660 r _adls_combo_phy_trans_edp_hbr3 +ffffffff829826e0 r _adls_combo_phy_trans_edp_hbr2 +ffffffff82982758 r adls_combo_phy_trans_dp_hbr2_hbr3 +ffffffff82982768 r tgl_combo_phy_trans_dp_hbr +ffffffff82982780 r _adls_combo_phy_trans_dp_hbr2_hbr3 +ffffffff82982800 r _tgl_combo_phy_trans_dp_hbr +ffffffff82982878 r icl_combo_phy_trans_dp_hbr2_edp_hbr3 +ffffffff82982888 r icl_combo_phy_trans_edp_hbr2 +ffffffff829828a0 r _icl_combo_phy_trans_dp_hbr2_edp_hbr3 +ffffffff82982920 r _icl_combo_phy_trans_edp_hbr2 +ffffffff82982998 r rkl_combo_phy_trans_dp_hbr2_hbr3 +ffffffff829829a8 r rkl_combo_phy_trans_dp_hbr +ffffffff829829c0 r _rkl_combo_phy_trans_dp_hbr2_hbr3 +ffffffff82982a40 r _rkl_combo_phy_trans_dp_hbr +ffffffff82982ab8 r dg1_combo_phy_trans_dp_hbr2_hbr3 +ffffffff82982ac8 r dg1_combo_phy_trans_dp_rbr_hbr +ffffffff82982ae0 r _dg1_combo_phy_trans_dp_hbr2_hbr3 +ffffffff82982b60 r _dg1_combo_phy_trans_dp_rbr_hbr +ffffffff82982bd8 r tgl_uy_combo_phy_trans_dp_hbr2 +ffffffff82982be8 r tgl_combo_phy_trans_dp_hbr2 +ffffffff82982c00 r _tgl_uy_combo_phy_trans_dp_hbr2 +ffffffff82982c80 r _tgl_combo_phy_trans_dp_hbr2 +ffffffff82982cf8 r tgl_dkl_phy_trans_dp_hbr2 +ffffffff82982d08 r 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i915_region_stolen_lmem_ops +ffffffff829ba020 r i915_region_stolen_smem_ops +ffffffff829ba040 r i915_gem_object_stolen_ops +ffffffff829bb000 r i915_gem_ttm_obj_ops +ffffffff829bb080 r ttm_system_region_ops +ffffffff829bb0a0 r sys_placement_flags +ffffffff829bb0b0 r tt_rsgt_ops +ffffffff829bc000 r dma_fence_memcpy_ops +ffffffff829bd000 r i915_ttm_recover_region.recover_ops +ffffffff829bd020 r i915_ttm_backup_region.backup_ops +ffffffff829bd028 r i915_ttm_restore_region.restore_ops +ffffffff829be000 r pd_dummy_obj_ops +ffffffff829be080 r pd_vma_ops +ffffffff829bf000 r gen6_null_state_relocs +ffffffff829bf020 r gen6_null_state_batch +ffffffff829bf470 R gen6_null_state +ffffffff829c0000 r hsw_clear_kernel +ffffffff829c0340 r ivb_clear_kernel +ffffffff829c1000 r gen7_null_state_relocs +ffffffff829c1018 R gen7_null_state +ffffffff829c1030 r gen7_null_state_batch +ffffffff829c2000 r gen8_null_state_relocs +ffffffff829c2018 R gen8_null_state +ffffffff829c2030 r gen8_null_state_batch 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radeon_atom_backlight_ops +ffffffff829f8018 r radeon_atom_enc_funcs +ffffffff829f8038 r radeon_atom_dig_helper_funcs +ffffffff829f80a0 r radeon_atom_dac_helper_funcs +ffffffff829f8108 r radeon_atom_ext_helper_funcs +ffffffff829f9000 r caicos_cgcg_cgls_default +ffffffff829f9240 r barts_mgcg_default +ffffffff829f9900 r turks_mgcg_default +ffffffff829f9d80 r caicos_mgcg_default +ffffffff829fa110 r turks_sysls_default +ffffffff829fa1d0 r caicos_sysls_default +ffffffff829fa280 r caicos_cgcg_cgls_enable +ffffffff829fa4d0 r caicos_cgcg_cgls_disable +ffffffff829fa730 r barts_mgcg_enable +ffffffff829fa7b0 r turks_mgcg_enable +ffffffff829fa830 r caicos_mgcg_enable +ffffffff829fa8b0 r caicos_mgcg_disable +ffffffff829fa930 r turks_sysls_enable +ffffffff829fa9f0 r caicos_sysls_enable +ffffffff829faaa0 r turks_sysls_disable +ffffffff829fab60 r caicos_sysls_disable +ffffffff829fb000 r didt_config_ci +ffffffff829fb5b4 r defaults_bonaire_xt +ffffffff829fb600 r defaults_saturn_xt +ffffffff829fb64c r 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hawaii_golden_spm_registers +ffffffff829fea80 r spectre_rlc_save_restore_register_list +ffffffff829ff170 r kalindi_rlc_save_restore_register_list +ffffffff829ff680 r ci_cs_data +ffffffff829ff6a0 r ci_SECT_CONTEXT_defs +ffffffff829ff720 r ci_SECT_CONTEXT_def_1 +ffffffff829ffa70 r ci_SECT_CONTEXT_def_3 +ffffffff829ffa90 r ci_SECT_CONTEXT_def_4 +ffffffff829ffd04 r ci_SECT_CONTEXT_def_5 +ffffffff829ffd0c r ci_SECT_CONTEXT_def_6 +ffffffff829ffd10 r ci_SECT_CONTEXT_def_2 +ffffffff82a00160 r ci_SECT_CONTEXT_def_7 +ffffffff82a00510 r cik_default_state +ffffffff82a02000 r dce3_2_afmt_write_sad_regs.eld_reg_to_type +ffffffff82a03000 r dce6_afmt_write_sad_regs.eld_reg_to_type +ffffffff82a04000 r ni_tx_offsets +ffffffff82a04020 r evergreen_dp_offsets +ffffffff82a04040 r evergreen_disp_int_status +ffffffff82a04060 r evergreen_golden_registers +ffffffff82a04260 r evergreen_golden_registers2 +ffffffff82a04310 r cypress_mgcg_init +ffffffff82a04a10 r juniper_mgcg_init +ffffffff82a04e80 r redwood_mgcg_init +ffffffff82a051b0 r cedar_golden_registers +ffffffff82a05390 r cedar_mgcg_init +ffffffff82a055f0 r wrestler_golden_registers +ffffffff82a05840 r supersumo_golden_registers +ffffffff82a05ba0 r sumo_golden_registers +ffffffff82a05be0 r barts_golden_registers +ffffffff82a05e00 r turks_golden_registers +ffffffff82a06040 r caicos_golden_registers +ffffffff82a06280 r sumo_rlc_save_restore_register_list +ffffffff82a063d0 r evergreen_cs_data +ffffffff82a06410 r SECT_CONTEXT_defs +ffffffff82a06490 r SECT_CLEAR_defs +ffffffff82a064b0 r SECT_CTRLCONST_defs +ffffffff82a064d0 r SECT_CONTEXT_def_2 +ffffffff82a064f0 r SECT_CONTEXT_def_4 +ffffffff82a06680 r SECT_CONTEXT_def_5 +ffffffff82a066a0 r SECT_CONTEXT_def_6 +ffffffff82a06780 r SECT_CONTEXT_def_1 +ffffffff82a06f20 r SECT_CONTEXT_def_3 +ffffffff82a07000 r SECT_CONTEXT_def_7 +ffffffff82a07488 r SECT_CLEAR_def_1 +ffffffff82a07494 r SECT_CTRLCONST_def_1 +ffffffff82a074a0 r evergreen_default_state +ffffffff82a08000 r cayman_reg_safe_bm +ffffffff82a0a000 r evergreen_reg_safe_bm +ffffffff82a0d000 r evergreen_hdmi_write_sad_regs.eld_reg_to_type +ffffffff82a0e000 r didt_config_kv +ffffffff82a0f000 r barts_io_mc_regs +ffffffff82a0f0f0 r turks_io_mc_regs +ffffffff82a0f1e0 r caicos_io_mc_regs +ffffffff82a0f2d0 r cayman_io_mc_regs +ffffffff82a0f3c0 r cayman_golden_registers +ffffffff82a0f580 r cayman_golden_registers2 +ffffffff82a0f5d0 r dvst_golden_registers +ffffffff82a0f860 r dvst_golden_registers2 +ffffffff82a0f890 r scrapper_golden_registers +ffffffff82a0fd70 r tn_rlc_save_restore_register_list +ffffffff82a0ff60 r cayman_cs_data +ffffffff82a0ffa0 r SECT_CONTEXT_defs +ffffffff82a10020 r SECT_CLEAR_defs +ffffffff82a10040 r SECT_CTRLCONST_defs +ffffffff82a10060 r SECT_CONTEXT_def_2 +ffffffff82a10080 r SECT_CONTEXT_def_4 +ffffffff82a10210 r SECT_CONTEXT_def_5 +ffffffff82a10230 r SECT_CONTEXT_def_1 +ffffffff82a109d0 r SECT_CONTEXT_def_3 +ffffffff82a10ab0 r SECT_CONTEXT_def_6 +ffffffff82a10b90 r SECT_CONTEXT_def_7 +ffffffff82a11018 r SECT_CLEAR_def_1 +ffffffff82a11024 r SECT_CTRLCONST_def_1 +ffffffff82a11030 r cayman_default_state +ffffffff82a12000 r cac_weights_cayman_xt +ffffffff82a12128 r cac_weights_cayman_pro +ffffffff82a12250 r cac_weights_cayman_le +ffffffff82a12380 r cayman_cgcg_cgls_default +ffffffff82a125c0 r cayman_mgcg_default +ffffffff82a12f20 r cayman_sysls_default +ffffffff82a12ff0 r cayman_cgcg_cgls_enable +ffffffff82a13240 r cayman_cgcg_cgls_disable +ffffffff82a134a0 r cayman_mgcg_enable +ffffffff82a13520 r cayman_mgcg_disable +ffffffff82a135a0 r cayman_sysls_enable +ffffffff82a13670 r cayman_sysls_disable +ffffffff82a14000 r rn50_reg_safe_bm +ffffffff82a141a0 r r100_reg_safe_bm +ffffffff82a15000 r r200_reg_safe_bm +ffffffff82a16000 r r300_reg_safe_bm +ffffffff82a17000 r r420_reg_safe_bm +ffffffff82a19000 r color_formats_table +ffffffff82a19480 r r600_reg_safe_bm +ffffffff82a1c000 R r600_utc +ffffffff82a1c040 R r600_dtc +ffffffff82a1c080 r r600_encode_pci_lane_width.encoded_lanes +ffffffff82a1e000 r r100_gfx_ring +ffffffff82a1e070 r r300_gfx_ring +ffffffff82a1e0e0 r rv515_gfx_ring +ffffffff82a1e150 r r600_gfx_ring +ffffffff82a1e1c0 r r600_dma_ring +ffffffff82a1e230 r rv6xx_uvd_ring +ffffffff82a1e2a0 r rv770_uvd_ring +ffffffff82a1e310 r evergreen_gfx_ring +ffffffff82a1e380 r evergreen_dma_ring +ffffffff82a1e3f0 r cayman_gfx_ring +ffffffff82a1e460 r cayman_dma_ring +ffffffff82a1e4d0 r cayman_uvd_ring +ffffffff82a1e540 r trinity_vce_ring +ffffffff82a1e5b0 r si_gfx_ring +ffffffff82a1e620 r si_dma_ring +ffffffff82a1e690 r ci_gfx_ring +ffffffff82a1e700 r ci_cp_ring +ffffffff82a1e770 r ci_dma_ring +ffffffff82a1e7e0 r ci_vce_ring +ffffffff82a1f000 r object_connector_convert +ffffffff82a1f060 r supported_devices_connector_convert +ffffffff82a1f0a0 r supported_devices_connector_object_id_convert +ffffffff82a1f0c0 r thermal_controller_names +ffffffff82a1f100 r pp_lib_thermal_controller_names +ffffffff82a20000 r pin_offsets +ffffffff82a20020 r radeon_audio_acr.hdmi_predefined_acr +ffffffff82a22000 r thermal_controller_names +ffffffff82a22020 r default_primarydac_adj +ffffffff82a22120 r default_tvdac_adj +ffffffff82a22220 r default_tmds_pll +ffffffff82a23000 r radeon_dp_connector_funcs +ffffffff82a23078 r radeon_dp_connector_helper_funcs +ffffffff82a230c8 r radeon_lvds_bridge_connector_funcs +ffffffff82a23140 r radeon_vga_connector_funcs +ffffffff82a231b8 r radeon_vga_connector_helper_funcs +ffffffff82a23208 r radeon_dvi_connector_funcs +ffffffff82a23280 r radeon_dvi_connector_helper_funcs +ffffffff82a232d0 r radeon_edp_connector_funcs +ffffffff82a23348 r radeon_tv_connector_funcs +ffffffff82a233c0 r radeon_tv_connector_helper_funcs +ffffffff82a23410 r radeon_lvds_connector_funcs +ffffffff82a23488 r radeon_lvds_connector_helper_funcs +ffffffff82a24000 r radeon_family_name +ffffffff82a243f0 r radeon_px_quirk_list +ffffffff82a25000 r radeon_fb_funcs +ffffffff82a25018 r radeon_mode_funcs +ffffffff82a25060 r radeon_tmds_pll_enum_list +ffffffff82a25080 r radeon_tv_std_enum_list +ffffffff82a25100 r radeon_underscan_enum_list +ffffffff82a25130 r radeon_audio_enum_list +ffffffff82a25160 r radeon_dither_enum_list +ffffffff82a25180 r radeon_output_csc_enum_list +ffffffff82a251c0 r radeon_crtc_funcs +ffffffff82a25280 r hpd_names +ffffffff82a252b0 r encoder_names +ffffffff82a253e0 r radeon_afmt_init.eg_offsets +ffffffff82a26000 r aux_offset +ffffffff82a27000 R radeondrm_ca +ffffffff82a27030 r pciidlist +ffffffff82a2b1d0 r kms_driver +ffffffff82a2b2c0 r radeon_ioctls_kms +ffffffff82a2c000 r radeon_fb_helper_funcs +ffffffff82a2c008 r radeonfb_ops +ffffffff82a2d000 R radeon_fence_ops +ffffffff82a2f000 R radeon_gem_object_funcs +ffffffff82a2f060 r radeon_gem_vm_ops +ffffffff82a30000 r radeon_i2c_algo +ffffffff82a30010 r radeon_atom_i2c_algo +ffffffff82a31000 r legacy_helper_funcs +ffffffff82a32000 r radeon_backlight_ops +ffffffff82a32018 r radeon_legacy_lvds_enc_funcs +ffffffff82a32038 r radeon_legacy_lvds_helper_funcs +ffffffff82a320a0 r radeon_legacy_tmds_int_enc_funcs +ffffffff82a320c0 r radeon_legacy_tmds_int_helper_funcs +ffffffff82a32128 r radeon_legacy_primary_dac_enc_funcs +ffffffff82a32148 r radeon_legacy_primary_dac_helper_funcs +ffffffff82a321b0 r radeon_legacy_tv_dac_enc_funcs +ffffffff82a321d0 r radeon_legacy_tv_dac_helper_funcs +ffffffff82a32238 r radeon_legacy_tmds_ext_enc_funcs +ffffffff82a32258 r radeon_legacy_tmds_ext_helper_funcs +ffffffff82a33000 r SLOPE_value +ffffffff82a33030 r YCOEF_EN_value +ffffffff82a33060 r YCOEF_value +ffffffff82a33090 r available_tv_modes +ffffffff82a33110 r hor_timing_NTSC +ffffffff82a33150 r vert_timing_NTSC +ffffffff82a33190 r hor_timing_PAL +ffffffff82a331d0 r vert_timing_PAL +ffffffff82a35000 r radeon_pm_state_type_name +ffffffff82a36000 r radeon_evict_flags.placements +ffffffff82a39000 r rs600_reg_safe_bm +ffffffff82a3b000 r rv515_reg_safe_bm +ffffffff82a3c000 r dll_speed_table +ffffffff82a3d000 r r7xx_golden_registers +ffffffff82a3d090 r r7xx_golden_dyn_gpr_registers +ffffffff82a3d100 r rv770ce_golden_registers +ffffffff82a3d160 r rv770_golden_registers +ffffffff82a3d1b0 r rv770_mgcg_init +ffffffff82a3d8f0 r rv730_golden_registers +ffffffff82a3d950 r rv730_mgcg_init +ffffffff82a3dee0 r rv710_golden_registers +ffffffff82a3df30 r rv710_mgcg_init +ffffffff82a3e1d0 r rv740_golden_registers +ffffffff82a3e360 r rv740_mgcg_init +ffffffff82a40000 r rv730_smc_int_vectors +ffffffff82a40040 r rv710_smc_int_vectors +ffffffff82a40080 r rv740_smc_int_vectors +ffffffff82a400c0 r cypress_smc_int_vectors +ffffffff82a40100 r caicos_smc_int_vectors +ffffffff82a40140 r cayman_smc_int_vectors +ffffffff82a41000 r tahiti_io_mc_regs +ffffffff82a41120 r pitcairn_io_mc_regs +ffffffff82a41240 r verde_io_mc_regs +ffffffff82a41360 r oland_io_mc_regs +ffffffff82a41480 r hainan_io_mc_regs +ffffffff82a415a0 r crtc_offsets +ffffffff82a415c0 r si_disp_int_status +ffffffff82a415e0 r tahiti_golden_registers +ffffffff82a41760 r tahiti_golden_rlc_registers +ffffffff82a417b0 r tahiti_mgcg_cgcg_init +ffffffff82a41d98 r tahiti_golden_registers2 +ffffffff82a41db0 r pitcairn_golden_registers +ffffffff82a41f00 r pitcairn_golden_rlc_registers +ffffffff82a41f40 r pitcairn_mgcg_cgcg_init +ffffffff82a423b0 r verde_golden_registers +ffffffff82a42620 r verde_golden_rlc_registers +ffffffff82a42660 r verde_mgcg_cgcg_init +ffffffff82a42ae0 r oland_golden_registers +ffffffff82a42c30 r oland_golden_rlc_registers +ffffffff82a42c70 r oland_mgcg_cgcg_init +ffffffff82a43000 r hainan_golden_registers +ffffffff82a4312c r hainan_golden_registers2 +ffffffff82a43140 r hainan_mgcg_cgcg_init +ffffffff82a434b0 r verde_rlc_save_restore_register_list +ffffffff82a43820 r si_cs_data +ffffffff82a43840 r si_SECT_CONTEXT_defs +ffffffff82a438c0 r si_SECT_CONTEXT_def_1 +ffffffff82a43c10 r si_SECT_CONTEXT_def_3 +ffffffff82a43c30 r si_SECT_CONTEXT_def_4 +ffffffff82a43ea4 r si_SECT_CONTEXT_def_5 +ffffffff82a43ea8 r si_SECT_CONTEXT_def_6 +ffffffff82a43eb0 r si_SECT_CONTEXT_def_2 +ffffffff82a442f0 r si_SECT_CONTEXT_def_7 +ffffffff82a446a0 r mc_cg_registers +ffffffff82a446d0 r si_default_state +ffffffff82a45000 r cac_weights_tahiti +ffffffff82a454d0 r lcac_tahiti +ffffffff82a45ba0 r cac_override_tahiti +ffffffff82a45bb4 r powertune_data_tahiti +ffffffff82a45bf0 r dte_data_tahiti +ffffffff82a45cc0 r dte_data_new_zealand +ffffffff82a45d90 r dte_data_malta +ffffffff82a45e60 r lcac_pitcairn +ffffffff82a46530 r cac_override_pitcairn +ffffffff82a46544 r powertune_data_pitcairn +ffffffff82a46580 r lcac_cape_verde +ffffffff82a469d0 r cac_override_cape_verde +ffffffff82a469e4 r powertune_data_cape_verde +ffffffff82a46a20 r cac_weights_cape_verde_pro +ffffffff82a46ef0 r cac_weights_heathrow +ffffffff82a473c0 r cac_weights_chelsea_xt +ffffffff82a47890 r cac_weights_chelsea_pro +ffffffff82a47d60 r cac_weights_cape_verde +ffffffff82a48230 r cac_weights_mars_pro +ffffffff82a48700 r lcac_mars_pro +ffffffff82a48a60 r cac_override_oland +ffffffff82a48a74 r powertune_data_mars_pro +ffffffff82a48ab0 r cac_weights_mars_xt +ffffffff82a48f80 r cac_weights_oland_pro +ffffffff82a49450 r cac_weights_oland_xt +ffffffff82a49920 r lcac_oland +ffffffff82a49c7c r powertune_data_oland +ffffffff82a49cc0 r cac_weights_hainan +ffffffff82a4a184 r powertune_data_hainan +ffffffff82a4a1c0 r dte_data_aruba_pro +ffffffff82a4a290 r dte_data_tahiti_pro +ffffffff82a4a360 r dte_data_curacao_pro +ffffffff82a4a430 r dte_data_neptune_xt +ffffffff82a4a500 r dte_data_sun_xt +ffffffff82a4a5d0 r dte_data_venus_xtx +ffffffff82a4a6a0 r dte_data_venus_xt +ffffffff82a4a770 r dte_data_venus_pro +ffffffff82a4a840 r dte_data_mars_pro +ffffffff82a4b000 r si_program_jump_on_start.data +ffffffff82a4c000 r sumo_dtc +ffffffff82a4d000 r trinity_mgcg_shls_default +ffffffff82a4d380 r trinity_sysls_enable +ffffffff82a4d450 r trinity_sysls_disable +ffffffff82a4f000 r GC_BASE +ffffffff82a4f0a8 r HDP_BASE +ffffffff82a4f150 r MMHUB_BASE +ffffffff82a4f1f8 r ATHUB_BASE +ffffffff82a4f2a0 r NBIO_BASE +ffffffff82a4f348 r MP0_BASE +ffffffff82a4f3f0 r MP1_BASE +ffffffff82a4f498 r DF_BASE +ffffffff82a4f540 r OSSSYS_BASE +ffffffff82a4f5e8 r SDMA0_BASE +ffffffff82a4f690 r SDMA1_BASE +ffffffff82a4f738 r SDMA2_BASE +ffffffff82a4f7e0 r SDMA3_BASE +ffffffff82a4f888 r SDMA4_BASE +ffffffff82a4f930 r SMUIO_BASE +ffffffff82a4f9d8 r THM_BASE +ffffffff82a4fa80 r UMC_BASE +ffffffff82a4fb28 r VCN_BASE +ffffffff82a50000 r amdgpu_afmt_predefined_acr +ffffffff82a51000 r atom_op_names +ffffffff82a513e0 r opcode_table +ffffffff82a51bd0 r atom_dst_to_src +ffffffff82a51c50 r atom_io_names +ffffffff82a51c80 r atom_table_names +ffffffff82a51ed0 r atom_iio_len +ffffffff82a52000 r object_connector_convert +ffffffff82a52058 R amdgpu_vbios_version_attr_group +ffffffff82a53000 r voltage_names +ffffffff82a53020 r pre_emph_names +ffffffff82a54000 r amdgpu_atombios_encoder_backlight_ops +ffffffff82a56000 r amdgpu_benchmark.common_modes +ffffffff82a57000 r amdgpu_cgs_ops +ffffffff82a58000 r amdgpu_connector_dp_funcs +ffffffff82a58078 r amdgpu_connector_dp_helper_funcs +ffffffff82a580c8 r amdgpu_connector_edp_funcs +ffffffff82a58140 r amdgpu_connector_vga_funcs +ffffffff82a581b8 r amdgpu_connector_vga_helper_funcs +ffffffff82a58208 r amdgpu_connector_dvi_funcs +ffffffff82a58280 r amdgpu_connector_dvi_helper_funcs +ffffffff82a582d0 r amdgpu_connector_lvds_funcs +ffffffff82a58348 r amdgpu_connector_lvds_helper_funcs +ffffffff82a583a0 r amdgpu_connector_add_common_modes.common_modes +ffffffff82a5a000 R amdgpu_ctx_num_entities +ffffffff82a5b000 r amdgpu_kms_driver +ffffffff82a5b0f0 r amdgpu_device_ip_reinit_late_sriov.ip_order +ffffffff82a5c000 r hw_id_map +ffffffff82a5c090 r hw_id_names +ffffffff82a5d000 r hpd_names +ffffffff82a5d030 r encoder_names +ffffffff82a5d180 r dcc_retile_formats +ffffffff82a5d270 r dcc_formats +ffffffff82a5d360 R amdgpu_mode_funcs +ffffffff82a5d3b0 r amdgpu_underscan_enum_list +ffffffff82a5d3e0 r amdgpu_audio_enum_list +ffffffff82a5d410 r amdgpu_dither_enum_list +ffffffff82a5d430 r amdgpu_fb_funcs_atomic +ffffffff82a5d448 r amdgpu_fb_funcs +ffffffff82a5e000 R amdgpu_dmabuf_ops +ffffffff82a5f000 R amdgpu_ioctls_kms +ffffffff82a5f210 R amdgpu_ca +ffffffff82a5f240 r pciidlist +ffffffff82a60130 r amdgpu_unsupported_pciidlist +ffffffff82a606b0 r amdgpu_kms_driver +ffffffff82a61000 r amdgpu_job_fence_ops +ffffffff82a61038 r amdgpu_fence_ops +ffffffff82a62000 r amdgpu_gem_object_funcs +ffffffff82a62060 r amdgpu_gem_vm_ops +ffffffff82a64000 R amdgpu_gtt_mgr_attr_group +ffffffff82a64018 r amdgpu_gtt_mgr_func +ffffffff82a65000 r amdgpu_atombios_i2c_algo +ffffffff82a66000 R amdgpu_sched_ops +ffffffff82a68000 r amdgpu_vram_names +ffffffff82a69000 r amdgpu_preempt_mgr_func +ffffffff82a6a000 R psp_ip_funcs +ffffffff82a6a0a0 R psp_v3_1_ip_block +ffffffff82a6a0b8 R psp_v10_0_ip_block +ffffffff82a6a0d0 R psp_v11_0_ip_block +ffffffff82a6a0e8 R psp_v11_0_8_ip_block +ffffffff82a6a100 R psp_v12_0_ip_block +ffffffff82a6a118 R psp_v13_0_ip_block +ffffffff82a6a130 R psp_v13_0_4_ip_block +ffffffff82a6c000 r amdgpu_evict_flags.placements +ffffffff82a70000 R amdgpu_vkms_ip_block +ffffffff82a72000 R amdgpu_vm_cpu_funcs +ffffffff82a74000 R amdgpu_vm_sdma_funcs +ffffffff82a75000 R amdgpu_vram_mgr_attr_group +ffffffff82a75018 r amdgpu_vram_mgr_func +ffffffff82a76000 r xgmi_pcs_err_status_reg_arct +ffffffff82a77000 r GC_BASE +ffffffff82a770c0 r HDP_BASE +ffffffff82a77180 r MMHUB_BASE +ffffffff82a77240 r ATHUB_BASE +ffffffff82a77300 r NBIF0_BASE +ffffffff82a773c0 r MP0_BASE +ffffffff82a77480 r MP1_BASE +ffffffff82a77540 r UVD_BASE +ffffffff82a77600 r DF_BASE +ffffffff82a776c0 r OSSSYS_BASE +ffffffff82a77780 r SDMA0_BASE +ffffffff82a77840 r SDMA1_BASE +ffffffff82a77900 r SDMA2_BASE +ffffffff82a779c0 r SDMA3_BASE +ffffffff82a77a80 r SDMA4_BASE +ffffffff82a77b40 r SDMA5_BASE +ffffffff82a77c00 r SDMA6_BASE +ffffffff82a77cc0 r SDMA7_BASE +ffffffff82a77d80 r SMUIO_BASE +ffffffff82a77e40 r THM_BASE +ffffffff82a77f00 r UMC_BASE +ffffffff82a77fc0 r RSMU_BASE +ffffffff82a79000 r cz_ih_ip_funcs +ffffffff82a790a0 R cz_ih_ip_block +ffffffff82a790b8 r cz_ih_funcs ffffffff82a7a000 r crtc_offsets -ffffffff82a7a020 r dce_v11_0_ip_funcs -ffffffff82a7a0c0 R dce_v11_0_ip_block -ffffffff82a7a0d8 R dce_v11_2_ip_block -ffffffff82a7a0f0 r dce_v11_0_display_funcs +ffffffff82a7a020 r dce_v10_0_ip_funcs +ffffffff82a7a0c0 R dce_v10_0_ip_block +ffffffff82a7a0d8 R dce_v10_1_ip_block +ffffffff82a7a0f0 r dce_v10_0_display_funcs ffffffff82a7a150 r hpd_offsets -ffffffff82a7a168 r dce_v11_0_encoder_funcs -ffffffff82a7a188 r dce_v11_0_dac_helper_funcs -ffffffff82a7a1f0 r dce_v11_0_dig_helper_funcs -ffffffff82a7a258 r dce_v11_0_ext_helper_funcs -ffffffff82a7a2c0 r dce_v11_0_audio_write_sad_regs.eld_reg_to_type -ffffffff82a7a2f0 r dce_v11_0_crtc_irq_funcs -ffffffff82a7a300 r dce_v11_0_pageflip_irq_funcs -ffffffff82a7a310 r dce_v11_0_hpd_irq_funcs +ffffffff82a7a168 r dce_v10_0_encoder_funcs +ffffffff82a7a188 r dce_v10_0_dac_helper_funcs +ffffffff82a7a1f0 r dce_v10_0_dig_helper_funcs +ffffffff82a7a258 r dce_v10_0_ext_helper_funcs +ffffffff82a7a2c0 r dce_v10_0_audio_write_sad_regs.eld_reg_to_type +ffffffff82a7a2f0 r dce_v10_0_crtc_irq_funcs +ffffffff82a7a300 r dce_v10_0_pageflip_irq_funcs +ffffffff82a7a310 r dce_v10_0_hpd_irq_funcs ffffffff82a7a320 r interrupt_status_offsets -ffffffff82a7a380 r dce_v11_0_crtc_funcs -ffffffff82a7a440 r dce_v11_0_crtc_helper_funcs +ffffffff82a7a380 r dce_v10_0_crtc_funcs +ffffffff82a7a440 r dce_v10_0_crtc_helper_funcs ffffffff82a7a4c0 r vga_control_regs ffffffff82a7a4e0 r dig_offsets -ffffffff82a7a510 r cz_mgcg_cgcg_init -ffffffff82a7a530 r cz_golden_settings_a11 -ffffffff82a7a550 r stoney_golden_settings_a11 -ffffffff82a7a570 r polaris11_golden_settings_a11 -ffffffff82a7a5b0 r polaris10_golden_settings_a11 -ffffffff82a7b000 R df_v1_7_funcs -ffffffff82a7b070 r df_v1_7_channel_number -ffffffff82a7c000 R df_v3_6_funcs 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golden_settings_gc_10_3_sienna_cichlid -ffffffff82a90390 r golden_settings_gc_10_3_2 -ffffffff82a90780 r golden_settings_gc_10_3_vangogh -ffffffff82a909e0 r golden_settings_gc_10_3_3 -ffffffff82a90bc0 r golden_settings_gc_10_3_4 -ffffffff82a90f20 r golden_settings_gc_10_3_5 -ffffffff82a91220 r golden_settings_gc_10_0_cyan_skillfish -ffffffff82a91550 r golden_settings_gc_10_3_6 -ffffffff82a91760 r golden_settings_gc_10_3_7 -ffffffff82a92000 r gfx_v11_0_ip_funcs -ffffffff82a920a0 R gfx_v11_0_ip_block -ffffffff82a920b8 r gfx_v11_0_kiq_pm4_funcs -ffffffff82a920f8 r gfx_v11_0_ring_funcs_kiq -ffffffff82a92218 r gfx_v11_0_ring_funcs_gfx -ffffffff82a92338 r gfx_v11_0_ring_funcs_compute -ffffffff82a92458 r gfx_v11_0_eop_irq_funcs -ffffffff82a92468 r gfx_v11_0_priv_reg_irq_funcs -ffffffff82a92478 r gfx_v11_0_priv_inst_irq_funcs -ffffffff82a92488 r gfx_v11_0_rlc_funcs -ffffffff82a924f0 r gfx11_cs_data -ffffffff82a92510 r gfx11_SECT_CONTEXT_defs -ffffffff82a92590 r gfx11_SECT_CONTEXT_def_1 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sq_edc_source_names -ffffffff82a945f8 r iceland_rlc_funcs -ffffffff82a94660 r vi_cs_data -ffffffff82a94680 r vi_SECT_CONTEXT_defs -ffffffff82a94700 r vi_SECT_CONTEXT_def_1 -ffffffff82a94a50 r vi_SECT_CONTEXT_def_3 -ffffffff82a94a70 r vi_SECT_CONTEXT_def_4 -ffffffff82a94ce4 r vi_SECT_CONTEXT_def_5 -ffffffff82a94cec r vi_SECT_CONTEXT_def_6 -ffffffff82a94cf0 r vi_SECT_CONTEXT_def_2 -ffffffff82a95140 r vi_SECT_CONTEXT_def_7 -ffffffff82a954f0 r vgpr_init_compute_shader -ffffffff82a95600 r vgpr_init_regs -ffffffff82a95690 r sgpr1_init_regs -ffffffff82a95720 r sgpr2_init_regs -ffffffff82a957b0 r sec_ded_counter_registers -ffffffff82a95820 r iceland_mgcg_cgcg_init -ffffffff82a95b20 r golden_settings_iceland_a11 -ffffffff82a95be0 r iceland_golden_common_all -ffffffff82a95c40 r fiji_mgcg_cgcg_init -ffffffff82a95df0 r golden_settings_fiji_a10 -ffffffff82a95e80 r fiji_golden_common_all -ffffffff82a95f00 r tonga_mgcg_cgcg_init -ffffffff82a96290 r golden_settings_tonga_a11 -ffffffff82a96350 r tonga_golden_common_all -ffffffff82a963b0 r golden_settings_vegam_a11 -ffffffff82a96480 r vegam_golden_common_all -ffffffff82a964d0 r golden_settings_polaris11_a11 -ffffffff82a965a0 r polaris11_golden_common_all -ffffffff82a965f0 r golden_settings_polaris10_a11 -ffffffff82a966c0 r polaris10_golden_common_all -ffffffff82a96720 r cz_mgcg_cgcg_init -ffffffff82a96ab0 r cz_golden_settings_a11 -ffffffff82a96b40 r cz_golden_common_all -ffffffff82a96ba0 r stoney_mgcg_cgcg_init -ffffffff82a96be0 r stoney_golden_settings_a11 -ffffffff82a96c60 r stoney_golden_common_all -ffffffff82a97000 R gfx_v9_0_ras_ops -ffffffff82a97040 r gfx_v9_0_ip_funcs -ffffffff82a970e0 R gfx_v9_0_ip_block -ffffffff82a97100 r ras_gfx_subblocks -ffffffff82a97b80 r gfx_v9_0_edc_counter_regs -ffffffff82a97f20 r gfx_v9_0_ras_fields -ffffffff82a99000 r gfx_v9_0_kiq_pm4_funcs -ffffffff82a99040 r gfx_v9_0_ring_funcs_kiq -ffffffff82a99160 r gfx_v9_0_ring_funcs_gfx -ffffffff82a99280 r gfx_v9_0_ring_funcs_compute -ffffffff82a993a0 r gfx_v9_0_eop_irq_funcs -ffffffff82a993b0 r gfx_v9_0_priv_reg_irq_funcs -ffffffff82a993c0 r gfx_v9_0_priv_inst_irq_funcs -ffffffff82a993d0 r gfx_v9_0_cp_ecc_error_irq_funcs -ffffffff82a993e0 r gfx_v9_0_rlc_funcs -ffffffff82a99450 r gfx9_cs_data -ffffffff82a99470 r gfx9_SECT_CONTEXT_defs -ffffffff82a99500 r gfx9_SECT_CONTEXT_def_1 -ffffffff82a99850 r gfx9_SECT_CONTEXT_def_3 -ffffffff82a99860 r gfx9_SECT_CONTEXT_def_4 -ffffffff82a99ad4 r gfx9_SECT_CONTEXT_def_5 -ffffffff82a99adc r gfx9_SECT_CONTEXT_def_6 -ffffffff82a99ae0 r gfx9_SECT_CONTEXT_def_7 -ffffffff82a99bf0 r gfx9_SECT_CONTEXT_def_2 -ffffffff82a9a060 r gfx9_SECT_CONTEXT_def_8 -ffffffff82a9a2d0 r vgpr_init_compute_shader_arcturus -ffffffff82a9ab60 r vgpr_init_regs_arcturus -ffffffff82a9acf0 r vgpr_init_regs -ffffffff82a9ae80 r sgpr1_init_regs -ffffffff82a9b010 r sgpr2_init_regs -ffffffff82a9b198 r gfx_v9_0_gfx_funcs -ffffffff82a9b1e0 r golden_settings_gc_9_0 -ffffffff82a9b3c0 r golden_settings_gc_9_0_vg10 -ffffffff82a9b570 r golden_settings_gc_9_2_1 -ffffffff82a9b6f0 r golden_settings_gc_9_2_1_vg12 -ffffffff82a9b830 r golden_settings_gc_9_0_vg20 -ffffffff82a9b940 r golden_settings_gc_9_4_1_arct -ffffffff82a9ba50 r golden_settings_gc_9_1 -ffffffff82a9bc90 r golden_settings_gc_9_1_rv2 -ffffffff82a9be60 r golden_settings_gc_9_1_rv1 -ffffffff82a9bf10 r golden_settings_gc_9_1_rn -ffffffff82a9c030 r golden_settings_gc_9_x_common -ffffffff82a9d000 R gfx_v9_4_ras_ops -ffffffff82a9d040 r gfx_v9_4_edc_counter_regs -ffffffff82a9d420 r gfx_v9_4_ras_fields -ffffffff82a9f000 R vgpr_init_regs_aldebaran -ffffffff82a9f1b0 R sgpr112_init_regs_aldebaran -ffffffff82a9f360 R sgpr96_init_regs_aldebaran -ffffffff82a9f510 R sgpr64_init_regs_aldebaran -ffffffff82a9f6c0 r golden_settings_gc_9_4_2_alde -ffffffff82a9f720 r golden_settings_gc_9_4_2_alde_die_0 -ffffffff82a9f7b0 r golden_settings_gc_9_4_2_alde_die_1 -ffffffff82a9f840 r sgpr112_init_compute_shader_aldebaran -ffffffff82a9fa60 r sgpr96_init_compute_shader_aldebaran -ffffffff82a9fc50 r sgpr64_init_compute_shader_aldebaran -ffffffff82a9fdc0 r vgpr_init_compute_shader_aldebaran -ffffffff82aa06a0 r gfx_v9_4_2_edc_counter_regs -ffffffff82aa0a20 r gfx_v9_4_2_ras_fields -ffffffff82aa23c0 r gfx_v9_4_2_utc_blocks -ffffffff82aa3000 R gfxhub_v1_0_funcs -ffffffff82aa4000 R gfxhub_v2_0_funcs -ffffffff82aa4060 r gfxhub_v2_0_vmhub_funcs -ffffffff82aa4070 r gfxhub_client_ids -ffffffff82aa5000 R gfxhub_v2_1_funcs -ffffffff82aa5060 r gfxhub_v2_1_vmhub_funcs +ffffffff82a7a500 r pin_offsets +ffffffff82a7a520 r fiji_mgcg_cgcg_init +ffffffff82a7a540 r golden_settings_fiji_a10 +ffffffff82a7a570 r tonga_mgcg_cgcg_init +ffffffff82a7a590 r golden_settings_tonga_a11 +ffffffff82a7b000 r crtc_offsets +ffffffff82a7b020 r dce_v11_0_ip_funcs +ffffffff82a7b0c0 R dce_v11_0_ip_block +ffffffff82a7b0d8 R dce_v11_2_ip_block +ffffffff82a7b0f0 r dce_v11_0_display_funcs +ffffffff82a7b150 r hpd_offsets +ffffffff82a7b168 r dce_v11_0_encoder_funcs +ffffffff82a7b188 r dce_v11_0_dac_helper_funcs +ffffffff82a7b1f0 r dce_v11_0_dig_helper_funcs +ffffffff82a7b258 r dce_v11_0_ext_helper_funcs +ffffffff82a7b2c0 r dce_v11_0_audio_write_sad_regs.eld_reg_to_type +ffffffff82a7b2f0 r dce_v11_0_crtc_irq_funcs +ffffffff82a7b300 r dce_v11_0_pageflip_irq_funcs +ffffffff82a7b310 r dce_v11_0_hpd_irq_funcs +ffffffff82a7b320 r interrupt_status_offsets +ffffffff82a7b380 r dce_v11_0_crtc_funcs +ffffffff82a7b440 r dce_v11_0_crtc_helper_funcs +ffffffff82a7b4c0 r vga_control_regs +ffffffff82a7b4e0 r dig_offsets +ffffffff82a7b510 r cz_mgcg_cgcg_init +ffffffff82a7b530 r cz_golden_settings_a11 +ffffffff82a7b550 r stoney_golden_settings_a11 +ffffffff82a7b570 r polaris11_golden_settings_a11 +ffffffff82a7b5b0 r polaris10_golden_settings_a11 +ffffffff82a7c000 R df_v1_7_funcs +ffffffff82a7c070 r df_v1_7_channel_number +ffffffff82a7d000 R df_v3_6_funcs +ffffffff82a7d070 r df_v3_6_channel_number +ffffffff82a7e000 r GC_BASE +ffffffff82a7e0a8 r HDP_BASE +ffffffff82a7e150 r MMHUB_BASE +ffffffff82a7e1f8 r ATHUB_BASE +ffffffff82a7e2a0 r NBIO_BASE +ffffffff82a7e348 r MP0_BASE +ffffffff82a7e3f0 r MP1_BASE +ffffffff82a7e498 r VCN0_BASE +ffffffff82a7e540 r DF_BASE +ffffffff82a7e5e8 r DCN_BASE +ffffffff82a7e690 r OSSSYS_BASE +ffffffff82a7e738 r SMUIO_BASE +ffffffff82a7e7e0 r THM_BASE +ffffffff82a7f000 r gfx_v10_0_ip_funcs +ffffffff82a7f0a0 R gfx_v10_0_ip_block +ffffffff82a7f0b8 r gfx_v10_0_kiq_pm4_funcs +ffffffff82a7f0f8 r gfx_v10_0_ring_funcs_kiq +ffffffff82a7f218 r gfx_v10_0_ring_funcs_gfx +ffffffff82a7f338 r gfx_v10_0_ring_funcs_compute +ffffffff82a7f458 r gfx_v10_0_eop_irq_funcs +ffffffff82a7f468 r gfx_v10_0_kiq_irq_funcs +ffffffff82a7f478 r gfx_v10_0_priv_reg_irq_funcs +ffffffff82a7f488 r gfx_v10_0_priv_inst_irq_funcs +ffffffff82a7f498 r gfx_v10_0_rlc_funcs +ffffffff82a7f500 r gfx_v10_0_rlc_funcs_sriov +ffffffff82a7f570 r gfx10_cs_data +ffffffff82a7f590 r gfx10_SECT_CONTEXT_defs +ffffffff82a7f620 r gfx10_SECT_CONTEXT_def_1 +ffffffff82a7f980 r gfx10_SECT_CONTEXT_def_3 +ffffffff82a7f990 r gfx10_SECT_CONTEXT_def_4 +ffffffff82a7fc08 r gfx10_SECT_CONTEXT_def_5 +ffffffff82a7fc10 r gfx10_SECT_CONTEXT_def_6 +ffffffff82a7fc20 r gfx10_SECT_CONTEXT_def_2 +ffffffff82a80060 r gfx10_SECT_CONTEXT_def_7 +ffffffff82a80170 r gfx10_SECT_CONTEXT_def_8 +ffffffff82a804a0 r gfx_v10_0_gfx_funcs +ffffffff82a804e0 r golden_settings_gc_rlc_spm_10_0_nv10 +ffffffff82a86780 r golden_settings_gc_rlc_spm_10_1_nv14 +ffffffff82a8a1a0 r golden_settings_gc_rlc_spm_10_1_2_nv12 +ffffffff82a90440 r golden_settings_gc_10_1 +ffffffff82a90800 r golden_settings_gc_10_0_nv10 +ffffffff82a90800 r golden_settings_gc_10_1_1 +ffffffff82a90b90 r golden_settings_gc_10_1_2 +ffffffff82a90b90 r golden_settings_gc_10_1_nv14 +ffffffff82a90f80 r golden_settings_gc_10_1_2_nv12 +ffffffff82a90f80 r golden_settings_gc_10_3 +ffffffff82a91388 r golden_settings_gc_10_3_sienna_cichlid +ffffffff82a91390 r golden_settings_gc_10_3_2 +ffffffff82a91780 r golden_settings_gc_10_3_vangogh +ffffffff82a919e0 r golden_settings_gc_10_3_3 +ffffffff82a91bc0 r golden_settings_gc_10_3_4 +ffffffff82a91f20 r golden_settings_gc_10_3_5 +ffffffff82a92220 r golden_settings_gc_10_0_cyan_skillfish +ffffffff82a92550 r golden_settings_gc_10_3_6 +ffffffff82a92760 r golden_settings_gc_10_3_7 +ffffffff82a93000 r gfx_v11_0_ip_funcs +ffffffff82a930a0 R gfx_v11_0_ip_block +ffffffff82a930b8 r gfx_v11_0_kiq_pm4_funcs +ffffffff82a930f8 r gfx_v11_0_ring_funcs_kiq +ffffffff82a93218 r gfx_v11_0_ring_funcs_gfx +ffffffff82a93338 r gfx_v11_0_ring_funcs_compute +ffffffff82a93458 r gfx_v11_0_eop_irq_funcs +ffffffff82a93468 r gfx_v11_0_priv_reg_irq_funcs +ffffffff82a93478 r gfx_v11_0_priv_inst_irq_funcs +ffffffff82a93488 r gfx_v11_0_rlc_funcs +ffffffff82a934f0 r gfx11_cs_data +ffffffff82a93510 r gfx11_SECT_CONTEXT_defs +ffffffff82a93590 r gfx11_SECT_CONTEXT_def_1 +ffffffff82a938f0 r gfx11_SECT_CONTEXT_def_3 +ffffffff82a93900 r gfx11_SECT_CONTEXT_def_5 +ffffffff82a93908 r gfx11_SECT_CONTEXT_def_6 +ffffffff82a93910 r gfx11_SECT_CONTEXT_def_2 +ffffffff82a93d50 r gfx11_SECT_CONTEXT_def_4 +ffffffff82a93fd0 r gfx11_SECT_CONTEXT_def_7 +ffffffff82a94438 r gfx_v11_0_gfx_funcs +ffffffff82a94480 r golden_settings_gc_11_0_1 +ffffffff82a94560 r golden_settings_gc_11_0 +ffffffff82a95000 r gfx_v8_0_ip_funcs +ffffffff82a950a0 R gfx_v8_0_ip_block +ffffffff82a950b8 R gfx_v8_1_ip_block +ffffffff82a950d0 r gfx_v8_0_gfx_funcs +ffffffff82a95110 r gfx_v8_0_ring_funcs_kiq +ffffffff82a95230 r gfx_v8_0_ring_funcs_gfx +ffffffff82a95350 r gfx_v8_0_ring_funcs_compute +ffffffff82a95470 r amdgpu_gds_reg_offset +ffffffff82a95570 r gfx_v8_0_eop_irq_funcs +ffffffff82a95580 r gfx_v8_0_priv_reg_irq_funcs +ffffffff82a95590 r gfx_v8_0_priv_inst_irq_funcs +ffffffff82a955a0 r gfx_v8_0_cp_ecc_error_irq_funcs +ffffffff82a955b0 r gfx_v8_0_sq_irq_funcs +ffffffff82a955c0 r sq_edc_source_names +ffffffff82a955f8 r iceland_rlc_funcs +ffffffff82a95660 r vi_cs_data +ffffffff82a95680 r vi_SECT_CONTEXT_defs +ffffffff82a95700 r vi_SECT_CONTEXT_def_1 +ffffffff82a95a50 r vi_SECT_CONTEXT_def_3 +ffffffff82a95a70 r vi_SECT_CONTEXT_def_4 +ffffffff82a95ce4 r vi_SECT_CONTEXT_def_5 +ffffffff82a95cec r vi_SECT_CONTEXT_def_6 +ffffffff82a95cf0 r vi_SECT_CONTEXT_def_2 +ffffffff82a96140 r vi_SECT_CONTEXT_def_7 +ffffffff82a964f0 r vgpr_init_compute_shader +ffffffff82a96600 r vgpr_init_regs +ffffffff82a96690 r sgpr1_init_regs +ffffffff82a96720 r sgpr2_init_regs +ffffffff82a967b0 r sec_ded_counter_registers +ffffffff82a96820 r iceland_mgcg_cgcg_init +ffffffff82a96b20 r golden_settings_iceland_a11 +ffffffff82a96be0 r iceland_golden_common_all +ffffffff82a96c40 r fiji_mgcg_cgcg_init +ffffffff82a96df0 r golden_settings_fiji_a10 +ffffffff82a96e80 r fiji_golden_common_all +ffffffff82a96f00 r tonga_mgcg_cgcg_init +ffffffff82a97290 r golden_settings_tonga_a11 +ffffffff82a97350 r tonga_golden_common_all +ffffffff82a973b0 r golden_settings_vegam_a11 +ffffffff82a97480 r vegam_golden_common_all +ffffffff82a974d0 r golden_settings_polaris11_a11 +ffffffff82a975a0 r polaris11_golden_common_all +ffffffff82a975f0 r golden_settings_polaris10_a11 +ffffffff82a976c0 r polaris10_golden_common_all +ffffffff82a97720 r cz_mgcg_cgcg_init +ffffffff82a97ab0 r cz_golden_settings_a11 +ffffffff82a97b40 r cz_golden_common_all +ffffffff82a97ba0 r stoney_mgcg_cgcg_init +ffffffff82a97be0 r stoney_golden_settings_a11 +ffffffff82a97c60 r stoney_golden_common_all +ffffffff82a98000 R gfx_v9_0_ras_ops +ffffffff82a98040 r gfx_v9_0_ip_funcs +ffffffff82a980e0 R gfx_v9_0_ip_block +ffffffff82a98100 r ras_gfx_subblocks +ffffffff82a98b80 r gfx_v9_0_edc_counter_regs +ffffffff82a98f20 r gfx_v9_0_ras_fields +ffffffff82a9a000 r gfx_v9_0_kiq_pm4_funcs +ffffffff82a9a040 r gfx_v9_0_ring_funcs_kiq +ffffffff82a9a160 r gfx_v9_0_ring_funcs_gfx +ffffffff82a9a280 r gfx_v9_0_ring_funcs_compute +ffffffff82a9a3a0 r gfx_v9_0_eop_irq_funcs +ffffffff82a9a3b0 r gfx_v9_0_priv_reg_irq_funcs +ffffffff82a9a3c0 r gfx_v9_0_priv_inst_irq_funcs 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sdma_v2_4_trap_irq_funcs +ffffffff82ae0228 r sdma_v2_4_illegal_inst_irq_funcs +ffffffff82ae0240 r iceland_mgcg_cgcg_init +ffffffff82ae0260 r golden_settings_iceland_a11 +ffffffff82ae1000 r sdma_v3_0_ip_funcs +ffffffff82ae10a0 R sdma_v3_0_ip_block +ffffffff82ae10b8 R sdma_v3_1_ip_block +ffffffff82ae10d0 r sdma_v3_0_ring_funcs +ffffffff82ae11f0 r sdma_v3_0_buffer_funcs +ffffffff82ae1210 r sdma_v3_0_vm_pte_funcs +ffffffff82ae1230 r sdma_v3_0_trap_irq_funcs +ffffffff82ae1240 r sdma_v3_0_illegal_inst_irq_funcs +ffffffff82ae1250 r fiji_mgcg_cgcg_init +ffffffff82ae1270 r golden_settings_fiji_a10 +ffffffff82ae12d0 r tonga_mgcg_cgcg_init +ffffffff82ae12f0 r golden_settings_tonga_a11 +ffffffff82ae1370 r golden_settings_polaris11_a11 +ffffffff82ae13f0 r golden_settings_polaris10_a11 +ffffffff82ae1470 r cz_mgcg_cgcg_init +ffffffff82ae1490 r cz_golden_settings_a11 +ffffffff82ae1520 r stoney_mgcg_cgcg_init +ffffffff82ae1530 r stoney_golden_settings_a11 +ffffffff82ae2000 R sdma_v4_0_ip_funcs +ffffffff82ae20a0 R sdma_v4_0_ras_hw_ops +ffffffff82ae20e0 R sdma_v4_0_ip_block +ffffffff82ae20f8 r sdma_v4_0_ring_funcs_2nd_mmhub +ffffffff82ae2218 r sdma_v4_0_ring_funcs +ffffffff82ae2338 r sdma_v4_0_page_ring_funcs_2nd_mmhub +ffffffff82ae2458 r sdma_v4_0_page_ring_funcs +ffffffff82ae2578 r sdma_v4_0_buffer_funcs +ffffffff82ae2598 r sdma_v4_0_vm_pte_funcs +ffffffff82ae25b8 r sdma_v4_0_trap_irq_funcs +ffffffff82ae25c8 r sdma_v4_0_illegal_inst_irq_funcs +ffffffff82ae25d8 r sdma_v4_0_ecc_irq_funcs +ffffffff82ae25e8 r sdma_v4_0_vm_hole_irq_funcs +ffffffff82ae25f8 r sdma_v4_0_doorbell_invalid_irq_funcs +ffffffff82ae2608 r sdma_v4_0_pool_timeout_irq_funcs +ffffffff82ae2618 r sdma_v4_0_srbm_write_irq_funcs +ffffffff82ae2630 r golden_settings_sdma_4 +ffffffff82ae2890 r golden_settings_sdma_vg10 +ffffffff82ae2940 r golden_settings_sdma_vg12 +ffffffff82ae29f0 r golden_settings_sdma0_4_2_init +ffffffff82ae2a10 r golden_settings_sdma0_4_2 +ffffffff82ae2ca0 r golden_settings_sdma1_4_2 +ffffffff82ae2f30 r golden_settings_sdma_arct +ffffffff82ae3230 r golden_settings_sdma_aldebaran +ffffffff82ae33a0 r golden_settings_sdma_4_1 +ffffffff82ae34b0 r golden_settings_sdma_rv2 +ffffffff82ae34e0 r golden_settings_sdma_rv1 +ffffffff82ae3510 r golden_settings_sdma_4_3 +ffffffff82ae3600 r sdma_v4_0_ras_fields +ffffffff82ae4000 R sdma_v4_4_ras_hw_ops +ffffffff82ae4040 r sdma_v4_4_ras_fields +ffffffff82ae5000 R sdma_v5_0_ip_funcs +ffffffff82ae50a0 R sdma_v5_0_ip_block +ffffffff82ae50b8 r sdma_v5_0_ring_funcs +ffffffff82ae51d8 r sdma_v5_0_buffer_funcs +ffffffff82ae51f8 r sdma_v5_0_vm_pte_funcs +ffffffff82ae5218 r sdma_v5_0_trap_irq_funcs +ffffffff82ae5228 r sdma_v5_0_illegal_inst_irq_funcs +ffffffff82ae5240 r golden_settings_sdma_5 +ffffffff82ae5480 r golden_settings_sdma_nv10 +ffffffff82ae54b0 r golden_settings_sdma_nv14 +ffffffff82ae54e0 r golden_settings_sdma_5_sriov +ffffffff82ae56c0 r golden_settings_sdma_nv12 +ffffffff82ae5750 r golden_settings_sdma_cyan_skillfish +ffffffff82ae6000 R sdma_v5_2_ip_funcs +ffffffff82ae60a0 R sdma_v5_2_ip_block +ffffffff82ae60b8 r sdma_v5_2_ring_funcs +ffffffff82ae61d8 r sdma_v5_2_buffer_funcs +ffffffff82ae61f8 r sdma_v5_2_vm_pte_funcs +ffffffff82ae6218 r sdma_v5_2_trap_irq_funcs +ffffffff82ae6228 r sdma_v5_2_illegal_inst_irq_funcs +ffffffff82ae7000 R sdma_v6_0_ip_funcs +ffffffff82ae70a0 R sdma_v6_0_ip_block +ffffffff82ae70b8 r sdma_v6_0_ring_funcs +ffffffff82ae71d8 r sdma_v6_0_buffer_funcs +ffffffff82ae71f8 r sdma_v6_0_vm_pte_funcs +ffffffff82ae7218 r sdma_v6_0_trap_irq_funcs +ffffffff82ae7228 r sdma_v6_0_illegal_inst_irq_funcs +ffffffff82ae8000 r smu_v11_0_i2c_algo +ffffffff82ae8010 r smu_v11_0_i2c_i2c_lock_ops +ffffffff82ae8028 r smu_v11_0_i2c_control_quirks +ffffffff82ae9000 R smuio_v11_0_funcs +ffffffff82aea000 R smuio_v11_0_6_funcs +ffffffff82aeb000 R smuio_v13_0_funcs +ffffffff82aec000 R smuio_v13_0_6_funcs +ffffffff82aed000 R smuio_v9_0_funcs +ffffffff82aee000 r soc15_common_ip_funcs +ffffffff82aee0a0 R vega10_common_ip_block +ffffffff82aee0b8 r soc15_asic_funcs +ffffffff82aee170 r vega20_asic_funcs +ffffffff82aee230 r soc15_allowed_read_registers +ffffffff82aee3c0 r vega_video_codecs_encode +ffffffff82aee3d0 r vega_video_codecs_decode +ffffffff82aee3e0 r rv_video_codecs_decode +ffffffff82aee3f0 r rn_video_codecs_decode +ffffffff82aee400 r vega_video_codecs_encode_array +ffffffff82aee430 r vega_video_codecs_decode_array +ffffffff82aee4b0 r rv_video_codecs_decode_array +ffffffff82aee540 r rn_video_codecs_decode_array +ffffffff82aef000 r soc21_common_ip_funcs +ffffffff82aef0a0 R soc21_common_ip_block +ffffffff82aef0b8 r soc21_asic_funcs +ffffffff82aef170 r soc21_allowed_read_registers +ffffffff82aef2f0 r vcn_4_0_0_video_codecs_encode_vcn1 +ffffffff82aef300 r vcn_4_0_0_video_codecs_decode_vcn1 +ffffffff82aef310 r vcn_4_0_0_video_codecs_encode_vcn0 +ffffffff82aef320 r vcn_4_0_0_video_codecs_decode_vcn0 +ffffffff82aef330 r vcn_4_0_0_video_codecs_encode_array_vcn1 +ffffffff82aef360 r vcn_4_0_0_video_codecs_decode_array_vcn1 +ffffffff82aef3b0 r vcn_4_0_0_video_codecs_encode_array_vcn0 +ffffffff82aef3e0 r vcn_4_0_0_video_codecs_decode_array_vcn0 +ffffffff82af0000 r tonga_ih_ip_funcs +ffffffff82af00a0 R tonga_ih_ip_block +ffffffff82af00b8 r tonga_ih_funcs +ffffffff82af1000 R umc_v6_0_funcs +ffffffff82af2000 R umc_v6_1_channel_idx_tbl +ffffffff82af2080 R umc_v6_1_ras_hw_ops +ffffffff82af3000 R umc_v6_7_channel_idx_tbl_second +ffffffff82af3080 R umc_v6_7_channel_idx_tbl_first +ffffffff82af3100 R umc_v6_7_ras_hw_ops +ffffffff82af4000 R umc_v8_10_channelnum_map_colbit_table +ffffffff82af4040 R umc_v8_10_channel_idx_tbl +ffffffff82af40a0 R umc_v8_10_ras_hw_ops +ffffffff82af5000 R umc_v8_7_channel_idx_tbl +ffffffff82af5040 R umc_v8_7_ras_hw_ops +ffffffff82af6000 r uvd_v5_0_ip_funcs +ffffffff82af60a0 R uvd_v5_0_ip_block +ffffffff82af60b8 r uvd_v5_0_ring_funcs +ffffffff82af61d8 r uvd_v5_0_irq_funcs +ffffffff82af7000 r uvd_v6_0_ip_funcs +ffffffff82af70a0 R uvd_v6_0_ip_block +ffffffff82af70b8 R uvd_v6_2_ip_block +ffffffff82af70d0 R uvd_v6_3_ip_block +ffffffff82af70e8 r uvd_v6_0_ring_vm_funcs +ffffffff82af7208 r uvd_v6_0_ring_phys_funcs +ffffffff82af7328 r uvd_v6_0_enc_ring_vm_funcs +ffffffff82af7448 r uvd_v6_0_irq_funcs +ffffffff82af8000 R uvd_v7_0_ip_funcs +ffffffff82af80a0 R uvd_v7_0_ip_block +ffffffff82af80b8 r uvd_v7_0_ring_vm_funcs +ffffffff82af81d8 r uvd_v7_0_enc_ring_vm_funcs +ffffffff82af82f8 r uvd_v7_0_irq_funcs +ffffffff82af9000 r vce_v3_0_ip_funcs +ffffffff82af90a0 R vce_v3_0_ip_block +ffffffff82af90b8 R vce_v3_1_ip_block +ffffffff82af90d0 R vce_v3_4_ip_block +ffffffff82af90e8 r vce_v3_0_ring_vm_funcs +ffffffff82af9208 r vce_v3_0_ring_phys_funcs +ffffffff82af9328 r vce_v3_0_irq_funcs +ffffffff82afa000 R vce_v4_0_ip_funcs +ffffffff82afa0a0 R vce_v4_0_ip_block +ffffffff82afa0b8 r vce_v4_0_ring_vm_funcs +ffffffff82afa1d8 r vce_v4_0_irq_funcs +ffffffff82afb000 r vcn_v1_0_ip_funcs +ffffffff82afb0a0 R vcn_v1_0_ip_block +ffffffff82afb0b8 r vcn_v1_0_dec_ring_vm_funcs +ffffffff82afb1d8 r vcn_v1_0_enc_ring_vm_funcs +ffffffff82afb2f8 r vcn_v1_0_irq_funcs +ffffffff82afc000 r vcn_v2_0_ip_funcs +ffffffff82afc0a0 R vcn_v2_0_ip_block +ffffffff82afc0b8 r vcn_v2_0_dec_ring_vm_funcs +ffffffff82afc1d8 r vcn_v2_0_enc_ring_vm_funcs +ffffffff82afc2f8 r vcn_v2_0_irq_funcs +ffffffff82afd000 r vcn_v2_5_ip_funcs +ffffffff82afd0a0 R vcn_v2_5_ip_block +ffffffff82afd0b8 r vcn_v2_6_ip_funcs +ffffffff82afd158 R vcn_v2_6_ip_block +ffffffff82afd170 R vcn_v2_6_ras_hw_ops +ffffffff82afd1b0 r vcn_v2_5_dec_ring_vm_funcs +ffffffff82afd2d0 r vcn_v2_6_dec_ring_vm_funcs +ffffffff82afd3f0 r vcn_v2_5_enc_ring_vm_funcs +ffffffff82afd510 r vcn_v2_6_enc_ring_vm_funcs +ffffffff82afd630 r vcn_v2_5_irq_funcs +ffffffff82afe000 r vcn_v3_0_ip_funcs +ffffffff82afe0a0 R vcn_v3_0_ip_block +ffffffff82afe0b8 r vcn_v3_0_dec_ring_vm_funcs +ffffffff82afe1d8 r vcn_v3_0_enc_ring_vm_funcs +ffffffff82afe2f8 r vcn_v3_0_irq_funcs +ffffffff82aff000 r vcn_v4_0_ip_funcs +ffffffff82aff0a0 R vcn_v4_0_ip_block +ffffffff82aff0b8 r vcn_v4_0_unified_ring_vm_funcs +ffffffff82aff1d8 r vcn_v4_0_irq_funcs +ffffffff82b00000 R vega10_ih_ip_funcs +ffffffff82b000a0 R vega10_ih_ip_block +ffffffff82b000b8 r vega10_ih_funcs +ffffffff82b000d8 r vega10_ih_self_irq_funcs +ffffffff82b01000 r GC_BASE +ffffffff82b01064 r HDP_BASE +ffffffff82b010c8 r MMHUB_BASE +ffffffff82b0112c r ATHUB_BASE +ffffffff82b01190 r NBIO_BASE +ffffffff82b011f4 r MP0_BASE +ffffffff82b01258 r MP1_BASE +ffffffff82b012bc r VCE_BASE +ffffffff82b01320 r VCN_BASE +ffffffff82b01384 r DF_BASE +ffffffff82b013e8 r DCE_BASE +ffffffff82b0144c r OSSSYS_BASE +ffffffff82b014b0 r SDMA0_BASE +ffffffff82b01514 r SDMA1_BASE +ffffffff82b01578 r SMUIO_BASE +ffffffff82b015dc r PWR_BASE +ffffffff82b01640 r NBIF_BASE +ffffffff82b016a4 r THM_BASE +ffffffff82b01708 r CLK_BASE +ffffffff82b02000 R vega20_ih_ip_funcs +ffffffff82b020a0 R vega20_ih_ip_block +ffffffff82b020b8 r vega20_ih_funcs +ffffffff82b020d8 r vega20_ih_self_irq_funcs +ffffffff82b03000 r GC_BASE +ffffffff82b03090 r HDP_BASE +ffffffff82b03120 r MMHUB_BASE +ffffffff82b031b0 r ATHUB_BASE +ffffffff82b03240 r NBIO_BASE +ffffffff82b032d0 r MP0_BASE +ffffffff82b03360 r MP1_BASE +ffffffff82b033f0 r UVD_BASE +ffffffff82b03480 r VCE_BASE +ffffffff82b03510 r DF_BASE +ffffffff82b035a0 r DCE_BASE +ffffffff82b03630 r OSSSYS_BASE +ffffffff82b036c0 r SDMA0_BASE +ffffffff82b03750 r SDMA1_BASE +ffffffff82b037e0 r SMUIO_BASE +ffffffff82b03870 r THM_BASE +ffffffff82b03900 r CLK_BASE +ffffffff82b03990 r UMC_BASE +ffffffff82b03a20 r RSMU_BASE +ffffffff82b04000 r vi_common_ip_block +ffffffff82b04018 r vi_common_ip_funcs +ffffffff82b040b8 r vi_asic_funcs +ffffffff82b04170 r vi_allowed_read_registers +ffffffff82b043d0 r topaz_video_codecs_encode +ffffffff82b043e0 r topaz_video_codecs_decode +ffffffff82b043f0 r tonga_video_codecs_encode +ffffffff82b04400 r tonga_video_codecs_decode +ffffffff82b04410 r polaris_video_codecs_encode +ffffffff82b04420 r cz_video_codecs_decode +ffffffff82b04430 r tonga_video_codecs_encode_array +ffffffff82b04450 r tonga_video_codecs_decode_array +ffffffff82b044a0 r polaris_video_codecs_encode_array +ffffffff82b044d0 r cz_video_codecs_decode_array +ffffffff82b04550 r iceland_mgcg_cgcg_init +ffffffff82b04590 r fiji_mgcg_cgcg_init +ffffffff82b045f0 r tonga_mgcg_cgcg_init +ffffffff82b04650 r cz_mgcg_cgcg_init +ffffffff82b04690 r stoney_mgcg_cgcg_init +ffffffff82b05000 r amdgpu_dm_funcs +ffffffff82b050a0 R dm_ip_block +ffffffff82b050b8 R amdgpu_dm_encoder_helper_funcs +ffffffff82b05120 r dm_display_funcs +ffffffff82b05180 r hpd_disconnect_quirk_table +ffffffff82b05ef0 r amdgpu_dm_mode_funcs +ffffffff82b05f38 r amdgpu_dm_encoder_funcs +ffffffff82b05f58 r amdgpu_dm_connector_funcs +ffffffff82b05fd0 r amdgpu_dm_connector_helper_funcs +ffffffff82b06020 r amdgpu_dm_i2c_algo +ffffffff82b061f0 r add_fs_modes.common_rates +ffffffff82b06220 r amdgpu_dm_backlight_ops +ffffffff82b07000 r amdgpu_dm_crtc_funcs +ffffffff82b070c0 r amdgpu_dm_crtc_helper_funcs +ffffffff82b08000 r dm_dtn_log_begin.msg +ffffffff82b0800d r dm_dtn_log_end.msg +ffffffff82b08018 r SYNAPTICS_DEVICE_ID +ffffffff82b09000 r dm_crtc_irq_funcs +ffffffff82b09010 r dm_vline0_irq_funcs +ffffffff82b09020 r dm_dmub_outbox_irq_funcs +ffffffff82b09030 r dm_vupdate_irq_funcs +ffffffff82b09040 r dm_dmub_trace_irq_funcs +ffffffff82b09050 r dm_pageflip_irq_funcs +ffffffff82b09060 r dm_hpd_irq_funcs +ffffffff82b0a000 r amdgpu_dm_encoder_funcs +ffffffff82b0a020 r dm_mst_cbs +ffffffff82b0a030 r dm_dp_mst_connector_funcs +ffffffff82b0a0a8 r dm_dp_mst_connector_helper_funcs +ffffffff82b0b000 r dm_plane_funcs +ffffffff82b0b068 r dm_plane_helper_funcs ffffffff82b0d000 r vbios_funcs -ffffffff82b12000 r command_table_helper_funcs +ffffffff82b0e000 r vbios_funcs ffffffff82b13000 r command_table_helper_funcs ffffffff82b14000 r command_table_helper_funcs ffffffff82b15000 r command_table_helper_funcs -ffffffff82b16000 r dce80_max_clks_by_state -ffffffff82b16028 r disp_clk_regs -ffffffff82b1607c r disp_clk_shift -ffffffff82b16088 r disp_clk_mask -ffffffff82b17000 r dce110_max_clks_by_state +ffffffff82b16000 r command_table_helper_funcs +ffffffff82b17000 r dce80_max_clks_by_state ffffffff82b17028 r disp_clk_regs ffffffff82b1707c r disp_clk_shift ffffffff82b17088 r disp_clk_mask -ffffffff82b18000 r dce112_max_clks_by_state +ffffffff82b18000 r dce110_max_clks_by_state ffffffff82b18028 r disp_clk_regs ffffffff82b1807c r disp_clk_shift ffffffff82b18088 r disp_clk_mask -ffffffff82b19000 r dce120_max_clks_by_state -ffffffff82b1a000 r clk_mgr_regs -ffffffff82b1a054 r clk_mgr_shift -ffffffff82b1a060 r clk_mgr_mask +ffffffff82b19000 r dce112_max_clks_by_state +ffffffff82b19028 r disp_clk_regs +ffffffff82b1907c r disp_clk_shift +ffffffff82b19088 r disp_clk_mask +ffffffff82b1a000 r dce120_max_clks_by_state ffffffff82b1b000 r clk_mgr_regs ffffffff82b1b054 r clk_mgr_shift ffffffff82b1b060 r clk_mgr_mask ffffffff82b1c000 r clk_mgr_regs ffffffff82b1c054 r clk_mgr_shift ffffffff82b1c060 r clk_mgr_mask -ffffffff82b1d000 r lpddr5_wm_table -ffffffff82b1d0c0 r ddr5_wm_table +ffffffff82b1d000 r clk_mgr_regs +ffffffff82b1d054 r clk_mgr_shift +ffffffff82b1d060 r clk_mgr_mask ffffffff82b1e000 r lpddr5_wm_table ffffffff82b1e0c0 r ddr5_wm_table ffffffff82b1f000 r lpddr5_wm_table ffffffff82b1f0c0 r ddr5_wm_table ffffffff82b20000 r lpddr5_wm_table -ffffffff82b200c0 r ddr4_wm_table -ffffffff82b21000 r clk_mgr_regs_dcn321 -ffffffff82b21054 r clk_mgr_shift_dcn321 -ffffffff82b21060 r clk_mgr_mask_dcn321 -ffffffff82b21084 r clk_mgr_regs_dcn32 -ffffffff82b210d8 r clk_mgr_shift_dcn32 -ffffffff82b210e4 r clk_mgr_mask_dcn32 -ffffffff82b22000 r DC_BUILD_ID -ffffffff82b24000 r output_csc_matrix -ffffffff82b240e0 r black_color_format -ffffffff82b25000 r DP_SINK_BRANCH_DEV_NAME_7580 -ffffffff82b26000 r DP_VGA_DONGLE_BRANCH_DEV_NAME -ffffffff82b26006 r DP_DVI_CONVERTER_ID_4 -ffffffff82b2600d r DP_DVI_CONVERTER_ID_5 -ffffffff82b27000 r DP_VGA_LVDS_CONVERTER_ID_2 -ffffffff82b27007 r DP_VGA_LVDS_CONVERTER_ID_3 -ffffffff82b27010 r dp_lt_fallbacks -ffffffff82b28000 r mandatory_dpcd_partitions -ffffffff82b2a000 r dce_funcs -ffffffff82b2b000 r funcs -ffffffff82b2c000 R video_optimized_pixel_rates -ffffffff82b2c1b0 r dce110_clk_src_funcs -ffffffff82b2c1d8 r dce112_clk_src_funcs -ffffffff82b2c200 r dcn20_clk_src_funcs -ffffffff82b2c228 r dcn3_clk_src_funcs -ffffffff82b2c250 r dcn31_clk_src_funcs -ffffffff82b2d000 r dce_funcs -ffffffff82b2d068 r dcn10_funcs -ffffffff82b2d0d0 r dcn20_funcs -ffffffff82b2d138 r dcn21_funcs -ffffffff82b2e000 r dce_ipp_funcs -ffffffff82b2f000 r dce110_lnk_enc_funcs -ffffffff82b30000 r dce_mi_funcs -ffffffff82b30090 r dce112_mi_funcs -ffffffff82b30120 r dce120_mi_funcs -ffffffff82b301b0 r pte_settings -ffffffff82b31000 r funcs -ffffffff82b32000 r dce_link_panel_cntl_funcs -ffffffff82b33000 r filter_3tap_16p_upscale -ffffffff82b33040 r filter_3tap_16p_116 -ffffffff82b33080 r filter_3tap_16p_149 -ffffffff82b330c0 r filter_3tap_16p_183 -ffffffff82b33100 r filter_3tap_64p_upscale -ffffffff82b331d0 r filter_3tap_64p_116 -ffffffff82b332a0 r filter_3tap_64p_149 -ffffffff82b33370 r filter_3tap_64p_183 -ffffffff82b33440 r filter_4tap_16p_upscale -ffffffff82b33490 r filter_4tap_16p_116 -ffffffff82b334e0 r filter_4tap_16p_149 -ffffffff82b33530 r filter_4tap_16p_183 -ffffffff82b33580 r filter_4tap_64p_upscale -ffffffff82b33690 r filter_4tap_64p_116 -ffffffff82b337a0 r filter_4tap_64p_149 -ffffffff82b338b0 r filter_4tap_64p_183 -ffffffff82b339c0 r filter_5tap_64p_upscale -ffffffff82b33b10 r filter_5tap_64p_116 -ffffffff82b33c60 r filter_5tap_64p_149 -ffffffff82b33db0 r filter_5tap_64p_183 -ffffffff82b33f00 r filter_6tap_64p_upscale -ffffffff82b34090 r filter_6tap_64p_116 -ffffffff82b34220 r filter_6tap_64p_149 -ffffffff82b343b0 r filter_6tap_64p_183 -ffffffff82b34540 r filter_7tap_64p_upscale -ffffffff82b34710 r filter_7tap_64p_116 -ffffffff82b348e0 r filter_7tap_64p_149 -ffffffff82b34ab0 r filter_7tap_64p_183 -ffffffff82b34c80 r filter_8tap_64p_upscale -ffffffff82b34e90 r filter_8tap_64p_116 -ffffffff82b350a0 r filter_8tap_64p_149 -ffffffff82b352b0 r filter_8tap_64p_183 -ffffffff82b354c0 r filter_2tap_16p -ffffffff82b354f0 r filter_2tap_64p -ffffffff82b36000 r dce110_str_enc_funcs -ffffffff82b36110 r audio_clock_info_table_48bpc -ffffffff82b362a0 r audio_clock_info_table_36bpc -ffffffff82b36430 r audio_clock_info_table -ffffffff82b37000 r global_color_matrix -ffffffff82b370a8 r dce_transform_funcs -ffffffff82b38000 r abm_funcs -ffffffff82b39000 r psr_funcs -ffffffff82b39040 r DP_SINK_DEVICE_STR_ID_1 -ffffffff82b39045 r DP_SINK_DEVICE_STR_ID_2 -ffffffff82b3a000 r reg_offsets -ffffffff82b3b000 r bios_regs -ffffffff82b3b008 r res_cap -ffffffff82b3b048 r dce100_res_pool_funcs -ffffffff82b3b130 r clk_src_regs -ffffffff82b3b22c r dmcu_regs -ffffffff82b3b288 r dmcu_shift -ffffffff82b3b29c r dmcu_mask -ffffffff82b3b2e8 r abm_regs -ffffffff82b3b328 r abm_shift -ffffffff82b3b33c r abm_mask -ffffffff82b3b390 r dce100_tg_offsets -ffffffff82b3b3d8 r plane_cap -ffffffff82b3b408 r res_create_funcs -ffffffff82b3b440 r panel_cntl_regs -ffffffff82b3b460 r panel_cntl_shift -ffffffff82b3b470 r panel_cntl_mask -ffffffff82b3b4b0 r link_enc_regs -ffffffff82b3b870 r link_enc_aux_regs -ffffffff82b3b8c0 r link_enc_hpd_regs -ffffffff82b3b8d8 r link_enc_feature -ffffffff82b3b8e8 r cs_shift -ffffffff82b3b8f4 r cs_mask -ffffffff82b3b920 r mi_regs -ffffffff82b3bc38 r mi_shifts -ffffffff82b3bc80 r mi_masks -ffffffff82b3bda0 r ipp_regs -ffffffff82b3bf98 r ipp_shift -ffffffff82b3bfc0 r ipp_mask -ffffffff82b3c060 r xfm_regs -ffffffff82b3c600 r xfm_shift -ffffffff82b3c660 r xfm_mask -ffffffff82b3c7e0 r opp_regs -ffffffff82b3c930 r opp_shift -ffffffff82b3c95c r opp_mask -ffffffff82b3ca10 r aux_engine_regs -ffffffff82b3cb00 r aux_mask -ffffffff82b3cb60 r aux_shift -ffffffff82b3cb80 r i2c_hw_regs -ffffffff82b3ccd0 r i2c_shifts -ffffffff82b3ccfc r i2c_masks -ffffffff82b3cda0 r audio_regs -ffffffff82b3ced4 r audio_shift -ffffffff82b3ceec r audio_mask -ffffffff82b3cf30 r stream_enc_regs -ffffffff82b3d5dc r se_shift -ffffffff82b3d660 r se_mask -ffffffff82b3d864 r hwseq_reg -ffffffff82b3da80 r hwseq_shift -ffffffff82b3db00 r hwseq_mask -ffffffff82b3e000 r reg_offsets -ffffffff82b3e018 r dce110_compressor_funcs -ffffffff82b3f000 r dce110_funcs -ffffffff82b3f2c0 r dce110_private_funcs -ffffffff82b40000 r dce110_mem_input_v_funcs -ffffffff82b40090 r dvmm_Hw_Setting_1DTiling -ffffffff82b40120 r dvmm_Hw_Setting_2DTiling -ffffffff82b401b0 r dvmm_Hw_Setting_Linear -ffffffff82b41000 r global_color_matrix -ffffffff82b410b0 r input_csc_matrix -ffffffff82b42000 r funcs -ffffffff82b43000 r bios_regs -ffffffff82b43008 r dce110_res_pool_funcs -ffffffff82b430f0 r clk_src_regs -ffffffff82b431ec r dmcu_regs -ffffffff82b43248 r dmcu_shift -ffffffff82b4325c r dmcu_mask -ffffffff82b432a8 r abm_regs -ffffffff82b432e8 r abm_shift -ffffffff82b432fc r abm_mask -ffffffff82b43350 r dce110_tg_offsets -ffffffff82b43398 r res_create_funcs -ffffffff82b433c8 r plane_cap -ffffffff82b433f4 r underlay_plane_cap -ffffffff82b43420 r stoney_resource_cap -ffffffff82b4345c r carrizo_resource_cap -ffffffff82b434a0 r panel_cntl_regs -ffffffff82b434c0 r panel_cntl_shift -ffffffff82b434d0 r panel_cntl_mask -ffffffff82b43510 r link_enc_regs -ffffffff82b438d0 r link_enc_aux_regs -ffffffff82b43920 r link_enc_hpd_regs -ffffffff82b43938 r link_enc_feature -ffffffff82b43948 r cs_shift -ffffffff82b43954 r cs_mask -ffffffff82b43980 r mi_regs -ffffffff82b43b0c r mi_shifts -ffffffff82b43b54 r mi_masks -ffffffff82b43c70 r ipp_regs -ffffffff82b43d6c r ipp_shift -ffffffff82b43d94 r ipp_mask -ffffffff82b43e30 r xfm_regs -ffffffff82b44100 r xfm_shift -ffffffff82b44160 r xfm_mask -ffffffff82b442e0 r opp_regs -ffffffff82b44430 r opp_shift -ffffffff82b4445c r opp_mask -ffffffff82b44510 r aux_engine_regs -ffffffff82b44600 r aux_mask -ffffffff82b44660 r aux_shift -ffffffff82b44680 r i2c_hw_regs -ffffffff82b447d0 r i2c_shifts -ffffffff82b447fc r i2c_masks -ffffffff82b448a0 r audio_regs -ffffffff82b449d4 r audio_shift -ffffffff82b449ec r audio_mask -ffffffff82b44a30 r stream_enc_regs -ffffffff82b44d0c r se_shift -ffffffff82b44d90 r se_mask -ffffffff82b44f94 r hwseq_stoney_reg -ffffffff82b451b0 r hwseq_cz_reg -ffffffff82b453cc r hwseq_shift -ffffffff82b4544c r hwseq_mask -ffffffff82b46000 r dce110_tg_funcs -ffffffff82b47000 r dce110_tg_v_funcs -ffffffff82b48000 r dce110_xfmv_funcs -ffffffff82b49000 r reg_offsets +ffffffff82b200c0 r ddr5_wm_table +ffffffff82b21000 r lpddr5_wm_table +ffffffff82b210c0 r ddr4_wm_table +ffffffff82b22000 r clk_mgr_regs_dcn321 +ffffffff82b22054 r clk_mgr_shift_dcn321 +ffffffff82b22060 r clk_mgr_mask_dcn321 +ffffffff82b22084 r clk_mgr_regs_dcn32 +ffffffff82b220d8 r clk_mgr_shift_dcn32 +ffffffff82b220e4 r clk_mgr_mask_dcn32 +ffffffff82b23000 r DC_BUILD_ID +ffffffff82b25000 r output_csc_matrix +ffffffff82b250e0 r black_color_format +ffffffff82b26000 r DP_SINK_BRANCH_DEV_NAME_7580 +ffffffff82b27000 r DP_VGA_DONGLE_BRANCH_DEV_NAME +ffffffff82b27006 r DP_DVI_CONVERTER_ID_4 +ffffffff82b2700d r DP_DVI_CONVERTER_ID_5 +ffffffff82b28000 r DP_VGA_LVDS_CONVERTER_ID_2 +ffffffff82b28007 r DP_VGA_LVDS_CONVERTER_ID_3 +ffffffff82b28010 r dp_lt_fallbacks +ffffffff82b29000 r mandatory_dpcd_partitions +ffffffff82b2b000 r dce_funcs +ffffffff82b2c000 r funcs +ffffffff82b2d000 R video_optimized_pixel_rates +ffffffff82b2d1b0 r dce110_clk_src_funcs +ffffffff82b2d1d8 r dce112_clk_src_funcs +ffffffff82b2d200 r dcn20_clk_src_funcs +ffffffff82b2d228 r dcn3_clk_src_funcs +ffffffff82b2d250 r dcn31_clk_src_funcs +ffffffff82b2e000 r dce_funcs +ffffffff82b2e068 r dcn10_funcs +ffffffff82b2e0d0 r dcn20_funcs +ffffffff82b2e138 r dcn21_funcs +ffffffff82b2f000 r dce_ipp_funcs +ffffffff82b30000 r dce110_lnk_enc_funcs +ffffffff82b31000 r dce_mi_funcs +ffffffff82b31090 r dce112_mi_funcs +ffffffff82b31120 r dce120_mi_funcs +ffffffff82b311b0 r pte_settings +ffffffff82b32000 r funcs +ffffffff82b33000 r dce_link_panel_cntl_funcs +ffffffff82b34000 r filter_3tap_16p_upscale +ffffffff82b34040 r filter_3tap_16p_116 +ffffffff82b34080 r filter_3tap_16p_149 +ffffffff82b340c0 r filter_3tap_16p_183 +ffffffff82b34100 r filter_3tap_64p_upscale +ffffffff82b341d0 r filter_3tap_64p_116 +ffffffff82b342a0 r filter_3tap_64p_149 +ffffffff82b34370 r filter_3tap_64p_183 +ffffffff82b34440 r filter_4tap_16p_upscale +ffffffff82b34490 r filter_4tap_16p_116 +ffffffff82b344e0 r filter_4tap_16p_149 +ffffffff82b34530 r filter_4tap_16p_183 +ffffffff82b34580 r filter_4tap_64p_upscale +ffffffff82b34690 r filter_4tap_64p_116 +ffffffff82b347a0 r filter_4tap_64p_149 +ffffffff82b348b0 r filter_4tap_64p_183 +ffffffff82b349c0 r filter_5tap_64p_upscale +ffffffff82b34b10 r filter_5tap_64p_116 +ffffffff82b34c60 r filter_5tap_64p_149 +ffffffff82b34db0 r filter_5tap_64p_183 +ffffffff82b34f00 r filter_6tap_64p_upscale +ffffffff82b35090 r filter_6tap_64p_116 +ffffffff82b35220 r filter_6tap_64p_149 +ffffffff82b353b0 r filter_6tap_64p_183 +ffffffff82b35540 r filter_7tap_64p_upscale +ffffffff82b35710 r filter_7tap_64p_116 +ffffffff82b358e0 r filter_7tap_64p_149 +ffffffff82b35ab0 r filter_7tap_64p_183 +ffffffff82b35c80 r filter_8tap_64p_upscale +ffffffff82b35e90 r filter_8tap_64p_116 +ffffffff82b360a0 r filter_8tap_64p_149 +ffffffff82b362b0 r filter_8tap_64p_183 +ffffffff82b364c0 r filter_2tap_16p +ffffffff82b364f0 r filter_2tap_64p +ffffffff82b37000 r dce110_str_enc_funcs +ffffffff82b37110 r audio_clock_info_table_48bpc +ffffffff82b372a0 r audio_clock_info_table_36bpc +ffffffff82b37430 r audio_clock_info_table +ffffffff82b38000 r global_color_matrix +ffffffff82b380a8 r dce_transform_funcs +ffffffff82b39000 r abm_funcs +ffffffff82b3a000 r psr_funcs +ffffffff82b3a040 r DP_SINK_DEVICE_STR_ID_1 +ffffffff82b3a045 r DP_SINK_DEVICE_STR_ID_2 +ffffffff82b3b000 r reg_offsets +ffffffff82b3c000 r bios_regs +ffffffff82b3c008 r res_cap +ffffffff82b3c048 r dce100_res_pool_funcs +ffffffff82b3c130 r clk_src_regs +ffffffff82b3c22c r dmcu_regs +ffffffff82b3c288 r dmcu_shift +ffffffff82b3c29c r dmcu_mask +ffffffff82b3c2e8 r abm_regs +ffffffff82b3c328 r abm_shift +ffffffff82b3c33c r abm_mask +ffffffff82b3c390 r dce100_tg_offsets +ffffffff82b3c3d8 r plane_cap +ffffffff82b3c408 r res_create_funcs +ffffffff82b3c440 r panel_cntl_regs +ffffffff82b3c460 r panel_cntl_shift +ffffffff82b3c470 r panel_cntl_mask +ffffffff82b3c4b0 r link_enc_regs +ffffffff82b3c870 r link_enc_aux_regs +ffffffff82b3c8c0 r link_enc_hpd_regs +ffffffff82b3c8d8 r link_enc_feature +ffffffff82b3c8e8 r cs_shift +ffffffff82b3c8f4 r cs_mask +ffffffff82b3c920 r mi_regs +ffffffff82b3cc38 r mi_shifts +ffffffff82b3cc80 r mi_masks +ffffffff82b3cda0 r ipp_regs +ffffffff82b3cf98 r ipp_shift +ffffffff82b3cfc0 r ipp_mask +ffffffff82b3d060 r xfm_regs +ffffffff82b3d600 r xfm_shift +ffffffff82b3d660 r xfm_mask +ffffffff82b3d7e0 r opp_regs +ffffffff82b3d930 r opp_shift +ffffffff82b3d95c r opp_mask +ffffffff82b3da10 r aux_engine_regs +ffffffff82b3db00 r aux_mask +ffffffff82b3db60 r aux_shift +ffffffff82b3db80 r i2c_hw_regs +ffffffff82b3dcd0 r i2c_shifts +ffffffff82b3dcfc r i2c_masks +ffffffff82b3dda0 r audio_regs +ffffffff82b3ded4 r audio_shift +ffffffff82b3deec r audio_mask +ffffffff82b3df30 r stream_enc_regs +ffffffff82b3e5dc r se_shift +ffffffff82b3e660 r se_mask +ffffffff82b3e864 r hwseq_reg +ffffffff82b3ea80 r hwseq_shift +ffffffff82b3eb00 r hwseq_mask +ffffffff82b3f000 r reg_offsets +ffffffff82b3f018 r dce110_compressor_funcs +ffffffff82b40000 r dce110_funcs +ffffffff82b402c0 r dce110_private_funcs +ffffffff82b41000 r dce110_mem_input_v_funcs +ffffffff82b41090 r dvmm_Hw_Setting_1DTiling +ffffffff82b41120 r dvmm_Hw_Setting_2DTiling +ffffffff82b411b0 r dvmm_Hw_Setting_Linear +ffffffff82b42000 r global_color_matrix +ffffffff82b420b0 r input_csc_matrix +ffffffff82b43000 r funcs +ffffffff82b44000 r bios_regs +ffffffff82b44008 r dce110_res_pool_funcs +ffffffff82b440f0 r clk_src_regs +ffffffff82b441ec r dmcu_regs +ffffffff82b44248 r dmcu_shift +ffffffff82b4425c r dmcu_mask +ffffffff82b442a8 r abm_regs +ffffffff82b442e8 r abm_shift +ffffffff82b442fc r abm_mask +ffffffff82b44350 r dce110_tg_offsets +ffffffff82b44398 r res_create_funcs +ffffffff82b443c8 r plane_cap +ffffffff82b443f4 r underlay_plane_cap +ffffffff82b44420 r stoney_resource_cap +ffffffff82b4445c r carrizo_resource_cap +ffffffff82b444a0 r panel_cntl_regs +ffffffff82b444c0 r panel_cntl_shift +ffffffff82b444d0 r panel_cntl_mask +ffffffff82b44510 r link_enc_regs +ffffffff82b448d0 r link_enc_aux_regs +ffffffff82b44920 r link_enc_hpd_regs +ffffffff82b44938 r link_enc_feature +ffffffff82b44948 r cs_shift +ffffffff82b44954 r cs_mask +ffffffff82b44980 r mi_regs +ffffffff82b44b0c r mi_shifts +ffffffff82b44b54 r mi_masks +ffffffff82b44c70 r ipp_regs +ffffffff82b44d6c r ipp_shift +ffffffff82b44d94 r ipp_mask +ffffffff82b44e30 r xfm_regs +ffffffff82b45100 r xfm_shift +ffffffff82b45160 r xfm_mask +ffffffff82b452e0 r opp_regs +ffffffff82b45430 r opp_shift +ffffffff82b4545c r opp_mask +ffffffff82b45510 r aux_engine_regs +ffffffff82b45600 r aux_mask +ffffffff82b45660 r aux_shift +ffffffff82b45680 r i2c_hw_regs +ffffffff82b457d0 r i2c_shifts +ffffffff82b457fc r i2c_masks +ffffffff82b458a0 r audio_regs +ffffffff82b459d4 r audio_shift +ffffffff82b459ec r audio_mask +ffffffff82b45a30 r stream_enc_regs +ffffffff82b45d0c r se_shift +ffffffff82b45d90 r se_mask +ffffffff82b45f94 r hwseq_stoney_reg +ffffffff82b461b0 r hwseq_cz_reg +ffffffff82b463cc r hwseq_shift +ffffffff82b4644c r hwseq_mask +ffffffff82b47000 r dce110_tg_funcs +ffffffff82b48000 r dce110_tg_v_funcs +ffffffff82b49000 r dce110_xfmv_funcs ffffffff82b4a000 r reg_offsets -ffffffff82b4b000 r bios_regs -ffffffff82b4b008 r dce112_res_pool_funcs -ffffffff82b4b0f0 r clk_src_regs -ffffffff82b4b2e8 r dmcu_regs -ffffffff82b4b344 r dmcu_shift -ffffffff82b4b358 r dmcu_mask -ffffffff82b4b3a4 r abm_regs -ffffffff82b4b3e4 r abm_shift -ffffffff82b4b3f8 r abm_mask -ffffffff82b4b440 r dce112_tg_offsets -ffffffff82b4b488 r res_create_funcs -ffffffff82b4b4b8 r plane_cap -ffffffff82b4b4e4 r polaris_11_resource_cap -ffffffff82b4b520 r polaris_10_resource_cap -ffffffff82b4b560 r panel_cntl_regs -ffffffff82b4b580 r panel_cntl_shift -ffffffff82b4b590 r panel_cntl_mask -ffffffff82b4b5d0 r link_enc_regs -ffffffff82b4b990 r link_enc_aux_regs -ffffffff82b4b9e0 r link_enc_hpd_regs -ffffffff82b4b9f8 r link_enc_feature -ffffffff82b4ba08 r cs_shift -ffffffff82b4ba14 r cs_mask -ffffffff82b4ba40 r mi_regs -ffffffff82b4bd58 r mi_shifts -ffffffff82b4bda0 r mi_masks -ffffffff82b4bec0 r ipp_regs -ffffffff82b4c0b8 r ipp_shift -ffffffff82b4c0e0 r ipp_mask -ffffffff82b4c180 r xfm_regs -ffffffff82b4c720 r xfm_shift -ffffffff82b4c780 r xfm_mask -ffffffff82b4c900 r opp_regs -ffffffff82b4ca50 r opp_shift -ffffffff82b4ca7c r opp_mask -ffffffff82b4cb30 r aux_engine_regs -ffffffff82b4cc20 r aux_mask -ffffffff82b4cc80 r aux_shift -ffffffff82b4cca0 r i2c_hw_regs -ffffffff82b4cdf0 r i2c_shifts -ffffffff82b4ce1c r i2c_masks -ffffffff82b4cec0 r audio_regs -ffffffff82b4cfc8 r audio_shift -ffffffff82b4cfe0 r audio_mask -ffffffff82b4d020 r stream_enc_regs -ffffffff82b4d5d8 r se_shift -ffffffff82b4d65c r se_mask -ffffffff82b4d860 r hwseq_reg -ffffffff82b4da7c r hwseq_shift -ffffffff82b4dafc r hwseq_mask -ffffffff82b4e000 r bios_regs -ffffffff82b4e008 r res_cap -ffffffff82b4e048 r dce120_res_pool_funcs -ffffffff82b4e130 r debug_defaults -ffffffff82b4e2b0 r clk_src_regs -ffffffff82b4e4a8 r dmcu_regs -ffffffff82b4e504 r dmcu_shift -ffffffff82b4e518 r dmcu_mask -ffffffff82b4e564 r abm_regs -ffffffff82b4e5a4 r abm_shift -ffffffff82b4e5b8 r abm_mask -ffffffff82b4e600 r dce120_tg_offsets -ffffffff82b4e648 r dce121_res_create_funcs -ffffffff82b4e678 r res_create_funcs -ffffffff82b4e6a8 r plane_cap -ffffffff82b4e6e0 r panel_cntl_regs -ffffffff82b4e700 r panel_cntl_shift -ffffffff82b4e710 r panel_cntl_mask -ffffffff82b4e750 r link_enc_regs -ffffffff82b4eb10 r link_enc_aux_regs -ffffffff82b4eb60 r link_enc_hpd_regs -ffffffff82b4eb78 r link_enc_feature -ffffffff82b4eb88 r cs_shift -ffffffff82b4eb94 r cs_mask -ffffffff82b4ebc0 r mi_regs -ffffffff82b4eed8 r mi_shifts -ffffffff82b4ef20 r mi_masks -ffffffff82b4f040 r ipp_regs -ffffffff82b4f238 r ipp_shift -ffffffff82b4f260 r ipp_mask -ffffffff82b4f300 r xfm_regs -ffffffff82b4f8a0 r xfm_shift -ffffffff82b4f900 r xfm_mask -ffffffff82b4fa80 r opp_regs -ffffffff82b4fbd0 r opp_shift -ffffffff82b4fbfc r opp_mask -ffffffff82b4fcb0 r aux_engine_regs -ffffffff82b4fda0 r aux_mask -ffffffff82b4fe00 r aux_shift -ffffffff82b4fe20 r i2c_hw_regs -ffffffff82b4ff70 r i2c_shifts -ffffffff82b4ff9c r i2c_masks -ffffffff82b50040 r audio_regs -ffffffff82b50174 r audio_shift -ffffffff82b5018c r audio_mask -ffffffff82b501d0 r stream_enc_regs -ffffffff82b50788 r se_shift -ffffffff82b5080c r se_mask -ffffffff82b50a10 r dce121_hwseq_reg -ffffffff82b50c2c r dce121_hwseq_shift -ffffffff82b50cac r dce121_hwseq_mask -ffffffff82b50ea0 r hwseq_reg -ffffffff82b510bc r hwseq_shift -ffffffff82b5113c r hwseq_mask -ffffffff82b52000 r dce120_tg_funcs -ffffffff82b53000 r bios_regs -ffffffff82b53008 r res_cap -ffffffff82b53048 r dce80_res_pool_funcs -ffffffff82b53130 r clk_src_regs -ffffffff82b5322c r dmcu_regs -ffffffff82b53288 r dmcu_shift -ffffffff82b5329c r dmcu_mask -ffffffff82b532e8 r abm_regs -ffffffff82b53328 r abm_shift -ffffffff82b5333c r abm_mask -ffffffff82b53390 r dce80_tg_offsets -ffffffff82b533d8 r plane_cap -ffffffff82b53408 r res_create_funcs -ffffffff82b53440 r panel_cntl_regs -ffffffff82b53460 r panel_cntl_shift -ffffffff82b53470 r panel_cntl_mask -ffffffff82b534b0 r link_enc_regs -ffffffff82b53870 r link_enc_aux_regs -ffffffff82b538c0 r link_enc_hpd_regs -ffffffff82b538d8 r link_enc_feature -ffffffff82b538e8 r cs_shift -ffffffff82b538f4 r cs_mask -ffffffff82b53920 r mi_regs -ffffffff82b53c38 r mi_shifts -ffffffff82b53c80 r mi_masks -ffffffff82b53da0 r ipp_regs -ffffffff82b53f98 r ipp_shift -ffffffff82b53fc0 r ipp_mask -ffffffff82b54060 r xfm_regs -ffffffff82b54600 r xfm_shift -ffffffff82b54660 r xfm_mask -ffffffff82b547e0 r opp_regs -ffffffff82b54930 r opp_shift -ffffffff82b5495c r opp_mask -ffffffff82b54a10 r aux_engine_regs -ffffffff82b54b00 r aux_mask -ffffffff82b54b60 r aux_shift -ffffffff82b54b80 r i2c_hw_regs -ffffffff82b54cd0 r i2c_shifts -ffffffff82b54cfc r i2c_masks -ffffffff82b54da0 r audio_regs -ffffffff82b54ed4 r audio_shift -ffffffff82b54eec r audio_mask -ffffffff82b54f30 r stream_enc_regs -ffffffff82b555dc r se_shift -ffffffff82b55660 r se_mask -ffffffff82b55864 r hwseq_reg -ffffffff82b55a80 r hwseq_shift -ffffffff82b55b00 r hwseq_mask -ffffffff82b55cf4 r res_cap_81 -ffffffff82b55d30 r res_cap_83 -ffffffff82b56000 r reg_offsets -ffffffff82b56048 r dce80_tg_funcs -ffffffff82b57000 r dcn10_dpp_funcs -ffffffff82b58000 r dpp_input_csc_matrix -ffffffff82b5a000 r hubbub1_funcs -ffffffff82b5b000 r dcn10_hubp_funcs -ffffffff82b5c000 r reduceSizeAndFraction.prime_numbers -ffffffff82b5e000 r dcn10_funcs -ffffffff82b5e2c0 r dcn10_private_funcs -ffffffff82b5f000 r dcn10_ipp_funcs -ffffffff82b5f048 r dcn20_ipp_funcs -ffffffff82b60000 r dcn10_lnk_enc_funcs -ffffffff82b61000 r dcn10_mpc_funcs -ffffffff82b62000 r dcn10_opp_funcs -ffffffff82b63000 r dcn10_tg_funcs -ffffffff82b64000 r bios_regs -ffffffff82b64008 r rv2_res_cap -ffffffff82b64044 r res_cap -ffffffff82b64080 r dcn10_res_pool_funcs -ffffffff82b64168 r debug_defaults_drv -ffffffff82b642e0 r debug_defaults_diags -ffffffff82b64460 r clk_src_regs -ffffffff82b645b0 r dmcu_regs -ffffffff82b6460c r dmcu_shift -ffffffff82b64620 r dmcu_mask -ffffffff82b6466c r abm_regs -ffffffff82b646ac r abm_shift -ffffffff82b646c0 r abm_mask -ffffffff82b64708 r res_create_funcs -ffffffff82b64738 r res_create_maximus_funcs -ffffffff82b64768 r plane_cap -ffffffff82b647a0 r panel_cntl_regs -ffffffff82b647c0 r panel_cntl_shift -ffffffff82b647d0 r panel_cntl_mask -ffffffff82b64810 r link_enc_regs -ffffffff82b64d20 r link_enc_aux_regs -ffffffff82b64d60 r link_enc_hpd_regs -ffffffff82b64d70 r le_shift -ffffffff82b64e60 r le_mask -ffffffff82b65218 r link_enc_feature -ffffffff82b65228 r cs_shift -ffffffff82b65234 r cs_mask -ffffffff82b65260 r hubp_regs -ffffffff82b65910 r hubp_shift -ffffffff82b659d4 r hubp_mask -ffffffff82b65ce0 r ipp_regs -ffffffff82b65dc0 r ipp_shift -ffffffff82b65ddc r ipp_mask -ffffffff82b65e50 r tf_regs -ffffffff82b66db0 r tf_shift -ffffffff82b67018 r tf_mask -ffffffff82b679b0 r opp_regs -ffffffff82b67a80 r opp_shift -ffffffff82b67aa0 r opp_mask -ffffffff82b67b20 r tg_regs -ffffffff82b68020 r tg_shift -ffffffff82b680e0 r tg_mask -ffffffff82b683e0 r aux_engine_regs -ffffffff82b684d0 r aux_mask -ffffffff82b68530 r aux_shift -ffffffff82b68550 r i2c_hw_regs -ffffffff82b686a0 r i2c_shifts -ffffffff82b686cc r i2c_masks -ffffffff82b68770 r mpc_regs -ffffffff82b68890 r mpc_shift -ffffffff82b688a8 r mpc_mask -ffffffff82b68904 r hubbub_reg -ffffffff82b68a78 r hubbub_shift -ffffffff82b68b00 r hubbub_mask -ffffffff82b68d20 r audio_regs -ffffffff82b68dd0 r audio_shift -ffffffff82b68de8 r audio_mask -ffffffff82b68e30 r stream_enc_regs -ffffffff82b69380 r se_shift -ffffffff82b6945c r se_mask -ffffffff82b697c8 r hwseq_reg -ffffffff82b699e4 r hwseq_shift -ffffffff82b69a64 r hwseq_mask -ffffffff82b6a000 r audio_clock_info_table_48bpc -ffffffff82b6a190 r audio_clock_info_table_36bpc -ffffffff82b6a320 r audio_clock_info_table -ffffffff82b6a4e0 r dcn10_str_enc_funcs -ffffffff82b6b000 r dccg2_funcs -ffffffff82b6d000 r dpp_input_csc_matrix -ffffffff82b6e000 R dcn20_dsc_funcs -ffffffff82b6f000 R dcn20_dwbc_funcs -ffffffff82b70000 r filter_12tap_16p_upscale -ffffffff82b700e0 r filter_12tap_16p_117 -ffffffff82b701c0 r filter_12tap_16p_150 -ffffffff82b702a0 r filter_12tap_16p_183 -ffffffff82b70380 r filter_11tap_16p_upscale -ffffffff82b70450 r filter_11tap_16p_117 -ffffffff82b70520 r filter_11tap_16p_150 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link_enc_feature +ffffffff82b4ca08 r cs_shift +ffffffff82b4ca14 r cs_mask +ffffffff82b4ca40 r mi_regs +ffffffff82b4cd58 r mi_shifts +ffffffff82b4cda0 r mi_masks +ffffffff82b4cec0 r ipp_regs +ffffffff82b4d0b8 r ipp_shift +ffffffff82b4d0e0 r ipp_mask +ffffffff82b4d180 r xfm_regs +ffffffff82b4d720 r xfm_shift +ffffffff82b4d780 r xfm_mask +ffffffff82b4d900 r opp_regs +ffffffff82b4da50 r opp_shift +ffffffff82b4da7c r opp_mask +ffffffff82b4db30 r aux_engine_regs +ffffffff82b4dc20 r aux_mask +ffffffff82b4dc80 r aux_shift +ffffffff82b4dca0 r i2c_hw_regs +ffffffff82b4ddf0 r i2c_shifts +ffffffff82b4de1c r i2c_masks +ffffffff82b4dec0 r audio_regs +ffffffff82b4dfc8 r audio_shift +ffffffff82b4dfe0 r audio_mask +ffffffff82b4e020 r stream_enc_regs +ffffffff82b4e5d8 r se_shift +ffffffff82b4e65c r se_mask +ffffffff82b4e860 r hwseq_reg +ffffffff82b4ea7c r hwseq_shift +ffffffff82b4eafc r hwseq_mask +ffffffff82b4f000 r bios_regs +ffffffff82b4f008 r res_cap +ffffffff82b4f048 r dce120_res_pool_funcs +ffffffff82b4f130 r debug_defaults +ffffffff82b4f2b0 r clk_src_regs +ffffffff82b4f4a8 r dmcu_regs +ffffffff82b4f504 r dmcu_shift +ffffffff82b4f518 r dmcu_mask +ffffffff82b4f564 r abm_regs +ffffffff82b4f5a4 r abm_shift +ffffffff82b4f5b8 r abm_mask +ffffffff82b4f600 r dce120_tg_offsets +ffffffff82b4f648 r dce121_res_create_funcs +ffffffff82b4f678 r res_create_funcs +ffffffff82b4f6a8 r plane_cap +ffffffff82b4f6e0 r panel_cntl_regs +ffffffff82b4f700 r panel_cntl_shift +ffffffff82b4f710 r panel_cntl_mask +ffffffff82b4f750 r link_enc_regs +ffffffff82b4fb10 r link_enc_aux_regs +ffffffff82b4fb60 r link_enc_hpd_regs +ffffffff82b4fb78 r link_enc_feature +ffffffff82b4fb88 r cs_shift +ffffffff82b4fb94 r cs_mask +ffffffff82b4fbc0 r mi_regs +ffffffff82b4fed8 r mi_shifts +ffffffff82b4ff20 r mi_masks +ffffffff82b50040 r ipp_regs +ffffffff82b50238 r ipp_shift +ffffffff82b50260 r ipp_mask +ffffffff82b50300 r xfm_regs +ffffffff82b508a0 r xfm_shift +ffffffff82b50900 r xfm_mask +ffffffff82b50a80 r opp_regs +ffffffff82b50bd0 r opp_shift +ffffffff82b50bfc r opp_mask +ffffffff82b50cb0 r aux_engine_regs +ffffffff82b50da0 r aux_mask +ffffffff82b50e00 r aux_shift +ffffffff82b50e20 r i2c_hw_regs +ffffffff82b50f70 r i2c_shifts +ffffffff82b50f9c r i2c_masks +ffffffff82b51040 r audio_regs +ffffffff82b51174 r audio_shift +ffffffff82b5118c r audio_mask +ffffffff82b511d0 r stream_enc_regs +ffffffff82b51788 r se_shift +ffffffff82b5180c r se_mask +ffffffff82b51a10 r dce121_hwseq_reg +ffffffff82b51c2c r dce121_hwseq_shift +ffffffff82b51cac r dce121_hwseq_mask +ffffffff82b51ea0 r hwseq_reg +ffffffff82b520bc r hwseq_shift +ffffffff82b5213c r hwseq_mask +ffffffff82b53000 r dce120_tg_funcs +ffffffff82b54000 r bios_regs +ffffffff82b54008 r res_cap +ffffffff82b54048 r dce80_res_pool_funcs +ffffffff82b54130 r clk_src_regs +ffffffff82b5422c r dmcu_regs +ffffffff82b54288 r dmcu_shift +ffffffff82b5429c r dmcu_mask +ffffffff82b542e8 r abm_regs +ffffffff82b54328 r abm_shift +ffffffff82b5433c r abm_mask +ffffffff82b54390 r dce80_tg_offsets +ffffffff82b543d8 r plane_cap +ffffffff82b54408 r res_create_funcs +ffffffff82b54440 r panel_cntl_regs +ffffffff82b54460 r panel_cntl_shift +ffffffff82b54470 r panel_cntl_mask +ffffffff82b544b0 r link_enc_regs +ffffffff82b54870 r link_enc_aux_regs +ffffffff82b548c0 r link_enc_hpd_regs +ffffffff82b548d8 r link_enc_feature +ffffffff82b548e8 r cs_shift +ffffffff82b548f4 r cs_mask +ffffffff82b54920 r mi_regs +ffffffff82b54c38 r mi_shifts +ffffffff82b54c80 r mi_masks +ffffffff82b54da0 r ipp_regs +ffffffff82b54f98 r ipp_shift +ffffffff82b54fc0 r ipp_mask +ffffffff82b55060 r xfm_regs +ffffffff82b55600 r xfm_shift +ffffffff82b55660 r xfm_mask +ffffffff82b557e0 r opp_regs +ffffffff82b55930 r opp_shift +ffffffff82b5595c r opp_mask +ffffffff82b55a10 r aux_engine_regs +ffffffff82b55b00 r aux_mask +ffffffff82b55b60 r aux_shift +ffffffff82b55b80 r i2c_hw_regs +ffffffff82b55cd0 r i2c_shifts +ffffffff82b55cfc r i2c_masks +ffffffff82b55da0 r audio_regs +ffffffff82b55ed4 r audio_shift +ffffffff82b55eec r audio_mask +ffffffff82b55f30 r stream_enc_regs +ffffffff82b565dc r se_shift +ffffffff82b56660 r se_mask +ffffffff82b56864 r hwseq_reg +ffffffff82b56a80 r hwseq_shift +ffffffff82b56b00 r hwseq_mask +ffffffff82b56cf4 r res_cap_81 +ffffffff82b56d30 r res_cap_83 +ffffffff82b57000 r reg_offsets +ffffffff82b57048 r dce80_tg_funcs +ffffffff82b58000 r dcn10_dpp_funcs +ffffffff82b59000 r dpp_input_csc_matrix +ffffffff82b5b000 r hubbub1_funcs +ffffffff82b5c000 r dcn10_hubp_funcs +ffffffff82b5d000 r reduceSizeAndFraction.prime_numbers +ffffffff82b5f000 r dcn10_funcs +ffffffff82b5f2c0 r dcn10_private_funcs +ffffffff82b60000 r dcn10_ipp_funcs +ffffffff82b60048 r dcn20_ipp_funcs +ffffffff82b61000 r dcn10_lnk_enc_funcs +ffffffff82b62000 r dcn10_mpc_funcs +ffffffff82b63000 r dcn10_opp_funcs +ffffffff82b64000 r dcn10_tg_funcs +ffffffff82b65000 r bios_regs +ffffffff82b65008 r rv2_res_cap +ffffffff82b65044 r res_cap +ffffffff82b65080 r dcn10_res_pool_funcs +ffffffff82b65168 r debug_defaults_drv +ffffffff82b652e0 r debug_defaults_diags +ffffffff82b65460 r clk_src_regs +ffffffff82b655b0 r dmcu_regs +ffffffff82b6560c r dmcu_shift +ffffffff82b65620 r dmcu_mask +ffffffff82b6566c r abm_regs +ffffffff82b656ac r abm_shift +ffffffff82b656c0 r abm_mask +ffffffff82b65708 r res_create_funcs +ffffffff82b65738 r res_create_maximus_funcs +ffffffff82b65768 r plane_cap +ffffffff82b657a0 r panel_cntl_regs +ffffffff82b657c0 r panel_cntl_shift +ffffffff82b657d0 r panel_cntl_mask +ffffffff82b65810 r link_enc_regs +ffffffff82b65d20 r link_enc_aux_regs +ffffffff82b65d60 r link_enc_hpd_regs +ffffffff82b65d70 r le_shift +ffffffff82b65e60 r le_mask +ffffffff82b66218 r link_enc_feature +ffffffff82b66228 r cs_shift +ffffffff82b66234 r cs_mask +ffffffff82b66260 r hubp_regs +ffffffff82b66910 r hubp_shift +ffffffff82b669d4 r hubp_mask +ffffffff82b66ce0 r ipp_regs +ffffffff82b66dc0 r ipp_shift +ffffffff82b66ddc r ipp_mask +ffffffff82b66e50 r tf_regs +ffffffff82b67db0 r tf_shift +ffffffff82b68018 r tf_mask +ffffffff82b689b0 r opp_regs +ffffffff82b68a80 r opp_shift +ffffffff82b68aa0 r opp_mask +ffffffff82b68b20 r tg_regs +ffffffff82b69020 r tg_shift +ffffffff82b690e0 r tg_mask +ffffffff82b693e0 r aux_engine_regs +ffffffff82b694d0 r aux_mask +ffffffff82b69530 r aux_shift +ffffffff82b69550 r i2c_hw_regs +ffffffff82b696a0 r i2c_shifts +ffffffff82b696cc r i2c_masks +ffffffff82b69770 r mpc_regs +ffffffff82b69890 r mpc_shift +ffffffff82b698a8 r mpc_mask +ffffffff82b69904 r hubbub_reg +ffffffff82b69a78 r hubbub_shift +ffffffff82b69b00 r hubbub_mask +ffffffff82b69d20 r audio_regs +ffffffff82b69dd0 r audio_shift +ffffffff82b69de8 r audio_mask +ffffffff82b69e30 r stream_enc_regs +ffffffff82b6a380 r se_shift +ffffffff82b6a45c r se_mask +ffffffff82b6a7c8 r hwseq_reg +ffffffff82b6a9e4 r hwseq_shift +ffffffff82b6aa64 r hwseq_mask +ffffffff82b6b000 r audio_clock_info_table_48bpc +ffffffff82b6b190 r audio_clock_info_table_36bpc +ffffffff82b6b320 r audio_clock_info_table +ffffffff82b6b4e0 r dcn10_str_enc_funcs +ffffffff82b6c000 r dccg2_funcs +ffffffff82b6e000 r dpp_input_csc_matrix +ffffffff82b6f000 R dcn20_dsc_funcs +ffffffff82b70000 R dcn20_dwbc_funcs +ffffffff82b71000 r filter_12tap_16p_upscale +ffffffff82b710e0 r filter_12tap_16p_117 +ffffffff82b711c0 r filter_12tap_16p_150 +ffffffff82b712a0 r filter_12tap_16p_183 +ffffffff82b71380 r filter_11tap_16p_upscale +ffffffff82b71450 r filter_11tap_16p_117 +ffffffff82b71520 r filter_11tap_16p_150 +ffffffff82b715f0 r filter_11tap_16p_183 +ffffffff82b716c0 r filter_10tap_16p_upscale +ffffffff82b71780 r filter_10tap_16p_117 +ffffffff82b71840 r filter_10tap_16p_150 +ffffffff82b71900 r filter_10tap_16p_183 +ffffffff82b719c0 r filter_9tap_16p_upscale +ffffffff82b71a70 r filter_9tap_16p_117 +ffffffff82b71b20 r filter_9tap_16p_150 +ffffffff82b71bd0 r filter_9tap_16p_183 +ffffffff82b71c80 r filter_8tap_16p_upscale +ffffffff82b71d10 r filter_8tap_16p_117 +ffffffff82b71da0 r filter_8tap_16p_150 +ffffffff82b71e30 r filter_8tap_16p_183 +ffffffff82b71ec0 r filter_7tap_16p_upscale +ffffffff82b71f40 r filter_7tap_16p_117 +ffffffff82b71fc0 r filter_7tap_16p_150 +ffffffff82b72040 r filter_7tap_16p_183 +ffffffff82b720c0 r filter_6tap_16p_upscale +ffffffff82b72130 r filter_6tap_16p_117 +ffffffff82b721a0 r filter_6tap_16p_150 +ffffffff82b72210 r filter_6tap_16p_183 +ffffffff82b72280 r filter_5tap_16p_upscale +ffffffff82b722e0 r filter_5tap_16p_117 +ffffffff82b72340 r filter_5tap_16p_150 +ffffffff82b723a0 r filter_5tap_16p_183 +ffffffff82b72400 r filter_4tap_16p_upscale +ffffffff82b72450 r filter_4tap_16p_117 +ffffffff82b724a0 r filter_4tap_16p_150 +ffffffff82b724f0 r filter_4tap_16p_183 +ffffffff82b72540 r filter_3tap_16p_upscale +ffffffff82b72580 r filter_3tap_16p_117 +ffffffff82b725c0 r filter_3tap_16p_150 +ffffffff82b72600 r filter_3tap_16p_183 +ffffffff82b73000 r hubbub2_funcs +ffffffff82b74000 r dcn20_funcs +ffffffff82b742c0 r dcn20_private_funcs +ffffffff82b75000 r dcn20_link_enc_funcs +ffffffff82b750e0 r dcn2_mpll_cfg +ffffffff82b76000 R dcn20_mmhubbub_funcs +ffffffff82b77000 R dcn20_mpc_funcs +ffffffff82b78000 r tf_regs +ffffffff82b79920 r tf_shift +ffffffff82b79ba4 r tf_mask +ffffffff82b7a5c0 r ipp_regs +ffffffff82b7a710 r ipp_shift +ffffffff82b7a72c r ipp_mask +ffffffff82b7a7a0 r opp_regs +ffffffff82b7a9b0 r opp_shift +ffffffff82b7a9e8 r opp_mask +ffffffff82b7aac0 r aux_engine_regs +ffffffff82b7abb0 r aux_mask +ffffffff82b7ac10 r aux_shift +ffffffff82b7ac30 r i2c_hw_regs +ffffffff82b7ad80 r i2c_shifts +ffffffff82b7adac r i2c_masks +ffffffff82b7ae50 r mpc_regs +ffffffff82b7b398 r mpc_shift +ffffffff82b7b3e0 r mpc_mask +ffffffff82b7b4f4 r hubbub_reg +ffffffff82b7b668 r hubbub_shift +ffffffff82b7b6f0 r hubbub_mask +ffffffff82b7b90c r res_cap_nv10 +ffffffff82b7b950 r vmid_regs +ffffffff82b7bb10 r vmid_shifts +ffffffff82b7bb18 r vmid_masks +ffffffff82b7bb40 r tg_regs +ffffffff82b7c2c0 r tg_shift +ffffffff82b7c380 r tg_mask +ffffffff82b7c680 r link_enc_regs +ffffffff82b7ce20 r link_enc_aux_regs +ffffffff82b7ce80 r link_enc_hpd_regs +ffffffff82b7ce98 r le_shift +ffffffff82b7cf88 r le_mask +ffffffff82b7d340 r stream_enc_regs +ffffffff82b7db38 r se_shift +ffffffff82b7dc14 r se_mask +ffffffff82b7df80 r hwseq_reg +ffffffff82b7e19c r hwseq_shift +ffffffff82b7e21c r hwseq_mask +ffffffff82b7e410 r dsc_regs +ffffffff82b7e8a8 r dsc_shift +ffffffff82b7e960 r dsc_mask +ffffffff82b7ec40 r hubp_regs +ffffffff82b7f888 r hubp_shift +ffffffff82b7f984 r hubp_mask +ffffffff82b7fd80 r dwbc20_regs +ffffffff82b7fe38 r dwbc20_shift +ffffffff82b7feb8 r dwbc20_mask +ffffffff82b800b0 r mcif_wb20_regs +ffffffff82b80190 r mcif_wb20_shift +ffffffff82b80230 r mcif_wb20_mask +ffffffff82b804b0 r link_enc_feature +ffffffff82b804c0 r bios_regs +ffffffff82b804c8 r dcn20_res_pool_funcs +ffffffff82b805b0 r res_cap_nv14 +ffffffff82b805f0 r debug_defaults_drv +ffffffff82b80768 r debug_defaults_diags +ffffffff82b808e0 r clk_src_regs +ffffffff82b80ad8 r dccg_regs +ffffffff82b80bc4 r dccg_shift +ffffffff82b80c5c r dccg_mask +ffffffff82b80ebc r dmcu_regs +ffffffff82b80f18 r dmcu_shift +ffffffff82b80f2c r dmcu_mask +ffffffff82b80f78 r abm_regs +ffffffff82b80fb8 r abm_shift +ffffffff82b80fcc r abm_mask +ffffffff82b81018 r res_create_funcs +ffffffff82b81048 r res_create_maximus_funcs +ffffffff82b81078 r plane_cap +ffffffff82b810b0 r panel_cntl_regs +ffffffff82b810d0 r panel_cntl_shift +ffffffff82b810e0 r panel_cntl_mask +ffffffff82b8111c r cs_shift +ffffffff82b81128 r cs_mask +ffffffff82b81150 r audio_regs +ffffffff82b81284 r audio_shift +ffffffff82b8129c r audio_mask +ffffffff82b82000 r dcn20_str_enc_funcs +ffffffff82b83000 r dccg201_funcs +ffffffff82b84000 r hubbub201_funcs +ffffffff82b85000 r dcn201_funcs +ffffffff82b852c0 r dcn201_private_funcs +ffffffff82b86000 r dcn201_link_enc_funcs +ffffffff82b87000 R dcn201_mpc_funcs +ffffffff82b88000 r bios_regs +ffffffff82b88008 r res_cap_dnc201 +ffffffff82b88048 r debug_defaults_drv +ffffffff82b881c0 r clk_src_regs +ffffffff82b88268 r dccg_regs +ffffffff82b88354 r dccg_shift +ffffffff82b883ec r dccg_mask +ffffffff82b88650 r res_create_funcs +ffffffff82b88680 r res_create_maximus_funcs +ffffffff82b886b0 r plane_cap +ffffffff82b886e0 r link_enc_regs +ffffffff82b88970 r link_enc_aux_regs +ffffffff82b88990 r link_enc_hpd_regs +ffffffff82b88998 r le_shift +ffffffff82b88a88 r le_mask +ffffffff82b88e40 r link_enc_feature +ffffffff82b88e50 r cs_shift +ffffffff82b88e5c r cs_mask +ffffffff82b88e90 r hubp_regs +ffffffff82b89620 r hubp_shift +ffffffff82b896f8 r hubp_mask +ffffffff82b89a60 r ipp_regs +ffffffff82b89b40 r ipp_shift +ffffffff82b89b5c r ipp_mask +ffffffff82b89bd0 r tf_regs +ffffffff82b8ac10 r tf_shift +ffffffff82b8ae94 r tf_mask +ffffffff82b8b8b0 r opp_regs +ffffffff82b8b960 r opp_shift +ffffffff82b8b998 r opp_mask +ffffffff82b8ba70 r aux_engine_regs +ffffffff82b8bac0 r aux_mask +ffffffff82b8bb20 r aux_shift +ffffffff82b8bb40 r i2c_hw_regs +ffffffff82b8bbb0 r i2c_shifts +ffffffff82b8bbdc r i2c_masks +ffffffff82b8bc80 r tg_regs +ffffffff82b8bf00 r tg_shift +ffffffff82b8bfc0 r tg_mask +ffffffff82b8c2c0 r mpc_regs +ffffffff82b8c808 r mpc_shift +ffffffff82b8c854 r mpc_mask +ffffffff82b8c97c r hubbub_reg +ffffffff82b8caf0 r hubbub_shift +ffffffff82b8cb78 r hubbub_mask +ffffffff82b8cda0 r audio_regs +ffffffff82b8cdf8 r audio_shift +ffffffff82b8ce10 r audio_mask +ffffffff82b8ce50 r stream_enc_regs +ffffffff82b8d0f8 r se_shift +ffffffff82b8d1d4 r se_mask +ffffffff82b8d540 r hwseq_reg +ffffffff82b8d75c r hwseq_shift +ffffffff82b8d7dc r hwseq_mask +ffffffff82b8e000 r dccg21_funcs +ffffffff82b8f000 r hubbub21_funcs +ffffffff82b90000 r dcn21_funcs +ffffffff82b902c0 r dcn21_private_funcs +ffffffff82b91000 r dcn21_link_enc_funcs +ffffffff82b910e0 r dcn21_mpll_cfg_ref +ffffffff82b92000 r bios_regs +ffffffff82b92008 r res_cap_rn +ffffffff82b92048 r dcn21_res_pool_funcs +ffffffff82b92130 r debug_defaults_drv +ffffffff82b922a8 r debug_defaults_diags +ffffffff82b92420 r clk_src_regs +ffffffff82b925c4 r dccg_regs +ffffffff82b926b0 r dccg_shift +ffffffff82b92748 r dccg_mask +ffffffff82b929a8 r dmcu_regs +ffffffff82b92a04 r dmcu_shift +ffffffff82b92a18 r dmcu_mask +ffffffff82b92a64 r abm_regs +ffffffff82b92aa4 r abm_shift +ffffffff82b92ab8 r abm_mask +ffffffff82b92b00 r res_create_funcs +ffffffff82b92b30 r res_create_maximus_funcs +ffffffff82b92b60 r plane_cap +ffffffff82b92b90 r panel_cntl_regs +ffffffff82b92bb0 r panel_cntl_shift +ffffffff82b92bc0 r panel_cntl_mask +ffffffff82b92c00 r link_enc_regs +ffffffff82b93260 r link_enc_aux_regs +ffffffff82b932b0 r link_enc_hpd_regs +ffffffff82b932c4 r le_shift +ffffffff82b933b4 r le_mask +ffffffff82b9376c r link_enc_feature +ffffffff82b9377c r panel_config_defaults +ffffffff82b937b8 r cs_shift +ffffffff82b937c4 r cs_mask +ffffffff82b937f0 r hubp_regs +ffffffff82b94020 r hubp_shift +ffffffff82b9411c r hubp_mask +ffffffff82b94510 r ipp_regs +ffffffff82b945f0 r ipp_shift +ffffffff82b9460c r ipp_mask +ffffffff82b94680 r tf_regs +ffffffff82b95740 r tf_shift +ffffffff82b959c4 r tf_mask +ffffffff82b963e0 r opp_regs +ffffffff82b965f0 r opp_shift +ffffffff82b96628 r opp_mask +ffffffff82b96700 r tg_regs +ffffffff82b96c00 r tg_shift +ffffffff82b96cc0 r tg_mask +ffffffff82b96fc0 r aux_engine_regs +ffffffff82b97088 r aux_mask +ffffffff82b970e8 r aux_shift +ffffffff82b97100 r i2c_hw_regs +ffffffff82b97218 r i2c_shifts +ffffffff82b97244 r i2c_masks +ffffffff82b972e8 r mpc_regs +ffffffff82b97830 r mpc_shift +ffffffff82b97878 r mpc_mask +ffffffff82b9798c r hubbub_reg +ffffffff82b97b00 r hubbub_shift +ffffffff82b97b88 r hubbub_mask +ffffffff82b97db0 r vmid_regs +ffffffff82b97f70 r vmid_shifts +ffffffff82b97f78 r vmid_masks +ffffffff82b97fa0 r dsc_regs +ffffffff82b98438 r dsc_shift +ffffffff82b984f0 r dsc_mask +ffffffff82b987d0 r audio_regs +ffffffff82b988d8 r audio_shift +ffffffff82b988f0 r audio_mask +ffffffff82b98930 r stream_enc_regs +ffffffff82b98fd4 r se_shift +ffffffff82b990b0 r se_mask +ffffffff82b9941c r hwseq_reg +ffffffff82b99638 r hwseq_shift +ffffffff82b996b8 r hwseq_mask +ffffffff82b9a000 r dccg3_funcs +ffffffff82b9b000 r dcn30_link_enc_funcs +ffffffff82b9c000 r dcn30_str_enc_funcs +ffffffff82b9d000 r dpp_input_csc_matrix +ffffffff82b9e000 R dcn30_dwbc_funcs +ffffffff82b9f000 r hubbub30_funcs +ffffffff82ba0000 r dcn30_funcs +ffffffff82ba02c0 r dcn30_private_funcs +ffffffff82ba1000 R dcn30_mmhubbub_funcs +ffffffff82ba2000 R dcn30_mpc_funcs +ffffffff82ba3000 r bios_regs +ffffffff82ba3008 r res_cap_dcn3 +ffffffff82ba3048 r dcn30_res_pool_funcs +ffffffff82ba3130 r debug_defaults_drv +ffffffff82ba32a8 r debug_defaults_diags +ffffffff82ba3420 r clk_src_regs +ffffffff82ba3618 r dccg_regs +ffffffff82ba3704 r dccg_shift +ffffffff82ba379c r dccg_mask +ffffffff82ba3a00 r abm_regs +ffffffff82ba3b80 r abm_shift +ffffffff82ba3b94 r abm_mask +ffffffff82ba3be0 r res_create_funcs +ffffffff82ba3c10 r res_create_maximus_funcs +ffffffff82ba3c40 r plane_cap +ffffffff82ba3c70 r panel_cntl_regs +ffffffff82ba3c90 r panel_cntl_shift +ffffffff82ba3ca0 r panel_cntl_mask +ffffffff82ba3ce0 r link_enc_regs +ffffffff82ba4480 r link_enc_aux_regs +ffffffff82ba44e0 r link_enc_hpd_regs +ffffffff82ba44f8 r le_shift +ffffffff82ba45e8 r le_mask +ffffffff82ba49a0 r link_enc_feature +ffffffff82ba49b0 r cs_shift +ffffffff82ba49bc r cs_mask +ffffffff82ba49e4 r hubbub_reg +ffffffff82ba4b58 r hubbub_shift +ffffffff82ba4be0 r hubbub_mask +ffffffff82ba4e00 r vmid_regs +ffffffff82ba4fc0 r vmid_shifts +ffffffff82ba4fc8 r vmid_masks +ffffffff82ba4ff0 r hubp_regs +ffffffff82ba5c38 r hubp_shift +ffffffff82ba5d34 r hubp_mask +ffffffff82ba6130 r dpp_regs +ffffffff82ba80b0 r tf_shift +ffffffff82ba8380 r tf_mask +ffffffff82ba8ec0 r opp_regs +ffffffff82ba90d0 r opp_shift +ffffffff82ba9108 r opp_mask +ffffffff82ba91e0 r optc_regs +ffffffff82ba9960 r optc_shift +ffffffff82ba9a20 r optc_mask +ffffffff82ba9d20 r mpc_regs +ffffffff82bab50c r mpc_shift +ffffffff82bab5e8 r mpc_mask +ffffffff82bab960 r dsc_regs +ffffffff82babdf8 r dsc_shift +ffffffff82babeb0 r dsc_mask +ffffffff82bac190 r dwbc30_regs +ffffffff82bac36c r dwbc30_shift +ffffffff82bac4a0 r dwbc30_mask +ffffffff82bac970 r mcif_wb30_regs +ffffffff82baca6c r mcif_wb30_shift +ffffffff82bacb18 r mcif_wb30_mask +ffffffff82bacdd0 r aux_engine_regs +ffffffff82bacec0 r aux_mask +ffffffff82bacf20 r aux_shift +ffffffff82bacf40 r i2c_hw_regs +ffffffff82bad090 r i2c_shifts +ffffffff82bad0bc r i2c_masks +ffffffff82bad160 r audio_regs +ffffffff82bad294 r audio_shift +ffffffff82bad2ac r audio_mask +ffffffff82bad2f0 r stream_enc_regs +ffffffff82badae8 r se_shift +ffffffff82badbc4 r se_mask +ffffffff82badf30 r vpg_regs +ffffffff82badfbc r vpg_shift +ffffffff82badfe4 r vpg_mask +ffffffff82bae080 r afmt_regs +ffffffff82bae17c r afmt_shift +ffffffff82bae190 r afmt_mask +ffffffff82bae1d4 r hwseq_reg +ffffffff82bae3f0 r hwseq_shift +ffffffff82bae470 r hwseq_mask +ffffffff82baf000 r dccg301_funcs +ffffffff82bb0000 r dcn301_link_enc_funcs +ffffffff82bb1000 r hubbub301_funcs +ffffffff82bb2000 r dcn301_funcs +ffffffff82bb22c0 r dcn301_private_funcs +ffffffff82bb3000 r dcn301_link_panel_cntl_funcs +ffffffff82bb4000 r bios_regs +ffffffff82bb4008 r debug_defaults_drv +ffffffff82bb4180 r debug_defaults_diags +ffffffff82bb4300 r clk_src_regs +ffffffff82bb4450 r dccg_regs +ffffffff82bb453c r dccg_shift +ffffffff82bb45d4 r dccg_mask +ffffffff82bb4840 r abm_regs +ffffffff82bb4940 r abm_shift +ffffffff82bb4954 r abm_mask +ffffffff82bb49a0 r res_create_funcs +ffffffff82bb49d0 r res_create_maximus_funcs +ffffffff82bb4a00 r plane_cap +ffffffff82bb4a30 r panel_cntl_regs +ffffffff82bb4a70 r panel_cntl_shift +ffffffff82bb4a80 r panel_cntl_mask +ffffffff82bb4ac0 r link_enc_regs +ffffffff82bb4fd0 r link_enc_aux_regs +ffffffff82bb5010 r link_enc_hpd_regs +ffffffff82bb5020 r le_shift +ffffffff82bb5110 r le_mask +ffffffff82bb54c8 r link_enc_feature +ffffffff82bb54d8 r cs_shift +ffffffff82bb54e4 r cs_mask +ffffffff82bb550c r hubbub_reg +ffffffff82bb5680 r hubbub_shift +ffffffff82bb5708 r hubbub_mask +ffffffff82bb5930 r vmid_regs +ffffffff82bb5af0 r vmid_shifts +ffffffff82bb5af8 r vmid_masks +ffffffff82bb5b20 r hubp_regs +ffffffff82bb6350 r hubp_shift +ffffffff82bb644c r hubp_mask +ffffffff82bb6840 r dpp_regs +ffffffff82bb7d40 r tf_shift +ffffffff82bb8010 r tf_mask +ffffffff82bb8b50 r opp_regs +ffffffff82bb8cb0 r opp_shift +ffffffff82bb8ce8 r opp_mask +ffffffff82bb8dc0 r optc_regs +ffffffff82bb92c0 r optc_shift +ffffffff82bb9380 r optc_mask +ffffffff82bb9680 r mpc_regs +ffffffff82bbae6c r mpc_shift +ffffffff82bbaf48 r mpc_mask +ffffffff82bbb2c0 r dsc_regs +ffffffff82bbb50c r dsc_shift +ffffffff82bbb5c4 r dsc_mask +ffffffff82bbb8a0 r dwbc30_regs +ffffffff82bbba7c r dwbc30_shift +ffffffff82bbbbb0 r dwbc30_mask +ffffffff82bbc080 r mcif_wb30_regs +ffffffff82bbc17c r mcif_wb30_shift +ffffffff82bbc228 r mcif_wb30_mask +ffffffff82bbc4e0 r aux_engine_regs +ffffffff82bbc580 r aux_mask +ffffffff82bbc5e0 r aux_shift +ffffffff82bbc600 r i2c_hw_regs +ffffffff82bbc6e0 r i2c_shifts +ffffffff82bbc70c r i2c_masks +ffffffff82bbc7b0 r audio_regs +ffffffff82bbc8e4 r audio_shift +ffffffff82bbc8fc r audio_mask +ffffffff82bbc940 r stream_enc_regs +ffffffff82bbce90 r se_shift +ffffffff82bbcf6c r se_mask +ffffffff82bbd2e0 r vpg_regs +ffffffff82bbd330 r vpg_shift +ffffffff82bbd358 r vpg_mask +ffffffff82bbd3f0 r afmt_regs +ffffffff82bbd480 r afmt_shift +ffffffff82bbd494 r afmt_mask +ffffffff82bbd4d8 r hwseq_reg +ffffffff82bbd6f4 r hwseq_shift +ffffffff82bbd774 r hwseq_mask +ffffffff82bbe000 r bios_regs +ffffffff82bbe008 r res_cap_dcn302 +ffffffff82bbe048 r debug_defaults_drv +ffffffff82bbe1c0 r debug_defaults_diags +ffffffff82bbe340 r clk_src_regs +ffffffff82bbe4e4 r dccg_regs +ffffffff82bbe5d0 r dccg_shift +ffffffff82bbe668 r dccg_mask +ffffffff82bbe8d0 r abm_regs +ffffffff82bbea10 r abm_shift +ffffffff82bbea24 r abm_mask +ffffffff82bbea70 r res_create_funcs +ffffffff82bbeaa0 r res_create_maximus_funcs +ffffffff82bbead0 r plane_cap +ffffffff82bbeb00 r panel_cntl_regs +ffffffff82bbeb20 r panel_cntl_shift +ffffffff82bbeb30 r panel_cntl_mask +ffffffff82bbeb70 r link_enc_regs +ffffffff82bbf1d0 r link_enc_aux_regs +ffffffff82bbf220 r link_enc_hpd_regs +ffffffff82bbf234 r le_shift +ffffffff82bbf324 r le_mask +ffffffff82bbf6dc r link_enc_feature +ffffffff82bbf6ec r cs_shift +ffffffff82bbf6f8 r cs_mask +ffffffff82bbf720 r hubbub_reg +ffffffff82bbf894 r hubbub_shift +ffffffff82bbf91c r hubbub_mask +ffffffff82bbfb40 r vmid_regs +ffffffff82bbfd00 r vmid_shifts +ffffffff82bbfd08 r vmid_masks +ffffffff82bbfd30 r hubp_regs +ffffffff82bc076c r hubp_shift +ffffffff82bc0868 r hubp_mask +ffffffff82bc0c60 r dpp_regs +ffffffff82bc26a0 r tf_shift +ffffffff82bc2970 r tf_mask +ffffffff82bc34b0 r opp_regs +ffffffff82bc3668 r opp_shift +ffffffff82bc36a0 r opp_mask +ffffffff82bc3780 r optc_regs +ffffffff82bc3dc0 r optc_shift +ffffffff82bc3e80 r optc_mask +ffffffff82bc4180 r mpc_regs +ffffffff82bc596c r mpc_shift +ffffffff82bc5a48 r mpc_mask +ffffffff82bc5dc0 r dsc_regs +ffffffff82bc6194 r dsc_shift +ffffffff82bc624c r dsc_mask +ffffffff82bc6530 r dwbc30_regs +ffffffff82bc670c r dwbc30_shift +ffffffff82bc6840 r dwbc30_mask +ffffffff82bc6d10 r mcif_wb30_regs +ffffffff82bc6e0c r mcif_wb30_shift +ffffffff82bc6eb8 r mcif_wb30_mask +ffffffff82bc7170 r aux_engine_regs +ffffffff82bc7238 r aux_mask +ffffffff82bc7298 r aux_shift +ffffffff82bc72b0 r i2c_hw_regs +ffffffff82bc73c8 r i2c_shifts +ffffffff82bc73f4 r i2c_masks +ffffffff82bc74a0 r audio_regs +ffffffff82bc75d4 r audio_shift +ffffffff82bc75ec r audio_mask +ffffffff82bc7630 r stream_enc_regs +ffffffff82bc7cd4 r se_shift +ffffffff82bc7db0 r se_mask +ffffffff82bc8120 r vpg_regs +ffffffff82bc8198 r vpg_shift +ffffffff82bc81c0 r vpg_mask +ffffffff82bc8260 r afmt_regs +ffffffff82bc8338 r afmt_shift +ffffffff82bc834c r afmt_mask +ffffffff82bc8390 r hwseq_reg +ffffffff82bc85ac r hwseq_shift +ffffffff82bc862c r hwseq_mask +ffffffff82bc9000 r bios_regs +ffffffff82bc9008 r res_cap_dcn303 +ffffffff82bc9048 r debug_defaults_drv +ffffffff82bc91c0 r debug_defaults_diags +ffffffff82bc9340 r clk_src_regs +ffffffff82bc93e8 r dccg_regs +ffffffff82bc94d4 r dccg_shift +ffffffff82bc956c r dccg_mask +ffffffff82bc97d0 r abm_regs +ffffffff82bc9850 r abm_shift +ffffffff82bc9864 r abm_mask +ffffffff82bc98b0 r res_create_funcs +ffffffff82bc98e0 r res_create_maximus_funcs +ffffffff82bc9910 r plane_cap +ffffffff82bc9940 r panel_cntl_regs +ffffffff82bc9960 r panel_cntl_shift +ffffffff82bc9970 r panel_cntl_mask +ffffffff82bc99b0 r link_enc_regs +ffffffff82bc9c40 r link_enc_aux_regs +ffffffff82bc9c60 r link_enc_hpd_regs +ffffffff82bc9c68 r le_shift +ffffffff82bc9d58 r le_mask +ffffffff82bca110 r link_enc_feature +ffffffff82bca120 r cs_shift +ffffffff82bca12c r cs_mask +ffffffff82bca154 r hubbub_reg +ffffffff82bca2c8 r hubbub_shift +ffffffff82bca350 r hubbub_mask +ffffffff82bca570 r vmid_regs +ffffffff82bca730 r vmid_shifts +ffffffff82bca738 r vmid_masks +ffffffff82bca760 r hubp_regs +ffffffff82bcab78 r hubp_shift +ffffffff82bcac74 r hubp_mask +ffffffff82bcb070 r dpp_regs +ffffffff82bcbaf0 r tf_shift +ffffffff82bcbdc0 r tf_mask +ffffffff82bcc900 r opp_regs +ffffffff82bcc9b0 r opp_shift +ffffffff82bcc9e8 r opp_mask +ffffffff82bccac0 r optc_regs +ffffffff82bccd40 r optc_shift +ffffffff82bcce00 r optc_mask +ffffffff82bcd100 r mpc_regs +ffffffff82bce8ec r mpc_shift +ffffffff82bce9c8 r mpc_mask +ffffffff82bced40 r dsc_regs +ffffffff82bceec8 r dsc_shift +ffffffff82bcef80 r dsc_mask +ffffffff82bcf260 r dwbc30_regs +ffffffff82bcf43c r dwbc30_shift +ffffffff82bcf570 r dwbc30_mask +ffffffff82bcfa40 r mcif_wb30_regs +ffffffff82bcfb3c r mcif_wb30_shift +ffffffff82bcfbe8 r mcif_wb30_mask +ffffffff82bcfea0 r aux_engine_regs +ffffffff82bcfef0 r aux_mask +ffffffff82bcff50 r aux_shift +ffffffff82bcff70 r i2c_hw_regs +ffffffff82bcffe0 r i2c_shifts +ffffffff82bd000c r i2c_masks +ffffffff82bd00b0 r audio_regs +ffffffff82bd01e4 r audio_shift +ffffffff82bd01fc r audio_mask +ffffffff82bd0240 r stream_enc_regs +ffffffff82bd04e8 r se_shift +ffffffff82bd05c4 r se_mask +ffffffff82bd0930 r vpg_regs +ffffffff82bd096c r vpg_shift +ffffffff82bd0994 r vpg_mask +ffffffff82bd0a30 r afmt_regs +ffffffff82bd0a9c r afmt_shift +ffffffff82bd0ab0 r afmt_mask +ffffffff82bd0af4 r hwseq_reg +ffffffff82bd0d10 r hwseq_shift +ffffffff82bd0d90 r hwseq_mask +ffffffff82bd1000 r dccg31_funcs +ffffffff82bd2000 r dcn31_link_enc_funcs +ffffffff82bd3000 r dcn30_str_enc_funcs +ffffffff82bd4000 r hubbub31_funcs +ffffffff82bd5000 r dcn31_funcs +ffffffff82bd52c0 r dcn31_private_funcs +ffffffff82bd6000 r dcn31_link_panel_cntl_funcs +ffffffff82bd7000 r bios_regs +ffffffff82bd7008 r res_cap_dcn31 +ffffffff82bd7048 r debug_defaults_diags +ffffffff82bd71c0 r clk_src_regs +ffffffff82bd7370 r clk_src_regs_b0 +ffffffff82bd7514 r dccg_regs +ffffffff82bd7600 r dccg_shift +ffffffff82bd7698 r dccg_mask +ffffffff82bd7900 r abm_regs +ffffffff82bd7a00 r abm_shift +ffffffff82bd7a14 r abm_mask +ffffffff82bd7a60 r res_create_funcs +ffffffff82bd7a90 r res_create_maximus_funcs +ffffffff82bd7ac0 r plane_cap +ffffffff82bd7af0 r link_enc_regs +ffffffff82bd8150 r link_enc_aux_regs +ffffffff82bd81a0 r link_enc_hpd_regs +ffffffff82bd81b4 r le_shift +ffffffff82bd82a4 r le_mask +ffffffff82bd865c r link_enc_feature +ffffffff82bd866c r panel_config_defaults +ffffffff82bd86a8 r debug_defaults_drv +ffffffff82bd8820 r cs_shift +ffffffff82bd882c r cs_mask +ffffffff82bd8854 r hubbub_reg +ffffffff82bd89c8 r hubbub_shift +ffffffff82bd8a50 r hubbub_mask +ffffffff82bd8c70 r vmid_regs +ffffffff82bd8e30 r vmid_shifts +ffffffff82bd8e38 r vmid_masks +ffffffff82bd8e60 r hubp_regs +ffffffff82bd9690 r hubp_shift +ffffffff82bd978c r hubp_mask +ffffffff82bd9b80 r dpp_regs +ffffffff82bdb080 r tf_shift +ffffffff82bdb350 r tf_mask +ffffffff82bdbe90 r opp_regs +ffffffff82bdbff0 r opp_shift +ffffffff82bdc028 r opp_mask +ffffffff82bdc100 r optc_regs +ffffffff82bdc600 r optc_shift +ffffffff82bdc6c0 r optc_mask +ffffffff82bdc9c0 r mpc_regs +ffffffff82bde1ac r mpc_shift +ffffffff82bde288 r mpc_mask +ffffffff82bde600 r dsc_regs +ffffffff82bde84c r dsc_shift +ffffffff82bde904 r dsc_mask +ffffffff82bdebe0 r dwbc30_regs +ffffffff82bdedbc r dwbc30_shift +ffffffff82bdeef0 r dwbc30_mask +ffffffff82bdf3c0 r mcif_wb30_regs +ffffffff82bdf4bc r mcif_wb30_shift +ffffffff82bdf568 r mcif_wb30_mask +ffffffff82bdf820 r aux_engine_regs +ffffffff82bdf8e8 r aux_mask +ffffffff82bdf948 r aux_shift +ffffffff82bdf960 r i2c_hw_regs +ffffffff82bdfa78 r i2c_shifts +ffffffff82bdfaa4 r i2c_masks +ffffffff82bdfb50 r audio_regs +ffffffff82bdfc84 r audio_shift +ffffffff82bdfc9c r audio_mask +ffffffff82bdfcd8 r se_shift +ffffffff82bdfdb4 r se_mask +ffffffff82be0120 r vpg_regs +ffffffff82be0210 r vpg_shift +ffffffff82be0238 r vpg_mask +ffffffff82be02e0 r afmt_regs +ffffffff82be03b8 r afmt_shift +ffffffff82be03cc r afmt_mask +ffffffff82be0420 r stream_enc_regs +ffffffff82be1ac0 r hpo_dp_stream_enc_regs +ffffffff82be1cf0 r hpo_dp_se_shift +ffffffff82be1d18 r hpo_dp_se_mask +ffffffff82be1dc0 r apg_regs +ffffffff82be1e00 r apg_shift +ffffffff82be1e08 r apg_mask +ffffffff82be1e20 r hpo_dp_link_enc_regs +ffffffff82be1f30 r hpo_dp_le_shift +ffffffff82be1f4c r hpo_dp_le_mask +ffffffff82be1fb0 r hwseq_reg +ffffffff82be21cc r hwseq_shift +ffffffff82be224c r hwseq_mask +ffffffff82be3000 r dccg314_funcs +ffffffff82be4000 r dcn314_str_enc_funcs +ffffffff82be5000 r dcn314_funcs +ffffffff82be52c0 r dcn314_private_funcs +ffffffff82be6000 r bios_regs +ffffffff82be6008 r res_cap_dcn314 +ffffffff82be6048 r debug_defaults_diags +ffffffff82be61c0 r clk_src_regs +ffffffff82be6364 r dccg_regs +ffffffff82be6450 r dccg_shift +ffffffff82be64e8 r dccg_mask +ffffffff82be6750 r abm_regs +ffffffff82be6850 r abm_shift +ffffffff82be6864 r abm_mask +ffffffff82be68b0 r res_create_funcs +ffffffff82be68e0 r res_create_maximus_funcs +ffffffff82be6910 r plane_cap +ffffffff82be6940 r link_enc_regs +ffffffff82be6fa0 r link_enc_aux_regs +ffffffff82be6ff0 r link_enc_hpd_regs +ffffffff82be7004 r le_shift +ffffffff82be70f4 r le_mask +ffffffff82be74ac r link_enc_feature +ffffffff82be74bc r panel_config_defaults +ffffffff82be74f8 r debug_defaults_drv +ffffffff82be7670 r cs_shift +ffffffff82be767c r cs_mask +ffffffff82be76a4 r hubbub_reg +ffffffff82be7818 r hubbub_shift +ffffffff82be78a0 r hubbub_mask +ffffffff82be7ac0 r vmid_regs +ffffffff82be7c80 r vmid_shifts +ffffffff82be7c88 r vmid_masks +ffffffff82be7cb0 r hubp_regs +ffffffff82be84e0 r hubp_shift +ffffffff82be85dc r hubp_mask +ffffffff82be89d0 r dpp_regs +ffffffff82be9ed0 r tf_shift +ffffffff82bea1a0 r tf_mask +ffffffff82beace0 r opp_regs +ffffffff82beae40 r opp_shift +ffffffff82beae78 r opp_mask +ffffffff82beaf50 r optc_regs +ffffffff82beb450 r optc_shift +ffffffff82beb510 r optc_mask +ffffffff82beb810 r mpc_regs +ffffffff82becffc r mpc_shift +ffffffff82bed0d8 r mpc_mask +ffffffff82bed450 r dsc_regs +ffffffff82bed760 r dsc_shift +ffffffff82bed818 r dsc_mask +ffffffff82bedaf0 r dwbc30_regs +ffffffff82bedccc r dwbc30_shift +ffffffff82bede00 r dwbc30_mask +ffffffff82bee2d0 r mcif_wb30_regs +ffffffff82bee3cc r mcif_wb30_shift +ffffffff82bee478 r mcif_wb30_mask +ffffffff82bee730 r aux_engine_regs +ffffffff82bee7f8 r aux_mask +ffffffff82bee858 r aux_shift +ffffffff82bee870 r i2c_hw_regs +ffffffff82bee988 r i2c_shifts +ffffffff82bee9b4 r i2c_masks +ffffffff82beea60 r audio_regs +ffffffff82beeb94 r audio_shift +ffffffff82beebac r audio_mask +ffffffff82beebf0 r stream_enc_regs +ffffffff82bef294 r se_shift +ffffffff82bef370 r se_mask +ffffffff82bef6e0 r vpg_regs +ffffffff82bef7d0 r vpg_shift +ffffffff82bef7f8 r vpg_mask +ffffffff82bef8a0 r afmt_regs +ffffffff82bef978 r afmt_shift +ffffffff82bef98c r afmt_mask +ffffffff82bef9e0 r hpo_dp_stream_enc_regs +ffffffff82befc10 r hpo_dp_se_shift +ffffffff82befc38 r hpo_dp_se_mask +ffffffff82befce0 r apg_regs +ffffffff82befd20 r apg_shift +ffffffff82befd28 r apg_mask +ffffffff82befd40 r hpo_dp_link_enc_regs +ffffffff82befe50 r hpo_dp_le_shift +ffffffff82befe6c r hpo_dp_le_mask +ffffffff82befed0 r hwseq_reg +ffffffff82bf00ec r hwseq_shift +ffffffff82bf016c r hwseq_mask +ffffffff82bf1000 r bios_regs +ffffffff82bf1008 r res_cap_dcn31 +ffffffff82bf1048 r debug_defaults_diags +ffffffff82bf11c0 r clk_src_regs +ffffffff82bf1364 r dccg_regs +ffffffff82bf1450 r dccg_shift +ffffffff82bf14e8 r dccg_mask +ffffffff82bf1750 r abm_regs +ffffffff82bf1850 r abm_shift +ffffffff82bf1864 r abm_mask +ffffffff82bf18b0 r res_create_funcs +ffffffff82bf18e0 r res_create_maximus_funcs +ffffffff82bf1910 r plane_cap +ffffffff82bf1940 r link_enc_regs +ffffffff82bf1fa0 r link_enc_aux_regs +ffffffff82bf1ff0 r link_enc_hpd_regs +ffffffff82bf2004 r le_shift +ffffffff82bf20f4 r le_mask +ffffffff82bf24ac r link_enc_feature +ffffffff82bf24bc r panel_config_defaults +ffffffff82bf24f8 r debug_defaults_drv +ffffffff82bf2670 r cs_shift +ffffffff82bf267c r cs_mask +ffffffff82bf26a4 r hubbub_reg +ffffffff82bf2818 r hubbub_shift +ffffffff82bf28a0 r hubbub_mask +ffffffff82bf2ac0 r vmid_regs +ffffffff82bf2c80 r vmid_shifts +ffffffff82bf2c88 r vmid_masks +ffffffff82bf2cb0 r hubp_regs +ffffffff82bf34e0 r hubp_shift +ffffffff82bf35dc r hubp_mask +ffffffff82bf39d0 r dpp_regs +ffffffff82bf4ed0 r tf_shift +ffffffff82bf51a0 r tf_mask +ffffffff82bf5ce0 r opp_regs +ffffffff82bf5e40 r opp_shift +ffffffff82bf5e78 r opp_mask +ffffffff82bf5f50 r optc_regs +ffffffff82bf6450 r optc_shift +ffffffff82bf6510 r optc_mask +ffffffff82bf6810 r mpc_regs +ffffffff82bf7ffc r mpc_shift +ffffffff82bf80d8 r mpc_mask +ffffffff82bf8450 r dsc_regs +ffffffff82bf869c r dsc_shift +ffffffff82bf8754 r dsc_mask +ffffffff82bf8a30 r dwbc30_regs +ffffffff82bf8c0c r dwbc30_shift +ffffffff82bf8d40 r dwbc30_mask +ffffffff82bf9210 r mcif_wb30_regs +ffffffff82bf930c r mcif_wb30_shift +ffffffff82bf93b8 r mcif_wb30_mask +ffffffff82bf9670 r aux_engine_regs +ffffffff82bf9738 r aux_mask +ffffffff82bf9798 r aux_shift +ffffffff82bf97b0 r i2c_hw_regs +ffffffff82bf98c8 r i2c_shifts +ffffffff82bf98f4 r i2c_masks +ffffffff82bf99a0 r audio_regs +ffffffff82bf9ad4 r audio_shift +ffffffff82bf9aec r audio_mask +ffffffff82bf9b30 r stream_enc_regs +ffffffff82bfa1d4 r se_shift +ffffffff82bfa2b0 r se_mask +ffffffff82bfa620 r vpg_regs +ffffffff82bfa710 r vpg_shift +ffffffff82bfa738 r vpg_mask +ffffffff82bfa7e0 r afmt_regs +ffffffff82bfa8b8 r afmt_shift +ffffffff82bfa8cc r afmt_mask +ffffffff82bfa920 r hpo_dp_stream_enc_regs +ffffffff82bfab50 r hpo_dp_se_shift +ffffffff82bfab78 r hpo_dp_se_mask +ffffffff82bfac20 r apg_regs +ffffffff82bfac60 r apg_shift +ffffffff82bfac68 r apg_mask +ffffffff82bfac80 r hpo_dp_link_enc_regs +ffffffff82bfad90 r hpo_dp_le_shift +ffffffff82bfadac r hpo_dp_le_mask +ffffffff82bfae10 r hwseq_reg +ffffffff82bfb02c r hwseq_shift +ffffffff82bfb0ac r hwseq_mask +ffffffff82bfc000 r bios_regs +ffffffff82bfc008 r res_cap_dcn31 +ffffffff82bfc048 r debug_defaults_diags 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tf_shift +ffffffff82c001a0 r tf_mask +ffffffff82c00ce0 r opp_regs +ffffffff82c00e40 r opp_shift +ffffffff82c00e78 r opp_mask +ffffffff82c00f50 r optc_regs +ffffffff82c01450 r optc_shift +ffffffff82c01510 r optc_mask +ffffffff82c01810 r mpc_regs +ffffffff82c02ffc r mpc_shift +ffffffff82c030d8 r mpc_mask +ffffffff82c03450 r dsc_regs +ffffffff82c0369c r dsc_shift +ffffffff82c03754 r dsc_mask +ffffffff82c03a30 r dwbc30_regs +ffffffff82c03c0c r dwbc30_shift +ffffffff82c03d40 r dwbc30_mask +ffffffff82c04210 r mcif_wb30_regs +ffffffff82c0430c r mcif_wb30_shift +ffffffff82c043b8 r mcif_wb30_mask +ffffffff82c04670 r aux_engine_regs +ffffffff82c04738 r aux_mask +ffffffff82c04798 r aux_shift +ffffffff82c047b0 r i2c_hw_regs +ffffffff82c048c8 r i2c_shifts +ffffffff82c048f4 r i2c_masks +ffffffff82c049a0 r audio_regs +ffffffff82c04ad4 r audio_shift +ffffffff82c04aec r audio_mask +ffffffff82c04b30 r stream_enc_regs +ffffffff82c051d4 r se_shift +ffffffff82c052b0 r se_mask +ffffffff82c05620 r vpg_regs +ffffffff82c05710 r vpg_shift +ffffffff82c05738 r vpg_mask +ffffffff82c057e0 r afmt_regs +ffffffff82c058b8 r afmt_shift +ffffffff82c058cc r afmt_mask +ffffffff82c05920 r hpo_dp_stream_enc_regs +ffffffff82c05b50 r hpo_dp_se_shift +ffffffff82c05b78 r hpo_dp_se_mask +ffffffff82c05c20 r apg_regs +ffffffff82c05c60 r apg_shift +ffffffff82c05c68 r apg_mask +ffffffff82c05c80 r hpo_dp_link_enc_regs +ffffffff82c05d90 r hpo_dp_le_shift +ffffffff82c05dac r hpo_dp_le_mask +ffffffff82c05e10 r hwseq_reg +ffffffff82c0602c r hwseq_shift +ffffffff82c060ac r hwseq_mask +ffffffff82c07000 r dccg32_funcs +ffffffff82c08000 r dcn32_link_enc_funcs +ffffffff82c09000 r dcn32_str_enc_funcs +ffffffff82c0a000 r hubbub32_funcs +ffffffff82c0b000 r dcn32_funcs +ffffffff82c0b2c0 r dcn32_private_funcs +ffffffff82c0c000 R dcn32_mmhubbub_funcs +ffffffff82c0d000 R dcn32_mpc_funcs +ffffffff82c0e000 r res_cap_dcn32 +ffffffff82c0e040 r debug_defaults_diags +ffffffff82c0e1b8 r dccg_shift +ffffffff82c0e250 r dccg_mask +ffffffff82c0e4b0 r abm_shift +ffffffff82c0e4c4 r abm_mask +ffffffff82c0e510 r res_create_funcs +ffffffff82c0e540 r res_create_maximus_funcs +ffffffff82c0e570 r plane_cap +ffffffff82c0e59c r le_shift +ffffffff82c0e68c r le_mask +ffffffff82c0ea44 r link_enc_feature +ffffffff82c0ea58 r debug_defaults_drv +ffffffff82c0ebd0 r cs_shift +ffffffff82c0ebdc r cs_mask +ffffffff82c0ec04 r hubbub_shift +ffffffff82c0ec8c r hubbub_mask +ffffffff82c0eea8 r vmid_shifts +ffffffff82c0eeb0 r vmid_masks +ffffffff82c0eed0 r hubp_shift +ffffffff82c0efcc r hubp_mask +ffffffff82c0f3bc r tf_shift +ffffffff82c0f68c r tf_mask +ffffffff82c101cc r opp_shift +ffffffff82c10204 r opp_mask +ffffffff82c102d8 r optc_shift +ffffffff82c10398 r optc_mask +ffffffff82c10698 r mpc_shift +ffffffff82c10774 r mpc_mask +ffffffff82c10ae0 r dsc_shift +ffffffff82c10b98 r dsc_mask +ffffffff82c10e70 r dwbc30_shift +ffffffff82c10fa4 r dwbc30_mask +ffffffff82c1146c r mcif_wb30_shift +ffffffff82c11518 r mcif_wb30_mask +ffffffff82c117c4 r aux_mask +ffffffff82c11824 r aux_shift +ffffffff82c1183c r i2c_shifts +ffffffff82c11868 r i2c_masks +ffffffff82c1190c r audio_shift +ffffffff82c11924 r audio_mask +ffffffff82c11960 r se_shift +ffffffff82c11a3c r se_mask +ffffffff82c11da8 r vpg_shift +ffffffff82c11dd0 r vpg_mask +ffffffff82c11e64 r afmt_shift +ffffffff82c11e78 r afmt_mask +ffffffff82c11ebc r hpo_dp_se_shift +ffffffff82c11ee4 r hpo_dp_se_mask +ffffffff82c11f84 r apg_shift +ffffffff82c11f8c r apg_mask +ffffffff82c11fa4 r hpo_dp_le_shift +ffffffff82c11fc0 r hpo_dp_le_mask +ffffffff82c12024 r hwseq_shift +ffffffff82c120a4 r hwseq_mask +ffffffff82c13000 r dcn321_link_enc_funcs +ffffffff82c14000 r res_cap_dcn321 +ffffffff82c14040 r debug_defaults_diags +ffffffff82c141b8 r dccg_shift +ffffffff82c14250 r dccg_mask +ffffffff82c144b0 r abm_shift +ffffffff82c144c4 r abm_mask +ffffffff82c14510 r res_create_funcs +ffffffff82c14540 r res_create_maximus_funcs +ffffffff82c14570 r plane_cap +ffffffff82c1459c r le_shift +ffffffff82c1468c r le_mask +ffffffff82c14a44 r link_enc_feature +ffffffff82c14a58 r debug_defaults_drv +ffffffff82c14bd0 r cs_shift +ffffffff82c14bdc r cs_mask +ffffffff82c14c04 r hubbub_shift +ffffffff82c14c8c r hubbub_mask +ffffffff82c14ea8 r vmid_shifts +ffffffff82c14eb0 r vmid_masks +ffffffff82c14ed0 r hubp_shift +ffffffff82c14fcc r hubp_mask +ffffffff82c153bc r tf_shift +ffffffff82c1568c r tf_mask +ffffffff82c161cc r opp_shift +ffffffff82c16204 r opp_mask +ffffffff82c162d8 r optc_shift +ffffffff82c16398 r optc_mask +ffffffff82c16698 r mpc_shift +ffffffff82c16774 r mpc_mask +ffffffff82c16ae0 r dsc_shift +ffffffff82c16b98 r dsc_mask +ffffffff82c16e70 r dwbc30_shift +ffffffff82c16fa4 r dwbc30_mask +ffffffff82c1746c r mcif_wb30_shift +ffffffff82c17518 r mcif_wb30_mask +ffffffff82c177c4 r aux_mask +ffffffff82c17824 r aux_shift +ffffffff82c1783c r i2c_shifts +ffffffff82c17868 r i2c_masks +ffffffff82c1790c r audio_shift +ffffffff82c17924 r audio_mask +ffffffff82c17960 r se_shift +ffffffff82c17a3c r se_mask +ffffffff82c17da8 r vpg_shift +ffffffff82c17dd0 r vpg_mask +ffffffff82c17e64 r afmt_shift +ffffffff82c17e78 r afmt_mask +ffffffff82c17ebc r hpo_dp_se_shift +ffffffff82c17ee4 r hpo_dp_se_mask +ffffffff82c17f84 r apg_shift +ffffffff82c17f8c r apg_mask +ffffffff82c17fa4 r hpo_dp_le_shift +ffffffff82c17fc0 r hpo_dp_le_mask +ffffffff82c18024 r hwseq_shift +ffffffff82c180a4 r hwseq_mask +ffffffff82c1a000 R dcn10_soc_defaults +ffffffff82c1a08c R dcn10_ip_defaults +ffffffff82c25000 R dml20_funcs +ffffffff82c25030 R dml20v2_funcs +ffffffff82c25060 R dml21_funcs +ffffffff82c25090 R dml30_funcs +ffffffff82c250c0 R dml31_funcs +ffffffff82c250f0 R dml314_funcs +ffffffff82c25120 R dml32_funcs +ffffffff82c28000 R qp_table_422_10bpc_min +ffffffff82c28740 R qp_table_444_8bpc_max +ffffffff82c29080 R qp_table_420_12bpc_max +ffffffff82c297c0 R qp_table_444_10bpc_min +ffffffff82c2a400 R qp_table_420_8bpc_max +ffffffff82c2a840 R qp_table_444_8bpc_min +ffffffff82c2b180 R qp_table_444_12bpc_min +ffffffff82c2c0c0 R qp_table_420_12bpc_min +ffffffff82c2c800 R qp_table_422_12bpc_min +ffffffff82c2d140 R qp_table_422_12bpc_max +ffffffff82c2da80 R qp_table_444_12bpc_max +ffffffff82c2e9c0 R qp_table_420_8bpc_min +ffffffff82c2ee00 R qp_table_422_8bpc_min +ffffffff82c2f340 R qp_table_422_10bpc_max +ffffffff82c2fa80 R qp_table_420_10bpc_max +ffffffff82c30040 R qp_table_420_10bpc_min +ffffffff82c30600 R qp_table_444_10bpc_max +ffffffff82c31240 R qp_table_422_8bpc_max ffffffff82c33000 r funcs +ffffffff82c33050 r hpd_regs +ffffffff82c331a0 r hpd_shift +ffffffff82c331b0 r hpd_mask +ffffffff82c331c0 r ddc_data_regs +ffffffff82c333a0 r ddc_clk_regs +ffffffff82c33580 r ddc_shift +ffffffff82c335a8 r ddc_mask ffffffff82c34000 r funcs -ffffffff82c34050 r hpd_regs -ffffffff82c341a0 r hpd_shift -ffffffff82c341b0 r hpd_mask -ffffffff82c341c0 r ddc_data_regs -ffffffff82c343a0 r ddc_clk_regs -ffffffff82c34580 r ddc_shift -ffffffff82c345a8 r ddc_mask ffffffff82c35000 r funcs +ffffffff82c35050 r hpd_regs +ffffffff82c351a0 r hpd_shift +ffffffff82c351b0 r hpd_mask +ffffffff82c351c0 r ddc_data_regs +ffffffff82c353a0 r ddc_clk_regs +ffffffff82c35580 r ddc_shift +ffffffff82c355a8 r ddc_mask ffffffff82c36000 r funcs -ffffffff82c36050 r hpd_regs -ffffffff82c361a0 r hpd_shift -ffffffff82c361b0 r hpd_mask -ffffffff82c361c0 r ddc_data_regs -ffffffff82c363a0 r ddc_clk_regs -ffffffff82c36580 r ddc_shift -ffffffff82c365a8 r ddc_mask ffffffff82c37000 r funcs +ffffffff82c37050 r hpd_regs +ffffffff82c371a0 r hpd_shift +ffffffff82c371b0 r hpd_mask +ffffffff82c371c0 r ddc_data_regs +ffffffff82c373a0 r ddc_clk_regs +ffffffff82c37580 r ddc_shift +ffffffff82c375a8 r ddc_mask ffffffff82c38000 r funcs -ffffffff82c38050 r hpd_regs -ffffffff82c381a0 r hpd_shift -ffffffff82c381b0 r hpd_mask -ffffffff82c381c0 r ddc_data_regs -ffffffff82c383a0 r ddc_clk_regs -ffffffff82c38580 r ddc_shift -ffffffff82c385a8 r ddc_mask -ffffffff82c385d0 r generic_regs -ffffffff82c38640 r generic_shift -ffffffff82c38650 r generic_mask ffffffff82c39000 r funcs +ffffffff82c39050 r hpd_regs +ffffffff82c391a0 r hpd_shift +ffffffff82c391b0 r hpd_mask +ffffffff82c391c0 r ddc_data_regs +ffffffff82c393a0 r ddc_clk_regs +ffffffff82c39580 r ddc_shift +ffffffff82c395a8 r ddc_mask +ffffffff82c395d0 r generic_regs +ffffffff82c39640 r generic_shift +ffffffff82c39650 r generic_mask ffffffff82c3a000 r funcs -ffffffff82c3a050 r hpd_regs -ffffffff82c3a1a0 r hpd_shift -ffffffff82c3a1b0 r hpd_mask -ffffffff82c3a1c0 r ddc_data_regs_dcn -ffffffff82c3a370 r ddc_clk_regs_dcn -ffffffff82c3a520 r ddc_shift -ffffffff82c3a640 r ddc_mask -ffffffff82c3a760 r generic_regs -ffffffff82c3a7d0 r generic_shift -ffffffff82c3a7e0 r generic_mask ffffffff82c3b000 r funcs +ffffffff82c3b050 r hpd_regs +ffffffff82c3b1a0 r hpd_shift +ffffffff82c3b1b0 r hpd_mask +ffffffff82c3b1c0 r ddc_data_regs_dcn +ffffffff82c3b370 r ddc_clk_regs_dcn +ffffffff82c3b520 r ddc_shift +ffffffff82c3b640 r ddc_mask +ffffffff82c3b760 r generic_regs +ffffffff82c3b7d0 r generic_shift +ffffffff82c3b7e0 r generic_mask ffffffff82c3c000 r funcs -ffffffff82c3c050 r hpd_regs -ffffffff82c3c168 r hpd_shift -ffffffff82c3c178 r hpd_mask -ffffffff82c3c190 r ddc_data_regs_dcn -ffffffff82c3c2c0 r ddc_clk_regs_dcn -ffffffff82c3c3f0 r ddc_shift -ffffffff82c3c4e0 r ddc_mask -ffffffff82c3c5d0 r generic_regs -ffffffff82c3c604 r generic_shift -ffffffff82c3c60c r generic_mask ffffffff82c3d000 r funcs +ffffffff82c3d050 r hpd_regs +ffffffff82c3d168 r hpd_shift +ffffffff82c3d178 r hpd_mask +ffffffff82c3d190 r ddc_data_regs_dcn +ffffffff82c3d2c0 r ddc_clk_regs_dcn +ffffffff82c3d3f0 r ddc_shift +ffffffff82c3d4e0 r ddc_mask +ffffffff82c3d5d0 r generic_regs +ffffffff82c3d604 r generic_shift +ffffffff82c3d60c r generic_mask ffffffff82c3e000 r funcs -ffffffff82c3e050 r hpd_regs -ffffffff82c3e1a0 r hpd_shift -ffffffff82c3e1b0 r hpd_mask -ffffffff82c3e1c0 r ddc_data_regs_dcn -ffffffff82c3e370 r ddc_clk_regs_dcn -ffffffff82c3e520 r ddc_shift -ffffffff82c3e640 r ddc_mask -ffffffff82c3e760 r generic_regs -ffffffff82c3e7d0 r generic_shift -ffffffff82c3e7e0 r generic_mask ffffffff82c3f000 r funcs +ffffffff82c3f050 r hpd_regs +ffffffff82c3f1a0 r hpd_shift +ffffffff82c3f1b0 r hpd_mask +ffffffff82c3f1c0 r ddc_data_regs_dcn +ffffffff82c3f370 r ddc_clk_regs_dcn +ffffffff82c3f520 r ddc_shift +ffffffff82c3f640 r ddc_mask +ffffffff82c3f760 r generic_regs +ffffffff82c3f7d0 r generic_shift +ffffffff82c3f7e0 r generic_mask ffffffff82c40000 r funcs -ffffffff82c40050 r hpd_regs -ffffffff82c40168 r hpd_shift -ffffffff82c40178 r hpd_mask -ffffffff82c40190 r ddc_data_regs_dcn -ffffffff82c40300 r ddc_clk_regs_dcn -ffffffff82c40470 r ddc_shift -ffffffff82c40560 r ddc_mask -ffffffff82c40650 r generic_regs -ffffffff82c406c0 r generic_shift -ffffffff82c406d0 r generic_mask ffffffff82c41000 r funcs +ffffffff82c41050 r hpd_regs +ffffffff82c41168 r hpd_shift +ffffffff82c41178 r hpd_mask +ffffffff82c41190 r ddc_data_regs_dcn +ffffffff82c41300 r ddc_clk_regs_dcn +ffffffff82c41470 r ddc_shift +ffffffff82c41560 r ddc_mask +ffffffff82c41650 r generic_regs +ffffffff82c416c0 r generic_shift +ffffffff82c416d0 r generic_mask ffffffff82c42000 r funcs -ffffffff82c42050 r hpd_regs -ffffffff82c42168 r hpd_shift -ffffffff82c42178 r hpd_mask -ffffffff82c42190 r ddc_data_regs_dcn -ffffffff82c42340 r ddc_clk_regs_dcn -ffffffff82c424f0 r ddc_shift -ffffffff82c42610 r ddc_mask -ffffffff82c42730 r generic_regs -ffffffff82c427a0 r generic_shift -ffffffff82c427b0 r generic_mask ffffffff82c43000 r funcs +ffffffff82c43050 r hpd_regs +ffffffff82c43168 r hpd_shift +ffffffff82c43178 r hpd_mask +ffffffff82c43190 r ddc_data_regs_dcn +ffffffff82c43340 r ddc_clk_regs_dcn +ffffffff82c434f0 r ddc_shift +ffffffff82c43610 r ddc_mask +ffffffff82c43730 r generic_regs +ffffffff82c437a0 r generic_shift +ffffffff82c437b0 r generic_mask ffffffff82c44000 r funcs ffffffff82c45000 r funcs ffffffff82c46000 r funcs -ffffffff82c47000 r hdmi_14_protection -ffffffff82c47010 r dp_11_protection -ffffffff82c47020 r hdcp_i2c_offsets -ffffffff82c47050 r hdcp_dpcd_addrs -ffffffff82c48000 r irq_service_funcs_dce110 -ffffffff82c48008 r dummy_irq_info_funcs -ffffffff82c48018 r hpd_irq_info_funcs -ffffffff82c48028 r hpd_rx_irq_info_funcs -ffffffff82c48038 r pflip_irq_info_funcs -ffffffff82c48048 r vupdate_irq_info_funcs -ffffffff82c48058 r vblank_irq_info_funcs -ffffffff82c48070 r irq_source_info_dce110 -ffffffff82c4a000 r irq_service_funcs_dce120 -ffffffff82c4a008 r dummy_irq_info_funcs -ffffffff82c4a018 r hpd_irq_info_funcs -ffffffff82c4a028 r hpd_rx_irq_info_funcs -ffffffff82c4a038 r pflip_irq_info_funcs -ffffffff82c4a048 r vupdate_irq_info_funcs -ffffffff82c4a058 r vblank_irq_info_funcs -ffffffff82c4a070 r irq_source_info_dce120 -ffffffff82c4c000 r irq_service_funcs_dce80 -ffffffff82c4c008 r dummy_irq_info_funcs -ffffffff82c4c018 r hpd_irq_info_funcs -ffffffff82c4c028 r hpd_rx_irq_info_funcs -ffffffff82c4c038 r pflip_irq_info_funcs -ffffffff82c4c048 r vupdate_irq_info_funcs -ffffffff82c4c058 r vblank_irq_info_funcs -ffffffff82c4c070 r irq_source_info_dce80 -ffffffff82c4e000 r irq_service_funcs_dcn10 -ffffffff82c4e008 r dummy_irq_info_funcs -ffffffff82c4e018 r hpd_irq_info_funcs -ffffffff82c4e028 r hpd_rx_irq_info_funcs -ffffffff82c4e038 r pflip_irq_info_funcs -ffffffff82c4e048 r vupdate_no_lock_irq_info_funcs -ffffffff82c4e058 r vblank_irq_info_funcs -ffffffff82c4e068 r vline0_irq_info_funcs -ffffffff82c4e080 r irq_source_info_dcn10 -ffffffff82c50000 r irq_service_funcs_dcn20 -ffffffff82c50008 r dummy_irq_info_funcs -ffffffff82c50018 r hpd_irq_info_funcs -ffffffff82c50028 r hpd_rx_irq_info_funcs -ffffffff82c50038 r pflip_irq_info_funcs -ffffffff82c50048 r vupdate_no_lock_irq_info_funcs -ffffffff82c50058 r vblank_irq_info_funcs -ffffffff82c50068 r vline0_irq_info_funcs -ffffffff82c50080 r irq_source_info_dcn20 -ffffffff82c52000 r irq_service_funcs_dcn201 -ffffffff82c52008 r dummy_irq_info_funcs -ffffffff82c52018 r hpd_irq_info_funcs -ffffffff82c52028 r hpd_rx_irq_info_funcs -ffffffff82c52038 r pflip_irq_info_funcs -ffffffff82c52048 r vupdate_no_lock_irq_info_funcs -ffffffff82c52058 r vblank_irq_info_funcs -ffffffff82c52068 r vline0_irq_info_funcs -ffffffff82c52080 r irq_source_info_dcn201 -ffffffff82c54000 r irq_source_info_dcn21 -ffffffff82c55290 r irq_service_funcs_dcn21 -ffffffff82c55298 r dummy_irq_info_funcs -ffffffff82c552a8 r hpd_irq_info_funcs -ffffffff82c552b8 r hpd_rx_irq_info_funcs -ffffffff82c552c8 r pflip_irq_info_funcs -ffffffff82c552d8 r vupdate_no_lock_irq_info_funcs -ffffffff82c552e8 r vblank_irq_info_funcs -ffffffff82c552f8 r vline0_irq_info_funcs -ffffffff82c55308 r dmub_outbox_irq_info_funcs -ffffffff82c56000 r irq_source_info_dcn30 -ffffffff82c57290 r irq_service_funcs_dcn30 -ffffffff82c57298 r dummy_irq_info_funcs -ffffffff82c572a8 r hpd_irq_info_funcs -ffffffff82c572b8 r hpd_rx_irq_info_funcs -ffffffff82c572c8 r pflip_irq_info_funcs -ffffffff82c572d8 r vupdate_no_lock_irq_info_funcs -ffffffff82c572e8 r vblank_irq_info_funcs -ffffffff82c572f8 r vline0_irq_info_funcs -ffffffff82c57308 r dmub_trace_irq_info_funcs -ffffffff82c58000 r irq_source_info_dcn302 -ffffffff82c59290 r irq_service_funcs_dcn302 -ffffffff82c59298 r dummy_irq_info_funcs -ffffffff82c592a8 r hpd_irq_info_funcs -ffffffff82c592b8 r hpd_rx_irq_info_funcs -ffffffff82c592c8 r pflip_irq_info_funcs -ffffffff82c592d8 r vupdate_no_lock_irq_info_funcs -ffffffff82c592e8 r vblank_irq_info_funcs -ffffffff82c592f8 r vline0_irq_info_funcs -ffffffff82c59308 r dmub_trace_irq_info_funcs -ffffffff82c5a000 r irq_service_funcs_dcn303 -ffffffff82c5a008 r dummy_irq_info_funcs -ffffffff82c5a018 r hpd_irq_info_funcs -ffffffff82c5a028 r hpd_rx_irq_info_funcs -ffffffff82c5a038 r pflip_irq_info_funcs -ffffffff82c5a048 r vupdate_no_lock_irq_info_funcs -ffffffff82c5a058 r vblank_irq_info_funcs -ffffffff82c5a068 r vline0_irq_info_funcs -ffffffff82c5a080 r irq_source_info_dcn303 -ffffffff82c5c000 r irq_source_info_dcn31 -ffffffff82c5d290 r irq_service_funcs_dcn31 -ffffffff82c5d298 r dummy_irq_info_funcs -ffffffff82c5d2a8 r hpd_irq_info_funcs -ffffffff82c5d2b8 r hpd_rx_irq_info_funcs -ffffffff82c5d2c8 r pflip_irq_info_funcs -ffffffff82c5d2d8 r vupdate_no_lock_irq_info_funcs -ffffffff82c5d2e8 r vblank_irq_info_funcs -ffffffff82c5d2f8 r vline0_irq_info_funcs -ffffffff82c5d308 r outbox_irq_info_funcs -ffffffff82c5e000 r irq_source_info_dcn314 -ffffffff82c5f290 r irq_service_funcs_dcn314 -ffffffff82c5f298 r dummy_irq_info_funcs -ffffffff82c5f2a8 r hpd_irq_info_funcs -ffffffff82c5f2b8 r hpd_rx_irq_info_funcs -ffffffff82c5f2c8 r pflip_irq_info_funcs -ffffffff82c5f2d8 r vupdate_no_lock_irq_info_funcs -ffffffff82c5f2e8 r vblank_irq_info_funcs -ffffffff82c5f2f8 r vline0_irq_info_funcs -ffffffff82c5f308 r outbox_irq_info_funcs -ffffffff82c60000 r irq_source_info_dcn315 -ffffffff82c61290 r irq_service_funcs_dcn315 -ffffffff82c61298 r dummy_irq_info_funcs -ffffffff82c612a8 r hpd_irq_info_funcs -ffffffff82c612b8 r hpd_rx_irq_info_funcs -ffffffff82c612c8 r pflip_irq_info_funcs -ffffffff82c612d8 r vupdate_no_lock_irq_info_funcs -ffffffff82c612e8 r vblank_irq_info_funcs -ffffffff82c612f8 r vline0_irq_info_funcs -ffffffff82c61308 r outbox_irq_info_funcs -ffffffff82c62000 r irq_source_info_dcn32 -ffffffff82c63290 r irq_service_funcs_dcn32 -ffffffff82c63298 r dummy_irq_info_funcs -ffffffff82c632a8 r hpd_irq_info_funcs -ffffffff82c632b8 r hpd_rx_irq_info_funcs -ffffffff82c632c8 r pflip_irq_info_funcs -ffffffff82c632d8 r vupdate_no_lock_irq_info_funcs -ffffffff82c632e8 r vblank_irq_info_funcs -ffffffff82c632f8 r vline0_irq_info_funcs -ffffffff82c63308 r outbox_irq_info_funcs -ffffffff82c64000 r dio_link_hwss -ffffffff82c65000 r dpia_link_hwss -ffffffff82c66000 r hpo_dp_link_hwss -ffffffff82c67000 r virtual_lnk_enc_funcs -ffffffff82c68000 r virtual_link_hwss -ffffffff82c69000 r virtual_str_enc_funcs -ffffffff82c6a000 R dmub_srv_dcn20_regs -ffffffff82c6b000 R dmub_srv_dcn21_regs -ffffffff82c6c000 R dmub_srv_dcn30_regs -ffffffff82c6d000 R dmub_srv_dcn301_regs -ffffffff82c6e000 R dmub_srv_dcn302_regs -ffffffff82c6f000 R dmub_srv_dcn303_regs -ffffffff82c70000 R dmub_srv_dcn31_regs -ffffffff82c71000 R dmub_srv_dcn314_regs -ffffffff82c72000 R dmub_srv_dcn315_regs -ffffffff82c73000 R dmub_srv_dcn316_regs -ffffffff82c74000 R dmub_srv_dcn32_regs -ffffffff82c75000 r numerator01 -ffffffff82c75020 r numerator02 -ffffffff82c75040 r numerator04 -ffffffff82c75060 r numerator05 -ffffffff82c77000 r abm_settings -ffffffff82c77010 r abm_settings_config0 -ffffffff82c77050 r abm_settings_config1 -ffffffff82c77088 r min_reduction_table_v_2_2 -ffffffff82c77095 r max_reduction_table_v_2_2 -ffffffff82c770a2 r min_reduction_table -ffffffff82c770af r max_reduction_table -ffffffff82c78000 R amdgpu_pp_profile_name -ffffffff82c79000 r pp_lib_thermal_controller_names -ffffffff82c7a000 r pp_ip_funcs -ffffffff82c7a0a0 R pp_smu_ip_block -ffffffff82c7a0b8 r pp_dpm_funcs -ffffffff82c7b000 r gpio_tbl -ffffffff82c7b0f0 r enable_fb_req_rej_tbl -ffffffff82c7b140 r use_bclk_tbl -ffffffff82c7b310 r turn_off_plls_tbl -ffffffff82c7b640 r enter_baco_tbl -ffffffff82c7b730 r exit_baco_tbl -ffffffff82c7b850 r clean_baco_tbl +ffffffff82c47000 r funcs +ffffffff82c48000 r hdmi_14_protection +ffffffff82c48010 r dp_11_protection +ffffffff82c48020 r hdcp_i2c_offsets +ffffffff82c48050 r hdcp_dpcd_addrs +ffffffff82c49000 r irq_service_funcs_dce110 +ffffffff82c49008 r dummy_irq_info_funcs +ffffffff82c49018 r hpd_irq_info_funcs +ffffffff82c49028 r hpd_rx_irq_info_funcs +ffffffff82c49038 r pflip_irq_info_funcs +ffffffff82c49048 r vupdate_irq_info_funcs +ffffffff82c49058 r vblank_irq_info_funcs +ffffffff82c49070 r irq_source_info_dce110 +ffffffff82c4b000 r irq_service_funcs_dce120 +ffffffff82c4b008 r dummy_irq_info_funcs +ffffffff82c4b018 r hpd_irq_info_funcs +ffffffff82c4b028 r hpd_rx_irq_info_funcs +ffffffff82c4b038 r pflip_irq_info_funcs +ffffffff82c4b048 r vupdate_irq_info_funcs +ffffffff82c4b058 r vblank_irq_info_funcs +ffffffff82c4b070 r irq_source_info_dce120 +ffffffff82c4d000 r irq_service_funcs_dce80 +ffffffff82c4d008 r dummy_irq_info_funcs +ffffffff82c4d018 r hpd_irq_info_funcs +ffffffff82c4d028 r hpd_rx_irq_info_funcs +ffffffff82c4d038 r pflip_irq_info_funcs +ffffffff82c4d048 r vupdate_irq_info_funcs +ffffffff82c4d058 r vblank_irq_info_funcs +ffffffff82c4d070 r irq_source_info_dce80 +ffffffff82c4f000 r irq_service_funcs_dcn10 +ffffffff82c4f008 r dummy_irq_info_funcs +ffffffff82c4f018 r hpd_irq_info_funcs +ffffffff82c4f028 r hpd_rx_irq_info_funcs +ffffffff82c4f038 r pflip_irq_info_funcs +ffffffff82c4f048 r vupdate_no_lock_irq_info_funcs +ffffffff82c4f058 r vblank_irq_info_funcs +ffffffff82c4f068 r vline0_irq_info_funcs +ffffffff82c4f080 r irq_source_info_dcn10 +ffffffff82c51000 r irq_service_funcs_dcn20 +ffffffff82c51008 r dummy_irq_info_funcs +ffffffff82c51018 r hpd_irq_info_funcs +ffffffff82c51028 r hpd_rx_irq_info_funcs +ffffffff82c51038 r pflip_irq_info_funcs +ffffffff82c51048 r vupdate_no_lock_irq_info_funcs +ffffffff82c51058 r vblank_irq_info_funcs +ffffffff82c51068 r vline0_irq_info_funcs +ffffffff82c51080 r irq_source_info_dcn20 +ffffffff82c53000 r irq_service_funcs_dcn201 +ffffffff82c53008 r dummy_irq_info_funcs +ffffffff82c53018 r hpd_irq_info_funcs +ffffffff82c53028 r hpd_rx_irq_info_funcs +ffffffff82c53038 r pflip_irq_info_funcs +ffffffff82c53048 r vupdate_no_lock_irq_info_funcs +ffffffff82c53058 r vblank_irq_info_funcs +ffffffff82c53068 r vline0_irq_info_funcs +ffffffff82c53080 r irq_source_info_dcn201 +ffffffff82c55000 r irq_source_info_dcn21 +ffffffff82c56290 r irq_service_funcs_dcn21 +ffffffff82c56298 r dummy_irq_info_funcs +ffffffff82c562a8 r hpd_irq_info_funcs +ffffffff82c562b8 r hpd_rx_irq_info_funcs +ffffffff82c562c8 r pflip_irq_info_funcs +ffffffff82c562d8 r vupdate_no_lock_irq_info_funcs +ffffffff82c562e8 r vblank_irq_info_funcs +ffffffff82c562f8 r vline0_irq_info_funcs +ffffffff82c56308 r dmub_outbox_irq_info_funcs +ffffffff82c57000 r irq_source_info_dcn30 +ffffffff82c58290 r irq_service_funcs_dcn30 +ffffffff82c58298 r dummy_irq_info_funcs +ffffffff82c582a8 r hpd_irq_info_funcs +ffffffff82c582b8 r hpd_rx_irq_info_funcs +ffffffff82c582c8 r pflip_irq_info_funcs +ffffffff82c582d8 r vupdate_no_lock_irq_info_funcs +ffffffff82c582e8 r vblank_irq_info_funcs +ffffffff82c582f8 r vline0_irq_info_funcs +ffffffff82c58308 r dmub_trace_irq_info_funcs +ffffffff82c59000 r irq_source_info_dcn302 +ffffffff82c5a290 r irq_service_funcs_dcn302 +ffffffff82c5a298 r dummy_irq_info_funcs +ffffffff82c5a2a8 r hpd_irq_info_funcs +ffffffff82c5a2b8 r hpd_rx_irq_info_funcs +ffffffff82c5a2c8 r pflip_irq_info_funcs +ffffffff82c5a2d8 r vupdate_no_lock_irq_info_funcs +ffffffff82c5a2e8 r vblank_irq_info_funcs +ffffffff82c5a2f8 r vline0_irq_info_funcs +ffffffff82c5a308 r dmub_trace_irq_info_funcs +ffffffff82c5b000 r irq_service_funcs_dcn303 +ffffffff82c5b008 r dummy_irq_info_funcs +ffffffff82c5b018 r hpd_irq_info_funcs +ffffffff82c5b028 r hpd_rx_irq_info_funcs +ffffffff82c5b038 r pflip_irq_info_funcs +ffffffff82c5b048 r vupdate_no_lock_irq_info_funcs +ffffffff82c5b058 r vblank_irq_info_funcs +ffffffff82c5b068 r vline0_irq_info_funcs +ffffffff82c5b080 r irq_source_info_dcn303 +ffffffff82c5d000 r irq_source_info_dcn31 +ffffffff82c5e290 r irq_service_funcs_dcn31 +ffffffff82c5e298 r dummy_irq_info_funcs +ffffffff82c5e2a8 r hpd_irq_info_funcs +ffffffff82c5e2b8 r hpd_rx_irq_info_funcs +ffffffff82c5e2c8 r pflip_irq_info_funcs +ffffffff82c5e2d8 r vupdate_no_lock_irq_info_funcs +ffffffff82c5e2e8 r vblank_irq_info_funcs +ffffffff82c5e2f8 r vline0_irq_info_funcs +ffffffff82c5e308 r outbox_irq_info_funcs +ffffffff82c5f000 r irq_source_info_dcn314 +ffffffff82c60290 r irq_service_funcs_dcn314 +ffffffff82c60298 r dummy_irq_info_funcs +ffffffff82c602a8 r hpd_irq_info_funcs +ffffffff82c602b8 r hpd_rx_irq_info_funcs +ffffffff82c602c8 r pflip_irq_info_funcs +ffffffff82c602d8 r vupdate_no_lock_irq_info_funcs +ffffffff82c602e8 r vblank_irq_info_funcs +ffffffff82c602f8 r vline0_irq_info_funcs +ffffffff82c60308 r outbox_irq_info_funcs +ffffffff82c61000 r irq_source_info_dcn315 +ffffffff82c62290 r irq_service_funcs_dcn315 +ffffffff82c62298 r dummy_irq_info_funcs +ffffffff82c622a8 r hpd_irq_info_funcs +ffffffff82c622b8 r hpd_rx_irq_info_funcs +ffffffff82c622c8 r pflip_irq_info_funcs +ffffffff82c622d8 r vupdate_no_lock_irq_info_funcs +ffffffff82c622e8 r vblank_irq_info_funcs +ffffffff82c622f8 r vline0_irq_info_funcs +ffffffff82c62308 r outbox_irq_info_funcs +ffffffff82c63000 r irq_source_info_dcn32 +ffffffff82c64290 r irq_service_funcs_dcn32 +ffffffff82c64298 r dummy_irq_info_funcs +ffffffff82c642a8 r hpd_irq_info_funcs +ffffffff82c642b8 r hpd_rx_irq_info_funcs +ffffffff82c642c8 r pflip_irq_info_funcs +ffffffff82c642d8 r vupdate_no_lock_irq_info_funcs +ffffffff82c642e8 r vblank_irq_info_funcs +ffffffff82c642f8 r vline0_irq_info_funcs +ffffffff82c64308 r outbox_irq_info_funcs +ffffffff82c65000 r dio_link_hwss +ffffffff82c66000 r dpia_link_hwss +ffffffff82c67000 r hpo_dp_link_hwss +ffffffff82c68000 r virtual_lnk_enc_funcs +ffffffff82c69000 r virtual_link_hwss +ffffffff82c6a000 r virtual_str_enc_funcs +ffffffff82c6b000 R dmub_srv_dcn20_regs +ffffffff82c6c000 R dmub_srv_dcn21_regs +ffffffff82c6d000 R dmub_srv_dcn30_regs +ffffffff82c6e000 R dmub_srv_dcn301_regs +ffffffff82c6f000 R dmub_srv_dcn302_regs +ffffffff82c70000 R dmub_srv_dcn303_regs +ffffffff82c71000 R dmub_srv_dcn31_regs +ffffffff82c72000 R dmub_srv_dcn314_regs +ffffffff82c73000 R dmub_srv_dcn315_regs +ffffffff82c74000 R dmub_srv_dcn316_regs +ffffffff82c75000 R dmub_srv_dcn32_regs +ffffffff82c76000 r numerator01 +ffffffff82c76020 r numerator02 +ffffffff82c76040 r numerator04 +ffffffff82c76060 r numerator05 +ffffffff82c78000 r abm_settings +ffffffff82c78010 r abm_settings_config0 +ffffffff82c78050 r abm_settings_config1 +ffffffff82c78088 r min_reduction_table_v_2_2 +ffffffff82c78095 r max_reduction_table_v_2_2 +ffffffff82c780a2 r min_reduction_table +ffffffff82c780af r max_reduction_table +ffffffff82c79000 R amdgpu_pp_profile_name +ffffffff82c7a000 r pp_lib_thermal_controller_names +ffffffff82c7b000 r pp_ip_funcs +ffffffff82c7b0a0 R pp_smu_ip_block +ffffffff82c7b0b8 r pp_dpm_funcs ffffffff82c7c000 r gpio_tbl ffffffff82c7c0f0 r enable_fb_req_rej_tbl ffffffff82c7c140 r use_bclk_tbl -ffffffff82c7c2e0 r turn_off_plls_tbl -ffffffff82c7c370 r clk_req_b_tbl -ffffffff82c7c490 r enter_baco_tbl -ffffffff82c7c5b0 r exit_baco_tbl -ffffffff82c7c6d0 r clean_baco_tbl +ffffffff82c7c310 r turn_off_plls_tbl +ffffffff82c7c640 r enter_baco_tbl +ffffffff82c7c730 r exit_baco_tbl +ffffffff82c7c850 r clean_baco_tbl ffffffff82c7d000 r gpio_tbl ffffffff82c7d0f0 r enable_fb_req_rej_tbl -ffffffff82c7d140 r use_bclk_tbl_vg -ffffffff82c7d200 r turn_off_plls_tbl_vg -ffffffff82c7d350 r use_bclk_tbl -ffffffff82c7d440 r turn_off_plls_tbl -ffffffff82c7d5f0 r clk_req_b_tbl -ffffffff82c7d710 r enter_baco_tbl -ffffffff82c7d830 r exit_baco_tbl -ffffffff82c7d950 r clean_baco_tbl -ffffffff82c7e000 r vega10_fuses_default -ffffffff82c8d000 r pp_r600_encode_lanes -ffffffff82c8e000 R pptable_v1_0_funcs -ffffffff82c8f000 R pptable_funcs -ffffffff82c8f020 r soft_dummy_pp_table -ffffffff82c90000 r smu10_hwmgr_funcs -ffffffff82c91000 r smu7_hwmgr_funcs -ffffffff82c912f8 r smu7_irq_funcs -ffffffff82c91310 r SMU7ThermalPolicy -ffffffff82c92000 r GCCACConfig_Polaris10 -ffffffff82c921b0 r DIDTConfig_Polaris10 -ffffffff82c92a50 r GCCACConfig_Polaris11 -ffffffff82c92c00 r DIDTConfig_Polaris11_Kicker -ffffffff82c934a0 r DIDTConfig_Polaris11 -ffffffff82c93d40 r DIDTConfig_Polaris12 -ffffffff82c945e0 r GCCACConfig_VegaM -ffffffff82c94790 r DIDTConfig_VegaM -ffffffff82c96000 r smu8_hwmgr_funcs -ffffffff82c962f0 r SMU7ThermalPolicy -ffffffff82c97000 r smu9_irq_funcs -ffffffff82c98000 r gpio_tbl_iceland -ffffffff82c98060 r gpio_tbl -ffffffff82c98150 r enable_fb_req_rej_tbl -ffffffff82c981a0 r use_bclk_tbl -ffffffff82c98370 r turn_off_plls_tbl -ffffffff82c98610 r enter_baco_tbl -ffffffff82c98730 r exit_baco_tbl_iceland -ffffffff82c98870 r clean_baco_tbl_iceland -ffffffff82c98890 r exit_baco_tbl -ffffffff82c989b0 r clean_baco_tbl -ffffffff82c99000 r pre_baco_tbl -ffffffff82c99090 r enter_baco_tbl -ffffffff82c992b0 r exit_baco_tbl -ffffffff82c99520 r clean_baco_tbl -ffffffff82c9a000 r vega10_hwmgr_funcs -ffffffff82c9a2f0 r channel_number -ffffffff82c9a320 r SMU7ThermalWithDelayPolicy -ffffffff82c9b000 r SEDiDtStallCtrlConfig_vega10 -ffffffff82c9b110 r SEDiDtStallPatternConfig_vega10 -ffffffff82c9b2e0 r SEDiDtWeightConfig_Vega10 -ffffffff82c9b3b0 r SEDiDtCtrl1Config_Vega10 -ffffffff82c9b440 r SEDiDtCtrl2Config_Vega10 -ffffffff82c9b510 r SEDiDtCtrl3Config_vega10 -ffffffff82c9b820 r SEDiDtTuningCtrlConfig_Vega10 -ffffffff82c9b8b0 r SELCacConfig_Vega10 -ffffffff82c9ba40 r SEDiDtCtrl0Config_Vega10 -ffffffff82c9bd10 r AvfsPSMInitConfig_vega10 -ffffffff82c9bd90 r SEEDCStallPatternConfig_Vega10 -ffffffff82c9bea0 r SEEDCStallDelayConfig_Vega10 -ffffffff82c9bf80 r SEEDCCtrlConfig_Vega10 -ffffffff82c9c040 r PSMSEEDCStallPatternConfig_Vega10 -ffffffff82c9c0c0 r PSMSEEDCStallDelayConfig_Vega10 -ffffffff82c9c1d0 r PSMSEEDCCtrlResetConfig_Vega10 -ffffffff82c9c290 r PSMSEEDCCtrlConfig_Vega10 -ffffffff82c9c350 r SEEDCForceStallPatternConfig_Vega10 -ffffffff82c9c3e0 r SEEDCCtrlForceStallConfig_Vega10 -ffffffff82c9d000 R vega10_pptable_funcs -ffffffff82c9e000 r pre_baco_tbl -ffffffff82c9e090 r enter_baco_tbl -ffffffff82c9e2b0 r exit_baco_tbl -ffffffff82c9e520 r clean_baco_tbl -ffffffff82c9f000 r vega12_hwmgr_funcs -ffffffff82c9f2f0 r SMU7ThermalWithDelayPolicy -ffffffff82c9f340 r link_width -ffffffff82ca0000 R vega12_pptable_funcs -ffffffff82ca1000 r clean_baco_tbl -ffffffff82ca2000 r vega20_hwmgr_funcs -ffffffff82ca22f0 r SMU7ThermalWithDelayPolicy -ffffffff82ca2340 r link_width -ffffffff82ca3000 R vega20_pptable_funcs -ffffffff82ca4000 R ci_smu_funcs -ffffffff82ca40e0 r defaults_hawaii_pro -ffffffff82ca412c r defaults_hawaii_xt -ffffffff82ca4178 r defaults_saturn_xt -ffffffff82ca41c4 r defaults_bonaire_xt -ffffffff82ca4210 r ci_program_jump_on_start.data -ffffffff82ca5000 R fiji_smu_funcs -ffffffff82ca50e0 r avfs_graphics_level -ffffffff82ca5240 r fiji_power_tune_data_set_array -ffffffff82ca5246 r fiji_clock_stretch_amount_conversion -ffffffff82ca5260 r fiji_clock_stretcher_ddt_table -ffffffff82ca6000 R iceland_smu_funcs -ffffffff82ca60e0 r defaults_icelandxt -ffffffff82ca612c r defaults_icelandpro -ffffffff82ca6178 r defaults_iceland -ffffffff82ca7000 R polaris10_smu_funcs -ffffffff82ca70e0 r avfs_graphics_level_polaris10 -ffffffff82ca72a0 r avfs_memory_level_polaris10 -ffffffff82ca72c0 r polaris10_power_tune_data_set_array -ffffffff82ca7310 r Range_Table -ffffffff82ca8000 R smu10_smu_funcs -ffffffff82ca9000 r smu7_program_jump_on_start.data -ffffffff82ca9010 r pwr_virus_table_pre -ffffffff82ca9680 r pwr_virus_table_post -ffffffff82ca9f80 r pwr_virus_section1 -ffffffff82caa610 r pwr_virus_section2 -ffffffff82caa660 r pwr_virus_section3 -ffffffff82cb1ab0 r pwr_virus_section4 -ffffffff82cb1e80 r pwr_virus_section5 -ffffffff82cb2490 r pwr_virus_section6 -ffffffff82cb4000 R smu8_smu_funcs -ffffffff82cb5000 R tonga_smu_funcs -ffffffff82cb50e0 r tonga_power_tune_data_set_array -ffffffff82cb512c r tonga_clock_stretch_amount_conversion -ffffffff82cb5140 r tonga_clock_stretcher_ddt_table -ffffffff82cb6000 R vega10_smu_funcs -ffffffff82cb7000 R vega12_smu_funcs -ffffffff82cb8000 R vega20_smu_funcs -ffffffff82cb9000 R vegam_smu_funcs -ffffffff82cb90e0 r vegam_power_tune_data_set_array -ffffffff82cb9130 r Range_Table -ffffffff82cba000 R smu_ip_funcs -ffffffff82cba0a0 R smu_v11_0_ip_block -ffffffff82cba0b8 R smu_v12_0_ip_block -ffffffff82cba0d0 R smu_v13_0_ip_block -ffffffff82cba0e8 r swsmu_pm_funcs -ffffffff82cbb000 r arcturus_ppt_funcs -ffffffff82cbb3d0 r arcturus_table_map -ffffffff82cbb450 r arcturus_pwr_src_map -ffffffff82cbb460 r arcturus_workload_map -ffffffff82cbb4a0 r smu11_thermal_policy -ffffffff82cbb4f8 r arcturus_i2c_algo -ffffffff82cbb508 r arcturus_i2c_control_quirks -ffffffff82cbb520 r arcturus_throttler_map -ffffffff82cbb540 r arcturus_message_map -ffffffff82cbbf90 r arcturus_clk_map -ffffffff82cbc050 r arcturus_feature_mask_map -ffffffff82cbd000 r cyan_skillfish_ppt_funcs -ffffffff82cbe000 r navi10_ppt_funcs -ffffffff82cbe3d0 r smu11_thermal_policy -ffffffff82cbe428 r navi10_i2c_algo -ffffffff82cbe438 r navi10_i2c_control_quirks -ffffffff82cbe450 r navi1x_throttler_map -ffffffff82cbe470 r NoDbiPrbs7 -ffffffff82cbf470 r DbiPrbs7 -ffffffff82cc1000 r sienna_cichlid_ppt_funcs -ffffffff82cc13d0 r smu11_thermal_policy -ffffffff82cc1428 r sienna_cichlid_i2c_algo -ffffffff82cc1438 r sienna_cichlid_i2c_control_quirks -ffffffff82cc1450 r sienna_cichlid_throttler_map -ffffffff82cc2000 r smu_v11_0_irq_funcs -ffffffff82cc2010 r link_width -ffffffff82cc3000 r vangogh_ppt_funcs -ffffffff82cc33d0 r vangogh_throttler_map -ffffffff82cc4000 r renoir_ppt_funcs -ffffffff82cc43d0 r renoir_throttler_map -ffffffff82cc5000 r aldebaran_ppt_funcs -ffffffff82cc53d0 r aldebaran_clk_map -ffffffff82cc5490 r aldebaran_table_map -ffffffff82cc5510 r smu13_thermal_policy -ffffffff82cc5568 r aldebaran_i2c_algo -ffffffff82cc5578 r aldebaran_i2c_control_quirks -ffffffff82cc5590 r aldebaran_throttler_map -ffffffff82cc55b0 r aldebaran_message_map -ffffffff82cc6000 r aldebaran_feature_mask_map -ffffffff82cc7000 r smu_v13_0_irq_funcs -ffffffff82cc7010 r link_width -ffffffff82cc8000 r smu_v13_0_0_ppt_funcs -ffffffff82cc83d0 r smu13_thermal_policy -ffffffff82cc8428 r smu_v13_0_0_i2c_algo -ffffffff82cc8438 r smu_v13_0_0_i2c_control_quirks -ffffffff82cc8450 r smu_v13_0_0_throttler_map -ffffffff82cc9000 r smu_v13_0_4_ppt_funcs -ffffffff82cca000 r smu_v13_0_5_ppt_funcs -ffffffff82ccb000 r smu_v13_0_7_ppt_funcs -ffffffff82ccb3d0 r smu13_thermal_policy -ffffffff82ccb430 r smu_v13_0_7_throttler_map -ffffffff82ccc000 r yellow_carp_ppt_funcs -ffffffff82ccd000 r __smu_message_names -ffffffff82cce000 R pchb_ca -ffffffff82ccf000 R amas_ca -ffffffff82ccf028 R amas_devices -ffffffff82ccf040 r amas_feature -ffffffff82cd0000 R cardslot_ca -ffffffff82cd1000 R cardbus_ca -ffffffff82cd2000 R com_cardbus_ca -ffffffff82cd3000 R xl_cardbus_ca -ffffffff82cd3030 R xl_cardbus_products -ffffffff82cd4000 R dc_cardbus_ca -ffffffff82cd4030 R dc_cardbus_devices -ffffffff82cd5000 R fxp_cardbus_ca -ffffffff82cd5028 R fxp_cardbus_devices -ffffffff82cd6000 R rl_cardbus_devices -ffffffff82cd6028 R rl_cardbus_ca -ffffffff82cd7000 R re_cardbus_ca -ffffffff82cd7028 R re_cardbus_devices -ffffffff82cd8000 R ath_cardbus_ca -ffffffff82cd9000 R athn_cardbus_ca -ffffffff82cd9030 r athn_cardbus_devices -ffffffff82cda000 R atw_cardbus_ca -ffffffff82cda028 R atw_cardbus_devices -ffffffff82cdb000 R rtw_cardbus_ca -ffffffff82cdb028 R rtw_cardbus_devices -ffffffff82cdc000 R ral_cardbus_ca -ffffffff82cdc030 r ral_cardbus_devices -ffffffff82cdd000 R acx_cardbus_ca -ffffffff82cdd028 r acx_cardbus_devices -ffffffff82cde000 R pgt_cardbus_ca -ffffffff82cde028 R pgt_cardbus_devices -ffffffff82cdf000 R ehci_cardbus_ca -ffffffff82ce0000 R ohci_cardbus_ca -ffffffff82ce1000 R uhci_cardbus_ca -ffffffff82ce2000 R malo_cardbus_ca -ffffffff82ce2028 r malo_cardbus_devices -ffffffff82ce3000 R bwi_cardbus_ca -ffffffff82ce3030 r bwi_cardbus_devices -ffffffff82ce4000 R pcmcia_ca -ffffffff82ce5000 r pcmcia_parse_cis_tuple.init_cfe -ffffffff82ce6000 r pcmcia_cis_quirks -ffffffff82ce7000 R ep_pcmcia_ca -ffffffff82ce8000 R ne_pcmcia_ca -ffffffff82ce8030 R ne2000devs -ffffffff82cea000 R aic_pcmcia_ca -ffffffff82ceb000 R com_pcmcia_ca -ffffffff82cec000 R wdc_pcmcia_ca -ffffffff82ced000 R sm_pcmcia_ca -ffffffff82cee000 R xe_pcmcia_ca -ffffffff82cef000 R wi_pcmcia_ca -ffffffff82cef030 r wi_pcmcia_products -ffffffff82cf0000 R malo_pcmcia_ca -ffffffff82cf1000 R an_pcmcia_ca -ffffffff82cf2000 R pcib_ca -ffffffff82cf3000 R amdpcib_ca -ffffffff82cf3028 R amdpcib_devices -ffffffff82cf4000 R tcpcib_ca -ffffffff82cf4028 R tcpcib_devices -ffffffff82cf5000 R aapic_ca -ffffffff82cf6000 R hme_pci_ca -ffffffff82cf6028 r hme_promhdr -ffffffff82cf602a r hme_promdat -ffffffff82cf7000 R isa_ca -ffffffff82cf8000 R isadma_ca -ffffffff82cf9000 R fdc_ca -ffffffff82cfa000 R fd_ca -ffffffff82cfb000 R com_isa_ca -ffffffff82cfc000 R pckbc_isa_ca -ffffffff82cfd000 R vga_isa_ca -ffffffff82cfe000 R wdc_isa_ca -ffffffff82cff000 R mpu_midi_hw_if -ffffffff82d00000 R mpu_isa_ca -ffffffff82d01000 R pcppi_ca -ffffffff82d02000 R spkr_ca -ffffffff82d02030 r pitchtab -ffffffff82d03000 R lpt_isa_ca -ffffffff82d04000 R wbsio_ca -ffffffff82d05000 R schsio_ca -ffffffff82d06000 R lm_isa_ca -ffffffff82d06028 R lm_wbsio_ca -ffffffff82d07000 R it_sensors -ffffffff82d07110 R it_vrfact -ffffffff82d07140 R it_fan_regs -ffffffff82d07160 R it_fan_ext_regs -ffffffff82d07178 R it_ca -ffffffff82d08000 R abitkv_sensors -ffffffff82d08200 R abitaa_sensors -ffffffff82d08480 R abitav_sensors -ffffffff82d08700 R abitas_sensors -ffffffff82d08980 R abitax_sensors -ffffffff82d08bc0 R abitm4_sensors -ffffffff82d08e80 R abitan_sensors -ffffffff82d09120 R abital_sensors -ffffffff82d093a0 R abitaw_sensors -ffffffff82d09700 R abitni_sensors -ffffffff82d099a0 R abitat_sensors -ffffffff82d09cc0 R abitan2_sensors -ffffffff82d09f60 R abitab_sensors -ffffffff82d0a220 R abitan3_sensors -ffffffff82d0a500 R abitaw2_sensors -ffffffff82d0a860 R abitat2_sensors -ffffffff82d0ab60 R abitab2_sensors -ffffffff82d0aea0 R abitin_sensors -ffffffff82d0b1e0 R uguru_ca -ffffffff82d0c000 R aps_ca -ffffffff82d0d000 R wsdisplay_emul_ca -ffffffff82d0d030 r charClass -ffffffff82d0e000 r usl_syncops -ffffffff82d0f000 R wsevent_filtops -ffffffff82d10000 R wskbd_ca -ffffffff82d11000 r latin1_to_upper -ffffffff82d12000 R wsmouse_ca -ffffffff82d13000 R cyrillic_to_koi8 -ffffffff82d13060 R unicode_to_latin2 -ffffffff82d130e0 R unicode_to_latin7 -ffffffff82d14000 R wsemul_vt100_ops -ffffffff82d15000 r decspcgr2uni -ffffffff82d15100 r dectech2uni -ffffffff82d15200 r nrctable -ffffffff82d16000 r vt100_fkeys -ffffffff82d160c0 r vt100_pfkeys -ffffffff82d160e0 r vt100_numpad -ffffffff82d17000 R pckbd_ca -ffffffff82d17028 R pckbd_accessops -ffffffff82d17040 R pckbd_consops -ffffffff82d17060 R pckbd_keymapdata -ffffffff82d17070 R pckbd_xtbl2 -ffffffff82d17100 R pckbd_xtbl2_ext -ffffffff82d18000 r pckbd_keydesc_us -ffffffff82d18250 r pckbd_keydesc_de -ffffffff82d182f0 r pckbd_keydesc_de_nodead -ffffffff82d18310 r pckbd_keydesc_fr -ffffffff82d183d0 r pckbd_keydesc_fr_dvorak_bepo -ffffffff82d18510 r pckbd_keydesc_dk -ffffffff82d185a0 r pckbd_keydesc_dk_nodead -ffffffff82d185b0 r pckbd_keydesc_it -ffffffff82d18640 r pckbd_keydesc_uk -ffffffff82d186e0 r pckbd_keydesc_jp -ffffffff82d18750 r pckbd_keydesc_sv -ffffffff82d18780 r pckbd_keydesc_sv_nodead -ffffffff82d18790 r pckbd_keydesc_no -ffffffff82d187c0 r pckbd_keydesc_no_nodead -ffffffff82d187d0 r pckbd_keydesc_us_declk -ffffffff82d18860 r pckbd_keydesc_us_dvorak -ffffffff82d18900 r pckbd_keydesc_us_colemak -ffffffff82d18948 r pckbd_keydesc_swapctrlcaps -ffffffff82d18960 r pckbd_keydesc_iopener -ffffffff82d189b0 r pckbd_keydesc_es -ffffffff82d18a50 r pckbd_keydesc_be -ffffffff82d18b10 r pckbd_keydesc_ru -ffffffff82d18c80 r pckbd_keydesc_ua -ffffffff82d18e10 r pckbd_keydesc_sg -ffffffff82d18ec0 r pckbd_keydesc_sg_nodead -ffffffff82d18ee0 r pckbd_keydesc_sf -ffffffff82d18f00 r pckbd_keydesc_pt -ffffffff82d18f90 r pckbd_keydesc_lt -ffffffff82d19070 r pckbd_keydesc_la -ffffffff82d19100 r pckbd_keydesc_br -ffffffff82d19180 r pckbd_keydesc_tr -ffffffff82d19230 r pckbd_keydesc_tr_nodead -ffffffff82d19250 r pckbd_keydesc_pl -ffffffff82d192b0 r pckbd_keydesc_hu -ffffffff82d193c0 r pckbd_keydesc_si -ffffffff82d194d0 r pckbd_keydesc_cf -ffffffff82d195a0 r pckbd_keydesc_cf_nodead -ffffffff82d195c0 r pckbd_keydesc_lv -ffffffff82d19640 r pckbd_keydesc_nl -ffffffff82d19720 r pckbd_keydesc_nl_nodead -ffffffff82d19740 r pckbd_keydesc_is -ffffffff82d197cc r pckbd_keydesc_is_nodead -ffffffff82d197e0 r pckbd_keydesc_ee -ffffffff82d19890 r pckbd_keydesc_ee_nodead -ffffffff82d198b0 R pckbd_keydesctab -ffffffff82d1a000 R pms_ca -ffffffff82d1a028 R pms_accessops -ffffffff82d1a040 R pms_sec_accessops -ffffffff82d1a060 R pms_protocols -ffffffff82d1a1e0 r alps_models -ffffffff82d1b000 R skgpio_led_offset -ffffffff82d1b008 R skgpio_ca -ffffffff82d1c000 R hidkbd_trtab -ffffffff82d1c100 r apple_fn_trans -ffffffff82d1c120 r apple_tb_trans -ffffffff82d1c140 r apple_mba_trans -ffffffff82d1d000 r hidcc_attach_wskbd.accessops -ffffffff82d1d020 r hidcc_keysyms -ffffffff82d1e000 R usb_ca -ffffffff82d1f000 R usb_known_products -ffffffff82d2af90 R usb_known_vendors -ffffffff82d2d7b0 R usbd_error_strs -ffffffff82d2e000 R usb_quirks -ffffffff82d2e390 R usb_dev_quirks -ffffffff82d2e398 R usbd_no_quirk -ffffffff82d2f000 R uhub_ca -ffffffff82d2f028 R uhub_uhub_ca -ffffffff82d30000 R uaudio_ca -ffffffff82d30028 R uaudio_hw_if -ffffffff82d300e0 R uaudio_rates -ffffffff82d30120 r uaudio_clkname.names -ffffffff82d30140 r uaudio_feature_addent.features -ffffffff82d31000 R uvideo_ca -ffffffff82d31028 R uvideo_hw_if -ffffffff82d31100 R uvideo_devs -ffffffff82d32000 r utvfu_select_norm.pal -ffffffff82d32040 r utvfu_select_norm.ntsc -ffffffff82d32080 r utvfu_setup_capture.setup -ffffffff82d32180 r utvfu_audio_start_chip.setup -ffffffff82d321c8 r utvfu_audio_stop_chip.setup -ffffffff82d321d8 R utvfu_ca -ffffffff82d32200 R utvfu_vid_hw_if -ffffffff82d322d0 R utvfu_au_hw_if -ffffffff82d33000 R udl_ca -ffffffff82d33030 r udl_devs -ffffffff82d330b0 r udl_modes -ffffffff82d34000 R umidi_hw_if -ffffffff82d34030 R umidi_ca -ffffffff82d34060 r umidi_evlen -ffffffff82d34080 r packet_length -ffffffff82d35000 r quirk_name -ffffffff82d36000 R ucom_ca -ffffffff82d37000 R ugen_ca -ffffffff82d37028 R ugenread_intr_filtops -ffffffff82d37058 R ugenread_isoc_filtops -ffffffff82d38000 R uhidev_ca -ffffffff82d38030 r uhid_graphire_report_descr -ffffffff82d380b0 r uhid_graphire3_4x5_report_descr -ffffffff82d38160 r uhid_xb360gp_report_descr -ffffffff82d38210 r uhid_xbonegp_report_descr -ffffffff82d39000 R uhid_ca -ffffffff82d39028 R uhidread_filtops -ffffffff82d3a000 R fido_ca -ffffffff82d3b000 R ujoy_ca -ffffffff82d3c000 r ukbd_keydesc_us -ffffffff82d3c2a0 r ukbd_keydesc_de -ffffffff82d3c350 r ukbd_keydesc_de_nodead -ffffffff82d3c370 r ukbd_keydesc_fr -ffffffff82d3c430 r ukbd_keydesc_fr_apple -ffffffff82d3c570 r ukbd_keydesc_fr_dvorak_bepo -ffffffff82d3c6b0 r ukbd_keydesc_dk -ffffffff82d3c750 r ukbd_keydesc_dk_nodead -ffffffff82d3c760 r ukbd_keydesc_it -ffffffff82d3c800 r ukbd_keydesc_uk -ffffffff82d3c8b0 r ukbd_keydesc_jp -ffffffff82d3c920 r ukbd_keydesc_sv -ffffffff82d3c950 r ukbd_keydesc_sv_nodead -ffffffff82d3c960 r ukbd_keydesc_no -ffffffff82d3c990 r ukbd_keydesc_no_nodead -ffffffff82d3c9a0 r ukbd_keydesc_us_dvorak -ffffffff82d3ca40 r ukbd_keydesc_us_colemak -ffffffff82d3ca88 r ukbd_keydesc_swapctrlcaps -ffffffff82d3caa0 r ukbd_keydesc_iopener -ffffffff82d3caf0 r ukbd_keydesc_es -ffffffff82d3cb90 r ukbd_keydesc_be -ffffffff82d3cc50 r ukbd_keydesc_ru -ffffffff82d3cdc0 r ukbd_keydesc_ua -ffffffff82d3cf60 r ukbd_keydesc_sg -ffffffff82d3d020 r ukbd_keydesc_sg_nodead -ffffffff82d3d040 r ukbd_keydesc_sf -ffffffff82d3d060 r ukbd_keydesc_pt -ffffffff82d3d0f0 r ukbd_keydesc_pt_apple -ffffffff82d3d110 r ukbd_keydesc_lt -ffffffff82d3d1f0 r ukbd_keydesc_la -ffffffff82d3d290 r ukbd_keydesc_br -ffffffff82d3d320 r ukbd_keydesc_tr -ffffffff82d3d3e0 r ukbd_keydesc_tr_nodead -ffffffff82d3d400 r ukbd_keydesc_pl -ffffffff82d3d460 r ukbd_keydesc_hu -ffffffff82d3d570 r ukbd_keydesc_si -ffffffff82d3d690 r ukbd_keydesc_cf -ffffffff82d3d770 r ukbd_keydesc_cf_nodead -ffffffff82d3d790 r ukbd_keydesc_lv -ffffffff82d3d810 r ukbd_keydesc_nl -ffffffff82d3d8f0 r ukbd_keydesc_nl_nodead -ffffffff82d3d910 r ukbd_keydesc_is -ffffffff82d3d9a4 r ukbd_keydesc_is_nodead -ffffffff82d3d9b0 r ukbd_keydesc_ee -ffffffff82d3da60 r ukbd_keydesc_ee_nodead -ffffffff82d3da80 R ukbd_keydesctab -ffffffff82d3e000 R ukbd_countrylayout -ffffffff82d3e090 R ukbd_consops -ffffffff82d3e0b0 R ukbd_accessops -ffffffff82d3e0c8 R ukbd_ca -ffffffff82d3e0f0 R ukbd_never_console -ffffffff82d3f000 R ums_accessops -ffffffff82d3f018 R ums_ca -ffffffff82d40000 R umt_accessops -ffffffff82d40018 R umt_ca -ffffffff82d41000 R uts_devs -ffffffff82d41010 R uts_accessops -ffffffff82d41028 R uts_ca -ffffffff82d42000 R ubcmtp_accessops -ffffffff82d42018 R ubcmtp_ca -ffffffff82d42040 r ubcmtp_devices -ffffffff82d43000 R ucycom_methods -ffffffff82d43040 R ucycom_devs -ffffffff82d43050 R ucycom_ca -ffffffff82d44000 R uslhcom_methods -ffffffff82d44040 R uslhcom_ca -ffffffff82d44068 r uslhcom_devs -ffffffff82d45000 R ulpt_ca -ffffffff82d46000 R umass_ca -ffffffff82d46028 R umass_bbb_methods -ffffffff82d46040 R umass_cbi_methods -ffffffff82d47000 R umass_quirks -ffffffff82d48000 R umass_scsi_switch -ffffffff82d49000 R uthum_devs -ffffffff82d49008 R uthum_ca -ffffffff82d49030 r uthum_sensor_type_s -ffffffff82d4a000 R ugold_devs -ffffffff82d4a018 R ugold_ca -ffffffff82d4b000 R utrh_devs -ffffffff82d4b008 R utrh_ca -ffffffff82d4c000 R uoakrh_devs -ffffffff82d4c008 R uoakrh_ca -ffffffff82d4c030 R uoakrh_methods -ffffffff82d4d000 R uoaklux_devs -ffffffff82d4d008 R uoaklux_ca -ffffffff82d4d030 R uoaklux_methods -ffffffff82d4e000 R uoakv_devs -ffffffff82d4e008 R uoakv_ca -ffffffff82d4e030 R uoakv_methods -ffffffff82d4f000 R uonerng_ca -ffffffff82d50000 R urng_ca -ffffffff82d50030 r urng_devs -ffffffff82d51000 R udcf_ca -ffffffff82d51028 r udcf_devs -ffffffff82d52000 R umbg_ca -ffffffff82d53000 R uvisor_methods -ffffffff82d53040 R uvisor_ca -ffffffff82d53070 r uvisor_devs -ffffffff82d54000 R udsbr_hw_if -ffffffff82d54028 R udsbr_ca -ffffffff82d55000 R utwitch_devs -ffffffff82d55008 R utwitch_ca -ffffffff82d56000 R aue_devs -ffffffff82d561b0 R aue_ca -ffffffff82d57000 R axe_devs -ffffffff82d570d0 R axe_ca -ffffffff82d58000 R axen_devs -ffffffff82d58020 R axen_ca -ffffffff82d59000 R smsc_ca -ffffffff82d59030 r smsc_devs -ffffffff82d5a000 R cue_ca -ffffffff82d5b000 R kue_devs -ffffffff82d5b088 R kue_ca -ffffffff82d5c000 R cdce_devs -ffffffff82d5c048 R cdce_ca -ffffffff82d5d000 R urndis_ca -ffffffff82d5d030 R urndis_class -ffffffff82d5e000 R mos_devs -ffffffff82d5e018 R mos_ca -ffffffff82d5f000 R mue_devs -ffffffff82d5f020 R mue_ca -ffffffff82d60000 R udav_ca -ffffffff82d60030 r udav_devs -ffffffff82d61000 R upl_ca -ffffffff82d62000 R ugl_ca -ffffffff82d63000 R url_ca -ffffffff82d63030 r url_devs -ffffffff82d64000 R ure_devs -ffffffff82d640e8 R ure_ca -ffffffff82d65000 R uaq_devs -ffffffff82d65018 R uaq_ca -ffffffff82d66000 R umodem_methods -ffffffff82d66040 R umodem_ca -ffffffff82d67000 R uftdi_methods -ffffffff82d67040 R uftdi_ca -ffffffff82d67070 r uftdi_devs -ffffffff82d68000 R uplcom_methods -ffffffff82d68040 R uplcom_ca -ffffffff82d68070 r uplcom_devs -ffffffff82d69000 R umct_methods -ffffffff82d69040 R umct_ca -ffffffff82d69070 r umct_devs -ffffffff82d6a000 R uvscom_methods -ffffffff82d6a040 R uvscom_ca -ffffffff82d6a070 r uvscom_devs -ffffffff82d6b000 R ubsa_methods -ffffffff82d6b040 R ubsa_devs -ffffffff82d6b060 R ubsa_ca -ffffffff82d6c000 R ukspan_ca -ffffffff82d6c028 r ukspan_devs -ffffffff82d6c030 r ukspan_methods -ffffffff82d6d000 R uslcom_methods -ffffffff82d6d040 R uslcom_ca -ffffffff82d6d070 r uslcom_devs -ffffffff82d6e000 R uark_methods -ffffffff82d6e040 R uark_ca -ffffffff82d6e068 r uark_devs -ffffffff82d6f000 R moscom_methods -ffffffff82d6f040 R moscom_ca -ffffffff82d6f068 r moscom_devs -ffffffff82d70000 R umcs_methods -ffffffff82d70040 R umcs_devs -ffffffff82d70050 R umcs_ca -ffffffff82d71000 R uscom_methods -ffffffff82d71040 R uscom_ca -ffffffff82d71068 r uscom_devs -ffffffff82d72000 R ucrcom_methods -ffffffff82d72040 R ucrcom_ca -ffffffff82d73000 R uxrcom_methods -ffffffff82d73040 R uxrcom_ca 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vega20_smu_funcs +ffffffff82cba000 R vegam_smu_funcs +ffffffff82cba0e0 r vegam_power_tune_data_set_array +ffffffff82cba130 r Range_Table +ffffffff82cbb000 R smu_ip_funcs +ffffffff82cbb0a0 R smu_v11_0_ip_block +ffffffff82cbb0b8 R smu_v12_0_ip_block +ffffffff82cbb0d0 R smu_v13_0_ip_block +ffffffff82cbb0e8 r swsmu_pm_funcs +ffffffff82cbc000 r arcturus_ppt_funcs +ffffffff82cbc3d0 r arcturus_table_map +ffffffff82cbc450 r arcturus_pwr_src_map +ffffffff82cbc460 r arcturus_workload_map +ffffffff82cbc4a0 r smu11_thermal_policy +ffffffff82cbc4f8 r arcturus_i2c_algo +ffffffff82cbc508 r arcturus_i2c_control_quirks +ffffffff82cbc520 r arcturus_throttler_map +ffffffff82cbc540 r arcturus_message_map +ffffffff82cbcf90 r arcturus_clk_map +ffffffff82cbd050 r arcturus_feature_mask_map +ffffffff82cbe000 r cyan_skillfish_ppt_funcs +ffffffff82cbf000 r navi10_ppt_funcs +ffffffff82cbf3d0 r smu11_thermal_policy +ffffffff82cbf428 r navi10_i2c_algo +ffffffff82cbf438 r navi10_i2c_control_quirks +ffffffff82cbf450 r navi1x_throttler_map +ffffffff82cbf470 r NoDbiPrbs7 +ffffffff82cc0470 r DbiPrbs7 +ffffffff82cc2000 r sienna_cichlid_ppt_funcs +ffffffff82cc23d0 r smu11_thermal_policy +ffffffff82cc2428 r sienna_cichlid_i2c_algo +ffffffff82cc2438 r sienna_cichlid_i2c_control_quirks +ffffffff82cc2450 r sienna_cichlid_throttler_map +ffffffff82cc3000 r smu_v11_0_irq_funcs +ffffffff82cc3010 r link_width +ffffffff82cc4000 r vangogh_ppt_funcs +ffffffff82cc43d0 r vangogh_throttler_map +ffffffff82cc5000 r renoir_ppt_funcs +ffffffff82cc53d0 r renoir_throttler_map +ffffffff82cc6000 r aldebaran_ppt_funcs +ffffffff82cc63d0 r aldebaran_clk_map +ffffffff82cc6490 r aldebaran_table_map +ffffffff82cc6510 r smu13_thermal_policy +ffffffff82cc6568 r aldebaran_i2c_algo +ffffffff82cc6578 r aldebaran_i2c_control_quirks +ffffffff82cc6590 r aldebaran_throttler_map +ffffffff82cc65b0 r aldebaran_message_map +ffffffff82cc7000 r aldebaran_feature_mask_map +ffffffff82cc8000 r smu_v13_0_irq_funcs +ffffffff82cc8010 r link_width +ffffffff82cc9000 r smu_v13_0_0_ppt_funcs +ffffffff82cc93d0 r smu13_thermal_policy +ffffffff82cc9428 r smu_v13_0_0_i2c_algo +ffffffff82cc9438 r smu_v13_0_0_i2c_control_quirks +ffffffff82cc9450 r smu_v13_0_0_throttler_map +ffffffff82cca000 r smu_v13_0_4_ppt_funcs +ffffffff82ccb000 r smu_v13_0_5_ppt_funcs +ffffffff82ccc000 r smu_v13_0_7_ppt_funcs +ffffffff82ccc3d0 r smu13_thermal_policy +ffffffff82ccc430 r smu_v13_0_7_throttler_map +ffffffff82ccd000 r yellow_carp_ppt_funcs +ffffffff82cce000 r __smu_message_names +ffffffff82ccf000 R pchb_ca +ffffffff82cd0000 R amas_ca +ffffffff82cd0028 R amas_devices +ffffffff82cd0040 r amas_feature +ffffffff82cd1000 R cardslot_ca +ffffffff82cd2000 R cardbus_ca +ffffffff82cd3000 R com_cardbus_ca +ffffffff82cd4000 R xl_cardbus_ca +ffffffff82cd4030 R xl_cardbus_products +ffffffff82cd5000 R dc_cardbus_ca +ffffffff82cd5030 R dc_cardbus_devices +ffffffff82cd6000 R fxp_cardbus_ca +ffffffff82cd6028 R fxp_cardbus_devices +ffffffff82cd7000 R rl_cardbus_devices +ffffffff82cd7028 R rl_cardbus_ca +ffffffff82cd8000 R re_cardbus_ca +ffffffff82cd8028 R re_cardbus_devices +ffffffff82cd9000 R ath_cardbus_ca +ffffffff82cda000 R athn_cardbus_ca +ffffffff82cda030 r athn_cardbus_devices +ffffffff82cdb000 R atw_cardbus_ca +ffffffff82cdb028 R atw_cardbus_devices +ffffffff82cdc000 R rtw_cardbus_ca +ffffffff82cdc028 R rtw_cardbus_devices +ffffffff82cdd000 R ral_cardbus_ca +ffffffff82cdd030 r ral_cardbus_devices +ffffffff82cde000 R acx_cardbus_ca +ffffffff82cde028 r acx_cardbus_devices +ffffffff82cdf000 R pgt_cardbus_ca +ffffffff82cdf028 R pgt_cardbus_devices +ffffffff82ce0000 R ehci_cardbus_ca +ffffffff82ce1000 R ohci_cardbus_ca +ffffffff82ce2000 R uhci_cardbus_ca +ffffffff82ce3000 R malo_cardbus_ca +ffffffff82ce3028 r malo_cardbus_devices +ffffffff82ce4000 R bwi_cardbus_ca +ffffffff82ce4030 r bwi_cardbus_devices +ffffffff82ce5000 R pcmcia_ca +ffffffff82ce6000 r pcmcia_parse_cis_tuple.init_cfe +ffffffff82ce7000 r pcmcia_cis_quirks +ffffffff82ce8000 R ep_pcmcia_ca +ffffffff82ce9000 R ne_pcmcia_ca +ffffffff82ce9030 R ne2000devs +ffffffff82ceb000 R aic_pcmcia_ca +ffffffff82cec000 R com_pcmcia_ca +ffffffff82ced000 R wdc_pcmcia_ca +ffffffff82cee000 R sm_pcmcia_ca +ffffffff82cef000 R xe_pcmcia_ca +ffffffff82cf0000 R wi_pcmcia_ca +ffffffff82cf0030 r wi_pcmcia_products +ffffffff82cf1000 R malo_pcmcia_ca +ffffffff82cf2000 R an_pcmcia_ca +ffffffff82cf3000 R pcib_ca +ffffffff82cf4000 R amdpcib_ca +ffffffff82cf4028 R amdpcib_devices +ffffffff82cf5000 R tcpcib_ca +ffffffff82cf5028 R tcpcib_devices +ffffffff82cf6000 R aapic_ca +ffffffff82cf7000 R hme_pci_ca +ffffffff82cf7028 r hme_promhdr +ffffffff82cf702a r hme_promdat +ffffffff82cf8000 R isa_ca +ffffffff82cf9000 R isadma_ca +ffffffff82cfa000 R fdc_ca +ffffffff82cfb000 R fd_ca +ffffffff82cfc000 R com_isa_ca +ffffffff82cfd000 R pckbc_isa_ca +ffffffff82cfe000 R vga_isa_ca +ffffffff82cff000 R wdc_isa_ca +ffffffff82d00000 R mpu_midi_hw_if +ffffffff82d01000 R mpu_isa_ca +ffffffff82d02000 R pcppi_ca +ffffffff82d03000 R spkr_ca +ffffffff82d03030 r pitchtab +ffffffff82d04000 R lpt_isa_ca +ffffffff82d05000 R wbsio_ca +ffffffff82d06000 R schsio_ca +ffffffff82d07000 R lm_isa_ca +ffffffff82d07028 R lm_wbsio_ca +ffffffff82d08000 R it_sensors +ffffffff82d08110 R it_vrfact +ffffffff82d08140 R it_fan_regs +ffffffff82d08160 R it_fan_ext_regs +ffffffff82d08178 R it_ca +ffffffff82d09000 R abitkv_sensors +ffffffff82d09200 R abitaa_sensors +ffffffff82d09480 R abitav_sensors +ffffffff82d09700 R abitas_sensors +ffffffff82d09980 R abitax_sensors +ffffffff82d09bc0 R abitm4_sensors +ffffffff82d09e80 R abitan_sensors +ffffffff82d0a120 R abital_sensors +ffffffff82d0a3a0 R abitaw_sensors +ffffffff82d0a700 R abitni_sensors +ffffffff82d0a9a0 R abitat_sensors +ffffffff82d0acc0 R abitan2_sensors +ffffffff82d0af60 R abitab_sensors +ffffffff82d0b220 R abitan3_sensors +ffffffff82d0b500 R abitaw2_sensors +ffffffff82d0b860 R abitat2_sensors +ffffffff82d0bb60 R abitab2_sensors +ffffffff82d0bea0 R abitin_sensors +ffffffff82d0c1e0 R uguru_ca +ffffffff82d0d000 R aps_ca +ffffffff82d0e000 R wsdisplay_emul_ca +ffffffff82d0e030 r charClass +ffffffff82d0f000 r usl_syncops +ffffffff82d10000 R wsevent_filtops +ffffffff82d11000 R wskbd_ca +ffffffff82d12000 r latin1_to_upper +ffffffff82d13000 R wsmouse_ca +ffffffff82d14000 R cyrillic_to_koi8 +ffffffff82d14060 R unicode_to_latin2 +ffffffff82d140e0 R unicode_to_latin7 +ffffffff82d15000 R wsemul_vt100_ops +ffffffff82d16000 r decspcgr2uni +ffffffff82d16100 r dectech2uni +ffffffff82d16200 r nrctable +ffffffff82d17000 r vt100_fkeys +ffffffff82d170c0 r vt100_pfkeys +ffffffff82d170e0 r vt100_numpad +ffffffff82d18000 R pckbd_ca +ffffffff82d18028 R pckbd_accessops +ffffffff82d18040 R pckbd_consops +ffffffff82d18060 R pckbd_keymapdata +ffffffff82d18070 R pckbd_xtbl2 +ffffffff82d18100 R pckbd_xtbl2_ext +ffffffff82d19000 r pckbd_keydesc_us +ffffffff82d19250 r pckbd_keydesc_de +ffffffff82d192f0 r pckbd_keydesc_de_nodead +ffffffff82d19310 r pckbd_keydesc_fr +ffffffff82d193d0 r pckbd_keydesc_fr_dvorak_bepo +ffffffff82d19510 r pckbd_keydesc_dk +ffffffff82d195a0 r pckbd_keydesc_dk_nodead +ffffffff82d195b0 r pckbd_keydesc_it +ffffffff82d19640 r pckbd_keydesc_uk +ffffffff82d196e0 r pckbd_keydesc_jp +ffffffff82d19750 r pckbd_keydesc_sv +ffffffff82d19780 r pckbd_keydesc_sv_nodead +ffffffff82d19790 r pckbd_keydesc_no +ffffffff82d197c0 r pckbd_keydesc_no_nodead +ffffffff82d197d0 r pckbd_keydesc_us_declk +ffffffff82d19860 r pckbd_keydesc_us_dvorak +ffffffff82d19900 r pckbd_keydesc_us_colemak +ffffffff82d19948 r pckbd_keydesc_swapctrlcaps +ffffffff82d19960 r pckbd_keydesc_iopener +ffffffff82d199b0 r pckbd_keydesc_es +ffffffff82d19a50 r pckbd_keydesc_be +ffffffff82d19b10 r pckbd_keydesc_ru +ffffffff82d19c80 r pckbd_keydesc_ua +ffffffff82d19e10 r pckbd_keydesc_sg +ffffffff82d19ec0 r pckbd_keydesc_sg_nodead +ffffffff82d19ee0 r pckbd_keydesc_sf +ffffffff82d19f00 r pckbd_keydesc_pt +ffffffff82d19f90 r pckbd_keydesc_lt +ffffffff82d1a070 r pckbd_keydesc_la +ffffffff82d1a100 r pckbd_keydesc_br +ffffffff82d1a180 r pckbd_keydesc_tr +ffffffff82d1a230 r pckbd_keydesc_tr_nodead +ffffffff82d1a250 r pckbd_keydesc_pl +ffffffff82d1a2b0 r pckbd_keydesc_hu +ffffffff82d1a3c0 r pckbd_keydesc_si +ffffffff82d1a4d0 r pckbd_keydesc_cf +ffffffff82d1a5a0 r pckbd_keydesc_cf_nodead +ffffffff82d1a5c0 r pckbd_keydesc_lv +ffffffff82d1a640 r pckbd_keydesc_nl +ffffffff82d1a720 r pckbd_keydesc_nl_nodead +ffffffff82d1a740 r pckbd_keydesc_is +ffffffff82d1a7cc r pckbd_keydesc_is_nodead +ffffffff82d1a7e0 r pckbd_keydesc_ee +ffffffff82d1a890 r pckbd_keydesc_ee_nodead +ffffffff82d1a8b0 R pckbd_keydesctab +ffffffff82d1b000 R pms_ca +ffffffff82d1b028 R pms_accessops +ffffffff82d1b040 R pms_sec_accessops +ffffffff82d1b060 R pms_protocols +ffffffff82d1b1e0 r alps_models +ffffffff82d1c000 R skgpio_led_offset +ffffffff82d1c008 R skgpio_ca +ffffffff82d1d000 R hidkbd_trtab +ffffffff82d1d100 r apple_fn_trans +ffffffff82d1d120 r apple_tb_trans +ffffffff82d1d140 r apple_mba_trans +ffffffff82d1e000 r hidcc_attach_wskbd.accessops +ffffffff82d1e020 r hidcc_keysyms +ffffffff82d1f000 R usb_ca +ffffffff82d20000 R usb_known_products +ffffffff82d2bf90 R usb_known_vendors +ffffffff82d2e7b0 R usbd_error_strs +ffffffff82d2f000 R usb_quirks +ffffffff82d2f390 R usb_dev_quirks +ffffffff82d2f398 R usbd_no_quirk +ffffffff82d30000 R uhub_ca +ffffffff82d30028 R uhub_uhub_ca +ffffffff82d31000 R uaudio_ca +ffffffff82d31028 R uaudio_hw_if +ffffffff82d310e0 R uaudio_rates +ffffffff82d31120 r uaudio_clkname.names +ffffffff82d31140 r uaudio_feature_addent.features +ffffffff82d32000 R uvideo_ca +ffffffff82d32028 R uvideo_hw_if +ffffffff82d32100 R uvideo_devs +ffffffff82d33000 r utvfu_select_norm.pal +ffffffff82d33040 r utvfu_select_norm.ntsc +ffffffff82d33080 r utvfu_setup_capture.setup +ffffffff82d33180 r utvfu_audio_start_chip.setup +ffffffff82d331c8 r utvfu_audio_stop_chip.setup +ffffffff82d331d8 R utvfu_ca +ffffffff82d33200 R utvfu_vid_hw_if +ffffffff82d332d0 R utvfu_au_hw_if +ffffffff82d34000 R udl_ca +ffffffff82d34030 r udl_devs +ffffffff82d340b0 r udl_modes +ffffffff82d35000 R umidi_hw_if +ffffffff82d35030 R umidi_ca +ffffffff82d35060 r umidi_evlen +ffffffff82d35080 r packet_length +ffffffff82d36000 r quirk_name +ffffffff82d37000 R ucom_ca +ffffffff82d38000 R ugen_ca +ffffffff82d38028 R ugenread_intr_filtops +ffffffff82d38058 R ugenread_isoc_filtops +ffffffff82d39000 R uhidev_ca +ffffffff82d39030 r uhid_graphire_report_descr +ffffffff82d390b0 r uhid_graphire3_4x5_report_descr +ffffffff82d39160 r uhid_xb360gp_report_descr +ffffffff82d39210 r uhid_xbonegp_report_descr +ffffffff82d3a000 R uhid_ca +ffffffff82d3a028 R uhidread_filtops +ffffffff82d3b000 R fido_ca +ffffffff82d3c000 R ujoy_ca +ffffffff82d3d000 r ukbd_keydesc_us +ffffffff82d3d2a0 r ukbd_keydesc_de +ffffffff82d3d350 r ukbd_keydesc_de_nodead +ffffffff82d3d370 r ukbd_keydesc_fr +ffffffff82d3d430 r ukbd_keydesc_fr_apple +ffffffff82d3d570 r ukbd_keydesc_fr_dvorak_bepo +ffffffff82d3d6b0 r ukbd_keydesc_dk +ffffffff82d3d750 r ukbd_keydesc_dk_nodead +ffffffff82d3d760 r ukbd_keydesc_it +ffffffff82d3d800 r ukbd_keydesc_uk +ffffffff82d3d8b0 r ukbd_keydesc_jp +ffffffff82d3d920 r ukbd_keydesc_sv +ffffffff82d3d950 r ukbd_keydesc_sv_nodead +ffffffff82d3d960 r ukbd_keydesc_no +ffffffff82d3d990 r ukbd_keydesc_no_nodead +ffffffff82d3d9a0 r ukbd_keydesc_us_dvorak +ffffffff82d3da40 r ukbd_keydesc_us_colemak +ffffffff82d3da88 r ukbd_keydesc_swapctrlcaps +ffffffff82d3daa0 r ukbd_keydesc_iopener +ffffffff82d3daf0 r ukbd_keydesc_es +ffffffff82d3db90 r ukbd_keydesc_be +ffffffff82d3dc50 r ukbd_keydesc_ru +ffffffff82d3ddc0 r ukbd_keydesc_ua +ffffffff82d3df60 r ukbd_keydesc_sg +ffffffff82d3e020 r ukbd_keydesc_sg_nodead +ffffffff82d3e040 r ukbd_keydesc_sf +ffffffff82d3e060 r ukbd_keydesc_pt +ffffffff82d3e0f0 r ukbd_keydesc_pt_apple +ffffffff82d3e110 r ukbd_keydesc_lt +ffffffff82d3e1f0 r ukbd_keydesc_la +ffffffff82d3e290 r ukbd_keydesc_br +ffffffff82d3e320 r ukbd_keydesc_tr +ffffffff82d3e3e0 r ukbd_keydesc_tr_nodead +ffffffff82d3e400 r ukbd_keydesc_pl +ffffffff82d3e460 r ukbd_keydesc_hu +ffffffff82d3e570 r ukbd_keydesc_si +ffffffff82d3e690 r ukbd_keydesc_cf +ffffffff82d3e770 r ukbd_keydesc_cf_nodead +ffffffff82d3e790 r ukbd_keydesc_lv +ffffffff82d3e810 r ukbd_keydesc_nl +ffffffff82d3e8f0 r ukbd_keydesc_nl_nodead +ffffffff82d3e910 r ukbd_keydesc_is +ffffffff82d3e9a4 r ukbd_keydesc_is_nodead +ffffffff82d3e9b0 r ukbd_keydesc_ee +ffffffff82d3ea60 r ukbd_keydesc_ee_nodead +ffffffff82d3ea80 R ukbd_keydesctab +ffffffff82d3f000 R ukbd_countrylayout +ffffffff82d3f090 R ukbd_consops +ffffffff82d3f0b0 R ukbd_accessops +ffffffff82d3f0c8 R ukbd_ca +ffffffff82d3f0f0 R ukbd_never_console +ffffffff82d40000 R ums_accessops +ffffffff82d40018 R ums_ca +ffffffff82d41000 R umt_accessops +ffffffff82d41018 R umt_ca +ffffffff82d42000 R uts_devs +ffffffff82d42010 R uts_accessops +ffffffff82d42028 R uts_ca +ffffffff82d43000 R ubcmtp_accessops +ffffffff82d43018 R ubcmtp_ca +ffffffff82d43040 r ubcmtp_devices +ffffffff82d44000 R ucycom_methods +ffffffff82d44040 R ucycom_devs +ffffffff82d44050 R ucycom_ca +ffffffff82d45000 R uslhcom_methods +ffffffff82d45040 R uslhcom_ca +ffffffff82d45068 r uslhcom_devs +ffffffff82d46000 R ulpt_ca +ffffffff82d47000 R umass_ca +ffffffff82d47028 R umass_bbb_methods +ffffffff82d47040 R umass_cbi_methods +ffffffff82d48000 R umass_quirks +ffffffff82d49000 R umass_scsi_switch +ffffffff82d4a000 R uthum_devs +ffffffff82d4a008 R uthum_ca +ffffffff82d4a030 r uthum_sensor_type_s +ffffffff82d4b000 R ugold_devs +ffffffff82d4b018 R ugold_ca +ffffffff82d4c000 R utrh_devs +ffffffff82d4c008 R utrh_ca +ffffffff82d4d000 R uoakrh_devs +ffffffff82d4d008 R uoakrh_ca +ffffffff82d4d030 R uoakrh_methods +ffffffff82d4e000 R uoaklux_devs +ffffffff82d4e008 R uoaklux_ca +ffffffff82d4e030 R uoaklux_methods +ffffffff82d4f000 R uoakv_devs +ffffffff82d4f008 R uoakv_ca +ffffffff82d4f030 R uoakv_methods +ffffffff82d50000 R uonerng_ca +ffffffff82d51000 R urng_ca +ffffffff82d51030 r urng_devs +ffffffff82d52000 R udcf_ca +ffffffff82d52028 r udcf_devs +ffffffff82d53000 R umbg_ca +ffffffff82d54000 R uvisor_methods +ffffffff82d54040 R uvisor_ca +ffffffff82d54070 r uvisor_devs +ffffffff82d55000 R udsbr_hw_if +ffffffff82d55028 R udsbr_ca +ffffffff82d56000 R utwitch_devs +ffffffff82d56008 R utwitch_ca +ffffffff82d57000 R aue_devs +ffffffff82d571b0 R aue_ca +ffffffff82d58000 R axe_devs +ffffffff82d580d0 R axe_ca +ffffffff82d59000 R axen_devs +ffffffff82d59020 R axen_ca +ffffffff82d5a000 R smsc_ca +ffffffff82d5a030 r smsc_devs +ffffffff82d5b000 R cue_ca +ffffffff82d5c000 R kue_devs +ffffffff82d5c088 R kue_ca +ffffffff82d5d000 R cdce_devs +ffffffff82d5d048 R cdce_ca +ffffffff82d5e000 R urndis_ca +ffffffff82d5e030 R urndis_class +ffffffff82d5f000 R mos_devs +ffffffff82d5f018 R mos_ca +ffffffff82d60000 R mue_devs +ffffffff82d60020 R mue_ca +ffffffff82d61000 R udav_ca +ffffffff82d61030 r udav_devs +ffffffff82d62000 R upl_ca +ffffffff82d63000 R ugl_ca +ffffffff82d64000 R url_ca +ffffffff82d64030 r url_devs +ffffffff82d65000 R ure_devs +ffffffff82d650e8 R ure_ca +ffffffff82d66000 R uaq_devs +ffffffff82d66018 R uaq_ca +ffffffff82d67000 R umodem_methods +ffffffff82d67040 R umodem_ca +ffffffff82d68000 R uftdi_methods +ffffffff82d68040 R uftdi_ca +ffffffff82d68070 r uftdi_devs +ffffffff82d69000 R uplcom_methods +ffffffff82d69040 R uplcom_ca +ffffffff82d69070 r uplcom_devs +ffffffff82d6a000 R umct_methods +ffffffff82d6a040 R umct_ca +ffffffff82d6a070 r umct_devs +ffffffff82d6b000 R uvscom_methods +ffffffff82d6b040 R uvscom_ca +ffffffff82d6b070 r uvscom_devs +ffffffff82d6c000 R ubsa_methods +ffffffff82d6c040 R ubsa_devs +ffffffff82d6c060 R ubsa_ca +ffffffff82d6d000 R ukspan_ca +ffffffff82d6d028 r ukspan_devs +ffffffff82d6d030 r ukspan_methods +ffffffff82d6e000 R uslcom_methods +ffffffff82d6e040 R uslcom_ca +ffffffff82d6e070 r uslcom_devs +ffffffff82d6f000 R uark_methods +ffffffff82d6f040 R uark_ca +ffffffff82d6f068 r uark_devs +ffffffff82d70000 R moscom_methods +ffffffff82d70040 R moscom_ca +ffffffff82d70068 r moscom_devs +ffffffff82d71000 R umcs_methods +ffffffff82d71040 R umcs_devs +ffffffff82d71050 R umcs_ca +ffffffff82d72000 R uscom_methods +ffffffff82d72040 R uscom_ca +ffffffff82d72068 r uscom_devs +ffffffff82d73000 R ucrcom_methods +ffffffff82d73040 R ucrcom_ca +ffffffff82d74000 R uxrcom_methods +ffffffff82d74040 R uxrcom_ca +ffffffff82d74068 r uxrcom_devs +ffffffff82d75000 R uipaq_methods +ffffffff82d75040 R uipaq_ca +ffffffff82d75070 r uipaq_devs +ffffffff82d76000 R umsm_methods +ffffffff82d76040 R umsm_ca +ffffffff82d76070 r umsm_devs +ffffffff82d77000 R uchcom_methods +ffffffff82d77040 R uchcom_ca +ffffffff82d77068 r uchcom_devs +ffffffff82d77080 r dividers +ffffffff82d78000 R uticom_methods +ffffffff82d78040 R uticom_ca +ffffffff82d78070 r uticom_devs +ffffffff82d79000 R wi_usb_devs +ffffffff82d790f0 R wi_usb_ca +ffffffff82d7a000 R atu_ca +ffffffff82d7b000 R ural_ca +ffffffff82d7b030 r ural_devs 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+ffffffff830c7008 D sili_cd +ffffffff830c8000 D esp_cd +ffffffff830c8020 D ncr53c9x_variant_names +ffffffff830c9000 D E_abs_script_sched_slot0_Used +ffffffff830c90a0 D E_abs_targ0_Used +ffffffff830c90dc D E_abs_msgin_Used +ffffffff830c90e8 D E_abs_lunsw_return_Used +ffffffff830c90f0 D E_abs_tag0_Used +ffffffff830c9130 D E_ldsa_abs_reselected_Used +ffffffff830c9134 D E_ldsa_abs_reselect_Used +ffffffff830c9138 D E_ldsa_abs_selected_Used +ffffffff830c913c D E_ldsa_abs_data_Used +ffffffff830c9140 D E_ldsa_abs_slot_Used +ffffffff830c9148 D siop_cd +ffffffff830ca000 D ep_isa_media +ffffffff830ca060 D ep_cd +ffffffff830cb000 D wi_cd +ffffffff830cb020 D wi_func_io +ffffffff830cc000 D an_cd +ffffffff830cd000 D xl_cd +ffffffff830ce000 D fxp_int_delay +ffffffff830ce004 D fxp_bundle_max +ffffffff830ce008 D fxp_min_size_mask +ffffffff830ce010 D fxp_cd +ffffffff830ce030 d tx_threshold +ffffffff830ce040 d fxp_cb_config_template +ffffffff830cf000 D rl_cd +ffffffff830d0000 D re_cd +ffffffff830d1000 D dc_cd +ffffffff830d2000 D smc91cxx_idstrs +ffffffff830d2080 D sm_cd +ffffffff830d3000 D epic_cd +ffffffff830d4000 D ne_cd +ffffffff830d4020 d ne2000_detect.test_pattern +ffffffff830d5000 D gem_cd +ffffffff830d6000 D ti_cd +ffffffff830d7000 D com_cd +ffffffff830d7020 D comdefaultrate +ffffffff830d7024 D comconsrate +ffffffff830d7028 D comconscflag +ffffffff830d7030 d comcnattach.comcons +ffffffff830d8000 D pckbc_slot_names +ffffffff830d8010 D pckbc_cd +ffffffff830d9000 D ac97civ +ffffffff830da000 D cy_cd +ffffffff830db000 D lpt_cd +ffffffff830dc000 D lm_cd +ffffffff830dd000 D ath_dwelltime +ffffffff830dd004 D ath_calinterval +ffffffff830dd008 D ath_outdoor +ffffffff830dd00c D ath_xchanmode +ffffffff830dd010 D ath_softcrypto +ffffffff830dd018 D ath_cd +ffffffff830de000 D athn_cd +ffffffff830df000 D bwfm_2ghz_channels +ffffffff830df010 D bwfm_5ghz_channels +ffffffff830df030 D bwfm_proto_bcdc_ops +ffffffff830df050 D bwfm_cd +ffffffff830e0000 D atw_bbp_io_enable_delay +ffffffff830e0004 D atw_bbp_io_disable_delay +ffffffff830e0008 D atw_writewep_delay +ffffffff830e000c D atw_beacon_len_adjust +ffffffff830e0010 D atw_dwelltime +ffffffff830e0018 D atw_cd +ffffffff830e1000 D rtw_dwelltime +ffffffff830e1004 D rtw_macbangbits_timeout +ffffffff830e1008 D rtw_cd +ffffffff830e2000 D ral_cd +ffffffff830e3000 D rt3090_freqs +ffffffff830e4000 D acx_beacon_intvl +ffffffff830e4008 D acx_cd +ffffffff830e5000 D pgt_cd +ffffffff830e6000 D sf_cd +ffffffff830e7000 D malo_cd +ffffffff830e8000 D bwi_cd +ffffffff830e8020 D bwi_constraint +ffffffff830e8030 D bwi_pa_mode +ffffffff830e9000 D iosf_cd +ffffffff830e9020 d iosf_lock +ffffffff830e9030 d iosf_mbi_mtx +ffffffff830ea000 D uhci_cd +ffffffff830eb000 D ohci_cd +ffffffff830ec000 D ehci_cd +ffffffff830ed000 D xhci_cd +ffffffff830ee000 D ccp_cd +ffffffff830ef000 D sdhc_functions +ffffffff830ef068 D sdhc_cd +ffffffff830f0000 D rtsx_functions +ffffffff830f0068 D rtsx_cd +ffffffff830f1000 D radio_cd +ffffffff830f2000 D kcs_if +ffffffff830f2040 D smic_if +ffffffff830f2080 D bt_if +ffffffff830f20c0 D ipmi_cd +ffffffff830f20e0 D maxsdrlen +ffffffff830f3000 D vscsi_cd +ffffffff830f4000 D mpath_cd +ffffffff830f5000 D softraid_cd +ffffffff830f5020 D smd +ffffffff830f6000 D spdmem_cd +ffffffff830f7000 D dwiic_cd +ffffffff830f8000 D dwqe_cd +ffffffff830f9000 D kstat_lock +ffffffff830f9010 D kstat_next_id +ffffffff830f9018 D kstat_default_lock +ffffffff830fa000 D pf_inp_mtx +ffffffff830fa010 D pf_hdr_limit +ffffffff830fa020 D pf_pool_limits +ffffffff830fa090 D pf_state_list +ffffffff830fa0c0 D pf_purge_states_task +ffffffff830fa0f0 D pf_purge_states_to +ffffffff830fa138 D pf_purge_states_collect +ffffffff830fa140 D pf_purge_to +ffffffff830fa188 D pf_purge_task +ffffffff830fb000 D pf_tags +ffffffff830fb010 D pf_qids +ffffffff830fb020 D pf_lock +ffffffff830fb030 D pf_state_lock +ffffffff830fb040 D pfioctl_rw +ffffffff830fb050 d pf_open_trans.ticket +ffffffff830fc000 D pfi_update +ffffffff830fd000 D pflog_cloner +ffffffff830fe000 D pfsync_cloner +ffffffff830ff000 D pflow_cloner +ffffffff83100000 d hotplug_mtx +ffffffff83101000 D pppoe_cloner +ffffffff83101030 D pppoediscinq +ffffffff83101060 D pppoeinq +ffffffff83102000 D dt_lock +ffffffff83103000 D dt_prov_profile +ffffffff83103030 D dt_prov_interval +ffffffff83104000 D dtps_nsysent +ffffffff83104008 D dt_prov_syscall +ffffffff83105000 D dt_prov_static +ffffffff83105030 D dt_static_sched_dequeue +ffffffff831050a0 D dt_static_sched_enqueue +ffffffff83105110 D dt_static_sched_fork +ffffffff83105180 D dt_static_sched_off__cpu +ffffffff831051f0 D dt_static_sched_on__cpu +ffffffff83105260 D dt_static_sched_remain__cpu +ffffffff831052d0 D dt_static_sched_sleep +ffffffff83105340 D dt_static_sched_steal +ffffffff831053b0 D dt_static_sched_unsleep +ffffffff83105420 D dt_static_sched_wakeup +ffffffff83105490 D dt_static_raw_syscalls_sys_enter +ffffffff83105500 D dt_static_raw_syscalls_sys_exit +ffffffff83105570 D dt_static_uvm_fault +ffffffff831055e0 D dt_static_uvm_map_insert +ffffffff83105650 D dt_static_uvm_map_remove +ffffffff831056c0 D dt_static_uvm_malloc +ffffffff83105730 D dt_static_uvm_free +ffffffff831057a0 D dt_static_uvm_pool_get +ffffffff83105810 D dt_static_uvm_pool_put +ffffffff83105880 D dt_static_vfs_bufcache_rel +ffffffff831058f0 D dt_static_vfs_bufcache_take +ffffffff83105960 D dt_static_vfs_cleaner +ffffffff831059d0 D dt_static_vmm_guest_enter +ffffffff83105a40 D dt_static_vmm_guest_exit +ffffffff83105ab0 D dt_static_vmm_inout +ffffffff83105b20 D dt_static_smr_call +ffffffff83105b90 D dt_static_smr_called +ffffffff83105c00 D dt_static_smr_barrier_enter +ffffffff83105c70 D dt_static_smr_barrier_exit +ffffffff83105ce0 D dt_static_smr_wakeup +ffffffff83105d50 D dt_static_smr_thread +ffffffff83105dc0 D dt_static_refcnt_none +ffffffff83105e30 D dt_static_refcnt_ethmulti +ffffffff83105ea0 D dt_static_refcnt_ifaddr +ffffffff83105f10 D dt_static_refcnt_ifmaddr +ffffffff83105f80 D dt_static_refcnt_inpcb +ffffffff83105ff0 D dt_static_refcnt_rtentry +ffffffff83106060 D dt_static_refcnt_syncache +ffffffff831060d0 D dt_static_refcnt_tdb +ffffffff83107000 D db_next_free_breakpoint +ffffffff83107008 D db_breakpoints_inserted +ffffffff83108000 D db_ed_style +ffffffff83109000 D db_examine_format +ffffffff83109078 D db_print_format +ffffffff8310a000 D db_history_size +ffffffff8310a008 D db_history_curr +ffffffff8310a010 D db_history_last +ffffffff8310b000 D db_tab_stop_width +ffffffff8310b004 D db_max_line +ffffffff8310b008 D db_max_width +ffffffff8310b00c D db_radix +ffffffff8310c000 D db_lastsym +ffffffff8310c008 D db_maxoff +ffffffff8310d000 D db_vars +ffffffff8310d090 D db_evars +ffffffff8310e000 D db_watchpoints_inserted +ffffffff8310e008 D db_next_free_watchpoint +ffffffff8310f000 D db_log +ffffffff83110000 D audio_cd +ffffffff83110020 D audio_lock +ffffffff83111000 D midi_cd +ffffffff83112000 D rnd_cold +ffffffff83112004 D rnd_slowextract +ffffffff83112008 D rnd_timeout +ffffffff83112050 D rndlock +ffffffff83112060 D rndreinit_timeout +ffffffff831120a8 D rnd_task +ffffffff83113000 D video_cd +ffffffff83114000 d rrip_table_analyze +ffffffff831140e0 d rrip_table_getname +ffffffff831141e0 d rrip_table_getsymname +ffffffff83114280 d rrip_table_extref +ffffffff83115000 D nexecs +ffffffff83116000 D elf_note_names +ffffffff83117000 D ncpus +ffffffff83117004 D ncpusfound +ffffffff83118000 D acct_lock +ffffffff83118010 D acctsuspend +ffffffff83118014 D acctresume +ffffffff83118018 D acctrate +ffffffff83119000 D ticks +ffffffff8311a000 D fhdlk +ffffffff8311b000 D kqueue_klist_lock +ffffffff8311b010 D kq_timeoutmax +ffffffff8311c000 D stackgap_random +ffffffff8311d000 D nprocesses +ffffffff8311d004 D nthreads +ffffffff8311d008 D fork_tfmrate +ffffffff8311e000 D kthread_q +ffffffff8311f000 D nkmempages +ffffffff8311f008 D malloc_mtx +ffffffff8311f020 D memname +ffffffff8311f4b0 D sysctl_kmemlock +ffffffff8311f4c0 D malloc_errintvl +ffffffff83120000 D maxdmap +ffffffff83120008 D maxsmap +ffffffff83120010 D rlimit_lock +ffffffff83121000 D sched_cost_load +ffffffff83121004 D sched_cost_priority +ffffffff83121008 D sched_cost_runnable +ffffffff8312100c D sched_cost_resident +ffffffff83122000 D intrmap_lock +ffffffff83123000 D nosuidcoredump +ffffffff83123008 D sigio_lock +ffffffff83124000 D smr_lock +ffffffff83124010 D smr_logintvl +ffffffff83125000 D startuphook_list +ffffffff83126000 D sysctl_lock +ffffffff83126010 D sysctl_disklock +ffffffff83126020 d openbsd +ffffffff83126024 d arg_max +ffffffff83126028 d posix_version +ffffffff8312602c d ngroups_max +ffffffff83126030 d int_one +ffffffff83126034 d maxpartitions +ffffffff83126038 d raw_part +ffffffff8312603c D allowpowerdown +ffffffff83126040 D hw_power +ffffffff83126044 d byte_order +ffffffff83126048 d page_size +ffffffff83127000 d thrsleep_queue +ffffffff83127010 d thrsleep_lock +ffffffff83128000 D tc_lock +ffffffff83128010 D windup_mtx +ffffffff83128020 d dummy_timecounter +ffffffff83128070 D timecounter +ffffffff83128078 D time_second +ffffffff83128080 d timehands +ffffffff83128088 d th0 +ffffffff83128120 d th1 +ffffffff83129000 D itimer_mtx +ffffffff83129010 D ratecheck_mtx +ffffffff83129020 D ppsratecheck_mtx +ffffffff83129030 D resettodr_to +ffffffff83129078 D resettodr_task +ffffffff8312a000 D timeout_mutex +ffffffff8312b000 D wdog_auto +ffffffff8312c000 D taskq_sys +ffffffff8312c050 D taskq_sys_mp +ffffffff8312d000 d update_loadavg.to +ffffffff8312d048 D ccpu +ffffffff8312d050 d schedcpu.to +ffffffff8312d098 D perflevel +ffffffff8312d09c D perfpolicy +ffffffff8312d0a0 D setperf_to +ffffffff8312e000 D autoconf_attdet_mtx +ffffffff8312e010 D msgs +ffffffff8312f000 d evcount_list +ffffffff8312f010 d evcount_percpu_init_list +ffffffff83130000 D syslogf_rwlock +ffffffff83130010 D log_mtx +ffffffff83130020 D logstash_in +ffffffff83130028 D logstash_out +ffffffff83130030 D logstash_rwlock +ffffffff83131000 D pool_head +ffffffff83131010 D pool_lock +ffffffff83131020 D pool_debug +ffffffff83131028 D pool_allocator_single +ffffffff83131040 D pool_allocator_multi +ffffffff83131058 D pool_allocator_multi_ni +ffffffff83131070 D pool_gc_tick +ffffffff831310b8 D pool_gc_task +ffffffff83132000 D kprintf_mutex +ffffffff83132010 D db_panic +ffffffff83132014 D splassert_ctl +ffffffff83132018 D v_putc +ffffffff83132020 D printf_flags +ffffffff83133000 D userconf_base +ffffffff83133004 D userconf_maxdev +ffffffff83133008 D userconf_totdev +ffffffff8313300c D userconf_maxlocnames +ffffffff83133010 D userconf_cnt +ffffffff83133014 D userconf_lines +ffffffff83133018 D userconf_histsz +ffffffff83133020 D userconf_cmds +ffffffff83134000 D ftlock +ffffffff83135000 d ppollcollect.poll_errintvl +ffffffff83136000 D ttydefchars +ffffffff83136014 D ttclos +ffffffff8313601b D ttopen +ffffffff83136022 D ttybg +ffffffff83136028 D ttyin +ffffffff8313602e D ttyout +ffffffff83136038 D ttylist_lock +ffffffff83137000 D linesw +ffffffff83137280 D nlinesw +ffffffff83138000 D pt_softc_lock +ffffffff83139000 d mbstat_boot_boot_cpumem +ffffffff83139080 D mbstat +ffffffff83139090 D mclsizes +ffffffff831390b0 D m_extref_mtx +ffffffff831390c0 D m_pool_allocator +ffffffff8313a000 D somaxconn +ffffffff8313a004 D sominconn +ffffffff8313a008 D sosplice_lock +ffffffff8313b000 D sb_max +ffffffff8313c000 D unp_df_lock +ffffffff8313c010 D unp_gc_lock +ffffffff8313c020 D unp_rights_mtx +ffffffff8313c030 D unp_ino_mtx +ffffffff8313c040 D unp_gc_task +ffffffff8313c070 D unpst_sendspace +ffffffff8313c074 D unpst_recvspace +ffffffff8313c078 D unpsq_sendspace +ffffffff8313c07c D unpsq_recvspace +ffffffff8313c080 D unpdg_sendspace +ffffffff8313c084 D unpdg_recvspace +ffffffff8313d000 D doingcache +ffffffff8313e000 D maxvfsconf +ffffffff8313e010 d vfsconflist +ffffffff8313f000 D lockf_lock +ffffffff8313f010 D maxlocksperuid +ffffffff83140000 D iftovt_tab +ffffffff83140040 D vttoif_tab +ffffffff83140064 D suid_clear +ffffffff83140068 D vnode_mtx +ffffffff83140078 D vfs_stall_lock +ffffffff83140090 D vtypes +ffffffff831400e0 D vtags +ffffffff83141000 D syncer_maxdelay +ffffffff83141004 D syncdelay +ffffffff83142000 D dosdirtemplate +ffffffff83143000 D ntfs_hashlock +ffffffff83144000 D ntfs_toupper_lock +ffffffff83145000 D art_table_gc_mtx +ffffffff83145010 D art_table_gc_task +ffffffff83145040 D art_node_gc_mtx +ffffffff83145050 D art_node_gc_task +ffffffff83146000 D bpf_bufsize +ffffffff83146004 D bpf_maxbufsize +ffffffff83146008 D bpf_sysctl_lk +ffffffff83147000 D ifg_head +ffffffff83147010 D if_cloners_lock +ffffffff83147020 D if_input_task_locked +ffffffff83147050 D netlock +ffffffff83147060 D ifnetlist +ffffffff83148000 D ifiq_maxlen_drop +ffffffff83148004 D ifiq_maxlen_return +ffffffff83149000 D etherbroadcastaddr +ffffffff83149006 D ether_ipmulticast_min +ffffffff8314900c D ether_ipmulticast_max +ffffffff83149012 D ether_ip6multicast_min +ffffffff83149018 D ether_ip6multicast_max +ffffffff8314a000 D etherip_cloner +ffffffff8314a030 D etherip_list +ffffffff8314b000 D loop_cloner +ffffffff8314c000 D ifmedia_mtx +ffffffff8314d000 D ppp_compressors +ffffffff8314d020 D ppp_cloner +ffffffff8314e000 D ppp_pkt_init +ffffffff8314f000 D ppp_bsd_compress +ffffffff83150000 D ppp_deflate +ffffffff83150070 D ppp_deflate_draft +ffffffff83151000 D tun_cloner +ffffffff83151030 D tap_cloner +ffffffff83152000 D bridgeintrq +ffffffff83152038 D bridge_cloner +ffffffff83153000 d veb_cloner +ffffffff83153030 d vport_cloner +ffffffff83154000 D vlan_tagh_lk +ffffffff83154010 D vlan_cloner +ffffffff83154040 D svlan_cloner +ffffffff83155000 D pipex_list_mtx +ffffffff83155010 D pipex_prune +ffffffff83155018 D pipexoutq +ffffffff83155050 d SHAPad2 +ffffffff83156000 D rtmap_gc +ffffffff83156018 D rt_rc +ffffffff83157000 D rt_labels +ffffffff83157010 D rtlabel_mtx +ffffffff83158000 D enc_cloner +ffffffff83159000 D gre_cloner +ffffffff83159030 D gre_list +ffffffff83159040 D mgre_cloner +ffffffff83159070 D egre_cloner +ffffffff831590a0 D nvgre_cloner +ffffffff831590d0 D eoip_cloner +ffffffff8315a000 D trunk_cloner +ffffffff8315b000 d aggr_cloner +ffffffff8315c000 d tpmr_cloner +ffffffff8315d000 D mpe_cloner +ffffffff8315e000 D mpw_cloner +ffffffff8315f000 D mpip_cloner +ffffffff83160000 d bpe_cloner +ffffffff83160030 d bpe_lock +ffffffff83161000 D vether_cloner +ffffffff83162000 D pair_cloner +ffffffff83163000 d vxlan_cloner +ffffffff83163030 d vxlan_lock +ffffffff83163040 d vxlan_teps +ffffffff83164000 D underload_interval +ffffffff83164010 D wg_cloner +ffffffff83165000 d stoeplitz_keyseed +ffffffff83166000 D ieee80211_cache_size +ffffffff83167000 D arpt_prune +ffffffff83167004 D arpt_keep +ffffffff83167008 D arpt_down +ffffffff83167010 D arpinq +ffffffff83167048 D arp_mtx +ffffffff83167058 D arp_maxtries +ffffffff83168000 D ipport_firstauto +ffffffff83168004 D ipport_lastauto +ffffffff83168008 D ipport_hifirstauto +ffffffff8316800c D ipport_hilastauto +ffffffff83169000 D divert_sendspace +ffffffff83169004 D divert_recvspace +ffffffff83169008 D divbhashsize +ffffffff8316a000 D icmptstamprepl +ffffffff8316a004 D icmperrppslim +ffffffff8316a008 D icmp_redirtimeout +ffffffff8316b000 D ipsendredirects +ffffffff8316b004 D ip_defttl +ffffffff8316b008 D ip_mtudisc +ffffffff8316b00c D ip_mtudisc_timeout +ffffffff8316b010 D ipq_mutex +ffffffff8316b020 D ip_maxqueue +ffffffff8316b028 D ipintrq +ffffffff8316b060 d ipsend_task +ffffffff8316b090 d ipsendraw_task +ffffffff8316c000 D ip_mrtproto +ffffffff8316c004 d sin +ffffffff8316d000 D rip_sendspace +ffffffff8316d008 D rip_recvspace +ffffffff8316e000 D tcprexmtthresh +ffffffff8316e004 D tcptv_keep_init +ffffffff8316e008 D tcp_rst_ppslim +ffffffff8316e00c D tcp_ackdrop_ppslim +ffffffff8316e010 D tcp_syn_hash_size +ffffffff8316e014 D tcp_syn_cache_limit +ffffffff8316e018 D tcp_syn_bucket_limit +ffffffff8316e01c D tcp_syn_use_limit +ffffffff8316e020 D syn_cache_mtx +ffffffff8316f000 D tcp_outflags +ffffffff83170000 D tcp_timer_mtx +ffffffff83170010 D tcp_mssdflt +ffffffff83170014 D tcp_rttdflt +ffffffff83170018 D tcp_do_rfc1323 +ffffffff8317001c D tcp_do_sack +ffffffff83170020 D tcp_do_rfc3390 +ffffffff83170024 D tcp_do_tso +ffffffff83170028 D tcp_reass_limit +ffffffff8317002c D tcp_sackhole_limit +ffffffff83171000 D tcp_backoff +ffffffff83171034 D tcp_totbackoff +ffffffff83172000 D tcp_sendspace +ffffffff83172004 D tcp_recvspace +ffffffff83172008 D tcp_autorcvbuf_inc +ffffffff83173000 D udpcksum +ffffffff83173004 D udp_sendspace +ffffffff83173008 D udp_recvspace +ffffffff83174000 D ipsec_flows_mtx +ffffffff83174010 D ipsec_ids_idle +ffffffff83174014 D ipsec_ids_next_flow +ffffffff83174018 D ipsec_policy_head +ffffffff83174028 D ipsp_ids_gc_timeout +ffffffff83174070 D tdb_sadb_mtx +ffffffff83174080 d tdb_hashmask +ffffffff83175000 D ipo_tdb_mtx +ffffffff83175010 D ipsec_acquire_mtx +ffffffff83175020 D ipsec_acquire_head +ffffffff83176000 D ipsec_keep_invalid +ffffffff83176004 D ipsec_require_pfs +ffffffff83176008 D ipsec_soft_timeout +ffffffff8317600c D ipsec_exp_timeout +ffffffff83176010 D ipsec_soft_first_use +ffffffff83176014 D ipsec_exp_first_use +ffffffff83176018 D ipsec_expire_acquire +ffffffff8317601c D esp_enable +ffffffff83176020 D ah_enable +ffffffff83177000 D udpencap_enable +ffffffff83177004 D udpencap_port +ffffffff83178000 D carp_vh_rc +ffffffff83178020 D carp_sc_rc +ffffffff83178040 D carp_opts +ffffffff83178058 D carp_cloner +ffffffff83178088 d carp_send_na.mcast ffffffff83179000 d PADDING -ffffffff8317a000 d weak_keys -ffffffff8317b000 D swcr_id -ffffffff8317c000 D window_inflate -ffffffff8317c004 D window_deflate -ffffffff8317d000 D ghash_update -ffffffff8317e000 D mpls_defttl -ffffffff8317e004 D mpls_mapttl_ip -ffffffff8317f000 D nfskevq_lock -ffffffff83180000 D nfs_backoff -ffffffff83180020 D nfs_ptimers -ffffffff83181000 D desirednfsrvcache -ffffffff83181010 D nonidempotent -ffffffff83181070 D nfsv2_repstat -ffffffff83182000 D nfsv2_type -ffffffff83182030 D nfsv3_type -ffffffff83182060 D nv2tov_type -ffffffff83182080 D nv3tov_type -ffffffff831820a0 D nfsv3_procid -ffffffff83182100 D nfsv2_procid -ffffffff8318215c d nfsv3err_getattr -ffffffff83182170 d nfsv3err_setattr -ffffffff83182190 d nfsv3err_lookup -ffffffff831821a4 d nfsv3err_access -ffffffff831821b0 d nfsv3err_readlink -ffffffff831821d0 d nfsv3err_read -ffffffff831821f0 d nfsv3err_write -ffffffff83182210 d nfsv3err_create -ffffffff83182230 d nfsv3err_mkdir -ffffffff83182250 d nfsv3err_symlink -ffffffff83182270 d nfsv3err_mknod -ffffffff83182290 d nfsv3err_remove -ffffffff831822b0 d nfsv3err_rmdir -ffffffff831822d0 d nfsv3err_rename -ffffffff83182300 d nfsv3err_link -ffffffff83182330 d nfsv3err_readdir -ffffffff83182350 d nfsv3err_readdirplus -ffffffff83182366 d nfsv3err_fsstat -ffffffff83182372 d nfsv3err_fsinfo -ffffffff8318237c d nfsv3err_pathconf -ffffffff83182386 d nfsv3err_commit -ffffffff83183000 D nfsrv3_procs -ffffffff831830b8 D nfs_niothreads -ffffffff83184000 D fragtbl -ffffffff83185000 D ffs_vtbl -ffffffff83186000 D softdep_typenames -ffffffff83186070 D tickdelay -ffffffff83187000 D dirchk -ffffffff83188000 D desireddquot -ffffffff83189000 D amap_list_lock -ffffffff8318a000 d uao_list_lock -ffffffff8318b000 d uvmexp_countersboot_boot_cpumem -ffffffff8318b0c0 D uvmexp_counters -ffffffff8318b0c8 D vm_min_kernel_address -ffffffff8318c000 D no_constraint -ffffffff8318d000 d uvm_kmapent_warn_rate -ffffffff8318e000 D maxslp -ffffffff8318f000 D uvmpagerops -ffffffff83190000 D uvm_swap_data_lock -ffffffff83190010 D swap_syscall_lock -ffffffff83190020 D oommtx -ffffffff83191000 D uvm_doswapencrypt -ffffffff83192000 D gif_list -ffffffff83192010 D gif_cloner -ffffffff83193000 d sec_cloner -ffffffff83193030 d sec_tdb_gc_mtx -ffffffff83193040 d sec_tdb_gc_task -ffffffff83194000 D divert6_sendspace -ffffffff83194004 D divert6_recvspace -ffffffff83194008 D divb6hashsize -ffffffff83195000 d in6_get_hw_ifid.allone -ffffffff83196000 D ip6_sendredirects -ffffffff83196004 D ip6_defhlim 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divb6table -ffffffff83552078 B div6counters -ffffffff83553000 b in6_get_hw_ifid.allzero -ffffffff83554000 B ip6_forwarding -ffffffff83554004 B ip6_mforwarding -ffffffff83554008 B ip6_multipath -ffffffff8355400c B ip6_mcast_pmtu -ffffffff83554010 B ip6_log_time -ffffffff83554020 B ip6_protox -ffffffff83554120 B ip6_dad_pending -ffffffff83555000 B ip6af_pool -ffffffff835551a8 B ip6q_pool -ffffffff83555350 B frag6_queue -ffffffff83555360 B frag6_nfrags -ffffffff83555364 B frag6_nfragpackets -ffffffff83556000 B icmp6_mtudisc_callbacks -ffffffff83556008 B icmp6_mtudisc_timeout_q -ffffffff83556040 B icmp6_redirect_timeout_q -ffffffff83556078 B icmp6counters -ffffffff83556080 b icmp6_redirect_diag.buf -ffffffff83556480 b icmp6errppslim_last -ffffffff83556490 b icmp6errpps_count -ffffffff83557000 b ip6send_mq -ffffffff83557030 B ip6counters -ffffffff83557040 B ip6_soiikey -ffffffff83558000 B ip6_mrouter_ver -ffffffff83558010 B ip6_mrouter -ffffffff83558810 B ip6_mrouterq -ffffffff83558848 B mrt6stat -ffffffff835588b0 B ip6_mrtproto -ffffffff83559000 B ip6_id_ctx -ffffffff8355a000 b mld6_init.hbh_buf -ffffffff8355a008 B mld6_timers_are_running -ffffffff8355a010 b ip6_opts -ffffffff8355b000 B nd6_maxnudhint -ffffffff8355b004 B nd6_debug -ffffffff8355b008 B nd6_pool -ffffffff8355b1b0 B nd6_expire_task -ffffffff8355b1e0 B nd6_timer_to -ffffffff8355b228 B nd6_slowtimo_ch -ffffffff8355b270 B nd6_expire_timeout -ffffffff8355b2b8 B ln_hold_total -ffffffff8355b2bc B nd6_inuse -ffffffff8355c000 B rawin6pcbtable -ffffffff8355c078 B rip6counters -ffffffff8355d000 B pkptable -ffffffff8355d038 B pkpcb_pool -ffffffff8355d1e0 b nregistered -ffffffff8355d1e4 b npromisc -ffffffff8355e000 B setperf_prio -ffffffff8355e004 B cpureset_delay -ffffffff8355e008 B ssym -ffffffff8355e010 B esym -ffffffff8355e018 B bootdev -ffffffff8355e01c B biosbasemem -ffffffff8355e020 B bootapiver -ffffffff8355e024 B safepri -ffffffff8355e028 B exec_map -ffffffff8355e030 B phys_map -ffffffff8355e038 B allowaperture -ffffffff8355e040 B msgbuf_paddr -ffffffff8355e048 B msgbuf_vaddr -ffffffff8355e050 B physmem -ffffffff8355e058 B idt_vaddr -ffffffff8355e060 B idt_paddr -ffffffff8355e068 B bios_diskinfo -ffffffff8355e070 B bios_cksumlen -ffffffff8355e074 B kbd_reset -ffffffff8355e078 B forceukbd -ffffffff8355e07c B dumpsize -ffffffff8355e080 B dumplo -ffffffff8355e088 B mem_cluster_cnt -ffffffff8355e090 B mem_clusters -ffffffff8355e190 B dumpmem_vaddr -ffffffff8355e198 B dumppcb -ffffffff8355e520 B dumpmem_sz -ffffffff8355e528 B proc0paddr -ffffffff8355e530 B idt -ffffffff8355e538 b cpu_init_extents.already_done -ffffffff8355e540 B lo32_vaddr -ffffffff8355e548 B lo32_paddr -ffffffff8355e550 B tramp_pdirpa -ffffffff8355e558 B early_pte_pages -ffffffff8355e560 B bootinfo -ffffffff8355f560 B avail_start -ffffffff8355f568 B avail_end -ffffffff8355f570 B bios_memmap -ffffffff8355f578 B bios_efiinfo -ffffffff8355f580 B mmap -ffffffff8355f588 B kern_end -ffffffff8355f590 B dumpmem_paddr -ffffffff8355f5a0 B idt_allocmap -ffffffff8355f6a0 B cpuresetfn -ffffffff8355f6a8 B bios_bootmac -ffffffff8355f6b0 B bios_ucode -ffffffff8355f6b8 B amd64_delay_quality -ffffffff8355f6c0 B dumpmem_low -ffffffff8355f6c8 B dumpmem_high -ffffffff8355f6d0 B cpu_class -ffffffff83560000 B cpuspeed -ffffffff83560004 B amd64_has_xcrypt -ffffffff83560010 B cpu_model -ffffffff83560040 B setperf_setup -ffffffff83560048 B has_rdrand -ffffffff8356004c B has_rdseed -ffffffff83560050 B amd64_has_pclmul -ffffffff83560054 B amd64_has_aesni -ffffffff83561000 B tsc_is_invariant -ffffffff83561008 B tsc_frequency -ffffffff83561010 B tsc_recalibrate -ffffffff83561040 B tsc_bp_status -ffffffff835610c0 B tsc_test_cycles -ffffffff835610c8 B tsc_test_rounds -ffffffff835610cc B tsc_ingress_barrier -ffffffff835610d0 B tsc_egress_barrier -ffffffff83561100 B tsc_ap_status -ffffffff83561180 B tsc_ap_name -ffffffff83562000 b vc3_sc -ffffffff83562010 b viac3_rnd.buffer -ffffffff83562058 B viac3_rnd_tmo -ffffffff835620a0 B viac3_rnd_present -ffffffff83563000 B aesni_sc -ffffffff83563008 B aesnipl -ffffffff835631b0 B aesni_ops -ffffffff83564000 b amd64_errata.printed -ffffffff83565000 B cpu_ucode_size -ffffffff83565008 B cpu_ucode_data -ffffffff83565010 B cpu_ucode_intel_applied -ffffffff83566000 b ap_open_count -ffffffff83566008 B zeropage -ffffffff83566010 B mem_range_softc -ffffffff83567000 B mtrrdef -ffffffff83567008 B mtrrcap -ffffffff83568000 B nkptp -ffffffff83568020 B pg_nx -ffffffff83568028 B pg_g_kern -ffffffff83568030 B pmap_initialized -ffffffff83568038 B kernel_pmap_store -ffffffff83568110 B cr3_reuse_pcid -ffffffff83568118 b cr3_pcid_temp -ffffffff83568120 B virtual_avail -ffffffff83568128 B pg_xo -ffffffff83568130 B protection_codes -ffffffff83568170 B pmap_use_pcid -ffffffff83568174 b cr3_pcid_proc -ffffffff83568178 B cr3_pcid_proc_intel -ffffffff83568180 B pmaps -ffffffff83568188 B pmap_pmap_pool -ffffffff83568330 B pmap_pv_pool -ffffffff835684d8 B pmap_pdp_pool -ffffffff83569000 B fpu_mxcsr_mask -ffffffff83569008 B xsave_mask -ffffffff8356a000 B x86_soft_intrs -ffffffff8356b000 B i8259_imen -ffffffff8356c000 B intr_shared_edge -ffffffff8356c008 B fake_softclock_intrhand -ffffffff8356c078 B fake_softnet_intrhand -ffffffff8356c0e8 B fake_softtty_intrhand -ffffffff8356c158 B fake_timer_intrhand -ffffffff8356c1c8 B fake_ipi_intrhand -ffffffff8356c238 B fake_xen_intrhand -ffffffff8356c2a8 B fake_hyperv_intrhand -ffffffff8356d000 B atdevbase -ffffffff8356d010 b ioport_ex_storage -ffffffff8356d2e0 B ioport_ex -ffffffff8356d2f0 b iomem_ex_storage -ffffffff8356d5c0 B iomem_ex -ffffffff8356d5c8 b ioport_malloc_safe -ffffffff8356e000 B mp_perflevel -ffffffff8356e008 B ul_setperf -ffffffff8356f000 B cn_tab -ffffffff83570000 B ddb_mp_mutex -ffffffff83570010 B ddb_state -ffffffff83570018 B ddb_regs -ffffffff835700c8 B db_switch_cpu -ffffffff835700d0 B db_switch_to_cpu -ffffffff835700d8 B ddb_active_cpu -ffffffff83571000 B rtclock_tval -ffffffff83571008 B i8254_ticked -ffffffff8357100c B i8254_offset -ffffffff83571010 B i8254_lastcount -ffffffff83571018 b rtcstart.rtcdrain_timeout -ffffffff83571060 B rtc_update_century -ffffffff83571068 B rtc_todr -ffffffff83572000 B k8pnow_current_state -ffffffff83573000 B bus_clock -ffffffff83573008 b est_fqlist -ffffffff83574000 B k1x_current_state -ffffffff83575000 B rotatedfonts -ffffffff83575008 B rasops_framebuffers -ffffffff83576000 b stamp_attr -ffffffff83576010 b stamp +ffffffff8317a000 d PADDING +ffffffff8317b000 d weak_keys +ffffffff8317c000 D swcr_id +ffffffff8317d000 D window_inflate +ffffffff8317d004 D window_deflate +ffffffff8317e000 D ghash_update +ffffffff8317f000 D mpls_defttl +ffffffff8317f004 D mpls_mapttl_ip +ffffffff83180000 D nfskevq_lock +ffffffff83181000 D nfs_backoff +ffffffff83181020 D nfs_ptimers +ffffffff83182000 D desirednfsrvcache +ffffffff83182010 D nonidempotent +ffffffff83182070 D nfsv2_repstat +ffffffff83183000 D nfsv2_type +ffffffff83183030 D nfsv3_type +ffffffff83183060 D nv2tov_type +ffffffff83183080 D nv3tov_type +ffffffff831830a0 D nfsv3_procid +ffffffff83183100 D nfsv2_procid +ffffffff8318315c d nfsv3err_getattr +ffffffff83183170 d nfsv3err_setattr +ffffffff83183190 d nfsv3err_lookup +ffffffff831831a4 d nfsv3err_access +ffffffff831831b0 d nfsv3err_readlink +ffffffff831831d0 d nfsv3err_read +ffffffff831831f0 d nfsv3err_write +ffffffff83183210 d nfsv3err_create +ffffffff83183230 d nfsv3err_mkdir +ffffffff83183250 d nfsv3err_symlink +ffffffff83183270 d nfsv3err_mknod +ffffffff83183290 d nfsv3err_remove +ffffffff831832b0 d nfsv3err_rmdir +ffffffff831832d0 d nfsv3err_rename +ffffffff83183300 d nfsv3err_link +ffffffff83183330 d nfsv3err_readdir +ffffffff83183350 d nfsv3err_readdirplus +ffffffff83183366 d nfsv3err_fsstat +ffffffff83183372 d nfsv3err_fsinfo +ffffffff8318337c d nfsv3err_pathconf +ffffffff83183386 d nfsv3err_commit +ffffffff83184000 D nfsrv3_procs +ffffffff831840b8 D nfs_niothreads +ffffffff83185000 D fragtbl +ffffffff83186000 D ffs_vtbl +ffffffff83187000 D softdep_typenames +ffffffff83187070 D tickdelay +ffffffff83188000 D dirchk +ffffffff83189000 D desireddquot +ffffffff8318a000 D amap_list_lock +ffffffff8318b000 d uao_list_lock +ffffffff8318c000 d uvmexp_countersboot_boot_cpumem +ffffffff8318c0c0 D uvmexp_counters +ffffffff8318c0c8 D vm_min_kernel_address +ffffffff8318d000 D no_constraint +ffffffff8318e000 d uvm_kmapent_warn_rate +ffffffff8318f000 D maxslp +ffffffff83190000 D uvmpagerops +ffffffff83191000 D uvm_swap_data_lock +ffffffff83191010 D swap_syscall_lock +ffffffff83191020 D oommtx +ffffffff83192000 D uvm_doswapencrypt +ffffffff83193000 D gif_list +ffffffff83193010 D gif_cloner +ffffffff83194000 d sec_cloner +ffffffff83194030 d sec_tdb_gc_mtx +ffffffff83194040 d sec_tdb_gc_task +ffffffff83195000 D divert6_sendspace +ffffffff83195004 D divert6_recvspace +ffffffff83195008 D divb6hashsize +ffffffff83196000 d in6_get_hw_ifid.allone +ffffffff83197000 D ip6_sendredirects +ffffffff83197004 D ip6_defhlim +ffffffff83197008 D ip6_defmcasthlim +ffffffff8319700c D ip6_maxfragpackets +ffffffff83197010 D ip6_maxfrags +ffffffff83197014 D ip6_log_interval +ffffffff83197018 D ip6_hdrnestlimit +ffffffff8319701c D ip6_dad_count +ffffffff83197020 D ip6_auto_flowlabel +ffffffff83197024 D ip6_use_deprecated +ffffffff83197028 D ip6_neighborgcthresh +ffffffff8319702c D ip6_maxdynroutes +ffffffff83197030 D rip6_sendspace +ffffffff83197038 D rip6_recvspace +ffffffff83197040 D icmp6_redirtimeout +ffffffff83197044 D icmp6errppslim +ffffffff83197048 D ip6_mtudisc_timeout +ffffffff83198000 D frag6_mutex +ffffffff83199000 d icmp6_mtudisc_hiwat +ffffffff83199004 d icmp6_mtudisc_lowat +ffffffff8319a000 d randomtab_20 +ffffffff8319b000 D ip6intrq +ffffffff8319b038 d ip6send_task +ffffffff8319c000 D nd6_timer_next +ffffffff8319c008 D nd6_expire_next +ffffffff8319c010 D nd6_delay +ffffffff8319c014 D nd6_umaxtries +ffffffff8319c018 D nd6_mmaxtries +ffffffff8319c01c D nd6_gctimer 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tsc_is_synchronized +ffffffff831a6000 D local_apic +ffffffff831a6020 D lapic_id +ffffffff831a6080 D lapic_tpr +ffffffff831a60a0 d lapic_ppr +ffffffff831a6100 d lapic_isr +ffffffff831a7000 D warn_once +ffffffff831a8000 d errata +ffffffff831a9000 D cpu_ucode_mtx +ffffffff831aa000 D mem_owner_bios +ffffffff831aa008 D mrops +ffffffff831aa028 D mtrrmask +ffffffff831aa030 D mtrrtomrt +ffffffff831ab000 D pmap_pg_wc +ffffffff831ab008 D pmaps_lock +ffffffff831ab018 d pmap_maxkvaddr +ffffffff831ac000 D kv_physwait +ffffffff831ad000 D fpu_save_len +ffffffff831ae000 D i8259_pic +ffffffff831af000 D softintr_pic +ffffffff831b0000 D ipifunc +ffffffff831b1000 D setperf_mp_mutex +ffffffff831b2000 D db_Grp6 +ffffffff831b2040 D db_Grp7 +ffffffff831b2100 D db_Grp8 +ffffffff831b2140 D db_Grp9 +ffffffff831b2200 D db_GrpA +ffffffff831b2240 D db_GrpB +ffffffff831b2280 D db_GrpC +ffffffff831b22c0 D db_inst_0f0x +ffffffff831b2440 D db_inst_0f2x +ffffffff831b25c0 D db_inst_0f3x +ffffffff831b2740 D db_inst_0f8x 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db_lengths +ffffffff831b6000 D db_regs +ffffffff831b61e0 D db_eregs +ffffffff831b61f0 D db_reg_args +ffffffff831b7000 D timer_mutex +ffffffff831b7010 d i8254_timecounter +ffffffff831b8000 D spleen8x16 +ffffffff831b8058 D spleen12x24 +ffffffff831b80b0 D spleen16x32 +ffffffff831b8108 D spleen32x64 +ffffffff831b8160 d builtin_fonts +ffffffff831b81e0 d wsfont_add.cookiegen +ffffffff831b81f0 d spleen8x16_data +ffffffff831b8ff0 d spleen12x24_data +ffffffff831bb9f0 d spleen16x32_data +ffffffff831bf1f0 d spleen32x64_data +ffffffff831ce000 D nsphy_cd +ffffffff831cf000 D nsphyter_cd +ffffffff831d0000 D gentbi_cd +ffffffff831d1000 D qsphy_cd +ffffffff831d2000 D inphy_cd +ffffffff831d3000 D iophy_cd +ffffffff831d4000 D eephy_cd +ffffffff831d5000 D exphy_cd +ffffffff831d6000 D rlphy_cd +ffffffff831d7000 D lxtphy_cd +ffffffff831d8000 D luphy_cd +ffffffff831d9000 D mtdphy_cd +ffffffff831da000 D icsphy_cd +ffffffff831db000 D sqphy_cd +ffffffff831dc000 D tqphy_cd +ffffffff831dd000 D ukphy_cd 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vmt_tclo_rpc +ffffffff832060d0 D vmt_cd +ffffffff83207000 D xen_cd +ffffffff83207020 D xen_bus_dma_tag +ffffffff83208000 D xnf_cd +ffffffff83209000 D xbf_cd +ffffffff8320a000 D hv_msg_dispatch +ffffffff8320a110 D hv_timecounter +ffffffff8320a160 D hyperv_cd +ffffffff8320b000 d hv_ic_devs +ffffffff8320c000 D hvn_cd +ffffffff8320d000 D hvs_cd +ffffffff8320e000 D virtio_cd +ffffffff8320f000 D vio_cd +ffffffff83210000 D vioblk_cd +ffffffff83211000 D viomb_cd +ffffffff83212000 D viornd_cd +ffffffff83213000 D vioscsi_cd +ffffffff83214000 D vmmci_cd +ffffffff83215000 D pci_cd +ffffffff83216000 D arc_fw_hdr +ffffffff83216008 D arc_cd +ffffffff83217000 D jmb_cd +ffffffff83218000 D mfii_cd +ffffffff83219000 D ips_cd +ffffffff8321a000 D eap_cd +ffffffff8321b000 D auacer_cd +ffffffff8321c000 D auich_cd +ffffffff8321d000 D azalia_cd +ffffffff8321e000 D envy_cd +ffffffff8321e020 D envy_matchids +ffffffff8321e030 D envy_rates +ffffffff8321e0b0 D ak4524_dac +ffffffff8321e0d8 D ak4524_adc +ffffffff8321e100 D ak4358_dac +ffffffff8321e128 D ak5365_adc +ffffffff8321e150 D unkenvy_codec +ffffffff8321e180 D envy_cards +ffffffff8321e3f0 D envy_cards_ht +ffffffff8321e600 d julia_eeprom +ffffffff8321f000 D emu_cd +ffffffff83220000 D auixp_cd +ffffffff83221000 D clcs_cd +ffffffff83222000 D yds_cd +ffffffff83223000 D auvia_cd +ffffffff83224000 D qle_cd +ffffffff83225000 D mpii_cd +ffffffff83226000 D aq_cd +ffffffff83227000 D de_cd +ffffffff83228000 D pcn_cd +ffffffff83229000 D wdc_sii3114_vtbl +ffffffff83229038 D wdc_pdc203xx_vtbl +ffffffff83229070 D wdc_svwsata_vtbl +ffffffff832290a8 D pciide_cd +ffffffff832290d0 d sis_hostbr_type +ffffffff8322a000 D ppb_cd +ffffffff8322b000 D vr_cd +ffffffff8322b020 D vr_devices +ffffffff8322c000 D txp_cd +ffffffff8322d000 D bt848_card_signature +ffffffff8322e000 D bktr_cd +ffffffff8322f000 D em_cd +ffffffff83230000 D ixgb_cd +ffffffff83231000 D ix_cd +ffffffff83231020 D ixgbe_smart_speed +ffffffff83231024 D ixgbe_enable_msix +ffffffff83232000 D ixl_cd +ffffffff83232020 d ixl_sff_lock +ffffffff83233000 D xge_cd +ffffffff83234000 D thtc_cd +ffffffff83234020 D tht_cd +ffffffff83234040 D tht_txt_desc +ffffffff83234068 D tht_rxf_desc +ffffffff83234090 D tht_rxd_desc +ffffffff832340b8 D tht_txf_desc +ffffffff83235000 D myx_cd +ffffffff83236000 D oce_cd +ffffffff83237000 D dc_devs +ffffffff83238000 D cas_cd +ffffffff83239000 D sis_cd +ffffffff8323a000 D se_cd +ffffffff8323b000 D mbg_cd +ffffffff8323c000 D cbb_cd +ffffffff8323c020 D yc_chipsets +ffffffff8323c1b0 d pccbb_funcs +ffffffff8323c1e0 d pccbb_pcmcia_funcs +ffffffff8323d000 D skc_cd +ffffffff8323d020 D sk_cd +ffffffff8323e000 D mskc_cd +ffffffff8323e020 D msk_cd +ffffffff8323f000 D puc_cd +ffffffff83240000 D puc_ndevs +ffffffff83241000 D iwi_cd +ffffffff83242000 D wpi_cd +ffffffff83243000 D iwn_cd +ffffffff83244000 D iwm_cd +ffffffff83245000 D iwx_cd +ffffffff83246000 D cmpci_cd +ffffffff83247000 D iha_cd +ffffffff83248000 D pcscp_cd +ffffffff83248020 D pcscp_glue +ffffffff83249000 D bge_cd +ffffffff8324a000 D bnx_firmwares +ffffffff8324a160 D bnx_rv2ps +ffffffff8324a1c0 D bnx_cd +ffffffff8324a1e0 d flash_5709 +ffffffff8324a210 d flash_table +ffffffff8324b000 D vge_cd +ffffffff8324c000 D stge_cd +ffffffff8324d000 D nfe_cd +ffffffff8324e000 D et_cd +ffffffff8324f000 D jme_cd +ffffffff83250000 D age_cd +ffffffff83251000 D alc_dma_burst +ffffffff83251020 D alc_cd +ffffffff83252000 D ale_cd +ffffffff83253000 D amdpm_cd +ffffffff83253020 d amdpm_timecounter +ffffffff83254000 D bce_cd +ffffffff83255000 D rtwn_cd +ffffffff83256000 d ral_rt2560_opns +ffffffff83256028 d ral_rt2661_opns +ffffffff83256050 d ral_rt2860_opns +ffffffff83257000 D piixpm_cd +ffffffff83258000 D vic_cd +ffffffff83259000 D vmx_cd +ffffffff8325a000 D vmwpvs_cd +ffffffff8325b000 D lii_cd +ffffffff8325c000 D ichiic_cd +ffffffff8325d000 D viapm_cd +ffffffff8325d020 d viapm_timecounter +ffffffff8325e000 D amdiic_cd +ffffffff8325f000 D nviic_cd +ffffffff83260000 D kate_cd +ffffffff83261000 D km_cd +ffffffff83262000 D cpu_model_offsets +ffffffff83262070 D ksmn_cd +ffffffff83263000 D itherm_cd +ffffffff83264000 D pchtemp_cd +ffffffff83265000 D xspd_cd +ffffffff83266000 D virtio_pci_ops +ffffffff83267000 D bwfm_pci_buscore_ops +ffffffff83267030 D bwfm_pci_bus_ops +ffffffff83267058 D bwfm_pci_msgbuf_ops +ffffffff83268000 D bnxt_cd +ffffffff83269000 D mcx_cd +ffffffff8326a000 D iavf_cd +ffffffff8326b000 D rge_cd +ffffffff8326c000 D igc_cd +ffffffff8326d000 D ngbe_cd +ffffffff8326e000 D agp_cd +ffffffff8326f000 D intagp_cd +ffffffff8326f020 D agp_i810_methods +ffffffff83270000 D reservation_ww_class +ffffffff83271000 d bridge_lock +ffffffff83271010 d bridge_list +ffffffff83272000 d drm_connector_enum_list +ffffffff832721f8 d connector_list_lock +ffffffff83272208 d connector_list +ffffffff83273000 d kernel_fb_helper_list +ffffffff83273010 d kernel_fb_helper_lock +ffffffff83274000 D drm_global_mutex +ffffffff83275000 D i2c_bit_algo +ffffffff83275010 d drm_fence_context_count +ffffffff83275018 d dma_fence_stub_mtx +ffffffff83275028 D wait_bit_mtx +ffffffff83275038 D shrinkers +ffffffff83276000 d crtc_ww_class +ffffffff83277000 d panel_lock +ffffffff83277010 d panel_list +ffffffff83278000 d ttm_global_mutex +ffffffff83279000 D intel_bbops +ffffffff8327a000 d i915_sys_placement +ffffffff8327a020 d i915_ttm_bo_driver +ffffffff8327b000 d mchdev_lock +ffffffff8327c000 D inteldrm_stdscreen +ffffffff8327c030 D inteldrm_scrlist +ffffffff8327c038 D inteldrm_screenlist +ffffffff8327c048 D inteldrm_accessops +ffffffff8327c0a8 D inteldrm_cd +ffffffff8327d000 d capture_mutex +ffffffff8327e000 d mitigations +ffffffff8327f000 D i915_modparams +ffffffff83280000 d schedule_lock +ffffffff83281000 d unbind_fence_ops +ffffffff83282000 D intel_graphics_stolen_res +ffffffff83283000 D btc_valid_sclk +ffffffff83284000 d evergreen_cs_packet_parse_vline.vline_start_end +ffffffff83284020 d evergreen_cs_packet_parse_vline.vline_status +ffffffff83285000 d r600_cs_packet_parse_vline.vline_start_end +ffffffff83285008 d r600_cs_packet_parse_vline.vline_status +ffffffff83286000 d r100_asic +ffffffff832862e0 d r200_asic +ffffffff832865c0 d r300_asic_pcie +ffffffff832868a0 d r300_asic +ffffffff83286b80 d r420_asic +ffffffff83286e60 d rs400_asic +ffffffff83287140 d rs600_asic +ffffffff83287420 d rs690_asic +ffffffff83287700 d rv515_asic +ffffffff832879e0 d r520_asic +ffffffff83287cc0 d r600_asic +ffffffff83287fa0 d rv6xx_asic +ffffffff83288280 d rs780_asic +ffffffff83288560 d rv770_asic +ffffffff83288840 d evergreen_asic +ffffffff83288b20 d sumo_asic +ffffffff83288e00 d btc_asic +ffffffff832890e0 d cayman_asic +ffffffff832893c0 d trinity_asic +ffffffff832896a0 d si_asic +ffffffff83289980 d ci_asic +ffffffff83289c60 d kv_asic +ffffffff8328a000 d dce6_funcs +ffffffff8328a018 d dce6_hdmi_funcs +ffffffff8328a088 d dce6_dp_funcs +ffffffff8328a0f8 d dce4_funcs +ffffffff8328a110 d dce4_hdmi_funcs +ffffffff8328a180 d dce4_dp_funcs +ffffffff8328a1f0 d dce32_funcs +ffffffff8328a208 d dce32_hdmi_funcs +ffffffff8328a278 d dce32_dp_funcs +ffffffff8328a2e8 d r600_funcs +ffffffff8328a300 d r600_hdmi_funcs +ffffffff8328b000 D radeon_modeset +ffffffff8328b004 D radeon_dynclks +ffffffff8328b008 D radeon_agpmode +ffffffff8328b00c D radeon_gart_size +ffffffff8328b010 D radeon_tv +ffffffff8328b014 D radeon_audio +ffffffff8328b018 D radeon_pcie_gen2 +ffffffff8328b01c D radeon_msi +ffffffff8328b020 D radeon_lockup_timeout +ffffffff8328b024 D radeon_dpm +ffffffff8328b028 D radeon_aspm +ffffffff8328b02c D radeon_runtime_pm +ffffffff8328b030 D radeon_vm_size +ffffffff8328b034 D radeon_vm_block_size +ffffffff8328b038 D radeon_use_pflipirq +ffffffff8328b03c D radeon_bapm +ffffffff8328b040 D radeon_backlight +ffffffff8328b044 D radeon_auxch +ffffffff8328b048 D radeon_uvd +ffffffff8328b04c D radeon_vce +ffffffff8328b050 D radeon_si_support +ffffffff8328b054 D radeon_cik_support +ffffffff8328b058 D radeondrm_cd +ffffffff8328b078 D radeondrm_stdscreen +ffffffff8328b0a8 D radeondrm_scrlist +ffffffff8328b0b0 D radeondrm_screenlist +ffffffff8328b0c0 D radeondrm_accessops +ffffffff8328c000 D radeon_bbops +ffffffff8328d000 d radeon_bo_driver +ffffffff8328e000 d verde_pg_init +ffffffff8328f000 d cac_weights_pitcairn +ffffffff8328f4d0 d cac_weights_oland +ffffffff83290000 d aldebaran_mode2_handler +ffffffff83291000 d amdgpu_vbios_version_attrs +ffffffff83292000 D amdgpu_asic_name +ffffffff83293000 D amdgpu_gart_size +ffffffff83293004 D amdgpu_gtt_size +ffffffff83293008 D amdgpu_moverate +ffffffff8329300c D amdgpu_audio +ffffffff83293010 D amdgpu_pcie_gen2 +ffffffff83293014 D amdgpu_msi +ffffffff83293018 D amdgpu_dpm +ffffffff8329301c D amdgpu_fw_load_type +ffffffff83293020 D amdgpu_aspm +ffffffff83293024 D amdgpu_runtime_pm +ffffffff83293028 D amdgpu_ip_block_mask +ffffffff8329302c D amdgpu_bapm +ffffffff83293030 D amdgpu_vm_size +ffffffff83293034 D amdgpu_vm_fragment_size +ffffffff83293038 D amdgpu_vm_block_size +ffffffff8329303c D amdgpu_vm_update_mode +ffffffff83293040 D amdgpu_dc +ffffffff83293044 D amdgpu_sched_jobs +ffffffff83293048 D amdgpu_sched_hw_submission +ffffffff83293050 D amdgpu_cg_mask +ffffffff83293058 D amdgpu_pg_mask +ffffffff8329305c D amdgpu_sdma_phase_quantum +ffffffff83293060 D amdgpu_pp_feature_mask +ffffffff83293064 D amdgpu_lbpw +ffffffff83293068 D amdgpu_compute_multipipe +ffffffff8329306c D amdgpu_gpu_recovery +ffffffff83293070 D amdgpu_smu_pptable_id +ffffffff83293074 D amdgpu_dc_feature_mask +ffffffff83293078 D amdgpu_async_gfx_ring +ffffffff8329307c D amdgpu_discovery +ffffffff83293080 D amdgpu_noretry +ffffffff83293084 D amdgpu_force_asic_type +ffffffff83293088 D amdgpu_tmz +ffffffff8329308c D amdgpu_reset_method +ffffffff83293090 D amdgpu_num_kcq +ffffffff83293094 D amdgpu_use_xgmi_p2p +ffffffff83293098 D amdgpu_sg_display +ffffffff832930a0 D mgpu_info +ffffffff83293250 D amdgpu_ras_enable +ffffffff83293254 D amdgpu_ras_mask +ffffffff83293258 D amdgpu_bad_page_threshold +ffffffff8329325c D amdgpu_backlight +ffffffff83293260 D amdgpu_cd +ffffffff83293280 D amdgpu_stdscreen +ffffffff832932b0 D amdgpu_scrlist +ffffffff832932b8 D amdgpu_screenlist +ffffffff832932c8 D amdgpu_accessops +ffffffff83294000 d amdgpu_gtt_mgr_attributes +ffffffff83295000 D amdgpu_bbops +ffffffff83296000 D soc15_ih_clientid_name +ffffffff83297000 D ras_error_string +ffffffff83297030 D ras_block_string +ffffffff832970c0 D ras_mca_block_string +ffffffff83298000 d amdgpu_bo_driver +ffffffff83299000 d amdgpu_vram_mgr_attributes +ffffffff8329a000 D amdgpu_xgmi_hive_type +ffffffff8329a008 d xgmi_mutex +ffffffff8329a018 D xgmi_ras_hw_ops +ffffffff8329a058 D xgmi_ras +ffffffff8329b000 d gfx_v9_0_ras +ffffffff8329c000 D gfx_v9_4_ras +ffffffff8329d000 D gfx_v9_4_2_ras_ops +ffffffff8329d040 D gfx_v9_4_2_ras +ffffffff8329e000 D hdp_v4_0_ras_hw_ops +ffffffff8329e040 D hdp_v4_0_ras +ffffffff8329f000 d jpeg_v2_6_ras +ffffffff832a0000 D mca_v3_0_mp0_ras +ffffffff832a0058 D mca_v3_0_mp1_ras +ffffffff832a00b0 D mca_v3_0_mpio_ras +ffffffff832a1000 D mmhub_v1_0_ras_hw_ops +ffffffff832a1040 D mmhub_v1_0_ras +ffffffff832a2000 D mmhub_v1_7_ras_hw_ops +ffffffff832a2040 D mmhub_v1_7_ras +ffffffff832a3000 D mmhub_v9_4_ras +ffffffff832a4000 D nbio_v7_4_ras +ffffffff832a5000 d sriov_sc_video_codecs_encode +ffffffff832a5010 d sriov_sc_video_codecs_decode +ffffffff832a5020 d sriov_sc_video_codecs_encode_array +ffffffff832a5050 d sriov_sc_video_codecs_decode_array +ffffffff832a6000 d sdma_v4_0_ras +ffffffff832a7000 D sdma_v4_4_ras +ffffffff832a8000 d sienna_cichlid_mode2_handler +ffffffff832a9000 D umc_v6_1_ras +ffffffff832aa000 D umc_v6_7_ras +ffffffff832ab000 D umc_v8_10_ras +ffffffff832ac000 D umc_v8_7_ras +ffffffff832ad000 d vcn_v2_6_ras +ffffffff832ae000 d amdgpu_dm_mode_config_helperfuncs +ffffffff832ae010 d dm_atomic_state_funcs +ffffffff832af000 d construct_integrated_info.result +ffffffff832af004 d bios_parser_get_firmware_info.result +ffffffff832b0000 d dce_funcs +ffffffff832b1000 d dce110_funcs +ffffffff832b2000 d dce112_funcs +ffffffff832b3000 d dce120_funcs +ffffffff832b4000 d rv1_clk_funcs +ffffffff832b4088 d rv1_clk_internal_funcs +ffffffff832b5000 d rv2_clk_internal_funcs +ffffffff832b6000 d dcn2_funcs +ffffffff832b7000 D dcn201_funcs +ffffffff832b8000 d dcn21_funcs +ffffffff832b8088 d rn_bw_params +ffffffff832b9000 D dcn3_fpga_funcs +ffffffff832b9088 d dcn3_funcs +ffffffff832ba000 d vg_funcs +ffffffff832ba088 d dummy_clocks +ffffffff832ba1b8 d vg_bw_params +ffffffff832bb000 d dcn31_funcs +ffffffff832bb088 d dcn31_bw_params +ffffffff832bc000 d dcn314_funcs +ffffffff832bc088 d dcn314_bw_params +ffffffff832bd000 d dcn315_funcs +ffffffff832bd088 d dcn315_bw_params +ffffffff832be000 d dcn316_funcs +ffffffff832be088 d dcn316_bw_params +ffffffff832bf000 d dcn32_funcs +ffffffff832c0000 d dcn10_dpp_cap +ffffffff832c1000 D aperture_default_system +ffffffff832c2000 d dcn20_dpp_funcs +ffffffff832c2110 d dcn20_dpp_cap +ffffffff832c3000 d dcn20_hubp_funcs +ffffffff832c4000 d dcn20_opp_funcs +ffffffff832c5000 d dcn20_tg_funcs +ffffffff832c6000 d dcn201_dpp_funcs +ffffffff832c6110 d dcn201_dpp_cap +ffffffff832c7000 d dcn201_hubp_funcs +ffffffff832c8000 d dcn201_opp_funcs +ffffffff832c9000 d dcn201_tg_funcs +ffffffff832ca000 D dcn201_ip +ffffffff832ca1b8 D dcn201_soc +ffffffff832cab88 d dcn201_res_pool_funcs +ffffffff832cb000 d dcn21_hubp_funcs +ffffffff832cc000 d dcn30_afmt_funcs +ffffffff832cd000 d dcn30_dpp_funcs +ffffffff832cd110 d dcn30_dpp_cap +ffffffff832ce000 d dcn30_hubp_funcs +ffffffff832cf000 d dcn30_tg_funcs +ffffffff832d0000 d dcn30_vpg_funcs +ffffffff832d1000 d res_cap_dcn301 +ffffffff832d1040 d dcn301_res_pool_funcs +ffffffff832d2000 d dcn302_res_pool_funcs +ffffffff832d3000 d dcn303_res_pool_funcs +ffffffff832d4000 d dcn31_afmt_funcs +ffffffff832d5000 d dcn31_apg_funcs +ffffffff832d6000 d dcn31_hpo_dp_link_encoder_funcs +ffffffff832d7000 d dcn31_hubp_funcs +ffffffff832d8000 d dcn31_tg_funcs +ffffffff832d9000 d dcn31_res_pool_funcs +ffffffff832da000 d dcn31_vpg_funcs +ffffffff832db000 d dcn314_tg_funcs +ffffffff832dc000 d dcn314_res_pool_funcs +ffffffff832dd000 d dcn315_res_pool_funcs +ffffffff832de000 d dcn316_res_pool_funcs +ffffffff832df000 d dcn32_dpp_funcs +ffffffff832df110 d dcn32_dpp_cap +ffffffff832e0000 d dcn32_hpo_dp_link_encoder_funcs +ffffffff832e1000 d dcn32_hubp_funcs +ffffffff832e2000 d dcn32_tg_funcs +ffffffff832e3000 d dcn32_res_pool_funcs +ffffffff832e4000 d dcn321_res_pool_funcs +ffffffff832e5000 D dcn1_0_ip +ffffffff832e51b8 D dcn1_0_soc +ffffffff832e6000 D dcn2_0_ip +ffffffff832e61b8 D dcn2_0_nv14_ip +ffffffff832e6370 D dcn2_0_soc +ffffffff832e6d40 D dcn2_0_nv14_soc +ffffffff832e7710 D dcn2_1_ip +ffffffff832e78c8 D dcn2_1_soc +ffffffff832e8298 D ddr4_wm_table_gs +ffffffff832e8358 D lpddr4_wm_table_gs +ffffffff832e8418 D lpddr4_wm_table_with_disabled_ppt +ffffffff832e84d8 D ddr4_wm_table_rn +ffffffff832e8598 D ddr4_1R_wm_table_rn +ffffffff832e8658 D lpddr4_wm_table_rn +ffffffff832e9000 D dcn3_0_ip +ffffffff832e91b8 D dcn3_0_soc +ffffffff832ea000 D dcn3_01_ip +ffffffff832ea1b8 D dcn3_01_soc +ffffffff832eab88 D ddr4_wm_table +ffffffff832eac48 D lpddr5_wm_table +ffffffff832eb000 D dcn3_02_ip +ffffffff832eb1b8 D dcn3_02_soc +ffffffff832ec000 D dcn3_03_ip +ffffffff832ec1b8 D dcn3_03_soc +ffffffff832ed000 D dcn3_1_ip +ffffffff832ed1b8 D dcn3_15_ip +ffffffff832ed370 D dcn3_16_ip +ffffffff832ed528 d dcn3_15_soc +ffffffff832edef8 d dcn3_1_soc +ffffffff832ee8c8 d dcn3_16_soc +ffffffff832f0000 D dcn3_14_ip +ffffffff832f01b8 D dcn3_14_soc +ffffffff832f1000 D dcn3_2_ip +ffffffff832f11b8 D dcn3_2_soc +ffffffff832f2000 D dcn3_21_ip +ffffffff832f21b8 D dcn3_21_soc +ffffffff832f3000 d dsc_policy_max_target_bpp_limit +ffffffff832f4000 D DIDTEDCConfig_P12 +ffffffff832f4070 d smu7_profiling +ffffffff832f5000 d cyan_skillfish_table_map +ffffffff832f5080 d cyan_skillfish_message_map +ffffffff832f6000 d navi10_table_map +ffffffff832f6080 d navi10_pwr_src_map +ffffffff832f6090 d navi10_workload_map +ffffffff832f60d0 d navi10_message_map +ffffffff832f6b20 d navi10_clk_map +ffffffff832f6be0 d navi10_feature_mask_map +ffffffff832f7000 d sienna_cichlid_message_map +ffffffff832f7a50 d sienna_cichlid_table_map +ffffffff832f7ad0 d sienna_cichlid_pwr_src_map +ffffffff832f7ae0 d sienna_cichlid_workload_map +ffffffff832f7b20 d sienna_cichlid_clk_map +ffffffff832f7be0 d sienna_cichlid_feature_mask_map +ffffffff832f8000 d vangogh_message_map +ffffffff832f8a50 d vangogh_table_map +ffffffff832f8ad0 d vangogh_workload_map +ffffffff832f8b10 d vangogh_feature_mask_map +ffffffff832f9000 d renoir_table_map +ffffffff832f9080 d renoir_workload_map +ffffffff832f90c0 d renoir_message_map +ffffffff832f9b10 d renoir_clk_map +ffffffff832fa000 d smu_v13_0_0_message_map +ffffffff832faa50 d smu_v13_0_0_feature_mask_map +ffffffff832fae20 d smu_v13_0_0_table_map +ffffffff832faea0 d smu_v13_0_0_pwr_src_map +ffffffff832faeb0 d smu_v13_0_0_workload_map +ffffffff832faef0 d smu_v13_0_0_clk_map +ffffffff832fb000 d smu_v13_0_4_message_map +ffffffff832fba50 d smu_v13_0_4_table_map +ffffffff832fbad0 d smu_v13_0_4_feature_mask_map +ffffffff832fc000 d smu_v13_0_5_table_map +ffffffff832fc080 d smu_v13_0_5_message_map +ffffffff832fcad0 d smu_v13_0_5_feature_mask_map +ffffffff832fd000 d smu_v13_0_7_message_map +ffffffff832fda50 d smu_v13_0_7_feature_mask_map +ffffffff832fde20 d smu_v13_0_7_table_map +ffffffff832fdea0 d smu_v13_0_7_pwr_src_map +ffffffff832fdeb0 d smu_v13_0_7_workload_map +ffffffff832fdef0 d smu_v13_0_7_clk_map +ffffffff832fe000 d yellow_carp_table_map +ffffffff832fe080 d yellow_carp_message_map +ffffffff832fead0 d yellow_carp_feature_mask_map +ffffffff832ff000 D pci_conf_lock +ffffffff832ff010 D pci_bus_dma_tag +ffffffff832ff088 D msi_pic +ffffffff832ff118 D msix_pic +ffffffff83300000 D pchb_cd +ffffffff83301000 D amas_cd +ffffffff83302000 D cardslot_cd +ffffffff83303000 D cardbus_cd +ffffffff83304000 d csdevs +ffffffff83305000 d ral_rt2560_opns +ffffffff83305028 d ral_rt2661_opns +ffffffff83305050 d ral_rt2860_opns +ffffffff83306000 D pcmcia_cd +ffffffff83307000 D pcmcia_3cxem556_func0 +ffffffff833070b8 D pcmcia_3cxem556_func0_cfe0 +ffffffff83307158 D pcmcia_megahertz_xjem1144_func0 +ffffffff83307210 D pcmcia_megahertz_xjem1144_func0_cfe0 +ffffffff833072b0 d pcmcia_3cxem556_func1 +ffffffff83307368 d pcmcia_3cxem556_func1_cfe0 +ffffffff83307408 d pcmcia_megahertz_xjem1144_func1 +ffffffff833074c0 d pcmcia_megahertz_xjem1144_func1_cfe0 +ffffffff83307560 d pcmcia_sierra_a555_func1 +ffffffff83307618 d pcmcia_sierra_a555_func1_cfe0 +ffffffff833076b8 d pcmcia_sveclancard_func0 +ffffffff83307770 d pcmcia_sveclancard_func0_cfe0 +ffffffff83308000 D ep_pcmcia_prod +ffffffff83309000 D aic_pcmcia_prod +ffffffff8330a000 D com_pcmcia_prod +ffffffff8330b000 D wdc_pcmcia_pr +ffffffff8330c000 D sm_pcmcia_prod +ffffffff8330d000 D xe_cd +ffffffff8330e000 D pcib_cd +ffffffff8330f000 D amdpcib_cd +ffffffff83310000 D tcpcib_cd +ffffffff83311000 D aapic_cd +ffffffff83312000 D hme_cd +ffffffff83313000 D isa_cd +ffffffff83314000 D isadma_cd +ffffffff83315000 D fdc_cd +ffffffff83316000 D fd_types +ffffffff833161f8 D fd_cd +ffffffff83317000 D mpu_cd +ffffffff83318000 D pcppi_cd +ffffffff83319000 D spkr_cd +ffffffff8331a000 D wbsio_cd +ffffffff8331b000 D schsio_cd +ffffffff8331c000 D it_cd +ffffffff8331d000 D uguru_cd +ffffffff8331e000 D aps_cd +ffffffff8331f000 D isa_bus_dma_tag +ffffffff83320000 D wsdisplay_cd +ffffffff83320020 D wsdisplay_cons +ffffffff83320058 D wsdisplay_defaultscreens +ffffffff83321000 D wskbd_cd +ffffffff83321020 D wskbd_default_bell_data +ffffffff83321030 D wskbd_default_keyrepeat_data +ffffffff83321040 D wskbd_srcops +ffffffff83322000 d compose_tab +ffffffff83323000 D wsmouse_cd +ffffffff83323020 D wsmouse_srcops +ffffffff83324000 D wsmux_srcops +ffffffff83324030 D wsmux_tree_lock +ffffffff83325000 D vt100_output +ffffffff83326000 D pckbd_cd +ffffffff83327000 D pms_cd +ffffffff83327020 d synaptics_params +ffffffff83327030 d alps_params +ffffffff83328000 D skgpio_cd +ffffffff83329000 D pctr_conf_lock +ffffffff8332a000 D ukbd_keymapdata +ffffffff8332b000 D usbrev_str +ffffffff8332b030 D usb_cd +ffffffff8332c000 d usbd_ratecheck.errinterval +ffffffff8332d000 D uhub_cd +ffffffff8332e000 D uaudio_cd +ffffffff8332f000 D uvideo_ctrls +ffffffff8332f2d8 D uvideo_cd +ffffffff83330000 D utvfu_norm_params +ffffffff83330030 D utvfu_cd +ffffffff83331000 D udl_reg_vals_640x480_60 +ffffffff83331020 D udl_reg_vals_640x480_67 +ffffffff83331040 D udl_reg_vals_640x480_72 +ffffffff83331060 D udl_reg_vals_640x480_75 +ffffffff83331080 D udl_reg_vals_800x480_61 +ffffffff833310a0 D udl_reg_vals_800x600_56 +ffffffff833310c0 D udl_reg_vals_800x600_60 +ffffffff833310e0 D udl_reg_vals_800x600_72 +ffffffff83331100 D udl_reg_vals_800x600_74 +ffffffff83331120 D udl_reg_vals_800x600_75 +ffffffff83331140 D udl_reg_vals_1024x768_60 +ffffffff83331160 D udl_reg_vals_1024x768_70 +ffffffff83331180 D udl_reg_vals_1024x768_75 +ffffffff833311a0 D udl_reg_vals_1280x800_60 +ffffffff833311c0 D udl_reg_vals_1280x960_60 +ffffffff833311e0 D udl_reg_vals_1280x1024_60 +ffffffff83331200 D udl_reg_vals_1280x1024_75 +ffffffff83331220 D udl_reg_vals_1366x768_60 +ffffffff83331240 D udl_reg_vals_1440x900_60 +ffffffff83331260 D udl_reg_vals_1440x900_59 +ffffffff83331280 D udl_reg_vals_1440x900_75 +ffffffff833312a0 D udl_reg_vals_1680x1050_60 +ffffffff833312c0 D udl_reg_vals_1600x1200_60 +ffffffff833312e0 D udl_reg_vals_1920x1080_60 +ffffffff83331300 D udl_null_key_1 +ffffffff83331310 D udl_decomp_table +ffffffff83332510 D udl_cd +ffffffff83332530 D udl_stdscreen +ffffffff83332560 D udl_scrlist +ffffffff83332568 D udl_screenlist +ffffffff83332578 D udl_accessops +ffffffff83333000 D umidi_cd +ffffffff83334000 d umq_YAMAHA_YAMAHA_UX256_ANYIFACE +ffffffff83334020 d umq_ROLAND_ROLAND_UM1_2 +ffffffff83334040 d umq_ROLAND_ROLAND_SC8850_2 +ffffffff83334060 d umq_ROLAND_ROLAND_SD90_2 +ffffffff83334080 d umq_ROLAND_ROLAND_UM880N_0 +ffffffff833340a0 d umq_ROLAND_ROLAND_UA100_2 +ffffffff833340c0 d umq_ROLAND_ROLAND_UM4_2 +ffffffff833340e0 d umq_ROLAND_ROLAND_U8_2 +ffffffff83334100 d umq_ROLAND_ROLAND_UM2_2 +ffffffff83334120 d umq_ROLAND_ROLAND_SC8820_2 +ffffffff83334140 d umq_ROLAND_ROLAND_PC300_2 +ffffffff83334160 d umq_ROLAND_ROLAND_SK500_2 +ffffffff83334180 d umq_ROLAND_ROLAND_SCD70_2 +ffffffff833341a0 d umq_ROLAND_ROLAND_UM550_0 +ffffffff833341c0 d umq_ROLAND_ROLAND_SD20_0 +ffffffff833341e0 d umq_ROLAND_ROLAND_SD80_0 +ffffffff83334200 d umq_ROLAND_ROLAND_UA700_3 +ffffffff83334220 d umq_ROLAND_ROLAND_UMONE_ANYIFACE +ffffffff83334240 D umidi_quirklist +ffffffff833344a0 d umq_YAMAHA_YAMAHA_UX256_ANYIFACE_fixed_ep_desc +ffffffff833344c0 d umq_YAMAHA_YAMAHA_UX256_ANYIFACE_fixed_ep_endpoints +ffffffff833344d0 d umq_ROLAND_ROLAND_UM1_2_fixed_ep_desc +ffffffff833344f0 d umq_ROLAND_ROLAND_UM1_2_fixed_ep_endpoints +ffffffff83334500 d umq_ROLAND_ROLAND_SC8850_2_fixed_ep_desc +ffffffff83334520 d umq_ROLAND_ROLAND_SC8850_2_fixed_ep_endpoints +ffffffff83334530 d umq_ROLAND_ROLAND_SD90_2_fixed_ep_desc +ffffffff83334550 d umq_ROLAND_ROLAND_SD90_2_fixed_ep_endpoints +ffffffff83334560 d umq_ROLAND_ROLAND_UM880N_0_fixed_ep_desc +ffffffff83334580 d umq_ROLAND_ROLAND_UM880N_0_fixed_ep_endpoints +ffffffff83334590 d umq_ROLAND_ROLAND_UA100_2_fixed_ep_desc +ffffffff833345b0 d umq_ROLAND_ROLAND_UA100_2_fixed_ep_endpoints +ffffffff833345c0 d umq_ROLAND_ROLAND_UM4_2_fixed_ep_desc +ffffffff833345e0 d umq_ROLAND_ROLAND_UM4_2_fixed_ep_endpoints +ffffffff833345f0 d umq_ROLAND_ROLAND_U8_2_fixed_ep_desc +ffffffff83334610 d umq_ROLAND_ROLAND_U8_2_fixed_ep_endpoints +ffffffff83334620 d umq_ROLAND_ROLAND_UM2_2_fixed_ep_desc +ffffffff83334640 d umq_ROLAND_ROLAND_UM2_2_fixed_ep_endpoints +ffffffff83334650 d umq_ROLAND_ROLAND_SC8820_2_fixed_ep_desc +ffffffff83334670 d umq_ROLAND_ROLAND_SC8820_2_fixed_ep_endpoints +ffffffff83334680 d umq_ROLAND_ROLAND_PC300_2_fixed_ep_desc +ffffffff833346a0 d umq_ROLAND_ROLAND_PC300_2_fixed_ep_endpoints +ffffffff833346b0 d umq_ROLAND_ROLAND_SK500_2_fixed_ep_desc +ffffffff833346d0 d umq_ROLAND_ROLAND_SK500_2_fixed_ep_endpoints +ffffffff833346e0 d umq_ROLAND_ROLAND_SCD70_2_fixed_ep_desc +ffffffff83334700 d umq_ROLAND_ROLAND_SCD70_2_fixed_ep_endpoints +ffffffff83334710 d umq_ROLAND_ROLAND_UM550_0_fixed_ep_desc +ffffffff83334730 d umq_ROLAND_ROLAND_UM550_0_fixed_ep_endpoints +ffffffff83334740 d umq_ROLAND_ROLAND_SD20_0_fixed_ep_desc +ffffffff83334760 d umq_ROLAND_ROLAND_SD20_0_fixed_ep_endpoints +ffffffff83334770 d umq_ROLAND_ROLAND_SD80_0_fixed_ep_desc +ffffffff83334790 d umq_ROLAND_ROLAND_SD80_0_fixed_ep_endpoints +ffffffff833347a0 d umq_ROLAND_ROLAND_UA700_3_fixed_ep_desc +ffffffff833347c0 d umq_ROLAND_ROLAND_UA700_3_fixed_ep_endpoints +ffffffff833347d0 d umq_ROLAND_ROLAND_UMONE_ANYIFACE_fixed_ep_desc +ffffffff833347f0 d umq_ROLAND_ROLAND_UMONE_ANYIFACE_fixed_ep_endpoints +ffffffff83335000 D ucom_cd +ffffffff83335020 D sysctl_ucomlock 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pdevnames_size +ffffffff833e97c0 D pdevinit +ffffffff833ea000 D rootdev +ffffffff833ea004 D dumpdev +ffffffff833ea010 D swdevt +ffffffff833eb000 A __kudata_start +ffffffff833eb000 D tlb_shoot_first_pcid +ffffffff833eb008 D tlb_shoot_addr1 +ffffffff833eb010 D tlb_shoot_addr2 +ffffffff833eb018 D tlb_shoot_wait +ffffffff833ec000 A __kudata_end +ffffffff833ec000 C _edata +ffffffff833ec000 b drm_minors_idr +ffffffff833ec008 B drm_refcnt +ffffffff833ed000 B vga_console_screen +ffffffff833ed070 B vga_console_attached +ffffffff833ed078 B vga_console_vc +ffffffff833ed488 B vgaconsole +ffffffff833ed48c B vga_console_type +ffffffff833ee000 b wdc_alloc_queue.inited +ffffffff833ee008 B wdc_xfer_pool +ffffffff833ee1b0 B wdc_xfer_iopool +ffffffff833ef000 B aic_debug +ffffffff833f0000 B gdt_cnt +ffffffff833f0004 B gdt_polling +ffffffff833f0005 B gdt_from_wait +ffffffff833f0008 b gdt_exec_ccb.__level +ffffffff833f000c B gdt_wait_index +ffffffff833f0010 B gdt_wait_gdt +ffffffff833f1000 B sili_error_pmp_ports +ffffffff833f2000 B ncr53c9x_debug +ffffffff833f2008 b ecb_iopool +ffffffff833f2048 b ecb_pool_initialized +ffffffff833f2050 b ecb_pool +ffffffff833f21f8 B sdebug +ffffffff833f3000 B epic_copy_small +ffffffff833f4000 B comconsaddr +ffffffff833f4008 B comconsiot +ffffffff833f4010 B comconsioh +ffffffff833f4018 B comconsfreq +ffffffff833f401c B comcons_reg_width +ffffffff833f4020 B commajor +ffffffff833f4024 B comconsunit +ffffffff833f4028 B comcons_reg_shift +ffffffff833f402c B comconsattached +ffffffff833f5000 B pckbc_console +ffffffff833f5004 B pckbc_console_attached +ffffffff833f5008 B pckbc_consdata +ffffffff833f50e0 b pckbc_cons_slotdata +ffffffff833f6000 b cy_poll.counter +ffffffff833f7000 B atw_xindiv2 +ffffffff833f8000 B rtw_rfprog_fallback +ffffffff833f8004 B rtw_do_chip_reset +ffffffff833f9000 b malo_cmd_string.cmd_buf +ffffffff833fa000 b iosf_mbi +ffffffff833fb000 B uhcixfer +ffffffff833fc000 B ohcixfer +ffffffff833fc008 b ohci_intr.ohci_intr_tv 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B tree_src_tracking +ffffffff834076f0 B pf_sn_item_pl +ffffffff83407898 B pf_statetbl +ffffffff834078a0 B pf_state_item_pl +ffffffff83407a48 B pf_state_key_pl +ffffffff83407bf0 B pf_purge_states_limit +ffffffff83407bf8 B pf_rule_item_pl +ffffffff83407da0 b pf_purge_expired_states.cur +ffffffff83407da8 B pf_tcp_secret_init +ffffffff83407db0 B pf_tcp_secret +ffffffff83407dc0 B pf_tcp_secret_ctx +ffffffff83407e90 B pf_tcp_iss_off +ffffffff83407ea0 B pf_queues +ffffffff83407ec0 B pf_queues_active +ffffffff83407ec8 B pf_queues_inactive +ffffffff83407ed0 B pf_rule_pl +ffffffff83408078 B pf_queue_pl +ffffffff83409000 B pf_frent_pl +ffffffff834091a8 B pf_frnode_pl +ffffffff83409350 B pf_frag_pl +ffffffff834094f8 B pf_state_scrub_pl +ffffffff834096a0 B pf_fragqueue +ffffffff834096b0 B pf_frag_mtx +ffffffff834096c0 B pf_nfrents +ffffffff834096c8 B pf_frnode_tree +ffffffff8340a000 B pf_anchors +ffffffff8340a008 B pf_main_anchor +ffffffff8340a510 B pf_anchor_pl +ffffffff8340b000 B pf_ioctl_trans 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ffs_alloc.fsfull_last +ffffffff83509010 b ffs_realloccg.fsfull_last +ffffffff83509020 b ffs_inode_alloc.fsnoinodes_last +ffffffff8350a000 B ffs_ino_pool +ffffffff8350a1a8 B ffs_dinode2_pool +ffffffff8350a350 B ffs_dinode1_pool +ffffffff8350a4f8 b ffs_init.done +ffffffff8350b000 B lk +ffffffff8350b008 B softdep_workitem_pending +ffffffff8350b010 B worklist_tail +ffffffff8350b018 B num_on_worklist +ffffffff8350b020 B filesys_syncer +ffffffff8350b028 B softdep_worklist_busy +ffffffff8350b02c B req_clear_inodedeps +ffffffff8350b030 B proc_waiting +ffffffff8350b034 B req_clear_remove +ffffffff8350b038 B softdep_worklist_req +ffffffff8350b040 B softdep_hashkey +ffffffff8350b050 B pagedep_hashtbl +ffffffff8350b058 B pagedep_hash +ffffffff8350b060 B pagedep_in_progress +ffffffff8350b078 B pagedep_pool +ffffffff8350b220 B inodedep_hashtbl +ffffffff8350b228 B inodedep_hash +ffffffff8350b230 B num_inodedep +ffffffff8350b238 B max_softdeps +ffffffff8350b240 B inodedep_in_progress +ffffffff8350b258 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stat_blk_limit_push +ffffffff8350c88c B stat_blk_limit_hit +ffffffff8350c890 b clear_remove.next +ffffffff8350c894 b clear_inodedeps.next +ffffffff8350c898 B softdep_freequeue +ffffffff8350d000 b mfs_minor +ffffffff8350e000 B ufs_mindirhashsize +ffffffff8350e004 B ufs_dirhashmem +ffffffff8350e008 B ufs_dirhashmaxmem +ffffffff8350e010 B ufsdirhash_mtx +ffffffff8350e020 B ufsdirhash_pool +ffffffff8350e1c8 B ufsdirhash_list +ffffffff8350e1d8 B ufs_dirhashcheck +ffffffff8350e1e0 B ufsdirhash_key +ffffffff8350f000 B ihashkey +ffffffff8350f010 B ihashtbl +ffffffff8350f018 B ihash +ffffffff83510000 B dqhash +ffffffff83510008 B dqhashtbl +ffffffff83510010 B dqhashkey +ffffffff83510020 B dqfreelist +ffffffff83510030 B numdquot +ffffffff83511000 b ufs_init.done +ffffffff83512000 B ext2gennumber +ffffffff83513000 B ext2fs_inode_pool +ffffffff835131a8 B ext2fs_dinode_pool +ffffffff83514000 B uaddr_pool +ffffffff835141a8 B uaddr_bestfit_pool +ffffffff83514350 B uaddr_pivot_pool +ffffffff835144f8 B uaddr_rnd_pool +ffffffff835146a0 B uaddr_kbootstrap +ffffffff83515000 B uvm_amap_chunk_pool +ffffffff835151a8 B uvm_amap_pool +ffffffff83515350 b amap_small_pool_names +ffffffff835153e0 B uvm_small_amap_pool +ffffffff83516e60 B amap_list +ffffffff83517000 B uvm_anon_pool +ffffffff83518000 B uao_swhash_elt_pool +ffffffff835181a8 b uao_create.kernel_object_store +ffffffff835181f0 b uao_create.bootstrap_kernel_object_lock +ffffffff83518200 b uao_create.kobj_alloced +ffffffff83518208 B uvm_aobj_pool +ffffffff835183b0 b uao_list +ffffffff83519000 B udv_list +ffffffff83519008 B udv_lock +ffffffff8351a000 b uvmadvice +ffffffff8351b000 b uvm_pause.toggle +ffffffff8351c000 B uvmexp +ffffffff8351c158 B uvm +ffffffff8351d000 B kernel_map +ffffffff8351d008 b kernel_map_store +ffffffff8351e000 B uvm_maxkaddr +ffffffff8351e008 b uvm_kmapent_mtx +ffffffff8351e018 b uvm_kmapent_last_warn_time +ffffffff8351e028 B uvm_map_entry_kmem_pool +ffffffff8351e1d0 B uvm_map_entry_pool +ffffffff8351e380 b uvm_map_init.kernel_map_entry +ffffffff83548380 B uvm_vmspace_pool +ffffffff83549000 B malloc_conf +ffffffff8354a000 B uvm_wxabort +ffffffff8354b000 B vm_nphysseg +ffffffff8354b010 B vm_physmem +ffffffff8354b310 b virtual_space_start +ffffffff8354b318 b virtual_space_end +ffffffff8354c000 B psegs +ffffffff8354c100 B uvm_pseg_lck +ffffffff8354d000 B uvm_nowait_failed +ffffffff8354e000 B oom +ffffffff8354e008 B swap_priority +ffffffff8354e010 B swapmap +ffffffff8354e018 B vndxfer_pool +ffffffff8354e1c0 B vndbuf_pool +ffffffff8354e370 B oompps +ffffffff8354f000 B kcur +ffffffff8354f008 B uvm_swpkeyscreated +ffffffff8354f00c B uvm_swpkeysdeleted +ffffffff8354f010 B swap_encrypt_initialized +ffffffff8354f014 B swap_ctxt +ffffffff83550000 B uvn_wlist +ffffffff83550008 B uvn_sync_lock +ffffffff83550018 b uvn_flush.lasttime +ffffffff83550028 B uvn_sync_q +ffffffff83551000 b sec_mix +ffffffff83551040 b sec_map +ffffffff83551840 b sec_tdbh +ffffffff83552040 b sec_tdb_gc_list +ffffffff83553000 B divb6table +ffffffff83553078 B div6counters +ffffffff83554000 b in6_get_hw_ifid.allzero +ffffffff83555000 B ip6_forwarding +ffffffff83555004 B ip6_mforwarding +ffffffff83555008 B ip6_multipath +ffffffff8355500c B ip6_mcast_pmtu +ffffffff83555010 B ip6_log_time +ffffffff83555020 B ip6_protox +ffffffff83555120 B ip6_dad_pending +ffffffff83556000 B ip6af_pool +ffffffff835561a8 B ip6q_pool +ffffffff83556350 B frag6_queue +ffffffff83556360 B frag6_nfrags +ffffffff83556364 B frag6_nfragpackets +ffffffff83557000 B icmp6_mtudisc_callbacks +ffffffff83557008 B icmp6_mtudisc_timeout_q +ffffffff83557040 B icmp6_redirect_timeout_q +ffffffff83557078 B icmp6counters +ffffffff83557080 b icmp6_redirect_diag.buf +ffffffff83557480 b icmp6errppslim_last +ffffffff83557490 b icmp6errpps_count +ffffffff83558000 b ip6send_mq +ffffffff83558030 B ip6counters +ffffffff83558040 B ip6_soiikey +ffffffff83559000 B ip6_mrouter_ver +ffffffff83559010 B ip6_mrouter +ffffffff83559810 B ip6_mrouterq +ffffffff83559848 B mrt6stat +ffffffff835598b0 B ip6_mrtproto +ffffffff8355a000 B ip6_id_ctx +ffffffff8355b000 b mld6_init.hbh_buf +ffffffff8355b008 B mld6_timers_are_running +ffffffff8355b010 b ip6_opts +ffffffff8355c000 B nd6_maxnudhint +ffffffff8355c004 B nd6_debug +ffffffff8355c008 B nd6_pool +ffffffff8355c1b0 B nd6_expire_task +ffffffff8355c1e0 B nd6_timer_to +ffffffff8355c228 B nd6_slowtimo_ch +ffffffff8355c270 B nd6_expire_timeout +ffffffff8355c2b8 B ln_hold_total +ffffffff8355c2bc B nd6_inuse +ffffffff8355d000 B rawin6pcbtable +ffffffff8355d078 B rip6counters +ffffffff8355e000 B pkptable +ffffffff8355e038 B pkpcb_pool +ffffffff8355e1e0 b nregistered +ffffffff8355e1e4 b npromisc +ffffffff8355f000 B setperf_prio +ffffffff8355f004 B cpureset_delay +ffffffff8355f008 B ssym +ffffffff8355f010 B esym +ffffffff8355f018 B bootdev +ffffffff8355f01c B biosbasemem +ffffffff8355f020 B bootapiver +ffffffff8355f024 B safepri +ffffffff8355f028 B exec_map +ffffffff8355f030 B phys_map +ffffffff8355f038 B allowaperture +ffffffff8355f040 B msgbuf_paddr +ffffffff8355f048 B msgbuf_vaddr +ffffffff8355f050 B physmem +ffffffff8355f058 B idt_vaddr +ffffffff8355f060 B idt_paddr +ffffffff8355f068 B bios_diskinfo +ffffffff8355f070 B bios_cksumlen +ffffffff8355f074 B kbd_reset +ffffffff8355f078 B forceukbd +ffffffff8355f07c B dumpsize +ffffffff8355f080 B dumplo +ffffffff8355f088 B mem_cluster_cnt +ffffffff8355f090 B mem_clusters +ffffffff8355f190 B dumpmem_vaddr +ffffffff8355f198 B dumppcb +ffffffff8355f520 B dumpmem_sz +ffffffff8355f528 B proc0paddr +ffffffff8355f530 B idt +ffffffff8355f538 b cpu_init_extents.already_done +ffffffff8355f540 B lo32_vaddr +ffffffff8355f548 B lo32_paddr +ffffffff8355f550 B tramp_pdirpa +ffffffff8355f558 B early_pte_pages +ffffffff8355f560 B bootinfo +ffffffff83560560 B avail_start +ffffffff83560568 B avail_end +ffffffff83560570 B bios_memmap +ffffffff83560578 B bios_efiinfo +ffffffff83560580 B mmap +ffffffff83560588 B kern_end +ffffffff83560590 B dumpmem_paddr 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i8254_ticked +ffffffff8357200c B i8254_offset +ffffffff83572010 B i8254_lastcount +ffffffff83572018 b rtcstart.rtcdrain_timeout +ffffffff83572060 B rtc_update_century +ffffffff83572068 B rtc_todr +ffffffff83573000 B k8pnow_current_state +ffffffff83574000 B bus_clock +ffffffff83574008 b est_fqlist +ffffffff83575000 B k1x_current_state +ffffffff83576000 B rotatedfonts +ffffffff83576008 B rasops_framebuffers ffffffff83577000 b stamp_attr ffffffff83577010 b stamp ffffffff83578000 b stamp_attr ffffffff83578010 b stamp -ffffffff83578110 b stamp_mutex -ffffffff83579000 B fontlist -ffffffff83579010 b wsfont_init.again -ffffffff8357a000 B urlphydebug -ffffffff8357b000 b scsi_init.scsi_init_done -ffffffff8357b008 B scsi_xfer_pool -ffffffff8357b1b0 B scsi_plug_pool -ffffffff8357b360 b scsi_decode_sense.rqsbuf -ffffffff8357c000 b sddoingadump -ffffffff8357d000 b wddoingadump -ffffffff8357d004 b wddumprecalibrated -ffffffff8357e000 B mp_verbose -ffffffff8357e004 B isa_has_been_seen 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+ffffffff836fc030 b octtrack +ffffffff836fc034 b octprefix +ffffffff836fd000 B it_softc_list +ffffffff836fe000 B aps_timeout +ffffffff836ff000 B intrtype +ffffffff836ff040 B intrhand +ffffffff836ff0c0 B isa_dma_stats_loads +ffffffff836ff0c8 B isa_dma_stats_bounces +ffffffff836ff0d0 B isa_dma_stats_nbouncebufs +ffffffff836ff0e0 B intrlevel +ffffffff83700000 B wsdisplay_console_conf +ffffffff83700028 B wsdisplay_console_initted +ffffffff83700030 B wsdisplay_console_device +ffffffff83700038 B wsdisplay_clearonclose +ffffffff8370003c B wsdisplay_cons_pollmode +ffffffff83700040 B wsdisplay_cons_kbd_pollc +ffffffff83700048 B ws_get_param +ffffffff83700050 B ws_set_param +ffffffff83701000 b wskbd_console_data +ffffffff83701040 b wskbd_console_initted +ffffffff83701048 b wskbd_console_device +ffffffff83701050 B wskbd_get_backlight +ffffffff83701058 B wskbd_set_backlight +ffffffff83701060 b wskbd_cngetc.num +ffffffff83701064 b wskbd_cngetc.pos +ffffffff83702000 b compose_tab_inorder +ffffffff83703000 B nwsmux +ffffffff83703008 B wsmuxdevs +ffffffff83704000 B wsemul_vt100_console_emuldata +ffffffff83705000 B pckbd_consdata +ffffffff83705038 B pckbd_bell_fn +ffffffff83705040 B pckbd_bell_fn_arg +ffffffff83706000 b wscninit.initted +ffffffff83707000 B pctr_isamd +ffffffff83707004 B pctr_isintel +ffffffff83707008 B pctr_intel_cap +ffffffff83707010 B pctr_fn +ffffffff83708000 b nvram_initialized +ffffffff83709000 B hidkbd_is_console +ffffffff83709008 B hidkbd_bell_fn +ffffffff83709010 B hidkbd_bell_fn_arg +ffffffff8370a000 B usb_task_thread_proc +ffffffff8370a008 B usb_abort_task_thread_proc +ffffffff8370a010 b usb_nbuses +ffffffff8370a018 B usbpalock +ffffffff8370a028 B usb_abort_tasks +ffffffff8370a038 B usb_explore_tasks +ffffffff8370a048 B usb_generic_tasks +ffffffff8370a058 b usb_run_abort_tasks +ffffffff8370a05c b usb_run_tasks +ffffffff8370a060 B explore_pending +ffffffff8370b000 B usb_blk_freelist +ffffffff8370b008 B usb_blk_nfree +ffffffff8370b010 B usb_frag_freelist +ffffffff8370c000 b usbd_errstr.buffer +ffffffff8370c008 b usb_delay_ms.usb_delay_wchan +ffffffff8370c010 b usbd_probe_and_attach.cookie +ffffffff8370d000 b ucom_change +ffffffff8370d008 b sysctl_ucominit.ucoms +ffffffff8370d010 b sysctl_ucominit.ucomslen +ffffffff8370e000 b t_wait +ffffffff8370e004 b t_trust +ffffffff8370f000 B umb_session_id +ffffffff8370f010 b umb_val2descr.sval +ffffffff83710000 b probe_ic +ffffffff83710008 b probe_addr +ffffffff83710010 b probe_val +ffffffff83710110 B skip_fc +ffffffff83710118 B ignore_addrs +ffffffff83710120 b iic_dump.iicvalcnt +ffffffff83711000 B acpi_softc +ffffffff83711008 B acpiwqpool +ffffffff837111b0 B acpi_enabled +ffffffff837111b4 b acpi_maptable.tblid +ffffffff837111b8 b acpi_add_device.nacpicpus +ffffffff837111bc B acpi_force_bm +ffffffff837111c0 B mouse_has_softbtn +ffffffff837111c4 B acpi_evindex +ffffffff837111c8 B acpi_poll_enabled +ffffffff837111cc B acpi_hasprocfvs +ffffffff837111d0 B acpi_haspci +ffffffff83712000 B aml_root +ffffffff83712060 B aml_lastscope +ffffffff83712068 B aml_ophash +ffffffff83712070 b aml_mnem.mnemstr +ffffffff83712090 B aml_notify_list +ffffffff83712098 B acpi_nalloc +ffffffff837120a0 b acpi_sleep.acpinowait +ffffffff837120b0 b aml_nodename.namebuf +ffffffff83712130 b aml_getname.namebuf +ffffffff837121b0 b aml_getname.p +ffffffff837121b8 b global_lock_count +ffffffff837121c0 b aml_eisaid.id +ffffffff837121c8 B aml_global_lock +ffffffff837121d0 b aml_mapresource.map +ffffffff83712210 b aml_val_to_string.buffer +ffffffff83712310 B aml_error +ffffffff83712314 B odp +ffffffff83712318 B maxdp +ffffffff8371231c B aml_busy +ffffffff83713000 B scope +ffffffff83714000 B acpibtn_lids +ffffffff83715000 B cst_stats +ffffffff83716000 B acpihpet_attached +ffffffff83717000 b acpiec_wait.acpiecnowait +ffffffff83718000 B acpitz_cpu_setperf +ffffffff83719000 B acpimadt_busses +ffffffff8371c000 B acpimadt_isa_bus +ffffffff8371c030 b lapic_map +ffffffff8371d000 B acpidmar_ddb +ffffffff8371d010 b dmar_bdf.bdf +ffffffff8371d030 B acpidmar_sc +ffffffff8371d038 B domain_map_page +ffffffff8371d040 b dom_bdf.mmm +ffffffff8371d070 b iommu_init.niommu +ffffffff8371d078 b acpidmar_pci_attach.dom +ffffffff8371d080 b sid_flag +ffffffff8375d080 b ivhd_showpage.show +ffffffff8375d084 b ivhd_iommu_init.niommu +ffffffff8375d088 b acpidmar_intr.ofe.0 +ffffffff8375d090 b acpidmar_intr.ofe.1 +ffffffff8375e000 b dwiic_i2c_intr_string.irqstr +ffffffff8375f000 B acpihve_attached +ffffffff83760000 B efi_jmpbuf +ffffffff83761000 B vm_pool +ffffffff837611a8 B vcpu_pool +ffffffff83761350 B vmm_softc +ffffffff83762000 B l1tf_flush_region +ffffffff83763000 B sdmmc_verbose +ffffffff83764000 B utc_offset +ffffffff83764008 B bufpages +ffffffff83764010 B utsname +ffffffff83765000 B mountroot +ffffffff83766000 B __kernel_bss_end ffffffff83800000 B _end ffffffff83800000 B end