--- 7.4/2024-01-26T23:47:18Z/2023-12-22T00:00:00Z/nm-bsd-ot14.txt Mon Jan 29 16:57:41 2024 +++ 7.4/2024-01-26T23:47:18Z/2023-12-23T00:00:00Z/nm-bsd-ot14.txt Mon Jan 29 19:46:42 2024 @@ -2,14 +2,14 @@ 00011006 A mp_pdirpa 0001419d A acpi_pdirpa 01000000 A __kernel_phys_base -02545000 T __kernel_kutext_phys -02549000 C __kernel_cptext_phys -0254a000 C __kernel_rodata_phys -02e07000 R __kernel_kutext_page_phys -02e09000 C __kernel_randomdata_phys -030b8000 R __kernel_data_phys -033f1000 D __kernel_kudata_phys -033f2000 C __kernel_bss_phys +02540000 T __kernel_kutext_phys +02544000 C __kernel_cptext_phys +02545000 C __kernel_rodata_phys +02dff000 R __kernel_kutext_page_phys +02e01000 C __kernel_randomdata_phys +030b0000 R __kernel_data_phys +033e9000 D __kernel_kudata_phys +033ea000 C __kernel_bss_phys 03800000 B __kernel_phys_end 80000000 A __kernel_virt_to_phys ffffffff80000000 A __kernel_base @@ -18207,28046 +18207,28085 @@ ffffffff818ded40 t iavf_process_arq ffffffff818df1c0 t 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radix_tree_lookup -ffffffff8198a0b0 T radix_tree_iter_find -ffffffff8198a180 T radix_tree_delete -ffffffff8198a310 T radix_tree_iter_delete -ffffffff8198a330 T radix_tree_insert -ffffffff8198b000 T sort -ffffffff8198b040 t qsort -ffffffff8198d000 T drm_dp_dual_mode_read -ffffffff8198d110 T drm_dp_dual_mode_write -ffffffff8198d1f0 T drm_dp_dual_mode_detect -ffffffff8198d490 T drm_dp_dual_mode_max_tmds_clock -ffffffff8198d5b0 T drm_dp_dual_mode_get_tmds_output -ffffffff8198d6d0 T drm_dp_dual_mode_set_tmds_output -ffffffff8198d950 T drm_dp_get_dual_mode_type_name -ffffffff8198d9c0 T drm_lspcon_get_mode -ffffffff8198dbe0 T drm_lspcon_set_mode -ffffffff8198e000 T drm_dp_channel_eq_ok -ffffffff8198e080 T drm_dp_clock_recovery_ok -ffffffff8198e0f0 T drm_dp_get_adjust_request_voltage -ffffffff8198e130 T drm_dp_get_adjust_request_pre_emphasis -ffffffff8198e180 T drm_dp_get_adjust_tx_ffe_preset -ffffffff8198e1c0 T drm_dp_128b132b_lane_channel_eq_done -ffffffff8198e240 T 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drm_atomic_bridge_chain_post_disable +ffffffff8191db20 T drm_atomic_bridge_chain_pre_enable +ffffffff8191dd60 T drm_atomic_bridge_chain_enable +ffffffff8191de70 T drm_atomic_bridge_chain_check +ffffffff8191e200 T drm_bridge_detect +ffffffff8191e260 T drm_bridge_get_modes +ffffffff8191e2c0 T drm_bridge_get_edid +ffffffff8191e320 T drm_bridge_hpd_enable +ffffffff8191e3f0 T drm_bridge_hpd_disable +ffffffff8191e490 T drm_bridge_hpd_notify +ffffffff8191e4f0 t drm_bridge_atomic_duplicate_priv_state +ffffffff8191e510 t drm_bridge_atomic_destroy_priv_state +ffffffff8191e530 t select_bus_fmt_recursive +ffffffff8191f000 T drm_buddy_init +ffffffff8191f470 T drm_buddy_fini +ffffffff8191f560 T drm_get_buddy +ffffffff8191f5a0 T drm_buddy_free_block +ffffffff8191f5f0 t __drm_buddy_free +ffffffff8191f740 T drm_buddy_free_list +ffffffff8191f800 T drm_buddy_block_trim +ffffffff8191fa60 t __alloc_range +ffffffff8191fd40 T drm_buddy_alloc_blocks +ffffffff81920350 t __drm_buddy_alloc_range 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drm_client_modeset_free +ffffffff81923240 T drm_client_modeset_probe +ffffffff819249a0 t drm_client_pick_crtcs +ffffffff81924c80 T drm_client_rotation +ffffffff81924e20 T drm_client_modeset_check +ffffffff81924ec0 t drm_client_modeset_commit_atomic +ffffffff819250c0 T drm_client_modeset_commit_locked +ffffffff81925260 T drm_client_modeset_commit +ffffffff819252d0 T drm_client_modeset_dpms +ffffffff81925520 t drm_connector_pick_cmdline_mode +ffffffff81926000 T drm_color_ctm_s31_32_to_qm_n +ffffffff819260d0 T drm_crtc_enable_color_mgmt +ffffffff819261b0 T drm_mode_crtc_set_gamma_size +ffffffff819262d0 T drm_mode_gamma_set_ioctl +ffffffff819267b0 T drm_mode_gamma_get_ioctl +ffffffff819268f0 T drm_get_color_encoding_name +ffffffff81926960 T drm_get_color_range_name +ffffffff819269d0 T drm_plane_create_color_properties +ffffffff81926c30 T drm_color_lut_check +ffffffff81927000 T drm_connector_ida_init +ffffffff81927110 T drm_connector_ida_destroy +ffffffff81927220 T drm_get_connector_type_name +ffffffff81927260 T drm_connector_free_work_fn +ffffffff81927320 T drm_connector_init +ffffffff819273a0 t __drm_connector_init +ffffffff819278a0 T drm_connector_init_with_ddc +ffffffff81927930 T drmm_connector_init +ffffffff819279f0 t drm_connector_cleanup_action +ffffffff81927a10 T drm_connector_attach_edid_property +ffffffff81927a30 T drm_connector_attach_encoder +ffffffff81927ab0 T drm_connector_has_possible_encoder +ffffffff81927af0 T drm_connector_cleanup +ffffffff81927e20 T drm_connector_unregister +ffffffff81927ec0 T drm_mode_put_tile_group +ffffffff81927f50 T drm_connector_register +ffffffff81928040 T drm_connector_unregister_all +ffffffff819281e0 T drm_connector_list_iter_begin +ffffffff81928220 T drm_connector_list_iter_next +ffffffff81928330 T drm_connector_list_iter_end +ffffffff81928400 T drm_connector_register_all +ffffffff81928590 T drm_get_connector_status_name +ffffffff819285e0 T drm_get_connector_force_name +ffffffff81928620 T drm_get_subpixel_order_name +ffffffff81928660 T drm_get_dpms_name +ffffffff819286a0 T drm_display_info_set_bus_formats +ffffffff81928770 T drm_get_dvi_i_select_name +ffffffff819287d0 T drm_get_dvi_i_subconnector_name +ffffffff81928830 T drm_get_tv_select_name +ffffffff81928890 T drm_get_tv_subconnector_name +ffffffff819288f0 T drm_get_dp_subconnector_name +ffffffff81928980 T drm_connector_create_standard_properties +ffffffff81928b00 T drm_mode_create_dvi_i_properties +ffffffff81928ba0 T drm_connector_attach_dp_subconnector_property +ffffffff81928c10 T drm_connector_attach_content_type_property +ffffffff81928cb0 T drm_mode_create_content_type_property +ffffffff81928d30 T drm_connector_attach_tv_margin_properties +ffffffff81928da0 T drm_mode_create_tv_margin_properties +ffffffff81928ec0 T drm_mode_create_tv_properties +ffffffff81929110 T drm_mode_create_scaling_mode_property +ffffffff81929180 T drm_connector_attach_vrr_capable_property +ffffffff81929210 T drm_connector_attach_scaling_mode_property +ffffffff819293e0 T drm_mode_create_aspect_ratio_property +ffffffff81929460 T drm_mode_create_hdmi_colorspace_property +ffffffff819294e0 T drm_mode_create_dp_colorspace_property +ffffffff81929560 T drm_mode_create_suggested_offset_properties +ffffffff81929630 T drm_connector_set_path_property +ffffffff81929690 T drm_connector_set_tile_property +ffffffff819297e0 T drm_connector_set_link_status_property +ffffffff81929830 T drm_connector_attach_max_bpc_property +ffffffff819298f0 T drm_connector_attach_hdr_output_metadata_property +ffffffff81929940 T drm_connector_attach_colorspace_property +ffffffff81929990 T drm_connector_atomic_hdr_metadata_equal +ffffffff81929a00 T drm_connector_set_vrr_capable_property +ffffffff81929a50 T drm_connector_set_panel_orientation +ffffffff81929b20 T drm_connector_set_panel_orientation_with_quirk +ffffffff81929c00 T drm_connector_set_orientation_from_panel +ffffffff81929cf0 T drm_connector_create_privacy_screen_properties +ffffffff81929d90 T drm_connector_attach_privacy_screen_properties +ffffffff81929e00 T drm_connector_attach_privacy_screen_provider +ffffffff81929f10 t drm_connector_privacy_screen_notifier +ffffffff81929fb0 T drm_connector_update_privacy_screen +ffffffff8192a020 T drm_connector_set_obj_prop +ffffffff8192a100 T drm_connector_property_set_ioctl +ffffffff8192a160 T drm_mode_getconnector +ffffffff8192a660 T drm_connector_find_by_fwnode +ffffffff8192a710 T drm_connector_oob_hotplug_event +ffffffff8192a800 T drm_mode_get_tile_group +ffffffff8192a8d0 T drm_mode_create_tile_group +ffffffff8192a9a0 t drm_connector_free +ffffffff8192a9e0 t kasprintf +ffffffff8192b000 T drm_crtc_from_index +ffffffff8192b060 T drm_crtc_force_disable +ffffffff8192b1a0 T drm_mode_set_config_internal +ffffffff8192b220 T drm_crtc_register_all +ffffffff8192b2a0 T drm_crtc_unregister_all +ffffffff8192b310 T drm_crtc_create_fence +ffffffff8192b3a0 T drm_crtc_init_with_planes +ffffffff8192b470 t __drm_crtc_init_with_planes +ffffffff8192b870 T drmm_crtc_init_with_planes +ffffffff8192b970 T __drmm_crtc_alloc_with_planes +ffffffff8192bae0 T drm_crtc_cleanup +ffffffff8192bc00 T drm_mode_getcrtc +ffffffff8192bda0 t __drm_mode_set_config_internal +ffffffff8192bf50 T drm_crtc_check_viewport +ffffffff8192c000 T drm_mode_setcrtc +ffffffff8192c740 T drm_mode_crtc_set_obj_prop +ffffffff8192c7c0 T drm_crtc_create_scaling_filter_property +ffffffff8192c830 t drm_crtc_fence_get_driver_name +ffffffff8192c8b0 t drm_crtc_fence_get_timeline_name +ffffffff8192c920 t kasprintf +ffffffff8192c9f0 t drmm_crtc_init_with_planes_cleanup +ffffffff8192d000 T drm_helper_encoder_in_use +ffffffff8192d180 T drm_helper_crtc_in_use +ffffffff8192d2b0 T drm_helper_disable_unused_functions +ffffffff8192d330 t __drm_helper_disable_unused_functions +ffffffff8192d450 T drm_crtc_helper_set_mode +ffffffff8192d8f0 T drm_connector_get_single_encoder +ffffffff8192d9d0 T drm_crtc_helper_set_config +ffffffff8192e610 T drm_helper_connector_dpms +ffffffff8192e8e0 T drm_helper_resume_force_mode +ffffffff8192ebe0 T drm_helper_force_disable_all +ffffffff8192f000 T drm_atomic_helper_check_plane_damage +ffffffff8192f0a0 T drm_atomic_helper_dirtyfb +ffffffff8192f350 T drm_atomic_helper_damage_iter_init +ffffffff8192f4a0 T drm_atomic_helper_damage_iter_next +ffffffff8192f540 T drm_atomic_helper_damage_merged +ffffffff81930000 T displayid_iter_edid_begin +ffffffff81930050 T __displayid_iter_next +ffffffff81930300 T displayid_iter_end +ffffffff81931000 T drm_mode_create_dumb +ffffffff819310e0 T drm_mode_create_dumb_ioctl +ffffffff819311c0 T drm_mode_mmap_dumb_ioctl +ffffffff81931230 T drm_mode_destroy_dumb +ffffffff819312a0 T drm_mode_destroy_dumb_ioctl +ffffffff81932000 T drm_edid_header_is_valid +ffffffff81932080 T drm_edid_are_equal +ffffffff819320f0 T drm_edid_block_valid +ffffffff81932300 t edid_block_check +ffffffff81932430 t edid_block_status_print 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T drm_match_cea_mode +ffffffff81934270 T drm_display_mode_from_cea_vic +ffffffff819342e0 T drm_edid_get_monitor_name +ffffffff81934380 t get_monitor_name +ffffffff81934870 T drm_edid_to_sad +ffffffff81934a70 T drm_edid_to_speaker_allocation +ffffffff81934c20 T drm_av_sync_delay +ffffffff81934cd0 T drm_detect_hdmi_monitor +ffffffff81934df0 T drm_detect_monitor_audio +ffffffff81934fe0 T drm_default_rgb_quant_range +ffffffff81935020 T drm_edid_connector_update +ffffffff81935080 t _drm_edid_connector_update +ffffffff81936d00 t _drm_update_tile_info +ffffffff81936fa0 t _drm_edid_connector_property_update +ffffffff81937150 T drm_add_modes_noedid +ffffffff81937240 T drm_set_preferred_mode +ffffffff819372a0 T drm_hdmi_avi_infoframe_from_display_mode +ffffffff81937520 T drm_hdmi_avi_infoframe_quant_range +ffffffff819375c0 T drm_hdmi_vendor_infoframe_from_display_mode +ffffffff81937680 t connector_bad_edid +ffffffff81937840 t edid_filter_invalid_blocks +ffffffff819379e0 t drm_for_each_detailed_block +ffffffff81937bf0 t __cea_db_iter_next +ffffffff81937e70 t update_display_info +ffffffff81938cf0 t get_monitor_range +ffffffff81938d90 t do_detailed_mode +ffffffff81939710 t do_cvt_mode +ffffffff81939950 t drm_mode_std +ffffffff81939df0 t do_standard_modes +ffffffff81939f30 t drm_monitor_supports_rb +ffffffff8193a3d0 t drm_gtf2_hbreak +ffffffff8193a7c0 t drm_gtf2_m +ffffffff8193abb0 t drm_gtf2_2c +ffffffff8193afa0 t drm_gtf2_k +ffffffff8193b390 t drm_gtf2_2j +ffffffff8193b780 t do_established_modes +ffffffff8193b980 t drm_match_hdmi_mode +ffffffff8193bb00 t do_inferred_modes +ffffffff8193c060 t mode_in_range +ffffffff8193d000 T drm_encoder_register_all +ffffffff8193d080 T drm_encoder_unregister_all +ffffffff8193d0f0 T drm_encoder_init +ffffffff8193d1c0 t __drm_encoder_init +ffffffff8193d380 T drm_encoder_cleanup +ffffffff8193d4b0 T __drmm_encoder_alloc +ffffffff8193d5d0 T drmm_encoder_init +ffffffff8193d6b0 T drm_mode_getencoder +ffffffff8193d830 t kasprintf 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drm_fb_helper_set_suspend +ffffffff8193fb30 T drm_fb_helper_set_suspend_unlocked +ffffffff8193fb60 T drm_fb_helper_set_par +ffffffff8193fc50 T drm_fb_helper_pan_display +ffffffff8193fd20 T drm_fb_helper_fill_info +ffffffff8193fde0 T drm_fb_helper_initial_config +ffffffff8193fe10 t __drm_fb_helper_initial_config_and_unlock +ffffffff81940360 T drm_fb_helper_hotplug_event +ffffffff819404d0 t drm_setup_crtcs_fb +ffffffff81940610 T drm_fb_helper_lastclose +ffffffff819406c0 T drm_fb_helper_output_poll_changed +ffffffff819406e0 T drm_fbdev_generic_setup +ffffffff81940860 t drm_fbdev_client_unregister +ffffffff819408d0 t drm_fbdev_client_restore +ffffffff81940970 t drm_fbdev_client_hotplug +ffffffff81940ba0 t drm_fbdev_cleanup +ffffffff81940c60 t drm_fb_helper_generic_probe +ffffffff81941000 T drm_dev_needs_global_mutex +ffffffff81941060 T drm_file_alloc +ffffffff819412c0 T drm_file_free +ffffffff819414f0 T drm_lastclose +ffffffff81941560 T drm_release +ffffffff819415b0 T drm_release_noglobal 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drm_fb_xrgb8888_to_rgb565 +ffffffff81943990 t drm_fb_xrgb8888_to_rgb565_swab_line +ffffffff81943a10 t drm_fb_xrgb8888_to_rgb565_line +ffffffff81943b20 T drm_fb_xrgb8888_to_rgb888 +ffffffff81943b80 t drm_fb_xrgb8888_to_rgb888_line +ffffffff81943c10 T drm_fb_xrgb8888_to_xrgb2101010 +ffffffff81943c70 t drm_fb_xrgb8888_to_xrgb2101010_line +ffffffff81943cf0 T drm_fb_xrgb8888_to_gray8 +ffffffff81943d50 t drm_fb_xrgb8888_to_gray8_line +ffffffff81943dc0 T drm_fb_blit +ffffffff81944260 T drm_fb_xrgb8888_to_mono +ffffffff819445f0 T drm_fb_build_fourcc_list +ffffffff81944910 t drm_fb_rgb888_to_xrgb8888_line +ffffffff819449f0 t drm_fb_rgb565_to_xrgb8888_line +ffffffff81945000 T drm_mode_legacy_fb_format +ffffffff819450f0 T drm_driver_legacy_fb_format +ffffffff819451f0 T __drm_format_info +ffffffff81945270 T drm_format_info +ffffffff81945320 T drm_get_format_info +ffffffff819453f0 T drm_format_info_block_width +ffffffff81945440 T drm_format_info_block_height +ffffffff81945490 T drm_format_info_bpp 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T drm_gem_close_ioctl +ffffffff8194a1f0 T drm_gem_flink_ioctl +ffffffff8194a360 T drm_gem_open_ioctl +ffffffff8194a490 T drm_gem_open +ffffffff8194a4c0 T drm_gem_release +ffffffff8194a500 T drm_gem_object_release +ffffffff8194a650 T drm_gem_lru_remove +ffffffff8194a730 T drm_gem_object_free +ffffffff8194a780 T drm_gem_mmap_obj +ffffffff8194a880 T drm_gem_mmap +ffffffff8194aaf0 T drm_gem_print_info +ffffffff8194ac10 T drm_gem_pin +ffffffff8194ac50 T drm_gem_unpin +ffffffff8194ac90 T drm_gem_vmap +ffffffff8194acf0 T drm_gem_vunmap +ffffffff8194ad60 T drm_gem_lock_reservations +ffffffff8194afc0 T drm_gem_unlock_reservations +ffffffff8194b0b0 T drm_gem_lru_init +ffffffff8194b0f0 T drm_gem_lru_move_tail +ffffffff8194b1e0 T drm_gem_lru_scan +ffffffff8194b5c0 t __ww_mutex_lock +ffffffff8194c000 T drm_gem_plane_helper_prepare_fb +ffffffff8194d000 T drm_gem_fb_destroy +ffffffff8194d0c0 T drm_gem_fb_create_handle +ffffffff8194e000 T drm_ht_create +ffffffff8194e080 T drm_ht_verbose_list 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dmi_get_system_info +ffffffff81951230 T dmi_check_system +ffffffff81951330 T alloc_pages +ffffffff81951400 T __free_pages +ffffffff81951570 T __pagevec_release +ffffffff81951610 T kmap +ffffffff81951650 T kunmap_va +ffffffff81951670 T kmap_atomic_prot +ffffffff81951700 T kunmap_atomic +ffffffff81951780 T vmap +ffffffff81951860 T vunmap +ffffffff819518b0 T is_vmalloc_addr +ffffffff819518f0 T print_hex_dump +ffffffff819519c0 T memchr_inv +ffffffff81951a30 T panic_cmp +ffffffff81951a50 T linux_root_RB_INSERT_COLOR +ffffffff81951c50 T linux_root_RB_REMOVE_COLOR +ffffffff81951f80 T linux_root_RB_REMOVE +ffffffff819520c0 T linux_root_RB_INSERT +ffffffff81952130 T linux_root_RB_FIND +ffffffff81952180 T linux_root_RB_NFIND +ffffffff819521d0 T linux_root_RB_NEXT +ffffffff81952240 T linux_root_RB_PREV +ffffffff819522b0 T linux_root_RB_MINMAX +ffffffff81952300 T idr_init +ffffffff81952330 T idr_destroy +ffffffff81952470 T idr_tree_SPLAY_REMOVE +ffffffff819524f0 T idr_preload +ffffffff81952580 T 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dma_fence_chain_cb +ffffffff819584c0 t dma_fence_chain_timo +ffffffff81959000 T drmm_kzalloc +ffffffff81959100 T drmm_kcalloc +ffffffff81959210 T drmm_kstrdup +ffffffff81959340 T drmm_kfree +ffffffff81959440 T drmm_add_action +ffffffff81959500 T drmm_add_action_or_reset +ffffffff819595d0 T drm_managed_release +ffffffff81959690 T drmm_add_final_kfree +ffffffff8195a000 T mipi_dsi_attach +ffffffff8195a050 T mipi_dsi_detach +ffffffff8195a0a0 T devm_mipi_dsi_attach +ffffffff8195a110 T mipi_dsi_packet_format_is_short +ffffffff8195a150 T mipi_dsi_packet_format_is_long +ffffffff8195a190 T mipi_dsi_create_packet +ffffffff8195a2a0 T mipi_dsi_shutdown_peripheral +ffffffff8195a350 T mipi_dsi_turn_on_peripheral +ffffffff8195a400 T mipi_dsi_set_maximum_return_packet_size +ffffffff8195a4b0 T mipi_dsi_compression_mode +ffffffff8195a560 T mipi_dsi_picture_parameter_set +ffffffff8195a610 T mipi_dsi_generic_write +ffffffff8195a6d0 T mipi_dsi_generic_read +ffffffff8195a780 T mipi_dsi_dcs_write_buffer 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drm_object_attach_property +ffffffff81960670 T drm_object_property_set_value +ffffffff81960750 T drm_object_property_get_value +ffffffff819607e0 t __drm_object_property_get_value +ffffffff819608c0 T drm_object_property_get_default_value +ffffffff81960990 T drm_mode_object_get_properties +ffffffff81960ad0 T drm_mode_obj_get_properties_ioctl +ffffffff81960d20 T drm_mode_obj_find_prop_id +ffffffff81960d80 T drm_mode_obj_set_property_ioctl +ffffffff81962000 T drm_mode_debug_printmodeline +ffffffff81962140 T drm_mode_vrefresh +ffffffff819621e0 T drm_mode_create +ffffffff81962200 T drm_mode_destroy +ffffffff81962240 T drm_mode_probed_add +ffffffff819622e0 T drm_cvt_mode +ffffffff81962760 T drm_mode_set_name +ffffffff819627b0 T drm_gtf_mode_complex +ffffffff81962ab0 T drm_gtf_mode +ffffffff81962b00 T drm_mode_get_hv_timing +ffffffff81962b50 T drm_mode_init +ffffffff81962c20 T drm_mode_set_crtcinfo +ffffffff81962de0 T drm_mode_copy +ffffffff81962e40 T drm_mode_duplicate +ffffffff81962ec0 T drm_mode_match +ffffffff81963060 T drm_mode_equal +ffffffff81963080 T drm_mode_equal_no_clocks +ffffffff819630a0 T drm_mode_equal_no_clocks_no_stereo +ffffffff81963160 T drm_mode_validate_driver +ffffffff81963250 T drm_mode_validate_size +ffffffff819632a0 T drm_mode_validate_ycbcr420 +ffffffff81963310 T drm_mode_is_420_only +ffffffff81963360 T drm_get_mode_status_name +ffffffff819633e0 T drm_mode_prune_invalid +ffffffff81963670 T drm_mode_sort +ffffffff819636a0 t drm_mode_compare +ffffffff81963840 T drm_connector_list_update +ffffffff81963a10 T drm_mode_parse_command_line_for_connector +ffffffff81963a40 T drm_mode_create_from_cmdline_mode +ffffffff81963b30 T drm_mode_convert_to_umode +ffffffff81963cd0 T drm_mode_convert_umode +ffffffff81963ef0 T drm_mode_is_420_also +ffffffff81963f40 T drm_mode_is_420 +ffffffff81964000 T drm_helper_move_panel_connectors_to_head +ffffffff819640f0 T drm_helper_mode_fill_fb_struct +ffffffff819641b0 T drm_crtc_init +ffffffff81964280 T drm_mode_config_helper_suspend +ffffffff81964310 T drm_mode_config_helper_resume +ffffffff81965000 T drm_modeset_lock_all +ffffffff81965290 T drm_modeset_acquire_init +ffffffff81965320 T drm_modeset_lock_all_ctx +ffffffff81965410 T drm_modeset_backoff +ffffffff819654e0 T drm_modeset_acquire_fini +ffffffff81965510 T drm_warn_on_modeset_not_all_locked +ffffffff81965660 T drm_modeset_unlock_all +ffffffff81965750 T drm_modeset_drop_locks +ffffffff819657e0 T drm_modeset_unlock +ffffffff819658b0 t modeset_lock +ffffffff81965bf0 T drm_modeset_lock_init +ffffffff81965c50 T drm_modeset_lock +ffffffff81965d70 T drm_modeset_lock_single_interruptible +ffffffff81965e90 t __ww_mutex_lock +ffffffff81967000 T drm_mtrr_add +ffffffff81967070 T drm_mtrr_del +ffffffff81968000 T drm_panel_init +ffffffff81968040 T drm_panel_add +ffffffff81968090 T drm_panel_remove +ffffffff819680f0 T drm_panel_prepare +ffffffff81968140 T drm_panel_unprepare +ffffffff81968190 T drm_panel_enable +ffffffff81968230 T drm_panel_disable +ffffffff819682c0 T drm_panel_get_modes +ffffffff81968310 T drm_panel_of_backlight +ffffffff81969000 T drm_get_panel_orientation_quirk +ffffffff8196a000 T drm_pci_set_busid +ffffffff8196a090 t kasprintf +ffffffff8196b000 T drm_universal_plane_init +ffffffff8196b0e0 t __drm_universal_plane_init +ffffffff8196b5c0 T __drmm_universal_plane_alloc +ffffffff8196b700 t drmm_universal_plane_alloc_release +ffffffff8196b750 T __drm_universal_plane_alloc +ffffffff8196b890 T drm_plane_register_all +ffffffff8196b980 T drm_plane_unregister_all +ffffffff8196b9f0 T drm_plane_cleanup +ffffffff8196bb40 T drm_plane_from_index +ffffffff8196bba0 T drm_plane_force_disable +ffffffff8196bcb0 T drm_mode_plane_set_obj_prop +ffffffff8196bd30 T drm_mode_getplane_res +ffffffff8196be30 T drm_mode_getplane +ffffffff8196bf80 T drm_plane_check_pixel_format +ffffffff8196c040 T drm_any_plane_has_format +ffffffff8196c170 T drm_mode_setplane +ffffffff8196c460 T drm_mode_cursor_ioctl +ffffffff8196c4d0 t drm_mode_cursor_common +ffffffff8196ca10 T drm_mode_cursor2_ioctl +ffffffff8196ca30 T drm_mode_page_flip_ioctl +ffffffff8196cf90 T drm_plane_enable_fb_damage_clips +ffffffff8196cfb0 T drm_plane_get_damage_clips_count +ffffffff8196cff0 T __drm_plane_get_damage_clips +ffffffff8196d030 T drm_plane_get_damage_clips +ffffffff8196d0d0 T drm_create_scaling_filter_prop +ffffffff8196d220 T drm_plane_create_scaling_filter_property +ffffffff8196d290 t kvasprintf +ffffffff8196d330 t kasprintf +ffffffff8196d400 t create_in_format_blob +ffffffff8196d5f0 t __setplane_atomic +ffffffff8196d790 t __setplane_internal +ffffffff8196d9a0 t __setplane_check +ffffffff8196e000 T drm_plane_helper_update_primary +ffffffff8196e4b0 t get_connectors_for_crtc +ffffffff8196e5c0 T drm_plane_helper_disable_primary +ffffffff8196e670 T drm_plane_helper_destroy +ffffffff8196e6a0 T drm_plane_helper_atomic_check +ffffffff8196f000 T drm_prime_remove_buf_handle +ffffffff8196f0a0 T drm_prime_init_file_private +ffffffff8196f100 T drm_prime_destroy_file_private +ffffffff8196f160 T drm_gem_dmabuf_export +ffffffff8196f1c0 T drm_gem_dmabuf_release +ffffffff8196f200 T drm_gem_prime_fd_to_handle +ffffffff8196f420 T drm_gem_prime_import +ffffffff8196f480 t drm_prime_add_buf_handle +ffffffff8196f5c0 T drm_prime_fd_to_handle_ioctl +ffffffff8196f610 T drm_gem_prime_handle_to_fd +ffffffff8196f840 T drm_prime_handle_to_fd_ioctl +ffffffff8196f8a0 T drm_gem_map_attach +ffffffff8196f8c0 T drm_gem_map_detach +ffffffff8196f8e0 T drm_gem_dmabuf_vmap +ffffffff8196f900 T drm_gem_dmabuf_vunmap +ffffffff8196f920 T drm_gem_prime_mmap +ffffffff8196f970 T drm_prime_pages_to_sg +ffffffff8196f9c0 T drm_prime_get_contiguous_size +ffffffff8196fa10 T drm_gem_prime_export +ffffffff8196faa0 T drm_gem_prime_import_dev +ffffffff8196fb00 T drm_prime_sg_to_page_array +ffffffff8196fb50 T drm_prime_sg_to_dma_addr_array +ffffffff8196fba0 T drm_prime_gem_destroy +ffffffff81970000 T __drm_puts_coredump +ffffffff819700e0 T __drm_printfn_coredump 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drm_kms_helper_poll_disable +ffffffff81971e70 T drm_kms_helper_poll_init +ffffffff81971ed0 t output_poll_execute +ffffffff81972120 T drm_kms_helper_poll_fini +ffffffff819721a0 T drm_connector_helper_hpd_irq_event +ffffffff81972260 t check_connector_changed +ffffffff81972430 T drm_helper_hpd_irq_event +ffffffff81972580 T drm_crtc_helper_mode_valid_fixed +ffffffff819725d0 T drm_connector_helper_get_modes_from_ddc +ffffffff81972660 T drm_connector_helper_get_modes_fixed +ffffffff819727d0 T drm_connector_helper_get_modes +ffffffff81972830 t __delayed_work_tick +ffffffff81973000 T drm_property_create +ffffffff819731f0 T drm_property_create_enum +ffffffff819732a0 T drm_property_add_enum +ffffffff819734a0 T drm_property_destroy +ffffffff81973550 T drm_property_create_bitmask +ffffffff81973680 T drm_property_create_range +ffffffff819736f0 T drm_property_create_signed_range +ffffffff81973760 T drm_property_create_object +ffffffff81973800 T drm_property_create_bool +ffffffff81973860 T drm_mode_getproperty_ioctl +ffffffff81973ab0 T drm_property_create_blob +ffffffff81973bf0 t drm_property_free_blob +ffffffff81973c70 T drm_property_blob_put +ffffffff81973cb0 T drm_property_destroy_user_blobs +ffffffff81973d30 T drm_property_blob_get +ffffffff81973d70 T drm_property_lookup_blob +ffffffff81973d90 T drm_property_replace_global_blob +ffffffff81973ee0 T drm_property_replace_blob +ffffffff81973f50 T drm_mode_getblob_ioctl +ffffffff81974010 T drm_mode_createblob_ioctl +ffffffff81974110 T drm_mode_destroyblob_ioctl +ffffffff81974210 T drm_property_change_valid_get +ffffffff81974470 T drm_property_change_valid_put +ffffffff81975000 T drm_rect_intersect +ffffffff81975080 T drm_rect_clip_scaled +ffffffff819752f0 T drm_rect_calc_hscale +ffffffff819753c0 T drm_rect_calc_vscale +ffffffff81975490 T drm_rect_debug_print +ffffffff819755b0 T drm_rect_rotate +ffffffff81975670 T drm_rect_rotate_inv +ffffffff81976000 T drm_self_refresh_helper_update_avg_times +ffffffff81976150 T drm_self_refresh_helper_alter_state +ffffffff819762e0 T drm_self_refresh_helper_init +ffffffff81976470 t drm_self_refresh_helper_entry_work +ffffffff819765d0 T drm_self_refresh_helper_cleanup +ffffffff81976650 t __delayed_work_tick +ffffffff81977000 T drm_syncobj_find +ffffffff81977070 T drm_syncobj_add_point +ffffffff81977160 t syncobj_wait_syncobj_func +ffffffff81977210 T drm_syncobj_replace_fence +ffffffff819772a0 T drm_syncobj_find_fence +ffffffff819775f0 t drm_syncobj_fence_add_wait +ffffffff819776c0 T drm_syncobj_free +ffffffff81977750 T drm_syncobj_create +ffffffff819778f0 t drm_syncobj_assign_null_handle +ffffffff81977a00 T drm_syncobj_get_handle +ffffffff81977b20 T drm_syncobj_get_fd +ffffffff81977b70 T drm_syncobj_open +ffffffff81977ba0 T drm_syncobj_release +ffffffff81977be0 t drm_syncobj_release_handle +ffffffff81977c90 T drm_syncobj_create_ioctl +ffffffff81977db0 T drm_syncobj_destroy_ioctl +ffffffff81977ed0 T drm_syncobj_handle_to_fd_ioctl +ffffffff819780c0 T drm_syncobj_fd_to_handle_ioctl +ffffffff819782b0 T drm_syncobj_transfer_ioctl +ffffffff819786d0 T drm_timeout_abs_to_jiffies +ffffffff819787a0 T drm_syncobj_wait_ioctl +ffffffff81978920 t drm_syncobj_array_find +ffffffff81978b50 t drm_syncobj_array_free +ffffffff81978c30 T drm_syncobj_timeline_wait_ioctl +ffffffff81978db0 T drm_syncobj_reset_ioctl +ffffffff81978f10 T drm_syncobj_signal_ioctl +ffffffff81979000 T drm_syncobj_timeline_signal_ioctl +ffffffff81979240 T drm_syncobj_query_ioctl +ffffffff81979450 t drm_syncobj_array_wait_timeout +ffffffff819798b0 t syncobj_wait_fence_func +ffffffff8197a000 T drm_vblank_count +ffffffff8197a090 T drm_crtc_accurate_vblank_count +ffffffff8197a1a0 t drm_update_vblank_count +ffffffff8197a5f0 T drm_vblank_disable_and_save +ffffffff8197a740 T drm_vblank_init +ffffffff8197a8c0 t vblank_disable_fn +ffffffff8197a940 t drm_vblank_init_release +ffffffff8197a9d0 T drm_dev_has_vblank +ffffffff8197aa00 T drm_crtc_vblank_waitqueue +ffffffff8197aa50 T drm_calc_timestamping_constants +ffffffff8197ac70 T drm_crtc_vblank_helper_get_vblank_timestamp_internal +ffffffff8197b1c0 T drm_crtc_vblank_helper_get_vblank_timestamp +ffffffff8197b1e0 T drm_crtc_vblank_count +ffffffff8197b270 T drm_crtc_vblank_count_and_time +ffffffff8197b330 t drm_vblank_count_and_time +ffffffff8197b3e0 T drm_crtc_arm_vblank_event +ffffffff8197b4c0 T drm_crtc_send_vblank_event +ffffffff8197b670 t send_vblank_event +ffffffff8197b720 T drm_vblank_get +ffffffff8197b820 t drm_vblank_enable +ffffffff8197ba20 T drm_crtc_vblank_get +ffffffff8197bb20 T drm_vblank_put +ffffffff8197bc50 T drm_crtc_vblank_put +ffffffff8197bc70 T drm_wait_one_vblank +ffffffff8197c160 T drm_crtc_wait_one_vblank +ffffffff8197c180 T drm_crtc_vblank_off +ffffffff8197c570 T drm_crtc_vblank_reset +ffffffff8197c6a0 T drm_crtc_set_max_vblank_count +ffffffff8197c780 T drm_crtc_vblank_on +ffffffff8197c8d0 t drm_reset_vblank_timestamp +ffffffff8197cad0 T drm_crtc_vblank_restore +ffffffff8197cec0 T drm_legacy_modeset_ctl_ioctl +ffffffff8197d0e0 T drm_wait_vblank_ioctl +ffffffff8197d630 t drm_wait_vblank_reply +ffffffff8197d740 t drm_queue_vblank_event +ffffffff8197da80 T drm_handle_vblank +ffffffff8197dd70 t drm_handle_vblank_events +ffffffff8197e000 T drm_crtc_handle_vblank +ffffffff8197e020 T drm_crtc_get_sequence_ioctl +ffffffff8197e1f0 T drm_crtc_queue_sequence_ioctl +ffffffff8197e4b0 t __get_vblank_counter +ffffffff8197f000 T drm_handle_vblank_works +ffffffff8197f1a0 T drm_vblank_cancel_pending_works +ffffffff8197f2e0 T drm_vblank_work_schedule +ffffffff8197f550 T drm_vblank_work_cancel_sync +ffffffff8197f6a0 T drm_vblank_work_flush +ffffffff8197f7d0 T drm_vblank_work_init +ffffffff8197f840 T drm_vblank_worker_init +ffffffff81980000 T drm_vma_offset_manager_init +ffffffff81980040 T drm_vma_offset_manager_destroy +ffffffff81980060 T drm_vma_offset_lookup_locked +ffffffff819800f0 T drm_vma_offset_add +ffffffff81980180 T drm_vma_offset_remove +ffffffff819801d0 T drm_vma_node_allow +ffffffff819801f0 t vma_node_allow +ffffffff81980310 T drm_vma_node_allow_once +ffffffff81980330 T drm_vma_node_revoke +ffffffff819803b0 T drm_vma_node_is_allowed +ffffffff81981000 T hdmi_avi_infoframe_init +ffffffff81981080 T hdmi_avi_infoframe_check +ffffffff819810d0 T hdmi_avi_infoframe_pack_only +ffffffff819812d0 T hdmi_avi_infoframe_pack +ffffffff81981330 T hdmi_spd_infoframe_init +ffffffff819813f0 T hdmi_spd_infoframe_check +ffffffff81981440 T hdmi_spd_infoframe_pack_only +ffffffff81981580 T hdmi_spd_infoframe_pack +ffffffff819816e0 T hdmi_audio_infoframe_init +ffffffff81981730 T hdmi_audio_infoframe_check +ffffffff81981780 T hdmi_audio_infoframe_pack_only +ffffffff819818e0 T hdmi_audio_infoframe_pack +ffffffff81981930 T hdmi_audio_infoframe_pack_for_dp +ffffffff81981a20 T hdmi_vendor_infoframe_init +ffffffff81981a80 T hdmi_vendor_infoframe_check +ffffffff81981b20 T hdmi_vendor_infoframe_pack_only +ffffffff81981ce0 T hdmi_vendor_infoframe_pack +ffffffff81981d80 T hdmi_drm_infoframe_init +ffffffff81981de0 T hdmi_drm_infoframe_check +ffffffff81981e30 T hdmi_drm_infoframe_pack_only +ffffffff81982020 T hdmi_drm_infoframe_pack +ffffffff81982070 T hdmi_infoframe_check +ffffffff819821c0 T hdmi_infoframe_pack_only +ffffffff819823e0 T hdmi_infoframe_pack +ffffffff81982550 T hdmi_infoframe_log +ffffffff81983440 T hdmi_drm_infoframe_unpack_only +ffffffff81983520 T hdmi_infoframe_unpack +ffffffff81984000 T list_sort +ffffffff81985000 T radix_tree_lookup +ffffffff819850b0 T radix_tree_iter_find +ffffffff81985180 T radix_tree_delete +ffffffff81985310 T radix_tree_iter_delete +ffffffff81985330 T radix_tree_insert +ffffffff81986000 T sort +ffffffff81986040 t qsort +ffffffff81988000 T drm_dp_dual_mode_read +ffffffff81988110 T drm_dp_dual_mode_write +ffffffff819881f0 T drm_dp_dual_mode_detect +ffffffff81988490 T drm_dp_dual_mode_max_tmds_clock +ffffffff819885b0 T drm_dp_dual_mode_get_tmds_output +ffffffff819886d0 T drm_dp_dual_mode_set_tmds_output +ffffffff81988950 T drm_dp_get_dual_mode_type_name +ffffffff819889c0 T drm_lspcon_get_mode +ffffffff81988be0 T drm_lspcon_set_mode +ffffffff81989000 T drm_dp_channel_eq_ok +ffffffff81989080 T drm_dp_clock_recovery_ok +ffffffff819890f0 T drm_dp_get_adjust_request_voltage +ffffffff81989130 T drm_dp_get_adjust_request_pre_emphasis +ffffffff81989180 T drm_dp_get_adjust_tx_ffe_preset +ffffffff819891c0 T drm_dp_128b132b_lane_channel_eq_done +ffffffff81989240 T drm_dp_128b132b_lane_symbol_locked +ffffffff819892b0 T drm_dp_128b132b_eq_interlane_align_done +ffffffff819892e0 T drm_dp_128b132b_cds_interlane_align_done +ffffffff81989310 T drm_dp_128b132b_link_training_failed +ffffffff81989340 T drm_dp_read_clock_recovery_delay +ffffffff81989450 T drm_dp_read_channel_eq_delay +ffffffff81989550 T drm_dp_128b132b_read_aux_rd_interval +ffffffff81989600 T drm_dp_link_train_clock_recovery_delay +ffffffff81989690 t __8b10b_clock_recovery_delay_us +ffffffff81989710 T drm_dp_link_train_channel_eq_delay +ffffffff81989780 T drm_dp_phy_name +ffffffff819897c0 T drm_dp_lttpr_link_train_clock_recovery_delay +ffffffff819897e0 T drm_dp_lttpr_link_train_channel_eq_delay +ffffffff81989850 T drm_dp_link_rate_to_bw_code +ffffffff819898c0 T drm_dp_bw_code_to_link_rate +ffffffff81989920 T drm_dp_dpcd_probe +ffffffff81989a60 t drm_dp_dpcd_access +ffffffff81989b90 T drm_dp_dpcd_read +ffffffff81989cc0 T drm_dp_dpcd_write +ffffffff81989dd0 T drm_dp_dpcd_read_link_status +ffffffff81989df0 T drm_dp_dpcd_read_phy_link_status +ffffffff81989ef0 T drm_dp_downstream_is_type +ffffffff81989f40 T drm_dp_downstream_is_tmds +ffffffff81989fb0 T drm_dp_send_real_edid_checksum +ffffffff8198a200 T drm_dp_read_dpcd_caps +ffffffff8198a390 T drm_dp_read_downstream_info +ffffffff8198a490 T drm_dp_downstream_max_dotclock +ffffffff8198a4e0 T drm_dp_downstream_max_tmds_clock +ffffffff8198a580 T drm_dp_downstream_min_tmds_clock +ffffffff8198a600 T drm_dp_downstream_max_bpc +ffffffff8198a6a0 T drm_dp_downstream_420_passthrough +ffffffff8198a700 T drm_dp_downstream_444_to_420_conversion +ffffffff8198a760 T drm_dp_downstream_rgb_to_ycbcr_conversion +ffffffff8198a7c0 T drm_dp_downstream_mode +ffffffff8198a850 T drm_dp_downstream_id +ffffffff8198a870 T drm_dp_downstream_debug +ffffffff8198a910 T drm_dp_subconnector_type +ffffffff8198a980 T drm_dp_set_subconnector_property +ffffffff8198a9f0 T drm_dp_read_sink_count_cap +ffffffff8198aa40 T drm_dp_read_sink_count +ffffffff8198aaa0 T drm_dp_remote_aux_init +ffffffff8198aad0 t drm_dp_aux_crc_work +ffffffff8198ac40 T drm_dp_aux_init +ffffffff8198acf0 T drm_dp_aux_register +ffffffff8198ae10 T drm_dp_aux_unregister +ffffffff8198ae40 T drm_dp_psr_setup_time +ffffffff8198ae90 T drm_dp_start_crc +ffffffff8198af40 T drm_dp_stop_crc +ffffffff8198afd0 T drm_dp_read_desc +ffffffff8198b190 T drm_dp_dsc_sink_max_slice_count +ffffffff8198b220 T drm_dp_dsc_sink_line_buf_depth +ffffffff8198b260 T drm_dp_dsc_sink_supported_input_bpcs +ffffffff8198b2d0 T drm_dp_read_lttpr_common_caps +ffffffff8198b390 T drm_dp_read_lttpr_phy_caps +ffffffff8198b450 T drm_dp_lttpr_count +ffffffff8198b4e0 T drm_dp_lttpr_max_link_rate +ffffffff8198b540 T drm_dp_lttpr_max_lane_count +ffffffff8198b570 T drm_dp_lttpr_voltage_swing_level_3_supported +ffffffff8198b5a0 T drm_dp_lttpr_pre_emphasis_level_3_supported +ffffffff8198b5d0 T drm_dp_get_phy_test_pattern +ffffffff8198b6f0 T drm_dp_set_phy_test_pattern +ffffffff8198b7b0 T drm_dp_vsc_sdp_log +ffffffff8198bad0 T drm_dp_get_pcon_max_frl_bw +ffffffff8198bb20 T drm_dp_pcon_frl_prepare +ffffffff8198bb70 T drm_dp_pcon_is_frl_ready +ffffffff8198bbd0 T drm_dp_pcon_frl_configure_1 +ffffffff8198bcd0 T drm_dp_pcon_frl_configure_2 +ffffffff8198bd30 T drm_dp_pcon_reset_frl_config +ffffffff8198bd80 T drm_dp_pcon_frl_enable +ffffffff8198be40 T drm_dp_pcon_hdmi_link_active +ffffffff8198be90 T drm_dp_pcon_hdmi_link_mode +ffffffff8198bf00 T drm_dp_pcon_hdmi_frl_link_error_count +ffffffff8198bff0 T drm_dp_pcon_enc_is_dsc_1_2 +ffffffff8198c020 T drm_dp_pcon_dsc_max_slices +ffffffff8198c0b0 T drm_dp_pcon_dsc_max_slice_width +ffffffff8198c0e0 T drm_dp_pcon_dsc_bpp_incr +ffffffff8198c120 T drm_dp_pcon_pps_default +ffffffff8198c1a0 T drm_dp_pcon_pps_override_buf +ffffffff8198c240 T drm_dp_pcon_pps_override_param +ffffffff8198c310 T drm_dp_pcon_convert_rgb_to_ycbcr +ffffffff8198c3b0 T drm_edp_backlight_set_level +ffffffff8198c480 T drm_edp_backlight_enable +ffffffff8198c690 t drm_edp_backlight_set_enable +ffffffff8198c7c0 T drm_edp_backlight_disable +ffffffff8198c800 T drm_edp_backlight_init +ffffffff8198cd60 T drm_panel_dp_aux_backlight +ffffffff8198cee0 t __128b132b_channel_eq_delay_us +ffffffff8198cf60 t __8b10b_channel_eq_delay_us +ffffffff8198cfe0 t drm_dp_aux_get_crc +ffffffff8198d0c0 t drm_dp_i2c_xfer +ffffffff8198d330 t drm_dp_i2c_functionality +ffffffff8198d360 t drm_dp_i2c_do_msg +ffffffff8198d730 t lock_bus +ffffffff8198d750 t trylock_bus +ffffffff8198d7a0 t unlock_bus +ffffffff8198d7c0 t dp_aux_backlight_update_status +ffffffff8198e000 T drm_dp_encode_sideband_req +ffffffff8198e440 T drm_dp_decode_sideband_req +ffffffff8198e970 T drm_dp_dump_sideband_msg_req_body +ffffffff8198ed40 T drm_dp_mst_get_port_malloc +ffffffff8198ed90 T drm_dp_mst_put_port_malloc +ffffffff8198ee80 t kref_put +ffffffff8198eec0 T drm_atomic_get_mst_payload_state +ffffffff8198ef10 T drm_dp_mst_dpcd_read +ffffffff8198f1d0 T drm_dp_mst_dpcd_write +ffffffff8198f220 t drm_dp_send_dpcd_write +ffffffff8198f460 T drm_dp_mst_connector_late_register +ffffffff8198f4e0 T drm_dp_mst_connector_early_unregister +ffffffff8198f520 T drm_dp_send_power_updown_phy +ffffffff8198f760 t drm_dp_mst_topology_put_port +ffffffff8198f890 t drm_dp_mst_wait_tx_reply +ffffffff8198fc30 T drm_dp_send_query_stream_enc_status +ffffffff8198fef0 T drm_dp_add_payload_part1 +ffffffff819900a0 T drm_dp_remove_payload +ffffffff81990240 T drm_dp_add_payload_part2 +ffffffff819903f0 T drm_dp_get_vc_payload_bw +ffffffff81990490 T drm_dp_read_mst_cap +ffffffff819904f0 T drm_dp_mst_topology_mgr_set_mst +ffffffff819907a0 t drm_dp_dpcd_write_payload +ffffffff81990940 t drm_dp_mst_topology_put_mstb +ffffffff81990a40 T drm_dp_mst_topology_mgr_suspend +ffffffff81990b00 t drm_dp_mst_topology_mgr_invalidate_mstb +ffffffff81990b70 T drm_dp_mst_topology_mgr_resume +ffffffff81990db0 T drm_dp_mst_hpd_irq_handle_event +ffffffff81991d20 T drm_dp_mst_hpd_irq_send_new_request +ffffffff81991da0 T drm_dp_mst_detect_port +ffffffff81991f00 T drm_dp_mst_get_edid +ffffffff81992010 T drm_dp_atomic_find_time_slots +ffffffff819922c0 T drm_atomic_get_mst_topology_state +ffffffff819922d0 T drm_dp_atomic_release_time_slots +ffffffff819924e0 T drm_dp_mst_atomic_setup_commit +ffffffff81992670 T drm_dp_mst_atomic_wait_for_dependencies +ffffffff819927e0 T drm_dp_mst_root_conn_atomic_check +ffffffff81992900 T drm_dp_mst_update_slots +ffffffff81992960 T drm_dp_check_act_status +ffffffff81992af0 T drm_dp_calc_pbn_mode +ffffffff81992b60 T drm_dp_mst_dump_topology +ffffffff81992da0 t drm_dp_mst_dump_mstb +ffffffff81992e10 T drm_dp_mst_add_affected_dsc_crtcs +ffffffff81992f40 T drm_dp_mst_dsc_aux_for_port +ffffffff81993170 T drm_dp_mst_atomic_enable_dsc +ffffffff819932f0 T drm_dp_mst_atomic_check +ffffffff819935e0 t drm_dp_mst_atomic_check_mstb_bw_limit +ffffffff81993860 t drm_dp_mst_duplicate_state +ffffffff81993a30 t drm_dp_mst_destroy_state +ffffffff81993af0 T drm_atomic_get_old_mst_topology_state +ffffffff81993b00 T drm_atomic_get_new_mst_topology_state +ffffffff81993b10 T drm_dp_mst_topology_mgr_init +ffffffff81993d80 t drm_dp_mst_link_probe_work +ffffffff81994010 t drm_dp_tx_work +ffffffff81994060 t drm_dp_delayed_destroy_work +ffffffff81994510 t drm_dp_mst_up_req_work +ffffffff81994a30 T drm_dp_mst_topology_mgr_destroy +ffffffff81994ac0 t drm_dp_mst_is_virtual_dpcd +ffffffff81994ba0 t drm_dp_free_mst_branch_device +ffffffff81994be0 t drm_dp_mst_topology_get_port_validated_locked +ffffffff81994c60 t drm_dp_mst_dump_sideband_msg_tx +ffffffff81994e70 t process_single_down_tx_qlock +ffffffff81994fe0 t process_single_tx_qlock +ffffffff819954b0 t drm_dp_msg_data_crc4 +ffffffff819955e0 t drm_dp_payload_send_msg +ffffffff81995a40 t drm_dp_mst_topology_get_mstb_validated_locked +ffffffff81995ac0 t drm_dp_get_one_sb_msg +ffffffff81996200 t drm_dp_get_mst_branch_device +ffffffff81996360 t drm_dp_check_and_send_link_address +ffffffff81996430 t drm_dp_send_link_address +ffffffff819970f0 t drm_dp_send_enum_path_resources +ffffffff81997350 t drm_dp_port_set_pdt +ffffffff81997620 t drm_dp_mst_port_add_connector +ffffffff81997800 t drm_dp_mst_i2c_xfer +ffffffff81997f20 t drm_dp_mst_i2c_functionality +ffffffff81997f50 t get_mst_branch_device_by_guid_helper +ffffffff81998000 T drm_dsc_dp_pps_header_init +ffffffff81998030 T drm_dsc_dp_rc_buffer_size +ffffffff81998090 T drm_dsc_pps_payload_pack +ffffffff81998340 T drm_dsc_compute_rc_parameters +ffffffff81999000 T drm_connector_attach_content_protection_property +ffffffff81999030 T drm_hdcp_check_ksvs_revoked +ffffffff81999080 T drm_hdcp_update_content_protection +ffffffff8199a000 T drm_hdmi_infoframe_set_hdr_metadata +ffffffff8199a120 T drm_hdmi_avi_infoframe_colorimetry +ffffffff8199a170 T drm_hdmi_avi_infoframe_bars +ffffffff8199a1c0 T drm_hdmi_avi_infoframe_content_type +ffffffff8199b000 T drm_scdc_read +ffffffff8199b090 T drm_scdc_write +ffffffff8199b170 T drm_scdc_get_scrambling_status +ffffffff8199b230 T drm_scdc_set_scrambling +ffffffff8199b380 T drm_scdc_set_high_tmds_clock_ratio +ffffffff8199c000 T drm_gem_ttm_mmap +ffffffff8199c070 T drm_gem_ttm_vmap +ffffffff8199c080 T drm_gem_ttm_vunmap +ffffffff8199d000 T ttm_agp_bind +ffffffff8199d050 T ttm_agp_unbind +ffffffff8199d070 T ttm_agp_is_bound +ffffffff8199d0c0 T ttm_agp_destroy +ffffffff8199d0e0 T ttm_agp_tt_create +ffffffff8199e000 T ttm_bo_move_to_lru_tail +ffffffff8199e040 T ttm_bo_set_bulk_move +ffffffff8199e100 T ttm_bo_delayed_delete +ffffffff8199e3e0 t ttm_bo_cleanup_refs +ffffffff8199e780 T ttm_bo_put +ffffffff8199ed30 T ttm_bo_lock_delayed_workqueue +ffffffff8199edb0 T ttm_bo_unlock_delayed_workqueue +ffffffff8199ee20 T ttm_bo_eviction_valuable +ffffffff8199ee70 T ttm_mem_evict_first +ffffffff8199f580 t ttm_bo_evict_swapout_allowable +ffffffff8199f780 t dma_resv_unlock +ffffffff8199f820 t ttm_bo_unreserve +ffffffff8199f900 T ttm_bo_pin +ffffffff8199f9a0 T ttm_bo_unpin +ffffffff8199fab0 T ttm_bo_mem_space +ffffffff8199fcf0 t ttm_bo_add_move_fence +ffffffff8199fdb0 T ttm_bo_validate +ffffffff8199ff40 T ttm_bo_init_reserved +ffffffff819a0160 T ttm_bo_init_validate +ffffffff819a0200 T ttm_bo_unmap_virtual +ffffffff819a0320 T ttm_bo_wait +ffffffff819a03a0 T ttm_bo_swapout +ffffffff819a0670 t ttm_bo_handle_move_mem +ffffffff819a07f0 T ttm_bo_tt_destroy +ffffffff819a1000 T ttm_mem_io_reserve +ffffffff819a1060 T ttm_mem_io_free +ffffffff819a10d0 T ttm_move_memcpy +ffffffff819a1290 T ttm_bo_move_memcpy +ffffffff819a14c0 T ttm_bo_move_sync_cleanup +ffffffff819a15b0 T ttm_io_prot +ffffffff819a15f0 T ttm_bo_kmap +ffffffff819a18a0 T ttm_bo_kunmap +ffffffff819a19e0 T ttm_bo_vmap +ffffffff819a1bd0 T ttm_bo_vunmap +ffffffff819a1cc0 T ttm_bo_move_accel_cleanup +ffffffff819a1f80 T ttm_bo_pipeline_gutting +ffffffff819a2220 t ttm_buffer_object_transfer +ffffffff819a2460 t ttm_transfered_destroy +ffffffff819a3000 T ttm_bo_vm_reserve +ffffffff819a3180 t dma_resv_lock_interruptible +ffffffff819a32a0 T ttm_bo_vm_fault_reserved +ffffffff819a35c0 T ttm_bo_vm_fault +ffffffff819a3720 T ttm_bo_vm_reference +ffffffff819a3750 T ttm_bo_vm_detach +ffffffff819a3760 T ttm_bo_mmap_obj +ffffffff819a4000 T ttm_global_swapout +ffffffff819a40e0 T ttm_device_swapout +ffffffff819a4200 T ttm_device_init +ffffffff819a4450 t ttm_device_delayed_workqueue +ffffffff819a44e0 T ttm_device_fini +ffffffff819a46c0 T ttm_device_clear_dma_mappings +ffffffff819a4770 t ttm_device_clear_lru_dma_mappings +ffffffff819a4820 t __delayed_work_tick +ffffffff819a5000 T ttm_eu_backoff_reservation +ffffffff819a5130 T ttm_eu_reserve_buffers +ffffffff819a55b0 T ttm_eu_fence_buffer_objects +ffffffff819a5700 t __ww_mutex_lock +ffffffff819a6000 T ttm_prot_from_caching +ffffffff819a7000 T ttm_pool_alloc +ffffffff819a7a60 t ttm_pool_free_range +ffffffff819a7d20 T ttm_pool_free +ffffffff819a7d80 t ttm_pool_shrink +ffffffff819a7f60 T ttm_pool_init +ffffffff819a8210 T ttm_pool_fini +ffffffff819a83e0 t ttm_pool_type_fini +ffffffff819a8620 T ttm_pool_mgr_init +ffffffff819a8900 t ttm_pool_shrinker_count +ffffffff819a8950 t ttm_pool_shrinker_scan +ffffffff819a89a0 T ttm_pool_mgr_fini +ffffffff819a9000 T ttm_range_man_init_nocheck +ffffffff819a9180 T ttm_range_man_fini_nocheck +ffffffff819a9310 t ttm_range_man_alloc +ffffffff819a9450 t ttm_range_man_free +ffffffff819a94b0 t ttm_range_man_intersects +ffffffff819a9510 t ttm_range_man_compatible +ffffffff819a9570 t ttm_range_man_debug +ffffffff819aa000 T ttm_lru_bulk_move_init +ffffffff819aa020 T ttm_lru_bulk_move_tail +ffffffff819aa1e0 T ttm_resource_add_bulk_move +ffffffff819aa2b0 T ttm_resource_del_bulk_move +ffffffff819aa3f0 T ttm_resource_move_to_lru_tail +ffffffff819aa560 T ttm_resource_init +ffffffff819aa660 T ttm_resource_fini +ffffffff819aa6d0 T ttm_resource_alloc +ffffffff819aa820 T ttm_resource_free +ffffffff819aa9e0 T ttm_resource_intersects +ffffffff819aaa40 T ttm_resource_compatible +ffffffff819aaaa0 T ttm_resource_compat +ffffffff819aac30 T ttm_resource_set_bo +ffffffff819aac80 T ttm_resource_manager_init +ffffffff819aad30 T ttm_resource_manager_evict_all +ffffffff819aaf00 T ttm_resource_manager_usage +ffffffff819aaf60 T ttm_resource_manager_debug +ffffffff819ab050 T ttm_resource_manager_first +ffffffff819ab0e0 T ttm_resource_manager_next +ffffffff819ab200 T ttm_kmap_iter_iomap_init +ffffffff819ab260 T ttm_kmap_iter_linear_io_init +ffffffff819ab430 T ttm_kmap_iter_linear_io_fini +ffffffff819ab480 T ttm_resource_manager_create_debugfs +ffffffff819ab4b0 t ttm_kmap_iter_iomap_map_local +ffffffff819ab5e0 t ttm_kmap_iter_iomap_unmap_local +ffffffff819ab600 t ttm_kmap_iter_linear_io_map_local +ffffffff819ac000 T ttm_sys_man_init +ffffffff819ac130 t ttm_sys_man_alloc +ffffffff819ac1b0 t ttm_sys_man_free +ffffffff819ad000 T ttm_tt_create +ffffffff819ad100 T ttm_tt_destroy +ffffffff819ad120 T ttm_tt_init +ffffffff819ad1f0 T ttm_tt_fini +ffffffff819ad2d0 T ttm_sg_tt_init +ffffffff819ad4f0 T ttm_tt_swapin +ffffffff819ad610 T ttm_tt_swapout +ffffffff819ad660 T ttm_tt_populate +ffffffff819ad7d0 T ttm_tt_unpopulate +ffffffff819ad880 T ttm_tt_mgr_init +ffffffff819ad8e0 T ttm_kmap_iter_tt_init +ffffffff819ad940 t ttm_kmap_iter_tt_map_local +ffffffff819ad9a0 t ttm_kmap_iter_tt_unmap_local +ffffffff819ae000 T drm_sched_entity_init +ffffffff819ae180 T drm_sched_entity_modify_sched +ffffffff819ae200 T drm_sched_entity_is_ready +ffffffff819ae240 T drm_sched_entity_flush +ffffffff819ae5a0 T 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hsw_ddi_disable_clock +ffffffff819f46d0 T hsw_ddi_is_clock_enabled +ffffffff819f4730 T intel_ddi_enable_clock +ffffffff819f4770 T intel_ddi_disable_clock +ffffffff819f47b0 T intel_ddi_sanitize_encoder_pll_mapping +ffffffff819f4990 T dp_tp_ctl_reg +ffffffff819f4a10 T dp_tp_status_reg +ffffffff819f4a90 T intel_ddi_update_pipe +ffffffff819f4b20 T intel_ddi_compute_min_voltage_level +ffffffff819f4b90 T intel_ddi_get_clock +ffffffff819f4ca0 T hsw_ddi_get_config +ffffffff819f4d90 t intel_ddi_get_config +ffffffff819f55d0 T intel_ddi_init +ffffffff819f6160 t intel_ddi_hotplug +ffffffff819f6560 t intel_ddi_compute_output_type +ffffffff819f65e0 t intel_ddi_compute_config +ffffffff819f6730 t intel_ddi_compute_config_late +ffffffff819f69f0 t intel_enable_ddi +ffffffff819f71f0 t intel_ddi_pre_pll_enable +ffffffff819f7390 t intel_ddi_pre_enable +ffffffff819f8020 t intel_disable_ddi +ffffffff819f81a0 t intel_ddi_post_disable +ffffffff819f86a0 t intel_ddi_sync_state +ffffffff819f8750 t intel_ddi_initial_fastset_check +ffffffff819f8810 t intel_ddi_encoder_suspend +ffffffff819f88c0 t intel_ddi_encoder_shutdown +ffffffff819f8980 t intel_ddi_get_power_domains +ffffffff819f8b30 t dg2_ddi_get_config +ffffffff819f8b80 t adls_ddi_enable_clock +ffffffff819f8d10 t adls_ddi_disable_clock +ffffffff819f8dd0 t adls_ddi_is_clock_enabled +ffffffff819f8e70 t adls_ddi_get_config +ffffffff819f8f30 t rkl_ddi_enable_clock +ffffffff819f90b0 t rkl_ddi_disable_clock +ffffffff819f9150 t rkl_ddi_is_clock_enabled +ffffffff819f91d0 t rkl_ddi_get_config +ffffffff819f92a0 t dg1_ddi_enable_clock +ffffffff819f9450 t dg1_ddi_disable_clock +ffffffff819f9510 t dg1_ddi_is_clock_enabled +ffffffff819f95b0 t dg1_ddi_get_config +ffffffff819f9680 t jsl_ddi_tc_enable_clock +ffffffff819f9710 t jsl_ddi_tc_disable_clock +ffffffff819f97d0 t jsl_ddi_tc_is_clock_enabled +ffffffff819f9880 t icl_ddi_combo_get_config +ffffffff819f9920 t icl_ddi_combo_enable_clock +ffffffff819f9a80 t icl_ddi_combo_disable_clock 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kbl_y_get_buf_trans +ffffffff819fed50 t kbl_u_get_buf_trans +ffffffff819fedf0 t kbl_get_buf_trans +ffffffff819fee90 t skl_y_get_buf_trans +ffffffff819fef30 t skl_u_get_buf_trans +ffffffff819fefd0 t skl_get_buf_trans +ffffffff819ff070 t bdw_get_buf_trans +ffffffff819ff100 t hsw_get_buf_trans +ffffffff81a00000 T intel_update_watermarks +ffffffff81a00040 T vlv_get_hpll_vco +ffffffff81a00090 T vlv_get_cck_clock +ffffffff81a00140 T vlv_get_cck_clock_hpll +ffffffff81a00240 T is_trans_port_sync_mode +ffffffff81a00280 T intel_crtc_bigjoiner_slave_pipes +ffffffff81a002e0 T intel_crtc_is_bigjoiner_slave +ffffffff81a00340 T intel_crtc_is_bigjoiner_master +ffffffff81a003a0 T intel_master_crtc +ffffffff81a00430 T assert_transcoder +ffffffff81a00580 t transcoder_name +ffffffff81a005c0 T vlv_wait_port_ready +ffffffff81a00710 T intel_enable_transcoder +ffffffff81a009f0 T intel_disable_transcoder +ffffffff81a00ce0 T intel_rotation_info_size +ffffffff81a00d30 T intel_remapped_info_size +ffffffff81a00e60 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intel_dotclock_calculate +ffffffff81a03dd0 T intel_crtc_dotclock +ffffffff81a03ea0 T intel_encoder_current_mode +ffffffff81a04050 T intel_fuzzy_clock_check +ffffffff81a040a0 T intel_pipe_config_compare +ffffffff81a06b40 t pipe_config_mismatch +ffffffff81a06c30 t pipe_config_infoframe_mismatch +ffffffff81a06dd0 T intel_modeset_all_pipes +ffffffff81a06f80 T intel_atomic_add_affected_planes +ffffffff81a07050 T intel_crtc_update_active_timings +ffffffff81a07150 T intel_calc_active_pipes +ffffffff81a071e0 T intel_crtc_arm_fifo_underrun +ffffffff81a07280 T intel_plane_destroy +ffffffff81a072b0 T intel_get_pipe_from_crtc_id_ioctl +ffffffff81a07320 T intel_cpu_transcoder_mode_valid +ffffffff81a073e0 T intel_mode_valid_max_plane_size +ffffffff81a07460 T intel_init_display_hooks +ffffffff81a07540 T intel_modeset_init_noirq +ffffffff81a077d0 t intel_atomic_helper_free_state_worker +ffffffff81a07850 T intel_modeset_init_nogem +ffffffff81a088c0 T intel_modeset_init +ffffffff81a08ae0 T i830_enable_pipe +ffffffff81a09110 T i830_disable_pipe +ffffffff81a09440 T intel_display_resume +ffffffff81a09580 T intel_modeset_driver_remove +ffffffff81a09630 T intel_modeset_driver_remove_noirq +ffffffff81a097a0 T intel_modeset_driver_remove_nogem +ffffffff81a097e0 T intel_modeset_probe_defer +ffffffff81a09810 T intel_display_driver_register +ffffffff81a09870 T intel_display_driver_unregister +ffffffff81a098f0 T intel_scanout_needs_vtd_wa +ffffffff81a09930 t wait_for_pipe_scanline_moving +ffffffff81a09b80 t hsw_get_pipe_config +ffffffff81a0aa10 t hsw_crtc_enable +ffffffff81a0b400 t hsw_crtc_disable +ffffffff81a0b5b0 t skl_commit_modeset_enables +ffffffff81a0bb80 t intel_get_transcoder_timings +ffffffff81a0be40 t ilk_get_pfit_config +ffffffff81a0bfc0 t enabled_bigjoiner_pipes +ffffffff81a0c1e0 t bdw_set_pipemisc +ffffffff81a0c320 t ilk_pfit_enable +ffffffff81a0c450 t intel_set_transcoder_timings +ffffffff81a0c800 t intel_update_crtc +ffffffff81a0cdd0 t intel_pre_plane_update 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gen9_dbuf_slices_update +ffffffff81a165d0 T intel_power_domains_init_hw +ffffffff81a16ab0 t icl_display_core_init +ffffffff81a17350 t bxt_display_core_init +ffffffff81a17480 t vlv_cmnlane_wa +ffffffff81a17550 t assert_ved_power_gated +ffffffff81a17600 t hsw_assert_cdclk +ffffffff81a17710 t intel_pch_reset_handshake +ffffffff81a177c0 T intel_power_domains_driver_remove +ffffffff81a178b0 T intel_power_domains_sanitize_state +ffffffff81a179a0 T intel_power_domains_enable +ffffffff81a17a00 T intel_power_domains_disable +ffffffff81a17ab0 T intel_power_domains_suspend +ffffffff81a17c40 t icl_display_core_uninit +ffffffff81a17ce0 t bxt_display_core_uninit +ffffffff81a17d90 T intel_power_domains_resume +ffffffff81a17e60 T intel_display_power_suspend_late +ffffffff81a17f50 t hsw_enable_pc8 +ffffffff81a188d0 T intel_display_power_resume_early +ffffffff81a189c0 t hsw_disable_pc8 +ffffffff81a18e20 T intel_display_power_suspend +ffffffff81a18ea0 T intel_display_power_resume +ffffffff81a18f80 T intel_display_power_debug +ffffffff81a19040 T intel_display_power_ddi_io_domain +ffffffff81a19120 T intel_display_power_ddi_lanes_domain +ffffffff81a19200 T intel_display_power_legacy_aux_domain +ffffffff81a19310 T intel_display_power_tbt_aux_domain +ffffffff81a19420 t __delayed_work_tick +ffffffff81a1a000 T intel_display_power_map_init +ffffffff81a1a170 t __set_power_wells +ffffffff81a1a550 T intel_display_power_map_cleanup +ffffffff81a1b000 T lookup_power_well +ffffffff81a1b0c0 T intel_power_well_enable +ffffffff81a1b150 T intel_power_well_name +ffffffff81a1b190 T intel_power_well_disable +ffffffff81a1b200 T intel_power_well_sync_hw +ffffffff81a1b270 T intel_power_well_get +ffffffff81a1b310 T intel_power_well_put +ffffffff81a1b410 T intel_power_well_is_enabled +ffffffff81a1b430 T intel_power_well_is_enabled_cached +ffffffff81a1b460 T intel_display_power_well_is_enabled +ffffffff81a1b510 T intel_power_well_is_always_on +ffffffff81a1b550 T intel_power_well_domains +ffffffff81a1b580 T intel_power_well_refcount +ffffffff81a1b5b0 T gen9_sanitize_dc_state +ffffffff81a1b680 T gen9_set_dc_state +ffffffff81a1b9e0 T gen9_enable_dc5 +ffffffff81a1bc40 T skl_enable_dc6 +ffffffff81a1bd90 T bxt_enable_dc9 +ffffffff81a1bf40 T bxt_disable_dc9 +ffffffff81a1c030 T gen9_disable_dc_states +ffffffff81a1c400 T chv_phy_powergate_ch +ffffffff81a1c510 t assert_chv_phy_status +ffffffff81a1c8c0 T chv_phy_powergate_lanes +ffffffff81a1cb70 t i9xx_power_well_sync_hw_noop +ffffffff81a1cba0 t i9xx_always_on_power_well_noop +ffffffff81a1cbd0 t i9xx_always_on_power_well_enabled +ffffffff81a1cc00 t chv_pipe_power_well_sync_hw +ffffffff81a1cc30 t chv_pipe_power_well_enable +ffffffff81a1cc60 t chv_pipe_power_well_disable +ffffffff81a1ccc0 t chv_pipe_power_well_enabled +ffffffff81a1cdc0 t chv_dpio_cmn_power_well_enable +ffffffff81a1cfd0 t chv_dpio_cmn_power_well_disable +ffffffff81a1d100 t vlv_power_well_enabled +ffffffff81a1d220 t i830_pipes_power_well_sync_hw +ffffffff81a1d310 t i830_pipes_power_well_enable +ffffffff81a1d3d0 t i830_pipes_power_well_disable +ffffffff81a1d400 t i830_pipes_power_well_enabled +ffffffff81a1d4a0 t hsw_power_well_sync_hw +ffffffff81a1d590 t hsw_power_well_enable +ffffffff81a1d810 t hsw_power_well_disable +ffffffff81a1d8c0 t hsw_power_well_enabled +ffffffff81a1d9a0 t gen9_dc_off_power_well_enable +ffffffff81a1d9b0 t gen9_dc_off_power_well_disable +ffffffff81a1da50 t gen9_dc_off_power_well_enabled +ffffffff81a1dae0 t bxt_dpio_cmn_power_well_enable +ffffffff81a1db10 t bxt_dpio_cmn_power_well_disable +ffffffff81a1db40 t bxt_dpio_cmn_power_well_enabled +ffffffff81a1db70 t vlv_display_power_well_enable +ffffffff81a1dba0 t vlv_display_power_well_disable +ffffffff81a1dc10 t vlv_dpio_cmn_power_well_enable +ffffffff81a1dc90 t vlv_dpio_cmn_power_well_disable +ffffffff81a1dd90 t vlv_power_well_enable +ffffffff81a1ddb0 t vlv_power_well_disable +ffffffff81a1ddd0 t icl_aux_power_well_enable +ffffffff81a1e420 t icl_aux_power_well_disable +ffffffff81a1e690 t tgl_tc_cold_off_power_well_sync_hw +ffffffff81a1e6b0 t tgl_tc_cold_off_power_well_enable +ffffffff81a1e6d0 t tgl_tc_cold_off_power_well_disable +ffffffff81a1e6f0 t tgl_tc_cold_off_power_well_is_enabled +ffffffff81a1e720 t xelpdp_aux_power_well_enable +ffffffff81a1e800 t xelpdp_aux_power_well_disable +ffffffff81a1e8e0 t xelpdp_aux_power_well_enabled +ffffffff81a1e990 t chv_set_pipe_power_well +ffffffff81a1eb90 t vlv_display_power_well_init +ffffffff81a1ee20 t vlv_set_power_well +ffffffff81a1f040 t hsw_wait_for_power_well_enable +ffffffff81a1f180 t hsw_wait_for_power_well_disable +ffffffff81a1f450 t tgl_tc_cold_request +ffffffff81a20000 T intel_dkl_phy_read +ffffffff81a20100 T intel_dkl_phy_write +ffffffff81a201e0 T intel_dkl_phy_rmw +ffffffff81a202f0 T intel_dkl_phy_posting_read +ffffffff81a21000 T intel_dmc_has_payload +ffffffff81a21040 T intel_dmc_load_program +ffffffff81a21850 t pipedmc_clock_gating_wa +ffffffff81a21a40 T intel_dmc_disable_program +ffffffff81a21c60 T assert_dmc_loaded +ffffffff81a21db0 T intel_dmc_ucode_init +ffffffff81a22080 t dmc_load_work_fn +ffffffff81a228d0 T intel_dmc_ucode_suspend +ffffffff81a22940 T intel_dmc_ucode_resume +ffffffff81a229e0 T intel_dmc_ucode_fini +ffffffff81a22b10 T intel_dmc_print_error_state +ffffffff81a22bc0 T intel_dmc_debugfs_register +ffffffff81a23000 T intel_dp_is_edp +ffffffff81a23030 T intel_dp_is_uhbr +ffffffff81a23070 T intel_dp_max_lane_count +ffffffff81a230e0 T intel_dp_link_required +ffffffff81a23120 T intel_dp_max_data_rate +ffffffff81a23180 T intel_dp_can_bigjoiner +ffffffff81a231d0 T intel_dp_get_link_train_fallback_values +ffffffff81a23580 T intel_dp_mode_to_fec_clock +ffffffff81a235d0 T intel_dp_min_bpp +ffffffff81a23610 T intel_dp_source_supports_tps3 +ffffffff81a23660 T intel_dp_source_supports_tps4 +ffffffff81a23690 T intel_dp_max_link_rate +ffffffff81a23740 T intel_dp_rate_select +ffffffff81a237e0 T intel_dp_compute_rate +ffffffff81a238b0 T intel_dp_adjust_compliance_config +ffffffff81a239f0 T intel_dp_limited_color_range +ffffffff81a23a60 T intel_dp_compute_psr_vsc_sdp +ffffffff81a23ae0 T intel_dp_needs_vsc_sdp +ffffffff81a23b30 t intel_dp_compute_vsc_colorimetry +ffffffff81a23cb0 T intel_dp_compute_config +ffffffff81a240f0 t intel_dp_compute_output_format +ffffffff81a24320 t intel_dp_drrs_compute_config +ffffffff81a244c0 t intel_dp_compute_vsc_sdp +ffffffff81a24560 t intel_dp_compute_hdr_metadata_infoframe_sdp +ffffffff81a245f0 T intel_dp_set_link_params +ffffffff81a24630 T intel_edp_backlight_on +ffffffff81a246d0 T intel_edp_backlight_off +ffffffff81a24760 T intel_dp_sink_set_decompression_state +ffffffff81a24800 T intel_dp_wait_source_oui +ffffffff81a248c0 T intel_dp_set_power +ffffffff81a24ae0 T intel_dp_sync_state +ffffffff81a24b60 t intel_dp_get_dpcd +ffffffff81a24cc0 t intel_dp_reset_max_link_params +ffffffff81a24dc0 T intel_dp_initial_fastset_check +ffffffff81a24ea0 T intel_dp_check_frl_training +ffffffff81a25450 T intel_dp_pcon_dsc_configure +ffffffff81a25640 T intel_dp_configure_protocol_converter +ffffffff81a257b0 T intel_dp_get_colorimetry_status +ffffffff81a25810 T intel_edp_fixup_vbt_bpp +ffffffff81a258a0 T intel_write_dp_vsc_sdp +ffffffff81a25a40 T intel_dp_set_infoframes +ffffffff81a25b70 t intel_write_dp_sdp +ffffffff81a25e50 T intel_read_dp_sdp +ffffffff81a26170 T intel_dp_retrain_link +ffffffff81a265d0 T intel_dp_phy_test +ffffffff81a26c90 T intel_digital_port_connected +ffffffff81a26d40 T intel_dp_encoder_flush_work +ffffffff81a26d90 T intel_dp_encoder_suspend +ffffffff81a26dd0 T intel_dp_encoder_shutdown +ffffffff81a26e10 T intel_dp_hpd_pulse +ffffffff81a27480 T intel_dp_is_port_edp +ffffffff81a274e0 T intel_dp_init_connector +ffffffff81a285b0 t intel_dp_modeset_retry_work_fn +ffffffff81a28650 t intel_dp_set_common_rates +ffffffff81a287d0 T intel_dp_mst_suspend +ffffffff81a28870 T intel_dp_mst_resume +ffffffff81a28920 t intel_dp_compute_link_config +ffffffff81a29690 t intel_dp_dsc_compute_bpp +ffffffff81a29740 t intel_dp_dsc_get_output_bpp +ffffffff81a29880 t intel_dp_dsc_get_slice_count +ffffffff81a299e0 t intel_dp_set_sink_rates +ffffffff81a29c10 t intel_dp_needs_link_retrain +ffffffff81a29d90 t intel_dp_check_device_service_irq +ffffffff81a2a360 t intel_dp_force +ffffffff81a2a4a0 t intel_dp_connector_register +ffffffff81a2a580 t intel_dp_connector_unregister +ffffffff81a2a5e0 t intel_dp_oob_hotplug_event +ffffffff81a2a660 t intel_dp_set_edid +ffffffff81a2aa90 t intel_dp_get_modes +ffffffff81a2ab90 t intel_dp_detect +ffffffff81a2b460 t intel_dp_mode_valid +ffffffff81a2b8c0 t intel_dp_connector_atomic_check +ffffffff81a2bc30 t intel_dp_get_dsc_sink_cap +ffffffff81a2bda0 t intel_dp_mode_valid_downstream +ffffffff81a2bfe0 t icl_max_source_rate +ffffffff81a2d000 T intel_dp_aux_fini +ffffffff81a2d020 T intel_dp_aux_init +ffffffff81a2d220 t xelpdp_aux_ctl_reg +ffffffff81a2d2e0 t xelpdp_aux_data_reg +ffffffff81a2d3b0 t tgl_aux_ctl_reg +ffffffff81a2d430 t tgl_aux_data_reg +ffffffff81a2d4c0 t skl_aux_ctl_reg +ffffffff81a2d540 t skl_aux_data_reg +ffffffff81a2d5d0 t ilk_aux_ctl_reg +ffffffff81a2d650 t ilk_aux_data_reg +ffffffff81a2d6e0 t g4x_aux_ctl_reg +ffffffff81a2d760 t g4x_aux_data_reg +ffffffff81a2d7f0 t skl_get_aux_clock_divider +ffffffff81a2d820 t hsw_get_aux_clock_divider +ffffffff81a2d8b0 t ilk_get_aux_clock_divider +ffffffff81a2d910 t g4x_get_aux_clock_divider +ffffffff81a2d960 t skl_get_aux_send_ctl +ffffffff81a2d9e0 t g4x_get_aux_send_ctl +ffffffff81a2da30 t kasprintf +ffffffff81a2db00 t intel_dp_aux_transfer +ffffffff81a2dd90 t intel_dp_aux_xfer +ffffffff81a2f000 T intel_dp_aux_init_backlight_funcs +ffffffff81a2f220 t intel_dp_aux_hdr_setup_backlight +ffffffff81a2f370 t intel_dp_aux_hdr_get_backlight +ffffffff81a2f4e0 t intel_dp_aux_hdr_set_backlight +ffffffff81a2f5d0 t intel_dp_aux_hdr_disable_backlight +ffffffff81a2f650 t intel_dp_aux_hdr_enable_backlight +ffffffff81a2f870 t intel_dp_aux_vesa_setup_backlight +ffffffff81a2fa20 t intel_dp_aux_vesa_get_backlight +ffffffff81a2fa50 t intel_dp_aux_vesa_set_backlight +ffffffff81a2faf0 t intel_dp_aux_vesa_disable_backlight +ffffffff81a2fba0 t intel_dp_aux_vesa_enable_backlight +ffffffff81a30000 T intel_dp_hdcp_init +ffffffff81a300b0 t intel_dp_hdcp_write_an_aksv +ffffffff81a301a0 t intel_dp_hdcp_read_bksv +ffffffff81a30230 t intel_dp_hdcp_read_bstatus +ffffffff81a302c0 t intel_dp_hdcp_repeater_present +ffffffff81a30370 t intel_dp_hdcp_read_ri_prime +ffffffff81a30400 t intel_dp_hdcp_read_ksv_ready +ffffffff81a304a0 t intel_dp_hdcp_read_ksv_fifo +ffffffff81a30590 t intel_dp_hdcp_read_v_prime_part +ffffffff81a30630 t intel_dp_hdcp_toggle_signalling +ffffffff81a30660 t intel_dp_mst_hdcp_stream_encryption +ffffffff81a30850 t intel_dp_hdcp_check_link +ffffffff81a308e0 t intel_dp_hdcp_capable +ffffffff81a30990 t intel_dp_hdcp2_capable +ffffffff81a30a10 t intel_dp_hdcp2_write_msg +ffffffff81a30bc0 t intel_dp_hdcp2_read_msg +ffffffff81a31290 t intel_dp_hdcp2_config_stream_type +ffffffff81a312f0 t intel_dp_mst_hdcp2_stream_encryption +ffffffff81a31550 t intel_dp_mst_hdcp2_check_link +ffffffff81a31610 t intel_dp_hdcp2_check_link +ffffffff81a32000 T intel_dp_init_lttpr_and_dprx_caps +ffffffff81a320d0 t intel_dp_init_lttpr +ffffffff81a32310 T intel_dp_get_adjust_train +ffffffff81a329e0 T intel_dp_program_link_training_pattern +ffffffff81a32ae0 T intel_dp_set_signal_levels +ffffffff81a32e50 T intel_dp_dump_link_status +ffffffff81a32f20 T intel_dp_stop_link_train +ffffffff81a33150 T intel_dp_start_link_train +ffffffff81a34200 t intel_dp_link_train_phy +ffffffff81a36000 T intel_dp_mst_encoder_active_links +ffffffff81a36030 T intel_dp_mst_encoder_init +ffffffff81a36270 T intel_dp_mst_source_support +ffffffff81a362b0 T intel_dp_mst_encoder_cleanup +ffffffff81a36310 T intel_dp_mst_is_master_trans +ffffffff81a36350 T intel_dp_mst_is_slave_trans +ffffffff81a36390 T intel_dp_mst_add_topology_state_for_crtc +ffffffff81a36450 t intel_dp_add_mst_connector +ffffffff81a36660 t intel_dp_mst_poll_hpd_irq +ffffffff81a36680 t intel_dp_mst_get_hw_state +ffffffff81a366e0 t intel_dp_mst_connector_late_register +ffffffff81a36750 t intel_dp_mst_connector_early_unregister +ffffffff81a36780 t intel_dp_mst_get_modes +ffffffff81a36820 t intel_dp_mst_detect +ffffffff81a36920 t intel_dp_mst_mode_valid_ctx +ffffffff81a36ac0 t intel_mst_atomic_best_encoder +ffffffff81a36b20 t intel_dp_mst_atomic_check +ffffffff81a36c90 t intel_dp_mst_compute_config +ffffffff81a36fa0 t intel_dp_mst_compute_config_late +ffffffff81a37090 t intel_mst_disable_dp +ffffffff81a37170 t intel_mst_post_disable_dp +ffffffff81a37420 t intel_mst_pre_pll_enable_dp +ffffffff81a37470 t intel_mst_pre_enable_dp +ffffffff81a37690 t intel_mst_enable_dp +ffffffff81a37a70 t intel_dp_mst_enc_get_hw_state +ffffffff81a37ab0 t intel_dp_mst_enc_get_config +ffffffff81a37ad0 t intel_dp_mst_initial_fastset_check +ffffffff81a37af0 t intel_dp_mst_encoder_destroy +ffffffff81a38000 T bxt_port_to_phy_channel +ffffffff81a38110 T bxt_ddi_phy_set_signal_levels +ffffffff81a38630 T bxt_ddi_phy_is_enabled +ffffffff81a38780 T bxt_ddi_phy_uninit +ffffffff81a38880 T bxt_ddi_phy_init +ffffffff81a38aa0 t _bxt_ddi_phy_init +ffffffff81a390a0 T bxt_ddi_phy_verify_state +ffffffff81a39400 t __phy_reg_verify_state +ffffffff81a39500 T bxt_ddi_phy_calc_lane_lat_optim_mask +ffffffff81a39570 T bxt_ddi_phy_set_lane_optim_mask +ffffffff81a39890 T bxt_ddi_phy_get_lane_lat_optim_mask +ffffffff81a39ad0 T chv_set_phy_signal_level +ffffffff81a39e20 T chv_data_lane_soft_reset +ffffffff81a39ff0 T chv_phy_pre_pll_enable +ffffffff81a3a290 T chv_phy_pre_encoder_enable +ffffffff81a3a4f0 T chv_phy_release_cl2_override +ffffffff81a3a580 T chv_phy_post_pll_disable +ffffffff81a3a630 T vlv_set_phy_signal_level +ffffffff81a3a7a0 T vlv_phy_pre_pll_enable +ffffffff81a3a8a0 T vlv_phy_pre_encoder_enable +ffffffff81a3a9a0 T vlv_phy_reset_lanes +ffffffff81a3b000 T pnv_calc_dpll_params +ffffffff81a3b0c0 T i9xx_calc_dpll_params +ffffffff81a3b190 T vlv_calc_dpll_params +ffffffff81a3b250 T chv_calc_dpll_params +ffffffff81a3b320 T bxt_find_best_dpll +ffffffff81a3b340 t chv_find_best_dpll +ffffffff81a3b680 T i9xx_dpll_compute_fp +ffffffff81a3b6c0 T vlv_compute_dpll +ffffffff81a3b740 T chv_compute_dpll +ffffffff81a3b7c0 T intel_dpll_crtc_compute_clock +ffffffff81a3b8c0 T intel_dpll_crtc_get_shared_dpll +ffffffff81a3ba10 T intel_dpll_init_clock_hook +ffffffff81a3bb10 T i9xx_enable_pll +ffffffff81a3bea0 T vlv_enable_pll +ffffffff81a3c3e0 T chv_enable_pll +ffffffff81a3ca30 T vlv_force_pll_on +ffffffff81a3cb80 T vlv_disable_pll +ffffffff81a3cc40 T chv_disable_pll +ffffffff81a3cd70 T i9xx_disable_pll +ffffffff81a3ce70 T vlv_force_pll_off +ffffffff81a3cf60 T assert_pll_enabled +ffffffff81a3d040 T assert_pll_disabled +ffffffff81a3d120 t intel_pll_is_valid +ffffffff81a3d1f0 t dg2_crtc_compute_clock +ffffffff81a3d270 t hsw_crtc_compute_clock +ffffffff81a3d330 t hsw_crtc_get_shared_dpll +ffffffff81a3d3d0 t ilk_crtc_compute_clock +ffffffff81a3d6d0 t ilk_crtc_get_shared_dpll +ffffffff81a3d720 t g4x_find_best_dpll +ffffffff81a3da60 t chv_crtc_compute_clock +ffffffff81a3db70 t vlv_crtc_compute_clock +ffffffff81a3e010 t g4x_crtc_compute_clock +ffffffff81a3e170 t i9xx_compute_dpll +ffffffff81a3e3e0 t pnv_crtc_compute_clock +ffffffff81a3e7c0 t i9xx_crtc_compute_clock +ffffffff81a3e8e0 t i9xx_find_best_dpll +ffffffff81a3ec20 t i8xx_crtc_compute_clock +ffffffff81a3f000 T intel_get_shared_dpll_by_id +ffffffff81a3f040 T intel_get_shared_dpll_id +ffffffff81a3f0d0 T assert_shared_dpll +ffffffff81a3f1f0 T intel_dpll_get_hw_state +ffffffff81a3f220 T icl_tc_port_to_pll_id +ffffffff81a3f250 T intel_enable_shared_dpll +ffffffff81a3f540 T intel_disable_shared_dpll +ffffffff81a3f780 T intel_shared_dpll_swap_state +ffffffff81a3f860 T icl_set_active_port_dpll +ffffffff81a3f8a0 T intel_shared_dpll_init +ffffffff81a3fab0 T intel_compute_shared_dplls +ffffffff81a3fb40 T intel_reserve_shared_dplls +ffffffff81a3fbd0 T intel_release_shared_dplls +ffffffff81a3fc10 T intel_update_active_dpll +ffffffff81a3fc70 T intel_dpll_get_freq +ffffffff81a3fd00 T intel_dpll_update_ref_clks +ffffffff81a3fd50 T intel_dpll_readout_hw_state +ffffffff81a3fed0 T intel_dpll_sanitize_state +ffffffff81a3ffb0 T intel_dpll_dump_hw_state +ffffffff81a40030 T intel_shared_dpll_state_verify +ffffffff81a40150 t verify_single_dpll_state +ffffffff81a40470 T intel_shared_dpll_verify_disabled +ffffffff81a404f0 t icl_compute_dplls +ffffffff81a41120 t icl_get_dplls +ffffffff81a41470 t icl_put_dplls +ffffffff81a41530 t icl_update_active_dpll +ffffffff81a415e0 t icl_update_dpll_ref_clks +ffffffff81a41620 t icl_dump_hw_state +ffffffff81a416e0 t combo_pll_enable +ffffffff81a41900 t combo_pll_disable +ffffffff81a419f0 t combo_pll_get_hw_state +ffffffff81a41a80 t icl_ddi_combo_pll_get_freq +ffffffff81a41c50 t icl_dpll_write +ffffffff81a41ef0 t adlp_cmtg_clock_gating_wa +ffffffff81a42050 t icl_pll_disable +ffffffff81a421f0 t icl_pll_get_hw_state +ffffffff81a42530 t tbt_pll_enable +ffffffff81a426e0 t tbt_pll_disable +ffffffff81a42700 t tbt_pll_get_hw_state +ffffffff81a42720 t icl_ddi_tbt_pll_get_freq +ffffffff81a42790 t mg_pll_enable +ffffffff81a42d20 t mg_pll_disable +ffffffff81a42d60 t dkl_pll_get_hw_state +ffffffff81a42f30 t icl_ddi_mg_pll_get_freq +ffffffff81a43010 t icl_calc_dpll_state +ffffffff81a43150 t intel_find_shared_dpll +ffffffff81a43470 t intel_reference_shared_dpll +ffffffff81a43640 t intel_unreference_shared_dpll +ffffffff81a437a0 t mg_pll_get_hw_state +ffffffff81a439f0 t bxt_compute_dpll +ffffffff81a43cf0 t bxt_get_dpll +ffffffff81a43dc0 t intel_put_dpll +ffffffff81a43e20 t bxt_update_dpll_ref_clks +ffffffff81a43e60 t bxt_dump_hw_state +ffffffff81a43f10 t bxt_ddi_pll_enable +ffffffff81a44a30 t bxt_ddi_pll_disable +ffffffff81a44c40 t bxt_ddi_pll_get_hw_state +ffffffff81a450d0 t bxt_ddi_pll_get_freq +ffffffff81a45160 t bxt_ddi_set_dpll_hw_state +ffffffff81a45350 t skl_compute_dpll +ffffffff81a45ab0 t skl_get_dpll +ffffffff81a45b60 t skl_update_dpll_ref_clks +ffffffff81a45ba0 t skl_dump_hw_state +ffffffff81a45c00 t skl_ddi_dpll0_enable +ffffffff81a45cc0 t skl_ddi_dpll0_disable +ffffffff81a45cf0 t skl_ddi_dpll0_get_hw_state +ffffffff81a45df0 t skl_ddi_pll_get_freq +ffffffff81a45e80 t skl_ddi_wrpll_get_freq +ffffffff81a45fe0 t skl_ddi_pll_enable +ffffffff81a461f0 t skl_ddi_pll_disable +ffffffff81a46280 t skl_ddi_pll_get_hw_state +ffffffff81a463a0 t hsw_compute_dpll +ffffffff81a46bc0 t hsw_get_dpll +ffffffff81a46d10 t hsw_update_dpll_ref_clks +ffffffff81a46d80 t hsw_dump_hw_state +ffffffff81a46db0 t hsw_ddi_wrpll_enable +ffffffff81a46e30 t hsw_ddi_wrpll_disable +ffffffff81a46f10 t hsw_ddi_wrpll_get_hw_state +ffffffff81a46fb0 t hsw_ddi_wrpll_get_freq +ffffffff81a470a0 t hsw_ddi_spll_enable +ffffffff81a47100 t hsw_ddi_spll_disable +ffffffff81a471d0 t hsw_ddi_spll_get_hw_state +ffffffff81a47260 t hsw_ddi_spll_get_freq +ffffffff81a47300 t hsw_ddi_lcpll_enable +ffffffff81a47330 t hsw_ddi_lcpll_disable +ffffffff81a47360 t hsw_ddi_lcpll_get_hw_state +ffffffff81a47390 t hsw_ddi_lcpll_get_freq +ffffffff81a47410 t ibx_compute_dpll +ffffffff81a47440 t ibx_get_dpll +ffffffff81a47540 t ibx_dump_hw_state +ffffffff81a475a0 t ibx_pch_dpll_enable +ffffffff81a47750 t ibx_pch_dpll_disable +ffffffff81a477d0 t ibx_pch_dpll_get_hw_state +ffffffff81a48000 T intel_dpt_pin +ffffffff81a481e0 T intel_dpt_unpin +ffffffff81a48250 T intel_dpt_resume +ffffffff81a48330 T intel_dpt_suspend +ffffffff81a48400 T intel_dpt_create +ffffffff81a487e0 t dpt_insert_page +ffffffff81a48850 t dpt_clear_range +ffffffff81a48880 t dpt_insert_entries +ffffffff81a48970 t dpt_cleanup +ffffffff81a489c0 t dpt_bind_vma +ffffffff81a48a50 t dpt_unbind_vma +ffffffff81a48a80 T intel_dpt_destroy +ffffffff81a48ad0 t __ww_mutex_lock +ffffffff81a49000 T intel_drrs_type_str +ffffffff81a49040 T intel_drrs_is_active +ffffffff81a49070 T intel_drrs_activate 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dcs_disable_backlight +ffffffff81a4c640 t dcs_enable_backlight +ffffffff81a4d000 T intel_dsi_vbt_exec_sequence +ffffffff81a4d020 T intel_dsi_log_params +ffffffff81a4d3a0 T intel_dsi_vbt_init +ffffffff81a4d840 T intel_dsi_vbt_gpio_init +ffffffff81a4d860 T intel_dsi_vbt_gpio_cleanup +ffffffff81a4e000 T intel_dvo_init +ffffffff81a4e4f0 t intel_disable_dvo +ffffffff81a4e5a0 t intel_enable_dvo +ffffffff81a4e690 t intel_dvo_get_hw_state +ffffffff81a4e700 t intel_dvo_get_config +ffffffff81a4e7a0 t intel_dvo_compute_config +ffffffff81a4e830 t intel_dvo_pre_enable +ffffffff81a4e920 t intel_dvo_connector_get_hw_state +ffffffff81a4e9a0 t intel_dvo_enc_destroy +ffffffff81a4e9e0 t intel_dvo_detect +ffffffff81a4eae0 t intel_dvo_get_modes +ffffffff81a4eb50 t intel_dvo_mode_valid +ffffffff81a4f000 T intel_fb_get_format_info +ffffffff81a4f230 T intel_fb_is_ccs_modifier +ffffffff81a4f400 T intel_fb_is_rc_ccs_cc_modifier +ffffffff81a4f5d0 T intel_fb_is_mc_ccs_modifier +ffffffff81a4f7a0 T intel_fb_plane_get_modifiers +ffffffff81a4f8e0 T intel_fb_plane_supports_modifier +ffffffff81a4f960 T intel_format_info_is_yuv_semiplanar +ffffffff81a4fc00 T intel_fb_is_ccs_aux_plane +ffffffff81a4fe40 T intel_fb_rc_ccs_cc_plane +ffffffff81a500a0 T is_surface_linear +ffffffff81a50100 t intel_fb_is_gen12_ccs_aux_plane +ffffffff81a50400 T main_to_ccs_plane +ffffffff81a506e0 T skl_ccs_to_main_plane +ffffffff81a509d0 T skl_main_to_aux_plane +ffffffff81a50c30 T intel_tile_size +ffffffff81a50c70 T intel_tile_width_bytes +ffffffff81a50ec0 T intel_tile_height +ffffffff81a50f20 T intel_tile_row_size +ffffffff81a50fa0 T intel_fb_align_height +ffffffff81a51010 T intel_fb_uses_dpt +ffffffff81a51060 T intel_cursor_alignment +ffffffff81a510c0 T intel_surf_alignment +ffffffff81a512b0 T intel_fb_plane_get_subsampling +ffffffff81a51390 T intel_plane_adjust_aligned_offset +ffffffff81a51400 t intel_adjust_aligned_offset +ffffffff81a515d0 T intel_plane_compute_aligned_offset +ffffffff81a516d0 t intel_compute_aligned_offset +ffffffff81a518a0 T intel_fb_needs_pot_stride_remap +ffffffff81a518f0 T intel_fb_supports_90_270_rotation +ffffffff81a51940 T intel_fill_fb_info +ffffffff81a523f0 t calc_plane_remap_info +ffffffff81a52e80 T intel_fb_fill_view +ffffffff81a52ed0 T intel_plane_compute_gtt +ffffffff81a535a0 T intel_framebuffer_init +ffffffff81a541f0 t intel_fb_modifier_to_tiling +ffffffff81a54400 t gen12_ccs_aux_stride +ffffffff81a54460 T intel_user_framebuffer_create +ffffffff81a545a0 T intel_framebuffer_create +ffffffff81a54630 t intel_adjust_tile_offset +ffffffff81a54770 t intel_plane_can_remap +ffffffff81a549e0 t intel_user_framebuffer_destroy +ffffffff81a54a40 t intel_user_framebuffer_create_handle +ffffffff81a54a70 t intel_user_framebuffer_dirty +ffffffff81a55000 T intel_pin_and_fence_fb_obj +ffffffff81a55330 t i915_gem_object_lock +ffffffff81a55540 T intel_unpin_fb_vma +ffffffff81a555b0 T intel_plane_pin_fb +ffffffff81a558e0 T intel_plane_unpin_fb +ffffffff81a56000 T intel_fbc_cleanup +ffffffff81a561c0 T intel_fbc_pre_update +ffffffff81a56810 T intel_fbc_post_update +ffffffff81a56a60 T intel_fbc_invalidate +ffffffff81a56c80 T intel_fbc_flush +ffffffff81a56f20 T intel_fbc_atomic_check +ffffffff81a574c0 T intel_fbc_disable +ffffffff81a57580 t __intel_fbc_disable +ffffffff81a57710 T intel_fbc_update +ffffffff81a57e00 T intel_fbc_reset_underrun +ffffffff81a57f60 T intel_fbc_handle_fifo_underrun_irq +ffffffff81a58010 T intel_fbc_add_plane +ffffffff81a58040 T intel_fbc_init +ffffffff81a582d0 T intel_fbc_sanitize +ffffffff81a583a0 T intel_fbc_crtc_debugfs_add +ffffffff81a583d0 T intel_fbc_debugfs_register +ffffffff81a58400 t intel_fbc_is_ok +ffffffff81a58540 t intel_fbc_update_state +ffffffff81a588c0 t intel_fbc_underrun_work_fn +ffffffff81a589e0 t ivb_fbc_activate +ffffffff81a58c40 t ilk_fbc_deactivate +ffffffff81a58cf0 t ilk_fbc_is_active +ffffffff81a58d50 t ivb_fbc_is_compressing +ffffffff81a58dc0 t snb_fbc_nuke +ffffffff81a58e40 t ilk_fbc_program_cfb +ffffffff81a58e80 t ivb_fbc_set_false_color +ffffffff81a58f40 t snb_fbc_activate +ffffffff81a58fd0 t ilk_fbc_is_compressing +ffffffff81a59040 t ilk_fbc_activate +ffffffff81a59170 t i965_fbc_nuke +ffffffff81a59210 t g4x_fbc_activate +ffffffff81a59320 t g4x_fbc_deactivate +ffffffff81a593b0 t g4x_fbc_is_active +ffffffff81a59410 t g4x_fbc_is_compressing +ffffffff81a59470 t g4x_fbc_program_cfb +ffffffff81a594a0 t i8xx_fbc_activate +ffffffff81a59610 t i8xx_fbc_deactivate +ffffffff81a596e0 t i8xx_fbc_is_active +ffffffff81a59740 t i8xx_fbc_is_compressing +ffffffff81a597a0 t i8xx_fbc_program_cfb +ffffffff81a59820 t i8xx_fbc_nuke +ffffffff81a5a000 T intel_fbdev_init +ffffffff81a5a4e0 t intel_fbdev_suspend_worker +ffffffff81a5a510 T intel_fbdev_initial_config_async +ffffffff81a5a580 T intel_fbdev_unregister +ffffffff81a5a5c0 T intel_fbdev_set_suspend +ffffffff81a5a5f0 T intel_fbdev_fini +ffffffff81a5a680 T intel_fbdev_output_poll_changed +ffffffff81a5a720 T intel_fbdev_restore_mode +ffffffff81a5a7a0 T intel_fbdev_framebuffer +ffffffff81a5a7e0 t intelfb_create +ffffffff81a5add0 t intel_fbdev_set_par +ffffffff81a5b000 T assert_fdi_tx_enabled +ffffffff81a5b0e0 T assert_fdi_tx_disabled +ffffffff81a5b1c0 T assert_fdi_rx_enabled +ffffffff81a5b280 T assert_fdi_rx_disabled +ffffffff81a5b340 T assert_fdi_tx_pll_enabled +ffffffff81a5b3f0 T assert_fdi_rx_pll_enabled +ffffffff81a5b4b0 T assert_fdi_rx_pll_disabled +ffffffff81a5b570 T intel_fdi_link_train +ffffffff81a5b590 T intel_fdi_pll_freq_update +ffffffff81a5b640 T intel_fdi_link_freq +ffffffff81a5b690 T ilk_fdi_compute_config +ffffffff81a5b9d0 T intel_fdi_normal_train +ffffffff81a5bb60 T hsw_fdi_link_train +ffffffff81a5c040 T hsw_fdi_disable +ffffffff81a5c1a0 T ilk_fdi_pll_enable +ffffffff81a5c3a0 T ilk_fdi_pll_disable +ffffffff81a5c4d0 T ilk_fdi_disable +ffffffff81a5c720 T intel_fdi_init_hook +ffffffff81a5c780 t ilk_fdi_link_train +ffffffff81a5cde0 t gen6_fdi_link_train +ffffffff81a5d620 t ivb_manual_fdi_link_train +ffffffff81a5deb0 t cpt_set_fdi_bc_bifurcation +ffffffff81a5f000 T intel_set_cpu_fifo_underrun_reporting +ffffffff81a5f3c0 T intel_set_pch_fifo_underrun_reporting +ffffffff81a5f5f0 T intel_cpu_fifo_underrun_irq_handler +ffffffff81a5f7e0 T intel_pch_fifo_underrun_irq_handler +ffffffff81a5f860 T intel_check_cpu_fifo_underruns +ffffffff81a5fa70 T intel_check_pch_fifo_underruns +ffffffff81a60000 T intel_frontbuffer_flip_prepare +ffffffff81a60050 T intel_frontbuffer_flip_complete +ffffffff81a60130 T intel_frontbuffer_flip +ffffffff81a60200 T __intel_fb_invalidate +ffffffff81a60290 T __intel_fb_flush +ffffffff81a60380 T intel_frontbuffer_get +ffffffff81a604b0 t frontbuffer_active +ffffffff81a604e0 t frontbuffer_retire +ffffffff81a60520 T intel_frontbuffer_put +ffffffff81a606b0 T intel_frontbuffer_track +ffffffff81a61000 T intel_atomic_global_obj_init +ffffffff81a61070 T intel_atomic_global_obj_cleanup +ffffffff81a61160 T intel_atomic_get_global_obj_state +ffffffff81a613b0 T intel_atomic_get_old_global_obj_state +ffffffff81a61410 T intel_atomic_get_new_global_obj_state +ffffffff81a61470 T intel_atomic_swap_global_state +ffffffff81a615b0 T intel_atomic_clear_global_state +ffffffff81a616d0 T intel_atomic_lock_global_state +ffffffff81a61760 T intel_atomic_serialize_global_state +ffffffff81a62000 T intel_gmbus_is_valid_pin +ffffffff81a62100 T intel_gmbus_reset +ffffffff81a62160 T intel_bb_set_bits +ffffffff81a622a0 T intel_bb_set_dir +ffffffff81a622d0 T intel_bb_read_bits +ffffffff81a62450 T intel_acquire_bus +ffffffff81a62650 T intel_release_bus +ffffffff81a627f0 T intel_send_start +ffffffff81a62810 T intel_send_stop +ffffffff81a62830 T intel_initiate_xfer +ffffffff81a62850 T intel_read_byte +ffffffff81a62870 T intel_write_byte +ffffffff81a62890 T intel_gmbus_output_aksv +ffffffff81a62960 t do_gmbus_xfer +ffffffff81a62f60 T intel_gmbus_setup +ffffffff81a632e0 T intel_gmbus_teardown +ffffffff81a63360 T intel_gmbus_get_adapter +ffffffff81a633e0 T intel_gmbus_force_bit +ffffffff81a63480 T intel_gmbus_is_forced_bit +ffffffff81a634b0 t gmbus_xfer_read +ffffffff81a63790 t gmbus_xfer_write +ffffffff81a639d0 t gmbus_wait +ffffffff81a63db0 t gmbus_wait_idle +ffffffff81a63f40 t gmbus_xfer +ffffffff81a64020 t gmbus_func +ffffffff81a64060 t gmbus_lock_bus +ffffffff81a64080 t gmbus_trylock_bus +ffffffff81a640e0 t gmbus_unlock_bus +ffffffff81a65000 T intel_hdcp_capable +ffffffff81a650a0 t intel_hdcp_read_valid_bksv +ffffffff81a65330 T intel_hdcp2_capable +ffffffff81a65410 T is_hdcp_supported +ffffffff81a65460 T intel_hdcp_component_init +ffffffff81a65490 T intel_hdcp_init +ffffffff81a655d0 t intel_hdcp_check_work +ffffffff81a68100 t intel_hdcp_prop_work +ffffffff81a68180 T intel_hdcp_enable +ffffffff81a681d0 T intel_hdcp_disable +ffffffff81a68300 t intel_hdcp_update_value +ffffffff81a684c0 t _intel_hdcp2_disable +ffffffff81a688b0 t _intel_hdcp_disable +ffffffff81a68ba0 T intel_hdcp_update_pipe +ffffffff81a68d10 T intel_hdcp_component_fini +ffffffff81a68d50 T intel_hdcp_cleanup +ffffffff81a68e90 T intel_hdcp_atomic_check +ffffffff81a68f20 T intel_hdcp_handle_cp_irq +ffffffff81a69020 t __delayed_work_tick +ffffffff81a69040 t hdcp2_authenticate_repeater_topology +ffffffff81a69300 t transcoder_name +ffffffff81a69340 t intel_hdcp_get_repeater_ctl +ffffffff81a69410 t ktime_get_raw +ffffffff81a69490 t wait_remaining_ms_from_jiffies +ffffffff81a69520 t intel_hdcp_auth_downstream +ffffffff81a6a6f0 t intel_write_sha_text +ffffffff81a6b000 T hsw_write_infoframe +ffffffff81a6b420 t hsw_dip_data_reg +ffffffff81a6b5e0 T hsw_read_infoframe +ffffffff81a6b6a0 T intel_hdmi_infoframe_enable +ffffffff81a6b740 T intel_hdmi_infoframes_enabled +ffffffff81a6b850 T intel_read_infoframe +ffffffff81a6b9f0 T intel_hdmi_read_gcp_infoframe +ffffffff81a6bae0 T intel_dp_dual_mode_set_tmds_output +ffffffff81a6bba0 T intel_hdmi_tmds_clock +ffffffff81a6bbf0 T intel_hdmi_bpc_possible +ffffffff81a6bd20 T intel_hdmi_limited_color_range +ffffffff81a6bd90 T intel_hdmi_compute_config +ffffffff81a6c3d0 t intel_hdmi_compute_output_format +ffffffff81a6c500 t intel_hdmi_compute_drm_infoframe +ffffffff81a6c5f0 T intel_hdmi_encoder_shutdown +ffffffff81a6c6c0 T intel_hdmi_handle_sink_scrambling +ffffffff81a6c7c0 T intel_infoframe_init +ffffffff81a6c960 t vlv_write_infoframe +ffffffff81a6ccc0 t vlv_read_infoframe +ffffffff81a6ce80 t vlv_set_infoframes +ffffffff81a6d1e0 t vlv_infoframes_enabled +ffffffff81a6d280 t g4x_write_infoframe +ffffffff81a6d520 t g4x_read_infoframe +ffffffff81a6d660 t g4x_set_infoframes +ffffffff81a6d8f0 t g4x_infoframes_enabled +ffffffff81a6d970 t hsw_set_infoframes +ffffffff81a6dc00 t hsw_infoframes_enabled +ffffffff81a6dc90 t ibx_write_infoframe +ffffffff81a6dfa0 t ibx_read_infoframe +ffffffff81a6e110 t ibx_set_infoframes +ffffffff81a6e460 t ibx_infoframes_enabled +ffffffff81a6e4f0 t cpt_write_infoframe +ffffffff81a6e7f0 t cpt_read_infoframe +ffffffff81a6e960 t cpt_set_infoframes +ffffffff81a6ec40 t cpt_infoframes_enabled +ffffffff81a6ecb0 T intel_hdmi_init_connector +ffffffff81a6f1e0 T intel_hdmi_dsc_get_slice_height +ffffffff81a6f240 T intel_hdmi_dsc_get_num_slices +ffffffff81a6f3c0 T intel_hdmi_dsc_get_bpp +ffffffff81a6f4a0 t intel_hdmi_compute_clock +ffffffff81a6f760 t hdmi_port_clock_valid +ffffffff81a6f960 t intel_write_infoframe +ffffffff81a6fb30 t gen9bc_tgp_port_to_ddc_pin +ffffffff81a6fbd0 t mcc_port_to_ddc_pin +ffffffff81a6fc30 t icl_port_to_ddc_pin +ffffffff81a6fce0 t cnp_port_to_ddc_pin +ffffffff81a6fd50 t chv_port_to_ddc_pin +ffffffff81a6fdb0 t g4x_port_to_ddc_pin +ffffffff81a6fe10 t intel_hdmi_detect +ffffffff81a6ffc0 t intel_hdmi_force +ffffffff81a70070 t intel_hdmi_connector_register +ffffffff81a70080 t intel_hdmi_connector_unregister +ffffffff81a70090 t intel_hdmi_set_edid +ffffffff81a70330 t intel_hdmi_get_modes +ffffffff81a70370 t intel_hdmi_mode_valid +ffffffff81a70510 t intel_hdmi_mode_clock_valid +ffffffff81a706a0 t intel_hdmi_hdcp_write_an_aksv +ffffffff81a707e0 t intel_hdmi_hdcp_read_bksv +ffffffff81a708b0 t intel_hdmi_hdcp_read_bstatus +ffffffff81a70980 t intel_hdmi_hdcp_repeater_present +ffffffff81a70a60 t intel_hdmi_hdcp_read_ri_prime +ffffffff81a70b30 t intel_hdmi_hdcp_read_ksv_ready +ffffffff81a70c10 t intel_hdmi_hdcp_read_ksv_fifo +ffffffff81a70ce0 t intel_hdmi_hdcp_read_v_prime_part +ffffffff81a70dd0 t intel_hdmi_hdcp_toggle_signalling +ffffffff81a71050 t intel_hdmi_hdcp_check_link +ffffffff81a71370 t intel_hdmi_hdcp2_capable +ffffffff81a71430 t intel_hdmi_hdcp2_write_msg +ffffffff81a71520 t intel_hdmi_hdcp2_read_msg +ffffffff81a71920 t intel_hdmi_hdcp2_check_link +ffffffff81a72000 T intel_hpd_pin_default +ffffffff81a72030 T intel_encoder_hotplug +ffffffff81a72160 T intel_hpd_trigger_irq +ffffffff81a721d0 T intel_hpd_irq_handler +ffffffff81a725f0 T intel_hpd_init +ffffffff81a72700 T intel_hpd_poll_enable +ffffffff81a72780 T intel_hpd_poll_disable +ffffffff81a727e0 T intel_hpd_init_work +ffffffff81a728b0 t i915_hotplug_work_func +ffffffff81a72be0 t i915_digport_work_func +ffffffff81a72d60 t i915_hpd_poll_init_work +ffffffff81a72e60 t intel_hpd_irq_storm_reenable_work +ffffffff81a73180 T intel_hpd_cancel_work +ffffffff81a732a0 T intel_hpd_disable +ffffffff81a73330 T intel_hpd_enable +ffffffff81a733a0 t __delayed_work_tick +ffffffff81a74000 T intel_lpe_audio_irq_handler +ffffffff81a74020 T intel_lpe_audio_init +ffffffff81a74050 T intel_lpe_audio_teardown +ffffffff81a74070 T intel_lpe_audio_notify +ffffffff81a75000 T lspcon_detect_hdr_capability +ffffffff81a750b0 T lspcon_write_infoframe +ffffffff81a757f0 T lspcon_read_infoframe +ffffffff81a75830 T lspcon_set_infoframes +ffffffff81a75a90 T lspcon_infoframes_enabled +ffffffff81a75c60 T lspcon_wait_pcon_mode +ffffffff81a75c80 t lspcon_wait_mode +ffffffff81a75f40 T lspcon_init +ffffffff81a76340 T intel_lspcon_infoframes_enabled +ffffffff81a76370 T lspcon_resume +ffffffff81a76610 t lspcon_change_mode +ffffffff81a77000 T intel_lvds_port_enabled +ffffffff81a77080 T intel_get_lvds_encoder +ffffffff81a770e0 T intel_is_dual_link_lvds +ffffffff81a77140 T intel_lvds_init +ffffffff81a77800 t intel_enable_lvds +ffffffff81a77940 t intel_pre_enable_lvds +ffffffff81a77c20 t intel_lvds_compute_config +ffffffff81a77d80 t pch_disable_lvds +ffffffff81a77da0 t pch_post_disable_lvds +ffffffff81a77dc0 t gmch_disable_lvds +ffffffff81a77df0 t intel_lvds_get_hw_state +ffffffff81a77eb0 t intel_lvds_get_config +ffffffff81a77fb0 t intel_lvds_shutdown +ffffffff81a78050 t compute_is_dual_link_lvds +ffffffff81a78120 t intel_no_lvds_dmi_callback +ffffffff81a78170 t intel_disable_lvds +ffffffff81a78290 t intel_lvds_get_modes +ffffffff81a782c0 t intel_lvds_mode_valid +ffffffff81a78360 t intel_dual_link_lvds_callback +ffffffff81a79000 T intel_modeset_setup_hw_state +ffffffff81a7b000 T intel_modeset_verify_crtc +ffffffff81a7b3a0 t verify_connector_state +ffffffff81a7b650 T intel_modeset_verify_disabled +ffffffff81a7c000 T intel_opregion_notify_encoder +ffffffff81a7c170 t swsci +ffffffff81a7c4a0 T intel_opregion_notify_adapter +ffffffff81a7c500 T intel_opregion_asle_intr +ffffffff81a7c550 T intel_opregion_setup +ffffffff81a7cd60 t asle_work +ffffffff81a7d1d0 T intel_opregion_get_panel_type +ffffffff81a7d2c0 T intel_opregion_get_edid +ffffffff81a7d3a0 T intel_opregion_headless_sku +ffffffff81a7d3f0 T intel_opregion_register +ffffffff81a7d480 T intel_opregion_resume +ffffffff81a7d510 T intel_opregion_suspend +ffffffff81a7d5b0 T intel_opregion_unregister +ffffffff81a7d730 t intel_no_opregion_vbt_callback +ffffffff81a7d790 t intel_use_opregion_panel_type_callback +ffffffff81a7e000 T intel_overlay_reset +ffffffff81a7e050 T intel_overlay_switch_off +ffffffff81a7e250 t intel_overlay_release_old_vid +ffffffff81a7e3f0 T intel_overlay_put_image_ioctl +ffffffff81a7e700 t update_pfit_vscale_ratio +ffffffff81a7e7d0 t check_overlay_dst +ffffffff81a7e8a0 t check_overlay_src +ffffffff81a7eaf0 t intel_overlay_do_put_image +ffffffff81a7f640 T intel_overlay_attrs_ioctl +ffffffff81a7f960 t check_gamma +ffffffff81a7fb50 T intel_overlay_setup +ffffffff81a7fda0 t intel_overlay_last_flip_retire +ffffffff81a7fde0 T intel_overlay_cleanup +ffffffff81a7fea0 T intel_overlay_capture_error_state +ffffffff81a7ff90 T intel_overlay_print_error_state +ffffffff81a80360 t intel_overlay_release_old_vid_tail +ffffffff81a80430 t intel_overlay_off_tail +ffffffff81a805e0 t intel_overlay_flip_prepare +ffffffff81a81000 T intel_panel_use_ssc +ffffffff81a81060 T intel_panel_preferred_fixed_mode +ffffffff81a810b0 T intel_panel_fixed_mode +ffffffff81a81170 T intel_panel_downclock_mode +ffffffff81a81260 T intel_panel_highest_mode +ffffffff81a812c0 T intel_panel_get_modes +ffffffff81a81350 T intel_panel_drrs_type +ffffffff81a813a0 T intel_panel_compute_config +ffffffff81a81510 T intel_panel_add_edid_fixed_modes +ffffffff81a81a40 T intel_panel_add_vbt_lfp_fixed_mode +ffffffff81a81aa0 t intel_panel_add_fixed_mode +ffffffff81a81c20 T intel_panel_add_vbt_sdvo_fixed_mode +ffffffff81a81c90 T intel_panel_add_encoder_fixed_mode +ffffffff81a81cd0 T intel_panel_fitting +ffffffff81a82330 T intel_panel_detect +ffffffff81a823c0 T intel_panel_mode_valid +ffffffff81a824d0 T intel_panel_init_alloc +ffffffff81a82520 T intel_panel_init +ffffffff81a825e0 T intel_panel_fini +ffffffff81a83000 T intel_has_pch_trancoder +ffffffff81a83060 T intel_crtc_pch_transcoder +ffffffff81a830a0 T intel_pch_transcoder_get_m1_n1 +ffffffff81a830f0 T intel_pch_transcoder_get_m2_n2 +ffffffff81a83140 T ilk_pch_pre_enable +ffffffff81a83170 T ilk_pch_enable +ffffffff81a83710 t ilk_pch_transcoder_set_timings +ffffffff81a83990 T ilk_pch_disable +ffffffff81a839b0 T ilk_pch_post_disable +ffffffff81a83d00 T ilk_pch_get_config +ffffffff81a83ec0 T lpt_pch_enable +ffffffff81a840f0 T lpt_pch_disable +ffffffff81a84200 T lpt_pch_get_config +ffffffff81a842d0 T intel_pch_sanitize +ffffffff81a845b0 t assert_pch_dp_disabled +ffffffff81a846a0 t assert_pch_hdmi_disabled +ffffffff81a85000 T lpt_disable_iclkip +ffffffff81a85070 T lpt_iclkip +ffffffff81a85100 T lpt_program_iclkip +ffffffff81a85390 T lpt_get_iclkip +ffffffff81a854a0 T lpt_disable_clkout_dp +ffffffff81a85580 T intel_init_pch_refclk +ffffffff81a87000 T intel_crtc_initial_plane_config +ffffffff81a88000 T intel_pps_lock +ffffffff81a88060 T intel_pps_unlock +ffffffff81a880c0 T intel_pps_reset_all +ffffffff81a88210 T intel_pps_check_power_unlocked +ffffffff81a883c0 T intel_pps_wait_power_cycle +ffffffff81a88460 t wait_panel_power_cycle +ffffffff81a885b0 T intel_pps_vdd_on_unlocked +ffffffff81a88980 T intel_pps_vdd_on +ffffffff81a88a80 T intel_pps_vdd_off_sync +ffffffff81a88b50 t intel_pps_vdd_off_sync_unlocked +ffffffff81a88e20 T intel_pps_vdd_off_unlocked +ffffffff81a88f30 T intel_pps_on_unlocked +ffffffff81a89210 T intel_pps_on +ffffffff81a892b0 T intel_pps_off_unlocked +ffffffff81a89500 T intel_pps_off +ffffffff81a895a0 T intel_pps_backlight_on +ffffffff81a89790 T intel_pps_backlight_off +ffffffff81a89980 T intel_pps_backlight_power +ffffffff81a89b70 T vlv_pps_init +ffffffff81a89cd0 t vlv_detach_power_sequencer +ffffffff81a89e30 t vlv_steal_power_sequencer +ffffffff81a89f60 t pps_init_delays +ffffffff81a8a3f0 t pps_init_registers +ffffffff81a8a780 T intel_pps_have_panel_power_or_vdd +ffffffff81a8a8d0 T intel_pps_encoder_reset +ffffffff81a8aa60 t vlv_initial_power_sequencer_setup +ffffffff81a8ad10 t pps_vdd_init +ffffffff81a8ae20 T intel_pps_init +ffffffff81a8afa0 t edp_panel_vdd_work +ffffffff81a8b050 T intel_pps_init_late +ffffffff81a8b1c0 T intel_pps_unlock_regs_wa +ffffffff81a8b2d0 T intel_pps_setup +ffffffff81a8b340 T assert_pps_unlocked +ffffffff81a8b590 t intel_pps_get_registers +ffffffff81a8bc60 t wait_panel_status +ffffffff81a8bf30 t intel_pps_readout_hw_state +ffffffff81a8c0e0 t __delayed_work_tick +ffffffff81a8d000 T intel_psr_irq_handler +ffffffff81a8d650 t transcoder_name +ffffffff81a8d690 T intel_psr_init_dpcd +ffffffff81a8d920 T intel_psr_compute_config +ffffffff81a8db00 t intel_psr2_config_valid +ffffffff81a8df60 T intel_psr_get_config +ffffffff81a8e100 T intel_psr_disable +ffffffff81a8e210 t intel_psr_disable_locked +ffffffff81a8e6a0 T intel_psr_pause +ffffffff81a8e890 t intel_psr_exit +ffffffff81a8eb60 T intel_psr_resume +ffffffff81a8ebf0 t intel_psr_activate +ffffffff81a8f3f0 T intel_psr2_disable_plane_sel_fetch +ffffffff81a8f460 T intel_psr2_program_plane_sel_fetch +ffffffff81a8f630 T intel_psr2_program_trans_man_trk_ctl +ffffffff81a8f720 T intel_psr2_sel_fetch_update +ffffffff81a8fdf0 T intel_psr_pre_plane_update +ffffffff81a8ff70 T intel_psr_post_plane_update +ffffffff81a90960 T intel_psr_wait_for_idle_locked +ffffffff81a90b00 T intel_psr_debug_set +ffffffff81a90d30 t psr_irq_control +ffffffff81a90e60 T intel_psr_invalidate +ffffffff81a910c0 T intel_psr_flush +ffffffff81a91550 T intel_psr_init +ffffffff81a91680 t intel_psr_work +ffffffff81a91820 t tgl_dc3co_disable_work +ffffffff81a91870 T intel_psr_short_pulse +ffffffff81a91c30 T intel_psr_enabled +ffffffff81a91cb0 T intel_psr_lock +ffffffff81a91d70 T intel_psr_unlock +ffffffff81a91e30 t _compute_psr2_sdp_prior_scanline_indication +ffffffff81a91ef0 t _compute_psr2_wake_times +ffffffff81a91fe0 t intel_psr2_sel_fetch_config_valid +ffffffff81a920f0 t psr2_granularity_check +ffffffff81a921b0 t tgl_psr2_disable_dc3co +ffffffff81a922e0 t __delayed_work_tick +ffffffff81a93000 T intel_lookup_range_min_qp +ffffffff81a930c0 T intel_lookup_range_max_qp +ffffffff81a94000 T intel_init_quirks +ffffffff81a940f0 T intel_has_quirk +ffffffff81a94130 t quirk_ssc_force_disable +ffffffff81a94160 t quirk_invert_brightness +ffffffff81a94190 t quirk_backlight_present +ffffffff81a941c0 t quirk_increase_t12_delay +ffffffff81a941f0 t quirk_increase_ddi_disabled_time +ffffffff81a94220 t intel_dmi_reverse_brightness +ffffffff81a94270 t intel_dmi_no_pps_backlight +ffffffff81a95000 T intel_sdvo_port_enabled +ffffffff81a950a0 T intel_sdvo_init +ffffffff81a959f0 t intel_sdvo_compute_config +ffffffff81a95db0 t pch_disable_sdvo +ffffffff81a95de0 t pch_post_disable_sdvo +ffffffff81a95df0 t intel_disable_sdvo +ffffffff81a95f60 t intel_sdvo_pre_enable +ffffffff81a968e0 t intel_enable_sdvo +ffffffff81a96ad0 t intel_sdvo_get_hw_state +ffffffff81a96bc0 t intel_sdvo_get_config +ffffffff81a970f0 t intel_sdvo_ddc_proxy_xfer +ffffffff81a971a0 t intel_sdvo_ddc_proxy_func +ffffffff81a971d0 t __intel_sdvo_write_cmd +ffffffff81a97680 t proxy_lock_bus +ffffffff81a976b0 t proxy_trylock_bus +ffffffff81a976e0 t proxy_unlock_bus +ffffffff81a97710 t intel_sdvo_enc_destroy +ffffffff81a97720 t intel_sdvo_set_output_timings_from_mode +ffffffff81a97820 t intel_sdvo_get_preferred_input_mode +ffffffff81a97bb0 t intel_sdvo_get_dtd_from_mode +ffffffff81a97d30 t intel_sdvo_read_response +ffffffff81a981d0 t intel_sdvo_get_value +ffffffff81a98240 t intel_sdvo_write_sdvox +ffffffff81a98430 t intel_sdvo_write_infoframe +ffffffff81a985f0 t intel_sdvo_dvi_init +ffffffff81a98870 t intel_sdvo_tv_init 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+ffffffff81a9b5b0 T intel_snps_phy_check_hdmi_link_rate +ffffffff81a9b650 T intel_mpllb_enable +ffffffff81a9b8b0 T intel_mpllb_disable +ffffffff81a9ba40 T intel_mpllb_calc_port_clock +ffffffff81a9bb10 T intel_mpllb_readout_hw_state +ffffffff81a9bc80 T intel_mpllb_state_verify +ffffffff81a9d000 T intel_plane_check_src_coordinates +ffffffff81a9d1c0 T vlv_plane_min_cdclk +ffffffff81a9d2b0 T ivb_plane_min_cdclk +ffffffff81a9d370 T hsw_plane_min_cdclk +ffffffff81a9d410 T chv_plane_check_rotation +ffffffff81a9d480 T intel_sprite_set_colorkey_ioctl +ffffffff81a9d740 T intel_sprite_plane_create +ffffffff81a9da90 t vlv_sprite_update_noarm +ffffffff81a9db90 t vlv_sprite_update_arm +ffffffff81a9e220 t vlv_sprite_disable_arm +ffffffff81a9e2b0 t vlv_sprite_get_hw_state +ffffffff81a9e380 t vlv_sprite_check +ffffffff81a9e450 t ivb_sprite_update_noarm +ffffffff81a9e5b0 t ivb_sprite_update_arm +ffffffff81a9e980 t ivb_sprite_disable_arm +ffffffff81a9ea30 t ivb_sprite_get_hw_state +ffffffff81a9eaf0 t g4x_sprite_check +ffffffff81a9ed90 t hsw_sprite_max_stride +ffffffff81a9ede0 t g4x_sprite_max_stride +ffffffff81a9ee50 t ivb_sprite_min_cdclk +ffffffff81a9ef90 t g4x_sprite_update_noarm +ffffffff81a9f0f0 t g4x_sprite_update_arm +ffffffff81a9f520 t g4x_sprite_disable_arm +ffffffff81a9f5d0 t g4x_sprite_get_hw_state +ffffffff81a9f690 t g4x_sprite_min_cdclk +ffffffff81a9f760 t vlv_sprite_ctl +ffffffff81a9f950 t vlv_sprite_format_mod_supported +ffffffff81a9fa80 t ivb_sprite_ctl +ffffffff81a9fcb0 t g4x_sprite_ctl +ffffffff81a9fe70 t snb_sprite_format_mod_supported +ffffffff81a9ff60 t g4x_sprite_format_mod_supported +ffffffff81aa1000 T intel_tc_port_in_tbt_alt_mode +ffffffff81aa1070 T intel_tc_port_in_dp_alt_mode +ffffffff81aa10e0 T intel_tc_port_in_legacy_mode +ffffffff81aa1150 T intel_tc_cold_requires_aux_pw +ffffffff81aa11a0 T intel_tc_port_get_lane_mask +ffffffff81aa1300 T intel_tc_port_get_pin_assignment_mask +ffffffff81aa1460 T intel_tc_port_fia_max_lane_count +ffffffff81aa15a0 T intel_tc_port_set_fia_lane_count +ffffffff81aa17a0 T intel_tc_port_init_mode +ffffffff81aa1bf0 t intel_tc_port_update_mode +ffffffff81aa20f0 T intel_tc_port_sanitize_mode +ffffffff81aa24a0 T intel_tc_port_connected +ffffffff81aa2590 T intel_tc_port_lock +ffffffff81aa25b0 t tc_port_live_status_mask +ffffffff81aa2870 T intel_tc_port_unlock +ffffffff81aa28f0 t __intel_tc_port_lock +ffffffff81aa2af0 T intel_tc_port_flush_work +ffffffff81aa2b10 T intel_tc_port_ref_held +ffffffff81aa2b60 T intel_tc_port_get_link +ffffffff81aa2be0 T intel_tc_port_put_link +ffffffff81aa2c70 T intel_tc_port_init +ffffffff81aa2ef0 t intel_tc_port_disconnect_phy_work +ffffffff81aa2f40 t tc_phy_status_complete +ffffffff81aa3050 t tc_phy_take_ownership +ffffffff81aa31f0 t __delayed_work_tick +ffffffff81aa4000 T intel_tv_init +ffffffff81aa4430 t intel_tv_compute_config +ffffffff81aa48e0 t intel_tv_get_config +ffffffff81aa4da0 t intel_tv_pre_enable +ffffffff81aa56c0 t intel_enable_tv +ffffffff81aa5720 t intel_disable_tv +ffffffff81aa5780 t intel_tv_get_hw_state +ffffffff81aa57e0 t intel_tv_connector_duplicate_state +ffffffff81aa5860 t intel_tv_mode_to_mode +ffffffff81aa59b0 t intel_tv_get_modes +ffffffff81aa5cf0 t intel_tv_detect +ffffffff81aa6140 t intel_tv_mode_valid +ffffffff81aa61f0 t intel_tv_atomic_check +ffffffff81aa7000 T intel_dsc_source_support +ffffffff81aa7060 T intel_dsc_compute_params +ffffffff81aa74f0 T intel_dsc_power_domain +ffffffff81aa75a0 T intel_dsc_dsi_pps_write +ffffffff81aa7840 T intel_dsc_dp_pps_write +ffffffff81aa7930 T intel_uncompressed_joiner_enable +ffffffff81aa7a50 T intel_dsc_enable +ffffffff81aa9320 T intel_dsc_disable +ffffffff81aa94a0 T intel_dsc_get_config +ffffffff81aaa000 T intel_vga_disable +ffffffff81aaa120 T intel_vga_redisable_power_on +ffffffff81aaa1c0 T intel_vga_redisable +ffffffff81aaa280 T intel_vga_reset_io_mem +ffffffff81aaa2e0 T intel_vga_register +ffffffff81aaa310 T intel_vga_unregister +ffffffff81aab000 T intel_vrr_is_capable +ffffffff81aab080 T intel_vrr_check_modeset +ffffffff81aab110 T intel_vrr_vmin_vblank_start +ffffffff81aab170 T intel_vrr_vmax_vblank_start +ffffffff81aab1d0 T intel_vrr_compute_config +ffffffff81aab340 T intel_vrr_enable +ffffffff81aab510 T intel_vrr_send_push +ffffffff81aab590 T intel_vrr_is_push_sent +ffffffff81aab620 T intel_vrr_disable +ffffffff81aab6f0 T intel_vrr_get_config +ffffffff81aac000 T skl_update_scaler_crtc +ffffffff81aac0b0 t skl_update_scaler +ffffffff81aac3f0 T skl_update_scaler_plane +ffffffff81aac7e0 T skl_pfit_enable +ffffffff81aaccd0 T skl_program_plane_scaler +ffffffff81aad380 T skl_detach_scalers +ffffffff81aad4e0 T skl_scaler_disable +ffffffff81aae000 T skl_format_to_fourcc +ffffffff81aae180 T icl_is_nv12_y_plane +ffffffff81aae1f0 T icl_is_hdr_plane +ffffffff81aae230 T skl_calc_main_surface_offset +ffffffff81aae470 T skl_universal_plane_create +ffffffff81aaeb40 t icl_plane_min_width +ffffffff81aaecd0 t icl_hdr_plane_max_width +ffffffff81aaed20 t icl_sdr_plane_max_width +ffffffff81aaed50 t icl_plane_max_height +ffffffff81aaed80 t icl_plane_min_cdclk +ffffffff81aaedc0 t glk_plane_max_width +ffffffff81aaee70 t skl_plane_max_height +ffffffff81aaeea0 t glk_plane_min_cdclk +ffffffff81aaef10 t skl_plane_max_width +ffffffff81aaefe0 t skl_plane_min_cdclk +ffffffff81aaf050 t skl_plane_max_stride +ffffffff81aaf0f0 t icl_plane_update_noarm +ffffffff81aaf9a0 t icl_plane_update_arm +ffffffff81aafb10 t icl_plane_disable_arm +ffffffff81aafc20 t skl_plane_update_noarm +ffffffff81aafdc0 t skl_plane_update_arm +ffffffff81ab00d0 t skl_plane_disable_arm +ffffffff81ab0180 t skl_plane_get_hw_state +ffffffff81ab0250 t skl_plane_check +ffffffff81ab0e70 t skl_plane_async_flip +ffffffff81ab0fa0 t skl_plane_enable_flip_done +ffffffff81ab1000 t skl_plane_disable_flip_done +ffffffff81ab1060 T skl_get_initial_plane_config +ffffffff81ab1780 t skl_plane_aux_dist +ffffffff81ab1870 t skl_surf_address +ffffffff81ab1990 t skl_plane_check_nv12_rotation +ffffffff81ab1a30 t skl_plane_ctl +ffffffff81ab20a0 t glk_plane_color_ctl +ffffffff81ab21e0 t skl_check_main_ccs_coordinates +ffffffff81ab2370 t gen12_plane_format_mod_supported +ffffffff81ab25c0 t skl_plane_format_mod_supported +ffffffff81ab3000 T intel_enabled_dbuf_slices_mask +ffffffff81ab3130 T intel_sagv_pre_plane_update +ffffffff81ab32c0 T intel_sagv_post_plane_update +ffffffff81ab3530 T intel_can_enable_sagv +ffffffff81ab35a0 T skl_ddb_dbuf_slice_mask +ffffffff81ab3650 T skl_write_plane_wm +ffffffff81ab3a70 T skl_write_cursor_wm +ffffffff81ab3dd0 T skl_ddb_allocation_overlaps +ffffffff81ab3e70 T skl_wm_get_hw_state +ffffffff81ab4430 t skl_pipe_wm_get_hw_state +ffffffff81ab4780 t skl_compute_dbuf_slices +ffffffff81ab4c80 T skl_wm_sanitize +ffffffff81ab4ee0 T intel_wm_state_verify +ffffffff81ab5790 T skl_watermark_ipc_enabled +ffffffff81ab57c0 T skl_watermark_ipc_update +ffffffff81ab5870 T skl_watermark_ipc_init +ffffffff81ab5970 T skl_wm_init +ffffffff81ab6070 T intel_atomic_get_dbuf_state +ffffffff81ab6090 T intel_dbuf_init +ffffffff81ab6100 T intel_dbuf_pre_plane_update +ffffffff81ab63e0 T intel_dbuf_post_plane_update +ffffffff81ab64b0 T intel_mbus_dbox_update +ffffffff81ab6720 T skl_watermark_ipc_debugfs_register +ffffffff81ab6750 t skl_sagv_disable +ffffffff81ab6870 t skl_ddb_entry_for_slices +ffffffff81ab69b0 t skl_compute_wm +ffffffff81ab97e0 t skl_build_plane_wm_single +ffffffff81ab9af0 t skl_compute_wm_params +ffffffff81ab9ee0 t skl_compute_plane_wm +ffffffff81aba3b0 t intel_dbuf_duplicate_state +ffffffff81aba440 t intel_dbuf_destroy_state +ffffffff81abb000 T pixel_format_from_register_bits +ffffffff81abb060 T vlv_dsi_wait_for_fifo_empty +ffffffff81abb120 T vlv_dsi_init +ffffffff81abb960 t intel_dsi_compute_config +ffffffff81abbab0 t intel_dsi_pre_enable +ffffffff81abd670 t bxt_dsi_enable +ffffffff81abd6d0 t intel_dsi_disable +ffffffff81abd980 t intel_dsi_post_disable +ffffffff81abe600 t intel_dsi_get_hw_state +ffffffff81abe8d0 t intel_dsi_get_config +ffffffff81abf070 t intel_dsi_shutdown +ffffffff81abf160 t intel_dsi_encoder_destroy +ffffffff81abf190 t intel_dsi_prepare +ffffffff81abfe80 t dpi_send_cmd +ffffffff81ac0000 t intel_dsi_host_attach +ffffffff81ac0030 t intel_dsi_host_detach +ffffffff81ac0060 t intel_dsi_host_transfer +ffffffff81ac04c0 t vlv_dsi_mode_valid +ffffffff81ac1000 T vlv_dsi_pll_compute +ffffffff81ac13a0 t vlv_dsi_pclk +ffffffff81ac1540 T vlv_dsi_pll_enable +ffffffff81ac1770 T vlv_dsi_pll_disable +ffffffff81ac17f0 T bxt_dsi_pll_is_enabled +ffffffff81ac18c0 T bxt_dsi_pll_disable +ffffffff81ac19c0 T vlv_dsi_get_pclk +ffffffff81ac1a60 T bxt_dsi_get_pclk +ffffffff81ac1b20 T vlv_dsi_reset_clocks +ffffffff81ac1bb0 T bxt_dsi_pll_compute +ffffffff81ac1d50 T bxt_dsi_pll_enable +ffffffff81ac20c0 T bxt_dsi_reset_clocks +ffffffff81ac21e0 T assert_dsi_pll_enabled +ffffffff81ac22c0 T assert_dsi_pll_disabled +ffffffff81ac3000 T i915_gem_busy_ioctl +ffffffff81ac4000 T i915_gem_clflush_object +ffffffff81ac4200 t clflush_work +ffffffff81ac4260 t clflush_release +ffffffff81ac5000 T i915_lut_handle_alloc +ffffffff81ac5020 T i915_lut_handle_free +ffffffff81ac5040 T i915_gem_context_release +ffffffff81ac5070 T i915_gem_init__contexts +ffffffff81ac50d0 T i915_gem_context_open +ffffffff81ac5230 t i915_gem_create_context +ffffffff81ac59a0 t proto_context_close +ffffffff81ac5a50 t gem_context_register +ffffffff81ac5bf0 T i915_gem_context_close +ffffffff81ac5d40 t context_close +ffffffff81ac63e0 T i915_gem_vm_create_ioctl +ffffffff81ac64f0 t xa_alloc +ffffffff81ac6570 T i915_gem_vm_destroy_ioctl +ffffffff81ac6620 T i915_gem_user_to_context_sseu +ffffffff81ac6880 T i915_gem_context_lookup +ffffffff81ac69b0 T i915_gem_context_create_ioctl +ffffffff81ac6c20 t proto_context_register +ffffffff81ac6d70 T i915_gem_context_destroy_ioctl +ffffffff81ac6e90 T i915_gem_context_getparam_ioctl +ffffffff81ac72b0 T i915_gem_context_setparam_ioctl +ffffffff81ac7760 t set_proto_ctx_param +ffffffff81ac7e00 T i915_gem_context_reset_stats_ioctl +ffffffff81ac7f00 T i915_gem_engines_iter_next +ffffffff81ac7f50 T i915_gem_context_module_exit +ffffffff81ac7f70 T i915_gem_context_module_init +ffffffff81ac7fd0 t i915_gem_context_release_work +ffffffff81ac80a0 t intel_context_set_gem +ffffffff81ac81b0 t engines_notify +ffffffff81ac8320 t intel_context_unpin +ffffffff81ac83b0 t kill_engines +ffffffff81ac8540 t create_setparam +ffffffff81ac85b0 t invalid_ext +ffffffff81ac85e0 t lookup_user_engine +ffffffff81ac86a0 t set_proto_ctx_engines_balance +ffffffff81ac8980 t set_proto_ctx_engines_bond +ffffffff81ac8d00 t set_proto_ctx_engines_parallel_submit +ffffffff81aca000 T __i915_gem_object_create_user +ffffffff81aca020 t __i915_gem_object_create_user_ext +ffffffff81aca4d0 T i915_gem_dumb_create +ffffffff81aca640 T i915_gem_create_ioctl +ffffffff81aca710 T i915_gem_create_ext_ioctl +ffffffff81aca8d0 t ext_set_placements +ffffffff81acace0 t ext_set_protected +ffffffff81acb000 T i915_gem_prime_export +ffffffff81acb090 T i915_gem_prime_import +ffffffff81acc000 T i915_gem_cpu_write_needs_clflush +ffffffff81acc060 T i915_gem_object_flush_if_display +ffffffff81acc270 t i915_gem_object_unlock +ffffffff81acc330 T i915_gem_object_flush_if_display_locked +ffffffff81acc3b0 T i915_gem_object_set_to_wc_domain +ffffffff81acc4b0 t flush_write_domain +ffffffff81acc600 T i915_gem_object_set_to_gtt_domain +ffffffff81acc750 T i915_gem_object_set_cache_level +ffffffff81acc7f0 T i915_gem_get_caching_ioctl +ffffffff81acc890 T i915_gem_set_caching_ioctl +ffffffff81accbb0 t i915_gem_object_lock_interruptible +ffffffff81acccc0 T i915_gem_object_pin_to_display_plane +ffffffff81acceb0 T i915_gem_object_set_to_cpu_domain +ffffffff81accf80 T i915_gem_set_domain_ioctl +ffffffff81acd170 T i915_gem_object_prepare_read +ffffffff81acd2c0 T i915_gem_object_prepare_write +ffffffff81ace000 T i915_gem_execbuffer2_ioctl +ffffffff81aceb80 t eb_select_context +ffffffff81acec00 t eb_select_engine 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gen11_hpd_irq_setup +ffffffff81b84300 t bxt_hpd_irq_setup +ffffffff81b84480 t bdw_update_port_irq +ffffffff81b845c0 t spt_hpd_irq_setup +ffffffff81b847e0 t ilk_hpd_irq_setup +ffffffff81b84a40 t gen11_display_irq_reset +ffffffff81b84fc0 t ibx_irq_reset +ffffffff81b85100 t cherryview_irq_handler +ffffffff81b853e0 t valleyview_irq_handler +ffffffff81b85750 t i965_irq_handler +ffffffff81b85d00 t i915_irq_handler +ffffffff81b861f0 t i8xx_irq_handler +ffffffff81b865b0 t dg1_irq_handler +ffffffff81b86760 t gen11_irq_handler +ffffffff81b868b0 t gen8_irq_handler +ffffffff81b86990 t ilk_irq_handler +ffffffff81b87840 t i9xx_pipestat_irq_ack +ffffffff81b879b0 t i9xx_hpd_irq_handler +ffffffff81b87bc0 t valleyview_pipestat_irq_handler +ffffffff81b87dc0 t i9xx_pipe_crc_irq_handler +ffffffff81b87f10 t gen8_de_irq_handler +ffffffff81b89260 t ilk_hpd_irq_handler +ffffffff81b89380 t cpt_irq_handler +ffffffff81b897a0 t ibx_hpd_irq_handler +ffffffff81b89940 t i915_enable_asle_pipestat +ffffffff81b89b30 t gen8_de_irq_postinstall +ffffffff81b8b000 T i915_memcpy_from_wc +ffffffff81b8b120 T i915_unaligned_memcpy_from_wc +ffffffff81b8b240 T i915_memcpy_init_early +ffffffff81b8c000 T i915_mitigate_clear_residuals +ffffffff81b8d000 T i915_init +ffffffff81b8d230 t i915_check_nomodeset +ffffffff81b8d2b0 t i915_mock_selftests +ffffffff81b8d2e0 t i915_pmu_init +ffffffff81b8d310 t i915_pmu_exit +ffffffff81b8e000 T i915_params_dump +ffffffff81b91120 T i915_params_copy +ffffffff81b91fd0 T i915_params_free +ffffffff81b93000 T i915_pci_register_driver +ffffffff81b93030 T i915_pci_unregister_driver +ffffffff81b94000 T i915_oa_config_release +ffffffff81b94060 T i915_perf_get_oa_config +ffffffff81b940c0 T i915_oa_init_reg_state +ffffffff81b941b0 T i915_perf_open_ioctl +ffffffff81b946e0 T i915_perf_register +ffffffff81b94710 T i915_perf_unregister +ffffffff81b94780 T i915_perf_add_config_ioctl +ffffffff81b947d0 T i915_perf_remove_config_ioctl +ffffffff81b94840 T i915_perf_init +ffffffff81b94bc0 t gen7_is_valid_b_counter_addr +ffffffff81b94c10 t hsw_is_valid_mux_addr +ffffffff81b94c90 t hsw_enable_metric_set +ffffffff81b94d70 t hsw_disable_metric_set +ffffffff81b94e80 t gen7_oa_enable +ffffffff81b94fe0 t gen7_oa_disable +ffffffff81b950a0 t gen7_oa_read +ffffffff81b955c0 t gen7_oa_hw_tail_read +ffffffff81b95610 t gen8_oa_read +ffffffff81b95c60 t gen8_is_valid_mux_addr +ffffffff81b95ce0 t gen8_is_valid_flex_addr +ffffffff81b95d60 t chv_is_valid_mux_addr +ffffffff81b95de0 t gen8_oa_enable +ffffffff81b95f20 t gen8_oa_disable +ffffffff81b95fe0 t gen8_enable_metric_set +ffffffff81b960a0 t gen8_disable_metric_set +ffffffff81b96130 t gen8_oa_hw_tail_read +ffffffff81b96180 t gen11_is_valid_mux_addr +ffffffff81b96240 t gen11_disable_metric_set +ffffffff81b962d0 t gen12_is_valid_b_counter_addr +ffffffff81b96320 t gen12_is_valid_mux_addr +ffffffff81b96370 t gen12_oa_enable +ffffffff81b964f0 t gen12_oa_disable +ffffffff81b96630 t gen12_enable_metric_set +ffffffff81b96760 t gen12_disable_metric_set +ffffffff81b96840 t gen12_oa_hw_tail_read +ffffffff81b96890 T i915_perf_sysctl_register +ffffffff81b968c0 T i915_perf_sysctl_unregister +ffffffff81b968f0 T i915_perf_fini +ffffffff81b969d0 t destroy_config +ffffffff81b96a60 T i915_perf_ioctl_version +ffffffff81b96a90 t emit_oa_config +ffffffff81b97170 t i915_gem_object_lock +ffffffff81b97380 t append_oa_status +ffffffff81b97400 t lrc_configure_all_contexts +ffffffff81b975b0 t oa_configure_all_contexts +ffffffff81b978d0 t gen8_modify_self +ffffffff81b97aa0 t gen8_modify_context +ffffffff81b97c40 t gen12_configure_oar_context +ffffffff81b98000 T i915_query_ioctl +ffffffff81b98100 t query_topology_info +ffffffff81b98150 t query_engine_info +ffffffff81b98390 t query_perf_config +ffffffff81b98690 t query_memregion_info +ffffffff81b98920 t query_hwconfig_blob +ffffffff81b989a0 t query_geometry_subslices +ffffffff81b98a30 t fill_topology_info +ffffffff81b98bd0 t query_perf_config_data +ffffffff81b98f30 t copy_perf_config_registers_or_number +ffffffff81b9a000 T i915_request_slab_cache +ffffffff81b9a030 t i915_fence_get_driver_name +ffffffff81b9a060 t i915_fence_get_timeline_name +ffffffff81b9a0c0 t i915_fence_enable_signaling +ffffffff81b9a0d0 t i915_fence_signaled +ffffffff81b9a120 t i915_fence_wait +ffffffff81b9a140 t i915_fence_release +ffffffff81b9a230 T i915_request_notify_execute_cb_imm +ffffffff81b9a2a0 T i915_request_active_engine +ffffffff81b9a380 T i915_request_free_capture_list +ffffffff81b9a3f0 T i915_request_retire +ffffffff81b9a590 T i915_request_retire_upto +ffffffff81b9a600 T __i915_request_skip +ffffffff81b9a6a0 T i915_request_set_error_once +ffffffff81b9a710 T i915_request_mark_eio +ffffffff81b9a7a0 T __i915_request_submit +ffffffff81b9a990 T i915_request_submit +ffffffff81b9a9e0 T __i915_request_unsubmit +ffffffff81b9aa50 T i915_request_unsubmit +ffffffff81b9aad0 T i915_request_cancel +ffffffff81b9ab50 T __i915_request_create +ffffffff81b9ae60 t request_alloc_slow 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i915_sw_fence_complete +ffffffff81ba0040 t __i915_sw_fence_complete +ffffffff81ba01c0 T i915_sw_fence_await +ffffffff81ba0240 T __i915_sw_fence_init +ffffffff81ba02b0 T i915_sw_fence_reinit +ffffffff81ba02f0 T i915_sw_fence_commit +ffffffff81ba0330 T i915_sw_fence_await_sw_fence +ffffffff81ba0350 t __i915_sw_fence_await_sw_fence +ffffffff81ba0570 T i915_sw_fence_await_sw_fence_gfp +ffffffff81ba0590 T i915_sw_fence_await_dma_fence +ffffffff81ba07c0 t dma_i915_sw_fence_wake +ffffffff81ba0840 t irq_i915_sw_fence_work +ffffffff81ba0880 t timer_i915_sw_fence_wake +ffffffff81ba0960 t dma_i915_sw_fence_wake_timer +ffffffff81ba09f0 T __i915_sw_fence_await_dma_fence +ffffffff81ba0b30 t __dma_i915_sw_fence_wake +ffffffff81ba0b90 T i915_sw_fence_await_reservation +ffffffff81ba0c70 t i915_sw_fence_wake +ffffffff81ba1000 T dma_fence_work_init +ffffffff81ba1080 t fence_notify +ffffffff81ba1170 t fence_work +ffffffff81ba11d0 T dma_fence_work_chain +ffffffff81ba1220 t get_driver_name +ffffffff81ba1250 t get_timeline_name +ffffffff81ba1290 t fence_release +ffffffff81ba2000 T i915_switcheroo_register +ffffffff81ba2030 T i915_switcheroo_unregister +ffffffff81ba3000 T i915_syncmap_init +ffffffff81ba3030 T i915_syncmap_is_later +ffffffff81ba3130 T i915_syncmap_set +ffffffff81ba31e0 t __sync_set +ffffffff81ba34d0 T i915_syncmap_free +ffffffff81ba3530 t __sync_free +ffffffff81ba4000 T i915_setup_sysfs +ffffffff81ba4030 T i915_teardown_sysfs +ffffffff81ba5000 T i915_ttm_buddy_man_init +ffffffff81ba5210 T i915_ttm_buddy_man_fini +ffffffff81ba5400 T i915_ttm_buddy_man_reserve +ffffffff81ba54d0 T i915_ttm_buddy_man_visible_size +ffffffff81ba5500 T i915_ttm_buddy_man_avail +ffffffff81ba5560 t i915_ttm_buddy_man_alloc +ffffffff81ba5880 t i915_ttm_buddy_man_free +ffffffff81ba58f0 t i915_ttm_buddy_man_intersects +ffffffff81ba59a0 t i915_ttm_buddy_man_compatible +ffffffff81ba5a50 t i915_ttm_buddy_man_debug +ffffffff81ba6000 T i915_user_extensions +ffffffff81ba7000 T __i915_printk +ffffffff81ba70e0 T add_taint_for_CI +ffffffff81ba7110 T cancel_timer +ffffffff81ba7160 T set_timer_ms +ffffffff81ba7210 T i915_vtd_active +ffffffff81ba8000 T intel_vgpu_detect +ffffffff81ba8030 T intel_vgpu_register +ffffffff81ba8090 T intel_vgpu_active +ffffffff81ba80c0 T intel_vgpu_has_full_ppgtt +ffffffff81ba8100 T intel_vgpu_has_hwsp_emulation +ffffffff81ba8140 T intel_vgpu_has_huge_gtt +ffffffff81ba8180 T intel_vgt_deballoon +ffffffff81ba83c0 T intel_vgt_balloon +ffffffff81ba9000 T i915_vma_instance +ffffffff81ba9110 t vma_create +ffffffff81ba95a0 T i915_vma_work +ffffffff81ba9610 T i915_vma_wait_for_bind +ffffffff81ba9690 T i915_vma_bind +ffffffff81ba99e0 T i915_vma_pin_iomap +ffffffff81ba9bb0 T i915_vma_flush_writes +ffffffff81ba9c00 T i915_vma_unpin_iomap +ffffffff81ba9c70 T i915_vma_unpin_and_release +ffffffff81ba9ce0 T i915_vma_misplaced +ffffffff81ba9d80 T __i915_vma_set_map_and_fenceable +ffffffff81ba9df0 T i915_gem_valid_gtt_space +ffffffff81ba9e80 T vma_invalidate_tlb +ffffffff81ba9ec0 T i915_vma_pin_ww +ffffffff81baa590 t i915_vma_insert +ffffffff81baa8f0 T i915_ggtt_pin +ffffffff81baa9d0 t __i915_ggtt_pin +ffffffff81baab40 t i915_gem_object_lock +ffffffff81baad50 T i915_vma_close +ffffffff81baae20 T i915_vma_reopen +ffffffff81baaea0 T i915_vma_destroy_locked +ffffffff81baaf90 t release_references +ffffffff81bab0c0 T i915_vma_destroy +ffffffff81bab200 T i915_vma_parked +ffffffff81bab4d0 T i915_vma_revoke_mmap +ffffffff81bab5d0 T _i915_vma_move_to_active +ffffffff81bab800 T __i915_vma_evict +ffffffff81babb50 T __i915_vma_unbind +ffffffff81babbf0 T i915_vma_unbind +ffffffff81babd40 T i915_vma_unbind_async +ffffffff81babeb0 t __i915_vma_unbind_async +ffffffff81babf70 T i915_vma_unbind_unlocked +ffffffff81bac080 T i915_vma_make_unshrinkable +ffffffff81bac0c0 T i915_vma_make_shrinkable +ffffffff81bac0e0 T i915_vma_make_purgeable +ffffffff81bac100 T i915_vma_module_exit +ffffffff81bac120 T i915_vma_module_init +ffffffff81bac180 t __i915_vma_active +ffffffff81bac1d0 t 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t i915_vma_resource_unbind_work +ffffffff81bae000 T intel_platform_name +ffffffff81bae090 T intel_device_info_print +ffffffff81baed30 T intel_device_info_subplatform_init +ffffffff81baf0e0 T intel_device_info_runtime_init +ffffffff81baf7d0 T intel_driver_caps_print +ffffffff81bb0000 T intel_dram_detect +ffffffff81bb01b0 t gen11_get_dram_info +ffffffff81bb0200 t bxt_get_dram_info +ffffffff81bb0510 t skl_get_dram_info +ffffffff81bb06f0 T intel_dram_edram_detect +ffffffff81bb0780 t icl_pcode_read_mem_global_info +ffffffff81bb0860 t skl_dram_get_channel_info +ffffffff81bb0a30 t skl_dram_get_dimm_info +ffffffff81bb1000 T intel_memory_region_lookup +ffffffff81bb10e0 T intel_memory_region_by_type +ffffffff81bb11a0 T intel_memory_region_reserve +ffffffff81bb11c0 T intel_memory_region_debug +ffffffff81bb1220 T intel_memory_region_create +ffffffff81bb1390 T intel_memory_region_set_name +ffffffff81bb1410 T intel_memory_region_avail +ffffffff81bb1490 T intel_memory_region_destroy +ffffffff81bb1500 T intel_memory_regions_hw_probe +ffffffff81bb1650 T intel_memory_regions_driver_release +ffffffff81bb2000 T intel_detect_pch +ffffffff81bb21b0 t intel_pch_match +ffffffff81bb2200 t intel_pch_type +ffffffff81bb29c0 t intel_virt_detect_pch +ffffffff81bb3000 T snb_pcode_read +ffffffff81bb30d0 t __snb_pcode_rw +ffffffff81bb3260 T snb_pcode_write_timeout +ffffffff81bb3330 T skl_pcode_request +ffffffff81bb3670 T intel_pcode_init +ffffffff81bb36d0 T snb_pcode_read_p +ffffffff81bb37e0 T snb_pcode_write_p +ffffffff81bb4000 T intel_set_memory_cxsr +ffffffff81bb40a0 t _intel_set_memory_cxsr +ffffffff81bb4340 T intel_wm_plane_visible +ffffffff81bb43a0 T ilk_wm_max_level +ffffffff81bb4410 T intel_print_wm_latency +ffffffff81bb4570 T ilk_disable_lp_wm +ffffffff81bb4650 T g4x_wm_get_hw_state +ffffffff81bb4e50 T g4x_wm_sanitize +ffffffff81bb4ff0 t g4x_program_watermarks +ffffffff81bb5390 T vlv_wm_get_hw_state +ffffffff81bb6010 t vlv_invalidate_wms +ffffffff81bb6190 T vlv_wm_sanitize +ffffffff81bb62f0 t vlv_program_watermarks +ffffffff81bb6a40 T ilk_wm_get_hw_state +ffffffff81bb6ec0 T intel_init_clock_gating +ffffffff81bb6ee0 T intel_suspend_hw +ffffffff81bb6f90 T intel_init_clock_gating_hooks +ffffffff81bb71f0 T intel_init_pm +ffffffff81bb7c20 t intel_get_cxsr_latency +ffffffff81bb7ce0 T intel_pm_setup +ffffffff81bb7d20 t chv_set_memory_dvfs +ffffffff81bb7ee0 t pvc_init_clock_gating +ffffffff81bb8090 t dg2_init_clock_gating +ffffffff81bb81e0 t xehpsdv_init_clock_gating +ffffffff81bb82e0 t adlp_init_clock_gating +ffffffff81bb83d0 t gen12lp_init_clock_gating +ffffffff81bb8540 t dg1_init_clock_gating +ffffffff81bb8630 t icl_init_clock_gating +ffffffff81bb86f0 t cfl_init_clock_gating +ffffffff81bb8810 t gen9_init_clock_gating +ffffffff81bb8920 t skl_init_clock_gating +ffffffff81bb8a60 t kbl_init_clock_gating +ffffffff81bb8c70 t bxt_init_clock_gating +ffffffff81bb8dd0 t glk_init_clock_gating +ffffffff81bb8e30 t bdw_init_clock_gating +ffffffff81bb9280 t chv_init_clock_gating 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vlv_compute_pipe_wm +ffffffff81bbd280 t vlv_compute_intermediate_wm +ffffffff81bbd5a0 t vlv_initial_watermarks +ffffffff81bbd620 t vlv_atomic_update_fifo +ffffffff81bbd920 t vlv_optimize_watermarks +ffffffff81bbd9e0 t g4x_compute_pipe_wm +ffffffff81bbe690 t g4x_compute_intermediate_wm +ffffffff81bbeaf0 t g4x_initial_watermarks +ffffffff81bbeb90 t g4x_optimize_watermarks +ffffffff81bbec70 t pnv_update_wm +ffffffff81bbf330 t i965_update_wm +ffffffff81bbf6f0 t i9xx_update_wm +ffffffff81bbfe80 t i845_update_wm +ffffffff81bc1000 T intel_region_ttm_device_init +ffffffff81bc1070 T intel_region_ttm_device_fini +ffffffff81bc1090 T intel_region_to_ttm_type +ffffffff81bc10d0 T intel_region_ttm_init +ffffffff81bc1170 T intel_region_ttm_fini +ffffffff81bc13d0 T intel_region_ttm_resource_to_rsgt +ffffffff81bc1410 T intel_region_ttm_resource_free +ffffffff81bc2000 T intel_runtime_pm_get_raw +ffffffff81bc2090 T intel_runtime_pm_get +ffffffff81bc2140 T intel_runtime_pm_get_if_in_use +ffffffff81bc21f0 T intel_runtime_pm_get_if_active +ffffffff81bc22a0 T intel_runtime_pm_get_noresume +ffffffff81bc23d0 T intel_runtime_pm_put_raw +ffffffff81bc2460 T intel_runtime_pm_put_unchecked +ffffffff81bc2520 T intel_runtime_pm_enable +ffffffff81bc2550 T intel_runtime_pm_disable +ffffffff81bc2580 T intel_runtime_pm_driver_release +ffffffff81bc2610 T intel_runtime_pm_init_early +ffffffff81bc3000 T intel_sbi_read +ffffffff81bc3050 t intel_sbi_rw +ffffffff81bc3240 T intel_sbi_write +ffffffff81bc4000 T intel_step_init +ffffffff81bc43f0 T intel_step_name +ffffffff81bc4430 t pvc_step_lookup +ffffffff81bc5000 T gen3_stolen_base +ffffffff81bc5050 T gen11_stolen_base +ffffffff81bc50d0 T i830_stolen_size +ffffffff81bc5150 T gen3_stolen_size +ffffffff81bc51c0 T gen6_stolen_size +ffffffff81bc5210 T chv_stolen_size +ffffffff81bc5280 T gen8_stolen_size +ffffffff81bc52e0 T gen9_stolen_size +ffffffff81bc5360 T intel_init_stolen_res +ffffffff81bc6000 T intel_uncore_mmio_debug_init_early +ffffffff81bc6060 T intel_uncore_forcewake_domain_to_str +ffffffff81bc60d0 T intel_uncore_fw_release_timer +ffffffff81bc61f0 T intel_uncore_suspend +ffffffff81bc6240 t intel_uncore_forcewake_reset +ffffffff81bc6510 T intel_uncore_resume_early +ffffffff81bc6640 T intel_uncore_unclaimed_mmio +ffffffff81bc66b0 T intel_uncore_runtime_resume +ffffffff81bc66e0 T intel_uncore_forcewake_get +ffffffff81bc6850 T intel_uncore_forcewake_user_get +ffffffff81bc6970 T intel_uncore_forcewake_get__locked +ffffffff81bc6a40 T intel_uncore_forcewake_user_put +ffffffff81bc6b80 T intel_uncore_forcewake_put__locked +ffffffff81bc6c80 T intel_uncore_forcewake_put +ffffffff81bc6da0 T intel_uncore_forcewake_put_delayed +ffffffff81bc6ef0 T intel_uncore_forcewake_flush +ffffffff81bc6fa0 T assert_forcewakes_inactive +ffffffff81bc7010 T assert_forcewakes_active +ffffffff81bc7040 T intel_uncore_setup_mmio +ffffffff81bc7070 t uncore_unmap_mmio +ffffffff81bc70a0 T intel_uncore_init_early +ffffffff81bc7110 T intel_uncore_init_mmio +ffffffff81bc8740 T intel_uncore_prune_engine_fw_domains +ffffffff81bc8900 t fw_domain_fini +ffffffff81bc8a00 T intel_uncore_fini_mmio +ffffffff81bc8aa0 T __intel_wait_for_register_fw +ffffffff81bc8d60 T __intel_wait_for_register +ffffffff81bc9100 T intel_uncore_forcewake_for_reg +ffffffff81bc9210 t check_for_unclaimed_mmio +ffffffff81bc9370 T intel_uncore_arm_unclaimed_mmio_detection +ffffffff81bc9480 t vgpu_write8 +ffffffff81bc94c0 t vgpu_write16 +ffffffff81bc9500 t vgpu_write32 +ffffffff81bc9540 t vgpu_read8 +ffffffff81bc9580 t vgpu_read16 +ffffffff81bc95c0 t vgpu_read32 +ffffffff81bc9600 t vgpu_read64 +ffffffff81bc9640 t gen5_write8 +ffffffff81bc9740 t gen5_write16 +ffffffff81bc9840 t gen5_write32 +ffffffff81bc9940 t gen5_read8 +ffffffff81bc9a30 t gen5_read16 +ffffffff81bc9b20 t gen5_read32 +ffffffff81bc9c10 t gen5_read64 +ffffffff81bc9d00 t gen2_write8 +ffffffff81bc9de0 t gen2_write16 +ffffffff81bc9ec0 t gen2_write32 +ffffffff81bc9fa0 t gen2_read8 +ffffffff81bca070 t gen2_read16 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__intel_wakeref_get_first +ffffffff81bcd0a0 T __intel_wakeref_put_last +ffffffff81bcd100 t ____intel_wakeref_put_last +ffffffff81bcd1d0 T __intel_wakeref_init +ffffffff81bcd250 t __intel_wakeref_put_work +ffffffff81bcd2c0 T intel_wakeref_wait_for_idle +ffffffff81bcd3f0 T intel_wakeref_auto_init +ffffffff81bcd470 t wakeref_auto_timeout +ffffffff81bcd520 T intel_wakeref_auto +ffffffff81bcd720 T intel_wakeref_auto_fini +ffffffff81bcd7e0 t __delayed_work_tick +ffffffff81bce000 T intel_wopcm_init_early +ffffffff81bce080 T intel_wopcm_init +ffffffff81bcf000 T vlv_iosf_sb_get +ffffffff81bcf020 T vlv_iosf_sb_put +ffffffff81bcf040 T vlv_punit_read +ffffffff81bcf090 t vlv_sideband_rw +ffffffff81bcf240 T vlv_punit_write +ffffffff81bcf290 T vlv_bunit_read +ffffffff81bcf2e0 T vlv_bunit_write +ffffffff81bcf330 T vlv_nc_read +ffffffff81bcf380 T vlv_iosf_sb_read +ffffffff81bcf3d0 T vlv_iosf_sb_write +ffffffff81bcf420 T vlv_cck_read +ffffffff81bcf470 T vlv_cck_write +ffffffff81bcf4c0 T vlv_ccu_read +ffffffff81bcf510 T vlv_ccu_write +ffffffff81bcf560 T vlv_dpio_read +ffffffff81bcf630 T vlv_dpio_write +ffffffff81bcf6a0 T vlv_flisdsi_read +ffffffff81bcf6f0 T vlv_flisdsi_write +ffffffff81bd0000 T vlv_suspend_complete +ffffffff81bd0a40 T vlv_resume_prepare +ffffffff81bd1480 T vlv_suspend_init +ffffffff81bd14f0 T vlv_suspend_cleanup +ffffffff81bd1550 t vlv_wait_for_pw_status +ffffffff81bd2000 T atom_execute_table_scratch_unlocked +ffffffff81bd20a0 t atom_execute_table_locked +ffffffff81bd23b0 T atom_execute_table +ffffffff81bd2460 T atom_parse +ffffffff81bd2610 T atom_destroy +ffffffff81bd2650 T atom_asic_init +ffffffff81bd2860 t get_u32 +ffffffff81bd28c0 T atom_parse_data_header +ffffffff81bd2960 T atom_parse_cmd_header +ffffffff81bd29e0 T atom_allocate_fb_scratch +ffffffff81bd2ab0 t atom_op_move +ffffffff81bd2c80 t atom_op_and +ffffffff81bd2e60 t atom_op_or +ffffffff81bd3040 t atom_op_shift_left +ffffffff81bd3220 t atom_op_shift_right +ffffffff81bd3400 t atom_op_mul +ffffffff81bd3550 t atom_op_div +ffffffff81bd36c0 t atom_op_add +ffffffff81bd38a0 t atom_op_sub +ffffffff81bd3a80 t atom_op_setport +ffffffff81bd3c00 t atom_op_setregblock +ffffffff81bd3cc0 t atom_op_setfbbase +ffffffff81bd3d80 t atom_op_compare +ffffffff81bd3f60 t atom_op_switch +ffffffff81bd4190 t atom_op_jump +ffffffff81bd4400 t atom_op_test +ffffffff81bd45c0 t atom_op_delay +ffffffff81bd46a0 t atom_op_calltable +ffffffff81bd47f0 t atom_op_repeat +ffffffff81bd4820 t atom_op_clear +ffffffff81bd4930 t atom_op_nop +ffffffff81bd4960 t atom_op_eot +ffffffff81bd4990 t atom_op_mask +ffffffff81bd4c40 t atom_op_postcard +ffffffff81bd4cf0 t atom_op_beep +ffffffff81bd4d10 t atom_op_savereg +ffffffff81bd4d40 t atom_op_restorereg +ffffffff81bd4d70 t atom_op_setdatablock +ffffffff81bd4eb0 t atom_op_xor +ffffffff81bd5090 t atom_op_shl +ffffffff81bd52b0 t atom_op_shr +ffffffff81bd54d0 t atom_op_debug +ffffffff81bd5500 t atom_put_dst +ffffffff81bd5a10 t atom_get_src_int +ffffffff81bd6090 t atom_iio_execute +ffffffff81bd7000 T atombios_crtc_dpms +ffffffff81bd7300 T atombios_crtc_set_base +ffffffff81bd7350 t dce4_crtc_do_set_base +ffffffff81bd7e90 t avivo_crtc_do_set_base +ffffffff81bd8730 T atombios_crtc_set_base_atomic +ffffffff81bd8780 T radeon_atom_disp_eng_pll_init +ffffffff81bd8860 t atombios_crtc_set_disp_eng_pll +ffffffff81bd8970 t atombios_crtc_program_ss +ffffffff81bd8c00 T atombios_crtc_mode_set +ffffffff81bd9690 T radeon_atombios_init_crtc +ffffffff81bd9780 t radeon_bo_reserve +ffffffff81bd98f0 t radeon_bo_unreserve +ffffffff81bd99d0 t atombios_disable_ss +ffffffff81bd9ab0 t atombios_crtc_program_pll +ffffffff81bd9d60 t atombios_crtc_prepare +ffffffff81bd9e20 t atombios_crtc_commit +ffffffff81bd9ea0 t atombios_crtc_mode_fixup +ffffffff81bdabb0 t atombios_crtc_disable +ffffffff81bdae10 t radeon_get_shared_dp_ppll +ffffffff81bdaf00 t radeon_get_shared_nondp_ppll +ffffffff81bdc000 T radeon_atom_copy_swap +ffffffff81bdc020 T radeon_dp_aux_init +ffffffff81bdc110 t radeon_dp_aux_transfer_atom +ffffffff81bdc2e0 T radeon_dp_getsinktype +ffffffff81bdc350 T radeon_dp_getdpcd +ffffffff81bdc4c0 T radeon_dp_get_panel_mode +ffffffff81bdc5d0 T radeon_dp_set_link_config +ffffffff81bdc650 t radeon_dp_get_dp_link_config +ffffffff81bdc7e0 T radeon_dp_mode_valid_helper +ffffffff81bdc890 T radeon_dp_needs_link_train +ffffffff81bdc900 T radeon_dp_set_rx_power_state +ffffffff81bdc980 T radeon_dp_link_train +ffffffff81bdd100 t radeon_process_aux_ch +ffffffff81bdd2b0 t dp_get_adjust_train +ffffffff81bde000 T atombios_get_backlight_level +ffffffff81bde070 T atombios_set_backlight_level +ffffffff81bde220 T atombios_dig_transmitter_setup +ffffffff81bde240 T radeon_atom_backlight_init +ffffffff81bde420 t radeon_atom_backlight_get_brightness +ffffffff81bde480 T atombios_dvo_setup +ffffffff81bde640 T atombios_digital_setup +ffffffff81bde900 T atombios_get_encoder_mode +ffffffff81bdeb90 T atombios_dig_encoder_setup2 +ffffffff81bdefd0 T atombios_dig_encoder_setup +ffffffff81bdeff0 T atombios_dig_transmitter_setup2 +ffffffff81bdf9d0 T atombios_set_edp_panel_power +ffffffff81bdfae0 T radeon_atom_release_dig_encoder +ffffffff81bdfb20 T radeon_atom_pick_dig_encoder +ffffffff81bdfd40 T radeon_atom_encoder_init +ffffffff81bdfe10 t atombios_external_encoder_setup +ffffffff81be0080 T radeon_atom_ext_encoder_setup_ddc +ffffffff81be00d0 T radeon_enc_destroy +ffffffff81be0180 T radeon_add_atom_encoder +ffffffff81be0590 t radeon_atombios_set_dig_info +ffffffff81be0600 t radeon_atombios_set_dac_info +ffffffff81be0670 t radeon_atom_backlight_update_status +ffffffff81be06d0 t radeon_atom_encoder_dpms +ffffffff81be0970 t radeon_atom_mode_fixup +ffffffff81be0ab0 t radeon_atom_encoder_prepare +ffffffff81be0f90 t radeon_atom_encoder_commit +ffffffff81be0fc0 t radeon_atom_encoder_mode_set +ffffffff81be1570 t radeon_atom_dig_detect +ffffffff81be1680 t radeon_atom_encoder_disable +ffffffff81be1910 t radeon_atom_encoder_dpms_avivo +ffffffff81be1b40 t radeon_atom_encoder_dpms_dig +ffffffff81be2080 t atombios_dac_setup +ffffffff81be2160 t radeon_atom_dac_detect +ffffffff81be2350 t radeon_atom_ext_dpms +ffffffff81be2380 t radeon_atom_ext_prepare +ffffffff81be23b0 t radeon_atom_ext_commit +ffffffff81be23e0 t radeon_atom_ext_mode_set +ffffffff81be2410 t radeon_atom_ext_disable +ffffffff81be3000 T radeon_atom_hw_i2c_xfer +ffffffff81be3140 t radeon_process_i2c_ch +ffffffff81be3310 T radeon_atom_hw_i2c_func +ffffffff81be4000 T btc_get_max_clock_from_voltage_dependency_table +ffffffff81be40d0 T btc_apply_voltage_dependency_rules +ffffffff81be4140 T btc_skip_blacklist_clocks +ffffffff81be4230 T btc_adjust_clock_combinations +ffffffff81be4360 T btc_apply_voltage_delta_rules +ffffffff81be4480 T btc_program_mgcg_hw_sequence +ffffffff81be4580 T btc_dpm_enabled +ffffffff81be4590 T btc_notify_uvd_to_smc +ffffffff81be4600 T btc_reset_to_default +ffffffff81be4650 T btc_read_arb_registers +ffffffff81be46e0 T btc_dpm_vblank_too_short +ffffffff81be4750 T btc_dpm_pre_set_power_state +ffffffff81be5970 T btc_dpm_set_power_state +ffffffff81be5ca0 t btc_set_power_state_conditionally_enable_ulv +ffffffff81be5dd0 T btc_dpm_post_set_power_state +ffffffff81be5ef0 t btc_update_current_ps +ffffffff81be5ff0 T btc_dpm_enable +ffffffff81be6ed0 t btc_cg_clock_gating_enable +ffffffff81be7000 t btc_mg_clock_gating_enable +ffffffff81be7120 t btc_ls_clock_gating_enable +ffffffff81be7250 t btc_init_stutter_mode +ffffffff81be72d0 T btc_dpm_disable +ffffffff81be75b0 T btc_dpm_setup_asic +ffffffff81be7690 T btc_dpm_init +ffffffff81be7a80 T btc_dpm_fini +ffffffff81be7b30 T btc_dpm_debugfs_print_current_performance_level +ffffffff81be7b80 T btc_dpm_get_current_sclk +ffffffff81be7c00 T btc_dpm_get_current_mclk +ffffffff81be7c80 T btc_dpm_get_sclk +ffffffff81be7cd0 T btc_dpm_get_mclk +ffffffff81be8000 T ci_dpm_powergate_uvd +ffffffff81be8380 T ci_dpm_vblank_too_short +ffffffff81be8410 T ci_fan_ctrl_get_fan_speed_percent +ffffffff81be84b0 T ci_fan_ctrl_set_fan_speed_percent +ffffffff81be8580 T ci_fan_ctrl_set_mode +ffffffff81be8720 t ci_fan_ctrl_set_static_mode +ffffffff81be87e0 t ci_thermal_start_smc_fan_control +ffffffff81be8a20 T ci_fan_ctrl_get_mode +ffffffff81be8a80 T ci_dpm_force_performance_level +ffffffff81be9310 t ci_upload_dpm_level_enable_mask +ffffffff81be9640 T ci_dpm_pre_set_power_state +ffffffff81be9930 T ci_dpm_post_set_power_state +ffffffff81be9a00 T ci_dpm_setup_asic +ffffffff81be9c00 T ci_dpm_enable +ffffffff81beb4d0 t ci_init_smc_table +ffffffff81bec3c0 t ci_init_arb_table_index +ffffffff81bec450 t ci_populate_initial_mc_reg_table +ffffffff81bec690 t ci_populate_pm_base +ffffffff81beca00 t ci_dpm_start_smc +ffffffff81beca80 t ci_enable_vr_hot_gpio_interrupt +ffffffff81becb20 t ci_notify_smc_display_change +ffffffff81becbf0 t ci_enable_sclk_control +ffffffff81becc20 t ci_enable_ulv +ffffffff81becd70 t ci_enable_ds_master_switch +ffffffff81becf60 t ci_start_dpm +ffffffff81bed150 t ci_enable_didt +ffffffff81bed400 t ci_enable_smc_cac +ffffffff81bed590 t ci_enable_power_containment +ffffffff81beda10 t ci_power_control_set_level +ffffffff81bedb20 t ci_enable_auto_throttle_source +ffffffff81bedc00 t ci_enable_thermal_based_sclk_dpm +ffffffff81bedd50 t ci_thermal_start_thermal_controller +ffffffff81bee050 T ci_dpm_late_enable +ffffffff81bee0f0 T ci_dpm_disable +ffffffff81bee7e0 T ci_dpm_set_power_state +ffffffff81bef450 t ci_update_sclk_t +ffffffff81bef4c0 t ci_update_and_upload_mc_reg_table +ffffffff81bef670 t ci_unfreeze_sclk_mclk_dpm +ffffffff81bef820 t ci_notify_link_speed_change_after_state_change +ffffffff81bef950 T ci_dpm_display_configuration_changed +ffffffff81befae0 T ci_dpm_fini +ffffffff81befb90 T ci_dpm_init +ffffffff81bf09f0 t ci_initialize_powertune_defaults +ffffffff81bf0ae0 t ci_get_leakage_voltages +ffffffff81bf0c90 t ci_patch_dependency_tables_with_leakage +ffffffff81bf1300 t ci_set_private_data_variables_based_on_pptable +ffffffff81bf1410 T ci_dpm_debugfs_print_current_performance_level +ffffffff81bf1550 T ci_dpm_print_power_state +ffffffff81bf1610 T ci_dpm_get_current_sclk +ffffffff81bf16e0 T ci_dpm_get_current_mclk +ffffffff81bf17b0 T ci_dpm_get_sclk +ffffffff81bf1800 T ci_dpm_get_mclk +ffffffff81bf1850 t ci_set_valid_flag +ffffffff81bf18f0 t ci_populate_all_graphic_levels +ffffffff81bf1e80 t ci_populate_all_memory_levels +ffffffff81bf2780 t ci_populate_smc_vce_level +ffffffff81bf28a0 t ci_populate_smc_acp_level +ffffffff81bf29a0 t ci_populate_smc_samu_level +ffffffff81bf2aa0 t ci_do_program_memory_timing_parameters +ffffffff81bf2cc0 t ci_populate_smc_uvd_level +ffffffff81bf2e10 t ci_populate_smc_initial_state +ffffffff81bf2eb0 t ci_populate_bapm_parameters_in_dpm_table +ffffffff81bf3040 t ci_populate_smc_voltage_table +ffffffff81bf3160 t ci_min_max_v_gnbl_pm_lid_from_bapm_vddc +ffffffff81bf33c0 t ci_enable_sclk_mclk_dpm +ffffffff81bf3730 t ci_thermal_enable_alert +ffffffff81bf38e0 t ci_enable_vce_dpm +ffffffff81bf4000 T ci_copy_bytes_to_smc +ffffffff81bf4240 T ci_start_smc +ffffffff81bf4280 T ci_reset_smc +ffffffff81bf42c0 T ci_program_jump_on_start +ffffffff81bf42f0 T ci_stop_smc_clock +ffffffff81bf4330 T ci_start_smc_clock +ffffffff81bf4370 T ci_is_smc_running +ffffffff81bf43e0 T ci_load_smc_ucode +ffffffff81bf4570 T ci_read_smc_sram_dword +ffffffff81bf4640 T ci_write_smc_sram_dword +ffffffff81bf5000 T cik_get_allowed_info_register +ffffffff81bf50a0 T cik_didt_rreg +ffffffff81bf5140 T cik_didt_wreg +ffffffff81bf51c0 T ci_get_temp +ffffffff81bf5210 T kv_get_temp +ffffffff81bf5260 T cik_pciep_rreg +ffffffff81bf52e0 T cik_pciep_wreg +ffffffff81bf5350 T cik_get_xclk +ffffffff81bf53c0 T cik_mm_rdoorbell +ffffffff81bf5420 T cik_mm_wdoorbell +ffffffff81bf5470 T ci_mc_load_microcode +ffffffff81bf57b0 T cik_ring_test +ffffffff81bf5a50 T cik_fence_gfx_ring_emit +ffffffff81bf5e40 T cik_fence_compute_ring_emit +ffffffff81bf60c0 T cik_semaphore_ring_emit +ffffffff81bf6280 T cik_copy_cpdma +ffffffff81bf66d0 T cik_ring_ib_execute +ffffffff81bf6c70 T cik_ib_test +ffffffff81bf6f50 T cik_gfx_get_rptr +ffffffff81bf6fb0 T cik_gfx_get_wptr +ffffffff81bf6ff0 T cik_gfx_set_wptr +ffffffff81bf7030 T cik_compute_get_rptr +ffffffff81bf7110 T cik_compute_get_wptr +ffffffff81bf71f0 T cik_compute_set_wptr +ffffffff81bf7270 T cik_gpu_check_soft_reset +ffffffff81bf73e0 T cik_asic_reset +ffffffff81bf77f0 t cik_gpu_pci_config_reset +ffffffff81bf8000 T cik_gfx_is_lockup +ffffffff81bf8070 T cik_pcie_gart_tlb_flush +ffffffff81bf80c0 T cik_ib_parse +ffffffff81bf80f0 T cik_vm_init +ffffffff81bf8150 T cik_vm_fini +ffffffff81bf8180 T cik_vm_flush +ffffffff81bf8df0 T cik_enter_rlc_safe_mode +ffffffff81bf8ee0 T cik_exit_rlc_safe_mode +ffffffff81bf8f20 T cik_update_cg +ffffffff81bf9410 t cik_enable_mgcg +ffffffff81bf9930 t cik_enable_cgcg +ffffffff81bf9ca0 T cik_init_cp_pg_table +ffffffff81bf9f10 T cik_get_csb_size +ffffffff81bf9fa0 T cik_get_csb_buffer +ffffffff81bfa130 T cik_irq_set +ffffffff81bfaeb0 t cik_disable_interrupt_state +ffffffff81bfb370 T cik_irq_process +ffffffff81bfcb40 t cik_irq_ack +ffffffff81bfd4c0 T cik_resume +ffffffff81bfd550 t cik_init_golden_registers +ffffffff81bfd710 t cik_startup +ffffffff81c004e0 T cik_suspend +ffffffff81c008d0 T cik_init +ffffffff81c00df0 t cik_init_microcode +ffffffff81c01b40 t cik_uvd_init +ffffffff81c01bf0 t cik_vce_init +ffffffff81c01cc0 t cik_cp_fini +ffffffff81c01d40 t cik_irq_fini +ffffffff81c01e50 t cik_mec_fini +ffffffff81c01f00 t cik_pcie_gart_fini +ffffffff81c02000 T cik_fini +ffffffff81c02320 T dce8_program_fmt +ffffffff81c02450 T dce8_bandwidth_update +ffffffff81c03060 T cik_get_gpu_clock_counter +ffffffff81c03120 T cik_set_uvd_clocks +ffffffff81c031a0 t cik_set_uvd_clock +ffffffff81c03310 T cik_set_vce_clocks +ffffffff81c03550 t cik_wait_for_rlc_serdes +ffffffff81c03710 t cik_mec_init +ffffffff81c038f0 t cik_uvd_start +ffffffff81c039d0 t cik_vce_start +ffffffff81c03ae0 t cik_irq_init +ffffffff81c04660 t cik_cp_resume +ffffffff81c05e00 t cik_uvd_resume +ffffffff81c05ed0 t cik_vce_resume +ffffffff81c05fc0 t pcie_capability_set_word +ffffffff81c060d0 t pcie_capability_read_word +ffffffff81c06170 t pcie_capability_clear_and_set_word +ffffffff81c06290 t pcie_capability_write_word +ffffffff81c06350 t cik_get_cu_active_bitmap +ffffffff81c064d0 t radeon_bo_reserve +ffffffff81c06640 t radeon_bo_unreserve +ffffffff81c06720 t cik_update_gfx_pg +ffffffff81c068c0 t cik_compute_stop +ffffffff81c06a30 t cik_cp_compute_fini +ffffffff81c06bd0 t request_firmware +ffffffff81c06c60 t release_firmware +ffffffff81c06ca0 t dce8_latency_watermark +ffffffff81c07000 T cik_sdma_get_rptr +ffffffff81c07070 T cik_sdma_get_wptr +ffffffff81c070c0 T cik_sdma_set_wptr +ffffffff81c07110 T cik_sdma_ring_ib_execute +ffffffff81c07510 T cik_sdma_fence_ring_emit +ffffffff81c076e0 t cik_sdma_hdp_flush_ring_emit +ffffffff81c07910 T cik_sdma_semaphore_ring_emit +ffffffff81c07a30 T cik_sdma_enable +ffffffff81c07c10 T cik_sdma_resume +ffffffff81c080f0 T cik_sdma_fini +ffffffff81c08130 T cik_copy_dma +ffffffff81c08530 T cik_sdma_ring_test +ffffffff81c087e0 T cik_sdma_ib_test +ffffffff81c08a40 T cik_sdma_is_lockup +ffffffff81c08ac0 T cik_sdma_vm_copy_pages +ffffffff81c08bd0 T cik_sdma_vm_write_pages +ffffffff81c08d40 T cik_sdma_vm_set_pages +ffffffff81c08ec0 T cik_sdma_vm_pad_ib +ffffffff81c08f10 T cik_dma_vm_flush +ffffffff81c0a000 T cypress_enable_spread_spectrum +ffffffff81c0a140 T cypress_start_dpm +ffffffff81c0a190 T cypress_enable_sclk_control +ffffffff81c0a1f0 T cypress_enable_mclk_control +ffffffff81c0a250 T cypress_notify_smc_display_change +ffffffff81c0a2a0 T cypress_program_response_times +ffffffff81c0a360 T cypress_advertise_gen2_capability +ffffffff81c0a430 T cypress_notify_link_speed_change_after_state_change +ffffffff81c0a4f0 T cypress_notify_link_speed_change_before_state_change +ffffffff81c0a5b0 T cypress_get_strobe_mode_settings +ffffffff81c0a6b0 T cypress_get_mclk_frequency_ratio +ffffffff81c0a760 T cypress_map_clkf_to_ibias +ffffffff81c0a820 T cypress_convert_power_level_to_smc +ffffffff81c0abf0 t cypress_populate_mclk_value +ffffffff81c0b000 T cypress_upload_sw_state +ffffffff81c0b180 T cypress_upload_mc_reg_table +ffffffff81c0b240 t cypress_convert_mc_reg_table_to_smc +ffffffff81c0b4d0 T cypress_calculate_burst_time +ffffffff81c0b560 T cypress_program_memory_timing_parameters +ffffffff81c0b700 T cypress_populate_smc_initial_state +ffffffff81c0bab0 T cypress_populate_smc_acpi_state +ffffffff81c0be30 T cypress_construct_voltage_tables +ffffffff81c0bfc0 T cypress_populate_smc_voltage_tables +ffffffff81c0c0f0 T cypress_get_mvdd_configuration +ffffffff81c0c1c0 T cypress_populate_mc_reg_table +ffffffff81c0c410 T cypress_get_table_locations +ffffffff81c0c4f0 T cypress_enable_display_gap +ffffffff81c0c550 T cypress_dpm_setup_asic +ffffffff81c0c640 T cypress_dpm_enable +ffffffff81c0d110 t cypress_force_mc_use_s1 +ffffffff81c0d390 t cypress_gfx_clock_gating_enable +ffffffff81c0d6a0 t cypress_mg_clock_gating_enable +ffffffff81c0d920 T cypress_dpm_disable +ffffffff81c0db50 T cypress_dpm_set_power_state +ffffffff81c0dd90 T cypress_dpm_display_configuration_changed +ffffffff81c0de70 T cypress_dpm_init +ffffffff81c0e0e0 T cypress_dpm_fini +ffffffff81c0e170 T cypress_dpm_vblank_too_short +ffffffff81c0e1e0 t cypress_wait_for_mc_sequencer +ffffffff81c0f000 T dce3_2_afmt_hdmi_write_speaker_allocation +ffffffff81c0f070 T dce3_2_afmt_dp_write_speaker_allocation +ffffffff81c0f0e0 T dce3_2_afmt_write_sad_regs +ffffffff81c0f1e0 T dce3_2_audio_set_dto +ffffffff81c0f320 T dce3_2_hdmi_update_acr +ffffffff81c0f680 T dce3_2_set_audio_packet +ffffffff81c0f810 T dce3_2_set_mute +ffffffff81c10000 T dce6_endpoint_rreg +ffffffff81c100e0 T dce6_endpoint_wreg +ffffffff81c101d0 T dce6_audio_get_pin +ffffffff81c10360 T dce6_afmt_select_pin +ffffffff81c103f0 T dce6_afmt_write_latency_fields +ffffffff81c104b0 T dce6_afmt_hdmi_write_speaker_allocation +ffffffff81c10580 T dce6_afmt_dp_write_speaker_allocation +ffffffff81c10650 T dce6_afmt_write_sad_regs +ffffffff81c10790 T dce6_audio_enable +ffffffff81c107e0 T dce6_hdmi_audio_set_dto +ffffffff81c10850 T dce6_dp_audio_set_dto +ffffffff81c11000 T eg_cg_rreg +ffffffff81c11080 T eg_cg_wreg +ffffffff81c110f0 T eg_pif_phy0_rreg +ffffffff81c11170 T eg_pif_phy0_wreg +ffffffff81c111d0 T eg_pif_phy1_rreg +ffffffff81c11250 T eg_pif_phy1_wreg +ffffffff81c112b0 T evergreen_get_allowed_info_register +ffffffff81c11340 T evergreen_tiling_fields +ffffffff81c113e0 T sumo_set_uvd_clocks +ffffffff81c114c0 t sumo_set_uvd_clock +ffffffff81c116b0 T evergreen_set_uvd_clocks +ffffffff81c11c30 T evergreen_fix_pci_max_read_req_size +ffffffff81c11df0 T dce4_program_fmt +ffffffff81c11f10 T dce4_wait_for_vblank +ffffffff81c12190 T evergreen_page_flip +ffffffff81c12320 T evergreen_page_flip_pending +ffffffff81c12390 T evergreen_get_temp +ffffffff81c12460 T sumo_get_temp +ffffffff81c124b0 T sumo_pm_init_profile +ffffffff81c125f0 T btc_pm_init_profile +ffffffff81c12700 T evergreen_pm_misc +ffffffff81c128a0 T evergreen_pm_prepare +ffffffff81c129a0 T evergreen_pm_finish +ffffffff81c12aa0 T evergreen_hpd_sense +ffffffff81c12b10 T evergreen_hpd_set_polarity +ffffffff81c12c50 T evergreen_hpd_init +ffffffff81c12d20 T evergreen_hpd_fini +ffffffff81c12dc0 T evergreen_get_number_of_dram_channels +ffffffff81c12e10 T evergreen_bandwidth_update +ffffffff81c12fd0 t evergreen_line_buffer_adjust +ffffffff81c131c0 t evergreen_program_watermarks +ffffffff81c13c20 T evergreen_mc_wait_for_idle +ffffffff81c13cc0 T evergreen_pcie_gart_tlb_flush +ffffffff81c13d90 T evergreen_mc_stop +ffffffff81c14890 T evergreen_mc_resume +ffffffff81c14fa0 T evergreen_mc_program +ffffffff81c153a0 T evergreen_ring_ib_execute +ffffffff81c15830 T evergreen_mc_init +ffffffff81c15970 T evergreen_print_gpu_status_regs +ffffffff81c159a0 T evergreen_is_display_hung +ffffffff81c15ba0 T evergreen_gpu_check_soft_reset +ffffffff81c15d00 T evergreen_gpu_pci_config_reset +ffffffff81c15e80 T evergreen_asic_reset +ffffffff81c161a0 T evergreen_gfx_is_lockup +ffffffff81c16210 T sumo_rlc_fini +ffffffff81c163c0 t radeon_bo_reserve +ffffffff81c16530 t radeon_bo_unreserve +ffffffff81c16610 T sumo_rlc_init +ffffffff81c16de0 T evergreen_rlc_resume +ffffffff81c17150 T evergreen_get_vblank_counter +ffffffff81c171c0 T evergreen_disable_interrupt_state +ffffffff81c17490 T evergreen_irq_set +ffffffff81c17a50 T evergreen_irq_suspend +ffffffff81c17aa0 T evergreen_irq_process +ffffffff81c185f0 t evergreen_irq_ack +ffffffff81c18cb0 T evergreen_resume +ffffffff81c18d90 t evergreen_init_golden_registers +ffffffff81c18fa0 t evergreen_startup +ffffffff81c1a830 T evergreen_suspend +ffffffff81c1a9d0 T evergreen_init +ffffffff81c1add0 t evergreen_pcie_gart_fini +ffffffff81c1aef0 T evergreen_fini +ffffffff81c1b0e0 T evergreen_pcie_gen2_enable +ffffffff81c1b310 T evergreen_program_aspm +ffffffff81c1b9a0 t evergreen_latency_watermark +ffffffff81c1bba0 t evergreen_uvd_start +ffffffff81c1bc50 t evergreen_cp_load_microcode +ffffffff81c1bdb0 t evergreen_cp_resume +ffffffff81c1ca20 t evergreen_uvd_resume +ffffffff81c1d000 T evergreen_cs_parse +ffffffff81c1f760 T evergreen_dma_cs_parse +ffffffff81c208d0 T evergreen_ib_parse +ffffffff81c20d30 T evergreen_dma_ib_parse +ffffffff81c20f00 t evergreen_cs_track_check +ffffffff81c21f70 t evergreen_cs_handle_reg +ffffffff81c23dd0 t evergreen_surface_value_conv_check +ffffffff81c240a0 t evergreen_surface_check +ffffffff81c24510 t evergreen_cs_track_validate_htile +ffffffff81c247b0 t evergreen_vm_reg_valid +ffffffff81c25000 T evergreen_dma_fence_ring_emit +ffffffff81c252b0 T evergreen_dma_ring_ib_execute +ffffffff81c25600 T evergreen_copy_dma +ffffffff81c259a0 T evergreen_dma_is_lockup +ffffffff81c26000 T dce4_audio_enable +ffffffff81c26080 T evergreen_hdmi_update_acr +ffffffff81c262a0 T dce4_afmt_write_latency_fields +ffffffff81c26310 T dce4_afmt_hdmi_write_speaker_allocation +ffffffff81c26380 T dce4_afmt_dp_write_speaker_allocation +ffffffff81c263f0 T evergreen_hdmi_write_sad_regs +ffffffff81c264f0 T evergreen_set_avi_packet +ffffffff81c26690 T dce4_hdmi_audio_set_dto +ffffffff81c26770 T dce4_dp_audio_set_dto +ffffffff81c26860 T dce4_set_vbi_packet +ffffffff81c268d0 T dce4_hdmi_set_color_depth +ffffffff81c26a20 T dce4_set_audio_packet +ffffffff81c26c30 T dce4_set_mute +ffffffff81c26d40 T evergreen_hdmi_enable +ffffffff81c27070 T evergreen_dp_enable +ffffffff81c28000 T kv_dpm_enable_bapm +ffffffff81c28070 T kv_dpm_enable +ffffffff81c28f70 t kv_populate_vce_table +ffffffff81c291f0 t kv_populate_samu_table +ffffffff81c29450 t kv_populate_acp_table +ffffffff81c295e0 t kv_start_am +ffffffff81c29620 t kv_enable_auto_thermal_throttling +ffffffff81c29660 t kv_enable_dpm_voltage_scaling +ffffffff81c296a0 t kv_set_dpm_interval +ffffffff81c296e0 t kv_start_dpm +ffffffff81c29720 t kv_enable_didt +ffffffff81c299d0 T kv_dpm_late_enable +ffffffff81c29bd0 T kv_dpm_powergate_uvd +ffffffff81c29d50 T kv_dpm_disable +ffffffff81c2a0c0 T kv_dpm_force_performance_level +ffffffff81c2a240 t kv_force_dpm_lowest +ffffffff81c2a310 T kv_dpm_pre_set_power_state +ffffffff81c2a890 T kv_dpm_set_power_state +ffffffff81c2b060 t kv_set_valid_clock_range +ffffffff81c2b200 t kv_calculate_ds_divider +ffffffff81c2b370 t kv_calculate_nbps_level_settings +ffffffff81c2b4f0 t kv_update_vce_dpm +ffffffff81c2b6d0 T kv_dpm_post_set_power_state +ffffffff81c2b770 T kv_dpm_setup_asic +ffffffff81c2b7d0 T kv_dpm_init +ffffffff81c2c080 T kv_dpm_debugfs_print_current_performance_level +ffffffff81c2c0f0 T kv_dpm_get_current_sclk +ffffffff81c2c160 T kv_dpm_get_current_mclk +ffffffff81c2c190 T kv_dpm_print_power_state +ffffffff81c2c230 T kv_dpm_fini +ffffffff81c2c2d0 T kv_dpm_display_configuration_changed +ffffffff81c2c300 T kv_dpm_get_sclk +ffffffff81c2c350 T kv_dpm_get_mclk +ffffffff81c2d000 T kv_notify_message_to_smu +ffffffff81c2d0c0 T kv_dpm_get_enable_mask +ffffffff81c2d190 T kv_send_msg_to_smc_with_parameter +ffffffff81c2d260 T kv_read_smc_sram_dword +ffffffff81c2d2f0 T kv_smc_dpm_enable +ffffffff81c2d420 T kv_smc_bapm_enable +ffffffff81c2d550 T kv_copy_bytes_to_smc +ffffffff81c2e000 T tn_smc_rreg +ffffffff81c2e080 T tn_smc_wreg +ffffffff81c2e0f0 T ni_mc_load_microcode +ffffffff81c2e2e0 T ni_init_microcode +ffffffff81c2e7b0 t request_firmware +ffffffff81c2e840 t release_firmware +ffffffff81c2e880 T cayman_get_allowed_info_register +ffffffff81c2e910 T tn_get_temp +ffffffff81c2e9a0 T cayman_pcie_gart_tlb_flush +ffffffff81c2e9f0 T cayman_cp_int_cntl_setup +ffffffff81c2ea40 T cayman_fence_ring_emit +ffffffff81c2edd0 T cayman_ring_ib_execute +ffffffff81c2f230 T cayman_gfx_get_rptr +ffffffff81c2f2c0 T cayman_gfx_get_wptr +ffffffff81c2f330 T cayman_gfx_set_wptr +ffffffff81c2f3b0 T cayman_gpu_check_soft_reset +ffffffff81c2f540 T cayman_asic_reset +ffffffff81c2f840 T cayman_gfx_is_lockup +ffffffff81c2f8b0 T cayman_resume +ffffffff81c2f940 t ni_init_golden_registers +ffffffff81c2fa20 t cayman_startup +ffffffff81c30e60 T cayman_suspend +ffffffff81c31050 T cayman_init +ffffffff81c313c0 t cayman_uvd_init +ffffffff81c31470 t cayman_vce_init +ffffffff81c31540 t cayman_cp_fini +ffffffff81c315c0 t cayman_pcie_gart_fini +ffffffff81c31700 T cayman_fini +ffffffff81c31980 T cayman_vm_init +ffffffff81c319e0 T cayman_vm_fini +ffffffff81c31a10 T cayman_vm_decode_fault +ffffffff81c31aa0 T cayman_vm_flush +ffffffff81c31f00 T tn_set_vce_clocks +ffffffff81c32160 t cayman_uvd_start +ffffffff81c32210 t cayman_vce_start +ffffffff81c32320 t cayman_cp_load_microcode +ffffffff81c324b0 t cayman_cp_resume +ffffffff81c33370 t cayman_uvd_resume +ffffffff81c33440 t cayman_vce_resume +ffffffff81c34000 T cayman_dma_get_rptr +ffffffff81c34070 T cayman_dma_get_wptr +ffffffff81c340c0 T cayman_dma_set_wptr +ffffffff81c34110 T cayman_dma_ring_ib_execute +ffffffff81c344a0 T cayman_dma_stop +ffffffff81c34550 T cayman_dma_resume +ffffffff81c347b0 T cayman_dma_fini +ffffffff81c34870 T cayman_dma_is_lockup +ffffffff81c348f0 T cayman_dma_vm_copy_pages +ffffffff81c349f0 T cayman_dma_vm_write_pages +ffffffff81c34b50 T cayman_dma_vm_set_pages +ffffffff81c34cc0 T cayman_dma_vm_pad_ib +ffffffff81c34d10 T cayman_dma_vm_flush +ffffffff81c36000 T ni_get_pi +ffffffff81c36030 T ni_get_ps +ffffffff81c36060 T ni_dpm_vblank_too_short +ffffffff81c360d0 T ni_dpm_force_performance_level +ffffffff81c36220 T ni_copy_and_switch_arb_sets +ffffffff81c364f0 T ni_set_uvd_clock_before_set_eng_clock +ffffffff81c36570 T ni_set_uvd_clock_after_set_eng_clock +ffffffff81c365f0 T ni_dpm_setup_asic +ffffffff81c36800 T ni_update_current_ps +ffffffff81c368c0 T ni_update_requested_ps +ffffffff81c36980 T ni_dpm_enable +ffffffff81c377e0 t ni_init_smc_table +ffffffff81c38190 t ni_init_smc_spll_table +ffffffff81c38300 t ni_init_arb_table_index +ffffffff81c383a0 t ni_populate_mc_reg_table +ffffffff81c386e0 t ni_initialize_smc_cac_tables +ffffffff81c39960 t ni_initialize_hardware_cac_manager +ffffffff81c39e90 t ni_populate_smc_tdp_limits +ffffffff81c3a040 t ni_program_response_times +ffffffff81c3a150 T ni_dpm_disable +ffffffff81c3a510 t ni_enable_power_containment +ffffffff81c3a5d0 t ni_enable_smc_cac +ffffffff81c3a6f0 T ni_dpm_pre_set_power_state +ffffffff81c3acd0 T ni_dpm_set_power_state +ffffffff81c3afc0 t ni_upload_sw_state +ffffffff81c3bbb0 t ni_upload_mc_reg_table +ffffffff81c3bd60 t ni_power_control_set_level +ffffffff81c3be30 T ni_dpm_post_set_power_state +ffffffff81c3bf00 T ni_dpm_init +ffffffff81c3c8a0 T ni_dpm_fini +ffffffff81c3c950 T ni_dpm_print_power_state +ffffffff81c3ca20 T ni_dpm_debugfs_print_current_performance_level +ffffffff81c3ca60 T ni_dpm_get_current_sclk +ffffffff81c3cad0 T ni_dpm_get_current_mclk +ffffffff81c3cb40 T ni_dpm_get_sclk +ffffffff81c3cba0 T ni_dpm_get_mclk +ffffffff81c3cc00 t ni_do_program_memory_timing_parameters +ffffffff81c3cd40 t ni_calculate_sclk_params +ffffffff81c3cf70 t ni_calculate_power_boost_limit +ffffffff81c3d130 t ni_populate_mclk_value +ffffffff81c3e000 T r100_wait_for_vblank +ffffffff81c3e190 T r100_page_flip +ffffffff81c3e450 T r100_page_flip_pending +ffffffff81c3e500 T r100_pm_get_dynpm_state +ffffffff81c3e720 T r100_pm_init_profile +ffffffff81c3e800 T r100_pm_misc +ffffffff81c3ec40 T r100_pm_prepare +ffffffff81c3ecf0 T r100_pm_finish +ffffffff81c3eda0 T r100_gui_idle +ffffffff81c3ede0 T r100_hpd_sense +ffffffff81c3ee40 T r100_hpd_set_polarity +ffffffff81c3ef00 T r100_hpd_init +ffffffff81c3efa0 T r100_hpd_fini +ffffffff81c3f010 T r100_pci_gart_tlb_flush +ffffffff81c3f040 T r100_pci_gart_init +ffffffff81c3f110 T r100_pci_gart_get_page_entry +ffffffff81c3f140 T r100_pci_gart_set_page +ffffffff81c3f180 T r100_pci_gart_enable +ffffffff81c3f270 T r100_pci_gart_disable +ffffffff81c3f2f0 T r100_pci_gart_fini +ffffffff81c3f370 T r100_irq_set +ffffffff81c3f450 T r100_irq_disable +ffffffff81c3f4c0 T r100_irq_process +ffffffff81c3f7c0 T r100_get_vblank_counter +ffffffff81c3f810 T r100_fence_ring_emit +ffffffff81c3fc70 T r100_semaphore_ring_emit +ffffffff81c3fca0 T r100_copy_blit +ffffffff81c40330 T r100_ring_start +ffffffff81c40420 T r100_gfx_get_rptr +ffffffff81c40480 T r100_gfx_get_wptr +ffffffff81c404c0 T r100_gfx_set_wptr +ffffffff81c40500 T r100_cp_init +ffffffff81c40a30 T r100_debugfs_cp_init +ffffffff81c40a60 T r100_cp_fini +ffffffff81c40b00 T r100_cp_disable +ffffffff81c40c40 T r100_gui_wait_for_idle +ffffffff81c40d30 T r100_reloc_pitch_offset +ffffffff81c40e70 T r100_packet3_load_vbpntr +ffffffff81c41110 T r100_cs_parse_packet0 +ffffffff81c41220 T r100_cs_packet_parse_vline +ffffffff81c41430 T r100_cs_track_check_pkt3_indx_buffer +ffffffff81c414b0 T r100_cs_parse +ffffffff81c426a0 T r100_cs_track_clear +ffffffff81c42a30 T r100_cs_track_check +ffffffff81c43240 T r100_mc_wait_for_idle +ffffffff81c432e0 T r100_gpu_is_lockup +ffffffff81c43340 T r100_enable_bm +ffffffff81c43390 T r100_bm_disable +ffffffff81c43440 T r100_asic_reset +ffffffff81c43770 T r100_mc_stop +ffffffff81c43930 T r100_mc_resume +ffffffff81c439f0 T r100_set_common_regs +ffffffff81c43b90 T r100_vram_init_sizes +ffffffff81c43d80 T r100_vga_set_state +ffffffff81c43de0 T r100_pll_errata_after_index +ffffffff81c43e20 T r100_pll_rreg +ffffffff81c43f50 T r100_pll_wreg +ffffffff81c44060 T r100_debugfs_rbbm_init +ffffffff81c44090 T r100_debugfs_mc_info_init +ffffffff81c440c0 T r100_set_surface_reg +ffffffff81c442d0 T r100_clear_surface_reg +ffffffff81c44380 T r100_bandwidth_update +ffffffff81c44dd0 T r100_ring_test +ffffffff81c45080 T r100_ring_ib_execute +ffffffff81c452e0 T r100_ib_test +ffffffff81c45620 T r100_vga_render_disable +ffffffff81c45680 T r100_resume +ffffffff81c45870 t r100_startup +ffffffff81c45db0 T r100_suspend +ffffffff81c45e90 T r100_fini +ffffffff81c45fa0 T r100_restore_sanity +ffffffff81c46040 T r100_init +ffffffff81c46490 t r100_set_safe_registers +ffffffff81c46510 T r100_mm_rreg_slow +ffffffff81c46590 T r100_mm_wreg_slow +ffffffff81c465f0 T r100_io_rreg +ffffffff81c46690 T r100_io_wreg +ffffffff81c46700 t r100_get_vtx_size +ffffffff81c467f0 t r100_cs_track_texture_print +ffffffff81c47000 T r200_copy_dma +ffffffff81c47470 T r200_packet0_check +ffffffff81c48240 t r200_get_vtx_size_0 +ffffffff81c48400 t r200_get_vtx_size_1 +ffffffff81c48490 T r200_set_safe_registers +ffffffff81c49000 T rv370_pcie_rreg +ffffffff81c49080 T rv370_pcie_wreg +ffffffff81c490f0 T rv370_pcie_gart_tlb_flush +ffffffff81c492f0 T rv370_pcie_gart_get_page_entry +ffffffff81c49350 T rv370_pcie_gart_set_page +ffffffff81c49390 T rv370_pcie_gart_init +ffffffff81c49460 T rv370_pcie_gart_enable +ffffffff81c497c0 T rv370_pcie_gart_disable +ffffffff81c49940 T rv370_pcie_gart_fini +ffffffff81c49970 T r300_fence_ring_emit +ffffffff81c49ee0 T r300_ring_start +ffffffff81c4a850 T r300_mc_wait_for_idle +ffffffff81c4a8f0 T r300_asic_reset +ffffffff81c4ab10 T r300_mc_init +ffffffff81c4abc0 T rv370_set_pcie_lanes +ffffffff81c4ad80 T rv370_get_pcie_lanes +ffffffff81c4ae30 T r300_cs_parse +ffffffff81c4b1a0 t r300_packet0_check +ffffffff81c4c060 T r300_set_reg_safe +ffffffff81c4c0a0 T r300_mc_program +ffffffff81c4c230 T r300_clock_startup +ffffffff81c4c2c0 T r300_resume +ffffffff81c4c490 t r300_startup +ffffffff81c4c7f0 T r300_suspend +ffffffff81c4c870 T r300_fini +ffffffff81c4c950 T r300_init +ffffffff81c4d000 T r420_pm_init_profile +ffffffff81c4d0f0 T r420_pipes_init +ffffffff81c4d2d0 T r420_mc_rreg +ffffffff81c4d350 T r420_mc_wreg +ffffffff81c4d3c0 T r420_resume +ffffffff81c4d590 t r420_startup +ffffffff81c4d790 T r420_suspend +ffffffff81c4d930 T r420_fini +ffffffff81c4da10 T r420_init +ffffffff81c4dc90 T r420_debugfs_pipes_info_init +ffffffff81c4dcc0 t r420_cp_errata_init +ffffffff81c4e000 T r520_mc_wait_for_idle +ffffffff81c4e0a0 T r520_resume +ffffffff81c4e190 t r520_startup +ffffffff81c4e580 T r520_init +ffffffff81c4f000 T r600_rcu_rreg +ffffffff81c4f080 T r600_rcu_wreg +ffffffff81c4f0f0 T r600_uvd_ctx_rreg +ffffffff81c4f170 T r600_uvd_ctx_wreg +ffffffff81c4f1e0 T r600_get_allowed_info_register +ffffffff81c4f260 T r600_get_xclk +ffffffff81c4f290 T r600_set_uvd_clocks +ffffffff81c4f7f0 T dce3_program_fmt +ffffffff81c4f910 T rv6xx_get_temp +ffffffff81c4f960 T r600_pm_get_dynpm_state +ffffffff81c4fd70 T rs780_pm_init_profile +ffffffff81c4fe80 T r600_pm_init_profile +ffffffff81c50120 T r600_pm_misc +ffffffff81c50200 T r600_gui_idle +ffffffff81c50240 T r600_hpd_sense +ffffffff81c50360 T r600_hpd_set_polarity +ffffffff81c505e0 T r600_hpd_init +ffffffff81c507c0 T r600_hpd_fini +ffffffff81c50970 T r600_pcie_gart_tlb_flush +ffffffff81c50aa0 T r600_pcie_gart_init +ffffffff81c50b40 T r600_mc_wait_for_idle +ffffffff81c50be0 T rs780_mc_rreg +ffffffff81c50c80 T rs780_mc_wreg +ffffffff81c50d10 T r600_vram_scratch_init +ffffffff81c50e10 t radeon_bo_reserve +ffffffff81c50f80 t radeon_bo_unreserve +ffffffff81c51060 T r600_vram_scratch_fini +ffffffff81c510e0 T r600_set_bios_scratch_engine_hung +ffffffff81c51130 T r600_gpu_check_soft_reset +ffffffff81c514d0 T r600_asic_reset +ffffffff81c51860 t r600_gpu_pci_config_reset +ffffffff81c51a70 T r600_gfx_is_lockup +ffffffff81c51ae0 T r6xx_remap_render_backend +ffffffff81c51ca0 T r600_count_pipe_bits +ffffffff81c51d10 T r600_pciep_rreg +ffffffff81c51d90 T r600_pciep_wreg +ffffffff81c51e00 T r600_cp_stop +ffffffff81c51e80 T r600_init_microcode +ffffffff81c52340 t request_firmware +ffffffff81c523d0 t release_firmware +ffffffff81c52410 T r600_gfx_get_rptr +ffffffff81c52470 T r600_gfx_get_wptr +ffffffff81c524b0 T r600_gfx_set_wptr +ffffffff81c524f0 T r600_cp_start +ffffffff81c52860 T r600_cp_resume +ffffffff81c52bc0 T r600_ring_init +ffffffff81c52c60 T r600_cp_fini +ffffffff81c52cf0 T r600_scratch_init +ffffffff81c52d60 T r600_ring_test +ffffffff81c53000 T r600_fence_ring_emit +ffffffff81c538a0 T r600_semaphore_ring_emit +ffffffff81c53a80 T r600_copy_cpdma +ffffffff81c54030 T r600_set_surface_reg +ffffffff81c54060 T r600_clear_surface_reg +ffffffff81c54090 T r600_vga_set_state +ffffffff81c540f0 T r600_resume +ffffffff81c54180 t r600_startup +ffffffff81c55e60 T r600_suspend +ffffffff81c55fd0 T r600_irq_suspend +ffffffff81c56090 t r600_pcie_gart_disable +ffffffff81c56290 T r600_init +ffffffff81c569f0 T r600_ih_ring_init +ffffffff81c56a60 T r600_irq_fini +ffffffff81c56ba0 t r600_pcie_gart_fini +ffffffff81c56bd0 T r600_fini +ffffffff81c56d60 T r600_ring_ib_execute +ffffffff81c571f0 T r600_ib_test +ffffffff81c574a0 T r600_ih_ring_alloc +ffffffff81c575c0 T r600_ih_ring_fini +ffffffff81c57650 T r600_rlc_stop +ffffffff81c577e0 T r600_disable_interrupts +ffffffff81c57890 T r600_irq_init +ffffffff81c57cf0 t r600_disable_interrupt_state +ffffffff81c57ff0 T r600_irq_disable +ffffffff81c580b0 T r600_irq_set +ffffffff81c58830 t r600_irq_ack +ffffffff81c58d60 T r600_irq_process +ffffffff81c59960 T r600_mmio_hdp_flush +ffffffff81c599e0 T r600_set_pcie_lanes +ffffffff81c59b10 T r600_get_pcie_lanes +ffffffff81c59be0 T r600_get_gpu_clock_counter +ffffffff81c59c70 t r600_cp_load_microcode +ffffffff81c59f40 t r600_uvd_resume +ffffffff81c5b000 T r600_fmt_is_valid_color +ffffffff81c5b040 T r600_fmt_is_valid_texture +ffffffff81c5b090 T r600_fmt_get_blocksize +ffffffff81c5b0d0 T r600_fmt_get_nblocksx +ffffffff81c5b120 T r600_fmt_get_nblocksy +ffffffff81c5b180 T r600_cs_common_vline_parse +ffffffff81c5b440 T r600_mip_minify +ffffffff81c5b4a0 T r600_cs_parse +ffffffff81c5d360 T r600_dma_cs_next_reloc +ffffffff81c5d3e0 T r600_dma_cs_parse +ffffffff81c5da80 t r600_cs_track_check +ffffffff81c5ebc0 t r600_cs_check_reg +ffffffff81c5fae0 t r600_is_safe_reg +ffffffff81c5fb80 t r600_texture_size +ffffffff81c60000 T r600_dma_get_rptr +ffffffff81c60060 T r600_dma_get_wptr +ffffffff81c600a0 T r600_dma_set_wptr +ffffffff81c600e0 T r600_dma_stop +ffffffff81c60170 T r600_dma_resume +ffffffff81c60370 T r600_dma_fini +ffffffff81c603f0 T r600_dma_is_lockup +ffffffff81c60460 T r600_dma_ring_test +ffffffff81c606d0 T r600_dma_fence_ring_emit +ffffffff81c608b0 T r600_dma_semaphore_ring_emit +ffffffff81c609d0 T r600_dma_ib_test +ffffffff81c60bf0 T r600_dma_ring_ib_execute +ffffffff81c60f40 T r600_copy_dma +ffffffff81c62000 T r600_dpm_print_class_info +ffffffff81c622b0 T r600_dpm_print_cap_info +ffffffff81c62340 T r600_dpm_print_ps_status +ffffffff81c623d0 T r600_dpm_get_vblank_time +ffffffff81c62490 T r600_dpm_get_vrefresh +ffffffff81c62520 T r600_calculate_u_and_p +ffffffff81c625a0 T r600_calculate_at +ffffffff81c62650 T r600_gfx_clockgating_enable +ffffffff81c62750 T r600_dynamicpm_enable +ffffffff81c627a0 T r600_enable_thermal_protection +ffffffff81c62800 T r600_enable_acpi_pm +ffffffff81c62850 T r600_enable_dynamic_pcie_gen2 +ffffffff81c628a0 T r600_dynamicpm_enabled +ffffffff81c628e0 T r600_enable_sclk_control +ffffffff81c62940 T r600_enable_mclk_control +ffffffff81c629a0 T r600_enable_spll_bypass +ffffffff81c629f0 T r600_wait_for_spll_change +ffffffff81c62a70 T r600_set_bsp +ffffffff81c62ab0 T r600_set_at +ffffffff81c62b10 T r600_set_tc +ffffffff81c62b70 T r600_select_td +ffffffff81c62c20 T r600_set_vrc +ffffffff81c62c60 T r600_set_tpu +ffffffff81c62cc0 T r600_set_tpc +ffffffff81c62d20 T r600_set_sstu +ffffffff81c62d80 T r600_set_sst +ffffffff81c62dd0 T r600_set_git +ffffffff81c62e20 T r600_set_fctu +ffffffff81c62e80 T r600_set_fct +ffffffff81c62ed0 T r600_set_ctxcgtt3d_rphc +ffffffff81c62f30 T r600_set_ctxcgtt3d_rsdc +ffffffff81c62f90 T r600_set_vddc3d_oorsu +ffffffff81c62ff0 T r600_set_vddc3d_oorphc +ffffffff81c63050 T r600_set_vddc3d_oorsdc +ffffffff81c630b0 T r600_set_mpll_lock_time +ffffffff81c63100 T r600_set_mpll_reset_time +ffffffff81c63150 T r600_engine_clock_entry_enable +ffffffff81c63250 T r600_engine_clock_entry_enable_pulse_skipping +ffffffff81c63350 T r600_engine_clock_entry_enable_post_divider +ffffffff81c63450 T r600_engine_clock_entry_set_post_divider +ffffffff81c63510 T r600_engine_clock_entry_set_reference_divider +ffffffff81c635d0 T r600_engine_clock_entry_set_feedback_divider +ffffffff81c63690 T r600_engine_clock_entry_set_step_time +ffffffff81c63750 T r600_vid_rt_set_ssu +ffffffff81c637b0 T r600_vid_rt_set_vru +ffffffff81c63810 T r600_vid_rt_set_vrt +ffffffff81c63870 T r600_voltage_control_enable_pins +ffffffff81c638c0 T r600_voltage_control_program_voltages +ffffffff81c63950 T r600_voltage_control_deactivate_static_control +ffffffff81c639e0 T r600_power_level_enable +ffffffff81c63a50 T r600_power_level_set_voltage_index +ffffffff81c63ac0 T r600_power_level_set_mem_clock_index +ffffffff81c63b20 T r600_power_level_set_eng_clock_index +ffffffff81c63b90 T r600_power_level_set_watermark_id +ffffffff81c63c00 T r600_power_level_set_pcie_gen2 +ffffffff81c63c60 T r600_power_level_get_current_index +ffffffff81c63ca0 T r600_power_level_get_target_index +ffffffff81c63ce0 T r600_power_level_set_enter_index +ffffffff81c63d40 T r600_wait_for_power_level_unequal +ffffffff81c63e30 T r600_wait_for_power_level +ffffffff81c63f20 T r600_start_dpm +ffffffff81c64200 T r600_stop_dpm +ffffffff81c64250 T r600_dpm_pre_set_power_state +ffffffff81c64280 T r600_dpm_post_set_power_state +ffffffff81c642b0 T r600_is_uvd_state +ffffffff81c642f0 T r600_is_internal_thermal_sensor +ffffffff81c64330 T r600_dpm_late_enable +ffffffff81c64440 T r600_get_platform_caps +ffffffff81c644e0 T r600_parse_extended_power_table +ffffffff81c652a0 T r600_free_extended_power_table +ffffffff81c653a0 T r600_get_pcie_gen_support +ffffffff81c653f0 T r600_get_pcie_lane_support +ffffffff81c65450 T r600_encode_pci_lane_width +ffffffff81c66000 T r600_audio_update_hdmi +ffffffff81c66170 t r600_audio_status +ffffffff81c66290 T r600_hdmi_buffer_status_changed +ffffffff81c66330 T r600_hdmi_update_audio_settings +ffffffff81c66700 T r600_audio_enable +ffffffff81c66780 T r600_audio_get_pin +ffffffff81c667b0 T r600_hdmi_update_acr +ffffffff81c66b50 T r600_set_avi_packet +ffffffff81c66d50 T r600_hdmi_audio_workaround +ffffffff81c66e20 T r600_hdmi_audio_set_dto +ffffffff81c66ee0 T r600_set_vbi_packet +ffffffff81c66fa0 T r600_set_audio_packet +ffffffff81c67270 T r600_set_mute +ffffffff81c67380 T r600_hdmi_enable +ffffffff81c68000 T radeon_acpi_is_pcie_performance_request_supported +ffffffff81c68050 T radeon_acpi_pcie_notify_device_ready +ffffffff81c68170 T radeon_acpi_pcie_performance_request +ffffffff81c68500 T radeon_acpi_init +ffffffff81c68c80 t radeon_acpi_event +ffffffff81c68f80 T radeon_acpi_fini +ffffffff81c69000 T radeon_agp_head_init +ffffffff81c69050 T radeon_agp_init +ffffffff81c690a0 T radeon_agp_resume +ffffffff81c69130 T radeon_agp_fini +ffffffff81c69180 T radeon_agp_suspend +ffffffff81c6a000 T radeon_agp_disable +ffffffff81c6a120 T radeon_asic_init +ffffffff81c6a8f0 t radeon_invalid_rreg +ffffffff81c6a930 t radeon_invalid_wreg +ffffffff81c6a970 t radeon_invalid_get_allowed_info_register +ffffffff81c6b000 T radeon_atombios_i2c_init +ffffffff81c6b3a0 T radeon_atombios_lookup_gpio +ffffffff81c6b4a0 T radeon_get_atom_connector_info_from_object_table +ffffffff81c6bde0 t radeon_lookup_i2c_gpio +ffffffff81c6c0d0 t radeon_atom_apply_quirks +ffffffff81c6c4f0 T radeon_get_atom_connector_info_from_supported_devices_table +ffffffff81c6c9f0 T radeon_atom_get_clock_info +ffffffff81c6cdd0 T radeon_atombios_sideport_present +ffffffff81c6ce80 T radeon_atombios_get_tmds_info +ffffffff81c6cfc0 T radeon_atombios_get_ppll_ss_info +ffffffff81c6d0e0 T radeon_atombios_get_asic_ss_info +ffffffff81c6d3c0 t radeon_atombios_get_igp_ss_overrides +ffffffff81c6d4d0 T radeon_atombios_get_lvds_info +ffffffff81c6d830 T radeon_atombios_get_primary_dac_info +ffffffff81c6d8f0 T radeon_atom_get_tv_timings +ffffffff81c6db30 T radeon_atombios_get_tv_info +ffffffff81c6dbf0 T radeon_atombios_get_tv_dac_info +ffffffff81c6dcf0 T radeon_atombios_get_default_voltages +ffffffff81c6ddb0 T radeon_atombios_get_power_modes +ffffffff81c6ee20 T radeon_atom_get_clock_dividers +ffffffff81c6f110 T radeon_atom_get_memory_pll_dividers +ffffffff81c6f250 T radeon_atom_set_clock_gating +ffffffff81c6f2a0 T radeon_atom_get_engine_clock +ffffffff81c6f2f0 T radeon_atom_get_memory_clock +ffffffff81c6f340 T radeon_atom_set_engine_clock +ffffffff81c6f390 T radeon_atom_set_memory_clock +ffffffff81c6f3f0 T radeon_atom_set_engine_dram_timings +ffffffff81c6f460 T radeon_atom_update_memory_dll +ffffffff81c6f4b0 T radeon_atom_set_ac_timing +ffffffff81c6f500 T radeon_atom_set_voltage +ffffffff81c6f5d0 T radeon_atom_get_max_vddc +ffffffff81c6f6b0 T radeon_atom_get_leakage_vddc_based_on_leakage_idx +ffffffff81c6f780 T radeon_atom_get_leakage_id_from_vbios +ffffffff81c6f840 T radeon_atom_get_leakage_vddc_based_on_leakage_params +ffffffff81c6fa60 T radeon_atom_get_voltage_evv +ffffffff81c6fb20 T radeon_atom_get_voltage_gpio_settings +ffffffff81c6fc20 T radeon_atom_is_voltage_gpio +ffffffff81c6fdb0 T radeon_atom_get_svi2_info +ffffffff81c6fea0 T radeon_atom_get_max_voltage +ffffffff81c70030 T radeon_atom_get_min_voltage +ffffffff81c70170 T radeon_atom_get_voltage_step +ffffffff81c70270 T radeon_atom_round_to_true_voltage +ffffffff81c703d0 T radeon_atom_get_voltage_table +ffffffff81c70640 T radeon_atom_get_memory_info +ffffffff81c707f0 T radeon_atom_get_mclk_range_table +ffffffff81c70a30 T radeon_atom_init_mc_reg_table +ffffffff81c70ca0 T radeon_atom_initialize_bios_scratch_regs +ffffffff81c70d70 T radeon_save_bios_scratch_regs +ffffffff81c70e50 T radeon_restore_bios_scratch_regs +ffffffff81c70f30 T radeon_atom_output_lock +ffffffff81c70fc0 T radeon_atombios_connected_scratch_regs +ffffffff81c71730 T radeon_atombios_encoder_crtc_scratch_regs +ffffffff81c71880 T radeon_atombios_encoder_dpms_scratch_regs +ffffffff81c71ab0 t radeon_atombios_parse_misc_flags_1_3 +ffffffff81c71c90 t radeon_atombios_add_pplib_thermal_controller +ffffffff81c72090 t radeon_atombios_parse_pplib_clock_info +ffffffff81c72440 t radeon_atombios_parse_pplib_non_clock_info +ffffffff81c73000 T radeon_audio_init +ffffffff81c732a0 T radeon_audio_endpoint_rreg +ffffffff81c732e0 T radeon_audio_endpoint_wreg +ffffffff81c73320 T radeon_audio_get_pin +ffffffff81c73370 T radeon_audio_detect +ffffffff81c73690 T radeon_audio_fini +ffffffff81c737e0 T radeon_audio_mode_set +ffffffff81c73830 T radeon_audio_dpms +ffffffff81c73880 T radeon_audio_decode_dfs_div +ffffffff81c738e0 t radeon_audio_hdmi_mode_set +ffffffff81c73fc0 t radeon_audio_write_speaker_allocation +ffffffff81c74070 t radeon_audio_write_sad_regs +ffffffff81c74140 t radeon_audio_set_avi_packet +ffffffff81c74280 t radeon_audio_dp_mode_set +ffffffff81c74400 t radeon_audio_rreg +ffffffff81c74450 t radeon_audio_wreg +ffffffff81c75000 T radeon_benchmark +ffffffff81c75940 t radeon_benchmark_move +ffffffff81c75c20 t radeon_bo_reserve +ffffffff81c75d90 t radeon_bo_unreserve +ffffffff81c75e70 t radeon_benchmark_do_move +ffffffff81c76000 T radeon_get_bios +ffffffff81c76fc0 t igp_read_bios_from_vram +ffffffff81c770d0 t radeon_read_bios +ffffffff81c78000 T radeon_legacy_get_engine_clock +ffffffff81c780d0 T radeon_legacy_get_memory_clock +ffffffff81c781a0 T radeon_get_clock_info +ffffffff81c78730 T radeon_legacy_set_engine_clock +ffffffff81c78a80 T radeon_legacy_set_clock_gating +ffffffff81c7a000 T radeon_combios_check_hardcoded_edid +ffffffff81c7a100 t combios_get_table_offset +ffffffff81c7a690 T radeon_bios_get_hardcoded_edid +ffffffff81c7a710 T radeon_combios_i2c_init +ffffffff81c7adb0 t combios_setup_i2c_bus +ffffffff81c7b0a0 t radeon_combios_get_i2c_info_from_table +ffffffff81c7b2f0 T radeon_combios_get_clock_info +ffffffff81c7b4e0 T radeon_combios_sideport_present +ffffffff81c7b560 T radeon_combios_get_primary_dac_info +ffffffff81c7b6b0 T radeon_combios_get_tv_info +ffffffff81c7b7b0 T radeon_combios_get_tv_dac_info +ffffffff81c7ba40 T radeon_combios_get_lvds_info +ffffffff81c7c0b0 T radeon_legacy_get_tmds_info_from_table +ffffffff81c7c180 T radeon_legacy_get_tmds_info_from_combios +ffffffff81c7c390 T radeon_legacy_get_ext_tmds_info_from_table +ffffffff81c7c5c0 T radeon_legacy_get_ext_tmds_info_from_combios +ffffffff81c7c900 T radeon_get_legacy_connector_info_from_table +ffffffff81c7ea70 T radeon_get_legacy_connector_info_from_bios +ffffffff81c7f660 T radeon_combios_get_power_modes +ffffffff81c7fd30 T radeon_external_tmds_setup +ffffffff81c7fe00 T radeon_combios_external_tmds_setup +ffffffff81c80380 T radeon_combios_asic_init +ffffffff81c808d0 t combios_parse_mmio_table +ffffffff81c80af0 t combios_parse_pll_table +ffffffff81c80dc0 T radeon_combios_initialize_bios_scratch_regs +ffffffff81c80e50 T radeon_combios_output_lock +ffffffff81c80eb0 T radeon_combios_connected_scratch_regs +ffffffff81c81210 T radeon_combios_encoder_crtc_scratch_regs +ffffffff81c812f0 T radeon_combios_encoder_dpms_scratch_regs +ffffffff81c82000 T radeon_connector_hotplug +ffffffff81c82100 T radeon_get_monitor_bpc +ffffffff81c82550 T radeon_connector_edid +ffffffff81c82600 T radeon_connector_encoder_get_dp_bridge_encoder_id +ffffffff81c82680 T radeon_connector_is_dp12_capable +ffffffff81c82720 T radeon_add_atom_connector +ffffffff81c835d0 T radeon_add_legacy_connector +ffffffff81c83ac0 t radeon_dp_detect +ffffffff81c83e60 t radeon_dvi_force +ffffffff81c83eb0 t radeon_connector_set_property +ffffffff81c846f0 t radeon_connector_unregister +ffffffff81c84750 t radeon_connector_destroy +ffffffff81c847c0 t radeon_best_single_encoder +ffffffff81c84830 t radeon_connector_get_edid +ffffffff81c84990 t radeon_dp_get_modes +ffffffff81c84c90 t radeon_dp_mode_valid +ffffffff81c84e60 t radeon_dvi_encoder +ffffffff81c84f20 t radeon_fixup_lvds_native_mode +ffffffff81c85060 t radeon_add_common_modes +ffffffff81c85150 t radeon_fp_native_mode +ffffffff81c85230 t radeon_lvds_set_property +ffffffff81c85320 t radeon_vga_detect +ffffffff81c855c0 t radeon_connector_analog_encoder_conflict_solve +ffffffff81c857e0 t radeon_vga_get_modes +ffffffff81c858c0 t radeon_vga_mode_valid +ffffffff81c85920 t radeon_dvi_detect +ffffffff81c85f90 t radeon_dvi_mode_valid +ffffffff81c86110 t radeon_tv_detect +ffffffff81c86350 t radeon_tv_get_modes +ffffffff81c86430 t radeon_tv_mode_valid +ffffffff81c86480 t radeon_lvds_detect +ffffffff81c86620 t radeon_lvds_get_modes +ffffffff81c86760 t radeon_lvds_mode_valid +ffffffff81c87000 T radeon_cs_parser_init +ffffffff81c87490 T radeon_cs_ioctl +ffffffff81c87c70 t radeon_cs_parser_fini +ffffffff81c87df0 t radeon_cs_ib_vm_chunk +ffffffff81c88130 T radeon_cs_packet_parse +ffffffff81c882e0 T radeon_cs_packet_next_is_pkt3_nop +ffffffff81c88340 T radeon_cs_dump_packet +ffffffff81c883c0 T radeon_cs_packet_next_reloc +ffffffff81c885a0 t cmp_size_smaller_first +ffffffff81c89000 T radeon_crtc_cursor_move +ffffffff81c89070 t radeon_lock_cursor +ffffffff81c89230 t radeon_cursor_move_locked +ffffffff81c89770 T radeon_crtc_cursor_set2 +ffffffff81c89a00 t radeon_hide_cursor +ffffffff81c89ac0 t radeon_bo_reserve +ffffffff81c89c30 t radeon_bo_unreserve +ffffffff81c89d10 t radeon_show_cursor +ffffffff81c89f60 T radeon_cursor_reset +ffffffff81c8a000 T radeon_is_px +ffffffff81c8a040 T radeon_program_register_sequence +ffffffff81c8a170 T radeon_pci_config_reset +ffffffff81c8a1a0 T radeon_surface_init +ffffffff81c8a360 T radeon_scratch_init +ffffffff81c8a3e0 T radeon_scratch_get +ffffffff81c8a460 T radeon_scratch_free +ffffffff81c8a4c0 T radeon_doorbell_get +ffffffff81c8a570 T radeon_doorbell_free +ffffffff81c8a5c0 T radeon_wb_disable +ffffffff81c8a5f0 T radeon_wb_fini +ffffffff81c8a690 t radeon_bo_reserve +ffffffff81c8a800 t radeon_bo_unreserve +ffffffff81c8a8e0 T radeon_wb_init +ffffffff81c8abc0 T radeon_vram_location +ffffffff81c8ace0 T radeon_gtt_location +ffffffff81c8ae10 T radeon_device_is_virtual +ffffffff81c8ae40 T radeon_card_posted +ffffffff81c8b050 T radeon_update_bandwidth_info +ffffffff81c8b0d0 T radeon_boot_test_post_card +ffffffff81c8b190 T radeon_dummy_page_init +ffffffff81c8b250 T radeon_dummy_page_fini +ffffffff81c8b2b0 T radeon_atombios_init +ffffffff81c8b440 t cail_reg_read +ffffffff81c8b4a0 t cail_reg_write +ffffffff81c8b500 t cail_ioreg_read +ffffffff81c8b520 t cail_ioreg_write +ffffffff81c8b540 t cail_mc_read +ffffffff81c8b570 t cail_mc_write +ffffffff81c8b5a0 t cail_pll_read +ffffffff81c8b5d0 t cail_pll_write +ffffffff81c8b600 T radeon_atombios_fini +ffffffff81c8b6b0 T radeon_combios_init +ffffffff81c8b6f0 T radeon_combios_fini +ffffffff81c8b720 T radeon_device_init +ffffffff81c8c1f0 T radeon_device_fini +ffffffff81c8c2f0 T radeon_suspend_kms +ffffffff81c8c660 T radeon_resume_kms +ffffffff81c8c8a0 T radeon_gpu_reset +ffffffff81c8d000 T radeon_crtc_load_lut +ffffffff81c8de60 T radeon_crtc_handle_vblank +ffffffff81c8dfd0 T radeon_get_crtc_scanoutpos +ffffffff81c8e5a0 T radeon_crtc_handle_flip +ffffffff81c8e6d0 T radeon_compute_pll_avivo +ffffffff81c8ec30 T radeon_compute_pll_legacy +ffffffff81c8f300 T radeon_framebuffer_init +ffffffff81c8f380 T radeon_update_display_priority +ffffffff81c8f3e0 T radeon_modeset_init +ffffffff81c8fea0 T radeon_modeset_fini +ffffffff81c90000 T radeon_crtc_scaling_mode_fixup +ffffffff81c90380 T radeon_get_crtc_scanout_position +ffffffff81c903f0 t radeon_user_framebuffer_create +ffffffff81c90590 t radeon_crtc_gamma_set +ffffffff81c905d0 t radeon_crtc_destroy +ffffffff81c90610 t radeon_crtc_set_config +ffffffff81c906e0 t radeon_crtc_page_flip_target +ffffffff81c90b80 t radeon_flip_work_func +ffffffff81c90da0 t radeon_unpin_work_func +ffffffff81c90e20 t radeon_bo_reserve +ffffffff81c90f90 t radeon_bo_unreserve +ffffffff81c92000 T radeon_dp_aux_transfer_native +ffffffff81c93000 T radeondrm_probe +ffffffff81c93060 T radeondrm_attach_kms +ffffffff81c937a0 T radeondrm_detach_kms +ffffffff81c93830 T radeondrm_activate_kms +ffffffff81c938f0 T radeondrm_wsioctl +ffffffff81c939b0 T radeondrm_wsmmap +ffffffff81c939e0 T radeondrm_alloc_screen +ffffffff81c93a10 T radeondrm_free_screen +ffffffff81c93a20 T radeondrm_show_screen +ffffffff81c93b00 T radeondrm_enter_ddb +ffffffff81c93b60 T radeondrm_doswitch +ffffffff81c93bf0 T radeondrm_setpal +ffffffff81c93e10 T radeondrm_attachhook +ffffffff81c94140 T radeondrm_forcedetach +ffffffff81c95000 T radeon_setup_encoder_clones +ffffffff81c950b0 T radeon_get_encoder_enum +ffffffff81c95230 T radeon_link_encoder_connector +ffffffff81c95380 T radeon_encoder_set_active_device +ffffffff81c95440 T radeon_get_connector_for_encoder +ffffffff81c954b0 T radeon_get_connector_for_encoder_init +ffffffff81c95520 T radeon_get_external_encoder +ffffffff81c955b0 T radeon_encoder_get_dp_bridge_encoder_id +ffffffff81c95650 T radeon_panel_mode_fixup +ffffffff81c95820 T radeon_dig_monitor_is_duallink +ffffffff81c95940 T radeon_encoder_is_digital +ffffffff81c96000 T radeon_align_pitch +ffffffff81c96090 T radeon_fbdev_init +ffffffff81c961e0 T radeondrm_burner_cb +ffffffff81c96210 T radeon_fbdev_fini +ffffffff81c96280 T radeon_fbdev_set_suspend +ffffffff81c962d0 T radeon_fbdev_robj_is_fb +ffffffff81c96320 T radeondrm_burner +ffffffff81c963a0 t radeonfb_create +ffffffff81c967b0 t radeon_bo_reserve +ffffffff81c96920 t radeon_bo_unreserve +ffffffff81c97000 T radeon_fence_emit +ffffffff81c97120 T radeon_fence_process +ffffffff81c971e0 t radeon_fence_activity +ffffffff81c97450 T radeon_fence_signaled +ffffffff81c974c0 t radeon_fence_seq_signaled +ffffffff81c975b0 T radeon_fence_wait_timeout +ffffffff81c976e0 t radeon_fence_wait_seq_timeout +ffffffff81c97b50 T radeon_fence_wait +ffffffff81c97c80 T radeon_fence_wait_any +ffffffff81c97dc0 T radeon_fence_wait_next +ffffffff81c97e80 T radeon_fence_wait_empty +ffffffff81c97f90 T radeon_fence_ref +ffffffff81c97fd0 T radeon_fence_unref +ffffffff81c98010 T radeon_fence_count_emitted +ffffffff81c98110 T radeon_fence_need_sync +ffffffff81c98170 T radeon_fence_note_sync +ffffffff81c98340 T radeon_fence_driver_start_ring +ffffffff81c98520 T radeon_fence_driver_init +ffffffff81c98660 T radeon_debugfs_fence_init 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radeon_gart_bind +ffffffff81c9a870 T radeon_gart_init +ffffffff81c9a980 T radeon_gart_fini +ffffffff81c9b000 T radeon_gem_fault +ffffffff81c9b180 T radeon_gem_vm_reference +ffffffff81c9b1b0 T radeon_gem_vm_detach +ffffffff81c9b1c0 T radeon_gem_object_create +ffffffff81c9b3a0 T radeon_gem_init +ffffffff81c9b3e0 T radeon_gem_fini +ffffffff81c9b3f0 t radeon_gem_object_free +ffffffff81c9b440 t radeon_gem_object_open +ffffffff81c9b4e0 t radeon_gem_object_close +ffffffff81c9b5d0 t radeon_gem_object_mmap +ffffffff81c9b670 T radeon_gem_info_ioctl +ffffffff81c9b6e0 T radeon_gem_pread_ioctl +ffffffff81c9b730 T radeon_gem_pwrite_ioctl +ffffffff81c9b780 T radeon_gem_create_ioctl +ffffffff81c9b8a0 T radeon_gem_userptr_ioctl +ffffffff81c9b8d0 T radeon_gem_set_domain_ioctl +ffffffff81c9ba30 T radeon_mode_dumb_mmap +ffffffff81c9bae0 T radeon_gem_mmap_ioctl +ffffffff81c9bba0 T radeon_gem_busy_ioctl +ffffffff81c9bc50 T radeon_gem_wait_idle_ioctl +ffffffff81c9bd60 T radeon_gem_set_tiling_ioctl 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radeon_legacy_tmds_int_prepare +ffffffff81ca8060 t radeon_legacy_tmds_int_commit +ffffffff81ca8130 t radeon_legacy_tmds_int_mode_set +ffffffff81ca8390 t radeon_legacy_primary_dac_dpms +ffffffff81ca84d0 t radeon_legacy_primary_dac_prepare +ffffffff81ca8530 t radeon_legacy_primary_dac_commit +ffffffff81ca8580 t radeon_legacy_primary_dac_mode_set +ffffffff81ca8710 t radeon_legacy_primary_dac_detect +ffffffff81ca8900 t radeon_legacy_tv_dac_dpms +ffffffff81ca8b10 t radeon_legacy_tv_dac_prepare +ffffffff81ca8b70 t radeon_legacy_tv_dac_commit +ffffffff81ca8bc0 t radeon_legacy_tv_dac_mode_set +ffffffff81ca8f60 t radeon_legacy_tv_dac_detect +ffffffff81ca9b60 t radeon_ext_tmds_enc_destroy +ffffffff81ca9bb0 t radeon_legacy_tmds_ext_dpms +ffffffff81ca9c80 t radeon_legacy_tmds_ext_prepare +ffffffff81ca9d50 t radeon_legacy_tmds_ext_commit +ffffffff81ca9e20 t radeon_legacy_tmds_ext_mode_set +ffffffff81caa000 T radeon_legacy_tv_mode_set +ffffffff81cab0f0 T radeon_legacy_tv_adjust_crtc_reg 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radeon_bo_fault_reserve_notify +ffffffff81cada50 t ttm_bo_move_to_lru_tail_unlocked +ffffffff81cada90 T radeon_bo_fence +ffffffff81cae000 T radeon_pm_get_type_index +ffffffff81cae080 T radeon_pm_acpi_event_handler +ffffffff81cae160 t radeon_pm_update_profile +ffffffff81cae280 t radeon_pm_set_clocks +ffffffff81caec40 T radeon_dpm_enable_uvd +ffffffff81caed00 T radeon_pm_compute_clocks +ffffffff81caf710 T radeon_dpm_enable_vce +ffffffff81caf780 T radeon_pm_suspend +ffffffff81caf880 T radeon_pm_resume +ffffffff81cafb70 T radeon_pm_init +ffffffff81cb0280 T radeon_pm_late_init +ffffffff81cb0340 T radeon_pm_fini +ffffffff81cb0460 t radeon_dpm_thermal_work_handler +ffffffff81cb0540 t radeon_dynpm_idle_work_handler +ffffffff81cb0850 t __delayed_work_tick +ffffffff81cb1000 T radeon_gem_prime_get_sg_table +ffffffff81cb1030 T radeon_gem_prime_pin +ffffffff81cb10c0 t radeon_bo_reserve +ffffffff81cb1230 t radeon_bo_unreserve +ffffffff81cb1310 T radeon_gem_prime_unpin +ffffffff81cb1390 T radeon_gem_prime_export +ffffffff81cb2000 T radeon_ring_supports_scratch_reg +ffffffff81cb2030 T radeon_ring_free_size +ffffffff81cb20e0 T radeon_ring_lockup_update +ffffffff81cb2140 T radeon_ring_alloc +ffffffff81cb22c0 T radeon_ring_lock +ffffffff81cb2340 T radeon_ring_commit +ffffffff81cb2440 T radeon_ring_unlock_commit +ffffffff81cb2470 T radeon_ring_undo +ffffffff81cb24a0 T radeon_ring_unlock_undo +ffffffff81cb24c0 T radeon_ring_test_lockup +ffffffff81cb25e0 T radeon_ring_backup +ffffffff81cb2780 T radeon_ring_restore +ffffffff81cb2930 T radeon_ring_init +ffffffff81cb2b20 t radeon_bo_reserve +ffffffff81cb2c90 t radeon_bo_unreserve +ffffffff81cb2d70 T radeon_ring_fini +ffffffff81cb3000 T radeon_sa_bo_manager_init +ffffffff81cb3190 T radeon_sa_bo_manager_fini +ffffffff81cb32d0 t radeon_sa_bo_try_free +ffffffff81cb33c0 T radeon_sa_bo_manager_start +ffffffff81cb34f0 t radeon_bo_reserve +ffffffff81cb3660 t radeon_bo_unreserve +ffffffff81cb3740 T radeon_sa_bo_manager_suspend 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radeon_uvd_idle_work_handler +ffffffff81cbc660 t radeon_bo_reserve +ffffffff81cbc860 t radeon_bo_unreserve +ffffffff81cbc940 T radeon_uvd_fini +ffffffff81cbca10 T radeon_uvd_suspend +ffffffff81cbcbd0 T radeon_uvd_note_usage +ffffffff81cbce10 T radeon_uvd_get_destroy_msg +ffffffff81cbcf20 T radeon_uvd_resume +ffffffff81cbcfb0 T radeon_uvd_force_into_uvd_segment +ffffffff81cbd050 T radeon_uvd_free_handles +ffffffff81cbd210 T radeon_uvd_cs_parse +ffffffff81cbd930 T radeon_uvd_get_create_msg +ffffffff81cbdab0 t radeon_uvd_send_msg +ffffffff81cbdc50 T radeon_uvd_calc_upll_dividers +ffffffff81cbde20 T radeon_uvd_send_upll_ctlreq +ffffffff81cbe160 t __delayed_work_tick +ffffffff81cbf000 T radeon_vce_init +ffffffff81cbf620 t radeon_vce_idle_work_handler +ffffffff81cbf6e0 t radeon_bo_reserve +ffffffff81cbf850 t radeon_bo_unreserve +ffffffff81cbf930 T radeon_vce_fini +ffffffff81cbf9b0 T radeon_vce_suspend +ffffffff81cbfa90 T radeon_vce_resume +ffffffff81cbfbe0 T radeon_vce_note_usage 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rs780_dpm_display_configuration_changed +ffffffff81ccd530 T rs780_dpm_init +ffffffff81ccdaa0 T rs780_dpm_print_power_state +ffffffff81ccdb30 T rs780_dpm_fini +ffffffff81ccdbc0 T rs780_dpm_get_sclk +ffffffff81ccdc00 T rs780_dpm_get_mclk +ffffffff81ccdc30 T rs780_dpm_debugfs_print_current_performance_level +ffffffff81ccdc60 T rs780_dpm_get_current_sclk +ffffffff81ccdcf0 T rs780_dpm_get_current_mclk +ffffffff81ccdd20 T rs780_dpm_force_performance_level +ffffffff81ccdf10 t rs780_force_fbdiv +ffffffff81ccf000 T rv515_ring_start +ffffffff81ccfaf0 T rv515_mc_wait_for_idle +ffffffff81ccfb90 T rv515_vga_render_disable +ffffffff81ccfbe0 T rv515_mc_rreg +ffffffff81ccfc70 T rv515_mc_wreg +ffffffff81ccfcf0 T rv515_debugfs +ffffffff81ccfd00 T rv515_mc_stop +ffffffff81cd0270 T rv515_mc_resume +ffffffff81cd0850 T rv515_clock_startup +ffffffff81cd0910 T rv515_resume +ffffffff81cd0b50 t rv515_startup +ffffffff81cd1020 T rv515_suspend +ffffffff81cd1090 T rv515_set_safe_registers +ffffffff81cd10d0 T rv515_fini +ffffffff81cd1180 T rv515_init +ffffffff81cd1460 T atom_rv515_force_tv_scaler +ffffffff81cd4b00 T rv515_bandwidth_avivo_update +ffffffff81cd4ca0 t rv515_crtc_bandwidth_compute +ffffffff81cd4fb0 t rv515_compute_mode_priority +ffffffff81cd5480 T rv515_bandwidth_update +ffffffff81cd6000 T rv6xx_dpm_enable +ffffffff81cd6800 t rv6xx_calculate_stepping_parameters +ffffffff81cd69e0 t rv6xx_program_stepping_parameters_except_lowest_entry +ffffffff81cd6fb0 t rv6xx_program_stepping_parameters_lowest_entry +ffffffff81cd7080 t rv6xx_enable_dynamic_pcie_gen2 +ffffffff81cd7240 T rv6xx_dpm_disable +ffffffff81cd74b0 T rv6xx_dpm_set_power_state +ffffffff81cd7ea0 T rv6xx_setup_asic +ffffffff81cd7fe0 T rv6xx_dpm_display_configuration_changed +ffffffff81cd8060 T rv6xx_dpm_init +ffffffff81cd85a0 T rv6xx_dpm_print_power_state +ffffffff81cd8660 T rv6xx_dpm_debugfs_print_current_performance_level +ffffffff81cd8690 T rv6xx_dpm_get_current_sclk +ffffffff81cd8700 T rv6xx_dpm_get_current_mclk +ffffffff81cd8770 T rv6xx_dpm_fini +ffffffff81cd8800 T rv6xx_dpm_get_sclk +ffffffff81cd8840 T rv6xx_dpm_get_mclk +ffffffff81cd8880 T rv6xx_dpm_force_performance_level +ffffffff81cd8a10 t rv6xx_generate_steps +ffffffff81cd8d10 t rv6xx_output_stepping +ffffffff81cd8e20 t rv6xx_program_mclk_stepping_entry +ffffffff81cd9090 t rv6xx_program_engine_spread_spectrum +ffffffff81cd9380 t rv6xx_step_sw_voltage +ffffffff81cda000 T rv730_populate_sclk_value +ffffffff81cda230 T rv730_populate_mclk_value +ffffffff81cda470 T rv730_read_clock_registers +ffffffff81cda590 T rv730_populate_smc_acpi_state +ffffffff81cda740 T rv730_populate_smc_initial_state +ffffffff81cda900 T rv730_program_memory_timing_parameters +ffffffff81cdaae0 T rv730_start_dpm +ffffffff81cdab70 T rv730_stop_dpm +ffffffff81cdac30 T rv730_program_dcodt +ffffffff81cdad00 T rv730_get_odt_values +ffffffff81cdb000 T rv740_get_decoded_reference_divider +ffffffff81cdb0a0 T rv740_get_dll_speed +ffffffff81cdb2b0 T rv740_populate_sclk_value +ffffffff81cdb4b0 T rv740_populate_mclk_value +ffffffff81cdb860 T rv740_read_clock_registers +ffffffff81cdb990 T rv740_populate_smc_acpi_state +ffffffff81cdbbc0 T rv740_enable_mclk_spread_spectrum +ffffffff81cdbc10 T rv740_get_mclk_frequency_ratio +ffffffff81cdc000 T rv770_set_uvd_clocks +ffffffff81cdc570 T rv770_get_xclk +ffffffff81cdc5d0 T rv770_page_flip +ffffffff81cdc8d0 T rv770_page_flip_pending +ffffffff81cdc940 T rv770_get_temp +ffffffff81cdc9a0 T rv770_pm_misc +ffffffff81cdca80 T r700_cp_stop +ffffffff81cdcb00 T r700_cp_fini +ffffffff81cdcb90 T rv770_set_clk_bypass_mode +ffffffff81cdccb0 T r700_vram_gtt_location +ffffffff81cdce40 T rv770_resume +ffffffff81cdced0 t rv770_init_golden_registers +ffffffff81cdd060 t rv770_startup +ffffffff81cdec00 T rv770_suspend +ffffffff81cdee20 T rv770_init +ffffffff81cdf210 t rv770_pcie_gart_fini +ffffffff81cdf390 T rv770_fini +ffffffff81cdf630 t rv770_uvd_start +ffffffff81cdf6e0 t rv770_cp_load_microcode +ffffffff81cdf9b0 t rv770_uvd_resume +ffffffff81ce0000 T rv770_copy_dma +ffffffff81ce1000 T rv770_get_ps +ffffffff81ce1030 T rv770_get_pi +ffffffff81ce1060 T evergreen_get_pi +ffffffff81ce1090 T rv770_restore_cgcg +ffffffff81ce1110 T rv770_stop_dpm +ffffffff81ce11d0 T rv770_dpm_enabled +ffffffff81ce1210 T rv770_enable_thermal_protection +ffffffff81ce1270 T rv770_enable_acpi_pm +ffffffff81ce12c0 T rv770_get_seq_value +ffffffff81ce1300 T rv770_write_smc_soft_register +ffffffff81ce1330 T rv770_populate_smc_t +ffffffff81ce14e0 T rv770_populate_smc_sp +ffffffff81ce1540 T rv770_map_clkf_to_ibias +ffffffff81ce15a0 T rv770_populate_vddc_value +ffffffff81ce1650 T rv770_populate_mvdd_value +ffffffff81ce16a0 T rv770_calculate_memory_refresh_rate +ffffffff81ce1720 T rv770_enable_backbias +ffffffff81ce1780 T rv770_setup_bsp +ffffffff81ce1870 T rv770_program_git +ffffffff81ce18c0 T rv770_program_tp +ffffffff81ce1940 T rv770_program_tpp +ffffffff81ce1980 T rv770_program_sstp +ffffffff81ce19c0 T rv770_program_engine_speed_parameters +ffffffff81ce1a10 T rv770_program_vc +ffffffff81ce1a60 T rv770_clear_vc +ffffffff81ce1aa0 T rv770_upload_firmware +ffffffff81ce1ae0 T rv770_populate_initial_mvdd_value +ffffffff81ce1b30 T rv770_get_memory_module_index +ffffffff81ce1b70 T rv770_enable_voltage_control +ffffffff81ce1bc0 T rv770_halt_smc +ffffffff81ce1c20 T rv770_resume_smc +ffffffff81ce1c70 T rv770_set_sw_state +ffffffff81ce1cd0 T rv770_set_boot_state +ffffffff81ce1d20 T rv770_set_uvd_clock_before_set_eng_clock +ffffffff81ce1d90 T rv770_set_uvd_clock_after_set_eng_clock +ffffffff81ce1e00 T rv770_restrict_performance_levels_before_switch +ffffffff81ce1e60 T rv770_dpm_force_performance_level +ffffffff81ce1f20 T r7xx_start_smc +ffffffff81ce1f50 T r7xx_stop_smc +ffffffff81ce1f80 T rv770_read_voltage_smio_registers +ffffffff81ce1fc0 T rv770_reset_smio_status +ffffffff81ce2080 T rv770_get_memory_type +ffffffff81ce20d0 T rv770_get_pcie_gen2_status +ffffffff81ce2140 T rv770_get_max_vddc +ffffffff81ce21a0 T rv770_program_response_times +ffffffff81ce22f0 T rv770_enable_auto_throttle_source +ffffffff81ce2470 T rv770_dpm_enable +ffffffff81ce34f0 T rv770_dpm_late_enable +ffffffff81ce3620 T rv770_dpm_disable +ffffffff81ce3990 T rv770_dpm_set_power_state +ffffffff81ce4080 t rv770_program_dcodt_after_state_switch +ffffffff81ce4100 T rv770_dpm_setup_asic +ffffffff81ce4470 T rv770_dpm_display_configuration_changed +ffffffff81ce44f0 T rv7xx_parse_power_table +ffffffff81ce4a70 T rv770_get_engine_memory_ss +ffffffff81ce4b00 T rv770_dpm_init +ffffffff81ce4d40 T rv770_dpm_print_power_state +ffffffff81ce4e60 T rv770_dpm_debugfs_print_current_performance_level +ffffffff81ce4e90 T rv770_dpm_get_current_sclk +ffffffff81ce4f00 T rv770_dpm_get_current_mclk +ffffffff81ce4f70 T rv770_dpm_fini +ffffffff81ce5000 T rv770_dpm_get_sclk +ffffffff81ce5050 T rv770_dpm_get_mclk +ffffffff81ce50a0 T rv770_dpm_vblank_too_short +ffffffff81ce5110 t rv770_convert_power_level_to_smc +ffffffff81ce6000 T rv770_copy_bytes_to_smc +ffffffff81ce6210 T rv770_start_smc +ffffffff81ce6260 T rv770_reset_smc +ffffffff81ce62b0 T rv770_stop_smc_clock +ffffffff81ce6300 T rv770_start_smc_clock +ffffffff81ce6350 T rv770_is_smc_running +ffffffff81ce6390 T rv770_send_msg_to_smc +ffffffff81ce6470 T rv770_wait_for_smc_inactive +ffffffff81ce6510 T rv770_load_smc_ucode +ffffffff81ce66a0 T rv770_read_smc_sram_dword +ffffffff81ce6760 T rv770_write_smc_sram_dword +ffffffff81ce7000 T si_get_allowed_info_register +ffffffff81ce7090 T si_get_xclk +ffffffff81ce7100 T si_get_temp +ffffffff81ce7150 T si_mc_load_microcode +ffffffff81ce7410 T dce6_bandwidth_update +ffffffff81ce75d0 t dce6_line_buffer_adjust +ffffffff81ce7780 t dce6_program_watermarks +ffffffff81ce8230 T si_fence_ring_emit +ffffffff81ce8690 T si_ring_ib_execute +ffffffff81ce8e00 T si_gpu_check_soft_reset +ffffffff81ce8fa0 T si_asic_reset +ffffffff81ce9320 t si_gpu_pci_config_reset +ffffffff81ce9640 T si_gfx_is_lockup +ffffffff81ce96b0 T si_vram_gtt_location +ffffffff81ce9750 T si_pcie_gart_tlb_flush +ffffffff81ce97a0 T si_ib_parse +ffffffff81ce9e40 T si_vm_init +ffffffff81ce9e80 T si_vm_fini +ffffffff81ce9eb0 T si_vm_flush +ffffffff81cea550 T si_init_uvd_internal_cg +ffffffff81cea5a0 T si_get_csb_size +ffffffff81cea630 T si_get_csb_buffer +ffffffff81cea7b0 T si_rlc_reset +ffffffff81cea830 T si_irq_set +ffffffff81cead20 t si_disable_interrupt_state +ffffffff81ceafa0 T si_irq_process +ffffffff81cec2a0 t si_irq_ack +ffffffff81cec890 T si_resume +ffffffff81cec920 t si_init_golden_registers +ffffffff81cecae0 t si_startup +ffffffff81ceef00 T si_suspend +ffffffff81cef1f0 t si_fini_cg +ffffffff81cef290 T si_init +ffffffff81cf05f0 t si_cp_fini +ffffffff81cf06e0 t si_irq_fini +ffffffff81cf07b0 t si_pcie_gart_fini +ffffffff81cf08b0 T si_fini +ffffffff81cf0ad0 T si_get_gpu_clock_counter +ffffffff81cf0b90 T si_set_uvd_clocks +ffffffff81cf10f0 T si_set_vce_clocks +ffffffff81cf1630 t si_vce_send_vcepll_ctlreq +ffffffff81cf1870 t dce6_latency_watermark +ffffffff81cf1ab0 t si_rlc_stop +ffffffff81cf1c60 t si_vm_reg_valid +ffffffff81cf1dc0 t si_vm_packet3_cp_dma_check +ffffffff81cf1f30 t si_uvd_start +ffffffff81cf1fe0 t si_vce_start +ffffffff81cf20f0 t si_irq_init +ffffffff81cf2bd0 t si_cp_load_microcode +ffffffff81cf2fb0 t si_cp_resume +ffffffff81cf3e70 t si_uvd_resume +ffffffff81cf3f40 t si_vce_resume +ffffffff81cf4030 t pcie_capability_set_word +ffffffff81cf4140 t pcie_capability_read_word +ffffffff81cf41e0 t pcie_capability_clear_and_set_word +ffffffff81cf4300 t pcie_capability_write_word +ffffffff81cf43c0 t si_update_cg +ffffffff81cf4920 t si_enable_mgcg +ffffffff81cf4d40 t si_enable_cgcg +ffffffff81cf50d0 t request_firmware +ffffffff81cf5160 t release_firmware +ffffffff81cf6000 T si_dma_is_lockup +ffffffff81cf6080 T si_dma_vm_copy_pages +ffffffff81cf6170 T si_dma_vm_write_pages +ffffffff81cf62d0 T si_dma_vm_set_pages +ffffffff81cf6440 T si_dma_vm_flush +ffffffff81cf68b0 T si_copy_dma +ffffffff81cf7000 T si_dpm_force_performance_level +ffffffff81cf7160 T si_get_ddr3_mclk_frequency_ratio +ffffffff81cf71c0 T si_get_mclk_frequency_ratio +ffffffff81cf7240 T si_trim_voltage_table_to_fit_state_table +ffffffff81cf7350 T si_dpm_setup_asic +ffffffff81cf7520 T si_fan_ctrl_get_fan_speed_percent +ffffffff81cf75b0 T si_fan_ctrl_set_fan_speed_percent +ffffffff81cf7670 T si_fan_ctrl_set_mode +ffffffff81cf78c0 T si_fan_ctrl_get_mode +ffffffff81cf7910 T si_dpm_enable +ffffffff81cf8c90 t si_init_smc_table +ffffffff81cf9ea0 t si_init_smc_spll_table +ffffffff81cfa020 t si_init_arb_table_index +ffffffff81cfa0b0 t si_populate_mc_reg_table +ffffffff81cfa500 t si_initialize_smc_cac_tables +ffffffff81cfc150 t si_initialize_hardware_cac_manager +ffffffff81cfc200 t si_initialize_smc_dte_tables +ffffffff81cfc400 t si_populate_smc_tdp_limits +ffffffff81cfc600 t si_populate_smc_tdp_limits_2 +ffffffff81cfc6d0 t si_program_response_times +ffffffff81cfc7f0 t si_program_ds_registers +ffffffff81cfc880 t si_dpm_start_smc +ffffffff81cfc8b0 t si_enable_auto_throttle_source +ffffffff81cfca40 t si_thermal_start_thermal_controller +ffffffff81cfcf00 T si_dpm_late_enable +ffffffff81cfd050 T si_dpm_disable +ffffffff81cfd3d0 t si_enable_power_containment +ffffffff81cfd4a0 t si_enable_smc_cac +ffffffff81cfd600 T si_dpm_pre_set_power_state +ffffffff81cfe170 T si_dpm_set_power_state +ffffffff81cfe6d0 t si_halt_smc +ffffffff81cfe730 t si_upload_sw_state +ffffffff81cff130 t si_upload_smc_data +ffffffff81cff270 t si_upload_ulv_state +ffffffff81cff3b0 t si_upload_mc_reg_table +ffffffff81cff550 t si_set_pcie_lane_width_in_smc +ffffffff81cff5f0 t si_resume_smc +ffffffff81cff650 t si_set_vce_clock +ffffffff81cff6f0 t si_notify_link_speed_change_after_state_change +ffffffff81cff820 t si_set_power_state_conditionally_enable_ulv +ffffffff81cff900 t si_power_control_set_level +ffffffff81cffa90 T si_dpm_post_set_power_state +ffffffff81cffac0 T si_dpm_display_configuration_changed +ffffffff81cffba0 T si_dpm_init +ffffffff81d015e0 T si_dpm_fini +ffffffff81d01690 T si_dpm_debugfs_print_current_performance_level +ffffffff81d016e0 T si_dpm_get_current_sclk +ffffffff81d01750 T si_dpm_get_current_mclk +ffffffff81d017c0 t si_do_program_memory_timing_parameters +ffffffff81d01950 t si_populate_mvdd_value +ffffffff81d019d0 t si_convert_power_level_to_smc +ffffffff81d02280 t si_calculate_sclk_params +ffffffff81d024b0 t si_program_cac_config_registers +ffffffff81d03000 T si_copy_bytes_to_smc +ffffffff81d03240 T si_start_smc +ffffffff81d03280 T si_reset_smc +ffffffff81d032c0 T si_program_jump_on_start +ffffffff81d032f0 T si_stop_smc_clock +ffffffff81d03330 T si_start_smc_clock +ffffffff81d03370 T si_is_smc_running +ffffffff81d033d0 T si_send_msg_to_smc +ffffffff81d034a0 T si_wait_for_smc_inactive +ffffffff81d03540 T si_load_smc_ucode +ffffffff81d036e0 T si_read_smc_sram_dword +ffffffff81d037b0 T si_write_smc_sram_dword +ffffffff81d04000 T sumo_get_pi +ffffffff81d04030 T sumo_gfx_clockgating_initialize +ffffffff81d04110 T sumo_program_vc +ffffffff81d04150 T sumo_clear_vc +ffffffff81d04190 T sumo_program_sstp +ffffffff81d04210 T sumo_take_smu_control +ffffffff81d04240 T sumo_get_sleep_divider_from_id +ffffffff81d04270 T sumo_get_sleep_divider_id_from_clock +ffffffff81d04320 T sumo_dpm_enable +ffffffff81d049b0 T sumo_dpm_late_enable +ffffffff81d04f70 T sumo_dpm_disable +ffffffff81d052c0 T sumo_dpm_pre_set_power_state +ffffffff81d057b0 T sumo_dpm_set_power_state +ffffffff81d06260 T sumo_dpm_post_set_power_state +ffffffff81d06300 T sumo_dpm_setup_asic +ffffffff81d06400 T sumo_dpm_display_configuration_changed +ffffffff81d06430 T sumo_convert_vid2_to_vid7 +ffffffff81d06480 T sumo_construct_sclk_voltage_mapping_table +ffffffff81d06540 T sumo_construct_vid_mapping_table +ffffffff81d066b0 T sumo_dpm_init +ffffffff81d06f60 T sumo_dpm_print_power_state +ffffffff81d07080 T sumo_dpm_debugfs_print_current_performance_level +ffffffff81d070b0 T sumo_dpm_get_current_sclk +ffffffff81d07120 T sumo_dpm_get_current_mclk +ffffffff81d07150 T sumo_dpm_get_current_vddc +ffffffff81d07220 T sumo_dpm_fini +ffffffff81d072b0 T sumo_dpm_get_sclk +ffffffff81d07300 T sumo_dpm_get_mclk +ffffffff81d07330 T sumo_dpm_force_performance_level +ffffffff81d07720 t sumo_power_level_enable +ffffffff81d07950 t sumo_program_power_level +ffffffff81d08000 T sumo_initialize_m3_arb +ffffffff81d082c0 T sumo_smu_notify_alt_vddnb_change +ffffffff81d08360 t sumo_send_msg_to_smu +ffffffff81d084f0 T sumo_smu_pg_init +ffffffff81d08510 T sumo_enable_boost_timer +ffffffff81d08640 T sumo_set_tdp_limit +ffffffff81d086c0 T sumo_boost_state_enable +ffffffff81d08710 T sumo_get_running_fw_version +ffffffff81d09000 T trinity_dpm_enable_bapm +ffffffff81d09080 T trinity_dpm_enable +ffffffff81d09520 T trinity_dpm_late_enable +ffffffff81d09a60 T trinity_dpm_disable +ffffffff81d09e50 T trinity_dpm_force_performance_level +ffffffff81d09f00 T trinity_dpm_pre_set_power_state +ffffffff81d0a4c0 T trinity_dpm_set_power_state +ffffffff81d0aa30 T trinity_dpm_post_set_power_state +ffffffff81d0aad0 T trinity_dpm_setup_asic +ffffffff81d0ab30 T trinity_dpm_display_configuration_changed +ffffffff81d0abc0 T trinity_dpm_init +ffffffff81d0b4a0 T trinity_dpm_print_power_state +ffffffff81d0b5b0 T trinity_dpm_debugfs_print_current_performance_level +ffffffff81d0b640 T trinity_dpm_get_current_sclk +ffffffff81d0b6a0 T trinity_dpm_get_current_mclk +ffffffff81d0b6d0 T trinity_dpm_fini +ffffffff81d0b770 T trinity_dpm_get_sclk +ffffffff81d0b7c0 T trinity_dpm_get_mclk +ffffffff81d0b7f0 t trinity_program_power_level +ffffffff81d0c000 T trinity_dpm_bapm_enable +ffffffff81d0c150 T trinity_dpm_config +ffffffff81d0c230 T trinity_dpm_force_state +ffffffff81d0c310 T trinity_dpm_n_levels_disabled +ffffffff81d0c3f0 T trinity_uvd_dpm_config +ffffffff81d0c4c0 T trinity_dpm_no_forced_level +ffffffff81d0c590 T trinity_dce_enable_voltage_adjustment +ffffffff81d0c6e0 T trinity_gfx_dynamic_mgpg_config +ffffffff81d0c7b0 T trinity_acquire_mutex +ffffffff81d0c840 T trinity_release_mutex +ffffffff81d0d000 T uvd_v1_0_get_rptr +ffffffff81d0d040 T uvd_v1_0_get_wptr +ffffffff81d0d080 T uvd_v1_0_set_wptr +ffffffff81d0d0c0 T uvd_v1_0_fence_emit +ffffffff81d0d4b0 T uvd_v1_0_resume +ffffffff81d0d610 T uvd_v1_0_init +ffffffff81d0db90 T uvd_v1_0_start +ffffffff81d0e310 T uvd_v1_0_fini +ffffffff81d0e480 T uvd_v1_0_stop +ffffffff81d0e5f0 T uvd_v1_0_ring_test +ffffffff81d0e7c0 T uvd_v1_0_semaphore_emit +ffffffff81d0e7f0 T uvd_v1_0_ib_execute +ffffffff81d0e980 T uvd_v1_0_ib_test +ffffffff81d0f000 T uvd_v2_2_fence_emit +ffffffff81d0f450 T uvd_v2_2_semaphore_emit +ffffffff81d0f650 T uvd_v2_2_resume +ffffffff81d10000 T uvd_v3_1_semaphore_emit +ffffffff81d11000 T uvd_v4_2_resume +ffffffff81d12000 T vce_v1_0_get_rptr +ffffffff81d12090 T vce_v1_0_get_wptr +ffffffff81d12120 T vce_v1_0_set_wptr +ffffffff81d121b0 T vce_v1_0_enable_mgcg +ffffffff81d12470 T vce_v1_0_load_fw +ffffffff81d12640 T vce_v1_0_bo_size +ffffffff81d126b0 T vce_v1_0_resume +ffffffff81d13020 T vce_v1_0_start +ffffffff81d137e0 T vce_v1_0_init +ffffffff81d14000 T vce_v2_0_enable_mgcg +ffffffff81d14070 t vce_v2_0_set_dyn_cg +ffffffff81d14260 T vce_v2_0_bo_size +ffffffff81d142d0 T vce_v2_0_resume +ffffffff81d15000 T aldebaran_reset_init +ffffffff81d150c0 t aldebaran_async_reset +ffffffff81d15120 t aldebaran_get_reset_handler +ffffffff81d151c0 T aldebaran_reset_fini +ffffffff81d15220 t aldebaran_mode2_prepare_hwcontext +ffffffff81d15340 t aldebaran_mode2_perform_reset +ffffffff81d15500 t aldebaran_mode2_restore_hwcontext +ffffffff81d159e0 t aldebaran_mode2_reset +ffffffff81d16000 T aldebaran_reg_base_init +ffffffff81d17000 T amdgpu_acpi_is_pcie_performance_request_supported +ffffffff81d17040 T amdgpu_acpi_is_power_shift_control_supported +ffffffff81d17070 T amdgpu_acpi_pcie_notify_device_ready +ffffffff81d17180 T amdgpu_acpi_pcie_performance_request +ffffffff81d17500 T amdgpu_acpi_power_shift_control +ffffffff81d17640 T amdgpu_acpi_smart_shift_update +ffffffff81d176e0 T amdgpu_acpi_init +ffffffff81d177a0 t amdgpu_acpi_event +ffffffff81d17ab0 T amdgpu_acpi_get_backlight_caps +ffffffff81d17b00 T amdgpu_acpi_fini +ffffffff81d17b20 T amdgpu_acpi_should_gpu_reset +ffffffff81d17b70 T amdgpu_acpi_detect +ffffffff81d19000 T amdgpu_afmt_acr +ffffffff81d1a000 T amdgpu_amdkfd_init +ffffffff81d1a040 T amdgpu_amdkfd_fini +ffffffff81d1a070 T amdgpu_amdkfd_device_probe +ffffffff81d1a0a0 T amdgpu_amdkfd_device_init +ffffffff81d1a260 t amdgpu_amdkfd_reset_work +ffffffff81d1a2e0 T amdgpu_amdkfd_device_fini_sw +ffffffff81d1a330 T amdgpu_amdkfd_interrupt +ffffffff81d1a360 T amdgpu_amdkfd_suspend +ffffffff81d1a390 T amdgpu_amdkfd_resume_iommu +ffffffff81d1a3c0 T amdgpu_amdkfd_resume +ffffffff81d1a3f0 T amdgpu_amdkfd_pre_reset +ffffffff81d1a420 T amdgpu_amdkfd_post_reset +ffffffff81d1a450 T amdgpu_amdkfd_gpu_reset +ffffffff81d1a4b0 T amdgpu_amdkfd_alloc_gtt_mem +ffffffff81d1a750 t amdgpu_bo_reserve +ffffffff81d1a8b0 t amdgpu_bo_unreserve +ffffffff81d1a990 T amdgpu_amdkfd_free_gtt_mem +ffffffff81d1aa00 T amdgpu_amdkfd_alloc_gws +ffffffff81d1aae0 T amdgpu_amdkfd_free_gws +ffffffff81d1ab20 T amdgpu_amdkfd_get_fw_version +ffffffff81d1abd0 T amdgpu_amdkfd_get_local_mem_info +ffffffff81d1aca0 T amdgpu_amdkfd_get_gpu_clock_counter +ffffffff81d1ace0 T amdgpu_amdkfd_get_max_engine_clock_in_mhz +ffffffff81d1ad60 T amdgpu_amdkfd_get_cu_info +ffffffff81d1aeb0 T amdgpu_amdkfd_get_dmabuf_info +ffffffff81d1aff0 T amdgpu_amdkfd_get_xgmi_hops_count +ffffffff81d1b060 T amdgpu_amdkfd_get_xgmi_bandwidth_mbytes +ffffffff81d1b0f0 T amdgpu_amdkfd_get_pcie_bandwidth_mbytes +ffffffff81d1b250 T amdgpu_amdkfd_submit_ib +ffffffff81d1b3b0 T amdgpu_amdkfd_set_compute_idle +ffffffff81d1b400 T amdgpu_amdkfd_is_kfd_vmid +ffffffff81d1b440 T amdgpu_amdkfd_flush_gpu_tlb_vmid +ffffffff81d1b4e0 T amdgpu_amdkfd_flush_gpu_tlb_pasid +ffffffff81d1b510 T amdgpu_amdkfd_have_atomics_support +ffffffff81d1b540 T amdgpu_amdkfd_ras_poison_consumption_handler +ffffffff81d1b5a0 T amdgpu_amdkfd_ras_query_utcl2_poison_status +ffffffff81d1c000 T amdgpu_atom_execute_table +ffffffff81d1c0a0 t amdgpu_atom_execute_table_locked +ffffffff81d1c3c0 T amdgpu_atom_parse +ffffffff81d1c940 T amdgpu_atom_destroy +ffffffff81d1c980 T amdgpu_atom_asic_init +ffffffff81d1caa0 t get_u32 +ffffffff81d1cb00 T amdgpu_atom_parse_data_header +ffffffff81d1cba0 T amdgpu_atom_parse_cmd_header +ffffffff81d1cc20 t atom_op_move +ffffffff81d1cdf0 t atom_op_and +ffffffff81d1cfd0 t atom_op_or +ffffffff81d1d1b0 t atom_op_shift_left +ffffffff81d1d390 t atom_op_shift_right +ffffffff81d1d570 t atom_op_mul +ffffffff81d1d6c0 t atom_op_div +ffffffff81d1d830 t atom_op_add +ffffffff81d1da10 t atom_op_sub +ffffffff81d1dbf0 t atom_op_setport +ffffffff81d1dd70 t atom_op_setregblock +ffffffff81d1de30 t atom_op_setfbbase +ffffffff81d1def0 t atom_op_compare +ffffffff81d1e0d0 t atom_op_switch +ffffffff81d1e300 t atom_op_jump +ffffffff81d1e570 t atom_op_test +ffffffff81d1e730 t atom_op_delay +ffffffff81d1e810 t atom_op_calltable +ffffffff81d1e960 t atom_op_repeat +ffffffff81d1e990 t atom_op_clear +ffffffff81d1eaa0 t atom_op_nop +ffffffff81d1ead0 t atom_op_eot +ffffffff81d1eb00 t atom_op_mask +ffffffff81d1edb0 t atom_op_postcard +ffffffff81d1ee60 t atom_op_beep +ffffffff81d1ee80 t atom_op_savereg +ffffffff81d1eeb0 t atom_op_restorereg +ffffffff81d1eee0 t atom_op_setdatablock +ffffffff81d1f020 t atom_op_xor +ffffffff81d1f200 t atom_op_shl +ffffffff81d1f420 t atom_op_shr +ffffffff81d1f640 t atom_op_debug +ffffffff81d1f6f0 t atom_op_processds +ffffffff81d1f7b0 t atom_op_mul32 +ffffffff81d1f910 t atom_op_div32 +ffffffff81d1faa0 t atom_put_dst +ffffffff81d1ffb0 t atom_get_src_int +ffffffff81d20630 t atom_iio_execute +ffffffff81d21000 T amdgpu_atombios_lookup_i2c_gpio +ffffffff81d21260 T amdgpu_atombios_i2c_init +ffffffff81d21520 T amdgpu_atombios_lookup_gpio +ffffffff81d21620 T amdgpu_atombios_has_dce_engine_info +ffffffff81d216a0 T amdgpu_atombios_get_connector_info_from_object_table +ffffffff81d21f00 T amdgpu_atombios_get_clock_info +ffffffff81d22240 T amdgpu_atombios_get_gfx_info +ffffffff81d22300 T amdgpu_atombios_get_vram_width +ffffffff81d22390 T amdgpu_atombios_get_asic_ss_info +ffffffff81d22670 t amdgpu_atombios_get_igp_ss_overrides +ffffffff81d22790 T amdgpu_atombios_get_clock_dividers +ffffffff81d229b0 T amdgpu_atombios_has_gpu_virtualization_table +ffffffff81d22a00 T amdgpu_atombios_scratch_regs_lock +ffffffff81d22a60 T amdgpu_atombios_scratch_regs_engine_hung +ffffffff81d22ab0 T amdgpu_atombios_scratch_regs_set_backlight_level +ffffffff81d22b10 T amdgpu_atombios_scratch_need_asic_init +ffffffff81d22b60 T amdgpu_atombios_copy_swap +ffffffff81d22b80 T amdgpu_atombios_fini +ffffffff81d22c30 T amdgpu_atombios_init +ffffffff81d22ed0 t cail_reg_read +ffffffff81d22ef0 t cail_reg_write +ffffffff81d22f10 t cail_mc_read +ffffffff81d22f40 t cail_mc_write +ffffffff81d22f70 t cail_pll_read +ffffffff81d22fa0 t cail_pll_write +ffffffff81d22fd0 T amdgpu_atombios_get_data_table +ffffffff81d24000 T amdgpu_atombios_crtc_overscan_setup +ffffffff81d24150 T amdgpu_atombios_crtc_scaler_setup +ffffffff81d241d0 T amdgpu_atombios_crtc_lock +ffffffff81d24230 T amdgpu_atombios_crtc_enable +ffffffff81d24290 T amdgpu_atombios_crtc_blank +ffffffff81d242f0 T amdgpu_atombios_crtc_powergate +ffffffff81d24360 T amdgpu_atombios_crtc_powergate_init +ffffffff81d243d0 T amdgpu_atombios_crtc_set_dtd_timing +ffffffff81d24500 T amdgpu_atombios_crtc_set_disp_eng_pll +ffffffff81d245f0 T amdgpu_atombios_crtc_set_dce_clock +ffffffff81d246e0 T amdgpu_atombios_crtc_program_pll +ffffffff81d24a00 T amdgpu_atombios_crtc_prepare_pll +ffffffff81d24f00 T amdgpu_atombios_crtc_set_pll +ffffffff81d26000 T amdgpu_atombios_dp_aux_init +ffffffff81d26090 t amdgpu_atombios_dp_aux_transfer +ffffffff81d26200 T amdgpu_atombios_dp_get_sinktype +ffffffff81d26270 T amdgpu_atombios_dp_get_dpcd +ffffffff81d26420 T amdgpu_atombios_dp_get_panel_mode +ffffffff81d26510 T amdgpu_atombios_dp_set_link_config +ffffffff81d26590 t amdgpu_atombios_dp_get_dp_link_config +ffffffff81d26720 T amdgpu_atombios_dp_mode_valid_helper +ffffffff81d267a0 T amdgpu_atombios_dp_needs_link_train +ffffffff81d26810 T amdgpu_atombios_dp_set_rx_power_state +ffffffff81d26890 T amdgpu_atombios_dp_link_train +ffffffff81d26df0 t amdgpu_atombios_dp_process_aux_ch +ffffffff81d26f50 t amdgpu_atombios_dp_get_adjust_train +ffffffff81d28000 T amdgpu_atombios_encoder_get_backlight_level_from_reg +ffffffff81d28050 T amdgpu_atombios_encoder_set_backlight_level_to_reg +ffffffff81d280a0 T amdgpu_atombios_encoder_get_backlight_level +ffffffff81d28100 T amdgpu_atombios_encoder_set_backlight_level +ffffffff81d28210 T amdgpu_atombios_encoder_setup_dig_transmitter +ffffffff81d28c30 T amdgpu_atombios_encoder_init_backlight +ffffffff81d28dd0 t amdgpu_atombios_encoder_get_backlight_brightness +ffffffff81d28e30 T amdgpu_atombios_encoder_fini_backlight +ffffffff81d28ec0 T amdgpu_atombios_encoder_is_digital +ffffffff81d28f10 T amdgpu_atombios_encoder_mode_fixup +ffffffff81d28ff0 T amdgpu_atombios_encoder_get_encoder_mode +ffffffff81d29190 T amdgpu_atombios_encoder_setup_dig_encoder +ffffffff81d29670 t amdgpu_atombios_encoder_get_bpc +ffffffff81d296c0 T amdgpu_atombios_encoder_set_edp_panel_power +ffffffff81d297c0 T amdgpu_atombios_encoder_dpms +ffffffff81d29930 t amdgpu_atombios_encoder_setup_dig +ffffffff81d29ce0 t amdgpu_atombios_encoder_setup_dvo +ffffffff81d29e90 T amdgpu_atombios_encoder_set_crtc_source +ffffffff81d2a270 T amdgpu_atombios_encoder_init_dig +ffffffff81d2a340 t amdgpu_atombios_encoder_setup_external_encoder +ffffffff81d2a5b0 T amdgpu_atombios_encoder_dac_detect +ffffffff81d2a770 T amdgpu_atombios_encoder_dig_detect +ffffffff81d2a870 T amdgpu_atombios_encoder_setup_ext_encoder_ddc +ffffffff81d2a8c0 T amdgpu_atombios_encoder_set_bios_scratch_regs +ffffffff81d2ae10 T amdgpu_atombios_encoder_get_lcd_info +ffffffff81d2b170 T amdgpu_atombios_encoder_get_dig_info +ffffffff81d2b1e0 t amdgpu_atombios_encoder_update_backlight_status +ffffffff81d2c000 T amdgpu_atombios_i2c_xfer +ffffffff81d2c370 T amdgpu_atombios_i2c_func +ffffffff81d2c3a0 T amdgpu_atombios_i2c_channel_trans +ffffffff81d2d000 T amdgpu_atomfirmware_query_firmware_capability +ffffffff81d2d0a0 T amdgpu_atomfirmware_gpu_virtualization_supported +ffffffff81d2d0e0 T amdgpu_atomfirmware_scratch_regs_init +ffffffff81d2d160 T amdgpu_atomfirmware_allocate_fb_scratch +ffffffff81d2d350 T amdgpu_atomfirmware_get_vram_info +ffffffff81d2d7c0 t convert_atom_mem_type_to_vram_type +ffffffff81d2d830 T amdgpu_atomfirmware_mem_ecc_supported +ffffffff81d2d8e0 T amdgpu_atomfirmware_sram_ecc_supported +ffffffff81d2d920 T amdgpu_atomfirmware_dynamic_boot_config_supported +ffffffff81d2d960 T amdgpu_atomfirmware_ras_rom_addr +ffffffff81d2da10 T amdgpu_atomfirmware_get_clock_info +ffffffff81d2dc60 T amdgpu_atomfirmware_get_gfx_info +ffffffff81d2de00 T amdgpu_atomfirmware_mem_training_supported +ffffffff81d2de40 T amdgpu_atomfirmware_get_fw_reserved_fb_size +ffffffff81d2ded0 T amdgpu_atomfirmware_asic_init +ffffffff81d2f000 T amdgpu_benchmark +ffffffff81d2f790 t amdgpu_benchmark_move +ffffffff81d30000 T amdgpu_read_bios +ffffffff81d30190 t check_atom_bios +ffffffff81d302a0 T amdgpu_get_bios +ffffffff81d307c0 t igp_read_bios_from_vram +ffffffff81d30900 t amdgpu_read_platform_bios +ffffffff81d309d0 T amdgpu_soc15_read_bios_from_rom +ffffffff81d31000 T amdgpu_bo_list_create +ffffffff81d312a0 T amdgpu_bo_list_get +ffffffff81d31310 T amdgpu_bo_list_get_list +ffffffff81d31490 T amdgpu_bo_list_put +ffffffff81d31540 T amdgpu_bo_create_list_entry_array +ffffffff81d31690 T amdgpu_bo_list_ioctl +ffffffff81d32000 T amdgpu_cgs_create_device +ffffffff81d32080 T amdgpu_cgs_destroy_device +ffffffff81d320a0 t amdgpu_cgs_read_register +ffffffff81d320c0 t amdgpu_cgs_write_register +ffffffff81d320e0 t amdgpu_cgs_read_ind_register +ffffffff81d321c0 t amdgpu_cgs_write_ind_register +ffffffff81d32270 t amdgpu_cgs_get_firmware_info +ffffffff81d33000 T amdgpu_connector_hotplug +ffffffff81d33110 T amdgpu_connector_get_monitor_bpc +ffffffff81d333a0 T amdgpu_connector_edid +ffffffff81d33450 T amdgpu_connector_encoder_get_dp_bridge_encoder_id +ffffffff81d334d0 T amdgpu_connector_is_dp12_capable +ffffffff81d33560 T amdgpu_connector_add +ffffffff81d34150 t amdgpu_connector_dp_detect +ffffffff81d344a0 t amdgpu_connector_dvi_force +ffffffff81d344f0 t amdgpu_connector_set_property +ffffffff81d34a60 t amdgpu_connector_late_register +ffffffff81d34ac0 t amdgpu_connector_unregister +ffffffff81d34b20 t amdgpu_connector_destroy +ffffffff81d34b90 t amdgpu_connector_best_single_encoder +ffffffff81d34c00 t amdgpu_connector_dp_get_modes +ffffffff81d34f00 t amdgpu_connector_dp_mode_valid +ffffffff81d35010 t amdgpu_connector_dvi_encoder +ffffffff81d350d0 t amdgpu_connector_get_edid +ffffffff81d35250 t amdgpu_connector_fixup_lcd_native_mode +ffffffff81d35390 t amdgpu_connector_add_common_modes +ffffffff81d35480 t amdgpu_connector_lcd_native_mode +ffffffff81d35560 t amdgpu_connector_set_lcd_property +ffffffff81d35650 t amdgpu_connector_vga_detect +ffffffff81d35890 t amdgpu_connector_vga_get_modes +ffffffff81d35970 t amdgpu_connector_vga_mode_valid +ffffffff81d359c0 t amdgpu_connector_dvi_detect +ffffffff81d35db0 t amdgpu_connector_dvi_mode_valid +ffffffff81d35e60 t amdgpu_connector_lvds_detect +ffffffff81d35fa0 t amdgpu_connector_lvds_get_modes +ffffffff81d360e0 t amdgpu_connector_lvds_mode_valid +ffffffff81d37000 T amdgpu_cs_report_moved_bytes +ffffffff81d37070 T amdgpu_cs_ioctl +ffffffff81d37d60 t amdgpu_cs_parser_bos +ffffffff81d38430 t amdgpu_cs_patch_jobs +ffffffff81d38660 t amdgpu_cs_vm_handling +ffffffff81d388a0 t amdgpu_cs_sync_rings +ffffffff81d389e0 t amdgpu_cs_submit +ffffffff81d38d80 t amdgpu_cs_parser_fini +ffffffff81d38f10 T amdgpu_cs_wait_ioctl +ffffffff81d39050 T amdgpu_cs_fence_to_handle_ioctl +ffffffff81d391f0 t amdgpu_cs_get_fence +ffffffff81d392a0 T amdgpu_cs_wait_fences_ioctl +ffffffff81d395a0 T amdgpu_cs_find_mapping +ffffffff81d396a0 t amdgpu_cs_p1_ib +ffffffff81d39770 t amdgpu_cs_p1_user_fence +ffffffff81d39850 t amdgpu_cs_p1_bo_handles +ffffffff81d398e0 t amdgpu_cs_bo_validate +ffffffff81d39c50 t amdgpu_cs_list_validate +ffffffff81d3a000 T amdgpu_csa_vaddr +ffffffff81d3a060 T amdgpu_allocate_static_csa +ffffffff81d3a100 T amdgpu_free_static_csa +ffffffff81d3a120 T amdgpu_map_static_csa +ffffffff81d3b000 T amdgpu_ctx_priority_is_valid +ffffffff81d3b060 T amdgpu_ctx_get_entity +ffffffff81d3b3c0 T amdgpu_ctx_ioctl +ffffffff81d3bab0 T amdgpu_ctx_get +ffffffff81d3bb30 T amdgpu_ctx_put +ffffffff81d3bca0 T amdgpu_ctx_add_fence +ffffffff81d3be20 T amdgpu_ctx_get_fence +ffffffff81d3bed0 T amdgpu_ctx_priority_override +ffffffff81d3c0d0 T amdgpu_ctx_wait_prev_fence +ffffffff81d3c180 T amdgpu_ctx_mgr_init +ffffffff81d3c220 T amdgpu_ctx_mgr_entity_flush +ffffffff81d3c330 T amdgpu_ctx_mgr_entity_fini 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amdgpu_vm_get_memory +ffffffff81da29a0 T amdgpu_vm_bo_update +ffffffff81da2e40 T amdgpu_vm_clear_freed +ffffffff81da2fc0 T amdgpu_vm_handle_moved +ffffffff81da31d0 T amdgpu_vm_bo_add +ffffffff81da32a0 T amdgpu_vm_bo_map +ffffffff81da3470 t amdgpu_vm_bo_insert_map +ffffffff81da3640 T amdgpu_vm_bo_replace_map +ffffffff81da3790 T amdgpu_vm_bo_clear_mappings +ffffffff81da3d00 T amdgpu_vm_bo_unmap +ffffffff81da3e30 T amdgpu_vm_bo_lookup_mapping +ffffffff81da3ea0 T amdgpu_vm_bo_trace_cs +ffffffff81da3ed0 T amdgpu_vm_bo_del +ffffffff81da40c0 T amdgpu_vm_evictable +ffffffff81da4170 T amdgpu_vm_bo_invalidate +ffffffff81da4400 T amdgpu_vm_adjust_size +ffffffff81da4660 T amdgpu_vm_wait_idle +ffffffff81da46d0 T amdgpu_vm_init +ffffffff81da4a90 t amdgpu_bo_reserve +ffffffff81da4bf0 t amdgpu_bo_unreserve +ffffffff81da4cd0 T amdgpu_vm_make_compute +ffffffff81da4ed0 T amdgpu_vm_release_compute +ffffffff81da4f90 T amdgpu_vm_fini +ffffffff81da5400 T amdgpu_vm_manager_init +ffffffff81da5590 T amdgpu_vm_manager_fini +ffffffff81da55f0 T amdgpu_vm_ioctl +ffffffff81da5720 T amdgpu_vm_get_task_info +ffffffff81da57c0 T amdgpu_vm_set_task_info +ffffffff81da58a0 T amdgpu_vm_handle_fault +ffffffff81da5a90 t amdgpu_vm_add_prt_cb +ffffffff81da5be0 t amdgpu_vm_prt_cb +ffffffff81da6000 t amdgpu_vm_cpu_map_table +ffffffff81da6020 t amdgpu_vm_cpu_prepare +ffffffff81da6070 t amdgpu_vm_cpu_update +ffffffff81da6160 t amdgpu_vm_cpu_commit +ffffffff81da7000 T amdgpu_vm_pt_clear +ffffffff81da7420 T amdgpu_vm_pt_create +ffffffff81da7910 T amdgpu_vm_pt_free_work +ffffffff81da7bc0 t amdgpu_vm_pt_free +ffffffff81da7ca0 T amdgpu_vm_pt_free_root +ffffffff81da7cc0 t amdgpu_vm_pt_free_dfs +ffffffff81da80f0 T amdgpu_vm_pt_is_root_clean +ffffffff81da81c0 T amdgpu_vm_pde_update +ffffffff81da82b0 T amdgpu_vm_ptes_update +ffffffff81da8c00 t amdgpu_vm_pt_next +ffffffff81da8d10 t amdgpu_vm_pt_next_dfs +ffffffff81da8e50 t amdgpu_vm_pt_sibling +ffffffff81da9000 t amdgpu_vm_sdma_map_table +ffffffff81da9060 t amdgpu_vm_sdma_prepare +ffffffff81da9100 t amdgpu_vm_sdma_update +ffffffff81da95b0 t amdgpu_vm_sdma_commit +ffffffff81daa000 T amdgpu_vram_mgr_bo_visible_size +ffffffff81daa100 T amdgpu_vram_mgr_reserve_range +ffffffff81daa1e0 t amdgpu_vram_mgr_do_reserve +ffffffff81daa360 T amdgpu_vram_mgr_query_page_status +ffffffff81daa440 T amdgpu_vram_mgr_alloc_sgt +ffffffff81daa490 T amdgpu_vram_mgr_free_sgt +ffffffff81daa4c0 T amdgpu_vram_mgr_vis_usage +ffffffff81daa4f0 T amdgpu_vram_mgr_init +ffffffff81daa6c0 T amdgpu_vram_mgr_fini +ffffffff81daa8e0 t amdgpu_vram_mgr_new +ffffffff81daae90 t amdgpu_vram_mgr_del +ffffffff81daaf70 t amdgpu_vram_mgr_intersects +ffffffff81daaff0 t amdgpu_vram_mgr_compatible +ffffffff81dab060 t amdgpu_vram_mgr_debug +ffffffff81dac000 t amdgpu_xgmi_hive_release +ffffffff81dac050 T amdgpu_get_xgmi_hive +ffffffff81dac0a0 T amdgpu_put_xgmi_hive +ffffffff81dac0f0 T amdgpu_xgmi_set_pstate +ffffffff81dac140 T amdgpu_xgmi_update_topology +ffffffff81dac1f0 T amdgpu_xgmi_get_hops_count +ffffffff81dac260 T amdgpu_xgmi_get_num_links +ffffffff81dac2d0 T amdgpu_xgmi_add_device +ffffffff81dac4f0 T amdgpu_xgmi_remove_device +ffffffff81dac640 T amdgpu_xgmi_get_relative_phy_addr +ffffffff81dac680 t amdgpu_ras_error_inject_xgmi +ffffffff81dac7f0 t amdgpu_xgmi_query_ras_error_count +ffffffff81dace30 t amdgpu_xgmi_reset_ras_error_count +ffffffff81dad150 t amdgpu_xgmi_ras_late_init +ffffffff81dae000 T arct_reg_base_init +ffffffff81daf000 T athub_v1_0_set_clockgating +ffffffff81daf210 T athub_v1_0_get_clockgating +ffffffff81db0000 T athub_v2_0_set_clockgating +ffffffff81db01e0 T athub_v2_0_get_clockgating +ffffffff81db1000 T athub_v2_1_set_clockgating +ffffffff81db11f0 T athub_v2_1_get_clockgating +ffffffff81db2000 T athub_v3_0_set_clockgating +ffffffff81db20d0 T athub_v3_0_get_clockgating +ffffffff81db2120 t athub_v3_0_get_cg_cntl +ffffffff81db21c0 t athub_v3_0_set_cg_cntl +ffffffff81db3000 t cz_ih_early_init +ffffffff81db3050 t cz_ih_sw_init +ffffffff81db30b0 t cz_ih_sw_fini +ffffffff81db30f0 t cz_ih_hw_init +ffffffff81db3310 t cz_ih_hw_fini +ffffffff81db33e0 t cz_ih_suspend +ffffffff81db34b0 t cz_ih_resume +ffffffff81db34f0 t cz_ih_is_idle +ffffffff81db3540 t cz_ih_wait_for_idle +ffffffff81db35e0 t cz_ih_soft_reset +ffffffff81db36c0 t cz_ih_set_clockgating_state +ffffffff81db36f0 t cz_ih_set_powergating_state +ffffffff81db3720 t cz_ih_get_wptr +ffffffff81db3810 t cz_ih_decode_iv +ffffffff81db3890 t cz_ih_set_rptr +ffffffff81db4000 T dce_v10_0_disable_dce +ffffffff81db4150 t dce_v10_0_early_init +ffffffff81db4210 t dce_v10_0_sw_init +ffffffff81db4510 t dce_v10_0_sw_fini +ffffffff81db4630 t dce_v10_0_hw_init +ffffffff81db4990 t dce_v10_0_hw_fini +ffffffff81db4b10 t dce_v10_0_suspend +ffffffff81db4b70 t dce_v10_0_resume +ffffffff81db4be0 t dce_v10_0_is_idle +ffffffff81db4c10 t dce_v10_0_wait_for_idle +ffffffff81db4c40 t dce_v10_0_check_soft_reset +ffffffff81db4c50 t dce_v10_0_soft_reset +ffffffff81db4d20 t dce_v10_0_set_clockgating_state +ffffffff81db4d50 t dce_v10_0_set_powergating_state +ffffffff81db4d80 t dce_v10_0_audio_endpt_rreg +ffffffff81db4e10 t dce_v10_0_audio_endpt_wreg +ffffffff81db4e90 t dce_v10_0_bandwidth_update +ffffffff81db5900 t dce_v10_0_vblank_get_counter +ffffffff81db5950 t dce_v10_0_hpd_sense +ffffffff81db59b0 t dce_v10_0_hpd_set_polarity +ffffffff81db5a80 t dce_v10_0_hpd_get_gpio_reg +ffffffff81db5ab0 t dce_v10_0_page_flip +ffffffff81db5bb0 t dce_v10_0_crtc_get_scanoutpos +ffffffff81db5c50 t dce_v10_0_encoder_add +ffffffff81db5ea0 t dce_v10_0_latency_watermark +ffffffff81db60d0 t dce_v10_0_encoder_destroy +ffffffff81db6130 t dce_v10_0_encoder_prepare +ffffffff81db6330 t dce_v10_0_encoder_commit +ffffffff81db6360 t dce_v10_0_encoder_mode_set +ffffffff81db72d0 t dce_v10_0_encoder_disable +ffffffff81db73e0 t dce_v10_0_ext_dpms +ffffffff81db7410 t dce_v10_0_ext_prepare +ffffffff81db7440 t dce_v10_0_ext_commit +ffffffff81db7470 t dce_v10_0_ext_mode_set +ffffffff81db74a0 t dce_v10_0_ext_disable +ffffffff81db74d0 t dce_v10_0_set_crtc_irq_state +ffffffff81db75b0 t dce_v10_0_crtc_irq +ffffffff81db77f0 t dce_v10_0_set_crtc_vblank_interrupt_state +ffffffff81db78c0 t dce_v10_0_set_crtc_vline_interrupt_state +ffffffff81db7990 t dce_v10_0_set_pageflip_irq_state +ffffffff81db7a40 t dce_v10_0_pageflip_irq +ffffffff81db7ba0 t dce_v10_0_set_hpd_irq_state +ffffffff81db7c70 t dce_v10_0_hpd_irq +ffffffff81db7d90 t dce_v10_0_afmt_init +ffffffff81db7ea0 t dce_v10_0_audio_init +ffffffff81db7f70 t dce_v10_0_crtc_cursor_set2 +ffffffff81db8230 t dce_v10_0_crtc_cursor_move +ffffffff81db8300 t dce_v10_0_crtc_gamma_set +ffffffff81db8340 t dce_v10_0_crtc_destroy +ffffffff81db8370 t amdgpu_bo_reserve +ffffffff81db8570 t amdgpu_bo_unreserve +ffffffff81db8650 t dce_v10_0_lock_cursor +ffffffff81db86b0 t dce_v10_0_cursor_move_locked +ffffffff81db8810 t dce_v10_0_show_cursor +ffffffff81db88b0 t dce_v10_0_crtc_load_lut +ffffffff81db8c40 t dce_v10_0_crtc_dpms +ffffffff81db8e20 t dce_v10_0_crtc_prepare +ffffffff81db8e60 t dce_v10_0_crtc_commit +ffffffff81db8e90 t dce_v10_0_crtc_mode_fixup +ffffffff81db9040 t dce_v10_0_crtc_mode_set +ffffffff81db9220 t dce_v10_0_crtc_set_base +ffffffff81db9240 t dce_v10_0_crtc_set_base_atomic +ffffffff81db9260 t dce_v10_0_crtc_disable +ffffffff81db93f0 t dce_v10_0_crtc_do_set_base +ffffffff81db9af0 t dce_v10_0_is_display_hung +ffffffff81dba000 T dce_v11_0_disable_dce +ffffffff81dba160 t dce_v11_0_early_init +ffffffff81dba290 t dce_v11_0_sw_init +ffffffff81dba590 t dce_v11_0_sw_fini +ffffffff81dba6b0 t dce_v11_0_hw_init +ffffffff81dbaa70 t dce_v11_0_hw_fini +ffffffff81dbabf0 t dce_v11_0_suspend +ffffffff81dbac50 t dce_v11_0_resume +ffffffff81dbacc0 t dce_v11_0_is_idle +ffffffff81dbacf0 t dce_v11_0_wait_for_idle +ffffffff81dbad20 t dce_v11_0_soft_reset +ffffffff81dbaf30 t dce_v11_0_set_clockgating_state +ffffffff81dbaf60 t dce_v11_0_set_powergating_state +ffffffff81dbaf90 t dce_v11_0_audio_endpt_rreg +ffffffff81dbb020 t dce_v11_0_audio_endpt_wreg +ffffffff81dbb0a0 t dce_v11_0_bandwidth_update +ffffffff81dbbb10 t dce_v11_0_vblank_get_counter +ffffffff81dbbb60 t dce_v11_0_hpd_sense +ffffffff81dbbbc0 t dce_v11_0_hpd_set_polarity +ffffffff81dbbc90 t dce_v11_0_hpd_get_gpio_reg +ffffffff81dbbcc0 t dce_v11_0_page_flip +ffffffff81dbbdc0 t dce_v11_0_crtc_get_scanoutpos +ffffffff81dbbe60 t dce_v11_0_encoder_add +ffffffff81dbc0b0 t dce_v11_0_latency_watermark +ffffffff81dbc2e0 t dce_v11_0_encoder_destroy +ffffffff81dbc340 t dce_v11_0_encoder_prepare +ffffffff81dbc540 t dce_v11_0_encoder_commit +ffffffff81dbc570 t dce_v11_0_encoder_mode_set +ffffffff81dbd4e0 t dce_v11_0_encoder_disable +ffffffff81dbd5f0 t dce_v11_0_ext_dpms +ffffffff81dbd620 t dce_v11_0_ext_prepare +ffffffff81dbd650 t dce_v11_0_ext_commit +ffffffff81dbd680 t dce_v11_0_ext_mode_set +ffffffff81dbd6b0 t dce_v11_0_ext_disable +ffffffff81dbd6e0 t dce_v11_0_set_crtc_irq_state +ffffffff81dbd7c0 t dce_v11_0_crtc_irq +ffffffff81dbd9e0 t dce_v11_0_set_crtc_vblank_interrupt_state +ffffffff81dbdab0 t dce_v11_0_set_crtc_vline_interrupt_state +ffffffff81dbdb80 t dce_v11_0_set_pageflip_irq_state +ffffffff81dbdc30 t dce_v11_0_pageflip_irq +ffffffff81dbdd90 t dce_v11_0_set_hpd_irq_state +ffffffff81dbde60 t dce_v11_0_hpd_irq +ffffffff81dbdf80 t dce_v11_0_afmt_init +ffffffff81dbe090 t dce_v11_0_audio_init +ffffffff81dbe190 t dce_v11_0_crtc_cursor_set2 +ffffffff81dbe450 t dce_v11_0_crtc_cursor_move +ffffffff81dbe520 t dce_v11_0_crtc_gamma_set +ffffffff81dbe560 t dce_v11_0_crtc_destroy +ffffffff81dbe590 t amdgpu_bo_reserve +ffffffff81dbe790 t amdgpu_bo_unreserve +ffffffff81dbe870 t dce_v11_0_lock_cursor +ffffffff81dbe8d0 t dce_v11_0_cursor_move_locked +ffffffff81dbea30 t dce_v11_0_show_cursor +ffffffff81dbead0 t dce_v11_0_crtc_load_lut +ffffffff81dbee30 t dce_v11_0_crtc_dpms +ffffffff81dbf010 t dce_v11_0_crtc_prepare +ffffffff81dbf050 t dce_v11_0_crtc_commit +ffffffff81dbf080 t dce_v11_0_crtc_mode_fixup +ffffffff81dbf2f0 t dce_v11_0_crtc_mode_set +ffffffff81dbf550 t dce_v11_0_crtc_set_base +ffffffff81dbf570 t dce_v11_0_crtc_set_base_atomic +ffffffff81dbf590 t dce_v11_0_crtc_disable +ffffffff81dbf730 t dce_v11_0_crtc_do_set_base +ffffffff81dc0000 t df_v1_7_sw_init +ffffffff81dc0040 t df_v1_7_sw_fini +ffffffff81dc0070 t df_v1_7_enable_broadcast_mode +ffffffff81dc0190 t df_v1_7_get_fb_channel_number +ffffffff81dc0210 t df_v1_7_get_hbm_channel_number +ffffffff81dc0260 t df_v1_7_update_medium_grain_clock_gating +ffffffff81dc03d0 t df_v1_7_get_clockgating_state +ffffffff81dc0460 t df_v1_7_enable_ecc_force_par_wr_rmw +ffffffff81dc1000 t df_v3_6_sw_init +ffffffff81dc1150 t df_v3_6_sw_fini +ffffffff81dc1180 t df_v3_6_enable_broadcast_mode +ffffffff81dc12a0 t df_v3_6_get_fb_channel_number +ffffffff81dc1380 t df_v3_6_get_hbm_channel_number +ffffffff81dc13d0 t df_v3_6_update_medium_grain_clock_gating +ffffffff81dc1570 t df_v3_6_get_clockgating_state +ffffffff81dc1600 t df_v3_6_pmc_start +ffffffff81dc1900 t df_v3_6_pmc_stop +ffffffff81dc1ba0 t df_v3_6_pmc_get_count +ffffffff81dc1d30 t df_v3_6_get_fica +ffffffff81dc1e20 t df_v3_6_set_fica +ffffffff81dc1f00 t df_v3_6_query_ras_poison_mode +ffffffff81dc3000 T dimgrey_cavefish_reg_base_init +ffffffff81dc4000 T emu_soc_asic_init +ffffffff81dc5000 t gfx_v10_0_early_init +ffffffff81dc52f0 t gfx_v10_0_late_init +ffffffff81dc5360 t gfx_v10_0_sw_init +ffffffff81dc5890 t gfx_v10_0_sw_fini +ffffffff81dc5bd0 t gfx_v10_0_hw_init +ffffffff81dc8740 t gfx_v10_0_hw_fini +ffffffff81dc8a30 t gfx_v10_0_suspend +ffffffff81dc8a70 t gfx_v10_0_resume +ffffffff81dc8a80 t gfx_v10_0_is_idle +ffffffff81dc8b10 t gfx_v10_0_wait_for_idle +ffffffff81dc8bf0 t gfx_v10_0_soft_reset +ffffffff81dc8f40 t gfx_v10_0_set_clockgating_state +ffffffff81dc91e0 t gfx_v10_0_set_powergating_state +ffffffff81dc92a0 t gfx_v10_0_get_clockgating_state +ffffffff81dc93b0 t gfx10_kiq_set_resources +ffffffff81dc96d0 t gfx10_kiq_map_queues +ffffffff81dc9a60 t gfx10_kiq_unmap_queues +ffffffff81dc9e60 t gfx10_kiq_query_status +ffffffff81dca150 t gfx10_kiq_invalidate_tlbs +ffffffff81dca270 t gfx_v10_0_ring_get_rptr_compute +ffffffff81dca2a0 t gfx_v10_0_ring_get_wptr_compute +ffffffff81dca310 t gfx_v10_0_ring_set_wptr_compute +ffffffff81dca450 t gfx_v10_0_ring_emit_ib_compute +ffffffff81dca790 t gfx_v10_0_ring_emit_fence_kiq +ffffffff81dcabd0 t gfx_v10_0_ring_test_ring +ffffffff81dcae30 t gfx_v10_0_ring_test_ib +ffffffff81dcb0c0 t gfx_v10_0_ring_emit_rreg +ffffffff81dcb350 t gfx_v10_0_ring_emit_wreg +ffffffff81dcb580 t gfx_v10_0_ring_emit_reg_wait +ffffffff81dcb5d0 t gfx_v10_0_ring_emit_reg_write_reg_wait +ffffffff81dcb660 t gfx_v10_0_wait_reg_mem +ffffffff81dcb990 t gfx_v10_0_ring_get_rptr_gfx +ffffffff81dcb9c0 t gfx_v10_0_ring_get_wptr_gfx +ffffffff81dcbad0 t gfx_v10_0_ring_set_wptr_gfx +ffffffff81dcbce0 t gfx_v10_0_ring_emit_ib_gfx +ffffffff81dcc380 t gfx_v10_0_ring_emit_fence +ffffffff81dcc750 t gfx_v10_0_ring_emit_pipeline_sync +ffffffff81dcc7b0 t gfx_v10_0_ring_emit_vm_flush +ffffffff81dcc980 t gfx_v10_0_ring_emit_hdp_flush +ffffffff81dcca50 t gfx_v10_0_ring_emit_gds_switch +ffffffff81dccb30 t gfx_v10_0_ring_emit_init_cond_exec +ffffffff81dccd60 t gfx_v10_0_ring_emit_patch_cond_exec +ffffffff81dcce20 t gfx_v10_0_ring_emit_sb +ffffffff81dccf10 t gfx_v10_0_ring_emit_cntxcntl +ffffffff81dcd400 t gfx_v10_0_ring_emit_frame_cntl +ffffffff81dcd510 t gfx_v10_0_ring_soft_recovery +ffffffff81dcd580 t gfx_v10_0_ring_preempt_ib +ffffffff81dcd6f0 t gfx_v10_0_emit_mem_sync +ffffffff81dcda20 t gfx_v10_0_write_data_to_reg +ffffffff81dcdc30 t gfx_v10_0_set_eop_interrupt_state +ffffffff81dcdd10 t gfx_v10_0_eop_irq +ffffffff81dcded0 t gfx_v10_0_set_gfx_eop_interrupt_state +ffffffff81dce060 t gfx_v10_0_set_compute_eop_interrupt_state +ffffffff81dce210 t gfx_v10_0_kiq_set_interrupt_state +ffffffff81dce4f0 t gfx_v10_0_kiq_irq +ffffffff81dce570 t gfx_v10_0_set_priv_reg_fault_state +ffffffff81dce690 t gfx_v10_0_priv_reg_irq +ffffffff81dce6f0 t gfx_v10_0_handle_priv_fault +ffffffff81dce860 t gfx_v10_0_set_priv_inst_fault_state +ffffffff81dce980 t gfx_v10_0_priv_inst_irq +ffffffff81dce9e0 t gfx_v10_0_is_rlc_enabled +ffffffff81dcea60 t gfx_v10_0_set_safe_mode +ffffffff81dced00 t gfx_v10_0_unset_safe_mode +ffffffff81dcedb0 t gfx_v10_0_rlc_init +ffffffff81dcee30 t gfx_v10_0_get_csb_size +ffffffff81dcee60 t gfx_v10_0_get_csb_buffer +ffffffff81dcefd0 t gfx_v10_0_rlc_resume +ffffffff81dcfa00 t gfx_v10_0_rlc_stop +ffffffff81dcfae0 t gfx_v10_0_rlc_reset +ffffffff81dcfc80 t gfx_v10_0_rlc_start +ffffffff81dcfe20 t gfx_v10_0_update_spm_vmid +ffffffff81dcff50 t gfx_v10_0_wait_for_rlc_autoload_complete +ffffffff81dd0830 t gfx_v10_0_init_csb +ffffffff81dd0b00 t gfx_v10_0_rlc_backdoor_autoload_config_mec_cache +ffffffff81dd0db0 t gfx_v10_0_is_rlcg_access_range +ffffffff81dd0de0 t gfx_v10_0_gfx_mqd_init +ffffffff81dd11c0 t gfx_v10_0_compute_mqd_init +ffffffff81dd1660 t gfx_v10_0_me_init +ffffffff81dd1e50 t gfx_v10_0_mec_init +ffffffff81dd2060 t gfx_v10_0_compute_ring_init +ffffffff81dd21a0 t gfx_v10_0_rlc_backdoor_autoload_buffer_init +ffffffff81dd2400 t gfx_v10_0_gpu_early_init +ffffffff81dd2660 t amdgpu_bo_unreserve +ffffffff81dd2740 t gfx_v10_0_get_gpu_clock_counter +ffffffff81dd2c40 t gfx_v10_0_select_se_sh +ffffffff81dd2ce0 t gfx_v10_0_read_wave_data +ffffffff81dd2f40 t gfx_v10_0_read_wave_vgprs +ffffffff81dd2f70 t gfx_v10_0_read_wave_sgprs +ffffffff81dd2ff0 t gfx_v10_0_select_me_pipe_q +ffffffff81dd3010 t gfx_v10_0_init_spm_golden_registers +ffffffff81dd3080 t gfx_v10_0_update_perfmon_mgcg +ffffffff81dd31a0 t wave_read_ind +ffffffff81dd3280 t wave_read_regs +ffffffff81dd33e0 t gfx_v10_0_cp_resume +ffffffff81dd5f90 t gfx_v10_3_get_disabled_sa +ffffffff81dd60a0 t gfx_v10_0_get_rb_active_bitmap +ffffffff81dd61c0 t gfx_v10_0_get_wgp_active_bitmap_per_sh +ffffffff81dd62d0 t gfx_v10_0_enable_gui_idle_interrupt +ffffffff81dd63e0 t gfx_v10_0_cp_gfx_enable +ffffffff81dd6620 t gfx_v10_0_cp_compute_enable +ffffffff81dd67b0 t amdgpu_bo_reserve +ffffffff81dd6920 t gfx_v10_0_kiq_init_register +ffffffff81dd7760 t gfx_v10_0_cp_gfx_switch_pipe +ffffffff81dd7860 t gfx_v10_0_cp_gfx_set_doorbell +ffffffff81dd7b30 t gfx_v10_0_cp_gfx_start +ffffffff81dd8520 t gfx_v10_0_update_fine_grain_clock_gating +ffffffff81dd8850 t gfx_v10_0_update_medium_grain_clock_gating +ffffffff81dd8f60 t gfx_v10_0_update_3d_clock_gating +ffffffff81dd9330 t gfx_v10_0_update_coarse_grain_clock_gating +ffffffff81dd96f0 t gfx_v10_cntl_pg +ffffffff81dda000 t gfx_v11_0_early_init +ffffffff81dda270 t gfx_v11_0_late_init +ffffffff81dda2e0 t gfx_v11_0_sw_init +ffffffff81ddac90 t gfx_v11_0_sw_fini +ffffffff81ddaf60 t gfx_v11_0_hw_init +ffffffff81ddf450 t gfx_v11_0_hw_fini +ffffffff81ddf6c0 t gfx_v11_0_suspend +ffffffff81ddf700 t gfx_v11_0_resume +ffffffff81ddf710 t gfx_v11_0_is_idle +ffffffff81ddf7a0 t gfx_v11_0_wait_for_idle +ffffffff81ddf880 t gfx_v11_0_check_soft_reset +ffffffff81ddf9b0 t gfx_v11_0_soft_reset +ffffffff81de0670 t gfx_v11_0_post_soft_reset +ffffffff81de0680 t gfx_v11_0_set_clockgating_state +ffffffff81de1260 t gfx_v11_0_set_powergating_state +ffffffff81de1300 t gfx_v11_0_get_clockgating_state +ffffffff81de14d0 t gfx11_kiq_set_resources +ffffffff81de17f0 t gfx11_kiq_map_queues +ffffffff81de1b80 t gfx11_kiq_unmap_queues +ffffffff81de1f80 t gfx11_kiq_query_status +ffffffff81de2270 t gfx11_kiq_invalidate_tlbs +ffffffff81de2390 t gfx_v11_0_ring_get_rptr_compute +ffffffff81de23c0 t gfx_v11_0_ring_get_wptr_compute +ffffffff81de2430 t gfx_v11_0_ring_set_wptr_compute +ffffffff81de2580 t gfx_v11_0_ring_emit_ib_compute +ffffffff81de28c0 t gfx_v11_0_ring_emit_fence_kiq +ffffffff81de2cf0 t gfx_v11_0_ring_test_ring +ffffffff81de2f70 t gfx_v11_0_ring_test_ib +ffffffff81de3210 t gfx_v11_0_ring_emit_rreg +ffffffff81de34a0 t gfx_v11_0_ring_emit_wreg +ffffffff81de36d0 t gfx_v11_0_ring_emit_reg_wait +ffffffff81de3720 t gfx_v11_0_ring_emit_reg_write_reg_wait +ffffffff81de3790 t gfx_v11_0_wait_reg_mem +ffffffff81de3ac0 t gfx_v11_0_ring_get_rptr_gfx +ffffffff81de3af0 t gfx_v11_0_ring_get_wptr_gfx +ffffffff81de3c00 t gfx_v11_0_ring_set_wptr_gfx +ffffffff81de3e10 t gfx_v11_0_ring_emit_ib_gfx +ffffffff81de44a0 t gfx_v11_0_ring_emit_fence +ffffffff81de4870 t gfx_v11_0_ring_emit_pipeline_sync +ffffffff81de48d0 t gfx_v11_0_ring_emit_vm_flush +ffffffff81de4aa0 t gfx_v11_0_ring_emit_hdp_flush +ffffffff81de4b70 t gfx_v11_0_ring_emit_gds_switch +ffffffff81de4c50 t gfx_v11_0_ring_emit_init_cond_exec +ffffffff81de4e80 t gfx_v11_0_ring_emit_patch_cond_exec +ffffffff81de4f40 t gfx_v11_0_ring_emit_cntxcntl +ffffffff81de50a0 t gfx_v11_0_ring_emit_frame_cntl +ffffffff81de51b0 t gfx_v11_0_ring_soft_recovery +ffffffff81de5220 t gfx_v11_0_ring_preempt_ib +ffffffff81de5390 t gfx_v11_0_emit_mem_sync +ffffffff81de56c0 t gfx_v11_0_write_data_to_reg +ffffffff81de58d0 t gfx_v11_0_set_eop_interrupt_state +ffffffff81de5960 t gfx_v11_0_eop_irq +ffffffff81de5b20 t gfx_v11_0_set_gfx_eop_interrupt_state +ffffffff81de5cb0 t gfx_v11_0_set_compute_eop_interrupt_state +ffffffff81de5e40 t gfx_v11_0_set_priv_reg_fault_state +ffffffff81de5f60 t gfx_v11_0_priv_reg_irq +ffffffff81de5fc0 t gfx_v11_0_handle_priv_fault +ffffffff81de6130 t gfx_v11_0_set_priv_inst_fault_state +ffffffff81de6250 t gfx_v11_0_priv_inst_irq +ffffffff81de62b0 t gfx_v11_0_is_rlc_enabled +ffffffff81de6330 t gfx_v11_0_set_safe_mode +ffffffff81de6480 t gfx_v11_0_unset_safe_mode +ffffffff81de64f0 t gfx_v11_0_rlc_init +ffffffff81de6570 t gfx_v11_0_get_csb_size +ffffffff81de65a0 t gfx_v11_0_get_csb_buffer +ffffffff81de6710 t gfx_v11_0_rlc_resume +ffffffff81de7430 t gfx_v11_0_rlc_stop +ffffffff81de7510 t gfx_v11_0_rlc_reset +ffffffff81de76b0 t gfx_v11_0_rlc_start +ffffffff81de7850 t gfx_v11_0_update_spm_vmid +ffffffff81de7950 t gfx_v11_0_init_csb +ffffffff81de7ad0 t gfx_v11_0_gfx_mqd_init +ffffffff81de7ea0 t gfx_v11_0_compute_mqd_init +ffffffff81de83c0 t gfx_v11_0_mec_init +ffffffff81de8500 t gfx_v11_0_compute_ring_init +ffffffff81de8640 t gfx_v11_0_init_toc_microcode +ffffffff81de87e0 t gfx_v11_0_rlc_autoload_buffer_init +ffffffff81de89d0 t gfx_v11_0_gpu_early_init +ffffffff81de8a70 t amdgpu_bo_unreserve +ffffffff81de8b50 t gfx_v11_0_get_gpu_clock_counter +ffffffff81de8eb0 t gfx_v11_0_select_se_sh +ffffffff81de8f50 t gfx_v11_0_read_wave_data +ffffffff81de9190 t gfx_v11_0_read_wave_vgprs +ffffffff81de91c0 t gfx_v11_0_read_wave_sgprs +ffffffff81de9240 t gfx_v11_0_select_me_pipe_q +ffffffff81de9260 t gfx_v11_0_update_perf_clk +ffffffff81de9390 t wave_read_ind +ffffffff81de9470 t wave_read_regs +ffffffff81de95d0 t gfx_v11_0_disable_gpa_mode +ffffffff81de9760 t gfx_v11_0_cp_resume +ffffffff81ded690 t gfx_v11_0_config_me_cache +ffffffff81deda30 t gfx_v11_0_config_pfp_cache +ffffffff81deddd0 t gfx_v11_0_config_mec_cache +ffffffff81dee170 t gfx_v11_0_enable_gui_idle_interrupt +ffffffff81dee280 t gfx_v11_0_cp_compute_enable +ffffffff81dee450 t gfx_v11_0_cp_gfx_enable +ffffffff81dee640 t amdgpu_bo_reserve +ffffffff81dee7b0 t gfx_v11_0_kiq_init_register +ffffffff81def600 t gfx_v11_0_cp_gfx_switch_pipe +ffffffff81def6e0 t gfx_v11_0_cp_gfx_set_doorbell +ffffffff81def8c0 t gfx_v11_0_cp_gfx_start +ffffffff81df0140 t gfx_v11_cntl_pg +ffffffff81df1000 t gfx_v8_0_early_init +ffffffff81df11f0 t gfx_v8_0_late_init +ffffffff81df1920 t gfx_v8_0_sw_init +ffffffff81df1d10 t gfx_v8_0_sw_fini +ffffffff81df1fd0 t gfx_v8_0_hw_init +ffffffff81df41c0 t gfx_v8_0_hw_fini +ffffffff81df46b0 t gfx_v8_0_suspend +ffffffff81df46f0 t gfx_v8_0_resume +ffffffff81df4700 t gfx_v8_0_is_idle +ffffffff81df4770 t gfx_v8_0_wait_for_idle +ffffffff81df4820 t gfx_v8_0_check_soft_reset +ffffffff81df4900 t gfx_v8_0_pre_soft_reset +ffffffff81df4a80 t gfx_v8_0_soft_reset +ffffffff81df4c40 t gfx_v8_0_post_soft_reset +ffffffff81df4de0 t gfx_v8_0_set_clockgating_state +ffffffff81df5060 t gfx_v8_0_set_powergating_state +ffffffff81df5410 t gfx_v8_0_get_clockgating_state +ffffffff81df54f0 t gfx_v8_0_get_gpu_clock_counter +ffffffff81df5590 t gfx_v8_0_select_se_sh +ffffffff81df55f0 t gfx_v8_0_read_wave_data +ffffffff81df5a90 t gfx_v8_0_read_wave_sgprs +ffffffff81df5b40 t gfx_v8_0_select_me_pipe_q +ffffffff81df5b60 t gfx_v8_0_ring_get_rptr +ffffffff81df5b90 t gfx_v8_0_ring_get_wptr_compute +ffffffff81df5bc0 t gfx_v8_0_ring_set_wptr_compute +ffffffff81df5c00 t gfx_v8_0_ring_emit_fence_kiq +ffffffff81df6020 t gfx_v8_0_ring_test_ring +ffffffff81df6220 t gfx_v8_0_ring_emit_rreg +ffffffff81df64b0 t gfx_v8_0_ring_emit_wreg +ffffffff81df66e0 t gfx_v8_0_ring_get_wptr_gfx +ffffffff81df6740 t gfx_v8_0_ring_set_wptr_gfx +ffffffff81df67b0 t gfx_v8_0_ring_emit_ib_gfx +ffffffff81df6d10 t gfx_v8_0_ring_emit_fence_gfx +ffffffff81df7200 t gfx_v8_0_ring_emit_pipeline_sync +ffffffff81df74f0 t gfx_v8_0_ring_emit_vm_flush +ffffffff81df78a0 t gfx_v8_0_ring_emit_hdp_flush +ffffffff81df7bc0 t gfx_v8_0_ring_emit_gds_switch +ffffffff81df8370 t gfx_v8_0_ring_test_ib +ffffffff81df8520 t gfx_v8_0_ring_emit_init_cond_exec +ffffffff81df8750 t gfx_v8_0_ring_emit_patch_cond_exec +ffffffff81df8800 t gfx_v8_ring_emit_sb +ffffffff81df88f0 t gfx_v8_ring_emit_cntxcntl +ffffffff81df8e90 t gfx_v8_0_ring_soft_recovery +ffffffff81df8ec0 t gfx_v8_0_emit_mem_sync +ffffffff81df90c0 t gfx_v8_0_ring_emit_ib_compute +ffffffff81df93c0 t gfx_v8_0_ring_emit_fence_compute +ffffffff81df96c0 t gfx_v8_0_emit_mem_sync_compute +ffffffff81df9980 t gfx_v8_0_emit_wave_limit +ffffffff81df9b30 t gfx_v8_0_set_eop_interrupt_state +ffffffff81df9d40 t gfx_v8_0_eop_irq +ffffffff81df9e70 t gfx_v8_0_set_priv_reg_fault_state +ffffffff81df9ef0 t gfx_v8_0_priv_reg_irq +ffffffff81dfa010 t gfx_v8_0_set_priv_inst_fault_state +ffffffff81dfa090 t gfx_v8_0_priv_inst_irq +ffffffff81dfa1b0 t gfx_v8_0_set_cp_ecc_int_state +ffffffff81dfa410 t gfx_v8_0_cp_ecc_error_irq +ffffffff81dfa460 t gfx_v8_0_set_sq_int_state +ffffffff81dfa4f0 t gfx_v8_0_sq_irq +ffffffff81dfa590 t gfx_v8_0_parse_sq_irq +ffffffff81dfa7e0 t gfx_v8_0_is_rlc_enabled +ffffffff81dfa820 t gfx_v8_0_set_safe_mode +ffffffff81dfa920 t gfx_v8_0_unset_safe_mode +ffffffff81dfa9c0 t gfx_v8_0_rlc_init +ffffffff81dfaa70 t gfx_v8_0_get_csb_size +ffffffff81dfaaa0 t gfx_v8_0_get_csb_buffer +ffffffff81dfac10 t gfx_v8_0_cp_jump_table_num +ffffffff81dfac50 t gfx_v8_0_rlc_resume +ffffffff81dfafd0 t gfx_v8_0_rlc_stop +ffffffff81dfb040 t gfx_v8_0_rlc_reset +ffffffff81dfb0c0 t gfx_v8_0_rlc_start +ffffffff81dfb140 t gfx_v8_0_update_spm_vmid +ffffffff81dfb1b0 t gfx_v8_0_init_save_restore_list +ffffffff81dfb5c0 t gfx_v8_0_wait_for_rlc_serdes +ffffffff81dfb7e0 t gfx_v8_0_sq_irq_work_func +ffffffff81dfb800 t gfx_v8_0_init_microcode +ffffffff81dfc2e0 t gfx_v8_0_mec_init +ffffffff81dfc3e0 t gfx_v8_0_compute_ring_init +ffffffff81dfc520 t gfx_v8_0_gpu_early_init +ffffffff81dfc9c0 t request_firmware +ffffffff81dfca50 t amdgpu_bo_unreserve +ffffffff81dfcb30 t gfx_v8_0_kiq_resume +ffffffff81dfcd90 t gfx_v8_0_cp_gfx_resume +ffffffff81dfd870 t gfx_v8_0_kcq_resume +ffffffff81dfe2c0 t amdgpu_bo_reserve +ffffffff81dfe430 t gfx_v8_0_mqd_commit +ffffffff81dfe610 t gfx_v8_0_mqd_init +ffffffff81dfea30 t gfx_v8_0_deactivate_hqd +ffffffff81dfeaf0 t gfx_v8_0_update_medium_grain_clock_gating +ffffffff81dfee20 t gfx_v8_0_update_coarse_grain_clock_gating +ffffffff81e00000 t gfx_v9_0_ras_error_inject +ffffffff81e001a0 t gfx_v9_0_query_ras_error_count +ffffffff81e00d40 t gfx_v9_0_reset_ras_error_count +ffffffff81e01740 T gfx_v9_0_select_se_sh +ffffffff81e017e0 t gfx_v9_0_early_init +ffffffff81e01b10 t gfx_v9_0_late_init +ffffffff81e028e0 t gfx_v9_0_sw_init +ffffffff81e02d80 t gfx_v9_0_sw_fini +ffffffff81e03030 t gfx_v9_0_hw_init +ffffffff81e06080 t gfx_v9_0_hw_fini +ffffffff81e067f0 t gfx_v9_0_suspend +ffffffff81e06830 t gfx_v9_0_resume +ffffffff81e06840 t gfx_v9_0_is_idle +ffffffff81e068c0 t gfx_v9_0_wait_for_idle +ffffffff81e069a0 t gfx_v9_0_soft_reset +ffffffff81e06d30 t gfx_v9_0_set_clockgating_state +ffffffff81e06e00 t gfx_v9_0_set_powergating_state +ffffffff81e071e0 t gfx_v9_0_get_clockgating_state +ffffffff81e072f0 t gfx_v9_0_kiq_set_resources +ffffffff81e07610 t gfx_v9_0_kiq_map_queues +ffffffff81e07950 t gfx_v9_0_kiq_unmap_queues +ffffffff81e07cd0 t gfx_v9_0_kiq_query_status +ffffffff81e07fc0 t gfx_v9_0_kiq_invalidate_tlbs +ffffffff81e080e0 t gfx_v9_0_ring_get_rptr_compute +ffffffff81e08110 t gfx_v9_0_ring_get_wptr_compute +ffffffff81e08180 t gfx_v9_0_ring_set_wptr_compute +ffffffff81e081e0 t gfx_v9_0_ring_emit_fence_kiq +ffffffff81e08610 t gfx_v9_0_ring_test_ring +ffffffff81e08840 t gfx_v9_0_ring_emit_rreg +ffffffff81e08ad0 t gfx_v9_0_ring_emit_wreg +ffffffff81e08d00 t gfx_v9_0_ring_emit_reg_wait +ffffffff81e08d50 t gfx_v9_0_ring_emit_reg_write_reg_wait +ffffffff81e08df0 t gfx_v9_0_wait_reg_mem +ffffffff81e09120 t gfx_v9_0_ring_get_rptr_gfx +ffffffff81e09150 t gfx_v9_0_ring_get_wptr_gfx +ffffffff81e09260 t gfx_v9_0_ring_set_wptr_gfx +ffffffff81e09390 t gfx_v9_0_ring_emit_ib_gfx +ffffffff81e098c0 t gfx_v9_0_ring_emit_fence +ffffffff81e09c70 t gfx_v9_0_ring_emit_pipeline_sync +ffffffff81e09cd0 t gfx_v9_0_ring_emit_vm_flush +ffffffff81e09de0 t gfx_v9_0_ring_emit_hdp_flush +ffffffff81e09eb0 t gfx_v9_0_ring_emit_gds_switch +ffffffff81e09f90 t gfx_v9_0_ring_test_ib +ffffffff81e0a140 t gfx_v9_0_ring_emit_init_cond_exec +ffffffff81e0a370 t gfx_v9_0_ring_emit_patch_cond_exec +ffffffff81e0a430 t gfx_v9_ring_emit_sb +ffffffff81e0a520 t gfx_v9_ring_emit_cntxcntl +ffffffff81e0a910 t gfx_v9_0_ring_emit_frame_cntl +ffffffff81e0aa20 t gfx_v9_0_ring_soft_recovery +ffffffff81e0aa90 t gfx_v9_0_emit_mem_sync +ffffffff81e0ad50 t gfx_v9_0_write_data_to_reg +ffffffff81e0af60 t gfx_v9_0_ring_emit_ib_compute +ffffffff81e0b290 t gfx_v9_0_emit_wave_limit +ffffffff81e0b470 t gfx_v9_0_set_eop_interrupt_state +ffffffff81e0b640 t gfx_v9_0_eop_irq +ffffffff81e0b770 t gfx_v9_0_set_compute_eop_interrupt_state +ffffffff81e0b920 t gfx_v9_0_set_priv_reg_fault_state +ffffffff81e0ba40 t gfx_v9_0_priv_reg_irq +ffffffff81e0bb60 t gfx_v9_0_set_priv_inst_fault_state +ffffffff81e0bc80 t gfx_v9_0_priv_inst_irq +ffffffff81e0bda0 t gfx_v9_0_set_cp_ecc_error_state +ffffffff81e0c5d0 t gfx_v9_0_is_rlc_enabled +ffffffff81e0c650 t gfx_v9_0_set_safe_mode +ffffffff81e0c7a0 t gfx_v9_0_unset_safe_mode +ffffffff81e0c810 t gfx_v9_0_rlc_init +ffffffff81e0d020 t gfx_v9_0_get_csb_size +ffffffff81e0d050 t gfx_v9_0_get_csb_buffer +ffffffff81e0d190 t gfx_v9_0_cp_jump_table_num +ffffffff81e0d1e0 t gfx_v9_0_rlc_resume +ffffffff81e0df70 t gfx_v9_0_rlc_stop +ffffffff81e0e400 t gfx_v9_0_rlc_reset +ffffffff81e0e590 t gfx_v9_0_rlc_start +ffffffff81e0e6d0 t gfx_v9_0_update_spm_vmid +ffffffff81e0e800 t gfx_v9_0_is_rlcg_access_range +ffffffff81e0e850 t gfx_v9_0_init_always_on_cu_mask +ffffffff81e0eb80 t gfx_v9_0_init_csb +ffffffff81e0ed10 t gfx_v9_0_enable_lbpw +ffffffff81e0ee00 t gfx_v9_0_enable_gui_idle_interrupt +ffffffff81e0ef00 t gfx_v9_0_init_microcode +ffffffff81e0fa30 t gfx_v9_0_mec_init +ffffffff81e0fc20 t gfx_v9_0_compute_ring_init +ffffffff81e0fd60 t gfx_v9_0_gpu_early_init +ffffffff81e10260 t request_firmware +ffffffff81e102f0 t amdgpu_bo_unreserve +ffffffff81e103d0 t gfx_v9_0_get_gpu_clock_counter +ffffffff81e10b50 t gfx_v9_0_read_wave_data +ffffffff81e10d90 t gfx_v9_0_read_wave_vgprs +ffffffff81e10db0 t gfx_v9_0_read_wave_sgprs +ffffffff81e10e00 t gfx_v9_0_select_me_pipe_q +ffffffff81e10e20 t wave_read_ind +ffffffff81e10f10 t wave_read_regs +ffffffff81e11060 t gfx_v9_0_cp_gfx_enable +ffffffff81e11140 t amdgpu_bo_reserve +ffffffff81e112b0 t gfx_v9_0_kiq_init_register +ffffffff81e11f30 t gfx_v9_0_mqd_init +ffffffff81e12470 t gfx_v9_0_update_medium_grain_clock_gating +ffffffff81e12980 t gfx_v9_0_update_3d_clock_gating +ffffffff81e12d60 t gfx_v9_0_update_coarse_grain_clock_gating +ffffffff81e14000 t gfx_v9_4_ras_error_inject +ffffffff81e14130 t gfx_v9_4_query_ras_error_count +ffffffff81e14ef0 t gfx_v9_4_query_ras_error_status +ffffffff81e150b0 t gfx_v9_4_reset_ras_error_count +ffffffff81e16000 T gfx_v9_4_2_do_edc_gpr_workarounds +ffffffff81e16760 T gfx_v9_4_2_init_golden_registers +ffffffff81e167f0 T gfx_v9_4_2_debug_trap_config_init +ffffffff81e16890 T gfx_v9_4_2_set_power_brake_sequence +ffffffff81e16a60 t gfx_v9_4_2_ras_error_inject +ffffffff81e16b90 t gfx_v9_4_2_query_ras_error_count +ffffffff81e16c40 t gfx_v9_4_2_query_ras_error_status +ffffffff81e17480 t gfx_v9_4_2_reset_ras_error_count +ffffffff81e174e0 t gfx_v9_4_2_reset_ras_error_status +ffffffff81e179a0 t gfx_v9_4_2_enable_watchdog_timer +ffffffff81e17bc0 t gfx_v9_4_2_query_uctl2_poison_status +ffffffff81e17c40 t gfx_v9_4_2_run_shader +ffffffff81e18040 t gfx_v9_4_2_wait_for_waves_assigned +ffffffff81e18690 t gfx_v9_4_2_query_sram_edc_count +ffffffff81e189d0 t gfx_v9_4_2_query_utc_edc_count +ffffffff81e18ba0 t wave_read_ind +ffffffff81e19000 t gfxhub_v1_0_get_mc_fb_offset +ffffffff81e19090 t gfxhub_v1_0_setup_vm_pt_regs +ffffffff81e191d0 t gfxhub_v1_0_gart_enable +ffffffff81e1a670 t gfxhub_v1_0_gart_disable +ffffffff81e1a900 t gfxhub_v1_0_set_fault_enable_default +ffffffff81e1a9f0 t gfxhub_v1_0_init +ffffffff81e1b000 T gfxhub_v1_1_get_xgmi_info +ffffffff81e1c000 t gfxhub_v2_0_get_fb_location +ffffffff81e1c090 t gfxhub_v2_0_get_mc_fb_offset +ffffffff81e1c120 t gfxhub_v2_0_setup_vm_pt_regs +ffffffff81e1c260 t gfxhub_v2_0_gart_enable +ffffffff81e1d420 t gfxhub_v2_0_gart_disable +ffffffff81e1d660 t gfxhub_v2_0_set_fault_enable_default +ffffffff81e1d750 t gfxhub_v2_0_init +ffffffff81e1d820 t gfxhub_v2_0_print_l2_protection_fault_status +ffffffff81e1d9f0 t gfxhub_v2_0_get_invalidate_req +ffffffff81e1e000 t gfxhub_v2_1_get_fb_location +ffffffff81e1e090 t gfxhub_v2_1_get_mc_fb_offset +ffffffff81e1e120 t gfxhub_v2_1_setup_vm_pt_regs +ffffffff81e1e260 t gfxhub_v2_1_gart_enable +ffffffff81e1f4f0 t gfxhub_v2_1_gart_disable +ffffffff81e1f770 t gfxhub_v2_1_set_fault_enable_default +ffffffff81e1f880 t gfxhub_v2_1_init +ffffffff81e1f950 t gfxhub_v2_1_get_xgmi_info +ffffffff81e1fa80 t gfxhub_v2_1_utcl2_harvest +ffffffff81e1fc60 t gfxhub_v2_1_save_regs +ffffffff81e20690 t gfxhub_v2_1_restore_regs +ffffffff81e21260 t gfxhub_v2_1_halt +ffffffff81e21620 t gfxhub_v2_1_print_l2_protection_fault_status +ffffffff81e217f0 t gfxhub_v2_1_get_invalidate_req +ffffffff81e22000 t gfxhub_v3_0_get_fb_location +ffffffff81e22090 t gfxhub_v3_0_get_mc_fb_offset +ffffffff81e22120 t gfxhub_v3_0_setup_vm_pt_regs +ffffffff81e22260 t gfxhub_v3_0_gart_enable +ffffffff81e234a0 t gfxhub_v3_0_gart_disable +ffffffff81e23720 t gfxhub_v3_0_set_fault_enable_default +ffffffff81e23ac0 t gfxhub_v3_0_init +ffffffff81e23b90 t gfxhub_v3_0_print_l2_protection_fault_status +ffffffff81e23d60 t gfxhub_v3_0_get_invalidate_req +ffffffff81e24000 t gfxhub_v3_0_3_get_fb_location +ffffffff81e24090 t gfxhub_v3_0_3_get_mc_fb_offset +ffffffff81e24120 t gfxhub_v3_0_3_setup_vm_pt_regs +ffffffff81e24260 t gfxhub_v3_0_3_gart_enable +ffffffff81e254b0 t gfxhub_v3_0_3_gart_disable +ffffffff81e25740 t gfxhub_v3_0_3_set_fault_enable_default +ffffffff81e25850 t gfxhub_v3_0_3_init +ffffffff81e25920 t gfxhub_v3_0_3_print_l2_protection_fault_status +ffffffff81e25af0 t gfxhub_v3_0_3_get_invalidate_req +ffffffff81e26000 t gmc_v10_0_early_init +ffffffff81e261e0 t gmc_v10_0_late_init +ffffffff81e26250 t gmc_v10_0_sw_init +ffffffff81e26630 t gmc_v10_0_sw_fini +ffffffff81e26680 t gmc_v10_0_hw_init +ffffffff81e26840 t gmc_v10_0_hw_fini +ffffffff81e268d0 t gmc_v10_0_suspend +ffffffff81e26960 t gmc_v10_0_resume +ffffffff81e269c0 t gmc_v10_0_is_idle +ffffffff81e269f0 t gmc_v10_0_wait_for_idle +ffffffff81e26a20 t gmc_v10_0_soft_reset +ffffffff81e26a50 t gmc_v10_0_set_clockgating_state +ffffffff81e26b00 t gmc_v10_0_set_powergating_state +ffffffff81e26b30 t gmc_v10_0_get_clockgating_state +ffffffff81e26bd0 t gmc_v10_0_flush_gpu_tlb +ffffffff81e26e80 t gmc_v10_0_flush_gpu_tlb_pasid +ffffffff81e270a0 t gmc_v10_0_emit_flush_gpu_tlb +ffffffff81e27260 t gmc_v10_0_emit_pasid_mapping +ffffffff81e272d0 t gmc_v10_0_map_mtype +ffffffff81e27320 t gmc_v10_0_get_vm_pde +ffffffff81e27410 t gmc_v10_0_get_vm_pte +ffffffff81e274c0 t gmc_v10_0_get_vbios_fb_size +ffffffff81e27630 t gmc_v10_0_flush_vm_hub +ffffffff81e27a60 t gmc_v10_0_vm_fault_interrupt_state +ffffffff81e27ad0 t gmc_v10_0_process_interrupt +ffffffff81e27d90 t gmc_v10_0_ecc_interrupt_state +ffffffff81e27dc0 t gmc_v10_0_gart_init +ffffffff81e28000 t gmc_v11_0_early_init +ffffffff81e28210 t gmc_v11_0_late_init +ffffffff81e28280 t gmc_v11_0_sw_init +ffffffff81e28570 t gmc_v11_0_sw_fini +ffffffff81e285c0 t gmc_v11_0_hw_init +ffffffff81e28700 t gmc_v11_0_hw_fini +ffffffff81e28780 t gmc_v11_0_suspend +ffffffff81e28800 t gmc_v11_0_resume +ffffffff81e28860 t gmc_v11_0_is_idle +ffffffff81e28890 t gmc_v11_0_wait_for_idle +ffffffff81e288c0 t gmc_v11_0_soft_reset +ffffffff81e288f0 t gmc_v11_0_set_clockgating_state +ffffffff81e28970 t gmc_v11_0_set_powergating_state +ffffffff81e289a0 t gmc_v11_0_get_clockgating_state +ffffffff81e289e0 t gmc_v11_0_flush_gpu_tlb +ffffffff81e28e80 t gmc_v11_0_flush_gpu_tlb_pasid +ffffffff81e29070 t gmc_v11_0_emit_flush_gpu_tlb +ffffffff81e29220 t gmc_v11_0_emit_pasid_mapping +ffffffff81e29290 t gmc_v11_0_map_mtype +ffffffff81e292e0 t gmc_v11_0_get_vm_pde +ffffffff81e293e0 t gmc_v11_0_get_vm_pte +ffffffff81e29490 t gmc_v11_0_get_vbios_fb_size +ffffffff81e29600 t gmc_v11_0_vm_fault_interrupt_state +ffffffff81e29670 t gmc_v11_0_process_interrupt +ffffffff81e29890 t gmc_v11_0_ecc_interrupt_state +ffffffff81e298c0 t gmc_v11_0_gart_init +ffffffff81e2a000 t gmc_v7_0_early_init +ffffffff81e2a090 t gmc_v7_0_late_init +ffffffff81e2a0e0 t gmc_v7_0_sw_init +ffffffff81e2a5a0 t gmc_v7_0_sw_fini +ffffffff81e2a650 t gmc_v7_0_hw_init +ffffffff81e2afc0 t gmc_v7_0_hw_fini +ffffffff81e2b080 t gmc_v7_0_suspend +ffffffff81e2b0c0 t gmc_v7_0_resume +ffffffff81e2b120 t gmc_v7_0_is_idle +ffffffff81e2b170 t gmc_v7_0_wait_for_idle +ffffffff81e2b210 t gmc_v7_0_soft_reset +ffffffff81e2b470 t gmc_v7_0_set_clockgating_state +ffffffff81e2b6d0 t gmc_v7_0_set_powergating_state +ffffffff81e2b700 t gmc_v7_0_flush_gpu_tlb +ffffffff81e2b730 t gmc_v7_0_flush_gpu_tlb_pasid +ffffffff81e2b7f0 t gmc_v7_0_emit_flush_gpu_tlb +ffffffff81e2b890 t gmc_v7_0_emit_pasid_mapping +ffffffff81e2b8c0 t gmc_v7_0_set_prt +ffffffff81e2ba80 t gmc_v7_0_get_vm_pde +ffffffff81e2bae0 t gmc_v7_0_get_vm_pte +ffffffff81e2bb20 t gmc_v7_0_get_vbios_fb_size +ffffffff81e2bb90 t gmc_v7_0_vm_fault_interrupt_state +ffffffff81e2bc60 t gmc_v7_0_process_interrupt +ffffffff81e2bf00 t gmc_v7_0_gart_init +ffffffff81e2c000 t gmc_v8_0_early_init +ffffffff81e2c090 t gmc_v8_0_late_init +ffffffff81e2c0e0 t gmc_v8_0_sw_init +ffffffff81e2c720 t gmc_v8_0_sw_fini +ffffffff81e2c7d0 t gmc_v8_0_hw_init +ffffffff81e2d440 t gmc_v8_0_hw_fini +ffffffff81e2d500 t gmc_v8_0_suspend +ffffffff81e2d540 t gmc_v8_0_resume +ffffffff81e2d5a0 t gmc_v8_0_is_idle +ffffffff81e2d5f0 t gmc_v8_0_wait_for_idle +ffffffff81e2d690 t gmc_v8_0_check_soft_reset +ffffffff81e2d700 t gmc_v8_0_pre_soft_reset +ffffffff81e2d870 t gmc_v8_0_soft_reset +ffffffff81e2d940 t gmc_v8_0_post_soft_reset +ffffffff81e2d9b0 t gmc_v8_0_set_clockgating_state +ffffffff81e2df70 t gmc_v8_0_set_powergating_state +ffffffff81e2dfa0 t gmc_v8_0_get_clockgating_state +ffffffff81e2e010 t gmc_v8_0_flush_gpu_tlb +ffffffff81e2e040 t gmc_v8_0_flush_gpu_tlb_pasid +ffffffff81e2e100 t gmc_v8_0_emit_flush_gpu_tlb +ffffffff81e2e1a0 t gmc_v8_0_emit_pasid_mapping +ffffffff81e2e1d0 t gmc_v8_0_set_prt +ffffffff81e2e390 t gmc_v8_0_get_vm_pde +ffffffff81e2e3f0 t gmc_v8_0_get_vm_pte +ffffffff81e2e440 t gmc_v8_0_get_vbios_fb_size +ffffffff81e2e4b0 t gmc_v8_0_vm_fault_interrupt_state +ffffffff81e2e580 t gmc_v8_0_process_interrupt +ffffffff81e2e910 t gmc_v8_0_gart_init +ffffffff81e2f000 T gmc_v9_0_restore_registers +ffffffff81e2f150 t gmc_v9_0_early_init +ffffffff81e2f500 t gmc_v9_0_late_init +ffffffff81e2f610 t gmc_v9_0_sw_init +ffffffff81e2fbc0 t gmc_v9_0_sw_fini +ffffffff81e2fc30 t gmc_v9_0_hw_init +ffffffff81e30030 t gmc_v9_0_hw_fini +ffffffff81e300e0 t gmc_v9_0_suspend +ffffffff81e30190 t gmc_v9_0_resume +ffffffff81e301f0 t gmc_v9_0_is_idle +ffffffff81e30220 t gmc_v9_0_wait_for_idle +ffffffff81e30250 t gmc_v9_0_soft_reset +ffffffff81e30280 t gmc_v9_0_set_clockgating_state +ffffffff81e302e0 t gmc_v9_0_set_powergating_state +ffffffff81e30310 t gmc_v9_0_get_clockgating_state +ffffffff81e30350 t gmc_v9_0_flush_gpu_tlb +ffffffff81e30980 t gmc_v9_0_flush_gpu_tlb_pasid +ffffffff81e30c50 t gmc_v9_0_emit_flush_gpu_tlb +ffffffff81e30e50 t gmc_v9_0_emit_pasid_mapping +ffffffff81e30ec0 t gmc_v9_0_map_mtype +ffffffff81e30f00 t gmc_v9_0_get_vm_pde +ffffffff81e31000 t gmc_v9_0_get_vm_pte +ffffffff81e310d0 t gmc_v9_0_get_vbios_fb_size +ffffffff81e31260 t gmc_v9_0_vm_fault_interrupt_state +ffffffff81e315e0 t gmc_v9_0_process_interrupt +ffffffff81e31c10 t gmc_v9_0_ecc_interrupt_state +ffffffff81e31d70 t gmc_v9_0_gart_init +ffffffff81e31e50 t gmc_v9_0_save_registers +ffffffff81e32000 t hdp_v4_0_query_ras_error_count +ffffffff81e320c0 t hdp_v4_0_reset_ras_error_count +ffffffff81e321e0 t hdp_v4_0_flush_hdp +ffffffff81e32230 t hdp_v4_0_invalidate_hdp +ffffffff81e32300 t hdp_v4_0_update_clock_gating +ffffffff81e32400 t hdp_v4_0_get_clockgating_state +ffffffff81e32450 t hdp_v4_0_init_registers +ffffffff81e33000 t hdp_v5_0_flush_hdp +ffffffff81e33050 t hdp_v5_0_invalidate_hdp +ffffffff81e330f0 t hdp_v5_0_update_clock_gating +ffffffff81e334e0 t hdp_v5_0_get_clockgating_state +ffffffff81e33600 t hdp_v5_0_init_registers +ffffffff81e34000 t hdp_v5_2_flush_hdp +ffffffff81e34050 t hdp_v5_2_update_clock_gating +ffffffff81e34440 t hdp_v5_2_get_clockgating_state +ffffffff81e35000 t hdp_v6_0_flush_hdp +ffffffff81e35050 t hdp_v6_0_update_clock_gating +ffffffff81e35360 t hdp_v6_0_get_clockgating_state +ffffffff81e36000 t iceland_ih_early_init +ffffffff81e36050 t iceland_ih_sw_init +ffffffff81e360b0 t iceland_ih_sw_fini +ffffffff81e360f0 t iceland_ih_hw_init +ffffffff81e36310 t iceland_ih_hw_fini +ffffffff81e363e0 t iceland_ih_suspend +ffffffff81e364b0 t iceland_ih_resume +ffffffff81e364f0 t iceland_ih_is_idle +ffffffff81e36540 t iceland_ih_wait_for_idle +ffffffff81e365e0 t iceland_ih_soft_reset +ffffffff81e366c0 t iceland_ih_set_clockgating_state +ffffffff81e366f0 t iceland_ih_set_powergating_state +ffffffff81e36720 t iceland_ih_get_wptr +ffffffff81e36810 t iceland_ih_decode_iv +ffffffff81e36890 t iceland_ih_set_rptr +ffffffff81e37000 t ih_v6_0_early_init +ffffffff81e37050 t ih_v6_0_sw_init +ffffffff81e371b0 t ih_v6_0_sw_fini +ffffffff81e371f0 t ih_v6_0_hw_init +ffffffff81e37770 t ih_v6_0_hw_fini +ffffffff81e377d0 t ih_v6_0_suspend +ffffffff81e37830 t ih_v6_0_resume +ffffffff81e37840 t ih_v6_0_is_idle +ffffffff81e37870 t ih_v6_0_wait_for_idle +ffffffff81e378a0 t ih_v6_0_soft_reset +ffffffff81e378d0 t ih_v6_0_set_clockgating_state +ffffffff81e379f0 t ih_v6_0_set_powergating_state +ffffffff81e37b60 t ih_v6_0_get_clockgating_state +ffffffff81e37bf0 t ih_v6_0_get_wptr +ffffffff81e37ce0 t ih_v6_0_set_rptr +ffffffff81e37db0 t ih_v6_0_self_irq +ffffffff81e37e20 t ih_v6_0_toggle_interrupts +ffffffff81e38000 t force_update_wptr_for_self_int +ffffffff81e39000 t imu_v11_0_init_microcode +ffffffff81e391f0 t imu_v11_0_load_microcode +ffffffff81e39550 t imu_v11_0_setup +ffffffff81e397d0 t imu_v11_0_start +ffffffff81e398c0 t imu_v11_0_program_rlc_ram +ffffffff81e39a70 t imu_v11_0_wait_for_reset_status +ffffffff81e39bc0 t program_imu_rlc_ram +ffffffff81e3a000 T imu_v11_0_3_program_rlc_ram +ffffffff81e3b000 T jpeg_v1_0_early_init +ffffffff81e3b060 T jpeg_v1_0_sw_init +ffffffff81e3b130 T jpeg_v1_0_sw_fini +ffffffff81e3b150 T jpeg_v1_0_start +ffffffff81e3bbf0 t jpeg_v1_0_decode_ring_get_rptr +ffffffff81e3bc80 t jpeg_v1_0_decode_ring_get_wptr +ffffffff81e3bd10 t jpeg_v1_0_decode_ring_set_wptr +ffffffff81e3bd80 t jpeg_v1_0_decode_ring_emit_ib +ffffffff81e3c6a0 t jpeg_v1_0_decode_ring_emit_fence +ffffffff81e3cfe0 t jpeg_v1_0_decode_ring_emit_vm_flush +ffffffff81e3d050 t jpeg_v1_0_decode_ring_nop +ffffffff81e3d1b0 t jpeg_v1_0_decode_ring_insert_start +ffffffff81e3d370 t jpeg_v1_0_decode_ring_insert_end +ffffffff81e3d530 t jpeg_v1_0_ring_begin_use +ffffffff81e3d630 t jpeg_v1_0_decode_ring_emit_wreg +ffffffff81e3d890 t jpeg_v1_0_decode_ring_emit_reg_wait +ffffffff81e3dcb0 t jpeg_v1_0_set_interrupt_state +ffffffff81e3dce0 t jpeg_v1_0_process_interrupt +ffffffff81e3e000 T jpeg_v2_0_dec_ring_insert_start +ffffffff81e3e1a0 T jpeg_v2_0_dec_ring_insert_end +ffffffff81e3e340 T jpeg_v2_0_dec_ring_emit_fence +ffffffff81e3ea20 T jpeg_v2_0_dec_ring_emit_ib +ffffffff81e3f1d0 T jpeg_v2_0_dec_ring_emit_reg_wait +ffffffff81e3f580 T jpeg_v2_0_dec_ring_emit_vm_flush +ffffffff81e3f5f0 T jpeg_v2_0_dec_ring_emit_wreg +ffffffff81e3f830 T jpeg_v2_0_dec_ring_nop +ffffffff81e3f990 t jpeg_v2_0_early_init +ffffffff81e3fa00 t jpeg_v2_0_sw_init +ffffffff81e3fb10 t jpeg_v2_0_sw_fini +ffffffff81e3fb60 t jpeg_v2_0_hw_init +ffffffff81e3fbe0 t jpeg_v2_0_hw_fini +ffffffff81e3fcc0 t jpeg_v2_0_suspend +ffffffff81e3fcf0 t jpeg_v2_0_resume +ffffffff81e3fd80 t jpeg_v2_0_is_idle +ffffffff81e3fe00 t jpeg_v2_0_wait_for_idle +ffffffff81e3fef0 t jpeg_v2_0_set_clockgating_state +ffffffff81e3ffa0 t jpeg_v2_0_set_powergating_state +ffffffff81e407a0 t jpeg_v2_0_dec_ring_get_rptr +ffffffff81e40830 t jpeg_v2_0_dec_ring_get_wptr +ffffffff81e408d0 t jpeg_v2_0_dec_ring_set_wptr +ffffffff81e40970 t jpeg_v2_0_set_interrupt_state +ffffffff81e409a0 t jpeg_v2_0_process_interrupt +ffffffff81e40a30 t jpeg_v2_0_enable_clock_gating +ffffffff81e40bd0 t jpeg_v2_0_disable_clock_gating +ffffffff81e41000 t jpeg_v2_6_query_ras_poison_status +ffffffff81e41140 t jpeg_v2_5_early_init +ffffffff81e41400 t jpeg_v2_5_sw_init +ffffffff81e41650 t jpeg_v2_5_sw_fini +ffffffff81e416a0 t jpeg_v2_5_hw_init +ffffffff81e41790 t jpeg_v2_5_hw_fini +ffffffff81e418d0 t jpeg_v2_5_suspend +ffffffff81e41900 t jpeg_v2_5_resume +ffffffff81e41a00 t jpeg_v2_5_is_idle +ffffffff81e41b00 t jpeg_v2_5_wait_for_idle +ffffffff81e41c30 t jpeg_v2_5_set_clockgating_state +ffffffff81e41da0 t jpeg_v2_5_set_powergating_state +ffffffff81e42450 t jpeg_v2_5_dec_ring_get_rptr +ffffffff81e424f0 t jpeg_v2_5_dec_ring_get_wptr +ffffffff81e425a0 t jpeg_v2_5_dec_ring_set_wptr +ffffffff81e42650 t jpeg_v2_6_dec_ring_insert_start +ffffffff81e42810 t jpeg_v2_6_dec_ring_insert_end +ffffffff81e429d0 t jpeg_v2_5_set_interrupt_state +ffffffff81e42a00 t jpeg_v2_5_process_interrupt +ffffffff81e42ae0 t jpeg_v2_5_enable_clock_gating +ffffffff81e42bb0 t jpeg_v2_5_disable_clock_gating +ffffffff81e43000 t jpeg_v3_0_early_init +ffffffff81e430f0 t jpeg_v3_0_sw_init +ffffffff81e43200 t jpeg_v3_0_sw_fini +ffffffff81e43250 t jpeg_v3_0_hw_init +ffffffff81e432d0 t jpeg_v3_0_hw_fini +ffffffff81e433b0 t jpeg_v3_0_suspend +ffffffff81e433e0 t jpeg_v3_0_resume +ffffffff81e43470 t jpeg_v3_0_is_idle +ffffffff81e434f0 t jpeg_v3_0_wait_for_idle +ffffffff81e435e0 t jpeg_v3_0_set_clockgating_state +ffffffff81e43690 t jpeg_v3_0_set_powergating_state +ffffffff81e43f30 t jpeg_v3_0_dec_ring_get_rptr +ffffffff81e43fc0 t jpeg_v3_0_dec_ring_get_wptr +ffffffff81e44060 t jpeg_v3_0_dec_ring_set_wptr +ffffffff81e44100 t jpeg_v3_0_set_interrupt_state +ffffffff81e44130 t jpeg_v3_0_process_interrupt +ffffffff81e441c0 t jpeg_v3_0_enable_clock_gating +ffffffff81e44290 t jpeg_v3_0_disable_clock_gating +ffffffff81e45000 t jpeg_v4_0_early_init +ffffffff81e45080 t jpeg_v4_0_sw_init +ffffffff81e45190 t jpeg_v4_0_sw_fini +ffffffff81e451e0 t jpeg_v4_0_hw_init +ffffffff81e45300 t jpeg_v4_0_hw_fini +ffffffff81e453e0 t jpeg_v4_0_suspend +ffffffff81e45410 t jpeg_v4_0_resume +ffffffff81e45460 t jpeg_v4_0_is_idle +ffffffff81e454e0 t jpeg_v4_0_wait_for_idle +ffffffff81e455d0 t jpeg_v4_0_set_clockgating_state +ffffffff81e45680 t jpeg_v4_0_set_powergating_state +ffffffff81e45e90 t jpeg_v4_0_dec_ring_get_rptr +ffffffff81e45f20 t jpeg_v4_0_dec_ring_get_wptr +ffffffff81e45fc0 t jpeg_v4_0_dec_ring_set_wptr +ffffffff81e46060 t jpeg_v4_0_set_interrupt_state +ffffffff81e46090 t jpeg_v4_0_process_interrupt +ffffffff81e46130 t jpeg_v4_0_enable_clock_gating +ffffffff81e462e0 t jpeg_v4_0_disable_clock_gating +ffffffff81e47000 t lsdma_v6_0_copy_mem +ffffffff81e47350 t lsdma_v6_0_fill_mem +ffffffff81e47630 t lsdma_v6_0_update_memory_power_gating +ffffffff81e48000 t mca_v3_0_mp0_query_ras_error_count +ffffffff81e48020 t mca_v3_0_ras_block_match +ffffffff81e48070 t mca_v3_0_mp1_query_ras_error_count +ffffffff81e48090 t mca_v3_0_mpio_query_ras_error_count +ffffffff81e480b0 t mca_v3_0_init +ffffffff81e49000 t mes_v10_0_early_init +ffffffff81e49060 t mes_v10_0_late_init +ffffffff81e490b0 t mes_v10_1_sw_init +ffffffff81e49580 t mes_v10_1_sw_fini +ffffffff81e496a0 t mes_v10_1_hw_init +ffffffff81e49f70 t mes_v10_1_hw_fini +ffffffff81e4a060 t mes_v10_1_suspend +ffffffff81e4a170 t mes_v10_1_resume +ffffffff81e4a1c0 t mes_v10_1_kiq_hw_init +ffffffff81e4a5d0 t mes_v10_1_add_hw_queue +ffffffff81e4a750 t mes_v10_1_remove_hw_queue +ffffffff81e4a7e0 t mes_v10_1_unmap_legacy_queue +ffffffff81e4a8d0 t mes_v10_1_suspend_gang +ffffffff81e4a900 t mes_v10_1_resume_gang +ffffffff81e4a930 t mes_v10_1_submit_pkt_and_poll_completion +ffffffff81e4ab30 t mes_v10_1_load_microcode +ffffffff81e4b330 t mes_v10_1_enable +ffffffff81e4b7a0 t mes_v10_1_queue_init +ffffffff81e4ba40 t amdgpu_bo_unreserve +ffffffff81e4bb20 t mes_v10_1_ring_get_rptr +ffffffff81e4bb50 t mes_v10_1_ring_get_wptr +ffffffff81e4bbc0 t mes_v10_1_ring_set_wptr +ffffffff81e4c000 t mes_v11_0_early_init +ffffffff81e4c060 t mes_v11_0_late_init +ffffffff81e4c0d0 t mes_v11_0_sw_init +ffffffff81e4c5b0 t mes_v11_0_sw_fini +ffffffff81e4c770 t mes_v11_0_hw_init +ffffffff81e4cf80 t mes_v11_0_hw_fini +ffffffff81e4cfb0 t mes_v11_0_suspend +ffffffff81e4cfc0 t mes_v11_0_resume +ffffffff81e4d010 t mes_v11_0_kiq_hw_init +ffffffff81e4d210 t mes_v11_0_kiq_hw_fini +ffffffff81e4d650 t mes_v11_0_add_hw_queue +ffffffff81e4d840 t mes_v11_0_remove_hw_queue +ffffffff81e4d8d0 t mes_v11_0_unmap_legacy_queue +ffffffff81e4d9d0 t mes_v11_0_suspend_gang +ffffffff81e4da00 t mes_v11_0_resume_gang +ffffffff81e4da30 t mes_v11_0_misc_op +ffffffff81e4db80 t mes_v11_0_submit_pkt_and_poll_completion +ffffffff81e4dda0 t mes_v11_0_load_microcode +ffffffff81e4e510 t mes_v11_0_enable +ffffffff81e4ea00 t mes_v11_0_queue_init +ffffffff81e4f490 t amdgpu_bo_unreserve +ffffffff81e4f570 t mes_v11_0_mqd_init +ffffffff81e4f770 t mes_v11_0_ring_get_rptr +ffffffff81e4f7a0 t mes_v11_0_ring_get_wptr +ffffffff81e4f810 t mes_v11_0_ring_set_wptr +ffffffff81e50000 t mmhub_v1_0_query_ras_error_count +ffffffff81e50150 t mmhub_v1_0_reset_ras_error_count +ffffffff81e50200 t mmhub_v1_0_get_fb_location +ffffffff81e50310 t mmhub_v1_0_init +ffffffff81e503c0 t mmhub_v1_0_gart_enable +ffffffff81e516a0 t mmhub_v1_0_set_fault_enable_default +ffffffff81e517b0 t mmhub_v1_0_gart_disable +ffffffff81e51a40 t mmhub_v1_0_set_clockgating +ffffffff81e51eb0 t mmhub_v1_0_get_clockgating +ffffffff81e51fd0 t mmhub_v1_0_setup_vm_pt_regs +ffffffff81e52110 t mmhub_v1_0_update_power_gating +ffffffff81e53000 t mmhub_v1_7_query_ras_error_count +ffffffff81e53150 t mmhub_v1_7_query_ras_error_status +ffffffff81e53230 t mmhub_v1_7_reset_ras_error_count +ffffffff81e532d0 t mmhub_v1_7_reset_ras_error_status +ffffffff81e533c0 t mmhub_v1_7_get_fb_location +ffffffff81e534d0 t mmhub_v1_7_init +ffffffff81e53570 t mmhub_v1_7_gart_enable +ffffffff81e54a00 t mmhub_v1_7_set_fault_enable_default +ffffffff81e54b10 t mmhub_v1_7_gart_disable +ffffffff81e54da0 t mmhub_v1_7_set_clockgating +ffffffff81e55120 t mmhub_v1_7_get_clockgating +ffffffff81e55240 t mmhub_v1_7_setup_vm_pt_regs +ffffffff81e56000 t mmhub_v2_0_init +ffffffff81e560d0 t mmhub_v2_0_gart_enable +ffffffff81e57210 t mmhub_v2_0_set_fault_enable_default +ffffffff81e57320 t mmhub_v2_0_gart_disable +ffffffff81e575a0 t mmhub_v2_0_set_clockgating +ffffffff81e578e0 t mmhub_v2_0_get_clockgating +ffffffff81e57a70 t mmhub_v2_0_setup_vm_pt_regs +ffffffff81e57bb0 t mmhub_v2_0_print_l2_protection_fault_status +ffffffff81e57e00 t mmhub_v2_0_get_invalidate_req +ffffffff81e58000 t mmhub_v2_3_init +ffffffff81e580e0 t mmhub_v2_3_gart_enable +ffffffff81e59430 t mmhub_v2_3_set_fault_enable_default +ffffffff81e59530 t mmhub_v2_3_gart_disable +ffffffff81e597c0 t mmhub_v2_3_set_clockgating +ffffffff81e59c40 t mmhub_v2_3_get_clockgating +ffffffff81e59e30 t mmhub_v2_3_setup_vm_pt_regs +ffffffff81e59f70 t mmhub_v2_3_print_l2_protection_fault_status +ffffffff81e5a180 t mmhub_v2_3_get_invalidate_req +ffffffff81e5b000 t mmhub_v3_0_get_fb_location +ffffffff81e5b090 t mmhub_v3_0_get_mc_fb_offset +ffffffff81e5b120 t mmhub_v3_0_init +ffffffff81e5b1f0 t mmhub_v3_0_gart_enable +ffffffff81e5c350 t mmhub_v3_0_set_fault_enable_default +ffffffff81e5c460 t mmhub_v3_0_gart_disable +ffffffff81e5c6e0 t mmhub_v3_0_set_clockgating +ffffffff81e5c8b0 t mmhub_v3_0_get_clockgating +ffffffff81e5c960 t mmhub_v3_0_setup_vm_pt_regs +ffffffff81e5caa0 t mmhub_v3_0_print_l2_protection_fault_status +ffffffff81e5cca0 t mmhub_v3_0_get_invalidate_req +ffffffff81e5d000 t mmhub_v3_0_1_get_fb_location +ffffffff81e5d090 t mmhub_v3_0_1_get_mc_fb_offset +ffffffff81e5d120 t mmhub_v3_0_1_init +ffffffff81e5d1f0 t mmhub_v3_0_1_gart_enable +ffffffff81e5e440 t mmhub_v3_0_1_set_fault_enable_default +ffffffff81e5e540 t mmhub_v3_0_1_gart_disable +ffffffff81e5e7d0 t mmhub_v3_0_1_set_clockgating +ffffffff81e5e990 t mmhub_v3_0_1_get_clockgating +ffffffff81e5ea40 t mmhub_v3_0_1_setup_vm_pt_regs +ffffffff81e5eb80 t mmhub_v3_0_1_print_l2_protection_fault_status +ffffffff81e5ed80 t mmhub_v3_0_1_get_invalidate_req +ffffffff81e5f000 t mmhub_v3_0_2_get_fb_location +ffffffff81e5f090 t mmhub_v3_0_2_get_mc_fb_offset +ffffffff81e5f120 t mmhub_v3_0_2_init +ffffffff81e5f1f0 t mmhub_v3_0_2_gart_enable +ffffffff81e60340 t mmhub_v3_0_2_set_fault_enable_default +ffffffff81e60450 t mmhub_v3_0_2_gart_disable +ffffffff81e606d0 t mmhub_v3_0_2_set_clockgating +ffffffff81e60700 t mmhub_v3_0_2_get_clockgating +ffffffff81e60730 t mmhub_v3_0_2_setup_vm_pt_regs +ffffffff81e60870 t mmhub_v3_0_2_print_l2_protection_fault_status +ffffffff81e60a50 t mmhub_v3_0_2_get_invalidate_req +ffffffff81e61000 t mmhub_v9_4_query_ras_error_count +ffffffff81e61150 t mmhub_v9_4_query_ras_error_status +ffffffff81e61230 t mmhub_v9_4_reset_ras_error_count +ffffffff81e61300 t mmhub_v9_4_get_fb_location +ffffffff81e61410 t mmhub_v9_4_init +ffffffff81e61560 t mmhub_v9_4_gart_enable +ffffffff81e62980 t mmhub_v9_4_set_fault_enable_default +ffffffff81e62b60 t mmhub_v9_4_gart_disable +ffffffff81e62ec0 t mmhub_v9_4_set_clockgating +ffffffff81e63380 t mmhub_v9_4_get_clockgating +ffffffff81e634b0 t mmhub_v9_4_setup_vm_pt_regs +ffffffff81e63500 t mmhub_v9_4_setup_hubid_vm_pt_regs +ffffffff81e64000 T xgpu_ai_mailbox_set_irq_funcs +ffffffff81e64050 T xgpu_ai_mailbox_add_irq_id +ffffffff81e640e0 T xgpu_ai_mailbox_get_irq +ffffffff81e64190 t xgpu_ai_mailbox_flr_work +ffffffff81e64390 T xgpu_ai_mailbox_put_irq +ffffffff81e643d0 t xgpu_ai_request_full_gpu_access +ffffffff81e643f0 t xgpu_ai_release_full_gpu_access +ffffffff81e64410 t xgpu_ai_request_init_data +ffffffff81e64470 t xgpu_ai_request_reset +ffffffff81e64520 t xgpu_ai_mailbox_trans_msg +ffffffff81e64740 t xgpu_ai_set_mailbox_ack_irq +ffffffff81e647d0 t xgpu_ai_mailbox_ack_irq +ffffffff81e64820 t xgpu_ai_set_mailbox_rcv_irq +ffffffff81e648b0 t xgpu_ai_mailbox_rcv_irq +ffffffff81e64990 t xgpu_ai_send_access_requests +ffffffff81e64a80 t xgpu_ai_poll_msg +ffffffff81e65000 T xgpu_nv_mailbox_set_irq_funcs +ffffffff81e65050 T xgpu_nv_mailbox_add_irq_id +ffffffff81e650e0 T xgpu_nv_mailbox_get_irq +ffffffff81e65190 t xgpu_nv_mailbox_flr_work +ffffffff81e653b0 T xgpu_nv_mailbox_put_irq +ffffffff81e653f0 t xgpu_nv_request_full_gpu_access +ffffffff81e65410 t xgpu_nv_release_full_gpu_access +ffffffff81e65430 t xgpu_nv_request_init_data +ffffffff81e65450 t xgpu_nv_request_reset +ffffffff81e65550 t xgpu_nv_mailbox_trans_msg +ffffffff81e656f0 t xgpu_nv_set_mailbox_ack_irq +ffffffff81e65770 t xgpu_nv_mailbox_ack_irq +ffffffff81e657c0 t xgpu_nv_set_mailbox_rcv_irq +ffffffff81e65840 t xgpu_nv_mailbox_rcv_irq +ffffffff81e658f0 t xgpu_nv_send_access_requests +ffffffff81e66000 T xgpu_vi_init_golden_registers +ffffffff81e660c0 T xgpu_vi_mailbox_set_irq_funcs +ffffffff81e66110 T xgpu_vi_mailbox_add_irq_id +ffffffff81e661a0 T xgpu_vi_mailbox_get_irq +ffffffff81e66250 t xgpu_vi_mailbox_flr_work +ffffffff81e663a0 T xgpu_vi_mailbox_put_irq +ffffffff81e663e0 t xgpu_vi_request_full_gpu_access +ffffffff81e66400 t xgpu_vi_release_full_gpu_access +ffffffff81e66420 t xgpu_vi_request_reset +ffffffff81e66440 t xgpu_vi_wait_reset_cmpl +ffffffff81e66520 t xgpu_vi_set_mailbox_ack_irq +ffffffff81e665a0 t xgpu_vi_mailbox_ack_irq +ffffffff81e665f0 t xgpu_vi_set_mailbox_rcv_irq +ffffffff81e66670 t xgpu_vi_mailbox_rcv_irq +ffffffff81e66720 t xgpu_vi_mailbox_rcv_msg +ffffffff81e66840 t xgpu_vi_send_access_requests +ffffffff81e67000 t navi10_ih_early_init +ffffffff81e67060 t navi10_ih_sw_init +ffffffff81e671d0 t navi10_ih_sw_fini +ffffffff81e67210 t navi10_ih_hw_init +ffffffff81e67620 t navi10_ih_hw_fini +ffffffff81e67680 t navi10_ih_suspend +ffffffff81e676e0 t navi10_ih_resume +ffffffff81e676f0 t navi10_ih_is_idle +ffffffff81e67720 t navi10_ih_wait_for_idle +ffffffff81e67750 t navi10_ih_soft_reset +ffffffff81e67780 t navi10_ih_set_clockgating_state +ffffffff81e678a0 t navi10_ih_set_powergating_state +ffffffff81e678d0 t navi10_ih_get_clockgating_state +ffffffff81e67960 t navi10_ih_get_wptr +ffffffff81e67a70 t navi10_ih_set_rptr +ffffffff81e67b40 t navi10_ih_self_irq +ffffffff81e67bc0 t navi10_ih_toggle_interrupts +ffffffff81e67d30 t force_update_wptr_for_self_int +ffffffff81e69000 t nbio_v2_3_get_hdp_flush_req_offset +ffffffff81e69040 t nbio_v2_3_get_hdp_flush_done_offset +ffffffff81e69080 t nbio_v2_3_get_pcie_index_offset +ffffffff81e690c0 t nbio_v2_3_get_pcie_data_offset +ffffffff81e69100 t nbio_v2_3_get_rev_id +ffffffff81e69160 t nbio_v2_3_mc_access_enable +ffffffff81e69210 t nbio_v2_3_get_memsize +ffffffff81e69280 t nbio_v2_3_sdma_doorbell_range +ffffffff81e69320 t nbio_v2_3_vcn_doorbell_range +ffffffff81e693a0 t nbio_v2_3_enable_doorbell_aperture +ffffffff81e69490 t nbio_v2_3_enable_doorbell_selfring_aperture +ffffffff81e695f0 t nbio_v2_3_ih_doorbell_range +ffffffff81e69700 t nbio_v2_3_update_medium_grain_clock_gating +ffffffff81e697a0 t nbio_v2_3_update_medium_grain_light_sleep +ffffffff81e69840 t nbio_v2_3_get_clockgating_state +ffffffff81e698c0 t nbio_v2_3_ih_control +ffffffff81e69a10 t nbio_v2_3_init_registers +ffffffff81e69aa0 t nbio_v2_3_remap_hdp_registers +ffffffff81e69bb0 t nbio_v2_3_enable_aspm +ffffffff81e69c50 t nbio_v2_3_program_aspm +ffffffff81e6a2e0 t nbio_v2_3_apply_lc_spc_mode_wa +ffffffff81e6a370 t nbio_v2_3_apply_l1_link_width_reconfig_wa +ffffffff81e6a3e0 t nbio_v2_3_clear_doorbell_interrupt +ffffffff81e6b000 t nbio_v4_3_get_hdp_flush_req_offset +ffffffff81e6b040 t nbio_v4_3_get_hdp_flush_done_offset +ffffffff81e6b080 t nbio_v4_3_get_pcie_index_offset +ffffffff81e6b0b0 t nbio_v4_3_get_pcie_data_offset +ffffffff81e6b0f0 t nbio_v4_3_get_rev_id +ffffffff81e6b170 t nbio_v4_3_mc_access_enable +ffffffff81e6b220 t nbio_v4_3_get_memsize +ffffffff81e6b290 t nbio_v4_3_sdma_doorbell_range +ffffffff81e6b400 t nbio_v4_3_vcn_doorbell_range +ffffffff81e6b5b0 t nbio_v4_3_gc_doorbell_init +ffffffff81e6b6a0 t nbio_v4_3_enable_doorbell_aperture +ffffffff81e6b790 t nbio_v4_3_enable_doorbell_selfring_aperture +ffffffff81e6b8f0 t nbio_v4_3_ih_doorbell_range +ffffffff81e6ba10 t nbio_v4_3_update_medium_grain_clock_gating +ffffffff81e6bb50 t nbio_v4_3_update_medium_grain_light_sleep +ffffffff81e6bc80 t nbio_v4_3_get_clockgating_state +ffffffff81e6bd90 t nbio_v4_3_ih_control +ffffffff81e6bee0 t nbio_v4_3_init_registers +ffffffff81e6c000 t nbio_v4_3_remap_hdp_registers +ffffffff81e6c110 t nbio_v4_3_program_aspm +ffffffff81e6cdb0 t nbio_v4_3_get_rom_offset +ffffffff81e6ce40 t nbio_v4_3_sriov_sdma_doorbell_range +ffffffff81e6ce70 t nbio_v4_3_sriov_vcn_doorbell_range +ffffffff81e6cea0 t nbio_v4_3_sriov_gc_doorbell_init +ffffffff81e6ced0 t nbio_v4_3_sriov_ih_doorbell_range +ffffffff81e6d000 t nbio_v6_1_get_hdp_flush_req_offset +ffffffff81e6d040 t nbio_v6_1_get_hdp_flush_done_offset +ffffffff81e6d080 t nbio_v6_1_get_pcie_index_offset +ffffffff81e6d0c0 t nbio_v6_1_get_pcie_data_offset +ffffffff81e6d100 t nbio_v6_1_get_rev_id +ffffffff81e6d180 t nbio_v6_1_mc_access_enable +ffffffff81e6d230 t nbio_v6_1_get_memsize +ffffffff81e6d2a0 t nbio_v6_1_sdma_doorbell_range +ffffffff81e6d330 t nbio_v6_1_enable_doorbell_aperture +ffffffff81e6d420 t nbio_v6_1_enable_doorbell_selfring_aperture +ffffffff81e6d580 t nbio_v6_1_ih_doorbell_range +ffffffff81e6d690 t nbio_v6_1_update_medium_grain_clock_gating +ffffffff81e6d730 t nbio_v6_1_update_medium_grain_light_sleep +ffffffff81e6d7d0 t nbio_v6_1_get_clockgating_state +ffffffff81e6d850 t nbio_v6_1_ih_control +ffffffff81e6d9a0 t nbio_v6_1_init_registers +ffffffff81e6da70 t nbio_v6_1_remap_hdp_registers +ffffffff81e6db80 t nbio_v6_1_program_aspm +ffffffff81e6e000 t nbio_v7_0_get_hdp_flush_req_offset +ffffffff81e6e040 t nbio_v7_0_get_hdp_flush_done_offset +ffffffff81e6e080 t nbio_v7_0_get_pcie_index_offset +ffffffff81e6e0c0 t nbio_v7_0_get_pcie_data_offset +ffffffff81e6e100 t nbio_v7_0_get_rev_id +ffffffff81e6e180 t nbio_v7_0_mc_access_enable +ffffffff81e6e230 t nbio_v7_0_get_memsize +ffffffff81e6e2a0 t nbio_v7_0_sdma_doorbell_range +ffffffff81e6e330 t nbio_v7_0_vcn_doorbell_range +ffffffff81e6e3b0 t nbio_v7_0_enable_doorbell_aperture +ffffffff81e6e4a0 t nbio_v7_0_enable_doorbell_selfring_aperture +ffffffff81e6e4d0 t nbio_v7_0_ih_doorbell_range +ffffffff81e6e5e0 t nbio_v7_0_update_medium_grain_clock_gating +ffffffff81e6e710 t nbio_v7_0_update_medium_grain_light_sleep +ffffffff81e6e7b0 t nbio_v7_0_get_clockgating_state +ffffffff81e6e830 t nbio_v7_0_ih_control +ffffffff81e6e980 t nbio_v7_0_init_registers +ffffffff81e6e9d0 t nbio_v7_0_remap_hdp_registers +ffffffff81e6eae0 t nbio_7_0_read_syshub_ind_mmr +ffffffff81e6ebb0 t nbio_7_0_write_syshub_ind_mmr +ffffffff81e6f000 t nbio_v7_2_get_hdp_flush_req_offset +ffffffff81e6f040 t nbio_v7_2_get_hdp_flush_done_offset +ffffffff81e6f080 t nbio_v7_2_get_pcie_index_offset +ffffffff81e6f0c0 t nbio_v7_2_get_pcie_data_offset +ffffffff81e6f100 t nbio_v7_2_get_pcie_port_index_offset +ffffffff81e6f130 t nbio_v7_2_get_pcie_port_data_offset +ffffffff81e6f170 t nbio_v7_2_get_rev_id +ffffffff81e6f250 t nbio_v7_2_mc_access_enable +ffffffff81e6f390 t nbio_v7_2_get_memsize +ffffffff81e6f400 t nbio_v7_2_sdma_doorbell_range +ffffffff81e6f4a0 t nbio_v7_2_vcn_doorbell_range +ffffffff81e6f520 t nbio_v7_2_enable_doorbell_aperture +ffffffff81e6f600 t nbio_v7_2_enable_doorbell_selfring_aperture +ffffffff81e6f760 t nbio_v7_2_ih_doorbell_range +ffffffff81e6f7f0 t nbio_v7_2_update_medium_grain_clock_gating +ffffffff81e6f8b0 t nbio_v7_2_update_medium_grain_light_sleep +ffffffff81e6fa40 t nbio_v7_2_get_clockgating_state +ffffffff81e6fad0 t nbio_v7_2_ih_control +ffffffff81e6fc20 t nbio_v7_2_init_registers +ffffffff81e6fde0 t nbio_v7_2_remap_hdp_registers +ffffffff81e70000 t nbio_v7_4_query_ras_error_count +ffffffff81e701a0 t nbio_v7_4_handle_ras_controller_intr_no_bifring +ffffffff81e703e0 t nbio_v7_4_handle_ras_err_event_athub_intr_no_bifring +ffffffff81e70590 t nbio_v7_4_init_ras_controller_interrupt +ffffffff81e705d0 t nbio_v7_4_init_ras_err_event_athub_interrupt +ffffffff81e70610 t nbio_v7_4_get_hdp_flush_req_offset +ffffffff81e70650 t nbio_v7_4_get_hdp_flush_done_offset +ffffffff81e70690 t nbio_v7_4_get_pcie_index_offset +ffffffff81e706d0 t nbio_v7_4_get_pcie_data_offset +ffffffff81e70710 t nbio_v7_4_get_rev_id +ffffffff81e707d0 t nbio_v7_4_mc_access_enable +ffffffff81e70880 t nbio_v7_4_get_memsize +ffffffff81e708f0 t nbio_v7_4_sdma_doorbell_range +ffffffff81e709c0 t nbio_v7_4_vcn_doorbell_range +ffffffff81e70a60 t nbio_v7_4_enable_doorbell_aperture +ffffffff81e70b50 t nbio_v7_4_enable_doorbell_selfring_aperture +ffffffff81e70cb0 t nbio_v7_4_ih_doorbell_range +ffffffff81e70dc0 t nbio_v7_4_enable_doorbell_interrupt +ffffffff81e70f00 t nbio_v7_4_update_medium_grain_clock_gating +ffffffff81e70f30 t nbio_v7_4_update_medium_grain_light_sleep +ffffffff81e70fd0 t nbio_v7_4_get_clockgating_state +ffffffff81e71050 t nbio_v7_4_ih_control +ffffffff81e711a0 t nbio_v7_4_init_registers +ffffffff81e71290 t nbio_v7_4_remap_hdp_registers +ffffffff81e713a0 t nbio_v7_4_program_aspm +ffffffff81e717b0 t nbio_v7_4_set_ras_controller_irq_state +ffffffff81e71940 t nbio_v7_4_process_ras_controller_irq +ffffffff81e71970 t nbio_v7_4_set_ras_err_event_athub_irq_state +ffffffff81e71b00 t nbio_v7_4_process_err_event_athub_irq +ffffffff81e72000 t nbio_v7_7_get_hdp_flush_req_offset +ffffffff81e72040 t nbio_v7_7_get_hdp_flush_done_offset +ffffffff81e72080 t nbio_v7_7_get_pcie_index_offset +ffffffff81e720c0 t nbio_v7_7_get_pcie_data_offset +ffffffff81e72100 t nbio_v7_7_get_pcie_port_index_offset +ffffffff81e72130 t nbio_v7_7_get_pcie_port_data_offset +ffffffff81e72170 t nbio_v7_7_get_rev_id +ffffffff81e721f0 t nbio_v7_7_mc_access_enable +ffffffff81e722a0 t nbio_v7_7_get_memsize +ffffffff81e72310 t nbio_v7_7_sdma_doorbell_range +ffffffff81e723a0 t nbio_v7_7_vcn_doorbell_range +ffffffff81e72420 t nbio_v7_7_enable_doorbell_aperture +ffffffff81e72500 t nbio_v7_7_enable_doorbell_selfring_aperture +ffffffff81e72660 t nbio_v7_7_ih_doorbell_range +ffffffff81e72770 t nbio_v7_7_update_medium_grain_clock_gating +ffffffff81e728b0 t nbio_v7_7_update_medium_grain_light_sleep +ffffffff81e72ac0 t nbio_v7_7_get_clockgating_state +ffffffff81e72bd0 t nbio_v7_7_ih_control +ffffffff81e72d20 t nbio_v7_7_init_registers +ffffffff81e72e20 t nbio_v7_7_remap_hdp_registers +ffffffff81e73000 T nv_grbm_select +ffffffff81e730a0 T nv_set_virt_ops +ffffffff81e730e0 t nv_common_early_init +ffffffff81e734d0 t nv_common_late_init +ffffffff81e73540 t nv_common_sw_init +ffffffff81e73580 t nv_common_sw_fini +ffffffff81e735b0 t nv_common_hw_init +ffffffff81e736c0 t nv_common_hw_fini +ffffffff81e73720 t nv_common_suspend +ffffffff81e73780 t nv_common_resume +ffffffff81e737c0 t nv_common_is_idle +ffffffff81e737f0 t nv_common_wait_for_idle +ffffffff81e73820 t nv_common_soft_reset +ffffffff81e73850 t nv_common_set_clockgating_state +ffffffff81e73920 t nv_common_set_powergating_state +ffffffff81e73950 t nv_common_get_clockgating_state +ffffffff81e739c0 t nv_pcie_rreg +ffffffff81e73a20 t nv_pcie_wreg +ffffffff81e73a80 t nv_pcie_rreg64 +ffffffff81e73ae0 t nv_pcie_wreg64 +ffffffff81e73b40 t nv_didt_rreg +ffffffff81e73be0 t nv_didt_wreg +ffffffff81e73c60 t nv_read_disabled_bios +ffffffff81e73c90 t nv_read_register +ffffffff81e73d80 t nv_vga_set_state +ffffffff81e73db0 t nv_asic_reset +ffffffff81e73ef0 t nv_asic_reset_method +ffffffff81e73fe0 t nv_get_xclk +ffffffff81e74010 t nv_set_uvd_clocks +ffffffff81e74040 t nv_set_vce_clocks +ffffffff81e74070 t nv_get_config_memsize +ffffffff81e74090 t nv_need_full_reset +ffffffff81e740c0 t nv_init_doorbell_index +ffffffff81e741f0 t nv_need_reset_on_init +ffffffff81e74280 t nv_get_pcie_replay_count +ffffffff81e742b0 t nv_pre_asic_init +ffffffff81e742e0 t nv_update_umd_stable_pstate +ffffffff81e743a0 t nv_query_video_codecs +ffffffff81e75000 T psp_v10_0_set_psp_funcs +ffffffff81e75030 t psp_v10_0_init_microcode +ffffffff81e752a0 t psp_v10_0_ring_init +ffffffff81e75320 t psp_v10_0_ring_create +ffffffff81e75630 t psp_v10_0_ring_stop +ffffffff81e75820 t psp_v10_0_ring_destroy +ffffffff81e758a0 t psp_v10_0_mode1_reset +ffffffff81e758f0 t psp_v10_0_ring_get_wptr +ffffffff81e75950 t psp_v10_0_ring_set_wptr +ffffffff81e76000 T psp_v11_0_set_psp_funcs +ffffffff81e76030 t psp_v11_0_init_microcode +ffffffff81e76450 t psp_v11_0_bootloader_load_kdb +ffffffff81e76470 t psp_v11_0_bootloader_load_spl +ffffffff81e76490 t psp_v11_0_bootloader_load_sysdrv +ffffffff81e764b0 t psp_v11_0_bootloader_load_sos +ffffffff81e76800 t psp_v11_0_ring_init +ffffffff81e76880 t psp_v11_0_ring_create +ffffffff81e76f10 t psp_v11_0_ring_stop +ffffffff81e77130 t psp_v11_0_ring_destroy +ffffffff81e771b0 t psp_v11_0_mode1_reset +ffffffff81e772b0 t psp_v11_0_memory_training +ffffffff81e77730 t psp_v11_0_ring_get_wptr +ffffffff81e77780 t psp_v11_0_ring_set_wptr +ffffffff81e778c0 t psp_v11_0_load_usbc_pd_fw +ffffffff81e77ab0 t psp_v11_0_read_usbc_pd_fw +ffffffff81e77bd0 t release_firmware +ffffffff81e77c10 t psp_v11_0_bootloader_load_component +ffffffff81e77dd0 t psp_v11_0_wait_for_bootloader +ffffffff81e77fa0 t psp_v11_0_memory_training_send_msg +ffffffff81e79000 T psp_v11_0_8_set_psp_funcs +ffffffff81e79030 t psp_v11_0_8_ring_init +ffffffff81e790b0 t psp_v11_0_8_ring_create +ffffffff81e79740 t psp_v11_0_8_ring_stop +ffffffff81e79ad0 t psp_v11_0_8_ring_destroy +ffffffff81e79b50 t psp_v11_0_8_ring_get_wptr +ffffffff81e79bc0 t psp_v11_0_8_ring_set_wptr +ffffffff81e7a000 T psp_v12_0_set_psp_funcs +ffffffff81e7a030 t psp_v12_0_init_microcode +ffffffff81e7a2a0 t psp_v12_0_bootloader_load_sysdrv +ffffffff81e7a5c0 t psp_v12_0_bootloader_load_sos +ffffffff81e7a920 t psp_v12_0_ring_init +ffffffff81e7af00 t psp_v12_0_ring_create +ffffffff81e7b460 t psp_v12_0_ring_stop +ffffffff81e7b680 t psp_v12_0_ring_destroy +ffffffff81e7b700 t psp_v12_0_mode1_reset +ffffffff81e7b800 t psp_v12_0_ring_get_wptr +ffffffff81e7b870 t psp_v12_0_ring_set_wptr +ffffffff81e7c000 T psp_v13_0_set_psp_funcs +ffffffff81e7c030 t psp_v13_0_init_microcode +ffffffff81e7c160 t psp_v13_0_bootloader_load_kdb +ffffffff81e7c180 t psp_v13_0_bootloader_load_spl +ffffffff81e7c1a0 t psp_v13_0_bootloader_load_sysdrv +ffffffff81e7c1c0 t psp_v13_0_bootloader_load_soc_drv +ffffffff81e7c1e0 t psp_v13_0_bootloader_load_intf_drv +ffffffff81e7c200 t psp_v13_0_bootloader_load_dbg_drv +ffffffff81e7c220 t psp_v13_0_bootloader_load_ras_drv +ffffffff81e7c240 t psp_v13_0_bootloader_load_sos +ffffffff81e7c5a0 t psp_v13_0_ring_init +ffffffff81e7c620 t psp_v13_0_ring_create +ffffffff81e7ccb0 t psp_v13_0_ring_stop +ffffffff81e7d040 t psp_v13_0_ring_destroy +ffffffff81e7d0c0 t psp_v13_0_memory_training +ffffffff81e7d4f0 t psp_v13_0_ring_get_wptr +ffffffff81e7d560 t psp_v13_0_ring_set_wptr +ffffffff81e7d660 t psp_v13_0_load_usbc_pd_fw +ffffffff81e7d850 t psp_v13_0_read_usbc_pd_fw +ffffffff81e7d970 t psp_v13_0_update_spirom +ffffffff81e7db40 t psp_v13_0_vbflash_status +ffffffff81e7dba0 t psp_v13_0_bootloader_load_component +ffffffff81e7dd70 t psp_v13_0_wait_for_bootloader +ffffffff81e7df40 t psp_v13_0_memory_training_send_msg +ffffffff81e7e0a0 t psp_v13_0_exec_spi_cmd +ffffffff81e7f000 T psp_v13_0_4_set_psp_funcs +ffffffff81e7f030 t psp_v13_0_4_init_microcode +ffffffff81e7f100 t psp_v13_0_4_bootloader_load_kdb +ffffffff81e7f120 t psp_v13_0_4_bootloader_load_spl +ffffffff81e7f140 t psp_v13_0_4_bootloader_load_sysdrv +ffffffff81e7f160 t psp_v13_0_4_bootloader_load_soc_drv +ffffffff81e7f180 t psp_v13_0_4_bootloader_load_intf_drv +ffffffff81e7f1a0 t psp_v13_0_4_bootloader_load_dbg_drv +ffffffff81e7f1c0 t psp_v13_0_4_bootloader_load_sos +ffffffff81e7f530 t psp_v13_0_4_ring_init +ffffffff81e7f5b0 t psp_v13_0_4_ring_create +ffffffff81e7fc50 t psp_v13_0_4_ring_stop +ffffffff81e7ffe0 t psp_v13_0_4_ring_destroy +ffffffff81e80060 t psp_v13_0_4_ring_get_wptr +ffffffff81e800d0 t psp_v13_0_4_ring_set_wptr +ffffffff81e801d0 t psp_v13_0_4_bootloader_load_component +ffffffff81e803a0 t psp_v13_0_4_wait_for_bootloader +ffffffff81e81000 T psp_v3_1_set_psp_funcs +ffffffff81e81030 t psp_v3_1_init_microcode +ffffffff81e810f0 t psp_v3_1_bootloader_load_sysdrv +ffffffff81e81410 t psp_v3_1_bootloader_load_sos +ffffffff81e81770 t psp_v3_1_ring_init +ffffffff81e817f0 t psp_v3_1_ring_create +ffffffff81e822f0 t psp_v3_1_ring_stop +ffffffff81e82510 t psp_v3_1_ring_destroy +ffffffff81e82590 t psp_v3_1_smu_reload_quirk +ffffffff81e825e0 t psp_v3_1_mode1_reset +ffffffff81e826e0 t psp_v3_1_ring_get_wptr +ffffffff81e82730 t psp_v3_1_ring_set_wptr +ffffffff81e83000 t sdma_v2_4_early_init +ffffffff81e830f0 t sdma_v2_4_sw_init +ffffffff81e83580 t sdma_v2_4_sw_fini +ffffffff81e83660 t sdma_v2_4_hw_init +ffffffff81e83a10 t sdma_v2_4_hw_fini +ffffffff81e83a50 t sdma_v2_4_suspend +ffffffff81e83a90 t sdma_v2_4_resume +ffffffff81e83aa0 t sdma_v2_4_is_idle +ffffffff81e83ae0 t sdma_v2_4_wait_for_idle +ffffffff81e83b80 t sdma_v2_4_soft_reset +ffffffff81e83cc0 t sdma_v2_4_set_clockgating_state +ffffffff81e83cf0 t sdma_v2_4_set_powergating_state +ffffffff81e83d20 t sdma_v2_4_ring_get_rptr +ffffffff81e83d60 t sdma_v2_4_ring_get_wptr +ffffffff81e83dc0 t sdma_v2_4_ring_set_wptr +ffffffff81e83e00 t sdma_v2_4_ring_emit_ib +ffffffff81e840b0 t sdma_v2_4_ring_emit_fence +ffffffff81e844b0 t sdma_v2_4_ring_emit_pipeline_sync +ffffffff81e84730 t sdma_v2_4_ring_emit_vm_flush +ffffffff81e849a0 t sdma_v2_4_ring_emit_hdp_flush +ffffffff81e84c20 t sdma_v2_4_ring_test_ring +ffffffff81e84f00 t sdma_v2_4_ring_test_ib +ffffffff81e850d0 t sdma_v2_4_ring_insert_nop +ffffffff81e85200 t sdma_v2_4_ring_pad_ib +ffffffff81e85330 t sdma_v2_4_ring_emit_wreg +ffffffff81e85480 t sdma_v2_4_emit_copy_buffer +ffffffff81e85540 t sdma_v2_4_emit_fill_buffer +ffffffff81e855d0 t sdma_v2_4_vm_copy_pte +ffffffff81e85690 t sdma_v2_4_vm_write_pte +ffffffff81e85760 t sdma_v2_4_vm_set_pte_pde +ffffffff81e85860 t sdma_v2_4_set_trap_irq_state +ffffffff81e85920 t sdma_v2_4_process_trap_irq +ffffffff81e859c0 t sdma_v2_4_process_illegal_inst_irq +ffffffff81e85a40 t sdma_v2_4_enable +ffffffff81e86000 t sdma_v3_0_early_init +ffffffff81e86100 t sdma_v3_0_sw_init +ffffffff81e865b0 t sdma_v3_0_sw_fini +ffffffff81e86690 t sdma_v3_0_hw_init +ffffffff81e867c0 t sdma_v3_0_hw_fini +ffffffff81e86810 t sdma_v3_0_suspend +ffffffff81e86860 t sdma_v3_0_resume +ffffffff81e86870 t sdma_v3_0_is_idle +ffffffff81e868b0 t sdma_v3_0_wait_for_idle +ffffffff81e86950 t sdma_v3_0_check_soft_reset +ffffffff81e869b0 t sdma_v3_0_pre_soft_reset +ffffffff81e86a00 t sdma_v3_0_soft_reset +ffffffff81e86ad0 t sdma_v3_0_post_soft_reset +ffffffff81e86b20 t sdma_v3_0_set_clockgating_state +ffffffff81e86d80 t sdma_v3_0_set_powergating_state +ffffffff81e86db0 t sdma_v3_0_get_clockgating_state +ffffffff81e86e30 t sdma_v3_0_ring_get_rptr +ffffffff81e86e70 t sdma_v3_0_ring_get_wptr +ffffffff81e86ef0 t sdma_v3_0_ring_set_wptr +ffffffff81e86fa0 t sdma_v3_0_ring_emit_ib +ffffffff81e87250 t sdma_v3_0_ring_emit_fence +ffffffff81e87650 t sdma_v3_0_ring_emit_pipeline_sync +ffffffff81e878d0 t sdma_v3_0_ring_emit_vm_flush +ffffffff81e87b40 t sdma_v3_0_ring_emit_hdp_flush +ffffffff81e87dc0 t sdma_v3_0_ring_test_ring +ffffffff81e880a0 t sdma_v3_0_ring_test_ib +ffffffff81e88270 t sdma_v3_0_ring_insert_nop +ffffffff81e883a0 t sdma_v3_0_ring_pad_ib +ffffffff81e884d0 t sdma_v3_0_ring_emit_wreg +ffffffff81e88620 t sdma_v3_0_emit_copy_buffer +ffffffff81e886e0 t sdma_v3_0_emit_fill_buffer +ffffffff81e88770 t sdma_v3_0_vm_copy_pte +ffffffff81e88830 t sdma_v3_0_vm_write_pte +ffffffff81e88900 t sdma_v3_0_vm_set_pte_pde +ffffffff81e88a00 t sdma_v3_0_set_trap_irq_state +ffffffff81e88ac0 t sdma_v3_0_process_trap_irq +ffffffff81e88b60 t sdma_v3_0_process_illegal_inst_irq +ffffffff81e88be0 t sdma_v3_0_ctx_switch_enable +ffffffff81e88d80 t sdma_v3_0_enable +ffffffff81e88ef0 t sdma_v3_0_gfx_resume +ffffffff81e8a000 t sdma_v4_0_early_init +ffffffff81e8a5b0 t sdma_v4_0_late_init +ffffffff81e8a850 t sdma_v4_0_sw_init +ffffffff81e8abc0 t sdma_v4_0_sw_fini +ffffffff81e8ac80 t sdma_v4_0_hw_init +ffffffff81e8dc00 t sdma_v4_0_hw_fini +ffffffff81e8dcc0 t sdma_v4_0_suspend +ffffffff81e8dd10 t sdma_v4_0_resume +ffffffff81e8dd90 t sdma_v4_0_is_idle +ffffffff81e8dec0 t sdma_v4_0_wait_for_idle +ffffffff81e8e060 t sdma_v4_0_soft_reset +ffffffff81e8e090 t sdma_v4_0_set_clockgating_state +ffffffff81e8e590 t sdma_v4_0_set_powergating_state +ffffffff81e8e650 t sdma_v4_0_get_clockgating_state +ffffffff81e8e6f0 t sdma_v4_0_query_ras_error_count +ffffffff81e8e8c0 t sdma_v4_0_reset_ras_error_count +ffffffff81e8ea10 t sdma_v4_0_ring_get_rptr +ffffffff81e8ea70 t sdma_v4_0_ring_get_wptr +ffffffff81e8ec60 t sdma_v4_0_ring_set_wptr +ffffffff81e8eee0 t sdma_v4_0_ring_emit_ib +ffffffff81e8f190 t sdma_v4_0_ring_emit_fence +ffffffff81e8f5b0 t sdma_v4_0_ring_emit_pipeline_sync +ffffffff81e8f610 t sdma_v4_0_ring_emit_vm_flush +ffffffff81e8f630 t sdma_v4_0_ring_emit_hdp_flush +ffffffff81e8f6e0 t sdma_v4_0_ring_test_ring +ffffffff81e8f9c0 t sdma_v4_0_ring_test_ib +ffffffff81e8fb90 t sdma_v4_0_ring_insert_nop +ffffffff81e8fcc0 t sdma_v4_0_ring_pad_ib +ffffffff81e8fdf0 t sdma_v4_0_ring_emit_wreg +ffffffff81e8ff40 t sdma_v4_0_ring_emit_reg_wait +ffffffff81e8ff90 t sdma_v4_0_wait_reg_mem +ffffffff81e902a0 t sdma_v4_0_page_ring_get_wptr +ffffffff81e90450 t sdma_v4_0_page_ring_set_wptr +ffffffff81e90610 t sdma_v4_0_emit_copy_buffer +ffffffff81e906d0 t sdma_v4_0_emit_fill_buffer +ffffffff81e90760 t sdma_v4_0_vm_copy_pte +ffffffff81e90820 t sdma_v4_0_vm_write_pte +ffffffff81e908f0 t sdma_v4_0_vm_set_pte_pde +ffffffff81e909f0 t sdma_v4_0_set_trap_irq_state +ffffffff81e90b90 t sdma_v4_0_process_trap_irq +ffffffff81e90cd0 t sdma_v4_0_process_illegal_inst_irq +ffffffff81e90df0 t sdma_v4_0_set_ecc_irq_state +ffffffff81e90f90 t sdma_v4_0_process_vm_hole_irq +ffffffff81e90fd0 t sdma_v4_0_print_iv_entry +ffffffff81e91110 t sdma_v4_0_process_doorbell_invalid_irq +ffffffff81e91150 t sdma_v4_0_process_pool_timeout_irq +ffffffff81e91190 t sdma_v4_0_process_srbm_write_irq +ffffffff81e911d0 t sdma_v4_0_process_ras_data_cb +ffffffff81e91250 t sdma_v4_0_ctx_switch_enable +ffffffff81e91920 t sdma_v4_0_enable +ffffffff81e91ee0 t sdma_v4_0_gfx_enable +ffffffff81e93000 t sdma_v4_4_query_ras_error_count +ffffffff81e93250 t sdma_v4_4_reset_ras_error_count +ffffffff81e94000 t sdma_v5_0_early_init +ffffffff81e94130 t sdma_v5_0_sw_init +ffffffff81e94410 t sdma_v5_0_sw_fini +ffffffff81e944a0 t sdma_v5_0_hw_init +ffffffff81e95710 t sdma_v5_0_hw_fini +ffffffff81e95770 t sdma_v5_0_suspend +ffffffff81e957d0 t sdma_v5_0_resume +ffffffff81e957e0 t sdma_v5_0_is_idle +ffffffff81e95870 t sdma_v5_0_wait_for_idle +ffffffff81e95930 t sdma_v5_0_soft_reset +ffffffff81e95960 t sdma_v5_0_set_clockgating_state +ffffffff81e95b60 t sdma_v5_0_set_powergating_state +ffffffff81e95b90 t sdma_v5_0_get_clockgating_state +ffffffff81e95c30 t sdma_v5_0_ring_get_rptr +ffffffff81e95c90 t sdma_v5_0_ring_get_wptr +ffffffff81e95e30 t sdma_v5_0_ring_set_wptr +ffffffff81e96180 t sdma_v5_0_ring_emit_ib +ffffffff81e96440 t sdma_v5_0_ring_emit_fence +ffffffff81e968a0 t sdma_v5_0_ring_emit_pipeline_sync +ffffffff81e96b20 t sdma_v5_0_ring_emit_vm_flush +ffffffff81e96b40 t sdma_v5_0_ring_emit_hdp_flush +ffffffff81e96de0 t sdma_v5_0_ring_test_ring +ffffffff81e971a0 t sdma_v5_0_ring_test_ib +ffffffff81e974d0 t sdma_v5_0_ring_insert_nop +ffffffff81e97600 t sdma_v5_0_ring_pad_ib +ffffffff81e97730 t sdma_v5_0_ring_init_cond_exec +ffffffff81e97960 t sdma_v5_0_ring_patch_cond_exec +ffffffff81e97a20 t sdma_v5_0_ring_emit_wreg +ffffffff81e97b70 t sdma_v5_0_ring_emit_reg_wait +ffffffff81e97df0 t sdma_v5_0_ring_emit_reg_write_reg_wait +ffffffff81e97e70 t sdma_v5_0_ring_preempt_ib +ffffffff81e97fb0 t sdma_v5_0_ring_emit_mem_sync +ffffffff81e981c0 t sdma_v5_0_emit_copy_buffer +ffffffff81e98280 t sdma_v5_0_emit_fill_buffer +ffffffff81e98310 t sdma_v5_0_vm_copy_pte +ffffffff81e983d0 t sdma_v5_0_vm_write_pte +ffffffff81e984a0 t sdma_v5_0_vm_set_pte_pde +ffffffff81e985a0 t sdma_v5_0_set_trap_irq_state +ffffffff81e98630 t sdma_v5_0_process_trap_irq +ffffffff81e98740 t sdma_v5_0_process_illegal_inst_irq +ffffffff81e98770 t sdma_v5_0_mqd_init +ffffffff81e98850 t sdma_v5_0_ctx_switch_enable +ffffffff81e98b70 t sdma_v5_0_enable +ffffffff81e99000 t sdma_v5_2_early_init +ffffffff81e99130 t sdma_v5_2_sw_init +ffffffff81e99400 t sdma_v5_2_sw_fini +ffffffff81e99490 t sdma_v5_2_hw_init +ffffffff81e997c0 t sdma_v5_2_hw_fini +ffffffff81e99820 t sdma_v5_2_suspend +ffffffff81e99880 t sdma_v5_2_resume +ffffffff81e99890 t sdma_v5_2_is_idle +ffffffff81e99940 t sdma_v5_2_wait_for_idle +ffffffff81e99a40 t sdma_v5_2_soft_reset +ffffffff81e99ce0 t sdma_v5_2_set_clockgating_state +ffffffff81e9a000 t sdma_v5_2_set_powergating_state +ffffffff81e9a030 t sdma_v5_2_get_clockgating_state +ffffffff81e9a0c0 t sdma_v5_2_ring_get_rptr +ffffffff81e9a120 t sdma_v5_2_ring_get_wptr +ffffffff81e9a260 t sdma_v5_2_ring_set_wptr +ffffffff81e9a410 t sdma_v5_2_ring_emit_ib +ffffffff81e9a6d0 t sdma_v5_2_ring_emit_fence +ffffffff81e9ab30 t sdma_v5_2_ring_emit_pipeline_sync +ffffffff81e9adb0 t sdma_v5_2_ring_emit_vm_flush +ffffffff81e9add0 t sdma_v5_2_ring_emit_hdp_flush +ffffffff81e9b070 t sdma_v5_2_ring_test_ring +ffffffff81e9b430 t sdma_v5_2_ring_test_ib +ffffffff81e9b760 t sdma_v5_2_ring_insert_nop +ffffffff81e9b890 t sdma_v5_2_ring_pad_ib +ffffffff81e9b9c0 t sdma_v5_2_ring_init_cond_exec +ffffffff81e9bbf0 t sdma_v5_2_ring_patch_cond_exec +ffffffff81e9bcb0 t sdma_v5_2_ring_begin_use +ffffffff81e9bcd0 t sdma_v5_2_ring_end_use +ffffffff81e9bcf0 t sdma_v5_2_ring_emit_wreg +ffffffff81e9be40 t sdma_v5_2_ring_emit_reg_wait +ffffffff81e9c0c0 t sdma_v5_2_ring_emit_reg_write_reg_wait +ffffffff81e9c140 t sdma_v5_2_ring_preempt_ib +ffffffff81e9c2b0 t sdma_v5_2_ring_emit_mem_sync +ffffffff81e9c4c0 t sdma_v5_2_emit_copy_buffer +ffffffff81e9c580 t sdma_v5_2_emit_fill_buffer +ffffffff81e9c610 t sdma_v5_2_vm_copy_pte +ffffffff81e9c6d0 t sdma_v5_2_vm_write_pte +ffffffff81e9c7a0 t sdma_v5_2_vm_set_pte_pde +ffffffff81e9c8a0 t sdma_v5_2_set_trap_irq_state +ffffffff81e9c960 t sdma_v5_2_process_trap_irq +ffffffff81e9caa0 t sdma_v5_2_process_illegal_inst_irq +ffffffff81e9cad0 t sdma_v5_2_mqd_init +ffffffff81e9cbb0 t sdma_v5_2_ctx_switch_enable +ffffffff81e9cfc0 t sdma_v5_2_enable +ffffffff81e9d3c0 t sdma_v5_2_gfx_resume +ffffffff81e9f000 t sdma_v6_0_early_init +ffffffff81e9f100 t sdma_v6_0_sw_init +ffffffff81e9f2e0 t sdma_v6_0_sw_fini +ffffffff81e9f370 t sdma_v6_0_hw_init +ffffffff81e9f380 t sdma_v6_0_hw_fini +ffffffff81e9f3d0 t sdma_v6_0_suspend +ffffffff81e9f420 t sdma_v6_0_resume +ffffffff81e9f430 t sdma_v6_0_is_idle +ffffffff81e9f4c0 t sdma_v6_0_wait_for_idle +ffffffff81e9f580 t sdma_v6_0_check_soft_reset +ffffffff81e9f640 t sdma_v6_0_soft_reset +ffffffff81e9fad0 t sdma_v6_0_set_clockgating_state +ffffffff81e9fb00 t sdma_v6_0_set_powergating_state +ffffffff81e9fb30 t sdma_v6_0_get_clockgating_state +ffffffff81e9fb60 t sdma_v6_0_ring_get_rptr +ffffffff81e9fbc0 t sdma_v6_0_ring_get_wptr +ffffffff81e9fc30 t sdma_v6_0_ring_set_wptr +ffffffff81e9ff80 t sdma_v6_0_ring_emit_ib +ffffffff81ea0240 t sdma_v6_0_ring_emit_fence +ffffffff81ea06a0 t sdma_v6_0_ring_emit_pipeline_sync +ffffffff81ea0920 t sdma_v6_0_ring_emit_vm_flush +ffffffff81ea0940 t sdma_v6_0_ring_emit_hdp_flush +ffffffff81ea0be0 t sdma_v6_0_ring_test_ring +ffffffff81ea0fa0 t sdma_v6_0_ring_test_ib +ffffffff81ea12d0 t sdma_v6_0_ring_insert_nop +ffffffff81ea1400 t sdma_v6_0_ring_pad_ib +ffffffff81ea1530 t sdma_v6_0_ring_init_cond_exec +ffffffff81ea1760 t sdma_v6_0_ring_patch_cond_exec +ffffffff81ea1820 t sdma_v6_0_ring_emit_wreg +ffffffff81ea1970 t sdma_v6_0_ring_emit_reg_wait +ffffffff81ea1bf0 t sdma_v6_0_ring_emit_reg_write_reg_wait +ffffffff81ea1c70 t sdma_v6_0_ring_preempt_ib +ffffffff81ea1dc0 t sdma_v6_0_ring_emit_mem_sync +ffffffff81ea1fd0 t sdma_v6_0_emit_copy_buffer +ffffffff81ea2090 t sdma_v6_0_emit_fill_buffer +ffffffff81ea2120 t sdma_v6_0_vm_copy_pte +ffffffff81ea21e0 t sdma_v6_0_vm_write_pte +ffffffff81ea22b0 t sdma_v6_0_vm_set_pte_pde +ffffffff81ea23b0 t sdma_v6_0_set_trap_irq_state +ffffffff81ea2440 t sdma_v6_0_process_trap_irq +ffffffff81ea2570 t sdma_v6_0_process_illegal_inst_irq +ffffffff81ea25a0 t sdma_v6_0_mqd_init +ffffffff81ea26b0 t sdma_v6_0_start +ffffffff81ea2910 t sdma_v6_0_enable +ffffffff81ea2a90 t sdma_v6_0_gfx_resume +ffffffff81ea3a90 t sdma_v6_0_gfx_stop +ffffffff81ea4000 T sienna_cichlid_reset_init +ffffffff81ea40c0 t sienna_cichlid_async_reset +ffffffff81ea4120 t sienna_cichlid_get_reset_handler +ffffffff81ea4180 T sienna_cichlid_reset_fini +ffffffff81ea41e0 t sienna_cichlid_mode2_prepare_hwcontext +ffffffff81ea4330 t sienna_cichlid_mode2_perform_reset +ffffffff81ea43b0 t sienna_cichlid_mode2_restore_hwcontext +ffffffff81ea46a0 t sienna_cichlid_mode2_reset +ffffffff81ea5000 T smu_v11_0_i2c_control_init +ffffffff81ea50d0 T smu_v11_0_i2c_control_fini +ffffffff81ea5110 t smu_v11_0_i2c_xfer +ffffffff81ea6240 t smu_v11_0_i2c_func +ffffffff81ea6270 t smu_v11_0_i2c_enable +ffffffff81ea63b0 t smu_v11_0_i2c_abort +ffffffff81ea64b0 t lock_bus +ffffffff81ea6550 t trylock_bus +ffffffff81ea65a0 t unlock_bus +ffffffff81ea7000 t smuio_v11_0_get_rom_index_offset +ffffffff81ea7040 t smuio_v11_0_get_rom_data_offset +ffffffff81ea7080 t smuio_v11_0_update_rom_clock_gating +ffffffff81ea71c0 t smuio_v11_0_get_clock_gating_state +ffffffff81ea8000 t smuio_v11_0_6_get_rom_index_offset +ffffffff81ea8040 t smuio_v11_0_6_get_rom_data_offset +ffffffff81ea8080 t smuio_v11_0_6_update_rom_clock_gating +ffffffff81ea81c0 t smuio_v11_0_6_get_clock_gating_state +ffffffff81ea9000 t smuio_v13_0_get_rom_index_offset +ffffffff81ea9040 t smuio_v13_0_get_rom_data_offset +ffffffff81ea9080 t smuio_v13_0_update_rom_clock_gating +ffffffff81ea91c0 t smuio_v13_0_get_clock_gating_state +ffffffff81ea9260 t smuio_v13_0_get_die_id +ffffffff81ea92e0 t smuio_v13_0_get_socket_id +ffffffff81ea9360 t smuio_v13_0_is_host_gpu_xgmi_supported +ffffffff81eaa000 t smuio_v13_0_6_get_rom_index_offset +ffffffff81eaa040 t smuio_v13_0_6_get_rom_data_offset +ffffffff81eab000 t smuio_v9_0_get_rom_index_offset +ffffffff81eab040 t smuio_v9_0_get_rom_data_offset +ffffffff81eab080 t smuio_v9_0_update_rom_clock_gating +ffffffff81eab1c0 t smuio_v9_0_get_clock_gating_state +ffffffff81eac000 T soc15_grbm_select +ffffffff81eac080 T soc15_program_register_sequence +ffffffff81eac280 T soc15_set_virt_ops +ffffffff81eac2f0 t soc15_common_early_init +ffffffff81eac680 t soc15_common_late_init +ffffffff81eac6c0 t soc15_common_sw_init +ffffffff81eac720 t soc15_common_sw_fini +ffffffff81eac770 t soc15_common_hw_init +ffffffff81eac8a0 t soc15_common_hw_fini +ffffffff81eac970 t soc15_common_suspend +ffffffff81eac9b0 t soc15_common_resume +ffffffff81eac9f0 t soc15_common_is_idle +ffffffff81eaca20 t soc15_common_wait_for_idle +ffffffff81eaca50 t soc15_common_soft_reset +ffffffff81eaca80 t soc15_common_set_clockgating_state +ffffffff81eacdc0 t soc15_common_set_powergating_state +ffffffff81eacdf0 t soc15_common_get_clockgating_state +ffffffff81eaced0 t soc15_pcie_rreg +ffffffff81eacf30 t soc15_pcie_wreg +ffffffff81eacf90 t soc15_pcie_rreg64 +ffffffff81eacff0 t soc15_pcie_wreg64 +ffffffff81ead050 t soc15_uvd_ctx_rreg +ffffffff81ead0f0 t soc15_uvd_ctx_wreg +ffffffff81ead180 t soc15_didt_rreg +ffffffff81ead220 t soc15_didt_wreg +ffffffff81ead2a0 t soc15_gc_cac_rreg +ffffffff81ead3c0 t soc15_gc_cac_wreg +ffffffff81ead4d0 t soc15_se_cac_rreg +ffffffff81ead5f0 t soc15_se_cac_wreg +ffffffff81ead700 t soc15_read_disabled_bios +ffffffff81ead730 t soc15_read_register +ffffffff81ead830 t soc15_vga_set_state +ffffffff81ead860 t soc15_asic_reset +ffffffff81ead960 t soc15_asic_reset_method +ffffffff81eadae0 t soc15_get_xclk +ffffffff81eadb30 t soc15_set_uvd_clocks +ffffffff81eadb60 t soc15_set_vce_clocks +ffffffff81eadb90 t soc15_get_config_memsize +ffffffff81eadbb0 t soc15_need_full_reset +ffffffff81eadbe0 t soc15_get_pcie_usage +ffffffff81eadd10 t soc15_need_reset_on_init +ffffffff81eaddb0 t soc15_get_pcie_replay_count +ffffffff81eade20 t soc15_supports_baco +ffffffff81eade80 t soc15_pre_asic_init +ffffffff81eade90 t soc15_query_video_codecs +ffffffff81eadf40 t vega20_get_pcie_usage +ffffffff81eaf000 T soc21_grbm_select +ffffffff81eaf080 t soc21_common_early_init +ffffffff81eaf2d0 t soc21_common_late_init +ffffffff81eaf300 t soc21_common_sw_init +ffffffff81eaf330 t soc21_common_sw_fini +ffffffff81eaf360 t soc21_common_hw_init +ffffffff81eaf430 t soc21_common_hw_fini +ffffffff81eaf490 t soc21_common_suspend +ffffffff81eaf4f0 t soc21_common_resume +ffffffff81eaf5c0 t soc21_common_is_idle +ffffffff81eaf5f0 t soc21_common_wait_for_idle +ffffffff81eaf620 t soc21_common_soft_reset +ffffffff81eaf650 t soc21_common_set_clockgating_state +ffffffff81eaf700 t soc21_common_set_powergating_state +ffffffff81eaf760 t soc21_common_get_clockgating_state +ffffffff81eaf7b0 t soc21_pcie_rreg +ffffffff81eaf810 t soc21_pcie_wreg +ffffffff81eaf870 t soc21_pcie_rreg64 +ffffffff81eaf8d0 t soc21_pcie_wreg64 +ffffffff81eaf930 t soc21_didt_rreg +ffffffff81eaf9d0 t soc21_didt_wreg +ffffffff81eafa50 t soc21_read_disabled_bios +ffffffff81eafa80 t soc21_read_register +ffffffff81eafb70 t soc21_vga_set_state +ffffffff81eafba0 t soc21_asic_reset +ffffffff81eafc80 t soc21_asic_reset_method +ffffffff81eafd40 t soc21_get_xclk +ffffffff81eafd70 t soc21_set_uvd_clocks +ffffffff81eafda0 t soc21_set_vce_clocks +ffffffff81eafdd0 t soc21_get_config_memsize +ffffffff81eafdf0 t soc21_need_full_reset +ffffffff81eafe50 t soc21_init_doorbell_index +ffffffff81eaff70 t soc21_need_reset_on_init +ffffffff81eb0000 t soc21_get_pcie_replay_count +ffffffff81eb0030 t soc21_pre_asic_init +ffffffff81eb0060 t soc21_update_umd_stable_pstate +ffffffff81eb00d0 t soc21_query_video_codecs +ffffffff81eb1000 t tonga_ih_early_init +ffffffff81eb1050 t tonga_ih_sw_init +ffffffff81eb10d0 t tonga_ih_sw_fini +ffffffff81eb1110 t tonga_ih_hw_init +ffffffff81eb12f0 t tonga_ih_hw_fini +ffffffff81eb1390 t tonga_ih_suspend +ffffffff81eb1430 t tonga_ih_resume +ffffffff81eb1470 t tonga_ih_is_idle +ffffffff81eb14c0 t tonga_ih_wait_for_idle +ffffffff81eb1560 t tonga_ih_check_soft_reset +ffffffff81eb15c0 t tonga_ih_pre_soft_reset +ffffffff81eb1670 t tonga_ih_soft_reset +ffffffff81eb1740 t tonga_ih_post_soft_reset +ffffffff81eb1780 t tonga_ih_set_clockgating_state +ffffffff81eb17b0 t tonga_ih_set_powergating_state +ffffffff81eb17e0 t tonga_ih_get_wptr +ffffffff81eb18d0 t tonga_ih_decode_iv +ffffffff81eb1950 t tonga_ih_set_rptr +ffffffff81eb2000 t umc_v6_0_init_registers +ffffffff81eb3000 t umc_v6_1_query_ras_error_count +ffffffff81eb34e0 t umc_v6_1_query_ras_error_address +ffffffff81eb37c0 t umc_v6_1_err_cnt_init +ffffffff81eb4000 t umc_v6_7_query_ras_error_count +ffffffff81eb4400 t umc_v6_7_query_ras_error_address +ffffffff81eb4580 t umc_v6_7_query_ras_poison_mode +ffffffff81eb45e0 t umc_v6_7_convert_error_address +ffffffff81eb4900 t umc_v6_7_ecc_info_query_ras_error_count +ffffffff81eb4b20 t umc_v6_7_ecc_info_query_ras_error_address +ffffffff81eb5000 t umc_v8_10_query_ras_error_count +ffffffff81eb5280 t umc_v8_10_query_ras_error_address +ffffffff81eb5800 t umc_v8_10_err_cnt_init +ffffffff81eb5980 t umc_v8_10_query_ras_poison_mode +ffffffff81eb6000 t umc_v8_7_query_ras_error_count +ffffffff81eb6310 t umc_v8_7_query_ras_error_address +ffffffff81eb64d0 t umc_v8_7_err_cnt_init +ffffffff81eb6630 t umc_v8_7_ecc_info_query_ras_error_count +ffffffff81eb6750 t umc_v8_7_ecc_info_query_ras_error_address +ffffffff81eb7000 t uvd_v5_0_early_init +ffffffff81eb7050 t uvd_v5_0_sw_init +ffffffff81eb7140 t uvd_v5_0_sw_fini +ffffffff81eb7190 t uvd_v5_0_hw_init +ffffffff81eb7690 t uvd_v5_0_hw_fini +ffffffff81eb7710 t uvd_v5_0_suspend +ffffffff81eb7810 t uvd_v5_0_resume +ffffffff81eb7860 t uvd_v5_0_is_idle +ffffffff81eb78b0 t uvd_v5_0_wait_for_idle +ffffffff81eb7940 t uvd_v5_0_soft_reset +ffffffff81eb79e0 t uvd_v5_0_set_clockgating_state +ffffffff81eb7b80 t uvd_v5_0_set_powergating_state +ffffffff81eb7bc0 t uvd_v5_0_get_clockgating_state +ffffffff81eb7c40 t uvd_v5_0_ring_get_rptr +ffffffff81eb7c80 t uvd_v5_0_ring_get_wptr +ffffffff81eb7cc0 t uvd_v5_0_ring_set_wptr +ffffffff81eb7cf0 t uvd_v5_0_ring_emit_ib +ffffffff81eb7f60 t uvd_v5_0_ring_emit_fence +ffffffff81eb8510 t uvd_v5_0_ring_test_ring +ffffffff81eb86b0 t uvd_v5_0_ring_insert_nop +ffffffff81eb8810 t uvd_v5_0_set_interrupt_state +ffffffff81eb8840 t uvd_v5_0_process_interrupt +ffffffff81eb88a0 t uvd_v5_0_stop +ffffffff81eb89b0 t uvd_v5_0_start +ffffffff81eba000 t uvd_v6_0_early_init +ffffffff81eba160 t uvd_v6_0_sw_init +ffffffff81eba3c0 t uvd_v6_0_sw_fini +ffffffff81eba480 t uvd_v6_0_hw_init +ffffffff81ebaa30 t uvd_v6_0_hw_fini +ffffffff81ebaab0 t uvd_v6_0_suspend +ffffffff81ebabb0 t uvd_v6_0_resume +ffffffff81ebac00 t uvd_v6_0_is_idle +ffffffff81ebac50 t uvd_v6_0_wait_for_idle +ffffffff81ebace0 t uvd_v6_0_check_soft_reset +ffffffff81ebad60 t uvd_v6_0_pre_soft_reset +ffffffff81ebada0 t uvd_v6_0_soft_reset +ffffffff81ebae70 t uvd_v6_0_post_soft_reset +ffffffff81ebaf10 t uvd_v6_0_set_clockgating_state +ffffffff81ebb0a0 t uvd_v6_0_set_powergating_state +ffffffff81ebb110 t uvd_v6_0_get_clockgating_state +ffffffff81ebb1a0 t uvd_v6_0_ring_get_rptr +ffffffff81ebb1e0 t uvd_v6_0_ring_get_wptr +ffffffff81ebb220 t uvd_v6_0_ring_set_wptr +ffffffff81ebb250 t uvd_v6_0_ring_emit_ib +ffffffff81ebb5b0 t uvd_v6_0_ring_emit_fence +ffffffff81ebbb60 t uvd_v6_0_ring_emit_pipeline_sync +ffffffff81ebbf50 t uvd_v6_0_ring_emit_vm_flush +ffffffff81ebc2b0 t uvd_v6_0_ring_emit_hdp_flush +ffffffff81ebc2e0 t uvd_v6_0_ring_test_ring +ffffffff81ebc480 t uvd_v6_0_ring_insert_nop +ffffffff81ebc5e0 t uvd_v6_0_ring_emit_wreg +ffffffff81ebc860 t uvd_v6_0_enc_ring_get_rptr +ffffffff81ebc8c0 t uvd_v6_0_enc_ring_get_wptr +ffffffff81ebc920 t uvd_v6_0_enc_ring_set_wptr +ffffffff81ebc960 t uvd_v6_0_enc_ring_emit_ib +ffffffff81ebcba0 t uvd_v6_0_enc_ring_emit_fence +ffffffff81ebcde0 t uvd_v6_0_enc_ring_emit_pipeline_sync +ffffffff81ebcf90 t uvd_v6_0_enc_ring_emit_vm_flush +ffffffff81ebd1a0 t uvd_v6_0_enc_ring_test_ring +ffffffff81ebd2f0 t uvd_v6_0_enc_ring_test_ib +ffffffff81ebd7d0 t uvd_v6_0_enc_ring_insert_end +ffffffff81ebd860 t uvd_v6_0_set_interrupt_state +ffffffff81ebd890 t uvd_v6_0_process_interrupt +ffffffff81ebd990 t uvd_v6_0_stop +ffffffff81ebdaa0 t uvd_v6_0_start +ffffffff81ebf000 t uvd_v7_0_early_init +ffffffff81ebf280 t uvd_v7_0_sw_init +ffffffff81ebf680 t uvd_v7_0_sw_fini +ffffffff81ebf770 t uvd_v7_0_hw_init +ffffffff81ec2530 t uvd_v7_0_hw_fini +ffffffff81ec2840 t uvd_v7_0_suspend +ffffffff81ec28f0 t uvd_v7_0_resume +ffffffff81ec2940 t uvd_v7_0_set_clockgating_state +ffffffff81ec2970 t uvd_v7_0_ring_get_rptr +ffffffff81ec2a10 t uvd_v7_0_ring_get_wptr +ffffffff81ec2ab0 t uvd_v7_0_ring_set_wptr +ffffffff81ec2b30 t uvd_v7_0_ring_patch_cs_in_place +ffffffff81ec2ba0 t uvd_v7_0_ring_emit_ib +ffffffff81ec2f40 t uvd_v7_0_ring_emit_fence +ffffffff81ec3590 t uvd_v7_0_ring_emit_vm_flush +ffffffff81ec3600 t uvd_v7_0_ring_emit_hdp_flush +ffffffff81ec3630 t uvd_v7_0_ring_test_ring +ffffffff81ec38c0 t uvd_v7_0_ring_insert_nop +ffffffff81ec3a60 t uvd_v7_0_ring_emit_wreg +ffffffff81ec3d30 t uvd_v7_0_ring_emit_reg_wait +ffffffff81ec40e0 t uvd_v7_0_enc_ring_get_rptr +ffffffff81ec41d0 t uvd_v7_0_enc_ring_get_wptr +ffffffff81ec42d0 t uvd_v7_0_enc_ring_set_wptr +ffffffff81ec43d0 t uvd_v7_0_enc_ring_emit_ib +ffffffff81ec4610 t uvd_v7_0_enc_ring_emit_fence +ffffffff81ec4850 t uvd_v7_0_enc_ring_emit_vm_flush +ffffffff81ec48c0 t uvd_v7_0_enc_ring_test_ring +ffffffff81ec4a20 t uvd_v7_0_enc_ring_test_ib +ffffffff81ec4f00 t uvd_v7_0_enc_ring_insert_end +ffffffff81ec4f90 t uvd_v7_0_enc_ring_emit_wreg +ffffffff81ec50e0 t uvd_v7_0_enc_ring_emit_reg_wait +ffffffff81ec52a0 t uvd_v7_0_set_interrupt_state +ffffffff81ec52d0 t uvd_v7_0_process_interrupt +ffffffff81ec6000 t vce_v3_0_early_init +ffffffff81ec61a0 t vce_v3_0_sw_init +ffffffff81ec6300 t vce_v3_0_sw_fini +ffffffff81ec6350 t vce_v3_0_hw_init +ffffffff81ec6420 t vce_v3_0_hw_fini +ffffffff81ec6510 t vce_v3_0_suspend +ffffffff81ec65e0 t vce_v3_0_resume +ffffffff81ec66c0 t vce_v3_0_is_idle +ffffffff81ec6730 t vce_v3_0_wait_for_idle +ffffffff81ec67e0 t vce_v3_0_check_soft_reset +ffffffff81ec68e0 t vce_v3_0_pre_soft_reset +ffffffff81ec6980 t vce_v3_0_soft_reset +ffffffff81ec6a50 t vce_v3_0_post_soft_reset +ffffffff81ec6af0 t vce_v3_0_set_clockgating_state +ffffffff81ec6de0 t vce_v3_0_set_powergating_state +ffffffff81ec7600 t vce_v3_0_get_clockgating_state +ffffffff81ec76c0 t vce_v3_0_ring_get_rptr +ffffffff81ec7790 t vce_v3_0_ring_get_wptr +ffffffff81ec7860 t vce_v3_0_ring_set_wptr +ffffffff81ec7920 t vce_v3_0_ring_emit_ib +ffffffff81ec7b60 t vce_v3_0_emit_pipeline_sync +ffffffff81ec7d10 t vce_v3_0_emit_vm_flush +ffffffff81ec7f80 t vce_v3_0_set_interrupt_state +ffffffff81ec7ff0 t vce_v3_0_process_interrupt +ffffffff81ec80b0 t vce_v3_0_stop +ffffffff81ec9000 t vce_v4_0_early_init +ffffffff81ec90b0 t vce_v4_0_sw_init +ffffffff81ec9340 t vce_v4_0_sw_fini +ffffffff81ec93c0 t vce_v4_0_hw_init +ffffffff81ec9b80 t vce_v4_0_hw_fini +ffffffff81ec9cb0 t vce_v4_0_suspend +ffffffff81ec9dd0 t vce_v4_0_resume +ffffffff81ec9e80 t vce_v4_0_set_clockgating_state +ffffffff81ec9eb0 t vce_v4_0_set_powergating_state +ffffffff81ec9f90 t vce_v4_0_ring_get_rptr +ffffffff81eca000 t vce_v4_0_ring_get_wptr +ffffffff81eca090 t vce_v4_0_ring_set_wptr +ffffffff81eca120 t vce_v4_0_ring_emit_ib +ffffffff81eca360 t vce_v4_0_ring_emit_fence +ffffffff81eca5a0 t vce_v4_0_emit_vm_flush +ffffffff81eca610 t vce_v4_0_ring_insert_end +ffffffff81eca6a0 t vce_v4_0_emit_wreg +ffffffff81eca7f0 t vce_v4_0_emit_reg_wait +ffffffff81eca9b0 t vce_v4_0_set_interrupt_state +ffffffff81ecaa40 t vce_v4_0_process_interrupt +ffffffff81ecaae0 t vce_v4_0_start +ffffffff81ecc000 T vcn_dec_sw_ring_emit_fence +ffffffff81ecc240 T vcn_dec_sw_ring_insert_end +ffffffff81ecc2d0 T vcn_dec_sw_ring_emit_ib +ffffffff81ecc510 T vcn_dec_sw_ring_emit_reg_wait +ffffffff81ecc6d0 T vcn_dec_sw_ring_emit_vm_flush +ffffffff81ecc740 T vcn_dec_sw_ring_emit_wreg +ffffffff81ecd000 T vcn_v1_0_set_pg_for_begin_use +ffffffff81ecd140 T vcn_v1_0_ring_end_use +ffffffff81ecd1b0 t vcn_v1_0_early_init +ffffffff81ecd280 t vcn_v1_0_sw_init +ffffffff81ecd500 t vcn_v1_0_sw_fini +ffffffff81ecd560 t vcn_v1_0_hw_init +ffffffff81ecd630 t vcn_v1_0_hw_fini +ffffffff81ecd730 t vcn_v1_0_suspend +ffffffff81ecd7a0 t vcn_v1_0_resume +ffffffff81ecd880 t vcn_v1_0_is_idle +ffffffff81ecd910 t vcn_v1_0_wait_for_idle +ffffffff81ecda00 t vcn_v1_0_set_clockgating_state +ffffffff81ecdab0 t vcn_v1_0_set_powergating_state +ffffffff81ece450 t vcn_v1_0_dec_ring_get_rptr +ffffffff81ece4e0 t vcn_v1_0_dec_ring_get_wptr +ffffffff81ece570 t vcn_v1_0_dec_ring_set_wptr +ffffffff81ece680 t vcn_v1_0_ring_patch_cs_in_place +ffffffff81ece840 t vcn_v1_0_dec_ring_emit_ib +ffffffff81ecebc0 t vcn_v1_0_dec_ring_emit_fence +ffffffff81ecf1e0 t vcn_v1_0_dec_ring_emit_vm_flush +ffffffff81ecf250 t vcn_v1_0_dec_ring_insert_nop +ffffffff81ecf3e0 t vcn_v1_0_dec_ring_insert_start +ffffffff81ecf5b0 t vcn_v1_0_dec_ring_insert_end +ffffffff81ecf6c0 t vcn_v1_0_ring_begin_use +ffffffff81ecf760 t vcn_v1_0_dec_ring_emit_wreg +ffffffff81ecfa10 t vcn_v1_0_dec_ring_emit_reg_wait +ffffffff81ecfd90 t vcn_v1_0_enc_ring_get_rptr +ffffffff81ecfe60 t vcn_v1_0_enc_ring_get_wptr +ffffffff81ecff30 t vcn_v1_0_enc_ring_set_wptr +ffffffff81ecfff0 t vcn_v1_0_enc_ring_emit_ib +ffffffff81ed0230 t vcn_v1_0_enc_ring_emit_fence +ffffffff81ed0470 t vcn_v1_0_enc_ring_emit_vm_flush +ffffffff81ed04e0 t vcn_v1_0_enc_ring_insert_end +ffffffff81ed0570 t vcn_v1_0_enc_ring_emit_wreg +ffffffff81ed06c0 t vcn_v1_0_enc_ring_emit_reg_wait +ffffffff81ed0880 t vcn_v1_0_set_interrupt_state +ffffffff81ed08b0 t vcn_v1_0_process_interrupt +ffffffff81ed0960 t vcn_v1_0_idle_work_handler +ffffffff81ed0ad0 t vcn_v1_0_pause_dpg_mode +ffffffff81ed1bc0 t vcn_v1_0_enable_clock_gating +ffffffff81ed1fd0 t vcn_v1_0_disable_clock_gating +ffffffff81ed2560 t vcn_1_0_enable_static_power_gating +ffffffff81ed2780 t vcn_v1_0_start_dpg_mode +ffffffff81ed63b0 t vcn_v1_0_start_spg_mode +ffffffff81ed85d0 t vcn_v1_0_clock_gating_dpg_mode +ffffffff81ed9000 T vcn_v2_0_dec_ring_insert_start +ffffffff81ed91c0 T vcn_v2_0_dec_ring_insert_end +ffffffff81ed92c0 T vcn_v2_0_dec_ring_insert_nop +ffffffff81ed9430 T vcn_v2_0_dec_ring_emit_fence +ffffffff81ed99f0 T vcn_v2_0_dec_ring_emit_ib +ffffffff81ed9d50 T vcn_v2_0_dec_ring_emit_reg_wait +ffffffff81eda0a0 T vcn_v2_0_dec_ring_emit_vm_flush +ffffffff81eda110 T vcn_v2_0_dec_ring_emit_wreg +ffffffff81eda390 T vcn_v2_0_enc_ring_emit_fence +ffffffff81eda5d0 T vcn_v2_0_enc_ring_insert_end +ffffffff81eda660 T vcn_v2_0_enc_ring_emit_ib +ffffffff81eda8a0 T vcn_v2_0_enc_ring_emit_reg_wait +ffffffff81edaa60 T vcn_v2_0_enc_ring_emit_vm_flush +ffffffff81edaad0 T vcn_v2_0_enc_ring_emit_wreg +ffffffff81edac20 T vcn_v2_0_dec_ring_test_ring +ffffffff81edaec0 t vcn_v2_0_early_init +ffffffff81edaf90 t vcn_v2_0_sw_init +ffffffff81edb2a0 t vcn_v2_0_sw_fini +ffffffff81edb320 t vcn_v2_0_hw_init +ffffffff81edbc70 t vcn_v2_0_hw_fini +ffffffff81edbd70 t vcn_v2_0_suspend +ffffffff81edbda0 t vcn_v2_0_resume +ffffffff81edbdf0 t vcn_v2_0_is_idle +ffffffff81edbe80 t vcn_v2_0_wait_for_idle +ffffffff81edbf70 t vcn_v2_0_set_clockgating_state +ffffffff81edc000 t vcn_v2_0_set_powergating_state +ffffffff81ede2e0 t vcn_v2_0_dec_ring_get_rptr +ffffffff81ede370 t vcn_v2_0_dec_ring_get_wptr +ffffffff81ede410 t vcn_v2_0_dec_ring_set_wptr +ffffffff81ede540 t vcn_v2_0_enc_ring_get_rptr +ffffffff81ede610 t vcn_v2_0_enc_ring_get_wptr +ffffffff81ede700 t vcn_v2_0_enc_ring_set_wptr +ffffffff81ede7f0 t vcn_v2_0_set_interrupt_state +ffffffff81ede820 t vcn_v2_0_process_interrupt +ffffffff81ede8d0 t vcn_v2_0_pause_dpg_mode +ffffffff81edf220 t vcn_v2_0_enable_clock_gating +ffffffff81edf4a0 t vcn_v2_0_disable_clock_gating +ffffffff81edf8a0 t vcn_v2_0_enable_static_power_gating +ffffffff81edfa80 t vcn_v2_0_start_dpg_mode +ffffffff81ee4650 t vcn_v2_0_clock_gating_dpg_mode +ffffffff81ee5000 t vcn_v2_6_query_poison_status +ffffffff81ee50d0 t vcn_v2_5_early_init +ffffffff81ee5440 t vcn_v2_5_sw_init +ffffffff81ee58b0 t vcn_v2_5_sw_fini +ffffffff81ee5980 t vcn_v2_5_hw_init +ffffffff81ee6390 t vcn_v2_5_hw_fini +ffffffff81ee64d0 t vcn_v2_5_suspend +ffffffff81ee6500 t vcn_v2_5_resume +ffffffff81ee6550 t vcn_v2_5_is_idle +ffffffff81ee6640 t vcn_v2_5_wait_for_idle +ffffffff81ee6770 t vcn_v2_5_set_clockgating_state +ffffffff81ee67f0 t vcn_v2_5_set_powergating_state +ffffffff81ee70b0 t vcn_v2_5_dec_ring_get_rptr +ffffffff81ee7150 t vcn_v2_5_dec_ring_get_wptr +ffffffff81ee7200 t vcn_v2_5_dec_ring_set_wptr +ffffffff81ee72b0 t vcn_v2_5_enc_ring_get_rptr +ffffffff81ee73a0 t vcn_v2_5_enc_ring_get_wptr +ffffffff81ee74a0 t vcn_v2_5_enc_ring_set_wptr +ffffffff81ee75a0 t vcn_v2_5_set_interrupt_state +ffffffff81ee75d0 t vcn_v2_5_process_interrupt +ffffffff81ee76f0 t vcn_v2_5_pause_dpg_mode +ffffffff81ee8050 t vcn_v2_5_enable_clock_gating +ffffffff81ee8350 t vcn_v2_5_disable_clock_gating +ffffffff81ee8870 t vcn_v2_5_start +ffffffff81eec7b0 t vcn_v2_5_clock_gating_dpg_mode +ffffffff81eed160 t vcn_v2_5_mc_resume_dpg_mode +ffffffff81ef1000 t vcn_v3_0_early_init +ffffffff81ef1200 t vcn_v3_0_sw_init +ffffffff81ef16a0 t vcn_v3_0_sw_fini +ffffffff81ef1780 t vcn_v3_0_hw_init +ffffffff81ef22b0 t vcn_v3_0_hw_fini +ffffffff81ef23b0 t vcn_v3_0_suspend +ffffffff81ef23e0 t vcn_v3_0_resume +ffffffff81ef2430 t vcn_v3_0_is_idle +ffffffff81ef2520 t vcn_v3_0_wait_for_idle +ffffffff81ef2650 t vcn_v3_0_set_clockgating_state +ffffffff81ef2760 t vcn_v3_0_set_powergating_state +ffffffff81ef5010 t vcn_v3_0_dec_ring_get_rptr +ffffffff81ef50b0 t vcn_v3_0_dec_ring_get_wptr +ffffffff81ef5160 t vcn_v3_0_dec_ring_set_wptr +ffffffff81ef52d0 t vcn_v3_0_ring_patch_cs_in_place +ffffffff81ef55f0 t vcn_v3_0_enc_ring_get_rptr +ffffffff81ef56e0 t vcn_v3_0_enc_ring_get_wptr +ffffffff81ef57e0 t vcn_v3_0_enc_ring_set_wptr +ffffffff81ef58e0 t vcn_v3_0_set_interrupt_state +ffffffff81ef5910 t vcn_v3_0_process_interrupt +ffffffff81ef5a00 t vcn_v3_0_pause_dpg_mode +ffffffff81ef6350 t vcn_v3_0_enable_clock_gating +ffffffff81ef65d0 t vcn_v3_0_disable_clock_gating +ffffffff81ef6b50 t vcn_v3_0_start_dpg_mode +ffffffff81efb960 t vcn_v3_0_clock_gating_dpg_mode +ffffffff81efd000 t vcn_v4_0_early_init +ffffffff81efd120 t vcn_v4_0_sw_init +ffffffff81efd370 t vcn_v4_0_sw_fini +ffffffff81efd450 t vcn_v4_0_hw_init +ffffffff81efde90 t vcn_v4_0_hw_fini +ffffffff81efdf90 t vcn_v4_0_suspend +ffffffff81efdfc0 t vcn_v4_0_resume +ffffffff81efe010 t vcn_v4_0_is_idle +ffffffff81efe110 t vcn_v4_0_wait_for_idle +ffffffff81efe240 t vcn_v4_0_set_clockgating_state +ffffffff81efe350 t vcn_v4_0_set_powergating_state +ffffffff81f00960 t vcn_v4_0_unified_ring_get_rptr +ffffffff81f00a40 t vcn_v4_0_unified_ring_get_wptr +ffffffff81f00b30 t vcn_v4_0_unified_ring_set_wptr +ffffffff81f00c30 t vcn_v4_0_ring_patch_cs_in_place +ffffffff81f00eb0 t vcn_v4_0_set_interrupt_state +ffffffff81f00ee0 t vcn_v4_0_process_interrupt +ffffffff81f00fa0 t vcn_v4_0_pause_dpg_mode +ffffffff81f01340 t vcn_v4_0_enable_clock_gating +ffffffff81f01630 t vcn_v4_0_disable_clock_gating +ffffffff81f01b70 t vcn_v4_0_start_dpg_mode +ffffffff81f06140 t vcn_v4_0_disable_clock_gating_dpg_mode +ffffffff81f07000 t vega10_ih_early_init +ffffffff81f07050 t vega10_ih_sw_init +ffffffff81f07300 t vega10_ih_sw_fini +ffffffff81f07340 t vega10_ih_hw_init +ffffffff81f076b0 t vega10_ih_hw_fini +ffffffff81f07700 t vega10_ih_suspend +ffffffff81f07750 t vega10_ih_resume +ffffffff81f07760 t vega10_ih_is_idle +ffffffff81f07790 t vega10_ih_wait_for_idle +ffffffff81f077c0 t vega10_ih_soft_reset +ffffffff81f077f0 t vega10_ih_set_clockgating_state +ffffffff81f07930 t vega10_ih_set_powergating_state +ffffffff81f07960 t vega10_ih_get_wptr +ffffffff81f07a70 t vega10_ih_set_rptr +ffffffff81f07b40 t vega10_ih_self_irq +ffffffff81f07bc0 t vega10_ih_toggle_interrupts +ffffffff81f08000 T vega10_reg_base_init +ffffffff81f08150 T vega10_doorbell_index_init +ffffffff81f09000 t vega20_ih_early_init +ffffffff81f09050 t vega20_ih_sw_init +ffffffff81f09300 t vega20_ih_sw_fini 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vi_common_hw_fini +ffffffff81f0d060 t vi_common_suspend +ffffffff81f0d0e0 t vi_common_resume +ffffffff81f0d120 t vi_common_is_idle +ffffffff81f0d150 t vi_common_wait_for_idle +ffffffff81f0d180 t vi_common_soft_reset +ffffffff81f0d1b0 t vi_common_set_clockgating_state +ffffffff81f0d720 t vi_common_set_powergating_state +ffffffff81f0d750 t vi_common_get_clockgating_state +ffffffff81f0d810 t cz_smc_rreg +ffffffff81f0d890 t cz_smc_wreg +ffffffff81f0d900 t vi_smc_rreg +ffffffff81f0d980 t vi_smc_wreg +ffffffff81f0d9f0 t vi_pcie_rreg +ffffffff81f0da90 t vi_pcie_wreg +ffffffff81f0db20 t vi_uvd_ctx_rreg +ffffffff81f0dbb0 t vi_uvd_ctx_wreg +ffffffff81f0dc20 t vi_didt_rreg +ffffffff81f0dca0 t vi_didt_wreg +ffffffff81f0dd10 t vi_gc_cac_rreg +ffffffff81f0dd90 t vi_gc_cac_wreg +ffffffff81f0de00 t vi_read_disabled_bios +ffffffff81f0dfd0 t vi_read_bios_from_rom +ffffffff81f0e0d0 t vi_read_register +ffffffff81f0e370 t vi_vga_set_state +ffffffff81f0e3a0 t vi_asic_reset +ffffffff81f0e500 t vi_asic_reset_method +ffffffff81f0e5b0 t vi_get_xclk +ffffffff81f0e660 t vi_set_uvd_clocks +ffffffff81f0e710 t vi_set_vce_clocks +ffffffff81f0e9b0 t vi_get_config_memsize +ffffffff81f0e9d0 t vi_flush_hdp +ffffffff81f0ea40 t vi_invalidate_hdp +ffffffff81f0eab0 t vi_need_full_reset +ffffffff81f0eb00 t vi_get_pcie_usage +ffffffff81f0ec30 t vi_need_reset_on_init +ffffffff81f0ecb0 t vi_get_pcie_replay_count +ffffffff81f0ed20 t vi_asic_supports_baco +ffffffff81f0ed70 t vi_pre_asic_init +ffffffff81f0eda0 t vi_query_video_codecs +ffffffff81f0ee40 t vi_set_uvd_clock +ffffffff81f0f000 T amdgpu_dm_find_first_crtc_matching_connector +ffffffff81f0f070 T amdgpu_dm_update_connector_after_detect +ffffffff81f0f5b0 T amdgpu_dm_update_freesync_caps +ffffffff81f0fab0 T dm_atomic_get_state +ffffffff81f0fb20 T amdgpu_dm_connector_atomic_set_property +ffffffff81f0fbe0 T amdgpu_dm_connector_atomic_get_property +ffffffff81f0fc80 T amdgpu_dm_connector_funcs_reset +ffffffff81f0fd70 T amdgpu_dm_connector_atomic_duplicate_state +ffffffff81f0fe70 T create_validate_stream_for_sink +ffffffff81f10b80 T amdgpu_dm_connector_mode_valid +ffffffff81f10d30 T convert_dc_color_depth_into_bpc +ffffffff81f10d70 t dm_encoder_helper_disable +ffffffff81f10da0 t dm_encoder_helper_atomic_check +ffffffff81f10f80 T amdgpu_dm_connector_init_helper +ffffffff81f11240 T amdgpu_dm_get_encoder_crtc_mask +ffffffff81f11290 T dm_restore_drm_connector_state +ffffffff81f11400 T amdgpu_dm_trigger_timing_sync +ffffffff81f115d0 T dm_write_reg_func +ffffffff81f115f0 T dm_read_reg_func +ffffffff81f11690 T amdgpu_dm_process_dmub_aux_transfer_sync +ffffffff81f118a0 T amdgpu_dm_process_dmub_set_config_sync +ffffffff81f11a10 T check_seamless_boot_capability +ffffffff81f11a50 t dm_early_init +ffffffff81f11c50 t dm_late_init +ffffffff81f11f30 t dm_sw_init +ffffffff81f126d0 t dm_sw_fini +ffffffff81f127c0 t amdgpu_dm_early_fini +ffffffff81f12820 t dm_hw_init +ffffffff81f14580 t dm_hw_fini +ffffffff81f145d0 t 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dm_helpers_dp_mst_send_payload_allocation +ffffffff81f21790 T dm_dtn_log_begin +ffffffff81f217e0 T dm_dtn_log_append_v +ffffffff81f21930 T dm_dtn_log_end +ffffffff81f21980 T dm_helpers_dp_mst_start_top_mgr +ffffffff81f21a20 T dm_helpers_dp_mst_stop_top_mgr +ffffffff81f21ac0 T dm_helpers_dp_read_dpcd +ffffffff81f21b40 T dm_helpers_dp_write_dpcd +ffffffff81f21bc0 T dm_helpers_submit_i2c +ffffffff81f21ce0 T dm_helpers_dp_write_dsc_enable +ffffffff81f22260 T dm_helpers_is_dp_sink_present +ffffffff81f222f0 T dm_helpers_read_local_edid +ffffffff81f22480 T dm_helper_dmub_aux_transfer_sync +ffffffff81f224a0 T dm_helpers_dmub_set_config_sync +ffffffff81f224c0 T dm_set_dcn_clocks +ffffffff81f224f0 T dm_helpers_smu_timeout +ffffffff81f22520 T dm_helpers_init_panel_settings +ffffffff81f22590 T dm_helpers_override_panel_settings +ffffffff81f225d0 T dm_helpers_allocate_gpu_mem +ffffffff81f226d0 T dm_helpers_free_gpu_mem +ffffffff81f22760 T dm_helpers_dmub_outbox_interrupt_control +ffffffff81f227f0 T dm_helpers_mst_enable_stream_features +ffffffff81f22900 T dm_helpers_dp_handle_test_pattern_request +ffffffff81f22c30 T dm_set_phyd32clk +ffffffff81f22c60 T dm_helpers_enable_periodic_detection +ffffffff81f22c90 t execute_synaptics_rc_command +ffffffff81f23000 T amdgpu_dm_irq_register_interrupt +ffffffff81f231a0 t dm_irq_work_func +ffffffff81f231c0 T amdgpu_dm_irq_unregister_interrupt +ffffffff81f23340 T amdgpu_dm_irq_init +ffffffff81f23430 T amdgpu_dm_irq_fini +ffffffff81f235d0 T amdgpu_dm_irq_suspend +ffffffff81f236e0 T amdgpu_dm_irq_resume_early +ffffffff81f238a0 T amdgpu_dm_irq_resume_late +ffffffff81f23a60 T amdgpu_dm_set_irq_funcs +ffffffff81f23b20 T amdgpu_dm_outbox_init +ffffffff81f23b50 T amdgpu_dm_hpd_init +ffffffff81f23c00 T amdgpu_dm_hpd_fini +ffffffff81f23cb0 t amdgpu_dm_set_crtc_irq_state +ffffffff81f23d30 t amdgpu_dm_irq_handler +ffffffff81f23f30 t amdgpu_dm_set_vline0_irq_state +ffffffff81f23fb0 t amdgpu_dm_set_dmub_outbox_irq_state +ffffffff81f24000 t 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bios_set_scratch_critical_state +ffffffff81f3f130 T bios_get_vga_enabled_displays +ffffffff81f40000 T dal_bios_parser_create +ffffffff81f40070 T dal_bios_parser_destroy +ffffffff81f41000 T dal_bios_parser_init_cmd_tbl +ffffffff81f41810 t encoder_control_digx_v3 +ffffffff81f41910 t encoder_control_digx_v4 +ffffffff81f41a10 t encoder_control_digx_v5 +ffffffff81f41b60 t encoder_control_dig1_v1 +ffffffff81f41be0 t encoder_control_dig2_v1 +ffffffff81f41c60 t encoder_control_dig_v1 +ffffffff81f41cc0 t transmitter_control_v2 +ffffffff81f41e60 t transmitter_control_v3 +ffffffff81f42010 t transmitter_control_v4 +ffffffff81f421c0 t transmitter_control_v1_5 +ffffffff81f42330 t transmitter_control_v1_6 +ffffffff81f42490 t set_pixel_clock_v3 +ffffffff81f42600 t set_pixel_clock_v5 +ffffffff81f427a0 t set_pixel_clock_v6 +ffffffff81f42940 t set_pixel_clock_v7 +ffffffff81f42b10 t enable_spread_spectrum_on_ppll_v1 +ffffffff81f42c30 t enable_spread_spectrum_on_ppll_v2 +ffffffff81f42d60 t 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dal_cmd_table_helper_transmitter_bp_to_atom2 +ffffffff81f47240 T dal_cmd_table_helper_encoder_mode_bp_to_atom2 +ffffffff81f472d0 T dal_cmd_table_helper_clock_source_id_to_ref_clk_src2 +ffffffff81f473b0 T dal_cmd_table_helper_encoder_id_to_atom2 +ffffffff81f48000 T dal_cmd_tbl_helper_dce110_get_table +ffffffff81f48030 t encoder_action_to_atom +ffffffff81f480b0 t engine_bp_to_atom +ffffffff81f48100 t clock_source_id_to_atom +ffffffff81f481a0 t clock_source_id_to_atom_phy_clk_src_id +ffffffff81f481f0 t signal_type_to_atom_dig_mode +ffffffff81f48250 t hpd_sel_to_atom +ffffffff81f48290 t dig_encoder_sel_to_atom +ffffffff81f482c0 t phy_id_to_atom +ffffffff81f48300 t disp_power_gating_action_to_atom +ffffffff81f49000 T dal_cmd_tbl_helper_dce112_get_table2 +ffffffff81f49030 t encoder_action_to_atom +ffffffff81f490b0 t engine_bp_to_atom +ffffffff81f49100 t clock_source_id_to_atom +ffffffff81f491d0 t clock_source_id_to_atom_phy_clk_src_id +ffffffff81f49220 t signal_type_to_atom_dig_mode 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t dce_update_clocks +ffffffff81f4e000 T dce110_get_min_vblank_time_us +ffffffff81f4e090 T dce110_fill_display_configs +ffffffff81f4e300 T dce11_pplib_apply_display_requirements +ffffffff81f4e5f0 T dce110_clk_mgr_construct +ffffffff81f4e6a0 t dce11_update_clocks +ffffffff81f4f000 T dce112_set_clock +ffffffff81f4f190 T dce112_set_dispclk +ffffffff81f4f2c0 T dce112_set_dprefclk +ffffffff81f4f330 T dce112_clk_mgr_construct +ffffffff81f4f3e0 t dce112_update_clocks +ffffffff81f50000 T dce120_clk_mgr_construct +ffffffff81f50090 T dce121_clk_mgr_construct +ffffffff81f501c0 t dce12_update_clocks +ffffffff81f51000 T rv1_clk_mgr_construct +ffffffff81f510c0 t rv1_update_clocks +ffffffff81f515a0 t rv1_init_clocks +ffffffff81f51630 t rv1_enable_pme_wa +ffffffff81f52000 T rv1_vbios_smu_set_dispclk +ffffffff81f520f0 t rv1_vbios_smu_send_msg_with_param +ffffffff81f52200 T rv1_vbios_smu_set_dprefclk +ffffffff81f53000 T rv2_clk_mgr_construct +ffffffff81f54000 T dentist_get_did_from_divider +ffffffff81f54080 T dcn20_update_clocks_update_dpp_dto +ffffffff81f54150 T dcn20_update_clocks_update_dentist +ffffffff81f54630 T dcn2_update_clocks +ffffffff81f54bb0 T dcn2_read_clocks_from_hw_dentist +ffffffff81f54c80 T dcn2_update_clocks_fpga +ffffffff81f54db0 T dcn2_init_clocks +ffffffff81f54e50 T dcn2_get_clock +ffffffff81f54ec0 T dcn20_clk_mgr_construct +ffffffff81f55010 t dcn2_enable_pme_wa +ffffffff81f55060 t dcn2_are_clock_states_equal +ffffffff81f550d0 t dcn2_notify_link_rate_change +ffffffff81f56000 t dcn201_update_clocks +ffffffff81f56220 t dcn201_init_clocks +ffffffff81f562c0 T dcn201_clk_mgr_construct +ffffffff81f57000 T rn_clk_mgr_construct +ffffffff81f578f0 t rn_update_clocks +ffffffff81f57eb0 t rn_set_low_power_state +ffffffff81f58090 t rn_init_clocks +ffffffff81f58130 t rn_enable_pme_wa +ffffffff81f58140 t rn_are_clock_states_equal +ffffffff81f58190 t rn_notify_wm_ranges +ffffffff81f58520 t rn_notify_link_rate_change +ffffffff81f59000 T rn_vbios_smu_get_smu_version +ffffffff81f59020 t rn_vbios_smu_send_msg_with_param +ffffffff81f591b0 T rn_vbios_smu_set_dispclk +ffffffff81f592f0 T rn_vbios_smu_set_dprefclk +ffffffff81f59360 T rn_vbios_smu_set_hard_min_dcfclk +ffffffff81f593e0 T rn_vbios_smu_set_min_deep_sleep_dcfclk +ffffffff81f59460 T rn_vbios_smu_set_phyclk +ffffffff81f594a0 T rn_vbios_smu_set_dppclk +ffffffff81f59560 T rn_vbios_smu_set_dcn_low_power_state +ffffffff81f59580 T rn_vbios_smu_enable_48mhz_tmdp_refclk_pwrdwn +ffffffff81f595a0 T rn_vbios_smu_enable_pme_wa +ffffffff81f595c0 T rn_vbios_smu_is_periodic_retraining_disabled +ffffffff81f5a000 T dcn3_init_clocks +ffffffff81f5a3b0 t dcn3_init_clocks_fpga +ffffffff81f5a3c0 T dcn3_clk_mgr_construct +ffffffff81f5a520 T dcn3_clk_mgr_destroy +ffffffff81f5a590 t dcn3_update_clocks +ffffffff81f5a9e0 t dcn3_enable_pme_wa +ffffffff81f5aa20 t dcn3_are_clock_states_equal +ffffffff81f5aa80 t dcn3_notify_wm_ranges +ffffffff81f5ad10 t dcn30_notify_link_rate_change +ffffffff81f5ae30 t dcn3_set_hard_min_memclk +ffffffff81f5aed0 t dcn3_set_hard_max_memclk +ffffffff81f5af30 t dcn3_set_max_memclk +ffffffff81f5af70 t dcn3_set_min_memclk +ffffffff81f5afb0 t dcn3_get_memclk_states_from_smu +ffffffff81f5b0f0 t dcn3_is_smu_present +ffffffff81f5c000 T dcn30_smu_test_message +ffffffff81f5c070 t dcn30_smu_send_msg_with_param +ffffffff81f5c1d0 T dcn30_smu_get_smu_version +ffffffff81f5c1f0 T dcn30_smu_check_driver_if_version +ffffffff81f5c240 T dcn30_smu_check_msg_header_version +ffffffff81f5c290 T dcn30_smu_set_dram_addr_high +ffffffff81f5c2b0 T dcn30_smu_set_dram_addr_low +ffffffff81f5c2d0 T dcn30_smu_transfer_wm_table_smu_2_dram +ffffffff81f5c2f0 T dcn30_smu_transfer_wm_table_dram_2_smu +ffffffff81f5c310 T dcn30_smu_set_hard_min_by_freq +ffffffff81f5c360 T dcn30_smu_set_hard_max_by_freq +ffffffff81f5c3b0 T dcn30_smu_get_dpm_freq_by_index +ffffffff81f5c400 T dcn30_smu_get_dc_mode_max_dpm_freq +ffffffff81f5c450 T dcn30_smu_set_min_deep_sleep_dcef_clk +ffffffff81f5c470 T dcn30_smu_set_num_of_displays +ffffffff81f5c490 T dcn30_smu_set_display_refresh_from_mall +ffffffff81f5c4c0 T dcn30_smu_set_external_client_df_cstate_allow +ffffffff81f5c4e0 T dcn30_smu_set_pme_workaround +ffffffff81f5d000 T dcn301_smu_get_smu_version +ffffffff81f5d070 t dcn301_smu_send_msg_with_param +ffffffff81f5d1f0 T dcn301_smu_set_dispclk +ffffffff81f5d290 T dcn301_smu_set_dprefclk +ffffffff81f5d340 T dcn301_smu_set_hard_min_dcfclk +ffffffff81f5d3e0 T dcn301_smu_set_min_deep_sleep_dcfclk +ffffffff81f5d480 T dcn301_smu_set_dppclk +ffffffff81f5d520 T dcn301_smu_set_display_idle_optimization +ffffffff81f5d570 T dcn301_smu_enable_phy_refclk_pwrdwn +ffffffff81f5d5c0 T dcn301_smu_enable_pme_wa +ffffffff81f5d5e0 T dcn301_smu_set_dram_addr_high +ffffffff81f5d630 T dcn301_smu_set_dram_addr_low +ffffffff81f5d680 T dcn301_smu_transfer_dpm_table_smu_2_dram +ffffffff81f5d6a0 T dcn301_smu_transfer_wm_table_dram_2_smu +ffffffff81f5e000 T vg_clk_mgr_construct +ffffffff81f5e820 T vg_clk_mgr_destroy +ffffffff81f5e870 t vg_update_clocks +ffffffff81f5ebe0 t vg_init_clocks +ffffffff81f5ec80 t vg_enable_pme_wa +ffffffff81f5ec90 t vg_are_clock_states_equal +ffffffff81f5ece0 t vg_notify_wm_ranges +ffffffff81f60000 T dcn31_update_clocks +ffffffff81f60650 T dcn31_init_clocks +ffffffff81f60700 T dcn31_are_clock_states_equal +ffffffff81f60760 T dcn31_get_dtb_ref_freq_khz +ffffffff81f60790 T dcn31_clk_mgr_construct +ffffffff81f60e80 T dcn31_clk_mgr_destroy +ffffffff81f60ed0 t dcn31_set_low_power_state +ffffffff81f610e0 t dcn31_enable_pme_wa +ffffffff81f610f0 t dcn31_notify_wm_ranges +ffffffff81f61470 t find_clk_for_voltage +ffffffff81f62000 T dcn31_smu_get_smu_version +ffffffff81f62020 t dcn31_smu_send_msg_with_param +ffffffff81f62220 T dcn31_smu_set_dispclk +ffffffff81f62290 T dcn31_smu_set_dprefclk +ffffffff81f62300 T dcn31_smu_set_hard_min_dcfclk +ffffffff81f62380 T dcn31_smu_set_min_deep_sleep_dcfclk +ffffffff81f62400 T dcn31_smu_set_dppclk +ffffffff81f62470 T dcn31_smu_set_display_idle_optimization +ffffffff81f624c0 T dcn31_smu_enable_phy_refclk_pwrdwn +ffffffff81f62510 T dcn31_smu_enable_pme_wa +ffffffff81f62550 T dcn31_smu_set_dram_addr_high +ffffffff81f62590 T dcn31_smu_set_dram_addr_low +ffffffff81f625d0 T dcn31_smu_transfer_dpm_table_smu_2_dram +ffffffff81f62610 T dcn31_smu_transfer_wm_table_dram_2_smu +ffffffff81f62650 T dcn31_smu_set_zstate_support +ffffffff81f626c0 T dcn31_smu_set_dtbclk +ffffffff81f63000 T dcn314_update_clocks +ffffffff81f63600 t dcn314_disable_otg_wa +ffffffff81f63790 T dcn314_are_clock_states_equal +ffffffff81f637f0 T dcn314_clk_mgr_construct +ffffffff81f64520 T dcn314_clk_mgr_destroy +ffffffff81f64570 t dcn314_enable_pme_wa +ffffffff81f64580 t dcn314_notify_wm_ranges +ffffffff81f65000 T dcn314_smu_get_smu_version +ffffffff81f65020 t dcn314_smu_send_msg_with_param +ffffffff81f65240 T dcn314_smu_set_dispclk +ffffffff81f652b0 T dcn314_smu_set_dprefclk +ffffffff81f65320 T dcn314_smu_set_hard_min_dcfclk +ffffffff81f653a0 T dcn314_smu_set_min_deep_sleep_dcfclk +ffffffff81f65420 T dcn314_smu_set_dppclk +ffffffff81f65490 T dcn314_smu_set_display_idle_optimization +ffffffff81f654e0 T dcn314_smu_enable_phy_refclk_pwrdwn +ffffffff81f65530 T dcn314_smu_enable_pme_wa +ffffffff81f65570 T dcn314_smu_set_dram_addr_high +ffffffff81f655b0 T dcn314_smu_set_dram_addr_low +ffffffff81f655f0 T dcn314_smu_transfer_dpm_table_smu_2_dram +ffffffff81f65630 T dcn314_smu_transfer_wm_table_dram_2_smu +ffffffff81f65670 T dcn314_smu_set_zstate_support +ffffffff81f656c0 T dcn314_smu_set_dtbclk +ffffffff81f66000 T dcn315_clk_mgr_construct +ffffffff81f66980 T dcn315_clk_mgr_destroy +ffffffff81f669d0 t dcn315_update_clocks +ffffffff81f66fe0 t dcn315_enable_pme_wa +ffffffff81f66ff0 t dcn315_notify_wm_ranges +ffffffff81f68000 T dcn315_smu_get_smu_version +ffffffff81f68020 t dcn315_smu_send_msg_with_param +ffffffff81f68310 T dcn315_smu_set_dispclk +ffffffff81f68380 T dcn315_smu_set_hard_min_dcfclk +ffffffff81f68400 T dcn315_smu_set_min_deep_sleep_dcfclk +ffffffff81f68480 T dcn315_smu_set_dppclk +ffffffff81f684f0 T dcn315_smu_set_display_idle_optimization +ffffffff81f68540 T dcn315_smu_enable_phy_refclk_pwrdwn +ffffffff81f68590 T dcn315_smu_enable_pme_wa +ffffffff81f685d0 T dcn315_smu_set_dram_addr_high +ffffffff81f68610 T dcn315_smu_set_dram_addr_low +ffffffff81f68650 T dcn315_smu_transfer_dpm_table_smu_2_dram +ffffffff81f68690 T dcn315_smu_transfer_wm_table_dram_2_smu +ffffffff81f686d0 T dcn315_smu_get_dpref_clk +ffffffff81f68730 T dcn315_smu_get_dtbclk +ffffffff81f68790 T dcn315_smu_set_dtbclk +ffffffff81f69000 T dcn316_clk_mgr_construct +ffffffff81f69710 T dcn316_clk_mgr_destroy +ffffffff81f69760 t dcn316_update_clocks +ffffffff81f69d80 t dcn316_enable_pme_wa +ffffffff81f69d90 t dcn316_notify_wm_ranges +ffffffff81f6a110 t find_clk_for_voltage +ffffffff81f6b000 T dcn316_smu_get_smu_version +ffffffff81f6b020 t dcn316_smu_send_msg_with_param +ffffffff81f6b1b0 T dcn316_smu_set_dispclk +ffffffff81f6b220 T dcn316_smu_set_hard_min_dcfclk +ffffffff81f6b2a0 T dcn316_smu_set_min_deep_sleep_dcfclk +ffffffff81f6b320 T dcn316_smu_set_dppclk +ffffffff81f6b390 T dcn316_smu_set_display_idle_optimization +ffffffff81f6b3e0 T dcn316_smu_enable_phy_refclk_pwrdwn +ffffffff81f6b430 T dcn316_smu_set_dram_addr_high +ffffffff81f6b470 T dcn316_smu_set_dram_addr_low +ffffffff81f6b4b0 T dcn316_smu_transfer_dpm_table_smu_2_dram +ffffffff81f6b4f0 T dcn316_smu_transfer_wm_table_dram_2_smu +ffffffff81f6b530 T dcn316_smu_enable_pme_wa +ffffffff81f6b570 T dcn316_smu_set_dtbclk +ffffffff81f6b5b0 T dcn316_smu_get_dpref_clk +ffffffff81f6b610 T dcn316_smu_get_smu_fclk +ffffffff81f6c000 T dcn32_init_clocks +ffffffff81f6c4c0 T dcn32_clk_mgr_construct +ffffffff81f6c760 t dcn32_dump_clk_registers +ffffffff81f6c980 T dcn32_clk_mgr_destroy +ffffffff81f6c9f0 t dcn32_update_clocks +ffffffff81f6d110 t dcn32_enable_pme_wa +ffffffff81f6d150 t dcn32_are_clock_states_equal +ffffffff81f6d1c0 t dcn32_notify_wm_ranges +ffffffff81f6d340 t dcn32_set_hard_min_memclk +ffffffff81f6d3e0 t dcn32_set_hard_max_memclk +ffffffff81f6d440 t dcn32_get_memclk_states_from_smu +ffffffff81f6d630 t dcn32_is_smu_present +ffffffff81f6e000 T dcn32_smu_send_fclk_pstate_message +ffffffff81f6e020 t dcn32_smu_send_msg_with_param +ffffffff81f6e160 T dcn32_smu_send_cab_for_uclk_message +ffffffff81f6e190 T dcn32_smu_transfer_wm_table_dram_2_smu +ffffffff81f6e1b0 T dcn32_smu_set_pme_workaround +ffffffff81f6e1d0 T dcn32_smu_set_hard_min_by_freq +ffffffff81f6f000 T dc_stream_adjust_vmin_vmax +ffffffff81f6f170 T dc_stream_get_last_used_drr_vtotal +ffffffff81f6f2d0 T dc_stream_get_crtc_position +ffffffff81f6f500 T dc_stream_configure_crc +ffffffff81f6f760 T dc_stream_get_crc +ffffffff81f6f840 T dc_stream_set_dyn_expansion +ffffffff81f6fab0 T dc_stream_set_dither_option +ffffffff81f6fc50 T dc_stream_set_gamut_remap +ffffffff81f6fdd0 T dc_stream_program_csc_matrix +ffffffff81f6fff0 T dc_stream_set_static_screen_params +ffffffff81f70170 T dc_create +ffffffff81f706e0 t dc_construct_ctx +ffffffff81f70840 t dc_destruct +ffffffff81f70b00 T dc_hardware_init +ffffffff81f70c10 T dc_init_callbacks +ffffffff81f70c40 T dc_deinit_callbacks +ffffffff81f70c70 T dc_destroy +ffffffff81f70cc0 T dc_validate_boot_timing +ffffffff81f71040 T dc_enable_stereo +ffffffff81f71140 T dc_trigger_sync +ffffffff81f71770 T dc_z10_restore +ffffffff81f717b0 T dc_z10_save_init +ffffffff81f717f0 T dc_commit_streams +ffffffff81f71c90 t commit_minimal_transition_state +ffffffff81f720b0 T dc_create_state +ffffffff81f72140 t dc_commit_state_no_check +ffffffff81f73640 T dc_release_state +ffffffff81f736a0 T dc_commit_state +ffffffff81f737f0 T dc_acquire_release_mpc_3dlut +ffffffff81f738c0 T dc_post_update_surfaces_to_stream +ffffffff81f73cd0 T dc_copy_state +ffffffff81f73ea0 T dc_retain_state +ffffffff81f73ed0 T dc_set_generic_gpio_for_stereo +ffffffff81f73fe0 T dc_check_update_surfaces_for_stream +ffffffff81f74c60 T dc_dmub_update_dirty_rect +ffffffff81f74f00 T dc_update_planes_and_stream +ffffffff81f75660 t commit_planes_for_stream +ffffffff81f76e70 T dc_commit_updates_for_stream +ffffffff81f77270 t copy_surface_update_to_plane +ffffffff81f77680 t copy_stream_update_to_stream +ffffffff81f77cb0 T dc_get_current_stream_count +ffffffff81f77cf0 T dc_get_stream_at_index +ffffffff81f77d40 T dc_interrupt_to_irq_source +ffffffff81f77d60 T dc_interrupt_set +ffffffff81f77db0 T dc_interrupt_ack +ffffffff81f77dd0 T dc_power_down_on_boot +ffffffff81f77e20 T dc_set_power_state +ffffffff81f78020 T dc_resume +ffffffff81f78090 T dc_is_dmcu_initialized +ffffffff81f780e0 T dc_is_oem_i2c_device_present +ffffffff81f78130 T dc_submit_i2c +ffffffff81f78160 T dc_submit_i2c_oem +ffffffff81f781b0 T dc_link_add_remote_sink +ffffffff81f78350 T dc_link_remove_remote_sink +ffffffff81f78430 T get_clock_requirements_for_state +ffffffff81f784b0 T dc_set_clock +ffffffff81f784f0 T dc_get_clock +ffffffff81f78530 T dc_set_psr_allow_active +ffffffff81f78630 T dc_allow_idle_optimizations +ffffffff81f786d0 T dc_unlock_memory_clock_frequency +ffffffff81f78740 T dc_lock_memory_clock_frequency +ffffffff81f787d0 T dc_enable_dcmode_clk_limit +ffffffff81f788e0 t blank_and_force_memclk +ffffffff81f78ac0 T dc_is_plane_eligible_for_idle_optimizations +ffffffff81f78b10 T dc_hardware_release +ffffffff81f78b60 T dc_mclk_switch_using_fw_based_vblank_stretch_shut_down +ffffffff81f78ba0 T dc_is_dmub_outbox_supported +ffffffff81f78c00 T dc_enable_dmub_notifications +ffffffff81f78c60 T dc_enable_dmub_outbox +ffffffff81f78ca0 T dc_process_dmub_aux_transfer_async +ffffffff81f78e40 T get_link_index_from_dpia_port_index +ffffffff81f78ef0 T dc_process_dmub_set_config_async +ffffffff81f78fd0 T dc_process_dmub_set_mst_slots +ffffffff81f790c0 T dc_process_dmub_dpia_hpd_int_enable +ffffffff81f79190 T dc_disable_accelerated_mode +ffffffff81f791b0 T dc_notify_vsync_int_state +ffffffff81f793f0 t create_links +ffffffff81f79830 t create_link_encoders +ffffffff81f7a000 T pre_surface_trace +ffffffff81f7a030 T update_surface_trace +ffffffff81f7a060 T post_surface_trace +ffffffff81f7a090 T context_timing_trace +ffffffff81f7a240 T context_clock_trace +ffffffff81f7a270 T dc_status_to_str +ffffffff81f7b000 T find_color_matrix +ffffffff81f7b0b0 T color_space_to_black_color +ffffffff81f7b120 T hwss_wait_for_blank_complete +ffffffff81f7b1c0 T get_mpctree_visual_confirm_color +ffffffff81f7b220 T get_surface_visual_confirm_color +ffffffff81f7b2d0 T get_hdr_visual_confirm_color +ffffffff81f7b380 T get_subvp_visual_confirm_color +ffffffff81f7b470 T get_surface_tile_visual_confirm_color +ffffffff81f7c000 T get_hpd_gpio +ffffffff81f7c0e0 T dc_link_wait_for_t12 +ffffffff81f7c140 T dc_link_detect_sink +ffffffff81f7c2f0 T dc_link_is_dp_sink_present +ffffffff81f7c570 T reset_cur_dp_mst_topology +ffffffff81f7c5d0 T dc_link_detect +ffffffff81f7d820 T dc_link_get_hpd_state +ffffffff81f7d890 T link_create +ffffffff81f7ea10 T link_destroy +ffffffff81f7eb70 T dc_link_blank_all_dp_displays +ffffffff81f7ec40 T dc_link_blank_dp_stream +ffffffff81f7ed50 T dc_link_blank_all_edp_displays +ffffffff81f7ee10 T dc_power_alpm_dpcd_enable +ffffffff81f7ee80 T dc_link_validate_mode_timing +ffffffff81f7f360 t get_timing_pixel_clock_100hz +ffffffff81f7f3d0 T dc_link_get_backlight_level +ffffffff81f7f550 T dc_link_get_target_backlight_pwm +ffffffff81f7f660 T dc_link_set_backlight_level +ffffffff81f7f7d0 T dc_link_set_psr_allow_active +ffffffff81f7fa50 T dc_link_get_psr_state +ffffffff81f7fb70 T dc_link_setup_psr +ffffffff81f7ffd0 T dc_link_get_psr_residency +ffffffff81f800d0 T dc_link_set_sink_vtotal_in_psr_active +ffffffff81f80150 T dc_link_get_status +ffffffff81f80180 T core_link_resume +ffffffff81f801c0 t program_hpd_filter +ffffffff81f80350 T dc_link_allocate_mst_payload +ffffffff81f80830 t update_mst_stream_alloc_table +ffffffff81f80ab0 t dc_log_vcp_x_y +ffffffff81f80c30 T dc_link_reduce_mst_payload +ffffffff81f810c0 T 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dce110_link_encoder_set_dp_phy_pattern_training_pattern +ffffffff81fc0160 T dce110_psr_program_dp_dphy_fast_training +ffffffff81fc01d0 T dce110_psr_program_secondary_packet +ffffffff81fc0240 T dce110_is_dig_enabled +ffffffff81fc02a0 T dce110_link_encoder_validate_dvi_output +ffffffff81fc0350 T dce110_link_encoder_validate_dp_output +ffffffff81fc0380 T dce110_link_encoder_construct +ffffffff81fc0550 T dce110_link_encoder_validate_output_with_stream +ffffffff81fc0700 T dce110_link_encoder_hw_init +ffffffff81fc0920 T dce110_link_encoder_destroy +ffffffff81fc0970 T dce110_link_encoder_setup +ffffffff81fc0aa0 T dce110_link_encoder_enable_tmds_output +ffffffff81fc0b90 T dce110_link_encoder_enable_lvds_output +ffffffff81fc0c80 T dce110_link_encoder_enable_dp_output +ffffffff81fc0de0 T dce110_link_encoder_enable_dp_mst_output +ffffffff81fc0f40 T dce110_link_encoder_disable_output +ffffffff81fc1150 T dce110_link_encoder_dp_set_lane_settings +ffffffff81fc12f0 T dce110_link_encoder_dp_set_phy_pattern +ffffffff81fc1af0 t set_dp_phy_pattern_hbr2_compliance_cp2520_2 +ffffffff81fc1d00 T dce110_link_encoder_update_mst_stream_allocation_table +ffffffff81fc1f70 T dce110_link_encoder_connect_dig_be_to_fe +ffffffff81fc20a0 T dce110_link_encoder_enable_hpd +ffffffff81fc20d0 T dce110_link_encoder_disable_hpd +ffffffff81fc2100 T dce110_link_encoder_get_max_link_cap +ffffffff81fc3000 T dce_mem_input_construct +ffffffff81fc3060 T dce112_mem_input_construct +ffffffff81fc30c0 T dce120_mem_input_construct +ffffffff81fc3120 t dce_mi_program_display_marks +ffffffff81fc33f0 t dce_mi_allocate_dmif +ffffffff81fc3630 t dce_mi_free_dmif +ffffffff81fc3790 t dce_mi_program_surface_flip_and_addr +ffffffff81fc3ab0 t dce_mi_program_pte_vm +ffffffff81fc3c70 t dce_mi_program_surface_config +ffffffff81fc44f0 t dce_mi_is_flip_pending +ffffffff81fc4580 t program_nbp_watermark +ffffffff81fc4780 t dce112_mi_program_display_marks +ffffffff81fc4c90 t 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dce_transform_construct +ffffffff81fce190 t dce_transform_reset +ffffffff81fce1d0 t dce_transform_set_scaler +ffffffff81fcec70 t dce_transform_set_pixel_storage_depth +ffffffff81fcf120 t dce_transform_set_gamut_remap +ffffffff81fcf460 t program_multi_taps_filter +ffffffff81fd0000 T dmub_abm_create +ffffffff81fd00b0 T dmub_abm_destroy +ffffffff81fd0100 t dmub_abm_init +ffffffff81fd04e0 t dmub_abm_set_level +ffffffff81fd06a0 t dmub_abm_get_current_backlight +ffffffff81fd06d0 t dmub_abm_get_target_backlight +ffffffff81fd0700 t dmub_abm_init_config +ffffffff81fd0810 t dmub_abm_set_pause +ffffffff81fd1000 T dmub_hw_lock_mgr_cmd +ffffffff81fd10b0 T dmub_hw_lock_mgr_inbox0_cmd +ffffffff81fd10f0 T should_use_dmub_lock +ffffffff81fd2000 T dmub_enable_outbox_notification +ffffffff81fd3000 T dmub_psr_create +ffffffff81fd3090 T dmub_psr_destroy +ffffffff81fd30e0 t dmub_psr_copy_settings +ffffffff81fd35a0 t dmub_psr_enable +ffffffff81fd3730 t dmub_psr_get_state +ffffffff81fd3a20 t dmub_psr_set_level +ffffffff81fd3b10 t dmub_psr_force_static +ffffffff81fd3bc0 t dmub_psr_get_residency +ffffffff81fd3c10 t dmub_psr_set_sink_vtotal_in_psr_active +ffffffff81fd3cd0 t dmub_psr_set_power_opt +ffffffff81fd4000 T dce100_enable_display_power_gating +ffffffff81fd40a0 T dce100_prepare_bandwidth +ffffffff81fd40f0 T dce100_optimize_bandwidth +ffffffff81fd4140 T dce100_hw_sequencer_construct +ffffffff81fd5000 T dce100_add_stream_to_ctx +ffffffff81fd50a0 T dce100_validate_plane +ffffffff81fd50e0 T dce100_find_first_free_match_stream_enc_for_link +ffffffff81fd5190 T dce100_create_resource_pool +ffffffff81fd5f50 t dce100_resource_destruct +ffffffff81fd6210 t dce100_destroy_resource_pool +ffffffff81fd6270 t dce100_panel_cntl_create +ffffffff81fd6300 t dce100_link_encoder_create +ffffffff81fd6400 t dce100_validate_bandwidth +ffffffff81fd6540 t dce100_validate_global +ffffffff81fd65e0 t read_dce_straps +ffffffff81fd6650 t create_audio +ffffffff81fd6680 t dce100_stream_encoder_create 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dce110_timing_generator_program_timing_generator +ffffffff81fe43d0 T dce110_timing_generator_set_drr +ffffffff81fe4510 T dce110_timing_generator_set_static_screen_control +ffffffff81fe45a0 T dce110_timing_generator_get_vblank_counter +ffffffff81fe4600 T dce110_timing_generator_get_position +ffffffff81fe46a0 T dce110_timing_generator_get_crtc_scanoutpos +ffffffff81fe4790 T dce110_timing_generator_program_blanking +ffffffff81fe4a00 T dce110_timing_generator_set_test_pattern +ffffffff81fe4cf0 T dce110_timing_generator_validate_timing +ffffffff81fe4db0 T dce110_timing_generator_wait_for_vblank +ffffffff81fe4f20 T dce110_timing_generator_is_counter_moving +ffffffff81fe4fa0 T dce110_timing_generator_wait_for_vactive +ffffffff81fe5080 T dce110_timing_generator_setup_global_swap_lock +ffffffff81fe51e0 T dce110_timing_generator_tear_down_global_swap_lock +ffffffff81fe5260 T dce110_timing_generator_enable_advanced_request +ffffffff81fe5300 T dce110_timing_generator_set_lock_master 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dce112_compressor_program_compressed_surface_address_and_pitch +ffffffff81fe9b40 T dce112_compressor_program_lpt_control +ffffffff81fe9db0 T dce112_compressor_set_fbc_invalidation_triggers +ffffffff81fe9e40 T dce112_compressor_construct +ffffffff81fe9f00 T dce112_compressor_create +ffffffff81fe9ff0 T dce112_compressor_destroy +ffffffff81feb000 T dce112_hw_sequencer_construct +ffffffff81feb050 t dce112_enable_display_power_gating +ffffffff81fec000 T dce112_validate_bandwidth +ffffffff81fec0c0 T resource_map_phy_clock_resources +ffffffff81fec230 T dce112_add_stream_to_ctx +ffffffff81fec2d0 T dce112_create_resource_pool +ffffffff81fed610 t dce112_resource_destruct +ffffffff81fed8d0 t dce112_destroy_resource_pool +ffffffff81fed930 t dce112_panel_cntl_create +ffffffff81fed9c0 t dce112_link_encoder_create +ffffffff81fedac0 t dce112_validate_global +ffffffff81fedb60 t read_dce_straps +ffffffff81fedbd0 t create_audio +ffffffff81fedc00 t dce112_stream_encoder_create +ffffffff81fedca0 t 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dcn10_link_encoder_enable_tmds_output_with_clk_pattern_wa +ffffffff82015e60 T dcn10_link_encoder_enable_dp_output +ffffffff82015fc0 T dcn10_link_encoder_enable_dp_mst_output +ffffffff82016120 T dcn10_link_encoder_disable_output +ffffffff820162f0 T dcn10_link_encoder_dp_set_lane_settings +ffffffff82016490 T dcn10_link_encoder_dp_set_phy_pattern +ffffffff82016bb0 t set_dp_phy_pattern_hbr2_compliance_cp2520_2 +ffffffff82016db0 T dcn10_link_encoder_update_mst_stream_allocation_table +ffffffff82017080 T dcn10_link_encoder_connect_dig_be_to_fe +ffffffff820171c0 T dcn10_link_encoder_enable_hpd +ffffffff82017200 T dcn10_link_encoder_disable_hpd +ffffffff82017240 T dcn10_get_dig_mode +ffffffff820172b0 T dcn10_link_encoder_get_max_link_cap +ffffffff82017330 t program_pattern_symbols +ffffffff82018000 T mpc1_set_bg_color +ffffffff820181e0 T mpc1_get_mpcc +ffffffff82018270 T mpc1_update_stereo_mix +ffffffff82018390 T mpc1_assert_idle_mpcc +ffffffff82018460 T mpc1_get_mpcc_for_dpp +ffffffff82018510 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dcn20_program_output_csc +ffffffff8203cec0 T dcn20_set_output_transfer_func +ffffffff8203d040 T dcn20_set_blend_lut +ffffffff8203d0b0 T dcn20_set_shaper_3dlut +ffffffff8203d170 T dcn20_set_input_transfer_func +ffffffff8203d330 T dcn20_update_odm +ffffffff8203d420 T dcn20_pipe_control_lock +ffffffff8203d740 T dcn20_program_front_end_for_ctx +ffffffff8203e240 t dcn20_program_pipe +ffffffff8203ecf0 T dcn20_post_unlock_program_front_end +ffffffff8203f040 T dcn20_prepare_bandwidth +ffffffff8203f190 T dcn20_optimize_bandwidth +ffffffff8203f360 T dcn20_update_bandwidth +ffffffff8203f620 T dcn20_enable_writeback +ffffffff8203f770 T dcn20_disable_writeback +ffffffff8203f800 T dcn20_wait_for_blank_complete +ffffffff8203f890 T dcn20_dmdata_status_done +ffffffff8203f8e0 T dcn20_disable_stream_gating +ffffffff8203f990 T dcn20_enable_stream_gating +ffffffff8203fa30 T dcn20_set_dmdata_attributes +ffffffff8203faf0 T dcn20_init_vm_ctx +ffffffff8203fbb0 T dcn20_init_sys_ctx +ffffffff8203fc60 T dcn20_update_plane_addr +ffffffff8203fda0 T dcn20_unblank_stream +ffffffff8203ff30 T dcn20_setup_vupdate_interrupt +ffffffff8203ffa0 T dcn20_reset_hw_ctx_wrap +ffffffff82040360 T dcn20_update_visual_confirm_color +ffffffff82040470 T dcn20_update_mpcc +ffffffff820406e0 T dcn20_enable_stream +ffffffff820408b0 T dcn20_program_dmdata_engine +ffffffff82040950 T dcn20_fpga_init_hw +ffffffff82040f30 T dcn20_optimize_timing_for_fsft +ffffffff82040f70 T dcn20_set_disp_pattern_generator +ffffffff82041000 T dcn20_hw_sequencer_construct +ffffffff82042000 T enc2_fec_set_enable +ffffffff82042090 T enc2_fec_set_ready +ffffffff820420d0 T enc2_fec_is_active +ffffffff82042140 T link_enc2_read_state +ffffffff820421f0 T dcn20_link_encoder_enable_dp_output +ffffffff820422f0 T dcn20_link_encoder_get_max_link_cap +ffffffff820423a0 T dcn20_link_encoder_is_in_alt_mode +ffffffff82042420 T enc2_hw_init +ffffffff82042500 T dcn20_link_encoder_construct +ffffffff82043000 T mmhubbub2_config_mcif_irq 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T enc2_get_fifo_cal_average_level +ffffffff8204f650 T dcn20_stream_encoder_construct +ffffffff8204f6b0 t enc2_stream_encoder_update_hdmi_info_packets +ffffffff8204f780 t enc2_stream_encoder_stop_hdmi_info_packets +ffffffff8204fa90 t enc2_stream_encoder_update_dp_info_packets +ffffffff8204fb40 t enc2_read_state +ffffffff8204fcc0 t enc2_dp_set_dsc_config +ffffffff8204fd90 t enc2_dp_set_dsc_pps_info_packet +ffffffff82050260 t enc2_dp_set_odm_combine +ffffffff820502a0 t enc2_update_hdmi_info_packet +ffffffff82051000 T dcn20_vmid_setup +ffffffff82052000 T dccg201_create +ffffffff820520b0 t dccg201_update_dpp_dto +ffffffff82053000 T dpp201_construct +ffffffff82053080 t dpp201_get_optimal_number_of_taps +ffffffff82053440 t dpp201_cnv_setup +ffffffff82054000 T hubbub201_construct +ffffffff82054060 t hubbub201_program_watermarks +ffffffff82055000 T dcn201_hubp_construct +ffffffff82055070 t hubp201_setup +ffffffff82055350 t hubp201_program_surface_config +ffffffff82056000 T dcn201_update_plane_addr +ffffffff820562a0 T dcn201_init_blank +ffffffff820563e0 T dcn201_init_hw +ffffffff82056c90 T dcn201_plane_atomic_disconnect +ffffffff82056e00 T dcn201_update_mpcc +ffffffff820570a0 T dcn201_pipe_control_lock +ffffffff820571a0 T dcn201_set_cursor_attribute +ffffffff82057230 T dcn201_set_dmdata_attributes +ffffffff82057340 T dcn201_unblank_stream +ffffffff82058000 T dcn201_hw_sequencer_construct +ffffffff82059000 T dcn201_link_encoder_construct +ffffffff82059190 t dcn201_link_encoder_is_in_alt_mode +ffffffff82059200 t dcn201_link_encoder_get_max_link_cap +ffffffff8205a000 t mpc201_set_out_rate_control +ffffffff8205a130 T dcn201_mpc_construct +ffffffff8205b000 T dcn201_opp_construct +ffffffff8205c000 T optc201_is_two_pixels_per_containter +ffffffff8205c010 T dcn201_timing_generator_init +ffffffff8205c080 t optc201_validate_timing +ffffffff8205c180 t optc201_triplebuffer_unlock +ffffffff8205c230 t optc201_triplebuffer_lock +ffffffff8205c350 t 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enc3_se_dp_audio_enable +ffffffff82071210 T enc3_se_hdmi_audio_setup +ffffffff82071520 T dcn30_dio_stream_encoder_construct +ffffffff82071590 t enc3_stream_encoder_hdmi_set_stream_attribute +ffffffff82071b90 t enc3_stream_encoder_dvi_set_stream_attribute +ffffffff82071d90 t enc3_read_state +ffffffff82071f20 t enc3_dp_set_dsc_config +ffffffff82071ff0 t enc3_dp_set_odm_combine +ffffffff82073000 T dpp30_read_state +ffffffff82073050 T dpp3_program_post_csc +ffffffff82073240 T dpp3_set_pre_degam +ffffffff820732f0 T dpp3_cnv_setup +ffffffff82073bc0 T dpp3_set_cursor_attributes +ffffffff82073d30 T dpp3_get_optimal_number_of_taps +ffffffff82074750 T dpp3_construct +ffffffff820747b0 t dpp3_deferred_update +ffffffff82074b90 t dpp3_program_blnd_lut +ffffffff82075610 t dpp3_program_shaper +ffffffff820776a0 t dpp3_program_3dlut +ffffffff82077e50 t dpp3_set3dlut_ram12 +ffffffff82079000 T dpp3_program_cm_dealpha +ffffffff820790a0 T dpp3_program_cm_bias +ffffffff82079190 T dpp3_program_gamcor_lut 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optc3_wait_drr_doublebuffer_pending_clear +ffffffff82089a50 T optc3_set_vtotal_min_max +ffffffff82089a90 T optc3_tg_init +ffffffff82089af0 T dcn30_timing_generator_init +ffffffff82089b60 t optc3_set_odm_combine +ffffffff8208a000 T dcn30_add_stream_to_ctx +ffffffff8208a020 T dcn30_populate_dml_pipes_from_context +ffffffff8208a100 T dcn30_populate_dml_writeback_from_context +ffffffff8208a160 T dcn30_calc_max_scaled_time +ffffffff8208a1c0 T dcn30_set_mcif_arb_params +ffffffff8208a330 T dcn30_acquire_post_bldn_3dlut +ffffffff8208a4c0 T dcn30_release_post_bldn_3dlut +ffffffff8208a570 T dcn30_internal_validate_bw +ffffffff8208b2c0 t dcn30_split_stream_for_mpc_or_odm +ffffffff8208b5e0 T dcn30_can_support_mclk_switch_using_fw_based_vblank_stretch +ffffffff8208b6b0 t is_refresh_rate_support_mclk_switch_using_fw_based_vblank_stretch +ffffffff8208b750 T dcn30_setup_mclk_switch_using_fw_based_vblank_stretch +ffffffff8208b7f0 T dcn30_update_soc_for_wm_a +ffffffff8208b840 T dcn30_calculate_wm_and_dlg +ffffffff8208b8b0 T dcn30_validate_bandwidth +ffffffff8208bce0 T dcn30_update_bw_bounding_box +ffffffff8208c520 T dcn30_create_resource_pool +ffffffff8208daa0 t dcn30_resource_destruct +ffffffff8208e010 t dcn30_destroy_resource_pool +ffffffff8208e070 t dcn30_panel_cntl_create +ffffffff8208e100 t dcn30_link_encoder_create +ffffffff8208e1b0 t dcn30_get_panel_config_defaults +ffffffff8208e220 t read_dce_straps +ffffffff8208e250 t dcn30_create_audio +ffffffff8208e280 t dcn30_stream_encoder_create +ffffffff8208e400 t dcn30_hwseq_create +ffffffff8208f000 T vpg3_update_generic_info_packet +ffffffff8208f9a0 T vpg3_construct +ffffffff82090000 T dccg301_create +ffffffff82091000 T dcn301_link_encoder_construct +ffffffff82092000 T hubbub301_construct +ffffffff82093000 T dcn301_hw_sequencer_construct +ffffffff82094000 T dcn301_panel_cntl_construct +ffffffff82094050 t dcn301_panel_cntl_destroy +ffffffff820940a0 t dcn301_panel_cntl_hw_init +ffffffff820942b0 t dcn301_is_panel_backlight_on +ffffffff82094310 t dcn301_is_panel_powered_on +ffffffff820943c0 t dcn301_store_backlight_level +ffffffff82094460 t dcn301_get_16_bit_backlight_from_pwm +ffffffff82095000 T dcn301_create_resource_pool +ffffffff820965a0 t dcn301_destruct +ffffffff82096ae0 t dcn301_destroy_resource_pool +ffffffff82096b40 t dcn301_panel_cntl_create +ffffffff82096bd0 t dcn301_link_encoder_create +ffffffff82096c80 t dcn301_calculate_wm_and_dlg +ffffffff82096cf0 t read_dce_straps +ffffffff82096d20 t dcn301_create_audio +ffffffff82096d50 t dcn301_stream_encoder_create +ffffffff82096ed0 t dcn301_hwseq_create +ffffffff82097000 T dcn302_dpp_pg_control +ffffffff820972a0 T dcn302_hubp_pg_control +ffffffff82097550 T dcn302_dsc_pg_control +ffffffff82098000 T dcn302_hw_sequencer_construct +ffffffff82099000 T dcn302_update_bw_bounding_box +ffffffff82099050 T dcn302_create_resource_pool +ffffffff8209a3d0 t dcn302_resource_destruct +ffffffff8209a8e0 t dcn302_destroy_resource_pool +ffffffff8209a930 t dcn302_panel_cntl_create +ffffffff8209a9c0 t dcn302_link_encoder_create +ffffffff8209aa70 t dcn302_get_panel_config_defaults +ffffffff8209aae0 t read_dce_straps +ffffffff8209ab10 t dcn302_create_audio +ffffffff8209ab40 t dcn302_stream_encoder_create +ffffffff8209acc0 t dcn302_hwseq_create +ffffffff8209b000 T dcn303_dpp_pg_control +ffffffff8209b030 T dcn303_hubp_pg_control +ffffffff8209b060 T dcn303_dsc_pg_control +ffffffff8209b090 T dcn303_enable_power_gating_plane +ffffffff8209c000 T dcn303_hw_sequencer_construct +ffffffff8209d000 T dcn303_update_bw_bounding_box +ffffffff8209d050 T dcn303_create_resource_pool +ffffffff8209e270 t dcn303_resource_destruct +ffffffff8209e790 t dcn303_destroy_resource_pool +ffffffff8209e7e0 t dcn303_panel_cntl_create +ffffffff8209e870 t dcn303_link_encoder_create +ffffffff8209e920 t dcn303_get_panel_config_defaults +ffffffff8209e990 t read_dce_straps +ffffffff8209e9c0 t dcn303_create_audio +ffffffff8209e9f0 t dcn303_stream_encoder_create +ffffffff8209eb70 t dcn303_hwseq_create +ffffffff8209f000 T afmt31_powerdown +ffffffff8209f090 T afmt31_poweron +ffffffff8209f120 T afmt31_construct +ffffffff820a0000 T apg31_construct +ffffffff820a0050 t apg31_se_audio_setup +ffffffff820a0160 t apg31_audio_mute_control +ffffffff820a01a0 t apg31_enable +ffffffff820a02b0 t apg31_disable +ffffffff820a1000 T dccg31_update_dpp_dto +ffffffff820a1160 T dccg31_set_dpstreamclk +ffffffff820a12f0 t dccg31_disable_dpstreamclk +ffffffff820a1440 T dccg31_enable_symclk32_se +ffffffff820a1740 T dccg31_disable_symclk32_se +ffffffff820a1a10 T dccg31_enable_symclk32_le +ffffffff820a1bf0 T dccg31_disable_symclk32_le +ffffffff820a1d90 T dccg31_disable_dscclk +ffffffff820a1f50 T dccg31_enable_dscclk +ffffffff820a2120 T dccg31_set_physymclk +ffffffff820a2630 T dccg31_set_dtbclk_dto +ffffffff820a28e0 T dccg31_set_audio_dtbclk_dto +ffffffff820a29f0 T dccg31_get_dccg_ref_freq +ffffffff820a2a20 T dccg31_set_dispclk_change_mode +ffffffff820a2a70 T dccg31_init +ffffffff820a2fd0 T dccg31_otg_add_pixel +ffffffff820a3010 T dccg31_otg_drop_pixel +ffffffff820a3050 T dccg31_create +ffffffff820a4000 T dcn31_link_encoder_set_dio_phy_mux +ffffffff820a4390 T dcn31_link_encoder_construct +ffffffff820a4560 T dcn31_link_encoder_construct_minimal +ffffffff820a45e0 T dcn31_link_encoder_enable_dp_output +ffffffff820a4820 T dcn31_link_encoder_enable_dp_mst_output +ffffffff820a4a60 T dcn31_link_encoder_disable_output +ffffffff820a4cd0 T dcn31_link_encoder_is_in_alt_mode +ffffffff820a4e10 T dcn31_link_encoder_get_max_link_cap +ffffffff820a4f80 t enc31_hw_init +ffffffff820a5000 T dcn31_hpo_dp_link_enc_enable +ffffffff820a5160 T dcn31_hpo_dp_link_enc_disable +ffffffff820a51d0 T dcn31_hpo_dp_link_enc_set_link_test_pattern +ffffffff820a5b20 T dcn31_hpo_dp_link_enc_update_stream_allocation_table +ffffffff820a5da0 T dcn31_hpo_dp_link_enc_set_throttled_vcp_size +ffffffff820a6040 T dcn31_hpo_dp_link_enc_read_state +ffffffff820a62f0 T dcn31_hpo_dp_link_enc_enable_dp_output +ffffffff820a63f0 T dcn31_hpo_dp_link_enc_disable_output +ffffffff820a6530 T dcn31_hpo_dp_link_enc_set_ffe +ffffffff820a6620 T hpo_dp_link_encoder31_construct +ffffffff820a6680 t dcn31_hpo_dp_link_enc_is_in_alt_mode +ffffffff820a7000 T dcn31_hpo_dp_stream_encoder_construct +ffffffff820a7070 t dcn31_hpo_dp_stream_enc_enable_stream +ffffffff820a71b0 t dcn31_hpo_dp_stream_enc_dp_unblank +ffffffff820a7460 t dcn31_hpo_dp_stream_enc_dp_blank +ffffffff820a7560 t dcn31_hpo_dp_stream_enc_disable +ffffffff820a75d0 t dcn31_hpo_dp_stream_enc_set_stream_attribute +ffffffff820a7e80 t dcn31_hpo_dp_stream_enc_update_dp_info_packets +ffffffff820a8040 t dcn31_hpo_dp_stream_enc_stop_dp_info_packets +ffffffff820a81d0 t dcn31_hpo_dp_stream_enc_set_dsc_pps_info_packet +ffffffff820a8470 t dcn31_hpo_dp_stream_enc_map_stream_to_link +ffffffff820a8570 t dcn31_hpo_dp_stream_enc_mute_control +ffffffff820a85e0 t dcn31_hpo_dp_stream_enc_audio_setup +ffffffff820a8690 t dcn31_hpo_dp_stream_enc_audio_enable +ffffffff820a8760 t dcn31_hpo_dp_stream_enc_audio_disable +ffffffff820a8910 t dcn31_hpo_dp_stream_enc_read_state +ffffffff820a8aa0 t dcn31_set_hblank_min_symbol_width +ffffffff820a9000 T hubbub31_init_dchub_sys_ctx +ffffffff820a91e0 T hubbub31_construct +ffffffff820a9280 t hubbub31_get_dcc_compression_cap +ffffffff820a9460 t hubbub31_get_dchub_ref_freq +ffffffff820a9540 t hubbub31_program_watermarks +ffffffff820aae60 t hubbub31_verify_allow_pstate_change_high +ffffffff820ab020 t dcn31_program_det_size +ffffffff820ab200 t dcn31_program_compbuf_size +ffffffff820ab480 t dcn31_init_crb +ffffffff820ac000 T hubp31_set_unbounded_requesting +ffffffff820ac090 T hubp31_soft_reset +ffffffff820ac0e0 T hubp31_construct +ffffffff820ac150 t hubp31_program_extended_blank +ffffffff820ad000 T dcn31_init_hw +ffffffff820ad930 T dcn31_dsc_pg_control +ffffffff820adc80 T dcn31_enable_power_gating_plane +ffffffff820adee0 T dcn31_update_info_frame +ffffffff820adfb0 T dcn31_z10_save_init +ffffffff820ae070 T dcn31_z10_restore +ffffffff820ae150 T dcn31_hubp_pg_control +ffffffff820ae470 T dcn31_init_sys_ctx +ffffffff820ae520 T dcn31_reset_hw_ctx_wrap +ffffffff820ae8b0 T dcn31_setup_hpo_hw_control +ffffffff820af000 T dcn31_hw_sequencer_construct +ffffffff820b0000 T optc31_immediate_disable_crtc +ffffffff820b0100 T optc31_set_drr +ffffffff820b0310 T optc3_init_odm +ffffffff820b0480 T dcn31_timing_generator_init +ffffffff820b04f0 t optc31_enable_crtc +ffffffff820b05f0 t optc31_disable_crtc +ffffffff820b06d0 t optc31_set_odm_combine +ffffffff820b1000 T dcn31_panel_cntl_construct +ffffffff820b1040 t dcn31_panel_cntl_destroy +ffffffff820b1090 t dcn31_panel_cntl_hw_init +ffffffff820b1180 t dcn31_is_panel_backlight_on +ffffffff820b1220 t dcn31_is_panel_powered_on +ffffffff820b12d0 t dcn31_store_backlight_level +ffffffff820b1390 t dcn31_get_16_bit_backlight_from_pwm +ffffffff820b2000 T dcn31_populate_dml_pipes_from_context +ffffffff820b2340 T dcn31_calculate_wm_and_dlg +ffffffff820b23b0 T dcn31_populate_dml_writeback_from_context +ffffffff820b2410 T dcn31_set_mcif_arb_params +ffffffff820b2470 T dcn31_validate_bandwidth +ffffffff820b2850 T dcn31_create_resource_pool +ffffffff820b3bc0 t dcn31_resource_destruct +ffffffff820b4220 t dcn31_destroy_resource_pool +ffffffff820b4280 t dcn31_panel_cntl_create +ffffffff820b42f0 t dcn31_link_encoder_create +ffffffff820b43a0 t dcn31_link_enc_create_minimal +ffffffff820b4440 t dcn31_get_panel_config_defaults +ffffffff820b44b0 t read_dce_straps +ffffffff820b44e0 t dcn31_create_audio +ffffffff820b4510 t dcn31_stream_encoder_create +ffffffff820b4690 t dcn31_hpo_dp_stream_encoder_create +ffffffff820b4850 t dcn31_hpo_dp_link_encoder_create +ffffffff820b48e0 t dcn31_hwseq_create +ffffffff820b5000 T vpg31_powerdown +ffffffff820b5090 T vpg31_poweron +ffffffff820b5120 T vpg31_construct +ffffffff820b6000 T dccg314_create +ffffffff820b60b0 t dccg314_set_dpstreamclk +ffffffff820b6470 t dccg314_set_dtbclk_dto +ffffffff820b6660 t dccg314_set_pixel_rate_div +ffffffff820b69d0 t dccg314_set_valid_pixel_rate +ffffffff820b6a40 t dccg314_dpp_root_clock_control +ffffffff820b7000 T dcn314_dio_stream_encoder_construct +ffffffff820b7070 t enc314_stream_encoder_hdmi_set_stream_attribute +ffffffff820b7670 t enc314_stream_encoder_dvi_set_stream_attribute +ffffffff820b7870 t enc314_stream_encoder_dp_blank +ffffffff820b78c0 t enc314_stream_encoder_dp_unblank +ffffffff820b7c00 t enc314_read_state +ffffffff820b7d60 t enc314_dp_set_dsc_config +ffffffff820b7db0 t enc314_dp_set_odm_combine +ffffffff820b7df0 t enc314_set_dig_input_mode +ffffffff820b7e40 t enc314_enable_fifo +ffffffff820b7ee0 t enc314_disable_fifo +ffffffff820b7f30 t enc314_reset_fifo +ffffffff820b9000 T dcn314_update_odm +ffffffff820b95f0 T dcn314_dsc_pg_control +ffffffff820b99c0 T dcn314_enable_power_gating_plane +ffffffff820b9c50 T dcn314_calculate_dccg_k1_k2_values +ffffffff820b9de0 T dcn314_set_pixels_per_cycle +ffffffff820b9ed0 T dcn314_dpp_root_clock_control +ffffffff820b9f30 T dcn314_hubp_pg_control +ffffffff820bb000 T dcn314_hw_sequencer_construct +ffffffff820bc000 T dcn314_timing_generator_init +ffffffff820bc070 t optc314_enable_crtc +ffffffff820bc170 t optc314_disable_crtc +ffffffff820bc250 t optc314_phantom_crtc_post_enable +ffffffff820bc310 t optc314_set_odm_bypass +ffffffff820bc480 t optc314_set_odm_combine +ffffffff820bc770 t optc314_set_h_timing_div_manual_mode +ffffffff820bd000 T dcn314_validate_bandwidth +ffffffff820bd4c0 T dcn314_create_resource_pool +ffffffff820be790 t dcn314_resource_destruct +ffffffff820bedf0 t dcn314_destroy_resource_pool +ffffffff820bee50 t dcn31_panel_cntl_create +ffffffff820beec0 t dcn31_link_encoder_create +ffffffff820bef70 t dcn31_link_enc_create_minimal +ffffffff820bf010 t dcn314_populate_dml_pipes_from_context +ffffffff820bf0a0 t dcn314_update_bw_bounding_box +ffffffff820bf0f0 t dcn314_get_panel_config_defaults +ffffffff820bf160 t read_dce_straps +ffffffff820bf190 t dcn31_create_audio +ffffffff820bf1c0 t dcn314_stream_encoder_create +ffffffff820bf340 t dcn31_hpo_dp_stream_encoder_create +ffffffff820bf500 t dcn31_hpo_dp_link_encoder_create +ffffffff820bf590 t dcn314_hwseq_create +ffffffff820c0000 T dcn315_create_resource_pool +ffffffff820c1260 t dcn315_resource_destruct +ffffffff820c18c0 t dcn315_destroy_resource_pool +ffffffff820c1920 t dcn31_panel_cntl_create +ffffffff820c1990 t dcn31_link_encoder_create +ffffffff820c1a40 t dcn31_link_enc_create_minimal +ffffffff820c1ae0 t dcn315_populate_dml_pipes_from_context +ffffffff820c2170 t dcn315_get_panel_config_defaults +ffffffff820c21e0 t read_dce_straps +ffffffff820c2210 t dcn31_create_audio +ffffffff820c2240 t dcn315_stream_encoder_create +ffffffff820c23c0 t dcn31_hpo_dp_stream_encoder_create +ffffffff820c2580 t dcn31_hpo_dp_link_encoder_create +ffffffff820c2610 t dcn31_hwseq_create +ffffffff820c3000 T dcn316_create_resource_pool +ffffffff820c42a0 t dcn316_resource_destruct +ffffffff820c4900 t dcn316_destroy_resource_pool +ffffffff820c4960 t dcn31_panel_cntl_create +ffffffff820c49d0 t dcn31_link_encoder_create +ffffffff820c4a80 t dcn31_link_enc_create_minimal +ffffffff820c4b20 t dcn316_populate_dml_pipes_from_context +ffffffff820c4e50 t dcn316_get_panel_config_defaults +ffffffff820c4ec0 t read_dce_straps +ffffffff820c4ef0 t dcn31_create_audio +ffffffff820c4f20 t dcn316_stream_encoder_create +ffffffff820c50a0 t dcn31_hpo_dp_stream_encoder_create +ffffffff820c5260 t dcn31_hpo_dp_link_encoder_create +ffffffff820c52f0 t dcn31_hwseq_create +ffffffff820c6000 T dccg32_create +ffffffff820c60b0 t dccg32_get_dccg_ref_freq +ffffffff820c60e0 t dccg32_otg_add_pixel +ffffffff820c6120 t dccg32_otg_drop_pixel +ffffffff820c6160 t dccg32_set_dpstreamclk +ffffffff820c6490 t dccg32_set_dtbclk_dto +ffffffff820c6690 t dccg32_set_pixel_rate_div +ffffffff820c6a60 t dccg32_set_valid_pixel_rate +ffffffff820c7000 T enc32_hw_init +ffffffff820c7090 T dcn32_link_encoder_enable_dp_output +ffffffff820c70e0 T dcn32_link_encoder_construct +ffffffff820c72c0 t dcn32_link_encoder_is_in_alt_mode +ffffffff820c7340 t dcn32_link_encoder_get_max_link_cap +ffffffff820c8000 T dcn32_dio_stream_encoder_construct +ffffffff820c8070 t enc32_stream_encoder_hdmi_set_stream_attribute +ffffffff820c85c0 t enc32_stream_encoder_dvi_set_stream_attribute +ffffffff820c8740 t enc32_stream_encoder_dp_unblank +ffffffff820c8c00 t enc32_read_state +ffffffff820c8d60 t enc32_dp_set_dsc_config +ffffffff820c8db0 t enc32_dp_set_odm_combine +ffffffff820c8df0 t enc32_set_dig_input_mode +ffffffff820c9000 T dpp32_construct +ffffffff820c9060 t dscl32_calc_lb_num_partitions +ffffffff820ca000 T hpo_dp_link_encoder32_construct +ffffffff820ca060 t dcn32_hpo_dp_link_enc_is_in_alt_mode +ffffffff820cb000 T dcn32_program_det_size +ffffffff820cb1a0 T hubbub32_program_urgent_watermarks +ffffffff820cb910 T hubbub32_program_stutter_watermarks +ffffffff820cbd60 T hubbub32_program_pstate_watermarks +ffffffff820cc1f0 T hubbub32_program_usr_watermarks +ffffffff820cc440 T hubbub32_force_usr_retraining_allow +ffffffff820cc4c0 T hubbub32_force_wm_propagate_to_pipes +ffffffff820cc560 T hubbub32_construct +ffffffff820cc5e0 t hubbub32_wm_read_state +ffffffff820ccaa0 t hubbub32_program_watermarks +ffffffff820ccbb0 t hubbub32_init_watermarks +ffffffff820ccff0 t dcn32_program_compbuf_size +ffffffff820cd270 t dcn32_init_crb +ffffffff820ce000 T hubp32_update_force_pstate_disallow +ffffffff820ce090 T hubp32_update_mall_sel +ffffffff820ce120 T hubp32_prepare_subvp_buffering +ffffffff820ce1c0 T hubp32_phantom_hubp_post_enable +ffffffff820ce2d0 T hubp32_cursor_set_attributes +ffffffff820ce590 T hubp32_construct +ffffffff820cf000 T dcn32_dsc_pg_control +ffffffff820cf320 T dcn32_enable_power_gating_plane +ffffffff820cf4c0 T dcn32_hubp_pg_control +ffffffff820cf730 T dcn32_apply_idle_power_optimizations +ffffffff820cf9a0 t dcn32_calculate_cab_allocation +ffffffff820cfd50 T dcn32_commit_subvp_config +ffffffff820cfe00 T dcn32_subvp_pipe_control_lock +ffffffff820cffd0 T dcn32_set_mcm_luts +ffffffff820d0160 T dcn32_set_input_transfer_func +ffffffff820d02a0 T dcn32_set_output_transfer_func +ffffffff820d04b0 T dcn32_subvp_update_force_pstate +ffffffff820d0600 T dcn32_update_mall_sel +ffffffff820d0770 T dcn32_program_mall_pipe_config +ffffffff820d0860 T dcn32_init_hw +ffffffff820d1020 T dcn32_update_odm +ffffffff820d1610 T dcn32_calculate_dccg_k1_k2_values +ffffffff820d1810 T dcn32_is_dp_dig_pixel_rate_div_policy +ffffffff820d18a0 T dcn32_set_pixels_per_cycle +ffffffff820d19e0 T dcn32_unblank_stream +ffffffff820d1bc0 T dcn32_disable_link_output +ffffffff820d1e90 T dcn32_update_phantom_vp_position +ffffffff820d1fa0 T dcn32_dsc_pg_status +ffffffff820d2080 T dcn32_update_dsc_pg +ffffffff820d3000 T dcn32_hw_sequencer_init_functions +ffffffff820d4000 t mmhubbub32_warmup_mcif +ffffffff820d4210 t mmhubbub32_config_mcif_buf +ffffffff820d46c0 t mmhubbub32_config_mcif_arb +ffffffff820d4ad0 T dcn32_mmhubbub_construct +ffffffff820d5000 t mpc32_mpc_init +ffffffff820d51e0 t mpc32_program_post1dlut +ffffffff820d5cf0 t mpc32_program_shaper +ffffffff820d7f80 t mpc32_program_3dlut +ffffffff820d8950 T dcn32_mpc_construct +ffffffff820d8a10 t mpc32_power_on_shaper_3dlut +ffffffff820d8c40 t mpc32_set3dlut_ram12 +ffffffff820d9000 T optc32_set_h_timing_div_manual_mode +ffffffff820d9040 T dcn32_timing_generator_init +ffffffff820d90b0 t optc32_enable_crtc +ffffffff820d91b0 t optc32_disable_crtc +ffffffff820d9290 t optc32_phantom_crtc_post_enable +ffffffff820d9350 t optc32_disable_phantom_otg +ffffffff820d9390 t optc32_set_drr +ffffffff820d95e0 t optc32_set_odm_bypass +ffffffff820d9750 t optc32_set_odm_combine +ffffffff820da000 T dcn32_panel_cntl_create +ffffffff820da070 T dcn32_acquire_post_bldn_3dlut +ffffffff820da160 T dcn32_release_post_bldn_3dlut +ffffffff820da210 T dcn32_retain_phantom_pipes +ffffffff820da2f0 T dcn32_remove_phantom_pipes +ffffffff820da440 T dcn32_add_phantom_pipes +ffffffff820da870 T dcn32_validate_bandwidth +ffffffff820dad50 T dcn32_populate_dml_pipes_from_context +ffffffff820db140 T dcn32_calculate_wm_and_dlg +ffffffff820db1b0 T dcn32_create_resource_pool +ffffffff820db260 t dcn32_resource_construct +ffffffff820e6800 T dcn32_acquire_idle_pipe_for_head_pipe_in_layer +ffffffff820e6a30 T dcn32_calc_num_avail_chans_for_mall +ffffffff820e6aa0 t dcn32_mpc_create +ffffffff820eb110 t dcn32_dwbc_create +ffffffff820ebb40 t dcn32_mmhubbub_create +ffffffff820ec020 t dcn32_resource_destruct +ffffffff820ec690 t dcn32_destroy_resource_pool +ffffffff820ec6f0 t dcn32_link_encoder_create +ffffffff820ed7c0 t dcn32_update_bw_bounding_box +ffffffff820ed810 t read_dce_straps +ffffffff820ed840 t dcn32_create_audio +ffffffff820edbe0 t dcn32_stream_encoder_create +ffffffff820efa70 t dcn32_hpo_dp_stream_encoder_create +ffffffff820f0870 t dcn32_hpo_dp_link_encoder_create +ffffffff820f0cf0 t dcn32_hwseq_create +ffffffff820f11e0 t dcn32_vpg_create +ffffffff820f2000 T dcn32_helper_calculate_num_ways_for_subvp +ffffffff820f2190 T dcn32_merge_pipes_for_subvp +ffffffff820f2350 T dcn32_all_pipes_have_stream_and_plane +ffffffff820f23e0 T dcn32_subvp_in_use +ffffffff820f2470 T dcn32_mpo_in_use +ffffffff820f24e0 T dcn32_any_surfaces_rotated +ffffffff820f2570 T dcn32_determine_det_override +ffffffff820f28b0 T dcn32_set_det_allocations +ffffffff820f2a30 T dcn32_save_mall_state +ffffffff820f2ae0 T dcn32_restore_mall_state +ffffffff820f3000 T dcn321_link_encoder_construct +ffffffff820f4000 T dcn321_create_resource_pool +ffffffff820f40b0 t dcn321_resource_construct +ffffffff820ff5f0 t dcn321_mpc_create +ffffffff82103c60 t dcn321_dwbc_create +ffffffff82104690 t dcn321_mmhubbub_create +ffffffff82104b70 t dcn321_resource_destruct +ffffffff821051e0 t dcn321_destroy_resource_pool +ffffffff82105240 t dcn321_link_encoder_create +ffffffff82106310 t dcn321_update_bw_bounding_box +ffffffff82106360 t read_dce_straps +ffffffff82106390 t dcn321_create_audio +ffffffff82106730 t dcn321_stream_encoder_create +ffffffff821085c0 t dcn321_hpo_dp_stream_encoder_create +ffffffff821093c0 t dcn321_hpo_dp_link_encoder_create +ffffffff82109840 t dcn321_hwseq_create +ffffffff82109d30 t dcn321_vpg_create +ffffffff8210b000 T bw_int_to_fixed_nonconst +ffffffff8210b090 T bw_frc_to_fixed +ffffffff8210b260 T bw_floor2 +ffffffff8210b310 T bw_ceil2 +ffffffff8210b390 T bw_mul +ffffffff8210c000 T convert_to_custom_float_format +ffffffff8210d000 T bw_calcs_init +ffffffff8210de60 T bw_calcs +ffffffff8210f800 t calculate_bandwidth +ffffffff82117000 T scaler_settings_calculation +ffffffff82117350 T mode_support_and_system_configuration +ffffffff8211d180 T display_pipe_configuration +ffffffff8211dab0 T dispclkdppclkdcfclk_deep_sleep_prefetch_parameters_watermarks_and_performance_calculation +ffffffff82123000 T dcn_bw_mod +ffffffff82123060 T dcn_bw_min2 +ffffffff821230a0 T dcn_bw_max +ffffffff821230d0 T dcn_bw_max2 +ffffffff82123110 T dcn_bw_floor2 +ffffffff821231b0 T dcn_bw_floor +ffffffff821231e0 T dcn_bw_ceil +ffffffff82123220 T dcn_bw_ceil2 +ffffffff821232d0 T dcn_bw_max3 +ffffffff82123350 T dcn_bw_max5 +ffffffff82123490 T dcn_bw_pow +ffffffff82123520 T dcn_bw_fabs +ffffffff82123560 T dcn_bw_log +ffffffff82124000 T swizzle_mode_to_macro_tile_size +ffffffff82124090 T dcn_validate_bandwidth +ffffffff82126300 T dcn_bw_sync_calcs_and_dml +ffffffff82126550 t dcn_bw_calc_rq_dlg_ttu +ffffffff82126d20 T dcn_find_dcfclk_suits_all +ffffffff82127180 T dcn_bw_update_from_pplib_fclks +ffffffff82127300 T dcn_bw_update_from_pplib_dcfclks +ffffffff821273d0 T dcn_get_soc_clks +ffffffff82127450 T dcn_bw_notify_pplib_of_wm_ranges +ffffffff82128000 T dcn20_populate_dml_writeback_from_context +ffffffff82128180 T dcn20_fpu_set_wb_arb_params +ffffffff82128330 T dcn20_calculate_dlg_params +ffffffff82128b00 T dcn20_populate_dml_pipes_from_context +ffffffff821299a0 T dcn20_calculate_wm +ffffffff8212a190 T dcn20_update_bounding_box +ffffffff8212a410 T dcn20_cap_soc_clocks +ffffffff8212a770 T dcn20_patch_bounding_box +ffffffff8212a8e0 T dcn20_validate_bandwidth_fp +ffffffff8212aa80 t dcn20_validate_bandwidth_internal +ffffffff8212ae80 T dcn20_fpu_set_wm_ranges +ffffffff8212af20 T dcn20_fpu_adjust_dppclk +ffffffff8212afc0 T dcn21_populate_dml_pipes_from_context +ffffffff8212b0d0 T dcn21_validate_bandwidth_fp +ffffffff8212bb50 T dcn21_update_bw_bounding_box +ffffffff8212bf60 T dcn21_clk_mgr_set_bw_params_wm_table +ffffffff8212bfc0 T dcn201_populate_dml_writeback_from_context_fpu +ffffffff8212c2c0 t calculate_wm_set_for_vlevel +ffffffff8212d000 T dml20_recalculate +ffffffff8212d740 t dml20_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation +ffffffff82132bf0 T dml20_ModeSupportAndSystemConfigurationFull +ffffffff82139fc0 t TruncToValidBPP +ffffffff8213a1a0 t CalculateVMAndRowBytes +ffffffff8213a860 t CalculatePrefetchSourceLines +ffffffff8213aa30 t CalculateWriteBackDelay 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+ffffffff82151660 T dml20v2_rq_dlg_get_dlg_reg +ffffffff82153560 t get_surf_rq_param +ffffffff82153dc0 t calculate_ttu_cursor +ffffffff82155000 T dml21_recalculate +ffffffff82155710 t DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation +ffffffff8215aef0 T dml21_ModeSupportAndSystemConfigurationFull +ffffffff821612d0 t TruncToValidBPP +ffffffff82161860 t CalculateDCFCLKDeepSleep +ffffffff82161ba0 t CalculateVMAndRowBytes +ffffffff82162400 t CalculatePrefetchSourceLines +ffffffff821625d0 t CalculateWriteBackDelay +ffffffff821628a0 t CalculatePrefetchSchedulePerPlane +ffffffff821630c0 t CalculateUrgentBurstFactor +ffffffff821634d0 t CalculateFlipSchedule +ffffffff821639b0 t CalculateWatermarksAndDRAMSpeedChangeSupport +ffffffff821649a0 t CalculatePrefetchSchedule +ffffffff82167000 T dml21_rq_dlg_get_rq_reg +ffffffff82167490 t dml_rq_dlg_get_rq_params +ffffffff82167660 T dml21_rq_dlg_get_dlg_reg +ffffffff82169930 t get_surf_rq_param +ffffffff8216a250 t calculate_ttu_cursor +ffffffff8216b000 T optc3_fpu_set_vrr_m_const +ffffffff8216b4a0 T dcn30_fpu_populate_dml_writeback_from_context +ffffffff8216b7b0 T dcn30_fpu_set_mcif_arb_params +ffffffff8216b920 T dcn30_fpu_update_soc_for_wm_a +ffffffff8216b9f0 T dcn30_fpu_calculate_wm_and_dlg +ffffffff8216c300 T dcn30_fpu_update_dram_channel_width_bytes +ffffffff8216c360 T dcn30_fpu_update_max_clk +ffffffff8216c410 T dcn30_fpu_get_optimal_dcfclk_fclk_for_uclk +ffffffff8216c510 T dcn30_fpu_update_bw_bounding_box +ffffffff8216c6f0 T dcn30_find_dummy_latency_index_for_fw_based_mclk_switch +ffffffff8216c8d0 T dcn3_fpu_build_wm_range_table +ffffffff8216cbb0 T patch_dcn30_soc_bounding_box +ffffffff8216d000 T dml30_recalculate +ffffffff8216d5f0 t DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation +ffffffff821740e0 T dml30_CalculateBytePerPixelAnd256BBlockSizes +ffffffff82174350 T dml30_CalculateWriteBackDISPCLK +ffffffff821744c0 t dml_max3 +ffffffff82174520 T dml30_ModeSupportAndSystemConfigurationFull +ffffffff8217bf80 t CalculateSwathAndDETConfiguration +ffffffff8217c680 t TruncToValidBPP +ffffffff8217c8e0 t CalculateVMAndRowBytes +ffffffff8217cf50 t CalculatePrefetchSourceLines +ffffffff8217d120 t CalculateUrgentBurstFactor +ffffffff8217d3b0 t CalculateDCFCLKDeepSleep +ffffffff8217d6d0 t UseMinimumDCFCLK +ffffffff8217e9f0 t CalculatePrefetchSchedule +ffffffff8217fe90 t CalculateFlipSchedule +ffffffff82180390 t CalculateWatermarksAndDRAMSpeedChangeSupport +ffffffff821810d0 t CalculateSwathWidth +ffffffff82182000 T dml30_rq_dlg_get_rq_reg +ffffffff821824b0 t dml_rq_dlg_get_rq_params +ffffffff82182740 T dml30_rq_dlg_get_dlg_reg +ffffffff82184e20 t get_surf_rq_param +ffffffff821857b0 t calculate_ttu_cursor +ffffffff82186000 T dcn301_update_bw_bounding_box +ffffffff821862f0 T dcn301_fpu_set_wm_ranges +ffffffff82186390 T dcn301_fpu_init_soc_bounding_box +ffffffff82186430 T dcn301_calculate_wm_and_dlg_fp +ffffffff82186760 t calculate_wm_set_for_vlevel +ffffffff82187000 T dcn302_fpu_update_bw_bounding_box +ffffffff82187ae0 T dcn302_fpu_init_soc_bounding_box +ffffffff82188000 T dcn303_fpu_update_bw_bounding_box +ffffffff82188b40 T dcn303_fpu_init_soc_bounding_box +ffffffff82189000 T dcn31_zero_pipe_dcc_fraction +ffffffff82189060 T dcn31_update_soc_for_wm_a +ffffffff82189110 T dcn315_update_soc_for_wm_a +ffffffff821891e0 T dcn31_calculate_wm_and_dlg_fp +ffffffff82189840 T dcn31_update_bw_bounding_box +ffffffff82189c00 T dcn315_update_bw_bounding_box +ffffffff82189f00 T dcn316_update_bw_bounding_box +ffffffff8218a2e0 T dcn_get_max_non_odm_pix_rate_100hz +ffffffff8218a340 T dcn_get_approx_det_segs_required_for_pstate +ffffffff8218b000 T dml31_recalculate +ffffffff8218b2d0 t DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation +ffffffff821921f0 T dml31_CalculateWriteBackDISPCLK +ffffffff82192360 t dml_max3 +ffffffff821923c0 T dml31_ModeSupportAndSystemConfigurationFull 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DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation +ffffffff821ac0a0 T dml314_CalculateWriteBackDISPCLK +ffffffff821ac210 t dml_max3 +ffffffff821ac270 T dml314_ModeSupportAndSystemConfigurationFull +ffffffff821b4fb0 t CalculateBytePerPixelAnd256BBlockSizes +ffffffff821b5220 t CalculateSwathAndDETConfiguration +ffffffff821b5860 t TruncToValidBPP +ffffffff821b5ab0 t CalculateDCFCLKDeepSleep +ffffffff821b5dd0 t CalculateVMAndRowBytes +ffffffff821b6410 t CalculatePrefetchSourceLines +ffffffff821b65e0 t CalculateUrgentBurstFactor +ffffffff821b6870 t CalculateMaxVStartup +ffffffff821b69b0 t CalculatePrefetchSchedulePerPlane +ffffffff821b70f0 t CalculateFlipSchedule +ffffffff821b7670 t CalculateWatermarksAndDRAMSpeedChangeSupport +ffffffff821b8290 t CalculateSwathWidth +ffffffff821b87a0 t CalculatePrefetchSchedule +ffffffff821b9c40 t CalculateVupdateAndDynamicMetadataParameters +ffffffff821ba000 T dml314_rq_dlg_get_rq_reg +ffffffff821ba4b0 t dml_rq_dlg_get_rq_params +ffffffff821ba740 T dml314_rq_dlg_get_dlg_reg +ffffffff821bd160 t get_surf_rq_param +ffffffff821be000 T dcn32_build_wm_range_table_fpu +ffffffff821be390 T dcn32_find_dummy_latency_index_for_fw_based_mclk_switch +ffffffff821be5c0 T dcn32_internal_validate_bw +ffffffff821c0210 T dcn32_helper_populate_phantom_dlg_params +ffffffff821c03b0 T dcn32_predict_pipe_split +ffffffff821c05e0 T insert_entry_into_table_sorted +ffffffff821c0a30 T dcn32_set_phantom_stream_timing +ffffffff821c0cd0 t dcn32_split_stream_for_mpc_or_odm +ffffffff821c1080 T dcn32_calculate_wm_and_dlg_fpu +ffffffff821c2610 T dcn32_patch_dpm_table +ffffffff821c2820 T dcn32_update_bw_bounding_box_fpu +ffffffff821c3fb0 T dcn32_zero_pipe_dcc_fraction +ffffffff821c4010 T dcn32_allow_subvp_with_active_margin +ffffffff821c40e0 t subvp_drr_schedulable +ffffffff821c5000 T dml32_recalculate +ffffffff821c9300 T dml32_ModeSupportAndSystemConfigurationFull +ffffffff821d1000 T dml32_dscceComputeDelay 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dml32_CalculatePrefetchSourceLines +ffffffff821d7820 T dml32_CalculateMALLUseForStaticScreen +ffffffff821d7960 T dml32_CalculateRowBandwidth +ffffffff821d7ac0 T dml32_CalculateUrgentLatency +ffffffff821d7b70 T dml32_CalculateUrgentBurstFactor +ffffffff821d7e20 T dml32_CalculateDCFCLKDeepSleep +ffffffff821d8170 T dml32_CalculateWriteBackDelay +ffffffff821d82d0 T dml32_UseMinimumDCFCLK +ffffffff821d9340 T dml32_CalculateExtraLatencyBytes +ffffffff821d9500 T dml32_CalculateTWait +ffffffff821d95f0 T dml32_CalculateVUpdateAndDynamicMetadataParameters +ffffffff821d9850 T dml32_get_return_bw_mbps +ffffffff821d9a10 T dml32_get_return_bw_mbps_vm_only +ffffffff821d9af0 T dml32_CalculateExtraLatency +ffffffff821d9d10 T dml32_CalculatePrefetchSchedule +ffffffff821db2e0 T dml32_CalculateFlipSchedule +ffffffff821db840 T dml32_CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport +ffffffff821dc960 T dml32_CalculateWriteBackDISPCLK +ffffffff821dcb30 T dml32_CalculateMinAndMaxPrefetchMode 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dml_log_mode_support_params +ffffffff821e6000 T dml_get_voltage_level +ffffffff821e6240 t fetch_socbb_params +ffffffff821e6720 t fetch_ip_params +ffffffff821e6bc0 t fetch_pipe_params +ffffffff821e7c40 T PixelClockAdjustmentForProgressiveToInterlaceUnit +ffffffff821e7cc0 T get_clk_dcf_deepsleep +ffffffff821e7dd0 T get_wm_urgent +ffffffff821e7ee0 T get_wm_memory_trip +ffffffff821e7ff0 T get_wm_writeback_urgent +ffffffff821e8100 T get_wm_stutter_exit +ffffffff821e8210 T get_wm_stutter_enter_exit +ffffffff821e8320 T get_wm_z8_stutter_exit +ffffffff821e8430 T get_wm_z8_stutter_enter_exit +ffffffff821e8540 T get_stutter_efficiency_z8 +ffffffff821e8650 T get_stutter_num_bursts_z8 +ffffffff821e8760 T get_wm_dram_clock_change +ffffffff821e8870 T get_wm_writeback_dram_clock_change +ffffffff821e8980 T get_stutter_efficiency +ffffffff821e8a90 T get_stutter_efficiency_no_vblank +ffffffff821e8ba0 T get_stutter_period +ffffffff821e8cb0 T get_urgent_latency +ffffffff821e8dc0 T get_urgent_extra_latency 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get_unbounded_request_enabled +ffffffff821ea5b0 T get_dsc_delay +ffffffff821ea6e0 T get_dppclk_calculated +ffffffff821ea800 T get_dscclk_calculated +ffffffff821ea920 T get_min_ttu_vblank +ffffffff821eaa40 T get_min_ttu_vblank_in_us +ffffffff821eab60 T get_vratio_prefetch_l +ffffffff821eac80 T get_vratio_prefetch_c +ffffffff821eada0 T get_dst_x_after_scaler +ffffffff821eaec0 T get_dst_y_after_scaler +ffffffff821eafe0 T get_dst_y_per_vm_vblank +ffffffff821eb100 T get_dst_y_per_row_vblank +ffffffff821eb220 T get_dst_y_prefetch +ffffffff821eb340 T get_dst_y_per_vm_flip +ffffffff821eb460 T get_dst_y_per_row_flip +ffffffff821eb580 T get_refcyc_per_vm_group_vblank +ffffffff821eb6a0 T get_refcyc_per_vm_group_flip +ffffffff821eb7c0 T get_refcyc_per_vm_req_vblank +ffffffff821eb8e0 T get_refcyc_per_vm_req_flip +ffffffff821eba00 T get_refcyc_per_vm_group_vblank_in_us +ffffffff821ebb20 T get_refcyc_per_vm_group_flip_in_us +ffffffff821ebc40 T get_refcyc_per_vm_req_vblank_in_us +ffffffff821ebd60 T get_refcyc_per_vm_req_flip_in_us +ffffffff821ebe80 T get_refcyc_per_vm_dmdata_in_us +ffffffff821ebfa0 T get_dmdata_dl_delta_in_us +ffffffff821ec0c0 T get_refcyc_per_line_delivery_l_in_us +ffffffff821ec1e0 T get_refcyc_per_line_delivery_c_in_us +ffffffff821ec300 T get_refcyc_per_line_delivery_pre_l_in_us +ffffffff821ec420 T get_refcyc_per_line_delivery_pre_c_in_us +ffffffff821ec540 T get_refcyc_per_req_delivery_l_in_us +ffffffff821ec660 T get_refcyc_per_req_delivery_c_in_us +ffffffff821ec780 T get_refcyc_per_req_delivery_pre_l_in_us +ffffffff821ec8a0 T get_refcyc_per_req_delivery_pre_c_in_us +ffffffff821ec9c0 T get_refcyc_per_cursor_req_delivery_in_us +ffffffff821ecae0 T get_refcyc_per_cursor_req_delivery_pre_in_us +ffffffff821ecc00 T get_refcyc_per_meta_chunk_nom_l_in_us +ffffffff821ecd20 T get_refcyc_per_meta_chunk_nom_c_in_us +ffffffff821ece40 T get_refcyc_per_meta_chunk_vblank_l_in_us +ffffffff821ecf60 T get_refcyc_per_meta_chunk_vblank_c_in_us +ffffffff821ed080 T get_refcyc_per_meta_chunk_flip_l_in_us +ffffffff821ed1a0 T get_refcyc_per_meta_chunk_flip_c_in_us +ffffffff821ed2c0 T get_vstartup +ffffffff821ed3f0 T get_vupdate_offset +ffffffff821ed520 T get_vupdate_width +ffffffff821ed640 T get_vready_offset +ffffffff821ed760 T get_vready_at_or_after_vsync +ffffffff821ed890 T get_min_dst_y_next_start +ffffffff821ed9c0 T get_dst_y_per_pte_row_nom_l +ffffffff821edae0 T get_dst_y_per_pte_row_nom_c +ffffffff821edc00 T get_dst_y_per_meta_row_nom_l +ffffffff821edd20 T get_dst_y_per_meta_row_nom_c +ffffffff821ede40 T get_refcyc_per_pte_group_nom_l_in_us +ffffffff821edf60 T get_refcyc_per_pte_group_nom_c_in_us +ffffffff821ee080 T get_refcyc_per_pte_group_vblank_l_in_us +ffffffff821ee1a0 T get_refcyc_per_pte_group_vblank_c_in_us +ffffffff821ee2c0 T get_refcyc_per_pte_group_flip_l_in_us +ffffffff821ee3e0 T get_refcyc_per_pte_group_flip_c_in_us +ffffffff821ee500 T get_vstartup_calculated +ffffffff821ee630 T get_dpte_row_height_linear_c +ffffffff821ee760 T get_swath_height_l +ffffffff821ee890 T get_swath_height_c +ffffffff821ee9c0 T get_det_stored_buffer_size_l_bytes +ffffffff821eeaf0 T get_det_stored_buffer_size_c_bytes +ffffffff821eec20 T get_dpte_group_size_in_bytes +ffffffff821eed50 T get_vm_group_size_in_bytes +ffffffff821eee80 T get_dpte_row_height_linear_l +ffffffff821eefb0 T get_pte_buffer_mode +ffffffff821ef0e0 T get_subviewport_lines_needed_in_mall +ffffffff821ef210 T get_total_immediate_flip_bytes +ffffffff821ef330 T get_total_immediate_flip_bw +ffffffff821ef510 T get_total_prefetch_bw +ffffffff821ef6f0 T get_total_surface_size_in_mall_bytes +ffffffff821ef890 T get_det_buffer_size_kbytes +ffffffff821ef9c0 T get_is_phantom_pipe +ffffffff821efaf0 T Calculate256BBlockSizes +ffffffff821efbe0 T CalculateMinAndMaxPrefetchMode +ffffffff821efc60 T ModeSupportAndSystemConfiguration +ffffffff821eff70 T CalculateWriteBackDISPCLK +ffffffff821f1000 T print__rq_params_st +ffffffff821f1030 T print__data_rq_sizing_params_st +ffffffff821f1060 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-ffffffff825366c0 T sdmmc_mem_sd_switch -ffffffff82536970 T sdmmc_be512_to_bitfield512 -ffffffff82536a20 T sdmmc_mem_mmc_switch -ffffffff82536b10 T sdmmc_mem_init -ffffffff82536c60 T sdmmc_mem_set_blocklen -ffffffff82536d60 T sdmmc_mem_sd_init -ffffffff82537140 T sdmmc_mem_mmc_init -ffffffff82537800 T sdmmc_mem_select_transfer_mode -ffffffff82537880 T sdmmc_mem_execute_tuning -ffffffff82537910 T sdmmc_mem_read_block_subr -ffffffff82537c70 T sdmmc_mem_single_read_block -ffffffff82537d40 T sdmmc_mem_read_block -ffffffff82537ef0 T sdmmc_mem_write_block_subr -ffffffff82538240 T sdmmc_mem_single_write_block -ffffffff82538310 T sdmmc_mem_write_block -ffffffff825384c0 T sdmmc_mem_hibernate_write -ffffffff82539000 T sdmmc_scsi_cmd -ffffffff825391f0 T sdmmc_minphys -ffffffff82539270 T sdmmc_scsi_attach -ffffffff82539460 T sdmmc_alloc_ccbs -ffffffff825395a0 T sdmmc_free_ccbs -ffffffff82539600 T sdmmc_scsi_detach -ffffffff82539760 T sdmmc_stimeout -ffffffff825397e0 T sdmmc_ccb_alloc -ffffffff82539890 T sdmmc_ccb_free -ffffffff82539970 T sdmmc_inquiry -ffffffff82539be0 T sdmmc_start_xs -ffffffff82539cd0 T sdmmc_complete_xs -ffffffff82539da0 T sdmmc_done_xs -ffffffff82539df0 T sdmmc_scsi_hibernate_io -ffffffff8253a000 T bwfm_sdio_preinit -ffffffff8253a4a0 T bwfm_sdio_txcheck -ffffffff8253a4e0 T bwfm_sdio_txdata -ffffffff8253a550 T bwfm_sdio_txctl -ffffffff8253a6a0 T bwfm_sdio_buscore_read -ffffffff8253a6b0 T bwfm_sdio_buscore_write -ffffffff8253a6d0 T bwfm_sdio_buscore_prepare -ffffffff8253a810 T bwfm_sdio_buscore_activate -ffffffff8253a890 T bwfm_sdio_match -ffffffff8253a940 T bwfm_sdio_attach -ffffffff8253ac00 T bwfm_sdio_detach -ffffffff8253ac60 T bwfm_sdio_task -ffffffff8253adc0 T bwfm_sdio_write_1 -ffffffff8253adf0 T bwfm_sdio_read_1 -ffffffff8253ae20 T bwfm_sdio_write_4 -ffffffff8253aed0 T bwfm_sdio_read_4 -ffffffff8253af80 T bwfm_sdio_load_microcode -ffffffff8253b1e0 T bwfm_sdio_clkctl -ffffffff8253b310 T bwfm_sdio_dev_write -ffffffff8253b360 T bwfm_sdio_intr -ffffffff8253b3a0 T bwfm_sdio_ram_read_write -ffffffff8253b5d0 T bwfm_sdio_htclk -ffffffff8253b840 T bwfm_sdio_readshared -ffffffff8253b910 T bwfm_sdio_dev_read -ffffffff8253b950 T bwfm_sdio_rx_frames -ffffffff8253bd00 T bwfm_sdio_tx_frames -ffffffff8253be00 T bwfm_sdio_backplane -ffffffff8253beb0 T bwfm_sdio_buf_read -ffffffff8253bf90 T bwfm_sdio_buf_write -ffffffff8253c040 T bwfm_sdio_frame_read_write -ffffffff8253c1c0 T bwfm_sdio_newbuf -ffffffff8253c240 T bwfm_sdio_tx_ok -ffffffff8253c2a0 T bwfm_sdio_tx_ctrlframe -ffffffff8253c3a0 T bwfm_sdio_tx_dataframe -ffffffff8253c4f0 T bwfm_sdio_rx_glom -ffffffff8253d000 T onewire_match -ffffffff8253d050 T onewire_attach -ffffffff8253d0f0 T onewire_detach -ffffffff8253d160 T onewire_activate -ffffffff8253d180 T onewire_scan -ffffffff8253d3a0 T onewire_createthread -ffffffff8253d410 T onewire_print -ffffffff8253d4e0 T onewirebus_print -ffffffff8253d530 T onewire_lock -ffffffff8253d550 T onewire_unlock -ffffffff8253d570 T onewire_reset -ffffffff8253d590 T onewire_bit -ffffffff8253d5b0 T onewire_read_byte -ffffffff8253d6f0 T onewire_write_byte -ffffffff8253d7d0 T onewire_read_block -ffffffff8253d870 T onewire_write_block -ffffffff8253d910 T onewire_triplet -ffffffff8253d9f0 T onewire_matchrom -ffffffff8253db40 T onewire_search -ffffffff8253dee0 T onewire_thread -ffffffff8253e000 T onewire_crc -ffffffff8253e0b0 T onewire_crc16 -ffffffff8253e170 T onewire_famname -ffffffff8253e1b0 T onewire_matchbyfam -ffffffff8253f000 T owid_match -ffffffff8253f030 T owid_attach -ffffffff8253f100 T owid_detach -ffffffff8253f140 T owid_activate -ffffffff82540000 T owsbm_match -ffffffff82540030 T owsbm_attach -ffffffff825401d0 T owsbm_detach -ffffffff82540240 T owsbm_activate -ffffffff82540270 T owsbm_update -ffffffff82541000 T owtemp_match -ffffffff82541030 T owtemp_attach -ffffffff82541130 T owtemp_detach -ffffffff825411a0 T owtemp_activate -ffffffff825411d0 T owtemp_update -ffffffff82542000 T owctr_match -ffffffff82542030 T owctr_attach -ffffffff82542180 T owctr_detach -ffffffff825421f0 T owctr_activate -ffffffff82542220 T owctr_update -ffffffff82542250 T owctr_update_counter -ffffffff82543000 A __text_page_start -ffffffff82543000 T Xsyscall_meltdown -ffffffff8254300c T Xsyscall -ffffffff8254326e t Xsyscall_trampback -ffffffff82543280 T intr_user_exit -ffffffff825432c2 t intr_user_exit_post_ast -ffffffff825433ee t Xiretq_trampback -ffffffff825433fa T doreti_iret -ffffffff82544000 T alltraps -ffffffff82544138 T recall_trap -ffffffff82544150 T alltraps_kern -ffffffff82544153 T alltraps_kern_meltdown -ffffffff82545000 ? Xsyscall32 -ffffffff82545000 A __kutext_start -ffffffff82545000 A __text_page_end -ffffffff82546000 ? Xtrap00 -ffffffff82546010 ? Xtrap01 -ffffffff82546020 ? Xtrap02 -ffffffff82546028 c calltrap_specstk -ffffffff825460f0 ? calltrap_specstk_tramp -ffffffff82546110 ? Xtrap03 -ffffffff82546120 ? Xtrap04 -ffffffff82546130 ? Xtrap05 -ffffffff82546140 ? Xtrap06 -ffffffff82546150 ? Xtrap07 -ffffffff82546160 ? Xtrap08 -ffffffff82546170 ? Xtrap09 -ffffffff82546180 ? Xtrap0a -ffffffff82546190 ? Xtrap0b -ffffffff825461a0 ? Xtrap0c -ffffffff825461b0 ? Xtrap0d -ffffffff82546240 ? Xtrap0e -ffffffff82546250 ? Xintrspurious -ffffffff82546250 ? Xtrap0f -ffffffff82546260 ? Xtrap10 -ffffffff82546270 ? Xtrap11 -ffffffff82546280 ? Xtrap12 -ffffffff82546290 ? Xtrap13 -ffffffff825462a0 ? Xtrap14 -ffffffff825462b0 ? Xtrap15 -ffffffff825462c0 ? Xtrap16 -ffffffff825462c0 ? Xtrap17 -ffffffff825462c0 ? Xtrap18 -ffffffff825462c0 ? Xtrap19 -ffffffff825462c0 ? Xtrap1a -ffffffff825462c0 ? Xtrap1b -ffffffff825462c0 ? Xtrap1c -ffffffff825462c0 ? Xtrap1d -ffffffff825462c0 ? Xtrap1e -ffffffff825462c0 ? Xtrap1f -ffffffff825462d0 ? x2apic_eoi -ffffffff825462f0 ? Xintr_lapic_ipi -ffffffff82546330 ? Xipi_invltlb -ffffffff82546360 ? Xipi_invlpg -ffffffff82546390 ? Xipi_invlrange -ffffffff825463d0 ? Xipi_invltlb_pcid -ffffffff82546410 ? Xipi_invlpg_pcid -ffffffff82546460 ? Xipi_invlrange_pcid -ffffffff825464d0 ? Xintr_lapic_ltimer -ffffffff82546510 ? Xintr_xen_upcall -ffffffff82546550 ? Xintr_hyperv_upcall -ffffffff82546590 ? Xintr_legacy0 -ffffffff825465d0 ? Xintr_legacy1 -ffffffff82546610 ? Xintr_legacy2 -ffffffff82546650 ? Xintr_legacy3 -ffffffff82546690 ? Xintr_legacy4 -ffffffff825466d0 ? Xintr_legacy5 -ffffffff82546710 ? Xintr_legacy6 -ffffffff82546750 ? Xintr_legacy7 -ffffffff82546790 ? Xintr_legacy8 -ffffffff825467d0 ? Xintr_legacy9 -ffffffff82546810 ? Xintr_legacy10 -ffffffff82546850 ? Xintr_legacy11 -ffffffff82546890 ? Xintr_legacy12 -ffffffff825468d0 ? Xintr_legacy13 -ffffffff82546910 ? Xintr_legacy14 -ffffffff82546950 ? Xintr_legacy15 -ffffffff82546990 ? Xintr_ioapic_edge0 -ffffffff825469d0 ? Xintr_ioapic_edge1 -ffffffff82546a10 ? Xintr_ioapic_edge2 -ffffffff82546a50 ? Xintr_ioapic_edge3 -ffffffff82546a90 ? Xintr_ioapic_edge4 -ffffffff82546ad0 ? Xintr_ioapic_edge5 -ffffffff82546b10 ? Xintr_ioapic_edge6 -ffffffff82546b50 ? Xintr_ioapic_edge7 -ffffffff82546b90 ? Xintr_ioapic_edge8 -ffffffff82546bd0 ? Xintr_ioapic_edge9 -ffffffff82546c10 ? Xintr_ioapic_edge10 -ffffffff82546c50 ? Xintr_ioapic_edge11 -ffffffff82546c90 ? Xintr_ioapic_edge12 -ffffffff82546cd0 ? Xintr_ioapic_edge13 -ffffffff82546d10 ? Xintr_ioapic_edge14 -ffffffff82546d50 ? Xintr_ioapic_edge15 -ffffffff82546d90 ? Xintr_ioapic_edge16 -ffffffff82546dd0 ? Xintr_ioapic_edge17 -ffffffff82546e10 ? Xintr_ioapic_edge18 -ffffffff82546e50 ? Xintr_ioapic_edge19 -ffffffff82546e90 ? Xintr_ioapic_edge20 -ffffffff82546ed0 ? Xintr_ioapic_edge21 -ffffffff82546f10 ? Xintr_ioapic_edge22 -ffffffff82546f50 ? Xintr_ioapic_edge23 -ffffffff82546f90 ? Xintr_ioapic_edge24 -ffffffff82546fd0 ? Xintr_ioapic_edge25 -ffffffff82547010 ? Xintr_ioapic_edge26 -ffffffff82547050 ? Xintr_ioapic_edge27 -ffffffff82547090 ? Xintr_ioapic_edge28 -ffffffff825470d0 ? Xintr_ioapic_edge29 -ffffffff82547110 ? Xintr_ioapic_edge30 -ffffffff82547150 ? Xintr_ioapic_edge31 -ffffffff82547190 ? Xintr_ioapic_edge32 -ffffffff825471d0 ? Xintr_ioapic_edge33 -ffffffff82547210 ? Xintr_ioapic_edge34 -ffffffff82547250 ? Xintr_ioapic_edge35 -ffffffff82547290 ? Xintr_ioapic_edge36 -ffffffff825472d0 ? Xintr_ioapic_edge37 -ffffffff82547310 ? Xintr_ioapic_edge38 -ffffffff82547350 ? Xintr_ioapic_edge39 -ffffffff82547390 ? Xintr_ioapic_edge40 -ffffffff825473d0 ? Xintr_ioapic_edge41 -ffffffff82547410 ? Xintr_ioapic_edge42 -ffffffff82547450 ? Xintr_ioapic_edge43 -ffffffff82547490 ? Xintr_ioapic_edge44 -ffffffff825474d0 ? Xintr_ioapic_edge45 -ffffffff82547510 ? Xintr_ioapic_edge46 -ffffffff82547550 ? Xintr_ioapic_edge47 -ffffffff82547590 ? Xintr_ioapic_edge48 -ffffffff825475d0 ? Xintr_ioapic_edge49 -ffffffff82547610 ? Xintr_ioapic_edge50 -ffffffff82547650 ? Xintr_ioapic_edge51 -ffffffff82547690 ? Xintr_ioapic_edge52 -ffffffff825476d0 ? Xintr_ioapic_edge53 -ffffffff82547710 ? Xintr_ioapic_edge54 -ffffffff82547750 ? Xintr_ioapic_edge55 -ffffffff82547790 ? Xintr_ioapic_edge56 -ffffffff825477d0 ? Xintr_ioapic_edge57 -ffffffff82547810 ? Xintr_ioapic_edge58 -ffffffff82547850 ? Xintr_ioapic_edge59 -ffffffff82547890 ? Xintr_ioapic_edge60 -ffffffff825478d0 ? Xintr_ioapic_edge61 -ffffffff82547910 ? Xintr_ioapic_edge62 -ffffffff82547950 ? Xintr_ioapic_edge63 -ffffffff82547990 ? Xintr_ioapic_level0 -ffffffff825479d0 ? Xintr_ioapic_level1 -ffffffff82547a10 ? Xintr_ioapic_level2 -ffffffff82547a50 ? Xintr_ioapic_level3 -ffffffff82547a90 ? Xintr_ioapic_level4 -ffffffff82547ad0 ? Xintr_ioapic_level5 -ffffffff82547b10 ? Xintr_ioapic_level6 -ffffffff82547b50 ? Xintr_ioapic_level7 -ffffffff82547b90 ? Xintr_ioapic_level8 -ffffffff82547bd0 ? Xintr_ioapic_level9 -ffffffff82547c10 ? Xintr_ioapic_level10 -ffffffff82547c50 ? Xintr_ioapic_level11 -ffffffff82547c90 ? Xintr_ioapic_level12 -ffffffff82547cd0 ? Xintr_ioapic_level13 -ffffffff82547d10 ? Xintr_ioapic_level14 -ffffffff82547d50 ? Xintr_ioapic_level15 -ffffffff82547d90 ? Xintr_ioapic_level16 -ffffffff82547dd0 ? Xintr_ioapic_level17 -ffffffff82547e10 ? Xintr_ioapic_level18 -ffffffff82547e50 ? Xintr_ioapic_level19 -ffffffff82547e90 ? Xintr_ioapic_level20 -ffffffff82547ed0 ? Xintr_ioapic_level21 -ffffffff82547f10 ? Xintr_ioapic_level22 -ffffffff82547f50 ? Xintr_ioapic_level23 -ffffffff82547f90 ? Xintr_ioapic_level24 -ffffffff82547fd0 ? Xintr_ioapic_level25 -ffffffff82548010 ? Xintr_ioapic_level26 -ffffffff82548050 ? Xintr_ioapic_level27 -ffffffff82548090 ? Xintr_ioapic_level28 -ffffffff825480d0 ? Xintr_ioapic_level29 -ffffffff82548110 ? Xintr_ioapic_level30 -ffffffff82548150 ? Xintr_ioapic_level31 -ffffffff82548190 ? Xintr_ioapic_level32 -ffffffff825481d0 ? Xintr_ioapic_level33 -ffffffff82548210 ? Xintr_ioapic_level34 -ffffffff82548250 ? Xintr_ioapic_level35 -ffffffff82548290 ? Xintr_ioapic_level36 -ffffffff825482d0 ? Xintr_ioapic_level37 -ffffffff82548310 ? Xintr_ioapic_level38 -ffffffff82548350 ? Xintr_ioapic_level39 -ffffffff82548390 ? Xintr_ioapic_level40 -ffffffff825483d0 ? Xintr_ioapic_level41 -ffffffff82548410 ? Xintr_ioapic_level42 -ffffffff82548450 ? Xintr_ioapic_level43 -ffffffff82548490 ? Xintr_ioapic_level44 -ffffffff825484d0 ? Xintr_ioapic_level45 -ffffffff82548510 ? Xintr_ioapic_level46 -ffffffff82548550 ? Xintr_ioapic_level47 -ffffffff82548590 ? Xintr_ioapic_level48 -ffffffff825485d0 ? Xintr_ioapic_level49 -ffffffff82548610 ? Xintr_ioapic_level50 -ffffffff82548650 ? Xintr_ioapic_level51 -ffffffff82548690 ? Xintr_ioapic_level52 -ffffffff825486d0 ? Xintr_ioapic_level53 -ffffffff82548710 ? Xintr_ioapic_level54 -ffffffff82548750 ? Xintr_ioapic_level55 -ffffffff82548790 ? Xintr_ioapic_level56 -ffffffff825487d0 ? Xintr_ioapic_level57 -ffffffff82548810 ? Xintr_ioapic_level58 -ffffffff82548850 ? Xintr_ioapic_level59 -ffffffff82548890 ? Xintr_ioapic_level60 -ffffffff825488d0 ? Xintr_ioapic_level61 -ffffffff82548910 ? Xintr_ioapic_level62 -ffffffff82548950 ? Xintr_ioapic_level63 -ffffffff82549000 ? codepatch_fill_nop -ffffffff82549000 A __cptext_start -ffffffff82549000 A __kutext_end -ffffffff825490b0 ? codepatch_maprw -ffffffff82549190 ? codepatch_unmaprw -ffffffff82549200 ? codepatch_nop -ffffffff82549360 ? codepatch_replace -ffffffff82549510 ? codepatch_call -ffffffff82549530 ? codepatch_jmp -ffffffff8254a000 A __cptext_end -ffffffff8254a000 A __rodata_start -ffffffff8254a000 C _etext -ffffffff8254a000 C etext -ffffffff8254b000 r seeprom_read -ffffffff8254b004 r icl_mg_pll_find_divisors.div1_vals -ffffffff8254b028 r gen9bc_tgp_ddc_pin_map -ffffffff8254b038 r athn_ac2qid -ffffffff8254b038 r athn_ac2qid -ffffffff8254b038 r athn_ac2qid -ffffffff8254b044 r rtwn_get_rssi.cckoff -ffffffff8254b06c r rsu_ac2qid -ffffffff8254b07c r pckbc_portcmd -ffffffff8254b080 r tht_fifo_write_pad.pad -ffffffff8254b088 r rsu_get_rssi.cckoff -ffffffff8254b09c r adlp_n_revids -ffffffff8254b0ec r apple_iso_trans -ffffffff8254b0f0 r dg2_g12_revid_step_tbl -ffffffff8254b0f8 r wihap_check_tx.txratetable -ffffffff8254b0fc r dmamode -ffffffff8254b120 r gen9_edram_size_mb.sets -ffffffff8254c000 r isomappings -ffffffff8254c080 r unimappings -ffffffff8254c230 r replacements -ffffffff8254f93f r apollo_pio_rec -ffffffff82598671 r apollo_udma33_tim -ffffffff825abe13 r pp_r600_decoded_lanes -ffffffff825deb5f r cmd680_setup_channel.udma_tbl -ffffffff825e67a7 r apollo_udma100_tim -ffffffff825e67ad r cmd0646_9_tim_udma -ffffffff825f4141 r substchar -ffffffff82644e98 r apollo_udma133_tim -ffffffff82644e9f r apollo_udma66_tim -ffffffff82644ec9 r cy_pio_rec -ffffffff82649e68 R drm_ca -ffffffff82649e90 R drm_filtops -ffffffff82649ec0 R drmread_filtops -ffffffff8264a000 r vga_emulops -ffffffff8264a048 R vga_stdscreen -ffffffff8264a078 R vga_stdscreen_mono -ffffffff8264a0a8 R vga_stdscreen_bf -ffffffff8264a0d8 R vga_40lscreen -ffffffff8264a108 R vga_40lscreen_mono -ffffffff8264a138 R vga_40lscreen_bf -ffffffff8264a168 R vga_50lscreen -ffffffff8264a198 R vga_50lscreen_mono -ffffffff8264a1c8 R vga_50lscreen_bf -ffffffff8264a1f8 R vga_screenlist -ffffffff8264a208 R vga_screenlist_mono -ffffffff8264a218 R vga_accessops -ffffffff8264a278 r i945_wm_info -ffffffff8264a2b8 r bgansitopc -ffffffff8264a2c0 r pctoansi -ffffffff8264a300 r sdma_offsets -ffffffff8264a300 r sdma_offsets -ffffffff8264a338 r iha_rate_tbl -ffffffff8264a370 r i830_a_wm_info -ffffffff8264a3a8 r gen9_edram_size_mb.ways -ffffffff8264a408 r aggr_periodic_times -ffffffff8264a490 r jsl_ehl_revids -ffffffff8264a508 r michael_final.pad -ffffffff8264a530 r rt_copysa.maskarray -ffffffff8264a538 r i915_wm_info -ffffffff8264a540 r amdgpu_ih_clientid_jpeg -ffffffff8264a540 r amdgpu_ih_clientid_uvds -ffffffff8264a540 r amdgpu_ih_clientid_vcns -ffffffff8264a540 r amdgpu_ih_clientid_vcns -ffffffff8264a540 r amdgpu_ih_clientid_vcns -ffffffff8264a578 r vga_setfontset.cmaptabb -ffffffff8264a590 r tgl_revids -ffffffff8264a5f0 r i830_bc_wm_info -ffffffff8264a660 r hsw_activate_psr2.map -ffffffff8264a698 r __drm_universal_plane_init.default_modifiers -ffffffff8264a6a8 r iwn_tid2fifo -ffffffff8264a6c0 r vga_setfontset.cmaptaba -ffffffff8264a6c8 r crtc_offsets -ffffffff8264a6c8 r crtc_offsets -ffffffff8264a6c8 r crtc_offsets -ffffffff8264a6e8 r link_speed -ffffffff8264a6e8 r link_speed -ffffffff8264a6e8 r link_speed -ffffffff8264a770 r rtwn_r88e_get_rssi.cckoff -ffffffff8264b000 R edid_vendors -ffffffff8264b2c0 R edid_nvendors -ffffffff8264b2d0 R edid_products -ffffffff8264b330 R edid_nproducts -ffffffff8264b340 r _edid_modes -ffffffff8264c000 R videomode_list -ffffffff8264d080 R videomode_count -ffffffff8264e000 r ahc_hard_errors -ffffffff8264e080 r critical_sections -ffffffff8264e0b0 r patches -ffffffff8264ed50 r seqprog -ffffffff82650000 r ahc_switch -ffffffff82651000 r termstat_strings -ffffffff82651020 r critical_sections -ffffffff82651060 r seqprog -ffffffff82651d50 r patches -ffffffff82653000 r ahd_switch -ffffffff82654000 R aic_switch -ffffffff82655000 R adw_switch -ffffffff82656000 R gdt_switch -ffffffff82657000 R twe_switch -ffffffff82658000 R ciss_switch -ffffffff82658030 R ciss_level -ffffffff82658050 R ciss_stat -ffffffff82659000 R ami_switch -ffffffff82659028 R ami_raw_switch -ffffffff8265a000 R mfi_switch -ffffffff8265a028 R mfi_pd_switch -ffffffff8265a050 r mfi_iop_xscale -ffffffff8265a080 r mfi_iop_ppc -ffffffff8265a0b0 r mfi_iop_gen2 -ffffffff8265a0e0 r mfi_iop_skinny -ffffffff8265a110 r mfi_bbu_indicators -ffffffff8265b000 R qlw_switch -ffffffff8265c000 R isp_2100_risc_code -ffffffff8266ebf0 R isp_2200_risc_code -ffffffff82681990 R isp_2300_risc_code -ffffffff8269b408 R qla_switch -ffffffff8269b430 r qla_regs_2100 -ffffffff8269b460 r qla_regs_2200 -ffffffff8269b490 r qla_regs_23XX -ffffffff8269c000 R ahci_atascsi_methods -ffffffff8269d000 R nvme_switch -ffffffff8269d028 r nvme_ops -ffffffff8269e000 R mpi_switch -ffffffff8269e060 r bwi_rf_calc_nrssi_slope_11b.save_phy_regs -ffffffff8269e090 r chv_oa_mux_regs -ffffffff8269e0b0 r fiji_clock_stretcher_lookup_table -ffffffff8269e0b0 r tonga_clock_stretcher_lookup_table -ffffffff8269e0d0 r iosf_pci_devices -ffffffff8269e0f0 r link_speed -ffffffff8269e0f0 r link_speed -ffffffff8269e0f0 r link_speed -ffffffff8269e130 r drm_fb_xfrm.default_dst_pitch -ffffffff8269e130 r non_supported_protection -ffffffff8269e230 r tgl_uy_revids -ffffffff8269e280 r bwi_phy_noise_11g_rev1 -ffffffff8269e2f0 r cardslot_process_event.antonym_ev -ffffffff8269e370 r gen11_oa_mux_regs -ffffffff8269e470 r ddr2_cycle_tenths -ffffffff8269e4e0 r rtw_intr_rx.ratetbl -ffffffff8269e550 r abm_config -ffffffff8269e5c0 r getbootinfo.ports -ffffffff8269e610 r reg_offsets -ffffffff8269e620 r bwi_rf_lo_measure_11g.rf_lo_adjust -ffffffff8269e630 r init_non_clock_fields.look_up -ffffffff8269e640 r uftdi_8u232am_getrate.roundoff -ffffffff8269e690 r zyd_rx_data.rates -ffffffff8269e6b0 r ieee80211_ra_valid_tx_mcs.max_mcs -ffffffff8269e6e0 r mmio_invalidate_full.gen8_regs -ffffffff8269e710 r bwi_phy_noise_11g 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bwi_rf_calibval.rf_calibvals -ffffffff8269ed90 r pf_syncookie_msstab -ffffffff8269edf0 r xgmi3x16_pcs_err_status_reg_aldebaran -ffffffff8269ee50 r uath_wme_init.uath_wme_11g -ffffffff8269ee70 r gen7_oa_b_counters -ffffffff8269efd0 r icl_revids -ffffffff8269f090 r rtwn_iq_calib_run.reg_adda -ffffffff8269f0d0 r atom_def_dst -ffffffff8269f0d0 r atom_def_dst -ffffffff8269f110 r sha256_initial_hash_value -ffffffff8269f170 r otus_edca_def -ffffffff8269f190 r intel_hpll_vco.blb_vco -ffffffff8269f250 r epic_pci_subsys_info -ffffffff8269f270 r atom_arg_mask -ffffffff8269f270 r atom_arg_mask -ffffffff8269f2d0 r butmap -ffffffff8269f310 r GFX_RLC_SRM_INDEX_CNTL_DATA_OFFSETS -ffffffff8269f350 r comsoft.lsrmap -ffffffff8269f390 r tulip_mii_phy_readspecific.table -ffffffff8269f3b0 r kbl_revids -ffffffff8269f450 r intel_hpll_vco.pnv_vco -ffffffff8269f4b0 r dmapageport -ffffffff8269f570 r intel_hpll_vco.ctg_vco -ffffffff8269f630 r drm_calculate_luminance_range.pre_computed_values -ffffffff826a0000 R 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amdgpu_dpm_set_df_cstate +ffffffff822489a0 T amdgpu_dpm_allow_xgmi_power_down +ffffffff82248a20 T amdgpu_dpm_enable_mgpu_fan_boost +ffffffff82248ab0 T amdgpu_dpm_set_clockgating_by_smu +ffffffff82248b50 T amdgpu_dpm_smu_i2c_bus_access +ffffffff82248bf0 T amdgpu_pm_acpi_event_handler +ffffffff82248cb0 T amdgpu_dpm_read_sensor +ffffffff82248d70 T amdgpu_dpm_compute_clocks +ffffffff82248e70 T amdgpu_dpm_enable_uvd +ffffffff82249060 T amdgpu_dpm_enable_vce +ffffffff82249250 T amdgpu_dpm_enable_jpeg +ffffffff82249350 T amdgpu_pm_load_smu_firmware +ffffffff82249400 T amdgpu_dpm_handle_passthrough_sbr +ffffffff82249480 T amdgpu_dpm_send_hbm_bad_pages_num +ffffffff82249500 T amdgpu_dpm_send_hbm_bad_channel_flag +ffffffff82249580 T amdgpu_dpm_get_dpm_freq_range +ffffffff82249620 T amdgpu_dpm_set_soft_freq_range +ffffffff822496c0 T amdgpu_dpm_write_watermarks_table +ffffffff82249740 T amdgpu_dpm_wait_for_event +ffffffff822497d0 T amdgpu_dpm_set_residency_gfxoff +ffffffff82249850 T amdgpu_dpm_get_residency_gfxoff +ffffffff822498d0 T amdgpu_dpm_get_entrycount_gfxoff +ffffffff82249950 T amdgpu_dpm_get_status_gfxoff +ffffffff822499d0 T amdgpu_dpm_get_thermal_throttling_counter +ffffffff82249a20 T amdgpu_dpm_gfx_state_change +ffffffff82249a90 T amdgpu_dpm_get_ecc_info +ffffffff82249b10 T amdgpu_dpm_get_vce_clock_state +ffffffff82249ba0 T amdgpu_dpm_get_current_power_state +ffffffff82249c10 T amdgpu_dpm_set_power_state +ffffffff82249d70 T amdgpu_dpm_dispatch_task +ffffffff82249e10 T amdgpu_dpm_get_performance_level +ffffffff82249ea0 T amdgpu_dpm_force_performance_level +ffffffff8224a080 T amdgpu_dpm_get_pp_num_states +ffffffff8224a110 T amdgpu_dpm_get_pp_table +ffffffff8224a1a0 T amdgpu_dpm_set_fine_grain_clk_vol +ffffffff8224a240 T amdgpu_dpm_odn_edit_dpm_table +ffffffff8224a2e0 T amdgpu_dpm_print_clock_levels +ffffffff8224a370 T amdgpu_dpm_emit_clock_levels +ffffffff8224a410 T amdgpu_dpm_set_ppfeature_status +ffffffff8224a4a0 T amdgpu_dpm_get_ppfeature_status +ffffffff8224a530 T amdgpu_dpm_force_clock_level +ffffffff8224a5c0 T amdgpu_dpm_get_sclk_od +ffffffff8224a640 T amdgpu_dpm_set_sclk_od +ffffffff8224a7c0 T amdgpu_dpm_get_mclk_od +ffffffff8224a840 T amdgpu_dpm_set_mclk_od +ffffffff8224a9c0 T amdgpu_dpm_get_power_profile_mode +ffffffff8224aa50 T amdgpu_dpm_set_power_profile_mode +ffffffff8224aaf0 T amdgpu_dpm_get_gpu_metrics +ffffffff8224ab80 T amdgpu_dpm_get_fan_control_mode +ffffffff8224ac10 T amdgpu_dpm_set_fan_speed_pwm +ffffffff8224aca0 T amdgpu_dpm_get_fan_speed_pwm +ffffffff8224ad30 T amdgpu_dpm_get_fan_speed_rpm +ffffffff8224adc0 T amdgpu_dpm_set_fan_speed_rpm +ffffffff8224ae50 T amdgpu_dpm_set_fan_control_mode +ffffffff8224aee0 T amdgpu_dpm_get_power_limit +ffffffff8224af90 T amdgpu_dpm_set_power_limit +ffffffff8224b020 T amdgpu_dpm_is_cclk_dpm_supported +ffffffff8224b090 T amdgpu_dpm_debugfs_print_current_performance_level +ffffffff8224b120 T amdgpu_dpm_get_smu_prv_buf_details +ffffffff8224b1c0 T amdgpu_dpm_is_overdrive_supported +ffffffff8224b230 T amdgpu_dpm_set_pp_table +ffffffff8224b2d0 T amdgpu_dpm_get_num_cpu_cores +ffffffff8224b320 T amdgpu_dpm_stb_debug_fs_init +ffffffff8224b370 T amdgpu_dpm_display_configuration_change +ffffffff8224b400 T amdgpu_dpm_get_clock_by_type +ffffffff8224b4a0 T amdgpu_dpm_get_display_mode_validation_clks +ffffffff8224b530 T amdgpu_dpm_get_clock_by_type_with_latency +ffffffff8224b5d0 T amdgpu_dpm_get_clock_by_type_with_voltage +ffffffff8224b670 T amdgpu_dpm_set_watermarks_for_clocks_ranges +ffffffff8224b700 T amdgpu_dpm_display_clock_voltage_request +ffffffff8224b790 T amdgpu_dpm_get_current_clocks +ffffffff8224b820 T amdgpu_dpm_notify_smu_enable_pwe +ffffffff8224b8a0 T amdgpu_dpm_set_active_display_count +ffffffff8224b930 T amdgpu_dpm_set_min_deep_sleep_dcefclk +ffffffff8224b9c0 T amdgpu_dpm_set_hard_min_dcefclk_by_freq +ffffffff8224ba60 T amdgpu_dpm_set_hard_min_fclk_by_freq +ffffffff8224bb00 T amdgpu_dpm_display_disable_memory_clock_switch +ffffffff8224bb90 T amdgpu_dpm_get_max_sustainable_clocks_by_dc +ffffffff8224bc20 T amdgpu_dpm_get_uclk_dpm_states +ffffffff8224bcc0 T amdgpu_dpm_get_dpm_clock_table +ffffffff8224c000 T amdgpu_dpm_get_active_displays +ffffffff8224c0a0 T amdgpu_dpm_get_vblank_time +ffffffff8224c150 T amdgpu_dpm_get_vrefresh +ffffffff8224d000 T amdgpu_pm_sysfs_init +ffffffff8224d030 T amdgpu_pm_sysfs_fini +ffffffff8224d060 T amdgpu_debugfs_pm_init +ffffffff8224e000 T amdgpu_dpm_print_class_info +ffffffff8224e2b0 T amdgpu_dpm_print_cap_info +ffffffff8224e340 T amdgpu_dpm_print_ps_status +ffffffff8224e3d0 T amdgpu_pm_print_power_states +ffffffff8224e460 T amdgpu_get_platform_caps +ffffffff8224e500 T amdgpu_parse_extended_power_table +ffffffff8224f2d0 t amdgpu_parse_clk_voltage_dep_table +ffffffff8224f380 T amdgpu_free_extended_power_table +ffffffff8224f490 T amdgpu_add_thermal_controller +ffffffff8224f8d0 T amdgpu_get_vce_clock_state +ffffffff8224f910 T amdgpu_legacy_dpm_compute_clocks +ffffffff8224fda0 T amdgpu_dpm_thermal_work_handler +ffffffff82250000 t pp_early_init +ffffffff82250100 t pp_late_init +ffffffff82250220 t pp_sw_init +ffffffff822502b0 t pp_sw_fini +ffffffff82250340 t pp_hw_init +ffffffff822503a0 t pp_hw_fini +ffffffff82250410 t pp_late_fini +ffffffff82250470 t pp_suspend +ffffffff822504c0 t pp_resume +ffffffff822504e0 t pp_is_idle +ffffffff82250510 t pp_wait_for_idle +ffffffff82250540 t pp_sw_reset +ffffffff82250570 t pp_set_clockgating_state +ffffffff822505a0 t pp_set_powergating_state +ffffffff822505d0 t pp_dpm_set_fan_control_mode +ffffffff82250640 t pp_dpm_get_fan_control_mode +ffffffff822506b0 t pp_dpm_set_fan_speed_pwm +ffffffff82250710 t pp_dpm_get_fan_speed_pwm +ffffffff82250770 t pp_dpm_force_clock_level +ffffffff822507d0 t pp_dpm_print_clock_levels +ffffffff82250830 t pp_dpm_emit_clock_levels +ffffffff82250890 t pp_dpm_force_performance_level +ffffffff82250930 t pp_dpm_get_sclk_od +ffffffff82250990 t pp_dpm_set_sclk_od +ffffffff822509f0 t pp_dpm_get_mclk_od +ffffffff82250a50 t pp_dpm_set_mclk_od +ffffffff82250ab0 t pp_dpm_read_sensor +ffffffff82250b70 t pp_dpm_get_performance_level +ffffffff82250bb0 t pp_dpm_get_current_power_state +ffffffff82250c30 t pp_dpm_get_fan_speed_rpm +ffffffff82250c90 t pp_dpm_set_fan_speed_rpm +ffffffff82250cf0 t pp_dpm_get_pp_num_states +ffffffff82250e30 t pp_dpm_get_pp_table +ffffffff82250e80 t pp_dpm_set_pp_table +ffffffff82250fb0 t pp_dpm_switch_power_profile +ffffffff822510f0 t pp_dpm_get_vce_clock_state +ffffffff82251140 t pp_dpm_dispatch_tasks +ffffffff82251180 t pp_dpm_load_fw +ffffffff822511f0 t pp_dpm_fw_loading_complete +ffffffff82251220 t pp_set_powergating_by_smu +ffffffff822513a0 t pp_set_clockgating_by_smu +ffffffff82251410 t pp_set_power_limit +ffffffff822514d0 t pp_get_power_limit +ffffffff82251570 t pp_get_power_profile_mode +ffffffff822515d0 t pp_set_power_profile_mode +ffffffff82251630 t pp_set_fine_grain_clk_vol +ffffffff82251690 t pp_odn_edit_dpm_table +ffffffff822516f0 t pp_dpm_set_mp1_state +ffffffff82251750 t pp_smu_i2c_bus_access +ffffffff822517b0 t pp_gfx_state_change_set +ffffffff82251810 t pp_dpm_get_sclk +ffffffff82251860 t pp_dpm_get_mclk +ffffffff822518b0 t pp_display_configuration_change +ffffffff82251900 t pp_get_display_power_level +ffffffff82251940 t pp_get_current_clocks +ffffffff82251a60 t pp_get_clock_by_type +ffffffff82251ab0 t pp_get_clock_by_type_with_latency +ffffffff82251b00 t pp_get_clock_by_type_with_voltage +ffffffff82251b50 t pp_set_watermarks_for_clocks_ranges +ffffffff82251b90 t pp_display_clock_voltage_request +ffffffff82251bd0 t pp_get_display_mode_validation_clocks +ffffffff82251c30 t pp_notify_smu_enable_pwe +ffffffff82251c90 t pp_enable_mgpu_fan_boost +ffffffff82251cf0 t pp_set_active_display_count +ffffffff82251d30 t pp_set_hard_min_dcefclk_by_freq +ffffffff82251d90 t pp_set_hard_min_fclk_by_freq +ffffffff82251df0 t pp_set_min_deep_sleep_dcefclk +ffffffff82251e50 t pp_get_asic_baco_capability +ffffffff82251ec0 t pp_get_asic_baco_state +ffffffff82251f20 t pp_set_asic_baco_state +ffffffff82251f90 t pp_get_ppfeature_status +ffffffff82251ff0 t pp_set_ppfeature_status +ffffffff82252040 t pp_asic_reset_mode_2 +ffffffff822520a0 t pp_set_df_cstate +ffffffff82252100 t pp_set_xgmi_pstate +ffffffff82252160 t pp_get_gpu_metrics +ffffffff822521c0 t pp_get_prv_buffer_details +ffffffff82252240 t pp_pm_compute_clocks +ffffffff82252310 t pp_swctf_delayed_work_handler +ffffffff82252450 t __delayed_work_tick +ffffffff82253000 T ci_baco_set_state +ffffffff82254000 T baco_program_registers +ffffffff822540d0 t baco_cmd_handler +ffffffff82254250 T soc15_baco_program_registers +ffffffff82255000 T fiji_baco_set_state +ffffffff82256000 T phm_setup_asic +ffffffff82256050 T phm_power_down_asic +ffffffff822560a0 T phm_set_power_state +ffffffff82256110 T phm_enable_dynamic_state_management +ffffffff822561c0 T phm_disable_dynamic_state_management +ffffffff82256260 T phm_force_dpm_levels +ffffffff822562b0 T phm_apply_state_adjust_rules +ffffffff82256300 T phm_apply_clock_adjust_rules +ffffffff82256350 T phm_powerdown_uvd +ffffffff822563a0 T phm_disable_clock_power_gatings +ffffffff822563f0 T phm_pre_display_configuration_changed +ffffffff82256450 T phm_display_configuration_changed +ffffffff822564b0 T phm_notify_smc_display_config_after_ps_adjustment +ffffffff82256510 T phm_stop_thermal_controller +ffffffff82256570 T phm_register_irq_handlers +ffffffff822565c0 T phm_start_thermal_controller +ffffffff82256710 T phm_check_smc_update_required_for_display_configuration +ffffffff82256770 T phm_check_states_equal +ffffffff822567c0 T phm_store_dal_configuration_data +ffffffff82256910 T phm_get_dal_power_level +ffffffff82256970 T phm_set_cpu_power_state +ffffffff822569c0 T phm_get_performance_level +ffffffff82256a20 T phm_get_clock_info +ffffffff82256b90 T phm_get_current_shallow_sleep_clocks +ffffffff82256be0 T phm_get_clock_by_type +ffffffff82256c30 T phm_get_clock_by_type_with_latency +ffffffff82256c80 T phm_get_clock_by_type_with_voltage +ffffffff82256cd0 T phm_set_watermarks_for_clocks_ranges +ffffffff82256d20 T phm_display_clock_voltage_request +ffffffff82256d70 T phm_get_max_high_clocks +ffffffff82256dc0 T phm_disable_smc_firmware_ctf +ffffffff82256e20 T phm_set_active_display_count +ffffffff82257000 T hwmgr_early_init +ffffffff82257460 t polaris_set_asic_special_caps +ffffffff822574e0 T hwmgr_sw_init +ffffffff82257550 T hwmgr_sw_fini +ffffffff822575a0 T hwmgr_hw_init +ffffffff82257760 T hwmgr_hw_fini +ffffffff82257820 T hwmgr_suspend +ffffffff822578a0 T hwmgr_resume +ffffffff82257940 T hwmgr_handle_task +ffffffff82258000 T polaris_baco_set_state +ffffffff82259000 T pp_override_get_default_fuse_value +ffffffff8225a000 T psm_init_power_state_table +ffffffff8225a2a0 T psm_fini_power_state_table +ffffffff8225a360 T psm_set_boot_states +ffffffff8225a410 T psm_set_performance_states +ffffffff8225a4c0 T psm_set_user_performance_state +ffffffff8225a550 T psm_adjust_power_state_dynamic +ffffffff8225b000 T atomctrl_initialize_mc_reg_table +ffffffff8225b210 T atomctrl_initialize_mc_reg_table_v2_2 +ffffffff8225b420 T atomctrl_set_engine_dram_timings_rv770 +ffffffff8225b490 T atomctrl_get_memory_pll_dividers_si +ffffffff8225b570 T atomctrl_get_memory_pll_dividers_vi +ffffffff8225b5f0 T atomctrl_get_memory_pll_dividers_ai +ffffffff8225b6a0 T atomctrl_get_engine_pll_dividers_kong +ffffffff8225b720 T atomctrl_get_engine_pll_dividers_vi +ffffffff8225b7f0 T atomctrl_get_engine_pll_dividers_ai +ffffffff8225b8d0 T atomctrl_get_dfs_pll_dividers_vi +ffffffff8225b990 T atomctrl_get_reference_clock +ffffffff8225b9f0 T atomctrl_is_voltage_controlled_by_gpio_v3 +ffffffff8225bab0 T atomctrl_get_voltage_table_v3 +ffffffff8225bc10 T atomctrl_get_pp_assign_pin +ffffffff8225bcf0 T atomctrl_calculate_voltage_evv_on_sclk +ffffffff8225c0c0 t GetScaledFraction +ffffffff8225c150 t fDecodeLeakageID +ffffffff8225c1b0 t fSqrt +ffffffff8225c230 T atomctrl_get_voltage_evv_on_sclk +ffffffff8225c2b0 T atomctrl_get_voltage_evv +ffffffff8225c360 T atomctrl_get_mpll_reference_clock +ffffffff8225c3d0 T atomctrl_is_asic_internal_ss_supported +ffffffff8225c420 T atomctrl_get_memory_clock_spread_spectrum +ffffffff8225c520 T atomctrl_get_engine_clock_spread_spectrum +ffffffff8225c620 T atomctrl_read_efuse +ffffffff8225c6d0 T atomctrl_set_ac_timing_ai +ffffffff8225c730 T atomctrl_get_voltage_evv_on_sclk_ai +ffffffff8225c7b0 T atomctrl_get_smc_sclk_range_table +ffffffff8225c860 T atomctrl_get_vddc_shared_railinfo +ffffffff8225c8d0 T atomctrl_get_avfs_information +ffffffff8225ca60 T atomctrl_get_svi2_info +ffffffff8225cb40 T atomctrl_get_leakage_id_from_efuse +ffffffff8225cba0 T atomctrl_get_leakage_vddc_base_on_leakage +ffffffff8225cd40 T atomctrl_get_voltage_range +ffffffff8225ce00 T atomctrl_get_edc_hilo_leakage_offset_table +ffffffff8225ce80 T atomctrl_get_edc_leakage_table +ffffffff8225d000 T pp_atomfwctrl_is_voltage_controlled_by_gpio_v4 +ffffffff8225d0c0 T pp_atomfwctrl_get_voltage_table_v4 +ffffffff8225d280 T pp_atomfwctrl_get_pp_assign_pin +ffffffff8225d360 T pp_atomfwctrl_enter_self_refresh +ffffffff8225d390 T pp_atomfwctrl_get_gpu_pll_dividers_vega10 +ffffffff8225d440 T pp_atomfwctrl_get_avfs_information +ffffffff8225d780 T pp_atomfwctrl_get_gpio_information +ffffffff8225d820 T pp_atomfwctrl_get_clk_information_by_clkid +ffffffff8225d8b0 T pp_atomfwctrl_get_vbios_bootup_values +ffffffff8225dc30 T pp_atomfwctrl_get_smc_dpm_information +ffffffff8225e000 T encode_pcie_lane_width +ffffffff8225e030 T decode_pcie_lane_width +ffffffff8225f000 t pp_tables_v1_0_initialize +ffffffff82260450 t pp_tables_v1_0_uninitialize +ffffffff82260600 T get_number_of_powerplay_table_entries_v1_0 +ffffffff822606b0 T get_powerplay_table_entry_v1_0 +ffffffff82261000 T pp_tables_get_response_times +ffffffff822610d0 T pp_tables_get_num_of_entries +ffffffff82261190 T pp_tables_get_entry +ffffffff822614a0 t init_non_clock_fields +ffffffff822615e0 t pp_tables_initialize +ffffffff82262760 t pp_tables_uninitialize +ffffffff82262960 t get_number_of_vce_state_table_entries +ffffffff82262a50 t get_vce_state_table_entry +ffffffff82263000 T smu10_init_function_pointers +ffffffff82263040 t smu10_hwmgr_backend_init +ffffffff822636e0 t smu10_hwmgr_backend_fini +ffffffff82263820 t smu10_setup_asic_task +ffffffff82263890 t smu10_get_power_state_size +ffffffff822638c0 t smu10_apply_state_adjust_rules +ffffffff822638f0 t smu10_dpm_force_dpm_level +ffffffff82263e70 t smu10_enable_dpm_tasks +ffffffff82263f30 t smu10_disable_dpm_tasks +ffffffff82263f60 t smu10_dpm_patch_boot_state +ffffffff82263f90 t smu10_dpm_get_pp_table_entry +ffffffff82263ff0 t smu10_dpm_get_num_of_pp_table_entries +ffffffff82264040 t smu10_powergate_vcn +ffffffff822640e0 t smu10_dpm_get_mclk +ffffffff82264140 t smu10_dpm_get_sclk +ffffffff82264190 t smu10_set_power_state_tasks +ffffffff82264200 t smu10_set_cpu_power_state +ffffffff82264230 t smu10_store_cc6_data +ffffffff822642a0 t smu10_get_dal_power_level +ffffffff822642d0 t smu10_get_performance_level +ffffffff82264370 t smu10_get_current_shallow_sleep_clocks +ffffffff822643d0 t smu10_get_clock_by_type_with_latency +ffffffff82264520 t smu10_get_clock_by_type_with_voltage +ffffffff82264630 t smu10_set_watermarks_for_clocks_ranges +ffffffff82264700 t smu10_display_clock_voltage_request +ffffffff822647a0 t smu10_get_max_high_clocks +ffffffff822647d0 t smu10_power_off_asic +ffffffff82264820 t smu10_force_clock_level +ffffffff822649e0 t smu10_print_clock_levels +ffffffff82264dd0 t smu10_gfx_off_control +ffffffff82264ee0 t smu10_read_sensor +ffffffff82265070 t smu10_set_active_display_count +ffffffff822650d0 t smu10_set_min_deep_sleep_dcefclk +ffffffff82265130 t smu10_get_power_profile_mode +ffffffff82265170 t smu10_set_power_profile_mode +ffffffff822652a0 t smu10_set_fine_grain_clk_vol +ffffffff822654b0 t smu10_powergate_mmhub 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smu7_hwmgr_backend_fini +ffffffff82269fa0 t smu7_setup_asic_task +ffffffff8226a310 t smu7_get_power_state_size +ffffffff8226a340 t smu7_apply_state_adjust_rules +ffffffff8226a7e0 t smu7_force_dpm_level +ffffffff8226acf0 t smu7_enable_dpm_tasks +ffffffff8226d580 t smu7_disable_dpm_tasks +ffffffff8226dbc0 t smu7_dpm_patch_boot_state +ffffffff8226dd00 t smu7_get_pp_table_entry +ffffffff8226e100 t smu7_get_number_of_powerplay_table_entries +ffffffff8226e170 t smu7_dpm_get_mclk +ffffffff8226e210 t smu7_dpm_get_sclk +ffffffff8226e2b0 t smu7_set_power_state_tasks +ffffffff8226efd0 t smu7_notify_smc_display_config_after_ps_adjustment +ffffffff8226f000 t smu7_display_configuration_changed_task +ffffffff8226f1c0 t smu7_set_max_fan_rpm_output +ffffffff8226f1f0 t smu7_set_max_fan_pwm_output +ffffffff8226f210 t smu7_set_fan_control_mode +ffffffff8226f2a0 t smu7_get_fan_control_mode +ffffffff8226f2e0 t smu7_register_irq_handlers +ffffffff8226f390 t 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phm_reset_single_dpm_table +ffffffff8227ad10 T phm_setup_pcie_table_entry +ffffffff8227ad50 T phm_get_dpm_level_enable_mask_value +ffffffff8227ae30 T phm_get_voltage_index +ffffffff8227aeb0 T phm_get_voltage_id +ffffffff8227af30 T phm_find_closest_vddci +ffffffff8227afa0 T phm_find_boot_level +ffffffff8227b010 T phm_get_sclk_for_voltage_evv +ffffffff8227b0d0 T phm_initializa_dynamic_state_adjustment_rule_settings +ffffffff8227b1e0 T phm_get_lowest_enabled_level +ffffffff8227b220 T phm_apply_dal_min_voltage_request +ffffffff8227b2f0 T phm_get_voltage_evv_on_sclk +ffffffff8227b3a0 T phm_irq_process +ffffffff8227b540 T smu9_register_irq_handlers +ffffffff8227b5f0 T smu_atom_get_data_table +ffffffff8227b660 T smu_get_voltage_dependency_table_ppt_v1 +ffffffff8227b760 T smu_set_watermarks_for_clocks_ranges +ffffffff8227c000 T tonga_baco_set_state +ffffffff8227d000 T vega10_baco_set_state +ffffffff8227e000 T vega10_enable_disable_vce_dpm +ffffffff8227e090 T vega10_hwmgr_init +ffffffff8227e0f0 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navi10_get_allowed_feature_mask +ffffffff822d33a0 t navi10_set_default_dpm_table +ffffffff822d3810 t navi10_populate_umd_state_clk +ffffffff822d39d0 t navi10_print_clk_levels +ffffffff822d3b60 t navi10_emit_clk_levels +ffffffff822d3d80 t navi10_force_clk_levels +ffffffff822d3eb0 t navi10_od_edit_dpm_table +ffffffff822d4460 t navi10_get_clock_by_type_with_latency +ffffffff822d4560 t navi10_get_power_profile_mode +ffffffff822d47c0 t navi10_set_power_profile_mode +ffffffff822d4a90 t navi10_dpm_set_vcn_enable +ffffffff822d4b20 t navi10_dpm_set_jpeg_enable +ffffffff822d4ba0 t navi10_read_sensor +ffffffff822d4d20 t navi10_pre_display_config_changed +ffffffff822d4dc0 t navi10_display_config_changed +ffffffff822d4e40 t navi10_notify_smc_display_config +ffffffff822d4fc0 t navi10_is_dpm_running +ffffffff822d5010 t navi10_get_fan_speed_rpm +ffffffff822d50b0 t navi10_set_watermarks_table +ffffffff822d5250 t navi10_get_thermal_temperature_range +ffffffff822d5340 t navi10_get_uclk_dpm_states +ffffffff822d5450 t navi10_set_default_od_settings +ffffffff822d56b0 t navi10_display_disable_memory_clock_switch +ffffffff822d5730 t navi10_get_power_limit +ffffffff822d5850 t navi10_update_pcie_parameters +ffffffff822d59c0 t navi10_i2c_control_init +ffffffff822d5af0 t navi10_i2c_control_fini +ffffffff822d5b30 t navi10_init_smc_tables +ffffffff822d5d60 t navi10_setup_pptable +ffffffff822d5f80 t navi10_baco_enter +ffffffff822d5fd0 t navi10_baco_exit +ffffffff822d60d0 t navi1x_get_gpu_metrics +ffffffff822d6a70 t navi10_enable_mgpu_fan_boost +ffffffff822d6af0 t navi10_get_fan_parameters +ffffffff822d6b30 t navi10_post_smu_init +ffffffff822d6db0 t navi10_get_default_config_table_settings +ffffffff822d6e00 t navi10_set_config_table +ffffffff822d6eb0 t navi1x_get_smu_metrics_data +ffffffff822d7540 t navi10_od_setting_check_range +ffffffff822d75f0 t navi10_i2c_xfer +ffffffff822d7890 t navi10_i2c_func +ffffffff822d78c0 t navi10_umc_hybrid_cdr_workaround +ffffffff822d8000 T sienna_cichlid_set_ppt_funcs +ffffffff822d8050 t sienna_cichlid_run_btc +ffffffff822d80d0 t sienna_cichlid_get_allowed_feature_mask +ffffffff822d8350 t sienna_cichlid_set_default_dpm_table +ffffffff822d8930 t sienna_cichlid_populate_umd_state_clk +ffffffff822d89f0 t sienna_cichlid_print_clk_levels +ffffffff822d8bc0 t sienna_cichlid_force_clk_levels +ffffffff822d8cf0 t sienna_cichlid_od_edit_dpm_table +ffffffff822d9270 t sienna_cichlid_restore_user_od_settings +ffffffff822d9300 t sienna_cichlid_get_power_profile_mode +ffffffff822d9560 t sienna_cichlid_set_power_profile_mode +ffffffff822d9830 t sienna_cichlid_dpm_set_vcn_enable +ffffffff822d98f0 t sienna_cichlid_dpm_set_jpeg_enable +ffffffff822d9970 t sienna_cichlid_read_sensor +ffffffff822da170 t sienna_cichlid_pre_display_config_changed +ffffffff822da1a0 t sienna_cichlid_display_config_changed +ffffffff822da200 t sienna_cichlid_notify_smc_display_config +ffffffff822da380 t sienna_cichlid_is_dpm_running +ffffffff822da3d0 t sienna_cichlid_get_fan_speed_rpm +ffffffff822da4e0 t sienna_cichlid_set_watermarks_table +ffffffff822da670 t sienna_cichlid_get_thermal_temperature_range +ffffffff822da750 t sienna_cichlid_get_uclk_dpm_states +ffffffff822da860 t sienna_cichlid_set_default_od_settings +ffffffff822daa10 t sienna_cichlid_display_disable_memory_clock_switch +ffffffff822daa90 t sienna_cichlid_dump_pptable +ffffffff822daac0 t sienna_cichlid_get_power_limit +ffffffff822dab90 t sienna_cichlid_update_pcie_parameters +ffffffff822dace0 t sienna_cichlid_i2c_control_init +ffffffff822dae10 t sienna_cichlid_i2c_control_fini +ffffffff822dae50 t sienna_cichlid_get_unique_id +ffffffff822dafa0 t sienna_cichlid_init_smc_tables +ffffffff822db2c0 t sienna_cichlid_set_mp1_state +ffffffff822db300 t sienna_cichlid_setup_pptable +ffffffff822db740 t sienna_cichlid_system_features_control +ffffffff822db7d0 t sienna_cichlid_baco_enter +ffffffff822db820 t sienna_cichlid_baco_exit +ffffffff822db920 t sienna_cichlid_is_mode1_reset_supported +ffffffff822db9a0 t sienna_cichlid_is_mode2_reset_supported +ffffffff822db9d0 t sienna_cichlid_mode2_reset +ffffffff822dbb10 t sienna_cichlid_get_dpm_ultimate_freq +ffffffff822dbb30 t sienna_cichlid_get_gpu_metrics +ffffffff822dc0b0 t sienna_cichlid_enable_mgpu_fan_boost +ffffffff822dc100 t sienna_cichlid_get_fan_parameters +ffffffff822dc140 t sienna_cichlid_gpo_control +ffffffff822dc1f0 t sienna_cichlid_get_ecc_info +ffffffff822dc2e0 t sienna_cichlid_stb_get_data_direct +ffffffff822dc380 t sienna_cichlid_get_default_config_table_settings +ffffffff822dc3f0 t sienna_cichlid_set_config_table +ffffffff822dc4c0 t sienna_cichlid_get_throttler_status_locked +ffffffff822dc620 t sienna_cichlid_get_smartshift_power_percentage +ffffffff822dc750 t sienna_cichlid_i2c_xfer +ffffffff822dc9f0 t sienna_cichlid_i2c_func +ffffffff822dd000 T smu_v11_0_init_microcode +ffffffff822dd2b0 T smu_v11_0_fini_microcode +ffffffff822dd330 T smu_v11_0_load_microcode +ffffffff822dd470 T smu_v11_0_check_fw_status +ffffffff822dd4c0 T smu_v11_0_check_fw_version +ffffffff822dd670 T smu_v11_0_setup_pptable +ffffffff822dd790 T smu_v11_0_init_smc_tables +ffffffff822dd8f0 T smu_v11_0_fini_smc_tables +ffffffff822ddb20 T smu_v11_0_init_power +ffffffff822ddbb0 T smu_v11_0_fini_power +ffffffff822ddc10 T smu_v11_0_get_vbios_bootup_values +ffffffff822ddf70 T smu_v11_0_notify_memory_pool_location +ffffffff822de060 T smu_v11_0_set_min_deep_sleep_dcefclk +ffffffff822de0e0 T smu_v11_0_set_driver_table_location +ffffffff822de150 T smu_v11_0_set_tool_table_location +ffffffff822de1c0 T smu_v11_0_init_display_count +ffffffff822de220 T smu_v11_0_set_allowed_mask +ffffffff822de2f0 T smu_v11_0_system_features_control +ffffffff822de310 T smu_v11_0_notify_display_change +ffffffff822de380 T smu_v11_0_init_max_sustainable_clocks +ffffffff822de5e0 t smu_v11_0_get_max_sustainable_clock +ffffffff822de700 T smu_v11_0_get_current_power_limit +ffffffff822de7d0 T smu_v11_0_set_power_limit +ffffffff822de910 T smu_v11_0_interrupt_work +ffffffff822de990 T smu_v11_0_enable_thermal_alert +ffffffff822dea30 T smu_v11_0_disable_thermal_alert +ffffffff822dea50 T smu_v11_0_get_gfx_vdd +ffffffff822deb10 T smu_v11_0_display_clock_voltage_request +ffffffff822dec60 T smu_v11_0_set_hard_freq_limited_range +ffffffff822ded40 T smu_v11_0_gfx_off_control +ffffffff822dedb0 T smu_v11_0_get_fan_control_mode +ffffffff822dee00 T smu_v11_0_set_fan_speed_pwm +ffffffff822defa0 t smu_v11_0_set_fan_static_mode +ffffffff822df150 T smu_v11_0_set_fan_speed_rpm +ffffffff822df270 T smu_v11_0_get_fan_speed_pwm +ffffffff822df3b0 T smu_v11_0_get_fan_speed_rpm +ffffffff822df4b0 T smu_v11_0_set_fan_control_mode +ffffffff822df650 T smu_v11_0_set_xgmi_pstate +ffffffff822df670 T smu_v11_0_register_irq_handler +ffffffff822df730 T smu_v11_0_get_max_sustainable_clocks_by_dc +ffffffff822df7c0 T smu_v11_0_set_azalia_d3_pme +ffffffff822df7e0 T smu_v11_0_baco_set_armd3_sequence +ffffffff822df800 T smu_v11_0_baco_is_support +ffffffff822df890 T smu_v11_0_baco_get_state +ffffffff822df8c0 T smu_v11_0_baco_set_state +ffffffff822dfb70 T smu_v11_0_baco_enter +ffffffff822dfc60 T smu_v11_0_baco_exit +ffffffff822dfd00 T smu_v11_0_mode1_reset +ffffffff822dfd80 T smu_v11_0_handle_passthrough_sbr +ffffffff822dfda0 T smu_v11_0_get_dpm_ultimate_freq +ffffffff822dfee0 T smu_v11_0_set_soft_freq_limited_range +ffffffff822dffb0 T smu_v11_0_set_performance_level +ffffffff822e0300 T smu_v11_0_set_power_source +ffffffff822e0360 T smu_v11_0_get_dpm_freq_by_index +ffffffff822e0410 T smu_v11_0_get_dpm_level_count +ffffffff822e04b0 T smu_v11_0_set_single_dpm_table +ffffffff822e0710 T smu_v11_0_get_dpm_level_range +ffffffff822e0870 T smu_v11_0_get_current_pcie_link_width_level +ffffffff822e08c0 T smu_v11_0_get_current_pcie_link_width +ffffffff822e0920 T smu_v11_0_get_current_pcie_link_speed_level +ffffffff822e0970 T smu_v11_0_get_current_pcie_link_speed +ffffffff822e09d0 T smu_v11_0_gfx_ulv_control +ffffffff822e0a40 T smu_v11_0_deep_sleep_control +ffffffff822e0bf0 T smu_v11_0_restore_user_od_settings +ffffffff822e0c80 T smu_v11_0_set_smu_mailbox_registers +ffffffff822e0cf0 t smu_v11_0_set_irq_state +ffffffff822e1280 t smu_v11_0_irq_process +ffffffff822e2000 T vangogh_set_ppt_funcs +ffffffff822e2040 t vangogh_set_default_dpm_tables +ffffffff822e2070 t vangogh_common_print_clk_levels +ffffffff822e24e0 t vangogh_force_clk_levels +ffffffff822e2710 t vangogh_od_edit_dpm_table +ffffffff822e2c40 t vangogh_get_power_profile_mode +ffffffff822e2d10 t vangogh_set_power_profile_mode +ffffffff822e2e30 t vangogh_dpm_set_vcn_enable +ffffffff822e2e80 t vangogh_dpm_set_jpeg_enable +ffffffff822e2ed0 t vangogh_read_sensor +ffffffff822e3480 t vangogh_is_dpm_running +ffffffff822e34e0 t vangogh_set_watermarks_table +ffffffff822e3660 t vangogh_set_performance_level +ffffffff822e3e70 t vangogh_get_power_limit +ffffffff822e3fd0 t vangogh_get_ppt_limit +ffffffff822e4040 t vangogh_get_dpm_clock_table +ffffffff822e41b0 t vangogh_init_smc_tables +ffffffff822e43f0 t vangogh_system_features_control +ffffffff822e4440 t vangogh_set_power_limit +ffffffff822e45a0 t vangogh_get_gfxoff_status +ffffffff822e4630 t vangogh_get_gfxoff_entrycount +ffffffff822e46a0 t vangogh_set_gfxoff_residency +ffffffff822e4710 t vangogh_get_gfxoff_residency +ffffffff822e4750 t vangogh_mode2_reset +ffffffff822e4890 t vangogh_common_get_gpu_metrics +ffffffff822e4ef0 t vangogh_post_smu_init +ffffffff822e5090 t vangogh_set_fine_grain_gfx_freq_parameters +ffffffff822e5100 t vangogh_force_dpm_limit_value +ffffffff822e5230 t vangogh_get_dpm_ultimate_freq +ffffffff822e55f0 t vangogh_set_soft_freq_limited_range +ffffffff822e6000 T renoir_set_ppt_funcs +ffffffff822e60a0 t renoir_get_current_power_state +ffffffff822e6120 t renoir_print_clk_levels +ffffffff822e6530 t renoir_force_clk_levels +ffffffff822e6750 t renoir_od_edit_dpm_table +ffffffff822e6a30 t renoir_get_power_profile_mode +ffffffff822e6b00 t renoir_set_power_profile_mode +ffffffff822e6c20 t renoir_dpm_set_vcn_enable +ffffffff822e6ca0 t renoir_dpm_set_jpeg_enable +ffffffff822e6d20 t renoir_read_sensor +ffffffff822e70d0 t renoir_is_dpm_running +ffffffff822e7110 t renoir_set_watermarks_table +ffffffff822e72b0 t renoir_set_performance_level +ffffffff822e77d0 t renoir_get_dpm_clock_table +ffffffff822e7b20 t renoir_init_smc_tables +ffffffff822e7c90 t renoir_get_enabled_mask +ffffffff822e7cd0 t renoir_get_dpm_ultimate_freq +ffffffff822e7f70 t renoir_get_gpu_metrics +ffffffff822e8190 t renoir_gfx_state_change_set +ffffffff822e81c0 t renoir_set_fine_grain_gfx_freq_parameters +ffffffff822e8260 t renoir_force_dpm_limit_value +ffffffff822e9000 T smu_v12_0_check_fw_status +ffffffff822e9050 T smu_v12_0_check_fw_version +ffffffff822e9110 T smu_v12_0_powergate_sdma +ffffffff822e9150 T smu_v12_0_set_gfx_cgpg +ffffffff822e91b0 T smu_v12_0_get_gfxoff_status +ffffffff822e9240 T smu_v12_0_gfx_off_control +ffffffff822e9360 T smu_v12_0_fini_smc_tables +ffffffff822e9410 T smu_v12_0_set_default_dpm_tables +ffffffff822e9440 T smu_v12_0_mode2_reset +ffffffff822e9460 T smu_v12_0_set_soft_freq_limited_range +ffffffff822e95a0 T smu_v12_0_set_driver_table_location +ffffffff822e9610 T smu_v12_0_get_vbios_bootup_values +ffffffff822ea000 T aldebaran_set_ppt_funcs +ffffffff822ea040 t aldebaran_get_allowed_feature_mask +ffffffff822ea090 t aldebaran_set_default_dpm_table +ffffffff822ea290 t aldebaran_populate_umd_state_clk +ffffffff822ea390 t aldebaran_print_clk_levels +ffffffff822ea550 t aldebaran_force_clk_levels +ffffffff822ea710 t aldebaran_usr_edit_dpm_table +ffffffff822ea930 t aldebaran_read_sensor +ffffffff822eab80 t aldebaran_is_dpm_running +ffffffff822eabd0 t aldebaran_get_thermal_temperature_range +ffffffff822eaca0 t aldebaran_set_performance_level +ffffffff822ead50 t aldebaran_get_power_limit +ffffffff822eaee0 t aldebaran_set_df_cstate +ffffffff822eaf60 t aldebaran_allow_xgmi_power_down +ffffffff822eb000 t aldebaran_i2c_control_init +ffffffff822eb0c0 t aldebaran_i2c_control_fini +ffffffff822eb100 t aldebaran_get_unique_id +ffffffff822eb1e0 t aldebaran_init_smc_tables +ffffffff822eb3a0 t aldebaran_set_mp1_state +ffffffff822eb3e0 t aldebaran_setup_pptable +ffffffff822eb4b0 t aldebaran_system_features_control +ffffffff822eb610 t aldebaran_set_power_limit +ffffffff822eb6a0 t aldebaran_is_baco_supported +ffffffff822eb6d0 t aldebaran_is_mode1_reset_supported +ffffffff822eb700 t aldebaran_is_mode2_reset_supported +ffffffff822eb730 t aldebaran_mode1_reset +ffffffff822eb810 t aldebaran_mode2_reset +ffffffff822ebb30 t aldebaran_set_soft_freq_limited_range +ffffffff822ebd30 t aldebaran_log_thermal_throttling_event +ffffffff822ec040 t aldebaran_get_gpu_metrics +ffffffff822ec2c0 t aldebaran_smu_handle_passthrough_sbr +ffffffff822ec2e0 t aldebaran_smu_send_hbm_bad_page_num +ffffffff822ec360 t aldebaran_get_ecc_info +ffffffff822ec4c0 t aldebaran_send_hbm_bad_channel_flag +ffffffff822ec590 t aldebaran_get_current_clk_freq_by_table +ffffffff822ec760 t aldebaran_upload_dpm_level +ffffffff822ec850 t aldebaran_i2c_xfer +ffffffff822ecaf0 t aldebaran_i2c_func +ffffffff822ed000 T smu_v13_0_init_microcode +ffffffff822ed1d0 T smu_v13_0_fini_microcode +ffffffff822ed250 T smu_v13_0_load_microcode +ffffffff822ed280 T smu_v13_0_init_pptable_microcode +ffffffff822ed430 T smu_v13_0_get_pptable_from_firmware +ffffffff822ed550 T smu_v13_0_check_fw_status +ffffffff822ed5c0 T smu_v13_0_check_fw_version +ffffffff822ed6f0 T smu_v13_0_setup_pptable +ffffffff822ed880 T smu_v13_0_init_smc_tables +ffffffff822ed9d0 T smu_v13_0_fini_smc_tables +ffffffff822edbc0 T smu_v13_0_init_power +ffffffff822edc40 T smu_v13_0_fini_power +ffffffff822edcc0 T smu_v13_0_get_vbios_bootup_values +ffffffff822edf60 T smu_v13_0_notify_memory_pool_location +ffffffff822ee020 T smu_v13_0_set_min_deep_sleep_dcefclk +ffffffff822ee0a0 T smu_v13_0_set_driver_table_location +ffffffff822ee110 T smu_v13_0_set_tool_table_location +ffffffff822ee180 T smu_v13_0_init_display_count +ffffffff822ee1c0 T smu_v13_0_set_allowed_mask +ffffffff822ee290 T smu_v13_0_gfx_off_control +ffffffff822ee300 T smu_v13_0_system_features_control +ffffffff822ee320 T smu_v13_0_notify_display_change +ffffffff822ee390 T smu_v13_0_init_max_sustainable_clocks +ffffffff822ee5f0 t smu_v13_0_get_max_sustainable_clock +ffffffff822ee710 T smu_v13_0_get_current_power_limit +ffffffff822ee7e0 T smu_v13_0_set_power_limit +ffffffff822ee8f0 T smu_v13_0_enable_thermal_alert +ffffffff822ee980 T smu_v13_0_disable_thermal_alert +ffffffff822ee9c0 T smu_v13_0_get_gfx_vdd +ffffffff822eea80 T smu_v13_0_display_clock_voltage_request +ffffffff822eebd0 T smu_v13_0_set_hard_freq_limited_range +ffffffff822eecb0 T smu_v13_0_get_fan_control_mode +ffffffff822eed00 T smu_v13_0_set_fan_speed_pwm +ffffffff822eef10 t smu_v13_0_set_fan_static_mode +ffffffff822ef0d0 T smu_v13_0_set_fan_control_mode +ffffffff822ef230 T smu_v13_0_set_fan_speed_rpm +ffffffff822ef3d0 T smu_v13_0_set_xgmi_pstate +ffffffff822ef3f0 T smu_v13_0_register_irq_handler +ffffffff822ef4c0 T smu_v13_0_get_max_sustainable_clocks_by_dc +ffffffff822ef550 T smu_v13_0_set_azalia_d3_pme +ffffffff822ef570 T smu_v13_0_wait_for_event +ffffffff822ef5d0 T smu_v13_0_get_dpm_ultimate_freq +ffffffff822ef730 T smu_v13_0_set_soft_freq_limited_range +ffffffff822ef800 T smu_v13_0_set_performance_level +ffffffff822eff60 T smu_v13_0_set_power_source +ffffffff822effc0 T smu_v13_0_set_single_dpm_table +ffffffff822f02b0 T smu_v13_0_get_dpm_level_range +ffffffff822f0440 T smu_v13_0_get_current_pcie_link_width_level +ffffffff822f0490 T smu_v13_0_get_current_pcie_link_width +ffffffff822f04f0 T smu_v13_0_get_current_pcie_link_speed_level +ffffffff822f0540 T smu_v13_0_get_current_pcie_link_speed +ffffffff822f0590 T smu_v13_0_set_vcn_enable +ffffffff822f0640 T smu_v13_0_set_jpeg_enable +ffffffff822f0660 T smu_v13_0_run_btc +ffffffff822f06e0 T smu_v13_0_gpo_control +ffffffff822f0770 T smu_v13_0_deep_sleep_control +ffffffff822f09d0 T smu_v13_0_gfx_ulv_control +ffffffff822f0a40 T smu_v13_0_baco_set_armd3_sequence +ffffffff822f0a60 T smu_v13_0_baco_is_support +ffffffff822f0af0 T smu_v13_0_baco_get_state +ffffffff822f0b20 T smu_v13_0_baco_set_state +ffffffff822f0be0 T smu_v13_0_baco_enter +ffffffff822f0cf0 T smu_v13_0_baco_exit +ffffffff822f0d90 T smu_v13_0_set_gfx_power_up_by_imu +ffffffff822f0dd0 T smu_v13_0_od_edit_dpm_table +ffffffff822f1080 T smu_v13_0_set_default_dpm_tables +ffffffff822f10b0 T smu_v13_0_set_smu_mailbox_registers +ffffffff822f1120 T smu_v13_0_mode1_reset +ffffffff822f11a0 T smu_v13_0_update_pcie_parameters +ffffffff822f1410 t smu_v13_0_set_irq_state +ffffffff822f19a0 t smu_v13_0_irq_process +ffffffff822f2000 T smu_v13_0_0_set_ppt_funcs +ffffffff822f20e0 t smu_v13_0_0_get_allowed_feature_mask +ffffffff822f2220 t smu_v13_0_0_set_default_dpm_table +ffffffff822f2640 t smu_v13_0_0_populate_umd_state_clk +ffffffff822f2780 t smu_v13_0_0_print_clk_levels +ffffffff822f2890 t smu_v13_0_0_force_clk_levels +ffffffff822f2a10 t smu_v13_0_0_get_power_profile_mode +ffffffff822f2c70 t smu_v13_0_0_set_power_profile_mode +ffffffff822f2ec0 t smu_v13_0_0_read_sensor +ffffffff822f30e0 t smu_v13_0_0_is_dpm_running +ffffffff822f3130 t smu_v13_0_0_get_fan_speed_pwm +ffffffff822f3210 t smu_v13_0_0_get_fan_speed_rpm +ffffffff822f3280 t smu_v13_0_0_get_thermal_temperature_range +ffffffff822f3380 t smu_v13_0_0_dump_pptable +ffffffff822f33b0 t smu_v13_0_0_get_power_limit +ffffffff822f3490 t smu_v13_0_0_set_df_cstate +ffffffff822f34b0 t smu_v13_0_0_i2c_control_init +ffffffff822f35e0 t smu_v13_0_0_i2c_control_fini +ffffffff822f3620 t smu_v13_0_0_get_unique_id +ffffffff822f36c0 t smu_v13_0_0_init_smc_tables +ffffffff822f38b0 t smu_v13_0_0_set_mp1_state +ffffffff822f38f0 t smu_v13_0_0_setup_pptable +ffffffff822f3a30 t smu_v13_0_0_system_features_control +ffffffff822f3a40 t smu_v13_0_0_baco_enter +ffffffff822f3a90 t smu_v13_0_0_baco_exit +ffffffff822f3af0 t smu_v13_0_0_is_mode1_reset_supported +ffffffff822f3b50 t smu_v13_0_0_mode1_reset +ffffffff822f3be0 t smu_v13_0_0_get_dpm_ultimate_freq +ffffffff822f3d00 t smu_v13_0_0_get_gpu_metrics +ffffffff822f4120 t smu_v13_0_0_enable_mgpu_fan_boost +ffffffff822f4170 t smu_v13_0_0_smu_send_bad_mem_page_num +ffffffff822f41f0 t smu_v13_0_0_send_bad_mem_channel_flag +ffffffff822f4270 t smu_v13_0_0_i2c_xfer +ffffffff822f4510 t smu_v13_0_0_i2c_func +ffffffff822f5000 T smu_v13_0_4_set_ppt_funcs +ffffffff822f50b0 t smu_v13_0_4_print_clk_levels +ffffffff822f5120 t smu_v13_0_4_force_clk_levels +ffffffff822f53c0 t smu_v13_0_4_read_sensor +ffffffff822f5670 t smu_v13_0_4_is_dpm_running +ffffffff822f56c0 t smu_v13_0_4_set_watermarks_table +ffffffff822f5840 t smu_v13_0_4_set_performance_level +ffffffff822f5d80 t smu_v13_0_4_init_smc_tables +ffffffff822f5ef0 t smu_v13_0_4_fini_smc_tables +ffffffff822f5fa0 t smu_v13_0_4_system_features_control +ffffffff822f5ff0 t smu_v13_0_4_mode2_reset +ffffffff822f6010 t smu_v13_0_4_get_dpm_ultimate_freq +ffffffff822f6430 t smu_v13_0_4_get_gpu_metrics +ffffffff822f6600 t smu_v13_0_4_set_fine_grain_gfx_freq_parameters +ffffffff822f6660 t smu_v13_0_4_get_current_clk_freq +ffffffff822f7000 T smu_v13_0_5_set_ppt_funcs +ffffffff822f7090 t smu_v13_0_5_set_default_dpm_tables +ffffffff822f70c0 t smu_v13_0_5_print_clk_levels +ffffffff822f7150 t smu_v13_0_5_force_clk_levels +ffffffff822f72b0 t smu_v13_0_5_od_edit_dpm_table +ffffffff822f7560 t smu_v13_0_5_dpm_set_vcn_enable +ffffffff822f7580 t smu_v13_0_5_dpm_set_jpeg_enable +ffffffff822f75a0 t smu_v13_0_5_read_sensor +ffffffff822f77c0 t smu_v13_0_5_is_dpm_running +ffffffff822f7810 t smu_v13_0_5_set_watermarks_table +ffffffff822f7990 t smu_v13_0_5_set_performance_level +ffffffff822f7b70 t smu_v13_0_5_init_smc_tables +ffffffff822f7ce0 t smu_v13_0_5_fini_smc_tables +ffffffff822f7d90 t smu_v13_0_5_system_features_control +ffffffff822f7de0 t smu_v13_0_5_mode2_reset +ffffffff822f7e60 t smu_v13_0_5_get_dpm_ultimate_freq +ffffffff822f82a0 t smu_v13_0_5_get_gpu_metrics +ffffffff822f83f0 t smu_v13_0_5_set_fine_grain_gfx_freq_parameters +ffffffff822f9000 T smu_v13_0_7_set_ppt_funcs +ffffffff822f9050 t smu_v13_0_7_get_allowed_feature_mask +ffffffff822f91c0 t smu_v13_0_7_set_default_dpm_table +ffffffff822f95e0 t smu_v13_0_7_populate_umd_state_clk +ffffffff822f9720 t smu_v13_0_7_print_clk_levels +ffffffff822f9830 t smu_v13_0_7_force_clk_levels +ffffffff822f99b0 t smu_v13_0_7_get_power_profile_mode +ffffffff822f9c90 t smu_v13_0_7_set_power_profile_mode +ffffffff822f9ed0 t smu_v13_0_7_read_sensor +ffffffff822fa0e0 t smu_v13_0_7_is_dpm_running +ffffffff822fa130 t smu_v13_0_7_get_fan_speed_pwm +ffffffff822fa210 t smu_v13_0_7_get_fan_speed_rpm +ffffffff822fa280 t smu_v13_0_7_get_thermal_temperature_range +ffffffff822fa380 t smu_v13_0_7_dump_pptable +ffffffff822fa3b0 t smu_v13_0_7_get_power_limit +ffffffff822fa490 t smu_v13_0_7_set_df_cstate +ffffffff822fa4b0 t smu_v13_0_7_init_smc_tables +ffffffff822fa6a0 t smu_v13_0_7_check_fw_status +ffffffff822fa6f0 t smu_v13_0_7_set_mp1_state +ffffffff822fa730 t smu_v13_0_7_setup_pptable +ffffffff822fa890 t smu_v13_0_7_baco_enter +ffffffff822fa8e0 t smu_v13_0_7_baco_exit +ffffffff822fa940 t smu_v13_0_7_is_mode1_reset_supported +ffffffff822fa980 t smu_v13_0_7_get_dpm_ultimate_freq +ffffffff822faaa0 t smu_v13_0_7_get_gpu_metrics +ffffffff822faeb0 t smu_v13_0_7_enable_mgpu_fan_boost +ffffffff822fb000 T yellow_carp_set_ppt_funcs +ffffffff822fb040 t yellow_carp_set_default_dpm_tables +ffffffff822fb070 t yellow_carp_print_clk_levels +ffffffff822fb0e0 t yellow_carp_force_clk_levels +ffffffff822fb380 t yellow_carp_od_edit_dpm_table +ffffffff822fb630 t yellow_carp_dpm_set_vcn_enable +ffffffff822fb650 t yellow_carp_dpm_set_jpeg_enable +ffffffff822fb670 t yellow_carp_read_sensor +ffffffff822fb9e0 t yellow_carp_is_dpm_running +ffffffff822fba30 t yellow_carp_set_watermarks_table +ffffffff822fbbb0 t yellow_carp_set_performance_level +ffffffff822fc0f0 t yellow_carp_init_smc_tables +ffffffff822fc260 t yellow_carp_fini_smc_tables +ffffffff822fc310 t yellow_carp_system_features_control +ffffffff822fc360 t yellow_carp_get_gfxoff_status +ffffffff822fc3f0 t yellow_carp_mode2_reset +ffffffff822fc470 t yellow_carp_get_dpm_ultimate_freq +ffffffff822fc8b0 t yellow_carp_get_gpu_metrics +ffffffff822fca60 t yellow_carp_post_smu_init +ffffffff822fcae0 t yellow_carp_set_fine_grain_gfx_freq_parameters +ffffffff822fcb40 t yellow_carp_get_current_clk_freq +ffffffff822fd000 T smu_cmn_send_msg_without_waiting +ffffffff822fd170 T smu_cmn_wait_for_response +ffffffff822fd2a0 T smu_cmn_send_smc_msg_with_param +ffffffff822fd5b0 T smu_cmn_to_asic_specific_index +ffffffff822fd6c0 t __smu_cmn_reg_print_error +ffffffff822fd900 T smu_cmn_send_smc_msg +ffffffff822fd920 T smu_cmn_send_debug_smc_msg +ffffffff822fd9a0 T smu_cmn_feature_is_supported +ffffffff822fda50 T smu_cmn_feature_is_enabled +ffffffff822fdb40 T smu_cmn_clk_dpm_is_enabled +ffffffff822fdc40 T smu_cmn_get_enabled_mask +ffffffff822fdd30 T smu_cmn_get_indep_throttler_status +ffffffff822fdde0 T smu_cmn_feature_update_enable_state +ffffffff822fde80 T smu_cmn_feature_set_enabled +ffffffff822fdf50 T smu_cmn_get_pp_feature_mask +ffffffff822fe100 T smu_cmn_set_pp_feature_mask +ffffffff822fe200 T smu_cmn_disable_all_features_with_exception +ffffffff822fe2b0 T smu_cmn_get_smc_version +ffffffff822fe380 T smu_cmn_update_table +ffffffff822fe4e0 T smu_cmn_write_watermarks_table +ffffffff822fe5b0 T smu_cmn_write_pptable +ffffffff822fe670 T smu_cmn_get_metrics_table +ffffffff822fe7d0 T smu_cmn_get_combo_pptable +ffffffff822fe8a0 T smu_cmn_init_soft_gpu_metrics +ffffffff822fe980 T smu_cmn_set_mp1_state +ffffffff822fea20 T smu_cmn_is_audio_func_enabled +ffffffff822ff000 T pci_mcfg_init +ffffffff822ff050 T pci_lookup_segment +ffffffff822ff0b0 T pci_attach_hook +ffffffff822ff0e0 T pci_bus_maxdevs +ffffffff822ff110 T pci_make_tag +ffffffff822ff180 T pci_decompose_tag +ffffffff822ff1e0 T pci_conf_size +ffffffff822ff240 T pci_mcfg_map_bus +ffffffff822ff2c0 T pci_conf_read +ffffffff822ff410 T pci_conf_write +ffffffff822ff550 T pci_msix_table_map +ffffffff822ff680 T pci_msix_table_unmap +ffffffff822ff720 T msi_hwmask +ffffffff822ff750 T msi_hwunmask +ffffffff822ff780 T msi_addroute +ffffffff822ff880 T msi_delroute +ffffffff822ff8f0 T pci_intr_map_msi +ffffffff822ff970 T msix_hwmask +ffffffff822ff9a0 T msix_hwunmask +ffffffff822ff9d0 T msix_addroute +ffffffff822ffbc0 T msix_delroute +ffffffff822ffd20 T pci_intr_map_msix +ffffffff822ffdf0 T pci_intr_map +ffffffff82300020 T pci_intr_string +ffffffff82300100 T pci_intr_establish +ffffffff82300150 T pci_intr_establish_cpu +ffffffff823002a0 T pci_intr_disestablish +ffffffff823002c0 T pci_init_extents +ffffffff823004a0 T pci_probe_device_hook +ffffffff823004e0 T pci_dev_postattach +ffffffff823004f0 T pci_min_powerstate +ffffffff82300500 T pci_set_powerstate_md +ffffffff82301000 T pciide_machdep_compat_intr_establish +ffffffff82301060 T pciide_machdep_compat_intr_disestablish +ffffffff82302000 T vga_post_init +ffffffff82302310 t vm86_emu_inb +ffffffff82302360 t vm86_emu_inw +ffffffff823023a0 t vm86_emu_inl +ffffffff823023e0 t vm86_emu_outb +ffffffff82302430 t vm86_emu_outw +ffffffff82302470 t vm86_emu_outl +ffffffff823024b0 T vga_post_call +ffffffff82302520 T vga_post_free +ffffffff82302590 T ddb_vgapost +ffffffff82303000 T pchbmatch +ffffffff82303040 T pchbattach +ffffffff823034a0 T pchbactivate +ffffffff82303510 T pchb_amd64ht_attach +ffffffff82303660 T pchb_rnd +ffffffff823036e0 T pchb_print +ffffffff82304000 T amas_match +ffffffff82304050 T amas_attach +ffffffff823040b0 T amas_intl_nodes +ffffffff82304140 T amas_get_pagerange +ffffffff82305000 T agp_flush_cache +ffffffff82305030 T agp_flush_cache_range +ffffffff82305040 T agp_init_map +ffffffff82305110 T agp_destroy_map +ffffffff82305150 T agp_map_subregion +ffffffff82305180 T agp_unmap_subregion +ffffffff823051b0 T agp_map_atomic +ffffffff823051e0 T agp_unmap_atomic +ffffffff82306000 T cardslotmatch +ffffffff82306050 T cardslotattach +ffffffff823062a0 T cardslot_event +ffffffff82306300 T cardslot_cb_print +ffffffff82306350 T cardslot_16_print +ffffffff823063a0 T cardslot_16_submatch +ffffffff823063f0 T cardslot_event_throw +ffffffff82306490 T cardslot_process_event +ffffffff82307000 T cardbusmatch +ffffffff82307050 T cardbusattach +ffffffff82307130 T cardbus_read_tuples +ffffffff823074e0 T parse_tuple +ffffffff82307750 T cardbus_attach_card +ffffffff82307ed0 T enable_function +ffffffff82307f70 T decode_tuples +ffffffff82308050 T cardbusprint +ffffffff82308140 T cardbussubmatch +ffffffff823081a0 T disable_function +ffffffff82308200 T cardbus_detach_card +ffffffff823082e0 T cardbus_intr_establish +ffffffff82308310 T cardbus_intr_disestablish +ffffffff82308330 T cardbus_function_enable +ffffffff82308410 T cardbus_function_disable +ffffffff82308470 T cardbus_matchbyid +ffffffff823084e0 T decode_tuple +ffffffff82309000 T cardbus_mapreg_map +ffffffff823091a0 T cardbus_mapreg_unmap +ffffffff8230a000 T cardbus_read_exrom +ffffffff8230b000 T rbus_space_alloc +ffffffff8230b060 T rbus_space_alloc_subregion +ffffffff8230b230 T rbus_space_free +ffffffff8230b2c0 T rbus_new_body +ffffffff8230b350 T rbus_new_root_delegate +ffffffff8230b420 T rbus_new_root_share +ffffffff8230c000 T com_cardbus_match +ffffffff8230c070 T com_cardbus_attach +ffffffff8230c220 T com_cardbus_detach +ffffffff8230c2c0 T com_cardbus_find_csdev +ffffffff8230c440 T com_cardbus_gofigure +ffffffff8230c900 T com_cardbus_enable +ffffffff8230c9d0 T com_cardbus_disable +ffffffff8230ca20 T com_cardbus_setup +ffffffff8230d000 T xl_cardbus_match +ffffffff8230d080 T xl_cardbus_attach +ffffffff8230d3f0 T xl_cardbus_detach +ffffffff8230d4b0 T xl_cardbus_lookup +ffffffff8230d560 T xl_cardbus_intr_ack +ffffffff8230e000 T dc_cardbus_match +ffffffff8230e030 T dc_cardbus_attach +ffffffff8230e3e0 T dc_cardbus_detach +ffffffff8230e480 T dc_cardbus_setup +ffffffff8230f000 T fxp_cardbus_match +ffffffff8230f030 T fxp_cardbus_attach +ffffffff8230f240 T fxp_cardbus_detach +ffffffff8230f2d0 T fxp_cardbus_setup +ffffffff82310000 t rl_cardbus_match +ffffffff82310030 t rl_cardbus_attach +ffffffff823101d0 t rl_cardbus_detach +ffffffff82310290 T rl_cardbus_setup +ffffffff82311000 T re_cardbus_probe +ffffffff82311030 T re_cardbus_attach +ffffffff82311230 T re_cardbus_detach +ffffffff82311310 T re_cardbus_setup +ffffffff82312000 T ath_cardbus_match +ffffffff82312050 T ath_cardbus_attach +ffffffff82312180 T ath_cardbus_detach +ffffffff82312250 T ath_cardbus_enable +ffffffff82312320 T ath_cardbus_disable +ffffffff82312370 T ath_cardbus_power +ffffffff823123b0 T ath_cardbus_setup +ffffffff82313000 T athn_cardbus_match +ffffffff82313030 T athn_cardbus_attach +ffffffff82313170 T athn_cardbus_detach +ffffffff82313210 T athn_cardbus_enable +ffffffff823132e0 T athn_cardbus_disable +ffffffff82313330 T athn_cardbus_power +ffffffff82313370 T athn_cardbus_read +ffffffff823133a0 T athn_cardbus_write +ffffffff823133d0 T athn_cardbus_write_barrier +ffffffff82313400 T athn_cardbus_setup +ffffffff82314000 T atw_cardbus_match +ffffffff82314030 T atw_cardbus_attach +ffffffff82314220 T atw_cardbus_detach +ffffffff823142e0 T atw_cardbus_enable +ffffffff823143b0 T atw_cardbus_disable +ffffffff82314400 T atw_cardbus_power +ffffffff82314440 T atw_cardbus_setup +ffffffff82315000 T rtw_cardbus_match +ffffffff82315030 T rtw_cardbus_attach +ffffffff82315270 T rtw_cardbus_detach +ffffffff82315390 T rtw_cardbus_intr_ack +ffffffff823153b0 T rtw_cardbus_funcregen +ffffffff82315410 T rtw_cardbus_enable +ffffffff82315570 T rtw_cardbus_disable +ffffffff82315650 T rtw_cardbus_power +ffffffff82315690 T rtw_cardbus_setup +ffffffff82316000 T ral_cardbus_match +ffffffff82316030 T ral_cardbus_attach +ffffffff82316230 T ral_cardbus_detach +ffffffff823162e0 T ral_cardbus_activate +ffffffff82316370 T ral_cardbus_enable +ffffffff823164d0 T ral_cardbus_disable +ffffffff82316520 T ral_cardbus_setup +ffffffff823165c0 T ral_cardbus_wakeup +ffffffff82317000 T acx_cardbus_match +ffffffff82317030 T acx_cardbus_attach +ffffffff82317260 T acx_cardbus_detach +ffffffff82317380 T acx_cardbus_enable +ffffffff82317450 T acx_cardbus_disable +ffffffff823174a0 T acx_cardbus_power +ffffffff823174e0 T acx_cardbus_setup +ffffffff82318000 T pgt_cardbus_match +ffffffff82318030 T pgt_cardbus_attach +ffffffff82318230 T pgt_cardbus_detach +ffffffff823182e0 T pgt_cardbus_enable +ffffffff82318440 T pgt_cardbus_disable +ffffffff82318490 T pgt_cardbus_power +ffffffff823184f0 T pgt_cardbus_setup +ffffffff82319000 T ehci_cardbus_match +ffffffff82319040 T ehci_cardbus_attach +ffffffff823192e0 T ehci_cardbus_detach +ffffffff8231a000 T ohci_cardbus_match +ffffffff8231a040 T ohci_cardbus_attach +ffffffff8231a2e0 T ohci_cardbus_detach +ffffffff8231b000 T uhci_cardbus_match +ffffffff8231b040 T uhci_cardbus_attach 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pcmcia_submatch +ffffffff8231f6e0 T pcmcia_card_detach +ffffffff8231f790 T pcmcia_card_deactivate +ffffffff8231f800 T pcmcia_card_gettype +ffffffff8231f860 T pcmcia_function_init +ffffffff8231f8b0 T pcmcia_function_enable +ffffffff8231fce0 T pcmcia_function_disable +ffffffff8231fe00 T pcmcia_io_map +ffffffff82320040 T pcmcia_intr_establish +ffffffff823202b0 T pcmcia_card_intr +ffffffff823203d0 T pcmcia_intr_disestablish +ffffffff823205f0 T pcmcia_intr_string +ffffffff82321000 T pcmcia_cis_read_1 +ffffffff823210f0 T pcmcia_read_cis +ffffffff823211e0 T pcmcia_scan_cis +ffffffff82322cd0 T pcmcia_parse_cis_tuple +ffffffff82323e60 T pcmcia_print_cis +ffffffff82325000 T pcmcia_check_cis_quirks +ffffffff82326000 T ep_pcmcia_match +ffffffff82326110 T ep_pcmcia_attach +ffffffff82326520 T ep_pcmcia_detach +ffffffff823265c0 T ep_pcmcia_activate +ffffffff823266a0 T ep_pcmcia_lookup +ffffffff823267b0 T ep_pcmcia_enable1 +ffffffff82326860 T ep_pcmcia_get_enaddr +ffffffff82327000 T ne_pcmcia_match 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sm_pcmcia_match +ffffffff8232b100 T sm_pcmcia_attach +ffffffff8232b320 T sm_pcmcia_detach +ffffffff8232b3c0 T sm_pcmcia_activate +ffffffff8232b450 T sm_pcmcia_funce_enaddr +ffffffff8232b470 T sm_pcmcia_ascii_enaddr +ffffffff8232b570 T sm_pcmcia_lannid_ciscallback +ffffffff8232b680 T sm_pcmcia_enable +ffffffff8232b720 T sm_pcmcia_disable +ffffffff8232c000 T xe_pcmcia_match +ffffffff8232c050 T xe_pcmcia_attach +ffffffff8232c5e0 T xe_pcmcia_detach +ffffffff8232c6a0 T xe_pcmcia_activate +ffffffff8232c990 T xe_pcmcia_interpret_manfid +ffffffff8232ca30 T xe_pcmcia_funce_enaddr +ffffffff8232ca50 T xe_ioctl +ffffffff8232cda0 T xe_start +ffffffff8232d030 T xe_watchdog +ffffffff8232d070 T xe_intr +ffffffff8232d430 T xe_full_reset +ffffffff8232da00 T xe_mdi_read +ffffffff8232e390 T xe_mdi_write +ffffffff8232ec90 T xe_statchg +ffffffff8232ecc0 T xe_mediachange +ffffffff8232ed50 T xe_mediastatus +ffffffff8232edb0 T xe_init +ffffffff8232ee10 T xe_stop +ffffffff8232ef40 T xe_reset +ffffffff8232f0b0 T xe_pcmcia_lan_nid_ciscallback +ffffffff8232f200 T xe_pcmcia_manfid_ciscallback +ffffffff8232f320 T xe_get +ffffffff8232f5c0 T xe_set_address +ffffffff8232f870 T xe_cycle_power +ffffffff82330000 T wi_pcmcia_match +ffffffff82330130 T wi_pcmcia_attach +ffffffff823303e0 T wi_pcmcia_detach +ffffffff823304a0 T wi_pcmcia_activate +ffffffff82330590 T wi_pcmcia_wakeup +ffffffff82331000 T malo_pcmcia_match +ffffffff82331050 T malo_pcmcia_attach +ffffffff82331220 T malo_pcmcia_detach +ffffffff823312b0 T malo_pcmcia_activate +ffffffff82331520 T cmalo_intr +ffffffff82331780 T cmalo_attach +ffffffff82331c80 T cmalo_detach +ffffffff82331d60 T cmalo_stop +ffffffff82331ea0 T malo_pcmcia_wakeup +ffffffff82331f40 T cmalo_init +ffffffff82332250 T cmalo_intr_mask +ffffffff823322e0 T cmalo_fw_alloc +ffffffff823323b0 T cmalo_fw_load_helper +ffffffff82332620 T cmalo_fw_load_main +ffffffff82332a80 T cmalo_cmd_get_hwspec +ffffffff82332bd0 T cmalo_ioctl +ffffffff82332ff0 T cmalo_start +ffffffff82333090 T cmalo_watchdog +ffffffff823330c0 T cmalo_newstate +ffffffff823333b0 T cmalo_media_change +ffffffff82333410 T cmalo_cmd_set_scan +ffffffff823335e0 T cmalo_fw_free +ffffffff82333660 T cmalo_cmd_set_macctrl +ffffffff823337c0 T cmalo_cmd_set_txpower +ffffffff82333920 T cmalo_cmd_set_antenna +ffffffff82333a80 T cmalo_cmd_set_radio +ffffffff82333be0 T cmalo_cmd_set_channel +ffffffff82333d40 T cmalo_cmd_set_rate +ffffffff82333f60 T cmalo_cmd_set_snmp +ffffffff823340e0 T cmalo_cmd_set_macaddr +ffffffff82334240 T cmalo_wep +ffffffff823342f0 T cmalo_cmd_set_reset +ffffffff823343f0 T cmalo_select_network +ffffffff82334530 T cmalo_cmd_set_auth +ffffffff823345f0 T cmalo_cmd_set_assoc +ffffffff82334950 T cmalo_reflect_network +ffffffff82334a40 T cmalo_tx_done +ffffffff82334b00 T cmalo_rx +ffffffff82334d00 T cmalo_cmd_response +ffffffff82334f30 T cmalo_event +ffffffff82334fa0 T cmalo_tx +ffffffff82335180 T cmalo_cmd_set_wep +ffffffff823353d0 T cmalo_rate2bitmap +ffffffff82335410 T cmalo_hexdump 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tcpcib_wdt_cb +ffffffff8233a000 T aapic_match +ffffffff8233a040 T aapic_attach +ffffffff8233b000 T hme_config +ffffffff8233b4c0 T hme_stop +ffffffff8233b6d0 T hme_start +ffffffff8233b9f0 T hme_ioctl +ffffffff8233bba0 T hme_watchdog +ffffffff8233bc00 t hme_mii_readreg +ffffffff8233bd80 t hme_mii_writereg +ffffffff8233bf00 t hme_mii_statchg +ffffffff8233bfa0 T hme_mediachange +ffffffff8233c090 T hme_mediastatus +ffffffff8233c100 T hme_mifinit +ffffffff8233c1c0 T hme_tick +ffffffff8233c2f0 T hme_unconfig +ffffffff8233c3e0 T hme_fill_rx_ring +ffffffff8233c580 T hme_reset +ffffffff8233c5c0 T hme_init +ffffffff8233cad0 T hme_meminit +ffffffff8233cc30 T hme_iff +ffffffff8233cde0 T hme_tint +ffffffff8233cf30 T hme_rint +ffffffff8233d0f0 T hme_eint +ffffffff8233d190 T hme_intr +ffffffff8233d290 T hme_newbuf +ffffffff8233e000 T hmematch_pci +ffffffff8233e040 T hmeattach_pci +ffffffff8233e300 T hmedetach_pci +ffffffff8233e380 T hme_pci_enaddr +ffffffff8233f000 T isamatch +ffffffff8233f050 T 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vga_isa_attach +ffffffff82348130 T vga_isa_cnattach +ffffffff82349000 T wdc_isa_probe +ffffffff82349130 T wdc_isa_attach +ffffffff82349350 t wdc_isa_dma_init +ffffffff823493c0 t wdc_isa_dma_start +ffffffff823493f0 t wdc_isa_dma_finish +ffffffff8234a000 T mpu_open +ffffffff8234a150 T mpu_close +ffffffff8234a260 T mpu_output +ffffffff8234a370 T mpu_getinfo +ffffffff8234a3b0 T mpu_find +ffffffff8234a500 T mpu_reset +ffffffff8234a610 T mpu_readinput +ffffffff8234a6a0 T mpu_intr +ffffffff8234b000 T mpu_isa_match +ffffffff8234b060 T mpu_isa_attach +ffffffff8234b0f0 T mpu_test +ffffffff8234c000 T pcppi_match +ffffffff8234c1d0 T pcppi_attach +ffffffff8234c2e0 t pcppi_bell_stop +ffffffff8234c370 T pcppi_kbd_bell +ffffffff8234c3a0 T pcppi_bell +ffffffff8234d000 T spkrprobe +ffffffff8234d040 T spkrattach +ffffffff8234d0a0 T spkropen +ffffffff8234d160 T spkrwrite +ffffffff8234d900 T spkrclose +ffffffff8234d980 T spkrioctl +ffffffff8234db40 t rest +ffffffff8234dba0 t playtone +ffffffff8234e000 T lpt_isa_probe +ffffffff8234e430 T lpt_isa_attach +ffffffff8234f000 T wbsio_probe +ffffffff8234f160 T wbsio_attach +ffffffff8234f540 T wbsio_print +ffffffff82350000 T schsio_probe +ffffffff82350120 T schsio_attach +ffffffff82350300 T schsio_activate +ffffffff82350340 T schsio_config_read +ffffffff82350380 T schsio_config_write +ffffffff823503d0 T schsio_wdt_init +ffffffff823504e0 T schsio_hwm_init +ffffffff82350800 T schsio_hwm_update +ffffffff82350d70 T schsio_hwm_read +ffffffff82350dc0 T schsio_wdt_cb +ffffffff82351000 T lm_isa_match +ffffffff823511b0 T lm_isa_attach +ffffffff82351380 T lm_wbsio_match +ffffffff82351540 T lm_isa_writereg +ffffffff823515a0 T lm_isa_readreg +ffffffff82351600 T lm_isa_remove_alias +ffffffff82352000 T it_match +ffffffff823522e0 T it_enter +ffffffff82352370 T it_readreg +ffffffff823523b0 T it_writereg +ffffffff82352400 T it_exit +ffffffff82352450 T it_attach +ffffffff82352a90 T it_wdog_cb +ffffffff82352d10 T it_ec_refresh +ffffffff82353340 T it_ec_writereg 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wskbd_do_open +ffffffff82362c50 T wskbdclose +ffffffff82362d60 T wskbdread +ffffffff82362e20 T wskbdioctl +ffffffff82362ea0 T wskbd_do_ioctl_sc +ffffffff82362f80 T wskbd_displayioctl_sc +ffffffff823637b0 T wskbdkqfilter +ffffffff82363810 T wskbd_pickfree +ffffffff82363880 T wskbd_set_console_display +ffffffff823638d0 T wskbd_add_mux +ffffffff82363950 T update_leds +ffffffff82363a00 T update_modifier +ffffffff82363af0 T change_displayparam +ffffffff82363bb0 T internal_command +ffffffff82363f90 T wskbd_debugger +ffffffff82364000 T wskbd_compose_value +ffffffff823641a0 T ksym_upcase +ffffffff82364220 T fillmapentry +ffffffff823643b0 T wskbd_get_mapentry +ffffffff823645d0 T wskbd_init_keymap +ffffffff82364670 T wskbd_load_keymap +ffffffff82365000 T wsmouse_match +ffffffff82365030 T wsmouse_attach +ffffffff823650d0 T wsmouse_detach +ffffffff823652b0 T wsmouse_activate +ffffffff823652f0 T wsmouse_mux_open +ffffffff823654a0 T wsmouse_mux_close +ffffffff82365500 T wsmousedoioctl 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hidkbd_apple_translate +ffffffff82387680 T hidkbd_apple_munge +ffffffff823877f0 T hidkbd_apple_tb_munge +ffffffff823879e0 T hidkbd_apple_iso_munge +ffffffff82387c30 T hidkbd_apple_mba_munge +ffffffff82387d90 T hidkbd_apple_iso_mba_munge +ffffffff82387fd0 T hidkbd_input +ffffffff823880f0 T hidkbd_decode +ffffffff82388480 T hidkbd_enable +ffffffff823884c0 T hidkbd_set_leds +ffffffff823885a0 T hidkbd_ioctl +ffffffff82388640 T hidkbd_bell +ffffffff82388690 T hidkbd_cngetc +ffffffff82388720 T hidkbd_hookup_bell +ffffffff82389000 T hidms_stylus_hid_parse +ffffffff82389320 T hidms_pad_buttons_hid_parse +ffffffff82389400 T hidms_wacom_setup +ffffffff82389710 T hidms_setup +ffffffff82389cb0 T hidms_attach +ffffffff82389e00 T hidms_detach +ffffffff82389e40 T hidms_input +ffffffff8238a0f0 T hidms_enable +ffffffff8238a140 T hidms_ioctl +ffffffff8238a310 T hidms_disable +ffffffff8238b000 T hidmt_get_resolution +ffffffff8238b110 T hidmt_setup +ffffffff8238b7b0 T hidmt_set_input_mode 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usb_match +ffffffff8238f030 T usb_attach +ffffffff8238f330 T usb_detach +ffffffff8238f3e0 T usb_activate +ffffffff8238f4f0 T usb_create_task_threads +ffffffff8238f590 T usb_explore +ffffffff8238f730 T usb_attach_roothub +ffffffff8238f7d0 T usb_needs_explore +ffffffff8238f820 T usb_detach_roothub +ffffffff8238f910 T usb_wait_task +ffffffff8238f9b0 T usb_abort_task_thread +ffffffff8238faa0 T usb_task_thread +ffffffff8238fbc0 T usb_add_task +ffffffff8238fc80 T usb_rem_task +ffffffff8238fd40 T usb_rem_wait_task +ffffffff8238fe50 T usbctlprint +ffffffff8238fea0 T usbopen +ffffffff8238ff10 T usbclose +ffffffff8238ff40 T usb_fill_udc_task +ffffffff8238ffe0 T usb_fill_udf_task +ffffffff82390050 T usbioctl +ffffffff823906b0 T usb_needs_reattach +ffffffff82390700 T usb_schedsoftintr +ffffffff823907d0 T usb_tap +ffffffff82391000 T usbd_is_dying +ffffffff82391040 T usbd_deactivate +ffffffff82391070 T usbd_ref_incr +ffffffff823910a0 T usbd_ref_decr +ffffffff823910e0 T usbd_ref_wait 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usbd_find_edesc +ffffffff82395e50 T usbd_fill_iface_data +ffffffff823960c0 T usbd_parse_idesc +ffffffff823961f0 T usbd_free_iface_data +ffffffff82396260 T usbd_set_config +ffffffff823962b0 T usbd_set_config_no +ffffffff82396360 T usbd_set_config_index +ffffffff82396840 T usbd_setup_pipe +ffffffff82396930 T usbd_set_address +ffffffff823969f0 T usbd_getnewaddr +ffffffff82396a70 T usbd_probe_and_attach +ffffffff82396fd0 T usbd_print +ffffffff823970e0 T usbd_new_device +ffffffff823978b0 T usbd_reload_device_desc +ffffffff82397920 T usb_free_device +ffffffff82397a70 T usbd_fill_deviceinfo +ffffffff82397e10 T usbd_get_routestring +ffffffff82397ea0 T usbd_get_location +ffffffff82397fb0 T usbd_get_cdesc +ffffffff823980e0 T usbd_detach +ffffffff82399000 T usbd_find_quirk +ffffffff8239a000 T uhub_match +ffffffff8239a060 T uhub_attach +ffffffff8239a510 T uhub_detach +ffffffff8239a640 T uhub_explore +ffffffff8239a8e0 T uhub_intr +ffffffff8239aa40 T uhub_port_connect +ffffffff8239b000 T uaudio_match +ffffffff8239b070 T uaudio_attach +ffffffff8239b1d0 T uaudio_detach +ffffffff8239b380 T uaudio_open +ffffffff8239b480 T uaudio_close +ffffffff8239b4a0 T uaudio_set_params +ffffffff8239b9d0 T uaudio_halt_output +ffffffff8239ba20 T uaudio_halt_input +ffffffff8239ba70 T uaudio_set_port +ffffffff8239bad0 T uaudio_get_port +ffffffff8239bb30 T uaudio_query_devinfo +ffffffff8239bb90 T uaudio_trigger_output +ffffffff8239bc10 T uaudio_trigger_input +ffffffff8239bc90 T uaudio_copy_output +ffffffff8239bce0 T uaudio_underrun +ffffffff8239bd00 T uaudio_set_blksz +ffffffff8239bdc0 T uaudio_sign_expand +ffffffff8239be00 T uaudio_req +ffffffff8239be90 T uaudio_getnum +ffffffff8239bfc0 T uaudio_getdesc +ffffffff8239c040 T uaudio_unit_byid +ffffffff8239c080 T uaudio_tname +ffffffff8239c1f0 T uaudio_clkname +ffffffff8239c230 T uaudio_mkname +ffffffff8239c350 T uaudio_feature_fixup +ffffffff8239c490 T uaudio_ranges_init +ffffffff8239c4d0 T uaudio_ranges_add +ffffffff8239c590 T uaudio_ranges_clear +ffffffff8239c600 T uaudio_ranges_decode +ffffffff8239c690 T uaudio_ranges_encode +ffffffff8239c710 T uaudio_ranges_getrates +ffffffff8239c810 T uaudio_rates_indexof +ffffffff8239c8a0 T uaudio_req_ranges +ffffffff8239cec0 T uaudio_alt_getrates +ffffffff8239cfa0 T uaudio_clock_id +ffffffff8239d020 T uaudio_getrates +ffffffff8239d100 T uaudio_feature_addent +ffffffff8239d2c0 T uaudio_process_srcs +ffffffff8239d3a0 T uaudio_process_unit +ffffffff8239dfa0 T uaudio_process_nch +ffffffff8239e050 T uaudio_unit_getdesc +ffffffff8239e110 T uaudio_setname_dsts +ffffffff8239e1c0 T uaudio_setname_srcs +ffffffff8239e270 T uaudio_setname_middle +ffffffff8239e330 T uaudio_mixer_nchan +ffffffff8239e3b0 T uaudio_mixer_skip +ffffffff8239e420 T uaudio_mixer_byindex +ffffffff8239e540 T uaudio_process_header +ffffffff8239e5f0 T uaudio_process_ac_ep +ffffffff8239e6d0 T uaudio_process_ac +ffffffff8239eff0 T uaudio_process_as_ep +ffffffff8239f160 T uaudio_process_as_general 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acpisony_notify_setup +ffffffff824f8310 T acpisony_notify +ffffffff824f86b0 T acpisony_find_offset +ffffffff824f87c0 T acpisony_set_hotkey +ffffffff824f89b0 T acpisony_brightness_down +ffffffff824f8ac0 T acpisony_get_brightness +ffffffff824f8b40 T acpisony_set_brightness +ffffffff824f9000 T acpivideo_match +ffffffff824f9070 T acpivideo_attach +ffffffff824f91d0 T acpivideo_getpcibus +ffffffff824f9210 T acpivideo_notify +ffffffff824f9270 T acpivideo_set_policy +ffffffff824f9340 T acpi_foundvout +ffffffff824f9410 T acpivideo_print +ffffffff824fa000 T acpivout_match +ffffffff824fa070 T acpivout_attach +ffffffff824fa1c0 T acpivout_notify +ffffffff824fa270 T acpivout_get_bcl +ffffffff824fa390 T acpivout_get_brightness +ffffffff824fa430 T acpivout_get_param +ffffffff824fa4d0 T acpivout_set_param +ffffffff824fa630 T acpivout_select_brightness +ffffffff824fa700 T acpivout_find_brightness +ffffffff824fa790 T acpivout_set_brightness +ffffffff824fb000 T acpipwrres_match +ffffffff824fb070 T acpipwrres_attach +ffffffff824fb2b0 T acpipwrres_foundcons +ffffffff824fb440 T acpipwrres_ref_incr +ffffffff824fb4d0 T acpipwrres_hascons +ffffffff824fb520 T acpipwrres_ref_decr +ffffffff824fb5b0 T acpipwrres_addcons +ffffffff824fc000 T aibs_match +ffffffff824fc030 T aibs_attach +ffffffff824fc140 T aibs_probe +ffffffff824fc2a0 T aibs_attach_new +ffffffff824fc3c0 T aibs_attach_sif +ffffffff824fc590 T aibs_notify +ffffffff824fc600 T aibs_add_sensor +ffffffff824fc850 T aibs_getpack +ffffffff824fc8d0 T aibs_refresh +ffffffff824fc930 T aibs_refresh_r +ffffffff824fca70 T aibs_getvalue +ffffffff824fcbc0 T aibs_find_cb +ffffffff824fd000 T aplgpio_match +ffffffff824fd060 T aplgpio_attach +ffffffff824fd310 T aplgpio_intr +ffffffff824fd460 T aplgpio_read_pin +ffffffff824fd4b0 T aplgpio_write_pin +ffffffff824fd520 T aplgpio_intr_establish +ffffffff824fd640 T aplgpio_intr_enable +ffffffff824fd6d0 T aplgpio_intr_disable +ffffffff824fe000 T bytgpio_match +ffffffff824fe060 T bytgpio_attach +ffffffff824fe320 T bytgpio_intr +ffffffff824fe450 T bytgpio_read_pin +ffffffff824fe4b0 T bytgpio_write_pin +ffffffff824fe530 T bytgpio_intr_establish +ffffffff824fe5a0 T bytgpio_intr_enable +ffffffff824fe690 T bytgpio_intr_disable +ffffffff824ff000 T chvgpio_match +ffffffff824ff060 T chvgpio_attach +ffffffff824ff300 T chvgpio_intr +ffffffff824ff3d0 T chvgpio_read_pin +ffffffff824ff480 T chvgpio_write_pin +ffffffff824ff540 T chvgpio_intr_establish +ffffffff824ff710 T chvgpio_intr_enable +ffffffff824ff7e0 T chvgpio_intr_disable +ffffffff824ff8b0 T chvgpio_opreg_handler +ffffffff824ff930 T chvgpio_check_pin +ffffffff82500000 T glkgpio_match +ffffffff82500060 T glkgpio_attach +ffffffff82500310 T glkgpio_intr +ffffffff82500460 T glkgpio_read_pin +ffffffff825004c0 T glkgpio_write_pin +ffffffff82500530 T glkgpio_intr_establish +ffffffff82500650 T glkgpio_intr_enable +ffffffff825006e0 T glkgpio_intr_disable +ffffffff82501000 T pchgpio_match +ffffffff82501060 T pchgpio_attach +ffffffff82501530 T pchgpio_activate +ffffffff825015e0 T pchgpio_intr +ffffffff82501800 T pchgpio_read_pin +ffffffff825018f0 T pchgpio_write_pin +ffffffff82501a00 T pchgpio_intr_establish +ffffffff82501c20 T pchgpio_intr_enable +ffffffff82501d50 T pchgpio_intr_disable +ffffffff82501e80 T pchgpio_save +ffffffff82501ef0 T pchgpio_restore +ffffffff82501f60 T pchgpio_find_group +ffffffff82501fe0 T pchgpio_intr_handle +ffffffff825020c0 T pchgpio_save_pin +ffffffff82502280 T pchgpio_restore_pin +ffffffff82503000 T tipmic_match +ffffffff82503050 T tipmic_attach +ffffffff82503250 T tipmic_write_1 +ffffffff82503310 T tipmic_intr +ffffffff82503470 T tipmic_get_lpat +ffffffff82503580 T tipmic_read_pin +ffffffff825035b0 T tipmic_write_pin +ffffffff825035e0 T tipmic_thermal_opreg_handler +ffffffff82503e60 T tipmic_power_opreg_handler +ffffffff82504100 T tipmic_read_1 +ffffffff825041d0 T tipmic_raw_to_temp +ffffffff82505000 T ccpmic_match +ffffffff82505050 T ccpmic_attach +ffffffff82505130 T ccpmic_get_lpat +ffffffff82505240 T ccpmic_read_pin +ffffffff825053c0 T ccpmic_write_pin +ffffffff82505520 T ccpmic_thermal_opreg_handler +ffffffff82505770 T ccpmic_power_opreg_handler +ffffffff82505960 T ccpmic_read_1 +ffffffff82505a30 T ccpmic_write_1 +ffffffff82505af0 T ccpmic_raw_to_temp +ffffffff82506000 T com_acpi_match +ffffffff82506120 T com_acpi_attach +ffffffff825063a0 T com_acpi_is_designware +ffffffff82506400 T com_acpi_intr_designware +ffffffff82506430 T com_acpi_is_console +ffffffff82507000 T sdhc_acpi_match +ffffffff82507060 T sdhc_acpi_attach +ffffffff82507370 T sdhc_acpi_parse_resources +ffffffff82507420 T sdhc_acpi_card_detect_gpio +ffffffff82507480 T sdhc_acpi_card_detect_intr +ffffffff825074c0 T sdhc_acpi_power_on +ffffffff82507540 T sdhc_acpi_explore +ffffffff82507570 T sdhc_acpi_card_detect_nonremovable +ffffffff825075a0 T sdhc_acpi_do_explore +ffffffff82508000 T dwiic_acpi_match +ffffffff82508050 T dwiic_acpi_attach +ffffffff82508410 T dwiic_acpi_parse_crs +ffffffff82508560 T dwiic_acpi_power +ffffffff82508670 T dwiic_acpi_get_params +ffffffff825087b0 T dwiic_i2c_intr_establish +ffffffff82508830 T dwiic_i2c_intr_disestablish +ffffffff82508850 T dwiic_i2c_intr_string +ffffffff825088e0 T dwiic_acpi_acquire_bus +ffffffff82508930 T dwiic_acpi_release_bus +ffffffff82508960 T dwiic_acpi_bus_scan +ffffffff825089a0 T dwiic_acpi_found_hid +ffffffff82508d00 T dwiic_matchhids +ffffffff82508d90 T dwiic_acpi_found_ihidev +ffffffff82509000 T dwiic_acpi_found_iatp +ffffffff82509160 T dwiic_acpi_found_ietp +ffffffff8250a000 T acpicbkbd_match +ffffffff8250a030 T acpicbkbd_attach +ffffffff8250a0d0 T acpicbkbd_activate +ffffffff8250a120 T acpicbkbd_get_backlight +ffffffff8250a1a0 T acpicbkbd_set_backlight +ffffffff8250a240 T acpicbkbd_write_backlight +ffffffff8250b000 T acpials_match +ffffffff8250b090 T acpials_attach +ffffffff8250b230 T acpials_read +ffffffff8250b2b0 T acpials_addtask +ffffffff8250b2f0 T acpials_notify +ffffffff8250b380 T acpials_update +ffffffff8250c000 T tpm_match +ffffffff8250c050 T tpm_attach +ffffffff8250c320 T tpm_activate +ffffffff8250c430 T tpm2_start_method +ffffffff8250c4b0 T tpm_probe +ffffffff8250c560 T tpm_init_tis +ffffffff8250c7d0 T tpm_init_crb +ffffffff8250cb10 T tpm_suspend +ffffffff8250cc00 T tpm_resume +ffffffff8250cc30 T tpm_write_tis +ffffffff8250cfc0 T tpm_read_tis +ffffffff8250d190 T tpm_write_crb +ffffffff8250d570 T tpm_read_crb +ffffffff8250d870 T tpm_request_locality_tis +ffffffff8250d960 T tpm_request_locality_crb +ffffffff8250da60 T tpm_release_locality_crb +ffffffff8250dab0 T tpm_release_locality_tis +ffffffff8250db20 T tpm_getburst +ffffffff8250dbd0 T tpm_status +ffffffff8250dbf0 T tpm_waitfor +ffffffff8250dcd0 T tpm_waitfor_status +ffffffff8250e000 T acpihve_match +ffffffff8250e0b0 T acpihve_attach +ffffffff8250f000 T acpisbs_match +ffffffff8250f030 T acpisbs_attach +ffffffff8250f2b0 T acpisbs_activate +ffffffff8250f390 T acpisbs_read +ffffffff8250f450 T acpisbs_setup_sensors +ffffffff8250f550 T acpisbs_refresh_sensors +ffffffff8250f6a0 T acpisbs_notify +ffffffff8250f7e0 T acpi_smbus_read +ffffffff82510000 T surface_match +ffffffff82510060 T surface_attach +ffffffff825100c0 T surface_hotkey +ffffffff82511000 T ipmi_acpi_match +ffffffff82511030 T ipmi_acpi_attach +ffffffff82511260 T ipmi_acpi_parse_crs +ffffffff82512000 T amdgpio_match +ffffffff82512060 T amdgpio_attach +ffffffff825122a0 T amdgpio_activate +ffffffff82512390 T amdgpio_intr +ffffffff82512530 T amdgpio_read_pin +ffffffff82512580 T amdgpio_write_pin +ffffffff825125f0 T amdgpio_intr_establish +ffffffff825126e0 T amdgpio_intr_enable +ffffffff82512760 T amdgpio_intr_disable +ffffffff825127e0 T amdgpio_save +ffffffff82512860 T amdgpio_restore +ffffffff825128f0 T amdgpio_save_pin +ffffffff82512960 T amdgpio_restore_pin +ffffffff825129d0 T amdgpio_pin_intr +ffffffff82513000 T acpihid_match +ffffffff82513030 T acpihid_attach +ffffffff82513210 T acpihid_init_dsm +ffffffff82513370 T acpihid_eval +ffffffff82513590 T acpihid_notify +ffffffff825135f0 T acpihid_button_array_enable +ffffffff82514000 t iosf_acpi_match +ffffffff82514050 t iosf_acpi_attach +ffffffff82514150 t iosf_acpi_mbi_mdr_rd +ffffffff825141c0 t iosf_acpi_mbi_mdr_wr +ffffffff82515000 T acpi_match +ffffffff82515060 T acpi_attach +ffffffff825150a0 T acpi_probe +ffffffff82515240 T acpi_map +ffffffff82515330 T acpi_unmap +ffffffff82515380 T acpi_bus_space_map +ffffffff825153a0 T acpi_bus_space_unmap +ffffffff825153c0 T acpi_intr_establish +ffffffff82515500 T acpi_intr_disestablish +ffffffff82515510 T acpi_scan +ffffffff825156b0 T acpi_acquire_glk +ffffffff82515710 T acpi_release_glk +ffffffff82515760 T acpi_attach_machdep +ffffffff825158f0 T acpi_sleep_cpu +ffffffff82515a90 T acpi_resume_cpu +ffffffff82515b90 T sleep_mp +ffffffff82515c80 T resume_mp +ffffffff82515d70 T acpi_iommu_device_map +ffffffff82516000 T hibernate_resume_machdep +ffffffff82516050 T hibernate_drop_to_real_mode +ffffffff82516060 T hibernate_activate_resume_pt_machdep +ffffffff825160a0 T hibernate_switch_stack_machdep +ffffffff825160e0 T hibernate_flush +ffffffff82516110 T acpi_savecpu +ffffffff82517000 T sleep_showstate +ffffffff825170f0 T sleep_setstate +ffffffff82517150 T gosleep +ffffffff82517210 T sleep_abort +ffffffff82517240 T sleep_resume +ffffffff825172b0 T suspend_finish +ffffffff82518000 T acpiopen +ffffffff825180d0 T acpiclose +ffffffff82518160 T acpiioctl +ffffffff825182b0 T request_sleep +ffffffff82518330 T acpi_filtdetach +ffffffff82518380 T acpi_filtread +ffffffff825183c0 T acpikqfilter +ffffffff82519000 T acpipci_match +ffffffff82519030 T acpipci_attach +ffffffff825192f0 T acpipci_osc +ffffffff82519430 T acpipci_parse_resources +ffffffff82519560 T acpipci_attach_bus +ffffffff82519730 T acpipci_print +ffffffff825197a0 T acpipci_attach_busses +ffffffff8251a000 T efiopen +ffffffff8251a040 T eficlose +ffffffff8251a070 T efiioctl +ffffffff8251a110 T efiioc_get_table +ffffffff8251a280 T efiioc_var_get +ffffffff8251a500 T efiioc_var_next +ffffffff8251a720 T efiioc_var_set +ffffffff8251a8a0 T efi_adapt_error +ffffffff8251b000 T efi_match +ffffffff8251b060 T efi_attach +ffffffff8251b330 T efi_map_runtime +ffffffff8251b4b0 T efi_enter +ffffffff8251b550 T efi_leave +ffffffff8251b5d0 T efi_fault +ffffffff8251c000 T vmm_probe +ffffffff8251c050 T vmm_attach +ffffffff8251c170 T vmm_activate +ffffffff8251c2b0 T vmmopen +ffffffff8251c300 T vmmclose +ffffffff8251c330 T vm_find +ffffffff8251c450 T vmmioctl +ffffffff8251c6d0 T vm_create +ffffffff8251c9a0 T vm_get_info +ffffffff8251cbf0 T vm_terminate +ffffffff8251cd60 T vm_resetcpu +ffffffff8251ce80 T vm_share_mem +ffffffff8251cfd0 T pledge_ioctl_vmm +ffffffff8251d0c0 T vm_find_vcpu +ffffffff8251d120 T vm_create_check_mem_ranges +ffffffff8251d2e0 T vm_teardown +ffffffff8251d420 T vcpu_must_stop +ffffffff8251e000 T vmm_enabled +ffffffff8251e080 T vmm_attach_machdep +ffffffff8251e230 T vmm_quiesce_vmx +ffffffff8251e400 T vmm_activate_machdep +ffffffff8251e520 T vmm_stop +ffffffff8251e650 T vmm_start +ffffffff8251e730 T vmmioctl_machdep +ffffffff8251e800 T vm_intr_pending +ffffffff8251e8a0 T vm_mprotect_ept +ffffffff8251eb20 T pledge_ioctl_vmm_machdep +ffffffff8251eb70 T vm_rwvmparams +ffffffff8251ed00 T vmm_init_pvclock +ffffffff8251edd0 T vm_rwregs +ffffffff8251eee0 T vcpu_readregs_vmx +ffffffff8251f310 T vcpu_writeregs_vmx +ffffffff8251f780 T vcpu_readregs_svm +ffffffff8251fc30 T vcpu_writeregs_svm +ffffffff82520100 T vmm_get_guest_memtype +ffffffff82520180 T vmx_mprotect_ept +ffffffff825203e0 T vmx_pmap_find_pte_ept +ffffffff825204b0 T start_vmm_on_cpu +ffffffff825205d0 T stop_vmm_on_cpu +ffffffff82520670 T vmclear_on_cpu +ffffffff825206f0 T vm_impl_init_vmx +ffffffff82520800 T vm_impl_init_svm +ffffffff82520910 T vm_impl_init +ffffffff825209b0 T vm_impl_deinit +ffffffff825209e0 T vcpu_reload_vmcs_vmx +ffffffff82520b20 T vcpu_reset_regs_svm +ffffffff82520eb0 T svm_setmsrbrw +ffffffff82520fc0 T svm_setmsrbr +ffffffff82521090 T vmm_alloc_vpid +ffffffff825211a0 T svm_setmsrbw +ffffffff82521280 T vmx_setmsrbr +ffffffff82521330 T vmx_setmsrbw +ffffffff825213e0 T vmx_setmsrbrw +ffffffff825214f0 T svm_set_clean +ffffffff82521540 T svm_set_dirty +ffffffff82521590 T vcpu_reset_regs_vmx +ffffffff82521fd0 T vcpu_vmx_check_cap +ffffffff825220d0 T vcpu_vmx_compute_ctrl +ffffffff825222b0 T vcpu_init_vmx +ffffffff82522650 T vcpu_deinit_vmx +ffffffff825227d0 T vcpu_reset_regs +ffffffff82522810 T vcpu_init_svm +ffffffff825229a0 T vcpu_deinit_svm +ffffffff82522ae0 T vcpu_init +ffffffff82522ba0 T vmm_free_vpid +ffffffff82522c10 T vcpu_deinit +ffffffff82522c50 T vm_run +ffffffff82522e10 T vcpu_run_vmx +ffffffff825235d0 T vcpu_run_svm +ffffffff82523bb0 T vmm_fpurestore +ffffffff82523c70 T vmm_fpusave +ffffffff82523cf0 T vmm_translate_gva +ffffffff82524000 T vmm_update_pvclock +ffffffff82524100 T vmx_get_exit_info +ffffffff82524160 T vmx_handle_exit +ffffffff82524590 T vmx_instruction_error_decode +ffffffff82524760 T vmm_get_guest_cpu_cpl +ffffffff82524850 T vmx_handle_intr +ffffffff825248e0 T svm_handle_hlt +ffffffff82524930 T vmx_handle_hlt +ffffffff825249e0 T svm_handle_exit +ffffffff82524d00 T svm_handle_np_fault +ffffffff82524ea0 T vmm_handle_cpuid +ffffffff82525540 T svm_handle_msr +ffffffff82525810 T svm_handle_xsetbv +ffffffff825258b0 T svm_handle_inout +ffffffff825259e0 T vmm_inject_ud +ffffffff82525a10 T vmm_inject_db +ffffffff82525a40 T vmx_handle_np_fault +ffffffff82525ba0 T vmx_handle_inout +ffffffff82525d40 T vmx_handle_cr +ffffffff82525f40 T vmx_handle_rdmsr +ffffffff82526010 T vmx_handle_wrmsr +ffffffff82526280 T vmx_handle_xsetbv +ffffffff82526350 T vmm_inject_gp +ffffffff82526380 T vmx_get_exit_qualification +ffffffff825263e0 T vmx_get_guest_faulttype +ffffffff82526480 T svm_get_guest_faulttype +ffffffff825264b0 T svm_fault_page +ffffffff82526540 T vmx_fault_page +ffffffff82526690 T vmm_get_guest_cpu_mode +ffffffff82526790 T vmx_load_pdptes +ffffffff82526a10 T vmx_handle_cr0_write +ffffffff82526c20 T vmx_handle_cr4_write +ffffffff82526cc0 T vmm_handle_xsetbv +ffffffff82526d50 T vmx_handle_misc_enable_msr +ffffffff82526db0 T vmm_pat_is_valid +ffffffff82526e90 T vmm_gpa_is_valid +ffffffff82526f00 T vmx_exit_reason_decode +ffffffff82526f40 T svm_exit_reason_decode +ffffffff82527d50 T vcpu_state_decode +ffffffff82528000 T vmm_dispatch_intr +ffffffff82528020 T vmxon +ffffffff82528050 T vmxoff +ffffffff82528080 T vmclear +ffffffff825280b0 T vmptrld +ffffffff825280e0 T vmptrst +ffffffff82528110 T vmwrite +ffffffff82528140 T vmread +ffffffff82528170 T invvpid +ffffffff8252818b t invvpid_fail +ffffffff82528192 t invvpid_ret +ffffffff825281b0 T invept +ffffffff825281cb t invept_fail +ffffffff825281d2 t invept_ret +ffffffff825281f0 T vmx_enter_guest +ffffffff8252821b t skip_init +ffffffff825282e8 t no_l1df_msr +ffffffff825282eb t l1df_tlb_loop +ffffffff82528304 t l1df_tlb_done +ffffffff8252830c t l1df_load_cache +ffffffff82528323 t done_flush +ffffffff825283b6 t do_resume +ffffffff8252843b t fail_launch_or_resume +ffffffff8252847d t fail_launch_unknown +ffffffff8252848a t fail_launch_invalid_vmcs +ffffffff82528497 t fail_launch_valid_vmcs +ffffffff825284b4 t vmx_exit_handler_asm +ffffffff82528579 t restore_host +ffffffff82528610 T svm_enter_guest +ffffffff825287a0 t restore_host_svm +ffffffff82529000 T sdmmc_match +ffffffff82529050 T sdmmc_attach +ffffffff82529390 T sdmmc_detach +ffffffff82529440 T sdmmc_activate +ffffffff82529510 T sdmmc_discover_task +ffffffff825295d0 T sdmmc_create_thread +ffffffff82529640 T sdmmc_holds_root_device +ffffffff825296a0 T sdmmc_task_thread +ffffffff82529890 T sdmmc_needs_discover +ffffffff82529940 T sdmmc_del_task +ffffffff825299f0 T sdmmc_card_detach +ffffffff82529ad0 T sdmmc_add_task +ffffffff82529b50 T sdmmc_card_attach +ffffffff82529c60 T sdmmc_enable +ffffffff82529db0 T sdmmc_scan +ffffffff82529e40 T sdmmc_init +ffffffff82529f40 T sdmmc_disable +ffffffff8252a0a0 T sdmmc_function_free +ffffffff8252a0c0 T sdmmc_delay +ffffffff8252a110 T sdmmc_select_card +ffffffff8252a330 T sdmmc_set_bus_power +ffffffff8252a4e0 T sdmmc_function_alloc +ffffffff8252a570 T sdmmc_app_command +ffffffff8252a700 T sdmmc_mmc_command +ffffffff8252a780 T sdmmc_go_idle_state +ffffffff8252a890 T sdmmc_send_if_cond +ffffffff8252a9e0 T sdmmc_set_relative_addr +ffffffff8252b000 T sdmmc_cisptr +ffffffff8252b0a0 T sdmmc_read_cis +ffffffff8252b3e0 T sdmmc_print_cis +ffffffff8252b550 T sdmmc_check_cis_quirks +ffffffff8252c000 T sdmmc_io_enable +ffffffff8252c2a0 T sdmmc_io_reset +ffffffff8252c3d0 T sdmmc_io_send_op_cond +ffffffff8252c540 T sdmmc_io_scan +ffffffff8252c690 T sdmmc_io_init +ffffffff8252c7c0 T sdmmc_io_set_highspeed +ffffffff8252ca60 T sdmmc_io_set_bus_width +ffffffff8252ccf0 T sdmmc_io_function_ready +ffffffff8252ce70 T sdmmc_io_read_1 +ffffffff8252cfc0 T sdmmc_io_function_enable +ffffffff8252d390 T sdmmc_io_write_1 +ffffffff8252d510 T sdmmc_io_function_disable +ffffffff8252d790 T sdmmc_io_attach +ffffffff8252d880 T sdmmc_print +ffffffff8252dad0 T sdmmc_submatch +ffffffff8252db50 T sdmmc_io_detach +ffffffff8252dc00 T sdmmc_io_rw_direct +ffffffff8252dda0 T sdmmc_io_rw_extended_subr +ffffffff8252df40 T sdmmc_io_rw_extended +ffffffff8252e340 T sdmmc_io_read_2 +ffffffff8252e4a0 T sdmmc_io_write_2 +ffffffff8252e600 T sdmmc_io_read_4 +ffffffff8252e760 T sdmmc_io_write_4 +ffffffff8252e8c0 T sdmmc_io_read_multi_1 +ffffffff8252e9b0 T sdmmc_io_write_multi_1 +ffffffff8252eaa0 T sdmmc_io_read_region_1 +ffffffff8252eb90 T sdmmc_io_write_region_1 +ffffffff8252ec80 T sdmmc_io_xchg +ffffffff8252ee10 T sdmmc_intr_enable +ffffffff8252f080 T sdmmc_intr_disable +ffffffff8252f2f0 T sdmmc_intr_establish +ffffffff8252f3f0 T sdmmc_intr_disestablish +ffffffff8252f4e0 T sdmmc_card_intr +ffffffff8252f530 T sdmmc_intr_task +ffffffff8252f5c0 T sdmmc_io_set_blocklen +ffffffff82530000 T sdmmc_mem_enable +ffffffff82530450 T sdmmc_mem_send_op_cond +ffffffff82530600 T sdmmc_mem_signal_voltage +ffffffff825306c0 T sdmmc_mem_scan +ffffffff825309d0 T sdmmc_decode_csd +ffffffff82530e00 T sdmmc_decode_cid +ffffffff825312a0 T sdmmc_mem_send_scr +ffffffff825313e0 T sdmmc_mem_decode_scr +ffffffff82531440 T sdmmc_mem_send_cxd_data +ffffffff825315b0 T sdmmc_mem_set_bus_width +ffffffff825316c0 T sdmmc_mem_sd_switch +ffffffff82531970 T sdmmc_be512_to_bitfield512 +ffffffff82531a20 T sdmmc_mem_mmc_switch +ffffffff82531b10 T sdmmc_mem_init +ffffffff82531c60 T sdmmc_mem_set_blocklen +ffffffff82531d60 T sdmmc_mem_sd_init +ffffffff82532140 T sdmmc_mem_mmc_init +ffffffff82532800 T sdmmc_mem_select_transfer_mode +ffffffff82532880 T sdmmc_mem_execute_tuning +ffffffff82532910 T sdmmc_mem_read_block_subr +ffffffff82532c70 T sdmmc_mem_single_read_block +ffffffff82532d40 T sdmmc_mem_read_block +ffffffff82532ef0 T sdmmc_mem_write_block_subr +ffffffff82533240 T sdmmc_mem_single_write_block +ffffffff82533310 T sdmmc_mem_write_block +ffffffff825334c0 T sdmmc_mem_hibernate_write +ffffffff82534000 T sdmmc_scsi_cmd +ffffffff825341f0 T sdmmc_minphys +ffffffff82534270 T sdmmc_scsi_attach +ffffffff82534460 T sdmmc_alloc_ccbs +ffffffff825345a0 T sdmmc_free_ccbs +ffffffff82534600 T sdmmc_scsi_detach +ffffffff82534760 T sdmmc_stimeout +ffffffff825347e0 T sdmmc_ccb_alloc +ffffffff82534890 T sdmmc_ccb_free +ffffffff82534970 T sdmmc_inquiry +ffffffff82534be0 T sdmmc_start_xs +ffffffff82534cd0 T sdmmc_complete_xs +ffffffff82534da0 T sdmmc_done_xs +ffffffff82534df0 T sdmmc_scsi_hibernate_io +ffffffff82535000 T bwfm_sdio_preinit +ffffffff825354a0 T bwfm_sdio_txcheck +ffffffff825354e0 T bwfm_sdio_txdata +ffffffff82535550 T bwfm_sdio_txctl +ffffffff825356a0 T bwfm_sdio_buscore_read +ffffffff825356b0 T bwfm_sdio_buscore_write +ffffffff825356d0 T bwfm_sdio_buscore_prepare +ffffffff82535810 T bwfm_sdio_buscore_activate +ffffffff82535890 T bwfm_sdio_match +ffffffff82535940 T bwfm_sdio_attach +ffffffff82535c00 T bwfm_sdio_detach +ffffffff82535c60 T bwfm_sdio_task +ffffffff82535dc0 T bwfm_sdio_write_1 +ffffffff82535df0 T bwfm_sdio_read_1 +ffffffff82535e20 T bwfm_sdio_write_4 +ffffffff82535ed0 T bwfm_sdio_read_4 +ffffffff82535f80 T bwfm_sdio_load_microcode +ffffffff825361e0 T bwfm_sdio_clkctl +ffffffff82536310 T bwfm_sdio_dev_write +ffffffff82536360 T bwfm_sdio_intr +ffffffff825363a0 T bwfm_sdio_ram_read_write +ffffffff825365d0 T bwfm_sdio_htclk +ffffffff82536840 T bwfm_sdio_readshared +ffffffff82536910 T bwfm_sdio_dev_read +ffffffff82536950 T bwfm_sdio_rx_frames +ffffffff82536d00 T bwfm_sdio_tx_frames +ffffffff82536e00 T bwfm_sdio_backplane +ffffffff82536eb0 T bwfm_sdio_buf_read +ffffffff82536f90 T bwfm_sdio_buf_write +ffffffff82537040 T bwfm_sdio_frame_read_write +ffffffff825371c0 T bwfm_sdio_newbuf +ffffffff82537240 T bwfm_sdio_tx_ok +ffffffff825372a0 T bwfm_sdio_tx_ctrlframe +ffffffff825373a0 T bwfm_sdio_tx_dataframe +ffffffff825374f0 T bwfm_sdio_rx_glom +ffffffff82538000 T onewire_match +ffffffff82538050 T onewire_attach +ffffffff825380f0 T onewire_detach +ffffffff82538160 T onewire_activate +ffffffff82538180 T onewire_scan +ffffffff825383a0 T onewire_createthread +ffffffff82538410 T onewire_print +ffffffff825384e0 T onewirebus_print +ffffffff82538530 T onewire_lock +ffffffff82538550 T onewire_unlock +ffffffff82538570 T onewire_reset +ffffffff82538590 T onewire_bit +ffffffff825385b0 T onewire_read_byte +ffffffff825386f0 T onewire_write_byte +ffffffff825387d0 T onewire_read_block +ffffffff82538870 T onewire_write_block +ffffffff82538910 T onewire_triplet +ffffffff825389f0 T onewire_matchrom +ffffffff82538b40 T onewire_search +ffffffff82538ee0 T onewire_thread +ffffffff82539000 T onewire_crc +ffffffff825390b0 T onewire_crc16 +ffffffff82539170 T onewire_famname +ffffffff825391b0 T onewire_matchbyfam +ffffffff8253a000 T owid_match +ffffffff8253a030 T owid_attach +ffffffff8253a100 T owid_detach +ffffffff8253a140 T owid_activate +ffffffff8253b000 T owsbm_match +ffffffff8253b030 T owsbm_attach +ffffffff8253b1d0 T owsbm_detach +ffffffff8253b240 T owsbm_activate +ffffffff8253b270 T owsbm_update +ffffffff8253c000 T owtemp_match +ffffffff8253c030 T owtemp_attach +ffffffff8253c130 T owtemp_detach +ffffffff8253c1a0 T owtemp_activate +ffffffff8253c1d0 T owtemp_update +ffffffff8253d000 T owctr_match +ffffffff8253d030 T owctr_attach +ffffffff8253d180 T owctr_detach +ffffffff8253d1f0 T owctr_activate +ffffffff8253d220 T owctr_update +ffffffff8253d250 T owctr_update_counter +ffffffff8253e000 A __text_page_start +ffffffff8253e000 T Xsyscall_meltdown +ffffffff8253e00c T Xsyscall +ffffffff8253e26e t Xsyscall_trampback +ffffffff8253e280 T intr_user_exit +ffffffff8253e2c2 t intr_user_exit_post_ast +ffffffff8253e3ee t Xiretq_trampback +ffffffff8253e3fa T doreti_iret +ffffffff8253f000 T alltraps +ffffffff8253f138 T recall_trap +ffffffff8253f150 T alltraps_kern +ffffffff8253f153 T alltraps_kern_meltdown +ffffffff82540000 ? Xsyscall32 +ffffffff82540000 A __kutext_start +ffffffff82540000 A __text_page_end +ffffffff82541000 ? Xtrap00 +ffffffff82541010 ? Xtrap01 +ffffffff82541020 ? Xtrap02 +ffffffff82541028 c calltrap_specstk +ffffffff825410f0 ? calltrap_specstk_tramp +ffffffff82541110 ? Xtrap03 +ffffffff82541120 ? Xtrap04 +ffffffff82541130 ? Xtrap05 +ffffffff82541140 ? Xtrap06 +ffffffff82541150 ? Xtrap07 +ffffffff82541160 ? Xtrap08 +ffffffff82541170 ? Xtrap09 +ffffffff82541180 ? Xtrap0a +ffffffff82541190 ? Xtrap0b +ffffffff825411a0 ? Xtrap0c +ffffffff825411b0 ? Xtrap0d +ffffffff82541240 ? Xtrap0e +ffffffff82541250 ? Xintrspurious +ffffffff82541250 ? Xtrap0f +ffffffff82541260 ? Xtrap10 +ffffffff82541270 ? Xtrap11 +ffffffff82541280 ? Xtrap12 +ffffffff82541290 ? Xtrap13 +ffffffff825412a0 ? Xtrap14 +ffffffff825412b0 ? Xtrap15 +ffffffff825412c0 ? Xtrap16 +ffffffff825412c0 ? Xtrap17 +ffffffff825412c0 ? Xtrap18 +ffffffff825412c0 ? Xtrap19 +ffffffff825412c0 ? Xtrap1a +ffffffff825412c0 ? Xtrap1b +ffffffff825412c0 ? Xtrap1c +ffffffff825412c0 ? Xtrap1d +ffffffff825412c0 ? Xtrap1e +ffffffff825412c0 ? Xtrap1f +ffffffff825412d0 ? x2apic_eoi +ffffffff825412f0 ? Xintr_lapic_ipi +ffffffff82541330 ? Xipi_invltlb +ffffffff82541360 ? Xipi_invlpg +ffffffff82541390 ? Xipi_invlrange +ffffffff825413d0 ? Xipi_invltlb_pcid +ffffffff82541410 ? Xipi_invlpg_pcid +ffffffff82541460 ? Xipi_invlrange_pcid +ffffffff825414d0 ? Xintr_lapic_ltimer +ffffffff82541510 ? Xintr_xen_upcall +ffffffff82541550 ? Xintr_hyperv_upcall +ffffffff82541590 ? Xintr_legacy0 +ffffffff825415d0 ? Xintr_legacy1 +ffffffff82541610 ? Xintr_legacy2 +ffffffff82541650 ? Xintr_legacy3 +ffffffff82541690 ? Xintr_legacy4 +ffffffff825416d0 ? Xintr_legacy5 +ffffffff82541710 ? Xintr_legacy6 +ffffffff82541750 ? Xintr_legacy7 +ffffffff82541790 ? Xintr_legacy8 +ffffffff825417d0 ? Xintr_legacy9 +ffffffff82541810 ? Xintr_legacy10 +ffffffff82541850 ? Xintr_legacy11 +ffffffff82541890 ? Xintr_legacy12 +ffffffff825418d0 ? Xintr_legacy13 +ffffffff82541910 ? Xintr_legacy14 +ffffffff82541950 ? Xintr_legacy15 +ffffffff82541990 ? Xintr_ioapic_edge0 +ffffffff825419d0 ? Xintr_ioapic_edge1 +ffffffff82541a10 ? Xintr_ioapic_edge2 +ffffffff82541a50 ? Xintr_ioapic_edge3 +ffffffff82541a90 ? Xintr_ioapic_edge4 +ffffffff82541ad0 ? Xintr_ioapic_edge5 +ffffffff82541b10 ? Xintr_ioapic_edge6 +ffffffff82541b50 ? Xintr_ioapic_edge7 +ffffffff82541b90 ? Xintr_ioapic_edge8 +ffffffff82541bd0 ? Xintr_ioapic_edge9 +ffffffff82541c10 ? Xintr_ioapic_edge10 +ffffffff82541c50 ? Xintr_ioapic_edge11 +ffffffff82541c90 ? Xintr_ioapic_edge12 +ffffffff82541cd0 ? Xintr_ioapic_edge13 +ffffffff82541d10 ? Xintr_ioapic_edge14 +ffffffff82541d50 ? Xintr_ioapic_edge15 +ffffffff82541d90 ? Xintr_ioapic_edge16 +ffffffff82541dd0 ? Xintr_ioapic_edge17 +ffffffff82541e10 ? Xintr_ioapic_edge18 +ffffffff82541e50 ? Xintr_ioapic_edge19 +ffffffff82541e90 ? Xintr_ioapic_edge20 +ffffffff82541ed0 ? Xintr_ioapic_edge21 +ffffffff82541f10 ? Xintr_ioapic_edge22 +ffffffff82541f50 ? Xintr_ioapic_edge23 +ffffffff82541f90 ? Xintr_ioapic_edge24 +ffffffff82541fd0 ? Xintr_ioapic_edge25 +ffffffff82542010 ? Xintr_ioapic_edge26 +ffffffff82542050 ? Xintr_ioapic_edge27 +ffffffff82542090 ? Xintr_ioapic_edge28 +ffffffff825420d0 ? Xintr_ioapic_edge29 +ffffffff82542110 ? Xintr_ioapic_edge30 +ffffffff82542150 ? Xintr_ioapic_edge31 +ffffffff82542190 ? Xintr_ioapic_edge32 +ffffffff825421d0 ? Xintr_ioapic_edge33 +ffffffff82542210 ? Xintr_ioapic_edge34 +ffffffff82542250 ? Xintr_ioapic_edge35 +ffffffff82542290 ? Xintr_ioapic_edge36 +ffffffff825422d0 ? Xintr_ioapic_edge37 +ffffffff82542310 ? Xintr_ioapic_edge38 +ffffffff82542350 ? Xintr_ioapic_edge39 +ffffffff82542390 ? Xintr_ioapic_edge40 +ffffffff825423d0 ? Xintr_ioapic_edge41 +ffffffff82542410 ? Xintr_ioapic_edge42 +ffffffff82542450 ? Xintr_ioapic_edge43 +ffffffff82542490 ? Xintr_ioapic_edge44 +ffffffff825424d0 ? Xintr_ioapic_edge45 +ffffffff82542510 ? Xintr_ioapic_edge46 +ffffffff82542550 ? Xintr_ioapic_edge47 +ffffffff82542590 ? Xintr_ioapic_edge48 +ffffffff825425d0 ? Xintr_ioapic_edge49 +ffffffff82542610 ? Xintr_ioapic_edge50 +ffffffff82542650 ? Xintr_ioapic_edge51 +ffffffff82542690 ? Xintr_ioapic_edge52 +ffffffff825426d0 ? Xintr_ioapic_edge53 +ffffffff82542710 ? Xintr_ioapic_edge54 +ffffffff82542750 ? Xintr_ioapic_edge55 +ffffffff82542790 ? Xintr_ioapic_edge56 +ffffffff825427d0 ? Xintr_ioapic_edge57 +ffffffff82542810 ? Xintr_ioapic_edge58 +ffffffff82542850 ? Xintr_ioapic_edge59 +ffffffff82542890 ? Xintr_ioapic_edge60 +ffffffff825428d0 ? Xintr_ioapic_edge61 +ffffffff82542910 ? Xintr_ioapic_edge62 +ffffffff82542950 ? Xintr_ioapic_edge63 +ffffffff82542990 ? Xintr_ioapic_level0 +ffffffff825429d0 ? Xintr_ioapic_level1 +ffffffff82542a10 ? Xintr_ioapic_level2 +ffffffff82542a50 ? Xintr_ioapic_level3 +ffffffff82542a90 ? Xintr_ioapic_level4 +ffffffff82542ad0 ? Xintr_ioapic_level5 +ffffffff82542b10 ? Xintr_ioapic_level6 +ffffffff82542b50 ? Xintr_ioapic_level7 +ffffffff82542b90 ? Xintr_ioapic_level8 +ffffffff82542bd0 ? Xintr_ioapic_level9 +ffffffff82542c10 ? Xintr_ioapic_level10 +ffffffff82542c50 ? Xintr_ioapic_level11 +ffffffff82542c90 ? Xintr_ioapic_level12 +ffffffff82542cd0 ? Xintr_ioapic_level13 +ffffffff82542d10 ? Xintr_ioapic_level14 +ffffffff82542d50 ? Xintr_ioapic_level15 +ffffffff82542d90 ? Xintr_ioapic_level16 +ffffffff82542dd0 ? Xintr_ioapic_level17 +ffffffff82542e10 ? Xintr_ioapic_level18 +ffffffff82542e50 ? Xintr_ioapic_level19 +ffffffff82542e90 ? Xintr_ioapic_level20 +ffffffff82542ed0 ? Xintr_ioapic_level21 +ffffffff82542f10 ? Xintr_ioapic_level22 +ffffffff82542f50 ? Xintr_ioapic_level23 +ffffffff82542f90 ? Xintr_ioapic_level24 +ffffffff82542fd0 ? Xintr_ioapic_level25 +ffffffff82543010 ? Xintr_ioapic_level26 +ffffffff82543050 ? Xintr_ioapic_level27 +ffffffff82543090 ? Xintr_ioapic_level28 +ffffffff825430d0 ? Xintr_ioapic_level29 +ffffffff82543110 ? Xintr_ioapic_level30 +ffffffff82543150 ? Xintr_ioapic_level31 +ffffffff82543190 ? Xintr_ioapic_level32 +ffffffff825431d0 ? Xintr_ioapic_level33 +ffffffff82543210 ? Xintr_ioapic_level34 +ffffffff82543250 ? Xintr_ioapic_level35 +ffffffff82543290 ? Xintr_ioapic_level36 +ffffffff825432d0 ? Xintr_ioapic_level37 +ffffffff82543310 ? Xintr_ioapic_level38 +ffffffff82543350 ? Xintr_ioapic_level39 +ffffffff82543390 ? Xintr_ioapic_level40 +ffffffff825433d0 ? Xintr_ioapic_level41 +ffffffff82543410 ? Xintr_ioapic_level42 +ffffffff82543450 ? Xintr_ioapic_level43 +ffffffff82543490 ? Xintr_ioapic_level44 +ffffffff825434d0 ? Xintr_ioapic_level45 +ffffffff82543510 ? Xintr_ioapic_level46 +ffffffff82543550 ? Xintr_ioapic_level47 +ffffffff82543590 ? Xintr_ioapic_level48 +ffffffff825435d0 ? Xintr_ioapic_level49 +ffffffff82543610 ? Xintr_ioapic_level50 +ffffffff82543650 ? Xintr_ioapic_level51 +ffffffff82543690 ? Xintr_ioapic_level52 +ffffffff825436d0 ? Xintr_ioapic_level53 +ffffffff82543710 ? Xintr_ioapic_level54 +ffffffff82543750 ? Xintr_ioapic_level55 +ffffffff82543790 ? Xintr_ioapic_level56 +ffffffff825437d0 ? Xintr_ioapic_level57 +ffffffff82543810 ? Xintr_ioapic_level58 +ffffffff82543850 ? Xintr_ioapic_level59 +ffffffff82543890 ? Xintr_ioapic_level60 +ffffffff825438d0 ? Xintr_ioapic_level61 +ffffffff82543910 ? Xintr_ioapic_level62 +ffffffff82543950 ? Xintr_ioapic_level63 +ffffffff82544000 ? codepatch_fill_nop +ffffffff82544000 A __cptext_start +ffffffff82544000 A __kutext_end +ffffffff825440b0 ? codepatch_maprw +ffffffff82544190 ? codepatch_unmaprw +ffffffff82544200 ? codepatch_nop +ffffffff82544360 ? codepatch_replace +ffffffff82544510 ? codepatch_call +ffffffff82544530 ? codepatch_jmp +ffffffff82545000 A __cptext_end +ffffffff82545000 A __rodata_start +ffffffff82545000 C _etext +ffffffff82545000 C etext +ffffffff82546000 r seeprom_read +ffffffff82546004 r icl_mg_pll_find_divisors.div1_vals +ffffffff82546028 r gen9bc_tgp_ddc_pin_map +ffffffff82546038 r athn_ac2qid +ffffffff82546038 r athn_ac2qid +ffffffff82546038 r athn_ac2qid +ffffffff82546044 r rtwn_get_rssi.cckoff +ffffffff8254606c r rsu_ac2qid +ffffffff8254607c r pckbc_portcmd +ffffffff82546080 r tht_fifo_write_pad.pad +ffffffff82546088 r rsu_get_rssi.cckoff +ffffffff8254609c r adlp_n_revids +ffffffff825460ec r apple_iso_trans +ffffffff825460f0 r dg2_g12_revid_step_tbl +ffffffff825460f8 r wihap_check_tx.txratetable +ffffffff825460fc r dmamode +ffffffff82546120 r gen9_edram_size_mb.sets +ffffffff82547000 r isomappings +ffffffff82547080 r unimappings +ffffffff82547230 r replacements +ffffffff8254a93f r apollo_pio_rec +ffffffff82593697 r apollo_udma33_tim +ffffffff825a6e4f r pp_r600_decoded_lanes +ffffffff825d9b9b r cmd680_setup_channel.udma_tbl +ffffffff825e17b6 r apollo_udma100_tim +ffffffff825e17bc r cmd0646_9_tim_udma +ffffffff825ef150 r substchar +ffffffff8263fea7 r apollo_udma133_tim +ffffffff8263feae r apollo_udma66_tim +ffffffff8263fed8 r cy_pio_rec +ffffffff82644e78 R drm_ca +ffffffff82644ea0 R drm_filtops +ffffffff82644ed0 R drmread_filtops +ffffffff82645000 r vga_emulops +ffffffff82645048 R vga_stdscreen +ffffffff82645078 R vga_stdscreen_mono +ffffffff826450a8 R vga_stdscreen_bf +ffffffff826450d8 R vga_40lscreen +ffffffff82645108 R vga_40lscreen_mono +ffffffff82645138 R vga_40lscreen_bf +ffffffff82645168 R vga_50lscreen +ffffffff82645198 R vga_50lscreen_mono +ffffffff826451c8 R vga_50lscreen_bf +ffffffff826451f8 R vga_screenlist +ffffffff82645208 R vga_screenlist_mono +ffffffff82645218 R vga_accessops +ffffffff82645278 r i945_wm_info +ffffffff826452b8 r bgansitopc +ffffffff826452c0 r pctoansi +ffffffff82645300 r sdma_offsets +ffffffff82645300 r sdma_offsets +ffffffff82645338 r iha_rate_tbl +ffffffff82645370 r i830_a_wm_info +ffffffff826453a8 r gen9_edram_size_mb.ways +ffffffff82645408 r aggr_periodic_times +ffffffff82645490 r jsl_ehl_revids +ffffffff82645508 r michael_final.pad +ffffffff82645530 r rt_copysa.maskarray +ffffffff82645538 r i915_wm_info +ffffffff82645540 r amdgpu_ih_clientid_jpeg +ffffffff82645540 r amdgpu_ih_clientid_uvds +ffffffff82645540 r amdgpu_ih_clientid_vcns +ffffffff82645540 r amdgpu_ih_clientid_vcns +ffffffff82645540 r amdgpu_ih_clientid_vcns +ffffffff82645578 r vga_setfontset.cmaptabb +ffffffff82645590 r tgl_revids +ffffffff826455f0 r i830_bc_wm_info +ffffffff82645660 r hsw_activate_psr2.map +ffffffff82645698 r __drm_universal_plane_init.default_modifiers +ffffffff826456a8 r iwn_tid2fifo +ffffffff826456c0 r vga_setfontset.cmaptaba +ffffffff826456c8 r crtc_offsets +ffffffff826456c8 r crtc_offsets +ffffffff826456c8 r crtc_offsets +ffffffff826456e8 r link_speed +ffffffff826456e8 r link_speed +ffffffff826456e8 r link_speed +ffffffff82645770 r rtwn_r88e_get_rssi.cckoff +ffffffff82646000 R edid_vendors +ffffffff826462c0 R edid_nvendors +ffffffff826462d0 R edid_products +ffffffff82646330 R edid_nproducts +ffffffff82646340 r _edid_modes +ffffffff82647000 R videomode_list +ffffffff82648080 R videomode_count +ffffffff82649000 r ahc_hard_errors +ffffffff82649080 r critical_sections +ffffffff826490b0 r patches +ffffffff82649d50 r seqprog +ffffffff8264b000 r ahc_switch +ffffffff8264c000 r termstat_strings +ffffffff8264c020 r critical_sections +ffffffff8264c060 r seqprog +ffffffff8264cd50 r patches +ffffffff8264e000 r ahd_switch +ffffffff8264f000 R aic_switch +ffffffff82650000 R adw_switch +ffffffff82651000 R gdt_switch +ffffffff82652000 R twe_switch +ffffffff82653000 R ciss_switch +ffffffff82653030 R ciss_level +ffffffff82653050 R ciss_stat +ffffffff82654000 R ami_switch +ffffffff82654028 R ami_raw_switch +ffffffff82655000 R mfi_switch +ffffffff82655028 R mfi_pd_switch +ffffffff82655050 r mfi_iop_xscale +ffffffff82655080 r mfi_iop_ppc +ffffffff826550b0 r mfi_iop_gen2 +ffffffff826550e0 r mfi_iop_skinny +ffffffff82655110 r mfi_bbu_indicators +ffffffff82656000 R qlw_switch +ffffffff82657000 R isp_2100_risc_code +ffffffff82669bf0 R isp_2200_risc_code +ffffffff8267c990 R isp_2300_risc_code +ffffffff82696408 R qla_switch +ffffffff82696430 r qla_regs_2100 +ffffffff82696460 r qla_regs_2200 +ffffffff82696490 r qla_regs_23XX +ffffffff82697000 R ahci_atascsi_methods +ffffffff82698000 R nvme_switch +ffffffff82698028 r nvme_ops +ffffffff82699000 R mpi_switch +ffffffff82699060 r bwi_rf_calc_nrssi_slope_11b.save_phy_regs +ffffffff82699090 r chv_oa_mux_regs +ffffffff826990b0 r fiji_clock_stretcher_lookup_table +ffffffff826990b0 r tonga_clock_stretcher_lookup_table +ffffffff826990d0 r iosf_pci_devices +ffffffff826990f0 r link_speed +ffffffff826990f0 r link_speed +ffffffff826990f0 r link_speed +ffffffff82699130 r drm_fb_xfrm.default_dst_pitch +ffffffff82699130 r non_supported_protection +ffffffff82699230 r tgl_uy_revids +ffffffff82699280 r bwi_phy_noise_11g_rev1 +ffffffff826992f0 r cardslot_process_event.antonym_ev +ffffffff82699370 r gen11_oa_mux_regs +ffffffff82699470 r ddr2_cycle_tenths +ffffffff826994e0 r rtw_intr_rx.ratetbl +ffffffff82699550 r abm_config +ffffffff826995c0 r getbootinfo.ports +ffffffff82699610 r reg_offsets +ffffffff82699620 r bwi_rf_lo_measure_11g.rf_lo_adjust +ffffffff82699630 r init_non_clock_fields.look_up +ffffffff82699640 r uftdi_8u232am_getrate.roundoff +ffffffff82699690 r zyd_rx_data.rates +ffffffff826996b0 r ieee80211_ra_valid_tx_mcs.max_mcs +ffffffff826996e0 r mmio_invalidate_full.gen8_regs +ffffffff82699710 r bwi_phy_noise_11g +ffffffff82699720 r hpt366_pio +ffffffff82699750 r glk_revids +ffffffff82699790 r bwi_rf_calc_nrssi_slope_11g.save_phy3_regs +ffffffff826997b0 r ether_crc32_be_update.rev +ffffffff826997b0 r rtw_grf5101_mac_crypt.caesar +ffffffff82699800 r snb_b_fdi_train_param +ffffffff826998d0 r intel_hpll_vco.elk_vco +ffffffff82699930 r pin_offsets +ffffffff82699970 r firmware_list +ffffffff826999d0 r atom_arg_shift +ffffffff826999d0 r atom_arg_shift +ffffffff82699a10 r pf_syncookie_wstab +ffffffff82699a30 r ieee80211_media_init.mopts +ffffffff82699a90 r add_entropy_words.twist_table +ffffffff82699b30 r urtw_8225v2_txpwr_cck +ffffffff82699b50 r bwfm_pci_prio2fifo +ffffffff82699b50 r ieee80211_up_to_ac.up_to_ac +ffffffff82699c10 r paritytab +ffffffff82699c10 r x86emu_parity_tab +ffffffff82699c30 r legacy_connector_convert +ffffffff82699c70 r gen7_oa_mux_regs +ffffffff82699c90 r hsw_oa_mux_regs +ffffffff82699cb0 r notetab +ffffffff82699cd0 r urtw_8225v2_txpwr_cck_ch14 +ffffffff82699cf0 r bwi_rf_calibval.rf_calibvals +ffffffff82699d90 r pf_syncookie_msstab +ffffffff82699df0 r xgmi3x16_pcs_err_status_reg_aldebaran +ffffffff82699e50 r uath_wme_init.uath_wme_11g +ffffffff82699e70 r gen7_oa_b_counters +ffffffff82699fd0 r icl_revids +ffffffff8269a090 r rtwn_iq_calib_run.reg_adda +ffffffff8269a0d0 r atom_def_dst +ffffffff8269a0d0 r atom_def_dst +ffffffff8269a110 r sha256_initial_hash_value +ffffffff8269a170 r otus_edca_def +ffffffff8269a190 r intel_hpll_vco.blb_vco +ffffffff8269a250 r epic_pci_subsys_info +ffffffff8269a270 r atom_arg_mask +ffffffff8269a270 r atom_arg_mask +ffffffff8269a2d0 r butmap +ffffffff8269a310 r GFX_RLC_SRM_INDEX_CNTL_DATA_OFFSETS +ffffffff8269a350 r comsoft.lsrmap +ffffffff8269a390 r tulip_mii_phy_readspecific.table +ffffffff8269a3b0 r kbl_revids +ffffffff8269a450 r intel_hpll_vco.pnv_vco +ffffffff8269a4b0 r dmapageport +ffffffff8269a570 r intel_hpll_vco.ctg_vco +ffffffff8269a630 r drm_calculate_luminance_range.pre_computed_values +ffffffff8269b000 R sili_atascsi_methods +ffffffff8269c000 R ncr53c9x_switch +ffffffff8269d000 r scf_period +ffffffff8269e000 R siop_script +ffffffff8269e5a0 R lun_switch +ffffffff8269e5d0 R tag_switch +ffffffff8269e660 R load_dsa +ffffffff8269e6c4 R siop_led_on +ffffffff8269e6cc R siop_led_off +ffffffff8269e6d8 R siop_switch +ffffffff8269f000 R ep_vortex_media +ffffffff8269f100 R ep_default_to_media +ffffffff826a0000 R wi_card_ident +ffffffff826a2000 R ucode_table +ffffffff826a3000 r re_revisions +ffffffff826a3290 r re_kstats_tpl +ffffffff826a5000 R smc91cxx_media +ffffffff826a5010 R smc91cxx_mii_bitbang_ops +ffffffff826a6000 R dl10019_mii_bitbang_ops +ffffffff826a6028 R dl10022_mii_bitbang_ops +ffffffff826a7000 R ax88190_mii_bitbang_ops +ffffffff826a9000 R ac97_audio_default +ffffffff826a9020 R ac97_on_off +ffffffff826a9324 R ac97_mic_select +ffffffff826a9628 R ac97_mono_select +ffffffff826a992c R ac97_source +ffffffff826a9c30 R ac97_volume_stereo +ffffffff826a9c4c R ac97_volume_mono +ffffffff826a9c70 R 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-ffffffff82b3f045 r DP_SINK_DEVICE_STR_ID_2 -ffffffff82b40000 r reg_offsets +ffffffff826c2080 r ar9287_1_1_rx_gain +ffffffff826c20a0 r ar9287_1_1_tx_gain +ffffffff826c20c0 r ar9287_1_1_regs +ffffffff826c2120 r ar9287_1_1_vals_2g40 +ffffffff826c21d0 r ar9287_1_1_vals_2g20 +ffffffff826c2280 r ar9287_1_1_cm_regs +ffffffff826c2560 r ar9287_1_1_cm_vals +ffffffff826c2b20 r ar9280_2_0_serdes_regs +ffffffff826c2b50 r ar9280_2_0_serdes_vals +ffffffff826c2b80 r ar9287_1_1_rx_gain_regs +ffffffff826c2d90 r ar9287_1_1_rx_gain_vals_2g +ffffffff826c31a0 r ar9287_1_1_tx_gain_regs +ffffffff826c3200 r ar9287_1_1_tx_gain_vals_2g +ffffffff826c4000 r athn_rates +ffffffff826c5000 r ar9485_1_1_ini +ffffffff826c5068 r ar9485_1_1_serdes +ffffffff826c5080 r ar9380_2_2_ini +ffffffff826c50e8 r ar9380_2_2_serdes +ffffffff826c5100 r ar9380_2_2_rx_gain_wo_xlna +ffffffff826c5120 r ar9380_2_2_rx_gain +ffffffff826c5140 r ar9485_1_1_rx_gain +ffffffff826c5160 r ar9380_2_2_tx_gain_high_ob_db +ffffffff826c5180 r ar9380_2_2_tx_gain_low_ob_db +ffffffff826c51a0 r ar9380_2_2_tx_gain_high_power +ffffffff826c51c0 r ar9380_2_2_tx_gain +ffffffff826c51e0 r ar9485_1_1_tx_gain +ffffffff826c5200 r ar9485_1_1_regs +ffffffff826c5270 r ar9485_1_1_vals_2g40 +ffffffff826c5350 r ar9485_1_1_vals_2g20 +ffffffff826c5430 r ar9485_1_1_cm_regs +ffffffff826c5720 r ar9485_1_1_cm_vals +ffffffff826c5d00 r ar9485_1_1_serdes_regs +ffffffff826c5d0c r ar9485_1_1_serdes_vals +ffffffff826c5d20 r ar9380_2_2_regs +ffffffff826c5db0 r ar9380_2_2_vals_5g20 +ffffffff826c5ed0 r ar9380_2_2_vals_5g40 +ffffffff826c5ff0 r ar9380_2_2_vals_2g40 +ffffffff826c6110 r ar9380_2_2_vals_2g20 +ffffffff826c6230 r ar9380_2_2_cm_regs +ffffffff826c65d0 r ar9380_2_2_cm_vals +ffffffff826c6d00 r ar9380_2_2_fast_clock_regs +ffffffff826c6d20 r ar9380_2_2_fast_clock_vals_5g20 +ffffffff826c6d50 r ar9380_2_2_fast_clock_vals_5g40 +ffffffff826c6d74 r ar9380_2_2_serdes_regs +ffffffff826c6d80 r ar9380_2_2_serdes_vals +ffffffff826c6d90 r ar9380_2_2_rx_gain_regs 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r rt5390_def_bbp +ffffffff826d06f0 r rt2860_def_mac +ffffffff826d2000 r acx111_reg +ffffffff826d2040 r acx111_rate_map +ffffffff826d3000 r acx100_reg +ffffffff826d3040 r acx100_txpower_rfmd +ffffffff826d3060 r gen8_rcs_offsets +ffffffff826d3090 r acx100_txpower_maxim +ffffffff826d30b0 r digits +ffffffff826d30b0 r pppdumpb.digits +ffffffff826d30b0 r pppdumpm.digits +ffffffff826d3100 r hangpic +ffffffff826d3140 r gen11_rcs_offsets +ffffffff826d3170 r xehp_rcs_offsets +ffffffff826d31a0 r dg2_rcs_offsets +ffffffff826d31e0 r dg2_xcs_offsets +ffffffff826d3210 r gen12_xcs_offsets +ffffffff826d4000 r trinity_override_mgpg_sequences +ffffffff826d43c0 r voltage_swing_to_pre_emphasis +ffffffff826d43d0 r sgpr_init_compute_shader +ffffffff826d44a0 r intel_hpll_vco.cl_vco +ffffffff826d44c0 r vgpr_init_compute_shader +ffffffff826d5000 r malo_cmd_string.cmds +ffffffff826d50b0 r malo_cmd_string_result.results +ffffffff826d6000 R bwi_vendor_led_act +ffffffff826d600c R bwi_default_led_act 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R uhci_bus_methods +ffffffff826d7030 R uhci_root_ctrl_methods +ffffffff826d7060 R uhci_root_intr_methods +ffffffff826d7090 R uhci_device_ctrl_methods +ffffffff826d70c0 R uhci_device_intr_methods +ffffffff826d70f0 R uhci_device_bulk_methods +ffffffff826d7120 R uhci_device_isoc_methods +ffffffff826d7150 R uhci_devd +ffffffff826d7162 R uhci_confd +ffffffff826d716b R uhci_ifcd +ffffffff826d7174 R uhci_endpd +ffffffff826d717b R uhci_hubd_piix +ffffffff826d8000 R revbits +ffffffff826d8020 R ohci_bus_methods +ffffffff826d8050 R ohci_root_ctrl_methods +ffffffff826d8080 R ohci_root_intr_methods +ffffffff826d80b0 R ohci_device_ctrl_methods +ffffffff826d80e0 R ohci_device_intr_methods +ffffffff826d8110 R ohci_device_bulk_methods +ffffffff826d8140 R ohci_device_isoc_methods +ffffffff826d8170 R ohci_devd +ffffffff826d8182 R ohci_confd +ffffffff826d818b R ohci_ifcd +ffffffff826d8194 R ohci_endpd +ffffffff826d819b R ohci_hubd +ffffffff826d9000 R ehci_bus_methods +ffffffff826d9030 R ehci_root_ctrl_methods +ffffffff826d9060 R ehci_root_intr_methods +ffffffff826d9090 R ehci_device_ctrl_methods +ffffffff826d90c0 R ehci_device_intr_methods +ffffffff826d90f0 R ehci_device_bulk_methods +ffffffff826d9120 R ehci_device_isoc_methods +ffffffff826d9150 R ehci_devd +ffffffff826d9162 R ehci_odevd +ffffffff826d916c R ehci_confd +ffffffff826d9175 R ehci_ifcd +ffffffff826d917e R ehci_endpd +ffffffff826d9185 R ehci_hubd +ffffffff826da000 R xhci_bus_methods +ffffffff826da030 R xhci_root_ctrl_methods +ffffffff826da060 R xhci_root_intr_methods +ffffffff826da090 R xhci_device_ctrl_methods +ffffffff826da0c0 R xhci_device_intr_methods +ffffffff826da0f0 R xhci_device_bulk_methods +ffffffff826da120 R xhci_device_isoc_methods +ffffffff826da150 R xhci_devd +ffffffff826da162 R xhci_confd +ffffffff826da16b R xhci_ifcd +ffffffff826da174 R xhci_endpd +ffffffff826da17b R xhci_endpcd +ffffffff826da181 R xhci_hubd +ffffffff826dd000 R radio_ca +ffffffff826de000 R ipmi_ca +ffffffff826df000 R vscsi_ca +ffffffff826df028 R vscsi_switch +ffffffff826df050 R vscsi_filtops +ffffffff826e0000 R mpath_ca +ffffffff826e0028 R mpath_switch +ffffffff826e1000 R softraid_ca +ffffffff826e1028 R sr_switch +ffffffff826e2000 r spdmem_basic_types +ffffffff826e20a0 r spdmem_parity_types +ffffffff826e20e0 r spdmem_ddr4_decode.ddr4_chipsize +ffffffff826e3000 R kstat_rlock_ops +ffffffff826e3010 R kstat_wlock_ops +ffffffff826e3020 R kstat_mutex_ops +ffffffff826e3030 R kstat_cpu_ops +ffffffff826e3040 r kstat_id_tree_RBT_INFO +ffffffff826e3058 R kstat_id_tree_RBT_TYPE +ffffffff826e3060 r kstat_pv_tree_RBT_INFO +ffffffff826e3078 R kstat_pv_tree_RBT_TYPE +ffffffff826e3080 r kstat_nm_tree_RBT_INFO +ffffffff826e3098 R kstat_nm_tree_RBT_TYPE +ffffffff826e4000 r fuse_rd_filtops +ffffffff826e5000 R fusefs_vfsops +ffffffff826e5070 R fusefs_vars +ffffffff826e6000 R fusefs_vops +ffffffff826e6110 R fusefsread_filtops +ffffffff826e6140 R fusefswrite_filtops +ffffffff826e6170 R fusefsvnode_filtops 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db_command_table +ffffffff826ef000 R ddb_vars +ffffffff826f0000 R audio_ca +ffffffff826f0028 R audioctlread_filtops +ffffffff826f0058 R audiowrite_filtops +ffffffff826f0088 R audioread_filtops +ffffffff826f1000 R midi_ca +ffffffff826f1028 R midiwrite_filtops +ffffffff826f1058 R midiread_filtops +ffffffff826f2000 r mulawtolin16 +ffffffff826f2200 r lintomulaw +ffffffff826f3000 R randomread_filtops +ffffffff826f3030 R randomwrite_filtops +ffffffff826f4000 R video_ca +ffffffff826f4028 R video_filtops +ffffffff826f5000 R cd9660_vfsops +ffffffff826f6000 R cd9660_vops +ffffffff826f6110 R cd9660_specvops +ffffffff826f6220 R cd9660_fifovops +ffffffff826f6330 R cd9660read_filtops +ffffffff826f6360 R cd9660write_filtops +ffffffff826f6390 R cd9660vnode_filtops +ffffffff826f7000 R udf_vfsops +ffffffff826f8000 R udf_vops +ffffffff826f8110 r mon_lens +ffffffff826f9000 r month_days +ffffffff826fa000 R execsw +ffffffff826fb000 r shstrtab +ffffffff826fc000 R copyright +ffffffff826fc0c0 r initpaths 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sysvsem_vars +ffffffff82715000 R char_type +ffffffff82715100 R ttyread_filtops +ffffffff82715130 R ttywrite_filtops +ffffffff82715160 R ttyexcept_filtops +ffffffff82716000 R ptcread_filtops +ffffffff82716030 R ptcwrite_filtops +ffffffff82716060 R ptcexcept_filtops +ffffffff82718000 R domains +ffffffff82719000 R unixdomain +ffffffff82719050 R unixsw +ffffffff8271a000 R solisten_filtops +ffffffff8271a030 R soread_filtops +ffffffff8271a060 R sowrite_filtops +ffffffff8271a090 R soexcept_filtops +ffffffff8271a0c0 R socket_klistops +ffffffff8271b000 R sun_noname +ffffffff8271b010 R uipc_usrreqs +ffffffff8271b0b0 R uipc_dgram_usrreqs +ffffffff8271b150 R unpstctl_vars +ffffffff8271b180 R unpsqctl_vars +ffffffff8271b1b0 R unpdgctl_vars +ffffffff8271c000 r namecache_rb_cache_RBT_INFO +ffffffff8271c018 R namecache_rb_cache_RBT_TYPE +ffffffff8271d000 R generic_filtops +ffffffff8271e000 r buf_rb_bufs_RBT_INFO +ffffffff8271e018 R buf_rb_bufs_RBT_TYPE +ffffffff8271e020 r typename +ffffffff8271f000 R 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nvgre_ucast_tree_RBT_TYPE +ffffffff8273a090 r nvgre_mcast_tree_RBT_INFO +ffffffff8273a0a8 R nvgre_mcast_tree_RBT_TYPE +ffffffff8273a0b0 r eoip_tree_RBT_INFO +ffffffff8273a0c8 R eoip_tree_RBT_TYPE +ffffffff8273a0d0 r nvgre_etherbridge_ops +ffffffff8273b000 r trunk_protos +ffffffff8273c000 R ethermulticastaddr_slowprotocols +ffffffff8273c006 R lacp_info_tlv_template +ffffffff8273c00e R marker_info_tlv_template +ffffffff8273c012 R marker_response_tlv_template +ffffffff8273c020 R lacp_timer_funcs +ffffffff8273d000 r lacp_rxm_state_names +ffffffff8273d040 r lacp_rxm_event_names +ffffffff8273d090 r aggr_port_selected_names +ffffffff8273d0b0 r lacp_mux_state_names +ffffffff8273d0e0 r lacp_mux_event_names +ffffffff8273d128 r lacp_address_slow +ffffffff8273e000 r tpmr_pf_ipv4 +ffffffff8273e018 r tpmr_pf_ipv6 +ffffffff8273f000 r bpe_tree_RBT_INFO +ffffffff8273f018 R bpe_tree_RBT_TYPE +ffffffff8273f020 r bpe_etherbridge_ops +ffffffff82740000 R pppx_rd_filtops +ffffffff82740030 R pppx_wr_filtops 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cast_sbox2 +ffffffff82762800 r cast_sbox3 +ffffffff82762c00 r cast_sbox4 +ffffffff82763000 r cast_sbox5 +ffffffff82763400 r cast_sbox6 +ffffffff82763800 r cast_sbox7 +ffffffff82763c00 r cast_sbox8 +ffffffff82764000 r des_SPtrans +ffffffff82765000 r des_skb +ffffffff82765800 r odd_parity +ffffffff82766000 R hmac_ipad_buffer +ffffffff82766080 R hmac_opad_buffer +ffffffff82767000 R enc_xform_3des +ffffffff82767040 R enc_xform_blf +ffffffff82767080 R enc_xform_cast5 +ffffffff827670c0 R enc_xform_aes +ffffffff82767100 R enc_xform_aes_ctr +ffffffff82767140 R enc_xform_aes_gcm +ffffffff82767180 R enc_xform_aes_gmac +ffffffff827671c0 R enc_xform_aes_xts +ffffffff82767200 R enc_xform_chacha20_poly1305 +ffffffff82767240 R enc_xform_null +ffffffff82767280 R auth_hash_hmac_md5_96 +ffffffff827672c8 R auth_hash_hmac_sha1_96 +ffffffff82767310 R auth_hash_hmac_ripemd_160_96 +ffffffff82767358 R auth_hash_hmac_sha2_256_128 +ffffffff827673a0 R auth_hash_hmac_sha2_384_192 +ffffffff827673e8 R auth_hash_hmac_sha2_512_256 +ffffffff82767430 R auth_hash_gmac_aes_128 +ffffffff82767478 R auth_hash_gmac_aes_192 +ffffffff827674c0 R auth_hash_gmac_aes_256 +ffffffff82767508 R auth_hash_chacha20_poly1305 +ffffffff82767550 R comp_algo_deflate +ffffffff82768000 r IV +ffffffff82769000 r idgen32_ftable +ffffffff8276a000 r Chacha20_Poly1305_Update.zeroes +ffffffff8276a010 r pad0 +ffffffff8276b000 r null_point +ffffffff8276b020 r base_point +ffffffff8276c000 R mplsdomain +ffffffff8276d000 R mplsctl_vars +ffffffff8276e000 r nfs_nodetree_RBT_INFO +ffffffff8276e018 R nfs_nodetree_RBT_TYPE +ffffffff8276f000 r nfsread_filtops +ffffffff8276f030 r nfswrite_filtops +ffffffff8276f060 r nfsvnode_filtops +ffffffff82770000 r nfsrv_v3errmap +ffffffff827700b0 r nfsrv_v2errmap +ffffffff82771000 R nfs_vfsops +ffffffff82772000 R nfs_vops +ffffffff82772110 R nfs_specvops +ffffffff82772220 R nfs_fifovops +ffffffff82773000 r fserr_interval +ffffffff82774000 R around +ffffffff82774030 R inside +ffffffff82774060 R fragtbl124 +ffffffff82774160 R fragtbl8 +ffffffff82775000 R ffs_vfsops +ffffffff82775070 R sbtry +ffffffff82775080 R ffs_vars +ffffffff82776000 R ffs_vops +ffffffff82776110 R ffs_specvops +ffffffff82776220 R ffs_fifovops +ffffffff82778000 R mfs_vfsops +ffffffff82779000 R mfs_vops +ffffffff8277a000 r quotatypes +ffffffff8277b000 R ufsread_filtops +ffffffff8277b030 R ufswrite_filtops +ffffffff8277b060 R ufsvnode_filtops +ffffffff8277d000 R ext2fs_vfsops +ffffffff8277d070 r incompat +ffffffff8277e000 R ext2fs_vops +ffffffff8277e110 R ext2fs_specvops +ffffffff8277e220 R ext2fs_fifovops +ffffffff8277f000 R uaddr_kernel_functions +ffffffff8277f030 R uaddr_rnd_functions +ffffffff8277f060 R uaddr_bestfit_functions +ffffffff8277f090 R uaddr_pivot_functions +ffffffff8277f0c0 R uaddr_stack_brk_functions +ffffffff8277f0f0 r uaddr_free_rbtree_RBT_INFO +ffffffff8277f108 R uaddr_free_rbtree_RBT_TYPE +ffffffff82780000 R aobj_pager +ffffffff82781000 R uvm_deviceops +ffffffff82782000 R kv_any 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esigcode +ffffffff827a1038 R sigfill +ffffffff827a1039 R sigfillsiz +ffffffff827a1039 r esigfill +ffffffff827a103d r bogus_proc_pmap +ffffffff827a1070 r spl_lowered +ffffffff827a10a6 r intr_spl_lowered +ffffffff827a1113 R _xrstor +ffffffff827a1117 R _xrstors +ffffffff827a111b R _xsave +ffffffff827a111f R _xsaves +ffffffff827a1123 R _xsaveopt +ffffffff827a1127 R _pcid_set_reuse +ffffffff827a1133 R _jmprax +ffffffff827a1136 R _jmprax_len +ffffffff827a1138 R _jmpr11 +ffffffff827a113c R _jmpr11_len +ffffffff827a113e R _jmpr13 +ffffffff827a1142 R _jmpr13_len +ffffffff827a3000 r cpurevs +ffffffff827a316c r amd64_errata_set5 +ffffffff827a316e r amd64_errata_set1 +ffffffff827a3180 r amd64_errata_set8 +ffffffff827a319f r amd64_errata_set6 +ffffffff827a31a4 r amd64_errata_set7 +ffffffff827a31ac r amd64_errata_set3 +ffffffff827a31af r amd64_errata_set2 +ffffffff827a31b8 r amd64_errata_set9 +ffffffff827a4000 R ptp_masks +ffffffff827a4020 R ptp_shifts +ffffffff827a4030 R nkptpmax +ffffffff827a4050 R nbpd +ffffffff827a4070 R normal_pdes +ffffffff827a5000 R trap_type +ffffffff827a50b0 R trap_types +ffffffff827a6000 r x86fpflags_to_siginfo.x86fp_siginfo_table +ffffffff827a7000 R x86_soft_intr_to_ssir +ffffffff827a9000 R Xexceptions +ffffffff827a9100 r spl_lowered +ffffffff827a912d R i8259_stubs +ffffffff827a92ad R ioapic_edge_stubs +ffffffff827a98ad R ioapic_level_stubs +ffffffff827aa000 R _stac +ffffffff827aa003 R _clac +ffffffff827ab000 R x86_bus_space_io_ops +ffffffff827ab130 R x86_bus_space_mem_ops +ffffffff827ac000 ? cpu_spinup_trampoline +ffffffff827ac0b6 R cpu_spinup_trampoline_end +ffffffff827ac0b6 R mp_tramp_data_start +ffffffff827ac0fc R mp_tramp_data_end +ffffffff827ae000 R db_acpi_cmds +ffffffff827ae0a0 R db_machine_command_table +ffffffff827af000 r i8254_delay.delaytab +ffffffff827b0000 R rasops_cmap +ffffffff827b1000 r reverse +ffffffff827b1100 r ibm437_level1 +ffffffff827b1230 r ibm437_level2_0 +ffffffff827b1248 r ibm437_level2_1 +ffffffff827b1260 r ibm437_level2_3 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eephy_funcs +ffffffff827b9040 r eephys +ffffffff827ba000 R exphy_ca +ffffffff827ba028 R exphy_funcs +ffffffff827bb000 R rlphy_ca +ffffffff827bb028 R rlphy_funcs +ffffffff827bb040 r rlphys +ffffffff827bc000 R lxtphy_ca +ffffffff827bc028 R lxtphy_funcs +ffffffff827bc040 R lxtphy971_funcs +ffffffff827bc060 r lxtphys +ffffffff827bd000 R luphy_ca +ffffffff827bd028 R luphy_funcs +ffffffff827bd040 r luphys +ffffffff827be000 R mtdphy_ca +ffffffff827be028 R mtdphy_funcs +ffffffff827be040 r mtdphys +ffffffff827bf000 R icsphy_ca +ffffffff827bf028 R icsphy_funcs +ffffffff827bf040 r icsphys +ffffffff827c0000 R sqphy_ca +ffffffff827c0028 R sqphy_funcs +ffffffff827c0040 r sqphys +ffffffff827c1000 R tqphy_ca +ffffffff827c1028 R tqphy_funcs +ffffffff827c1040 r tqphys +ffffffff827c2000 R ukphy_ca +ffffffff827c2028 R ukphy_funcs +ffffffff827c3000 R dcphy_ca +ffffffff827c3028 R dcphy_funcs +ffffffff827c4000 R bmtphy_ca +ffffffff827c4028 R bmtphy_funcs +ffffffff827c4040 r bmtphys +ffffffff827c5000 R brgphy_ca +ffffffff827c5028 R brgphy_copper_funcs +ffffffff827c5040 R brgphy_fiber_funcs +ffffffff827c5058 R brgphy_5708s_funcs +ffffffff827c5070 R brgphy_5709s_funcs +ffffffff827c5090 r brgphys +ffffffff827c5300 r brgphy_bcm5401_dspcode.dspcode +ffffffff827c6000 R xmphy_ca +ffffffff827c6028 R xmphy_funcs +ffffffff827c6040 r xmphys +ffffffff827c7000 R amphy_ca +ffffffff827c7028 R amphy_funcs +ffffffff827c7040 r amphys +ffffffff827c8000 R acphy_ca +ffffffff827c8028 R acphy_funcs +ffffffff827c8040 r acphys +ffffffff827c9000 R nsgphy_ca +ffffffff827c9028 R nsgphy_funcs +ffffffff827c9040 r nsgphys +ffffffff827ca000 R urlphy_ca +ffffffff827ca028 R urlphy_funcs +ffffffff827cb000 R rgephy_ca +ffffffff827cb028 R rgephy_funcs +ffffffff827cb040 r rgephys +ffffffff827cc000 R ciphy_ca +ffffffff827cc028 R ciphy_funcs +ffffffff827cc040 r ciphys +ffffffff827cd000 R ipgphy_ca +ffffffff827cd028 R ipgphy_funcs +ffffffff827cd040 r ipgphys +ffffffff827ce000 R etphy_funcs +ffffffff827ce018 R etphy_ca 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R hds_ca +ffffffff827e0028 R hds_mpath_ops +ffffffff827e1000 R atapiscsi_ca +ffffffff827e1028 r atapiscsi_switch +ffffffff827e2000 R wd_ca +ffffffff827e3000 R atascsi_switch +ffffffff827e4000 R mainbus_ca +ffffffff827e5000 R bios_ca +ffffffff827e6000 R mpbios_ca +ffffffff827e6030 r loc_where +ffffffff827e7000 R mpbios_icu_table +ffffffff827e8000 R cpu_ca +ffffffff827e9000 R lapic_timer_intrclock +ffffffff827ea000 R ioapic_ca +ffffffff827eb000 R efifb_ca +ffffffff827eb028 R efifb_screen_list +ffffffff827ec000 R pvbus_ca +ffffffff827ed000 R pvclock_ca +ffffffff827ee000 R vmt_ca +ffffffff827ef000 R xen_ca +ffffffff827f0000 R xs_errors +ffffffff827f1000 R xnf_ca +ffffffff827f2000 R xbf_ca +ffffffff827f2028 R xbf_switch +ffffffff827f3000 R hyperv_ca +ffffffff827f3028 R hv_guid_network +ffffffff827f3038 R hv_guid_ide +ffffffff827f3048 R hv_guid_scsi +ffffffff827f3058 R hv_guid_shutdown +ffffffff827f3068 R hv_guid_timesync +ffffffff827f3078 R hv_guid_heartbeat +ffffffff827f3088 R hv_guid_kvp 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pci_subclass_input +ffffffff82800770 R pci_subclass_dock +ffffffff828007c0 R pci_subclass_processor +ffffffff82800880 R pci_subclass_serialbus +ffffffff82800990 R pci_subclass_wireless +ffffffff82800a70 R pci_subclass_i2o +ffffffff82800aa0 R pci_subclass_satcom +ffffffff82800b20 R pci_subclass_crypto +ffffffff82800b80 R pci_subclass_dasp +ffffffff82800c10 R pci_class +ffffffff82800e20 r pci_known_vendors +ffffffff828023e0 r pci_known_products +ffffffff82825000 R vga_pci_ca +ffffffff82825030 r vga_devs +ffffffff82826000 R ahc_pci_ident_table +ffffffff828265d0 R ahc_pci_ca +ffffffff82827000 R ahd_pci_ident_table +ffffffff82827198 R ahd_num_pci_devs +ffffffff828271a0 R ahd_pci_ca +ffffffff828271d0 r pci_bus_modes +ffffffff82827210 r pci_status_strings +ffffffff82827250 r pci_status_source +ffffffff82827290 r split_status_strings +ffffffff82828000 R adw_pci_ca +ffffffff82828028 R adw_pci_devices +ffffffff82829000 r adw_3550_Default_EEPROM +ffffffff82829080 r adw_38C0800_Default_EEPROM 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mfii_ca +ffffffff82836028 R mfii_switch +ffffffff82836050 R mfii_pd_switch +ffffffff82836078 R mfii_iop_thunderbolt +ffffffff82836088 R mfii_iop_25 +ffffffff82836098 R mfii_iop_35 +ffffffff828360b0 R mfii_devices +ffffffff82836140 r mfi_bbu_indicators +ffffffff82837000 R ips_ca +ffffffff82837028 r ips_ids +ffffffff82837040 r ips_chips +ffffffff82837090 r ips_names +ffffffff82837128 r ips_switch +ffffffff82837150 r ips_pt_switch +ffffffff82838000 R eap_ca +ffffffff82838028 R eap1370_hw_if +ffffffff828380e0 R eap1371_hw_if +ffffffff82838198 R eap_midi_hw_if +ffffffff828381d0 R eap_devices +ffffffff82839000 R auacer_pci_devices +ffffffff82839008 R auacer_ca +ffffffff82839030 R auacer_hw_if +ffffffff8283a000 R auich_ca +ffffffff8283a028 R auich_hw_if +ffffffff8283a0e0 r auich_devices +ffffffff8283b000 R azalia_ca +ffffffff8283b028 R azalia_hw_if +ffffffff8283b0e0 R azalia_pci_devices +ffffffff8283b120 r pin_devices +ffffffff8283b1a0 r line_colors +ffffffff8283b220 r wtypes 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auvia_devices +ffffffff828420f0 r auvia_set_params_sub.slottab +ffffffff82843000 R gdt_pci_ca +ffffffff82844000 R ciss_pci_ca +ffffffff82844030 R ciss_pci_devices +ffffffff82845000 R qlw_pci_ca +ffffffff82845030 r qlw_devices +ffffffff82845050 r isp_1040_risc_code +ffffffff8284a9f0 r isp_1080_risc_code +ffffffff82852470 r isp_12160_risc_code +ffffffff8285a000 R qla_pci_ca +ffffffff8285a030 r qla_devices +ffffffff8285b000 R qle_ca +ffffffff8285b028 R qle_switch +ffffffff8285b050 r qle_devices +ffffffff8285b070 r isp_2400_risc_code +ffffffff8288aa50 r isp_2500_risc_code +ffffffff828bd000 R mpi_pci_ca +ffffffff828bd030 r mpi_devices +ffffffff828be000 R mpii_ca +ffffffff828be028 R mpii_switch +ffffffff828be050 r mpii_devices +ffffffff828bf000 R sili_pci_ca +ffffffff828bf030 r sili_devices +ffffffff828c0000 R aq_devices +ffffffff828c0060 R aq_products +ffffffff828c01d0 R aq_fw1x_ops +ffffffff828c01f8 R aq_fw2x_ops +ffffffff828c0220 R aq2_fw_ops +ffffffff828c0248 R aq_ca +ffffffff828c1000 R de_ca +ffffffff828c1030 r tulip_srom_conninfo +ffffffff828c1120 r tulip_mii_phy_attrlist +ffffffff828c11e0 r tulip_21140_znyx_zx34x_boardsw +ffffffff828c1208 r tulip_21040_10baset_only_boardsw +ffffffff828c1230 r tulip_21040_boardsw +ffffffff828c1258 r tulip_2114x_isv_boardsw +ffffffff828c1280 r tulip_21140_smc9332_boardsw +ffffffff828c12a8 r tulip_21040_auibnc_only_boardsw +ffffffff828c12d0 r tulip_21140_cogent_em100_boardsw +ffffffff828c12f8 r tulip_21140_accton_boardsw +ffffffff828c1320 r tulip_21140_eb_boardsw +ffffffff828c1348 r tulip_21041_boardsw +ffffffff828c1370 r tulip_read_macaddr.testpat +ffffffff828c1380 r tulip_vendors +ffffffff828c1430 r tulip_media_to_ifmedia +ffffffff828c1490 r tulip_chipdescs +ffffffff828c2000 R ep_pci_ca +ffffffff828c2030 R ep_pci_devices +ffffffff828c3000 R pcn_ca +ffffffff828c3028 R pcn_devices +ffffffff828c3030 r pcn_79c970_rcvfw +ffffffff828c3050 r pcn_79c970_xmtsp +ffffffff828c3070 r pcn_79c970_xmtfw +ffffffff828c3090 r pcn_79c971_rcvfw +ffffffff828c30b0 r pcn_79c971_xmtsp_sram +ffffffff828c30d0 r pcn_79c971_xmtsp +ffffffff828c30f0 r pcn_79c971_xmtfw +ffffffff828c3110 r pcn_variants +ffffffff828c4000 R siop_products +ffffffff828c5000 R siop_pci_ca +ffffffff828c6000 R rdcide_setup +ffffffff828c6005 R rdcide_hold +ffffffff828c600a R rdcide_udmatim +ffffffff828c6010 R rdcide_udmaclk +ffffffff828c6028 R default_product_desc +ffffffff828c6040 R pciide_intel_products +ffffffff828c6630 R pciide_amd_products +ffffffff828c6690 R pciide_cmd_products +ffffffff828c6730 R pciide_via_products +ffffffff828c6810 R pciide_cypress_products +ffffffff828c6820 R pciide_sis_products +ffffffff828c6870 R pciide_natsemi_products +ffffffff828c6890 R pciide_acer_products +ffffffff828c68a0 R pciide_triones_products +ffffffff828c68f0 R pciide_promise_products +ffffffff828c6ac0 R pciide_acard_products +ffffffff828c6b10 R pciide_serverworks_products +ffffffff828c6bb0 R pciide_nvidia_products +ffffffff828c6e80 R pciide_ite_products +ffffffff828c6ea0 R pciide_ati_products +ffffffff828c6f20 R pciide_jmicron_products +ffffffff828c6f70 R pciide_phison_products +ffffffff828c6f80 R pciide_rdc_products +ffffffff828c6f90 R pciide_vendors +ffffffff828c7140 R pciide_pci_ca +ffffffff828c7168 R pciide_jmb_ca +ffffffff828c7190 r piix_isp_dma +ffffffff828c7193 r piix_rtc_dma +ffffffff828c7196 r apollo_pio_set +ffffffff828c719b r cmd0643_9_data_tim_pio +ffffffff828c71a0 r cmd0643_9_data_tim_dma +ffffffff828c71a3 r cmd680_channel_map.init_val +ffffffff828c71b1 r cmd680_setup_channel.udma2_tbl +ffffffff828c71b8 r cmd680_setup_channel.dma_tbl +ffffffff828c71be r cmd680_setup_channel.pio_tbl +ffffffff828c71d0 r satalink_ba5_regmap +ffffffff828c7690 r sii3114_chansetup.channel_names +ffffffff828c76b0 r cy_pio_pulse +ffffffff828c76c0 r sis_udma133new_tim +ffffffff828c76e0 r sis_pio133new_tim +ffffffff828c76f4 r sis_dma133new_tim +ffffffff828c7700 r sis_udma66_tim +ffffffff828c7706 r sis_udma100new_tim +ffffffff828c770c r sis_udma133old_tim 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r ixl_722 +ffffffff828db510 r ixl_pf_aq_regs +ffffffff828db578 r ixl_710_decrepit +ffffffff828db5a0 r ixl_phy_type_map +ffffffff828db770 r ixl_speed_type_map +ffffffff828db7b0 r ixl_hmc_pack_rxq +ffffffff828db830 r ixl_hmc_pack_txq +ffffffff828db8a0 r ixl_sfp_ops +ffffffff828db8b8 r ixl_qsfp_ops +ffffffff828dc000 r dwqe_pci_devices +ffffffff828dc018 R dwqe_pci_ca +ffffffff828dd000 R xge_ca +ffffffff828dd028 R xge_devices +ffffffff828dd030 r xge_fix_mac +ffffffff828dd110 r xge_xena_dtx_cfg +ffffffff828dd170 r xge_herc_dtx_cfg +ffffffff828de000 R thtc_ca +ffffffff828de028 R tht_ca +ffffffff828de050 r thtc_devices +ffffffff828de068 r tht_link_state.interval +ffffffff828df000 R myx_ca +ffffffff828df028 R myx_devices +ffffffff828e0000 R oce_ca +ffffffff828e0030 R oce_devices +ffffffff828e1000 R dc_pci_ca +ffffffff828e2000 R epic_pci_ca +ffffffff828e2028 R epic_pci_devices +ffffffff828e3000 R ti_pci_ca +ffffffff828e3030 R ti_devices +ffffffff828e4000 R ne_pci_ca +ffffffff828e4030 R ne_pci_prod +ffffffff828e5000 R gem_pci_ca +ffffffff828e5030 R gem_pci_devices +ffffffff828e5050 r gem_promhdr +ffffffff828e5052 r gem_promdat +ffffffff828e505a r gem_promdat2 +ffffffff828e6000 R cas_ca +ffffffff828e6028 R cas_pci_devices +ffffffff828e6030 r cas_promhdr +ffffffff828e6032 r cas_promdat_sun +ffffffff828e603a r cas_promdat_ns +ffffffff828e6042 r cas_promdat2 +ffffffff828e7000 R sf_pci_ca +ffffffff828e7028 R sf_pci_products +ffffffff828e8000 R sis_ca +ffffffff828e8028 R sis_devices +ffffffff828e9000 R se_devices +ffffffff828e9008 R se_ca +ffffffff828ea000 R mbg_ca +ffffffff828ea030 R mbg_devices +ffffffff828eb000 R uhci_pci_ca +ffffffff828ec000 R ohci_pci_ca +ffffffff828ed000 R ehci_pci_ca +ffffffff828ee000 R xhci_pci_ca +ffffffff828ef000 R cbb_pci_ca +ffffffff828ef028 r pccbb_pcmcia_do_io_map.pcic_iowidth +ffffffff828f0000 R skc_devices +ffffffff828f0030 R skc_ca +ffffffff828f0058 R sk_ca +ffffffff828f1000 R mskc_devices +ffffffff828f10a8 R mskc_ca +ffffffff828f10d0 R msk_ca +ffffffff828f1100 r msk_mib +ffffffff828f2000 R puc_pci_ca +ffffffff828f3000 R puc_devs +ffffffff828f8000 R com_puc_ca +ffffffff828f8030 r puc_port_types +ffffffff828f9000 R lpt_puc_ca +ffffffff828fa000 R wi_pci_ca +ffffffff828fa030 r wi_pci_products +ffffffff828fb000 R an_pci_ca +ffffffff828fb030 R an_pci_devices +ffffffff828fc000 R iwi_devices +ffffffff828fc010 R iwi_ca +ffffffff828fd000 R wpi_ca +ffffffff828fd028 r wpi_devices +ffffffff828fd030 r wpi_rates +ffffffff828fd050 r wpi_rf_gain_5ghz +ffffffff828fd0a0 r wpi_dsp_gain_5ghz +ffffffff828fd0f0 r wpi_rf_gain_2ghz +ffffffff828fd140 r wpi_dsp_gain_2ghz +ffffffff828fd190 r wpi_pmgt +ffffffff828fd310 r wpi_bands +ffffffff828fe000 R iwn_mcs2ridx +ffffffff828fe020 R iwn_ca +ffffffff828fe050 r iwn_devices +ffffffff828fe0e8 r iwn4965_sensitivity_limits +ffffffff828fe124 r iwn5000_sensitivity_limits +ffffffff828fe160 r iwn5150_sensitivity_limits +ffffffff828fe19c r iwn1000_sensitivity_limits +ffffffff828fe1d8 r iwn6000_sensitivity_limits +ffffffff828fe214 r iwn2000_sensitivity_limits +ffffffff828fe250 r iwn_fw_errmsg +ffffffff828fe340 r iwn4965_set_txpower.tdiv +ffffffff828fe360 r iwn4965_rf_gain_5ghz +ffffffff828fe3d0 r iwn4965_dsp_gain_5ghz +ffffffff828fe440 r iwn4965_dsp_gain_2ghz +ffffffff828fe4b0 r iwn_pmgt +ffffffff828fe6f0 r iwn4965_post_alive.qid2fifo +ffffffff828fe700 r iwn_bands +ffffffff828fe770 r iwn_rates +ffffffff828fe820 r iwn4965_rf_gain_2ghz +ffffffff828ff000 R iwm_nvm_channels +ffffffff828ff030 R iwm_nvm_channels_8000 +ffffffff828ff070 R iwm_rates +ffffffff828ff0d0 R iwm_ht_mcs2ridx +ffffffff828ff110 R iwm_tid_to_ac +ffffffff828ff118 R iwm_ac_to_tx_fifo +ffffffff828ff120 R iwm_nvm_to_read +ffffffff828ff144 r iwm_set_hw_address_8000.reserved_mac +ffffffff828ff180 r iwm_sf_full_timeout +ffffffff828ff1b0 r iwm_sf_full_timeout_def +ffffffff828ff1e0 r advanced_lookup +ffffffff828ff320 r iwm_devices +ffffffff828ff360 R iwm_ca +ffffffff82900000 R iwx_9560_quz_a0_jf_b0_cfg +ffffffff82900020 R iwx_9560_qu_c0_jf_b0_cfg +ffffffff82900040 R iwx_qu_b0_hr1_b0 +ffffffff82900060 R iwx_qu_b0_hr_b0 +ffffffff82900080 R iwx_ax201_cfg_qu_hr +ffffffff829000a0 R iwx_qu_c0_hr1_b0 +ffffffff829000c0 R iwx_qu_c0_hr_b0 +ffffffff829000e0 R iwx_ax201_cfg_qu_c0_hr_b0 +ffffffff82900100 R iwx_quz_a0_hr1_b0 +ffffffff82900120 R iwx_ax201_cfg_quz_hr +ffffffff82900140 R iwx_cfg_so_a0_hr_b0 +ffffffff82900160 R iwx_cfg_quz_a0_hr_b0 +ffffffff82900180 R iwx_2ax_cfg_so_gf_a0 +ffffffff829001a0 R iwx_2ax_cfg_so_gf_a0_long +ffffffff829001c0 R iwx_2ax_cfg_so_gf4_a0 +ffffffff829001e0 R iwx_2ax_cfg_so_gf4_a0_long +ffffffff82900200 R iwx_2ax_cfg_ty_gf_a0 +ffffffff82900220 R iwx_2ax_cfg_so_jf_b0 +ffffffff82900240 R iwx_nvm_channels_8000 +ffffffff82900280 R iwx_rates +ffffffff829002e0 R iwx_mcs2ridx +ffffffff82900320 R iwx_tid_to_ac +ffffffff82900328 R iwx_ac_to_tx_fifo +ffffffff82900330 r iwx_nvm_channels_uhb +ffffffff8290039e r iwx_is_valid_mac_addr.reserved_mac +ffffffff829003b0 r iwx_sf_full_timeout +ffffffff829003e0 r iwx_sf_full_timeout_def +ffffffff82900410 r advanced_lookup +ffffffff82900550 r iwx_devices +ffffffff82900590 r iwx_dev_info_table +ffffffff82900e18 R iwx_ca +ffffffff82901000 R cmpci_ca +ffffffff82901028 R cmpci_hw_if +ffffffff829010e0 r cmpci_rate_table +ffffffff82901120 R cmpci_devices +ffffffff82901130 r cmpci_query_devinfo.mixer_port_names +ffffffff82901160 r cmpci_query_devinfo.mixer_classes +ffffffff82902000 R iha_pci_ca +ffffffff82902028 R iha_switch +ffffffff82903000 R pcscp_ca +ffffffff82904000 R bge_ca +ffffffff82904030 R bge_devices +ffffffff829041b0 r bge_revisions +ffffffff82904610 r bge_majorrevs +ffffffff82904790 r bge_kstat_tpl +ffffffff82905000 R bnx_devices +ffffffff82905020 R bnx_ca +ffffffff82906000 R vge_ca +ffffffff82906028 R vge_devices +ffffffff82907000 R stge_ca +ffffffff82907028 R stge_mii_bitbang_ops +ffffffff82907050 R stge_devices +ffffffff82908000 R nfe_ca +ffffffff82908030 R nfe_devices +ffffffff82909000 R et_devices +ffffffff82909008 R et_ca +ffffffff8290a000 R jme_devices +ffffffff8290a008 R jme_ca +ffffffff8290b000 R age_devices +ffffffff8290b008 R age_ca +ffffffff8290c000 R alc_devices +ffffffff8290c038 R alc_ca +ffffffff8290d000 R ale_devices +ffffffff8290d008 R ale_ca +ffffffff8290e000 R amdpm_ca +ffffffff8290e030 R amdpm_ids +ffffffff8290f000 R bce_ca +ffffffff8290f028 R bce_devices +ffffffff82910000 R ath_pci_ca +ffffffff82911000 R athn_pci_ca +ffffffff82911030 r athn_pci_devices +ffffffff82912000 R atw_pci_ca +ffffffff82912028 R atw_pci_devices +ffffffff82913000 R rtw_pci_ca +ffffffff82913030 R rtw_pci_products +ffffffff82914000 R rtwn_pci_ca +ffffffff82914030 r rtwn_pci_devices +ffffffff82914040 r rtl8188eu_mac +ffffffff829141b0 r rtl8192cu_mac +ffffffff82914310 r rtl8192ce_mac +ffffffff82914458 r rtl8188eu_bb_prog +ffffffff82914480 r rtl8723a_bb_prog +ffffffff829144a8 r rtl8192ce_bb_prog_1t +ffffffff829144d0 r rtl8192ce_bb_prog_2t +ffffffff82914500 r rtl8188eu_bb_regs +ffffffff82914680 r rtl8188eu_bb_vals +ffffffff82914980 r rtl8188eu_agc_vals +ffffffff82914b80 r rtl8723a_bb_regs +ffffffff82914d00 r rtl8723a_bb_vals +ffffffff82914ff0 r rtl8192ce_agc_vals +ffffffff82915270 r rtl8192ce_bb_regs +ffffffff829153f0 r rtl8192ce_bb_vals_1t +ffffffff829156e0 r rtl8192ce_bb_vals_2t +ffffffff82916000 R ral_pci_ca +ffffffff82916030 R ral_pci_devices +ffffffff82917000 R acx_pci_ca +ffffffff82917028 R acx_pci_devices +ffffffff82918000 R pgt_pci_ca +ffffffff82918028 R pgt_pci_devices +ffffffff82919000 R malo_pci_ca +ffffffff82919028 R malo_pci_devices +ffffffff8291a000 R bwi_pci_ca +ffffffff8291a030 R bwi_pci_devices +ffffffff8291b000 R piixpm_ca +ffffffff8291b030 R piixpm_ids +ffffffff8291c000 R vic_ca +ffffffff8291c028 R vic_devices +ffffffff8291d000 R vmx_devices +ffffffff8291d008 R vmx_ca +ffffffff8291d030 r vmx_tx_kstat_tpl +ffffffff8291d0d0 r vmx_kstat_rate +ffffffff8291d0e0 r vmx_rx_kstat_tpl +ffffffff8291e000 R vmwpvs_ca +ffffffff8291e028 R vmwpvs_switch +ffffffff8291f000 R lii_ca +ffffffff8291f028 R lii_devices +ffffffff82920000 R ichiic_ca +ffffffff82920030 R ichiic_ids +ffffffff82921000 R viapm_ca +ffffffff82921030 R viapm_ids +ffffffff82921070 r val_to_temp +ffffffff82921870 r val_to_uV.mult +ffffffff82922000 R amdiic_ca +ffffffff82922028 R amdiic_ids +ffffffff82923000 R nviic_ca +ffffffff82923030 R nviic_ids +ffffffff82924000 R sdhc_pci_ca +ffffffff82925000 R kate_ca +ffffffff82925030 r kate_proc +ffffffff82926000 R km_ca +ffffffff82926030 r km_devices +ffffffff82927000 R ksmn_ca +ffffffff82927030 r ksmn_devices +ffffffff82928000 R iosf_pci_ca +ffffffff82929000 R itherm_devices +ffffffff82929008 R itherm_ca +ffffffff8292a000 R pchtemp_ca +ffffffff8292a030 R pchtemp_devices +ffffffff8292b000 R rtsx_pci_ca +ffffffff8292c000 R xspd_ca +ffffffff8292c028 R xspd_devices +ffffffff8292d000 R virtio_pci_ca +ffffffff8292e000 R dwiic_pci_ca +ffffffff8292e030 R dwiic_pci_ids +ffffffff8292f000 R bwfm_pci_ca +ffffffff8292f030 r bwfm_pci_devices +ffffffff82930000 R ccp_pci_ca +ffffffff82930030 r ccp_pci_devices +ffffffff82931000 R bnxt_devices +ffffffff82931040 R bnxt_ca +ffffffff82932000 R mcx_ca +ffffffff82932030 r mcx_devices +ffffffff82932060 r mcx_rss_config +ffffffff829320d0 r mcx_eth_cap_map +ffffffff829322d0 r mcx_kstat_ppcnt_ieee8023 +ffffffff829322e8 r mcx_kstat_ppcnt_rfc2863 +ffffffff82932300 r mcx_kstat_ppcnt_rfc2819 +ffffffff82932318 r mcx_kstat_ppcnt_rfc3635 +ffffffff82932330 r mcx_ppcnt_ieee8023_tpl +ffffffff829324b0 r mcx_ppcnt_rfc2863_tpl +ffffffff829325c0 r mcx_ppcnt_rfc2819_tpl +ffffffff82932770 r mcx_ppcnt_rfc3635_tpl +ffffffff829328b0 r mcx_kstat_mtmp_tpl +ffffffff82932950 r mcx_kstat_mtmp_rate +ffffffff82932960 r mcx_queue_kstat_tpl +ffffffff82933000 R iavf_ca +ffffffff82933030 r iavf_devices +ffffffff82933040 r iavf_aq_regs +ffffffff829330b0 r iavf_link_speeds +ffffffff82934000 R rge_ca +ffffffff82934028 R rge_devices +ffffffff82934030 r rge_phy_config_mac_cfg3.mac_cfg3_a438_value +ffffffff82934050 r rge_phy_config_mac_cfg3.mac_cfg3_b88e_value +ffffffff829340b0 r rtl8125_mac_cfg3_mcu +ffffffff82934950 r rtl8125_mac_cfg5_mcu +ffffffff82935970 r rtl8125_mac_bps +ffffffff82935d70 r rtl8125b_mac_bps +ffffffff82935f98 r rge_kstats_tpl +ffffffff82937000 R igc_devices +ffffffff82937040 R igc_ca +ffffffff82938000 R ngbe_devices +ffffffff82938008 R ngbe_ca +ffffffff82939000 R com_pci_ca +ffffffff82939030 R com_pci_ids +ffffffff8293a000 r agp_attach.agp_max +ffffffff8293a048 R agp_ca +ffffffff8293b000 R intagp_ca +ffffffff8293c000 r drm_plane_create_rotation_property.props +ffffffff8293d000 r drm_bridge_priv_state_funcs +ffffffff8293f000 r color_encoding_name +ffffffff8293f020 r color_range_name +ffffffff82940000 r drm_subpixel_enum_list +ffffffff82940060 r drm_dpms_enum_list +ffffffff829400a0 r drm_dvi_i_select_enum_list +ffffffff829400d0 r drm_dvi_i_subconnector_enum_list +ffffffff82940100 r drm_tv_select_enum_list +ffffffff82940150 r drm_tv_subconnector_enum_list +ffffffff829401a0 r drm_dp_subconnector_enum_list +ffffffff82940210 r drm_link_status_enum_list +ffffffff82940230 r drm_scaling_mode_enum_list +ffffffff82940270 r drm_aspect_ratio_enum_list +ffffffff829402a0 r hdmi_colorspaces +ffffffff82940370 r dp_colorspaces +ffffffff82940450 r drm_content_type_enum_list +ffffffff829404a0 r drm_panel_orientation_enum_list +ffffffff829404e0 r privacy_screen_enum +ffffffff82941000 r drm_crtc_fence_ops +ffffffff82942000 r drm_dmt_modes +ffffffff82944940 r edid_cea_modes_1 +ffffffff829484d0 r edid_cea_modes_193 +ffffffff82949180 r edid_quirk_list +ffffffff82949360 r edid_4k_modes +ffffffff829495c0 r edid_est_modes +ffffffff82949dc0 r est3_modes +ffffffff82949f20 r stereo_mandatory_modes +ffffffff82949fa0 r extra_modes +ffffffff8294a000 r drm_encoder_enum_list +ffffffff8294b000 r drm_fbdev_client_funcs +ffffffff8294b020 r drm_fb_helper_generic_funcs +ffffffff8294b028 r drm_fbdev_fb_ops +ffffffff8294c000 r drm_fb_xrgb8888_to_rgb332.dst_pixsize +ffffffff8294c004 r drm_fb_xrgb8888_to_rgb565.dst_pixsize +ffffffff8294c008 r drm_fb_xrgb8888_to_rgb888.dst_pixsize +ffffffff8294c00c r drm_fb_xrgb8888_to_xrgb2101010.dst_pixsize +ffffffff8294c010 r drm_fb_xrgb8888_to_gray8.dst_pixsize +ffffffff8294c014 r drm_fb_rgb888_to_xrgb8888.dst_pixsize +ffffffff8294c018 r drm_fb_rgb565_to_xrgb8888.dst_pixsize +ffffffff8294d000 r __drm_format_info.formats +ffffffff8294e000 R drm_pgops +ffffffff8294f000 r drm_ioctls +ffffffff82951000 r dma_fence_stub_ops +ffffffff82951038 R dma_fence_array_ops +ffffffff82951070 R dma_fence_chain_ops +ffffffff829510a8 R dmabufops +ffffffff829510e0 R syncfileops +ffffffff82952000 r drm_plane_type_enum_list +ffffffff82953000 r drm_mode_status_names +ffffffff82954000 r primary_plane_funcs +ffffffff82954068 r safe_modeset_formats +ffffffff82955000 r orientation_data +ffffffff82958718 r lcd800x1280_rightside_up +ffffffff82958730 r lcd720x1280_rightside_up +ffffffff82958748 r lcd800x1280_leftside_up +ffffffff82958760 r lcd1080x1920_leftside_up +ffffffff82958778 r lcd1200x1920_rightside_up +ffffffff82958790 r gpd_micropc +ffffffff829587a8 r gpd_pocket +ffffffff829587c0 r gpd_pocket2 +ffffffff829587d8 r gpd_win +ffffffff829587f0 r gpd_win2 +ffffffff82958808 r itworks_tw891 +ffffffff82958820 r lcd1600x2560_rightside_up +ffffffff82958838 r onegx1_pro +ffffffff82958850 r lcd1600x2560_leftside_up +ffffffff82958868 r lcd1280x1920_rightside_up +ffffffff82958880 r gpd_onemix2s +ffffffff82958898 r .compoundliteral +ffffffff829588a8 r .compoundliteral.5 +ffffffff829588d0 r .compoundliteral.9 +ffffffff829588f0 r .compoundliteral.17 +ffffffff82958930 r .compoundliteral.21 +ffffffff82958950 r .compoundliteral.23 +ffffffff82958960 r .compoundliteral.25 +ffffffff82958970 r .compoundliteral.29 +ffffffff82959000 r drm_gem_prime_dmabuf_ops +ffffffff8295b000 r is_hdmi_adaptor.dp_dual_mode_hdmi_id +ffffffff8295c000 r drm_dp_phy_name.phy_names +ffffffff8295c048 r drm_dp_i2c_algo +ffffffff8295c058 r drm_dp_i2c_lock_ops +ffffffff8295c070 r dp_aux_bl_ops +ffffffff8295c090 r dpcd_quirk_list +ffffffff8295c320 r drm_dp_psr_setup_time.psr_setup_time_us +ffffffff8295d000 R drm_dp_mst_topology_state_funcs +ffffffff8295d020 r drm_dp_mst_req_type_str.req_type_str +ffffffff8295d1f0 r drm_dp_mst_sideband_tx_state_str.sideband_reason_str +ffffffff8295d220 r drm_dp_mst_nak_reason_str.nak_reason_str +ffffffff8295d278 r drm_dp_mst_i2c_algo +ffffffff8295e000 r hdmi_colorimetry_val +ffffffff8295f000 r ttm_bo_init_reserved.sys_mem +ffffffff82960000 r ttm_bo_pipeline_gutting.sys_mem +ffffffff82961018 R ttm_bo_vm_ops +ffffffff82962000 r ttm_range_manager_func +ffffffff82963018 r ttm_kmap_iter_io_ops +ffffffff82963030 r ttm_kmap_iter_linear_io_ops +ffffffff82964000 r ttm_sys_manager_func +ffffffff82965000 r ttm_kmap_iter_tt_ops +ffffffff82966000 r drm_sched_fence_ops_scheduled +ffffffff82966038 r drm_sched_fence_ops_finished +ffffffff82967000 R ch7017_ops +ffffffff82968000 R ch7xxx_ops +ffffffff82968060 r ch7xxx_ids +ffffffff82969000 R ivch_ops +ffffffff82969060 r backup_addresses +ffffffff8296a000 R ns2501_ops +ffffffff8296a060 r mode_agnostic_values +ffffffff8296a0e0 r ns2501_modes +ffffffff8296b000 R sil164_ops +ffffffff8296c000 R tfp410_ops +ffffffff8296d000 r chv_dpll +ffffffff8296d050 r vlv_dpll +ffffffff8296d0a0 r g4x_dpll +ffffffff8296d0f0 r pch_dpll +ffffffff8296d138 r intel_dp_enc_funcs +ffffffff8296e000 r intel_hdmi_enc_funcs +ffffffff8296f000 r vlv_primary_formats +ffffffff8296f030 r ivb_primary_formats +ffffffff8296f050 r i965_primary_formats +ffffffff8296f070 r i8xx_primary_formats +ffffffff8296f080 r i965_plane_funcs +ffffffff8296f0e8 r i8xx_plane_funcs +ffffffff82970000 r gen11_dsi_encoder_funcs +ffffffff82970020 r gen11_dsi_connector_funcs +ffffffff82970098 r gen11_dsi_connector_helper_funcs +ffffffff829700e8 r gen11_dsi_host_ops +ffffffff82971000 r intel_plane_helper_funcs +ffffffff82972000 r g4x_audio_funcs +ffffffff82972010 r ilk_audio_funcs +ffffffff82972020 r hsw_audio_funcs +ffffffff82972030 r hdmi_audio_clock +ffffffff829720a0 r dp_aud_n_m +ffffffff82972250 r hdmi_aud_ncts_36bpp +ffffffff82972330 r hdmi_aud_ncts_30bpp +ffffffff82972410 r hdmi_aud_ncts_24bpp +ffffffff82973000 r intel_backlight_device_ops +ffffffff82973018 r bxt_pwm_funcs +ffffffff82973048 r cnp_pwm_funcs +ffffffff82973078 r lpt_pwm_funcs +ffffffff829730a8 r spt_pwm_funcs +ffffffff829730d8 r pch_pwm_funcs +ffffffff82973108 r ext_pwm_funcs +ffffffff82973138 r vlv_pwm_funcs +ffffffff82973168 r i965_pwm_funcs +ffffffff82973198 r i9xx_pwm_funcs +ffffffff829731c8 r pwm_bl_funcs +ffffffff82974000 r bdb_blocks +ffffffff82974160 r translate_iboost.mapping +ffffffff82974163 r adlp_ddc_pin_map +ffffffff8297416a r adls_ddc_pin_map +ffffffff82974170 r rkl_pch_tgp_ddc_pin_map +ffffffff82974175 r icp_ddc_pin_map +ffffffff8297417f r cnp_ddc_pin_map +ffffffff82975000 r mtl_sa_info +ffffffff82975006 r adlp_sa_info +ffffffff8297500c r adls_sa_info +ffffffff82975012 r rkl_sa_info +ffffffff82975018 r tgl_sa_info +ffffffff82975020 r intel_bw_funcs +ffffffff82976000 r intel_cdclk_funcs +ffffffff82976010 r tgl_cdclk_funcs +ffffffff82976030 r dg2_cdclk_table +ffffffff829760e0 r adlp_a_step_cdclk_table +ffffffff82976160 r adlp_cdclk_table +ffffffff82976220 r rkl_cdclk_table +ffffffff82976310 r icl_cdclk_table +ffffffff829763f8 r ehl_cdclk_funcs +ffffffff82976418 r icl_cdclk_funcs +ffffffff82976438 r bxt_cdclk_funcs +ffffffff82976460 r glk_cdclk_table +ffffffff82976490 r bxt_cdclk_table +ffffffff829764d8 r skl_cdclk_funcs +ffffffff829764f8 r bdw_cdclk_funcs +ffffffff82976518 r hsw_cdclk_funcs +ffffffff82976538 r chv_cdclk_funcs +ffffffff82976558 r vlv_cdclk_funcs +ffffffff82976578 r fixed_400mhz_cdclk_funcs +ffffffff82976598 r ilk_cdclk_funcs +ffffffff829765b8 r gm45_cdclk_funcs +ffffffff829765d8 r g33_cdclk_funcs +ffffffff829765f8 r i965gm_cdclk_funcs +ffffffff82976618 r pnv_cdclk_funcs +ffffffff82976638 r i945gm_cdclk_funcs +ffffffff82976658 r i915gm_cdclk_funcs +ffffffff82976678 r i915g_cdclk_funcs +ffffffff82976698 r i865g_cdclk_funcs +ffffffff829766b8 r i85x_cdclk_funcs +ffffffff829766d8 r i845g_cdclk_funcs +ffffffff829766f8 r i830_cdclk_funcs +ffffffff82976718 r g33_get_cdclk.div_3200 +ffffffff8297671e r g33_get_cdclk.div_4000 +ffffffff82976724 r g33_get_cdclk.div_4800 +ffffffff8297672a r g33_get_cdclk.div_5333 +ffffffff82976730 r i965gm_get_cdclk.div_3200 +ffffffff82976733 r i965gm_get_cdclk.div_4000 +ffffffff82976736 r i965gm_get_cdclk.div_5333 +ffffffff82977000 r chv_color_funcs +ffffffff82977028 r i965_color_funcs +ffffffff82977050 r i9xx_color_funcs +ffffffff82977078 r icl_color_funcs +ffffffff829770a0 r glk_color_funcs +ffffffff829770c8 r skl_color_funcs +ffffffff829770f0 r bdw_color_funcs +ffffffff82977118 r hsw_color_funcs +ffffffff82977140 r ivb_color_funcs +ffffffff82977168 r ilk_color_funcs +ffffffff82977190 r ilk_csc_off_zero +ffffffff829771a0 r ilk_csc_coeff_rgb_to_ycbcr +ffffffff829771b2 r ilk_csc_postoff_rgb_to_ycbcr +ffffffff829771c0 r ilk_csc_coeff_limited_range +ffffffff829771d2 r ilk_csc_postoff_limited_range +ffffffff829771e0 r ilk_csc_coeff_identity +ffffffff82978000 r icl_procmon_values +ffffffff82979000 r force_audio_names +ffffffff82979040 r broadcast_rgb_names +ffffffff8297a000 r intel_crt_connector_funcs +ffffffff8297a078 r intel_crt_enc_funcs +ffffffff8297a0a0 r intel_spurious_crt_detect +ffffffff8297a4a8 r intel_crt_connector_helper_funcs +ffffffff8297b000 r g4x_crtc_funcs +ffffffff8297b0c0 r i965_crtc_funcs +ffffffff8297b180 r i915gm_crtc_funcs +ffffffff8297b240 r i915_crtc_funcs +ffffffff8297b300 r i8xx_crtc_funcs +ffffffff8297b3c0 r bdw_crtc_funcs +ffffffff8297b480 r ilk_crtc_funcs +ffffffff8297c000 r output_type_str +ffffffff8297c060 r output_format_str +ffffffff8297d000 r intel_cursor_plane_funcs +ffffffff8297d068 r intel_cursor_formats +ffffffff8297e000 r intel_ddi_funcs +ffffffff8297e020 r index_to_dp_signal_levels +ffffffff8297e030 r gen9_chicken_trans_reg_by_port.trans +ffffffff8297f000 r tgl_combo_phy_trans_edp_hbr2_hobl +ffffffff8297f010 r _tgl_combo_phy_trans_edp_hbr2_hobl +ffffffff8297f080 r dg2_snps_trans_uhbr +ffffffff8297f090 r dg2_snps_trans +ffffffff8297f0a0 r _dg2_snps_trans_uhbr +ffffffff8297f160 r _dg2_snps_trans +ffffffff8297f1d8 r icl_combo_phy_trans_hdmi +ffffffff8297f1f0 r _icl_combo_phy_trans_hdmi +ffffffff8297f248 r adlp_combo_phy_trans_edp_hbr3 +ffffffff8297f258 r adlp_combo_phy_trans_edp_up_to_hbr2 +ffffffff8297f270 r _adlp_combo_phy_trans_dp_hbr2_edp_hbr3 +ffffffff8297f2f0 r _adlp_combo_phy_trans_edp_hbr2 +ffffffff8297f368 r adlp_combo_phy_trans_dp_hbr2_hbr3 +ffffffff8297f378 r adlp_combo_phy_trans_dp_hbr +ffffffff8297f390 r _adlp_combo_phy_trans_dp_hbr2_hbr3 +ffffffff8297f410 r _adlp_combo_phy_trans_dp_hbr +ffffffff8297f488 r tgl_dkl_phy_trans_hdmi +ffffffff8297f4a0 r _tgl_dkl_phy_trans_hdmi +ffffffff8297f518 r adlp_dkl_phy_trans_dp_hbr2_hbr3 +ffffffff8297f528 r adlp_dkl_phy_trans_dp_hbr +ffffffff8297f540 r _adlp_dkl_phy_trans_dp_hbr2_hbr3 +ffffffff8297f5c0 r _adlp_dkl_phy_trans_dp_hbr +ffffffff8297f638 r adls_combo_phy_trans_edp_hbr3 +ffffffff8297f648 r adls_combo_phy_trans_edp_hbr2 +ffffffff8297f660 r _adls_combo_phy_trans_edp_hbr3 +ffffffff8297f6e0 r _adls_combo_phy_trans_edp_hbr2 +ffffffff8297f758 r adls_combo_phy_trans_dp_hbr2_hbr3 +ffffffff8297f768 r tgl_combo_phy_trans_dp_hbr +ffffffff8297f780 r _adls_combo_phy_trans_dp_hbr2_hbr3 +ffffffff8297f800 r _tgl_combo_phy_trans_dp_hbr +ffffffff8297f878 r icl_combo_phy_trans_dp_hbr2_edp_hbr3 +ffffffff8297f888 r icl_combo_phy_trans_edp_hbr2 +ffffffff8297f8a0 r _icl_combo_phy_trans_dp_hbr2_edp_hbr3 +ffffffff8297f920 r _icl_combo_phy_trans_edp_hbr2 +ffffffff8297f998 r rkl_combo_phy_trans_dp_hbr2_hbr3 +ffffffff8297f9a8 r rkl_combo_phy_trans_dp_hbr +ffffffff8297f9c0 r _rkl_combo_phy_trans_dp_hbr2_hbr3 +ffffffff8297fa40 r _rkl_combo_phy_trans_dp_hbr +ffffffff8297fab8 r dg1_combo_phy_trans_dp_hbr2_hbr3 +ffffffff8297fac8 r dg1_combo_phy_trans_dp_rbr_hbr +ffffffff8297fae0 r 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r ntsc_j_csc_svideo +ffffffff829a8b94 r pal_m_levels_composite +ffffffff829a8b9a r pal_m_levels_svideo +ffffffff829a8ba0 r pal_m_csc_composite +ffffffff829a8bb8 r pal_m_csc_svideo +ffffffff829a8bd0 r pal_n_levels_composite +ffffffff829a8bd6 r pal_n_levels_svideo +ffffffff829a8bdc r pal_n_csc_composite +ffffffff829a8bf4 r pal_n_csc_svideo +ffffffff829a8c0c r pal_levels_composite +ffffffff829a8c12 r pal_levels_svideo +ffffffff829a8c18 r pal_csc_composite +ffffffff829a8c30 r pal_csc_svideo +ffffffff829a9000 r calculate_rc_params.ofs_und6 +ffffffff829a900f r calculate_rc_params.ofs_und12 +ffffffff829a901e r calculate_rc_params.ofs_und15 +ffffffff829a9030 r rc_parameters +ffffffff829aa000 r gen12_plane_funcs +ffffffff829aa068 r skl_plane_funcs +ffffffff829aa0d0 r icl_program_input_csc.input_csc_matrix +ffffffff829aa110 r icl_hdr_plane_formats +ffffffff829aa190 r icl_sdr_y_plane_formats +ffffffff829aa1f0 r icl_sdr_uv_plane_formats +ffffffff829aa260 r glk_planar_formats +ffffffff829aa2b0 r skl_plane_formats +ffffffff829aa2f0 r skl_planar_formats +ffffffff829ab000 r skl_wm_funcs +ffffffff829ab038 r intel_dbuf_funcs +ffffffff829ab050 r dg2_allowed_dbufs +ffffffff829ab0b0 r adlp_allowed_dbufs +ffffffff829ab120 r tgl_allowed_dbufs +ffffffff829ab180 r icl_allowed_dbufs +ffffffff829ac000 r intel_dsi_funcs +ffffffff829ac020 r intel_dsi_host_ops +ffffffff829ac038 r intel_dsi_connector_funcs +ffffffff829ac0b0 r intel_dsi_connector_helper_funcs +ffffffff829ad000 r lfsr_converts +ffffffff829ae000 r clflush_ops +ffffffff829af000 r create_extensions +ffffffff829af010 r set_proto_ctx_engines_extensions +ffffffff829b0000 r create_extensions +ffffffff829b1000 r i915_dmabuf_ops +ffffffff829b3000 r execbuf_extensions +ffffffff829b3010 r user_ring_map +ffffffff829b4000 r i915_gem_object_internal_ops +ffffffff829b5000 r i915_gem_object_funcs +ffffffff829b6000 R i915_gem_shmem_ops +ffffffff829b6080 r shmem_region_ops +ffffffff829b7000 r i915_region_stolen_lmem_ops +ffffffff829b7020 r i915_region_stolen_smem_ops +ffffffff829b7040 r i915_gem_object_stolen_ops +ffffffff829b8000 r i915_gem_ttm_obj_ops +ffffffff829b8080 r ttm_system_region_ops +ffffffff829b80a0 r sys_placement_flags +ffffffff829b80b0 r tt_rsgt_ops +ffffffff829b9000 r dma_fence_memcpy_ops +ffffffff829ba000 r i915_ttm_recover_region.recover_ops +ffffffff829ba020 r i915_ttm_backup_region.backup_ops +ffffffff829ba028 r i915_ttm_restore_region.restore_ops +ffffffff829bb000 r pd_dummy_obj_ops +ffffffff829bb080 r pd_vma_ops +ffffffff829bc000 r gen6_null_state_relocs +ffffffff829bc020 r gen6_null_state_batch +ffffffff829bc470 R gen6_null_state +ffffffff829bd000 r hsw_clear_kernel +ffffffff829bd340 r ivb_clear_kernel +ffffffff829be000 r gen7_null_state_relocs +ffffffff829be018 R gen7_null_state +ffffffff829be030 r gen7_null_state_batch +ffffffff829bf000 r gen8_null_state_relocs +ffffffff829bf018 R gen8_null_state +ffffffff829bf030 r gen8_null_state_batch +ffffffff829c0000 r gen9_null_state_relocs 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spectre_rlc_save_restore_register_list +ffffffff829fc170 r kalindi_rlc_save_restore_register_list +ffffffff829fc680 r ci_cs_data +ffffffff829fc6a0 r ci_SECT_CONTEXT_defs +ffffffff829fc720 r ci_SECT_CONTEXT_def_1 +ffffffff829fca70 r ci_SECT_CONTEXT_def_3 +ffffffff829fca90 r ci_SECT_CONTEXT_def_4 +ffffffff829fcd04 r ci_SECT_CONTEXT_def_5 +ffffffff829fcd0c r ci_SECT_CONTEXT_def_6 +ffffffff829fcd10 r ci_SECT_CONTEXT_def_2 +ffffffff829fd160 r ci_SECT_CONTEXT_def_7 +ffffffff829fd510 r cik_default_state +ffffffff829ff000 r dce3_2_afmt_write_sad_regs.eld_reg_to_type +ffffffff82a00000 r dce6_afmt_write_sad_regs.eld_reg_to_type +ffffffff82a01000 r ni_tx_offsets +ffffffff82a01020 r evergreen_dp_offsets +ffffffff82a01040 r evergreen_disp_int_status +ffffffff82a01060 r evergreen_golden_registers +ffffffff82a01260 r evergreen_golden_registers2 +ffffffff82a01310 r cypress_mgcg_init +ffffffff82a01a10 r juniper_mgcg_init +ffffffff82a01e80 r redwood_mgcg_init +ffffffff82a021b0 r cedar_golden_registers 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thermal_controller_names +ffffffff82a1f020 r default_primarydac_adj +ffffffff82a1f120 r default_tvdac_adj +ffffffff82a1f220 r default_tmds_pll +ffffffff82a20000 r radeon_dp_connector_funcs +ffffffff82a20078 r radeon_dp_connector_helper_funcs +ffffffff82a200c8 r radeon_lvds_bridge_connector_funcs +ffffffff82a20140 r radeon_vga_connector_funcs +ffffffff82a201b8 r radeon_vga_connector_helper_funcs +ffffffff82a20208 r radeon_dvi_connector_funcs +ffffffff82a20280 r radeon_dvi_connector_helper_funcs +ffffffff82a202d0 r radeon_edp_connector_funcs +ffffffff82a20348 r radeon_tv_connector_funcs +ffffffff82a203c0 r radeon_tv_connector_helper_funcs +ffffffff82a20410 r radeon_lvds_connector_funcs +ffffffff82a20488 r radeon_lvds_connector_helper_funcs +ffffffff82a21000 r radeon_family_name +ffffffff82a213f0 r radeon_px_quirk_list +ffffffff82a22000 r radeon_fb_funcs +ffffffff82a22018 r radeon_mode_funcs +ffffffff82a22060 r radeon_tmds_pll_enum_list +ffffffff82a22080 r radeon_tv_std_enum_list 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radeon_legacy_tmds_int_enc_funcs +ffffffff82a2f0c0 r radeon_legacy_tmds_int_helper_funcs +ffffffff82a2f128 r radeon_legacy_primary_dac_enc_funcs +ffffffff82a2f148 r radeon_legacy_primary_dac_helper_funcs +ffffffff82a2f1b0 r radeon_legacy_tv_dac_enc_funcs +ffffffff82a2f1d0 r radeon_legacy_tv_dac_helper_funcs +ffffffff82a2f238 r radeon_legacy_tmds_ext_enc_funcs +ffffffff82a2f258 r radeon_legacy_tmds_ext_helper_funcs +ffffffff82a30000 r SLOPE_value +ffffffff82a30030 r YCOEF_EN_value +ffffffff82a30060 r YCOEF_value +ffffffff82a30090 r available_tv_modes +ffffffff82a30110 r hor_timing_NTSC +ffffffff82a30150 r vert_timing_NTSC +ffffffff82a30190 r hor_timing_PAL +ffffffff82a301d0 r vert_timing_PAL +ffffffff82a32000 r radeon_pm_state_type_name +ffffffff82a33000 r radeon_evict_flags.placements +ffffffff82a36000 r rs600_reg_safe_bm +ffffffff82a38000 r rv515_reg_safe_bm +ffffffff82a39000 r dll_speed_table +ffffffff82a3a000 r r7xx_golden_registers +ffffffff82a3a090 r r7xx_golden_dyn_gpr_registers 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tahiti_mgcg_cgcg_init +ffffffff82a3ed98 r tahiti_golden_registers2 +ffffffff82a3edb0 r pitcairn_golden_registers +ffffffff82a3ef00 r pitcairn_golden_rlc_registers +ffffffff82a3ef40 r pitcairn_mgcg_cgcg_init +ffffffff82a3f3b0 r verde_golden_registers +ffffffff82a3f620 r verde_golden_rlc_registers +ffffffff82a3f660 r verde_mgcg_cgcg_init +ffffffff82a3fae0 r oland_golden_registers +ffffffff82a3fc30 r oland_golden_rlc_registers +ffffffff82a3fc70 r oland_mgcg_cgcg_init +ffffffff82a40000 r hainan_golden_registers +ffffffff82a4012c r hainan_golden_registers2 +ffffffff82a40140 r hainan_mgcg_cgcg_init +ffffffff82a404b0 r verde_rlc_save_restore_register_list +ffffffff82a40820 r si_cs_data +ffffffff82a40840 r si_SECT_CONTEXT_defs +ffffffff82a408c0 r si_SECT_CONTEXT_def_1 +ffffffff82a40c10 r si_SECT_CONTEXT_def_3 +ffffffff82a40c30 r si_SECT_CONTEXT_def_4 +ffffffff82a40ea4 r si_SECT_CONTEXT_def_5 +ffffffff82a40ea8 r si_SECT_CONTEXT_def_6 +ffffffff82a40eb0 r si_SECT_CONTEXT_def_2 +ffffffff82a412f0 r si_SECT_CONTEXT_def_7 +ffffffff82a416a0 r mc_cg_registers +ffffffff82a416d0 r si_default_state +ffffffff82a42000 r cac_weights_tahiti +ffffffff82a424d0 r lcac_tahiti +ffffffff82a42ba0 r cac_override_tahiti +ffffffff82a42bb4 r powertune_data_tahiti +ffffffff82a42bf0 r dte_data_tahiti +ffffffff82a42cc0 r dte_data_new_zealand +ffffffff82a42d90 r dte_data_malta +ffffffff82a42e60 r lcac_pitcairn +ffffffff82a43530 r cac_override_pitcairn +ffffffff82a43544 r powertune_data_pitcairn +ffffffff82a43580 r lcac_cape_verde +ffffffff82a439d0 r cac_override_cape_verde +ffffffff82a439e4 r powertune_data_cape_verde +ffffffff82a43a20 r cac_weights_cape_verde_pro +ffffffff82a43ef0 r cac_weights_heathrow +ffffffff82a443c0 r cac_weights_chelsea_xt +ffffffff82a44890 r cac_weights_chelsea_pro +ffffffff82a44d60 r cac_weights_cape_verde +ffffffff82a45230 r cac_weights_mars_pro +ffffffff82a45700 r lcac_mars_pro +ffffffff82a45a60 r cac_override_oland +ffffffff82a45a74 r powertune_data_mars_pro +ffffffff82a45ab0 r cac_weights_mars_xt +ffffffff82a45f80 r cac_weights_oland_pro +ffffffff82a46450 r cac_weights_oland_xt +ffffffff82a46920 r lcac_oland +ffffffff82a46c7c r powertune_data_oland +ffffffff82a46cc0 r cac_weights_hainan +ffffffff82a47184 r powertune_data_hainan +ffffffff82a471c0 r dte_data_aruba_pro +ffffffff82a47290 r dte_data_tahiti_pro +ffffffff82a47360 r dte_data_curacao_pro +ffffffff82a47430 r dte_data_neptune_xt +ffffffff82a47500 r dte_data_sun_xt +ffffffff82a475d0 r dte_data_venus_xtx +ffffffff82a476a0 r dte_data_venus_xt +ffffffff82a47770 r dte_data_venus_pro +ffffffff82a47840 r dte_data_mars_pro +ffffffff82a48000 r si_program_jump_on_start.data +ffffffff82a49000 r sumo_dtc +ffffffff82a4a000 r trinity_mgcg_shls_default +ffffffff82a4a380 r trinity_sysls_enable +ffffffff82a4a450 r trinity_sysls_disable +ffffffff82a4c000 r GC_BASE +ffffffff82a4c0a8 r HDP_BASE +ffffffff82a4c150 r MMHUB_BASE +ffffffff82a4c1f8 r ATHUB_BASE +ffffffff82a4c2a0 r NBIO_BASE +ffffffff82a4c348 r MP0_BASE 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amdgpu_fb_funcs_atomic +ffffffff82a5a448 r amdgpu_fb_funcs +ffffffff82a5b000 R amdgpu_dmabuf_ops +ffffffff82a5c000 R amdgpu_ioctls_kms +ffffffff82a5c210 R amdgpu_ca +ffffffff82a5c240 r pciidlist +ffffffff82a5d130 r amdgpu_unsupported_pciidlist +ffffffff82a5d6b0 r amdgpu_kms_driver +ffffffff82a5e000 r amdgpu_job_fence_ops +ffffffff82a5e038 r amdgpu_fence_ops +ffffffff82a5f000 r amdgpu_gem_object_funcs +ffffffff82a5f060 r amdgpu_gem_vm_ops +ffffffff82a61000 R amdgpu_gtt_mgr_attr_group +ffffffff82a61018 r amdgpu_gtt_mgr_func +ffffffff82a62000 r amdgpu_atombios_i2c_algo +ffffffff82a63000 R amdgpu_sched_ops +ffffffff82a65000 r amdgpu_vram_names +ffffffff82a66000 r amdgpu_preempt_mgr_func +ffffffff82a67000 R psp_ip_funcs +ffffffff82a670a0 R psp_v3_1_ip_block +ffffffff82a670b8 R psp_v10_0_ip_block +ffffffff82a670d0 R psp_v11_0_ip_block +ffffffff82a670e8 R psp_v11_0_8_ip_block +ffffffff82a67100 R psp_v12_0_ip_block +ffffffff82a67118 R psp_v13_0_ip_block +ffffffff82a67130 R psp_v13_0_4_ip_block +ffffffff82a69000 r amdgpu_evict_flags.placements +ffffffff82a6d000 R amdgpu_vkms_ip_block +ffffffff82a6f000 R amdgpu_vm_cpu_funcs +ffffffff82a71000 R amdgpu_vm_sdma_funcs +ffffffff82a72000 R amdgpu_vram_mgr_attr_group +ffffffff82a72018 r amdgpu_vram_mgr_func +ffffffff82a73000 r xgmi_pcs_err_status_reg_arct +ffffffff82a74000 r GC_BASE +ffffffff82a740c0 r HDP_BASE +ffffffff82a74180 r MMHUB_BASE +ffffffff82a74240 r ATHUB_BASE +ffffffff82a74300 r NBIF0_BASE +ffffffff82a743c0 r MP0_BASE +ffffffff82a74480 r MP1_BASE +ffffffff82a74540 r UVD_BASE +ffffffff82a74600 r DF_BASE +ffffffff82a746c0 r OSSSYS_BASE +ffffffff82a74780 r SDMA0_BASE +ffffffff82a74840 r SDMA1_BASE +ffffffff82a74900 r SDMA2_BASE +ffffffff82a749c0 r SDMA3_BASE +ffffffff82a74a80 r SDMA4_BASE +ffffffff82a74b40 r SDMA5_BASE +ffffffff82a74c00 r SDMA6_BASE +ffffffff82a74cc0 r SDMA7_BASE +ffffffff82a74d80 r SMUIO_BASE +ffffffff82a74e40 r THM_BASE +ffffffff82a74f00 r UMC_BASE +ffffffff82a74fc0 r RSMU_BASE +ffffffff82a76000 r cz_ih_ip_funcs +ffffffff82a760a0 R cz_ih_ip_block +ffffffff82a760b8 r cz_ih_funcs +ffffffff82a77000 r crtc_offsets +ffffffff82a77020 r dce_v10_0_ip_funcs +ffffffff82a770c0 R dce_v10_0_ip_block +ffffffff82a770d8 R dce_v10_1_ip_block +ffffffff82a770f0 r dce_v10_0_display_funcs +ffffffff82a77150 r hpd_offsets +ffffffff82a77168 r dce_v10_0_encoder_funcs +ffffffff82a77188 r dce_v10_0_dac_helper_funcs +ffffffff82a771f0 r dce_v10_0_dig_helper_funcs +ffffffff82a77258 r dce_v10_0_ext_helper_funcs +ffffffff82a772c0 r dce_v10_0_audio_write_sad_regs.eld_reg_to_type +ffffffff82a772f0 r dce_v10_0_crtc_irq_funcs +ffffffff82a77300 r dce_v10_0_pageflip_irq_funcs +ffffffff82a77310 r dce_v10_0_hpd_irq_funcs +ffffffff82a77320 r interrupt_status_offsets +ffffffff82a77380 r dce_v10_0_crtc_funcs +ffffffff82a77440 r dce_v10_0_crtc_helper_funcs +ffffffff82a774c0 r vga_control_regs +ffffffff82a774e0 r dig_offsets +ffffffff82a77500 r pin_offsets +ffffffff82a77520 r fiji_mgcg_cgcg_init +ffffffff82a77540 r golden_settings_fiji_a10 +ffffffff82a77570 r tonga_mgcg_cgcg_init +ffffffff82a77590 r golden_settings_tonga_a11 +ffffffff82a78000 r crtc_offsets +ffffffff82a78020 r dce_v11_0_ip_funcs +ffffffff82a780c0 R dce_v11_0_ip_block +ffffffff82a780d8 R dce_v11_2_ip_block +ffffffff82a780f0 r dce_v11_0_display_funcs +ffffffff82a78150 r hpd_offsets +ffffffff82a78168 r dce_v11_0_encoder_funcs +ffffffff82a78188 r dce_v11_0_dac_helper_funcs +ffffffff82a781f0 r dce_v11_0_dig_helper_funcs +ffffffff82a78258 r dce_v11_0_ext_helper_funcs +ffffffff82a782c0 r dce_v11_0_audio_write_sad_regs.eld_reg_to_type +ffffffff82a782f0 r dce_v11_0_crtc_irq_funcs +ffffffff82a78300 r dce_v11_0_pageflip_irq_funcs +ffffffff82a78310 r dce_v11_0_hpd_irq_funcs +ffffffff82a78320 r interrupt_status_offsets +ffffffff82a78380 r dce_v11_0_crtc_funcs +ffffffff82a78440 r dce_v11_0_crtc_helper_funcs +ffffffff82a784c0 r vga_control_regs +ffffffff82a784e0 r dig_offsets +ffffffff82a78510 r cz_mgcg_cgcg_init +ffffffff82a78530 r cz_golden_settings_a11 +ffffffff82a78550 r stoney_golden_settings_a11 +ffffffff82a78570 r polaris11_golden_settings_a11 +ffffffff82a785b0 r polaris10_golden_settings_a11 +ffffffff82a79000 R df_v1_7_funcs +ffffffff82a79070 r df_v1_7_channel_number +ffffffff82a7a000 R df_v3_6_funcs +ffffffff82a7a070 r df_v3_6_channel_number +ffffffff82a7b000 r GC_BASE +ffffffff82a7b0a8 r HDP_BASE +ffffffff82a7b150 r MMHUB_BASE +ffffffff82a7b1f8 r ATHUB_BASE +ffffffff82a7b2a0 r NBIO_BASE +ffffffff82a7b348 r MP0_BASE +ffffffff82a7b3f0 r MP1_BASE +ffffffff82a7b498 r VCN0_BASE +ffffffff82a7b540 r DF_BASE +ffffffff82a7b5e8 r DCN_BASE +ffffffff82a7b690 r OSSSYS_BASE +ffffffff82a7b738 r SMUIO_BASE +ffffffff82a7b7e0 r THM_BASE +ffffffff82a7c000 r gfx_v10_0_ip_funcs +ffffffff82a7c0a0 R gfx_v10_0_ip_block +ffffffff82a7c0b8 r gfx_v10_0_kiq_pm4_funcs +ffffffff82a7c0f8 r gfx_v10_0_ring_funcs_kiq +ffffffff82a7c218 r gfx_v10_0_ring_funcs_gfx +ffffffff82a7c338 r gfx_v10_0_ring_funcs_compute +ffffffff82a7c458 r gfx_v10_0_eop_irq_funcs +ffffffff82a7c468 r gfx_v10_0_kiq_irq_funcs +ffffffff82a7c478 r gfx_v10_0_priv_reg_irq_funcs +ffffffff82a7c488 r gfx_v10_0_priv_inst_irq_funcs +ffffffff82a7c498 r gfx_v10_0_rlc_funcs +ffffffff82a7c500 r gfx_v10_0_rlc_funcs_sriov +ffffffff82a7c570 r gfx10_cs_data +ffffffff82a7c590 r gfx10_SECT_CONTEXT_defs +ffffffff82a7c620 r gfx10_SECT_CONTEXT_def_1 +ffffffff82a7c980 r gfx10_SECT_CONTEXT_def_3 +ffffffff82a7c990 r gfx10_SECT_CONTEXT_def_4 +ffffffff82a7cc08 r gfx10_SECT_CONTEXT_def_5 +ffffffff82a7cc10 r gfx10_SECT_CONTEXT_def_6 +ffffffff82a7cc20 r gfx10_SECT_CONTEXT_def_2 +ffffffff82a7d060 r gfx10_SECT_CONTEXT_def_7 +ffffffff82a7d170 r gfx10_SECT_CONTEXT_def_8 +ffffffff82a7d4a0 r gfx_v10_0_gfx_funcs +ffffffff82a7d4e0 r golden_settings_gc_rlc_spm_10_0_nv10 +ffffffff82a83780 r golden_settings_gc_rlc_spm_10_1_nv14 +ffffffff82a871a0 r golden_settings_gc_rlc_spm_10_1_2_nv12 +ffffffff82a8d440 r golden_settings_gc_10_1 +ffffffff82a8d800 r golden_settings_gc_10_0_nv10 +ffffffff82a8d800 r golden_settings_gc_10_1_1 +ffffffff82a8db90 r golden_settings_gc_10_1_2 +ffffffff82a8db90 r golden_settings_gc_10_1_nv14 +ffffffff82a8df80 r golden_settings_gc_10_1_2_nv12 +ffffffff82a8df80 r golden_settings_gc_10_3 +ffffffff82a8e388 r golden_settings_gc_10_3_sienna_cichlid +ffffffff82a8e390 r golden_settings_gc_10_3_2 +ffffffff82a8e780 r golden_settings_gc_10_3_vangogh +ffffffff82a8e9e0 r golden_settings_gc_10_3_3 +ffffffff82a8ebc0 r golden_settings_gc_10_3_4 +ffffffff82a8ef20 r golden_settings_gc_10_3_5 +ffffffff82a8f220 r golden_settings_gc_10_0_cyan_skillfish +ffffffff82a8f550 r golden_settings_gc_10_3_6 +ffffffff82a8f760 r golden_settings_gc_10_3_7 +ffffffff82a90000 r gfx_v11_0_ip_funcs +ffffffff82a900a0 R gfx_v11_0_ip_block +ffffffff82a900b8 r gfx_v11_0_kiq_pm4_funcs +ffffffff82a900f8 r gfx_v11_0_ring_funcs_kiq +ffffffff82a90218 r gfx_v11_0_ring_funcs_gfx +ffffffff82a90338 r gfx_v11_0_ring_funcs_compute +ffffffff82a90458 r gfx_v11_0_eop_irq_funcs +ffffffff82a90468 r gfx_v11_0_priv_reg_irq_funcs +ffffffff82a90478 r gfx_v11_0_priv_inst_irq_funcs +ffffffff82a90488 r gfx_v11_0_rlc_funcs +ffffffff82a904f0 r gfx11_cs_data +ffffffff82a90510 r gfx11_SECT_CONTEXT_defs +ffffffff82a90590 r gfx11_SECT_CONTEXT_def_1 +ffffffff82a908f0 r gfx11_SECT_CONTEXT_def_3 +ffffffff82a90900 r gfx11_SECT_CONTEXT_def_5 +ffffffff82a90908 r gfx11_SECT_CONTEXT_def_6 +ffffffff82a90910 r gfx11_SECT_CONTEXT_def_2 +ffffffff82a90d50 r gfx11_SECT_CONTEXT_def_4 +ffffffff82a90fd0 r gfx11_SECT_CONTEXT_def_7 +ffffffff82a91438 r gfx_v11_0_gfx_funcs +ffffffff82a91480 r golden_settings_gc_11_0_1 +ffffffff82a91560 r golden_settings_gc_11_0 +ffffffff82a92000 r gfx_v8_0_ip_funcs +ffffffff82a920a0 R gfx_v8_0_ip_block +ffffffff82a920b8 R gfx_v8_1_ip_block +ffffffff82a920d0 r gfx_v8_0_gfx_funcs +ffffffff82a92110 r gfx_v8_0_ring_funcs_kiq +ffffffff82a92230 r gfx_v8_0_ring_funcs_gfx +ffffffff82a92350 r gfx_v8_0_ring_funcs_compute +ffffffff82a92470 r amdgpu_gds_reg_offset +ffffffff82a92570 r gfx_v8_0_eop_irq_funcs +ffffffff82a92580 r gfx_v8_0_priv_reg_irq_funcs +ffffffff82a92590 r gfx_v8_0_priv_inst_irq_funcs +ffffffff82a925a0 r gfx_v8_0_cp_ecc_error_irq_funcs +ffffffff82a925b0 r gfx_v8_0_sq_irq_funcs +ffffffff82a925c0 r sq_edc_source_names +ffffffff82a925f8 r iceland_rlc_funcs +ffffffff82a92660 r vi_cs_data +ffffffff82a92680 r vi_SECT_CONTEXT_defs +ffffffff82a92700 r vi_SECT_CONTEXT_def_1 +ffffffff82a92a50 r vi_SECT_CONTEXT_def_3 +ffffffff82a92a70 r vi_SECT_CONTEXT_def_4 +ffffffff82a92ce4 r vi_SECT_CONTEXT_def_5 +ffffffff82a92cec r vi_SECT_CONTEXT_def_6 +ffffffff82a92cf0 r vi_SECT_CONTEXT_def_2 +ffffffff82a93140 r vi_SECT_CONTEXT_def_7 +ffffffff82a934f0 r vgpr_init_compute_shader +ffffffff82a93600 r vgpr_init_regs +ffffffff82a93690 r sgpr1_init_regs +ffffffff82a93720 r sgpr2_init_regs +ffffffff82a937b0 r sec_ded_counter_registers +ffffffff82a93820 r iceland_mgcg_cgcg_init +ffffffff82a93b20 r golden_settings_iceland_a11 +ffffffff82a93be0 r iceland_golden_common_all +ffffffff82a93c40 r fiji_mgcg_cgcg_init +ffffffff82a93df0 r golden_settings_fiji_a10 +ffffffff82a93e80 r fiji_golden_common_all +ffffffff82a93f00 r tonga_mgcg_cgcg_init +ffffffff82a94290 r golden_settings_tonga_a11 +ffffffff82a94350 r tonga_golden_common_all +ffffffff82a943b0 r golden_settings_vegam_a11 +ffffffff82a94480 r vegam_golden_common_all +ffffffff82a944d0 r golden_settings_polaris11_a11 +ffffffff82a945a0 r polaris11_golden_common_all +ffffffff82a945f0 r golden_settings_polaris10_a11 +ffffffff82a946c0 r polaris10_golden_common_all +ffffffff82a94720 r cz_mgcg_cgcg_init +ffffffff82a94ab0 r cz_golden_settings_a11 +ffffffff82a94b40 r cz_golden_common_all +ffffffff82a94ba0 r stoney_mgcg_cgcg_init +ffffffff82a94be0 r stoney_golden_settings_a11 +ffffffff82a94c60 r stoney_golden_common_all +ffffffff82a95000 R gfx_v9_0_ras_ops +ffffffff82a95040 r gfx_v9_0_ip_funcs +ffffffff82a950e0 R gfx_v9_0_ip_block +ffffffff82a95100 r ras_gfx_subblocks +ffffffff82a95b80 r gfx_v9_0_edc_counter_regs +ffffffff82a95f20 r gfx_v9_0_ras_fields +ffffffff82a97000 r gfx_v9_0_kiq_pm4_funcs +ffffffff82a97040 r gfx_v9_0_ring_funcs_kiq +ffffffff82a97160 r gfx_v9_0_ring_funcs_gfx +ffffffff82a97280 r gfx_v9_0_ring_funcs_compute +ffffffff82a973a0 r gfx_v9_0_eop_irq_funcs +ffffffff82a973b0 r gfx_v9_0_priv_reg_irq_funcs +ffffffff82a973c0 r gfx_v9_0_priv_inst_irq_funcs +ffffffff82a973d0 r gfx_v9_0_cp_ecc_error_irq_funcs +ffffffff82a973e0 r gfx_v9_0_rlc_funcs +ffffffff82a97450 r gfx9_cs_data +ffffffff82a97470 r gfx9_SECT_CONTEXT_defs +ffffffff82a97500 r gfx9_SECT_CONTEXT_def_1 +ffffffff82a97850 r gfx9_SECT_CONTEXT_def_3 +ffffffff82a97860 r gfx9_SECT_CONTEXT_def_4 +ffffffff82a97ad4 r gfx9_SECT_CONTEXT_def_5 +ffffffff82a97adc r gfx9_SECT_CONTEXT_def_6 +ffffffff82a97ae0 r gfx9_SECT_CONTEXT_def_7 +ffffffff82a97bf0 r gfx9_SECT_CONTEXT_def_2 +ffffffff82a98060 r gfx9_SECT_CONTEXT_def_8 +ffffffff82a982d0 r vgpr_init_compute_shader_arcturus +ffffffff82a98b60 r vgpr_init_regs_arcturus +ffffffff82a98cf0 r vgpr_init_regs +ffffffff82a98e80 r sgpr1_init_regs +ffffffff82a99010 r sgpr2_init_regs +ffffffff82a99198 r gfx_v9_0_gfx_funcs +ffffffff82a991e0 r golden_settings_gc_9_0 +ffffffff82a993c0 r golden_settings_gc_9_0_vg10 +ffffffff82a99570 r golden_settings_gc_9_2_1 +ffffffff82a996f0 r golden_settings_gc_9_2_1_vg12 +ffffffff82a99830 r golden_settings_gc_9_0_vg20 +ffffffff82a99940 r golden_settings_gc_9_4_1_arct +ffffffff82a99a50 r golden_settings_gc_9_1 +ffffffff82a99c90 r golden_settings_gc_9_1_rv2 +ffffffff82a99e60 r golden_settings_gc_9_1_rv1 +ffffffff82a99f10 r golden_settings_gc_9_1_rn +ffffffff82a9a030 r golden_settings_gc_9_x_common +ffffffff82a9b000 R gfx_v9_4_ras_ops +ffffffff82a9b040 r gfx_v9_4_edc_counter_regs +ffffffff82a9b420 r gfx_v9_4_ras_fields +ffffffff82a9d000 R vgpr_init_regs_aldebaran +ffffffff82a9d1b0 R sgpr112_init_regs_aldebaran +ffffffff82a9d360 R sgpr96_init_regs_aldebaran +ffffffff82a9d510 R sgpr64_init_regs_aldebaran +ffffffff82a9d6c0 r golden_settings_gc_9_4_2_alde +ffffffff82a9d720 r golden_settings_gc_9_4_2_alde_die_0 +ffffffff82a9d7b0 r golden_settings_gc_9_4_2_alde_die_1 +ffffffff82a9d840 r sgpr112_init_compute_shader_aldebaran +ffffffff82a9da60 r sgpr96_init_compute_shader_aldebaran +ffffffff82a9dc50 r sgpr64_init_compute_shader_aldebaran +ffffffff82a9ddc0 r vgpr_init_compute_shader_aldebaran +ffffffff82a9e6a0 r gfx_v9_4_2_edc_counter_regs +ffffffff82a9ea20 r gfx_v9_4_2_ras_fields +ffffffff82aa03c0 r gfx_v9_4_2_utc_blocks +ffffffff82aa1000 R gfxhub_v1_0_funcs +ffffffff82aa2000 R gfxhub_v2_0_funcs +ffffffff82aa2060 r gfxhub_v2_0_vmhub_funcs +ffffffff82aa2070 r gfxhub_client_ids +ffffffff82aa3000 R gfxhub_v2_1_funcs +ffffffff82aa3060 r gfxhub_v2_1_vmhub_funcs +ffffffff82aa3070 r gfxhub_client_ids +ffffffff82aa4000 R gfxhub_v3_0_funcs +ffffffff82aa4060 r gfxhub_v3_0_vmhub_funcs +ffffffff82aa4070 r gfxhub_client_ids +ffffffff82aa5000 R gfxhub_v3_0_3_funcs +ffffffff82aa5060 r gfxhub_v3_0_3_vmhub_funcs +ffffffff82aa5070 r gfxhub_client_ids +ffffffff82aa6000 R gmc_v10_0_ip_funcs +ffffffff82aa60a0 R gmc_v10_0_ip_block +ffffffff82aa60b8 r gmc_v10_0_gmc_funcs +ffffffff82aa6100 r gmc_v10_0_irq_funcs +ffffffff82aa6110 r gmc_v10_0_ecc_funcs +ffffffff82aa7000 R gmc_v11_0_ip_funcs +ffffffff82aa70a0 R gmc_v11_0_ip_block +ffffffff82aa70b8 r gmc_v11_0_gmc_funcs +ffffffff82aa7100 r gmc_v11_0_irq_funcs +ffffffff82aa7110 r gmc_v11_0_ecc_funcs +ffffffff82aa8000 r gmc_v7_0_ip_funcs +ffffffff82aa80a0 R gmc_v7_0_ip_block +ffffffff82aa80b8 R gmc_v7_4_ip_block +ffffffff82aa80d0 r gmc_v7_0_gmc_funcs +ffffffff82aa8118 r gmc_v7_0_irq_funcs +ffffffff82aa8128 r iceland_mgcg_cgcg_init +ffffffff82aa8140 r golden_settings_iceland_a11 +ffffffff82aa8170 r mc_cg_registers +ffffffff82aa81a0 r mc_cg_en +ffffffff82aa81d0 r mc_cg_ls_en +ffffffff82aa9000 r gmc_v8_0_ip_funcs +ffffffff82aa90a0 R gmc_v8_0_ip_block +ffffffff82aa90b8 R gmc_v8_1_ip_block +ffffffff82aa90d0 R gmc_v8_5_ip_block +ffffffff82aa90e8 r gmc_v8_0_gmc_funcs +ffffffff82aa9130 r gmc_v8_0_irq_funcs +ffffffff82aa9140 r fiji_mgcg_cgcg_init +ffffffff82aa9150 r golden_settings_fiji_a10 +ffffffff82aa9180 r tonga_mgcg_cgcg_init +ffffffff82aa9190 r golden_settings_tonga_a11 +ffffffff82aa91f0 r golden_settings_polaris11_a11 +ffffffff82aa9220 r golden_settings_polaris10_a11 +ffffffff82aa925c r cz_mgcg_cgcg_init +ffffffff82aa9270 r stoney_mgcg_cgcg_init +ffffffff82aa9290 r golden_settings_stoney_common +ffffffff82aaa000 R gmc_v9_0_ip_funcs +ffffffff82aaa0a0 R gmc_v9_0_ip_block +ffffffff82aaa0b8 r gmc_v9_0_gmc_funcs +ffffffff82aaa100 r gmc_v9_0_irq_funcs +ffffffff82aaa110 r gmc_v9_0_ecc_funcs +ffffffff82aaa120 r gfxhub_client_ids +ffffffff82aaa190 r mmhub_client_ids_vega10 +ffffffff82aaa480 r mmhub_client_ids_vega12 +ffffffff82aaa780 r mmhub_client_ids_vega20 +ffffffff82aaaa70 r mmhub_client_ids_arcturus +ffffffff82aac280 r mmhub_client_ids_raven +ffffffff82aac440 r mmhub_client_ids_renoir +ffffffff82aac630 r mmhub_client_ids_aldebaran +ffffffff82aade40 r ecc_umc_mcumc_ctrl_addrs +ffffffff82aadec0 r ecc_umc_mcumc_ctrl_mask_addrs +ffffffff82aadf40 r golden_settings_mmhub_1_0_0 +ffffffff82aadf70 r golden_settings_athub_1_0_0 +ffffffff82aae000 R hdp_v4_0_funcs +ffffffff82aaf000 R hdp_v5_0_funcs +ffffffff82ab0000 R hdp_v5_2_funcs +ffffffff82ab1000 R hdp_v6_0_funcs +ffffffff82ab2000 r iceland_ih_ip_funcs +ffffffff82ab20a0 R iceland_ih_ip_block +ffffffff82ab20b8 r iceland_ih_funcs +ffffffff82ab3000 r ih_v6_0_ip_funcs +ffffffff82ab30a0 R ih_v6_0_ip_block +ffffffff82ab30b8 r ih_v6_0_funcs +ffffffff82ab30d8 r ih_v6_0_self_irq_funcs +ffffffff82ab4000 R gfx_v11_0_imu_funcs +ffffffff82ab4030 r imu_rlc_ram_golden_11 +ffffffff82ab4680 r imu_rlc_ram_golden_11_0_2 +ffffffff82ab5000 r imu_rlc_ram_golden_11_0_3 +ffffffff82ab6000 r jpeg_v1_0_decode_ring_vm_funcs +ffffffff82ab6120 r jpeg_v1_0_irq_funcs +ffffffff82ab7000 r jpeg_v2_0_ip_funcs +ffffffff82ab70a0 R jpeg_v2_0_ip_block +ffffffff82ab70b8 r jpeg_v2_0_dec_ring_vm_funcs +ffffffff82ab71d8 r jpeg_v2_0_irq_funcs +ffffffff82ab8000 r jpeg_v2_5_ip_funcs +ffffffff82ab80a0 R jpeg_v2_5_ip_block +ffffffff82ab80b8 r jpeg_v2_6_ip_funcs +ffffffff82ab8158 R jpeg_v2_6_ip_block +ffffffff82ab8170 R jpeg_v2_6_ras_hw_ops +ffffffff82ab81b0 r jpeg_v2_5_dec_ring_vm_funcs +ffffffff82ab82d0 r jpeg_v2_6_dec_ring_vm_funcs +ffffffff82ab83f0 r jpeg_v2_5_irq_funcs +ffffffff82ab9000 r jpeg_v3_0_ip_funcs +ffffffff82ab90a0 R jpeg_v3_0_ip_block +ffffffff82ab90b8 r jpeg_v3_0_dec_ring_vm_funcs +ffffffff82ab91d8 r jpeg_v3_0_irq_funcs +ffffffff82aba000 r jpeg_v4_0_ip_funcs +ffffffff82aba0a0 R jpeg_v4_0_ip_block +ffffffff82aba0b8 r jpeg_v4_0_dec_ring_vm_funcs +ffffffff82aba1d8 r jpeg_v4_0_irq_funcs +ffffffff82abb000 R lsdma_v6_0_funcs +ffffffff82abc000 R mca_v3_0_mp0_hw_ops +ffffffff82abc040 R mca_v3_0_mp1_hw_ops +ffffffff82abc080 R mca_v3_0_mpio_hw_ops +ffffffff82abc0c0 R mca_v3_0_funcs +ffffffff82abd000 r mes_v10_1_ip_funcs +ffffffff82abd0a0 R mes_v10_1_ip_block +ffffffff82abd0b8 r mes_v10_1_funcs +ffffffff82abd0e8 r mes_v10_1_ring_funcs +ffffffff82abe000 r mes_v11_0_ip_funcs +ffffffff82abe0a0 R mes_v11_0_ip_block +ffffffff82abe0b8 r mes_v11_0_funcs +ffffffff82abe0e8 r mes_v11_0_ring_funcs +ffffffff82abf000 R mmhub_v1_0_funcs +ffffffff82abf050 r mmhub_v1_0_edc_cnt_regs +ffffffff82abf0c0 r mmhub_v1_0_ras_fields +ffffffff82ac0000 R mmhub_v1_7_funcs +ffffffff82ac0050 r mmhub_v1_7_edc_cnt_regs +ffffffff82ac0250 r mmhub_v1_7_ras_fields +ffffffff82ac19c0 r mmhub_v1_7_ea_err_status_regs +ffffffff82ac2000 R mmhub_v2_0_funcs +ffffffff82ac2050 r mmhub_v2_0_vmhub_funcs +ffffffff82ac2060 r mmhub_client_ids_navi1x +ffffffff82ac2190 r mmhub_client_ids_sienna_cichlid +ffffffff82ac2450 r mmhub_client_ids_beige_goby +ffffffff82ac3000 R mmhub_v2_3_funcs +ffffffff82ac3050 r mmhub_v2_3_vmhub_funcs +ffffffff82ac3060 r mmhub_client_ids_vangogh +ffffffff82ac4000 R mmhub_v3_0_funcs +ffffffff82ac4050 r mmhub_v3_0_vmhub_funcs +ffffffff82ac4060 r mmhub_client_ids_v3_0_0 +ffffffff82ac5000 R mmhub_v3_0_1_funcs +ffffffff82ac5050 r mmhub_v3_0_1_vmhub_funcs +ffffffff82ac5060 r mmhub_client_ids_v3_0_1 +ffffffff82ac6000 R mmhub_v3_0_2_funcs +ffffffff82ac6050 r mmhub_v3_0_2_vmhub_funcs +ffffffff82ac6060 r mmhub_client_ids_v3_0_2 +ffffffff82ac7000 R mmhub_v9_4_ras_hw_ops +ffffffff82ac7040 R mmhub_v9_4_funcs +ffffffff82ac7090 r mmhub_v9_4_edc_cnt_regs +ffffffff82ac7330 r mmhub_v9_4_ras_fields +ffffffff82ac93b0 r mmhub_v9_4_err_status_regs +ffffffff82aca000 r xgpu_ai_mailbox_ack_irq_funcs +ffffffff82aca010 r xgpu_ai_mailbox_rcv_irq_funcs +ffffffff82aca020 R xgpu_ai_virt_ops +ffffffff82acb000 r xgpu_nv_mailbox_ack_irq_funcs +ffffffff82acb010 r xgpu_nv_mailbox_rcv_irq_funcs +ffffffff82acb020 R xgpu_nv_virt_ops +ffffffff82acc000 r xgpu_fiji_mgcg_cgcg_init +ffffffff82acc240 r xgpu_fiji_golden_settings_a10 +ffffffff82acc370 r xgpu_fiji_golden_common_all +ffffffff82acc3f0 r xgpu_tonga_mgcg_cgcg_init +ffffffff82acc810 r xgpu_tonga_golden_settings_a11 +ffffffff82acc9d0 r xgpu_tonga_golden_common_all +ffffffff82acca28 r xgpu_vi_mailbox_ack_irq_funcs +ffffffff82acca38 r xgpu_vi_mailbox_rcv_irq_funcs +ffffffff82acca48 R xgpu_vi_virt_ops +ffffffff82acd000 r navi10_ih_ip_funcs +ffffffff82acd0a0 R navi10_ih_ip_block +ffffffff82acd0b8 r navi10_ih_funcs +ffffffff82acd0d8 r navi10_ih_self_irq_funcs +ffffffff82ace000 R nbio_v2_3_hdp_flush_reg +ffffffff82ace048 R nbio_v2_3_funcs +ffffffff82acf000 R nbio_v4_3_hdp_flush_reg +ffffffff82acf048 R nbio_v4_3_funcs +ffffffff82acf130 R nbio_v4_3_sriov_funcs +ffffffff82ad0000 R nbio_v6_1_hdp_flush_reg +ffffffff82ad0048 R nbio_v6_1_funcs +ffffffff82ad1000 R nbio_v7_0_hdp_flush_reg +ffffffff82ad1048 R nbio_v7_0_funcs +ffffffff82ad2000 R nbio_v7_2_hdp_flush_reg +ffffffff82ad2048 R nbio_v7_2_funcs +ffffffff82ad3000 R nbio_v7_4_hdp_flush_reg +ffffffff82ad3048 R nbio_v7_4_ras_hw_ops +ffffffff82ad3088 R nbio_v7_4_funcs +ffffffff82ad3170 r nbio_v7_4_ras_controller_irq_funcs +ffffffff82ad3180 r nbio_v7_4_ras_err_event_athub_irq_funcs +ffffffff82ad4000 R nbio_v7_7_hdp_flush_reg +ffffffff82ad4048 R nbio_v7_7_funcs +ffffffff82ad5000 r nv_common_ip_funcs +ffffffff82ad50a0 R nv_common_ip_block +ffffffff82ad50b8 r nv_asic_funcs +ffffffff82ad5170 r nv_allowed_read_registers +ffffffff82ad52f0 r nv_video_codecs_encode +ffffffff82ad5300 r sc_video_codecs_decode +ffffffff82ad5310 r yc_video_codecs_decode +ffffffff82ad5320 r bg_video_codecs_encode +ffffffff82ad5330 r bg_video_codecs_decode +ffffffff82ad5340 r nv_video_codecs_decode +ffffffff82ad5350 r nv_video_codecs_encode_array +ffffffff82ad5380 r sc_video_codecs_decode_array +ffffffff82ad5420 r yc_video_codecs_decode_array +ffffffff82ad5490 r bg_video_codecs_decode_array +ffffffff82ad54d0 r nv_video_codecs_decode_array +ffffffff82ad6000 r psp_v10_0_funcs +ffffffff82ad7000 r psp_v11_0_funcs +ffffffff82ad8000 r psp_v11_0_8_funcs +ffffffff82ad9000 r psp_v12_0_funcs +ffffffff82ada000 r psp_v13_0_funcs +ffffffff82adb000 r psp_v13_0_4_funcs +ffffffff82adc000 r psp_v3_1_funcs +ffffffff82add000 r sdma_v2_4_ip_funcs +ffffffff82add0a0 R sdma_v2_4_ip_block +ffffffff82add0b8 r sdma_v2_4_ring_funcs +ffffffff82add1d8 r sdma_v2_4_buffer_funcs +ffffffff82add1f8 r sdma_v2_4_vm_pte_funcs +ffffffff82add218 r sdma_v2_4_trap_irq_funcs +ffffffff82add228 r sdma_v2_4_illegal_inst_irq_funcs +ffffffff82add240 r iceland_mgcg_cgcg_init +ffffffff82add260 r golden_settings_iceland_a11 +ffffffff82ade000 r sdma_v3_0_ip_funcs +ffffffff82ade0a0 R sdma_v3_0_ip_block +ffffffff82ade0b8 R sdma_v3_1_ip_block +ffffffff82ade0d0 r sdma_v3_0_ring_funcs +ffffffff82ade1f0 r sdma_v3_0_buffer_funcs +ffffffff82ade210 r sdma_v3_0_vm_pte_funcs +ffffffff82ade230 r sdma_v3_0_trap_irq_funcs +ffffffff82ade240 r sdma_v3_0_illegal_inst_irq_funcs +ffffffff82ade250 r fiji_mgcg_cgcg_init +ffffffff82ade270 r golden_settings_fiji_a10 +ffffffff82ade2d0 r tonga_mgcg_cgcg_init +ffffffff82ade2f0 r golden_settings_tonga_a11 +ffffffff82ade370 r golden_settings_polaris11_a11 +ffffffff82ade3f0 r golden_settings_polaris10_a11 +ffffffff82ade470 r cz_mgcg_cgcg_init +ffffffff82ade490 r cz_golden_settings_a11 +ffffffff82ade520 r stoney_mgcg_cgcg_init +ffffffff82ade530 r stoney_golden_settings_a11 +ffffffff82adf000 R sdma_v4_0_ip_funcs +ffffffff82adf0a0 R sdma_v4_0_ras_hw_ops +ffffffff82adf0e0 R sdma_v4_0_ip_block +ffffffff82adf0f8 r sdma_v4_0_ring_funcs_2nd_mmhub +ffffffff82adf218 r sdma_v4_0_ring_funcs +ffffffff82adf338 r sdma_v4_0_page_ring_funcs_2nd_mmhub +ffffffff82adf458 r sdma_v4_0_page_ring_funcs +ffffffff82adf578 r sdma_v4_0_buffer_funcs +ffffffff82adf598 r sdma_v4_0_vm_pte_funcs +ffffffff82adf5b8 r sdma_v4_0_trap_irq_funcs +ffffffff82adf5c8 r sdma_v4_0_illegal_inst_irq_funcs +ffffffff82adf5d8 r sdma_v4_0_ecc_irq_funcs +ffffffff82adf5e8 r sdma_v4_0_vm_hole_irq_funcs +ffffffff82adf5f8 r sdma_v4_0_doorbell_invalid_irq_funcs +ffffffff82adf608 r sdma_v4_0_pool_timeout_irq_funcs +ffffffff82adf618 r sdma_v4_0_srbm_write_irq_funcs +ffffffff82adf630 r golden_settings_sdma_4 +ffffffff82adf890 r golden_settings_sdma_vg10 +ffffffff82adf940 r golden_settings_sdma_vg12 +ffffffff82adf9f0 r golden_settings_sdma0_4_2_init +ffffffff82adfa10 r golden_settings_sdma0_4_2 +ffffffff82adfca0 r golden_settings_sdma1_4_2 +ffffffff82adff30 r golden_settings_sdma_arct +ffffffff82ae0230 r golden_settings_sdma_aldebaran +ffffffff82ae03a0 r golden_settings_sdma_4_1 +ffffffff82ae04b0 r golden_settings_sdma_rv2 +ffffffff82ae04e0 r golden_settings_sdma_rv1 +ffffffff82ae0510 r golden_settings_sdma_4_3 +ffffffff82ae0600 r sdma_v4_0_ras_fields +ffffffff82ae1000 R sdma_v4_4_ras_hw_ops +ffffffff82ae1040 r sdma_v4_4_ras_fields +ffffffff82ae2000 R sdma_v5_0_ip_funcs +ffffffff82ae20a0 R sdma_v5_0_ip_block +ffffffff82ae20b8 r sdma_v5_0_ring_funcs +ffffffff82ae21d8 r sdma_v5_0_buffer_funcs +ffffffff82ae21f8 r sdma_v5_0_vm_pte_funcs +ffffffff82ae2218 r sdma_v5_0_trap_irq_funcs +ffffffff82ae2228 r sdma_v5_0_illegal_inst_irq_funcs +ffffffff82ae2240 r golden_settings_sdma_5 +ffffffff82ae2480 r golden_settings_sdma_nv10 +ffffffff82ae24b0 r golden_settings_sdma_nv14 +ffffffff82ae24e0 r golden_settings_sdma_5_sriov +ffffffff82ae26c0 r golden_settings_sdma_nv12 +ffffffff82ae2750 r golden_settings_sdma_cyan_skillfish +ffffffff82ae3000 R sdma_v5_2_ip_funcs +ffffffff82ae30a0 R sdma_v5_2_ip_block +ffffffff82ae30b8 r sdma_v5_2_ring_funcs +ffffffff82ae31d8 r sdma_v5_2_buffer_funcs +ffffffff82ae31f8 r sdma_v5_2_vm_pte_funcs +ffffffff82ae3218 r sdma_v5_2_trap_irq_funcs +ffffffff82ae3228 r sdma_v5_2_illegal_inst_irq_funcs +ffffffff82ae4000 R sdma_v6_0_ip_funcs +ffffffff82ae40a0 R sdma_v6_0_ip_block +ffffffff82ae40b8 r sdma_v6_0_ring_funcs +ffffffff82ae41d8 r sdma_v6_0_buffer_funcs +ffffffff82ae41f8 r sdma_v6_0_vm_pte_funcs +ffffffff82ae4218 r sdma_v6_0_trap_irq_funcs +ffffffff82ae4228 r sdma_v6_0_illegal_inst_irq_funcs +ffffffff82ae5000 r smu_v11_0_i2c_algo +ffffffff82ae5010 r smu_v11_0_i2c_i2c_lock_ops +ffffffff82ae5028 r smu_v11_0_i2c_control_quirks +ffffffff82ae6000 R smuio_v11_0_funcs +ffffffff82ae7000 R smuio_v11_0_6_funcs +ffffffff82ae8000 R smuio_v13_0_funcs +ffffffff82ae9000 R smuio_v13_0_6_funcs +ffffffff82aea000 R smuio_v9_0_funcs +ffffffff82aeb000 r soc15_common_ip_funcs +ffffffff82aeb0a0 R vega10_common_ip_block +ffffffff82aeb0b8 r soc15_asic_funcs +ffffffff82aeb170 r vega20_asic_funcs +ffffffff82aeb230 r soc15_allowed_read_registers +ffffffff82aeb3c0 r vega_video_codecs_encode +ffffffff82aeb3d0 r vega_video_codecs_decode +ffffffff82aeb3e0 r rv_video_codecs_decode +ffffffff82aeb3f0 r rn_video_codecs_decode +ffffffff82aeb400 r vega_video_codecs_encode_array +ffffffff82aeb430 r vega_video_codecs_decode_array +ffffffff82aeb4b0 r rv_video_codecs_decode_array +ffffffff82aeb540 r rn_video_codecs_decode_array +ffffffff82aec000 r soc21_common_ip_funcs +ffffffff82aec0a0 R soc21_common_ip_block +ffffffff82aec0b8 r soc21_asic_funcs +ffffffff82aec170 r soc21_allowed_read_registers +ffffffff82aec2f0 r vcn_4_0_0_video_codecs_encode_vcn1 +ffffffff82aec300 r vcn_4_0_0_video_codecs_decode_vcn1 +ffffffff82aec310 r vcn_4_0_0_video_codecs_encode_vcn0 +ffffffff82aec320 r vcn_4_0_0_video_codecs_decode_vcn0 +ffffffff82aec330 r vcn_4_0_0_video_codecs_encode_array_vcn1 +ffffffff82aec360 r vcn_4_0_0_video_codecs_decode_array_vcn1 +ffffffff82aec3b0 r vcn_4_0_0_video_codecs_encode_array_vcn0 +ffffffff82aec3e0 r vcn_4_0_0_video_codecs_decode_array_vcn0 +ffffffff82aed000 r tonga_ih_ip_funcs +ffffffff82aed0a0 R tonga_ih_ip_block +ffffffff82aed0b8 r tonga_ih_funcs +ffffffff82aee000 R umc_v6_0_funcs +ffffffff82aef000 R umc_v6_1_channel_idx_tbl +ffffffff82aef080 R umc_v6_1_ras_hw_ops +ffffffff82af0000 R umc_v6_7_channel_idx_tbl_second +ffffffff82af0080 R umc_v6_7_channel_idx_tbl_first +ffffffff82af0100 R umc_v6_7_ras_hw_ops +ffffffff82af1000 R umc_v8_10_channelnum_map_colbit_table +ffffffff82af1040 R umc_v8_10_channel_idx_tbl +ffffffff82af10a0 R umc_v8_10_ras_hw_ops +ffffffff82af2000 R umc_v8_7_channel_idx_tbl +ffffffff82af2040 R umc_v8_7_ras_hw_ops +ffffffff82af3000 r uvd_v5_0_ip_funcs +ffffffff82af30a0 R uvd_v5_0_ip_block +ffffffff82af30b8 r uvd_v5_0_ring_funcs +ffffffff82af31d8 r uvd_v5_0_irq_funcs +ffffffff82af4000 r uvd_v6_0_ip_funcs +ffffffff82af40a0 R uvd_v6_0_ip_block +ffffffff82af40b8 R uvd_v6_2_ip_block +ffffffff82af40d0 R uvd_v6_3_ip_block +ffffffff82af40e8 r uvd_v6_0_ring_vm_funcs +ffffffff82af4208 r uvd_v6_0_ring_phys_funcs +ffffffff82af4328 r uvd_v6_0_enc_ring_vm_funcs +ffffffff82af4448 r uvd_v6_0_irq_funcs +ffffffff82af5000 R uvd_v7_0_ip_funcs +ffffffff82af50a0 R uvd_v7_0_ip_block +ffffffff82af50b8 r uvd_v7_0_ring_vm_funcs +ffffffff82af51d8 r uvd_v7_0_enc_ring_vm_funcs +ffffffff82af52f8 r uvd_v7_0_irq_funcs +ffffffff82af6000 r vce_v3_0_ip_funcs +ffffffff82af60a0 R vce_v3_0_ip_block +ffffffff82af60b8 R vce_v3_1_ip_block +ffffffff82af60d0 R vce_v3_4_ip_block +ffffffff82af60e8 r vce_v3_0_ring_vm_funcs +ffffffff82af6208 r vce_v3_0_ring_phys_funcs +ffffffff82af6328 r vce_v3_0_irq_funcs +ffffffff82af7000 R vce_v4_0_ip_funcs +ffffffff82af70a0 R vce_v4_0_ip_block +ffffffff82af70b8 r vce_v4_0_ring_vm_funcs +ffffffff82af71d8 r vce_v4_0_irq_funcs +ffffffff82af8000 r vcn_v1_0_ip_funcs +ffffffff82af80a0 R vcn_v1_0_ip_block +ffffffff82af80b8 r vcn_v1_0_dec_ring_vm_funcs +ffffffff82af81d8 r vcn_v1_0_enc_ring_vm_funcs +ffffffff82af82f8 r vcn_v1_0_irq_funcs +ffffffff82af9000 r vcn_v2_0_ip_funcs +ffffffff82af90a0 R vcn_v2_0_ip_block +ffffffff82af90b8 r vcn_v2_0_dec_ring_vm_funcs +ffffffff82af91d8 r vcn_v2_0_enc_ring_vm_funcs +ffffffff82af92f8 r vcn_v2_0_irq_funcs +ffffffff82afa000 r vcn_v2_5_ip_funcs +ffffffff82afa0a0 R vcn_v2_5_ip_block +ffffffff82afa0b8 r vcn_v2_6_ip_funcs +ffffffff82afa158 R vcn_v2_6_ip_block +ffffffff82afa170 R vcn_v2_6_ras_hw_ops +ffffffff82afa1b0 r vcn_v2_5_dec_ring_vm_funcs +ffffffff82afa2d0 r vcn_v2_6_dec_ring_vm_funcs +ffffffff82afa3f0 r vcn_v2_5_enc_ring_vm_funcs +ffffffff82afa510 r vcn_v2_6_enc_ring_vm_funcs +ffffffff82afa630 r vcn_v2_5_irq_funcs +ffffffff82afb000 r vcn_v3_0_ip_funcs +ffffffff82afb0a0 R vcn_v3_0_ip_block +ffffffff82afb0b8 r vcn_v3_0_dec_ring_vm_funcs +ffffffff82afb1d8 r vcn_v3_0_enc_ring_vm_funcs +ffffffff82afb2f8 r vcn_v3_0_irq_funcs +ffffffff82afc000 r vcn_v4_0_ip_funcs +ffffffff82afc0a0 R vcn_v4_0_ip_block +ffffffff82afc0b8 r vcn_v4_0_unified_ring_vm_funcs +ffffffff82afc1d8 r vcn_v4_0_irq_funcs +ffffffff82afd000 R vega10_ih_ip_funcs +ffffffff82afd0a0 R vega10_ih_ip_block +ffffffff82afd0b8 r vega10_ih_funcs +ffffffff82afd0d8 r vega10_ih_self_irq_funcs +ffffffff82afe000 r GC_BASE +ffffffff82afe064 r HDP_BASE +ffffffff82afe0c8 r MMHUB_BASE +ffffffff82afe12c r ATHUB_BASE +ffffffff82afe190 r NBIO_BASE +ffffffff82afe1f4 r MP0_BASE +ffffffff82afe258 r MP1_BASE +ffffffff82afe2bc r VCE_BASE +ffffffff82afe320 r VCN_BASE +ffffffff82afe384 r DF_BASE +ffffffff82afe3e8 r DCE_BASE +ffffffff82afe44c r OSSSYS_BASE +ffffffff82afe4b0 r SDMA0_BASE +ffffffff82afe514 r SDMA1_BASE +ffffffff82afe578 r SMUIO_BASE +ffffffff82afe5dc r PWR_BASE +ffffffff82afe640 r NBIF_BASE +ffffffff82afe6a4 r THM_BASE +ffffffff82afe708 r CLK_BASE +ffffffff82aff000 R vega20_ih_ip_funcs +ffffffff82aff0a0 R vega20_ih_ip_block +ffffffff82aff0b8 r vega20_ih_funcs +ffffffff82aff0d8 r vega20_ih_self_irq_funcs +ffffffff82b00000 r GC_BASE +ffffffff82b00090 r HDP_BASE +ffffffff82b00120 r MMHUB_BASE +ffffffff82b001b0 r ATHUB_BASE +ffffffff82b00240 r NBIO_BASE +ffffffff82b002d0 r MP0_BASE +ffffffff82b00360 r MP1_BASE +ffffffff82b003f0 r UVD_BASE +ffffffff82b00480 r VCE_BASE +ffffffff82b00510 r DF_BASE +ffffffff82b005a0 r DCE_BASE +ffffffff82b00630 r OSSSYS_BASE +ffffffff82b006c0 r SDMA0_BASE +ffffffff82b00750 r SDMA1_BASE +ffffffff82b007e0 r SMUIO_BASE +ffffffff82b00870 r THM_BASE +ffffffff82b00900 r CLK_BASE +ffffffff82b00990 r UMC_BASE +ffffffff82b00a20 r RSMU_BASE +ffffffff82b01000 r vi_common_ip_block +ffffffff82b01018 r vi_common_ip_funcs +ffffffff82b010b8 r vi_asic_funcs +ffffffff82b01170 r vi_allowed_read_registers +ffffffff82b013d0 r topaz_video_codecs_encode +ffffffff82b013e0 r topaz_video_codecs_decode +ffffffff82b013f0 r tonga_video_codecs_encode +ffffffff82b01400 r tonga_video_codecs_decode +ffffffff82b01410 r polaris_video_codecs_encode +ffffffff82b01420 r cz_video_codecs_decode +ffffffff82b01430 r tonga_video_codecs_encode_array +ffffffff82b01450 r tonga_video_codecs_decode_array +ffffffff82b014a0 r polaris_video_codecs_encode_array +ffffffff82b014d0 r cz_video_codecs_decode_array +ffffffff82b01550 r iceland_mgcg_cgcg_init +ffffffff82b01590 r fiji_mgcg_cgcg_init +ffffffff82b015f0 r tonga_mgcg_cgcg_init +ffffffff82b01650 r cz_mgcg_cgcg_init +ffffffff82b01690 r stoney_mgcg_cgcg_init +ffffffff82b02000 r amdgpu_dm_funcs +ffffffff82b020a0 R dm_ip_block +ffffffff82b020b8 R amdgpu_dm_encoder_helper_funcs +ffffffff82b02120 r dm_display_funcs +ffffffff82b02180 r hpd_disconnect_quirk_table +ffffffff82b02ef0 r amdgpu_dm_mode_funcs +ffffffff82b02f38 r amdgpu_dm_encoder_funcs +ffffffff82b02f58 r amdgpu_dm_connector_funcs +ffffffff82b02fd0 r amdgpu_dm_connector_helper_funcs +ffffffff82b03020 r amdgpu_dm_i2c_algo +ffffffff82b031f0 r add_fs_modes.common_rates +ffffffff82b03220 r amdgpu_dm_backlight_ops +ffffffff82b04000 r amdgpu_dm_crtc_funcs +ffffffff82b040c0 r amdgpu_dm_crtc_helper_funcs +ffffffff82b05000 r dm_dtn_log_begin.msg +ffffffff82b0500d r dm_dtn_log_end.msg +ffffffff82b05018 r SYNAPTICS_DEVICE_ID +ffffffff82b06000 r dm_crtc_irq_funcs +ffffffff82b06010 r dm_vline0_irq_funcs +ffffffff82b06020 r dm_dmub_outbox_irq_funcs +ffffffff82b06030 r dm_vupdate_irq_funcs +ffffffff82b06040 r dm_dmub_trace_irq_funcs +ffffffff82b06050 r dm_pageflip_irq_funcs +ffffffff82b06060 r dm_hpd_irq_funcs +ffffffff82b07000 r amdgpu_dm_encoder_funcs +ffffffff82b07020 r dm_mst_cbs +ffffffff82b07030 r dm_dp_mst_connector_funcs +ffffffff82b070a8 r dm_dp_mst_connector_helper_funcs +ffffffff82b08000 r dm_plane_funcs +ffffffff82b08068 r dm_plane_helper_funcs +ffffffff82b0a000 r vbios_funcs +ffffffff82b0b000 r vbios_funcs +ffffffff82b10000 r command_table_helper_funcs +ffffffff82b11000 r command_table_helper_funcs +ffffffff82b12000 r command_table_helper_funcs +ffffffff82b13000 r command_table_helper_funcs +ffffffff82b14000 r dce80_max_clks_by_state +ffffffff82b14028 r disp_clk_regs +ffffffff82b1407c r disp_clk_shift +ffffffff82b14088 r disp_clk_mask +ffffffff82b15000 r dce110_max_clks_by_state +ffffffff82b15028 r disp_clk_regs +ffffffff82b1507c r disp_clk_shift +ffffffff82b15088 r disp_clk_mask +ffffffff82b16000 r dce112_max_clks_by_state +ffffffff82b16028 r disp_clk_regs +ffffffff82b1607c r disp_clk_shift +ffffffff82b16088 r disp_clk_mask +ffffffff82b17000 r dce120_max_clks_by_state +ffffffff82b18000 r clk_mgr_regs +ffffffff82b18054 r clk_mgr_shift +ffffffff82b18060 r clk_mgr_mask +ffffffff82b19000 r clk_mgr_regs +ffffffff82b19054 r clk_mgr_shift +ffffffff82b19060 r clk_mgr_mask +ffffffff82b1a000 r clk_mgr_regs +ffffffff82b1a054 r clk_mgr_shift +ffffffff82b1a060 r clk_mgr_mask +ffffffff82b1b000 r lpddr5_wm_table +ffffffff82b1b0c0 r ddr5_wm_table +ffffffff82b1c000 r lpddr5_wm_table +ffffffff82b1c0c0 r ddr5_wm_table +ffffffff82b1d000 r lpddr5_wm_table +ffffffff82b1d0c0 r ddr5_wm_table +ffffffff82b1e000 r lpddr5_wm_table +ffffffff82b1e0c0 r ddr4_wm_table +ffffffff82b1f000 r clk_mgr_regs_dcn321 +ffffffff82b1f054 r clk_mgr_shift_dcn321 +ffffffff82b1f060 r clk_mgr_mask_dcn321 +ffffffff82b1f084 r clk_mgr_regs_dcn32 +ffffffff82b1f0d8 r clk_mgr_shift_dcn32 +ffffffff82b1f0e4 r clk_mgr_mask_dcn32 +ffffffff82b20000 r DC_BUILD_ID +ffffffff82b22000 r output_csc_matrix +ffffffff82b220e0 r black_color_format +ffffffff82b23000 r DP_SINK_BRANCH_DEV_NAME_7580 +ffffffff82b24000 r DP_VGA_DONGLE_BRANCH_DEV_NAME +ffffffff82b24006 r DP_DVI_CONVERTER_ID_4 +ffffffff82b2400d r DP_DVI_CONVERTER_ID_5 +ffffffff82b25000 r DP_VGA_LVDS_CONVERTER_ID_2 +ffffffff82b25007 r DP_VGA_LVDS_CONVERTER_ID_3 +ffffffff82b25010 r dp_lt_fallbacks +ffffffff82b26000 r mandatory_dpcd_partitions +ffffffff82b28000 r dce_funcs +ffffffff82b29000 r funcs +ffffffff82b2a000 R video_optimized_pixel_rates +ffffffff82b2a1b0 r dce110_clk_src_funcs +ffffffff82b2a1d8 r dce112_clk_src_funcs +ffffffff82b2a200 r dcn20_clk_src_funcs +ffffffff82b2a228 r dcn3_clk_src_funcs +ffffffff82b2a250 r dcn31_clk_src_funcs +ffffffff82b2b000 r dce_funcs +ffffffff82b2b068 r dcn10_funcs +ffffffff82b2b0d0 r dcn20_funcs +ffffffff82b2b138 r dcn21_funcs +ffffffff82b2c000 r dce_ipp_funcs +ffffffff82b2d000 r dce110_lnk_enc_funcs +ffffffff82b2e000 r dce_mi_funcs +ffffffff82b2e090 r dce112_mi_funcs +ffffffff82b2e120 r dce120_mi_funcs +ffffffff82b2e1b0 r pte_settings +ffffffff82b2f000 r funcs +ffffffff82b30000 r dce_link_panel_cntl_funcs +ffffffff82b31000 r filter_3tap_16p_upscale +ffffffff82b31040 r filter_3tap_16p_116 +ffffffff82b31080 r filter_3tap_16p_149 +ffffffff82b310c0 r filter_3tap_16p_183 +ffffffff82b31100 r filter_3tap_64p_upscale +ffffffff82b311d0 r filter_3tap_64p_116 +ffffffff82b312a0 r filter_3tap_64p_149 +ffffffff82b31370 r filter_3tap_64p_183 +ffffffff82b31440 r filter_4tap_16p_upscale +ffffffff82b31490 r filter_4tap_16p_116 +ffffffff82b314e0 r filter_4tap_16p_149 +ffffffff82b31530 r filter_4tap_16p_183 +ffffffff82b31580 r filter_4tap_64p_upscale +ffffffff82b31690 r filter_4tap_64p_116 +ffffffff82b317a0 r filter_4tap_64p_149 +ffffffff82b318b0 r filter_4tap_64p_183 +ffffffff82b319c0 r filter_5tap_64p_upscale +ffffffff82b31b10 r filter_5tap_64p_116 +ffffffff82b31c60 r filter_5tap_64p_149 +ffffffff82b31db0 r filter_5tap_64p_183 +ffffffff82b31f00 r filter_6tap_64p_upscale +ffffffff82b32090 r filter_6tap_64p_116 +ffffffff82b32220 r filter_6tap_64p_149 +ffffffff82b323b0 r filter_6tap_64p_183 +ffffffff82b32540 r filter_7tap_64p_upscale +ffffffff82b32710 r filter_7tap_64p_116 +ffffffff82b328e0 r filter_7tap_64p_149 +ffffffff82b32ab0 r filter_7tap_64p_183 +ffffffff82b32c80 r filter_8tap_64p_upscale +ffffffff82b32e90 r filter_8tap_64p_116 +ffffffff82b330a0 r filter_8tap_64p_149 +ffffffff82b332b0 r filter_8tap_64p_183 +ffffffff82b334c0 r filter_2tap_16p +ffffffff82b334f0 r filter_2tap_64p +ffffffff82b34000 r dce110_str_enc_funcs +ffffffff82b34110 r audio_clock_info_table_48bpc +ffffffff82b342a0 r audio_clock_info_table_36bpc +ffffffff82b34430 r audio_clock_info_table +ffffffff82b35000 r global_color_matrix +ffffffff82b350a8 r dce_transform_funcs +ffffffff82b36000 r abm_funcs +ffffffff82b37000 r psr_funcs +ffffffff82b37040 r DP_SINK_DEVICE_STR_ID_1 +ffffffff82b37045 r DP_SINK_DEVICE_STR_ID_2 +ffffffff82b38000 r reg_offsets +ffffffff82b39000 r bios_regs +ffffffff82b39008 r res_cap +ffffffff82b39048 r dce100_res_pool_funcs +ffffffff82b39130 r clk_src_regs +ffffffff82b3922c r dmcu_regs +ffffffff82b39288 r dmcu_shift +ffffffff82b3929c r dmcu_mask +ffffffff82b392e8 r abm_regs +ffffffff82b39328 r abm_shift +ffffffff82b3933c r abm_mask +ffffffff82b39390 r dce100_tg_offsets +ffffffff82b393d8 r plane_cap +ffffffff82b39408 r res_create_funcs +ffffffff82b39440 r panel_cntl_regs +ffffffff82b39460 r panel_cntl_shift +ffffffff82b39470 r panel_cntl_mask +ffffffff82b394b0 r link_enc_regs +ffffffff82b39870 r link_enc_aux_regs +ffffffff82b398c0 r link_enc_hpd_regs +ffffffff82b398d8 r link_enc_feature +ffffffff82b398e8 r cs_shift +ffffffff82b398f4 r cs_mask +ffffffff82b39920 r mi_regs +ffffffff82b39c38 r mi_shifts +ffffffff82b39c80 r mi_masks +ffffffff82b39da0 r ipp_regs +ffffffff82b39f98 r ipp_shift +ffffffff82b39fc0 r ipp_mask +ffffffff82b3a060 r xfm_regs +ffffffff82b3a600 r xfm_shift +ffffffff82b3a660 r xfm_mask +ffffffff82b3a7e0 r opp_regs +ffffffff82b3a930 r opp_shift +ffffffff82b3a95c r opp_mask +ffffffff82b3aa10 r aux_engine_regs +ffffffff82b3ab00 r aux_mask +ffffffff82b3ab60 r aux_shift +ffffffff82b3ab80 r i2c_hw_regs +ffffffff82b3acd0 r i2c_shifts +ffffffff82b3acfc r i2c_masks +ffffffff82b3ada0 r audio_regs +ffffffff82b3aed4 r audio_shift +ffffffff82b3aeec r audio_mask +ffffffff82b3af30 r stream_enc_regs +ffffffff82b3b5dc r se_shift +ffffffff82b3b660 r se_mask +ffffffff82b3b864 r hwseq_reg +ffffffff82b3ba80 r hwseq_shift +ffffffff82b3bb00 r hwseq_mask +ffffffff82b3c000 r reg_offsets +ffffffff82b3c018 r dce110_compressor_funcs +ffffffff82b3d000 r dce110_funcs +ffffffff82b3d2c0 r dce110_private_funcs +ffffffff82b3e000 r dce110_mem_input_v_funcs +ffffffff82b3e090 r dvmm_Hw_Setting_1DTiling +ffffffff82b3e120 r dvmm_Hw_Setting_2DTiling +ffffffff82b3e1b0 r dvmm_Hw_Setting_Linear +ffffffff82b3f000 r global_color_matrix +ffffffff82b3f0b0 r input_csc_matrix +ffffffff82b40000 r funcs ffffffff82b41000 r bios_regs -ffffffff82b41008 r res_cap -ffffffff82b41048 r dce100_res_pool_funcs -ffffffff82b41130 r clk_src_regs -ffffffff82b4122c r dmcu_regs -ffffffff82b41288 r dmcu_shift -ffffffff82b4129c r dmcu_mask -ffffffff82b412e8 r abm_regs -ffffffff82b41328 r abm_shift -ffffffff82b4133c r abm_mask -ffffffff82b41390 r dce100_tg_offsets -ffffffff82b413d8 r plane_cap -ffffffff82b41408 r res_create_funcs -ffffffff82b41440 r panel_cntl_regs -ffffffff82b41460 r panel_cntl_shift -ffffffff82b41470 r panel_cntl_mask -ffffffff82b414b0 r link_enc_regs -ffffffff82b41870 r link_enc_aux_regs -ffffffff82b418c0 r link_enc_hpd_regs -ffffffff82b418d8 r link_enc_feature -ffffffff82b418e8 r cs_shift -ffffffff82b418f4 r cs_mask -ffffffff82b41920 r mi_regs -ffffffff82b41c38 r mi_shifts -ffffffff82b41c80 r mi_masks -ffffffff82b41da0 r ipp_regs -ffffffff82b41f98 r ipp_shift -ffffffff82b41fc0 r ipp_mask -ffffffff82b42060 r xfm_regs -ffffffff82b42600 r xfm_shift -ffffffff82b42660 r xfm_mask -ffffffff82b427e0 r opp_regs -ffffffff82b42930 r opp_shift -ffffffff82b4295c r opp_mask -ffffffff82b42a10 r aux_engine_regs -ffffffff82b42b00 r aux_mask -ffffffff82b42b60 r aux_shift -ffffffff82b42b80 r i2c_hw_regs -ffffffff82b42cd0 r i2c_shifts -ffffffff82b42cfc r i2c_masks -ffffffff82b42da0 r audio_regs -ffffffff82b42ed4 r audio_shift -ffffffff82b42eec r audio_mask -ffffffff82b42f30 r stream_enc_regs -ffffffff82b435dc r se_shift -ffffffff82b43660 r se_mask -ffffffff82b43864 r hwseq_reg -ffffffff82b43a80 r hwseq_shift -ffffffff82b43b00 r hwseq_mask -ffffffff82b44000 r reg_offsets -ffffffff82b44018 r dce110_compressor_funcs -ffffffff82b45000 r dce110_funcs -ffffffff82b452c0 r dce110_private_funcs -ffffffff82b46000 r dce110_mem_input_v_funcs -ffffffff82b46090 r dvmm_Hw_Setting_1DTiling -ffffffff82b46120 r dvmm_Hw_Setting_2DTiling -ffffffff82b461b0 r dvmm_Hw_Setting_Linear -ffffffff82b47000 r global_color_matrix -ffffffff82b470b0 r input_csc_matrix -ffffffff82b48000 r funcs +ffffffff82b41008 r dce110_res_pool_funcs +ffffffff82b410f0 r clk_src_regs +ffffffff82b411ec r dmcu_regs +ffffffff82b41248 r dmcu_shift +ffffffff82b4125c r dmcu_mask +ffffffff82b412a8 r abm_regs +ffffffff82b412e8 r abm_shift +ffffffff82b412fc r abm_mask +ffffffff82b41350 r dce110_tg_offsets +ffffffff82b41398 r res_create_funcs +ffffffff82b413c8 r plane_cap +ffffffff82b413f4 r underlay_plane_cap +ffffffff82b41420 r stoney_resource_cap +ffffffff82b4145c r carrizo_resource_cap +ffffffff82b414a0 r panel_cntl_regs +ffffffff82b414c0 r panel_cntl_shift +ffffffff82b414d0 r panel_cntl_mask +ffffffff82b41510 r link_enc_regs +ffffffff82b418d0 r link_enc_aux_regs +ffffffff82b41920 r link_enc_hpd_regs +ffffffff82b41938 r link_enc_feature +ffffffff82b41948 r cs_shift +ffffffff82b41954 r cs_mask +ffffffff82b41980 r mi_regs +ffffffff82b41b0c r mi_shifts +ffffffff82b41b54 r mi_masks +ffffffff82b41c70 r ipp_regs +ffffffff82b41d6c r ipp_shift +ffffffff82b41d94 r ipp_mask +ffffffff82b41e30 r xfm_regs +ffffffff82b42100 r xfm_shift +ffffffff82b42160 r xfm_mask +ffffffff82b422e0 r opp_regs +ffffffff82b42430 r opp_shift +ffffffff82b4245c r opp_mask +ffffffff82b42510 r aux_engine_regs +ffffffff82b42600 r aux_mask +ffffffff82b42660 r aux_shift +ffffffff82b42680 r i2c_hw_regs +ffffffff82b427d0 r i2c_shifts +ffffffff82b427fc r i2c_masks +ffffffff82b428a0 r audio_regs +ffffffff82b429d4 r audio_shift +ffffffff82b429ec r audio_mask +ffffffff82b42a30 r stream_enc_regs +ffffffff82b42d0c r se_shift +ffffffff82b42d90 r se_mask +ffffffff82b42f94 r hwseq_stoney_reg +ffffffff82b431b0 r hwseq_cz_reg +ffffffff82b433cc r hwseq_shift +ffffffff82b4344c r hwseq_mask +ffffffff82b44000 r dce110_tg_funcs +ffffffff82b45000 r dce110_tg_v_funcs +ffffffff82b46000 r dce110_xfmv_funcs +ffffffff82b47000 r reg_offsets +ffffffff82b48000 r reg_offsets ffffffff82b49000 r bios_regs -ffffffff82b49008 r dce110_res_pool_funcs +ffffffff82b49008 r dce112_res_pool_funcs ffffffff82b490f0 r clk_src_regs -ffffffff82b491ec r dmcu_regs -ffffffff82b49248 r dmcu_shift -ffffffff82b4925c r dmcu_mask -ffffffff82b492a8 r abm_regs -ffffffff82b492e8 r abm_shift -ffffffff82b492fc r abm_mask -ffffffff82b49350 r dce110_tg_offsets -ffffffff82b49398 r res_create_funcs -ffffffff82b493c8 r plane_cap -ffffffff82b493f4 r underlay_plane_cap -ffffffff82b49420 r stoney_resource_cap -ffffffff82b4945c r carrizo_resource_cap -ffffffff82b494a0 r panel_cntl_regs -ffffffff82b494c0 r panel_cntl_shift -ffffffff82b494d0 r panel_cntl_mask -ffffffff82b49510 r link_enc_regs -ffffffff82b498d0 r link_enc_aux_regs -ffffffff82b49920 r link_enc_hpd_regs -ffffffff82b49938 r link_enc_feature -ffffffff82b49948 r cs_shift -ffffffff82b49954 r cs_mask -ffffffff82b49980 r mi_regs -ffffffff82b49b0c r mi_shifts -ffffffff82b49b54 r mi_masks -ffffffff82b49c70 r ipp_regs -ffffffff82b49d6c r ipp_shift -ffffffff82b49d94 r ipp_mask -ffffffff82b49e30 r xfm_regs -ffffffff82b4a100 r xfm_shift -ffffffff82b4a160 r xfm_mask -ffffffff82b4a2e0 r opp_regs -ffffffff82b4a430 r opp_shift -ffffffff82b4a45c r opp_mask -ffffffff82b4a510 r aux_engine_regs -ffffffff82b4a600 r aux_mask -ffffffff82b4a660 r aux_shift -ffffffff82b4a680 r i2c_hw_regs -ffffffff82b4a7d0 r i2c_shifts -ffffffff82b4a7fc r i2c_masks -ffffffff82b4a8a0 r audio_regs -ffffffff82b4a9d4 r audio_shift -ffffffff82b4a9ec r audio_mask -ffffffff82b4aa30 r stream_enc_regs -ffffffff82b4ad0c r se_shift -ffffffff82b4ad90 r se_mask -ffffffff82b4af94 r hwseq_stoney_reg -ffffffff82b4b1b0 r hwseq_cz_reg -ffffffff82b4b3cc r hwseq_shift -ffffffff82b4b44c r hwseq_mask -ffffffff82b4c000 r dce110_tg_funcs -ffffffff82b4d000 r dce110_tg_v_funcs -ffffffff82b4e000 r dce110_xfmv_funcs -ffffffff82b4f000 r reg_offsets -ffffffff82b50000 r reg_offsets +ffffffff82b492e8 r dmcu_regs +ffffffff82b49344 r dmcu_shift +ffffffff82b49358 r dmcu_mask +ffffffff82b493a4 r abm_regs +ffffffff82b493e4 r abm_shift +ffffffff82b493f8 r abm_mask +ffffffff82b49440 r dce112_tg_offsets +ffffffff82b49488 r res_create_funcs +ffffffff82b494b8 r plane_cap +ffffffff82b494e4 r polaris_11_resource_cap +ffffffff82b49520 r polaris_10_resource_cap +ffffffff82b49560 r panel_cntl_regs +ffffffff82b49580 r panel_cntl_shift +ffffffff82b49590 r panel_cntl_mask +ffffffff82b495d0 r link_enc_regs +ffffffff82b49990 r link_enc_aux_regs +ffffffff82b499e0 r link_enc_hpd_regs +ffffffff82b499f8 r link_enc_feature +ffffffff82b49a08 r cs_shift +ffffffff82b49a14 r cs_mask +ffffffff82b49a40 r mi_regs +ffffffff82b49d58 r mi_shifts +ffffffff82b49da0 r mi_masks +ffffffff82b49ec0 r ipp_regs +ffffffff82b4a0b8 r ipp_shift +ffffffff82b4a0e0 r ipp_mask +ffffffff82b4a180 r xfm_regs +ffffffff82b4a720 r xfm_shift +ffffffff82b4a780 r xfm_mask +ffffffff82b4a900 r opp_regs +ffffffff82b4aa50 r opp_shift +ffffffff82b4aa7c r opp_mask +ffffffff82b4ab30 r aux_engine_regs +ffffffff82b4ac20 r aux_mask +ffffffff82b4ac80 r aux_shift +ffffffff82b4aca0 r i2c_hw_regs +ffffffff82b4adf0 r i2c_shifts +ffffffff82b4ae1c r i2c_masks +ffffffff82b4aec0 r audio_regs +ffffffff82b4afc8 r audio_shift +ffffffff82b4afe0 r audio_mask +ffffffff82b4b020 r stream_enc_regs +ffffffff82b4b5d8 r se_shift +ffffffff82b4b65c r se_mask +ffffffff82b4b860 r hwseq_reg +ffffffff82b4ba7c r hwseq_shift +ffffffff82b4bafc r hwseq_mask +ffffffff82b4c000 r bios_regs +ffffffff82b4c008 r res_cap +ffffffff82b4c048 r dce120_res_pool_funcs +ffffffff82b4c130 r debug_defaults +ffffffff82b4c2b0 r clk_src_regs +ffffffff82b4c4a8 r dmcu_regs +ffffffff82b4c504 r dmcu_shift +ffffffff82b4c518 r dmcu_mask +ffffffff82b4c564 r abm_regs +ffffffff82b4c5a4 r abm_shift +ffffffff82b4c5b8 r abm_mask +ffffffff82b4c600 r dce120_tg_offsets +ffffffff82b4c648 r dce121_res_create_funcs +ffffffff82b4c678 r res_create_funcs +ffffffff82b4c6a8 r plane_cap +ffffffff82b4c6e0 r panel_cntl_regs +ffffffff82b4c700 r panel_cntl_shift +ffffffff82b4c710 r panel_cntl_mask +ffffffff82b4c750 r link_enc_regs +ffffffff82b4cb10 r link_enc_aux_regs +ffffffff82b4cb60 r link_enc_hpd_regs +ffffffff82b4cb78 r link_enc_feature +ffffffff82b4cb88 r cs_shift +ffffffff82b4cb94 r cs_mask +ffffffff82b4cbc0 r mi_regs +ffffffff82b4ced8 r mi_shifts +ffffffff82b4cf20 r mi_masks +ffffffff82b4d040 r ipp_regs +ffffffff82b4d238 r ipp_shift +ffffffff82b4d260 r ipp_mask +ffffffff82b4d300 r xfm_regs +ffffffff82b4d8a0 r xfm_shift +ffffffff82b4d900 r xfm_mask +ffffffff82b4da80 r opp_regs +ffffffff82b4dbd0 r opp_shift +ffffffff82b4dbfc r opp_mask +ffffffff82b4dcb0 r aux_engine_regs +ffffffff82b4dda0 r aux_mask +ffffffff82b4de00 r aux_shift +ffffffff82b4de20 r i2c_hw_regs +ffffffff82b4df70 r i2c_shifts +ffffffff82b4df9c r i2c_masks +ffffffff82b4e040 r audio_regs +ffffffff82b4e174 r audio_shift +ffffffff82b4e18c r audio_mask +ffffffff82b4e1d0 r stream_enc_regs +ffffffff82b4e788 r se_shift +ffffffff82b4e80c r se_mask +ffffffff82b4ea10 r dce121_hwseq_reg +ffffffff82b4ec2c r dce121_hwseq_shift +ffffffff82b4ecac r dce121_hwseq_mask +ffffffff82b4eea0 r hwseq_reg +ffffffff82b4f0bc r hwseq_shift +ffffffff82b4f13c r hwseq_mask +ffffffff82b50000 r dce120_tg_funcs ffffffff82b51000 r bios_regs -ffffffff82b51008 r dce112_res_pool_funcs -ffffffff82b510f0 r clk_src_regs -ffffffff82b512e8 r dmcu_regs -ffffffff82b51344 r dmcu_shift -ffffffff82b51358 r dmcu_mask -ffffffff82b513a4 r abm_regs -ffffffff82b513e4 r abm_shift -ffffffff82b513f8 r abm_mask -ffffffff82b51440 r dce112_tg_offsets -ffffffff82b51488 r res_create_funcs -ffffffff82b514b8 r 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xfm_mask -ffffffff82b5a7e0 r opp_regs -ffffffff82b5a930 r opp_shift -ffffffff82b5a95c r opp_mask -ffffffff82b5aa10 r aux_engine_regs -ffffffff82b5ab00 r aux_mask -ffffffff82b5ab60 r aux_shift -ffffffff82b5ab80 r i2c_hw_regs -ffffffff82b5acd0 r i2c_shifts -ffffffff82b5acfc r i2c_masks -ffffffff82b5ada0 r audio_regs -ffffffff82b5aed4 r audio_shift -ffffffff82b5aeec r audio_mask -ffffffff82b5af30 r stream_enc_regs -ffffffff82b5b5dc r se_shift -ffffffff82b5b660 r se_mask -ffffffff82b5b864 r hwseq_reg -ffffffff82b5ba80 r hwseq_shift -ffffffff82b5bb00 r hwseq_mask -ffffffff82b5bcf4 r res_cap_81 -ffffffff82b5bd30 r res_cap_83 -ffffffff82b5c000 r reg_offsets -ffffffff82b5c048 r dce80_tg_funcs -ffffffff82b5d000 r dcn10_dpp_funcs -ffffffff82b5e000 r dpp_input_csc_matrix -ffffffff82b60000 r hubbub1_funcs -ffffffff82b61000 r dcn10_hubp_funcs -ffffffff82b62000 r reduceSizeAndFraction.prime_numbers -ffffffff82b64000 r dcn10_funcs -ffffffff82b642c0 r dcn10_private_funcs -ffffffff82b65000 r dcn10_ipp_funcs -ffffffff82b65048 r dcn20_ipp_funcs -ffffffff82b66000 r dcn10_lnk_enc_funcs -ffffffff82b67000 r dcn10_mpc_funcs -ffffffff82b68000 r dcn10_opp_funcs -ffffffff82b69000 r dcn10_tg_funcs -ffffffff82b6a000 r bios_regs -ffffffff82b6a008 r rv2_res_cap -ffffffff82b6a044 r res_cap -ffffffff82b6a080 r dcn10_res_pool_funcs -ffffffff82b6a168 r debug_defaults_drv -ffffffff82b6a2e0 r debug_defaults_diags -ffffffff82b6a460 r clk_src_regs -ffffffff82b6a5b0 r dmcu_regs -ffffffff82b6a60c r dmcu_shift -ffffffff82b6a620 r dmcu_mask -ffffffff82b6a66c r abm_regs -ffffffff82b6a6ac r abm_shift -ffffffff82b6a6c0 r abm_mask -ffffffff82b6a708 r res_create_funcs -ffffffff82b6a738 r res_create_maximus_funcs -ffffffff82b6a768 r plane_cap -ffffffff82b6a7a0 r panel_cntl_regs -ffffffff82b6a7c0 r panel_cntl_shift -ffffffff82b6a7d0 r panel_cntl_mask -ffffffff82b6a810 r link_enc_regs -ffffffff82b6ad20 r link_enc_aux_regs -ffffffff82b6ad60 r link_enc_hpd_regs -ffffffff82b6ad70 r le_shift -ffffffff82b6ae60 r le_mask -ffffffff82b6b218 r link_enc_feature -ffffffff82b6b228 r cs_shift -ffffffff82b6b234 r cs_mask -ffffffff82b6b260 r hubp_regs -ffffffff82b6b910 r hubp_shift -ffffffff82b6b9d4 r hubp_mask -ffffffff82b6bce0 r ipp_regs -ffffffff82b6bdc0 r ipp_shift -ffffffff82b6bddc r ipp_mask -ffffffff82b6be50 r tf_regs -ffffffff82b6cdb0 r tf_shift -ffffffff82b6d018 r tf_mask -ffffffff82b6d9b0 r opp_regs -ffffffff82b6da80 r opp_shift -ffffffff82b6daa0 r opp_mask -ffffffff82b6db20 r tg_regs -ffffffff82b6e020 r tg_shift -ffffffff82b6e0e0 r tg_mask -ffffffff82b6e3e0 r aux_engine_regs -ffffffff82b6e4d0 r aux_mask -ffffffff82b6e530 r aux_shift -ffffffff82b6e550 r i2c_hw_regs -ffffffff82b6e6a0 r i2c_shifts -ffffffff82b6e6cc r i2c_masks -ffffffff82b6e770 r mpc_regs -ffffffff82b6e890 r mpc_shift -ffffffff82b6e8a8 r mpc_mask -ffffffff82b6e904 r hubbub_reg -ffffffff82b6ea78 r hubbub_shift -ffffffff82b6eb00 r hubbub_mask -ffffffff82b6ed20 r audio_regs -ffffffff82b6edd0 r audio_shift -ffffffff82b6ede8 r audio_mask -ffffffff82b6ee30 r stream_enc_regs -ffffffff82b6f380 r se_shift -ffffffff82b6f45c r se_mask -ffffffff82b6f7c8 r hwseq_reg -ffffffff82b6f9e4 r hwseq_shift -ffffffff82b6fa64 r hwseq_mask -ffffffff82b70000 r audio_clock_info_table_48bpc -ffffffff82b70190 r audio_clock_info_table_36bpc -ffffffff82b70320 r audio_clock_info_table -ffffffff82b704e0 r dcn10_str_enc_funcs -ffffffff82b71000 r dccg2_funcs -ffffffff82b73000 r dpp_input_csc_matrix -ffffffff82b74000 R dcn20_dsc_funcs -ffffffff82b75000 R dcn20_dwbc_funcs -ffffffff82b76000 r filter_12tap_16p_upscale -ffffffff82b760e0 r filter_12tap_16p_117 -ffffffff82b761c0 r filter_12tap_16p_150 -ffffffff82b762a0 r filter_12tap_16p_183 -ffffffff82b76380 r filter_11tap_16p_upscale -ffffffff82b76450 r filter_11tap_16p_117 -ffffffff82b76520 r filter_11tap_16p_150 -ffffffff82b765f0 r filter_11tap_16p_183 -ffffffff82b766c0 r filter_10tap_16p_upscale -ffffffff82b76780 r filter_10tap_16p_117 -ffffffff82b76840 r filter_10tap_16p_150 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mcif_wb20_shift -ffffffff82b85230 r mcif_wb20_mask -ffffffff82b854b0 r link_enc_feature -ffffffff82b854c0 r bios_regs -ffffffff82b854c8 r dcn20_res_pool_funcs -ffffffff82b855b0 r res_cap_nv14 -ffffffff82b855f0 r debug_defaults_drv -ffffffff82b85768 r debug_defaults_diags -ffffffff82b858e0 r clk_src_regs -ffffffff82b85ad8 r dccg_regs -ffffffff82b85bc4 r dccg_shift -ffffffff82b85c5c r dccg_mask -ffffffff82b85ebc r dmcu_regs -ffffffff82b85f18 r dmcu_shift -ffffffff82b85f2c r dmcu_mask -ffffffff82b85f78 r abm_regs -ffffffff82b85fb8 r abm_shift -ffffffff82b85fcc r abm_mask -ffffffff82b86018 r res_create_funcs -ffffffff82b86048 r res_create_maximus_funcs -ffffffff82b86078 r plane_cap -ffffffff82b860b0 r panel_cntl_regs -ffffffff82b860d0 r panel_cntl_shift -ffffffff82b860e0 r panel_cntl_mask -ffffffff82b8611c r cs_shift -ffffffff82b86128 r cs_mask -ffffffff82b86150 r audio_regs -ffffffff82b86284 r audio_shift -ffffffff82b8629c r audio_mask -ffffffff82b87000 r dcn20_str_enc_funcs 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dcn32_str_enc_funcs -ffffffff82c0f000 r hubbub32_funcs -ffffffff82c10000 r dcn32_funcs -ffffffff82c102c0 r dcn32_private_funcs -ffffffff82c11000 R dcn32_mmhubbub_funcs -ffffffff82c12000 R dcn32_mpc_funcs -ffffffff82c13000 r res_cap_dcn32 -ffffffff82c13040 r debug_defaults_diags -ffffffff82c131b8 r dccg_shift -ffffffff82c13250 r dccg_mask -ffffffff82c134b0 r abm_shift -ffffffff82c134c4 r abm_mask -ffffffff82c13510 r res_create_funcs -ffffffff82c13540 r res_create_maximus_funcs -ffffffff82c13570 r plane_cap -ffffffff82c1359c r le_shift -ffffffff82c1368c r le_mask -ffffffff82c13a44 r link_enc_feature -ffffffff82c13a58 r debug_defaults_drv -ffffffff82c13bd0 r cs_shift -ffffffff82c13bdc r cs_mask -ffffffff82c13c04 r hubbub_shift -ffffffff82c13c8c r hubbub_mask -ffffffff82c13ea8 r vmid_shifts -ffffffff82c13eb0 r vmid_masks -ffffffff82c13ed0 r hubp_shift -ffffffff82c13fcc r hubp_mask -ffffffff82c143bc r tf_shift -ffffffff82c1468c r tf_mask -ffffffff82c151cc r opp_shift -ffffffff82c15204 r opp_mask -ffffffff82c152d8 r optc_shift -ffffffff82c15398 r optc_mask -ffffffff82c15698 r mpc_shift -ffffffff82c15774 r mpc_mask -ffffffff82c15ae0 r dsc_shift -ffffffff82c15b98 r dsc_mask -ffffffff82c15e70 r dwbc30_shift -ffffffff82c15fa4 r dwbc30_mask -ffffffff82c1646c r mcif_wb30_shift -ffffffff82c16518 r mcif_wb30_mask -ffffffff82c167c4 r aux_mask -ffffffff82c16824 r aux_shift -ffffffff82c1683c r i2c_shifts -ffffffff82c16868 r i2c_masks -ffffffff82c1690c r audio_shift -ffffffff82c16924 r audio_mask -ffffffff82c16960 r se_shift -ffffffff82c16a3c r se_mask -ffffffff82c16da8 r vpg_shift -ffffffff82c16dd0 r vpg_mask -ffffffff82c16e64 r afmt_shift -ffffffff82c16e78 r afmt_mask -ffffffff82c16ebc r hpo_dp_se_shift -ffffffff82c16ee4 r hpo_dp_se_mask -ffffffff82c16f84 r apg_shift -ffffffff82c16f8c r apg_mask -ffffffff82c16fa4 r hpo_dp_le_shift -ffffffff82c16fc0 r hpo_dp_le_mask -ffffffff82c17024 r hwseq_shift -ffffffff82c170a4 r hwseq_mask -ffffffff82c18000 r dcn321_link_enc_funcs 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r dwbc30_shift -ffffffff82c1bfa4 r dwbc30_mask -ffffffff82c1c46c r mcif_wb30_shift -ffffffff82c1c518 r mcif_wb30_mask -ffffffff82c1c7c4 r aux_mask -ffffffff82c1c824 r aux_shift -ffffffff82c1c83c r i2c_shifts -ffffffff82c1c868 r i2c_masks -ffffffff82c1c90c r audio_shift -ffffffff82c1c924 r audio_mask -ffffffff82c1c960 r se_shift -ffffffff82c1ca3c r se_mask -ffffffff82c1cda8 r vpg_shift -ffffffff82c1cdd0 r vpg_mask -ffffffff82c1ce64 r afmt_shift -ffffffff82c1ce78 r afmt_mask -ffffffff82c1cebc r hpo_dp_se_shift -ffffffff82c1cee4 r hpo_dp_se_mask -ffffffff82c1cf84 r apg_shift -ffffffff82c1cf8c r apg_mask -ffffffff82c1cfa4 r hpo_dp_le_shift -ffffffff82c1cfc0 r hpo_dp_le_mask -ffffffff82c1d024 r hwseq_shift -ffffffff82c1d0a4 r hwseq_mask -ffffffff82c1f000 R dcn10_soc_defaults -ffffffff82c1f08c R dcn10_ip_defaults -ffffffff82c2a000 R dml20_funcs -ffffffff82c2a030 R dml20v2_funcs -ffffffff82c2a060 R dml21_funcs -ffffffff82c2a090 R dml30_funcs -ffffffff82c2a0c0 R dml31_funcs -ffffffff82c2a0f0 R dml314_funcs -ffffffff82c2a120 R dml32_funcs -ffffffff82c2d000 R qp_table_422_10bpc_min -ffffffff82c2d740 R qp_table_444_8bpc_max -ffffffff82c2e080 R qp_table_420_12bpc_max -ffffffff82c2e7c0 R qp_table_444_10bpc_min -ffffffff82c2f400 R qp_table_420_8bpc_max -ffffffff82c2f840 R qp_table_444_8bpc_min -ffffffff82c30180 R qp_table_444_12bpc_min -ffffffff82c310c0 R qp_table_420_12bpc_min -ffffffff82c31800 R qp_table_422_12bpc_min -ffffffff82c32140 R qp_table_422_12bpc_max -ffffffff82c32a80 R qp_table_444_12bpc_max -ffffffff82c339c0 R qp_table_420_8bpc_min -ffffffff82c33e00 R qp_table_422_8bpc_min -ffffffff82c34340 R qp_table_422_10bpc_max -ffffffff82c34a80 R qp_table_420_10bpc_max -ffffffff82c35040 R qp_table_420_10bpc_min -ffffffff82c35600 R qp_table_444_10bpc_max -ffffffff82c36240 R qp_table_422_8bpc_max +ffffffff82b51008 r res_cap +ffffffff82b51048 r dce80_res_pool_funcs +ffffffff82b51130 r clk_src_regs +ffffffff82b5122c r dmcu_regs +ffffffff82b51288 r dmcu_shift +ffffffff82b5129c r dmcu_mask +ffffffff82b512e8 r abm_regs +ffffffff82b51328 r abm_shift +ffffffff82b5133c r abm_mask +ffffffff82b51390 r dce80_tg_offsets +ffffffff82b513d8 r plane_cap +ffffffff82b51408 r res_create_funcs +ffffffff82b51440 r panel_cntl_regs +ffffffff82b51460 r panel_cntl_shift +ffffffff82b51470 r panel_cntl_mask +ffffffff82b514b0 r link_enc_regs +ffffffff82b51870 r link_enc_aux_regs +ffffffff82b518c0 r link_enc_hpd_regs +ffffffff82b518d8 r link_enc_feature +ffffffff82b518e8 r cs_shift +ffffffff82b518f4 r cs_mask +ffffffff82b51920 r mi_regs +ffffffff82b51c38 r mi_shifts +ffffffff82b51c80 r mi_masks +ffffffff82b51da0 r ipp_regs +ffffffff82b51f98 r ipp_shift +ffffffff82b51fc0 r ipp_mask +ffffffff82b52060 r xfm_regs +ffffffff82b52600 r xfm_shift +ffffffff82b52660 r xfm_mask +ffffffff82b527e0 r opp_regs +ffffffff82b52930 r opp_shift +ffffffff82b5295c r opp_mask +ffffffff82b52a10 r aux_engine_regs +ffffffff82b52b00 r aux_mask +ffffffff82b52b60 r aux_shift +ffffffff82b52b80 r i2c_hw_regs +ffffffff82b52cd0 r i2c_shifts +ffffffff82b52cfc r i2c_masks +ffffffff82b52da0 r audio_regs +ffffffff82b52ed4 r audio_shift +ffffffff82b52eec r audio_mask +ffffffff82b52f30 r stream_enc_regs +ffffffff82b535dc r se_shift +ffffffff82b53660 r se_mask +ffffffff82b53864 r hwseq_reg +ffffffff82b53a80 r hwseq_shift +ffffffff82b53b00 r hwseq_mask +ffffffff82b53cf4 r res_cap_81 +ffffffff82b53d30 r res_cap_83 +ffffffff82b54000 r reg_offsets +ffffffff82b54048 r dce80_tg_funcs +ffffffff82b55000 r dcn10_dpp_funcs +ffffffff82b56000 r dpp_input_csc_matrix +ffffffff82b58000 r hubbub1_funcs +ffffffff82b59000 r dcn10_hubp_funcs +ffffffff82b5a000 r reduceSizeAndFraction.prime_numbers +ffffffff82b5c000 r dcn10_funcs +ffffffff82b5c2c0 r dcn10_private_funcs +ffffffff82b5d000 r dcn10_ipp_funcs +ffffffff82b5d048 r dcn20_ipp_funcs +ffffffff82b5e000 r dcn10_lnk_enc_funcs +ffffffff82b5f000 r dcn10_mpc_funcs +ffffffff82b60000 r dcn10_opp_funcs +ffffffff82b61000 r dcn10_tg_funcs +ffffffff82b62000 r bios_regs +ffffffff82b62008 r rv2_res_cap +ffffffff82b62044 r res_cap +ffffffff82b62080 r dcn10_res_pool_funcs +ffffffff82b62168 r debug_defaults_drv +ffffffff82b622e0 r debug_defaults_diags +ffffffff82b62460 r clk_src_regs +ffffffff82b625b0 r dmcu_regs +ffffffff82b6260c r dmcu_shift +ffffffff82b62620 r dmcu_mask +ffffffff82b6266c r abm_regs +ffffffff82b626ac r abm_shift +ffffffff82b626c0 r abm_mask +ffffffff82b62708 r res_create_funcs +ffffffff82b62738 r res_create_maximus_funcs +ffffffff82b62768 r plane_cap +ffffffff82b627a0 r panel_cntl_regs +ffffffff82b627c0 r panel_cntl_shift +ffffffff82b627d0 r panel_cntl_mask +ffffffff82b62810 r link_enc_regs +ffffffff82b62d20 r link_enc_aux_regs +ffffffff82b62d60 r link_enc_hpd_regs +ffffffff82b62d70 r le_shift +ffffffff82b62e60 r le_mask +ffffffff82b63218 r link_enc_feature +ffffffff82b63228 r cs_shift +ffffffff82b63234 r cs_mask +ffffffff82b63260 r hubp_regs +ffffffff82b63910 r hubp_shift +ffffffff82b639d4 r hubp_mask +ffffffff82b63ce0 r ipp_regs +ffffffff82b63dc0 r ipp_shift +ffffffff82b63ddc r ipp_mask +ffffffff82b63e50 r tf_regs +ffffffff82b64db0 r tf_shift +ffffffff82b65018 r tf_mask +ffffffff82b659b0 r opp_regs +ffffffff82b65a80 r opp_shift +ffffffff82b65aa0 r opp_mask +ffffffff82b65b20 r tg_regs +ffffffff82b66020 r tg_shift +ffffffff82b660e0 r tg_mask +ffffffff82b663e0 r aux_engine_regs +ffffffff82b664d0 r aux_mask +ffffffff82b66530 r aux_shift +ffffffff82b66550 r i2c_hw_regs +ffffffff82b666a0 r i2c_shifts +ffffffff82b666cc r i2c_masks +ffffffff82b66770 r mpc_regs +ffffffff82b66890 r mpc_shift +ffffffff82b668a8 r mpc_mask +ffffffff82b66904 r hubbub_reg +ffffffff82b66a78 r hubbub_shift +ffffffff82b66b00 r hubbub_mask +ffffffff82b66d20 r audio_regs +ffffffff82b66dd0 r audio_shift +ffffffff82b66de8 r audio_mask +ffffffff82b66e30 r stream_enc_regs +ffffffff82b67380 r se_shift +ffffffff82b6745c r se_mask +ffffffff82b677c8 r hwseq_reg +ffffffff82b679e4 r hwseq_shift +ffffffff82b67a64 r hwseq_mask +ffffffff82b68000 r audio_clock_info_table_48bpc +ffffffff82b68190 r audio_clock_info_table_36bpc +ffffffff82b68320 r audio_clock_info_table +ffffffff82b684e0 r dcn10_str_enc_funcs +ffffffff82b69000 r dccg2_funcs +ffffffff82b6b000 r dpp_input_csc_matrix +ffffffff82b6c000 R dcn20_dsc_funcs +ffffffff82b6d000 R dcn20_dwbc_funcs +ffffffff82b6e000 r filter_12tap_16p_upscale +ffffffff82b6e0e0 r filter_12tap_16p_117 +ffffffff82b6e1c0 r filter_12tap_16p_150 +ffffffff82b6e2a0 r filter_12tap_16p_183 +ffffffff82b6e380 r filter_11tap_16p_upscale +ffffffff82b6e450 r filter_11tap_16p_117 +ffffffff82b6e520 r filter_11tap_16p_150 +ffffffff82b6e5f0 r filter_11tap_16p_183 +ffffffff82b6e6c0 r filter_10tap_16p_upscale +ffffffff82b6e780 r filter_10tap_16p_117 +ffffffff82b6e840 r filter_10tap_16p_150 +ffffffff82b6e900 r filter_10tap_16p_183 +ffffffff82b6e9c0 r filter_9tap_16p_upscale +ffffffff82b6ea70 r filter_9tap_16p_117 +ffffffff82b6eb20 r filter_9tap_16p_150 +ffffffff82b6ebd0 r filter_9tap_16p_183 +ffffffff82b6ec80 r filter_8tap_16p_upscale +ffffffff82b6ed10 r filter_8tap_16p_117 +ffffffff82b6eda0 r filter_8tap_16p_150 +ffffffff82b6ee30 r filter_8tap_16p_183 +ffffffff82b6eec0 r filter_7tap_16p_upscale +ffffffff82b6ef40 r filter_7tap_16p_117 +ffffffff82b6efc0 r filter_7tap_16p_150 +ffffffff82b6f040 r filter_7tap_16p_183 +ffffffff82b6f0c0 r filter_6tap_16p_upscale +ffffffff82b6f130 r filter_6tap_16p_117 +ffffffff82b6f1a0 r filter_6tap_16p_150 +ffffffff82b6f210 r filter_6tap_16p_183 +ffffffff82b6f280 r filter_5tap_16p_upscale +ffffffff82b6f2e0 r filter_5tap_16p_117 +ffffffff82b6f340 r filter_5tap_16p_150 +ffffffff82b6f3a0 r filter_5tap_16p_183 +ffffffff82b6f400 r filter_4tap_16p_upscale +ffffffff82b6f450 r filter_4tap_16p_117 +ffffffff82b6f4a0 r filter_4tap_16p_150 +ffffffff82b6f4f0 r filter_4tap_16p_183 +ffffffff82b6f540 r filter_3tap_16p_upscale +ffffffff82b6f580 r filter_3tap_16p_117 +ffffffff82b6f5c0 r filter_3tap_16p_150 +ffffffff82b6f600 r filter_3tap_16p_183 +ffffffff82b70000 r hubbub2_funcs +ffffffff82b71000 r dcn20_funcs +ffffffff82b712c0 r dcn20_private_funcs +ffffffff82b72000 r dcn20_link_enc_funcs +ffffffff82b720e0 r dcn2_mpll_cfg +ffffffff82b73000 R dcn20_mmhubbub_funcs +ffffffff82b74000 R dcn20_mpc_funcs +ffffffff82b75000 r tf_regs +ffffffff82b76920 r tf_shift +ffffffff82b76ba4 r tf_mask +ffffffff82b775c0 r ipp_regs +ffffffff82b77710 r ipp_shift +ffffffff82b7772c r ipp_mask +ffffffff82b777a0 r opp_regs +ffffffff82b779b0 r opp_shift +ffffffff82b779e8 r opp_mask +ffffffff82b77ac0 r aux_engine_regs +ffffffff82b77bb0 r aux_mask +ffffffff82b77c10 r aux_shift +ffffffff82b77c30 r i2c_hw_regs +ffffffff82b77d80 r i2c_shifts +ffffffff82b77dac r i2c_masks +ffffffff82b77e50 r mpc_regs +ffffffff82b78398 r mpc_shift +ffffffff82b783e0 r mpc_mask +ffffffff82b784f4 r hubbub_reg +ffffffff82b78668 r hubbub_shift +ffffffff82b786f0 r hubbub_mask +ffffffff82b7890c r res_cap_nv10 +ffffffff82b78950 r vmid_regs +ffffffff82b78b10 r vmid_shifts +ffffffff82b78b18 r vmid_masks +ffffffff82b78b40 r tg_regs +ffffffff82b792c0 r tg_shift +ffffffff82b79380 r tg_mask +ffffffff82b79680 r link_enc_regs +ffffffff82b79e20 r link_enc_aux_regs +ffffffff82b79e80 r link_enc_hpd_regs +ffffffff82b79e98 r le_shift +ffffffff82b79f88 r le_mask +ffffffff82b7a340 r stream_enc_regs +ffffffff82b7ab38 r se_shift +ffffffff82b7ac14 r se_mask +ffffffff82b7af80 r hwseq_reg +ffffffff82b7b19c r hwseq_shift +ffffffff82b7b21c r hwseq_mask +ffffffff82b7b410 r dsc_regs +ffffffff82b7b8a8 r dsc_shift +ffffffff82b7b960 r dsc_mask +ffffffff82b7bc40 r hubp_regs +ffffffff82b7c888 r hubp_shift +ffffffff82b7c984 r hubp_mask +ffffffff82b7cd80 r dwbc20_regs +ffffffff82b7ce38 r dwbc20_shift +ffffffff82b7ceb8 r dwbc20_mask +ffffffff82b7d0b0 r mcif_wb20_regs +ffffffff82b7d190 r mcif_wb20_shift +ffffffff82b7d230 r mcif_wb20_mask +ffffffff82b7d4b0 r link_enc_feature +ffffffff82b7d4c0 r bios_regs +ffffffff82b7d4c8 r dcn20_res_pool_funcs +ffffffff82b7d5b0 r res_cap_nv14 +ffffffff82b7d5f0 r debug_defaults_drv +ffffffff82b7d768 r debug_defaults_diags +ffffffff82b7d8e0 r clk_src_regs +ffffffff82b7dad8 r dccg_regs +ffffffff82b7dbc4 r dccg_shift +ffffffff82b7dc5c r dccg_mask +ffffffff82b7debc r dmcu_regs +ffffffff82b7df18 r dmcu_shift +ffffffff82b7df2c r dmcu_mask +ffffffff82b7df78 r abm_regs +ffffffff82b7dfb8 r abm_shift +ffffffff82b7dfcc r abm_mask +ffffffff82b7e018 r res_create_funcs +ffffffff82b7e048 r res_create_maximus_funcs +ffffffff82b7e078 r plane_cap +ffffffff82b7e0b0 r panel_cntl_regs +ffffffff82b7e0d0 r panel_cntl_shift +ffffffff82b7e0e0 r panel_cntl_mask +ffffffff82b7e11c r cs_shift +ffffffff82b7e128 r cs_mask +ffffffff82b7e150 r audio_regs +ffffffff82b7e284 r audio_shift +ffffffff82b7e29c r audio_mask +ffffffff82b7f000 r dcn20_str_enc_funcs +ffffffff82b80000 r dccg201_funcs +ffffffff82b81000 r hubbub201_funcs +ffffffff82b82000 r dcn201_funcs +ffffffff82b822c0 r dcn201_private_funcs +ffffffff82b83000 r dcn201_link_enc_funcs +ffffffff82b84000 R dcn201_mpc_funcs +ffffffff82b85000 r bios_regs +ffffffff82b85008 r res_cap_dnc201 +ffffffff82b85048 r debug_defaults_drv +ffffffff82b851c0 r clk_src_regs +ffffffff82b85268 r dccg_regs +ffffffff82b85354 r dccg_shift +ffffffff82b853ec r dccg_mask +ffffffff82b85650 r res_create_funcs +ffffffff82b85680 r res_create_maximus_funcs +ffffffff82b856b0 r plane_cap +ffffffff82b856e0 r link_enc_regs +ffffffff82b85970 r link_enc_aux_regs +ffffffff82b85990 r link_enc_hpd_regs +ffffffff82b85998 r le_shift +ffffffff82b85a88 r le_mask +ffffffff82b85e40 r link_enc_feature +ffffffff82b85e50 r cs_shift +ffffffff82b85e5c r cs_mask +ffffffff82b85e90 r hubp_regs +ffffffff82b86620 r hubp_shift +ffffffff82b866f8 r hubp_mask +ffffffff82b86a60 r ipp_regs +ffffffff82b86b40 r ipp_shift +ffffffff82b86b5c r ipp_mask +ffffffff82b86bd0 r tf_regs +ffffffff82b87c10 r tf_shift +ffffffff82b87e94 r tf_mask +ffffffff82b888b0 r opp_regs +ffffffff82b88960 r opp_shift +ffffffff82b88998 r opp_mask +ffffffff82b88a70 r aux_engine_regs +ffffffff82b88ac0 r aux_mask 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+ffffffff82b8f130 r debug_defaults_drv +ffffffff82b8f2a8 r debug_defaults_diags +ffffffff82b8f420 r clk_src_regs +ffffffff82b8f5c4 r dccg_regs +ffffffff82b8f6b0 r dccg_shift +ffffffff82b8f748 r dccg_mask +ffffffff82b8f9a8 r dmcu_regs +ffffffff82b8fa04 r dmcu_shift +ffffffff82b8fa18 r dmcu_mask +ffffffff82b8fa64 r abm_regs +ffffffff82b8faa4 r abm_shift +ffffffff82b8fab8 r abm_mask +ffffffff82b8fb00 r res_create_funcs +ffffffff82b8fb30 r res_create_maximus_funcs +ffffffff82b8fb60 r plane_cap +ffffffff82b8fb90 r panel_cntl_regs +ffffffff82b8fbb0 r panel_cntl_shift +ffffffff82b8fbc0 r panel_cntl_mask +ffffffff82b8fc00 r link_enc_regs +ffffffff82b90260 r link_enc_aux_regs +ffffffff82b902b0 r link_enc_hpd_regs +ffffffff82b902c4 r le_shift +ffffffff82b903b4 r le_mask +ffffffff82b9076c r link_enc_feature +ffffffff82b9077c r panel_config_defaults +ffffffff82b907b8 r cs_shift +ffffffff82b907c4 r cs_mask +ffffffff82b907f0 r hubp_regs +ffffffff82b91020 r hubp_shift +ffffffff82b9111c r hubp_mask +ffffffff82b91510 r ipp_regs +ffffffff82b915f0 r ipp_shift +ffffffff82b9160c r ipp_mask +ffffffff82b91680 r tf_regs +ffffffff82b92740 r tf_shift +ffffffff82b929c4 r tf_mask +ffffffff82b933e0 r opp_regs +ffffffff82b935f0 r opp_shift +ffffffff82b93628 r opp_mask +ffffffff82b93700 r tg_regs +ffffffff82b93c00 r tg_shift +ffffffff82b93cc0 r tg_mask +ffffffff82b93fc0 r aux_engine_regs +ffffffff82b94088 r aux_mask +ffffffff82b940e8 r aux_shift +ffffffff82b94100 r i2c_hw_regs +ffffffff82b94218 r i2c_shifts +ffffffff82b94244 r i2c_masks +ffffffff82b942e8 r mpc_regs +ffffffff82b94830 r mpc_shift +ffffffff82b94878 r mpc_mask +ffffffff82b9498c r hubbub_reg +ffffffff82b94b00 r hubbub_shift +ffffffff82b94b88 r hubbub_mask +ffffffff82b94db0 r vmid_regs +ffffffff82b94f70 r vmid_shifts +ffffffff82b94f78 r vmid_masks +ffffffff82b94fa0 r dsc_regs +ffffffff82b95438 r dsc_shift +ffffffff82b954f0 r dsc_mask +ffffffff82b957d0 r audio_regs +ffffffff82b958d8 r audio_shift +ffffffff82b958f0 r audio_mask +ffffffff82b95930 r stream_enc_regs +ffffffff82b95fd4 r se_shift +ffffffff82b960b0 r se_mask +ffffffff82b9641c r hwseq_reg +ffffffff82b96638 r hwseq_shift +ffffffff82b966b8 r hwseq_mask +ffffffff82b97000 r dccg3_funcs +ffffffff82b98000 r dcn30_link_enc_funcs +ffffffff82b99000 r dcn30_str_enc_funcs +ffffffff82b9a000 r dpp_input_csc_matrix +ffffffff82b9b000 R dcn30_dwbc_funcs +ffffffff82b9c000 r hubbub30_funcs +ffffffff82b9d000 r dcn30_funcs +ffffffff82b9d2c0 r dcn30_private_funcs +ffffffff82b9e000 R dcn30_mmhubbub_funcs +ffffffff82b9f000 R dcn30_mpc_funcs +ffffffff82ba0000 r bios_regs +ffffffff82ba0008 r res_cap_dcn3 +ffffffff82ba0048 r dcn30_res_pool_funcs +ffffffff82ba0130 r debug_defaults_drv +ffffffff82ba02a8 r debug_defaults_diags +ffffffff82ba0420 r clk_src_regs +ffffffff82ba0618 r dccg_regs +ffffffff82ba0704 r dccg_shift +ffffffff82ba079c r dccg_mask +ffffffff82ba0a00 r abm_regs +ffffffff82ba0b80 r abm_shift +ffffffff82ba0b94 r abm_mask +ffffffff82ba0be0 r res_create_funcs +ffffffff82ba0c10 r res_create_maximus_funcs +ffffffff82ba0c40 r plane_cap +ffffffff82ba0c70 r panel_cntl_regs +ffffffff82ba0c90 r panel_cntl_shift +ffffffff82ba0ca0 r panel_cntl_mask +ffffffff82ba0ce0 r link_enc_regs +ffffffff82ba1480 r link_enc_aux_regs +ffffffff82ba14e0 r link_enc_hpd_regs +ffffffff82ba14f8 r le_shift +ffffffff82ba15e8 r le_mask +ffffffff82ba19a0 r link_enc_feature +ffffffff82ba19b0 r cs_shift +ffffffff82ba19bc r cs_mask +ffffffff82ba19e4 r hubbub_reg +ffffffff82ba1b58 r hubbub_shift +ffffffff82ba1be0 r hubbub_mask +ffffffff82ba1e00 r vmid_regs +ffffffff82ba1fc0 r vmid_shifts +ffffffff82ba1fc8 r vmid_masks +ffffffff82ba1ff0 r hubp_regs +ffffffff82ba2c38 r hubp_shift +ffffffff82ba2d34 r hubp_mask +ffffffff82ba3130 r dpp_regs +ffffffff82ba50b0 r tf_shift +ffffffff82ba5380 r tf_mask +ffffffff82ba5ec0 r opp_regs +ffffffff82ba60d0 r opp_shift +ffffffff82ba6108 r opp_mask +ffffffff82ba61e0 r optc_regs +ffffffff82ba6960 r optc_shift +ffffffff82ba6a20 r optc_mask +ffffffff82ba6d20 r mpc_regs +ffffffff82ba850c r mpc_shift +ffffffff82ba85e8 r mpc_mask +ffffffff82ba8960 r dsc_regs +ffffffff82ba8df8 r dsc_shift +ffffffff82ba8eb0 r dsc_mask +ffffffff82ba9190 r dwbc30_regs +ffffffff82ba936c r dwbc30_shift +ffffffff82ba94a0 r dwbc30_mask +ffffffff82ba9970 r mcif_wb30_regs +ffffffff82ba9a6c r mcif_wb30_shift +ffffffff82ba9b18 r mcif_wb30_mask +ffffffff82ba9dd0 r aux_engine_regs +ffffffff82ba9ec0 r aux_mask +ffffffff82ba9f20 r aux_shift +ffffffff82ba9f40 r i2c_hw_regs +ffffffff82baa090 r i2c_shifts +ffffffff82baa0bc r i2c_masks +ffffffff82baa160 r audio_regs +ffffffff82baa294 r audio_shift +ffffffff82baa2ac r audio_mask +ffffffff82baa2f0 r stream_enc_regs +ffffffff82baaae8 r se_shift +ffffffff82baabc4 r se_mask +ffffffff82baaf30 r vpg_regs +ffffffff82baafbc r vpg_shift +ffffffff82baafe4 r vpg_mask +ffffffff82bab080 r afmt_regs +ffffffff82bab17c r afmt_shift +ffffffff82bab190 r afmt_mask +ffffffff82bab1d4 r hwseq_reg +ffffffff82bab3f0 r hwseq_shift +ffffffff82bab470 r hwseq_mask +ffffffff82bac000 r dccg301_funcs +ffffffff82bad000 r dcn301_link_enc_funcs +ffffffff82bae000 r hubbub301_funcs +ffffffff82baf000 r dcn301_funcs +ffffffff82baf2c0 r dcn301_private_funcs +ffffffff82bb0000 r dcn301_link_panel_cntl_funcs +ffffffff82bb1000 r bios_regs +ffffffff82bb1008 r debug_defaults_drv +ffffffff82bb1180 r debug_defaults_diags +ffffffff82bb1300 r clk_src_regs +ffffffff82bb1450 r dccg_regs +ffffffff82bb153c r dccg_shift +ffffffff82bb15d4 r dccg_mask +ffffffff82bb1840 r abm_regs +ffffffff82bb1940 r abm_shift +ffffffff82bb1954 r abm_mask +ffffffff82bb19a0 r res_create_funcs +ffffffff82bb19d0 r res_create_maximus_funcs +ffffffff82bb1a00 r plane_cap +ffffffff82bb1a30 r panel_cntl_regs +ffffffff82bb1a70 r panel_cntl_shift +ffffffff82bb1a80 r panel_cntl_mask +ffffffff82bb1ac0 r link_enc_regs +ffffffff82bb1fd0 r link_enc_aux_regs +ffffffff82bb2010 r link_enc_hpd_regs +ffffffff82bb2020 r le_shift +ffffffff82bb2110 r le_mask +ffffffff82bb24c8 r link_enc_feature +ffffffff82bb24d8 r cs_shift +ffffffff82bb24e4 r cs_mask +ffffffff82bb250c r hubbub_reg +ffffffff82bb2680 r hubbub_shift +ffffffff82bb2708 r hubbub_mask +ffffffff82bb2930 r vmid_regs +ffffffff82bb2af0 r vmid_shifts +ffffffff82bb2af8 r vmid_masks +ffffffff82bb2b20 r hubp_regs +ffffffff82bb3350 r hubp_shift +ffffffff82bb344c r hubp_mask +ffffffff82bb3840 r dpp_regs +ffffffff82bb4d40 r tf_shift +ffffffff82bb5010 r tf_mask +ffffffff82bb5b50 r opp_regs +ffffffff82bb5cb0 r opp_shift +ffffffff82bb5ce8 r opp_mask +ffffffff82bb5dc0 r optc_regs +ffffffff82bb62c0 r optc_shift +ffffffff82bb6380 r optc_mask +ffffffff82bb6680 r mpc_regs +ffffffff82bb7e6c r mpc_shift +ffffffff82bb7f48 r mpc_mask +ffffffff82bb82c0 r dsc_regs +ffffffff82bb850c r dsc_shift +ffffffff82bb85c4 r dsc_mask +ffffffff82bb88a0 r dwbc30_regs +ffffffff82bb8a7c r dwbc30_shift +ffffffff82bb8bb0 r dwbc30_mask +ffffffff82bb9080 r mcif_wb30_regs +ffffffff82bb917c r mcif_wb30_shift +ffffffff82bb9228 r mcif_wb30_mask +ffffffff82bb94e0 r aux_engine_regs +ffffffff82bb9580 r aux_mask +ffffffff82bb95e0 r aux_shift +ffffffff82bb9600 r i2c_hw_regs +ffffffff82bb96e0 r i2c_shifts +ffffffff82bb970c r i2c_masks +ffffffff82bb97b0 r audio_regs +ffffffff82bb98e4 r audio_shift +ffffffff82bb98fc r audio_mask +ffffffff82bb9940 r stream_enc_regs +ffffffff82bb9e90 r se_shift +ffffffff82bb9f6c r se_mask +ffffffff82bba2e0 r vpg_regs +ffffffff82bba330 r vpg_shift +ffffffff82bba358 r vpg_mask +ffffffff82bba3f0 r afmt_regs +ffffffff82bba480 r afmt_shift +ffffffff82bba494 r afmt_mask +ffffffff82bba4d8 r hwseq_reg +ffffffff82bba6f4 r hwseq_shift +ffffffff82bba774 r hwseq_mask +ffffffff82bbb000 r bios_regs +ffffffff82bbb008 r res_cap_dcn302 +ffffffff82bbb048 r debug_defaults_drv +ffffffff82bbb1c0 r debug_defaults_diags +ffffffff82bbb340 r clk_src_regs +ffffffff82bbb4e4 r dccg_regs +ffffffff82bbb5d0 r dccg_shift +ffffffff82bbb668 r dccg_mask +ffffffff82bbb8d0 r abm_regs +ffffffff82bbba10 r abm_shift +ffffffff82bbba24 r abm_mask +ffffffff82bbba70 r res_create_funcs +ffffffff82bbbaa0 r res_create_maximus_funcs +ffffffff82bbbad0 r plane_cap +ffffffff82bbbb00 r panel_cntl_regs +ffffffff82bbbb20 r panel_cntl_shift +ffffffff82bbbb30 r panel_cntl_mask +ffffffff82bbbb70 r link_enc_regs +ffffffff82bbc1d0 r link_enc_aux_regs +ffffffff82bbc220 r link_enc_hpd_regs +ffffffff82bbc234 r le_shift +ffffffff82bbc324 r le_mask +ffffffff82bbc6dc r link_enc_feature +ffffffff82bbc6ec r cs_shift +ffffffff82bbc6f8 r cs_mask +ffffffff82bbc720 r hubbub_reg +ffffffff82bbc894 r hubbub_shift +ffffffff82bbc91c r hubbub_mask +ffffffff82bbcb40 r vmid_regs +ffffffff82bbcd00 r vmid_shifts +ffffffff82bbcd08 r vmid_masks +ffffffff82bbcd30 r hubp_regs +ffffffff82bbd76c r hubp_shift +ffffffff82bbd868 r hubp_mask +ffffffff82bbdc60 r dpp_regs +ffffffff82bbf6a0 r tf_shift +ffffffff82bbf970 r tf_mask +ffffffff82bc04b0 r opp_regs +ffffffff82bc0668 r opp_shift +ffffffff82bc06a0 r opp_mask +ffffffff82bc0780 r optc_regs +ffffffff82bc0dc0 r optc_shift +ffffffff82bc0e80 r optc_mask +ffffffff82bc1180 r mpc_regs +ffffffff82bc296c r mpc_shift +ffffffff82bc2a48 r mpc_mask +ffffffff82bc2dc0 r dsc_regs +ffffffff82bc3194 r dsc_shift +ffffffff82bc324c r dsc_mask +ffffffff82bc3530 r dwbc30_regs +ffffffff82bc370c r dwbc30_shift +ffffffff82bc3840 r dwbc30_mask +ffffffff82bc3d10 r mcif_wb30_regs +ffffffff82bc3e0c r mcif_wb30_shift +ffffffff82bc3eb8 r mcif_wb30_mask +ffffffff82bc4170 r aux_engine_regs +ffffffff82bc4238 r aux_mask +ffffffff82bc4298 r aux_shift +ffffffff82bc42b0 r i2c_hw_regs +ffffffff82bc43c8 r i2c_shifts +ffffffff82bc43f4 r i2c_masks +ffffffff82bc44a0 r audio_regs +ffffffff82bc45d4 r audio_shift +ffffffff82bc45ec r audio_mask +ffffffff82bc4630 r stream_enc_regs +ffffffff82bc4cd4 r se_shift +ffffffff82bc4db0 r se_mask +ffffffff82bc5120 r vpg_regs +ffffffff82bc5198 r vpg_shift +ffffffff82bc51c0 r vpg_mask +ffffffff82bc5260 r afmt_regs +ffffffff82bc5338 r afmt_shift +ffffffff82bc534c r afmt_mask +ffffffff82bc5390 r hwseq_reg +ffffffff82bc55ac r hwseq_shift +ffffffff82bc562c r hwseq_mask +ffffffff82bc6000 r bios_regs +ffffffff82bc6008 r res_cap_dcn303 +ffffffff82bc6048 r debug_defaults_drv +ffffffff82bc61c0 r debug_defaults_diags +ffffffff82bc6340 r clk_src_regs +ffffffff82bc63e8 r dccg_regs +ffffffff82bc64d4 r dccg_shift +ffffffff82bc656c r dccg_mask +ffffffff82bc67d0 r abm_regs +ffffffff82bc6850 r abm_shift +ffffffff82bc6864 r abm_mask +ffffffff82bc68b0 r res_create_funcs +ffffffff82bc68e0 r res_create_maximus_funcs +ffffffff82bc6910 r plane_cap +ffffffff82bc6940 r panel_cntl_regs +ffffffff82bc6960 r panel_cntl_shift +ffffffff82bc6970 r panel_cntl_mask +ffffffff82bc69b0 r link_enc_regs +ffffffff82bc6c40 r link_enc_aux_regs +ffffffff82bc6c60 r link_enc_hpd_regs +ffffffff82bc6c68 r le_shift +ffffffff82bc6d58 r le_mask +ffffffff82bc7110 r link_enc_feature +ffffffff82bc7120 r cs_shift +ffffffff82bc712c r cs_mask +ffffffff82bc7154 r hubbub_reg +ffffffff82bc72c8 r hubbub_shift +ffffffff82bc7350 r hubbub_mask +ffffffff82bc7570 r vmid_regs +ffffffff82bc7730 r vmid_shifts +ffffffff82bc7738 r vmid_masks +ffffffff82bc7760 r hubp_regs +ffffffff82bc7b78 r hubp_shift +ffffffff82bc7c74 r hubp_mask +ffffffff82bc8070 r dpp_regs +ffffffff82bc8af0 r tf_shift +ffffffff82bc8dc0 r tf_mask +ffffffff82bc9900 r opp_regs +ffffffff82bc99b0 r opp_shift +ffffffff82bc99e8 r opp_mask +ffffffff82bc9ac0 r optc_regs +ffffffff82bc9d40 r optc_shift +ffffffff82bc9e00 r optc_mask +ffffffff82bca100 r mpc_regs +ffffffff82bcb8ec r mpc_shift +ffffffff82bcb9c8 r mpc_mask +ffffffff82bcbd40 r dsc_regs +ffffffff82bcbec8 r dsc_shift +ffffffff82bcbf80 r dsc_mask +ffffffff82bcc260 r dwbc30_regs +ffffffff82bcc43c r dwbc30_shift +ffffffff82bcc570 r dwbc30_mask +ffffffff82bcca40 r mcif_wb30_regs +ffffffff82bccb3c r mcif_wb30_shift +ffffffff82bccbe8 r mcif_wb30_mask +ffffffff82bccea0 r aux_engine_regs +ffffffff82bccef0 r aux_mask +ffffffff82bccf50 r aux_shift +ffffffff82bccf70 r i2c_hw_regs +ffffffff82bccfe0 r i2c_shifts +ffffffff82bcd00c r i2c_masks +ffffffff82bcd0b0 r audio_regs +ffffffff82bcd1e4 r audio_shift +ffffffff82bcd1fc r audio_mask +ffffffff82bcd240 r stream_enc_regs +ffffffff82bcd4e8 r se_shift +ffffffff82bcd5c4 r se_mask +ffffffff82bcd930 r vpg_regs +ffffffff82bcd96c r vpg_shift +ffffffff82bcd994 r vpg_mask +ffffffff82bcda30 r afmt_regs +ffffffff82bcda9c r afmt_shift +ffffffff82bcdab0 r afmt_mask +ffffffff82bcdaf4 r hwseq_reg +ffffffff82bcdd10 r hwseq_shift +ffffffff82bcdd90 r hwseq_mask +ffffffff82bce000 r dccg31_funcs +ffffffff82bcf000 r dcn31_link_enc_funcs +ffffffff82bd0000 r dcn30_str_enc_funcs +ffffffff82bd1000 r hubbub31_funcs +ffffffff82bd2000 r dcn31_funcs +ffffffff82bd22c0 r dcn31_private_funcs +ffffffff82bd3000 r dcn31_link_panel_cntl_funcs +ffffffff82bd4000 r bios_regs +ffffffff82bd4008 r res_cap_dcn31 +ffffffff82bd4048 r debug_defaults_diags +ffffffff82bd41c0 r clk_src_regs +ffffffff82bd4370 r clk_src_regs_b0 +ffffffff82bd4514 r dccg_regs +ffffffff82bd4600 r dccg_shift +ffffffff82bd4698 r dccg_mask +ffffffff82bd4900 r abm_regs +ffffffff82bd4a00 r abm_shift +ffffffff82bd4a14 r abm_mask +ffffffff82bd4a60 r res_create_funcs +ffffffff82bd4a90 r res_create_maximus_funcs +ffffffff82bd4ac0 r plane_cap +ffffffff82bd4af0 r link_enc_regs +ffffffff82bd5150 r link_enc_aux_regs +ffffffff82bd51a0 r link_enc_hpd_regs +ffffffff82bd51b4 r le_shift +ffffffff82bd52a4 r le_mask +ffffffff82bd565c r link_enc_feature +ffffffff82bd566c r panel_config_defaults +ffffffff82bd56a8 r debug_defaults_drv +ffffffff82bd5820 r cs_shift +ffffffff82bd582c r cs_mask +ffffffff82bd5854 r hubbub_reg +ffffffff82bd59c8 r hubbub_shift +ffffffff82bd5a50 r hubbub_mask +ffffffff82bd5c70 r vmid_regs +ffffffff82bd5e30 r vmid_shifts +ffffffff82bd5e38 r vmid_masks +ffffffff82bd5e60 r hubp_regs +ffffffff82bd6690 r hubp_shift +ffffffff82bd678c r hubp_mask +ffffffff82bd6b80 r dpp_regs +ffffffff82bd8080 r tf_shift +ffffffff82bd8350 r tf_mask +ffffffff82bd8e90 r opp_regs +ffffffff82bd8ff0 r opp_shift +ffffffff82bd9028 r opp_mask +ffffffff82bd9100 r optc_regs +ffffffff82bd9600 r optc_shift +ffffffff82bd96c0 r optc_mask +ffffffff82bd99c0 r mpc_regs +ffffffff82bdb1ac r mpc_shift +ffffffff82bdb288 r mpc_mask +ffffffff82bdb600 r dsc_regs +ffffffff82bdb84c r dsc_shift +ffffffff82bdb904 r dsc_mask +ffffffff82bdbbe0 r dwbc30_regs +ffffffff82bdbdbc r dwbc30_shift +ffffffff82bdbef0 r dwbc30_mask +ffffffff82bdc3c0 r mcif_wb30_regs +ffffffff82bdc4bc r mcif_wb30_shift +ffffffff82bdc568 r mcif_wb30_mask +ffffffff82bdc820 r aux_engine_regs +ffffffff82bdc8e8 r aux_mask +ffffffff82bdc948 r aux_shift +ffffffff82bdc960 r i2c_hw_regs +ffffffff82bdca78 r i2c_shifts +ffffffff82bdcaa4 r i2c_masks +ffffffff82bdcb50 r audio_regs +ffffffff82bdcc84 r audio_shift +ffffffff82bdcc9c r audio_mask +ffffffff82bdccd8 r se_shift +ffffffff82bdcdb4 r se_mask +ffffffff82bdd120 r vpg_regs +ffffffff82bdd210 r vpg_shift +ffffffff82bdd238 r vpg_mask +ffffffff82bdd2e0 r afmt_regs +ffffffff82bdd3b8 r afmt_shift +ffffffff82bdd3cc r afmt_mask +ffffffff82bdd420 r stream_enc_regs +ffffffff82bdeac0 r hpo_dp_stream_enc_regs +ffffffff82bdecf0 r hpo_dp_se_shift +ffffffff82bded18 r hpo_dp_se_mask +ffffffff82bdedc0 r apg_regs +ffffffff82bdee00 r apg_shift +ffffffff82bdee08 r apg_mask +ffffffff82bdee20 r hpo_dp_link_enc_regs +ffffffff82bdef30 r hpo_dp_le_shift +ffffffff82bdef4c r hpo_dp_le_mask +ffffffff82bdefb0 r hwseq_reg +ffffffff82bdf1cc r hwseq_shift +ffffffff82bdf24c r hwseq_mask +ffffffff82be0000 r dccg314_funcs +ffffffff82be1000 r dcn314_str_enc_funcs +ffffffff82be2000 r dcn314_funcs +ffffffff82be22c0 r dcn314_private_funcs +ffffffff82be3000 r bios_regs +ffffffff82be3008 r res_cap_dcn314 +ffffffff82be3048 r debug_defaults_diags +ffffffff82be31c0 r clk_src_regs +ffffffff82be3364 r dccg_regs +ffffffff82be3450 r dccg_shift +ffffffff82be34e8 r dccg_mask +ffffffff82be3750 r abm_regs +ffffffff82be3850 r abm_shift +ffffffff82be3864 r abm_mask +ffffffff82be38b0 r res_create_funcs +ffffffff82be38e0 r res_create_maximus_funcs +ffffffff82be3910 r plane_cap +ffffffff82be3940 r link_enc_regs +ffffffff82be3fa0 r link_enc_aux_regs +ffffffff82be3ff0 r link_enc_hpd_regs +ffffffff82be4004 r le_shift +ffffffff82be40f4 r le_mask +ffffffff82be44ac r link_enc_feature +ffffffff82be44bc r panel_config_defaults +ffffffff82be44f8 r debug_defaults_drv +ffffffff82be4670 r cs_shift +ffffffff82be467c r cs_mask +ffffffff82be46a4 r hubbub_reg +ffffffff82be4818 r hubbub_shift +ffffffff82be48a0 r hubbub_mask +ffffffff82be4ac0 r vmid_regs +ffffffff82be4c80 r vmid_shifts +ffffffff82be4c88 r vmid_masks +ffffffff82be4cb0 r hubp_regs +ffffffff82be54e0 r hubp_shift +ffffffff82be55dc r hubp_mask +ffffffff82be59d0 r dpp_regs +ffffffff82be6ed0 r tf_shift +ffffffff82be71a0 r tf_mask +ffffffff82be7ce0 r opp_regs +ffffffff82be7e40 r opp_shift +ffffffff82be7e78 r opp_mask +ffffffff82be7f50 r optc_regs +ffffffff82be8450 r optc_shift +ffffffff82be8510 r optc_mask +ffffffff82be8810 r mpc_regs +ffffffff82be9ffc r mpc_shift +ffffffff82bea0d8 r mpc_mask +ffffffff82bea450 r dsc_regs +ffffffff82bea760 r dsc_shift +ffffffff82bea818 r dsc_mask +ffffffff82beaaf0 r dwbc30_regs +ffffffff82beaccc r dwbc30_shift +ffffffff82beae00 r dwbc30_mask +ffffffff82beb2d0 r mcif_wb30_regs +ffffffff82beb3cc r mcif_wb30_shift +ffffffff82beb478 r mcif_wb30_mask +ffffffff82beb730 r aux_engine_regs +ffffffff82beb7f8 r aux_mask +ffffffff82beb858 r aux_shift +ffffffff82beb870 r i2c_hw_regs +ffffffff82beb988 r i2c_shifts +ffffffff82beb9b4 r i2c_masks +ffffffff82beba60 r audio_regs +ffffffff82bebb94 r audio_shift +ffffffff82bebbac r audio_mask +ffffffff82bebbf0 r stream_enc_regs +ffffffff82bec294 r se_shift +ffffffff82bec370 r se_mask +ffffffff82bec6e0 r vpg_regs +ffffffff82bec7d0 r vpg_shift +ffffffff82bec7f8 r vpg_mask +ffffffff82bec8a0 r afmt_regs +ffffffff82bec978 r afmt_shift +ffffffff82bec98c r afmt_mask +ffffffff82bec9e0 r hpo_dp_stream_enc_regs +ffffffff82becc10 r hpo_dp_se_shift +ffffffff82becc38 r hpo_dp_se_mask +ffffffff82becce0 r apg_regs +ffffffff82becd20 r apg_shift +ffffffff82becd28 r apg_mask +ffffffff82becd40 r hpo_dp_link_enc_regs +ffffffff82bece50 r hpo_dp_le_shift +ffffffff82bece6c r hpo_dp_le_mask +ffffffff82beced0 r hwseq_reg +ffffffff82bed0ec r hwseq_shift +ffffffff82bed16c r hwseq_mask +ffffffff82bee000 r bios_regs +ffffffff82bee008 r res_cap_dcn31 +ffffffff82bee048 r debug_defaults_diags +ffffffff82bee1c0 r clk_src_regs +ffffffff82bee364 r dccg_regs +ffffffff82bee450 r dccg_shift +ffffffff82bee4e8 r dccg_mask +ffffffff82bee750 r abm_regs +ffffffff82bee850 r abm_shift +ffffffff82bee864 r abm_mask +ffffffff82bee8b0 r res_create_funcs +ffffffff82bee8e0 r res_create_maximus_funcs +ffffffff82bee910 r plane_cap +ffffffff82bee940 r link_enc_regs +ffffffff82beefa0 r link_enc_aux_regs +ffffffff82beeff0 r link_enc_hpd_regs +ffffffff82bef004 r le_shift +ffffffff82bef0f4 r le_mask +ffffffff82bef4ac r link_enc_feature +ffffffff82bef4bc r panel_config_defaults +ffffffff82bef4f8 r debug_defaults_drv +ffffffff82bef670 r cs_shift +ffffffff82bef67c r cs_mask +ffffffff82bef6a4 r hubbub_reg +ffffffff82bef818 r hubbub_shift +ffffffff82bef8a0 r hubbub_mask +ffffffff82befac0 r vmid_regs +ffffffff82befc80 r vmid_shifts +ffffffff82befc88 r vmid_masks +ffffffff82befcb0 r hubp_regs +ffffffff82bf04e0 r hubp_shift +ffffffff82bf05dc r hubp_mask +ffffffff82bf09d0 r dpp_regs +ffffffff82bf1ed0 r tf_shift +ffffffff82bf21a0 r tf_mask +ffffffff82bf2ce0 r opp_regs +ffffffff82bf2e40 r opp_shift +ffffffff82bf2e78 r opp_mask +ffffffff82bf2f50 r optc_regs +ffffffff82bf3450 r optc_shift +ffffffff82bf3510 r optc_mask +ffffffff82bf3810 r mpc_regs +ffffffff82bf4ffc r mpc_shift +ffffffff82bf50d8 r mpc_mask +ffffffff82bf5450 r dsc_regs +ffffffff82bf569c r dsc_shift +ffffffff82bf5754 r dsc_mask +ffffffff82bf5a30 r dwbc30_regs +ffffffff82bf5c0c r dwbc30_shift +ffffffff82bf5d40 r dwbc30_mask +ffffffff82bf6210 r mcif_wb30_regs +ffffffff82bf630c r mcif_wb30_shift +ffffffff82bf63b8 r mcif_wb30_mask +ffffffff82bf6670 r aux_engine_regs +ffffffff82bf6738 r aux_mask +ffffffff82bf6798 r aux_shift +ffffffff82bf67b0 r i2c_hw_regs +ffffffff82bf68c8 r i2c_shifts +ffffffff82bf68f4 r i2c_masks +ffffffff82bf69a0 r audio_regs +ffffffff82bf6ad4 r audio_shift +ffffffff82bf6aec r audio_mask +ffffffff82bf6b30 r stream_enc_regs +ffffffff82bf71d4 r se_shift +ffffffff82bf72b0 r se_mask +ffffffff82bf7620 r vpg_regs +ffffffff82bf7710 r vpg_shift +ffffffff82bf7738 r vpg_mask +ffffffff82bf77e0 r afmt_regs +ffffffff82bf78b8 r afmt_shift +ffffffff82bf78cc r afmt_mask +ffffffff82bf7920 r hpo_dp_stream_enc_regs +ffffffff82bf7b50 r hpo_dp_se_shift +ffffffff82bf7b78 r hpo_dp_se_mask +ffffffff82bf7c20 r apg_regs +ffffffff82bf7c60 r apg_shift +ffffffff82bf7c68 r apg_mask +ffffffff82bf7c80 r hpo_dp_link_enc_regs +ffffffff82bf7d90 r hpo_dp_le_shift +ffffffff82bf7dac r hpo_dp_le_mask +ffffffff82bf7e10 r hwseq_reg +ffffffff82bf802c r hwseq_shift +ffffffff82bf80ac r hwseq_mask +ffffffff82bf9000 r bios_regs +ffffffff82bf9008 r res_cap_dcn31 +ffffffff82bf9048 r debug_defaults_diags +ffffffff82bf91c0 r clk_src_regs +ffffffff82bf9364 r dccg_regs +ffffffff82bf9450 r dccg_shift +ffffffff82bf94e8 r dccg_mask +ffffffff82bf9750 r abm_regs +ffffffff82bf9850 r abm_shift +ffffffff82bf9864 r abm_mask +ffffffff82bf98b0 r res_create_funcs +ffffffff82bf98e0 r res_create_maximus_funcs +ffffffff82bf9910 r plane_cap +ffffffff82bf9940 r link_enc_regs +ffffffff82bf9fa0 r link_enc_aux_regs +ffffffff82bf9ff0 r link_enc_hpd_regs +ffffffff82bfa004 r le_shift +ffffffff82bfa0f4 r le_mask +ffffffff82bfa4ac r link_enc_feature +ffffffff82bfa4bc r panel_config_defaults +ffffffff82bfa4f8 r debug_defaults_drv +ffffffff82bfa670 r cs_shift +ffffffff82bfa67c r cs_mask +ffffffff82bfa6a4 r hubbub_reg +ffffffff82bfa818 r hubbub_shift +ffffffff82bfa8a0 r hubbub_mask +ffffffff82bfaac0 r vmid_regs +ffffffff82bfac80 r vmid_shifts +ffffffff82bfac88 r vmid_masks +ffffffff82bfacb0 r hubp_regs +ffffffff82bfb4e0 r hubp_shift +ffffffff82bfb5dc r hubp_mask +ffffffff82bfb9d0 r dpp_regs +ffffffff82bfced0 r tf_shift +ffffffff82bfd1a0 r tf_mask +ffffffff82bfdce0 r opp_regs +ffffffff82bfde40 r opp_shift +ffffffff82bfde78 r opp_mask +ffffffff82bfdf50 r optc_regs +ffffffff82bfe450 r optc_shift +ffffffff82bfe510 r optc_mask +ffffffff82bfe810 r mpc_regs +ffffffff82bffffc r mpc_shift +ffffffff82c000d8 r mpc_mask +ffffffff82c00450 r dsc_regs +ffffffff82c0069c r dsc_shift +ffffffff82c00754 r dsc_mask +ffffffff82c00a30 r dwbc30_regs +ffffffff82c00c0c r dwbc30_shift +ffffffff82c00d40 r dwbc30_mask +ffffffff82c01210 r mcif_wb30_regs +ffffffff82c0130c r mcif_wb30_shift +ffffffff82c013b8 r mcif_wb30_mask +ffffffff82c01670 r aux_engine_regs +ffffffff82c01738 r aux_mask +ffffffff82c01798 r aux_shift +ffffffff82c017b0 r i2c_hw_regs +ffffffff82c018c8 r i2c_shifts +ffffffff82c018f4 r i2c_masks +ffffffff82c019a0 r audio_regs +ffffffff82c01ad4 r audio_shift +ffffffff82c01aec r audio_mask +ffffffff82c01b30 r stream_enc_regs +ffffffff82c021d4 r se_shift +ffffffff82c022b0 r se_mask +ffffffff82c02620 r vpg_regs +ffffffff82c02710 r vpg_shift +ffffffff82c02738 r vpg_mask +ffffffff82c027e0 r afmt_regs +ffffffff82c028b8 r afmt_shift +ffffffff82c028cc r afmt_mask +ffffffff82c02920 r hpo_dp_stream_enc_regs +ffffffff82c02b50 r hpo_dp_se_shift +ffffffff82c02b78 r hpo_dp_se_mask +ffffffff82c02c20 r apg_regs +ffffffff82c02c60 r apg_shift +ffffffff82c02c68 r apg_mask +ffffffff82c02c80 r hpo_dp_link_enc_regs +ffffffff82c02d90 r hpo_dp_le_shift +ffffffff82c02dac r hpo_dp_le_mask +ffffffff82c02e10 r hwseq_reg +ffffffff82c0302c r hwseq_shift +ffffffff82c030ac r hwseq_mask +ffffffff82c04000 r dccg32_funcs +ffffffff82c05000 r dcn32_link_enc_funcs +ffffffff82c06000 r dcn32_str_enc_funcs +ffffffff82c07000 r hubbub32_funcs +ffffffff82c08000 r dcn32_funcs +ffffffff82c082c0 r dcn32_private_funcs +ffffffff82c09000 R dcn32_mmhubbub_funcs +ffffffff82c0a000 R dcn32_mpc_funcs +ffffffff82c0b000 r res_cap_dcn32 +ffffffff82c0b040 r debug_defaults_diags +ffffffff82c0b1b8 r dccg_shift +ffffffff82c0b250 r dccg_mask +ffffffff82c0b4b0 r abm_shift +ffffffff82c0b4c4 r abm_mask +ffffffff82c0b510 r res_create_funcs +ffffffff82c0b540 r res_create_maximus_funcs +ffffffff82c0b570 r plane_cap +ffffffff82c0b59c r le_shift +ffffffff82c0b68c r le_mask +ffffffff82c0ba44 r link_enc_feature +ffffffff82c0ba58 r debug_defaults_drv +ffffffff82c0bbd0 r cs_shift +ffffffff82c0bbdc r cs_mask +ffffffff82c0bc04 r hubbub_shift +ffffffff82c0bc8c r hubbub_mask +ffffffff82c0bea8 r vmid_shifts +ffffffff82c0beb0 r vmid_masks +ffffffff82c0bed0 r hubp_shift +ffffffff82c0bfcc r hubp_mask +ffffffff82c0c3bc r tf_shift +ffffffff82c0c68c r tf_mask +ffffffff82c0d1cc r opp_shift +ffffffff82c0d204 r opp_mask +ffffffff82c0d2d8 r optc_shift +ffffffff82c0d398 r optc_mask +ffffffff82c0d698 r mpc_shift +ffffffff82c0d774 r mpc_mask +ffffffff82c0dae0 r dsc_shift +ffffffff82c0db98 r dsc_mask +ffffffff82c0de70 r dwbc30_shift +ffffffff82c0dfa4 r dwbc30_mask +ffffffff82c0e46c r mcif_wb30_shift +ffffffff82c0e518 r mcif_wb30_mask +ffffffff82c0e7c4 r aux_mask +ffffffff82c0e824 r aux_shift +ffffffff82c0e83c r i2c_shifts +ffffffff82c0e868 r i2c_masks +ffffffff82c0e90c r audio_shift +ffffffff82c0e924 r audio_mask +ffffffff82c0e960 r se_shift +ffffffff82c0ea3c r se_mask +ffffffff82c0eda8 r vpg_shift +ffffffff82c0edd0 r vpg_mask +ffffffff82c0ee64 r afmt_shift +ffffffff82c0ee78 r afmt_mask +ffffffff82c0eebc r hpo_dp_se_shift +ffffffff82c0eee4 r hpo_dp_se_mask +ffffffff82c0ef84 r apg_shift +ffffffff82c0ef8c r apg_mask +ffffffff82c0efa4 r hpo_dp_le_shift +ffffffff82c0efc0 r hpo_dp_le_mask +ffffffff82c0f024 r hwseq_shift +ffffffff82c0f0a4 r hwseq_mask +ffffffff82c10000 r dcn321_link_enc_funcs +ffffffff82c11000 r res_cap_dcn321 +ffffffff82c11040 r debug_defaults_diags +ffffffff82c111b8 r dccg_shift +ffffffff82c11250 r dccg_mask +ffffffff82c114b0 r abm_shift +ffffffff82c114c4 r abm_mask +ffffffff82c11510 r res_create_funcs +ffffffff82c11540 r res_create_maximus_funcs +ffffffff82c11570 r plane_cap +ffffffff82c1159c r le_shift +ffffffff82c1168c r le_mask +ffffffff82c11a44 r link_enc_feature +ffffffff82c11a58 r debug_defaults_drv +ffffffff82c11bd0 r cs_shift +ffffffff82c11bdc r cs_mask +ffffffff82c11c04 r hubbub_shift +ffffffff82c11c8c r hubbub_mask +ffffffff82c11ea8 r vmid_shifts +ffffffff82c11eb0 r vmid_masks +ffffffff82c11ed0 r hubp_shift +ffffffff82c11fcc r hubp_mask +ffffffff82c123bc r tf_shift +ffffffff82c1268c r tf_mask +ffffffff82c131cc r opp_shift +ffffffff82c13204 r opp_mask +ffffffff82c132d8 r optc_shift +ffffffff82c13398 r optc_mask +ffffffff82c13698 r mpc_shift +ffffffff82c13774 r mpc_mask +ffffffff82c13ae0 r dsc_shift +ffffffff82c13b98 r dsc_mask +ffffffff82c13e70 r dwbc30_shift +ffffffff82c13fa4 r dwbc30_mask +ffffffff82c1446c r mcif_wb30_shift +ffffffff82c14518 r mcif_wb30_mask +ffffffff82c147c4 r aux_mask +ffffffff82c14824 r aux_shift +ffffffff82c1483c r i2c_shifts +ffffffff82c14868 r i2c_masks +ffffffff82c1490c r audio_shift +ffffffff82c14924 r audio_mask +ffffffff82c14960 r se_shift +ffffffff82c14a3c r se_mask +ffffffff82c14da8 r vpg_shift +ffffffff82c14dd0 r vpg_mask +ffffffff82c14e64 r afmt_shift +ffffffff82c14e78 r afmt_mask +ffffffff82c14ebc r hpo_dp_se_shift +ffffffff82c14ee4 r hpo_dp_se_mask +ffffffff82c14f84 r apg_shift +ffffffff82c14f8c r apg_mask +ffffffff82c14fa4 r hpo_dp_le_shift +ffffffff82c14fc0 r hpo_dp_le_mask +ffffffff82c15024 r hwseq_shift +ffffffff82c150a4 r hwseq_mask +ffffffff82c17000 R dcn10_soc_defaults +ffffffff82c1708c R dcn10_ip_defaults +ffffffff82c22000 R dml20_funcs +ffffffff82c22030 R dml20v2_funcs +ffffffff82c22060 R dml21_funcs +ffffffff82c22090 R dml30_funcs +ffffffff82c220c0 R dml31_funcs +ffffffff82c220f0 R dml314_funcs +ffffffff82c22120 R dml32_funcs +ffffffff82c25000 R qp_table_422_10bpc_min +ffffffff82c25740 R qp_table_444_8bpc_max +ffffffff82c26080 R qp_table_420_12bpc_max +ffffffff82c267c0 R qp_table_444_10bpc_min +ffffffff82c27400 R qp_table_420_8bpc_max +ffffffff82c27840 R qp_table_444_8bpc_min +ffffffff82c28180 R qp_table_444_12bpc_min +ffffffff82c290c0 R qp_table_420_12bpc_min +ffffffff82c29800 R qp_table_422_12bpc_min +ffffffff82c2a140 R qp_table_422_12bpc_max +ffffffff82c2aa80 R qp_table_444_12bpc_max +ffffffff82c2b9c0 R qp_table_420_8bpc_min +ffffffff82c2be00 R qp_table_422_8bpc_min +ffffffff82c2c340 R qp_table_422_10bpc_max +ffffffff82c2ca80 R qp_table_420_10bpc_max +ffffffff82c2d040 R qp_table_420_10bpc_min +ffffffff82c2d600 R qp_table_444_10bpc_max +ffffffff82c2e240 R qp_table_422_8bpc_max +ffffffff82c30000 r funcs +ffffffff82c30050 r hpd_regs +ffffffff82c301a0 r hpd_shift +ffffffff82c301b0 r hpd_mask +ffffffff82c301c0 r ddc_data_regs +ffffffff82c303a0 r ddc_clk_regs +ffffffff82c30580 r ddc_shift +ffffffff82c305a8 r ddc_mask +ffffffff82c31000 r funcs +ffffffff82c32000 r funcs +ffffffff82c32050 r hpd_regs +ffffffff82c321a0 r hpd_shift +ffffffff82c321b0 r hpd_mask +ffffffff82c321c0 r ddc_data_regs +ffffffff82c323a0 r ddc_clk_regs +ffffffff82c32580 r ddc_shift +ffffffff82c325a8 r ddc_mask +ffffffff82c33000 r funcs +ffffffff82c34000 r funcs +ffffffff82c34050 r hpd_regs +ffffffff82c341a0 r hpd_shift +ffffffff82c341b0 r hpd_mask +ffffffff82c341c0 r ddc_data_regs +ffffffff82c343a0 r ddc_clk_regs +ffffffff82c34580 r ddc_shift +ffffffff82c345a8 r ddc_mask +ffffffff82c35000 r funcs +ffffffff82c36000 r funcs +ffffffff82c36050 r hpd_regs +ffffffff82c361a0 r hpd_shift +ffffffff82c361b0 r hpd_mask +ffffffff82c361c0 r ddc_data_regs +ffffffff82c363a0 r ddc_clk_regs +ffffffff82c36580 r ddc_shift +ffffffff82c365a8 r ddc_mask +ffffffff82c365d0 r generic_regs +ffffffff82c36640 r generic_shift +ffffffff82c36650 r generic_mask +ffffffff82c37000 r funcs ffffffff82c38000 r funcs ffffffff82c38050 r hpd_regs ffffffff82c381a0 r hpd_shift ffffffff82c381b0 r hpd_mask -ffffffff82c381c0 r ddc_data_regs -ffffffff82c383a0 r ddc_clk_regs -ffffffff82c38580 r ddc_shift -ffffffff82c385a8 r ddc_mask +ffffffff82c381c0 r ddc_data_regs_dcn +ffffffff82c38370 r ddc_clk_regs_dcn +ffffffff82c38520 r ddc_shift +ffffffff82c38640 r ddc_mask +ffffffff82c38760 r generic_regs +ffffffff82c387d0 r generic_shift +ffffffff82c387e0 r generic_mask ffffffff82c39000 r funcs ffffffff82c3a000 r funcs ffffffff82c3a050 r hpd_regs -ffffffff82c3a1a0 r hpd_shift -ffffffff82c3a1b0 r hpd_mask -ffffffff82c3a1c0 r ddc_data_regs -ffffffff82c3a3a0 r ddc_clk_regs -ffffffff82c3a580 r ddc_shift -ffffffff82c3a5a8 r ddc_mask +ffffffff82c3a168 r hpd_shift +ffffffff82c3a178 r hpd_mask +ffffffff82c3a190 r ddc_data_regs_dcn +ffffffff82c3a2c0 r ddc_clk_regs_dcn +ffffffff82c3a3f0 r ddc_shift +ffffffff82c3a4e0 r ddc_mask +ffffffff82c3a5d0 r generic_regs +ffffffff82c3a604 r generic_shift +ffffffff82c3a60c r generic_mask ffffffff82c3b000 r funcs ffffffff82c3c000 r funcs ffffffff82c3c050 r hpd_regs ffffffff82c3c1a0 r hpd_shift ffffffff82c3c1b0 r hpd_mask -ffffffff82c3c1c0 r ddc_data_regs -ffffffff82c3c3a0 r ddc_clk_regs -ffffffff82c3c580 r ddc_shift -ffffffff82c3c5a8 r ddc_mask +ffffffff82c3c1c0 r ddc_data_regs_dcn +ffffffff82c3c370 r ddc_clk_regs_dcn +ffffffff82c3c520 r ddc_shift +ffffffff82c3c640 r ddc_mask +ffffffff82c3c760 r generic_regs +ffffffff82c3c7d0 r generic_shift +ffffffff82c3c7e0 r generic_mask ffffffff82c3d000 r funcs ffffffff82c3e000 r funcs ffffffff82c3e050 r hpd_regs -ffffffff82c3e1a0 r hpd_shift -ffffffff82c3e1b0 r hpd_mask -ffffffff82c3e1c0 r ddc_data_regs -ffffffff82c3e3a0 r ddc_clk_regs -ffffffff82c3e580 r ddc_shift -ffffffff82c3e5a8 r ddc_mask -ffffffff82c3e5d0 r generic_regs -ffffffff82c3e640 r generic_shift -ffffffff82c3e650 r generic_mask +ffffffff82c3e168 r hpd_shift +ffffffff82c3e178 r hpd_mask +ffffffff82c3e190 r ddc_data_regs_dcn +ffffffff82c3e300 r ddc_clk_regs_dcn +ffffffff82c3e470 r ddc_shift +ffffffff82c3e560 r ddc_mask +ffffffff82c3e650 r generic_regs +ffffffff82c3e6c0 r generic_shift +ffffffff82c3e6d0 r generic_mask ffffffff82c3f000 r funcs ffffffff82c40000 r funcs ffffffff82c40050 r hpd_regs -ffffffff82c401a0 r hpd_shift -ffffffff82c401b0 r hpd_mask -ffffffff82c401c0 r ddc_data_regs_dcn -ffffffff82c40370 r ddc_clk_regs_dcn -ffffffff82c40520 r ddc_shift -ffffffff82c40640 r ddc_mask -ffffffff82c40760 r generic_regs -ffffffff82c407d0 r generic_shift -ffffffff82c407e0 r generic_mask +ffffffff82c40168 r hpd_shift +ffffffff82c40178 r hpd_mask +ffffffff82c40190 r ddc_data_regs_dcn +ffffffff82c40340 r ddc_clk_regs_dcn +ffffffff82c404f0 r ddc_shift +ffffffff82c40610 r ddc_mask +ffffffff82c40730 r generic_regs +ffffffff82c407a0 r generic_shift +ffffffff82c407b0 r generic_mask ffffffff82c41000 r funcs ffffffff82c42000 r funcs -ffffffff82c42050 r hpd_regs -ffffffff82c42168 r hpd_shift -ffffffff82c42178 r hpd_mask -ffffffff82c42190 r ddc_data_regs_dcn -ffffffff82c422c0 r ddc_clk_regs_dcn -ffffffff82c423f0 r ddc_shift -ffffffff82c424e0 r ddc_mask -ffffffff82c425d0 r generic_regs -ffffffff82c42604 r generic_shift -ffffffff82c4260c r generic_mask ffffffff82c43000 r funcs ffffffff82c44000 r funcs -ffffffff82c44050 r hpd_regs -ffffffff82c441a0 r hpd_shift -ffffffff82c441b0 r hpd_mask -ffffffff82c441c0 r ddc_data_regs_dcn -ffffffff82c44370 r ddc_clk_regs_dcn -ffffffff82c44520 r ddc_shift -ffffffff82c44640 r ddc_mask -ffffffff82c44760 r generic_regs -ffffffff82c447d0 r generic_shift -ffffffff82c447e0 r generic_mask -ffffffff82c45000 r funcs -ffffffff82c46000 r funcs -ffffffff82c46050 r hpd_regs -ffffffff82c46168 r hpd_shift -ffffffff82c46178 r hpd_mask -ffffffff82c46190 r ddc_data_regs_dcn -ffffffff82c46300 r ddc_clk_regs_dcn -ffffffff82c46470 r ddc_shift -ffffffff82c46560 r ddc_mask -ffffffff82c46650 r generic_regs -ffffffff82c466c0 r generic_shift -ffffffff82c466d0 r generic_mask -ffffffff82c47000 r funcs -ffffffff82c48000 r funcs -ffffffff82c48050 r hpd_regs -ffffffff82c48168 r hpd_shift -ffffffff82c48178 r hpd_mask -ffffffff82c48190 r ddc_data_regs_dcn -ffffffff82c48340 r ddc_clk_regs_dcn -ffffffff82c484f0 r ddc_shift -ffffffff82c48610 r ddc_mask -ffffffff82c48730 r generic_regs -ffffffff82c487a0 r generic_shift -ffffffff82c487b0 r generic_mask -ffffffff82c49000 r funcs -ffffffff82c4a000 r funcs -ffffffff82c4b000 r funcs -ffffffff82c4c000 r funcs -ffffffff82c4d000 r hdmi_14_protection -ffffffff82c4d010 r dp_11_protection -ffffffff82c4d020 r hdcp_i2c_offsets -ffffffff82c4d050 r hdcp_dpcd_addrs -ffffffff82c4e000 r irq_service_funcs_dce110 +ffffffff82c45000 r hdmi_14_protection +ffffffff82c45010 r dp_11_protection +ffffffff82c45020 r hdcp_i2c_offsets +ffffffff82c45050 r hdcp_dpcd_addrs +ffffffff82c46000 r irq_service_funcs_dce110 +ffffffff82c46008 r dummy_irq_info_funcs +ffffffff82c46018 r hpd_irq_info_funcs +ffffffff82c46028 r hpd_rx_irq_info_funcs +ffffffff82c46038 r pflip_irq_info_funcs +ffffffff82c46048 r vupdate_irq_info_funcs +ffffffff82c46058 r vblank_irq_info_funcs +ffffffff82c46070 r irq_source_info_dce110 +ffffffff82c48000 r irq_service_funcs_dce120 +ffffffff82c48008 r dummy_irq_info_funcs +ffffffff82c48018 r hpd_irq_info_funcs +ffffffff82c48028 r hpd_rx_irq_info_funcs +ffffffff82c48038 r pflip_irq_info_funcs +ffffffff82c48048 r vupdate_irq_info_funcs +ffffffff82c48058 r vblank_irq_info_funcs +ffffffff82c48070 r irq_source_info_dce120 +ffffffff82c4a000 r irq_service_funcs_dce80 +ffffffff82c4a008 r dummy_irq_info_funcs +ffffffff82c4a018 r hpd_irq_info_funcs +ffffffff82c4a028 r hpd_rx_irq_info_funcs +ffffffff82c4a038 r pflip_irq_info_funcs +ffffffff82c4a048 r vupdate_irq_info_funcs +ffffffff82c4a058 r vblank_irq_info_funcs +ffffffff82c4a070 r irq_source_info_dce80 +ffffffff82c4c000 r irq_service_funcs_dcn10 +ffffffff82c4c008 r dummy_irq_info_funcs +ffffffff82c4c018 r hpd_irq_info_funcs +ffffffff82c4c028 r hpd_rx_irq_info_funcs +ffffffff82c4c038 r pflip_irq_info_funcs +ffffffff82c4c048 r vupdate_no_lock_irq_info_funcs +ffffffff82c4c058 r vblank_irq_info_funcs +ffffffff82c4c068 r vline0_irq_info_funcs +ffffffff82c4c080 r irq_source_info_dcn10 +ffffffff82c4e000 r irq_service_funcs_dcn20 ffffffff82c4e008 r dummy_irq_info_funcs ffffffff82c4e018 r hpd_irq_info_funcs ffffffff82c4e028 r hpd_rx_irq_info_funcs ffffffff82c4e038 r pflip_irq_info_funcs -ffffffff82c4e048 r vupdate_irq_info_funcs +ffffffff82c4e048 r vupdate_no_lock_irq_info_funcs ffffffff82c4e058 r vblank_irq_info_funcs -ffffffff82c4e070 r irq_source_info_dce110 -ffffffff82c50000 r irq_service_funcs_dce120 +ffffffff82c4e068 r vline0_irq_info_funcs +ffffffff82c4e080 r irq_source_info_dcn20 +ffffffff82c50000 r irq_service_funcs_dcn201 ffffffff82c50008 r dummy_irq_info_funcs ffffffff82c50018 r hpd_irq_info_funcs ffffffff82c50028 r hpd_rx_irq_info_funcs ffffffff82c50038 r pflip_irq_info_funcs -ffffffff82c50048 r vupdate_irq_info_funcs +ffffffff82c50048 r vupdate_no_lock_irq_info_funcs ffffffff82c50058 r vblank_irq_info_funcs -ffffffff82c50070 r irq_source_info_dce120 -ffffffff82c52000 r irq_service_funcs_dce80 -ffffffff82c52008 r dummy_irq_info_funcs -ffffffff82c52018 r hpd_irq_info_funcs -ffffffff82c52028 r hpd_rx_irq_info_funcs -ffffffff82c52038 r pflip_irq_info_funcs -ffffffff82c52048 r vupdate_irq_info_funcs -ffffffff82c52058 r vblank_irq_info_funcs -ffffffff82c52070 r irq_source_info_dce80 -ffffffff82c54000 r irq_service_funcs_dcn10 -ffffffff82c54008 r dummy_irq_info_funcs -ffffffff82c54018 r hpd_irq_info_funcs -ffffffff82c54028 r hpd_rx_irq_info_funcs -ffffffff82c54038 r pflip_irq_info_funcs -ffffffff82c54048 r vupdate_no_lock_irq_info_funcs -ffffffff82c54058 r vblank_irq_info_funcs -ffffffff82c54068 r vline0_irq_info_funcs -ffffffff82c54080 r irq_source_info_dcn10 -ffffffff82c56000 r irq_service_funcs_dcn20 -ffffffff82c56008 r dummy_irq_info_funcs -ffffffff82c56018 r hpd_irq_info_funcs -ffffffff82c56028 r hpd_rx_irq_info_funcs -ffffffff82c56038 r pflip_irq_info_funcs -ffffffff82c56048 r vupdate_no_lock_irq_info_funcs -ffffffff82c56058 r vblank_irq_info_funcs -ffffffff82c56068 r vline0_irq_info_funcs -ffffffff82c56080 r irq_source_info_dcn20 -ffffffff82c58000 r irq_service_funcs_dcn201 +ffffffff82c50068 r vline0_irq_info_funcs +ffffffff82c50080 r irq_source_info_dcn201 +ffffffff82c52000 r irq_source_info_dcn21 +ffffffff82c53290 r irq_service_funcs_dcn21 +ffffffff82c53298 r dummy_irq_info_funcs +ffffffff82c532a8 r hpd_irq_info_funcs +ffffffff82c532b8 r hpd_rx_irq_info_funcs +ffffffff82c532c8 r pflip_irq_info_funcs +ffffffff82c532d8 r vupdate_no_lock_irq_info_funcs +ffffffff82c532e8 r vblank_irq_info_funcs +ffffffff82c532f8 r vline0_irq_info_funcs +ffffffff82c53308 r dmub_outbox_irq_info_funcs +ffffffff82c54000 r irq_source_info_dcn30 +ffffffff82c55290 r irq_service_funcs_dcn30 +ffffffff82c55298 r dummy_irq_info_funcs +ffffffff82c552a8 r hpd_irq_info_funcs +ffffffff82c552b8 r hpd_rx_irq_info_funcs +ffffffff82c552c8 r pflip_irq_info_funcs +ffffffff82c552d8 r vupdate_no_lock_irq_info_funcs +ffffffff82c552e8 r vblank_irq_info_funcs +ffffffff82c552f8 r vline0_irq_info_funcs +ffffffff82c55308 r dmub_trace_irq_info_funcs +ffffffff82c56000 r irq_source_info_dcn302 +ffffffff82c57290 r irq_service_funcs_dcn302 +ffffffff82c57298 r dummy_irq_info_funcs +ffffffff82c572a8 r hpd_irq_info_funcs +ffffffff82c572b8 r hpd_rx_irq_info_funcs +ffffffff82c572c8 r pflip_irq_info_funcs +ffffffff82c572d8 r vupdate_no_lock_irq_info_funcs +ffffffff82c572e8 r vblank_irq_info_funcs +ffffffff82c572f8 r vline0_irq_info_funcs +ffffffff82c57308 r dmub_trace_irq_info_funcs +ffffffff82c58000 r irq_service_funcs_dcn303 ffffffff82c58008 r dummy_irq_info_funcs ffffffff82c58018 r hpd_irq_info_funcs ffffffff82c58028 r hpd_rx_irq_info_funcs @@ -46254,9 +46293,9 @@ ffffffff82c58038 r pflip_irq_info_funcs ffffffff82c58048 r vupdate_no_lock_irq_info_funcs ffffffff82c58058 r vblank_irq_info_funcs ffffffff82c58068 r vline0_irq_info_funcs -ffffffff82c58080 r irq_source_info_dcn201 -ffffffff82c5a000 r irq_source_info_dcn21 -ffffffff82c5b290 r irq_service_funcs_dcn21 +ffffffff82c58080 r irq_source_info_dcn303 +ffffffff82c5a000 r irq_source_info_dcn31 +ffffffff82c5b290 r irq_service_funcs_dcn31 ffffffff82c5b298 r dummy_irq_info_funcs ffffffff82c5b2a8 r hpd_irq_info_funcs ffffffff82c5b2b8 r hpd_rx_irq_info_funcs @@ -46264,9 +46303,9 @@ ffffffff82c5b2c8 r pflip_irq_info_funcs ffffffff82c5b2d8 r vupdate_no_lock_irq_info_funcs ffffffff82c5b2e8 r vblank_irq_info_funcs ffffffff82c5b2f8 r vline0_irq_info_funcs -ffffffff82c5b308 r dmub_outbox_irq_info_funcs -ffffffff82c5c000 r irq_source_info_dcn30 -ffffffff82c5d290 r irq_service_funcs_dcn30 +ffffffff82c5b308 r outbox_irq_info_funcs +ffffffff82c5c000 r irq_source_info_dcn314 +ffffffff82c5d290 r irq_service_funcs_dcn314 ffffffff82c5d298 r dummy_irq_info_funcs ffffffff82c5d2a8 r hpd_irq_info_funcs ffffffff82c5d2b8 r hpd_rx_irq_info_funcs @@ -46274,9 +46313,9 @@ ffffffff82c5d2c8 r pflip_irq_info_funcs ffffffff82c5d2d8 r vupdate_no_lock_irq_info_funcs ffffffff82c5d2e8 r vblank_irq_info_funcs ffffffff82c5d2f8 r vline0_irq_info_funcs -ffffffff82c5d308 r dmub_trace_irq_info_funcs -ffffffff82c5e000 r irq_source_info_dcn302 -ffffffff82c5f290 r irq_service_funcs_dcn302 +ffffffff82c5d308 r outbox_irq_info_funcs +ffffffff82c5e000 r irq_source_info_dcn315 +ffffffff82c5f290 r irq_service_funcs_dcn315 ffffffff82c5f298 r dummy_irq_info_funcs ffffffff82c5f2a8 r hpd_irq_info_funcs ffffffff82c5f2b8 r hpd_rx_irq_info_funcs @@ -46284,9534 +46323,9495 @@ ffffffff82c5f2c8 r pflip_irq_info_funcs ffffffff82c5f2d8 r vupdate_no_lock_irq_info_funcs ffffffff82c5f2e8 r vblank_irq_info_funcs ffffffff82c5f2f8 r vline0_irq_info_funcs -ffffffff82c5f308 r dmub_trace_irq_info_funcs -ffffffff82c60000 r irq_service_funcs_dcn303 -ffffffff82c60008 r dummy_irq_info_funcs -ffffffff82c60018 r hpd_irq_info_funcs -ffffffff82c60028 r hpd_rx_irq_info_funcs -ffffffff82c60038 r pflip_irq_info_funcs -ffffffff82c60048 r vupdate_no_lock_irq_info_funcs -ffffffff82c60058 r vblank_irq_info_funcs -ffffffff82c60068 r vline0_irq_info_funcs -ffffffff82c60080 r irq_source_info_dcn303 -ffffffff82c62000 r irq_source_info_dcn31 -ffffffff82c63290 r irq_service_funcs_dcn31 -ffffffff82c63298 r dummy_irq_info_funcs -ffffffff82c632a8 r hpd_irq_info_funcs -ffffffff82c632b8 r hpd_rx_irq_info_funcs -ffffffff82c632c8 r pflip_irq_info_funcs -ffffffff82c632d8 r vupdate_no_lock_irq_info_funcs -ffffffff82c632e8 r vblank_irq_info_funcs -ffffffff82c632f8 r vline0_irq_info_funcs -ffffffff82c63308 r outbox_irq_info_funcs -ffffffff82c64000 r irq_source_info_dcn314 -ffffffff82c65290 r irq_service_funcs_dcn314 -ffffffff82c65298 r dummy_irq_info_funcs -ffffffff82c652a8 r hpd_irq_info_funcs -ffffffff82c652b8 r hpd_rx_irq_info_funcs -ffffffff82c652c8 r pflip_irq_info_funcs -ffffffff82c652d8 r vupdate_no_lock_irq_info_funcs -ffffffff82c652e8 r vblank_irq_info_funcs -ffffffff82c652f8 r vline0_irq_info_funcs -ffffffff82c65308 r outbox_irq_info_funcs -ffffffff82c66000 r irq_source_info_dcn315 -ffffffff82c67290 r irq_service_funcs_dcn315 -ffffffff82c67298 r dummy_irq_info_funcs -ffffffff82c672a8 r hpd_irq_info_funcs -ffffffff82c672b8 r hpd_rx_irq_info_funcs -ffffffff82c672c8 r pflip_irq_info_funcs -ffffffff82c672d8 r vupdate_no_lock_irq_info_funcs -ffffffff82c672e8 r vblank_irq_info_funcs -ffffffff82c672f8 r vline0_irq_info_funcs -ffffffff82c67308 r outbox_irq_info_funcs -ffffffff82c68000 r irq_source_info_dcn32 -ffffffff82c69290 r irq_service_funcs_dcn32 -ffffffff82c69298 r dummy_irq_info_funcs -ffffffff82c692a8 r hpd_irq_info_funcs -ffffffff82c692b8 r hpd_rx_irq_info_funcs -ffffffff82c692c8 r pflip_irq_info_funcs -ffffffff82c692d8 r vupdate_no_lock_irq_info_funcs -ffffffff82c692e8 r vblank_irq_info_funcs -ffffffff82c692f8 r vline0_irq_info_funcs -ffffffff82c69308 r outbox_irq_info_funcs -ffffffff82c6a000 r dio_link_hwss -ffffffff82c6b000 r dpia_link_hwss -ffffffff82c6c000 r hpo_dp_link_hwss -ffffffff82c6d000 r virtual_lnk_enc_funcs -ffffffff82c6e000 r virtual_link_hwss -ffffffff82c6f000 r virtual_str_enc_funcs -ffffffff82c70000 R dmub_srv_dcn20_regs -ffffffff82c71000 R dmub_srv_dcn21_regs -ffffffff82c72000 R dmub_srv_dcn30_regs -ffffffff82c73000 R dmub_srv_dcn301_regs -ffffffff82c74000 R dmub_srv_dcn302_regs -ffffffff82c75000 R dmub_srv_dcn303_regs -ffffffff82c76000 R dmub_srv_dcn31_regs -ffffffff82c77000 R dmub_srv_dcn314_regs -ffffffff82c78000 R dmub_srv_dcn315_regs -ffffffff82c79000 R dmub_srv_dcn316_regs -ffffffff82c7a000 R dmub_srv_dcn32_regs -ffffffff82c7b000 r numerator01 -ffffffff82c7b020 r numerator02 -ffffffff82c7b040 r numerator04 -ffffffff82c7b060 r numerator05 -ffffffff82c7d000 r abm_settings -ffffffff82c7d010 r abm_settings_config0 -ffffffff82c7d050 r abm_settings_config1 -ffffffff82c7d088 r min_reduction_table_v_2_2 -ffffffff82c7d095 r max_reduction_table_v_2_2 -ffffffff82c7d0a2 r min_reduction_table -ffffffff82c7d0af r max_reduction_table -ffffffff82c7e000 R amdgpu_pp_profile_name -ffffffff82c7f000 r pp_lib_thermal_controller_names -ffffffff82c80000 r pp_ip_funcs -ffffffff82c800a0 R pp_smu_ip_block -ffffffff82c800b8 r pp_dpm_funcs -ffffffff82c81000 r gpio_tbl -ffffffff82c810f0 r enable_fb_req_rej_tbl -ffffffff82c81140 r use_bclk_tbl -ffffffff82c81310 r turn_off_plls_tbl -ffffffff82c81640 r enter_baco_tbl -ffffffff82c81730 r exit_baco_tbl -ffffffff82c81850 r clean_baco_tbl -ffffffff82c82000 r gpio_tbl -ffffffff82c820f0 r enable_fb_req_rej_tbl -ffffffff82c82140 r use_bclk_tbl -ffffffff82c822e0 r turn_off_plls_tbl -ffffffff82c82370 r clk_req_b_tbl -ffffffff82c82490 r enter_baco_tbl -ffffffff82c825b0 r exit_baco_tbl -ffffffff82c826d0 r clean_baco_tbl -ffffffff82c83000 r gpio_tbl -ffffffff82c830f0 r enable_fb_req_rej_tbl -ffffffff82c83140 r use_bclk_tbl_vg -ffffffff82c83200 r turn_off_plls_tbl_vg -ffffffff82c83350 r use_bclk_tbl -ffffffff82c83440 r turn_off_plls_tbl -ffffffff82c835f0 r clk_req_b_tbl -ffffffff82c83710 r enter_baco_tbl -ffffffff82c83830 r exit_baco_tbl -ffffffff82c83950 r clean_baco_tbl -ffffffff82c84000 r vega10_fuses_default -ffffffff82c93000 r pp_r600_encode_lanes -ffffffff82c94000 R pptable_v1_0_funcs -ffffffff82c95000 R pptable_funcs -ffffffff82c95020 r soft_dummy_pp_table -ffffffff82c96000 r smu10_hwmgr_funcs -ffffffff82c97000 r smu7_hwmgr_funcs -ffffffff82c972f8 r smu7_irq_funcs -ffffffff82c97310 r SMU7ThermalPolicy -ffffffff82c98000 r GCCACConfig_Polaris10 -ffffffff82c981b0 r DIDTConfig_Polaris10 -ffffffff82c98a50 r GCCACConfig_Polaris11 -ffffffff82c98c00 r DIDTConfig_Polaris11_Kicker -ffffffff82c994a0 r DIDTConfig_Polaris11 -ffffffff82c99d40 r DIDTConfig_Polaris12 -ffffffff82c9a5e0 r GCCACConfig_VegaM -ffffffff82c9a790 r DIDTConfig_VegaM -ffffffff82c9c000 r smu8_hwmgr_funcs -ffffffff82c9c2f0 r SMU7ThermalPolicy -ffffffff82c9d000 r smu9_irq_funcs -ffffffff82c9e000 r gpio_tbl_iceland -ffffffff82c9e060 r gpio_tbl -ffffffff82c9e150 r enable_fb_req_rej_tbl -ffffffff82c9e1a0 r use_bclk_tbl -ffffffff82c9e370 r turn_off_plls_tbl -ffffffff82c9e610 r enter_baco_tbl -ffffffff82c9e730 r exit_baco_tbl_iceland -ffffffff82c9e870 r clean_baco_tbl_iceland -ffffffff82c9e890 r exit_baco_tbl -ffffffff82c9e9b0 r clean_baco_tbl -ffffffff82c9f000 r pre_baco_tbl -ffffffff82c9f090 r enter_baco_tbl -ffffffff82c9f2b0 r exit_baco_tbl -ffffffff82c9f520 r clean_baco_tbl -ffffffff82ca0000 r vega10_hwmgr_funcs -ffffffff82ca02f0 r channel_number -ffffffff82ca0320 r SMU7ThermalWithDelayPolicy -ffffffff82ca1000 r SEDiDtStallCtrlConfig_vega10 -ffffffff82ca1110 r SEDiDtStallPatternConfig_vega10 -ffffffff82ca12e0 r SEDiDtWeightConfig_Vega10 -ffffffff82ca13b0 r SEDiDtCtrl1Config_Vega10 -ffffffff82ca1440 r SEDiDtCtrl2Config_Vega10 -ffffffff82ca1510 r SEDiDtCtrl3Config_vega10 -ffffffff82ca1820 r SEDiDtTuningCtrlConfig_Vega10 -ffffffff82ca18b0 r SELCacConfig_Vega10 -ffffffff82ca1a40 r SEDiDtCtrl0Config_Vega10 -ffffffff82ca1d10 r AvfsPSMInitConfig_vega10 -ffffffff82ca1d90 r SEEDCStallPatternConfig_Vega10 -ffffffff82ca1ea0 r SEEDCStallDelayConfig_Vega10 -ffffffff82ca1f80 r SEEDCCtrlConfig_Vega10 -ffffffff82ca2040 r PSMSEEDCStallPatternConfig_Vega10 -ffffffff82ca20c0 r PSMSEEDCStallDelayConfig_Vega10 -ffffffff82ca21d0 r PSMSEEDCCtrlResetConfig_Vega10 -ffffffff82ca2290 r PSMSEEDCCtrlConfig_Vega10 -ffffffff82ca2350 r SEEDCForceStallPatternConfig_Vega10 -ffffffff82ca23e0 r SEEDCCtrlForceStallConfig_Vega10 -ffffffff82ca3000 R vega10_pptable_funcs -ffffffff82ca4000 r pre_baco_tbl -ffffffff82ca4090 r enter_baco_tbl -ffffffff82ca42b0 r exit_baco_tbl -ffffffff82ca4520 r clean_baco_tbl -ffffffff82ca5000 r vega12_hwmgr_funcs -ffffffff82ca52f0 r SMU7ThermalWithDelayPolicy -ffffffff82ca5340 r link_width -ffffffff82ca6000 R vega12_pptable_funcs -ffffffff82ca7000 r clean_baco_tbl -ffffffff82ca8000 r vega20_hwmgr_funcs -ffffffff82ca82f0 r SMU7ThermalWithDelayPolicy -ffffffff82ca8340 r link_width -ffffffff82ca9000 R vega20_pptable_funcs -ffffffff82caa000 R ci_smu_funcs -ffffffff82caa0e0 r defaults_hawaii_pro -ffffffff82caa12c r defaults_hawaii_xt -ffffffff82caa178 r defaults_saturn_xt -ffffffff82caa1c4 r defaults_bonaire_xt -ffffffff82caa210 r ci_program_jump_on_start.data -ffffffff82cab000 R fiji_smu_funcs -ffffffff82cab0e0 r avfs_graphics_level -ffffffff82cab240 r fiji_power_tune_data_set_array -ffffffff82cab246 r fiji_clock_stretch_amount_conversion -ffffffff82cab260 r fiji_clock_stretcher_ddt_table -ffffffff82cac000 R iceland_smu_funcs -ffffffff82cac0e0 r defaults_icelandxt -ffffffff82cac12c r defaults_icelandpro -ffffffff82cac178 r defaults_iceland -ffffffff82cad000 R polaris10_smu_funcs -ffffffff82cad0e0 r avfs_graphics_level_polaris10 -ffffffff82cad2a0 r avfs_memory_level_polaris10 -ffffffff82cad2c0 r polaris10_power_tune_data_set_array -ffffffff82cad310 r Range_Table -ffffffff82cae000 R smu10_smu_funcs -ffffffff82caf000 r smu7_program_jump_on_start.data -ffffffff82caf010 r pwr_virus_table_pre -ffffffff82caf680 r pwr_virus_table_post -ffffffff82caff80 r pwr_virus_section1 -ffffffff82cb0610 r pwr_virus_section2 -ffffffff82cb0660 r pwr_virus_section3 -ffffffff82cb7ab0 r pwr_virus_section4 -ffffffff82cb7e80 r pwr_virus_section5 -ffffffff82cb8490 r pwr_virus_section6 -ffffffff82cba000 R smu8_smu_funcs -ffffffff82cbb000 R tonga_smu_funcs -ffffffff82cbb0e0 r tonga_power_tune_data_set_array -ffffffff82cbb12c r tonga_clock_stretch_amount_conversion -ffffffff82cbb140 r tonga_clock_stretcher_ddt_table -ffffffff82cbc000 R vega10_smu_funcs -ffffffff82cbd000 R vega12_smu_funcs -ffffffff82cbe000 R vega20_smu_funcs -ffffffff82cbf000 R vegam_smu_funcs -ffffffff82cbf0e0 r vegam_power_tune_data_set_array -ffffffff82cbf130 r Range_Table -ffffffff82cc0000 R smu_ip_funcs -ffffffff82cc00a0 R smu_v11_0_ip_block -ffffffff82cc00b8 R smu_v12_0_ip_block -ffffffff82cc00d0 R smu_v13_0_ip_block -ffffffff82cc00e8 r swsmu_pm_funcs -ffffffff82cc1000 r arcturus_ppt_funcs -ffffffff82cc13d0 r arcturus_table_map -ffffffff82cc1450 r arcturus_pwr_src_map -ffffffff82cc1460 r arcturus_workload_map -ffffffff82cc14a0 r smu11_thermal_policy -ffffffff82cc14f8 r arcturus_i2c_algo -ffffffff82cc1508 r arcturus_i2c_control_quirks -ffffffff82cc1520 r arcturus_throttler_map -ffffffff82cc1540 r arcturus_message_map -ffffffff82cc1f90 r arcturus_clk_map -ffffffff82cc2050 r arcturus_feature_mask_map -ffffffff82cc3000 r cyan_skillfish_ppt_funcs -ffffffff82cc4000 r navi10_ppt_funcs -ffffffff82cc43d0 r smu11_thermal_policy -ffffffff82cc4428 r navi10_i2c_algo -ffffffff82cc4438 r navi10_i2c_control_quirks -ffffffff82cc4450 r navi1x_throttler_map -ffffffff82cc4470 r NoDbiPrbs7 -ffffffff82cc5470 r DbiPrbs7 -ffffffff82cc7000 r sienna_cichlid_ppt_funcs -ffffffff82cc73d0 r smu11_thermal_policy -ffffffff82cc7428 r sienna_cichlid_i2c_algo -ffffffff82cc7438 r sienna_cichlid_i2c_control_quirks -ffffffff82cc7450 r sienna_cichlid_throttler_map -ffffffff82cc8000 r smu_v11_0_irq_funcs -ffffffff82cc8010 r link_width -ffffffff82cc9000 r vangogh_ppt_funcs -ffffffff82cc93d0 r vangogh_throttler_map -ffffffff82cca000 r renoir_ppt_funcs -ffffffff82cca3d0 r renoir_throttler_map -ffffffff82ccb000 r aldebaran_ppt_funcs -ffffffff82ccb3d0 r aldebaran_clk_map -ffffffff82ccb490 r aldebaran_table_map -ffffffff82ccb510 r smu13_thermal_policy -ffffffff82ccb568 r aldebaran_i2c_algo -ffffffff82ccb578 r aldebaran_i2c_control_quirks -ffffffff82ccb590 r aldebaran_throttler_map -ffffffff82ccb5b0 r aldebaran_message_map -ffffffff82ccc000 r aldebaran_feature_mask_map -ffffffff82ccd000 r smu_v13_0_irq_funcs -ffffffff82ccd010 r link_width -ffffffff82cce000 r smu_v13_0_0_ppt_funcs -ffffffff82cce3d0 r smu13_thermal_policy -ffffffff82cce428 r smu_v13_0_0_i2c_algo -ffffffff82cce438 r smu_v13_0_0_i2c_control_quirks -ffffffff82cce450 r smu_v13_0_0_throttler_map -ffffffff82ccf000 r smu_v13_0_4_ppt_funcs -ffffffff82cd0000 r smu_v13_0_5_ppt_funcs -ffffffff82cd1000 r smu_v13_0_7_ppt_funcs -ffffffff82cd13d0 r smu13_thermal_policy -ffffffff82cd1430 r smu_v13_0_7_throttler_map -ffffffff82cd2000 r yellow_carp_ppt_funcs -ffffffff82cd3000 r __smu_message_names -ffffffff82cd4000 R pchb_ca -ffffffff82cd5000 R amas_ca -ffffffff82cd5028 R amas_devices -ffffffff82cd5040 r amas_feature -ffffffff82cd6000 R cardslot_ca -ffffffff82cd7000 R cardbus_ca -ffffffff82cd8000 R com_cardbus_ca -ffffffff82cd9000 R xl_cardbus_ca -ffffffff82cd9030 R xl_cardbus_products -ffffffff82cda000 R dc_cardbus_ca -ffffffff82cda030 R dc_cardbus_devices -ffffffff82cdb000 R fxp_cardbus_ca -ffffffff82cdb028 R fxp_cardbus_devices -ffffffff82cdc000 R rl_cardbus_devices -ffffffff82cdc028 R rl_cardbus_ca -ffffffff82cdd000 R re_cardbus_ca -ffffffff82cdd028 R re_cardbus_devices -ffffffff82cde000 R ath_cardbus_ca -ffffffff82cdf000 R athn_cardbus_ca -ffffffff82cdf030 r athn_cardbus_devices -ffffffff82ce0000 R atw_cardbus_ca -ffffffff82ce0028 R atw_cardbus_devices -ffffffff82ce1000 R rtw_cardbus_ca -ffffffff82ce1028 R rtw_cardbus_devices -ffffffff82ce2000 R ral_cardbus_ca -ffffffff82ce2030 r ral_cardbus_devices -ffffffff82ce3000 R acx_cardbus_ca -ffffffff82ce3028 r acx_cardbus_devices -ffffffff82ce4000 R pgt_cardbus_ca -ffffffff82ce4028 R pgt_cardbus_devices -ffffffff82ce5000 R ehci_cardbus_ca -ffffffff82ce6000 R ohci_cardbus_ca -ffffffff82ce7000 R uhci_cardbus_ca -ffffffff82ce8000 R malo_cardbus_ca -ffffffff82ce8028 r malo_cardbus_devices -ffffffff82ce9000 R bwi_cardbus_ca -ffffffff82ce9030 r bwi_cardbus_devices -ffffffff82cea000 R pcmcia_ca -ffffffff82ceb000 r pcmcia_parse_cis_tuple.init_cfe -ffffffff82cec000 r pcmcia_cis_quirks -ffffffff82ced000 R ep_pcmcia_ca -ffffffff82cee000 R ne_pcmcia_ca -ffffffff82cee030 R ne2000devs -ffffffff82cf0000 R aic_pcmcia_ca -ffffffff82cf1000 R com_pcmcia_ca -ffffffff82cf2000 R wdc_pcmcia_ca -ffffffff82cf3000 R sm_pcmcia_ca -ffffffff82cf4000 R xe_pcmcia_ca -ffffffff82cf5000 R wi_pcmcia_ca -ffffffff82cf5030 r wi_pcmcia_products -ffffffff82cf6000 R malo_pcmcia_ca -ffffffff82cf7000 R an_pcmcia_ca -ffffffff82cf8000 R pcib_ca -ffffffff82cf9000 R amdpcib_ca -ffffffff82cf9028 R amdpcib_devices -ffffffff82cfa000 R tcpcib_ca -ffffffff82cfa028 R tcpcib_devices -ffffffff82cfb000 R aapic_ca -ffffffff82cfc000 R hme_pci_ca -ffffffff82cfc028 r hme_promhdr -ffffffff82cfc02a r hme_promdat -ffffffff82cfd000 R isa_ca -ffffffff82cfe000 R isadma_ca -ffffffff82cff000 R fdc_ca -ffffffff82d00000 R fd_ca -ffffffff82d01000 R com_isa_ca -ffffffff82d02000 R pckbc_isa_ca -ffffffff82d03000 R vga_isa_ca -ffffffff82d04000 R wdc_isa_ca -ffffffff82d05000 R mpu_midi_hw_if -ffffffff82d06000 R mpu_isa_ca -ffffffff82d07000 R pcppi_ca -ffffffff82d08000 R spkr_ca -ffffffff82d08030 r pitchtab -ffffffff82d09000 R lpt_isa_ca -ffffffff82d0a000 R wbsio_ca -ffffffff82d0b000 R schsio_ca -ffffffff82d0c000 R lm_isa_ca -ffffffff82d0c028 R lm_wbsio_ca -ffffffff82d0d000 R it_sensors -ffffffff82d0d110 R it_vrfact -ffffffff82d0d140 R it_fan_regs -ffffffff82d0d160 R it_fan_ext_regs -ffffffff82d0d178 R it_ca -ffffffff82d0e000 R abitkv_sensors -ffffffff82d0e200 R abitaa_sensors -ffffffff82d0e480 R abitav_sensors -ffffffff82d0e700 R abitas_sensors -ffffffff82d0e980 R abitax_sensors -ffffffff82d0ebc0 R abitm4_sensors -ffffffff82d0ee80 R abitan_sensors -ffffffff82d0f120 R abital_sensors -ffffffff82d0f3a0 R abitaw_sensors -ffffffff82d0f700 R abitni_sensors -ffffffff82d0f9a0 R abitat_sensors -ffffffff82d0fcc0 R abitan2_sensors -ffffffff82d0ff60 R abitab_sensors -ffffffff82d10220 R abitan3_sensors -ffffffff82d10500 R abitaw2_sensors -ffffffff82d10860 R abitat2_sensors -ffffffff82d10b60 R abitab2_sensors -ffffffff82d10ea0 R abitin_sensors -ffffffff82d111e0 R uguru_ca -ffffffff82d12000 R aps_ca -ffffffff82d13000 R wsdisplay_emul_ca -ffffffff82d13030 r charClass -ffffffff82d14000 r usl_syncops -ffffffff82d15000 R wsevent_filtops -ffffffff82d16000 R wskbd_ca -ffffffff82d17000 r latin1_to_upper -ffffffff82d18000 R wsmouse_ca -ffffffff82d19000 R cyrillic_to_koi8 -ffffffff82d19060 R unicode_to_latin2 -ffffffff82d190e0 R unicode_to_latin7 -ffffffff82d1a000 R wsemul_vt100_ops -ffffffff82d1b000 r decspcgr2uni -ffffffff82d1b100 r dectech2uni -ffffffff82d1b200 r nrctable -ffffffff82d1c000 r vt100_fkeys -ffffffff82d1c0c0 r vt100_pfkeys -ffffffff82d1c0e0 r vt100_numpad -ffffffff82d1d000 R pckbd_ca -ffffffff82d1d028 R pckbd_accessops -ffffffff82d1d040 R pckbd_consops -ffffffff82d1d060 R pckbd_keymapdata -ffffffff82d1d070 R pckbd_xtbl2 -ffffffff82d1d100 R pckbd_xtbl2_ext -ffffffff82d1e000 r pckbd_keydesc_us -ffffffff82d1e250 r pckbd_keydesc_de -ffffffff82d1e2f0 r pckbd_keydesc_de_nodead -ffffffff82d1e310 r pckbd_keydesc_fr -ffffffff82d1e3d0 r pckbd_keydesc_fr_dvorak_bepo -ffffffff82d1e510 r pckbd_keydesc_dk -ffffffff82d1e5a0 r pckbd_keydesc_dk_nodead -ffffffff82d1e5b0 r pckbd_keydesc_it -ffffffff82d1e640 r pckbd_keydesc_uk -ffffffff82d1e6e0 r pckbd_keydesc_jp -ffffffff82d1e750 r pckbd_keydesc_sv -ffffffff82d1e780 r pckbd_keydesc_sv_nodead -ffffffff82d1e790 r pckbd_keydesc_no -ffffffff82d1e7c0 r pckbd_keydesc_no_nodead -ffffffff82d1e7d0 r pckbd_keydesc_us_declk -ffffffff82d1e860 r pckbd_keydesc_us_dvorak -ffffffff82d1e900 r pckbd_keydesc_us_colemak -ffffffff82d1e948 r pckbd_keydesc_swapctrlcaps -ffffffff82d1e960 r pckbd_keydesc_iopener -ffffffff82d1e9b0 r pckbd_keydesc_es -ffffffff82d1ea50 r pckbd_keydesc_be -ffffffff82d1eb10 r pckbd_keydesc_ru -ffffffff82d1ec80 r pckbd_keydesc_ua -ffffffff82d1ee10 r pckbd_keydesc_sg -ffffffff82d1eec0 r pckbd_keydesc_sg_nodead -ffffffff82d1eee0 r pckbd_keydesc_sf -ffffffff82d1ef00 r pckbd_keydesc_pt -ffffffff82d1ef90 r pckbd_keydesc_lt -ffffffff82d1f070 r pckbd_keydesc_la -ffffffff82d1f100 r pckbd_keydesc_br -ffffffff82d1f180 r pckbd_keydesc_tr -ffffffff82d1f230 r pckbd_keydesc_tr_nodead -ffffffff82d1f250 r pckbd_keydesc_pl -ffffffff82d1f2b0 r pckbd_keydesc_hu -ffffffff82d1f3c0 r pckbd_keydesc_si -ffffffff82d1f4d0 r pckbd_keydesc_cf -ffffffff82d1f5a0 r pckbd_keydesc_cf_nodead -ffffffff82d1f5c0 r pckbd_keydesc_lv -ffffffff82d1f640 r pckbd_keydesc_nl -ffffffff82d1f720 r pckbd_keydesc_nl_nodead -ffffffff82d1f740 r pckbd_keydesc_is -ffffffff82d1f7cc r pckbd_keydesc_is_nodead -ffffffff82d1f7e0 r pckbd_keydesc_ee -ffffffff82d1f890 r pckbd_keydesc_ee_nodead -ffffffff82d1f8b0 R pckbd_keydesctab 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uvideo_hw_if -ffffffff82d37100 R uvideo_devs -ffffffff82d38000 r utvfu_select_norm.pal -ffffffff82d38040 r utvfu_select_norm.ntsc -ffffffff82d38080 r utvfu_setup_capture.setup -ffffffff82d38180 r utvfu_audio_start_chip.setup -ffffffff82d381c8 r utvfu_audio_stop_chip.setup -ffffffff82d381d8 R utvfu_ca -ffffffff82d38200 R utvfu_vid_hw_if -ffffffff82d382d0 R utvfu_au_hw_if -ffffffff82d39000 R udl_ca -ffffffff82d39030 r udl_devs -ffffffff82d390b0 r udl_modes -ffffffff82d3a000 R umidi_hw_if -ffffffff82d3a030 R umidi_ca -ffffffff82d3a060 r umidi_evlen -ffffffff82d3a080 r packet_length -ffffffff82d3b000 r quirk_name -ffffffff82d3c000 R ucom_ca -ffffffff82d3d000 R ugen_ca -ffffffff82d3d028 R ugenread_intr_filtops -ffffffff82d3d058 R ugenread_isoc_filtops -ffffffff82d3e000 R uhidev_ca -ffffffff82d3e030 r uhid_graphire_report_descr -ffffffff82d3e0b0 r uhid_graphire3_4x5_report_descr -ffffffff82d3e160 r uhid_xb360gp_report_descr -ffffffff82d3e210 r uhid_xbonegp_report_descr -ffffffff82d3f000 R uhid_ca -ffffffff82d3f028 R uhidread_filtops -ffffffff82d40000 R fido_ca -ffffffff82d41000 R ujoy_ca -ffffffff82d42000 r ukbd_keydesc_us -ffffffff82d422a0 r ukbd_keydesc_de -ffffffff82d42350 r ukbd_keydesc_de_nodead -ffffffff82d42370 r ukbd_keydesc_fr -ffffffff82d42430 r ukbd_keydesc_fr_apple -ffffffff82d42570 r ukbd_keydesc_fr_dvorak_bepo -ffffffff82d426b0 r ukbd_keydesc_dk -ffffffff82d42750 r ukbd_keydesc_dk_nodead -ffffffff82d42760 r ukbd_keydesc_it -ffffffff82d42800 r ukbd_keydesc_uk -ffffffff82d428b0 r ukbd_keydesc_jp -ffffffff82d42920 r ukbd_keydesc_sv -ffffffff82d42950 r ukbd_keydesc_sv_nodead -ffffffff82d42960 r ukbd_keydesc_no -ffffffff82d42990 r ukbd_keydesc_no_nodead -ffffffff82d429a0 r ukbd_keydesc_us_dvorak -ffffffff82d42a40 r ukbd_keydesc_us_colemak -ffffffff82d42a88 r ukbd_keydesc_swapctrlcaps -ffffffff82d42aa0 r ukbd_keydesc_iopener -ffffffff82d42af0 r ukbd_keydesc_es -ffffffff82d42b90 r ukbd_keydesc_be -ffffffff82d42c50 r ukbd_keydesc_ru -ffffffff82d42dc0 r ukbd_keydesc_ua -ffffffff82d42f60 r ukbd_keydesc_sg -ffffffff82d43020 r ukbd_keydesc_sg_nodead -ffffffff82d43040 r ukbd_keydesc_sf -ffffffff82d43060 r ukbd_keydesc_pt -ffffffff82d430f0 r ukbd_keydesc_pt_apple -ffffffff82d43110 r ukbd_keydesc_lt -ffffffff82d431f0 r ukbd_keydesc_la -ffffffff82d43290 r ukbd_keydesc_br -ffffffff82d43320 r ukbd_keydesc_tr -ffffffff82d433e0 r ukbd_keydesc_tr_nodead -ffffffff82d43400 r ukbd_keydesc_pl -ffffffff82d43460 r ukbd_keydesc_hu -ffffffff82d43570 r ukbd_keydesc_si -ffffffff82d43690 r ukbd_keydesc_cf -ffffffff82d43770 r ukbd_keydesc_cf_nodead -ffffffff82d43790 r ukbd_keydesc_lv -ffffffff82d43810 r ukbd_keydesc_nl -ffffffff82d438f0 r ukbd_keydesc_nl_nodead -ffffffff82d43910 r ukbd_keydesc_is -ffffffff82d439a4 r ukbd_keydesc_is_nodead -ffffffff82d439b0 r ukbd_keydesc_ee -ffffffff82d43a60 r ukbd_keydesc_ee_nodead -ffffffff82d43a80 R ukbd_keydesctab -ffffffff82d44000 R ukbd_countrylayout -ffffffff82d44090 R ukbd_consops -ffffffff82d440b0 R ukbd_accessops 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-ffffffff82d52000 R uoakrh_devs -ffffffff82d52008 R uoakrh_ca -ffffffff82d52030 R uoakrh_methods -ffffffff82d53000 R uoaklux_devs -ffffffff82d53008 R uoaklux_ca -ffffffff82d53030 R uoaklux_methods -ffffffff82d54000 R uoakv_devs -ffffffff82d54008 R uoakv_ca -ffffffff82d54030 R uoakv_methods -ffffffff82d55000 R uonerng_ca -ffffffff82d56000 R urng_ca -ffffffff82d56030 r urng_devs -ffffffff82d57000 R udcf_ca -ffffffff82d57028 r udcf_devs -ffffffff82d58000 R umbg_ca -ffffffff82d59000 R uvisor_methods -ffffffff82d59040 R uvisor_ca -ffffffff82d59070 r uvisor_devs -ffffffff82d5a000 R udsbr_hw_if -ffffffff82d5a028 R udsbr_ca -ffffffff82d5b000 R utwitch_devs -ffffffff82d5b008 R utwitch_ca -ffffffff82d5c000 R aue_devs -ffffffff82d5c1b0 R aue_ca -ffffffff82d5d000 R axe_devs -ffffffff82d5d0d0 R axe_ca -ffffffff82d5e000 R axen_devs -ffffffff82d5e020 R axen_ca -ffffffff82d5f000 R smsc_ca -ffffffff82d5f030 r smsc_devs -ffffffff82d60000 R cue_ca -ffffffff82d61000 R kue_devs -ffffffff82d61088 R kue_ca -ffffffff82d62000 R cdce_devs -ffffffff82d620a0 R cdce_ca -ffffffff82d63000 R urndis_ca -ffffffff82d63030 R urndis_class -ffffffff82d64000 R mos_devs -ffffffff82d64018 R mos_ca -ffffffff82d65000 R mue_devs -ffffffff82d65020 R mue_ca -ffffffff82d66000 R udav_ca -ffffffff82d66030 r udav_devs -ffffffff82d67000 R upl_ca -ffffffff82d68000 R ugl_ca -ffffffff82d69000 R url_ca -ffffffff82d69030 r url_devs -ffffffff82d6a000 R ure_devs -ffffffff82d6a0e8 R ure_ca -ffffffff82d6b000 R uaq_devs -ffffffff82d6b018 R uaq_ca -ffffffff82d6c000 R umodem_methods -ffffffff82d6c040 R umodem_ca -ffffffff82d6d000 R uftdi_methods -ffffffff82d6d040 R uftdi_ca -ffffffff82d6d070 r uftdi_devs -ffffffff82d6e000 R uplcom_methods -ffffffff82d6e040 R uplcom_ca -ffffffff82d6e070 r uplcom_devs -ffffffff82d6f000 R umct_methods -ffffffff82d6f040 R umct_ca -ffffffff82d6f070 r umct_devs -ffffffff82d70000 R uvscom_methods -ffffffff82d70040 R uvscom_ca -ffffffff82d70070 r uvscom_devs -ffffffff82d71000 R ubsa_methods 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uchcom_methods -ffffffff82d7c040 R uchcom_ca -ffffffff82d7c068 r uchcom_devs -ffffffff82d7c080 r dividers -ffffffff82d7d000 R uticom_methods -ffffffff82d7d040 R uticom_ca -ffffffff82d7d070 r uticom_devs -ffffffff82d7e000 R wi_usb_devs -ffffffff82d7e0f0 R wi_usb_ca -ffffffff82d7f000 R atu_ca -ffffffff82d80000 R ural_ca -ffffffff82d80030 r ural_devs -ffffffff82d800a0 r ural_rf2522_r2 -ffffffff82d800e0 r ural_rf2524_r2 -ffffffff82d80120 r ural_rf2525_hi_r2 -ffffffff82d80160 r ural_rf2525_r2 -ffffffff82d801a0 r ural_rf2525e_r2 -ffffffff82d801e0 r ural_rf2526_hi_r2 -ffffffff82d80220 r ural_rf2526_r2 -ffffffff82d80260 r ural_def_bbp -ffffffff82d802a0 r ural_def_mac -ffffffff82d81000 R rum_ca -ffffffff82d81030 r rum_devs -ffffffff82d81110 r rum_rf5225 -ffffffff82d81460 r rum_rf5226 -ffffffff82d817b0 r rum_def_bbp -ffffffff82d817f0 r rum_def_mac -ffffffff82d82000 R run_ca -ffffffff82d82030 r run_devs -ffffffff82d82430 r rt2860_rf2850 -ffffffff82d82860 r rt2860_rates -ffffffff82d82920 r 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pf_tags -ffffffff83101010 D pf_qids -ffffffff83101020 D pf_lock -ffffffff83101030 D pf_state_lock -ffffffff83101040 D pfioctl_rw -ffffffff83101050 d pf_open_trans.ticket -ffffffff83102000 D pfi_update -ffffffff83103000 D pflog_cloner -ffffffff83104000 D pfsync_cloner -ffffffff83105000 D pflow_cloner -ffffffff83106000 d hotplug_mtx -ffffffff83107000 D pppoe_cloner -ffffffff83107030 D pppoediscinq -ffffffff83107060 D pppoeinq -ffffffff83108000 D dt_lock -ffffffff83109000 D dt_prov_profile -ffffffff83109030 D dt_prov_interval -ffffffff8310a000 D dtps_nsysent -ffffffff8310a008 D dt_prov_syscall -ffffffff8310b000 D dt_prov_static -ffffffff8310b030 D dt_static_sched_dequeue -ffffffff8310b0a0 D dt_static_sched_enqueue -ffffffff8310b110 D dt_static_sched_fork -ffffffff8310b180 D dt_static_sched_off__cpu -ffffffff8310b1f0 D dt_static_sched_on__cpu -ffffffff8310b260 D dt_static_sched_remain__cpu -ffffffff8310b2d0 D dt_static_sched_sleep -ffffffff8310b340 D dt_static_sched_steal -ffffffff8310b3b0 D dt_static_sched_unsleep -ffffffff8310b420 D dt_static_sched_wakeup -ffffffff8310b490 D dt_static_raw_syscalls_sys_enter -ffffffff8310b500 D dt_static_raw_syscalls_sys_exit -ffffffff8310b570 D dt_static_uvm_fault -ffffffff8310b5e0 D dt_static_uvm_map_insert -ffffffff8310b650 D dt_static_uvm_map_remove -ffffffff8310b6c0 D dt_static_uvm_malloc -ffffffff8310b730 D dt_static_uvm_free -ffffffff8310b7a0 D dt_static_uvm_pool_get -ffffffff8310b810 D dt_static_uvm_pool_put -ffffffff8310b880 D dt_static_vfs_bufcache_rel -ffffffff8310b8f0 D dt_static_vfs_bufcache_take -ffffffff8310b960 D dt_static_vfs_cleaner -ffffffff8310b9d0 D dt_static_vmm_guest_enter -ffffffff8310ba40 D dt_static_vmm_guest_exit -ffffffff8310bab0 D dt_static_vmm_inout -ffffffff8310bb20 D dt_static_smr_call -ffffffff8310bb90 D dt_static_smr_called -ffffffff8310bc00 D dt_static_smr_barrier_enter -ffffffff8310bc70 D dt_static_smr_barrier_exit -ffffffff8310bce0 D dt_static_smr_wakeup -ffffffff8310bd50 D dt_static_smr_thread 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-ffffffff83124000 D kthread_q -ffffffff83125000 D nkmempages -ffffffff83125008 D malloc_mtx -ffffffff83125020 D memname -ffffffff831254b0 D sysctl_kmemlock -ffffffff831254c0 D malloc_errintvl -ffffffff83126000 D maxdmap -ffffffff83126008 D maxsmap -ffffffff83126010 D rlimit_lock -ffffffff83127000 D sched_cost_load -ffffffff83127004 D sched_cost_priority -ffffffff83127008 D sched_cost_runnable -ffffffff8312700c D sched_cost_resident -ffffffff83128000 D intrmap_lock -ffffffff83129000 D nosuidcoredump -ffffffff83129008 D sigio_lock -ffffffff8312a000 D smr_lock -ffffffff8312a010 D smr_logintvl -ffffffff8312b000 D startuphook_list -ffffffff8312c000 D sysctl_lock -ffffffff8312c010 D sysctl_disklock -ffffffff8312c020 d openbsd -ffffffff8312c024 d arg_max -ffffffff8312c028 d posix_version -ffffffff8312c02c d ngroups_max -ffffffff8312c030 d int_one -ffffffff8312c034 d maxpartitions -ffffffff8312c038 d raw_part -ffffffff8312c03c D allowpowerdown -ffffffff8312c040 D hw_power -ffffffff8312c044 d byte_order -ffffffff8312c048 d page_size -ffffffff8312d000 d thrsleep_queue -ffffffff8312d010 d thrsleep_lock -ffffffff8312e000 D tc_lock -ffffffff8312e010 D windup_mtx -ffffffff8312e020 d dummy_timecounter -ffffffff8312e070 D timecounter -ffffffff8312e078 D time_second -ffffffff8312e080 d timehands -ffffffff8312e088 d th0 -ffffffff8312e120 d th1 -ffffffff8312f000 D itimer_mtx -ffffffff8312f010 D ratecheck_mtx -ffffffff8312f020 D ppsratecheck_mtx -ffffffff8312f030 D resettodr_to -ffffffff8312f078 D resettodr_task -ffffffff83130000 D timeout_mutex -ffffffff83131000 D wdog_auto -ffffffff83132000 D taskq_sys -ffffffff83132050 D taskq_sys_mp -ffffffff83133000 d update_loadavg.to -ffffffff83133048 D ccpu -ffffffff83133050 d schedcpu.to -ffffffff83133098 D perflevel -ffffffff8313309c D perfpolicy -ffffffff831330a0 D setperf_to -ffffffff83134000 D autoconf_attdet_mtx -ffffffff83134010 D msgs -ffffffff83135000 d evcount_list -ffffffff83135010 d evcount_percpu_init_list -ffffffff83136000 D syslogf_rwlock -ffffffff83136010 D log_mtx -ffffffff83136020 D logstash_in -ffffffff83136028 D logstash_out -ffffffff83136030 D logstash_rwlock -ffffffff83137000 D pool_head -ffffffff83137010 D pool_lock -ffffffff83137020 D pool_debug -ffffffff83137028 D pool_allocator_single -ffffffff83137040 D pool_allocator_multi -ffffffff83137058 D pool_allocator_multi_ni -ffffffff83137070 D pool_gc_tick -ffffffff831370b8 D pool_gc_task -ffffffff83138000 D kprintf_mutex -ffffffff83138010 D db_panic -ffffffff83138014 D splassert_ctl -ffffffff83138018 D v_putc -ffffffff83138020 D printf_flags -ffffffff83139000 D userconf_base -ffffffff83139004 D userconf_maxdev -ffffffff83139008 D userconf_totdev -ffffffff8313900c D userconf_maxlocnames -ffffffff83139010 D userconf_cnt -ffffffff83139014 D userconf_lines -ffffffff83139018 D userconf_histsz -ffffffff83139020 D userconf_cmds -ffffffff8313a000 D ftlock -ffffffff8313b000 d ppollcollect.poll_errintvl -ffffffff8313c000 D ttydefchars -ffffffff8313c014 D ttclos -ffffffff8313c01b D ttopen -ffffffff8313c022 D ttybg -ffffffff8313c028 D ttyin -ffffffff8313c02e D ttyout -ffffffff8313c038 D ttylist_lock -ffffffff8313d000 D linesw -ffffffff8313d280 D nlinesw -ffffffff8313e000 D pt_softc_lock -ffffffff8313f000 d mbstat_boot_boot_cpumem -ffffffff8313f080 D mbstat -ffffffff8313f090 D mclsizes -ffffffff8313f0b0 D m_extref_mtx -ffffffff8313f0c0 D m_pool_allocator -ffffffff83140000 D somaxconn -ffffffff83140004 D sominconn -ffffffff83140008 D sosplice_lock -ffffffff83141000 D sb_max -ffffffff83142000 D unp_df_lock -ffffffff83142010 D unp_gc_lock -ffffffff83142020 D unp_rights_mtx -ffffffff83142030 D unp_ino_mtx -ffffffff83142040 D unp_gc_task -ffffffff83142070 D unpst_sendspace -ffffffff83142074 D unpst_recvspace -ffffffff83142078 D unpsq_sendspace -ffffffff8314207c D unpsq_recvspace -ffffffff83142080 D unpdg_sendspace -ffffffff83142084 D unpdg_recvspace -ffffffff83143000 D doingcache -ffffffff83144000 D maxvfsconf -ffffffff83144010 d vfsconflist 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ether_ipmulticast_min -ffffffff8314f00c D ether_ipmulticast_max -ffffffff8314f012 D ether_ip6multicast_min -ffffffff8314f018 D ether_ip6multicast_max -ffffffff83150000 D etherip_cloner -ffffffff83150030 D etherip_list -ffffffff83151000 D loop_cloner -ffffffff83152000 D ifmedia_mtx -ffffffff83153000 D ppp_compressors -ffffffff83153020 D ppp_cloner -ffffffff83154000 D ppp_pkt_init -ffffffff83155000 D ppp_bsd_compress -ffffffff83156000 D ppp_deflate -ffffffff83156070 D ppp_deflate_draft -ffffffff83157000 D tun_cloner -ffffffff83157030 D tap_cloner -ffffffff83158000 D bridgeintrq -ffffffff83158038 D bridge_cloner -ffffffff83159000 d veb_cloner -ffffffff83159030 d vport_cloner -ffffffff8315a000 D vlan_tagh_lk -ffffffff8315a010 D vlan_cloner -ffffffff8315a040 D svlan_cloner -ffffffff8315b000 D pipex_list_mtx -ffffffff8315b010 D pipex_prune -ffffffff8315b018 D pipexoutq -ffffffff8315b050 d SHAPad2 -ffffffff8315c000 D rtmap_gc -ffffffff8315c018 D rt_rc -ffffffff8315d000 D rt_labels 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tcp_syn_cache_limit -ffffffff83174018 D tcp_syn_bucket_limit -ffffffff8317401c D tcp_syn_use_limit -ffffffff83174020 D syn_cache_mtx -ffffffff83175000 D tcp_outflags -ffffffff83176000 D tcp_timer_mtx -ffffffff83176010 D tcp_mssdflt -ffffffff83176014 D tcp_rttdflt -ffffffff83176018 D tcp_do_rfc1323 -ffffffff8317601c D tcp_do_sack -ffffffff83176020 D tcp_do_rfc3390 -ffffffff83176024 D tcp_do_tso -ffffffff83176028 D tcp_reass_limit -ffffffff8317602c D tcp_sackhole_limit -ffffffff83177000 D tcp_backoff -ffffffff83177034 D tcp_totbackoff -ffffffff83178000 D tcp_sendspace -ffffffff83178004 D tcp_recvspace -ffffffff83178008 D tcp_autorcvbuf_inc -ffffffff83179000 D udpcksum -ffffffff83179004 D udp_sendspace -ffffffff83179008 D udp_recvspace -ffffffff8317a000 D ipsec_flows_mtx -ffffffff8317a010 D ipsec_ids_idle -ffffffff8317a014 D ipsec_ids_next_flow -ffffffff8317a018 D ipsec_policy_head -ffffffff8317a028 D ipsp_ids_gc_timeout -ffffffff8317a070 D tdb_sadb_mtx -ffffffff8317a080 d tdb_hashmask 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nfsv3err_fsstat -ffffffff83189372 d nfsv3err_fsinfo -ffffffff8318937c d nfsv3err_pathconf -ffffffff83189386 d nfsv3err_commit -ffffffff8318a000 D nfsrv3_procs -ffffffff8318a0b8 D nfs_niothreads -ffffffff8318b000 D fragtbl -ffffffff8318c000 D ffs_vtbl -ffffffff8318d000 D softdep_typenames -ffffffff8318d070 D tickdelay -ffffffff8318e000 D dirchk -ffffffff8318f000 D desireddquot -ffffffff83190000 D amap_list_lock -ffffffff83191000 d uao_list_lock -ffffffff83192000 d uvmexp_countersboot_boot_cpumem -ffffffff831920c0 D uvmexp_counters -ffffffff831920c8 D vm_min_kernel_address -ffffffff83193000 D no_constraint -ffffffff83194000 d uvm_kmapent_warn_rate -ffffffff83195000 D maxslp -ffffffff83196000 D uvmpagerops -ffffffff83197000 D uvm_swap_data_lock -ffffffff83197010 D swap_syscall_lock -ffffffff83197020 D oommtx -ffffffff83198000 D uvm_doswapencrypt -ffffffff83199000 D gif_list -ffffffff83199010 D gif_cloner -ffffffff8319a000 d sec_cloner -ffffffff8319a030 d sec_tdb_gc_mtx -ffffffff8319a040 d sec_tdb_gc_task -ffffffff8319b000 D divert6_sendspace -ffffffff8319b004 D divert6_recvspace -ffffffff8319b008 D divb6hashsize -ffffffff8319c000 d in6_get_hw_ifid.allone -ffffffff8319d000 D ip6_sendredirects -ffffffff8319d004 D ip6_defhlim -ffffffff8319d008 D ip6_defmcasthlim -ffffffff8319d00c D ip6_maxfragpackets -ffffffff8319d010 D ip6_maxfrags -ffffffff8319d014 D ip6_log_interval -ffffffff8319d018 D ip6_hdrnestlimit -ffffffff8319d01c D ip6_dad_count -ffffffff8319d020 D ip6_auto_flowlabel -ffffffff8319d024 D ip6_use_deprecated -ffffffff8319d028 D ip6_neighborgcthresh -ffffffff8319d02c D ip6_maxdynroutes -ffffffff8319d030 D rip6_sendspace -ffffffff8319d038 D rip6_recvspace -ffffffff8319d040 D icmp6_redirtimeout -ffffffff8319d044 D icmp6errppslim -ffffffff8319d048 D ip6_mtudisc_timeout -ffffffff8319e000 D frag6_mutex -ffffffff8319f000 d icmp6_mtudisc_hiwat -ffffffff8319f004 d icmp6_mtudisc_lowat -ffffffff831a0000 d randomtab_20 -ffffffff831a1000 D ip6intrq -ffffffff831a1038 d ip6send_task -ffffffff831a2000 D nd6_timer_next -ffffffff831a2008 D nd6_expire_next -ffffffff831a2010 D nd6_delay -ffffffff831a2014 D nd6_umaxtries -ffffffff831a2018 D nd6_mmaxtries -ffffffff831a201c D nd6_gctimer -ffffffff831a2020 D nd6_maxndopt -ffffffff831a2028 D nd6_mtx -ffffffff831a2038 D nd6_list -ffffffff831a3000 d dadq -ffffffff831a4000 D pfkeyv2_mtx -ffffffff831a4010 d pfkeyv2_seq -ffffffff831a5000 D sadb_exts_allowed_in -ffffffff831a5090 D sadb_exts_required_in -ffffffff831a6000 D cold -ffffffff831a7000 D bdevsw -ffffffff831a7460 D nblkdev -ffffffff831a7470 D cdevsw -ffffffff831a9400 D nchrdev -ffffffff831a9404 D mem_no -ffffffff831a9408 D swapdev -ffffffff831a9410 D constab -ffffffff831aa000 D machine -ffffffff831aa008 D cpu_idle_cycle_fcn -ffffffff831aa010 D lid_action -ffffffff831aa014 D pwr_action -ffffffff831aa018 D isa_constraint -ffffffff831aa028 D dma_constraint -ffffffff831aa040 D uvm_md_constraints -ffffffff831aa058 D delay_func -ffffffff831aa060 D initclock_func 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DIDTConfig_Polaris11_Kicker +ffffffff82c914a0 r DIDTConfig_Polaris11 +ffffffff82c91d40 r DIDTConfig_Polaris12 +ffffffff82c925e0 r GCCACConfig_VegaM +ffffffff82c92790 r DIDTConfig_VegaM +ffffffff82c94000 r smu8_hwmgr_funcs +ffffffff82c942f0 r SMU7ThermalPolicy +ffffffff82c95000 r smu9_irq_funcs +ffffffff82c96000 r gpio_tbl_iceland +ffffffff82c96060 r gpio_tbl +ffffffff82c96150 r enable_fb_req_rej_tbl +ffffffff82c961a0 r use_bclk_tbl +ffffffff82c96370 r turn_off_plls_tbl +ffffffff82c96610 r enter_baco_tbl +ffffffff82c96730 r exit_baco_tbl_iceland +ffffffff82c96870 r clean_baco_tbl_iceland +ffffffff82c96890 r exit_baco_tbl +ffffffff82c969b0 r clean_baco_tbl +ffffffff82c97000 r pre_baco_tbl +ffffffff82c97090 r enter_baco_tbl +ffffffff82c972b0 r exit_baco_tbl +ffffffff82c97520 r clean_baco_tbl +ffffffff82c98000 r vega10_hwmgr_funcs +ffffffff82c982f0 r channel_number +ffffffff82c98320 r SMU7ThermalWithDelayPolicy +ffffffff82c99000 r SEDiDtStallCtrlConfig_vega10 +ffffffff82c99110 r SEDiDtStallPatternConfig_vega10 +ffffffff82c992e0 r SEDiDtWeightConfig_Vega10 +ffffffff82c993b0 r SEDiDtCtrl1Config_Vega10 +ffffffff82c99440 r SEDiDtCtrl2Config_Vega10 +ffffffff82c99510 r SEDiDtCtrl3Config_vega10 +ffffffff82c99820 r SEDiDtTuningCtrlConfig_Vega10 +ffffffff82c998b0 r SELCacConfig_Vega10 +ffffffff82c99a40 r SEDiDtCtrl0Config_Vega10 +ffffffff82c99d10 r AvfsPSMInitConfig_vega10 +ffffffff82c99d90 r SEEDCStallPatternConfig_Vega10 +ffffffff82c99ea0 r SEEDCStallDelayConfig_Vega10 +ffffffff82c99f80 r SEEDCCtrlConfig_Vega10 +ffffffff82c9a040 r PSMSEEDCStallPatternConfig_Vega10 +ffffffff82c9a0c0 r PSMSEEDCStallDelayConfig_Vega10 +ffffffff82c9a1d0 r PSMSEEDCCtrlResetConfig_Vega10 +ffffffff82c9a290 r PSMSEEDCCtrlConfig_Vega10 +ffffffff82c9a350 r SEEDCForceStallPatternConfig_Vega10 +ffffffff82c9a3e0 r SEEDCCtrlForceStallConfig_Vega10 +ffffffff82c9b000 R vega10_pptable_funcs +ffffffff82c9c000 r pre_baco_tbl +ffffffff82c9c090 r enter_baco_tbl +ffffffff82c9c2b0 r exit_baco_tbl +ffffffff82c9c520 r clean_baco_tbl +ffffffff82c9d000 r vega12_hwmgr_funcs +ffffffff82c9d2f0 r SMU7ThermalWithDelayPolicy +ffffffff82c9d340 r link_width +ffffffff82c9e000 R vega12_pptable_funcs +ffffffff82c9f000 r clean_baco_tbl +ffffffff82ca0000 r vega20_hwmgr_funcs +ffffffff82ca02f0 r SMU7ThermalWithDelayPolicy +ffffffff82ca0340 r link_width +ffffffff82ca1000 R vega20_pptable_funcs +ffffffff82ca2000 R ci_smu_funcs +ffffffff82ca20e0 r defaults_hawaii_pro +ffffffff82ca212c r defaults_hawaii_xt +ffffffff82ca2178 r defaults_saturn_xt +ffffffff82ca21c4 r defaults_bonaire_xt +ffffffff82ca2210 r ci_program_jump_on_start.data +ffffffff82ca3000 R fiji_smu_funcs +ffffffff82ca30e0 r avfs_graphics_level +ffffffff82ca3240 r fiji_power_tune_data_set_array +ffffffff82ca3246 r fiji_clock_stretch_amount_conversion +ffffffff82ca3260 r fiji_clock_stretcher_ddt_table +ffffffff82ca4000 R iceland_smu_funcs +ffffffff82ca40e0 r defaults_icelandxt +ffffffff82ca412c r defaults_icelandpro +ffffffff82ca4178 r defaults_iceland +ffffffff82ca5000 R polaris10_smu_funcs +ffffffff82ca50e0 r avfs_graphics_level_polaris10 +ffffffff82ca52a0 r avfs_memory_level_polaris10 +ffffffff82ca52c0 r polaris10_power_tune_data_set_array +ffffffff82ca5310 r Range_Table +ffffffff82ca6000 R smu10_smu_funcs +ffffffff82ca7000 r smu7_program_jump_on_start.data +ffffffff82ca7010 r pwr_virus_table_pre +ffffffff82ca7680 r pwr_virus_table_post +ffffffff82ca7f80 r pwr_virus_section1 +ffffffff82ca8610 r pwr_virus_section2 +ffffffff82ca8660 r pwr_virus_section3 +ffffffff82cafab0 r pwr_virus_section4 +ffffffff82cafe80 r pwr_virus_section5 +ffffffff82cb0490 r pwr_virus_section6 +ffffffff82cb2000 R smu8_smu_funcs +ffffffff82cb3000 R tonga_smu_funcs +ffffffff82cb30e0 r tonga_power_tune_data_set_array +ffffffff82cb312c r tonga_clock_stretch_amount_conversion +ffffffff82cb3140 r tonga_clock_stretcher_ddt_table +ffffffff82cb4000 R vega10_smu_funcs +ffffffff82cb5000 R vega12_smu_funcs +ffffffff82cb6000 R vega20_smu_funcs +ffffffff82cb7000 R vegam_smu_funcs +ffffffff82cb70e0 r vegam_power_tune_data_set_array +ffffffff82cb7130 r Range_Table +ffffffff82cb8000 R smu_ip_funcs +ffffffff82cb80a0 R smu_v11_0_ip_block +ffffffff82cb80b8 R smu_v12_0_ip_block +ffffffff82cb80d0 R smu_v13_0_ip_block +ffffffff82cb80e8 r swsmu_pm_funcs +ffffffff82cb9000 r arcturus_ppt_funcs +ffffffff82cb93d0 r arcturus_table_map +ffffffff82cb9450 r arcturus_pwr_src_map +ffffffff82cb9460 r arcturus_workload_map +ffffffff82cb94a0 r smu11_thermal_policy +ffffffff82cb94f8 r arcturus_i2c_algo +ffffffff82cb9508 r arcturus_i2c_control_quirks +ffffffff82cb9520 r arcturus_throttler_map +ffffffff82cb9540 r arcturus_message_map +ffffffff82cb9f90 r arcturus_clk_map +ffffffff82cba050 r arcturus_feature_mask_map +ffffffff82cbb000 r cyan_skillfish_ppt_funcs +ffffffff82cbc000 r navi10_ppt_funcs +ffffffff82cbc3d0 r smu11_thermal_policy +ffffffff82cbc428 r navi10_i2c_algo +ffffffff82cbc438 r navi10_i2c_control_quirks +ffffffff82cbc450 r navi1x_throttler_map +ffffffff82cbc470 r NoDbiPrbs7 +ffffffff82cbd470 r DbiPrbs7 +ffffffff82cbf000 r sienna_cichlid_ppt_funcs +ffffffff82cbf3d0 r smu11_thermal_policy +ffffffff82cbf428 r sienna_cichlid_i2c_algo +ffffffff82cbf438 r sienna_cichlid_i2c_control_quirks +ffffffff82cbf450 r sienna_cichlid_throttler_map +ffffffff82cc0000 r smu_v11_0_irq_funcs +ffffffff82cc0010 r link_width +ffffffff82cc1000 r vangogh_ppt_funcs +ffffffff82cc13d0 r vangogh_throttler_map +ffffffff82cc2000 r renoir_ppt_funcs +ffffffff82cc23d0 r renoir_throttler_map +ffffffff82cc3000 r aldebaran_ppt_funcs +ffffffff82cc33d0 r aldebaran_clk_map +ffffffff82cc3490 r aldebaran_table_map +ffffffff82cc3510 r smu13_thermal_policy +ffffffff82cc3568 r aldebaran_i2c_algo +ffffffff82cc3578 r aldebaran_i2c_control_quirks +ffffffff82cc3590 r aldebaran_throttler_map +ffffffff82cc35b0 r aldebaran_message_map +ffffffff82cc4000 r aldebaran_feature_mask_map +ffffffff82cc5000 r smu_v13_0_irq_funcs +ffffffff82cc5010 r link_width +ffffffff82cc6000 r smu_v13_0_0_ppt_funcs +ffffffff82cc63d0 r smu13_thermal_policy +ffffffff82cc6428 r smu_v13_0_0_i2c_algo +ffffffff82cc6438 r smu_v13_0_0_i2c_control_quirks +ffffffff82cc6450 r smu_v13_0_0_throttler_map +ffffffff82cc7000 r smu_v13_0_4_ppt_funcs +ffffffff82cc8000 r smu_v13_0_5_ppt_funcs +ffffffff82cc9000 r smu_v13_0_7_ppt_funcs +ffffffff82cc93d0 r smu13_thermal_policy +ffffffff82cc9430 r smu_v13_0_7_throttler_map +ffffffff82cca000 r yellow_carp_ppt_funcs +ffffffff82ccb000 r __smu_message_names +ffffffff82ccc000 R pchb_ca +ffffffff82ccd000 R amas_ca +ffffffff82ccd028 R amas_devices +ffffffff82ccd040 r amas_feature +ffffffff82cce000 R cardslot_ca +ffffffff82ccf000 R cardbus_ca +ffffffff82cd0000 R com_cardbus_ca +ffffffff82cd1000 R xl_cardbus_ca +ffffffff82cd1030 R xl_cardbus_products +ffffffff82cd2000 R dc_cardbus_ca +ffffffff82cd2030 R dc_cardbus_devices +ffffffff82cd3000 R fxp_cardbus_ca +ffffffff82cd3028 R fxp_cardbus_devices +ffffffff82cd4000 R rl_cardbus_devices +ffffffff82cd4028 R rl_cardbus_ca +ffffffff82cd5000 R re_cardbus_ca +ffffffff82cd5028 R re_cardbus_devices +ffffffff82cd6000 R ath_cardbus_ca +ffffffff82cd7000 R athn_cardbus_ca +ffffffff82cd7030 r athn_cardbus_devices +ffffffff82cd8000 R atw_cardbus_ca +ffffffff82cd8028 R atw_cardbus_devices +ffffffff82cd9000 R rtw_cardbus_ca +ffffffff82cd9028 R rtw_cardbus_devices +ffffffff82cda000 R ral_cardbus_ca +ffffffff82cda030 r ral_cardbus_devices +ffffffff82cdb000 R acx_cardbus_ca +ffffffff82cdb028 r acx_cardbus_devices +ffffffff82cdc000 R pgt_cardbus_ca +ffffffff82cdc028 R pgt_cardbus_devices +ffffffff82cdd000 R ehci_cardbus_ca +ffffffff82cde000 R ohci_cardbus_ca +ffffffff82cdf000 R uhci_cardbus_ca +ffffffff82ce0000 R malo_cardbus_ca +ffffffff82ce0028 r malo_cardbus_devices +ffffffff82ce1000 R bwi_cardbus_ca +ffffffff82ce1030 r bwi_cardbus_devices +ffffffff82ce2000 R pcmcia_ca +ffffffff82ce3000 r pcmcia_parse_cis_tuple.init_cfe +ffffffff82ce4000 r pcmcia_cis_quirks +ffffffff82ce5000 R ep_pcmcia_ca +ffffffff82ce6000 R ne_pcmcia_ca +ffffffff82ce6030 R ne2000devs +ffffffff82ce8000 R aic_pcmcia_ca +ffffffff82ce9000 R com_pcmcia_ca +ffffffff82cea000 R wdc_pcmcia_ca +ffffffff82ceb000 R sm_pcmcia_ca +ffffffff82cec000 R xe_pcmcia_ca +ffffffff82ced000 R wi_pcmcia_ca +ffffffff82ced030 r wi_pcmcia_products +ffffffff82cee000 R malo_pcmcia_ca +ffffffff82cef000 R an_pcmcia_ca +ffffffff82cf0000 R pcib_ca +ffffffff82cf1000 R amdpcib_ca +ffffffff82cf1028 R amdpcib_devices +ffffffff82cf2000 R tcpcib_ca +ffffffff82cf2028 R tcpcib_devices +ffffffff82cf3000 R aapic_ca +ffffffff82cf4000 R hme_pci_ca +ffffffff82cf4028 r hme_promhdr +ffffffff82cf402a r hme_promdat +ffffffff82cf5000 R isa_ca +ffffffff82cf6000 R isadma_ca +ffffffff82cf7000 R fdc_ca +ffffffff82cf8000 R fd_ca +ffffffff82cf9000 R com_isa_ca +ffffffff82cfa000 R pckbc_isa_ca +ffffffff82cfb000 R vga_isa_ca +ffffffff82cfc000 R wdc_isa_ca +ffffffff82cfd000 R mpu_midi_hw_if +ffffffff82cfe000 R mpu_isa_ca +ffffffff82cff000 R pcppi_ca +ffffffff82d00000 R spkr_ca +ffffffff82d00030 r pitchtab +ffffffff82d01000 R lpt_isa_ca +ffffffff82d02000 R wbsio_ca +ffffffff82d03000 R schsio_ca +ffffffff82d04000 R lm_isa_ca +ffffffff82d04028 R lm_wbsio_ca +ffffffff82d05000 R it_sensors +ffffffff82d05110 R it_vrfact +ffffffff82d05140 R it_fan_regs +ffffffff82d05160 R it_fan_ext_regs +ffffffff82d05178 R it_ca +ffffffff82d06000 R abitkv_sensors +ffffffff82d06200 R abitaa_sensors +ffffffff82d06480 R abitav_sensors +ffffffff82d06700 R abitas_sensors +ffffffff82d06980 R abitax_sensors +ffffffff82d06bc0 R abitm4_sensors +ffffffff82d06e80 R abitan_sensors +ffffffff82d07120 R abital_sensors +ffffffff82d073a0 R abitaw_sensors +ffffffff82d07700 R abitni_sensors +ffffffff82d079a0 R abitat_sensors +ffffffff82d07cc0 R abitan2_sensors +ffffffff82d07f60 R abitab_sensors +ffffffff82d08220 R abitan3_sensors +ffffffff82d08500 R abitaw2_sensors +ffffffff82d08860 R abitat2_sensors +ffffffff82d08b60 R abitab2_sensors +ffffffff82d08ea0 R abitin_sensors +ffffffff82d091e0 R uguru_ca +ffffffff82d0a000 R aps_ca +ffffffff82d0b000 R wsdisplay_emul_ca +ffffffff82d0b030 r charClass +ffffffff82d0c000 r usl_syncops +ffffffff82d0d000 R wsevent_filtops +ffffffff82d0e000 R wskbd_ca +ffffffff82d0f000 r latin1_to_upper +ffffffff82d10000 R wsmouse_ca +ffffffff82d11000 R cyrillic_to_koi8 +ffffffff82d11060 R unicode_to_latin2 +ffffffff82d110e0 R unicode_to_latin7 +ffffffff82d12000 R wsemul_vt100_ops +ffffffff82d13000 r decspcgr2uni +ffffffff82d13100 r dectech2uni +ffffffff82d13200 r nrctable +ffffffff82d14000 r vt100_fkeys +ffffffff82d140c0 r vt100_pfkeys +ffffffff82d140e0 r vt100_numpad +ffffffff82d15000 R pckbd_ca +ffffffff82d15028 R pckbd_accessops +ffffffff82d15040 R pckbd_consops +ffffffff82d15060 R pckbd_keymapdata +ffffffff82d15070 R pckbd_xtbl2 +ffffffff82d15100 R pckbd_xtbl2_ext +ffffffff82d16000 r pckbd_keydesc_us +ffffffff82d16250 r pckbd_keydesc_de +ffffffff82d162f0 r pckbd_keydesc_de_nodead +ffffffff82d16310 r pckbd_keydesc_fr +ffffffff82d163d0 r pckbd_keydesc_fr_dvorak_bepo +ffffffff82d16510 r pckbd_keydesc_dk +ffffffff82d165a0 r pckbd_keydesc_dk_nodead +ffffffff82d165b0 r pckbd_keydesc_it +ffffffff82d16640 r pckbd_keydesc_uk +ffffffff82d166e0 r pckbd_keydesc_jp +ffffffff82d16750 r pckbd_keydesc_sv +ffffffff82d16780 r pckbd_keydesc_sv_nodead +ffffffff82d16790 r pckbd_keydesc_no +ffffffff82d167c0 r pckbd_keydesc_no_nodead +ffffffff82d167d0 r pckbd_keydesc_us_declk +ffffffff82d16860 r pckbd_keydesc_us_dvorak +ffffffff82d16900 r pckbd_keydesc_us_colemak +ffffffff82d16948 r pckbd_keydesc_swapctrlcaps +ffffffff82d16960 r pckbd_keydesc_iopener +ffffffff82d169b0 r pckbd_keydesc_es +ffffffff82d16a50 r pckbd_keydesc_be +ffffffff82d16b10 r pckbd_keydesc_ru +ffffffff82d16c80 r pckbd_keydesc_ua +ffffffff82d16e10 r pckbd_keydesc_sg +ffffffff82d16ec0 r pckbd_keydesc_sg_nodead +ffffffff82d16ee0 r pckbd_keydesc_sf +ffffffff82d16f00 r pckbd_keydesc_pt +ffffffff82d16f90 r pckbd_keydesc_lt +ffffffff82d17070 r pckbd_keydesc_la +ffffffff82d17100 r pckbd_keydesc_br +ffffffff82d17180 r pckbd_keydesc_tr +ffffffff82d17230 r pckbd_keydesc_tr_nodead +ffffffff82d17250 r pckbd_keydesc_pl +ffffffff82d172b0 r pckbd_keydesc_hu +ffffffff82d173c0 r pckbd_keydesc_si +ffffffff82d174d0 r pckbd_keydesc_cf +ffffffff82d175a0 r pckbd_keydesc_cf_nodead +ffffffff82d175c0 r pckbd_keydesc_lv +ffffffff82d17640 r pckbd_keydesc_nl +ffffffff82d17720 r pckbd_keydesc_nl_nodead +ffffffff82d17740 r pckbd_keydesc_is +ffffffff82d177cc r pckbd_keydesc_is_nodead +ffffffff82d177e0 r pckbd_keydesc_ee +ffffffff82d17890 r pckbd_keydesc_ee_nodead +ffffffff82d178b0 R pckbd_keydesctab +ffffffff82d18000 R pms_ca +ffffffff82d18028 R pms_accessops +ffffffff82d18040 R pms_sec_accessops +ffffffff82d18060 R pms_protocols +ffffffff82d181e0 r alps_models +ffffffff82d19000 R skgpio_led_offset +ffffffff82d19008 R skgpio_ca +ffffffff82d1a000 R hidkbd_trtab +ffffffff82d1a100 r apple_fn_trans +ffffffff82d1a120 r apple_tb_trans +ffffffff82d1a140 r apple_mba_trans +ffffffff82d1b000 r hidcc_attach_wskbd.accessops +ffffffff82d1b020 r hidcc_keysyms +ffffffff82d1c000 R usb_ca +ffffffff82d1d000 R usb_known_products +ffffffff82d28f90 R usb_known_vendors +ffffffff82d2b7b0 R usbd_error_strs +ffffffff82d2c000 R usb_quirks +ffffffff82d2c390 R usb_dev_quirks +ffffffff82d2c398 R usbd_no_quirk +ffffffff82d2d000 R uhub_ca +ffffffff82d2d028 R uhub_uhub_ca +ffffffff82d2e000 R uaudio_ca +ffffffff82d2e028 R uaudio_hw_if +ffffffff82d2e0e0 R uaudio_rates +ffffffff82d2e120 r uaudio_clkname.names +ffffffff82d2e140 r uaudio_feature_addent.features +ffffffff82d2f000 R uvideo_ca +ffffffff82d2f028 R uvideo_hw_if +ffffffff82d2f100 R uvideo_devs +ffffffff82d30000 r utvfu_select_norm.pal +ffffffff82d30040 r utvfu_select_norm.ntsc +ffffffff82d30080 r utvfu_setup_capture.setup +ffffffff82d30180 r utvfu_audio_start_chip.setup +ffffffff82d301c8 r utvfu_audio_stop_chip.setup +ffffffff82d301d8 R utvfu_ca +ffffffff82d30200 R utvfu_vid_hw_if +ffffffff82d302d0 R utvfu_au_hw_if +ffffffff82d31000 R udl_ca +ffffffff82d31030 r udl_devs +ffffffff82d310b0 r udl_modes +ffffffff82d32000 R umidi_hw_if +ffffffff82d32030 R umidi_ca +ffffffff82d32060 r umidi_evlen +ffffffff82d32080 r packet_length +ffffffff82d33000 r quirk_name +ffffffff82d34000 R ucom_ca +ffffffff82d35000 R ugen_ca +ffffffff82d35028 R ugenread_intr_filtops +ffffffff82d35058 R ugenread_isoc_filtops +ffffffff82d36000 R uhidev_ca +ffffffff82d36030 r uhid_graphire_report_descr +ffffffff82d360b0 r uhid_graphire3_4x5_report_descr +ffffffff82d36160 r uhid_xb360gp_report_descr +ffffffff82d36210 r uhid_xbonegp_report_descr +ffffffff82d37000 R uhid_ca +ffffffff82d37028 R uhidread_filtops +ffffffff82d38000 R fido_ca +ffffffff82d39000 R ujoy_ca +ffffffff82d3a000 r ukbd_keydesc_us +ffffffff82d3a2a0 r ukbd_keydesc_de +ffffffff82d3a350 r ukbd_keydesc_de_nodead +ffffffff82d3a370 r ukbd_keydesc_fr +ffffffff82d3a430 r ukbd_keydesc_fr_apple +ffffffff82d3a570 r ukbd_keydesc_fr_dvorak_bepo +ffffffff82d3a6b0 r ukbd_keydesc_dk +ffffffff82d3a750 r ukbd_keydesc_dk_nodead +ffffffff82d3a760 r ukbd_keydesc_it +ffffffff82d3a800 r ukbd_keydesc_uk +ffffffff82d3a8b0 r ukbd_keydesc_jp +ffffffff82d3a920 r ukbd_keydesc_sv +ffffffff82d3a950 r ukbd_keydesc_sv_nodead +ffffffff82d3a960 r ukbd_keydesc_no +ffffffff82d3a990 r ukbd_keydesc_no_nodead +ffffffff82d3a9a0 r ukbd_keydesc_us_dvorak +ffffffff82d3aa40 r ukbd_keydesc_us_colemak +ffffffff82d3aa88 r ukbd_keydesc_swapctrlcaps +ffffffff82d3aaa0 r ukbd_keydesc_iopener +ffffffff82d3aaf0 r ukbd_keydesc_es +ffffffff82d3ab90 r ukbd_keydesc_be +ffffffff82d3ac50 r ukbd_keydesc_ru +ffffffff82d3adc0 r ukbd_keydesc_ua +ffffffff82d3af60 r ukbd_keydesc_sg +ffffffff82d3b020 r ukbd_keydesc_sg_nodead +ffffffff82d3b040 r ukbd_keydesc_sf +ffffffff82d3b060 r ukbd_keydesc_pt +ffffffff82d3b0f0 r ukbd_keydesc_pt_apple +ffffffff82d3b110 r ukbd_keydesc_lt +ffffffff82d3b1f0 r ukbd_keydesc_la +ffffffff82d3b290 r ukbd_keydesc_br +ffffffff82d3b320 r ukbd_keydesc_tr +ffffffff82d3b3e0 r ukbd_keydesc_tr_nodead +ffffffff82d3b400 r ukbd_keydesc_pl +ffffffff82d3b460 r ukbd_keydesc_hu +ffffffff82d3b570 r ukbd_keydesc_si +ffffffff82d3b690 r ukbd_keydesc_cf +ffffffff82d3b770 r ukbd_keydesc_cf_nodead +ffffffff82d3b790 r ukbd_keydesc_lv +ffffffff82d3b810 r ukbd_keydesc_nl +ffffffff82d3b8f0 r ukbd_keydesc_nl_nodead +ffffffff82d3b910 r ukbd_keydesc_is +ffffffff82d3b9a4 r ukbd_keydesc_is_nodead +ffffffff82d3b9b0 r ukbd_keydesc_ee +ffffffff82d3ba60 r ukbd_keydesc_ee_nodead +ffffffff82d3ba80 R ukbd_keydesctab +ffffffff82d3c000 R ukbd_countrylayout +ffffffff82d3c090 R ukbd_consops +ffffffff82d3c0b0 R ukbd_accessops +ffffffff82d3c0c8 R ukbd_ca +ffffffff82d3c0f0 R ukbd_never_console +ffffffff82d3d000 R ums_accessops +ffffffff82d3d018 R ums_ca +ffffffff82d3e000 R umt_accessops +ffffffff82d3e018 R umt_ca +ffffffff82d3f000 R uts_devs +ffffffff82d3f010 R uts_accessops +ffffffff82d3f028 R uts_ca +ffffffff82d40000 R ubcmtp_accessops +ffffffff82d40018 R ubcmtp_ca +ffffffff82d40040 r ubcmtp_devices +ffffffff82d41000 R ucycom_methods +ffffffff82d41040 R ucycom_devs +ffffffff82d41050 R ucycom_ca +ffffffff82d42000 R uslhcom_methods +ffffffff82d42040 R uslhcom_ca +ffffffff82d42068 r uslhcom_devs +ffffffff82d43000 R ulpt_ca +ffffffff82d44000 R umass_ca +ffffffff82d44028 R umass_bbb_methods +ffffffff82d44040 R umass_cbi_methods +ffffffff82d45000 R umass_quirks +ffffffff82d46000 R umass_scsi_switch +ffffffff82d47000 R uthum_devs +ffffffff82d47008 R uthum_ca +ffffffff82d47030 r uthum_sensor_type_s +ffffffff82d48000 R ugold_devs +ffffffff82d48018 R ugold_ca +ffffffff82d49000 R utrh_devs +ffffffff82d49008 R utrh_ca +ffffffff82d4a000 R uoakrh_devs +ffffffff82d4a008 R uoakrh_ca +ffffffff82d4a030 R uoakrh_methods +ffffffff82d4b000 R uoaklux_devs +ffffffff82d4b008 R uoaklux_ca +ffffffff82d4b030 R uoaklux_methods +ffffffff82d4c000 R uoakv_devs +ffffffff82d4c008 R uoakv_ca +ffffffff82d4c030 R uoakv_methods +ffffffff82d4d000 R uonerng_ca +ffffffff82d4e000 R urng_ca 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urtw_8225_txpwr_cck +ffffffff82d80170 r urtw_8225_tx_gain_cck_ofdm +ffffffff82d80176 r urtw_8225_txpwr_ofdm +ffffffff82d80180 r urtw_8225_rf_part1 +ffffffff82d80200 r urtw_8225_rxgain +ffffffff82d802c0 r urtw_8225_agc +ffffffff82d80340 r urtw_8225_rf_part2 +ffffffff82d80470 r urtw_8225_rf_part3 +ffffffff82d80550 r urtw_8225_channel +ffffffff82d8058c r urtw_8225_threshold +ffffffff82d805a0 r urtw_8225v2_gain_bg +ffffffff82d805c0 r urtw_8225v2_tx_gain_cck_ofdm +ffffffff82d805f0 r urtw_8225v2_rf_part1 +ffffffff82d80670 r urtw_8225v2_rxgain +ffffffff82d80730 r urtw_8225v2_rf_part2 +ffffffff82d80870 r urtw_8225v2_rf_part3 +ffffffff82d80970 r urtw_8187b_regtbl +ffffffff82d80a90 r urtw_8225v2_b_rf +ffffffff82d80b20 r urtw_8225v2_agc +ffffffff82d80ba0 r urtw_8225v2_ofdm +ffffffff82d81000 R urtwn_ca +ffffffff82d81030 r urtwn_devs +ffffffff82d81340 r rtl8188eu_mac +ffffffff82d814b0 r rtl8188ftv_mac +ffffffff82d81650 r rtl8192eu_mac +ffffffff82d817f0 r rtl8192cu_mac +ffffffff82d81948 r rtl8188eu_bb_prog +ffffffff82d81970 r rtl8188ftv_bb_prog +ffffffff82d81998 r rtl8192eu_bb_prog +ffffffff82d819c0 r rtl8188ce_bb_prog +ffffffff82d819e8 r rtl8188ru_bb_prog +ffffffff82d81a10 r rtl8188cu_bb_prog +ffffffff82d81a38 r rtl8192ce_bb_prog +ffffffff82d81a60 r rtl8192cu_bb_prog +ffffffff82d81a90 r rtl8188eu_bb_regs +ffffffff82d81c10 r rtl8188eu_bb_vals +ffffffff82d81f10 r rtl8188eu_agc_vals +ffffffff82d82110 r rtl8188ftv_bb_regs +ffffffff82d822b0 r rtl8188ftv_bb_vals +ffffffff82d825f0 r rtl8188ftv_agc_vals +ffffffff82d826f0 r rtl8192e_bb_regs +ffffffff82d82890 r rtl8192e_bb_vals +ffffffff82d82bd0 r rtl8192eu_agc_vals +ffffffff82d82dd0 r rtl8192ce_bb_regs +ffffffff82d82f50 r rtl8188ce_bb_vals +ffffffff82d83240 r rtl8188ce_agc_vals +ffffffff82d834c0 r rtl8188ru_bb_regs +ffffffff82d83640 r rtl8188ru_bb_vals +ffffffff82d83940 r rtl8188ru_agc_vals +ffffffff82d83bc0 r rtl8188cu_bb_vals +ffffffff82d83eb0 r rtl8192ce_bb_vals +ffffffff82d841a0 r rtl8192ce_agc_vals +ffffffff82d84420 r rtl8192cu_bb_vals +ffffffff82d85000 R rsu_ca +ffffffff82d85030 r rsu_devs +ffffffff82d850c8 r rsu_devs_noht +ffffffff82d850d0 r rsu_qid2idx_4ep +ffffffff82d850da r rsu_qid2idx_6ep +ffffffff82d850e4 r rsu_qid2idx_11ep +ffffffff82d850ee r r92s_epaddr +ffffffff82d86000 R otus_ca +ffffffff82d86030 r otus_devs +ffffffff82d86090 r ar_chans +ffffffff82d860c0 r otus_rates +ffffffff82d860e0 r ar5416_phy_regs +ffffffff82d86380 r ar5416_phy_vals_2ghz_20mhz +ffffffff82d868b0 r ar5416_phy_vals_5ghz_20mhz +ffffffff82d86de0 r ar5416_banks_vals_5ghz +ffffffff82d86ef0 r ar5416_banks_vals_2ghz +ffffffff82d87000 r ar5416_banks_regs +ffffffff82d88000 R umb_regstates +ffffffff82d88080 R umb_dataclasses +ffffffff82d88190 R umb_simstate +ffffffff82d88210 R umb_messages +ffffffff82d882b0 R umb_status +ffffffff82d88570 R umb_cids +ffffffff82d886e0 R umb_pktstate +ffffffff82d88740 R umb_actstate +ffffffff82d887a0 R umb_error +ffffffff82d88830 R umb_pintype +ffffffff82d88960 R umb_istate +ffffffff82d889f0 R umb_ca +ffffffff82d88a20 R umb_quirks +ffffffff82d89000 R uath_ca +ffffffff82d89030 r uath_devs +ffffffff82d8a000 R athn_usb_ca +ffffffff82d8a030 r athn_usb_devs +ffffffff82d8b000 R uow_ca +ffffffff82d8b028 r uow_devs +ffffffff82d8c000 R uberry_devices +ffffffff82d8c008 R uberry_ca +ffffffff82d8d000 R upd_ca +ffffffff82d8e000 R uwacom_devs +ffffffff82d8e010 R uwacom_ca +ffffffff82d8e038 R uwacom_accessops +ffffffff82d8f000 R bwfm_usb_ca +ffffffff82d8f030 r bwfm_usbdevs +ffffffff82d90000 R umstc_ca +ffffffff82d90028 r umstc_devs +ffffffff82d91000 R uhidpp_ca +ffffffff82d91028 r uhidpp_devs +ffffffff82d92000 R ucc_ca +ffffffff82d93000 R iic_ca +ffffffff82d94000 r probes +ffffffff82d95000 R lmtemp_ca +ffffffff82d96000 R lmn_ca +ffffffff82d97000 R lmenv_ca +ffffffff82d98000 R maxtmp_ca +ffffffff82d99000 R adc_ca +ffffffff82d9a000 R admtemp_ca +ffffffff82d9b000 R admlc_ca +ffffffff82d9c000 R admtm_ca +ffffffff82d9d000 R admtmp_ca +ffffffff82d9e000 R admtt_ca +ffffffff82d9f000 R maxds_ca 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acpibat_ca +ffffffff82db9000 R acpibtn_ca +ffffffff82dba000 R acpicmos_ca +ffffffff82dbb000 R acpicpu_ca +ffffffff82dbc000 R acpihpet_ca +ffffffff82dbd000 R acpiec_ca +ffffffff82dbe000 R acpitz_ca +ffffffff82dbf000 R acpimadt_ca +ffffffff82dc0000 R acpimcfg_ca +ffffffff82dc1000 R acpiprt_ca +ffffffff82dc2000 R acpidmar_ca +ffffffff82dc3000 R acpidock_ca +ffffffff82dc4000 R abl_ca +ffffffff82dc5000 R asmc_ca +ffffffff82dc5030 r asmc_prods +ffffffff82dc66c0 r asmc_temp_desc +ffffffff82dc6c60 r asmc_fan_loc +ffffffff82dc6cf0 r asmc_light_desc +ffffffff82dc7000 R acpiasus_ca +ffffffff82dc8000 R acpithinkpad_ca +ffffffff82dc9000 R acpitoshiba_ca +ffffffff82dca000 R acpisony_ca +ffffffff82dcb000 R acpivideo_ca +ffffffff82dcc000 R acpivout_ca +ffffffff82dcd000 R acpipwrres_ca +ffffffff82dce000 R aibs_ca +ffffffff82dcf000 R aplgpio_ca +ffffffff82dd0000 R bytgpio_ca +ffffffff82dd0030 R byt_score_pins +ffffffff82dd01d0 R byt_ncore_pins +ffffffff82dd0240 R byt_sus_pins +ffffffff82dd1000 R chvgpio_ca +ffffffff82dd1030 R chv_southwest_pins +ffffffff82dd1050 R chv_north_pins +ffffffff82dd1068 R chv_east_pins +ffffffff82dd1080 R chv_southeast_pins +ffffffff82dd2000 R glkgpio_ca +ffffffff82dd3000 R pchgpio_ca +ffffffff82dd3030 R spt_lp_groups +ffffffff82dd3068 R spt_lp_device +ffffffff82dd3080 R spt_h_groups +ffffffff82dd30c8 R spt_h_device +ffffffff82dd30e0 R cnl_h_groups +ffffffff82dd3138 R cnl_h_device +ffffffff82dd3150 R cnl_lp_groups +ffffffff82dd3190 R cnl_lp_device +ffffffff82dd31b0 R tgl_lp_groups +ffffffff82dd3208 R tgl_lp_device +ffffffff82dd3220 R tgl_h_groups +ffffffff82dd3288 R tgl_h_device +ffffffff82dd32a0 R adl_s_groups +ffffffff82dd3308 R adl_s_device +ffffffff82dd3320 R adl_n_groups +ffffffff82dd3378 R adl_n_device +ffffffff82dd4000 R tipmic_ca +ffffffff82dd5000 R ccpmic_ca +ffffffff82dd6000 R com_acpi_ca +ffffffff82dd7000 R sdhc_acpi_ca +ffffffff82dd8000 R dwiic_acpi_ca +ffffffff82dd9000 R acpicbkbd_ca +ffffffff82dda000 R acpials_ca +ffffffff82ddb000 R tpm_devs +ffffffff82ddb148 R tpm_ca +ffffffff82ddc000 R acpihve_ca +ffffffff82ddd000 R acpisbs_battery_checks +ffffffff82ddd420 R acpisbs_ca +ffffffff82dde000 R acpisurface_ca +ffffffff82ddf000 R ipmi_acpi_ca +ffffffff82de0000 R amdgpio_ca +ffffffff82de1000 R acpihid_ca +ffffffff82de1030 r acpihid_dsm_funcs +ffffffff82de2000 R iosf_acpi_ca +ffffffff82de3000 R acpi_ca +ffffffff82de4000 ? acpi_real_mode_resume +ffffffff82de42fb R acpi_resume_end +ffffffff82de42fb R acpi_tramp_data_start +ffffffff82de44a8 R acpi_tramp_data_end +ffffffff82de5000 R acpiread_filtops +ffffffff82de6000 R acpipci_ca +ffffffff82de7000 R efi_ca +ffffffff82de8000 R vmm_ca +ffffffff82de9000 R vmm_kp_contig +ffffffff82de9030 R vmm_vmx_sreg_vmcs_fields +ffffffff82dea000 R sdmmc_ca +ffffffff82deb000 R switch_group0_functions +ffffffff82deb050 R sdmmc_mmc_timings +ffffffff82dec000 R sdmmc_switch +ffffffff82ded000 R bwfm_sdio_ca +ffffffff82dee000 R onewire_ca +ffffffff82def000 r crc8_table +ffffffff82def100 r crc16_table_high +ffffffff82def200 r crc16_table_low +ffffffff82df0000 R owid_ca +ffffffff82df0028 r owid_fams +ffffffff82df1000 R owsbm_ca +ffffffff82df1028 r owsbm_fams +ffffffff82df2000 R owtemp_ca +ffffffff82df2028 r owtemp_fams +ffffffff82df3000 R owctr_ca +ffffffff82df3028 r owctr_fams +ffffffff82df4000 R textraloc +ffffffff82df5000 R ostype +ffffffff82df5008 R osrelease +ffffffff82df5010 R osversion +ffffffff82df5040 R sccs +ffffffff82df50b0 R version +ffffffff82df6000 A __nofault_start +ffffffff82df6018 A __nofault_end +ffffffff82df7000 R codepatch_begin +ffffffff82dff000 R codepatch_end +ffffffff82dff000 c XUsyscall_meltdown +ffffffff82dff3fa c doreti_iret_meltdown +ffffffff82e00000 c Xalltraps +ffffffff82e01000 A __retguard_start +ffffffff82e01000 r __retguard_366 +ffffffff82e01008 r __retguard_1072 +ffffffff82e01010 r __retguard_1444 +ffffffff82e01018 r __retguard_3384 +ffffffff82e01020 r __retguard_297 +ffffffff82e02000 r __retguard_2535 +ffffffff82e02008 r __retguard_2486 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sili_cd +ffffffff830c6000 D esp_cd +ffffffff830c6020 D ncr53c9x_variant_names +ffffffff830c7000 D E_abs_script_sched_slot0_Used +ffffffff830c70a0 D E_abs_targ0_Used +ffffffff830c70dc D E_abs_msgin_Used +ffffffff830c70e8 D E_abs_lunsw_return_Used +ffffffff830c70f0 D E_abs_tag0_Used +ffffffff830c7130 D E_ldsa_abs_reselected_Used +ffffffff830c7134 D E_ldsa_abs_reselect_Used +ffffffff830c7138 D E_ldsa_abs_selected_Used +ffffffff830c713c D E_ldsa_abs_data_Used +ffffffff830c7140 D E_ldsa_abs_slot_Used +ffffffff830c7148 D siop_cd +ffffffff830c8000 D ep_isa_media +ffffffff830c8060 D ep_cd +ffffffff830c9000 D wi_cd +ffffffff830c9020 D wi_func_io +ffffffff830ca000 D an_cd +ffffffff830cb000 D xl_cd +ffffffff830cc000 D fxp_int_delay +ffffffff830cc004 D fxp_bundle_max +ffffffff830cc008 D fxp_min_size_mask +ffffffff830cc010 D fxp_cd +ffffffff830cc030 d tx_threshold +ffffffff830cc040 d fxp_cb_config_template +ffffffff830cd000 D rl_cd +ffffffff830ce000 D re_cd +ffffffff830cf000 D dc_cd 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atw_bbp_io_disable_delay +ffffffff830de008 D atw_writewep_delay +ffffffff830de00c D atw_beacon_len_adjust +ffffffff830de010 D atw_dwelltime +ffffffff830de018 D atw_cd +ffffffff830df000 D rtw_dwelltime +ffffffff830df004 D rtw_macbangbits_timeout +ffffffff830df008 D rtw_cd +ffffffff830e0000 D ral_cd +ffffffff830e1000 D rt3090_freqs +ffffffff830e2000 D acx_beacon_intvl +ffffffff830e2008 D acx_cd +ffffffff830e3000 D pgt_cd +ffffffff830e4000 D sf_cd +ffffffff830e5000 D malo_cd +ffffffff830e6000 D bwi_cd +ffffffff830e6020 D bwi_constraint +ffffffff830e6030 D bwi_pa_mode +ffffffff830e7000 D iosf_cd +ffffffff830e7020 d iosf_lock +ffffffff830e7030 d iosf_mbi_mtx +ffffffff830e8000 D uhci_cd +ffffffff830e9000 D ohci_cd +ffffffff830ea000 D ehci_cd +ffffffff830eb000 D xhci_cd +ffffffff830ec000 D ccp_cd +ffffffff830ed000 D sdhc_functions +ffffffff830ed068 D sdhc_cd +ffffffff830ee000 D rtsx_functions +ffffffff830ee068 D rtsx_cd +ffffffff830ef000 D radio_cd +ffffffff830f0000 D kcs_if +ffffffff830f0040 D smic_if +ffffffff830f0080 D bt_if +ffffffff830f00c0 D ipmi_cd +ffffffff830f00e0 D maxsdrlen +ffffffff830f1000 D vscsi_cd +ffffffff830f2000 D mpath_cd +ffffffff830f3000 D softraid_cd +ffffffff830f3020 D smd +ffffffff830f4000 D spdmem_cd +ffffffff830f5000 D dwiic_cd +ffffffff830f6000 D dwqe_cd +ffffffff830f7000 D kstat_lock +ffffffff830f7010 D kstat_next_id +ffffffff830f7018 D kstat_default_lock +ffffffff830f8000 D pf_hdr_limit +ffffffff830f8010 D pf_pool_limits +ffffffff830f8080 D pf_state_list +ffffffff830f80b0 D pf_purge_states_task +ffffffff830f80e0 D pf_purge_states_to +ffffffff830f8128 D pf_purge_states_collect +ffffffff830f8130 D pf_purge_to +ffffffff830f8178 D pf_purge_task +ffffffff830f9000 D pf_tags +ffffffff830f9010 D pf_qids +ffffffff830f9020 D pf_lock +ffffffff830f9030 D pf_state_lock +ffffffff830f9040 D pfioctl_rw +ffffffff830f9050 d pf_open_trans.ticket +ffffffff830fa000 D pfi_update +ffffffff830fb000 D pflog_cloner +ffffffff830fc000 D pfsync_cloner +ffffffff830fd000 D pflow_cloner +ffffffff830fe000 d hotplug_mtx +ffffffff830ff000 D pppoe_cloner +ffffffff830ff030 D pppoediscinq +ffffffff830ff060 D pppoeinq +ffffffff83100000 D dt_lock +ffffffff83101000 D dt_prov_profile +ffffffff83101030 D dt_prov_interval +ffffffff83102000 D dtps_nsysent +ffffffff83102008 D dt_prov_syscall +ffffffff83103000 D dt_prov_static +ffffffff83103030 D dt_static_sched_dequeue +ffffffff831030a0 D dt_static_sched_enqueue +ffffffff83103110 D dt_static_sched_fork +ffffffff83103180 D dt_static_sched_off__cpu +ffffffff831031f0 D dt_static_sched_on__cpu +ffffffff83103260 D dt_static_sched_remain__cpu +ffffffff831032d0 D dt_static_sched_sleep +ffffffff83103340 D dt_static_sched_steal +ffffffff831033b0 D dt_static_sched_unsleep +ffffffff83103420 D dt_static_sched_wakeup +ffffffff83103490 D dt_static_raw_syscalls_sys_enter +ffffffff83103500 D dt_static_raw_syscalls_sys_exit +ffffffff83103570 D dt_static_uvm_fault +ffffffff831035e0 D dt_static_uvm_map_insert +ffffffff83103650 D dt_static_uvm_map_remove +ffffffff831036c0 D dt_static_uvm_malloc +ffffffff83103730 D dt_static_uvm_free +ffffffff831037a0 D dt_static_uvm_pool_get +ffffffff83103810 D dt_static_uvm_pool_put +ffffffff83103880 D dt_static_vfs_bufcache_rel +ffffffff831038f0 D dt_static_vfs_bufcache_take +ffffffff83103960 D dt_static_vfs_cleaner +ffffffff831039d0 D dt_static_vmm_guest_enter +ffffffff83103a40 D dt_static_vmm_guest_exit +ffffffff83103ab0 D dt_static_vmm_inout +ffffffff83103b20 D dt_static_smr_call +ffffffff83103b90 D dt_static_smr_called +ffffffff83103c00 D dt_static_smr_barrier_enter +ffffffff83103c70 D dt_static_smr_barrier_exit +ffffffff83103ce0 D dt_static_smr_wakeup +ffffffff83103d50 D dt_static_smr_thread +ffffffff83103dc0 D dt_static_refcnt_none +ffffffff83103e30 D dt_static_refcnt_ethmulti +ffffffff83103ea0 D dt_static_refcnt_ifaddr +ffffffff83103f10 D dt_static_refcnt_ifmaddr +ffffffff83103f80 D dt_static_refcnt_inpcb +ffffffff83103ff0 D dt_static_refcnt_rtentry +ffffffff83104060 D dt_static_refcnt_syncache +ffffffff831040d0 D dt_static_refcnt_tdb +ffffffff83105000 D db_next_free_breakpoint +ffffffff83105008 D db_breakpoints_inserted +ffffffff83106000 D db_ed_style +ffffffff83107000 D db_examine_format +ffffffff83107078 D db_print_format +ffffffff83108000 D db_history_size +ffffffff83108008 D db_history_curr +ffffffff83108010 D db_history_last +ffffffff83109000 D db_tab_stop_width +ffffffff83109004 D db_max_line +ffffffff83109008 D db_max_width +ffffffff8310900c D db_radix +ffffffff8310a000 D db_lastsym +ffffffff8310a008 D db_maxoff +ffffffff8310b000 D db_vars +ffffffff8310b090 D db_evars +ffffffff8310c000 D db_watchpoints_inserted +ffffffff8310c008 D db_next_free_watchpoint +ffffffff8310d000 D db_log +ffffffff8310e000 D audio_cd +ffffffff8310e020 D audio_lock +ffffffff8310f000 D midi_cd +ffffffff83110000 D rnd_cold +ffffffff83110004 D rnd_slowextract +ffffffff83110008 D rnd_timeout +ffffffff83110050 D rndlock +ffffffff83110060 D rndreinit_timeout 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pool_allocator_single +ffffffff8312f040 D pool_allocator_multi +ffffffff8312f058 D pool_allocator_multi_ni +ffffffff8312f070 D pool_gc_tick +ffffffff8312f0b8 D pool_gc_task +ffffffff83130000 D kprintf_mutex +ffffffff83130010 D db_panic +ffffffff83130014 D splassert_ctl +ffffffff83130018 D v_putc +ffffffff83130020 D printf_flags +ffffffff83131000 D userconf_base +ffffffff83131004 D userconf_maxdev +ffffffff83131008 D userconf_totdev +ffffffff8313100c D userconf_maxlocnames +ffffffff83131010 D userconf_cnt +ffffffff83131014 D userconf_lines +ffffffff83131018 D userconf_histsz +ffffffff83131020 D userconf_cmds +ffffffff83132000 D ftlock +ffffffff83133000 d ppollcollect.poll_errintvl +ffffffff83134000 D ttydefchars +ffffffff83134014 D ttclos +ffffffff8313401b D ttopen +ffffffff83134022 D ttybg +ffffffff83134028 D ttyin +ffffffff8313402e D ttyout +ffffffff83134038 D ttylist_lock +ffffffff83135000 D linesw +ffffffff83135280 D nlinesw +ffffffff83136000 D pt_softc_lock +ffffffff83137000 d mbstat_boot_boot_cpumem +ffffffff83137080 D mbstat +ffffffff83137090 D mclsizes +ffffffff831370b0 D m_extref_mtx +ffffffff831370c0 D m_pool_allocator +ffffffff83138000 D somaxconn +ffffffff83138004 D sominconn +ffffffff83138008 D sosplice_lock +ffffffff83139000 D sb_max +ffffffff8313a000 D unp_df_lock +ffffffff8313a010 D unp_gc_lock +ffffffff8313a020 D unp_rights_mtx +ffffffff8313a030 D unp_ino_mtx +ffffffff8313a040 D unp_gc_task +ffffffff8313a070 D unpst_sendspace +ffffffff8313a074 D unpst_recvspace +ffffffff8313a078 D unpsq_sendspace +ffffffff8313a07c D unpsq_recvspace +ffffffff8313a080 D unpdg_sendspace +ffffffff8313a084 D unpdg_recvspace +ffffffff8313b000 D doingcache +ffffffff8313c000 D maxvfsconf +ffffffff8313c010 d vfsconflist +ffffffff8313d000 D lockf_lock +ffffffff8313d010 D maxlocksperuid +ffffffff8313e000 D iftovt_tab +ffffffff8313e040 D vttoif_tab +ffffffff8313e064 D suid_clear +ffffffff8313e068 D vnode_mtx +ffffffff8313e078 D vfs_stall_lock +ffffffff8313e090 D vtypes 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+ffffffff83158000 D trunk_cloner +ffffffff83159000 d aggr_cloner +ffffffff8315a000 d tpmr_cloner +ffffffff8315b000 D mpe_cloner +ffffffff8315c000 D mpw_cloner +ffffffff8315d000 D mpip_cloner +ffffffff8315e000 d bpe_cloner +ffffffff8315e030 d bpe_lock +ffffffff8315f000 D vether_cloner +ffffffff83160000 D pair_cloner +ffffffff83161000 d vxlan_cloner +ffffffff83161030 d vxlan_lock +ffffffff83161040 d vxlan_teps +ffffffff83162000 D underload_interval +ffffffff83162010 D wg_cloner +ffffffff83163000 d stoeplitz_keyseed +ffffffff83164000 D ieee80211_cache_size +ffffffff83165000 D arpt_prune +ffffffff83165004 D arpt_keep +ffffffff83165008 D arpt_down +ffffffff83165010 D arpinq +ffffffff83165048 D arp_mtx +ffffffff83165058 D arp_maxtries +ffffffff83166000 D ipport_firstauto +ffffffff83166004 D ipport_lastauto +ffffffff83166008 D ipport_hifirstauto +ffffffff8316600c D ipport_hilastauto +ffffffff83167000 D divert_sendspace +ffffffff83167004 D divert_recvspace +ffffffff83167008 D divbhashsize +ffffffff83168000 D icmptstamprepl +ffffffff83168004 D icmperrppslim +ffffffff83168008 D icmp_redirtimeout +ffffffff83169000 D ipsendredirects +ffffffff83169004 D ip_defttl +ffffffff83169008 D ip_mtudisc +ffffffff8316900c D ip_mtudisc_timeout +ffffffff83169010 D ipq_mutex +ffffffff83169020 D ip_maxqueue +ffffffff83169028 D ipintrq +ffffffff83169060 d ipsend_task +ffffffff83169090 d ipsendraw_task +ffffffff8316a000 D ip_mrtproto +ffffffff8316a004 d sin +ffffffff8316b000 D rip_sendspace +ffffffff8316b008 D rip_recvspace +ffffffff8316c000 D tcprexmtthresh +ffffffff8316c004 D tcptv_keep_init +ffffffff8316c008 D tcp_rst_ppslim +ffffffff8316c00c D tcp_ackdrop_ppslim +ffffffff8316c010 D tcp_syn_hash_size +ffffffff8316c014 D tcp_syn_cache_limit +ffffffff8316c018 D tcp_syn_bucket_limit +ffffffff8316c01c D tcp_syn_use_limit +ffffffff8316c020 D syn_cache_mtx +ffffffff8316d000 D tcp_outflags +ffffffff8316e000 D tcp_timer_mtx +ffffffff8316e010 D tcp_mssdflt +ffffffff8316e014 D tcp_rttdflt +ffffffff8316e018 D tcp_do_rfc1323 +ffffffff8316e01c D tcp_do_sack +ffffffff8316e020 D tcp_do_rfc3390 +ffffffff8316e024 D tcp_do_tso +ffffffff8316e028 D tcp_reass_limit +ffffffff8316e02c D tcp_sackhole_limit +ffffffff8316f000 D tcp_backoff +ffffffff8316f034 D tcp_totbackoff +ffffffff83170000 D tcp_sendspace +ffffffff83170004 D tcp_recvspace +ffffffff83170008 D tcp_autorcvbuf_inc +ffffffff83171000 D udpcksum +ffffffff83171004 D udp_sendspace +ffffffff83171008 D udp_recvspace +ffffffff83172000 D ipsec_flows_mtx +ffffffff83172010 D ipsec_ids_idle +ffffffff83172014 D ipsec_ids_next_flow +ffffffff83172018 D ipsec_policy_head +ffffffff83172028 D ipsp_ids_gc_timeout +ffffffff83172070 D tdb_sadb_mtx +ffffffff83172080 d tdb_hashmask +ffffffff83173000 D ipo_tdb_mtx +ffffffff83173010 D ipsec_acquire_mtx +ffffffff83173020 D ipsec_acquire_head +ffffffff83174000 D ipsec_keep_invalid +ffffffff83174004 D ipsec_require_pfs +ffffffff83174008 D ipsec_soft_timeout +ffffffff8317400c D ipsec_exp_timeout +ffffffff83174010 D ipsec_soft_first_use +ffffffff83174014 D ipsec_exp_first_use +ffffffff83174018 D ipsec_expire_acquire +ffffffff8317401c D esp_enable +ffffffff83174020 D ah_enable +ffffffff83175000 D udpencap_enable +ffffffff83175004 D udpencap_port +ffffffff83176000 D carp_vh_rc +ffffffff83176020 D carp_sc_rc +ffffffff83176040 D carp_opts +ffffffff83176058 D carp_cloner +ffffffff83176088 d carp_send_na.mcast +ffffffff83177000 d PADDING +ffffffff83178000 d PADDING +ffffffff83179000 d weak_keys +ffffffff8317a000 D swcr_id +ffffffff8317b000 D window_inflate +ffffffff8317b004 D window_deflate +ffffffff8317c000 D ghash_update +ffffffff8317d000 D mpls_defttl +ffffffff8317d004 D mpls_mapttl_ip +ffffffff8317e000 D nfskevq_lock +ffffffff8317f000 D nfs_backoff +ffffffff8317f020 D nfs_ptimers +ffffffff83180000 D desirednfsrvcache +ffffffff83180010 D nonidempotent +ffffffff83180070 D nfsv2_repstat +ffffffff83181000 D nfsv2_type +ffffffff83181030 D nfsv3_type +ffffffff83181060 D nv2tov_type +ffffffff83181080 D nv3tov_type +ffffffff831810a0 D nfsv3_procid +ffffffff83181100 D nfsv2_procid +ffffffff8318115c d nfsv3err_getattr +ffffffff83181170 d nfsv3err_setattr +ffffffff83181190 d nfsv3err_lookup +ffffffff831811a4 d nfsv3err_access +ffffffff831811b0 d nfsv3err_readlink +ffffffff831811d0 d nfsv3err_read +ffffffff831811f0 d nfsv3err_write +ffffffff83181210 d nfsv3err_create +ffffffff83181230 d nfsv3err_mkdir +ffffffff83181250 d nfsv3err_symlink +ffffffff83181270 d nfsv3err_mknod +ffffffff83181290 d nfsv3err_remove +ffffffff831812b0 d nfsv3err_rmdir +ffffffff831812d0 d nfsv3err_rename +ffffffff83181300 d nfsv3err_link +ffffffff83181330 d nfsv3err_readdir +ffffffff83181350 d nfsv3err_readdirplus +ffffffff83181366 d nfsv3err_fsstat +ffffffff83181372 d nfsv3err_fsinfo +ffffffff8318137c d nfsv3err_pathconf +ffffffff83181386 d nfsv3err_commit +ffffffff83182000 D nfsrv3_procs +ffffffff831820b8 D nfs_niothreads +ffffffff83183000 D fragtbl +ffffffff83184000 D ffs_vtbl +ffffffff83185000 D softdep_typenames +ffffffff83185070 D tickdelay +ffffffff83186000 D dirchk +ffffffff83187000 D desireddquot +ffffffff83188000 D amap_list_lock +ffffffff83189000 d uao_list_lock +ffffffff8318a000 d uvmexp_countersboot_boot_cpumem +ffffffff8318a0c0 D uvmexp_counters +ffffffff8318a0c8 D vm_min_kernel_address +ffffffff8318b000 D no_constraint +ffffffff8318c000 d uvm_kmapent_warn_rate +ffffffff8318d000 D maxslp +ffffffff8318e000 D uvmpagerops +ffffffff8318f000 D uvm_swap_data_lock +ffffffff8318f010 D swap_syscall_lock +ffffffff8318f020 D oommtx +ffffffff83190000 D uvm_doswapencrypt +ffffffff83191000 D gif_list +ffffffff83191010 D gif_cloner +ffffffff83192000 d sec_cloner +ffffffff83192030 d sec_tdb_gc_mtx +ffffffff83192040 d sec_tdb_gc_task +ffffffff83193000 D divert6_sendspace +ffffffff83193004 D divert6_recvspace +ffffffff83193008 D divb6hashsize +ffffffff83194000 d in6_get_hw_ifid.allone +ffffffff83195000 D ip6_sendredirects +ffffffff83195004 D ip6_defhlim +ffffffff83195008 D ip6_defmcasthlim +ffffffff8319500c D ip6_maxfragpackets +ffffffff83195010 D ip6_maxfrags +ffffffff83195014 D ip6_log_interval +ffffffff83195018 D ip6_hdrnestlimit +ffffffff8319501c D ip6_dad_count +ffffffff83195020 D ip6_auto_flowlabel +ffffffff83195024 D ip6_use_deprecated +ffffffff83195028 D ip6_neighborgcthresh +ffffffff8319502c D ip6_maxdynroutes +ffffffff83195030 D rip6_sendspace +ffffffff83195038 D rip6_recvspace +ffffffff83195040 D icmp6_redirtimeout +ffffffff83195044 D icmp6errppslim +ffffffff83195048 D ip6_mtudisc_timeout +ffffffff83196000 D frag6_mutex +ffffffff83197000 d icmp6_mtudisc_hiwat +ffffffff83197004 d icmp6_mtudisc_lowat +ffffffff83198000 d randomtab_20 +ffffffff83199000 D ip6intrq +ffffffff83199038 d ip6send_task +ffffffff8319a000 D nd6_timer_next +ffffffff8319a008 D nd6_expire_next +ffffffff8319a010 D nd6_delay +ffffffff8319a014 D nd6_umaxtries +ffffffff8319a018 D nd6_mmaxtries +ffffffff8319a01c D nd6_gctimer +ffffffff8319a020 D nd6_maxndopt +ffffffff8319a028 D nd6_mtx +ffffffff8319a038 D nd6_list +ffffffff8319b000 d dadq +ffffffff8319c000 D pfkeyv2_mtx +ffffffff8319c010 d pfkeyv2_seq +ffffffff8319d000 D sadb_exts_allowed_in +ffffffff8319d090 D sadb_exts_required_in +ffffffff8319e000 D cold +ffffffff8319f000 D bdevsw +ffffffff8319f460 D nblkdev +ffffffff8319f470 D cdevsw +ffffffff831a1400 D nchrdev +ffffffff831a1404 D mem_no +ffffffff831a1408 D swapdev +ffffffff831a1410 D constab +ffffffff831a2000 D machine +ffffffff831a2008 D cpu_idle_cycle_fcn +ffffffff831a2010 D lid_action +ffffffff831a2014 D pwr_action +ffffffff831a2018 D isa_constraint +ffffffff831a2028 D dma_constraint +ffffffff831a2040 D uvm_md_constraints +ffffffff831a2058 D delay_func +ffffffff831a2060 D initclock_func +ffffffff831a2068 D startclock_func +ffffffff831a2070 D bootinfo_size +ffffffff831a2074 D waittime +ffffffff831a2078 D dumpmag +ffffffff831a3000 D tsc_rdtsc +ffffffff831a3008 D tsc_timecounter +ffffffff831a3058 D tsc_is_synchronized +ffffffff831a4000 D local_apic +ffffffff831a4020 D lapic_id +ffffffff831a4080 D lapic_tpr +ffffffff831a40a0 d lapic_ppr +ffffffff831a4100 d lapic_isr +ffffffff831a5000 D warn_once +ffffffff831a6000 d errata +ffffffff831a7000 D cpu_ucode_mtx +ffffffff831a8000 D mem_owner_bios +ffffffff831a8008 D mrops +ffffffff831a8028 D mtrrmask +ffffffff831a8030 D mtrrtomrt +ffffffff831a9000 D pmap_pg_wc +ffffffff831a9008 D pmaps_lock +ffffffff831a9018 d pmap_maxkvaddr +ffffffff831aa000 D kv_physwait +ffffffff831ab000 D fpu_save_len +ffffffff831ac000 D i8259_pic +ffffffff831ad000 D softintr_pic +ffffffff831ae000 D ipifunc +ffffffff831af000 D setperf_mp_mutex +ffffffff831b0000 D db_Grp6 +ffffffff831b0040 D db_Grp7 +ffffffff831b0100 D db_Grp8 +ffffffff831b0140 D db_Grp9 +ffffffff831b0200 D db_GrpA +ffffffff831b0240 D db_GrpB +ffffffff831b0280 D db_GrpC +ffffffff831b02c0 D db_inst_0f0x +ffffffff831b0440 D db_inst_0f2x +ffffffff831b05c0 D db_inst_0f3x +ffffffff831b0740 D db_inst_0f8x +ffffffff831b08c0 D db_inst_0f9x +ffffffff831b0a40 D db_inst_0fax +ffffffff831b0bc0 D db_inst_0fbx +ffffffff831b0d40 D db_inst_0fcx +ffffffff831b0ec0 D db_inst_0f +ffffffff831b0f40 D db_Esc92 +ffffffff831b0f80 D db_Esc94 +ffffffff831b0fc0 D db_Esc95 +ffffffff831b1000 D db_Esc96 +ffffffff831b1040 D db_Esc97 +ffffffff831b1080 D db_Esca5 +ffffffff831b10c0 D db_Escb4 +ffffffff831b1100 D db_Esce3 +ffffffff831b1140 D db_Escf4 +ffffffff831b1180 D db_Esc8 +ffffffff831b1240 D db_Esc9 +ffffffff831b1300 D db_Esca +ffffffff831b13c0 D db_Escb +ffffffff831b1480 D db_Escc +ffffffff831b1540 D db_Escd +ffffffff831b1600 D db_Esce +ffffffff831b16c0 D db_Escf +ffffffff831b1780 D db_Esc_inst +ffffffff831b17c0 D db_Grp1 +ffffffff831b1800 D db_Grp2 +ffffffff831b1840 D db_Grp3 +ffffffff831b1900 D db_Grp4 +ffffffff831b19c0 D db_Grp5 +ffffffff831b1a80 D db_inst_table +ffffffff831b3280 D db_bad_inst +ffffffff831b32a0 D db_index_reg_16 +ffffffff831b32e0 D db_reg +ffffffff831b34e0 D db_seg_reg +ffffffff831b3520 D db_lengths +ffffffff831b4000 D db_regs +ffffffff831b41e0 D db_eregs +ffffffff831b41f0 D db_reg_args +ffffffff831b5000 D timer_mutex +ffffffff831b5010 d i8254_timecounter +ffffffff831b6000 D spleen8x16 +ffffffff831b6058 D spleen12x24 +ffffffff831b60b0 D spleen16x32 +ffffffff831b6108 D spleen32x64 +ffffffff831b6160 d builtin_fonts +ffffffff831b61e0 d wsfont_add.cookiegen +ffffffff831b61f0 d spleen8x16_data +ffffffff831b6ff0 d spleen12x24_data +ffffffff831b99f0 d spleen16x32_data +ffffffff831bd1f0 d spleen32x64_data +ffffffff831cc000 D nsphy_cd +ffffffff831cd000 D nsphyter_cd +ffffffff831ce000 D gentbi_cd +ffffffff831cf000 D qsphy_cd +ffffffff831d0000 D inphy_cd +ffffffff831d1000 D iophy_cd +ffffffff831d2000 D eephy_cd +ffffffff831d3000 D exphy_cd +ffffffff831d4000 D rlphy_cd +ffffffff831d5000 D lxtphy_cd +ffffffff831d6000 D luphy_cd +ffffffff831d7000 D mtdphy_cd +ffffffff831d8000 D icsphy_cd +ffffffff831d9000 D sqphy_cd +ffffffff831da000 D tqphy_cd +ffffffff831db000 D ukphy_cd +ffffffff831dc000 D dcphy_cd +ffffffff831dd000 D bmtphy_cd +ffffffff831de000 D brgphy_cd +ffffffff831df000 D xmphy_cd +ffffffff831e0000 D amphy_cd +ffffffff831e1000 D acphy_cd +ffffffff831e2000 D nsgphy_cd +ffffffff831e3000 D urlphy_cd +ffffffff831e4000 D rgephy_cd +ffffffff831e5000 D ciphy_cd +ffffffff831e6000 D ipgphy_cd +ffffffff831e7000 D etphy_cd +ffffffff831e8000 D jmphy_cd +ffffffff831e9000 D atphy_cd +ffffffff831ea000 D scsi_autoconf +ffffffff831ea008 D scsibus_cd +ffffffff831eb000 D cd_cd +ffffffff831ec000 D ch_cd +ffffffff831ec020 D chquirks +ffffffff831ed000 D sd_cd +ffffffff831ee000 D st_cd +ffffffff831ef000 D uk_cd +ffffffff831f0000 D safte_cd +ffffffff831f1000 D ses_cd +ffffffff831f2000 D sym_cd +ffffffff831f2020 D sym_devices +ffffffff831f2070 D asym_devices +ffffffff831f3000 D rdac_cd +ffffffff831f3020 D rdac_devices +ffffffff831f4000 D emc_cd +ffffffff831f4020 D emc_devices +ffffffff831f5000 D hds_cd +ffffffff831f5020 D hds_devices +ffffffff831f6000 D atapiscsi_cd +ffffffff831f7000 D wd_cd +ffffffff831f7020 d wddumpmulti +ffffffff831f8000 D mainbus_cd +ffffffff831f8020 D mba_iba +ffffffff831f9000 D bios_cd +ffffffff831f9020 D smbios_uninfo +ffffffff831fa000 D mpbios_cd +ffffffff831fa020 d mp_conf +ffffffff831fa070 d extint_bus +ffffffff831fa0a0 d smi_bus +ffffffff831fa0d0 d nmi_bus +ffffffff831fb000 D cpu_info_full_primary +ffffffff831fe000 D cpu_info_list +ffffffff831fe008 D mp_cpu_funcs +ffffffff831fe020 D cpu_cd +ffffffff831fe040 D cpu_info +ffffffff831ff000 D local_pic +ffffffff831ff090 D lapic_readreg +ffffffff831ff098 D lapic_writereg +ffffffff831ff0a0 D x86_ipi +ffffffff83200000 D ioapic_cold +ffffffff83200008 D ioapic_cd +ffffffff83201000 D efifb_std_descr +ffffffff83201030 D efifb_descrs +ffffffff83201038 D efifb_accessops +ffffffff83201098 D efifb_cd +ffffffff83202000 D pvbus_cd +ffffffff83202020 D pvbus_types +ffffffff832020e0 D pvbus_dma_tag +ffffffff83203000 D pvclock_cd +ffffffff83203020 D pvclock_timecounter +ffffffff83204000 D vmt_tclo_rpc +ffffffff832040d0 D vmt_cd +ffffffff83205000 D xen_cd +ffffffff83205020 D xen_bus_dma_tag +ffffffff83206000 D xnf_cd +ffffffff83207000 D xbf_cd +ffffffff83208000 D hv_msg_dispatch +ffffffff83208110 D hv_timecounter +ffffffff83208160 D hyperv_cd +ffffffff83209000 d hv_ic_devs +ffffffff8320a000 D hvn_cd +ffffffff8320b000 D hvs_cd +ffffffff8320c000 D virtio_cd +ffffffff8320d000 D vio_cd +ffffffff8320e000 D vioblk_cd +ffffffff8320f000 D viomb_cd +ffffffff83210000 D viornd_cd +ffffffff83211000 D vioscsi_cd +ffffffff83212000 D vmmci_cd +ffffffff83213000 D pci_cd +ffffffff83214000 D arc_fw_hdr +ffffffff83214008 D arc_cd +ffffffff83215000 D jmb_cd +ffffffff83216000 D mfii_cd +ffffffff83217000 D ips_cd +ffffffff83218000 D eap_cd +ffffffff83219000 D auacer_cd +ffffffff8321a000 D auich_cd +ffffffff8321b000 D azalia_cd +ffffffff8321c000 D envy_cd +ffffffff8321c020 D envy_matchids +ffffffff8321c030 D envy_rates +ffffffff8321c0b0 D ak4524_dac +ffffffff8321c0d8 D ak4524_adc +ffffffff8321c100 D ak4358_dac +ffffffff8321c128 D ak5365_adc +ffffffff8321c150 D unkenvy_codec +ffffffff8321c180 D envy_cards +ffffffff8321c3f0 D envy_cards_ht +ffffffff8321c600 d julia_eeprom +ffffffff8321d000 D emu_cd +ffffffff8321e000 D auixp_cd +ffffffff8321f000 D clcs_cd +ffffffff83220000 D yds_cd +ffffffff83221000 D auvia_cd +ffffffff83222000 D qle_cd +ffffffff83223000 D mpii_cd +ffffffff83224000 D aq_cd +ffffffff83225000 D de_cd +ffffffff83226000 D pcn_cd +ffffffff83227000 D wdc_sii3114_vtbl +ffffffff83227038 D wdc_pdc203xx_vtbl +ffffffff83227070 D wdc_svwsata_vtbl +ffffffff832270a8 D pciide_cd +ffffffff832270d0 d sis_hostbr_type +ffffffff83228000 D ppb_cd +ffffffff83229000 D vr_cd +ffffffff83229020 D vr_devices +ffffffff8322a000 D txp_cd +ffffffff8322b000 D bt848_card_signature +ffffffff8322c000 D bktr_cd +ffffffff8322d000 D em_cd +ffffffff8322e000 D ixgb_cd +ffffffff8322f000 D ix_cd +ffffffff8322f020 D ixgbe_smart_speed +ffffffff8322f024 D ixgbe_enable_msix +ffffffff83230000 D ixl_cd +ffffffff83230020 d ixl_sff_lock +ffffffff83231000 D xge_cd +ffffffff83232000 D thtc_cd +ffffffff83232020 D tht_cd +ffffffff83232040 D tht_txt_desc +ffffffff83232068 D tht_rxf_desc +ffffffff83232090 D tht_rxd_desc +ffffffff832320b8 D tht_txf_desc +ffffffff83233000 D myx_cd +ffffffff83234000 D oce_cd +ffffffff83235000 D dc_devs +ffffffff83236000 D cas_cd +ffffffff83237000 D sis_cd +ffffffff83238000 D se_cd +ffffffff83239000 D mbg_cd +ffffffff8323a000 D cbb_cd +ffffffff8323a020 D yc_chipsets +ffffffff8323a1b0 d pccbb_funcs +ffffffff8323a1e0 d pccbb_pcmcia_funcs +ffffffff8323b000 D skc_cd +ffffffff8323b020 D sk_cd +ffffffff8323c000 D mskc_cd +ffffffff8323c020 D msk_cd +ffffffff8323d000 D puc_cd +ffffffff8323e000 D puc_ndevs +ffffffff8323f000 D iwi_cd +ffffffff83240000 D wpi_cd +ffffffff83241000 D iwn_cd +ffffffff83242000 D iwm_cd +ffffffff83243000 D iwx_cd +ffffffff83244000 D cmpci_cd +ffffffff83245000 D iha_cd +ffffffff83246000 D pcscp_cd +ffffffff83246020 D pcscp_glue +ffffffff83247000 D bge_cd +ffffffff83248000 D bnx_firmwares +ffffffff83248160 D bnx_rv2ps +ffffffff832481c0 D bnx_cd +ffffffff832481e0 d flash_5709 +ffffffff83248210 d flash_table +ffffffff83249000 D vge_cd +ffffffff8324a000 D stge_cd +ffffffff8324b000 D nfe_cd +ffffffff8324c000 D et_cd +ffffffff8324d000 D jme_cd +ffffffff8324e000 D age_cd +ffffffff8324f000 D alc_dma_burst +ffffffff8324f020 D alc_cd +ffffffff83250000 D ale_cd +ffffffff83251000 D amdpm_cd +ffffffff83251020 d amdpm_timecounter +ffffffff83252000 D bce_cd +ffffffff83253000 D rtwn_cd +ffffffff83254000 d ral_rt2560_opns +ffffffff83254028 d ral_rt2661_opns +ffffffff83254050 d ral_rt2860_opns +ffffffff83255000 D piixpm_cd +ffffffff83256000 D vic_cd +ffffffff83257000 D vmx_cd +ffffffff83258000 D vmwpvs_cd +ffffffff83259000 D lii_cd +ffffffff8325a000 D ichiic_cd +ffffffff8325b000 D viapm_cd +ffffffff8325b020 d viapm_timecounter +ffffffff8325c000 D amdiic_cd +ffffffff8325d000 D nviic_cd +ffffffff8325e000 D kate_cd +ffffffff8325f000 D km_cd +ffffffff83260000 D cpu_model_offsets +ffffffff83260070 D ksmn_cd +ffffffff83261000 D itherm_cd +ffffffff83262000 D pchtemp_cd +ffffffff83263000 D xspd_cd +ffffffff83264000 D virtio_pci_ops +ffffffff83265000 D bwfm_pci_buscore_ops +ffffffff83265030 D bwfm_pci_bus_ops +ffffffff83265058 D bwfm_pci_msgbuf_ops +ffffffff83266000 D bnxt_cd +ffffffff83267000 D mcx_cd +ffffffff83268000 D iavf_cd +ffffffff83269000 D rge_cd +ffffffff8326a000 D igc_cd +ffffffff8326b000 D ngbe_cd +ffffffff8326c000 D agp_cd +ffffffff8326d000 D intagp_cd +ffffffff8326d020 D agp_i810_methods +ffffffff8326e000 D reservation_ww_class +ffffffff8326f000 d bridge_lock +ffffffff8326f010 d bridge_list +ffffffff83270000 d drm_connector_enum_list +ffffffff832701f8 d connector_list_lock +ffffffff83270208 d connector_list +ffffffff83271000 d kernel_fb_helper_list +ffffffff83271010 d kernel_fb_helper_lock +ffffffff83272000 D drm_global_mutex +ffffffff83273000 D i2c_bit_algo +ffffffff83273010 d drm_fence_context_count +ffffffff83273018 d dma_fence_stub_mtx +ffffffff83273028 D wait_bit_mtx +ffffffff83273038 D shrinkers +ffffffff83274000 d crtc_ww_class +ffffffff83275000 d panel_lock +ffffffff83275010 d panel_list +ffffffff83276000 d ttm_global_mutex +ffffffff83277000 D intel_bbops +ffffffff83278000 d i915_sys_placement +ffffffff83278020 d i915_ttm_bo_driver +ffffffff83279000 d mchdev_lock +ffffffff8327a000 D inteldrm_stdscreen +ffffffff8327a030 D inteldrm_scrlist +ffffffff8327a038 D inteldrm_screenlist +ffffffff8327a048 D inteldrm_accessops +ffffffff8327a0a8 D inteldrm_cd +ffffffff8327b000 d capture_mutex +ffffffff8327c000 d mitigations +ffffffff8327d000 D i915_modparams +ffffffff8327e000 d schedule_lock +ffffffff8327f000 d unbind_fence_ops +ffffffff83280000 D intel_graphics_stolen_res +ffffffff83281000 D btc_valid_sclk +ffffffff83282000 d evergreen_cs_packet_parse_vline.vline_start_end +ffffffff83282020 d evergreen_cs_packet_parse_vline.vline_status +ffffffff83283000 d r600_cs_packet_parse_vline.vline_start_end +ffffffff83283008 d r600_cs_packet_parse_vline.vline_status +ffffffff83284000 d r100_asic +ffffffff832842e0 d r200_asic +ffffffff832845c0 d r300_asic_pcie +ffffffff832848a0 d r300_asic +ffffffff83284b80 d r420_asic +ffffffff83284e60 d rs400_asic +ffffffff83285140 d rs600_asic +ffffffff83285420 d rs690_asic +ffffffff83285700 d rv515_asic +ffffffff832859e0 d r520_asic +ffffffff83285cc0 d r600_asic +ffffffff83285fa0 d rv6xx_asic +ffffffff83286280 d rs780_asic +ffffffff83286560 d rv770_asic +ffffffff83286840 d evergreen_asic +ffffffff83286b20 d sumo_asic +ffffffff83286e00 d btc_asic +ffffffff832870e0 d cayman_asic +ffffffff832873c0 d trinity_asic +ffffffff832876a0 d si_asic +ffffffff83287980 d ci_asic +ffffffff83287c60 d kv_asic +ffffffff83288000 d dce6_funcs +ffffffff83288018 d dce6_hdmi_funcs +ffffffff83288088 d dce6_dp_funcs +ffffffff832880f8 d dce4_funcs +ffffffff83288110 d dce4_hdmi_funcs +ffffffff83288180 d dce4_dp_funcs +ffffffff832881f0 d dce32_funcs +ffffffff83288208 d dce32_hdmi_funcs +ffffffff83288278 d dce32_dp_funcs +ffffffff832882e8 d r600_funcs +ffffffff83288300 d r600_hdmi_funcs +ffffffff83289000 D radeon_modeset +ffffffff83289004 D radeon_dynclks +ffffffff83289008 D radeon_agpmode +ffffffff8328900c D radeon_gart_size +ffffffff83289010 D radeon_tv +ffffffff83289014 D radeon_audio +ffffffff83289018 D radeon_pcie_gen2 +ffffffff8328901c D radeon_msi +ffffffff83289020 D radeon_lockup_timeout +ffffffff83289024 D radeon_dpm +ffffffff83289028 D radeon_aspm +ffffffff8328902c D radeon_runtime_pm +ffffffff83289030 D radeon_vm_size +ffffffff83289034 D radeon_vm_block_size +ffffffff83289038 D radeon_use_pflipirq +ffffffff8328903c D radeon_bapm +ffffffff83289040 D radeon_backlight +ffffffff83289044 D radeon_auxch +ffffffff83289048 D radeon_uvd +ffffffff8328904c D radeon_vce +ffffffff83289050 D radeon_si_support +ffffffff83289054 D radeon_cik_support +ffffffff83289058 D radeondrm_cd +ffffffff83289078 D radeondrm_stdscreen +ffffffff832890a8 D radeondrm_scrlist +ffffffff832890b0 D radeondrm_screenlist +ffffffff832890c0 D radeondrm_accessops +ffffffff8328a000 D radeon_bbops +ffffffff8328b000 d radeon_bo_driver +ffffffff8328c000 d verde_pg_init +ffffffff8328d000 d cac_weights_pitcairn +ffffffff8328d4d0 d cac_weights_oland +ffffffff8328e000 d aldebaran_mode2_handler +ffffffff8328f000 d amdgpu_vbios_version_attrs +ffffffff83290000 D amdgpu_asic_name +ffffffff83291000 D amdgpu_gart_size +ffffffff83291004 D amdgpu_gtt_size +ffffffff83291008 D amdgpu_moverate +ffffffff8329100c D amdgpu_audio +ffffffff83291010 D amdgpu_pcie_gen2 +ffffffff83291014 D amdgpu_msi +ffffffff83291018 D amdgpu_dpm +ffffffff8329101c D amdgpu_fw_load_type +ffffffff83291020 D amdgpu_aspm +ffffffff83291024 D amdgpu_runtime_pm +ffffffff83291028 D amdgpu_ip_block_mask +ffffffff8329102c D amdgpu_bapm +ffffffff83291030 D amdgpu_vm_size +ffffffff83291034 D amdgpu_vm_fragment_size +ffffffff83291038 D amdgpu_vm_block_size +ffffffff8329103c D amdgpu_vm_update_mode +ffffffff83291040 D amdgpu_dc +ffffffff83291044 D amdgpu_sched_jobs +ffffffff83291048 D amdgpu_sched_hw_submission +ffffffff83291050 D amdgpu_cg_mask +ffffffff83291058 D amdgpu_pg_mask +ffffffff8329105c D amdgpu_sdma_phase_quantum +ffffffff83291060 D amdgpu_pp_feature_mask +ffffffff83291064 D amdgpu_lbpw +ffffffff83291068 D amdgpu_compute_multipipe +ffffffff8329106c D amdgpu_gpu_recovery +ffffffff83291070 D amdgpu_smu_pptable_id +ffffffff83291074 D amdgpu_dc_feature_mask +ffffffff83291078 D amdgpu_async_gfx_ring +ffffffff8329107c D amdgpu_discovery +ffffffff83291080 D amdgpu_noretry +ffffffff83291084 D amdgpu_force_asic_type +ffffffff83291088 D amdgpu_tmz +ffffffff8329108c D amdgpu_reset_method +ffffffff83291090 D amdgpu_num_kcq +ffffffff83291094 D amdgpu_use_xgmi_p2p +ffffffff83291098 D amdgpu_sg_display +ffffffff832910a0 D mgpu_info +ffffffff83291250 D amdgpu_ras_enable +ffffffff83291254 D amdgpu_ras_mask +ffffffff83291258 D amdgpu_bad_page_threshold +ffffffff8329125c D amdgpu_backlight +ffffffff83291260 D amdgpu_cd +ffffffff83291280 D amdgpu_stdscreen +ffffffff832912b0 D amdgpu_scrlist +ffffffff832912b8 D amdgpu_screenlist +ffffffff832912c8 D amdgpu_accessops +ffffffff83292000 d amdgpu_gtt_mgr_attributes +ffffffff83293000 D amdgpu_bbops +ffffffff83294000 D soc15_ih_clientid_name +ffffffff83295000 D ras_error_string +ffffffff83295030 D ras_block_string +ffffffff832950c0 D ras_mca_block_string +ffffffff83296000 d amdgpu_bo_driver +ffffffff83297000 d amdgpu_vram_mgr_attributes +ffffffff83298000 D amdgpu_xgmi_hive_type +ffffffff83298008 d xgmi_mutex +ffffffff83298018 D xgmi_ras_hw_ops +ffffffff83298058 D xgmi_ras +ffffffff83299000 d gfx_v9_0_ras +ffffffff8329a000 D gfx_v9_4_ras +ffffffff8329b000 D gfx_v9_4_2_ras_ops +ffffffff8329b040 D gfx_v9_4_2_ras +ffffffff8329c000 D hdp_v4_0_ras_hw_ops +ffffffff8329c040 D hdp_v4_0_ras +ffffffff8329d000 d jpeg_v2_6_ras +ffffffff8329e000 D mca_v3_0_mp0_ras +ffffffff8329e058 D mca_v3_0_mp1_ras +ffffffff8329e0b0 D mca_v3_0_mpio_ras +ffffffff8329f000 D mmhub_v1_0_ras_hw_ops +ffffffff8329f040 D mmhub_v1_0_ras +ffffffff832a0000 D mmhub_v1_7_ras_hw_ops +ffffffff832a0040 D mmhub_v1_7_ras +ffffffff832a1000 D mmhub_v9_4_ras +ffffffff832a2000 D nbio_v7_4_ras +ffffffff832a3000 d sriov_sc_video_codecs_encode +ffffffff832a3010 d sriov_sc_video_codecs_decode +ffffffff832a3020 d sriov_sc_video_codecs_encode_array +ffffffff832a3050 d sriov_sc_video_codecs_decode_array +ffffffff832a4000 d sdma_v4_0_ras +ffffffff832a5000 D sdma_v4_4_ras +ffffffff832a6000 d sienna_cichlid_mode2_handler +ffffffff832a7000 D umc_v6_1_ras +ffffffff832a8000 D umc_v6_7_ras +ffffffff832a9000 D umc_v8_10_ras +ffffffff832aa000 D umc_v8_7_ras +ffffffff832ab000 d vcn_v2_6_ras +ffffffff832ac000 d amdgpu_dm_mode_config_helperfuncs +ffffffff832ac010 d dm_atomic_state_funcs +ffffffff832ad000 d construct_integrated_info.result +ffffffff832ad004 d bios_parser_get_firmware_info.result +ffffffff832ae000 d dce_funcs +ffffffff832af000 d dce110_funcs +ffffffff832b0000 d dce112_funcs +ffffffff832b1000 d dce120_funcs +ffffffff832b2000 d rv1_clk_funcs +ffffffff832b2088 d rv1_clk_internal_funcs +ffffffff832b3000 d rv2_clk_internal_funcs +ffffffff832b4000 d dcn2_funcs +ffffffff832b5000 D dcn201_funcs +ffffffff832b6000 d dcn21_funcs +ffffffff832b6088 d rn_bw_params +ffffffff832b7000 D dcn3_fpga_funcs +ffffffff832b7088 d dcn3_funcs +ffffffff832b8000 d vg_funcs +ffffffff832b8088 d dummy_clocks +ffffffff832b81b8 d vg_bw_params +ffffffff832b9000 d dcn31_funcs +ffffffff832b9088 d dcn31_bw_params +ffffffff832ba000 d dcn314_funcs +ffffffff832ba088 d dcn314_bw_params +ffffffff832bb000 d dcn315_funcs +ffffffff832bb088 d dcn315_bw_params +ffffffff832bc000 d dcn316_funcs +ffffffff832bc088 d dcn316_bw_params +ffffffff832bd000 d dcn32_funcs +ffffffff832be000 d dcn10_dpp_cap +ffffffff832bf000 D aperture_default_system +ffffffff832c0000 d dcn20_dpp_funcs +ffffffff832c0110 d dcn20_dpp_cap +ffffffff832c1000 d dcn20_hubp_funcs +ffffffff832c2000 d dcn20_opp_funcs +ffffffff832c3000 d dcn20_tg_funcs +ffffffff832c4000 d dcn201_dpp_funcs +ffffffff832c4110 d dcn201_dpp_cap +ffffffff832c5000 d dcn201_hubp_funcs +ffffffff832c6000 d dcn201_opp_funcs +ffffffff832c7000 d dcn201_tg_funcs +ffffffff832c8000 D dcn201_ip +ffffffff832c81b8 D dcn201_soc +ffffffff832c8b88 d dcn201_res_pool_funcs +ffffffff832c9000 d dcn21_hubp_funcs +ffffffff832ca000 d dcn30_afmt_funcs +ffffffff832cb000 d dcn30_dpp_funcs +ffffffff832cb110 d dcn30_dpp_cap +ffffffff832cc000 d dcn30_hubp_funcs +ffffffff832cd000 d dcn30_tg_funcs +ffffffff832ce000 d dcn30_vpg_funcs +ffffffff832cf000 d res_cap_dcn301 +ffffffff832cf040 d dcn301_res_pool_funcs +ffffffff832d0000 d dcn302_res_pool_funcs +ffffffff832d1000 d dcn303_res_pool_funcs +ffffffff832d2000 d dcn31_afmt_funcs +ffffffff832d3000 d dcn31_apg_funcs +ffffffff832d4000 d dcn31_hpo_dp_link_encoder_funcs +ffffffff832d5000 d dcn31_hubp_funcs +ffffffff832d6000 d dcn31_tg_funcs +ffffffff832d7000 d dcn31_res_pool_funcs +ffffffff832d8000 d dcn31_vpg_funcs +ffffffff832d9000 d dcn314_tg_funcs +ffffffff832da000 d dcn314_res_pool_funcs +ffffffff832db000 d dcn315_res_pool_funcs +ffffffff832dc000 d dcn316_res_pool_funcs +ffffffff832dd000 d dcn32_dpp_funcs +ffffffff832dd110 d dcn32_dpp_cap +ffffffff832de000 d dcn32_hpo_dp_link_encoder_funcs +ffffffff832df000 d dcn32_hubp_funcs +ffffffff832e0000 d dcn32_tg_funcs +ffffffff832e1000 d dcn32_res_pool_funcs +ffffffff832e2000 d dcn321_res_pool_funcs +ffffffff832e3000 D dcn1_0_ip +ffffffff832e31b8 D dcn1_0_soc +ffffffff832e4000 D dcn2_0_ip +ffffffff832e41b8 D dcn2_0_nv14_ip +ffffffff832e4370 D dcn2_0_soc +ffffffff832e4d40 D dcn2_0_nv14_soc +ffffffff832e5710 D dcn2_1_ip +ffffffff832e58c8 D dcn2_1_soc +ffffffff832e6298 D ddr4_wm_table_gs +ffffffff832e6358 D lpddr4_wm_table_gs +ffffffff832e6418 D lpddr4_wm_table_with_disabled_ppt +ffffffff832e64d8 D ddr4_wm_table_rn +ffffffff832e6598 D ddr4_1R_wm_table_rn +ffffffff832e6658 D lpddr4_wm_table_rn +ffffffff832e7000 D dcn3_0_ip +ffffffff832e71b8 D dcn3_0_soc +ffffffff832e8000 D dcn3_01_ip +ffffffff832e81b8 D dcn3_01_soc +ffffffff832e8b88 D ddr4_wm_table +ffffffff832e8c48 D lpddr5_wm_table +ffffffff832e9000 D dcn3_02_ip +ffffffff832e91b8 D dcn3_02_soc +ffffffff832ea000 D dcn3_03_ip +ffffffff832ea1b8 D dcn3_03_soc +ffffffff832eb000 D dcn3_1_ip +ffffffff832eb1b8 D dcn3_15_ip +ffffffff832eb370 D dcn3_16_ip +ffffffff832eb528 d dcn3_15_soc +ffffffff832ebef8 d dcn3_1_soc +ffffffff832ec8c8 d dcn3_16_soc +ffffffff832ee000 D dcn3_14_ip +ffffffff832ee1b8 D dcn3_14_soc +ffffffff832ef000 D dcn3_2_ip +ffffffff832ef1b8 D dcn3_2_soc +ffffffff832f0000 D dcn3_21_ip +ffffffff832f01b8 D dcn3_21_soc +ffffffff832f1000 d dsc_policy_max_target_bpp_limit +ffffffff832f2000 D DIDTEDCConfig_P12 +ffffffff832f2070 d smu7_profiling +ffffffff832f3000 d cyan_skillfish_table_map +ffffffff832f3080 d cyan_skillfish_message_map +ffffffff832f4000 d navi10_table_map +ffffffff832f4080 d navi10_pwr_src_map +ffffffff832f4090 d navi10_workload_map +ffffffff832f40d0 d navi10_message_map +ffffffff832f4b20 d navi10_clk_map +ffffffff832f4be0 d navi10_feature_mask_map +ffffffff832f5000 d sienna_cichlid_message_map +ffffffff832f5a50 d sienna_cichlid_table_map +ffffffff832f5ad0 d sienna_cichlid_pwr_src_map +ffffffff832f5ae0 d sienna_cichlid_workload_map +ffffffff832f5b20 d sienna_cichlid_clk_map +ffffffff832f5be0 d sienna_cichlid_feature_mask_map +ffffffff832f6000 d vangogh_message_map +ffffffff832f6a50 d vangogh_table_map +ffffffff832f6ad0 d vangogh_workload_map +ffffffff832f6b10 d vangogh_feature_mask_map +ffffffff832f7000 d renoir_table_map +ffffffff832f7080 d renoir_workload_map +ffffffff832f70c0 d renoir_message_map +ffffffff832f7b10 d renoir_clk_map +ffffffff832f8000 d smu_v13_0_0_message_map +ffffffff832f8a50 d smu_v13_0_0_feature_mask_map +ffffffff832f8e20 d smu_v13_0_0_table_map +ffffffff832f8ea0 d smu_v13_0_0_pwr_src_map +ffffffff832f8eb0 d smu_v13_0_0_workload_map +ffffffff832f8ef0 d smu_v13_0_0_clk_map +ffffffff832f9000 d smu_v13_0_4_message_map +ffffffff832f9a50 d smu_v13_0_4_table_map +ffffffff832f9ad0 d smu_v13_0_4_feature_mask_map +ffffffff832fa000 d smu_v13_0_5_table_map +ffffffff832fa080 d smu_v13_0_5_message_map +ffffffff832faad0 d smu_v13_0_5_feature_mask_map +ffffffff832fb000 d smu_v13_0_7_message_map +ffffffff832fba50 d smu_v13_0_7_feature_mask_map +ffffffff832fbe20 d smu_v13_0_7_table_map +ffffffff832fbea0 d smu_v13_0_7_pwr_src_map +ffffffff832fbeb0 d smu_v13_0_7_workload_map +ffffffff832fbef0 d smu_v13_0_7_clk_map +ffffffff832fc000 d yellow_carp_table_map +ffffffff832fc080 d yellow_carp_message_map +ffffffff832fcad0 d yellow_carp_feature_mask_map +ffffffff832fd000 D pci_conf_lock +ffffffff832fd010 D pci_bus_dma_tag +ffffffff832fd088 D msi_pic +ffffffff832fd118 D msix_pic +ffffffff832fe000 D pchb_cd +ffffffff832ff000 D amas_cd +ffffffff83300000 D cardslot_cd +ffffffff83301000 D cardbus_cd +ffffffff83302000 d csdevs +ffffffff83303000 d ral_rt2560_opns +ffffffff83303028 d ral_rt2661_opns +ffffffff83303050 d ral_rt2860_opns +ffffffff83304000 D pcmcia_cd +ffffffff83305000 D pcmcia_3cxem556_func0 +ffffffff833050b8 D pcmcia_3cxem556_func0_cfe0 +ffffffff83305158 D pcmcia_megahertz_xjem1144_func0 +ffffffff83305210 D pcmcia_megahertz_xjem1144_func0_cfe0 +ffffffff833052b0 d pcmcia_3cxem556_func1 +ffffffff83305368 d pcmcia_3cxem556_func1_cfe0 +ffffffff83305408 d pcmcia_megahertz_xjem1144_func1 +ffffffff833054c0 d pcmcia_megahertz_xjem1144_func1_cfe0 +ffffffff83305560 d pcmcia_sierra_a555_func1 +ffffffff83305618 d pcmcia_sierra_a555_func1_cfe0 +ffffffff833056b8 d pcmcia_sveclancard_func0 +ffffffff83305770 d pcmcia_sveclancard_func0_cfe0 +ffffffff83306000 D ep_pcmcia_prod +ffffffff83307000 D aic_pcmcia_prod +ffffffff83308000 D com_pcmcia_prod +ffffffff83309000 D wdc_pcmcia_pr +ffffffff8330a000 D sm_pcmcia_prod +ffffffff8330b000 D xe_cd +ffffffff8330c000 D pcib_cd +ffffffff8330d000 D amdpcib_cd +ffffffff8330e000 D tcpcib_cd +ffffffff8330f000 D aapic_cd +ffffffff83310000 D hme_cd +ffffffff83311000 D isa_cd +ffffffff83312000 D isadma_cd +ffffffff83313000 D fdc_cd +ffffffff83314000 D fd_types +ffffffff833141f8 D fd_cd +ffffffff83315000 D mpu_cd +ffffffff83316000 D pcppi_cd +ffffffff83317000 D spkr_cd +ffffffff83318000 D wbsio_cd +ffffffff83319000 D schsio_cd +ffffffff8331a000 D it_cd +ffffffff8331b000 D uguru_cd +ffffffff8331c000 D aps_cd +ffffffff8331d000 D isa_bus_dma_tag +ffffffff8331e000 D wsdisplay_cd +ffffffff8331e020 D wsdisplay_cons +ffffffff8331e058 D wsdisplay_defaultscreens +ffffffff8331f000 D wskbd_cd +ffffffff8331f020 D wskbd_default_bell_data +ffffffff8331f030 D wskbd_default_keyrepeat_data +ffffffff8331f040 D wskbd_srcops +ffffffff83320000 d compose_tab +ffffffff83321000 D wsmouse_cd +ffffffff83321020 D wsmouse_srcops +ffffffff83322000 D wsmux_srcops +ffffffff83322030 D wsmux_tree_lock +ffffffff83323000 D vt100_output +ffffffff83324000 D pckbd_cd +ffffffff83325000 D pms_cd +ffffffff83325020 d synaptics_params +ffffffff83325030 d alps_params +ffffffff83326000 D skgpio_cd +ffffffff83327000 D pctr_conf_lock +ffffffff83328000 D ukbd_keymapdata +ffffffff83329000 D usbrev_str +ffffffff83329030 D usb_cd +ffffffff8332a000 d usbd_ratecheck.errinterval +ffffffff8332b000 D uhub_cd +ffffffff8332c000 D uaudio_cd +ffffffff8332d000 D uvideo_ctrls +ffffffff8332d2d8 D uvideo_cd +ffffffff8332e000 D utvfu_norm_params +ffffffff8332e030 D utvfu_cd +ffffffff8332f000 D udl_reg_vals_640x480_60 +ffffffff8332f020 D udl_reg_vals_640x480_67 +ffffffff8332f040 D udl_reg_vals_640x480_72 +ffffffff8332f060 D udl_reg_vals_640x480_75 +ffffffff8332f080 D udl_reg_vals_800x480_61 +ffffffff8332f0a0 D udl_reg_vals_800x600_56 +ffffffff8332f0c0 D udl_reg_vals_800x600_60 +ffffffff8332f0e0 D udl_reg_vals_800x600_72 +ffffffff8332f100 D udl_reg_vals_800x600_74 +ffffffff8332f120 D udl_reg_vals_800x600_75 +ffffffff8332f140 D udl_reg_vals_1024x768_60 +ffffffff8332f160 D udl_reg_vals_1024x768_70 +ffffffff8332f180 D udl_reg_vals_1024x768_75 +ffffffff8332f1a0 D udl_reg_vals_1280x800_60 +ffffffff8332f1c0 D udl_reg_vals_1280x960_60 +ffffffff8332f1e0 D udl_reg_vals_1280x1024_60 +ffffffff8332f200 D udl_reg_vals_1280x1024_75 +ffffffff8332f220 D udl_reg_vals_1366x768_60 +ffffffff8332f240 D udl_reg_vals_1440x900_60 +ffffffff8332f260 D udl_reg_vals_1440x900_59 +ffffffff8332f280 D udl_reg_vals_1440x900_75 +ffffffff8332f2a0 D udl_reg_vals_1680x1050_60 +ffffffff8332f2c0 D udl_reg_vals_1600x1200_60 +ffffffff8332f2e0 D udl_reg_vals_1920x1080_60 +ffffffff8332f300 D udl_null_key_1 +ffffffff8332f310 D udl_decomp_table +ffffffff83330510 D udl_cd +ffffffff83330530 D udl_stdscreen +ffffffff83330560 D udl_scrlist +ffffffff83330568 D udl_screenlist +ffffffff83330578 D udl_accessops +ffffffff83331000 D umidi_cd +ffffffff83332000 d umq_YAMAHA_YAMAHA_UX256_ANYIFACE +ffffffff83332020 d umq_ROLAND_ROLAND_UM1_2 +ffffffff83332040 d umq_ROLAND_ROLAND_SC8850_2 +ffffffff83332060 d umq_ROLAND_ROLAND_SD90_2 +ffffffff83332080 d umq_ROLAND_ROLAND_UM880N_0 +ffffffff833320a0 d umq_ROLAND_ROLAND_UA100_2 +ffffffff833320c0 d umq_ROLAND_ROLAND_UM4_2 +ffffffff833320e0 d umq_ROLAND_ROLAND_U8_2 +ffffffff83332100 d umq_ROLAND_ROLAND_UM2_2 +ffffffff83332120 d umq_ROLAND_ROLAND_SC8820_2 +ffffffff83332140 d umq_ROLAND_ROLAND_PC300_2 +ffffffff83332160 d umq_ROLAND_ROLAND_SK500_2 +ffffffff83332180 d umq_ROLAND_ROLAND_SCD70_2 +ffffffff833321a0 d umq_ROLAND_ROLAND_UM550_0 +ffffffff833321c0 d umq_ROLAND_ROLAND_SD20_0 +ffffffff833321e0 d umq_ROLAND_ROLAND_SD80_0 +ffffffff83332200 d umq_ROLAND_ROLAND_UA700_3 +ffffffff83332220 d umq_ROLAND_ROLAND_UMONE_ANYIFACE +ffffffff83332240 D umidi_quirklist +ffffffff833324a0 d umq_YAMAHA_YAMAHA_UX256_ANYIFACE_fixed_ep_desc +ffffffff833324c0 d umq_YAMAHA_YAMAHA_UX256_ANYIFACE_fixed_ep_endpoints +ffffffff833324d0 d umq_ROLAND_ROLAND_UM1_2_fixed_ep_desc +ffffffff833324f0 d umq_ROLAND_ROLAND_UM1_2_fixed_ep_endpoints +ffffffff83332500 d umq_ROLAND_ROLAND_SC8850_2_fixed_ep_desc +ffffffff83332520 d umq_ROLAND_ROLAND_SC8850_2_fixed_ep_endpoints +ffffffff83332530 d umq_ROLAND_ROLAND_SD90_2_fixed_ep_desc +ffffffff83332550 d umq_ROLAND_ROLAND_SD90_2_fixed_ep_endpoints +ffffffff83332560 d umq_ROLAND_ROLAND_UM880N_0_fixed_ep_desc +ffffffff83332580 d umq_ROLAND_ROLAND_UM880N_0_fixed_ep_endpoints +ffffffff83332590 d umq_ROLAND_ROLAND_UA100_2_fixed_ep_desc +ffffffff833325b0 d umq_ROLAND_ROLAND_UA100_2_fixed_ep_endpoints +ffffffff833325c0 d umq_ROLAND_ROLAND_UM4_2_fixed_ep_desc +ffffffff833325e0 d umq_ROLAND_ROLAND_UM4_2_fixed_ep_endpoints +ffffffff833325f0 d umq_ROLAND_ROLAND_U8_2_fixed_ep_desc +ffffffff83332610 d umq_ROLAND_ROLAND_U8_2_fixed_ep_endpoints +ffffffff83332620 d umq_ROLAND_ROLAND_UM2_2_fixed_ep_desc +ffffffff83332640 d umq_ROLAND_ROLAND_UM2_2_fixed_ep_endpoints +ffffffff83332650 d umq_ROLAND_ROLAND_SC8820_2_fixed_ep_desc +ffffffff83332670 d umq_ROLAND_ROLAND_SC8820_2_fixed_ep_endpoints +ffffffff83332680 d umq_ROLAND_ROLAND_PC300_2_fixed_ep_desc +ffffffff833326a0 d umq_ROLAND_ROLAND_PC300_2_fixed_ep_endpoints +ffffffff833326b0 d umq_ROLAND_ROLAND_SK500_2_fixed_ep_desc +ffffffff833326d0 d umq_ROLAND_ROLAND_SK500_2_fixed_ep_endpoints +ffffffff833326e0 d umq_ROLAND_ROLAND_SCD70_2_fixed_ep_desc +ffffffff83332700 d umq_ROLAND_ROLAND_SCD70_2_fixed_ep_endpoints +ffffffff83332710 d umq_ROLAND_ROLAND_UM550_0_fixed_ep_desc +ffffffff83332730 d umq_ROLAND_ROLAND_UM550_0_fixed_ep_endpoints +ffffffff83332740 d umq_ROLAND_ROLAND_SD20_0_fixed_ep_desc +ffffffff83332760 d umq_ROLAND_ROLAND_SD20_0_fixed_ep_endpoints +ffffffff83332770 d umq_ROLAND_ROLAND_SD80_0_fixed_ep_desc +ffffffff83332790 d umq_ROLAND_ROLAND_SD80_0_fixed_ep_endpoints +ffffffff833327a0 d umq_ROLAND_ROLAND_UA700_3_fixed_ep_desc +ffffffff833327c0 d umq_ROLAND_ROLAND_UA700_3_fixed_ep_endpoints +ffffffff833327d0 d umq_ROLAND_ROLAND_UMONE_ANYIFACE_fixed_ep_desc +ffffffff833327f0 d umq_ROLAND_ROLAND_UMONE_ANYIFACE_fixed_ep_endpoints +ffffffff83333000 D ucom_cd +ffffffff83333020 D sysctl_ucomlock +ffffffff83334000 D ugen_cd +ffffffff83335000 D uhidev_cd +ffffffff83335020 d uhidev_use_rdesc.reportbuf +ffffffff83336000 D uhid_cd +ffffffff83337000 D fido_cd +ffffffff83338000 D ujoy_cd +ffffffff83339000 D ukbd_cd +ffffffff8333a000 D ums_cd +ffffffff8333a020 d ums_fix_elecom_descriptor.match +ffffffff8333b000 D umt_cd +ffffffff8333c000 D def_scale +ffffffff8333c020 D uts_cd +ffffffff8333d000 D ubcmtp_cd +ffffffff8333d020 d ubcmtp_wsmousecfg +ffffffff8333e000 D ucycom_cd +ffffffff8333f000 D uslhcom_cd +ffffffff83340000 D ulpt_fwdevs +ffffffff83340060 D ulpt_cd +ffffffff83340080 D ulptusein +ffffffff83341000 D umass_cd +ffffffff83341020 d umass_bbb_transfer.dCBWtag +ffffffff83342000 D uthum_cd +ffffffff83343000 D ugold_cd +ffffffff83343020 d cmd_init +ffffffff83343028 d cmd_type +ffffffff83343030 d cmd_data +ffffffff83344000 D utrh_cd +ffffffff83345000 D uoakrh_cd +ffffffff83346000 D uoaklux_cd +ffffffff83347000 D uoakv_cd +ffffffff83348000 D uonerng_cd +ffffffff83349000 D urng_cd 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+ffffffff83707008 B hidkbd_bell_fn +ffffffff83707010 B hidkbd_bell_fn_arg +ffffffff83708000 B usb_task_thread_proc +ffffffff83708008 B usb_abort_task_thread_proc +ffffffff83708010 b usb_nbuses +ffffffff83708018 B usbpalock +ffffffff83708028 B usb_abort_tasks +ffffffff83708038 B usb_explore_tasks +ffffffff83708048 B usb_generic_tasks +ffffffff83708058 b usb_run_abort_tasks +ffffffff8370805c b usb_run_tasks +ffffffff83708060 B explore_pending +ffffffff83709000 B usb_blk_freelist +ffffffff83709008 B usb_blk_nfree +ffffffff83709010 B usb_frag_freelist +ffffffff8370a000 b usbd_errstr.buffer +ffffffff8370a008 b usb_delay_ms.usb_delay_wchan +ffffffff8370a010 b usbd_probe_and_attach.cookie +ffffffff8370b000 b ucom_change +ffffffff8370b008 b sysctl_ucominit.ucoms +ffffffff8370b010 b sysctl_ucominit.ucomslen +ffffffff8370c000 b t_wait +ffffffff8370c004 b t_trust +ffffffff8370d000 B umb_session_id +ffffffff8370d010 b umb_val2descr.sval +ffffffff8370e000 b probe_ic +ffffffff8370e008 b probe_addr +ffffffff8370e010 b probe_val +ffffffff8370e110 B skip_fc +ffffffff8370e118 B ignore_addrs +ffffffff8370e120 b iic_dump.iicvalcnt +ffffffff8370f000 B acpi_softc +ffffffff8370f008 B acpiwqpool +ffffffff8370f1b0 B acpi_enabled +ffffffff8370f1b4 b acpi_maptable.tblid +ffffffff8370f1b8 b acpi_add_device.nacpicpus +ffffffff8370f1bc B acpi_force_bm +ffffffff8370f1c0 B mouse_has_softbtn +ffffffff8370f1c4 B acpi_evindex +ffffffff8370f1c8 B acpi_poll_enabled +ffffffff8370f1cc B acpi_hasprocfvs +ffffffff8370f1d0 B acpi_haspci +ffffffff83710000 B aml_root +ffffffff83710060 B aml_lastscope +ffffffff83710068 B aml_ophash +ffffffff83710070 b aml_mnem.mnemstr +ffffffff83710090 B aml_notify_list +ffffffff83710098 B acpi_nalloc +ffffffff837100a0 b acpi_sleep.acpinowait +ffffffff837100b0 b aml_nodename.namebuf +ffffffff83710130 b aml_getname.namebuf +ffffffff837101b0 b aml_getname.p +ffffffff837101b8 b global_lock_count +ffffffff837101c0 b aml_eisaid.id +ffffffff837101c8 B aml_global_lock +ffffffff837101d0 b aml_mapresource.map +ffffffff83710210 b aml_val_to_string.buffer +ffffffff83710310 B aml_error +ffffffff83710314 B odp +ffffffff83710318 B maxdp +ffffffff8371031c B aml_busy +ffffffff83711000 B scope +ffffffff83712000 B acpibtn_lids +ffffffff83713000 B cst_stats +ffffffff83714000 B acpihpet_attached +ffffffff83715000 b acpiec_wait.acpiecnowait +ffffffff83716000 B acpitz_cpu_setperf +ffffffff83717000 B acpimadt_busses +ffffffff8371a000 B acpimadt_isa_bus +ffffffff8371a030 b lapic_map +ffffffff8371b000 B acpidmar_ddb +ffffffff8371b010 b dmar_bdf.bdf +ffffffff8371b030 B acpidmar_sc +ffffffff8371b038 B domain_map_page +ffffffff8371b040 b dom_bdf.mmm +ffffffff8371b070 b iommu_init.niommu +ffffffff8371b078 b acpidmar_pci_attach.dom +ffffffff8371b080 b sid_flag +ffffffff8375b080 b ivhd_showpage.show +ffffffff8375b084 b ivhd_iommu_init.niommu +ffffffff8375b088 b acpidmar_intr.ofe.0 +ffffffff8375b090 b acpidmar_intr.ofe.1 +ffffffff8375c000 b dwiic_i2c_intr_string.irqstr +ffffffff8375d000 B acpihve_attached +ffffffff8375e000 B efi_jmpbuf +ffffffff8375f000 B vm_pool +ffffffff8375f1a8 B vcpu_pool +ffffffff8375f350 B vmm_softc +ffffffff83760000 B l1tf_flush_region +ffffffff83761000 B sdmmc_verbose +ffffffff83762000 B utc_offset +ffffffff83762008 B bufpages +ffffffff83762010 B utsname +ffffffff83763000 B mountroot +ffffffff83764000 B __kernel_bss_end ffffffff83800000 B _end ffffffff83800000 B end