--- 7.4/2023-12-01T07:17:03Z/2023-11-26T00:00:00Z/nm-bsd-ot14.txt Mon Dec 4 09:12:11 2023 +++ 7.4/2023-12-01T07:17:03Z/2023-11-27T00:00:00Z/nm-bsd-ot14.txt Mon Dec 4 12:03:27 2023 @@ -2,14 +2,14 @@ 00011006 A mp_pdirpa 0001419d A acpi_pdirpa 01000000 A __kernel_phys_base -02562000 T __kernel_kutext_phys -02566000 C __kernel_cptext_phys -02567000 C __kernel_rodata_phys -02e26000 R __kernel_kutext_page_phys -02e28000 C __kernel_randomdata_phys -030e7000 R __kernel_data_phys -03420000 D __kernel_kudata_phys -03421000 C __kernel_bss_phys +02561000 T __kernel_kutext_phys +02565000 C __kernel_cptext_phys +02566000 C __kernel_rodata_phys +02e25000 R __kernel_kutext_page_phys +02e27000 C __kernel_randomdata_phys +030e6000 R __kernel_data_phys +0341f000 D __kernel_kudata_phys +03420000 C __kernel_bss_phys 03800000 B __kernel_phys_end 80000000 A __kernel_virt_to_phys ffffffff80000000 A __kernel_base @@ -9465,23 +9465,23 @@ ffffffff81441e30 T socket_send ffffffff81441eb0 T ip_mforward ffffffff814421e0 T ip_mdq ffffffff81443000 T ip_output -ffffffff81443a40 T ip_insertoptions -ffffffff81443bf0 T ip_output_ipsec_lookup -ffffffff81443d50 T in_proto_cksum_out -ffffffff81443fe0 T ip_mloopback -ffffffff814440c0 T ip_output_ipsec_send -ffffffff814443d0 T ip_fragment -ffffffff81444820 T ip_output_ipsec_pmtu_update -ffffffff81444920 T ip_optcopy -ffffffff81444a50 T in_hdr_cksum_out -ffffffff81444b30 T ip_ctloutput -ffffffff814453e0 T ip_pcbopts -ffffffff81445620 T ip_setmoptions -ffffffff81445ba0 T ip_getmoptions -ffffffff81445d00 T ip_multicast_if -ffffffff81445de0 T ip_freemoptions -ffffffff81445e70 T in_ifcap_cksum -ffffffff81445ed0 T in_delayed_cksum +ffffffff81443a20 T ip_insertoptions +ffffffff81443bd0 T ip_output_ipsec_lookup +ffffffff81443d30 T in_proto_cksum_out +ffffffff81443fc0 T ip_mloopback +ffffffff814440a0 T ip_output_ipsec_send +ffffffff814443b0 T ip_fragment +ffffffff81444800 T ip_output_ipsec_pmtu_update +ffffffff81444900 T ip_optcopy +ffffffff81444a30 T in_hdr_cksum_out +ffffffff81444b10 T ip_ctloutput +ffffffff814453c0 T ip_pcbopts +ffffffff81445600 T ip_setmoptions +ffffffff81445b80 T ip_getmoptions +ffffffff81445ce0 T ip_multicast_if +ffffffff81445dc0 T ip_freemoptions +ffffffff81445e50 T in_ifcap_cksum +ffffffff81445eb0 T in_delayed_cksum ffffffff81446000 T rip_attach ffffffff814460f0 T rip_detach ffffffff81446170 T rip_lock @@ -9500,60 +9500,60 @@ ffffffff81447000 T tcp_trace ffffffff81448000 T tcp_reass ffffffff814483a0 T tcp_flush_queue ffffffff81448540 T tcp_input -ffffffff8144b9d0 T syn_cache_reset -ffffffff8144bb40 T syn_cache_get -ffffffff8144c2e0 T syn_cache_add -ffffffff8144c950 T tcp_del_sackholes -ffffffff8144ca10 T tcp_dooptions -ffffffff8144cf50 T tcp_xmit_timer -ffffffff8144d0a0 T tcp_clean_sackreport -ffffffff8144d120 T tcp_mss -ffffffff8144d3c0 T tcp_sack_partialack -ffffffff8144d470 T tcp_newreno_partialack -ffffffff8144d560 T tcp_seq_subtract -ffffffff8144d590 T tcp_pulloutofband -ffffffff8144d650 T tcp_update_sack_list -ffffffff8144db80 T tcp_sack_option -ffffffff8144e0b0 T tcp_hdrsz -ffffffff8144e120 T tcp_mss_update -ffffffff8144e270 T tcp_mss_adv -ffffffff8144e330 T syn_cache_rm -ffffffff8144e4c0 T syn_cache_put -ffffffff8144e530 T syn_cache_init -ffffffff8144e640 T syn_cache_insert -ffffffff8144ec00 T syn_cache_timer -ffffffff8144ee10 T syn_cache_respond -ffffffff8144f420 T syn_cache_cleanup -ffffffff8144f540 T syn_cache_lookup -ffffffff8144f7b0 T syn_cache_unreach +ffffffff8144b9e0 T syn_cache_reset +ffffffff8144bb50 T syn_cache_get +ffffffff8144c2f0 T syn_cache_add +ffffffff8144c960 T tcp_del_sackholes +ffffffff8144ca20 T tcp_dooptions +ffffffff8144cf60 T tcp_xmit_timer +ffffffff8144d0b0 T tcp_clean_sackreport +ffffffff8144d130 T tcp_mss +ffffffff8144d3d0 T tcp_sack_partialack +ffffffff8144d480 T tcp_newreno_partialack +ffffffff8144d570 T tcp_seq_subtract +ffffffff8144d5a0 T tcp_pulloutofband +ffffffff8144d660 T tcp_update_sack_list +ffffffff8144db90 T tcp_sack_option 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T tcp_signature_tdb_zeroize +ffffffff814548a0 T tcp_signature_tdb_input +ffffffff814548f0 T tcp_signature_tdb_output +ffffffff81454930 T tcp_signature_apply +ffffffff81454970 T tcp_signature ffffffff81455000 T tcp_timer_rexmt ffffffff814554f0 T tcp_timer_persist ffffffff814556c0 T tcp_timer_keep @@ -9600,13 +9600,13 @@ ffffffff814593a0 T udp_shutdown ffffffff814593e0 T udp_send ffffffff814594f0 T udp_init ffffffff81459520 T udp_input -ffffffff8145a2b0 T udp_sbappend -ffffffff8145a520 T udp_notify -ffffffff8145a560 T udp6_ctlinput -ffffffff8145a8a0 T udp_ctlinput -ffffffff8145aa10 T udp_output -ffffffff8145ae70 T udp_sysctl -ffffffff8145b110 T udp_sysctl_udpstat +ffffffff8145a280 T udp_sbappend +ffffffff8145a4f0 T udp_notify +ffffffff8145a530 T udp6_ctlinput +ffffffff8145a870 T udp_ctlinput +ffffffff8145a9e0 T udp_output +ffffffff8145ae40 T udp_sysctl +ffffffff8145b0e0 T udp_sysctl_udpstat ffffffff8145c000 T gre_send ffffffff8145d000 T ipsp_ids_gc ffffffff8145d120 T ipsp_init @@ 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dal_bios_parser_destroy -ffffffff81f5b000 T dal_bios_parser_init_cmd_tbl -ffffffff81f5b800 t encoder_control_digx_v3 -ffffffff81f5b900 t encoder_control_digx_v4 -ffffffff81f5ba00 t encoder_control_digx_v5 -ffffffff81f5bb50 t encoder_control_dig1_v1 -ffffffff81f5bbd0 t encoder_control_dig2_v1 -ffffffff81f5bc50 t encoder_control_dig_v1 -ffffffff81f5bcb0 t transmitter_control_v2 -ffffffff81f5be50 t transmitter_control_v3 -ffffffff81f5c010 t transmitter_control_v4 -ffffffff81f5c1c0 t transmitter_control_v1_5 -ffffffff81f5c340 t transmitter_control_v1_6 -ffffffff81f5c4b0 t set_pixel_clock_v3 -ffffffff81f5c620 t set_pixel_clock_v5 -ffffffff81f5c7c0 t set_pixel_clock_v6 -ffffffff81f5c970 t set_pixel_clock_v7 -ffffffff81f5cb40 t enable_spread_spectrum_on_ppll_v1 -ffffffff81f5cc60 t enable_spread_spectrum_on_ppll_v2 -ffffffff81f5cd90 t enable_spread_spectrum_on_ppll_v3 -ffffffff81f5cea0 t adjust_display_pll_v2 -ffffffff81f5cff0 t adjust_display_pll_v3 -ffffffff81f5d160 t dac1_encoder_control_v1 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external_encoder_control_v3 -ffffffff81f5ef10 t enable_disp_power_gating_v2_1 -ffffffff81f5f070 t enable_disp_power_gating_fallback -ffffffff81f5f0d0 t set_dce_clock_v2_1 -ffffffff81f5f1f0 t get_smu_clock_info_v3_1 -ffffffff81f5f260 t enable_lvtma_control -ffffffff81f60000 T dal_bios_parser_init_cmd_tbl_helper -ffffffff81f600a0 T dal_cmd_table_helper_controller_id_to_atom -ffffffff81f601c0 T dal_cmd_table_helper_transmitter_bp_to_atom -ffffffff81f60240 T dal_cmd_table_helper_encoder_mode_bp_to_atom -ffffffff81f602d0 T dal_cmd_table_helper_assign_control_parameter -ffffffff81f60390 T dal_cmd_table_helper_clock_source_id_to_ref_clk_src -ffffffff81f60470 T dal_cmd_table_helper_encoder_id_to_atom -ffffffff81f61000 T dal_bios_parser_init_cmd_tbl_helper2 -ffffffff81f610b0 T dal_cmd_table_helper_controller_id_to_atom2 -ffffffff81f611c0 T dal_cmd_table_helper_transmitter_bp_to_atom2 -ffffffff81f61240 T dal_cmd_table_helper_encoder_mode_bp_to_atom2 -ffffffff81f612d0 T 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Xresume_ioapic_level40 +ffffffff815f9340 T Xintr_ioapic_level40_untramp +ffffffff815f9650 T Xrecurse_ioapic_level41 +ffffffff815f96d0 T Xresume_ioapic_level41 +ffffffff815f9700 T Xintr_ioapic_level41_untramp +ffffffff815f9a10 T Xrecurse_ioapic_level42 +ffffffff815f9a90 T Xresume_ioapic_level42 +ffffffff815f9ac0 T Xintr_ioapic_level42_untramp +ffffffff815f9dd0 T Xrecurse_ioapic_level43 +ffffffff815f9e50 T Xresume_ioapic_level43 +ffffffff815f9e80 T Xintr_ioapic_level43_untramp +ffffffff815fa190 T Xrecurse_ioapic_level44 +ffffffff815fa210 T Xresume_ioapic_level44 +ffffffff815fa240 T Xintr_ioapic_level44_untramp +ffffffff815fa550 T Xrecurse_ioapic_level45 +ffffffff815fa5d0 T Xresume_ioapic_level45 +ffffffff815fa600 T Xintr_ioapic_level45_untramp +ffffffff815fa910 T Xrecurse_ioapic_level46 +ffffffff815fa990 T Xresume_ioapic_level46 +ffffffff815fa9c0 T Xintr_ioapic_level46_untramp +ffffffff815facd0 T Xrecurse_ioapic_level47 +ffffffff815fad50 T Xresume_ioapic_level47 +ffffffff815fad80 T Xintr_ioapic_level47_untramp +ffffffff815fb090 T Xrecurse_ioapic_level48 +ffffffff815fb110 T Xresume_ioapic_level48 +ffffffff815fb140 T Xintr_ioapic_level48_untramp +ffffffff815fb450 T Xrecurse_ioapic_level49 +ffffffff815fb4d0 T Xresume_ioapic_level49 +ffffffff815fb500 T Xintr_ioapic_level49_untramp +ffffffff815fb810 T Xrecurse_ioapic_level50 +ffffffff815fb890 T Xresume_ioapic_level50 +ffffffff815fb8c0 T Xintr_ioapic_level50_untramp +ffffffff815fbbd0 T Xrecurse_ioapic_level51 +ffffffff815fbc50 T Xresume_ioapic_level51 +ffffffff815fbc80 T Xintr_ioapic_level51_untramp +ffffffff815fbf90 T Xrecurse_ioapic_level52 +ffffffff815fc010 T Xresume_ioapic_level52 +ffffffff815fc040 T Xintr_ioapic_level52_untramp +ffffffff815fc350 T Xrecurse_ioapic_level53 +ffffffff815fc3d0 T Xresume_ioapic_level53 +ffffffff815fc400 T Xintr_ioapic_level53_untramp +ffffffff815fc710 T Xrecurse_ioapic_level54 +ffffffff815fc790 T Xresume_ioapic_level54 +ffffffff815fc7c0 T Xintr_ioapic_level54_untramp +ffffffff815fcad0 T Xrecurse_ioapic_level55 +ffffffff815fcb50 T Xresume_ioapic_level55 +ffffffff815fcb80 T Xintr_ioapic_level55_untramp +ffffffff815fce90 T Xrecurse_ioapic_level56 +ffffffff815fcf10 T Xresume_ioapic_level56 +ffffffff815fcf40 T Xintr_ioapic_level56_untramp +ffffffff815fd250 T Xrecurse_ioapic_level57 +ffffffff815fd2d0 T Xresume_ioapic_level57 +ffffffff815fd300 T Xintr_ioapic_level57_untramp +ffffffff815fd610 T Xrecurse_ioapic_level58 +ffffffff815fd690 T Xresume_ioapic_level58 +ffffffff815fd6c0 T Xintr_ioapic_level58_untramp +ffffffff815fd9d0 T Xrecurse_ioapic_level59 +ffffffff815fda50 T Xresume_ioapic_level59 +ffffffff815fda80 T Xintr_ioapic_level59_untramp +ffffffff815fdd90 T Xrecurse_ioapic_level60 +ffffffff815fde10 T Xresume_ioapic_level60 +ffffffff815fde40 T Xintr_ioapic_level60_untramp +ffffffff815fe150 T Xrecurse_ioapic_level61 +ffffffff815fe1d0 T Xresume_ioapic_level61 +ffffffff815fe200 T Xintr_ioapic_level61_untramp +ffffffff815fe510 T Xrecurse_ioapic_level62 +ffffffff815fe590 T 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intr_calculatemasks +ffffffff81602470 T intr_allocate_slot_cpu +ffffffff81602610 T intr_allocate_slot +ffffffff816028c0 T intr_establish +ffffffff81602d10 T intr_disestablish +ffffffff81602e50 T intr_handler +ffffffff81602f10 T cpu_intr_init +ffffffff81603160 T intr_printconfig +ffffffff81603190 T intr_barrier +ffffffff816031b0 T splraise +ffffffff81603220 T spllower +ffffffff81603290 T softintr +ffffffff81604000 T x86_bus_space_io_read_1 +ffffffff81604030 T x86_bus_space_io_read_2 +ffffffff81604060 T x86_bus_space_io_read_4 +ffffffff81604090 T x86_bus_space_io_read_8 +ffffffff816040b0 T x86_bus_space_io_read_multi_1 +ffffffff816040f0 T x86_bus_space_io_read_multi_2 +ffffffff81604130 T x86_bus_space_io_read_multi_4 +ffffffff81604170 T x86_bus_space_io_read_multi_8 +ffffffff81604190 T x86_bus_space_io_read_region_1 +ffffffff816041d0 T x86_bus_space_io_read_region_2 +ffffffff81604210 T x86_bus_space_io_read_region_4 +ffffffff81604250 T x86_bus_space_io_read_region_8 +ffffffff81604270 T x86_bus_space_io_write_1 +ffffffff816042a0 T x86_bus_space_io_write_2 +ffffffff816042d0 T x86_bus_space_io_write_4 +ffffffff81604300 T x86_bus_space_io_write_8 +ffffffff81604320 T x86_bus_space_io_write_multi_1 +ffffffff81604360 T x86_bus_space_io_write_multi_2 +ffffffff816043a0 T x86_bus_space_io_write_multi_4 +ffffffff816043e0 T x86_bus_space_io_write_multi_8 +ffffffff81604400 T x86_bus_space_io_write_region_1 +ffffffff81604440 T x86_bus_space_io_write_region_2 +ffffffff81604480 T x86_bus_space_io_write_region_4 +ffffffff816044c0 T x86_bus_space_io_write_region_8 +ffffffff816044e0 T x86_bus_space_io_set_multi_1 +ffffffff81604530 T x86_bus_space_io_set_multi_2 +ffffffff81604580 T x86_bus_space_io_set_multi_4 +ffffffff816045d0 T x86_bus_space_io_set_multi_8 +ffffffff816045f0 T x86_bus_space_io_set_region_1 +ffffffff81604650 T x86_bus_space_io_set_region_2 +ffffffff816046b0 T x86_bus_space_io_set_region_4 +ffffffff81604710 T x86_bus_space_io_set_region_8 +ffffffff81604730 T x86_bus_space_io_copy_1 +ffffffff816047c0 T x86_bus_space_io_copy_2 +ffffffff81604850 T x86_bus_space_io_copy_4 +ffffffff816048e0 T x86_bus_space_io_copy_8 +ffffffff81604900 T x86_bus_space_io_vaddr +ffffffff81604930 T x86_bus_space_io_mmap +ffffffff81604960 T x86_bus_space_mem_read_1 +ffffffff81604990 T x86_bus_space_mem_read_2 +ffffffff816049c0 T x86_bus_space_mem_read_4 +ffffffff816049f0 T x86_bus_space_mem_read_8 +ffffffff81604a20 T x86_bus_space_mem_read_multi_1 +ffffffff81604a60 T x86_bus_space_mem_read_multi_2 +ffffffff81604aa0 T x86_bus_space_mem_read_multi_4 +ffffffff81604ae0 T x86_bus_space_mem_read_multi_8 +ffffffff81604b20 T x86_bus_space_mem_read_region_1 +ffffffff81604b50 T x86_bus_space_mem_read_region_2 +ffffffff81604b90 T x86_bus_space_mem_read_region_4 +ffffffff81604bc0 T x86_bus_space_mem_read_region_8 +ffffffff81604c00 T x86_bus_space_mem_write_1 +ffffffff81604c30 T x86_bus_space_mem_write_2 +ffffffff81604c60 T x86_bus_space_mem_write_4 +ffffffff81604c90 T x86_bus_space_mem_write_8 +ffffffff81604cc0 T x86_bus_space_mem_write_multi_1 +ffffffff81604d00 T x86_bus_space_mem_write_multi_2 +ffffffff81604d40 T x86_bus_space_mem_write_multi_4 +ffffffff81604d80 T x86_bus_space_mem_write_multi_8 +ffffffff81604dc0 T x86_bus_space_mem_write_region_1 +ffffffff81604df0 T x86_bus_space_mem_write_region_2 +ffffffff81604e30 T x86_bus_space_mem_write_region_4 +ffffffff81604e60 T x86_bus_space_mem_write_region_8 +ffffffff81604ea0 T x86_bus_space_mem_set_multi_1 +ffffffff81604f20 T x86_bus_space_mem_set_multi_2 +ffffffff81604fb0 T x86_bus_space_mem_set_multi_4 +ffffffff81605030 T x86_bus_space_mem_set_multi_8 +ffffffff816050c0 T x86_bus_space_mem_set_region_1 +ffffffff81605150 T x86_bus_space_mem_set_region_2 +ffffffff816051e0 T x86_bus_space_mem_set_region_4 +ffffffff81605270 T x86_bus_space_mem_set_region_8 +ffffffff81605300 T x86_bus_space_mem_copy_1 +ffffffff81605450 T x86_bus_space_mem_copy_2 +ffffffff816055b0 T x86_bus_space_mem_copy_4 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rasops_wronly_erasecols +ffffffff8161d5a0 T rasops_wronly_copyrows +ffffffff8161d6c0 T rasops_wronly_eraserows +ffffffff8161d790 T rasops_doswitch +ffffffff8161d970 T rasops_init_devcmap +ffffffff8161dbf0 T rasops_mapchar +ffffffff8161dc90 T rasops_copyrows +ffffffff8161de50 T rasops_copycols +ffffffff8161e020 T rasops_erasecols +ffffffff8161e4d0 T rasops_eraserows +ffffffff8161e690 T rasops_cursor +ffffffff8161e740 T rasops_unpack_attr +ffffffff8161e790 T rasops_do_cursor +ffffffff8161e9e0 T rasops_pack_mattr +ffffffff8161ea30 T rasops_pack_cattr +ffffffff8161eab0 T rasops_copycols_rotated +ffffffff8161ee80 T rasops_copyrows_rotated +ffffffff8161f290 T rasops_erasecols_rotated +ffffffff8161f490 T rasops_eraserows_rotated +ffffffff8161f690 T rasops_putchar_rotated +ffffffff8161f820 T rasops_copychar +ffffffff8161f9b0 T rasops_free_screen +ffffffff8161fa40 T rasops_show_screen +ffffffff8161fac0 T rasops_getchar +ffffffff8161fb20 T rasops_scrollback +ffffffff8161fce0 T rasops_add_font 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aq_fw1x_get_stats +ffffffff8171f1c0 T aq_fw2x_reset +ffffffff8171f250 T aq_fw2x_set_mode +ffffffff8171f3f0 T aq_fw2x_get_mode +ffffffff8171f580 T aq_fw2x_get_stats +ffffffff8171f5b0 T aq2_fw_reset +ffffffff8171f740 T aq2_get_mac_addr +ffffffff8171f7f0 T aq2_fw_set_mode +ffffffff8171fa10 T aq2_fw_get_mode +ffffffff8171fae0 T aq2_fw_get_stats +ffffffff8171fb10 T aq_match +ffffffff8171fb40 T aq_attach +ffffffff817207c0 T aq_activate +ffffffff817207f0 T aq_lookup +ffffffff81720870 T aq_intr +ffffffff81720a00 T aq_intr_link +ffffffff81720b00 T aq1_fw_reboot +ffffffff81720d50 T aq2_fw_reboot +ffffffff81721260 T aq_hw_reset +ffffffff817213c0 T aq_init_rss +ffffffff81721730 T aq_hw_init +ffffffff81721a40 T aq_ifmedia_change +ffffffff81721b20 T aq_ifmedia_status +ffffffff81721c20 T aq_ioctl +ffffffff81721e60 T aq_start +ffffffff817221a0 T aq_watchdog +ffffffff817221d0 T aq_set_linkmode +ffffffff81722200 T aq_refill +ffffffff81722270 T aq_intr_queue +ffffffff81722350 T aq_enable_intr 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aq_queue_down +ffffffff81726640 T aq_invalidate_rx_desc_cache +ffffffff817266c0 T aq_up +ffffffff81726b00 T aq_down +ffffffff81726c50 T aq_rxrinfo +ffffffff81726d40 T aq_iff +ffffffff81728000 T tulip_probe +ffffffff81728060 T tulip_attach +ffffffff81728aa0 T tulip_timeout_callback +ffffffff81728af0 T tulip_timeout +ffffffff81728b60 T tulip_txprobe +ffffffff81728ca0 T tulip_txput +ffffffff81729230 T tulip_media_set +ffffffff81729820 T tulip_reset +ffffffff81729be0 T tulip_mii_autonegotiate +ffffffff81729ee0 T tulip_mii_readreg +ffffffff8172a090 T tulip_mii_writereg +ffffffff8172a250 T tulip_linkup +ffffffff8172a320 T tulip_init +ffffffff8172a4a0 T tulip_media_print +ffffffff8172a4f0 T tulip_media_link_monitor +ffffffff8172a760 T tulip_mii_map_abilities +ffffffff8172a7f0 T tulip_media_poll +ffffffff8172ace0 T tulip_mii_phy_readspecific +ffffffff8172aea0 T tulip_media_select +ffffffff8172afb0 T tulip_21040_mediainfo_init +ffffffff8172b0b0 T tulip_21040_media_probe +ffffffff8172b1a0 T tulip_21040_10baset_only_media_probe +ffffffff8172b260 T tulip_21040_10baset_only_media_select +ffffffff8172b2c0 T tulip_21040_auibnc_only_media_probe +ffffffff8172b350 T tulip_21040_auibnc_only_media_select +ffffffff8172b3a0 T tulip_21041_mediainfo_init +ffffffff8172b460 T tulip_21041_media_probe +ffffffff8172b540 T tulip_21041_media_poll +ffffffff8172b860 T tulip_mii_get_phyaddr +ffffffff8172b920 T tulip_2114x_media_preset +ffffffff8172bb40 T tulip_null_media_poll +ffffffff8172bb70 T tulip_21140_mediainit +ffffffff8172bbc0 T tulip_21140_evalboard_media_probe +ffffffff8172bda0 T tulip_21140_accton_media_probe +ffffffff8172bfc0 T tulip_21140_smc9332_media_probe +ffffffff8172c1f0 T tulip_21140_cogent_em100_media_probe +ffffffff8172c360 T tulip_21140_znyx_zx34x_media_probe +ffffffff8172c5a0 T tulip_2114x_media_probe +ffffffff8172c5d0 T tulip_delay_300ns +ffffffff8172c6e0 T tulip_srom_idle +ffffffff8172d080 T tulip_srom_read +ffffffff8172de20 T tulip_mii_writebits +ffffffff8172e3b0 T tulip_mii_turnaround +ffffffff8172eb80 T tulip_mii_readbits +ffffffff8172ef60 T tulip_identify_dec_nic +ffffffff8172f010 T tulip_identify_znyx_nic +ffffffff8172f300 T tulip_identify_smc_nic +ffffffff8172f4e0 T tulip_identify_cogent_nic +ffffffff8172f5d0 T tulip_identify_accton_nic +ffffffff8172f700 T tulip_identify_asante_nic +ffffffff8172f9d0 T tulip_identify_compex_nic +ffffffff8172fb20 T tulip_srom_decode +ffffffff81730770 T tulip_read_macaddr +ffffffff817310f0 T tulip_ifmedia_add +ffffffff817311e0 T tulip_ifmedia_change +ffffffff817313c0 T tulip_ifmedia_status +ffffffff81731430 T tulip_alloc_rxmap +ffffffff81731470 T tulip_free_rxmap +ffffffff817314b0 T tulip_alloc_txmap +ffffffff817314f0 T tulip_free_txmap +ffffffff81731530 T tulip_addr_filter +ffffffff81731840 T tulip_rx_intr +ffffffff81731e50 T tulip_txput_setup +ffffffff817320e0 T tulip_tx_intr +ffffffff81732500 T tulip_print_abnormal_interrupt +ffffffff81732530 T tulip_intr_handler +ffffffff817328e0 T tulip_ifstart +ffffffff817329b0 T tulip_intr_shared +ffffffff81732a20 T tulip_intr_normal +ffffffff81732a70 T tulip_ifioctl +ffffffff81732b60 T tulip_ifwatchdog +ffffffff81732c60 T tulip_busdma_allocmem +ffffffff81732df0 T tulip_busdma_init +ffffffff81733010 T tulip_initcsrs +ffffffff81733110 T tulip_initring +ffffffff81734000 T ep_pci_match +ffffffff81734030 T ep_pci_attach +ffffffff81735000 T pcn_match +ffffffff81735070 T pcn_attach +ffffffff817357e0 T pcn_tick +ffffffff81735830 T pcn_reset +ffffffff817358a0 T pcn_intr +ffffffff81735ae0 T pcn_ioctl +ffffffff81735c40 T pcn_start +ffffffff81736090 T pcn_watchdog +ffffffff81736100 T pcn_txintr +ffffffff817365c0 T pcn_init +ffffffff81736e80 T pcn_stop +ffffffff81737000 T pcn_rxintr +ffffffff81737520 T pcn_spnd +ffffffff81737620 T pcn_add_rxbuf +ffffffff81737810 T pcn_rxdrain +ffffffff817378b0 T pcn_set_filter +ffffffff81737a10 T pcn_79c970_mediainit +ffffffff81737b20 T pcn_79c970_mediachange +ffffffff81737ce0 T pcn_79c970_mediastatus +ffffffff81737d20 T pcn_79c971_mediainit +ffffffff81737df0 T pcn_mii_readreg +ffffffff81737eb0 T pcn_mii_writereg +ffffffff81737f50 T pcn_mii_statchg +ffffffff81737fb0 T pcn_79c971_mediachange +ffffffff81738000 T pcn_79c971_mediastatus +ffffffff81739000 T siop_lookup_product +ffffffff817390a0 T siop_pci_attach_common +ffffffff81739530 T siop_pci_reset +ffffffff8173a000 T siop_pci_match +ffffffff8173a050 T siop_pci_attach +ffffffff8173b000 T sii3114_read_reg +ffffffff8173b060 T sii3114_write_reg +ffffffff8173b0d0 T pdc203xx_read_reg +ffffffff8173b130 T pdc203xx_write_reg +ffffffff8173b1a0 T svwsata_read_reg +ffffffff8173b200 T svwsata_write_reg +ffffffff8173b240 T svwsata_lba48_write_reg +ffffffff8173b280 T pciide_pci_read +ffffffff8173b2d0 T pciide_pci_write +ffffffff8173b340 T default_chip_map +ffffffff8173b990 T artisea_chip_map +ffffffff8173bbf0 T piix_chip_map +ffffffff8173c1e0 T piixsata_chip_map +ffffffff8173c700 T sch_chip_map +ffffffff8173ca20 T amd756_chip_map +ffffffff8173ce30 T ixp_chip_map +ffffffff8173d1a0 T cmd_chip_map +ffffffff8173d300 T cmd0643_9_chip_map +ffffffff8173d600 T cmd680_chip_map +ffffffff8173d7e0 T sii3112_chip_map +ffffffff8173db60 T sii3114_chip_map +ffffffff8173df60 T apollo_chip_map +ffffffff8173e5c0 T sata_chip_map +ffffffff8173e7e0 T cy693_chip_map +ffffffff8173eba0 T sis_chip_map +ffffffff8173f2e0 T natsemi_chip_map +ffffffff8173f740 T ns_scx200_chip_map +ffffffff8173fad0 T acer_chip_map +ffffffff81740150 T hpt_chip_map +ffffffff81740630 T pdc202xx_chip_map +ffffffff81740ff0 T pdcsata_chip_map +ffffffff81741770 T acard_chip_map +ffffffff817419e0 T serverworks_chip_map +ffffffff81741cf0 T svwsata_chip_map +ffffffff817420d0 T nforce_chip_map +ffffffff817424f0 T ite_chip_map +ffffffff817427b0 T jmicron_chip_map +ffffffff81742bc0 T phison_chip_map +ffffffff81742ee0 T rdc_chip_map +ffffffff81743330 T pciide_match +ffffffff817433d0 T pciide_attach +ffffffff817434b0 T pciide_detach +ffffffff81743510 T pciide_activate +ffffffff81743c40 T pciide_lookup_product +ffffffff81743ea0 T pciide_dmacmd_read +ffffffff81743ed0 T pciide_dmacmd_write +ffffffff81743f00 T pciide_dmactl_read +ffffffff81743f30 T pciide_dmactl_write +ffffffff81743f60 T pciide_dmatbl_write +ffffffff81743f90 T pciide_mapregs_compat +ffffffff81744110 T pciide_unmapregs_compat +ffffffff817441a0 T pciide_mapregs_native +ffffffff81744490 T pciide_unmapregs_native +ffffffff81744520 T pciide_mapreg_dma +ffffffff817446b0 T pciide_dma_init +ffffffff81744980 T pciide_dma_start +ffffffff81744a00 T pciide_dma_finish +ffffffff81744bd0 T pciide_unmapreg_dma +ffffffff81744c00 T pciide_intr_flag +ffffffff81744e10 T pciide_compat_intr +ffffffff81744e90 T pciide_pci_intr +ffffffff81744f50 T pciide_channel_dma_setup +ffffffff81745020 T pciide_dma_table_setup +ffffffff81745260 T pciide_irqack +ffffffff817452b0 T pciide_chansetup +ffffffff81745390 T pciide_chanfree +ffffffff817453e0 T pciide_mapchan +ffffffff81745470 T pciide_unmap_chan +ffffffff81745540 T pciide_chan_candisable +ffffffff817455b0 T pciide_map_compat_intr +ffffffff81745650 T pciide_unmap_compat_intr +ffffffff817456b0 T pciide_print_channels +ffffffff81745780 T pciide_print_modes +ffffffff81745790 T default_chip_unmap +ffffffff81745870 T sata_setup_channel +ffffffff81745990 T piix_timing_debug +ffffffff817459c0 T piix_setup_channel +ffffffff81745e50 T piix3_4_setup_channel +ffffffff817465f0 T piix_setup_idetim_timings +ffffffff81746660 T piix_setup_idetim_drvs +ffffffff81746780 T piix_setup_sidetim_timings +ffffffff817467f0 T amd756_setup_channel +ffffffff81746ba0 T apollo_setup_channel +ffffffff81746f20 T cmd_channel_map +ffffffff81747290 T cmd_pci_intr +ffffffff81747390 T cmd646_9_irqack +ffffffff81747490 T cmd0643_9_setup_channel +ffffffff817478b0 T cmd680_setup_channel +ffffffff81747db0 T cmd680_channel_map +ffffffff817480e0 T sii_fixup_cacheline +ffffffff817483b0 T sii3112_setup_channel +ffffffff81748570 T sii3112_drv_probe +ffffffff81748990 T sii3114_mapreg_dma +ffffffff81748c70 T sii3114_chansetup +ffffffff81748d40 T sii3114_mapchan +ffffffff81749060 T sii3114_dmacmd_read +ffffffff817490a0 T sii3114_dmacmd_write +ffffffff817490e0 T sii3114_dmactl_read +ffffffff81749120 T sii3114_dmactl_write +ffffffff81749160 T sii3114_dmatbl_write +ffffffff817491a0 T cy693_setup_channel +ffffffff817493c0 T sis_hostbr_match +ffffffff81749490 T sis_south_match +ffffffff817494d0 T sis_setup_channel +ffffffff81749810 T sis96x_setup_channel +ffffffff81749af0 T natsemi_irqack +ffffffff81749b90 T natsemi_setup_channel +ffffffff81749f80 T natsemi_pci_intr +ffffffff8174a080 T ns_scx200_setup_channel +ffffffff8174a380 T acer_dma_init +ffffffff8174a3c0 T acer_setup_channel +ffffffff8174a7c0 T acer_pci_intr +ffffffff8174a8b0 T hpt_setup_channel +ffffffff8174ac00 T hpt_pci_intr +ffffffff8174ad10 T pdc268_config_read +ffffffff8174ad80 T pdc20268_setup_channel +ffffffff8174af50 T pdc202xx_setup_channel +ffffffff8174b3a0 T pdc20262_dma_start +ffffffff8174b510 T pdc20262_dma_finish +ffffffff8174b5e0 T pdc20265_pci_intr +ffffffff8174b790 T pdc202xx_pci_intr +ffffffff8174b8a0 T pdc203xx_pci_intr +ffffffff8174b990 T pdc205xx_pci_intr +ffffffff8174bac0 T pdc203xx_irqack +ffffffff8174bb50 T pdc203xx_setup_channel +ffffffff8174bc50 T pdc205xx_do_reset +ffffffff8174bcf0 T pdc205xx_drv_probe +ffffffff8174bf70 T pdc203xx_dma_start +ffffffff8174c030 T pdc203xx_dma_finish +ffffffff8174c120 T serverworks_setup_channel +ffffffff8174c550 T serverworks_pci_intr +ffffffff8174c660 T svwsata_mapreg_dma +ffffffff8174c710 T svwsata_drv_probe +ffffffff8174c9f0 T svwsata_mapchan +ffffffff8174cae0 T svwsata_dmacmd_read +ffffffff8174cb10 T svwsata_dmacmd_write +ffffffff8174cb40 T svwsata_dmactl_read +ffffffff8174cb70 T svwsata_dmactl_write +ffffffff8174cba0 T svwsata_dmatbl_write +ffffffff8174cbd0 T acard_setup_channel +ffffffff8174cff0 T nforce_setup_channel +ffffffff8174d340 T nforce_pci_intr +ffffffff8174d430 T ite_setup_channel +ffffffff8174d7b0 T ixp_setup_channel +ffffffff8174db50 T jmicron_setup_channel +ffffffff8174ddb0 T phison_setup_channel +ffffffff8174dfc0 T sch_setup_channel +ffffffff8174e1c0 T rdc_setup_channel +ffffffff8174f000 T ppbmatch +ffffffff8174f050 T ppbattach +ffffffff8174f7d0 T ppbdetach +ffffffff8174f8f0 T ppbactivate +ffffffff8174fd70 T ppb_alloc_busrange +ffffffff8174ff20 T ppb_hotplug_insert +ffffffff8174ff80 T ppb_hotplug_rescan +ffffffff8174ffc0 T ppb_hotplug_remove +ffffffff81750120 T ppb_hotplug_insert_finish +ffffffff81750150 T ppb_intr +ffffffff81750210 T ppb_alloc_resources +ffffffff81750920 T ppbprint +ffffffff81751000 T cy_pci_match +ffffffff81751030 T cy_pci_attach +ffffffff81752000 T rl_pci_match +ffffffff81752060 T rl_pci_attach +ffffffff81752220 T rl_pci_detach +ffffffff81753000 T re_pci_probe +ffffffff817530a0 T re_pci_attach +ffffffff817533d0 T re_pci_detach +ffffffff81753490 T re_pci_activate +ffffffff81754000 T vr_probe +ffffffff817540f0 T vr_attach +ffffffff81754880 T vr_activate +ffffffff81754900 T vr_mii_readreg +ffffffff81754a70 T vr_mii_writereg +ffffffff81754bd0 T vr_miibus_readreg +ffffffff81754c40 T vr_miibus_writereg +ffffffff81754ca0 T vr_miibus_statchg +ffffffff81754cc0 T vr_setcfg +ffffffff81754ee0 T vr_iff +ffffffff81755060 T vr_reset +ffffffff81755170 T vr_quirks +ffffffff81755270 T vr_dmamem_alloc +ffffffff817553d0 T vr_dmamem_free +ffffffff81755440 T vr_intr +ffffffff81755670 T vr_chipinit +ffffffff81755750 T vr_ioctl +ffffffff817558f0 T vr_start +ffffffff81755ac0 T vr_watchdog +ffffffff81755b50 T vr_wol +ffffffff81755d00 T vr_ifmedia_upd +ffffffff81755d50 T vr_ifmedia_sts +ffffffff81755db0 T vr_tick +ffffffff81755e30 T vr_rxtick +ffffffff81755f10 T vr_stop +ffffffff817561a0 T vr_init +ffffffff81756740 T vr_list_tx_init +ffffffff81756840 T vr_list_rx_init +ffffffff81756a00 T vr_fill_rx_ring +ffffffff81756ad0 T vr_alloc_mbuf +ffffffff81756c40 T vr_rxeof +ffffffff81756ec0 T vr_rxeoc +ffffffff81757050 T vr_txeof +ffffffff81757210 T vr_encap +ffffffff81758000 T txp_probe +ffffffff81758030 T txp_attach +ffffffff817581a0 T txp_attachhook +ffffffff817584d0 T txp_chip_init +ffffffff81758690 T txp_download_fw +ffffffff81758b30 T txp_alloc_rings +ffffffff81759970 T txp_command +ffffffff81759a40 T txp_ifmedia_upd +ffffffff81759b50 T txp_ifmedia_sts +ffffffff81759e40 T txp_ioctl +ffffffff81759f60 T txp_start +ffffffff8175a320 T txp_watchdog +ffffffff8175a350 T txp_capabilities +ffffffff8175a500 T txp_tick +ffffffff8175a650 T txp_intr +ffffffff8175a8c0 T txp_reset_adapter +ffffffff8175a9c0 T txp_download_fw_wait +ffffffff8175aab0 T txp_download_fw_section +ffffffff8175ae20 T txp_dma_malloc +ffffffff8175afc0 T txp_dma_free +ffffffff8175b040 T txp_rx_reclaim +ffffffff8175b320 T txp_rxbuf_reclaim +ffffffff8175b5a0 T txp_tx_reclaim +ffffffff8175b750 T txp_init +ffffffff8175b890 T txp_stop +ffffffff8175b990 T txp_set_filter +ffffffff8175bb20 T txp_command2 +ffffffff8175be10 T txp_cmd_desc_numfree +ffffffff8175be70 T txp_response +ffffffff8175c140 T txp_rsp_fixup +ffffffff8175c230 T txp_show_descriptor +ffffffff8175d000 T init_audio_devices +ffffffff8175d120 T init_BTSC +ffffffff8175d1e0 T set_audio +ffffffff8175d570 T set_bctv_audio +ffffffff8175d8b0 T msp_autodetect +ffffffff8175dce0 T temp_mute +ffffffff8175dd80 T set_BTSC +ffffffff8175dda0 T bctv_gpio_write +ffffffff8175df10 T msp_read_id +ffffffff8175dfd0 T dpl_read_id +ffffffff8175e090 T dpl_autodetect +ffffffff8175f000 T writeEEProm +ffffffff8175f030 T readEEProm +ffffffff8175f100 T signCard +ffffffff8175f1b0 T probeCard +ffffffff81761000 T bktr_name +ffffffff81761030 T common_bktr_attach +ffffffff81761330 T common_bktr_intr +ffffffff81761950 T video_open +ffffffff81761e10 t set_fps +ffffffff81761f50 T vbi_open +ffffffff81761ff0 T tuner_open +ffffffff81762040 T video_close +ffffffff81762130 T tuner_close +ffffffff81762160 T vbi_close +ffffffff81762190 T video_read +ffffffff81762350 t start_capture +ffffffff81765290 T vbi_read +ffffffff817653b0 T video_ioctl +ffffffff81766850 T bktr_common_ioctl +ffffffff81767020 T tuner_ioctl +ffffffff81767f70 T i2cWrite +ffffffff81768090 T i2cRead +ffffffff817681b0 T msp_dpl_read +ffffffff81768480 T msp_dpl_write +ffffffff81768640 T msp_dpl_reset +ffffffff81768940 t i2c_write_byte +ffffffff81768b20 t i2c_read_byte +ffffffff81768d40 t split +ffffffff81768f40 t getline +ffffffff8176a000 t bktr_probe +ffffffff8176a060 t bktr_attach +ffffffff8176a2e0 T bktr_get_info +ffffffff8176a3c0 T bktr_set_info +ffffffff8176a520 T get_bktr_mem +ffffffff8176a750 T free_bktr_mem +ffffffff8176a7b0 T bktropen +ffffffff8176a870 T bktrclose +ffffffff8176a900 T bktrread +ffffffff8176a990 T bktrwrite +ffffffff8176a9c0 T bktrioctl +ffffffff8176aa70 T bktrmmap +ffffffff8176ab10 t bktr_intr +ffffffff8176b000 T select_tuner +ffffffff8176b050 T tv_freq +ffffffff8176b2a0 T do_afc +ffffffff8176b3d0 T get_tuner_status +ffffffff8176b3f0 T tv_channel +ffffffff8176b4b0 T tuner_getchnlset +ffffffff8176c000 T xl_pci_match +ffffffff8176c030 T xl_pci_attach +ffffffff8176c390 T xl_pci_detach +ffffffff8176c420 T xl_pci_wol_power +ffffffff8176c470 T xl_pci_intr_ack +ffffffff8176d000 T fxp_pci_match +ffffffff8176d030 T fxp_pci_attach +ffffffff8176d360 T fxp_pci_detach +ffffffff8176e000 T em_probe +ffffffff8176e030 T em_attach +ffffffff8176e530 T em_detach +ffffffff8176e5c0 T em_activate +ffffffff8176e640 T em_defer_attach +ffffffff8176e6e0 T em_stop +ffffffff8176e7d0 T em_free_pci_resources +ffffffff8176ea90 T em_setup_interface +ffffffff8176ec80 T em_update_link_status +ffffffff8176ee70 T em_local_timer +ffffffff8176ef20 T em_82547_move_tail +ffffffff8176ef60 T em_identify_hardware +ffffffff8176f070 T em_allocate_pci_resources +ffffffff8176f470 T em_allocate_desc_rings +ffffffff8176f580 T em_hardware_init +ffffffff8176f820 T em_kstat_attach +ffffffff8176f970 T em_start +ffffffff8176fc60 T em_encap +ffffffff81770140 T em_82547_move_tail_locked +ffffffff81770370 T em_82547_update_fifo_head +ffffffff817703c0 T em_ioctl +ffffffff817706b0 T em_init +ffffffff81770a10 T em_get_sffpage +ffffffff81770ad0 T em_disable_intr +ffffffff81770bd0 T em_iff +ffffffff81770ee0 T em_initialize_receive_unit +ffffffff81771670 T em_enable_intr +ffffffff817717d0 T em_watchdog +ffffffff81771980 T em_enable_hw_vlans +ffffffff81771a20 T em_setup_transmit_structures +ffffffff81771c20 T em_initialize_transmit_unit +ffffffff81772240 T em_setup_receive_structures +ffffffff81772380 T em_setup_queues_msix +ffffffff81772a40 T em_intr +ffffffff81772b40 T em_txeof +ffffffff81772d10 T em_rxeof +ffffffff817731d0 T em_rxrefill +ffffffff817732e0 T em_media_status +ffffffff81773520 T em_flowstatus +ffffffff81773630 T em_media_change +ffffffff81773790 T em_tx_ctx_setup +ffffffff81773920 T em_transmit_checksum_setup +ffffffff81773a00 T em_fill_descriptors +ffffffff81773a80 T em_82547_fifo_workaround +ffffffff81773af0 T em_82547_tx_fifo_reset +ffffffff81773f60 T em_pci_clear_mwi +ffffffff81773f90 T em_pci_set_mwi +ffffffff81773fc0 T em_smartspeed +ffffffff817741c0 T em_kstat_read +ffffffff817745e0 T em_flush_desc_rings +ffffffff81774710 T em_free_transmit_structures +ffffffff817748e0 T em_free_receive_structures +ffffffff81774af0 T em_legacy_irq_quirk_spt +ffffffff81774bd0 T em_allocate_msix +ffffffff81774de0 T em_allocate_legacy +ffffffff81774f00 T em_dma_free +ffffffff81774f70 T em_disable_aspm +ffffffff81775040 T em_dma_malloc +ffffffff817751d0 T em_allocate_transmit_structures +ffffffff817752c0 T em_get_buf +ffffffff81775420 T em_allocate_receive_structures +ffffffff817755f0 T em_rxfill +ffffffff81775740 T em_tbi_adjust_stats +ffffffff81775910 T em_receive_checksum +ffffffff81775980 T em_write_pci_cfg +ffffffff81775a00 T em_read_pci_cfg +ffffffff81775a70 T em_read_pcie_cap_reg +ffffffff81775aa0 T em_flush_tx_ring +ffffffff81775c10 T em_flush_rx_ring +ffffffff81775dd0 T em_queue_intr_msix +ffffffff81775e80 T em_link_intr_msix +ffffffff81775fb0 T em_enable_queue_intr_msix +ffffffff81777000 T em_set_mac_type +ffffffff81777a00 T em_set_sfp_media_type_82575 +ffffffff81777d50 T em_translate_82542_register +ffffffff81777f80 T em_read_sfp_data_byte +ffffffff81778070 T em_set_media_type +ffffffff817782e0 T em_reset_hw +ffffffff81778eb0 T em_disable_pciex_master +ffffffff81778f80 T em_check_phy_reset_block +ffffffff81779040 T em_gate_hw_phy_config_ich8lan +ffffffff817790e0 t em_get_software_flag +ffffffff81779260 T em_hv_phy_workarounds_ich8lan +ffffffff817795f0 T em_lv_phy_workarounds_ich8lan +ffffffff817796f0 t em_phy_init_script +ffffffff81779960 T em_read_eeprom +ffffffff8177a040 T em_set_eee_i350 +ffffffff8177a160 T em_init_hw +ffffffff8177be00 T em_phy_reset +ffffffff8177c040 T em_clear_vfta_i350 +ffffffff8177c220 T em_read_phy_reg +ffffffff8177c3c0 T em_setup_link +ffffffff8177ec60 T em_enable_tx_pkt_filtering +ffffffff8177f030 T em_clear_hw_cntrs +ffffffff8177f920 T em_write_phy_reg +ffffffff8177fab0 T em_power_up_serdes_link_82575 +ffffffff8177fba0 T em_copper_link_autoneg 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em_swfw_sync_release +ffffffff817831f0 T em_sgmii_uses_mdio_82575 +ffffffff81783250 T em_read_phy_reg_i2c +ffffffff81783330 T em_write_phy_reg_i2c +ffffffff81783410 T em_phy_hw_reset +ffffffff81783a50 T em_oem_bits_config_pchlan +ffffffff81783c30 T em_initialize_M88E1512_phy +ffffffff81783df0 T em_init_eeprom_params +ffffffff81784330 T em_get_flash_presence_i210 +ffffffff81784390 t em_acquire_eeprom +ffffffff81784580 t em_read_eeprom_ich8 +ffffffff81784750 t em_release_eeprom +ffffffff817848c0 t em_standby_eeprom +ffffffff81784ab0 t em_shift_out_ee_bits +ffffffff81784c50 t em_shift_in_ee_bits +ffffffff81784d90 T em_validate_eeprom_checksum +ffffffff81784f40 T em_write_eeprom +ffffffff817854f0 T em_update_eeprom_checksum +ffffffff81785610 t em_commit_shadow_ram +ffffffff81785b90 T em_read_part_num +ffffffff81785c30 T em_read_mac_addr +ffffffff81785db0 T em_mc_addr_list_update +ffffffff81785ec0 T em_hash_mc_addr +ffffffff81785fc0 T em_mta_set +ffffffff81786130 T em_rar_set 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ixgb_free_transmit_structures +ffffffff8178c5c0 T ixgb_free_receive_structures +ffffffff8178c6f0 T ixgb_allocate_transmit_structures +ffffffff8178c770 T ixgb_transmit_checksum_setup +ffffffff8178c870 T ixgb_get_buf +ffffffff8178ca20 T ixgb_allocate_receive_structures +ffffffff8178cbe0 T ixgb_receive_checksum +ffffffff8178cc40 T ixgb_write_pci_cfg +ffffffff8178d000 T ixgb_validate_eeprom_checksum +ffffffff8178d080 T ixgb_read_eeprom +ffffffff8178d2f0 T ixgb_update_eeprom_checksum +ffffffff8178d360 T ixgb_write_eeprom +ffffffff8178d820 t ixgb_shift_out_bits +ffffffff8178d960 T ixgb_get_eeprom_data +ffffffff8178da00 T ixgb_get_eeprom_word +ffffffff8178dae0 T ixgb_get_ee_mac_addr +ffffffff8178dbd0 T ixgb_get_ee_pba_number +ffffffff8178dc90 T ixgb_get_ee_device_id +ffffffff8178e000 T ixgb_mac_reset +ffffffff8178e1e0 T ixgb_adapter_stop +ffffffff8178e320 T ixgb_init_hw +ffffffff8178e630 T ixgb_init_rx_addrs +ffffffff8178e760 T mac_addr_valid +ffffffff8178e7c0 T ixgb_clear_vfta +ffffffff8178e840 T ixgb_clear_hw_cntrs +ffffffff8178ef20 T ixgb_setup_fc +ffffffff8178f0b0 T ixgb_check_for_link +ffffffff8178f2c0 T ixgb_rar_set +ffffffff8178f330 T ixgb_mc_addr_list_update +ffffffff8178f5b0 T ixgb_write_vfta +ffffffff8178f5e0 T ixgb_read_phy_reg +ffffffff8178fae0 T ixgb_write_phy_reg +ffffffff8178ffd0 T ixgb_check_for_bad_link +ffffffff81790090 T ixgb_led_on +ffffffff817900e0 T ixgb_led_off +ffffffff81791000 T ixgbe_probe +ffffffff81791030 T ixgbe_attach +ffffffff817915a0 T ixgbe_detach +ffffffff817917c0 T ixgbe_activate +ffffffff817918d0 T ixgbe_identify_hardware +ffffffff81791990 T ixgbe_allocate_pci_resources +ffffffff81791ae0 T ixgbe_allocate_queues +ffffffff81791fe0 T ixgbe_allocate_msix +ffffffff81792220 T ixgbe_allocate_legacy +ffffffff81792340 T ixgbe_setup_interface +ffffffff817926a0 T ixgbe_free_transmit_structures +ffffffff81792720 T ixgbe_free_receive_structures +ffffffff817927e0 T ixgbe_free_pci_resources +ffffffff817928c0 T ixgbe_stop +ffffffff81792be0 T ixgbe_init +ffffffff81793820 T ixgbe_start +ffffffff81793a00 T ixgbe_encap +ffffffff81793e30 T ixgbe_ioctl +ffffffff81794190 T ixgbe_rxrinfo +ffffffff817942f0 T ixgbe_get_sffpage +ffffffff817944a0 T ixgbe_disable_intr +ffffffff81794570 T ixgbe_iff +ffffffff817946e0 T ixgbe_enable_intr +ffffffff817947f0 T ixgbe_enable_queues +ffffffff81794900 T ixgbe_watchdog +ffffffff81794b10 T ixgbe_setup_transmit_structures +ffffffff81794bf0 T ixgbe_initialize_transmit_units +ffffffff81794ec0 T ixgbe_setup_receive_structures +ffffffff81794ff0 T ixgbe_initialize_receive_units +ffffffff817954d0 T ixgbe_config_gpie +ffffffff817955a0 T ixgbe_setup_vlan_hw_support +ffffffff81795710 T ixgbe_configure_ivars +ffffffff817958c0 T ixgbe_set_ivar +ffffffff81795a90 T ixgbe_config_link +ffffffff81795c30 T ixgbe_config_delay_values +ffffffff81795d50 t ix_kstats_tick +ffffffff81795e20 T ixgbe_enable_queue +ffffffff81795ef0 T ixgbe_disable_queue +ffffffff81795fc0 T ixgbe_link_intr +ffffffff81795fd0 T ixgbe_intr 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ixgbe_map_queue_statistics +ffffffff81798860 T ixgbe_free_receive_buffers +ffffffff817989a0 T ixgbe_rx_checksum +ffffffff817989f0 T ixgbe_read_pci_cfg +ffffffff81798a50 T ixgbe_write_pci_cfg +ffffffff81798ad0 t ix_kstats_read +ffffffff81798c90 t ix_rxq_kstats_read +ffffffff81798df0 t ix_txq_kstats_read +ffffffff81799000 T ixgbe_init_ops_generic +ffffffff81799270 T ixgbe_init_eeprom_params_generic +ffffffff81799320 T ixgbe_read_eerd_generic +ffffffff81799420 T ixgbe_read_eeprom_bit_bang_generic +ffffffff817996c0 T ixgbe_write_eeprom_generic +ffffffff81799b10 T ixgbe_validate_eeprom_checksum_generic +ffffffff81799bc0 T ixgbe_update_eeprom_checksum_generic +ffffffff81799c40 T ixgbe_calc_eeprom_checksum_generic +ffffffff81799de0 T ixgbe_init_hw_generic +ffffffff81799e40 T ixgbe_start_hw_generic +ffffffff81799f60 T ixgbe_clear_hw_cntrs_generic +ffffffff8179a940 T ixgbe_enable_rx_dma_generic +ffffffff8179a9a0 T ixgbe_get_mac_addr_generic +ffffffff8179aa30 T ixgbe_stop_adapter_generic +ffffffff8179abb0 T ixgbe_get_bus_info_generic +ffffffff8179ac60 T ixgbe_set_lan_id_multi_port_pcie +ffffffff8179ad30 T ixgbe_acquire_swfw_sync +ffffffff8179af60 T ixgbe_release_swfw_sync +ffffffff8179b010 T prot_autoc_read_generic +ffffffff8179b070 T prot_autoc_write_generic +ffffffff8179b0c0 T ixgbe_led_on_generic +ffffffff8179b180 T ixgbe_led_off_generic +ffffffff8179b230 T ixgbe_blink_led_start_generic +ffffffff8179b3a0 T ixgbe_blink_led_stop_generic +ffffffff8179b4c0 T ixgbe_set_rar_generic +ffffffff8179b5e0 T ixgbe_clear_rar_generic +ffffffff8179b6e0 T ixgbe_init_rx_addrs_generic +ffffffff8179b8e0 T ixgbe_update_mc_addr_list_generic +ffffffff8179bae0 T ixgbe_enable_mc_generic +ffffffff8179bb50 T ixgbe_disable_mc_generic +ffffffff8179bbb0 T ixgbe_enable_rx_generic +ffffffff8179bc70 T ixgbe_disable_rx_generic +ffffffff8179bd50 T ixgbe_fc_enable_generic +ffffffff8179c180 T ixgbe_setup_fc_generic +ffffffff8179c450 T ixgbe_fc_autoneg +ffffffff8179c620 T ixgbe_device_supports_autoneg_fc +ffffffff8179c720 T ixgbe_start_hw_gen2 +ffffffff8179c900 T ixgbe_identify_phy +ffffffff8179c960 T ixgbe_set_pci_config_data_generic +ffffffff8179c9e0 T ixgbe_disable_rx +ffffffff8179ca20 T ixgbe_disable_pcie_master +ffffffff8179cb70 T ixgbe_read_eerd_buffer_generic +ffffffff8179ccb0 T ixgbe_poll_eerd_eewr_done +ffffffff8179cd50 T ixgbe_write_eewr_buffer_generic +ffffffff8179ced0 T ixgbe_write_eewr_generic +ffffffff8179cf20 T ixgbe_acquire_eeprom +ffffffff8179d0a0 T ixgbe_get_eeprom_semaphore +ffffffff8179d2b0 T ixgbe_release_eeprom_semaphore +ffffffff8179d320 T ixgbe_ready_eeprom +ffffffff8179d490 T ixgbe_shift_out_eeprom_bits +ffffffff8179d650 T ixgbe_shift_in_eeprom_bits +ffffffff8179d7b0 T ixgbe_standby_eeprom +ffffffff8179d890 T ixgbe_raise_eeprom_clk +ffffffff8179d900 T ixgbe_lower_eeprom_clk +ffffffff8179d970 T ixgbe_release_eeprom +ffffffff8179da50 T ixgbe_validate_mac_addr +ffffffff8179dab0 T ixgbe_init_uta_tables +ffffffff8179daf0 T ixgbe_add_uc_addr +ffffffff8179db60 T ixgbe_mta_vector +ffffffff8179dc10 T ixgbe_set_mta +ffffffff8179dcd0 T ixgbe_negotiate_fc +ffffffff8179dd80 T ixgbe_fc_autoneg_fiber +ffffffff8179deb0 T ixgbe_fc_autoneg_backplane +ffffffff8179e010 T ixgbe_fc_autoneg_copper +ffffffff8179e140 T ixgbe_disable_sec_rx_path_generic +ffffffff8179e200 T ixgbe_enable_sec_rx_path_generic +ffffffff8179e290 T ixgbe_enable_rx +ffffffff8179e2d0 T ixgbe_get_pcie_msix_count_generic +ffffffff8179e350 T ixgbe_insert_mac_addr_generic +ffffffff8179e560 T ixgbe_set_vmdq +ffffffff8179e5a0 T ixgbe_set_rar +ffffffff8179e5f0 T ixgbe_clear_vmdq +ffffffff8179e630 T ixgbe_clear_vmdq_generic +ffffffff8179e7d0 T ixgbe_set_vmdq_generic +ffffffff8179e880 T ixgbe_init_uta_tables_generic +ffffffff8179e900 T ixgbe_find_vlvf_slot +ffffffff8179e9c0 T ixgbe_set_vfta_generic +ffffffff8179ead0 T ixgbe_set_vlvf_generic +ffffffff8179ed60 T ixgbe_clear_vfta_generic +ffffffff8179ee60 T ixgbe_need_crosstalk_fix +ffffffff8179eeb0 T ixgbe_check_mac_link_generic +ffffffff8179f0a0 T ixgbe_get_device_caps_generic +ffffffff8179f0f0 T ixgbe_calculate_checksum +ffffffff8179f1b0 T ixgbe_hic_unlocked +ffffffff8179f390 T ixgbe_host_interface_command +ffffffff8179f560 T ixgbe_clear_tx_pending +ffffffff8179f750 T ixgbe_mng_present +ffffffff8179f7c0 T ixgbe_mng_enabled +ffffffff8179f880 T ixgbe_setup_mac_link_multispeed_fiber +ffffffff8179fc40 T ixgbe_flap_tx_laser +ffffffff8179fc80 T ixgbe_check_link +ffffffff8179fcd0 T ixgbe_set_soft_rate_select_speed +ffffffff8179fdc0 T ixgbe_init_shared_code +ffffffff8179fe70 T ixgbe_set_mac_type +ffffffff817a0030 T ixgbe_init_hw +ffffffff817a0070 T ixgbe_get_media_type +ffffffff817a00b0 T ixgbe_read_mbx +ffffffff817a0110 T ixgbe_write_mbx +ffffffff817a0160 T ixgbe_check_for_msg +ffffffff817a01a0 T ixgbe_check_for_ack +ffffffff817a01e0 T ixgbe_check_for_rst +ffffffff817a0220 T ixgbe_poll_for_msg +ffffffff817a02e0 T ixgbe_poll_for_ack +ffffffff817a03a0 T ixgbe_read_posted_mbx +ffffffff817a0480 T ixgbe_write_posted_mbx +ffffffff817a0550 T ixgbe_init_mbx_ops_generic +ffffffff817a0590 T ixgbe_read_v2p_mailbox +ffffffff817a0600 T ixgbe_check_for_bit_pf +ffffffff817a0690 T ixgbe_check_for_msg_pf +ffffffff817a0740 T ixgbe_check_for_ack_pf +ffffffff817a07e0 T ixgbe_check_for_rst_pf +ffffffff817a08e0 T ixgbe_obtain_mbx_lock_pf +ffffffff817a0970 T ixgbe_write_mbx_pf +ffffffff817a0b40 T ixgbe_read_mbx_pf +ffffffff817a0c50 T ixgbe_init_mbx_params_pf +ffffffff817a1000 T ixgbe_set_pcie_completion_timeout +ffffffff817a1090 T ixgbe_init_ops_82598 +ffffffff817a11e0 T ixgbe_init_phy_ops_82598 +ffffffff817a12d0 T ixgbe_start_hw_82598 +ffffffff817a1480 T ixgbe_reset_hw_82598 +ffffffff817a1950 T ixgbe_get_media_type_82598 +ffffffff817a1a20 T ixgbe_get_supported_physical_layer_82598 +ffffffff817a1bf0 T ixgbe_read_analog_reg8_82598 +ffffffff817a1cb0 T ixgbe_write_analog_reg8_82598 +ffffffff817a1d30 T ixgbe_set_lan_id_multi_port_pcie_82598 +ffffffff817a1dd0 T ixgbe_enable_rx_dma_82598 +ffffffff817a1e20 T ixgbe_set_vmdq_82598 +ffffffff817a1ed0 T ixgbe_clear_vmdq_82598 +ffffffff817a1f80 T ixgbe_set_vfta_82598 +ffffffff817a20b0 T ixgbe_clear_vfta_82598 +ffffffff817a2260 T ixgbe_fc_enable_82598 +ffffffff817a26c0 T ixgbe_read_i2c_eeprom_82598 +ffffffff817a26e0 T ixgbe_check_mac_link_82598 +ffffffff817a2980 T ixgbe_setup_mac_link_82598 +ffffffff817a2b40 T ixgbe_get_link_capabilities_82598 +ffffffff817a2c10 T ixgbe_setup_copper_link_82598 +ffffffff817a2d20 T ixgbe_start_mac_link_82598 +ffffffff817a2e40 T ixgbe_validate_link_ready +ffffffff817a2ef0 T ixgbe_read_i2c_phy_82598 +ffffffff817a4000 T ixgbe_init_mac_link_ops_82599 +ffffffff817a4190 T ixgbe_disable_tx_laser_multispeed_fiber +ffffffff817a4260 T ixgbe_enable_tx_laser_multispeed_fiber +ffffffff817a42e0 T ixgbe_flap_tx_laser_multispeed_fiber +ffffffff817a4420 T ixgbe_setup_mac_link_82599 +ffffffff817a46b0 T ixgbe_set_hard_rate_select_speed +ffffffff817a4770 T ixgbe_verify_lesm_fw_enabled_82599 +ffffffff817a4830 T ixgbe_setup_mac_link_smartspeed +ffffffff817a4bb0 T ixgbe_init_phy_ops_82599 +ffffffff817a4d00 T ixgbe_read_i2c_byte_82599 +ffffffff817a4e80 T ixgbe_write_i2c_byte_82599 +ffffffff817a5000 T ixgbe_setup_copper_link_82599 +ffffffff817a5060 T ixgbe_setup_sfp_modules_82599 +ffffffff817a5220 T prot_autoc_read_82599 +ffffffff817a5330 T prot_autoc_write_82599 +ffffffff817a54a0 T ixgbe_reset_pipeline_82599 +ffffffff817a57e0 T ixgbe_init_ops_82599 +ffffffff817a59c0 T ixgbe_identify_phy_82599 +ffffffff817a5a50 T ixgbe_reset_hw_82599 +ffffffff817a5fa0 T ixgbe_get_media_type_82599 +ffffffff817a60d0 T ixgbe_get_supported_physical_layer_82599 +ffffffff817a62a0 T ixgbe_enable_rx_dma_82599 +ffffffff817a6310 T ixgbe_read_analog_reg8_82599 +ffffffff817a63d0 T ixgbe_write_analog_reg8_82599 +ffffffff817a6450 T ixgbe_start_hw_82599 +ffffffff817a6550 T ixgbe_get_link_capabilities_82599 +ffffffff817a6690 T ixgbe_stop_mac_link_on_d3_82599 +ffffffff817a6750 T ixgbe_read_eeprom_82599 +ffffffff817a6780 T ixgbe_start_mac_link_82599 +ffffffff817a6960 T ixgbe_verify_fw_version_82599 +ffffffff817a7000 T ixgbe_init_ops_X540 +ffffffff817a7220 T ixgbe_init_eeprom_params_X540 +ffffffff817a72b0 T ixgbe_read_eerd_X540 +ffffffff817a7340 T ixgbe_write_eewr_X540 +ffffffff817a73d0 T ixgbe_update_eeprom_checksum_X540 +ffffffff817a74a0 T ixgbe_validate_eeprom_checksum_X540 +ffffffff817a7590 T ixgbe_calc_eeprom_checksum_X540 +ffffffff817a7730 T ixgbe_reset_hw_X540 +ffffffff817a7ac0 T ixgbe_get_media_type_X540 +ffffffff817a7af0 T ixgbe_get_supported_physical_layer_X540 +ffffffff817a7b70 T ixgbe_start_hw_X540 +ffffffff817a7bc0 T ixgbe_acquire_swfw_sync_X540 +ffffffff817a8010 T ixgbe_release_swfw_sync_X540 +ffffffff817a8140 T ixgbe_init_swfw_sync_X540 +ffffffff817a8220 T ixgbe_setup_mac_link_X540 +ffffffff817a8240 T ixgbe_blink_led_start_X540 +ffffffff817a8360 T ixgbe_blink_led_stop_X540 +ffffffff817a8460 T ixgbe_get_link_capabilities_X540 +ffffffff817a84a0 T ixgbe_update_flash_X540 +ffffffff817a8680 T ixgbe_poll_flash_update_done_X540 +ffffffff817a8710 T ixgbe_get_swfw_sync_semaphore +ffffffff817a88a0 T ixgbe_release_swfw_sync_semaphore +ffffffff817a9000 T ixgbe_init_ops_X550 +ffffffff817a9110 T ixgbe_dmac_config_X550 +ffffffff817a91f0 T ixgbe_dmac_config_tcs_X550 +ffffffff817a9340 T ixgbe_dmac_update_tcs_X550 +ffffffff817a9400 T ixgbe_set_source_address_pruning_X550 +ffffffff817a94f0 T ixgbe_init_eeprom_params_X550 +ffffffff817a9570 T ixgbe_calc_eeprom_checksum_X550 +ffffffff817a9590 T ixgbe_read_ee_hostif_X550 +ffffffff817a9660 T ixgbe_write_ee_hostif_X550 +ffffffff817a9720 T ixgbe_update_eeprom_checksum_X550 +ffffffff817a98b0 T ixgbe_validate_eeprom_checksum_X550 +ffffffff817a9a00 T ixgbe_disable_rx_x550 +ffffffff817a9b20 T ixgbe_led_on_t_X550em +ffffffff817a9be0 T ixgbe_led_off_t_X550em +ffffffff817a9ca0 T ixgbe_read_cs4227 +ffffffff817a9cd0 T ixgbe_write_cs4227 +ffffffff817a9d00 T ixgbe_read_pe +ffffffff817a9d50 T ixgbe_write_pe +ffffffff817a9db0 T ixgbe_reset_cs4227 +ffffffff817aa040 T ixgbe_check_cs4227 +ffffffff817aa1f0 T ixgbe_setup_mux_ctl +ffffffff817aa280 T ixgbe_identify_phy_x550em +ffffffff817aa4a0 T ixgbe_read_mng_if_sel_x550em +ffffffff817aa520 T ixgbe_fw_phy_activity +ffffffff817aa640 T ixgbe_get_phy_id_fw +ffffffff817aa750 T ixgbe_identify_phy_fw +ffffffff817aa7a0 T ixgbe_shutdown_fw_phy +ffffffff817aa800 T ixgbe_read_phy_reg_x550em +ffffffff817aa830 T ixgbe_write_phy_reg_x550em +ffffffff817aa860 T ixgbe_init_ops_X550EM +ffffffff817aab10 T ixgbe_get_bus_info_X550em +ffffffff817aab60 T ixgbe_get_media_type_X550em +ffffffff817aac50 T ixgbe_setup_sfp_modules_X550em +ffffffff817aade0 T ixgbe_get_link_capabilities_X550em +ffffffff817aaeb0 T ixgbe_reset_hw_X550em +ffffffff817ab530 T ixgbe_get_supported_physical_layer_X550em +ffffffff817ab6b0 T ixgbe_setup_fc_X550em +ffffffff817ab810 T ixgbe_init_phy_ops_X550em +ffffffff817abce0 T ixgbe_setup_fw_link +ffffffff817abe10 T ixgbe_fc_autoneg_fw +ffffffff817abe40 T ixgbe_setup_eee_fw +ffffffff817abea0 T ixgbe_init_ops_X550EM_a +ffffffff817abfd0 T ixgbe_read_iosf_sb_reg_x550 +ffffffff817ac150 T ixgbe_write_iosf_sb_reg_x550 +ffffffff817ac2d0 T ixgbe_read_iosf_sb_reg_x550a +ffffffff817ac370 T ixgbe_write_iosf_sb_reg_x550a +ffffffff817ac400 T ixgbe_acquire_swfw_sync_X550a +ffffffff817ac540 T ixgbe_release_swfw_sync_X550a +ffffffff817ac5e0 T ixgbe_fc_autoneg_fiber_x550em_a +ffffffff817ac620 T ixgbe_fc_autoneg_backplane_x550em_a +ffffffff817ac780 T ixgbe_setup_fc_backplane_x550em_a +ffffffff817ac970 T ixgbe_fc_autoneg_sgmii_x550em_a +ffffffff817aca60 T ixgbe_init_ops_X550EM_x +ffffffff817acb20 T ixgbe_acquire_swfw_sync_X550em +ffffffff817acbe0 T ixgbe_release_swfw_sync_X550em +ffffffff817acc70 T ixgbe_iosf_wait +ffffffff817acd20 T ixgbe_get_phy_token +ffffffff817acda0 T ixgbe_put_phy_token +ffffffff817ace20 T ixgbe_supported_sfp_modules_X550em +ffffffff817acea0 T ixgbe_identify_sfp_module_X550em +ffffffff817acf20 T ixgbe_init_mac_link_ops_X550em +ffffffff817ad060 T ixgbe_restart_an_internal_phy_x550em +ffffffff817ad170 T ixgbe_setup_sgmii +ffffffff817ad410 T ixgbe_setup_sgmii_fw +ffffffff817ad6f0 T ixgbe_setup_mac_link_sfp_x550a +ffffffff817ad8e0 T ixgbe_setup_mac_link_sfp_x550em +ffffffff817ad9a0 T ixgbe_setup_mac_link_t_X550em +ffffffff817ada50 T ixgbe_check_link_t_X550em +ffffffff817adb30 T ixgbe_get_lasi_ext_t_x550em +ffffffff817adcb0 T ixgbe_enable_lasi_ext_t_x550em +ffffffff817ade40 T ixgbe_setup_kr_speed_x550em +ffffffff817ae050 T ixgbe_reset_phy_fw +ffffffff817ae120 T ixgbe_check_overtemp_fw +ffffffff817ae1b0 T ixgbe_read_phy_reg_x550a +ffffffff817ae250 T ixgbe_write_phy_reg_x550a +ffffffff817ae300 T ixgbe_setup_kr_x550em +ffffffff817ae370 T ixgbe_setup_internal_phy_t_x550em +ffffffff817ae500 T ixgbe_enter_lplu_t_x550em +ffffffff817ae7f0 T ixgbe_handle_lasi_ext_t_x550em +ffffffff817ae870 T ixgbe_reset_phy_t_X550em +ffffffff817ae8c0 T ixgbe_set_mdio_speed +ffffffff817ae9a0 T ixgbe_init_ext_t_x550em +ffffffff817aea50 T ixgbe_setup_sfi_x550a +ffffffff817aec00 T ixgbe_setup_ixfi_x550em_x +ffffffff817aede0 T ixgbe_setup_ixfi_x550em +ffffffff817aefc0 T ixgbe_ext_phy_t_x550em_get_link +ffffffff817af050 T ixgbe_setup_phy_loopback_x550em +ffffffff817af240 T ixgbe_read_ee_hostif_buffer_X550 +ffffffff817af3d0 T ixgbe_write_ee_hostif_data_X550 +ffffffff817af440 T ixgbe_checksum_ptr_x550 +ffffffff817af5d0 T ixgbe_calc_checksum_X550 +ffffffff817af760 T ixgbe_update_flash_X550 +ffffffff817af7b0 T ixgbe_get_lcd_t_x550em +ffffffff817af870 T ixgbe_set_mux +ffffffff817b0000 T ixgbe_read_i2c_combined_generic_int +ffffffff817b0260 T ixgbe_i2c_start +ffffffff817b03c0 T ixgbe_clock_in_i2c_byte +ffffffff817b04b0 T ixgbe_clock_out_i2c_bit +ffffffff817b05c0 T ixgbe_i2c_stop +ffffffff817b0750 T ixgbe_i2c_bus_clear +ffffffff817b0870 T ixgbe_read_i2c_combined_generic +ffffffff817b0890 T ixgbe_read_i2c_combined_generic_unlocked +ffffffff817b08b0 T ixgbe_write_i2c_combined_generic_int +ffffffff817b0a90 T ixgbe_write_i2c_combined_generic +ffffffff817b0ab0 T ixgbe_write_i2c_combined_generic_unlocked +ffffffff817b0ad0 T ixgbe_init_phy_ops_generic +ffffffff817b0c00 T ixgbe_identify_phy_generic +ffffffff817b10d0 T ixgbe_reset_phy_generic +ffffffff817b1260 T ixgbe_read_phy_reg_generic +ffffffff817b1300 T ixgbe_write_phy_reg_generic +ffffffff817b13a0 T ixgbe_read_phy_reg_mdi +ffffffff817b1520 T ixgbe_write_phy_reg_mdi +ffffffff817b1690 T ixgbe_setup_phy_link_generic +ffffffff817b1940 T ixgbe_setup_phy_link_speed_generic +ffffffff817b1990 T ixgbe_get_phy_firmware_version_generic +ffffffff817b19c0 T ixgbe_read_i2c_byte_generic +ffffffff817b19e0 T ixgbe_write_i2c_byte_generic +ffffffff817b1a00 T ixgbe_read_i2c_eeprom_generic +ffffffff817b1a30 T ixgbe_write_i2c_eeprom_generic +ffffffff817b1a50 T ixgbe_identify_module_generic +ffffffff817b1ac0 T ixgbe_read_i2c_byte_generic_unlocked +ffffffff817b1ae0 T ixgbe_write_i2c_byte_generic_unlocked +ffffffff817b1b00 T ixgbe_tn_check_overtemp +ffffffff817b1b70 T ixgbe_check_reset_blocked +ffffffff817b1bd0 T ixgbe_validate_phy_addr +ffffffff817b1c40 T ixgbe_get_phy_id +ffffffff817b1cf0 T ixgbe_get_phy_type_from_id +ffffffff817b1db0 T ixgbe_get_copper_link_capabilities_generic +ffffffff817b1ea0 T ixgbe_get_copper_speeds_supported +ffffffff817b1f60 T ixgbe_check_phy_link_tnx +ffffffff817b2220 T ixgbe_setup_phy_link_tnx +ffffffff817b24d0 T ixgbe_get_phy_firmware_version_tnx +ffffffff817b2500 T ixgbe_reset_phy_nl +ffffffff817b27a0 T ixgbe_get_sfp_init_sequence_offsets +ffffffff817b2980 T ixgbe_is_sfp +ffffffff817b29d0 T ixgbe_identify_sfp_module_generic +ffffffff817b2dc0 T ixgbe_identify_qsfp_module_generic +ffffffff817b30b0 T ixgbe_get_supported_phy_sfp_layer_generic +ffffffff817b3250 T ixgbe_is_sfp_probe +ffffffff817b32a0 T ixgbe_read_i2c_byte_generic_int +ffffffff817b34a0 T ixgbe_clock_out_i2c_byte +ffffffff817b3600 T ixgbe_get_i2c_ack +ffffffff817b3800 T ixgbe_write_i2c_byte_generic_int +ffffffff817b3930 T ixgbe_set_i2c_data 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oce_get_link_status +ffffffff817cdc30 T oce_first_mcc +ffffffff817cdd20 T oce_media_change +ffffffff817cdd50 T oce_media_status +ffffffff817cde80 T oce_ioctl +ffffffff817ce020 T oce_start +ffffffff817ce120 T oce_watchdog +ffffffff817ce180 T oce_init +ffffffff817ce660 T oce_stop +ffffffff817ce9a0 T oce_rxrinfo +ffffffff817ceae0 T oce_iff +ffffffff817cec20 T oce_update_mcast +ffffffff817ced90 T oce_set_promisc +ffffffff817cee30 T oce_link_status +ffffffff817ceed0 T oce_update_stats +ffffffff817cefb0 T oce_macaddr_set +ffffffff817cf210 T oce_config_vlan +ffffffff817cf430 T oce_set_flow_control +ffffffff817cf650 T oce_new_rq +ffffffff817cf9c0 T oce_alloc_rx_bufs +ffffffff817cfb10 T oce_drain_eq +ffffffff817cfc30 T oce_cmd +ffffffff817cfe80 T oce_drain_rq +ffffffff817cffa0 T oce_free_posted_rxbuf +ffffffff817d0080 T oce_drain_wq +ffffffff817d01a0 T oce_encap +ffffffff817d0580 T oce_intr_wq +ffffffff817d0720 T oce_txeof +ffffffff817d0820 T oce_intr_rq +ffffffff817d0a00 T oce_rxeoc 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iwi_find_txnode +ffffffff81806010 T iwi_scan +ffffffff818062d0 T iwi_auth_and_assoc +ffffffff81806b60 T iwi_set_chan +ffffffff81806d10 T iwi_frame_intr +ffffffff81807030 T iwi_notification_intr +ffffffff81807120 T iwi_rx_intr +ffffffff818072c0 T iwi_tx_intr +ffffffff818073c0 T iwi_cmd +ffffffff81807520 T iwi_tx_start +ffffffff81807a00 T iwi_stop_master +ffffffff81807bc0 T iwi_load_ucode +ffffffff818081f0 T iwi_load_firmware +ffffffff81808810 T iwi_config +ffffffff81808be0 T iwi_update_edca +ffffffff81809000 T wpi_match +ffffffff81809030 T wpi_attach +ffffffff818097f0 T wpi_detach +ffffffff81809a90 T wpi_activate +ffffffff81809b30 T wpi_intr +ffffffff81809d30 T wpi_apm_init +ffffffff8180a030 T wpi_read_eeprom +ffffffff8180a2b0 T wpi_alloc_fwmem +ffffffff8180a2e0 T wpi_alloc_shared +ffffffff8180a320 T wpi_alloc_tx_ring +ffffffff8180a4d0 T wpi_alloc_rx_ring +ffffffff8180a6d0 T wpi_apm_stop +ffffffff8180a7f0 T wpi_ioctl +ffffffff8180aa50 T wpi_start +ffffffff8180abd0 T wpi_watchdog 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iwn_media_change +ffffffff81816da0 T iwn_radiotap_attach +ffffffff81816e30 T iwn_calib_timeout +ffffffff81817060 T iwn_init_task +ffffffff818170d0 T iwn_free_tx_ring +ffffffff818172c0 T iwn_free_sched +ffffffff818173b0 T iwn_free_ict +ffffffff818174a0 T iwn_free_kw +ffffffff81817590 T iwn_free_fwmem +ffffffff81817680 T iwn4965_load_firmware +ffffffff81817cd0 T iwn4965_read_eeprom +ffffffff81817e20 T iwn4965_post_alive +ffffffff818182f0 T iwn4965_nic_config +ffffffff818183d0 T iwn4965_reset_sched +ffffffff81818400 T iwn4965_update_sched +ffffffff818184e0 T iwn4965_update_rxon +ffffffff81818730 T iwn4965_get_temperature +ffffffff818187b0 T iwn4965_get_rssi +ffffffff81818820 T iwn4965_set_txpower +ffffffff81818d60 T iwn4965_init_gains +ffffffff81818f00 T iwn4965_set_gains +ffffffff81819240 T iwn4965_add_node +ffffffff818192d0 T iwn4965_tx_done +ffffffff81819430 T iwn4965_ampdu_tx_start +ffffffff81819840 T iwn4965_ampdu_tx_stop +ffffffff81819a40 T iwn5000_load_firmware +ffffffff81819b50 T iwn5000_read_eeprom +ffffffff81819da0 T iwn5000_post_alive +ffffffff8181a720 T iwn5000_nic_config +ffffffff8181aaf0 T iwn5000_reset_sched +ffffffff8181abe0 T iwn5000_update_sched +ffffffff8181acd0 T iwn5000_update_rxon +ffffffff8181af50 T iwn5000_get_temperature +ffffffff8181afb0 T iwn5000_get_rssi +ffffffff8181b000 T iwn5000_set_txpower +ffffffff8181b050 T iwn5000_init_gains +ffffffff8181b1f0 T iwn5000_set_gains +ffffffff8181b490 T iwn5000_add_node +ffffffff8181b4c0 T iwn5000_tx_done +ffffffff8181b6c0 T iwn5000_ampdu_tx_start +ffffffff8181bb00 T iwn5000_ampdu_tx_stop +ffffffff8181bd80 T iwn_free_rx_ring +ffffffff8181bf70 T iwn_stop +ffffffff8181bff0 T iwn_wakeup +ffffffff8181c0a0 T iwn_init +ffffffff8181c3a0 T iwn_nic_lock +ffffffff8181c460 T iwn_eeprom_lock +ffffffff8181c530 T iwn_init_otprom +ffffffff8181c990 T iwn_clock_wait +ffffffff8181ca60 T iwn_read_prom_data +ffffffff8181ce40 T iwn_dma_contig_alloc +ffffffff8181d030 T iwn_dma_contig_free +ffffffff8181d0f0 T iwn_reset_rx_ring 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T iwm_check_rfkill +ffffffff81829a80 T iwm_enable_interrupts +ffffffff81829b30 T iwm_enable_fwload_interrupt +ffffffff81829c00 T iwm_restore_interrupts +ffffffff81829c30 T iwm_disable_interrupts +ffffffff81829cf0 T iwm_ict_reset +ffffffff81829eb0 T iwm_set_hw_ready +ffffffff8182a090 T iwm_prepare_card_hw +ffffffff8182a1d0 T iwm_apm_config +ffffffff8182a2b0 T iwm_apm_init +ffffffff8182a9a0 T iwm_apm_stop +ffffffff8182ad60 T iwm_init_msix_hw +ffffffff8182ae00 T iwm_conf_msix_hw +ffffffff8182b350 T iwm_clear_persistence_bit +ffffffff8182b4a0 T iwm_start_hw +ffffffff8182b6c0 T iwm_stop_device +ffffffff8182bce0 T iwm_nic_config +ffffffff8182bdc0 T iwm_nic_rx_init +ffffffff8182bde0 T iwm_nic_rx_mq_init +ffffffff8182c1e0 T iwm_nic_rx_legacy_init +ffffffff8182c420 T iwm_nic_tx_init +ffffffff8182c5f0 T iwm_nic_init +ffffffff8182c750 T iwm_enable_ac_txq +ffffffff8182cbd0 T iwm_enable_txq +ffffffff8182cdb0 T iwm_send_cmd_pdu +ffffffff8182ce30 T iwm_disable_txq +ffffffff8182cf10 T iwm_post_alive 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iwm_rxmq_get_signal_strength +ffffffff81833e10 T iwm_rx_rx_phy_cmd +ffffffff81833e70 T iwm_get_noise +ffffffff81833ee0 T iwm_ccmp_decap +ffffffff81833fe0 T iwm_rx_hwdecrypt +ffffffff818340b0 T iwm_rx_frame +ffffffff818343e0 T iwm_rx_mpdu +ffffffff818345f0 T iwm_flip_address +ffffffff81834640 T iwm_detect_duplicate +ffffffff81834740 T iwm_is_sn_less +ffffffff818347a0 T iwm_oldsn_workaround +ffffffff81834860 T iwm_rx_reorder +ffffffff81834e90 T iwm_rx_mpdu_mq +ffffffff818352a0 T iwm_ra_choose +ffffffff81835360 T iwm_ht_single_rate_control +ffffffff81835590 T iwm_vht_single_rate_control +ffffffff818357e0 T iwm_rx_tx_cmd_single +ffffffff818359b0 T iwm_txd_done +ffffffff81835a80 T iwm_reset_sched +ffffffff81835b30 T iwm_ampdu_tx_done +ffffffff81835e80 T iwm_rx_tx_cmd +ffffffff81836050 T iwm_ampdu_rate_control +ffffffff81836210 T iwm_rx_compressed_ba +ffffffff818363f0 T iwm_rx_bmiss +ffffffff818364e0 T iwm_binding_cmd +ffffffff81836680 T iwm_phy_ctxt_cmd_hdr +ffffffff818366f0 T iwm_phy_ctxt_cmd_data +ffffffff81836860 T iwm_get_vht_ctrl_pos +ffffffff818368d0 T iwm_phy_ctxt_cmd_uhb +ffffffff81836af0 T iwm_phy_ctxt_cmd +ffffffff81836d40 T iwm_update_sched +ffffffff81836e10 T iwm_send_cmd_status +ffffffff81836f30 T iwm_cmd_done +ffffffff818370d0 T iwm_tx_fill_cmd +ffffffff81837500 T iwm_rval2ridx +ffffffff81837590 T iwm_tx +ffffffff81838010 T iwm_flush_tx_path +ffffffff818380e0 T iwm_wait_tx_queues_empty +ffffffff818381a0 T iwm_led_enable +ffffffff818381d0 T iwm_led_disable +ffffffff81838200 T iwm_led_is_enabled +ffffffff81838260 T iwm_led_blink_timeout +ffffffff818382e0 T iwm_led_blink_start +ffffffff81838330 T iwm_led_blink_stop +ffffffff81838380 T iwm_beacon_filter_send_cmd +ffffffff81838410 T iwm_beacon_filter_set_cqm_params +ffffffff81838450 T iwm_update_beacon_abort +ffffffff81838540 T iwm_power_build_cmd +ffffffff818385d0 T iwm_power_mac_update_mode +ffffffff818387e0 T iwm_power_update_device +ffffffff81838880 T iwm_enable_beacon_filter +ffffffff81838970 T iwm_disable_beacon_filter +ffffffff81838a50 T iwm_add_sta_cmd +ffffffff81838e50 T iwm_add_aux_sta +ffffffff81838ff0 T iwm_drain_sta +ffffffff818391a0 T iwm_rm_sta_cmd +ffffffff81839260 T iwm_scan_rx_chain +ffffffff818392d0 T iwm_scan_rate_n_flags +ffffffff818393d0 T iwm_lmac_scan_fill_channels +ffffffff818394b0 T iwm_umac_scan_fill_channels +ffffffff818395a0 T iwm_fill_probe_req_v1 +ffffffff81839640 T iwm_fill_probe_req +ffffffff81839880 T iwm_lmac_scan +ffffffff81839d80 T iwm_config_umac_scan +ffffffff81839f90 T iwm_umac_scan_size +ffffffff8183a000 T iwm_get_scan_req_umac_chan_param +ffffffff8183a050 T iwm_get_scan_req_umac_data +ffffffff8183a0a0 T iwm_umac_scan +ffffffff8183a510 T iwm_mcc_update +ffffffff8183a5a0 T iwm_ridx2rate +ffffffff8183a610 T iwm_ack_rates +ffffffff8183a8d0 T iwm_mac_ctxt_cmd_common +ffffffff8183abe0 T iwm_mac_ctxt_cmd_fill_sta +ffffffff8183ac90 T iwm_update_quotas +ffffffff8183b080 T iwm_del_task +ffffffff8183b0e0 T iwm_scan +ffffffff8183b350 T iwm_scan_abort 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iwm_send_temp_report_ths_cmd +ffffffff8183efb0 T iwm_tt_tx_backoff +ffffffff8183f040 T iwm_fill_paging_mem +ffffffff8183f270 T iwm_alloc_fw_paging_mem +ffffffff8183f410 T iwm_init_hw +ffffffff8183fde0 T iwm_preinit +ffffffff81840000 T iwm_start +ffffffff818401d0 T iwm_watchdog +ffffffff81840370 T iwm_nic_error +ffffffff81840860 T iwm_dump_driver_status +ffffffff81840900 T iwm_ioctl +ffffffff81840a70 T iwm_nic_umac_error +ffffffff81840eb0 T iwm_desc_lookup +ffffffff81841040 T iwm_rx_pkt_valid +ffffffff81841090 T iwm_rx_pkt +ffffffff81841e30 T iwm_notif_intr +ffffffff81841f90 T iwm_intr +ffffffff818423c0 T iwm_intr_msix +ffffffff81842660 T iwm_match +ffffffff81842690 T iwm_attach_hook +ffffffff818426d0 T iwm_attach +ffffffff81843760 T iwm_radiotap_attach +ffffffff818437f0 T iwm_init_task +ffffffff818438b0 T iwm_resume +ffffffff818439e0 T iwm_wakeup +ffffffff81843a90 T iwm_activate +ffffffff81844000 T iwx_lookup_cmd_ver +ffffffff81844070 T iwx_lookup_notif_ver +ffffffff818440e0 T iwx_is_mimo_ht_plcp +ffffffff81844120 T iwx_store_cscheme +ffffffff81844170 T iwx_ctxt_info_alloc_dma +ffffffff81844210 T iwx_dma_contig_alloc +ffffffff818443f0 T iwx_ctxt_info_free_paging +ffffffff81844550 T iwx_dma_contig_free +ffffffff81844610 T iwx_get_num_sections +ffffffff81844690 T iwx_init_fw_sec +ffffffff81844b40 T iwx_fw_version_str +ffffffff81844b80 T iwx_alloc_fw_monitor_block +ffffffff81844c30 T iwx_alloc_fw_monitor +ffffffff81844cf0 T iwx_apply_debug_destination +ffffffff81845230 T iwx_nic_lock +ffffffff81845380 T iwx_write_prph +ffffffff81845420 T iwx_set_bits_prph +ffffffff81845440 T iwx_clear_bits_prph +ffffffff81845460 T iwx_read_prph +ffffffff81845500 T iwx_nic_unlock +ffffffff818455b0 T iwx_set_ltr +ffffffff81845700 T iwx_ctxt_info_init +ffffffff818459c0 T iwx_ctxt_info_free_fw_img +ffffffff81845b40 T iwx_ctxt_info_gen3_init +ffffffff81846130 T iwx_write_umac_prph +ffffffff818461e0 T iwx_firmware_store_section +ffffffff81846280 T iwx_set_default_calib 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iwx_enable_interrupts +ffffffff81848c40 T iwx_enable_fwload_interrupt +ffffffff81848d20 T iwx_restore_interrupts +ffffffff81848d50 T iwx_disable_interrupts +ffffffff81848e10 T iwx_ict_reset +ffffffff81848fd0 T iwx_set_hw_ready +ffffffff818491b0 T iwx_prepare_card_hw +ffffffff818492f0 T iwx_force_power_gating +ffffffff818493a0 T iwx_apm_config +ffffffff81849470 T iwx_apm_init +ffffffff818496d0 T iwx_apm_stop +ffffffff81849a90 T iwx_init_msix_hw +ffffffff81849b30 T iwx_conf_msix_hw +ffffffff8184a0d0 T iwx_clear_persistence_bit +ffffffff8184a250 T iwx_start_hw +ffffffff8184a650 T iwx_stop_device +ffffffff8184abc0 T iwx_nic_config +ffffffff8184ac50 T iwx_nic_rx_init +ffffffff8184acb0 T iwx_nic_init +ffffffff8184add0 T iwx_enable_txq +ffffffff8184b0a0 T iwx_send_cmd +ffffffff8184b680 T iwx_free_resp +ffffffff8184b700 T iwx_disable_txq +ffffffff8184b960 T iwx_post_alive +ffffffff8184b9f0 T iwx_schedule_session_protection +ffffffff8184bac0 T iwx_send_cmd_pdu +ffffffff8184bb40 T iwx_unprotect_session +ffffffff8184bc10 T iwx_fw_valid_tx_ant +ffffffff8184bc50 T iwx_fw_valid_rx_ant +ffffffff8184bca0 T iwx_init_channel_map +ffffffff8184bea0 T iwx_mimo_enabled +ffffffff8184bee0 T iwx_setup_ht_rates +ffffffff8184bf90 T iwx_setup_vht_rates +ffffffff8184c020 T iwx_init_reorder_buffer +ffffffff8184c080 T iwx_clear_reorder_buffer +ffffffff8184c140 T iwx_rx_ba_session_expired +ffffffff8184c240 T iwx_rx_bar_frame_release +ffffffff8184c2f0 T iwx_release_frames +ffffffff8184c4e0 T iwx_reorder_timer_expired +ffffffff8184c6a0 T iwx_find_rxba_data +ffffffff8184c730 T iwx_sta_rx_agg_baid_cfg_cmd +ffffffff8184c990 T iwx_send_cmd_pdu_status +ffffffff8184ca20 T iwx_sta_rx_agg_sta_cmd +ffffffff8184cc70 T iwx_sta_rx_agg +ffffffff8184cf50 T iwx_mac_ctxt_task +ffffffff8184d0e0 T iwx_mac_ctxt_cmd +ffffffff8184d2c0 T iwx_phy_ctxt_task +ffffffff8184d480 T iwx_phy_ctxt_update +ffffffff8184d8e0 T iwx_updatechan +ffffffff8184d9a0 T iwx_add_task +ffffffff8184da10 T iwx_updateprot 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iwx_rxmq_get_signal_strength +ffffffff8184fb20 T iwx_rx_rx_phy_cmd +ffffffff8184fb80 T iwx_get_noise +ffffffff8184fbf0 T iwx_ccmp_decap +ffffffff8184fd30 T iwx_rx_hwdecrypt +ffffffff8184fe30 T iwx_rx_frame +ffffffff818500f0 T iwx_detect_duplicate +ffffffff818501f0 T iwx_is_sn_less +ffffffff81850250 T iwx_oldsn_workaround +ffffffff81850310 T iwx_rx_reorder +ffffffff81850940 T iwx_rx_mpdu_mq +ffffffff81850c90 T iwx_clear_tx_desc +ffffffff81850e10 T iwx_txd_done +ffffffff81850ed0 T iwx_txq_advance +ffffffff81851210 T iwx_tx_update_byte_tbl +ffffffff818512b0 T iwx_rx_tx_cmd +ffffffff81851410 T iwx_clear_oactive +ffffffff81851490 T iwx_rx_compressed_ba +ffffffff81851610 T iwx_rx_bmiss +ffffffff81851700 T iwx_binding_cmd +ffffffff81851890 T iwx_get_vht_ctrl_pos +ffffffff81851900 T iwx_phy_ctxt_cmd_uhb_v3_v4 +ffffffff81851b50 T iwx_phy_ctxt_cmd_v3_v4 +ffffffff81851da0 T iwx_phy_ctxt_cmd +ffffffff81851ea0 T iwx_send_cmd_status +ffffffff81851fc0 T iwx_cmd_done +ffffffff818520a0 T iwx_fw_rateidx_ofdm +ffffffff81852100 T iwx_fw_rateidx_cck +ffffffff81852160 T iwx_tx_fill_cmd +ffffffff81852410 T iwx_rval2ridx +ffffffff818524a0 T iwx_tx +ffffffff81852ba0 T iwx_flush_sta_tids +ffffffff81852d50 T iwx_wait_tx_queues_empty +ffffffff81852e10 T iwx_drain_sta +ffffffff81852fb0 T iwx_flush_sta +ffffffff81853310 T iwx_beacon_filter_send_cmd +ffffffff818533a0 T iwx_update_beacon_abort +ffffffff818534b0 T iwx_power_build_cmd +ffffffff81853540 T iwx_power_mac_update_mode +ffffffff81853760 T iwx_power_update_device +ffffffff81853800 T iwx_enable_beacon_filter +ffffffff81853910 T iwx_disable_beacon_filter +ffffffff81853a00 T iwx_add_sta_cmd +ffffffff81853d00 T iwx_rm_sta_cmd +ffffffff81853dc0 T iwx_rm_sta +ffffffff81854230 T iwx_disable_mgmt_queue +ffffffff81854310 T iwx_umac_scan_fill_channels +ffffffff81854420 T iwx_fill_probe_req +ffffffff81854660 T iwx_config_umac_scan_reduced +ffffffff818547c0 T iwx_scan_umac_flags_v2 +ffffffff81854800 T iwx_scan_umac_dwell_v10 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age_init_tx_ring +ffffffff81893780 T age_init_cmb_block +ffffffff818937d0 T age_init_smb_block +ffffffff81893820 T age_rxvlan +ffffffff81894000 T alc_match +ffffffff81894030 T alc_attach +ffffffff818948d0 T alc_detach +ffffffff818949a0 T alc_activate +ffffffff81894a20 T alc_miibus_readreg +ffffffff81894be0 T alc_mii_readreg_816x +ffffffff81894ce0 T alc_mii_readreg_813x +ffffffff81894df0 T alc_miibus_writereg +ffffffff81894fc0 T alc_mii_writereg_816x +ffffffff818950d0 T alc_mii_writereg_813x +ffffffff818951d0 T alc_miibus_statchg +ffffffff81895580 T alc_stop_mac +ffffffff81895670 T alc_start_queue +ffffffff81895720 T alc_mac_config +ffffffff818957f0 T alc_aspm +ffffffff818958c0 T alc_dsp_fixup +ffffffff81895ee0 T alc_miidbg_readreg +ffffffff81895f20 T alc_miidbg_writereg +ffffffff81895f70 T alc_miiext_readreg +ffffffff818960a0 T alc_miiext_writereg +ffffffff818961e0 T alc_mediastatus +ffffffff81896250 T alc_mediachange +ffffffff818962b0 T alc_get_macaddr +ffffffff818962d0 T alc_get_macaddr_816x +ffffffff81896560 T alc_get_macaddr_813x +ffffffff81896a10 T alc_get_macaddr_par +ffffffff81896ac0 T alc_disable_l0s_l1 +ffffffff81896b50 T alc_phy_reset +ffffffff81896b70 T alc_phy_reset_816x +ffffffff81897400 T alc_phy_reset_813x +ffffffff818977f0 T alc_phy_down +ffffffff81897920 T alc_aspm_816x +ffffffff818979d0 T alc_aspm_813x +ffffffff81897bc0 T alc_init_pcie +ffffffff81897f50 T alc_config_msi +ffffffff81898020 T alc_intr +ffffffff81898200 T alc_reset +ffffffff818985d0 T alc_dma_alloc +ffffffff81898d40 T alc_ioctl +ffffffff81898e90 T alc_start +ffffffff81899030 T alc_watchdog +ffffffff818990b0 T alc_tick +ffffffff81899110 T alc_dma_free +ffffffff818993d0 T alc_stop +ffffffff81899720 T alc_init +ffffffff8189a640 T alc_encap +ffffffff8189a870 T alc_txeof +ffffffff8189aa60 T alc_iff +ffffffff8189abc0 T alc_stats_clear +ffffffff8189ad00 T alc_stats_update +ffffffff8189b160 T alc_rxintr +ffffffff8189b380 T alc_newbuf +ffffffff8189b500 T alc_rxeof +ffffffff8189b790 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bce_mii_read +ffffffff818a3950 T bce_mii_write +ffffffff818a3a80 T bce_statchg +ffffffff818a3e10 T bce_mediachange +ffffffff818a3e60 T bce_mediastatus +ffffffff818a3ec0 T bce_tick +ffffffff818a3f10 T bce_stop +ffffffff818a4030 T bce_init +ffffffff818a4440 T bce_iff +ffffffff818a4540 T bce_rxintr +ffffffff818a46d0 T bce_txintr +ffffffff818a47c0 T bce_add_rxbuf +ffffffff818a4880 T bce_add_mac +ffffffff818a5000 T ath_pci_match +ffffffff818a5060 T ath_pci_attach +ffffffff818a5290 T ath_pci_detach +ffffffff818a6000 T athn_pci_match +ffffffff818a6030 T athn_pci_attach +ffffffff818a62b0 T athn_pci_detach +ffffffff818a6330 T athn_pci_activate +ffffffff818a63e0 T athn_pci_read +ffffffff818a6410 T athn_pci_write +ffffffff818a6440 T athn_pci_write_barrier +ffffffff818a6470 T athn_pci_disable_aspm +ffffffff818a64e0 T athn_pci_wakeup +ffffffff818a7000 T atw_pci_match +ffffffff818a7030 T atw_pci_attach +ffffffff818a72a0 T atw_pci_detach +ffffffff818a7320 t atw_pci_enable +ffffffff818a73c0 t atw_pci_disable +ffffffff818a8000 T rtw_pci_match +ffffffff818a8030 T rtw_pci_attach +ffffffff818a8250 T rtw_pci_detach +ffffffff818a82d0 T rtw_pci_enable +ffffffff818a8370 T rtw_pci_disable +ffffffff818a9000 T rtwn_pci_match +ffffffff818a9030 T rtwn_pci_attach +ffffffff818a9590 T rtwn_pci_detach +ffffffff818a96a0 T rtwn_pci_activate +ffffffff818a96c0 T rtwn_calib_to +ffffffff818a9720 T rtwn_scan_to +ffffffff818a9740 T rtwn_intr +ffffffff818a9a20 T rtwn_alloc_rx_list +ffffffff818a9d40 T rtwn_alloc_tx_list +ffffffff818a9f80 T rtwn_free_rx_list +ffffffff818aa0d0 T rtwn_pci_write_1 +ffffffff818aa100 T rtwn_pci_write_2 +ffffffff818aa130 T rtwn_pci_write_4 +ffffffff818aa160 T rtwn_pci_read_1 +ffffffff818aa190 T rtwn_pci_read_2 +ffffffff818aa1c0 T rtwn_pci_read_4 +ffffffff818aa1f0 T rtwn_tx +ffffffff818aa7c0 T rtwn_power_on +ffffffff818aa7f0 T rtwn_dma_init +ffffffff818aaba0 T rtwn_pci_load_firmware +ffffffff818aac50 T rtwn_fw_loadpage +ffffffff818aad90 T rtwn_mac_init +ffffffff818aaf10 T rtwn_bb_init +ffffffff818ab3b0 T rtwn_alloc_buffers +ffffffff818ab3e0 T rtwn_pci_init +ffffffff818ab4b0 T rtwn_pci_stop +ffffffff818ab600 T rtwn_is_oactive +ffffffff818ab640 T rtwn_next_calib +ffffffff818ab660 T rtwn_cancel_calib +ffffffff818ab6a0 T rtwn_pci_next_scan +ffffffff818ab6c0 T rtwn_cancel_scan +ffffffff818ab700 T rtwn_wait_async +ffffffff818ab730 T rtwn_free_tx_list +ffffffff818ab8a0 T rtwn_setup_rx_desc +ffffffff818ab910 T rtwn_reset_rx_list +ffffffff818ab9b0 T rtwn_reset_tx_list +ffffffff818abb00 T rtwn_rx_frame +ffffffff818abf60 T rtwn_tx_done +ffffffff818ac0f0 T rtwn_poll_c2h_events +ffffffff818ac2b0 T rtwn_pci_92c_stop +ffffffff818ac490 T rtwn_pci_88e_stop +ffffffff818ac870 T rtwn_pci_23a_stop +ffffffff818acc10 T rtwn_88e_intr +ffffffff818acf60 T rtwn_llt_write +ffffffff818ad020 T rtwn_llt_init +ffffffff818ad2f0 T rtwn_92c_power_on +ffffffff818ad770 T rtwn_88e_power_on +ffffffff818adb70 T rtwn_23a_power_on +ffffffff818adfe0 T rtwn_tx_report +ffffffff818af000 T ral_pci_match +ffffffff818af030 T ral_pci_attach +ffffffff818af210 T ral_pci_detach +ffffffff818af2b0 T ral_pci_activate +ffffffff818af340 T ral_pci_wakeup +ffffffff818b0000 T acx_pci_match +ffffffff818b0030 T acx_pci_attach +ffffffff818b0260 T acx_pci_detach +ffffffff818b1000 T pgt_pci_match +ffffffff818b1030 T pgt_pci_attach +ffffffff818b1200 T pgt_pci_detach +ffffffff818b2000 T malo_pci_match +ffffffff818b2030 T malo_pci_attach +ffffffff818b21e0 T malo_pci_detach +ffffffff818b2230 T malo_pci_activate +ffffffff818b2290 T malo_pci_wakeup +ffffffff818b3000 T bwi_pci_match +ffffffff818b3070 T bwi_pci_attach +ffffffff818b3290 T bwi_pci_detach +ffffffff818b32e0 T bwi_pci_activate +ffffffff818b3350 T bwi_reset_bcm4331 +ffffffff818b3470 T bwi_pci_conf_write +ffffffff818b34a0 T bwi_pci_conf_read +ffffffff818b34d0 T bwi_pci_wakeup +ffffffff818b4000 T piixpm_match +ffffffff818b4030 T piixpm_attach +ffffffff818b44c0 T piixpm_intr +ffffffff818b45d0 T piixpm_i2c_acquire_bus +ffffffff818b46b0 T piixpm_i2c_release_bus +ffffffff818b4790 T piixpm_i2c_exec +ffffffff818b5000 T vic_match +ffffffff818b50a0 T vic_attach +ffffffff818b5430 T vic_intr +ffffffff818b54b0 T vic_query +ffffffff818b5710 T vic_alloc_data +ffffffff818b5a10 T vic_tick +ffffffff818b5a80 T vic_ioctl +ffffffff818b5cb0 T vic_start +ffffffff818b5fe0 T vic_watchdog +ffffffff818b6010 T vic_media_change +ffffffff818b6040 T vic_media_status +ffffffff818b6100 T vic_read +ffffffff818b6120 T vic_read_cmd +ffffffff818b6170 T vic_getlladdr +ffffffff818b6220 T vic_alloc_dmamem +ffffffff818b6390 T vic_rx_fill +ffffffff818b6570 T vic_alloc_mbuf +ffffffff818b6630 T vic_init_data +ffffffff818b69e0 T vic_uninit_data +ffffffff818b6bb0 T vic_link_state +ffffffff818b6c30 T vic_write +ffffffff818b6c80 T vic_rx_proc +ffffffff818b6ee0 T vic_tx_proc +ffffffff818b7060 T vic_iff +ffffffff818b71a0 T vic_setlladdr +ffffffff818b7200 T vic_load_txb +ffffffff818b72b0 T vic_init +ffffffff818b7450 T vic_stop +ffffffff818b7590 T vic_rxrinfo +ffffffff818b7660 T vic_free_dmamem +ffffffff818b8000 T vmxnet3_match +ffffffff818b8030 T vmxnet3_attach +ffffffff818b8910 T vmxnet3_intr +ffffffff818b89b0 T vmxnet3_intr_event +ffffffff818b8a30 T vmxnet3_intr_intx +ffffffff818b8aa0 T vmxnet3_intr_queue +ffffffff818b8b30 T vmxnet3_dma_init +ffffffff818b8ee0 T vmxnet3_ioctl +ffffffff818b9170 T vmxnet3_start +ffffffff818b9510 T vmxnet3_watchdog +ffffffff818b9560 T vmxnet3_media_change +ffffffff818b9590 T vmxnet3_media_status +ffffffff818b96a0 T vmxnet3_link_state +ffffffff818b9760 T vmxnet3_dma_allocmem +ffffffff818b98b0 T vmxnet3_alloc_txring +ffffffff818b9a60 T vmxnet3_alloc_rxring +ffffffff818b9db0 t vmx_dmamem_alloc +ffffffff818b9f10 T vmxnet3_rxfill_tick +ffffffff818b9f80 T vmxnet3_txinit +ffffffff818ba070 T vmxnet3_rxfill +ffffffff818ba360 T vmxnet3_rxinit +ffffffff818ba4a0 T vmxnet3_txstop +ffffffff818ba5a0 T vmxnet3_rxstop +ffffffff818ba700 T vmxnet3_enable_all_intrs +ffffffff818ba7d0 T vmxnet3_disable_all_intrs +ffffffff818ba8a0 T vmxnet3_evintr +ffffffff818baa70 T vmxnet3_rxintr +ffffffff818badf0 T vmxnet3_txintr +ffffffff818bafe0 T vmxnet3_init +ffffffff818bb390 T vmxnet3_rx_csum +ffffffff818bb3f0 T vmxnet3_iff +ffffffff818bb530 T vmxnet3_stop +ffffffff818bb7f0 T vmxnet3_reset +ffffffff818bb830 t vmx_kstat_create +ffffffff818bba10 t vmx_kstat_read +ffffffff818bc000 T vmwpvs_match +ffffffff818bc040 T vmwpvs_attach +ffffffff818bcdf0 T vmwpvs_scsi_cmd +ffffffff818bd260 T vmwpvs_intx +ffffffff818bd2e0 T vmwpvs_msg_task +ffffffff818bd560 T vmwpvs_intr +ffffffff818bd740 T vmwpvs_get_config +ffffffff818bd940 T vmwpvs_dmamem_zalloc +ffffffff818bd9a0 T vmwpvs_dmamem_alloc +ffffffff818bdb20 T vmwpvs_ccb_put +ffffffff818bdb80 T vmwpvs_setup_rings +ffffffff818bdcb0 T vmwpvs_setup_msg_ring +ffffffff818bdda0 T vmwpvs_ccb_get +ffffffff818bde20 T vmwpvs_dmamem_free +ffffffff818bdea0 T vmwpvs_cmd +ffffffff818bdf50 T vmwpvs_scsi_cmd_done +ffffffff818be130 T vmwpvs_scsi_cmd_poll +ffffffff818bf000 T lii_match +ffffffff818bf030 T lii_attach +ffffffff818bf440 T lii_activate +ffffffff818bf540 T lii_reset +ffffffff818bf810 T lii_spi_configure +ffffffff818bf900 T lii_eeprom_present +ffffffff818bf990 T lii_eeprom_read +ffffffff818bf9c0 T lii_spi_read +ffffffff818bfc80 T lii_read_macaddr +ffffffff818bfdf0 T lii_intr +ffffffff818bff00 T lii_alloc_rings +ffffffff818c0110 T lii_tick +ffffffff818c0160 T lii_mii_readreg +ffffffff818c0400 T lii_mii_writereg +ffffffff818c06a0 T lii_mii_statchg +ffffffff818c0710 T lii_media_change +ffffffff818c0760 T lii_media_status +ffffffff818c07c0 T lii_ioctl +ffffffff818c0950 T lii_start +ffffffff818c0b00 T lii_watchdog +ffffffff818c0b40 T lii_stop +ffffffff818c0bb0 T lii_init +ffffffff818c10b0 T lii_iff +ffffffff818c11f0 T lii_tx_put +ffffffff818c1300 T lii_free_tx_space +ffffffff818c1340 T lii_rxintr +ffffffff818c14f0 T lii_txintr +ffffffff818c2000 T ichiic_match +ffffffff818c2030 T ichiic_attach +ffffffff818c2220 T ichiic_intr +ffffffff818c2330 T ichiic_i2c_acquire_bus +ffffffff818c2380 T ichiic_i2c_release_bus +ffffffff818c23d0 T ichiic_i2c_exec +ffffffff818c3000 T viapm_match +ffffffff818c3030 T viapm_attach +ffffffff818c3650 T viapm_intr +ffffffff818c3760 T viapm_i2c_acquire_bus +ffffffff818c37b0 T viapm_i2c_release_bus +ffffffff818c3800 T viapm_i2c_exec +ffffffff818c3b20 T viapm_refresh_sensor_data +ffffffff818c3e50 T viapm_refresh +ffffffff818c3e80 T val_to_uK +ffffffff818c3f20 T val_to_rpm +ffffffff818c3f60 T val_to_uV +ffffffff818c4000 T viapm_get_timecount +ffffffff818c5000 T amdiic_match +ffffffff818c5030 T amdiic_attach +ffffffff818c5200 T amdiic_intr +ffffffff818c52d0 T amdiic_i2c_acquire_bus +ffffffff818c5320 T amdiic_i2c_release_bus +ffffffff818c5370 T amdiic_i2c_exec +ffffffff818c55d0 T amdiic_read +ffffffff818c5740 T amdiic_wait +ffffffff818c57e0 T amdiic_write +ffffffff818c6000 T nviic_match +ffffffff818c6030 T nviic_attach +ffffffff818c6280 T nviic_i2c_acquire_bus +ffffffff818c62d0 T nviic_i2c_release_bus +ffffffff818c6310 T nviic_i2c_exec +ffffffff818c6530 T nviic_write +ffffffff818c6580 T nviic_read +ffffffff818c7000 T sdhc_pci_match +ffffffff818c7060 T sdhc_pci_attach +ffffffff818c73a0 T sdhc_pci_activate +ffffffff818c7400 T sdhc_takecontroller +ffffffff818c74a0 T sdhc_ricohfix +ffffffff818c7610 T sdhc_pci_conf_write +ffffffff818c8000 T kate_match +ffffffff818c8170 T kate_attach +ffffffff818c8420 T kate_refresh +ffffffff818c9000 T km_match +ffffffff818c9050 T km_attach +ffffffff818c90f0 T km_refresh +ffffffff818ca000 T ksmn_match +ffffffff818ca050 T ksmn_attach +ffffffff818ca240 T ksmn_ccd_attach +ffffffff818ca390 T ksmn_refresh +ffffffff818ca4e0 T ksmn_read_reg +ffffffff818cb000 t iosf_pci_match +ffffffff818cb060 t iosf_pci_attach +ffffffff818cb100 t iosf_pci_mbi_mdr_rd +ffffffff818cb160 t iosf_pci_mbi_mdr_wr +ffffffff818cc000 T itherm_probe +ffffffff818cc030 T itherm_attach +ffffffff818cc380 T itherm_activate +ffffffff818cc400 T itherm_enable +ffffffff818cc460 T itherm_refresh +ffffffff818cc470 T itherm_refresh_sensor_data +ffffffff818cc860 T itherm_bias_temperature_sensor +ffffffff818cd000 T pchtemp_match +ffffffff818cd030 T pchtemp_attach +ffffffff818cd190 T pchtemp_refresh +ffffffff818ce000 T rtsx_pci_match +ffffffff818ce090 T rtsx_pci_attach +ffffffff818cf000 T xspd_match +ffffffff818cf030 T xspd_attach +ffffffff818cf1f0 T xspd_intr +ffffffff818d0000 T virtio_pci_match +ffffffff818d0080 T virtio_pci_attach +ffffffff818d0420 T virtio_pci_detach +ffffffff818d0500 T virtio_pci_kick +ffffffff818d0560 T virtio_pci_read_device_config_1 +ffffffff818d0590 T virtio_pci_read_device_config_2 +ffffffff818d05c0 T virtio_pci_read_device_config_4 +ffffffff818d05f0 T virtio_pci_read_device_config_8 +ffffffff818d0670 T virtio_pci_write_device_config_1 +ffffffff818d06a0 T virtio_pci_write_device_config_2 +ffffffff818d06d0 T virtio_pci_write_device_config_4 +ffffffff818d0700 T virtio_pci_write_device_config_8 +ffffffff818d0770 T virtio_pci_read_queue_size +ffffffff818d07e0 T virtio_pci_setup_queue +ffffffff818d0ad0 T virtio_pci_set_status +ffffffff818d0b50 T virtio_pci_negotiate_features +ffffffff818d0c90 T virtio_pci_poll_intr +ffffffff818d0d00 T virtio_pci_find_cap +ffffffff818d0ec0 T virtio_pci_attach_10 +ffffffff818d1300 T virtio_pci_attach_09 +ffffffff818d1440 T virtio_pci_adjust_config_region +ffffffff818d14e0 T virtio_pci_setup_msix +ffffffff818d1870 T virtio_pci_legacy_intr +ffffffff818d1910 T virtio_pci_legacy_intr_mpsafe +ffffffff818d19a0 T virtio_pci_free_irqs +ffffffff818d1bf0 T virtio_pci_negotiate_features_10 +ffffffff818d1e30 T virtio_pci_msix_establish +ffffffff818d1f00 T virtio_pci_set_msix_queue_vector +ffffffff818d1f80 T virtio_pci_set_msix_config_vector +ffffffff818d1fc0 T virtio_pci_config_intr +ffffffff818d2000 T virtio_pci_shared_queue_intr +ffffffff818d2010 T virtio_pci_queue_intr +ffffffff818d3000 T dwiic_pci_match +ffffffff818d3030 T dwiic_pci_attach +ffffffff818d3350 T dwiic_pci_activate +ffffffff818d33c0 T dwiic_pci_bus_scan +ffffffff818d4000 T bwfm_pci_buscore_read +ffffffff818d4060 T bwfm_pci_buscore_write +ffffffff818d40d0 T bwfm_pci_buscore_prepare +ffffffff818d4100 T bwfm_pci_buscore_reset +ffffffff818d42f0 T bwfm_pci_buscore_activate +ffffffff818d4320 T bwfm_pci_preinit +ffffffff818d5440 T bwfm_pci_stop +ffffffff818d54d0 T bwfm_pci_txcheck +ffffffff818d5590 T bwfm_pci_txdata +ffffffff818d58f0 T bwfm_pci_msgbuf_query_dcmd +ffffffff818d5d30 T bwfm_pci_msgbuf_set_dcmd +ffffffff818d5d80 T bwfm_pci_match +ffffffff818d5db0 T bwfm_pci_attach +ffffffff818d6020 T bwfm_pci_detach +ffffffff818d6060 T bwfm_pci_activate +ffffffff818d6210 T bwfm_pci_intr +ffffffff818d6470 T bwfm_pci_select_core +ffffffff818d6550 T bwfm_pci_load_microcode +ffffffff818d69d0 T bwfm_pci_dmamem_alloc +ffffffff818d6b70 T bwfm_pci_setup_ring +ffffffff818d6d80 T bwfm_pci_intr_enable +ffffffff818d6dd0 T bwfm_pci_hostready +ffffffff818d6e40 T bwfm_pci_fill_rx_rings +ffffffff818d6e90 T bwfm_pci_dmamem_free +ffffffff818d6f00 T bwfm_pci_cleanup +ffffffff818d7570 T bwfm_pci_send_mb_data +ffffffff818d7690 T bwfm_pci_intmask +ffffffff818d76d0 T bwfm_pci_pktid_avail +ffffffff818d7740 T bwfm_pci_pktid_new +ffffffff818d78a0 T bwfm_pci_pktid_free +ffffffff818d7950 T bwfm_pci_fill_rx_buf_ring +ffffffff818d7cb0 T bwfm_pci_fill_rx_ioctl_ring +ffffffff818d8030 T bwfm_pci_ring_write_reserve +ffffffff818d8120 T bwfm_pci_ring_write_cancel +ffffffff818d8160 T bwfm_pci_ring_write_commit +ffffffff818d8240 T bwfm_pci_ring_write_rptr +ffffffff818d82c0 T bwfm_pci_ring_write_wptr +ffffffff818d8340 T bwfm_pci_setup_flowring +ffffffff818d84a0 T bwfm_pci_ring_bell +ffffffff818d84e0 T bwfm_pci_ring_update_rptr +ffffffff818d8590 T bwfm_pci_ring_update_wptr +ffffffff818d8640 T bwfm_pci_ring_write_reserve_multi +ffffffff818d8760 T bwfm_pci_ring_read_avail +ffffffff818d8860 T bwfm_pci_ring_read_commit +ffffffff818d88f0 T bwfm_pci_ring_rx +ffffffff818d8b00 T bwfm_pci_msg_rx +ffffffff818d90e0 T bwfm_pci_flowring_delete_cb +ffffffff818d9190 T bwfm_pci_msgbuf_rxioctl +ffffffff818d9280 T bwfm_pci_intr_status +ffffffff818d92c0 T bwfm_pci_intr_ack +ffffffff818d9300 T bwfm_pci_flowring_lookup +ffffffff818d9470 T bwfm_pci_flowring_create +ffffffff818d95a0 T bwfm_pci_flowring_create_cb +ffffffff818d98f0 T bwfm_pci_flowring_delete +ffffffff818d9bc0 T bwfm_pci_msgbuf_h2d_mb_write +ffffffff818d9de0 T bwfm_pci_handle_mb_data +ffffffff818d9eb0 T bwfm_pci_intr_disable +ffffffff818da000 T ccp_pci_match +ffffffff818da030 T ccp_pci_attach +ffffffff818db000 T bnxt_match +ffffffff818db030 T bnxt_attach +ffffffff818dc2a0 T bnxt_dmamem_alloc +ffffffff818dc430 T bnxt_dmamem_free +ffffffff818dc4c0 T bnxt_hwrm_ver_get +ffffffff818dc610 T bnxt_hwrm_nvm_get_dev_info +ffffffff818dc760 T bnxt_hwrm_func_drv_rgtr +ffffffff818dc880 T bnxt_hwrm_func_rgtr_async_events +ffffffff818dc9a0 T bnxt_hwrm_func_qcaps +ffffffff818dca80 T bnxt_admin_intr +ffffffff818dcc80 T bnxt_intr +ffffffff818dd150 T bnxt_hwrm_func_qcfg +ffffffff818dd200 T bnxt_hwrm_queue_qportcfg +ffffffff818dd2d0 T bnxt_hwrm_func_reset +ffffffff818dd380 T bnxt_mark_cpr_invalid +ffffffff818dd3e0 T bnxt_hwrm_ring_alloc +ffffffff818dd590 T bnxt_cfg_async_cr +ffffffff818dd690 T bnxt_write_cp_doorbell +ffffffff818dd6d0 T bnxt_set_cp_ring_aggint +ffffffff818dd7b0 T bnxt_ioctl +ffffffff818dd940 T bnxt_start +ffffffff818ddd00 T bnxt_watchdog +ffffffff818ddd30 T bnxt_media_change +ffffffff818dde80 T bnxt_media_status +ffffffff818ddea0 T bnxt_refill +ffffffff818ddf00 T bnxt_media_autonegotiate +ffffffff818ddff0 T bnxt_hwrm_port_phy_qcfg +ffffffff818de490 T bnxt_free_slots +ffffffff818de520 T bnxt_hwrm_cmd_hdr_init +ffffffff818de570 T hwrm_send_message +ffffffff818de5f0 T bnxt_queue_up +ffffffff818df520 T bnxt_hwrm_stat_ctx_alloc +ffffffff818df620 T bnxt_write_tx_doorbell +ffffffff818df690 T bnxt_write_rx_doorbell +ffffffff818df710 T bnxt_hwrm_ring_grp_alloc +ffffffff818df810 T bnxt_rx_fill +ffffffff818df920 T bnxt_hwrm_ring_grp_free +ffffffff818dfa00 T bnxt_hwrm_ring_free +ffffffff818dfaf0 T bnxt_hwrm_stat_ctx_free +ffffffff818dfbe0 T bnxt_queue_down +ffffffff818e02c0 T bnxt_up +ffffffff818e0990 T bnxt_hwrm_vnic_ctx_alloc +ffffffff818e0a70 T bnxt_hwrm_vnic_alloc +ffffffff818e0b70 T bnxt_hwrm_vnic_cfg +ffffffff818e0cb0 T bnxt_hwrm_vnic_cfg_placement +ffffffff818e0d80 T bnxt_hwrm_set_filter +ffffffff818e0f10 T bnxt_hwrm_vnic_rss_cfg +ffffffff818e0ff0 T bnxt_iff +ffffffff818e1160 T bnxt_hwrm_vnic_free +ffffffff818e1250 T bnxt_hwrm_vnic_ctx_free +ffffffff818e1340 T bnxt_down +ffffffff818e16e0 T bnxt_hwrm_free_filter +ffffffff818e17c0 T bnxt_hwrm_cfa_l2_set_rx_mask +ffffffff818e18a0 T bnxt_rxrinfo +ffffffff818e19f0 T bnxt_get_sffpage +ffffffff818e1d00 T bnxt_load_mbuf +ffffffff818e1db0 T bnxt_handle_async_event +ffffffff818e1e00 T bnxt_cpr_next_cmpl +ffffffff818e1e70 T bnxt_cpr_commit +ffffffff818e1ea0 T bnxt_cpr_rollback +ffffffff818e1ed0 T bnxt_write_cp_doorbell_index +ffffffff818e1f50 T bnxt_rx +ffffffff818e2230 T bnxt_txeof +ffffffff818e2360 T bnxt_get_media_type +ffffffff818e28c0 T bnxt_add_media_type +ffffffff818e2a90 T _hwrm_send_message +ffffffff818e5940 T bnxt_rx_fill_slots +ffffffff818e5b00 T bnxt_hwrm_err_map +ffffffff818e5b40 T _bnxt_hwrm_set_async_event_bit +ffffffff818e6000 t mcx_match +ffffffff818e6030 t mcx_attach +ffffffff818e9120 T mcx_rx_fill +ffffffff818e9370 T mcx_load_mbuf +ffffffff818e9420 t mcx_dmamem_alloc +ffffffff818e9580 t mcx_pages +ffffffff818e9e60 t mcx_iff +ffffffff818ea2a0 t mcx_alloc_uar +ffffffff818ea490 t mcx_admin_intr +ffffffff818ea640 t mcx_create_eq +ffffffff818eabd0 t mcx_ioctl +ffffffff818eb6b0 t mcx_start +ffffffff818ebbb0 t mcx_watchdog +ffffffff818ebbe0 t mcx_media_change +ffffffff818ebea0 t mcx_media_status +ffffffff818ebfe0 t mcx_refill +ffffffff818ec050 t mcx_cq_intr +ffffffff818ec570 t mcx_calibrate +ffffffff818ec720 t mcx_port_change +ffffffff818ec860 t mcx_cmdq_post +ffffffff818ec940 t mcx_set_flow_table_entry_mac +ffffffff818ece10 t mcx_delete_flow_table_entry +ffffffff818ed290 t mcx_access_hca_reg +ffffffff818ed6c0 t mcx_cmdq_exec +ffffffff818ed8c0 t mcx_up +ffffffff818f0ba0 t mcx_down +ffffffff818f1c00 t mcx_create_flow_table +ffffffff818f1fb0 t mcx_create_flow_group +ffffffff818f2490 t mcx_destroy_sq +ffffffff818f2740 t mcx_destroy_cq +ffffffff818f2a00 t mcx_arm_cq +ffffffff818f2b20 t mcx_destroy_flow_table +ffffffff818f2e80 t mcx_kstat_attach_ppcnt +ffffffff818f2fb0 t mcx_kstat_ppcnt_read +ffffffff818f30d0 t mcx_kstat_mtmp_read +ffffffff818f3260 t mcx_kstat_queue_read +ffffffff818f46f0 t mcx_timecounter_read +ffffffff818f5000 t iavf_match +ffffffff818f5030 t iavf_attach +ffffffff818f5920 t iavf_reset +ffffffff818f5bf0 t iavf_dmamem_alloc +ffffffff818f5d50 t iavf_arq_fill +ffffffff818f6000 t iavf_arq_timeout +ffffffff818f6030 t iavf_init_admin_queue +ffffffff818f61e0 t iavf_get_version +ffffffff818f6400 t iavf_get_vf_resources +ffffffff818f65d0 t iavf_config_irq_map +ffffffff818f67c0 t iavf_intr +ffffffff818f6e40 t iavf_ioctl +ffffffff818f79f0 t iavf_start +ffffffff818f7d50 t iavf_watchdog +ffffffff818f7d80 t iavf_media_change +ffffffff818f7db0 t iavf_media_status +ffffffff818f7e40 t iavf_arq_unfill +ffffffff818f7f40 t iavf_down +ffffffff818f84a0 t iavf_up +ffffffff818f9110 t iavf_queue_select +ffffffff818f9310 t iavf_rxfill +ffffffff818f9510 t iavf_rxrefill +ffffffff818f9530 t iavf_process_arq +ffffffff818fa000 T rge_match +ffffffff818fa030 T rge_attach +ffffffff818fa530 T rge_activate +ffffffff818fa670 T rge_intr +ffffffff818fa960 T rge_config_imtype +ffffffff818fa9d0 T rge_exit_oob +ffffffff818fb1f0 T rge_hw_init +ffffffff818fb5e0 T rge_get_macaddr +ffffffff818fb660 T rge_set_phy_power +ffffffff818fb8c0 T rge_phy_config +ffffffff818fc200 T rge_allocmem +ffffffff818fc610 T rge_ioctl +ffffffff818fc7c0 T rge_start +ffffffff818fc990 T rge_watchdog +ffffffff818fc9d0 T rge_wol +ffffffff818fcc00 T rge_tick +ffffffff818fcc80 T rge_txstart +ffffffff818fccb0 T rge_ifmedia_upd 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rge_phy_config_mac_cfg3 +ffffffff81903e00 T rge_phy_config_mac_cfg4 +ffffffff81907e70 T rge_phy_config_mac_cfg5 +ffffffff81908960 T rge_patch_phy_mcu +ffffffff81908be0 T rge_write_ephy +ffffffff81908e40 T rge_phy_config_mcu +ffffffff81909900 T rge_read_ephy +ffffffff81909b80 T rge_disable_phy_ocp_pwrsave +ffffffff81909d50 T rge_disable_hw_im +ffffffff81909d80 T rge_disable_sim_im +ffffffff81909de0 T rge_setup_sim_im +ffffffff81909e60 T rge_link_state +ffffffff81909ee0 t rge_kstat_read +ffffffff8190a080 t rge_kstat_copy +ffffffff8190b000 T igc_match +ffffffff8190b030 T igc_attach +ffffffff8190b4a0 T igc_detach +ffffffff8190b6a0 T igc_identify_hardware +ffffffff8190b710 T igc_allocate_pci_resources +ffffffff8190b830 T igc_allocate_queues +ffffffff8190bd20 T igc_is_valid_ether_addr +ffffffff8190bd80 T igc_allocate_msix +ffffffff8190bfe0 T igc_setup_interface +ffffffff8190c220 T igc_reset +ffffffff8190c360 T igc_update_link_status +ffffffff8190c470 T igc_get_hw_control +ffffffff8190c4d0 T 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__drm_atomic_helper_connector_duplicate_state +ffffffff81936a70 T drm_atomic_helper_connector_duplicate_state +ffffffff81936b50 T drm_atomic_helper_connector_destroy_state +ffffffff81936bc0 T __drm_atomic_helper_private_obj_duplicate_state +ffffffff81936c00 T __drm_atomic_helper_bridge_duplicate_state +ffffffff81936c40 T drm_atomic_helper_bridge_duplicate_state +ffffffff81936cf0 T drm_atomic_helper_bridge_destroy_state +ffffffff81936d10 T __drm_atomic_helper_bridge_reset +ffffffff81936d60 T drm_atomic_helper_bridge_reset +ffffffff81937000 T drm_atomic_set_mode_for_crtc +ffffffff81937200 T drm_atomic_set_mode_prop_for_crtc +ffffffff81937490 T drm_atomic_set_crtc_for_plane +ffffffff81937600 T drm_atomic_set_fb_for_plane +ffffffff819376e0 T drm_atomic_set_crtc_for_connector +ffffffff81937840 T drm_atomic_get_property +ffffffff81937f80 T drm_atomic_connector_commit_dpms +ffffffff819380e0 T drm_atomic_set_property +ffffffff81938b90 T drm_mode_atomic_ioctl +ffffffff8193a000 T drm_is_current_master +ffffffff8193a060 T drm_getmagic +ffffffff8193a130 T drm_authmagic +ffffffff8193a1f0 T drm_master_create +ffffffff8193a290 T drm_setmaster_ioctl +ffffffff8193a350 t drm_new_set_master +ffffffff8193a4e0 T drm_dropmaster_ioctl +ffffffff8193a630 T drm_master_open +ffffffff8193a6e0 T drm_master_get +ffffffff8193a710 T drm_master_release +ffffffff8193a860 T drm_master_put +ffffffff8193a8f0 T drm_file_get_master +ffffffff8193a950 T drm_master_internal_acquire +ffffffff8193a9c0 T drm_master_internal_release +ffffffff8193b000 T drm_plane_create_alpha_property +ffffffff8193b0a0 T drm_plane_create_rotation_property +ffffffff8193b1e0 T drm_rotation_simplify +ffffffff8193b260 T drm_plane_create_zpos_property +ffffffff8193b320 T drm_plane_create_zpos_immutable_property +ffffffff8193b3d0 T drm_atomic_normalize_zpos +ffffffff8193b6d0 T drm_plane_create_blend_mode_property +ffffffff8193b870 t drm_atomic_state_zpos_cmp +ffffffff8193c000 T drm_bridge_add +ffffffff8193c070 T devm_drm_bridge_add +ffffffff8193c110 T drm_bridge_remove +ffffffff8193c170 T drm_bridge_attach +ffffffff8193c2f0 T drm_bridge_detach +ffffffff8193c3e0 T drm_bridge_chain_mode_fixup +ffffffff8193c480 T drm_bridge_chain_mode_valid +ffffffff8193c520 T drm_bridge_chain_disable +ffffffff8193c5b0 T drm_bridge_chain_post_disable +ffffffff8193c630 T drm_bridge_chain_mode_set +ffffffff8193c6c0 T drm_bridge_chain_pre_enable +ffffffff8193c750 T drm_bridge_chain_enable +ffffffff8193c7d0 T drm_atomic_bridge_chain_disable +ffffffff8193c8d0 T drm_atomic_bridge_chain_post_disable +ffffffff8193cb00 T drm_atomic_bridge_chain_pre_enable +ffffffff8193cd40 T drm_atomic_bridge_chain_enable +ffffffff8193ce50 T drm_atomic_bridge_chain_check +ffffffff8193d1b0 T drm_bridge_detect +ffffffff8193d210 T drm_bridge_get_modes +ffffffff8193d270 T drm_bridge_get_edid +ffffffff8193d2d0 T drm_bridge_hpd_enable +ffffffff8193d3a0 T drm_bridge_hpd_disable +ffffffff8193d440 T drm_bridge_hpd_notify +ffffffff8193d4a0 t drm_bridge_atomic_duplicate_priv_state +ffffffff8193d4c0 t drm_bridge_atomic_destroy_priv_state +ffffffff8193d4e0 t select_bus_fmt_recursive +ffffffff8193e000 T drm_buddy_init +ffffffff8193e470 T drm_buddy_fini +ffffffff8193e570 T drm_get_buddy +ffffffff8193e5b0 T drm_buddy_free_block +ffffffff8193e750 T drm_buddy_free_list +ffffffff8193e7e0 T drm_buddy_block_trim +ffffffff8193ea30 t __alloc_range +ffffffff8193ee00 T drm_buddy_alloc_blocks +ffffffff8193f6a0 T drm_buddy_block_print +ffffffff8193f6e0 T drm_buddy_print +ffffffff8193f850 T drm_buddy_module_exit +ffffffff8193f870 T drm_buddy_module_init +ffffffff8193f8d0 t split_block +ffffffff81940000 T drm_clflush_pages +ffffffff81940120 T drm_clflush_sg +ffffffff81940270 T drm_clflush_virt_range +ffffffff81940340 T drm_need_swiotlb +ffffffff81940370 T drm_memcpy_from_wc +ffffffff81940710 T drm_memcpy_init_early +ffffffff81941000 T drm_client_init +ffffffff81941110 T drm_client_register +ffffffff819411c0 T drm_client_release +ffffffff81941260 T drm_client_dev_unregister +ffffffff81941350 T drm_client_dev_hotplug +ffffffff81941430 T drm_client_dev_restore +ffffffff81941510 T drm_client_buffer_vmap +ffffffff81941580 T drm_client_buffer_vunmap +ffffffff819415a0 T drm_client_framebuffer_create +ffffffff81941880 T drm_client_framebuffer_delete +ffffffff81941980 T drm_client_framebuffer_flush +ffffffff81942000 T drm_client_modeset_create +ffffffff81942140 T drm_client_modeset_free +ffffffff81942260 T drm_client_modeset_probe +ffffffff81943a50 t drm_client_pick_crtcs +ffffffff81943d40 T drm_client_rotation +ffffffff81943ee0 T drm_client_modeset_check +ffffffff81943f80 t drm_client_modeset_commit_atomic +ffffffff81944180 T drm_client_modeset_commit_locked +ffffffff81944320 T drm_client_modeset_commit +ffffffff81944390 T drm_client_modeset_dpms +ffffffff819445e0 t drm_connector_pick_cmdline_mode +ffffffff81945000 T drm_color_ctm_s31_32_to_qm_n +ffffffff819450e0 T drm_crtc_enable_color_mgmt +ffffffff819451c0 T drm_mode_crtc_set_gamma_size +ffffffff819452e0 T drm_mode_gamma_set_ioctl +ffffffff819457d0 T drm_mode_gamma_get_ioctl +ffffffff81945910 T drm_get_color_encoding_name +ffffffff81945980 T drm_get_color_range_name +ffffffff819459f0 T drm_plane_create_color_properties +ffffffff81945c50 T drm_color_lut_check +ffffffff81946000 T drm_connector_ida_init +ffffffff81946110 T drm_connector_ida_destroy +ffffffff81946220 T drm_get_connector_type_name +ffffffff81946260 T drm_connector_free_work_fn +ffffffff81946320 T drm_connector_init +ffffffff819463a0 t __drm_connector_init +ffffffff819468b0 T drm_connector_init_with_ddc +ffffffff81946940 T drmm_connector_init +ffffffff81946a00 t drm_connector_cleanup_action +ffffffff81946a20 T drm_connector_attach_edid_property +ffffffff81946a40 T drm_connector_attach_encoder +ffffffff81946ac0 T drm_connector_has_possible_encoder +ffffffff81946b00 T drm_connector_cleanup +ffffffff81946e30 T drm_connector_unregister +ffffffff81946ed0 T drm_mode_put_tile_group +ffffffff81946f60 T drm_connector_register +ffffffff81947050 T drm_connector_unregister_all +ffffffff819471f0 T drm_connector_list_iter_begin +ffffffff81947230 T drm_connector_list_iter_next +ffffffff81947340 T drm_connector_list_iter_end +ffffffff81947410 T drm_connector_register_all +ffffffff819475a0 T drm_get_connector_status_name +ffffffff819475f0 T drm_get_connector_force_name +ffffffff81947630 T drm_get_subpixel_order_name +ffffffff81947670 T drm_get_dpms_name +ffffffff819476b0 T drm_display_info_set_bus_formats +ffffffff81947780 T drm_get_dvi_i_select_name +ffffffff819477e0 T drm_get_dvi_i_subconnector_name +ffffffff81947840 T drm_get_tv_select_name +ffffffff819478a0 T drm_get_tv_subconnector_name +ffffffff81947900 T drm_get_dp_subconnector_name +ffffffff81947990 T drm_connector_create_standard_properties +ffffffff81947b10 T drm_mode_create_dvi_i_properties +ffffffff81947bb0 T drm_connector_attach_dp_subconnector_property +ffffffff81947c20 T drm_connector_attach_content_type_property +ffffffff81947cc0 T drm_mode_create_content_type_property +ffffffff81947d40 T drm_connector_attach_tv_margin_properties +ffffffff81947db0 T drm_mode_create_tv_margin_properties +ffffffff81947ed0 T drm_mode_create_tv_properties +ffffffff81948130 T drm_mode_create_scaling_mode_property +ffffffff819481a0 T drm_connector_attach_vrr_capable_property +ffffffff81948230 T drm_connector_attach_scaling_mode_property +ffffffff81948400 T drm_mode_create_aspect_ratio_property +ffffffff81948480 T drm_mode_create_hdmi_colorspace_property +ffffffff81948500 T drm_mode_create_dp_colorspace_property +ffffffff81948580 T drm_mode_create_suggested_offset_properties +ffffffff81948650 T drm_connector_set_path_property +ffffffff819486b0 T drm_connector_set_tile_property +ffffffff81948800 T drm_connector_set_link_status_property +ffffffff81948850 T drm_connector_attach_max_bpc_property +ffffffff81948910 T drm_connector_attach_hdr_output_metadata_property +ffffffff81948960 T drm_connector_attach_colorspace_property +ffffffff819489b0 T drm_connector_atomic_hdr_metadata_equal +ffffffff81948a20 T drm_connector_set_vrr_capable_property +ffffffff81948a70 T drm_connector_set_panel_orientation +ffffffff81948b30 T drm_connector_set_panel_orientation_with_quirk +ffffffff81948c10 T drm_connector_set_orientation_from_panel +ffffffff81948d00 T drm_connector_create_privacy_screen_properties +ffffffff81948da0 T drm_connector_attach_privacy_screen_properties +ffffffff81948e10 T drm_connector_attach_privacy_screen_provider +ffffffff81948f20 t drm_connector_privacy_screen_notifier +ffffffff81948fc0 T drm_connector_update_privacy_screen +ffffffff81949030 T drm_connector_set_obj_prop +ffffffff81949110 T drm_connector_property_set_ioctl +ffffffff81949170 T drm_mode_getconnector +ffffffff819496b0 T drm_connector_find_by_fwnode +ffffffff81949760 T drm_connector_oob_hotplug_event +ffffffff81949850 T drm_mode_get_tile_group +ffffffff81949920 T drm_mode_create_tile_group +ffffffff819499f0 t drm_connector_free +ffffffff81949a30 t kasprintf +ffffffff8194a000 T drm_crtc_from_index +ffffffff8194a060 T drm_crtc_force_disable +ffffffff8194a180 T drm_mode_set_config_internal +ffffffff8194a200 T drm_crtc_register_all +ffffffff8194a290 T drm_crtc_unregister_all +ffffffff8194a300 T drm_crtc_create_fence +ffffffff8194a390 T drm_crtc_init_with_planes +ffffffff8194a460 t __drm_crtc_init_with_planes +ffffffff8194a850 T drmm_crtc_init_with_planes +ffffffff8194a950 T __drmm_crtc_alloc_with_planes +ffffffff8194aac0 T drm_crtc_cleanup +ffffffff8194abe0 T drm_mode_getcrtc +ffffffff8194ad80 t __drm_mode_set_config_internal +ffffffff8194af20 T drm_crtc_check_viewport +ffffffff8194afd0 T drm_mode_setcrtc +ffffffff8194b730 T drm_mode_crtc_set_obj_prop +ffffffff8194b7b0 T drm_crtc_create_scaling_filter_property +ffffffff8194b820 t drm_crtc_fence_get_driver_name +ffffffff8194b8a0 t drm_crtc_fence_get_timeline_name +ffffffff8194b910 t kasprintf +ffffffff8194b9e0 t drmm_crtc_init_with_planes_cleanup +ffffffff8194c000 T drm_helper_encoder_in_use +ffffffff8194c180 T drm_helper_crtc_in_use +ffffffff8194c2b0 T drm_helper_disable_unused_functions +ffffffff8194c330 t __drm_helper_disable_unused_functions +ffffffff8194c430 T drm_crtc_helper_set_mode +ffffffff8194c8e0 T drm_connector_get_single_encoder +ffffffff8194c9e0 T drm_crtc_helper_set_config +ffffffff8194d600 T drm_helper_connector_dpms +ffffffff8194d8f0 T drm_helper_resume_force_mode +ffffffff8194dbe0 T drm_helper_force_disable_all +ffffffff8194dcb0 t drm_encoder_disable +ffffffff8194e000 T drm_atomic_helper_check_plane_damage +ffffffff8194e0a0 T drm_atomic_helper_dirtyfb +ffffffff8194e350 T drm_atomic_helper_damage_iter_init +ffffffff8194e4a0 T drm_atomic_helper_damage_iter_next +ffffffff8194e540 T drm_atomic_helper_damage_merged +ffffffff8194f000 T displayid_iter_edid_begin +ffffffff8194f050 T __displayid_iter_next +ffffffff8194f310 T displayid_iter_end +ffffffff81950000 T drm_mode_create_dumb +ffffffff819500c0 T drm_mode_create_dumb_ioctl +ffffffff81950180 T drm_mode_mmap_dumb_ioctl +ffffffff819501f0 T drm_mode_destroy_dumb +ffffffff81950260 T drm_mode_destroy_dumb_ioctl +ffffffff81951000 T drm_edid_header_is_valid +ffffffff81951080 T drm_edid_are_equal +ffffffff819510f0 T drm_edid_block_valid +ffffffff819512f0 t edid_block_check +ffffffff81951420 t edid_block_status_print +ffffffff81951520 T drm_edid_is_valid +ffffffff819515a0 T drm_edid_override_set +ffffffff81951610 T drm_connector_update_edid_property +ffffffff819517c0 T drm_edid_override_reset +ffffffff819518f0 T drm_add_override_edid_modes +ffffffff81951ad0 T drm_add_edid_modes +ffffffff81951bc0 T drm_do_get_edid +ffffffff81951be0 t _drm_do_get_edid +ffffffff819520f0 T drm_edid_raw +ffffffff81952180 T drm_edid_alloc +ffffffff81952250 T drm_edid_dup +ffffffff81952330 T drm_edid_free +ffffffff81952390 T drm_probe_ddc +ffffffff81952490 t drm_do_probe_ddc_edid +ffffffff819525e0 T drm_get_edid +ffffffff81952720 T drm_edid_read_custom +ffffffff81952810 T drm_edid_read_ddc +ffffffff81952940 T drm_edid_read +ffffffff819529c0 T drm_edid_get_panel_id +ffffffff81952aa0 t edid_block_read +ffffffff81952d10 T drm_get_edid_switcheroo +ffffffff81952d60 T drm_edid_duplicate +ffffffff81952de0 T drm_mode_find_dmt +ffffffff81952f00 T drm_mode_fixup_1366x768 +ffffffff81952f60 T drm_find_edid_extension +ffffffff81953170 T drm_match_cea_mode +ffffffff819533c0 T drm_display_mode_from_cea_vic +ffffffff81953430 T drm_edid_get_monitor_name +ffffffff819534e0 t get_monitor_name +ffffffff81953840 T drm_edid_to_sad +ffffffff81953a50 T drm_edid_to_speaker_allocation +ffffffff81953c00 T drm_av_sync_delay +ffffffff81953cb0 T drm_detect_hdmi_monitor +ffffffff81953dd0 T drm_detect_monitor_audio +ffffffff81953fe0 T drm_default_rgb_quant_range +ffffffff81954020 T drm_edid_connector_update +ffffffff81954080 t _drm_edid_connector_update +ffffffff81955f30 t _drm_update_tile_info +ffffffff819561c0 t _drm_edid_connector_property_update +ffffffff81956370 T drm_add_modes_noedid +ffffffff81956460 T drm_set_preferred_mode +ffffffff819564c0 T drm_hdmi_avi_infoframe_from_display_mode +ffffffff81956740 T drm_hdmi_avi_infoframe_quant_range +ffffffff819567e0 T drm_hdmi_vendor_infoframe_from_display_mode +ffffffff819568a0 t connector_bad_edid +ffffffff81956a60 t drm_for_each_detailed_block +ffffffff81956cb0 t __cea_db_iter_next +ffffffff81956f50 t update_display_info +ffffffff81957e20 t get_monitor_range +ffffffff81957ec0 t do_detailed_mode +ffffffff819587e0 t hdmi_mode_alternate_clock +ffffffff81958890 t do_cvt_mode +ffffffff81958ae0 t drm_mode_std +ffffffff819597f0 t do_standard_modes +ffffffff81959940 t drm_monitor_supports_rb +ffffffff81959c30 t drm_gtf2_hbreak +ffffffff81959ec0 t do_established_modes +ffffffff8195a0c0 t drm_match_hdmi_mode +ffffffff8195a300 t do_inferred_modes +ffffffff8195a870 t mode_in_range +ffffffff8195b000 T drm_encoder_register_all +ffffffff8195b090 T drm_encoder_unregister_all +ffffffff8195b100 T drm_encoder_init +ffffffff8195b1d0 t __drm_encoder_init +ffffffff8195b390 T drm_encoder_cleanup +ffffffff8195b4c0 T __drmm_encoder_alloc +ffffffff8195b5e0 T drmm_encoder_init +ffffffff8195b6c0 T drm_mode_getencoder +ffffffff8195b820 t kasprintf +ffffffff8195b8f0 t drmm_encoder_alloc_release +ffffffff8195c000 T drm_i2c_encoder_dpms +ffffffff8195c020 T drm_i2c_encoder_mode_fixup +ffffffff8195c060 T drm_i2c_encoder_prepare +ffffffff8195c080 T drm_i2c_encoder_commit +ffffffff8195c0a0 T drm_i2c_encoder_mode_set +ffffffff8195c0c0 T drm_i2c_encoder_detect +ffffffff8195c0e0 T drm_i2c_encoder_save +ffffffff8195c100 T drm_i2c_encoder_restore +ffffffff8195d000 T drm_fb_helper_debug_enter +ffffffff8195d100 T drm_fb_helper_debug_leave +ffffffff8195d270 T drm_fb_helper_restore_fbdev_mode_unlocked +ffffffff8195d310 T drm_fb_helper_blank +ffffffff8195d3a0 T drm_fb_helper_prepare +ffffffff8195d480 t drm_fb_helper_resume_worker +ffffffff8195d4b0 t drm_fb_helper_damage_work +ffffffff8195d830 T drm_fb_helper_init +ffffffff8195d8a0 T drm_fb_helper_alloc_fbi +ffffffff8195d900 T drm_fb_helper_unregister_fbi +ffffffff8195d930 T drm_fb_helper_fini +ffffffff8195da30 T drm_fb_helper_set_suspend +ffffffff8195da60 T drm_fb_helper_set_suspend_unlocked +ffffffff8195da90 T drm_fb_helper_set_par +ffffffff8195db80 T drm_fb_helper_pan_display +ffffffff8195dc50 T drm_fb_helper_fill_info +ffffffff8195dd10 T drm_fb_helper_initial_config +ffffffff8195dd40 t __drm_fb_helper_initial_config_and_unlock +ffffffff8195e290 T drm_fb_helper_hotplug_event +ffffffff8195e490 t drm_setup_crtcs_fb +ffffffff8195e5d0 T drm_fb_helper_lastclose +ffffffff8195e680 T drm_fb_helper_output_poll_changed +ffffffff8195e6a0 T drm_fbdev_generic_setup +ffffffff8195e820 t drm_fbdev_client_unregister +ffffffff8195e890 t drm_fbdev_client_restore +ffffffff8195e930 t drm_fbdev_client_hotplug +ffffffff8195eb60 t drm_fbdev_cleanup +ffffffff8195ec00 t drm_fbdev_use_shadow_fb +ffffffff8195ec50 t drm_fb_helper_generic_probe +ffffffff8195f000 T drm_dev_needs_global_mutex +ffffffff8195f060 T drm_file_alloc +ffffffff8195f2c0 T drm_file_free +ffffffff8195f4f0 T drm_lastclose +ffffffff8195f560 T drm_release +ffffffff8195f5b0 T drm_release_noglobal +ffffffff8195f600 T drm_read +ffffffff8195f650 T drm_event_reserve_init_locked +ffffffff8195f6d0 T drm_event_reserve_init +ffffffff8195f790 T drm_event_cancel_free +ffffffff8195f810 T drm_send_event_timestamp_locked +ffffffff8195f820 t drm_send_event_helper +ffffffff8195f9f0 T drm_send_event_locked +ffffffff8195fa10 T drm_send_event +ffffffff8195fa60 T mock_drm_getfile +ffffffff81960000 T drm_flip_work_allocate_task +ffffffff81960060 T drm_flip_work_queue_task +ffffffff819600b0 T drm_flip_work_queue +ffffffff81960150 T drm_flip_work_commit +ffffffff819601d0 T drm_flip_work_init +ffffffff81960240 t flip_worker +ffffffff81960320 T drm_flip_work_cleanup +ffffffff81961000 T drm_fb_clip_offset +ffffffff81961040 T drm_fb_memcpy +ffffffff819612c0 T drm_fb_swab +ffffffff819613c0 t drm_fb_swab32_line +ffffffff81961420 t drm_fb_swab16_line +ffffffff81961480 t drm_fb_xfrm +ffffffff81961740 T drm_fb_xrgb8888_to_rgb332 +ffffffff819617a0 t drm_fb_xrgb8888_to_rgb332_line +ffffffff81961890 T drm_fb_xrgb8888_to_rgb565 +ffffffff81961910 t drm_fb_xrgb8888_to_rgb565_swab_line +ffffffff81961990 t drm_fb_xrgb8888_to_rgb565_line +ffffffff81961a80 T drm_fb_xrgb8888_to_rgb888 +ffffffff81961ae0 t drm_fb_xrgb8888_to_rgb888_line +ffffffff81961b70 T drm_fb_xrgb8888_to_xrgb2101010 +ffffffff81961bd0 t drm_fb_xrgb8888_to_xrgb2101010_line +ffffffff81961c50 T drm_fb_xrgb8888_to_gray8 +ffffffff81961cb0 t drm_fb_xrgb8888_to_gray8_line +ffffffff81961d30 T drm_fb_blit +ffffffff81962180 T drm_fb_xrgb8888_to_mono +ffffffff81962510 T drm_fb_build_fourcc_list +ffffffff81962830 t drm_fb_rgb888_to_xrgb8888_line +ffffffff81962900 t drm_fb_rgb565_to_xrgb8888_line +ffffffff81963000 T drm_mode_legacy_fb_format +ffffffff819630f0 T drm_driver_legacy_fb_format +ffffffff819631f0 T __drm_format_info +ffffffff81963270 T drm_format_info +ffffffff81963330 T drm_get_format_info +ffffffff81963410 T drm_format_info_block_width +ffffffff81963460 T drm_format_info_block_height +ffffffff819634b0 T drm_format_info_bpp +ffffffff81963530 T drm_format_info_min_pitch +ffffffff81964000 T drm_framebuffer_check_src_coords +ffffffff81964120 T drm_mode_addfb +ffffffff81964330 T drm_mode_addfb2 +ffffffff81964420 T drm_mode_addfb_ioctl +ffffffff81964440 T drm_internal_framebuffer_create +ffffffff81964960 T drm_mode_addfb2_ioctl +ffffffff81964a50 T drm_mode_rmfb +ffffffff81964c20 T drm_framebuffer_lookup +ffffffff81964c70 t drm_mode_rmfb_work_fn +ffffffff81964d30 T drm_mode_rmfb_ioctl +ffffffff81964d50 T drm_mode_getfb +ffffffff81964eb0 T drm_mode_getfb2_ioctl +ffffffff81965260 T drm_mode_dirtyfb_ioctl +ffffffff81965400 T drm_fb_release +ffffffff81965510 T drm_framebuffer_free +ffffffff81965550 T drm_framebuffer_init +ffffffff819656b0 T drm_framebuffer_unregister_private +ffffffff819656f0 T drm_framebuffer_cleanup +ffffffff81965750 T drm_framebuffer_remove +ffffffff81965c00 T drm_framebuffer_plane_width +ffffffff81965c50 T drm_framebuffer_plane_height +ffffffff81965ca0 T drm_framebuffer_print_info +ffffffff81966000 T drm_ref +ffffffff81966030 T drm_unref +ffffffff819660b0 T drm_fault +ffffffff81966270 T drm_flush +ffffffff819662a0 T udv_attach_drm +ffffffff819664c0 T drm_gem_init +ffffffff81966570 t drm_gem_init_release +ffffffff81966590 T drm_gem_object_init +ffffffff819666f0 T drm_gem_private_object_init +ffffffff819667f0 T drm_gem_handle_delete +ffffffff819668e0 t drm_gem_object_release_handle +ffffffff81966970 T drm_gem_dumb_map_offset +ffffffff81966aa0 T drm_gem_object_lookup +ffffffff81966b20 T drm_gem_create_mmap_offset +ffffffff81966b50 T drm_gem_dumb_destroy +ffffffff81966b70 T drm_gem_handle_create_tail +ffffffff81966ce0 t drm_gem_object_handle_put_unlocked +ffffffff81966e30 T drm_gem_handle_create +ffffffff81966e80 T drm_gem_free_mmap_offset +ffffffff81966eb0 T drm_gem_create_mmap_offset_size +ffffffff81966ee0 T drm_gem_get_pages +ffffffff81966f30 T drm_gem_put_pages +ffffffff81966f60 T drm_gem_objects_lookup +ffffffff819670d0 T drm_gem_dma_resv_wait +ffffffff81967210 T drm_gem_close_ioctl +ffffffff81967260 T drm_gem_flink_ioctl +ffffffff819673d0 T drm_gem_open_ioctl +ffffffff81967500 T drm_gem_open +ffffffff81967530 T drm_gem_release +ffffffff81967570 T drm_gem_object_release +ffffffff819676c0 T drm_gem_lru_remove +ffffffff819677a0 T drm_gem_object_free +ffffffff819677f0 T drm_gem_mmap_obj +ffffffff81967900 T drm_gem_mmap +ffffffff81967b80 T drm_gem_print_info +ffffffff81967ca0 T drm_gem_pin +ffffffff81967ce0 T drm_gem_unpin +ffffffff81967d20 T drm_gem_vmap +ffffffff81967d80 T drm_gem_vunmap +ffffffff81967df0 T drm_gem_lock_reservations +ffffffff81968060 T drm_gem_unlock_reservations +ffffffff81968150 T drm_gem_lru_init +ffffffff81968190 T drm_gem_lru_move_tail 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drm_setclientcap +ffffffff8196d000 T tasklet_unlock_wait +ffffffff8196d080 T tasklet_unlock_spin_wait +ffffffff8196d100 T tasklet_run +ffffffff8196d180 T set_current_state +ffffffff8196d220 T __set_current_state +ffffffff8196d2b0 T schedule +ffffffff8196d2f0 T schedule_timeout +ffffffff8196d3a0 T schedule_timeout_uninterruptible +ffffffff8196d400 T wake_up_process +ffffffff8196d480 T autoremove_wake_function +ffffffff8196d530 T prepare_to_wait +ffffffff8196d620 T finish_wait +ffffffff8196d6d0 T flush_workqueue +ffffffff8196d710 T flush_work +ffffffff8196d760 T flush_delayed_work +ffffffff8196d800 T kthread_func +ffffffff8196d840 T kthread_run +ffffffff8196d920 T kthread_create_worker +ffffffff8196d9e0 T kthread_destroy_worker +ffffffff8196da20 T kthread_init_work +ffffffff8196da40 T kthread_queue_work +ffffffff8196da80 T kthread_cancel_work_sync +ffffffff8196dac0 T kthread_flush_work +ffffffff8196db00 T kthread_flush_worker +ffffffff8196db40 T kthread_lookup +ffffffff8196dbc0 T kthread_should_park +ffffffff8196dc40 T kthread_parkme +ffffffff8196dd00 T kthread_park +ffffffff8196de00 T kthread_unpark +ffffffff8196de60 T kthread_should_stop +ffffffff8196dee0 T kthread_stop +ffffffff8196e040 T dmi_match +ffffffff8196e0f0 T dmi_first_match +ffffffff8196e1d0 T dmi_get_system_info +ffffffff8196e240 T dmi_check_system +ffffffff8196e340 T alloc_pages +ffffffff8196e410 T __free_pages +ffffffff8196e510 T __pagevec_release +ffffffff8196e5c0 T kmap +ffffffff8196e600 T kunmap_va +ffffffff8196e620 T kmap_atomic_prot +ffffffff8196e6b0 T kunmap_atomic +ffffffff8196e730 T vmap +ffffffff8196e810 T vunmap +ffffffff8196e860 T is_vmalloc_addr +ffffffff8196e8a0 T print_hex_dump +ffffffff8196e970 T memchr_inv +ffffffff8196e9c0 T panic_cmp +ffffffff8196e9e0 T linux_root_RB_INSERT_COLOR +ffffffff8196ebe0 T linux_root_RB_REMOVE_COLOR +ffffffff8196ef20 T linux_root_RB_REMOVE +ffffffff8196f050 T linux_root_RB_INSERT +ffffffff8196f0c0 T linux_root_RB_FIND +ffffffff8196f110 T linux_root_RB_NFIND +ffffffff8196f160 T linux_root_RB_NEXT +ffffffff8196f1d0 T linux_root_RB_PREV +ffffffff8196f240 T linux_root_RB_MINMAX +ffffffff8196f290 T idr_init +ffffffff8196f2c0 T idr_destroy +ffffffff8196f400 T idr_tree_SPLAY_REMOVE +ffffffff8196f480 T idr_preload +ffffffff8196f510 T idr_alloc +ffffffff8196f6b0 T idr_tree_SPLAY_INSERT +ffffffff8196f750 T idr_replace +ffffffff8196f7d0 T idr_remove +ffffffff8196f890 T idr_find +ffffffff8196f900 T idr_get_next +ffffffff8196fa30 T idr_for_each +ffffffff8196fb40 T idr_cmp +ffffffff8196fb80 T idr_tree_SPLAY +ffffffff8196fcb0 T idr_tree_SPLAY_MINMAX +ffffffff8196fda0 T ida_init +ffffffff8196fdd0 T ida_destroy +ffffffff8196fde0 T ida_simple_get +ffffffff8196fe00 T ida_simple_remove +ffffffff8196fe20 T ida_alloc_min +ffffffff8196fe40 T ida_alloc_max +ffffffff8196fe60 T ida_free +ffffffff8196fe80 T xarray_cmp +ffffffff8196fec0 T xarray_tree_SPLAY_INSERT +ffffffff8196ff60 T xarray_tree_SPLAY +ffffffff81970090 T xarray_tree_SPLAY_REMOVE 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register_acpi_notifier +ffffffff819714d0 T unregister_acpi_notifier +ffffffff81971560 T acpi_format_exception +ffffffff819715b0 T backlight_do_update_status +ffffffff819715d0 T backlight_device_register +ffffffff81971660 T backlight_device_unregister +ffffffff81971680 T devm_backlight_device_register +ffffffff819716d0 T backlight_schedule_update_status +ffffffff819716f0 T backlight_enable +ffffffff81971730 T backlight_disable +ffffffff81971770 T drm_sysfs_hotplug_event +ffffffff81971790 T drm_sysfs_connector_hotplug_event +ffffffff819717b0 T drm_sysfs_connector_status_event +ffffffff819717d0 T dma_fence_get +ffffffff81971810 T dma_fence_get_rcu +ffffffff81971850 T dma_fence_get_rcu_safe +ffffffff81971890 T dma_fence_release +ffffffff819718c0 T dma_fence_put +ffffffff81971930 T dma_fence_signal_timestamp_locked +ffffffff81971a00 T dma_fence_signal +ffffffff81971b40 T dma_fence_signal_locked +ffffffff81971c70 T dma_fence_signal_timestamp +ffffffff81971d60 T dma_fence_is_signaled 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+ffffffff81973270 t dma_fence_array_release +ffffffff81973330 T dma_fence_chain_find_seqno +ffffffff81973450 T dma_fence_chain_walk +ffffffff81973690 T dma_fence_chain_init +ffffffff819737a0 t dma_fence_chain_get_driver_name +ffffffff819737d0 t dma_fence_chain_get_timeline_name +ffffffff81973800 t dma_fence_chain_enable_signaling +ffffffff819739b0 t dma_fence_chain_signaled +ffffffff81973aa0 t dma_fence_chain_release +ffffffff81973be0 T dma_fence_is_container +ffffffff81973c30 T dmabuf_read +ffffffff81973c60 T dmabuf_write +ffffffff81973c90 T dmabuf_ioctl +ffffffff81973cc0 T dmabuf_kqfilter +ffffffff81973cf0 T dmabuf_stat +ffffffff81973db0 T dmabuf_close +ffffffff81973e20 T dmabuf_seek +ffffffff81973eb0 T dma_buf_export +ffffffff81973f60 T dma_buf_get +ffffffff81973ff0 T dma_buf_put +ffffffff819740c0 T dma_buf_fd +ffffffff819741e0 T get_dma_buf +ffffffff81974220 T pcie_get_speed_cap +ffffffff819743c0 T printk +ffffffff81974450 T pcie_get_width_cap +ffffffff81974540 T pcie_aspm_enabled +ffffffff819745d0 T wait_on_bit +ffffffff819746a0 T wait_on_bit_timeout +ffffffff81974770 T wake_up_bit +ffffffff819747b0 T clear_and_wake_up_bit +ffffffff81974800 T bit_waitqueue +ffffffff81974830 T __var_waitqueue +ffffffff81974860 T drm_linux_init +ffffffff819749d0 T drm_linux_exit +ffffffff81974a30 T pci_resize_resource +ffffffff81974b80 T register_shrinker +ffffffff81974bd0 T unregister_shrinker +ffffffff81974c30 T drmbackoff +ffffffff81974cc0 T bitmap_zalloc +ffffffff81974cf0 T bitmap_free +ffffffff81974d10 T atomic_dec_and_mutex_lock +ffffffff81974d90 T interval_tree_iter_first +ffffffff81974e40 T interval_tree_remove +ffffffff81974e60 T interval_tree_insert +ffffffff81974ed0 T syncfile_read +ffffffff81974f00 T syncfile_write +ffffffff81974f30 T syncfile_ioctl +ffffffff81974f60 T syncfile_kqfilter +ffffffff81974f90 T syncfile_stat +ffffffff81975040 T syncfile_close +ffffffff819750e0 T syncfile_seek +ffffffff81975160 T fd_install +ffffffff81975230 T fput +ffffffff81975280 T get_unused_fd_flags +ffffffff81975390 T put_unused_fd +ffffffff81975420 T sync_file_get_fence +ffffffff819754d0 T sync_file_create +ffffffff81975560 T drm_firmware_drivers_only +ffffffff81975590 t dma_fence_stub_get_name +ffffffff819755c0 t dma_fence_array_cb_func +ffffffff81975640 t dma_fence_chain_cb +ffffffff81975700 t dma_fence_chain_timo +ffffffff81976000 T drmm_kzalloc +ffffffff81976100 T drmm_kcalloc +ffffffff81976210 T drmm_kstrdup +ffffffff81976350 T drmm_kfree +ffffffff81976450 T drmm_add_action +ffffffff81976510 T drmm_add_action_or_reset +ffffffff819765e0 T drm_managed_release +ffffffff819766a0 T drmm_add_final_kfree +ffffffff81977000 T mipi_dsi_attach +ffffffff81977050 T mipi_dsi_detach +ffffffff819770a0 T devm_mipi_dsi_attach +ffffffff81977110 T mipi_dsi_packet_format_is_short +ffffffff81977160 T mipi_dsi_packet_format_is_long +ffffffff819771b0 T mipi_dsi_create_packet +ffffffff819772c0 T mipi_dsi_shutdown_peripheral +ffffffff81977370 T mipi_dsi_turn_on_peripheral +ffffffff81977420 T mipi_dsi_set_maximum_return_packet_size +ffffffff819774d0 T mipi_dsi_compression_mode +ffffffff81977580 T mipi_dsi_picture_parameter_set +ffffffff81977630 T mipi_dsi_generic_write +ffffffff819776f0 T mipi_dsi_generic_read +ffffffff819777a0 T mipi_dsi_dcs_write_buffer +ffffffff81977860 T mipi_dsi_dcs_write +ffffffff819779b0 T mipi_dsi_dcs_read +ffffffff81977a50 T mipi_dsi_dcs_nop +ffffffff81977b00 T mipi_dsi_dcs_soft_reset +ffffffff81977bb0 T mipi_dsi_dcs_get_power_mode +ffffffff81977c70 T mipi_dsi_dcs_get_pixel_format +ffffffff81977d30 T mipi_dsi_dcs_enter_sleep_mode +ffffffff81977de0 T mipi_dsi_dcs_exit_sleep_mode +ffffffff81977e90 T mipi_dsi_dcs_set_display_off +ffffffff81977f40 T mipi_dsi_dcs_set_display_on +ffffffff81977ff0 T mipi_dsi_dcs_set_column_address +ffffffff819780b0 T mipi_dsi_dcs_set_page_address +ffffffff81978170 T mipi_dsi_dcs_set_tear_off +ffffffff81978220 T mipi_dsi_dcs_set_tear_on +ffffffff819782d0 T mipi_dsi_dcs_set_pixel_format +ffffffff81979000 T __drm_mm_interval_first +ffffffff819790c0 T drm_mm_reserve_node +ffffffff81979370 t add_hole +ffffffff819794d0 T drm_mm_insert_node_in_range +ffffffff81979ac0 T drm_mm_remove_node +ffffffff81979bf0 T drm_mm_replace_node +ffffffff81979dd0 T drm_mm_scan_init_with_range +ffffffff81979e50 T drm_mm_scan_add_block +ffffffff81979fc0 T drm_mm_scan_remove_block +ffffffff8197a040 T drm_mm_scan_color_evict +ffffffff8197a120 T drm_mm_init +ffffffff8197a1d0 T drm_mm_takedown +ffffffff8197a210 T drm_mm_print +ffffffff8197b000 T drm_modeset_register_all +ffffffff8197b0a0 T drm_modeset_unregister_all +ffffffff8197b0e0 T drm_mode_getresources +ffffffff8197b390 T drm_mode_config_reset +ffffffff8197b4f0 T drmm_mode_config_init +ffffffff8197bb70 T drm_mode_config_cleanup +ffffffff8197beb0 t drm_mode_config_init_release +ffffffff8197bec0 T drm_mode_config_validate +ffffffff8197d000 T __drm_mode_object_add +ffffffff8197d100 T drm_mode_object_add +ffffffff8197d1e0 T drm_mode_object_register +ffffffff8197d230 T drm_mode_object_unregister +ffffffff8197d2d0 T drm_mode_object_lease_required +ffffffff8197d320 T __drm_mode_object_find +ffffffff8197d3d0 T drm_mode_object_find +ffffffff8197d480 T drm_mode_object_put +ffffffff8197d500 T drm_mode_object_get +ffffffff8197d560 T drm_object_attach_property +ffffffff8197d670 T drm_object_property_set_value +ffffffff8197d750 T drm_object_property_get_value +ffffffff8197d7e0 t __drm_object_property_get_value +ffffffff8197d8c0 T drm_object_property_get_default_value +ffffffff8197d990 T drm_mode_object_get_properties +ffffffff8197dae0 T drm_mode_obj_get_properties_ioctl +ffffffff8197dd30 T drm_mode_obj_find_prop_id +ffffffff8197dd90 T drm_mode_obj_set_property_ioctl +ffffffff8197f000 T drm_mode_debug_printmodeline +ffffffff8197f140 T drm_mode_vrefresh +ffffffff8197f1e0 T drm_mode_create +ffffffff8197f200 T drm_mode_destroy +ffffffff8197f240 T drm_mode_probed_add +ffffffff8197f2e0 T drm_cvt_mode +ffffffff8197f790 T drm_mode_set_name +ffffffff8197f7e0 T drm_gtf_mode_complex +ffffffff8197fae0 T drm_gtf_mode +ffffffff8197fb30 T drm_mode_get_hv_timing +ffffffff8197fb80 T drm_mode_init +ffffffff8197fc50 T drm_mode_set_crtcinfo +ffffffff8197fe00 T drm_mode_copy +ffffffff8197fe60 T drm_mode_duplicate +ffffffff8197fee0 T drm_mode_match +ffffffff81980080 T drm_mode_equal +ffffffff819800a0 T drm_mode_equal_no_clocks +ffffffff819800c0 T drm_mode_equal_no_clocks_no_stereo +ffffffff81980180 T drm_mode_validate_driver +ffffffff81980270 T drm_mode_validate_size +ffffffff819802c0 T drm_mode_validate_ycbcr420 +ffffffff81980330 T drm_mode_is_420_only +ffffffff81980380 T drm_get_mode_status_name +ffffffff81980400 T drm_mode_prune_invalid +ffffffff81980690 T drm_mode_sort +ffffffff819806c0 t drm_mode_compare +ffffffff81980850 T drm_connector_list_update +ffffffff81980a20 T drm_mode_parse_command_line_for_connector +ffffffff81980a50 T drm_mode_create_from_cmdline_mode +ffffffff81980b40 T drm_mode_convert_to_umode +ffffffff81980cd0 T drm_mode_convert_umode +ffffffff81980ef0 T drm_mode_is_420_also +ffffffff81980f40 T drm_mode_is_420 +ffffffff81981000 T drm_helper_move_panel_connectors_to_head +ffffffff819810f0 T drm_helper_mode_fill_fb_struct +ffffffff819811b0 T drm_crtc_init +ffffffff81981280 T drm_mode_config_helper_suspend +ffffffff81981310 T drm_mode_config_helper_resume +ffffffff81982000 T drm_modeset_lock_all +ffffffff819821e0 T drm_modeset_acquire_init +ffffffff81982270 T drm_modeset_lock_all_ctx +ffffffff819823e0 T drm_modeset_backoff +ffffffff819824b0 T drm_modeset_acquire_fini +ffffffff819824e0 T drm_warn_on_modeset_not_all_locked +ffffffff81982630 T drm_modeset_unlock_all +ffffffff81982710 T drm_modeset_drop_locks +ffffffff819827a0 T drm_modeset_unlock +ffffffff81982870 t modeset_lock +ffffffff81982ae0 T drm_modeset_lock_init +ffffffff81982b40 T drm_modeset_lock +ffffffff81982ba0 T drm_modeset_lock_single_interruptible +ffffffff81982bc0 t __ww_mutex_lock +ffffffff81983000 T drm_mtrr_add +ffffffff81983070 T drm_mtrr_del +ffffffff81984000 T drm_panel_init +ffffffff81984040 T drm_panel_add +ffffffff81984090 T drm_panel_remove +ffffffff819840f0 T drm_panel_prepare +ffffffff81984140 T drm_panel_unprepare +ffffffff81984190 T drm_panel_enable +ffffffff81984230 T drm_panel_disable +ffffffff819842c0 T drm_panel_get_modes +ffffffff81984310 T drm_panel_of_backlight +ffffffff81985000 T drm_get_panel_orientation_quirk +ffffffff81986000 T drm_pci_set_busid +ffffffff81986090 t kasprintf +ffffffff81987000 T drm_universal_plane_init +ffffffff819870f0 t __drm_universal_plane_init +ffffffff819877e0 T __drmm_universal_plane_alloc +ffffffff81987920 t drmm_universal_plane_alloc_release +ffffffff81987970 T __drm_universal_plane_alloc +ffffffff81987ab0 T drm_plane_register_all +ffffffff81987ba0 T drm_plane_unregister_all +ffffffff81987c10 T drm_plane_cleanup +ffffffff81987d60 T drm_plane_from_index +ffffffff81987dc0 T drm_plane_force_disable +ffffffff81987ed0 T drm_mode_plane_set_obj_prop +ffffffff81987f50 T drm_mode_getplane_res +ffffffff81988050 T drm_mode_getplane +ffffffff819881b0 T drm_plane_check_pixel_format +ffffffff81988270 T drm_any_plane_has_format +ffffffff819883b0 T drm_mode_setplane +ffffffff81988710 T drm_mode_cursor_ioctl +ffffffff81988780 t drm_mode_cursor_common +ffffffff81988e00 T drm_mode_cursor2_ioctl +ffffffff81988e20 T drm_mode_page_flip_ioctl +ffffffff81989390 T drm_plane_enable_fb_damage_clips +ffffffff819893b0 T drm_plane_get_damage_clips_count +ffffffff819893f0 T __drm_plane_get_damage_clips +ffffffff81989430 T drm_plane_get_damage_clips +ffffffff819894d0 T drm_create_scaling_filter_prop +ffffffff81989620 T drm_plane_create_scaling_filter_property +ffffffff81989690 t kasprintf +ffffffff81989760 t __setplane_internal +ffffffff81989950 t __setplane_check +ffffffff8198a000 T drm_plane_helper_update_primary +ffffffff8198a4b0 t get_connectors_for_crtc +ffffffff8198a5c0 T drm_plane_helper_disable_primary +ffffffff8198a670 T drm_plane_helper_destroy +ffffffff8198a6a0 T drm_plane_helper_atomic_check +ffffffff8198b000 T drm_prime_remove_buf_handle +ffffffff8198b090 T drm_prime_init_file_private +ffffffff8198b0f0 T drm_prime_destroy_file_private +ffffffff8198b150 T drm_gem_dmabuf_export +ffffffff8198b1b0 T drm_gem_dmabuf_release +ffffffff8198b1f0 T drm_gem_prime_fd_to_handle +ffffffff8198b400 T drm_gem_prime_import +ffffffff8198b460 t drm_prime_add_buf_handle +ffffffff8198b5b0 T drm_prime_fd_to_handle_ioctl +ffffffff8198b600 T drm_gem_prime_handle_to_fd +ffffffff8198b830 T drm_prime_handle_to_fd_ioctl +ffffffff8198b890 T drm_gem_map_attach +ffffffff8198b8b0 T drm_gem_map_detach +ffffffff8198b8d0 T drm_gem_dmabuf_vmap +ffffffff8198b8f0 T drm_gem_dmabuf_vunmap +ffffffff8198b910 T drm_gem_prime_mmap +ffffffff8198b960 T drm_prime_pages_to_sg +ffffffff8198b9b0 T drm_prime_get_contiguous_size +ffffffff8198ba00 T drm_gem_prime_export +ffffffff8198ba90 T drm_gem_prime_import_dev +ffffffff8198baf0 T drm_prime_sg_to_page_array +ffffffff8198bb40 T drm_prime_sg_to_dma_addr_array +ffffffff8198bb90 T drm_prime_gem_destroy +ffffffff8198c000 T __drm_puts_coredump +ffffffff8198c0f0 T __drm_printfn_coredump +ffffffff8198c210 T __drm_puts_seq_file +ffffffff8198c240 T __drm_printfn_seq_file +ffffffff8198c270 T __drm_printfn_info +ffffffff8198c2a0 T __drm_printfn_debug +ffffffff8198c2d0 T __drm_printfn_err +ffffffff8198c310 T drm_puts +ffffffff8198c340 T drm_printf +ffffffff8198c3c0 T drm_print_bits +ffffffff8198c5e0 T drm_dev_printk +ffffffff8198c680 T __drm_dev_dbg +ffffffff8198c710 T ___drm_dbg +ffffffff8198c7a0 T __drm_err +ffffffff8198c830 T drm_print_regset32 +ffffffff8198d000 T drm_crtc_mode_valid +ffffffff8198d050 T drm_encoder_mode_valid +ffffffff8198d090 T drm_connector_mode_valid +ffffffff8198d110 T drm_kms_helper_poll_enable +ffffffff8198d200 T drm_helper_probe_detect +ffffffff8198d3f0 T drm_helper_probe_single_connector_modes +ffffffff8198d9b0 t __drm_helper_update_and_validate +ffffffff8198dd60 T drm_kms_helper_hotplug_event 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drm_property_create_signed_range +ffffffff8198f790 T drm_property_create_object +ffffffff8198f830 T drm_property_create_bool +ffffffff8198f890 T drm_mode_getproperty_ioctl +ffffffff8198faa0 T drm_property_create_blob +ffffffff8198fbe0 t drm_property_free_blob +ffffffff8198fc60 T drm_property_blob_put +ffffffff8198fca0 T drm_property_destroy_user_blobs +ffffffff8198fd20 T drm_property_blob_get +ffffffff8198fd60 T drm_property_lookup_blob +ffffffff8198fd80 T drm_property_replace_global_blob +ffffffff8198fed0 T drm_property_replace_blob +ffffffff8198ff40 T drm_mode_getblob_ioctl +ffffffff81990000 T drm_mode_createblob_ioctl +ffffffff81990100 T drm_mode_destroyblob_ioctl +ffffffff81990210 T drm_property_change_valid_get +ffffffff81990460 T drm_property_change_valid_put +ffffffff81991000 T drm_rect_intersect +ffffffff81991080 T drm_rect_clip_scaled +ffffffff819912f0 T drm_rect_calc_hscale +ffffffff819913c0 T drm_rect_calc_vscale +ffffffff81991490 T drm_rect_debug_print +ffffffff819915b0 T drm_rect_rotate +ffffffff81991670 T drm_rect_rotate_inv +ffffffff81992000 T drm_self_refresh_helper_update_avg_times +ffffffff81992140 T drm_self_refresh_helper_alter_state +ffffffff819922d0 T drm_self_refresh_helper_init +ffffffff81992480 t drm_self_refresh_helper_entry_work +ffffffff819925e0 T drm_self_refresh_helper_cleanup +ffffffff81992660 t __delayed_work_tick +ffffffff81993000 T drm_syncobj_find +ffffffff81993070 T drm_syncobj_add_point +ffffffff81993160 t syncobj_wait_syncobj_func +ffffffff81993210 T drm_syncobj_replace_fence +ffffffff819932a0 T drm_syncobj_find_fence +ffffffff81993600 t drm_syncobj_fence_add_wait +ffffffff819936d0 T drm_syncobj_free +ffffffff81993760 T drm_syncobj_create +ffffffff819939a0 T drm_syncobj_get_handle +ffffffff81993ac0 T drm_syncobj_get_fd +ffffffff81993b10 T drm_syncobj_open +ffffffff81993b40 T drm_syncobj_release +ffffffff81993b80 t drm_syncobj_release_handle +ffffffff81993c30 T drm_syncobj_create_ioctl +ffffffff81993d60 T drm_syncobj_destroy_ioctl +ffffffff81993e80 T drm_syncobj_handle_to_fd_ioctl +ffffffff81994070 T drm_syncobj_fd_to_handle_ioctl +ffffffff81994260 T drm_syncobj_transfer_ioctl +ffffffff81994680 T drm_timeout_abs_to_jiffies +ffffffff81994760 T drm_syncobj_wait_ioctl +ffffffff819948f0 t drm_syncobj_array_find +ffffffff81994b20 t drm_syncobj_array_free +ffffffff81994c00 T drm_syncobj_timeline_wait_ioctl +ffffffff81994d90 T drm_syncobj_reset_ioctl +ffffffff81994ef0 T drm_syncobj_signal_ioctl +ffffffff819950c0 T drm_syncobj_timeline_signal_ioctl +ffffffff819952f0 T drm_syncobj_query_ioctl +ffffffff819954f0 t drm_syncobj_array_wait_timeout +ffffffff81995950 t syncobj_wait_fence_func +ffffffff81996000 T drm_vblank_count +ffffffff81996090 T drm_crtc_accurate_vblank_count +ffffffff819961a0 t drm_update_vblank_count +ffffffff819965f0 T drm_vblank_disable_and_save +ffffffff81996740 T drm_vblank_init +ffffffff819968c0 t vblank_disable_fn +ffffffff81996940 t drm_vblank_init_release +ffffffff819969d0 T drm_dev_has_vblank +ffffffff81996a00 T drm_crtc_vblank_waitqueue +ffffffff81996a50 T drm_calc_timestamping_constants +ffffffff81996c80 T drm_crtc_vblank_helper_get_vblank_timestamp_internal +ffffffff819971b0 T drm_crtc_vblank_helper_get_vblank_timestamp +ffffffff819971d0 T drm_crtc_vblank_count +ffffffff81997260 T drm_crtc_vblank_count_and_time +ffffffff81997320 T drm_crtc_arm_vblank_event +ffffffff81997400 T drm_crtc_send_vblank_event +ffffffff819975b0 T drm_vblank_get +ffffffff819976d0 t drm_vblank_enable +ffffffff81997890 T drm_crtc_vblank_get +ffffffff819979a0 T drm_vblank_put +ffffffff81997ad0 T drm_crtc_vblank_put +ffffffff81997af0 T drm_wait_one_vblank +ffffffff81997ff0 T drm_crtc_wait_one_vblank +ffffffff81998010 T drm_crtc_vblank_off +ffffffff81998400 T drm_crtc_vblank_reset +ffffffff81998530 T drm_crtc_set_max_vblank_count +ffffffff81998610 T drm_crtc_vblank_on +ffffffff81998760 t drm_reset_vblank_timestamp +ffffffff81998960 T drm_crtc_vblank_restore +ffffffff81998d40 T drm_legacy_modeset_ctl_ioctl +ffffffff81998f60 T drm_wait_vblank_ioctl +ffffffff81999a50 T drm_handle_vblank +ffffffff81999d30 t drm_handle_vblank_events +ffffffff81999fc0 T drm_crtc_handle_vblank +ffffffff81999fe0 T drm_crtc_get_sequence_ioctl +ffffffff8199a1d0 T drm_crtc_queue_sequence_ioctl +ffffffff8199a5a0 t __get_vblank_counter +ffffffff8199b000 T drm_handle_vblank_works +ffffffff8199b1a0 T drm_vblank_cancel_pending_works +ffffffff8199b2e0 T drm_vblank_work_schedule +ffffffff8199b550 T drm_vblank_work_cancel_sync +ffffffff8199b6a0 T drm_vblank_work_flush +ffffffff8199b7d0 T drm_vblank_work_init +ffffffff8199b840 T drm_vblank_worker_init +ffffffff8199c000 T drm_vma_offset_manager_init +ffffffff8199c040 T drm_vma_offset_manager_destroy +ffffffff8199c060 T drm_vma_offset_lookup_locked +ffffffff8199c0f0 T drm_vma_offset_add +ffffffff8199c180 T drm_vma_offset_remove +ffffffff8199c1d0 T drm_vma_node_allow +ffffffff8199c1f0 t vma_node_allow +ffffffff8199c320 T drm_vma_node_allow_once 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hdmi_drm_infoframe_pack_only +ffffffff8199dff0 T hdmi_drm_infoframe_pack +ffffffff8199e040 T hdmi_infoframe_check +ffffffff8199e1a0 T hdmi_infoframe_pack_only +ffffffff8199e3c0 T hdmi_infoframe_pack +ffffffff8199e530 T hdmi_infoframe_log +ffffffff8199f430 T hdmi_drm_infoframe_unpack_only +ffffffff8199f510 T hdmi_infoframe_unpack +ffffffff819a0000 T list_sort +ffffffff819a1000 T radix_tree_lookup +ffffffff819a10b0 T radix_tree_iter_find +ffffffff819a11a0 T radix_tree_delete +ffffffff819a1340 T radix_tree_iter_delete +ffffffff819a1360 T radix_tree_insert +ffffffff819a2000 T sort +ffffffff819a2040 t qsort +ffffffff819a4000 T drm_dp_dual_mode_read +ffffffff819a4110 T drm_dp_dual_mode_write +ffffffff819a41f0 T drm_dp_dual_mode_detect +ffffffff819a44a0 T drm_dp_dual_mode_max_tmds_clock +ffffffff819a45d0 T drm_dp_dual_mode_get_tmds_output +ffffffff819a4700 T drm_dp_dual_mode_set_tmds_output +ffffffff819a4990 T drm_dp_get_dual_mode_type_name +ffffffff819a4a00 T drm_lspcon_get_mode +ffffffff819a4ba0 T drm_lspcon_set_mode +ffffffff819a5000 T drm_dp_channel_eq_ok +ffffffff819a5080 T drm_dp_clock_recovery_ok +ffffffff819a5100 T drm_dp_get_adjust_request_voltage +ffffffff819a5140 T drm_dp_get_adjust_request_pre_emphasis +ffffffff819a5190 T drm_dp_get_adjust_tx_ffe_preset +ffffffff819a51d0 T drm_dp_128b132b_lane_channel_eq_done +ffffffff819a5250 T drm_dp_128b132b_lane_symbol_locked +ffffffff819a52c0 T drm_dp_128b132b_eq_interlane_align_done +ffffffff819a52f0 T drm_dp_128b132b_cds_interlane_align_done +ffffffff819a5320 T drm_dp_128b132b_link_training_failed +ffffffff819a5350 T drm_dp_read_clock_recovery_delay +ffffffff819a5450 T drm_dp_read_channel_eq_delay +ffffffff819a5550 T drm_dp_128b132b_read_aux_rd_interval +ffffffff819a5600 T drm_dp_link_train_clock_recovery_delay +ffffffff819a5690 t __8b10b_clock_recovery_delay_us +ffffffff819a5710 T drm_dp_link_train_channel_eq_delay +ffffffff819a5790 T drm_dp_phy_name +ffffffff819a57d0 T drm_dp_lttpr_link_train_clock_recovery_delay +ffffffff819a57f0 T drm_dp_lttpr_link_train_channel_eq_delay +ffffffff819a5860 T drm_dp_link_rate_to_bw_code +ffffffff819a58d0 T drm_dp_bw_code_to_link_rate +ffffffff819a5930 T drm_dp_dpcd_probe +ffffffff819a5a70 t drm_dp_dpcd_access +ffffffff819a5ba0 T drm_dp_dpcd_read +ffffffff819a5cd0 T drm_dp_dpcd_write +ffffffff819a5de0 T drm_dp_dpcd_read_link_status +ffffffff819a5e00 T drm_dp_dpcd_read_phy_link_status +ffffffff819a5f00 T drm_dp_downstream_is_type +ffffffff819a5f40 T drm_dp_downstream_is_tmds +ffffffff819a5fb0 T drm_dp_send_real_edid_checksum +ffffffff819a6210 T drm_dp_read_dpcd_caps +ffffffff819a63a0 T drm_dp_read_downstream_info +ffffffff819a64a0 T drm_dp_downstream_max_dotclock +ffffffff819a64f0 T drm_dp_downstream_max_tmds_clock +ffffffff819a6590 T drm_dp_downstream_min_tmds_clock +ffffffff819a6610 T drm_dp_downstream_max_bpc +ffffffff819a66b0 T drm_dp_downstream_420_passthrough +ffffffff819a6710 T drm_dp_downstream_444_to_420_conversion +ffffffff819a6770 T drm_dp_downstream_rgb_to_ycbcr_conversion +ffffffff819a67d0 T drm_dp_downstream_mode +ffffffff819a6860 T drm_dp_downstream_id +ffffffff819a6880 T drm_dp_downstream_debug +ffffffff819a6920 T drm_dp_subconnector_type +ffffffff819a6990 T drm_dp_set_subconnector_property +ffffffff819a6a00 T drm_dp_read_sink_count_cap +ffffffff819a6a50 T drm_dp_read_sink_count +ffffffff819a6ab0 T drm_dp_remote_aux_init +ffffffff819a6ae0 t drm_dp_aux_crc_work +ffffffff819a6c60 T drm_dp_aux_init +ffffffff819a6d10 T drm_dp_aux_register +ffffffff819a6e30 T drm_dp_aux_unregister +ffffffff819a6e60 T drm_dp_psr_setup_time +ffffffff819a6eb0 T drm_dp_start_crc +ffffffff819a6f60 T drm_dp_stop_crc +ffffffff819a6ff0 T drm_dp_read_desc +ffffffff819a71b0 T drm_dp_dsc_sink_max_slice_count +ffffffff819a7240 T drm_dp_dsc_sink_line_buf_depth +ffffffff819a7280 T drm_dp_dsc_sink_supported_input_bpcs +ffffffff819a72f0 T drm_dp_read_lttpr_common_caps +ffffffff819a73b0 T drm_dp_read_lttpr_phy_caps +ffffffff819a7470 T drm_dp_lttpr_count +ffffffff819a7500 T drm_dp_lttpr_max_link_rate +ffffffff819a7560 T drm_dp_lttpr_max_lane_count +ffffffff819a7590 T drm_dp_lttpr_voltage_swing_level_3_supported +ffffffff819a75c0 T drm_dp_lttpr_pre_emphasis_level_3_supported +ffffffff819a75f0 T drm_dp_get_phy_test_pattern +ffffffff819a7710 T drm_dp_set_phy_test_pattern +ffffffff819a77e0 T drm_dp_vsc_sdp_log +ffffffff819a7b00 T drm_dp_get_pcon_max_frl_bw +ffffffff819a7b50 T drm_dp_pcon_frl_prepare +ffffffff819a7ba0 T drm_dp_pcon_is_frl_ready +ffffffff819a7bf0 T drm_dp_pcon_frl_configure_1 +ffffffff819a7cf0 T drm_dp_pcon_frl_configure_2 +ffffffff819a7d50 T drm_dp_pcon_reset_frl_config +ffffffff819a7da0 T drm_dp_pcon_frl_enable +ffffffff819a7e60 T drm_dp_pcon_hdmi_link_active +ffffffff819a7eb0 T drm_dp_pcon_hdmi_link_mode +ffffffff819a7f20 T drm_dp_pcon_hdmi_frl_link_error_count +ffffffff819a8020 T drm_dp_pcon_enc_is_dsc_1_2 +ffffffff819a8050 T drm_dp_pcon_dsc_max_slices +ffffffff819a80e0 T drm_dp_pcon_dsc_max_slice_width +ffffffff819a8110 T drm_dp_pcon_dsc_bpp_incr +ffffffff819a8150 T drm_dp_pcon_pps_default +ffffffff819a81e0 T drm_dp_pcon_pps_override_buf +ffffffff819a8290 T drm_dp_pcon_pps_override_param +ffffffff819a8370 T drm_dp_pcon_convert_rgb_to_ycbcr +ffffffff819a8410 T drm_edp_backlight_set_level +ffffffff819a84f0 T drm_edp_backlight_enable +ffffffff819a8700 t drm_edp_backlight_set_enable +ffffffff819a8830 T drm_edp_backlight_disable +ffffffff819a8870 T drm_edp_backlight_init +ffffffff819a8dc0 T drm_panel_dp_aux_backlight +ffffffff819a8f50 t __128b132b_channel_eq_delay_us +ffffffff819a8fd0 t __8b10b_channel_eq_delay_us +ffffffff819a9050 t drm_dp_aux_get_crc +ffffffff819a9120 t drm_dp_i2c_xfer +ffffffff819a9370 t drm_dp_i2c_functionality +ffffffff819a93a0 t drm_dp_i2c_do_msg +ffffffff819a9770 t lock_bus +ffffffff819a9790 t trylock_bus +ffffffff819a97e0 t unlock_bus +ffffffff819a9800 t dp_aux_backlight_update_status +ffffffff819aa000 T drm_dp_encode_sideband_req +ffffffff819aa420 T drm_dp_decode_sideband_req +ffffffff819aa970 T drm_dp_dump_sideband_msg_req_body +ffffffff819aad30 T drm_dp_mst_get_port_malloc +ffffffff819aad80 T drm_dp_mst_put_port_malloc +ffffffff819aae80 t kref_put +ffffffff819aaec0 T drm_atomic_get_mst_payload_state +ffffffff819aaf20 T drm_dp_mst_dpcd_read +ffffffff819ab1e0 T drm_dp_mst_dpcd_write +ffffffff819ab230 t drm_dp_send_dpcd_write +ffffffff819ab470 T drm_dp_mst_connector_late_register +ffffffff819ab4f0 T drm_dp_mst_connector_early_unregister +ffffffff819ab530 T drm_dp_send_power_updown_phy +ffffffff819ab770 t drm_dp_mst_topology_put_port +ffffffff819ab8a0 t drm_dp_mst_wait_tx_reply +ffffffff819abc40 T drm_dp_send_query_stream_enc_status +ffffffff819abf00 T drm_dp_add_payload_part1 +ffffffff819ac0b0 T drm_dp_remove_payload +ffffffff819ac250 T drm_dp_add_payload_part2 +ffffffff819ac400 T drm_dp_get_vc_payload_bw +ffffffff819ac4a0 T drm_dp_read_mst_cap +ffffffff819ac500 T drm_dp_mst_topology_mgr_set_mst +ffffffff819ac7c0 t drm_dp_dpcd_write_payload +ffffffff819ac950 t drm_dp_mst_topology_put_mstb +ffffffff819aca50 T drm_dp_mst_topology_mgr_suspend +ffffffff819acb10 t drm_dp_mst_topology_mgr_invalidate_mstb +ffffffff819acb80 T drm_dp_mst_topology_mgr_resume +ffffffff819acdc0 T drm_dp_mst_hpd_irq_handle_event +ffffffff819adca0 T drm_dp_mst_hpd_irq_send_new_request +ffffffff819add30 T drm_dp_mst_detect_port +ffffffff819adeb0 T drm_dp_mst_get_edid +ffffffff819adfc0 T drm_dp_atomic_find_time_slots +ffffffff819ae290 T drm_atomic_get_mst_topology_state +ffffffff819ae2a0 T drm_dp_atomic_release_time_slots +ffffffff819ae4b0 T drm_dp_mst_atomic_setup_commit +ffffffff819ae640 T drm_dp_mst_atomic_wait_for_dependencies +ffffffff819ae7c0 T drm_dp_mst_root_conn_atomic_check +ffffffff819ae8e0 T drm_dp_mst_update_slots +ffffffff819ae940 T drm_dp_check_act_status +ffffffff819aeaf0 T drm_dp_calc_pbn_mode +ffffffff819aeb60 T drm_dp_mst_dump_topology +ffffffff819aedb0 t drm_dp_mst_dump_mstb +ffffffff819aee20 T drm_dp_mst_add_affected_dsc_crtcs +ffffffff819aef50 T drm_dp_mst_dsc_aux_for_port +ffffffff819af180 T drm_dp_mst_atomic_enable_dsc +ffffffff819af320 T drm_dp_mst_atomic_check +ffffffff819af610 t drm_dp_mst_atomic_check_mstb_bw_limit +ffffffff819af8e0 t drm_dp_mst_duplicate_state +ffffffff819afab0 t drm_dp_mst_destroy_state +ffffffff819afb70 T drm_atomic_get_old_mst_topology_state +ffffffff819afb80 T drm_atomic_get_new_mst_topology_state +ffffffff819afb90 T drm_dp_mst_topology_mgr_init +ffffffff819afe00 t drm_dp_mst_link_probe_work +ffffffff819b00a0 t drm_dp_tx_work +ffffffff819b00f0 t drm_dp_delayed_destroy_work +ffffffff819b0510 t drm_dp_mst_up_req_work +ffffffff819b0a20 T drm_dp_mst_topology_mgr_destroy +ffffffff819b0ab0 t drm_dp_mst_is_virtual_dpcd +ffffffff819b0b90 t drm_dp_free_mst_branch_device +ffffffff819b0bd0 t drm_dp_mst_topology_get_port_validated_locked +ffffffff819b0c50 t drm_dp_mst_dump_sideband_msg_tx +ffffffff819b0e60 t process_single_down_tx_qlock +ffffffff819b0fd0 t process_single_tx_qlock +ffffffff819b14b0 t drm_dp_msg_data_crc4 +ffffffff819b15d0 t drm_dp_payload_send_msg +ffffffff819b1a20 t drm_dp_mst_topology_get_mstb_validated_locked +ffffffff819b1aa0 t drm_dp_get_one_sb_msg +ffffffff819b21c0 t drm_dp_get_mst_branch_device +ffffffff819b2320 t drm_dp_check_and_send_link_address +ffffffff819b23f0 t drm_dp_send_link_address +ffffffff819b30a0 t drm_dp_send_enum_path_resources +ffffffff819b3300 t drm_dp_port_set_pdt +ffffffff819b35e0 t drm_dp_mst_port_add_connector +ffffffff819b37c0 t drm_dp_mst_i2c_xfer +ffffffff819b3ec0 t drm_dp_mst_i2c_functionality +ffffffff819b3ef0 t get_mst_branch_device_by_guid_helper +ffffffff819b4000 T drm_dsc_dp_pps_header_init +ffffffff819b4030 T drm_dsc_dp_rc_buffer_size +ffffffff819b4090 T drm_dsc_pps_payload_pack +ffffffff819b4330 T drm_dsc_compute_rc_parameters +ffffffff819b5000 T drm_connector_attach_content_protection_property +ffffffff819b5030 T drm_hdcp_check_ksvs_revoked +ffffffff819b5080 T drm_hdcp_update_content_protection +ffffffff819b6000 T drm_hdmi_infoframe_set_hdr_metadata +ffffffff819b6120 T drm_hdmi_avi_infoframe_colorimetry +ffffffff819b6170 T drm_hdmi_avi_infoframe_bars +ffffffff819b61c0 T drm_hdmi_avi_infoframe_content_type +ffffffff819b7000 T drm_scdc_read +ffffffff819b7090 T drm_scdc_write +ffffffff819b7170 T drm_scdc_get_scrambling_status +ffffffff819b7230 T drm_scdc_set_scrambling +ffffffff819b7380 T drm_scdc_set_high_tmds_clock_ratio +ffffffff819b8000 T drm_gem_ttm_mmap +ffffffff819b8070 T drm_gem_ttm_vmap +ffffffff819b8080 T drm_gem_ttm_vunmap +ffffffff819b9000 T ttm_agp_bind +ffffffff819b9050 T ttm_agp_unbind +ffffffff819b9070 T ttm_agp_is_bound +ffffffff819b90c0 T ttm_agp_destroy +ffffffff819b90e0 T ttm_agp_tt_create +ffffffff819ba000 T ttm_bo_move_to_lru_tail +ffffffff819ba040 T ttm_bo_set_bulk_move +ffffffff819ba100 T ttm_bo_delayed_delete +ffffffff819ba3f0 t ttm_bo_cleanup_refs +ffffffff819ba790 T ttm_bo_put +ffffffff819bacd0 T ttm_bo_lock_delayed_workqueue +ffffffff819bad50 T ttm_bo_unlock_delayed_workqueue +ffffffff819badc0 T ttm_bo_eviction_valuable +ffffffff819bae10 T ttm_mem_evict_first +ffffffff819bb700 T ttm_bo_pin +ffffffff819bb7a0 T ttm_bo_unpin +ffffffff819bb8b0 T ttm_bo_mem_space +ffffffff819bbb00 t ttm_bo_add_move_fence +ffffffff819bbbc0 T ttm_bo_validate +ffffffff819bbd40 T ttm_bo_init_reserved +ffffffff819bbfe0 T ttm_bo_init_validate +ffffffff819bc150 T ttm_bo_unmap_virtual +ffffffff819bc270 T ttm_bo_wait +ffffffff819bc2f0 T ttm_bo_swapout +ffffffff819bc730 t ttm_bo_handle_move_mem +ffffffff819bc8a0 T ttm_bo_tt_destroy +ffffffff819bd000 T ttm_mem_io_reserve +ffffffff819bd060 T ttm_mem_io_free +ffffffff819bd0d0 T ttm_move_memcpy +ffffffff819bd290 T ttm_bo_move_memcpy +ffffffff819bd4c0 T ttm_bo_move_sync_cleanup +ffffffff819bd5b0 T ttm_io_prot +ffffffff819bd5f0 T ttm_bo_kmap +ffffffff819bd8a0 T ttm_bo_kunmap +ffffffff819bd9e0 T ttm_bo_vmap +ffffffff819bdbd0 T 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intel_bw_atomic_check +ffffffff819f7c30 T intel_bw_init +ffffffff819f7ca0 t icl_get_qgv_points +ffffffff819f8290 t skl_plane_calc_dbuf_bw +ffffffff819f83e0 t intel_bw_duplicate_state +ffffffff819f8450 t intel_bw_destroy_state +ffffffff819f9000 T intel_cdclk_get_cdclk +ffffffff819f9020 T intel_cdclk_init_hw +ffffffff819f97b0 T intel_cdclk_uninit_hw +ffffffff819f98c0 T intel_cdclk_needs_modeset +ffffffff819f9900 T intel_cdclk_dump_config +ffffffff819f9980 T intel_set_cdclk_pre_plane_update +ffffffff819f9a90 t intel_set_cdclk +ffffffff819f9ea0 T intel_set_cdclk_post_plane_update +ffffffff819f9fa0 T intel_crtc_compute_min_cdclk +ffffffff819fa310 T intel_atomic_get_cdclk_state +ffffffff819fa330 T intel_cdclk_atomic_check +ffffffff819fa430 T intel_cdclk_init +ffffffff819fa4a0 T intel_modeset_calc_cdclk +ffffffff819fa7d0 T intel_update_max_cdclk +ffffffff819fab30 T intel_update_cdclk +ffffffff819fabd0 T intel_read_rawclk +ffffffff819fade0 T intel_init_cdclk_hooks +ffffffff819fb1b0 t bxt_set_cdclk +ffffffff819fba30 t skl_set_cdclk +ffffffff819fc060 t intel_cdclk_duplicate_state +ffffffff819fc0e0 t intel_cdclk_destroy_state +ffffffff819fc100 t bxt_get_cdclk +ffffffff819fc330 t bxt_modeset_calc_cdclk +ffffffff819fc770 t tgl_calc_voltage_level +ffffffff819fc7c0 t intel_compute_min_cdclk +ffffffff819fc980 t ehl_calc_voltage_level +ffffffff819fc9d0 t icl_calc_voltage_level +ffffffff819fca20 t bxt_calc_voltage_level +ffffffff819fca70 t skl_get_cdclk +ffffffff819fcc80 t skl_modeset_calc_cdclk +ffffffff819fce90 t bdw_get_cdclk +ffffffff819fcf80 t bdw_set_cdclk +ffffffff819fd540 t bdw_modeset_calc_cdclk +ffffffff819fd640 t hsw_get_cdclk +ffffffff819fd720 t fixed_modeset_calc_cdclk +ffffffff819fd760 t vlv_get_cdclk +ffffffff819fd820 t chv_set_cdclk +ffffffff819fdb90 t vlv_modeset_calc_cdclk +ffffffff819fdd40 t vlv_set_cdclk +ffffffff819fe260 t fixed_400mhz_get_cdclk +ffffffff819fe290 t fixed_450mhz_get_cdclk +ffffffff819fe2c0 t gm45_get_cdclk +ffffffff819fe3c0 t intel_hpll_vco +ffffffff819fe4f0 t g33_get_cdclk +ffffffff819fe600 t i965gm_get_cdclk +ffffffff819fe700 t pnv_get_cdclk +ffffffff819fe7b0 t i945gm_get_cdclk +ffffffff819fe820 t i915gm_get_cdclk +ffffffff819fe890 t fixed_333mhz_get_cdclk +ffffffff819fe8c0 t fixed_266mhz_get_cdclk +ffffffff819fe8f0 t i85x_get_cdclk +ffffffff819fe970 t fixed_200mhz_get_cdclk +ffffffff819fe9a0 t fixed_133mhz_get_cdclk +ffffffff819ff000 T intel_color_load_luts +ffffffff819ff030 T intel_color_commit_noarm +ffffffff819ff080 T intel_color_commit_arm +ffffffff819ff0b0 T intel_color_check +ffffffff819ff0d0 T intel_color_get_config +ffffffff819ff120 T intel_color_get_gamma_bit_precision +ffffffff819ff280 T intel_color_lut_equal +ffffffff819ff6f0 T intel_color_init +ffffffff819ff810 t chv_color_check +ffffffff819ff970 t i9xx_color_commit_arm +ffffffff819ff980 t chv_load_luts +ffffffff819fffc0 t chv_read_luts +ffffffff81a00110 t check_luts +ffffffff81a00250 t intel_color_add_affected_planes +ffffffff81a003b0 t i965_load_luts +ffffffff81a00730 t i965_read_luts +ffffffff81a00ac0 t i9xx_color_check +ffffffff81a00bb0 t i9xx_load_luts +ffffffff81a00cf0 t i9xx_read_luts +ffffffff81a00e20 t icl_color_check +ffffffff81a00f50 t icl_color_commit_noarm +ffffffff81a01020 t icl_color_commit_arm +ffffffff81a01100 t icl_load_luts +ffffffff81a01610 t icl_read_luts +ffffffff81a018c0 t ilk_csc_convert_ctm +ffffffff81a025c0 t ilk_update_pipe_csc +ffffffff81a02810 t icl_update_output_csc +ffffffff81a02a60 t glk_load_degamma_lut +ffffffff81a02c00 t ivb_load_lut_ext_max +ffffffff81a02ce0 t bdw_read_lut_10 +ffffffff81a02e60 t glk_color_check +ffffffff81a02fe0 t skl_color_commit_noarm +ffffffff81a03020 t skl_color_commit_arm +ffffffff81a03130 t glk_load_luts +ffffffff81a03540 t glk_read_luts +ffffffff81a036a0 t ilk_load_csc_matrix +ffffffff81a03810 t ivb_color_check +ffffffff81a03a20 t bdw_load_luts +ffffffff81a03f60 t ilk_color_commit_noarm +ffffffff81a03f70 t hsw_color_commit_arm +ffffffff81a04020 t ivb_load_luts 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+ffffffff81a06560 T intel_attach_hdmi_colorspace_property +ffffffff81a065b0 T intel_attach_dp_colorspace_property +ffffffff81a07000 T intel_crt_port_enabled +ffffffff81a07080 T intel_crt_reset +ffffffff81a07170 T intel_crt_init +ffffffff81a075a0 t hsw_crt_get_config +ffffffff81a07650 t hsw_crt_compute_config +ffffffff81a07740 t hsw_pre_pll_enable_crt +ffffffff81a077b0 t hsw_pre_enable_crt +ffffffff81a07850 t hsw_enable_crt +ffffffff81a07a20 t hsw_disable_crt +ffffffff81a07a90 t hsw_post_disable_crt +ffffffff81a07c30 t pch_crt_compute_config +ffffffff81a07c80 t pch_disable_crt +ffffffff81a07cb0 t pch_post_disable_crt +ffffffff81a07da0 t intel_crt_compute_config +ffffffff81a07df0 t intel_disable_crt +ffffffff81a07ee0 t intel_crt_get_config +ffffffff81a07f90 t intel_crt_get_hw_state +ffffffff81a08050 t intel_enable_crt +ffffffff81a08140 t intel_spurious_crt_detect_dmi_callback +ffffffff81a081a0 t intel_crt_get_modes +ffffffff81a082b0 t intel_crt_detect +ffffffff81a08da0 t intel_crt_mode_valid +ffffffff81a08e90 t intel_crt_get_edid +ffffffff81a08f30 t intel_crt_detect_ddc +ffffffff81a09000 T intel_first_crtc +ffffffff81a09020 T intel_crtc_for_pipe +ffffffff81a09080 T intel_crtc_wait_for_next_vblank +ffffffff81a09090 T intel_wait_for_vblank_if_active +ffffffff81a09100 T intel_crtc_get_vblank_counter +ffffffff81a09180 T intel_crtc_max_vblank_count +ffffffff81a09220 T intel_crtc_vblank_on +ffffffff81a09300 T intel_crtc_vblank_off +ffffffff81a093a0 T intel_crtc_state_alloc +ffffffff81a09440 T intel_crtc_state_reset +ffffffff81a094c0 T intel_crtc_init +ffffffff81a09800 T intel_wait_for_vblank_workers +ffffffff81a098c0 T intel_usecs_to_scanlines +ffffffff81a09910 T intel_pipe_update_start +ffffffff81a09ce0 T intel_pipe_update_end +ffffffff81a09fe0 t intel_crtc_destroy +ffffffff81a0a010 t intel_crtc_late_register +ffffffff81a0a040 t intel_crtc_vblank_work +ffffffff81a0b000 T intel_crtc_state_dump +ffffffff81a0d000 T intel_cursor_plane_create +ffffffff81a0d200 t i845_cursor_max_stride +ffffffff81a0d230 t i845_cursor_update_arm +ffffffff81a0d480 t i845_cursor_disable_arm +ffffffff81a0d4a0 t i845_cursor_get_hw_state +ffffffff81a0d540 t i845_check_cursor +ffffffff81a0d6d0 t i9xx_cursor_max_stride +ffffffff81a0d710 t i9xx_cursor_update_arm +ffffffff81a0dad0 t i9xx_cursor_disable_arm +ffffffff81a0daf0 t i9xx_cursor_get_hw_state +ffffffff81a0dbd0 t i9xx_check_cursor +ffffffff81a0de50 t intel_check_cursor +ffffffff81a0e060 t intel_legacy_cursor_update +ffffffff81a0e430 t intel_cursor_format_mod_supported +ffffffff81a0f000 T hsw_prepare_dp_ddi_buffers +ffffffff81a0f1b0 T intel_wait_ddi_buf_idle +ffffffff81a0f3c0 T intel_ddi_set_dp_msa +ffffffff81a0f5b0 T intel_ddi_enable_transcoder_func +ffffffff81a0f6a0 t intel_ddi_transcoder_func_reg_val_get +ffffffff81a0f920 T intel_ddi_disable_transcoder_func +ffffffff81a0fb10 T intel_ddi_toggle_hdcp_bits +ffffffff81a0fc50 T intel_ddi_connector_get_hw_state +ffffffff81a0fda0 T intel_ddi_get_hw_state +ffffffff81a0fe10 t intel_ddi_get_encoder_pipes +ffffffff81a10270 T intel_ddi_enable_pipe_clock +ffffffff81a10330 T intel_ddi_disable_pipe_clock +ffffffff81a103a0 T intel_ddi_level +ffffffff81a10570 T icl_ddi_combo_get_pll +ffffffff81a105f0 T hsw_ddi_enable_clock +ffffffff81a106b0 T hsw_ddi_disable_clock +ffffffff81a106f0 T hsw_ddi_is_clock_enabled +ffffffff81a10750 T intel_ddi_enable_clock +ffffffff81a10790 T intel_ddi_disable_clock +ffffffff81a107d0 T intel_ddi_sanitize_encoder_pll_mapping +ffffffff81a109b0 T dp_tp_ctl_reg +ffffffff81a10a30 T dp_tp_status_reg +ffffffff81a10ab0 T intel_ddi_update_pipe +ffffffff81a10b40 T intel_ddi_compute_min_voltage_level +ffffffff81a10bb0 T intel_ddi_get_clock +ffffffff81a10cc0 T hsw_ddi_get_config +ffffffff81a10db0 t intel_ddi_get_config +ffffffff81a11620 T intel_ddi_init +ffffffff81a121c0 t intel_ddi_hotplug +ffffffff81a125f0 t intel_ddi_compute_output_type +ffffffff81a12670 t intel_ddi_compute_config +ffffffff81a127b0 t intel_ddi_compute_config_late +ffffffff81a12a60 t intel_enable_ddi +ffffffff81a13240 t intel_ddi_pre_pll_enable +ffffffff81a133b0 t intel_ddi_pre_enable +ffffffff81a14080 t intel_disable_ddi +ffffffff81a14200 t intel_ddi_post_disable +ffffffff81a14720 t intel_ddi_sync_state +ffffffff81a147d0 t intel_ddi_initial_fastset_check +ffffffff81a14890 t intel_ddi_encoder_suspend +ffffffff81a14940 t intel_ddi_encoder_shutdown +ffffffff81a14a00 t intel_ddi_get_power_domains +ffffffff81a14bb0 t dg2_ddi_get_config +ffffffff81a14c00 t adls_ddi_enable_clock +ffffffff81a14d80 t adls_ddi_disable_clock +ffffffff81a14e40 t adls_ddi_is_clock_enabled +ffffffff81a14ee0 t adls_ddi_get_config +ffffffff81a14fa0 t rkl_ddi_enable_clock +ffffffff81a15130 t rkl_ddi_disable_clock +ffffffff81a151d0 t rkl_ddi_is_clock_enabled +ffffffff81a15250 t rkl_ddi_get_config +ffffffff81a15320 t dg1_ddi_enable_clock +ffffffff81a154e0 t dg1_ddi_disable_clock +ffffffff81a155a0 t dg1_ddi_is_clock_enabled +ffffffff81a15640 t dg1_ddi_get_config +ffffffff81a15710 t jsl_ddi_tc_enable_clock +ffffffff81a157b0 t jsl_ddi_tc_disable_clock +ffffffff81a15870 t jsl_ddi_tc_is_clock_enabled +ffffffff81a15920 t icl_ddi_combo_get_config +ffffffff81a159d0 t icl_ddi_combo_enable_clock +ffffffff81a15b30 t icl_ddi_combo_disable_clock +ffffffff81a15bd0 t icl_ddi_combo_is_clock_enabled +ffffffff81a15c50 t icl_ddi_tc_enable_clock +ffffffff81a15e30 t icl_ddi_tc_disable_clock +ffffffff81a15f10 t icl_ddi_tc_is_clock_enabled +ffffffff81a15fd0 t icl_ddi_tc_get_config +ffffffff81a16210 t bxt_ddi_get_config +ffffffff81a16280 t skl_ddi_enable_clock +ffffffff81a16390 t skl_ddi_disable_clock +ffffffff81a16420 t skl_ddi_is_clock_enabled +ffffffff81a16490 t skl_ddi_get_config +ffffffff81a16520 t icl_combo_phy_set_signal_levels +ffffffff81a16ff0 t tgl_dkl_phy_set_signal_levels +ffffffff81a172f0 t icl_mg_phy_set_signal_levels +ffffffff81a17c20 t hsw_set_signal_levels +ffffffff81a17f90 t intel_ddi_update_prepare +ffffffff81a18110 t intel_ddi_update_complete +ffffffff81a18150 t lpt_digital_port_connected +ffffffff81a181c0 t bdw_digital_port_connected +ffffffff81a18230 t hsw_digital_port_connected +ffffffff81a182a0 t intel_ddi_encoder_reset +ffffffff81a18380 t intel_ddi_encoder_destroy +ffffffff81a18430 t icl_program_mg_dp_mode +ffffffff81a186c0 t intel_ddi_init_dp_buf_reg +ffffffff81a18880 t intel_disable_ddi_buf +ffffffff81a18ba0 t intel_ddi_prepare_link_retrain +ffffffff81a19210 t intel_ddi_set_link_train +ffffffff81a19370 t intel_ddi_set_idle_link_train +ffffffff81a19590 t intel_ddi_dp_voltage_max +ffffffff81a19650 t intel_ddi_dp_preemph_max +ffffffff81a1a000 T is_hobl_buf_trans +ffffffff81a1a040 T intel_ddi_buf_trans_init +ffffffff81a1a300 t dg2_get_snps_buf_trans +ffffffff81a1a370 t adlp_get_combo_buf_trans +ffffffff81a1a4a0 t adlp_get_dkl_buf_trans +ffffffff81a1a500 t adls_get_combo_buf_trans +ffffffff81a1a630 t rkl_get_combo_buf_trans +ffffffff81a1a760 t dg1_get_combo_buf_trans +ffffffff81a1a890 t tgl_get_combo_buf_trans +ffffffff81a1a9e0 t tgl_get_dkl_buf_trans +ffffffff81a1aa40 t jsl_get_combo_buf_trans +ffffffff81a1aaf0 t ehl_get_combo_buf_trans +ffffffff81a1aba0 t icl_get_combo_buf_trans +ffffffff81a1ac50 t icl_get_mg_buf_trans +ffffffff81a1acb0 t bxt_get_buf_trans +ffffffff81a1ad40 t kbl_y_get_buf_trans +ffffffff81a1adf0 t kbl_u_get_buf_trans +ffffffff81a1aea0 t kbl_get_buf_trans +ffffffff81a1af50 t skl_y_get_buf_trans +ffffffff81a1b000 t skl_u_get_buf_trans +ffffffff81a1b0b0 t skl_get_buf_trans +ffffffff81a1b160 t bdw_get_buf_trans +ffffffff81a1b200 t hsw_get_buf_trans +ffffffff81a1c000 T intel_update_watermarks +ffffffff81a1c040 T vlv_get_hpll_vco +ffffffff81a1c090 T vlv_get_cck_clock +ffffffff81a1c140 T vlv_get_cck_clock_hpll +ffffffff81a1c240 T is_trans_port_sync_mode +ffffffff81a1c280 T intel_crtc_bigjoiner_slave_pipes +ffffffff81a1c2e0 T intel_crtc_is_bigjoiner_slave +ffffffff81a1c340 T intel_crtc_is_bigjoiner_master +ffffffff81a1c3a0 T intel_master_crtc +ffffffff81a1c440 T assert_transcoder +ffffffff81a1c5f0 T vlv_wait_port_ready +ffffffff81a1c740 T intel_enable_transcoder +ffffffff81a1ca30 T intel_disable_transcoder +ffffffff81a1cd30 T intel_rotation_info_size +ffffffff81a1cd80 T intel_remapped_info_size +ffffffff81a1ceb0 T intel_plane_uses_fence +ffffffff81a1cf00 T intel_fb_xy_to_linear +ffffffff81a1cf50 T intel_add_fb_offsets +ffffffff81a1cfa0 T intel_plane_fb_max_stride +ffffffff81a1d020 T intel_set_plane_visible +ffffffff81a1d070 T intel_plane_fixup_bitmasks +ffffffff81a1d120 T intel_plane_disable_noatomic +ffffffff81a1d310 T intel_plane_fence_y_offset +ffffffff81a1d370 T intel_display_prepare_reset +ffffffff81a1d550 T intel_display_finish_reset +ffffffff81a1d750 t __intel_display_resume +ffffffff81a1d860 T intel_modeset_init_hw +ffffffff81a1d900 T intel_has_pending_fb_unpin +ffffffff81a1da00 T intel_get_crtc_new_encoder +ffffffff81a1dba0 T ilk_pfit_disable +ffffffff81a1dc60 T intel_phy_is_combo +ffffffff81a1dce0 T intel_phy_is_tc +ffffffff81a1dd50 T intel_phy_is_snps +ffffffff81a1dd90 T intel_port_to_phy +ffffffff81a1de20 T intel_port_to_tc +ffffffff81a1df20 T intel_aux_power_domain +ffffffff81a1df60 T intel_modeset_get_crtc_power_domains +ffffffff81a1e180 T intel_modeset_put_crtc_power_domains +ffffffff81a1e1b0 T intel_display_suspend +ffffffff81a1e250 T intel_encoder_destroy +ffffffff81a1e280 T intel_encoder_get_config +ffffffff81a1e2b0 t intel_crtc_readout_derived_state +ffffffff81a1e6e0 T intel_link_compute_m_n +ffffffff81a1e810 T intel_zero_m_n +ffffffff81a1e850 T intel_set_m_n +ffffffff81a1e910 T intel_cpu_transcoder_has_m2_n2 +ffffffff81a1e970 T intel_cpu_transcoder_set_m1_n1 +ffffffff81a1eb30 T intel_cpu_transcoder_set_m2_n2 +ffffffff81a1ec90 T i9xx_set_pipeconf +ffffffff81a1ee40 T ilk_set_pipeconf +ffffffff81a1f020 T bdw_get_pipemisc_bpp +ffffffff81a1f110 T ilk_get_lanes_required +ffffffff81a1f170 T intel_get_m_n +ffffffff81a1f280 T intel_cpu_transcoder_get_m1_n1 +ffffffff81a1f420 T intel_cpu_transcoder_get_m2_n2 +ffffffff81a1f590 T intel_crtc_get_pipe_config +ffffffff81a1f600 T intel_get_load_detect_pipe +ffffffff81a1fa20 T intel_release_load_detect_pipe +ffffffff81a1faf0 T i9xx_crtc_clock_get +ffffffff81a1fd80 T intel_dotclock_calculate +ffffffff81a1fde0 T intel_crtc_dotclock +ffffffff81a1feb0 T intel_encoder_current_mode +ffffffff81a20060 T intel_fuzzy_clock_check +ffffffff81a200b0 T intel_pipe_config_compare +ffffffff81a22ba0 t pipe_config_mismatch +ffffffff81a22c90 t pipe_config_infoframe_mismatch +ffffffff81a22e30 T intel_modeset_all_pipes +ffffffff81a22fd0 T intel_atomic_add_affected_planes +ffffffff81a230a0 T intel_crtc_update_active_timings +ffffffff81a231a0 T intel_calc_active_pipes +ffffffff81a23230 T intel_crtc_arm_fifo_underrun +ffffffff81a232d0 T intel_plane_destroy +ffffffff81a23300 T intel_get_pipe_from_crtc_id_ioctl +ffffffff81a23370 T intel_mode_valid_max_plane_size +ffffffff81a233f0 T intel_init_display_hooks +ffffffff81a234d0 T intel_modeset_init_noirq +ffffffff81a23790 t intel_atomic_helper_free_state_worker +ffffffff81a23800 T intel_modeset_init_nogem +ffffffff81a24930 T intel_modeset_init +ffffffff81a24b50 T i830_enable_pipe +ffffffff81a25180 T i830_disable_pipe +ffffffff81a254b0 T intel_display_resume +ffffffff81a255f0 T intel_modeset_driver_remove +ffffffff81a256a0 T intel_modeset_driver_remove_noirq +ffffffff81a25810 T intel_modeset_driver_remove_nogem +ffffffff81a25850 T intel_modeset_probe_defer +ffffffff81a25880 T intel_display_driver_register +ffffffff81a258e0 T intel_display_driver_unregister +ffffffff81a25960 T intel_scanout_needs_vtd_wa +ffffffff81a259a0 t wait_for_pipe_scanline_moving +ffffffff81a25c00 t hsw_get_pipe_config +ffffffff81a269e0 t hsw_crtc_enable +ffffffff81a27410 t hsw_crtc_disable +ffffffff81a275c0 t skl_commit_modeset_enables +ffffffff81a27b80 t intel_get_transcoder_timings +ffffffff81a27e50 t ilk_get_pfit_config +ffffffff81a27fd0 t enabled_bigjoiner_pipes +ffffffff81a281e0 t bdw_set_pipemisc +ffffffff81a28320 t ilk_pfit_enable +ffffffff81a28430 t intel_set_transcoder_timings +ffffffff81a287f0 t intel_update_crtc +ffffffff81a28de0 t intel_pre_plane_update +ffffffff81a292f0 t intel_commit_modeset_enables +ffffffff81a29410 t ilk_get_pipe_config +ffffffff81a29760 t ilk_crtc_enable +ffffffff81a29e10 t ilk_crtc_disable +ffffffff81a2a0a0 t i9xx_get_pipe_config +ffffffff81a2a9d0 t valleyview_crtc_enable +ffffffff81a2ade0 t i9xx_crtc_disable +ffffffff81a2b170 t i9xx_pfit_enable +ffffffff81a2b2d0 t i9xx_crtc_enable +ffffffff81a2b650 t intel_mode_valid +ffffffff81a2b800 t intel_atomic_check +ffffffff81a2eaf0 t intel_atomic_commit +ffffffff81a2ee60 t copy_bigjoiner_crtc_state_nomodeset +ffffffff81a2ef60 t intel_crtc_copy_uapi_to_hw_state_modeset +ffffffff81a2f0c0 t intel_atomic_commit_ready +ffffffff81a2f160 t intel_atomic_commit_work +ffffffff81a2f180 t intel_atomic_commit_tail +ffffffff81a304e0 t intel_atomic_cleanup_work +ffffffff81a31000 T intel_display_power_domain_str +ffffffff81a31060 T __intel_display_power_is_enabled +ffffffff81a31130 T intel_display_power_is_enabled +ffffffff81a31240 T intel_display_power_set_target_dc_state +ffffffff81a31360 T intel_display_power_get +ffffffff81a313e0 t __intel_display_power_get_domain +ffffffff81a315c0 T intel_display_power_get_if_enabled +ffffffff81a316f0 T __intel_display_power_put_async +ffffffff81a318c0 t __intel_display_power_put_domain +ffffffff81a31a40 T intel_display_power_flush_work +ffffffff81a31b60 t release_async_put_domains +ffffffff81a31c40 T intel_display_power_put_unchecked +ffffffff81a31ca0 T intel_display_power_get_in_set +ffffffff81a31d80 T intel_display_power_get_in_set_if_enabled +ffffffff81a31e30 T intel_display_power_put_mask_in_set +ffffffff81a31f00 T intel_power_domains_init +ffffffff81a32140 t intel_display_power_put_async_work +ffffffff81a323b0 T intel_power_domains_cleanup +ffffffff81a323d0 T gen9_dbuf_slices_update +ffffffff81a325f0 T intel_power_domains_init_hw +ffffffff81a32d80 t icl_display_core_init +ffffffff81a33670 t bxt_display_core_init +ffffffff81a337a0 T intel_power_domains_driver_remove +ffffffff81a33890 T intel_power_domains_sanitize_state +ffffffff81a33980 T intel_power_domains_enable +ffffffff81a339e0 T intel_power_domains_disable +ffffffff81a33a90 T intel_power_domains_suspend +ffffffff81a33c20 t icl_display_core_uninit +ffffffff81a33cc0 t bxt_display_core_uninit +ffffffff81a33d70 T intel_power_domains_resume +ffffffff81a33e40 T intel_display_power_suspend_late +ffffffff81a33f30 t hsw_enable_pc8 +ffffffff81a348c0 T intel_display_power_resume_early +ffffffff81a349b0 t hsw_disable_pc8 +ffffffff81a34e10 T intel_display_power_suspend +ffffffff81a34e90 T intel_display_power_resume +ffffffff81a34f70 T intel_display_power_debug +ffffffff81a35040 T intel_display_power_ddi_io_domain +ffffffff81a35120 T intel_display_power_ddi_lanes_domain +ffffffff81a35200 T intel_display_power_legacy_aux_domain +ffffffff81a35310 T intel_display_power_tbt_aux_domain +ffffffff81a35420 t __delayed_work_tick +ffffffff81a36000 T intel_display_power_map_init +ffffffff81a36170 t __set_power_wells +ffffffff81a36550 T intel_display_power_map_cleanup +ffffffff81a37000 T lookup_power_well +ffffffff81a370c0 T intel_power_well_enable +ffffffff81a37150 T intel_power_well_name +ffffffff81a37190 T intel_power_well_disable +ffffffff81a37200 T intel_power_well_sync_hw +ffffffff81a37270 T intel_power_well_get +ffffffff81a37310 T intel_power_well_put +ffffffff81a37410 T intel_power_well_is_enabled +ffffffff81a37430 T intel_power_well_is_enabled_cached +ffffffff81a37460 T intel_display_power_well_is_enabled +ffffffff81a37520 T intel_power_well_is_always_on +ffffffff81a37560 T intel_power_well_domains +ffffffff81a37590 T intel_power_well_refcount +ffffffff81a375c0 T gen9_sanitize_dc_state +ffffffff81a376a0 T gen9_set_dc_state +ffffffff81a379f0 T gen9_enable_dc5 +ffffffff81a37c50 T skl_enable_dc6 +ffffffff81a37da0 T bxt_enable_dc9 +ffffffff81a37f50 T bxt_disable_dc9 +ffffffff81a38040 T gen9_disable_dc_states +ffffffff81a38410 T chv_phy_powergate_ch +ffffffff81a38520 t assert_chv_phy_status +ffffffff81a388c0 T chv_phy_powergate_lanes +ffffffff81a38b80 t i9xx_power_well_sync_hw_noop +ffffffff81a38bb0 t i9xx_always_on_power_well_noop +ffffffff81a38be0 t i9xx_always_on_power_well_enabled +ffffffff81a38c10 t chv_pipe_power_well_sync_hw +ffffffff81a38c40 t chv_pipe_power_well_enable +ffffffff81a38c70 t chv_pipe_power_well_disable +ffffffff81a38cd0 t chv_pipe_power_well_enabled +ffffffff81a38dd0 t chv_dpio_cmn_power_well_enable +ffffffff81a38fe0 t chv_dpio_cmn_power_well_disable +ffffffff81a39110 t vlv_power_well_enabled +ffffffff81a39220 t i830_pipes_power_well_sync_hw +ffffffff81a39310 t i830_pipes_power_well_enable +ffffffff81a393d0 t i830_pipes_power_well_disable +ffffffff81a39400 t i830_pipes_power_well_enabled +ffffffff81a394a0 t hsw_power_well_sync_hw +ffffffff81a39590 t hsw_power_well_enable +ffffffff81a39810 t hsw_power_well_disable +ffffffff81a398c0 t hsw_power_well_enabled +ffffffff81a399a0 t gen9_dc_off_power_well_enable +ffffffff81a399b0 t gen9_dc_off_power_well_disable +ffffffff81a39a50 t gen9_dc_off_power_well_enabled +ffffffff81a39ae0 t bxt_dpio_cmn_power_well_enable +ffffffff81a39b10 t bxt_dpio_cmn_power_well_disable +ffffffff81a39b40 t bxt_dpio_cmn_power_well_enabled +ffffffff81a39b70 t vlv_display_power_well_enable +ffffffff81a39ba0 t vlv_display_power_well_disable +ffffffff81a39c10 t vlv_dpio_cmn_power_well_enable +ffffffff81a39c90 t vlv_dpio_cmn_power_well_disable +ffffffff81a39d90 t vlv_power_well_enable +ffffffff81a39db0 t vlv_power_well_disable +ffffffff81a39dd0 t icl_aux_power_well_enable +ffffffff81a3a440 t icl_aux_power_well_disable +ffffffff81a3a6e0 t tgl_tc_cold_off_power_well_sync_hw +ffffffff81a3a700 t tgl_tc_cold_off_power_well_enable +ffffffff81a3a720 t tgl_tc_cold_off_power_well_disable +ffffffff81a3a740 t tgl_tc_cold_off_power_well_is_enabled +ffffffff81a3a770 t xelpdp_aux_power_well_enable +ffffffff81a3a850 t xelpdp_aux_power_well_disable +ffffffff81a3a930 t xelpdp_aux_power_well_enabled +ffffffff81a3a9e0 t chv_set_pipe_power_well +ffffffff81a3abe0 t vlv_display_power_well_init +ffffffff81a3ae70 t vlv_set_power_well +ffffffff81a3b080 t hsw_wait_for_power_well_enable +ffffffff81a3b1c0 t hsw_wait_for_power_well_disable +ffffffff81a3b450 t tgl_tc_cold_request +ffffffff81a3c000 T intel_dkl_phy_read +ffffffff81a3c100 T intel_dkl_phy_write +ffffffff81a3c1f0 T intel_dkl_phy_rmw +ffffffff81a3c310 T intel_dkl_phy_posting_read +ffffffff81a3d000 T intel_dmc_has_payload +ffffffff81a3d040 T intel_dmc_load_program +ffffffff81a3d820 t pipedmc_clock_gating_wa +ffffffff81a3da10 T intel_dmc_disable_program +ffffffff81a3dc30 T assert_dmc_loaded +ffffffff81a3dd80 T intel_dmc_ucode_init +ffffffff81a3e050 t dmc_load_work_fn +ffffffff81a3e880 T intel_dmc_ucode_suspend +ffffffff81a3e8f0 T intel_dmc_ucode_resume +ffffffff81a3e990 T intel_dmc_ucode_fini +ffffffff81a3eac0 T intel_dmc_print_error_state +ffffffff81a3eb70 T intel_dmc_debugfs_register +ffffffff81a3f000 T intel_dp_is_edp +ffffffff81a3f030 T intel_dp_is_uhbr +ffffffff81a3f070 T intel_dp_max_lane_count +ffffffff81a3f0e0 T intel_dp_link_required +ffffffff81a3f120 T intel_dp_max_data_rate +ffffffff81a3f190 T intel_dp_can_bigjoiner +ffffffff81a3f1e0 T intel_dp_get_link_train_fallback_values +ffffffff81a3f5c0 T intel_dp_mode_to_fec_clock +ffffffff81a3f610 T intel_dp_min_bpp +ffffffff81a3f650 T intel_dp_source_supports_tps3 +ffffffff81a3f6a0 T intel_dp_source_supports_tps4 +ffffffff81a3f6d0 T intel_dp_max_link_rate +ffffffff81a3f790 T intel_dp_rate_select +ffffffff81a3f830 T intel_dp_compute_rate +ffffffff81a3f900 T intel_dp_adjust_compliance_config +ffffffff81a3fa40 T intel_dp_limited_color_range +ffffffff81a3fab0 T intel_dp_compute_psr_vsc_sdp +ffffffff81a3fb30 T intel_dp_needs_vsc_sdp +ffffffff81a3fb80 t intel_dp_compute_vsc_colorimetry +ffffffff81a3fd00 T intel_dp_compute_config +ffffffff81a40390 t intel_dp_compute_output_format +ffffffff81a405c0 T intel_dp_set_link_params +ffffffff81a40600 T intel_edp_backlight_on +ffffffff81a406b0 T intel_edp_backlight_off +ffffffff81a40760 T intel_dp_sink_set_decompression_state +ffffffff81a40800 T intel_dp_wait_source_oui +ffffffff81a408d0 T intel_dp_set_power +ffffffff81a40ae0 T intel_dp_sync_state +ffffffff81a40b60 t intel_dp_get_dpcd +ffffffff81a40cc0 t intel_dp_reset_max_link_params +ffffffff81a40dd0 T intel_dp_initial_fastset_check +ffffffff81a40ed0 T intel_dp_check_frl_training +ffffffff81a41460 T intel_dp_pcon_dsc_configure +ffffffff81a41630 T intel_dp_configure_protocol_converter +ffffffff81a417a0 T intel_dp_get_colorimetry_status +ffffffff81a41800 T intel_edp_fixup_vbt_bpp +ffffffff81a418a0 T intel_write_dp_vsc_sdp +ffffffff81a41a30 T intel_dp_set_infoframes +ffffffff81a41b60 t intel_write_dp_sdp +ffffffff81a41e50 T intel_read_dp_sdp +ffffffff81a42180 T intel_dp_retrain_link +ffffffff81a42840 T intel_dp_phy_test +ffffffff81a42f20 T intel_digital_port_connected +ffffffff81a42fc0 T intel_dp_encoder_flush_work +ffffffff81a43010 T intel_dp_encoder_suspend +ffffffff81a43050 T intel_dp_encoder_shutdown +ffffffff81a43090 T intel_dp_hpd_pulse +ffffffff81a43800 T intel_dp_is_port_edp +ffffffff81a43850 T intel_dp_init_connector +ffffffff81a449a0 t intel_dp_modeset_retry_work_fn +ffffffff81a44a20 t intel_dp_set_common_rates +ffffffff81a44bc0 T intel_dp_mst_suspend +ffffffff81a44c60 T intel_dp_mst_resume +ffffffff81a44d10 t intel_dp_compute_link_config +ffffffff81a45ab0 t intel_dp_dsc_get_slice_count +ffffffff81a45c20 t intel_dp_set_sink_rates +ffffffff81a45e50 t intel_dp_check_device_service_irq +ffffffff81a46420 t intel_dp_force +ffffffff81a46560 t intel_dp_connector_register +ffffffff81a46640 t intel_dp_connector_unregister +ffffffff81a466a0 t intel_dp_oob_hotplug_event +ffffffff81a46720 t intel_dp_set_edid +ffffffff81a46b50 t intel_dp_get_modes +ffffffff81a46c50 t intel_dp_detect +ffffffff81a47540 t intel_dp_mode_valid +ffffffff81a47ce0 t intel_dp_connector_atomic_check +ffffffff81a48020 t intel_dp_get_dsc_sink_cap +ffffffff81a49000 T intel_dp_aux_fini +ffffffff81a49020 T intel_dp_aux_init +ffffffff81a49200 t xelpdp_aux_ctl_reg +ffffffff81a492c0 t xelpdp_aux_data_reg +ffffffff81a49390 t tgl_aux_ctl_reg +ffffffff81a49410 t tgl_aux_data_reg +ffffffff81a494a0 t skl_aux_ctl_reg +ffffffff81a49520 t skl_aux_data_reg +ffffffff81a495b0 t ilk_aux_ctl_reg +ffffffff81a49630 t ilk_aux_data_reg +ffffffff81a496c0 t g4x_aux_ctl_reg +ffffffff81a49740 t g4x_aux_data_reg +ffffffff81a497d0 t skl_get_aux_clock_divider +ffffffff81a49800 t hsw_get_aux_clock_divider +ffffffff81a498a0 t ilk_get_aux_clock_divider +ffffffff81a49900 t g4x_get_aux_clock_divider +ffffffff81a49950 t skl_get_aux_send_ctl +ffffffff81a499d0 t g4x_get_aux_send_ctl +ffffffff81a49a20 t kasprintf +ffffffff81a49af0 t intel_dp_aux_transfer +ffffffff81a49d40 t intel_dp_aux_xfer +ffffffff81a4b000 T intel_dp_aux_init_backlight_funcs +ffffffff81a4b270 t intel_dp_aux_hdr_setup_backlight +ffffffff81a4b3c0 t intel_dp_aux_hdr_get_backlight +ffffffff81a4b530 t intel_dp_aux_hdr_set_backlight +ffffffff81a4b620 t intel_dp_aux_hdr_disable_backlight +ffffffff81a4b6a0 t intel_dp_aux_hdr_enable_backlight +ffffffff81a4b8e0 t intel_dp_aux_vesa_setup_backlight +ffffffff81a4baa0 t intel_dp_aux_vesa_get_backlight +ffffffff81a4bad0 t intel_dp_aux_vesa_set_backlight +ffffffff81a4bb70 t intel_dp_aux_vesa_disable_backlight +ffffffff81a4bc20 t intel_dp_aux_vesa_enable_backlight +ffffffff81a4c000 T intel_dp_hdcp_init +ffffffff81a4c0b0 t intel_dp_hdcp_write_an_aksv +ffffffff81a4c1a0 t intel_dp_hdcp_read_bksv +ffffffff81a4c230 t intel_dp_hdcp_read_bstatus +ffffffff81a4c2c0 t intel_dp_hdcp_repeater_present +ffffffff81a4c370 t intel_dp_hdcp_read_ri_prime +ffffffff81a4c400 t intel_dp_hdcp_read_ksv_ready +ffffffff81a4c4a0 t intel_dp_hdcp_read_ksv_fifo +ffffffff81a4c590 t intel_dp_hdcp_read_v_prime_part +ffffffff81a4c630 t intel_dp_hdcp_toggle_signalling +ffffffff81a4c660 t intel_dp_mst_hdcp_stream_encryption +ffffffff81a4c860 t intel_dp_hdcp_check_link +ffffffff81a4c8f0 t intel_dp_hdcp_capable +ffffffff81a4c9a0 t intel_dp_hdcp2_capable +ffffffff81a4ca20 t intel_dp_hdcp2_write_msg +ffffffff81a4cae0 t intel_dp_hdcp2_read_msg +ffffffff81a4d200 t intel_dp_hdcp2_config_stream_type +ffffffff81a4d2b0 t intel_dp_mst_hdcp2_stream_encryption +ffffffff81a4d530 t intel_dp_mst_hdcp2_check_link +ffffffff81a4d5f0 t get_hdcp2_dp_msg_data +ffffffff81a4d730 t intel_dp_hdcp2_check_link +ffffffff81a4e000 T intel_dp_init_lttpr_and_dprx_caps +ffffffff81a4e2c0 T intel_dp_get_adjust_train +ffffffff81a4e980 T intel_dp_program_link_training_pattern +ffffffff81a4ea80 T intel_dp_set_signal_levels +ffffffff81a4ede0 T intel_dp_dump_link_status +ffffffff81a4eeb0 T intel_dp_stop_link_train +ffffffff81a4f0e0 T intel_dp_start_link_train +ffffffff81a50210 t intel_dp_link_train_phy +ffffffff81a52000 T intel_dp_mst_encoder_active_links +ffffffff81a52030 T intel_dp_mst_encoder_init +ffffffff81a52270 T intel_dp_mst_source_support +ffffffff81a522b0 T intel_dp_mst_encoder_cleanup +ffffffff81a52310 T intel_dp_mst_is_master_trans +ffffffff81a52350 T intel_dp_mst_is_slave_trans +ffffffff81a52390 T intel_dp_mst_add_topology_state_for_crtc +ffffffff81a52460 t intel_dp_add_mst_connector +ffffffff81a52670 t intel_dp_mst_poll_hpd_irq +ffffffff81a52690 t intel_dp_mst_get_hw_state +ffffffff81a526f0 t intel_dp_mst_connector_late_register +ffffffff81a52760 t intel_dp_mst_connector_early_unregister +ffffffff81a52790 t intel_dp_mst_get_modes +ffffffff81a52830 t intel_dp_mst_detect +ffffffff81a52930 t intel_dp_mst_mode_valid_ctx +ffffffff81a52a90 t intel_mst_atomic_best_encoder +ffffffff81a52af0 t intel_dp_mst_atomic_check +ffffffff81a52c70 t intel_dp_mst_compute_config +ffffffff81a52f80 t intel_dp_mst_compute_config_late +ffffffff81a53080 t intel_mst_disable_dp +ffffffff81a53170 t intel_mst_post_disable_dp +ffffffff81a53430 t intel_mst_pre_pll_enable_dp +ffffffff81a53480 t intel_mst_pre_enable_dp +ffffffff81a536a0 t intel_mst_enable_dp +ffffffff81a53a90 t intel_dp_mst_enc_get_hw_state +ffffffff81a53ad0 t intel_dp_mst_enc_get_config +ffffffff81a53af0 t intel_dp_mst_initial_fastset_check +ffffffff81a53b10 t intel_dp_mst_encoder_destroy +ffffffff81a54000 T bxt_port_to_phy_channel +ffffffff81a54130 T bxt_ddi_phy_set_signal_levels +ffffffff81a54650 T bxt_ddi_phy_is_enabled +ffffffff81a547a0 T bxt_ddi_phy_uninit +ffffffff81a548a0 T bxt_ddi_phy_init +ffffffff81a54ad0 t _bxt_ddi_phy_init +ffffffff81a550e0 T bxt_ddi_phy_verify_state +ffffffff81a55420 t __phy_reg_verify_state +ffffffff81a55520 T bxt_ddi_phy_calc_lane_lat_optim_mask +ffffffff81a55590 T bxt_ddi_phy_set_lane_optim_mask +ffffffff81a558c0 T bxt_ddi_phy_get_lane_lat_optim_mask +ffffffff81a55b10 T chv_set_phy_signal_level +ffffffff81a55e70 T chv_data_lane_soft_reset +ffffffff81a56050 T chv_phy_pre_pll_enable +ffffffff81a562f0 T chv_phy_pre_encoder_enable +ffffffff81a56580 T chv_phy_release_cl2_override +ffffffff81a56610 T chv_phy_post_pll_disable +ffffffff81a566c0 T vlv_set_phy_signal_level +ffffffff81a56840 T vlv_phy_pre_pll_enable +ffffffff81a56960 T vlv_phy_pre_encoder_enable +ffffffff81a56a80 T vlv_phy_reset_lanes +ffffffff81a57000 T pnv_calc_dpll_params +ffffffff81a570c0 T i9xx_calc_dpll_params +ffffffff81a57190 T vlv_calc_dpll_params +ffffffff81a57250 T chv_calc_dpll_params +ffffffff81a57320 T bxt_find_best_dpll +ffffffff81a57340 t chv_find_best_dpll +ffffffff81a57680 T i9xx_dpll_compute_fp +ffffffff81a576c0 T vlv_compute_dpll +ffffffff81a57740 T chv_compute_dpll +ffffffff81a577c0 T intel_dpll_crtc_compute_clock +ffffffff81a578c0 T intel_dpll_crtc_get_shared_dpll +ffffffff81a57a10 T intel_dpll_init_clock_hook +ffffffff81a57b00 T i9xx_enable_pll +ffffffff81a57eb0 T vlv_enable_pll +ffffffff81a58410 T chv_enable_pll +ffffffff81a58a90 T vlv_force_pll_on +ffffffff81a58be0 T vlv_disable_pll +ffffffff81a58ca0 T chv_disable_pll +ffffffff81a58dd0 T i9xx_disable_pll +ffffffff81a58ed0 T vlv_force_pll_off +ffffffff81a58fc0 T assert_pll_enabled +ffffffff81a590a0 T assert_pll_disabled +ffffffff81a59180 t intel_pll_is_valid +ffffffff81a59250 t dg2_crtc_compute_clock +ffffffff81a592d0 t hsw_crtc_compute_clock +ffffffff81a59390 t hsw_crtc_get_shared_dpll +ffffffff81a59430 t ilk_crtc_compute_clock +ffffffff81a59730 t ilk_crtc_get_shared_dpll +ffffffff81a59780 t g4x_find_best_dpll +ffffffff81a59ac0 t chv_crtc_compute_clock +ffffffff81a59bd0 t vlv_crtc_compute_clock +ffffffff81a5a090 t g4x_crtc_compute_clock +ffffffff81a5a1e0 t i9xx_compute_dpll +ffffffff81a5a460 t pnv_crtc_compute_clock +ffffffff81a5a820 t i9xx_crtc_compute_clock +ffffffff81a5a940 t i9xx_find_best_dpll +ffffffff81a5ac70 t i8xx_crtc_compute_clock +ffffffff81a5b000 T intel_get_shared_dpll_by_id +ffffffff81a5b040 T intel_get_shared_dpll_id +ffffffff81a5b0d0 T assert_shared_dpll +ffffffff81a5b1f0 T intel_dpll_get_hw_state +ffffffff81a5b220 T icl_tc_port_to_pll_id +ffffffff81a5b250 T intel_enable_shared_dpll +ffffffff81a5b540 T intel_disable_shared_dpll +ffffffff81a5b780 T intel_shared_dpll_swap_state +ffffffff81a5b860 T icl_set_active_port_dpll +ffffffff81a5b8a0 T intel_shared_dpll_init +ffffffff81a5bab0 T intel_compute_shared_dplls +ffffffff81a5bb40 T intel_reserve_shared_dplls +ffffffff81a5bbd0 T intel_release_shared_dplls +ffffffff81a5bc10 T intel_update_active_dpll +ffffffff81a5bc70 T intel_dpll_get_freq +ffffffff81a5bd00 T intel_dpll_update_ref_clks +ffffffff81a5bd50 T intel_dpll_readout_hw_state +ffffffff81a5bed0 T intel_dpll_sanitize_state +ffffffff81a5bfb0 T intel_dpll_dump_hw_state +ffffffff81a5c030 T intel_shared_dpll_state_verify +ffffffff81a5c150 t verify_single_dpll_state +ffffffff81a5c470 T intel_shared_dpll_verify_disabled +ffffffff81a5c4f0 t icl_compute_dplls +ffffffff81a5d2d0 t icl_get_dplls +ffffffff81a5da50 t icl_put_dplls +ffffffff81a5db10 t icl_update_active_dpll +ffffffff81a5dbc0 t icl_update_dpll_ref_clks +ffffffff81a5dc00 t icl_dump_hw_state +ffffffff81a5dcc0 t combo_pll_enable +ffffffff81a5dee0 t combo_pll_disable +ffffffff81a5dfd0 t combo_pll_get_hw_state +ffffffff81a5e060 t icl_ddi_combo_pll_get_freq +ffffffff81a5e230 t icl_dpll_write +ffffffff81a5e4d0 t adlp_cmtg_clock_gating_wa +ffffffff81a5e630 t icl_pll_disable +ffffffff81a5e7d0 t icl_pll_get_hw_state +ffffffff81a5eb10 t tbt_pll_enable +ffffffff81a5ecc0 t tbt_pll_disable +ffffffff81a5ece0 t tbt_pll_get_hw_state +ffffffff81a5ed00 t icl_ddi_tbt_pll_get_freq +ffffffff81a5ed70 t mg_pll_enable +ffffffff81a5f320 t mg_pll_disable +ffffffff81a5f360 t dkl_pll_get_hw_state +ffffffff81a5f530 t icl_ddi_mg_pll_get_freq +ffffffff81a5f610 t intel_find_shared_dpll +ffffffff81a5f940 t intel_unreference_shared_dpll +ffffffff81a5faa0 t mg_pll_get_hw_state +ffffffff81a5fcf0 t bxt_compute_dpll +ffffffff81a60010 t bxt_get_dpll +ffffffff81a60270 t intel_put_dpll +ffffffff81a602d0 t bxt_update_dpll_ref_clks +ffffffff81a60310 t bxt_dump_hw_state +ffffffff81a603c0 t bxt_ddi_pll_enable +ffffffff81a60ec0 t bxt_ddi_pll_disable +ffffffff81a610d0 t bxt_ddi_pll_get_hw_state +ffffffff81a61560 t bxt_ddi_pll_get_freq +ffffffff81a615f0 t bxt_ddi_set_dpll_hw_state +ffffffff81a617b0 t skl_compute_dpll +ffffffff81a61f30 t skl_get_dpll +ffffffff81a62160 t skl_update_dpll_ref_clks +ffffffff81a621a0 t skl_dump_hw_state +ffffffff81a62200 t skl_ddi_dpll0_enable +ffffffff81a622c0 t skl_ddi_dpll0_disable +ffffffff81a622f0 t skl_ddi_dpll0_get_hw_state +ffffffff81a623f0 t skl_ddi_pll_get_freq +ffffffff81a62480 t skl_ddi_wrpll_get_freq +ffffffff81a625e0 t skl_ddi_pll_enable +ffffffff81a627f0 t skl_ddi_pll_disable +ffffffff81a62880 t skl_ddi_pll_get_hw_state +ffffffff81a629a0 t hsw_compute_dpll +ffffffff81a631f0 t hsw_get_dpll +ffffffff81a634b0 t hsw_update_dpll_ref_clks +ffffffff81a63520 t hsw_dump_hw_state +ffffffff81a63550 t hsw_ddi_wrpll_enable +ffffffff81a635d0 t hsw_ddi_wrpll_disable +ffffffff81a636b0 t hsw_ddi_wrpll_get_hw_state +ffffffff81a63750 t hsw_ddi_wrpll_get_freq +ffffffff81a63840 t hsw_ddi_spll_enable +ffffffff81a638a0 t hsw_ddi_spll_disable +ffffffff81a63970 t hsw_ddi_spll_get_hw_state +ffffffff81a63a00 t hsw_ddi_spll_get_freq +ffffffff81a63aa0 t hsw_ddi_lcpll_enable +ffffffff81a63ad0 t hsw_ddi_lcpll_disable +ffffffff81a63b00 t hsw_ddi_lcpll_get_hw_state +ffffffff81a63b30 t hsw_ddi_lcpll_get_freq +ffffffff81a63bb0 t ibx_compute_dpll +ffffffff81a63be0 t ibx_get_dpll +ffffffff81a63e60 t ibx_dump_hw_state +ffffffff81a63ec0 t ibx_pch_dpll_enable +ffffffff81a64070 t ibx_pch_dpll_disable +ffffffff81a640f0 t ibx_pch_dpll_get_hw_state +ffffffff81a65000 T intel_dpt_pin +ffffffff81a651e0 T intel_dpt_unpin +ffffffff81a65250 T intel_dpt_resume +ffffffff81a65330 T intel_dpt_suspend +ffffffff81a65400 T intel_dpt_create +ffffffff81a65730 t dpt_insert_page +ffffffff81a657a0 t dpt_clear_range +ffffffff81a657d0 t dpt_insert_entries +ffffffff81a658d0 t dpt_cleanup +ffffffff81a65920 t dpt_bind_vma +ffffffff81a659b0 t dpt_unbind_vma +ffffffff81a659e0 T intel_dpt_destroy +ffffffff81a65a30 t __ww_mutex_lock +ffffffff81a66000 T intel_drrs_type_str +ffffffff81a66040 T intel_drrs_is_active +ffffffff81a66070 T intel_drrs_activate +ffffffff81a66270 T intel_drrs_deactivate +ffffffff81a66350 t intel_drrs_set_state +ffffffff81a664a0 T intel_drrs_invalidate +ffffffff81a664c0 t intel_drrs_frontbuffer_update +ffffffff81a66620 T intel_drrs_flush +ffffffff81a66640 T intel_crtc_drrs_init +ffffffff81a666e0 t intel_drrs_downclock_work +ffffffff81a66740 t __delayed_work_tick +ffffffff81a67000 T intel_dsb_indexed_reg_write +ffffffff81a67140 T intel_dsb_reg_write +ffffffff81a67230 T intel_dsb_commit +ffffffff81a67680 T intel_dsb_prepare +ffffffff81a67810 T intel_dsb_cleanup +ffffffff81a68000 T intel_dsi_bitrate +ffffffff81a680a0 T intel_dsi_tlpx_ns +ffffffff81a680f0 T intel_dsi_get_modes +ffffffff81a68100 T intel_dsi_mode_valid +ffffffff81a681c0 T intel_dsi_host_init +ffffffff81a68270 T intel_dsi_get_panel_orientation +ffffffff81a69000 T intel_dsi_dcs_init_backlight_funcs +ffffffff81a690a0 t dcs_setup_backlight +ffffffff81a69100 t dcs_get_backlight +ffffffff81a69200 t dcs_set_backlight +ffffffff81a692f0 t dcs_disable_backlight +ffffffff81a69670 t dcs_enable_backlight +ffffffff81a6a000 T intel_dsi_vbt_exec_sequence +ffffffff81a6a020 T intel_dsi_log_params +ffffffff81a6a3a0 T intel_dsi_vbt_init +ffffffff81a6a830 T intel_dsi_vbt_gpio_init +ffffffff81a6a850 T intel_dsi_vbt_gpio_cleanup +ffffffff81a6b000 T intel_dvo_init +ffffffff81a6b4f0 t intel_disable_dvo +ffffffff81a6b5a0 t intel_enable_dvo +ffffffff81a6b690 t intel_dvo_get_hw_state +ffffffff81a6b700 t intel_dvo_get_config +ffffffff81a6b7b0 t intel_dvo_compute_config +ffffffff81a6b840 t intel_dvo_pre_enable +ffffffff81a6b930 t intel_dvo_connector_get_hw_state +ffffffff81a6b9b0 t intel_dvo_enc_destroy +ffffffff81a6b9f0 t intel_dvo_detect +ffffffff81a6baf0 t intel_dvo_get_modes +ffffffff81a6bb60 t intel_dvo_mode_valid +ffffffff81a6c000 T intel_fb_get_format_info +ffffffff81a6c240 T intel_fb_is_ccs_modifier +ffffffff81a6c410 T intel_fb_is_rc_ccs_cc_modifier +ffffffff81a6c5e0 T intel_fb_is_mc_ccs_modifier +ffffffff81a6c7b0 T intel_fb_plane_get_modifiers +ffffffff81a6c8f0 T intel_fb_plane_supports_modifier +ffffffff81a6c960 T intel_format_info_is_yuv_semiplanar +ffffffff81a6cc00 T intel_fb_is_ccs_aux_plane +ffffffff81a6ce40 T intel_fb_rc_ccs_cc_plane +ffffffff81a6d0a0 T is_surface_linear +ffffffff81a6d3d0 T main_to_ccs_plane +ffffffff81a6d6b0 T skl_ccs_to_main_plane +ffffffff81a6d9a0 T skl_main_to_aux_plane +ffffffff81a6dc00 T intel_tile_size +ffffffff81a6dc40 T intel_tile_width_bytes +ffffffff81a6de90 T intel_tile_height +ffffffff81a6def0 T intel_tile_row_size +ffffffff81a6df70 T intel_fb_align_height +ffffffff81a6dff0 T intel_fb_uses_dpt +ffffffff81a6e040 T intel_cursor_alignment +ffffffff81a6e0a0 T intel_surf_alignment +ffffffff81a6e2c0 T intel_fb_plane_get_subsampling +ffffffff81a6e690 T intel_plane_adjust_aligned_offset +ffffffff81a6e700 t intel_adjust_aligned_offset +ffffffff81a6e8b0 T intel_plane_compute_aligned_offset +ffffffff81a6e9b0 t intel_compute_aligned_offset +ffffffff81a6eb70 T intel_fb_needs_pot_stride_remap +ffffffff81a6ebc0 T intel_fb_supports_90_270_rotation +ffffffff81a6ec10 T intel_fill_fb_info +ffffffff81a6f850 t calc_plane_remap_info +ffffffff81a702b0 T intel_fb_fill_view +ffffffff81a70300 T intel_plane_compute_gtt +ffffffff81a70bd0 t intel_plane_check_stride +ffffffff81a70f40 T intel_framebuffer_init +ffffffff81a72330 T intel_user_framebuffer_create +ffffffff81a72470 T intel_framebuffer_create +ffffffff81a72500 t intel_adjust_tile_offset +ffffffff81a72640 t intel_user_framebuffer_destroy +ffffffff81a726a0 t intel_user_framebuffer_create_handle +ffffffff81a726c0 t intel_user_framebuffer_dirty +ffffffff81a73000 T intel_pin_and_fence_fb_obj +ffffffff81a73320 t i915_gem_object_lock +ffffffff81a73530 T intel_unpin_fb_vma +ffffffff81a735a0 T intel_plane_pin_fb +ffffffff81a738d0 T intel_plane_unpin_fb +ffffffff81a74000 T intel_fbc_cleanup +ffffffff81a741c0 T intel_fbc_pre_update +ffffffff81a74810 T intel_fbc_post_update +ffffffff81a74a60 T intel_fbc_invalidate +ffffffff81a74c80 T intel_fbc_flush +ffffffff81a74f10 T intel_fbc_atomic_check +ffffffff81a75480 T intel_fbc_disable +ffffffff81a75540 t __intel_fbc_disable +ffffffff81a756d0 T intel_fbc_update +ffffffff81a75d90 T intel_fbc_reset_underrun +ffffffff81a75ef0 T intel_fbc_handle_fifo_underrun_irq +ffffffff81a75fa0 T intel_fbc_add_plane +ffffffff81a75fd0 T intel_fbc_init +ffffffff81a76260 T intel_fbc_sanitize +ffffffff81a76330 T intel_fbc_crtc_debugfs_add +ffffffff81a76360 T intel_fbc_debugfs_register +ffffffff81a76390 t intel_fbc_is_ok +ffffffff81a764b0 t intel_fbc_update_state +ffffffff81a76820 t intel_fbc_underrun_work_fn +ffffffff81a76940 t ivb_fbc_activate +ffffffff81a76ba0 t ilk_fbc_deactivate +ffffffff81a76c50 t ilk_fbc_is_active +ffffffff81a76cb0 t ivb_fbc_is_compressing +ffffffff81a76d20 t snb_fbc_nuke +ffffffff81a76da0 t ilk_fbc_program_cfb +ffffffff81a76de0 t ivb_fbc_set_false_color +ffffffff81a76ea0 t snb_fbc_activate +ffffffff81a76f30 t ilk_fbc_is_compressing +ffffffff81a76fa0 t ilk_fbc_activate +ffffffff81a770d0 t i965_fbc_nuke +ffffffff81a77170 t g4x_fbc_activate +ffffffff81a77280 t g4x_fbc_deactivate +ffffffff81a77310 t g4x_fbc_is_active +ffffffff81a77370 t g4x_fbc_is_compressing +ffffffff81a773d0 t g4x_fbc_program_cfb +ffffffff81a77400 t i8xx_fbc_activate +ffffffff81a77570 t i8xx_fbc_deactivate +ffffffff81a77640 t i8xx_fbc_is_active +ffffffff81a776a0 t i8xx_fbc_is_compressing +ffffffff81a77700 t i8xx_fbc_program_cfb +ffffffff81a77780 t i8xx_fbc_nuke +ffffffff81a78000 T intel_fbdev_init +ffffffff81a784d0 t intel_fbdev_suspend_worker +ffffffff81a78500 T intel_fbdev_initial_config_async +ffffffff81a78570 T intel_fbdev_unregister +ffffffff81a785b0 T intel_fbdev_set_suspend +ffffffff81a785e0 T intel_fbdev_fini +ffffffff81a78670 T intel_fbdev_output_poll_changed +ffffffff81a78710 T intel_fbdev_restore_mode +ffffffff81a78790 T intel_fbdev_framebuffer +ffffffff81a787d0 t intelfb_create +ffffffff81a78dd0 t intel_fbdev_set_par +ffffffff81a79000 T assert_fdi_tx_enabled +ffffffff81a790e0 T assert_fdi_tx_disabled +ffffffff81a791c0 T assert_fdi_rx_enabled +ffffffff81a79280 T assert_fdi_rx_disabled +ffffffff81a79340 T assert_fdi_tx_pll_enabled +ffffffff81a793f0 T assert_fdi_rx_pll_enabled +ffffffff81a794b0 T assert_fdi_rx_pll_disabled +ffffffff81a79570 T intel_fdi_link_train +ffffffff81a79590 T intel_fdi_pll_freq_update +ffffffff81a79640 T intel_fdi_link_freq +ffffffff81a79690 T ilk_fdi_compute_config +ffffffff81a799d0 T intel_fdi_normal_train +ffffffff81a79b60 T hsw_fdi_link_train +ffffffff81a7a060 T hsw_fdi_disable +ffffffff81a7a1c0 T ilk_fdi_pll_enable +ffffffff81a7a3d0 T ilk_fdi_pll_disable +ffffffff81a7a500 T ilk_fdi_disable +ffffffff81a7a770 T intel_fdi_init_hook +ffffffff81a7a7d0 t ilk_fdi_link_train +ffffffff81a7ae40 t gen6_fdi_link_train +ffffffff81a7b670 t ivb_manual_fdi_link_train +ffffffff81a7bf10 t cpt_set_fdi_bc_bifurcation +ffffffff81a7d000 T intel_set_cpu_fifo_underrun_reporting +ffffffff81a7d3e0 T intel_set_pch_fifo_underrun_reporting +ffffffff81a7d610 T intel_cpu_fifo_underrun_irq_handler +ffffffff81a7d800 T intel_pch_fifo_underrun_irq_handler +ffffffff81a7d880 T intel_check_cpu_fifo_underruns +ffffffff81a7daa0 T intel_check_pch_fifo_underruns +ffffffff81a7e000 T intel_frontbuffer_flip_prepare +ffffffff81a7e050 T intel_frontbuffer_flip_complete +ffffffff81a7e130 T intel_frontbuffer_flip +ffffffff81a7e200 T __intel_fb_invalidate +ffffffff81a7e290 T __intel_fb_flush +ffffffff81a7e380 T intel_frontbuffer_get +ffffffff81a7e4c0 t frontbuffer_active +ffffffff81a7e4f0 t frontbuffer_retire +ffffffff81a7e530 T intel_frontbuffer_put +ffffffff81a7e6c0 T intel_frontbuffer_track +ffffffff81a7f000 T intel_atomic_global_obj_init +ffffffff81a7f070 T intel_atomic_global_obj_cleanup +ffffffff81a7f170 T intel_atomic_get_global_obj_state +ffffffff81a7f3e0 T intel_atomic_get_old_global_obj_state +ffffffff81a7f440 T intel_atomic_get_new_global_obj_state +ffffffff81a7f4a0 T intel_atomic_swap_global_state +ffffffff81a7f5f0 T intel_atomic_clear_global_state +ffffffff81a7f720 T intel_atomic_lock_global_state +ffffffff81a7f7a0 T intel_atomic_serialize_global_state +ffffffff81a80000 T intel_gmbus_is_valid_pin +ffffffff81a80110 T intel_gmbus_reset +ffffffff81a80170 T intel_bb_set_bits +ffffffff81a802a0 T intel_bb_set_dir +ffffffff81a802d0 T intel_bb_read_bits +ffffffff81a80450 T intel_acquire_bus +ffffffff81a80650 T intel_release_bus +ffffffff81a807f0 T intel_send_start +ffffffff81a80810 T intel_send_stop +ffffffff81a80830 T intel_initiate_xfer +ffffffff81a80850 T intel_read_byte +ffffffff81a80870 T intel_write_byte +ffffffff81a80890 T intel_gmbus_output_aksv +ffffffff81a80960 t do_gmbus_xfer +ffffffff81a80f60 T intel_gmbus_setup +ffffffff81a812f0 T intel_gmbus_teardown +ffffffff81a81370 T intel_gmbus_get_adapter +ffffffff81a813f0 T intel_gmbus_force_bit +ffffffff81a81490 T intel_gmbus_is_forced_bit +ffffffff81a814c0 t gmbus_xfer_read +ffffffff81a81790 t gmbus_xfer_write +ffffffff81a819e0 t gmbus_wait +ffffffff81a81dc0 t gmbus_wait_idle +ffffffff81a81f50 t gmbus_xfer +ffffffff81a82030 t gmbus_func +ffffffff81a82070 t gmbus_lock_bus +ffffffff81a82090 t gmbus_trylock_bus +ffffffff81a820f0 t gmbus_unlock_bus +ffffffff81a83000 T intel_hdcp_capable +ffffffff81a830a0 t intel_hdcp_read_valid_bksv +ffffffff81a83320 T intel_hdcp2_capable +ffffffff81a83400 T is_hdcp_supported +ffffffff81a83450 T intel_hdcp_component_init +ffffffff81a83480 T intel_hdcp_init +ffffffff81a835c0 t intel_hdcp_check_work +ffffffff81a87480 t intel_hdcp_prop_work +ffffffff81a87500 T intel_hdcp_enable +ffffffff81a87550 T intel_hdcp_disable +ffffffff81a87680 t intel_hdcp_update_value +ffffffff81a87840 t _intel_hdcp2_disable +ffffffff81a87c30 t _intel_hdcp_disable +ffffffff81a87f20 T intel_hdcp_update_pipe +ffffffff81a88090 T intel_hdcp_component_fini +ffffffff81a880d0 T intel_hdcp_cleanup +ffffffff81a88210 T intel_hdcp_atomic_check +ffffffff81a882a0 T intel_hdcp_handle_cp_irq +ffffffff81a883a0 t __delayed_work_tick +ffffffff81a883c0 t hdcp2_authenticate_repeater_topology +ffffffff81a886a0 t intel_hdcp_get_repeater_ctl +ffffffff81a89000 T hsw_write_infoframe +ffffffff81a89410 t hsw_dip_data_reg +ffffffff81a895d0 T hsw_read_infoframe +ffffffff81a89690 T intel_hdmi_infoframe_enable +ffffffff81a89730 T intel_hdmi_infoframes_enabled +ffffffff81a89850 T intel_read_infoframe +ffffffff81a899e0 T intel_hdmi_read_gcp_infoframe +ffffffff81a89ad0 T intel_dp_dual_mode_set_tmds_output +ffffffff81a89ba0 T intel_hdmi_tmds_clock +ffffffff81a89bf0 T intel_hdmi_bpc_possible +ffffffff81a89d20 T intel_hdmi_limited_color_range +ffffffff81a89d90 T intel_hdmi_compute_config +ffffffff81a8a4e0 t intel_hdmi_compute_output_format +ffffffff81a8a610 T intel_hdmi_encoder_shutdown +ffffffff81a8a6e0 T intel_hdmi_handle_sink_scrambling +ffffffff81a8a800 T intel_infoframe_init +ffffffff81a8a980 t vlv_write_infoframe +ffffffff81a8ace0 t vlv_read_infoframe +ffffffff81a8aeb0 t vlv_set_infoframes +ffffffff81a8b250 t vlv_infoframes_enabled +ffffffff81a8b2f0 t g4x_write_infoframe +ffffffff81a8b5b0 t g4x_read_infoframe +ffffffff81a8b700 t g4x_set_infoframes +ffffffff81a8b9a0 t g4x_infoframes_enabled +ffffffff81a8ba20 t hsw_set_infoframes +ffffffff81a8bcc0 t hsw_infoframes_enabled +ffffffff81a8bd50 t ibx_write_infoframe +ffffffff81a8c070 t ibx_read_infoframe +ffffffff81a8c1f0 t ibx_set_infoframes +ffffffff81a8c560 t ibx_infoframes_enabled +ffffffff81a8c5f0 t cpt_write_infoframe +ffffffff81a8c8f0 t cpt_read_infoframe +ffffffff81a8ca70 t cpt_set_infoframes +ffffffff81a8cd80 t cpt_infoframes_enabled +ffffffff81a8cdf0 T intel_hdmi_init_connector +ffffffff81a8d480 T intel_hdmi_dsc_get_slice_height +ffffffff81a8d4e0 T intel_hdmi_dsc_get_num_slices +ffffffff81a8d660 T intel_hdmi_dsc_get_bpp +ffffffff81a8d750 t intel_hdmi_compute_clock +ffffffff81a8da10 t hdmi_port_clock_valid +ffffffff81a8dc40 t intel_write_infoframe +ffffffff81a8de10 t intel_hdmi_detect +ffffffff81a8dfd0 t intel_hdmi_force +ffffffff81a8e0b0 t intel_hdmi_connector_register +ffffffff81a8e0c0 t intel_hdmi_connector_unregister +ffffffff81a8e0d0 t intel_hdmi_set_edid +ffffffff81a8e370 t intel_hdmi_get_modes +ffffffff81a8e3b0 t intel_hdmi_mode_valid +ffffffff81a8e550 t intel_hdmi_mode_clock_valid +ffffffff81a8e6e0 t intel_hdmi_hdcp_write_an_aksv +ffffffff81a8e830 t intel_hdmi_hdcp_read_bksv +ffffffff81a8e900 t intel_hdmi_hdcp_read_bstatus +ffffffff81a8e9d0 t intel_hdmi_hdcp_repeater_present +ffffffff81a8eab0 t intel_hdmi_hdcp_read_ri_prime +ffffffff81a8eb80 t intel_hdmi_hdcp_read_ksv_ready +ffffffff81a8ec60 t intel_hdmi_hdcp_read_ksv_fifo +ffffffff81a8ed30 t intel_hdmi_hdcp_read_v_prime_part +ffffffff81a8ee20 t intel_hdmi_hdcp_toggle_signalling +ffffffff81a8f0a0 t intel_hdmi_hdcp_check_link +ffffffff81a8f3f0 t intel_hdmi_hdcp2_capable +ffffffff81a8f4b0 t intel_hdmi_hdcp2_write_msg +ffffffff81a8f5a0 t intel_hdmi_hdcp2_read_msg +ffffffff81a8fa40 t intel_hdmi_hdcp2_check_link +ffffffff81a90000 T intel_hpd_pin_default +ffffffff81a90030 T intel_encoder_hotplug +ffffffff81a90160 T intel_hpd_trigger_irq +ffffffff81a901d0 T intel_hpd_irq_handler +ffffffff81a905b0 T intel_hpd_init +ffffffff81a906c0 T intel_hpd_poll_enable +ffffffff81a90740 T intel_hpd_poll_disable +ffffffff81a907a0 T intel_hpd_init_work +ffffffff81a90870 t i915_hotplug_work_func +ffffffff81a90bc0 t i915_digport_work_func +ffffffff81a90d50 t i915_hpd_poll_init_work +ffffffff81a90e60 t intel_hpd_irq_storm_reenable_work +ffffffff81a911b0 T intel_hpd_cancel_work +ffffffff81a912d0 T intel_hpd_disable +ffffffff81a91360 T intel_hpd_enable +ffffffff81a913d0 t __delayed_work_tick +ffffffff81a92000 T intel_lpe_audio_irq_handler +ffffffff81a92020 T intel_lpe_audio_init +ffffffff81a92050 T intel_lpe_audio_teardown +ffffffff81a92070 T intel_lpe_audio_notify +ffffffff81a93000 T lspcon_detect_hdr_capability +ffffffff81a930b0 T lspcon_write_infoframe +ffffffff81a93820 T lspcon_read_infoframe +ffffffff81a93860 T lspcon_set_infoframes +ffffffff81a93ac0 T lspcon_infoframes_enabled +ffffffff81a93cb0 T lspcon_wait_pcon_mode +ffffffff81a93cd0 t lspcon_wait_mode +ffffffff81a93f90 T lspcon_init +ffffffff81a94390 T intel_lspcon_infoframes_enabled +ffffffff81a943d0 T lspcon_resume +ffffffff81a94680 t lspcon_change_mode +ffffffff81a95000 T intel_lvds_port_enabled +ffffffff81a95080 T intel_get_lvds_encoder +ffffffff81a950e0 T intel_is_dual_link_lvds +ffffffff81a95150 T intel_lvds_init +ffffffff81a958c0 t intel_enable_lvds +ffffffff81a95a00 t intel_pre_enable_lvds +ffffffff81a95cd0 t intel_lvds_compute_config +ffffffff81a95e30 t pch_disable_lvds +ffffffff81a95e50 t pch_post_disable_lvds +ffffffff81a95e70 t gmch_disable_lvds +ffffffff81a95ea0 t intel_lvds_get_hw_state +ffffffff81a95f60 t intel_lvds_get_config +ffffffff81a96060 t intel_lvds_shutdown +ffffffff81a96100 t intel_no_lvds_dmi_callback +ffffffff81a96150 t intel_disable_lvds +ffffffff81a96280 t intel_lvds_get_modes +ffffffff81a962b0 t intel_lvds_mode_valid +ffffffff81a96330 t intel_dual_link_lvds_callback +ffffffff81a97000 T intel_modeset_setup_hw_state +ffffffff81a99000 T intel_modeset_verify_crtc +ffffffff81a993b0 t verify_connector_state +ffffffff81a99660 T intel_modeset_verify_disabled +ffffffff81a9a000 T intel_opregion_notify_encoder +ffffffff81a9a170 t swsci +ffffffff81a9a4a0 T intel_opregion_notify_adapter +ffffffff81a9a500 T intel_opregion_asle_intr +ffffffff81a9a550 T intel_opregion_setup +ffffffff81a9ad60 t asle_work +ffffffff81a9b1e0 T intel_opregion_get_panel_type +ffffffff81a9b2d0 T intel_opregion_get_edid +ffffffff81a9b3b0 T intel_opregion_headless_sku +ffffffff81a9b400 T intel_opregion_register +ffffffff81a9b490 T intel_opregion_resume +ffffffff81a9b520 T intel_opregion_suspend +ffffffff81a9b5c0 T intel_opregion_unregister +ffffffff81a9b740 t intel_no_opregion_vbt_callback +ffffffff81a9b7a0 t intel_use_opregion_panel_type_callback +ffffffff81a9c000 T intel_overlay_reset +ffffffff81a9c050 T intel_overlay_switch_off +ffffffff81a9c250 t intel_overlay_release_old_vid +ffffffff81a9c3f0 T intel_overlay_put_image_ioctl +ffffffff81a9d5c0 T intel_overlay_attrs_ioctl +ffffffff81a9da70 T intel_overlay_setup +ffffffff81a9dcd0 t intel_overlay_last_flip_retire +ffffffff81a9dd10 T intel_overlay_cleanup +ffffffff81a9ddd0 T intel_overlay_capture_error_state +ffffffff81a9dec0 T intel_overlay_print_error_state +ffffffff81a9e290 t intel_overlay_release_old_vid_tail +ffffffff81a9e360 t intel_overlay_off_tail +ffffffff81a9e510 t intel_overlay_flip_prepare +ffffffff81a9f000 T intel_panel_use_ssc +ffffffff81a9f060 T intel_panel_preferred_fixed_mode +ffffffff81a9f0b0 T intel_panel_fixed_mode +ffffffff81a9f170 T intel_panel_downclock_mode +ffffffff81a9f260 T intel_panel_highest_mode +ffffffff81a9f2c0 T intel_panel_get_modes +ffffffff81a9f350 T intel_panel_drrs_type +ffffffff81a9f3a0 T intel_panel_compute_config +ffffffff81a9f520 T intel_panel_add_edid_fixed_modes +ffffffff81a9fa50 T intel_panel_add_vbt_lfp_fixed_mode +ffffffff81a9fab0 t intel_panel_add_fixed_mode +ffffffff81a9fc30 T intel_panel_add_vbt_sdvo_fixed_mode +ffffffff81a9fca0 T intel_panel_add_encoder_fixed_mode +ffffffff81a9fce0 T intel_panel_fitting +ffffffff81aa0330 T intel_panel_detect +ffffffff81aa03c0 T intel_panel_mode_valid +ffffffff81aa04d0 T intel_panel_init_alloc +ffffffff81aa0520 T intel_panel_init +ffffffff81aa05e0 T intel_panel_fini +ffffffff81aa1000 T intel_has_pch_trancoder +ffffffff81aa1060 T intel_crtc_pch_transcoder +ffffffff81aa10a0 T intel_pch_transcoder_get_m1_n1 +ffffffff81aa10f0 T intel_pch_transcoder_get_m2_n2 +ffffffff81aa1140 T ilk_pch_pre_enable +ffffffff81aa1170 T ilk_pch_enable +ffffffff81aa1710 t ilk_pch_transcoder_set_timings +ffffffff81aa1990 T ilk_pch_disable +ffffffff81aa19b0 T ilk_pch_post_disable +ffffffff81aa1ce0 T ilk_pch_get_config +ffffffff81aa1ea0 T lpt_pch_enable +ffffffff81aa20d0 T lpt_pch_disable +ffffffff81aa21e0 T lpt_pch_get_config +ffffffff81aa22b0 T intel_pch_sanitize +ffffffff81aa2590 t assert_pch_dp_disabled +ffffffff81aa2680 t assert_pch_hdmi_disabled +ffffffff81aa3000 T lpt_disable_iclkip +ffffffff81aa3070 T lpt_iclkip +ffffffff81aa3100 T lpt_program_iclkip +ffffffff81aa3380 T lpt_get_iclkip +ffffffff81aa3490 T lpt_disable_clkout_dp +ffffffff81aa3570 T intel_init_pch_refclk +ffffffff81aa5000 T intel_crtc_initial_plane_config +ffffffff81aa6000 T intel_pps_lock +ffffffff81aa6060 T intel_pps_unlock +ffffffff81aa60c0 T intel_pps_reset_all +ffffffff81aa6210 T intel_pps_check_power_unlocked +ffffffff81aa63d0 T intel_pps_wait_power_cycle +ffffffff81aa6590 T intel_pps_vdd_on_unlocked +ffffffff81aa6ac0 T intel_pps_vdd_on +ffffffff81aa6bc0 T intel_pps_vdd_off_sync +ffffffff81aa6c90 t intel_pps_vdd_off_sync_unlocked +ffffffff81aa6f70 T intel_pps_vdd_off_unlocked +ffffffff81aa7080 T intel_pps_on_unlocked +ffffffff81aa7480 T intel_pps_on +ffffffff81aa7520 T intel_pps_off_unlocked +ffffffff81aa7770 T intel_pps_off +ffffffff81aa7810 T intel_pps_backlight_on +ffffffff81aa7a20 T intel_pps_backlight_off +ffffffff81aa7c30 T intel_pps_backlight_power +ffffffff81aa7e00 T vlv_pps_init +ffffffff81aa7f60 t vlv_detach_power_sequencer +ffffffff81aa80e0 t vlv_steal_power_sequencer +ffffffff81aa8210 t pps_init_delays +ffffffff81aa8670 t pps_init_registers +ffffffff81aa8a10 T intel_pps_have_panel_power_or_vdd +ffffffff81aa8b70 T intel_pps_encoder_reset +ffffffff81aa8d00 t vlv_initial_power_sequencer_setup +ffffffff81aa8fb0 t pps_vdd_init +ffffffff81aa90c0 T intel_pps_init +ffffffff81aa9240 t edp_panel_vdd_work +ffffffff81aa92f0 T intel_pps_init_late +ffffffff81aa9470 T intel_pps_unlock_regs_wa +ffffffff81aa9560 T intel_pps_setup +ffffffff81aa95d0 T assert_pps_unlocked +ffffffff81aa9820 t intel_pps_get_registers +ffffffff81aa9ee0 t wait_panel_status +ffffffff81aaa1a0 t intel_pps_readout_hw_state +ffffffff81aaa360 t __delayed_work_tick +ffffffff81aab000 T intel_psr_irq_handler +ffffffff81aab680 T intel_psr_init_dpcd +ffffffff81aab910 T intel_psr_compute_config +ffffffff81aac1b0 T intel_psr_get_config +ffffffff81aac360 T intel_psr_disable +ffffffff81aac470 t intel_psr_disable_locked +ffffffff81aac8e0 T intel_psr_pause +ffffffff81aacad0 t intel_psr_exit +ffffffff81aacdb0 T intel_psr_resume +ffffffff81aace40 t intel_psr_activate +ffffffff81aad5e0 T intel_psr2_disable_plane_sel_fetch +ffffffff81aad650 T intel_psr2_program_plane_sel_fetch +ffffffff81aad800 T intel_psr2_program_trans_man_trk_ctl +ffffffff81aad950 T intel_psr2_sel_fetch_update +ffffffff81aadfe0 T intel_psr_pre_plane_update +ffffffff81aae1b0 T intel_psr_post_plane_update +ffffffff81aaec40 T intel_psr_wait_for_idle_locked +ffffffff81aaee20 T intel_psr_debug_set +ffffffff81aaf050 t psr_irq_control +ffffffff81aaf1a0 T intel_psr_invalidate +ffffffff81aaf460 T intel_psr_flush +ffffffff81aaf930 T intel_psr_init +ffffffff81aafa60 t intel_psr_work +ffffffff81aafc10 t tgl_dc3co_disable_work +ffffffff81aafc60 T intel_psr_short_pulse +ffffffff81ab0020 T intel_psr_enabled +ffffffff81ab00a0 T intel_psr_lock +ffffffff81ab0190 T intel_psr_unlock +ffffffff81ab0280 t tgl_psr2_disable_dc3co +ffffffff81ab03b0 t __delayed_work_tick +ffffffff81ab1000 T intel_lookup_range_min_qp +ffffffff81ab10b0 T intel_lookup_range_max_qp +ffffffff81ab2000 T intel_init_quirks +ffffffff81ab20f0 T intel_has_quirk +ffffffff81ab2130 t quirk_ssc_force_disable +ffffffff81ab2160 t quirk_invert_brightness +ffffffff81ab2190 t quirk_backlight_present +ffffffff81ab21c0 t quirk_increase_t12_delay +ffffffff81ab21f0 t quirk_increase_ddi_disabled_time +ffffffff81ab2220 t intel_dmi_reverse_brightness +ffffffff81ab2270 t intel_dmi_no_pps_backlight +ffffffff81ab3000 T intel_sdvo_port_enabled +ffffffff81ab30a0 T intel_sdvo_init +ffffffff81ab3c50 t intel_sdvo_compute_config +ffffffff81ab41b0 t pch_disable_sdvo +ffffffff81ab41e0 t pch_post_disable_sdvo +ffffffff81ab41f0 t intel_disable_sdvo +ffffffff81ab4360 t intel_sdvo_pre_enable +ffffffff81ab4ce0 t intel_enable_sdvo +ffffffff81ab4ee0 t intel_sdvo_get_hw_state +ffffffff81ab4fd0 t intel_sdvo_get_config +ffffffff81ab5540 t intel_sdvo_ddc_proxy_xfer +ffffffff81ab55f0 t intel_sdvo_ddc_proxy_func +ffffffff81ab5620 t __intel_sdvo_write_cmd +ffffffff81ab5ae0 t proxy_lock_bus +ffffffff81ab5b10 t proxy_trylock_bus +ffffffff81ab5b40 t proxy_unlock_bus +ffffffff81ab5b70 t intel_sdvo_enc_destroy +ffffffff81ab5b80 t intel_sdvo_get_preferred_input_mode +ffffffff81ab5f10 t intel_sdvo_get_dtd_from_mode +ffffffff81ab6080 t intel_sdvo_read_response +ffffffff81ab6520 t intel_sdvo_write_sdvox +ffffffff81ab6710 t intel_sdvo_write_infoframe +ffffffff81ab68e0 t intel_sdvo_dvi_init +ffffffff81ab6b60 t intel_sdvo_tv_init +ffffffff81ab6e70 t intel_sdvo_lvds_init +ffffffff81ab7050 t intel_sdvo_hotplug +ffffffff81ab7090 t intel_sdvo_connector_get_hw_state +ffffffff81ab7120 t intel_sdvo_detect +ffffffff81ab74a0 t intel_sdvo_connector_register +ffffffff81ab74b0 t intel_sdvo_connector_unregister +ffffffff81ab74c0 t intel_sdvo_connector_duplicate_state +ffffffff81ab7540 t intel_sdvo_connector_atomic_set_property +ffffffff81ab7710 t intel_sdvo_connector_atomic_get_property +ffffffff81ab7930 t intel_sdvo_get_modes +ffffffff81ab7bf0 t intel_sdvo_mode_valid +ffffffff81ab7cc0 t intel_sdvo_atomic_check +ffffffff81ab7d70 t intel_sdvo_create_enhance_property +ffffffff81ab9000 T intel_snps_phy_wait_for_calibration +ffffffff81ab90d0 T intel_snps_phy_update_psr_power_state +ffffffff81ab91a0 T intel_snps_phy_set_signal_levels +ffffffff81ab93f0 T intel_mpllb_calc_state +ffffffff81ab9560 T intel_snps_phy_check_hdmi_link_rate +ffffffff81ab95c0 T intel_mpllb_enable +ffffffff81ab9820 T intel_mpllb_disable +ffffffff81ab99b0 T intel_mpllb_calc_port_clock +ffffffff81ab9a70 T intel_mpllb_readout_hw_state +ffffffff81ab9be0 T intel_mpllb_state_verify +ffffffff81abb000 T intel_plane_check_src_coordinates +ffffffff81abb1d0 T vlv_plane_min_cdclk +ffffffff81abb2c0 T ivb_plane_min_cdclk +ffffffff81abb380 T hsw_plane_min_cdclk +ffffffff81abb420 T chv_plane_check_rotation +ffffffff81abb490 T intel_sprite_set_colorkey_ioctl +ffffffff81abb760 T intel_sprite_plane_create +ffffffff81abbab0 t vlv_sprite_update_noarm +ffffffff81abbba0 t vlv_sprite_update_arm +ffffffff81abc260 t vlv_sprite_disable_arm +ffffffff81abc2f0 t vlv_sprite_get_hw_state +ffffffff81abc3b0 t vlv_sprite_check +ffffffff81abc640 t ivb_sprite_update_noarm +ffffffff81abc7b0 t ivb_sprite_update_arm +ffffffff81abcb90 t ivb_sprite_disable_arm +ffffffff81abcc40 t ivb_sprite_get_hw_state +ffffffff81abccf0 t g4x_sprite_check +ffffffff81abd2c0 t hsw_sprite_max_stride +ffffffff81abd310 t g4x_sprite_max_stride +ffffffff81abd380 t ivb_sprite_min_cdclk +ffffffff81abd4b0 t g4x_sprite_update_noarm +ffffffff81abd620 t g4x_sprite_update_arm +ffffffff81abda70 t g4x_sprite_disable_arm +ffffffff81abdb20 t g4x_sprite_get_hw_state +ffffffff81abdbd0 t g4x_sprite_min_cdclk +ffffffff81abdc90 t vlv_sprite_format_mod_supported +ffffffff81abddc0 t snb_sprite_format_mod_supported +ffffffff81abdeb0 t g4x_sprite_format_mod_supported +ffffffff81abe000 T intel_tc_port_in_tbt_alt_mode +ffffffff81abe070 T intel_tc_port_in_dp_alt_mode +ffffffff81abe0e0 T intel_tc_port_in_legacy_mode +ffffffff81abe150 T intel_tc_cold_requires_aux_pw +ffffffff81abe1a0 T intel_tc_port_get_lane_mask +ffffffff81abe300 T intel_tc_port_get_pin_assignment_mask +ffffffff81abe460 T intel_tc_port_fia_max_lane_count +ffffffff81abe5a0 T intel_tc_port_set_fia_lane_count +ffffffff81abe7b0 T intel_tc_port_init_mode +ffffffff81abec30 t intel_tc_port_update_mode +ffffffff81abf150 T intel_tc_port_sanitize_mode +ffffffff81abf500 T intel_tc_port_connected +ffffffff81abf5f0 T intel_tc_port_lock +ffffffff81abf610 t tc_port_live_status_mask +ffffffff81abf8e0 T intel_tc_port_unlock +ffffffff81abf960 t __intel_tc_port_lock +ffffffff81abfb60 T intel_tc_port_flush_work +ffffffff81abfb80 T intel_tc_port_ref_held +ffffffff81abfbd0 T intel_tc_port_get_link +ffffffff81abfc50 T intel_tc_port_put_link +ffffffff81abfce0 T intel_tc_port_init +ffffffff81abff60 t intel_tc_port_disconnect_phy_work +ffffffff81abffb0 t tc_phy_status_complete +ffffffff81ac00c0 t tc_phy_take_ownership +ffffffff81ac0260 t __delayed_work_tick +ffffffff81ac1000 T intel_tv_init +ffffffff81ac1420 t intel_tv_compute_config +ffffffff81ac18c0 t intel_tv_get_config +ffffffff81ac1e70 t intel_tv_pre_enable +ffffffff81ac27a0 t intel_enable_tv +ffffffff81ac2800 t intel_disable_tv +ffffffff81ac2860 t intel_tv_get_hw_state +ffffffff81ac28c0 t intel_tv_connector_duplicate_state +ffffffff81ac2940 t intel_tv_mode_to_mode +ffffffff81ac2a90 t intel_tv_get_modes +ffffffff81ac2df0 t intel_tv_detect +ffffffff81ac3250 t intel_tv_mode_valid +ffffffff81ac32e0 t intel_tv_atomic_check +ffffffff81ac4000 T intel_dsc_source_support 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intel_vrr_get_config +ffffffff81ac9000 T skl_update_scaler_crtc +ffffffff81ac90c0 t skl_update_scaler +ffffffff81ac93e0 T skl_update_scaler_plane +ffffffff81ac97d0 T skl_pfit_enable +ffffffff81ac9cb0 T skl_program_plane_scaler +ffffffff81aca370 T skl_detach_scalers +ffffffff81aca4b0 T skl_scaler_disable +ffffffff81acb000 T skl_format_to_fourcc +ffffffff81acb180 T icl_is_nv12_y_plane +ffffffff81acb1f0 T icl_is_hdr_plane +ffffffff81acb230 T skl_calc_main_surface_offset +ffffffff81acb470 T skl_universal_plane_create +ffffffff81acbb60 t icl_plane_min_width +ffffffff81acbcf0 t icl_hdr_plane_max_width +ffffffff81acbd40 t icl_sdr_plane_max_width +ffffffff81acbd70 t icl_plane_max_height +ffffffff81acbda0 t icl_plane_min_cdclk +ffffffff81acbde0 t glk_plane_max_width +ffffffff81acbe90 t skl_plane_max_height +ffffffff81acbec0 t glk_plane_min_cdclk +ffffffff81acbf40 t skl_plane_max_width +ffffffff81acc010 t skl_plane_min_cdclk +ffffffff81acc080 t skl_plane_max_stride +ffffffff81acc120 t icl_plane_update_noarm +ffffffff81accae0 t icl_plane_update_arm +ffffffff81accc50 t icl_plane_disable_arm +ffffffff81accd60 t skl_plane_update_noarm +ffffffff81accf00 t skl_plane_update_arm +ffffffff81acd300 t skl_plane_disable_arm +ffffffff81acd3b0 t skl_plane_get_hw_state +ffffffff81acd470 t skl_plane_check +ffffffff81ace8a0 t skl_plane_async_flip +ffffffff81ace9d0 t skl_plane_enable_flip_done +ffffffff81acea30 t skl_plane_disable_flip_done +ffffffff81acea90 T skl_get_initial_plane_config +ffffffff81acf130 t skl_surf_address +ffffffff81acf250 t skl_check_main_ccs_coordinates +ffffffff81acf3f0 t gen12_plane_format_mod_supported +ffffffff81acf640 t skl_plane_format_mod_supported +ffffffff81ad0000 T intel_enabled_dbuf_slices_mask +ffffffff81ad0130 T intel_sagv_pre_plane_update +ffffffff81ad02a0 T intel_sagv_post_plane_update +ffffffff81ad04f0 T intel_can_enable_sagv +ffffffff81ad0560 T skl_ddb_dbuf_slice_mask +ffffffff81ad0610 T skl_write_plane_wm +ffffffff81ad09f0 T skl_write_cursor_wm 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T vlv_dsi_get_pclk +ffffffff81adea50 T bxt_dsi_get_pclk +ffffffff81adeb20 T vlv_dsi_reset_clocks +ffffffff81adebb0 T bxt_dsi_pll_compute +ffffffff81aded50 T bxt_dsi_pll_enable +ffffffff81adf0e0 T bxt_dsi_reset_clocks +ffffffff81adf200 T assert_dsi_pll_enabled +ffffffff81adf2e0 T assert_dsi_pll_disabled +ffffffff81ae0000 T i915_gem_busy_ioctl +ffffffff81ae1000 T i915_gem_clflush_object +ffffffff81ae1200 t clflush_work +ffffffff81ae1260 t clflush_release +ffffffff81ae2000 T i915_lut_handle_alloc +ffffffff81ae2020 T i915_lut_handle_free +ffffffff81ae2040 T i915_gem_context_release +ffffffff81ae2070 T i915_gem_init__contexts +ffffffff81ae20d0 T i915_gem_context_open +ffffffff81ae2240 t i915_gem_create_context +ffffffff81ae2ad0 t proto_context_close +ffffffff81ae2b90 t gem_context_register +ffffffff81ae2d30 T i915_gem_context_close +ffffffff81ae2e80 t context_close +ffffffff81ae3500 T i915_gem_vm_create_ioctl +ffffffff81ae3610 T i915_gem_vm_destroy_ioctl +ffffffff81ae36c0 T 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gen6_gt_pm_disable_irq +ffffffff81b37000 T intel_engine_add_retire +ffffffff81b370a0 T intel_engine_init_retire +ffffffff81b370d0 t engine_retire +ffffffff81b371a0 T intel_engine_fini_retire +ffffffff81b371c0 T intel_gt_retire_requests_timeout +ffffffff81b37510 T intel_gt_init_requests +ffffffff81b37570 t retire_work_handler +ffffffff81b375f0 T intel_gt_park_requests +ffffffff81b37660 T intel_gt_unpark_requests +ffffffff81b376c0 T intel_gt_fini_requests +ffffffff81b37720 T intel_gt_watchdog_work +ffffffff81b37820 t __delayed_work_tick +ffffffff81b38000 T intel_gt_sysfs_register +ffffffff81b38030 T intel_gt_sysfs_unregister +ffffffff81b39000 T intel_gt_sysfs_pm_init +ffffffff81b3a000 T intel_vm_no_concurrent_access_wa +ffffffff81b3a050 T alloc_pt_lmem +ffffffff81b3a0c0 T alloc_pt_dma +ffffffff81b3a130 T map_pt_dma +ffffffff81b3a190 T map_pt_dma_locked +ffffffff81b3a1f0 T i915_vm_lock_objects +ffffffff81b3a230 t i915_gem_object_lock +ffffffff81b3a440 T i915_address_space_fini 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intel_ring_submission_setup +ffffffff81b4c700 t i915_gem_object_lock +ffffffff81b4c910 t ring_release +ffffffff81b4ca60 t xcs_resume +ffffffff81b4d020 t xcs_sanitize +ffffffff81b4d090 t reset_prepare +ffffffff81b4d1c0 t reset_rewind +ffffffff81b4d270 t reset_cancel +ffffffff81b4d300 t reset_finish +ffffffff81b4d330 t add_to_engine +ffffffff81b4d3b0 t remove_from_engine +ffffffff81b4d440 t ring_request_alloc +ffffffff81b4d7b0 t i9xx_set_default_submission +ffffffff81b4d7f0 t irq_handler +ffffffff81b4d810 t stop_ring +ffffffff81b4d910 t ring_context_alloc +ffffffff81b4da00 t ring_context_revoke +ffffffff81b4dac0 t ring_context_pre_pin +ffffffff81b4dba0 t ring_context_pin +ffffffff81b4dbd0 t ring_context_unpin +ffffffff81b4dc00 t ring_context_post_unpin +ffffffff81b4dc50 t ring_context_cancel_request +ffffffff81b4dce0 t ring_context_reset +ffffffff81b4dd30 t ring_context_destroy +ffffffff81b4dd80 t switch_mm +ffffffff81b4dec0 t mi_set_context +ffffffff81b4e180 t i9xx_submit_request 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T intel_rps_sanitize +ffffffff81b52d70 T intel_rps_get_cagf +ffffffff81b52e00 T intel_rps_read_actual_frequency +ffffffff81b53030 T intel_rps_read_punit_req +ffffffff81b530b0 T intel_rps_read_punit_req_frequency +ffffffff81b531d0 T intel_rps_get_requested_frequency +ffffffff81b53390 T intel_rps_get_max_frequency +ffffffff81b53480 T intel_rps_get_max_raw_freq +ffffffff81b53500 T intel_rps_get_rp0_frequency +ffffffff81b535f0 T intel_rps_get_rp1_frequency +ffffffff81b536e0 T intel_rps_get_rpn_frequency +ffffffff81b537d0 T intel_rps_set_max_frequency +ffffffff81b53a40 T intel_rps_get_min_frequency +ffffffff81b53b30 T intel_rps_get_min_raw_freq +ffffffff81b53bb0 T intel_rps_set_min_frequency +ffffffff81b53d30 T intel_rps_raise_unslice +ffffffff81b53e10 T intel_rps_lower_unslice +ffffffff81b53ef0 T rps_read_mask_mmio +ffffffff81b53f80 T intel_rps_driver_register +ffffffff81b53fc0 T intel_rps_driver_unregister +ffffffff81b54010 T i915_read_mch_val +ffffffff81b54490 T i915_gpu_raise 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intel_guc_wait_for_pending_msg +ffffffff81b75160 T intel_guc_wait_for_idle +ffffffff81b751b0 T intel_guc_busyness_park +ffffffff81b753b0 T intel_guc_busyness_unpark +ffffffff81b75520 T intel_guc_submission_reset_prepare +ffffffff81b75c90 t guc_flush_destroyed_contexts +ffffffff81b75e00 T intel_guc_submission_reset +ffffffff81b75f20 t __guc_reset_context +ffffffff81b76220 T intel_guc_submission_cancel_requests +ffffffff81b764c0 T intel_guc_submission_reset_finish +ffffffff81b765a0 T intel_guc_submission_init +ffffffff81b76710 T intel_guc_submission_fini +ffffffff81b767b0 T intel_guc_submission_setup +ffffffff81b76bb0 t guc_sched_engine_disabled +ffffffff81b76be0 t guc_sched_engine_destroy +ffffffff81b76c40 t guc_bump_inflight_request_prio +ffffffff81b76d30 t guc_retire_inflight_request_prio +ffffffff81b76db0 t guc_submission_tasklet +ffffffff81b77170 t guc_sanitize +ffffffff81b771e0 t guc_release +ffffffff81b77210 T intel_guc_submission_enable +ffffffff81b773d0 T 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i8xx_enable_vblank +ffffffff81b9db90 T i915gm_enable_vblank +ffffffff81b9dc10 T i965_enable_vblank +ffffffff81b9dd30 T ilk_enable_vblank +ffffffff81b9dde0 T bdw_enable_vblank +ffffffff81b9df90 T i8xx_disable_vblank +ffffffff81b9e090 T i915gm_disable_vblank +ffffffff81b9e100 T i965_disable_vblank +ffffffff81b9e200 T ilk_disable_vblank +ffffffff81b9e300 T bdw_disable_vblank +ffffffff81b9e480 T gen8_irq_power_well_post_enable +ffffffff81b9e600 T gen8_irq_power_well_pre_disable +ffffffff81b9e790 T intel_synchronize_irq +ffffffff81b9e7b0 T valleyview_enable_display_irqs +ffffffff81b9e820 t vlv_display_irq_reset +ffffffff81b9e9e0 t vlv_display_irq_postinstall +ffffffff81b9ec30 T valleyview_disable_display_irqs +ffffffff81b9ec80 T intel_hpd_irq_setup +ffffffff81b9ecd0 T intel_irq_init +ffffffff81b9ef80 t ivb_parity_work +ffffffff81b9f320 T intel_irq_fini +ffffffff81b9f360 T intel_irq_install +ffffffff81b9f470 t intel_irq_reset +ffffffff81b9ffd0 t intel_irq_postinstall +ffffffff81ba0cd0 T intel_irq_uninstall +ffffffff81ba0d40 T intel_runtime_pm_disable_interrupts +ffffffff81ba0d70 T intel_runtime_pm_enable_interrupts +ffffffff81ba0da0 T intel_synchronize_hardirq +ffffffff81ba0dc0 t i9xx_pipestat_irq_reset +ffffffff81ba0f50 t kasprintf +ffffffff81ba1020 t i915_hpd_irq_setup +ffffffff81ba1130 t icp_hpd_irq_setup +ffffffff81ba1320 t dg1_hpd_irq_setup +ffffffff81ba1380 t gen11_hpd_irq_setup +ffffffff81ba15d0 t bxt_hpd_irq_setup +ffffffff81ba1760 t bdw_update_port_irq +ffffffff81ba18a0 t spt_hpd_irq_setup +ffffffff81ba1ac0 t ilk_hpd_irq_setup +ffffffff81ba1d20 t gen11_display_irq_reset +ffffffff81ba22a0 t ibx_irq_reset +ffffffff81ba23e0 t cherryview_irq_handler +ffffffff81ba26b0 t valleyview_irq_handler +ffffffff81ba2a20 t i965_irq_handler +ffffffff81ba2f90 t i915_irq_handler +ffffffff81ba3480 t i8xx_irq_handler +ffffffff81ba3880 t dg1_irq_handler +ffffffff81ba3a30 t gen11_irq_handler +ffffffff81ba3b80 t gen8_irq_handler +ffffffff81ba3c60 t ilk_irq_handler +ffffffff81ba4b00 t i9xx_pipestat_irq_ack +ffffffff81ba4c80 t i9xx_hpd_irq_handler +ffffffff81ba4e90 t valleyview_pipestat_irq_handler +ffffffff81ba5090 t i9xx_pipe_crc_irq_handler +ffffffff81ba51e0 t gen8_de_irq_handler +ffffffff81ba65d0 t cpt_irq_handler +ffffffff81ba69f0 t ibx_hpd_irq_handler +ffffffff81ba6b90 t gen8_de_irq_postinstall +ffffffff81ba8000 T i915_memcpy_from_wc +ffffffff81ba8120 T i915_unaligned_memcpy_from_wc +ffffffff81ba8240 T i915_memcpy_init_early +ffffffff81ba9000 T i915_mitigate_clear_residuals +ffffffff81baa000 T i915_init +ffffffff81baa240 t i915_check_nomodeset +ffffffff81baa2c0 t i915_mock_selftests +ffffffff81baa2f0 t i915_pmu_init +ffffffff81baa320 t i915_pmu_exit +ffffffff81bab000 T i915_params_dump +ffffffff81bae120 T i915_params_copy +ffffffff81baf000 T i915_params_free +ffffffff81bb0000 T i915_pci_register_driver +ffffffff81bb0030 T i915_pci_unregister_driver +ffffffff81bb1000 T i915_oa_config_release +ffffffff81bb1060 T i915_perf_get_oa_config +ffffffff81bb10c0 T i915_oa_init_reg_state +ffffffff81bb11d0 T i915_perf_open_ioctl +ffffffff81bb1720 T i915_perf_register +ffffffff81bb1750 T i915_perf_unregister +ffffffff81bb17c0 T i915_perf_add_config_ioctl +ffffffff81bb1810 T i915_perf_remove_config_ioctl +ffffffff81bb1890 T i915_perf_init +ffffffff81bb1c10 t gen7_is_valid_b_counter_addr +ffffffff81bb1c60 t hsw_is_valid_mux_addr +ffffffff81bb1ce0 t hsw_enable_metric_set +ffffffff81bb1dc0 t hsw_disable_metric_set +ffffffff81bb1ed0 t gen7_oa_enable +ffffffff81bb2030 t gen7_oa_disable +ffffffff81bb20f0 t gen7_oa_read +ffffffff81bb2650 t gen7_oa_hw_tail_read +ffffffff81bb26a0 t gen8_oa_read +ffffffff81bb2cd0 t gen8_is_valid_mux_addr +ffffffff81bb2d50 t gen8_is_valid_flex_addr +ffffffff81bb2dd0 t chv_is_valid_mux_addr +ffffffff81bb2e50 t gen8_oa_enable +ffffffff81bb2f90 t gen8_oa_disable +ffffffff81bb3050 t gen8_enable_metric_set +ffffffff81bb3110 t gen8_disable_metric_set +ffffffff81bb31a0 t gen8_oa_hw_tail_read +ffffffff81bb31f0 t gen11_is_valid_mux_addr +ffffffff81bb32b0 t gen11_disable_metric_set +ffffffff81bb3340 t gen12_is_valid_b_counter_addr +ffffffff81bb3390 t gen12_is_valid_mux_addr +ffffffff81bb33e0 t gen12_oa_enable +ffffffff81bb3560 t gen12_oa_disable +ffffffff81bb36a0 t gen12_enable_metric_set +ffffffff81bb37d0 t gen12_disable_metric_set +ffffffff81bb38b0 t gen12_oa_hw_tail_read +ffffffff81bb3900 T i915_perf_sysctl_register +ffffffff81bb3930 T i915_perf_sysctl_unregister +ffffffff81bb3960 T i915_perf_fini +ffffffff81bb3a40 t destroy_config +ffffffff81bb3ad0 T i915_perf_ioctl_version +ffffffff81bb3b00 t emit_oa_config +ffffffff81bb41e0 t i915_gem_object_lock +ffffffff81bb43f0 t lrc_configure_all_contexts +ffffffff81bb45b0 t oa_configure_all_contexts +ffffffff81bb48d0 t gen8_modify_self +ffffffff81bb4aa0 t gen8_modify_context +ffffffff81bb4c40 t gen12_configure_oar_context +ffffffff81bb5000 T i915_query_ioctl +ffffffff81bb5110 t query_topology_info +ffffffff81bb5160 t query_engine_info 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i915_scheduler_module_exit +ffffffff81bbbc30 T i915_scheduler_module_init +ffffffff81bbc000 T i915_save_display +ffffffff81bbc360 T i915_restore_display +ffffffff81bbd000 T i915_sw_fence_complete +ffffffff81bbd040 t __i915_sw_fence_complete +ffffffff81bbd1c0 T i915_sw_fence_await +ffffffff81bbd240 T __i915_sw_fence_init +ffffffff81bbd2b0 T i915_sw_fence_reinit +ffffffff81bbd2f0 T i915_sw_fence_commit +ffffffff81bbd330 T i915_sw_fence_await_sw_fence +ffffffff81bbd350 t __i915_sw_fence_await_sw_fence +ffffffff81bbd5c0 T i915_sw_fence_await_sw_fence_gfp +ffffffff81bbd5e0 T i915_sw_fence_await_dma_fence +ffffffff81bbd810 t dma_i915_sw_fence_wake +ffffffff81bbd890 t irq_i915_sw_fence_work +ffffffff81bbd8d0 t timer_i915_sw_fence_wake +ffffffff81bbd9b0 t dma_i915_sw_fence_wake_timer +ffffffff81bbda40 T __i915_sw_fence_await_dma_fence +ffffffff81bbdb90 t __dma_i915_sw_fence_wake +ffffffff81bbdbf0 T i915_sw_fence_await_reservation +ffffffff81bbdcd0 t i915_sw_fence_wake +ffffffff81bbe000 T dma_fence_work_init +ffffffff81bbe080 t fence_notify +ffffffff81bbe170 t fence_work +ffffffff81bbe1d0 T dma_fence_work_chain +ffffffff81bbe220 t get_driver_name +ffffffff81bbe250 t get_timeline_name +ffffffff81bbe290 t fence_release +ffffffff81bbf000 T i915_switcheroo_register +ffffffff81bbf030 T i915_switcheroo_unregister +ffffffff81bc0000 T i915_syncmap_init +ffffffff81bc0030 T i915_syncmap_is_later +ffffffff81bc0130 T i915_syncmap_set +ffffffff81bc01e0 t __sync_set +ffffffff81bc04d0 T i915_syncmap_free +ffffffff81bc0530 t __sync_free +ffffffff81bc1000 T i915_setup_sysfs +ffffffff81bc1030 T i915_teardown_sysfs +ffffffff81bc2000 T i915_ttm_buddy_man_init +ffffffff81bc2210 T i915_ttm_buddy_man_fini +ffffffff81bc2400 T i915_ttm_buddy_man_reserve +ffffffff81bc24d0 T i915_ttm_buddy_man_visible_size +ffffffff81bc2500 T i915_ttm_buddy_man_avail +ffffffff81bc2560 t i915_ttm_buddy_man_alloc +ffffffff81bc2890 t i915_ttm_buddy_man_free +ffffffff81bc2900 t i915_ttm_buddy_man_intersects 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i915_vma_module_init +ffffffff81bc91a0 t __i915_vma_active +ffffffff81bc91f0 t __i915_vma_retire +ffffffff81bc9240 t __vma_bind +ffffffff81bc92e0 t __vma_release +ffffffff81bc9360 t intel_rotate_pages +ffffffff81bc96c0 t intel_remap_pages +ffffffff81bc9a90 t intel_partial_pages +ffffffff81bca000 T i915_vma_resource_alloc +ffffffff81bca050 T i915_vma_resource_free +ffffffff81bca090 T i915_vma_resource_unhold +ffffffff81bca0a0 t __i915_vma_resource_unhold +ffffffff81bca190 T i915_vma_resource_hold +ffffffff81bca1e0 T i915_vma_resource_unbind +ffffffff81bca310 T __i915_vma_resource_init +ffffffff81bca370 t i915_vma_resource_fence_notify +ffffffff81bca440 T i915_vma_resource_bind_dep_sync +ffffffff81bca5c0 T i915_vma_resource_bind_dep_sync_all +ffffffff81bca660 T i915_vma_resource_bind_dep_await +ffffffff81bca800 T i915_vma_resource_module_exit +ffffffff81bca820 T i915_vma_resource_module_init +ffffffff81bca880 t get_driver_name +ffffffff81bca8b0 t get_timeline_name +ffffffff81bca8e0 t unbind_fence_release +ffffffff81bca920 t i915_vma_resource_unbind_work +ffffffff81bcb000 T intel_platform_name +ffffffff81bcb0a0 T intel_device_info_print +ffffffff81bcbd30 T intel_device_info_subplatform_init +ffffffff81bcc090 T intel_device_info_runtime_init +ffffffff81bcc770 T intel_driver_caps_print +ffffffff81bcd000 T intel_dram_detect +ffffffff81bcd480 t skl_get_dram_info +ffffffff81bcd660 T intel_dram_edram_detect +ffffffff81bcd6f0 t icl_pcode_read_mem_global_info +ffffffff81bcd7d0 t skl_dram_get_channel_info +ffffffff81bcd9a0 t skl_dram_get_dimm_info +ffffffff81bce000 T intel_memory_region_lookup +ffffffff81bce0e0 T intel_memory_region_by_type +ffffffff81bce1a0 T intel_memory_region_reserve +ffffffff81bce1c0 T intel_memory_region_debug +ffffffff81bce220 T intel_memory_region_create +ffffffff81bce390 T intel_memory_region_set_name +ffffffff81bce410 T intel_memory_region_avail +ffffffff81bce490 T intel_memory_region_destroy +ffffffff81bce500 T intel_memory_regions_hw_probe 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g4x_disable_trickle_feed +ffffffff81bd68c0 t cpt_init_clock_gating +ffffffff81bd6bf0 t vlv_init_clock_gating +ffffffff81bd6d00 t gen6_init_clock_gating +ffffffff81bd6f00 t ilk_init_clock_gating +ffffffff81bd70d0 t g4x_init_clock_gating +ffffffff81bd7190 t i965gm_init_clock_gating +ffffffff81bd7260 t i965g_init_clock_gating +ffffffff81bd72e0 t gen3_init_clock_gating +ffffffff81bd73e0 t i85x_init_clock_gating +ffffffff81bd7480 t i830_init_clock_gating +ffffffff81bd74b0 t nop_init_clock_gating +ffffffff81bd74e0 t ilk_compute_pipe_wm +ffffffff81bd7960 t ilk_compute_intermediate_wm +ffffffff81bd7c90 t ilk_initial_watermarks +ffffffff81bd7d00 t ilk_optimize_watermarks +ffffffff81bd7db0 t ilk_compute_wm_level +ffffffff81bd8320 t ilk_validate_wm_level +ffffffff81bd8460 t ilk_program_watermarks +ffffffff81bd9220 t ilk_wm_merge +ffffffff81bd9490 t vlv_compute_pipe_wm +ffffffff81bda2d0 t vlv_compute_intermediate_wm +ffffffff81bda5d0 t vlv_initial_watermarks +ffffffff81bda650 t vlv_atomic_update_fifo +ffffffff81bda960 t vlv_optimize_watermarks +ffffffff81bdaa20 t g4x_compute_pipe_wm +ffffffff81bdb650 t g4x_compute_intermediate_wm +ffffffff81bdbaa0 t g4x_initial_watermarks +ffffffff81bdbb40 t g4x_optimize_watermarks +ffffffff81bdbc20 t pnv_update_wm +ffffffff81bdc2d0 t i965_update_wm +ffffffff81bdc6a0 t i9xx_update_wm +ffffffff81bdce50 t i845_update_wm +ffffffff81bde000 T intel_region_ttm_device_init +ffffffff81bde070 T intel_region_ttm_device_fini +ffffffff81bde090 T intel_region_to_ttm_type +ffffffff81bde0d0 T intel_region_ttm_init +ffffffff81bde170 T intel_region_ttm_fini +ffffffff81bde3d0 T intel_region_ttm_resource_to_rsgt +ffffffff81bde410 T intel_region_ttm_resource_free +ffffffff81bdf000 T intel_runtime_pm_get_raw +ffffffff81bdf090 T intel_runtime_pm_get +ffffffff81bdf140 T intel_runtime_pm_get_if_in_use +ffffffff81bdf1f0 T intel_runtime_pm_get_if_active +ffffffff81bdf2a0 T intel_runtime_pm_get_noresume +ffffffff81bdf3d0 T intel_runtime_pm_put_raw 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ci_dpm_fini +ffffffff81c0be60 T ci_dpm_init +ffffffff81c0d5d0 T ci_dpm_debugfs_print_current_performance_level +ffffffff81c0d710 T ci_dpm_print_power_state +ffffffff81c0d7d0 T ci_dpm_get_current_sclk +ffffffff81c0d8a0 T ci_dpm_get_current_mclk +ffffffff81c0d970 T ci_dpm_get_sclk +ffffffff81c0d9c0 T ci_dpm_get_mclk +ffffffff81c0da10 t ci_populate_all_graphic_levels +ffffffff81c0df90 t ci_populate_all_memory_levels +ffffffff81c0e8a0 t ci_do_program_memory_timing_parameters +ffffffff81c0eac0 t ci_populate_smc_voltage_table +ffffffff81c0ec20 t ci_enable_sclk_mclk_dpm +ffffffff81c0f000 T ci_copy_bytes_to_smc +ffffffff81c0f250 T ci_start_smc +ffffffff81c0f290 T ci_reset_smc +ffffffff81c0f2d0 T ci_program_jump_on_start +ffffffff81c0f300 T ci_stop_smc_clock +ffffffff81c0f340 T ci_start_smc_clock +ffffffff81c0f380 T ci_is_smc_running +ffffffff81c0f3f0 T ci_load_smc_ucode +ffffffff81c0f580 T ci_read_smc_sram_dword +ffffffff81c0f650 T ci_write_smc_sram_dword +ffffffff81c10000 T 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cik_gpu_pci_config_reset +ffffffff81c13050 T cik_gfx_is_lockup +ffffffff81c130c0 T cik_pcie_gart_tlb_flush +ffffffff81c13110 T cik_ib_parse +ffffffff81c13140 T cik_vm_init +ffffffff81c131a0 T cik_vm_fini +ffffffff81c131d0 T cik_vm_flush +ffffffff81c13f20 T cik_enter_rlc_safe_mode +ffffffff81c14010 T cik_exit_rlc_safe_mode +ffffffff81c14050 T cik_update_cg +ffffffff81c14520 t cik_enable_mgcg +ffffffff81c14a40 t cik_enable_cgcg +ffffffff81c14db0 T cik_init_cp_pg_table +ffffffff81c15070 T cik_get_csb_size +ffffffff81c15100 T cik_get_csb_buffer +ffffffff81c152a0 T cik_irq_set +ffffffff81c16040 t cik_disable_interrupt_state +ffffffff81c16500 T cik_irq_process +ffffffff81c17d50 t cik_irq_ack +ffffffff81c186d0 T cik_resume +ffffffff81c18760 t cik_init_golden_registers +ffffffff81c18920 t cik_startup +ffffffff81c1e630 T cik_suspend +ffffffff81c1ea20 T cik_init +ffffffff81c1f200 t cik_init_microcode +ffffffff81c20210 t cik_pcie_gart_fini +ffffffff81c20310 T cik_fini +ffffffff81c206b0 T dce8_program_fmt +ffffffff81c207e0 T dce8_bandwidth_update +ffffffff81c21400 T cik_get_gpu_clock_counter +ffffffff81c214d0 T cik_set_uvd_clocks +ffffffff81c21550 t cik_set_uvd_clock +ffffffff81c216c0 T cik_set_vce_clocks +ffffffff81c21900 t cik_wait_for_rlc_serdes +ffffffff81c21ad0 t radeon_bo_reserve +ffffffff81c21c40 t radeon_bo_unreserve +ffffffff81c21d20 t cik_update_gfx_pg +ffffffff81c21ec0 t cik_compute_stop +ffffffff81c22030 t cik_cp_compute_fini +ffffffff81c221d0 t dce8_latency_watermark +ffffffff81c23000 T cik_sdma_get_rptr +ffffffff81c23070 T cik_sdma_get_wptr +ffffffff81c230c0 T cik_sdma_set_wptr +ffffffff81c23110 T cik_sdma_ring_ib_execute +ffffffff81c234f0 T cik_sdma_fence_ring_emit +ffffffff81c236d0 t cik_sdma_hdp_flush_ring_emit +ffffffff81c23910 T cik_sdma_semaphore_ring_emit +ffffffff81c23a30 T cik_sdma_enable +ffffffff81c23c10 T cik_sdma_resume +ffffffff81c240f0 T cik_sdma_fini +ffffffff81c24130 T cik_copy_dma +ffffffff81c24500 T cik_sdma_ring_test +ffffffff81c247a0 T cik_sdma_ib_test +ffffffff81c249f0 T cik_sdma_is_lockup +ffffffff81c24a70 T cik_sdma_vm_copy_pages +ffffffff81c24b80 T cik_sdma_vm_write_pages +ffffffff81c24cf0 T cik_sdma_vm_set_pages +ffffffff81c24e60 T cik_sdma_vm_pad_ib +ffffffff81c24eb0 T cik_dma_vm_flush +ffffffff81c26000 T cypress_enable_spread_spectrum +ffffffff81c26140 T cypress_start_dpm +ffffffff81c26190 T cypress_enable_sclk_control +ffffffff81c261f0 T cypress_enable_mclk_control +ffffffff81c26250 T cypress_notify_smc_display_change +ffffffff81c262a0 T cypress_program_response_times +ffffffff81c26370 T cypress_advertise_gen2_capability +ffffffff81c26440 T cypress_notify_link_speed_change_after_state_change +ffffffff81c26500 T cypress_notify_link_speed_change_before_state_change +ffffffff81c265c0 T cypress_get_strobe_mode_settings +ffffffff81c266c0 T cypress_get_mclk_frequency_ratio +ffffffff81c26770 T cypress_map_clkf_to_ibias +ffffffff81c26830 T cypress_convert_power_level_to_smc +ffffffff81c26bf0 t cypress_populate_mclk_value +ffffffff81c27000 T cypress_upload_sw_state +ffffffff81c27180 T cypress_upload_mc_reg_table +ffffffff81c27240 t cypress_convert_mc_reg_table_to_smc +ffffffff81c274e0 T cypress_calculate_burst_time +ffffffff81c27570 T cypress_program_memory_timing_parameters +ffffffff81c27720 T cypress_populate_smc_initial_state +ffffffff81c27ac0 T cypress_populate_smc_acpi_state +ffffffff81c27e50 T cypress_construct_voltage_tables +ffffffff81c27f00 t cypress_trim_voltage_table_to_fit_state_table +ffffffff81c280f0 T cypress_populate_smc_voltage_tables +ffffffff81c28240 T cypress_get_mvdd_configuration +ffffffff81c28300 T cypress_populate_mc_reg_table +ffffffff81c28560 T cypress_get_table_locations +ffffffff81c28640 T cypress_enable_display_gap +ffffffff81c286a0 T cypress_dpm_setup_asic +ffffffff81c28790 T cypress_dpm_enable +ffffffff81c29270 t cypress_force_mc_use_s1 +ffffffff81c294f0 t cypress_gfx_clock_gating_enable +ffffffff81c29800 t cypress_mg_clock_gating_enable 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T dce6_afmt_write_sad_regs +ffffffff81c2c770 T dce6_audio_enable +ffffffff81c2c7c0 T dce6_hdmi_audio_set_dto +ffffffff81c2c830 T dce6_dp_audio_set_dto +ffffffff81c2d000 T eg_cg_rreg +ffffffff81c2d080 t r100_mm_rreg +ffffffff81c2d0d0 T eg_cg_wreg +ffffffff81c2d140 T eg_pif_phy0_rreg +ffffffff81c2d1c0 T eg_pif_phy0_wreg +ffffffff81c2d220 T eg_pif_phy1_rreg +ffffffff81c2d2a0 T eg_pif_phy1_wreg +ffffffff81c2d300 T evergreen_get_allowed_info_register +ffffffff81c2d390 T evergreen_tiling_fields +ffffffff81c2d430 T sumo_set_uvd_clocks +ffffffff81c2d510 t sumo_set_uvd_clock +ffffffff81c2d6d0 T evergreen_set_uvd_clocks +ffffffff81c2dc70 T evergreen_fix_pci_max_read_req_size +ffffffff81c2de20 T dce4_program_fmt +ffffffff81c2df40 T dce4_wait_for_vblank +ffffffff81c2e1c0 T evergreen_page_flip +ffffffff81c2e350 T evergreen_page_flip_pending +ffffffff81c2e3c0 T evergreen_get_temp +ffffffff81c2e490 T sumo_get_temp +ffffffff81c2e4e0 T sumo_pm_init_profile +ffffffff81c2e620 T btc_pm_init_profile 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+ffffffff81c31f40 T evergreen_asic_reset +ffffffff81c32260 T evergreen_gfx_is_lockup +ffffffff81c322d0 T sumo_rlc_fini +ffffffff81c32480 t radeon_bo_reserve +ffffffff81c325f0 t radeon_bo_unreserve +ffffffff81c326d0 T sumo_rlc_init +ffffffff81c32ea0 T evergreen_rlc_resume +ffffffff81c33210 T evergreen_get_vblank_counter +ffffffff81c33280 T evergreen_disable_interrupt_state +ffffffff81c33550 T evergreen_irq_set +ffffffff81c33b10 T evergreen_irq_suspend +ffffffff81c33b60 T evergreen_irq_process +ffffffff81c34640 t evergreen_irq_ack +ffffffff81c34d40 T evergreen_resume +ffffffff81c34e20 t evergreen_init_golden_registers +ffffffff81c35030 t evergreen_startup +ffffffff81c37690 T evergreen_suspend +ffffffff81c37830 T evergreen_init +ffffffff81c37d30 T evergreen_fini +ffffffff81c37f20 T evergreen_pcie_gen2_enable +ffffffff81c38150 T evergreen_program_aspm +ffffffff81c387f0 t evergreen_latency_watermark +ffffffff81c39000 T evergreen_cs_parse +ffffffff81c3b870 T evergreen_dma_cs_parse +ffffffff81c3ca80 T evergreen_ib_parse +ffffffff81c3cf30 T evergreen_dma_ib_parse +ffffffff81c3d0f0 t evergreen_cs_track_check +ffffffff81c3e0d0 t evergreen_cs_handle_reg +ffffffff81c3ffe0 t evergreen_surface_value_conv_check +ffffffff81c402b0 t evergreen_surface_check +ffffffff81c40740 t evergreen_cs_track_validate_htile +ffffffff81c409e0 t evergreen_vm_reg_valid +ffffffff81c41000 T evergreen_dma_fence_ring_emit +ffffffff81c412c0 T evergreen_dma_ring_ib_execute +ffffffff81c41600 T evergreen_copy_dma +ffffffff81c419b0 T evergreen_dma_is_lockup +ffffffff81c42000 T dce4_audio_enable +ffffffff81c42080 T evergreen_hdmi_update_acr +ffffffff81c422a0 T dce4_afmt_write_latency_fields +ffffffff81c42310 T dce4_afmt_hdmi_write_speaker_allocation +ffffffff81c42380 T dce4_afmt_dp_write_speaker_allocation +ffffffff81c423f0 T evergreen_hdmi_write_sad_regs +ffffffff81c42510 T evergreen_set_avi_packet +ffffffff81c426b0 T dce4_hdmi_audio_set_dto +ffffffff81c42790 T dce4_dp_audio_set_dto +ffffffff81c42880 T dce4_set_vbi_packet +ffffffff81c428f0 T dce4_hdmi_set_color_depth +ffffffff81c42a40 T dce4_set_audio_packet +ffffffff81c42c50 T dce4_set_mute +ffffffff81c42d60 T evergreen_hdmi_enable +ffffffff81c43090 T evergreen_dp_enable +ffffffff81c44000 T kv_dpm_enable_bapm +ffffffff81c44070 T kv_dpm_enable +ffffffff81c455c0 t kv_enable_didt +ffffffff81c45860 T kv_dpm_late_enable +ffffffff81c45a50 T kv_dpm_powergate_uvd +ffffffff81c45bc0 T kv_dpm_disable +ffffffff81c45f30 T kv_dpm_force_performance_level +ffffffff81c460c0 t kv_force_dpm_lowest +ffffffff81c46190 T kv_dpm_pre_set_power_state +ffffffff81c46720 T kv_dpm_set_power_state +ffffffff81c46ed0 t kv_set_valid_clock_range +ffffffff81c47090 t kv_calculate_ds_divider +ffffffff81c47200 t kv_calculate_nbps_level_settings +ffffffff81c47390 t kv_update_vce_dpm +ffffffff81c47570 T kv_dpm_post_set_power_state +ffffffff81c47610 T kv_dpm_setup_asic +ffffffff81c47670 T kv_dpm_init +ffffffff81c47f10 T kv_dpm_debugfs_print_current_performance_level +ffffffff81c47f80 T kv_dpm_get_current_sclk +ffffffff81c47ff0 T kv_dpm_get_current_mclk +ffffffff81c48020 T kv_dpm_print_power_state +ffffffff81c480c0 T kv_dpm_fini +ffffffff81c48160 T kv_dpm_display_configuration_changed +ffffffff81c48190 T kv_dpm_get_sclk +ffffffff81c481e0 T kv_dpm_get_mclk +ffffffff81c49000 T kv_notify_message_to_smu +ffffffff81c490c0 T kv_dpm_get_enable_mask +ffffffff81c491a0 T kv_send_msg_to_smc_with_parameter +ffffffff81c49270 T kv_read_smc_sram_dword +ffffffff81c49300 T kv_smc_dpm_enable +ffffffff81c49430 T kv_smc_bapm_enable +ffffffff81c49560 T kv_copy_bytes_to_smc +ffffffff81c4a000 T tn_smc_rreg +ffffffff81c4a080 T tn_smc_wreg +ffffffff81c4a0f0 T ni_mc_load_microcode +ffffffff81c4a2e0 T ni_init_microcode +ffffffff81c4a820 T cayman_get_allowed_info_register +ffffffff81c4a8b0 T tn_get_temp +ffffffff81c4a940 T cayman_pcie_gart_tlb_flush +ffffffff81c4a990 T cayman_cp_int_cntl_setup +ffffffff81c4a9e0 T cayman_fence_ring_emit +ffffffff81c4ad90 T cayman_ring_ib_execute +ffffffff81c4b210 T cayman_gfx_get_rptr +ffffffff81c4b2a0 T cayman_gfx_get_wptr +ffffffff81c4b310 T cayman_gfx_set_wptr +ffffffff81c4b390 T cayman_gpu_check_soft_reset +ffffffff81c4b510 T cayman_asic_reset +ffffffff81c4b810 T cayman_gfx_is_lockup +ffffffff81c4b880 T cayman_resume +ffffffff81c4b910 t ni_init_golden_registers +ffffffff81c4b9f0 t cayman_startup +ffffffff81c4e0f0 T cayman_suspend +ffffffff81c4e2e0 T cayman_init +ffffffff81c4e8d0 T cayman_fini +ffffffff81c4eb50 T cayman_vm_init +ffffffff81c4ebb0 T cayman_vm_fini +ffffffff81c4ebe0 T cayman_vm_decode_fault +ffffffff81c4ec70 T cayman_vm_flush +ffffffff81c4f0f0 T tn_set_vce_clocks +ffffffff81c50000 T cayman_dma_get_rptr +ffffffff81c50070 T cayman_dma_get_wptr +ffffffff81c500c0 T cayman_dma_set_wptr +ffffffff81c50110 T cayman_dma_ring_ib_execute +ffffffff81c504a0 T cayman_dma_stop +ffffffff81c50550 T cayman_dma_resume +ffffffff81c507a0 T cayman_dma_fini +ffffffff81c50860 T cayman_dma_is_lockup +ffffffff81c508e0 T cayman_dma_vm_copy_pages +ffffffff81c509d0 T cayman_dma_vm_write_pages +ffffffff81c50b30 T cayman_dma_vm_set_pages +ffffffff81c50c90 T cayman_dma_vm_pad_ib +ffffffff81c50ce0 T cayman_dma_vm_flush +ffffffff81c52000 T ni_get_pi +ffffffff81c52030 T ni_get_ps +ffffffff81c52060 T ni_dpm_vblank_too_short +ffffffff81c520d0 T ni_dpm_force_performance_level +ffffffff81c52220 T ni_copy_and_switch_arb_sets +ffffffff81c52500 T ni_set_uvd_clock_before_set_eng_clock +ffffffff81c52580 T ni_set_uvd_clock_after_set_eng_clock +ffffffff81c52600 T ni_dpm_setup_asic +ffffffff81c52810 T ni_update_current_ps +ffffffff81c528d0 T ni_update_requested_ps +ffffffff81c52990 T ni_dpm_enable +ffffffff81c55bd0 t ni_populate_smc_tdp_limits +ffffffff81c55d90 T ni_dpm_disable +ffffffff81c56150 T ni_dpm_pre_set_power_state +ffffffff81c56730 T ni_dpm_set_power_state +ffffffff81c57850 T ni_dpm_post_set_power_state +ffffffff81c57920 T ni_dpm_init +ffffffff81c582f0 T ni_dpm_fini +ffffffff81c583a0 T ni_dpm_print_power_state +ffffffff81c58470 T ni_dpm_debugfs_print_current_performance_level +ffffffff81c584b0 T ni_dpm_get_current_sclk +ffffffff81c58520 T ni_dpm_get_current_mclk +ffffffff81c58590 T ni_dpm_get_sclk +ffffffff81c585f0 T ni_dpm_get_mclk +ffffffff81c58650 t ni_do_program_memory_timing_parameters +ffffffff81c58780 t ni_calculate_sclk_params +ffffffff81c589a0 t ni_calculate_power_boost_limit +ffffffff81c58b50 t ni_populate_mclk_value +ffffffff81c59000 T r100_wait_for_vblank +ffffffff81c591a0 T r100_page_flip +ffffffff81c59450 T r100_page_flip_pending +ffffffff81c59500 T r100_pm_get_dynpm_state +ffffffff81c59720 T r100_pm_init_profile +ffffffff81c59800 T r100_pm_misc +ffffffff81c59c40 T r100_pm_prepare +ffffffff81c59d00 T r100_pm_finish +ffffffff81c59dc0 T r100_gui_idle +ffffffff81c59e00 T r100_hpd_sense +ffffffff81c59e60 T r100_hpd_set_polarity +ffffffff81c59f20 T r100_hpd_init +ffffffff81c59fc0 T r100_hpd_fini +ffffffff81c5a020 T r100_pci_gart_tlb_flush +ffffffff81c5a050 T r100_pci_gart_init +ffffffff81c5a120 T r100_pci_gart_get_page_entry +ffffffff81c5a150 T r100_pci_gart_set_page +ffffffff81c5a190 T r100_pci_gart_enable +ffffffff81c5a280 T r100_pci_gart_disable +ffffffff81c5a300 T r100_pci_gart_fini +ffffffff81c5a380 T r100_irq_set +ffffffff81c5a460 T r100_irq_disable +ffffffff81c5a4d0 T r100_irq_process +ffffffff81c5a7b0 T r100_get_vblank_counter +ffffffff81c5a800 T r100_fence_ring_emit +ffffffff81c5ac70 T r100_semaphore_ring_emit +ffffffff81c5aca0 T r100_copy_blit +ffffffff81c5b340 T r100_ring_start +ffffffff81c5b430 T r100_gfx_get_rptr +ffffffff81c5b490 T r100_gfx_get_wptr +ffffffff81c5b4d0 T r100_gfx_set_wptr +ffffffff81c5b510 T r100_cp_init +ffffffff81c5ba40 T r100_debugfs_cp_init +ffffffff81c5ba70 T r100_cp_fini +ffffffff81c5bb10 T r100_cp_disable +ffffffff81c5bc50 T r100_gui_wait_for_idle +ffffffff81c5bd40 T r100_reloc_pitch_offset +ffffffff81c5be70 T r100_packet3_load_vbpntr +ffffffff81c5c110 T r100_cs_parse_packet0 +ffffffff81c5c220 T r100_cs_packet_parse_vline +ffffffff81c5c410 T r100_cs_track_check_pkt3_indx_buffer +ffffffff81c5c490 T r100_cs_parse +ffffffff81c5d950 T r100_cs_track_clear +ffffffff81c5dce0 T r100_cs_track_check +ffffffff81c5e6c0 T r100_mc_wait_for_idle +ffffffff81c5e760 T r100_gpu_is_lockup +ffffffff81c5e7c0 T r100_enable_bm +ffffffff81c5e810 T r100_bm_disable +ffffffff81c5e8c0 T r100_asic_reset +ffffffff81c5ebf0 T r100_mc_stop +ffffffff81c5edb0 T r100_mc_resume +ffffffff81c5ee70 T r100_set_common_regs +ffffffff81c5f020 T r100_vram_init_sizes +ffffffff81c5f210 T r100_vga_set_state +ffffffff81c5f270 T r100_pll_errata_after_index +ffffffff81c5f2b0 T r100_pll_rreg +ffffffff81c5f3e0 T r100_pll_wreg +ffffffff81c5f4f0 T r100_debugfs_rbbm_init +ffffffff81c5f520 T r100_debugfs_mc_info_init +ffffffff81c5f550 T r100_set_surface_reg +ffffffff81c5f760 T r100_clear_surface_reg +ffffffff81c5f810 T r100_bandwidth_update +ffffffff81c602c0 T r100_ring_test +ffffffff81c60580 T r100_ring_ib_execute +ffffffff81c607e0 T r100_ib_test +ffffffff81c60b20 T r100_vga_render_disable +ffffffff81c60b80 T r100_resume +ffffffff81c60d80 t r100_startup +ffffffff81c612b0 T r100_suspend +ffffffff81c61390 T r100_fini +ffffffff81c614a0 T r100_restore_sanity +ffffffff81c61540 T r100_init +ffffffff81c61ab0 T r100_mm_rreg_slow +ffffffff81c61b30 T r100_mm_wreg_slow +ffffffff81c61b90 T r100_io_rreg +ffffffff81c61c30 T r100_io_wreg +ffffffff81c61ca0 t r100_cs_track_texture_print +ffffffff81c62000 T r200_copy_dma +ffffffff81c62470 T r200_packet0_check +ffffffff81c63490 T r200_set_safe_registers +ffffffff81c64000 T rv370_pcie_rreg +ffffffff81c64080 T rv370_pcie_wreg +ffffffff81c640f0 T rv370_pcie_gart_tlb_flush +ffffffff81c642f0 T rv370_pcie_gart_get_page_entry +ffffffff81c64350 T rv370_pcie_gart_set_page +ffffffff81c64390 T rv370_pcie_gart_init +ffffffff81c64460 T rv370_pcie_gart_enable +ffffffff81c647c0 T rv370_pcie_gart_disable +ffffffff81c64940 T rv370_pcie_gart_fini +ffffffff81c64970 T r300_fence_ring_emit +ffffffff81c64f00 T r300_ring_start +ffffffff81c65910 T r300_mc_wait_for_idle +ffffffff81c659b0 T r300_asic_reset +ffffffff81c65bd0 T r300_mc_init +ffffffff81c65c80 T rv370_set_pcie_lanes +ffffffff81c65e40 T rv370_get_pcie_lanes +ffffffff81c65ef0 T r300_cs_parse +ffffffff81c66260 t r300_packet0_check +ffffffff81c670c0 T r300_set_reg_safe +ffffffff81c67100 T r300_mc_program +ffffffff81c67280 T r300_clock_startup +ffffffff81c67310 T r300_resume +ffffffff81c674e0 t r300_startup +ffffffff81c67840 T r300_suspend +ffffffff81c678c0 T r300_fini +ffffffff81c679a0 T r300_init +ffffffff81c68000 T r420_pm_init_profile +ffffffff81c680f0 T r420_pipes_init +ffffffff81c682d0 T r420_mc_rreg +ffffffff81c68350 T r420_mc_wreg +ffffffff81c683c0 T r420_resume +ffffffff81c68590 t r420_startup +ffffffff81c68920 T r420_suspend +ffffffff81c68ac0 T r420_fini +ffffffff81c68ba0 T r420_init +ffffffff81c68e20 T r420_debugfs_pipes_info_init +ffffffff81c69000 T r520_mc_wait_for_idle +ffffffff81c690a0 T r520_resume +ffffffff81c69190 t r520_startup +ffffffff81c69580 T r520_init +ffffffff81c6a000 T r600_rcu_rreg +ffffffff81c6a080 T r600_rcu_wreg +ffffffff81c6a0f0 T r600_uvd_ctx_rreg +ffffffff81c6a170 T r600_uvd_ctx_wreg +ffffffff81c6a1e0 T r600_get_allowed_info_register +ffffffff81c6a260 T r600_get_xclk +ffffffff81c6a290 T r600_set_uvd_clocks +ffffffff81c6a7f0 T dce3_program_fmt +ffffffff81c6a910 T rv6xx_get_temp +ffffffff81c6a960 T r600_pm_get_dynpm_state +ffffffff81c6ad60 T rs780_pm_init_profile +ffffffff81c6ae70 T r600_pm_init_profile +ffffffff81c6b110 T r600_pm_misc +ffffffff81c6b1f0 T r600_gui_idle +ffffffff81c6b230 T r600_hpd_sense +ffffffff81c6b350 T r600_hpd_set_polarity +ffffffff81c6b5c0 T r600_hpd_init +ffffffff81c6b7d0 T r600_hpd_fini +ffffffff81c6b980 T r600_pcie_gart_tlb_flush +ffffffff81c6bac0 T r600_pcie_gart_init +ffffffff81c6bb60 T r600_mc_wait_for_idle +ffffffff81c6bc00 T rs780_mc_rreg +ffffffff81c6bca0 T rs780_mc_wreg +ffffffff81c6bd30 T r600_vram_scratch_init +ffffffff81c6be30 t radeon_bo_reserve +ffffffff81c6bfa0 t radeon_bo_unreserve +ffffffff81c6c080 T r600_vram_scratch_fini +ffffffff81c6c100 T r600_set_bios_scratch_engine_hung +ffffffff81c6c150 T r600_gpu_check_soft_reset +ffffffff81c6c4d0 T r600_asic_reset +ffffffff81c6c860 t r600_gpu_pci_config_reset +ffffffff81c6ca70 T r600_gfx_is_lockup +ffffffff81c6cae0 T r6xx_remap_render_backend +ffffffff81c6ccd0 T r600_count_pipe_bits +ffffffff81c6cd40 T r600_pciep_rreg +ffffffff81c6cdc0 T r600_pciep_wreg +ffffffff81c6ce30 T r600_cp_stop +ffffffff81c6ceb0 T r600_init_microcode +ffffffff81c6d380 T r600_gfx_get_rptr +ffffffff81c6d3e0 T r600_gfx_get_wptr +ffffffff81c6d420 T r600_gfx_set_wptr +ffffffff81c6d460 T r600_cp_start +ffffffff81c6d7e0 T r600_cp_resume +ffffffff81c6db40 T r600_ring_init +ffffffff81c6dbe0 T r600_cp_fini +ffffffff81c6dc70 T r600_scratch_init +ffffffff81c6dce0 T r600_ring_test +ffffffff81c6df90 T r600_fence_ring_emit +ffffffff81c6e850 T r600_semaphore_ring_emit +ffffffff81c6ea40 T r600_copy_cpdma +ffffffff81c6f000 T r600_set_surface_reg +ffffffff81c6f030 T r600_clear_surface_reg +ffffffff81c6f060 T r600_vga_set_state +ffffffff81c6f0c0 T r600_resume +ffffffff81c6f150 t r600_startup +ffffffff81c71150 T r600_suspend +ffffffff81c712c0 T r600_irq_suspend +ffffffff81c71380 t r600_pcie_gart_disable +ffffffff81c71580 T r600_init +ffffffff81c71d50 T r600_ih_ring_init +ffffffff81c71dc0 T r600_irq_fini +ffffffff81c71f00 T r600_fini +ffffffff81c72090 T r600_ring_ib_execute +ffffffff81c72510 T r600_ib_test +ffffffff81c727c0 T r600_ih_ring_alloc +ffffffff81c728e0 T r600_ih_ring_fini +ffffffff81c72970 T r600_rlc_stop +ffffffff81c72b00 T r600_disable_interrupts +ffffffff81c72bb0 T r600_irq_init +ffffffff81c73020 t r600_disable_interrupt_state +ffffffff81c73310 T r600_irq_disable +ffffffff81c733d0 T r600_irq_set +ffffffff81c73b50 t r600_irq_ack +ffffffff81c74040 T r600_irq_process +ffffffff81c74c20 T r600_mmio_hdp_flush +ffffffff81c74ca0 T r600_set_pcie_lanes +ffffffff81c74dd0 T r600_get_pcie_lanes +ffffffff81c74eb0 T r600_get_gpu_clock_counter +ffffffff81c75000 T r600_fmt_is_valid_color +ffffffff81c75040 T r600_fmt_is_valid_texture +ffffffff81c75090 T r600_fmt_get_blocksize +ffffffff81c750d0 T r600_fmt_get_nblocksx +ffffffff81c75130 T r600_fmt_get_nblocksy +ffffffff81c75190 T r600_cs_common_vline_parse +ffffffff81c75460 T r600_mip_minify +ffffffff81c754c0 T r600_cs_parse +ffffffff81c77420 T r600_dma_cs_next_reloc +ffffffff81c774a0 T r600_dma_cs_parse +ffffffff81c77bc0 t r600_cs_track_check +ffffffff81c78cb0 t r600_cs_check_reg +ffffffff81c7a000 T r600_dma_get_rptr +ffffffff81c7a060 T r600_dma_get_wptr +ffffffff81c7a0a0 T r600_dma_set_wptr +ffffffff81c7a0e0 T r600_dma_stop +ffffffff81c7a170 T r600_dma_resume +ffffffff81c7a380 T r600_dma_fini +ffffffff81c7a400 T r600_dma_is_lockup +ffffffff81c7a470 T r600_dma_ring_test +ffffffff81c7a6d0 T r600_dma_fence_ring_emit +ffffffff81c7a8c0 T r600_dma_semaphore_ring_emit +ffffffff81c7a9e0 T r600_dma_ib_test +ffffffff81c7abf0 T r600_dma_ring_ib_execute +ffffffff81c7af30 T r600_copy_dma +ffffffff81c7c000 T r600_dpm_print_class_info +ffffffff81c7c2b0 T r600_dpm_print_cap_info +ffffffff81c7c340 T r600_dpm_print_ps_status +ffffffff81c7c3d0 T r600_dpm_get_vblank_time +ffffffff81c7c490 T r600_dpm_get_vrefresh +ffffffff81c7c520 T r600_calculate_u_and_p +ffffffff81c7c5a0 T r600_calculate_at +ffffffff81c7c650 T r600_gfx_clockgating_enable +ffffffff81c7c760 T r600_dynamicpm_enable +ffffffff81c7c7c0 T r600_enable_thermal_protection +ffffffff81c7c820 T r600_enable_acpi_pm +ffffffff81c7c870 T r600_enable_dynamic_pcie_gen2 +ffffffff81c7c8d0 T r600_dynamicpm_enabled +ffffffff81c7c910 T r600_enable_sclk_control +ffffffff81c7c970 T r600_enable_mclk_control +ffffffff81c7c9d0 T r600_enable_spll_bypass +ffffffff81c7ca30 T r600_wait_for_spll_change +ffffffff81c7cab0 T r600_set_bsp +ffffffff81c7caf0 T r600_set_at +ffffffff81c7cb50 T r600_set_tc +ffffffff81c7cbb0 T r600_select_td +ffffffff81c7cc70 T r600_set_vrc +ffffffff81c7ccb0 T r600_set_tpu +ffffffff81c7cd10 T r600_set_tpc +ffffffff81c7cd70 T r600_set_sstu +ffffffff81c7cdd0 T r600_set_sst +ffffffff81c7ce20 T r600_set_git +ffffffff81c7ce70 T r600_set_fctu +ffffffff81c7ced0 T r600_set_fct +ffffffff81c7cf20 T r600_set_ctxcgtt3d_rphc +ffffffff81c7cf80 T r600_set_ctxcgtt3d_rsdc +ffffffff81c7cfe0 T r600_set_vddc3d_oorsu +ffffffff81c7d040 T r600_set_vddc3d_oorphc +ffffffff81c7d0a0 T r600_set_vddc3d_oorsdc +ffffffff81c7d100 T r600_set_mpll_lock_time +ffffffff81c7d150 T r600_set_mpll_reset_time +ffffffff81c7d1a0 T r600_engine_clock_entry_enable +ffffffff81c7d2a0 T r600_engine_clock_entry_enable_pulse_skipping +ffffffff81c7d3a0 T r600_engine_clock_entry_enable_post_divider +ffffffff81c7d4a0 T r600_engine_clock_entry_set_post_divider +ffffffff81c7d560 T r600_engine_clock_entry_set_reference_divider +ffffffff81c7d620 T r600_engine_clock_entry_set_feedback_divider +ffffffff81c7d6e0 T r600_engine_clock_entry_set_step_time +ffffffff81c7d7a0 T r600_vid_rt_set_ssu +ffffffff81c7d800 T r600_vid_rt_set_vru +ffffffff81c7d860 T r600_vid_rt_set_vrt +ffffffff81c7d8c0 T r600_voltage_control_enable_pins +ffffffff81c7d910 T r600_voltage_control_program_voltages +ffffffff81c7d9a0 T r600_voltage_control_deactivate_static_control +ffffffff81c7da30 T r600_power_level_enable +ffffffff81c7daa0 T r600_power_level_set_voltage_index +ffffffff81c7db10 T r600_power_level_set_mem_clock_index +ffffffff81c7db70 T r600_power_level_set_eng_clock_index +ffffffff81c7dbe0 T r600_power_level_set_watermark_id +ffffffff81c7dc50 T r600_power_level_set_pcie_gen2 +ffffffff81c7dcb0 T r600_power_level_get_current_index +ffffffff81c7dcf0 T r600_power_level_get_target_index +ffffffff81c7dd30 T r600_power_level_set_enter_index +ffffffff81c7dd90 T r600_wait_for_power_level_unequal +ffffffff81c7de80 T r600_wait_for_power_level +ffffffff81c7df70 T r600_start_dpm +ffffffff81c7e250 T r600_stop_dpm +ffffffff81c7e2a0 T r600_dpm_pre_set_power_state +ffffffff81c7e2d0 T r600_dpm_post_set_power_state +ffffffff81c7e300 T r600_is_uvd_state +ffffffff81c7e340 T r600_is_internal_thermal_sensor +ffffffff81c7e380 T r600_dpm_late_enable +ffffffff81c7e490 T r600_get_platform_caps +ffffffff81c7e530 T r600_parse_extended_power_table +ffffffff81c7f4a0 T r600_free_extended_power_table +ffffffff81c7f5a0 T r600_get_pcie_gen_support +ffffffff81c7f5f0 T r600_get_pcie_lane_support +ffffffff81c7f650 T r600_encode_pci_lane_width +ffffffff81c80000 T r600_audio_update_hdmi +ffffffff81c80180 t r600_audio_status +ffffffff81c802a0 T r600_hdmi_buffer_status_changed +ffffffff81c80340 T r600_hdmi_update_audio_settings +ffffffff81c80710 T r600_audio_enable +ffffffff81c80790 T r600_audio_get_pin +ffffffff81c807c0 T r600_hdmi_update_acr +ffffffff81c80b60 T r600_set_avi_packet +ffffffff81c80d60 T r600_hdmi_audio_workaround +ffffffff81c80e30 T r600_hdmi_audio_set_dto +ffffffff81c80ef0 T r600_set_vbi_packet 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radeon_lookup_i2c_gpio +ffffffff81c86110 t radeon_atom_apply_quirks +ffffffff81c86540 T radeon_get_atom_connector_info_from_supported_devices_table +ffffffff81c86a40 T radeon_atom_get_clock_info +ffffffff81c86dc0 T radeon_atombios_sideport_present +ffffffff81c86e70 T radeon_atombios_get_tmds_info +ffffffff81c86fb0 T radeon_atombios_get_ppll_ss_info +ffffffff81c870d0 T radeon_atombios_get_asic_ss_info +ffffffff81c87440 T radeon_atombios_get_lvds_info +ffffffff81c877b0 T radeon_atombios_get_primary_dac_info +ffffffff81c87860 T radeon_atom_get_tv_timings +ffffffff81c87ab0 T radeon_atombios_get_tv_info +ffffffff81c87b60 T radeon_atombios_get_tv_dac_info +ffffffff81c87c60 T radeon_atombios_get_default_voltages +ffffffff81c87d20 T radeon_atombios_get_power_modes +ffffffff81c88df0 T radeon_atom_get_clock_dividers +ffffffff81c890f0 T radeon_atom_get_memory_pll_dividers +ffffffff81c89230 T radeon_atom_set_clock_gating +ffffffff81c89280 T radeon_atom_get_engine_clock +ffffffff81c892d0 T radeon_atom_get_memory_clock +ffffffff81c89320 T radeon_atom_set_engine_clock +ffffffff81c89370 T radeon_atom_set_memory_clock +ffffffff81c893d0 T radeon_atom_set_engine_dram_timings +ffffffff81c89440 T radeon_atom_update_memory_dll +ffffffff81c89490 T radeon_atom_set_ac_timing +ffffffff81c894e0 T radeon_atom_set_voltage +ffffffff81c895b0 T radeon_atom_get_max_vddc +ffffffff81c89690 T radeon_atom_get_leakage_vddc_based_on_leakage_idx +ffffffff81c89760 T radeon_atom_get_leakage_id_from_vbios +ffffffff81c89820 T radeon_atom_get_leakage_vddc_based_on_leakage_params +ffffffff81c89a30 T radeon_atom_get_voltage_evv +ffffffff81c89ae0 T radeon_atom_get_voltage_gpio_settings +ffffffff81c89be0 T radeon_atom_is_voltage_gpio +ffffffff81c89d70 T radeon_atom_get_svi2_info +ffffffff81c89e60 T radeon_atom_get_max_voltage +ffffffff81c8a000 T radeon_atom_get_min_voltage +ffffffff81c8a140 T radeon_atom_get_voltage_step +ffffffff81c8a240 T radeon_atom_round_to_true_voltage +ffffffff81c8a3b0 T radeon_atom_get_voltage_table +ffffffff81c8a620 T radeon_atom_get_memory_info +ffffffff81c8a7d0 T radeon_atom_get_mclk_range_table +ffffffff81c8aa20 T radeon_atom_init_mc_reg_table +ffffffff81c8aca0 T radeon_atom_initialize_bios_scratch_regs +ffffffff81c8ad70 T radeon_save_bios_scratch_regs +ffffffff81c8ae50 T radeon_restore_bios_scratch_regs +ffffffff81c8af30 T radeon_atom_output_lock +ffffffff81c8afc0 T radeon_atombios_connected_scratch_regs +ffffffff81c8b740 T radeon_atombios_encoder_crtc_scratch_regs +ffffffff81c8b880 T radeon_atombios_encoder_dpms_scratch_regs +ffffffff81c8baa0 t radeon_atombios_parse_misc_flags_1_3 +ffffffff81c8bc90 t radeon_atombios_add_pplib_thermal_controller +ffffffff81c8c090 t radeon_atombios_parse_pplib_clock_info +ffffffff81c8c3a0 t radeon_atombios_parse_pplib_non_clock_info +ffffffff81c8d000 T radeon_audio_init +ffffffff81c8d290 T radeon_audio_endpoint_rreg +ffffffff81c8d2d0 T radeon_audio_endpoint_wreg +ffffffff81c8d310 T radeon_audio_get_pin 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radeon_external_tmds_setup +ffffffff81c9ad70 T radeon_combios_external_tmds_setup +ffffffff81c9b330 T radeon_combios_asic_init +ffffffff81c9b950 t combios_parse_mmio_table +ffffffff81c9bb70 t combios_parse_pll_table +ffffffff81c9be40 T radeon_combios_initialize_bios_scratch_regs +ffffffff81c9bed0 T radeon_combios_output_lock +ffffffff81c9bf30 T radeon_combios_connected_scratch_regs +ffffffff81c9c290 T radeon_combios_encoder_crtc_scratch_regs +ffffffff81c9c370 T radeon_combios_encoder_dpms_scratch_regs +ffffffff81c9d000 T radeon_connector_hotplug +ffffffff81c9d100 T radeon_get_monitor_bpc +ffffffff81c9d530 T radeon_connector_edid +ffffffff81c9d5e0 T radeon_connector_encoder_get_dp_bridge_encoder_id +ffffffff81c9d660 T radeon_connector_is_dp12_capable +ffffffff81c9d700 T radeon_add_atom_connector +ffffffff81c9e550 T radeon_add_legacy_connector +ffffffff81c9ea90 t radeon_dp_detect +ffffffff81c9ee50 t radeon_dvi_force +ffffffff81c9eea0 t radeon_connector_set_property +ffffffff81c9f6e0 t radeon_connector_unregister +ffffffff81c9f740 t radeon_connector_destroy +ffffffff81c9f7b0 t radeon_best_single_encoder +ffffffff81c9f830 t radeon_connector_get_edid +ffffffff81c9f990 t radeon_dp_get_modes +ffffffff81c9fcc0 t radeon_dp_mode_valid +ffffffff81c9fe90 t radeon_dvi_encoder +ffffffff81c9ff70 t radeon_fixup_lvds_native_mode +ffffffff81ca00a0 t radeon_add_common_modes +ffffffff81ca0190 t radeon_fp_native_mode +ffffffff81ca0260 t radeon_lvds_set_property +ffffffff81ca0350 t radeon_vga_detect +ffffffff81ca0600 t radeon_connector_analog_encoder_conflict_solve +ffffffff81ca0820 t radeon_vga_get_modes +ffffffff81ca0910 t radeon_vga_mode_valid +ffffffff81ca0970 t radeon_dvi_detect +ffffffff81ca1010 t radeon_dvi_mode_valid +ffffffff81ca11a0 t radeon_tv_detect +ffffffff81ca13e0 t radeon_tv_get_modes +ffffffff81ca14b0 t radeon_tv_mode_valid +ffffffff81ca1500 t radeon_lvds_detect +ffffffff81ca16a0 t radeon_lvds_get_modes +ffffffff81ca1810 t radeon_lvds_mode_valid +ffffffff81ca2000 T radeon_cs_parser_init +ffffffff81ca2490 T radeon_cs_ioctl +ffffffff81ca2fc0 t radeon_cs_parser_fini +ffffffff81ca3150 T radeon_cs_packet_parse +ffffffff81ca3300 T radeon_cs_packet_next_is_pkt3_nop +ffffffff81ca3360 T radeon_cs_dump_packet +ffffffff81ca33e0 T radeon_cs_packet_next_reloc +ffffffff81ca35b0 t cmp_size_smaller_first +ffffffff81ca4000 T radeon_crtc_cursor_move +ffffffff81ca4070 t radeon_lock_cursor +ffffffff81ca4230 t radeon_cursor_move_locked +ffffffff81ca4780 T radeon_crtc_cursor_set2 +ffffffff81ca4a00 t radeon_hide_cursor +ffffffff81ca4ac0 t radeon_bo_reserve +ffffffff81ca4c30 t radeon_bo_unreserve +ffffffff81ca4d10 t radeon_show_cursor +ffffffff81ca4f60 T radeon_cursor_reset +ffffffff81ca5000 T radeon_is_px +ffffffff81ca5040 T radeon_program_register_sequence +ffffffff81ca5170 T radeon_pci_config_reset +ffffffff81ca51a0 T radeon_surface_init +ffffffff81ca5360 T radeon_scratch_init +ffffffff81ca53e0 T radeon_scratch_get +ffffffff81ca5460 T radeon_scratch_free +ffffffff81ca54c0 T radeon_doorbell_get +ffffffff81ca5570 T radeon_doorbell_free +ffffffff81ca55c0 T radeon_wb_disable +ffffffff81ca55f0 T radeon_wb_fini +ffffffff81ca5690 t radeon_bo_reserve +ffffffff81ca5800 t radeon_bo_unreserve +ffffffff81ca58e0 T radeon_wb_init +ffffffff81ca5bb0 T radeon_vram_location +ffffffff81ca5ce0 T radeon_gtt_location +ffffffff81ca5e10 T radeon_device_is_virtual +ffffffff81ca5e40 T radeon_card_posted +ffffffff81ca6060 T radeon_update_bandwidth_info +ffffffff81ca60e0 T radeon_boot_test_post_card +ffffffff81ca61a0 T radeon_dummy_page_init +ffffffff81ca6260 T radeon_dummy_page_fini +ffffffff81ca62c0 T radeon_atombios_init +ffffffff81ca6450 t cail_reg_read +ffffffff81ca64b0 t cail_reg_write +ffffffff81ca6510 t cail_ioreg_read +ffffffff81ca6530 t cail_ioreg_write +ffffffff81ca6550 t cail_mc_read +ffffffff81ca6580 t cail_mc_write +ffffffff81ca65b0 t cail_pll_read +ffffffff81ca65e0 t cail_pll_write +ffffffff81ca6610 T radeon_atombios_fini +ffffffff81ca66b0 T radeon_combios_init +ffffffff81ca66f0 T radeon_combios_fini +ffffffff81ca6720 T radeon_device_init +ffffffff81ca71f0 T radeon_device_fini +ffffffff81ca72f0 T radeon_suspend_kms +ffffffff81ca7660 T radeon_resume_kms +ffffffff81ca78b0 T radeon_gpu_reset +ffffffff81ca8000 T radeon_crtc_load_lut +ffffffff81ca8dc0 T radeon_crtc_handle_vblank +ffffffff81ca8f30 T radeon_get_crtc_scanoutpos +ffffffff81ca9560 T radeon_crtc_handle_flip +ffffffff81ca9690 T radeon_compute_pll_avivo +ffffffff81ca9bd0 T radeon_compute_pll_legacy +ffffffff81caa250 T radeon_framebuffer_init +ffffffff81caa2d0 T radeon_update_display_priority +ffffffff81caa330 T radeon_modeset_init +ffffffff81caae50 T radeon_modeset_fini +ffffffff81caafb0 T radeon_crtc_scaling_mode_fixup +ffffffff81cab310 T radeon_get_crtc_scanout_position +ffffffff81cab380 t radeon_user_framebuffer_create +ffffffff81cab520 t radeon_crtc_gamma_set +ffffffff81cab560 t radeon_crtc_destroy +ffffffff81cab5a0 t radeon_crtc_set_config +ffffffff81cab660 t radeon_crtc_page_flip_target +ffffffff81cabaf0 t radeon_flip_work_func +ffffffff81cabd10 t radeon_unpin_work_func +ffffffff81cabd90 t radeon_bo_reserve +ffffffff81cabf00 t radeon_bo_unreserve +ffffffff81cac000 T radeon_dp_aux_transfer_native +ffffffff81cad000 T radeondrm_probe +ffffffff81cad060 T radeondrm_attach_kms +ffffffff81cad7a0 T radeondrm_detach_kms +ffffffff81cad830 T radeondrm_activate_kms +ffffffff81cad8f0 T radeondrm_wsioctl +ffffffff81cad9b0 T radeondrm_wsmmap +ffffffff81cad9e0 T radeondrm_alloc_screen +ffffffff81cada10 T radeondrm_free_screen +ffffffff81cada20 T radeondrm_show_screen +ffffffff81cadb00 T radeondrm_enter_ddb +ffffffff81cadb60 T radeondrm_doswitch +ffffffff81cadbf0 T radeondrm_setpal +ffffffff81caddf0 T radeondrm_attachhook +ffffffff81cae110 T radeondrm_forcedetach +ffffffff81caf000 T radeon_setup_encoder_clones +ffffffff81caf0b0 T radeon_get_encoder_enum +ffffffff81caf230 T radeon_link_encoder_connector +ffffffff81caf370 T radeon_encoder_set_active_device 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radeon_fence_wait_seq_timeout +ffffffff81cb1a70 T radeon_fence_wait +ffffffff81cb1ba0 T radeon_fence_wait_any +ffffffff81cb1cf0 T radeon_fence_wait_next +ffffffff81cb1db0 T radeon_fence_wait_empty +ffffffff81cb1ec0 T radeon_fence_ref +ffffffff81cb1f00 T radeon_fence_unref +ffffffff81cb1f40 T radeon_fence_count_emitted +ffffffff81cb2040 T radeon_fence_need_sync +ffffffff81cb20a0 T radeon_fence_note_sync +ffffffff81cb2270 T radeon_fence_driver_start_ring +ffffffff81cb2450 T radeon_fence_driver_init +ffffffff81cb2590 T radeon_debugfs_fence_init +ffffffff81cb25c0 T radeon_fence_driver_fini +ffffffff81cb27f0 T radeon_fence_driver_force_completion +ffffffff81cb28f0 t radeon_fence_get_driver_name +ffffffff81cb2920 t radeon_fence_get_timeline_name +ffffffff81cb29c0 t radeon_fence_enable_signaling +ffffffff81cb2bd0 t radeon_fence_is_signaled +ffffffff81cb2d20 t radeon_fence_default_wait +ffffffff81cb2e80 t radeon_fence_any_seq_signaled +ffffffff81cb3080 t radeon_fence_check_lockup +ffffffff81cb32c0 t __delayed_work_tick +ffffffff81cb32e0 t radeon_fence_check_signaled +ffffffff81cb3370 t radeon_fence_wait_cb +ffffffff81cb4000 T radeon_gart_table_ram_alloc +ffffffff81cb40c0 T radeon_gart_table_ram_free +ffffffff81cb4130 T radeon_gart_table_vram_alloc +ffffffff81cb41b0 T radeon_gart_table_vram_pin +ffffffff81cb42f0 t radeon_bo_reserve +ffffffff81cb4460 t radeon_bo_unreserve +ffffffff81cb4540 T radeon_gart_table_vram_unpin +ffffffff81cb45c0 T radeon_gart_table_vram_free +ffffffff81cb4600 T radeon_gart_unbind +ffffffff81cb4720 T radeon_gart_bind +ffffffff81cb4870 T radeon_gart_init +ffffffff81cb49a0 T radeon_gart_fini +ffffffff81cb5000 T radeon_gem_fault +ffffffff81cb5180 T radeon_gem_vm_reference +ffffffff81cb51b0 T radeon_gem_vm_detach +ffffffff81cb51c0 T radeon_gem_object_create +ffffffff81cb5380 T radeon_gem_init +ffffffff81cb53c0 T radeon_gem_fini +ffffffff81cb53d0 t radeon_gem_object_free +ffffffff81cb5420 t radeon_gem_object_open +ffffffff81cb54c0 t radeon_gem_object_close +ffffffff81cb55b0 t radeon_gem_object_mmap +ffffffff81cb5650 T radeon_gem_info_ioctl +ffffffff81cb56c0 T radeon_gem_pread_ioctl +ffffffff81cb5710 T radeon_gem_pwrite_ioctl +ffffffff81cb5760 T radeon_gem_create_ioctl +ffffffff81cb5880 T radeon_gem_userptr_ioctl +ffffffff81cb58b0 T radeon_gem_set_domain_ioctl +ffffffff81cb5a20 T radeon_mode_dumb_mmap +ffffffff81cb5ad0 T radeon_gem_mmap_ioctl +ffffffff81cb5b90 T radeon_gem_busy_ioctl +ffffffff81cb5c40 T radeon_gem_wait_idle_ioctl +ffffffff81cb5d50 T radeon_gem_set_tiling_ioctl +ffffffff81cb5e00 T radeon_gem_get_tiling_ioctl +ffffffff81cb5ed0 t radeon_bo_reserve +ffffffff81cb60c0 t radeon_bo_unreserve +ffffffff81cb61a0 T radeon_gem_va_ioctl +ffffffff81cb6560 T radeon_gem_op_ioctl +ffffffff81cb6660 T radeon_mode_dumb_create +ffffffff81cb6760 T radeon_gem_debugfs_init +ffffffff81cb7000 T radeon_ddc_probe +ffffffff81cb70c0 T radeon_router_select_ddc_port +ffffffff81cb7320 T radeon_bb_set_bits +ffffffff81cb7490 T radeon_bb_set_dir +ffffffff81cb74c0 T radeon_bb_read_bits +ffffffff81cb75a0 T radeon_acquire_bus +ffffffff81cb79f0 T radeon_release_bus +ffffffff81cb7b60 T radeon_send_start +ffffffff81cb7b80 T radeon_send_stop +ffffffff81cb7ba0 T radeon_initiate_xfer +ffffffff81cb7bc0 T radeon_read_byte +ffffffff81cb7be0 T radeon_write_byte +ffffffff81cb7c00 T radeon_i2c_create +ffffffff81cb7e10 T radeon_i2c_destroy +ffffffff81cb7e90 T radeon_i2c_init +ffffffff81cb7ee0 T radeon_i2c_fini +ffffffff81cb7f90 T radeon_i2c_add +ffffffff81cb8140 T radeon_i2c_lookup +ffffffff81cb8300 T radeon_i2c_get_byte +ffffffff81cb83d0 T radeon_i2c_put_byte +ffffffff81cb8460 T radeon_router_select_cd_port +ffffffff81cb86c0 t radeon_hw_i2c_xfer +ffffffff81cb9280 t radeon_hw_i2c_func +ffffffff81cb92b0 t r100_hw_i2c_xfer +ffffffff81cb9990 t radeon_get_i2c_prescale +ffffffff81cba000 T radeon_ib_get +ffffffff81cba100 T radeon_ib_free +ffffffff81cba150 T radeon_ib_schedule +ffffffff81cba3e0 T radeon_ib_pool_init +ffffffff81cba480 T radeon_ib_pool_fini +ffffffff81cba4f0 T radeon_ib_ring_tests +ffffffff81cbb000 T radeon_driver_irq_handler_kms +ffffffff81cbb050 T radeon_msi_ok +ffffffff81cbb150 T radeon_irq_kms_init +ffffffff81cbb3e0 t radeon_hotplug_work_func +ffffffff81cbb490 t radeon_dp_work_func +ffffffff81cbb500 T radeon_irq_kms_fini +ffffffff81cbb6a0 T radeon_irq_kms_sw_irq_get +ffffffff81cbb740 T radeon_irq_kms_sw_irq_get_delayed +ffffffff81cbb780 T radeon_irq_kms_sw_irq_put +ffffffff81cbb810 T radeon_irq_kms_pflip_irq_get +ffffffff81cbb8c0 T radeon_irq_kms_pflip_irq_put +ffffffff81cbb960 T radeon_irq_kms_enable_afmt +ffffffff81cbb9f0 T radeon_irq_kms_disable_afmt +ffffffff81cbba80 T radeon_irq_kms_enable_hpd +ffffffff81cbbb70 T radeon_irq_kms_disable_hpd +ffffffff81cbbc50 T radeon_irq_kms_set_irq_n_enabled +ffffffff81cbbdc0 t __delayed_work_tick +ffffffff81cbc000 T radeon_info_ioctl +ffffffff81cbcbf0 T radeon_driver_lastclose_kms +ffffffff81cbcc00 T radeon_driver_open_kms +ffffffff81cbcd30 t radeon_bo_reserve +ffffffff81cbcea0 T radeon_driver_postclose_kms +ffffffff81cbd0c0 T radeon_get_vblank_counter_kms +ffffffff81cbd260 T radeon_enable_vblank_kms +ffffffff81cbd310 T radeon_disable_vblank_kms +ffffffff81cbe000 T radeon_crtc_set_base +ffffffff81cbe020 T radeon_crtc_do_set_base +ffffffff81cbe5c0 T radeon_crtc_set_base_atomic +ffffffff81cbe5e0 t radeon_bo_reserve +ffffffff81cbe750 t radeon_bo_unreserve +ffffffff81cbe830 T radeon_legacy_init_crtc +ffffffff81cbe880 t radeon_crtc_dpms +ffffffff81cbea80 t radeon_crtc_prepare +ffffffff81cbeb00 t radeon_crtc_commit +ffffffff81cbeb70 t radeon_crtc_mode_fixup +ffffffff81cbeb90 t radeon_crtc_mode_set +ffffffff81cbffe0 t radeon_crtc_disable +ffffffff81cc1000 T radeon_legacy_get_backlight_level +ffffffff81cc1040 T radeon_legacy_set_backlight_level +ffffffff81cc1080 t radeon_legacy_lvds_update +ffffffff81cc13e0 T radeon_legacy_backlight_init +ffffffff81cc15b0 t radeon_legacy_backlight_get_brightness +ffffffff81cc1610 T radeon_add_legacy_encoder +ffffffff81cc1990 t radeon_legacy_backlight_update_status +ffffffff81cc1a20 t radeon_lvds_enc_destroy +ffffffff81cc1ab0 t radeon_legacy_lvds_dpms +ffffffff81cc1b00 t radeon_legacy_mode_fixup +ffffffff81cc1b70 t radeon_legacy_lvds_prepare +ffffffff81cc1c00 t radeon_legacy_lvds_commit +ffffffff81cc1c80 t radeon_legacy_lvds_mode_set +ffffffff81cc1e90 t radeon_legacy_encoder_disable +ffffffff81cc1ee0 t radeon_legacy_tmds_int_dpms +ffffffff81cc1fa0 t radeon_legacy_tmds_int_prepare +ffffffff81cc2070 t radeon_legacy_tmds_int_commit +ffffffff81cc2140 t radeon_legacy_tmds_int_mode_set +ffffffff81cc23b0 t radeon_legacy_primary_dac_dpms +ffffffff81cc24f0 t radeon_legacy_primary_dac_prepare +ffffffff81cc2550 t radeon_legacy_primary_dac_commit +ffffffff81cc25a0 t radeon_legacy_primary_dac_mode_set +ffffffff81cc2750 t radeon_legacy_primary_dac_detect +ffffffff81cc2940 t radeon_legacy_tv_dac_dpms +ffffffff81cc2b40 t radeon_legacy_tv_dac_prepare +ffffffff81cc2ba0 t radeon_legacy_tv_dac_commit +ffffffff81cc2bf0 t radeon_legacy_tv_dac_mode_set +ffffffff81cc2f90 t radeon_legacy_tv_dac_detect +ffffffff81cc3bc0 t radeon_ext_tmds_enc_destroy +ffffffff81cc3c10 t radeon_legacy_tmds_ext_dpms +ffffffff81cc3ce0 t radeon_legacy_tmds_ext_prepare +ffffffff81cc3db0 t radeon_legacy_tmds_ext_commit +ffffffff81cc3e80 t radeon_legacy_tmds_ext_mode_set +ffffffff81cc5000 T radeon_legacy_tv_mode_set +ffffffff81cc60b0 T radeon_legacy_tv_adjust_crtc_reg +ffffffff81cc61c0 T radeon_legacy_tv_adjust_pll1 +ffffffff81cc62b0 T radeon_legacy_tv_adjust_pll2 +ffffffff81cc7000 T radeon_ttm_bo_is_radeon_bo +ffffffff81cc7040 t radeon_ttm_bo_destroy +ffffffff81cc7170 T radeon_ttm_placement_from_domain +ffffffff81cc72e0 T radeon_bo_create +ffffffff81cc74a0 T radeon_bo_kmap +ffffffff81cc7580 T radeon_bo_check_tiling +ffffffff81cc7660 T radeon_bo_kunmap +ffffffff81cc76f0 T radeon_bo_ref +ffffffff81cc7730 T radeon_bo_unref +ffffffff81cc7780 T radeon_bo_pin_restricted +ffffffff81cc7ab0 T radeon_bo_pin +ffffffff81cc7ad0 T radeon_bo_unpin +ffffffff81cc7b40 T radeon_bo_evict_vram +ffffffff81cc7ba0 T radeon_bo_force_delete +ffffffff81cc7d00 T radeon_bo_init +ffffffff81cc7de0 T radeon_bo_fini +ffffffff81cc7e20 T radeon_bo_list_validate +ffffffff81cc8110 T radeon_bo_get_surface_reg +ffffffff81cc83b0 T radeon_bo_set_tiling_flags +ffffffff81cc86c0 T radeon_bo_get_tiling_flags +ffffffff81cc8710 T radeon_bo_move_notify +ffffffff81cc87d0 T radeon_bo_fault_reserve_notify +ffffffff81cc8ad0 T radeon_bo_fence +ffffffff81cc9000 T radeon_pm_get_type_index +ffffffff81cc9080 T radeon_pm_acpi_event_handler +ffffffff81cc9160 t radeon_pm_update_profile +ffffffff81cc9280 t radeon_pm_set_clocks +ffffffff81cc9c40 T radeon_dpm_enable_uvd +ffffffff81cc9d00 T radeon_pm_compute_clocks +ffffffff81cca740 T radeon_dpm_enable_vce +ffffffff81cca7b0 T radeon_pm_suspend +ffffffff81cca8b0 T radeon_pm_resume +ffffffff81ccaba0 T radeon_pm_init +ffffffff81ccb2a0 T radeon_pm_late_init +ffffffff81ccb360 T radeon_pm_fini +ffffffff81ccb470 t radeon_dpm_thermal_work_handler +ffffffff81ccb550 t radeon_dynpm_idle_work_handler +ffffffff81ccb840 t __delayed_work_tick +ffffffff81ccc000 T radeon_gem_prime_get_sg_table +ffffffff81ccc030 T radeon_gem_prime_pin +ffffffff81ccc0c0 t radeon_bo_reserve +ffffffff81ccc230 t radeon_bo_unreserve +ffffffff81ccc310 T radeon_gem_prime_unpin +ffffffff81ccc380 T radeon_gem_prime_export +ffffffff81ccd000 T radeon_ring_supports_scratch_reg +ffffffff81ccd030 T radeon_ring_free_size +ffffffff81ccd0e0 T radeon_ring_lockup_update +ffffffff81ccd140 T radeon_ring_alloc +ffffffff81ccd2c0 T radeon_ring_lock +ffffffff81ccd340 T radeon_ring_commit +ffffffff81ccd440 T radeon_ring_unlock_commit +ffffffff81ccd470 T radeon_ring_undo +ffffffff81ccd4a0 T radeon_ring_unlock_undo +ffffffff81ccd4c0 T radeon_ring_test_lockup +ffffffff81ccd5e0 T radeon_ring_backup +ffffffff81ccd7a0 T radeon_ring_restore +ffffffff81ccd960 T radeon_ring_init +ffffffff81ccdb50 t radeon_bo_reserve +ffffffff81ccdcc0 t radeon_bo_unreserve +ffffffff81ccdda0 T radeon_ring_fini +ffffffff81cce000 T radeon_sa_bo_manager_init +ffffffff81cce190 T radeon_sa_bo_manager_fini +ffffffff81cce380 T radeon_sa_bo_manager_start +ffffffff81cce4b0 t radeon_bo_reserve +ffffffff81cce620 t radeon_bo_unreserve +ffffffff81cce700 T radeon_sa_bo_manager_suspend +ffffffff81cce7a0 T radeon_sa_bo_new +ffffffff81ccf050 T radeon_sa_bo_free +ffffffff81cd0000 T radeon_semaphore_create +ffffffff81cd00f0 T radeon_semaphore_emit_signal +ffffffff81cd0180 T radeon_semaphore_emit_wait +ffffffff81cd0210 T radeon_semaphore_free +ffffffff81cd1000 T radeon_sync_create +ffffffff81cd1090 T radeon_sync_fence +ffffffff81cd1140 T radeon_sync_resv +ffffffff81cd1270 T radeon_sync_rings +ffffffff81cd1430 T radeon_sync_free +ffffffff81cd2000 T radeon_test_moves +ffffffff81cd2070 t radeon_do_test_moves +ffffffff81cd2660 T radeon_test_ring_sync +ffffffff81cd2930 t radeon_test_create_and_emit_fence +ffffffff81cd2aa0 T radeon_test_syncing +ffffffff81cd2d60 t radeon_test_ring_sync2 +ffffffff81cd30d0 t radeon_bo_reserve +ffffffff81cd3240 t radeon_bo_unreserve +ffffffff81cd4000 T radeon_get_rdev +ffffffff81cd4030 T radeon_ttm_tt_set_userptr +ffffffff81cd4080 T radeon_ttm_tt_is_bound +ffffffff81cd40d0 T radeon_ttm_tt_has_userptr +ffffffff81cd4110 T radeon_ttm_tt_is_readonly +ffffffff81cd4150 T radeon_ttm_init +ffffffff81cd4370 T radeon_ttm_set_active_vram_size +ffffffff81cd43b0 t radeon_bo_reserve +ffffffff81cd4520 t radeon_bo_unreserve +ffffffff81cd4600 T radeon_ttm_fini +ffffffff81cd46d0 t radeon_ttm_tt_create +ffffffff81cd47c0 t radeon_ttm_tt_populate +ffffffff81cd4870 t radeon_ttm_tt_unpopulate +ffffffff81cd4970 t radeon_ttm_tt_destroy +ffffffff81cd49c0 t radeon_evict_flags +ffffffff81cd4b10 t radeon_bo_move +ffffffff81cd4f90 t radeon_ttm_io_mem_reserve +ffffffff81cd6000 T radeon_ucode_print_mc_hdr +ffffffff81cd60b0 t radeon_ucode_print_common_hdr +ffffffff81cd61e0 T radeon_ucode_print_smc_hdr +ffffffff81cd6270 T radeon_ucode_print_gfx_hdr +ffffffff81cd6340 T radeon_ucode_print_rlc_hdr +ffffffff81cd6440 T radeon_ucode_print_sdma_hdr +ffffffff81cd6520 T radeon_ucode_validate +ffffffff81cd7000 T radeon_uvd_init +ffffffff81cd74e0 t radeon_uvd_idle_work_handler +ffffffff81cd7650 t radeon_bo_reserve +ffffffff81cd7840 t radeon_bo_unreserve +ffffffff81cd7920 T radeon_uvd_fini +ffffffff81cd79f0 T radeon_uvd_suspend +ffffffff81cd7bb0 T radeon_uvd_note_usage +ffffffff81cd7df0 T radeon_uvd_get_destroy_msg +ffffffff81cd7f00 T radeon_uvd_resume +ffffffff81cd7f90 T radeon_uvd_force_into_uvd_segment +ffffffff81cd8030 T radeon_uvd_free_handles +ffffffff81cd81f0 T radeon_uvd_cs_parse +ffffffff81cd8910 T radeon_uvd_get_create_msg +ffffffff81cd8a90 t radeon_uvd_send_msg +ffffffff81cd8c30 T radeon_uvd_calc_upll_dividers +ffffffff81cd8dd0 T radeon_uvd_send_upll_ctlreq +ffffffff81cd9110 t __delayed_work_tick +ffffffff81cda000 T radeon_vce_init +ffffffff81cda600 t radeon_vce_idle_work_handler +ffffffff81cda6d0 t radeon_bo_reserve +ffffffff81cda840 t radeon_bo_unreserve +ffffffff81cda920 T radeon_vce_fini +ffffffff81cda9a0 T radeon_vce_suspend +ffffffff81cdaa80 T radeon_vce_resume +ffffffff81cdabd0 T radeon_vce_note_usage +ffffffff81cdacf0 T radeon_vce_free_handles +ffffffff81cdadb0 T radeon_vce_get_destroy_msg +ffffffff81cdb050 T radeon_vce_get_create_msg +ffffffff81cdb410 T radeon_vce_cs_reloc +ffffffff81cdb510 T radeon_vce_cs_parse +ffffffff81cdbd40 T radeon_vce_semaphore_emit +ffffffff81cdbf10 T radeon_vce_ib_execute +ffffffff81cdc0b0 T radeon_vce_fence_emit +ffffffff81cdc2f0 T radeon_vce_ring_test +ffffffff81cdc440 T radeon_vce_ib_test +ffffffff81cdc560 t __delayed_work_tick +ffffffff81cdd000 T radeon_vm_manager_init +ffffffff81cdd060 T radeon_vm_manager_fini +ffffffff81cdd180 T radeon_vm_get_bos +ffffffff81cdd2b0 T radeon_vm_grab_id +ffffffff81cdd440 T radeon_vm_flush +ffffffff81cdd5d0 T radeon_vm_fence +ffffffff81cdd680 T radeon_vm_bo_find +ffffffff81cdd6e0 T radeon_vm_bo_add +ffffffff81cdd7c0 T radeon_vm_bo_set_addr +ffffffff81cddc20 t radeon_bo_unreserve +ffffffff81cddd00 t radeon_vm_clear_bo +ffffffff81cddef0 T radeon_vm_map_gart +ffffffff81cddf30 T radeon_vm_update_page_directory +ffffffff81cde2e0 T radeon_vm_bo_update +ffffffff81cde9c0 T radeon_vm_clear_freed +ffffffff81cdeaa0 T radeon_vm_clear_invalids +ffffffff81cdeb40 T radeon_vm_bo_rmv +ffffffff81cdec30 T radeon_vm_bo_invalidate +ffffffff81cdece0 T radeon_vm_init +ffffffff81cdef40 T radeon_vm_fini +ffffffff81cdf210 t radeon_bo_reserve +ffffffff81cdf380 t radeon_vm_frag_ptes +ffffffff81ce0000 T rs400_gart_adjust_size +ffffffff81ce00c0 T rs400_gart_tlb_flush +ffffffff81ce0140 T rs400_gart_init +ffffffff81ce0240 T rs400_gart_enable +ffffffff81ce05a0 T rs400_gart_disable +ffffffff81ce0600 T rs400_gart_fini +ffffffff81ce0670 T rs400_gart_get_page_entry +ffffffff81ce06d0 T rs400_gart_set_page +ffffffff81ce0710 T rs400_mc_wait_for_idle +ffffffff81ce07b0 T rs400_mc_rreg +ffffffff81ce0840 T rs400_mc_wreg +ffffffff81ce08c0 T rs400_resume +ffffffff81ce09f0 t rs400_mc_program +ffffffff81ce0af0 t rs400_startup +ffffffff81ce0ce0 T rs400_suspend +ffffffff81ce0d80 T rs400_fini +ffffffff81ce0e70 T rs400_init +ffffffff81ce2000 T avivo_wait_for_vblank +ffffffff81ce2280 T rs600_page_flip +ffffffff81ce2540 T rs600_page_flip_pending +ffffffff81ce25b0 T avivo_program_fmt +ffffffff81ce26d0 T rs600_pm_misc +ffffffff81ce2a10 T rs600_pm_prepare +ffffffff81ce2b10 T rs600_pm_finish +ffffffff81ce2c10 T rs600_hpd_sense +ffffffff81ce2c70 T rs600_hpd_set_polarity +ffffffff81ce2d30 T rs600_hpd_init +ffffffff81ce2e10 T rs600_hpd_fini +ffffffff81ce2eb0 T rs600_asic_reset +ffffffff81ce3120 T rs600_gart_tlb_flush +ffffffff81ce31e0 T rs600_gart_get_page_entry +ffffffff81ce3240 T rs600_gart_set_page +ffffffff81ce3280 T rs600_irq_set +ffffffff81ce3450 T rs600_irq_disable +ffffffff81ce34d0 t rs600_irq_ack +ffffffff81ce3680 T rs600_irq_process +ffffffff81ce39e0 T rs600_get_vblank_counter +ffffffff81ce3a30 T rs600_mc_wait_for_idle +ffffffff81ce3ad0 T rs600_bandwidth_update +ffffffff81ce3bc0 T rs600_mc_rreg +ffffffff81ce3c40 T rs600_mc_wreg +ffffffff81ce3cb0 T rs600_set_safe_registers +ffffffff81ce3cf0 T rs600_resume +ffffffff81ce3e20 t rs600_startup +ffffffff81ce4640 T rs600_suspend +ffffffff81ce4740 T rs600_fini +ffffffff81ce4840 T rs600_init +ffffffff81ce5000 T rs690_mc_wait_for_idle +ffffffff81ce50a0 T rs690_pm_info +ffffffff81ce5330 T rs690_line_buffer_adjust +ffffffff81ce5430 T rs690_bandwidth_update +ffffffff81ce5750 t rs690_crtc_bandwidth_compute +ffffffff81ce5b80 t rs690_compute_mode_priority +ffffffff81ce6000 T rs690_mc_rreg +ffffffff81ce6090 T rs690_mc_wreg +ffffffff81ce6110 T rs690_resume +ffffffff81ce6200 t rs690_startup +ffffffff81ce64e0 T rs690_suspend +ffffffff81ce6540 T rs690_fini +ffffffff81ce65f0 T rs690_init +ffffffff81ce7000 T rs780_dpm_enable +ffffffff81ce7be0 T rs780_dpm_disable +ffffffff81ce7cc0 T rs780_dpm_set_power_state +ffffffff81ce80a0 t rs780_force_voltage +ffffffff81ce81e0 t rs780_enable_voltage_scaling +ffffffff81ce8390 T rs780_dpm_setup_asic +ffffffff81ce83c0 T rs780_dpm_display_configuration_changed +ffffffff81ce8510 T rs780_dpm_init +ffffffff81ce8a80 T rs780_dpm_print_power_state +ffffffff81ce8b10 T rs780_dpm_fini +ffffffff81ce8ba0 T rs780_dpm_get_sclk +ffffffff81ce8be0 T rs780_dpm_get_mclk +ffffffff81ce8c10 T rs780_dpm_debugfs_print_current_performance_level +ffffffff81ce8c40 T rs780_dpm_get_current_sclk +ffffffff81ce8cd0 T rs780_dpm_get_current_mclk +ffffffff81ce8d00 T rs780_dpm_force_performance_level +ffffffff81ce8ef0 t rs780_force_fbdiv +ffffffff81cea000 T rv515_ring_start +ffffffff81ceab30 T rv515_mc_wait_for_idle +ffffffff81ceabd0 T rv515_vga_render_disable +ffffffff81ceac20 T rv515_mc_rreg +ffffffff81ceacb0 T rv515_mc_wreg +ffffffff81cead30 T rv515_debugfs +ffffffff81cead40 T rv515_mc_stop +ffffffff81ceb2d0 T rv515_mc_resume +ffffffff81ceb8e0 T rv515_clock_startup +ffffffff81ceb9b0 T rv515_resume +ffffffff81cebbf0 t rv515_startup +ffffffff81cec0c0 T rv515_suspend +ffffffff81cec130 T rv515_set_safe_registers +ffffffff81cec170 T rv515_fini +ffffffff81cec220 T rv515_init +ffffffff81cec500 T atom_rv515_force_tv_scaler +ffffffff81cefba0 T rv515_bandwidth_avivo_update +ffffffff81cefd40 t rv515_crtc_bandwidth_compute +ffffffff81cf0080 t rv515_compute_mode_priority +ffffffff81cf0530 T rv515_bandwidth_update +ffffffff81cf1000 T rv6xx_dpm_enable +ffffffff81cf17f0 t rv6xx_calculate_stepping_parameters +ffffffff81cf19c0 t rv6xx_program_stepping_parameters_except_lowest_entry +ffffffff81cf1fb0 t rv6xx_program_stepping_parameters_lowest_entry +ffffffff81cf2090 T rv6xx_dpm_disable +ffffffff81cf2410 T rv6xx_dpm_set_power_state +ffffffff81cf2e10 T rv6xx_setup_asic +ffffffff81cf2f50 T rv6xx_dpm_display_configuration_changed +ffffffff81cf2fd0 T rv6xx_dpm_init +ffffffff81cf3520 T rv6xx_dpm_print_power_state +ffffffff81cf35e0 T rv6xx_dpm_debugfs_print_current_performance_level +ffffffff81cf3610 T rv6xx_dpm_get_current_sclk +ffffffff81cf3680 T rv6xx_dpm_get_current_mclk +ffffffff81cf36f0 T rv6xx_dpm_fini +ffffffff81cf3780 T rv6xx_dpm_get_sclk +ffffffff81cf37c0 T rv6xx_dpm_get_mclk +ffffffff81cf3800 T rv6xx_dpm_force_performance_level +ffffffff81cf3990 t rv6xx_generate_steps +ffffffff81cf3ca0 t rv6xx_output_stepping +ffffffff81cf3dc0 t rv6xx_program_mclk_stepping_entry +ffffffff81cf4030 t rv6xx_program_engine_spread_spectrum +ffffffff81cf4310 t rv6xx_step_sw_voltage +ffffffff81cf5000 T rv730_populate_sclk_value +ffffffff81cf5240 T rv730_populate_mclk_value +ffffffff81cf5460 T rv730_read_clock_registers +ffffffff81cf5580 T rv730_populate_smc_acpi_state +ffffffff81cf5730 T rv730_populate_smc_initial_state +ffffffff81cf58f0 T rv730_program_memory_timing_parameters +ffffffff81cf5ad0 T rv730_start_dpm +ffffffff81cf5b60 T rv730_stop_dpm +ffffffff81cf5c20 T rv730_program_dcodt +ffffffff81cf5cf0 T rv730_get_odt_values +ffffffff81cf6000 T rv740_get_decoded_reference_divider +ffffffff81cf60a0 T rv740_get_dll_speed +ffffffff81cf61d0 T rv740_populate_sclk_value +ffffffff81cf63e0 T rv740_populate_mclk_value +ffffffff81cf6840 T rv740_read_clock_registers +ffffffff81cf6970 T rv740_populate_smc_acpi_state +ffffffff81cf6ba0 T rv740_enable_mclk_spread_spectrum +ffffffff81cf6c00 T rv740_get_mclk_frequency_ratio +ffffffff81cf7000 T rv770_set_uvd_clocks +ffffffff81cf7570 T rv770_get_xclk +ffffffff81cf75d0 T rv770_page_flip +ffffffff81cf78e0 T rv770_page_flip_pending +ffffffff81cf7950 T rv770_get_temp +ffffffff81cf79b0 T rv770_pm_misc +ffffffff81cf7a90 T r700_cp_stop +ffffffff81cf7b10 T r700_cp_fini +ffffffff81cf7ba0 T rv770_set_clk_bypass_mode +ffffffff81cf7cc0 T r700_vram_gtt_location +ffffffff81cf7e40 T rv770_resume +ffffffff81cf7ed0 t rv770_init_golden_registers +ffffffff81cf8060 t rv770_startup +ffffffff81cfa030 T rv770_suspend +ffffffff81cfa250 T rv770_init +ffffffff81cfa810 T rv770_fini +ffffffff81cfb000 T rv770_copy_dma +ffffffff81cfc000 T rv770_get_ps +ffffffff81cfc030 T rv770_get_pi +ffffffff81cfc060 T evergreen_get_pi +ffffffff81cfc090 T rv770_restore_cgcg +ffffffff81cfc110 T rv770_stop_dpm +ffffffff81cfc1d0 T rv770_dpm_enabled +ffffffff81cfc210 T rv770_enable_thermal_protection +ffffffff81cfc270 T rv770_enable_acpi_pm +ffffffff81cfc2c0 T rv770_get_seq_value +ffffffff81cfc300 T rv770_write_smc_soft_register +ffffffff81cfc330 T rv770_populate_smc_t +ffffffff81cfc4d0 T rv770_populate_smc_sp +ffffffff81cfc530 T rv770_map_clkf_to_ibias +ffffffff81cfc590 T rv770_populate_vddc_value +ffffffff81cfc640 T rv770_populate_mvdd_value +ffffffff81cfc690 T rv770_calculate_memory_refresh_rate +ffffffff81cfc700 T rv770_enable_backbias +ffffffff81cfc760 T rv770_setup_bsp +ffffffff81cfc850 T rv770_program_git +ffffffff81cfc8a0 T rv770_program_tp +ffffffff81cfc920 T rv770_program_tpp +ffffffff81cfc960 T rv770_program_sstp +ffffffff81cfc9a0 T rv770_program_engine_speed_parameters +ffffffff81cfc9f0 T rv770_program_vc +ffffffff81cfca40 T rv770_clear_vc +ffffffff81cfca80 T rv770_upload_firmware +ffffffff81cfcac0 T rv770_populate_initial_mvdd_value +ffffffff81cfcb10 T rv770_get_memory_module_index +ffffffff81cfcb50 T rv770_enable_voltage_control +ffffffff81cfcbb0 T rv770_halt_smc +ffffffff81cfcc10 T rv770_resume_smc +ffffffff81cfcc60 T rv770_set_sw_state +ffffffff81cfccc0 T rv770_set_boot_state +ffffffff81cfcd10 T rv770_set_uvd_clock_before_set_eng_clock +ffffffff81cfcd80 T rv770_set_uvd_clock_after_set_eng_clock +ffffffff81cfcdf0 T rv770_restrict_performance_levels_before_switch +ffffffff81cfce50 T rv770_dpm_force_performance_level +ffffffff81cfcf10 T r7xx_start_smc +ffffffff81cfcf40 T r7xx_stop_smc +ffffffff81cfcf70 T rv770_read_voltage_smio_registers +ffffffff81cfcfb0 T rv770_reset_smio_status +ffffffff81cfd070 T rv770_get_memory_type +ffffffff81cfd0c0 T rv770_get_pcie_gen2_status +ffffffff81cfd130 T rv770_get_max_vddc +ffffffff81cfd190 T rv770_program_response_times +ffffffff81cfd2e0 T rv770_enable_auto_throttle_source +ffffffff81cfd460 T rv770_dpm_enable +ffffffff81cfe4e0 T rv770_dpm_late_enable +ffffffff81cfe610 T rv770_dpm_disable +ffffffff81cfe970 T rv770_dpm_set_power_state +ffffffff81cfef70 T rv770_dpm_setup_asic +ffffffff81cff2d0 T rv770_dpm_display_configuration_changed +ffffffff81cff350 T rv7xx_parse_power_table +ffffffff81cff890 T rv770_get_engine_memory_ss +ffffffff81cff920 T rv770_dpm_init +ffffffff81cffb60 T rv770_dpm_print_power_state +ffffffff81cffc80 T rv770_dpm_debugfs_print_current_performance_level +ffffffff81cffcb0 T rv770_dpm_get_current_sclk +ffffffff81cffd20 T rv770_dpm_get_current_mclk +ffffffff81cffd90 T rv770_dpm_fini +ffffffff81cffe20 T rv770_dpm_get_sclk +ffffffff81cffe60 T rv770_dpm_get_mclk +ffffffff81cffeb0 T rv770_dpm_vblank_too_short +ffffffff81cfff20 t rv770_convert_power_level_to_smc +ffffffff81d01000 T rv770_copy_bytes_to_smc +ffffffff81d01240 T rv770_start_smc +ffffffff81d01290 T rv770_reset_smc +ffffffff81d012e0 T rv770_stop_smc_clock +ffffffff81d01330 T rv770_start_smc_clock +ffffffff81d01380 T rv770_is_smc_running +ffffffff81d013c0 T rv770_send_msg_to_smc +ffffffff81d014a0 T rv770_wait_for_smc_inactive +ffffffff81d01540 T rv770_load_smc_ucode +ffffffff81d016d0 T rv770_read_smc_sram_dword +ffffffff81d01790 T rv770_write_smc_sram_dword +ffffffff81d02000 T si_get_allowed_info_register +ffffffff81d02090 T si_get_xclk +ffffffff81d02100 T si_get_temp +ffffffff81d02150 T si_mc_load_microcode +ffffffff81d02420 T dce6_bandwidth_update +ffffffff81d02820 t dce6_program_watermarks +ffffffff81d032d0 T si_fence_ring_emit +ffffffff81d03750 T si_ring_ib_execute +ffffffff81d03f30 T si_gpu_check_soft_reset +ffffffff81d040d0 T si_asic_reset +ffffffff81d044f0 t si_gpu_pci_config_reset +ffffffff81d048a0 T si_gfx_is_lockup +ffffffff81d04910 T si_vram_gtt_location +ffffffff81d049b0 T si_pcie_gart_tlb_flush +ffffffff81d04a00 T si_ib_parse +ffffffff81d050a0 T si_vm_init +ffffffff81d050e0 T si_vm_fini +ffffffff81d05110 T si_vm_flush +ffffffff81d057f0 T si_init_uvd_internal_cg +ffffffff81d05840 T si_get_csb_size +ffffffff81d058d0 T si_get_csb_buffer +ffffffff81d05a60 T si_rlc_reset +ffffffff81d05ae0 T si_irq_set +ffffffff81d05ff0 t si_disable_interrupt_state +ffffffff81d06270 T si_irq_process +ffffffff81d07460 t si_irq_ack +ffffffff81d07a60 T si_resume +ffffffff81d07af0 t si_init_golden_registers +ffffffff81d07cb0 t si_startup +ffffffff81d0c4c0 T si_suspend +ffffffff81d0c840 T si_init +ffffffff81d0dd00 t si_cp_fini +ffffffff81d0ddf0 t si_pcie_gart_fini +ffffffff81d0def0 T si_fini +ffffffff81d0e1a0 T si_get_gpu_clock_counter +ffffffff81d0e270 T si_set_uvd_clocks +ffffffff81d0e7e0 T si_set_vce_clocks +ffffffff81d0ed20 t si_vce_send_vcepll_ctlreq +ffffffff81d0ef60 t dce6_latency_watermark +ffffffff81d0f190 t si_rlc_stop +ffffffff81d0f340 t si_vm_reg_valid +ffffffff81d0f4a0 t si_vm_packet3_cp_dma_check +ffffffff81d0f620 t si_update_cg +ffffffff81d0fb70 t si_enable_mgcg +ffffffff81d0ff90 t si_enable_cgcg +ffffffff81d11000 T si_dma_is_lockup +ffffffff81d11080 T si_dma_vm_copy_pages +ffffffff81d11160 T si_dma_vm_write_pages +ffffffff81d112c0 T si_dma_vm_set_pages +ffffffff81d11420 T si_dma_vm_flush +ffffffff81d118b0 T si_copy_dma +ffffffff81d12000 T si_dpm_force_performance_level +ffffffff81d12160 T si_get_ddr3_mclk_frequency_ratio +ffffffff81d121c0 T si_get_mclk_frequency_ratio +ffffffff81d12240 T si_trim_voltage_table_to_fit_state_table +ffffffff81d12340 T si_dpm_setup_asic +ffffffff81d12510 T si_fan_ctrl_get_fan_speed_percent +ffffffff81d125a0 T si_fan_ctrl_set_fan_speed_percent +ffffffff81d12660 T si_fan_ctrl_set_mode +ffffffff81d128b0 T si_fan_ctrl_get_mode +ffffffff81d12900 T si_dpm_enable +ffffffff81d17c00 t si_populate_smc_tdp_limits +ffffffff81d17e10 T si_dpm_late_enable +ffffffff81d17f60 T si_dpm_disable +ffffffff81d182e0 T si_dpm_pre_set_power_state +ffffffff81d18ee0 T si_dpm_set_power_state +ffffffff81d1a460 T si_dpm_post_set_power_state +ffffffff81d1a490 T si_dpm_display_configuration_changed +ffffffff81d1a570 T si_dpm_init +ffffffff81d1c020 T si_dpm_fini +ffffffff81d1c0d0 T si_dpm_debugfs_print_current_performance_level +ffffffff81d1c120 T si_dpm_get_current_sclk +ffffffff81d1c190 T si_dpm_get_current_mclk +ffffffff81d1c200 t si_get_std_voltage_value +ffffffff81d1c330 t si_convert_power_level_to_smc +ffffffff81d1cbd0 t si_calculate_sclk_params +ffffffff81d1cdf0 t si_convert_mc_reg_table_to_smc +ffffffff81d1cf50 t si_program_cac_config_registers +ffffffff81d1e000 T si_copy_bytes_to_smc +ffffffff81d1e250 T si_start_smc +ffffffff81d1e290 T si_reset_smc +ffffffff81d1e2d0 T si_program_jump_on_start +ffffffff81d1e300 T si_stop_smc_clock +ffffffff81d1e340 T si_start_smc_clock +ffffffff81d1e380 T si_is_smc_running +ffffffff81d1e3e0 T si_send_msg_to_smc +ffffffff81d1e4b0 T si_wait_for_smc_inactive +ffffffff81d1e550 T si_load_smc_ucode +ffffffff81d1e6f0 T si_read_smc_sram_dword +ffffffff81d1e7c0 T si_write_smc_sram_dword +ffffffff81d1f000 T sumo_get_pi +ffffffff81d1f030 T sumo_gfx_clockgating_initialize +ffffffff81d1f110 T sumo_program_vc +ffffffff81d1f150 T sumo_clear_vc +ffffffff81d1f190 T sumo_program_sstp +ffffffff81d1f210 T sumo_take_smu_control +ffffffff81d1f240 T sumo_get_sleep_divider_from_id +ffffffff81d1f270 T sumo_get_sleep_divider_id_from_clock +ffffffff81d1f320 T sumo_dpm_enable +ffffffff81d1f9c0 T sumo_dpm_late_enable +ffffffff81d1ff80 T sumo_dpm_disable +ffffffff81d202d0 T sumo_dpm_pre_set_power_state +ffffffff81d20790 T sumo_dpm_set_power_state +ffffffff81d212d0 T sumo_dpm_post_set_power_state +ffffffff81d21370 T sumo_dpm_setup_asic +ffffffff81d21470 T sumo_dpm_display_configuration_changed +ffffffff81d214a0 T sumo_convert_vid2_to_vid7 +ffffffff81d21500 T sumo_construct_sclk_voltage_mapping_table +ffffffff81d215c0 T sumo_construct_vid_mapping_table +ffffffff81d21740 T sumo_dpm_init +ffffffff81d22000 T sumo_dpm_print_power_state +ffffffff81d22120 T sumo_dpm_debugfs_print_current_performance_level +ffffffff81d22150 T sumo_dpm_get_current_sclk +ffffffff81d221c0 T sumo_dpm_get_current_mclk +ffffffff81d221f0 T sumo_dpm_get_current_vddc +ffffffff81d222c0 T sumo_dpm_fini +ffffffff81d22350 T sumo_dpm_get_sclk +ffffffff81d223a0 T sumo_dpm_get_mclk +ffffffff81d223d0 T sumo_dpm_force_performance_level +ffffffff81d227f0 t sumo_power_level_enable +ffffffff81d22a20 t sumo_program_power_level +ffffffff81d23000 T sumo_initialize_m3_arb +ffffffff81d232c0 T sumo_smu_notify_alt_vddnb_change +ffffffff81d23360 t sumo_send_msg_to_smu +ffffffff81d23500 T sumo_smu_pg_init +ffffffff81d23520 T sumo_enable_boost_timer +ffffffff81d23660 T sumo_set_tdp_limit +ffffffff81d236e0 T sumo_boost_state_enable +ffffffff81d23730 T sumo_get_running_fw_version +ffffffff81d24000 T trinity_dpm_enable_bapm +ffffffff81d24080 T trinity_dpm_enable +ffffffff81d24520 T trinity_dpm_late_enable +ffffffff81d24a80 T trinity_dpm_disable +ffffffff81d24e90 T trinity_dpm_force_performance_level +ffffffff81d24f50 T trinity_dpm_pre_set_power_state +ffffffff81d25520 T trinity_dpm_set_power_state +ffffffff81d25ab0 T trinity_dpm_post_set_power_state +ffffffff81d25b50 T trinity_dpm_setup_asic +ffffffff81d25bb0 T trinity_dpm_display_configuration_changed +ffffffff81d25c40 T trinity_dpm_init +ffffffff81d26540 T trinity_dpm_print_power_state +ffffffff81d26650 T trinity_dpm_debugfs_print_current_performance_level +ffffffff81d266e0 T trinity_dpm_get_current_sclk +ffffffff81d26740 T trinity_dpm_get_current_mclk +ffffffff81d26770 T trinity_dpm_fini +ffffffff81d26810 T trinity_dpm_get_sclk +ffffffff81d26860 T trinity_dpm_get_mclk +ffffffff81d26890 t trinity_program_power_level +ffffffff81d27000 T trinity_dpm_bapm_enable +ffffffff81d27150 T trinity_dpm_config +ffffffff81d27230 T trinity_dpm_force_state +ffffffff81d27310 T trinity_dpm_n_levels_disabled +ffffffff81d273f0 T trinity_uvd_dpm_config +ffffffff81d274c0 T trinity_dpm_no_forced_level +ffffffff81d27590 T trinity_dce_enable_voltage_adjustment +ffffffff81d276e0 T trinity_gfx_dynamic_mgpg_config +ffffffff81d277b0 T trinity_acquire_mutex +ffffffff81d27840 T trinity_release_mutex +ffffffff81d28000 T uvd_v1_0_get_rptr +ffffffff81d28040 T uvd_v1_0_get_wptr +ffffffff81d28080 T uvd_v1_0_set_wptr +ffffffff81d280c0 T uvd_v1_0_fence_emit +ffffffff81d284b0 T uvd_v1_0_resume +ffffffff81d28610 T uvd_v1_0_init +ffffffff81d28ba0 T uvd_v1_0_start +ffffffff81d29320 T uvd_v1_0_fini +ffffffff81d29490 T uvd_v1_0_stop +ffffffff81d29600 T uvd_v1_0_ring_test +ffffffff81d297d0 T uvd_v1_0_semaphore_emit +ffffffff81d29800 T uvd_v1_0_ib_execute +ffffffff81d299a0 T uvd_v1_0_ib_test +ffffffff81d2a000 T uvd_v2_2_fence_emit +ffffffff81d2a470 T uvd_v2_2_semaphore_emit +ffffffff81d2a680 T uvd_v2_2_resume +ffffffff81d2b000 T uvd_v3_1_semaphore_emit +ffffffff81d2c000 T uvd_v4_2_resume +ffffffff81d2d000 T vce_v1_0_get_rptr +ffffffff81d2d090 T vce_v1_0_get_wptr +ffffffff81d2d120 T vce_v1_0_set_wptr +ffffffff81d2d1b0 T vce_v1_0_enable_mgcg +ffffffff81d2d470 T vce_v1_0_load_fw +ffffffff81d2d640 T vce_v1_0_bo_size +ffffffff81d2d6b0 T vce_v1_0_resume +ffffffff81d2e020 T vce_v1_0_start +ffffffff81d2e7e0 T vce_v1_0_init +ffffffff81d2f000 T vce_v2_0_enable_mgcg +ffffffff81d2f070 t vce_v2_0_set_dyn_cg +ffffffff81d2f260 T vce_v2_0_bo_size +ffffffff81d2f2d0 T vce_v2_0_resume +ffffffff81d30000 T aldebaran_reset_init +ffffffff81d300c0 t aldebaran_async_reset +ffffffff81d30120 t aldebaran_get_reset_handler +ffffffff81d301d0 T aldebaran_reset_fini +ffffffff81d30230 t aldebaran_mode2_prepare_hwcontext +ffffffff81d30350 t aldebaran_mode2_perform_reset +ffffffff81d30520 t aldebaran_mode2_restore_hwcontext +ffffffff81d309e0 t aldebaran_mode2_reset +ffffffff81d31000 T aldebaran_reg_base_init +ffffffff81d32000 T amdgpu_acpi_is_pcie_performance_request_supported +ffffffff81d32040 T amdgpu_acpi_is_power_shift_control_supported +ffffffff81d32070 T amdgpu_acpi_pcie_notify_device_ready +ffffffff81d32190 t amdgpu_atcs_call +ffffffff81d32280 T amdgpu_acpi_pcie_performance_request +ffffffff81d324d0 T amdgpu_acpi_power_shift_control +ffffffff81d32580 T amdgpu_acpi_smart_shift_update +ffffffff81d326d0 T amdgpu_acpi_init +ffffffff81d32790 t amdgpu_acpi_event +ffffffff81d32ad0 T amdgpu_acpi_get_backlight_caps +ffffffff81d32b20 T amdgpu_acpi_fini +ffffffff81d32b40 T amdgpu_acpi_should_gpu_reset +ffffffff81d32b90 T amdgpu_acpi_detect +ffffffff81d34000 T amdgpu_afmt_acr +ffffffff81d35000 T amdgpu_amdkfd_init +ffffffff81d35040 T amdgpu_amdkfd_fini +ffffffff81d35070 T amdgpu_amdkfd_device_probe +ffffffff81d350a0 T amdgpu_amdkfd_device_init +ffffffff81d35270 t amdgpu_amdkfd_reset_work +ffffffff81d352f0 T amdgpu_amdkfd_device_fini_sw +ffffffff81d35340 T amdgpu_amdkfd_interrupt +ffffffff81d35370 T amdgpu_amdkfd_suspend +ffffffff81d353a0 T amdgpu_amdkfd_resume_iommu +ffffffff81d353d0 T amdgpu_amdkfd_resume +ffffffff81d35400 T amdgpu_amdkfd_pre_reset +ffffffff81d35430 T amdgpu_amdkfd_post_reset +ffffffff81d35460 T amdgpu_amdkfd_gpu_reset +ffffffff81d354c0 T amdgpu_amdkfd_alloc_gtt_mem +ffffffff81d35760 t amdgpu_bo_reserve +ffffffff81d358c0 t amdgpu_bo_unreserve +ffffffff81d359a0 T amdgpu_amdkfd_free_gtt_mem +ffffffff81d35a10 T amdgpu_amdkfd_alloc_gws +ffffffff81d35af0 T amdgpu_amdkfd_free_gws +ffffffff81d35b30 T amdgpu_amdkfd_get_fw_version +ffffffff81d35be0 T amdgpu_amdkfd_get_local_mem_info +ffffffff81d35cb0 T amdgpu_amdkfd_get_gpu_clock_counter +ffffffff81d35cf0 T amdgpu_amdkfd_get_max_engine_clock_in_mhz +ffffffff81d35d70 T amdgpu_amdkfd_get_cu_info +ffffffff81d35ec0 T amdgpu_amdkfd_get_dmabuf_info +ffffffff81d36000 T amdgpu_amdkfd_get_xgmi_hops_count +ffffffff81d36070 T amdgpu_amdkfd_get_xgmi_bandwidth_mbytes +ffffffff81d36100 T amdgpu_amdkfd_get_pcie_bandwidth_mbytes +ffffffff81d36270 T amdgpu_amdkfd_submit_ib +ffffffff81d363d0 T amdgpu_amdkfd_set_compute_idle +ffffffff81d36420 T amdgpu_amdkfd_is_kfd_vmid +ffffffff81d36460 T amdgpu_amdkfd_flush_gpu_tlb_vmid +ffffffff81d36500 T amdgpu_amdkfd_flush_gpu_tlb_pasid +ffffffff81d36530 T amdgpu_amdkfd_have_atomics_support +ffffffff81d36560 T amdgpu_amdkfd_ras_poison_consumption_handler +ffffffff81d365c0 T amdgpu_amdkfd_ras_query_utcl2_poison_status +ffffffff81d37000 T amdgpu_atom_execute_table +ffffffff81d370a0 t amdgpu_atom_execute_table_locked +ffffffff81d373f0 T amdgpu_atom_parse +ffffffff81d37940 T amdgpu_atom_destroy +ffffffff81d37980 T amdgpu_atom_asic_init +ffffffff81d37aa0 T amdgpu_atom_parse_data_header +ffffffff81d37b40 T amdgpu_atom_parse_cmd_header +ffffffff81d37bc0 t atom_op_move +ffffffff81d37da0 t atom_op_and +ffffffff81d37f80 t atom_op_or +ffffffff81d38160 t atom_op_shift_left +ffffffff81d38350 t atom_op_shift_right +ffffffff81d38540 t atom_op_mul +ffffffff81d38690 t atom_op_div +ffffffff81d38800 t atom_op_add +ffffffff81d389e0 t atom_op_sub +ffffffff81d38bc0 t atom_op_setport +ffffffff81d38d40 t atom_op_setregblock +ffffffff81d38e00 t atom_op_setfbbase +ffffffff81d38ed0 t atom_op_compare +ffffffff81d390c0 t atom_op_switch +ffffffff81d39310 t atom_op_jump +ffffffff81d39590 t atom_op_test +ffffffff81d39750 t atom_op_delay +ffffffff81d39830 t atom_op_calltable +ffffffff81d39980 t atom_op_repeat +ffffffff81d399b0 t atom_op_clear +ffffffff81d39ac0 t atom_op_nop +ffffffff81d39af0 t atom_op_eot +ffffffff81d39b20 t atom_op_mask +ffffffff81d39df0 t atom_op_postcard +ffffffff81d39ea0 t atom_op_beep +ffffffff81d39ec0 t atom_op_savereg +ffffffff81d39ef0 t atom_op_restorereg +ffffffff81d39f20 t atom_op_setdatablock +ffffffff81d3a060 t atom_op_xor +ffffffff81d3a240 t atom_op_shl +ffffffff81d3a460 t atom_op_shr +ffffffff81d3a680 t atom_op_debug +ffffffff81d3a730 t atom_op_processds +ffffffff81d3a7f0 t atom_op_mul32 +ffffffff81d3a950 t atom_op_div32 +ffffffff81d3aae0 t atom_put_dst +ffffffff81d3afb0 t atom_get_src_int +ffffffff81d3b660 t atom_iio_execute +ffffffff81d3c000 T amdgpu_atombios_lookup_i2c_gpio +ffffffff81d3c260 T amdgpu_atombios_i2c_init +ffffffff81d3c540 T amdgpu_atombios_lookup_gpio +ffffffff81d3c640 T amdgpu_atombios_has_dce_engine_info +ffffffff81d3c6c0 T amdgpu_atombios_get_connector_info_from_object_table +ffffffff81d3cf10 T amdgpu_atombios_get_clock_info +ffffffff81d3d250 T amdgpu_atombios_get_gfx_info +ffffffff81d3d310 T amdgpu_atombios_get_vram_width +ffffffff81d3d3a0 T amdgpu_atombios_get_asic_ss_info +ffffffff81d3d710 T amdgpu_atombios_get_clock_dividers +ffffffff81d3d930 T amdgpu_atombios_has_gpu_virtualization_table +ffffffff81d3d980 T amdgpu_atombios_scratch_regs_lock +ffffffff81d3d9e0 T amdgpu_atombios_scratch_regs_engine_hung +ffffffff81d3da30 T amdgpu_atombios_scratch_regs_set_backlight_level +ffffffff81d3da90 T amdgpu_atombios_scratch_need_asic_init +ffffffff81d3dae0 T amdgpu_atombios_copy_swap +ffffffff81d3db00 T amdgpu_atombios_fini +ffffffff81d3dba0 T amdgpu_atombios_init +ffffffff81d3de40 t cail_reg_read +ffffffff81d3de60 t cail_reg_write +ffffffff81d3de80 t cail_mc_read +ffffffff81d3deb0 t cail_mc_write +ffffffff81d3dee0 t cail_pll_read +ffffffff81d3df10 t cail_pll_write +ffffffff81d3df40 T amdgpu_atombios_get_data_table +ffffffff81d3e000 T amdgpu_atombios_crtc_overscan_setup +ffffffff81d3e150 T amdgpu_atombios_crtc_scaler_setup +ffffffff81d3e1d0 T amdgpu_atombios_crtc_lock +ffffffff81d3e230 T amdgpu_atombios_crtc_enable +ffffffff81d3e290 T amdgpu_atombios_crtc_blank +ffffffff81d3e2f0 T amdgpu_atombios_crtc_powergate +ffffffff81d3e360 T amdgpu_atombios_crtc_powergate_init +ffffffff81d3e3d0 T amdgpu_atombios_crtc_set_dtd_timing +ffffffff81d3e4e0 T amdgpu_atombios_crtc_set_disp_eng_pll +ffffffff81d3e5d0 T amdgpu_atombios_crtc_set_dce_clock +ffffffff81d3e6c0 T amdgpu_atombios_crtc_program_pll +ffffffff81d3e9d0 T amdgpu_atombios_crtc_prepare_pll +ffffffff81d3eed0 T amdgpu_atombios_crtc_set_pll +ffffffff81d40000 T amdgpu_atombios_dp_aux_init +ffffffff81d40090 t amdgpu_atombios_dp_aux_transfer +ffffffff81d40200 T amdgpu_atombios_dp_get_sinktype +ffffffff81d40270 T amdgpu_atombios_dp_get_dpcd +ffffffff81d40420 T amdgpu_atombios_dp_get_panel_mode +ffffffff81d40510 T amdgpu_atombios_dp_set_link_config +ffffffff81d40590 t amdgpu_atombios_dp_get_dp_link_config +ffffffff81d40710 T amdgpu_atombios_dp_mode_valid_helper +ffffffff81d40790 T amdgpu_atombios_dp_needs_link_train +ffffffff81d40800 T amdgpu_atombios_dp_set_rx_power_state +ffffffff81d40880 T amdgpu_atombios_dp_link_train +ffffffff81d40dd0 t amdgpu_atombios_dp_process_aux_ch +ffffffff81d40f40 t amdgpu_atombios_dp_get_adjust_train +ffffffff81d42000 T amdgpu_atombios_encoder_get_backlight_level_from_reg +ffffffff81d42050 T amdgpu_atombios_encoder_set_backlight_level_to_reg +ffffffff81d420a0 T amdgpu_atombios_encoder_get_backlight_level +ffffffff81d42100 T amdgpu_atombios_encoder_set_backlight_level +ffffffff81d42210 T amdgpu_atombios_encoder_setup_dig_transmitter +ffffffff81d42be0 T amdgpu_atombios_encoder_init_backlight +ffffffff81d42d80 t amdgpu_atombios_encoder_get_backlight_brightness +ffffffff81d42de0 T amdgpu_atombios_encoder_fini_backlight +ffffffff81d42e70 T amdgpu_atombios_encoder_is_digital +ffffffff81d42ec0 T amdgpu_atombios_encoder_mode_fixup +ffffffff81d42fa0 T amdgpu_atombios_encoder_get_encoder_mode +ffffffff81d43140 T amdgpu_atombios_encoder_setup_dig_encoder +ffffffff81d43600 T amdgpu_atombios_encoder_set_edp_panel_power +ffffffff81d43700 T amdgpu_atombios_encoder_dpms +ffffffff81d43870 t amdgpu_atombios_encoder_setup_dig +ffffffff81d43be0 t amdgpu_atombios_encoder_setup_dvo +ffffffff81d43d80 T amdgpu_atombios_encoder_set_crtc_source +ffffffff81d44160 T amdgpu_atombios_encoder_init_dig +ffffffff81d44230 t amdgpu_atombios_encoder_setup_external_encoder +ffffffff81d44490 T amdgpu_atombios_encoder_dac_detect +ffffffff81d44670 T amdgpu_atombios_encoder_dig_detect +ffffffff81d44770 T amdgpu_atombios_encoder_setup_ext_encoder_ddc +ffffffff81d447c0 T amdgpu_atombios_encoder_set_bios_scratch_regs +ffffffff81d44d60 T amdgpu_atombios_encoder_get_lcd_info +ffffffff81d450c0 T amdgpu_atombios_encoder_get_dig_info +ffffffff81d45130 t amdgpu_atombios_encoder_update_backlight_status +ffffffff81d46000 T amdgpu_atombios_i2c_xfer +ffffffff81d463b0 T amdgpu_atombios_i2c_func +ffffffff81d463e0 T amdgpu_atombios_i2c_channel_trans +ffffffff81d47000 T amdgpu_atomfirmware_query_firmware_capability +ffffffff81d47090 T amdgpu_atomfirmware_gpu_virtualization_supported +ffffffff81d470c0 T amdgpu_atomfirmware_scratch_regs_init +ffffffff81d47140 T amdgpu_atomfirmware_allocate_fb_scratch +ffffffff81d47330 T amdgpu_atomfirmware_get_vram_info +ffffffff81d47a90 T amdgpu_atomfirmware_mem_ecc_supported +ffffffff81d47b40 T amdgpu_atomfirmware_sram_ecc_supported +ffffffff81d47b70 T amdgpu_atomfirmware_dynamic_boot_config_supported +ffffffff81d47ba0 T amdgpu_atomfirmware_ras_rom_addr +ffffffff81d47c40 T amdgpu_atomfirmware_get_clock_info +ffffffff81d47e60 T amdgpu_atomfirmware_get_gfx_info +ffffffff81d48000 T amdgpu_atomfirmware_mem_training_supported +ffffffff81d48040 T amdgpu_atomfirmware_get_fw_reserved_fb_size +ffffffff81d480d0 T amdgpu_atomfirmware_asic_init +ffffffff81d49000 T amdgpu_benchmark +ffffffff81d497a0 t amdgpu_benchmark_move +ffffffff81d4a000 T amdgpu_read_bios +ffffffff81d4a190 t check_atom_bios +ffffffff81d4a2a0 T amdgpu_get_bios +ffffffff81d4a840 t igp_read_bios_from_vram +ffffffff81d4a980 T amdgpu_soc15_read_bios_from_rom +ffffffff81d4b000 T amdgpu_bo_list_create +ffffffff81d4b290 T amdgpu_bo_list_get +ffffffff81d4b2f0 T amdgpu_bo_list_get_list +ffffffff81d4b450 T amdgpu_bo_list_put +ffffffff81d4b500 T amdgpu_bo_create_list_entry_array +ffffffff81d4b650 T amdgpu_bo_list_ioctl +ffffffff81d4c000 T amdgpu_cgs_create_device +ffffffff81d4c080 T amdgpu_cgs_destroy_device +ffffffff81d4c0a0 t amdgpu_cgs_read_register +ffffffff81d4c0c0 t amdgpu_cgs_write_register +ffffffff81d4c0e0 t amdgpu_cgs_read_ind_register +ffffffff81d4c1c0 t amdgpu_cgs_write_ind_register +ffffffff81d4c270 t amdgpu_cgs_get_firmware_info +ffffffff81d4d000 T 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amdgpu_xgmi_get_num_links +ffffffff81dc62d0 T amdgpu_xgmi_add_device +ffffffff81dc64f0 T amdgpu_xgmi_remove_device +ffffffff81dc6640 T amdgpu_xgmi_get_relative_phy_addr +ffffffff81dc6680 t amdgpu_ras_error_inject_xgmi +ffffffff81dc67f0 t amdgpu_xgmi_query_ras_error_count +ffffffff81dc7010 t amdgpu_xgmi_reset_ras_error_count +ffffffff81dc7330 t amdgpu_xgmi_ras_late_init +ffffffff81dc8000 T arct_reg_base_init +ffffffff81dc9000 T athub_v1_0_set_clockgating +ffffffff81dc9210 T athub_v1_0_get_clockgating +ffffffff81dca000 T athub_v2_0_set_clockgating +ffffffff81dca1e0 T athub_v2_0_get_clockgating +ffffffff81dcb000 T athub_v2_1_set_clockgating +ffffffff81dcb1f0 T athub_v2_1_get_clockgating +ffffffff81dcc000 T athub_v3_0_set_clockgating +ffffffff81dcc0d0 T athub_v3_0_get_clockgating +ffffffff81dcc120 t athub_v3_0_get_cg_cntl +ffffffff81dcc1c0 t athub_v3_0_set_cg_cntl +ffffffff81dcd000 t cz_ih_early_init +ffffffff81dcd050 t cz_ih_sw_init +ffffffff81dcd0b0 t cz_ih_sw_fini +ffffffff81dcd0f0 t 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dce_v11_0_set_hpd_irq_state +ffffffff81dd7f40 t dce_v11_0_hpd_irq +ffffffff81dd8060 t dce_v11_0_crtc_cursor_set2 +ffffffff81dd83d0 t dce_v11_0_crtc_cursor_move +ffffffff81dd84b0 t dce_v11_0_crtc_gamma_set +ffffffff81dd84f0 t dce_v11_0_crtc_destroy +ffffffff81dd8520 t amdgpu_bo_reserve +ffffffff81dd8710 t amdgpu_bo_unreserve +ffffffff81dd87f0 t dce_v11_0_cursor_move_locked +ffffffff81dd8940 t dce_v11_0_crtc_load_lut +ffffffff81dd8cb0 t dce_v11_0_crtc_dpms +ffffffff81dd8e80 t dce_v11_0_crtc_prepare +ffffffff81dd8ec0 t dce_v11_0_crtc_commit +ffffffff81dd8ef0 t dce_v11_0_crtc_mode_fixup +ffffffff81dd9160 t dce_v11_0_crtc_mode_set +ffffffff81dd93c0 t dce_v11_0_crtc_set_base +ffffffff81dd93e0 t dce_v11_0_crtc_set_base_atomic +ffffffff81dd9400 t dce_v11_0_crtc_disable +ffffffff81dd95a0 t dce_v11_0_crtc_do_set_base +ffffffff81dda000 t df_v1_7_sw_init +ffffffff81dda040 t df_v1_7_sw_fini +ffffffff81dda070 t df_v1_7_enable_broadcast_mode +ffffffff81dda190 t df_v1_7_get_fb_channel_number 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gfx_v10_0_late_init +ffffffff81ddf490 t gfx_v10_0_sw_init +ffffffff81de0830 t gfx_v10_0_sw_fini +ffffffff81de0b70 t gfx_v10_0_hw_init +ffffffff81de3710 t gfx_v10_0_hw_fini +ffffffff81de3a00 t gfx_v10_0_suspend +ffffffff81de3a40 t gfx_v10_0_resume +ffffffff81de3a50 t gfx_v10_0_is_idle +ffffffff81de3ae0 t gfx_v10_0_wait_for_idle +ffffffff81de3bc0 t gfx_v10_0_soft_reset +ffffffff81de3f10 t gfx_v10_0_set_clockgating_state +ffffffff81de41b0 t gfx_v10_0_set_powergating_state +ffffffff81de4270 t gfx_v10_0_get_clockgating_state +ffffffff81de4380 t gfx10_kiq_set_resources +ffffffff81de46b0 t gfx10_kiq_map_queues +ffffffff81de4a40 t gfx10_kiq_unmap_queues +ffffffff81de4e40 t gfx10_kiq_query_status +ffffffff81de5140 t gfx10_kiq_invalidate_tlbs +ffffffff81de5260 t gfx_v10_0_ring_get_rptr_compute +ffffffff81de5290 t gfx_v10_0_ring_get_wptr_compute +ffffffff81de5300 t gfx_v10_0_ring_set_wptr_compute +ffffffff81de5440 t gfx_v10_0_ring_emit_ib_compute +ffffffff81de5790 t gfx_v10_0_ring_emit_fence_kiq +ffffffff81de5be0 t gfx_v10_0_ring_test_ring +ffffffff81de5e50 t gfx_v10_0_ring_test_ib +ffffffff81de6100 t gfx_v10_0_ring_emit_rreg +ffffffff81de63a0 t gfx_v10_0_ring_emit_wreg +ffffffff81de65e0 t gfx_v10_0_ring_emit_reg_wait +ffffffff81de6630 t gfx_v10_0_ring_emit_reg_write_reg_wait +ffffffff81de66c0 t gfx_v10_0_wait_reg_mem +ffffffff81de69f0 t gfx_v10_0_ring_get_rptr_gfx +ffffffff81de6a20 t gfx_v10_0_ring_get_wptr_gfx +ffffffff81de6b30 t gfx_v10_0_ring_set_wptr_gfx +ffffffff81de6d40 t gfx_v10_0_ring_emit_ib_gfx +ffffffff81de73f0 t gfx_v10_0_ring_emit_fence +ffffffff81de77c0 t gfx_v10_0_ring_emit_pipeline_sync +ffffffff81de7820 t gfx_v10_0_ring_emit_vm_flush +ffffffff81de79f0 t gfx_v10_0_ring_emit_hdp_flush +ffffffff81de7ac0 t gfx_v10_0_ring_emit_gds_switch +ffffffff81de7ba0 t gfx_v10_0_ring_emit_init_cond_exec +ffffffff81de7dd0 t gfx_v10_0_ring_emit_patch_cond_exec +ffffffff81de7e90 t gfx_v10_0_ring_emit_sb +ffffffff81de7f80 t gfx_v10_0_ring_emit_cntxcntl +ffffffff81de8470 t gfx_v10_0_ring_emit_frame_cntl +ffffffff81de8580 t gfx_v10_0_ring_soft_recovery +ffffffff81de85f0 t gfx_v10_0_ring_preempt_ib +ffffffff81de8760 t gfx_v10_0_emit_mem_sync +ffffffff81de8aa0 t gfx_v10_0_write_data_to_reg +ffffffff81de8cb0 t gfx_v10_0_set_eop_interrupt_state +ffffffff81de8d90 t gfx_v10_0_eop_irq +ffffffff81de8f60 t gfx_v10_0_set_gfx_eop_interrupt_state +ffffffff81de90f0 t gfx_v10_0_set_compute_eop_interrupt_state +ffffffff81de92a0 t gfx_v10_0_kiq_set_interrupt_state +ffffffff81de9580 t gfx_v10_0_kiq_irq +ffffffff81de9600 t gfx_v10_0_set_priv_reg_fault_state +ffffffff81de9720 t gfx_v10_0_priv_reg_irq +ffffffff81de9780 t gfx_v10_0_handle_priv_fault +ffffffff81de9910 t gfx_v10_0_set_priv_inst_fault_state +ffffffff81de9a30 t gfx_v10_0_priv_inst_irq +ffffffff81de9a90 t gfx_v10_0_is_rlc_enabled +ffffffff81de9b10 t gfx_v10_0_set_safe_mode +ffffffff81de9db0 t gfx_v10_0_unset_safe_mode +ffffffff81de9e60 t gfx_v10_0_rlc_init +ffffffff81de9ee0 t gfx_v10_0_get_csb_size +ffffffff81de9f40 t gfx_v10_0_get_csb_buffer +ffffffff81dea0c0 t gfx_v10_0_rlc_resume +ffffffff81deabc0 t gfx_v10_0_rlc_stop +ffffffff81deaca0 t gfx_v10_0_rlc_reset +ffffffff81deae40 t gfx_v10_0_rlc_start +ffffffff81deafe0 t gfx_v10_0_update_spm_vmid +ffffffff81deb110 t gfx_v10_0_wait_for_rlc_autoload_complete +ffffffff81debc80 t gfx_v10_0_init_csb +ffffffff81debf50 t gfx_v10_0_is_rlcg_access_range +ffffffff81debf80 t gfx_v10_0_gfx_mqd_init +ffffffff81dec360 t gfx_v10_0_compute_mqd_init +ffffffff81dec800 t amdgpu_bo_unreserve +ffffffff81dec8e0 t gfx_v10_0_get_gpu_clock_counter +ffffffff81decde0 t gfx_v10_0_select_se_sh +ffffffff81dece80 t gfx_v10_0_read_wave_data +ffffffff81ded0e0 t gfx_v10_0_read_wave_vgprs +ffffffff81ded110 t gfx_v10_0_read_wave_sgprs +ffffffff81ded190 t gfx_v10_0_select_me_pipe_q +ffffffff81ded1b0 t gfx_v10_0_init_spm_golden_registers +ffffffff81ded220 t gfx_v10_0_update_perfmon_mgcg +ffffffff81ded340 t wave_read_ind +ffffffff81ded420 t wave_read_regs +ffffffff81ded580 t gfx_v10_0_cp_resume +ffffffff81df01c0 t gfx_v10_3_get_disabled_sa +ffffffff81df02d0 t gfx_v10_0_get_rb_active_bitmap +ffffffff81df03f0 t gfx_v10_0_get_wgp_active_bitmap_per_sh +ffffffff81df0500 t gfx_v10_0_enable_gui_idle_interrupt +ffffffff81df0610 t gfx_v10_0_cp_gfx_enable +ffffffff81df0850 t gfx_v10_0_cp_compute_enable +ffffffff81df09e0 t amdgpu_bo_reserve +ffffffff81df0b50 t gfx_v10_0_kiq_init_register +ffffffff81df19c0 t gfx_v10_0_cp_gfx_switch_pipe +ffffffff81df1ac0 t gfx_v10_0_cp_gfx_set_doorbell +ffffffff81df1d90 t gfx_v10_0_cp_gfx_start +ffffffff81df2770 t gfx_v10_0_update_fine_grain_clock_gating +ffffffff81df2a90 t gfx_v10_0_update_medium_grain_clock_gating +ffffffff81df31b0 t gfx_v10_0_update_3d_clock_gating +ffffffff81df3570 t gfx_v10_0_update_coarse_grain_clock_gating +ffffffff81df3930 t gfx_v10_cntl_pg +ffffffff81df4000 t gfx_v11_0_early_init +ffffffff81df43a0 t gfx_v11_0_late_init +ffffffff81df4410 t gfx_v11_0_sw_init +ffffffff81df5350 t gfx_v11_0_sw_fini +ffffffff81df5630 t gfx_v11_0_hw_init +ffffffff81df9a80 t gfx_v11_0_hw_fini +ffffffff81df9d00 t gfx_v11_0_suspend +ffffffff81df9d40 t gfx_v11_0_resume +ffffffff81df9d50 t gfx_v11_0_is_idle +ffffffff81df9de0 t gfx_v11_0_wait_for_idle +ffffffff81df9ec0 t gfx_v11_0_check_soft_reset +ffffffff81df9ff0 t gfx_v11_0_soft_reset +ffffffff81dfacd0 t gfx_v11_0_post_soft_reset +ffffffff81dface0 t gfx_v11_0_set_clockgating_state +ffffffff81dfb8c0 t gfx_v11_0_set_powergating_state +ffffffff81dfb960 t gfx_v11_0_get_clockgating_state +ffffffff81dfbb30 t gfx11_kiq_set_resources +ffffffff81dfbe60 t gfx11_kiq_map_queues +ffffffff81dfc1f0 t gfx11_kiq_unmap_queues +ffffffff81dfc5f0 t gfx11_kiq_query_status +ffffffff81dfc8f0 t gfx11_kiq_invalidate_tlbs +ffffffff81dfca10 t gfx_v11_0_ring_get_rptr_compute +ffffffff81dfca40 t gfx_v11_0_ring_get_wptr_compute +ffffffff81dfcab0 t gfx_v11_0_ring_set_wptr_compute +ffffffff81dfcbf0 t gfx_v11_0_ring_emit_ib_compute +ffffffff81dfcf40 t gfx_v11_0_ring_emit_fence_kiq +ffffffff81dfd380 t gfx_v11_0_ring_test_ring +ffffffff81dfd610 t gfx_v11_0_ring_test_ib +ffffffff81dfd8d0 t gfx_v11_0_ring_emit_rreg +ffffffff81dfdb70 t gfx_v11_0_ring_emit_wreg +ffffffff81dfddb0 t gfx_v11_0_ring_emit_reg_wait +ffffffff81dfde00 t gfx_v11_0_ring_emit_reg_write_reg_wait +ffffffff81dfde70 t gfx_v11_0_wait_reg_mem +ffffffff81dfe1a0 t gfx_v11_0_ring_get_rptr_gfx +ffffffff81dfe1d0 t gfx_v11_0_ring_get_wptr_gfx +ffffffff81dfe2e0 t gfx_v11_0_ring_set_wptr_gfx +ffffffff81dfe4f0 t gfx_v11_0_ring_emit_ib_gfx +ffffffff81dfeb90 t gfx_v11_0_ring_emit_fence +ffffffff81dfef60 t gfx_v11_0_ring_emit_pipeline_sync +ffffffff81dfefc0 t gfx_v11_0_ring_emit_vm_flush +ffffffff81dff190 t gfx_v11_0_ring_emit_hdp_flush +ffffffff81dff260 t gfx_v11_0_ring_emit_gds_switch +ffffffff81dff340 t gfx_v11_0_ring_emit_init_cond_exec +ffffffff81dff570 t gfx_v11_0_ring_emit_patch_cond_exec +ffffffff81dff630 t gfx_v11_0_ring_emit_cntxcntl +ffffffff81dff790 t gfx_v11_0_ring_emit_frame_cntl +ffffffff81dff8a0 t gfx_v11_0_ring_soft_recovery +ffffffff81dff910 t gfx_v11_0_ring_preempt_ib +ffffffff81dffa80 t gfx_v11_0_emit_mem_sync +ffffffff81dffdc0 t gfx_v11_0_write_data_to_reg +ffffffff81dfffd0 t gfx_v11_0_set_eop_interrupt_state +ffffffff81e00060 t gfx_v11_0_eop_irq +ffffffff81e00230 t gfx_v11_0_set_gfx_eop_interrupt_state +ffffffff81e003c0 t gfx_v11_0_set_compute_eop_interrupt_state +ffffffff81e00550 t gfx_v11_0_set_priv_reg_fault_state +ffffffff81e00670 t gfx_v11_0_priv_reg_irq +ffffffff81e006d0 t gfx_v11_0_handle_priv_fault +ffffffff81e00860 t gfx_v11_0_set_priv_inst_fault_state +ffffffff81e00980 t gfx_v11_0_priv_inst_irq +ffffffff81e009e0 t gfx_v11_0_is_rlc_enabled +ffffffff81e00a60 t gfx_v11_0_set_safe_mode +ffffffff81e00bb0 t gfx_v11_0_unset_safe_mode +ffffffff81e00c20 t gfx_v11_0_rlc_init +ffffffff81e00ca0 t gfx_v11_0_get_csb_size +ffffffff81e00d00 t gfx_v11_0_get_csb_buffer +ffffffff81e00e80 t gfx_v11_0_rlc_resume +ffffffff81e01ba0 t gfx_v11_0_rlc_stop +ffffffff81e01c80 t gfx_v11_0_rlc_reset +ffffffff81e01e20 t gfx_v11_0_rlc_start +ffffffff81e01fc0 t gfx_v11_0_update_spm_vmid +ffffffff81e020c0 t gfx_v11_0_init_csb +ffffffff81e02240 t gfx_v11_0_gfx_mqd_init +ffffffff81e02610 t gfx_v11_0_compute_mqd_init +ffffffff81e02b30 t amdgpu_bo_unreserve +ffffffff81e02c10 t gfx_v11_0_get_gpu_clock_counter +ffffffff81e02f70 t gfx_v11_0_select_se_sh +ffffffff81e03010 t gfx_v11_0_read_wave_data +ffffffff81e03250 t gfx_v11_0_read_wave_vgprs +ffffffff81e03280 t gfx_v11_0_read_wave_sgprs +ffffffff81e03300 t gfx_v11_0_select_me_pipe_q +ffffffff81e03320 t gfx_v11_0_update_perf_clk +ffffffff81e03450 t wave_read_ind +ffffffff81e03530 t wave_read_regs +ffffffff81e03690 t gfx_v11_0_disable_gpa_mode +ffffffff81e03820 t gfx_v11_0_cp_resume +ffffffff81e078a0 t gfx_v11_0_config_me_cache +ffffffff81e07c40 t gfx_v11_0_config_pfp_cache +ffffffff81e07fe0 t gfx_v11_0_config_mec_cache +ffffffff81e08380 t gfx_v11_0_enable_gui_idle_interrupt +ffffffff81e08490 t gfx_v11_0_cp_compute_enable +ffffffff81e08660 t gfx_v11_0_cp_gfx_enable +ffffffff81e08850 t amdgpu_bo_reserve +ffffffff81e089c0 t gfx_v11_0_kiq_init_register +ffffffff81e09830 t gfx_v11_0_cp_gfx_switch_pipe +ffffffff81e09910 t gfx_v11_0_cp_gfx_set_doorbell +ffffffff81e09af0 t gfx_v11_0_cp_gfx_start +ffffffff81e0a3b0 t gfx_v11_cntl_pg +ffffffff81e0b000 t gfx_v8_0_early_init +ffffffff81e0b320 t gfx_v8_0_late_init +ffffffff81e0ba20 t gfx_v8_0_sw_init +ffffffff81e0d0f0 t gfx_v8_0_sw_fini +ffffffff81e0d3b0 t gfx_v8_0_hw_init +ffffffff81e0f5d0 t gfx_v8_0_hw_fini +ffffffff81e0fac0 t gfx_v8_0_suspend +ffffffff81e0fb00 t gfx_v8_0_resume +ffffffff81e0fb10 t gfx_v8_0_is_idle +ffffffff81e0fb80 t gfx_v8_0_wait_for_idle +ffffffff81e0fc30 t gfx_v8_0_check_soft_reset +ffffffff81e0fd10 t gfx_v8_0_pre_soft_reset +ffffffff81e0fe90 t gfx_v8_0_soft_reset +ffffffff81e10050 t gfx_v8_0_post_soft_reset +ffffffff81e10210 t gfx_v8_0_set_clockgating_state +ffffffff81e104d0 t gfx_v8_0_set_powergating_state +ffffffff81e10890 t gfx_v8_0_get_clockgating_state +ffffffff81e10970 t gfx_v8_0_get_gpu_clock_counter +ffffffff81e10a10 t gfx_v8_0_select_se_sh +ffffffff81e10a70 t gfx_v8_0_read_wave_data +ffffffff81e10f10 t gfx_v8_0_read_wave_sgprs +ffffffff81e10fc0 t gfx_v8_0_select_me_pipe_q +ffffffff81e10fe0 t gfx_v8_0_ring_get_rptr +ffffffff81e11010 t gfx_v8_0_ring_get_wptr_compute +ffffffff81e11040 t gfx_v8_0_ring_set_wptr_compute +ffffffff81e11080 t gfx_v8_0_ring_emit_fence_kiq +ffffffff81e114b0 t gfx_v8_0_ring_test_ring +ffffffff81e116b0 t gfx_v8_0_ring_emit_rreg +ffffffff81e11950 t gfx_v8_0_ring_emit_wreg +ffffffff81e11b90 t gfx_v8_0_ring_get_wptr_gfx +ffffffff81e11bf0 t gfx_v8_0_ring_set_wptr_gfx +ffffffff81e11c60 t gfx_v8_0_ring_emit_ib_gfx +ffffffff81e121c0 t gfx_v8_0_ring_emit_fence_gfx +ffffffff81e126c0 t gfx_v8_0_ring_emit_pipeline_sync +ffffffff81e129b0 t gfx_v8_0_ring_emit_vm_flush +ffffffff81e12d60 t gfx_v8_0_ring_emit_hdp_flush +ffffffff81e13080 t gfx_v8_0_ring_emit_gds_switch +ffffffff81e13850 t gfx_v8_0_ring_test_ib +ffffffff81e13a00 t gfx_v8_0_ring_emit_init_cond_exec +ffffffff81e13c30 t gfx_v8_0_ring_emit_patch_cond_exec +ffffffff81e13ce0 t gfx_v8_ring_emit_sb +ffffffff81e13dd0 t gfx_v8_ring_emit_cntxcntl +ffffffff81e14370 t gfx_v8_0_ring_soft_recovery +ffffffff81e143a0 t gfx_v8_0_emit_mem_sync +ffffffff81e145b0 t gfx_v8_0_ring_emit_ib_compute +ffffffff81e148c0 t gfx_v8_0_ring_emit_fence_compute +ffffffff81e14bc0 t gfx_v8_0_emit_mem_sync_compute +ffffffff81e14e80 t gfx_v8_0_emit_wave_limit +ffffffff81e15030 t gfx_v8_0_set_eop_interrupt_state +ffffffff81e15240 t gfx_v8_0_eop_irq +ffffffff81e15370 t gfx_v8_0_set_priv_reg_fault_state +ffffffff81e153f0 t gfx_v8_0_priv_reg_irq +ffffffff81e15510 t gfx_v8_0_set_priv_inst_fault_state +ffffffff81e15590 t gfx_v8_0_priv_inst_irq +ffffffff81e156b0 t gfx_v8_0_set_cp_ecc_int_state +ffffffff81e15920 t gfx_v8_0_cp_ecc_error_irq +ffffffff81e15970 t gfx_v8_0_set_sq_int_state +ffffffff81e15a00 t gfx_v8_0_sq_irq +ffffffff81e15aa0 t gfx_v8_0_parse_sq_irq +ffffffff81e15cf0 t gfx_v8_0_is_rlc_enabled +ffffffff81e15d30 t gfx_v8_0_set_safe_mode +ffffffff81e15e30 t gfx_v8_0_unset_safe_mode +ffffffff81e15ed0 t gfx_v8_0_rlc_init +ffffffff81e15f80 t gfx_v8_0_get_csb_size +ffffffff81e15fe0 t gfx_v8_0_get_csb_buffer +ffffffff81e16160 t gfx_v8_0_cp_jump_table_num +ffffffff81e161a0 t gfx_v8_0_rlc_resume +ffffffff81e16530 t gfx_v8_0_rlc_stop +ffffffff81e165a0 t gfx_v8_0_rlc_reset +ffffffff81e16620 t gfx_v8_0_rlc_start +ffffffff81e166a0 t gfx_v8_0_update_spm_vmid +ffffffff81e16710 t gfx_v8_0_init_save_restore_list +ffffffff81e16b30 t gfx_v8_0_wait_for_rlc_serdes +ffffffff81e16d50 t gfx_v8_0_sq_irq_work_func +ffffffff81e16d70 t amdgpu_bo_unreserve +ffffffff81e16e50 t gfx_v8_0_kiq_resume +ffffffff81e170b0 t gfx_v8_0_cp_gfx_resume +ffffffff81e17bd0 t gfx_v8_0_kcq_resume +ffffffff81e18600 t amdgpu_bo_reserve +ffffffff81e18770 t gfx_v8_0_mqd_commit +ffffffff81e18950 t gfx_v8_0_mqd_init +ffffffff81e18d70 t gfx_v8_0_deactivate_hqd +ffffffff81e18e30 t gfx_v8_0_update_medium_grain_clock_gating +ffffffff81e19160 t gfx_v8_0_update_coarse_grain_clock_gating +ffffffff81e1a000 t gfx_v9_0_ras_error_inject +ffffffff81e1a1a0 t gfx_v9_0_query_ras_error_count +ffffffff81e1ad40 t gfx_v9_0_reset_ras_error_count +ffffffff81e1b780 T gfx_v9_0_select_se_sh +ffffffff81e1b820 t gfx_v9_0_early_init +ffffffff81e1bc80 t gfx_v9_0_late_init +ffffffff81e1c990 t gfx_v9_0_sw_init +ffffffff81e1dfe0 t gfx_v9_0_sw_fini +ffffffff81e1e290 t gfx_v9_0_hw_init +ffffffff81e21340 t gfx_v9_0_hw_fini +ffffffff81e21ab0 t gfx_v9_0_suspend +ffffffff81e21af0 t gfx_v9_0_resume +ffffffff81e21b00 t gfx_v9_0_is_idle +ffffffff81e21b80 t gfx_v9_0_wait_for_idle +ffffffff81e21c60 t gfx_v9_0_soft_reset +ffffffff81e21ff0 t gfx_v9_0_set_clockgating_state +ffffffff81e220c0 t gfx_v9_0_set_powergating_state +ffffffff81e224c0 t gfx_v9_0_get_clockgating_state +ffffffff81e225d0 t gfx_v9_0_kiq_set_resources +ffffffff81e22900 t gfx_v9_0_kiq_map_queues +ffffffff81e22c40 t gfx_v9_0_kiq_unmap_queues +ffffffff81e22fc0 t gfx_v9_0_kiq_query_status +ffffffff81e232c0 t gfx_v9_0_kiq_invalidate_tlbs +ffffffff81e233e0 t gfx_v9_0_ring_get_rptr_compute +ffffffff81e23410 t gfx_v9_0_ring_get_wptr_compute +ffffffff81e23480 t gfx_v9_0_ring_set_wptr_compute +ffffffff81e234e0 t gfx_v9_0_ring_emit_fence_kiq +ffffffff81e23920 t gfx_v9_0_ring_test_ring +ffffffff81e23b50 t gfx_v9_0_ring_emit_rreg +ffffffff81e23df0 t gfx_v9_0_ring_emit_wreg +ffffffff81e24030 t gfx_v9_0_ring_emit_reg_wait +ffffffff81e24080 t gfx_v9_0_ring_emit_reg_write_reg_wait +ffffffff81e24120 t gfx_v9_0_wait_reg_mem +ffffffff81e24450 t gfx_v9_0_ring_get_rptr_gfx +ffffffff81e24480 t gfx_v9_0_ring_get_wptr_gfx +ffffffff81e24590 t gfx_v9_0_ring_set_wptr_gfx +ffffffff81e246c0 t gfx_v9_0_ring_emit_ib_gfx +ffffffff81e24be0 t gfx_v9_0_ring_emit_fence +ffffffff81e24fa0 t gfx_v9_0_ring_emit_pipeline_sync +ffffffff81e25000 t gfx_v9_0_ring_emit_vm_flush +ffffffff81e25110 t gfx_v9_0_ring_emit_hdp_flush +ffffffff81e251e0 t gfx_v9_0_ring_emit_gds_switch +ffffffff81e252c0 t gfx_v9_0_ring_test_ib +ffffffff81e25470 t gfx_v9_0_ring_emit_init_cond_exec +ffffffff81e256a0 t gfx_v9_0_ring_emit_patch_cond_exec +ffffffff81e25770 t gfx_v9_ring_emit_sb +ffffffff81e25860 t gfx_v9_ring_emit_cntxcntl +ffffffff81e25c60 t gfx_v9_0_ring_emit_frame_cntl +ffffffff81e25d70 t gfx_v9_0_ring_soft_recovery +ffffffff81e25de0 t gfx_v9_0_emit_mem_sync +ffffffff81e260a0 t gfx_v9_0_write_data_to_reg +ffffffff81e262b0 t gfx_v9_0_ring_emit_ib_compute +ffffffff81e265e0 t gfx_v9_0_emit_wave_limit +ffffffff81e267b0 t gfx_v9_0_set_eop_interrupt_state +ffffffff81e26980 t gfx_v9_0_eop_irq +ffffffff81e26ab0 t gfx_v9_0_set_compute_eop_interrupt_state +ffffffff81e26c60 t gfx_v9_0_set_priv_reg_fault_state +ffffffff81e26d80 t gfx_v9_0_priv_reg_irq +ffffffff81e26ea0 t gfx_v9_0_set_priv_inst_fault_state +ffffffff81e26fc0 t gfx_v9_0_priv_inst_irq +ffffffff81e270e0 t gfx_v9_0_set_cp_ecc_error_state +ffffffff81e27910 t gfx_v9_0_is_rlc_enabled +ffffffff81e27990 t gfx_v9_0_set_safe_mode +ffffffff81e27ae0 t gfx_v9_0_unset_safe_mode +ffffffff81e27b50 t gfx_v9_0_rlc_init +ffffffff81e28360 t gfx_v9_0_get_csb_size +ffffffff81e283c0 t gfx_v9_0_get_csb_buffer +ffffffff81e28510 t gfx_v9_0_cp_jump_table_num +ffffffff81e28560 t gfx_v9_0_rlc_resume +ffffffff81e29300 t gfx_v9_0_rlc_stop +ffffffff81e297a0 t gfx_v9_0_rlc_reset +ffffffff81e29930 t gfx_v9_0_rlc_start +ffffffff81e29a70 t gfx_v9_0_update_spm_vmid +ffffffff81e29ba0 t gfx_v9_0_is_rlcg_access_range +ffffffff81e29bf0 t gfx_v9_0_init_always_on_cu_mask +ffffffff81e29f50 t gfx_v9_0_init_csb +ffffffff81e2a0e0 t gfx_v9_0_enable_lbpw +ffffffff81e2a1d0 t gfx_v9_0_enable_gui_idle_interrupt +ffffffff81e2a2d0 t amdgpu_bo_unreserve +ffffffff81e2a3b0 t gfx_v9_0_get_gpu_clock_counter +ffffffff81e2ab30 t gfx_v9_0_read_wave_data +ffffffff81e2ad70 t gfx_v9_0_read_wave_vgprs +ffffffff81e2ad90 t gfx_v9_0_read_wave_sgprs +ffffffff81e2ade0 t gfx_v9_0_select_me_pipe_q +ffffffff81e2ae00 t wave_read_ind +ffffffff81e2af10 t wave_read_regs +ffffffff81e2b080 t gfx_v9_0_cp_gfx_enable +ffffffff81e2b160 t amdgpu_bo_reserve +ffffffff81e2b2d0 t gfx_v9_0_kiq_init_register +ffffffff81e2bf50 t gfx_v9_0_mqd_init +ffffffff81e2c490 t gfx_v9_0_update_medium_grain_clock_gating +ffffffff81e2c9a0 t gfx_v9_0_update_3d_clock_gating +ffffffff81e2cd80 t gfx_v9_0_update_coarse_grain_clock_gating +ffffffff81e2e000 t gfx_v9_4_ras_error_inject +ffffffff81e2e130 t gfx_v9_4_query_ras_error_count +ffffffff81e2eef0 t gfx_v9_4_query_ras_error_status +ffffffff81e2f0c0 t gfx_v9_4_reset_ras_error_count +ffffffff81e30000 T gfx_v9_4_2_do_edc_gpr_workarounds +ffffffff81e30760 T gfx_v9_4_2_init_golden_registers +ffffffff81e307f0 T gfx_v9_4_2_debug_trap_config_init +ffffffff81e30890 T gfx_v9_4_2_set_power_brake_sequence +ffffffff81e30a60 t gfx_v9_4_2_ras_error_inject +ffffffff81e30b90 t gfx_v9_4_2_query_ras_error_count +ffffffff81e30c40 t gfx_v9_4_2_query_ras_error_status +ffffffff81e31490 t gfx_v9_4_2_reset_ras_error_count +ffffffff81e314f0 t gfx_v9_4_2_reset_ras_error_status +ffffffff81e319b0 t gfx_v9_4_2_enable_watchdog_timer +ffffffff81e31bd0 t gfx_v9_4_2_query_uctl2_poison_status +ffffffff81e31c50 t gfx_v9_4_2_run_shader +ffffffff81e31fd0 t gfx_v9_4_2_wait_for_waves_assigned +ffffffff81e32610 t gfx_v9_4_2_query_sram_edc_count +ffffffff81e32960 t gfx_v9_4_2_query_utc_edc_count +ffffffff81e32b40 t wave_read_ind +ffffffff81e33000 t gfxhub_v1_0_get_mc_fb_offset +ffffffff81e33090 t gfxhub_v1_0_setup_vm_pt_regs +ffffffff81e331d0 t gfxhub_v1_0_gart_enable +ffffffff81e346c0 t gfxhub_v1_0_gart_disable +ffffffff81e34950 t gfxhub_v1_0_set_fault_enable_default +ffffffff81e34a40 t gfxhub_v1_0_init +ffffffff81e35000 T gfxhub_v1_1_get_xgmi_info +ffffffff81e36000 t gfxhub_v2_0_get_fb_location +ffffffff81e36090 t gfxhub_v2_0_get_mc_fb_offset +ffffffff81e36120 t gfxhub_v2_0_setup_vm_pt_regs +ffffffff81e36260 t gfxhub_v2_0_gart_enable +ffffffff81e37460 t gfxhub_v2_0_gart_disable +ffffffff81e376a0 t gfxhub_v2_0_set_fault_enable_default +ffffffff81e37790 t gfxhub_v2_0_init +ffffffff81e37860 t gfxhub_v2_0_print_l2_protection_fault_status +ffffffff81e37a30 t gfxhub_v2_0_get_invalidate_req +ffffffff81e38000 t gfxhub_v2_1_get_fb_location +ffffffff81e38090 t gfxhub_v2_1_get_mc_fb_offset +ffffffff81e38120 t gfxhub_v2_1_setup_vm_pt_regs +ffffffff81e38260 t gfxhub_v2_1_gart_enable +ffffffff81e39540 t gfxhub_v2_1_gart_disable +ffffffff81e397c0 t gfxhub_v2_1_set_fault_enable_default +ffffffff81e398d0 t gfxhub_v2_1_init +ffffffff81e399a0 t gfxhub_v2_1_get_xgmi_info +ffffffff81e39ad0 t gfxhub_v2_1_utcl2_harvest +ffffffff81e39cb0 t gfxhub_v2_1_save_regs +ffffffff81e3a6e0 t gfxhub_v2_1_restore_regs +ffffffff81e3b2c0 t gfxhub_v2_1_halt +ffffffff81e3b680 t gfxhub_v2_1_print_l2_protection_fault_status +ffffffff81e3b850 t gfxhub_v2_1_get_invalidate_req +ffffffff81e3c000 t gfxhub_v3_0_get_fb_location +ffffffff81e3c090 t gfxhub_v3_0_get_mc_fb_offset +ffffffff81e3c120 t gfxhub_v3_0_setup_vm_pt_regs +ffffffff81e3c260 t gfxhub_v3_0_gart_enable +ffffffff81e3d4e0 t gfxhub_v3_0_gart_disable +ffffffff81e3d760 t gfxhub_v3_0_set_fault_enable_default +ffffffff81e3db00 t gfxhub_v3_0_init +ffffffff81e3dbd0 t gfxhub_v3_0_print_l2_protection_fault_status +ffffffff81e3dda0 t gfxhub_v3_0_get_invalidate_req +ffffffff81e3e000 t gfxhub_v3_0_3_get_fb_location +ffffffff81e3e090 t gfxhub_v3_0_3_get_mc_fb_offset +ffffffff81e3e120 t gfxhub_v3_0_3_setup_vm_pt_regs +ffffffff81e3e260 t gfxhub_v3_0_3_gart_enable +ffffffff81e3f4f0 t gfxhub_v3_0_3_gart_disable +ffffffff81e3f790 t gfxhub_v3_0_3_set_fault_enable_default +ffffffff81e3f8a0 t gfxhub_v3_0_3_init +ffffffff81e3f970 t gfxhub_v3_0_3_print_l2_protection_fault_status +ffffffff81e3fb40 t gfxhub_v3_0_3_get_invalidate_req +ffffffff81e40000 t gmc_v10_0_early_init +ffffffff81e401f0 t gmc_v10_0_late_init +ffffffff81e40260 t gmc_v10_0_sw_init +ffffffff81e40680 t gmc_v10_0_sw_fini +ffffffff81e406d0 t gmc_v10_0_hw_init +ffffffff81e40890 t gmc_v10_0_hw_fini +ffffffff81e40920 t gmc_v10_0_suspend +ffffffff81e409b0 t gmc_v10_0_resume +ffffffff81e40a10 t gmc_v10_0_is_idle +ffffffff81e40a40 t gmc_v10_0_wait_for_idle +ffffffff81e40a70 t gmc_v10_0_soft_reset +ffffffff81e40aa0 t gmc_v10_0_set_clockgating_state +ffffffff81e40b50 t gmc_v10_0_set_powergating_state +ffffffff81e40b80 t gmc_v10_0_get_clockgating_state +ffffffff81e40c20 t gmc_v10_0_flush_gpu_tlb +ffffffff81e40ed0 t gmc_v10_0_flush_gpu_tlb_pasid +ffffffff81e410f0 t gmc_v10_0_emit_flush_gpu_tlb +ffffffff81e412a0 t gmc_v10_0_emit_pasid_mapping +ffffffff81e41310 t gmc_v10_0_map_mtype +ffffffff81e41360 t gmc_v10_0_get_vm_pde +ffffffff81e41450 t gmc_v10_0_get_vm_pte +ffffffff81e41500 t gmc_v10_0_get_vbios_fb_size +ffffffff81e41670 t gmc_v10_0_flush_vm_hub +ffffffff81e41ad0 t gmc_v10_0_vm_fault_interrupt_state +ffffffff81e41b40 t gmc_v10_0_process_interrupt +ffffffff81e41e00 t gmc_v10_0_ecc_interrupt_state +ffffffff81e42000 t gmc_v11_0_early_init +ffffffff81e42230 t gmc_v11_0_late_init +ffffffff81e422a0 t gmc_v11_0_sw_init +ffffffff81e425c0 t gmc_v11_0_sw_fini +ffffffff81e42610 t gmc_v11_0_hw_init +ffffffff81e42750 t gmc_v11_0_hw_fini +ffffffff81e427d0 t gmc_v11_0_suspend +ffffffff81e42850 t gmc_v11_0_resume +ffffffff81e428b0 t gmc_v11_0_is_idle +ffffffff81e428e0 t gmc_v11_0_wait_for_idle +ffffffff81e42910 t gmc_v11_0_soft_reset +ffffffff81e42940 t gmc_v11_0_set_clockgating_state +ffffffff81e429c0 t gmc_v11_0_set_powergating_state +ffffffff81e429f0 t gmc_v11_0_get_clockgating_state +ffffffff81e42a30 t gmc_v11_0_flush_gpu_tlb +ffffffff81e42f00 t gmc_v11_0_flush_gpu_tlb_pasid +ffffffff81e430f0 t gmc_v11_0_emit_flush_gpu_tlb +ffffffff81e432a0 t gmc_v11_0_emit_pasid_mapping +ffffffff81e43310 t gmc_v11_0_map_mtype +ffffffff81e43360 t gmc_v11_0_get_vm_pde +ffffffff81e43460 t gmc_v11_0_get_vm_pte +ffffffff81e43510 t gmc_v11_0_get_vbios_fb_size +ffffffff81e43680 t gmc_v11_0_vm_fault_interrupt_state +ffffffff81e436f0 t gmc_v11_0_process_interrupt +ffffffff81e43910 t gmc_v11_0_ecc_interrupt_state +ffffffff81e44000 t gmc_v7_0_early_init +ffffffff81e44090 t gmc_v7_0_late_init +ffffffff81e440e0 t gmc_v7_0_sw_init +ffffffff81e445e0 t gmc_v7_0_sw_fini +ffffffff81e44690 t gmc_v7_0_hw_init +ffffffff81e45030 t gmc_v7_0_hw_fini +ffffffff81e450f0 t gmc_v7_0_suspend +ffffffff81e45130 t gmc_v7_0_resume +ffffffff81e45190 t gmc_v7_0_is_idle +ffffffff81e451e0 t gmc_v7_0_wait_for_idle +ffffffff81e45280 t gmc_v7_0_soft_reset +ffffffff81e454e0 t gmc_v7_0_set_clockgating_state +ffffffff81e45740 t gmc_v7_0_set_powergating_state +ffffffff81e45770 t gmc_v7_0_flush_gpu_tlb +ffffffff81e457a0 t gmc_v7_0_flush_gpu_tlb_pasid +ffffffff81e45860 t gmc_v7_0_emit_flush_gpu_tlb +ffffffff81e458f0 t gmc_v7_0_emit_pasid_mapping +ffffffff81e45920 t gmc_v7_0_set_prt +ffffffff81e45ad0 t gmc_v7_0_get_vm_pde +ffffffff81e45b30 t gmc_v7_0_get_vm_pte +ffffffff81e45b70 t gmc_v7_0_get_vbios_fb_size +ffffffff81e45be0 t gmc_v7_0_vm_fault_interrupt_state +ffffffff81e45cb0 t gmc_v7_0_process_interrupt +ffffffff81e46000 t gmc_v8_0_early_init +ffffffff81e46090 t gmc_v8_0_late_init +ffffffff81e460e0 t gmc_v8_0_sw_init +ffffffff81e46760 t gmc_v8_0_sw_fini +ffffffff81e46810 t gmc_v8_0_hw_init +ffffffff81e474b0 t gmc_v8_0_hw_fini +ffffffff81e47570 t gmc_v8_0_suspend +ffffffff81e475b0 t gmc_v8_0_resume +ffffffff81e47610 t gmc_v8_0_is_idle +ffffffff81e47660 t gmc_v8_0_wait_for_idle +ffffffff81e47700 t gmc_v8_0_check_soft_reset +ffffffff81e47770 t gmc_v8_0_pre_soft_reset +ffffffff81e478e0 t gmc_v8_0_soft_reset +ffffffff81e479b0 t gmc_v8_0_post_soft_reset +ffffffff81e47a20 t gmc_v8_0_set_clockgating_state +ffffffff81e47fe0 t gmc_v8_0_set_powergating_state +ffffffff81e48010 t gmc_v8_0_get_clockgating_state +ffffffff81e48080 t gmc_v8_0_flush_gpu_tlb +ffffffff81e480b0 t gmc_v8_0_flush_gpu_tlb_pasid +ffffffff81e48170 t gmc_v8_0_emit_flush_gpu_tlb +ffffffff81e48200 t gmc_v8_0_emit_pasid_mapping +ffffffff81e48230 t gmc_v8_0_set_prt +ffffffff81e483e0 t gmc_v8_0_get_vm_pde +ffffffff81e48440 t gmc_v8_0_get_vm_pte +ffffffff81e48490 t gmc_v8_0_get_vbios_fb_size +ffffffff81e48500 t gmc_v8_0_vm_fault_interrupt_state +ffffffff81e485d0 t gmc_v8_0_process_interrupt +ffffffff81e49000 T gmc_v9_0_restore_registers +ffffffff81e49150 t gmc_v9_0_early_init +ffffffff81e49500 t gmc_v9_0_late_init +ffffffff81e49610 t gmc_v9_0_sw_init +ffffffff81e49cc0 t gmc_v9_0_sw_fini +ffffffff81e49d30 t gmc_v9_0_hw_init +ffffffff81e4a130 t gmc_v9_0_hw_fini +ffffffff81e4a1e0 t gmc_v9_0_suspend +ffffffff81e4a290 t gmc_v9_0_resume +ffffffff81e4a2f0 t gmc_v9_0_is_idle +ffffffff81e4a320 t gmc_v9_0_wait_for_idle +ffffffff81e4a350 t gmc_v9_0_soft_reset +ffffffff81e4a380 t gmc_v9_0_set_clockgating_state +ffffffff81e4a3e0 t gmc_v9_0_set_powergating_state +ffffffff81e4a410 t gmc_v9_0_get_clockgating_state +ffffffff81e4a450 t gmc_v9_0_flush_gpu_tlb +ffffffff81e4aa90 t gmc_v9_0_flush_gpu_tlb_pasid +ffffffff81e4ad60 t gmc_v9_0_emit_flush_gpu_tlb +ffffffff81e4af30 t gmc_v9_0_emit_pasid_mapping +ffffffff81e4afa0 t gmc_v9_0_map_mtype +ffffffff81e4afe0 t gmc_v9_0_get_vm_pde +ffffffff81e4b0e0 t gmc_v9_0_get_vm_pte +ffffffff81e4b1b0 t gmc_v9_0_get_vbios_fb_size +ffffffff81e4b340 t gmc_v9_0_vm_fault_interrupt_state +ffffffff81e4b6c0 t gmc_v9_0_process_interrupt +ffffffff81e4bce0 t gmc_v9_0_ecc_interrupt_state +ffffffff81e4c000 t hdp_v4_0_query_ras_error_count +ffffffff81e4c0c0 t hdp_v4_0_reset_ras_error_count +ffffffff81e4c1e0 t hdp_v4_0_flush_hdp +ffffffff81e4c230 t hdp_v4_0_invalidate_hdp +ffffffff81e4c300 t hdp_v4_0_update_clock_gating +ffffffff81e4c400 t hdp_v4_0_get_clockgating_state +ffffffff81e4c450 t hdp_v4_0_init_registers +ffffffff81e4d000 t hdp_v5_0_flush_hdp +ffffffff81e4d050 t hdp_v5_0_invalidate_hdp +ffffffff81e4d0f0 t hdp_v5_0_update_clock_gating +ffffffff81e4d4e0 t hdp_v5_0_get_clockgating_state +ffffffff81e4d600 t hdp_v5_0_init_registers +ffffffff81e4e000 t hdp_v5_2_flush_hdp +ffffffff81e4e050 t hdp_v5_2_update_clock_gating +ffffffff81e4e440 t hdp_v5_2_get_clockgating_state +ffffffff81e4f000 t hdp_v6_0_flush_hdp +ffffffff81e4f050 t hdp_v6_0_update_clock_gating +ffffffff81e4f360 t hdp_v6_0_get_clockgating_state +ffffffff81e50000 t iceland_ih_early_init +ffffffff81e50050 t iceland_ih_sw_init +ffffffff81e500b0 t iceland_ih_sw_fini +ffffffff81e500f0 t iceland_ih_hw_init +ffffffff81e50320 t iceland_ih_hw_fini +ffffffff81e503f0 t iceland_ih_suspend +ffffffff81e504c0 t iceland_ih_resume +ffffffff81e50500 t iceland_ih_is_idle +ffffffff81e50550 t iceland_ih_wait_for_idle +ffffffff81e505f0 t iceland_ih_soft_reset +ffffffff81e506d0 t iceland_ih_set_clockgating_state +ffffffff81e50700 t iceland_ih_set_powergating_state +ffffffff81e50730 t iceland_ih_get_wptr +ffffffff81e50820 t iceland_ih_decode_iv +ffffffff81e508a0 t iceland_ih_set_rptr +ffffffff81e51000 t ih_v6_0_early_init +ffffffff81e51050 t ih_v6_0_sw_init +ffffffff81e511b0 t ih_v6_0_sw_fini +ffffffff81e511f0 t ih_v6_0_hw_init +ffffffff81e517a0 t ih_v6_0_hw_fini +ffffffff81e51800 t ih_v6_0_suspend +ffffffff81e51860 t ih_v6_0_resume +ffffffff81e51870 t ih_v6_0_is_idle +ffffffff81e518a0 t ih_v6_0_wait_for_idle +ffffffff81e518d0 t ih_v6_0_soft_reset +ffffffff81e51900 t ih_v6_0_set_clockgating_state +ffffffff81e51a20 t ih_v6_0_set_powergating_state +ffffffff81e51b90 t ih_v6_0_get_clockgating_state +ffffffff81e51c20 t ih_v6_0_get_wptr +ffffffff81e51d10 t ih_v6_0_set_rptr +ffffffff81e51de0 t ih_v6_0_self_irq +ffffffff81e51e50 t ih_v6_0_toggle_interrupts +ffffffff81e52030 t force_update_wptr_for_self_int +ffffffff81e53000 t imu_v11_0_init_microcode +ffffffff81e531f0 t imu_v11_0_load_microcode +ffffffff81e53550 t imu_v11_0_setup +ffffffff81e537d0 t imu_v11_0_start +ffffffff81e538c0 t imu_v11_0_program_rlc_ram +ffffffff81e53a70 t imu_v11_0_wait_for_reset_status +ffffffff81e53bc0 t program_imu_rlc_ram +ffffffff81e54000 T imu_v11_0_3_program_rlc_ram +ffffffff81e55000 T jpeg_v1_0_early_init +ffffffff81e55060 T jpeg_v1_0_sw_init +ffffffff81e55130 T jpeg_v1_0_sw_fini +ffffffff81e55150 T jpeg_v1_0_start +ffffffff81e55bc0 t jpeg_v1_0_decode_ring_get_rptr +ffffffff81e55c50 t jpeg_v1_0_decode_ring_get_wptr +ffffffff81e55ce0 t jpeg_v1_0_decode_ring_set_wptr +ffffffff81e55d50 t jpeg_v1_0_decode_ring_emit_ib +ffffffff81e56660 t jpeg_v1_0_decode_ring_emit_fence +ffffffff81e56fc0 t jpeg_v1_0_decode_ring_emit_vm_flush +ffffffff81e57030 t jpeg_v1_0_decode_ring_nop +ffffffff81e57190 t jpeg_v1_0_decode_ring_insert_start +ffffffff81e57360 t jpeg_v1_0_decode_ring_insert_end +ffffffff81e57530 t jpeg_v1_0_ring_begin_use +ffffffff81e57630 t jpeg_v1_0_decode_ring_emit_wreg +ffffffff81e57890 t jpeg_v1_0_decode_ring_emit_reg_wait +ffffffff81e57cb0 t jpeg_v1_0_set_interrupt_state +ffffffff81e57ce0 t jpeg_v1_0_process_interrupt +ffffffff81e58000 T jpeg_v2_0_dec_ring_insert_start +ffffffff81e581b0 T jpeg_v2_0_dec_ring_insert_end +ffffffff81e58360 T jpeg_v2_0_dec_ring_emit_fence +ffffffff81e58a50 T jpeg_v2_0_dec_ring_emit_ib +ffffffff81e59240 T jpeg_v2_0_dec_ring_emit_reg_wait +ffffffff81e59600 T jpeg_v2_0_dec_ring_emit_vm_flush +ffffffff81e59670 T jpeg_v2_0_dec_ring_emit_wreg +ffffffff81e598b0 T jpeg_v2_0_dec_ring_nop +ffffffff81e59a10 t jpeg_v2_0_early_init +ffffffff81e59a80 t jpeg_v2_0_sw_init +ffffffff81e59b90 t jpeg_v2_0_sw_fini +ffffffff81e59be0 t jpeg_v2_0_hw_init +ffffffff81e59c60 t jpeg_v2_0_hw_fini +ffffffff81e59d40 t jpeg_v2_0_suspend +ffffffff81e59d70 t jpeg_v2_0_resume +ffffffff81e59e00 t jpeg_v2_0_is_idle +ffffffff81e59e80 t jpeg_v2_0_wait_for_idle +ffffffff81e59f70 t jpeg_v2_0_set_clockgating_state +ffffffff81e5a020 t jpeg_v2_0_set_powergating_state +ffffffff81e5a820 t jpeg_v2_0_dec_ring_get_rptr +ffffffff81e5a8b0 t jpeg_v2_0_dec_ring_get_wptr +ffffffff81e5a950 t jpeg_v2_0_dec_ring_set_wptr +ffffffff81e5a9f0 t jpeg_v2_0_set_interrupt_state +ffffffff81e5aa20 t jpeg_v2_0_process_interrupt +ffffffff81e5aab0 t jpeg_v2_0_enable_clock_gating +ffffffff81e5ac50 t jpeg_v2_0_disable_clock_gating +ffffffff81e5b000 t jpeg_v2_6_query_ras_poison_status +ffffffff81e5b140 t jpeg_v2_5_early_init +ffffffff81e5b410 t jpeg_v2_5_sw_init +ffffffff81e5b630 t jpeg_v2_5_sw_fini +ffffffff81e5b680 t jpeg_v2_5_hw_init +ffffffff81e5b770 t jpeg_v2_5_hw_fini +ffffffff81e5b8b0 t jpeg_v2_5_suspend +ffffffff81e5b8e0 t jpeg_v2_5_resume +ffffffff81e5b9e0 t jpeg_v2_5_is_idle +ffffffff81e5bae0 t jpeg_v2_5_wait_for_idle +ffffffff81e5bc10 t jpeg_v2_5_set_clockgating_state +ffffffff81e5bd80 t jpeg_v2_5_set_powergating_state +ffffffff81e5c470 t jpeg_v2_5_dec_ring_get_rptr +ffffffff81e5c510 t jpeg_v2_5_dec_ring_get_wptr +ffffffff81e5c5c0 t jpeg_v2_5_dec_ring_set_wptr +ffffffff81e5c670 t jpeg_v2_6_dec_ring_insert_start +ffffffff81e5c830 t jpeg_v2_6_dec_ring_insert_end +ffffffff81e5c9f0 t jpeg_v2_5_set_interrupt_state +ffffffff81e5ca20 t jpeg_v2_5_process_interrupt +ffffffff81e5cb00 t jpeg_v2_5_enable_clock_gating +ffffffff81e5cbd0 t jpeg_v2_5_disable_clock_gating +ffffffff81e5d000 t jpeg_v3_0_early_init +ffffffff81e5d0f0 t jpeg_v3_0_sw_init +ffffffff81e5d200 t jpeg_v3_0_sw_fini +ffffffff81e5d250 t jpeg_v3_0_hw_init +ffffffff81e5d2d0 t jpeg_v3_0_hw_fini +ffffffff81e5d3b0 t jpeg_v3_0_suspend +ffffffff81e5d3e0 t jpeg_v3_0_resume +ffffffff81e5d470 t jpeg_v3_0_is_idle +ffffffff81e5d4f0 t jpeg_v3_0_wait_for_idle +ffffffff81e5d5e0 t jpeg_v3_0_set_clockgating_state +ffffffff81e5d690 t jpeg_v3_0_set_powergating_state +ffffffff81e5df40 t jpeg_v3_0_dec_ring_get_rptr +ffffffff81e5dfd0 t jpeg_v3_0_dec_ring_get_wptr +ffffffff81e5e070 t jpeg_v3_0_dec_ring_set_wptr +ffffffff81e5e110 t jpeg_v3_0_set_interrupt_state +ffffffff81e5e140 t jpeg_v3_0_process_interrupt +ffffffff81e5e1d0 t jpeg_v3_0_enable_clock_gating +ffffffff81e5e2a0 t jpeg_v3_0_disable_clock_gating +ffffffff81e5f000 t jpeg_v4_0_early_init +ffffffff81e5f080 t jpeg_v4_0_sw_init +ffffffff81e5f190 t jpeg_v4_0_sw_fini +ffffffff81e5f1e0 t jpeg_v4_0_hw_init +ffffffff81e5f300 t jpeg_v4_0_hw_fini +ffffffff81e5f3e0 t jpeg_v4_0_suspend +ffffffff81e5f410 t jpeg_v4_0_resume +ffffffff81e5f460 t jpeg_v4_0_is_idle +ffffffff81e5f4e0 t jpeg_v4_0_wait_for_idle +ffffffff81e5f5d0 t jpeg_v4_0_set_clockgating_state +ffffffff81e5f680 t jpeg_v4_0_set_powergating_state +ffffffff81e5fe90 t jpeg_v4_0_dec_ring_get_rptr +ffffffff81e5ff20 t jpeg_v4_0_dec_ring_get_wptr +ffffffff81e5ffc0 t jpeg_v4_0_dec_ring_set_wptr +ffffffff81e60060 t jpeg_v4_0_set_interrupt_state +ffffffff81e60090 t jpeg_v4_0_process_interrupt +ffffffff81e60130 t jpeg_v4_0_enable_clock_gating +ffffffff81e602e0 t jpeg_v4_0_disable_clock_gating +ffffffff81e61000 t lsdma_v6_0_copy_mem +ffffffff81e61350 t lsdma_v6_0_fill_mem +ffffffff81e61630 t lsdma_v6_0_update_memory_power_gating +ffffffff81e62000 t mca_v3_0_mp0_query_ras_error_count +ffffffff81e62020 t mca_v3_0_ras_block_match +ffffffff81e62070 t mca_v3_0_mp1_query_ras_error_count +ffffffff81e62090 t mca_v3_0_mpio_query_ras_error_count +ffffffff81e620b0 t mca_v3_0_init +ffffffff81e63000 t mes_v10_0_early_init +ffffffff81e63060 t mes_v10_0_late_init +ffffffff81e630b0 t mes_v10_1_sw_init +ffffffff81e63580 t mes_v10_1_sw_fini +ffffffff81e636b0 t mes_v10_1_hw_init +ffffffff81e63f50 t mes_v10_1_hw_fini +ffffffff81e64010 t mes_v10_1_suspend +ffffffff81e640f0 t mes_v10_1_resume +ffffffff81e64140 t mes_v10_1_kiq_hw_init +ffffffff81e64550 t mes_v10_1_add_hw_queue +ffffffff81e646d0 t mes_v10_1_remove_hw_queue +ffffffff81e64760 t mes_v10_1_unmap_legacy_queue +ffffffff81e64850 t mes_v10_1_suspend_gang +ffffffff81e64880 t mes_v10_1_resume_gang +ffffffff81e648b0 t mes_v10_1_submit_pkt_and_poll_completion +ffffffff81e64ab0 t mes_v10_1_load_microcode +ffffffff81e65290 t mes_v10_1_enable +ffffffff81e65700 t mes_v10_1_queue_init +ffffffff81e659a0 t amdgpu_bo_unreserve +ffffffff81e65a80 t mes_v10_1_ring_get_rptr +ffffffff81e65ab0 t mes_v10_1_ring_get_wptr +ffffffff81e65b20 t mes_v10_1_ring_set_wptr +ffffffff81e66000 t mes_v11_0_early_init +ffffffff81e66060 t mes_v11_0_late_init +ffffffff81e660d0 t mes_v11_0_sw_init +ffffffff81e665b0 t mes_v11_0_sw_fini +ffffffff81e66750 t mes_v11_0_hw_init +ffffffff81e66f60 t mes_v11_0_hw_fini +ffffffff81e66f90 t mes_v11_0_suspend +ffffffff81e66fa0 t mes_v11_0_resume +ffffffff81e66ff0 t mes_v11_0_kiq_hw_init +ffffffff81e671f0 t mes_v11_0_kiq_hw_fini +ffffffff81e67630 t mes_v11_0_add_hw_queue +ffffffff81e67830 t mes_v11_0_remove_hw_queue +ffffffff81e678c0 t mes_v11_0_unmap_legacy_queue +ffffffff81e679c0 t mes_v11_0_suspend_gang +ffffffff81e679f0 t mes_v11_0_resume_gang +ffffffff81e67a20 t mes_v11_0_misc_op +ffffffff81e67b90 t mes_v11_0_submit_pkt_and_poll_completion +ffffffff81e67db0 t mes_v11_0_load_microcode +ffffffff81e68510 t mes_v11_0_enable +ffffffff81e68a00 t mes_v11_0_queue_init +ffffffff81e69490 t amdgpu_bo_unreserve +ffffffff81e69570 t mes_v11_0_mqd_init +ffffffff81e69770 t mes_v11_0_ring_get_rptr +ffffffff81e697a0 t mes_v11_0_ring_get_wptr +ffffffff81e69810 t mes_v11_0_ring_set_wptr +ffffffff81e6a000 t mmhub_v1_0_query_ras_error_count +ffffffff81e6a150 t mmhub_v1_0_reset_ras_error_count +ffffffff81e6a200 t mmhub_v1_0_get_fb_location +ffffffff81e6a310 t mmhub_v1_0_init +ffffffff81e6a3c0 t mmhub_v1_0_gart_enable +ffffffff81e6b6f0 t mmhub_v1_0_set_fault_enable_default +ffffffff81e6b800 t mmhub_v1_0_gart_disable +ffffffff81e6ba90 t mmhub_v1_0_set_clockgating +ffffffff81e6bf10 t mmhub_v1_0_get_clockgating +ffffffff81e6c030 t mmhub_v1_0_setup_vm_pt_regs +ffffffff81e6c170 t mmhub_v1_0_update_power_gating +ffffffff81e6d000 t mmhub_v1_7_query_ras_error_count +ffffffff81e6d150 t mmhub_v1_7_query_ras_error_status +ffffffff81e6d230 t mmhub_v1_7_reset_ras_error_count +ffffffff81e6d2d0 t mmhub_v1_7_reset_ras_error_status +ffffffff81e6d3c0 t mmhub_v1_7_get_fb_location +ffffffff81e6d4d0 t mmhub_v1_7_init +ffffffff81e6d570 t mmhub_v1_7_gart_enable +ffffffff81e6ea50 t mmhub_v1_7_set_fault_enable_default +ffffffff81e6eb60 t mmhub_v1_7_gart_disable +ffffffff81e6edf0 t mmhub_v1_7_set_clockgating +ffffffff81e6f170 t mmhub_v1_7_get_clockgating +ffffffff81e6f290 t mmhub_v1_7_setup_vm_pt_regs +ffffffff81e70000 t mmhub_v2_0_init +ffffffff81e700d0 t mmhub_v2_0_gart_enable +ffffffff81e71250 t mmhub_v2_0_set_fault_enable_default +ffffffff81e71360 t mmhub_v2_0_gart_disable +ffffffff81e715e0 t mmhub_v2_0_set_clockgating +ffffffff81e71920 t mmhub_v2_0_get_clockgating +ffffffff81e71ab0 t mmhub_v2_0_setup_vm_pt_regs +ffffffff81e71bf0 t mmhub_v2_0_print_l2_protection_fault_status +ffffffff81e71e40 t mmhub_v2_0_get_invalidate_req +ffffffff81e72000 t mmhub_v2_3_init +ffffffff81e720e0 t mmhub_v2_3_gart_enable +ffffffff81e73470 t mmhub_v2_3_set_fault_enable_default +ffffffff81e73570 t mmhub_v2_3_gart_disable +ffffffff81e73800 t mmhub_v2_3_set_clockgating +ffffffff81e73c80 t mmhub_v2_3_get_clockgating +ffffffff81e73e70 t mmhub_v2_3_setup_vm_pt_regs +ffffffff81e73fb0 t mmhub_v2_3_print_l2_protection_fault_status +ffffffff81e741c0 t mmhub_v2_3_get_invalidate_req +ffffffff81e75000 t mmhub_v3_0_get_fb_location +ffffffff81e75090 t mmhub_v3_0_get_mc_fb_offset +ffffffff81e75120 t mmhub_v3_0_init +ffffffff81e751f0 t mmhub_v3_0_gart_enable +ffffffff81e76380 t mmhub_v3_0_set_fault_enable_default +ffffffff81e76490 t mmhub_v3_0_gart_disable +ffffffff81e76710 t mmhub_v3_0_set_clockgating +ffffffff81e768e0 t mmhub_v3_0_get_clockgating +ffffffff81e76990 t mmhub_v3_0_setup_vm_pt_regs +ffffffff81e76ad0 t mmhub_v3_0_print_l2_protection_fault_status +ffffffff81e76cd0 t mmhub_v3_0_get_invalidate_req +ffffffff81e77000 t mmhub_v3_0_1_get_fb_location +ffffffff81e77090 t mmhub_v3_0_1_get_mc_fb_offset +ffffffff81e77120 t mmhub_v3_0_1_init +ffffffff81e771f0 t mmhub_v3_0_1_gart_enable +ffffffff81e78470 t mmhub_v3_0_1_set_fault_enable_default +ffffffff81e78570 t mmhub_v3_0_1_gart_disable +ffffffff81e78800 t mmhub_v3_0_1_set_clockgating +ffffffff81e789c0 t mmhub_v3_0_1_get_clockgating +ffffffff81e78a70 t mmhub_v3_0_1_setup_vm_pt_regs +ffffffff81e78bb0 t mmhub_v3_0_1_print_l2_protection_fault_status +ffffffff81e78db0 t mmhub_v3_0_1_get_invalidate_req +ffffffff81e79000 t mmhub_v3_0_2_get_fb_location +ffffffff81e79090 t mmhub_v3_0_2_get_mc_fb_offset +ffffffff81e79120 t mmhub_v3_0_2_init +ffffffff81e791f0 t mmhub_v3_0_2_gart_enable +ffffffff81e7a370 t mmhub_v3_0_2_set_fault_enable_default +ffffffff81e7a480 t mmhub_v3_0_2_gart_disable +ffffffff81e7a700 t mmhub_v3_0_2_set_clockgating +ffffffff81e7a730 t mmhub_v3_0_2_get_clockgating +ffffffff81e7a760 t mmhub_v3_0_2_setup_vm_pt_regs +ffffffff81e7a8a0 t mmhub_v3_0_2_print_l2_protection_fault_status +ffffffff81e7aa80 t mmhub_v3_0_2_get_invalidate_req +ffffffff81e7b000 t mmhub_v9_4_query_ras_error_count +ffffffff81e7b150 t mmhub_v9_4_query_ras_error_status +ffffffff81e7b230 t mmhub_v9_4_reset_ras_error_count +ffffffff81e7b300 t mmhub_v9_4_get_fb_location +ffffffff81e7b410 t mmhub_v9_4_init +ffffffff81e7b560 t mmhub_v9_4_gart_enable +ffffffff81e7c9f0 t mmhub_v9_4_set_fault_enable_default +ffffffff81e7cbd0 t mmhub_v9_4_gart_disable +ffffffff81e7cf30 t mmhub_v9_4_set_clockgating +ffffffff81e7d3f0 t mmhub_v9_4_get_clockgating +ffffffff81e7d520 t mmhub_v9_4_setup_vm_pt_regs +ffffffff81e7d570 t mmhub_v9_4_setup_hubid_vm_pt_regs +ffffffff81e7e000 T xgpu_ai_mailbox_set_irq_funcs +ffffffff81e7e050 T xgpu_ai_mailbox_add_irq_id +ffffffff81e7e0e0 T xgpu_ai_mailbox_get_irq +ffffffff81e7e190 t xgpu_ai_mailbox_flr_work +ffffffff81e7e3a0 T xgpu_ai_mailbox_put_irq +ffffffff81e7e3e0 t xgpu_ai_request_full_gpu_access +ffffffff81e7e400 t xgpu_ai_release_full_gpu_access +ffffffff81e7e420 t xgpu_ai_request_init_data +ffffffff81e7e480 t xgpu_ai_request_reset +ffffffff81e7e530 t xgpu_ai_mailbox_trans_msg +ffffffff81e7e760 t xgpu_ai_set_mailbox_ack_irq +ffffffff81e7e7f0 t xgpu_ai_mailbox_ack_irq +ffffffff81e7e840 t xgpu_ai_set_mailbox_rcv_irq +ffffffff81e7e8d0 t xgpu_ai_mailbox_rcv_irq +ffffffff81e7e9b0 t xgpu_ai_send_access_requests +ffffffff81e7eaa0 t xgpu_ai_poll_msg +ffffffff81e7f000 T xgpu_nv_mailbox_set_irq_funcs +ffffffff81e7f050 T xgpu_nv_mailbox_add_irq_id +ffffffff81e7f0e0 T xgpu_nv_mailbox_get_irq +ffffffff81e7f190 t xgpu_nv_mailbox_flr_work +ffffffff81e7f3b0 T xgpu_nv_mailbox_put_irq +ffffffff81e7f3f0 t xgpu_nv_request_full_gpu_access +ffffffff81e7f410 t xgpu_nv_release_full_gpu_access +ffffffff81e7f430 t xgpu_nv_request_init_data +ffffffff81e7f450 t xgpu_nv_request_reset +ffffffff81e7f550 t xgpu_nv_mailbox_trans_msg +ffffffff81e7f6f0 t xgpu_nv_set_mailbox_ack_irq +ffffffff81e7f770 t xgpu_nv_mailbox_ack_irq +ffffffff81e7f7c0 t xgpu_nv_set_mailbox_rcv_irq +ffffffff81e7f840 t xgpu_nv_mailbox_rcv_irq +ffffffff81e7f8f0 t xgpu_nv_send_access_requests +ffffffff81e80000 T xgpu_vi_init_golden_registers +ffffffff81e800c0 T xgpu_vi_mailbox_set_irq_funcs +ffffffff81e80110 T xgpu_vi_mailbox_add_irq_id +ffffffff81e801a0 T xgpu_vi_mailbox_get_irq +ffffffff81e80250 t xgpu_vi_mailbox_flr_work +ffffffff81e803a0 T xgpu_vi_mailbox_put_irq +ffffffff81e803e0 t xgpu_vi_request_full_gpu_access +ffffffff81e80400 t xgpu_vi_release_full_gpu_access +ffffffff81e80420 t xgpu_vi_request_reset +ffffffff81e80440 t xgpu_vi_wait_reset_cmpl +ffffffff81e80520 t xgpu_vi_set_mailbox_ack_irq +ffffffff81e805a0 t xgpu_vi_mailbox_ack_irq +ffffffff81e805f0 t xgpu_vi_set_mailbox_rcv_irq +ffffffff81e80670 t xgpu_vi_mailbox_rcv_irq +ffffffff81e80720 t xgpu_vi_mailbox_rcv_msg +ffffffff81e80840 t xgpu_vi_send_access_requests +ffffffff81e81000 t navi10_ih_early_init +ffffffff81e81060 t navi10_ih_sw_init +ffffffff81e811d0 t navi10_ih_sw_fini +ffffffff81e81210 t navi10_ih_hw_init +ffffffff81e81640 t navi10_ih_hw_fini +ffffffff81e816a0 t navi10_ih_suspend +ffffffff81e81700 t navi10_ih_resume +ffffffff81e81710 t navi10_ih_is_idle +ffffffff81e81740 t navi10_ih_wait_for_idle +ffffffff81e81770 t navi10_ih_soft_reset +ffffffff81e817a0 t navi10_ih_set_clockgating_state +ffffffff81e818c0 t navi10_ih_set_powergating_state +ffffffff81e818f0 t navi10_ih_get_clockgating_state +ffffffff81e81980 t navi10_ih_get_wptr +ffffffff81e81a90 t navi10_ih_set_rptr +ffffffff81e81b60 t navi10_ih_self_irq +ffffffff81e81be0 t navi10_ih_toggle_interrupts +ffffffff81e81d70 t force_update_wptr_for_self_int +ffffffff81e83000 t nbio_v2_3_get_hdp_flush_req_offset +ffffffff81e83040 t nbio_v2_3_get_hdp_flush_done_offset +ffffffff81e83080 t nbio_v2_3_get_pcie_index_offset +ffffffff81e830c0 t nbio_v2_3_get_pcie_data_offset +ffffffff81e83100 t nbio_v2_3_get_rev_id +ffffffff81e83160 t nbio_v2_3_mc_access_enable +ffffffff81e83210 t nbio_v2_3_get_memsize +ffffffff81e83280 t nbio_v2_3_sdma_doorbell_range +ffffffff81e83320 t nbio_v2_3_vcn_doorbell_range +ffffffff81e833a0 t nbio_v2_3_enable_doorbell_aperture +ffffffff81e83490 t nbio_v2_3_enable_doorbell_selfring_aperture +ffffffff81e835f0 t nbio_v2_3_ih_doorbell_range +ffffffff81e83700 t nbio_v2_3_update_medium_grain_clock_gating +ffffffff81e837a0 t nbio_v2_3_update_medium_grain_light_sleep +ffffffff81e83840 t nbio_v2_3_get_clockgating_state +ffffffff81e838c0 t nbio_v2_3_ih_control +ffffffff81e83a10 t nbio_v2_3_init_registers +ffffffff81e83aa0 t nbio_v2_3_remap_hdp_registers +ffffffff81e83bb0 t nbio_v2_3_enable_aspm +ffffffff81e83c50 t nbio_v2_3_program_aspm +ffffffff81e842e0 t nbio_v2_3_apply_lc_spc_mode_wa +ffffffff81e84370 t nbio_v2_3_apply_l1_link_width_reconfig_wa +ffffffff81e843e0 t nbio_v2_3_clear_doorbell_interrupt +ffffffff81e85000 t nbio_v4_3_get_hdp_flush_req_offset +ffffffff81e85040 t nbio_v4_3_get_hdp_flush_done_offset +ffffffff81e85080 t nbio_v4_3_get_pcie_index_offset +ffffffff81e850b0 t nbio_v4_3_get_pcie_data_offset +ffffffff81e850f0 t nbio_v4_3_get_rev_id +ffffffff81e85170 t nbio_v4_3_mc_access_enable +ffffffff81e85220 t nbio_v4_3_get_memsize +ffffffff81e85290 t nbio_v4_3_sdma_doorbell_range +ffffffff81e85400 t nbio_v4_3_vcn_doorbell_range +ffffffff81e855b0 t nbio_v4_3_gc_doorbell_init +ffffffff81e856a0 t nbio_v4_3_enable_doorbell_aperture +ffffffff81e85790 t nbio_v4_3_enable_doorbell_selfring_aperture +ffffffff81e858f0 t nbio_v4_3_ih_doorbell_range +ffffffff81e85a10 t nbio_v4_3_update_medium_grain_clock_gating +ffffffff81e85b50 t nbio_v4_3_update_medium_grain_light_sleep +ffffffff81e85c80 t nbio_v4_3_get_clockgating_state +ffffffff81e85d90 t nbio_v4_3_ih_control +ffffffff81e85ee0 t nbio_v4_3_init_registers +ffffffff81e86000 t nbio_v4_3_remap_hdp_registers +ffffffff81e86110 t nbio_v4_3_program_aspm +ffffffff81e86db0 t nbio_v4_3_get_rom_offset +ffffffff81e86e40 t nbio_v4_3_sriov_sdma_doorbell_range +ffffffff81e86e70 t nbio_v4_3_sriov_vcn_doorbell_range +ffffffff81e86ea0 t nbio_v4_3_sriov_gc_doorbell_init +ffffffff81e86ed0 t nbio_v4_3_sriov_ih_doorbell_range +ffffffff81e87000 t nbio_v6_1_get_hdp_flush_req_offset +ffffffff81e87040 t nbio_v6_1_get_hdp_flush_done_offset +ffffffff81e87080 t nbio_v6_1_get_pcie_index_offset +ffffffff81e870c0 t nbio_v6_1_get_pcie_data_offset +ffffffff81e87100 t nbio_v6_1_get_rev_id +ffffffff81e87180 t nbio_v6_1_mc_access_enable +ffffffff81e87230 t nbio_v6_1_get_memsize +ffffffff81e872a0 t nbio_v6_1_sdma_doorbell_range +ffffffff81e87330 t nbio_v6_1_enable_doorbell_aperture +ffffffff81e87420 t nbio_v6_1_enable_doorbell_selfring_aperture +ffffffff81e87580 t nbio_v6_1_ih_doorbell_range +ffffffff81e87690 t nbio_v6_1_update_medium_grain_clock_gating +ffffffff81e87730 t nbio_v6_1_update_medium_grain_light_sleep +ffffffff81e877d0 t nbio_v6_1_get_clockgating_state +ffffffff81e87850 t nbio_v6_1_ih_control +ffffffff81e879a0 t nbio_v6_1_init_registers +ffffffff81e87a70 t nbio_v6_1_remap_hdp_registers +ffffffff81e87b80 t nbio_v6_1_program_aspm +ffffffff81e88000 t nbio_v7_0_get_hdp_flush_req_offset +ffffffff81e88040 t nbio_v7_0_get_hdp_flush_done_offset +ffffffff81e88080 t nbio_v7_0_get_pcie_index_offset +ffffffff81e880c0 t nbio_v7_0_get_pcie_data_offset +ffffffff81e88100 t nbio_v7_0_get_rev_id +ffffffff81e88180 t nbio_v7_0_mc_access_enable +ffffffff81e88230 t nbio_v7_0_get_memsize +ffffffff81e882a0 t nbio_v7_0_sdma_doorbell_range +ffffffff81e88330 t nbio_v7_0_vcn_doorbell_range +ffffffff81e883b0 t nbio_v7_0_enable_doorbell_aperture +ffffffff81e884a0 t nbio_v7_0_enable_doorbell_selfring_aperture +ffffffff81e884d0 t nbio_v7_0_ih_doorbell_range +ffffffff81e885e0 t nbio_v7_0_update_medium_grain_clock_gating +ffffffff81e88710 t nbio_v7_0_update_medium_grain_light_sleep +ffffffff81e887b0 t nbio_v7_0_get_clockgating_state +ffffffff81e88830 t nbio_v7_0_ih_control +ffffffff81e88980 t nbio_v7_0_init_registers +ffffffff81e889d0 t nbio_v7_0_remap_hdp_registers +ffffffff81e88ae0 t nbio_7_0_read_syshub_ind_mmr +ffffffff81e88bb0 t nbio_7_0_write_syshub_ind_mmr +ffffffff81e89000 t nbio_v7_2_get_hdp_flush_req_offset +ffffffff81e89040 t nbio_v7_2_get_hdp_flush_done_offset +ffffffff81e89080 t nbio_v7_2_get_pcie_index_offset +ffffffff81e890c0 t nbio_v7_2_get_pcie_data_offset +ffffffff81e89100 t nbio_v7_2_get_pcie_port_index_offset +ffffffff81e89130 t nbio_v7_2_get_pcie_port_data_offset +ffffffff81e89170 t nbio_v7_2_get_rev_id +ffffffff81e89250 t nbio_v7_2_mc_access_enable +ffffffff81e89390 t nbio_v7_2_get_memsize +ffffffff81e89400 t nbio_v7_2_sdma_doorbell_range +ffffffff81e894a0 t nbio_v7_2_vcn_doorbell_range +ffffffff81e89520 t nbio_v7_2_enable_doorbell_aperture +ffffffff81e89600 t nbio_v7_2_enable_doorbell_selfring_aperture +ffffffff81e89760 t nbio_v7_2_ih_doorbell_range +ffffffff81e897f0 t nbio_v7_2_update_medium_grain_clock_gating +ffffffff81e898b0 t nbio_v7_2_update_medium_grain_light_sleep +ffffffff81e89a40 t nbio_v7_2_get_clockgating_state +ffffffff81e89ad0 t nbio_v7_2_ih_control +ffffffff81e89c20 t nbio_v7_2_init_registers +ffffffff81e89de0 t nbio_v7_2_remap_hdp_registers +ffffffff81e8a000 t nbio_v7_4_query_ras_error_count +ffffffff81e8a1a0 t nbio_v7_4_handle_ras_controller_intr_no_bifring +ffffffff81e8a3e0 t nbio_v7_4_handle_ras_err_event_athub_intr_no_bifring +ffffffff81e8a590 t nbio_v7_4_init_ras_controller_interrupt +ffffffff81e8a5d0 t nbio_v7_4_init_ras_err_event_athub_interrupt +ffffffff81e8a610 t nbio_v7_4_get_hdp_flush_req_offset +ffffffff81e8a650 t nbio_v7_4_get_hdp_flush_done_offset +ffffffff81e8a690 t nbio_v7_4_get_pcie_index_offset +ffffffff81e8a6d0 t nbio_v7_4_get_pcie_data_offset +ffffffff81e8a710 t nbio_v7_4_get_rev_id +ffffffff81e8a7d0 t nbio_v7_4_mc_access_enable +ffffffff81e8a880 t nbio_v7_4_get_memsize +ffffffff81e8a8f0 t nbio_v7_4_sdma_doorbell_range +ffffffff81e8a9c0 t nbio_v7_4_vcn_doorbell_range +ffffffff81e8aa60 t nbio_v7_4_enable_doorbell_aperture +ffffffff81e8ab50 t nbio_v7_4_enable_doorbell_selfring_aperture +ffffffff81e8acb0 t nbio_v7_4_ih_doorbell_range +ffffffff81e8adc0 t nbio_v7_4_enable_doorbell_interrupt +ffffffff81e8af00 t nbio_v7_4_update_medium_grain_clock_gating +ffffffff81e8af30 t nbio_v7_4_update_medium_grain_light_sleep +ffffffff81e8afd0 t nbio_v7_4_get_clockgating_state +ffffffff81e8b050 t nbio_v7_4_ih_control +ffffffff81e8b1a0 t nbio_v7_4_init_registers +ffffffff81e8b290 t nbio_v7_4_remap_hdp_registers +ffffffff81e8b3a0 t nbio_v7_4_program_aspm +ffffffff81e8b7b0 t nbio_v7_4_set_ras_controller_irq_state +ffffffff81e8b940 t nbio_v7_4_process_ras_controller_irq +ffffffff81e8b970 t nbio_v7_4_set_ras_err_event_athub_irq_state +ffffffff81e8bb00 t nbio_v7_4_process_err_event_athub_irq +ffffffff81e8c000 t nbio_v7_7_get_hdp_flush_req_offset +ffffffff81e8c040 t nbio_v7_7_get_hdp_flush_done_offset +ffffffff81e8c080 t nbio_v7_7_get_pcie_index_offset +ffffffff81e8c0c0 t nbio_v7_7_get_pcie_data_offset +ffffffff81e8c100 t nbio_v7_7_get_pcie_port_index_offset +ffffffff81e8c130 t nbio_v7_7_get_pcie_port_data_offset +ffffffff81e8c170 t nbio_v7_7_get_rev_id +ffffffff81e8c1f0 t nbio_v7_7_mc_access_enable +ffffffff81e8c2a0 t nbio_v7_7_get_memsize +ffffffff81e8c310 t nbio_v7_7_sdma_doorbell_range +ffffffff81e8c3a0 t nbio_v7_7_vcn_doorbell_range +ffffffff81e8c420 t nbio_v7_7_enable_doorbell_aperture +ffffffff81e8c500 t nbio_v7_7_enable_doorbell_selfring_aperture +ffffffff81e8c660 t nbio_v7_7_ih_doorbell_range +ffffffff81e8c770 t nbio_v7_7_update_medium_grain_clock_gating +ffffffff81e8c8b0 t nbio_v7_7_update_medium_grain_light_sleep +ffffffff81e8cac0 t nbio_v7_7_get_clockgating_state +ffffffff81e8cbd0 t nbio_v7_7_ih_control +ffffffff81e8cd20 t nbio_v7_7_init_registers +ffffffff81e8ce20 t nbio_v7_7_remap_hdp_registers +ffffffff81e8d000 T nv_grbm_select +ffffffff81e8d0a0 T nv_set_virt_ops +ffffffff81e8d0e0 t nv_common_early_init +ffffffff81e8d4d0 t nv_common_late_init +ffffffff81e8d540 t nv_common_sw_init +ffffffff81e8d580 t nv_common_sw_fini +ffffffff81e8d5b0 t nv_common_hw_init +ffffffff81e8d6c0 t nv_common_hw_fini +ffffffff81e8d720 t nv_common_suspend +ffffffff81e8d780 t nv_common_resume +ffffffff81e8d7c0 t nv_common_is_idle +ffffffff81e8d7f0 t nv_common_wait_for_idle +ffffffff81e8d820 t nv_common_soft_reset +ffffffff81e8d850 t nv_common_set_clockgating_state +ffffffff81e8d920 t nv_common_set_powergating_state +ffffffff81e8d950 t nv_common_get_clockgating_state +ffffffff81e8d9c0 t nv_pcie_rreg +ffffffff81e8da20 t nv_pcie_wreg +ffffffff81e8da80 t nv_pcie_rreg64 +ffffffff81e8dae0 t nv_pcie_wreg64 +ffffffff81e8db40 t nv_didt_rreg +ffffffff81e8dbe0 t nv_didt_wreg +ffffffff81e8dc60 t nv_read_disabled_bios +ffffffff81e8dc90 t nv_read_register +ffffffff81e8dd70 t nv_vga_set_state +ffffffff81e8dda0 t nv_asic_reset +ffffffff81e8dee0 t nv_asic_reset_method +ffffffff81e8dfd0 t nv_get_xclk +ffffffff81e8e000 t nv_set_uvd_clocks +ffffffff81e8e030 t nv_set_vce_clocks +ffffffff81e8e060 t nv_get_config_memsize +ffffffff81e8e080 t nv_need_full_reset +ffffffff81e8e0b0 t nv_init_doorbell_index +ffffffff81e8e1e0 t nv_need_reset_on_init +ffffffff81e8e270 t nv_get_pcie_replay_count +ffffffff81e8e2a0 t nv_pre_asic_init +ffffffff81e8e2d0 t nv_update_umd_stable_pstate +ffffffff81e8e390 t nv_query_video_codecs +ffffffff81e8f000 T psp_v10_0_set_psp_funcs +ffffffff81e8f030 t psp_v10_0_init_microcode +ffffffff81e8f2a0 t psp_v10_0_ring_init +ffffffff81e8f320 t psp_v10_0_ring_create +ffffffff81e8f630 t psp_v10_0_ring_stop +ffffffff81e8f820 t psp_v10_0_ring_destroy +ffffffff81e8f8a0 t psp_v10_0_mode1_reset +ffffffff81e8f8f0 t psp_v10_0_ring_get_wptr +ffffffff81e8f950 t psp_v10_0_ring_set_wptr +ffffffff81e90000 T psp_v11_0_set_psp_funcs +ffffffff81e90030 t psp_v11_0_init_microcode +ffffffff81e90450 t psp_v11_0_bootloader_load_kdb +ffffffff81e90470 t psp_v11_0_bootloader_load_spl +ffffffff81e90490 t psp_v11_0_bootloader_load_sysdrv +ffffffff81e904b0 t psp_v11_0_bootloader_load_sos +ffffffff81e90800 t psp_v11_0_ring_init +ffffffff81e90880 t psp_v11_0_ring_create +ffffffff81e90f10 t psp_v11_0_ring_stop +ffffffff81e91130 t psp_v11_0_ring_destroy +ffffffff81e911b0 t psp_v11_0_mode1_reset +ffffffff81e912b0 t psp_v11_0_memory_training +ffffffff81e91730 t psp_v11_0_ring_get_wptr +ffffffff81e91780 t psp_v11_0_ring_set_wptr +ffffffff81e918c0 t psp_v11_0_load_usbc_pd_fw +ffffffff81e91ab0 t psp_v11_0_read_usbc_pd_fw +ffffffff81e91bd0 t psp_v11_0_bootloader_load_component +ffffffff81e91d90 t psp_v11_0_wait_for_bootloader +ffffffff81e91f60 t psp_v11_0_memory_training_send_msg +ffffffff81e93000 T psp_v11_0_8_set_psp_funcs +ffffffff81e93030 t psp_v11_0_8_ring_init +ffffffff81e930b0 t psp_v11_0_8_ring_create +ffffffff81e93740 t psp_v11_0_8_ring_stop +ffffffff81e93ad0 t psp_v11_0_8_ring_destroy +ffffffff81e93b50 t psp_v11_0_8_ring_get_wptr +ffffffff81e93bc0 t psp_v11_0_8_ring_set_wptr +ffffffff81e94000 T psp_v12_0_set_psp_funcs +ffffffff81e94030 t psp_v12_0_init_microcode +ffffffff81e942a0 t psp_v12_0_bootloader_load_sysdrv +ffffffff81e945c0 t psp_v12_0_bootloader_load_sos +ffffffff81e94920 t psp_v12_0_ring_init +ffffffff81e94f00 t psp_v12_0_ring_create +ffffffff81e95460 t psp_v12_0_ring_stop +ffffffff81e95680 t psp_v12_0_ring_destroy +ffffffff81e95700 t psp_v12_0_mode1_reset +ffffffff81e95800 t psp_v12_0_ring_get_wptr +ffffffff81e95870 t psp_v12_0_ring_set_wptr +ffffffff81e96000 T psp_v13_0_set_psp_funcs +ffffffff81e96030 t psp_v13_0_init_microcode +ffffffff81e96160 t psp_v13_0_bootloader_load_kdb +ffffffff81e96180 t psp_v13_0_bootloader_load_spl +ffffffff81e961a0 t psp_v13_0_bootloader_load_sysdrv +ffffffff81e961c0 t psp_v13_0_bootloader_load_soc_drv +ffffffff81e961e0 t psp_v13_0_bootloader_load_intf_drv +ffffffff81e96200 t psp_v13_0_bootloader_load_dbg_drv +ffffffff81e96220 t psp_v13_0_bootloader_load_ras_drv +ffffffff81e96240 t psp_v13_0_bootloader_load_sos +ffffffff81e965a0 t psp_v13_0_ring_init +ffffffff81e96620 t psp_v13_0_ring_create +ffffffff81e96cb0 t psp_v13_0_ring_stop +ffffffff81e97040 t psp_v13_0_ring_destroy +ffffffff81e970c0 t psp_v13_0_memory_training +ffffffff81e97500 t psp_v13_0_ring_get_wptr +ffffffff81e97570 t psp_v13_0_ring_set_wptr +ffffffff81e97670 t psp_v13_0_load_usbc_pd_fw +ffffffff81e97860 t psp_v13_0_read_usbc_pd_fw +ffffffff81e97980 t psp_v13_0_update_spirom +ffffffff81e97b50 t psp_v13_0_vbflash_status +ffffffff81e97bb0 t psp_v13_0_bootloader_load_component +ffffffff81e97d80 t psp_v13_0_wait_for_bootloader +ffffffff81e97f50 t psp_v13_0_memory_training_send_msg +ffffffff81e980b0 t psp_v13_0_exec_spi_cmd +ffffffff81e99000 T psp_v13_0_4_set_psp_funcs +ffffffff81e99030 t psp_v13_0_4_init_microcode +ffffffff81e99100 t psp_v13_0_4_bootloader_load_kdb +ffffffff81e99120 t psp_v13_0_4_bootloader_load_spl +ffffffff81e99140 t psp_v13_0_4_bootloader_load_sysdrv +ffffffff81e99160 t psp_v13_0_4_bootloader_load_soc_drv +ffffffff81e99180 t psp_v13_0_4_bootloader_load_intf_drv +ffffffff81e991a0 t psp_v13_0_4_bootloader_load_dbg_drv +ffffffff81e991c0 t psp_v13_0_4_bootloader_load_sos +ffffffff81e99530 t psp_v13_0_4_ring_init +ffffffff81e995b0 t psp_v13_0_4_ring_create +ffffffff81e99c50 t psp_v13_0_4_ring_stop +ffffffff81e99fe0 t psp_v13_0_4_ring_destroy +ffffffff81e9a060 t psp_v13_0_4_ring_get_wptr +ffffffff81e9a0d0 t psp_v13_0_4_ring_set_wptr +ffffffff81e9a1d0 t psp_v13_0_4_bootloader_load_component +ffffffff81e9a3a0 t psp_v13_0_4_wait_for_bootloader +ffffffff81e9b000 T psp_v3_1_set_psp_funcs +ffffffff81e9b030 t psp_v3_1_init_microcode +ffffffff81e9b0f0 t psp_v3_1_bootloader_load_sysdrv +ffffffff81e9b410 t psp_v3_1_bootloader_load_sos +ffffffff81e9b770 t psp_v3_1_ring_init +ffffffff81e9b7f0 t psp_v3_1_ring_create +ffffffff81e9c2f0 t psp_v3_1_ring_stop +ffffffff81e9c510 t psp_v3_1_ring_destroy +ffffffff81e9c590 t psp_v3_1_smu_reload_quirk +ffffffff81e9c5e0 t psp_v3_1_mode1_reset +ffffffff81e9c6e0 t psp_v3_1_ring_get_wptr +ffffffff81e9c730 t psp_v3_1_ring_set_wptr +ffffffff81e9d000 t sdma_v2_4_early_init +ffffffff81e9d0e0 t sdma_v2_4_sw_init +ffffffff81e9d470 t sdma_v2_4_sw_fini +ffffffff81e9d550 t sdma_v2_4_hw_init +ffffffff81e9d910 t sdma_v2_4_hw_fini +ffffffff81e9d950 t sdma_v2_4_suspend +ffffffff81e9d990 t sdma_v2_4_resume +ffffffff81e9d9a0 t sdma_v2_4_is_idle +ffffffff81e9d9e0 t sdma_v2_4_wait_for_idle +ffffffff81e9da80 t sdma_v2_4_soft_reset +ffffffff81e9dbc0 t sdma_v2_4_set_clockgating_state +ffffffff81e9dbf0 t sdma_v2_4_set_powergating_state +ffffffff81e9dc20 t sdma_v2_4_ring_get_rptr +ffffffff81e9dc60 t sdma_v2_4_ring_get_wptr +ffffffff81e9dcc0 t sdma_v2_4_ring_set_wptr +ffffffff81e9dd00 t sdma_v2_4_ring_emit_ib +ffffffff81e9dfb0 t sdma_v2_4_ring_emit_fence +ffffffff81e9e3b0 t sdma_v2_4_ring_emit_pipeline_sync +ffffffff81e9e630 t sdma_v2_4_ring_emit_vm_flush +ffffffff81e9e8b0 t sdma_v2_4_ring_emit_hdp_flush +ffffffff81e9eb30 t sdma_v2_4_ring_test_ring +ffffffff81e9ee10 t sdma_v2_4_ring_test_ib +ffffffff81e9eff0 t sdma_v2_4_ring_insert_nop +ffffffff81e9f120 t sdma_v2_4_ring_pad_ib +ffffffff81e9f250 t sdma_v2_4_ring_emit_wreg +ffffffff81e9f3a0 t sdma_v2_4_emit_copy_buffer +ffffffff81e9f460 t sdma_v2_4_emit_fill_buffer +ffffffff81e9f4f0 t sdma_v2_4_vm_copy_pte +ffffffff81e9f5b0 t sdma_v2_4_vm_write_pte +ffffffff81e9f680 t sdma_v2_4_vm_set_pte_pde +ffffffff81e9f780 t sdma_v2_4_set_trap_irq_state +ffffffff81e9f840 t sdma_v2_4_process_trap_irq +ffffffff81e9f8e0 t sdma_v2_4_process_illegal_inst_irq +ffffffff81e9f960 t sdma_v2_4_enable +ffffffff81ea0000 t sdma_v3_0_early_init +ffffffff81ea0150 t sdma_v3_0_sw_init +ffffffff81ea0500 t sdma_v3_0_sw_fini +ffffffff81ea05e0 t sdma_v3_0_hw_init +ffffffff81ea0710 t sdma_v3_0_hw_fini +ffffffff81ea0760 t sdma_v3_0_suspend +ffffffff81ea07b0 t sdma_v3_0_resume +ffffffff81ea07c0 t sdma_v3_0_is_idle +ffffffff81ea0800 t sdma_v3_0_wait_for_idle +ffffffff81ea08a0 t sdma_v3_0_check_soft_reset +ffffffff81ea0900 t sdma_v3_0_pre_soft_reset +ffffffff81ea0950 t sdma_v3_0_soft_reset +ffffffff81ea0a20 t sdma_v3_0_post_soft_reset +ffffffff81ea0a70 t sdma_v3_0_set_clockgating_state +ffffffff81ea0cd0 t sdma_v3_0_set_powergating_state +ffffffff81ea0d00 t sdma_v3_0_get_clockgating_state +ffffffff81ea0d80 t sdma_v3_0_ring_get_rptr +ffffffff81ea0dc0 t sdma_v3_0_ring_get_wptr +ffffffff81ea0e40 t sdma_v3_0_ring_set_wptr +ffffffff81ea0ef0 t sdma_v3_0_ring_emit_ib +ffffffff81ea11a0 t sdma_v3_0_ring_emit_fence +ffffffff81ea15a0 t sdma_v3_0_ring_emit_pipeline_sync +ffffffff81ea1820 t sdma_v3_0_ring_emit_vm_flush +ffffffff81ea1aa0 t sdma_v3_0_ring_emit_hdp_flush +ffffffff81ea1d20 t sdma_v3_0_ring_test_ring +ffffffff81ea2000 t sdma_v3_0_ring_test_ib +ffffffff81ea21e0 t sdma_v3_0_ring_insert_nop +ffffffff81ea2310 t sdma_v3_0_ring_pad_ib +ffffffff81ea2440 t sdma_v3_0_ring_emit_wreg +ffffffff81ea2590 t sdma_v3_0_emit_copy_buffer +ffffffff81ea2650 t sdma_v3_0_emit_fill_buffer +ffffffff81ea26e0 t sdma_v3_0_vm_copy_pte +ffffffff81ea27a0 t sdma_v3_0_vm_write_pte +ffffffff81ea2870 t sdma_v3_0_vm_set_pte_pde +ffffffff81ea2970 t sdma_v3_0_set_trap_irq_state +ffffffff81ea2a30 t sdma_v3_0_process_trap_irq +ffffffff81ea2ad0 t sdma_v3_0_process_illegal_inst_irq +ffffffff81ea2b50 t sdma_v3_0_ctx_switch_enable +ffffffff81ea2ce0 t sdma_v3_0_enable +ffffffff81ea2e50 t sdma_v3_0_gfx_resume +ffffffff81ea4000 t sdma_v4_0_early_init +ffffffff81ea4580 t sdma_v4_0_late_init +ffffffff81ea4820 t sdma_v4_0_sw_init +ffffffff81ea4b90 t sdma_v4_0_sw_fini +ffffffff81ea4c50 t sdma_v4_0_hw_init +ffffffff81ea7bf0 t sdma_v4_0_hw_fini +ffffffff81ea7cb0 t sdma_v4_0_suspend +ffffffff81ea7d00 t sdma_v4_0_resume +ffffffff81ea7d80 t sdma_v4_0_is_idle +ffffffff81ea7eb0 t sdma_v4_0_wait_for_idle +ffffffff81ea8050 t sdma_v4_0_soft_reset +ffffffff81ea8080 t sdma_v4_0_set_clockgating_state +ffffffff81ea8580 t sdma_v4_0_set_powergating_state +ffffffff81ea8640 t sdma_v4_0_get_clockgating_state +ffffffff81ea86e0 t sdma_v4_0_query_ras_error_count +ffffffff81ea88b0 t sdma_v4_0_reset_ras_error_count +ffffffff81ea8a00 t sdma_v4_0_ring_get_rptr +ffffffff81ea8a60 t sdma_v4_0_ring_get_wptr +ffffffff81ea8c50 t sdma_v4_0_ring_set_wptr +ffffffff81ea8ed0 t sdma_v4_0_ring_emit_ib +ffffffff81ea9180 t sdma_v4_0_ring_emit_fence +ffffffff81ea95b0 t sdma_v4_0_ring_emit_pipeline_sync +ffffffff81ea9610 t sdma_v4_0_ring_emit_vm_flush +ffffffff81ea9630 t sdma_v4_0_ring_emit_hdp_flush +ffffffff81ea96d0 t sdma_v4_0_ring_test_ring +ffffffff81ea99b0 t sdma_v4_0_ring_test_ib +ffffffff81ea9b90 t sdma_v4_0_ring_insert_nop +ffffffff81ea9cc0 t sdma_v4_0_ring_pad_ib +ffffffff81ea9df0 t sdma_v4_0_ring_emit_wreg +ffffffff81ea9f40 t sdma_v4_0_ring_emit_reg_wait +ffffffff81ea9f90 t sdma_v4_0_wait_reg_mem +ffffffff81eaa2c0 t sdma_v4_0_page_ring_get_wptr +ffffffff81eaa470 t sdma_v4_0_page_ring_set_wptr +ffffffff81eaa630 t sdma_v4_0_emit_copy_buffer +ffffffff81eaa6f0 t sdma_v4_0_emit_fill_buffer +ffffffff81eaa780 t sdma_v4_0_vm_copy_pte +ffffffff81eaa840 t sdma_v4_0_vm_write_pte +ffffffff81eaa910 t sdma_v4_0_vm_set_pte_pde +ffffffff81eaaa10 t sdma_v4_0_set_trap_irq_state +ffffffff81eaabb0 t sdma_v4_0_process_trap_irq +ffffffff81eaacf0 t sdma_v4_0_process_illegal_inst_irq +ffffffff81eaae10 t sdma_v4_0_set_ecc_irq_state +ffffffff81eaafb0 t sdma_v4_0_process_vm_hole_irq +ffffffff81eab0f0 t sdma_v4_0_process_doorbell_invalid_irq +ffffffff81eab230 t sdma_v4_0_process_pool_timeout_irq +ffffffff81eab370 t sdma_v4_0_process_srbm_write_irq +ffffffff81eab4b0 t sdma_v4_0_process_ras_data_cb +ffffffff81eab530 t sdma_v4_0_ctx_switch_enable +ffffffff81eabbe0 t sdma_v4_0_enable +ffffffff81eac180 t sdma_v4_0_gfx_enable +ffffffff81ead000 t sdma_v4_4_query_ras_error_count +ffffffff81ead270 t sdma_v4_4_reset_ras_error_count +ffffffff81eae000 t sdma_v5_0_early_init +ffffffff81eae170 t sdma_v5_0_sw_init +ffffffff81eae410 t sdma_v5_0_sw_fini +ffffffff81eae4a0 t sdma_v5_0_hw_init +ffffffff81eaf750 t sdma_v5_0_hw_fini +ffffffff81eaf7b0 t sdma_v5_0_suspend +ffffffff81eaf810 t sdma_v5_0_resume +ffffffff81eaf820 t sdma_v5_0_is_idle +ffffffff81eaf8b0 t sdma_v5_0_wait_for_idle +ffffffff81eaf970 t sdma_v5_0_soft_reset +ffffffff81eaf9a0 t sdma_v5_0_set_clockgating_state +ffffffff81eafba0 t sdma_v5_0_set_powergating_state +ffffffff81eafbd0 t sdma_v5_0_get_clockgating_state +ffffffff81eafc70 t sdma_v5_0_ring_get_rptr +ffffffff81eafcd0 t sdma_v5_0_ring_get_wptr +ffffffff81eafe70 t sdma_v5_0_ring_set_wptr +ffffffff81eb01d0 t sdma_v5_0_ring_emit_ib +ffffffff81eb0490 t sdma_v5_0_ring_emit_fence +ffffffff81eb0900 t sdma_v5_0_ring_emit_pipeline_sync +ffffffff81eb0b80 t sdma_v5_0_ring_emit_vm_flush +ffffffff81eb0ba0 t sdma_v5_0_ring_emit_hdp_flush +ffffffff81eb0e40 t sdma_v5_0_ring_test_ring +ffffffff81eb1200 t sdma_v5_0_ring_test_ib +ffffffff81eb1530 t sdma_v5_0_ring_insert_nop +ffffffff81eb1660 t sdma_v5_0_ring_pad_ib +ffffffff81eb1790 t sdma_v5_0_ring_init_cond_exec +ffffffff81eb19c0 t sdma_v5_0_ring_patch_cond_exec +ffffffff81eb1a80 t sdma_v5_0_ring_emit_wreg +ffffffff81eb1bd0 t sdma_v5_0_ring_emit_reg_wait +ffffffff81eb1e50 t sdma_v5_0_ring_emit_reg_write_reg_wait +ffffffff81eb1ed0 t sdma_v5_0_ring_preempt_ib +ffffffff81eb2010 t sdma_v5_0_ring_emit_mem_sync +ffffffff81eb2220 t sdma_v5_0_emit_copy_buffer +ffffffff81eb22e0 t sdma_v5_0_emit_fill_buffer +ffffffff81eb2370 t sdma_v5_0_vm_copy_pte +ffffffff81eb2430 t sdma_v5_0_vm_write_pte +ffffffff81eb2500 t sdma_v5_0_vm_set_pte_pde +ffffffff81eb2600 t sdma_v5_0_set_trap_irq_state +ffffffff81eb2690 t sdma_v5_0_process_trap_irq +ffffffff81eb27a0 t sdma_v5_0_process_illegal_inst_irq +ffffffff81eb27d0 t sdma_v5_0_mqd_init +ffffffff81eb28b0 t sdma_v5_0_ctx_switch_enable +ffffffff81eb2bb0 t sdma_v5_0_enable +ffffffff81eb3000 t sdma_v5_2_early_init +ffffffff81eb3170 t sdma_v5_2_sw_init +ffffffff81eb33a0 t sdma_v5_2_sw_fini +ffffffff81eb3430 t sdma_v5_2_hw_init +ffffffff81eb3770 t sdma_v5_2_hw_fini +ffffffff81eb37d0 t sdma_v5_2_suspend +ffffffff81eb3830 t sdma_v5_2_resume +ffffffff81eb3840 t sdma_v5_2_is_idle +ffffffff81eb3900 t sdma_v5_2_wait_for_idle +ffffffff81eb3a00 t sdma_v5_2_soft_reset +ffffffff81eb3ca0 t sdma_v5_2_set_clockgating_state +ffffffff81eb3fc0 t sdma_v5_2_set_powergating_state +ffffffff81eb3ff0 t sdma_v5_2_get_clockgating_state +ffffffff81eb4080 t sdma_v5_2_ring_get_rptr +ffffffff81eb40e0 t sdma_v5_2_ring_get_wptr +ffffffff81eb4220 t sdma_v5_2_ring_set_wptr +ffffffff81eb43e0 t sdma_v5_2_ring_emit_ib +ffffffff81eb46a0 t sdma_v5_2_ring_emit_fence +ffffffff81eb4b10 t sdma_v5_2_ring_emit_pipeline_sync +ffffffff81eb4d90 t sdma_v5_2_ring_emit_vm_flush +ffffffff81eb4db0 t sdma_v5_2_ring_emit_hdp_flush +ffffffff81eb5050 t sdma_v5_2_ring_test_ring +ffffffff81eb5410 t sdma_v5_2_ring_test_ib +ffffffff81eb5740 t sdma_v5_2_ring_insert_nop +ffffffff81eb5870 t sdma_v5_2_ring_pad_ib +ffffffff81eb59a0 t sdma_v5_2_ring_init_cond_exec +ffffffff81eb5bd0 t sdma_v5_2_ring_patch_cond_exec +ffffffff81eb5c90 t sdma_v5_2_ring_emit_wreg +ffffffff81eb5de0 t sdma_v5_2_ring_emit_reg_wait +ffffffff81eb6060 t sdma_v5_2_ring_emit_reg_write_reg_wait +ffffffff81eb60e0 t sdma_v5_2_ring_preempt_ib +ffffffff81eb6250 t sdma_v5_2_ring_emit_mem_sync +ffffffff81eb6460 t sdma_v5_2_emit_copy_buffer +ffffffff81eb6520 t sdma_v5_2_emit_fill_buffer +ffffffff81eb65b0 t sdma_v5_2_vm_copy_pte +ffffffff81eb6670 t sdma_v5_2_vm_write_pte +ffffffff81eb6740 t sdma_v5_2_vm_set_pte_pde +ffffffff81eb6840 t sdma_v5_2_set_trap_irq_state +ffffffff81eb6900 t sdma_v5_2_process_trap_irq +ffffffff81eb6a40 t sdma_v5_2_process_illegal_inst_irq +ffffffff81eb6a70 t sdma_v5_2_mqd_init +ffffffff81eb6b50 t sdma_v5_2_ctx_switch_enable +ffffffff81eb6f50 t sdma_v5_2_enable +ffffffff81eb7360 t sdma_v5_2_gfx_resume +ffffffff81eb9000 t sdma_v6_0_early_init +ffffffff81eb9140 t sdma_v6_0_sw_init +ffffffff81eb9320 t sdma_v6_0_sw_fini +ffffffff81eb93b0 t sdma_v6_0_hw_init +ffffffff81eb93c0 t sdma_v6_0_hw_fini +ffffffff81eb9410 t sdma_v6_0_suspend +ffffffff81eb9460 t sdma_v6_0_resume +ffffffff81eb9470 t sdma_v6_0_is_idle +ffffffff81eb9500 t sdma_v6_0_wait_for_idle +ffffffff81eb95c0 t sdma_v6_0_check_soft_reset +ffffffff81eb9680 t sdma_v6_0_soft_reset +ffffffff81eb9b20 t sdma_v6_0_set_clockgating_state +ffffffff81eb9b50 t sdma_v6_0_set_powergating_state +ffffffff81eb9b80 t sdma_v6_0_get_clockgating_state +ffffffff81eb9bb0 t sdma_v6_0_ring_get_rptr +ffffffff81eb9c10 t sdma_v6_0_ring_get_wptr +ffffffff81eb9c80 t sdma_v6_0_ring_set_wptr +ffffffff81eb9fe0 t sdma_v6_0_ring_emit_ib +ffffffff81eba2a0 t sdma_v6_0_ring_emit_fence +ffffffff81eba710 t sdma_v6_0_ring_emit_pipeline_sync +ffffffff81eba990 t sdma_v6_0_ring_emit_vm_flush +ffffffff81eba9b0 t sdma_v6_0_ring_emit_hdp_flush +ffffffff81ebac50 t sdma_v6_0_ring_test_ring +ffffffff81ebb010 t sdma_v6_0_ring_test_ib +ffffffff81ebb340 t sdma_v6_0_ring_insert_nop +ffffffff81ebb470 t sdma_v6_0_ring_pad_ib +ffffffff81ebb5a0 t sdma_v6_0_ring_init_cond_exec +ffffffff81ebb7d0 t sdma_v6_0_ring_patch_cond_exec +ffffffff81ebb890 t sdma_v6_0_ring_emit_wreg +ffffffff81ebb9e0 t sdma_v6_0_ring_emit_reg_wait +ffffffff81ebbc60 t sdma_v6_0_ring_emit_reg_write_reg_wait +ffffffff81ebbce0 t sdma_v6_0_ring_preempt_ib +ffffffff81ebbe30 t sdma_v6_0_ring_emit_mem_sync +ffffffff81ebc040 t sdma_v6_0_emit_copy_buffer +ffffffff81ebc100 t sdma_v6_0_emit_fill_buffer +ffffffff81ebc190 t sdma_v6_0_vm_copy_pte +ffffffff81ebc250 t sdma_v6_0_vm_write_pte +ffffffff81ebc320 t sdma_v6_0_vm_set_pte_pde +ffffffff81ebc420 t sdma_v6_0_set_trap_irq_state +ffffffff81ebc4b0 t sdma_v6_0_process_trap_irq +ffffffff81ebc5e0 t sdma_v6_0_process_illegal_inst_irq +ffffffff81ebc610 t sdma_v6_0_mqd_init +ffffffff81ebc730 t sdma_v6_0_start +ffffffff81ebc9b0 t sdma_v6_0_enable +ffffffff81ebcb30 t sdma_v6_0_gfx_resume +ffffffff81ebdbb0 t sdma_v6_0_gfx_stop +ffffffff81ebe000 T sienna_cichlid_reset_init +ffffffff81ebe0c0 t sienna_cichlid_async_reset +ffffffff81ebe120 t sienna_cichlid_get_reset_handler +ffffffff81ebe180 T sienna_cichlid_reset_fini +ffffffff81ebe1e0 t sienna_cichlid_mode2_prepare_hwcontext +ffffffff81ebe330 t sienna_cichlid_mode2_perform_reset +ffffffff81ebe3b0 t sienna_cichlid_mode2_restore_hwcontext +ffffffff81ebe6a0 t sienna_cichlid_mode2_reset +ffffffff81ebf000 T smu_v11_0_i2c_control_init +ffffffff81ebf0d0 T smu_v11_0_i2c_control_fini +ffffffff81ebf110 t smu_v11_0_i2c_xfer +ffffffff81ec01f0 t smu_v11_0_i2c_func +ffffffff81ec0220 t smu_v11_0_i2c_enable +ffffffff81ec0360 t smu_v11_0_i2c_abort +ffffffff81ec0460 t lock_bus +ffffffff81ec0500 t trylock_bus +ffffffff81ec0550 t unlock_bus +ffffffff81ec1000 t smuio_v11_0_get_rom_index_offset +ffffffff81ec1040 t smuio_v11_0_get_rom_data_offset +ffffffff81ec1080 t smuio_v11_0_update_rom_clock_gating +ffffffff81ec11c0 t smuio_v11_0_get_clock_gating_state +ffffffff81ec2000 t smuio_v11_0_6_get_rom_index_offset +ffffffff81ec2040 t smuio_v11_0_6_get_rom_data_offset +ffffffff81ec2080 t smuio_v11_0_6_update_rom_clock_gating +ffffffff81ec21c0 t smuio_v11_0_6_get_clock_gating_state +ffffffff81ec3000 t smuio_v13_0_get_rom_index_offset +ffffffff81ec3040 t smuio_v13_0_get_rom_data_offset +ffffffff81ec3080 t smuio_v13_0_update_rom_clock_gating +ffffffff81ec31c0 t smuio_v13_0_get_clock_gating_state +ffffffff81ec3260 t smuio_v13_0_get_die_id +ffffffff81ec32e0 t smuio_v13_0_get_socket_id +ffffffff81ec3360 t smuio_v13_0_is_host_gpu_xgmi_supported +ffffffff81ec4000 t smuio_v13_0_6_get_rom_index_offset +ffffffff81ec4040 t smuio_v13_0_6_get_rom_data_offset +ffffffff81ec5000 t smuio_v9_0_get_rom_index_offset +ffffffff81ec5040 t smuio_v9_0_get_rom_data_offset +ffffffff81ec5080 t smuio_v9_0_update_rom_clock_gating +ffffffff81ec51c0 t smuio_v9_0_get_clock_gating_state +ffffffff81ec6000 T soc15_grbm_select +ffffffff81ec6080 T soc15_program_register_sequence +ffffffff81ec6280 T soc15_set_virt_ops +ffffffff81ec62f0 t soc15_common_early_init +ffffffff81ec6680 t soc15_common_late_init +ffffffff81ec66c0 t soc15_common_sw_init +ffffffff81ec6720 t soc15_common_sw_fini +ffffffff81ec6770 t soc15_common_hw_init +ffffffff81ec68a0 t soc15_common_hw_fini +ffffffff81ec6970 t soc15_common_suspend +ffffffff81ec69b0 t soc15_common_resume +ffffffff81ec69f0 t soc15_common_is_idle +ffffffff81ec6a20 t soc15_common_wait_for_idle +ffffffff81ec6a50 t soc15_common_soft_reset +ffffffff81ec6a80 t soc15_common_set_clockgating_state +ffffffff81ec6dc0 t soc15_common_set_powergating_state +ffffffff81ec6df0 t soc15_common_get_clockgating_state +ffffffff81ec6ed0 t soc15_pcie_rreg +ffffffff81ec6f30 t soc15_pcie_wreg +ffffffff81ec6f90 t soc15_pcie_rreg64 +ffffffff81ec6ff0 t soc15_pcie_wreg64 +ffffffff81ec7050 t soc15_uvd_ctx_rreg +ffffffff81ec70f0 t soc15_uvd_ctx_wreg +ffffffff81ec7180 t soc15_didt_rreg +ffffffff81ec7220 t soc15_didt_wreg +ffffffff81ec72a0 t soc15_gc_cac_rreg +ffffffff81ec73c0 t soc15_gc_cac_wreg +ffffffff81ec74d0 t soc15_se_cac_rreg +ffffffff81ec75f0 t soc15_se_cac_wreg +ffffffff81ec7700 t soc15_read_disabled_bios +ffffffff81ec7730 t soc15_read_register +ffffffff81ec7830 t soc15_vga_set_state +ffffffff81ec7860 t soc15_asic_reset +ffffffff81ec7960 t soc15_asic_reset_method +ffffffff81ec7ae0 t soc15_get_xclk +ffffffff81ec7b30 t soc15_set_uvd_clocks +ffffffff81ec7b60 t soc15_set_vce_clocks +ffffffff81ec7b90 t soc15_get_config_memsize +ffffffff81ec7bb0 t soc15_need_full_reset +ffffffff81ec7be0 t soc15_get_pcie_usage +ffffffff81ec7d10 t soc15_need_reset_on_init +ffffffff81ec7db0 t soc15_get_pcie_replay_count +ffffffff81ec7e20 t soc15_supports_baco +ffffffff81ec7e80 t soc15_pre_asic_init +ffffffff81ec7e90 t soc15_query_video_codecs +ffffffff81ec7f40 t vega20_get_pcie_usage +ffffffff81ec9000 T soc21_grbm_select +ffffffff81ec9080 t soc21_common_early_init +ffffffff81ec92d0 t soc21_common_late_init +ffffffff81ec9300 t soc21_common_sw_init +ffffffff81ec9330 t soc21_common_sw_fini +ffffffff81ec9360 t soc21_common_hw_init +ffffffff81ec9430 t soc21_common_hw_fini +ffffffff81ec9490 t soc21_common_suspend +ffffffff81ec94f0 t soc21_common_resume +ffffffff81ec95c0 t soc21_common_is_idle +ffffffff81ec95f0 t soc21_common_wait_for_idle +ffffffff81ec9620 t soc21_common_soft_reset +ffffffff81ec9650 t soc21_common_set_clockgating_state +ffffffff81ec9700 t soc21_common_set_powergating_state +ffffffff81ec9760 t soc21_common_get_clockgating_state +ffffffff81ec97b0 t soc21_pcie_rreg +ffffffff81ec9810 t soc21_pcie_wreg +ffffffff81ec9870 t soc21_pcie_rreg64 +ffffffff81ec98d0 t soc21_pcie_wreg64 +ffffffff81ec9930 t soc21_didt_rreg +ffffffff81ec99d0 t soc21_didt_wreg +ffffffff81ec9a50 t soc21_read_disabled_bios +ffffffff81ec9a80 t soc21_read_register +ffffffff81ec9b70 t soc21_vga_set_state +ffffffff81ec9ba0 t soc21_asic_reset +ffffffff81ec9c80 t soc21_asic_reset_method +ffffffff81ec9d40 t soc21_get_xclk +ffffffff81ec9d70 t soc21_set_uvd_clocks +ffffffff81ec9da0 t soc21_set_vce_clocks +ffffffff81ec9dd0 t soc21_get_config_memsize +ffffffff81ec9df0 t soc21_need_full_reset +ffffffff81ec9e50 t soc21_init_doorbell_index +ffffffff81ec9f70 t soc21_need_reset_on_init +ffffffff81eca000 t soc21_get_pcie_replay_count +ffffffff81eca030 t soc21_pre_asic_init +ffffffff81eca060 t soc21_update_umd_stable_pstate +ffffffff81eca0d0 t soc21_query_video_codecs +ffffffff81ecb000 t tonga_ih_early_init +ffffffff81ecb050 t tonga_ih_sw_init +ffffffff81ecb0d0 t tonga_ih_sw_fini +ffffffff81ecb110 t tonga_ih_hw_init +ffffffff81ecb300 t tonga_ih_hw_fini +ffffffff81ecb3a0 t tonga_ih_suspend +ffffffff81ecb440 t tonga_ih_resume +ffffffff81ecb480 t tonga_ih_is_idle +ffffffff81ecb4d0 t tonga_ih_wait_for_idle +ffffffff81ecb570 t tonga_ih_check_soft_reset +ffffffff81ecb5d0 t tonga_ih_pre_soft_reset +ffffffff81ecb680 t tonga_ih_soft_reset +ffffffff81ecb750 t tonga_ih_post_soft_reset +ffffffff81ecb790 t tonga_ih_set_clockgating_state +ffffffff81ecb7c0 t tonga_ih_set_powergating_state +ffffffff81ecb7f0 t tonga_ih_get_wptr +ffffffff81ecb8e0 t tonga_ih_decode_iv +ffffffff81ecb960 t tonga_ih_set_rptr +ffffffff81ecc000 t umc_v6_0_init_registers +ffffffff81ecd000 t umc_v6_1_query_ras_error_count +ffffffff81ecd4e0 t umc_v6_1_query_ras_error_address +ffffffff81ecd7c0 t umc_v6_1_err_cnt_init +ffffffff81ece000 t umc_v6_7_query_ras_error_count +ffffffff81ece410 t umc_v6_7_query_ras_error_address +ffffffff81ece590 t umc_v6_7_query_ras_poison_mode +ffffffff81ece5f0 t umc_v6_7_convert_error_address +ffffffff81ece8f0 t umc_v6_7_ecc_info_query_ras_error_count +ffffffff81eceb30 t umc_v6_7_ecc_info_query_ras_error_address +ffffffff81ecf000 t umc_v8_10_query_ras_error_count +ffffffff81ecf280 t umc_v8_10_query_ras_error_address +ffffffff81ecf5b0 t umc_v8_10_err_cnt_init +ffffffff81ecf730 t umc_v8_10_query_ras_poison_mode +ffffffff81ed0000 t umc_v8_7_query_ras_error_count +ffffffff81ed0310 t umc_v8_7_query_ras_error_address +ffffffff81ed04c0 t umc_v8_7_err_cnt_init +ffffffff81ed0610 t umc_v8_7_ecc_info_query_ras_error_count +ffffffff81ed0740 t umc_v8_7_ecc_info_query_ras_error_address +ffffffff81ed1000 t uvd_v5_0_early_init +ffffffff81ed1050 t uvd_v5_0_sw_init +ffffffff81ed1140 t uvd_v5_0_sw_fini +ffffffff81ed1190 t uvd_v5_0_hw_init +ffffffff81ed16a0 t uvd_v5_0_hw_fini +ffffffff81ed1720 t uvd_v5_0_suspend +ffffffff81ed1820 t uvd_v5_0_resume +ffffffff81ed1870 t uvd_v5_0_is_idle +ffffffff81ed18c0 t uvd_v5_0_wait_for_idle +ffffffff81ed1950 t uvd_v5_0_soft_reset +ffffffff81ed19f0 t uvd_v5_0_set_clockgating_state +ffffffff81ed1b90 t uvd_v5_0_set_powergating_state +ffffffff81ed1bd0 t uvd_v5_0_get_clockgating_state +ffffffff81ed1c50 t uvd_v5_0_ring_get_rptr +ffffffff81ed1c90 t uvd_v5_0_ring_get_wptr +ffffffff81ed1cd0 t uvd_v5_0_ring_set_wptr +ffffffff81ed1d00 t uvd_v5_0_ring_emit_ib +ffffffff81ed1f70 t uvd_v5_0_ring_emit_fence +ffffffff81ed2520 t uvd_v5_0_ring_test_ring +ffffffff81ed26c0 t uvd_v5_0_ring_insert_nop +ffffffff81ed2820 t uvd_v5_0_set_interrupt_state +ffffffff81ed2850 t uvd_v5_0_process_interrupt +ffffffff81ed28b0 t uvd_v5_0_stop +ffffffff81ed29c0 t uvd_v5_0_start +ffffffff81ed4000 t uvd_v6_0_early_init +ffffffff81ed4140 t uvd_v6_0_sw_init +ffffffff81ed4460 t uvd_v6_0_sw_fini +ffffffff81ed4520 t uvd_v6_0_hw_init +ffffffff81ed4ae0 t uvd_v6_0_hw_fini +ffffffff81ed4b60 t uvd_v6_0_suspend +ffffffff81ed4c60 t uvd_v6_0_resume +ffffffff81ed4cb0 t uvd_v6_0_is_idle +ffffffff81ed4d00 t uvd_v6_0_wait_for_idle +ffffffff81ed4d90 t uvd_v6_0_check_soft_reset +ffffffff81ed4e10 t uvd_v6_0_pre_soft_reset +ffffffff81ed4e50 t uvd_v6_0_soft_reset +ffffffff81ed4f20 t uvd_v6_0_post_soft_reset +ffffffff81ed4fc0 t uvd_v6_0_set_clockgating_state +ffffffff81ed5150 t uvd_v6_0_set_powergating_state +ffffffff81ed51c0 t uvd_v6_0_get_clockgating_state +ffffffff81ed5250 t uvd_v6_0_ring_get_rptr +ffffffff81ed5290 t uvd_v6_0_ring_get_wptr +ffffffff81ed52d0 t uvd_v6_0_ring_set_wptr +ffffffff81ed5300 t uvd_v6_0_ring_emit_ib +ffffffff81ed5660 t uvd_v6_0_ring_emit_fence +ffffffff81ed5c10 t uvd_v6_0_ring_emit_pipeline_sync +ffffffff81ed6010 t uvd_v6_0_ring_emit_vm_flush +ffffffff81ed6370 t uvd_v6_0_ring_emit_hdp_flush +ffffffff81ed63a0 t uvd_v6_0_ring_test_ring +ffffffff81ed6540 t uvd_v6_0_ring_insert_nop +ffffffff81ed66a0 t uvd_v6_0_ring_emit_wreg +ffffffff81ed6920 t uvd_v6_0_enc_ring_get_rptr +ffffffff81ed6980 t uvd_v6_0_enc_ring_get_wptr +ffffffff81ed69e0 t uvd_v6_0_enc_ring_set_wptr +ffffffff81ed6a20 t uvd_v6_0_enc_ring_emit_ib +ffffffff81ed6c60 t uvd_v6_0_enc_ring_emit_fence +ffffffff81ed6ea0 t uvd_v6_0_enc_ring_emit_pipeline_sync +ffffffff81ed7050 t uvd_v6_0_enc_ring_emit_vm_flush +ffffffff81ed7260 t uvd_v6_0_enc_ring_test_ring +ffffffff81ed73b0 t uvd_v6_0_enc_ring_test_ib +ffffffff81ed7970 t uvd_v6_0_enc_ring_insert_end +ffffffff81ed7a00 t uvd_v6_0_set_interrupt_state +ffffffff81ed7a30 t uvd_v6_0_process_interrupt +ffffffff81ed7b20 t uvd_v6_0_stop +ffffffff81ed7c30 t uvd_v6_0_start +ffffffff81ed9000 t uvd_v7_0_early_init +ffffffff81ed9270 t uvd_v7_0_sw_init +ffffffff81ed95f0 t uvd_v7_0_sw_fini +ffffffff81ed9700 t uvd_v7_0_hw_init +ffffffff81edc610 t uvd_v7_0_hw_fini +ffffffff81edc920 t uvd_v7_0_suspend +ffffffff81edc9d0 t uvd_v7_0_resume +ffffffff81edca20 t uvd_v7_0_set_clockgating_state +ffffffff81edca50 t uvd_v7_0_ring_get_rptr +ffffffff81edcaf0 t uvd_v7_0_ring_get_wptr +ffffffff81edcb90 t uvd_v7_0_ring_set_wptr +ffffffff81edcc10 t uvd_v7_0_ring_patch_cs_in_place +ffffffff81edcc90 t uvd_v7_0_ring_emit_ib +ffffffff81edd040 t uvd_v7_0_ring_emit_fence +ffffffff81edd6a0 t uvd_v7_0_ring_emit_vm_flush +ffffffff81edd710 t uvd_v7_0_ring_emit_hdp_flush +ffffffff81edd740 t uvd_v7_0_ring_test_ring +ffffffff81edd9d0 t uvd_v7_0_ring_insert_nop +ffffffff81eddb70 t uvd_v7_0_ring_emit_wreg +ffffffff81edde40 t uvd_v7_0_ring_emit_reg_wait +ffffffff81ede1e0 t uvd_v7_0_enc_ring_get_rptr +ffffffff81ede2d0 t uvd_v7_0_enc_ring_get_wptr +ffffffff81ede3d0 t uvd_v7_0_enc_ring_set_wptr +ffffffff81ede4d0 t uvd_v7_0_enc_ring_emit_ib +ffffffff81ede710 t uvd_v7_0_enc_ring_emit_fence +ffffffff81ede950 t uvd_v7_0_enc_ring_emit_vm_flush +ffffffff81ede9c0 t uvd_v7_0_enc_ring_test_ring +ffffffff81edeb20 t uvd_v7_0_enc_ring_test_ib +ffffffff81edf0e0 t uvd_v7_0_enc_ring_insert_end +ffffffff81edf170 t uvd_v7_0_enc_ring_emit_wreg +ffffffff81edf2d0 t uvd_v7_0_enc_ring_emit_reg_wait +ffffffff81edf490 t uvd_v7_0_set_interrupt_state +ffffffff81edf4c0 t uvd_v7_0_process_interrupt +ffffffff81ee0000 t vce_v3_0_early_init +ffffffff81ee0180 t vce_v3_0_sw_init +ffffffff81ee02d0 t vce_v3_0_sw_fini +ffffffff81ee0320 t vce_v3_0_hw_init +ffffffff81ee0400 t vce_v3_0_hw_fini +ffffffff81ee04f0 t vce_v3_0_suspend +ffffffff81ee05c0 t vce_v3_0_resume +ffffffff81ee0610 t vce_v3_0_is_idle +ffffffff81ee0680 t vce_v3_0_wait_for_idle +ffffffff81ee0730 t vce_v3_0_check_soft_reset +ffffffff81ee0830 t vce_v3_0_pre_soft_reset +ffffffff81ee08d0 t vce_v3_0_soft_reset +ffffffff81ee09a0 t vce_v3_0_post_soft_reset +ffffffff81ee0b00 t vce_v3_0_set_clockgating_state +ffffffff81ee0df0 t vce_v3_0_set_powergating_state +ffffffff81ee1640 t vce_v3_0_get_clockgating_state +ffffffff81ee1700 t vce_v3_0_ring_get_rptr +ffffffff81ee17d0 t vce_v3_0_ring_get_wptr +ffffffff81ee18a0 t vce_v3_0_ring_set_wptr +ffffffff81ee1960 t vce_v3_0_ring_emit_ib +ffffffff81ee1ba0 t vce_v3_0_emit_pipeline_sync +ffffffff81ee1d50 t vce_v3_0_emit_vm_flush +ffffffff81ee1fc0 t vce_v3_0_set_interrupt_state +ffffffff81ee2030 t vce_v3_0_process_interrupt +ffffffff81ee20f0 t vce_v3_0_stop +ffffffff81ee3000 t vce_v4_0_early_init +ffffffff81ee30b0 t vce_v4_0_sw_init +ffffffff81ee32e0 t vce_v4_0_sw_fini +ffffffff81ee3360 t vce_v4_0_hw_init +ffffffff81ee3b40 t vce_v4_0_hw_fini +ffffffff81ee3be0 t vce_v4_0_suspend +ffffffff81ee3e00 t vce_v4_0_resume +ffffffff81ee3eb0 t vce_v4_0_set_clockgating_state +ffffffff81ee3ee0 t vce_v4_0_set_powergating_state +ffffffff81ee3fc0 t vce_v4_0_ring_get_rptr +ffffffff81ee4030 t vce_v4_0_ring_get_wptr +ffffffff81ee40c0 t vce_v4_0_ring_set_wptr +ffffffff81ee4150 t vce_v4_0_ring_emit_ib +ffffffff81ee4390 t vce_v4_0_ring_emit_fence +ffffffff81ee45d0 t vce_v4_0_emit_vm_flush +ffffffff81ee4640 t vce_v4_0_ring_insert_end +ffffffff81ee46d0 t vce_v4_0_emit_wreg +ffffffff81ee4830 t vce_v4_0_emit_reg_wait +ffffffff81ee49f0 t vce_v4_0_set_interrupt_state +ffffffff81ee4a80 t vce_v4_0_process_interrupt +ffffffff81ee4b20 t vce_v4_0_start +ffffffff81ee5500 t vce_v4_0_stop +ffffffff81ee6000 T vcn_dec_sw_ring_emit_fence +ffffffff81ee6240 T vcn_dec_sw_ring_insert_end +ffffffff81ee62d0 T vcn_dec_sw_ring_emit_ib +ffffffff81ee6510 T vcn_dec_sw_ring_emit_reg_wait +ffffffff81ee66d0 T vcn_dec_sw_ring_emit_vm_flush +ffffffff81ee6740 T vcn_dec_sw_ring_emit_wreg +ffffffff81ee7000 T vcn_v1_0_set_pg_for_begin_use +ffffffff81ee7150 T vcn_v1_0_ring_end_use +ffffffff81ee71c0 t vcn_v1_0_early_init +ffffffff81ee7340 t vcn_v1_0_sw_init +ffffffff81ee75e0 t vcn_v1_0_sw_fini +ffffffff81ee7640 t vcn_v1_0_hw_init +ffffffff81ee7720 t vcn_v1_0_hw_fini +ffffffff81ee7820 t vcn_v1_0_suspend +ffffffff81ee7890 t vcn_v1_0_resume +ffffffff81ee7980 t vcn_v1_0_is_idle +ffffffff81ee7a10 t vcn_v1_0_wait_for_idle +ffffffff81ee7b00 t vcn_v1_0_set_clockgating_state +ffffffff81ee7bb0 t vcn_v1_0_set_powergating_state +ffffffff81ee8540 t vcn_v1_0_dec_ring_get_rptr +ffffffff81ee85d0 t vcn_v1_0_dec_ring_get_wptr +ffffffff81ee8660 t vcn_v1_0_dec_ring_set_wptr +ffffffff81ee8770 t vcn_v1_0_ring_patch_cs_in_place +ffffffff81ee8940 t vcn_v1_0_dec_ring_emit_ib +ffffffff81ee8cd0 t vcn_v1_0_dec_ring_emit_fence +ffffffff81ee9300 t vcn_v1_0_dec_ring_emit_vm_flush +ffffffff81ee9370 t vcn_v1_0_dec_ring_insert_nop +ffffffff81ee9500 t vcn_v1_0_dec_ring_insert_start +ffffffff81ee96e0 t vcn_v1_0_dec_ring_insert_end +ffffffff81ee97f0 t vcn_v1_0_ring_begin_use +ffffffff81ee9890 t vcn_v1_0_dec_ring_emit_wreg +ffffffff81ee9b40 t vcn_v1_0_dec_ring_emit_reg_wait +ffffffff81ee9ec0 t vcn_v1_0_enc_ring_get_rptr +ffffffff81ee9f90 t vcn_v1_0_enc_ring_get_wptr +ffffffff81eea060 t vcn_v1_0_enc_ring_set_wptr +ffffffff81eea120 t vcn_v1_0_enc_ring_emit_ib +ffffffff81eea360 t vcn_v1_0_enc_ring_emit_fence +ffffffff81eea5a0 t vcn_v1_0_enc_ring_emit_vm_flush +ffffffff81eea610 t vcn_v1_0_enc_ring_insert_end +ffffffff81eea6a0 t vcn_v1_0_enc_ring_emit_wreg +ffffffff81eea800 t vcn_v1_0_enc_ring_emit_reg_wait +ffffffff81eea9c0 t vcn_v1_0_set_interrupt_state +ffffffff81eea9f0 t vcn_v1_0_process_interrupt +ffffffff81eeaaa0 t vcn_v1_0_idle_work_handler +ffffffff81eeac30 t vcn_v1_0_pause_dpg_mode +ffffffff81eebd50 t vcn_v1_0_enable_clock_gating +ffffffff81eec160 t vcn_v1_0_disable_clock_gating +ffffffff81eec6f0 t vcn_1_0_enable_static_power_gating +ffffffff81eec910 t vcn_v1_0_start_dpg_mode +ffffffff81ef0540 t vcn_v1_0_start_spg_mode +ffffffff81ef2760 t vcn_v1_0_clock_gating_dpg_mode +ffffffff81ef3000 T vcn_v2_0_dec_ring_insert_start +ffffffff81ef31c0 T vcn_v2_0_dec_ring_insert_end +ffffffff81ef32c0 T vcn_v2_0_dec_ring_insert_nop +ffffffff81ef3430 T vcn_v2_0_dec_ring_emit_fence +ffffffff81ef39f0 T vcn_v2_0_dec_ring_emit_ib +ffffffff81ef3d50 T vcn_v2_0_dec_ring_emit_reg_wait +ffffffff81ef40a0 T vcn_v2_0_dec_ring_emit_vm_flush +ffffffff81ef4110 T vcn_v2_0_dec_ring_emit_wreg +ffffffff81ef43a0 T vcn_v2_0_enc_ring_emit_fence +ffffffff81ef45e0 T vcn_v2_0_enc_ring_insert_end +ffffffff81ef4670 T vcn_v2_0_enc_ring_emit_ib +ffffffff81ef48b0 T vcn_v2_0_enc_ring_emit_reg_wait +ffffffff81ef4a70 T vcn_v2_0_enc_ring_emit_vm_flush +ffffffff81ef4ae0 T vcn_v2_0_enc_ring_emit_wreg +ffffffff81ef4c40 T vcn_v2_0_dec_ring_test_ring +ffffffff81ef4ee0 t vcn_v2_0_early_init +ffffffff81ef5060 t vcn_v2_0_sw_init +ffffffff81ef5370 t vcn_v2_0_sw_fini +ffffffff81ef53f0 t vcn_v2_0_hw_init +ffffffff81ef5da0 t vcn_v2_0_hw_fini +ffffffff81ef5ea0 t vcn_v2_0_suspend +ffffffff81ef5ed0 t vcn_v2_0_resume +ffffffff81ef5f20 t vcn_v2_0_is_idle +ffffffff81ef5fb0 t vcn_v2_0_wait_for_idle +ffffffff81ef60a0 t vcn_v2_0_set_clockgating_state +ffffffff81ef6130 t vcn_v2_0_set_powergating_state +ffffffff81ef83f0 t vcn_v2_0_dec_ring_get_rptr +ffffffff81ef8480 t vcn_v2_0_dec_ring_get_wptr +ffffffff81ef8520 t vcn_v2_0_dec_ring_set_wptr +ffffffff81ef8650 t vcn_v2_0_enc_ring_get_rptr +ffffffff81ef8720 t vcn_v2_0_enc_ring_get_wptr +ffffffff81ef8810 t vcn_v2_0_enc_ring_set_wptr +ffffffff81ef8900 t vcn_v2_0_set_interrupt_state +ffffffff81ef8930 t vcn_v2_0_process_interrupt +ffffffff81ef89e0 t vcn_v2_0_pause_dpg_mode +ffffffff81ef9340 t vcn_v2_0_enable_clock_gating +ffffffff81ef95c0 t vcn_v2_0_disable_clock_gating +ffffffff81ef99c0 t vcn_v2_0_enable_static_power_gating +ffffffff81ef9ba0 t vcn_v2_0_start_dpg_mode +ffffffff81efe660 t vcn_v2_0_clock_gating_dpg_mode +ffffffff81eff000 t vcn_v2_6_query_poison_status +ffffffff81eff0d0 t vcn_v2_5_early_init +ffffffff81eff410 t vcn_v2_5_sw_init +ffffffff81eff890 t vcn_v2_5_sw_fini +ffffffff81eff960 t vcn_v2_5_hw_init +ffffffff81f00420 t vcn_v2_5_hw_fini +ffffffff81f00560 t vcn_v2_5_suspend +ffffffff81f00590 t vcn_v2_5_resume +ffffffff81f005e0 t vcn_v2_5_is_idle +ffffffff81f006d0 t vcn_v2_5_wait_for_idle +ffffffff81f00800 t vcn_v2_5_set_clockgating_state +ffffffff81f00880 t vcn_v2_5_set_powergating_state +ffffffff81f01160 t vcn_v2_5_dec_ring_get_rptr +ffffffff81f01200 t vcn_v2_5_dec_ring_get_wptr +ffffffff81f012b0 t vcn_v2_5_dec_ring_set_wptr +ffffffff81f01360 t vcn_v2_5_enc_ring_get_rptr +ffffffff81f01450 t vcn_v2_5_enc_ring_get_wptr +ffffffff81f01550 t vcn_v2_5_enc_ring_set_wptr +ffffffff81f01650 t vcn_v2_5_set_interrupt_state +ffffffff81f01680 t vcn_v2_5_process_interrupt +ffffffff81f017a0 t vcn_v2_5_pause_dpg_mode +ffffffff81f02110 t vcn_v2_5_enable_clock_gating +ffffffff81f02410 t vcn_v2_5_disable_clock_gating +ffffffff81f02930 t vcn_v2_5_start +ffffffff81f06530 t vcn_v2_5_clock_gating_dpg_mode +ffffffff81f06ed0 t vcn_v2_5_mc_resume_dpg_mode +ffffffff81f0a000 t vcn_v3_0_early_init +ffffffff81f0a220 t vcn_v3_0_sw_init +ffffffff81f0a6d0 t vcn_v3_0_sw_fini +ffffffff81f0a7b0 t vcn_v3_0_hw_init +ffffffff81f0b350 t vcn_v3_0_hw_fini +ffffffff81f0b450 t vcn_v3_0_suspend +ffffffff81f0b480 t vcn_v3_0_resume +ffffffff81f0b4d0 t vcn_v3_0_is_idle +ffffffff81f0b5c0 t vcn_v3_0_wait_for_idle +ffffffff81f0b6f0 t vcn_v3_0_set_clockgating_state +ffffffff81f0b800 t vcn_v3_0_set_powergating_state +ffffffff81f0e080 t vcn_v3_0_dec_ring_get_rptr +ffffffff81f0e120 t vcn_v3_0_dec_ring_get_wptr +ffffffff81f0e1d0 t vcn_v3_0_dec_ring_set_wptr +ffffffff81f0e340 t vcn_v3_0_ring_patch_cs_in_place +ffffffff81f0e640 t vcn_v3_0_enc_ring_get_rptr +ffffffff81f0e730 t vcn_v3_0_enc_ring_get_wptr +ffffffff81f0e830 t vcn_v3_0_enc_ring_set_wptr +ffffffff81f0e930 t vcn_v3_0_set_interrupt_state +ffffffff81f0e960 t vcn_v3_0_process_interrupt +ffffffff81f0ea50 t vcn_v3_0_pause_dpg_mode +ffffffff81f0f3c0 t vcn_v3_0_enable_clock_gating +ffffffff81f0f640 t vcn_v3_0_disable_clock_gating +ffffffff81f0fbe0 t vcn_v3_0_start_dpg_mode +ffffffff81f14980 t vcn_v3_0_clock_gating_dpg_mode +ffffffff81f16000 t vcn_v4_0_early_init +ffffffff81f16120 t vcn_v4_0_sw_init +ffffffff81f16380 t vcn_v4_0_sw_fini +ffffffff81f16460 t vcn_v4_0_hw_init +ffffffff81f16ea0 t vcn_v4_0_hw_fini +ffffffff81f16fb0 t vcn_v4_0_suspend +ffffffff81f16fe0 t vcn_v4_0_resume +ffffffff81f17030 t vcn_v4_0_is_idle +ffffffff81f17130 t vcn_v4_0_wait_for_idle +ffffffff81f17260 t vcn_v4_0_set_clockgating_state +ffffffff81f17370 t vcn_v4_0_set_powergating_state +ffffffff81f19920 t vcn_v4_0_unified_ring_get_rptr +ffffffff81f19a00 t vcn_v4_0_unified_ring_get_wptr +ffffffff81f19af0 t vcn_v4_0_unified_ring_set_wptr +ffffffff81f19bf0 t vcn_v4_0_ring_patch_cs_in_place +ffffffff81f19e70 t vcn_v4_0_set_interrupt_state +ffffffff81f19ea0 t vcn_v4_0_process_interrupt +ffffffff81f19f60 t vcn_v4_0_pause_dpg_mode +ffffffff81f1a320 t vcn_v4_0_enable_clock_gating +ffffffff81f1a610 t vcn_v4_0_disable_clock_gating +ffffffff81f1ab60 t vcn_v4_0_start_dpg_mode +ffffffff81f1f1f0 t vcn_v4_0_disable_clock_gating_dpg_mode +ffffffff81f20000 t vega10_ih_early_init +ffffffff81f20050 t vega10_ih_sw_init +ffffffff81f20300 t vega10_ih_sw_fini +ffffffff81f20340 t vega10_ih_hw_init +ffffffff81f206c0 t vega10_ih_hw_fini +ffffffff81f20710 t vega10_ih_suspend +ffffffff81f20760 t vega10_ih_resume +ffffffff81f20770 t vega10_ih_is_idle +ffffffff81f207a0 t vega10_ih_wait_for_idle +ffffffff81f207d0 t vega10_ih_soft_reset +ffffffff81f20800 t vega10_ih_set_clockgating_state +ffffffff81f20940 t vega10_ih_set_powergating_state +ffffffff81f20970 t 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bios_parser_enable_disp_power_gating +ffffffff81f55460 t firmware_parser_destroy +ffffffff81f55520 t bios_get_board_layout_info +ffffffff81f559d0 t bios_parser_pack_data_tables +ffffffff81f55a00 t bios_get_atom_dc_golden_table +ffffffff81f55b40 t bios_parser_enable_lvtma_control +ffffffff81f55b90 t bios_parser_get_soc_bb_info +ffffffff81f55ca0 t bios_parser_get_disp_connector_caps_info +ffffffff81f55e00 t bios_parser_get_lttpr_caps +ffffffff81f55f50 t bios_parser_get_lttpr_interop +ffffffff81f56090 t bios_parser_get_connector_speed_cap_info +ffffffff81f561e0 t get_bios_object +ffffffff81f56340 t get_bios_object_from_path_v3 +ffffffff81f57000 T object_id_from_bios_object_id +ffffffff81f58000 T bios_get_image +ffffffff81f58050 T bios_is_accelerated_mode +ffffffff81f580b0 T bios_set_scratch_acc_mode_change +ffffffff81f580f0 T bios_set_scratch_critical_state +ffffffff81f58130 T bios_get_vga_enabled_displays +ffffffff81f59000 T dal_bios_parser_create +ffffffff81f59070 T dal_bios_parser_destroy +ffffffff81f5a000 T dal_bios_parser_init_cmd_tbl +ffffffff81f5a800 t encoder_control_digx_v3 +ffffffff81f5a900 t encoder_control_digx_v4 +ffffffff81f5aa00 t encoder_control_digx_v5 +ffffffff81f5ab50 t encoder_control_dig1_v1 +ffffffff81f5abd0 t encoder_control_dig2_v1 +ffffffff81f5ac50 t encoder_control_dig_v1 +ffffffff81f5acb0 t transmitter_control_v2 +ffffffff81f5ae50 t transmitter_control_v3 +ffffffff81f5b010 t transmitter_control_v4 +ffffffff81f5b1c0 t transmitter_control_v1_5 +ffffffff81f5b340 t transmitter_control_v1_6 +ffffffff81f5b4b0 t set_pixel_clock_v3 +ffffffff81f5b620 t set_pixel_clock_v5 +ffffffff81f5b7c0 t set_pixel_clock_v6 +ffffffff81f5b970 t set_pixel_clock_v7 +ffffffff81f5bb40 t enable_spread_spectrum_on_ppll_v1 +ffffffff81f5bc60 t enable_spread_spectrum_on_ppll_v2 +ffffffff81f5bd90 t enable_spread_spectrum_on_ppll_v3 +ffffffff81f5bea0 t adjust_display_pll_v2 +ffffffff81f5bff0 t adjust_display_pll_v3 +ffffffff81f5c160 t dac1_encoder_control_v1 +ffffffff81f5c1e0 t dac2_encoder_control_v1 +ffffffff81f5c260 t dac1_output_control_v1 +ffffffff81f5c2c0 t dac2_output_control_v1 +ffffffff81f5c320 t set_crtc_using_dtd_timing_v3 +ffffffff81f5c490 t set_crtc_timing_v1 +ffffffff81f5c630 t enable_crtc_v1 +ffffffff81f5c6d0 t enable_crtc_mem_req_v1 +ffffffff81f5c770 t program_clock_v5 +ffffffff81f5c870 t program_clock_v6 +ffffffff81f5c990 t external_encoder_control_v3 +ffffffff81f5cb40 t enable_disp_power_gating_v2_1 +ffffffff81f5cc00 t set_dce_clock_v2_1 +ffffffff81f5d000 T dal_firmware_parser_init_cmd_tbl +ffffffff81f5d3d0 t encoder_control_digx_v1_5 +ffffffff81f5d5b0 t encoder_control_fallback +ffffffff81f5d610 t transmitter_control_v1_6 +ffffffff81f5d7c0 t transmitter_control_v1_7 +ffffffff81f5d9b0 t transmitter_control_fallback +ffffffff81f5da10 t set_pixel_clock_v7 +ffffffff81f5dc70 t set_pixel_clock_fallback +ffffffff81f5dcd0 t set_crtc_using_dtd_timing_v3 +ffffffff81f5de40 t enable_crtc_v1 +ffffffff81f5dee0 t external_encoder_control_v3 +ffffffff81f5df10 t enable_disp_power_gating_v2_1 +ffffffff81f5e070 t enable_disp_power_gating_fallback +ffffffff81f5e0d0 t set_dce_clock_v2_1 +ffffffff81f5e1f0 t get_smu_clock_info_v3_1 +ffffffff81f5e260 t enable_lvtma_control +ffffffff81f5f000 T dal_bios_parser_init_cmd_tbl_helper +ffffffff81f5f0a0 T dal_cmd_table_helper_controller_id_to_atom +ffffffff81f5f1c0 T dal_cmd_table_helper_transmitter_bp_to_atom +ffffffff81f5f240 T dal_cmd_table_helper_encoder_mode_bp_to_atom +ffffffff81f5f2d0 T dal_cmd_table_helper_assign_control_parameter +ffffffff81f5f390 T dal_cmd_table_helper_clock_source_id_to_ref_clk_src +ffffffff81f5f470 T dal_cmd_table_helper_encoder_id_to_atom +ffffffff81f60000 T dal_bios_parser_init_cmd_tbl_helper2 +ffffffff81f600b0 T dal_cmd_table_helper_controller_id_to_atom2 +ffffffff81f601c0 T dal_cmd_table_helper_transmitter_bp_to_atom2 +ffffffff81f60240 T dal_cmd_table_helper_encoder_mode_bp_to_atom2 +ffffffff81f602d0 T dal_cmd_table_helper_clock_source_id_to_ref_clk_src2 +ffffffff81f603b0 T dal_cmd_table_helper_encoder_id_to_atom2 +ffffffff81f61000 T dal_cmd_tbl_helper_dce110_get_table +ffffffff81f61030 t encoder_action_to_atom +ffffffff81f610b0 t engine_bp_to_atom +ffffffff81f61100 t clock_source_id_to_atom +ffffffff81f611a0 t clock_source_id_to_atom_phy_clk_src_id +ffffffff81f611f0 t signal_type_to_atom_dig_mode +ffffffff81f61250 t hpd_sel_to_atom +ffffffff81f61290 t dig_encoder_sel_to_atom +ffffffff81f612c0 t phy_id_to_atom +ffffffff81f61300 t disp_power_gating_action_to_atom +ffffffff81f62000 T dal_cmd_tbl_helper_dce112_get_table2 ffffffff81f62030 t encoder_action_to_atom ffffffff81f620b0 t engine_bp_to_atom ffffffff81f62100 t clock_source_id_to_atom -ffffffff81f621a0 t clock_source_id_to_atom_phy_clk_src_id -ffffffff81f621f0 t signal_type_to_atom_dig_mode -ffffffff81f62250 t hpd_sel_to_atom -ffffffff81f62290 t dig_encoder_sel_to_atom -ffffffff81f622c0 t phy_id_to_atom -ffffffff81f62300 t disp_power_gating_action_to_atom -ffffffff81f63000 T dal_cmd_tbl_helper_dce112_get_table2 +ffffffff81f621d0 t clock_source_id_to_atom_phy_clk_src_id +ffffffff81f62220 t signal_type_to_atom_dig_mode +ffffffff81f62280 t hpd_sel_to_atom +ffffffff81f622c0 t dig_encoder_sel_to_atom +ffffffff81f622f0 t phy_id_to_atom +ffffffff81f62330 t disp_power_gating_action_to_atom +ffffffff81f623a0 t dc_clock_type_to_atom +ffffffff81f62420 t transmitter_color_depth_to_atom +ffffffff81f63000 T dal_cmd_tbl_helper_dce112_get_table ffffffff81f63030 t encoder_action_to_atom ffffffff81f630b0 t engine_bp_to_atom ffffffff81f63100 t clock_source_id_to_atom @@ -29484,7 +29496,7 @@ ffffffff81f632f0 t phy_id_to_atom ffffffff81f63330 t disp_power_gating_action_to_atom ffffffff81f633a0 t dc_clock_type_to_atom ffffffff81f63420 t transmitter_color_depth_to_atom -ffffffff81f64000 T dal_cmd_tbl_helper_dce112_get_table +ffffffff81f64000 T dal_cmd_tbl_helper_dce80_get_table ffffffff81f64030 t encoder_action_to_atom ffffffff81f640b0 t engine_bp_to_atom ffffffff81f64100 t clock_source_id_to_atom @@ -29492,25596 +29504,25584 @@ ffffffff81f641d0 t clock_source_id_to_atom_phy_clk_src ffffffff81f64220 t signal_type_to_atom_dig_mode ffffffff81f64280 t hpd_sel_to_atom ffffffff81f642c0 t dig_encoder_sel_to_atom -ffffffff81f642f0 t phy_id_to_atom -ffffffff81f64330 t disp_power_gating_action_to_atom -ffffffff81f643a0 t dc_clock_type_to_atom -ffffffff81f64420 t transmitter_color_depth_to_atom -ffffffff81f65000 T dal_cmd_tbl_helper_dce80_get_table -ffffffff81f65030 t encoder_action_to_atom -ffffffff81f650b0 t engine_bp_to_atom -ffffffff81f65100 t clock_source_id_to_atom -ffffffff81f651d0 t clock_source_id_to_atom_phy_clk_src_id -ffffffff81f65220 t signal_type_to_atom_dig_mode -ffffffff81f65280 t hpd_sel_to_atom -ffffffff81f652c0 t dig_encoder_sel_to_atom -ffffffff81f65310 t phy_id_to_atom -ffffffff81f65350 t disp_power_gating_action_to_atom -ffffffff81f66000 T clk_mgr_helper_get_active_display_cnt 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dce112_set_dispclk -ffffffff81f692d0 T dce112_set_dprefclk -ffffffff81f69340 T dce112_clk_mgr_construct -ffffffff81f693f0 t dce112_update_clocks -ffffffff81f6a000 T dce120_clk_mgr_construct -ffffffff81f6a090 T dce121_clk_mgr_construct -ffffffff81f6a1c0 t dce12_update_clocks -ffffffff81f6b000 T rv1_clk_mgr_construct -ffffffff81f6b0c0 t rv1_update_clocks -ffffffff81f6b5b0 t rv1_init_clocks -ffffffff81f6b640 t rv1_enable_pme_wa -ffffffff81f6c000 T rv1_vbios_smu_set_dispclk -ffffffff81f6c0f0 t rv1_vbios_smu_send_msg_with_param -ffffffff81f6c200 T rv1_vbios_smu_set_dprefclk -ffffffff81f6d000 T rv2_clk_mgr_construct -ffffffff81f6e000 T dentist_get_did_from_divider -ffffffff81f6e090 T dcn20_update_clocks_update_dpp_dto -ffffffff81f6e160 T dcn20_update_clocks_update_dentist -ffffffff81f6e680 T dcn2_update_clocks -ffffffff81f6ebf0 T dcn2_read_clocks_from_hw_dentist -ffffffff81f6ecc0 T dcn2_update_clocks_fpga -ffffffff81f6ee40 T dcn2_init_clocks -ffffffff81f6eee0 T dcn2_get_clock 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rn_vbios_smu_set_dppclk -ffffffff81f73560 T rn_vbios_smu_set_dcn_low_power_state -ffffffff81f73580 T rn_vbios_smu_enable_48mhz_tmdp_refclk_pwrdwn -ffffffff81f735a0 T rn_vbios_smu_enable_pme_wa -ffffffff81f735c0 T rn_vbios_smu_is_periodic_retraining_disabled -ffffffff81f74000 T dcn3_init_clocks -ffffffff81f743d0 t dcn3_init_clocks_fpga -ffffffff81f743e0 T dcn3_clk_mgr_construct -ffffffff81f74540 T dcn3_clk_mgr_destroy -ffffffff81f745b0 t dcn3_update_clocks -ffffffff81f74a10 t dcn3_enable_pme_wa -ffffffff81f74a50 t dcn3_are_clock_states_equal -ffffffff81f74ab0 t dcn3_notify_wm_ranges -ffffffff81f74d40 t dcn30_notify_link_rate_change -ffffffff81f74e60 t dcn3_set_hard_min_memclk -ffffffff81f74f00 t dcn3_set_hard_max_memclk -ffffffff81f74f60 t dcn3_set_max_memclk -ffffffff81f74fa0 t dcn3_set_min_memclk -ffffffff81f74fe0 t dcn3_get_memclk_states_from_smu -ffffffff81f75120 t dcn3_is_smu_present -ffffffff81f76000 T dcn30_smu_test_message -ffffffff81f76070 t dcn30_smu_send_msg_with_param -ffffffff81f761d0 T dcn30_smu_get_smu_version -ffffffff81f761f0 T dcn30_smu_check_driver_if_version -ffffffff81f76240 T dcn30_smu_check_msg_header_version -ffffffff81f76290 T dcn30_smu_set_dram_addr_high -ffffffff81f762b0 T dcn30_smu_set_dram_addr_low -ffffffff81f762d0 T dcn30_smu_transfer_wm_table_smu_2_dram -ffffffff81f762f0 T dcn30_smu_transfer_wm_table_dram_2_smu -ffffffff81f76310 T dcn30_smu_set_hard_min_by_freq -ffffffff81f76360 T dcn30_smu_set_hard_max_by_freq -ffffffff81f763b0 T dcn30_smu_get_dpm_freq_by_index -ffffffff81f76400 T dcn30_smu_get_dc_mode_max_dpm_freq -ffffffff81f76450 T dcn30_smu_set_min_deep_sleep_dcef_clk -ffffffff81f76470 T dcn30_smu_set_num_of_displays -ffffffff81f76490 T dcn30_smu_set_display_refresh_from_mall -ffffffff81f764c0 T dcn30_smu_set_external_client_df_cstate_allow -ffffffff81f764e0 T dcn30_smu_set_pme_workaround -ffffffff81f77000 T dcn301_smu_get_smu_version -ffffffff81f77070 t dcn301_smu_send_msg_with_param -ffffffff81f771f0 T dcn301_smu_set_dispclk -ffffffff81f77290 T dcn301_smu_set_dprefclk -ffffffff81f77340 T dcn301_smu_set_hard_min_dcfclk -ffffffff81f773e0 T dcn301_smu_set_min_deep_sleep_dcfclk -ffffffff81f77480 T dcn301_smu_set_dppclk -ffffffff81f77520 T dcn301_smu_set_display_idle_optimization -ffffffff81f77570 T dcn301_smu_enable_phy_refclk_pwrdwn -ffffffff81f775c0 T dcn301_smu_enable_pme_wa -ffffffff81f775e0 T dcn301_smu_set_dram_addr_high -ffffffff81f77630 T dcn301_smu_set_dram_addr_low -ffffffff81f77680 T dcn301_smu_transfer_dpm_table_smu_2_dram -ffffffff81f776a0 T dcn301_smu_transfer_wm_table_dram_2_smu -ffffffff81f78000 T vg_clk_mgr_construct -ffffffff81f787f0 T vg_clk_mgr_destroy -ffffffff81f78840 t vg_update_clocks -ffffffff81f78bd0 t vg_init_clocks -ffffffff81f78c70 t vg_enable_pme_wa -ffffffff81f78c80 t vg_are_clock_states_equal -ffffffff81f78cd0 t vg_notify_wm_ranges -ffffffff81f7a000 T dcn31_update_clocks -ffffffff81f7a690 T dcn31_init_clocks -ffffffff81f7a740 T dcn31_are_clock_states_equal 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dcn31_smu_transfer_wm_table_dram_2_smu -ffffffff81f7c650 T dcn31_smu_set_zstate_support -ffffffff81f7c6c0 T dcn31_smu_set_dtbclk -ffffffff81f7d000 T dcn314_update_clocks -ffffffff81f7d730 T dcn314_are_clock_states_equal -ffffffff81f7d790 T dcn314_clk_mgr_construct -ffffffff81f7e4a0 T dcn314_clk_mgr_destroy -ffffffff81f7e4f0 t dcn314_enable_pme_wa -ffffffff81f7e500 t dcn314_notify_wm_ranges -ffffffff81f7f000 T dcn314_smu_get_smu_version -ffffffff81f7f020 t dcn314_smu_send_msg_with_param -ffffffff81f7f240 T dcn314_smu_set_dispclk -ffffffff81f7f2b0 T dcn314_smu_set_dprefclk -ffffffff81f7f320 T dcn314_smu_set_hard_min_dcfclk -ffffffff81f7f3a0 T dcn314_smu_set_min_deep_sleep_dcfclk -ffffffff81f7f420 T dcn314_smu_set_dppclk -ffffffff81f7f490 T dcn314_smu_set_display_idle_optimization -ffffffff81f7f4e0 T dcn314_smu_enable_phy_refclk_pwrdwn -ffffffff81f7f530 T dcn314_smu_enable_pme_wa -ffffffff81f7f570 T dcn314_smu_set_dram_addr_high -ffffffff81f7f5b0 T dcn314_smu_set_dram_addr_low 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dcn315_smu_transfer_dpm_table_smu_2_dram -ffffffff81f82690 T dcn315_smu_transfer_wm_table_dram_2_smu -ffffffff81f826d0 T dcn315_smu_get_dpref_clk -ffffffff81f82730 T dcn315_smu_get_dtbclk -ffffffff81f82790 T dcn315_smu_set_dtbclk -ffffffff81f83000 T dcn316_clk_mgr_construct -ffffffff81f836a0 T dcn316_clk_mgr_destroy -ffffffff81f836f0 t dcn316_update_clocks -ffffffff81f83d20 t dcn316_enable_pme_wa -ffffffff81f83d30 t dcn316_notify_wm_ranges -ffffffff81f840c0 t find_clk_for_voltage -ffffffff81f85000 T dcn316_smu_get_smu_version -ffffffff81f85020 t dcn316_smu_send_msg_with_param -ffffffff81f851b0 T dcn316_smu_set_dispclk -ffffffff81f85220 T dcn316_smu_set_hard_min_dcfclk -ffffffff81f852a0 T dcn316_smu_set_min_deep_sleep_dcfclk -ffffffff81f85320 T dcn316_smu_set_dppclk -ffffffff81f85390 T dcn316_smu_set_display_idle_optimization -ffffffff81f853e0 T dcn316_smu_enable_phy_refclk_pwrdwn -ffffffff81f85430 T dcn316_smu_set_dram_addr_high -ffffffff81f85470 T dcn316_smu_set_dram_addr_low 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+ffffffff81f7c790 T dcn314_clk_mgr_construct +ffffffff81f7d4a0 T dcn314_clk_mgr_destroy +ffffffff81f7d4f0 t dcn314_enable_pme_wa +ffffffff81f7d500 t dcn314_notify_wm_ranges +ffffffff81f7e000 T dcn314_smu_get_smu_version +ffffffff81f7e020 t dcn314_smu_send_msg_with_param +ffffffff81f7e240 T dcn314_smu_set_dispclk +ffffffff81f7e2b0 T dcn314_smu_set_dprefclk +ffffffff81f7e320 T dcn314_smu_set_hard_min_dcfclk +ffffffff81f7e3a0 T dcn314_smu_set_min_deep_sleep_dcfclk +ffffffff81f7e420 T dcn314_smu_set_dppclk +ffffffff81f7e490 T dcn314_smu_set_display_idle_optimization +ffffffff81f7e4e0 T dcn314_smu_enable_phy_refclk_pwrdwn +ffffffff81f7e530 T dcn314_smu_enable_pme_wa +ffffffff81f7e570 T dcn314_smu_set_dram_addr_high +ffffffff81f7e5b0 T dcn314_smu_set_dram_addr_low +ffffffff81f7e5f0 T dcn314_smu_transfer_dpm_table_smu_2_dram +ffffffff81f7e630 T dcn314_smu_transfer_wm_table_dram_2_smu +ffffffff81f7e670 T dcn314_smu_set_zstate_support +ffffffff81f7e6c0 T dcn314_smu_set_dtbclk +ffffffff81f7f000 T dcn315_clk_mgr_construct +ffffffff81f7f9c0 T dcn315_clk_mgr_destroy +ffffffff81f7fa10 t dcn315_update_clocks +ffffffff81f80000 t dcn315_enable_pme_wa +ffffffff81f80010 t dcn315_notify_wm_ranges +ffffffff81f81000 T dcn315_smu_get_smu_version +ffffffff81f81020 t dcn315_smu_send_msg_with_param +ffffffff81f81310 T dcn315_smu_set_dispclk +ffffffff81f81380 T dcn315_smu_set_hard_min_dcfclk +ffffffff81f81400 T dcn315_smu_set_min_deep_sleep_dcfclk +ffffffff81f81480 T dcn315_smu_set_dppclk +ffffffff81f814f0 T dcn315_smu_set_display_idle_optimization +ffffffff81f81540 T dcn315_smu_enable_phy_refclk_pwrdwn +ffffffff81f81590 T dcn315_smu_enable_pme_wa +ffffffff81f815d0 T dcn315_smu_set_dram_addr_high +ffffffff81f81610 T dcn315_smu_set_dram_addr_low +ffffffff81f81650 T dcn315_smu_transfer_dpm_table_smu_2_dram +ffffffff81f81690 T dcn315_smu_transfer_wm_table_dram_2_smu +ffffffff81f816d0 T dcn315_smu_get_dpref_clk +ffffffff81f81730 T dcn315_smu_get_dtbclk +ffffffff81f81790 T dcn315_smu_set_dtbclk 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dcn316_smu_get_dpref_clk +ffffffff81f84610 T dcn316_smu_get_smu_fclk +ffffffff81f85000 T dcn32_init_clocks +ffffffff81f854e0 T dcn32_clk_mgr_construct +ffffffff81f857b0 t dcn32_dump_clk_registers +ffffffff81f859d0 T dcn32_clk_mgr_destroy +ffffffff81f85a40 t dcn32_update_clocks +ffffffff81f86190 t dcn32_enable_pme_wa +ffffffff81f861d0 t dcn32_are_clock_states_equal +ffffffff81f86240 t dcn32_notify_wm_ranges +ffffffff81f863c0 t dcn32_set_hard_min_memclk +ffffffff81f86460 t dcn32_set_hard_max_memclk +ffffffff81f864c0 t dcn32_get_memclk_states_from_smu +ffffffff81f866b0 t dcn32_is_smu_present +ffffffff81f87000 T dcn32_smu_send_fclk_pstate_message +ffffffff81f87020 t dcn32_smu_send_msg_with_param +ffffffff81f87160 T dcn32_smu_send_cab_for_uclk_message +ffffffff81f87190 T dcn32_smu_transfer_wm_table_dram_2_smu +ffffffff81f871b0 T dcn32_smu_set_pme_workaround +ffffffff81f871d0 T dcn32_smu_set_hard_min_by_freq +ffffffff81f88000 T dc_stream_adjust_vmin_vmax +ffffffff81f88170 T dc_stream_get_last_used_drr_vtotal +ffffffff81f882d0 T dc_stream_get_crtc_position +ffffffff81f88500 T dc_stream_configure_crc +ffffffff81f88750 T dc_stream_get_crc +ffffffff81f88830 T dc_stream_set_dyn_expansion +ffffffff81f88aa0 T dc_stream_set_dither_option +ffffffff81f88c10 T dc_stream_set_gamut_remap +ffffffff81f88d90 T dc_stream_program_csc_matrix +ffffffff81f88fb0 T dc_stream_set_static_screen_params +ffffffff81f89140 T dc_create +ffffffff81f89ae0 t dc_construct_ctx +ffffffff81f89c40 t dc_destruct +ffffffff81f89f10 T dc_hardware_init +ffffffff81f8a020 T dc_init_callbacks +ffffffff81f8a050 T dc_deinit_callbacks +ffffffff81f8a080 T dc_destroy +ffffffff81f8a0d0 T dc_validate_boot_timing +ffffffff81f8a460 T dc_enable_stereo +ffffffff81f8a560 T dc_trigger_sync +ffffffff81f8ab80 T dc_z10_restore +ffffffff81f8abc0 T dc_z10_save_init +ffffffff81f8ac00 T dc_commit_streams +ffffffff81f8b0a0 t commit_minimal_transition_state +ffffffff81f8b4e0 T dc_create_state +ffffffff81f8b570 t dc_commit_state_no_check +ffffffff81f8ca40 T dc_release_state +ffffffff81f8cab0 T dc_commit_state +ffffffff81f8cc00 T dc_acquire_release_mpc_3dlut +ffffffff81f8ccf0 T dc_post_update_surfaces_to_stream +ffffffff81f8d110 T dc_copy_state +ffffffff81f8d300 T dc_retain_state +ffffffff81f8d330 T dc_set_generic_gpio_for_stereo +ffffffff81f8d440 T dc_check_update_surfaces_for_stream +ffffffff81f8e060 T dc_dmub_update_dirty_rect +ffffffff81f8e2f0 T dc_update_planes_and_stream +ffffffff81f8ea60 t commit_planes_for_stream +ffffffff81f90200 T dc_commit_updates_for_stream +ffffffff81f90610 t copy_surface_update_to_plane +ffffffff81f90a10 t copy_stream_update_to_stream +ffffffff81f91040 T dc_get_current_stream_count +ffffffff81f91080 T dc_get_stream_at_index +ffffffff81f910d0 T dc_interrupt_to_irq_source +ffffffff81f910f0 T dc_interrupt_set +ffffffff81f91140 T dc_interrupt_ack +ffffffff81f91160 T dc_power_down_on_boot +ffffffff81f911b0 T dc_set_power_state +ffffffff81f913a0 T dc_resume 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dc_process_dmub_aux_transfer_async +ffffffff81f921c0 T get_link_index_from_dpia_port_index +ffffffff81f92270 T dc_process_dmub_set_config_async +ffffffff81f92360 T dc_process_dmub_set_mst_slots +ffffffff81f92450 T dc_process_dmub_dpia_hpd_int_enable +ffffffff81f92520 T dc_disable_accelerated_mode +ffffffff81f92540 T dc_notify_vsync_int_state +ffffffff81f93000 T pre_surface_trace +ffffffff81f93030 T update_surface_trace +ffffffff81f93060 T post_surface_trace +ffffffff81f93090 T context_timing_trace +ffffffff81f93240 T context_clock_trace +ffffffff81f93270 T dc_status_to_str +ffffffff81f94000 T find_color_matrix +ffffffff81f940b0 T color_space_to_black_color +ffffffff81f94140 T hwss_wait_for_blank_complete +ffffffff81f941f0 T get_mpctree_visual_confirm_color +ffffffff81f94250 T get_surface_visual_confirm_color +ffffffff81f94300 T get_hdr_visual_confirm_color +ffffffff81f943b0 T get_subvp_visual_confirm_color +ffffffff81f944a0 T get_surface_tile_visual_confirm_color +ffffffff81f95000 T get_hpd_gpio +ffffffff81f950e0 T dc_link_wait_for_t12 +ffffffff81f95140 T dc_link_detect_sink +ffffffff81f952f0 T dc_link_is_dp_sink_present +ffffffff81f95570 T reset_cur_dp_mst_topology +ffffffff81f955d0 T dc_link_detect +ffffffff81f96960 T dc_link_get_hpd_state +ffffffff81f969d0 T link_create +ffffffff81f97b20 T link_destroy +ffffffff81f97c80 T dc_link_blank_all_dp_displays +ffffffff81f97d50 T dc_link_blank_dp_stream +ffffffff81f97e60 T dc_link_blank_all_edp_displays +ffffffff81f97f20 T dc_power_alpm_dpcd_enable +ffffffff81f97f90 T dc_link_validate_mode_timing +ffffffff81f984b0 T dc_link_get_backlight_level +ffffffff81f98620 T dc_link_get_target_backlight_pwm +ffffffff81f98730 T dc_link_set_backlight_level +ffffffff81f988a0 T dc_link_set_psr_allow_active +ffffffff81f98b20 T dc_link_get_psr_state +ffffffff81f98c50 T dc_link_setup_psr +ffffffff81f990c0 T dc_link_get_psr_residency +ffffffff81f991c0 T dc_link_set_sink_vtotal_in_psr_active +ffffffff81f99240 T dc_link_get_status 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dp_get_lane_status_and_lane_adjust +ffffffff81fa0bc0 T dpcd_set_lane_settings +ffffffff81fa0c00 T dp_is_max_vs_reached +ffffffff81fa0c90 T dp_translate_training_aux_read_interval +ffffffff81fa0cd0 T dp_get_cr_failure +ffffffff81fa0d40 T dp_check_link_loss_status +ffffffff81fa0de0 T dp_decide_training_settings +ffffffff81fa1140 t decide_8b_10b_training_settings +ffffffff81fa1450 T dp_convert_to_count +ffffffff81fa14e0 T dc_link_dp_set_drive_settings +ffffffff81fa1690 T dp_set_hw_lane_settings +ffffffff81fa1840 T dc_link_dp_perform_link_training_skip_aux +ffffffff81fa1c80 t override_training_settings +ffffffff81fa1f30 T dp_set_hw_training_pattern +ffffffff81fa1f90 T dp_set_hw_test_pattern +ffffffff81fa20b0 t print_status_message +ffffffff81fa2220 T dpcd_configure_lttpr_mode +ffffffff81fa2400 T dpcd_configure_channel_coding +ffffffff81fa2470 T dc_link_dp_perform_link_training +ffffffff81fa47e0 T dp_set_fec_ready +ffffffff81fa4960 t dp_perform_8b_10b_link_training +ffffffff81fa4c40 T perform_link_training_with_retries +ffffffff81fa5290 T dp_get_panel_mode +ffffffff81fa5350 T dp_enable_link_phy +ffffffff81fa53e0 T dp_set_panel_mode +ffffffff81fa54f0 T dp_disable_link_phy +ffffffff81fa55c0 t decide_fallback_link_setting +ffffffff81fa5920 T dc_link_dp_sync_lt_begin +ffffffff81fa5a00 T dc_link_dp_sync_lt_attempt +ffffffff81fa5f30 t perform_clock_recovery_sequence +ffffffff81fa64f0 t perform_channel_equalization_sequence +ffffffff81fa6b70 T dc_link_dp_sync_lt_end +ffffffff81fa6c60 T dc_link_dp_get_max_link_enc_cap +ffffffff81fa6d50 T dp_get_max_link_cap +ffffffff81fa6f40 T dp_is_lttpr_present +ffffffff81fa6fb0 T read_hpd_rx_irq_data +ffffffff81fa7060 T hpd_rx_irq_check_link_loss_status +ffffffff81fa7160 T dp_verify_link_cap_with_retries +ffffffff81fa7870 T dp_validate_mode_timing +ffffffff81fa7930 T decide_edp_link_settings +ffffffff81fa7a70 T decide_link_settings +ffffffff81fa7eb0 t decide_edp_link_settings_with_dsc +ffffffff81fa8250 T dc_link_dp_allow_hpd_rx_irq +ffffffff81fa8290 T is_dp_branch_device +ffffffff81fa82c0 T dc_link_dp_handle_automated_test +ffffffff81fa8bc0 T dc_link_dp_handle_link_loss +ffffffff81fa9020 T dc_link_handle_hpd_rx_irq +ffffffff81fa93c0 T is_mst_supported +ffffffff81fa9470 T is_dp_active_dongle +ffffffff81fa94b0 T dc_link_bw_kbps_from_raw_frl_link_rate_data +ffffffff81fa94f0 T dp_retrieve_lttpr_cap +ffffffff81fa96e0 T dp_decide_lttpr_mode +ffffffff81fa9800 T dp_decide_8b_10b_lttpr_mode +ffffffff81fa9910 T dp_decide_128b_132b_lttpr_mode +ffffffff81fa99c0 T dp_get_lttpr_mode_override +ffffffff81fa9a90 T dp_overwrite_extended_receiver_cap +ffffffff81fa9ba0 t get_active_converter_info +ffffffff81faa010 T detect_dp_sink_caps +ffffffff81faa020 t retrieve_link_cap +ffffffff81fab1c0 T detect_edp_sink_caps +ffffffff81fab480 T dc_link_set_default_brightness_aux +ffffffff81fab580 T dc_link_dp_enable_hpd +ffffffff81fab5d0 T dc_link_dp_disable_hpd +ffffffff81fab620 T dc_link_dp_set_test_pattern +ffffffff81fac020 t set_crtc_test_pattern +ffffffff81fac4b0 T dp_enable_mst_on_sink +ffffffff81fac530 T dp_set_fec_enable +ffffffff81fac640 T dpcd_set_source_specific_data +ffffffff81fac780 T dpcd_write_cable_id_to_dprx +ffffffff81fac7f0 T dc_link_set_backlight_level_nits +ffffffff81fac8a0 T dc_link_get_backlight_level_nits +ffffffff81fac940 T dc_link_backlight_enable_aux +ffffffff81fac9b0 T dc_link_read_default_bl_aux +ffffffff81faca10 T is_edp_ilr_optimization_required +ffffffff81facc80 T dc_link_dp_mst_decide_link_encoding_format +ffffffff81facd00 T dpcd_write_128b_132b_sst_payload_allocation_table +ffffffff81facff0 T calculate_sst_avg_time_slots_per_mtp +ffffffff81fad050 T dpcd_poll_for_allocation_change_trigger +ffffffff81fad400 T is_dp_128b_132b_signal +ffffffff81fad4d0 T edp_panel_backlight_power_on +ffffffff81fad580 T dc_link_clear_dprx_states +ffffffff81fad5b0 T dp_receiver_power_ctrl +ffffffff81fad600 T dp_source_sequence_trace +ffffffff81fad660 T edp_add_delay_for_T9 +ffffffff81fad6b0 T edp_receiver_ready_T9 +ffffffff81fad780 T edp_receiver_ready_T7 +ffffffff81fad920 T dp_disable_link_phy_mst +ffffffff81fada30 T dp_retrain_link_dp_test +ffffffff81fadc50 T dp_set_dsc_on_rx +ffffffff81fadcc0 T dp_set_dsc_on_stream +ffffffff81fae290 T dp_set_dsc_enable +ffffffff81fae340 T dp_set_dsc_pps_sdp +ffffffff81fae7e0 T dp_update_dsc_config +ffffffff81fae850 t dpcd_set_lt_pattern_and_lane_settings +ffffffff81faf000 T core_link_read_dpcd +ffffffff81faf1a0 T core_link_write_dpcd +ffffffff81fb0000 T dpcd_get_tunneling_device_data +ffffffff81fb00d0 T dc_link_dpia_query_hpd_status +ffffffff81fb01f0 T dc_link_dpia_perform_link_training +ffffffff81fb1010 t dpia_training_end +ffffffff81fb2000 T link_enc_cfg_init +ffffffff81fb21b0 T link_enc_cfg_copy +ffffffff81fb21e0 T link_enc_cfg_link_encs_assign +ffffffff81fb3260 t add_link_enc_assignment +ffffffff81fb33a0 T link_enc_cfg_validate +ffffffff81fb3b10 T link_enc_cfg_link_enc_unassign +ffffffff81fb3dc0 T link_enc_cfg_is_transmitter_mappable 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resource_find_used_clk_src_for_sharing +ffffffff81fb60f0 T get_num_mpc_splits +ffffffff81fb6180 T get_num_odm_splits +ffffffff81fb61d0 T resource_build_scaling_params +ffffffff81fb7100 T resource_build_scaling_params_for_context +ffffffff81fb7250 T find_idle_secondary_pipe +ffffffff81fb72f0 T resource_get_head_pipe_for_stream +ffffffff81fb7400 T dc_add_plane_to_context +ffffffff81fb7d30 t acquire_first_split_pipe +ffffffff81fb7ee0 T dc_remove_plane_from_context +ffffffff81fb8140 T dc_rem_all_planes_for_stream +ffffffff81fb8300 T dc_add_all_planes_for_stream +ffffffff81fb8430 T is_timing_changed +ffffffff81fb8490 T dc_is_stream_unchanged +ffffffff81fb8560 T dc_is_stream_scaling_unchanged +ffffffff81fb8600 T update_audio_usage +ffffffff81fb8670 T dc_add_stream_to_ctx +ffffffff81fb8740 T dc_remove_stream_from_ctx +ffffffff81fb8b30 T resource_map_pool_resources +ffffffff81fb9540 t calculate_phy_pix_clks +ffffffff81fb9690 T dc_resource_state_copy_construct_current +ffffffff81fb96b0 T dc_resource_state_copy_construct +ffffffff81fb9870 T dc_resource_state_construct +ffffffff81fb9890 T dc_resource_is_dsc_encoding_supported +ffffffff81fb98e0 T dc_validate_with_context +ffffffff81fba4e0 t planes_changed_for_existing_stream +ffffffff81fba660 T dc_validate_global_state +ffffffff81fba9e0 T dc_resource_state_destruct +ffffffff81fbaac0 T dc_resource_find_first_free_pll +ffffffff81fbab30 T resource_build_info_frame +ffffffff81fbb140 T resource_map_clock_resources +ffffffff81fbb2d0 T pipe_need_reprogram +ffffffff81fbb440 T resource_build_bit_depth_reduction_params +ffffffff81fbb630 T dc_validate_stream +ffffffff81fbb700 T dc_validate_plane +ffffffff81fbb790 T resource_pixel_format_to_bpp +ffffffff81fbb810 T get_audio_check +ffffffff81fbb930 T get_temp_dp_link_res +ffffffff81fbba30 T reset_syncd_pipes_from_disabled_pipes +ffffffff81fbbb70 T check_syncd_pipes_for_disabled_master_pipe +ffffffff81fbbc80 T reset_sync_context_for_pipe +ffffffff81fbbd20 T resource_transmitter_to_phy_idx +ffffffff81fbbd80 T get_link_hwss +ffffffff81fbbdf0 T is_h_timing_divisible_by_2 +ffffffff81fbbe50 T dc_resource_acquire_secondary_pipe_for_mpc_odm +ffffffff81fbc050 t calculate_split_count_and_index +ffffffff81fbc1a0 t calculate_init_and_vp +ffffffff81fbd000 T dc_sink_retain +ffffffff81fbd030 T dc_sink_release +ffffffff81fbd0b0 T dc_sink_create +ffffffff81fbe000 T dc_stat_get_dmub_notification +ffffffff81fbe0b0 T dc_stat_get_dmub_dataout +ffffffff81fbf000 T update_stream_signal +ffffffff81fbf080 T dc_stream_retain +ffffffff81fbf0b0 T dc_stream_release +ffffffff81fbf160 T dc_create_stream_for_sink +ffffffff81fbf4b0 T dc_copy_stream +ffffffff81fbf590 T dc_stream_get_status_from_state +ffffffff81fbf600 T dc_stream_get_status +ffffffff81fbf680 T dc_optimize_timing_for_fsft +ffffffff81fbf6d0 T dc_stream_set_cursor_attributes +ffffffff81fbf820 t program_cursor_attributes +ffffffff81fbf980 T dc_stream_set_cursor_position +ffffffff81fbfa90 t program_cursor_position +ffffffff81fbfbc0 T dc_stream_add_writeback +ffffffff81fbfe10 T dc_stream_remove_writeback +ffffffff81fc0040 T dc_stream_warmup_writeback +ffffffff81fc0080 T dc_stream_get_vblank_counter +ffffffff81fc0140 T dc_stream_send_dp_sdp +ffffffff81fc03d0 T dc_stream_get_scanoutpos +ffffffff81fc04a0 T dc_stream_dmdata_status_done +ffffffff81fc0560 T dc_stream_set_dynamic_metadata +ffffffff81fc06d0 T dc_stream_add_dsc_to_resource +ffffffff81fc0720 T dc_stream_get_pipe_ctx +ffffffff81fc07d0 T dc_stream_log +ffffffff81fc1000 T enable_surface_flip_reporting +ffffffff81fc1030 T dc_create_plane_state +ffffffff81fc11d0 T dc_plane_get_status +ffffffff81fc1350 T dc_plane_state_retain +ffffffff81fc1380 T dc_plane_state_release +ffffffff81fc13f0 T dc_gamma_retain +ffffffff81fc1420 T dc_gamma_release +ffffffff81fc1480 T dc_create_gamma +ffffffff81fc14d0 T dc_transfer_func_retain +ffffffff81fc1500 T dc_transfer_func_release +ffffffff81fc1550 T dc_create_transfer_func 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dc_dmub_srv_get_dmub_outbox0_msg +ffffffff81fc3950 T dc_dmub_trace_event_control +ffffffff81fc3970 T dc_dmub_srv_drr_update_cmd +ffffffff81fc3a70 T dc_dmub_srv_set_drr_manual_trigger_cmd +ffffffff81fc3b80 T dc_dmub_srv_p_state_delegate +ffffffff81fc3ed0 T dc_dmub_srv_query_caps_cmd +ffffffff81fc3fc0 T dc_dmub_srv_get_visual_confirm_color_cmd +ffffffff81fc4190 T dc_dmub_setup_subvp_dmub_command +ffffffff81fc4b30 T dc_dmub_srv_get_diagnostic_data +ffffffff81fc4b70 T dc_send_update_cursor_info_to_dmu +ffffffff81fc4e20 T dc_dmub_check_min_version +ffffffff81fc5000 T dc_edid_parser_send_cea +ffffffff81fc50b0 T dc_edid_parser_recv_cea_ack +ffffffff81fc5140 T dc_edid_parser_recv_amd_vsdb +ffffffff81fc6000 T generic_reg_update_ex +ffffffff81fc6370 t set_reg_field_values +ffffffff81fc6530 T generic_reg_set_ex +ffffffff81fc6780 T generic_reg_get +ffffffff81fc67f0 T generic_reg_get2 +ffffffff81fc6880 T generic_reg_get3 +ffffffff81fc6920 T generic_reg_get4 +ffffffff81fc69d0 T generic_reg_get5 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dce_get_psr_wait_loop +ffffffff81fd0bd0 t dce_is_dmcu_initialized +ffffffff81fd0c30 t dcn10_dmcu_init +ffffffff81fd1170 t dcn10_dmcu_load_iram +ffffffff81fd13c0 t dcn10_dmcu_set_psr_enable +ffffffff81fd1550 t dcn10_dmcu_setup_psr +ffffffff81fd1910 t dcn10_get_dmcu_psr_state +ffffffff81fd1a30 t dcn10_psr_wait_loop +ffffffff81fd1b40 t dcn10_get_psr_wait_loop +ffffffff81fd1b70 t dcn10_is_dmcu_initialized +ffffffff81fd1ba0 t dcn10_send_edid_cea +ffffffff81fd1d40 t dcn10_recv_amd_vsdb +ffffffff81fd1df0 t dcn10_recv_edid_cea_ack +ffffffff81fd1e70 t dcn10_get_scp_results +ffffffff81fd1f90 t dcn20_lock_phy +ffffffff81fd20c0 t dcn20_unlock_phy +ffffffff81fd21f0 t dcn21_dmcu_init +ffffffff81fd3000 T dce_enable_fe_clock +ffffffff81fd3040 T dce_pipe_control_lock +ffffffff81fd3240 T dce_set_blender_mode +ffffffff81fd3360 T dce_clock_gating_power_up +ffffffff81fd3400 T dce_crtc_switch_to_clk_src +ffffffff81fd35c0 T dce_use_lut +ffffffff81fd4000 T dce_i2c_oem_device_present +ffffffff81fd4080 T dce_i2c_submit_command +ffffffff81fd5000 T acquire_i2c_hw_engine +ffffffff81fd53a0 T dce_i2c_submit_command_hw +ffffffff81fd5d70 t set_speed +ffffffff81fd5ec0 T dce_i2c_hw_construct +ffffffff81fd5f30 T dce100_i2c_hw_construct +ffffffff81fd5fa0 T dce112_i2c_hw_construct +ffffffff81fd6010 T dcn1_i2c_hw_construct +ffffffff81fd6080 T dcn2_i2c_hw_construct +ffffffff81fd6110 t is_hw_busy +ffffffff81fd7000 T dce_i2c_sw_construct +ffffffff81fd7030 T dce_i2c_engine_acquire_sw +ffffffff81fd70d0 T dce_i2c_submit_command_sw +ffffffff81fd78d0 t write_byte_sw +ffffffff81fd8000 T dce_ipp_construct +ffffffff81fd8050 T dce_ipp_destroy +ffffffff81fd80a0 t dce_ipp_cursor_set_position +ffffffff81fd81d0 t dce_ipp_cursor_set_attributes +ffffffff81fd8460 t dce_ipp_program_prescale +ffffffff81fd8620 t dce_ipp_program_input_lut +ffffffff81fd8ab0 t dce_ipp_set_degamma +ffffffff81fd9000 T dce110_get_dig_frontend +ffffffff81fd90c0 T dce110_link_encoder_set_dp_phy_pattern_training_pattern +ffffffff81fd9160 T dce110_psr_program_dp_dphy_fast_training +ffffffff81fd91d0 T dce110_psr_program_secondary_packet +ffffffff81fd9240 T dce110_is_dig_enabled +ffffffff81fd92a0 T dce110_link_encoder_validate_dvi_output +ffffffff81fd9350 T dce110_link_encoder_validate_dp_output +ffffffff81fd9380 T dce110_link_encoder_construct +ffffffff81fd9550 T dce110_link_encoder_validate_output_with_stream +ffffffff81fd9700 T dce110_link_encoder_hw_init +ffffffff81fd9920 T dce110_link_encoder_destroy +ffffffff81fd9970 T dce110_link_encoder_setup +ffffffff81fd9aa0 T dce110_link_encoder_enable_tmds_output +ffffffff81fd9b90 T dce110_link_encoder_enable_lvds_output +ffffffff81fd9c80 T dce110_link_encoder_enable_dp_output +ffffffff81fd9e00 T dce110_link_encoder_enable_dp_mst_output +ffffffff81fd9f80 T dce110_link_encoder_disable_output +ffffffff81fda1a0 T dce110_link_encoder_dp_set_lane_settings +ffffffff81fda340 T dce110_link_encoder_dp_set_phy_pattern +ffffffff81fdab40 t set_dp_phy_pattern_hbr2_compliance_cp2520_2 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dce110_compressor_enable_fbc +ffffffff81ff0340 T dce110_compressor_is_fbc_enabled_in_hw +ffffffff81ff03f0 T dce110_compressor_disable_fbc +ffffffff81ff06d0 T dce110_compressor_program_compressed_surface_address_and_pitch +ffffffff81ff07f0 T dce110_compressor_set_fbc_invalidation_triggers +ffffffff81ff0870 T dce110_compressor_create +ffffffff81ff0920 T dce110_compressor_construct +ffffffff81ff09a0 T dce110_compressor_destroy +ffffffff81ff09f0 T get_max_support_fbc_buffersize +ffffffff81ff1000 T dce110_update_info_frame +ffffffff81ff10d0 T dce110_enable_stream +ffffffff81ff11d0 T dce110_edp_wait_for_hpd_ready +ffffffff81ff1410 T dce110_edp_power_control +ffffffff81ff18d0 T dce110_edp_wait_for_T12 +ffffffff81ff1a60 T dce110_edp_backlight_control +ffffffff81ff1da0 T dce110_enable_audio_stream +ffffffff81ff1eb0 T dce110_disable_audio_stream +ffffffff81ff2020 T dce110_disable_stream +ffffffff81ff2160 T dce110_unblank_stream +ffffffff81ff2260 T dce110_blank_stream +ffffffff81ff23b0 T dce110_set_avmute +ffffffff81ff2400 T dce110_enable_accelerated_mode +ffffffff81ff27e0 t power_down_all_hw_blocks +ffffffff81ff29a0 T dce110_set_safe_displaymarks +ffffffff81ff2af0 T dce110_apply_ctx_to_hw +ffffffff81ff33c0 t enable_fbc +ffffffff81ff3570 T dce110_power_down +ffffffff81ff3670 T dce110_prepare_bandwidth +ffffffff81ff37b0 T dce110_optimize_bandwidth +ffffffff81ff3980 T dce110_set_backlight_level +ffffffff81ff3a90 T dce110_set_abm_immediate_disable +ffffffff81ff3b10 T dce110_set_pipe +ffffffff81ff3b80 T dce110_enable_lvds_link_output +ffffffff81ff3be0 T dce110_enable_tmds_link_output +ffffffff81ff3c50 T dce110_enable_dp_link_output +ffffffff81ff3e60 T dce110_disable_link_output +ffffffff81ff3f70 T dce110_hw_sequencer_construct +ffffffff81ff3fc0 t enable_display_pipe_clock_gating +ffffffff81ff3ff0 t build_audio_output +ffffffff81ff4150 t init_hw +ffffffff81ff4410 t dce110_power_down_fe +ffffffff81ff44e0 t dce110_apply_ctx_for_surface +ffffffff81ff4c00 t dce110_post_unlock_program_front_end +ffffffff81ff4c30 t update_plane_addr +ffffffff81ff4ca0 t dce110_wait_for_mpcc_disconnect +ffffffff81ff4cd0 t dce110_update_pending_status +ffffffff81ff4db0 t get_position +ffffffff81ff4e40 t dce110_enable_per_frame_crtc_position_reset +ffffffff81ff50f0 t dce110_enable_timing_synchronization +ffffffff81ff5400 t set_drr +ffffffff81ff54e0 t set_static_screen_control +ffffffff81ff55b0 t dce110_set_cursor_position +ffffffff81ff56f0 t dce110_set_cursor_attribute +ffffffff81ff57b0 t program_gamut_remap +ffffffff81ff5910 t program_output_csc +ffffffff81ff5a10 t init_pipes +ffffffff81ff5a40 t dce110_reset_hw_ctx_wrap +ffffffff81ff5c90 t dce110_set_input_transfer_func +ffffffff81ff5e20 t dce110_set_output_transfer_func +ffffffff81ff6760 t dce110_enable_display_power_gating +ffffffff81ff68d0 t dce110_enable_stream_timing +ffffffff81ff7000 T dce110_mem_input_v_construct +ffffffff81ff7040 t dce_mem_input_v_program_display_marks +ffffffff81ff70c0 t dce_mem_input_program_chroma_display_marks +ffffffff81ff7140 t dce110_allocate_mem_input_v +ffffffff81ff7250 t dce110_free_mem_input_v +ffffffff81ff7280 t dce_mem_input_v_program_surface_flip_and_addr +ffffffff81ff73d0 t dce_mem_input_v_program_pte_vm +ffffffff81ff76b0 t dce_mem_input_v_program_surface_config +ffffffff81ff7a70 t dce_mem_input_v_is_surface_pending +ffffffff81ff7ae0 t program_urgency_watermark +ffffffff81ff7bf0 t program_nbp_watermark +ffffffff81ff7d60 t program_stutter_watermark +ffffffff81ff8000 T dce110_opp_v_set_csc_default +ffffffff81ff8310 t program_color_matrix_v +ffffffff81ff8480 t configure_graphics_mode_v +ffffffff81ff8570 T dce110_opp_v_set_csc_adjustment +ffffffff81ff9000 T dce110_opp_program_regamma_pwl_v +ffffffff81ff94b0 t power_on_lut +ffffffff81ff95d0 T dce110_opp_power_on_regamma_lut_v +ffffffff81ff9630 T dce110_opp_set_regamma_mode_v +ffffffff81ffa000 T dce110_opp_v_construct +ffffffff81ffb000 T dce110_resource_build_pipe_hw_param +ffffffff81ffb150 T dce110_find_first_free_match_stream_enc_for_link +ffffffff81ffb1f0 T dce110_create_resource_pool +ffffffff81ffc1b0 t dce110_resource_destruct +ffffffff81ffc4e0 t dce110_destroy_resource_pool +ffffffff81ffc540 t dce110_panel_cntl_create +ffffffff81ffc5d0 t dce110_link_encoder_create +ffffffff81ffc6e0 t dce110_validate_bandwidth +ffffffff81ffc7d0 t dce110_validate_global +ffffffff81ffc890 t dce110_acquire_underlay +ffffffff81ffca70 t dce110_validate_plane +ffffffff81ffcad0 t dce110_add_stream_to_ctx +ffffffff81ffcba0 t read_dce_straps +ffffffff81ffcc00 t create_audio +ffffffff81ffcc30 t dce110_stream_encoder_create +ffffffff81ffccd0 t dce110_hwseq_create +ffffffff81ffd000 T dce110_timing_generator_set_early_control +ffffffff81ffd070 T dce110_timing_generator_enable_crtc +ffffffff81ffd100 T dce110_timing_generator_program_blank_color +ffffffff81ffd190 T dce110_timing_generator_disable_crtc +ffffffff81ffd1e0 T dce110_timing_generator_program_timing_generator +ffffffff81ffd3d0 T dce110_timing_generator_set_drr +ffffffff81ffd510 T dce110_timing_generator_set_static_screen_control +ffffffff81ffd5a0 T dce110_timing_generator_get_vblank_counter +ffffffff81ffd600 T dce110_timing_generator_get_position +ffffffff81ffd6a0 T dce110_timing_generator_get_crtc_scanoutpos +ffffffff81ffd790 T dce110_timing_generator_program_blanking +ffffffff81ffda10 T dce110_timing_generator_set_test_pattern +ffffffff81ffdd00 T dce110_timing_generator_validate_timing +ffffffff81ffdde0 T dce110_timing_generator_wait_for_vblank +ffffffff81ffdf50 T dce110_timing_generator_is_counter_moving +ffffffff81ffdfd0 T dce110_timing_generator_wait_for_vactive +ffffffff81ffe0b0 T dce110_timing_generator_setup_global_swap_lock +ffffffff81ffe210 T dce110_timing_generator_tear_down_global_swap_lock +ffffffff81ffe290 T dce110_timing_generator_enable_advanced_request +ffffffff81ffe330 T dce110_timing_generator_set_lock_master +ffffffff81ffe390 T dce110_timing_generator_enable_reset_trigger +ffffffff81ffe470 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dce110_timing_generator_v_tear_down_global_swap_lock +ffffffff82000ae0 t dce110_timing_generator_v_enable_advanced_request +ffffffff82001000 T dce110_transform_v_construct +ffffffff82001060 t dce110_xfmv_reset +ffffffff820010c0 t dce110_xfmv_set_scaler +ffffffff82001820 t dce110_xfmv_set_pixel_storage_depth +ffffffff82001900 t dce110_xfmv_set_gamut_remap +ffffffff82001930 t program_multi_taps_filter +ffffffff82001d20 t program_viewport +ffffffff82002000 T dce112_compressor_power_up_fbc +ffffffff82002130 T dce112_compressor_enable_fbc +ffffffff820022e0 T dce112_compressor_is_fbc_enabled_in_hw +ffffffff82002390 T dce112_compressor_enable_lpt +ffffffff820024a0 t wait_for_fbc_state_changed +ffffffff82002740 T dce112_compressor_disable_fbc +ffffffff82002840 T dce112_compressor_disable_lpt +ffffffff820029a0 T dce112_compressor_is_lpt_enabled_in_hw +ffffffff820029f0 T dce112_compressor_program_compressed_surface_address_and_pitch +ffffffff82002b30 T dce112_compressor_program_lpt_control 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dce120_enable_display_power_gating +ffffffff820070f0 t dce120_update_dchub +ffffffff82008000 T dce120_create_resource_pool +ffffffff820093a0 t dce120_resource_destruct +ffffffff82009680 t dce120_destroy_resource_pool +ffffffff820096e0 t dce120_panel_cntl_create +ffffffff82009770 t dce120_link_encoder_create +ffffffff82009880 t read_dce_straps +ffffffff82009910 t create_audio +ffffffff82009940 t dce120_stream_encoder_create +ffffffff820099e0 t dce121_hwseq_create +ffffffff82009a50 t dce120_hwseq_create +ffffffff8200a000 T dce120_timing_generator_construct +ffffffff8200a090 t dce120_tg_validate_timing +ffffffff8200a140 t dce120_tg_program_timing +ffffffff8200a310 t dce120_timing_generator_enable_crtc +ffffffff8200a3b0 t dce120_timing_generator_get_crtc_position +ffffffff8200a450 t dce120_timing_generator_get_vblank_counter +ffffffff8200a4b0 t dce120_timing_generator_get_crtc_scanoutpos +ffffffff8200a5a0 t dce120_timing_generator_set_early_control +ffffffff8200a5e0 t dce120_tg_wait_for_state +ffffffff8200a6f0 t dce120_tg_set_blank +ffffffff8200a7b0 t dce120_tg_is_blanked +ffffffff8200a810 t dce120_timing_generator_set_overscan_color_black +ffffffff8200a8e0 t dce120_timing_generator_program_blank_color +ffffffff8200a960 t dce120_tg_set_colors +ffffffff8200aa80 t dce120_timing_generator_disable_vga +ffffffff8200aaf0 t dce120_timing_generator_did_triggered_reset_occur +ffffffff8200ab50 t dce120_timing_generator_setup_global_swap_lock +ffffffff8200ac80 t dce120_timing_generator_enable_reset_trigger +ffffffff8200ad90 t dce120_timing_generator_disable_reset_trigger +ffffffff8200ae40 t dce120_timing_generator_tear_down_global_swap_lock +ffffffff8200af10 t dce120_timing_generator_enable_advanced_request +ffffffff8200afb0 t dce120_timing_generator_set_drr +ffffffff8200b180 t dce120_timing_generator_set_static_screen_control +ffffffff8200b200 t dce120_timing_generator_set_test_pattern +ffffffff8200b6a0 t dce120_arm_vert_intr +ffffffff8200b760 t dce120_is_tg_enabled +ffffffff8200b7c0 t dce120_configure_crc +ffffffff8200b9a0 t dce120_get_crc +ffffffff8200c000 T dce80_hw_sequencer_construct +ffffffff8200d000 T dce80_create_resource_pool +ffffffff8200de40 T dce81_create_resource_pool +ffffffff8200ec70 T dce83_create_resource_pool +ffffffff8200f940 t dce80_resource_destruct +ffffffff8200fc10 t dce80_destroy_resource_pool +ffffffff8200fc70 t dce80_panel_cntl_create +ffffffff8200fd00 t dce80_link_encoder_create +ffffffff8200fe10 t dce80_validate_bandwidth +ffffffff8200ff70 t dce80_validate_global +ffffffff82010000 t read_dce_straps +ffffffff82010060 t create_audio +ffffffff82010090 t dce80_stream_encoder_create +ffffffff82010130 t dce80_hwseq_create +ffffffff82011000 T dce80_timing_generator_construct +ffffffff82011090 t program_timing +ffffffff82011170 t dce80_timing_generator_enable_advanced_request +ffffffff82012000 T cm_helper_program_color_matrices +ffffffff820120c0 T cm_helper_program_xfer_func +ffffffff82012460 T cm_helper_convert_to_custom_float +ffffffff820128b0 T cm_helper_translate_curve_to_hw_format +ffffffff82013430 T cm_helper_translate_curve_to_degamma_hw_format +ffffffff82014000 T dpp_read_state +ffffffff82014260 T dpp1_get_optimal_number_of_taps +ffffffff82014400 T dpp_reset +ffffffff82014470 T dpp1_cnv_setup +ffffffff82014970 T dpp1_set_cursor_attributes +ffffffff82014aa0 T dpp1_set_cursor_position +ffffffff82014bd0 T dpp1_cnv_set_optional_cursor_attributes +ffffffff82014c90 T dpp1_dppclk_control +ffffffff82014d90 T dpp1_construct +ffffffff82014e10 t dpp1_cm_set_regamma_pwl +ffffffff82015000 T dpp1_cm_set_gamut_remap +ffffffff820151a0 T dpp1_cm_set_output_csc_default +ffffffff82015220 t dpp1_cm_program_color_matrix +ffffffff820153e0 T dpp1_cm_set_output_csc_adjustment +ffffffff820153f0 T dpp1_cm_power_on_regamma_lut +ffffffff82015470 T dpp1_cm_program_regamma_lut +ffffffff82015680 T dpp1_cm_configure_regamma_lut +ffffffff82015780 T dpp1_cm_program_regamma_luta_settings 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hubbub1_is_allow_self_refresh_enabled +ffffffff8201a470 T hubbub1_verify_allow_pstate_change_high +ffffffff8201a630 T hubbub1_wm_change_req_wa +ffffffff8201a6d0 T hubbub1_program_urgent_watermarks +ffffffff8201aab0 T hubbub1_program_stutter_watermarks +ffffffff8201af10 T hubbub1_program_pstate_watermarks +ffffffff8201b160 T hubbub1_program_watermarks +ffffffff8201b290 T hubbub1_update_dchub +ffffffff8201b4c0 T hubbub1_toggle_watermark_change_req +ffffffff8201b560 T hubbub1_soft_reset +ffffffff8201b5a0 T hubbub1_construct +ffffffff8201b600 t hubbub1_get_dcc_compression_cap +ffffffff8201b820 t hubbub1_dcc_support_swizzle +ffffffff8201b8b0 t hubbub1_dcc_support_pixel_format +ffffffff8201c000 T hubp1_set_blank +ffffffff8201c110 T hubp1_clear_underflow +ffffffff8201c160 T hubp1_vready_workaround +ffffffff8201c1f0 T hubp1_program_tiling +ffffffff8201c460 T hubp1_program_size +ffffffff8201c5f0 T hubp1_program_rotation +ffffffff8201c760 T hubp1_program_pixel_format +ffffffff8201cd30 T hubp1_program_surface_flip_and_addr +ffffffff8201d4c0 T hubp1_dcc_control +ffffffff8201d580 T hubp1_program_surface_config +ffffffff8201d690 T hubp1_program_requestor +ffffffff8201da60 T hubp1_program_deadline +ffffffff8201e160 T hubp1_is_flip_pending +ffffffff8201e270 T min_set_viewport +ffffffff8201e560 T hubp1_read_state_common +ffffffff8201f200 T hubp1_read_state +ffffffff8201f4c0 T hubp1_get_cursor_pitch +ffffffff8201f560 T hubp1_cursor_set_attributes +ffffffff8201f810 T hubp1_cursor_set_position +ffffffff8201fb70 T hubp1_clk_cntl +ffffffff8201fbc0 T hubp1_vtg_sel +ffffffff8201fc00 T hubp1_in_blank +ffffffff8201fc70 T hubp1_soft_reset +ffffffff8201fcb0 T hubp1_set_flip_int +ffffffff8201fd00 T hubp1_init +ffffffff8201fd30 T dcn10_hubp_construct +ffffffff8201fda0 t hubp1_setup +ffffffff8201fe60 t hubp1_setup_interdependent +ffffffff820201d0 t hubp1_set_vm_system_aperture_settings +ffffffff820203f0 t hubp1_set_vm_context0_settings +ffffffff820206d0 t hubp1_set_hubp_blank_en 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dcn10_update_plane_addr +ffffffff82025710 T dcn10_set_input_transfer_func +ffffffff82025880 T dcn10_set_output_transfer_func +ffffffff82025940 T dcn10_pipe_control_lock +ffffffff82025a10 T dcn10_cursor_lock +ffffffff82025bd0 T dcn10_enable_vblanks_synchronization +ffffffff82026350 T dcn10_enable_timing_synchronization +ffffffff82026740 T dcn10_enable_per_frame_crtc_position_reset +ffffffff82026920 T dcn10_program_gamut_remap +ffffffff82026b20 T dcn10_program_output_csc +ffffffff82026c50 T dcn10_update_visual_confirm_color +ffffffff82026d50 T dcn10_update_mpcc +ffffffff82026fd0 T dcn10_blank_pixel_data +ffffffff82027110 T dcn10_set_hdr_multiplier +ffffffff820271a0 T dcn10_program_pipe +ffffffff82027d70 T dcn10_wait_for_pending_cleared +ffffffff82027e70 T dcn10_post_unlock_program_front_end +ffffffff82028120 T dcn10_prepare_bandwidth +ffffffff820282d0 T dcn10_optimize_bandwidth +ffffffff82028480 T dcn10_set_drr +ffffffff82028580 T dcn10_get_position +ffffffff82028610 T dcn10_set_static_screen_control +ffffffff820286b0 T dcn10_setup_stereo +ffffffff82028810 T dcn10_wait_for_mpcc_disconnect +ffffffff820289c0 T dcn10_dummy_display_power_gating +ffffffff820289f0 T dcn10_update_pending_status +ffffffff82028b30 T dcn10_update_dchub +ffffffff82028b60 T dcn10_set_cursor_position +ffffffff820290a0 T dcn10_set_cursor_attribute +ffffffff820290f0 T dcn10_set_cursor_sdr_white_level +ffffffff820291c0 T dcn10_get_vupdate_offset_from_vsync +ffffffff82029250 T dcn10_calc_vupdate_position +ffffffff820292e0 T dcn10_setup_periodic_interrupt +ffffffff820293f0 T dcn10_setup_vupdate_interrupt +ffffffff820294b0 T dcn10_unblank_stream +ffffffff820295c0 T dcn10_send_immediate_sdp_message +ffffffff82029620 T dcn10_set_clock +ffffffff82029730 T dcn10_get_clock +ffffffff82029790 T dcn10_get_dcc_en_bits +ffffffff8202a000 T snprintf_count +ffffffff8202a090 T dcn10_clear_status_bits +ffffffff8202a240 T dcn10_get_hw_state +ffffffff8202c000 T dcn10_hw_sequencer_construct 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+ffffffff8202ee60 T dcn10_link_encoder_enable_dp_output +ffffffff8202efe0 T dcn10_link_encoder_enable_dp_mst_output +ffffffff8202f160 T dcn10_link_encoder_disable_output +ffffffff8202f340 T dcn10_link_encoder_dp_set_lane_settings +ffffffff8202f4e0 T dcn10_link_encoder_dp_set_phy_pattern +ffffffff8202fc00 t set_dp_phy_pattern_hbr2_compliance_cp2520_2 +ffffffff8202fe00 T dcn10_link_encoder_update_mst_stream_allocation_table +ffffffff820300e0 T dcn10_link_encoder_connect_dig_be_to_fe +ffffffff82030220 T dcn10_link_encoder_enable_hpd +ffffffff82030260 T dcn10_link_encoder_disable_hpd +ffffffff820302a0 T dcn10_get_dig_mode +ffffffff82030310 T dcn10_link_encoder_get_max_link_cap +ffffffff82030390 t program_pattern_symbols +ffffffff82031000 T mpc1_set_bg_color +ffffffff820311e0 T mpc1_get_mpcc +ffffffff82031270 T mpc1_update_stereo_mix +ffffffff820313a0 T mpc1_assert_idle_mpcc +ffffffff82031470 T mpc1_get_mpcc_for_dpp +ffffffff82031520 T mpc1_is_mpcc_idle +ffffffff82031610 T mpc1_assert_mpcc_idle_before_connect +ffffffff82031750 T mpc1_insert_plane +ffffffff82031cf0 T mpc1_remove_mpcc +ffffffff820320b0 T mpc1_mpc_init +ffffffff820323d0 T mpc1_mpc_init_single_inst +ffffffff820325c0 T mpc1_init_mpcc_list_from_hw +ffffffff82032890 T mpc1_read_mpcc_state +ffffffff82032a20 T mpc1_cursor_lock +ffffffff82032aa0 T mpc1_get_mpc_out_mux +ffffffff82032b20 T dcn10_mpc_construct +ffffffff82032ca0 t mpc1_update_blending +ffffffff82033000 T opp1_program_bit_depth_reduction +ffffffff82033400 T opp1_set_dyn_expansion +ffffffff82033570 T opp1_program_fmt +ffffffff82033870 T opp1_program_stereo +ffffffff820339a0 T opp1_pipe_clock_control +ffffffff820339e0 T opp1_destroy +ffffffff82033a30 T dcn10_opp_construct +ffffffff82034000 T optc1_program_global_sync +ffffffff82034150 T optc1_setup_vertical_interrupt0 +ffffffff820341e0 T optc1_setup_vertical_interrupt1 +ffffffff82034250 T optc1_setup_vertical_interrupt2 +ffffffff820342c0 T optc1_program_timing +ffffffff82034970 T optc1_is_two_pixels_per_containter +ffffffff820349c0 T optc1_set_vtg_params +ffffffff82034b00 T optc1_set_blank_data_double_buffer +ffffffff82034b40 T optc1_set_timing_double_buffer +ffffffff82034b80 T optc1_set_blank +ffffffff82034c60 T optc1_is_blanked +ffffffff82034ce0 T optc1_enable_optc_clock +ffffffff82034f00 T optc1_disable_crtc +ffffffff82034ff0 T optc1_program_blank_color +ffffffff820350a0 T optc1_validate_timing +ffffffff820351a0 T optc1_get_vblank_counter +ffffffff82035200 T optc1_lock +ffffffff820352f0 T optc1_unlock +ffffffff82035360 T optc1_get_position +ffffffff820353e0 T optc1_is_counter_moving +ffffffff82035460 T optc1_did_triggered_reset_occur +ffffffff82035500 T optc1_disable_reset_trigger +ffffffff820355c0 T optc1_enable_reset_trigger +ffffffff820356d0 T optc1_enable_crtc_reset +ffffffff82035830 T optc1_wait_for_state +ffffffff82035900 T optc1_set_early_control +ffffffff82035930 T optc1_set_static_screen_control +ffffffff820359d0 T optc1_set_drr +ffffffff82035c00 T optc1_set_vtotal_min_max +ffffffff82035ca0 T optc1_get_crtc_scanoutpos +ffffffff82035db0 T optc1_program_stereo +ffffffff82035fb0 T optc1_is_stereo_left_eye +ffffffff82036020 T optc1_get_hw_timing +ffffffff82036140 T optc1_read_otg_state +ffffffff82036450 T optc1_get_otg_active_size +ffffffff82036560 T optc1_clear_optc_underflow +ffffffff820365b0 T optc1_tg_init +ffffffff82036660 T optc1_is_tg_enabled +ffffffff820366d0 T optc1_is_optc_underflow_occurred +ffffffff82036740 T optc1_configure_crc +ffffffff820369d0 T optc1_get_crc +ffffffff82036ae0 T dcn10_timing_generator_init +ffffffff82036b50 t optc1_enable_crtc +ffffffff82036c50 t optc1_set_test_pattern +ffffffff82037330 t optc1_program_manual_trigger +ffffffff820373e0 t optc1_setup_manual_trigger +ffffffff82038000 T dcn10_find_first_free_match_stream_enc_for_link +ffffffff820380b0 T dcn10_create_resource_pool +ffffffff82039260 t dcn10_resource_construct_fp +ffffffff820393e0 t dcn10_resource_destruct +ffffffff820396f0 t dcn10_destroy_resource_pool +ffffffff82039750 t dcn10_panel_cntl_create +ffffffff820397e0 t dcn10_link_encoder_create +ffffffff820398e0 t dcn10_validate_bandwidth +ffffffff82039960 t dcn10_validate_global +ffffffff82039b40 t dcn10_acquire_idle_pipe_for_layer +ffffffff82039c80 t dcn10_validate_plane +ffffffff82039cd0 t dcn10_add_stream_to_ctx +ffffffff82039e90 t dcn10_patch_unknown_plane_state +ffffffff82039ef0 t read_dce_straps +ffffffff82039f20 t create_audio +ffffffff82039f50 t dcn10_stream_encoder_create +ffffffff82039ff0 t dcn10_hwseq_create +ffffffff8203a0a0 t dcn10_get_dcc_compression_cap +ffffffff8203b000 T enc1_update_generic_info_packet +ffffffff8203b430 T enc1_stream_encoder_dp_set_stream_attribute +ffffffff8203b900 T enc1_stream_encoder_set_stream_attribute_helper +ffffffff8203b980 T enc1_stream_encoder_hdmi_set_stream_attribute +ffffffff8203bf70 T enc1_stream_encoder_dvi_set_stream_attribute +ffffffff8203c100 T enc1_stream_encoder_set_throttled_vcp_size +ffffffff8203c320 T enc1_stream_encoder_update_dp_info_packets +ffffffff8203c4c0 T enc1_stream_encoder_send_immediate_sdp_message +ffffffff8203c8d0 T enc1_stream_encoder_stop_dp_info_packets +ffffffff8203caa0 T enc1_stream_encoder_dp_blank +ffffffff8203cc10 T enc1_stream_encoder_dp_unblank +ffffffff8203ce20 T enc1_stream_encoder_set_avmute +ffffffff8203ce60 T enc1_reset_hdmi_stream_attribute +ffffffff8203cf30 T get_audio_clock_info +ffffffff8203d020 T enc1_se_enable_audio_clock +ffffffff8203d080 T enc1_se_enable_dp_audio +ffffffff8203d150 T enc1_se_audio_mute_control +ffffffff8203d1a0 T enc1_se_dp_audio_setup +ffffffff8203d1b0 t enc1_se_audio_setup +ffffffff8203d340 T enc1_se_dp_audio_enable +ffffffff8203d590 T enc1_se_dp_audio_disable +ffffffff8203d700 T enc1_se_hdmi_audio_setup +ffffffff8203dbd0 T enc1_se_hdmi_audio_disable +ffffffff8203dc60 T enc1_setup_stereo_sync +ffffffff8203dce0 T enc1_dig_connect_to_otg +ffffffff8203dd20 T enc1_dig_source_otg +ffffffff8203dd90 T enc1_stream_encoder_dp_get_pixel_format +ffffffff8203de80 T dcn10_stream_encoder_construct +ffffffff8203dee0 t enc1_stream_encoder_update_hdmi_info_packets +ffffffff8203e290 t enc1_stream_encoder_stop_hdmi_info_packets +ffffffff8203f000 T dccg2_update_dpp_dto +ffffffff8203f160 T dccg2_get_dccg_ref_freq +ffffffff8203f220 T dccg2_set_fifo_errdet_ovr_en +ffffffff8203f260 T dccg2_otg_add_pixel +ffffffff8203f300 T dccg2_otg_drop_pixel +ffffffff8203f3a0 T dccg2_init +ffffffff8203f3d0 T dccg2_create +ffffffff8203f480 T dcn_dccg_destroy +ffffffff82040000 T dpp20_read_state +ffffffff820401d0 T dpp2_power_on_obuf +ffffffff820402a0 T dpp2_dummy_program_input_lut +ffffffff820402d0 T dscl2_calc_lb_num_partitions +ffffffff820403f0 T dpp2_cnv_set_alpha_keyer +ffffffff82040670 T dpp2_set_cursor_attributes +ffffffff820407d0 T oppn20_dummy_program_regamma_pwl +ffffffff82040800 T dpp2_construct +ffffffff82040880 t dpp2_cnv_setup +ffffffff82042000 T dpp2_set_degamma_pwl +ffffffff820423b0 T dpp2_set_degamma +ffffffff82042560 T dpp2_cm_set_gamut_remap +ffffffff82042790 T dpp2_program_input_csc +ffffffff820429c0 T dpp20_program_blnd_lut +ffffffff82043110 T dpp20_program_shaper +ffffffff820450a0 T dpp20_program_3dlut +ffffffff820457a0 t dpp20_set3dlut_ram12 +ffffffff82045970 T dpp2_set_hdr_multiplier +ffffffff82046000 t dsc2_get_enc_caps +ffffffff82046080 t dsc2_read_state +ffffffff82046230 t dsc2_validate_stream +ffffffff82046290 t dsc2_set_config +ffffffff82047620 t dsc2_get_packed_pps +ffffffff820477c0 t dsc2_enable +ffffffff82047970 t dsc2_disable +ffffffff82047af0 t dsc2_disconnect +ffffffff82047b60 T dsc2_construct +ffffffff82047bb0 t dsc_prepare_config +ffffffff82048270 t dsc_log_pps +ffffffff82049000 T dwb2_config_dwb_cnv +ffffffff820491f0 T dwb2_disable +ffffffff82049300 T dwb2_is_enabled +ffffffff820493a0 T dwb2_set_stereo +ffffffff82049490 T dwb2_set_new_content +ffffffff82049500 T dwb2_set_scaler +ffffffff82049890 t dwb2_get_caps +ffffffff82049970 t dwb2_enable +ffffffff82049ad0 t dwb2_update +ffffffff82049c30 t dwb2_set_warmup +ffffffff82049da0 T dcn20_dwbc_construct +ffffffff8204a000 T dwb_program_horz_scalar +ffffffff8204a4c0 t wbscl_get_filter_coeffs_16p +ffffffff8204a990 t wbscl_set_scaler_filter +ffffffff8204aba0 T dwb_program_vert_scalar +ffffffff8204c000 T hubbub2_dcc_support_swizzle +ffffffff8204c0c0 T hubbub2_dcc_support_pixel_format +ffffffff8204c110 T hubbub2_get_dcc_compression_cap +ffffffff8204c350 T hubbub2_init_vm_ctx +ffffffff8204c4a0 T hubbub2_init_dchub_sys_ctx +ffffffff8204c6f0 T hubbub2_update_dchub +ffffffff8204c8f0 T hubbub2_wm_read_state +ffffffff8204cc80 T hubbub2_get_dchub_ref_freq +ffffffff8204cd60 T hubbub2_read_state +ffffffff8204ceb0 T hubbub2_construct +ffffffff8204cf10 t hubbub2_program_watermarks +ffffffff8204e000 T hubp2_set_vm_system_aperture_settings +ffffffff8204e1e0 T hubp2_program_deadline +ffffffff8204e930 T hubp2_vready_at_or_After_vsync +ffffffff8204e9d0 T hubp2_setup_interdependent +ffffffff8204ee30 T hubp2_program_size +ffffffff8204efc0 T hubp2_program_rotation +ffffffff8204f130 T hubp2_dcc_control +ffffffff8204f1f0 T hubp2_program_pixel_format +ffffffff8204f7c0 T hubp2_program_surface_config +ffffffff8204fa00 T hubp2_get_lines_per_chunk +ffffffff8204fac0 T hubp2_cursor_set_attributes +ffffffff8204fe80 T hubp2_dmdata_set_attributes +ffffffff82050260 T hubp2_dmdata_load +ffffffff820502f0 T hubp2_dmdata_status_done +ffffffff82050360 T hubp2_program_surface_flip_and_addr +ffffffff82050ab0 T hubp2_enable_triplebuffer +ffffffff82050b80 T hubp2_is_triplebuffer_enabled +ffffffff82050c00 T hubp2_set_flip_control_surface_gsl +ffffffff82050c50 T hubp2_is_flip_pending +ffffffff82050d60 T hubp2_set_blank +ffffffff82050dc0 T hubp2_set_blank_regs +ffffffff82050ec0 T hubp2_cursor_set_position +ffffffff820512e0 T hubp2_clk_cntl +ffffffff82051330 T hubp2_vtg_sel +ffffffff82051370 T hubp2_clear_underflow +ffffffff820513c0 T hubp2_read_state_common +ffffffff82051fc0 T hubp2_read_state +ffffffff82052280 T hubp2_construct +ffffffff820522f0 t hubp2_setup +ffffffff820527a0 t hubp2_validate_dml_output +ffffffff82054000 T dcn20_set_flip_control_gsl +ffffffff82054050 T dcn20_enable_power_gating_plane +ffffffff82054410 T dcn20_dccg_init +ffffffff82054490 T dcn20_disable_vga +ffffffff82054550 T dcn20_program_triple_buffer +ffffffff820545a0 T dcn20_init_blank +ffffffff82054790 T dcn20_dsc_pg_control +ffffffff82054ba0 T dcn20_dpp_pg_control +ffffffff82054e50 T dcn20_hubp_pg_control +ffffffff82055100 T dcn20_plane_atomic_disable +ffffffff82055250 t dcn20_setup_gsl_group_as_lock +ffffffff820554d0 T dcn20_disable_plane +ffffffff82055670 T dcn20_disable_pixel_data +ffffffff82055690 T dcn20_blank_pixel_data +ffffffff82055870 T dcn20_enable_stream_timing +ffffffff82055e50 T dcn20_program_output_csc +ffffffff82055f40 T dcn20_set_output_transfer_func +ffffffff820560b0 T dcn20_set_blend_lut +ffffffff82056120 T dcn20_set_shaper_3dlut +ffffffff820561e0 T dcn20_set_input_transfer_func +ffffffff820563a0 T dcn20_update_odm +ffffffff82056490 T dcn20_pipe_control_lock +ffffffff820567d0 T dcn20_program_front_end_for_ctx +ffffffff820573a0 t dcn20_program_pipe +ffffffff82057e30 T dcn20_post_unlock_program_front_end +ffffffff820581c0 T dcn20_prepare_bandwidth +ffffffff82058310 T dcn20_optimize_bandwidth +ffffffff820584e0 T dcn20_update_bandwidth +ffffffff820587a0 T dcn20_enable_writeback +ffffffff820588f0 T dcn20_disable_writeback +ffffffff82058980 T dcn20_wait_for_blank_complete +ffffffff82058a10 T dcn20_dmdata_status_done +ffffffff82058a60 T dcn20_disable_stream_gating +ffffffff82058b10 T dcn20_enable_stream_gating +ffffffff82058bb0 T dcn20_set_dmdata_attributes +ffffffff82058c70 T dcn20_init_vm_ctx +ffffffff82058d30 T dcn20_init_sys_ctx +ffffffff82058de0 T dcn20_update_plane_addr +ffffffff82058f20 T dcn20_unblank_stream +ffffffff820590a0 T dcn20_setup_vupdate_interrupt +ffffffff82059110 T dcn20_reset_hw_ctx_wrap +ffffffff820594b0 T dcn20_update_visual_confirm_color +ffffffff820595c0 T dcn20_update_mpcc +ffffffff82059840 T dcn20_enable_stream +ffffffff82059a10 T dcn20_program_dmdata_engine +ffffffff82059ab0 T dcn20_fpga_init_hw +ffffffff8205a0b0 T dcn20_optimize_timing_for_fsft +ffffffff8205a0f0 T dcn20_set_disp_pattern_generator +ffffffff8205b000 T dcn20_hw_sequencer_construct +ffffffff8205c000 T enc2_fec_set_enable +ffffffff8205c090 T enc2_fec_set_ready +ffffffff8205c0d0 T enc2_fec_is_active +ffffffff8205c140 T link_enc2_read_state +ffffffff8205c1f0 T dcn20_link_encoder_enable_dp_output +ffffffff8205c300 T dcn20_link_encoder_get_max_link_cap +ffffffff8205c3b0 T dcn20_link_encoder_is_in_alt_mode +ffffffff8205c430 T enc2_hw_init +ffffffff8205c510 T dcn20_link_encoder_construct +ffffffff8205d000 T mmhubbub2_config_mcif_irq +ffffffff8205d130 T mmhubbub2_enable_mcif +ffffffff8205d170 T mmhubbub2_disable_mcif +ffffffff8205d1b0 T mcifwb2_dump_frame +ffffffff8205d2c0 t mmhubbub2_config_mcif_buf +ffffffff8205d910 t mmhubbub2_config_mcif_arb +ffffffff8205dd20 T dcn20_mmhubbub_construct +ffffffff8205e000 T mpc2_update_blending +ffffffff8205e2a0 T mpc2_set_denorm +ffffffff8205e310 T mpc2_set_denorm_clamp +ffffffff8205e460 T mpc2_set_output_csc +ffffffff8205e650 T mpc2_set_ocsc_default +ffffffff8205e830 T mpc20_power_on_ogam_lut +ffffffff8205e8b0 T mpc2_set_output_gamma +ffffffff8205f070 T mpc2_assert_idle_mpcc +ffffffff8205f180 T mpc2_assert_mpcc_idle_before_connect +ffffffff8205f3d0 t mpc2_get_mpcc_for_dpp +ffffffff8205f490 T dcn20_mpc_construct +ffffffff82060000 T opp2_set_disp_pattern_generator +ffffffff82060810 T opp2_dpg_set_blank_color +ffffffff82060990 T opp2_program_dpg_dimensions +ffffffff82060a20 T opp2_dpg_is_blanked +ffffffff82060ae0 T opp2_program_left_edge_extra_pixel +ffffffff82060b30 T dcn20_opp_construct +ffffffff82061000 T optc2_enable_crtc +ffffffff82061100 T optc2_set_gsl +ffffffff820611f0 T optc2_set_gsl_source_select +ffffffff820612b0 T optc2_set_dsc_config +ffffffff82061380 T optc2_get_dsc_status +ffffffff820613c0 T optc2_is_two_pixels_per_containter +ffffffff820613d0 T optc2_set_odm_bypass +ffffffff82061510 T optc2_set_odm_combine +ffffffff82061700 T optc2_get_optc_source +ffffffff820617d0 T optc2_triplebuffer_lock +ffffffff820618f0 T optc2_triplebuffer_unlock +ffffffff820619a0 T optc2_lock_doublebuffer_enable +ffffffff82061b80 T optc2_lock_doublebuffer_disable +ffffffff82061c60 T optc2_setup_manual_trigger +ffffffff82061d80 T optc2_program_manual_trigger +ffffffff82061df0 T optc2_configure_crc +ffffffff82061e80 T optc2_get_last_used_drr_vtotal +ffffffff82061ec0 T dcn20_timing_generator_init +ffffffff82061f30 t optc2_set_dwb_source +ffffffff82061fc0 t optc2_align_vblanks +ffffffff82063000 T dcn20_dpp_destroy +ffffffff82063050 T dcn20_dpp_create +ffffffff82063120 T dcn20_ipp_create +ffffffff820631e0 T dcn20_opp_create +ffffffff820632a0 T dcn20_aux_engine_create +ffffffff82063340 T dcn20_i2c_hw_create +ffffffff820633d0 T dcn20_mpc_create +ffffffff82063460 T dcn20_hubbub_create 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+ffffffff82065800 T dcn20_fast_validate_bw +ffffffff82065d10 T dcn20_validate_bandwidth +ffffffff82065d90 T dcn20_acquire_idle_pipe_for_layer +ffffffff82065ea0 T dcn20_get_dcc_compression_cap +ffffffff82065ed0 T dcn20_patch_unknown_plane_state +ffffffff82065f30 T dcn20_dwbc_create +ffffffff82066050 T dcn20_mmhubbub_create +ffffffff820661b0 T dcn20_create_resource_pool +ffffffff82067a00 t dcn20_resource_destruct +ffffffff82067ea0 t dcn20_destroy_resource_pool +ffffffff82067f00 t dcn20_panel_cntl_create +ffffffff82067f90 t read_dce_straps +ffffffff82067fc0 t dcn20_create_audio +ffffffff82068000 T enc2_set_dynamic_metadata +ffffffff82068280 T enc2_stream_encoder_dp_unblank +ffffffff820685b0 T enc2_stream_encoder_dp_set_stream_attribute +ffffffff82068610 T enc2_get_fifo_cal_average_level +ffffffff82068670 T dcn20_stream_encoder_construct +ffffffff820686d0 t enc2_stream_encoder_update_hdmi_info_packets +ffffffff820687a0 t enc2_stream_encoder_stop_hdmi_info_packets +ffffffff82068aa0 t enc2_stream_encoder_update_dp_info_packets +ffffffff82068b50 t enc2_read_state +ffffffff82068cd0 t enc2_dp_set_dsc_config +ffffffff82068da0 t enc2_dp_set_dsc_pps_info_packet +ffffffff82069270 t enc2_dp_set_odm_combine +ffffffff820692b0 t enc2_update_hdmi_info_packet +ffffffff8206a000 T dcn20_vmid_setup +ffffffff8206b000 T dccg201_create +ffffffff8206b0b0 t dccg201_update_dpp_dto +ffffffff8206c000 T dpp201_construct +ffffffff8206c080 t dpp201_get_optimal_number_of_taps +ffffffff8206c460 t dpp201_cnv_setup +ffffffff8206d000 T hubbub201_construct +ffffffff8206d060 t hubbub201_program_watermarks +ffffffff8206e000 T dcn201_hubp_construct +ffffffff8206e070 t hubp201_setup +ffffffff8206e360 t hubp201_program_surface_config +ffffffff8206f000 T dcn201_update_plane_addr +ffffffff8206f2a0 T dcn201_init_blank +ffffffff8206f3e0 T dcn201_init_hw +ffffffff8206fca0 T dcn201_plane_atomic_disconnect +ffffffff8206fe10 T dcn201_update_mpcc +ffffffff820700b0 T dcn201_pipe_control_lock +ffffffff820701b0 T dcn201_set_cursor_attribute +ffffffff82070240 T dcn201_set_dmdata_attributes +ffffffff82070350 T dcn201_unblank_stream +ffffffff82071000 T dcn201_hw_sequencer_construct +ffffffff82072000 T dcn201_link_encoder_construct +ffffffff820721a0 t dcn201_link_encoder_is_in_alt_mode +ffffffff82072210 t dcn201_link_encoder_get_max_link_cap +ffffffff82073000 t mpc201_set_out_rate_control +ffffffff82073130 T dcn201_mpc_construct +ffffffff82074000 T dcn201_opp_construct +ffffffff82075000 T optc201_is_two_pixels_per_containter +ffffffff82075010 T dcn201_timing_generator_init +ffffffff82075080 t optc201_validate_timing +ffffffff82075180 t optc201_triplebuffer_unlock +ffffffff82075230 t optc201_triplebuffer_lock +ffffffff82075350 t optc201_get_optc_source +ffffffff82076000 T dcn201_create_resource_pool +ffffffff82076a40 t dcn201_resource_destruct +ffffffff82076d30 t dcn201_destroy_resource_pool +ffffffff82076d90 t dcn201_link_init +ffffffff82076de0 t dcn201_link_encoder_create +ffffffff82076ea0 t dcn201_acquire_idle_pipe_for_layer +ffffffff82076fb0 t dcn201_populate_dml_writeback_from_context +ffffffff82077010 t read_dce_straps +ffffffff82077040 t dcn201_create_audio +ffffffff82077070 t dcn201_stream_encoder_create +ffffffff82077110 t dcn201_hwseq_create +ffffffff82077180 t dcn201_get_dcc_compression_cap +ffffffff82078000 T dccg21_update_dpp_dto +ffffffff82078120 T dccg21_create +ffffffff82079000 T dcn21_dchvm_init +ffffffff82079200 T hubbub21_init_dchub +ffffffff820793e0 T hubbub21_program_urgent_watermarks +ffffffff82079bd0 T hubbub21_program_stutter_watermarks +ffffffff8207a0c0 T hubbub21_program_pstate_watermarks +ffffffff8207a360 T hubbub21_program_watermarks +ffffffff8207a4c0 T hubbub21_wm_read_state +ffffffff8207a7c0 T hubbub21_construct +ffffffff8207a820 t hubbub21_apply_DEDCN21_147_wa +ffffffff8207b000 T apply_DEDCN21_142_wa_for_hostvm_deadline +ffffffff8207b2e0 T hubp21_program_deadline +ffffffff8207b310 T hubp21_program_requestor +ffffffff8207b6b0 T hubp21_construct +ffffffff8207b720 t hubp21_setup +ffffffff8207b780 t hubp21_set_viewport +ffffffff8207ba70 t hubp21_program_surface_flip_and_addr +ffffffff8207c390 t hubp21_set_vm_system_aperture_settings +ffffffff8207c4c0 t hubp21_init +ffffffff8207c4f0 t hubp21_validate_dml_output +ffffffff8207e000 T dcn21_init_sys_ctx +ffffffff8207e110 T dcn21_s0i3_golden_init_wa +ffffffff8207e170 T dcn21_exit_optimized_pwr_state +ffffffff8207e190 T dcn21_optimize_pwr_state +ffffffff8207e1c0 T dcn21_PLAT_58856_wa +ffffffff8207e220 T dcn21_set_abm_immediate_disable +ffffffff8207e340 T dcn21_set_pipe +ffffffff8207e450 T dcn21_set_backlight_level +ffffffff8207e620 T dcn21_is_abm_supported +ffffffff8207f000 T dcn21_hw_sequencer_construct +ffffffff82080000 T dcn21_link_encoder_enable_dp_output +ffffffff82080140 t dcn21_link_encoder_acquire_phy +ffffffff82080320 T dcn21_link_encoder_construct +ffffffff82080510 t dcn21_link_encoder_enable_dp_mst_output +ffffffff82080580 t dcn21_link_encoder_disable_output +ffffffff82081000 T dcn21_fast_validate_bw +ffffffff82081660 T dcn21_create_resource_pool +ffffffff820829c0 t dcn21_resource_destruct +ffffffff82082e60 t dcn21_destroy_resource_pool +ffffffff82082ec0 t dcn21_panel_cntl_create +ffffffff82082f50 t dcn21_link_encoder_create +ffffffff82083050 t dcn21_validate_bandwidth +ffffffff820830d0 t dcn21_patch_unknown_plane_state +ffffffff82083120 t dcn21_get_panel_config_defaults +ffffffff820831a0 t read_dce_straps +ffffffff820831d0 t dcn21_create_audio +ffffffff82083200 t dcn21_stream_encoder_create +ffffffff820832a0 t dcn21_hwseq_create +ffffffff82084000 T afmt3_setup_hdmi_audio +ffffffff820841d0 T afmt3_se_audio_setup +ffffffff82084390 T afmt3_audio_mute_control +ffffffff82084400 T afmt3_audio_info_immediate_update +ffffffff82084440 T afmt3_setup_dp_audio +ffffffff82084530 T afmt3_construct +ffffffff82085000 T cm_helper_program_gamcor_xfer_func +ffffffff820853a0 T cm3_helper_translate_curve_to_hw_format +ffffffff82085fa0 T cm3_helper_convert_to_custom_float +ffffffff820863f0 T cm3_helper_translate_curve_to_degamma_hw_format +ffffffff82086c60 T is_rgb_equal +ffffffff82087000 T dccg3_create +ffffffff820870b0 T dccg30_create +ffffffff82088000 T dcn30_link_encoder_validate_output_with_stream +ffffffff82088010 T dcn30_link_encoder_construct +ffffffff82088230 T enc3_hw_init +ffffffff82089000 T enc3_stream_encoder_update_hdmi_info_packets +ffffffff82089100 t enc3_update_hdmi_info_packet +ffffffff820894f0 T enc3_stream_encoder_stop_hdmi_info_packets +ffffffff82089ab0 T enc3_dp_set_dsc_pps_info_packet +ffffffff82089dd0 T enc3_stream_encoder_update_dp_info_packets +ffffffff8208a010 T enc3_audio_mute_control +ffffffff8208a080 T enc3_se_dp_audio_setup +ffffffff8208a100 T enc3_se_dp_audio_enable +ffffffff8208a1f0 T enc3_se_hdmi_audio_setup +ffffffff8208a500 T dcn30_dio_stream_encoder_construct +ffffffff8208a570 t enc3_stream_encoder_hdmi_set_stream_attribute +ffffffff8208ab60 t enc3_stream_encoder_dvi_set_stream_attribute +ffffffff8208ad60 t enc3_read_state +ffffffff8208aef0 t enc3_dp_set_dsc_config +ffffffff8208afc0 t enc3_dp_set_odm_combine +ffffffff8208b000 T dpp30_read_state +ffffffff8208b050 T dpp3_program_post_csc +ffffffff8208b230 T dpp3_set_pre_degam +ffffffff8208b2e0 T dpp3_cnv_setup +ffffffff8208bba0 T dpp3_set_cursor_attributes +ffffffff8208bd10 T dpp3_get_optimal_number_of_taps +ffffffff8208c780 T dpp3_construct +ffffffff8208c7e0 t dpp3_deferred_update +ffffffff8208cbb0 t dpp3_program_blnd_lut +ffffffff8208d620 t dpp3_program_shaper +ffffffff8208f670 t dpp3_program_3dlut +ffffffff8208fe40 t dpp3_set3dlut_ram12 +ffffffff82091000 T dpp3_program_cm_dealpha +ffffffff820910a0 T dpp3_program_cm_bias +ffffffff82091190 T dpp3_program_gamcor_lut +ffffffff82091bd0 t dpp3_power_on_gamcor_lut +ffffffff82091d00 T dpp3_set_hdr_multiplier +ffffffff82091d50 T dpp3_cm_set_gamut_remap +ffffffff82092000 T dwb3_config_fc +ffffffff820921b0 T dwb3_set_stereo +ffffffff82092270 T dwb3_enable +ffffffff820923a0 T dwb3_set_denorm +ffffffff820924c0 T dwb3_disable +ffffffff82092570 T dwb3_update +ffffffff820926a0 T dwb3_is_enabled +ffffffff82092740 T dwb3_set_new_content +ffffffff82092780 t dwb3_get_caps +ffffffff82092820 T dcn30_dwbc_construct +ffffffff82092870 T dwb3_set_host_read_rate_control +ffffffff82093000 T dwb3_ogam_set_input_transfer_func +ffffffff820939d0 T dwb3_set_gamut_remap +ffffffff82093b30 t dwb3_program_gamut_remap +ffffffff82093cc0 T dwb3_program_hdr_mult +ffffffff82094000 T hubbub3_init_dchub_sys_ctx +ffffffff820941e0 T hubbub3_program_watermarks +ffffffff820942f0 T hubbub3_dcc_support_swizzle +ffffffff820943c0 T hubbub3_get_dcc_compression_cap +ffffffff820945b0 T hubbub3_force_wm_propagate_to_pipes +ffffffff82094660 T hubbub3_force_pstate_change_control +ffffffff820946e0 T hubbub3_init_watermarks +ffffffff82094a20 T hubbub3_construct +ffffffff82095000 T hubp3_set_vm_system_aperture_settings +ffffffff82095130 T hubp3_program_surface_flip_and_addr +ffffffff82095b60 T hubp3_dcc_control +ffffffff82095c20 T hubp3_dcc_control_sienna_cichlid +ffffffff82095d30 T hubp3_dmdata_set_attributes +ffffffff82095f30 T hubp3_program_surface_config +ffffffff82096230 T hubp3_read_state +ffffffff82096480 T hubp3_setup +ffffffff82096510 T hubp3_init +ffffffff82096540 T hubp3_construct +ffffffff82097000 T dcn30_set_blend_lut +ffffffff82097070 T dcn30_set_input_transfer_func +ffffffff820971d0 T dcn30_set_output_transfer_func +ffffffff820974f0 T dcn30_update_writeback +ffffffff82097580 t dcn30_set_writeback +ffffffff82097730 T dcn30_mmhubbub_warmup +ffffffff820979e0 T dcn30_enable_writeback +ffffffff82097ab0 T dcn30_disable_writeback +ffffffff82097b90 T dcn30_program_all_writeback_pipes_in_tree +ffffffff82097e80 T dcn30_init_hw +ffffffff82098770 T dcn30_set_avmute +ffffffff820987d0 T dcn30_update_info_frame +ffffffff820988a0 T dcn30_program_dmdata_engine +ffffffff82098940 T dcn30_apply_idle_power_optimizations +ffffffff82098ec0 T dcn30_does_plane_fit_in_mall +ffffffff82098f70 T dcn30_hardware_release +ffffffff82099080 T dcn30_set_disp_pattern_generator +ffffffff820990f0 T dcn30_prepare_bandwidth +ffffffff8209a000 T dcn30_hw_sequencer_construct +ffffffff8209b000 t mmhubbub3_warmup_mcif +ffffffff8209b210 t mmhubbub3_config_mcif_buf +ffffffff8209b6c0 t mmhubbub3_config_mcif_arb +ffffffff8209bb10 T dcn30_mmhubbub_construct +ffffffff8209c000 T mpc3_is_dwb_idle +ffffffff8209c070 T mpc3_set_dwb_mux +ffffffff8209c0f0 T mpc3_disable_dwb_mux +ffffffff8209c170 T mpc3_set_out_rate_control +ffffffff8209c280 T mpc3_get_ogam_current +ffffffff8209c320 T mpc3_power_on_ogam_lut +ffffffff8209c3f0 T mpc3_set_output_gamma +ffffffff8209cf90 T mpc3_set_denorm +ffffffff8209d000 T mpc3_set_denorm_clamp +ffffffff8209d150 T mpc3_program_shaper +ffffffff8209f3c0 t mpc3_power_on_shaper_3dlut +ffffffff8209f740 T mpc3_init_mpcc +ffffffff8209f7c0 T mpc3_set_gamut_remap +ffffffff8209fa10 T mpc3_program_3dlut +ffffffff820a01a0 t mpc3_set3dlut_ram12 +ffffffff820a0380 T mpc3_set_output_csc +ffffffff820a04f0 T mpc3_set_ocsc_default +ffffffff820a0660 T mpc3_set_rmu_mux +ffffffff820a0700 T mpc3_get_rmu_mux_status +ffffffff820a07b0 T mpcc3_acquire_rmu +ffffffff820a0910 t mpcc3_release_rmu +ffffffff820a0a80 t mpc3_set_mpc_mem_lp_mode +ffffffff820a0c10 T dcn30_mpc_construct +ffffffff820a1000 T optc3_triplebuffer_lock +ffffffff820a1120 T optc3_lock_doublebuffer_enable +ffffffff820a13b0 T optc3_lock_doublebuffer_disable +ffffffff820a14c0 T optc3_lock +ffffffff820a1590 T optc3_set_out_mux +ffffffff820a15d0 T optc3_program_blank_color +ffffffff820a1710 T optc3_set_drr_trigger_window +ffffffff820a17a0 T optc3_set_vtotal_change_limit +ffffffff820a1810 T optc3_set_dsc_config +ffffffff820a1860 T optc3_set_odm_bypass +ffffffff820a19e0 T optc3_wait_drr_doublebuffer_pending_clear +ffffffff820a1a60 T optc3_set_vtotal_min_max +ffffffff820a1aa0 T optc3_tg_init +ffffffff820a1b00 T dcn30_timing_generator_init +ffffffff820a1b70 t optc3_set_odm_combine +ffffffff820a2000 T dcn30_add_stream_to_ctx +ffffffff820a2020 T dcn30_populate_dml_pipes_from_context +ffffffff820a2110 T dcn30_populate_dml_writeback_from_context +ffffffff820a2170 T dcn30_calc_max_scaled_time +ffffffff820a21d0 T dcn30_set_mcif_arb_params +ffffffff820a2340 T dcn30_acquire_post_bldn_3dlut +ffffffff820a24c0 T dcn30_release_post_bldn_3dlut +ffffffff820a2570 T dcn30_internal_validate_bw +ffffffff820a3340 t dcn30_split_stream_for_mpc_or_odm +ffffffff820a3660 T dcn30_can_support_mclk_switch_using_fw_based_vblank_stretch +ffffffff820a3780 T dcn30_setup_mclk_switch_using_fw_based_vblank_stretch +ffffffff820a3820 T dcn30_update_soc_for_wm_a +ffffffff820a3870 T dcn30_calculate_wm_and_dlg +ffffffff820a38e0 T dcn30_validate_bandwidth +ffffffff820a3d20 T dcn30_update_bw_bounding_box +ffffffff820a4500 T dcn30_create_resource_pool +ffffffff820a5ad0 t dcn30_resource_destruct +ffffffff820a6040 t dcn30_destroy_resource_pool +ffffffff820a60a0 t dcn30_panel_cntl_create +ffffffff820a6130 t dcn30_link_encoder_create +ffffffff820a61f0 t dcn30_get_panel_config_defaults +ffffffff820a6260 t read_dce_straps +ffffffff820a6290 t dcn30_create_audio +ffffffff820a62c0 t dcn30_stream_encoder_create +ffffffff820a6440 t dcn30_hwseq_create +ffffffff820a7000 T vpg3_update_generic_info_packet +ffffffff820a79a0 T vpg3_construct +ffffffff820a8000 T dccg301_create +ffffffff820a9000 T dcn301_link_encoder_construct +ffffffff820aa000 T hubbub301_construct +ffffffff820ab000 T dcn301_hw_sequencer_construct +ffffffff820ac000 T dcn301_panel_cntl_construct +ffffffff820ac050 t dcn301_panel_cntl_destroy +ffffffff820ac0a0 t dcn301_panel_cntl_hw_init +ffffffff820ac2b0 t dcn301_is_panel_backlight_on +ffffffff820ac310 t dcn301_is_panel_powered_on +ffffffff820ac3c0 t dcn301_store_backlight_level +ffffffff820ac460 t dcn301_get_16_bit_backlight_from_pwm +ffffffff820ad000 T dcn301_create_resource_pool +ffffffff820ae5a0 t dcn301_destruct +ffffffff820aeae0 t dcn301_destroy_resource_pool +ffffffff820aeb40 t dcn301_panel_cntl_create +ffffffff820aebd0 t dcn301_link_encoder_create +ffffffff820aec90 t dcn301_calculate_wm_and_dlg +ffffffff820aed00 t read_dce_straps +ffffffff820aed30 t dcn301_create_audio +ffffffff820aed60 t dcn301_stream_encoder_create +ffffffff820aeee0 t dcn301_hwseq_create +ffffffff820af000 T dcn302_dpp_pg_control +ffffffff820af2a0 T dcn302_hubp_pg_control +ffffffff820af550 T dcn302_dsc_pg_control +ffffffff820b0000 T dcn302_hw_sequencer_construct +ffffffff820b1000 T dcn302_update_bw_bounding_box +ffffffff820b1050 T dcn302_create_resource_pool +ffffffff820b23e0 t dcn302_resource_destruct +ffffffff820b28f0 t dcn302_destroy_resource_pool +ffffffff820b2940 t dcn302_panel_cntl_create +ffffffff820b29d0 t dcn302_link_encoder_create +ffffffff820b2a90 t dcn302_get_panel_config_defaults +ffffffff820b2b00 t read_dce_straps +ffffffff820b2b30 t dcn302_create_audio +ffffffff820b2b60 t dcn302_stream_encoder_create +ffffffff820b2ce0 t dcn302_hwseq_create +ffffffff820b3000 T dcn303_dpp_pg_control +ffffffff820b3030 T dcn303_hubp_pg_control +ffffffff820b3060 T dcn303_dsc_pg_control +ffffffff820b3090 T dcn303_enable_power_gating_plane +ffffffff820b4000 T dcn303_hw_sequencer_construct +ffffffff820b5000 T dcn303_update_bw_bounding_box +ffffffff820b5050 T dcn303_create_resource_pool +ffffffff820b6290 t dcn303_resource_destruct +ffffffff820b67b0 t dcn303_destroy_resource_pool +ffffffff820b6800 t dcn303_panel_cntl_create +ffffffff820b6890 t dcn303_link_encoder_create +ffffffff820b6950 t dcn303_get_panel_config_defaults +ffffffff820b69c0 t read_dce_straps +ffffffff820b69f0 t dcn303_create_audio +ffffffff820b6a20 t dcn303_stream_encoder_create +ffffffff820b6ba0 t dcn303_hwseq_create +ffffffff820b7000 T afmt31_powerdown +ffffffff820b7090 T afmt31_poweron +ffffffff820b7120 T afmt31_construct +ffffffff820b8000 T apg31_construct +ffffffff820b8050 t apg31_se_audio_setup +ffffffff820b8160 t apg31_audio_mute_control +ffffffff820b81a0 t apg31_enable +ffffffff820b82b0 t apg31_disable +ffffffff820b9000 T dccg31_update_dpp_dto +ffffffff820b9160 T dccg31_set_dpstreamclk +ffffffff820b92f0 t dccg31_disable_dpstreamclk +ffffffff820b9440 T dccg31_enable_symclk32_se +ffffffff820b9740 T dccg31_disable_symclk32_se +ffffffff820b9a10 T dccg31_enable_symclk32_le +ffffffff820b9bf0 T dccg31_disable_symclk32_le +ffffffff820b9d90 T dccg31_disable_dscclk +ffffffff820b9f50 T dccg31_enable_dscclk +ffffffff820ba120 T dccg31_set_physymclk +ffffffff820ba640 T dccg31_set_dtbclk_dto +ffffffff820ba8f0 T dccg31_set_audio_dtbclk_dto +ffffffff820baa00 T dccg31_get_dccg_ref_freq +ffffffff820baa30 T dccg31_set_dispclk_change_mode +ffffffff820baa80 T dccg31_init +ffffffff820bafe0 T dccg31_otg_add_pixel +ffffffff820bb020 T dccg31_otg_drop_pixel +ffffffff820bb060 T dccg31_create +ffffffff820bc000 T dcn31_link_encoder_set_dio_phy_mux +ffffffff820bc390 T dcn31_link_encoder_construct +ffffffff820bc590 T dcn31_link_encoder_construct_minimal +ffffffff820bc610 T dcn31_link_encoder_enable_dp_output +ffffffff820bc850 T dcn31_link_encoder_enable_dp_mst_output +ffffffff820bca90 T dcn31_link_encoder_disable_output +ffffffff820bcd20 T dcn31_link_encoder_is_in_alt_mode +ffffffff820bce60 T dcn31_link_encoder_get_max_link_cap +ffffffff820bcfd0 t enc31_hw_init +ffffffff820be000 T dcn31_hpo_dp_link_enc_enable +ffffffff820be160 T dcn31_hpo_dp_link_enc_disable +ffffffff820be1d0 T dcn31_hpo_dp_link_enc_set_link_test_pattern +ffffffff820beb00 T dcn31_hpo_dp_link_enc_update_stream_allocation_table +ffffffff820bed90 T dcn31_hpo_dp_link_enc_set_throttled_vcp_size +ffffffff820bf030 T dcn31_hpo_dp_link_enc_read_state +ffffffff820bf2e0 T dcn31_hpo_dp_link_enc_enable_dp_output +ffffffff820bf3e0 T dcn31_hpo_dp_link_enc_disable_output +ffffffff820bf520 T dcn31_hpo_dp_link_enc_set_ffe +ffffffff820bf610 T hpo_dp_link_encoder31_construct +ffffffff820bf670 t dcn31_hpo_dp_link_enc_is_in_alt_mode +ffffffff820c0000 T dcn31_hpo_dp_stream_encoder_construct +ffffffff820c0070 t dcn31_hpo_dp_stream_enc_enable_stream +ffffffff820c01b0 t dcn31_hpo_dp_stream_enc_dp_unblank +ffffffff820c0460 t dcn31_hpo_dp_stream_enc_dp_blank +ffffffff820c0560 t dcn31_hpo_dp_stream_enc_disable +ffffffff820c05d0 t dcn31_hpo_dp_stream_enc_set_stream_attribute +ffffffff820c0e80 t dcn31_hpo_dp_stream_enc_update_dp_info_packets +ffffffff820c1040 t dcn31_hpo_dp_stream_enc_stop_dp_info_packets +ffffffff820c11d0 t dcn31_hpo_dp_stream_enc_set_dsc_pps_info_packet +ffffffff820c1470 t dcn31_hpo_dp_stream_enc_map_stream_to_link +ffffffff820c1570 t dcn31_hpo_dp_stream_enc_mute_control +ffffffff820c15e0 t dcn31_hpo_dp_stream_enc_audio_setup +ffffffff820c1690 t dcn31_hpo_dp_stream_enc_audio_enable +ffffffff820c1760 t dcn31_hpo_dp_stream_enc_audio_disable +ffffffff820c1910 t dcn31_hpo_dp_stream_enc_read_state +ffffffff820c1aa0 t dcn31_set_hblank_min_symbol_width +ffffffff820c2000 T hubbub31_init_dchub_sys_ctx +ffffffff820c21f0 T hubbub31_construct +ffffffff820c2290 t hubbub31_get_dcc_compression_cap +ffffffff820c2480 t hubbub31_get_dchub_ref_freq +ffffffff820c2560 t hubbub31_program_watermarks +ffffffff820c3e20 t hubbub31_verify_allow_pstate_change_high +ffffffff820c3fe0 t dcn31_program_det_size +ffffffff820c41c0 t dcn31_program_compbuf_size +ffffffff820c4440 t dcn31_init_crb +ffffffff820c5000 T hubp31_set_unbounded_requesting +ffffffff820c5090 T hubp31_soft_reset +ffffffff820c50e0 T hubp31_construct +ffffffff820c5150 t hubp31_program_extended_blank +ffffffff820c6000 T dcn31_init_hw +ffffffff820c6960 T dcn31_dsc_pg_control +ffffffff820c6cb0 T dcn31_enable_power_gating_plane +ffffffff820c6f10 T dcn31_update_info_frame +ffffffff820c6fe0 T dcn31_z10_save_init +ffffffff820c70a0 T dcn31_z10_restore +ffffffff820c7180 T dcn31_hubp_pg_control +ffffffff820c74a0 T dcn31_init_sys_ctx +ffffffff820c7550 T dcn31_reset_hw_ctx_wrap +ffffffff820c78c0 T dcn31_setup_hpo_hw_control +ffffffff820c8000 T dcn31_hw_sequencer_construct +ffffffff820c9000 T optc31_immediate_disable_crtc +ffffffff820c9100 T optc31_set_drr +ffffffff820c9320 T optc3_init_odm +ffffffff820c9490 T dcn31_timing_generator_init +ffffffff820c9500 t optc31_enable_crtc +ffffffff820c9600 t optc31_disable_crtc +ffffffff820c96e0 t optc31_set_odm_combine +ffffffff820ca000 T dcn31_panel_cntl_construct +ffffffff820ca040 t dcn31_panel_cntl_destroy +ffffffff820ca090 t dcn31_panel_cntl_hw_init +ffffffff820ca180 t dcn31_is_panel_backlight_on +ffffffff820ca220 t dcn31_is_panel_powered_on +ffffffff820ca2d0 t dcn31_store_backlight_level +ffffffff820ca390 t dcn31_get_16_bit_backlight_from_pwm +ffffffff820cb000 T dcn31_populate_dml_pipes_from_context +ffffffff820cb350 T dcn31_calculate_wm_and_dlg +ffffffff820cb3c0 T dcn31_populate_dml_writeback_from_context +ffffffff820cb420 T dcn31_set_mcif_arb_params +ffffffff820cb480 T dcn31_validate_bandwidth +ffffffff820cb870 T dcn31_create_resource_pool +ffffffff820ccc10 t dcn31_resource_destruct +ffffffff820cd270 t dcn31_destroy_resource_pool +ffffffff820cd2d0 t dcn31_panel_cntl_create +ffffffff820cd340 t dcn31_link_encoder_create +ffffffff820cd400 t dcn31_link_enc_create_minimal +ffffffff820cd4a0 t dcn31_get_panel_config_defaults +ffffffff820cd520 t read_dce_straps +ffffffff820cd550 t dcn31_create_audio +ffffffff820cd580 t dcn31_stream_encoder_create +ffffffff820cd700 t dcn31_hpo_dp_stream_encoder_create +ffffffff820cd8c0 t dcn31_hpo_dp_link_encoder_create +ffffffff820cd950 t dcn31_hwseq_create +ffffffff820ce000 T vpg31_powerdown +ffffffff820ce090 T vpg31_poweron +ffffffff820ce120 T vpg31_construct +ffffffff820cf000 T dccg314_create +ffffffff820cf0b0 t dccg314_set_dpstreamclk +ffffffff820cf480 t dccg314_set_dtbclk_dto +ffffffff820cf670 t dccg314_set_pixel_rate_div +ffffffff820cf9e0 t dccg314_set_valid_pixel_rate +ffffffff820cfa50 t dccg314_dpp_root_clock_control +ffffffff820d0000 T dcn314_dio_stream_encoder_construct +ffffffff820d0070 t enc314_stream_encoder_hdmi_set_stream_attribute +ffffffff820d0660 t enc314_stream_encoder_dvi_set_stream_attribute +ffffffff820d0870 t enc314_stream_encoder_dp_blank +ffffffff820d08c0 t enc314_stream_encoder_dp_unblank +ffffffff820d0c00 t enc314_read_state +ffffffff820d0d60 t enc314_dp_set_dsc_config +ffffffff820d0db0 t enc314_dp_set_odm_combine +ffffffff820d0df0 t enc314_set_dig_input_mode +ffffffff820d0e40 t enc314_enable_fifo +ffffffff820d0ee0 t enc314_disable_fifo +ffffffff820d0f30 t enc314_reset_fifo +ffffffff820d2000 T dcn314_update_odm +ffffffff820d2610 T dcn314_dsc_pg_control +ffffffff820d29e0 T dcn314_enable_power_gating_plane +ffffffff820d2c70 T dcn314_calculate_dccg_k1_k2_values +ffffffff820d2e00 T dcn314_set_pixels_per_cycle +ffffffff820d2ef0 T dcn314_dpp_root_clock_control +ffffffff820d2f50 T dcn314_hubp_pg_control +ffffffff820d4000 T dcn314_hw_sequencer_construct +ffffffff820d5000 T dcn314_timing_generator_init +ffffffff820d5070 t optc314_enable_crtc +ffffffff820d5170 t optc314_disable_crtc +ffffffff820d5250 t optc314_phantom_crtc_post_enable +ffffffff820d5310 t optc314_set_odm_bypass +ffffffff820d5480 t optc314_set_odm_combine +ffffffff820d5780 t optc314_set_h_timing_div_manual_mode +ffffffff820d6000 T dcn314_validate_bandwidth +ffffffff820d64a0 T dcn314_create_resource_pool +ffffffff820d7780 t dcn314_resource_destruct +ffffffff820d7de0 t dcn314_destroy_resource_pool +ffffffff820d7e40 t dcn31_panel_cntl_create +ffffffff820d7eb0 t dcn31_link_encoder_create +ffffffff820d7f70 t dcn31_link_enc_create_minimal +ffffffff820d8010 t dcn314_populate_dml_pipes_from_context +ffffffff820d80a0 t dcn314_update_bw_bounding_box +ffffffff820d80f0 t dcn314_get_panel_config_defaults +ffffffff820d8170 t read_dce_straps +ffffffff820d81a0 t dcn31_create_audio +ffffffff820d81d0 t dcn314_stream_encoder_create +ffffffff820d8350 t dcn31_hpo_dp_stream_encoder_create +ffffffff820d8510 t dcn31_hpo_dp_link_encoder_create +ffffffff820d85a0 t dcn314_hwseq_create +ffffffff820d9000 T dcn315_create_resource_pool +ffffffff820da270 t dcn315_resource_destruct +ffffffff820da8d0 t dcn315_destroy_resource_pool +ffffffff820da930 t dcn31_panel_cntl_create +ffffffff820da9a0 t dcn31_link_encoder_create +ffffffff820daa60 t dcn31_link_enc_create_minimal +ffffffff820dab00 t dcn315_populate_dml_pipes_from_context +ffffffff820db1a0 t dcn315_get_panel_config_defaults +ffffffff820db220 t read_dce_straps +ffffffff820db250 t dcn31_create_audio +ffffffff820db280 t dcn315_stream_encoder_create +ffffffff820db400 t dcn31_hpo_dp_stream_encoder_create +ffffffff820db5c0 t dcn31_hpo_dp_link_encoder_create +ffffffff820db650 t dcn31_hwseq_create +ffffffff820dc000 T dcn316_create_resource_pool +ffffffff820dd2b0 t dcn316_resource_destruct +ffffffff820dd910 t dcn316_destroy_resource_pool +ffffffff820dd970 t dcn31_panel_cntl_create +ffffffff820dd9e0 t dcn31_link_encoder_create +ffffffff820ddaa0 t dcn31_link_enc_create_minimal +ffffffff820ddb40 t dcn316_populate_dml_pipes_from_context +ffffffff820dde70 t dcn316_get_panel_config_defaults +ffffffff820ddef0 t read_dce_straps +ffffffff820ddf20 t dcn31_create_audio +ffffffff820ddf50 t dcn316_stream_encoder_create +ffffffff820de0d0 t dcn31_hpo_dp_stream_encoder_create +ffffffff820de290 t dcn31_hpo_dp_link_encoder_create +ffffffff820de320 t dcn31_hwseq_create +ffffffff820df000 T dccg32_create +ffffffff820df0b0 t dccg32_get_dccg_ref_freq +ffffffff820df0e0 t dccg32_otg_add_pixel +ffffffff820df120 t dccg32_otg_drop_pixel +ffffffff820df160 t dccg32_set_dpstreamclk +ffffffff820df490 t dccg32_set_dtbclk_dto +ffffffff820df690 t dccg32_set_pixel_rate_div +ffffffff820dfa60 t dccg32_set_valid_pixel_rate +ffffffff820e0000 T enc32_hw_init +ffffffff820e0090 T dcn32_link_encoder_enable_dp_output +ffffffff820e00e0 T dcn32_link_encoder_construct +ffffffff820e02c0 t dcn32_link_encoder_is_in_alt_mode +ffffffff820e0340 t dcn32_link_encoder_get_max_link_cap +ffffffff820e1000 T dcn32_dio_stream_encoder_construct +ffffffff820e1070 t enc32_stream_encoder_hdmi_set_stream_attribute +ffffffff820e15a0 t enc32_stream_encoder_dvi_set_stream_attribute +ffffffff820e1720 t enc32_stream_encoder_dp_unblank +ffffffff820e1be0 t enc32_read_state +ffffffff820e1d40 t enc32_dp_set_dsc_config +ffffffff820e1d90 t enc32_dp_set_odm_combine +ffffffff820e1dd0 t enc32_set_dig_input_mode +ffffffff820e2000 T dpp32_construct +ffffffff820e2060 t dscl32_calc_lb_num_partitions +ffffffff820e3000 T hpo_dp_link_encoder32_construct +ffffffff820e3060 t dcn32_hpo_dp_link_enc_is_in_alt_mode +ffffffff820e4000 T dcn32_program_det_size +ffffffff820e41a0 T hubbub32_program_urgent_watermarks +ffffffff820e4910 T hubbub32_program_stutter_watermarks +ffffffff820e4d60 T hubbub32_program_pstate_watermarks +ffffffff820e51f0 T hubbub32_program_usr_watermarks +ffffffff820e5440 T hubbub32_force_usr_retraining_allow +ffffffff820e54c0 T hubbub32_force_wm_propagate_to_pipes +ffffffff820e5560 T hubbub32_construct +ffffffff820e55e0 t hubbub32_wm_read_state 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+ffffffff820e9610 T dcn32_update_mall_sel +ffffffff820e9790 T dcn32_program_mall_pipe_config +ffffffff820e9870 T dcn32_init_hw +ffffffff820ea080 T dcn32_update_odm +ffffffff820ea690 T dcn32_calculate_dccg_k1_k2_values +ffffffff820ea890 T dcn32_is_dp_dig_pixel_rate_div_policy +ffffffff820ea920 T dcn32_set_pixels_per_cycle +ffffffff820eaa60 T dcn32_unblank_stream +ffffffff820eac30 T dcn32_disable_link_output +ffffffff820eaec0 T dcn32_update_phantom_vp_position +ffffffff820eafe0 T dcn32_dsc_pg_status +ffffffff820eb0c0 T dcn32_update_dsc_pg +ffffffff820ec000 T dcn32_hw_sequencer_init_functions +ffffffff820ed000 t mmhubbub32_warmup_mcif +ffffffff820ed210 t mmhubbub32_config_mcif_buf +ffffffff820ed6c0 t mmhubbub32_config_mcif_arb +ffffffff820edad0 T dcn32_mmhubbub_construct +ffffffff820ee000 t mpc32_mpc_init +ffffffff820ee220 t mpc32_program_post1dlut +ffffffff820eed00 t mpc32_program_shaper +ffffffff820f0fb0 t mpc32_program_3dlut +ffffffff820f18a0 T dcn32_mpc_construct +ffffffff820f1960 t mpc32_power_on_shaper_3dlut +ffffffff820f1b90 t mpc32_set3dlut_ram12 +ffffffff820f2000 T optc32_set_h_timing_div_manual_mode +ffffffff820f2040 T dcn32_timing_generator_init +ffffffff820f20b0 t optc32_enable_crtc +ffffffff820f21b0 t optc32_disable_crtc +ffffffff820f2290 t optc32_phantom_crtc_post_enable +ffffffff820f2350 t optc32_disable_phantom_otg +ffffffff820f2390 t optc32_set_drr +ffffffff820f25e0 t optc32_set_odm_bypass +ffffffff820f2750 t optc32_set_odm_combine +ffffffff820f3000 T dcn32_panel_cntl_create +ffffffff820f3070 T dcn32_acquire_post_bldn_3dlut +ffffffff820f3160 T dcn32_release_post_bldn_3dlut +ffffffff820f3210 T dcn32_retain_phantom_pipes +ffffffff820f32e0 T dcn32_remove_phantom_pipes +ffffffff820f3450 T dcn32_add_phantom_pipes +ffffffff820f3890 T dcn32_validate_bandwidth +ffffffff820f3d50 T dcn32_populate_dml_pipes_from_context +ffffffff820f4130 T dcn32_calculate_wm_and_dlg +ffffffff820f41a0 T dcn32_create_resource_pool +ffffffff820f4250 t dcn32_resource_construct +ffffffff82100680 T dcn32_acquire_idle_pipe_for_head_pipe_in_layer +ffffffff821008c0 T dcn32_calc_num_avail_chans_for_mall +ffffffff82100930 t dcn32_mpc_create +ffffffff821052f0 t dcn32_resource_destruct +ffffffff82105960 t dcn32_destroy_resource_pool +ffffffff821059c0 t dcn32_link_encoder_create +ffffffff82106920 t dcn32_update_bw_bounding_box +ffffffff82106970 t read_dce_straps +ffffffff821069a0 t dcn32_create_audio +ffffffff82106ce0 t dcn32_stream_encoder_create +ffffffff82108b60 t dcn32_hpo_dp_stream_encoder_create +ffffffff82109840 t dcn32_hpo_dp_link_encoder_create +ffffffff82109cc0 t dcn32_hwseq_create +ffffffff8210a160 t dcn32_vpg_create +ffffffff8210b000 T dcn32_helper_calculate_num_ways_for_subvp +ffffffff8210b1e0 T dcn32_merge_pipes_for_subvp +ffffffff8210b3b0 T dcn32_all_pipes_have_stream_and_plane +ffffffff8210b440 T dcn32_subvp_in_use +ffffffff8210b4d0 T dcn32_mpo_in_use +ffffffff8210b540 T dcn32_any_surfaces_rotated +ffffffff8210b5d0 T dcn32_determine_det_override +ffffffff8210b910 T dcn32_set_det_allocations +ffffffff8210ba90 T dcn32_save_mall_state +ffffffff8210bb40 T dcn32_restore_mall_state +ffffffff8210c000 T dcn321_link_encoder_construct +ffffffff8210d000 T dcn321_create_resource_pool +ffffffff8210d0b0 t dcn321_resource_construct +ffffffff82119480 t dcn321_mpc_create +ffffffff8211de40 t dcn321_resource_destruct +ffffffff8211e4b0 t dcn321_destroy_resource_pool +ffffffff8211e510 t dcn321_link_encoder_create +ffffffff8211f470 t dcn321_update_bw_bounding_box +ffffffff8211f4c0 t read_dce_straps +ffffffff8211f4f0 t dcn321_create_audio +ffffffff8211f830 t dcn321_stream_encoder_create +ffffffff821216b0 t dcn321_hpo_dp_stream_encoder_create +ffffffff82122390 t dcn321_hpo_dp_link_encoder_create +ffffffff82122810 t dcn321_hwseq_create +ffffffff82122cb0 t dcn321_vpg_create +ffffffff82124000 T bw_int_to_fixed_nonconst +ffffffff82124090 T bw_frc_to_fixed +ffffffff82124260 T bw_floor2 +ffffffff82124310 T bw_ceil2 +ffffffff82124390 T bw_mul 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dcn_bw_calc_rq_dlg_ttu +ffffffff8213ff00 T dcn_find_dcfclk_suits_all +ffffffff82140360 T dcn_bw_update_from_pplib_fclks +ffffffff821404f0 T dcn_bw_update_from_pplib_dcfclks +ffffffff821405c0 T dcn_get_soc_clks +ffffffff82140640 T dcn_bw_notify_pplib_of_wm_ranges +ffffffff82141000 T dcn20_populate_dml_writeback_from_context +ffffffff82141180 T dcn20_fpu_set_wb_arb_params +ffffffff82141330 T dcn20_calculate_dlg_params +ffffffff82141b10 T dcn20_populate_dml_pipes_from_context +ffffffff82142a10 T dcn20_calculate_wm +ffffffff821431b0 T dcn20_update_bounding_box +ffffffff82143430 T dcn20_cap_soc_clocks +ffffffff821437b0 T dcn20_patch_bounding_box +ffffffff82143920 T dcn20_validate_bandwidth_fp +ffffffff82143ab0 t dcn20_validate_bandwidth_internal +ffffffff82143e90 T dcn20_fpu_set_wm_ranges +ffffffff82143f30 T dcn20_fpu_adjust_dppclk +ffffffff82143fd0 T dcn21_populate_dml_pipes_from_context +ffffffff821440d0 T dcn21_validate_bandwidth_fp +ffffffff82144b50 T dcn21_update_bw_bounding_box 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CalculatePrefetchSourceLines +ffffffff82162ab0 t CalculateWriteBackDelay +ffffffff82162d80 t CalculateDelayAfterScaler +ffffffff821630d0 t CalculatePrefetchSchedule +ffffffff82163e40 t CalculateFlipSchedule +ffffffff821641f0 t adjust_ReturnBW +ffffffff82165000 T dml20_rq_dlg_get_rq_reg +ffffffff82165490 t dml20_rq_dlg_get_rq_params +ffffffff82165660 T dml20_rq_dlg_get_dlg_reg +ffffffff821675a0 t get_surf_rq_param +ffffffff82167e20 t calculate_ttu_cursor +ffffffff82169000 T dml20v2_rq_dlg_get_rq_reg +ffffffff82169490 t dml20v2_rq_dlg_get_rq_params +ffffffff82169660 T dml20v2_rq_dlg_get_dlg_reg +ffffffff8216b5b0 t get_surf_rq_param +ffffffff8216be30 t calculate_ttu_cursor +ffffffff8216d000 T dml21_recalculate +ffffffff8216d700 t DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation +ffffffff821730b0 T dml21_ModeSupportAndSystemConfigurationFull +ffffffff82179190 t TruncToValidBPP +ffffffff82179720 t CalculateDCFCLKDeepSleep +ffffffff82179a60 t CalculateVMAndRowBytes +ffffffff8217a2d0 t CalculatePrefetchSourceLines +ffffffff8217a490 t CalculateWriteBackDelay +ffffffff8217a760 t CalculatePrefetchSchedulePerPlane +ffffffff8217af70 t CalculateUrgentBurstFactor +ffffffff8217b380 t CalculateFlipSchedule +ffffffff8217b870 t CalculateWatermarksAndDRAMSpeedChangeSupport +ffffffff8217c8d0 t CalculatePrefetchSchedule +ffffffff8217e000 T dml21_rq_dlg_get_rq_reg +ffffffff8217e490 t dml_rq_dlg_get_rq_params +ffffffff8217e660 T dml21_rq_dlg_get_dlg_reg +ffffffff821809b0 t get_surf_rq_param +ffffffff821812f0 t calculate_ttu_cursor +ffffffff82182000 T optc3_fpu_set_vrr_m_const +ffffffff821824a0 T dcn30_fpu_populate_dml_writeback_from_context +ffffffff821827f0 T dcn30_fpu_set_mcif_arb_params +ffffffff82182960 T dcn30_fpu_update_soc_for_wm_a +ffffffff82182a30 T dcn30_fpu_calculate_wm_and_dlg +ffffffff82183330 T dcn30_fpu_update_dram_channel_width_bytes +ffffffff82183390 T dcn30_fpu_update_max_clk +ffffffff82183440 T dcn30_fpu_get_optimal_dcfclk_fclk_for_uclk +ffffffff82183540 T dcn30_fpu_update_bw_bounding_box +ffffffff82183720 T dcn30_find_dummy_latency_index_for_fw_based_mclk_switch +ffffffff82183900 T dcn3_fpu_build_wm_range_table +ffffffff82183be0 T patch_dcn30_soc_bounding_box +ffffffff82184000 T dml30_recalculate +ffffffff82184600 t DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation +ffffffff8218ac50 T dml30_CalculateBytePerPixelAnd256BBlockSizes +ffffffff8218aec0 T dml30_CalculateWriteBackDISPCLK +ffffffff8218b040 T dml30_ModeSupportAndSystemConfigurationFull +ffffffff82192440 t CalculateSwathAndDETConfiguration +ffffffff82192ab0 t TruncToValidBPP +ffffffff82192d30 t dscceComputeDelay +ffffffff82192e70 t CalculateVMAndRowBytes +ffffffff82193520 t CalculatePrefetchSourceLines +ffffffff821936e0 t CalculateUrgentBurstFactor +ffffffff82193970 t CalculateDCFCLKDeepSleep +ffffffff82193c90 t UseMinimumDCFCLK +ffffffff82194e90 t CalculatePrefetchSchedule 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dcn31_calculate_wm_and_dlg_fp +ffffffff8219f830 T dcn31_update_bw_bounding_box +ffffffff8219fc20 T dcn315_update_bw_bounding_box +ffffffff8219ff10 T dcn316_update_bw_bounding_box +ffffffff821a0310 T dcn_get_max_non_odm_pix_rate_100hz +ffffffff821a0370 T dcn_get_approx_det_segs_required_for_pstate +ffffffff821a1000 T dml31_recalculate +ffffffff821a12e0 t DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation +ffffffff821a80a0 T dml31_CalculateWriteBackDISPCLK +ffffffff821a8220 T dml31_ModeSupportAndSystemConfigurationFull +ffffffff821b0dd0 t CalculateSwathAndDETConfiguration +ffffffff821b1400 t TruncToValidBPP +ffffffff821b1680 t dscceComputeDelay +ffffffff821b17c0 t CalculateDCFCLKDeepSleep +ffffffff821b1b00 t CalculateVMAndRowBytes +ffffffff821b2150 t CalculatePrefetchSourceLines +ffffffff821b2310 t CalculateUrgentBurstFactor +ffffffff821b25a0 t CalculatePrefetchSchedulePerPlane +ffffffff821b2cd0 t CalculateFlipSchedule +ffffffff821b3250 t CalculateWatermarksAndDRAMSpeedChangeSupport +ffffffff821b3eb0 t CalculateSwathWidth +ffffffff821b43c0 t CalculatePrefetchSchedule +ffffffff821b5850 t CalculateVupdateAndDynamicMetadataParameters +ffffffff821b6000 T dml31_rq_dlg_get_rq_reg +ffffffff821b64b0 t dml_rq_dlg_get_rq_params +ffffffff821b6720 T dml31_rq_dlg_get_dlg_reg +ffffffff821b91e0 t get_surf_rq_param +ffffffff821ba000 T dcn314_update_bw_bounding_box_fpu +ffffffff821ba480 T dcn314_populate_dml_pipes_from_context_fpu +ffffffff821bb000 T dml314_recalculate +ffffffff821bb280 t DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation +ffffffff821c1f60 T dml314_CalculateWriteBackDISPCLK +ffffffff821c20e0 T dml314_ModeSupportAndSystemConfigurationFull +ffffffff821ca9a0 t CalculateBytePerPixelAnd256BBlockSizes +ffffffff821cac10 t CalculateSwathAndDETConfiguration +ffffffff821cb210 t TruncToValidBPP +ffffffff821cb490 t dscceComputeDelay +ffffffff821cb5d0 t CalculateDCFCLKDeepSleep +ffffffff821cb910 t CalculateVMAndRowBytes +ffffffff821cbf60 t CalculatePrefetchSourceLines +ffffffff821cc120 t CalculateUrgentBurstFactor +ffffffff821cc3b0 t CalculateMaxVStartup +ffffffff821cc4f0 t CalculatePrefetchSchedulePerPlane +ffffffff821ccc20 t CalculateFlipSchedule +ffffffff821cd1a0 t CalculateWatermarksAndDRAMSpeedChangeSupport +ffffffff821cde00 t CalculateSwathWidth +ffffffff821ce310 t CalculatePrefetchSchedule +ffffffff821cf7a0 t CalculateVupdateAndDynamicMetadataParameters +ffffffff821d0000 T dml314_rq_dlg_get_rq_reg +ffffffff821d04b0 t dml_rq_dlg_get_rq_params +ffffffff821d0720 T dml314_rq_dlg_get_dlg_reg +ffffffff821d32a0 t get_surf_rq_param +ffffffff821d4000 T dcn32_build_wm_range_table_fpu +ffffffff821d4390 T dcn32_find_dummy_latency_index_for_fw_based_mclk_switch +ffffffff821d45c0 T dcn32_internal_validate_bw +ffffffff821d62d0 T dcn32_helper_populate_phantom_dlg_params +ffffffff821d6470 T dcn32_predict_pipe_split +ffffffff821d66a0 T insert_entry_into_table_sorted +ffffffff821d6ad0 T dcn32_set_phantom_stream_timing +ffffffff821d6d70 t dcn32_split_stream_for_mpc_or_odm +ffffffff821d7100 T dcn32_calculate_wm_and_dlg_fpu +ffffffff821d86e0 T dcn32_patch_dpm_table +ffffffff821d88f0 T dcn32_update_bw_bounding_box_fpu +ffffffff821da1b0 T dcn32_zero_pipe_dcc_fraction +ffffffff821da210 T dcn32_allow_subvp_with_active_margin +ffffffff821da2e0 t subvp_drr_schedulable +ffffffff821db000 T dml32_recalculate +ffffffff821df330 T dml32_ModeSupportAndSystemConfigurationFull +ffffffff821e7000 T dml32_dscceComputeDelay +ffffffff821e7140 T dml32_dscComputeDelay +ffffffff821e7180 T IsVertical +ffffffff821e71b0 T dml32_CalculateSinglePipeDPPCLKAndSCLThroughput +ffffffff821e74d0 T dml32_CalculateBytePerPixelAndBlockSizes +ffffffff821e7800 T dml32_CalculateSwathAndDETConfiguration +ffffffff821e8020 T dml32_CalculateSwathWidth +ffffffff821e88c0 T dml32_UnboundedRequest +ffffffff821e8930 T dml32_CalculateDETBufferSize +ffffffff821e8f70 T dml32_CalculateODMMode +ffffffff821e96d0 T dml32_CalculateRequiredDispclk +ffffffff821e9890 T dml32_RoundToDFSGranularity +ffffffff821e9920 T dml32_CalculateOutputLink +ffffffff821ea450 T dml32_TruncToValidBPP +ffffffff821ea7a0 T dml32_CalculateDPPCLK +ffffffff821ea950 T dml32_RequiredDTBCLK +ffffffff821eaba0 T dml32_DSCDelayRequirement +ffffffff821eb070 T dml32_CalculateSurfaceSizeInMall +ffffffff821ebb80 T dml32_CalculateVMRowAndSwath +ffffffff821ec9b0 T dml32_CalculateVMAndRowBytes +ffffffff821ed5f0 T dml32_CalculatePrefetchSourceLines +ffffffff821ed840 T dml32_CalculateMALLUseForStaticScreen +ffffffff821ed990 T dml32_CalculateRowBandwidth +ffffffff821edaf0 T dml32_CalculateUrgentLatency +ffffffff821edb90 T dml32_CalculateUrgentBurstFactor +ffffffff821ede40 T dml32_CalculateDCFCLKDeepSleep +ffffffff821ee190 T dml32_CalculateWriteBackDelay +ffffffff821ee2f0 T dml32_UseMinimumDCFCLK +ffffffff821ef1b0 T dml32_CalculateExtraLatencyBytes +ffffffff821ef380 T dml32_CalculateTWait +ffffffff821ef460 T dml32_CalculateVUpdateAndDynamicMetadataParameters +ffffffff821ef6c0 T dml32_get_return_bw_mbps +ffffffff821ef880 T dml32_get_return_bw_mbps_vm_only +ffffffff821ef960 T dml32_CalculateExtraLatency +ffffffff821efb90 T dml32_CalculatePrefetchSchedule +ffffffff821f1150 T dml32_CalculateFlipSchedule +ffffffff821f16d0 T dml32_CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport +ffffffff821f2830 T dml32_CalculateWriteBackDISPCLK +ffffffff821f29f0 T dml32_CalculateMinAndMaxPrefetchMode +ffffffff821f2a30 T dml32_CalculatePixelDeliveryTimes +ffffffff821f2ea0 T dml32_CalculateMetaAndPTETimes +ffffffff821f35e0 T dml32_CalculateVMGroupAndRequestTimes +ffffffff821f3ad0 T dml32_CalculateDCCConfiguration +ffffffff821f40f0 T dml32_CalculateStutterEfficiency +ffffffff821f5040 T dml32_CalculateMaxDETAndMinCompressedBufferSize +ffffffff821f5130 T dml32_CalculateVActiveBandwithSupport +ffffffff821f52c0 T dml32_CalculatePrefetchBandwithSupport +ffffffff821f5560 T dml32_CalculateBandwidthAvailableForImmediateFlip +ffffffff821f56b0 T dml32_CalculateImmediateFlipBandwithSupport +ffffffff821f5900 T dml32_CalculateDETSwathFillLatencyHiding +ffffffff821f6000 T dml32_rq_dlg_get_rq_reg +ffffffff821f66a0 T dml32_rq_dlg_get_dlg_reg +ffffffff821f9000 T dcn321_insert_entry_into_table_sorted +ffffffff821f9430 T dcn321_update_bw_bounding_box_fpu +ffffffff821fb000 T dml_init_instance +ffffffff821fb310 T dml_get_status_message +ffffffff821fb350 T dml_log_pipe_params +ffffffff821fb380 T dml_log_mode_support_params +ffffffff821fc000 T dml_get_voltage_level +ffffffff821fc1f0 t fetch_socbb_params +ffffffff821fc700 t fetch_ip_params +ffffffff821fcba0 t fetch_pipe_params +ffffffff821fdcd0 T PixelClockAdjustmentForProgressiveToInterlaceUnit +ffffffff821fdd50 T get_clk_dcf_deepsleep +ffffffff821fde60 T get_wm_urgent +ffffffff821fdf70 T get_wm_memory_trip +ffffffff821fe080 T get_wm_writeback_urgent +ffffffff821fe190 T get_wm_stutter_exit +ffffffff821fe2a0 T get_wm_stutter_enter_exit +ffffffff821fe3b0 T get_wm_z8_stutter_exit +ffffffff821fe4c0 T get_wm_z8_stutter_enter_exit +ffffffff821fe5d0 T get_stutter_efficiency_z8 +ffffffff821fe6e0 T get_stutter_num_bursts_z8 +ffffffff821fe7f0 T get_wm_dram_clock_change +ffffffff821fe900 T get_wm_writeback_dram_clock_change +ffffffff821fea10 T get_stutter_efficiency +ffffffff821feb20 T get_stutter_efficiency_no_vblank +ffffffff821fec30 T get_stutter_period +ffffffff821fed40 T get_urgent_latency +ffffffff821fee50 T get_urgent_extra_latency +ffffffff821fef60 T get_nonurgent_latency +ffffffff821ff070 T get_dram_clock_change_latency +ffffffff821ff180 T get_dispclk_calculated +ffffffff821ff290 T get_total_data_read_bw +ffffffff821ff3a0 T get_return_bw +ffffffff821ff4b0 T get_tcalc +ffffffff821ff5c0 T get_fraction_of_urgent_bandwidth +ffffffff821ff6d0 T get_fraction_of_urgent_bandwidth_imm_flip +ffffffff821ff7e0 T get_cstate_max_cap_mode +ffffffff821ff900 T get_comp_buffer_size_kbytes +ffffffff821ffa10 T get_pixel_chunk_size_in_kbyte +ffffffff821ffb30 T get_alpha_pixel_chunk_size_in_kbyte +ffffffff821ffc50 T get_meta_chunk_size_in_kbyte +ffffffff821ffd70 T get_min_pixel_chunk_size_in_byte +ffffffff821ffe80 T get_min_meta_chunk_size_in_byte +ffffffff821fffa0 T get_fclk_watermark +ffffffff822000b0 T get_usr_retraining_watermark +ffffffff822001c0 T get_comp_buffer_reserved_space_kbytes +ffffffff822002e0 T get_comp_buffer_reserved_space_64bytes +ffffffff82200400 T get_comp_buffer_reserved_space_zs +ffffffff82200520 T get_unbounded_request_enabled +ffffffff82200640 T get_dsc_delay +ffffffff82200770 T get_dppclk_calculated +ffffffff82200890 T get_dscclk_calculated +ffffffff822009b0 T get_min_ttu_vblank +ffffffff82200ad0 T get_min_ttu_vblank_in_us +ffffffff82200bf0 T get_vratio_prefetch_l +ffffffff82200d10 T get_vratio_prefetch_c +ffffffff82200e30 T get_dst_x_after_scaler +ffffffff82200f50 T get_dst_y_after_scaler +ffffffff82201070 T get_dst_y_per_vm_vblank +ffffffff82201190 T get_dst_y_per_row_vblank +ffffffff822012b0 T get_dst_y_prefetch +ffffffff822013d0 T get_dst_y_per_vm_flip +ffffffff822014f0 T get_dst_y_per_row_flip +ffffffff82201610 T get_refcyc_per_vm_group_vblank +ffffffff82201730 T get_refcyc_per_vm_group_flip +ffffffff82201850 T get_refcyc_per_vm_req_vblank +ffffffff82201970 T get_refcyc_per_vm_req_flip +ffffffff82201a90 T get_refcyc_per_vm_group_vblank_in_us +ffffffff82201bb0 T get_refcyc_per_vm_group_flip_in_us +ffffffff82201cd0 T get_refcyc_per_vm_req_vblank_in_us +ffffffff82201df0 T get_refcyc_per_vm_req_flip_in_us +ffffffff82201f10 T get_refcyc_per_vm_dmdata_in_us +ffffffff82202030 T get_dmdata_dl_delta_in_us +ffffffff82202150 T get_refcyc_per_line_delivery_l_in_us +ffffffff82202270 T get_refcyc_per_line_delivery_c_in_us +ffffffff82202390 T get_refcyc_per_line_delivery_pre_l_in_us +ffffffff822024b0 T get_refcyc_per_line_delivery_pre_c_in_us +ffffffff822025d0 T get_refcyc_per_req_delivery_l_in_us +ffffffff822026f0 T get_refcyc_per_req_delivery_c_in_us +ffffffff82202810 T get_refcyc_per_req_delivery_pre_l_in_us +ffffffff82202930 T get_refcyc_per_req_delivery_pre_c_in_us +ffffffff82202a50 T get_refcyc_per_cursor_req_delivery_in_us +ffffffff82202b70 T get_refcyc_per_cursor_req_delivery_pre_in_us +ffffffff82202c90 T get_refcyc_per_meta_chunk_nom_l_in_us +ffffffff82202db0 T get_refcyc_per_meta_chunk_nom_c_in_us +ffffffff82202ed0 T get_refcyc_per_meta_chunk_vblank_l_in_us +ffffffff82202ff0 T get_refcyc_per_meta_chunk_vblank_c_in_us +ffffffff82203110 T get_refcyc_per_meta_chunk_flip_l_in_us +ffffffff82203230 T get_refcyc_per_meta_chunk_flip_c_in_us +ffffffff82203350 T get_vstartup +ffffffff82203480 T get_vupdate_offset +ffffffff822035b0 T get_vupdate_width +ffffffff822036d0 T get_vready_offset +ffffffff822037f0 T get_vready_at_or_after_vsync +ffffffff82203920 T get_min_dst_y_next_start +ffffffff82203a50 T get_dst_y_per_pte_row_nom_l +ffffffff82203b70 T get_dst_y_per_pte_row_nom_c +ffffffff82203c90 T get_dst_y_per_meta_row_nom_l +ffffffff82203db0 T get_dst_y_per_meta_row_nom_c +ffffffff82203ed0 T get_refcyc_per_pte_group_nom_l_in_us +ffffffff82203ff0 T get_refcyc_per_pte_group_nom_c_in_us +ffffffff82204110 T get_refcyc_per_pte_group_vblank_l_in_us +ffffffff82204230 T get_refcyc_per_pte_group_vblank_c_in_us +ffffffff82204350 T get_refcyc_per_pte_group_flip_l_in_us +ffffffff82204470 T get_refcyc_per_pte_group_flip_c_in_us +ffffffff82204590 T get_vstartup_calculated +ffffffff822046c0 T get_dpte_row_height_linear_c +ffffffff822047f0 T get_swath_height_l +ffffffff82204920 T get_swath_height_c +ffffffff82204a50 T get_det_stored_buffer_size_l_bytes +ffffffff82204b80 T get_det_stored_buffer_size_c_bytes +ffffffff82204cb0 T get_dpte_group_size_in_bytes +ffffffff82204de0 T get_vm_group_size_in_bytes +ffffffff82204f10 T get_dpte_row_height_linear_l +ffffffff82205040 T get_pte_buffer_mode +ffffffff82205170 T get_subviewport_lines_needed_in_mall +ffffffff822052a0 T get_total_immediate_flip_bytes +ffffffff822053c0 T get_total_immediate_flip_bw +ffffffff822055a0 T get_total_prefetch_bw +ffffffff82205780 T get_total_surface_size_in_mall_bytes +ffffffff82205930 T get_det_buffer_size_kbytes +ffffffff82205a60 T get_is_phantom_pipe +ffffffff82205b90 T Calculate256BBlockSizes +ffffffff82205c80 T CalculateMinAndMaxPrefetchMode +ffffffff82205d00 T ModeSupportAndSystemConfiguration +ffffffff82206020 T CalculateWriteBackDISPCLK +ffffffff82207000 T print__rq_params_st +ffffffff82207030 T print__data_rq_sizing_params_st +ffffffff82207060 T print__data_rq_dlg_params_st +ffffffff82207090 T print__data_rq_misc_params_st +ffffffff822070c0 T print__rq_dlg_params_st +ffffffff822070f0 T print__dlg_sys_params_st +ffffffff82207120 T print__data_rq_regs_st +ffffffff82207150 T print__rq_regs_st +ffffffff82207180 T print__dlg_regs_st +ffffffff822071b0 T print__ttu_regs_st +ffffffff82208000 T dml1_extract_rq_regs +ffffffff82208330 T dml1_rq_dlg_get_rq_params +ffffffff82208500 t get_surf_rq_param +ffffffff82209200 T dml1_rq_dlg_get_dlg_params +ffffffff8220c000 T _do_calc_rc_params +ffffffff8220d040 t get_qp_set +ffffffff8220e000 T dc_dsc_parse_dsc_dpcd +ffffffff8220e2a0 t dsc_throughput_from_dpcd +ffffffff8220e460 T dc_dsc_compute_bandwidth_range +ffffffff8220e640 t intersect_dsc_caps +ffffffff8220e800 t setup_dsc_config +ffffffff8220f1d0 T dc_dsc_compute_config +ffffffff8220f2d0 T dc_dsc_stream_bandwidth_in_kbps +ffffffff8220f430 T dc_dsc_stream_bandwidth_overhead_in_kbps +ffffffff8220f580 T dc_dsc_get_policy_for_timing +ffffffff8220f620 T dc_dsc_policy_set_max_target_bpp_limit +ffffffff8220f650 T dc_dsc_policy_set_enable_dsc_when_not_needed +ffffffff8220f680 T dc_dsc_policy_set_disable_dsc_stream_overhead +ffffffff82210000 T calc_rc_params +ffffffff82211000 T dscc_compute_dsc_parameters +ffffffff82212000 T dal_hw_factory_dce110_init +ffffffff82212060 t define_hpd_registers +ffffffff822120b0 t define_ddc_registers +ffffffff82213000 T dal_hw_translate_dce110_init +ffffffff82213030 t offset_to_id +ffffffff82213390 t id_to_offset +ffffffff82214000 T dal_hw_factory_dce120_init +ffffffff82214060 t define_hpd_registers +ffffffff822140b0 t define_ddc_registers +ffffffff82215000 T dal_hw_translate_dce120_init +ffffffff82215030 t offset_to_id +ffffffff822153a0 t id_to_offset +ffffffff82216000 T dal_hw_factory_dce80_init +ffffffff82216060 t define_hpd_registers +ffffffff822160b0 t define_ddc_registers +ffffffff82217000 T dal_hw_translate_dce80_init +ffffffff82217030 t offset_to_id +ffffffff822177b0 t id_to_offset +ffffffff82218000 T dal_hw_factory_dcn10_init +ffffffff82218060 t define_hpd_registers +ffffffff822180b0 t define_ddc_registers +ffffffff82218150 t define_generic_registers +ffffffff82219000 T dal_hw_translate_dcn10_init +ffffffff82219030 t offset_to_id +ffffffff82219390 t id_to_offset +ffffffff8221a000 T dal_hw_factory_dcn20_init +ffffffff8221a060 t define_hpd_registers +ffffffff8221a0b0 t define_ddc_registers +ffffffff8221a160 t define_generic_registers +ffffffff8221b000 T dal_hw_translate_dcn20_init +ffffffff8221b030 t offset_to_id +ffffffff8221b2b0 t id_to_offset +ffffffff8221c000 T dal_hw_factory_dcn21_init +ffffffff8221c060 t define_hpd_registers +ffffffff8221c0b0 t define_ddc_registers +ffffffff8221c160 t define_generic_registers +ffffffff8221d000 T dal_hw_translate_dcn21_init +ffffffff8221d030 t offset_to_id +ffffffff8221d2b0 t id_to_offset +ffffffff8221e000 T dal_hw_factory_dcn30_init +ffffffff8221e060 t define_hpd_registers +ffffffff8221e0b0 t define_ddc_registers +ffffffff8221e160 t define_generic_registers +ffffffff8221f000 T dal_hw_translate_dcn30_init +ffffffff8221f030 t offset_to_id +ffffffff8221f2c0 t id_to_offset +ffffffff82220000 T dal_hw_factory_dcn315_init +ffffffff82220060 t define_hpd_registers +ffffffff822200b0 t define_ddc_registers +ffffffff82220160 t define_generic_registers +ffffffff82221000 T dal_hw_translate_dcn315_init +ffffffff82221030 t offset_to_id +ffffffff822212b0 t id_to_offset +ffffffff82222000 T dal_hw_factory_dcn32_init +ffffffff82222060 t define_hpd_registers +ffffffff822220b0 t define_ddc_registers +ffffffff82222160 t define_generic_registers +ffffffff82223000 T dal_hw_translate_dcn32_init +ffffffff82223030 t offset_to_id +ffffffff82223290 t id_to_offset +ffffffff82224000 T dal_gpio_open +ffffffff822240c0 T dal_gpio_open_ex +ffffffff82224180 T dal_gpio_get_value +ffffffff82224200 T dal_gpio_set_value +ffffffff82224280 T dal_gpio_get_mode +ffffffff822242b0 T dal_gpio_lock_pin +ffffffff822242d0 T dal_gpio_unlock_pin +ffffffff822242f0 T dal_gpio_change_mode +ffffffff82224370 T dal_gpio_get_id +ffffffff822243a0 T dal_gpio_get_enum +ffffffff822243d0 T dal_gpio_set_config +ffffffff82224450 T dal_gpio_get_pin_info +ffffffff822244b0 T dal_gpio_get_sync_source +ffffffff82224540 T dal_gpio_get_output_state +ffffffff82224570 T dal_gpio_get_ddc +ffffffff822245a0 T dal_gpio_get_hpd +ffffffff822245d0 T dal_gpio_get_generic +ffffffff82224600 T dal_gpio_close +ffffffff82224650 T dal_gpio_create +ffffffff822247e0 T dal_gpio_destroy +ffffffff82225000 T dal_gpio_service_create +ffffffff82225260 T dal_gpio_service_create_irq +ffffffff82225320 T dal_gpio_create_irq +ffffffff822253a0 T dal_gpio_service_create_generic_mux +ffffffff82225440 T dal_gpio_destroy_generic_mux +ffffffff822254d0 T dal_gpio_get_generic_pin_info +ffffffff82225530 T dal_gpio_service_destroy +ffffffff82225660 T dal_mux_setup_config +ffffffff822256c0 T dal_gpio_service_lock +ffffffff82225740 T dal_gpio_service_unlock +ffffffff822257c0 T dal_gpio_service_open +ffffffff82225a00 T dal_gpio_service_close +ffffffff82225aa0 T dal_irq_get_source +ffffffff82225b10 T dal_irq_get_rx_source +ffffffff82225b60 T dal_irq_setup_hpd_filter +ffffffff82225bc0 T dal_gpio_destroy_irq +ffffffff82225c50 T dal_gpio_create_ddc +ffffffff82225dc0 T dal_gpio_destroy_ddc +ffffffff82225e90 T dal_ddc_close +ffffffff82225ee0 T dal_ddc_open +ffffffff82226040 T dal_ddc_change_mode +ffffffff822260e0 T dal_ddc_get_line +ffffffff82226100 T dal_ddc_set_config +ffffffff82227000 T dal_hw_ddc_init +ffffffff82227100 T dal_hw_ddc_get_pin +ffffffff82227110 t dal_hw_ddc_destroy +ffffffff82227170 t set_config +ffffffff82228000 T dal_hw_factory_init +ffffffff82229000 T dal_hw_generic_init +ffffffff82229100 T dal_hw_generic_get_pin +ffffffff82229110 t dal_hw_generic_destroy +ffffffff82229170 t set_config +ffffffff8222a000 T dal_hw_gpio_open +ffffffff8222a0b0 T dal_hw_gpio_config_mode +ffffffff8222a1a0 T dal_hw_gpio_get_value +ffffffff8222a200 T dal_hw_gpio_set_value +ffffffff8222a290 T dal_hw_gpio_change_mode +ffffffff8222a2a0 T dal_hw_gpio_close +ffffffff8222a350 T dal_hw_gpio_construct +ffffffff8222a3b0 T dal_hw_gpio_destruct +ffffffff8222b000 T dal_hw_hpd_init +ffffffff8222b100 T dal_hw_hpd_get_pin +ffffffff8222b110 t dal_hw_hpd_destroy +ffffffff8222b170 t get_value +ffffffff8222b210 t set_config +ffffffff8222c000 T dal_hw_translate_init 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vmx_enter_guest -ffffffff8254a1fb t skip_init -ffffffff8254a2c8 t no_l1df_msr -ffffffff8254a2cb t l1df_tlb_loop -ffffffff8254a2e4 t l1df_tlb_done -ffffffff8254a2ec t l1df_load_cache -ffffffff8254a303 t done_flush -ffffffff8254a396 t do_resume -ffffffff8254a41b t fail_launch_or_resume -ffffffff8254a45d t fail_launch_unknown -ffffffff8254a46a t fail_launch_invalid_vmcs -ffffffff8254a477 t fail_launch_valid_vmcs -ffffffff8254a494 t vmx_exit_handler_asm -ffffffff8254a559 t restore_host -ffffffff8254a5f0 T svm_enter_guest -ffffffff8254a780 t restore_host_svm -ffffffff8254b000 T sdmmc_match -ffffffff8254b050 T sdmmc_attach -ffffffff8254b390 T sdmmc_detach -ffffffff8254b440 T sdmmc_activate -ffffffff8254b510 T sdmmc_discover_task -ffffffff8254b5d0 T sdmmc_create_thread -ffffffff8254b640 T sdmmc_holds_root_device -ffffffff8254b6a0 T sdmmc_task_thread -ffffffff8254b890 T sdmmc_needs_discover -ffffffff8254b940 T sdmmc_del_task -ffffffff8254b9f0 T sdmmc_card_detach -ffffffff8254bad0 T sdmmc_add_task -ffffffff8254bb50 T sdmmc_card_attach -ffffffff8254bc60 T sdmmc_enable -ffffffff8254bdb0 T sdmmc_scan -ffffffff8254be40 T sdmmc_init -ffffffff8254bf40 T sdmmc_disable -ffffffff8254c0a0 T sdmmc_function_free -ffffffff8254c0c0 T sdmmc_delay -ffffffff8254c110 T sdmmc_select_card -ffffffff8254c290 T sdmmc_set_bus_power -ffffffff8254c450 T sdmmc_function_alloc -ffffffff8254c4e0 T sdmmc_app_command -ffffffff8254c670 T sdmmc_mmc_command -ffffffff8254c6f0 T sdmmc_go_idle_state -ffffffff8254c810 T sdmmc_send_if_cond -ffffffff8254c960 T sdmmc_set_relative_addr -ffffffff8254d000 T sdmmc_cisptr -ffffffff8254d0a0 T sdmmc_read_cis -ffffffff8254d3b0 T sdmmc_print_cis -ffffffff8254d520 T sdmmc_check_cis_quirks -ffffffff8254e000 T sdmmc_io_enable -ffffffff8254e2a0 T sdmmc_io_reset -ffffffff8254e3d0 T sdmmc_io_send_op_cond -ffffffff8254e540 T sdmmc_io_scan -ffffffff8254e690 T sdmmc_io_init -ffffffff8254e7c0 T sdmmc_io_set_highspeed -ffffffff8254ea70 T sdmmc_io_set_bus_width -ffffffff8254ed00 T sdmmc_io_function_ready -ffffffff8254ee80 T sdmmc_io_read_1 -ffffffff8254efd0 T sdmmc_io_function_enable -ffffffff8254f3a0 T sdmmc_io_write_1 -ffffffff8254f520 T sdmmc_io_function_disable -ffffffff8254f7a0 T sdmmc_io_attach -ffffffff8254f890 T sdmmc_print -ffffffff8254fae0 T sdmmc_submatch -ffffffff8254fb60 T sdmmc_io_detach -ffffffff8254fc10 T sdmmc_io_rw_direct -ffffffff8254fdb0 T sdmmc_io_rw_extended_subr -ffffffff8254ff50 T sdmmc_io_rw_extended -ffffffff82550340 T sdmmc_io_read_2 -ffffffff825504a0 T sdmmc_io_write_2 -ffffffff82550600 T sdmmc_io_read_4 -ffffffff82550760 T sdmmc_io_write_4 -ffffffff825508c0 T sdmmc_io_read_multi_1 -ffffffff825509b0 T sdmmc_io_write_multi_1 -ffffffff82550aa0 T sdmmc_io_read_region_1 -ffffffff82550b90 T sdmmc_io_write_region_1 -ffffffff82550c80 T sdmmc_io_xchg -ffffffff82550e10 T sdmmc_intr_enable -ffffffff82551080 T sdmmc_intr_disable -ffffffff825512f0 T sdmmc_intr_establish -ffffffff825513f0 T sdmmc_intr_disestablish -ffffffff825514e0 T sdmmc_card_intr -ffffffff82551530 T sdmmc_intr_task -ffffffff825515c0 T sdmmc_io_set_blocklen -ffffffff82552000 T sdmmc_mem_enable -ffffffff825524e0 T sdmmc_mem_send_op_cond -ffffffff82552690 T sdmmc_mem_signal_voltage -ffffffff82552750 T sdmmc_mem_scan -ffffffff82552a60 T sdmmc_decode_csd -ffffffff82552e70 T sdmmc_decode_cid -ffffffff825532b0 T sdmmc_mem_send_scr -ffffffff825533f0 T sdmmc_mem_decode_scr -ffffffff82553470 T sdmmc_mem_send_cxd_data -ffffffff825535e0 T sdmmc_mem_set_bus_width -ffffffff82553700 T sdmmc_mem_sd_switch -ffffffff825539b0 T sdmmc_be512_to_bitfield512 -ffffffff82553a60 T sdmmc_mem_mmc_switch -ffffffff82553b50 T sdmmc_mem_init -ffffffff82553ca0 T sdmmc_mem_set_blocklen -ffffffff82553da0 T sdmmc_mem_sd_init -ffffffff82554350 T sdmmc_mem_mmc_init -ffffffff82554c70 T sdmmc_mem_select_transfer_mode -ffffffff82554cf0 T sdmmc_mem_execute_tuning -ffffffff82554d80 T sdmmc_mem_read_block_subr -ffffffff825550e0 T sdmmc_mem_single_read_block -ffffffff825551b0 T sdmmc_mem_read_block -ffffffff82555370 T sdmmc_mem_write_block_subr -ffffffff825556c0 T sdmmc_mem_single_write_block -ffffffff82555790 T sdmmc_mem_write_block -ffffffff82555950 T sdmmc_mem_hibernate_write -ffffffff82556000 T sdmmc_scsi_cmd -ffffffff825561f0 T sdmmc_minphys -ffffffff82556270 T sdmmc_scsi_attach -ffffffff82556460 T sdmmc_alloc_ccbs -ffffffff825565a0 T sdmmc_free_ccbs -ffffffff82556600 T sdmmc_scsi_detach -ffffffff82556760 T sdmmc_stimeout -ffffffff825567e0 T sdmmc_ccb_alloc -ffffffff82556890 T sdmmc_ccb_free -ffffffff82556970 T sdmmc_inquiry -ffffffff82556be0 T sdmmc_start_xs -ffffffff82556cd0 T sdmmc_complete_xs -ffffffff82556da0 T sdmmc_done_xs -ffffffff82556df0 T sdmmc_scsi_hibernate_io -ffffffff82557000 T bwfm_sdio_preinit -ffffffff825574f0 T bwfm_sdio_txcheck -ffffffff82557530 T bwfm_sdio_txdata -ffffffff825575a0 T bwfm_sdio_txctl -ffffffff825576f0 T bwfm_sdio_buscore_read -ffffffff82557700 T bwfm_sdio_buscore_write -ffffffff82557720 T bwfm_sdio_buscore_prepare -ffffffff82557860 T bwfm_sdio_buscore_activate -ffffffff825578e0 T bwfm_sdio_match -ffffffff825579b0 T bwfm_sdio_attach -ffffffff82557c70 T bwfm_sdio_detach -ffffffff82557cd0 T bwfm_sdio_task -ffffffff82557e30 T bwfm_sdio_write_1 -ffffffff82557e60 T bwfm_sdio_read_1 -ffffffff82557e90 T bwfm_sdio_write_4 -ffffffff82557f40 T bwfm_sdio_read_4 -ffffffff82557ff0 T bwfm_sdio_load_microcode -ffffffff82558250 T bwfm_sdio_clkctl -ffffffff82558380 T bwfm_sdio_dev_write -ffffffff825583d0 T bwfm_sdio_intr -ffffffff82558410 T bwfm_sdio_ram_read_write -ffffffff82558640 T bwfm_sdio_htclk -ffffffff825588a0 T bwfm_sdio_readshared -ffffffff82558970 T bwfm_sdio_dev_read -ffffffff825589b0 T bwfm_sdio_rx_frames -ffffffff82558d40 T bwfm_sdio_tx_frames -ffffffff82558e20 T bwfm_sdio_backplane -ffffffff82558ed0 T bwfm_sdio_buf_read -ffffffff82558fb0 T bwfm_sdio_buf_write -ffffffff82559060 T bwfm_sdio_frame_read_write -ffffffff825591e0 T bwfm_sdio_newbuf -ffffffff82559260 T bwfm_sdio_tx_ok -ffffffff825592b0 T bwfm_sdio_tx_ctrlframe -ffffffff825593b0 T bwfm_sdio_tx_dataframe -ffffffff82559500 T bwfm_sdio_rx_glom -ffffffff8255a000 T onewire_match -ffffffff8255a050 T onewire_attach -ffffffff8255a0f0 T onewire_detach -ffffffff8255a160 T onewire_activate -ffffffff8255a180 T onewire_scan -ffffffff8255a390 T onewire_createthread -ffffffff8255a400 T onewire_print -ffffffff8255a4d0 T onewirebus_print -ffffffff8255a520 T onewire_lock -ffffffff8255a540 T onewire_unlock -ffffffff8255a560 T onewire_reset -ffffffff8255a580 T onewire_bit -ffffffff8255a5a0 T onewire_read_byte -ffffffff8255a6e0 T onewire_write_byte -ffffffff8255a7c0 T onewire_read_block -ffffffff8255a860 T onewire_write_block -ffffffff8255a900 T onewire_triplet -ffffffff8255a9e0 T onewire_matchrom -ffffffff8255ab30 T onewire_search -ffffffff8255aec0 T onewire_thread -ffffffff8255b000 T onewire_crc -ffffffff8255b0e0 T onewire_crc16 -ffffffff8255b1c0 T onewire_famname -ffffffff8255b200 T onewire_matchbyfam -ffffffff8255c000 T owid_match -ffffffff8255c030 T owid_attach -ffffffff8255c100 T owid_detach -ffffffff8255c140 T owid_activate -ffffffff8255d000 T owsbm_match -ffffffff8255d030 T owsbm_attach -ffffffff8255d1d0 T owsbm_detach -ffffffff8255d240 T owsbm_activate -ffffffff8255d270 T owsbm_update -ffffffff8255e000 T owtemp_match -ffffffff8255e030 T owtemp_attach -ffffffff8255e130 T owtemp_detach -ffffffff8255e1a0 T owtemp_activate -ffffffff8255e1d0 T owtemp_update -ffffffff8255f000 T owctr_match -ffffffff8255f030 T owctr_attach -ffffffff8255f180 T owctr_detach -ffffffff8255f1f0 T owctr_activate -ffffffff8255f220 T owctr_update -ffffffff8255f250 T owctr_update_counter -ffffffff82560000 A __text_page_start -ffffffff82560000 T Xsyscall_meltdown -ffffffff8256000c T Xsyscall -ffffffff8256026e t Xsyscall_trampback -ffffffff82560280 T intr_user_exit -ffffffff825602c2 t intr_user_exit_post_ast -ffffffff825603ee t Xiretq_trampback -ffffffff825603fa T doreti_iret -ffffffff82561000 T alltraps -ffffffff82561138 T recall_trap -ffffffff82561150 T alltraps_kern -ffffffff82561153 T alltraps_kern_meltdown -ffffffff82562000 ? Xsyscall32 -ffffffff82562000 A __kutext_start -ffffffff82562000 A __text_page_end -ffffffff82563000 ? Xtrap00 -ffffffff82563010 ? Xtrap01 -ffffffff82563020 ? Xtrap02 -ffffffff82563028 c calltrap_specstk -ffffffff825630f0 ? calltrap_specstk_tramp -ffffffff82563110 ? Xtrap03 -ffffffff82563120 ? Xtrap04 -ffffffff82563130 ? Xtrap05 -ffffffff82563140 ? Xtrap06 -ffffffff82563150 ? Xtrap07 -ffffffff82563160 ? Xtrap08 -ffffffff82563170 ? Xtrap09 -ffffffff82563180 ? Xtrap0a -ffffffff82563190 ? Xtrap0b -ffffffff825631a0 ? Xtrap0c -ffffffff825631b0 ? Xtrap0d -ffffffff82563240 ? Xtrap0e -ffffffff82563250 ? Xintrspurious -ffffffff82563250 ? Xtrap0f -ffffffff82563260 ? Xtrap10 -ffffffff82563270 ? Xtrap11 -ffffffff82563280 ? Xtrap12 -ffffffff82563290 ? Xtrap13 -ffffffff825632a0 ? Xtrap14 -ffffffff825632b0 ? Xtrap15 -ffffffff825632c0 ? Xtrap16 -ffffffff825632c0 ? Xtrap17 -ffffffff825632c0 ? Xtrap18 -ffffffff825632c0 ? Xtrap19 -ffffffff825632c0 ? Xtrap1a -ffffffff825632c0 ? Xtrap1b -ffffffff825632c0 ? Xtrap1c -ffffffff825632c0 ? Xtrap1d -ffffffff825632c0 ? Xtrap1e -ffffffff825632c0 ? Xtrap1f -ffffffff825632d0 ? x2apic_eoi -ffffffff825632f0 ? Xintr_lapic_ipi -ffffffff82563330 ? Xipi_invltlb -ffffffff82563360 ? Xipi_invlpg -ffffffff82563390 ? Xipi_invlrange -ffffffff825633d0 ? Xipi_invltlb_pcid -ffffffff82563410 ? Xipi_invlpg_pcid -ffffffff82563460 ? Xipi_invlrange_pcid -ffffffff825634d0 ? Xintr_lapic_ltimer -ffffffff82563510 ? Xintr_xen_upcall -ffffffff82563550 ? Xintr_hyperv_upcall -ffffffff82563590 ? Xintr_legacy0 -ffffffff825635d0 ? Xintr_legacy1 -ffffffff82563610 ? Xintr_legacy2 -ffffffff82563650 ? Xintr_legacy3 -ffffffff82563690 ? Xintr_legacy4 -ffffffff825636d0 ? Xintr_legacy5 -ffffffff82563710 ? Xintr_legacy6 -ffffffff82563750 ? Xintr_legacy7 -ffffffff82563790 ? Xintr_legacy8 -ffffffff825637d0 ? Xintr_legacy9 -ffffffff82563810 ? Xintr_legacy10 -ffffffff82563850 ? Xintr_legacy11 -ffffffff82563890 ? Xintr_legacy12 -ffffffff825638d0 ? Xintr_legacy13 -ffffffff82563910 ? Xintr_legacy14 -ffffffff82563950 ? Xintr_legacy15 -ffffffff82563990 ? Xintr_ioapic_edge0 -ffffffff825639d0 ? Xintr_ioapic_edge1 -ffffffff82563a10 ? Xintr_ioapic_edge2 -ffffffff82563a50 ? Xintr_ioapic_edge3 -ffffffff82563a90 ? Xintr_ioapic_edge4 -ffffffff82563ad0 ? Xintr_ioapic_edge5 -ffffffff82563b10 ? Xintr_ioapic_edge6 -ffffffff82563b50 ? Xintr_ioapic_edge7 -ffffffff82563b90 ? Xintr_ioapic_edge8 -ffffffff82563bd0 ? Xintr_ioapic_edge9 -ffffffff82563c10 ? Xintr_ioapic_edge10 -ffffffff82563c50 ? Xintr_ioapic_edge11 -ffffffff82563c90 ? Xintr_ioapic_edge12 -ffffffff82563cd0 ? Xintr_ioapic_edge13 -ffffffff82563d10 ? Xintr_ioapic_edge14 -ffffffff82563d50 ? Xintr_ioapic_edge15 -ffffffff82563d90 ? Xintr_ioapic_edge16 -ffffffff82563dd0 ? Xintr_ioapic_edge17 -ffffffff82563e10 ? Xintr_ioapic_edge18 -ffffffff82563e50 ? Xintr_ioapic_edge19 -ffffffff82563e90 ? Xintr_ioapic_edge20 -ffffffff82563ed0 ? Xintr_ioapic_edge21 -ffffffff82563f10 ? Xintr_ioapic_edge22 -ffffffff82563f50 ? Xintr_ioapic_edge23 -ffffffff82563f90 ? Xintr_ioapic_edge24 -ffffffff82563fd0 ? Xintr_ioapic_edge25 -ffffffff82564010 ? Xintr_ioapic_edge26 -ffffffff82564050 ? Xintr_ioapic_edge27 -ffffffff82564090 ? Xintr_ioapic_edge28 -ffffffff825640d0 ? Xintr_ioapic_edge29 -ffffffff82564110 ? Xintr_ioapic_edge30 -ffffffff82564150 ? Xintr_ioapic_edge31 -ffffffff82564190 ? Xintr_ioapic_edge32 -ffffffff825641d0 ? Xintr_ioapic_edge33 -ffffffff82564210 ? Xintr_ioapic_edge34 -ffffffff82564250 ? Xintr_ioapic_edge35 -ffffffff82564290 ? Xintr_ioapic_edge36 -ffffffff825642d0 ? Xintr_ioapic_edge37 -ffffffff82564310 ? Xintr_ioapic_edge38 -ffffffff82564350 ? Xintr_ioapic_edge39 -ffffffff82564390 ? Xintr_ioapic_edge40 -ffffffff825643d0 ? Xintr_ioapic_edge41 -ffffffff82564410 ? Xintr_ioapic_edge42 -ffffffff82564450 ? Xintr_ioapic_edge43 -ffffffff82564490 ? Xintr_ioapic_edge44 -ffffffff825644d0 ? Xintr_ioapic_edge45 -ffffffff82564510 ? Xintr_ioapic_edge46 -ffffffff82564550 ? Xintr_ioapic_edge47 -ffffffff82564590 ? Xintr_ioapic_edge48 -ffffffff825645d0 ? Xintr_ioapic_edge49 -ffffffff82564610 ? Xintr_ioapic_edge50 -ffffffff82564650 ? Xintr_ioapic_edge51 -ffffffff82564690 ? Xintr_ioapic_edge52 -ffffffff825646d0 ? Xintr_ioapic_edge53 -ffffffff82564710 ? Xintr_ioapic_edge54 -ffffffff82564750 ? Xintr_ioapic_edge55 -ffffffff82564790 ? Xintr_ioapic_edge56 -ffffffff825647d0 ? Xintr_ioapic_edge57 -ffffffff82564810 ? Xintr_ioapic_edge58 -ffffffff82564850 ? Xintr_ioapic_edge59 -ffffffff82564890 ? Xintr_ioapic_edge60 -ffffffff825648d0 ? Xintr_ioapic_edge61 -ffffffff82564910 ? Xintr_ioapic_edge62 -ffffffff82564950 ? Xintr_ioapic_edge63 -ffffffff82564990 ? Xintr_ioapic_level0 -ffffffff825649d0 ? Xintr_ioapic_level1 -ffffffff82564a10 ? Xintr_ioapic_level2 -ffffffff82564a50 ? Xintr_ioapic_level3 -ffffffff82564a90 ? Xintr_ioapic_level4 -ffffffff82564ad0 ? Xintr_ioapic_level5 -ffffffff82564b10 ? Xintr_ioapic_level6 -ffffffff82564b50 ? Xintr_ioapic_level7 -ffffffff82564b90 ? Xintr_ioapic_level8 -ffffffff82564bd0 ? Xintr_ioapic_level9 -ffffffff82564c10 ? Xintr_ioapic_level10 -ffffffff82564c50 ? Xintr_ioapic_level11 -ffffffff82564c90 ? Xintr_ioapic_level12 -ffffffff82564cd0 ? Xintr_ioapic_level13 -ffffffff82564d10 ? Xintr_ioapic_level14 -ffffffff82564d50 ? Xintr_ioapic_level15 -ffffffff82564d90 ? Xintr_ioapic_level16 -ffffffff82564dd0 ? Xintr_ioapic_level17 -ffffffff82564e10 ? Xintr_ioapic_level18 -ffffffff82564e50 ? Xintr_ioapic_level19 -ffffffff82564e90 ? Xintr_ioapic_level20 -ffffffff82564ed0 ? Xintr_ioapic_level21 -ffffffff82564f10 ? Xintr_ioapic_level22 -ffffffff82564f50 ? Xintr_ioapic_level23 -ffffffff82564f90 ? Xintr_ioapic_level24 -ffffffff82564fd0 ? Xintr_ioapic_level25 -ffffffff82565010 ? Xintr_ioapic_level26 -ffffffff82565050 ? Xintr_ioapic_level27 -ffffffff82565090 ? Xintr_ioapic_level28 -ffffffff825650d0 ? Xintr_ioapic_level29 -ffffffff82565110 ? Xintr_ioapic_level30 -ffffffff82565150 ? Xintr_ioapic_level31 -ffffffff82565190 ? Xintr_ioapic_level32 -ffffffff825651d0 ? Xintr_ioapic_level33 -ffffffff82565210 ? Xintr_ioapic_level34 -ffffffff82565250 ? Xintr_ioapic_level35 -ffffffff82565290 ? Xintr_ioapic_level36 -ffffffff825652d0 ? Xintr_ioapic_level37 -ffffffff82565310 ? Xintr_ioapic_level38 -ffffffff82565350 ? Xintr_ioapic_level39 -ffffffff82565390 ? Xintr_ioapic_level40 -ffffffff825653d0 ? Xintr_ioapic_level41 -ffffffff82565410 ? Xintr_ioapic_level42 -ffffffff82565450 ? Xintr_ioapic_level43 -ffffffff82565490 ? Xintr_ioapic_level44 -ffffffff825654d0 ? Xintr_ioapic_level45 -ffffffff82565510 ? Xintr_ioapic_level46 -ffffffff82565550 ? Xintr_ioapic_level47 -ffffffff82565590 ? Xintr_ioapic_level48 -ffffffff825655d0 ? Xintr_ioapic_level49 -ffffffff82565610 ? Xintr_ioapic_level50 -ffffffff82565650 ? Xintr_ioapic_level51 -ffffffff82565690 ? Xintr_ioapic_level52 -ffffffff825656d0 ? Xintr_ioapic_level53 -ffffffff82565710 ? Xintr_ioapic_level54 -ffffffff82565750 ? Xintr_ioapic_level55 -ffffffff82565790 ? Xintr_ioapic_level56 -ffffffff825657d0 ? Xintr_ioapic_level57 -ffffffff82565810 ? Xintr_ioapic_level58 -ffffffff82565850 ? Xintr_ioapic_level59 -ffffffff82565890 ? Xintr_ioapic_level60 -ffffffff825658d0 ? Xintr_ioapic_level61 -ffffffff82565910 ? Xintr_ioapic_level62 -ffffffff82565950 ? Xintr_ioapic_level63 -ffffffff82566000 ? codepatch_fill_nop -ffffffff82566000 A __cptext_start -ffffffff82566000 A __kutext_end -ffffffff825660b0 ? codepatch_maprw -ffffffff82566190 ? codepatch_unmaprw -ffffffff82566200 ? codepatch_nop -ffffffff82566360 ? codepatch_replace -ffffffff82566510 ? codepatch_call -ffffffff82566530 ? codepatch_jmp -ffffffff82567000 A __cptext_end -ffffffff82567000 A __rodata_start -ffffffff82567000 C _etext -ffffffff82567000 C etext -ffffffff82568000 r seeprom_read -ffffffff82568004 r icl_mg_pll_find_divisors.div1_vals -ffffffff82568028 r gen9bc_tgp_ddc_pin_map -ffffffff82568038 r athn_ac2qid -ffffffff82568038 r athn_ac2qid -ffffffff82568038 r athn_ac2qid -ffffffff82568044 r rtwn_get_rssi.cckoff -ffffffff8256806c r rsu_ac2qid -ffffffff8256807c r pckbc_portcmd -ffffffff82568080 r tht_fifo_write_pad.pad -ffffffff82568088 r rsu_get_rssi.cckoff -ffffffff8256809c r adlp_n_revids -ffffffff825680ec r apple_iso_trans -ffffffff825680f0 r dg2_g12_revid_step_tbl -ffffffff825680f8 r wihap_check_tx.txratetable -ffffffff825680fc r dmamode -ffffffff82568124 r gen9_edram_size_mb.sets -ffffffff82569000 r isomappings -ffffffff82569080 r unimappings -ffffffff82569230 r replacements -ffffffff8256cc00 r cmd0646_9_tim_udma -ffffffff825c0ed8 r pp_r600_decoded_lanes -ffffffff825dc38f r cmd680_setup_channel.udma_tbl -ffffffff825e409e r apollo_udma33_tim -ffffffff825ea195 r substchar -ffffffff825ec2ca r apollo_udma100_tim -ffffffff82613e13 r apollo_udma66_tim -ffffffff8261b36c r apollo_pio_rec -ffffffff8262a8f0 r cy_pio_rec -ffffffff8265a223 r apollo_udma133_tim -ffffffff82666f20 R drm_ca -ffffffff82666f48 R drm_filtops -ffffffff82666f78 R drmread_filtops -ffffffff82667000 r vga_emulops -ffffffff82667048 R vga_stdscreen -ffffffff82667078 R vga_stdscreen_mono -ffffffff826670a8 R vga_stdscreen_bf -ffffffff826670d8 R vga_40lscreen -ffffffff82667108 R vga_40lscreen_mono -ffffffff82667138 R vga_40lscreen_bf -ffffffff82667168 R vga_50lscreen -ffffffff82667198 R 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T mod_vmid_get_for_ptb +ffffffff8225d230 T mod_vmid_reset +ffffffff8225d2f0 T mod_vmid_create +ffffffff8225d430 T mod_vmid_destroy +ffffffff8225e000 T amdgpu_dpm_get_sclk +ffffffff8225e090 T amdgpu_dpm_get_mclk +ffffffff8225e120 T amdgpu_dpm_set_powergating_by_smu +ffffffff8225e200 T amdgpu_dpm_set_gfx_power_up_by_imu +ffffffff8225e310 T amdgpu_dpm_baco_enter +ffffffff8225e3a0 T amdgpu_dpm_baco_exit +ffffffff8225e430 T amdgpu_dpm_set_mp1_state +ffffffff8225e4d0 T amdgpu_dpm_is_baco_supported +ffffffff8225e580 T amdgpu_dpm_mode2_reset +ffffffff8225e610 T amdgpu_dpm_baco_reset +ffffffff8225e6c0 T amdgpu_dpm_is_mode1_reset_supported +ffffffff8225e730 T amdgpu_dpm_mode1_reset +ffffffff8225e7b0 T amdgpu_dpm_switch_power_profile +ffffffff8225e860 T amdgpu_dpm_set_xgmi_pstate +ffffffff8225e900 T amdgpu_dpm_set_df_cstate +ffffffff8225e9a0 T amdgpu_dpm_allow_xgmi_power_down +ffffffff8225ea20 T amdgpu_dpm_enable_mgpu_fan_boost +ffffffff8225eab0 T amdgpu_dpm_set_clockgating_by_smu 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+ffffffff8225fa00 T amdgpu_dpm_gfx_state_change +ffffffff8225fa70 T amdgpu_dpm_get_ecc_info +ffffffff8225faf0 T amdgpu_dpm_get_vce_clock_state +ffffffff8225fb80 T amdgpu_dpm_get_current_power_state +ffffffff8225fbf0 T amdgpu_dpm_set_power_state +ffffffff8225fd50 T amdgpu_dpm_dispatch_task +ffffffff8225fdf0 T amdgpu_dpm_get_performance_level +ffffffff8225fe80 T amdgpu_dpm_force_performance_level +ffffffff82260060 T amdgpu_dpm_get_pp_num_states +ffffffff822600f0 T amdgpu_dpm_get_pp_table +ffffffff82260180 T amdgpu_dpm_set_fine_grain_clk_vol +ffffffff82260220 T amdgpu_dpm_odn_edit_dpm_table +ffffffff822602c0 T amdgpu_dpm_print_clock_levels +ffffffff82260350 T amdgpu_dpm_emit_clock_levels +ffffffff822603f0 T amdgpu_dpm_set_ppfeature_status +ffffffff82260480 T amdgpu_dpm_get_ppfeature_status +ffffffff82260510 T amdgpu_dpm_force_clock_level +ffffffff822605a0 T amdgpu_dpm_get_sclk_od +ffffffff82260620 T amdgpu_dpm_set_sclk_od +ffffffff822607a0 T amdgpu_dpm_get_mclk_od +ffffffff82260820 T amdgpu_dpm_set_mclk_od +ffffffff822609a0 T amdgpu_dpm_get_power_profile_mode +ffffffff82260a30 T amdgpu_dpm_set_power_profile_mode +ffffffff82260ad0 T amdgpu_dpm_get_gpu_metrics +ffffffff82260b60 T amdgpu_dpm_get_fan_control_mode +ffffffff82260bf0 T amdgpu_dpm_set_fan_speed_pwm +ffffffff82260c80 T amdgpu_dpm_get_fan_speed_pwm +ffffffff82260d10 T amdgpu_dpm_get_fan_speed_rpm +ffffffff82260da0 T amdgpu_dpm_set_fan_speed_rpm +ffffffff82260e30 T amdgpu_dpm_set_fan_control_mode +ffffffff82260ec0 T amdgpu_dpm_get_power_limit +ffffffff82260f70 T amdgpu_dpm_set_power_limit +ffffffff82261000 T amdgpu_dpm_is_cclk_dpm_supported +ffffffff82261070 T amdgpu_dpm_debugfs_print_current_performance_level +ffffffff82261100 T amdgpu_dpm_get_smu_prv_buf_details +ffffffff822611a0 T amdgpu_dpm_is_overdrive_supported +ffffffff82261210 T amdgpu_dpm_set_pp_table +ffffffff822612b0 T amdgpu_dpm_get_num_cpu_cores +ffffffff82261300 T amdgpu_dpm_stb_debug_fs_init +ffffffff82261350 T amdgpu_dpm_display_configuration_change +ffffffff822613e0 T amdgpu_dpm_get_clock_by_type +ffffffff82261480 T amdgpu_dpm_get_display_mode_validation_clks +ffffffff82261510 T amdgpu_dpm_get_clock_by_type_with_latency +ffffffff822615b0 T amdgpu_dpm_get_clock_by_type_with_voltage +ffffffff82261650 T amdgpu_dpm_set_watermarks_for_clocks_ranges +ffffffff822616e0 T amdgpu_dpm_display_clock_voltage_request +ffffffff82261770 T amdgpu_dpm_get_current_clocks +ffffffff82261800 T amdgpu_dpm_notify_smu_enable_pwe +ffffffff82261880 T amdgpu_dpm_set_active_display_count +ffffffff82261910 T amdgpu_dpm_set_min_deep_sleep_dcefclk +ffffffff822619a0 T amdgpu_dpm_set_hard_min_dcefclk_by_freq +ffffffff82261a40 T amdgpu_dpm_set_hard_min_fclk_by_freq +ffffffff82261ae0 T amdgpu_dpm_display_disable_memory_clock_switch +ffffffff82261b70 T amdgpu_dpm_get_max_sustainable_clocks_by_dc +ffffffff82261c00 T amdgpu_dpm_get_uclk_dpm_states +ffffffff82261ca0 T amdgpu_dpm_get_dpm_clock_table +ffffffff82262000 T amdgpu_dpm_get_active_displays +ffffffff822620a0 T amdgpu_dpm_get_vblank_time +ffffffff82262150 T amdgpu_dpm_get_vrefresh +ffffffff82263000 T amdgpu_pm_sysfs_init +ffffffff82263030 T amdgpu_pm_sysfs_fini +ffffffff82263060 T amdgpu_debugfs_pm_init +ffffffff82264000 T amdgpu_dpm_print_class_info +ffffffff822642b0 T amdgpu_dpm_print_cap_info +ffffffff82264340 T amdgpu_dpm_print_ps_status +ffffffff822643d0 T amdgpu_pm_print_power_states +ffffffff82264490 T amdgpu_get_platform_caps +ffffffff82264530 T amdgpu_parse_extended_power_table +ffffffff82265540 T amdgpu_free_extended_power_table +ffffffff82265650 T amdgpu_add_thermal_controller +ffffffff82265a80 T amdgpu_get_vce_clock_state +ffffffff82265ac0 T amdgpu_legacy_dpm_compute_clocks +ffffffff82265f30 T amdgpu_dpm_thermal_work_handler +ffffffff82266000 t pp_early_init +ffffffff82266100 t pp_late_init +ffffffff82266220 t pp_sw_init +ffffffff822662b0 t pp_sw_fini +ffffffff82266340 t pp_hw_init +ffffffff822663a0 t pp_hw_fini +ffffffff82266410 t pp_late_fini +ffffffff82266470 t pp_suspend +ffffffff822664c0 t pp_resume +ffffffff822664e0 t pp_is_idle +ffffffff82266510 t pp_wait_for_idle +ffffffff82266540 t pp_sw_reset +ffffffff82266570 t pp_set_clockgating_state +ffffffff822665a0 t pp_set_powergating_state +ffffffff822665d0 t pp_dpm_set_fan_control_mode +ffffffff82266640 t pp_dpm_get_fan_control_mode +ffffffff822666b0 t pp_dpm_set_fan_speed_pwm +ffffffff82266710 t pp_dpm_get_fan_speed_pwm +ffffffff82266770 t pp_dpm_force_clock_level +ffffffff822667d0 t pp_dpm_print_clock_levels +ffffffff82266830 t pp_dpm_emit_clock_levels +ffffffff82266890 t pp_dpm_force_performance_level +ffffffff82266930 t pp_dpm_get_sclk_od +ffffffff82266990 t pp_dpm_set_sclk_od +ffffffff822669f0 t pp_dpm_get_mclk_od +ffffffff82266a50 t pp_dpm_set_mclk_od +ffffffff82266ab0 t pp_dpm_read_sensor +ffffffff82266b70 t pp_dpm_get_performance_level +ffffffff82266bb0 t pp_dpm_get_current_power_state +ffffffff82266c30 t pp_dpm_get_fan_speed_rpm +ffffffff82266c90 t pp_dpm_set_fan_speed_rpm +ffffffff82266cf0 t pp_dpm_get_pp_num_states +ffffffff82266e30 t pp_dpm_get_pp_table +ffffffff82266e80 t pp_dpm_set_pp_table +ffffffff82266fb0 t pp_dpm_switch_power_profile +ffffffff822670f0 t pp_dpm_get_vce_clock_state +ffffffff82267140 t pp_dpm_dispatch_tasks +ffffffff82267180 t pp_dpm_load_fw +ffffffff822671f0 t pp_dpm_fw_loading_complete +ffffffff82267220 t pp_set_powergating_by_smu +ffffffff822673a0 t pp_set_clockgating_by_smu +ffffffff82267410 t pp_set_power_limit +ffffffff822674d0 t pp_get_power_limit +ffffffff82267570 t pp_get_power_profile_mode +ffffffff822675d0 t pp_set_power_profile_mode +ffffffff82267630 t pp_set_fine_grain_clk_vol +ffffffff82267690 t pp_odn_edit_dpm_table +ffffffff822676f0 t pp_dpm_set_mp1_state +ffffffff82267750 t pp_smu_i2c_bus_access +ffffffff822677b0 t pp_gfx_state_change_set +ffffffff82267810 t pp_dpm_get_sclk +ffffffff82267860 t pp_dpm_get_mclk +ffffffff822678b0 t pp_display_configuration_change +ffffffff82267900 t pp_get_display_power_level +ffffffff82267940 t pp_get_current_clocks +ffffffff82267a60 t pp_get_clock_by_type +ffffffff82267ab0 t pp_get_clock_by_type_with_latency +ffffffff82267b00 t pp_get_clock_by_type_with_voltage +ffffffff82267b50 t pp_set_watermarks_for_clocks_ranges +ffffffff82267b90 t pp_display_clock_voltage_request +ffffffff82267bd0 t pp_get_display_mode_validation_clocks +ffffffff82267c30 t pp_notify_smu_enable_pwe +ffffffff82267c90 t pp_enable_mgpu_fan_boost +ffffffff82267cf0 t pp_set_active_display_count +ffffffff82267d30 t pp_set_hard_min_dcefclk_by_freq +ffffffff82267d90 t pp_set_hard_min_fclk_by_freq +ffffffff82267df0 t pp_set_min_deep_sleep_dcefclk +ffffffff82267e50 t pp_get_asic_baco_capability +ffffffff82267ec0 t pp_get_asic_baco_state +ffffffff82267f20 t pp_set_asic_baco_state +ffffffff82267f90 t pp_get_ppfeature_status +ffffffff82267ff0 t pp_set_ppfeature_status +ffffffff82268040 t pp_asic_reset_mode_2 +ffffffff822680a0 t pp_set_df_cstate +ffffffff82268100 t pp_set_xgmi_pstate +ffffffff82268160 t pp_get_gpu_metrics +ffffffff822681c0 t pp_get_prv_buffer_details +ffffffff82268240 t pp_pm_compute_clocks +ffffffff82268310 t pp_swctf_delayed_work_handler +ffffffff82268450 t __delayed_work_tick +ffffffff82268470 t orderly_poweroff +ffffffff82269000 T ci_baco_set_state +ffffffff8226a000 T baco_program_registers +ffffffff8226a0d0 t baco_cmd_handler +ffffffff8226a250 T soc15_baco_program_registers +ffffffff8226b000 T fiji_baco_set_state +ffffffff8226c000 T phm_setup_asic +ffffffff8226c050 T phm_power_down_asic +ffffffff8226c0a0 T phm_set_power_state +ffffffff8226c110 T phm_enable_dynamic_state_management +ffffffff8226c1c0 T phm_disable_dynamic_state_management +ffffffff8226c260 T phm_force_dpm_levels +ffffffff8226c2b0 T phm_apply_state_adjust_rules +ffffffff8226c300 T phm_apply_clock_adjust_rules +ffffffff8226c350 T phm_powerdown_uvd +ffffffff8226c3a0 T phm_disable_clock_power_gatings +ffffffff8226c3f0 T phm_pre_display_configuration_changed +ffffffff8226c450 T phm_display_configuration_changed +ffffffff8226c4b0 T phm_notify_smc_display_config_after_ps_adjustment +ffffffff8226c510 T phm_stop_thermal_controller +ffffffff8226c570 T phm_register_irq_handlers +ffffffff8226c5c0 T phm_start_thermal_controller +ffffffff8226c710 T phm_check_smc_update_required_for_display_configuration +ffffffff8226c770 T phm_check_states_equal +ffffffff8226c7c0 T phm_store_dal_configuration_data +ffffffff8226c910 T phm_get_dal_power_level +ffffffff8226c970 T phm_set_cpu_power_state +ffffffff8226c9c0 T phm_get_performance_level +ffffffff8226ca20 T phm_get_clock_info +ffffffff8226cba0 T phm_get_current_shallow_sleep_clocks +ffffffff8226cbf0 T phm_get_clock_by_type +ffffffff8226cc40 T phm_get_clock_by_type_with_latency +ffffffff8226cc90 T phm_get_clock_by_type_with_voltage +ffffffff8226cce0 T phm_set_watermarks_for_clocks_ranges +ffffffff8226cd30 T phm_display_clock_voltage_request +ffffffff8226cd80 T phm_get_max_high_clocks +ffffffff8226cdd0 T phm_disable_smc_firmware_ctf +ffffffff8226ce30 T phm_set_active_display_count +ffffffff8226d000 T hwmgr_early_init +ffffffff8226d470 T hwmgr_sw_init +ffffffff8226d4e0 T hwmgr_sw_fini +ffffffff8226d530 T hwmgr_hw_init +ffffffff8226d6f0 T hwmgr_hw_fini +ffffffff8226d7b0 T hwmgr_suspend +ffffffff8226d830 T hwmgr_resume +ffffffff8226d8d0 T hwmgr_handle_task +ffffffff8226e000 T polaris_baco_set_state +ffffffff8226f000 T pp_override_get_default_fuse_value +ffffffff82270000 T psm_init_power_state_table +ffffffff822702a0 T psm_fini_power_state_table +ffffffff82270360 T psm_set_boot_states +ffffffff82270420 T psm_set_performance_states +ffffffff822704e0 T psm_set_user_performance_state +ffffffff82270580 T psm_adjust_power_state_dynamic +ffffffff82271000 T atomctrl_initialize_mc_reg_table +ffffffff82271210 T atomctrl_initialize_mc_reg_table_v2_2 +ffffffff82271420 T atomctrl_set_engine_dram_timings_rv770 +ffffffff82271490 T atomctrl_get_memory_pll_dividers_si +ffffffff82271570 T atomctrl_get_memory_pll_dividers_vi +ffffffff822715f0 T atomctrl_get_memory_pll_dividers_ai +ffffffff822716a0 T atomctrl_get_engine_pll_dividers_kong +ffffffff82271720 T atomctrl_get_engine_pll_dividers_vi +ffffffff822717e0 T atomctrl_get_engine_pll_dividers_ai +ffffffff822718c0 T atomctrl_get_dfs_pll_dividers_vi +ffffffff82271980 T atomctrl_get_reference_clock +ffffffff822719e0 T atomctrl_is_voltage_controlled_by_gpio_v3 +ffffffff82271aa0 T atomctrl_get_voltage_table_v3 +ffffffff82271c00 T atomctrl_get_pp_assign_pin +ffffffff82271cf0 T atomctrl_calculate_voltage_evv_on_sclk +ffffffff82272070 T atomctrl_get_voltage_evv_on_sclk +ffffffff822720f0 T atomctrl_get_voltage_evv +ffffffff822721a0 T atomctrl_get_mpll_reference_clock +ffffffff82272210 T atomctrl_is_asic_internal_ss_supported +ffffffff82272260 T atomctrl_get_memory_clock_spread_spectrum +ffffffff82272360 T atomctrl_get_engine_clock_spread_spectrum +ffffffff82272460 T atomctrl_read_efuse +ffffffff82272510 T atomctrl_set_ac_timing_ai +ffffffff82272570 T atomctrl_get_voltage_evv_on_sclk_ai +ffffffff822725f0 T atomctrl_get_smc_sclk_range_table +ffffffff822726b0 T atomctrl_get_vddc_shared_railinfo +ffffffff82272720 T atomctrl_get_avfs_information +ffffffff822728a0 T atomctrl_get_svi2_info +ffffffff82272980 T atomctrl_get_leakage_id_from_efuse +ffffffff822729e0 T atomctrl_get_leakage_vddc_base_on_leakage +ffffffff82272b80 T atomctrl_get_voltage_range +ffffffff82272c40 T atomctrl_get_edc_hilo_leakage_offset_table +ffffffff82272cc0 T atomctrl_get_edc_leakage_table +ffffffff82273000 T pp_atomfwctrl_is_voltage_controlled_by_gpio_v4 +ffffffff822730d0 T pp_atomfwctrl_get_voltage_table_v4 +ffffffff82273290 T pp_atomfwctrl_get_pp_assign_pin +ffffffff82273370 T pp_atomfwctrl_enter_self_refresh +ffffffff822733a0 T pp_atomfwctrl_get_gpu_pll_dividers_vega10 +ffffffff82273450 T pp_atomfwctrl_get_avfs_information +ffffffff82273780 T pp_atomfwctrl_get_gpio_information +ffffffff82273820 T pp_atomfwctrl_get_clk_information_by_clkid +ffffffff822738a0 T pp_atomfwctrl_get_vbios_bootup_values +ffffffff82273c20 T pp_atomfwctrl_get_smc_dpm_information +ffffffff82274000 T encode_pcie_lane_width +ffffffff82274030 T decode_pcie_lane_width +ffffffff82275000 t pp_tables_v1_0_initialize +ffffffff82276430 t pp_tables_v1_0_uninitialize +ffffffff822765e0 T get_number_of_powerplay_table_entries_v1_0 +ffffffff82276690 T get_powerplay_table_entry_v1_0 +ffffffff82277000 T pp_tables_get_response_times +ffffffff822770d0 T pp_tables_get_num_of_entries +ffffffff82277190 T pp_tables_get_entry +ffffffff822774f0 t init_non_clock_fields +ffffffff82277670 t pp_tables_initialize +ffffffff82278ad0 t pp_tables_uninitialize +ffffffff82278cd0 t get_number_of_vce_state_table_entries +ffffffff82278dd0 t get_vce_state_table_entry +ffffffff82279000 T smu10_init_function_pointers +ffffffff82279040 t smu10_hwmgr_backend_init +ffffffff82279700 t smu10_hwmgr_backend_fini +ffffffff82279840 t smu10_setup_asic_task +ffffffff822798b0 t smu10_get_power_state_size +ffffffff822798e0 t smu10_apply_state_adjust_rules +ffffffff82279910 t smu10_dpm_force_dpm_level +ffffffff82279e90 t smu10_enable_dpm_tasks +ffffffff82279f50 t smu10_disable_dpm_tasks +ffffffff82279f80 t smu10_dpm_patch_boot_state +ffffffff82279fb0 t smu10_dpm_get_pp_table_entry +ffffffff8227a010 t smu10_dpm_get_num_of_pp_table_entries +ffffffff8227a060 t smu10_powergate_vcn +ffffffff8227a100 t smu10_dpm_get_mclk +ffffffff8227a160 t smu10_dpm_get_sclk +ffffffff8227a1b0 t smu10_set_power_state_tasks +ffffffff8227a220 t smu10_set_cpu_power_state +ffffffff8227a250 t smu10_store_cc6_data +ffffffff8227a2c0 t smu10_get_dal_power_level +ffffffff8227a2f0 t smu10_get_performance_level +ffffffff8227a380 t smu10_get_current_shallow_sleep_clocks +ffffffff8227a3e0 t smu10_get_clock_by_type_with_latency +ffffffff8227a530 t smu10_get_clock_by_type_with_voltage +ffffffff8227a640 t smu10_set_watermarks_for_clocks_ranges +ffffffff8227a710 t smu10_display_clock_voltage_request +ffffffff8227a7b0 t smu10_get_max_high_clocks +ffffffff8227a7e0 t smu10_power_off_asic +ffffffff8227a830 t smu10_force_clock_level +ffffffff8227a9f0 t smu10_print_clock_levels +ffffffff8227ad90 t smu10_gfx_off_control +ffffffff8227aea0 t smu10_read_sensor +ffffffff8227b020 t smu10_set_active_display_count +ffffffff8227b080 t smu10_set_min_deep_sleep_dcefclk +ffffffff8227b0e0 t smu10_get_power_profile_mode +ffffffff8227b120 t smu10_set_power_profile_mode +ffffffff8227b270 t smu10_set_fine_grain_clk_vol +ffffffff8227b480 t smu10_powergate_mmhub +ffffffff8227b4a0 t smu10_smus_notify_pwe +ffffffff8227b4c0 t smu10_powergate_sdma +ffffffff8227b4e0 t smu10_set_hard_min_dcefclk_by_freq +ffffffff8227b540 t smu10_set_hard_min_fclk_by_freq +ffffffff8227b5a0 t smu10_set_hard_min_gfxclk_by_freq +ffffffff8227b600 t smu10_set_soft_max_gfxclk_by_freq +ffffffff8227b660 t smu10_asic_reset +ffffffff8227b680 t smu10_gfx_state_change +ffffffff8227b6c0 t smu10_dpm_get_pp_table_entry_callback +ffffffff8227c000 T smu7_baco_get_capability +ffffffff8227c060 T smu7_baco_get_state +ffffffff8227c0b0 T smu7_baco_set_state +ffffffff8227d000 T smu7_powerdown_uvd +ffffffff8227d050 T smu7_disable_clock_power_gating +ffffffff8227d0e0 T smu7_powergate_uvd +ffffffff8227d1d0 T smu7_powergate_vce +ffffffff8227d2c0 T smu7_update_clock_gatings +ffffffff8227d670 T smu7_powergate_gfx +ffffffff8227e000 T smu7_get_sleep_divider_id_from_clock +ffffffff8227e0a0 T smu7_init_function_pointers +ffffffff8227e100 t smu7_hwmgr_backend_init +ffffffff8227ff50 t smu7_hwmgr_backend_fini +ffffffff8227ffc0 t smu7_setup_asic_task +ffffffff82280330 t smu7_get_power_state_size +ffffffff82280360 t smu7_apply_state_adjust_rules +ffffffff822807e0 t smu7_force_dpm_level +ffffffff82280cf0 t smu7_enable_dpm_tasks +ffffffff82283680 t smu7_disable_dpm_tasks +ffffffff82283dc0 t smu7_dpm_patch_boot_state +ffffffff82283f00 t smu7_get_pp_table_entry +ffffffff82284300 t smu7_get_number_of_powerplay_table_entries +ffffffff82284370 t smu7_dpm_get_mclk +ffffffff82284410 t smu7_dpm_get_sclk +ffffffff822844b0 t smu7_set_power_state_tasks +ffffffff82285240 t smu7_notify_smc_display_config_after_ps_adjustment +ffffffff82285270 t smu7_display_configuration_changed_task +ffffffff82285430 t smu7_set_max_fan_rpm_output +ffffffff82285460 t smu7_set_max_fan_pwm_output +ffffffff82285480 t smu7_set_fan_control_mode +ffffffff82285510 t smu7_get_fan_control_mode +ffffffff82285550 t smu7_register_irq_handlers +ffffffff82285600 t smu7_check_smc_update_required_for_display_configuration +ffffffff822856c0 t smu7_check_states_equal +ffffffff82285860 t smu7_get_performance_level +ffffffff82285900 t smu7_get_clock_by_type +ffffffff82285ac0 t smu7_get_clock_by_type_with_latency +ffffffff82285c60 t smu7_set_watermarks_for_clocks_ranges +ffffffff82285ea0 t smu7_get_max_high_clocks +ffffffff82285f20 t smu7_power_off_asic +ffffffff82285f80 t smu7_force_clock_level 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vega10_get_powerplay_table_entry +ffffffff822a1d80 T vega10_baco_set_cap +ffffffff822a2000 T vega10_fan_ctrl_get_fan_speed_info +ffffffff822a2080 T vega10_fan_ctrl_get_fan_speed_pwm +ffffffff822a21a0 T vega10_fan_ctrl_get_fan_speed_rpm +ffffffff822a22a0 T vega10_fan_ctrl_set_static_mode +ffffffff822a2550 T vega10_fan_ctrl_set_default_mode +ffffffff822a2760 T vega10_fan_ctrl_start_smc_fan_control +ffffffff822a2820 T vega10_fan_ctrl_stop_smc_fan_control +ffffffff822a28e0 T vega10_fan_ctrl_set_fan_speed_pwm +ffffffff822a2b00 T vega10_fan_ctrl_reset_fan_speed_to_default +ffffffff822a2bc0 T vega10_fan_ctrl_set_fan_speed_rpm +ffffffff822a2d90 T vega10_thermal_get_temperature +ffffffff822a2e20 T vega10_thermal_disable_alert +ffffffff822a2f30 T vega10_thermal_stop_thermal_controller +ffffffff822a2f90 T vega10_enable_mgpu_fan_boost +ffffffff822a30a0 T vega10_start_thermal_controller +ffffffff822a3640 T vega10_thermal_ctrl_uninitialize_thermal_controller +ffffffff822a4000 T vega12_baco_set_state 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sienna_cichlid_i2c_func +ffffffff822f3000 T smu_v11_0_init_microcode +ffffffff822f32a0 T smu_v11_0_fini_microcode +ffffffff822f3320 T smu_v11_0_load_microcode +ffffffff822f3470 T smu_v11_0_check_fw_status +ffffffff822f34c0 T smu_v11_0_check_fw_version +ffffffff822f3670 T smu_v11_0_setup_pptable +ffffffff822f37a0 T smu_v11_0_init_smc_tables +ffffffff822f3900 T smu_v11_0_fini_smc_tables +ffffffff822f3b30 T smu_v11_0_init_power +ffffffff822f3bc0 T smu_v11_0_fini_power +ffffffff822f3c20 T smu_v11_0_get_vbios_bootup_values +ffffffff822f3f80 T smu_v11_0_notify_memory_pool_location +ffffffff822f4070 T smu_v11_0_set_min_deep_sleep_dcefclk +ffffffff822f40f0 T smu_v11_0_set_driver_table_location +ffffffff822f4160 T smu_v11_0_set_tool_table_location +ffffffff822f41d0 T smu_v11_0_init_display_count +ffffffff822f4230 T smu_v11_0_set_allowed_mask +ffffffff822f4300 T smu_v11_0_system_features_control +ffffffff822f4320 T smu_v11_0_notify_display_change +ffffffff822f4390 T smu_v11_0_init_max_sustainable_clocks +ffffffff822f45f0 t smu_v11_0_get_max_sustainable_clock +ffffffff822f4710 T smu_v11_0_get_current_power_limit +ffffffff822f47e0 T smu_v11_0_set_power_limit +ffffffff822f4920 T smu_v11_0_interrupt_work +ffffffff822f49a0 T smu_v11_0_enable_thermal_alert +ffffffff822f4a40 T smu_v11_0_disable_thermal_alert +ffffffff822f4a60 T smu_v11_0_get_gfx_vdd +ffffffff822f4b20 T smu_v11_0_display_clock_voltage_request +ffffffff822f4c60 T smu_v11_0_set_hard_freq_limited_range +ffffffff822f4d40 T smu_v11_0_gfx_off_control +ffffffff822f4db0 T smu_v11_0_get_fan_control_mode +ffffffff822f4e00 T smu_v11_0_set_fan_speed_pwm +ffffffff822f4fa0 t smu_v11_0_set_fan_static_mode +ffffffff822f5150 T smu_v11_0_set_fan_speed_rpm +ffffffff822f5270 T smu_v11_0_get_fan_speed_pwm +ffffffff822f53b0 T smu_v11_0_get_fan_speed_rpm +ffffffff822f54b0 T smu_v11_0_set_fan_control_mode +ffffffff822f5650 T smu_v11_0_set_xgmi_pstate +ffffffff822f5670 T smu_v11_0_register_irq_handler +ffffffff822f5730 T smu_v11_0_get_max_sustainable_clocks_by_dc +ffffffff822f57c0 T smu_v11_0_set_azalia_d3_pme +ffffffff822f57e0 T smu_v11_0_baco_set_armd3_sequence +ffffffff822f5800 T smu_v11_0_baco_is_support +ffffffff822f5890 T smu_v11_0_baco_get_state +ffffffff822f58c0 T smu_v11_0_baco_set_state +ffffffff822f5b70 T smu_v11_0_baco_enter +ffffffff822f5c60 T smu_v11_0_baco_exit +ffffffff822f5d00 T smu_v11_0_mode1_reset +ffffffff822f5d80 T smu_v11_0_handle_passthrough_sbr +ffffffff822f5da0 T smu_v11_0_get_dpm_ultimate_freq +ffffffff822f5ee0 T smu_v11_0_set_soft_freq_limited_range +ffffffff822f5fc0 T smu_v11_0_set_performance_level +ffffffff822f6310 T smu_v11_0_set_power_source +ffffffff822f6370 T smu_v11_0_get_dpm_freq_by_index +ffffffff822f6420 T smu_v11_0_get_dpm_level_count +ffffffff822f64c0 T smu_v11_0_set_single_dpm_table +ffffffff822f66a0 T smu_v11_0_get_dpm_level_range +ffffffff822f6800 T smu_v11_0_get_current_pcie_link_width_level +ffffffff822f6850 T smu_v11_0_get_current_pcie_link_width +ffffffff822f68b0 T smu_v11_0_get_current_pcie_link_speed_level +ffffffff822f6900 T smu_v11_0_get_current_pcie_link_speed +ffffffff822f6960 T smu_v11_0_gfx_ulv_control +ffffffff822f69d0 T smu_v11_0_deep_sleep_control +ffffffff822f6b80 T smu_v11_0_restore_user_od_settings +ffffffff822f6c10 T smu_v11_0_set_smu_mailbox_registers +ffffffff822f6c80 t smu_v11_0_set_irq_state +ffffffff822f7200 t smu_v11_0_irq_process +ffffffff822f74e0 t orderly_poweroff +ffffffff822f8000 T vangogh_set_ppt_funcs +ffffffff822f8040 t vangogh_set_default_dpm_tables +ffffffff822f8070 t vangogh_common_print_clk_levels +ffffffff822f84d0 t vangogh_force_clk_levels +ffffffff822f8700 t vangogh_od_edit_dpm_table +ffffffff822f8c30 t vangogh_get_power_profile_mode +ffffffff822f8d00 t vangogh_set_power_profile_mode +ffffffff822f8e20 t vangogh_dpm_set_vcn_enable +ffffffff822f8e70 t vangogh_dpm_set_jpeg_enable +ffffffff822f8ec0 t vangogh_read_sensor +ffffffff822f8ff0 t vangogh_is_dpm_running +ffffffff822f9050 t vangogh_set_watermarks_table +ffffffff822f91e0 t vangogh_set_performance_level +ffffffff822f9b10 t vangogh_get_power_limit +ffffffff822f9c90 t vangogh_get_ppt_limit +ffffffff822f9d00 t vangogh_get_dpm_clock_table +ffffffff822f9e70 t vangogh_init_smc_tables +ffffffff822fa0c0 t vangogh_system_features_control +ffffffff822fa110 t vangogh_set_power_limit +ffffffff822fa270 t vangogh_get_gfxoff_status +ffffffff822fa300 t vangogh_get_gfxoff_entrycount +ffffffff822fa370 t vangogh_set_gfxoff_residency +ffffffff822fa3e0 t vangogh_get_gfxoff_residency +ffffffff822fa420 t vangogh_mode2_reset +ffffffff822fa560 t vangogh_common_get_gpu_metrics +ffffffff822fabb0 t vangogh_post_smu_init +ffffffff822fad50 t vangogh_set_fine_grain_gfx_freq_parameters +ffffffff822fadc0 t vangogh_common_get_smu_metrics_data +ffffffff822fb110 t vangogh_force_dpm_limit_value +ffffffff822fb250 t vangogh_get_dpm_ultimate_freq +ffffffff822fb610 t vangogh_set_soft_freq_limited_range +ffffffff822fc000 T renoir_set_ppt_funcs +ffffffff822fc0a0 t renoir_get_current_power_state +ffffffff822fc120 t renoir_print_clk_levels +ffffffff822fc620 t renoir_force_clk_levels +ffffffff822fc850 t renoir_od_edit_dpm_table +ffffffff822fcb30 t renoir_get_power_profile_mode +ffffffff822fcc00 t renoir_set_power_profile_mode +ffffffff822fcd20 t renoir_dpm_set_vcn_enable +ffffffff822fcda0 t renoir_dpm_set_jpeg_enable +ffffffff822fce20 t renoir_read_sensor +ffffffff822fd210 t renoir_is_dpm_running +ffffffff822fd250 t renoir_set_watermarks_table +ffffffff822fd400 t renoir_set_performance_level +ffffffff822fd940 t renoir_get_dpm_clock_table +ffffffff822fdc90 t renoir_init_smc_tables +ffffffff822fde00 t renoir_get_enabled_mask +ffffffff822fde40 t renoir_get_dpm_ultimate_freq +ffffffff822fe0e0 t renoir_get_gpu_metrics +ffffffff822fe300 t renoir_gfx_state_change_set +ffffffff822fe330 t renoir_set_fine_grain_gfx_freq_parameters +ffffffff822fe3d0 t renoir_force_dpm_limit_value +ffffffff822ff000 T smu_v12_0_check_fw_status +ffffffff822ff050 T smu_v12_0_check_fw_version +ffffffff822ff110 T smu_v12_0_powergate_sdma +ffffffff822ff150 T smu_v12_0_set_gfx_cgpg +ffffffff822ff1b0 T smu_v12_0_get_gfxoff_status +ffffffff822ff240 T smu_v12_0_gfx_off_control +ffffffff822ff360 T smu_v12_0_fini_smc_tables +ffffffff822ff410 T smu_v12_0_set_default_dpm_tables +ffffffff822ff440 T smu_v12_0_mode2_reset +ffffffff822ff460 T smu_v12_0_set_soft_freq_limited_range +ffffffff822ff5a0 T smu_v12_0_set_driver_table_location +ffffffff822ff610 T smu_v12_0_get_vbios_bootup_values +ffffffff82300000 T aldebaran_set_ppt_funcs +ffffffff82300040 t aldebaran_get_allowed_feature_mask +ffffffff82300090 t aldebaran_set_default_dpm_table +ffffffff82300290 t aldebaran_populate_umd_state_clk +ffffffff82300390 t aldebaran_print_clk_levels +ffffffff82300550 t aldebaran_force_clk_levels +ffffffff82300700 t aldebaran_usr_edit_dpm_table +ffffffff82300920 t aldebaran_read_sensor +ffffffff82300bc0 t aldebaran_is_dpm_running +ffffffff82300c10 t aldebaran_get_thermal_temperature_range +ffffffff82300ce0 t aldebaran_set_performance_level +ffffffff82300d90 t aldebaran_get_power_limit +ffffffff82300f20 t aldebaran_set_df_cstate +ffffffff82300fa0 t aldebaran_allow_xgmi_power_down +ffffffff82301040 t aldebaran_i2c_control_init +ffffffff82301100 t aldebaran_i2c_control_fini +ffffffff82301140 t aldebaran_get_unique_id +ffffffff82301220 t aldebaran_init_smc_tables +ffffffff823013b0 t aldebaran_set_mp1_state +ffffffff823013f0 t aldebaran_setup_pptable +ffffffff823014c0 t aldebaran_system_features_control +ffffffff82301620 t aldebaran_set_power_limit +ffffffff823016b0 t aldebaran_is_baco_supported +ffffffff823016e0 t aldebaran_is_mode1_reset_supported +ffffffff82301710 t aldebaran_is_mode2_reset_supported +ffffffff82301740 t aldebaran_mode1_reset +ffffffff82301820 t aldebaran_mode2_reset +ffffffff823019d0 t aldebaran_set_soft_freq_limited_range +ffffffff82301bd0 t aldebaran_log_thermal_throttling_event +ffffffff82301ee0 t aldebaran_get_gpu_metrics +ffffffff82302170 t aldebaran_smu_handle_passthrough_sbr +ffffffff82302190 t aldebaran_smu_send_hbm_bad_page_num +ffffffff82302210 t aldebaran_get_ecc_info +ffffffff82302370 t aldebaran_send_hbm_bad_channel_flag +ffffffff82302450 t aldebaran_get_current_clk_freq_by_table +ffffffff82302590 t aldebaran_get_smu_metrics_data +ffffffff823027e0 t aldebaran_upload_dpm_level +ffffffff823028d0 t aldebaran_i2c_xfer +ffffffff82302b80 t aldebaran_i2c_func +ffffffff82303000 T smu_v13_0_init_microcode +ffffffff823031d0 T smu_v13_0_fini_microcode +ffffffff82303250 T smu_v13_0_load_microcode +ffffffff82303280 T smu_v13_0_init_pptable_microcode +ffffffff82303430 T smu_v13_0_get_pptable_from_firmware +ffffffff82303550 T smu_v13_0_check_fw_status +ffffffff823035c0 T smu_v13_0_check_fw_version +ffffffff823036f0 T smu_v13_0_setup_pptable +ffffffff82303890 T smu_v13_0_init_smc_tables +ffffffff823039e0 T smu_v13_0_fini_smc_tables +ffffffff82303bd0 T smu_v13_0_init_power +ffffffff82303c50 T smu_v13_0_fini_power +ffffffff82303cd0 T smu_v13_0_get_vbios_bootup_values +ffffffff82303f60 T smu_v13_0_notify_memory_pool_location +ffffffff82304020 T smu_v13_0_set_min_deep_sleep_dcefclk +ffffffff823040a0 T smu_v13_0_set_driver_table_location +ffffffff82304110 T smu_v13_0_set_tool_table_location +ffffffff82304180 T smu_v13_0_init_display_count +ffffffff823041c0 T smu_v13_0_set_allowed_mask +ffffffff82304290 T smu_v13_0_gfx_off_control +ffffffff82304300 T smu_v13_0_system_features_control +ffffffff82304320 T smu_v13_0_notify_display_change +ffffffff82304390 T smu_v13_0_init_max_sustainable_clocks +ffffffff823045f0 t smu_v13_0_get_max_sustainable_clock +ffffffff82304710 T smu_v13_0_get_current_power_limit +ffffffff823047e0 T smu_v13_0_set_power_limit +ffffffff823048f0 T smu_v13_0_enable_thermal_alert +ffffffff82304980 T smu_v13_0_disable_thermal_alert +ffffffff823049c0 T smu_v13_0_get_gfx_vdd +ffffffff82304a80 T smu_v13_0_display_clock_voltage_request +ffffffff82304bc0 T smu_v13_0_set_hard_freq_limited_range +ffffffff82304ca0 T smu_v13_0_get_fan_control_mode +ffffffff82304cf0 T smu_v13_0_set_fan_speed_pwm +ffffffff82304f00 t smu_v13_0_set_fan_static_mode +ffffffff823050c0 T smu_v13_0_set_fan_control_mode +ffffffff82305220 T smu_v13_0_set_fan_speed_rpm +ffffffff823053c0 T smu_v13_0_set_xgmi_pstate +ffffffff823053e0 T smu_v13_0_register_irq_handler +ffffffff823054b0 T smu_v13_0_get_max_sustainable_clocks_by_dc +ffffffff82305540 T smu_v13_0_set_azalia_d3_pme +ffffffff82305560 T smu_v13_0_wait_for_event +ffffffff823055c0 T smu_v13_0_get_dpm_ultimate_freq +ffffffff82305720 T smu_v13_0_set_soft_freq_limited_range +ffffffff82305800 T smu_v13_0_set_performance_level +ffffffff82305f90 T smu_v13_0_set_power_source +ffffffff82305ff0 T smu_v13_0_set_single_dpm_table +ffffffff82306270 T smu_v13_0_get_dpm_level_range +ffffffff823063f0 T smu_v13_0_get_current_pcie_link_width_level +ffffffff82306440 T smu_v13_0_get_current_pcie_link_width +ffffffff823064a0 T smu_v13_0_get_current_pcie_link_speed_level +ffffffff823064f0 T smu_v13_0_get_current_pcie_link_speed +ffffffff82306540 T smu_v13_0_set_vcn_enable +ffffffff823065f0 T smu_v13_0_set_jpeg_enable +ffffffff82306610 T smu_v13_0_run_btc +ffffffff82306690 T smu_v13_0_gpo_control +ffffffff82306720 T smu_v13_0_deep_sleep_control +ffffffff82306980 T smu_v13_0_gfx_ulv_control +ffffffff823069f0 T smu_v13_0_baco_set_armd3_sequence +ffffffff82306a10 T smu_v13_0_baco_is_support +ffffffff82306aa0 T smu_v13_0_baco_get_state +ffffffff82306ad0 T smu_v13_0_baco_set_state +ffffffff82306b90 T smu_v13_0_baco_enter +ffffffff82306ca0 T smu_v13_0_baco_exit +ffffffff82306d40 T smu_v13_0_set_gfx_power_up_by_imu +ffffffff82306d80 T smu_v13_0_od_edit_dpm_table +ffffffff82307030 T smu_v13_0_set_default_dpm_tables +ffffffff82307060 T smu_v13_0_set_smu_mailbox_registers +ffffffff823070d0 T smu_v13_0_mode1_reset +ffffffff82307150 T smu_v13_0_update_pcie_parameters +ffffffff823073b0 t smu_v13_0_set_irq_state +ffffffff82307930 t smu_v13_0_irq_process +ffffffff82307df0 t orderly_poweroff +ffffffff82308000 T smu_v13_0_0_set_ppt_funcs +ffffffff823080e0 t smu_v13_0_0_get_allowed_feature_mask +ffffffff82308220 t smu_v13_0_0_set_default_dpm_table +ffffffff82308650 t smu_v13_0_0_populate_umd_state_clk +ffffffff82308780 t smu_v13_0_0_print_clk_levels +ffffffff823088a0 t smu_v13_0_0_force_clk_levels +ffffffff82308a20 t smu_v13_0_0_get_power_profile_mode +ffffffff82308c80 t smu_v13_0_0_set_power_profile_mode +ffffffff82308f80 t smu_v13_0_0_read_sensor +ffffffff823091a0 t smu_v13_0_0_is_dpm_running +ffffffff823091f0 t smu_v13_0_0_get_fan_speed_pwm +ffffffff823092d0 t smu_v13_0_0_get_fan_speed_rpm +ffffffff82309340 t smu_v13_0_0_get_thermal_temperature_range +ffffffff82309450 t smu_v13_0_0_dump_pptable +ffffffff82309480 t smu_v13_0_0_get_power_limit +ffffffff82309560 t smu_v13_0_0_set_df_cstate +ffffffff82309580 t smu_v13_0_0_i2c_control_init +ffffffff823096b0 t smu_v13_0_0_i2c_control_fini +ffffffff823096f0 t smu_v13_0_0_get_unique_id +ffffffff823097a0 t smu_v13_0_0_init_smc_tables +ffffffff82309990 t smu_v13_0_0_set_mp1_state +ffffffff823099d0 t smu_v13_0_0_setup_pptable +ffffffff82309b10 t smu_v13_0_0_system_features_control +ffffffff82309b20 t smu_v13_0_0_baco_enter +ffffffff82309b70 t smu_v13_0_0_baco_exit +ffffffff82309bd0 t smu_v13_0_0_is_mode1_reset_supported +ffffffff82309c30 t smu_v13_0_0_mode1_reset +ffffffff82309cc0 t smu_v13_0_0_get_dpm_ultimate_freq +ffffffff82309de0 t smu_v13_0_0_get_gpu_metrics +ffffffff8230a200 t smu_v13_0_0_enable_mgpu_fan_boost +ffffffff8230a250 t smu_v13_0_0_smu_send_bad_mem_page_num +ffffffff8230a2d0 t smu_v13_0_0_send_bad_mem_channel_flag +ffffffff8230a350 t smu_v13_0_0_get_smu_metrics_data +ffffffff8230a6c0 t smu_v13_0_get_throttler_status +ffffffff8230a880 t smu_v13_0_0_i2c_xfer +ffffffff8230ab30 t smu_v13_0_0_i2c_func +ffffffff8230b000 T smu_v13_0_4_set_ppt_funcs +ffffffff8230b0b0 t smu_v13_0_4_print_clk_levels +ffffffff8230b170 t smu_v13_0_4_force_clk_levels +ffffffff8230b410 t smu_v13_0_4_read_sensor +ffffffff8230b6c0 t smu_v13_0_4_is_dpm_running +ffffffff8230b710 t smu_v13_0_4_set_watermarks_table +ffffffff8230b8a0 t smu_v13_0_4_set_performance_level +ffffffff8230bde0 t smu_v13_0_4_init_smc_tables +ffffffff8230bf50 t smu_v13_0_4_fini_smc_tables +ffffffff8230c000 t smu_v13_0_4_system_features_control +ffffffff8230c050 t smu_v13_0_4_mode2_reset +ffffffff8230c070 t smu_v13_0_4_get_dpm_ultimate_freq +ffffffff8230c490 t smu_v13_0_4_get_gpu_metrics +ffffffff8230c660 t smu_v13_0_4_set_fine_grain_gfx_freq_parameters +ffffffff8230c6c0 t smu_v13_0_4_get_smu_metrics_data +ffffffff8230d000 T smu_v13_0_5_set_ppt_funcs +ffffffff8230d090 t smu_v13_0_5_set_default_dpm_tables +ffffffff8230d0c0 t smu_v13_0_5_print_clk_levels +ffffffff8230d170 t smu_v13_0_5_force_clk_levels +ffffffff8230d2d0 t smu_v13_0_5_od_edit_dpm_table +ffffffff8230d580 t smu_v13_0_5_dpm_set_vcn_enable +ffffffff8230d5a0 t smu_v13_0_5_dpm_set_jpeg_enable +ffffffff8230d5c0 t smu_v13_0_5_read_sensor +ffffffff8230d7e0 t smu_v13_0_5_is_dpm_running +ffffffff8230d830 t smu_v13_0_5_set_watermarks_table +ffffffff8230d9c0 t smu_v13_0_5_set_performance_level +ffffffff8230dba0 t smu_v13_0_5_init_smc_tables +ffffffff8230dd10 t smu_v13_0_5_fini_smc_tables +ffffffff8230ddc0 t smu_v13_0_5_system_features_control +ffffffff8230de10 t smu_v13_0_5_mode2_reset +ffffffff8230de90 t smu_v13_0_5_get_dpm_ultimate_freq +ffffffff8230e2d0 t smu_v13_0_5_get_gpu_metrics +ffffffff8230e410 t smu_v13_0_5_set_fine_grain_gfx_freq_parameters +ffffffff8230e470 t smu_v13_0_5_get_smu_metrics_data +ffffffff8230f000 T smu_v13_0_7_set_ppt_funcs +ffffffff8230f050 t smu_v13_0_7_get_allowed_feature_mask +ffffffff8230f1c0 t smu_v13_0_7_set_default_dpm_table +ffffffff8230f5f0 t smu_v13_0_7_populate_umd_state_clk +ffffffff8230f720 t smu_v13_0_7_print_clk_levels +ffffffff8230f840 t smu_v13_0_7_force_clk_levels +ffffffff8230f9c0 t smu_v13_0_7_get_power_profile_mode +ffffffff8230fca0 t smu_v13_0_7_set_power_profile_mode +ffffffff8230fee0 t smu_v13_0_7_read_sensor +ffffffff823100f0 t smu_v13_0_7_is_dpm_running +ffffffff82310140 t smu_v13_0_7_get_fan_speed_pwm +ffffffff82310220 t smu_v13_0_7_get_fan_speed_rpm +ffffffff82310290 t smu_v13_0_7_get_thermal_temperature_range +ffffffff823103a0 t smu_v13_0_7_dump_pptable +ffffffff823103d0 t smu_v13_0_7_get_power_limit +ffffffff823104b0 t smu_v13_0_7_set_df_cstate +ffffffff823104d0 t smu_v13_0_7_init_smc_tables +ffffffff823106c0 t smu_v13_0_7_check_fw_status +ffffffff82310710 t smu_v13_0_7_set_mp1_state +ffffffff82310750 t smu_v13_0_7_setup_pptable +ffffffff823108b0 t smu_v13_0_7_baco_enter +ffffffff82310900 t smu_v13_0_7_baco_exit +ffffffff82310960 t smu_v13_0_7_is_mode1_reset_supported +ffffffff823109a0 t smu_v13_0_7_get_dpm_ultimate_freq +ffffffff82310ac0 t smu_v13_0_7_get_gpu_metrics +ffffffff82310ed0 t smu_v13_0_7_enable_mgpu_fan_boost +ffffffff82310f20 t smu_v13_0_7_get_smu_metrics_data +ffffffff82311270 t smu_v13_0_7_get_throttler_status +ffffffff82312000 T yellow_carp_set_ppt_funcs +ffffffff82312040 t yellow_carp_set_default_dpm_tables +ffffffff82312070 t yellow_carp_print_clk_levels +ffffffff82312130 t yellow_carp_force_clk_levels +ffffffff823123d0 t yellow_carp_od_edit_dpm_table +ffffffff82312680 t yellow_carp_dpm_set_vcn_enable +ffffffff823126a0 t yellow_carp_dpm_set_jpeg_enable +ffffffff823126c0 t yellow_carp_read_sensor +ffffffff82312a60 t yellow_carp_is_dpm_running +ffffffff82312ab0 t yellow_carp_set_watermarks_table +ffffffff82312c40 t yellow_carp_set_performance_level +ffffffff82313180 t yellow_carp_init_smc_tables +ffffffff823132f0 t yellow_carp_fini_smc_tables +ffffffff823133a0 t yellow_carp_system_features_control +ffffffff823133f0 t yellow_carp_get_gfxoff_status +ffffffff82313480 t yellow_carp_mode2_reset +ffffffff82313500 t yellow_carp_get_dpm_ultimate_freq +ffffffff82313950 t yellow_carp_get_gpu_metrics +ffffffff82313b10 t yellow_carp_post_smu_init +ffffffff82313b90 t yellow_carp_set_fine_grain_gfx_freq_parameters +ffffffff82313bf0 t yellow_carp_get_smu_metrics_data +ffffffff82314000 T smu_cmn_send_msg_without_waiting +ffffffff82314170 T smu_cmn_wait_for_response +ffffffff823142b0 T smu_cmn_send_smc_msg_with_param +ffffffff823145d0 T smu_cmn_to_asic_specific_index +ffffffff823146e0 t __smu_cmn_reg_print_error +ffffffff82314920 T smu_cmn_send_smc_msg +ffffffff82314940 T smu_cmn_send_debug_smc_msg +ffffffff823149c0 T smu_cmn_feature_is_supported +ffffffff82314a70 T smu_cmn_feature_is_enabled +ffffffff82314b60 T smu_cmn_clk_dpm_is_enabled +ffffffff82314c60 T smu_cmn_get_enabled_mask +ffffffff82314d50 T smu_cmn_get_indep_throttler_status +ffffffff82314e00 T smu_cmn_feature_update_enable_state +ffffffff82314ea0 T smu_cmn_feature_set_enabled +ffffffff82314f70 T smu_cmn_get_pp_feature_mask +ffffffff82315120 T smu_cmn_set_pp_feature_mask +ffffffff82315220 T smu_cmn_disable_all_features_with_exception +ffffffff823152d0 T smu_cmn_get_smc_version +ffffffff823153a0 T smu_cmn_update_table +ffffffff82315500 T smu_cmn_write_watermarks_table +ffffffff823155d0 T smu_cmn_write_pptable +ffffffff82315690 T smu_cmn_get_metrics_table +ffffffff823157f0 T smu_cmn_get_combo_pptable +ffffffff823158c0 T smu_cmn_init_soft_gpu_metrics +ffffffff823159a0 T smu_cmn_set_mp1_state +ffffffff82315a40 T smu_cmn_is_audio_func_enabled +ffffffff82316000 T pci_mcfg_init +ffffffff82316050 T pci_lookup_segment +ffffffff823160b0 T pci_attach_hook +ffffffff823160e0 T pci_bus_maxdevs +ffffffff82316110 T pci_make_tag +ffffffff82316180 T pci_decompose_tag +ffffffff823161e0 T pci_conf_size +ffffffff82316240 T pci_mcfg_map_bus +ffffffff823162c0 T pci_conf_read +ffffffff82316410 T pci_conf_write +ffffffff82316550 T pci_msix_table_map +ffffffff82316670 T pci_msix_table_unmap +ffffffff82316710 T msi_hwmask +ffffffff82316740 T msi_hwunmask +ffffffff82316770 T msi_addroute +ffffffff82316870 T msi_delroute +ffffffff823168e0 T pci_intr_map_msi +ffffffff82316960 T msix_hwmask +ffffffff82316990 T msix_hwunmask +ffffffff823169c0 T msix_addroute +ffffffff82316bb0 T msix_delroute +ffffffff82316d10 T pci_intr_map_msix +ffffffff82316de0 T pci_intr_map +ffffffff82317000 T pci_intr_string +ffffffff823170e0 T pci_intr_establish +ffffffff82317130 T pci_intr_establish_cpu +ffffffff82317290 T pci_intr_disestablish +ffffffff823172b0 T pci_init_extents +ffffffff82317490 T pci_probe_device_hook +ffffffff823174d0 T pci_dev_postattach +ffffffff823174e0 T pci_min_powerstate +ffffffff823174f0 T pci_set_powerstate_md +ffffffff82318000 T pciide_machdep_compat_intr_establish +ffffffff82318060 T pciide_machdep_compat_intr_disestablish +ffffffff82319000 T vga_post_init +ffffffff82319310 t vm86_emu_inb +ffffffff82319360 t vm86_emu_inw +ffffffff823193a0 t vm86_emu_inl +ffffffff823193e0 t vm86_emu_outb +ffffffff82319430 t vm86_emu_outw +ffffffff82319470 t vm86_emu_outl +ffffffff823194b0 T vga_post_call +ffffffff82319520 T vga_post_free +ffffffff82319590 T ddb_vgapost +ffffffff8231a000 T pchbmatch +ffffffff8231a040 T pchbattach +ffffffff8231a4b0 T pchbactivate +ffffffff8231a520 T pchb_amd64ht_attach +ffffffff8231a670 T pchb_rnd +ffffffff8231a6f0 T pchb_print +ffffffff8231b000 T amas_match +ffffffff8231b050 T amas_attach +ffffffff8231b0b0 T amas_intl_nodes +ffffffff8231b140 T amas_get_pagerange +ffffffff8231c000 T agp_flush_cache +ffffffff8231c030 T agp_flush_cache_range +ffffffff8231c040 T agp_init_map +ffffffff8231c110 T agp_destroy_map +ffffffff8231c150 T agp_map_subregion +ffffffff8231c180 T agp_unmap_subregion +ffffffff8231c1b0 T agp_map_atomic +ffffffff8231c1e0 T agp_unmap_atomic +ffffffff8231d000 T cardslotmatch +ffffffff8231d050 T cardslotattach +ffffffff8231d2a0 T cardslot_event +ffffffff8231d300 T cardslot_cb_print +ffffffff8231d350 T cardslot_16_print +ffffffff8231d3a0 T cardslot_16_submatch +ffffffff8231d3f0 T cardslot_event_throw +ffffffff8231d490 T cardslot_process_event +ffffffff8231e000 T cardbusmatch +ffffffff8231e050 T cardbusattach +ffffffff8231e130 T cardbus_read_tuples +ffffffff8231e4e0 T parse_tuple +ffffffff8231e760 T cardbus_attach_card +ffffffff8231eee0 T enable_function +ffffffff8231ef80 T decode_tuples +ffffffff8231f050 T cardbusprint +ffffffff8231f140 T cardbussubmatch +ffffffff8231f1a0 T disable_function +ffffffff8231f200 T cardbus_detach_card +ffffffff8231f2e0 T cardbus_intr_establish +ffffffff8231f310 T cardbus_intr_disestablish +ffffffff8231f330 T cardbus_function_enable +ffffffff8231f410 T cardbus_function_disable +ffffffff8231f470 T cardbus_matchbyid +ffffffff8231f4e0 T decode_tuple +ffffffff82320000 T cardbus_mapreg_map +ffffffff823201b0 T cardbus_mapreg_unmap +ffffffff82321000 T cardbus_read_exrom +ffffffff82322000 T rbus_space_alloc +ffffffff82322060 T rbus_space_alloc_subregion +ffffffff82322240 T rbus_space_free +ffffffff823222d0 T rbus_new_body +ffffffff82322360 T rbus_new_root_delegate +ffffffff82322430 T rbus_new_root_share +ffffffff82323000 T com_cardbus_match +ffffffff82323070 T com_cardbus_attach +ffffffff82323220 T com_cardbus_detach +ffffffff823232c0 T com_cardbus_find_csdev +ffffffff82323440 T com_cardbus_gofigure +ffffffff82323900 T com_cardbus_enable +ffffffff823239d0 T com_cardbus_disable +ffffffff82323a20 T com_cardbus_setup +ffffffff82324000 T xl_cardbus_match +ffffffff82324090 T xl_cardbus_attach +ffffffff82324420 T xl_cardbus_detach +ffffffff823244e0 T xl_cardbus_lookup +ffffffff823245a0 T xl_cardbus_intr_ack +ffffffff82325000 T dc_cardbus_match +ffffffff82325030 T dc_cardbus_attach +ffffffff823253c0 T dc_cardbus_detach +ffffffff82325460 T dc_cardbus_setup +ffffffff82326000 T fxp_cardbus_match +ffffffff82326030 T fxp_cardbus_attach +ffffffff82326240 T fxp_cardbus_detach +ffffffff823262d0 T fxp_cardbus_setup +ffffffff82327000 t rl_cardbus_match +ffffffff82327030 t rl_cardbus_attach +ffffffff823271d0 t rl_cardbus_detach +ffffffff82327290 T rl_cardbus_setup +ffffffff82328000 T re_cardbus_probe +ffffffff82328030 T re_cardbus_attach +ffffffff82328230 T re_cardbus_detach +ffffffff82328310 T re_cardbus_setup +ffffffff82329000 T ath_cardbus_match +ffffffff82329050 T ath_cardbus_attach +ffffffff82329180 T ath_cardbus_detach +ffffffff82329250 T ath_cardbus_enable +ffffffff82329320 T ath_cardbus_disable +ffffffff82329370 T ath_cardbus_power +ffffffff823293b0 T ath_cardbus_setup +ffffffff8232a000 T athn_cardbus_match +ffffffff8232a030 T athn_cardbus_attach +ffffffff8232a170 T athn_cardbus_detach +ffffffff8232a210 T athn_cardbus_enable +ffffffff8232a2e0 T athn_cardbus_disable +ffffffff8232a330 T athn_cardbus_power +ffffffff8232a370 T athn_cardbus_read +ffffffff8232a3a0 T athn_cardbus_write +ffffffff8232a3d0 T athn_cardbus_write_barrier +ffffffff8232a400 T athn_cardbus_setup +ffffffff8232b000 T atw_cardbus_match +ffffffff8232b030 T atw_cardbus_attach +ffffffff8232b220 T atw_cardbus_detach +ffffffff8232b2e0 T atw_cardbus_enable +ffffffff8232b3b0 T atw_cardbus_disable +ffffffff8232b400 T atw_cardbus_power +ffffffff8232b440 T atw_cardbus_setup +ffffffff8232c000 T rtw_cardbus_match +ffffffff8232c030 T rtw_cardbus_attach +ffffffff8232c280 T rtw_cardbus_detach +ffffffff8232c3a0 T rtw_cardbus_intr_ack +ffffffff8232c3c0 T rtw_cardbus_funcregen +ffffffff8232c420 T rtw_cardbus_enable +ffffffff8232c580 T rtw_cardbus_disable +ffffffff8232c660 T rtw_cardbus_power +ffffffff8232c6a0 T rtw_cardbus_setup +ffffffff8232d000 T ral_cardbus_match +ffffffff8232d030 T ral_cardbus_attach +ffffffff8232d230 T ral_cardbus_detach +ffffffff8232d2e0 T ral_cardbus_activate +ffffffff8232d370 T ral_cardbus_enable +ffffffff8232d4d0 T ral_cardbus_disable +ffffffff8232d520 T ral_cardbus_setup +ffffffff8232d5c0 T ral_cardbus_wakeup +ffffffff8232e000 T acx_cardbus_match +ffffffff8232e030 T acx_cardbus_attach +ffffffff8232e260 T acx_cardbus_detach +ffffffff8232e380 T acx_cardbus_enable +ffffffff8232e450 T acx_cardbus_disable +ffffffff8232e4a0 T acx_cardbus_power +ffffffff8232e4e0 T acx_cardbus_setup +ffffffff8232f000 T pgt_cardbus_match +ffffffff8232f030 T pgt_cardbus_attach +ffffffff8232f230 T pgt_cardbus_detach +ffffffff8232f2e0 T pgt_cardbus_enable +ffffffff8232f440 T pgt_cardbus_disable +ffffffff8232f490 T pgt_cardbus_power +ffffffff8232f4f0 T pgt_cardbus_setup +ffffffff82330000 T ehci_cardbus_match +ffffffff82330040 T ehci_cardbus_attach +ffffffff823302e0 T ehci_cardbus_detach +ffffffff82331000 T ohci_cardbus_match +ffffffff82331040 T ohci_cardbus_attach +ffffffff823312d0 T ohci_cardbus_detach +ffffffff82332000 T uhci_cardbus_match +ffffffff82332040 T uhci_cardbus_attach +ffffffff82332350 T uhci_cardbus_detach +ffffffff82333000 T malo_cardbus_match +ffffffff82333030 T malo_cardbus_attach +ffffffff82333270 T malo_cardbus_detach +ffffffff82333340 T malo_cardbus_enable +ffffffff823334b0 T malo_cardbus_disable +ffffffff82333500 T malo_cardbus_setup +ffffffff82334000 T bwi_cardbus_match +ffffffff82334030 T bwi_cardbus_attach +ffffffff823342a0 T bwi_cardbus_detach +ffffffff82334350 T bwi_cardbus_enable +ffffffff823344b0 T bwi_cardbus_disable +ffffffff82334500 T bwi_cardbus_setup +ffffffff823345a0 T bwi_cardbus_conf_read +ffffffff823345d0 T bwi_cardbus_conf_write +ffffffff82335000 T rbus_pccbb_parent_mem +ffffffff82335060 T rbus_pccbb_parent_io +ffffffff823350d0 T pccbb_attach_hook +ffffffff82336000 T pcmcia_match +ffffffff82336050 T pcmcia_attach +ffffffff823360d0 T pcmcia_activate +ffffffff82336180 T pcmcia_ccr_read +ffffffff823361d0 T pcmcia_ccr_write +ffffffff82336240 T pcmcia_card_attach +ffffffff82336450 T pcmcia_print +ffffffff823366b0 T pcmcia_submatch +ffffffff82336700 T pcmcia_card_detach +ffffffff823367b0 T pcmcia_card_deactivate +ffffffff82336820 T pcmcia_card_gettype +ffffffff82336880 T pcmcia_function_init +ffffffff823368d0 T pcmcia_function_enable +ffffffff82336d00 T pcmcia_function_disable +ffffffff82336e20 T pcmcia_io_map +ffffffff82337060 T pcmcia_intr_establish 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T aic_pcmcia_detach +ffffffff82340000 T com_pcmcia_match +ffffffff82340220 T com_pcmcia_attach +ffffffff82340500 T com_pcmcia_detach +ffffffff823405a0 T com_pcmcia_activate +ffffffff82340660 T com_pcmcia_enable1 +ffffffff82340710 T com_pcmcia_enable +ffffffff82340810 T com_pcmcia_disable +ffffffff82340850 T com_pcmcia_disable1 +ffffffff82341000 t wdc_pcmcia_match +ffffffff823410d0 t wdc_pcmcia_attach +ffffffff82341540 T wdc_pcmcia_detach +ffffffff82341640 T wdc_pcmcia_activate +ffffffff82341760 T wdc_pcmcia_disk_device_interface_callback +ffffffff82341800 T wdc_pcmcia_disk_device_interface +ffffffff82341860 T wdc_pcmcia_lookup +ffffffff82342000 T sm_pcmcia_match +ffffffff82342100 T sm_pcmcia_attach +ffffffff82342320 T sm_pcmcia_detach +ffffffff823423c0 T sm_pcmcia_activate +ffffffff82342450 T sm_pcmcia_funce_enaddr +ffffffff82342470 T sm_pcmcia_ascii_enaddr +ffffffff82342570 T sm_pcmcia_lannid_ciscallback +ffffffff82342680 T sm_pcmcia_enable +ffffffff82342720 T sm_pcmcia_disable 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+ffffffff82347590 T wi_pcmcia_wakeup +ffffffff82348000 T malo_pcmcia_match +ffffffff82348050 T malo_pcmcia_attach +ffffffff82348220 T malo_pcmcia_detach +ffffffff823482a0 T malo_pcmcia_activate +ffffffff82348500 T cmalo_intr +ffffffff82348760 T cmalo_attach +ffffffff82348c60 T cmalo_detach +ffffffff82348d40 T cmalo_stop +ffffffff82348e80 T malo_pcmcia_wakeup +ffffffff82348f20 T cmalo_init +ffffffff823492a0 T cmalo_intr_mask +ffffffff82349330 T cmalo_fw_alloc +ffffffff82349400 T cmalo_fw_load_helper +ffffffff82349660 T cmalo_fw_load_main +ffffffff82349ab0 T cmalo_cmd_get_hwspec +ffffffff82349c00 T cmalo_ioctl +ffffffff8234a020 T cmalo_start +ffffffff8234a0c0 T cmalo_watchdog +ffffffff8234a0f0 T cmalo_newstate +ffffffff8234a380 T cmalo_media_change +ffffffff8234a3e0 T cmalo_cmd_set_scan +ffffffff8234a510 T cmalo_fw_free +ffffffff8234a590 T cmalo_cmd_set_macctrl +ffffffff8234a6f0 T cmalo_cmd_set_txpower +ffffffff8234a850 T cmalo_cmd_set_antenna +ffffffff8234a9c0 T cmalo_cmd_set_radio +ffffffff8234ab20 T cmalo_cmd_set_channel +ffffffff8234ac80 T cmalo_cmd_set_rate +ffffffff8234ae00 T cmalo_cmd_set_snmp +ffffffff8234af90 T cmalo_cmd_set_macaddr +ffffffff8234b0f0 T cmalo_wep +ffffffff8234b1a0 T cmalo_cmd_set_reset +ffffffff8234b2a0 T cmalo_select_network +ffffffff8234b3a0 T cmalo_cmd_set_auth +ffffffff8234b460 T cmalo_cmd_set_assoc +ffffffff8234b7c0 T cmalo_reflect_network +ffffffff8234b8b0 T cmalo_tx_done +ffffffff8234b970 T cmalo_rx +ffffffff8234bb70 T cmalo_cmd_response +ffffffff8234bd90 T cmalo_event +ffffffff8234be00 T cmalo_tx +ffffffff8234bff0 T cmalo_cmd_set_wep +ffffffff8234c240 T cmalo_rate2bitmap +ffffffff8234c280 T cmalo_hexdump +ffffffff8234c2b0 T cmalo_cmd_request +ffffffff8234c410 T cmalo_cmd_rsp_hwspec +ffffffff8234c480 T cmalo_cmd_rsp_scan +ffffffff8234c690 T cmalo_parse_elements +ffffffff8234c790 T cmalo_cmd_rsp_assoc +ffffffff8234c7d0 T cmalo_cmd_set_80211d +ffffffff8234c8d0 T cmalo_cmd_set_bgscan_config +ffffffff8234ca30 T cmalo_cmd_set_bgscan_query +ffffffff8234d000 T an_pcmcia_match +ffffffff8234d060 T an_pcmcia_attach +ffffffff8234d250 T an_pcmcia_detach +ffffffff8234d2e0 T an_pcmcia_activate +ffffffff8234e000 T pcibmatch +ffffffff8234e0d0 T pcibattach +ffffffff8234e110 T pcib_callback +ffffffff8234e190 T pcib_print +ffffffff8234f000 T amdpcib_match +ffffffff8234f050 T amdpcib_attach +ffffffff8234f180 T amdpcib_get_timecount +ffffffff82350000 T tcpcib_match +ffffffff82350050 T tcpcib_attach +ffffffff82350310 T tcpcib_activate +ffffffff823505c0 T tcpcib_wdt_init +ffffffff823506f0 T tcpcib_wdt_start +ffffffff82350720 T tcpcib_wdt_stop +ffffffff823507a0 T tcpcib_hpet_get_timecount +ffffffff823507d0 T tcpcib_wdt_cb +ffffffff82351000 T aapic_match +ffffffff82351040 T aapic_attach +ffffffff82352000 T hme_config +ffffffff82352580 T hme_stop +ffffffff82352790 T hme_start +ffffffff82352ab0 T hme_ioctl +ffffffff82352c60 T hme_watchdog +ffffffff82352cc0 t hme_mii_readreg +ffffffff82352e40 t hme_mii_writereg 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db_acpi_showval +ffffffff824f78e0 T db_disprint +ffffffff824f7950 T db_acpi_disasm +ffffffff824f7aa0 T db_acpi_tree +ffffffff824f7ac0 T db_acpi_trace +ffffffff824f8000 T acpitimermatch +ffffffff824f8070 T acpitimerattach +ffffffff824f8170 T acpitimer_delay +ffffffff824f82d0 T acpitimer_read +ffffffff824f8370 T acpi_get_timecount +ffffffff824f9000 T acpiac_match +ffffffff824f9030 T acpiac_attach +ffffffff824f9180 T acpiac_activate +ffffffff824f9210 T acpiac_getpsr +ffffffff824f9280 T acpiac_notify +ffffffff824f9330 T acpiac_refresh +ffffffff824fa000 T acpibat_match +ffffffff824fa060 T acpibat_attach +ffffffff824fa1f0 T acpibat_activate +ffffffff824fa280 T acpibat_getbix +ffffffff824fa5a0 T acpibat_getbst +ffffffff824fa6a0 T acpibat_monitor +ffffffff824fa9a0 T acpibat_refresh +ffffffff824fae80 T acpibat_notify +ffffffff824fb000 T acpibtn_match +ffffffff824fb030 T acpibtn_attach +ffffffff824fb300 T acpibtn_activate +ffffffff824fb380 T acpibtn_numopenlids +ffffffff824fb430 T acpibtn_setpsw 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acpitz_init_perf +ffffffff825026a0 T acpitz_setperf +ffffffff82502700 T acpitz_init +ffffffff82502910 T acpitz_getreading +ffffffff82502980 T acpitz_gettempreading +ffffffff82502ac0 T acpitz_notify +ffffffff82502b30 T acpitz_setfan +ffffffff82502e20 T acpitz_refresh +ffffffff82504000 T acpimadt_match +ffffffff82504060 T acpimadt_attach +ffffffff82504810 T acpimadt_validate +ffffffff82504940 T acpimadt_cfg_intr +ffffffff825049e0 T acpimadt_print +ffffffff82505000 T acpimcfg_match +ffffffff82505060 T acpimcfg_attach +ffffffff82506000 T acpiprt_match +ffffffff82506070 T acpiprt_attach +ffffffff825061a0 T acpiprt_getpcibus +ffffffff825061e0 T acpiprt_prt_add +ffffffff82506650 T acpiprt_getirq +ffffffff82506750 T acpiprt_chooseirq +ffffffff82506900 T acpiprt_route_interrupt +ffffffff82507000 T acpidmar_match +ffffffff82507080 T acpidmar_attach +ffffffff82507140 T acpidmar_activate +ffffffff82507380 T dmar_bdf +ffffffff82507400 T domain_map_check +ffffffff82507580 T acpidmar_pci_attach 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T acpidmar_intr_establish +ffffffff82509340 T acpidmar_intr +ffffffff825094e0 T acpidmar_match_devscope +ffffffff82509620 T domain_create +ffffffff82509860 t dmar_dmamap_create +ffffffff82509880 t dmar_dmamap_destroy +ffffffff82509890 t dmar_dmamap_load +ffffffff82509900 t dmar_dmamap_load_mbuf +ffffffff82509960 t dmar_dmamap_load_uio +ffffffff825099c0 t dmar_dmamap_load_raw +ffffffff82509a30 t dmar_dmamap_unload +ffffffff82509a60 t dmar_dmamap_sync +ffffffff82509a80 t dmar_dmamem_alloc +ffffffff82509aa0 t dmar_dmamem_free +ffffffff82509ac0 t dmar_dmamem_map +ffffffff82509ae0 t dmar_dmamem_unmap +ffffffff82509b00 t dmar_dmamem_mmap +ffffffff82509b20 T domain_add_device +ffffffff82509ba0 T domain_remove_device +ffffffff82509c50 T domain_lookup +ffffffff82509e10 T _iommu_map +ffffffff82509ed0 T _iommu_domain +ffffffff82509f30 T domain_map_device +ffffffff8250a240 T ivhd_flush_devtab +ffffffff8250a2a0 T acpidmar_pci_hook +ffffffff8250a460 T acpidmar_parse_devscope +ffffffff8250a580 T acpidmar_drhd +ffffffff8250a750 T acpidmar_rmrr +ffffffff8250aa00 T acpidmar_atsr +ffffffff8250aba0 T acpidmar_init +ffffffff8250b000 T acpiivhd_intr +ffffffff8250b0e0 T ivhd_poll_events +ffffffff8250b1a0 T ivhd_intr_map +ffffffff8250b250 T _dumppte +ffffffff8250b3c0 T ivhd_showpage +ffffffff8250b500 T ivhd_show_event +ffffffff8250bde0 T ivhd_showdte +ffffffff8250bed0 T ivhd_showcmd +ffffffff8250bf90 T _ivhd_issue_command +ffffffff8250c070 T ivhd_issue_command +ffffffff8250c350 T ivhd_invalidate_iommu_all +ffffffff8250c440 T ivhd_invalidate_interrupt_table +ffffffff8250c530 T ivhd_showreg +ffffffff8250c670 T ivhd_checkerr +ffffffff8250c8c0 T ivhd_iommu_init +ffffffff8250cd90 T acpiivrs_ivhd +ffffffff8250ce00 T acpiivrs_init +ffffffff8250cf30 T acpidmar_msi_hwmask +ffffffff8250cfa0 T acpidmar_msi_hwunmask +ffffffff8250d010 T acpidmar_msi_addroute +ffffffff8250d0c0 T acpidmar_msi_delroute +ffffffff8250d0e0 T iommu_showfault +ffffffff8250d2a0 T iommu_showpte +ffffffff8250e000 T acpidock_match +ffffffff8250e070 T acpidock_attach +ffffffff8250e390 T acpidock_status +ffffffff8250e420 T acpidock_docklock +ffffffff8250e500 T acpidock_dockctl +ffffffff8250e5e0 T acpidock_foundejd +ffffffff8250e690 T acpidock_notify +ffffffff8250eb80 T acpidock_eject +ffffffff8250ec70 T acpidock_walkchildren +ffffffff8250f000 T abl_match +ffffffff8250f030 T abl_attach +ffffffff8250f220 T abl_get_brightness +ffffffff8250f2a0 T abl_get_param +ffffffff8250f300 T abl_set_param +ffffffff8250f3c0 T abl_set_brightness +ffffffff82510000 T asmc_match +ffffffff82510050 T asmc_attach +ffffffff825105c0 T asmc_activate +ffffffff82510650 T asmc_try +ffffffff82510a30 T asmc_get_backlight +ffffffff82510ab0 T asmc_set_backlight +ffffffff82510b40 T asmc_backlight +ffffffff82510bd0 T asmc_init +ffffffff82510dd0 T asmc_update +ffffffff82510f80 T asmc_detach +ffffffff82511150 t asmc_temp +ffffffff825112d0 t asmc_fan +ffffffff825114a0 t asmc_light +ffffffff82512000 T acpiasus_match +ffffffff82512030 T acpiasus_attach +ffffffff82512150 T acpiasus_activate +ffffffff825122e0 T acpiasus_init +ffffffff825123c0 T acpiasus_notify +ffffffff82513000 T thinkpad_match +ffffffff825130b0 T thinkpad_attach +ffffffff825134c0 T thinkpad_activate +ffffffff82513640 T thinkpad_sensor_attach +ffffffff825137b0 T thinkpad_get_temp +ffffffff82513840 T thinkpad_sensor_refresh +ffffffff825139c0 T thinkpad_get_volume_mute +ffffffff82513a30 T thinkpad_attach_deferred +ffffffff82513a50 T thinkpad_enable_events +ffffffff82513c20 T thinkpad_get_kbd_backlight +ffffffff82513cb0 T thinkpad_set_kbd_backlight +ffffffff82513d80 T thinkpad_get_param +ffffffff82513de0 T thinkpad_set_param +ffffffff82513ea0 T thinkpad_battery_setchargestart +ffffffff82513ff0 T thinkpad_battery_setchargestop +ffffffff82514140 T thinkpad_battery_setchargemode +ffffffff82514720 T thinkpad_hotkey +ffffffff82514d50 T thinkpad_brightness_up +ffffffff82514ef0 T thinkpad_brightness_down +ffffffff825150a0 T thinkpad_toggle_bluetooth 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toshiba_get_brightness +ffffffff82516b20 T toshiba_fn_key_brightness_up +ffffffff82516c70 T toshiba_fn_key_brightness_down +ffffffff82516dc0 T toshiba_fn_key_video_output +ffffffff82516f10 T toshiba_get_video_output +ffffffff82517080 T toshiba_set_video_output +ffffffff82518000 T acpisony_match +ffffffff82518070 T acpisony_attach +ffffffff825180e0 T acpisony_activate +ffffffff82518120 T acpisony_notify_setup +ffffffff82518310 T acpisony_notify +ffffffff825186c0 T acpisony_find_offset +ffffffff825187d0 T acpisony_set_hotkey +ffffffff825189c0 T acpisony_brightness_down +ffffffff82518ad0 T acpisony_get_brightness +ffffffff82518b50 T acpisony_set_brightness +ffffffff82519000 T acpivideo_match +ffffffff82519070 T acpivideo_attach +ffffffff825191d0 T acpivideo_getpcibus +ffffffff82519210 T acpivideo_notify +ffffffff82519270 T acpivideo_set_policy +ffffffff82519340 T acpi_foundvout +ffffffff82519410 T acpivideo_print +ffffffff8251a000 T acpivout_match +ffffffff8251a070 T acpivout_attach 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aibs_find_cb +ffffffff8251d000 T aplgpio_match +ffffffff8251d060 T aplgpio_attach +ffffffff8251d300 T aplgpio_intr +ffffffff8251d440 T aplgpio_read_pin +ffffffff8251d490 T aplgpio_write_pin +ffffffff8251d500 T aplgpio_intr_establish +ffffffff8251d620 T aplgpio_intr_enable +ffffffff8251d6b0 T aplgpio_intr_disable +ffffffff8251e000 T bytgpio_match +ffffffff8251e060 T bytgpio_attach +ffffffff8251e320 T bytgpio_intr +ffffffff8251e450 T bytgpio_read_pin +ffffffff8251e4b0 T bytgpio_write_pin +ffffffff8251e530 T bytgpio_intr_establish +ffffffff8251e5a0 T bytgpio_intr_enable +ffffffff8251e690 T bytgpio_intr_disable +ffffffff8251f000 T chvgpio_match +ffffffff8251f060 T chvgpio_attach +ffffffff8251f300 T chvgpio_intr +ffffffff8251f3d0 T chvgpio_read_pin +ffffffff8251f480 T chvgpio_write_pin +ffffffff8251f540 T chvgpio_intr_establish +ffffffff8251f710 T chvgpio_intr_enable +ffffffff8251f7e0 T chvgpio_intr_disable +ffffffff8251f8b0 T chvgpio_opreg_handler +ffffffff8251f940 T chvgpio_check_pin +ffffffff82520000 T glkgpio_match +ffffffff82520060 T glkgpio_attach +ffffffff82520300 T glkgpio_intr +ffffffff82520440 T glkgpio_read_pin +ffffffff825204a0 T glkgpio_write_pin +ffffffff82520510 T glkgpio_intr_establish +ffffffff82520630 T glkgpio_intr_enable +ffffffff825206c0 T glkgpio_intr_disable +ffffffff82521000 T pchgpio_match +ffffffff82521060 T pchgpio_attach +ffffffff825214b0 T pchgpio_activate +ffffffff82521560 T pchgpio_intr +ffffffff82521780 T pchgpio_read_pin +ffffffff82521870 T pchgpio_write_pin +ffffffff82521980 T pchgpio_intr_establish +ffffffff82521bb0 T pchgpio_intr_enable +ffffffff82521cf0 T pchgpio_intr_disable +ffffffff82521e30 T pchgpio_save +ffffffff82521ea0 T pchgpio_restore +ffffffff82521f10 T pchgpio_find_group +ffffffff82521f90 T pchgpio_intr_handle +ffffffff82522070 T pchgpio_save_pin +ffffffff82522240 T pchgpio_restore_pin +ffffffff82523000 T tipmic_match +ffffffff82523050 T tipmic_attach +ffffffff82523250 T tipmic_write_1 +ffffffff82523310 T tipmic_intr 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sdhc_acpi_card_detect_gpio +ffffffff82527480 T sdhc_acpi_card_detect_intr +ffffffff825274c0 T sdhc_acpi_power_on +ffffffff82527540 T sdhc_acpi_explore +ffffffff82527570 T sdhc_acpi_card_detect_nonremovable +ffffffff825275a0 T sdhc_acpi_do_explore +ffffffff82528000 T dwiic_acpi_match +ffffffff82528050 T dwiic_acpi_attach +ffffffff82528410 T dwiic_acpi_parse_crs +ffffffff82528540 T dwiic_acpi_power +ffffffff82528650 T dwiic_acpi_get_params +ffffffff82528790 T dwiic_i2c_intr_establish +ffffffff82528810 T dwiic_i2c_intr_disestablish +ffffffff82528830 T dwiic_i2c_intr_string +ffffffff825288c0 T dwiic_acpi_acquire_bus +ffffffff82528910 T dwiic_acpi_release_bus +ffffffff82528940 T dwiic_acpi_bus_scan +ffffffff82528980 T dwiic_acpi_found_hid +ffffffff82528e40 T dwiic_matchhids +ffffffff82528ed0 T dwiic_acpi_found_ihidev +ffffffff82529150 T dwiic_acpi_found_iatp +ffffffff825292b0 T dwiic_acpi_found_ietp +ffffffff8252a000 T acpicbkbd_match +ffffffff8252a030 T acpicbkbd_attach +ffffffff8252a0d0 T acpicbkbd_activate +ffffffff8252a120 T acpicbkbd_get_backlight +ffffffff8252a1a0 T acpicbkbd_set_backlight +ffffffff8252a240 T acpicbkbd_write_backlight +ffffffff8252b000 T acpials_match +ffffffff8252b090 T acpials_attach +ffffffff8252b230 T acpials_read +ffffffff8252b2b0 T acpials_addtask +ffffffff8252b2f0 T acpials_notify +ffffffff8252b380 T acpials_update +ffffffff8252c000 T tpm_match +ffffffff8252c050 T tpm_attach +ffffffff8252c320 T tpm_activate +ffffffff8252c430 T tpm2_start_method +ffffffff8252c4b0 T tpm_probe +ffffffff8252c560 T tpm_init_tis +ffffffff8252c7d0 T tpm_init_crb +ffffffff8252cb10 T tpm_suspend +ffffffff8252cc00 T tpm_resume +ffffffff8252cc30 T tpm_write_tis +ffffffff8252cfb0 T tpm_read_tis +ffffffff8252d190 T tpm_write_crb +ffffffff8252d5a0 T tpm_read_crb +ffffffff8252d8a0 T tpm_request_locality_tis +ffffffff8252d990 T tpm_request_locality_crb +ffffffff8252da90 T tpm_release_locality_crb +ffffffff8252dae0 T tpm_release_locality_tis +ffffffff8252db50 T tpm_getburst +ffffffff8252dc00 T tpm_status +ffffffff8252dc20 T tpm_waitfor +ffffffff8252dd00 T tpm_waitfor_status +ffffffff8252e000 T acpihve_match +ffffffff8252e0b0 T acpihve_attach +ffffffff8252f000 T acpisbs_match +ffffffff8252f030 T acpisbs_attach +ffffffff8252f2a0 T acpisbs_activate +ffffffff8252f380 T acpisbs_read +ffffffff8252f440 T acpisbs_setup_sensors +ffffffff8252f560 T acpisbs_refresh_sensors +ffffffff8252f6d0 T acpisbs_notify +ffffffff8252f810 T acpi_smbus_read +ffffffff82530000 T surface_match +ffffffff82530060 T surface_attach +ffffffff825300c0 T surface_hotkey +ffffffff82531000 T ipmi_acpi_match +ffffffff82531030 T ipmi_acpi_attach +ffffffff82531260 T ipmi_acpi_parse_crs +ffffffff82532000 T amdgpio_match +ffffffff82532060 T amdgpio_attach +ffffffff825322a0 T amdgpio_activate +ffffffff82532390 T amdgpio_intr +ffffffff82532530 T amdgpio_read_pin +ffffffff82532580 T amdgpio_write_pin +ffffffff825325f0 T amdgpio_intr_establish +ffffffff825326e0 T amdgpio_intr_enable +ffffffff82532760 T amdgpio_intr_disable +ffffffff825327e0 T amdgpio_save +ffffffff82532860 T amdgpio_restore +ffffffff825328f0 T amdgpio_save_pin +ffffffff82532960 T amdgpio_restore_pin +ffffffff825329d0 T amdgpio_pin_intr +ffffffff82533000 T acpihid_match +ffffffff82533030 T acpihid_attach +ffffffff82533210 T acpihid_init_dsm +ffffffff82533370 T acpihid_eval +ffffffff82533590 T acpihid_notify +ffffffff825335f0 T acpihid_button_array_enable +ffffffff82534000 t iosf_acpi_match +ffffffff82534050 t iosf_acpi_attach +ffffffff82534140 t iosf_acpi_mbi_mdr_rd +ffffffff825341b0 t iosf_acpi_mbi_mdr_wr +ffffffff82535000 T acpi_match +ffffffff82535060 T acpi_attach +ffffffff825350a0 T acpi_probe +ffffffff82535240 T acpi_map +ffffffff82535330 T acpi_unmap +ffffffff82535380 T acpi_bus_space_map +ffffffff825353a0 T acpi_bus_space_unmap +ffffffff825353c0 T acpi_intr_establish +ffffffff82535510 T acpi_intr_disestablish +ffffffff82535520 T acpi_scan +ffffffff825356d0 T acpi_acquire_glk +ffffffff82535730 T acpi_release_glk +ffffffff82535780 T acpi_attach_machdep +ffffffff82535910 T acpi_sleep_cpu +ffffffff82535ab0 T acpi_resume_cpu +ffffffff82535bb0 T sleep_mp +ffffffff82535cb0 T resume_mp +ffffffff82535da0 T acpi_iommu_device_map +ffffffff82536000 T hibernate_resume_machdep +ffffffff82536050 T hibernate_drop_to_real_mode +ffffffff82536060 T hibernate_activate_resume_pt_machdep +ffffffff825360a0 T hibernate_switch_stack_machdep +ffffffff825360e0 T hibernate_flush +ffffffff82536110 T acpi_savecpu +ffffffff82537000 T sleep_showstate +ffffffff82537100 T sleep_setstate +ffffffff82537160 T gosleep +ffffffff82537220 T sleep_abort +ffffffff82537250 T sleep_resume +ffffffff825372c0 T suspend_finish +ffffffff82538000 T acpiopen +ffffffff825380d0 T acpiclose +ffffffff82538160 T acpiioctl +ffffffff825382d0 T request_sleep +ffffffff82538350 T acpi_filtdetach +ffffffff825383a0 T acpi_filtread +ffffffff825383e0 T acpikqfilter +ffffffff82539000 T acpipci_match +ffffffff82539030 T acpipci_attach +ffffffff825392f0 T acpipci_osc +ffffffff82539430 T acpipci_parse_resources +ffffffff82539540 T acpipci_attach_bus +ffffffff82539710 T acpipci_print +ffffffff82539780 T acpipci_attach_busses +ffffffff8253a000 T efiopen +ffffffff8253a040 T eficlose +ffffffff8253a070 T efiioctl +ffffffff8253a110 T efiioc_get_table +ffffffff8253a270 T efiioc_var_get +ffffffff8253a4f0 T efiioc_var_next +ffffffff8253a710 T efiioc_var_set +ffffffff8253a9c0 T efi_adapt_error +ffffffff8253b000 T efi_match +ffffffff8253b060 T efi_attach +ffffffff8253b330 T efi_map_runtime +ffffffff8253b4b0 T efi_enter +ffffffff8253b550 T efi_leave +ffffffff8253b5d0 T efi_fault +ffffffff8253c000 T vmm_probe +ffffffff8253c050 T vmm_attach +ffffffff8253c170 T vmm_activate +ffffffff8253c2b0 T vmmopen +ffffffff8253c300 T vmmclose +ffffffff8253c330 T vm_find +ffffffff8253c450 T vmmioctl +ffffffff8253c6d0 T vm_create +ffffffff8253ca80 T vm_get_info +ffffffff8253ccd0 T vm_terminate +ffffffff8253ce40 T vm_resetcpu +ffffffff8253cf60 T vm_share_mem +ffffffff8253d0b0 T pledge_ioctl_vmm +ffffffff8253d1a0 T vm_find_vcpu +ffffffff8253d200 T vm_create_check_mem_ranges +ffffffff8253d360 T vm_teardown +ffffffff8253d4a0 T vcpu_must_stop +ffffffff8253e000 T vmm_enabled +ffffffff8253e090 T vmm_attach_machdep +ffffffff8253e250 T vmm_quiesce_vmx +ffffffff8253e420 T vmm_activate_machdep +ffffffff8253e540 T vmm_stop +ffffffff8253e680 T vmm_start +ffffffff8253e760 T vmmioctl_machdep +ffffffff8253e830 T vm_intr_pending +ffffffff8253e8d0 T vm_mprotect_ept +ffffffff8253eb70 T pledge_ioctl_vmm_machdep +ffffffff8253ebc0 T vm_rwvmparams +ffffffff8253ed50 T vmm_init_pvclock +ffffffff8253ee30 T vm_rwregs +ffffffff8253ef40 T vcpu_readregs_vmx +ffffffff8253f370 T vcpu_writeregs_vmx +ffffffff8253f7e0 T vcpu_readregs_svm +ffffffff8253fc90 T vcpu_writeregs_svm +ffffffff82540160 T vmm_get_guest_memtype +ffffffff825401e0 T vmx_mprotect_ept +ffffffff82540460 T vmx_pmap_find_pte_ept +ffffffff82540530 T start_vmm_on_cpu +ffffffff82540610 T stop_vmm_on_cpu +ffffffff825406b0 T vmclear_on_cpu +ffffffff82540730 T vm_impl_init_vmx +ffffffff82540850 T vm_impl_init_svm +ffffffff82540970 T vm_impl_init +ffffffff82540a10 T vm_impl_deinit +ffffffff82540a40 T vcpu_reload_vmcs_vmx +ffffffff82540b80 T vcpu_reset_regs_svm +ffffffff82540f10 T svm_setmsrbrw +ffffffff82541080 T svm_setmsrbr +ffffffff82541150 T vmm_alloc_vpid +ffffffff82541260 T svm_setmsrbw +ffffffff82541340 T vmx_setmsrbr +ffffffff825413f0 T vmx_setmsrbw +ffffffff825414a0 T vmx_setmsrbrw +ffffffff825415b0 T svm_set_clean +ffffffff82541600 T svm_set_dirty +ffffffff82541650 T vcpu_reset_regs_vmx +ffffffff82542200 T vcpu_vmx_check_cap +ffffffff82542300 T vcpu_vmx_compute_ctrl +ffffffff825424e0 T vcpu_init_vmx +ffffffff82542880 T vcpu_deinit_vmx +ffffffff82542a00 T vcpu_reset_regs +ffffffff82542a40 T vcpu_init_svm +ffffffff82542bd0 T vcpu_deinit_svm +ffffffff82542d10 T vcpu_init +ffffffff82542dd0 T vmm_free_vpid +ffffffff82542e40 T vcpu_deinit +ffffffff82542e80 T vm_run +ffffffff82543030 T vcpu_run_vmx +ffffffff825437e0 T vcpu_run_svm +ffffffff82543dc0 T vmm_fpurestore +ffffffff82543e80 T vmm_fpusave +ffffffff82543f00 T vmm_translate_gva +ffffffff82544220 T vmm_update_pvclock +ffffffff82544320 T vmx_get_exit_info +ffffffff82544380 T vmx_handle_exit +ffffffff825447c0 T vmx_instruction_error_decode +ffffffff82544990 T vmm_get_guest_cpu_cpl +ffffffff82544a80 T vmx_handle_intr +ffffffff82544b10 T svm_handle_hlt +ffffffff82544b60 T vmx_handle_hlt +ffffffff82544c10 T svm_handle_exit +ffffffff82544f30 T svm_handle_np_fault +ffffffff825450e0 T vmm_handle_cpuid +ffffffff82545770 T svm_handle_msr +ffffffff82545a30 T svm_handle_xsetbv +ffffffff82545ad0 T svm_handle_inout +ffffffff82545bf0 T vmm_inject_ud +ffffffff82545c20 T vmm_inject_db +ffffffff82545c50 T vmx_handle_np_fault +ffffffff82545dd0 T vmx_handle_inout +ffffffff82545f70 T vmx_handle_cr +ffffffff825461e0 T vmx_handle_rdmsr +ffffffff825462b0 T vmx_handle_wrmsr +ffffffff82546510 T vmx_handle_xsetbv +ffffffff825465e0 T vmm_inject_gp +ffffffff82546610 T vmx_get_exit_qualification +ffffffff82546670 T vmx_get_guest_faulttype +ffffffff82546710 T svm_get_guest_faulttype +ffffffff82546740 T svm_fault_page +ffffffff825467d0 T vmx_fault_page +ffffffff82546930 T vmm_get_guest_cpu_mode +ffffffff82546a30 T vmx_load_pdptes +ffffffff82546cb0 T vmx_handle_cr0_write +ffffffff82546ec0 T vmx_handle_cr4_write +ffffffff82546f60 T vmm_handle_xsetbv +ffffffff82546ff0 T vmx_handle_misc_enable_msr +ffffffff82547050 T vmm_pat_is_valid +ffffffff82547130 T vmm_gpa_is_valid +ffffffff825471a0 T vmx_exit_reason_decode +ffffffff825471e0 T svm_exit_reason_decode +ffffffff82547ff0 T vcpu_state_decode +ffffffff82549000 T vmm_dispatch_intr +ffffffff82549020 T vmxon +ffffffff82549050 T vmxoff +ffffffff82549080 T vmclear +ffffffff825490b0 T vmptrld +ffffffff825490e0 T vmptrst +ffffffff82549110 T vmwrite +ffffffff82549140 T vmread +ffffffff82549170 T invvpid +ffffffff825491a0 T invept +ffffffff825491d0 T vmx_enter_guest +ffffffff825491fb t skip_init +ffffffff825492c8 t no_l1df_msr +ffffffff825492cb t l1df_tlb_loop +ffffffff825492e4 t l1df_tlb_done +ffffffff825492ec t l1df_load_cache +ffffffff82549303 t done_flush +ffffffff82549396 t do_resume +ffffffff8254941b t fail_launch_or_resume +ffffffff8254945d t fail_launch_unknown +ffffffff8254946a t fail_launch_invalid_vmcs +ffffffff82549477 t fail_launch_valid_vmcs +ffffffff82549494 t vmx_exit_handler_asm +ffffffff82549559 t restore_host +ffffffff825495f0 T svm_enter_guest +ffffffff82549780 t restore_host_svm +ffffffff8254a000 T sdmmc_match +ffffffff8254a050 T sdmmc_attach +ffffffff8254a390 T sdmmc_detach +ffffffff8254a440 T sdmmc_activate +ffffffff8254a510 T sdmmc_discover_task +ffffffff8254a5d0 T sdmmc_create_thread +ffffffff8254a640 T sdmmc_holds_root_device +ffffffff8254a6a0 T sdmmc_task_thread +ffffffff8254a890 T sdmmc_needs_discover +ffffffff8254a940 T sdmmc_del_task +ffffffff8254a9f0 T sdmmc_card_detach +ffffffff8254aad0 T sdmmc_add_task +ffffffff8254ab50 T sdmmc_card_attach +ffffffff8254ac60 T sdmmc_enable +ffffffff8254adb0 T sdmmc_scan +ffffffff8254ae40 T sdmmc_init +ffffffff8254af40 T sdmmc_disable +ffffffff8254b0a0 T sdmmc_function_free +ffffffff8254b0c0 T sdmmc_delay +ffffffff8254b110 T sdmmc_select_card +ffffffff8254b290 T sdmmc_set_bus_power +ffffffff8254b450 T sdmmc_function_alloc +ffffffff8254b4e0 T sdmmc_app_command +ffffffff8254b670 T sdmmc_mmc_command +ffffffff8254b6f0 T sdmmc_go_idle_state +ffffffff8254b810 T sdmmc_send_if_cond +ffffffff8254b960 T sdmmc_set_relative_addr +ffffffff8254c000 T sdmmc_cisptr +ffffffff8254c0a0 T sdmmc_read_cis +ffffffff8254c3b0 T sdmmc_print_cis +ffffffff8254c520 T sdmmc_check_cis_quirks +ffffffff8254d000 T sdmmc_io_enable +ffffffff8254d2a0 T sdmmc_io_reset +ffffffff8254d3d0 T sdmmc_io_send_op_cond +ffffffff8254d540 T sdmmc_io_scan +ffffffff8254d690 T sdmmc_io_init +ffffffff8254d7c0 T sdmmc_io_set_highspeed +ffffffff8254da70 T sdmmc_io_set_bus_width +ffffffff8254dd00 T sdmmc_io_function_ready +ffffffff8254de80 T sdmmc_io_read_1 +ffffffff8254dfd0 T sdmmc_io_function_enable +ffffffff8254e3a0 T sdmmc_io_write_1 +ffffffff8254e520 T sdmmc_io_function_disable +ffffffff8254e7a0 T sdmmc_io_attach +ffffffff8254e890 T sdmmc_print +ffffffff8254eae0 T sdmmc_submatch +ffffffff8254eb60 T sdmmc_io_detach +ffffffff8254ec10 T sdmmc_io_rw_direct +ffffffff8254edb0 T sdmmc_io_rw_extended_subr +ffffffff8254ef50 T sdmmc_io_rw_extended +ffffffff8254f340 T sdmmc_io_read_2 +ffffffff8254f4a0 T sdmmc_io_write_2 +ffffffff8254f600 T sdmmc_io_read_4 +ffffffff8254f760 T sdmmc_io_write_4 +ffffffff8254f8c0 T sdmmc_io_read_multi_1 +ffffffff8254f9b0 T sdmmc_io_write_multi_1 +ffffffff8254faa0 T sdmmc_io_read_region_1 +ffffffff8254fb90 T sdmmc_io_write_region_1 +ffffffff8254fc80 T sdmmc_io_xchg +ffffffff8254fe10 T sdmmc_intr_enable +ffffffff82550080 T sdmmc_intr_disable +ffffffff825502f0 T sdmmc_intr_establish +ffffffff825503f0 T sdmmc_intr_disestablish +ffffffff825504e0 T sdmmc_card_intr +ffffffff82550530 T sdmmc_intr_task +ffffffff825505c0 T sdmmc_io_set_blocklen +ffffffff82551000 T sdmmc_mem_enable +ffffffff825514e0 T sdmmc_mem_send_op_cond +ffffffff82551690 T sdmmc_mem_signal_voltage +ffffffff82551750 T sdmmc_mem_scan +ffffffff82551a60 T sdmmc_decode_csd +ffffffff82551e70 T sdmmc_decode_cid +ffffffff825522b0 T sdmmc_mem_send_scr +ffffffff825523f0 T sdmmc_mem_decode_scr +ffffffff82552470 T sdmmc_mem_send_cxd_data +ffffffff825525e0 T sdmmc_mem_set_bus_width +ffffffff82552700 T sdmmc_mem_sd_switch +ffffffff825529b0 T sdmmc_be512_to_bitfield512 +ffffffff82552a60 T sdmmc_mem_mmc_switch +ffffffff82552b50 T sdmmc_mem_init +ffffffff82552ca0 T sdmmc_mem_set_blocklen +ffffffff82552da0 T sdmmc_mem_sd_init +ffffffff82553350 T sdmmc_mem_mmc_init +ffffffff82553c70 T sdmmc_mem_select_transfer_mode +ffffffff82553cf0 T sdmmc_mem_execute_tuning +ffffffff82553d80 T sdmmc_mem_read_block_subr +ffffffff825540e0 T sdmmc_mem_single_read_block +ffffffff825541b0 T sdmmc_mem_read_block +ffffffff82554370 T sdmmc_mem_write_block_subr +ffffffff825546c0 T sdmmc_mem_single_write_block +ffffffff82554790 T sdmmc_mem_write_block +ffffffff82554950 T sdmmc_mem_hibernate_write +ffffffff82555000 T sdmmc_scsi_cmd +ffffffff825551f0 T sdmmc_minphys +ffffffff82555270 T sdmmc_scsi_attach +ffffffff82555460 T sdmmc_alloc_ccbs +ffffffff825555a0 T sdmmc_free_ccbs +ffffffff82555600 T sdmmc_scsi_detach +ffffffff82555760 T sdmmc_stimeout +ffffffff825557e0 T sdmmc_ccb_alloc +ffffffff82555890 T sdmmc_ccb_free +ffffffff82555970 T sdmmc_inquiry +ffffffff82555be0 T sdmmc_start_xs +ffffffff82555cd0 T sdmmc_complete_xs +ffffffff82555da0 T sdmmc_done_xs +ffffffff82555df0 T sdmmc_scsi_hibernate_io +ffffffff82556000 T bwfm_sdio_preinit +ffffffff825564f0 T bwfm_sdio_txcheck +ffffffff82556530 T bwfm_sdio_txdata +ffffffff825565a0 T bwfm_sdio_txctl +ffffffff825566f0 T bwfm_sdio_buscore_read +ffffffff82556700 T bwfm_sdio_buscore_write +ffffffff82556720 T bwfm_sdio_buscore_prepare +ffffffff82556860 T bwfm_sdio_buscore_activate +ffffffff825568e0 T bwfm_sdio_match +ffffffff825569b0 T bwfm_sdio_attach +ffffffff82556c70 T bwfm_sdio_detach +ffffffff82556cd0 T bwfm_sdio_task +ffffffff82556e30 T bwfm_sdio_write_1 +ffffffff82556e60 T bwfm_sdio_read_1 +ffffffff82556e90 T bwfm_sdio_write_4 +ffffffff82556f40 T bwfm_sdio_read_4 +ffffffff82556ff0 T bwfm_sdio_load_microcode +ffffffff82557250 T bwfm_sdio_clkctl +ffffffff82557380 T bwfm_sdio_dev_write +ffffffff825573d0 T bwfm_sdio_intr +ffffffff82557410 T bwfm_sdio_ram_read_write +ffffffff82557640 T bwfm_sdio_htclk +ffffffff825578a0 T bwfm_sdio_readshared +ffffffff82557970 T bwfm_sdio_dev_read +ffffffff825579b0 T bwfm_sdio_rx_frames +ffffffff82557d40 T bwfm_sdio_tx_frames +ffffffff82557e20 T bwfm_sdio_backplane +ffffffff82557ed0 T bwfm_sdio_buf_read +ffffffff82557fb0 T bwfm_sdio_buf_write +ffffffff82558060 T bwfm_sdio_frame_read_write +ffffffff825581e0 T bwfm_sdio_newbuf +ffffffff82558260 T bwfm_sdio_tx_ok +ffffffff825582b0 T bwfm_sdio_tx_ctrlframe +ffffffff825583b0 T bwfm_sdio_tx_dataframe +ffffffff82558500 T bwfm_sdio_rx_glom +ffffffff82559000 T onewire_match +ffffffff82559050 T onewire_attach +ffffffff825590f0 T onewire_detach +ffffffff82559160 T onewire_activate +ffffffff82559180 T onewire_scan +ffffffff82559390 T onewire_createthread +ffffffff82559400 T onewire_print +ffffffff825594d0 T onewirebus_print +ffffffff82559520 T onewire_lock +ffffffff82559540 T onewire_unlock +ffffffff82559560 T onewire_reset +ffffffff82559580 T onewire_bit +ffffffff825595a0 T onewire_read_byte +ffffffff825596e0 T onewire_write_byte +ffffffff825597c0 T onewire_read_block +ffffffff82559860 T onewire_write_block +ffffffff82559900 T onewire_triplet +ffffffff825599e0 T onewire_matchrom +ffffffff82559b30 T onewire_search +ffffffff82559ec0 T onewire_thread +ffffffff8255a000 T onewire_crc +ffffffff8255a0e0 T onewire_crc16 +ffffffff8255a1c0 T onewire_famname +ffffffff8255a200 T onewire_matchbyfam +ffffffff8255b000 T owid_match +ffffffff8255b030 T owid_attach +ffffffff8255b100 T owid_detach +ffffffff8255b140 T owid_activate +ffffffff8255c000 T owsbm_match +ffffffff8255c030 T owsbm_attach +ffffffff8255c1d0 T owsbm_detach +ffffffff8255c240 T owsbm_activate +ffffffff8255c270 T owsbm_update +ffffffff8255d000 T owtemp_match +ffffffff8255d030 T owtemp_attach +ffffffff8255d130 T owtemp_detach +ffffffff8255d1a0 T owtemp_activate +ffffffff8255d1d0 T owtemp_update +ffffffff8255e000 T owctr_match +ffffffff8255e030 T owctr_attach +ffffffff8255e180 T owctr_detach +ffffffff8255e1f0 T owctr_activate +ffffffff8255e220 T owctr_update +ffffffff8255e250 T owctr_update_counter +ffffffff8255f000 A __text_page_start +ffffffff8255f000 T Xsyscall_meltdown +ffffffff8255f00c T Xsyscall +ffffffff8255f26e t Xsyscall_trampback +ffffffff8255f280 T intr_user_exit +ffffffff8255f2c2 t intr_user_exit_post_ast +ffffffff8255f3ee t Xiretq_trampback +ffffffff8255f3fa T doreti_iret +ffffffff82560000 T alltraps +ffffffff82560138 T recall_trap +ffffffff82560150 T alltraps_kern +ffffffff82560153 T alltraps_kern_meltdown +ffffffff82561000 ? Xsyscall32 +ffffffff82561000 A __kutext_start +ffffffff82561000 A __text_page_end +ffffffff82562000 ? Xtrap00 +ffffffff82562010 ? Xtrap01 +ffffffff82562020 ? Xtrap02 +ffffffff82562028 c calltrap_specstk +ffffffff825620f0 ? calltrap_specstk_tramp +ffffffff82562110 ? Xtrap03 +ffffffff82562120 ? Xtrap04 +ffffffff82562130 ? Xtrap05 +ffffffff82562140 ? Xtrap06 +ffffffff82562150 ? Xtrap07 +ffffffff82562160 ? Xtrap08 +ffffffff82562170 ? Xtrap09 +ffffffff82562180 ? Xtrap0a +ffffffff82562190 ? Xtrap0b +ffffffff825621a0 ? Xtrap0c +ffffffff825621b0 ? Xtrap0d +ffffffff82562240 ? Xtrap0e +ffffffff82562250 ? Xintrspurious +ffffffff82562250 ? Xtrap0f +ffffffff82562260 ? Xtrap10 +ffffffff82562270 ? Xtrap11 +ffffffff82562280 ? Xtrap12 +ffffffff82562290 ? Xtrap13 +ffffffff825622a0 ? Xtrap14 +ffffffff825622b0 ? Xtrap15 +ffffffff825622c0 ? Xtrap16 +ffffffff825622c0 ? Xtrap17 +ffffffff825622c0 ? Xtrap18 +ffffffff825622c0 ? Xtrap19 +ffffffff825622c0 ? Xtrap1a +ffffffff825622c0 ? Xtrap1b +ffffffff825622c0 ? Xtrap1c +ffffffff825622c0 ? Xtrap1d +ffffffff825622c0 ? Xtrap1e +ffffffff825622c0 ? Xtrap1f +ffffffff825622d0 ? x2apic_eoi +ffffffff825622f0 ? Xintr_lapic_ipi +ffffffff82562330 ? Xipi_invltlb +ffffffff82562360 ? Xipi_invlpg +ffffffff82562390 ? Xipi_invlrange +ffffffff825623d0 ? Xipi_invltlb_pcid +ffffffff82562410 ? Xipi_invlpg_pcid +ffffffff82562460 ? Xipi_invlrange_pcid +ffffffff825624d0 ? Xintr_lapic_ltimer +ffffffff82562510 ? Xintr_xen_upcall +ffffffff82562550 ? Xintr_hyperv_upcall +ffffffff82562590 ? Xintr_legacy0 +ffffffff825625d0 ? Xintr_legacy1 +ffffffff82562610 ? Xintr_legacy2 +ffffffff82562650 ? Xintr_legacy3 +ffffffff82562690 ? Xintr_legacy4 +ffffffff825626d0 ? Xintr_legacy5 +ffffffff82562710 ? Xintr_legacy6 +ffffffff82562750 ? Xintr_legacy7 +ffffffff82562790 ? Xintr_legacy8 +ffffffff825627d0 ? Xintr_legacy9 +ffffffff82562810 ? Xintr_legacy10 +ffffffff82562850 ? Xintr_legacy11 +ffffffff82562890 ? Xintr_legacy12 +ffffffff825628d0 ? Xintr_legacy13 +ffffffff82562910 ? Xintr_legacy14 +ffffffff82562950 ? Xintr_legacy15 +ffffffff82562990 ? Xintr_ioapic_edge0 +ffffffff825629d0 ? Xintr_ioapic_edge1 +ffffffff82562a10 ? Xintr_ioapic_edge2 +ffffffff82562a50 ? Xintr_ioapic_edge3 +ffffffff82562a90 ? Xintr_ioapic_edge4 +ffffffff82562ad0 ? Xintr_ioapic_edge5 +ffffffff82562b10 ? Xintr_ioapic_edge6 +ffffffff82562b50 ? Xintr_ioapic_edge7 +ffffffff82562b90 ? Xintr_ioapic_edge8 +ffffffff82562bd0 ? Xintr_ioapic_edge9 +ffffffff82562c10 ? Xintr_ioapic_edge10 +ffffffff82562c50 ? Xintr_ioapic_edge11 +ffffffff82562c90 ? Xintr_ioapic_edge12 +ffffffff82562cd0 ? Xintr_ioapic_edge13 +ffffffff82562d10 ? Xintr_ioapic_edge14 +ffffffff82562d50 ? Xintr_ioapic_edge15 +ffffffff82562d90 ? Xintr_ioapic_edge16 +ffffffff82562dd0 ? Xintr_ioapic_edge17 +ffffffff82562e10 ? Xintr_ioapic_edge18 +ffffffff82562e50 ? Xintr_ioapic_edge19 +ffffffff82562e90 ? Xintr_ioapic_edge20 +ffffffff82562ed0 ? Xintr_ioapic_edge21 +ffffffff82562f10 ? Xintr_ioapic_edge22 +ffffffff82562f50 ? Xintr_ioapic_edge23 +ffffffff82562f90 ? Xintr_ioapic_edge24 +ffffffff82562fd0 ? Xintr_ioapic_edge25 +ffffffff82563010 ? Xintr_ioapic_edge26 +ffffffff82563050 ? Xintr_ioapic_edge27 +ffffffff82563090 ? Xintr_ioapic_edge28 +ffffffff825630d0 ? Xintr_ioapic_edge29 +ffffffff82563110 ? Xintr_ioapic_edge30 +ffffffff82563150 ? Xintr_ioapic_edge31 +ffffffff82563190 ? Xintr_ioapic_edge32 +ffffffff825631d0 ? Xintr_ioapic_edge33 +ffffffff82563210 ? Xintr_ioapic_edge34 +ffffffff82563250 ? Xintr_ioapic_edge35 +ffffffff82563290 ? Xintr_ioapic_edge36 +ffffffff825632d0 ? Xintr_ioapic_edge37 +ffffffff82563310 ? Xintr_ioapic_edge38 +ffffffff82563350 ? Xintr_ioapic_edge39 +ffffffff82563390 ? Xintr_ioapic_edge40 +ffffffff825633d0 ? Xintr_ioapic_edge41 +ffffffff82563410 ? Xintr_ioapic_edge42 +ffffffff82563450 ? Xintr_ioapic_edge43 +ffffffff82563490 ? Xintr_ioapic_edge44 +ffffffff825634d0 ? Xintr_ioapic_edge45 +ffffffff82563510 ? Xintr_ioapic_edge46 +ffffffff82563550 ? Xintr_ioapic_edge47 +ffffffff82563590 ? Xintr_ioapic_edge48 +ffffffff825635d0 ? Xintr_ioapic_edge49 +ffffffff82563610 ? Xintr_ioapic_edge50 +ffffffff82563650 ? Xintr_ioapic_edge51 +ffffffff82563690 ? Xintr_ioapic_edge52 +ffffffff825636d0 ? Xintr_ioapic_edge53 +ffffffff82563710 ? Xintr_ioapic_edge54 +ffffffff82563750 ? Xintr_ioapic_edge55 +ffffffff82563790 ? Xintr_ioapic_edge56 +ffffffff825637d0 ? Xintr_ioapic_edge57 +ffffffff82563810 ? Xintr_ioapic_edge58 +ffffffff82563850 ? Xintr_ioapic_edge59 +ffffffff82563890 ? Xintr_ioapic_edge60 +ffffffff825638d0 ? Xintr_ioapic_edge61 +ffffffff82563910 ? Xintr_ioapic_edge62 +ffffffff82563950 ? Xintr_ioapic_edge63 +ffffffff82563990 ? Xintr_ioapic_level0 +ffffffff825639d0 ? Xintr_ioapic_level1 +ffffffff82563a10 ? Xintr_ioapic_level2 +ffffffff82563a50 ? Xintr_ioapic_level3 +ffffffff82563a90 ? Xintr_ioapic_level4 +ffffffff82563ad0 ? Xintr_ioapic_level5 +ffffffff82563b10 ? Xintr_ioapic_level6 +ffffffff82563b50 ? Xintr_ioapic_level7 +ffffffff82563b90 ? Xintr_ioapic_level8 +ffffffff82563bd0 ? Xintr_ioapic_level9 +ffffffff82563c10 ? Xintr_ioapic_level10 +ffffffff82563c50 ? Xintr_ioapic_level11 +ffffffff82563c90 ? Xintr_ioapic_level12 +ffffffff82563cd0 ? Xintr_ioapic_level13 +ffffffff82563d10 ? Xintr_ioapic_level14 +ffffffff82563d50 ? Xintr_ioapic_level15 +ffffffff82563d90 ? Xintr_ioapic_level16 +ffffffff82563dd0 ? Xintr_ioapic_level17 +ffffffff82563e10 ? Xintr_ioapic_level18 +ffffffff82563e50 ? Xintr_ioapic_level19 +ffffffff82563e90 ? Xintr_ioapic_level20 +ffffffff82563ed0 ? Xintr_ioapic_level21 +ffffffff82563f10 ? Xintr_ioapic_level22 +ffffffff82563f50 ? Xintr_ioapic_level23 +ffffffff82563f90 ? Xintr_ioapic_level24 +ffffffff82563fd0 ? Xintr_ioapic_level25 +ffffffff82564010 ? Xintr_ioapic_level26 +ffffffff82564050 ? Xintr_ioapic_level27 +ffffffff82564090 ? Xintr_ioapic_level28 +ffffffff825640d0 ? Xintr_ioapic_level29 +ffffffff82564110 ? Xintr_ioapic_level30 +ffffffff82564150 ? Xintr_ioapic_level31 +ffffffff82564190 ? Xintr_ioapic_level32 +ffffffff825641d0 ? Xintr_ioapic_level33 +ffffffff82564210 ? Xintr_ioapic_level34 +ffffffff82564250 ? Xintr_ioapic_level35 +ffffffff82564290 ? Xintr_ioapic_level36 +ffffffff825642d0 ? Xintr_ioapic_level37 +ffffffff82564310 ? Xintr_ioapic_level38 +ffffffff82564350 ? Xintr_ioapic_level39 +ffffffff82564390 ? Xintr_ioapic_level40 +ffffffff825643d0 ? Xintr_ioapic_level41 +ffffffff82564410 ? Xintr_ioapic_level42 +ffffffff82564450 ? Xintr_ioapic_level43 +ffffffff82564490 ? Xintr_ioapic_level44 +ffffffff825644d0 ? Xintr_ioapic_level45 +ffffffff82564510 ? Xintr_ioapic_level46 +ffffffff82564550 ? Xintr_ioapic_level47 +ffffffff82564590 ? Xintr_ioapic_level48 +ffffffff825645d0 ? Xintr_ioapic_level49 +ffffffff82564610 ? Xintr_ioapic_level50 +ffffffff82564650 ? Xintr_ioapic_level51 +ffffffff82564690 ? Xintr_ioapic_level52 +ffffffff825646d0 ? Xintr_ioapic_level53 +ffffffff82564710 ? Xintr_ioapic_level54 +ffffffff82564750 ? Xintr_ioapic_level55 +ffffffff82564790 ? Xintr_ioapic_level56 +ffffffff825647d0 ? Xintr_ioapic_level57 +ffffffff82564810 ? Xintr_ioapic_level58 +ffffffff82564850 ? Xintr_ioapic_level59 +ffffffff82564890 ? Xintr_ioapic_level60 +ffffffff825648d0 ? Xintr_ioapic_level61 +ffffffff82564910 ? Xintr_ioapic_level62 +ffffffff82564950 ? Xintr_ioapic_level63 +ffffffff82565000 ? codepatch_fill_nop +ffffffff82565000 A __cptext_start +ffffffff82565000 A __kutext_end +ffffffff825650b0 ? codepatch_maprw +ffffffff82565190 ? codepatch_unmaprw +ffffffff82565200 ? codepatch_nop +ffffffff82565360 ? codepatch_replace +ffffffff82565510 ? codepatch_call +ffffffff82565530 ? codepatch_jmp +ffffffff82566000 A __cptext_end +ffffffff82566000 A __rodata_start +ffffffff82566000 C _etext +ffffffff82566000 C etext +ffffffff82567000 r seeprom_read +ffffffff82567004 r icl_mg_pll_find_divisors.div1_vals +ffffffff82567028 r gen9bc_tgp_ddc_pin_map +ffffffff82567038 r athn_ac2qid +ffffffff82567038 r athn_ac2qid +ffffffff82567038 r athn_ac2qid +ffffffff82567044 r rtwn_get_rssi.cckoff +ffffffff8256706c r rsu_ac2qid +ffffffff8256707c r pckbc_portcmd +ffffffff82567080 r tht_fifo_write_pad.pad +ffffffff82567088 r rsu_get_rssi.cckoff +ffffffff8256709c r adlp_n_revids +ffffffff825670ec r apple_iso_trans +ffffffff825670f0 r dg2_g12_revid_step_tbl +ffffffff825670f8 r wihap_check_tx.txratetable +ffffffff825670fc r dmamode +ffffffff82567124 r gen9_edram_size_mb.sets +ffffffff82568000 r isomappings +ffffffff82568080 r unimappings +ffffffff82568230 r replacements +ffffffff8256bc00 r cmd0646_9_tim_udma +ffffffff825bfed8 r pp_r600_decoded_lanes +ffffffff825db378 r cmd680_setup_channel.udma_tbl +ffffffff825e3087 r apollo_udma33_tim +ffffffff825e917e r substchar +ffffffff825eb2b3 r apollo_udma100_tim +ffffffff82612dde r apollo_udma66_tim +ffffffff8261a337 r apollo_pio_rec +ffffffff826298bb r cy_pio_rec +ffffffff826591ee r apollo_udma133_tim +ffffffff82665ee8 R drm_ca +ffffffff82665f10 R drm_filtops +ffffffff82665f40 R drmread_filtops +ffffffff82666000 r vga_emulops +ffffffff82666048 R vga_stdscreen +ffffffff82666078 R vga_stdscreen_mono +ffffffff826660a8 R vga_stdscreen_bf +ffffffff826660d8 R vga_40lscreen +ffffffff82666108 R vga_40lscreen_mono +ffffffff82666138 R vga_40lscreen_bf +ffffffff82666168 R vga_50lscreen +ffffffff82666198 R vga_50lscreen_mono +ffffffff826661c8 R vga_50lscreen_bf +ffffffff826661f8 R vga_screenlist +ffffffff82666208 R vga_screenlist_mono +ffffffff82666218 R vga_accessops +ffffffff82666278 r i945_wm_info +ffffffff826662b8 r bgansitopc +ffffffff826662c0 r pctoansi +ffffffff82666300 r sdma_offsets +ffffffff82666300 r sdma_offsets +ffffffff82666338 r iha_rate_tbl +ffffffff82666370 r i830_a_wm_info +ffffffff826663a8 r gen9_edram_size_mb.ways +ffffffff82666408 r aggr_periodic_times +ffffffff82666490 r jsl_ehl_revids +ffffffff82666508 r michael_final.pad +ffffffff82666530 r rt_copysa.maskarray +ffffffff82666538 r i915_wm_info +ffffffff82666540 r amdgpu_ih_clientid_jpeg +ffffffff82666540 r amdgpu_ih_clientid_uvds +ffffffff82666540 r amdgpu_ih_clientid_vcns +ffffffff82666540 r amdgpu_ih_clientid_vcns +ffffffff82666540 r amdgpu_ih_clientid_vcns +ffffffff82666578 r vga_setfontset.cmaptabb +ffffffff82666590 r tgl_revids +ffffffff826665e8 r i830_bc_wm_info +ffffffff82666658 r hsw_activate_psr2.map +ffffffff82666690 r __drm_universal_plane_init.default_modifiers +ffffffff826666a0 r iwn_tid2fifo +ffffffff826666b8 r vga_setfontset.cmaptaba +ffffffff826666c0 r crtc_offsets +ffffffff826666c0 r crtc_offsets +ffffffff826666c0 r crtc_offsets +ffffffff826666e0 r link_speed +ffffffff826666e0 r link_speed +ffffffff826666e0 r link_speed +ffffffff82666760 r rtwn_r88e_get_rssi.cckoff +ffffffff82667000 R edid_vendors +ffffffff826672c0 R edid_nvendors +ffffffff826672d0 R edid_products +ffffffff82667330 R edid_nproducts +ffffffff82667340 r _edid_modes +ffffffff82668000 R videomode_list +ffffffff82669080 R videomode_count +ffffffff8266a000 r ahc_hard_errors +ffffffff8266a080 r critical_sections +ffffffff8266a0b0 r patches +ffffffff8266ad50 r seqprog +ffffffff8266c000 r ahc_switch +ffffffff8266d000 r termstat_strings +ffffffff8266d020 r critical_sections +ffffffff8266d060 r seqprog +ffffffff8266dd50 r patches +ffffffff8266f000 r ahd_switch +ffffffff82670000 R aic_switch +ffffffff82671000 R adw_switch +ffffffff82672000 R gdt_switch +ffffffff82673000 R twe_switch +ffffffff82674000 R ciss_switch +ffffffff82674030 R ciss_level +ffffffff82674050 R ciss_stat +ffffffff82675000 R ami_switch +ffffffff82675028 R ami_raw_switch +ffffffff82676000 R mfi_switch +ffffffff82676028 R mfi_pd_switch +ffffffff82676050 r mfi_iop_xscale +ffffffff82676080 r mfi_iop_ppc +ffffffff826760b0 r mfi_iop_gen2 +ffffffff826760e0 r mfi_iop_skinny +ffffffff82676110 r mfi_bbu_indicators +ffffffff82677000 R qlw_switch +ffffffff82678000 R isp_2100_risc_code +ffffffff8268abf0 R isp_2200_risc_code +ffffffff8269d990 R isp_2300_risc_code +ffffffff826b7408 R qla_switch +ffffffff826b7430 r qla_regs_2100 +ffffffff826b7460 r qla_regs_2200 +ffffffff826b7490 r qla_regs_23XX +ffffffff826b8000 R ahci_atascsi_methods +ffffffff826b9000 R nvme_switch +ffffffff826b9028 r nvme_ops +ffffffff826ba000 R mpi_switch +ffffffff826ba060 r bwi_rf_calc_nrssi_slope_11b.save_phy_regs +ffffffff826ba090 r chv_oa_mux_regs +ffffffff826ba0b0 r fiji_clock_stretcher_lookup_table +ffffffff826ba0b0 r tonga_clock_stretcher_lookup_table +ffffffff826ba0d0 r iosf_pci_devices +ffffffff826ba0f0 r link_speed +ffffffff826ba0f0 r link_speed +ffffffff826ba0f0 r link_speed +ffffffff826ba130 r drm_fb_xfrm.default_dst_pitch +ffffffff826ba130 r non_supported_protection +ffffffff826ba230 r tgl_uy_revids +ffffffff826ba280 r bwi_phy_noise_11g_rev1 +ffffffff826ba300 r cardslot_process_event.antonym_ev +ffffffff826ba390 r gen11_oa_mux_regs +ffffffff826ba480 r ddr2_cycle_tenths +ffffffff826ba4f0 r rtw_intr_rx.ratetbl +ffffffff826ba570 r abm_config +ffffffff826ba5e0 r getbootinfo.ports +ffffffff826ba630 r reg_offsets +ffffffff826ba640 r bwi_rf_lo_measure_11g.rf_lo_adjust +ffffffff826ba650 r init_non_clock_fields.look_up +ffffffff826ba660 r uftdi_8u232am_getrate.roundoff +ffffffff826ba6b0 r zyd_rx_data.rates +ffffffff826ba6d0 r ieee80211_ra_valid_tx_mcs.max_mcs +ffffffff826ba710 r mmio_invalidate_full.gen8_regs +ffffffff826ba740 r bwi_phy_noise_11g +ffffffff826ba750 r hpt366_pio +ffffffff826ba780 r glk_revids +ffffffff826ba7c0 r bwi_rf_calc_nrssi_slope_11g.save_phy3_regs +ffffffff826ba7e0 r ether_crc32_be_update.rev +ffffffff826ba7e0 r rtw_grf5101_mac_crypt.caesar +ffffffff826ba830 r snb_b_fdi_train_param +ffffffff826ba900 r intel_hpll_vco.elk_vco +ffffffff826ba960 r pin_offsets +ffffffff826ba9c0 r firmware_list +ffffffff826baa20 r atom_arg_shift +ffffffff826baa20 r atom_arg_shift +ffffffff826baa60 r pf_syncookie_wstab +ffffffff826baa80 r ieee80211_media_init.mopts +ffffffff826baae0 r add_entropy_words.twist_table +ffffffff826bab80 r urtw_8225v2_txpwr_cck +ffffffff826baba0 r bwfm_pci_prio2fifo +ffffffff826baba0 r ieee80211_up_to_ac.up_to_ac +ffffffff826bac60 r paritytab +ffffffff826bac60 r x86emu_parity_tab +ffffffff826bac80 r legacy_connector_convert +ffffffff826bacc0 r gen7_oa_mux_regs +ffffffff826bace0 r hsw_oa_mux_regs +ffffffff826bad00 r notetab +ffffffff826bad20 r urtw_8225v2_txpwr_cck_ch14 +ffffffff826bad40 r bwi_rf_calibval.rf_calibvals +ffffffff826bade0 r pf_syncookie_msstab +ffffffff826bae40 r xgmi3x16_pcs_err_status_reg_aldebaran +ffffffff826baea0 r uath_wme_init.uath_wme_11g +ffffffff826baec0 r gen7_oa_b_counters +ffffffff826bb020 r icl_revids +ffffffff826bb0e0 r rtwn_iq_calib_run.reg_adda +ffffffff826bb120 r atom_def_dst +ffffffff826bb120 r atom_def_dst +ffffffff826bb160 r sha256_initial_hash_value +ffffffff826bb1c0 r otus_edca_def +ffffffff826bb1e0 r intel_hpll_vco.blb_vco +ffffffff826bb2a0 r epic_pci_subsys_info +ffffffff826bb2c0 r atom_arg_mask +ffffffff826bb2c0 r atom_arg_mask +ffffffff826bb320 r butmap +ffffffff826bb360 r GFX_RLC_SRM_INDEX_CNTL_DATA_OFFSETS +ffffffff826bb3a0 r comsoft.lsrmap +ffffffff826bb3e0 r tulip_mii_phy_readspecific.table +ffffffff826bb400 r kbl_revids +ffffffff826bb4a0 r intel_hpll_vco.pnv_vco +ffffffff826bb500 r dmapageport +ffffffff826bb5c0 r intel_hpll_vco.ctg_vco +ffffffff826bb680 r drm_calculate_luminance_range.pre_computed_values +ffffffff826bc000 R sili_atascsi_methods +ffffffff826bd000 R ncr53c9x_switch +ffffffff826be000 r scf_period +ffffffff826bf000 R siop_script +ffffffff826bf5a0 R lun_switch +ffffffff826bf5d0 R tag_switch +ffffffff826bf660 R load_dsa +ffffffff826bf6c4 R siop_led_on +ffffffff826bf6cc R siop_led_off +ffffffff826bf6d8 R siop_switch +ffffffff826c0000 R ep_vortex_media +ffffffff826c0100 R ep_default_to_media +ffffffff826c1000 R wi_card_ident +ffffffff826c3000 R ucode_table +ffffffff826c4000 r re_revisions +ffffffff826c4290 r re_kstats_tpl +ffffffff826c6000 R smc91cxx_media +ffffffff826c6010 R smc91cxx_mii_bitbang_ops +ffffffff826c7000 R dl10019_mii_bitbang_ops +ffffffff826c7028 R dl10022_mii_bitbang_ops +ffffffff826c8000 R ax88190_mii_bitbang_ops +ffffffff826ca000 R ac97_audio_default +ffffffff826ca020 R ac97_on_off +ffffffff826ca324 R ac97_mic_select +ffffffff826ca628 R ac97_mono_select +ffffffff826ca92c R ac97_source +ffffffff826cac30 R ac97_volume_stereo +ffffffff826cac4c R ac97_volume_mono +ffffffff826cac70 R source_info +ffffffff826cb470 R ac97_ad +ffffffff826cb580 R ac97_ak +ffffffff826cb610 R ac97_av +ffffffff826cb750 R ac97_rl +ffffffff826cb7a0 R ac97_cm +ffffffff826cb820 R ac97_cr +ffffffff826cb840 R ac97_cs +ffffffff826cb920 R ac97_cx +ffffffff826cb980 R ac97_dt +ffffffff826cb9a0 R ac97_em +ffffffff826cb9d0 R ac97_es +ffffffff826cb9f0 R ac97_is +ffffffff826cba10 R ac97_ic +ffffffff826cba90 R ac97_it +ffffffff826cbac0 R ac97_ns +ffffffff826cbb80 R ac97_ps +ffffffff826cbbb0 R ac97_sl +ffffffff826cbbd0 R ac97_st +ffffffff826cbd20 R ac97_vi +ffffffff826cbd50 R ac97_tt +ffffffff826cbdd0 R ac97_ti +ffffffff826cbdf0 R ac97_wb +ffffffff826cbe10 R ac97_wo +ffffffff826cbea0 R ac97_ym +ffffffff826cbef0 R ac97_vendors +ffffffff826cc1f0 R ac97enhancement +ffffffff826cc2f0 R ac97feature +ffffffff826cd000 R lm_chips +ffffffff826cd020 R lm78_sensors +ffffffff826cd1a0 R w83627hf_sensors +ffffffff826cd3a0 R w83627ehf_sensors +ffffffff826cd5c0 R w83627dhg_sensors +ffffffff826cd7c0 R nct6776f_sensors +ffffffff826cda00 R nct6779d_sensors +ffffffff826cdd60 R w83637hf_sensors +ffffffff826cdf20 R w83697hf_sensors +ffffffff826ce0c0 R w83781d_sensors +ffffffff826ce280 R w83782d_sensors +ffffffff826ce480 R w83783s_sensors +ffffffff826ce600 R w83791d_sensors +ffffffff826ce860 R w83792d_sensors +ffffffff826ceae0 R as99127f_sensors +ffffffff826cf000 r ar5k_known_products +ffffffff826cf110 r ar5111_gain_opt +ffffffff826cf1e0 r ar5112_gain_opt +ffffffff826cf2b0 r ar5k_5ghz_channels +ffffffff826cfa00 r ar5k_2ghz_channels +ffffffff826cff10 r ar5111_rf +ffffffff826d0350 r ar5112a_rf +ffffffff826d0890 r ar5112_rf +ffffffff826d0da0 r ar5413_rf +ffffffff826d11b0 r ar2413_rf +ffffffff826d14d0 r ar2425_rf +ffffffff826d1830 r ar5111_rfg +ffffffff826d1b30 r ar5112_rfg +ffffffff826d1e30 r ar5413_rfg +ffffffff826d2130 r ar2413_rfg +ffffffff826d2430 r ar5k_rt_11a +ffffffff826d2552 r ar5k_rt_11b +ffffffff826d2674 r ar5k_rt_11g +ffffffff826d2796 r ar5k_rt_xr +ffffffff826d3000 r ar5210_ini +ffffffff826d4000 r ar5211_mode +ffffffff826d42c0 r ar5211_ini +ffffffff826d4ad0 r ar5211_rf +ffffffff826d5000 r ar5212_pcie +ffffffff826d5080 r ar5212_mode +ffffffff826d5310 r ar5212_ini +ffffffff826d5c80 r ar5212_ar5111_mode +ffffffff826d5f20 r ar5212_ar5112_mode +ffffffff826d61b0 r ar5413_mode +ffffffff826d6b10 r ar2413_mode +ffffffff826d7430 r ar2425_mode +ffffffff826d7d90 r ar5111_bbgain +ffffffff826d8090 r ar5112_bbgain +ffffffff826d9000 r athn_5ghz_chans +ffffffff826d9020 r athn_rates +ffffffff826da000 r athn_rates +ffffffff826db000 r ar9160_ini +ffffffff826db068 r ar5416_ini +ffffffff826db0d0 r ar5416_serdes +ffffffff826db0e8 r ar9160_1_1_addac +ffffffff826db0f8 r ar9160_1_0_addac +ffffffff826db108 r ar5416_2_2_addac +ffffffff826db118 r ar5416_2_1_addac +ffffffff826db128 r ar5416_set_power_calib.chainoffset +ffffffff826db140 r ar9160_bank6tpc_vals +ffffffff826db1c0 r ar5416_bank6tpc_vals +ffffffff826db240 r ar5416_bb_rfgain_vals_2g +ffffffff826db340 r ar5416_bb_rfgain_vals_5g +ffffffff826db440 r ar5416_bank6_vals +ffffffff826db4c0 r ar9160_regs +ffffffff826db540 r ar9160_vals_5g20 +ffffffff826db640 r ar9160_vals_5g40 +ffffffff826db740 r ar9160_vals_2g40 +ffffffff826db840 r ar9160_vals_2g20 +ffffffff826db940 r ar9160_cm_regs +ffffffff826dbc30 r ar9160_cm_vals +ffffffff826dc210 r ar5416_regs +ffffffff826dc290 r ar5416_vals_5g20 +ffffffff826dc390 r ar5416_vals_5g40 +ffffffff826dc490 r ar5416_vals_2g40 +ffffffff826dc590 r ar5416_vals_2g20 +ffffffff826dc690 r ar5416_cm_regs +ffffffff826dc980 r ar5416_cm_vals +ffffffff826dcf60 r ar5416_serdes_regs +ffffffff826dcf90 r ar5416_serdes_vals +ffffffff826dcfc0 r ar9160_1_1_addac_vals +ffffffff826dd040 r ar9160_1_0_addac_vals +ffffffff826dd0c0 r ar5416_2_2_addac_vals +ffffffff826dd150 r ar5416_2_1_addac_vals +ffffffff826de000 r ar9280_2_0_ini +ffffffff826de068 r ar9280_2_0_serdes +ffffffff826de080 r ar9280_2_0_rx_gain_23db_backoff +ffffffff826de0a0 r ar9280_2_0_rx_gain_13db_backoff +ffffffff826de0c0 r ar9280_2_0_rx_gain +ffffffff826de0e0 r ar9280_2_0_tx_gain_high_power +ffffffff826de100 r ar9280_2_0_tx_gain +ffffffff826de120 r ar9280_init_from_rom.chainoffset +ffffffff826de130 r ar9280_2_0_regs +ffffffff826de190 r ar9280_2_0_vals_5g20 +ffffffff826de250 r ar9280_2_0_vals_5g40 +ffffffff826de310 r ar9280_2_0_vals_2g40 +ffffffff826de3d0 r ar9280_2_0_vals_2g20 +ffffffff826de490 r ar9280_2_0_cm_regs +ffffffff826de740 r ar9280_2_0_cm_vals +ffffffff826dec90 r ar9280_2_0_fast_clock_regs +ffffffff826decb0 r ar9280_2_0_fast_clock_vals_5g20 +ffffffff826decf0 r ar9280_2_0_fast_clock_vals_5g40 +ffffffff826ded30 r ar9280_2_0_serdes_regs +ffffffff826ded60 r ar9280_2_0_serdes_vals +ffffffff826ded90 r ar9280_2_0_rx_gain_regs +ffffffff826deea0 r ar9280_2_0_rx_gain_23db_backoff_vals_5g +ffffffff826df0b0 r ar9280_2_0_rx_gain_23db_backoff_vals_2g +ffffffff826df2c0 r ar9280_2_0_rx_gain_13db_backoff_vals_5g +ffffffff826df4d0 r ar9280_2_0_rx_gain_13db_backoff_vals_2g +ffffffff826df6e0 r ar9280_2_0_rx_gain_vals_5g +ffffffff826df8f0 r ar9280_2_0_rx_gain_vals_2g +ffffffff826dfb00 r ar9280_2_0_tx_gain_regs +ffffffff826dfb40 r ar9280_2_0_tx_gain_high_power_vals_5g +ffffffff826dfbc0 r ar9280_2_0_tx_gain_high_power_vals_2g +ffffffff826dfc40 r ar9280_2_0_tx_gain_vals_5g +ffffffff826dfcc0 r ar9280_2_0_tx_gain_vals_2g +ffffffff826e0000 r ar9271_ini +ffffffff826e0068 r ar9285_1_2_ini +ffffffff826e00d0 r ar9280_2_0_serdes +ffffffff826e00e8 r ar9271_tx_gain_high_power +ffffffff826e0108 r ar9271_tx_gain +ffffffff826e0128 r ar9285_2_0_tx_gain_high_power +ffffffff826e0148 r ar9285_2_0_tx_gain +ffffffff826e0168 r ar9285_1_2_tx_gain_high_power +ffffffff826e0188 r ar9285_1_2_tx_gain +ffffffff826e01b0 r ar9271_regs +ffffffff826e0410 r ar9271_vals_2g40 +ffffffff826e08d0 r ar9271_vals_2g20 +ffffffff826e0d90 r ar9271_cm_regs +ffffffff826e1020 r ar9271_cm_vals +ffffffff826e1540 r ar9285_1_2_regs +ffffffff826e17a0 r ar9285_1_2_vals_2g40 +ffffffff826e1c60 r ar9285_1_2_vals_2g20 +ffffffff826e2120 r ar9285_1_2_cm_regs +ffffffff826e23a0 r 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ar9287_1_1_rx_gain_vals_2g +ffffffff826e41a0 r ar9287_1_1_tx_gain_regs +ffffffff826e4200 r ar9287_1_1_tx_gain_vals_2g +ffffffff826e5000 r athn_rates +ffffffff826e6000 r ar9485_1_1_ini +ffffffff826e6068 r ar9485_1_1_serdes +ffffffff826e6080 r ar9380_2_2_ini +ffffffff826e60e8 r ar9380_2_2_serdes +ffffffff826e6100 r ar9380_2_2_rx_gain_wo_xlna +ffffffff826e6120 r ar9380_2_2_rx_gain +ffffffff826e6140 r ar9485_1_1_rx_gain +ffffffff826e6160 r ar9380_2_2_tx_gain_high_ob_db +ffffffff826e6180 r ar9380_2_2_tx_gain_low_ob_db +ffffffff826e61a0 r ar9380_2_2_tx_gain_high_power +ffffffff826e61c0 r ar9380_2_2_tx_gain +ffffffff826e61e0 r ar9485_1_1_tx_gain +ffffffff826e6200 r ar9485_1_1_regs +ffffffff826e6270 r ar9485_1_1_vals_2g40 +ffffffff826e6350 r ar9485_1_1_vals_2g20 +ffffffff826e6430 r ar9485_1_1_cm_regs +ffffffff826e6720 r ar9485_1_1_cm_vals +ffffffff826e6d00 r ar9485_1_1_serdes_regs +ffffffff826e6d0c r ar9485_1_1_serdes_vals +ffffffff826e6d20 r ar9380_2_2_regs +ffffffff826e6db0 r ar9380_2_2_vals_5g20 +ffffffff826e6ed0 r ar9380_2_2_vals_5g40 +ffffffff826e6ff0 r ar9380_2_2_vals_2g40 +ffffffff826e7110 r ar9380_2_2_vals_2g20 +ffffffff826e7230 r ar9380_2_2_cm_regs +ffffffff826e75d0 r ar9380_2_2_cm_vals +ffffffff826e7d00 r ar9380_2_2_fast_clock_regs +ffffffff826e7d20 r ar9380_2_2_fast_clock_vals_5g20 +ffffffff826e7d50 r ar9380_2_2_fast_clock_vals_5g40 +ffffffff826e7d74 r ar9380_2_2_serdes_regs +ffffffff826e7d80 r ar9380_2_2_serdes_vals +ffffffff826e7d90 r ar9380_2_2_rx_gain_regs +ffffffff826e7f90 r ar9380_2_2_rx_gain_wo_xlna_vals +ffffffff826e8390 r ar9380_2_2_rx_gain_vals +ffffffff826e8790 r ar9485_1_1_rx_gain_regs +ffffffff826e8890 r ar9485_1_1_rx_gain_vals +ffffffff826e8a90 r ar9380_2_2_tx_gain_regs +ffffffff826e8b60 r ar9380_2_2_tx_gain_high_ob_db_vals_5g +ffffffff826e8d00 r ar9380_2_2_tx_gain_high_ob_db_vals_2g +ffffffff826e8ea0 r ar9380_2_2_tx_gain_low_ob_db_vals_5g +ffffffff826e9040 r ar9380_2_2_tx_gain_low_ob_db_vals_2g +ffffffff826e91e0 r ar9380_2_2_tx_gain_high_power_vals_5g +ffffffff826e9380 r ar9380_2_2_tx_gain_high_power_vals_2g +ffffffff826e9520 r ar9380_2_2_tx_gain_vals_5g +ffffffff826e96c0 r ar9380_2_2_tx_gain_vals_2g +ffffffff826e9860 r ar9485_1_1_tx_gain_regs +ffffffff826e98f0 r ar9485_1_1_tx_gain_vals_2g +ffffffff826e9a10 r ar9380_def_rom +ffffffff826e9e50 r ar9380_def_rom_h112 +ffffffff826ea290 r ar9380_def_rom_h116 +ffffffff826ea6d0 r ar9380_def_rom_x112 +ffffffff826eab10 r ar9380_def_rom_x113 +ffffffff826eb000 R atw_txthresh_tab_lo +ffffffff826eb050 R atw_txthresh_tab_hi +ffffffff826eb0a0 r atw_attach.empty_macaddr +ffffffff826eb0b0 r atw_attach.type_strings +ffffffff826eb0d0 r atw_rfmd2958_ifn +ffffffff826eb110 r atw_rfmd2958_rf1r +ffffffff826eb150 r atw_rxintr.rate_tbl +ffffffff826ec000 r rtw_identify_sta.empty_macaddr +ffffffff826ed000 r rtwn_set_key.etherzeroaddr +ffffffff826ed010 r rtl8188eu_rf_prog +ffffffff826ed030 r rtl8188ftv_rf_prog +ffffffff826ed050 r rtl8192e_rf_prog +ffffffff826ed080 r rtl8188ce_rf_prog +ffffffff826ed0a0 r rtl8188ru_rf_prog +ffffffff826ed0c0 r rtl8188cu_rf_prog +ffffffff826ed0e0 r rtl8192ce_rf_prog +ffffffff826ed110 r rtl8188ru_txagc +ffffffff826ed170 r rtl8188eu_rf_regs +ffffffff826ed230 r rtl8188eu_rf_vals +ffffffff826ed3b0 r rtl8188ftv_rf_regs +ffffffff826ed490 r rtl8188ftv_rf_vals +ffffffff826ed640 r rtl8192e_rf_regs +ffffffff826ed710 r rtl8192e_rf_vals +ffffffff826ed8b0 r rtl8192e_rf2_regs +ffffffff826ed950 r rtl8192e_rf2_vals +ffffffff826eda90 r rtl8192ce_rf1_regs +ffffffff826edbb0 r rtl8188ce_rf_vals +ffffffff826eddf0 r rtl8188ru_rf_vals +ffffffff826ee030 r rtl8188cu_rf_vals +ffffffff826ee270 r rtl8192ce_rf1_vals +ffffffff826ee4b0 r rtl8192ce_rf2_regs +ffffffff826ee500 r rtl8192ce_rf2_vals +ffffffff826ee5a0 r rtl8192cu_txagc +ffffffff826ef000 r rt2560_rf2522_r2 +ffffffff826ef040 r rt2560_rf2524_r2 +ffffffff826ef080 r rt2560_rf2525_hi_r2 +ffffffff826ef0c0 r rt2560_rf2525_r2 +ffffffff826ef100 r rt2560_rf2525e_r2 +ffffffff826ef140 r rt2560_rf2526_hi_r2 +ffffffff826ef180 r rt2560_rf2526_r2 +ffffffff826ef1c0 r rt2560_def_bbp +ffffffff826ef200 r rt2560_def_mac +ffffffff826f0000 r rt2661_rf5225_1 +ffffffff826f0300 r rt2661_rf5225_2 +ffffffff826f0600 r rt2661_def_bbp +ffffffff826f0640 r rt2661_def_mac +ffffffff826f1000 r rt2860_rf2850 +ffffffff826f1430 r rt2860_rates +ffffffff826f14f0 r rt3572_def_rf +ffffffff826f1530 r rt3090_def_rf +ffffffff826f1560 r rt5392_def_rf +ffffffff826f15e0 r rt3290_def_rf +ffffffff826f1640 r rt5390_def_rf +ffffffff826f16c0 r rt5390_def_bbp +ffffffff826f16f0 r rt2860_def_mac +ffffffff826f3000 r acx111_reg +ffffffff826f3040 r acx111_rate_map +ffffffff826f4000 r acx100_reg +ffffffff826f4040 r acx100_txpower_rfmd +ffffffff826f4060 r acx100_txpower_maxim +ffffffff826f4080 r xehp_rcs_offsets +ffffffff826f40b0 r gen8_rcs_offsets +ffffffff826f40e0 r hangpic +ffffffff826f4120 r digits +ffffffff826f4120 r pppdumpb.digits +ffffffff826f4120 r pppdumpm.digits +ffffffff826f4140 r dg2_xcs_offsets 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xhci_root_ctrl_methods +ffffffff826fb060 R xhci_root_intr_methods +ffffffff826fb090 R xhci_device_ctrl_methods +ffffffff826fb0c0 R xhci_device_intr_methods +ffffffff826fb0f0 R xhci_device_bulk_methods +ffffffff826fb120 R xhci_device_isoc_methods +ffffffff826fb150 R xhci_devd +ffffffff826fb162 R xhci_confd +ffffffff826fb16b R xhci_ifcd +ffffffff826fb174 R xhci_endpd +ffffffff826fb17b R xhci_endpcd +ffffffff826fb181 R xhci_hubd +ffffffff826fe000 R radio_ca +ffffffff826ff000 R ipmi_ca +ffffffff82700000 R vscsi_ca +ffffffff82700028 R vscsi_switch +ffffffff82700050 R vscsi_filtops +ffffffff82701000 R mpath_ca +ffffffff82701028 R mpath_switch +ffffffff82702000 R softraid_ca +ffffffff82702028 R sr_switch +ffffffff82703000 r spdmem_basic_types +ffffffff827030a0 r spdmem_parity_types +ffffffff827030e0 r spdmem_ddr4_decode.ddr4_chipsize +ffffffff82704000 R kstat_rlock_ops +ffffffff82704010 R kstat_wlock_ops +ffffffff82704020 R kstat_mutex_ops +ffffffff82704030 R kstat_cpu_ops +ffffffff82704040 r kstat_id_tree_RBT_INFO +ffffffff82704058 R kstat_id_tree_RBT_TYPE +ffffffff82704060 r kstat_pv_tree_RBT_INFO +ffffffff82704078 R kstat_pv_tree_RBT_TYPE +ffffffff82704080 r kstat_nm_tree_RBT_INFO +ffffffff82704098 R kstat_nm_tree_RBT_TYPE +ffffffff82705000 r fuse_rd_filtops +ffffffff82706000 R fusefs_vfsops +ffffffff82706070 R fusefs_vars +ffffffff82707000 R fusefs_vops +ffffffff82707110 R fusefsread_filtops +ffffffff82707140 R fusefswrite_filtops +ffffffff82707170 R fusefsvnode_filtops +ffffffff82708000 r pf_state_tree_RBT_INFO +ffffffff82708018 R pf_state_tree_RBT_TYPE +ffffffff82708020 r pf_state_tree_id_RBT_INFO +ffffffff82708038 R pf_state_tree_id_RBT_TYPE +ffffffff82708040 r pf_translate_af.zero +ffffffff82709000 R hfsc_ops +ffffffff82709038 R ifq_hfsc_ops +ffffffff82709040 R hfsc_pf_ops +ffffffff82709088 R pfq_hfsc_ops +ffffffff8270a000 r fqcodel_ops +ffffffff8270a038 R ifq_fqcodel_ops +ffffffff8270a040 r fqcodel_pf_ops +ffffffff8270a088 R pfq_fqcodel_ops +ffffffff8270a090 r codel_intervals +ffffffff8270b000 r pfsync_bulk_req_state_names +ffffffff8270b030 r pfsync_bulk_req_event_names +ffffffff8270b060 r pfsync_qs +ffffffff8270b0d8 r pfsync_kstat_tpl +ffffffff8270b2e0 r pfsync_acts +ffffffff8270c000 r bio_mappings_RBT_INFO +ffffffff8270c018 R bio_mappings_RBT_TYPE +ffffffff8270d000 R hotplugread_filtops +ffffffff8270e000 R dtps_static +ffffffff8270f000 R db_show_all_cmds +ffffffff8270f180 R db_show_cmds +ffffffff8270f4c0 R db_boot_cmds +ffffffff8270f5a0 R db_command_table +ffffffff82710000 R ddb_vars +ffffffff82711000 R audio_ca +ffffffff82711028 R audioctlread_filtops +ffffffff82711058 R audiowrite_filtops +ffffffff82711088 R audioread_filtops +ffffffff82712000 R midi_ca +ffffffff82712028 R midiwrite_filtops +ffffffff82712058 R midiread_filtops +ffffffff82713000 r mulawtolin16 +ffffffff82713200 r lintomulaw +ffffffff82714000 R randomread_filtops +ffffffff82714030 R randomwrite_filtops +ffffffff82715000 R video_ca +ffffffff82715028 R video_filtops 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rw_ops +ffffffff82725000 r proc_printit.pstat +ffffffff82726000 R pledge_syscalls +ffffffff82726a60 r pledgenames +ffffffff82726cb0 r pledgereq +ffffffff82727000 r unvname_rbt_RBT_INFO +ffffffff82727018 R unvname_rbt_RBT_TYPE +ffffffff82728000 R sig_filtops +ffffffff82728030 R sigprop +ffffffff82729000 R kern_vars +ffffffff827292f0 R hw_vars +ffffffff8272a000 R tc_vars +ffffffff8272b000 r sys_gettimeofday.zerotz +ffffffff8272c000 r taskq_sys_name +ffffffff8272c006 r taskq_sys_mp_name +ffffffff8272c010 R systq +ffffffff8272c018 R systqmp +ffffffff8272e000 r gpt_get_fstype.gpt_uuid_openbsd +ffffffff8272e010 r gpt_get_fstype.gpt_uuid_msdos +ffffffff8272e020 r gpt_get_fstype.gpt_uuid_chromerootfs +ffffffff8272e030 r gpt_get_fstype.gpt_uuid_linux +ffffffff8272e040 r gpt_get_fstype.gpt_uuid_hfs +ffffffff8272e050 r gpt_get_fstype.gpt_uuid_unused +ffffffff8272e060 r gpt_get_fstype.gpt_uuid_efi_system +ffffffff8272e070 r gpt_get_fstype.gpt_uuid_bios_boot +ffffffff8272f000 r hiballoc_addr_RBT_INFO +ffffffff8272f018 R hiballoc_addr_RBT_TYPE +ffffffff82730000 R logread_filtops +ffffffff82731000 r phtree_RBT_INFO +ffffffff82731018 R phtree_RBT_TYPE +ffffffff82731020 r pool_lock_ops_rw +ffffffff82731058 r pool_lock_ops_mtx +ffffffff82732000 r pselregister.evf +ffffffff8273200c r pselregister.evff +ffffffff82733000 R pipe_rfiltops +ffffffff82733030 R pipe_wfiltops +ffffffff82733060 R pipe_efiltops +ffffffff82733090 r pipeops +ffffffff82734000 R socketops +ffffffff82735000 R sysvsem_vars +ffffffff82736000 R char_type +ffffffff82736100 R ttyread_filtops +ffffffff82736130 R ttywrite_filtops +ffffffff82736160 R ttyexcept_filtops +ffffffff82737000 R ptcread_filtops +ffffffff82737030 R ptcwrite_filtops +ffffffff82737060 R ptcexcept_filtops +ffffffff82739000 R domains +ffffffff8273a000 R unixdomain +ffffffff8273a050 R unixsw +ffffffff8273b000 R solisten_filtops +ffffffff8273b030 R soread_filtops +ffffffff8273b060 R sowrite_filtops +ffffffff8273b090 R soexcept_filtops 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+ffffffff82921120 R iwx_ax201_cfg_quz_hr +ffffffff82921140 R iwx_cfg_so_a0_hr_b0 +ffffffff82921160 R iwx_cfg_quz_a0_hr_b0 +ffffffff82921180 R iwx_2ax_cfg_so_gf_a0 +ffffffff829211a0 R iwx_2ax_cfg_so_gf_a0_long +ffffffff829211c0 R iwx_2ax_cfg_so_gf4_a0 +ffffffff829211e0 R iwx_2ax_cfg_so_gf4_a0_long +ffffffff82921200 R iwx_2ax_cfg_ty_gf_a0 +ffffffff82921220 R iwx_2ax_cfg_so_jf_b0 +ffffffff82921240 R iwx_nvm_channels_8000 +ffffffff82921280 R iwx_rates +ffffffff829212e0 R iwx_mcs2ridx +ffffffff82921320 R iwx_tid_to_ac +ffffffff82921328 R iwx_ac_to_tx_fifo +ffffffff82921330 r iwx_nvm_channels_uhb +ffffffff8292139e r iwx_is_valid_mac_addr.reserved_mac +ffffffff829213b0 r iwx_sf_full_timeout +ffffffff829213e0 r iwx_sf_full_timeout_def +ffffffff82921410 r advanced_lookup +ffffffff82921550 r iwx_devices +ffffffff82921590 r iwx_dev_info_table +ffffffff82921e18 R iwx_ca +ffffffff82922000 R cmpci_ca +ffffffff82922028 R cmpci_hw_if +ffffffff829220e0 r cmpci_rate_table +ffffffff82922120 R cmpci_devices +ffffffff82922130 r cmpci_query_devinfo.mixer_port_names +ffffffff82922160 r cmpci_query_devinfo.mixer_classes +ffffffff82923000 R iha_pci_ca +ffffffff82923028 R iha_switch +ffffffff82924000 R pcscp_ca +ffffffff82925000 R bge_ca +ffffffff82925030 R bge_devices +ffffffff829251b0 r bge_revisions +ffffffff82925610 r bge_majorrevs +ffffffff82925790 r bge_kstat_tpl +ffffffff82926000 R bnx_devices +ffffffff82926020 R bnx_ca +ffffffff82927000 R vge_ca +ffffffff82927028 R vge_devices +ffffffff82928000 R stge_ca +ffffffff82928028 R stge_mii_bitbang_ops +ffffffff82928050 R stge_devices +ffffffff82929000 R nfe_ca +ffffffff82929030 R nfe_devices +ffffffff8292a000 R et_devices +ffffffff8292a008 R et_ca +ffffffff8292b000 R jme_devices +ffffffff8292b008 R jme_ca +ffffffff8292c000 R age_devices +ffffffff8292c008 R age_ca +ffffffff8292d000 R alc_devices +ffffffff8292d038 R alc_ca +ffffffff8292e000 R ale_devices +ffffffff8292e008 R ale_ca +ffffffff8292f000 R amdpm_ca +ffffffff8292f030 R amdpm_ids +ffffffff82930000 R bce_ca +ffffffff82930028 R bce_devices +ffffffff82931000 R ath_pci_ca +ffffffff82932000 R athn_pci_ca +ffffffff82932030 r athn_pci_devices +ffffffff82933000 R atw_pci_ca +ffffffff82933028 R atw_pci_devices +ffffffff82934000 R rtw_pci_ca +ffffffff82934030 R rtw_pci_products +ffffffff82935000 R rtwn_pci_ca +ffffffff82935030 r rtwn_pci_devices +ffffffff82935040 r rtl8188eu_mac +ffffffff829351b0 r rtl8192cu_mac +ffffffff82935310 r rtl8192ce_mac +ffffffff82935458 r rtl8188eu_bb_prog +ffffffff82935480 r rtl8723a_bb_prog +ffffffff829354a8 r rtl8192ce_bb_prog_1t +ffffffff829354d0 r rtl8192ce_bb_prog_2t +ffffffff82935500 r rtl8188eu_bb_regs +ffffffff82935680 r rtl8188eu_bb_vals +ffffffff82935980 r rtl8188eu_agc_vals +ffffffff82935b80 r rtl8723a_bb_regs +ffffffff82935d00 r rtl8723a_bb_vals +ffffffff82935ff0 r rtl8192ce_agc_vals +ffffffff82936270 r rtl8192ce_bb_regs +ffffffff829363f0 r rtl8192ce_bb_vals_1t +ffffffff829366e0 r rtl8192ce_bb_vals_2t +ffffffff82937000 R ral_pci_ca +ffffffff82937030 R ral_pci_devices +ffffffff82938000 R acx_pci_ca +ffffffff82938028 R acx_pci_devices +ffffffff82939000 R pgt_pci_ca +ffffffff82939028 R pgt_pci_devices +ffffffff8293a000 R malo_pci_ca +ffffffff8293a028 R malo_pci_devices +ffffffff8293b000 R bwi_pci_ca +ffffffff8293b030 R bwi_pci_devices +ffffffff8293c000 R piixpm_ca +ffffffff8293c030 R piixpm_ids +ffffffff8293d000 R vic_ca +ffffffff8293d028 R vic_devices +ffffffff8293e000 R vmx_devices +ffffffff8293e008 R vmx_ca +ffffffff8293e030 r vmx_tx_kstat_tpl +ffffffff8293e0d0 r vmx_kstat_rate +ffffffff8293e0e0 r vmx_rx_kstat_tpl +ffffffff8293f000 R vmwpvs_ca +ffffffff8293f028 R vmwpvs_switch +ffffffff82940000 R lii_ca +ffffffff82940028 R lii_devices +ffffffff82941000 R ichiic_ca +ffffffff82941030 R ichiic_ids +ffffffff82942000 R viapm_ca +ffffffff82942030 R viapm_ids +ffffffff82942070 r val_to_temp +ffffffff82942870 r val_to_uV.mult +ffffffff82943000 R amdiic_ca +ffffffff82943028 R amdiic_ids +ffffffff82944000 R nviic_ca +ffffffff82944030 R nviic_ids +ffffffff82945000 R sdhc_pci_ca +ffffffff82946000 R kate_ca +ffffffff82946030 r kate_proc +ffffffff82947000 R km_ca +ffffffff82947030 r km_devices +ffffffff82948000 R ksmn_ca +ffffffff82948030 r ksmn_devices +ffffffff82949000 R iosf_pci_ca +ffffffff8294a000 R itherm_devices +ffffffff8294a008 R itherm_ca +ffffffff8294b000 R pchtemp_ca +ffffffff8294b030 R pchtemp_devices +ffffffff8294c000 R rtsx_pci_ca +ffffffff8294d000 R xspd_ca +ffffffff8294d028 R xspd_devices +ffffffff8294e000 R virtio_pci_ca +ffffffff8294f000 R dwiic_pci_ca +ffffffff8294f030 R dwiic_pci_ids +ffffffff82950000 R bwfm_pci_ca +ffffffff82950030 r bwfm_pci_devices +ffffffff82951000 R ccp_pci_ca +ffffffff82951030 r ccp_pci_devices +ffffffff82952000 R bnxt_devices +ffffffff82952040 R bnxt_ca +ffffffff82953000 R mcx_ca +ffffffff82953030 r mcx_devices +ffffffff82953060 r mcx_rss_config +ffffffff829530d0 r mcx_eth_cap_map +ffffffff829532d0 r mcx_kstat_ppcnt_ieee8023 +ffffffff829532e8 r mcx_kstat_ppcnt_rfc2863 +ffffffff82953300 r mcx_kstat_ppcnt_rfc2819 +ffffffff82953318 r mcx_kstat_ppcnt_rfc3635 +ffffffff82953330 r mcx_ppcnt_ieee8023_tpl +ffffffff829534b0 r mcx_ppcnt_rfc2863_tpl +ffffffff829535c0 r mcx_ppcnt_rfc2819_tpl +ffffffff82953770 r mcx_ppcnt_rfc3635_tpl +ffffffff829538b0 r mcx_kstat_mtmp_tpl +ffffffff82953950 r mcx_kstat_mtmp_rate +ffffffff82953960 r mcx_queue_kstat_tpl +ffffffff82954000 R iavf_ca +ffffffff82954030 r iavf_devices +ffffffff82954040 r iavf_aq_regs +ffffffff829540b0 r iavf_link_speeds +ffffffff82955000 R rge_ca +ffffffff82955028 R rge_devices +ffffffff82955030 r rtl8125_mac_cfg2_ephy +ffffffff82955090 r rge_phy_config_mac_cfg3.mac_cfg3_a438_value +ffffffff829550b0 r rge_phy_config_mac_cfg3.mac_cfg3_b88e_value +ffffffff82955110 r rge_phy_config_mac_cfg4.mac_cfg4_b87c_value +ffffffff82955170 r rtl8125_mac_cfg4_ephy +ffffffff829551e0 r rtl8125_mac_cfg2_mcu +ffffffff82955e80 r rtl8125_mac_cfg3_mcu +ffffffff82956720 r rtl8125_mac_cfg4_mcu +ffffffff82958d10 r rtl8125_mac_cfg5_mcu +ffffffff82959c10 r rtl8125_mac_bps +ffffffff82959f80 r rtl8125b_mac_bps +ffffffff8295a120 r rge_kstats_tpl +ffffffff8295b000 R igc_devices +ffffffff8295b040 R igc_ca +ffffffff8295c000 R ngbe_devices +ffffffff8295c008 R ngbe_ca +ffffffff8295d000 R com_pci_ca +ffffffff8295d030 R com_pci_ids +ffffffff8295e000 r agp_attach.agp_max +ffffffff8295e048 R agp_ca +ffffffff8295f000 R intagp_ca +ffffffff82960000 r drm_plane_create_rotation_property.props +ffffffff82961000 r drm_bridge_priv_state_funcs +ffffffff82963000 r color_encoding_name +ffffffff82963020 r color_range_name +ffffffff82964000 r drm_subpixel_enum_list +ffffffff82964060 r drm_dpms_enum_list +ffffffff829640a0 r drm_dvi_i_select_enum_list +ffffffff829640d0 r drm_dvi_i_subconnector_enum_list +ffffffff82964100 r drm_tv_select_enum_list +ffffffff82964150 r drm_tv_subconnector_enum_list +ffffffff829641a0 r drm_dp_subconnector_enum_list +ffffffff82964210 r drm_link_status_enum_list +ffffffff82964230 r drm_scaling_mode_enum_list +ffffffff82964270 r drm_aspect_ratio_enum_list +ffffffff829642a0 r hdmi_colorspaces +ffffffff82964370 r dp_colorspaces +ffffffff82964450 r drm_content_type_enum_list +ffffffff829644a0 r drm_panel_orientation_enum_list +ffffffff829644e0 r privacy_screen_enum +ffffffff82965000 r drm_crtc_fence_ops +ffffffff82966000 r drm_dmt_modes +ffffffff82968940 r edid_cea_modes_1 +ffffffff8296c4d0 r edid_cea_modes_193 +ffffffff8296d180 r edid_quirk_list +ffffffff8296d360 r edid_4k_modes +ffffffff8296d5c0 r edid_est_modes +ffffffff8296ddc0 r est3_modes +ffffffff8296df20 r stereo_mandatory_modes +ffffffff8296dfa0 r extra_modes +ffffffff8296e000 r drm_encoder_enum_list +ffffffff8296f000 r drm_fbdev_client_funcs +ffffffff8296f020 r drm_fb_helper_generic_funcs +ffffffff8296f028 r drm_fbdev_fb_ops +ffffffff82970000 r drm_fb_xrgb8888_to_rgb332.dst_pixsize +ffffffff82970004 r drm_fb_xrgb8888_to_rgb565.dst_pixsize +ffffffff82970008 r drm_fb_xrgb8888_to_rgb888.dst_pixsize +ffffffff8297000c r drm_fb_xrgb8888_to_xrgb2101010.dst_pixsize +ffffffff82970010 r drm_fb_xrgb8888_to_gray8.dst_pixsize +ffffffff82970014 r drm_fb_rgb888_to_xrgb8888.dst_pixsize +ffffffff82970018 r drm_fb_rgb565_to_xrgb8888.dst_pixsize +ffffffff82971000 r __drm_format_info.formats +ffffffff82972000 R drm_pgops +ffffffff82973000 r drm_ioctls +ffffffff82975000 r dma_fence_stub_ops +ffffffff82975038 R dma_fence_array_ops +ffffffff82975070 R dma_fence_chain_ops +ffffffff829750a8 R dmabufops +ffffffff829750e0 R syncfileops +ffffffff82976000 r drm_plane_type_enum_list +ffffffff82977000 r drm_mode_status_names +ffffffff82978000 r primary_plane_funcs +ffffffff82978068 r safe_modeset_formats +ffffffff82979000 r orientation_data +ffffffff8297c718 r lcd800x1280_rightside_up +ffffffff8297c730 r lcd720x1280_rightside_up +ffffffff8297c748 r lcd800x1280_leftside_up +ffffffff8297c760 r lcd1080x1920_leftside_up +ffffffff8297c778 r lcd1200x1920_rightside_up +ffffffff8297c790 r gpd_micropc +ffffffff8297c7a8 r gpd_pocket +ffffffff8297c7c0 r gpd_pocket2 +ffffffff8297c7d8 r gpd_win +ffffffff8297c7f0 r gpd_win2 +ffffffff8297c808 r itworks_tw891 +ffffffff8297c820 r lcd1600x2560_rightside_up +ffffffff8297c838 r onegx1_pro +ffffffff8297c850 r lcd1600x2560_leftside_up +ffffffff8297c868 r lcd1280x1920_rightside_up +ffffffff8297c880 r gpd_onemix2s +ffffffff8297c898 r .compoundliteral +ffffffff8297c8a8 r .compoundliteral.5 +ffffffff8297c8d0 r .compoundliteral.9 +ffffffff8297c8f0 r .compoundliteral.17 +ffffffff8297c930 r .compoundliteral.21 +ffffffff8297c950 r .compoundliteral.23 +ffffffff8297c960 r .compoundliteral.25 +ffffffff8297c970 r .compoundliteral.29 +ffffffff8297d000 r drm_gem_prime_dmabuf_ops +ffffffff8297f000 r is_hdmi_adaptor.dp_dual_mode_hdmi_id +ffffffff82980000 r drm_dp_phy_name.phy_names +ffffffff82980048 r drm_dp_i2c_algo +ffffffff82980058 r drm_dp_i2c_lock_ops +ffffffff82980070 r dp_aux_bl_ops +ffffffff82980090 r dpcd_quirk_list +ffffffff82980320 r drm_dp_psr_setup_time.psr_setup_time_us +ffffffff82981000 R drm_dp_mst_topology_state_funcs +ffffffff82981020 r drm_dp_mst_req_type_str.req_type_str +ffffffff829811f0 r drm_dp_mst_sideband_tx_state_str.sideband_reason_str +ffffffff82981220 r drm_dp_mst_nak_reason_str.nak_reason_str +ffffffff82981278 r drm_dp_mst_i2c_algo +ffffffff82982000 r hdmi_colorimetry_val +ffffffff82983000 r ttm_bo_init_reserved.sys_mem +ffffffff82984000 r ttm_bo_pipeline_gutting.sys_mem +ffffffff82985018 R ttm_bo_vm_ops +ffffffff82986000 r ttm_range_manager_func +ffffffff82987018 r ttm_kmap_iter_io_ops +ffffffff82987030 r ttm_kmap_iter_linear_io_ops +ffffffff82988000 r ttm_sys_manager_func +ffffffff82989000 r ttm_kmap_iter_tt_ops +ffffffff8298a000 r drm_sched_fence_ops_scheduled +ffffffff8298a038 r drm_sched_fence_ops_finished +ffffffff8298b000 R ch7017_ops +ffffffff8298c000 R ch7xxx_ops +ffffffff8298c060 r ch7xxx_ids +ffffffff8298d000 R ivch_ops +ffffffff8298d060 r backup_addresses +ffffffff8298e000 R ns2501_ops +ffffffff8298e060 r mode_agnostic_values +ffffffff8298e0e0 r ns2501_modes +ffffffff8298f000 R sil164_ops +ffffffff82990000 R tfp410_ops +ffffffff82991000 r chv_dpll +ffffffff82991050 r vlv_dpll +ffffffff829910a0 r g4x_dpll +ffffffff829910f0 r pch_dpll +ffffffff82991138 r intel_dp_enc_funcs +ffffffff82992000 r intel_hdmi_enc_funcs +ffffffff82993000 r vlv_primary_formats +ffffffff82993030 r ivb_primary_formats +ffffffff82993050 r i965_primary_formats +ffffffff82993070 r i8xx_primary_formats +ffffffff82993080 r i965_plane_funcs +ffffffff829930e8 r i8xx_plane_funcs +ffffffff82994000 r gen11_dsi_encoder_funcs +ffffffff82994020 r gen11_dsi_connector_funcs +ffffffff82994098 r gen11_dsi_connector_helper_funcs +ffffffff829940e8 r gen11_dsi_host_ops +ffffffff82995000 r intel_plane_helper_funcs +ffffffff82996000 r g4x_audio_funcs +ffffffff82996010 r ilk_audio_funcs +ffffffff82996020 r hsw_audio_funcs +ffffffff82996030 r hdmi_audio_clock +ffffffff829960a0 r dp_aud_n_m +ffffffff82996250 r hdmi_aud_ncts_36bpp +ffffffff82996330 r hdmi_aud_ncts_30bpp +ffffffff82996410 r hdmi_aud_ncts_24bpp +ffffffff82997000 r intel_backlight_device_ops +ffffffff82997018 r bxt_pwm_funcs +ffffffff82997048 r cnp_pwm_funcs +ffffffff82997078 r lpt_pwm_funcs +ffffffff829970a8 r spt_pwm_funcs +ffffffff829970d8 r pch_pwm_funcs +ffffffff82997108 r ext_pwm_funcs +ffffffff82997138 r vlv_pwm_funcs +ffffffff82997168 r i965_pwm_funcs +ffffffff82997198 r i9xx_pwm_funcs +ffffffff829971c8 r pwm_bl_funcs +ffffffff82998000 r bdb_blocks +ffffffff82998160 r translate_iboost.mapping +ffffffff82998163 r adlp_ddc_pin_map +ffffffff8299816a r adls_ddc_pin_map +ffffffff82998170 r rkl_pch_tgp_ddc_pin_map +ffffffff82998175 r icp_ddc_pin_map +ffffffff8299817f r cnp_ddc_pin_map +ffffffff82999000 r mtl_sa_info +ffffffff82999006 r adlp_sa_info +ffffffff8299900c r adls_sa_info +ffffffff82999012 r rkl_sa_info +ffffffff82999018 r tgl_sa_info +ffffffff82999020 r intel_bw_funcs +ffffffff8299a000 r intel_cdclk_funcs +ffffffff8299a010 r dg2_cdclk_table +ffffffff8299a0c0 r adlp_a_step_cdclk_table +ffffffff8299a140 r adlp_cdclk_table +ffffffff8299a200 r rkl_cdclk_table +ffffffff8299a2f0 r icl_cdclk_table +ffffffff8299a3e0 r glk_cdclk_table +ffffffff8299a410 r bxt_cdclk_table +ffffffff8299a458 r tgl_cdclk_funcs +ffffffff8299a478 r ehl_cdclk_funcs +ffffffff8299a498 r icl_cdclk_funcs +ffffffff8299a4b8 r bxt_cdclk_funcs +ffffffff8299a4d8 r skl_cdclk_funcs +ffffffff8299a4f8 r bdw_cdclk_funcs +ffffffff8299a518 r hsw_cdclk_funcs +ffffffff8299a538 r chv_cdclk_funcs +ffffffff8299a558 r vlv_cdclk_funcs +ffffffff8299a578 r fixed_400mhz_cdclk_funcs +ffffffff8299a598 r ilk_cdclk_funcs +ffffffff8299a5b8 r gm45_cdclk_funcs +ffffffff8299a5d8 r g33_cdclk_funcs +ffffffff8299a5f8 r g33_get_cdclk.div_3200 +ffffffff8299a5fe r g33_get_cdclk.div_4000 +ffffffff8299a604 r g33_get_cdclk.div_4800 +ffffffff8299a60a r g33_get_cdclk.div_5333 +ffffffff8299a610 r i965gm_cdclk_funcs +ffffffff8299a630 r i965gm_get_cdclk.div_3200 +ffffffff8299a633 r i965gm_get_cdclk.div_4000 +ffffffff8299a636 r i965gm_get_cdclk.div_5333 +ffffffff8299a640 r pnv_cdclk_funcs +ffffffff8299a660 r i945gm_cdclk_funcs +ffffffff8299a680 r i915gm_cdclk_funcs +ffffffff8299a6a0 r i915g_cdclk_funcs +ffffffff8299a6c0 r i865g_cdclk_funcs +ffffffff8299a6e0 r i85x_cdclk_funcs +ffffffff8299a700 r i845g_cdclk_funcs +ffffffff8299a720 r i830_cdclk_funcs +ffffffff8299b000 r chv_color_funcs +ffffffff8299b028 r i965_color_funcs +ffffffff8299b050 r i9xx_color_funcs +ffffffff8299b078 r icl_color_funcs +ffffffff8299b0a0 r glk_color_funcs +ffffffff8299b0c8 r skl_color_funcs +ffffffff8299b0f0 r bdw_color_funcs +ffffffff8299b118 r hsw_color_funcs +ffffffff8299b140 r ivb_color_funcs +ffffffff8299b168 r ilk_color_funcs +ffffffff8299b190 r ilk_csc_off_zero +ffffffff8299b1a0 r ilk_csc_coeff_rgb_to_ycbcr +ffffffff8299b1b2 r ilk_csc_postoff_rgb_to_ycbcr +ffffffff8299b1c0 r ilk_csc_coeff_limited_range +ffffffff8299b1d2 r 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r pciidlist -ffffffff82a82130 r amdgpu_unsupported_pciidlist -ffffffff82a826b0 r amdgpu_kms_driver -ffffffff82a83000 r amdgpu_job_fence_ops -ffffffff82a83038 r amdgpu_fence_ops -ffffffff82a84000 r amdgpu_gem_object_funcs -ffffffff82a84060 r amdgpu_gem_vm_ops -ffffffff82a86000 R amdgpu_gtt_mgr_attr_group -ffffffff82a86018 r amdgpu_gtt_mgr_func -ffffffff82a87000 r amdgpu_atombios_i2c_algo -ffffffff82a88000 R amdgpu_sched_ops -ffffffff82a8b000 r amdgpu_vram_names -ffffffff82a8c000 r amdgpu_preempt_mgr_func -ffffffff82a8d000 R psp_ip_funcs -ffffffff82a8d0a0 R psp_v3_1_ip_block -ffffffff82a8d0b8 R psp_v10_0_ip_block -ffffffff82a8d0d0 R psp_v11_0_ip_block -ffffffff82a8d0e8 R psp_v11_0_8_ip_block -ffffffff82a8d100 R psp_v12_0_ip_block -ffffffff82a8d118 R psp_v13_0_ip_block -ffffffff82a8d130 R psp_v13_0_4_ip_block -ffffffff82a8f000 r amdgpu_evict_flags.placements -ffffffff82a93000 R amdgpu_vkms_ip_block -ffffffff82a95000 R amdgpu_vm_cpu_funcs -ffffffff82a97000 R amdgpu_vm_sdma_funcs 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r turks_sysls_disable +ffffffff82a1bb60 r caicos_sysls_disable +ffffffff82a1c000 r didt_config_ci +ffffffff82a1c5b4 r defaults_bonaire_xt +ffffffff82a1c600 r defaults_saturn_xt +ffffffff82a1c64c r defaults_hawaii_xt +ffffffff82a1c698 r defaults_hawaii_pro +ffffffff82a1d000 r ci_program_jump_on_start.data +ffffffff82a1e000 r bonaire_io_mc_regs +ffffffff82a1e120 r hawaii_io_mc_regs +ffffffff82a1e1d0 r mc_cg_registers +ffffffff82a1e200 r bonaire_mgcg_cgcg_init +ffffffff82a1e5e0 r bonaire_golden_registers +ffffffff82a1e7d0 r bonaire_golden_common_registers +ffffffff82a1e800 r bonaire_golden_spm_registers +ffffffff82a1e810 r kalindi_mgcg_cgcg_init +ffffffff82a1eab0 r kalindi_golden_registers +ffffffff82a1ec20 r kalindi_golden_common_registers +ffffffff82a1ec50 r kalindi_golden_spm_registers +ffffffff82a1ec60 r godavari_golden_registers +ffffffff82a1ede0 r spectre_mgcg_cgcg_init +ffffffff82a1f200 r spectre_golden_registers +ffffffff82a1f330 r spectre_golden_common_registers +ffffffff82a1f360 r spectre_golden_spm_registers +ffffffff82a1f370 r hawaii_mgcg_cgcg_init +ffffffff82a1f880 r hawaii_golden_registers +ffffffff82a1fa30 r hawaii_golden_common_registers +ffffffff82a1fa6c r hawaii_golden_spm_registers +ffffffff82a1fa80 r spectre_rlc_save_restore_register_list +ffffffff82a20170 r kalindi_rlc_save_restore_register_list +ffffffff82a20680 r ci_cs_data +ffffffff82a206a0 r ci_SECT_CONTEXT_defs +ffffffff82a20720 r ci_SECT_CONTEXT_def_1 +ffffffff82a20a70 r ci_SECT_CONTEXT_def_3 +ffffffff82a20a90 r ci_SECT_CONTEXT_def_4 +ffffffff82a20d04 r ci_SECT_CONTEXT_def_5 +ffffffff82a20d0c r ci_SECT_CONTEXT_def_6 +ffffffff82a20d10 r ci_SECT_CONTEXT_def_2 +ffffffff82a21160 r ci_SECT_CONTEXT_def_7 +ffffffff82a21510 r cik_default_state +ffffffff82a23000 r dce3_2_afmt_write_sad_regs.eld_reg_to_type +ffffffff82a24000 r dce6_afmt_write_sad_regs.eld_reg_to_type +ffffffff82a25000 r ni_tx_offsets +ffffffff82a25020 r evergreen_dp_offsets +ffffffff82a25040 r evergreen_disp_int_status +ffffffff82a25060 r evergreen_golden_registers +ffffffff82a25260 r evergreen_golden_registers2 +ffffffff82a25310 r cypress_mgcg_init +ffffffff82a25a10 r juniper_mgcg_init +ffffffff82a25e80 r redwood_mgcg_init +ffffffff82a261b0 r cedar_golden_registers +ffffffff82a26390 r cedar_mgcg_init +ffffffff82a265f0 r wrestler_golden_registers +ffffffff82a26840 r supersumo_golden_registers +ffffffff82a26ba0 r sumo_golden_registers +ffffffff82a26be0 r barts_golden_registers +ffffffff82a26e00 r turks_golden_registers +ffffffff82a27040 r caicos_golden_registers +ffffffff82a27280 r sumo_rlc_save_restore_register_list +ffffffff82a273d0 r evergreen_cs_data +ffffffff82a27410 r SECT_CONTEXT_defs +ffffffff82a27490 r SECT_CLEAR_defs +ffffffff82a274b0 r SECT_CTRLCONST_defs +ffffffff82a274d0 r SECT_CONTEXT_def_2 +ffffffff82a274f0 r SECT_CONTEXT_def_4 +ffffffff82a27680 r SECT_CONTEXT_def_5 +ffffffff82a276a0 r SECT_CONTEXT_def_6 +ffffffff82a27780 r SECT_CONTEXT_def_1 +ffffffff82a27f20 r SECT_CONTEXT_def_3 +ffffffff82a28000 r SECT_CONTEXT_def_7 +ffffffff82a28488 r SECT_CLEAR_def_1 +ffffffff82a28494 r SECT_CTRLCONST_def_1 +ffffffff82a284a0 r evergreen_default_state +ffffffff82a29000 r cayman_reg_safe_bm +ffffffff82a2b000 r evergreen_reg_safe_bm +ffffffff82a2e000 r evergreen_hdmi_write_sad_regs.eld_reg_to_type +ffffffff82a2f000 r didt_config_kv +ffffffff82a30000 r barts_io_mc_regs +ffffffff82a300f0 r turks_io_mc_regs +ffffffff82a301e0 r caicos_io_mc_regs +ffffffff82a302d0 r cayman_io_mc_regs +ffffffff82a303c0 r cayman_golden_registers +ffffffff82a30580 r cayman_golden_registers2 +ffffffff82a305d0 r dvst_golden_registers +ffffffff82a30860 r dvst_golden_registers2 +ffffffff82a30890 r scrapper_golden_registers +ffffffff82a30d70 r tn_rlc_save_restore_register_list +ffffffff82a30f60 r cayman_cs_data +ffffffff82a30fa0 r SECT_CONTEXT_defs +ffffffff82a31020 r SECT_CLEAR_defs +ffffffff82a31040 r SECT_CTRLCONST_defs +ffffffff82a31060 r SECT_CONTEXT_def_2 +ffffffff82a31080 r SECT_CONTEXT_def_4 +ffffffff82a31210 r SECT_CONTEXT_def_5 +ffffffff82a31230 r SECT_CONTEXT_def_1 +ffffffff82a319d0 r SECT_CONTEXT_def_3 +ffffffff82a31ab0 r SECT_CONTEXT_def_6 +ffffffff82a31b90 r SECT_CONTEXT_def_7 +ffffffff82a32018 r SECT_CLEAR_def_1 +ffffffff82a32024 r SECT_CTRLCONST_def_1 +ffffffff82a32030 r cayman_default_state +ffffffff82a33000 r cac_weights_cayman_xt +ffffffff82a33128 r cac_weights_cayman_pro +ffffffff82a33250 r cac_weights_cayman_le +ffffffff82a33380 r cayman_cgcg_cgls_default +ffffffff82a335c0 r cayman_mgcg_default +ffffffff82a33f20 r cayman_sysls_default +ffffffff82a33ff0 r cayman_cgcg_cgls_enable +ffffffff82a34240 r cayman_cgcg_cgls_disable +ffffffff82a344a0 r cayman_mgcg_enable +ffffffff82a34520 r cayman_mgcg_disable +ffffffff82a345a0 r cayman_sysls_enable +ffffffff82a34670 r cayman_sysls_disable +ffffffff82a35000 r rn50_reg_safe_bm +ffffffff82a351a0 r r100_reg_safe_bm +ffffffff82a36000 r r200_reg_safe_bm +ffffffff82a37000 r r300_reg_safe_bm +ffffffff82a38000 r r420_reg_safe_bm +ffffffff82a3a000 r color_formats_table +ffffffff82a3a480 r r600_reg_safe_bm +ffffffff82a3d000 R r600_utc +ffffffff82a3d040 R r600_dtc +ffffffff82a3d080 r r600_encode_pci_lane_width.encoded_lanes +ffffffff82a3f000 r r100_gfx_ring +ffffffff82a3f070 r r300_gfx_ring +ffffffff82a3f0e0 r rv515_gfx_ring +ffffffff82a3f150 r r600_gfx_ring +ffffffff82a3f1c0 r r600_dma_ring +ffffffff82a3f230 r rv6xx_uvd_ring +ffffffff82a3f2a0 r rv770_uvd_ring +ffffffff82a3f310 r evergreen_gfx_ring +ffffffff82a3f380 r evergreen_dma_ring +ffffffff82a3f3f0 r cayman_gfx_ring +ffffffff82a3f460 r cayman_dma_ring +ffffffff82a3f4d0 r cayman_uvd_ring +ffffffff82a3f540 r trinity_vce_ring +ffffffff82a3f5b0 r si_gfx_ring +ffffffff82a3f620 r si_dma_ring +ffffffff82a3f690 r ci_gfx_ring +ffffffff82a3f700 r ci_cp_ring +ffffffff82a3f770 r ci_dma_ring +ffffffff82a3f7e0 r ci_vce_ring +ffffffff82a40000 r object_connector_convert +ffffffff82a40060 r supported_devices_connector_convert +ffffffff82a400a0 r supported_devices_connector_object_id_convert +ffffffff82a400c0 r thermal_controller_names +ffffffff82a40100 r pp_lib_thermal_controller_names +ffffffff82a41000 r pin_offsets +ffffffff82a41020 r radeon_audio_acr.hdmi_predefined_acr +ffffffff82a43000 r thermal_controller_names +ffffffff82a43020 r default_primarydac_adj +ffffffff82a43120 r default_tvdac_adj +ffffffff82a43220 r default_tmds_pll +ffffffff82a44000 r radeon_dp_connector_helper_funcs +ffffffff82a44050 r radeon_vga_connector_helper_funcs +ffffffff82a440a0 r radeon_dvi_connector_helper_funcs +ffffffff82a440f0 r radeon_tv_connector_helper_funcs +ffffffff82a44140 r radeon_lvds_connector_helper_funcs +ffffffff82a44190 r radeon_dp_connector_funcs +ffffffff82a44298 r radeon_lvds_bridge_connector_funcs +ffffffff82a44310 r radeon_vga_connector_funcs +ffffffff82a44388 r radeon_dvi_connector_funcs +ffffffff82a44400 r radeon_edp_connector_funcs +ffffffff82a44478 r radeon_tv_connector_funcs +ffffffff82a444f0 r radeon_lvds_connector_funcs +ffffffff82a45000 r radeon_family_name +ffffffff82a453f0 r radeon_px_quirk_list +ffffffff82a46000 r radeon_fb_funcs +ffffffff82a46018 r radeon_mode_funcs +ffffffff82a46060 r radeon_tmds_pll_enum_list +ffffffff82a46080 r radeon_tv_std_enum_list +ffffffff82a46100 r radeon_underscan_enum_list +ffffffff82a46130 r radeon_audio_enum_list +ffffffff82a46160 r radeon_dither_enum_list +ffffffff82a46180 r radeon_output_csc_enum_list +ffffffff82a461c0 r radeon_crtc_funcs +ffffffff82a46280 r hpd_names +ffffffff82a462b0 r encoder_names +ffffffff82a463e0 r radeon_afmt_init.eg_offsets +ffffffff82a47000 r aux_offset +ffffffff82a48000 R radeondrm_ca +ffffffff82a48030 r pciidlist +ffffffff82a4c1d0 r kms_driver +ffffffff82a4c2c0 r radeon_ioctls_kms +ffffffff82a4d000 r radeon_fb_helper_funcs +ffffffff82a4d008 r radeonfb_ops +ffffffff82a4e000 R radeon_fence_ops +ffffffff82a50000 R radeon_gem_object_funcs +ffffffff82a50060 r radeon_gem_vm_ops +ffffffff82a51000 r radeon_i2c_algo +ffffffff82a51010 r radeon_atom_i2c_algo +ffffffff82a52000 r legacy_helper_funcs +ffffffff82a53000 r radeon_backlight_ops +ffffffff82a53018 r radeon_legacy_lvds_enc_funcs +ffffffff82a53038 r radeon_legacy_lvds_helper_funcs +ffffffff82a530a0 r radeon_legacy_tmds_int_enc_funcs +ffffffff82a530c0 r radeon_legacy_tmds_int_helper_funcs +ffffffff82a53128 r radeon_legacy_primary_dac_enc_funcs +ffffffff82a53148 r radeon_legacy_primary_dac_helper_funcs +ffffffff82a531b0 r radeon_legacy_tv_dac_enc_funcs +ffffffff82a531d0 r radeon_legacy_tv_dac_helper_funcs +ffffffff82a53238 r radeon_legacy_tmds_ext_enc_funcs +ffffffff82a53258 r radeon_legacy_tmds_ext_helper_funcs +ffffffff82a54000 r SLOPE_value +ffffffff82a54030 r YCOEF_EN_value +ffffffff82a54060 r YCOEF_value +ffffffff82a54090 r available_tv_modes +ffffffff82a54110 r hor_timing_NTSC +ffffffff82a54150 r vert_timing_NTSC +ffffffff82a54190 r hor_timing_PAL +ffffffff82a541d0 r vert_timing_PAL +ffffffff82a56000 r radeon_pm_state_type_name +ffffffff82a57000 r radeon_evict_flags.placements +ffffffff82a5a000 r rs600_reg_safe_bm +ffffffff82a5c000 r rv515_reg_safe_bm +ffffffff82a5d000 r dll_speed_table +ffffffff82a5e000 r r7xx_golden_registers +ffffffff82a5e090 r r7xx_golden_dyn_gpr_registers +ffffffff82a5e100 r rv770ce_golden_registers +ffffffff82a5e160 r rv770_golden_registers +ffffffff82a5e1b0 r rv770_mgcg_init +ffffffff82a5e8f0 r rv730_golden_registers +ffffffff82a5e950 r rv730_mgcg_init +ffffffff82a5eee0 r rv710_golden_registers +ffffffff82a5ef30 r rv710_mgcg_init +ffffffff82a5f1d0 r rv740_golden_registers +ffffffff82a5f360 r rv740_mgcg_init +ffffffff82a61000 r rv730_smc_int_vectors +ffffffff82a61040 r rv710_smc_int_vectors +ffffffff82a61080 r rv740_smc_int_vectors +ffffffff82a610c0 r cypress_smc_int_vectors +ffffffff82a61100 r caicos_smc_int_vectors +ffffffff82a61140 r cayman_smc_int_vectors +ffffffff82a62000 r tahiti_io_mc_regs +ffffffff82a62120 r pitcairn_io_mc_regs +ffffffff82a62240 r verde_io_mc_regs +ffffffff82a62360 r oland_io_mc_regs +ffffffff82a62480 r hainan_io_mc_regs +ffffffff82a625a0 r crtc_offsets +ffffffff82a625c0 r si_disp_int_status +ffffffff82a625e0 r tahiti_golden_registers +ffffffff82a62760 r tahiti_golden_rlc_registers +ffffffff82a627b0 r tahiti_mgcg_cgcg_init +ffffffff82a62d98 r tahiti_golden_registers2 +ffffffff82a62db0 r pitcairn_golden_registers +ffffffff82a62f00 r pitcairn_golden_rlc_registers +ffffffff82a62f40 r pitcairn_mgcg_cgcg_init +ffffffff82a633b0 r verde_golden_registers +ffffffff82a63620 r verde_golden_rlc_registers +ffffffff82a63660 r verde_mgcg_cgcg_init +ffffffff82a63ae0 r oland_golden_registers +ffffffff82a63c30 r oland_golden_rlc_registers +ffffffff82a63c70 r oland_mgcg_cgcg_init +ffffffff82a64000 r hainan_golden_registers +ffffffff82a6412c r hainan_golden_registers2 +ffffffff82a64140 r hainan_mgcg_cgcg_init +ffffffff82a644b0 r verde_rlc_save_restore_register_list +ffffffff82a64820 r si_cs_data +ffffffff82a64840 r si_SECT_CONTEXT_defs +ffffffff82a648c0 r si_SECT_CONTEXT_def_1 +ffffffff82a64c10 r si_SECT_CONTEXT_def_3 +ffffffff82a64c30 r si_SECT_CONTEXT_def_4 +ffffffff82a64ea4 r si_SECT_CONTEXT_def_5 +ffffffff82a64ea8 r si_SECT_CONTEXT_def_6 +ffffffff82a64eb0 r si_SECT_CONTEXT_def_2 +ffffffff82a652f0 r si_SECT_CONTEXT_def_7 +ffffffff82a656a0 r mc_cg_registers +ffffffff82a656d0 r si_default_state +ffffffff82a66000 r cac_weights_tahiti +ffffffff82a664d0 r lcac_tahiti +ffffffff82a66ba0 r cac_override_tahiti +ffffffff82a66bb4 r powertune_data_tahiti +ffffffff82a66bf0 r dte_data_tahiti +ffffffff82a66cc0 r dte_data_new_zealand +ffffffff82a66d90 r dte_data_malta +ffffffff82a66e60 r lcac_pitcairn +ffffffff82a67530 r cac_override_pitcairn +ffffffff82a67544 r powertune_data_pitcairn +ffffffff82a67580 r lcac_cape_verde +ffffffff82a679d0 r cac_override_cape_verde +ffffffff82a679e4 r powertune_data_cape_verde +ffffffff82a67a20 r cac_weights_cape_verde_pro +ffffffff82a67ef0 r cac_weights_heathrow +ffffffff82a683c0 r cac_weights_chelsea_xt +ffffffff82a68890 r cac_weights_chelsea_pro +ffffffff82a68d60 r cac_weights_cape_verde +ffffffff82a69230 r cac_weights_mars_pro +ffffffff82a69700 r lcac_mars_pro +ffffffff82a69a60 r cac_override_oland +ffffffff82a69a74 r powertune_data_mars_pro +ffffffff82a69ab0 r cac_weights_mars_xt +ffffffff82a69f80 r cac_weights_oland_pro +ffffffff82a6a450 r cac_weights_oland_xt +ffffffff82a6a920 r lcac_oland +ffffffff82a6ac7c r powertune_data_oland +ffffffff82a6acb8 r dte_data_oland +ffffffff82a6ad90 r cac_weights_hainan +ffffffff82a6b254 r powertune_data_hainan +ffffffff82a6b290 r dte_data_aruba_pro +ffffffff82a6b360 r dte_data_tahiti_pro +ffffffff82a6b430 r dte_data_curacao_pro +ffffffff82a6b500 r dte_data_neptune_xt +ffffffff82a6b5d0 r dte_data_sun_xt +ffffffff82a6b6a0 r dte_data_venus_xtx +ffffffff82a6b770 r dte_data_venus_xt +ffffffff82a6b840 r dte_data_venus_pro +ffffffff82a6b910 r dte_data_mars_pro +ffffffff82a6c000 r si_program_jump_on_start.data +ffffffff82a6d000 r sumo_dtc +ffffffff82a6e000 r trinity_mgcg_shls_default +ffffffff82a6e380 r trinity_sysls_enable +ffffffff82a6e450 r trinity_sysls_disable +ffffffff82a70000 r GC_BASE +ffffffff82a700a8 r HDP_BASE +ffffffff82a70150 r MMHUB_BASE +ffffffff82a701f8 r ATHUB_BASE +ffffffff82a702a0 r NBIO_BASE +ffffffff82a70348 r MP0_BASE +ffffffff82a703f0 r MP1_BASE +ffffffff82a70498 r DF_BASE +ffffffff82a70540 r OSSSYS_BASE +ffffffff82a705e8 r SDMA0_BASE +ffffffff82a70690 r SDMA1_BASE +ffffffff82a70738 r SDMA2_BASE +ffffffff82a707e0 r SDMA3_BASE +ffffffff82a70888 r SDMA4_BASE +ffffffff82a70930 r SMUIO_BASE +ffffffff82a709d8 r THM_BASE +ffffffff82a70a80 r UMC_BASE +ffffffff82a70b28 r VCN_BASE +ffffffff82a71000 r amdgpu_afmt_predefined_acr +ffffffff82a72000 r atom_op_names +ffffffff82a723e0 r opcode_table +ffffffff82a72bd0 r atom_dst_to_src +ffffffff82a72c50 r atom_io_names +ffffffff82a72c80 r atom_table_names +ffffffff82a72ed0 r atom_iio_len +ffffffff82a73000 r object_connector_convert +ffffffff82a73058 R amdgpu_vbios_version_attr_group +ffffffff82a74000 r voltage_names +ffffffff82a74020 r pre_emph_names +ffffffff82a75000 r amdgpu_atombios_encoder_backlight_ops +ffffffff82a77000 r amdgpu_benchmark.common_modes +ffffffff82a78000 r amdgpu_cgs_ops +ffffffff82a79000 r amdgpu_connector_dp_helper_funcs +ffffffff82a79050 r amdgpu_connector_vga_helper_funcs +ffffffff82a790a0 r amdgpu_connector_dvi_helper_funcs +ffffffff82a790f0 r amdgpu_connector_lvds_helper_funcs +ffffffff82a79140 r amdgpu_connector_dp_funcs +ffffffff82a791c0 r amdgpu_connector_add_common_modes.common_modes +ffffffff82a79248 r amdgpu_connector_edp_funcs +ffffffff82a792c0 r amdgpu_connector_vga_funcs +ffffffff82a79338 r amdgpu_connector_dvi_funcs +ffffffff82a793b0 r amdgpu_connector_lvds_funcs +ffffffff82a7b000 R amdgpu_ctx_num_entities +ffffffff82a7c000 r amdgpu_kms_driver +ffffffff82a7c0f0 r amdgpu_device_ip_reinit_late_sriov.ip_order +ffffffff82a7d000 r hw_id_map +ffffffff82a7d090 r hw_id_names +ffffffff82a7e000 r hpd_names +ffffffff82a7e030 r encoder_names +ffffffff82a7e180 r dcc_retile_formats +ffffffff82a7e270 r dcc_formats +ffffffff82a7e360 R amdgpu_mode_funcs +ffffffff82a7e3b0 r amdgpu_underscan_enum_list +ffffffff82a7e3e0 r amdgpu_audio_enum_list +ffffffff82a7e410 r amdgpu_dither_enum_list +ffffffff82a7e430 r amdgpu_fb_funcs_atomic +ffffffff82a7e448 r amdgpu_fb_funcs +ffffffff82a7f000 R amdgpu_dmabuf_ops +ffffffff82a80000 R amdgpu_ioctls_kms +ffffffff82a80210 R amdgpu_ca +ffffffff82a80240 r pciidlist +ffffffff82a81130 r amdgpu_unsupported_pciidlist +ffffffff82a816b0 r amdgpu_kms_driver +ffffffff82a82000 r amdgpu_job_fence_ops +ffffffff82a82038 r amdgpu_fence_ops +ffffffff82a83000 r amdgpu_gem_object_funcs +ffffffff82a83060 r amdgpu_gem_vm_ops +ffffffff82a85000 R amdgpu_gtt_mgr_attr_group +ffffffff82a85018 r amdgpu_gtt_mgr_func +ffffffff82a86000 r amdgpu_atombios_i2c_algo +ffffffff82a87000 R amdgpu_sched_ops +ffffffff82a8a000 r amdgpu_vram_names +ffffffff82a8b000 r amdgpu_preempt_mgr_func +ffffffff82a8c000 R psp_ip_funcs +ffffffff82a8c0a0 R psp_v3_1_ip_block +ffffffff82a8c0b8 R psp_v10_0_ip_block +ffffffff82a8c0d0 R psp_v11_0_ip_block +ffffffff82a8c0e8 R psp_v11_0_8_ip_block +ffffffff82a8c100 R psp_v12_0_ip_block +ffffffff82a8c118 R psp_v13_0_ip_block +ffffffff82a8c130 R psp_v13_0_4_ip_block +ffffffff82a8e000 r amdgpu_evict_flags.placements +ffffffff82a92000 R amdgpu_vkms_ip_block +ffffffff82a94000 R amdgpu_vm_cpu_funcs +ffffffff82a96000 R amdgpu_vm_sdma_funcs +ffffffff82a97000 R amdgpu_vram_mgr_attr_group +ffffffff82a97018 r amdgpu_vram_mgr_func +ffffffff82a98000 r xgmi_pcs_err_status_reg_arct +ffffffff82a99000 r GC_BASE +ffffffff82a990c0 r HDP_BASE +ffffffff82a99180 r MMHUB_BASE +ffffffff82a99240 r ATHUB_BASE +ffffffff82a99300 r NBIF0_BASE +ffffffff82a993c0 r MP0_BASE +ffffffff82a99480 r MP1_BASE +ffffffff82a99540 r UVD_BASE +ffffffff82a99600 r DF_BASE +ffffffff82a996c0 r OSSSYS_BASE +ffffffff82a99780 r SDMA0_BASE +ffffffff82a99840 r SDMA1_BASE +ffffffff82a99900 r SDMA2_BASE +ffffffff82a999c0 r SDMA3_BASE +ffffffff82a99a80 r SDMA4_BASE +ffffffff82a99b40 r SDMA5_BASE +ffffffff82a99c00 r SDMA6_BASE +ffffffff82a99cc0 r SDMA7_BASE +ffffffff82a99d80 r SMUIO_BASE +ffffffff82a99e40 r THM_BASE +ffffffff82a99f00 r UMC_BASE +ffffffff82a99fc0 r RSMU_BASE +ffffffff82a9b000 r cz_ih_ip_funcs +ffffffff82a9b0a0 R cz_ih_ip_block +ffffffff82a9b0b8 r cz_ih_funcs +ffffffff82a9c000 r crtc_offsets +ffffffff82a9c020 r dce_v10_0_ip_funcs +ffffffff82a9c0c0 R dce_v10_0_ip_block +ffffffff82a9c0d8 R dce_v10_1_ip_block +ffffffff82a9c0f0 r dce_v10_0_display_funcs +ffffffff82a9c150 r hpd_offsets +ffffffff82a9c168 r dce_v10_0_encoder_funcs +ffffffff82a9c188 r dce_v10_0_dac_helper_funcs +ffffffff82a9c1f0 r dce_v10_0_dig_helper_funcs +ffffffff82a9c258 r dce_v10_0_ext_helper_funcs +ffffffff82a9c2c0 r dce_v10_0_audio_write_sad_regs.eld_reg_to_type +ffffffff82a9c2f0 r dce_v10_0_crtc_irq_funcs +ffffffff82a9c300 r dce_v10_0_pageflip_irq_funcs +ffffffff82a9c310 r dce_v10_0_hpd_irq_funcs +ffffffff82a9c320 r interrupt_status_offsets +ffffffff82a9c380 r dce_v10_0_crtc_funcs +ffffffff82a9c440 r dce_v10_0_crtc_helper_funcs +ffffffff82a9c4c0 r vga_control_regs +ffffffff82a9c4e0 r dig_offsets +ffffffff82a9c500 r pin_offsets +ffffffff82a9c520 r fiji_mgcg_cgcg_init +ffffffff82a9c540 r golden_settings_fiji_a10 +ffffffff82a9c570 r tonga_mgcg_cgcg_init +ffffffff82a9c590 r golden_settings_tonga_a11 ffffffff82a9d000 r crtc_offsets -ffffffff82a9d020 r dce_v10_0_ip_funcs -ffffffff82a9d0c0 R dce_v10_0_ip_block -ffffffff82a9d0d8 R dce_v10_1_ip_block -ffffffff82a9d0f0 r dce_v10_0_display_funcs +ffffffff82a9d020 r dce_v11_0_ip_funcs +ffffffff82a9d0c0 R dce_v11_0_ip_block +ffffffff82a9d0d8 R dce_v11_2_ip_block +ffffffff82a9d0f0 r dce_v11_0_display_funcs ffffffff82a9d150 r hpd_offsets -ffffffff82a9d168 r dce_v10_0_encoder_funcs -ffffffff82a9d188 r dce_v10_0_dac_helper_funcs -ffffffff82a9d1f0 r dce_v10_0_dig_helper_funcs -ffffffff82a9d258 r dce_v10_0_ext_helper_funcs -ffffffff82a9d2c0 r dce_v10_0_audio_write_sad_regs.eld_reg_to_type -ffffffff82a9d2f0 r dce_v10_0_crtc_irq_funcs -ffffffff82a9d300 r dce_v10_0_pageflip_irq_funcs -ffffffff82a9d310 r dce_v10_0_hpd_irq_funcs +ffffffff82a9d168 r dce_v11_0_encoder_funcs +ffffffff82a9d188 r dce_v11_0_dac_helper_funcs +ffffffff82a9d1f0 r dce_v11_0_dig_helper_funcs +ffffffff82a9d258 r dce_v11_0_ext_helper_funcs +ffffffff82a9d2c0 r dce_v11_0_audio_write_sad_regs.eld_reg_to_type +ffffffff82a9d2f0 r dce_v11_0_crtc_irq_funcs +ffffffff82a9d300 r dce_v11_0_pageflip_irq_funcs +ffffffff82a9d310 r dce_v11_0_hpd_irq_funcs ffffffff82a9d320 r interrupt_status_offsets -ffffffff82a9d380 r dce_v10_0_crtc_funcs -ffffffff82a9d440 r dce_v10_0_crtc_helper_funcs +ffffffff82a9d380 r dce_v11_0_crtc_funcs +ffffffff82a9d440 r dce_v11_0_crtc_helper_funcs ffffffff82a9d4c0 r vga_control_regs ffffffff82a9d4e0 r dig_offsets -ffffffff82a9d500 r pin_offsets -ffffffff82a9d520 r fiji_mgcg_cgcg_init -ffffffff82a9d540 r golden_settings_fiji_a10 -ffffffff82a9d570 r tonga_mgcg_cgcg_init -ffffffff82a9d590 r golden_settings_tonga_a11 -ffffffff82a9e000 r crtc_offsets -ffffffff82a9e020 r dce_v11_0_ip_funcs -ffffffff82a9e0c0 R dce_v11_0_ip_block -ffffffff82a9e0d8 R dce_v11_2_ip_block -ffffffff82a9e0f0 r dce_v11_0_display_funcs -ffffffff82a9e150 r hpd_offsets -ffffffff82a9e168 r dce_v11_0_encoder_funcs -ffffffff82a9e188 r dce_v11_0_dac_helper_funcs -ffffffff82a9e1f0 r dce_v11_0_dig_helper_funcs -ffffffff82a9e258 r dce_v11_0_ext_helper_funcs -ffffffff82a9e2c0 r dce_v11_0_audio_write_sad_regs.eld_reg_to_type -ffffffff82a9e2f0 r dce_v11_0_crtc_irq_funcs -ffffffff82a9e300 r dce_v11_0_pageflip_irq_funcs -ffffffff82a9e310 r dce_v11_0_hpd_irq_funcs -ffffffff82a9e320 r interrupt_status_offsets -ffffffff82a9e380 r dce_v11_0_crtc_funcs -ffffffff82a9e440 r dce_v11_0_crtc_helper_funcs -ffffffff82a9e4c0 r vga_control_regs -ffffffff82a9e4e0 r dig_offsets -ffffffff82a9e510 r cz_mgcg_cgcg_init -ffffffff82a9e530 r cz_golden_settings_a11 -ffffffff82a9e550 r stoney_golden_settings_a11 -ffffffff82a9e570 r polaris11_golden_settings_a11 -ffffffff82a9e5b0 r polaris10_golden_settings_a11 -ffffffff82a9f000 R df_v1_7_funcs -ffffffff82a9f070 r df_v1_7_channel_number -ffffffff82aa0000 R df_v3_6_funcs -ffffffff82aa0070 r df_v3_6_channel_number -ffffffff82aa1000 r GC_BASE -ffffffff82aa10a8 r HDP_BASE -ffffffff82aa1150 r MMHUB_BASE -ffffffff82aa11f8 r ATHUB_BASE -ffffffff82aa12a0 r NBIO_BASE -ffffffff82aa1348 r MP0_BASE -ffffffff82aa13f0 r MP1_BASE -ffffffff82aa1498 r VCN0_BASE -ffffffff82aa1540 r DF_BASE -ffffffff82aa15e8 r DCN_BASE -ffffffff82aa1690 r OSSSYS_BASE -ffffffff82aa1738 r SMUIO_BASE -ffffffff82aa17e0 r THM_BASE -ffffffff82aa2000 r gfx_v10_0_ip_funcs -ffffffff82aa20a0 R gfx_v10_0_ip_block -ffffffff82aa20b8 r gfx_v10_0_kiq_pm4_funcs -ffffffff82aa20f8 r gfx_v10_0_ring_funcs_kiq -ffffffff82aa2218 r gfx_v10_0_ring_funcs_gfx -ffffffff82aa2338 r gfx_v10_0_ring_funcs_compute -ffffffff82aa2458 r gfx_v10_0_eop_irq_funcs -ffffffff82aa2468 r gfx_v10_0_kiq_irq_funcs -ffffffff82aa2478 r gfx_v10_0_priv_reg_irq_funcs -ffffffff82aa2488 r gfx_v10_0_priv_inst_irq_funcs -ffffffff82aa2498 r gfx_v10_0_rlc_funcs -ffffffff82aa2500 r gfx_v10_0_rlc_funcs_sriov -ffffffff82aa2570 r gfx10_cs_data -ffffffff82aa2590 r gfx10_SECT_CONTEXT_defs -ffffffff82aa2620 r gfx10_SECT_CONTEXT_def_1 -ffffffff82aa2980 r gfx10_SECT_CONTEXT_def_3 -ffffffff82aa2990 r gfx10_SECT_CONTEXT_def_4 -ffffffff82aa2c08 r gfx10_SECT_CONTEXT_def_5 -ffffffff82aa2c10 r gfx10_SECT_CONTEXT_def_6 -ffffffff82aa2c20 r gfx10_SECT_CONTEXT_def_2 -ffffffff82aa3060 r gfx10_SECT_CONTEXT_def_7 -ffffffff82aa3170 r gfx10_SECT_CONTEXT_def_8 -ffffffff82aa34a0 r gfx_v10_0_gfx_funcs -ffffffff82aa34e0 r golden_settings_gc_rlc_spm_10_0_nv10 -ffffffff82aa9780 r golden_settings_gc_rlc_spm_10_1_nv14 -ffffffff82aad1a0 r golden_settings_gc_rlc_spm_10_1_2_nv12 -ffffffff82ab3440 r golden_settings_gc_10_1 -ffffffff82ab3800 r golden_settings_gc_10_0_nv10 -ffffffff82ab3800 r golden_settings_gc_10_1_1 -ffffffff82ab3b90 r golden_settings_gc_10_1_2 -ffffffff82ab3b90 r golden_settings_gc_10_1_nv14 -ffffffff82ab3f80 r golden_settings_gc_10_1_2_nv12 -ffffffff82ab3f80 r golden_settings_gc_10_3 -ffffffff82ab4388 r golden_settings_gc_10_3_sienna_cichlid -ffffffff82ab4390 r golden_settings_gc_10_3_2 -ffffffff82ab4780 r golden_settings_gc_10_3_vangogh -ffffffff82ab49e0 r golden_settings_gc_10_3_3 -ffffffff82ab4bc0 r golden_settings_gc_10_3_4 -ffffffff82ab4f20 r golden_settings_gc_10_3_5 -ffffffff82ab5220 r golden_settings_gc_10_0_cyan_skillfish -ffffffff82ab5550 r golden_settings_gc_10_3_6 -ffffffff82ab5760 r golden_settings_gc_10_3_7 -ffffffff82ab6000 r gfx_v11_0_ip_funcs -ffffffff82ab60a0 R gfx_v11_0_ip_block -ffffffff82ab60b8 r gfx_v11_0_kiq_pm4_funcs -ffffffff82ab60f8 r gfx_v11_0_ring_funcs_kiq -ffffffff82ab6218 r gfx_v11_0_ring_funcs_gfx -ffffffff82ab6338 r gfx_v11_0_ring_funcs_compute -ffffffff82ab6458 r gfx_v11_0_eop_irq_funcs -ffffffff82ab6468 r gfx_v11_0_priv_reg_irq_funcs -ffffffff82ab6478 r gfx_v11_0_priv_inst_irq_funcs -ffffffff82ab6488 r gfx_v11_0_rlc_funcs -ffffffff82ab64f0 r gfx11_cs_data -ffffffff82ab6510 r gfx11_SECT_CONTEXT_defs -ffffffff82ab6590 r gfx11_SECT_CONTEXT_def_1 -ffffffff82ab68f0 r gfx11_SECT_CONTEXT_def_3 -ffffffff82ab6900 r gfx11_SECT_CONTEXT_def_5 -ffffffff82ab6908 r gfx11_SECT_CONTEXT_def_6 -ffffffff82ab6910 r gfx11_SECT_CONTEXT_def_2 -ffffffff82ab6d50 r gfx11_SECT_CONTEXT_def_4 -ffffffff82ab6fd0 r gfx11_SECT_CONTEXT_def_7 -ffffffff82ab7438 r gfx_v11_0_gfx_funcs -ffffffff82ab7480 r golden_settings_gc_11_0_1 -ffffffff82ab8000 r gfx_v8_0_ip_funcs -ffffffff82ab80a0 R gfx_v8_0_ip_block -ffffffff82ab80b8 R gfx_v8_1_ip_block -ffffffff82ab80d0 r gfx_v8_0_gfx_funcs -ffffffff82ab8110 r gfx_v8_0_ring_funcs_kiq -ffffffff82ab8230 r gfx_v8_0_ring_funcs_gfx -ffffffff82ab8350 r gfx_v8_0_ring_funcs_compute -ffffffff82ab8470 r amdgpu_gds_reg_offset -ffffffff82ab8570 r gfx_v8_0_eop_irq_funcs -ffffffff82ab8580 r gfx_v8_0_priv_reg_irq_funcs -ffffffff82ab8590 r gfx_v8_0_priv_inst_irq_funcs -ffffffff82ab85a0 r gfx_v8_0_cp_ecc_error_irq_funcs -ffffffff82ab85b0 r gfx_v8_0_sq_irq_funcs -ffffffff82ab85c0 r sq_edc_source_names -ffffffff82ab85f8 r iceland_rlc_funcs -ffffffff82ab8660 r vi_cs_data -ffffffff82ab8680 r vi_SECT_CONTEXT_defs -ffffffff82ab8700 r vi_SECT_CONTEXT_def_1 -ffffffff82ab8a50 r vi_SECT_CONTEXT_def_3 -ffffffff82ab8a70 r vi_SECT_CONTEXT_def_4 -ffffffff82ab8ce4 r vi_SECT_CONTEXT_def_5 -ffffffff82ab8cec r vi_SECT_CONTEXT_def_6 -ffffffff82ab8cf0 r vi_SECT_CONTEXT_def_2 -ffffffff82ab9140 r vi_SECT_CONTEXT_def_7 -ffffffff82ab94f0 r vgpr_init_compute_shader -ffffffff82ab9600 r vgpr_init_regs -ffffffff82ab9690 r sgpr1_init_regs -ffffffff82ab9720 r sgpr2_init_regs -ffffffff82ab97b0 r sec_ded_counter_registers -ffffffff82ab9820 r iceland_mgcg_cgcg_init -ffffffff82ab9b20 r golden_settings_iceland_a11 -ffffffff82ab9be0 r iceland_golden_common_all -ffffffff82ab9c40 r fiji_mgcg_cgcg_init -ffffffff82ab9df0 r golden_settings_fiji_a10 -ffffffff82ab9e80 r fiji_golden_common_all -ffffffff82ab9f00 r tonga_mgcg_cgcg_init -ffffffff82aba290 r golden_settings_tonga_a11 -ffffffff82aba350 r tonga_golden_common_all -ffffffff82aba3b0 r golden_settings_vegam_a11 -ffffffff82aba480 r vegam_golden_common_all -ffffffff82aba4d0 r golden_settings_polaris11_a11 -ffffffff82aba5a0 r polaris11_golden_common_all -ffffffff82aba5f0 r golden_settings_polaris10_a11 -ffffffff82aba6c0 r polaris10_golden_common_all -ffffffff82aba720 r cz_mgcg_cgcg_init -ffffffff82abaab0 r cz_golden_settings_a11 -ffffffff82abab40 r cz_golden_common_all -ffffffff82ababa0 r stoney_mgcg_cgcg_init -ffffffff82ababe0 r stoney_golden_settings_a11 -ffffffff82abac60 r stoney_golden_common_all -ffffffff82abb000 R gfx_v9_0_ras_ops -ffffffff82abb040 r gfx_v9_0_ip_funcs -ffffffff82abb0e0 R gfx_v9_0_ip_block -ffffffff82abb100 r ras_gfx_subblocks -ffffffff82abbb80 r gfx_v9_0_edc_counter_regs -ffffffff82abbf20 r gfx_v9_0_ras_fields -ffffffff82abd000 r gfx_v9_0_kiq_pm4_funcs -ffffffff82abd040 r gfx_v9_0_ring_funcs_kiq -ffffffff82abd160 r gfx_v9_0_ring_funcs_gfx -ffffffff82abd280 r gfx_v9_0_ring_funcs_compute -ffffffff82abd3a0 r gfx_v9_0_eop_irq_funcs -ffffffff82abd3b0 r gfx_v9_0_priv_reg_irq_funcs -ffffffff82abd3c0 r gfx_v9_0_priv_inst_irq_funcs -ffffffff82abd3d0 r gfx_v9_0_cp_ecc_error_irq_funcs -ffffffff82abd3e0 r gfx_v9_0_rlc_funcs -ffffffff82abd450 r gfx9_cs_data -ffffffff82abd470 r gfx9_SECT_CONTEXT_defs -ffffffff82abd500 r gfx9_SECT_CONTEXT_def_1 -ffffffff82abd850 r gfx9_SECT_CONTEXT_def_3 -ffffffff82abd860 r gfx9_SECT_CONTEXT_def_4 -ffffffff82abdad4 r gfx9_SECT_CONTEXT_def_5 -ffffffff82abdadc r gfx9_SECT_CONTEXT_def_6 -ffffffff82abdae0 r gfx9_SECT_CONTEXT_def_7 -ffffffff82abdbf0 r gfx9_SECT_CONTEXT_def_2 -ffffffff82abe060 r gfx9_SECT_CONTEXT_def_8 -ffffffff82abe2d0 r vgpr_init_compute_shader_arcturus -ffffffff82abeb60 r vgpr_init_regs_arcturus -ffffffff82abecf0 r vgpr_init_regs -ffffffff82abee80 r sgpr1_init_regs -ffffffff82abf010 r sgpr2_init_regs -ffffffff82abf198 r gfx_v9_0_gfx_funcs -ffffffff82abf1e0 r golden_settings_gc_9_0 -ffffffff82abf3c0 r golden_settings_gc_9_0_vg10 -ffffffff82abf570 r golden_settings_gc_9_2_1 -ffffffff82abf6f0 r golden_settings_gc_9_2_1_vg12 -ffffffff82abf830 r golden_settings_gc_9_0_vg20 -ffffffff82abf940 r golden_settings_gc_9_4_1_arct -ffffffff82abfa50 r golden_settings_gc_9_1 -ffffffff82abfc90 r golden_settings_gc_9_1_rv2 -ffffffff82abfe60 r golden_settings_gc_9_1_rv1 -ffffffff82abff10 r golden_settings_gc_9_1_rn -ffffffff82ac0030 r golden_settings_gc_9_x_common -ffffffff82ac1000 R gfx_v9_4_ras_ops -ffffffff82ac1040 r gfx_v9_4_edc_counter_regs -ffffffff82ac1420 r gfx_v9_4_ras_fields -ffffffff82ac3000 R vgpr_init_regs_aldebaran -ffffffff82ac31b0 R sgpr112_init_regs_aldebaran -ffffffff82ac3360 R sgpr96_init_regs_aldebaran -ffffffff82ac3510 R sgpr64_init_regs_aldebaran -ffffffff82ac36c0 r golden_settings_gc_9_4_2_alde -ffffffff82ac3720 r golden_settings_gc_9_4_2_alde_die_0 -ffffffff82ac37b0 r golden_settings_gc_9_4_2_alde_die_1 -ffffffff82ac3840 r sgpr112_init_compute_shader_aldebaran -ffffffff82ac3a60 r sgpr96_init_compute_shader_aldebaran -ffffffff82ac3c50 r sgpr64_init_compute_shader_aldebaran -ffffffff82ac3dc0 r vgpr_init_compute_shader_aldebaran -ffffffff82ac46a0 r gfx_v9_4_2_edc_counter_regs -ffffffff82ac4a20 r gfx_v9_4_2_ras_fields -ffffffff82ac63c0 r gfx_v9_4_2_utc_blocks -ffffffff82ac7000 R gfxhub_v1_0_funcs -ffffffff82ac8000 R gfxhub_v2_0_funcs -ffffffff82ac8060 r gfxhub_v2_0_vmhub_funcs +ffffffff82a9d510 r cz_mgcg_cgcg_init +ffffffff82a9d530 r cz_golden_settings_a11 +ffffffff82a9d550 r stoney_golden_settings_a11 +ffffffff82a9d570 r polaris11_golden_settings_a11 +ffffffff82a9d5b0 r polaris10_golden_settings_a11 +ffffffff82a9e000 R df_v1_7_funcs +ffffffff82a9e070 r df_v1_7_channel_number +ffffffff82a9f000 R df_v3_6_funcs +ffffffff82a9f070 r df_v3_6_channel_number +ffffffff82aa0000 r GC_BASE +ffffffff82aa00a8 r HDP_BASE +ffffffff82aa0150 r MMHUB_BASE +ffffffff82aa01f8 r ATHUB_BASE +ffffffff82aa02a0 r NBIO_BASE +ffffffff82aa0348 r MP0_BASE +ffffffff82aa03f0 r MP1_BASE +ffffffff82aa0498 r VCN0_BASE +ffffffff82aa0540 r DF_BASE +ffffffff82aa05e8 r DCN_BASE +ffffffff82aa0690 r OSSSYS_BASE +ffffffff82aa0738 r SMUIO_BASE +ffffffff82aa07e0 r THM_BASE +ffffffff82aa1000 r gfx_v10_0_ip_funcs +ffffffff82aa10a0 R gfx_v10_0_ip_block +ffffffff82aa10b8 r gfx_v10_0_kiq_pm4_funcs +ffffffff82aa10f8 r gfx_v10_0_ring_funcs_kiq +ffffffff82aa1218 r gfx_v10_0_ring_funcs_gfx +ffffffff82aa1338 r gfx_v10_0_ring_funcs_compute +ffffffff82aa1458 r gfx_v10_0_eop_irq_funcs +ffffffff82aa1468 r gfx_v10_0_kiq_irq_funcs +ffffffff82aa1478 r gfx_v10_0_priv_reg_irq_funcs +ffffffff82aa1488 r gfx_v10_0_priv_inst_irq_funcs +ffffffff82aa1498 r gfx_v10_0_rlc_funcs +ffffffff82aa1500 r gfx_v10_0_rlc_funcs_sriov +ffffffff82aa1570 r gfx10_cs_data +ffffffff82aa1590 r gfx10_SECT_CONTEXT_defs +ffffffff82aa1620 r gfx10_SECT_CONTEXT_def_1 +ffffffff82aa1980 r gfx10_SECT_CONTEXT_def_3 +ffffffff82aa1990 r gfx10_SECT_CONTEXT_def_4 +ffffffff82aa1c08 r gfx10_SECT_CONTEXT_def_5 +ffffffff82aa1c10 r gfx10_SECT_CONTEXT_def_6 +ffffffff82aa1c20 r gfx10_SECT_CONTEXT_def_2 +ffffffff82aa2060 r gfx10_SECT_CONTEXT_def_7 +ffffffff82aa2170 r gfx10_SECT_CONTEXT_def_8 +ffffffff82aa24a0 r gfx_v10_0_gfx_funcs +ffffffff82aa24e0 r golden_settings_gc_rlc_spm_10_0_nv10 +ffffffff82aa8780 r golden_settings_gc_rlc_spm_10_1_nv14 +ffffffff82aac1a0 r golden_settings_gc_rlc_spm_10_1_2_nv12 +ffffffff82ab2440 r golden_settings_gc_10_1 +ffffffff82ab2800 r golden_settings_gc_10_0_nv10 +ffffffff82ab2800 r golden_settings_gc_10_1_1 +ffffffff82ab2b90 r golden_settings_gc_10_1_2 +ffffffff82ab2b90 r golden_settings_gc_10_1_nv14 +ffffffff82ab2f80 r golden_settings_gc_10_1_2_nv12 +ffffffff82ab2f80 r golden_settings_gc_10_3 +ffffffff82ab3388 r golden_settings_gc_10_3_sienna_cichlid +ffffffff82ab3390 r golden_settings_gc_10_3_2 +ffffffff82ab3780 r golden_settings_gc_10_3_vangogh +ffffffff82ab39e0 r golden_settings_gc_10_3_3 +ffffffff82ab3bc0 r golden_settings_gc_10_3_4 +ffffffff82ab3f20 r golden_settings_gc_10_3_5 +ffffffff82ab4220 r golden_settings_gc_10_0_cyan_skillfish +ffffffff82ab4550 r golden_settings_gc_10_3_6 +ffffffff82ab4760 r golden_settings_gc_10_3_7 +ffffffff82ab5000 r gfx_v11_0_ip_funcs +ffffffff82ab50a0 R gfx_v11_0_ip_block +ffffffff82ab50b8 r gfx_v11_0_kiq_pm4_funcs +ffffffff82ab50f8 r gfx_v11_0_ring_funcs_kiq +ffffffff82ab5218 r gfx_v11_0_ring_funcs_gfx +ffffffff82ab5338 r gfx_v11_0_ring_funcs_compute +ffffffff82ab5458 r gfx_v11_0_eop_irq_funcs +ffffffff82ab5468 r gfx_v11_0_priv_reg_irq_funcs +ffffffff82ab5478 r gfx_v11_0_priv_inst_irq_funcs +ffffffff82ab5488 r gfx_v11_0_rlc_funcs +ffffffff82ab54f0 r gfx11_cs_data +ffffffff82ab5510 r gfx11_SECT_CONTEXT_defs +ffffffff82ab5590 r gfx11_SECT_CONTEXT_def_1 +ffffffff82ab58f0 r gfx11_SECT_CONTEXT_def_3 +ffffffff82ab5900 r gfx11_SECT_CONTEXT_def_5 +ffffffff82ab5908 r gfx11_SECT_CONTEXT_def_6 +ffffffff82ab5910 r gfx11_SECT_CONTEXT_def_2 +ffffffff82ab5d50 r gfx11_SECT_CONTEXT_def_4 +ffffffff82ab5fd0 r gfx11_SECT_CONTEXT_def_7 +ffffffff82ab6438 r gfx_v11_0_gfx_funcs +ffffffff82ab6480 r golden_settings_gc_11_0_1 +ffffffff82ab7000 r gfx_v8_0_ip_funcs +ffffffff82ab70a0 R gfx_v8_0_ip_block +ffffffff82ab70b8 R gfx_v8_1_ip_block +ffffffff82ab70d0 r gfx_v8_0_gfx_funcs +ffffffff82ab7110 r gfx_v8_0_ring_funcs_kiq +ffffffff82ab7230 r gfx_v8_0_ring_funcs_gfx +ffffffff82ab7350 r gfx_v8_0_ring_funcs_compute +ffffffff82ab7470 r amdgpu_gds_reg_offset +ffffffff82ab7570 r gfx_v8_0_eop_irq_funcs +ffffffff82ab7580 r gfx_v8_0_priv_reg_irq_funcs +ffffffff82ab7590 r gfx_v8_0_priv_inst_irq_funcs +ffffffff82ab75a0 r gfx_v8_0_cp_ecc_error_irq_funcs +ffffffff82ab75b0 r gfx_v8_0_sq_irq_funcs +ffffffff82ab75c0 r sq_edc_source_names +ffffffff82ab75f8 r iceland_rlc_funcs +ffffffff82ab7660 r vi_cs_data +ffffffff82ab7680 r vi_SECT_CONTEXT_defs +ffffffff82ab7700 r vi_SECT_CONTEXT_def_1 +ffffffff82ab7a50 r vi_SECT_CONTEXT_def_3 +ffffffff82ab7a70 r vi_SECT_CONTEXT_def_4 +ffffffff82ab7ce4 r vi_SECT_CONTEXT_def_5 +ffffffff82ab7cec r vi_SECT_CONTEXT_def_6 +ffffffff82ab7cf0 r vi_SECT_CONTEXT_def_2 +ffffffff82ab8140 r vi_SECT_CONTEXT_def_7 +ffffffff82ab84f0 r vgpr_init_compute_shader +ffffffff82ab8600 r vgpr_init_regs +ffffffff82ab8690 r sgpr1_init_regs +ffffffff82ab8720 r sgpr2_init_regs +ffffffff82ab87b0 r sec_ded_counter_registers +ffffffff82ab8820 r iceland_mgcg_cgcg_init +ffffffff82ab8b20 r golden_settings_iceland_a11 +ffffffff82ab8be0 r iceland_golden_common_all +ffffffff82ab8c40 r fiji_mgcg_cgcg_init +ffffffff82ab8df0 r golden_settings_fiji_a10 +ffffffff82ab8e80 r fiji_golden_common_all +ffffffff82ab8f00 r tonga_mgcg_cgcg_init +ffffffff82ab9290 r golden_settings_tonga_a11 +ffffffff82ab9350 r tonga_golden_common_all +ffffffff82ab93b0 r golden_settings_vegam_a11 +ffffffff82ab9480 r vegam_golden_common_all +ffffffff82ab94d0 r golden_settings_polaris11_a11 +ffffffff82ab95a0 r polaris11_golden_common_all +ffffffff82ab95f0 r golden_settings_polaris10_a11 +ffffffff82ab96c0 r polaris10_golden_common_all +ffffffff82ab9720 r cz_mgcg_cgcg_init +ffffffff82ab9ab0 r cz_golden_settings_a11 +ffffffff82ab9b40 r cz_golden_common_all +ffffffff82ab9ba0 r stoney_mgcg_cgcg_init +ffffffff82ab9be0 r stoney_golden_settings_a11 +ffffffff82ab9c60 r stoney_golden_common_all +ffffffff82aba000 R gfx_v9_0_ras_ops +ffffffff82aba040 r gfx_v9_0_ip_funcs +ffffffff82aba0e0 R gfx_v9_0_ip_block +ffffffff82aba100 r ras_gfx_subblocks +ffffffff82abab80 r gfx_v9_0_edc_counter_regs +ffffffff82abaf20 r gfx_v9_0_ras_fields +ffffffff82abc000 r gfx_v9_0_kiq_pm4_funcs +ffffffff82abc040 r gfx_v9_0_ring_funcs_kiq +ffffffff82abc160 r gfx_v9_0_ring_funcs_gfx +ffffffff82abc280 r gfx_v9_0_ring_funcs_compute +ffffffff82abc3a0 r gfx_v9_0_eop_irq_funcs +ffffffff82abc3b0 r gfx_v9_0_priv_reg_irq_funcs +ffffffff82abc3c0 r gfx_v9_0_priv_inst_irq_funcs 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r gfx_v9_4_2_edc_counter_regs +ffffffff82ac3a20 r gfx_v9_4_2_ras_fields +ffffffff82ac53c0 r gfx_v9_4_2_utc_blocks +ffffffff82ac6000 R gfxhub_v1_0_funcs +ffffffff82ac7000 R gfxhub_v2_0_funcs +ffffffff82ac7060 r gfxhub_v2_0_vmhub_funcs +ffffffff82ac7070 r gfxhub_client_ids +ffffffff82ac8000 R gfxhub_v2_1_funcs +ffffffff82ac8060 r gfxhub_v2_1_vmhub_funcs ffffffff82ac8070 r gfxhub_client_ids -ffffffff82ac9000 R gfxhub_v2_1_funcs -ffffffff82ac9060 r gfxhub_v2_1_vmhub_funcs +ffffffff82ac9000 R gfxhub_v3_0_funcs +ffffffff82ac9060 r gfxhub_v3_0_vmhub_funcs ffffffff82ac9070 r gfxhub_client_ids -ffffffff82aca000 R gfxhub_v3_0_funcs -ffffffff82aca060 r gfxhub_v3_0_vmhub_funcs +ffffffff82aca000 R gfxhub_v3_0_3_funcs +ffffffff82aca060 r gfxhub_v3_0_3_vmhub_funcs ffffffff82aca070 r gfxhub_client_ids -ffffffff82acb000 R gfxhub_v3_0_3_funcs -ffffffff82acb060 r gfxhub_v3_0_3_vmhub_funcs -ffffffff82acb070 r gfxhub_client_ids -ffffffff82acc000 R gmc_v10_0_ip_funcs -ffffffff82acc0a0 R gmc_v10_0_ip_block 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mes_v11_0_ip_block -ffffffff82ae40b8 r mes_v11_0_funcs -ffffffff82ae40e8 r mes_v11_0_ring_funcs -ffffffff82ae5000 R mmhub_v1_0_funcs -ffffffff82ae5050 r mmhub_v1_0_edc_cnt_regs -ffffffff82ae50c0 r mmhub_v1_0_ras_fields -ffffffff82ae6000 R mmhub_v1_7_funcs -ffffffff82ae6050 r mmhub_v1_7_edc_cnt_regs -ffffffff82ae6250 r mmhub_v1_7_ras_fields -ffffffff82ae79c0 r mmhub_v1_7_ea_err_status_regs -ffffffff82ae8000 R mmhub_v2_0_funcs -ffffffff82ae8050 r mmhub_v2_0_vmhub_funcs -ffffffff82ae8060 r mmhub_client_ids_navi1x -ffffffff82ae8190 r mmhub_client_ids_sienna_cichlid -ffffffff82ae8450 r mmhub_client_ids_beige_goby -ffffffff82ae9000 R mmhub_v2_3_funcs -ffffffff82ae9050 r mmhub_v2_3_vmhub_funcs -ffffffff82ae9060 r mmhub_client_ids_vangogh -ffffffff82aea000 R mmhub_v3_0_funcs -ffffffff82aea050 r mmhub_v3_0_vmhub_funcs -ffffffff82aea060 r mmhub_client_ids_v3_0_0 -ffffffff82aeb000 R mmhub_v3_0_1_funcs -ffffffff82aeb050 r mmhub_v3_0_1_vmhub_funcs -ffffffff82aeb060 r mmhub_client_ids_v3_0_1 -ffffffff82aec000 R mmhub_v3_0_2_funcs -ffffffff82aec050 r mmhub_v3_0_2_vmhub_funcs -ffffffff82aec060 r mmhub_client_ids_v3_0_2 -ffffffff82aed000 R mmhub_v9_4_ras_hw_ops -ffffffff82aed040 R mmhub_v9_4_funcs -ffffffff82aed090 r mmhub_v9_4_edc_cnt_regs -ffffffff82aed330 r mmhub_v9_4_ras_fields -ffffffff82aef3b0 r mmhub_v9_4_err_status_regs -ffffffff82af0000 r xgpu_ai_mailbox_ack_irq_funcs -ffffffff82af0010 r xgpu_ai_mailbox_rcv_irq_funcs -ffffffff82af0020 R xgpu_ai_virt_ops -ffffffff82af1000 r xgpu_nv_mailbox_ack_irq_funcs -ffffffff82af1010 r xgpu_nv_mailbox_rcv_irq_funcs -ffffffff82af1020 R xgpu_nv_virt_ops -ffffffff82af2000 r xgpu_fiji_mgcg_cgcg_init -ffffffff82af2240 r xgpu_fiji_golden_settings_a10 -ffffffff82af2370 r xgpu_fiji_golden_common_all -ffffffff82af23f0 r xgpu_tonga_mgcg_cgcg_init -ffffffff82af2810 r xgpu_tonga_golden_settings_a11 -ffffffff82af29d0 r xgpu_tonga_golden_common_all -ffffffff82af2a28 r xgpu_vi_mailbox_ack_irq_funcs -ffffffff82af2a38 r xgpu_vi_mailbox_rcv_irq_funcs -ffffffff82af2a48 R xgpu_vi_virt_ops -ffffffff82af3000 r navi10_ih_ip_funcs -ffffffff82af30a0 R navi10_ih_ip_block -ffffffff82af30b8 r navi10_ih_funcs -ffffffff82af30d8 r navi10_ih_self_irq_funcs -ffffffff82af4000 R nbio_v2_3_hdp_flush_reg -ffffffff82af4048 R nbio_v2_3_funcs -ffffffff82af5000 R nbio_v4_3_hdp_flush_reg -ffffffff82af5048 R nbio_v4_3_funcs -ffffffff82af5130 R nbio_v4_3_sriov_funcs -ffffffff82af6000 R nbio_v6_1_hdp_flush_reg -ffffffff82af6048 R nbio_v6_1_funcs -ffffffff82af7000 R nbio_v7_0_hdp_flush_reg -ffffffff82af7048 R nbio_v7_0_funcs -ffffffff82af8000 R nbio_v7_2_hdp_flush_reg -ffffffff82af8048 R nbio_v7_2_funcs -ffffffff82af9000 R nbio_v7_4_hdp_flush_reg -ffffffff82af9048 R nbio_v7_4_ras_hw_ops -ffffffff82af9088 R nbio_v7_4_funcs -ffffffff82af9170 r nbio_v7_4_ras_controller_irq_funcs -ffffffff82af9180 r nbio_v7_4_ras_err_event_athub_irq_funcs -ffffffff82afa000 R nbio_v7_7_hdp_flush_reg -ffffffff82afa048 R nbio_v7_7_funcs -ffffffff82afb000 r nv_common_ip_funcs -ffffffff82afb0a0 R nv_common_ip_block -ffffffff82afb0b8 r nv_asic_funcs -ffffffff82afb170 r nv_allowed_read_registers -ffffffff82afb2f0 r nv_video_codecs_encode -ffffffff82afb300 r sc_video_codecs_decode -ffffffff82afb310 r yc_video_codecs_decode -ffffffff82afb320 r bg_video_codecs_encode -ffffffff82afb330 r bg_video_codecs_decode -ffffffff82afb340 r nv_video_codecs_decode -ffffffff82afb350 r nv_video_codecs_encode_array -ffffffff82afb380 r sc_video_codecs_decode_array -ffffffff82afb420 r yc_video_codecs_decode_array -ffffffff82afb490 r bg_video_codecs_decode_array -ffffffff82afb4d0 r nv_video_codecs_decode_array -ffffffff82afc000 r psp_v10_0_funcs -ffffffff82afd000 r psp_v11_0_funcs -ffffffff82afe000 r psp_v11_0_8_funcs -ffffffff82aff000 r psp_v12_0_funcs -ffffffff82b00000 r psp_v13_0_funcs -ffffffff82b01000 r psp_v13_0_4_funcs -ffffffff82b02000 r psp_v3_1_funcs -ffffffff82b03000 r sdma_v2_4_ip_funcs -ffffffff82b030a0 R sdma_v2_4_ip_block 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gmc_v10_0_ecc_funcs +ffffffff82acc000 R gmc_v11_0_ip_funcs +ffffffff82acc0a0 R gmc_v11_0_ip_block +ffffffff82acc0b8 r gmc_v11_0_gmc_funcs +ffffffff82acc100 r gmc_v11_0_irq_funcs +ffffffff82acc110 r gmc_v11_0_ecc_funcs +ffffffff82acd000 r gmc_v7_0_ip_funcs +ffffffff82acd0a0 R gmc_v7_0_ip_block +ffffffff82acd0b8 R gmc_v7_4_ip_block +ffffffff82acd0d0 r gmc_v7_0_gmc_funcs +ffffffff82acd118 r gmc_v7_0_irq_funcs +ffffffff82acd128 r iceland_mgcg_cgcg_init +ffffffff82acd140 r golden_settings_iceland_a11 +ffffffff82acd170 r mc_cg_registers +ffffffff82acd1a0 r mc_cg_en +ffffffff82acd1d0 r mc_cg_ls_en +ffffffff82ace000 r gmc_v8_0_ip_funcs +ffffffff82ace0a0 R gmc_v8_0_ip_block +ffffffff82ace0b8 R gmc_v8_1_ip_block +ffffffff82ace0d0 R gmc_v8_5_ip_block +ffffffff82ace0e8 r gmc_v8_0_gmc_funcs +ffffffff82ace130 r gmc_v8_0_irq_funcs +ffffffff82ace140 r fiji_mgcg_cgcg_init +ffffffff82ace150 r golden_settings_fiji_a10 +ffffffff82ace180 r tonga_mgcg_cgcg_init +ffffffff82ace190 r golden_settings_tonga_a11 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mmhub_v1_0_funcs +ffffffff82ae4050 r mmhub_v1_0_edc_cnt_regs +ffffffff82ae40c0 r mmhub_v1_0_ras_fields +ffffffff82ae5000 R mmhub_v1_7_funcs +ffffffff82ae5050 r mmhub_v1_7_edc_cnt_regs +ffffffff82ae5250 r mmhub_v1_7_ras_fields +ffffffff82ae69c0 r mmhub_v1_7_ea_err_status_regs +ffffffff82ae7000 R mmhub_v2_0_funcs +ffffffff82ae7050 r mmhub_v2_0_vmhub_funcs +ffffffff82ae7060 r mmhub_client_ids_navi1x +ffffffff82ae7190 r mmhub_client_ids_sienna_cichlid +ffffffff82ae7450 r mmhub_client_ids_beige_goby +ffffffff82ae8000 R mmhub_v2_3_funcs +ffffffff82ae8050 r mmhub_v2_3_vmhub_funcs +ffffffff82ae8060 r mmhub_client_ids_vangogh +ffffffff82ae9000 R mmhub_v3_0_funcs +ffffffff82ae9050 r mmhub_v3_0_vmhub_funcs +ffffffff82ae9060 r mmhub_client_ids_v3_0_0 +ffffffff82aea000 R mmhub_v3_0_1_funcs +ffffffff82aea050 r mmhub_v3_0_1_vmhub_funcs +ffffffff82aea060 r mmhub_client_ids_v3_0_1 +ffffffff82aeb000 R mmhub_v3_0_2_funcs +ffffffff82aeb050 r mmhub_v3_0_2_vmhub_funcs +ffffffff82aeb060 r mmhub_client_ids_v3_0_2 +ffffffff82aec000 R mmhub_v9_4_ras_hw_ops +ffffffff82aec040 R mmhub_v9_4_funcs +ffffffff82aec090 r mmhub_v9_4_edc_cnt_regs +ffffffff82aec330 r mmhub_v9_4_ras_fields +ffffffff82aee3b0 r mmhub_v9_4_err_status_regs +ffffffff82aef000 r xgpu_ai_mailbox_ack_irq_funcs +ffffffff82aef010 r xgpu_ai_mailbox_rcv_irq_funcs +ffffffff82aef020 R xgpu_ai_virt_ops +ffffffff82af0000 r xgpu_nv_mailbox_ack_irq_funcs +ffffffff82af0010 r xgpu_nv_mailbox_rcv_irq_funcs +ffffffff82af0020 R xgpu_nv_virt_ops +ffffffff82af1000 r xgpu_fiji_mgcg_cgcg_init +ffffffff82af1240 r xgpu_fiji_golden_settings_a10 +ffffffff82af1370 r xgpu_fiji_golden_common_all +ffffffff82af13f0 r xgpu_tonga_mgcg_cgcg_init +ffffffff82af1810 r xgpu_tonga_golden_settings_a11 +ffffffff82af19d0 r xgpu_tonga_golden_common_all +ffffffff82af1a28 r xgpu_vi_mailbox_ack_irq_funcs +ffffffff82af1a38 r xgpu_vi_mailbox_rcv_irq_funcs +ffffffff82af1a48 R xgpu_vi_virt_ops +ffffffff82af2000 r navi10_ih_ip_funcs +ffffffff82af20a0 R navi10_ih_ip_block +ffffffff82af20b8 r navi10_ih_funcs +ffffffff82af20d8 r navi10_ih_self_irq_funcs +ffffffff82af3000 R nbio_v2_3_hdp_flush_reg +ffffffff82af3048 R nbio_v2_3_funcs +ffffffff82af4000 R nbio_v4_3_hdp_flush_reg +ffffffff82af4048 R nbio_v4_3_funcs +ffffffff82af4130 R nbio_v4_3_sriov_funcs +ffffffff82af5000 R nbio_v6_1_hdp_flush_reg +ffffffff82af5048 R nbio_v6_1_funcs +ffffffff82af6000 R nbio_v7_0_hdp_flush_reg +ffffffff82af6048 R nbio_v7_0_funcs +ffffffff82af7000 R nbio_v7_2_hdp_flush_reg +ffffffff82af7048 R nbio_v7_2_funcs +ffffffff82af8000 R nbio_v7_4_hdp_flush_reg +ffffffff82af8048 R nbio_v7_4_ras_hw_ops +ffffffff82af8088 R nbio_v7_4_funcs +ffffffff82af8170 r nbio_v7_4_ras_controller_irq_funcs +ffffffff82af8180 r nbio_v7_4_ras_err_event_athub_irq_funcs +ffffffff82af9000 R nbio_v7_7_hdp_flush_reg +ffffffff82af9048 R nbio_v7_7_funcs +ffffffff82afa000 r nv_common_ip_funcs +ffffffff82afa0a0 R nv_common_ip_block +ffffffff82afa0b8 r nv_asic_funcs +ffffffff82afa170 r nv_allowed_read_registers +ffffffff82afa2f0 r nv_video_codecs_encode +ffffffff82afa300 r sc_video_codecs_decode +ffffffff82afa310 r yc_video_codecs_decode +ffffffff82afa320 r bg_video_codecs_encode +ffffffff82afa330 r bg_video_codecs_decode +ffffffff82afa340 r nv_video_codecs_decode +ffffffff82afa350 r nv_video_codecs_encode_array +ffffffff82afa380 r sc_video_codecs_decode_array +ffffffff82afa420 r yc_video_codecs_decode_array +ffffffff82afa490 r bg_video_codecs_decode_array +ffffffff82afa4d0 r nv_video_codecs_decode_array +ffffffff82afb000 r psp_v10_0_funcs +ffffffff82afc000 r psp_v11_0_funcs +ffffffff82afd000 r psp_v11_0_8_funcs +ffffffff82afe000 r psp_v12_0_funcs +ffffffff82aff000 r psp_v13_0_funcs +ffffffff82b00000 r psp_v13_0_4_funcs +ffffffff82b01000 r psp_v3_1_funcs +ffffffff82b02000 r sdma_v2_4_ip_funcs +ffffffff82b020a0 R sdma_v2_4_ip_block +ffffffff82b020b8 r sdma_v2_4_ring_funcs +ffffffff82b021d8 r sdma_v2_4_buffer_funcs +ffffffff82b021f8 r sdma_v2_4_vm_pte_funcs +ffffffff82b02218 r sdma_v2_4_trap_irq_funcs +ffffffff82b02228 r sdma_v2_4_illegal_inst_irq_funcs +ffffffff82b02240 r iceland_mgcg_cgcg_init +ffffffff82b02260 r golden_settings_iceland_a11 +ffffffff82b03000 r sdma_v3_0_ip_funcs +ffffffff82b030a0 R sdma_v3_0_ip_block +ffffffff82b030b8 R sdma_v3_1_ip_block +ffffffff82b030d0 r sdma_v3_0_ring_funcs +ffffffff82b031f0 r sdma_v3_0_buffer_funcs +ffffffff82b03210 r sdma_v3_0_vm_pte_funcs +ffffffff82b03230 r sdma_v3_0_trap_irq_funcs +ffffffff82b03240 r sdma_v3_0_illegal_inst_irq_funcs +ffffffff82b03250 r fiji_mgcg_cgcg_init +ffffffff82b03270 r golden_settings_fiji_a10 +ffffffff82b032d0 r tonga_mgcg_cgcg_init +ffffffff82b032f0 r golden_settings_tonga_a11 +ffffffff82b03370 r golden_settings_polaris11_a11 +ffffffff82b033f0 r golden_settings_polaris10_a11 +ffffffff82b03470 r cz_mgcg_cgcg_init +ffffffff82b03490 r cz_golden_settings_a11 +ffffffff82b03520 r stoney_mgcg_cgcg_init +ffffffff82b03530 r stoney_golden_settings_a11 +ffffffff82b04000 R sdma_v4_0_ip_funcs +ffffffff82b040a0 R sdma_v4_0_ras_hw_ops +ffffffff82b040e0 R sdma_v4_0_ip_block +ffffffff82b040f8 r sdma_v4_0_ring_funcs_2nd_mmhub +ffffffff82b04218 r sdma_v4_0_ring_funcs +ffffffff82b04338 r sdma_v4_0_page_ring_funcs_2nd_mmhub +ffffffff82b04458 r sdma_v4_0_page_ring_funcs +ffffffff82b04578 r sdma_v4_0_buffer_funcs +ffffffff82b04598 r sdma_v4_0_vm_pte_funcs +ffffffff82b045b8 r sdma_v4_0_trap_irq_funcs +ffffffff82b045c8 r sdma_v4_0_illegal_inst_irq_funcs +ffffffff82b045d8 r sdma_v4_0_ecc_irq_funcs +ffffffff82b045e8 r sdma_v4_0_vm_hole_irq_funcs +ffffffff82b045f8 r sdma_v4_0_doorbell_invalid_irq_funcs +ffffffff82b04608 r sdma_v4_0_pool_timeout_irq_funcs +ffffffff82b04618 r sdma_v4_0_srbm_write_irq_funcs +ffffffff82b04630 r golden_settings_sdma_4 +ffffffff82b04890 r golden_settings_sdma_vg10 +ffffffff82b04940 r golden_settings_sdma_vg12 +ffffffff82b049f0 r golden_settings_sdma0_4_2_init +ffffffff82b04a10 r golden_settings_sdma0_4_2 +ffffffff82b04ca0 r golden_settings_sdma1_4_2 +ffffffff82b04f30 r golden_settings_sdma_arct +ffffffff82b05230 r golden_settings_sdma_aldebaran +ffffffff82b053a0 r golden_settings_sdma_4_1 +ffffffff82b054b0 r golden_settings_sdma_rv2 +ffffffff82b054e0 r golden_settings_sdma_rv1 +ffffffff82b05510 r golden_settings_sdma_4_3 +ffffffff82b05600 r sdma_v4_0_ras_fields +ffffffff82b06000 R sdma_v4_4_ras_hw_ops +ffffffff82b06040 r sdma_v4_4_ras_fields +ffffffff82b07000 R sdma_v5_0_ip_funcs +ffffffff82b070a0 R sdma_v5_0_ip_block +ffffffff82b070b8 r sdma_v5_0_ring_funcs +ffffffff82b071d8 r sdma_v5_0_buffer_funcs +ffffffff82b071f8 r sdma_v5_0_vm_pte_funcs +ffffffff82b07218 r sdma_v5_0_trap_irq_funcs +ffffffff82b07228 r sdma_v5_0_illegal_inst_irq_funcs +ffffffff82b07240 r golden_settings_sdma_5 +ffffffff82b07480 r golden_settings_sdma_nv10 +ffffffff82b074b0 r golden_settings_sdma_nv14 +ffffffff82b074e0 r golden_settings_sdma_5_sriov +ffffffff82b076c0 r golden_settings_sdma_nv12 +ffffffff82b07750 r golden_settings_sdma_cyan_skillfish +ffffffff82b08000 R sdma_v5_2_ip_funcs +ffffffff82b080a0 R sdma_v5_2_ip_block +ffffffff82b080b8 r sdma_v5_2_ring_funcs +ffffffff82b081d8 r sdma_v5_2_buffer_funcs +ffffffff82b081f8 r sdma_v5_2_vm_pte_funcs +ffffffff82b08218 r sdma_v5_2_trap_irq_funcs +ffffffff82b08228 r sdma_v5_2_illegal_inst_irq_funcs +ffffffff82b09000 R sdma_v6_0_ip_funcs +ffffffff82b090a0 R sdma_v6_0_ip_block +ffffffff82b090b8 r sdma_v6_0_ring_funcs +ffffffff82b091d8 r sdma_v6_0_buffer_funcs +ffffffff82b091f8 r sdma_v6_0_vm_pte_funcs +ffffffff82b09218 r sdma_v6_0_trap_irq_funcs +ffffffff82b09228 r sdma_v6_0_illegal_inst_irq_funcs +ffffffff82b0a000 r smu_v11_0_i2c_algo +ffffffff82b0a010 r smu_v11_0_i2c_i2c_lock_ops +ffffffff82b0a028 r smu_v11_0_i2c_control_quirks +ffffffff82b0b000 R smuio_v11_0_funcs +ffffffff82b0c000 R smuio_v11_0_6_funcs +ffffffff82b0d000 R smuio_v13_0_funcs +ffffffff82b0e000 R smuio_v13_0_6_funcs +ffffffff82b0f000 R smuio_v9_0_funcs +ffffffff82b10000 r soc15_common_ip_funcs +ffffffff82b100a0 R vega10_common_ip_block +ffffffff82b100b8 r soc15_asic_funcs +ffffffff82b10170 r vega20_asic_funcs +ffffffff82b10230 r soc15_allowed_read_registers +ffffffff82b103c0 r vega_video_codecs_encode +ffffffff82b103d0 r vega_video_codecs_decode +ffffffff82b103e0 r rv_video_codecs_decode +ffffffff82b103f0 r rn_video_codecs_decode +ffffffff82b10400 r vega_video_codecs_encode_array +ffffffff82b10430 r vega_video_codecs_decode_array +ffffffff82b104b0 r rv_video_codecs_decode_array +ffffffff82b10540 r rn_video_codecs_decode_array +ffffffff82b11000 r soc21_common_ip_funcs +ffffffff82b110a0 R soc21_common_ip_block +ffffffff82b110b8 r soc21_asic_funcs +ffffffff82b11170 r soc21_allowed_read_registers +ffffffff82b112f0 r vcn_4_0_0_video_codecs_encode_vcn1 +ffffffff82b11300 r vcn_4_0_0_video_codecs_decode_vcn1 +ffffffff82b11310 r vcn_4_0_0_video_codecs_encode_vcn0 +ffffffff82b11320 r vcn_4_0_0_video_codecs_decode_vcn0 +ffffffff82b11330 r vcn_4_0_0_video_codecs_encode_array_vcn1 +ffffffff82b11360 r vcn_4_0_0_video_codecs_decode_array_vcn1 +ffffffff82b113b0 r vcn_4_0_0_video_codecs_encode_array_vcn0 +ffffffff82b113e0 r vcn_4_0_0_video_codecs_decode_array_vcn0 +ffffffff82b12000 r tonga_ih_ip_funcs +ffffffff82b120a0 R tonga_ih_ip_block +ffffffff82b120b8 r tonga_ih_funcs +ffffffff82b13000 R umc_v6_0_funcs +ffffffff82b14000 R umc_v6_1_channel_idx_tbl +ffffffff82b14080 R umc_v6_1_ras_hw_ops +ffffffff82b15000 R umc_v6_7_channel_idx_tbl_second +ffffffff82b15080 R umc_v6_7_channel_idx_tbl_first +ffffffff82b15100 R umc_v6_7_ras_hw_ops +ffffffff82b16000 R umc_v8_10_channelnum_map_colbit_table +ffffffff82b16040 R umc_v8_10_channel_idx_tbl +ffffffff82b160a0 R umc_v8_10_ras_hw_ops +ffffffff82b17000 R umc_v8_7_channel_idx_tbl +ffffffff82b17040 R umc_v8_7_ras_hw_ops +ffffffff82b18000 r uvd_v5_0_ip_funcs +ffffffff82b180a0 R uvd_v5_0_ip_block +ffffffff82b180b8 r uvd_v5_0_ring_funcs +ffffffff82b181d8 r uvd_v5_0_irq_funcs +ffffffff82b19000 r uvd_v6_0_ip_funcs +ffffffff82b190a0 R uvd_v6_0_ip_block +ffffffff82b190b8 R uvd_v6_2_ip_block +ffffffff82b190d0 R uvd_v6_3_ip_block +ffffffff82b190e8 r uvd_v6_0_ring_vm_funcs +ffffffff82b19208 r uvd_v6_0_ring_phys_funcs +ffffffff82b19328 r uvd_v6_0_enc_ring_vm_funcs +ffffffff82b19448 r uvd_v6_0_irq_funcs +ffffffff82b1a000 R uvd_v7_0_ip_funcs +ffffffff82b1a0a0 R uvd_v7_0_ip_block +ffffffff82b1a0b8 r uvd_v7_0_ring_vm_funcs +ffffffff82b1a1d8 r uvd_v7_0_enc_ring_vm_funcs +ffffffff82b1a2f8 r uvd_v7_0_irq_funcs +ffffffff82b1b000 r vce_v3_0_ip_funcs +ffffffff82b1b0a0 R vce_v3_0_ip_block +ffffffff82b1b0b8 R vce_v3_1_ip_block +ffffffff82b1b0d0 R vce_v3_4_ip_block +ffffffff82b1b0e8 r vce_v3_0_ring_vm_funcs +ffffffff82b1b208 r vce_v3_0_ring_phys_funcs +ffffffff82b1b328 r vce_v3_0_irq_funcs +ffffffff82b1c000 R vce_v4_0_ip_funcs +ffffffff82b1c0a0 R vce_v4_0_ip_block +ffffffff82b1c0b8 r vce_v4_0_ring_vm_funcs +ffffffff82b1c1d8 r vce_v4_0_irq_funcs +ffffffff82b1d000 r vcn_v1_0_ip_funcs +ffffffff82b1d0a0 R vcn_v1_0_ip_block +ffffffff82b1d0b8 r vcn_v1_0_dec_ring_vm_funcs +ffffffff82b1d1d8 r vcn_v1_0_enc_ring_vm_funcs +ffffffff82b1d2f8 r vcn_v1_0_irq_funcs +ffffffff82b1e000 r vcn_v2_0_ip_funcs +ffffffff82b1e0a0 R vcn_v2_0_ip_block +ffffffff82b1e0b8 r vcn_v2_0_dec_ring_vm_funcs +ffffffff82b1e1d8 r vcn_v2_0_enc_ring_vm_funcs +ffffffff82b1e2f8 r vcn_v2_0_irq_funcs +ffffffff82b1f000 r vcn_v2_5_ip_funcs +ffffffff82b1f0a0 R vcn_v2_5_ip_block +ffffffff82b1f0b8 r vcn_v2_6_ip_funcs +ffffffff82b1f158 R vcn_v2_6_ip_block +ffffffff82b1f170 R vcn_v2_6_ras_hw_ops +ffffffff82b1f1b0 r vcn_v2_5_dec_ring_vm_funcs +ffffffff82b1f2d0 r vcn_v2_6_dec_ring_vm_funcs +ffffffff82b1f3f0 r vcn_v2_5_enc_ring_vm_funcs +ffffffff82b1f510 r vcn_v2_6_enc_ring_vm_funcs +ffffffff82b1f630 r vcn_v2_5_irq_funcs +ffffffff82b20000 r vcn_v3_0_ip_funcs +ffffffff82b200a0 R vcn_v3_0_ip_block +ffffffff82b200b8 r vcn_v3_0_dec_ring_vm_funcs +ffffffff82b201d8 r vcn_v3_0_enc_ring_vm_funcs +ffffffff82b202f8 r vcn_v3_0_irq_funcs +ffffffff82b21000 r vcn_v4_0_ip_funcs +ffffffff82b210a0 R vcn_v4_0_ip_block +ffffffff82b210b8 r vcn_v4_0_unified_ring_vm_funcs +ffffffff82b211d8 r vcn_v4_0_irq_funcs +ffffffff82b22000 R vega10_ih_ip_funcs +ffffffff82b220a0 R vega10_ih_ip_block +ffffffff82b220b8 r vega10_ih_funcs +ffffffff82b220d8 r vega10_ih_self_irq_funcs +ffffffff82b23000 r GC_BASE +ffffffff82b23064 r HDP_BASE +ffffffff82b230c8 r MMHUB_BASE +ffffffff82b2312c r ATHUB_BASE +ffffffff82b23190 r NBIO_BASE +ffffffff82b231f4 r MP0_BASE +ffffffff82b23258 r MP1_BASE +ffffffff82b232bc r VCE_BASE +ffffffff82b23320 r VCN_BASE +ffffffff82b23384 r DF_BASE +ffffffff82b233e8 r DCE_BASE +ffffffff82b2344c r OSSSYS_BASE +ffffffff82b234b0 r SDMA0_BASE +ffffffff82b23514 r SDMA1_BASE +ffffffff82b23578 r SMUIO_BASE +ffffffff82b235dc r PWR_BASE +ffffffff82b23640 r NBIF_BASE +ffffffff82b236a4 r THM_BASE +ffffffff82b23708 r CLK_BASE +ffffffff82b24000 R vega20_ih_ip_funcs +ffffffff82b240a0 R vega20_ih_ip_block +ffffffff82b240b8 r vega20_ih_funcs +ffffffff82b240d8 r vega20_ih_self_irq_funcs +ffffffff82b25000 r GC_BASE +ffffffff82b25090 r HDP_BASE +ffffffff82b25120 r MMHUB_BASE +ffffffff82b251b0 r ATHUB_BASE +ffffffff82b25240 r NBIO_BASE +ffffffff82b252d0 r MP0_BASE +ffffffff82b25360 r MP1_BASE +ffffffff82b253f0 r UVD_BASE +ffffffff82b25480 r VCE_BASE +ffffffff82b25510 r DF_BASE +ffffffff82b255a0 r DCE_BASE +ffffffff82b25630 r OSSSYS_BASE +ffffffff82b256c0 r SDMA0_BASE +ffffffff82b25750 r SDMA1_BASE +ffffffff82b257e0 r SMUIO_BASE +ffffffff82b25870 r THM_BASE +ffffffff82b25900 r CLK_BASE +ffffffff82b25990 r UMC_BASE +ffffffff82b25a20 r RSMU_BASE +ffffffff82b26000 r vi_common_ip_block +ffffffff82b26018 r vi_common_ip_funcs +ffffffff82b260b8 r vi_asic_funcs +ffffffff82b26170 r vi_allowed_read_registers +ffffffff82b263d0 r topaz_video_codecs_encode +ffffffff82b263e0 r topaz_video_codecs_decode +ffffffff82b263f0 r tonga_video_codecs_encode +ffffffff82b26400 r tonga_video_codecs_decode +ffffffff82b26410 r polaris_video_codecs_encode +ffffffff82b26420 r cz_video_codecs_decode +ffffffff82b26430 r tonga_video_codecs_encode_array +ffffffff82b26450 r tonga_video_codecs_decode_array +ffffffff82b264a0 r polaris_video_codecs_encode_array +ffffffff82b264d0 r cz_video_codecs_decode_array +ffffffff82b26550 r iceland_mgcg_cgcg_init +ffffffff82b26590 r fiji_mgcg_cgcg_init +ffffffff82b265f0 r tonga_mgcg_cgcg_init +ffffffff82b26650 r cz_mgcg_cgcg_init +ffffffff82b26690 r stoney_mgcg_cgcg_init +ffffffff82b27000 r amdgpu_dm_funcs +ffffffff82b270a0 R dm_ip_block +ffffffff82b270b8 R amdgpu_dm_encoder_helper_funcs +ffffffff82b27120 r dm_display_funcs +ffffffff82b27180 r hpd_disconnect_quirk_table +ffffffff82b27ef0 r amdgpu_dm_mode_funcs +ffffffff82b27f38 r amdgpu_dm_encoder_funcs +ffffffff82b27f58 r amdgpu_dm_connector_funcs +ffffffff82b27fd0 r amdgpu_dm_connector_helper_funcs +ffffffff82b28020 r amdgpu_dm_i2c_algo +ffffffff82b281f0 r add_fs_modes.common_rates +ffffffff82b28220 r amdgpu_dm_backlight_ops +ffffffff82b29000 r amdgpu_dm_crtc_funcs +ffffffff82b290c0 r amdgpu_dm_crtc_helper_funcs +ffffffff82b2a000 r dm_dtn_log_begin.msg +ffffffff82b2a00d r dm_dtn_log_end.msg +ffffffff82b2a018 r SYNAPTICS_DEVICE_ID +ffffffff82b2b000 r dm_crtc_irq_funcs +ffffffff82b2b010 r dm_vline0_irq_funcs +ffffffff82b2b020 r dm_dmub_outbox_irq_funcs +ffffffff82b2b030 r dm_vupdate_irq_funcs +ffffffff82b2b040 r dm_dmub_trace_irq_funcs +ffffffff82b2b050 r dm_pageflip_irq_funcs +ffffffff82b2b060 r dm_hpd_irq_funcs +ffffffff82b2c000 r amdgpu_dm_encoder_funcs +ffffffff82b2c020 r dm_mst_cbs +ffffffff82b2c030 r dm_dp_mst_connector_funcs +ffffffff82b2c0a8 r dm_dp_mst_connector_helper_funcs +ffffffff82b2d000 r dm_plane_funcs +ffffffff82b2d068 r dm_plane_helper_funcs +ffffffff82b2f000 r vbios_funcs ffffffff82b30000 r vbios_funcs -ffffffff82b31000 r vbios_funcs +ffffffff82b35000 r command_table_helper_funcs ffffffff82b36000 r command_table_helper_funcs ffffffff82b37000 r command_table_helper_funcs ffffffff82b38000 r command_table_helper_funcs -ffffffff82b39000 r command_table_helper_funcs -ffffffff82b3a000 r dce80_max_clks_by_state +ffffffff82b39000 r dce80_max_clks_by_state +ffffffff82b39028 r disp_clk_regs +ffffffff82b3907c r disp_clk_shift +ffffffff82b39088 r disp_clk_mask +ffffffff82b3a000 r dce110_max_clks_by_state ffffffff82b3a028 r disp_clk_regs ffffffff82b3a07c r disp_clk_shift ffffffff82b3a088 r disp_clk_mask -ffffffff82b3b000 r dce110_max_clks_by_state +ffffffff82b3b000 r dce112_max_clks_by_state ffffffff82b3b028 r disp_clk_regs ffffffff82b3b07c r disp_clk_shift ffffffff82b3b088 r disp_clk_mask -ffffffff82b3c000 r dce112_max_clks_by_state -ffffffff82b3c028 r disp_clk_regs -ffffffff82b3c07c r disp_clk_shift -ffffffff82b3c088 r disp_clk_mask -ffffffff82b3d000 r dce120_max_clks_by_state +ffffffff82b3c000 r dce120_max_clks_by_state +ffffffff82b3d000 r clk_mgr_regs +ffffffff82b3d054 r clk_mgr_shift +ffffffff82b3d060 r clk_mgr_mask ffffffff82b3e000 r clk_mgr_regs ffffffff82b3e054 r clk_mgr_shift ffffffff82b3e060 r clk_mgr_mask ffffffff82b3f000 r clk_mgr_regs ffffffff82b3f054 r clk_mgr_shift ffffffff82b3f060 r clk_mgr_mask -ffffffff82b40000 r clk_mgr_regs -ffffffff82b40054 r clk_mgr_shift -ffffffff82b40060 r clk_mgr_mask +ffffffff82b40000 r lpddr5_wm_table +ffffffff82b400c0 r ddr5_wm_table ffffffff82b41000 r lpddr5_wm_table ffffffff82b410c0 r ddr5_wm_table ffffffff82b42000 r lpddr5_wm_table ffffffff82b420c0 r ddr5_wm_table ffffffff82b43000 r lpddr5_wm_table -ffffffff82b430c0 r ddr5_wm_table -ffffffff82b44000 r lpddr5_wm_table -ffffffff82b440c0 r ddr4_wm_table -ffffffff82b45000 r clk_mgr_regs_dcn321 -ffffffff82b45054 r clk_mgr_shift_dcn321 -ffffffff82b45060 r clk_mgr_mask_dcn321 -ffffffff82b45084 r clk_mgr_regs_dcn32 -ffffffff82b450d8 r clk_mgr_shift_dcn32 -ffffffff82b450e4 r clk_mgr_mask_dcn32 -ffffffff82b46000 r DC_BUILD_ID -ffffffff82b48000 r output_csc_matrix -ffffffff82b480e0 r black_color_format -ffffffff82b49000 r DP_SINK_BRANCH_DEV_NAME_7580 -ffffffff82b4a000 r DP_VGA_DONGLE_BRANCH_DEV_NAME -ffffffff82b4a006 r DP_DVI_CONVERTER_ID_4 -ffffffff82b4a00d r DP_DVI_CONVERTER_ID_5 -ffffffff82b4b000 r DP_VGA_LVDS_CONVERTER_ID_2 -ffffffff82b4b007 r DP_VGA_LVDS_CONVERTER_ID_3 -ffffffff82b4b010 r dp_lt_fallbacks -ffffffff82b4c000 r mandatory_dpcd_partitions -ffffffff82b4e000 r dce_funcs -ffffffff82b4f000 r funcs -ffffffff82b50000 R video_optimized_pixel_rates -ffffffff82b501b0 r dce110_clk_src_funcs -ffffffff82b501d8 r dce112_clk_src_funcs -ffffffff82b50200 r dcn20_clk_src_funcs -ffffffff82b50228 r dcn3_clk_src_funcs -ffffffff82b50250 r dcn31_clk_src_funcs -ffffffff82b51000 r dce_funcs -ffffffff82b51068 r dcn10_funcs -ffffffff82b510d0 r dcn20_funcs -ffffffff82b51138 r dcn21_funcs -ffffffff82b52000 r dce_ipp_funcs -ffffffff82b53000 r dce110_lnk_enc_funcs -ffffffff82b54000 r dce_mi_funcs -ffffffff82b54090 r dce112_mi_funcs -ffffffff82b54120 r dce120_mi_funcs -ffffffff82b541b0 r pte_settings -ffffffff82b55000 r funcs -ffffffff82b56000 r dce_link_panel_cntl_funcs -ffffffff82b57000 r filter_3tap_16p_upscale -ffffffff82b57040 r filter_3tap_16p_116 -ffffffff82b57080 r filter_3tap_16p_149 -ffffffff82b570c0 r filter_3tap_16p_183 -ffffffff82b57100 r filter_3tap_64p_upscale -ffffffff82b571d0 r filter_3tap_64p_116 -ffffffff82b572a0 r filter_3tap_64p_149 -ffffffff82b57370 r filter_3tap_64p_183 -ffffffff82b57440 r filter_4tap_16p_upscale -ffffffff82b57490 r filter_4tap_16p_116 -ffffffff82b574e0 r filter_4tap_16p_149 -ffffffff82b57530 r filter_4tap_16p_183 -ffffffff82b57580 r filter_4tap_64p_upscale -ffffffff82b57690 r filter_4tap_64p_116 -ffffffff82b577a0 r filter_4tap_64p_149 -ffffffff82b578b0 r filter_4tap_64p_183 -ffffffff82b579c0 r filter_5tap_64p_upscale -ffffffff82b57b10 r filter_5tap_64p_116 -ffffffff82b57c60 r filter_5tap_64p_149 -ffffffff82b57db0 r filter_5tap_64p_183 -ffffffff82b57f00 r filter_6tap_64p_upscale -ffffffff82b58090 r filter_6tap_64p_116 -ffffffff82b58220 r filter_6tap_64p_149 -ffffffff82b583b0 r filter_6tap_64p_183 -ffffffff82b58540 r filter_7tap_64p_upscale -ffffffff82b58710 r filter_7tap_64p_116 -ffffffff82b588e0 r filter_7tap_64p_149 -ffffffff82b58ab0 r filter_7tap_64p_183 -ffffffff82b58c80 r filter_8tap_64p_upscale -ffffffff82b58e90 r filter_8tap_64p_116 -ffffffff82b590a0 r filter_8tap_64p_149 -ffffffff82b592b0 r filter_8tap_64p_183 -ffffffff82b594c0 r filter_2tap_16p -ffffffff82b594f0 r filter_2tap_64p -ffffffff82b5a000 r audio_clock_info_table_48bpc -ffffffff82b5a190 r audio_clock_info_table_36bpc -ffffffff82b5a320 r audio_clock_info_table -ffffffff82b5a4e0 r dce110_str_enc_funcs -ffffffff82b5b000 r global_color_matrix -ffffffff82b5b0a8 r dce_transform_funcs -ffffffff82b5c000 r abm_funcs -ffffffff82b5d000 r psr_funcs -ffffffff82b5d040 r DP_SINK_DEVICE_STR_ID_1 -ffffffff82b5d045 r DP_SINK_DEVICE_STR_ID_2 -ffffffff82b5e000 r reg_offsets -ffffffff82b5f000 r bios_regs -ffffffff82b5f008 r res_cap -ffffffff82b5f050 r clk_src_regs -ffffffff82b5f14c r dmcu_regs -ffffffff82b5f1a8 r dmcu_shift -ffffffff82b5f1bc r dmcu_mask -ffffffff82b5f208 r abm_regs -ffffffff82b5f248 r abm_shift -ffffffff82b5f25c r abm_mask -ffffffff82b5f2b0 r dce100_tg_offsets -ffffffff82b5f2f8 r plane_cap -ffffffff82b5f328 r res_create_funcs -ffffffff82b5f358 r dce100_res_pool_funcs -ffffffff82b5f440 r panel_cntl_regs -ffffffff82b5f460 r panel_cntl_shift -ffffffff82b5f470 r panel_cntl_mask -ffffffff82b5f4b0 r link_enc_regs -ffffffff82b5f870 r link_enc_aux_regs -ffffffff82b5f8c0 r link_enc_hpd_regs -ffffffff82b5f8d8 r link_enc_feature -ffffffff82b5f8e8 r cs_shift -ffffffff82b5f8f4 r cs_mask -ffffffff82b5f920 r mi_regs -ffffffff82b5fc38 r mi_shifts -ffffffff82b5fc80 r mi_masks -ffffffff82b5fda0 r ipp_regs -ffffffff82b5ff98 r ipp_shift -ffffffff82b5ffc0 r ipp_mask -ffffffff82b60060 r xfm_regs -ffffffff82b60600 r xfm_shift -ffffffff82b60660 r xfm_mask -ffffffff82b607e0 r opp_regs -ffffffff82b60930 r opp_shift -ffffffff82b6095c r opp_mask -ffffffff82b60a10 r aux_engine_regs -ffffffff82b60b00 r aux_mask -ffffffff82b60b60 r aux_shift -ffffffff82b60b80 r i2c_hw_regs -ffffffff82b60cd0 r i2c_shifts -ffffffff82b60cfc r i2c_masks -ffffffff82b60da0 r audio_regs -ffffffff82b60ed4 r audio_shift -ffffffff82b60eec r audio_mask -ffffffff82b60f30 r stream_enc_regs -ffffffff82b615dc r se_shift -ffffffff82b61660 r se_mask -ffffffff82b61864 r hwseq_reg -ffffffff82b61a80 r hwseq_shift -ffffffff82b61b00 r hwseq_mask -ffffffff82b62000 r reg_offsets -ffffffff82b62018 r dce110_compressor_funcs -ffffffff82b63000 r dce110_funcs -ffffffff82b632c0 r dce110_private_funcs -ffffffff82b64000 r dce110_mem_input_v_funcs -ffffffff82b64090 r dvmm_Hw_Setting_1DTiling -ffffffff82b64120 r dvmm_Hw_Setting_2DTiling -ffffffff82b641b0 r dvmm_Hw_Setting_Linear -ffffffff82b65000 r global_color_matrix -ffffffff82b650b0 r input_csc_matrix -ffffffff82b66000 r funcs -ffffffff82b67000 r bios_regs -ffffffff82b67008 r dce110_res_pool_funcs -ffffffff82b670f0 r clk_src_regs -ffffffff82b671ec r dmcu_regs -ffffffff82b67248 r dmcu_shift -ffffffff82b6725c r dmcu_mask -ffffffff82b672a8 r abm_regs -ffffffff82b672e8 r abm_shift -ffffffff82b672fc r abm_mask -ffffffff82b67350 r dce110_tg_offsets -ffffffff82b67398 r res_create_funcs -ffffffff82b673c8 r plane_cap -ffffffff82b673f4 r underlay_plane_cap -ffffffff82b67420 r stoney_resource_cap -ffffffff82b6745c r carrizo_resource_cap -ffffffff82b674a0 r panel_cntl_regs -ffffffff82b674c0 r panel_cntl_shift -ffffffff82b674d0 r panel_cntl_mask -ffffffff82b67510 r link_enc_regs -ffffffff82b678d0 r link_enc_aux_regs -ffffffff82b67920 r link_enc_hpd_regs -ffffffff82b67938 r link_enc_feature -ffffffff82b67948 r cs_shift -ffffffff82b67954 r cs_mask -ffffffff82b67980 r mi_regs -ffffffff82b67b0c r mi_shifts -ffffffff82b67b54 r mi_masks -ffffffff82b67c70 r ipp_regs -ffffffff82b67d6c r ipp_shift -ffffffff82b67d94 r ipp_mask -ffffffff82b67e30 r xfm_regs -ffffffff82b68100 r xfm_shift -ffffffff82b68160 r xfm_mask -ffffffff82b682e0 r opp_regs -ffffffff82b68430 r opp_shift -ffffffff82b6845c r opp_mask -ffffffff82b68510 r aux_engine_regs -ffffffff82b68600 r aux_mask -ffffffff82b68660 r aux_shift -ffffffff82b68680 r i2c_hw_regs -ffffffff82b687d0 r i2c_shifts -ffffffff82b687fc r i2c_masks -ffffffff82b688a0 r audio_regs -ffffffff82b689d4 r audio_shift -ffffffff82b689ec r audio_mask -ffffffff82b68a30 r stream_enc_regs -ffffffff82b68d0c r se_shift -ffffffff82b68d90 r se_mask -ffffffff82b68f94 r hwseq_stoney_reg -ffffffff82b691b0 r hwseq_cz_reg -ffffffff82b693cc r hwseq_shift -ffffffff82b6944c r hwseq_mask -ffffffff82b6a000 r dce110_tg_funcs -ffffffff82b6b000 r dce110_tg_v_funcs -ffffffff82b6c000 r dce110_xfmv_funcs +ffffffff82b430c0 r ddr4_wm_table +ffffffff82b44000 r clk_mgr_regs_dcn321 +ffffffff82b44054 r clk_mgr_shift_dcn321 +ffffffff82b44060 r clk_mgr_mask_dcn321 +ffffffff82b44084 r clk_mgr_regs_dcn32 +ffffffff82b440d8 r clk_mgr_shift_dcn32 +ffffffff82b440e4 r clk_mgr_mask_dcn32 +ffffffff82b45000 r DC_BUILD_ID +ffffffff82b47000 r output_csc_matrix +ffffffff82b470e0 r black_color_format +ffffffff82b48000 r DP_SINK_BRANCH_DEV_NAME_7580 +ffffffff82b49000 r DP_VGA_DONGLE_BRANCH_DEV_NAME +ffffffff82b49006 r DP_DVI_CONVERTER_ID_4 +ffffffff82b4900d r DP_DVI_CONVERTER_ID_5 +ffffffff82b4a000 r DP_VGA_LVDS_CONVERTER_ID_2 +ffffffff82b4a007 r DP_VGA_LVDS_CONVERTER_ID_3 +ffffffff82b4a010 r dp_lt_fallbacks +ffffffff82b4b000 r mandatory_dpcd_partitions +ffffffff82b4d000 r dce_funcs +ffffffff82b4e000 r funcs +ffffffff82b4f000 R video_optimized_pixel_rates +ffffffff82b4f1b0 r dce110_clk_src_funcs +ffffffff82b4f1d8 r dce112_clk_src_funcs +ffffffff82b4f200 r dcn20_clk_src_funcs +ffffffff82b4f228 r dcn3_clk_src_funcs +ffffffff82b4f250 r dcn31_clk_src_funcs +ffffffff82b50000 r dce_funcs +ffffffff82b50068 r dcn10_funcs +ffffffff82b500d0 r dcn20_funcs +ffffffff82b50138 r dcn21_funcs +ffffffff82b51000 r dce_ipp_funcs +ffffffff82b52000 r dce110_lnk_enc_funcs +ffffffff82b53000 r dce_mi_funcs +ffffffff82b53090 r dce112_mi_funcs +ffffffff82b53120 r dce120_mi_funcs +ffffffff82b531b0 r pte_settings +ffffffff82b54000 r funcs +ffffffff82b55000 r dce_link_panel_cntl_funcs +ffffffff82b56000 r filter_3tap_16p_upscale +ffffffff82b56040 r filter_3tap_16p_116 +ffffffff82b56080 r filter_3tap_16p_149 +ffffffff82b560c0 r filter_3tap_16p_183 +ffffffff82b56100 r filter_3tap_64p_upscale +ffffffff82b561d0 r filter_3tap_64p_116 +ffffffff82b562a0 r filter_3tap_64p_149 +ffffffff82b56370 r filter_3tap_64p_183 +ffffffff82b56440 r filter_4tap_16p_upscale +ffffffff82b56490 r filter_4tap_16p_116 +ffffffff82b564e0 r filter_4tap_16p_149 +ffffffff82b56530 r filter_4tap_16p_183 +ffffffff82b56580 r filter_4tap_64p_upscale +ffffffff82b56690 r filter_4tap_64p_116 +ffffffff82b567a0 r filter_4tap_64p_149 +ffffffff82b568b0 r filter_4tap_64p_183 +ffffffff82b569c0 r filter_5tap_64p_upscale +ffffffff82b56b10 r filter_5tap_64p_116 +ffffffff82b56c60 r filter_5tap_64p_149 +ffffffff82b56db0 r filter_5tap_64p_183 +ffffffff82b56f00 r filter_6tap_64p_upscale +ffffffff82b57090 r filter_6tap_64p_116 +ffffffff82b57220 r filter_6tap_64p_149 +ffffffff82b573b0 r filter_6tap_64p_183 +ffffffff82b57540 r filter_7tap_64p_upscale +ffffffff82b57710 r filter_7tap_64p_116 +ffffffff82b578e0 r filter_7tap_64p_149 +ffffffff82b57ab0 r filter_7tap_64p_183 +ffffffff82b57c80 r filter_8tap_64p_upscale +ffffffff82b57e90 r filter_8tap_64p_116 +ffffffff82b580a0 r filter_8tap_64p_149 +ffffffff82b582b0 r filter_8tap_64p_183 +ffffffff82b584c0 r filter_2tap_16p +ffffffff82b584f0 r filter_2tap_64p +ffffffff82b59000 r audio_clock_info_table_48bpc +ffffffff82b59190 r audio_clock_info_table_36bpc +ffffffff82b59320 r audio_clock_info_table +ffffffff82b594e0 r dce110_str_enc_funcs +ffffffff82b5a000 r global_color_matrix +ffffffff82b5a0a8 r dce_transform_funcs +ffffffff82b5b000 r abm_funcs +ffffffff82b5c000 r psr_funcs +ffffffff82b5c040 r DP_SINK_DEVICE_STR_ID_1 +ffffffff82b5c045 r DP_SINK_DEVICE_STR_ID_2 +ffffffff82b5d000 r reg_offsets +ffffffff82b5e000 r bios_regs +ffffffff82b5e008 r res_cap +ffffffff82b5e050 r clk_src_regs +ffffffff82b5e14c r dmcu_regs +ffffffff82b5e1a8 r dmcu_shift +ffffffff82b5e1bc r dmcu_mask +ffffffff82b5e208 r abm_regs +ffffffff82b5e248 r abm_shift +ffffffff82b5e25c r abm_mask +ffffffff82b5e2b0 r dce100_tg_offsets +ffffffff82b5e2f8 r plane_cap +ffffffff82b5e328 r res_create_funcs +ffffffff82b5e358 r dce100_res_pool_funcs +ffffffff82b5e440 r panel_cntl_regs +ffffffff82b5e460 r panel_cntl_shift +ffffffff82b5e470 r panel_cntl_mask +ffffffff82b5e4b0 r link_enc_regs +ffffffff82b5e870 r link_enc_aux_regs +ffffffff82b5e8c0 r link_enc_hpd_regs +ffffffff82b5e8d8 r link_enc_feature +ffffffff82b5e8e8 r cs_shift +ffffffff82b5e8f4 r cs_mask +ffffffff82b5e920 r mi_regs +ffffffff82b5ec38 r mi_shifts +ffffffff82b5ec80 r mi_masks +ffffffff82b5eda0 r ipp_regs +ffffffff82b5ef98 r ipp_shift +ffffffff82b5efc0 r ipp_mask +ffffffff82b5f060 r xfm_regs +ffffffff82b5f600 r xfm_shift +ffffffff82b5f660 r xfm_mask +ffffffff82b5f7e0 r opp_regs +ffffffff82b5f930 r opp_shift +ffffffff82b5f95c r opp_mask +ffffffff82b5fa10 r aux_engine_regs +ffffffff82b5fb00 r aux_mask +ffffffff82b5fb60 r aux_shift +ffffffff82b5fb80 r i2c_hw_regs +ffffffff82b5fcd0 r i2c_shifts +ffffffff82b5fcfc r i2c_masks +ffffffff82b5fda0 r audio_regs +ffffffff82b5fed4 r audio_shift +ffffffff82b5feec r audio_mask +ffffffff82b5ff30 r stream_enc_regs +ffffffff82b605dc r se_shift +ffffffff82b60660 r se_mask +ffffffff82b60864 r hwseq_reg +ffffffff82b60a80 r hwseq_shift +ffffffff82b60b00 r hwseq_mask +ffffffff82b61000 r reg_offsets +ffffffff82b61018 r dce110_compressor_funcs +ffffffff82b62000 r dce110_funcs +ffffffff82b622c0 r dce110_private_funcs +ffffffff82b63000 r dce110_mem_input_v_funcs +ffffffff82b63090 r dvmm_Hw_Setting_1DTiling +ffffffff82b63120 r dvmm_Hw_Setting_2DTiling +ffffffff82b631b0 r dvmm_Hw_Setting_Linear +ffffffff82b64000 r global_color_matrix +ffffffff82b640b0 r input_csc_matrix +ffffffff82b65000 r funcs +ffffffff82b66000 r bios_regs +ffffffff82b66008 r dce110_res_pool_funcs +ffffffff82b660f0 r clk_src_regs +ffffffff82b661ec r dmcu_regs +ffffffff82b66248 r dmcu_shift +ffffffff82b6625c r dmcu_mask +ffffffff82b662a8 r abm_regs +ffffffff82b662e8 r abm_shift +ffffffff82b662fc r abm_mask +ffffffff82b66350 r dce110_tg_offsets +ffffffff82b66398 r res_create_funcs +ffffffff82b663c8 r plane_cap +ffffffff82b663f4 r underlay_plane_cap +ffffffff82b66420 r stoney_resource_cap +ffffffff82b6645c r carrizo_resource_cap +ffffffff82b664a0 r panel_cntl_regs +ffffffff82b664c0 r panel_cntl_shift +ffffffff82b664d0 r panel_cntl_mask +ffffffff82b66510 r link_enc_regs +ffffffff82b668d0 r link_enc_aux_regs +ffffffff82b66920 r link_enc_hpd_regs +ffffffff82b66938 r link_enc_feature +ffffffff82b66948 r cs_shift +ffffffff82b66954 r cs_mask +ffffffff82b66980 r mi_regs +ffffffff82b66b0c r mi_shifts +ffffffff82b66b54 r mi_masks +ffffffff82b66c70 r ipp_regs +ffffffff82b66d6c r ipp_shift +ffffffff82b66d94 r ipp_mask +ffffffff82b66e30 r xfm_regs +ffffffff82b67100 r xfm_shift +ffffffff82b67160 r xfm_mask +ffffffff82b672e0 r opp_regs +ffffffff82b67430 r opp_shift +ffffffff82b6745c r opp_mask +ffffffff82b67510 r aux_engine_regs +ffffffff82b67600 r aux_mask +ffffffff82b67660 r aux_shift +ffffffff82b67680 r i2c_hw_regs +ffffffff82b677d0 r i2c_shifts +ffffffff82b677fc r i2c_masks +ffffffff82b678a0 r audio_regs +ffffffff82b679d4 r audio_shift +ffffffff82b679ec r audio_mask +ffffffff82b67a30 r stream_enc_regs +ffffffff82b67d0c r se_shift +ffffffff82b67d90 r se_mask +ffffffff82b67f94 r hwseq_stoney_reg +ffffffff82b681b0 r hwseq_cz_reg +ffffffff82b683cc r hwseq_shift +ffffffff82b6844c r hwseq_mask +ffffffff82b69000 r dce110_tg_funcs +ffffffff82b6a000 r dce110_tg_v_funcs +ffffffff82b6b000 r dce110_xfmv_funcs +ffffffff82b6c000 r reg_offsets ffffffff82b6d000 r reg_offsets -ffffffff82b6e000 r reg_offsets -ffffffff82b6f000 r bios_regs -ffffffff82b6f010 r clk_src_regs -ffffffff82b6f208 r dmcu_regs -ffffffff82b6f264 r dmcu_shift -ffffffff82b6f278 r dmcu_mask -ffffffff82b6f2c4 r abm_regs -ffffffff82b6f304 r abm_shift -ffffffff82b6f318 r abm_mask -ffffffff82b6f360 r dce112_tg_offsets -ffffffff82b6f3a8 r res_create_funcs -ffffffff82b6f3d8 r plane_cap -ffffffff82b6f404 r polaris_11_resource_cap -ffffffff82b6f440 r polaris_10_resource_cap -ffffffff82b6f480 r dce112_res_pool_funcs -ffffffff82b6f570 r panel_cntl_regs -ffffffff82b6f590 r panel_cntl_shift -ffffffff82b6f5a0 r panel_cntl_mask -ffffffff82b6f5e0 r link_enc_regs -ffffffff82b6f9a0 r link_enc_aux_regs -ffffffff82b6f9f0 r link_enc_hpd_regs -ffffffff82b6fa08 r link_enc_feature -ffffffff82b6fa18 r cs_shift -ffffffff82b6fa24 r cs_mask -ffffffff82b6fa50 r mi_regs -ffffffff82b6fd68 r mi_shifts -ffffffff82b6fdb0 r mi_masks -ffffffff82b6fed0 r ipp_regs -ffffffff82b700c8 r ipp_shift -ffffffff82b700f0 r ipp_mask -ffffffff82b70190 r xfm_regs -ffffffff82b70730 r xfm_shift -ffffffff82b70790 r xfm_mask -ffffffff82b70910 r opp_regs -ffffffff82b70a60 r opp_shift -ffffffff82b70a8c r opp_mask -ffffffff82b70b40 r aux_engine_regs -ffffffff82b70c30 r aux_mask -ffffffff82b70c90 r aux_shift -ffffffff82b70cb0 r i2c_hw_regs -ffffffff82b70e00 r i2c_shifts -ffffffff82b70e2c r i2c_masks -ffffffff82b70ed0 r audio_regs -ffffffff82b70fd8 r audio_shift -ffffffff82b70ff0 r audio_mask -ffffffff82b71030 r stream_enc_regs -ffffffff82b715e8 r se_shift -ffffffff82b7166c r se_mask -ffffffff82b71870 r hwseq_reg -ffffffff82b71a8c r hwseq_shift -ffffffff82b71b0c r hwseq_mask -ffffffff82b72000 r bios_regs -ffffffff82b72008 r res_cap -ffffffff82b72048 r dce120_res_pool_funcs -ffffffff82b72130 r debug_defaults -ffffffff82b722b0 r clk_src_regs -ffffffff82b724a8 r dmcu_regs -ffffffff82b72504 r dmcu_shift -ffffffff82b72518 r dmcu_mask -ffffffff82b72564 r abm_regs -ffffffff82b725a4 r abm_shift -ffffffff82b725b8 r abm_mask -ffffffff82b72600 r dce120_tg_offsets -ffffffff82b72648 r dce121_res_create_funcs -ffffffff82b72678 r res_create_funcs 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stream_enc_regs -ffffffff82b74788 r se_shift -ffffffff82b7480c r se_mask -ffffffff82b74a10 r dce121_hwseq_reg -ffffffff82b74c2c r dce121_hwseq_shift -ffffffff82b74cac r dce121_hwseq_mask -ffffffff82b74ea0 r hwseq_reg -ffffffff82b750bc r hwseq_shift -ffffffff82b7513c r hwseq_mask -ffffffff82b76000 r dce120_tg_funcs -ffffffff82b77000 r bios_regs -ffffffff82b77008 r res_cap -ffffffff82b77048 r dce80_res_pool_funcs -ffffffff82b77130 r clk_src_regs -ffffffff82b7722c r dmcu_regs -ffffffff82b77288 r dmcu_shift -ffffffff82b7729c r dmcu_mask -ffffffff82b772e8 r abm_regs -ffffffff82b77328 r abm_shift -ffffffff82b7733c r abm_mask -ffffffff82b77390 r dce80_tg_offsets -ffffffff82b773d8 r plane_cap -ffffffff82b77408 r res_create_funcs -ffffffff82b77440 r panel_cntl_regs -ffffffff82b77460 r panel_cntl_shift -ffffffff82b77470 r panel_cntl_mask -ffffffff82b774b0 r link_enc_regs -ffffffff82b77870 r link_enc_aux_regs -ffffffff82b778c0 r link_enc_hpd_regs -ffffffff82b778d8 r link_enc_feature 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-ffffffff82c3bf84 r apg_shift -ffffffff82c3bf8c r apg_mask -ffffffff82c3bfa4 r hpo_dp_le_shift -ffffffff82c3bfc0 r hpo_dp_le_mask -ffffffff82c3c024 r hwseq_shift -ffffffff82c3c0a4 r hwseq_mask -ffffffff82c3e000 R dcn10_soc_defaults -ffffffff82c3e08c R dcn10_ip_defaults -ffffffff82c49000 R dml20_funcs -ffffffff82c49030 R dml20v2_funcs -ffffffff82c49060 R dml21_funcs -ffffffff82c49090 R dml30_funcs -ffffffff82c490c0 R dml31_funcs -ffffffff82c490f0 R dml314_funcs -ffffffff82c49120 R dml32_funcs -ffffffff82c4c000 R qp_table_422_10bpc_min -ffffffff82c4c740 R qp_table_444_8bpc_max -ffffffff82c4d080 R qp_table_420_12bpc_max -ffffffff82c4d7c0 R qp_table_444_10bpc_min -ffffffff82c4e400 R qp_table_420_8bpc_max -ffffffff82c4e840 R qp_table_444_8bpc_min -ffffffff82c4f180 R qp_table_444_12bpc_min -ffffffff82c500c0 R qp_table_420_12bpc_min -ffffffff82c50800 R qp_table_422_12bpc_min -ffffffff82c51140 R qp_table_422_12bpc_max -ffffffff82c51a80 R qp_table_444_12bpc_max -ffffffff82c529c0 R qp_table_420_8bpc_min -ffffffff82c52e00 R qp_table_422_8bpc_min -ffffffff82c53340 R qp_table_422_10bpc_max -ffffffff82c53a80 R qp_table_420_10bpc_max -ffffffff82c54040 R qp_table_420_10bpc_min -ffffffff82c54600 R qp_table_444_10bpc_max -ffffffff82c55240 R qp_table_422_8bpc_max +ffffffff82b6e000 r bios_regs +ffffffff82b6e010 r clk_src_regs +ffffffff82b6e208 r dmcu_regs +ffffffff82b6e264 r dmcu_shift +ffffffff82b6e278 r dmcu_mask +ffffffff82b6e2c4 r abm_regs +ffffffff82b6e304 r abm_shift +ffffffff82b6e318 r abm_mask +ffffffff82b6e360 r dce112_tg_offsets +ffffffff82b6e3a8 r res_create_funcs +ffffffff82b6e3d8 r plane_cap +ffffffff82b6e404 r polaris_11_resource_cap +ffffffff82b6e440 r polaris_10_resource_cap +ffffffff82b6e480 r dce112_res_pool_funcs +ffffffff82b6e570 r panel_cntl_regs +ffffffff82b6e590 r panel_cntl_shift +ffffffff82b6e5a0 r panel_cntl_mask +ffffffff82b6e5e0 r link_enc_regs +ffffffff82b6e9a0 r link_enc_aux_regs +ffffffff82b6e9f0 r link_enc_hpd_regs +ffffffff82b6ea08 r link_enc_feature +ffffffff82b6ea18 r cs_shift +ffffffff82b6ea24 r cs_mask +ffffffff82b6ea50 r mi_regs +ffffffff82b6ed68 r mi_shifts +ffffffff82b6edb0 r mi_masks +ffffffff82b6eed0 r ipp_regs +ffffffff82b6f0c8 r ipp_shift +ffffffff82b6f0f0 r ipp_mask +ffffffff82b6f190 r xfm_regs +ffffffff82b6f730 r xfm_shift +ffffffff82b6f790 r xfm_mask +ffffffff82b6f910 r opp_regs +ffffffff82b6fa60 r opp_shift +ffffffff82b6fa8c r opp_mask +ffffffff82b6fb40 r aux_engine_regs +ffffffff82b6fc30 r aux_mask +ffffffff82b6fc90 r aux_shift +ffffffff82b6fcb0 r i2c_hw_regs +ffffffff82b6fe00 r i2c_shifts +ffffffff82b6fe2c r i2c_masks +ffffffff82b6fed0 r audio_regs +ffffffff82b6ffd8 r audio_shift +ffffffff82b6fff0 r audio_mask +ffffffff82b70030 r stream_enc_regs +ffffffff82b705e8 r se_shift +ffffffff82b7066c r se_mask +ffffffff82b70870 r hwseq_reg +ffffffff82b70a8c r hwseq_shift +ffffffff82b70b0c r hwseq_mask +ffffffff82b71000 r bios_regs +ffffffff82b71008 r res_cap +ffffffff82b71048 r dce120_res_pool_funcs +ffffffff82b71130 r debug_defaults +ffffffff82b712b0 r clk_src_regs +ffffffff82b714a8 r dmcu_regs +ffffffff82b71504 r dmcu_shift +ffffffff82b71518 r dmcu_mask +ffffffff82b71564 r abm_regs +ffffffff82b715a4 r abm_shift +ffffffff82b715b8 r abm_mask +ffffffff82b71600 r dce120_tg_offsets +ffffffff82b71648 r dce121_res_create_funcs +ffffffff82b71678 r res_create_funcs +ffffffff82b716a8 r plane_cap +ffffffff82b716e0 r panel_cntl_regs +ffffffff82b71700 r panel_cntl_shift +ffffffff82b71710 r panel_cntl_mask +ffffffff82b71750 r link_enc_regs +ffffffff82b71b10 r link_enc_aux_regs +ffffffff82b71b60 r link_enc_hpd_regs +ffffffff82b71b78 r link_enc_feature +ffffffff82b71b88 r cs_shift +ffffffff82b71b94 r cs_mask +ffffffff82b71bc0 r mi_regs +ffffffff82b71ed8 r mi_shifts +ffffffff82b71f20 r mi_masks +ffffffff82b72040 r ipp_regs +ffffffff82b72238 r ipp_shift +ffffffff82b72260 r ipp_mask +ffffffff82b72300 r xfm_regs +ffffffff82b728a0 r xfm_shift +ffffffff82b72900 r xfm_mask +ffffffff82b72a80 r opp_regs +ffffffff82b72bd0 r opp_shift +ffffffff82b72bfc r opp_mask +ffffffff82b72cb0 r aux_engine_regs +ffffffff82b72da0 r aux_mask +ffffffff82b72e00 r aux_shift +ffffffff82b72e20 r i2c_hw_regs +ffffffff82b72f70 r i2c_shifts +ffffffff82b72f9c r i2c_masks +ffffffff82b73040 r audio_regs +ffffffff82b73174 r audio_shift +ffffffff82b7318c r audio_mask +ffffffff82b731d0 r stream_enc_regs +ffffffff82b73788 r se_shift +ffffffff82b7380c r se_mask +ffffffff82b73a10 r dce121_hwseq_reg +ffffffff82b73c2c r dce121_hwseq_shift +ffffffff82b73cac r dce121_hwseq_mask +ffffffff82b73ea0 r hwseq_reg +ffffffff82b740bc r hwseq_shift +ffffffff82b7413c r hwseq_mask +ffffffff82b75000 r dce120_tg_funcs +ffffffff82b76000 r bios_regs +ffffffff82b76008 r res_cap +ffffffff82b76048 r dce80_res_pool_funcs +ffffffff82b76130 r clk_src_regs +ffffffff82b7622c r dmcu_regs +ffffffff82b76288 r dmcu_shift +ffffffff82b7629c r dmcu_mask +ffffffff82b762e8 r abm_regs +ffffffff82b76328 r abm_shift +ffffffff82b7633c r abm_mask +ffffffff82b76390 r dce80_tg_offsets +ffffffff82b763d8 r plane_cap +ffffffff82b76408 r res_create_funcs +ffffffff82b76440 r panel_cntl_regs +ffffffff82b76460 r panel_cntl_shift +ffffffff82b76470 r panel_cntl_mask +ffffffff82b764b0 r link_enc_regs +ffffffff82b76870 r link_enc_aux_regs +ffffffff82b768c0 r link_enc_hpd_regs +ffffffff82b768d8 r link_enc_feature +ffffffff82b768e8 r cs_shift +ffffffff82b768f4 r cs_mask +ffffffff82b76920 r mi_regs +ffffffff82b76c38 r mi_shifts +ffffffff82b76c80 r mi_masks +ffffffff82b76da0 r ipp_regs +ffffffff82b76f98 r ipp_shift +ffffffff82b76fc0 r ipp_mask +ffffffff82b77060 r xfm_regs +ffffffff82b77600 r xfm_shift +ffffffff82b77660 r xfm_mask +ffffffff82b777e0 r opp_regs +ffffffff82b77930 r opp_shift +ffffffff82b7795c r opp_mask +ffffffff82b77a10 r aux_engine_regs +ffffffff82b77b00 r aux_mask +ffffffff82b77b60 r aux_shift +ffffffff82b77b80 r i2c_hw_regs +ffffffff82b77cd0 r i2c_shifts +ffffffff82b77cfc r i2c_masks +ffffffff82b77da0 r audio_regs +ffffffff82b77ed4 r audio_shift +ffffffff82b77eec r audio_mask +ffffffff82b77f30 r stream_enc_regs +ffffffff82b785dc r se_shift +ffffffff82b78660 r se_mask +ffffffff82b78864 r hwseq_reg +ffffffff82b78a80 r hwseq_shift +ffffffff82b78b00 r hwseq_mask +ffffffff82b78cf4 r res_cap_81 +ffffffff82b78d30 r res_cap_83 +ffffffff82b79000 r reg_offsets +ffffffff82b79048 r dce80_tg_funcs +ffffffff82b7a000 r dcn10_dpp_funcs +ffffffff82b7b000 r dpp_input_csc_matrix +ffffffff82b7d000 r hubbub1_funcs +ffffffff82b7e000 r dcn10_hubp_funcs +ffffffff82b7f000 r reduceSizeAndFraction.prime_numbers +ffffffff82b81000 r dcn10_funcs +ffffffff82b812c0 r dcn10_private_funcs +ffffffff82b82000 r dcn10_ipp_funcs +ffffffff82b82048 r dcn20_ipp_funcs +ffffffff82b83000 r dcn10_lnk_enc_funcs +ffffffff82b84000 r dcn10_mpc_funcs +ffffffff82b85000 r dcn10_opp_funcs +ffffffff82b86000 r dcn10_tg_funcs +ffffffff82b87000 r bios_regs +ffffffff82b87008 r rv2_res_cap +ffffffff82b87044 r res_cap +ffffffff82b87080 r debug_defaults_drv +ffffffff82b871f8 r debug_defaults_diags +ffffffff82b87370 r clk_src_regs +ffffffff82b874c0 r dmcu_regs +ffffffff82b8751c r dmcu_shift +ffffffff82b87530 r dmcu_mask +ffffffff82b8757c r abm_regs +ffffffff82b875bc r abm_shift +ffffffff82b875d0 r abm_mask +ffffffff82b87618 r res_create_funcs +ffffffff82b87648 r res_create_maximus_funcs +ffffffff82b87678 r plane_cap +ffffffff82b876a8 r dcn10_res_pool_funcs +ffffffff82b87790 r panel_cntl_regs +ffffffff82b877b0 r panel_cntl_shift +ffffffff82b877c0 r panel_cntl_mask +ffffffff82b87800 r link_enc_regs +ffffffff82b87d10 r link_enc_aux_regs +ffffffff82b87d50 r link_enc_hpd_regs +ffffffff82b87d60 r le_shift +ffffffff82b87e50 r le_mask +ffffffff82b88208 r link_enc_feature +ffffffff82b88218 r cs_shift +ffffffff82b88224 r cs_mask +ffffffff82b88250 r hubp_regs +ffffffff82b88900 r hubp_shift +ffffffff82b889c4 r hubp_mask +ffffffff82b88cd0 r ipp_regs +ffffffff82b88db0 r ipp_shift +ffffffff82b88dcc r ipp_mask +ffffffff82b88e40 r tf_regs +ffffffff82b89da0 r tf_shift +ffffffff82b8a008 r tf_mask +ffffffff82b8a9a0 r opp_regs +ffffffff82b8aa70 r opp_shift +ffffffff82b8aa90 r opp_mask +ffffffff82b8ab10 r tg_regs +ffffffff82b8b010 r tg_shift +ffffffff82b8b0d0 r tg_mask +ffffffff82b8b3d0 r aux_engine_regs +ffffffff82b8b4c0 r aux_mask +ffffffff82b8b520 r aux_shift +ffffffff82b8b540 r i2c_hw_regs +ffffffff82b8b690 r i2c_shifts +ffffffff82b8b6bc r i2c_masks +ffffffff82b8b760 r mpc_regs +ffffffff82b8b880 r mpc_shift +ffffffff82b8b898 r mpc_mask +ffffffff82b8b8f4 r hubbub_reg +ffffffff82b8ba68 r hubbub_shift +ffffffff82b8baf0 r hubbub_mask +ffffffff82b8bd10 r audio_regs +ffffffff82b8bdc0 r audio_shift +ffffffff82b8bdd8 r audio_mask +ffffffff82b8be20 r stream_enc_regs +ffffffff82b8c370 r se_shift +ffffffff82b8c44c r se_mask +ffffffff82b8c7b8 r hwseq_reg +ffffffff82b8c9d4 r hwseq_shift +ffffffff82b8ca54 r hwseq_mask +ffffffff82b8d000 r audio_clock_info_table_48bpc +ffffffff82b8d190 r audio_clock_info_table_36bpc +ffffffff82b8d320 r audio_clock_info_table +ffffffff82b8d4e0 r dcn10_str_enc_funcs +ffffffff82b8e000 r dccg2_funcs +ffffffff82b90000 r dpp_input_csc_matrix +ffffffff82b91000 R dcn20_dsc_funcs +ffffffff82b92000 R dcn20_dwbc_funcs +ffffffff82b93000 r filter_12tap_16p_upscale +ffffffff82b930e0 r filter_12tap_16p_117 +ffffffff82b931c0 r filter_12tap_16p_150 +ffffffff82b932a0 r filter_12tap_16p_183 +ffffffff82b93380 r filter_11tap_16p_upscale +ffffffff82b93450 r filter_11tap_16p_117 +ffffffff82b93520 r filter_11tap_16p_150 +ffffffff82b935f0 r filter_11tap_16p_183 +ffffffff82b936c0 r filter_10tap_16p_upscale +ffffffff82b93780 r filter_10tap_16p_117 +ffffffff82b93840 r filter_10tap_16p_150 +ffffffff82b93900 r filter_10tap_16p_183 +ffffffff82b939c0 r filter_9tap_16p_upscale +ffffffff82b93a70 r filter_9tap_16p_117 +ffffffff82b93b20 r filter_9tap_16p_150 +ffffffff82b93bd0 r filter_9tap_16p_183 +ffffffff82b93c80 r filter_8tap_16p_upscale +ffffffff82b93d10 r filter_8tap_16p_117 +ffffffff82b93da0 r filter_8tap_16p_150 +ffffffff82b93e30 r filter_8tap_16p_183 +ffffffff82b93ec0 r filter_7tap_16p_upscale +ffffffff82b93f40 r filter_7tap_16p_117 +ffffffff82b93fc0 r filter_7tap_16p_150 +ffffffff82b94040 r filter_7tap_16p_183 +ffffffff82b940c0 r filter_6tap_16p_upscale +ffffffff82b94130 r filter_6tap_16p_117 +ffffffff82b941a0 r filter_6tap_16p_150 +ffffffff82b94210 r filter_6tap_16p_183 +ffffffff82b94280 r filter_5tap_16p_upscale +ffffffff82b942e0 r filter_5tap_16p_117 +ffffffff82b94340 r filter_5tap_16p_150 +ffffffff82b943a0 r filter_5tap_16p_183 +ffffffff82b94400 r filter_4tap_16p_upscale +ffffffff82b94450 r filter_4tap_16p_117 +ffffffff82b944a0 r filter_4tap_16p_150 +ffffffff82b944f0 r filter_4tap_16p_183 +ffffffff82b94540 r filter_3tap_16p_upscale +ffffffff82b94580 r filter_3tap_16p_117 +ffffffff82b945c0 r filter_3tap_16p_150 +ffffffff82b94600 r filter_3tap_16p_183 +ffffffff82b95000 r hubbub2_funcs +ffffffff82b96000 r dcn20_funcs +ffffffff82b962c0 r dcn20_private_funcs +ffffffff82b97000 r dcn2_mpll_cfg +ffffffff82b97190 r dcn20_link_enc_funcs +ffffffff82b98000 R dcn20_mmhubbub_funcs +ffffffff82b99000 R dcn20_mpc_funcs +ffffffff82b9a000 r tf_regs +ffffffff82b9b920 r tf_shift +ffffffff82b9bba4 r tf_mask +ffffffff82b9c5c0 r ipp_regs +ffffffff82b9c710 r ipp_shift +ffffffff82b9c72c r ipp_mask +ffffffff82b9c7a0 r opp_regs +ffffffff82b9c9b0 r opp_shift +ffffffff82b9c9e8 r opp_mask +ffffffff82b9cac0 r aux_engine_regs +ffffffff82b9cbb0 r aux_mask +ffffffff82b9cc10 r aux_shift +ffffffff82b9cc30 r i2c_hw_regs +ffffffff82b9cd80 r i2c_shifts +ffffffff82b9cdac r i2c_masks +ffffffff82b9ce50 r mpc_regs +ffffffff82b9d398 r mpc_shift +ffffffff82b9d3e0 r mpc_mask +ffffffff82b9d4f4 r hubbub_reg +ffffffff82b9d668 r hubbub_shift +ffffffff82b9d6f0 r hubbub_mask +ffffffff82b9d90c r res_cap_nv10 +ffffffff82b9d950 r vmid_regs +ffffffff82b9db10 r vmid_shifts +ffffffff82b9db18 r vmid_masks +ffffffff82b9db40 r tg_regs +ffffffff82b9e2c0 r tg_shift +ffffffff82b9e380 r tg_mask +ffffffff82b9e680 r link_enc_regs +ffffffff82b9ee20 r link_enc_aux_regs +ffffffff82b9ee80 r link_enc_hpd_regs +ffffffff82b9ee98 r le_shift +ffffffff82b9ef88 r le_mask +ffffffff82b9f340 r stream_enc_regs +ffffffff82b9fb38 r se_shift +ffffffff82b9fc14 r se_mask +ffffffff82b9ff80 r hwseq_reg +ffffffff82ba019c r hwseq_shift +ffffffff82ba021c r hwseq_mask +ffffffff82ba0410 r dsc_regs +ffffffff82ba08a8 r dsc_shift +ffffffff82ba0960 r dsc_mask +ffffffff82ba0c40 r hubp_regs +ffffffff82ba1888 r hubp_shift +ffffffff82ba1984 r hubp_mask +ffffffff82ba1d80 r dwbc20_regs +ffffffff82ba1e38 r dwbc20_shift +ffffffff82ba1eb8 r dwbc20_mask +ffffffff82ba20b0 r mcif_wb20_regs +ffffffff82ba2190 r mcif_wb20_shift +ffffffff82ba2230 r mcif_wb20_mask +ffffffff82ba24b0 r link_enc_feature +ffffffff82ba24c0 r bios_regs +ffffffff82ba24c8 r dcn20_res_pool_funcs +ffffffff82ba25b0 r res_cap_nv14 +ffffffff82ba25f0 r debug_defaults_drv +ffffffff82ba2768 r debug_defaults_diags +ffffffff82ba28e0 r clk_src_regs +ffffffff82ba2ad8 r dccg_regs +ffffffff82ba2bc4 r dccg_shift +ffffffff82ba2c5c r dccg_mask +ffffffff82ba2ebc r dmcu_regs +ffffffff82ba2f18 r dmcu_shift +ffffffff82ba2f2c r dmcu_mask +ffffffff82ba2f78 r abm_regs +ffffffff82ba2fb8 r abm_shift +ffffffff82ba2fcc r abm_mask +ffffffff82ba3018 r res_create_funcs +ffffffff82ba3048 r res_create_maximus_funcs +ffffffff82ba3078 r plane_cap +ffffffff82ba30b0 r panel_cntl_regs +ffffffff82ba30d0 r panel_cntl_shift +ffffffff82ba30e0 r panel_cntl_mask +ffffffff82ba311c r cs_shift +ffffffff82ba3128 r cs_mask +ffffffff82ba3150 r audio_regs +ffffffff82ba3284 r audio_shift +ffffffff82ba329c r audio_mask +ffffffff82ba4000 r dcn20_str_enc_funcs +ffffffff82ba5000 r dccg201_funcs +ffffffff82ba6000 r hubbub201_funcs +ffffffff82ba7000 r dcn201_funcs +ffffffff82ba72c0 r dcn201_private_funcs +ffffffff82ba8000 r dcn201_link_enc_funcs +ffffffff82ba9000 R dcn201_mpc_funcs +ffffffff82baa000 r bios_regs +ffffffff82baa008 r res_cap_dnc201 +ffffffff82baa048 r debug_defaults_drv +ffffffff82baa1c0 r clk_src_regs +ffffffff82baa268 r dccg_regs +ffffffff82baa354 r dccg_shift +ffffffff82baa3ec r dccg_mask +ffffffff82baa650 r res_create_funcs +ffffffff82baa680 r res_create_maximus_funcs +ffffffff82baa6b0 r plane_cap +ffffffff82baa6e0 r link_enc_regs +ffffffff82baa970 r link_enc_aux_regs +ffffffff82baa990 r link_enc_hpd_regs +ffffffff82baa998 r le_shift +ffffffff82baaa88 r le_mask +ffffffff82baae40 r link_enc_feature +ffffffff82baae50 r cs_shift +ffffffff82baae5c r cs_mask +ffffffff82baae90 r hubp_regs +ffffffff82bab620 r hubp_shift +ffffffff82bab6f8 r hubp_mask +ffffffff82baba60 r ipp_regs +ffffffff82babb40 r ipp_shift +ffffffff82babb5c r ipp_mask +ffffffff82babbd0 r tf_regs +ffffffff82bacc10 r tf_shift +ffffffff82bace94 r tf_mask +ffffffff82bad8b0 r opp_regs +ffffffff82bad960 r opp_shift +ffffffff82bad998 r opp_mask +ffffffff82bada70 r aux_engine_regs +ffffffff82badac0 r aux_mask +ffffffff82badb20 r aux_shift +ffffffff82badb40 r i2c_hw_regs +ffffffff82badbb0 r i2c_shifts +ffffffff82badbdc r i2c_masks +ffffffff82badc80 r tg_regs +ffffffff82badf00 r tg_shift +ffffffff82badfc0 r tg_mask +ffffffff82bae2c0 r mpc_regs +ffffffff82bae808 r mpc_shift +ffffffff82bae854 r mpc_mask +ffffffff82bae97c r hubbub_reg +ffffffff82baeaf0 r hubbub_shift +ffffffff82baeb78 r hubbub_mask +ffffffff82baeda0 r audio_regs +ffffffff82baedf8 r audio_shift +ffffffff82baee10 r audio_mask +ffffffff82baee50 r stream_enc_regs +ffffffff82baf0f8 r se_shift +ffffffff82baf1d4 r se_mask +ffffffff82baf540 r hwseq_reg +ffffffff82baf75c r hwseq_shift +ffffffff82baf7dc r hwseq_mask +ffffffff82bb0000 r dccg21_funcs +ffffffff82bb1000 r hubbub21_funcs +ffffffff82bb2000 r dcn21_funcs +ffffffff82bb22c0 r dcn21_private_funcs +ffffffff82bb3000 r dcn21_mpll_cfg_ref +ffffffff82bb3190 r dcn21_link_enc_funcs +ffffffff82bb4000 r bios_regs +ffffffff82bb4008 r res_cap_rn +ffffffff82bb4048 r dcn21_res_pool_funcs +ffffffff82bb4130 r debug_defaults_drv +ffffffff82bb42a8 r debug_defaults_diags +ffffffff82bb4420 r clk_src_regs +ffffffff82bb45c4 r dccg_regs +ffffffff82bb46b0 r dccg_shift +ffffffff82bb4748 r dccg_mask +ffffffff82bb49a8 r dmcu_regs +ffffffff82bb4a04 r dmcu_shift +ffffffff82bb4a18 r dmcu_mask +ffffffff82bb4a64 r abm_regs +ffffffff82bb4aa4 r abm_shift +ffffffff82bb4ab8 r abm_mask +ffffffff82bb4b00 r res_create_funcs +ffffffff82bb4b30 r res_create_maximus_funcs +ffffffff82bb4b60 r plane_cap +ffffffff82bb4b90 r panel_cntl_regs +ffffffff82bb4bb0 r panel_cntl_shift +ffffffff82bb4bc0 r panel_cntl_mask +ffffffff82bb4c00 r link_enc_regs +ffffffff82bb5260 r link_enc_aux_regs +ffffffff82bb52b0 r link_enc_hpd_regs +ffffffff82bb52c4 r le_shift +ffffffff82bb53b4 r le_mask +ffffffff82bb576c r link_enc_feature +ffffffff82bb577c r panel_config_defaults +ffffffff82bb57b8 r cs_shift +ffffffff82bb57c4 r cs_mask +ffffffff82bb57f0 r hubp_regs +ffffffff82bb6020 r hubp_shift +ffffffff82bb611c r hubp_mask +ffffffff82bb6510 r ipp_regs +ffffffff82bb65f0 r ipp_shift +ffffffff82bb660c r ipp_mask +ffffffff82bb6680 r tf_regs +ffffffff82bb7740 r tf_shift +ffffffff82bb79c4 r tf_mask +ffffffff82bb83e0 r opp_regs +ffffffff82bb85f0 r opp_shift +ffffffff82bb8628 r opp_mask +ffffffff82bb8700 r tg_regs +ffffffff82bb8c00 r tg_shift +ffffffff82bb8cc0 r tg_mask +ffffffff82bb8fc0 r aux_engine_regs +ffffffff82bb9088 r aux_mask +ffffffff82bb90e8 r aux_shift +ffffffff82bb9100 r i2c_hw_regs +ffffffff82bb9218 r i2c_shifts +ffffffff82bb9244 r i2c_masks +ffffffff82bb92e8 r mpc_regs +ffffffff82bb9830 r mpc_shift +ffffffff82bb9878 r mpc_mask +ffffffff82bb998c r hubbub_reg +ffffffff82bb9b00 r hubbub_shift +ffffffff82bb9b88 r hubbub_mask +ffffffff82bb9db0 r vmid_regs +ffffffff82bb9f70 r vmid_shifts +ffffffff82bb9f78 r vmid_masks +ffffffff82bb9fa0 r dsc_regs +ffffffff82bba438 r dsc_shift +ffffffff82bba4f0 r dsc_mask +ffffffff82bba7d0 r audio_regs +ffffffff82bba8d8 r audio_shift +ffffffff82bba8f0 r audio_mask +ffffffff82bba930 r stream_enc_regs +ffffffff82bbafd4 r se_shift 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dcn30_res_pool_funcs +ffffffff82bc6c80 r panel_cntl_regs +ffffffff82bc6ca0 r panel_cntl_shift +ffffffff82bc6cb0 r panel_cntl_mask +ffffffff82bc6cf0 r link_enc_regs +ffffffff82bc7490 r link_enc_aux_regs +ffffffff82bc74f0 r link_enc_hpd_regs +ffffffff82bc7508 r le_shift +ffffffff82bc75f8 r le_mask +ffffffff82bc79b0 r link_enc_feature +ffffffff82bc79c0 r panel_config_defaults +ffffffff82bc79fc r cs_shift +ffffffff82bc7a08 r cs_mask +ffffffff82bc7a30 r hubbub_reg +ffffffff82bc7ba4 r hubbub_shift +ffffffff82bc7c2c r hubbub_mask +ffffffff82bc7e50 r vmid_regs +ffffffff82bc8010 r vmid_shifts +ffffffff82bc8018 r vmid_masks +ffffffff82bc8040 r hubp_regs +ffffffff82bc8c88 r hubp_shift +ffffffff82bc8d84 r hubp_mask +ffffffff82bc9180 r dpp_regs +ffffffff82bcb100 r tf_shift +ffffffff82bcb3d0 r tf_mask +ffffffff82bcbf10 r opp_regs +ffffffff82bcc120 r opp_shift +ffffffff82bcc158 r opp_mask +ffffffff82bcc230 r optc_regs +ffffffff82bcc9b0 r optc_shift +ffffffff82bcca70 r optc_mask +ffffffff82bccd70 r mpc_regs +ffffffff82bce55c r mpc_shift +ffffffff82bce638 r mpc_mask +ffffffff82bce9b0 r dsc_regs +ffffffff82bcee48 r dsc_shift +ffffffff82bcef00 r dsc_mask +ffffffff82bcf1e0 r dwbc30_regs +ffffffff82bcf3bc r dwbc30_shift +ffffffff82bcf4f0 r dwbc30_mask +ffffffff82bcf9c0 r mcif_wb30_regs +ffffffff82bcfabc r mcif_wb30_shift +ffffffff82bcfb68 r mcif_wb30_mask +ffffffff82bcfe20 r aux_engine_regs +ffffffff82bcff10 r aux_mask +ffffffff82bcff70 r aux_shift +ffffffff82bcff90 r i2c_hw_regs +ffffffff82bd00e0 r i2c_shifts +ffffffff82bd010c r i2c_masks +ffffffff82bd01b0 r audio_regs +ffffffff82bd02e4 r audio_shift +ffffffff82bd02fc r audio_mask +ffffffff82bd0340 r stream_enc_regs +ffffffff82bd0b38 r se_shift +ffffffff82bd0c14 r se_mask +ffffffff82bd0f80 r vpg_regs +ffffffff82bd100c r vpg_shift +ffffffff82bd1034 r vpg_mask +ffffffff82bd10d0 r afmt_regs +ffffffff82bd11cc r afmt_shift +ffffffff82bd11e0 r afmt_mask +ffffffff82bd1224 r hwseq_reg +ffffffff82bd1440 r hwseq_shift +ffffffff82bd14c0 r hwseq_mask +ffffffff82bd2000 r dccg301_funcs +ffffffff82bd3000 r dcn301_link_enc_funcs +ffffffff82bd4000 r hubbub301_funcs +ffffffff82bd5000 r dcn301_funcs +ffffffff82bd52c0 r dcn301_private_funcs +ffffffff82bd6000 r dcn301_link_panel_cntl_funcs +ffffffff82bd7000 r bios_regs +ffffffff82bd7008 r debug_defaults_drv +ffffffff82bd7180 r debug_defaults_diags +ffffffff82bd7300 r clk_src_regs +ffffffff82bd7450 r dccg_regs +ffffffff82bd753c r dccg_shift +ffffffff82bd75d4 r dccg_mask +ffffffff82bd7840 r abm_regs +ffffffff82bd7940 r abm_shift +ffffffff82bd7954 r abm_mask +ffffffff82bd79a0 r res_create_funcs +ffffffff82bd79d0 r res_create_maximus_funcs +ffffffff82bd7a00 r plane_cap +ffffffff82bd7a30 r panel_cntl_regs +ffffffff82bd7a70 r panel_cntl_shift +ffffffff82bd7a80 r panel_cntl_mask +ffffffff82bd7ac0 r link_enc_regs +ffffffff82bd7fd0 r link_enc_aux_regs +ffffffff82bd8010 r link_enc_hpd_regs +ffffffff82bd8020 r le_shift +ffffffff82bd8110 r le_mask +ffffffff82bd84c8 r link_enc_feature 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aux_engine_regs +ffffffff82bdf580 r aux_mask +ffffffff82bdf5e0 r aux_shift +ffffffff82bdf600 r i2c_hw_regs +ffffffff82bdf6e0 r i2c_shifts +ffffffff82bdf70c r i2c_masks +ffffffff82bdf7b0 r audio_regs +ffffffff82bdf8e4 r audio_shift +ffffffff82bdf8fc r audio_mask +ffffffff82bdf940 r stream_enc_regs +ffffffff82bdfe90 r se_shift +ffffffff82bdff6c r se_mask +ffffffff82be02e0 r vpg_regs +ffffffff82be0330 r vpg_shift +ffffffff82be0358 r vpg_mask +ffffffff82be03f0 r afmt_regs +ffffffff82be0480 r afmt_shift +ffffffff82be0494 r afmt_mask +ffffffff82be04d8 r hwseq_reg +ffffffff82be06f4 r hwseq_shift +ffffffff82be0774 r hwseq_mask +ffffffff82be1000 r bios_regs +ffffffff82be1008 r res_cap_dcn302 +ffffffff82be1048 r debug_defaults_drv +ffffffff82be11c0 r debug_defaults_diags +ffffffff82be1340 r clk_src_regs +ffffffff82be14e4 r dccg_regs +ffffffff82be15d0 r dccg_shift +ffffffff82be1668 r dccg_mask +ffffffff82be18d0 r abm_regs +ffffffff82be1a10 r abm_shift +ffffffff82be1a24 r abm_mask +ffffffff82be1a70 r res_create_funcs +ffffffff82be1aa0 r res_create_maximus_funcs +ffffffff82be1ad0 r plane_cap +ffffffff82be1b00 r panel_cntl_regs +ffffffff82be1b20 r panel_cntl_shift +ffffffff82be1b30 r panel_cntl_mask +ffffffff82be1b70 r link_enc_regs +ffffffff82be21d0 r link_enc_aux_regs +ffffffff82be2220 r link_enc_hpd_regs +ffffffff82be2234 r le_shift +ffffffff82be2324 r le_mask +ffffffff82be26dc r link_enc_feature +ffffffff82be26ec r panel_config_defaults +ffffffff82be2728 r cs_shift +ffffffff82be2734 r cs_mask +ffffffff82be275c r hubbub_reg +ffffffff82be28d0 r hubbub_shift +ffffffff82be2958 r hubbub_mask +ffffffff82be2b80 r vmid_regs +ffffffff82be2d40 r vmid_shifts +ffffffff82be2d48 r vmid_masks +ffffffff82be2d70 r hubp_regs +ffffffff82be37ac r hubp_shift +ffffffff82be38a8 r hubp_mask +ffffffff82be3ca0 r dpp_regs +ffffffff82be56e0 r tf_shift +ffffffff82be59b0 r tf_mask +ffffffff82be64f0 r opp_regs +ffffffff82be66a8 r opp_shift +ffffffff82be66e0 r opp_mask +ffffffff82be67c0 r optc_regs +ffffffff82be6e00 r optc_shift +ffffffff82be6ec0 r optc_mask +ffffffff82be71c0 r mpc_regs +ffffffff82be89ac r mpc_shift +ffffffff82be8a88 r mpc_mask +ffffffff82be8e00 r dsc_regs +ffffffff82be91d4 r dsc_shift +ffffffff82be928c r dsc_mask +ffffffff82be9570 r dwbc30_regs +ffffffff82be974c r dwbc30_shift +ffffffff82be9880 r dwbc30_mask +ffffffff82be9d50 r mcif_wb30_regs +ffffffff82be9e4c r mcif_wb30_shift +ffffffff82be9ef8 r mcif_wb30_mask +ffffffff82bea1b0 r aux_engine_regs +ffffffff82bea278 r aux_mask +ffffffff82bea2d8 r aux_shift +ffffffff82bea2f0 r i2c_hw_regs +ffffffff82bea408 r i2c_shifts +ffffffff82bea434 r i2c_masks +ffffffff82bea4e0 r audio_regs +ffffffff82bea614 r audio_shift +ffffffff82bea62c r audio_mask +ffffffff82bea670 r stream_enc_regs +ffffffff82bead14 r se_shift +ffffffff82beadf0 r se_mask +ffffffff82beb160 r vpg_regs +ffffffff82beb1d8 r vpg_shift +ffffffff82beb200 r vpg_mask +ffffffff82beb2a0 r afmt_regs +ffffffff82beb378 r afmt_shift +ffffffff82beb38c r afmt_mask +ffffffff82beb3d0 r hwseq_reg +ffffffff82beb5ec r hwseq_shift +ffffffff82beb66c r hwseq_mask +ffffffff82bec000 r bios_regs +ffffffff82bec008 r res_cap_dcn303 +ffffffff82bec048 r debug_defaults_drv +ffffffff82bec1c0 r debug_defaults_diags +ffffffff82bec340 r clk_src_regs +ffffffff82bec3e8 r dccg_regs +ffffffff82bec4d4 r dccg_shift +ffffffff82bec56c r dccg_mask +ffffffff82bec7d0 r abm_regs +ffffffff82bec850 r abm_shift +ffffffff82bec864 r abm_mask +ffffffff82bec8b0 r res_create_funcs +ffffffff82bec8e0 r res_create_maximus_funcs +ffffffff82bec910 r plane_cap +ffffffff82bec940 r panel_cntl_regs +ffffffff82bec960 r panel_cntl_shift +ffffffff82bec970 r panel_cntl_mask +ffffffff82bec9b0 r link_enc_regs +ffffffff82becc40 r link_enc_aux_regs +ffffffff82becc60 r link_enc_hpd_regs +ffffffff82becc68 r le_shift +ffffffff82becd58 r le_mask +ffffffff82bed110 r link_enc_feature +ffffffff82bed120 r panel_config_defaults +ffffffff82bed15c r cs_shift +ffffffff82bed168 r cs_mask +ffffffff82bed190 r hubbub_reg +ffffffff82bed304 r hubbub_shift +ffffffff82bed38c r hubbub_mask +ffffffff82bed5b0 r vmid_regs +ffffffff82bed770 r vmid_shifts +ffffffff82bed778 r vmid_masks +ffffffff82bed7a0 r hubp_regs +ffffffff82bedbb8 r hubp_shift +ffffffff82bedcb4 r hubp_mask +ffffffff82bee0b0 r dpp_regs +ffffffff82beeb30 r tf_shift +ffffffff82beee00 r tf_mask +ffffffff82bef940 r opp_regs +ffffffff82bef9f0 r opp_shift +ffffffff82befa28 r opp_mask +ffffffff82befb00 r optc_regs +ffffffff82befd80 r optc_shift +ffffffff82befe40 r optc_mask +ffffffff82bf0140 r mpc_regs +ffffffff82bf192c r mpc_shift +ffffffff82bf1a08 r mpc_mask +ffffffff82bf1d80 r dsc_regs +ffffffff82bf1f08 r dsc_shift +ffffffff82bf1fc0 r dsc_mask +ffffffff82bf22a0 r dwbc30_regs +ffffffff82bf247c r dwbc30_shift +ffffffff82bf25b0 r dwbc30_mask +ffffffff82bf2a80 r mcif_wb30_regs +ffffffff82bf2b7c r mcif_wb30_shift +ffffffff82bf2c28 r mcif_wb30_mask +ffffffff82bf2ee0 r aux_engine_regs +ffffffff82bf2f30 r aux_mask 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+ffffffff82bfa370 r clk_src_regs_b0 +ffffffff82bfa514 r dccg_regs +ffffffff82bfa600 r dccg_shift +ffffffff82bfa698 r dccg_mask +ffffffff82bfa900 r abm_regs +ffffffff82bfaa00 r abm_shift +ffffffff82bfaa14 r abm_mask +ffffffff82bfaa60 r res_create_funcs +ffffffff82bfaa90 r res_create_maximus_funcs +ffffffff82bfaac0 r plane_cap +ffffffff82bfaaf0 r link_enc_regs +ffffffff82bfb150 r link_enc_aux_regs +ffffffff82bfb1a0 r link_enc_hpd_regs +ffffffff82bfb1b4 r le_shift +ffffffff82bfb2a4 r le_mask +ffffffff82bfb65c r link_enc_feature +ffffffff82bfb66c r panel_config_defaults +ffffffff82bfb6a8 r debug_defaults_drv +ffffffff82bfb820 r cs_shift +ffffffff82bfb82c r cs_mask +ffffffff82bfb854 r hubbub_reg +ffffffff82bfb9c8 r hubbub_shift +ffffffff82bfba50 r hubbub_mask +ffffffff82bfbc70 r vmid_regs +ffffffff82bfbe30 r vmid_shifts +ffffffff82bfbe38 r vmid_masks +ffffffff82bfbe60 r hubp_regs +ffffffff82bfc690 r hubp_shift +ffffffff82bfc78c r hubp_mask +ffffffff82bfcb80 r dpp_regs +ffffffff82bfe080 r tf_shift +ffffffff82bfe350 r tf_mask +ffffffff82bfee90 r opp_regs +ffffffff82bfeff0 r opp_shift +ffffffff82bff028 r opp_mask +ffffffff82bff100 r optc_regs +ffffffff82bff600 r optc_shift +ffffffff82bff6c0 r optc_mask +ffffffff82bff9c0 r mpc_regs +ffffffff82c011ac r mpc_shift +ffffffff82c01288 r mpc_mask +ffffffff82c01600 r dsc_regs +ffffffff82c0184c r dsc_shift +ffffffff82c01904 r dsc_mask +ffffffff82c01be0 r dwbc30_regs +ffffffff82c01dbc r dwbc30_shift +ffffffff82c01ef0 r dwbc30_mask +ffffffff82c023c0 r mcif_wb30_regs +ffffffff82c024bc r mcif_wb30_shift +ffffffff82c02568 r mcif_wb30_mask +ffffffff82c02820 r aux_engine_regs +ffffffff82c028e8 r aux_mask +ffffffff82c02948 r aux_shift +ffffffff82c02960 r i2c_hw_regs +ffffffff82c02a78 r i2c_shifts +ffffffff82c02aa4 r i2c_masks +ffffffff82c02b50 r audio_regs +ffffffff82c02c84 r audio_shift +ffffffff82c02c9c r audio_mask +ffffffff82c02cd8 r se_shift +ffffffff82c02db4 r se_mask +ffffffff82c03120 r vpg_regs +ffffffff82c03210 r vpg_shift +ffffffff82c03238 r vpg_mask +ffffffff82c032e0 r afmt_regs +ffffffff82c033b8 r afmt_shift +ffffffff82c033cc r afmt_mask +ffffffff82c03420 r stream_enc_regs +ffffffff82c04ac0 r hpo_dp_stream_enc_regs +ffffffff82c04cf0 r hpo_dp_se_shift +ffffffff82c04d18 r hpo_dp_se_mask +ffffffff82c04dc0 r apg_regs +ffffffff82c04e00 r apg_shift +ffffffff82c04e08 r apg_mask +ffffffff82c04e20 r hpo_dp_link_enc_regs +ffffffff82c04f30 r hpo_dp_le_shift +ffffffff82c04f4c r hpo_dp_le_mask +ffffffff82c04fb0 r hwseq_reg +ffffffff82c051cc r hwseq_shift +ffffffff82c0524c r hwseq_mask +ffffffff82c06000 r dccg314_funcs +ffffffff82c07000 r dcn314_str_enc_funcs +ffffffff82c08000 r dcn314_funcs +ffffffff82c082c0 r dcn314_private_funcs +ffffffff82c09000 r bios_regs +ffffffff82c09008 r res_cap_dcn314 +ffffffff82c09048 r debug_defaults_diags +ffffffff82c091c0 r clk_src_regs +ffffffff82c09364 r dccg_regs +ffffffff82c09450 r dccg_shift +ffffffff82c094e8 r dccg_mask +ffffffff82c09750 r abm_regs +ffffffff82c09850 r abm_shift +ffffffff82c09864 r abm_mask +ffffffff82c098b0 r res_create_funcs +ffffffff82c098e0 r res_create_maximus_funcs +ffffffff82c09910 r plane_cap +ffffffff82c09940 r link_enc_regs +ffffffff82c09fa0 r link_enc_aux_regs +ffffffff82c09ff0 r link_enc_hpd_regs +ffffffff82c0a004 r le_shift +ffffffff82c0a0f4 r le_mask +ffffffff82c0a4ac r link_enc_feature +ffffffff82c0a4bc r panel_config_defaults +ffffffff82c0a4f8 r debug_defaults_drv +ffffffff82c0a670 r cs_shift +ffffffff82c0a67c r cs_mask +ffffffff82c0a6a4 r hubbub_reg +ffffffff82c0a818 r hubbub_shift +ffffffff82c0a8a0 r hubbub_mask +ffffffff82c0aac0 r vmid_regs +ffffffff82c0ac80 r vmid_shifts +ffffffff82c0ac88 r vmid_masks +ffffffff82c0acb0 r hubp_regs +ffffffff82c0b4e0 r hubp_shift +ffffffff82c0b5dc r hubp_mask +ffffffff82c0b9d0 r dpp_regs +ffffffff82c0ced0 r tf_shift +ffffffff82c0d1a0 r tf_mask +ffffffff82c0dce0 r opp_regs +ffffffff82c0de40 r opp_shift +ffffffff82c0de78 r opp_mask +ffffffff82c0df50 r optc_regs +ffffffff82c0e450 r optc_shift +ffffffff82c0e510 r optc_mask +ffffffff82c0e810 r mpc_regs +ffffffff82c0fffc r mpc_shift +ffffffff82c100d8 r mpc_mask +ffffffff82c10450 r dsc_regs +ffffffff82c10760 r dsc_shift +ffffffff82c10818 r dsc_mask +ffffffff82c10af0 r dwbc30_regs +ffffffff82c10ccc r dwbc30_shift +ffffffff82c10e00 r dwbc30_mask +ffffffff82c112d0 r mcif_wb30_regs +ffffffff82c113cc r mcif_wb30_shift +ffffffff82c11478 r mcif_wb30_mask +ffffffff82c11730 r aux_engine_regs +ffffffff82c117f8 r aux_mask +ffffffff82c11858 r aux_shift +ffffffff82c11870 r i2c_hw_regs +ffffffff82c11988 r i2c_shifts +ffffffff82c119b4 r i2c_masks +ffffffff82c11a60 r audio_regs +ffffffff82c11b94 r audio_shift +ffffffff82c11bac r audio_mask +ffffffff82c11bf0 r stream_enc_regs +ffffffff82c12294 r se_shift +ffffffff82c12370 r se_mask +ffffffff82c126e0 r vpg_regs +ffffffff82c127d0 r vpg_shift +ffffffff82c127f8 r vpg_mask +ffffffff82c128a0 r afmt_regs +ffffffff82c12978 r afmt_shift +ffffffff82c1298c r afmt_mask +ffffffff82c129e0 r hpo_dp_stream_enc_regs +ffffffff82c12c10 r hpo_dp_se_shift +ffffffff82c12c38 r hpo_dp_se_mask +ffffffff82c12ce0 r apg_regs +ffffffff82c12d20 r apg_shift +ffffffff82c12d28 r apg_mask +ffffffff82c12d40 r hpo_dp_link_enc_regs +ffffffff82c12e50 r hpo_dp_le_shift +ffffffff82c12e6c r hpo_dp_le_mask +ffffffff82c12ed0 r hwseq_reg +ffffffff82c130ec r hwseq_shift +ffffffff82c1316c r hwseq_mask +ffffffff82c14000 r bios_regs +ffffffff82c14008 r res_cap_dcn31 +ffffffff82c14048 r debug_defaults_diags +ffffffff82c141c0 r clk_src_regs +ffffffff82c14364 r dccg_regs +ffffffff82c14450 r dccg_shift +ffffffff82c144e8 r dccg_mask +ffffffff82c14750 r abm_regs +ffffffff82c14850 r abm_shift +ffffffff82c14864 r abm_mask +ffffffff82c148b0 r res_create_funcs +ffffffff82c148e0 r res_create_maximus_funcs +ffffffff82c14910 r plane_cap +ffffffff82c14940 r link_enc_regs +ffffffff82c14fa0 r link_enc_aux_regs +ffffffff82c14ff0 r link_enc_hpd_regs +ffffffff82c15004 r le_shift +ffffffff82c150f4 r le_mask +ffffffff82c154ac r link_enc_feature +ffffffff82c154bc r panel_config_defaults +ffffffff82c154f8 r debug_defaults_drv +ffffffff82c15670 r cs_shift +ffffffff82c1567c r cs_mask +ffffffff82c156a4 r hubbub_reg +ffffffff82c15818 r hubbub_shift +ffffffff82c158a0 r hubbub_mask +ffffffff82c15ac0 r vmid_regs +ffffffff82c15c80 r vmid_shifts +ffffffff82c15c88 r vmid_masks +ffffffff82c15cb0 r hubp_regs +ffffffff82c164e0 r hubp_shift +ffffffff82c165dc r hubp_mask +ffffffff82c169d0 r dpp_regs +ffffffff82c17ed0 r tf_shift +ffffffff82c181a0 r tf_mask +ffffffff82c18ce0 r opp_regs +ffffffff82c18e40 r opp_shift +ffffffff82c18e78 r opp_mask +ffffffff82c18f50 r optc_regs +ffffffff82c19450 r optc_shift +ffffffff82c19510 r optc_mask +ffffffff82c19810 r mpc_regs +ffffffff82c1affc r mpc_shift +ffffffff82c1b0d8 r mpc_mask +ffffffff82c1b450 r dsc_regs +ffffffff82c1b69c r dsc_shift +ffffffff82c1b754 r dsc_mask +ffffffff82c1ba30 r dwbc30_regs +ffffffff82c1bc0c r dwbc30_shift +ffffffff82c1bd40 r dwbc30_mask +ffffffff82c1c210 r mcif_wb30_regs +ffffffff82c1c30c r mcif_wb30_shift +ffffffff82c1c3b8 r mcif_wb30_mask +ffffffff82c1c670 r aux_engine_regs +ffffffff82c1c738 r aux_mask +ffffffff82c1c798 r aux_shift +ffffffff82c1c7b0 r i2c_hw_regs +ffffffff82c1c8c8 r i2c_shifts +ffffffff82c1c8f4 r i2c_masks +ffffffff82c1c9a0 r audio_regs +ffffffff82c1cad4 r audio_shift +ffffffff82c1caec r audio_mask +ffffffff82c1cb30 r stream_enc_regs +ffffffff82c1d1d4 r se_shift +ffffffff82c1d2b0 r se_mask +ffffffff82c1d620 r vpg_regs +ffffffff82c1d710 r vpg_shift +ffffffff82c1d738 r vpg_mask +ffffffff82c1d7e0 r afmt_regs +ffffffff82c1d8b8 r afmt_shift +ffffffff82c1d8cc r afmt_mask +ffffffff82c1d920 r hpo_dp_stream_enc_regs +ffffffff82c1db50 r hpo_dp_se_shift +ffffffff82c1db78 r hpo_dp_se_mask +ffffffff82c1dc20 r apg_regs +ffffffff82c1dc60 r apg_shift +ffffffff82c1dc68 r apg_mask +ffffffff82c1dc80 r hpo_dp_link_enc_regs +ffffffff82c1dd90 r hpo_dp_le_shift +ffffffff82c1ddac r hpo_dp_le_mask +ffffffff82c1de10 r hwseq_reg +ffffffff82c1e02c r hwseq_shift +ffffffff82c1e0ac r hwseq_mask +ffffffff82c1f000 r bios_regs +ffffffff82c1f008 r res_cap_dcn31 +ffffffff82c1f048 r debug_defaults_diags +ffffffff82c1f1c0 r clk_src_regs +ffffffff82c1f364 r dccg_regs +ffffffff82c1f450 r dccg_shift +ffffffff82c1f4e8 r dccg_mask +ffffffff82c1f750 r abm_regs +ffffffff82c1f850 r abm_shift +ffffffff82c1f864 r abm_mask +ffffffff82c1f8b0 r res_create_funcs +ffffffff82c1f8e0 r res_create_maximus_funcs +ffffffff82c1f910 r plane_cap +ffffffff82c1f940 r link_enc_regs +ffffffff82c1ffa0 r link_enc_aux_regs +ffffffff82c1fff0 r link_enc_hpd_regs +ffffffff82c20004 r le_shift +ffffffff82c200f4 r le_mask +ffffffff82c204ac r link_enc_feature +ffffffff82c204bc r panel_config_defaults +ffffffff82c204f8 r debug_defaults_drv +ffffffff82c20670 r cs_shift +ffffffff82c2067c r cs_mask +ffffffff82c206a4 r hubbub_reg +ffffffff82c20818 r hubbub_shift +ffffffff82c208a0 r hubbub_mask +ffffffff82c20ac0 r vmid_regs +ffffffff82c20c80 r vmid_shifts +ffffffff82c20c88 r vmid_masks +ffffffff82c20cb0 r hubp_regs +ffffffff82c214e0 r hubp_shift +ffffffff82c215dc r hubp_mask +ffffffff82c219d0 r dpp_regs +ffffffff82c22ed0 r tf_shift +ffffffff82c231a0 r tf_mask +ffffffff82c23ce0 r opp_regs +ffffffff82c23e40 r opp_shift +ffffffff82c23e78 r opp_mask +ffffffff82c23f50 r optc_regs +ffffffff82c24450 r optc_shift +ffffffff82c24510 r optc_mask +ffffffff82c24810 r mpc_regs +ffffffff82c25ffc r mpc_shift +ffffffff82c260d8 r mpc_mask +ffffffff82c26450 r dsc_regs +ffffffff82c2669c r dsc_shift +ffffffff82c26754 r dsc_mask +ffffffff82c26a30 r dwbc30_regs +ffffffff82c26c0c r dwbc30_shift +ffffffff82c26d40 r dwbc30_mask +ffffffff82c27210 r mcif_wb30_regs +ffffffff82c2730c r mcif_wb30_shift +ffffffff82c273b8 r mcif_wb30_mask +ffffffff82c27670 r aux_engine_regs +ffffffff82c27738 r aux_mask +ffffffff82c27798 r aux_shift +ffffffff82c277b0 r i2c_hw_regs +ffffffff82c278c8 r i2c_shifts +ffffffff82c278f4 r i2c_masks +ffffffff82c279a0 r audio_regs +ffffffff82c27ad4 r audio_shift +ffffffff82c27aec r audio_mask +ffffffff82c27b30 r stream_enc_regs +ffffffff82c281d4 r se_shift +ffffffff82c282b0 r se_mask +ffffffff82c28620 r vpg_regs +ffffffff82c28710 r vpg_shift +ffffffff82c28738 r vpg_mask +ffffffff82c287e0 r afmt_regs +ffffffff82c288b8 r afmt_shift +ffffffff82c288cc r afmt_mask +ffffffff82c28920 r hpo_dp_stream_enc_regs +ffffffff82c28b50 r hpo_dp_se_shift +ffffffff82c28b78 r hpo_dp_se_mask +ffffffff82c28c20 r apg_regs +ffffffff82c28c60 r apg_shift +ffffffff82c28c68 r apg_mask +ffffffff82c28c80 r hpo_dp_link_enc_regs +ffffffff82c28d90 r hpo_dp_le_shift +ffffffff82c28dac r hpo_dp_le_mask +ffffffff82c28e10 r hwseq_reg +ffffffff82c2902c r hwseq_shift +ffffffff82c290ac r hwseq_mask +ffffffff82c2a000 r dccg32_funcs +ffffffff82c2b000 r dcn32_link_enc_funcs +ffffffff82c2c000 r dcn32_str_enc_funcs +ffffffff82c2d000 r hubbub32_funcs +ffffffff82c2e000 r dcn32_funcs +ffffffff82c2e2c0 r dcn32_private_funcs +ffffffff82c2f000 R dcn32_mmhubbub_funcs +ffffffff82c30000 R dcn32_mpc_funcs +ffffffff82c31000 r res_cap_dcn32 +ffffffff82c31040 r debug_defaults_diags +ffffffff82c311b8 r dccg_shift +ffffffff82c31250 r dccg_mask +ffffffff82c314b0 r abm_shift +ffffffff82c314c4 r abm_mask +ffffffff82c31510 r res_create_funcs +ffffffff82c31540 r res_create_maximus_funcs +ffffffff82c31570 r plane_cap +ffffffff82c3159c r le_shift +ffffffff82c3168c r le_mask +ffffffff82c31a44 r link_enc_feature +ffffffff82c31a58 r debug_defaults_drv +ffffffff82c31bd0 r cs_shift +ffffffff82c31bdc r cs_mask +ffffffff82c31c04 r hubbub_shift +ffffffff82c31c8c r hubbub_mask +ffffffff82c31ea8 r vmid_shifts +ffffffff82c31eb0 r vmid_masks +ffffffff82c31ed0 r hubp_shift +ffffffff82c31fcc r hubp_mask +ffffffff82c323bc r tf_shift +ffffffff82c3268c r tf_mask +ffffffff82c331cc r opp_shift +ffffffff82c33204 r opp_mask +ffffffff82c332d8 r optc_shift +ffffffff82c33398 r optc_mask +ffffffff82c33698 r mpc_shift +ffffffff82c33774 r mpc_mask +ffffffff82c33ae0 r dsc_shift +ffffffff82c33b98 r dsc_mask +ffffffff82c33e70 r dwbc30_shift +ffffffff82c33fa4 r dwbc30_mask +ffffffff82c3446c r mcif_wb30_shift +ffffffff82c34518 r mcif_wb30_mask +ffffffff82c347c4 r aux_mask +ffffffff82c34824 r aux_shift +ffffffff82c3483c r i2c_shifts +ffffffff82c34868 r i2c_masks +ffffffff82c3490c r audio_shift +ffffffff82c34924 r audio_mask +ffffffff82c34960 r se_shift +ffffffff82c34a3c r se_mask +ffffffff82c34da8 r vpg_shift +ffffffff82c34dd0 r vpg_mask +ffffffff82c34e64 r afmt_shift +ffffffff82c34e78 r afmt_mask +ffffffff82c34ebc r hpo_dp_se_shift +ffffffff82c34ee4 r hpo_dp_se_mask +ffffffff82c34f84 r apg_shift +ffffffff82c34f8c r apg_mask +ffffffff82c34fa4 r hpo_dp_le_shift +ffffffff82c34fc0 r hpo_dp_le_mask +ffffffff82c35024 r hwseq_shift +ffffffff82c350a4 r hwseq_mask +ffffffff82c36000 r dcn321_link_enc_funcs +ffffffff82c37000 r res_cap_dcn321 +ffffffff82c37040 r debug_defaults_diags +ffffffff82c371b8 r dccg_shift +ffffffff82c37250 r dccg_mask +ffffffff82c374b0 r abm_shift +ffffffff82c374c4 r abm_mask +ffffffff82c37510 r res_create_funcs +ffffffff82c37540 r res_create_maximus_funcs +ffffffff82c37570 r plane_cap +ffffffff82c3759c r le_shift +ffffffff82c3768c r le_mask +ffffffff82c37a44 r link_enc_feature +ffffffff82c37a58 r debug_defaults_drv +ffffffff82c37bd0 r cs_shift +ffffffff82c37bdc r cs_mask +ffffffff82c37c04 r hubbub_shift +ffffffff82c37c8c r hubbub_mask +ffffffff82c37ea8 r vmid_shifts +ffffffff82c37eb0 r vmid_masks +ffffffff82c37ed0 r hubp_shift +ffffffff82c37fcc r hubp_mask +ffffffff82c383bc r tf_shift +ffffffff82c3868c r tf_mask +ffffffff82c391cc r opp_shift +ffffffff82c39204 r opp_mask +ffffffff82c392d8 r optc_shift +ffffffff82c39398 r optc_mask +ffffffff82c39698 r mpc_shift +ffffffff82c39774 r mpc_mask +ffffffff82c39ae0 r dsc_shift +ffffffff82c39b98 r dsc_mask +ffffffff82c39e70 r dwbc30_shift +ffffffff82c39fa4 r dwbc30_mask +ffffffff82c3a46c r mcif_wb30_shift +ffffffff82c3a518 r mcif_wb30_mask +ffffffff82c3a7c4 r aux_mask +ffffffff82c3a824 r aux_shift +ffffffff82c3a83c r i2c_shifts +ffffffff82c3a868 r i2c_masks +ffffffff82c3a90c r audio_shift +ffffffff82c3a924 r audio_mask +ffffffff82c3a960 r se_shift +ffffffff82c3aa3c r se_mask +ffffffff82c3ada8 r vpg_shift +ffffffff82c3add0 r vpg_mask +ffffffff82c3ae64 r afmt_shift +ffffffff82c3ae78 r afmt_mask +ffffffff82c3aebc r hpo_dp_se_shift +ffffffff82c3aee4 r hpo_dp_se_mask +ffffffff82c3af84 r apg_shift +ffffffff82c3af8c r apg_mask +ffffffff82c3afa4 r hpo_dp_le_shift +ffffffff82c3afc0 r hpo_dp_le_mask +ffffffff82c3b024 r hwseq_shift +ffffffff82c3b0a4 r hwseq_mask +ffffffff82c3d000 R dcn10_soc_defaults +ffffffff82c3d08c R dcn10_ip_defaults +ffffffff82c48000 R dml20_funcs +ffffffff82c48030 R dml20v2_funcs +ffffffff82c48060 R dml21_funcs +ffffffff82c48090 R dml30_funcs +ffffffff82c480c0 R dml31_funcs +ffffffff82c480f0 R dml314_funcs +ffffffff82c48120 R dml32_funcs +ffffffff82c4b000 R qp_table_422_10bpc_min +ffffffff82c4b740 R qp_table_444_8bpc_max +ffffffff82c4c080 R qp_table_420_12bpc_max +ffffffff82c4c7c0 R qp_table_444_10bpc_min +ffffffff82c4d400 R qp_table_420_8bpc_max +ffffffff82c4d840 R qp_table_444_8bpc_min +ffffffff82c4e180 R qp_table_444_12bpc_min +ffffffff82c4f0c0 R qp_table_420_12bpc_min +ffffffff82c4f800 R qp_table_422_12bpc_min +ffffffff82c50140 R qp_table_422_12bpc_max +ffffffff82c50a80 R qp_table_444_12bpc_max +ffffffff82c519c0 R qp_table_420_8bpc_min +ffffffff82c51e00 R qp_table_422_8bpc_min +ffffffff82c52340 R qp_table_422_10bpc_max +ffffffff82c52a80 R qp_table_420_10bpc_max +ffffffff82c53040 R qp_table_420_10bpc_min +ffffffff82c53600 R qp_table_444_10bpc_max +ffffffff82c54240 R qp_table_422_8bpc_max +ffffffff82c56000 r funcs +ffffffff82c56050 r hpd_regs +ffffffff82c561a0 r hpd_shift +ffffffff82c561b0 r hpd_mask +ffffffff82c561c0 r ddc_data_regs +ffffffff82c563a0 r ddc_clk_regs +ffffffff82c56580 r ddc_shift +ffffffff82c565a8 r ddc_mask ffffffff82c57000 r funcs -ffffffff82c57050 r hpd_regs -ffffffff82c571a0 r hpd_shift -ffffffff82c571b0 r hpd_mask -ffffffff82c571c0 r ddc_data_regs -ffffffff82c573a0 r ddc_clk_regs -ffffffff82c57580 r ddc_shift -ffffffff82c575a8 r ddc_mask ffffffff82c58000 r funcs +ffffffff82c58050 r hpd_regs +ffffffff82c581a0 r hpd_shift +ffffffff82c581b0 r hpd_mask +ffffffff82c581c0 r ddc_data_regs +ffffffff82c583a0 r ddc_clk_regs +ffffffff82c58580 r ddc_shift +ffffffff82c585a8 r ddc_mask ffffffff82c59000 r funcs -ffffffff82c59050 r hpd_regs -ffffffff82c591a0 r hpd_shift -ffffffff82c591b0 r hpd_mask -ffffffff82c591c0 r ddc_data_regs -ffffffff82c593a0 r ddc_clk_regs -ffffffff82c59580 r ddc_shift -ffffffff82c595a8 r ddc_mask ffffffff82c5a000 r funcs +ffffffff82c5a050 r hpd_regs +ffffffff82c5a1a0 r hpd_shift +ffffffff82c5a1b0 r hpd_mask +ffffffff82c5a1c0 r ddc_data_regs +ffffffff82c5a3a0 r ddc_clk_regs +ffffffff82c5a580 r ddc_shift +ffffffff82c5a5a8 r ddc_mask ffffffff82c5b000 r funcs -ffffffff82c5b050 r hpd_regs -ffffffff82c5b1a0 r hpd_shift -ffffffff82c5b1b0 r hpd_mask -ffffffff82c5b1c0 r ddc_data_regs -ffffffff82c5b3a0 r ddc_clk_regs -ffffffff82c5b580 r ddc_shift -ffffffff82c5b5a8 r ddc_mask ffffffff82c5c000 r funcs +ffffffff82c5c050 r hpd_regs +ffffffff82c5c1a0 r hpd_shift +ffffffff82c5c1b0 r hpd_mask +ffffffff82c5c1c0 r ddc_data_regs +ffffffff82c5c3a0 r ddc_clk_regs +ffffffff82c5c580 r ddc_shift +ffffffff82c5c5a8 r ddc_mask +ffffffff82c5c5d0 r generic_regs +ffffffff82c5c640 r generic_shift +ffffffff82c5c650 r generic_mask ffffffff82c5d000 r funcs -ffffffff82c5d050 r hpd_regs -ffffffff82c5d1a0 r hpd_shift -ffffffff82c5d1b0 r hpd_mask -ffffffff82c5d1c0 r ddc_data_regs -ffffffff82c5d3a0 r ddc_clk_regs -ffffffff82c5d580 r ddc_shift -ffffffff82c5d5a8 r ddc_mask -ffffffff82c5d5d0 r generic_regs -ffffffff82c5d640 r generic_shift -ffffffff82c5d650 r generic_mask ffffffff82c5e000 r funcs +ffffffff82c5e050 r hpd_regs +ffffffff82c5e1a0 r hpd_shift +ffffffff82c5e1b0 r hpd_mask +ffffffff82c5e1c0 r ddc_data_regs_dcn +ffffffff82c5e370 r ddc_clk_regs_dcn +ffffffff82c5e520 r ddc_shift +ffffffff82c5e640 r ddc_mask +ffffffff82c5e760 r generic_regs +ffffffff82c5e7d0 r generic_shift +ffffffff82c5e7e0 r generic_mask ffffffff82c5f000 r funcs -ffffffff82c5f050 r hpd_regs -ffffffff82c5f1a0 r hpd_shift -ffffffff82c5f1b0 r hpd_mask -ffffffff82c5f1c0 r ddc_data_regs_dcn -ffffffff82c5f370 r ddc_clk_regs_dcn -ffffffff82c5f520 r ddc_shift -ffffffff82c5f640 r ddc_mask -ffffffff82c5f760 r generic_regs -ffffffff82c5f7d0 r generic_shift -ffffffff82c5f7e0 r generic_mask ffffffff82c60000 r funcs +ffffffff82c60050 r hpd_regs +ffffffff82c60168 r hpd_shift +ffffffff82c60178 r hpd_mask +ffffffff82c60190 r ddc_data_regs_dcn +ffffffff82c602c0 r ddc_clk_regs_dcn +ffffffff82c603f0 r ddc_shift +ffffffff82c604e0 r ddc_mask +ffffffff82c605d0 r generic_regs +ffffffff82c60604 r generic_shift +ffffffff82c6060c r generic_mask ffffffff82c61000 r funcs -ffffffff82c61050 r hpd_regs -ffffffff82c61168 r hpd_shift -ffffffff82c61178 r hpd_mask -ffffffff82c61190 r ddc_data_regs_dcn -ffffffff82c612c0 r ddc_clk_regs_dcn -ffffffff82c613f0 r ddc_shift -ffffffff82c614e0 r ddc_mask -ffffffff82c615d0 r generic_regs -ffffffff82c61604 r generic_shift -ffffffff82c6160c r generic_mask ffffffff82c62000 r funcs +ffffffff82c62050 r hpd_regs +ffffffff82c621a0 r hpd_shift +ffffffff82c621b0 r hpd_mask +ffffffff82c621c0 r ddc_data_regs_dcn +ffffffff82c62370 r ddc_clk_regs_dcn +ffffffff82c62520 r ddc_shift +ffffffff82c62640 r ddc_mask +ffffffff82c62760 r generic_regs +ffffffff82c627d0 r generic_shift +ffffffff82c627e0 r generic_mask ffffffff82c63000 r funcs -ffffffff82c63050 r hpd_regs -ffffffff82c631a0 r hpd_shift -ffffffff82c631b0 r hpd_mask -ffffffff82c631c0 r ddc_data_regs_dcn -ffffffff82c63370 r ddc_clk_regs_dcn -ffffffff82c63520 r ddc_shift -ffffffff82c63640 r ddc_mask -ffffffff82c63760 r generic_regs -ffffffff82c637d0 r generic_shift -ffffffff82c637e0 r generic_mask ffffffff82c64000 r funcs +ffffffff82c64050 r hpd_regs +ffffffff82c64168 r hpd_shift +ffffffff82c64178 r hpd_mask +ffffffff82c64190 r ddc_data_regs_dcn +ffffffff82c64300 r ddc_clk_regs_dcn +ffffffff82c64470 r ddc_shift +ffffffff82c64560 r ddc_mask +ffffffff82c64650 r generic_regs +ffffffff82c646c0 r generic_shift +ffffffff82c646d0 r generic_mask ffffffff82c65000 r funcs -ffffffff82c65050 r hpd_regs -ffffffff82c65168 r hpd_shift -ffffffff82c65178 r hpd_mask -ffffffff82c65190 r ddc_data_regs_dcn -ffffffff82c65300 r ddc_clk_regs_dcn -ffffffff82c65470 r ddc_shift -ffffffff82c65560 r ddc_mask -ffffffff82c65650 r generic_regs -ffffffff82c656c0 r generic_shift -ffffffff82c656d0 r generic_mask ffffffff82c66000 r funcs +ffffffff82c66050 r hpd_regs +ffffffff82c66168 r hpd_shift +ffffffff82c66178 r hpd_mask +ffffffff82c66190 r ddc_data_regs_dcn +ffffffff82c66340 r ddc_clk_regs_dcn +ffffffff82c664f0 r ddc_shift +ffffffff82c66610 r ddc_mask +ffffffff82c66730 r generic_regs +ffffffff82c667a0 r generic_shift +ffffffff82c667b0 r generic_mask ffffffff82c67000 r funcs -ffffffff82c67050 r hpd_regs -ffffffff82c67168 r hpd_shift -ffffffff82c67178 r hpd_mask -ffffffff82c67190 r ddc_data_regs_dcn -ffffffff82c67340 r ddc_clk_regs_dcn -ffffffff82c674f0 r ddc_shift -ffffffff82c67610 r ddc_mask -ffffffff82c67730 r generic_regs -ffffffff82c677a0 r generic_shift -ffffffff82c677b0 r generic_mask ffffffff82c68000 r funcs ffffffff82c69000 r funcs ffffffff82c6a000 r funcs -ffffffff82c6b000 r funcs -ffffffff82c6c000 r hdmi_14_protection -ffffffff82c6c010 r dp_11_protection -ffffffff82c6c020 r hdcp_i2c_offsets -ffffffff82c6c050 r hdcp_dpcd_addrs -ffffffff82c6d000 r irq_service_funcs_dce110 -ffffffff82c6d010 r irq_source_info_dce110 -ffffffff82c6e2a0 r dummy_irq_info_funcs -ffffffff82c6e2b0 r hpd_irq_info_funcs -ffffffff82c6e2c0 r hpd_rx_irq_info_funcs -ffffffff82c6e2d0 r pflip_irq_info_funcs -ffffffff82c6e2e0 r vupdate_irq_info_funcs -ffffffff82c6e2f0 r vblank_irq_info_funcs -ffffffff82c6f000 r irq_service_funcs_dce120 -ffffffff82c6f008 r dummy_irq_info_funcs -ffffffff82c6f018 r hpd_irq_info_funcs -ffffffff82c6f028 r hpd_rx_irq_info_funcs -ffffffff82c6f038 r pflip_irq_info_funcs -ffffffff82c6f048 r vupdate_irq_info_funcs -ffffffff82c6f058 r vblank_irq_info_funcs -ffffffff82c6f070 r irq_source_info_dce120 -ffffffff82c71000 r irq_service_funcs_dce80 -ffffffff82c71008 r dummy_irq_info_funcs -ffffffff82c71018 r hpd_irq_info_funcs -ffffffff82c71028 r hpd_rx_irq_info_funcs -ffffffff82c71038 r pflip_irq_info_funcs -ffffffff82c71048 r vupdate_irq_info_funcs -ffffffff82c71058 r vblank_irq_info_funcs -ffffffff82c71070 r irq_source_info_dce80 -ffffffff82c73000 r irq_service_funcs_dcn10 -ffffffff82c73008 r dummy_irq_info_funcs -ffffffff82c73018 r hpd_irq_info_funcs -ffffffff82c73028 r hpd_rx_irq_info_funcs -ffffffff82c73038 r pflip_irq_info_funcs -ffffffff82c73048 r vupdate_no_lock_irq_info_funcs -ffffffff82c73058 r vblank_irq_info_funcs -ffffffff82c73068 r vline0_irq_info_funcs -ffffffff82c73080 r irq_source_info_dcn10 -ffffffff82c75000 r irq_service_funcs_dcn20 -ffffffff82c75008 r dummy_irq_info_funcs -ffffffff82c75018 r hpd_irq_info_funcs -ffffffff82c75028 r hpd_rx_irq_info_funcs -ffffffff82c75038 r pflip_irq_info_funcs -ffffffff82c75048 r vupdate_no_lock_irq_info_funcs -ffffffff82c75058 r vblank_irq_info_funcs -ffffffff82c75068 r vline0_irq_info_funcs -ffffffff82c75080 r irq_source_info_dcn20 -ffffffff82c77000 r irq_service_funcs_dcn201 -ffffffff82c77008 r dummy_irq_info_funcs -ffffffff82c77018 r hpd_irq_info_funcs -ffffffff82c77028 r hpd_rx_irq_info_funcs -ffffffff82c77038 r pflip_irq_info_funcs -ffffffff82c77048 r vupdate_no_lock_irq_info_funcs -ffffffff82c77058 r vblank_irq_info_funcs -ffffffff82c77068 r vline0_irq_info_funcs -ffffffff82c77080 r irq_source_info_dcn201 -ffffffff82c79000 r irq_source_info_dcn21 -ffffffff82c7a290 r irq_service_funcs_dcn21 -ffffffff82c7a298 r dummy_irq_info_funcs -ffffffff82c7a2a8 r hpd_irq_info_funcs -ffffffff82c7a2b8 r hpd_rx_irq_info_funcs -ffffffff82c7a2c8 r pflip_irq_info_funcs -ffffffff82c7a2d8 r vupdate_no_lock_irq_info_funcs -ffffffff82c7a2e8 r vblank_irq_info_funcs -ffffffff82c7a2f8 r vline0_irq_info_funcs -ffffffff82c7a308 r dmub_outbox_irq_info_funcs -ffffffff82c7b000 r irq_source_info_dcn30 -ffffffff82c7c290 r irq_service_funcs_dcn30 -ffffffff82c7c298 r dummy_irq_info_funcs -ffffffff82c7c2a8 r hpd_irq_info_funcs -ffffffff82c7c2b8 r hpd_rx_irq_info_funcs -ffffffff82c7c2c8 r pflip_irq_info_funcs -ffffffff82c7c2d8 r vupdate_no_lock_irq_info_funcs -ffffffff82c7c2e8 r vblank_irq_info_funcs -ffffffff82c7c2f8 r vline0_irq_info_funcs -ffffffff82c7c308 r dmub_trace_irq_info_funcs -ffffffff82c7d000 r irq_source_info_dcn302 -ffffffff82c7e290 r irq_service_funcs_dcn302 -ffffffff82c7e298 r dummy_irq_info_funcs -ffffffff82c7e2a8 r hpd_irq_info_funcs -ffffffff82c7e2b8 r hpd_rx_irq_info_funcs -ffffffff82c7e2c8 r pflip_irq_info_funcs -ffffffff82c7e2d8 r vupdate_no_lock_irq_info_funcs -ffffffff82c7e2e8 r vblank_irq_info_funcs -ffffffff82c7e2f8 r vline0_irq_info_funcs -ffffffff82c7e308 r dmub_trace_irq_info_funcs -ffffffff82c7f000 r irq_service_funcs_dcn303 -ffffffff82c7f008 r dummy_irq_info_funcs -ffffffff82c7f018 r hpd_irq_info_funcs -ffffffff82c7f028 r hpd_rx_irq_info_funcs -ffffffff82c7f038 r pflip_irq_info_funcs -ffffffff82c7f048 r vupdate_no_lock_irq_info_funcs -ffffffff82c7f058 r vblank_irq_info_funcs -ffffffff82c7f068 r vline0_irq_info_funcs -ffffffff82c7f080 r irq_source_info_dcn303 -ffffffff82c81000 r irq_source_info_dcn31 -ffffffff82c82290 r irq_service_funcs_dcn31 -ffffffff82c82298 r dummy_irq_info_funcs -ffffffff82c822a8 r hpd_irq_info_funcs -ffffffff82c822b8 r hpd_rx_irq_info_funcs -ffffffff82c822c8 r pflip_irq_info_funcs -ffffffff82c822d8 r vupdate_no_lock_irq_info_funcs -ffffffff82c822e8 r vblank_irq_info_funcs -ffffffff82c822f8 r vline0_irq_info_funcs -ffffffff82c82308 r outbox_irq_info_funcs -ffffffff82c83000 r irq_source_info_dcn314 -ffffffff82c84290 r irq_service_funcs_dcn314 -ffffffff82c84298 r dummy_irq_info_funcs -ffffffff82c842a8 r hpd_irq_info_funcs -ffffffff82c842b8 r hpd_rx_irq_info_funcs -ffffffff82c842c8 r pflip_irq_info_funcs -ffffffff82c842d8 r vupdate_no_lock_irq_info_funcs -ffffffff82c842e8 r vblank_irq_info_funcs -ffffffff82c842f8 r vline0_irq_info_funcs -ffffffff82c84308 r outbox_irq_info_funcs -ffffffff82c85000 r irq_source_info_dcn315 -ffffffff82c86290 r irq_service_funcs_dcn315 -ffffffff82c86298 r dummy_irq_info_funcs -ffffffff82c862a8 r hpd_irq_info_funcs -ffffffff82c862b8 r hpd_rx_irq_info_funcs -ffffffff82c862c8 r pflip_irq_info_funcs -ffffffff82c862d8 r vupdate_no_lock_irq_info_funcs -ffffffff82c862e8 r vblank_irq_info_funcs -ffffffff82c862f8 r vline0_irq_info_funcs -ffffffff82c86308 r outbox_irq_info_funcs -ffffffff82c87000 r irq_source_info_dcn32 -ffffffff82c88290 r irq_service_funcs_dcn32 -ffffffff82c88298 r dummy_irq_info_funcs -ffffffff82c882a8 r hpd_irq_info_funcs -ffffffff82c882b8 r hpd_rx_irq_info_funcs -ffffffff82c882c8 r pflip_irq_info_funcs -ffffffff82c882d8 r vupdate_no_lock_irq_info_funcs -ffffffff82c882e8 r vblank_irq_info_funcs -ffffffff82c882f8 r vline0_irq_info_funcs -ffffffff82c88308 r outbox_irq_info_funcs -ffffffff82c89000 r dio_link_hwss -ffffffff82c8a000 r dpia_link_hwss -ffffffff82c8b000 r hpo_dp_link_hwss -ffffffff82c8c000 r virtual_lnk_enc_funcs -ffffffff82c8d000 r virtual_link_hwss -ffffffff82c8e000 r virtual_str_enc_funcs -ffffffff82c8f000 R dmub_srv_dcn20_regs -ffffffff82c90000 R dmub_srv_dcn21_regs -ffffffff82c91000 R dmub_srv_dcn30_regs -ffffffff82c92000 R dmub_srv_dcn301_regs -ffffffff82c93000 R dmub_srv_dcn302_regs -ffffffff82c94000 R dmub_srv_dcn303_regs -ffffffff82c95000 R dmub_srv_dcn31_regs -ffffffff82c96000 R dmub_srv_dcn314_regs -ffffffff82c97000 R dmub_srv_dcn315_regs -ffffffff82c98000 R dmub_srv_dcn316_regs -ffffffff82c99000 R dmub_srv_dcn32_regs -ffffffff82c9a000 r numerator01 -ffffffff82c9a020 r numerator02 -ffffffff82c9a040 r numerator04 -ffffffff82c9a060 r numerator05 -ffffffff82c9c000 r abm_settings -ffffffff82c9c010 r abm_settings_config0 -ffffffff82c9c050 r abm_settings_config1 -ffffffff82c9c088 r min_reduction_table_v_2_2 -ffffffff82c9c095 r max_reduction_table_v_2_2 -ffffffff82c9c0a2 r min_reduction_table -ffffffff82c9c0af r max_reduction_table -ffffffff82c9d000 R amdgpu_pp_profile_name -ffffffff82c9e000 r pp_lib_thermal_controller_names -ffffffff82c9f000 r pp_ip_funcs -ffffffff82c9f0a0 R pp_smu_ip_block -ffffffff82c9f0b8 r pp_dpm_funcs +ffffffff82c6b000 r hdmi_14_protection +ffffffff82c6b010 r dp_11_protection +ffffffff82c6b020 r hdcp_i2c_offsets +ffffffff82c6b050 r hdcp_dpcd_addrs +ffffffff82c6c000 r irq_service_funcs_dce110 +ffffffff82c6c010 r irq_source_info_dce110 +ffffffff82c6d2a0 r dummy_irq_info_funcs +ffffffff82c6d2b0 r hpd_irq_info_funcs +ffffffff82c6d2c0 r hpd_rx_irq_info_funcs +ffffffff82c6d2d0 r pflip_irq_info_funcs +ffffffff82c6d2e0 r vupdate_irq_info_funcs +ffffffff82c6d2f0 r vblank_irq_info_funcs +ffffffff82c6e000 r irq_service_funcs_dce120 +ffffffff82c6e008 r dummy_irq_info_funcs +ffffffff82c6e018 r hpd_irq_info_funcs +ffffffff82c6e028 r hpd_rx_irq_info_funcs +ffffffff82c6e038 r pflip_irq_info_funcs +ffffffff82c6e048 r vupdate_irq_info_funcs +ffffffff82c6e058 r vblank_irq_info_funcs +ffffffff82c6e070 r irq_source_info_dce120 +ffffffff82c70000 r irq_service_funcs_dce80 +ffffffff82c70008 r dummy_irq_info_funcs +ffffffff82c70018 r hpd_irq_info_funcs +ffffffff82c70028 r hpd_rx_irq_info_funcs +ffffffff82c70038 r pflip_irq_info_funcs +ffffffff82c70048 r vupdate_irq_info_funcs +ffffffff82c70058 r vblank_irq_info_funcs +ffffffff82c70070 r irq_source_info_dce80 +ffffffff82c72000 r irq_service_funcs_dcn10 +ffffffff82c72008 r dummy_irq_info_funcs +ffffffff82c72018 r hpd_irq_info_funcs +ffffffff82c72028 r hpd_rx_irq_info_funcs +ffffffff82c72038 r pflip_irq_info_funcs +ffffffff82c72048 r vupdate_no_lock_irq_info_funcs +ffffffff82c72058 r vblank_irq_info_funcs +ffffffff82c72068 r vline0_irq_info_funcs +ffffffff82c72080 r irq_source_info_dcn10 +ffffffff82c74000 r irq_service_funcs_dcn20 +ffffffff82c74008 r dummy_irq_info_funcs +ffffffff82c74018 r hpd_irq_info_funcs +ffffffff82c74028 r hpd_rx_irq_info_funcs +ffffffff82c74038 r pflip_irq_info_funcs +ffffffff82c74048 r vupdate_no_lock_irq_info_funcs +ffffffff82c74058 r vblank_irq_info_funcs +ffffffff82c74068 r vline0_irq_info_funcs +ffffffff82c74080 r irq_source_info_dcn20 +ffffffff82c76000 r irq_service_funcs_dcn201 +ffffffff82c76008 r dummy_irq_info_funcs +ffffffff82c76018 r hpd_irq_info_funcs +ffffffff82c76028 r hpd_rx_irq_info_funcs +ffffffff82c76038 r pflip_irq_info_funcs +ffffffff82c76048 r vupdate_no_lock_irq_info_funcs +ffffffff82c76058 r vblank_irq_info_funcs +ffffffff82c76068 r vline0_irq_info_funcs +ffffffff82c76080 r irq_source_info_dcn201 +ffffffff82c78000 r irq_source_info_dcn21 +ffffffff82c79290 r irq_service_funcs_dcn21 +ffffffff82c79298 r dummy_irq_info_funcs +ffffffff82c792a8 r hpd_irq_info_funcs +ffffffff82c792b8 r hpd_rx_irq_info_funcs +ffffffff82c792c8 r pflip_irq_info_funcs +ffffffff82c792d8 r vupdate_no_lock_irq_info_funcs +ffffffff82c792e8 r vblank_irq_info_funcs +ffffffff82c792f8 r vline0_irq_info_funcs +ffffffff82c79308 r dmub_outbox_irq_info_funcs +ffffffff82c7a000 r irq_source_info_dcn30 +ffffffff82c7b290 r irq_service_funcs_dcn30 +ffffffff82c7b298 r dummy_irq_info_funcs +ffffffff82c7b2a8 r hpd_irq_info_funcs +ffffffff82c7b2b8 r hpd_rx_irq_info_funcs +ffffffff82c7b2c8 r pflip_irq_info_funcs +ffffffff82c7b2d8 r vupdate_no_lock_irq_info_funcs +ffffffff82c7b2e8 r vblank_irq_info_funcs +ffffffff82c7b2f8 r vline0_irq_info_funcs +ffffffff82c7b308 r dmub_trace_irq_info_funcs +ffffffff82c7c000 r irq_source_info_dcn302 +ffffffff82c7d290 r irq_service_funcs_dcn302 +ffffffff82c7d298 r dummy_irq_info_funcs +ffffffff82c7d2a8 r hpd_irq_info_funcs +ffffffff82c7d2b8 r hpd_rx_irq_info_funcs +ffffffff82c7d2c8 r pflip_irq_info_funcs +ffffffff82c7d2d8 r vupdate_no_lock_irq_info_funcs +ffffffff82c7d2e8 r vblank_irq_info_funcs +ffffffff82c7d2f8 r vline0_irq_info_funcs +ffffffff82c7d308 r dmub_trace_irq_info_funcs +ffffffff82c7e000 r irq_service_funcs_dcn303 +ffffffff82c7e008 r dummy_irq_info_funcs +ffffffff82c7e018 r hpd_irq_info_funcs +ffffffff82c7e028 r hpd_rx_irq_info_funcs +ffffffff82c7e038 r pflip_irq_info_funcs +ffffffff82c7e048 r vupdate_no_lock_irq_info_funcs +ffffffff82c7e058 r vblank_irq_info_funcs +ffffffff82c7e068 r vline0_irq_info_funcs +ffffffff82c7e080 r irq_source_info_dcn303 +ffffffff82c80000 r irq_source_info_dcn31 +ffffffff82c81290 r irq_service_funcs_dcn31 +ffffffff82c81298 r dummy_irq_info_funcs +ffffffff82c812a8 r hpd_irq_info_funcs +ffffffff82c812b8 r hpd_rx_irq_info_funcs +ffffffff82c812c8 r pflip_irq_info_funcs +ffffffff82c812d8 r vupdate_no_lock_irq_info_funcs +ffffffff82c812e8 r vblank_irq_info_funcs +ffffffff82c812f8 r vline0_irq_info_funcs +ffffffff82c81308 r outbox_irq_info_funcs +ffffffff82c82000 r irq_source_info_dcn314 +ffffffff82c83290 r irq_service_funcs_dcn314 +ffffffff82c83298 r dummy_irq_info_funcs +ffffffff82c832a8 r hpd_irq_info_funcs +ffffffff82c832b8 r hpd_rx_irq_info_funcs +ffffffff82c832c8 r pflip_irq_info_funcs +ffffffff82c832d8 r vupdate_no_lock_irq_info_funcs +ffffffff82c832e8 r vblank_irq_info_funcs +ffffffff82c832f8 r vline0_irq_info_funcs +ffffffff82c83308 r outbox_irq_info_funcs +ffffffff82c84000 r irq_source_info_dcn315 +ffffffff82c85290 r irq_service_funcs_dcn315 +ffffffff82c85298 r dummy_irq_info_funcs +ffffffff82c852a8 r hpd_irq_info_funcs +ffffffff82c852b8 r hpd_rx_irq_info_funcs +ffffffff82c852c8 r pflip_irq_info_funcs +ffffffff82c852d8 r vupdate_no_lock_irq_info_funcs +ffffffff82c852e8 r vblank_irq_info_funcs +ffffffff82c852f8 r vline0_irq_info_funcs +ffffffff82c85308 r outbox_irq_info_funcs +ffffffff82c86000 r irq_source_info_dcn32 +ffffffff82c87290 r irq_service_funcs_dcn32 +ffffffff82c87298 r dummy_irq_info_funcs +ffffffff82c872a8 r hpd_irq_info_funcs +ffffffff82c872b8 r hpd_rx_irq_info_funcs +ffffffff82c872c8 r pflip_irq_info_funcs +ffffffff82c872d8 r vupdate_no_lock_irq_info_funcs +ffffffff82c872e8 r vblank_irq_info_funcs +ffffffff82c872f8 r vline0_irq_info_funcs +ffffffff82c87308 r outbox_irq_info_funcs +ffffffff82c88000 r dio_link_hwss +ffffffff82c89000 r dpia_link_hwss +ffffffff82c8a000 r hpo_dp_link_hwss +ffffffff82c8b000 r virtual_lnk_enc_funcs +ffffffff82c8c000 r virtual_link_hwss +ffffffff82c8d000 r virtual_str_enc_funcs +ffffffff82c8e000 R dmub_srv_dcn20_regs +ffffffff82c8f000 R dmub_srv_dcn21_regs +ffffffff82c90000 R dmub_srv_dcn30_regs +ffffffff82c91000 R dmub_srv_dcn301_regs +ffffffff82c92000 R dmub_srv_dcn302_regs +ffffffff82c93000 R dmub_srv_dcn303_regs +ffffffff82c94000 R dmub_srv_dcn31_regs +ffffffff82c95000 R dmub_srv_dcn314_regs +ffffffff82c96000 R dmub_srv_dcn315_regs +ffffffff82c97000 R dmub_srv_dcn316_regs +ffffffff82c98000 R dmub_srv_dcn32_regs +ffffffff82c99000 r numerator01 +ffffffff82c99020 r numerator02 +ffffffff82c99040 r numerator04 +ffffffff82c99060 r numerator05 +ffffffff82c9b000 r abm_settings +ffffffff82c9b010 r abm_settings_config0 +ffffffff82c9b050 r abm_settings_config1 +ffffffff82c9b088 r min_reduction_table_v_2_2 +ffffffff82c9b095 r max_reduction_table_v_2_2 +ffffffff82c9b0a2 r min_reduction_table +ffffffff82c9b0af r max_reduction_table +ffffffff82c9c000 R amdgpu_pp_profile_name +ffffffff82c9d000 r pp_lib_thermal_controller_names +ffffffff82c9e000 r pp_ip_funcs +ffffffff82c9e0a0 R pp_smu_ip_block +ffffffff82c9e0b8 r pp_dpm_funcs +ffffffff82c9f000 r gpio_tbl +ffffffff82c9f0f0 r enable_fb_req_rej_tbl +ffffffff82c9f140 r use_bclk_tbl +ffffffff82c9f310 r turn_off_plls_tbl +ffffffff82c9f640 r enter_baco_tbl +ffffffff82c9f730 r exit_baco_tbl +ffffffff82c9f850 r clean_baco_tbl ffffffff82ca0000 r gpio_tbl ffffffff82ca00f0 r enable_fb_req_rej_tbl ffffffff82ca0140 r use_bclk_tbl -ffffffff82ca0310 r turn_off_plls_tbl -ffffffff82ca0640 r enter_baco_tbl -ffffffff82ca0730 r exit_baco_tbl -ffffffff82ca0850 r clean_baco_tbl +ffffffff82ca02e0 r turn_off_plls_tbl +ffffffff82ca0370 r clk_req_b_tbl +ffffffff82ca0490 r enter_baco_tbl +ffffffff82ca05b0 r exit_baco_tbl +ffffffff82ca06d0 r clean_baco_tbl ffffffff82ca1000 r gpio_tbl ffffffff82ca10f0 r enable_fb_req_rej_tbl -ffffffff82ca1140 r use_bclk_tbl -ffffffff82ca12e0 r turn_off_plls_tbl -ffffffff82ca1370 r clk_req_b_tbl -ffffffff82ca1490 r enter_baco_tbl -ffffffff82ca15b0 r exit_baco_tbl -ffffffff82ca16d0 r clean_baco_tbl -ffffffff82ca2000 r gpio_tbl -ffffffff82ca20f0 r enable_fb_req_rej_tbl -ffffffff82ca2140 r use_bclk_tbl_vg -ffffffff82ca2200 r turn_off_plls_tbl_vg -ffffffff82ca2350 r use_bclk_tbl -ffffffff82ca2440 r turn_off_plls_tbl -ffffffff82ca25f0 r clk_req_b_tbl -ffffffff82ca2710 r enter_baco_tbl -ffffffff82ca2830 r exit_baco_tbl -ffffffff82ca2950 r clean_baco_tbl -ffffffff82ca3000 r vega10_fuses_default -ffffffff82cb2000 r pp_r600_encode_lanes -ffffffff82cb3000 R pptable_v1_0_funcs -ffffffff82cb4000 R pptable_funcs -ffffffff82cb4020 r soft_dummy_pp_table -ffffffff82cb5000 r smu10_hwmgr_funcs -ffffffff82cb6000 r smu7_hwmgr_funcs -ffffffff82cb62f8 r smu7_irq_funcs -ffffffff82cb6310 r SMU7ThermalPolicy -ffffffff82cb7000 r GCCACConfig_Polaris10 -ffffffff82cb71b0 r DIDTConfig_Polaris10 -ffffffff82cb7a50 r GCCACConfig_Polaris11 -ffffffff82cb7c00 r DIDTConfig_Polaris11_Kicker -ffffffff82cb84a0 r DIDTConfig_Polaris11 -ffffffff82cb8d40 r DIDTConfig_Polaris12 -ffffffff82cb95e0 r GCCACConfig_VegaM -ffffffff82cb9790 r DIDTConfig_VegaM -ffffffff82cbb000 r smu8_hwmgr_funcs -ffffffff82cbb2f0 r SMU7ThermalPolicy -ffffffff82cbc000 r smu9_irq_funcs -ffffffff82cbd000 r gpio_tbl_iceland -ffffffff82cbd060 r gpio_tbl -ffffffff82cbd150 r enable_fb_req_rej_tbl -ffffffff82cbd1a0 r use_bclk_tbl -ffffffff82cbd370 r turn_off_plls_tbl -ffffffff82cbd610 r enter_baco_tbl -ffffffff82cbd730 r exit_baco_tbl_iceland -ffffffff82cbd870 r clean_baco_tbl_iceland -ffffffff82cbd890 r exit_baco_tbl -ffffffff82cbd9b0 r clean_baco_tbl -ffffffff82cbe000 r pre_baco_tbl -ffffffff82cbe090 r enter_baco_tbl -ffffffff82cbe2b0 r exit_baco_tbl -ffffffff82cbe520 r clean_baco_tbl -ffffffff82cbf000 r vega10_hwmgr_funcs -ffffffff82cbf2f0 r channel_number -ffffffff82cbf320 r SMU7ThermalWithDelayPolicy -ffffffff82cc0000 r SEDiDtStallCtrlConfig_vega10 -ffffffff82cc0110 r SEDiDtStallPatternConfig_vega10 -ffffffff82cc02e0 r SEDiDtWeightConfig_Vega10 -ffffffff82cc03b0 r SEDiDtCtrl1Config_Vega10 -ffffffff82cc0440 r SEDiDtCtrl2Config_Vega10 -ffffffff82cc0510 r SEDiDtCtrl3Config_vega10 -ffffffff82cc0820 r SEDiDtTuningCtrlConfig_Vega10 -ffffffff82cc08b0 r SELCacConfig_Vega10 -ffffffff82cc0a40 r SEDiDtCtrl0Config_Vega10 -ffffffff82cc0d10 r AvfsPSMInitConfig_vega10 -ffffffff82cc0d90 r SEEDCStallPatternConfig_Vega10 -ffffffff82cc0ea0 r SEEDCStallDelayConfig_Vega10 -ffffffff82cc0f80 r SEEDCCtrlConfig_Vega10 -ffffffff82cc1040 r PSMSEEDCStallPatternConfig_Vega10 -ffffffff82cc10c0 r PSMSEEDCStallDelayConfig_Vega10 -ffffffff82cc11d0 r PSMSEEDCCtrlResetConfig_Vega10 -ffffffff82cc1290 r PSMSEEDCCtrlConfig_Vega10 -ffffffff82cc1350 r SEEDCForceStallPatternConfig_Vega10 -ffffffff82cc13e0 r SEEDCCtrlForceStallConfig_Vega10 -ffffffff82cc2000 R vega10_pptable_funcs -ffffffff82cc3000 r pre_baco_tbl -ffffffff82cc3090 r enter_baco_tbl -ffffffff82cc32b0 r exit_baco_tbl -ffffffff82cc3520 r clean_baco_tbl -ffffffff82cc4000 r vega12_hwmgr_funcs -ffffffff82cc42f0 r SMU7ThermalWithDelayPolicy -ffffffff82cc4340 r link_width -ffffffff82cc5000 R vega12_pptable_funcs -ffffffff82cc6000 r clean_baco_tbl -ffffffff82cc7000 r vega20_hwmgr_funcs -ffffffff82cc72f0 r SMU7ThermalWithDelayPolicy -ffffffff82cc7340 r link_width -ffffffff82cc8000 R vega20_pptable_funcs -ffffffff82cc9000 R ci_smu_funcs -ffffffff82cc90e0 r defaults_hawaii_pro -ffffffff82cc912c r defaults_hawaii_xt -ffffffff82cc9178 r defaults_saturn_xt -ffffffff82cc91c4 r defaults_bonaire_xt -ffffffff82cc9210 r ci_program_jump_on_start.data -ffffffff82cca000 R fiji_smu_funcs -ffffffff82cca0e0 r avfs_graphics_level -ffffffff82cca240 r fiji_power_tune_data_set_array -ffffffff82cca246 r fiji_clock_stretch_amount_conversion -ffffffff82cca260 r fiji_clock_stretcher_ddt_table -ffffffff82ccb000 R iceland_smu_funcs -ffffffff82ccb0e0 r defaults_icelandxt -ffffffff82ccb12c r defaults_icelandpro -ffffffff82ccb178 r defaults_iceland -ffffffff82ccc000 R polaris10_smu_funcs -ffffffff82ccc0e0 r avfs_graphics_level_polaris10 -ffffffff82ccc2a0 r avfs_memory_level_polaris10 -ffffffff82ccc2c0 r polaris10_power_tune_data_set_array -ffffffff82ccc310 r Range_Table -ffffffff82ccd000 R smu10_smu_funcs -ffffffff82cce000 r smu7_program_jump_on_start.data -ffffffff82cce010 r pwr_virus_table_pre -ffffffff82cce680 r pwr_virus_table_post -ffffffff82ccef80 r pwr_virus_section1 -ffffffff82ccf610 r pwr_virus_section2 -ffffffff82ccf660 r pwr_virus_section3 -ffffffff82cd6ab0 r pwr_virus_section4 -ffffffff82cd6e80 r pwr_virus_section5 -ffffffff82cd7490 r pwr_virus_section6 -ffffffff82cd9000 R smu8_smu_funcs -ffffffff82cda000 R tonga_smu_funcs -ffffffff82cda0e0 r tonga_power_tune_data_set_array -ffffffff82cda12c r tonga_clock_stretch_amount_conversion -ffffffff82cda140 r tonga_clock_stretcher_ddt_table -ffffffff82cdb000 R vega10_smu_funcs -ffffffff82cdc000 R vega12_smu_funcs -ffffffff82cdd000 R vega20_smu_funcs -ffffffff82cde000 R vegam_smu_funcs -ffffffff82cde0e0 r vegam_power_tune_data_set_array -ffffffff82cde130 r Range_Table -ffffffff82cdf000 R smu_ip_funcs -ffffffff82cdf0a0 R smu_v11_0_ip_block -ffffffff82cdf0b8 R smu_v12_0_ip_block -ffffffff82cdf0d0 R smu_v13_0_ip_block -ffffffff82cdf0e8 r swsmu_pm_funcs -ffffffff82ce0000 r arcturus_table_map -ffffffff82ce0080 r arcturus_pwr_src_map -ffffffff82ce0090 r arcturus_workload_map -ffffffff82ce00d0 r arcturus_ppt_funcs -ffffffff82ce04a0 r smu11_thermal_policy -ffffffff82ce04f8 r arcturus_i2c_algo -ffffffff82ce0508 r arcturus_i2c_control_quirks -ffffffff82ce0520 r arcturus_throttler_map -ffffffff82ce0540 r arcturus_message_map -ffffffff82ce0f90 r arcturus_clk_map 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atw_bbp_io_disable_delay -ffffffff83115008 D atw_writewep_delay -ffffffff8311500c D atw_beacon_len_adjust -ffffffff83115010 D atw_dwelltime -ffffffff83115018 D atw_cd -ffffffff83116000 D rtw_dwelltime -ffffffff83116004 D rtw_macbangbits_timeout -ffffffff83116008 D rtw_cd -ffffffff83117000 D ral_cd -ffffffff83118000 D rt3090_freqs -ffffffff83119000 D acx_beacon_intvl -ffffffff83119008 D acx_cd -ffffffff8311a000 D pgt_cd -ffffffff8311b000 D sf_cd -ffffffff8311c000 D malo_cd -ffffffff8311d000 D bwi_cd -ffffffff8311d020 D bwi_constraint -ffffffff8311d030 D bwi_pa_mode -ffffffff8311e000 D iosf_cd -ffffffff8311e020 d iosf_lock -ffffffff8311e030 d iosf_mbi_mtx -ffffffff8311f000 D uhci_cd -ffffffff83120000 D ohci_cd -ffffffff83121000 D ehci_cd -ffffffff83122000 D xhci_cd -ffffffff83123000 D ccp_cd -ffffffff83124000 D sdhc_functions -ffffffff83124068 D sdhc_cd -ffffffff83125000 D rtsx_functions -ffffffff83125068 D rtsx_cd -ffffffff83126000 D radio_cd -ffffffff83127000 D kcs_if -ffffffff83127040 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pflow_cloner -ffffffff83135000 d hotplug_mtx -ffffffff83136000 D pppoe_cloner -ffffffff83136030 D pppoediscinq -ffffffff83136060 D pppoeinq -ffffffff83137000 D dt_lock -ffffffff83138000 D dt_prov_profile -ffffffff83138030 D dt_prov_interval -ffffffff83139000 D dtps_nsysent -ffffffff83139008 D dt_prov_syscall -ffffffff8313a000 D dt_prov_static -ffffffff8313a030 D dt_static_sched_dequeue -ffffffff8313a0a0 D dt_static_sched_enqueue -ffffffff8313a110 D dt_static_sched_fork -ffffffff8313a180 D dt_static_sched_off__cpu -ffffffff8313a1f0 D dt_static_sched_on__cpu -ffffffff8313a260 D dt_static_sched_remain__cpu -ffffffff8313a2d0 D dt_static_sched_sleep -ffffffff8313a340 D dt_static_sched_steal -ffffffff8313a3b0 D dt_static_sched_unsleep -ffffffff8313a420 D dt_static_sched_wakeup -ffffffff8313a490 D dt_static_raw_syscalls_sys_enter -ffffffff8313a500 D dt_static_raw_syscalls_sys_exit -ffffffff8313a570 D dt_static_uvm_fault -ffffffff8313a5e0 D dt_static_uvm_map_insert -ffffffff8313a650 D dt_static_uvm_map_remove -ffffffff8313a6c0 D dt_static_uvm_malloc -ffffffff8313a730 D dt_static_uvm_free -ffffffff8313a7a0 D dt_static_uvm_pool_get -ffffffff8313a810 D dt_static_uvm_pool_put -ffffffff8313a880 D dt_static_vfs_bufcache_rel -ffffffff8313a8f0 D dt_static_vfs_bufcache_take -ffffffff8313a960 D dt_static_vfs_cleaner -ffffffff8313a9d0 D dt_static_vmm_guest_enter -ffffffff8313aa40 D dt_static_vmm_guest_exit -ffffffff8313aab0 D dt_static_vmm_inout -ffffffff8313ab20 D dt_static_smr_call -ffffffff8313ab90 D dt_static_smr_called -ffffffff8313ac00 D dt_static_smr_barrier_enter -ffffffff8313ac70 D dt_static_smr_barrier_exit -ffffffff8313ace0 D dt_static_smr_wakeup -ffffffff8313ad50 D dt_static_smr_thread -ffffffff8313adc0 D dt_static_refcnt_none -ffffffff8313ae30 D dt_static_refcnt_ethmulti -ffffffff8313aea0 D dt_static_refcnt_ifaddr -ffffffff8313af10 D dt_static_refcnt_ifmaddr -ffffffff8313af80 D dt_static_refcnt_inpcb -ffffffff8313aff0 D dt_static_refcnt_rtentry -ffffffff8313b060 D dt_static_refcnt_syncache -ffffffff8313b0d0 D dt_static_refcnt_tdb -ffffffff8313c000 D db_next_free_breakpoint -ffffffff8313c008 D db_breakpoints_inserted -ffffffff8313d000 D db_ed_style -ffffffff8313e000 D db_examine_format -ffffffff8313e078 D db_print_format -ffffffff8313f000 D db_history_size -ffffffff8313f008 D db_history_curr -ffffffff8313f010 D db_history_last -ffffffff83140000 D db_tab_stop_width -ffffffff83140004 D db_max_line -ffffffff83140008 D db_max_width -ffffffff8314000c D db_radix -ffffffff83141000 D db_lastsym -ffffffff83141008 D db_maxoff -ffffffff83142000 D db_vars -ffffffff83142090 D db_evars -ffffffff83143000 D db_watchpoints_inserted -ffffffff83143008 D db_next_free_watchpoint -ffffffff83144000 D db_log -ffffffff83145000 D audio_cd -ffffffff83145020 D audio_lock -ffffffff83146000 D midi_cd -ffffffff83147000 D rnd_cold -ffffffff83147004 D rnd_slowextract -ffffffff83147008 D rnd_timeout -ffffffff83147050 D rndlock -ffffffff83147060 D rndreinit_timeout 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pool_allocator_multi -ffffffff83166058 D pool_allocator_multi_ni -ffffffff83166070 D pool_gc_tick -ffffffff831660b8 D pool_gc_task -ffffffff83167000 D kprintf_mutex -ffffffff83167010 D db_panic -ffffffff83167014 D splassert_ctl -ffffffff83167018 D v_putc -ffffffff83167020 D printf_flags -ffffffff83168000 D userconf_base -ffffffff83168004 D userconf_maxdev -ffffffff83168008 D userconf_totdev -ffffffff8316800c D userconf_maxlocnames -ffffffff83168010 D userconf_cnt -ffffffff83168014 D userconf_lines -ffffffff83168018 D userconf_histsz -ffffffff83168020 D userconf_cmds -ffffffff83169000 D ftlock -ffffffff8316a000 d ppollcollect.poll_errintvl -ffffffff8316b000 D ttydefchars -ffffffff8316b014 D ttclos -ffffffff8316b01b D ttopen -ffffffff8316b022 D ttybg -ffffffff8316b028 D ttyin -ffffffff8316b02e D ttyout -ffffffff8316b038 D ttylist_lock -ffffffff8316c000 D linesw -ffffffff8316c280 D nlinesw -ffffffff8316d000 D pt_softc_lock -ffffffff8316e000 d mbstat_boot_boot_cpumem -ffffffff8316e080 D mbstat -ffffffff8316e090 D mclsizes -ffffffff8316e0b0 D m_extref_mtx -ffffffff8316e0c0 D m_pool_allocator -ffffffff8316f000 D somaxconn -ffffffff8316f004 D sominconn -ffffffff8316f008 D sosplice_lock -ffffffff83170000 D sb_max -ffffffff83171000 D unp_df_lock -ffffffff83171010 D unp_gc_lock -ffffffff83171020 D unp_rights_mtx -ffffffff83171030 D unp_ino_mtx -ffffffff83171040 D unp_gc_task -ffffffff83171070 D unpst_sendspace -ffffffff83171074 D unpst_recvspace -ffffffff83171078 D unpsq_sendspace -ffffffff8317107c D unpsq_recvspace -ffffffff83171080 D unpdg_sendspace -ffffffff83171084 D unpdg_recvspace -ffffffff83172000 D doingcache -ffffffff83173000 D maxvfsconf -ffffffff83173010 d vfsconflist -ffffffff83174000 D lockf_lock -ffffffff83174010 D maxlocksperuid -ffffffff83175000 D iftovt_tab -ffffffff83175040 D vttoif_tab -ffffffff83175064 D suid_clear -ffffffff83175068 D vnode_mtx -ffffffff83175078 D vfs_stall_lock -ffffffff83175090 D vtypes -ffffffff831750e0 D vtags -ffffffff83176000 D syncer_maxdelay -ffffffff83176004 D syncdelay -ffffffff83177000 D dosdirtemplate -ffffffff83178000 D ntfs_hashlock -ffffffff83179000 D ntfs_toupper_lock -ffffffff8317a000 D art_table_gc_mtx -ffffffff8317a010 D art_table_gc_task -ffffffff8317a040 D art_node_gc_mtx -ffffffff8317a050 D art_node_gc_task -ffffffff8317b000 D bpf_bufsize -ffffffff8317b004 D bpf_maxbufsize -ffffffff8317b008 D bpf_sysctl_lk -ffffffff8317c000 D ifg_head -ffffffff8317c010 D if_cloners_lock -ffffffff8317c020 D if_input_task_locked -ffffffff8317c050 D netlock -ffffffff8317c060 D ifnetlist -ffffffff8317d000 D ifiq_maxlen_drop -ffffffff8317d004 D ifiq_maxlen_return -ffffffff8317e000 D etherbroadcastaddr -ffffffff8317e006 D ether_ipmulticast_min -ffffffff8317e00c D ether_ipmulticast_max -ffffffff8317e012 D ether_ip6multicast_min -ffffffff8317e018 D ether_ip6multicast_max -ffffffff8317f000 D etherip_cloner -ffffffff8317f030 D etherip_list -ffffffff83180000 D loop_cloner -ffffffff83181000 D ifmedia_mtx -ffffffff83182000 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fiji_clock_stretcher_ddt_table +ffffffff82cca000 R iceland_smu_funcs +ffffffff82cca0e0 r defaults_icelandxt +ffffffff82cca12c r defaults_icelandpro +ffffffff82cca178 r defaults_iceland +ffffffff82ccb000 R polaris10_smu_funcs +ffffffff82ccb0e0 r avfs_graphics_level_polaris10 +ffffffff82ccb2a0 r avfs_memory_level_polaris10 +ffffffff82ccb2c0 r polaris10_power_tune_data_set_array +ffffffff82ccb310 r Range_Table +ffffffff82ccc000 R smu10_smu_funcs +ffffffff82ccd000 r smu7_program_jump_on_start.data +ffffffff82ccd010 r pwr_virus_table_pre +ffffffff82ccd680 r pwr_virus_table_post +ffffffff82ccdf80 r pwr_virus_section1 +ffffffff82cce610 r pwr_virus_section2 +ffffffff82cce660 r pwr_virus_section3 +ffffffff82cd5ab0 r pwr_virus_section4 +ffffffff82cd5e80 r pwr_virus_section5 +ffffffff82cd6490 r pwr_virus_section6 +ffffffff82cd8000 R smu8_smu_funcs +ffffffff82cd9000 R tonga_smu_funcs +ffffffff82cd90e0 r tonga_power_tune_data_set_array +ffffffff82cd912c r tonga_clock_stretch_amount_conversion +ffffffff82cd9140 r tonga_clock_stretcher_ddt_table +ffffffff82cda000 R vega10_smu_funcs +ffffffff82cdb000 R vega12_smu_funcs +ffffffff82cdc000 R vega20_smu_funcs +ffffffff82cdd000 R vegam_smu_funcs +ffffffff82cdd0e0 r vegam_power_tune_data_set_array +ffffffff82cdd130 r Range_Table +ffffffff82cde000 R smu_ip_funcs +ffffffff82cde0a0 R smu_v11_0_ip_block +ffffffff82cde0b8 R smu_v12_0_ip_block +ffffffff82cde0d0 R smu_v13_0_ip_block +ffffffff82cde0e8 r swsmu_pm_funcs +ffffffff82cdf000 r arcturus_table_map +ffffffff82cdf080 r arcturus_pwr_src_map +ffffffff82cdf090 r arcturus_workload_map +ffffffff82cdf0d0 r arcturus_ppt_funcs +ffffffff82cdf4a0 r smu11_thermal_policy +ffffffff82cdf4f8 r arcturus_i2c_algo +ffffffff82cdf508 r arcturus_i2c_control_quirks +ffffffff82cdf520 r arcturus_throttler_map +ffffffff82cdf540 r arcturus_message_map +ffffffff82cdff90 r arcturus_clk_map +ffffffff82ce0050 r arcturus_feature_mask_map +ffffffff82ce1000 r cyan_skillfish_ppt_funcs +ffffffff82ce2000 r navi10_ppt_funcs +ffffffff82ce23d0 r smu11_thermal_policy +ffffffff82ce2428 r navi10_i2c_algo +ffffffff82ce2438 r navi10_i2c_control_quirks +ffffffff82ce2450 r navi1x_throttler_map +ffffffff82ce2470 r NoDbiPrbs7 +ffffffff82ce3470 r DbiPrbs7 +ffffffff82ce5000 r sienna_cichlid_ppt_funcs +ffffffff82ce53d0 r smu11_thermal_policy +ffffffff82ce5428 r sienna_cichlid_i2c_algo +ffffffff82ce5438 r sienna_cichlid_i2c_control_quirks +ffffffff82ce5450 r sienna_cichlid_throttler_map +ffffffff82ce6000 r smu_v11_0_irq_funcs +ffffffff82ce6010 r link_width +ffffffff82ce7000 r vangogh_ppt_funcs +ffffffff82ce73d0 r vangogh_throttler_map +ffffffff82ce8000 r renoir_ppt_funcs +ffffffff82ce83d0 r renoir_throttler_map +ffffffff82ce9000 r aldebaran_clk_map +ffffffff82ce90c0 r aldebaran_table_map +ffffffff82ce9140 r aldebaran_ppt_funcs +ffffffff82ce9510 r smu13_thermal_policy +ffffffff82ce9568 r aldebaran_i2c_algo +ffffffff82ce9578 r aldebaran_i2c_control_quirks +ffffffff82ce9590 r aldebaran_throttler_map +ffffffff82ce95b0 r aldebaran_message_map +ffffffff82cea000 r aldebaran_feature_mask_map +ffffffff82ceb000 r smu_v13_0_irq_funcs +ffffffff82ceb010 r link_width +ffffffff82cec000 r smu_v13_0_0_ppt_funcs +ffffffff82cec3d0 r smu13_thermal_policy +ffffffff82cec428 r smu_v13_0_0_i2c_algo +ffffffff82cec438 r smu_v13_0_0_i2c_control_quirks +ffffffff82cec450 r smu_v13_0_0_throttler_map +ffffffff82ced000 r smu_v13_0_4_ppt_funcs +ffffffff82cee000 r smu_v13_0_5_ppt_funcs +ffffffff82cef000 r smu_v13_0_7_ppt_funcs +ffffffff82cef3d0 r smu13_thermal_policy +ffffffff82cef430 r smu_v13_0_7_throttler_map +ffffffff82cf0000 r yellow_carp_ppt_funcs +ffffffff82cf1000 r __smu_message_names +ffffffff82cf2000 R pchb_ca +ffffffff82cf3000 R amas_ca +ffffffff82cf3028 R amas_devices +ffffffff82cf3040 r amas_feature +ffffffff82cf4000 R cardslot_ca +ffffffff82cf5000 R cardbus_ca +ffffffff82cf6000 R com_cardbus_ca +ffffffff82cf7000 R xl_cardbus_ca +ffffffff82cf7030 R xl_cardbus_products +ffffffff82cf8000 R dc_cardbus_ca +ffffffff82cf8030 R dc_cardbus_devices +ffffffff82cf9000 R fxp_cardbus_ca +ffffffff82cf9028 R fxp_cardbus_devices +ffffffff82cfa000 R rl_cardbus_devices +ffffffff82cfa028 R rl_cardbus_ca +ffffffff82cfb000 R re_cardbus_ca +ffffffff82cfb028 R re_cardbus_devices +ffffffff82cfc000 R ath_cardbus_ca +ffffffff82cfd000 R athn_cardbus_ca +ffffffff82cfd030 r athn_cardbus_devices +ffffffff82cfe000 R atw_cardbus_ca +ffffffff82cfe028 R atw_cardbus_devices +ffffffff82cff000 R rtw_cardbus_ca +ffffffff82cff028 R rtw_cardbus_devices +ffffffff82d00000 R ral_cardbus_ca +ffffffff82d00030 r ral_cardbus_devices +ffffffff82d01000 R acx_cardbus_ca +ffffffff82d01028 r acx_cardbus_devices +ffffffff82d02000 R pgt_cardbus_ca +ffffffff82d02028 R pgt_cardbus_devices +ffffffff82d03000 R ehci_cardbus_ca +ffffffff82d04000 R ohci_cardbus_ca +ffffffff82d05000 R uhci_cardbus_ca +ffffffff82d06000 R malo_cardbus_ca +ffffffff82d06028 r malo_cardbus_devices +ffffffff82d07000 R bwi_cardbus_ca +ffffffff82d07030 r bwi_cardbus_devices +ffffffff82d08000 R pcmcia_ca +ffffffff82d09000 r pcmcia_parse_cis_tuple.init_cfe +ffffffff82d0a000 r pcmcia_cis_quirks +ffffffff82d0b000 R ep_pcmcia_ca +ffffffff82d0c000 R ne_pcmcia_ca +ffffffff82d0c030 R ne2000devs +ffffffff82d0e000 R aic_pcmcia_ca +ffffffff82d0f000 R com_pcmcia_ca +ffffffff82d10000 R wdc_pcmcia_ca +ffffffff82d11000 R sm_pcmcia_ca +ffffffff82d12000 R xe_pcmcia_ca +ffffffff82d13000 R wi_pcmcia_ca +ffffffff82d13030 r wi_pcmcia_products +ffffffff82d14000 R malo_pcmcia_ca +ffffffff82d15000 R an_pcmcia_ca +ffffffff82d16000 R pcib_ca +ffffffff82d17000 R amdpcib_ca +ffffffff82d17028 R amdpcib_devices +ffffffff82d18000 R tcpcib_ca +ffffffff82d18028 R tcpcib_devices +ffffffff82d19000 R aapic_ca +ffffffff82d1a000 R hme_pci_ca +ffffffff82d1a028 r hme_promhdr +ffffffff82d1a02a r hme_promdat +ffffffff82d1b000 R isa_ca +ffffffff82d1c000 R isadma_ca +ffffffff82d1d000 R fdc_ca +ffffffff82d1e000 R fd_ca +ffffffff82d1f000 R com_isa_ca +ffffffff82d20000 R pckbc_isa_ca +ffffffff82d21000 R vga_isa_ca +ffffffff82d22000 R wdc_isa_ca +ffffffff82d23000 R mpu_midi_hw_if +ffffffff82d24000 R mpu_isa_ca +ffffffff82d25000 R pcppi_ca +ffffffff82d26000 R spkr_ca +ffffffff82d26030 r pitchtab +ffffffff82d27000 R lpt_isa_ca +ffffffff82d28000 R wbsio_ca +ffffffff82d29000 R schsio_ca +ffffffff82d2a000 R lm_isa_ca +ffffffff82d2a028 R lm_wbsio_ca +ffffffff82d2b000 R it_sensors +ffffffff82d2b110 R it_vrfact +ffffffff82d2b140 R it_fan_regs +ffffffff82d2b160 R it_fan_ext_regs +ffffffff82d2b178 R it_ca +ffffffff82d2c000 R abitkv_sensors +ffffffff82d2c200 R abitaa_sensors +ffffffff82d2c480 R abitav_sensors +ffffffff82d2c700 R abitas_sensors +ffffffff82d2c980 R abitax_sensors +ffffffff82d2cbc0 R abitm4_sensors +ffffffff82d2ce80 R abitan_sensors +ffffffff82d2d120 R abital_sensors +ffffffff82d2d3a0 R abitaw_sensors +ffffffff82d2d700 R abitni_sensors +ffffffff82d2d9a0 R abitat_sensors +ffffffff82d2dcc0 R abitan2_sensors +ffffffff82d2df60 R abitab_sensors +ffffffff82d2e220 R abitan3_sensors +ffffffff82d2e500 R abitaw2_sensors +ffffffff82d2e860 R abitat2_sensors +ffffffff82d2eb60 R abitab2_sensors +ffffffff82d2eea0 R abitin_sensors +ffffffff82d2f1e0 R uguru_ca +ffffffff82d30000 R aps_ca +ffffffff82d31000 R wsdisplay_emul_ca +ffffffff82d31030 r charClass +ffffffff82d32000 r usl_syncops +ffffffff82d33000 R wsevent_filtops +ffffffff82d34000 R wskbd_ca +ffffffff82d35000 r latin1_to_upper +ffffffff82d36000 R wsmouse_ca +ffffffff82d37000 R cyrillic_to_koi8 +ffffffff82d37060 R unicode_to_latin2 +ffffffff82d370e0 R unicode_to_latin7 +ffffffff82d38000 R wsemul_vt100_ops +ffffffff82d39000 r decspcgr2uni +ffffffff82d39100 r dectech2uni +ffffffff82d39200 r nrctable +ffffffff82d39320 r nrcovlpos +ffffffff82d3a000 r vt100_fkeys +ffffffff82d3a0c0 r vt100_pfkeys +ffffffff82d3a0e0 r vt100_numpad +ffffffff82d3b000 R pckbd_ca +ffffffff82d3b028 R pckbd_accessops +ffffffff82d3b040 R pckbd_consops +ffffffff82d3b060 R pckbd_keymapdata +ffffffff82d3b070 R pckbd_xtbl2 +ffffffff82d3b100 R pckbd_xtbl2_ext +ffffffff82d3c000 r pckbd_keydesc_us +ffffffff82d3c250 r pckbd_keydesc_de +ffffffff82d3c2f0 r pckbd_keydesc_de_nodead +ffffffff82d3c310 r pckbd_keydesc_fr +ffffffff82d3c3d0 r pckbd_keydesc_fr_dvorak_bepo +ffffffff82d3c510 r pckbd_keydesc_dk +ffffffff82d3c5a0 r pckbd_keydesc_dk_nodead +ffffffff82d3c5b0 r pckbd_keydesc_it +ffffffff82d3c640 r pckbd_keydesc_uk +ffffffff82d3c6e0 r pckbd_keydesc_jp +ffffffff82d3c750 r pckbd_keydesc_sv +ffffffff82d3c780 r pckbd_keydesc_sv_nodead +ffffffff82d3c790 r pckbd_keydesc_no +ffffffff82d3c7c0 r pckbd_keydesc_no_nodead +ffffffff82d3c7d0 r pckbd_keydesc_us_declk +ffffffff82d3c860 r pckbd_keydesc_us_dvorak +ffffffff82d3c900 r pckbd_keydesc_us_colemak +ffffffff82d3c948 r pckbd_keydesc_swapctrlcaps +ffffffff82d3c960 r pckbd_keydesc_iopener +ffffffff82d3c9b0 r pckbd_keydesc_es +ffffffff82d3ca50 r pckbd_keydesc_be +ffffffff82d3cb10 r pckbd_keydesc_ru +ffffffff82d3cc80 r pckbd_keydesc_ua +ffffffff82d3ce10 r pckbd_keydesc_sg +ffffffff82d3cec0 r pckbd_keydesc_sg_nodead +ffffffff82d3cee0 r pckbd_keydesc_sf +ffffffff82d3cf00 r pckbd_keydesc_pt +ffffffff82d3cf90 r pckbd_keydesc_lt +ffffffff82d3d070 r pckbd_keydesc_la +ffffffff82d3d100 r pckbd_keydesc_br +ffffffff82d3d180 r pckbd_keydesc_tr +ffffffff82d3d230 r pckbd_keydesc_tr_nodead +ffffffff82d3d250 r pckbd_keydesc_pl +ffffffff82d3d2b0 r pckbd_keydesc_hu +ffffffff82d3d3c0 r pckbd_keydesc_si +ffffffff82d3d4d0 r pckbd_keydesc_cf +ffffffff82d3d5a0 r pckbd_keydesc_cf_nodead +ffffffff82d3d5c0 r pckbd_keydesc_lv +ffffffff82d3d640 r pckbd_keydesc_nl +ffffffff82d3d720 r pckbd_keydesc_nl_nodead +ffffffff82d3d740 r pckbd_keydesc_is +ffffffff82d3d7cc r pckbd_keydesc_is_nodead +ffffffff82d3d7e0 r pckbd_keydesc_ee +ffffffff82d3d890 r pckbd_keydesc_ee_nodead +ffffffff82d3d8b0 R pckbd_keydesctab +ffffffff82d3e000 R pms_ca +ffffffff82d3e028 R pms_accessops +ffffffff82d3e040 R pms_sec_accessops +ffffffff82d3e060 R pms_protocols +ffffffff82d3e1e0 r alps_models +ffffffff82d3f000 R skgpio_led_offset +ffffffff82d3f008 R skgpio_ca +ffffffff82d40000 R hidkbd_trtab +ffffffff82d40100 r apple_fn_trans +ffffffff82d40120 r apple_tb_trans +ffffffff82d40140 r apple_mba_trans +ffffffff82d41000 r hidcc_attach_wskbd.accessops +ffffffff82d41020 r hidcc_keysyms +ffffffff82d42000 R usb_ca +ffffffff82d43000 R usb_known_products +ffffffff82d4ef80 R usb_known_vendors +ffffffff82d51790 R usbd_error_strs +ffffffff82d52000 R usb_quirks +ffffffff82d52390 R usb_dev_quirks +ffffffff82d52398 R usbd_no_quirk +ffffffff82d53000 R uhub_ca +ffffffff82d53028 R uhub_uhub_ca +ffffffff82d54000 R uaudio_ca +ffffffff82d54028 R uaudio_hw_if +ffffffff82d540e0 R uaudio_rates +ffffffff82d54120 r uaudio_clkname.names +ffffffff82d54140 r uaudio_feature_addent.features +ffffffff82d55000 R uvideo_ca +ffffffff82d55028 R uvideo_hw_if +ffffffff82d55100 R uvideo_devs +ffffffff82d56000 r utvfu_select_norm.pal +ffffffff82d56040 r utvfu_select_norm.ntsc +ffffffff82d56080 r utvfu_setup_capture.setup +ffffffff82d56180 r utvfu_audio_start_chip.setup +ffffffff82d561c8 r utvfu_audio_stop_chip.setup +ffffffff82d561d8 R utvfu_ca +ffffffff82d56200 R utvfu_vid_hw_if +ffffffff82d562d0 R utvfu_au_hw_if +ffffffff82d57000 R udl_ca +ffffffff82d57030 r udl_devs +ffffffff82d570b0 r udl_modes +ffffffff82d58000 R umidi_hw_if +ffffffff82d58030 R umidi_ca +ffffffff82d58060 r umidi_evlen +ffffffff82d58080 r packet_length +ffffffff82d59000 r quirk_name +ffffffff82d5a000 R ucom_ca +ffffffff82d5b000 R ugen_ca +ffffffff82d5b028 R ugenread_intr_filtops +ffffffff82d5b058 R ugenread_isoc_filtops +ffffffff82d5c000 R uhidev_ca +ffffffff82d5c030 r uhid_graphire_report_descr +ffffffff82d5c0b0 r uhid_graphire3_4x5_report_descr +ffffffff82d5c160 r uhid_xb360gp_report_descr +ffffffff82d5c210 r uhid_xbonegp_report_descr +ffffffff82d5d000 R uhid_ca +ffffffff82d5d028 R uhidread_filtops +ffffffff82d5e000 R fido_ca +ffffffff82d5f000 R ujoy_ca +ffffffff82d60000 r ukbd_keydesc_us +ffffffff82d602a0 r ukbd_keydesc_de +ffffffff82d60350 r ukbd_keydesc_de_nodead +ffffffff82d60370 r ukbd_keydesc_fr +ffffffff82d60430 r ukbd_keydesc_fr_apple +ffffffff82d60570 r ukbd_keydesc_fr_dvorak_bepo +ffffffff82d606b0 r ukbd_keydesc_dk +ffffffff82d60750 r ukbd_keydesc_dk_nodead +ffffffff82d60760 r ukbd_keydesc_it +ffffffff82d60800 r ukbd_keydesc_uk +ffffffff82d608b0 r ukbd_keydesc_jp +ffffffff82d60920 r ukbd_keydesc_sv +ffffffff82d60950 r ukbd_keydesc_sv_nodead +ffffffff82d60960 r ukbd_keydesc_no +ffffffff82d60990 r ukbd_keydesc_no_nodead +ffffffff82d609a0 r ukbd_keydesc_us_dvorak +ffffffff82d60a40 r ukbd_keydesc_us_colemak +ffffffff82d60a88 r ukbd_keydesc_swapctrlcaps +ffffffff82d60aa0 r ukbd_keydesc_iopener +ffffffff82d60af0 r ukbd_keydesc_es +ffffffff82d60b90 r ukbd_keydesc_be +ffffffff82d60c50 r ukbd_keydesc_ru +ffffffff82d60dc0 r ukbd_keydesc_ua +ffffffff82d60f60 r ukbd_keydesc_sg +ffffffff82d61020 r ukbd_keydesc_sg_nodead +ffffffff82d61040 r ukbd_keydesc_sf +ffffffff82d61060 r ukbd_keydesc_pt +ffffffff82d610f0 r ukbd_keydesc_pt_apple +ffffffff82d61110 r ukbd_keydesc_lt +ffffffff82d611f0 r ukbd_keydesc_la +ffffffff82d61290 r ukbd_keydesc_br +ffffffff82d61320 r ukbd_keydesc_tr +ffffffff82d613e0 r ukbd_keydesc_tr_nodead +ffffffff82d61400 r ukbd_keydesc_pl +ffffffff82d61460 r ukbd_keydesc_hu +ffffffff82d61570 r ukbd_keydesc_si +ffffffff82d61690 r ukbd_keydesc_cf +ffffffff82d61770 r ukbd_keydesc_cf_nodead +ffffffff82d61790 r ukbd_keydesc_lv +ffffffff82d61810 r ukbd_keydesc_nl +ffffffff82d618f0 r ukbd_keydesc_nl_nodead +ffffffff82d61910 r ukbd_keydesc_is +ffffffff82d619a4 r ukbd_keydesc_is_nodead +ffffffff82d619b0 r ukbd_keydesc_ee +ffffffff82d61a60 r ukbd_keydesc_ee_nodead +ffffffff82d61a80 R ukbd_keydesctab +ffffffff82d62000 R ukbd_countrylayout +ffffffff82d62090 R ukbd_consops +ffffffff82d620b0 R ukbd_accessops +ffffffff82d620c8 R ukbd_ca +ffffffff82d63000 R ums_accessops +ffffffff82d63018 R ums_ca +ffffffff82d64000 R umt_accessops +ffffffff82d64018 R umt_ca +ffffffff82d65000 R uts_devs +ffffffff82d65010 R uts_accessops +ffffffff82d65028 R uts_ca +ffffffff82d66000 R ubcmtp_accessops +ffffffff82d66018 R ubcmtp_ca +ffffffff82d66040 r ubcmtp_devices +ffffffff82d67000 R ucycom_methods +ffffffff82d67040 R ucycom_devs +ffffffff82d67050 R ucycom_ca +ffffffff82d68000 R uslhcom_methods +ffffffff82d68040 R uslhcom_ca +ffffffff82d68068 r uslhcom_devs +ffffffff82d69000 R ulpt_ca +ffffffff82d6a000 R umass_ca +ffffffff82d6a028 R umass_bbb_methods +ffffffff82d6a040 R umass_cbi_methods +ffffffff82d6b000 R umass_quirks +ffffffff82d6c000 R umass_scsi_switch +ffffffff82d6d000 R uthum_devs +ffffffff82d6d008 R uthum_ca +ffffffff82d6d030 r uthum_sensor_type_s +ffffffff82d6e000 R ugold_devs +ffffffff82d6e010 R ugold_ca +ffffffff82d6f000 R utrh_devs +ffffffff82d6f008 R utrh_ca +ffffffff82d70000 R uoakrh_devs +ffffffff82d70008 R uoakrh_ca +ffffffff82d70030 R uoakrh_methods +ffffffff82d71000 R uoaklux_devs +ffffffff82d71008 R uoaklux_ca +ffffffff82d71030 R uoaklux_methods +ffffffff82d72000 R uoakv_devs +ffffffff82d72008 R uoakv_ca +ffffffff82d72030 R uoakv_methods +ffffffff82d73000 R uonerng_ca +ffffffff82d74000 R urng_ca +ffffffff82d74030 r urng_devs +ffffffff82d75000 R udcf_ca +ffffffff82d75028 r udcf_devs +ffffffff82d76000 R umbg_ca +ffffffff82d77000 R uvisor_methods +ffffffff82d77040 R uvisor_ca +ffffffff82d77070 r uvisor_devs +ffffffff82d78000 R udsbr_hw_if +ffffffff82d78028 R udsbr_ca +ffffffff82d79000 R utwitch_devs +ffffffff82d79008 R utwitch_ca +ffffffff82d7a000 R aue_devs +ffffffff82d7a1b0 R aue_ca +ffffffff82d7b000 R axe_devs +ffffffff82d7b0d0 R axe_ca +ffffffff82d7c000 R axen_devs +ffffffff82d7c020 R axen_ca +ffffffff82d7d000 R smsc_ca +ffffffff82d7d030 r smsc_devs +ffffffff82d7e000 R cue_ca +ffffffff82d7f000 R kue_devs +ffffffff82d7f088 R kue_ca +ffffffff82d80000 R cdce_devs +ffffffff82d800a0 R cdce_ca +ffffffff82d81000 R urndis_ca +ffffffff82d81030 R urndis_class +ffffffff82d82000 R mos_devs +ffffffff82d82018 R mos_ca +ffffffff82d83000 R mue_devs +ffffffff82d83020 R mue_ca +ffffffff82d84000 R udav_ca +ffffffff82d84030 r udav_devs +ffffffff82d85000 R upl_ca +ffffffff82d86000 R ugl_ca +ffffffff82d87000 R url_ca +ffffffff82d87030 r url_devs +ffffffff82d88000 R ure_devs +ffffffff82d880e8 R ure_ca +ffffffff82d89000 R uaq_devs +ffffffff82d89018 R uaq_ca +ffffffff82d8a000 R umodem_methods +ffffffff82d8a040 R umodem_ca +ffffffff82d8b000 R uftdi_methods +ffffffff82d8b040 R uftdi_ca +ffffffff82d8b070 r uftdi_devs +ffffffff82d8c000 R uplcom_methods +ffffffff82d8c040 R uplcom_ca +ffffffff82d8c070 r uplcom_devs +ffffffff82d8d000 R umct_methods +ffffffff82d8d040 R umct_ca +ffffffff82d8d070 r umct_devs +ffffffff82d8e000 R uvscom_methods +ffffffff82d8e040 R uvscom_ca +ffffffff82d8e070 r uvscom_devs +ffffffff82d8f000 R ubsa_methods +ffffffff82d8f040 R ubsa_devs +ffffffff82d8f060 R ubsa_ca +ffffffff82d90000 R ukspan_ca +ffffffff82d90028 r ukspan_devs +ffffffff82d90030 r ukspan_methods +ffffffff82d91000 R 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+ffffffff830fb008 D sili_cd +ffffffff830fc000 D esp_cd +ffffffff830fc020 D ncr53c9x_variant_names +ffffffff830fd000 D E_abs_script_sched_slot0_Used +ffffffff830fd0a0 D E_abs_targ0_Used +ffffffff830fd0dc D E_abs_msgin_Used +ffffffff830fd0e8 D E_abs_lunsw_return_Used +ffffffff830fd0f0 D E_abs_tag0_Used +ffffffff830fd130 D E_ldsa_abs_reselected_Used +ffffffff830fd134 D E_ldsa_abs_reselect_Used +ffffffff830fd138 D E_ldsa_abs_selected_Used +ffffffff830fd13c D E_ldsa_abs_data_Used +ffffffff830fd140 D E_ldsa_abs_slot_Used +ffffffff830fd148 D siop_cd +ffffffff830fe000 D ep_isa_media +ffffffff830fe060 D ep_cd +ffffffff830ff000 D wi_cd +ffffffff830ff020 D wi_func_io +ffffffff83100000 D an_cd +ffffffff83101000 D xl_cd +ffffffff83102000 D fxp_int_delay +ffffffff83102004 D fxp_bundle_max +ffffffff83102008 D fxp_min_size_mask +ffffffff83102010 D fxp_cd +ffffffff83102030 d tx_threshold +ffffffff83102040 d fxp_cb_config_template +ffffffff83103000 D rl_cd +ffffffff83104000 D re_cd +ffffffff83105000 D dc_cd +ffffffff83106000 D smc91cxx_idstrs +ffffffff83106080 D sm_cd +ffffffff83107000 D epic_cd +ffffffff83108000 D ne_cd +ffffffff83108020 d ne2000_detect.test_pattern +ffffffff83109000 D gem_cd +ffffffff8310a000 D ti_cd +ffffffff8310b000 D com_cd +ffffffff8310b020 D comdefaultrate +ffffffff8310b024 D comconsrate +ffffffff8310b028 D comconscflag +ffffffff8310b030 d comcnattach.comcons +ffffffff8310c000 D pckbc_slot_names +ffffffff8310c010 D pckbc_cd +ffffffff8310d000 D ac97civ +ffffffff8310e000 D cy_cd +ffffffff8310f000 D lpt_cd +ffffffff83110000 D lm_cd +ffffffff83111000 D ath_dwelltime +ffffffff83111004 D ath_calinterval +ffffffff83111008 D ath_outdoor +ffffffff8311100c D ath_xchanmode +ffffffff83111010 D ath_softcrypto +ffffffff83111018 D ath_cd +ffffffff83112000 D athn_cd +ffffffff83113000 D bwfm_2ghz_channels +ffffffff83113010 D bwfm_5ghz_channels +ffffffff83113030 D bwfm_proto_bcdc_ops +ffffffff83113050 D bwfm_cd +ffffffff83114000 D atw_bbp_io_enable_delay +ffffffff83114004 D atw_bbp_io_disable_delay +ffffffff83114008 D atw_writewep_delay +ffffffff8311400c D atw_beacon_len_adjust +ffffffff83114010 D atw_dwelltime +ffffffff83114018 D atw_cd +ffffffff83115000 D rtw_dwelltime +ffffffff83115004 D rtw_macbangbits_timeout +ffffffff83115008 D rtw_cd +ffffffff83116000 D ral_cd +ffffffff83117000 D rt3090_freqs +ffffffff83118000 D acx_beacon_intvl +ffffffff83118008 D acx_cd +ffffffff83119000 D pgt_cd +ffffffff8311a000 D sf_cd +ffffffff8311b000 D malo_cd +ffffffff8311c000 D bwi_cd +ffffffff8311c020 D bwi_constraint +ffffffff8311c030 D bwi_pa_mode +ffffffff8311d000 D iosf_cd +ffffffff8311d020 d iosf_lock +ffffffff8311d030 d iosf_mbi_mtx +ffffffff8311e000 D uhci_cd +ffffffff8311f000 D ohci_cd +ffffffff83120000 D ehci_cd +ffffffff83121000 D xhci_cd +ffffffff83122000 D ccp_cd +ffffffff83123000 D sdhc_functions +ffffffff83123068 D sdhc_cd +ffffffff83124000 D rtsx_functions +ffffffff83124068 D rtsx_cd +ffffffff83125000 D radio_cd +ffffffff83126000 D kcs_if +ffffffff83126040 D smic_if +ffffffff83126080 D bt_if +ffffffff831260c0 D ipmi_cd +ffffffff831260e0 D maxsdrlen +ffffffff83127000 D vscsi_cd +ffffffff83128000 D mpath_cd +ffffffff83129000 D softraid_cd +ffffffff83129020 D smd +ffffffff8312a000 D spdmem_cd +ffffffff8312b000 D dwiic_cd +ffffffff8312c000 D dwqe_cd +ffffffff8312d000 D kstat_lock +ffffffff8312d010 D kstat_next_id +ffffffff8312d018 D kstat_default_lock +ffffffff8312e000 D pf_hdr_limit +ffffffff8312e010 D pf_pool_limits +ffffffff8312e080 D pf_state_list +ffffffff8312e0b0 D pf_purge_states_task +ffffffff8312e0e0 D pf_purge_states_to +ffffffff8312e128 D pf_purge_states_collect +ffffffff8312e130 D pf_purge_to +ffffffff8312e178 D pf_purge_task +ffffffff8312f000 D pf_tags +ffffffff8312f010 D pf_qids +ffffffff8312f020 D pf_lock +ffffffff8312f030 D pf_state_lock +ffffffff8312f040 D pfioctl_rw +ffffffff8312f050 d pf_open_trans.ticket +ffffffff83130000 D pfi_update +ffffffff83131000 D pflog_cloner +ffffffff83132000 D pfsync_cloner +ffffffff83133000 D pflow_cloner +ffffffff83134000 d hotplug_mtx +ffffffff83135000 D pppoe_cloner +ffffffff83135030 D pppoediscinq +ffffffff83135060 D pppoeinq +ffffffff83136000 D dt_lock +ffffffff83137000 D dt_prov_profile +ffffffff83137030 D dt_prov_interval +ffffffff83138000 D dtps_nsysent +ffffffff83138008 D dt_prov_syscall +ffffffff83139000 D dt_prov_static +ffffffff83139030 D dt_static_sched_dequeue +ffffffff831390a0 D dt_static_sched_enqueue +ffffffff83139110 D dt_static_sched_fork +ffffffff83139180 D dt_static_sched_off__cpu +ffffffff831391f0 D dt_static_sched_on__cpu +ffffffff83139260 D dt_static_sched_remain__cpu +ffffffff831392d0 D dt_static_sched_sleep +ffffffff83139340 D dt_static_sched_steal +ffffffff831393b0 D dt_static_sched_unsleep +ffffffff83139420 D dt_static_sched_wakeup +ffffffff83139490 D dt_static_raw_syscalls_sys_enter +ffffffff83139500 D dt_static_raw_syscalls_sys_exit +ffffffff83139570 D dt_static_uvm_fault +ffffffff831395e0 D dt_static_uvm_map_insert +ffffffff83139650 D dt_static_uvm_map_remove +ffffffff831396c0 D dt_static_uvm_malloc +ffffffff83139730 D dt_static_uvm_free +ffffffff831397a0 D dt_static_uvm_pool_get +ffffffff83139810 D dt_static_uvm_pool_put +ffffffff83139880 D dt_static_vfs_bufcache_rel +ffffffff831398f0 D dt_static_vfs_bufcache_take +ffffffff83139960 D dt_static_vfs_cleaner +ffffffff831399d0 D dt_static_vmm_guest_enter +ffffffff83139a40 D dt_static_vmm_guest_exit +ffffffff83139ab0 D dt_static_vmm_inout +ffffffff83139b20 D dt_static_smr_call +ffffffff83139b90 D dt_static_smr_called +ffffffff83139c00 D dt_static_smr_barrier_enter +ffffffff83139c70 D dt_static_smr_barrier_exit +ffffffff83139ce0 D dt_static_smr_wakeup +ffffffff83139d50 D dt_static_smr_thread +ffffffff83139dc0 D dt_static_refcnt_none +ffffffff83139e30 D dt_static_refcnt_ethmulti +ffffffff83139ea0 D dt_static_refcnt_ifaddr +ffffffff83139f10 D dt_static_refcnt_ifmaddr +ffffffff83139f80 D dt_static_refcnt_inpcb +ffffffff83139ff0 D dt_static_refcnt_rtentry +ffffffff8313a060 D dt_static_refcnt_syncache +ffffffff8313a0d0 D dt_static_refcnt_tdb +ffffffff8313b000 D db_next_free_breakpoint +ffffffff8313b008 D db_breakpoints_inserted +ffffffff8313c000 D db_ed_style +ffffffff8313d000 D db_examine_format +ffffffff8313d078 D db_print_format +ffffffff8313e000 D db_history_size +ffffffff8313e008 D db_history_curr +ffffffff8313e010 D db_history_last +ffffffff8313f000 D db_tab_stop_width +ffffffff8313f004 D db_max_line +ffffffff8313f008 D db_max_width +ffffffff8313f00c D db_radix +ffffffff83140000 D db_lastsym +ffffffff83140008 D db_maxoff +ffffffff83141000 D db_vars +ffffffff83141090 D db_evars +ffffffff83142000 D db_watchpoints_inserted +ffffffff83142008 D db_next_free_watchpoint +ffffffff83143000 D db_log +ffffffff83144000 D audio_cd +ffffffff83144020 D audio_lock +ffffffff83145000 D midi_cd +ffffffff83146000 D rnd_cold +ffffffff83146004 D rnd_slowextract +ffffffff83146008 D rnd_timeout +ffffffff83146050 D rndlock +ffffffff83146060 D rndreinit_timeout +ffffffff831460a8 D rnd_task +ffffffff83147000 D video_cd +ffffffff83148000 d rrip_table_analyze +ffffffff831480e0 d rrip_table_getname +ffffffff831481e0 d rrip_table_getsymname +ffffffff83148280 d rrip_table_extref +ffffffff83149000 D nexecs +ffffffff8314a000 D elf_note_names +ffffffff8314b000 D ncpus +ffffffff8314b004 D ncpusfound +ffffffff8314c000 D acct_lock +ffffffff8314c010 D acctsuspend +ffffffff8314c014 D acctresume +ffffffff8314c018 D acctrate +ffffffff8314d000 D ticks +ffffffff8314e000 D fhdlk +ffffffff8314f000 D kqueue_klist_lock +ffffffff8314f010 D kq_timeoutmax +ffffffff83150000 D stackgap_random +ffffffff83151000 D nprocesses +ffffffff83151004 D nthreads +ffffffff83151008 D fork_tfmrate +ffffffff83152000 D kthread_q +ffffffff83153000 D malloc_mtx +ffffffff83153010 D memname +ffffffff831534a0 D sysctl_kmemlock +ffffffff831534b0 D malloc_errintvl +ffffffff83154000 D maxdmap +ffffffff83154008 D maxsmap +ffffffff83154010 D rlimit_lock +ffffffff83155000 D sched_cost_load +ffffffff83155004 D sched_cost_priority +ffffffff83155008 D sched_cost_runnable +ffffffff8315500c D sched_cost_resident +ffffffff83156000 D intrmap_lock +ffffffff83157000 D nosuidcoredump +ffffffff83157008 D sigio_lock +ffffffff83158000 D smr_lock +ffffffff83158010 D smr_logintvl +ffffffff83159000 D startuphook_list +ffffffff8315a000 D sysctl_lock +ffffffff8315a010 D sysctl_disklock +ffffffff8315a020 d openbsd +ffffffff8315a024 d arg_max +ffffffff8315a028 d posix_version +ffffffff8315a02c d ngroups_max +ffffffff8315a030 d int_one +ffffffff8315a034 d maxpartitions +ffffffff8315a038 d raw_part +ffffffff8315a03c D allowpowerdown +ffffffff8315a040 D hw_power +ffffffff8315a044 d byte_order +ffffffff8315a048 d page_size +ffffffff8315b000 d thrsleep_queue +ffffffff8315b010 d thrsleep_lock +ffffffff8315c000 D tc_lock +ffffffff8315c010 D windup_mtx +ffffffff8315c020 D timecounter +ffffffff8315c028 D time_second +ffffffff8315c030 d timehands +ffffffff8315c038 d dummy_timecounter +ffffffff8315c088 d th0 +ffffffff8315c120 d th1 +ffffffff8315d000 D itimer_mtx +ffffffff8315d010 D ratecheck_mtx +ffffffff8315d020 D ppsratecheck_mtx +ffffffff8315d030 D resettodr_to +ffffffff8315d078 D resettodr_task +ffffffff8315e000 D timeout_mutex +ffffffff8315f000 D wdog_auto +ffffffff83160000 D taskq_sys +ffffffff83160050 D taskq_sys_mp +ffffffff83161000 d update_loadavg.to +ffffffff83161048 D ccpu +ffffffff83161050 d schedcpu.to +ffffffff83161098 D perflevel +ffffffff8316109c D perfpolicy +ffffffff831610a0 D setperf_to +ffffffff83162000 D autoconf_attdet_mtx +ffffffff83162010 D msgs +ffffffff83163000 d evcount_list +ffffffff83163010 d evcount_percpu_init_list +ffffffff83164000 D syslogf_rwlock +ffffffff83164010 D log_mtx +ffffffff83164020 D logstash_in +ffffffff83164028 D logstash_out +ffffffff83164030 D logstash_rwlock +ffffffff83165000 D pool_head +ffffffff83165010 D pool_lock +ffffffff83165020 D pool_debug +ffffffff83165028 D pool_allocator_single +ffffffff83165040 D pool_allocator_multi +ffffffff83165058 D pool_allocator_multi_ni +ffffffff83165070 D pool_gc_tick +ffffffff831650b8 D pool_gc_task +ffffffff83166000 D kprintf_mutex +ffffffff83166010 D db_panic +ffffffff83166014 D splassert_ctl +ffffffff83166018 D v_putc +ffffffff83166020 D printf_flags +ffffffff83167000 D userconf_base +ffffffff83167004 D userconf_maxdev +ffffffff83167008 D userconf_totdev +ffffffff8316700c D userconf_maxlocnames +ffffffff83167010 D userconf_cnt +ffffffff83167014 D userconf_lines +ffffffff83167018 D userconf_histsz +ffffffff83167020 D userconf_cmds +ffffffff83168000 D ftlock +ffffffff83169000 d ppollcollect.poll_errintvl +ffffffff8316a000 D ttydefchars +ffffffff8316a014 D ttclos +ffffffff8316a01b D ttopen +ffffffff8316a022 D ttybg +ffffffff8316a028 D ttyin +ffffffff8316a02e D ttyout +ffffffff8316a038 D ttylist_lock +ffffffff8316b000 D linesw +ffffffff8316b280 D nlinesw +ffffffff8316c000 D pt_softc_lock +ffffffff8316d000 d mbstat_boot_boot_cpumem +ffffffff8316d080 D mbstat +ffffffff8316d090 D mclsizes +ffffffff8316d0b0 D m_extref_mtx +ffffffff8316d0c0 D m_pool_allocator +ffffffff8316e000 D somaxconn +ffffffff8316e004 D sominconn +ffffffff8316e008 D sosplice_lock +ffffffff8316f000 D sb_max +ffffffff83170000 D unp_df_lock +ffffffff83170010 D unp_gc_lock +ffffffff83170020 D unp_rights_mtx +ffffffff83170030 D unp_ino_mtx +ffffffff83170040 D unp_gc_task +ffffffff83170070 D unpst_sendspace +ffffffff83170074 D unpst_recvspace +ffffffff83170078 D unpsq_sendspace +ffffffff8317007c D unpsq_recvspace +ffffffff83170080 D unpdg_sendspace +ffffffff83170084 D unpdg_recvspace +ffffffff83171000 D doingcache +ffffffff83172000 D maxvfsconf +ffffffff83172010 d vfsconflist +ffffffff83173000 D lockf_lock +ffffffff83173010 D maxlocksperuid +ffffffff83174000 D iftovt_tab +ffffffff83174040 D vttoif_tab +ffffffff83174064 D suid_clear +ffffffff83174068 D vnode_mtx +ffffffff83174078 D vfs_stall_lock +ffffffff83174090 D vtypes +ffffffff831740e0 D vtags +ffffffff83175000 D syncer_maxdelay +ffffffff83175004 D syncdelay +ffffffff83176000 D dosdirtemplate +ffffffff83177000 D ntfs_hashlock +ffffffff83178000 D ntfs_toupper_lock +ffffffff83179000 D art_table_gc_mtx +ffffffff83179010 D art_table_gc_task +ffffffff83179040 D art_node_gc_mtx +ffffffff83179050 D art_node_gc_task +ffffffff8317a000 D bpf_bufsize +ffffffff8317a004 D bpf_maxbufsize +ffffffff8317a008 D bpf_sysctl_lk +ffffffff8317b000 D ifg_head +ffffffff8317b010 D if_cloners_lock +ffffffff8317b020 D if_input_task_locked +ffffffff8317b050 D netlock +ffffffff8317b060 D ifnetlist +ffffffff8317c000 D ifiq_maxlen_drop +ffffffff8317c004 D ifiq_maxlen_return +ffffffff8317d000 D etherbroadcastaddr +ffffffff8317d006 D ether_ipmulticast_min +ffffffff8317d00c D ether_ipmulticast_max +ffffffff8317d012 D ether_ip6multicast_min +ffffffff8317d018 D ether_ip6multicast_max +ffffffff8317e000 D etherip_cloner +ffffffff8317e030 D etherip_list +ffffffff8317f000 D loop_cloner +ffffffff83180000 D ifmedia_mtx +ffffffff83181000 D ppp_compressors +ffffffff83181020 D ppp_cloner +ffffffff83182000 D ppp_pkt_init +ffffffff83183000 D ppp_bsd_compress +ffffffff83184000 D ppp_deflate +ffffffff83184070 D ppp_deflate_draft +ffffffff83185000 D tun_cloner +ffffffff83185030 D tap_cloner +ffffffff83186000 D bridgeintrq +ffffffff83186038 D bridge_cloner +ffffffff83187000 d veb_cloner +ffffffff83187030 d vport_cloner +ffffffff83188000 D vlan_tagh_lk +ffffffff83188010 D vlan_cloner +ffffffff83188040 D svlan_cloner +ffffffff83189000 D pipex_list_mtx +ffffffff83189010 D pipex_prune +ffffffff83189018 D pipexoutq +ffffffff83189050 d SHAPad2 +ffffffff8318a000 D rtmap_gc +ffffffff8318a018 D rt_rc +ffffffff8318b000 D rt_labels +ffffffff8318b010 D rtlabel_mtx +ffffffff8318c000 D enc_cloner +ffffffff8318d000 D gre_cloner +ffffffff8318d030 D gre_list +ffffffff8318d040 D mgre_cloner +ffffffff8318d070 D egre_cloner +ffffffff8318d0a0 D nvgre_cloner +ffffffff8318d0d0 D eoip_cloner +ffffffff8318e000 D trunk_cloner +ffffffff8318f000 d aggr_cloner +ffffffff83190000 d tpmr_cloner +ffffffff83191000 D mpe_cloner +ffffffff83192000 D mpw_cloner +ffffffff83193000 D mpip_cloner +ffffffff83194000 d bpe_cloner +ffffffff83194030 d bpe_lock +ffffffff83195000 D vether_cloner +ffffffff83196000 D pair_cloner +ffffffff83197000 d vxlan_cloner +ffffffff83197030 d vxlan_lock +ffffffff83197040 d vxlan_teps +ffffffff83198000 D underload_interval +ffffffff83198010 D wg_cloner +ffffffff83199000 d stoeplitz_keyseed +ffffffff8319a000 D ieee80211_cache_size +ffffffff8319b000 D arpt_prune +ffffffff8319b004 D arpt_keep +ffffffff8319b008 D arpt_down +ffffffff8319b010 D arpinq +ffffffff8319b048 D arp_mtx +ffffffff8319b058 D arp_maxtries +ffffffff8319c000 D ipport_firstauto +ffffffff8319c004 D ipport_lastauto +ffffffff8319c008 D ipport_hifirstauto +ffffffff8319c00c D ipport_hilastauto +ffffffff8319d000 D divert_sendspace +ffffffff8319d004 D divert_recvspace +ffffffff8319d008 D divbhashsize +ffffffff8319e000 D icmptstamprepl +ffffffff8319e004 D icmperrppslim +ffffffff8319e008 D icmp_redirtimeout +ffffffff8319f000 D ipsendredirects +ffffffff8319f004 D ip_defttl +ffffffff8319f008 D ip_mtudisc +ffffffff8319f00c D ip_mtudisc_timeout +ffffffff8319f010 D ipq_mutex +ffffffff8319f020 D ip_maxqueue +ffffffff8319f028 D ipintrq +ffffffff8319f060 d ipsend_task +ffffffff8319f090 d ipsendraw_task +ffffffff831a0000 D ip_mrtproto +ffffffff831a0004 d sin +ffffffff831a1000 D rip_sendspace +ffffffff831a1008 D rip_recvspace +ffffffff831a2000 D tcprexmtthresh +ffffffff831a2004 D tcptv_keep_init +ffffffff831a2008 D tcp_rst_ppslim +ffffffff831a200c D tcp_ackdrop_ppslim +ffffffff831a2010 D tcp_syn_hash_size +ffffffff831a2014 D tcp_syn_cache_limit +ffffffff831a2018 D tcp_syn_bucket_limit +ffffffff831a201c D tcp_syn_use_limit +ffffffff831a2020 D syn_cache_mtx +ffffffff831a3000 D tcp_outflags +ffffffff831a4000 D tcp_timer_mtx +ffffffff831a4010 D tcp_mssdflt +ffffffff831a4014 D tcp_rttdflt +ffffffff831a4018 D tcp_do_rfc1323 +ffffffff831a401c D tcp_do_sack +ffffffff831a4020 D tcp_do_rfc3390 +ffffffff831a4024 D tcp_do_tso +ffffffff831a4028 D tcp_reass_limit +ffffffff831a402c D tcp_sackhole_limit +ffffffff831a5000 D tcp_backoff +ffffffff831a5034 D tcp_totbackoff +ffffffff831a6000 D tcp_sendspace +ffffffff831a6004 D tcp_recvspace +ffffffff831a6008 D tcp_autorcvbuf_inc +ffffffff831a7000 D udpcksum +ffffffff831a7004 D udp_sendspace +ffffffff831a7008 D udp_recvspace +ffffffff831a8000 D ipsec_flows_mtx +ffffffff831a8010 D ipsec_ids_idle +ffffffff831a8014 D ipsec_ids_next_flow +ffffffff831a8018 D ipsec_policy_head +ffffffff831a8028 D ipsp_ids_gc_timeout +ffffffff831a8070 D tdb_sadb_mtx +ffffffff831a8080 d tdb_hashmask +ffffffff831a9000 D ipo_tdb_mtx +ffffffff831a9010 D ipsec_acquire_mtx +ffffffff831a9020 D ipsec_acquire_head +ffffffff831aa000 D ipsec_keep_invalid +ffffffff831aa004 D ipsec_require_pfs +ffffffff831aa008 D ipsec_soft_timeout +ffffffff831aa00c D ipsec_exp_timeout +ffffffff831aa010 D ipsec_soft_first_use +ffffffff831aa014 D ipsec_exp_first_use +ffffffff831aa018 D ipsec_expire_acquire +ffffffff831aa01c D esp_enable +ffffffff831aa020 D ah_enable +ffffffff831ab000 D udpencap_enable +ffffffff831ab004 D udpencap_port +ffffffff831ac000 D carp_vh_rc +ffffffff831ac020 D carp_sc_rc +ffffffff831ac040 D carp_opts +ffffffff831ac058 D carp_cloner +ffffffff831ac088 d carp_send_na.mcast +ffffffff831ad000 d PADDING ffffffff831ae000 d PADDING -ffffffff831af000 d PADDING -ffffffff831b0000 d weak_keys -ffffffff831b1000 D swcr_id -ffffffff831b2000 D window_inflate -ffffffff831b2004 D window_deflate -ffffffff831b3000 D ghash_update -ffffffff831b4000 D mpls_defttl -ffffffff831b4004 D mpls_mapttl_ip -ffffffff831b5000 D nfskevq_lock -ffffffff831b6000 D nfs_backoff -ffffffff831b6020 D nfs_ptimers -ffffffff831b7000 D desirednfsrvcache -ffffffff831b7010 D nonidempotent -ffffffff831b7070 D nfsv2_repstat -ffffffff831b8000 D nfsv2_type -ffffffff831b8030 D nfsv3_type -ffffffff831b8060 D nv2tov_type -ffffffff831b8080 D nv3tov_type -ffffffff831b80a0 D nfsv3_procid -ffffffff831b8100 D nfsv2_procid -ffffffff831b815c d nfsv3err_getattr -ffffffff831b8170 d nfsv3err_setattr -ffffffff831b8190 d nfsv3err_lookup -ffffffff831b81a4 d nfsv3err_access -ffffffff831b81b0 d nfsv3err_readlink -ffffffff831b81d0 d nfsv3err_read -ffffffff831b81f0 d nfsv3err_write -ffffffff831b8210 d nfsv3err_create -ffffffff831b8230 d nfsv3err_mkdir -ffffffff831b8250 d nfsv3err_symlink -ffffffff831b8270 d nfsv3err_mknod -ffffffff831b8290 d nfsv3err_remove -ffffffff831b82b0 d nfsv3err_rmdir -ffffffff831b82d0 d nfsv3err_rename -ffffffff831b8300 d nfsv3err_link -ffffffff831b8330 d nfsv3err_readdir -ffffffff831b8350 d nfsv3err_readdirplus -ffffffff831b8366 d nfsv3err_fsstat -ffffffff831b8372 d nfsv3err_fsinfo -ffffffff831b837c d nfsv3err_pathconf -ffffffff831b8386 d nfsv3err_commit -ffffffff831b9000 D nfsrv3_procs -ffffffff831b90b8 D nfs_niothreads -ffffffff831ba000 D fragtbl -ffffffff831bb000 D ffs_vtbl -ffffffff831bc000 D softdep_typenames -ffffffff831bc070 D tickdelay -ffffffff831bd000 D dirchk -ffffffff831be000 D desireddquot -ffffffff831bf000 D amap_list_lock -ffffffff831c0000 d uao_list_lock -ffffffff831c1000 d uvmexp_countersboot_boot_cpumem -ffffffff831c10c0 D uvmexp_counters -ffffffff831c10c8 D vm_min_kernel_address -ffffffff831c2000 D no_constraint -ffffffff831c3000 d uvm_kmapent_warn_rate -ffffffff831c4000 D maxslp -ffffffff831c5000 D uvmpagerops -ffffffff831c6000 D uvm_swap_data_lock -ffffffff831c6010 D swap_syscall_lock -ffffffff831c6020 D oommtx -ffffffff831c7000 D uvm_doswapencrypt -ffffffff831c8000 D gif_list -ffffffff831c8010 D gif_cloner -ffffffff831c9000 d sec_cloner -ffffffff831c9030 d sec_tdb_gc_mtx -ffffffff831c9040 d sec_tdb_gc_task -ffffffff831ca000 D divert6_sendspace -ffffffff831ca004 D divert6_recvspace -ffffffff831ca008 D divb6hashsize -ffffffff831cb000 d in6_get_hw_ifid.allone -ffffffff831cc000 D ip6_sendredirects -ffffffff831cc004 D ip6_defhlim -ffffffff831cc008 D ip6_defmcasthlim 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bmtphy_cd -ffffffff83215000 D brgphy_cd -ffffffff83216000 D xmphy_cd -ffffffff83217000 D amphy_cd -ffffffff83218000 D acphy_cd -ffffffff83219000 D nsgphy_cd -ffffffff8321a000 D urlphy_cd -ffffffff8321b000 D rgephy_cd -ffffffff8321c000 D ciphy_cd -ffffffff8321d000 D ipgphy_cd -ffffffff8321e000 D etphy_cd -ffffffff8321f000 D jmphy_cd -ffffffff83220000 D atphy_cd -ffffffff83221000 D scsi_autoconf -ffffffff83221008 D scsibus_cd -ffffffff83222000 D cd_cd -ffffffff83223000 D ch_cd -ffffffff83223020 D chquirks -ffffffff83224000 D sd_cd -ffffffff83225000 D st_cd -ffffffff83226000 D uk_cd -ffffffff83227000 D safte_cd -ffffffff83228000 D ses_cd -ffffffff83229000 D sym_cd -ffffffff83229020 D sym_devices -ffffffff83229070 D asym_devices -ffffffff8322a000 D rdac_cd -ffffffff8322a020 D rdac_devices -ffffffff8322b000 D emc_cd -ffffffff8322b020 D emc_devices -ffffffff8322c000 D hds_cd -ffffffff8322c020 D hds_devices -ffffffff8322d000 D atapiscsi_cd -ffffffff8322e000 D wd_cd -ffffffff8322e020 d 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cpu_model_offsets -ffffffff83297070 D ksmn_cd -ffffffff83298000 D itherm_cd -ffffffff83299000 D pchtemp_cd -ffffffff8329a000 D xspd_cd -ffffffff8329b000 D virtio_pci_ops -ffffffff8329c000 D bwfm_pci_buscore_ops -ffffffff8329c030 D bwfm_pci_bus_ops -ffffffff8329c058 D bwfm_pci_msgbuf_ops -ffffffff8329d000 D bnxt_cd -ffffffff8329e000 D mcx_cd -ffffffff8329f000 D iavf_cd -ffffffff832a0000 D rge_cd -ffffffff832a1000 D igc_cd -ffffffff832a2000 D ngbe_cd -ffffffff832a3000 D agp_cd -ffffffff832a4000 D intagp_cd -ffffffff832a4020 D agp_i810_methods -ffffffff832a5000 D reservation_ww_class -ffffffff832a6000 d bridge_lock -ffffffff832a6010 d bridge_list -ffffffff832a7000 d drm_connector_enum_list -ffffffff832a71f8 d connector_list_lock -ffffffff832a7208 d connector_list -ffffffff832a8000 d kernel_fb_helper_list -ffffffff832a8010 d kernel_fb_helper_lock -ffffffff832a9000 D drm_global_mutex -ffffffff832aa000 D i2c_bit_algo -ffffffff832aa010 d drm_fence_context_count -ffffffff832aa018 d dma_fence_stub_mtx -ffffffff832aa028 D wait_bit_mtx -ffffffff832aa038 D shrinkers -ffffffff832ab000 d crtc_ww_class -ffffffff832ac000 d panel_lock -ffffffff832ac010 d panel_list -ffffffff832ad000 d ttm_global_mutex -ffffffff832ae000 D intel_bbops -ffffffff832af000 d i915_sys_placement -ffffffff832af020 d i915_ttm_bo_driver -ffffffff832b0000 d mchdev_lock -ffffffff832b1000 D inteldrm_stdscreen -ffffffff832b1030 D inteldrm_scrlist -ffffffff832b1038 D inteldrm_screenlist -ffffffff832b1048 D inteldrm_accessops -ffffffff832b10a8 D inteldrm_cd -ffffffff832b2000 d capture_mutex -ffffffff832b3000 d mitigations -ffffffff832b4000 D i915_modparams -ffffffff832b5000 d schedule_lock -ffffffff832b6000 d unbind_fence_ops -ffffffff832b7000 D intel_graphics_stolen_res -ffffffff832b8000 D btc_valid_sclk -ffffffff832b9000 d evergreen_cs_packet_parse_vline.vline_start_end -ffffffff832b9020 d evergreen_cs_packet_parse_vline.vline_status -ffffffff832ba000 d r600_cs_packet_parse_vline.vline_start_end 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radeondrm_scrlist -ffffffff832c00b0 D radeondrm_screenlist -ffffffff832c00c0 D radeondrm_accessops -ffffffff832c1000 D radeon_bbops -ffffffff832c2000 d radeon_bo_driver -ffffffff832c3000 d verde_pg_init -ffffffff832c4000 d cac_weights_pitcairn -ffffffff832c44d0 d cac_weights_oland -ffffffff832c5000 d aldebaran_mode2_handler -ffffffff832c6000 d amdgpu_vbios_version_attrs -ffffffff832c7000 D amdgpu_asic_name -ffffffff832c8000 D amdgpu_gart_size -ffffffff832c8004 D amdgpu_gtt_size -ffffffff832c8008 D amdgpu_moverate -ffffffff832c800c D amdgpu_audio -ffffffff832c8010 D amdgpu_pcie_gen2 -ffffffff832c8014 D amdgpu_msi -ffffffff832c8018 D amdgpu_dpm -ffffffff832c801c D amdgpu_fw_load_type -ffffffff832c8020 D amdgpu_aspm -ffffffff832c8024 D amdgpu_runtime_pm -ffffffff832c8028 D amdgpu_ip_block_mask -ffffffff832c802c D amdgpu_bapm -ffffffff832c8030 D amdgpu_vm_size -ffffffff832c8034 D amdgpu_vm_fragment_size -ffffffff832c8038 D amdgpu_vm_block_size -ffffffff832c803c D amdgpu_vm_update_mode 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uvn_sync_q -ffffffff83586000 b sec_mix -ffffffff83586040 b sec_map -ffffffff83586840 b sec_tdbh -ffffffff83587040 b sec_tdb_gc_list -ffffffff83588000 B divb6table -ffffffff83588078 B div6counters -ffffffff83589000 b in6_get_hw_ifid.allzero -ffffffff8358a000 B ip6_forwarding -ffffffff8358a004 B ip6_mforwarding -ffffffff8358a008 B ip6_multipath -ffffffff8358a00c B ip6_mcast_pmtu -ffffffff8358a010 B ip6_log_time -ffffffff8358a020 B ip6_protox -ffffffff8358a120 B ip6_dad_pending -ffffffff8358b000 B ip6af_pool -ffffffff8358b1a8 B ip6q_pool -ffffffff8358b350 B frag6_queue -ffffffff8358b360 B frag6_nfrags -ffffffff8358b364 B frag6_nfragpackets -ffffffff8358c000 B icmp6_mtudisc_callbacks -ffffffff8358c008 B icmp6_mtudisc_timeout_q -ffffffff8358c040 B icmp6_redirect_timeout_q -ffffffff8358c078 B icmp6counters -ffffffff8358c080 b icmp6_redirect_diag.buf -ffffffff8358c480 b icmp6errppslim_last -ffffffff8358c490 b icmp6errpps_count -ffffffff8358d000 b ip6send_mq -ffffffff8358d030 B ip6counters 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biosbasemem -ffffffff83594020 B bootapiver -ffffffff83594024 B safepri -ffffffff83594028 B exec_map -ffffffff83594030 B phys_map -ffffffff83594038 B allowaperture -ffffffff83594040 B msgbuf_paddr -ffffffff83594048 B msgbuf_vaddr -ffffffff83594050 B physmem -ffffffff83594058 B idt_vaddr -ffffffff83594060 B idt_paddr -ffffffff83594068 B bios_diskinfo -ffffffff83594070 B bios_cksumlen -ffffffff83594074 B kbd_reset -ffffffff83594078 B forceukbd -ffffffff8359407c B dumpsize -ffffffff83594080 B dumplo -ffffffff83594088 B mem_cluster_cnt -ffffffff83594090 B mem_clusters -ffffffff83594190 B dumpmem_vaddr -ffffffff83594198 B dumppcb -ffffffff83594520 B dumpmem_sz -ffffffff83594528 B proc0paddr -ffffffff83594530 B idt -ffffffff83594538 b cpu_init_extents.already_done -ffffffff83594540 B lo32_vaddr -ffffffff83594548 B lo32_paddr -ffffffff83594550 B tramp_pdirpa -ffffffff83594558 B early_pte_pages -ffffffff83594560 B bootinfo -ffffffff83595560 B avail_start -ffffffff83595568 B avail_end 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tsc_ap_status -ffffffff83597180 B tsc_ap_name -ffffffff83598000 b vc3_sc -ffffffff83598010 b viac3_rnd.buffer -ffffffff83598058 B viac3_rnd_tmo -ffffffff835980a0 B viac3_rnd_present -ffffffff83599000 B aesni_sc -ffffffff83599008 B aesnipl -ffffffff835991b0 B aesni_ops -ffffffff8359a000 b amd64_errata.printed -ffffffff8359b000 B cpu_ucode_size -ffffffff8359b008 B cpu_ucode_data -ffffffff8359b010 B cpu_ucode_intel_applied -ffffffff8359c000 b ap_open_count -ffffffff8359c008 B zeropage -ffffffff8359c010 B mem_range_softc -ffffffff8359d000 B mtrrdef -ffffffff8359d008 B mtrrcap -ffffffff8359e000 B nkptp -ffffffff8359e020 B pg_nx -ffffffff8359e028 B pg_g_kern -ffffffff8359e030 B pmap_initialized -ffffffff8359e038 B kernel_pmap_store -ffffffff8359e110 B cr3_reuse_pcid -ffffffff8359e118 b cr3_pcid_temp -ffffffff8359e120 B virtual_avail -ffffffff8359e128 B pg_xo -ffffffff8359e130 B protection_codes -ffffffff8359e170 B pmap_use_pcid -ffffffff8359e174 b cr3_pcid_proc -ffffffff8359e178 B cr3_pcid_proc_intel -ffffffff8359e180 B pmaps -ffffffff8359e188 B pmap_pmap_pool -ffffffff8359e330 B pmap_pv_pool -ffffffff8359e4d8 B pmap_pdp_pool -ffffffff8359f000 B fpu_mxcsr_mask -ffffffff8359f008 B xsave_mask -ffffffff835a0000 B x86_soft_intrs -ffffffff835a1000 B i8259_imen -ffffffff835a2000 B intr_shared_edge -ffffffff835a2008 B fake_softclock_intrhand -ffffffff835a2078 B fake_softnet_intrhand -ffffffff835a20e8 B fake_softtty_intrhand -ffffffff835a2158 B fake_timer_intrhand -ffffffff835a21c8 B fake_ipi_intrhand -ffffffff835a2238 B fake_xen_intrhand -ffffffff835a22a8 B fake_hyperv_intrhand -ffffffff835a3000 B atdevbase -ffffffff835a3010 b ioport_ex_storage -ffffffff835a32e0 B ioport_ex -ffffffff835a32f0 b iomem_ex_storage -ffffffff835a35c0 B iomem_ex -ffffffff835a35c8 b ioport_malloc_safe -ffffffff835a4000 B mp_perflevel -ffffffff835a4008 B ul_setperf -ffffffff835a5000 B cn_tab -ffffffff835a6000 B ddb_mp_mutex -ffffffff835a6010 B ddb_state -ffffffff835a6018 B ddb_regs -ffffffff835a60c8 B db_switch_cpu -ffffffff835a60d0 B db_switch_to_cpu -ffffffff835a60d8 B ddb_active_cpu -ffffffff835a7000 B rtclock_tval -ffffffff835a7008 B i8254_ticked -ffffffff835a700c B i8254_offset -ffffffff835a7010 B i8254_lastcount -ffffffff835a7018 b rtcstart.rtcdrain_timeout -ffffffff835a7060 B rtc_update_century -ffffffff835a7068 B rtc_todr -ffffffff835a8000 B k8pnow_current_state -ffffffff835a9000 B bus_clock -ffffffff835a9008 b est_fqlist -ffffffff835aa000 B k1x_current_state -ffffffff835ab000 B rotatedfonts -ffffffff835ab008 B rasops_framebuffers +ffffffff831af000 d weak_keys +ffffffff831b0000 D swcr_id +ffffffff831b1000 D window_inflate +ffffffff831b1004 D window_deflate +ffffffff831b2000 D ghash_update +ffffffff831b3000 D mpls_defttl +ffffffff831b3004 D mpls_mapttl_ip +ffffffff831b4000 D nfskevq_lock +ffffffff831b5000 D nfs_backoff +ffffffff831b5020 D nfs_ptimers +ffffffff831b6000 D desirednfsrvcache +ffffffff831b6010 D nonidempotent +ffffffff831b6070 D nfsv2_repstat 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+ffffffff831b80b8 D nfs_niothreads +ffffffff831b9000 D fragtbl +ffffffff831ba000 D ffs_vtbl +ffffffff831bb000 D softdep_typenames +ffffffff831bb070 D tickdelay +ffffffff831bc000 D dirchk +ffffffff831bd000 D desireddquot +ffffffff831be000 D amap_list_lock +ffffffff831bf000 d uao_list_lock +ffffffff831c0000 d uvmexp_countersboot_boot_cpumem +ffffffff831c00c0 D uvmexp_counters +ffffffff831c00c8 D vm_min_kernel_address +ffffffff831c1000 D no_constraint +ffffffff831c2000 d uvm_kmapent_warn_rate +ffffffff831c3000 D maxslp +ffffffff831c4000 D uvmpagerops +ffffffff831c5000 D uvm_swap_data_lock +ffffffff831c5010 D swap_syscall_lock +ffffffff831c5020 D oommtx +ffffffff831c6000 D uvm_doswapencrypt +ffffffff831c7000 D gif_list +ffffffff831c7010 D gif_cloner +ffffffff831c8000 d sec_cloner +ffffffff831c8030 d sec_tdb_gc_mtx +ffffffff831c8040 d sec_tdb_gc_task +ffffffff831c9000 D divert6_sendspace +ffffffff831c9004 D divert6_recvspace +ffffffff831c9008 D divb6hashsize +ffffffff831ca000 d in6_get_hw_ifid.allone +ffffffff831cb000 D ip6_sendredirects +ffffffff831cb004 D ip6_defhlim +ffffffff831cb008 D ip6_defmcasthlim +ffffffff831cb00c D ip6_maxfragpackets +ffffffff831cb010 D ip6_maxfrags +ffffffff831cb014 D ip6_log_interval +ffffffff831cb018 D ip6_hdrnestlimit +ffffffff831cb01c D ip6_dad_count +ffffffff831cb020 D ip6_auto_flowlabel +ffffffff831cb024 D ip6_use_deprecated +ffffffff831cb028 D ip6_neighborgcthresh +ffffffff831cb02c D ip6_maxdynroutes +ffffffff831cb030 D rip6_sendspace +ffffffff831cb038 D rip6_recvspace +ffffffff831cb040 D icmp6_redirtimeout +ffffffff831cb044 D icmp6errppslim +ffffffff831cb048 D ip6_mtudisc_timeout +ffffffff831cc000 D frag6_mutex +ffffffff831cd000 d icmp6_mtudisc_hiwat +ffffffff831cd004 d icmp6_mtudisc_lowat +ffffffff831ce000 d randomtab_20 +ffffffff831cf000 D ip6intrq +ffffffff831cf038 d ip6send_task +ffffffff831d0000 D nd6_timer_next +ffffffff831d0008 D nd6_expire_next +ffffffff831d0010 D nd6_delay +ffffffff831d0014 D nd6_umaxtries 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tsc_rdtsc +ffffffff831d9008 D tsc_timecounter +ffffffff831d9058 D tsc_is_synchronized +ffffffff831da000 D local_apic +ffffffff831da020 D lapic_id +ffffffff831da080 D lapic_tpr +ffffffff831da0a0 d lapic_ppr +ffffffff831da100 d lapic_isr +ffffffff831db000 D warn_once +ffffffff831dc000 d errata +ffffffff831dd000 D cpu_ucode_mtx +ffffffff831de000 D mem_owner_bios +ffffffff831de008 D mrops +ffffffff831de028 D mtrrmask +ffffffff831de030 D mtrrtomrt +ffffffff831df000 D pmap_pg_wc +ffffffff831df008 D pmaps_lock +ffffffff831df018 d pmap_maxkvaddr +ffffffff831e0000 D kv_physwait +ffffffff831e1000 D fpu_save_len +ffffffff831e2000 D i8259_pic +ffffffff831e3000 D softintr_pic +ffffffff831e4000 D ipifunc +ffffffff831e5000 D setperf_mp_mutex +ffffffff831e6000 D db_Grp6 +ffffffff831e6040 D db_Grp7 +ffffffff831e6100 D db_Grp8 +ffffffff831e6140 D db_Grp9 +ffffffff831e6200 D db_GrpA +ffffffff831e6240 D db_GrpB +ffffffff831e6280 D db_GrpC +ffffffff831e62c0 D db_inst_0f0x +ffffffff831e6440 D db_inst_0f2x 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sqphy_cd +ffffffff83210000 D tqphy_cd +ffffffff83211000 D ukphy_cd +ffffffff83212000 D dcphy_cd +ffffffff83213000 D bmtphy_cd +ffffffff83214000 D brgphy_cd +ffffffff83215000 D xmphy_cd +ffffffff83216000 D amphy_cd +ffffffff83217000 D acphy_cd +ffffffff83218000 D nsgphy_cd +ffffffff83219000 D urlphy_cd +ffffffff8321a000 D rgephy_cd +ffffffff8321b000 D ciphy_cd +ffffffff8321c000 D ipgphy_cd +ffffffff8321d000 D etphy_cd +ffffffff8321e000 D jmphy_cd +ffffffff8321f000 D atphy_cd +ffffffff83220000 D scsi_autoconf +ffffffff83220008 D scsibus_cd +ffffffff83221000 D cd_cd +ffffffff83222000 D ch_cd +ffffffff83222020 D chquirks +ffffffff83223000 D sd_cd +ffffffff83224000 D st_cd +ffffffff83225000 D uk_cd +ffffffff83226000 D safte_cd +ffffffff83227000 D ses_cd +ffffffff83228000 D sym_cd +ffffffff83228020 D sym_devices +ffffffff83228070 D asym_devices +ffffffff83229000 D rdac_cd +ffffffff83229020 D rdac_devices +ffffffff8322a000 D emc_cd +ffffffff8322a020 D emc_devices +ffffffff8322b000 D hds_cd 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pvclock_cd +ffffffff83239020 D pvclock_timecounter +ffffffff8323a000 D vmt_tclo_rpc +ffffffff8323a0d0 D vmt_cd +ffffffff8323b000 D xen_cd +ffffffff8323b020 D xen_bus_dma_tag +ffffffff8323c000 D xnf_cd +ffffffff8323d000 D xbf_cd +ffffffff8323e000 D hv_msg_dispatch +ffffffff8323e110 D hv_timecounter +ffffffff8323e160 D hyperv_cd +ffffffff8323f000 d hv_ic_devs +ffffffff83240000 D hvn_cd +ffffffff83241000 D hvs_cd +ffffffff83242000 D virtio_cd +ffffffff83243000 D vio_cd +ffffffff83244000 D vioblk_cd +ffffffff83245000 D viomb_cd +ffffffff83246000 D viornd_cd +ffffffff83247000 D vioscsi_cd +ffffffff83248000 D vmmci_cd +ffffffff83249000 D pci_cd +ffffffff8324a000 D arc_fw_hdr +ffffffff8324a008 D arc_cd +ffffffff8324b000 D jmb_cd +ffffffff8324c000 D mfii_cd +ffffffff8324d000 D ips_cd +ffffffff8324e000 D eap_cd +ffffffff8324f000 D auacer_cd +ffffffff83250000 D auich_cd +ffffffff83251000 D azalia_cd +ffffffff83252000 D envy_cd +ffffffff83252020 D envy_matchids +ffffffff83252030 D envy_rates +ffffffff832520b0 D ak4524_dac +ffffffff832520d8 D ak4524_adc +ffffffff83252100 D ak4358_dac +ffffffff83252128 D ak5365_adc +ffffffff83252150 D unkenvy_codec +ffffffff83252180 D envy_cards +ffffffff832523f0 D envy_cards_ht +ffffffff83252600 d julia_eeprom +ffffffff83253000 D emu_cd +ffffffff83254000 D auixp_cd +ffffffff83255000 D clcs_cd +ffffffff83256000 D yds_cd +ffffffff83257000 D auvia_cd +ffffffff83258000 D qle_cd +ffffffff83259000 D mpii_cd +ffffffff8325a000 D aq_cd +ffffffff8325b000 D de_cd +ffffffff8325c000 D pcn_cd +ffffffff8325d000 D wdc_sii3114_vtbl +ffffffff8325d038 D wdc_pdc203xx_vtbl +ffffffff8325d070 D wdc_svwsata_vtbl +ffffffff8325d0a8 D pciide_cd +ffffffff8325d0d0 d sis_hostbr_type +ffffffff8325e000 D ppb_cd +ffffffff8325f000 D vr_cd +ffffffff8325f020 D vr_devices +ffffffff83260000 D txp_cd +ffffffff83261000 D bt848_card_signature +ffffffff83262000 D bktr_cd +ffffffff83263000 D em_cd +ffffffff83264000 D ixgb_cd +ffffffff83265000 D ix_cd +ffffffff83265020 D ixgbe_smart_speed +ffffffff83265024 D ixgbe_enable_msix +ffffffff83266000 D ixl_cd +ffffffff83266020 d ixl_sff_lock +ffffffff83267000 D xge_cd +ffffffff83268000 D thtc_cd +ffffffff83268020 D tht_cd +ffffffff83268040 D tht_txt_desc +ffffffff83268068 D tht_rxf_desc +ffffffff83268090 D tht_rxd_desc +ffffffff832680b8 D tht_txf_desc +ffffffff83269000 D myx_cd +ffffffff8326a000 D oce_cd +ffffffff8326b000 D dc_devs +ffffffff8326c000 D cas_cd +ffffffff8326d000 D sis_cd +ffffffff8326e000 D se_cd +ffffffff8326f000 D mbg_cd +ffffffff83270000 D cbb_cd +ffffffff83270020 D yc_chipsets +ffffffff832701b0 d pccbb_funcs +ffffffff832701e0 d pccbb_pcmcia_funcs +ffffffff83271000 D skc_cd +ffffffff83271020 D sk_cd +ffffffff83272000 D mskc_cd +ffffffff83272020 D msk_cd +ffffffff83273000 D puc_cd +ffffffff83274000 D puc_ndevs +ffffffff83275000 D iwi_cd +ffffffff83276000 D wpi_cd +ffffffff83277000 D iwn_cd +ffffffff83278000 D iwm_cd +ffffffff83279000 D iwx_cd +ffffffff8327a000 D cmpci_cd +ffffffff8327b000 D iha_cd +ffffffff8327c000 D pcscp_cd +ffffffff8327c020 D pcscp_glue +ffffffff8327d000 D bge_cd +ffffffff8327e000 D bnx_firmwares +ffffffff8327e160 D bnx_rv2ps +ffffffff8327e1c0 D bnx_cd +ffffffff8327e1e0 d flash_5709 +ffffffff8327e210 d flash_table +ffffffff8327f000 D vge_cd +ffffffff83280000 D stge_cd +ffffffff83281000 D nfe_cd +ffffffff83282000 D et_cd +ffffffff83283000 D jme_cd +ffffffff83284000 D age_cd +ffffffff83285000 D alc_dma_burst +ffffffff83285020 D alc_cd +ffffffff83286000 D ale_cd +ffffffff83287000 D amdpm_cd +ffffffff83287020 d amdpm_timecounter +ffffffff83288000 D bce_cd +ffffffff83289000 D rtwn_cd +ffffffff8328a000 d ral_rt2560_opns +ffffffff8328a028 d ral_rt2661_opns +ffffffff8328a050 d ral_rt2860_opns +ffffffff8328b000 D piixpm_cd +ffffffff8328c000 D vic_cd +ffffffff8328d000 D vmx_cd +ffffffff8328e000 D vmwpvs_cd +ffffffff8328f000 D lii_cd +ffffffff83290000 D ichiic_cd +ffffffff83291000 D viapm_cd +ffffffff83291020 d viapm_timecounter +ffffffff83292000 D amdiic_cd +ffffffff83293000 D nviic_cd +ffffffff83294000 D kate_cd +ffffffff83295000 D km_cd +ffffffff83296000 D cpu_model_offsets +ffffffff83296070 D ksmn_cd +ffffffff83297000 D itherm_cd +ffffffff83298000 D pchtemp_cd +ffffffff83299000 D xspd_cd +ffffffff8329a000 D virtio_pci_ops +ffffffff8329b000 D bwfm_pci_buscore_ops +ffffffff8329b030 D bwfm_pci_bus_ops +ffffffff8329b058 D bwfm_pci_msgbuf_ops +ffffffff8329c000 D bnxt_cd +ffffffff8329d000 D mcx_cd +ffffffff8329e000 D iavf_cd +ffffffff8329f000 D rge_cd +ffffffff832a0000 D igc_cd +ffffffff832a1000 D ngbe_cd +ffffffff832a2000 D agp_cd +ffffffff832a3000 D intagp_cd +ffffffff832a3020 D agp_i810_methods +ffffffff832a4000 D reservation_ww_class +ffffffff832a5000 d bridge_lock +ffffffff832a5010 d bridge_list +ffffffff832a6000 d drm_connector_enum_list +ffffffff832a61f8 d connector_list_lock +ffffffff832a6208 d connector_list +ffffffff832a7000 d kernel_fb_helper_list +ffffffff832a7010 d kernel_fb_helper_lock +ffffffff832a8000 D drm_global_mutex +ffffffff832a9000 D i2c_bit_algo +ffffffff832a9010 d drm_fence_context_count +ffffffff832a9018 d dma_fence_stub_mtx +ffffffff832a9028 D wait_bit_mtx +ffffffff832a9038 D shrinkers +ffffffff832aa000 d crtc_ww_class +ffffffff832ab000 d panel_lock +ffffffff832ab010 d panel_list +ffffffff832ac000 d ttm_global_mutex +ffffffff832ad000 D intel_bbops +ffffffff832ae000 d i915_sys_placement +ffffffff832ae020 d i915_ttm_bo_driver +ffffffff832af000 d mchdev_lock +ffffffff832b0000 D inteldrm_stdscreen +ffffffff832b0030 D inteldrm_scrlist +ffffffff832b0038 D inteldrm_screenlist +ffffffff832b0048 D inteldrm_accessops +ffffffff832b00a8 D inteldrm_cd +ffffffff832b1000 d capture_mutex +ffffffff832b2000 d mitigations +ffffffff832b3000 D i915_modparams +ffffffff832b4000 d schedule_lock +ffffffff832b5000 d unbind_fence_ops +ffffffff832b6000 D intel_graphics_stolen_res +ffffffff832b7000 D btc_valid_sclk +ffffffff832b8000 d evergreen_cs_packet_parse_vline.vline_start_end +ffffffff832b8020 d evergreen_cs_packet_parse_vline.vline_status +ffffffff832b9000 d r600_cs_packet_parse_vline.vline_start_end +ffffffff832b9008 d r600_cs_packet_parse_vline.vline_status +ffffffff832ba000 d r100_asic +ffffffff832ba2e0 d r200_asic +ffffffff832ba5c0 d r300_asic_pcie +ffffffff832ba8a0 d r300_asic +ffffffff832bab80 d r420_asic +ffffffff832bae60 d rs400_asic +ffffffff832bb140 d rs600_asic +ffffffff832bb420 d rs690_asic +ffffffff832bb700 d rv515_asic +ffffffff832bb9e0 d r520_asic +ffffffff832bbcc0 d r600_asic +ffffffff832bbfa0 d rv6xx_asic +ffffffff832bc280 d rs780_asic +ffffffff832bc560 d rv770_asic +ffffffff832bc840 d evergreen_asic +ffffffff832bcb20 d sumo_asic +ffffffff832bce00 d btc_asic +ffffffff832bd0e0 d cayman_asic +ffffffff832bd3c0 d trinity_asic +ffffffff832bd6a0 d si_asic +ffffffff832bd980 d ci_asic +ffffffff832bdc60 d kv_asic +ffffffff832be000 d dce6_funcs +ffffffff832be018 d dce6_hdmi_funcs +ffffffff832be088 d dce6_dp_funcs +ffffffff832be0f8 d dce4_funcs +ffffffff832be110 d dce4_hdmi_funcs +ffffffff832be180 d dce4_dp_funcs +ffffffff832be1f0 d dce32_funcs +ffffffff832be208 d dce32_hdmi_funcs +ffffffff832be278 d dce32_dp_funcs +ffffffff832be2e8 d r600_funcs +ffffffff832be300 d r600_hdmi_funcs +ffffffff832bf000 D radeon_modeset +ffffffff832bf004 D radeon_dynclks +ffffffff832bf008 D radeon_agpmode +ffffffff832bf00c D radeon_gart_size +ffffffff832bf010 D radeon_tv +ffffffff832bf014 D radeon_audio +ffffffff832bf018 D radeon_pcie_gen2 +ffffffff832bf01c D radeon_msi +ffffffff832bf020 D radeon_lockup_timeout +ffffffff832bf024 D radeon_dpm +ffffffff832bf028 D radeon_aspm +ffffffff832bf02c D radeon_runtime_pm +ffffffff832bf030 D radeon_vm_size +ffffffff832bf034 D radeon_vm_block_size +ffffffff832bf038 D radeon_use_pflipirq +ffffffff832bf03c D radeon_bapm +ffffffff832bf040 D radeon_backlight +ffffffff832bf044 D radeon_auxch +ffffffff832bf048 D radeon_uvd +ffffffff832bf04c D radeon_vce +ffffffff832bf050 D radeon_si_support +ffffffff832bf054 D radeon_cik_support +ffffffff832bf058 D radeondrm_cd +ffffffff832bf078 D radeondrm_stdscreen +ffffffff832bf0a8 D radeondrm_scrlist +ffffffff832bf0b0 D radeondrm_screenlist +ffffffff832bf0c0 D radeondrm_accessops +ffffffff832c0000 D radeon_bbops +ffffffff832c1000 d radeon_bo_driver +ffffffff832c2000 d verde_pg_init +ffffffff832c3000 d cac_weights_pitcairn +ffffffff832c34d0 d cac_weights_oland +ffffffff832c4000 d aldebaran_mode2_handler +ffffffff832c5000 d amdgpu_vbios_version_attrs +ffffffff832c6000 D amdgpu_asic_name +ffffffff832c7000 D amdgpu_gart_size +ffffffff832c7004 D amdgpu_gtt_size +ffffffff832c7008 D amdgpu_moverate +ffffffff832c700c D amdgpu_audio +ffffffff832c7010 D amdgpu_pcie_gen2 +ffffffff832c7014 D amdgpu_msi +ffffffff832c7018 D amdgpu_dpm +ffffffff832c701c D amdgpu_fw_load_type +ffffffff832c7020 D amdgpu_aspm +ffffffff832c7024 D amdgpu_runtime_pm +ffffffff832c7028 D amdgpu_ip_block_mask +ffffffff832c702c D amdgpu_bapm +ffffffff832c7030 D amdgpu_vm_size +ffffffff832c7034 D amdgpu_vm_fragment_size +ffffffff832c7038 D amdgpu_vm_block_size +ffffffff832c703c D amdgpu_vm_update_mode +ffffffff832c7040 D amdgpu_dc +ffffffff832c7044 D amdgpu_sched_jobs +ffffffff832c7048 D amdgpu_sched_hw_submission +ffffffff832c7050 D amdgpu_cg_mask +ffffffff832c7058 D amdgpu_pg_mask +ffffffff832c705c D amdgpu_sdma_phase_quantum +ffffffff832c7060 D amdgpu_pp_feature_mask +ffffffff832c7064 D amdgpu_lbpw +ffffffff832c7068 D amdgpu_compute_multipipe +ffffffff832c706c D amdgpu_gpu_recovery +ffffffff832c7070 D amdgpu_smu_pptable_id +ffffffff832c7074 D amdgpu_dc_feature_mask +ffffffff832c7078 D amdgpu_async_gfx_ring +ffffffff832c707c D amdgpu_discovery +ffffffff832c7080 D amdgpu_noretry +ffffffff832c7084 D amdgpu_force_asic_type +ffffffff832c7088 D amdgpu_tmz +ffffffff832c708c D amdgpu_reset_method +ffffffff832c7090 D amdgpu_num_kcq +ffffffff832c7094 D amdgpu_use_xgmi_p2p +ffffffff832c7098 D amdgpu_sg_display +ffffffff832c70a0 D mgpu_info +ffffffff832c7250 D amdgpu_ras_enable +ffffffff832c7254 D amdgpu_ras_mask +ffffffff832c7258 D amdgpu_bad_page_threshold +ffffffff832c725c D amdgpu_backlight +ffffffff832c7260 D amdgpu_cd +ffffffff832c7280 D amdgpu_stdscreen +ffffffff832c72b0 D amdgpu_scrlist +ffffffff832c72b8 D amdgpu_screenlist +ffffffff832c72c8 D amdgpu_accessops +ffffffff832c8000 d amdgpu_gtt_mgr_attributes +ffffffff832c9000 D amdgpu_bbops +ffffffff832ca000 D soc15_ih_clientid_name +ffffffff832cb000 D ras_error_string +ffffffff832cb030 D ras_block_string +ffffffff832cb0c0 D ras_mca_block_string +ffffffff832cc000 d amdgpu_bo_driver +ffffffff832cd000 d amdgpu_vram_mgr_attributes +ffffffff832ce000 D amdgpu_xgmi_hive_type +ffffffff832ce008 d xgmi_mutex +ffffffff832ce018 D xgmi_ras_hw_ops +ffffffff832ce058 D xgmi_ras +ffffffff832cf000 d gfx_v9_0_ras +ffffffff832d0000 D gfx_v9_4_ras +ffffffff832d1000 D gfx_v9_4_2_ras_ops +ffffffff832d1040 D gfx_v9_4_2_ras +ffffffff832d2000 D hdp_v4_0_ras_hw_ops +ffffffff832d2040 D hdp_v4_0_ras +ffffffff832d3000 d jpeg_v2_6_ras +ffffffff832d4000 D mca_v3_0_mp0_ras +ffffffff832d4058 D mca_v3_0_mp1_ras +ffffffff832d40b0 D mca_v3_0_mpio_ras +ffffffff832d5000 D mmhub_v1_0_ras_hw_ops +ffffffff832d5040 D mmhub_v1_0_ras +ffffffff832d6000 D mmhub_v1_7_ras_hw_ops +ffffffff832d6040 D mmhub_v1_7_ras +ffffffff832d7000 D mmhub_v9_4_ras +ffffffff832d8000 D nbio_v7_4_ras +ffffffff832d9000 d sriov_sc_video_codecs_encode +ffffffff832d9010 d sriov_sc_video_codecs_decode +ffffffff832d9020 d sriov_sc_video_codecs_encode_array +ffffffff832d9050 d sriov_sc_video_codecs_decode_array +ffffffff832da000 d sdma_v4_0_ras +ffffffff832db000 D sdma_v4_4_ras +ffffffff832dc000 d sienna_cichlid_mode2_handler +ffffffff832dd000 D umc_v6_1_ras +ffffffff832de000 D umc_v6_7_ras +ffffffff832df000 D umc_v8_10_ras +ffffffff832e0000 D umc_v8_7_ras +ffffffff832e1000 d vcn_v2_6_ras +ffffffff832e2000 d amdgpu_dm_mode_config_helperfuncs +ffffffff832e2010 d dm_atomic_state_funcs +ffffffff832e3000 d construct_integrated_info.result +ffffffff832e3004 d bios_parser_get_firmware_info.result +ffffffff832e4000 d dce_funcs +ffffffff832e5000 d dce110_funcs +ffffffff832e6000 d dce112_funcs +ffffffff832e7000 d dce120_funcs +ffffffff832e8000 d rv1_clk_funcs +ffffffff832e8088 d rv1_clk_internal_funcs +ffffffff832e9000 d rv2_clk_internal_funcs +ffffffff832ea000 d dcn2_funcs +ffffffff832eb000 D dcn201_funcs +ffffffff832ec000 d dcn21_funcs +ffffffff832ec088 d rn_bw_params +ffffffff832ed000 D dcn3_fpga_funcs +ffffffff832ed088 d dcn3_funcs +ffffffff832ee000 d vg_funcs +ffffffff832ee088 d dummy_clocks +ffffffff832ee1b8 d vg_bw_params +ffffffff832ef000 d dcn31_bw_params +ffffffff832ef2a0 d dcn31_funcs +ffffffff832f0000 d dcn314_bw_params +ffffffff832f02a0 d dcn314_funcs +ffffffff832f1000 d dcn315_funcs +ffffffff832f1088 d dcn315_bw_params +ffffffff832f2000 d dcn316_funcs +ffffffff832f2088 d dcn316_bw_params +ffffffff832f3000 d dcn32_funcs +ffffffff832f4000 d dcn10_dpp_cap +ffffffff832f5000 D aperture_default_system +ffffffff832f6000 d dcn20_dpp_cap +ffffffff832f6010 d dcn20_dpp_funcs +ffffffff832f7000 d dcn20_hubp_funcs +ffffffff832f8000 d dcn20_opp_funcs +ffffffff832f9000 d dcn20_tg_funcs +ffffffff832fa000 d dcn201_dpp_funcs +ffffffff832fa110 d dcn201_dpp_cap +ffffffff832fb000 d dcn201_hubp_funcs +ffffffff832fc000 d dcn201_opp_funcs +ffffffff832fd000 d dcn201_tg_funcs +ffffffff832fe000 D dcn201_ip +ffffffff832fe1b8 D dcn201_soc +ffffffff832feb88 d dcn201_res_pool_funcs +ffffffff832ff000 d dcn21_hubp_funcs +ffffffff83300000 d dcn30_afmt_funcs +ffffffff83301000 d dcn30_dpp_cap +ffffffff83301010 d dcn30_dpp_funcs +ffffffff83302000 d dcn30_hubp_funcs +ffffffff83303000 d dcn30_tg_funcs +ffffffff83304000 d dcn30_vpg_funcs +ffffffff83305000 d res_cap_dcn301 +ffffffff83305040 d dcn301_res_pool_funcs +ffffffff83306000 d dcn302_res_pool_funcs +ffffffff83307000 d dcn303_res_pool_funcs +ffffffff83308000 d dcn31_afmt_funcs +ffffffff83309000 d dcn31_apg_funcs +ffffffff8330a000 d dcn31_hpo_dp_link_encoder_funcs +ffffffff8330b000 d dcn31_hubp_funcs +ffffffff8330c000 d dcn31_tg_funcs +ffffffff8330d000 d dcn31_res_pool_funcs +ffffffff8330e000 d dcn31_vpg_funcs +ffffffff8330f000 d dcn314_tg_funcs +ffffffff83310000 d dcn314_res_pool_funcs +ffffffff83311000 d dcn315_res_pool_funcs +ffffffff83312000 d dcn316_res_pool_funcs +ffffffff83313000 d dcn32_dpp_funcs +ffffffff83313110 d dcn32_dpp_cap +ffffffff83314000 d dcn32_hpo_dp_link_encoder_funcs +ffffffff83315000 d dcn32_hubp_funcs +ffffffff83316000 d dcn32_tg_funcs +ffffffff83317000 d dcn32_res_pool_funcs +ffffffff83318000 d dcn321_res_pool_funcs +ffffffff83319000 D dcn1_0_ip +ffffffff833191b8 D dcn1_0_soc +ffffffff8331a000 D dcn2_0_ip +ffffffff8331a1b8 D dcn2_0_nv14_ip +ffffffff8331a370 D dcn2_0_soc +ffffffff8331ad40 D dcn2_0_nv14_soc +ffffffff8331b710 D dcn2_1_ip +ffffffff8331b8c8 D dcn2_1_soc +ffffffff8331c298 D ddr4_wm_table_gs +ffffffff8331c358 D lpddr4_wm_table_gs +ffffffff8331c418 D lpddr4_wm_table_with_disabled_ppt +ffffffff8331c4d8 D ddr4_wm_table_rn +ffffffff8331c598 D ddr4_1R_wm_table_rn +ffffffff8331c658 D lpddr4_wm_table_rn +ffffffff8331d000 D dcn3_0_ip +ffffffff8331d1b8 D dcn3_0_soc +ffffffff8331e000 D dcn3_01_ip +ffffffff8331e1b8 D dcn3_01_soc +ffffffff8331eb88 D ddr4_wm_table +ffffffff8331ec48 D lpddr5_wm_table +ffffffff8331f000 D dcn3_02_ip +ffffffff8331f1b8 D dcn3_02_soc +ffffffff83320000 D dcn3_03_ip +ffffffff833201b8 D dcn3_03_soc +ffffffff83321000 D dcn3_1_ip +ffffffff833211b8 D dcn3_15_ip +ffffffff83321370 D dcn3_16_ip +ffffffff83321528 d dcn3_15_soc +ffffffff83321ef8 d dcn3_1_soc +ffffffff833228c8 d dcn3_16_soc +ffffffff83324000 D dcn3_14_ip +ffffffff833241b8 D dcn3_14_soc +ffffffff83325000 D dcn3_2_ip +ffffffff833251b8 D dcn3_2_soc +ffffffff83326000 D dcn3_21_ip +ffffffff833261b8 D dcn3_21_soc +ffffffff83327000 d dsc_policy_max_target_bpp_limit +ffffffff83328000 D DIDTEDCConfig_P12 +ffffffff83328070 d smu7_profiling +ffffffff83329000 d cyan_skillfish_table_map +ffffffff83329080 d cyan_skillfish_message_map +ffffffff8332a000 d navi10_table_map +ffffffff8332a080 d navi10_pwr_src_map +ffffffff8332a090 d navi10_workload_map +ffffffff8332a0d0 d navi10_message_map +ffffffff8332ab20 d navi10_clk_map +ffffffff8332abe0 d navi10_feature_mask_map +ffffffff8332b000 d sienna_cichlid_message_map +ffffffff8332ba50 d sienna_cichlid_table_map +ffffffff8332bad0 d sienna_cichlid_pwr_src_map +ffffffff8332bae0 d sienna_cichlid_workload_map +ffffffff8332bb20 d sienna_cichlid_clk_map +ffffffff8332bbe0 d sienna_cichlid_feature_mask_map +ffffffff8332c000 d vangogh_message_map +ffffffff8332ca50 d vangogh_table_map +ffffffff8332cad0 d vangogh_workload_map +ffffffff8332cb10 d vangogh_feature_mask_map +ffffffff8332d000 d renoir_table_map +ffffffff8332d080 d renoir_workload_map +ffffffff8332d0c0 d renoir_message_map +ffffffff8332db10 d renoir_clk_map +ffffffff8332e000 d smu_v13_0_0_message_map +ffffffff8332ea50 d smu_v13_0_0_feature_mask_map +ffffffff8332ee20 d smu_v13_0_0_table_map +ffffffff8332eea0 d smu_v13_0_0_pwr_src_map +ffffffff8332eeb0 d smu_v13_0_0_workload_map +ffffffff8332eef0 d smu_v13_0_0_clk_map +ffffffff8332f000 d smu_v13_0_4_message_map +ffffffff8332fa50 d smu_v13_0_4_table_map +ffffffff8332fad0 d smu_v13_0_4_feature_mask_map +ffffffff83330000 d smu_v13_0_5_table_map +ffffffff83330080 d smu_v13_0_5_message_map +ffffffff83330ad0 d smu_v13_0_5_feature_mask_map +ffffffff83331000 d smu_v13_0_7_message_map +ffffffff83331a50 d smu_v13_0_7_feature_mask_map +ffffffff83331e20 d smu_v13_0_7_table_map +ffffffff83331ea0 d smu_v13_0_7_pwr_src_map +ffffffff83331eb0 d smu_v13_0_7_workload_map +ffffffff83331ef0 d smu_v13_0_7_clk_map +ffffffff83332000 d yellow_carp_table_map +ffffffff83332080 d yellow_carp_message_map +ffffffff83332ad0 d yellow_carp_feature_mask_map +ffffffff83333000 D pci_conf_lock +ffffffff83333010 D pci_bus_dma_tag +ffffffff83333088 D msi_pic +ffffffff83333118 D msix_pic +ffffffff83334000 D pchb_cd +ffffffff83335000 D amas_cd +ffffffff83336000 D cardslot_cd +ffffffff83337000 D cardbus_cd +ffffffff83338000 d csdevs +ffffffff83339000 d ral_rt2560_opns +ffffffff83339028 d ral_rt2661_opns +ffffffff83339050 d ral_rt2860_opns +ffffffff8333a000 D pcmcia_cd +ffffffff8333b000 D pcmcia_3cxem556_func0 +ffffffff8333b0b8 D pcmcia_3cxem556_func0_cfe0 +ffffffff8333b158 D pcmcia_megahertz_xjem1144_func0 +ffffffff8333b210 D pcmcia_megahertz_xjem1144_func0_cfe0 +ffffffff8333b2b0 d pcmcia_3cxem556_func1 +ffffffff8333b368 d pcmcia_3cxem556_func1_cfe0 +ffffffff8333b408 d pcmcia_megahertz_xjem1144_func1 +ffffffff8333b4c0 d pcmcia_megahertz_xjem1144_func1_cfe0 +ffffffff8333b560 d pcmcia_sierra_a555_func1 +ffffffff8333b618 d pcmcia_sierra_a555_func1_cfe0 +ffffffff8333b6b8 d pcmcia_sveclancard_func0 +ffffffff8333b770 d pcmcia_sveclancard_func0_cfe0 +ffffffff8333c000 D ep_pcmcia_prod +ffffffff8333d000 D aic_pcmcia_prod +ffffffff8333e000 D com_pcmcia_prod +ffffffff8333f000 D wdc_pcmcia_pr +ffffffff83340000 D sm_pcmcia_prod +ffffffff83341000 D xe_cd +ffffffff83342000 D pcib_cd +ffffffff83343000 D amdpcib_cd +ffffffff83344000 D tcpcib_cd +ffffffff83345000 D aapic_cd +ffffffff83346000 D hme_cd +ffffffff83347000 D isa_cd +ffffffff83348000 D isadma_cd +ffffffff83349000 D fdc_cd +ffffffff8334a000 D fd_types +ffffffff8334a1f8 D fd_cd +ffffffff8334b000 D mpu_cd +ffffffff8334c000 D pcppi_cd +ffffffff8334d000 D spkr_cd +ffffffff8334e000 D wbsio_cd +ffffffff8334f000 D schsio_cd +ffffffff83350000 D it_cd +ffffffff83351000 D uguru_cd +ffffffff83352000 D aps_cd +ffffffff83353000 D isa_bus_dma_tag +ffffffff83354000 D wsdisplay_cd +ffffffff83354020 D wsdisplay_cons +ffffffff83354058 D wsdisplay_defaultscreens +ffffffff83355000 D wskbd_cd +ffffffff83355020 D wskbd_default_bell_data +ffffffff83355030 D wskbd_default_keyrepeat_data +ffffffff83355040 D wskbd_srcops +ffffffff83356000 d compose_tab +ffffffff83357000 D wsmouse_cd +ffffffff83357020 D wsmouse_srcops +ffffffff83358000 D wsmux_srcops +ffffffff83358030 D wsmux_tree_lock +ffffffff83359000 D vt100_output +ffffffff8335a000 D pckbd_cd +ffffffff8335b000 D pms_cd +ffffffff8335b020 d synaptics_params +ffffffff8335b030 d alps_params +ffffffff8335c000 D skgpio_cd +ffffffff8335d000 D pctr_conf_lock +ffffffff8335e000 D ukbd_keymapdata +ffffffff8335f000 D usbrev_str +ffffffff8335f030 D usb_cd +ffffffff83360000 d usbd_ratecheck.errinterval +ffffffff83361000 D uhub_cd +ffffffff83362000 D uaudio_cd +ffffffff83363000 D uvideo_ctrls +ffffffff833632d8 D uvideo_cd +ffffffff83364000 D utvfu_norm_params +ffffffff83364030 D utvfu_cd +ffffffff83365000 D udl_reg_vals_640x480_60 +ffffffff83365020 D udl_reg_vals_640x480_67 +ffffffff83365040 D udl_reg_vals_640x480_72 +ffffffff83365060 D udl_reg_vals_640x480_75 +ffffffff83365080 D udl_reg_vals_800x480_61 +ffffffff833650a0 D udl_reg_vals_800x600_56 +ffffffff833650c0 D udl_reg_vals_800x600_60 +ffffffff833650e0 D udl_reg_vals_800x600_72 +ffffffff83365100 D udl_reg_vals_800x600_74 +ffffffff83365120 D udl_reg_vals_800x600_75 +ffffffff83365140 D udl_reg_vals_1024x768_60 +ffffffff83365160 D udl_reg_vals_1024x768_70 +ffffffff83365180 D udl_reg_vals_1024x768_75 +ffffffff833651a0 D udl_reg_vals_1280x800_60 +ffffffff833651c0 D udl_reg_vals_1280x960_60 +ffffffff833651e0 D udl_reg_vals_1280x1024_60 +ffffffff83365200 D udl_reg_vals_1280x1024_75 +ffffffff83365220 D udl_reg_vals_1366x768_60 +ffffffff83365240 D udl_reg_vals_1440x900_60 +ffffffff83365260 D udl_reg_vals_1440x900_59 +ffffffff83365280 D udl_reg_vals_1440x900_75 +ffffffff833652a0 D udl_reg_vals_1680x1050_60 +ffffffff833652c0 D udl_reg_vals_1600x1200_60 +ffffffff833652e0 D udl_reg_vals_1920x1080_60 +ffffffff83365300 D udl_null_key_1 +ffffffff83365310 D udl_decomp_table +ffffffff83366510 D udl_cd +ffffffff83366530 D udl_stdscreen +ffffffff83366560 D udl_scrlist +ffffffff83366568 D udl_screenlist +ffffffff83366578 D udl_accessops +ffffffff83367000 D umidi_cd +ffffffff83368000 d umq_YAMAHA_YAMAHA_UX256_ANYIFACE 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umq_ROLAND_ROLAND_UM1_2_fixed_ep_desc +ffffffff833684f0 d umq_ROLAND_ROLAND_UM1_2_fixed_ep_endpoints +ffffffff83368500 d umq_ROLAND_ROLAND_SC8850_2_fixed_ep_desc +ffffffff83368520 d umq_ROLAND_ROLAND_SC8850_2_fixed_ep_endpoints +ffffffff83368530 d umq_ROLAND_ROLAND_SD90_2_fixed_ep_desc +ffffffff83368550 d umq_ROLAND_ROLAND_SD90_2_fixed_ep_endpoints +ffffffff83368560 d umq_ROLAND_ROLAND_UM880N_0_fixed_ep_desc +ffffffff83368580 d umq_ROLAND_ROLAND_UM880N_0_fixed_ep_endpoints +ffffffff83368590 d umq_ROLAND_ROLAND_UA100_2_fixed_ep_desc +ffffffff833685b0 d umq_ROLAND_ROLAND_UA100_2_fixed_ep_endpoints +ffffffff833685c0 d umq_ROLAND_ROLAND_UM4_2_fixed_ep_desc +ffffffff833685e0 d umq_ROLAND_ROLAND_UM4_2_fixed_ep_endpoints +ffffffff833685f0 d umq_ROLAND_ROLAND_U8_2_fixed_ep_desc +ffffffff83368610 d umq_ROLAND_ROLAND_U8_2_fixed_ep_endpoints +ffffffff83368620 d umq_ROLAND_ROLAND_UM2_2_fixed_ep_desc +ffffffff83368640 d umq_ROLAND_ROLAND_UM2_2_fixed_ep_endpoints +ffffffff83368650 d umq_ROLAND_ROLAND_SC8820_2_fixed_ep_desc +ffffffff83368670 d umq_ROLAND_ROLAND_SC8820_2_fixed_ep_endpoints +ffffffff83368680 d umq_ROLAND_ROLAND_PC300_2_fixed_ep_desc +ffffffff833686a0 d umq_ROLAND_ROLAND_PC300_2_fixed_ep_endpoints +ffffffff833686b0 d umq_ROLAND_ROLAND_SK500_2_fixed_ep_desc +ffffffff833686d0 d umq_ROLAND_ROLAND_SK500_2_fixed_ep_endpoints +ffffffff833686e0 d umq_ROLAND_ROLAND_SCD70_2_fixed_ep_desc +ffffffff83368700 d umq_ROLAND_ROLAND_SCD70_2_fixed_ep_endpoints +ffffffff83368710 d umq_ROLAND_ROLAND_UM550_0_fixed_ep_desc +ffffffff83368730 d umq_ROLAND_ROLAND_UM550_0_fixed_ep_endpoints +ffffffff83368740 d umq_ROLAND_ROLAND_SD20_0_fixed_ep_desc +ffffffff83368760 d umq_ROLAND_ROLAND_SD20_0_fixed_ep_endpoints +ffffffff83368770 d umq_ROLAND_ROLAND_SD80_0_fixed_ep_desc +ffffffff83368790 d umq_ROLAND_ROLAND_SD80_0_fixed_ep_endpoints +ffffffff833687a0 d umq_ROLAND_ROLAND_UA700_3_fixed_ep_desc +ffffffff833687c0 d umq_ROLAND_ROLAND_UA700_3_fixed_ep_endpoints +ffffffff833687d0 d umq_ROLAND_ROLAND_UMONE_ANYIFACE_fixed_ep_desc +ffffffff833687f0 d umq_ROLAND_ROLAND_UMONE_ANYIFACE_fixed_ep_endpoints +ffffffff83369000 D ucom_cd +ffffffff83369020 D sysctl_ucomlock +ffffffff8336a000 D ugen_cd +ffffffff8336b000 D uhidev_cd +ffffffff8336b020 d uhidev_use_rdesc.reportbuf +ffffffff8336c000 D uhid_cd +ffffffff8336d000 D fido_cd +ffffffff8336e000 D ujoy_cd +ffffffff8336f000 D ukbd_cd +ffffffff83370000 D ums_cd +ffffffff83370020 d ums_fix_elecom_descriptor.match +ffffffff83371000 D umt_cd +ffffffff83372000 D def_scale +ffffffff83372020 D uts_cd +ffffffff83373000 D ubcmtp_cd +ffffffff83373020 d ubcmtp_wsmousecfg +ffffffff83374000 D ucycom_cd +ffffffff83375000 D uslhcom_cd +ffffffff83376000 D ulpt_fwdevs +ffffffff83376060 D ulpt_cd +ffffffff83376080 D ulptusein +ffffffff83377000 D umass_cd +ffffffff83377020 d umass_bbb_transfer.dCBWtag +ffffffff83378000 D uthum_cd +ffffffff83379000 D ugold_cd +ffffffff83379020 d cmd_init +ffffffff83379028 d cmd_type +ffffffff83379030 d cmd_data +ffffffff8337a000 D utrh_cd +ffffffff8337b000 D uoakrh_cd +ffffffff8337c000 D uoaklux_cd +ffffffff8337d000 D uoakv_cd +ffffffff8337e000 D uonerng_cd +ffffffff8337f000 D urng_cd +ffffffff83380000 D udcf_cd +ffffffff83381000 D umbg_cd +ffffffff83382000 D uvisor_cd +ffffffff83383000 D udsbr_cd +ffffffff83384000 D utwitch_cd +ffffffff83385000 D aue_cd +ffffffff83386000 D axe_cd +ffffffff83387000 D axen_cd +ffffffff83388000 D smsc_cd +ffffffff83389000 D cue_devs +ffffffff83389010 D cue_cd +ffffffff8338a000 D kue_cd +ffffffff8338b000 D cdce_cd +ffffffff8338c000 D urndis_cd +ffffffff8338d000 D mos_cd +ffffffff8338e000 D mue_cd +ffffffff8338f000 D udav_cd +ffffffff83390000 D upl_devs +ffffffff83390008 D upl_cd +ffffffff83391000 D ugl_devs +ffffffff83391008 D ugl_cd +ffffffff83392000 D url_cd +ffffffff83393000 D ure_cd +ffffffff83394000 D uaq_cd +ffffffff83395000 D umodem_cd +ffffffff83396000 D uftdi_cd +ffffffff83397000 D uplcom_cd +ffffffff83398000 D umct_cd +ffffffff83399000 D uvscom_cd +ffffffff8339a000 D ubsa_cd +ffffffff8339b000 D ukspan_cd +ffffffff8339c000 D uslcom_cd +ffffffff8339d000 D uark_cd +ffffffff8339e000 D moscom_cd +ffffffff8339f000 D umcs_cd +ffffffff833a0000 D uscom_cd +ffffffff833a1000 D ucrcom_cd +ffffffff833a2000 D uxrcom_cd +ffffffff833a3000 D uipaq_cd +ffffffff833a4000 D umsm_cd +ffffffff833a5000 D uchcom_cd +ffffffff833a6000 D uticom_cd +ffffffff833a7000 D wi_func_usb +ffffffff833a7060 D wi_usb_cd +ffffffff833a8000 D atu_cd +ffffffff833a8020 D atu_devs +ffffffff833a8270 D atu_radfirm +ffffffff833a9000 D ural_cd +ffffffff833aa000 D rum_cd +ffffffff833ab000 D run_cd +ffffffff833ab020 D rt3070_freqs +ffffffff833ac000 D mtw_cd +ffffffff833ad000 D zyd_cd +ffffffff833ae000 D upgt_cd +ffffffff833af000 D urtw_cd +ffffffff833b0000 D urtwn_cd +ffffffff833b1000 D rsu_cd +ffffffff833b2000 D otus_cd +ffffffff833b2020 d AR_PLCP_HDR_INTR +ffffffff833b3000 D umb_xfer_tout +ffffffff833b3010 D umb_uuid_basic_connect +ffffffff833b3020 D umb_uuid_context_internet +ffffffff833b3030 D umb_uuid_qmi_mbim +ffffffff833b3040 D umb_cd +ffffffff833b3060 D umb_delay +ffffffff833b3070 D umb_qmi_alloc_cid +ffffffff833b3080 D umb_qmi_fcc_auth +ffffffff833b4000 D uath_cd +ffffffff833b5000 D uow_cd +ffffffff833b6000 D uberry_cd +ffffffff833b7000 D upd_cd +ffffffff833b7020 d upd_usage_roots +ffffffff833b70a0 d upd_usage_batdep +ffffffff833b8000 D uwacom_cd +ffffffff833b8020 d uwacom_attach.wacom_report_buf +ffffffff833b9000 D bwfm_usb_bus_ops +ffffffff833ba000 D umstc_cd +ffffffff833bb000 D uhidpp_cd +ffffffff833bc000 D ucc_cd +ffffffff833bd000 D iic_cd +ffffffff833be000 D probe_addrs_sensor +ffffffff833be008 D probe_addrs_eeprom +ffffffff833bf000 D lmtemp_cd +ffffffff833c0000 D lmn_worklist +ffffffff833c0240 D lmn_cd +ffffffff833c1000 D lmenv_cd +ffffffff833c2000 D maxtmp_cd +ffffffff833c3000 D adc_cd +ffffffff833c4000 D admtemp_cd +ffffffff833c5000 D admlc_cd +ffffffff833c6000 D admtm_cd +ffffffff833c7000 D admtmp_cd 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pchgpio_devices +ffffffff833fb000 D tipmic_cd +ffffffff833fb020 D tipmic_thermal_regmap +ffffffff833fb030 D tipmic_power_regmap +ffffffff833fc000 D ccpmic_cd +ffffffff833fc020 D ccpmic_thermal_regmap +ffffffff833fc023 D ccpmic_power_regmap +ffffffff833fd000 D com_hids +ffffffff833fe000 D sdhc_hids +ffffffff833ff000 D dwiic_hids +ffffffff833ff050 D ihidev_hids +ffffffff833ff070 D ietp_hids +ffffffff833ff220 D iatp_hids +ffffffff833ff240 d dwiic_acpi_found_ihidev.i2c_hid_guid +ffffffff83400000 D acpicbkbd_cd +ffffffff83400020 D acpicbkbd_hids +ffffffff83401000 D acpials_cd +ffffffff83401020 D acpials_hids +ffffffff83402000 D tpm_cd +ffffffff83402020 D tpm_hids +ffffffff83403000 D acpihve_cd +ffffffff83404000 D acpisbs_cd +ffffffff83404020 D acpisbs_hids +ffffffff83405000 D acpisurface_cd +ffffffff83405020 D acpisurface_hids +ffffffff83406000 D ipmi_acpi_hids +ffffffff83407000 D amdgpio_cd +ffffffff83407020 D amdgpio_hids +ffffffff83408000 D acpihid_cd +ffffffff83408020 D acpihid_hids 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pv_size +ffffffff83416420 D pv +ffffffff83416640 d loc +ffffffff83416ad0 D cfdata +ffffffff8341d638 D cfroots +ffffffff8341d644 D cfroots_size +ffffffff8341d650 D pdevnames +ffffffff8341d7b8 D pdevnames_size +ffffffff8341d7c0 D pdevinit +ffffffff8341e000 D rootdev +ffffffff8341e004 D dumpdev +ffffffff8341e010 D swdevt +ffffffff8341f000 A __kudata_start +ffffffff8341f000 D tlb_shoot_first_pcid +ffffffff8341f008 D tlb_shoot_addr1 +ffffffff8341f010 D tlb_shoot_addr2 +ffffffff8341f018 D tlb_shoot_wait +ffffffff83420000 A __kudata_end +ffffffff83420000 C _edata +ffffffff83420000 b drm_minors_idr +ffffffff83420008 B drm_refcnt +ffffffff83421000 B vga_console_screen +ffffffff83421070 B vga_console_attached +ffffffff83421078 B vga_console_vc +ffffffff83421488 B vgaconsole +ffffffff8342148c B vga_console_type +ffffffff83422000 b wdc_alloc_queue.inited +ffffffff83422008 B wdc_xfer_pool +ffffffff834221b0 B wdc_xfer_iopool +ffffffff83423000 B aic_debug +ffffffff83424000 B gdt_cnt +ffffffff83424004 B gdt_polling +ffffffff83424005 B gdt_from_wait +ffffffff83424008 b gdt_exec_ccb.__level +ffffffff8342400c B gdt_wait_index +ffffffff83424010 B gdt_wait_gdt +ffffffff83425000 B sili_error_pmp_ports +ffffffff83426000 B ncr53c9x_debug +ffffffff83426008 b ecb_iopool +ffffffff83426048 b ecb_pool_initialized +ffffffff83426050 b ecb_pool +ffffffff834261f8 B sdebug +ffffffff83427000 B epic_copy_small +ffffffff83428000 B comconsaddr +ffffffff83428008 B comconsiot +ffffffff83428010 B comconsioh +ffffffff83428018 B comconsfreq +ffffffff8342801c B comcons_reg_width +ffffffff83428020 B commajor +ffffffff83428024 B comconsunit +ffffffff83428028 B comcons_reg_shift +ffffffff8342802c B comconsattached +ffffffff83429000 B pckbc_console +ffffffff83429004 B pckbc_console_attached +ffffffff83429008 B pckbc_consdata +ffffffff834290e0 b pckbc_cons_slotdata +ffffffff8342a000 b cy_poll.counter +ffffffff8342b000 B atw_xindiv2 +ffffffff8342c000 B rtw_rfprog_fallback +ffffffff8342c004 B rtw_do_chip_reset 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pf_nfrents +ffffffff8343d6c8 B pf_frnode_tree +ffffffff8343e000 B pf_anchors +ffffffff8343e008 B pf_main_anchor +ffffffff8343e510 B pf_anchor_pl +ffffffff8343f000 B pf_ioctl_trans +ffffffff8343f008 B pf_default_rule +ffffffff8343f548 B pf_tag_pl +ffffffff8343f6f0 B pf_default_rule_new +ffffffff8343fc30 B pf_anchor_stack +ffffffff8343fc38 B pf_trans_set +ffffffff8343fc60 B pf_tcount +ffffffff83441000 B pfr_ktable_pl +ffffffff834411b0 B pfr_kentry_pl +ffffffff834416a8 B pfr_kcounters_pl +ffffffff83441850 B pfr_ffaddr +ffffffff83441860 B pfr_nulltable +ffffffff83441c88 B pfr_ktables +ffffffff83441c90 B pfr_ktable_cnt +ffffffff83441c94 B pfr_mask +ffffffff83442000 B pf_osfp_list +ffffffff83442008 B pf_osfp_entry_pl +ffffffff834421b0 B pf_osfp_pl +ffffffff83443000 B pfi_all +ffffffff83443008 B pfi_addr_pl +ffffffff834431b0 B pfi_buffer_max +ffffffff834431b8 B pfi_buffer +ffffffff834431c0 B pfi_ifs +ffffffff834431c8 B pfi_buffer_cnt +ffffffff83444000 b pf_syncookie_status +ffffffff83445000 B hfsc_class_pl +ffffffff834451a8 B hfsc_internal_sc_pl +ffffffff83446000 B pflog_ifs +ffffffff83447000 b pfsynccounters +ffffffff83447008 b pfsyncif +ffffffff83447010 b pfsync_deferrals_pool +ffffffff83448000 B pflowif_list +ffffffff83448008 B pflowstats +ffffffff83449000 B bios +ffffffff8344a000 b opened +ffffffff8344a004 b evqueue_head +ffffffff8344a008 b evqueue_tail +ffffffff8344a00c b evqueue_count +ffffffff8344a010 b hotplug_klist +ffffffff8344a030 b evqueue +ffffffff8344b000 B pppoe_softc_list +ffffffff8344c000 B dt_tracing +ffffffff8344c008 B dtdev_list +ffffffff8344c010 B dt_probe_list +ffffffff8344c020 B dt_nprobes +ffffffff8344c024 B allowdt +ffffffff8344c028 b dt_dev_register_probe.probe_nb +ffffffff8344d000 B dtpp_profile +ffffffff8344d008 B dtpp_interval +ffffffff8344e000 B dtps_entry +ffffffff8344e008 B dtps_return +ffffffff8344f000 B dtps_index_refcnt +ffffffff83450000 B db_break_table +ffffffff83450c80 B db_free_breakpoints +ffffffff83450c88 B db_breakpoint_list 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pci_intr_string.irqstr +ffffffff8372a860 B pciio_ex +ffffffff8372a868 B pcimem_ex +ffffffff8372a870 B pcibus_ex +ffffffff8372b000 b ddb_vgapostp +ffffffff8372c000 B cardsloteventpool +ffffffff8372d000 B rbus_null +ffffffff8372e000 B pcmcia_verbose +ffffffff8372f000 B isa_mem_head +ffffffff8372f008 B isa_dev +ffffffff8372f010 B isadma_dmam +ffffffff83730000 b spkr_attached +ffffffff83730008 b ppicookie +ffffffff83730010 b spkr_active +ffffffff83730018 b spkr_inbuf +ffffffff83730020 b octave +ffffffff83730024 b whole +ffffffff83730028 b fill +ffffffff8373002c b value +ffffffff83730030 b octtrack +ffffffff83730034 b octprefix +ffffffff83731000 B it_softc_list +ffffffff83732000 B aps_timeout +ffffffff83733000 B intrtype +ffffffff83733040 B intrhand +ffffffff837330c0 B isa_dma_stats_loads +ffffffff837330c8 B isa_dma_stats_bounces +ffffffff837330d0 B isa_dma_stats_nbouncebufs +ffffffff837330e0 B intrlevel +ffffffff83734000 B wsdisplay_console_conf +ffffffff83734028 B wsdisplay_console_initted +ffffffff83734030 B wsdisplay_console_device +ffffffff83734038 B wsdisplay_clearonclose +ffffffff8373403c B wsdisplay_cons_pollmode +ffffffff83734040 B wsdisplay_cons_kbd_pollc +ffffffff83734048 B ws_get_param +ffffffff83734050 B ws_set_param +ffffffff83735000 b wskbd_console_data +ffffffff83735040 b wskbd_console_initted +ffffffff83735048 b wskbd_console_device +ffffffff83735050 B wskbd_get_backlight +ffffffff83735058 B wskbd_set_backlight +ffffffff83735060 b wskbd_cngetc.num +ffffffff83735064 b wskbd_cngetc.pos +ffffffff83736000 b compose_tab_inorder +ffffffff83737000 B nwsmux +ffffffff83737008 B wsmuxdevs +ffffffff83738000 B wsemul_vt100_console_emuldata +ffffffff83739000 B pckbd_consdata +ffffffff83739038 B pckbd_bell_fn +ffffffff83739040 B pckbd_bell_fn_arg +ffffffff8373a000 b wscninit.initted +ffffffff8373b000 B pctr_isamd +ffffffff8373b004 B pctr_isintel +ffffffff8373b008 B pctr_intel_cap +ffffffff8373b010 B pctr_fn +ffffffff8373c000 b nvram_initialized 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probe_ic +ffffffff83744008 b probe_addr +ffffffff83744010 b probe_val +ffffffff83744110 B skip_fc +ffffffff83744118 B ignore_addrs +ffffffff83744120 b iic_dump.iicvalcnt +ffffffff83745000 B acpi_softc +ffffffff83745008 B acpiwqpool +ffffffff837451b0 B acpi_enabled +ffffffff837451b4 b acpi_maptable.tblid +ffffffff837451b8 b acpi_add_device.nacpicpus +ffffffff837451bc B acpi_force_bm +ffffffff837451c0 B mouse_has_softbtn +ffffffff837451c4 B acpi_evindex +ffffffff837451c8 B acpi_poll_enabled +ffffffff837451cc B acpi_hasprocfvs +ffffffff837451d0 B acpi_haspci +ffffffff83746000 B aml_root +ffffffff83746060 B aml_lastscope +ffffffff83746068 B aml_ophash +ffffffff83746070 b aml_mnem.mnemstr +ffffffff83746090 B aml_notify_list +ffffffff83746098 B acpi_nalloc +ffffffff837460a0 b acpi_sleep.acpinowait +ffffffff837460b0 b aml_nodename.namebuf +ffffffff83746130 b aml_getname.namebuf +ffffffff837461b0 b aml_getname.p +ffffffff837461b8 b global_lock_count +ffffffff837461c0 b aml_eisaid.id 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b dwiic_i2c_intr_string.irqstr +ffffffff83793000 B acpihve_attached +ffffffff83794000 B efi_jmpbuf +ffffffff83795000 B vm_pool +ffffffff837951a8 B vcpu_pool +ffffffff83795350 B vmm_softc +ffffffff83796000 B l1tf_flush_region +ffffffff83797000 B sdmmc_verbose +ffffffff83798000 B utc_offset +ffffffff83798008 B bufpages +ffffffff83798010 B utsname +ffffffff83799000 B mountroot +ffffffff8379a000 B __kernel_bss_end ffffffff83800000 B _end ffffffff83800000 B end