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ieee80211_recv_eapol_key_req -ffffffff8141d370 T ieee80211_recv_4way_msg3 -ffffffff8141dd10 T ieee80211_recv_4way_msg2or4 -ffffffff8141de50 T ieee80211_recv_4way_msg1 -ffffffff8141e130 T ieee80211_recv_wpa_group_msg1 -ffffffff8141e460 T ieee80211_recv_rsn_group_msg1 -ffffffff8141e990 T ieee80211_recv_group_msg2 -ffffffff8141eae0 T ieee80211_recv_4way_msg2 -ffffffff8141ecf0 T ieee80211_must_update_group_key -ffffffff8141ed50 T ieee80211_recv_4way_msg4 -ffffffff8141f000 T ieee80211_send_eapol_key -ffffffff8141f220 T ieee80211_eapol_timeout -ffffffff8141f2a0 T ieee80211_send_4way_msg1 -ffffffff8141f560 T ieee80211_send_4way_msg3 -ffffffff8141faa0 T ieee80211_send_group_msg1 -ffffffff8141ffb0 T ieee80211_add_gtk_kde -ffffffff81420070 T ieee80211_add_pmkid_kde -ffffffff814200c0 T ieee80211_add_igtk_kde -ffffffff81420190 T ieee80211_get_eapol_key -ffffffff81420250 T ieee80211_send_4way_msg2 -ffffffff81420470 T ieee80211_send_4way_msg4 -ffffffff81420650 T ieee80211_send_group_msg2 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wg_timers_event_any_authenticated_packet_traversal +ffffffff813f8240 T wg_timers_event_handshake_initiated +ffffffff813f8290 T wg_timers_event_handshake_responded +ffffffff813f82d0 T wg_timers_event_handshake_complete +ffffffff813f8370 T wg_timers_event_session_derived +ffffffff813f83b0 T wg_timers_event_want_initiation +ffffffff813f8480 T wg_timers_run_send_initiation +ffffffff813f8540 T wg_timers_event_reset_handshake_last_sent +ffffffff813f8580 T wg_peer_send_buf +ffffffff813f86b0 T wg_send_response +ffffffff813f87f0 T wg_send_cookie +ffffffff813f88a0 T wg_queue_out +ffffffff813f8b00 T wg_handshake +ffffffff813f9260 T wg_index_get +ffffffff813f9300 T wg_handshake_worker +ffffffff813f9370 T wg_encap +ffffffff813f96b0 T wg_decap +ffffffff813f9b20 T wg_encap_worker +ffffffff813f9bd0 T wg_ring_dequeue +ffffffff813f9c40 T wg_decap_worker +ffffffff813f9cf0 T wg_queue_dequeue +ffffffff813f9e10 T wg_queue_in +ffffffff813f9fa0 T wg_queue_len +ffffffff813f9ff0 T wg_remote_get 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noise_remote_clear +ffffffff813fdfc0 T noise_remote_expire_current +ffffffff813fe020 T noise_remote_ready +ffffffff813fe120 T noise_remote_encrypt +ffffffff813fe2e0 T noise_remote_decrypt +ffffffff813ff000 T cookie_maker_init +ffffffff813ff110 T cookie_checker_init +ffffffff813ff250 t ratelimit_deinit +ffffffff813ff310 T cookie_checker_update +ffffffff813ff480 T cookie_checker_deinit +ffffffff813ff4b0 T cookie_checker_create_payload +ffffffff813ff580 t cookie_checker_make_cookie +ffffffff813ff710 T cookie_maker_consume_payload +ffffffff813ff7e0 T cookie_maker_mac +ffffffff813ff970 T cookie_checker_validate_macs +ffffffff813ffb40 t ratelimit_allow +ffffffff81400000 T parity +ffffffff81400050 T stoeplitz_random_seed +ffffffff814000c0 T stoeplitz_init +ffffffff81400250 T stoeplitz_cache_init +ffffffff81400360 T stoeplitz_hash_ip4 +ffffffff814003b0 T stoeplitz_hash_ip4port +ffffffff81400400 T stoeplitz_hash_ip6 +ffffffff81400460 T stoeplitz_hash_ip6port +ffffffff814004c0 T stoeplitz_hash_eaddr +ffffffff81400510 T stoeplitz_to_key +ffffffff81401000 T ieee80211_begin_bgscan +ffffffff814010d0 T ieee80211_bgscan_timeout +ffffffff814011a0 T ieee80211_channel_init +ffffffff81401390 T ieee80211_chan2ieee +ffffffff81401410 T ieee80211_ifattach +ffffffff814015b0 T ieee80211_setbasicrates +ffffffff81401680 T ieee80211_setmode +ffffffff81401930 T ieee80211_ifdetach +ffffffff814019b0 T ieee80211_mhz2ieee +ffffffff81401a50 T ieee80211_ieee2mhz +ffffffff81401ad0 T ieee80211_configure_ampdu_tx +ffffffff81401b30 T ieee80211_media_init +ffffffff81402500 T ieee80211_rate2media +ffffffff814028c0 T ieee80211_media_status +ffffffff81402ad0 T ieee80211_findrate +ffffffff81402b40 T ieee80211_media_change +ffffffff814030c0 T ieee80211_media2mcs +ffffffff81403130 T ieee80211_media2rate +ffffffff81403180 T ieee80211_mcs2media +ffffffff81403200 T ieee80211_watchdog +ffffffff81403320 T ieee80211_min_basic_rate +ffffffff81403420 T ieee80211_max_basic_rate +ffffffff814034f0 T ieee80211_next_mode +ffffffff814035f0 T ieee80211_chan2mode +ffffffff81403680 T ieee80211_rate2plcp +ffffffff81403780 T ieee80211_plcp2rate +ffffffff81404000 T ieee80211_amrr_node_init +ffffffff81404040 T ieee80211_amrr_choose +ffffffff81405000 T ieee80211_crypto_attach +ffffffff81405090 T ieee80211_set_key +ffffffff81405130 T ieee80211_delete_key +ffffffff814051a0 T ieee80211_crypto_detach +ffffffff81405260 T ieee80211_crypto_clear_groupkeys +ffffffff814053b0 T ieee80211_cipher_keylen +ffffffff81405410 T ieee80211_get_txkey +ffffffff81405490 T ieee80211_get_rxkey +ffffffff81405570 T ieee80211_encrypt +ffffffff814055f0 T ieee80211_decrypt +ffffffff81405760 T ieee80211_prf +ffffffff81405880 T ieee80211_kdf +ffffffff814059e0 T ieee80211_derive_ptk +ffffffff81405b50 T ieee80211_derive_pmkid +ffffffff81405c70 T ieee80211_eapol_key_mic +ffffffff81405da0 T ieee80211_eapol_key_check_mic +ffffffff81405e20 T ieee80211_eapol_key_encrypt +ffffffff81405fd0 T ieee80211_eapol_key_decrypt +ffffffff814060e0 T ieee80211_pmksa_add +ffffffff81406230 T ieee80211_pmksa_find +ffffffff81407000 T ieee80211_bip_set_key +ffffffff81407080 T ieee80211_bip_delete_key +ffffffff814070f0 T ieee80211_bip_encap +ffffffff814072f0 T ieee80211_bip_decap +ffffffff81408000 T ieee80211_ccmp_set_key +ffffffff81408080 T ieee80211_ccmp_delete_key +ffffffff814080f0 T ieee80211_ccmp_encrypt +ffffffff814085b0 t ieee80211_ccmp_phase1 +ffffffff81408940 T ieee80211_ccmp_get_pn +ffffffff81408a50 T ieee80211_ccmp_decrypt +ffffffff81409000 T ieee80211_tkip_set_key +ffffffff814090a0 T ieee80211_tkip_delete_key +ffffffff81409110 T ieee80211_tkip_mic +ffffffff81409290 T ieee80211_tkip_encrypt +ffffffff814096e0 t Phase1 +ffffffff81409870 t Phase2 +ffffffff81409b00 T ieee80211_tkip_get_tsc +ffffffff81409c10 T ieee80211_tkip_decrypt +ffffffff8140a110 T ieee80211_michael_mic_failure +ffffffff8140a2a0 T ieee80211_michael_mic_failure_timeout +ffffffff8140a2d0 t ieee80211_tkip_deauth +ffffffff8140b000 T ieee80211_wep_set_key +ffffffff8140b060 T ieee80211_wep_delete_key +ffffffff8140b0d0 T ieee80211_wep_encrypt +ffffffff8140b470 T ieee80211_wep_decrypt +ffffffff8140c000 T ieee80211_get_hdrlen +ffffffff8140c090 T ieee80211_input_hwdecrypt +ffffffff8140c260 T ieee80211_inputm +ffffffff8140cd60 T ieee80211_input_ba +ffffffff8140d050 T ieee80211_amsdu_decap +ffffffff8140d340 T ieee80211_decap +ffffffff8140d4c0 T ieee80211_recv_pspoll +ffffffff8140d5e0 T ieee80211_recv_bar +ffffffff8140d6d0 T ieee80211_input +ffffffff8140d740 T ieee80211_ba_move_window +ffffffff8140d890 T ieee80211_input_ba_seq +ffffffff8140da40 T ieee80211_input_ba_flush +ffffffff8140db70 T ieee80211_input_ba_gap_skip +ffffffff8140dc10 T ieee80211_input_ba_gap_timeout +ffffffff8140dd30 T ieee80211_enqueue_data +ffffffff8140df10 T ieee80211_amsdu_decap_validate +ffffffff8140dfd0 T ieee80211_parse_edca_params_body +ffffffff8140e120 T ieee80211_parse_edca_params +ffffffff8140e170 T ieee80211_parse_wmm_params +ffffffff8140e1c0 T ieee80211_parse_rsn_cipher +ffffffff8140e270 T ieee80211_parse_rsn_akm +ffffffff8140e320 T ieee80211_parse_rsn_body +ffffffff8140e5a0 T ieee80211_parse_rsn +ffffffff8140e5f0 T ieee80211_parse_wpa +ffffffff8140e650 T ieee80211_save_ie +ffffffff8140e700 T ieee80211_recv_probe_resp +ffffffff8140f4a0 T ieee80211_recv_probe_req +ffffffff8140f760 T ieee80211_recv_auth +ffffffff8140f800 T ieee80211_recv_assoc_req +ffffffff814101b0 T ieee80211_recv_assoc_resp +ffffffff81410710 T ieee80211_recv_deauth +ffffffff81410880 T ieee80211_recv_disassoc +ffffffff81410990 T ieee80211_recv_addba_req +ffffffff81410db0 T ieee80211_addba_req_refuse +ffffffff81410e50 T ieee80211_addba_req_accept +ffffffff81410ee0 T ieee80211_recv_addba_resp +ffffffff81411080 T ieee80211_addba_resp_refuse +ffffffff814110c0 T ieee80211_addba_resp_accept +ffffffff81411140 T ieee80211_recv_delba +ffffffff814112c0 T ieee80211_recv_sa_query_req +ffffffff81411330 T ieee80211_recv_sa_query_resp +ffffffff814113a0 T ieee80211_recv_action +ffffffff814114c0 T ieee80211_recv_mgmt +ffffffff81411620 T ieee80211_bar_tid +ffffffff81412000 T ieee80211_node2req +ffffffff81412370 T ieee80211_req2node +ffffffff81412480 T ieee80211_disable_wep +ffffffff81412590 T ieee80211_disable_rsn +ffffffff814125f0 T ieee80211_ioctl +ffffffff81414000 T ieee80211_inact_timeout +ffffffff814140a0 T ieee80211_node_cache_timeout +ffffffff814140e0 T ieee80211_clean_nodes +ffffffff81414400 T ieee80211_print_ess +ffffffff814145f0 T ieee80211_print_ess_list +ffffffff81414660 T ieee80211_get_ess +ffffffff814146f0 T ieee80211_del_ess +ffffffff81414850 T ieee80211_add_ess +ffffffff81414ed0 T ieee80211_ess_adjust_rssi +ffffffff81414f40 T ieee80211_ess_calculate_score +ffffffff814150a0 T ieee80211_ess_is_better +ffffffff814151f0 T ieee80211_match_ess +ffffffff814152e0 T ieee80211_switch_ess +ffffffff81415550 T ieee80211_set_ess +ffffffff81415820 T ieee80211_deselect_ess +ffffffff81415880 T ieee80211_node_attach +ffffffff81415a60 T ieee80211_node_alloc +ffffffff81415a80 T ieee80211_node_free +ffffffff81415b30 T ieee80211_node_copy +ffffffff81415ce0 T ieee80211_node_getrssi +ffffffff81415d10 T ieee80211_node_checkrssi +ffffffff81415da0 T ieee80211_set_tim +ffffffff81415e10 T ieee80211_alloc_node_helper +ffffffff81415e90 T ieee80211_node_lateattach +ffffffff81415f50 T ieee80211_node_detach +ffffffff814160d0 T ieee80211_free_allnodes +ffffffff814161f0 T ieee80211_reset_scan +ffffffff81416280 T ieee80211_node_raise_inact +ffffffff814162c0 T ieee80211_begin_scan +ffffffff81416470 T ieee80211_node_cleanup +ffffffff81416520 T ieee80211_iterate_nodes +ffffffff814165b0 T ieee80211_next_scan +ffffffff814166e0 T ieee80211_end_scan +ffffffff81416c40 T ieee80211_create_ibss +ffffffff81417110 T ieee80211_match_bss +ffffffff81417580 T ieee80211_node_free_unref_cb +ffffffff814175f0 T ieee80211_node_tx_stopped +ffffffff81417700 T ieee80211_node_switch_bss +ffffffff814179d0 T ieee80211_node_tx_flushed +ffffffff81417b50 T ieee80211_find_node +ffffffff81417bf0 T ieee80211_node_join_bss +ffffffff81417dd0 T ieee80211_choose_rsnparams +ffffffff81417f00 T ieee80211_node_choose_bss +ffffffff814180f0 T ieee80211_free_node +ffffffff814181f0 T ieee80211_node_cmp +ffffffff81418210 T ieee80211_clean_inactive_nodes +ffffffff814182d0 T ieee80211_get_rate +ffffffff81418330 T ieee80211_ba_del +ffffffff81418420 T ieee80211_node_set_timeouts +ffffffff81418520 T ieee80211_node_addba_request_ac_be_to +ffffffff81418540 T ieee80211_node_addba_request_ac_bk_to +ffffffff81418570 T ieee80211_node_addba_request_ac_vi_to +ffffffff814185a0 T ieee80211_node_addba_request_ac_vo_to +ffffffff814185d0 T ieee80211_setup_node +ffffffff81418760 T ieee80211_alloc_node +ffffffff81418800 T ieee80211_dup_bss +ffffffff814188d0 T ieee80211_find_txnode +ffffffff81418ae0 T ieee80211_find_rxnode +ffffffff81418df0 T ieee80211_node_tx_ba_clear +ffffffff81418e60 T ieee80211_release_node +ffffffff81418ef0 T ieee80211_clean_cached +ffffffff81418f80 T ieee80211_node_leave +ffffffff814191f0 T ieee80211_setup_htcaps +ffffffff814192a0 T ieee80211_clear_htcaps +ffffffff81419320 T ieee80211_setup_htop +ffffffff814193a0 T ieee80211_setup_vhtcaps +ffffffff81419420 T ieee80211_setup_vhtop +ffffffff81419480 T ieee80211_clear_vhtcaps +ffffffff814194d0 T ieee80211_setup_rates +ffffffff81419590 T ieee80211_node_trigger_addba_req +ffffffff814195f0 T ieee80211_node_addba_request +ffffffff81419620 T ieee80211_iserp_sta +ffffffff814197d0 T ieee80211_needs_auth +ffffffff81419800 T ieee80211_node_join_ht +ffffffff81419850 T ieee80211_node_join_rsn +ffffffff81419960 T ieee80211_count_longslotsta +ffffffff814199b0 T ieee80211_count_nonerpsta +ffffffff81419a10 T ieee80211_count_pssta +ffffffff81419a60 T ieee80211_count_rekeysta +ffffffff81419ab0 T ieee80211_node_join_11g +ffffffff81419c40 T ieee80211_node_join +ffffffff81419f40 T ieee80211_node_leave_ht +ffffffff8141a070 T ieee80211_node_leave_vht +ffffffff8141a0c0 T ieee80211_node_leave_rsn +ffffffff8141a200 T ieee80211_node_leave_11g +ffffffff8141a520 T ieee80211_node_leave_pwrsave +ffffffff8141a6e0 T ieee80211_ibss_merge +ffffffff8141a9e0 T ieee80211_notify_dtim +ffffffff8141aac0 T ieee80211_ess_cmp +ffffffff8141aae0 t ieee80211_tree_RBT_COMPARE +ffffffff8141ab00 t ieee80211_ess_tree_RBT_COMPARE +ffffffff8141b000 T ieee80211_output +ffffffff8141b0f0 T ieee80211_action_name +ffffffff8141b140 T ieee80211_mgmt_output +ffffffff8141b3a0 T ieee80211_pwrsave +ffffffff8141b4d0 T ieee80211_up_to_ac +ffffffff8141b590 T ieee80211_classify +ffffffff8141b680 T ieee80211_can_use_ampdu +ffffffff8141b6e0 T ieee80211_tx_compressed_bar +ffffffff8141b820 T ieee80211_get_compressed_bar +ffffffff8141b8f0 T ieee80211_encap +ffffffff8141bd60 T ieee80211_add_capinfo +ffffffff8141bdf0 T ieee80211_add_ssid +ffffffff8141be50 T ieee80211_add_rates +ffffffff8141bec0 T ieee80211_add_ds_params +ffffffff8141bf20 T ieee80211_add_tim +ffffffff8141c080 T ieee80211_add_ibss_params +ffffffff8141c0b0 T ieee80211_add_edca_params +ffffffff8141c230 T ieee80211_add_erp +ffffffff8141c2d0 T ieee80211_add_qos_capability +ffffffff8141c310 T ieee80211_add_wme_info +ffffffff8141c350 T ieee80211_add_wme_param +ffffffff8141c4e0 T ieee80211_add_rsn_body +ffffffff8141c7c0 T ieee80211_add_rsn +ffffffff8141c820 T ieee80211_add_wpa +ffffffff8141c890 T ieee80211_add_xrates +ffffffff8141c920 T ieee80211_add_htcaps +ffffffff8141c9f0 T ieee80211_add_htop +ffffffff8141cac0 T ieee80211_add_vhtcaps +ffffffff8141cb60 T ieee80211_add_tie +ffffffff8141cbb0 T ieee80211_getmgmt +ffffffff8141cc70 T ieee80211_get_probe_req +ffffffff8141d020 T ieee80211_get_probe_resp +ffffffff8141d580 T ieee80211_get_auth +ffffffff8141d610 T ieee80211_get_deauth +ffffffff8141d690 T ieee80211_get_assoc_req +ffffffff8141db90 T ieee80211_get_assoc_resp +ffffffff8141df50 T ieee80211_get_disassoc +ffffffff8141dfd0 T ieee80211_get_addba_req +ffffffff8141e0c0 T ieee80211_output_ba_move_window +ffffffff8141e1b0 T ieee80211_output_ba_move_window_to_first_unacked +ffffffff8141e340 T ieee80211_output_ba_record_ack +ffffffff8141e490 T ieee80211_get_addba_resp +ffffffff8141e590 T ieee80211_get_delba +ffffffff8141e630 T ieee80211_get_sa_query +ffffffff8141e6c0 T ieee80211_get_action +ffffffff8141e950 T ieee80211_send_mgmt +ffffffff8141ecf0 T ieee80211_get_rts +ffffffff8141ed80 T ieee80211_get_cts_to_self +ffffffff8141ee10 T ieee80211_beacon_alloc +ffffffff81420000 T ieee80211_eapol_key_input +ffffffff81420210 T ieee80211_recv_eapol_key_req +ffffffff81420370 T ieee80211_recv_4way_msg3 +ffffffff81420d10 T ieee80211_recv_4way_msg2or4 +ffffffff81420e50 T ieee80211_recv_4way_msg1 +ffffffff81421130 T ieee80211_recv_wpa_group_msg1 +ffffffff81421460 T ieee80211_recv_rsn_group_msg1 +ffffffff81421990 T ieee80211_recv_group_msg2 +ffffffff81421ae0 T ieee80211_recv_4way_msg2 +ffffffff81421cf0 T ieee80211_must_update_group_key +ffffffff81421d50 T ieee80211_recv_4way_msg4 +ffffffff81422000 T ieee80211_send_eapol_key +ffffffff81422220 T ieee80211_eapol_timeout +ffffffff814222a0 T ieee80211_send_4way_msg1 +ffffffff81422560 T ieee80211_send_4way_msg3 +ffffffff81422aa0 T ieee80211_send_group_msg1 +ffffffff81422fb0 T ieee80211_add_gtk_kde +ffffffff81423070 T ieee80211_add_pmkid_kde +ffffffff814230c0 T ieee80211_add_igtk_kde +ffffffff81423190 T ieee80211_get_eapol_key +ffffffff81423250 T ieee80211_send_4way_msg2 +ffffffff81423470 T ieee80211_send_4way_msg4 +ffffffff81423650 T ieee80211_send_group_msg2 +ffffffff81423830 T ieee80211_send_eapol_key_req +ffffffff81424000 T ieee80211_proto_attach +ffffffff814240b0 T ieee80211_newstate +ffffffff81424d80 T ieee80211_proto_detach +ffffffff81424dc0 T ieee80211_print_essid +ffffffff81424f40 T ieee80211_fix_rate +ffffffff81425380 T ieee80211_reset_erp +ffffffff814254a0 T ieee80211_set_shortslottime +ffffffff81425500 T ieee80211_keyrun +ffffffff81425670 T ieee80211_setkeys +ffffffff814258b0 t ieee80211_node_gtk_rekey +ffffffff81425910 T ieee80211_setkeysdone +ffffffff81425a10 T ieee80211_gtk_rekey_timeout +ffffffff81425a60 T ieee80211_sa_query_timeout +ffffffff81425b30 T ieee80211_sa_query_request +ffffffff81425bb0 T ieee80211_ht_negotiate +ffffffff81425d80 T ieee80211_vht_negotiate +ffffffff81425f90 T ieee80211_tx_ba_timeout +ffffffff814260b0 T ieee80211_delba_request +ffffffff81426230 T ieee80211_rx_ba_timeout +ffffffff814262c0 T ieee80211_addba_request +ffffffff81426490 T ieee80211_auth_open_confirm +ffffffff81426540 T ieee80211_try_another_bss +ffffffff81426650 T ieee80211_auth_open +ffffffff81426950 T ieee80211_set_beacon_miss_threshold +ffffffff814269e0 T ieee80211_stop_ampdu_tx +ffffffff81426af0 T ieee80211_check_wpa_supplicant_failure +ffffffff81426b70 T ieee80211_set_link_state +ffffffff81426c00 T ieee80211_rtm_80211info_task +ffffffff81427000 T ieee80211_ra_get_ht_rateset +ffffffff81427080 T ieee80211_ra_use_ht_sgi +ffffffff81427100 T ieee80211_ra_get_txrate +ffffffff81427190 T ieee80211_ra_next_lower_intra_rate +ffffffff81427330 T ieee80211_ra_next_intra_rate +ffffffff814274c0 T ieee80211_ra_next_rateset +ffffffff814276e0 T ieee80211_ra_best_mcs_in_rateset +ffffffff81427760 T ieee80211_ra_probe_next_rateset +ffffffff81427a20 T ieee80211_ra_next_mcs +ffffffff81427a70 T ieee80211_ra_probe_clear +ffffffff81427ab0 T ieee80211_ra_probe_done +ffffffff81427af0 T ieee80211_ra_intra_mode_ra_finished +ffffffff81427e60 T ieee80211_ra_trigger_next_rateset +ffffffff81427ed0 T ieee80211_ra_inter_mode_ra_finished +ffffffff81427f00 T ieee80211_ra_best_rate +ffffffff81427fa0 T ieee80211_ra_probe_next_rate +ffffffff81428040 T ieee80211_ra_valid_tx_mcs +ffffffff814280c0 T ieee80211_ra_valid_rates +ffffffff81428190 T ieee80211_ra_probe_valid +ffffffff814281e0 T ieee80211_ra_add_stats_ht +ffffffff81428480 T ieee80211_ra_choose +ffffffff814288c0 T ieee80211_ra_node_init +ffffffff81429000 T ieee80211_ra_vht_get_rateset +ffffffff814290a0 T ieee80211_ra_vht_use_sgi +ffffffff814291b0 T ieee80211_ra_vht_get_txrate +ffffffff81429250 T ieee80211_ra_vht_next_lower_intra_rate +ffffffff81429290 T ieee80211_ra_vht_get_max_mcs +ffffffff81429310 T ieee80211_ra_vht_next_intra_rate +ffffffff81429400 T ieee80211_ra_vht_next_rateset +ffffffff81429550 T ieee80211_ra_vht_best_mcs_in_rateset +ffffffff814295f0 T ieee80211_ra_vht_probe_next_rateset +ffffffff814298e0 T ieee80211_ra_vht_next_mcs +ffffffff81429970 T ieee80211_ra_vht_probe_clear +ffffffff814299a0 T ieee80211_ra_vht_probe_done +ffffffff814299f0 T ieee80211_ra_vht_intra_mode_ra_finished +ffffffff81429dc0 T ieee80211_ra_vht_trigger_next_rateset +ffffffff81429e30 T ieee80211_ra_vht_inter_mode_ra_finished +ffffffff81429e60 T ieee80211_ra_vht_best_rate +ffffffff8142a120 T ieee80211_ra_vht_probe_next_rate +ffffffff8142a1d0 T ieee80211_ra_vht_init_valid_rates +ffffffff8142a3d0 T ieee80211_ra_vht_probe_valid +ffffffff8142a420 T ieee80211_ra_vht_add_stats +ffffffff8142a710 T ieee80211_ra_vht_choose +ffffffff8142ab40 T ieee80211_ra_vht_node_init +ffffffff8142b000 T ieee80211_rssadapt_choose +ffffffff8142b0d0 T ieee80211_rssadapt_updatestats +ffffffff8142b150 T ieee80211_rssadapt_input +ffffffff8142b190 T ieee80211_rssadapt_lower_rate +ffffffff8142b210 T ieee80211_rssadapt_raise_rate +ffffffff8142c000 T bsearch +ffffffff8142c0b0 T ieee80211_regdomain_compare_cn +ffffffff8142c0d0 T ieee80211_regdomain_compare_rn +ffffffff8142c0f0 T ieee80211_name2countrycode +ffffffff8142c190 T ieee80211_name2regdomain +ffffffff8142c230 T ieee80211_countrycode2name +ffffffff8142c2c0 T ieee80211_regdomain2name +ffffffff8142c340 T ieee80211_regdomain2flag +ffffffff8142c400 T ieee80211_countrycode2regdomain +ffffffff8142d000 T arptimer +ffffffff8142d080 T arptfree +ffffffff8142d160 T arpinit +ffffffff8142d1d0 T arp_rtrequest +ffffffff8142d610 T arprequest +ffffffff8142d750 T arpinvalidate +ffffffff8142d7b0 T arpreply +ffffffff8142d890 T arpresolve +ffffffff8142de90 T arppullup +ffffffff8142df50 T arpinput +ffffffff8142dfb0 T arpintr +ffffffff8142e060 T in_arpinput +ffffffff8142e480 T arplookup +ffffffff8142e570 T arpcache +ffffffff8142e8f0 T arpproxy +ffffffff8142e9d0 T revarpinput +ffffffff8142ea20 T in_revarpinput +ffffffff8142eae0 T revarprequest +ffffffff8142ec20 T revarpwhoarewe +ffffffff8142ee10 T revarpwhoami +ffffffff8142f000 T igmp_init +ffffffff8142f090 T rti_fill +ffffffff8142f160 T rti_find +ffffffff8142f240 T rti_delete +ffffffff8142f2d0 T igmp_input +ffffffff8142f3a0 T igmp_input_if +ffffffff8142fbf0 T igmp_joingroup +ffffffff8142fd30 T igmp_sendpkt +ffffffff8142feb0 T igmp_leavegroup +ffffffff8142ff30 T igmp_fasttimo +ffffffff8142ffc0 T igmp_checktimer +ffffffff814300b0 T igmp_slowtimo +ffffffff81430110 T igmp_sysctl +ffffffff81430280 T igmp_sysctl_igmpstat +ffffffff81431000 T in_canforward +ffffffff81431060 T in_socktrim +ffffffff814310c0 T in_mask2len +ffffffff814311a0 T in_len2mask +ffffffff81431260 T in_nam2sin +ffffffff814312c0 T in_sa2sin +ffffffff81431300 T in_control +ffffffff81431340 T in_ioctl +ffffffff814316b0 T in_ioctl_get +ffffffff81431820 T in_ioctl_set_ifaddr +ffffffff81431a10 T in_ioctl_change_ifaddr +ffffffff81431e20 T in_scrubhost +ffffffff81431e50 T in_addhost +ffffffff81431e80 T in_ifscrub +ffffffff81431f20 T in_ifinit +ffffffff814321c0 T in_purgeaddr +ffffffff814322c0 T in_remove_prefix +ffffffff81432330 T in_insert_prefix +ffffffff814323b0 T in_addmulti +ffffffff81432560 T in_delmulti +ffffffff814326b0 T in_broadcast +ffffffff81432740 T in_hasmulti +ffffffff814327e0 T in_ifdetach +ffffffff81432870 T in_prefixlen2mask +ffffffff81433000 T in_init +ffffffff81433060 T in_pcbhash +ffffffff81433170 T in_pcblhash +ffffffff81433210 T in_pcbinit +ffffffff814332c0 T in_baddynamic +ffffffff81433330 T in_rootonly +ffffffff814333b0 T in_pcballoc +ffffffff81433530 T in_pcbresize +ffffffff814336f0 T in_pcbhash_insert +ffffffff814338b0 T in_pcbbind +ffffffff81433bb0 T in_pcbaddrisavail +ffffffff81433da0 T in_pcbpickport +ffffffff81433f90 T in_pcbrehash +ffffffff81434020 T in_pcblookup_local +ffffffff814342b0 T in_pcbunref +ffffffff814343a0 T in_pcbconnect +ffffffff81434610 T in_pcbselsrc +ffffffff81434840 T in_pcblookup +ffffffff81434960 T in_pcbdisconnect +ffffffff81434aa0 T in_pcbdetach +ffffffff81434bf0 T in_pcbref +ffffffff81434c40 T in_setsockaddr +ffffffff81434ca0 T in_setpeeraddr +ffffffff81434d10 T in_sockaddr +ffffffff81434d70 T in_peeraddr +ffffffff81434df0 T in_pcbnotifyall +ffffffff81434f60 T in_losing +ffffffff81434ff0 T in_rtchange +ffffffff81435040 T in_pcbrtentry +ffffffff81435190 T in_pcbhash_lookup +ffffffff81435300 T in_pcblookup_listen +ffffffff81436000 T inet_nat64_mask +ffffffff81436060 T inet_nat64 +ffffffff814361f0 T inet_nat64_inet +ffffffff814362b0 T inet_nat64_inet6 +ffffffff81436380 T inet_nat46 +ffffffff81436430 T inet_nat46_inet +ffffffff81436490 T inet_nat46_inet6 +ffffffff81437000 T inet_ntop +ffffffff814370d0 t inet_ntop6 +ffffffff814375c0 T sockaddr_ntop +ffffffff81438000 T divert_attach +ffffffff81438090 T divert_detach +ffffffff814380e0 T divert_lock +ffffffff81438140 T divert_unlock +ffffffff814381a0 T divert_bind +ffffffff814381e0 T divert_shutdown +ffffffff81438220 T divert_send +ffffffff81438260 T divert_init +ffffffff814382b0 T divert_output +ffffffff81438550 T divert_packet +ffffffff814387e0 T divert_sysctl_divstat +ffffffff814388c0 T divert_sysctl +ffffffff81439000 T icmp_init +ffffffff81439080 T icmp_mtudisc_timeout +ffffffff81439180 T icmp_do_error +ffffffff81439500 T icmp_ratelimit +ffffffff81439560 T icmp_error +ffffffff814395e0 T icmp_reflect +ffffffff81439930 T icmp_send +ffffffff81439a10 T icmp_input +ffffffff81439ab0 T icmp_input_if +ffffffff8143a400 T iptime +ffffffff8143a4a0 T icmp_sysctl +ffffffff8143a650 T icmp_sysctl_icmpstat +ffffffff8143a750 T icmp_mtudisc_clone +ffffffff8143a900 T icmp_mtudisc +ffffffff8143aad0 T icmp_do_exthdr +ffffffff8143b000 T ip_randomid +ffffffff8143c000 T ip_init +ffffffff8143c280 T ip_ours +ffffffff8143c300 T ip_fragcheck +ffffffff8143c640 T ipintr +ffffffff8143c6f0 T ip_deliver +ffffffff8143ca50 T ipv4_input +ffffffff8143cad0 T ip_input_if +ffffffff8143cf80 T ipv4_check +ffffffff8143d290 T ip_dooptions +ffffffff8143d880 T in_ouraddr +ffffffff8143dbd0 T ip_forward +ffffffff8143e080 T ip_flush +ffffffff8143e190 T ip_reass +ffffffff8143e740 T ip_freef +ffffffff8143e840 T ip_slowtimo +ffffffff8143e8d0 T save_rte +ffffffff8143e9b0 T ip_srcroute +ffffffff8143eb10 T ip_stripoptions +ffffffff8143ebb0 T ip_sysctl +ffffffff8143ef00 T ip_sysctl_ipstat +ffffffff8143f170 T ip_savecontrol +ffffffff8143f3a0 T ip_send_do_dispatch +ffffffff8143f480 T ip_send +ffffffff8143f4b0 T ip_send_raw +ffffffff8143f4e0 t ip_send_dispatch +ffffffff8143f500 t ip_sendraw_dispatch +ffffffff81440000 T mfc_find +ffffffff814400d0 T ip_mrouter_set +ffffffff81440240 T ip_mrouter_init +ffffffff814402c0 T ip_mrouter_done +ffffffff814404e0 T add_vif +ffffffff814406e0 T del_vif +ffffffff81440840 T add_mfc +ffffffff814409f0 T del_mfc +ffffffff81440b70 T set_api_config +ffffffff81440c10 T ip_mrouter_get +ffffffff81440cc0 T get_version +ffffffff81440d00 T get_api_support +ffffffff81440d50 T get_api_config +ffffffff81440da0 T mrt_ioctl +ffffffff81440ef0 T get_vif_cnt +ffffffff81440f80 T get_sg_cnt +ffffffff814410a0 T if_lookupbyvif +ffffffff81441100 T mrt_sysctl_vif +ffffffff81441270 T mrt_rtwalk_mfcsysctl +ffffffff814413b0 T mrt_sysctl_mfc +ffffffff814414d0 T mrouter_rtwalk_delete +ffffffff81441510 T mrt_mcast_del +ffffffff814415a0 T vif_delete +ffffffff81441660 T mfc_expire_route +ffffffff81441740 T mfc_add_route +ffffffff814418c0 T rt_mcast_add +ffffffff814419f0 T update_mfc_params +ffffffff81441d20 T mfc_add +ffffffff81441e30 T socket_send +ffffffff81441eb0 T ip_mforward +ffffffff814421e0 T ip_mdq +ffffffff81443000 T ip_output +ffffffff81443a40 T ip_insertoptions +ffffffff81443bf0 T ip_output_ipsec_lookup +ffffffff81443d50 T in_proto_cksum_out +ffffffff81443fe0 T ip_mloopback +ffffffff814440c0 T ip_output_ipsec_send +ffffffff814443d0 T ip_fragment +ffffffff81444820 T ip_output_ipsec_pmtu_update +ffffffff81444920 T ip_optcopy +ffffffff81444a50 T in_hdr_cksum_out +ffffffff81444b30 T ip_ctloutput +ffffffff814453e0 T ip_pcbopts +ffffffff81445620 T ip_setmoptions +ffffffff81445ba0 T ip_getmoptions +ffffffff81445d00 T ip_multicast_if +ffffffff81445de0 T ip_freemoptions +ffffffff81445e70 T in_ifcap_cksum +ffffffff81445ed0 T in_delayed_cksum +ffffffff81446000 T rip_attach +ffffffff814460f0 T rip_detach +ffffffff81446170 T rip_lock +ffffffff814461d0 T rip_unlock +ffffffff81446230 T rip_bind +ffffffff814462f0 T rip_connect +ffffffff81446370 T rip_disconnect +ffffffff814463e0 T rip_shutdown +ffffffff81446420 T rip_send +ffffffff81446500 T rip_init +ffffffff81446520 T rip_input +ffffffff81446890 T rip_output +ffffffff81446a80 T rip_chkhdr +ffffffff81446b80 T rip_ctloutput +ffffffff81447000 T tcp_trace +ffffffff81448000 T tcp_reass +ffffffff814483a0 T tcp_flush_queue +ffffffff81448540 T tcp_input +ffffffff8144b9d0 T syn_cache_reset +ffffffff8144bb20 T syn_cache_get +ffffffff8144c240 T syn_cache_add +ffffffff8144c830 T tcp_del_sackholes +ffffffff8144c8f0 T tcp_dooptions +ffffffff8144ce30 T tcp_xmit_timer +ffffffff8144cf80 T tcp_clean_sackreport +ffffffff8144d000 T tcp_mss +ffffffff8144d2a0 T tcp_sack_partialack +ffffffff8144d350 T tcp_newreno_partialack +ffffffff8144d440 T tcp_seq_subtract +ffffffff8144d470 T tcp_pulloutofband +ffffffff8144d530 T tcp_update_sack_list +ffffffff8144da60 T tcp_sack_option +ffffffff8144df90 T tcp_hdrsz +ffffffff8144e000 T tcp_mss_update +ffffffff8144e150 T tcp_mss_adv +ffffffff8144e210 T syn_cache_rm +ffffffff8144e310 T syn_cache_put +ffffffff8144e390 T syn_cache_init +ffffffff8144e4a0 T syn_cache_insert +ffffffff8144ea50 T syn_cache_timer +ffffffff8144ec20 T syn_cache_respond +ffffffff8144f1e0 T syn_cache_cleanup +ffffffff8144f2e0 T syn_cache_lookup +ffffffff8144f4f0 T syn_cache_unreach +ffffffff81450000 T tcp_sack_output +ffffffff81450080 T tcp_sack_adjust +ffffffff81450100 T tcp_output +ffffffff81451c70 T tcp_setpersist +ffffffff81451d50 T tcp_chopper +ffffffff81452280 T tcp_if_output_tso +ffffffff81453000 T tcp_init +ffffffff81453190 T tcp6_mtudisc_callback +ffffffff814531f0 T tcp_template +ffffffff81453370 T tcp_respond +ffffffff81453780 T tcp_newtcpcb +ffffffff81453980 T tcp_drop +ffffffff81453a70 T tcp_close +ffffffff81453ba0 T tcp_freeq +ffffffff81453c40 T tcp_rscale +ffffffff81453d10 T tcp_notify +ffffffff81453dd0 T tcp6_ctlinput +ffffffff81454090 T tcp_ctlinput +ffffffff81454430 T tcp_mtudisc +ffffffff81454530 T tcp_mtudisc_increase +ffffffff814545b0 T tcp_set_iss_tsm +ffffffff81454730 T tcp_signature_tdb_attach +ffffffff81454760 T tcp_signature_tdb_init +ffffffff81454800 T tcp_signature_tdb_zeroize +ffffffff81454870 T tcp_signature_tdb_input +ffffffff814548c0 T tcp_signature_tdb_output +ffffffff81454900 T tcp_signature_apply +ffffffff81454940 T tcp_signature +ffffffff81455000 T tcp_timer_rexmt +ffffffff814554f0 T tcp_timer_persist +ffffffff814556c0 T tcp_timer_keep +ffffffff81455900 T tcp_timer_2msl +ffffffff81455a60 T tcp_timer_reaper +ffffffff81455ad0 T tcp_timer_delack +ffffffff81455b90 T tcp_timer_init +ffffffff81455c30 T tcp_slowtimo +ffffffff81455c70 T tcp_canceltimers +ffffffff81455d00 T tcp_timer_freesack +ffffffff81456000 T tcp_attach +ffffffff814561c0 T tcp_detach +ffffffff81456280 T tcp_bind +ffffffff81456350 T tcp_listen +ffffffff81456440 T tcp_connect +ffffffff814566d0 T tcp_accept +ffffffff814567a0 T tcp_disconnect +ffffffff81456860 T tcp_shutdown +ffffffff814569f0 T tcp_rcvd +ffffffff81456aa0 T tcp_send +ffffffff81456bb0 T tcp_abort +ffffffff81456c60 T tcp_sense +ffffffff81456d10 T tcp_rcvoob +ffffffff81456e20 T tcp_sendoob +ffffffff81456f90 T tcp_sockaddr +ffffffff81457060 T tcp_peeraddr +ffffffff81457130 T tcp_fill_info +ffffffff81457510 T tcp_ctloutput +ffffffff81457860 T tcp_dodisconnect +ffffffff814579b0 T tcp_usrclosed +ffffffff81457a80 T tcp_ident +ffffffff81457e00 T tcp_sysctl_tcpstat +ffffffff81458480 T tcp_sysctl +ffffffff814589a0 T tcp_update_sndspace +ffffffff81458b00 T tcp_update_rcvspace +ffffffff81459000 T udp_attach +ffffffff814590f0 T udp_detach +ffffffff81459140 T udp_lock +ffffffff814591a0 T udp_unlock +ffffffff81459200 T udp_bind +ffffffff81459240 T udp_connect +ffffffff814592f0 T udp_disconnect +ffffffff814593a0 T udp_shutdown +ffffffff814593e0 T udp_send +ffffffff814594f0 T udp_init +ffffffff81459520 T udp_input +ffffffff8145a2b0 T udp_sbappend +ffffffff8145a520 T udp_notify +ffffffff8145a560 T udp6_ctlinput +ffffffff8145a8a0 T udp_ctlinput +ffffffff8145aa10 T udp_output +ffffffff8145ae70 T udp_sysctl +ffffffff8145b110 T udp_sysctl_udpstat +ffffffff8145c000 T gre_send +ffffffff8145d000 T ipsp_ids_gc +ffffffff8145d120 T ipsp_init +ffffffff8145d200 T tdb_hash +ffffffff8145d320 T reserve_spi +ffffffff8145d5a0 T tdb_alloc +ffffffff8145d6b0 T gettdb_dir +ffffffff8145d7f0 T tdb_unref +ffffffff8145d840 T puttdb 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ipsec_ids_tree_RBT_COMPARE +ffffffff814601e0 t ipsec_ids_flows_RBT_COMPARE +ffffffff81461000 T spd_table_get +ffffffff814610a0 T spd_table_add +ffffffff814611f0 T spd_table_walk +ffffffff814612c0 T ipsp_spd_lookup +ffffffff814624e0 T ipsp_spd_inp +ffffffff81462580 T ipsp_acquire_sa +ffffffff81462a00 T ipsec_delete_policy +ffffffff81462c80 T ipsp_delete_acquire_locked +ffffffff81462cc0 T ipsp_delete_acquire_timer +ffffffff81462d20 T ipsp_delete_acquire +ffffffff81462d80 T ipsp_unref_acquire_locked +ffffffff81462ee0 T ipsec_unref_acquire +ffffffff81462f20 T ipsp_pending_acquire +ffffffff81462ff0 T ipsec_get_acquire +ffffffff81464000 T ipip_init +ffffffff81464040 T ipip_input +ffffffff81464120 T ipip_input_if +ffffffff81464670 T ipip_output +ffffffff81464bb0 T ipe4_attach +ffffffff81464be0 T ipe4_init +ffffffff81464c10 T ipe4_zeroize +ffffffff81464c40 T ipe4_input +ffffffff81464ca0 T ipip_sysctl_ipipstat +ffffffff81464d80 T ipip_sysctl +ffffffff81465000 T ipsec_init +ffffffff814650a0 T ipsec_common_input +ffffffff814658c0 T ipsec_common_input_cb +ffffffff814660d0 T ipsec_sysctl +ffffffff814662f0 T ipsec_sysctl_ipsecstat +ffffffff81466400 T esp_sysctl +ffffffff81466500 T esp_sysctl_espstat +ffffffff814665a0 T ah_sysctl +ffffffff814666a0 T ah_sysctl_ahstat +ffffffff81466740 T ipcomp_sysctl +ffffffff81466840 T ipcomp_sysctl_ipcompstat +ffffffff814668e0 T ipsec_input_disabled +ffffffff81466920 T ah46_input +ffffffff81466ae0 T ipsec_protoff +ffffffff81466bd0 T ah4_ctlinput +ffffffff81466c20 T ipsec_common_ctlinput +ffffffff81466d80 T esp46_input +ffffffff81466f40 T ipcomp46_input +ffffffff81467100 T ipsec_set_mtu +ffffffff814671c0 T udpencap_ctlinput +ffffffff814673f0 T esp4_ctlinput +ffffffff81467440 T ipsec_forward_check +ffffffff814674f0 T ipsec_local_check +ffffffff81468000 T ipsp_process_packet +ffffffff81468570 T ipsp_process_done +ffffffff81468970 T ipsec_hdrsz +ffffffff81468a60 T ipsec_adjust_mtu +ffffffff81469000 T esp_attach +ffffffff81469030 T esp_init +ffffffff81469550 T esp_zeroize +ffffffff81469630 T esp_input +ffffffff8146a060 T checkreplaywindow +ffffffff8146a350 T esp_output +ffffffff8146b000 T ah_attach +ffffffff8146b030 T ah_init +ffffffff8146b280 T ah_zeroize +ffffffff8146b320 T ah_massage_headers +ffffffff8146bb20 T ah_input +ffffffff8146c3e0 T ah_output +ffffffff8146d000 T carp_vh_ref +ffffffff8146d020 T carp_vh_unref +ffffffff8146d090 T carp_sc_ref +ffffffff8146d0b0 T carp_sc_unref +ffffffff8146d0d0 T carp_clone_create +ffffffff8146d2e0 T carp_clone_destroy +ffffffff8146d3b0 T carp_hmac_prepare +ffffffff8146d450 T carp_hmac_prepare_ctx +ffffffff8146d8a0 T carp_hmac_generate +ffffffff8146d970 T carp_hmac_verify +ffffffff8146daf0 T carp_proto_input +ffffffff8146db70 T carp_proto_input_if +ffffffff8146ded0 T carp_proto_input_c +ffffffff8146e490 T carp6_proto_input +ffffffff8146e510 T carp6_proto_input_if +ffffffff8146e7f0 T carp_group_demote_count +ffffffff8146e850 T carp_set_state +ffffffff8146e9e0 T carp_setrun +ffffffff8146ec80 T carp_master_down +ffffffff8146ee70 T carp_sysctl_carpstat +ffffffff8146efa0 T carp_sysctl +ffffffff8146f140 T carpattach +ffffffff8146f1a0 T carp_new_vhost +ffffffff8146f3f0 T carp_addr_updated +ffffffff8146f660 T carp_carpdev_state +ffffffff8146f8a0 T carpdetach +ffffffff8146fb00 T carp_ioctl +ffffffff81470430 T carp_start +ffffffff814704c0 T carp_enqueue +ffffffff81470580 T carp_output +ffffffff81470640 T carp_timer_ad +ffffffff81470680 T carp_timer_down +ffffffff814706c0 T carp_destroy_vhosts +ffffffff81470830 T carp_del_all_timeouts +ffffffff814708e0 T carp_group_demote_adj +ffffffff81470a20 T carp_set_state_all +ffffffff81470ad0 T carp_setrun_all +ffffffff81470b80 T carp_multicast_cleanup +ffffffff81470d60 T carp_prepare_ad +ffffffff81470e50 T carp_send_ad_all +ffffffff81470fb0 T carp_vhe_send_ad_all +ffffffff81471050 T carp_send_ad +ffffffff81471980 T carp_send_arp +ffffffff81471a10 T carp_send_na +ffffffff81471aa0 T carp_update_lsmask +ffffffff81471bd0 T carp_iamatch +ffffffff81471c40 T carp_ourether +ffffffff81471d80 T carp_vhe_match +ffffffff81471e20 T carp_input +ffffffff81472000 T carp_lsdrop +ffffffff81472120 T carp_ether_purgemulti +ffffffff81472250 T carp_set_ifp +ffffffff814725c0 T carp_check_dup_vhids +ffffffff81472720 T carp_set_enaddr +ffffffff814729b0 T carp_set_vhe_enaddr +ffffffff81472a30 T carp_join_multicast +ffffffff81472ae0 T carp_set_addr +ffffffff81472cb0 T carp_set_addr6 +ffffffff81472e30 T carp_join_multicast6 +ffffffff81472f90 T carp_vhids_ioctl +ffffffff81473270 T carp_ether_addmulti +ffffffff81473450 T carp_ether_delmulti +ffffffff81473600 T carp_ifgroup_ioctl +ffffffff814736c0 T carp_ifgattr_ioctl +ffffffff81473780 T carp_transmit +ffffffff81474000 T ipcomp_attach +ffffffff81474030 T ipcomp_init +ffffffff81474130 T ipcomp_zeroize +ffffffff814741a0 T ipcomp_input +ffffffff81474600 T ipcomp_output +ffffffff81475000 T aes_ct_keysched +ffffffff81475140 t aes_keysched_base +ffffffff81475320 t aes_ct_ortho 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Xresume_ioapic_edge59 +ffffffff815efee0 T Xintr_ioapic_edge59_untramp +ffffffff815f0110 T Xrecurse_ioapic_edge60 +ffffffff815f0190 T Xresume_ioapic_edge60 +ffffffff815f01c0 T Xintr_ioapic_edge60_untramp +ffffffff815f03f0 T Xrecurse_ioapic_edge61 +ffffffff815f0470 T Xresume_ioapic_edge61 +ffffffff815f04a0 T Xintr_ioapic_edge61_untramp +ffffffff815f06d0 T Xrecurse_ioapic_edge62 +ffffffff815f0750 T Xresume_ioapic_edge62 +ffffffff815f0780 T Xintr_ioapic_edge62_untramp +ffffffff815f09b0 T Xrecurse_ioapic_edge63 +ffffffff815f0a30 T Xresume_ioapic_edge63 +ffffffff815f0a60 T Xintr_ioapic_edge63_untramp +ffffffff815f0c90 T Xrecurse_ioapic_level0 +ffffffff815f0d10 T Xresume_ioapic_level0 +ffffffff815f0d40 T Xintr_ioapic_level0_untramp +ffffffff815f1050 T Xrecurse_ioapic_level1 +ffffffff815f10d0 T Xresume_ioapic_level1 +ffffffff815f1100 T Xintr_ioapic_level1_untramp +ffffffff815f1410 T Xrecurse_ioapic_level2 +ffffffff815f1490 T Xresume_ioapic_level2 +ffffffff815f14c0 T Xintr_ioapic_level2_untramp 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Xresume_ioapic_level10 +ffffffff815f32c0 T Xintr_ioapic_level10_untramp +ffffffff815f35d0 T Xrecurse_ioapic_level11 +ffffffff815f3650 T Xresume_ioapic_level11 +ffffffff815f3680 T Xintr_ioapic_level11_untramp +ffffffff815f3990 T Xrecurse_ioapic_level12 +ffffffff815f3a10 T Xresume_ioapic_level12 +ffffffff815f3a40 T Xintr_ioapic_level12_untramp +ffffffff815f3d50 T Xrecurse_ioapic_level13 +ffffffff815f3dd0 T Xresume_ioapic_level13 +ffffffff815f3e00 T Xintr_ioapic_level13_untramp +ffffffff815f4110 T Xrecurse_ioapic_level14 +ffffffff815f4190 T Xresume_ioapic_level14 +ffffffff815f41c0 T Xintr_ioapic_level14_untramp +ffffffff815f44d0 T Xrecurse_ioapic_level15 +ffffffff815f4550 T Xresume_ioapic_level15 +ffffffff815f4580 T Xintr_ioapic_level15_untramp +ffffffff815f4890 T Xrecurse_ioapic_level16 +ffffffff815f4910 T Xresume_ioapic_level16 +ffffffff815f4940 T Xintr_ioapic_level16_untramp +ffffffff815f4c50 T Xrecurse_ioapic_level17 +ffffffff815f4cd0 T Xresume_ioapic_level17 +ffffffff815f4d00 T Xintr_ioapic_level17_untramp +ffffffff815f5010 T Xrecurse_ioapic_level18 +ffffffff815f5090 T Xresume_ioapic_level18 +ffffffff815f50c0 T Xintr_ioapic_level18_untramp +ffffffff815f53d0 T Xrecurse_ioapic_level19 +ffffffff815f5450 T Xresume_ioapic_level19 +ffffffff815f5480 T Xintr_ioapic_level19_untramp +ffffffff815f5790 T Xrecurse_ioapic_level20 +ffffffff815f5810 T Xresume_ioapic_level20 +ffffffff815f5840 T Xintr_ioapic_level20_untramp +ffffffff815f5b50 T Xrecurse_ioapic_level21 +ffffffff815f5bd0 T Xresume_ioapic_level21 +ffffffff815f5c00 T Xintr_ioapic_level21_untramp +ffffffff815f5f10 T Xrecurse_ioapic_level22 +ffffffff815f5f90 T Xresume_ioapic_level22 +ffffffff815f5fc0 T Xintr_ioapic_level22_untramp +ffffffff815f62d0 T Xrecurse_ioapic_level23 +ffffffff815f6350 T Xresume_ioapic_level23 +ffffffff815f6380 T Xintr_ioapic_level23_untramp +ffffffff815f6690 T Xrecurse_ioapic_level24 +ffffffff815f6710 T Xresume_ioapic_level24 +ffffffff815f6740 T Xintr_ioapic_level24_untramp +ffffffff815f6a50 T Xrecurse_ioapic_level25 +ffffffff815f6ad0 T Xresume_ioapic_level25 +ffffffff815f6b00 T Xintr_ioapic_level25_untramp +ffffffff815f6e10 T Xrecurse_ioapic_level26 +ffffffff815f6e90 T Xresume_ioapic_level26 +ffffffff815f6ec0 T Xintr_ioapic_level26_untramp +ffffffff815f71d0 T Xrecurse_ioapic_level27 +ffffffff815f7250 T Xresume_ioapic_level27 +ffffffff815f7280 T Xintr_ioapic_level27_untramp +ffffffff815f7590 T Xrecurse_ioapic_level28 +ffffffff815f7610 T Xresume_ioapic_level28 +ffffffff815f7640 T Xintr_ioapic_level28_untramp +ffffffff815f7950 T Xrecurse_ioapic_level29 +ffffffff815f79d0 T Xresume_ioapic_level29 +ffffffff815f7a00 T Xintr_ioapic_level29_untramp +ffffffff815f7d10 T Xrecurse_ioapic_level30 +ffffffff815f7d90 T Xresume_ioapic_level30 +ffffffff815f7dc0 T Xintr_ioapic_level30_untramp +ffffffff815f80d0 T Xrecurse_ioapic_level31 +ffffffff815f8150 T Xresume_ioapic_level31 +ffffffff815f8180 T Xintr_ioapic_level31_untramp +ffffffff815f8490 T Xrecurse_ioapic_level32 +ffffffff815f8510 T Xresume_ioapic_level32 +ffffffff815f8540 T Xintr_ioapic_level32_untramp +ffffffff815f8850 T Xrecurse_ioapic_level33 +ffffffff815f88d0 T Xresume_ioapic_level33 +ffffffff815f8900 T Xintr_ioapic_level33_untramp +ffffffff815f8c10 T Xrecurse_ioapic_level34 +ffffffff815f8c90 T Xresume_ioapic_level34 +ffffffff815f8cc0 T Xintr_ioapic_level34_untramp +ffffffff815f8fd0 T Xrecurse_ioapic_level35 +ffffffff815f9050 T Xresume_ioapic_level35 +ffffffff815f9080 T Xintr_ioapic_level35_untramp +ffffffff815f9390 T Xrecurse_ioapic_level36 +ffffffff815f9410 T Xresume_ioapic_level36 +ffffffff815f9440 T Xintr_ioapic_level36_untramp +ffffffff815f9750 T Xrecurse_ioapic_level37 +ffffffff815f97d0 T Xresume_ioapic_level37 +ffffffff815f9800 T Xintr_ioapic_level37_untramp +ffffffff815f9b10 T Xrecurse_ioapic_level38 +ffffffff815f9b90 T Xresume_ioapic_level38 +ffffffff815f9bc0 T Xintr_ioapic_level38_untramp +ffffffff815f9ed0 T Xrecurse_ioapic_level39 +ffffffff815f9f50 T Xresume_ioapic_level39 +ffffffff815f9f80 T Xintr_ioapic_level39_untramp +ffffffff815fa290 T Xrecurse_ioapic_level40 +ffffffff815fa310 T Xresume_ioapic_level40 +ffffffff815fa340 T Xintr_ioapic_level40_untramp +ffffffff815fa650 T Xrecurse_ioapic_level41 +ffffffff815fa6d0 T Xresume_ioapic_level41 +ffffffff815fa700 T Xintr_ioapic_level41_untramp +ffffffff815faa10 T Xrecurse_ioapic_level42 +ffffffff815faa90 T Xresume_ioapic_level42 +ffffffff815faac0 T Xintr_ioapic_level42_untramp +ffffffff815fadd0 T Xrecurse_ioapic_level43 +ffffffff815fae50 T Xresume_ioapic_level43 +ffffffff815fae80 T Xintr_ioapic_level43_untramp +ffffffff815fb190 T Xrecurse_ioapic_level44 +ffffffff815fb210 T Xresume_ioapic_level44 +ffffffff815fb240 T Xintr_ioapic_level44_untramp +ffffffff815fb550 T Xrecurse_ioapic_level45 +ffffffff815fb5d0 T Xresume_ioapic_level45 +ffffffff815fb600 T Xintr_ioapic_level45_untramp +ffffffff815fb910 T Xrecurse_ioapic_level46 +ffffffff815fb990 T Xresume_ioapic_level46 +ffffffff815fb9c0 T Xintr_ioapic_level46_untramp +ffffffff815fbcd0 T Xrecurse_ioapic_level47 +ffffffff815fbd50 T Xresume_ioapic_level47 +ffffffff815fbd80 T Xintr_ioapic_level47_untramp +ffffffff815fc090 T Xrecurse_ioapic_level48 +ffffffff815fc110 T Xresume_ioapic_level48 +ffffffff815fc140 T Xintr_ioapic_level48_untramp +ffffffff815fc450 T Xrecurse_ioapic_level49 +ffffffff815fc4d0 T Xresume_ioapic_level49 +ffffffff815fc500 T Xintr_ioapic_level49_untramp +ffffffff815fc810 T Xrecurse_ioapic_level50 +ffffffff815fc890 T Xresume_ioapic_level50 +ffffffff815fc8c0 T Xintr_ioapic_level50_untramp +ffffffff815fcbd0 T Xrecurse_ioapic_level51 +ffffffff815fcc50 T Xresume_ioapic_level51 +ffffffff815fcc80 T Xintr_ioapic_level51_untramp +ffffffff815fcf90 T Xrecurse_ioapic_level52 +ffffffff815fd010 T Xresume_ioapic_level52 +ffffffff815fd040 T Xintr_ioapic_level52_untramp +ffffffff815fd350 T Xrecurse_ioapic_level53 +ffffffff815fd3d0 T Xresume_ioapic_level53 +ffffffff815fd400 T Xintr_ioapic_level53_untramp +ffffffff815fd710 T Xrecurse_ioapic_level54 +ffffffff815fd790 T Xresume_ioapic_level54 +ffffffff815fd7c0 T Xintr_ioapic_level54_untramp +ffffffff815fdad0 T Xrecurse_ioapic_level55 +ffffffff815fdb50 T Xresume_ioapic_level55 +ffffffff815fdb80 T Xintr_ioapic_level55_untramp +ffffffff815fde90 T Xrecurse_ioapic_level56 +ffffffff815fdf10 T Xresume_ioapic_level56 +ffffffff815fdf40 T Xintr_ioapic_level56_untramp +ffffffff815fe250 T Xrecurse_ioapic_level57 +ffffffff815fe2d0 T Xresume_ioapic_level57 +ffffffff815fe300 T Xintr_ioapic_level57_untramp +ffffffff815fe610 T Xrecurse_ioapic_level58 +ffffffff815fe690 T Xresume_ioapic_level58 +ffffffff815fe6c0 T Xintr_ioapic_level58_untramp +ffffffff815fe9d0 T Xrecurse_ioapic_level59 +ffffffff815fea50 T Xresume_ioapic_level59 +ffffffff815fea80 T Xintr_ioapic_level59_untramp +ffffffff815fed90 T Xrecurse_ioapic_level60 +ffffffff815fee10 T Xresume_ioapic_level60 +ffffffff815fee40 T Xintr_ioapic_level60_untramp +ffffffff815ff150 T Xrecurse_ioapic_level61 +ffffffff815ff1d0 T Xresume_ioapic_level61 +ffffffff815ff200 T Xintr_ioapic_level61_untramp +ffffffff815ff510 T Xrecurse_ioapic_level62 +ffffffff815ff590 T Xresume_ioapic_level62 +ffffffff815ff5c0 T Xintr_ioapic_level62_untramp +ffffffff815ff8d0 T Xrecurse_ioapic_level63 +ffffffff815ff950 T Xresume_ioapic_level63 +ffffffff815ff980 T Xintr_ioapic_level63_untramp +ffffffff815ffc90 T retpoline_r13 +ffffffff815ffcb0 T Xsofttty +ffffffff815ffcf0 T Xsoftnet +ffffffff815ffd30 T Xsoftclock +ffffffff81600000 T kcopy +ffffffff816000d0 T copyout +ffffffff81600160 T _copyin +ffffffff81600200 T copy_fault +ffffffff81600230 T copyoutstr +ffffffff816002c0 T _copyinstr +ffffffff81600340 T copystr_fault +ffffffff81600349 t copystr_return +ffffffff81601000 T Xspllower +ffffffff81601080 T Xdoreti +ffffffff81602000 T mds_handler_ivb +ffffffff81602070 T mds_handler_bdw +ffffffff816020e0 T mds_handler_skl +ffffffff81602100 T mds_handler_skl_sse +ffffffff81602180 T mds_handler_skl_avx +ffffffff81602200 T mds_handler_silvermont +ffffffff81602260 T mds_handler_knights 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x86_bus_space_io_read_region_4 +ffffffff81605250 T x86_bus_space_io_read_region_8 +ffffffff81605270 T x86_bus_space_io_write_1 +ffffffff816052a0 T x86_bus_space_io_write_2 +ffffffff816052d0 T x86_bus_space_io_write_4 +ffffffff81605300 T x86_bus_space_io_write_8 +ffffffff81605320 T x86_bus_space_io_write_multi_1 +ffffffff81605360 T x86_bus_space_io_write_multi_2 +ffffffff816053a0 T x86_bus_space_io_write_multi_4 +ffffffff816053e0 T x86_bus_space_io_write_multi_8 +ffffffff81605400 T x86_bus_space_io_write_region_1 +ffffffff81605440 T x86_bus_space_io_write_region_2 +ffffffff81605480 T x86_bus_space_io_write_region_4 +ffffffff816054c0 T x86_bus_space_io_write_region_8 +ffffffff816054e0 T x86_bus_space_io_set_multi_1 +ffffffff81605530 T x86_bus_space_io_set_multi_2 +ffffffff81605580 T x86_bus_space_io_set_multi_4 +ffffffff816055d0 T x86_bus_space_io_set_multi_8 +ffffffff816055f0 T x86_bus_space_io_set_region_1 +ffffffff81605650 T x86_bus_space_io_set_region_2 +ffffffff816056b0 T x86_bus_space_io_set_region_4 +ffffffff81605710 T x86_bus_space_io_set_region_8 +ffffffff81605730 T x86_bus_space_io_copy_1 +ffffffff816057c0 T x86_bus_space_io_copy_2 +ffffffff81605850 T x86_bus_space_io_copy_4 +ffffffff816058e0 T x86_bus_space_io_copy_8 +ffffffff81605900 T x86_bus_space_io_vaddr +ffffffff81605930 T x86_bus_space_io_mmap +ffffffff81605960 T x86_bus_space_mem_read_1 +ffffffff81605990 T x86_bus_space_mem_read_2 +ffffffff816059c0 T x86_bus_space_mem_read_4 +ffffffff816059f0 T x86_bus_space_mem_read_8 +ffffffff81605a20 T x86_bus_space_mem_read_multi_1 +ffffffff81605a60 T x86_bus_space_mem_read_multi_2 +ffffffff81605aa0 T x86_bus_space_mem_read_multi_4 +ffffffff81605ae0 T x86_bus_space_mem_read_multi_8 +ffffffff81605b20 T x86_bus_space_mem_read_region_1 +ffffffff81605b50 T x86_bus_space_mem_read_region_2 +ffffffff81605b90 T x86_bus_space_mem_read_region_4 +ffffffff81605bc0 T x86_bus_space_mem_read_region_8 +ffffffff81605c00 T x86_bus_space_mem_write_1 +ffffffff81605c30 T x86_bus_space_mem_write_2 +ffffffff81605c60 T x86_bus_space_mem_write_4 +ffffffff81605c90 T x86_bus_space_mem_write_8 +ffffffff81605cc0 T x86_bus_space_mem_write_multi_1 +ffffffff81605d00 T x86_bus_space_mem_write_multi_2 +ffffffff81605d40 T x86_bus_space_mem_write_multi_4 +ffffffff81605d80 T x86_bus_space_mem_write_multi_8 +ffffffff81605dc0 T x86_bus_space_mem_write_region_1 +ffffffff81605df0 T x86_bus_space_mem_write_region_2 +ffffffff81605e30 T x86_bus_space_mem_write_region_4 +ffffffff81605e60 T x86_bus_space_mem_write_region_8 +ffffffff81605ea0 T x86_bus_space_mem_set_multi_1 +ffffffff81605f20 T x86_bus_space_mem_set_multi_2 +ffffffff81605fb0 T x86_bus_space_mem_set_multi_4 +ffffffff81606030 T x86_bus_space_mem_set_multi_8 +ffffffff816060c0 T x86_bus_space_mem_set_region_1 +ffffffff81606150 T x86_bus_space_mem_set_region_2 +ffffffff816061e0 T x86_bus_space_mem_set_region_4 +ffffffff81606270 T x86_bus_space_mem_set_region_8 +ffffffff81606300 T x86_bus_space_mem_copy_1 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mfii_dcmd_start +ffffffff816d0580 T mfii_start +ffffffff816d05e0 T mfii_scrub_ccb +ffffffff816d06c0 T mfii_do_mgmt +ffffffff816d0a30 T mfii_aen_start +ffffffff816d0cc0 T mfii_aen_done +ffffffff816d0d10 T mfii_aen_pd_insert +ffffffff816d0d80 T mfii_aen_pd_remove +ffffffff816d0dd0 T mfii_aen_pd_state_change +ffffffff816d0e90 T mfii_aen_ld_update +ffffffff816d11d0 T mfii_init_ld_sensor +ffffffff816d12e0 T mfii_reset_hard +ffffffff816d1500 T mfii_mfa_poll +ffffffff816d1710 T mfii_poll +ffffffff816d1810 T mfii_poll_done +ffffffff816d1850 T mfii_postq +ffffffff816d1b20 T mfii_exec +ffffffff816d1c40 T mfii_exec_done +ffffffff816d1c90 T mfii_load_mfa +ffffffff816d1db0 T mfii_empty_done +ffffffff816d1de0 T mfii_done +ffffffff816d1eb0 T mfii_my_intr +ffffffff816d1f30 T mfii_scsi_cmd_done +ffffffff816d2020 T mfii_scsi_cmd_tmo +ffffffff816d20b0 T mfii_scsi_cmd_io +ffffffff816d2230 T mfii_scsi_cmd_cdb +ffffffff816d2360 T mfii_ioctl_cache +ffffffff816d27f0 T mfii_load_ccb +ffffffff816d29d0 T mfii_pd_scsi_cmd_cdb +ffffffff816d2b80 T mfii_abort +ffffffff816d2be0 T mfii_scsi_cmd_abort_done +ffffffff816d2c60 T mfii_ioctl_inq +ffffffff816d2d00 T mfii_ioctl_vol +ffffffff816d2f70 T mfii_ioctl_disk +ffffffff816d35f0 T mfii_ioctl_alarm +ffffffff816d3780 T mfii_ioctl_blink +ffffffff816d3ac0 T mfii_ioctl_setstate +ffffffff816d4b10 T mfii_ioctl_patrol +ffffffff816d5430 T mfii_bio_getitall +ffffffff816d5b30 T mfii_bio_hs +ffffffff816d6080 T mfii_bbu +ffffffff816d6700 T mfii_refresh_ld_sensor +ffffffff816d6780 T mfii_refresh_sensors +ffffffff816d7000 T ips_match +ffffffff816d7030 T ips_attach +ffffffff816d7cb0 T ips_dmamem_alloc +ffffffff816d7e10 T ips_ccb_get +ffffffff816d7ea0 T ips_ccb_put +ffffffff816d7f00 T ips_getadapterinfo +ffffffff816d7ff0 T ips_getdriveinfo +ffffffff816d80e0 T ips_getconf +ffffffff816d81d0 T ips_getpg5 +ffffffff816d82d0 T ips_ccb_alloc +ffffffff816d8450 T ips_intr +ffffffff816d8550 T ips_ioctl +ffffffff816d86b0 T ips_sensors +ffffffff816d8860 T ips_ccb_free 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mpii_dmamem_free +ffffffff8171afa0 T mpii_get_ccb +ffffffff8171b030 T mpii_reply +ffffffff8171b100 T mpii_event_process +ffffffff8171b3f0 T mpii_load_xs_sas3 +ffffffff8171b5a0 T mpii_load_xs +ffffffff8171b7a0 T mpii_req_cfg_header +ffffffff8171b960 T mpii_req_cfg_page +ffffffff8171bb90 T mpii_wait_ne +ffffffff8171bc40 T mpii_reset_soft +ffffffff8171bd70 T mpii_reset_hard +ffffffff8171bfa0 T mpii_handshake_send +ffffffff8171c200 T mpii_handshake_recv_dword +ffffffff8171c370 T mpii_handshake_recv +ffffffff8171c540 T mpii_empty_done +ffffffff8171c570 T mpii_push_reply +ffffffff8171c5f0 T mpii_poll +ffffffff8171c770 T mpii_eventack +ffffffff8171c960 T mpii_eventack_done +ffffffff8171c9e0 T mpii_start +ffffffff8171cab0 T mpii_event_sas +ffffffff8171cee0 T mpii_eventnotify_done +ffffffff8171cf20 T mpii_event_raid +ffffffff8171d250 T mpii_find_dev +ffffffff8171d2b0 T mpii_insert_dev +ffffffff8171d330 T mpii_remove_dev +ffffffff8171d3b0 T mpii_event_discovery +ffffffff8171d410 T mpii_sas_remove_device +ffffffff8171d5d0 T mpii_event_done +ffffffff8171d690 T mpii_wait +ffffffff8171d810 T mpii_dmamem_alloc +ffffffff8171d9b0 T mpii_scsi_cmd_tmo_handler +ffffffff8171db10 T mpii_put_ccb +ffffffff8171dbb0 T mpii_poll_done +ffffffff8171dbe0 T mpii_wait_done +ffffffff8171dc20 T mpii_scsi_cmd_done +ffffffff8171de80 T mpii_scsi_cmd_tmo +ffffffff8171df30 T mpii_scsi_cmd_tmo_done +ffffffff8171df50 T mpii_ioctl_cache +ffffffff8171e1f0 T mpii_ioctl_inq +ffffffff8171e2a0 T mpii_ioctl_vol +ffffffff8171e520 T mpii_ioctl_disk +ffffffff8171e700 T mpii_find_vol +ffffffff8171e750 T mpii_bio_hs +ffffffff8171e940 T mpii_bio_disk +ffffffff8171eb90 T mpii_bio_volstate +ffffffff8171ed30 T mpii_refresh_sensors +ffffffff8171f000 T sili_pci_match +ffffffff8171f0b0 T sili_pci_attach +ffffffff8171f3c0 T sili_pci_detach +ffffffff8171f470 T sili_pci_activate +ffffffff8171f4b0 T sili_lookup +ffffffff81720000 T aq_fw1x_reset +ffffffff81720050 T aq1_get_mac_addr +ffffffff81720130 T aq_fw1x_set_mode +ffffffff81720160 T aq_fw1x_get_mode +ffffffff81720190 T aq_fw1x_get_stats +ffffffff817201c0 T aq_fw2x_reset +ffffffff81720250 T aq_fw2x_set_mode +ffffffff817203f0 T aq_fw2x_get_mode +ffffffff81720580 T aq_fw2x_get_stats +ffffffff817205b0 T aq2_fw_reset +ffffffff81720740 T aq2_get_mac_addr +ffffffff817207f0 T aq2_fw_set_mode +ffffffff81720a10 T aq2_fw_get_mode +ffffffff81720ae0 T aq2_fw_get_stats +ffffffff81720b10 T aq_match +ffffffff81720b40 T aq_attach +ffffffff817217b0 T aq_activate +ffffffff817217e0 T aq_lookup +ffffffff81721860 T aq_intr +ffffffff817219f0 T aq_intr_link +ffffffff81721af0 T aq1_fw_reboot +ffffffff81721d40 T aq2_fw_reboot +ffffffff81722250 T aq_hw_reset +ffffffff817223b0 T aq_init_rss +ffffffff81722720 T aq_hw_init +ffffffff81722a30 T aq_ifmedia_change +ffffffff81722b10 T aq_ifmedia_status +ffffffff81722c10 T aq_ioctl +ffffffff81722e50 T aq_start +ffffffff81723190 T aq_watchdog +ffffffff817231c0 T aq_set_linkmode +ffffffff817231f0 T aq_refill +ffffffff81723260 T aq_intr_queue +ffffffff81723340 T aq_enable_intr +ffffffff81723450 T aq1_fw_read_version +ffffffff817234f0 T aq1_mac_soft_reset +ffffffff81723520 T aq1_fw_version_init +ffffffff817236a0 T aq1_hw_init_ucp +ffffffff81723830 T aq1_mac_soft_reset_rbl +ffffffff81723ad0 T aq1_global_software_reset +ffffffff81723bf0 T aq1_mac_soft_reset_flb +ffffffff81723fb0 T aq2_interface_buffer_read +ffffffff817240f0 T aq1_fw_downld_dwords +ffffffff81724410 T aq_hw_l3_filter_set +ffffffff81724620 T aq_hw_init_tx_path +ffffffff81724890 T aq_hw_init_rx_path +ffffffff81725090 T aq_set_mac_addr +ffffffff817252b0 T aq_hw_qos_set +ffffffff817259a0 T aq2_filter_art_set +ffffffff81725b50 T aq_get_linkmode +ffffffff81725bc0 T aq_txring_reset +ffffffff81725f70 T aq_rxring_reset +ffffffff81726480 T aq_rx_fill +ffffffff81726680 T aq_rxeof +ffffffff81726a00 T aq_txeof +ffffffff81726bd0 T aq_update_link_status +ffffffff81726c70 T aq_free_slots +ffffffff81726d20 T aq_queue_up +ffffffff81727190 T aq_dmamem_alloc +ffffffff817272e0 T aq_dmamem_free +ffffffff81727350 T aq_queue_down +ffffffff81727630 T aq_invalidate_rx_desc_cache +ffffffff817276b0 T aq_up +ffffffff81727af0 T aq_down +ffffffff81727c40 T aq_rxrinfo +ffffffff81727d30 T aq_iff +ffffffff81729000 T tulip_probe +ffffffff81729060 T tulip_attach +ffffffff81729aa0 T tulip_timeout_callback +ffffffff81729af0 T tulip_timeout +ffffffff81729b60 T tulip_txprobe +ffffffff81729ca0 T tulip_txput +ffffffff8172a230 T tulip_media_set +ffffffff8172a820 T tulip_reset +ffffffff8172abe0 T tulip_mii_autonegotiate +ffffffff8172aee0 T tulip_mii_readreg +ffffffff8172b090 T tulip_mii_writereg +ffffffff8172b250 T tulip_linkup +ffffffff8172b320 T tulip_init +ffffffff8172b4a0 T tulip_media_print +ffffffff8172b4f0 T tulip_media_link_monitor +ffffffff8172b760 T tulip_mii_map_abilities +ffffffff8172b7f0 T tulip_media_poll +ffffffff8172bce0 T tulip_mii_phy_readspecific +ffffffff8172bea0 T tulip_media_select +ffffffff8172bfb0 T tulip_21040_mediainfo_init +ffffffff8172c0b0 T tulip_21040_media_probe +ffffffff8172c1a0 T tulip_21040_10baset_only_media_probe +ffffffff8172c260 T tulip_21040_10baset_only_media_select +ffffffff8172c2c0 T tulip_21040_auibnc_only_media_probe +ffffffff8172c350 T tulip_21040_auibnc_only_media_select +ffffffff8172c3a0 T tulip_21041_mediainfo_init +ffffffff8172c460 T tulip_21041_media_probe +ffffffff8172c540 T tulip_21041_media_poll +ffffffff8172c860 T tulip_mii_get_phyaddr +ffffffff8172c920 T tulip_2114x_media_preset +ffffffff8172cb40 T tulip_null_media_poll +ffffffff8172cb70 T tulip_21140_mediainit +ffffffff8172cbc0 T tulip_21140_evalboard_media_probe +ffffffff8172cda0 T tulip_21140_accton_media_probe +ffffffff8172cfc0 T tulip_21140_smc9332_media_probe +ffffffff8172d1f0 T tulip_21140_cogent_em100_media_probe +ffffffff8172d360 T tulip_21140_znyx_zx34x_media_probe +ffffffff8172d5a0 T tulip_2114x_media_probe +ffffffff8172d5d0 T tulip_delay_300ns +ffffffff8172d6e0 T tulip_srom_idle +ffffffff8172e080 T tulip_srom_read +ffffffff8172ee20 T tulip_mii_writebits +ffffffff8172f3b0 T tulip_mii_turnaround +ffffffff8172fb80 T tulip_mii_readbits +ffffffff8172ff60 T tulip_identify_dec_nic +ffffffff81730010 T tulip_identify_znyx_nic +ffffffff81730300 T tulip_identify_smc_nic +ffffffff817304e0 T tulip_identify_cogent_nic +ffffffff817305d0 T tulip_identify_accton_nic +ffffffff81730700 T tulip_identify_asante_nic +ffffffff817309d0 T tulip_identify_compex_nic +ffffffff81730b20 T tulip_srom_decode +ffffffff81731770 T tulip_read_macaddr +ffffffff817320f0 T tulip_ifmedia_add +ffffffff817321e0 T tulip_ifmedia_change +ffffffff817323c0 T tulip_ifmedia_status +ffffffff81732430 T tulip_alloc_rxmap +ffffffff81732470 T tulip_free_rxmap +ffffffff817324b0 T tulip_alloc_txmap +ffffffff817324f0 T tulip_free_txmap +ffffffff81732530 T tulip_addr_filter +ffffffff81732840 T tulip_rx_intr +ffffffff81732e50 T tulip_txput_setup +ffffffff817330e0 T tulip_tx_intr +ffffffff81733500 T tulip_print_abnormal_interrupt +ffffffff81733530 T tulip_intr_handler +ffffffff817338e0 T tulip_ifstart +ffffffff817339b0 T tulip_intr_shared +ffffffff81733a20 T tulip_intr_normal +ffffffff81733a70 T tulip_ifioctl +ffffffff81733b60 T tulip_ifwatchdog +ffffffff81733c60 T tulip_busdma_allocmem +ffffffff81733df0 T tulip_busdma_init +ffffffff81734010 T tulip_initcsrs +ffffffff81734110 T tulip_initring +ffffffff81735000 T ep_pci_match +ffffffff81735030 T ep_pci_attach +ffffffff81736000 T pcn_match +ffffffff81736070 T pcn_attach +ffffffff817367e0 T pcn_tick +ffffffff81736830 T pcn_reset +ffffffff817368a0 T pcn_intr +ffffffff81736ae0 T pcn_ioctl +ffffffff81736c40 T pcn_start +ffffffff81737090 T pcn_watchdog +ffffffff81737100 T pcn_txintr +ffffffff817375c0 T pcn_init +ffffffff81737e80 T pcn_stop +ffffffff81738000 T pcn_rxintr +ffffffff81738520 T pcn_spnd +ffffffff81738620 T pcn_add_rxbuf +ffffffff81738810 T pcn_rxdrain +ffffffff817388b0 T pcn_set_filter +ffffffff81738a10 T pcn_79c970_mediainit +ffffffff81738b20 T pcn_79c970_mediachange +ffffffff81738ce0 T pcn_79c970_mediastatus +ffffffff81738d20 T pcn_79c971_mediainit +ffffffff81738df0 T pcn_mii_readreg +ffffffff81738eb0 T pcn_mii_writereg +ffffffff81738f50 T pcn_mii_statchg +ffffffff81738fb0 T pcn_79c971_mediachange +ffffffff81739000 T pcn_79c971_mediastatus +ffffffff8173a000 T siop_lookup_product +ffffffff8173a0a0 T siop_pci_attach_common +ffffffff8173a530 T siop_pci_reset +ffffffff8173b000 T siop_pci_match +ffffffff8173b050 T siop_pci_attach +ffffffff8173c000 T sii3114_read_reg +ffffffff8173c060 T sii3114_write_reg +ffffffff8173c0d0 T pdc203xx_read_reg +ffffffff8173c130 T pdc203xx_write_reg +ffffffff8173c1a0 T svwsata_read_reg +ffffffff8173c200 T svwsata_write_reg +ffffffff8173c240 T svwsata_lba48_write_reg +ffffffff8173c280 T pciide_pci_read +ffffffff8173c2d0 T pciide_pci_write +ffffffff8173c340 T default_chip_map +ffffffff8173c990 T artisea_chip_map +ffffffff8173cbf0 T piix_chip_map +ffffffff8173d1e0 T piixsata_chip_map +ffffffff8173d700 T sch_chip_map +ffffffff8173da20 T amd756_chip_map +ffffffff8173de30 T ixp_chip_map +ffffffff8173e1a0 T cmd_chip_map +ffffffff8173e300 T cmd0643_9_chip_map +ffffffff8173e600 T cmd680_chip_map +ffffffff8173e7e0 T sii3112_chip_map +ffffffff8173eb60 T sii3114_chip_map +ffffffff8173ef60 T apollo_chip_map +ffffffff8173f5c0 T sata_chip_map +ffffffff8173f7e0 T cy693_chip_map +ffffffff8173fba0 T sis_chip_map +ffffffff817402e0 T natsemi_chip_map +ffffffff81740740 T ns_scx200_chip_map +ffffffff81740ad0 T acer_chip_map +ffffffff81741150 T hpt_chip_map +ffffffff81741630 T pdc202xx_chip_map +ffffffff81741ff0 T pdcsata_chip_map +ffffffff81742770 T acard_chip_map +ffffffff817429e0 T serverworks_chip_map +ffffffff81742cf0 T svwsata_chip_map +ffffffff817430d0 T nforce_chip_map +ffffffff817434f0 T ite_chip_map +ffffffff817437b0 T jmicron_chip_map +ffffffff81743bc0 T phison_chip_map +ffffffff81743ee0 T rdc_chip_map +ffffffff81744330 T pciide_match +ffffffff817443d0 T pciide_attach +ffffffff817444b0 T pciide_detach +ffffffff81744510 T pciide_activate +ffffffff81744c40 T pciide_lookup_product +ffffffff81744ea0 T pciide_dmacmd_read +ffffffff81744ed0 T pciide_dmacmd_write +ffffffff81744f00 T pciide_dmactl_read +ffffffff81744f30 T pciide_dmactl_write +ffffffff81744f60 T pciide_dmatbl_write +ffffffff81744f90 T pciide_mapregs_compat +ffffffff81745110 T pciide_unmapregs_compat +ffffffff817451a0 T pciide_mapregs_native +ffffffff81745490 T pciide_unmapregs_native +ffffffff81745520 T pciide_mapreg_dma +ffffffff817456b0 T pciide_dma_init +ffffffff81745980 T pciide_dma_start +ffffffff81745a00 T pciide_dma_finish +ffffffff81745bd0 T pciide_unmapreg_dma +ffffffff81745c00 T pciide_intr_flag +ffffffff81745e10 T pciide_compat_intr +ffffffff81745e90 T pciide_pci_intr +ffffffff81745f50 T pciide_channel_dma_setup +ffffffff81746020 T pciide_dma_table_setup +ffffffff81746260 T pciide_irqack +ffffffff817462b0 T pciide_chansetup +ffffffff81746390 T pciide_chanfree +ffffffff817463e0 T pciide_mapchan +ffffffff81746470 T pciide_unmap_chan +ffffffff81746540 T pciide_chan_candisable +ffffffff817465b0 T pciide_map_compat_intr +ffffffff81746650 T pciide_unmap_compat_intr +ffffffff817466b0 T pciide_print_channels +ffffffff81746780 T pciide_print_modes +ffffffff81746790 T default_chip_unmap +ffffffff81746870 T sata_setup_channel +ffffffff81746990 T piix_timing_debug +ffffffff817469c0 T piix_setup_channel +ffffffff81746e50 T piix3_4_setup_channel +ffffffff817475f0 T piix_setup_idetim_timings +ffffffff81747660 T piix_setup_idetim_drvs +ffffffff81747780 T piix_setup_sidetim_timings +ffffffff817477f0 T amd756_setup_channel +ffffffff81747ba0 T apollo_setup_channel +ffffffff81747f20 T cmd_channel_map +ffffffff81748290 T cmd_pci_intr +ffffffff81748390 T cmd646_9_irqack +ffffffff81748490 T cmd0643_9_setup_channel +ffffffff817488b0 T cmd680_setup_channel +ffffffff81748db0 T cmd680_channel_map +ffffffff817490e0 T sii_fixup_cacheline +ffffffff817493b0 T sii3112_setup_channel +ffffffff81749570 T sii3112_drv_probe +ffffffff81749990 T sii3114_mapreg_dma +ffffffff81749c70 T sii3114_chansetup +ffffffff81749d40 T sii3114_mapchan +ffffffff8174a060 T sii3114_dmacmd_read +ffffffff8174a0a0 T sii3114_dmacmd_write +ffffffff8174a0e0 T sii3114_dmactl_read +ffffffff8174a120 T sii3114_dmactl_write +ffffffff8174a160 T sii3114_dmatbl_write +ffffffff8174a1a0 T cy693_setup_channel +ffffffff8174a3c0 T sis_hostbr_match +ffffffff8174a490 T sis_south_match +ffffffff8174a4d0 T sis_setup_channel +ffffffff8174a810 T sis96x_setup_channel +ffffffff8174aaf0 T natsemi_irqack +ffffffff8174ab90 T natsemi_setup_channel +ffffffff8174af80 T natsemi_pci_intr +ffffffff8174b080 T ns_scx200_setup_channel +ffffffff8174b380 T acer_dma_init +ffffffff8174b3c0 T acer_setup_channel +ffffffff8174b7c0 T acer_pci_intr +ffffffff8174b8b0 T hpt_setup_channel +ffffffff8174bc00 T hpt_pci_intr +ffffffff8174bd10 T pdc268_config_read +ffffffff8174bd80 T pdc20268_setup_channel +ffffffff8174bf50 T pdc202xx_setup_channel +ffffffff8174c3a0 T pdc20262_dma_start +ffffffff8174c510 T pdc20262_dma_finish +ffffffff8174c5e0 T pdc20265_pci_intr +ffffffff8174c790 T pdc202xx_pci_intr +ffffffff8174c8a0 T pdc203xx_pci_intr +ffffffff8174c990 T pdc205xx_pci_intr +ffffffff8174cac0 T pdc203xx_irqack +ffffffff8174cb50 T pdc203xx_setup_channel +ffffffff8174cc50 T pdc205xx_do_reset +ffffffff8174ccf0 T pdc205xx_drv_probe +ffffffff8174cf70 T pdc203xx_dma_start +ffffffff8174d030 T pdc203xx_dma_finish +ffffffff8174d120 T serverworks_setup_channel +ffffffff8174d550 T serverworks_pci_intr +ffffffff8174d660 T svwsata_mapreg_dma +ffffffff8174d710 T svwsata_drv_probe +ffffffff8174d9f0 T svwsata_mapchan +ffffffff8174dae0 T svwsata_dmacmd_read +ffffffff8174db10 T svwsata_dmacmd_write +ffffffff8174db40 T svwsata_dmactl_read +ffffffff8174db70 T svwsata_dmactl_write +ffffffff8174dba0 T svwsata_dmatbl_write +ffffffff8174dbd0 T acard_setup_channel +ffffffff8174dff0 T nforce_setup_channel +ffffffff8174e340 T nforce_pci_intr +ffffffff8174e430 T ite_setup_channel +ffffffff8174e7b0 T ixp_setup_channel +ffffffff8174eb50 T jmicron_setup_channel +ffffffff8174edb0 T phison_setup_channel +ffffffff8174efc0 T sch_setup_channel +ffffffff8174f1c0 T rdc_setup_channel +ffffffff81750000 T ppbmatch +ffffffff81750050 T ppbattach +ffffffff817507d0 T ppbdetach +ffffffff817508f0 T ppbactivate +ffffffff81750d70 T ppb_alloc_busrange +ffffffff81750f20 T ppb_hotplug_insert +ffffffff81750f80 T ppb_hotplug_rescan +ffffffff81750fc0 T ppb_hotplug_remove +ffffffff81751120 T ppb_hotplug_insert_finish +ffffffff81751150 T ppb_intr +ffffffff81751210 T ppb_alloc_resources +ffffffff81751920 T ppbprint +ffffffff81752000 T cy_pci_match +ffffffff81752030 T cy_pci_attach +ffffffff81753000 T rl_pci_match +ffffffff81753060 T rl_pci_attach +ffffffff81753220 T rl_pci_detach +ffffffff81754000 T re_pci_probe +ffffffff817540a0 T re_pci_attach +ffffffff817543d0 T re_pci_detach +ffffffff81754490 T re_pci_activate +ffffffff81755000 T vr_probe +ffffffff817550f0 T vr_attach +ffffffff81755880 T vr_activate +ffffffff81755900 T vr_mii_readreg +ffffffff81755a70 T vr_mii_writereg +ffffffff81755bd0 T vr_miibus_readreg +ffffffff81755c40 T vr_miibus_writereg +ffffffff81755ca0 T vr_miibus_statchg +ffffffff81755cc0 T vr_setcfg +ffffffff81755ee0 T vr_iff +ffffffff81756060 T vr_reset +ffffffff81756170 T vr_quirks +ffffffff81756270 T vr_dmamem_alloc +ffffffff817563d0 T vr_dmamem_free +ffffffff81756440 T vr_intr +ffffffff81756670 T vr_chipinit +ffffffff81756750 T vr_ioctl +ffffffff817568f0 T vr_start +ffffffff81756ac0 T vr_watchdog +ffffffff81756b50 T vr_wol +ffffffff81756d00 T vr_ifmedia_upd +ffffffff81756d50 T vr_ifmedia_sts +ffffffff81756db0 T vr_tick +ffffffff81756e30 T vr_rxtick +ffffffff81756f10 T vr_stop +ffffffff817571a0 T vr_init +ffffffff81757740 T vr_list_tx_init +ffffffff81757840 T vr_list_rx_init +ffffffff81757a00 T vr_fill_rx_ring +ffffffff81757ad0 T vr_alloc_mbuf +ffffffff81757c40 T vr_rxeof +ffffffff81757ec0 T vr_rxeoc +ffffffff81758050 T vr_txeof +ffffffff81758210 T vr_encap +ffffffff81759000 T txp_probe +ffffffff81759030 T txp_attach +ffffffff817591a0 T txp_attachhook +ffffffff817594c0 T txp_chip_init +ffffffff81759680 T txp_download_fw +ffffffff81759b20 T txp_alloc_rings +ffffffff8175a960 T txp_command +ffffffff8175aa30 T txp_ifmedia_upd +ffffffff8175ab40 T txp_ifmedia_sts +ffffffff8175ae30 T txp_ioctl +ffffffff8175af50 T txp_start +ffffffff8175b310 T txp_watchdog +ffffffff8175b340 T txp_capabilities +ffffffff8175b4f0 T txp_tick +ffffffff8175b640 T txp_intr +ffffffff8175b8b0 T txp_reset_adapter +ffffffff8175b9b0 T txp_download_fw_wait +ffffffff8175baa0 T txp_download_fw_section +ffffffff8175be10 T txp_dma_malloc +ffffffff8175bfb0 T txp_dma_free +ffffffff8175c030 T txp_rx_reclaim +ffffffff8175c310 T txp_rxbuf_reclaim +ffffffff8175c590 T txp_tx_reclaim +ffffffff8175c740 T txp_init +ffffffff8175c880 T txp_stop +ffffffff8175c980 T txp_set_filter +ffffffff8175cb10 T txp_command2 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t start_capture +ffffffff81766290 T vbi_read +ffffffff817663b0 T video_ioctl +ffffffff81767850 T bktr_common_ioctl +ffffffff81768020 T tuner_ioctl +ffffffff81768f70 T i2cWrite +ffffffff81769090 T i2cRead +ffffffff817691b0 T msp_dpl_read +ffffffff81769480 T msp_dpl_write +ffffffff81769640 T msp_dpl_reset +ffffffff81769940 t i2c_write_byte +ffffffff81769b20 t i2c_read_byte +ffffffff81769d40 t split +ffffffff81769f40 t getline +ffffffff8176b000 t bktr_probe +ffffffff8176b060 t bktr_attach +ffffffff8176b2e0 T bktr_get_info +ffffffff8176b3c0 T bktr_set_info +ffffffff8176b520 T get_bktr_mem +ffffffff8176b750 T free_bktr_mem +ffffffff8176b7b0 T bktropen +ffffffff8176b870 T bktrclose +ffffffff8176b900 T bktrread +ffffffff8176b990 T bktrwrite +ffffffff8176b9c0 T bktrioctl +ffffffff8176ba70 T bktrmmap +ffffffff8176bb10 t bktr_intr +ffffffff8176c000 T select_tuner +ffffffff8176c050 T tv_freq +ffffffff8176c2a0 T do_afc +ffffffff8176c3d0 T get_tuner_status +ffffffff8176c3f0 T tv_channel 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em_82547_move_tail_locked +ffffffff81771370 T em_82547_update_fifo_head +ffffffff817713c0 T em_ioctl +ffffffff817716b0 T em_init +ffffffff81771a10 T em_get_sffpage +ffffffff81771ad0 T em_disable_intr +ffffffff81771bd0 T em_iff +ffffffff81771ee0 T em_initialize_receive_unit +ffffffff81772670 T em_enable_intr +ffffffff817727d0 T em_watchdog +ffffffff81772980 T em_enable_hw_vlans +ffffffff81772a20 T em_setup_transmit_structures +ffffffff81772c20 T em_initialize_transmit_unit +ffffffff81773240 T em_setup_receive_structures +ffffffff81773380 T em_setup_queues_msix +ffffffff81773a40 T em_intr +ffffffff81773b40 T em_txeof +ffffffff81773d10 T em_rxeof +ffffffff817741d0 T em_rxrefill +ffffffff817742e0 T em_media_status +ffffffff81774520 T em_flowstatus +ffffffff81774630 T em_media_change +ffffffff81774790 T em_tx_ctx_setup +ffffffff81774920 T em_transmit_checksum_setup +ffffffff81774a00 T em_fill_descriptors +ffffffff81774a80 T em_82547_fifo_workaround +ffffffff81774af0 T em_82547_tx_fifo_reset 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em_link_intr_msix +ffffffff81776fb0 T em_enable_queue_intr_msix +ffffffff81778000 T em_set_mac_type +ffffffff81778a00 T em_set_sfp_media_type_82575 +ffffffff81778d50 T em_translate_82542_register +ffffffff81778f80 T em_read_sfp_data_byte +ffffffff81779070 T em_set_media_type +ffffffff817792e0 T em_reset_hw +ffffffff81779eb0 T em_disable_pciex_master +ffffffff81779f80 T em_check_phy_reset_block +ffffffff8177a040 T em_gate_hw_phy_config_ich8lan +ffffffff8177a0e0 t em_get_software_flag +ffffffff8177a260 T em_hv_phy_workarounds_ich8lan +ffffffff8177a5f0 T em_lv_phy_workarounds_ich8lan +ffffffff8177a6f0 t em_phy_init_script +ffffffff8177a960 T em_read_eeprom +ffffffff8177b040 T em_set_eee_i350 +ffffffff8177b160 T em_init_hw +ffffffff8177ce00 T em_phy_reset +ffffffff8177d040 T em_clear_vfta_i350 +ffffffff8177d220 T em_read_phy_reg +ffffffff8177d3c0 T em_setup_link +ffffffff8177fc60 T em_enable_tx_pkt_filtering +ffffffff81780030 T em_clear_hw_cntrs +ffffffff81780920 T em_write_phy_reg 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em_access_phy_reg_hv +ffffffff81783ec0 t em_swfw_sync_acquire +ffffffff81784070 t em_swfw_sync_release +ffffffff817841f0 T em_sgmii_uses_mdio_82575 +ffffffff81784250 T em_read_phy_reg_i2c +ffffffff81784330 T em_write_phy_reg_i2c +ffffffff81784410 T em_phy_hw_reset +ffffffff81784a50 T em_oem_bits_config_pchlan +ffffffff81784c30 T em_initialize_M88E1512_phy +ffffffff81784df0 T em_init_eeprom_params +ffffffff81785330 T em_get_flash_presence_i210 +ffffffff81785390 t em_acquire_eeprom +ffffffff81785580 t em_read_eeprom_ich8 +ffffffff81785750 t em_release_eeprom +ffffffff817858c0 t em_standby_eeprom +ffffffff81785ab0 t em_shift_out_ee_bits +ffffffff81785c50 t em_shift_in_ee_bits +ffffffff81785d90 T em_validate_eeprom_checksum +ffffffff81785f40 T em_write_eeprom +ffffffff817864f0 T em_update_eeprom_checksum +ffffffff81786610 t em_commit_shadow_ram +ffffffff81786b90 T em_read_part_num +ffffffff81786c30 T em_read_mac_addr +ffffffff81786db0 T em_mc_addr_list_update +ffffffff81786ec0 T em_hash_mc_addr +ffffffff81786fc0 T em_mta_set +ffffffff81787130 T em_rar_set +ffffffff81787230 T em_get_bus_info +ffffffff817873c0 T em_check_mng_mode +ffffffff81787440 T em_valid_nvm_bank_detect_ich8lan +ffffffff817875f0 T em_read_eeprom_spt +ffffffff817878c0 T em_read_ich8_data32 +ffffffff81787a30 t em_ich8_cycle_init +ffffffff81787be0 t em_ich8_flash_cycle +ffffffff81787d50 T em_configure_k1_ich8lan +ffffffff81787f60 t em_get_hw_eeprom_semaphore +ffffffff817880d0 t em_shift_out_mdi_bits +ffffffff81788250 t em_erase_ich8_4k_segment +ffffffff81788490 t em_write_ich8_byte +ffffffff81788600 t em_read_ich8_data +ffffffff81789000 T em_lookup_gcu +ffffffff81789030 T em_attach_miibus +ffffffff81789060 T gcu_miibus_readreg +ffffffff817891d0 T gcu_miibus_writereg +ffffffff81789320 T gcu_miibus_statchg +ffffffff8178a000 T ixgb_probe +ffffffff8178a030 T ixgb_attach +ffffffff8178a450 T ixgb_local_timer +ffffffff8178a4f0 T ixgb_identify_hardware +ffffffff8178a5f0 T ixgb_allocate_pci_resources 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mac_addr_valid +ffffffff8178f7c0 T ixgb_clear_vfta +ffffffff8178f840 T ixgb_clear_hw_cntrs +ffffffff8178ff20 T ixgb_setup_fc +ffffffff817900b0 T ixgb_check_for_link +ffffffff817902c0 T ixgb_rar_set +ffffffff81790330 T ixgb_mc_addr_list_update +ffffffff817905b0 T ixgb_write_vfta +ffffffff817905e0 T ixgb_read_phy_reg +ffffffff81790ae0 T ixgb_write_phy_reg +ffffffff81790fd0 T ixgb_check_for_bad_link +ffffffff81791090 T ixgb_led_on +ffffffff817910e0 T ixgb_led_off +ffffffff81792000 T ixgbe_probe +ffffffff81792030 T ixgbe_attach +ffffffff817925a0 T ixgbe_detach +ffffffff817927c0 T ixgbe_activate +ffffffff817928d0 T ixgbe_identify_hardware +ffffffff81792990 T ixgbe_allocate_pci_resources +ffffffff81792ae0 T ixgbe_allocate_queues +ffffffff81792fe0 T ixgbe_allocate_msix +ffffffff81793220 T ixgbe_allocate_legacy +ffffffff81793340 T ixgbe_setup_interface +ffffffff817936a0 T ixgbe_free_transmit_structures +ffffffff81793720 T ixgbe_free_receive_structures +ffffffff817937e0 T ixgbe_free_pci_resources +ffffffff817938c0 T ixgbe_stop +ffffffff81793be0 T ixgbe_init +ffffffff81794820 T ixgbe_start +ffffffff81794a00 T ixgbe_encap +ffffffff81794e30 T ixgbe_ioctl +ffffffff81795190 T ixgbe_rxrinfo +ffffffff817952f0 T ixgbe_get_sffpage +ffffffff817954a0 T ixgbe_disable_intr +ffffffff81795570 T ixgbe_iff +ffffffff817956e0 T ixgbe_enable_intr +ffffffff817957f0 T ixgbe_enable_queues +ffffffff81795900 T ixgbe_watchdog +ffffffff81795b10 T ixgbe_setup_transmit_structures +ffffffff81795bf0 T ixgbe_initialize_transmit_units +ffffffff81795ec0 T ixgbe_setup_receive_structures +ffffffff81795ff0 T ixgbe_initialize_receive_units +ffffffff817964d0 T ixgbe_config_gpie +ffffffff817965a0 T ixgbe_setup_vlan_hw_support +ffffffff81796710 T ixgbe_configure_ivars +ffffffff817968c0 T ixgbe_set_ivar +ffffffff81796a90 T ixgbe_config_link +ffffffff81796c30 T ixgbe_config_delay_values +ffffffff81796d50 t ix_kstats_tick +ffffffff81796e20 T ixgbe_enable_queue +ffffffff81796ef0 T ixgbe_disable_queue +ffffffff81796fc0 T ixgbe_link_intr +ffffffff81796fd0 T ixgbe_intr +ffffffff817974a0 T ixgbe_queue_intr +ffffffff817975f0 T ixgbe_rxeof +ffffffff81797b60 T ixgbe_txeof +ffffffff81797d00 T ixgbe_rxrefill +ffffffff81797dc0 T ixgbe_legacy_intr +ffffffff81797f80 T ixgbe_update_link_status +ffffffff817980d0 T ixgbe_handle_mod +ffffffff817981f0 T ixgbe_handle_msf +ffffffff817982c0 T ixgbe_handle_phy +ffffffff81798350 T ixgbe_media_status +ffffffff81798560 T ixgbe_media_change +ffffffff81798610 T ixgbe_mc_array_itr +ffffffff81798650 T ixgbe_setup_msix +ffffffff817986e0 T ixgbe_add_media_types +ffffffff81798980 T ixgbe_dma_malloc +ffffffff81798b70 T ixgbe_dma_free +ffffffff81798c20 T ixgbe_allocate_transmit_buffers +ffffffff81798d90 T ixgbe_setup_transmit_ring +ffffffff81798f30 T ixgbe_free_transmit_buffers +ffffffff81799060 T ixgbe_get_buf +ffffffff817991a0 T ixgbe_allocate_receive_buffers +ffffffff817992e0 T ixgbe_setup_receive_ring +ffffffff817993c0 T ixgbe_rxfill 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ixgbe_get_mac_addr_generic +ffffffff8179ba30 T ixgbe_stop_adapter_generic +ffffffff8179bbb0 T ixgbe_get_bus_info_generic +ffffffff8179bc60 T ixgbe_set_lan_id_multi_port_pcie +ffffffff8179bd30 T ixgbe_acquire_swfw_sync +ffffffff8179bf60 T ixgbe_release_swfw_sync +ffffffff8179c010 T prot_autoc_read_generic +ffffffff8179c070 T prot_autoc_write_generic +ffffffff8179c0c0 T ixgbe_led_on_generic +ffffffff8179c180 T ixgbe_led_off_generic +ffffffff8179c230 T ixgbe_blink_led_start_generic +ffffffff8179c3a0 T ixgbe_blink_led_stop_generic +ffffffff8179c4c0 T ixgbe_set_rar_generic +ffffffff8179c5e0 T ixgbe_clear_rar_generic +ffffffff8179c6e0 T ixgbe_init_rx_addrs_generic +ffffffff8179c8e0 T ixgbe_update_mc_addr_list_generic +ffffffff8179cae0 T ixgbe_enable_mc_generic +ffffffff8179cb50 T ixgbe_disable_mc_generic +ffffffff8179cbb0 T ixgbe_enable_rx_generic +ffffffff8179cc70 T ixgbe_disable_rx_generic +ffffffff8179cd50 T ixgbe_fc_enable_generic +ffffffff8179d180 T ixgbe_setup_fc_generic +ffffffff8179d450 T ixgbe_fc_autoneg +ffffffff8179d620 T ixgbe_device_supports_autoneg_fc +ffffffff8179d720 T ixgbe_start_hw_gen2 +ffffffff8179d900 T ixgbe_identify_phy +ffffffff8179d960 T ixgbe_set_pci_config_data_generic +ffffffff8179d9e0 T ixgbe_disable_rx +ffffffff8179da20 T ixgbe_disable_pcie_master +ffffffff8179db70 T ixgbe_read_eerd_buffer_generic +ffffffff8179dcb0 T ixgbe_poll_eerd_eewr_done +ffffffff8179dd50 T ixgbe_write_eewr_buffer_generic +ffffffff8179ded0 T ixgbe_write_eewr_generic +ffffffff8179df20 T ixgbe_acquire_eeprom +ffffffff8179e0a0 T ixgbe_get_eeprom_semaphore +ffffffff8179e2b0 T ixgbe_release_eeprom_semaphore +ffffffff8179e320 T ixgbe_ready_eeprom +ffffffff8179e490 T ixgbe_shift_out_eeprom_bits +ffffffff8179e650 T ixgbe_shift_in_eeprom_bits +ffffffff8179e7b0 T ixgbe_standby_eeprom +ffffffff8179e890 T ixgbe_raise_eeprom_clk +ffffffff8179e900 T ixgbe_lower_eeprom_clk +ffffffff8179e970 T ixgbe_release_eeprom +ffffffff8179ea50 T ixgbe_validate_mac_addr +ffffffff8179eab0 T ixgbe_init_uta_tables +ffffffff8179eaf0 T ixgbe_add_uc_addr +ffffffff8179eb60 T ixgbe_mta_vector +ffffffff8179ec10 T ixgbe_set_mta +ffffffff8179ecd0 T ixgbe_negotiate_fc +ffffffff8179ed80 T ixgbe_fc_autoneg_fiber +ffffffff8179eeb0 T ixgbe_fc_autoneg_backplane +ffffffff8179f010 T ixgbe_fc_autoneg_copper +ffffffff8179f140 T ixgbe_disable_sec_rx_path_generic +ffffffff8179f200 T ixgbe_enable_sec_rx_path_generic +ffffffff8179f290 T ixgbe_enable_rx +ffffffff8179f2d0 T ixgbe_get_pcie_msix_count_generic +ffffffff8179f350 T ixgbe_insert_mac_addr_generic +ffffffff8179f560 T ixgbe_set_vmdq +ffffffff8179f5a0 T ixgbe_set_rar +ffffffff8179f5f0 T ixgbe_clear_vmdq +ffffffff8179f630 T ixgbe_clear_vmdq_generic +ffffffff8179f7d0 T ixgbe_set_vmdq_generic +ffffffff8179f880 T ixgbe_init_uta_tables_generic +ffffffff8179f900 T ixgbe_find_vlvf_slot +ffffffff8179f9c0 T ixgbe_set_vfta_generic +ffffffff8179fad0 T ixgbe_set_vlvf_generic +ffffffff8179fd60 T ixgbe_clear_vfta_generic +ffffffff8179fe60 T ixgbe_need_crosstalk_fix +ffffffff8179feb0 T ixgbe_check_mac_link_generic +ffffffff817a00a0 T ixgbe_get_device_caps_generic +ffffffff817a00f0 T ixgbe_calculate_checksum +ffffffff817a01b0 T ixgbe_hic_unlocked +ffffffff817a0390 T ixgbe_host_interface_command +ffffffff817a0560 T ixgbe_clear_tx_pending +ffffffff817a0750 T ixgbe_mng_present +ffffffff817a07c0 T ixgbe_mng_enabled +ffffffff817a0880 T ixgbe_setup_mac_link_multispeed_fiber +ffffffff817a0c40 T ixgbe_flap_tx_laser +ffffffff817a0c80 T ixgbe_check_link +ffffffff817a0cd0 T ixgbe_set_soft_rate_select_speed +ffffffff817a0dc0 T ixgbe_init_shared_code +ffffffff817a0e70 T ixgbe_set_mac_type +ffffffff817a1030 T ixgbe_init_hw +ffffffff817a1070 T ixgbe_get_media_type +ffffffff817a10b0 T ixgbe_read_mbx +ffffffff817a1110 T ixgbe_write_mbx +ffffffff817a1160 T ixgbe_check_for_msg +ffffffff817a11a0 T ixgbe_check_for_ack +ffffffff817a11e0 T ixgbe_check_for_rst +ffffffff817a1220 T ixgbe_poll_for_msg +ffffffff817a12e0 T ixgbe_poll_for_ack +ffffffff817a13a0 T ixgbe_read_posted_mbx +ffffffff817a1480 T ixgbe_write_posted_mbx +ffffffff817a1550 T ixgbe_init_mbx_ops_generic +ffffffff817a1590 T ixgbe_read_v2p_mailbox +ffffffff817a1600 T ixgbe_check_for_bit_pf +ffffffff817a1690 T ixgbe_check_for_msg_pf +ffffffff817a1740 T ixgbe_check_for_ack_pf +ffffffff817a17e0 T ixgbe_check_for_rst_pf +ffffffff817a18e0 T ixgbe_obtain_mbx_lock_pf +ffffffff817a1970 T ixgbe_write_mbx_pf +ffffffff817a1b40 T ixgbe_read_mbx_pf +ffffffff817a1c50 T ixgbe_init_mbx_params_pf +ffffffff817a2000 T ixgbe_set_pcie_completion_timeout +ffffffff817a2090 T ixgbe_init_ops_82598 +ffffffff817a21e0 T ixgbe_init_phy_ops_82598 +ffffffff817a22d0 T ixgbe_start_hw_82598 +ffffffff817a2480 T ixgbe_reset_hw_82598 +ffffffff817a2950 T ixgbe_get_media_type_82598 +ffffffff817a2a20 T ixgbe_get_supported_physical_layer_82598 +ffffffff817a2bf0 T ixgbe_read_analog_reg8_82598 +ffffffff817a2cb0 T ixgbe_write_analog_reg8_82598 +ffffffff817a2d30 T ixgbe_set_lan_id_multi_port_pcie_82598 +ffffffff817a2dd0 T ixgbe_enable_rx_dma_82598 +ffffffff817a2e20 T ixgbe_set_vmdq_82598 +ffffffff817a2ed0 T ixgbe_clear_vmdq_82598 +ffffffff817a2f80 T ixgbe_set_vfta_82598 +ffffffff817a30b0 T ixgbe_clear_vfta_82598 +ffffffff817a3260 T ixgbe_fc_enable_82598 +ffffffff817a36c0 T ixgbe_read_i2c_eeprom_82598 +ffffffff817a36e0 T ixgbe_check_mac_link_82598 +ffffffff817a3980 T ixgbe_setup_mac_link_82598 +ffffffff817a3b40 T ixgbe_get_link_capabilities_82598 +ffffffff817a3c10 T ixgbe_setup_copper_link_82598 +ffffffff817a3d20 T ixgbe_start_mac_link_82598 +ffffffff817a3e40 T ixgbe_validate_link_ready +ffffffff817a3ef0 T ixgbe_read_i2c_phy_82598 +ffffffff817a5000 T ixgbe_init_mac_link_ops_82599 +ffffffff817a5190 T ixgbe_disable_tx_laser_multispeed_fiber +ffffffff817a5260 T ixgbe_enable_tx_laser_multispeed_fiber +ffffffff817a52e0 T ixgbe_flap_tx_laser_multispeed_fiber +ffffffff817a5420 T ixgbe_setup_mac_link_82599 +ffffffff817a56b0 T ixgbe_set_hard_rate_select_speed +ffffffff817a5770 T ixgbe_verify_lesm_fw_enabled_82599 +ffffffff817a5830 T ixgbe_setup_mac_link_smartspeed +ffffffff817a5bb0 T ixgbe_init_phy_ops_82599 +ffffffff817a5d00 T ixgbe_read_i2c_byte_82599 +ffffffff817a5e80 T ixgbe_write_i2c_byte_82599 +ffffffff817a6000 T ixgbe_setup_copper_link_82599 +ffffffff817a6060 T ixgbe_setup_sfp_modules_82599 +ffffffff817a6220 T prot_autoc_read_82599 +ffffffff817a6330 T prot_autoc_write_82599 +ffffffff817a64a0 T ixgbe_reset_pipeline_82599 +ffffffff817a67e0 T ixgbe_init_ops_82599 +ffffffff817a69c0 T ixgbe_identify_phy_82599 +ffffffff817a6a50 T ixgbe_reset_hw_82599 +ffffffff817a6fa0 T ixgbe_get_media_type_82599 +ffffffff817a70d0 T ixgbe_get_supported_physical_layer_82599 +ffffffff817a72a0 T ixgbe_enable_rx_dma_82599 +ffffffff817a7310 T ixgbe_read_analog_reg8_82599 +ffffffff817a73d0 T ixgbe_write_analog_reg8_82599 +ffffffff817a7450 T ixgbe_start_hw_82599 +ffffffff817a7550 T ixgbe_get_link_capabilities_82599 +ffffffff817a7690 T ixgbe_stop_mac_link_on_d3_82599 +ffffffff817a7750 T ixgbe_read_eeprom_82599 +ffffffff817a7780 T ixgbe_start_mac_link_82599 +ffffffff817a7960 T ixgbe_verify_fw_version_82599 +ffffffff817a8000 T ixgbe_init_ops_X540 +ffffffff817a8220 T ixgbe_init_eeprom_params_X540 +ffffffff817a82b0 T ixgbe_read_eerd_X540 +ffffffff817a8340 T ixgbe_write_eewr_X540 +ffffffff817a83d0 T ixgbe_update_eeprom_checksum_X540 +ffffffff817a84a0 T ixgbe_validate_eeprom_checksum_X540 +ffffffff817a8590 T ixgbe_calc_eeprom_checksum_X540 +ffffffff817a8730 T ixgbe_reset_hw_X540 +ffffffff817a8ac0 T ixgbe_get_media_type_X540 +ffffffff817a8af0 T ixgbe_get_supported_physical_layer_X540 +ffffffff817a8b70 T ixgbe_start_hw_X540 +ffffffff817a8bc0 T ixgbe_acquire_swfw_sync_X540 +ffffffff817a9010 T ixgbe_release_swfw_sync_X540 +ffffffff817a9140 T ixgbe_init_swfw_sync_X540 +ffffffff817a9220 T ixgbe_setup_mac_link_X540 +ffffffff817a9240 T ixgbe_blink_led_start_X540 +ffffffff817a9360 T ixgbe_blink_led_stop_X540 +ffffffff817a9460 T ixgbe_get_link_capabilities_X540 +ffffffff817a94a0 T ixgbe_update_flash_X540 +ffffffff817a9680 T ixgbe_poll_flash_update_done_X540 +ffffffff817a9710 T ixgbe_get_swfw_sync_semaphore +ffffffff817a98a0 T ixgbe_release_swfw_sync_semaphore +ffffffff817aa000 T ixgbe_init_ops_X550 +ffffffff817aa110 T ixgbe_dmac_config_X550 +ffffffff817aa1f0 T ixgbe_dmac_config_tcs_X550 +ffffffff817aa340 T ixgbe_dmac_update_tcs_X550 +ffffffff817aa400 T ixgbe_set_source_address_pruning_X550 +ffffffff817aa4f0 T ixgbe_init_eeprom_params_X550 +ffffffff817aa570 T ixgbe_calc_eeprom_checksum_X550 +ffffffff817aa590 T ixgbe_read_ee_hostif_X550 +ffffffff817aa660 T ixgbe_write_ee_hostif_X550 +ffffffff817aa720 T ixgbe_update_eeprom_checksum_X550 +ffffffff817aa8b0 T ixgbe_validate_eeprom_checksum_X550 +ffffffff817aaa00 T ixgbe_disable_rx_x550 +ffffffff817aab20 T ixgbe_led_on_t_X550em +ffffffff817aabe0 T ixgbe_led_off_t_X550em +ffffffff817aaca0 T ixgbe_read_cs4227 +ffffffff817aacd0 T ixgbe_write_cs4227 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ixgbe_setup_fw_link +ffffffff817ace10 T ixgbe_fc_autoneg_fw +ffffffff817ace40 T ixgbe_setup_eee_fw +ffffffff817acea0 T ixgbe_init_ops_X550EM_a +ffffffff817acfd0 T ixgbe_read_iosf_sb_reg_x550 +ffffffff817ad150 T ixgbe_write_iosf_sb_reg_x550 +ffffffff817ad2d0 T ixgbe_read_iosf_sb_reg_x550a +ffffffff817ad370 T ixgbe_write_iosf_sb_reg_x550a +ffffffff817ad400 T ixgbe_acquire_swfw_sync_X550a +ffffffff817ad540 T ixgbe_release_swfw_sync_X550a +ffffffff817ad5e0 T ixgbe_fc_autoneg_fiber_x550em_a +ffffffff817ad620 T ixgbe_fc_autoneg_backplane_x550em_a +ffffffff817ad780 T ixgbe_setup_fc_backplane_x550em_a +ffffffff817ad970 T ixgbe_fc_autoneg_sgmii_x550em_a +ffffffff817ada60 T ixgbe_init_ops_X550EM_x +ffffffff817adb20 T ixgbe_acquire_swfw_sync_X550em +ffffffff817adbe0 T ixgbe_release_swfw_sync_X550em +ffffffff817adc70 T ixgbe_iosf_wait +ffffffff817add20 T ixgbe_get_phy_token +ffffffff817adda0 T ixgbe_put_phy_token +ffffffff817ade20 T ixgbe_supported_sfp_modules_X550em +ffffffff817adea0 T ixgbe_identify_sfp_module_X550em +ffffffff817adf20 T ixgbe_init_mac_link_ops_X550em +ffffffff817ae060 T ixgbe_restart_an_internal_phy_x550em +ffffffff817ae170 T ixgbe_setup_sgmii +ffffffff817ae410 T ixgbe_setup_sgmii_fw +ffffffff817ae6f0 T ixgbe_setup_mac_link_sfp_x550a +ffffffff817ae8e0 T ixgbe_setup_mac_link_sfp_x550em +ffffffff817ae9a0 T ixgbe_setup_mac_link_t_X550em +ffffffff817aea50 T ixgbe_check_link_t_X550em +ffffffff817aeb30 T ixgbe_get_lasi_ext_t_x550em +ffffffff817aecb0 T ixgbe_enable_lasi_ext_t_x550em +ffffffff817aee40 T ixgbe_setup_kr_speed_x550em +ffffffff817af050 T ixgbe_reset_phy_fw +ffffffff817af120 T ixgbe_check_overtemp_fw +ffffffff817af1b0 T ixgbe_read_phy_reg_x550a +ffffffff817af250 T ixgbe_write_phy_reg_x550a +ffffffff817af300 T ixgbe_setup_kr_x550em +ffffffff817af370 T ixgbe_setup_internal_phy_t_x550em +ffffffff817af500 T ixgbe_enter_lplu_t_x550em +ffffffff817af7f0 T ixgbe_handle_lasi_ext_t_x550em +ffffffff817af870 T ixgbe_reset_phy_t_X550em +ffffffff817af8c0 T ixgbe_set_mdio_speed +ffffffff817af9a0 T ixgbe_init_ext_t_x550em +ffffffff817afa50 T ixgbe_setup_sfi_x550a +ffffffff817afc00 T ixgbe_setup_ixfi_x550em_x +ffffffff817afde0 T ixgbe_setup_ixfi_x550em +ffffffff817affc0 T ixgbe_ext_phy_t_x550em_get_link +ffffffff817b0050 T ixgbe_setup_phy_loopback_x550em +ffffffff817b0240 T ixgbe_read_ee_hostif_buffer_X550 +ffffffff817b03d0 T ixgbe_write_ee_hostif_data_X550 +ffffffff817b0440 T ixgbe_checksum_ptr_x550 +ffffffff817b05d0 T ixgbe_calc_checksum_X550 +ffffffff817b0760 T ixgbe_update_flash_X550 +ffffffff817b07b0 T ixgbe_get_lcd_t_x550em +ffffffff817b0870 T ixgbe_set_mux +ffffffff817b1000 T ixgbe_read_i2c_combined_generic_int +ffffffff817b1260 T ixgbe_i2c_start +ffffffff817b13c0 T ixgbe_clock_in_i2c_byte +ffffffff817b14b0 T ixgbe_clock_out_i2c_bit +ffffffff817b15c0 T ixgbe_i2c_stop +ffffffff817b1750 T ixgbe_i2c_bus_clear +ffffffff817b1870 T ixgbe_read_i2c_combined_generic +ffffffff817b1890 T ixgbe_read_i2c_combined_generic_unlocked +ffffffff817b18b0 T ixgbe_write_i2c_combined_generic_int +ffffffff817b1a90 T ixgbe_write_i2c_combined_generic +ffffffff817b1ab0 T ixgbe_write_i2c_combined_generic_unlocked +ffffffff817b1ad0 T ixgbe_init_phy_ops_generic +ffffffff817b1c00 T ixgbe_identify_phy_generic +ffffffff817b20d0 T ixgbe_reset_phy_generic +ffffffff817b2260 T ixgbe_read_phy_reg_generic +ffffffff817b2300 T ixgbe_write_phy_reg_generic +ffffffff817b23a0 T ixgbe_read_phy_reg_mdi +ffffffff817b2520 T ixgbe_write_phy_reg_mdi +ffffffff817b2690 T ixgbe_setup_phy_link_generic +ffffffff817b2940 T ixgbe_setup_phy_link_speed_generic +ffffffff817b2990 T ixgbe_get_phy_firmware_version_generic +ffffffff817b29c0 T ixgbe_read_i2c_byte_generic +ffffffff817b29e0 T ixgbe_write_i2c_byte_generic +ffffffff817b2a00 T ixgbe_read_i2c_eeprom_generic +ffffffff817b2a30 T ixgbe_write_i2c_eeprom_generic +ffffffff817b2a50 T ixgbe_identify_module_generic +ffffffff817b2ac0 T ixgbe_read_i2c_byte_generic_unlocked +ffffffff817b2ae0 T ixgbe_write_i2c_byte_generic_unlocked +ffffffff817b2b00 T ixgbe_tn_check_overtemp +ffffffff817b2b70 T ixgbe_check_reset_blocked +ffffffff817b2bd0 T ixgbe_validate_phy_addr +ffffffff817b2c40 T ixgbe_get_phy_id +ffffffff817b2cf0 T ixgbe_get_phy_type_from_id +ffffffff817b2db0 T ixgbe_get_copper_link_capabilities_generic +ffffffff817b2ea0 T ixgbe_get_copper_speeds_supported +ffffffff817b2f60 T ixgbe_check_phy_link_tnx +ffffffff817b3220 T ixgbe_setup_phy_link_tnx +ffffffff817b34d0 T ixgbe_get_phy_firmware_version_tnx +ffffffff817b3500 T ixgbe_reset_phy_nl +ffffffff817b37a0 T ixgbe_get_sfp_init_sequence_offsets +ffffffff817b3980 T ixgbe_is_sfp +ffffffff817b39d0 T ixgbe_identify_sfp_module_generic +ffffffff817b3dc0 T ixgbe_identify_qsfp_module_generic +ffffffff817b40b0 T ixgbe_get_supported_phy_sfp_layer_generic +ffffffff817b4250 T ixgbe_is_sfp_probe +ffffffff817b42a0 T ixgbe_read_i2c_byte_generic_int +ffffffff817b44a0 T ixgbe_clock_out_i2c_byte +ffffffff817b4600 T ixgbe_get_i2c_ack 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iwn_ampdu_tx_stop +ffffffff81817980 T iwn_newstate +ffffffff81817c40 T iwn_media_change +ffffffff81817da0 T iwn_radiotap_attach +ffffffff81817e30 T iwn_calib_timeout +ffffffff81818060 T iwn_init_task +ffffffff818180d0 T iwn_free_tx_ring +ffffffff818182c0 T iwn_free_sched +ffffffff818183b0 T iwn_free_ict +ffffffff818184a0 T iwn_free_kw +ffffffff81818590 T iwn_free_fwmem +ffffffff81818680 T iwn4965_load_firmware +ffffffff81818cd0 T iwn4965_read_eeprom +ffffffff81818e20 T iwn4965_post_alive +ffffffff818192f0 T iwn4965_nic_config +ffffffff818193d0 T iwn4965_reset_sched +ffffffff81819400 T iwn4965_update_sched +ffffffff818194e0 T iwn4965_update_rxon +ffffffff81819730 T iwn4965_get_temperature +ffffffff818197b0 T iwn4965_get_rssi +ffffffff81819820 T iwn4965_set_txpower +ffffffff81819d60 T iwn4965_init_gains +ffffffff81819f00 T iwn4965_set_gains +ffffffff8181a240 T iwn4965_add_node +ffffffff8181a2d0 T iwn4965_tx_done +ffffffff8181a430 T iwn4965_ampdu_tx_start +ffffffff8181a840 T iwn4965_ampdu_tx_stop +ffffffff8181aa40 T iwn5000_load_firmware +ffffffff8181ab50 T iwn5000_read_eeprom +ffffffff8181ada0 T iwn5000_post_alive +ffffffff8181b720 T iwn5000_nic_config +ffffffff8181baf0 T iwn5000_reset_sched +ffffffff8181bbe0 T iwn5000_update_sched +ffffffff8181bcd0 T iwn5000_update_rxon +ffffffff8181bf50 T iwn5000_get_temperature +ffffffff8181bfb0 T iwn5000_get_rssi +ffffffff8181c000 T iwn5000_set_txpower +ffffffff8181c050 T iwn5000_init_gains +ffffffff8181c1f0 T iwn5000_set_gains +ffffffff8181c490 T iwn5000_add_node +ffffffff8181c4c0 T iwn5000_tx_done +ffffffff8181c6c0 T iwn5000_ampdu_tx_start +ffffffff8181cb00 T iwn5000_ampdu_tx_stop +ffffffff8181cd80 T iwn_free_rx_ring +ffffffff8181cf70 T iwn_stop +ffffffff8181cff0 T iwn_wakeup +ffffffff8181d0a0 T iwn_init +ffffffff8181d3a0 T iwn_nic_lock +ffffffff8181d460 T iwn_eeprom_lock +ffffffff8181d530 T iwn_init_otprom +ffffffff8181d990 T iwn_clock_wait +ffffffff8181da60 T iwn_read_prom_data +ffffffff8181de40 T iwn_dma_contig_alloc +ffffffff8181e030 T iwn_dma_contig_free +ffffffff8181e0f0 T iwn_reset_rx_ring +ffffffff8181e280 T iwn_reset_tx_ring +ffffffff8181e380 T iwn5000_ict_reset +ffffffff8181e460 T iwn_apm_init +ffffffff8181e890 T iwn_apm_stop +ffffffff8181e9d0 T iwn_read_eeprom_channels +ffffffff8181eb40 T iwn_read_eeprom_enhinfo +ffffffff8181ecc0 T iwn_scan_abort +ffffffff8181ee50 T iwn_set_led +ffffffff8181f020 T iwn_cmd +ffffffff8181f370 T iwn_scan +ffffffff8181f820 T iwn_auth +ffffffff8181fae0 T iwn_run +ffffffff8181ffa0 T iwn_iter_func +ffffffff81820030 T iwn_set_link_quality +ffffffff81820520 T iwn_ccmp_decap +ffffffff81820620 T iwn_rx_phy +ffffffff81820700 T iwn_rx_done +ffffffff81820d20 T iwn_ra_choose +ffffffff81820da0 T iwn_ampdu_rate_control +ffffffff81820ef0 T iwn_ht_single_rate_control +ffffffff818210f0 T iwn_rx_compressed_ba +ffffffff818213c0 T iwn_ampdu_txq_advance +ffffffff81821550 T iwn_clear_oactive +ffffffff818215d0 T iwn5000_rx_calib_results +ffffffff81821740 T iwn_rx_statistics +ffffffff818218e0 T iwn4965_power_calibration +ffffffff81821930 T iwn_get_noise +ffffffff818219a0 T iwn_collect_noise +ffffffff81821b00 T iwn_tune_sensitivity +ffffffff81822210 T iwn_tx_done_free_txdata +ffffffff818222c0 T iwn_ampdu_tx_done +ffffffff81822570 T iwn_tx_done +ffffffff818227e0 T iwn_cmd_done +ffffffff818228d0 T iwn_notif_intr +ffffffff81822f20 T iwn_init_sensitivity +ffffffff818231e0 T iwn_wakeup_intr +ffffffff818232a0 T iwn_fatal_intr +ffffffff81823590 T iwn_rval2ridx +ffffffff81823610 T iwn_tx +ffffffff81824110 T iwn_rxon_ht40_enabled +ffffffff81824150 T iwn_set_pslevel +ffffffff81824310 T iwn_add_broadcast_node +ffffffff81824550 T iwn_set_critical_temp +ffffffff81824600 T iwn_set_timing +ffffffff818247d0 T iwn_send_sensitivity +ffffffff818248d0 T iwn_send_btcoex +ffffffff81824930 T iwn_send_advanced_btcoex +ffffffff81825090 T iwn5000_runtime_calib +ffffffff81825140 T iwn_config +ffffffff81825680 T iwn6000_temp_offset_calib +ffffffff818256f0 T iwn2000_temp_offset_calib +ffffffff81825790 T iwn_get_active_dwell_time +ffffffff818257d0 T iwn_limit_dwell +ffffffff81825840 T iwn_get_passive_dwell_time +ffffffff818258c0 T iwn_rxon_configure_ht40 +ffffffff81825970 T iwn_update_rxon_restore_power +ffffffff81825a30 T iwn5000_query_calibration +ffffffff81825b20 T iwn5000_send_calibration +ffffffff81825c70 T iwn5000_send_wimax_coex +ffffffff81825d00 T iwn5000_crystal_calib +ffffffff81825d60 T iwn_hw_stop +ffffffff81826150 T iwn_hw_init +ffffffff81826870 T iwn4965_load_bootcode +ffffffff81826c20 T iwn5000_load_firmware_section +ffffffff81826e70 T iwn_read_firmware_leg +ffffffff81826f80 T iwn_read_firmware_tlv +ffffffff81827200 T iwn_read_firmware +ffffffff81827430 T iwn_apm_stop_master +ffffffff81828000 T iwm_lookup_cmd_ver +ffffffff81828070 T iwm_is_mimo_ht_plcp +ffffffff818280b0 T iwm_is_mimo_ht_mcs +ffffffff818280f0 T iwm_store_cscheme +ffffffff81828140 T iwm_firmware_store_section +ffffffff818281e0 T iwm_set_default_calib +ffffffff81828230 T iwm_fw_info_free +ffffffff81828280 T iwm_fw_version_str +ffffffff818282c0 T iwm_read_firmware +ffffffff81828c10 T iwm_read_prph_unlocked +ffffffff81828c70 T iwm_read_prph +ffffffff81828cf0 T iwm_nic_assert_locked +ffffffff81828d50 T iwm_write_prph_unlocked +ffffffff81828dc0 T iwm_write_prph +ffffffff81828e50 T iwm_write_prph64 +ffffffff81828f50 T iwm_read_mem +ffffffff81829080 T iwm_nic_lock +ffffffff818291d0 T iwm_nic_unlock +ffffffff81829280 T iwm_write_mem +ffffffff818293c0 T iwm_write_mem32 +ffffffff818294d0 T iwm_poll_bit +ffffffff818295a0 T iwm_set_bits_mask_prph +ffffffff81829740 T iwm_set_bits_prph +ffffffff81829760 T iwm_clear_bits_prph +ffffffff81829780 T iwm_dma_contig_alloc +ffffffff81829970 T iwm_dma_contig_free +ffffffff81829a30 T iwm_alloc_rx_ring +ffffffff81829c10 T iwm_rx_addbuf +ffffffff81829df0 T iwm_free_rx_ring +ffffffff8182a0a0 T iwm_disable_rx_dma +ffffffff8182a2c0 T iwm_reset_rx_ring +ffffffff8182a340 T iwm_alloc_tx_ring +ffffffff8182a520 T iwm_free_tx_ring +ffffffff8182a720 T iwm_reset_tx_ring +ffffffff8182a8e0 T iwm_enable_rfkill_int +ffffffff8182aa00 T iwm_check_rfkill +ffffffff8182aa80 T iwm_enable_interrupts +ffffffff8182ab30 T iwm_enable_fwload_interrupt +ffffffff8182ac00 T iwm_restore_interrupts +ffffffff8182ac30 T iwm_disable_interrupts +ffffffff8182acf0 T iwm_ict_reset +ffffffff8182aeb0 T iwm_set_hw_ready +ffffffff8182b090 T iwm_prepare_card_hw +ffffffff8182b1d0 T iwm_apm_config +ffffffff8182b2b0 T iwm_apm_init +ffffffff8182b9a0 T iwm_apm_stop +ffffffff8182bd60 T iwm_init_msix_hw +ffffffff8182be00 T iwm_conf_msix_hw +ffffffff8182c350 T iwm_clear_persistence_bit +ffffffff8182c4a0 T iwm_start_hw +ffffffff8182c6c0 T iwm_stop_device +ffffffff8182cce0 T iwm_nic_config +ffffffff8182cdc0 T iwm_nic_rx_init +ffffffff8182cde0 T iwm_nic_rx_mq_init +ffffffff8182d1e0 T iwm_nic_rx_legacy_init +ffffffff8182d420 T iwm_nic_tx_init +ffffffff8182d5f0 T iwm_nic_init +ffffffff8182d750 T iwm_enable_ac_txq +ffffffff8182dbd0 T iwm_enable_txq +ffffffff8182ddb0 T iwm_send_cmd_pdu +ffffffff8182de30 T iwm_disable_txq +ffffffff8182df10 T iwm_post_alive +ffffffff8182e490 T iwm_phy_db_get_section +ffffffff8182e540 T iwm_phy_db_set_section +ffffffff8182e690 T iwm_is_valid_channel +ffffffff8182e700 T iwm_ch_id_to_ch_index +ffffffff8182e780 T iwm_channel_id_to_papd +ffffffff8182e820 T iwm_channel_id_to_txp +ffffffff8182e9c0 T iwm_phy_db_get_section_data +ffffffff8182eb50 T iwm_send_phy_db_cmd +ffffffff8182ebf0 T iwm_send_cmd +ffffffff8182f2d0 T iwm_phy_db_send_all_channel_groups +ffffffff8182f4a0 T iwm_send_phy_db_data +ffffffff8182f790 T iwm_send_time_event_cmd +ffffffff8182f8a0 T iwm_free_resp +ffffffff8182f920 T iwm_protect_session +ffffffff8182f9d0 T iwm_unprotect_session +ffffffff8182fa80 T iwm_nvm_read_chunk +ffffffff8182fbe0 T iwm_nvm_read_section +ffffffff8182fca0 T iwm_fw_valid_tx_ant +ffffffff8182fce0 T iwm_fw_valid_rx_ant +ffffffff8182fd30 T iwm_valid_siso_ant_rate_mask +ffffffff8182fd90 T iwm_init_channel_map +ffffffff8182ff10 T iwm_mimo_enabled +ffffffff8182ff50 T iwm_setup_ht_rates +ffffffff81830000 T iwm_setup_vht_rates +ffffffff81830090 T iwm_init_reorder_buffer +ffffffff818300f0 T iwm_clear_reorder_buffer +ffffffff818301b0 T iwm_rx_ba_session_expired +ffffffff818302b0 T iwm_reorder_timer_expired +ffffffff81830470 T iwm_release_frames +ffffffff81830660 T iwm_sta_rx_agg +ffffffff81830b60 T iwm_send_cmd_pdu_status +ffffffff81830bf0 T iwm_mac_ctxt_task +ffffffff81830d50 T iwm_mac_ctxt_cmd +ffffffff81830f50 T iwm_updateprot +ffffffff81831010 T iwm_add_task +ffffffff81831080 T iwm_updateslot +ffffffff81831140 T iwm_updateedca +ffffffff81831200 T iwm_phy_ctxt_task +ffffffff818313d0 T iwm_phy_ctxt_update +ffffffff81831540 T iwm_setrates +ffffffff818316d0 T iwm_updatechan +ffffffff81831790 T iwm_updatedtim +ffffffff81831850 T iwm_sta_tx_agg +ffffffff81831d60 T iwm_flush_sta +ffffffff81831f00 T iwm_txq_advance +ffffffff818320f0 T iwm_clear_oactive +ffffffff81832170 T iwm_ba_task +ffffffff818323c0 T iwm_ampdu_rx_start +ffffffff818324a0 T iwm_ampdu_rx_stop +ffffffff81832580 T iwm_ampdu_tx_start +ffffffff818326a0 T iwm_ampdu_tx_stop +ffffffff81832780 T iwm_set_hw_address_8000 +ffffffff81832a00 T iwm_parse_nvm_data +ffffffff81832c50 T iwm_parse_nvm_sections +ffffffff81832d50 T iwm_nvm_init +ffffffff81833010 T iwm_firmware_load_sect +ffffffff818330c0 T iwm_firmware_load_chunk +ffffffff81833370 T iwm_load_firmware_7000 +ffffffff818335c0 T iwm_load_cpu_sections_8000 +ffffffff81833960 T iwm_load_firmware_8000 +ffffffff81833b70 T iwm_load_firmware +ffffffff81833c50 T iwm_start_fw +ffffffff81833e20 T iwm_send_tx_ant_cfg +ffffffff81833eb0 T iwm_send_phy_cfg_cmd +ffffffff81833f60 T iwm_send_dqa_cmd +ffffffff81833ff0 T iwm_load_ucode_wait_alive +ffffffff81834230 T iwm_save_fw_paging +ffffffff818342a0 T iwm_send_paging_cmd +ffffffff818343f0 T iwm_free_fw_paging +ffffffff81834560 T iwm_run_init_mvm_ucode +ffffffff818349b0 T iwm_send_bt_init_conf +ffffffff81834a50 T iwm_sf_config +ffffffff81834ca0 T iwm_config_ltr +ffffffff81834d60 T iwm_get_signal_strength +ffffffff81834dc0 T iwm_rxmq_get_signal_strength +ffffffff81834e10 T iwm_rx_rx_phy_cmd +ffffffff81834e70 T iwm_get_noise +ffffffff81834ee0 T iwm_ccmp_decap +ffffffff81834fe0 T iwm_rx_hwdecrypt +ffffffff818350b0 T iwm_rx_frame +ffffffff818353e0 T iwm_rx_mpdu +ffffffff818355f0 T iwm_flip_address +ffffffff81835640 T iwm_detect_duplicate +ffffffff81835740 T iwm_is_sn_less +ffffffff818357a0 T iwm_oldsn_workaround +ffffffff81835860 T iwm_rx_reorder +ffffffff81835e90 T iwm_rx_mpdu_mq +ffffffff818362a0 T iwm_ra_choose +ffffffff81836360 T iwm_ht_single_rate_control +ffffffff81836590 T iwm_vht_single_rate_control +ffffffff818367e0 T iwm_rx_tx_cmd_single +ffffffff818369b0 T iwm_txd_done +ffffffff81836a80 T iwm_reset_sched +ffffffff81836b30 T iwm_ampdu_tx_done +ffffffff81836e80 T iwm_rx_tx_cmd +ffffffff81837050 T iwm_ampdu_rate_control +ffffffff81837210 T iwm_rx_compressed_ba +ffffffff818373f0 T iwm_rx_bmiss +ffffffff818374e0 T iwm_binding_cmd +ffffffff81837680 T iwm_phy_ctxt_cmd_hdr +ffffffff818376f0 T iwm_phy_ctxt_cmd_data +ffffffff81837870 T iwm_get_vht_ctrl_pos +ffffffff818378e0 T iwm_phy_ctxt_cmd_uhb +ffffffff81837b10 T iwm_phy_ctxt_cmd +ffffffff81837c60 T iwm_update_sched +ffffffff81837d30 T iwm_send_cmd_status +ffffffff81837e50 T iwm_cmd_done +ffffffff81837ff0 T iwm_tx_fill_cmd +ffffffff81838420 T iwm_rval2ridx +ffffffff818384b0 T iwm_tx +ffffffff81838f30 T iwm_flush_tx_path +ffffffff81839000 T iwm_wait_tx_queues_empty +ffffffff818390c0 T iwm_led_enable +ffffffff818390f0 T iwm_led_disable +ffffffff81839120 T iwm_led_is_enabled +ffffffff81839180 T iwm_led_blink_timeout +ffffffff81839200 T iwm_led_blink_start +ffffffff81839250 T iwm_led_blink_stop +ffffffff818392a0 T iwm_beacon_filter_send_cmd +ffffffff81839330 T iwm_beacon_filter_set_cqm_params +ffffffff81839370 T iwm_update_beacon_abort +ffffffff81839460 T iwm_power_build_cmd +ffffffff818394f0 T iwm_power_mac_update_mode +ffffffff81839700 T iwm_power_update_device +ffffffff818397a0 T iwm_enable_beacon_filter +ffffffff81839890 T iwm_disable_beacon_filter +ffffffff81839970 T iwm_add_sta_cmd +ffffffff81839d70 T iwm_add_aux_sta +ffffffff81839f10 T iwm_drain_sta +ffffffff8183a0c0 T iwm_rm_sta_cmd +ffffffff8183a180 T iwm_scan_rx_chain +ffffffff8183a1f0 T iwm_scan_rate_n_flags +ffffffff8183a2f0 T iwm_lmac_scan_fill_channels +ffffffff8183a3d0 T iwm_umac_scan_fill_channels +ffffffff8183a4c0 T iwm_fill_probe_req_v1 +ffffffff8183a560 T iwm_fill_probe_req +ffffffff8183a7a0 T iwm_lmac_scan +ffffffff8183aca0 T iwm_config_umac_scan +ffffffff8183aeb0 T iwm_umac_scan_size +ffffffff8183af20 T iwm_get_scan_req_umac_chan_param +ffffffff8183af70 T iwm_get_scan_req_umac_data +ffffffff8183afc0 T iwm_umac_scan +ffffffff8183b430 T iwm_mcc_update +ffffffff8183b4c0 T iwm_ridx2rate +ffffffff8183b530 T iwm_ack_rates +ffffffff8183b7f0 T iwm_mac_ctxt_cmd_common +ffffffff8183bb00 T iwm_mac_ctxt_cmd_fill_sta +ffffffff8183bbb0 T iwm_update_quotas +ffffffff8183bfa0 T iwm_del_task +ffffffff8183c000 T iwm_scan +ffffffff8183c270 T iwm_scan_abort +ffffffff8183c390 T iwm_bgscan +ffffffff8183c430 T iwm_bgscan_done +ffffffff8183c4d0 T iwm_bgscan_done_task +ffffffff8183c730 T iwm_umac_scan_abort +ffffffff8183c7c0 T iwm_lmac_scan_abort +ffffffff8183c860 T iwm_auth +ffffffff8183cc60 T iwm_deauth +ffffffff8183cfc0 T iwm_run +ffffffff8183d6a0 T iwm_allow_mcast +ffffffff8183d7a0 T iwm_run_stop +ffffffff8183de10 T iwm_node_alloc +ffffffff8183de30 T iwm_set_key_v1 +ffffffff8183df70 T iwm_set_key +ffffffff8183e1e0 T iwm_delete_key_v1 +ffffffff8183e310 T iwm_delete_key +ffffffff8183e590 T iwm_calib_timeout +ffffffff8183e650 T iwm_set_rate_table_vht +ffffffff8183e970 T iwm_set_rate_table +ffffffff8183ed70 T iwm_media_change +ffffffff8183ef60 T iwm_stop +ffffffff8183f400 T iwm_init +ffffffff8183f6c0 T iwm_newstate_task +ffffffff8183f840 T iwm_newstate +ffffffff8183f9a0 T iwm_endscan +ffffffff8183f9f0 T iwm_fill_sf_command +ffffffff8183faf0 T iwm_send_soc_conf +ffffffff8183fc30 T iwm_send_update_mcc_cmd +ffffffff8183fdf0 T iwm_send_temp_report_ths_cmd +ffffffff8183fec0 T iwm_tt_tx_backoff +ffffffff8183ff50 T iwm_fill_paging_mem +ffffffff81840180 T iwm_alloc_fw_paging_mem +ffffffff81840320 T iwm_init_hw +ffffffff81840cf0 T iwm_preinit +ffffffff81840f10 T iwm_start +ffffffff818410e0 T iwm_watchdog +ffffffff81841280 T iwm_nic_error +ffffffff81841770 T iwm_dump_driver_status +ffffffff81841810 T iwm_ioctl +ffffffff81841980 T iwm_nic_umac_error +ffffffff81841dc0 T iwm_desc_lookup +ffffffff81841f50 T iwm_rx_pkt_valid +ffffffff81841fa0 T iwm_rx_pkt +ffffffff81842d40 T iwm_notif_intr +ffffffff81842ea0 T iwm_intr +ffffffff818432d0 T iwm_intr_msix +ffffffff81843570 T iwm_match +ffffffff818435a0 T iwm_attach_hook +ffffffff818435e0 T iwm_attach +ffffffff81844670 T iwm_radiotap_attach +ffffffff81844700 T iwm_init_task +ffffffff818447c0 T iwm_resume +ffffffff818448f0 T iwm_wakeup +ffffffff818449a0 T iwm_activate +ffffffff81845000 T iwx_lookup_cmd_ver +ffffffff81845070 T iwx_lookup_notif_ver +ffffffff818450e0 T iwx_is_mimo_ht_plcp +ffffffff81845120 T iwx_store_cscheme +ffffffff81845170 T iwx_ctxt_info_alloc_dma +ffffffff81845210 T iwx_dma_contig_alloc +ffffffff818453f0 T iwx_ctxt_info_free_paging +ffffffff81845550 T iwx_dma_contig_free +ffffffff81845610 T iwx_get_num_sections +ffffffff81845690 T iwx_init_fw_sec +ffffffff81845b40 T iwx_fw_version_str +ffffffff81845b80 T iwx_alloc_fw_monitor_block +ffffffff81845c30 T iwx_alloc_fw_monitor +ffffffff81845cf0 T iwx_apply_debug_destination +ffffffff81846230 T iwx_nic_lock +ffffffff81846380 T iwx_write_prph +ffffffff81846420 T iwx_set_bits_prph +ffffffff81846440 T iwx_clear_bits_prph +ffffffff81846460 T iwx_read_prph +ffffffff81846500 T iwx_nic_unlock +ffffffff818465b0 T iwx_set_ltr +ffffffff81846700 T iwx_ctxt_info_init +ffffffff818469c0 T iwx_ctxt_info_free_fw_img +ffffffff81846b40 T iwx_ctxt_info_gen3_init +ffffffff81847130 T iwx_write_umac_prph +ffffffff818471e0 T iwx_firmware_store_section +ffffffff81847280 T iwx_set_default_calib +ffffffff818472d0 T iwx_fw_info_free +ffffffff81847360 T iwx_read_firmware +ffffffff81847ef0 T iwx_prph_addr_mask +ffffffff81847f30 T iwx_read_prph_unlocked +ffffffff81847fb0 T iwx_nic_assert_locked +ffffffff81848010 T iwx_write_prph_unlocked +ffffffff81848090 T iwx_write_prph64 +ffffffff818481c0 T iwx_read_umac_prph_unlocked +ffffffff81848240 T iwx_read_umac_prph +ffffffff818482e0 T iwx_write_umac_prph_unlocked +ffffffff81848360 T iwx_read_mem +ffffffff81848490 T iwx_write_mem +ffffffff818485d0 T iwx_write_mem32 +ffffffff818486e0 T iwx_poll_bit +ffffffff818487b0 T iwx_set_bits_mask_prph +ffffffff81848990 T iwx_alloc_rx_ring +ffffffff81848b70 T iwx_rx_addbuf +ffffffff81848d80 T iwx_free_rx_ring +ffffffff81849030 T iwx_disable_rx_dma +ffffffff81849290 T iwx_reset_rx_ring +ffffffff81849330 T iwx_alloc_tx_ring +ffffffff81849540 T iwx_free_tx_ring +ffffffff818497d0 T iwx_reset_tx_ring +ffffffff81849a30 T iwx_enable_rfkill_int +ffffffff81849b10 T iwx_check_rfkill +ffffffff81849b90 T iwx_enable_interrupts +ffffffff81849c40 T iwx_enable_fwload_interrupt +ffffffff81849d20 T iwx_restore_interrupts +ffffffff81849d50 T iwx_disable_interrupts +ffffffff81849e10 T iwx_ict_reset +ffffffff81849fd0 T iwx_set_hw_ready +ffffffff8184a1b0 T iwx_prepare_card_hw +ffffffff8184a2f0 T iwx_force_power_gating +ffffffff8184a3a0 T iwx_apm_config +ffffffff8184a470 T iwx_apm_init +ffffffff8184a6d0 T iwx_apm_stop +ffffffff8184aa90 T iwx_init_msix_hw +ffffffff8184ab30 T iwx_conf_msix_hw +ffffffff8184b0d0 T iwx_clear_persistence_bit +ffffffff8184b250 T iwx_start_hw +ffffffff8184b650 T iwx_stop_device +ffffffff8184bbc0 T iwx_nic_config +ffffffff8184bc50 T iwx_nic_rx_init +ffffffff8184bcb0 T iwx_nic_init +ffffffff8184bdd0 T iwx_enable_txq +ffffffff8184c0a0 T iwx_send_cmd +ffffffff8184c680 T iwx_free_resp +ffffffff8184c700 T iwx_disable_txq +ffffffff8184c960 T iwx_post_alive +ffffffff8184c9f0 T iwx_schedule_session_protection +ffffffff8184cac0 T iwx_send_cmd_pdu +ffffffff8184cb40 T iwx_unprotect_session +ffffffff8184cc10 T iwx_fw_valid_tx_ant +ffffffff8184cc50 T iwx_fw_valid_rx_ant +ffffffff8184cca0 T iwx_init_channel_map +ffffffff8184cea0 T iwx_mimo_enabled +ffffffff8184cee0 T iwx_setup_ht_rates +ffffffff8184cf90 T iwx_setup_vht_rates +ffffffff8184d020 T iwx_init_reorder_buffer +ffffffff8184d080 T iwx_clear_reorder_buffer +ffffffff8184d140 T iwx_rx_ba_session_expired +ffffffff8184d240 T iwx_rx_bar_frame_release +ffffffff8184d2f0 T iwx_release_frames +ffffffff8184d4e0 T iwx_reorder_timer_expired +ffffffff8184d6a0 T iwx_find_rxba_data +ffffffff8184d730 T iwx_sta_rx_agg_baid_cfg_cmd +ffffffff8184d990 T iwx_send_cmd_pdu_status +ffffffff8184da20 T iwx_sta_rx_agg_sta_cmd +ffffffff8184dc70 T iwx_sta_rx_agg +ffffffff8184df50 T iwx_mac_ctxt_task +ffffffff8184e0e0 T iwx_mac_ctxt_cmd +ffffffff8184e2c0 T iwx_phy_ctxt_task +ffffffff8184e480 T iwx_phy_ctxt_update +ffffffff8184e8e0 T iwx_updatechan +ffffffff8184e9a0 T iwx_add_task +ffffffff8184ea10 T iwx_updateprot +ffffffff8184ead0 T iwx_updateslot +ffffffff8184eb90 T iwx_updateedca +ffffffff8184ec50 T iwx_updatedtim +ffffffff8184ed10 T iwx_sta_tx_agg_start +ffffffff8184ef00 T iwx_ba_task +ffffffff8184f050 T iwx_ampdu_rx_start +ffffffff8184f130 T iwx_ampdu_rx_stop +ffffffff8184f210 T iwx_ampdu_tx_start +ffffffff8184f320 T iwx_set_mac_addr_from_csr +ffffffff8184f540 T iwx_flip_hw_address +ffffffff8184f590 T iwx_is_valid_mac_addr +ffffffff8184f630 T iwx_nvm_get +ffffffff8184f900 T iwx_load_firmware +ffffffff8184fae0 T iwx_start_fw +ffffffff8184fcc0 T iwx_pnvm_handle_section +ffffffff8184ffb0 T iwx_ctxt_info_gen3_set_pnvm +ffffffff81850000 T iwx_pnvm_parse +ffffffff818500f0 T iwx_load_pnvm +ffffffff81850490 T iwx_send_tx_ant_cfg +ffffffff81850520 T iwx_send_phy_cfg_cmd +ffffffff818505d0 T iwx_send_dqa_cmd +ffffffff81850660 T iwx_load_ucode_wait_alive +ffffffff81850720 T iwx_run_init_mvm_ucode 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T alc_rxintr +ffffffff8189c370 T alc_newbuf +ffffffff8189c4f0 T alc_rxeof +ffffffff8189c780 T alc_osc_reset +ffffffff8189c910 T alc_init_rx_ring +ffffffff8189ca10 T alc_init_rr_ring +ffffffff8189ca90 T alc_init_tx_ring +ffffffff8189cb40 T alc_init_cmb +ffffffff8189cb80 T alc_init_smb +ffffffff8189cbd0 T alc_rxvlan +ffffffff8189cc40 T alc_stop_queue +ffffffff8189d000 T ale_match +ffffffff8189d030 T ale_attach +ffffffff8189d580 T ale_activate +ffffffff8189d600 T ale_miibus_readreg +ffffffff8189d720 T ale_miibus_writereg +ffffffff8189d830 T ale_miibus_statchg +ffffffff8189da50 T ale_stop_mac +ffffffff8189db40 T ale_mac_config +ffffffff8189dbe0 T ale_mediastatus +ffffffff8189dc50 T ale_mediachange +ffffffff8189dcb0 T ale_get_macaddr +ffffffff8189de90 T ale_phy_reset +ffffffff8189e4d0 T ale_intr +ffffffff8189e620 T ale_reset +ffffffff8189e790 T ale_dma_alloc +ffffffff8189ef00 T ale_ioctl +ffffffff8189f050 T ale_start +ffffffff8189f1c0 T ale_watchdog +ffffffff8189f240 T ale_tick +ffffffff8189f2a0 T ale_dma_free +ffffffff8189f560 T ale_detach +ffffffff8189f620 T ale_stop +ffffffff8189f8e0 T ale_init +ffffffff818a02f0 T ale_encap +ffffffff818a0550 T ale_txeof +ffffffff818a0710 T ale_iff +ffffffff818a0870 T ale_stats_clear +ffffffff818a0940 T ale_stats_update +ffffffff818a0cb0 T ale_rxeof +ffffffff818a0f50 T ale_rx_update_page +ffffffff818a1090 T ale_rxcsum +ffffffff818a1140 T ale_init_rx_pages +ffffffff818a1270 T ale_init_tx_ring +ffffffff818a1360 T ale_rxvlan +ffffffff818a2000 T amdpm_match +ffffffff818a2030 T amdpm_attach +ffffffff818a23a0 T amdpm_activate +ffffffff818a2410 T amdpm_rnd_callout +ffffffff818a2470 T amdpm_i2c_acquire_bus +ffffffff818a24c0 T amdpm_i2c_release_bus +ffffffff818a2510 T amdpm_i2c_exec +ffffffff818a2870 T amdpm_get_timecount +ffffffff818a28a0 T amdpm_intr +ffffffff818a3000 T bce_probe +ffffffff818a3030 T bce_attach +ffffffff818a3ae0 T bce_activate +ffffffff818a3b50 T bce_intr +ffffffff818a3e50 T bce_reset +ffffffff818a4410 T bce_ioctl +ffffffff818a4570 T bce_start +ffffffff818a47c0 T bce_watchdog +ffffffff818a4810 T bce_mii_read +ffffffff818a4950 T bce_mii_write +ffffffff818a4a80 T bce_statchg +ffffffff818a4e10 T bce_mediachange +ffffffff818a4e60 T bce_mediastatus +ffffffff818a4ec0 T bce_tick +ffffffff818a4f10 T bce_stop +ffffffff818a5030 T bce_init +ffffffff818a5440 T bce_iff +ffffffff818a5540 T bce_rxintr +ffffffff818a56d0 T bce_txintr +ffffffff818a57c0 T bce_add_rxbuf +ffffffff818a5880 T bce_add_mac +ffffffff818a6000 T ath_pci_match +ffffffff818a6060 T ath_pci_attach +ffffffff818a6290 T ath_pci_detach +ffffffff818a7000 T athn_pci_match +ffffffff818a7030 T athn_pci_attach +ffffffff818a72b0 T athn_pci_detach +ffffffff818a7330 T athn_pci_activate +ffffffff818a73e0 T athn_pci_read +ffffffff818a7410 T athn_pci_write +ffffffff818a7440 T athn_pci_write_barrier +ffffffff818a7470 T athn_pci_disable_aspm +ffffffff818a74e0 T athn_pci_wakeup +ffffffff818a8000 T atw_pci_match +ffffffff818a8030 T atw_pci_attach +ffffffff818a82a0 T atw_pci_detach +ffffffff818a8320 t atw_pci_enable +ffffffff818a83c0 t atw_pci_disable +ffffffff818a9000 T rtw_pci_match +ffffffff818a9030 T rtw_pci_attach +ffffffff818a9250 T rtw_pci_detach +ffffffff818a92d0 T rtw_pci_enable +ffffffff818a9370 T rtw_pci_disable +ffffffff818aa000 T rtwn_pci_match +ffffffff818aa030 T rtwn_pci_attach +ffffffff818aa590 T rtwn_pci_detach +ffffffff818aa6a0 T rtwn_pci_activate +ffffffff818aa6c0 T rtwn_calib_to +ffffffff818aa720 T rtwn_scan_to +ffffffff818aa740 T rtwn_intr +ffffffff818aaa20 T rtwn_alloc_rx_list +ffffffff818aad40 T rtwn_alloc_tx_list +ffffffff818aaf80 T rtwn_free_rx_list +ffffffff818ab0d0 T rtwn_pci_write_1 +ffffffff818ab100 T rtwn_pci_write_2 +ffffffff818ab130 T rtwn_pci_write_4 +ffffffff818ab160 T rtwn_pci_read_1 +ffffffff818ab190 T rtwn_pci_read_2 +ffffffff818ab1c0 T rtwn_pci_read_4 +ffffffff818ab1f0 T rtwn_tx +ffffffff818ab7c0 T rtwn_power_on +ffffffff818ab7f0 T rtwn_dma_init +ffffffff818abba0 T rtwn_pci_load_firmware +ffffffff818abc50 T rtwn_fw_loadpage +ffffffff818abd90 T rtwn_mac_init +ffffffff818abf10 T rtwn_bb_init +ffffffff818ac3b0 T rtwn_alloc_buffers +ffffffff818ac3e0 T rtwn_pci_init +ffffffff818ac4b0 T rtwn_pci_stop +ffffffff818ac600 T rtwn_is_oactive +ffffffff818ac640 T rtwn_next_calib +ffffffff818ac660 T rtwn_cancel_calib +ffffffff818ac6a0 T rtwn_pci_next_scan +ffffffff818ac6c0 T rtwn_cancel_scan +ffffffff818ac700 T rtwn_wait_async +ffffffff818ac730 T rtwn_free_tx_list +ffffffff818ac8a0 T rtwn_setup_rx_desc +ffffffff818ac910 T rtwn_reset_rx_list +ffffffff818ac9b0 T rtwn_reset_tx_list +ffffffff818acb00 T rtwn_rx_frame +ffffffff818acf60 T rtwn_tx_done +ffffffff818ad0f0 T rtwn_poll_c2h_events +ffffffff818ad2b0 T rtwn_pci_92c_stop +ffffffff818ad490 T rtwn_pci_88e_stop +ffffffff818ad870 T rtwn_pci_23a_stop +ffffffff818adc10 T rtwn_88e_intr +ffffffff818adf60 T rtwn_llt_write +ffffffff818ae020 T rtwn_llt_init +ffffffff818ae2f0 T rtwn_92c_power_on +ffffffff818ae770 T rtwn_88e_power_on +ffffffff818aeb70 T rtwn_23a_power_on +ffffffff818aefe0 T rtwn_tx_report +ffffffff818b0000 T ral_pci_match +ffffffff818b0030 T ral_pci_attach +ffffffff818b0210 T ral_pci_detach +ffffffff818b02b0 T ral_pci_activate +ffffffff818b0340 T ral_pci_wakeup +ffffffff818b1000 T acx_pci_match +ffffffff818b1030 T acx_pci_attach +ffffffff818b1260 T acx_pci_detach +ffffffff818b2000 T pgt_pci_match +ffffffff818b2030 T pgt_pci_attach +ffffffff818b2200 T pgt_pci_detach +ffffffff818b3000 T malo_pci_match +ffffffff818b3030 T malo_pci_attach +ffffffff818b31e0 T malo_pci_detach +ffffffff818b3230 T malo_pci_activate +ffffffff818b3290 T malo_pci_wakeup +ffffffff818b4000 T bwi_pci_match +ffffffff818b4070 T bwi_pci_attach +ffffffff818b4290 T bwi_pci_detach +ffffffff818b42e0 T bwi_pci_activate +ffffffff818b4350 T bwi_reset_bcm4331 +ffffffff818b4470 T bwi_pci_conf_write +ffffffff818b44a0 T bwi_pci_conf_read +ffffffff818b44d0 T bwi_pci_wakeup +ffffffff818b5000 T piixpm_match +ffffffff818b5030 T piixpm_attach +ffffffff818b54c0 T piixpm_intr +ffffffff818b55d0 T piixpm_i2c_acquire_bus +ffffffff818b56b0 T piixpm_i2c_release_bus +ffffffff818b5790 T piixpm_i2c_exec +ffffffff818b6000 T vic_match +ffffffff818b60a0 T vic_attach +ffffffff818b6420 T vic_intr +ffffffff818b64a0 T vic_query +ffffffff818b6700 T vic_alloc_data +ffffffff818b6a00 T vic_tick +ffffffff818b6a70 T vic_ioctl +ffffffff818b6ca0 T vic_start +ffffffff818b6fd0 T vic_watchdog +ffffffff818b7000 T vic_media_change +ffffffff818b7030 T vic_media_status +ffffffff818b70f0 T vic_read +ffffffff818b7110 T vic_read_cmd +ffffffff818b7160 T vic_getlladdr +ffffffff818b7210 T vic_alloc_dmamem +ffffffff818b7380 T vic_rx_fill +ffffffff818b7560 T vic_alloc_mbuf +ffffffff818b7620 T vic_init_data +ffffffff818b79d0 T vic_uninit_data +ffffffff818b7ba0 T vic_link_state +ffffffff818b7c20 T vic_write +ffffffff818b7c70 T vic_rx_proc +ffffffff818b7ed0 T vic_tx_proc +ffffffff818b8050 T vic_iff +ffffffff818b8190 T vic_setlladdr +ffffffff818b81f0 T vic_load_txb +ffffffff818b82a0 T vic_init +ffffffff818b8440 T vic_stop +ffffffff818b8580 T vic_rxrinfo +ffffffff818b8650 T vic_free_dmamem +ffffffff818b9000 T vmxnet3_match +ffffffff818b9030 T vmxnet3_attach +ffffffff818b9900 T vmxnet3_intr +ffffffff818b99a0 T vmxnet3_intr_event +ffffffff818b9a20 T vmxnet3_intr_intx +ffffffff818b9a90 T vmxnet3_intr_queue +ffffffff818b9b20 T vmxnet3_dma_init +ffffffff818b9ed0 T vmxnet3_ioctl +ffffffff818ba160 T vmxnet3_start +ffffffff818ba500 T vmxnet3_watchdog +ffffffff818ba550 T vmxnet3_media_change +ffffffff818ba580 T vmxnet3_media_status +ffffffff818ba690 T vmxnet3_link_state +ffffffff818ba750 T vmxnet3_dma_allocmem +ffffffff818ba8a0 T vmxnet3_alloc_txring +ffffffff818baa50 T vmxnet3_alloc_rxring +ffffffff818bada0 t vmx_dmamem_alloc +ffffffff818baf00 T vmxnet3_rxfill_tick +ffffffff818baf70 T vmxnet3_txinit +ffffffff818bb060 T vmxnet3_rxfill +ffffffff818bb350 T vmxnet3_rxinit +ffffffff818bb490 T vmxnet3_txstop +ffffffff818bb590 T vmxnet3_rxstop +ffffffff818bb6f0 T vmxnet3_enable_all_intrs +ffffffff818bb7c0 T vmxnet3_disable_all_intrs +ffffffff818bb890 T vmxnet3_evintr +ffffffff818bba60 T vmxnet3_rxintr +ffffffff818bbde0 T vmxnet3_txintr +ffffffff818bbfd0 T vmxnet3_init +ffffffff818bc380 T vmxnet3_rx_csum +ffffffff818bc3e0 T vmxnet3_iff +ffffffff818bc520 T vmxnet3_stop +ffffffff818bc7e0 T vmxnet3_reset +ffffffff818bc820 t vmx_kstat_create +ffffffff818bca00 t vmx_kstat_read +ffffffff818bd000 T vmwpvs_match +ffffffff818bd040 T vmwpvs_attach +ffffffff818bddf0 T vmwpvs_scsi_cmd +ffffffff818be260 T vmwpvs_intx +ffffffff818be2e0 T vmwpvs_msg_task +ffffffff818be560 T vmwpvs_intr +ffffffff818be740 T vmwpvs_get_config +ffffffff818be940 T vmwpvs_dmamem_zalloc +ffffffff818be9a0 T vmwpvs_dmamem_alloc +ffffffff818beb20 T vmwpvs_ccb_put +ffffffff818beb80 T vmwpvs_setup_rings +ffffffff818becb0 T vmwpvs_setup_msg_ring +ffffffff818beda0 T vmwpvs_ccb_get +ffffffff818bee20 T vmwpvs_dmamem_free +ffffffff818beea0 T vmwpvs_cmd +ffffffff818bef50 T vmwpvs_scsi_cmd_done +ffffffff818bf130 T vmwpvs_scsi_cmd_poll +ffffffff818c0000 T lii_match +ffffffff818c0030 T lii_attach +ffffffff818c0440 T lii_activate +ffffffff818c0540 T lii_reset +ffffffff818c0810 T lii_spi_configure +ffffffff818c0900 T lii_eeprom_present +ffffffff818c0990 T lii_eeprom_read +ffffffff818c09c0 T lii_spi_read +ffffffff818c0c80 T lii_read_macaddr +ffffffff818c0df0 T lii_intr +ffffffff818c0f00 T lii_alloc_rings +ffffffff818c1110 T lii_tick +ffffffff818c1160 T lii_mii_readreg +ffffffff818c1400 T lii_mii_writereg +ffffffff818c16a0 T lii_mii_statchg +ffffffff818c1710 T lii_media_change +ffffffff818c1760 T lii_media_status +ffffffff818c17c0 T lii_ioctl +ffffffff818c1950 T lii_start +ffffffff818c1b00 T lii_watchdog +ffffffff818c1b40 T lii_stop +ffffffff818c1bb0 T lii_init +ffffffff818c20b0 T lii_iff +ffffffff818c21f0 T lii_tx_put +ffffffff818c2300 T lii_free_tx_space +ffffffff818c2340 T lii_rxintr +ffffffff818c24f0 T lii_txintr +ffffffff818c3000 T ichiic_match +ffffffff818c3030 T ichiic_attach +ffffffff818c3220 T ichiic_intr +ffffffff818c3330 T ichiic_i2c_acquire_bus +ffffffff818c3380 T ichiic_i2c_release_bus +ffffffff818c33d0 T ichiic_i2c_exec +ffffffff818c4000 T viapm_match +ffffffff818c4030 T viapm_attach +ffffffff818c4650 T viapm_intr +ffffffff818c4760 T viapm_i2c_acquire_bus +ffffffff818c47b0 T viapm_i2c_release_bus +ffffffff818c4800 T viapm_i2c_exec +ffffffff818c4b20 T viapm_refresh_sensor_data +ffffffff818c4e50 T viapm_refresh +ffffffff818c4e80 T val_to_uK +ffffffff818c4f20 T val_to_rpm +ffffffff818c4f60 T val_to_uV +ffffffff818c5000 T viapm_get_timecount +ffffffff818c6000 T amdiic_match +ffffffff818c6030 T amdiic_attach +ffffffff818c6200 T amdiic_intr +ffffffff818c62d0 T amdiic_i2c_acquire_bus +ffffffff818c6320 T amdiic_i2c_release_bus +ffffffff818c6370 T amdiic_i2c_exec +ffffffff818c65d0 T amdiic_read +ffffffff818c6740 T amdiic_wait +ffffffff818c67e0 T amdiic_write +ffffffff818c7000 T nviic_match +ffffffff818c7030 T nviic_attach +ffffffff818c7280 T nviic_i2c_acquire_bus +ffffffff818c72d0 T nviic_i2c_release_bus +ffffffff818c7310 T nviic_i2c_exec +ffffffff818c7530 T nviic_write +ffffffff818c7580 T nviic_read +ffffffff818c8000 T sdhc_pci_match +ffffffff818c8060 T sdhc_pci_attach +ffffffff818c83a0 T sdhc_pci_activate +ffffffff818c8400 T sdhc_takecontroller +ffffffff818c84a0 T sdhc_ricohfix +ffffffff818c8610 T sdhc_pci_conf_write +ffffffff818c9000 T kate_match +ffffffff818c9170 T kate_attach +ffffffff818c9420 T kate_refresh +ffffffff818ca000 T km_match +ffffffff818ca050 T km_attach +ffffffff818ca0f0 T km_refresh +ffffffff818cb000 T ksmn_match +ffffffff818cb050 T ksmn_attach +ffffffff818cb240 T ksmn_ccd_attach +ffffffff818cb390 T ksmn_refresh +ffffffff818cb4e0 T ksmn_read_reg +ffffffff818cc000 t iosf_pci_match +ffffffff818cc060 t iosf_pci_attach +ffffffff818cc100 t iosf_pci_mbi_mdr_rd +ffffffff818cc160 t iosf_pci_mbi_mdr_wr +ffffffff818cd000 T itherm_probe +ffffffff818cd030 T itherm_attach +ffffffff818cd380 T itherm_activate +ffffffff818cd400 T itherm_enable +ffffffff818cd460 T itherm_refresh +ffffffff818cd470 T itherm_refresh_sensor_data +ffffffff818cd860 T itherm_bias_temperature_sensor +ffffffff818ce000 T pchtemp_match +ffffffff818ce030 T pchtemp_attach +ffffffff818ce190 T pchtemp_refresh +ffffffff818cf000 T rtsx_pci_match +ffffffff818cf090 T rtsx_pci_attach +ffffffff818d0000 T xspd_match +ffffffff818d0030 T xspd_attach +ffffffff818d01f0 T xspd_intr +ffffffff818d1000 T virtio_pci_match +ffffffff818d1080 T virtio_pci_attach +ffffffff818d1420 T virtio_pci_detach +ffffffff818d1500 T virtio_pci_kick +ffffffff818d1560 T virtio_pci_read_device_config_1 +ffffffff818d1590 T virtio_pci_read_device_config_2 +ffffffff818d15c0 T virtio_pci_read_device_config_4 +ffffffff818d15f0 T virtio_pci_read_device_config_8 +ffffffff818d1670 T virtio_pci_write_device_config_1 +ffffffff818d16a0 T virtio_pci_write_device_config_2 +ffffffff818d16d0 T virtio_pci_write_device_config_4 +ffffffff818d1700 T virtio_pci_write_device_config_8 +ffffffff818d1770 T virtio_pci_read_queue_size +ffffffff818d17e0 T virtio_pci_setup_queue +ffffffff818d1ad0 T virtio_pci_set_status +ffffffff818d1b50 T virtio_pci_negotiate_features +ffffffff818d1c90 T virtio_pci_poll_intr +ffffffff818d1d00 T virtio_pci_find_cap +ffffffff818d1ec0 T virtio_pci_attach_10 +ffffffff818d2300 T virtio_pci_attach_09 +ffffffff818d2440 T virtio_pci_adjust_config_region +ffffffff818d24e0 T virtio_pci_setup_msix +ffffffff818d2870 T virtio_pci_legacy_intr +ffffffff818d2910 T virtio_pci_legacy_intr_mpsafe +ffffffff818d29a0 T virtio_pci_free_irqs +ffffffff818d2bf0 T virtio_pci_negotiate_features_10 +ffffffff818d2e30 T virtio_pci_msix_establish +ffffffff818d2f00 T virtio_pci_set_msix_queue_vector +ffffffff818d2f80 T virtio_pci_set_msix_config_vector +ffffffff818d2fc0 T virtio_pci_config_intr +ffffffff818d3000 T virtio_pci_shared_queue_intr +ffffffff818d3010 T virtio_pci_queue_intr +ffffffff818d4000 T dwiic_pci_match +ffffffff818d4030 T dwiic_pci_attach +ffffffff818d4350 T dwiic_pci_activate +ffffffff818d43c0 T dwiic_pci_bus_scan +ffffffff818d5000 T bwfm_pci_buscore_read +ffffffff818d5060 T bwfm_pci_buscore_write +ffffffff818d50d0 T bwfm_pci_buscore_prepare +ffffffff818d5100 T bwfm_pci_buscore_reset +ffffffff818d52f0 T bwfm_pci_buscore_activate +ffffffff818d5320 T bwfm_pci_preinit +ffffffff818d6440 T bwfm_pci_stop +ffffffff818d64d0 T bwfm_pci_txcheck +ffffffff818d6590 T bwfm_pci_txdata +ffffffff818d68f0 T bwfm_pci_msgbuf_query_dcmd +ffffffff818d6d30 T bwfm_pci_msgbuf_set_dcmd +ffffffff818d6d80 T bwfm_pci_match +ffffffff818d6db0 T bwfm_pci_attach +ffffffff818d7020 T bwfm_pci_detach +ffffffff818d7060 T bwfm_pci_activate +ffffffff818d7210 T bwfm_pci_intr +ffffffff818d7470 T bwfm_pci_select_core +ffffffff818d7550 T bwfm_pci_load_microcode +ffffffff818d79d0 T bwfm_pci_dmamem_alloc +ffffffff818d7b70 T bwfm_pci_setup_ring +ffffffff818d7d80 T bwfm_pci_intr_enable +ffffffff818d7dd0 T bwfm_pci_hostready +ffffffff818d7e40 T bwfm_pci_fill_rx_rings +ffffffff818d7e90 T bwfm_pci_dmamem_free +ffffffff818d7f00 T bwfm_pci_cleanup +ffffffff818d8570 T bwfm_pci_send_mb_data +ffffffff818d8690 T bwfm_pci_intmask +ffffffff818d86d0 T bwfm_pci_pktid_avail +ffffffff818d8740 T bwfm_pci_pktid_new +ffffffff818d88a0 T bwfm_pci_pktid_free +ffffffff818d8950 T bwfm_pci_fill_rx_buf_ring +ffffffff818d8cb0 T bwfm_pci_fill_rx_ioctl_ring +ffffffff818d9030 T bwfm_pci_ring_write_reserve +ffffffff818d9120 T bwfm_pci_ring_write_cancel +ffffffff818d9160 T bwfm_pci_ring_write_commit +ffffffff818d9240 T bwfm_pci_ring_write_rptr +ffffffff818d92c0 T bwfm_pci_ring_write_wptr +ffffffff818d9340 T bwfm_pci_setup_flowring +ffffffff818d94a0 T bwfm_pci_ring_bell +ffffffff818d94e0 T bwfm_pci_ring_update_rptr +ffffffff818d9590 T bwfm_pci_ring_update_wptr +ffffffff818d9640 T bwfm_pci_ring_write_reserve_multi +ffffffff818d9760 T bwfm_pci_ring_read_avail +ffffffff818d9860 T bwfm_pci_ring_read_commit +ffffffff818d98f0 T bwfm_pci_ring_rx +ffffffff818d9b00 T bwfm_pci_msg_rx +ffffffff818da0e0 T bwfm_pci_flowring_delete_cb +ffffffff818da190 T bwfm_pci_msgbuf_rxioctl +ffffffff818da280 T bwfm_pci_intr_status +ffffffff818da2c0 T bwfm_pci_intr_ack +ffffffff818da300 T bwfm_pci_flowring_lookup +ffffffff818da470 T bwfm_pci_flowring_create +ffffffff818da5a0 T bwfm_pci_flowring_create_cb +ffffffff818da8f0 T bwfm_pci_flowring_delete +ffffffff818dabc0 T bwfm_pci_msgbuf_h2d_mb_write +ffffffff818dade0 T bwfm_pci_handle_mb_data +ffffffff818daeb0 T bwfm_pci_intr_disable +ffffffff818db000 T ccp_pci_match +ffffffff818db030 T ccp_pci_attach +ffffffff818dc000 T bnxt_match +ffffffff818dc030 T bnxt_attach +ffffffff818dd2a0 T bnxt_dmamem_alloc +ffffffff818dd430 T bnxt_dmamem_free +ffffffff818dd4c0 T bnxt_hwrm_ver_get +ffffffff818dd610 T bnxt_hwrm_nvm_get_dev_info +ffffffff818dd760 T bnxt_hwrm_func_drv_rgtr +ffffffff818dd880 T bnxt_hwrm_func_rgtr_async_events +ffffffff818dd9a0 T bnxt_hwrm_func_qcaps +ffffffff818dda80 T bnxt_admin_intr +ffffffff818ddc80 T bnxt_intr +ffffffff818de150 T bnxt_hwrm_func_qcfg +ffffffff818de200 T bnxt_hwrm_queue_qportcfg +ffffffff818de2d0 T bnxt_hwrm_func_reset +ffffffff818de380 T bnxt_mark_cpr_invalid +ffffffff818de3e0 T bnxt_hwrm_ring_alloc +ffffffff818de590 T bnxt_cfg_async_cr +ffffffff818de690 T bnxt_write_cp_doorbell +ffffffff818de6d0 T bnxt_set_cp_ring_aggint +ffffffff818de7b0 T bnxt_ioctl +ffffffff818de940 T bnxt_start +ffffffff818ded00 T bnxt_watchdog +ffffffff818ded30 T bnxt_media_change +ffffffff818dee80 T bnxt_media_status +ffffffff818deea0 T bnxt_refill +ffffffff818def00 T bnxt_media_autonegotiate +ffffffff818deff0 T bnxt_hwrm_port_phy_qcfg +ffffffff818df490 T bnxt_free_slots +ffffffff818df520 T bnxt_hwrm_cmd_hdr_init +ffffffff818df570 T hwrm_send_message +ffffffff818df5f0 T bnxt_queue_up +ffffffff818e0520 T bnxt_hwrm_stat_ctx_alloc +ffffffff818e0620 T bnxt_write_tx_doorbell +ffffffff818e0690 T bnxt_write_rx_doorbell +ffffffff818e0710 T bnxt_hwrm_ring_grp_alloc +ffffffff818e0810 T bnxt_rx_fill +ffffffff818e0920 T bnxt_hwrm_ring_grp_free +ffffffff818e0a00 T bnxt_hwrm_ring_free +ffffffff818e0af0 T bnxt_hwrm_stat_ctx_free +ffffffff818e0be0 T bnxt_queue_down +ffffffff818e12c0 T bnxt_up +ffffffff818e1990 T bnxt_hwrm_vnic_ctx_alloc +ffffffff818e1a70 T bnxt_hwrm_vnic_alloc +ffffffff818e1b70 T bnxt_hwrm_vnic_cfg +ffffffff818e1cb0 T bnxt_hwrm_vnic_cfg_placement +ffffffff818e1d80 T bnxt_hwrm_set_filter +ffffffff818e1f10 T bnxt_hwrm_vnic_rss_cfg +ffffffff818e1ff0 T bnxt_iff +ffffffff818e2160 T bnxt_hwrm_vnic_free +ffffffff818e2250 T bnxt_hwrm_vnic_ctx_free +ffffffff818e2340 T bnxt_down +ffffffff818e26e0 T bnxt_hwrm_free_filter +ffffffff818e27c0 T bnxt_hwrm_cfa_l2_set_rx_mask +ffffffff818e28a0 T bnxt_rxrinfo +ffffffff818e29f0 T bnxt_get_sffpage +ffffffff818e2d00 T bnxt_load_mbuf +ffffffff818e2db0 T bnxt_handle_async_event +ffffffff818e2e00 T bnxt_cpr_next_cmpl +ffffffff818e2e70 T bnxt_cpr_commit +ffffffff818e2ea0 T bnxt_cpr_rollback +ffffffff818e2ed0 T bnxt_write_cp_doorbell_index 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igc_acquire_swfw_sync_i225 +ffffffff81914b80 T igc_release_swfw_sync_i225 +ffffffff81914c00 T igc_setup_copper_link_i225 +ffffffff81914c90 T igc_init_phy_params_i225 +ffffffff81914d70 T igc_get_hw_semaphore_i225 +ffffffff81914f20 T __igc_write_nvm_srwr +ffffffff81915050 T igc_update_flash_i225 +ffffffff81915420 T igc_set_flsw_flash_burst_counter_i225 +ffffffff81915480 T igc_write_erase_flash_command_i225 +ffffffff81915580 T igc_pool_flash_update_done_i225 +ffffffff81915610 T igc_set_ltr_i225 +ffffffff81915880 T igc_init_function_pointers_i225 +ffffffff819158f0 T igc_set_eee_i225 +ffffffff81916000 T igc_init_mac_ops_generic +ffffffff81916050 T igc_null_ops_generic +ffffffff81916080 T igc_config_collision_dist_generic +ffffffff819160f0 T igc_rar_set_generic +ffffffff819161d0 T igc_write_vfta_generic +ffffffff81916220 T igc_init_rx_addrs_generic +ffffffff819162c0 T igc_check_alt_mac_addr_generic +ffffffff81916440 T igc_hash_mc_addr_generic +ffffffff819164e0 T igc_update_mc_addr_list_generic +ffffffff81916650 T igc_clear_hw_cntrs_base_generic +ffffffff81916a40 T igc_setup_link_generic +ffffffff81916bd0 T igc_set_fc_watermarks_generic +ffffffff81916c80 T igc_force_mac_fc_generic +ffffffff81916d40 T igc_config_fc_after_link_up_generic +ffffffff81916f60 T igc_get_speed_and_duplex_copper_generic +ffffffff81917000 T igc_put_hw_semaphore_generic +ffffffff81917050 T igc_get_auto_rd_done_generic +ffffffff819172a0 T igc_disable_pcie_master_generic +ffffffff81918000 T igc_init_nvm_ops_generic +ffffffff81918080 T igc_null_read_nvm +ffffffff819180b0 T igc_null_nvm_generic +ffffffff819180e0 T igc_reload_nvm_generic +ffffffff81918160 T igc_null_write_nvm +ffffffff81918190 T igc_poll_eerd_eewr_done +ffffffff81918230 T igc_read_nvm_eerd +ffffffff81918360 T igc_read_mac_addr_generic +ffffffff81918440 T igc_validate_nvm_checksum_generic +ffffffff81919000 T igc_init_phy_ops_generic +ffffffff819190f0 T igc_null_set_page +ffffffff81919120 T igc_null_read_reg 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ngbe_get_copper_link_capabilities +ffffffff819251c0 T ngbe_get_eeprom_semaphore +ffffffff81925320 T ngbe_release_eeprom_semaphore +ffffffff819253d0 T ngbe_gphy_dis_eee +ffffffff819254f0 T ngbe_gphy_efuse_calibration +ffffffff819258b0 T ngbe_hpbthresh +ffffffff81925940 T ngbe_lpbthresh +ffffffff81925980 T ngbe_mta_vector +ffffffff819259d0 T ngbe_setup_copper_link +ffffffff81925a20 T ngbe_reset_misc +ffffffff81925d80 T ngbe_set_mta +ffffffff81925df0 T ngbe_rx_checksum +ffffffff81926000 T com_pci_match +ffffffff81926030 T com_pci_attach +ffffffff81926300 T com_pci_detach +ffffffff819263a0 T com_pci_activate +ffffffff81926490 T com_pci_intr_designware +ffffffff81927000 T agpdev_print +ffffffff81927050 T agpbus_probe +ffffffff819270c0 T agpvga_match +ffffffff81927130 T agp_attach_bus +ffffffff819271b0 T agp_probe +ffffffff819271e0 T agp_attach +ffffffff819272f0 T agp_alloc_gatt +ffffffff819274b0 T agp_alloc_dmamem +ffffffff819275e0 T agp_free_dmamem +ffffffff81927640 T agp_free_gatt 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dma_resv_iter_next_unlocked +ffffffff81929740 T dma_resv_iter_first +ffffffff819297c0 T dma_resv_iter_next +ffffffff81929820 T dma_resv_copy_fences +ffffffff81929bc0 T dma_resv_get_fences +ffffffff81929f70 T dma_resv_get_singleton +ffffffff8192a070 T dma_resv_wait_timeout +ffffffff8192a340 T dma_resv_test_signaled +ffffffff8192a490 T dma_resv_describe +ffffffff8192b000 T drm_legacy_agp_info +ffffffff8192b0b0 T drm_legacy_agp_acquire +ffffffff8192b120 T drm_legacy_agp_release +ffffffff8192b180 T drm_legacy_agp_enable +ffffffff8192b1f0 T drm_legacy_agp_takedown +ffffffff8192b260 T drm_legacy_agp_init +ffffffff8192c000 T devm_aperture_acquire_from_firmware +ffffffff8192c050 T drm_aperture_remove_conflicting_framebuffers +ffffffff8192c080 T drm_aperture_remove_conflicting_pci_framebuffers +ffffffff8192d000 T __drm_crtc_commit_free +ffffffff8192d020 T drm_crtc_commit_wait +ffffffff8192d1c0 T drm_atomic_state_default_release +ffffffff8192d220 T drm_atomic_state_init +ffffffff8192d340 T drm_atomic_state_alloc +ffffffff8192d3e0 T drm_atomic_state_default_clear +ffffffff8192d700 T drm_atomic_state_clear +ffffffff8192d730 T __drm_atomic_state_free +ffffffff8192d800 T drm_atomic_get_crtc_state +ffffffff8192d950 T drm_atomic_get_plane_state +ffffffff8192db50 T drm_atomic_private_obj_init +ffffffff8192dc40 T drm_atomic_private_obj_fini +ffffffff8192dcd0 T drm_atomic_get_private_obj_state +ffffffff8192de80 T drm_atomic_get_old_private_obj_state +ffffffff8192dee0 T drm_atomic_get_new_private_obj_state +ffffffff8192df40 T drm_atomic_get_old_connector_for_encoder +ffffffff8192dfb0 T drm_atomic_get_new_connector_for_encoder +ffffffff8192e020 T drm_atomic_get_connector_state +ffffffff8192e250 T drm_atomic_get_bridge_state +ffffffff8192e260 T drm_atomic_get_old_bridge_state +ffffffff8192e2c0 T drm_atomic_get_new_bridge_state +ffffffff8192e320 T drm_atomic_add_encoder_bridges +ffffffff8192e3e0 T drm_atomic_add_affected_connectors +ffffffff8192e510 T drm_atomic_add_affected_planes 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drm_atomic_helper_calc_timestamping_constants +ffffffff81932070 T drm_atomic_helper_commit_modeset_disables +ffffffff819326c0 T drm_atomic_helper_commit_modeset_enables +ffffffff819329b0 T drm_atomic_helper_wait_for_fences +ffffffff81932ab0 T drm_atomic_helper_wait_for_vblanks +ffffffff81932e20 T drm_atomic_helper_wait_for_flip_done +ffffffff81932fe0 T drm_atomic_helper_commit_tail +ffffffff81933170 T drm_atomic_helper_commit_planes +ffffffff81933430 T drm_atomic_helper_fake_vblank +ffffffff81933510 T drm_atomic_helper_commit_hw_done +ffffffff819336d0 T drm_atomic_helper_cleanup_planes +ffffffff81933780 T drm_atomic_helper_commit_tail_rpm +ffffffff81933910 T drm_atomic_helper_async_commit +ffffffff81933ba0 T drm_atomic_helper_commit +ffffffff81933e60 T drm_atomic_helper_prepare_planes +ffffffff81934010 T drm_atomic_helper_setup_commit +ffffffff819348a0 t commit_work +ffffffff819348c0 T drm_atomic_helper_swap_state +ffffffff81934f30 t commit_tail +ffffffff81935210 t release_crtc_commit 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drm_atomic_helper_connector_tv_reset +ffffffff819379e0 T __drm_atomic_helper_connector_duplicate_state +ffffffff81937a70 T drm_atomic_helper_connector_duplicate_state +ffffffff81937b50 T drm_atomic_helper_connector_destroy_state +ffffffff81937bc0 T __drm_atomic_helper_private_obj_duplicate_state +ffffffff81937c00 T __drm_atomic_helper_bridge_duplicate_state +ffffffff81937c40 T drm_atomic_helper_bridge_duplicate_state +ffffffff81937cf0 T drm_atomic_helper_bridge_destroy_state +ffffffff81937d10 T __drm_atomic_helper_bridge_reset +ffffffff81937d60 T drm_atomic_helper_bridge_reset +ffffffff81938000 T drm_atomic_set_mode_for_crtc +ffffffff81938200 T drm_atomic_set_mode_prop_for_crtc +ffffffff81938490 T drm_atomic_set_crtc_for_plane +ffffffff81938600 T drm_atomic_set_fb_for_plane +ffffffff819386e0 T drm_atomic_set_crtc_for_connector +ffffffff81938840 T drm_atomic_get_property +ffffffff81938f80 T drm_atomic_connector_commit_dpms +ffffffff819390e0 T drm_atomic_set_property +ffffffff81939b90 T drm_mode_atomic_ioctl +ffffffff8193b000 T drm_is_current_master +ffffffff8193b060 T drm_getmagic +ffffffff8193b130 T drm_authmagic +ffffffff8193b1f0 T drm_master_create +ffffffff8193b290 T drm_setmaster_ioctl +ffffffff8193b350 t drm_new_set_master +ffffffff8193b4e0 T drm_dropmaster_ioctl +ffffffff8193b630 T drm_master_open +ffffffff8193b6e0 T drm_master_get +ffffffff8193b710 T drm_master_release +ffffffff8193b860 T drm_master_put +ffffffff8193b8f0 T drm_file_get_master +ffffffff8193b950 T drm_master_internal_acquire +ffffffff8193b9c0 T drm_master_internal_release +ffffffff8193c000 T drm_plane_create_alpha_property +ffffffff8193c0a0 T drm_plane_create_rotation_property +ffffffff8193c1e0 T drm_rotation_simplify +ffffffff8193c260 T drm_plane_create_zpos_property +ffffffff8193c320 T drm_plane_create_zpos_immutable_property +ffffffff8193c3d0 T drm_atomic_normalize_zpos +ffffffff8193c6d0 T drm_plane_create_blend_mode_property +ffffffff8193c870 t drm_atomic_state_zpos_cmp +ffffffff8193d000 T drm_bridge_add +ffffffff8193d070 T devm_drm_bridge_add +ffffffff8193d110 T drm_bridge_remove +ffffffff8193d170 T drm_bridge_attach +ffffffff8193d2f0 T drm_bridge_detach +ffffffff8193d3e0 T drm_bridge_chain_mode_fixup +ffffffff8193d480 T drm_bridge_chain_mode_valid +ffffffff8193d520 T drm_bridge_chain_disable +ffffffff8193d5b0 T drm_bridge_chain_post_disable +ffffffff8193d630 T drm_bridge_chain_mode_set +ffffffff8193d6c0 T drm_bridge_chain_pre_enable +ffffffff8193d750 T drm_bridge_chain_enable +ffffffff8193d7d0 T drm_atomic_bridge_chain_disable +ffffffff8193d8d0 T drm_atomic_bridge_chain_post_disable +ffffffff8193db00 T drm_atomic_bridge_chain_pre_enable +ffffffff8193dd40 T drm_atomic_bridge_chain_enable +ffffffff8193de50 T drm_atomic_bridge_chain_check +ffffffff8193e1b0 T drm_bridge_detect +ffffffff8193e210 T drm_bridge_get_modes +ffffffff8193e270 T drm_bridge_get_edid +ffffffff8193e2d0 T drm_bridge_hpd_enable +ffffffff8193e3a0 T drm_bridge_hpd_disable +ffffffff8193e440 T drm_bridge_hpd_notify +ffffffff8193e4a0 t drm_bridge_atomic_duplicate_priv_state +ffffffff8193e4c0 t drm_bridge_atomic_destroy_priv_state +ffffffff8193e4e0 t select_bus_fmt_recursive +ffffffff8193f000 T drm_buddy_init +ffffffff8193f470 T drm_buddy_fini +ffffffff8193f570 T drm_get_buddy +ffffffff8193f5b0 T drm_buddy_free_block +ffffffff8193f750 T drm_buddy_free_list +ffffffff8193f7e0 T drm_buddy_block_trim +ffffffff8193fa30 t __alloc_range +ffffffff8193fe00 T drm_buddy_alloc_blocks +ffffffff819406a0 T drm_buddy_block_print +ffffffff819406e0 T drm_buddy_print +ffffffff81940850 T drm_buddy_module_exit +ffffffff81940870 T drm_buddy_module_init +ffffffff819408d0 t split_block +ffffffff81941000 T drm_clflush_pages +ffffffff81941120 T drm_clflush_sg +ffffffff81941270 T drm_clflush_virt_range +ffffffff81941340 T drm_need_swiotlb +ffffffff81941370 T drm_memcpy_from_wc +ffffffff81941710 T drm_memcpy_init_early +ffffffff81942000 T drm_client_init +ffffffff81942110 T drm_client_register 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drm_crtc_enable_color_mgmt +ffffffff819461c0 T drm_mode_crtc_set_gamma_size +ffffffff819462e0 T drm_mode_gamma_set_ioctl +ffffffff819467d0 T drm_mode_gamma_get_ioctl +ffffffff81946910 T drm_get_color_encoding_name +ffffffff81946980 T drm_get_color_range_name +ffffffff819469f0 T drm_plane_create_color_properties +ffffffff81946c50 T drm_color_lut_check +ffffffff81947000 T drm_connector_ida_init +ffffffff81947110 T drm_connector_ida_destroy +ffffffff81947220 T drm_get_connector_type_name +ffffffff81947260 T drm_connector_free_work_fn +ffffffff81947320 T drm_connector_init +ffffffff819473a0 t __drm_connector_init +ffffffff819478b0 T drm_connector_init_with_ddc +ffffffff81947940 T drmm_connector_init +ffffffff81947a00 t drm_connector_cleanup_action +ffffffff81947a20 T drm_connector_attach_edid_property +ffffffff81947a40 T drm_connector_attach_encoder +ffffffff81947ac0 T drm_connector_has_possible_encoder +ffffffff81947b00 T drm_connector_cleanup +ffffffff81947e30 T drm_connector_unregister +ffffffff81947ed0 T drm_mode_put_tile_group +ffffffff81947f60 T drm_connector_register +ffffffff81948050 T drm_connector_unregister_all +ffffffff819481f0 T drm_connector_list_iter_begin +ffffffff81948230 T drm_connector_list_iter_next +ffffffff81948340 T drm_connector_list_iter_end +ffffffff81948410 T drm_connector_register_all +ffffffff819485a0 T drm_get_connector_status_name +ffffffff819485f0 T drm_get_connector_force_name +ffffffff81948630 T drm_get_subpixel_order_name +ffffffff81948670 T drm_get_dpms_name +ffffffff819486b0 T drm_display_info_set_bus_formats +ffffffff81948780 T drm_get_dvi_i_select_name +ffffffff819487e0 T drm_get_dvi_i_subconnector_name +ffffffff81948840 T drm_get_tv_select_name +ffffffff819488a0 T drm_get_tv_subconnector_name +ffffffff81948900 T drm_get_dp_subconnector_name +ffffffff81948990 T drm_connector_create_standard_properties +ffffffff81948b10 T drm_mode_create_dvi_i_properties +ffffffff81948bb0 T drm_connector_attach_dp_subconnector_property +ffffffff81948c20 T drm_connector_attach_content_type_property +ffffffff81948cc0 T drm_mode_create_content_type_property +ffffffff81948d40 T drm_connector_attach_tv_margin_properties +ffffffff81948db0 T drm_mode_create_tv_margin_properties +ffffffff81948ed0 T drm_mode_create_tv_properties +ffffffff81949130 T drm_mode_create_scaling_mode_property +ffffffff819491a0 T drm_connector_attach_vrr_capable_property +ffffffff81949230 T drm_connector_attach_scaling_mode_property +ffffffff81949400 T drm_mode_create_aspect_ratio_property +ffffffff81949480 T drm_mode_create_hdmi_colorspace_property +ffffffff81949500 T drm_mode_create_dp_colorspace_property +ffffffff81949580 T drm_mode_create_suggested_offset_properties +ffffffff81949650 T drm_connector_set_path_property +ffffffff819496b0 T drm_connector_set_tile_property +ffffffff81949800 T drm_connector_set_link_status_property +ffffffff81949850 T drm_connector_attach_max_bpc_property +ffffffff81949910 T drm_connector_attach_hdr_output_metadata_property +ffffffff81949960 T drm_connector_attach_colorspace_property +ffffffff819499b0 T drm_connector_atomic_hdr_metadata_equal +ffffffff81949a20 T drm_connector_set_vrr_capable_property +ffffffff81949a70 T drm_connector_set_panel_orientation +ffffffff81949b30 T drm_connector_set_panel_orientation_with_quirk +ffffffff81949c10 T drm_connector_set_orientation_from_panel +ffffffff81949d00 T drm_connector_create_privacy_screen_properties +ffffffff81949da0 T drm_connector_attach_privacy_screen_properties +ffffffff81949e10 T drm_connector_attach_privacy_screen_provider +ffffffff81949f20 t drm_connector_privacy_screen_notifier +ffffffff81949fc0 T drm_connector_update_privacy_screen +ffffffff8194a030 T drm_connector_set_obj_prop +ffffffff8194a110 T drm_connector_property_set_ioctl +ffffffff8194a170 T drm_mode_getconnector +ffffffff8194a6b0 T drm_connector_find_by_fwnode +ffffffff8194a760 T drm_connector_oob_hotplug_event +ffffffff8194a850 T drm_mode_get_tile_group +ffffffff8194a920 T drm_mode_create_tile_group +ffffffff8194a9f0 t drm_connector_free +ffffffff8194aa30 t kasprintf +ffffffff8194b000 T drm_crtc_from_index +ffffffff8194b060 T drm_crtc_force_disable +ffffffff8194b180 T drm_mode_set_config_internal +ffffffff8194b200 T drm_crtc_register_all +ffffffff8194b290 T drm_crtc_unregister_all +ffffffff8194b300 T drm_crtc_create_fence +ffffffff8194b390 T drm_crtc_init_with_planes +ffffffff8194b460 t __drm_crtc_init_with_planes +ffffffff8194b850 T drmm_crtc_init_with_planes +ffffffff8194b950 T __drmm_crtc_alloc_with_planes +ffffffff8194bac0 T drm_crtc_cleanup +ffffffff8194bbe0 T drm_mode_getcrtc +ffffffff8194bd80 t __drm_mode_set_config_internal +ffffffff8194bf20 T drm_crtc_check_viewport +ffffffff8194bfd0 T drm_mode_setcrtc +ffffffff8194c730 T drm_mode_crtc_set_obj_prop +ffffffff8194c7b0 T drm_crtc_create_scaling_filter_property +ffffffff8194c820 t drm_crtc_fence_get_driver_name +ffffffff8194c8a0 t drm_crtc_fence_get_timeline_name +ffffffff8194c910 t kasprintf +ffffffff8194c9e0 t drmm_crtc_init_with_planes_cleanup +ffffffff8194d000 T drm_helper_encoder_in_use +ffffffff8194d180 T drm_helper_crtc_in_use +ffffffff8194d2b0 T drm_helper_disable_unused_functions +ffffffff8194d330 t __drm_helper_disable_unused_functions +ffffffff8194d430 T drm_crtc_helper_set_mode +ffffffff8194d8e0 T drm_connector_get_single_encoder +ffffffff8194d9e0 T drm_crtc_helper_set_config +ffffffff8194e600 T drm_helper_connector_dpms +ffffffff8194e8f0 T drm_helper_resume_force_mode +ffffffff8194ebe0 T drm_helper_force_disable_all +ffffffff8194ecb0 t drm_encoder_disable +ffffffff8194f000 T drm_atomic_helper_check_plane_damage +ffffffff8194f0a0 T drm_atomic_helper_dirtyfb +ffffffff8194f350 T drm_atomic_helper_damage_iter_init +ffffffff8194f4a0 T drm_atomic_helper_damage_iter_next +ffffffff8194f540 T drm_atomic_helper_damage_merged +ffffffff81950000 T displayid_iter_edid_begin +ffffffff81950050 T __displayid_iter_next +ffffffff81950310 T displayid_iter_end +ffffffff81951000 T drm_mode_create_dumb +ffffffff819510c0 T drm_mode_create_dumb_ioctl +ffffffff81951180 T drm_mode_mmap_dumb_ioctl +ffffffff819511f0 T drm_mode_destroy_dumb +ffffffff81951260 T drm_mode_destroy_dumb_ioctl +ffffffff81952000 T drm_edid_header_is_valid +ffffffff81952080 T drm_edid_are_equal +ffffffff819520f0 T drm_edid_block_valid +ffffffff819522f0 t edid_block_check +ffffffff81952420 t edid_block_status_print +ffffffff81952520 T drm_edid_is_valid +ffffffff819525a0 T drm_edid_override_set +ffffffff81952610 T drm_connector_update_edid_property +ffffffff819527c0 T drm_edid_override_reset +ffffffff819528f0 T drm_add_override_edid_modes +ffffffff81952ad0 T drm_add_edid_modes +ffffffff81952bc0 T drm_do_get_edid +ffffffff81952be0 t _drm_do_get_edid +ffffffff819530f0 T drm_edid_raw +ffffffff81953180 T drm_edid_alloc +ffffffff81953250 T drm_edid_dup +ffffffff81953330 T drm_edid_free +ffffffff81953390 T drm_probe_ddc +ffffffff81953490 t drm_do_probe_ddc_edid +ffffffff819535e0 T drm_get_edid +ffffffff81953720 T drm_edid_read_custom +ffffffff81953810 T drm_edid_read_ddc +ffffffff81953940 T drm_edid_read +ffffffff819539c0 T drm_edid_get_panel_id +ffffffff81953aa0 t edid_block_read +ffffffff81953d10 T drm_get_edid_switcheroo +ffffffff81953d60 T drm_edid_duplicate +ffffffff81953de0 T drm_mode_find_dmt +ffffffff81953f00 T drm_mode_fixup_1366x768 +ffffffff81953f60 T drm_find_edid_extension +ffffffff81954170 T drm_match_cea_mode +ffffffff819543c0 T drm_display_mode_from_cea_vic +ffffffff81954430 T drm_edid_get_monitor_name +ffffffff819544e0 t get_monitor_name +ffffffff81954840 T drm_edid_to_sad +ffffffff81954a50 T drm_edid_to_speaker_allocation +ffffffff81954c00 T drm_av_sync_delay +ffffffff81954cb0 T drm_detect_hdmi_monitor +ffffffff81954dd0 T drm_detect_monitor_audio +ffffffff81954fe0 T drm_default_rgb_quant_range +ffffffff81955020 T drm_edid_connector_update +ffffffff81955080 t _drm_edid_connector_update +ffffffff81956f30 t _drm_update_tile_info +ffffffff819571c0 t _drm_edid_connector_property_update +ffffffff81957370 T drm_add_modes_noedid +ffffffff81957460 T drm_set_preferred_mode +ffffffff819574c0 T drm_hdmi_avi_infoframe_from_display_mode +ffffffff81957740 T drm_hdmi_avi_infoframe_quant_range +ffffffff819577e0 T drm_hdmi_vendor_infoframe_from_display_mode +ffffffff819578a0 t connector_bad_edid +ffffffff81957a60 t drm_for_each_detailed_block +ffffffff81957cb0 t __cea_db_iter_next +ffffffff81957f50 t update_display_info +ffffffff81958e20 t get_monitor_range +ffffffff81958ec0 t do_detailed_mode +ffffffff819597e0 t hdmi_mode_alternate_clock +ffffffff81959890 t do_cvt_mode +ffffffff81959ae0 t drm_mode_std +ffffffff8195a7f0 t do_standard_modes +ffffffff8195a940 t drm_monitor_supports_rb +ffffffff8195ac30 t drm_gtf2_hbreak +ffffffff8195aec0 t do_established_modes +ffffffff8195b0c0 t drm_match_hdmi_mode +ffffffff8195b300 t do_inferred_modes +ffffffff8195b870 t mode_in_range +ffffffff8195c000 T drm_encoder_register_all +ffffffff8195c090 T drm_encoder_unregister_all +ffffffff8195c100 T drm_encoder_init +ffffffff8195c1d0 t __drm_encoder_init +ffffffff8195c390 T drm_encoder_cleanup +ffffffff8195c4c0 T __drmm_encoder_alloc +ffffffff8195c5e0 T drmm_encoder_init +ffffffff8195c6c0 T drm_mode_getencoder +ffffffff8195c820 t kasprintf +ffffffff8195c8f0 t drmm_encoder_alloc_release +ffffffff8195d000 T drm_i2c_encoder_dpms +ffffffff8195d020 T drm_i2c_encoder_mode_fixup +ffffffff8195d060 T drm_i2c_encoder_prepare +ffffffff8195d080 T drm_i2c_encoder_commit +ffffffff8195d0a0 T drm_i2c_encoder_mode_set +ffffffff8195d0c0 T drm_i2c_encoder_detect +ffffffff8195d0e0 T drm_i2c_encoder_save +ffffffff8195d100 T drm_i2c_encoder_restore +ffffffff8195e000 T drm_fb_helper_debug_enter +ffffffff8195e100 T drm_fb_helper_debug_leave +ffffffff8195e270 T drm_fb_helper_restore_fbdev_mode_unlocked +ffffffff8195e310 T drm_fb_helper_blank +ffffffff8195e3a0 T drm_fb_helper_prepare +ffffffff8195e480 t drm_fb_helper_resume_worker +ffffffff8195e4b0 t drm_fb_helper_damage_work +ffffffff8195e830 T drm_fb_helper_init +ffffffff8195e8a0 T drm_fb_helper_alloc_fbi +ffffffff8195e900 T drm_fb_helper_unregister_fbi +ffffffff8195e930 T drm_fb_helper_fini +ffffffff8195ea30 T drm_fb_helper_set_suspend +ffffffff8195ea60 T drm_fb_helper_set_suspend_unlocked +ffffffff8195ea90 T drm_fb_helper_set_par +ffffffff8195eb80 T drm_fb_helper_pan_display +ffffffff8195ec50 T drm_fb_helper_fill_info +ffffffff8195ed10 T drm_fb_helper_initial_config +ffffffff8195ed40 t __drm_fb_helper_initial_config_and_unlock +ffffffff8195f290 T drm_fb_helper_hotplug_event +ffffffff8195f490 t drm_setup_crtcs_fb +ffffffff8195f5d0 T drm_fb_helper_lastclose +ffffffff8195f680 T drm_fb_helper_output_poll_changed +ffffffff8195f6a0 T drm_fbdev_generic_setup +ffffffff8195f820 t drm_fbdev_client_unregister +ffffffff8195f890 t drm_fbdev_client_restore +ffffffff8195f930 t drm_fbdev_client_hotplug +ffffffff8195fb60 t drm_fbdev_cleanup +ffffffff8195fc00 t drm_fbdev_use_shadow_fb +ffffffff8195fc50 t drm_fb_helper_generic_probe +ffffffff81960000 T drm_dev_needs_global_mutex +ffffffff81960060 T drm_file_alloc +ffffffff819602c0 T drm_file_free +ffffffff819604f0 T drm_lastclose +ffffffff81960560 T drm_release +ffffffff819605b0 T drm_release_noglobal +ffffffff81960600 T drm_read +ffffffff81960650 T drm_event_reserve_init_locked +ffffffff819606d0 T drm_event_reserve_init +ffffffff81960790 T drm_event_cancel_free +ffffffff81960810 T drm_send_event_timestamp_locked +ffffffff81960820 t drm_send_event_helper +ffffffff819609f0 T drm_send_event_locked +ffffffff81960a10 T drm_send_event +ffffffff81960a60 T mock_drm_getfile +ffffffff81961000 T drm_flip_work_allocate_task +ffffffff81961060 T drm_flip_work_queue_task +ffffffff819610b0 T drm_flip_work_queue +ffffffff81961150 T drm_flip_work_commit +ffffffff819611d0 T drm_flip_work_init +ffffffff81961240 t flip_worker +ffffffff81961320 T drm_flip_work_cleanup +ffffffff81962000 T drm_fb_clip_offset +ffffffff81962040 T drm_fb_memcpy +ffffffff819622c0 T drm_fb_swab +ffffffff819623c0 t drm_fb_swab32_line +ffffffff81962420 t drm_fb_swab16_line +ffffffff81962480 t drm_fb_xfrm +ffffffff81962740 T drm_fb_xrgb8888_to_rgb332 +ffffffff819627a0 t drm_fb_xrgb8888_to_rgb332_line +ffffffff81962890 T drm_fb_xrgb8888_to_rgb565 +ffffffff81962910 t drm_fb_xrgb8888_to_rgb565_swab_line +ffffffff81962990 t drm_fb_xrgb8888_to_rgb565_line +ffffffff81962a80 T drm_fb_xrgb8888_to_rgb888 +ffffffff81962ae0 t drm_fb_xrgb8888_to_rgb888_line +ffffffff81962b70 T drm_fb_xrgb8888_to_xrgb2101010 +ffffffff81962bd0 t drm_fb_xrgb8888_to_xrgb2101010_line +ffffffff81962c50 T drm_fb_xrgb8888_to_gray8 +ffffffff81962cb0 t drm_fb_xrgb8888_to_gray8_line +ffffffff81962d30 T drm_fb_blit +ffffffff81963180 T drm_fb_xrgb8888_to_mono +ffffffff81963510 T drm_fb_build_fourcc_list +ffffffff81963830 t drm_fb_rgb888_to_xrgb8888_line +ffffffff81963900 t drm_fb_rgb565_to_xrgb8888_line +ffffffff81964000 T drm_mode_legacy_fb_format +ffffffff819640f0 T drm_driver_legacy_fb_format +ffffffff819641f0 T __drm_format_info +ffffffff81964270 T drm_format_info +ffffffff81964330 T drm_get_format_info +ffffffff81964410 T drm_format_info_block_width +ffffffff81964460 T drm_format_info_block_height +ffffffff819644b0 T drm_format_info_bpp +ffffffff81964530 T drm_format_info_min_pitch +ffffffff81965000 T drm_framebuffer_check_src_coords +ffffffff81965120 T drm_mode_addfb +ffffffff81965330 T drm_mode_addfb2 +ffffffff81965420 T drm_mode_addfb_ioctl +ffffffff81965440 T drm_internal_framebuffer_create +ffffffff81965960 T drm_mode_addfb2_ioctl +ffffffff81965a50 T drm_mode_rmfb +ffffffff81965c20 T drm_framebuffer_lookup +ffffffff81965c70 t drm_mode_rmfb_work_fn +ffffffff81965d30 T drm_mode_rmfb_ioctl +ffffffff81965d50 T drm_mode_getfb +ffffffff81965eb0 T drm_mode_getfb2_ioctl +ffffffff81966260 T drm_mode_dirtyfb_ioctl +ffffffff81966400 T drm_fb_release +ffffffff81966510 T drm_framebuffer_free +ffffffff81966550 T drm_framebuffer_init +ffffffff819666b0 T drm_framebuffer_unregister_private +ffffffff819666f0 T drm_framebuffer_cleanup +ffffffff81966750 T drm_framebuffer_remove +ffffffff81966c00 T drm_framebuffer_plane_width +ffffffff81966c50 T drm_framebuffer_plane_height +ffffffff81966ca0 T drm_framebuffer_print_info +ffffffff81967000 T drm_ref +ffffffff81967030 T drm_unref +ffffffff819670b0 T drm_fault +ffffffff81967270 T drm_flush +ffffffff819672a0 T udv_attach_drm +ffffffff819674c0 T drm_gem_init +ffffffff81967570 t drm_gem_init_release +ffffffff81967590 T drm_gem_object_init +ffffffff819676f0 T drm_gem_private_object_init +ffffffff819677f0 T drm_gem_handle_delete +ffffffff819678e0 t drm_gem_object_release_handle +ffffffff81967970 T drm_gem_dumb_map_offset +ffffffff81967aa0 T drm_gem_object_lookup +ffffffff81967b20 T drm_gem_create_mmap_offset +ffffffff81967b50 T drm_gem_dumb_destroy +ffffffff81967b70 T drm_gem_handle_create_tail +ffffffff81967ce0 t drm_gem_object_handle_put_unlocked +ffffffff81967e30 T drm_gem_handle_create +ffffffff81967e80 T drm_gem_free_mmap_offset +ffffffff81967eb0 T drm_gem_create_mmap_offset_size +ffffffff81967ee0 T drm_gem_get_pages +ffffffff81967f30 T drm_gem_put_pages +ffffffff81967f60 T drm_gem_objects_lookup +ffffffff819680d0 T drm_gem_dma_resv_wait +ffffffff81968210 T drm_gem_close_ioctl +ffffffff81968260 T drm_gem_flink_ioctl +ffffffff819683d0 T drm_gem_open_ioctl +ffffffff81968500 T drm_gem_open +ffffffff81968530 T drm_gem_release +ffffffff81968570 T drm_gem_object_release +ffffffff819686c0 T drm_gem_lru_remove +ffffffff819687a0 T drm_gem_object_free +ffffffff819687f0 T drm_gem_mmap_obj +ffffffff81968900 T drm_gem_mmap +ffffffff81968b80 T drm_gem_print_info +ffffffff81968ca0 T drm_gem_pin +ffffffff81968ce0 T drm_gem_unpin +ffffffff81968d20 T drm_gem_vmap +ffffffff81968d80 T drm_gem_vunmap +ffffffff81968df0 T drm_gem_lock_reservations +ffffffff81969060 T drm_gem_unlock_reservations +ffffffff81969150 T drm_gem_lru_init +ffffffff81969190 T drm_gem_lru_move_tail +ffffffff81969280 T drm_gem_lru_scan +ffffffff81969660 t __ww_mutex_lock +ffffffff8196a000 T drm_gem_plane_helper_prepare_fb +ffffffff8196b000 T drm_gem_fb_destroy +ffffffff8196b0c0 T drm_gem_fb_create_handle +ffffffff8196c000 T drm_ht_create +ffffffff8196c080 T drm_ht_verbose_list +ffffffff8196c140 T drm_ht_insert_item +ffffffff8196c190 T drm_ht_just_insert_please +ffffffff8196c260 T drm_ht_find_item +ffffffff8196c2b0 T drm_ht_remove_key +ffffffff8196c300 T drm_ht_remove_item +ffffffff8196c350 T drm_ht_remove +ffffffff8196d000 T drm_getunique +ffffffff8196d0a0 T drm_getclient +ffffffff8196d110 T drm_noop +ffffffff8196d160 T drm_invalid_op +ffffffff8196d190 T drm_version +ffffffff8196d3b0 T pledge_ioctl_drm +ffffffff8196d470 T drm_ioctl_kernel +ffffffff8196d4c0 T drm_ioctl +ffffffff8196d510 T drm_ioctl_flags +ffffffff8196d570 T drm_do_ioctl +ffffffff8196d8c0 T drmioctl +ffffffff8196da10 t drm_getstats +ffffffff8196da60 t drm_setversion +ffffffff8196dbc0 t drm_getcap +ffffffff8196ddb0 t drm_setclientcap +ffffffff8196e000 T tasklet_unlock_wait +ffffffff8196e080 T tasklet_unlock_spin_wait +ffffffff8196e100 T tasklet_run +ffffffff8196e180 T set_current_state +ffffffff8196e220 T __set_current_state +ffffffff8196e2b0 T schedule +ffffffff8196e2f0 T schedule_timeout +ffffffff8196e3a0 T schedule_timeout_uninterruptible +ffffffff8196e400 T wake_up_process +ffffffff8196e480 T autoremove_wake_function +ffffffff8196e530 T prepare_to_wait +ffffffff8196e620 T finish_wait +ffffffff8196e6d0 T flush_workqueue +ffffffff8196e710 T flush_work +ffffffff8196e760 T flush_delayed_work +ffffffff8196e800 T kthread_func +ffffffff8196e840 T kthread_run +ffffffff8196e920 T kthread_create_worker +ffffffff8196e9e0 T kthread_destroy_worker +ffffffff8196ea20 T kthread_init_work +ffffffff8196ea40 T kthread_queue_work +ffffffff8196ea80 T kthread_cancel_work_sync +ffffffff8196eac0 T kthread_flush_work +ffffffff8196eb00 T kthread_flush_worker +ffffffff8196eb40 T kthread_lookup +ffffffff8196ebc0 T kthread_should_park +ffffffff8196ec40 T kthread_parkme +ffffffff8196ed00 T kthread_park +ffffffff8196ee00 T kthread_unpark +ffffffff8196ee60 T kthread_should_stop +ffffffff8196eee0 T kthread_stop +ffffffff8196f040 T dmi_match +ffffffff8196f0f0 T dmi_first_match +ffffffff8196f1d0 T dmi_get_system_info +ffffffff8196f240 T dmi_check_system +ffffffff8196f340 T alloc_pages +ffffffff8196f410 T __free_pages +ffffffff8196f510 T __pagevec_release +ffffffff8196f5c0 T kmap +ffffffff8196f600 T kunmap_va +ffffffff8196f620 T kmap_atomic_prot +ffffffff8196f6b0 T kunmap_atomic +ffffffff8196f730 T vmap +ffffffff8196f810 T vunmap +ffffffff8196f860 T is_vmalloc_addr +ffffffff8196f8a0 T print_hex_dump +ffffffff8196f970 T memchr_inv +ffffffff8196f9c0 T panic_cmp +ffffffff8196f9e0 T linux_root_RB_INSERT_COLOR +ffffffff8196fbe0 T linux_root_RB_REMOVE_COLOR +ffffffff8196ff20 T linux_root_RB_REMOVE +ffffffff81970050 T linux_root_RB_INSERT +ffffffff819700c0 T linux_root_RB_FIND +ffffffff81970110 T linux_root_RB_NFIND +ffffffff81970160 T linux_root_RB_NEXT +ffffffff819701d0 T linux_root_RB_PREV +ffffffff81970240 T linux_root_RB_MINMAX +ffffffff81970290 T idr_init +ffffffff819702c0 T idr_destroy +ffffffff81970400 T idr_tree_SPLAY_REMOVE +ffffffff81970480 T idr_preload +ffffffff81970510 T idr_alloc +ffffffff819706b0 T idr_tree_SPLAY_INSERT +ffffffff81970750 T idr_replace +ffffffff819707d0 T idr_remove +ffffffff81970890 T idr_find +ffffffff81970900 T idr_get_next +ffffffff81970a30 T idr_for_each +ffffffff81970b40 T idr_cmp +ffffffff81970b80 T idr_tree_SPLAY +ffffffff81970cb0 T idr_tree_SPLAY_MINMAX +ffffffff81970da0 T ida_init +ffffffff81970dd0 T ida_destroy +ffffffff81970de0 T ida_simple_get +ffffffff81970e00 T ida_simple_remove +ffffffff81970e20 T ida_alloc_min +ffffffff81970e40 T ida_alloc_max +ffffffff81970e60 T ida_free +ffffffff81970e80 T xarray_cmp +ffffffff81970ec0 T xarray_tree_SPLAY_INSERT +ffffffff81970f60 T xarray_tree_SPLAY +ffffffff81971090 T xarray_tree_SPLAY_REMOVE +ffffffff81971110 T xarray_tree_SPLAY_MINMAX +ffffffff81971200 T xa_init_flags +ffffffff81971280 T xa_destroy +ffffffff819713c0 T __xa_alloc +ffffffff81971540 T __xa_alloc_cyclic +ffffffff819715a0 T __xa_erase +ffffffff81971660 T __xa_load +ffffffff819716d0 T __xa_store +ffffffff81971850 T xa_get_next +ffffffff81971970 T sg_alloc_table +ffffffff819719f0 T sg_free_table +ffffffff81971a50 T sg_copy_from_buffer +ffffffff81971a80 T i2c_master_xfer +ffffffff81971bb0 T __i2c_transfer +ffffffff81971c60 T i2c_transfer +ffffffff81971d30 T i2c_bb_master_xfer +ffffffff81971dd0 T i2c_bb_functionality +ffffffff81971e00 T i2c_bit_add_bus +ffffffff81971e40 T vga_disable_bridge +ffffffff81971ef0 T vga_get_uninterruptible +ffffffff81971f40 T vga_put +ffffffff81971fc0 T acpi_get_table +ffffffff81972090 T acpi_put_table +ffffffff819720c0 T acpi_get_handle +ffffffff81972110 T acpi_get_name +ffffffff819721b0 T acpi_evaluate_object +ffffffff81972410 T drm_linux_acpi_notify +ffffffff81972490 T register_acpi_notifier +ffffffff819724d0 T unregister_acpi_notifier +ffffffff81972560 T acpi_format_exception +ffffffff819725b0 T backlight_do_update_status +ffffffff819725d0 T backlight_device_register +ffffffff81972660 T backlight_device_unregister +ffffffff81972680 T devm_backlight_device_register +ffffffff819726d0 T backlight_schedule_update_status +ffffffff819726f0 T backlight_enable +ffffffff81972730 T backlight_disable +ffffffff81972770 T drm_sysfs_hotplug_event +ffffffff81972790 T drm_sysfs_connector_hotplug_event +ffffffff819727b0 T drm_sysfs_connector_status_event +ffffffff819727d0 T dma_fence_get +ffffffff81972810 T dma_fence_get_rcu +ffffffff81972850 T dma_fence_get_rcu_safe +ffffffff81972890 T dma_fence_release +ffffffff819728c0 T dma_fence_put +ffffffff81972930 T dma_fence_signal_timestamp_locked +ffffffff81972a00 T dma_fence_signal +ffffffff81972b40 T dma_fence_signal_locked +ffffffff81972c70 T dma_fence_signal_timestamp +ffffffff81972d60 T dma_fence_is_signaled +ffffffff81972dd0 T dma_fence_is_signaled_locked +ffffffff81972f20 T dma_fence_wait_timeout +ffffffff81972f80 T dma_fence_default_wait +ffffffff81973230 T dma_fence_wait +ffffffff81973290 T dma_fence_enable_sw_signaling +ffffffff81973410 T dma_fence_init +ffffffff81973470 T dma_fence_add_callback +ffffffff81973670 T dma_fence_remove_callback +ffffffff819736f0 T dma_fence_context_alloc +ffffffff81973730 t dma_fence_default_wait_cb +ffffffff81973780 T dma_fence_wait_any_timeout +ffffffff81973ac0 T dma_fence_get_stub +ffffffff81973c70 T dma_fence_allocate_private_stub +ffffffff81973da0 T dma_fence_array_create +ffffffff81973ec0 t irq_dma_fence_array_work +ffffffff81973f50 T dma_fence_array_first +ffffffff81973fb0 T dma_fence_array_next +ffffffff81974010 t dma_fence_array_get_driver_name +ffffffff81974040 t dma_fence_array_get_timeline_name +ffffffff81974070 t dma_fence_array_enable_signaling +ffffffff81974170 t dma_fence_array_signaled +ffffffff819741c0 t dma_fence_array_release +ffffffff81974280 T dma_fence_chain_find_seqno +ffffffff819743a0 T dma_fence_chain_walk +ffffffff819745e0 T dma_fence_chain_init +ffffffff819746f0 t dma_fence_chain_get_driver_name +ffffffff81974720 t dma_fence_chain_get_timeline_name +ffffffff81974750 t dma_fence_chain_enable_signaling +ffffffff81974900 t dma_fence_chain_signaled +ffffffff819749f0 t dma_fence_chain_release +ffffffff81974b30 T dma_fence_is_container +ffffffff81974b80 T dmabuf_read +ffffffff81974bb0 T dmabuf_write +ffffffff81974be0 T dmabuf_ioctl +ffffffff81974c10 T dmabuf_kqfilter +ffffffff81974c40 T dmabuf_stat +ffffffff81974d00 T dmabuf_close +ffffffff81974d70 T dmabuf_seek +ffffffff81974e00 T dma_buf_export +ffffffff81974eb0 T dma_buf_get +ffffffff81974f40 T dma_buf_put +ffffffff81974ff0 T dma_buf_fd +ffffffff81975110 T get_dma_buf +ffffffff81975150 T pcie_get_speed_cap +ffffffff819752f0 T printk +ffffffff81975380 T pcie_get_width_cap +ffffffff81975470 T pcie_aspm_enabled +ffffffff81975500 T wait_on_bit +ffffffff819755d0 T wait_on_bit_timeout +ffffffff819756a0 T wake_up_bit +ffffffff819756e0 T clear_and_wake_up_bit +ffffffff81975730 T bit_waitqueue +ffffffff81975760 T __var_waitqueue +ffffffff81975790 T drm_linux_init +ffffffff81975900 T drm_linux_exit +ffffffff81975960 T pci_resize_resource +ffffffff81975ab0 T register_shrinker +ffffffff81975b00 T unregister_shrinker +ffffffff81975b60 T drmbackoff +ffffffff81975bf0 T bitmap_zalloc +ffffffff81975c20 T bitmap_free +ffffffff81975c40 T atomic_dec_and_mutex_lock +ffffffff81975cc0 T interval_tree_iter_first +ffffffff81975d70 T interval_tree_remove +ffffffff81975d90 T interval_tree_insert +ffffffff81975e00 T syncfile_read +ffffffff81975e30 T syncfile_write +ffffffff81975e60 T syncfile_ioctl +ffffffff81975e90 T syncfile_kqfilter +ffffffff81975ec0 T syncfile_stat +ffffffff81975f70 T syncfile_close +ffffffff81976010 T syncfile_seek +ffffffff81976090 T fd_install +ffffffff81976160 T fput +ffffffff819761b0 T get_unused_fd_flags +ffffffff819762c0 T put_unused_fd +ffffffff81976350 T sync_file_get_fence +ffffffff81976400 T sync_file_create +ffffffff81976490 T drm_firmware_drivers_only +ffffffff819764c0 t dma_fence_stub_get_name +ffffffff819764f0 t dma_fence_array_cb_func +ffffffff81976570 t dma_fence_chain_cb +ffffffff81976630 t dma_fence_chain_timo +ffffffff81977000 T drmm_kzalloc +ffffffff81977100 T drmm_kcalloc +ffffffff81977210 T drmm_kstrdup +ffffffff81977350 T drmm_kfree +ffffffff81977450 T drmm_add_action +ffffffff81977510 T drmm_add_action_or_reset +ffffffff819775e0 T drm_managed_release +ffffffff819776a0 T drmm_add_final_kfree +ffffffff81978000 T mipi_dsi_attach +ffffffff81978050 T mipi_dsi_detach +ffffffff819780a0 T devm_mipi_dsi_attach +ffffffff81978110 T mipi_dsi_packet_format_is_short +ffffffff81978160 T mipi_dsi_packet_format_is_long +ffffffff819781b0 T mipi_dsi_create_packet +ffffffff819782c0 T mipi_dsi_shutdown_peripheral +ffffffff81978370 T mipi_dsi_turn_on_peripheral +ffffffff81978420 T mipi_dsi_set_maximum_return_packet_size +ffffffff819784d0 T mipi_dsi_compression_mode +ffffffff81978580 T mipi_dsi_picture_parameter_set +ffffffff81978630 T mipi_dsi_generic_write +ffffffff819786f0 T mipi_dsi_generic_read +ffffffff819787a0 T mipi_dsi_dcs_write_buffer +ffffffff81978860 T mipi_dsi_dcs_write +ffffffff819789b0 T mipi_dsi_dcs_read +ffffffff81978a50 T mipi_dsi_dcs_nop +ffffffff81978b00 T mipi_dsi_dcs_soft_reset +ffffffff81978bb0 T mipi_dsi_dcs_get_power_mode +ffffffff81978c70 T mipi_dsi_dcs_get_pixel_format +ffffffff81978d30 T mipi_dsi_dcs_enter_sleep_mode +ffffffff81978de0 T mipi_dsi_dcs_exit_sleep_mode +ffffffff81978e90 T mipi_dsi_dcs_set_display_off +ffffffff81978f40 T mipi_dsi_dcs_set_display_on +ffffffff81978ff0 T mipi_dsi_dcs_set_column_address +ffffffff819790b0 T mipi_dsi_dcs_set_page_address +ffffffff81979170 T mipi_dsi_dcs_set_tear_off +ffffffff81979220 T mipi_dsi_dcs_set_tear_on +ffffffff819792d0 T mipi_dsi_dcs_set_pixel_format +ffffffff8197a000 T __drm_mm_interval_first +ffffffff8197a0c0 T drm_mm_reserve_node +ffffffff8197a370 t add_hole +ffffffff8197a4d0 T drm_mm_insert_node_in_range +ffffffff8197aac0 T drm_mm_remove_node +ffffffff8197abf0 T drm_mm_replace_node +ffffffff8197add0 T drm_mm_scan_init_with_range +ffffffff8197ae50 T drm_mm_scan_add_block +ffffffff8197afc0 T drm_mm_scan_remove_block +ffffffff8197b040 T drm_mm_scan_color_evict +ffffffff8197b120 T drm_mm_init +ffffffff8197b1d0 T drm_mm_takedown +ffffffff8197b210 T drm_mm_print +ffffffff8197c000 T drm_modeset_register_all +ffffffff8197c0a0 T drm_modeset_unregister_all +ffffffff8197c0e0 T drm_mode_getresources +ffffffff8197c390 T drm_mode_config_reset +ffffffff8197c4f0 T drmm_mode_config_init +ffffffff8197cb70 T drm_mode_config_cleanup +ffffffff8197ceb0 t drm_mode_config_init_release +ffffffff8197cec0 T drm_mode_config_validate +ffffffff8197e000 T __drm_mode_object_add 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drm_mode_probed_add +ffffffff819802e0 T drm_cvt_mode +ffffffff81980790 T drm_mode_set_name +ffffffff819807e0 T drm_gtf_mode_complex +ffffffff81980ae0 T drm_gtf_mode +ffffffff81980b30 T drm_mode_get_hv_timing +ffffffff81980b80 T drm_mode_init +ffffffff81980c50 T drm_mode_set_crtcinfo +ffffffff81980e00 T drm_mode_copy +ffffffff81980e60 T drm_mode_duplicate +ffffffff81980ee0 T drm_mode_match +ffffffff81981080 T drm_mode_equal +ffffffff819810a0 T drm_mode_equal_no_clocks +ffffffff819810c0 T drm_mode_equal_no_clocks_no_stereo +ffffffff81981180 T drm_mode_validate_driver +ffffffff81981270 T drm_mode_validate_size +ffffffff819812c0 T drm_mode_validate_ycbcr420 +ffffffff81981330 T drm_mode_is_420_only +ffffffff81981380 T drm_get_mode_status_name +ffffffff81981400 T drm_mode_prune_invalid +ffffffff81981690 T drm_mode_sort +ffffffff819816c0 t drm_mode_compare +ffffffff81981850 T drm_connector_list_update +ffffffff81981a20 T drm_mode_parse_command_line_for_connector +ffffffff81981a50 T drm_mode_create_from_cmdline_mode +ffffffff81981b40 T drm_mode_convert_to_umode +ffffffff81981cd0 T drm_mode_convert_umode +ffffffff81981ef0 T drm_mode_is_420_also +ffffffff81981f40 T drm_mode_is_420 +ffffffff81982000 T drm_helper_move_panel_connectors_to_head +ffffffff819820f0 T drm_helper_mode_fill_fb_struct +ffffffff819821b0 T drm_crtc_init +ffffffff81982280 T drm_mode_config_helper_suspend +ffffffff81982310 T drm_mode_config_helper_resume +ffffffff81983000 T drm_modeset_lock_all +ffffffff819831e0 T drm_modeset_acquire_init +ffffffff81983270 T drm_modeset_lock_all_ctx +ffffffff819833e0 T drm_modeset_backoff +ffffffff819834b0 T drm_modeset_acquire_fini +ffffffff819834e0 T drm_warn_on_modeset_not_all_locked +ffffffff81983630 T drm_modeset_unlock_all +ffffffff81983710 T drm_modeset_drop_locks +ffffffff819837a0 T drm_modeset_unlock +ffffffff81983870 t modeset_lock +ffffffff81983ae0 T drm_modeset_lock_init +ffffffff81983b40 T drm_modeset_lock +ffffffff81983ba0 T drm_modeset_lock_single_interruptible +ffffffff81983bc0 t __ww_mutex_lock +ffffffff81984000 T drm_mtrr_add +ffffffff81984070 T drm_mtrr_del +ffffffff81985000 T drm_panel_init +ffffffff81985040 T drm_panel_add +ffffffff81985090 T drm_panel_remove +ffffffff819850f0 T drm_panel_prepare +ffffffff81985140 T drm_panel_unprepare +ffffffff81985190 T drm_panel_enable +ffffffff81985230 T drm_panel_disable +ffffffff819852c0 T drm_panel_get_modes +ffffffff81985310 T drm_panel_of_backlight +ffffffff81986000 T drm_get_panel_orientation_quirk +ffffffff81987000 T drm_pci_set_busid +ffffffff81987090 t kasprintf +ffffffff81988000 T drm_universal_plane_init +ffffffff819880f0 t __drm_universal_plane_init +ffffffff819887e0 T __drmm_universal_plane_alloc +ffffffff81988920 t drmm_universal_plane_alloc_release +ffffffff81988970 T __drm_universal_plane_alloc +ffffffff81988ab0 T drm_plane_register_all +ffffffff81988ba0 T drm_plane_unregister_all +ffffffff81988c10 T drm_plane_cleanup +ffffffff81988d60 T drm_plane_from_index +ffffffff81988dc0 T drm_plane_force_disable +ffffffff81988ed0 T drm_mode_plane_set_obj_prop +ffffffff81988f50 T drm_mode_getplane_res +ffffffff81989050 T drm_mode_getplane +ffffffff819891b0 T drm_plane_check_pixel_format +ffffffff81989270 T drm_any_plane_has_format +ffffffff819893b0 T drm_mode_setplane +ffffffff81989710 T drm_mode_cursor_ioctl +ffffffff81989780 t drm_mode_cursor_common +ffffffff81989e00 T drm_mode_cursor2_ioctl +ffffffff81989e20 T drm_mode_page_flip_ioctl +ffffffff8198a390 T drm_plane_enable_fb_damage_clips +ffffffff8198a3b0 T drm_plane_get_damage_clips_count +ffffffff8198a3f0 T __drm_plane_get_damage_clips +ffffffff8198a430 T drm_plane_get_damage_clips +ffffffff8198a4d0 T drm_create_scaling_filter_prop +ffffffff8198a620 T drm_plane_create_scaling_filter_property +ffffffff8198a690 t kasprintf +ffffffff8198a760 t __setplane_internal +ffffffff8198a950 t __setplane_check +ffffffff8198b000 T drm_plane_helper_update_primary +ffffffff8198b4b0 t get_connectors_for_crtc +ffffffff8198b5c0 T drm_plane_helper_disable_primary +ffffffff8198b670 T drm_plane_helper_destroy +ffffffff8198b6a0 T drm_plane_helper_atomic_check +ffffffff8198c000 T drm_prime_remove_buf_handle +ffffffff8198c090 T drm_prime_init_file_private +ffffffff8198c0f0 T drm_prime_destroy_file_private +ffffffff8198c150 T drm_gem_dmabuf_export +ffffffff8198c1b0 T drm_gem_dmabuf_release +ffffffff8198c1f0 T drm_gem_prime_fd_to_handle +ffffffff8198c400 T drm_gem_prime_import +ffffffff8198c460 t drm_prime_add_buf_handle +ffffffff8198c5b0 T drm_prime_fd_to_handle_ioctl +ffffffff8198c600 T drm_gem_prime_handle_to_fd +ffffffff8198c830 T drm_prime_handle_to_fd_ioctl +ffffffff8198c890 T drm_gem_map_attach +ffffffff8198c8b0 T drm_gem_map_detach +ffffffff8198c8d0 T drm_gem_dmabuf_vmap +ffffffff8198c8f0 T drm_gem_dmabuf_vunmap +ffffffff8198c910 T drm_gem_prime_mmap +ffffffff8198c960 T drm_prime_pages_to_sg +ffffffff8198c9b0 T drm_prime_get_contiguous_size +ffffffff8198ca00 T drm_gem_prime_export +ffffffff8198ca90 T drm_gem_prime_import_dev +ffffffff8198caf0 T drm_prime_sg_to_page_array +ffffffff8198cb40 T drm_prime_sg_to_dma_addr_array +ffffffff8198cb90 T drm_prime_gem_destroy +ffffffff8198d000 T __drm_puts_coredump +ffffffff8198d0f0 T __drm_printfn_coredump +ffffffff8198d210 T __drm_puts_seq_file +ffffffff8198d240 T __drm_printfn_seq_file +ffffffff8198d270 T __drm_printfn_info +ffffffff8198d2a0 T __drm_printfn_debug +ffffffff8198d2d0 T __drm_printfn_err +ffffffff8198d310 T drm_puts +ffffffff8198d340 T drm_printf +ffffffff8198d3c0 T drm_print_bits +ffffffff8198d5e0 T drm_dev_printk +ffffffff8198d680 T __drm_dev_dbg +ffffffff8198d710 T ___drm_dbg +ffffffff8198d7a0 T __drm_err +ffffffff8198d830 T drm_print_regset32 +ffffffff8198e000 T drm_crtc_mode_valid +ffffffff8198e050 T drm_encoder_mode_valid +ffffffff8198e090 T drm_connector_mode_valid +ffffffff8198e110 T drm_kms_helper_poll_enable +ffffffff8198e200 T drm_helper_probe_detect +ffffffff8198e3f0 T drm_helper_probe_single_connector_modes +ffffffff8198e9b0 t __drm_helper_update_and_validate +ffffffff8198ed60 T drm_kms_helper_hotplug_event +ffffffff8198eda0 T drm_kms_helper_connector_hotplug_event +ffffffff8198ede0 T drm_kms_helper_is_poll_worker +ffffffff8198ee10 T drm_kms_helper_poll_disable +ffffffff8198ee90 T drm_kms_helper_poll_init +ffffffff8198eef0 t output_poll_execute +ffffffff8198f180 T drm_kms_helper_poll_fini +ffffffff8198f200 T drm_connector_helper_hpd_irq_event +ffffffff8198f2d0 t check_connector_changed +ffffffff8198f4b0 T drm_helper_hpd_irq_event +ffffffff8198f600 T drm_crtc_helper_mode_valid_fixed +ffffffff8198f650 T drm_connector_helper_get_modes_from_ddc +ffffffff8198f6e0 T drm_connector_helper_get_modes_fixed +ffffffff8198f850 T drm_connector_helper_get_modes +ffffffff8198f8b0 t __delayed_work_tick +ffffffff81990000 T drm_property_create +ffffffff81990200 T drm_property_create_enum +ffffffff819902b0 T drm_property_add_enum +ffffffff819904d0 T drm_property_destroy +ffffffff81990580 T drm_property_create_bitmask +ffffffff819906b0 T drm_property_create_range +ffffffff81990720 T drm_property_create_signed_range +ffffffff81990790 T drm_property_create_object +ffffffff81990830 T drm_property_create_bool +ffffffff81990890 T drm_mode_getproperty_ioctl +ffffffff81990aa0 T drm_property_create_blob +ffffffff81990be0 t drm_property_free_blob +ffffffff81990c60 T drm_property_blob_put +ffffffff81990ca0 T drm_property_destroy_user_blobs +ffffffff81990d20 T drm_property_blob_get +ffffffff81990d60 T drm_property_lookup_blob +ffffffff81990d80 T drm_property_replace_global_blob +ffffffff81990ed0 T drm_property_replace_blob +ffffffff81990f40 T drm_mode_getblob_ioctl +ffffffff81991000 T drm_mode_createblob_ioctl +ffffffff81991100 T drm_mode_destroyblob_ioctl +ffffffff81991210 T drm_property_change_valid_get +ffffffff81991460 T drm_property_change_valid_put +ffffffff81992000 T drm_rect_intersect +ffffffff81992080 T drm_rect_clip_scaled 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drm_syncobj_release +ffffffff81994b80 t drm_syncobj_release_handle +ffffffff81994c30 T drm_syncobj_create_ioctl +ffffffff81994d60 T drm_syncobj_destroy_ioctl +ffffffff81994e80 T drm_syncobj_handle_to_fd_ioctl +ffffffff81995070 T drm_syncobj_fd_to_handle_ioctl +ffffffff81995260 T drm_syncobj_transfer_ioctl +ffffffff81995680 T drm_timeout_abs_to_jiffies +ffffffff81995760 T drm_syncobj_wait_ioctl +ffffffff819958f0 t drm_syncobj_array_find +ffffffff81995b20 t drm_syncobj_array_free +ffffffff81995c00 T drm_syncobj_timeline_wait_ioctl +ffffffff81995d90 T drm_syncobj_reset_ioctl +ffffffff81995ef0 T drm_syncobj_signal_ioctl +ffffffff819960c0 T drm_syncobj_timeline_signal_ioctl +ffffffff819962f0 T drm_syncobj_query_ioctl +ffffffff819964f0 t drm_syncobj_array_wait_timeout +ffffffff81996950 t syncobj_wait_fence_func +ffffffff81997000 T drm_vblank_count +ffffffff81997090 T drm_crtc_accurate_vblank_count +ffffffff819971a0 t drm_update_vblank_count +ffffffff819975f0 T drm_vblank_disable_and_save +ffffffff81997740 T drm_vblank_init +ffffffff819978c0 t vblank_disable_fn +ffffffff81997940 t drm_vblank_init_release +ffffffff819979d0 T drm_dev_has_vblank +ffffffff81997a00 T drm_crtc_vblank_waitqueue +ffffffff81997a50 T drm_calc_timestamping_constants +ffffffff81997c80 T drm_crtc_vblank_helper_get_vblank_timestamp_internal +ffffffff819981b0 T drm_crtc_vblank_helper_get_vblank_timestamp +ffffffff819981d0 T drm_crtc_vblank_count +ffffffff81998260 T drm_crtc_vblank_count_and_time +ffffffff81998320 T drm_crtc_arm_vblank_event +ffffffff81998400 T drm_crtc_send_vblank_event +ffffffff819985b0 T drm_vblank_get +ffffffff819986d0 t drm_vblank_enable +ffffffff81998890 T drm_crtc_vblank_get +ffffffff819989a0 T drm_vblank_put +ffffffff81998ad0 T drm_crtc_vblank_put +ffffffff81998af0 T drm_wait_one_vblank +ffffffff81998ff0 T drm_crtc_wait_one_vblank +ffffffff81999010 T drm_crtc_vblank_off +ffffffff81999400 T drm_crtc_vblank_reset +ffffffff81999530 T drm_crtc_set_max_vblank_count +ffffffff81999610 T drm_crtc_vblank_on +ffffffff81999760 t drm_reset_vblank_timestamp +ffffffff81999960 T drm_crtc_vblank_restore +ffffffff81999d40 T drm_legacy_modeset_ctl_ioctl +ffffffff81999f60 T drm_wait_vblank_ioctl +ffffffff8199aa50 T drm_handle_vblank +ffffffff8199ad30 t drm_handle_vblank_events +ffffffff8199afc0 T drm_crtc_handle_vblank +ffffffff8199afe0 T drm_crtc_get_sequence_ioctl +ffffffff8199b1d0 T drm_crtc_queue_sequence_ioctl +ffffffff8199b5a0 t __get_vblank_counter +ffffffff8199c000 T drm_handle_vblank_works +ffffffff8199c1a0 T drm_vblank_cancel_pending_works +ffffffff8199c2e0 T drm_vblank_work_schedule +ffffffff8199c550 T drm_vblank_work_cancel_sync +ffffffff8199c6a0 T drm_vblank_work_flush +ffffffff8199c7d0 T drm_vblank_work_init +ffffffff8199c840 T drm_vblank_worker_init +ffffffff8199d000 T drm_vma_offset_manager_init +ffffffff8199d040 T drm_vma_offset_manager_destroy +ffffffff8199d060 T drm_vma_offset_lookup_locked +ffffffff8199d0f0 T drm_vma_offset_add +ffffffff8199d180 T drm_vma_offset_remove +ffffffff8199d1d0 T drm_vma_node_allow +ffffffff8199d1f0 t vma_node_allow +ffffffff8199d320 T drm_vma_node_allow_once +ffffffff8199d340 T drm_vma_node_revoke +ffffffff8199d3c0 T drm_vma_node_is_allowed +ffffffff8199e000 T hdmi_avi_infoframe_init +ffffffff8199e080 T hdmi_avi_infoframe_check +ffffffff8199e0d0 T hdmi_avi_infoframe_pack_only +ffffffff8199e2d0 T hdmi_avi_infoframe_pack +ffffffff8199e330 T hdmi_spd_infoframe_init +ffffffff8199e3f0 T hdmi_spd_infoframe_check +ffffffff8199e440 T hdmi_spd_infoframe_pack_only +ffffffff8199e570 T hdmi_spd_infoframe_pack +ffffffff8199e6d0 T hdmi_audio_infoframe_init +ffffffff8199e720 T hdmi_audio_infoframe_check +ffffffff8199e770 T hdmi_audio_infoframe_pack_only +ffffffff8199e8c0 T hdmi_audio_infoframe_pack +ffffffff8199e910 T hdmi_audio_infoframe_pack_for_dp +ffffffff8199ea00 T hdmi_vendor_infoframe_init +ffffffff8199ea60 T hdmi_vendor_infoframe_check +ffffffff8199eb00 T hdmi_vendor_infoframe_pack_only +ffffffff8199ecd0 T hdmi_vendor_infoframe_pack +ffffffff8199ed70 T hdmi_drm_infoframe_init +ffffffff8199edd0 T hdmi_drm_infoframe_check +ffffffff8199ee20 T hdmi_drm_infoframe_pack_only +ffffffff8199eff0 T hdmi_drm_infoframe_pack +ffffffff8199f040 T hdmi_infoframe_check +ffffffff8199f1a0 T hdmi_infoframe_pack_only +ffffffff8199f3c0 T hdmi_infoframe_pack +ffffffff8199f530 T hdmi_infoframe_log +ffffffff819a0430 T hdmi_drm_infoframe_unpack_only +ffffffff819a0510 T hdmi_infoframe_unpack +ffffffff819a1000 T list_sort +ffffffff819a2000 T radix_tree_lookup +ffffffff819a20b0 T radix_tree_iter_find +ffffffff819a21a0 T radix_tree_delete +ffffffff819a2340 T radix_tree_iter_delete +ffffffff819a2360 T radix_tree_insert +ffffffff819a3000 T sort +ffffffff819a3040 t qsort +ffffffff819a5000 T drm_dp_dual_mode_read +ffffffff819a5110 T drm_dp_dual_mode_write +ffffffff819a51f0 T drm_dp_dual_mode_detect +ffffffff819a54a0 T drm_dp_dual_mode_max_tmds_clock +ffffffff819a55d0 T drm_dp_dual_mode_get_tmds_output +ffffffff819a5700 T drm_dp_dual_mode_set_tmds_output +ffffffff819a5990 T drm_dp_get_dual_mode_type_name +ffffffff819a5a00 T drm_lspcon_get_mode +ffffffff819a5ba0 T drm_lspcon_set_mode +ffffffff819a6000 T drm_dp_channel_eq_ok +ffffffff819a6080 T drm_dp_clock_recovery_ok +ffffffff819a6100 T drm_dp_get_adjust_request_voltage +ffffffff819a6140 T drm_dp_get_adjust_request_pre_emphasis +ffffffff819a6190 T drm_dp_get_adjust_tx_ffe_preset +ffffffff819a61d0 T drm_dp_128b132b_lane_channel_eq_done +ffffffff819a6250 T drm_dp_128b132b_lane_symbol_locked +ffffffff819a62c0 T drm_dp_128b132b_eq_interlane_align_done +ffffffff819a62f0 T drm_dp_128b132b_cds_interlane_align_done +ffffffff819a6320 T drm_dp_128b132b_link_training_failed +ffffffff819a6350 T drm_dp_read_clock_recovery_delay +ffffffff819a6450 T drm_dp_read_channel_eq_delay +ffffffff819a6550 T drm_dp_128b132b_read_aux_rd_interval +ffffffff819a6600 T drm_dp_link_train_clock_recovery_delay +ffffffff819a6690 t __8b10b_clock_recovery_delay_us +ffffffff819a6710 T drm_dp_link_train_channel_eq_delay +ffffffff819a6790 T drm_dp_phy_name +ffffffff819a67d0 T drm_dp_lttpr_link_train_clock_recovery_delay +ffffffff819a67f0 T drm_dp_lttpr_link_train_channel_eq_delay +ffffffff819a6860 T drm_dp_link_rate_to_bw_code +ffffffff819a68d0 T drm_dp_bw_code_to_link_rate +ffffffff819a6930 T drm_dp_dpcd_probe +ffffffff819a6a70 t drm_dp_dpcd_access +ffffffff819a6ba0 T drm_dp_dpcd_read +ffffffff819a6cd0 T drm_dp_dpcd_write +ffffffff819a6de0 T drm_dp_dpcd_read_link_status +ffffffff819a6e00 T drm_dp_dpcd_read_phy_link_status +ffffffff819a6f00 T drm_dp_downstream_is_type +ffffffff819a6f40 T drm_dp_downstream_is_tmds +ffffffff819a6fb0 T drm_dp_send_real_edid_checksum +ffffffff819a7210 T drm_dp_read_dpcd_caps +ffffffff819a73a0 T drm_dp_read_downstream_info +ffffffff819a74a0 T drm_dp_downstream_max_dotclock +ffffffff819a74f0 T drm_dp_downstream_max_tmds_clock +ffffffff819a7590 T drm_dp_downstream_min_tmds_clock +ffffffff819a7610 T drm_dp_downstream_max_bpc +ffffffff819a76b0 T drm_dp_downstream_420_passthrough +ffffffff819a7710 T drm_dp_downstream_444_to_420_conversion +ffffffff819a7770 T drm_dp_downstream_rgb_to_ycbcr_conversion +ffffffff819a77d0 T drm_dp_downstream_mode +ffffffff819a7860 T drm_dp_downstream_id +ffffffff819a7880 T drm_dp_downstream_debug +ffffffff819a7920 T drm_dp_subconnector_type +ffffffff819a7990 T drm_dp_set_subconnector_property +ffffffff819a7a00 T drm_dp_read_sink_count_cap +ffffffff819a7a50 T drm_dp_read_sink_count +ffffffff819a7ab0 T drm_dp_remote_aux_init +ffffffff819a7ae0 t drm_dp_aux_crc_work +ffffffff819a7c60 T drm_dp_aux_init +ffffffff819a7d10 T drm_dp_aux_register +ffffffff819a7e30 T drm_dp_aux_unregister +ffffffff819a7e60 T drm_dp_psr_setup_time +ffffffff819a7eb0 T drm_dp_start_crc +ffffffff819a7f60 T drm_dp_stop_crc +ffffffff819a7ff0 T drm_dp_read_desc +ffffffff819a81b0 T drm_dp_dsc_sink_max_slice_count +ffffffff819a8240 T drm_dp_dsc_sink_line_buf_depth +ffffffff819a8280 T drm_dp_dsc_sink_supported_input_bpcs +ffffffff819a82f0 T drm_dp_read_lttpr_common_caps +ffffffff819a83b0 T drm_dp_read_lttpr_phy_caps +ffffffff819a8470 T drm_dp_lttpr_count +ffffffff819a8500 T drm_dp_lttpr_max_link_rate +ffffffff819a8560 T drm_dp_lttpr_max_lane_count +ffffffff819a8590 T drm_dp_lttpr_voltage_swing_level_3_supported +ffffffff819a85c0 T drm_dp_lttpr_pre_emphasis_level_3_supported +ffffffff819a85f0 T drm_dp_get_phy_test_pattern +ffffffff819a8710 T drm_dp_set_phy_test_pattern +ffffffff819a87e0 T drm_dp_vsc_sdp_log +ffffffff819a8b00 T drm_dp_get_pcon_max_frl_bw +ffffffff819a8b50 T drm_dp_pcon_frl_prepare +ffffffff819a8ba0 T drm_dp_pcon_is_frl_ready +ffffffff819a8bf0 T drm_dp_pcon_frl_configure_1 +ffffffff819a8cf0 T drm_dp_pcon_frl_configure_2 +ffffffff819a8d50 T drm_dp_pcon_reset_frl_config +ffffffff819a8da0 T drm_dp_pcon_frl_enable +ffffffff819a8e60 T drm_dp_pcon_hdmi_link_active +ffffffff819a8eb0 T drm_dp_pcon_hdmi_link_mode +ffffffff819a8f20 T drm_dp_pcon_hdmi_frl_link_error_count +ffffffff819a9020 T drm_dp_pcon_enc_is_dsc_1_2 +ffffffff819a9050 T drm_dp_pcon_dsc_max_slices +ffffffff819a90e0 T drm_dp_pcon_dsc_max_slice_width +ffffffff819a9110 T drm_dp_pcon_dsc_bpp_incr +ffffffff819a9150 T drm_dp_pcon_pps_default +ffffffff819a91e0 T drm_dp_pcon_pps_override_buf +ffffffff819a9290 T drm_dp_pcon_pps_override_param +ffffffff819a9370 T drm_dp_pcon_convert_rgb_to_ycbcr +ffffffff819a9410 T drm_edp_backlight_set_level +ffffffff819a94f0 T drm_edp_backlight_enable +ffffffff819a9700 t drm_edp_backlight_set_enable +ffffffff819a9830 T drm_edp_backlight_disable +ffffffff819a9870 T drm_edp_backlight_init +ffffffff819a9dc0 T drm_panel_dp_aux_backlight +ffffffff819a9f50 t __128b132b_channel_eq_delay_us +ffffffff819a9fd0 t __8b10b_channel_eq_delay_us +ffffffff819aa050 t drm_dp_aux_get_crc +ffffffff819aa120 t drm_dp_i2c_xfer +ffffffff819aa370 t drm_dp_i2c_functionality +ffffffff819aa3a0 t drm_dp_i2c_do_msg +ffffffff819aa770 t lock_bus +ffffffff819aa790 t trylock_bus +ffffffff819aa7e0 t unlock_bus +ffffffff819aa800 t dp_aux_backlight_update_status +ffffffff819ab000 T drm_dp_encode_sideband_req +ffffffff819ab420 T drm_dp_decode_sideband_req +ffffffff819ab970 T drm_dp_dump_sideband_msg_req_body +ffffffff819abd30 T drm_dp_mst_get_port_malloc +ffffffff819abd80 T drm_dp_mst_put_port_malloc +ffffffff819abe80 t kref_put +ffffffff819abec0 T drm_atomic_get_mst_payload_state +ffffffff819abf20 T drm_dp_mst_dpcd_read +ffffffff819ac1e0 T drm_dp_mst_dpcd_write +ffffffff819ac230 t drm_dp_send_dpcd_write +ffffffff819ac470 T drm_dp_mst_connector_late_register +ffffffff819ac4f0 T drm_dp_mst_connector_early_unregister +ffffffff819ac530 T drm_dp_send_power_updown_phy +ffffffff819ac770 t drm_dp_mst_topology_put_port +ffffffff819ac8a0 t drm_dp_mst_wait_tx_reply +ffffffff819acc40 T drm_dp_send_query_stream_enc_status +ffffffff819acf00 T drm_dp_add_payload_part1 +ffffffff819ad0b0 T drm_dp_remove_payload +ffffffff819ad250 T drm_dp_add_payload_part2 +ffffffff819ad400 T drm_dp_get_vc_payload_bw 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drm_connector_attach_content_protection_property +ffffffff819b6030 T drm_hdcp_check_ksvs_revoked +ffffffff819b6080 T drm_hdcp_update_content_protection +ffffffff819b7000 T drm_hdmi_infoframe_set_hdr_metadata +ffffffff819b7120 T drm_hdmi_avi_infoframe_colorimetry +ffffffff819b7170 T drm_hdmi_avi_infoframe_bars +ffffffff819b71c0 T drm_hdmi_avi_infoframe_content_type +ffffffff819b8000 T drm_scdc_read +ffffffff819b8090 T drm_scdc_write +ffffffff819b8170 T drm_scdc_get_scrambling_status +ffffffff819b8230 T drm_scdc_set_scrambling +ffffffff819b8380 T drm_scdc_set_high_tmds_clock_ratio +ffffffff819b9000 T drm_gem_ttm_mmap +ffffffff819b9070 T drm_gem_ttm_vmap +ffffffff819b9080 T drm_gem_ttm_vunmap +ffffffff819ba000 T ttm_agp_bind +ffffffff819ba050 T ttm_agp_unbind +ffffffff819ba070 T ttm_agp_is_bound +ffffffff819ba0c0 T ttm_agp_destroy +ffffffff819ba0e0 T ttm_agp_tt_create +ffffffff819bb000 T ttm_bo_move_to_lru_tail +ffffffff819bb040 T ttm_bo_set_bulk_move +ffffffff819bb100 T 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drm_sched_entity_push_job +ffffffff819cbd60 t drm_sched_entity_kill_jobs_cb +ffffffff819cbdb0 t drm_sched_entity_kill_jobs_work +ffffffff819cbe20 t drm_sched_entity_clear_dep +ffffffff819cbe40 t drm_sched_entity_wakeup +ffffffff819cc000 T drm_sched_fence_slab_init +ffffffff819cc060 T drm_sched_fence_slab_fini +ffffffff819cc080 T drm_sched_fence_scheduled +ffffffff819cc090 T drm_sched_fence_finished +ffffffff819cc0b0 T drm_sched_fence_free +ffffffff819cc160 T to_drm_sched_fence +ffffffff819cc1c0 T drm_sched_fence_alloc +ffffffff819cc240 T drm_sched_fence_init +ffffffff819cc2c0 t drm_sched_fence_get_driver_name +ffffffff819cc2f0 t drm_sched_fence_get_timeline_name +ffffffff819cc340 t drm_sched_fence_release_scheduled +ffffffff819cc440 t drm_sched_fence_release_finished +ffffffff819cd000 T drm_sched_rq_add_entity +ffffffff819cd090 T drm_sched_rq_remove_entity +ffffffff819cd130 T drm_sched_dependency_optimized +ffffffff819cd1d0 T drm_sched_fault +ffffffff819cd200 T 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gm45_digital_port_connected +ffffffff819d9c70 t g4x_digital_port_connected +ffffffff819d9d10 t ilk_digital_port_connected +ffffffff819d9d80 t ibx_digital_port_connected +ffffffff819d9df0 t intel_dp_encoder_reset +ffffffff819d9ef0 t intel_dp_encoder_destroy +ffffffff819d9f50 t intel_dp_prepare +ffffffff819da220 t intel_enable_dp +ffffffff819da490 t intel_dp_link_down +ffffffff819db000 T g4x_hdmi_init +ffffffff819db2d0 t intel_hdmi_hotplug +ffffffff819db320 t pch_disable_hdmi +ffffffff819db340 t pch_post_disable_hdmi +ffffffff819db360 t g4x_disable_hdmi +ffffffff819db3b0 t intel_hdmi_get_hw_state +ffffffff819db460 t intel_hdmi_get_config +ffffffff819db610 t chv_hdmi_pre_pll_enable +ffffffff819db650 t chv_hdmi_pre_enable +ffffffff819db720 t vlv_enable_hdmi +ffffffff819db750 t chv_hdmi_post_disable +ffffffff819db7b0 t chv_hdmi_post_pll_disable +ffffffff819db7d0 t vlv_hdmi_pre_pll_enable +ffffffff819db810 t vlv_hdmi_pre_enable +ffffffff819db8e0 t vlv_hdmi_post_disable +ffffffff819db900 t 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intel_plane_atomic_check_with_state +ffffffff819e83b0 T intel_plane_atomic_check +ffffffff819e8500 T intel_plane_update_noarm +ffffffff819e8540 T intel_plane_update_arm +ffffffff819e8580 T intel_plane_disable_arm +ffffffff819e85a0 T intel_crtc_planes_update_noarm +ffffffff819e86c0 T intel_crtc_planes_update_arm +ffffffff819e8aa0 T intel_atomic_plane_check_clipping +ffffffff819e8d00 T intel_plane_helper_add +ffffffff819e8d40 t intel_prepare_plane_fb +ffffffff819e8fa0 t intel_cleanup_plane_fb +ffffffff819e9040 t add_rps_boost_after_vblank +ffffffff819e9140 t do_rps_boost +ffffffff819ea000 T intel_audio_codec_enable +ffffffff819ea220 T intel_audio_codec_disable +ffffffff819ea3b0 T intel_audio_hooks_init +ffffffff819ea430 T intel_audio_cdclk_change_pre +ffffffff819ea4d0 T intel_audio_cdclk_change_post +ffffffff819ea5d0 T intel_audio_init +ffffffff819ea5e0 T intel_audio_deinit +ffffffff819ea630 t g4x_audio_codec_enable +ffffffff819ea880 t g4x_audio_codec_disable +ffffffff819ea930 t ilk_audio_codec_enable +ffffffff819eac00 t ilk_audio_codec_disable +ffffffff819ead70 t audio_config_hdmi_pixel_clock +ffffffff819eaf40 t hsw_audio_codec_enable +ffffffff819eb890 t hsw_audio_codec_disable +ffffffff819ec000 T intel_backlight_invert_pwm_level +ffffffff819ec0d0 T intel_backlight_set_pwm_level +ffffffff819ec130 T intel_backlight_level_to_pwm +ffffffff819ec320 T intel_backlight_level_from_pwm +ffffffff819ec4c0 T intel_backlight_set_acpi +ffffffff819ec6e0 T intel_backlight_disable +ffffffff819ec7c0 T intel_backlight_enable +ffffffff819ec980 T intel_backlight_device_register +ffffffff819ecc00 T intel_backlight_device_unregister +ffffffff819ecc50 T intel_backlight_update +ffffffff819ecdf0 T intel_backlight_setup +ffffffff819ecf90 T intel_backlight_destroy +ffffffff819ecfc0 T intel_backlight_init_funcs +ffffffff819ed120 t intel_backlight_device_update_status +ffffffff819ed340 t intel_backlight_device_get_brightness +ffffffff819ed4c0 t bxt_setup_backlight +ffffffff819ed6d0 t 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intel_atomic_get_bw_state +ffffffff819f7e10 T intel_bw_min_cdclk +ffffffff819f8070 T intel_bw_calc_min_cdclk +ffffffff819f8430 T intel_bw_atomic_check +ffffffff819f8c30 T intel_bw_init +ffffffff819f8ca0 t icl_get_qgv_points +ffffffff819f9290 t skl_plane_calc_dbuf_bw +ffffffff819f93e0 t intel_bw_duplicate_state +ffffffff819f9450 t intel_bw_destroy_state +ffffffff819fa000 T intel_cdclk_get_cdclk +ffffffff819fa020 T intel_cdclk_init_hw +ffffffff819fa7b0 T intel_cdclk_uninit_hw +ffffffff819fa8c0 T intel_cdclk_needs_modeset +ffffffff819fa900 T intel_cdclk_dump_config +ffffffff819fa980 T intel_set_cdclk_pre_plane_update +ffffffff819faa90 t intel_set_cdclk +ffffffff819faea0 T intel_set_cdclk_post_plane_update +ffffffff819fafa0 T intel_crtc_compute_min_cdclk +ffffffff819fb310 T intel_atomic_get_cdclk_state +ffffffff819fb330 T intel_cdclk_atomic_check +ffffffff819fb430 T intel_cdclk_init +ffffffff819fb4a0 T intel_modeset_calc_cdclk +ffffffff819fb7d0 T intel_update_max_cdclk +ffffffff819fbb30 T intel_update_cdclk +ffffffff819fbbd0 T intel_read_rawclk +ffffffff819fbde0 T intel_init_cdclk_hooks +ffffffff819fc1b0 t bxt_set_cdclk +ffffffff819fca30 t skl_set_cdclk +ffffffff819fd060 t intel_cdclk_duplicate_state +ffffffff819fd0e0 t intel_cdclk_destroy_state +ffffffff819fd100 t bxt_get_cdclk +ffffffff819fd330 t bxt_modeset_calc_cdclk +ffffffff819fd770 t tgl_calc_voltage_level +ffffffff819fd7c0 t intel_compute_min_cdclk +ffffffff819fd980 t ehl_calc_voltage_level +ffffffff819fd9d0 t icl_calc_voltage_level +ffffffff819fda20 t bxt_calc_voltage_level +ffffffff819fda70 t skl_get_cdclk +ffffffff819fdc80 t skl_modeset_calc_cdclk +ffffffff819fde90 t bdw_get_cdclk +ffffffff819fdf80 t bdw_set_cdclk +ffffffff819fe540 t bdw_modeset_calc_cdclk +ffffffff819fe640 t hsw_get_cdclk +ffffffff819fe720 t fixed_modeset_calc_cdclk +ffffffff819fe760 t vlv_get_cdclk +ffffffff819fe820 t chv_set_cdclk +ffffffff819feb90 t vlv_modeset_calc_cdclk +ffffffff819fed40 t vlv_set_cdclk +ffffffff819ff260 t fixed_400mhz_get_cdclk +ffffffff819ff290 t fixed_450mhz_get_cdclk +ffffffff819ff2c0 t gm45_get_cdclk +ffffffff819ff3c0 t intel_hpll_vco +ffffffff819ff4f0 t g33_get_cdclk +ffffffff819ff600 t i965gm_get_cdclk +ffffffff819ff700 t pnv_get_cdclk +ffffffff819ff7b0 t i945gm_get_cdclk +ffffffff819ff820 t i915gm_get_cdclk +ffffffff819ff890 t fixed_333mhz_get_cdclk +ffffffff819ff8c0 t fixed_266mhz_get_cdclk +ffffffff819ff8f0 t i85x_get_cdclk +ffffffff819ff970 t fixed_200mhz_get_cdclk +ffffffff819ff9a0 t fixed_133mhz_get_cdclk +ffffffff81a00000 T intel_color_load_luts +ffffffff81a00030 T intel_color_commit_noarm +ffffffff81a00080 T intel_color_commit_arm +ffffffff81a000b0 T intel_color_check +ffffffff81a000d0 T intel_color_get_config +ffffffff81a00120 T intel_color_get_gamma_bit_precision +ffffffff81a00280 T intel_color_lut_equal +ffffffff81a006f0 T intel_color_init +ffffffff81a00810 t chv_color_check +ffffffff81a00970 t i9xx_color_commit_arm +ffffffff81a00980 t chv_load_luts +ffffffff81a00fc0 t chv_read_luts +ffffffff81a01110 t check_luts +ffffffff81a01250 t intel_color_add_affected_planes +ffffffff81a013b0 t i965_load_luts +ffffffff81a01730 t i965_read_luts +ffffffff81a01ac0 t i9xx_color_check +ffffffff81a01bb0 t i9xx_load_luts +ffffffff81a01cf0 t i9xx_read_luts +ffffffff81a01e20 t icl_color_check +ffffffff81a01f50 t icl_color_commit_noarm +ffffffff81a02020 t icl_color_commit_arm +ffffffff81a02100 t icl_load_luts +ffffffff81a02610 t icl_read_luts +ffffffff81a028c0 t ilk_csc_convert_ctm +ffffffff81a035c0 t ilk_update_pipe_csc +ffffffff81a03810 t icl_update_output_csc +ffffffff81a03a60 t glk_load_degamma_lut +ffffffff81a03c00 t ivb_load_lut_ext_max +ffffffff81a03ce0 t bdw_read_lut_10 +ffffffff81a03e60 t glk_color_check +ffffffff81a03fe0 t skl_color_commit_noarm +ffffffff81a04020 t skl_color_commit_arm +ffffffff81a04130 t glk_load_luts +ffffffff81a04540 t glk_read_luts +ffffffff81a046a0 t ilk_load_csc_matrix +ffffffff81a04810 t ivb_color_check +ffffffff81a04a20 t bdw_load_luts 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intel_ddi_compute_output_type +ffffffff81a13670 t intel_ddi_compute_config +ffffffff81a137b0 t intel_ddi_compute_config_late +ffffffff81a13a60 t intel_enable_ddi +ffffffff81a14240 t intel_ddi_pre_pll_enable +ffffffff81a143b0 t intel_ddi_pre_enable +ffffffff81a15080 t intel_disable_ddi +ffffffff81a15200 t intel_ddi_post_disable +ffffffff81a15720 t intel_ddi_sync_state +ffffffff81a157d0 t intel_ddi_initial_fastset_check +ffffffff81a15890 t intel_ddi_encoder_suspend +ffffffff81a15940 t intel_ddi_encoder_shutdown +ffffffff81a15a00 t intel_ddi_get_power_domains +ffffffff81a15bb0 t dg2_ddi_get_config +ffffffff81a15c00 t adls_ddi_enable_clock +ffffffff81a15d80 t adls_ddi_disable_clock +ffffffff81a15e40 t adls_ddi_is_clock_enabled +ffffffff81a15ee0 t adls_ddi_get_config +ffffffff81a15fa0 t rkl_ddi_enable_clock +ffffffff81a16130 t rkl_ddi_disable_clock +ffffffff81a161d0 t rkl_ddi_is_clock_enabled +ffffffff81a16250 t rkl_ddi_get_config +ffffffff81a16320 t dg1_ddi_enable_clock +ffffffff81a164e0 t dg1_ddi_disable_clock +ffffffff81a165a0 t dg1_ddi_is_clock_enabled +ffffffff81a16640 t dg1_ddi_get_config +ffffffff81a16710 t jsl_ddi_tc_enable_clock +ffffffff81a167b0 t jsl_ddi_tc_disable_clock +ffffffff81a16870 t jsl_ddi_tc_is_clock_enabled +ffffffff81a16920 t icl_ddi_combo_get_config +ffffffff81a169d0 t icl_ddi_combo_enable_clock +ffffffff81a16b30 t icl_ddi_combo_disable_clock +ffffffff81a16bd0 t icl_ddi_combo_is_clock_enabled +ffffffff81a16c50 t icl_ddi_tc_enable_clock +ffffffff81a16e30 t icl_ddi_tc_disable_clock +ffffffff81a16f10 t icl_ddi_tc_is_clock_enabled +ffffffff81a16fd0 t icl_ddi_tc_get_config +ffffffff81a17210 t bxt_ddi_get_config +ffffffff81a17280 t skl_ddi_enable_clock +ffffffff81a17390 t skl_ddi_disable_clock +ffffffff81a17420 t skl_ddi_is_clock_enabled +ffffffff81a17490 t skl_ddi_get_config +ffffffff81a17520 t icl_combo_phy_set_signal_levels +ffffffff81a17ff0 t tgl_dkl_phy_set_signal_levels +ffffffff81a182f0 t icl_mg_phy_set_signal_levels +ffffffff81a18c20 t hsw_set_signal_levels +ffffffff81a18f90 t intel_ddi_update_prepare +ffffffff81a19110 t intel_ddi_update_complete +ffffffff81a19150 t lpt_digital_port_connected +ffffffff81a191c0 t bdw_digital_port_connected +ffffffff81a19230 t hsw_digital_port_connected +ffffffff81a192a0 t intel_ddi_encoder_reset +ffffffff81a19380 t intel_ddi_encoder_destroy +ffffffff81a19430 t icl_program_mg_dp_mode +ffffffff81a196c0 t intel_ddi_init_dp_buf_reg +ffffffff81a19880 t intel_disable_ddi_buf +ffffffff81a19ba0 t intel_ddi_prepare_link_retrain +ffffffff81a1a210 t intel_ddi_set_link_train +ffffffff81a1a370 t intel_ddi_set_idle_link_train +ffffffff81a1a590 t intel_ddi_dp_voltage_max +ffffffff81a1a650 t intel_ddi_dp_preemph_max +ffffffff81a1b000 T is_hobl_buf_trans +ffffffff81a1b040 T intel_ddi_buf_trans_init +ffffffff81a1b300 t dg2_get_snps_buf_trans +ffffffff81a1b370 t adlp_get_combo_buf_trans +ffffffff81a1b4a0 t adlp_get_dkl_buf_trans +ffffffff81a1b500 t adls_get_combo_buf_trans +ffffffff81a1b630 t rkl_get_combo_buf_trans +ffffffff81a1b760 t dg1_get_combo_buf_trans +ffffffff81a1b890 t tgl_get_combo_buf_trans +ffffffff81a1b9e0 t tgl_get_dkl_buf_trans +ffffffff81a1ba40 t jsl_get_combo_buf_trans +ffffffff81a1baf0 t ehl_get_combo_buf_trans +ffffffff81a1bba0 t icl_get_combo_buf_trans +ffffffff81a1bc50 t icl_get_mg_buf_trans +ffffffff81a1bcb0 t bxt_get_buf_trans +ffffffff81a1bd40 t kbl_y_get_buf_trans +ffffffff81a1bdf0 t kbl_u_get_buf_trans +ffffffff81a1bea0 t kbl_get_buf_trans +ffffffff81a1bf50 t skl_y_get_buf_trans +ffffffff81a1c000 t skl_u_get_buf_trans +ffffffff81a1c0b0 t skl_get_buf_trans +ffffffff81a1c160 t bdw_get_buf_trans +ffffffff81a1c200 t hsw_get_buf_trans +ffffffff81a1d000 T intel_update_watermarks +ffffffff81a1d040 T vlv_get_hpll_vco +ffffffff81a1d090 T vlv_get_cck_clock +ffffffff81a1d140 T vlv_get_cck_clock_hpll +ffffffff81a1d240 T is_trans_port_sync_mode +ffffffff81a1d280 T intel_crtc_bigjoiner_slave_pipes +ffffffff81a1d2e0 T intel_crtc_is_bigjoiner_slave +ffffffff81a1d340 T intel_crtc_is_bigjoiner_master +ffffffff81a1d3a0 T intel_master_crtc +ffffffff81a1d440 T assert_transcoder +ffffffff81a1d5f0 T vlv_wait_port_ready +ffffffff81a1d740 T intel_enable_transcoder +ffffffff81a1da30 T intel_disable_transcoder +ffffffff81a1dd30 T intel_rotation_info_size +ffffffff81a1dd80 T intel_remapped_info_size +ffffffff81a1deb0 T intel_plane_uses_fence +ffffffff81a1df00 T intel_fb_xy_to_linear +ffffffff81a1df50 T intel_add_fb_offsets +ffffffff81a1dfa0 T intel_plane_fb_max_stride +ffffffff81a1e020 T intel_set_plane_visible +ffffffff81a1e070 T intel_plane_fixup_bitmasks +ffffffff81a1e120 T intel_plane_disable_noatomic +ffffffff81a1e310 T intel_plane_fence_y_offset +ffffffff81a1e370 T intel_display_prepare_reset +ffffffff81a1e550 T intel_display_finish_reset +ffffffff81a1e750 t __intel_display_resume +ffffffff81a1e860 T intel_modeset_init_hw +ffffffff81a1e900 T intel_has_pending_fb_unpin +ffffffff81a1ea00 T intel_get_crtc_new_encoder +ffffffff81a1eba0 T ilk_pfit_disable +ffffffff81a1ec60 T intel_phy_is_combo +ffffffff81a1ece0 T intel_phy_is_tc +ffffffff81a1ed50 T intel_phy_is_snps +ffffffff81a1ed90 T intel_port_to_phy +ffffffff81a1ee20 T intel_port_to_tc +ffffffff81a1ef20 T intel_aux_power_domain +ffffffff81a1ef60 T intel_modeset_get_crtc_power_domains +ffffffff81a1f180 T intel_modeset_put_crtc_power_domains +ffffffff81a1f1b0 T intel_display_suspend +ffffffff81a1f250 T intel_encoder_destroy +ffffffff81a1f280 T intel_encoder_get_config +ffffffff81a1f2b0 t intel_crtc_readout_derived_state +ffffffff81a1f6e0 T intel_link_compute_m_n +ffffffff81a1f810 T intel_zero_m_n +ffffffff81a1f850 T intel_set_m_n +ffffffff81a1f910 T intel_cpu_transcoder_has_m2_n2 +ffffffff81a1f970 T intel_cpu_transcoder_set_m1_n1 +ffffffff81a1fb30 T intel_cpu_transcoder_set_m2_n2 +ffffffff81a1fc90 T i9xx_set_pipeconf +ffffffff81a1fe40 T ilk_set_pipeconf +ffffffff81a20020 T bdw_get_pipemisc_bpp +ffffffff81a20110 T ilk_get_lanes_required +ffffffff81a20170 T intel_get_m_n +ffffffff81a20280 T intel_cpu_transcoder_get_m1_n1 +ffffffff81a20420 T intel_cpu_transcoder_get_m2_n2 +ffffffff81a20590 T intel_crtc_get_pipe_config +ffffffff81a20600 T intel_get_load_detect_pipe +ffffffff81a20a20 T intel_release_load_detect_pipe +ffffffff81a20af0 T i9xx_crtc_clock_get +ffffffff81a20d80 T intel_dotclock_calculate +ffffffff81a20de0 T intel_crtc_dotclock +ffffffff81a20eb0 T intel_encoder_current_mode +ffffffff81a21060 T intel_fuzzy_clock_check +ffffffff81a210b0 T intel_pipe_config_compare +ffffffff81a23ba0 t pipe_config_mismatch +ffffffff81a23c90 t pipe_config_infoframe_mismatch +ffffffff81a23e30 T intel_modeset_all_pipes +ffffffff81a23fd0 T intel_atomic_add_affected_planes +ffffffff81a240a0 T intel_crtc_update_active_timings +ffffffff81a241a0 T intel_calc_active_pipes +ffffffff81a24230 T intel_crtc_arm_fifo_underrun +ffffffff81a242d0 T intel_plane_destroy +ffffffff81a24300 T intel_get_pipe_from_crtc_id_ioctl +ffffffff81a24370 T intel_mode_valid_max_plane_size +ffffffff81a243f0 T intel_init_display_hooks +ffffffff81a244d0 T intel_modeset_init_noirq +ffffffff81a24790 t intel_atomic_helper_free_state_worker +ffffffff81a24800 T intel_modeset_init_nogem +ffffffff81a25930 T intel_modeset_init +ffffffff81a25b50 T i830_enable_pipe +ffffffff81a26180 T i830_disable_pipe +ffffffff81a264b0 T intel_display_resume +ffffffff81a265f0 T intel_modeset_driver_remove +ffffffff81a266a0 T intel_modeset_driver_remove_noirq +ffffffff81a26810 T intel_modeset_driver_remove_nogem +ffffffff81a26850 T intel_modeset_probe_defer +ffffffff81a26880 T intel_display_driver_register +ffffffff81a268e0 T intel_display_driver_unregister +ffffffff81a26960 T intel_scanout_needs_vtd_wa +ffffffff81a269a0 t wait_for_pipe_scanline_moving +ffffffff81a26c00 t hsw_get_pipe_config +ffffffff81a279e0 t hsw_crtc_enable +ffffffff81a28410 t hsw_crtc_disable +ffffffff81a285c0 t skl_commit_modeset_enables +ffffffff81a28b80 t intel_get_transcoder_timings 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intel_atomic_commit_tail +ffffffff81a314e0 t intel_atomic_cleanup_work +ffffffff81a32000 T intel_display_power_domain_str +ffffffff81a32060 T __intel_display_power_is_enabled +ffffffff81a32130 T intel_display_power_is_enabled +ffffffff81a32240 T intel_display_power_set_target_dc_state +ffffffff81a32360 T intel_display_power_get +ffffffff81a323e0 t __intel_display_power_get_domain +ffffffff81a325c0 T intel_display_power_get_if_enabled +ffffffff81a326f0 T __intel_display_power_put_async +ffffffff81a328c0 t __intel_display_power_put_domain +ffffffff81a32a40 T intel_display_power_flush_work +ffffffff81a32b60 t release_async_put_domains +ffffffff81a32c40 T intel_display_power_put_unchecked +ffffffff81a32ca0 T intel_display_power_get_in_set +ffffffff81a32d80 T intel_display_power_get_in_set_if_enabled +ffffffff81a32e30 T intel_display_power_put_mask_in_set +ffffffff81a32f00 T intel_power_domains_init +ffffffff81a33140 t intel_display_power_put_async_work +ffffffff81a333b0 T intel_power_domains_cleanup +ffffffff81a333d0 T gen9_dbuf_slices_update +ffffffff81a335f0 T intel_power_domains_init_hw +ffffffff81a33d80 t icl_display_core_init +ffffffff81a34670 t bxt_display_core_init +ffffffff81a347a0 T intel_power_domains_driver_remove +ffffffff81a34890 T intel_power_domains_sanitize_state +ffffffff81a34980 T intel_power_domains_enable +ffffffff81a349e0 T intel_power_domains_disable +ffffffff81a34a90 T intel_power_domains_suspend +ffffffff81a34c20 t icl_display_core_uninit +ffffffff81a34cc0 t bxt_display_core_uninit +ffffffff81a34d70 T intel_power_domains_resume +ffffffff81a34e40 T intel_display_power_suspend_late +ffffffff81a34f30 t hsw_enable_pc8 +ffffffff81a358c0 T intel_display_power_resume_early +ffffffff81a359b0 t hsw_disable_pc8 +ffffffff81a35e10 T intel_display_power_suspend +ffffffff81a35e90 T intel_display_power_resume +ffffffff81a35f70 T intel_display_power_debug +ffffffff81a36040 T intel_display_power_ddi_io_domain +ffffffff81a36120 T intel_display_power_ddi_lanes_domain +ffffffff81a36200 T intel_display_power_legacy_aux_domain +ffffffff81a36310 T intel_display_power_tbt_aux_domain +ffffffff81a36420 t __delayed_work_tick +ffffffff81a37000 T intel_display_power_map_init +ffffffff81a37170 t __set_power_wells +ffffffff81a37550 T intel_display_power_map_cleanup +ffffffff81a38000 T lookup_power_well +ffffffff81a380c0 T intel_power_well_enable +ffffffff81a38150 T intel_power_well_name +ffffffff81a38190 T intel_power_well_disable +ffffffff81a38200 T intel_power_well_sync_hw +ffffffff81a38270 T intel_power_well_get +ffffffff81a38310 T intel_power_well_put +ffffffff81a38410 T intel_power_well_is_enabled +ffffffff81a38430 T intel_power_well_is_enabled_cached +ffffffff81a38460 T intel_display_power_well_is_enabled +ffffffff81a38520 T intel_power_well_is_always_on +ffffffff81a38560 T intel_power_well_domains +ffffffff81a38590 T intel_power_well_refcount +ffffffff81a385c0 T gen9_sanitize_dc_state +ffffffff81a386a0 T gen9_set_dc_state +ffffffff81a389f0 T gen9_enable_dc5 +ffffffff81a38c50 T skl_enable_dc6 +ffffffff81a38da0 T bxt_enable_dc9 +ffffffff81a38f50 T bxt_disable_dc9 +ffffffff81a39040 T gen9_disable_dc_states +ffffffff81a39410 T chv_phy_powergate_ch +ffffffff81a39520 t assert_chv_phy_status +ffffffff81a398c0 T chv_phy_powergate_lanes +ffffffff81a39b80 t i9xx_power_well_sync_hw_noop +ffffffff81a39bb0 t i9xx_always_on_power_well_noop +ffffffff81a39be0 t i9xx_always_on_power_well_enabled +ffffffff81a39c10 t chv_pipe_power_well_sync_hw +ffffffff81a39c40 t chv_pipe_power_well_enable +ffffffff81a39c70 t chv_pipe_power_well_disable +ffffffff81a39cd0 t chv_pipe_power_well_enabled +ffffffff81a39dd0 t chv_dpio_cmn_power_well_enable +ffffffff81a39fe0 t chv_dpio_cmn_power_well_disable +ffffffff81a3a110 t vlv_power_well_enabled +ffffffff81a3a220 t i830_pipes_power_well_sync_hw +ffffffff81a3a310 t i830_pipes_power_well_enable +ffffffff81a3a3d0 t i830_pipes_power_well_disable +ffffffff81a3a400 t i830_pipes_power_well_enabled +ffffffff81a3a4a0 t hsw_power_well_sync_hw +ffffffff81a3a590 t hsw_power_well_enable +ffffffff81a3a810 t hsw_power_well_disable +ffffffff81a3a8c0 t hsw_power_well_enabled +ffffffff81a3a9a0 t gen9_dc_off_power_well_enable +ffffffff81a3a9b0 t gen9_dc_off_power_well_disable +ffffffff81a3aa50 t gen9_dc_off_power_well_enabled +ffffffff81a3aae0 t bxt_dpio_cmn_power_well_enable +ffffffff81a3ab10 t bxt_dpio_cmn_power_well_disable +ffffffff81a3ab40 t bxt_dpio_cmn_power_well_enabled +ffffffff81a3ab70 t vlv_display_power_well_enable +ffffffff81a3aba0 t vlv_display_power_well_disable +ffffffff81a3ac10 t vlv_dpio_cmn_power_well_enable +ffffffff81a3ac90 t vlv_dpio_cmn_power_well_disable +ffffffff81a3ad90 t vlv_power_well_enable +ffffffff81a3adb0 t vlv_power_well_disable +ffffffff81a3add0 t icl_aux_power_well_enable +ffffffff81a3b440 t icl_aux_power_well_disable +ffffffff81a3b6e0 t tgl_tc_cold_off_power_well_sync_hw +ffffffff81a3b700 t tgl_tc_cold_off_power_well_enable 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+ffffffff81a3f880 T intel_dmc_ucode_suspend +ffffffff81a3f8f0 T intel_dmc_ucode_resume +ffffffff81a3f990 T intel_dmc_ucode_fini +ffffffff81a3fac0 T intel_dmc_print_error_state +ffffffff81a3fb70 T intel_dmc_debugfs_register +ffffffff81a40000 T intel_dp_is_edp +ffffffff81a40030 T intel_dp_is_uhbr +ffffffff81a40070 T intel_dp_max_lane_count +ffffffff81a400e0 T intel_dp_link_required +ffffffff81a40120 T intel_dp_max_data_rate +ffffffff81a40190 T intel_dp_can_bigjoiner +ffffffff81a401e0 T intel_dp_get_link_train_fallback_values +ffffffff81a405c0 T intel_dp_mode_to_fec_clock +ffffffff81a40610 T intel_dp_min_bpp +ffffffff81a40650 T intel_dp_source_supports_tps3 +ffffffff81a406a0 T intel_dp_source_supports_tps4 +ffffffff81a406d0 T intel_dp_max_link_rate +ffffffff81a40790 T intel_dp_rate_select +ffffffff81a40830 T intel_dp_compute_rate +ffffffff81a40900 T intel_dp_adjust_compliance_config +ffffffff81a40a40 T intel_dp_limited_color_range +ffffffff81a40ab0 T intel_dp_compute_psr_vsc_sdp +ffffffff81a40b30 T intel_dp_needs_vsc_sdp +ffffffff81a40b80 t intel_dp_compute_vsc_colorimetry +ffffffff81a40d00 T intel_dp_compute_config +ffffffff81a41390 t intel_dp_compute_output_format +ffffffff81a415c0 T intel_dp_set_link_params +ffffffff81a41600 T intel_edp_backlight_on +ffffffff81a416b0 T intel_edp_backlight_off +ffffffff81a41760 T intel_dp_sink_set_decompression_state +ffffffff81a41800 T intel_dp_wait_source_oui +ffffffff81a418d0 T intel_dp_set_power +ffffffff81a41ae0 T intel_dp_sync_state +ffffffff81a41b60 t intel_dp_get_dpcd +ffffffff81a41cc0 t intel_dp_reset_max_link_params +ffffffff81a41dd0 T intel_dp_initial_fastset_check +ffffffff81a41ed0 T intel_dp_check_frl_training +ffffffff81a42460 T intel_dp_pcon_dsc_configure +ffffffff81a42630 T intel_dp_configure_protocol_converter +ffffffff81a427a0 T intel_dp_get_colorimetry_status +ffffffff81a42800 T intel_edp_fixup_vbt_bpp +ffffffff81a428a0 T intel_write_dp_vsc_sdp +ffffffff81a42a30 T intel_dp_set_infoframes +ffffffff81a42b60 t intel_write_dp_sdp +ffffffff81a42e50 T intel_read_dp_sdp +ffffffff81a43180 T intel_dp_retrain_link +ffffffff81a43840 T intel_dp_phy_test +ffffffff81a43f20 T intel_digital_port_connected +ffffffff81a43fc0 T intel_dp_encoder_flush_work +ffffffff81a44010 T intel_dp_encoder_suspend +ffffffff81a44050 T intel_dp_encoder_shutdown +ffffffff81a44090 T intel_dp_hpd_pulse +ffffffff81a44800 T intel_dp_is_port_edp +ffffffff81a44850 T intel_dp_init_connector +ffffffff81a459a0 t intel_dp_modeset_retry_work_fn +ffffffff81a45a20 t intel_dp_set_common_rates +ffffffff81a45bc0 T intel_dp_mst_suspend +ffffffff81a45c60 T intel_dp_mst_resume +ffffffff81a45d10 t intel_dp_compute_link_config +ffffffff81a46ab0 t intel_dp_dsc_get_slice_count +ffffffff81a46c20 t intel_dp_set_sink_rates +ffffffff81a46e50 t intel_dp_check_device_service_irq +ffffffff81a47420 t intel_dp_force +ffffffff81a47560 t intel_dp_connector_register +ffffffff81a47640 t intel_dp_connector_unregister +ffffffff81a476a0 t intel_dp_oob_hotplug_event +ffffffff81a47720 t intel_dp_set_edid +ffffffff81a47b50 t intel_dp_get_modes +ffffffff81a47c50 t intel_dp_detect +ffffffff81a48540 t intel_dp_mode_valid +ffffffff81a48ce0 t intel_dp_connector_atomic_check +ffffffff81a49020 t intel_dp_get_dsc_sink_cap +ffffffff81a4a000 T intel_dp_aux_fini +ffffffff81a4a020 T intel_dp_aux_init +ffffffff81a4a200 t xelpdp_aux_ctl_reg +ffffffff81a4a2c0 t xelpdp_aux_data_reg +ffffffff81a4a390 t tgl_aux_ctl_reg +ffffffff81a4a410 t tgl_aux_data_reg +ffffffff81a4a4a0 t skl_aux_ctl_reg +ffffffff81a4a520 t skl_aux_data_reg +ffffffff81a4a5b0 t ilk_aux_ctl_reg +ffffffff81a4a630 t ilk_aux_data_reg +ffffffff81a4a6c0 t g4x_aux_ctl_reg +ffffffff81a4a740 t g4x_aux_data_reg +ffffffff81a4a7d0 t skl_get_aux_clock_divider +ffffffff81a4a800 t hsw_get_aux_clock_divider +ffffffff81a4a8a0 t ilk_get_aux_clock_divider +ffffffff81a4a900 t g4x_get_aux_clock_divider +ffffffff81a4a950 t skl_get_aux_send_ctl +ffffffff81a4a9d0 t g4x_get_aux_send_ctl +ffffffff81a4aa20 t kasprintf +ffffffff81a4aaf0 t intel_dp_aux_transfer +ffffffff81a4ad40 t intel_dp_aux_xfer +ffffffff81a4c000 T intel_dp_aux_init_backlight_funcs +ffffffff81a4c270 t intel_dp_aux_hdr_setup_backlight +ffffffff81a4c3c0 t intel_dp_aux_hdr_get_backlight +ffffffff81a4c530 t intel_dp_aux_hdr_set_backlight +ffffffff81a4c620 t intel_dp_aux_hdr_disable_backlight +ffffffff81a4c6a0 t intel_dp_aux_hdr_enable_backlight +ffffffff81a4c8e0 t intel_dp_aux_vesa_setup_backlight +ffffffff81a4caa0 t intel_dp_aux_vesa_get_backlight +ffffffff81a4cad0 t intel_dp_aux_vesa_set_backlight +ffffffff81a4cb70 t intel_dp_aux_vesa_disable_backlight +ffffffff81a4cc20 t intel_dp_aux_vesa_enable_backlight +ffffffff81a4d000 T intel_dp_hdcp_init +ffffffff81a4d0b0 t intel_dp_hdcp_write_an_aksv +ffffffff81a4d1a0 t intel_dp_hdcp_read_bksv +ffffffff81a4d230 t intel_dp_hdcp_read_bstatus +ffffffff81a4d2c0 t intel_dp_hdcp_repeater_present +ffffffff81a4d370 t intel_dp_hdcp_read_ri_prime +ffffffff81a4d400 t intel_dp_hdcp_read_ksv_ready +ffffffff81a4d4a0 t intel_dp_hdcp_read_ksv_fifo +ffffffff81a4d590 t intel_dp_hdcp_read_v_prime_part +ffffffff81a4d630 t intel_dp_hdcp_toggle_signalling +ffffffff81a4d660 t intel_dp_mst_hdcp_stream_encryption +ffffffff81a4d860 t intel_dp_hdcp_check_link +ffffffff81a4d8f0 t intel_dp_hdcp_capable +ffffffff81a4d9a0 t intel_dp_hdcp2_capable +ffffffff81a4da20 t intel_dp_hdcp2_write_msg +ffffffff81a4dae0 t intel_dp_hdcp2_read_msg +ffffffff81a4e200 t intel_dp_hdcp2_config_stream_type +ffffffff81a4e2b0 t intel_dp_mst_hdcp2_stream_encryption +ffffffff81a4e530 t intel_dp_mst_hdcp2_check_link +ffffffff81a4e5f0 t get_hdcp2_dp_msg_data +ffffffff81a4e730 t intel_dp_hdcp2_check_link +ffffffff81a4f000 T intel_dp_init_lttpr_and_dprx_caps +ffffffff81a4f2c0 T intel_dp_get_adjust_train +ffffffff81a4f980 T intel_dp_program_link_training_pattern +ffffffff81a4fa80 T intel_dp_set_signal_levels +ffffffff81a4fde0 T intel_dp_dump_link_status +ffffffff81a4feb0 T intel_dp_stop_link_train +ffffffff81a500e0 T intel_dp_start_link_train +ffffffff81a51210 t intel_dp_link_train_phy +ffffffff81a53000 T intel_dp_mst_encoder_active_links +ffffffff81a53030 T intel_dp_mst_encoder_init +ffffffff81a53270 T intel_dp_mst_source_support +ffffffff81a532b0 T intel_dp_mst_encoder_cleanup +ffffffff81a53310 T intel_dp_mst_is_master_trans +ffffffff81a53350 T intel_dp_mst_is_slave_trans +ffffffff81a53390 T intel_dp_mst_add_topology_state_for_crtc +ffffffff81a53460 t intel_dp_add_mst_connector +ffffffff81a53670 t intel_dp_mst_poll_hpd_irq +ffffffff81a53690 t intel_dp_mst_get_hw_state +ffffffff81a536f0 t intel_dp_mst_connector_late_register +ffffffff81a53760 t intel_dp_mst_connector_early_unregister +ffffffff81a53790 t intel_dp_mst_get_modes +ffffffff81a53830 t intel_dp_mst_detect +ffffffff81a53930 t intel_dp_mst_mode_valid_ctx +ffffffff81a53a90 t intel_mst_atomic_best_encoder +ffffffff81a53af0 t intel_dp_mst_atomic_check +ffffffff81a53c70 t intel_dp_mst_compute_config +ffffffff81a53f80 t intel_dp_mst_compute_config_late +ffffffff81a54080 t intel_mst_disable_dp +ffffffff81a54170 t intel_mst_post_disable_dp +ffffffff81a54430 t intel_mst_pre_pll_enable_dp +ffffffff81a54480 t intel_mst_pre_enable_dp +ffffffff81a546a0 t intel_mst_enable_dp +ffffffff81a54a90 t intel_dp_mst_enc_get_hw_state +ffffffff81a54ad0 t intel_dp_mst_enc_get_config +ffffffff81a54af0 t intel_dp_mst_initial_fastset_check +ffffffff81a54b10 t intel_dp_mst_encoder_destroy +ffffffff81a55000 T bxt_port_to_phy_channel +ffffffff81a55130 T bxt_ddi_phy_set_signal_levels +ffffffff81a55650 T bxt_ddi_phy_is_enabled +ffffffff81a557a0 T bxt_ddi_phy_uninit +ffffffff81a558a0 T bxt_ddi_phy_init +ffffffff81a55ad0 t _bxt_ddi_phy_init +ffffffff81a560e0 T bxt_ddi_phy_verify_state +ffffffff81a56420 t __phy_reg_verify_state +ffffffff81a56520 T bxt_ddi_phy_calc_lane_lat_optim_mask +ffffffff81a56590 T bxt_ddi_phy_set_lane_optim_mask +ffffffff81a568c0 T bxt_ddi_phy_get_lane_lat_optim_mask +ffffffff81a56b10 T chv_set_phy_signal_level +ffffffff81a56e70 T chv_data_lane_soft_reset +ffffffff81a57050 T chv_phy_pre_pll_enable +ffffffff81a572f0 T chv_phy_pre_encoder_enable +ffffffff81a57580 T chv_phy_release_cl2_override +ffffffff81a57610 T chv_phy_post_pll_disable +ffffffff81a576c0 T vlv_set_phy_signal_level +ffffffff81a57840 T vlv_phy_pre_pll_enable +ffffffff81a57960 T vlv_phy_pre_encoder_enable +ffffffff81a57a80 T vlv_phy_reset_lanes +ffffffff81a58000 T pnv_calc_dpll_params +ffffffff81a580c0 T i9xx_calc_dpll_params +ffffffff81a58190 T vlv_calc_dpll_params +ffffffff81a58250 T chv_calc_dpll_params +ffffffff81a58320 T bxt_find_best_dpll +ffffffff81a58340 t chv_find_best_dpll +ffffffff81a58680 T i9xx_dpll_compute_fp +ffffffff81a586c0 T vlv_compute_dpll +ffffffff81a58740 T chv_compute_dpll +ffffffff81a587c0 T intel_dpll_crtc_compute_clock +ffffffff81a588c0 T intel_dpll_crtc_get_shared_dpll +ffffffff81a58a10 T intel_dpll_init_clock_hook +ffffffff81a58b00 T i9xx_enable_pll +ffffffff81a58eb0 T vlv_enable_pll +ffffffff81a59410 T chv_enable_pll +ffffffff81a59a90 T vlv_force_pll_on +ffffffff81a59be0 T vlv_disable_pll +ffffffff81a59ca0 T chv_disable_pll +ffffffff81a59dd0 T i9xx_disable_pll +ffffffff81a59ed0 T vlv_force_pll_off +ffffffff81a59fc0 T assert_pll_enabled +ffffffff81a5a0a0 T assert_pll_disabled +ffffffff81a5a180 t intel_pll_is_valid +ffffffff81a5a250 t dg2_crtc_compute_clock +ffffffff81a5a2d0 t hsw_crtc_compute_clock +ffffffff81a5a390 t hsw_crtc_get_shared_dpll +ffffffff81a5a430 t ilk_crtc_compute_clock +ffffffff81a5a730 t ilk_crtc_get_shared_dpll +ffffffff81a5a780 t g4x_find_best_dpll +ffffffff81a5aac0 t chv_crtc_compute_clock +ffffffff81a5abd0 t vlv_crtc_compute_clock +ffffffff81a5b090 t g4x_crtc_compute_clock +ffffffff81a5b1e0 t i9xx_compute_dpll +ffffffff81a5b460 t pnv_crtc_compute_clock +ffffffff81a5b820 t i9xx_crtc_compute_clock +ffffffff81a5b940 t i9xx_find_best_dpll +ffffffff81a5bc70 t i8xx_crtc_compute_clock +ffffffff81a5c000 T intel_get_shared_dpll_by_id +ffffffff81a5c040 T intel_get_shared_dpll_id +ffffffff81a5c0d0 T assert_shared_dpll +ffffffff81a5c1f0 T intel_dpll_get_hw_state +ffffffff81a5c220 T icl_tc_port_to_pll_id +ffffffff81a5c250 T intel_enable_shared_dpll +ffffffff81a5c540 T intel_disable_shared_dpll +ffffffff81a5c780 T intel_shared_dpll_swap_state +ffffffff81a5c860 T icl_set_active_port_dpll +ffffffff81a5c8a0 T intel_shared_dpll_init +ffffffff81a5cab0 T intel_compute_shared_dplls +ffffffff81a5cb40 T intel_reserve_shared_dplls +ffffffff81a5cbd0 T intel_release_shared_dplls +ffffffff81a5cc10 T intel_update_active_dpll +ffffffff81a5cc70 T intel_dpll_get_freq +ffffffff81a5cd00 T intel_dpll_update_ref_clks +ffffffff81a5cd50 T intel_dpll_readout_hw_state +ffffffff81a5ced0 T intel_dpll_sanitize_state +ffffffff81a5cfb0 T intel_dpll_dump_hw_state +ffffffff81a5d030 T intel_shared_dpll_state_verify +ffffffff81a5d150 t verify_single_dpll_state +ffffffff81a5d470 T intel_shared_dpll_verify_disabled +ffffffff81a5d4f0 t icl_compute_dplls +ffffffff81a5e2d0 t icl_get_dplls +ffffffff81a5ea50 t icl_put_dplls +ffffffff81a5eb10 t icl_update_active_dpll +ffffffff81a5ebc0 t icl_update_dpll_ref_clks +ffffffff81a5ec00 t icl_dump_hw_state +ffffffff81a5ecc0 t combo_pll_enable +ffffffff81a5eee0 t combo_pll_disable +ffffffff81a5efd0 t combo_pll_get_hw_state +ffffffff81a5f060 t icl_ddi_combo_pll_get_freq +ffffffff81a5f230 t icl_dpll_write +ffffffff81a5f4d0 t adlp_cmtg_clock_gating_wa +ffffffff81a5f630 t icl_pll_disable +ffffffff81a5f7d0 t icl_pll_get_hw_state +ffffffff81a5fb10 t tbt_pll_enable +ffffffff81a5fcc0 t tbt_pll_disable +ffffffff81a5fce0 t tbt_pll_get_hw_state +ffffffff81a5fd00 t icl_ddi_tbt_pll_get_freq +ffffffff81a5fd70 t mg_pll_enable +ffffffff81a60320 t mg_pll_disable +ffffffff81a60360 t dkl_pll_get_hw_state +ffffffff81a60530 t icl_ddi_mg_pll_get_freq +ffffffff81a60610 t intel_find_shared_dpll +ffffffff81a60940 t intel_unreference_shared_dpll +ffffffff81a60aa0 t mg_pll_get_hw_state +ffffffff81a60cf0 t bxt_compute_dpll +ffffffff81a61010 t bxt_get_dpll +ffffffff81a61270 t intel_put_dpll +ffffffff81a612d0 t bxt_update_dpll_ref_clks +ffffffff81a61310 t bxt_dump_hw_state +ffffffff81a613c0 t bxt_ddi_pll_enable +ffffffff81a61ec0 t bxt_ddi_pll_disable +ffffffff81a620d0 t bxt_ddi_pll_get_hw_state +ffffffff81a62560 t bxt_ddi_pll_get_freq +ffffffff81a625f0 t bxt_ddi_set_dpll_hw_state +ffffffff81a627b0 t skl_compute_dpll +ffffffff81a62f30 t skl_get_dpll +ffffffff81a63160 t skl_update_dpll_ref_clks +ffffffff81a631a0 t skl_dump_hw_state +ffffffff81a63200 t skl_ddi_dpll0_enable +ffffffff81a632c0 t skl_ddi_dpll0_disable +ffffffff81a632f0 t skl_ddi_dpll0_get_hw_state +ffffffff81a633f0 t skl_ddi_pll_get_freq +ffffffff81a63480 t skl_ddi_wrpll_get_freq +ffffffff81a635e0 t skl_ddi_pll_enable +ffffffff81a637f0 t skl_ddi_pll_disable +ffffffff81a63880 t skl_ddi_pll_get_hw_state +ffffffff81a639a0 t hsw_compute_dpll +ffffffff81a641f0 t hsw_get_dpll +ffffffff81a644b0 t hsw_update_dpll_ref_clks +ffffffff81a64520 t hsw_dump_hw_state +ffffffff81a64550 t hsw_ddi_wrpll_enable +ffffffff81a645d0 t hsw_ddi_wrpll_disable +ffffffff81a646b0 t hsw_ddi_wrpll_get_hw_state +ffffffff81a64750 t hsw_ddi_wrpll_get_freq +ffffffff81a64840 t hsw_ddi_spll_enable +ffffffff81a648a0 t hsw_ddi_spll_disable +ffffffff81a64970 t hsw_ddi_spll_get_hw_state +ffffffff81a64a00 t hsw_ddi_spll_get_freq +ffffffff81a64aa0 t hsw_ddi_lcpll_enable +ffffffff81a64ad0 t hsw_ddi_lcpll_disable +ffffffff81a64b00 t hsw_ddi_lcpll_get_hw_state +ffffffff81a64b30 t hsw_ddi_lcpll_get_freq +ffffffff81a64bb0 t ibx_compute_dpll +ffffffff81a64be0 t ibx_get_dpll +ffffffff81a64e60 t ibx_dump_hw_state +ffffffff81a64ec0 t ibx_pch_dpll_enable +ffffffff81a65070 t ibx_pch_dpll_disable +ffffffff81a650f0 t ibx_pch_dpll_get_hw_state +ffffffff81a66000 T intel_dpt_pin +ffffffff81a661e0 T intel_dpt_unpin +ffffffff81a66250 T intel_dpt_resume +ffffffff81a66330 T intel_dpt_suspend +ffffffff81a66400 T intel_dpt_create +ffffffff81a66730 t dpt_insert_page +ffffffff81a667a0 t dpt_clear_range +ffffffff81a667d0 t dpt_insert_entries +ffffffff81a668d0 t dpt_cleanup +ffffffff81a66920 t dpt_bind_vma +ffffffff81a669b0 t dpt_unbind_vma +ffffffff81a669e0 T intel_dpt_destroy +ffffffff81a66a30 t __ww_mutex_lock +ffffffff81a67000 T intel_drrs_type_str +ffffffff81a67040 T intel_drrs_is_active +ffffffff81a67070 T intel_drrs_activate +ffffffff81a67270 T intel_drrs_deactivate +ffffffff81a67350 t intel_drrs_set_state +ffffffff81a674a0 T intel_drrs_invalidate +ffffffff81a674c0 t intel_drrs_frontbuffer_update +ffffffff81a67620 T intel_drrs_flush +ffffffff81a67640 T intel_crtc_drrs_init +ffffffff81a676e0 t intel_drrs_downclock_work +ffffffff81a67740 t __delayed_work_tick +ffffffff81a68000 T intel_dsb_indexed_reg_write +ffffffff81a68140 T intel_dsb_reg_write +ffffffff81a68230 T intel_dsb_commit +ffffffff81a68680 T intel_dsb_prepare +ffffffff81a68810 T intel_dsb_cleanup +ffffffff81a69000 T intel_dsi_bitrate +ffffffff81a690a0 T intel_dsi_tlpx_ns +ffffffff81a690f0 T intel_dsi_get_modes +ffffffff81a69100 T intel_dsi_mode_valid +ffffffff81a691c0 T intel_dsi_host_init +ffffffff81a69270 T intel_dsi_get_panel_orientation +ffffffff81a6a000 T intel_dsi_dcs_init_backlight_funcs +ffffffff81a6a0a0 t dcs_setup_backlight +ffffffff81a6a100 t dcs_get_backlight +ffffffff81a6a200 t dcs_set_backlight +ffffffff81a6a2f0 t dcs_disable_backlight +ffffffff81a6a670 t dcs_enable_backlight +ffffffff81a6b000 T intel_dsi_vbt_exec_sequence +ffffffff81a6b020 T intel_dsi_log_params +ffffffff81a6b3a0 T intel_dsi_vbt_init +ffffffff81a6b830 T intel_dsi_vbt_gpio_init +ffffffff81a6b850 T intel_dsi_vbt_gpio_cleanup +ffffffff81a6c000 T intel_dvo_init +ffffffff81a6c4f0 t intel_disable_dvo +ffffffff81a6c5a0 t intel_enable_dvo +ffffffff81a6c690 t intel_dvo_get_hw_state +ffffffff81a6c700 t intel_dvo_get_config +ffffffff81a6c7b0 t intel_dvo_compute_config +ffffffff81a6c840 t intel_dvo_pre_enable +ffffffff81a6c930 t intel_dvo_connector_get_hw_state +ffffffff81a6c9b0 t intel_dvo_enc_destroy +ffffffff81a6c9f0 t intel_dvo_detect +ffffffff81a6caf0 t intel_dvo_get_modes +ffffffff81a6cb60 t intel_dvo_mode_valid +ffffffff81a6d000 T intel_fb_get_format_info +ffffffff81a6d240 T intel_fb_is_ccs_modifier +ffffffff81a6d410 T intel_fb_is_rc_ccs_cc_modifier +ffffffff81a6d5e0 T intel_fb_is_mc_ccs_modifier +ffffffff81a6d7b0 T intel_fb_plane_get_modifiers +ffffffff81a6d8f0 T intel_fb_plane_supports_modifier +ffffffff81a6d960 T intel_format_info_is_yuv_semiplanar +ffffffff81a6dc00 T intel_fb_is_ccs_aux_plane +ffffffff81a6de40 T intel_fb_rc_ccs_cc_plane +ffffffff81a6e0a0 T is_surface_linear +ffffffff81a6e3d0 T main_to_ccs_plane +ffffffff81a6e6b0 T skl_ccs_to_main_plane +ffffffff81a6e9a0 T skl_main_to_aux_plane +ffffffff81a6ec00 T intel_tile_size +ffffffff81a6ec40 T intel_tile_width_bytes +ffffffff81a6ee90 T intel_tile_height +ffffffff81a6eef0 T intel_tile_row_size +ffffffff81a6ef70 T intel_fb_align_height +ffffffff81a6eff0 T intel_fb_uses_dpt +ffffffff81a6f040 T intel_cursor_alignment +ffffffff81a6f0a0 T intel_surf_alignment +ffffffff81a6f2c0 T intel_fb_plane_get_subsampling +ffffffff81a6f690 T intel_plane_adjust_aligned_offset +ffffffff81a6f700 t intel_adjust_aligned_offset +ffffffff81a6f8b0 T intel_plane_compute_aligned_offset +ffffffff81a6f9b0 t intel_compute_aligned_offset +ffffffff81a6fb70 T intel_fb_needs_pot_stride_remap +ffffffff81a6fbc0 T intel_fb_supports_90_270_rotation +ffffffff81a6fc10 T intel_fill_fb_info +ffffffff81a70850 t calc_plane_remap_info +ffffffff81a712b0 T intel_fb_fill_view +ffffffff81a71300 T intel_plane_compute_gtt +ffffffff81a71bd0 t intel_plane_check_stride +ffffffff81a71f40 T intel_framebuffer_init +ffffffff81a73330 T intel_user_framebuffer_create +ffffffff81a73470 T intel_framebuffer_create +ffffffff81a73500 t intel_adjust_tile_offset +ffffffff81a73640 t intel_user_framebuffer_destroy +ffffffff81a736a0 t intel_user_framebuffer_create_handle +ffffffff81a736c0 t intel_user_framebuffer_dirty +ffffffff81a74000 T intel_pin_and_fence_fb_obj +ffffffff81a74320 t i915_gem_object_lock +ffffffff81a74530 T intel_unpin_fb_vma +ffffffff81a745a0 T intel_plane_pin_fb +ffffffff81a748d0 T intel_plane_unpin_fb +ffffffff81a75000 T intel_fbc_cleanup +ffffffff81a751c0 T intel_fbc_pre_update +ffffffff81a75810 T intel_fbc_post_update +ffffffff81a75a60 T intel_fbc_invalidate +ffffffff81a75c80 T intel_fbc_flush +ffffffff81a75f10 T intel_fbc_atomic_check +ffffffff81a76480 T intel_fbc_disable +ffffffff81a76540 t __intel_fbc_disable +ffffffff81a766d0 T intel_fbc_update +ffffffff81a76d90 T intel_fbc_reset_underrun +ffffffff81a76ef0 T intel_fbc_handle_fifo_underrun_irq +ffffffff81a76fa0 T intel_fbc_add_plane +ffffffff81a76fd0 T intel_fbc_init +ffffffff81a77260 T intel_fbc_sanitize +ffffffff81a77330 T intel_fbc_crtc_debugfs_add +ffffffff81a77360 T intel_fbc_debugfs_register +ffffffff81a77390 t intel_fbc_is_ok +ffffffff81a774b0 t intel_fbc_update_state +ffffffff81a77820 t intel_fbc_underrun_work_fn +ffffffff81a77940 t ivb_fbc_activate +ffffffff81a77ba0 t ilk_fbc_deactivate +ffffffff81a77c50 t ilk_fbc_is_active +ffffffff81a77cb0 t ivb_fbc_is_compressing +ffffffff81a77d20 t snb_fbc_nuke +ffffffff81a77da0 t ilk_fbc_program_cfb +ffffffff81a77de0 t ivb_fbc_set_false_color +ffffffff81a77ea0 t snb_fbc_activate +ffffffff81a77f30 t ilk_fbc_is_compressing +ffffffff81a77fa0 t ilk_fbc_activate +ffffffff81a780d0 t i965_fbc_nuke +ffffffff81a78170 t g4x_fbc_activate +ffffffff81a78280 t g4x_fbc_deactivate +ffffffff81a78310 t g4x_fbc_is_active +ffffffff81a78370 t g4x_fbc_is_compressing +ffffffff81a783d0 t g4x_fbc_program_cfb +ffffffff81a78400 t i8xx_fbc_activate +ffffffff81a78570 t i8xx_fbc_deactivate +ffffffff81a78640 t i8xx_fbc_is_active +ffffffff81a786a0 t i8xx_fbc_is_compressing +ffffffff81a78700 t i8xx_fbc_program_cfb +ffffffff81a78780 t i8xx_fbc_nuke +ffffffff81a79000 T intel_fbdev_init +ffffffff81a794d0 t intel_fbdev_suspend_worker +ffffffff81a79500 T intel_fbdev_initial_config_async +ffffffff81a79570 T intel_fbdev_unregister +ffffffff81a795b0 T intel_fbdev_set_suspend +ffffffff81a795e0 T intel_fbdev_fini +ffffffff81a79670 T intel_fbdev_output_poll_changed +ffffffff81a79710 T intel_fbdev_restore_mode +ffffffff81a79790 T intel_fbdev_framebuffer +ffffffff81a797d0 t intelfb_create +ffffffff81a79dd0 t intel_fbdev_set_par +ffffffff81a7a000 T assert_fdi_tx_enabled +ffffffff81a7a0e0 T assert_fdi_tx_disabled +ffffffff81a7a1c0 T assert_fdi_rx_enabled +ffffffff81a7a280 T assert_fdi_rx_disabled +ffffffff81a7a340 T assert_fdi_tx_pll_enabled +ffffffff81a7a3f0 T assert_fdi_rx_pll_enabled +ffffffff81a7a4b0 T assert_fdi_rx_pll_disabled +ffffffff81a7a570 T intel_fdi_link_train +ffffffff81a7a590 T intel_fdi_pll_freq_update +ffffffff81a7a640 T intel_fdi_link_freq +ffffffff81a7a690 T ilk_fdi_compute_config +ffffffff81a7a9d0 T intel_fdi_normal_train +ffffffff81a7ab60 T hsw_fdi_link_train +ffffffff81a7b060 T hsw_fdi_disable +ffffffff81a7b1c0 T ilk_fdi_pll_enable +ffffffff81a7b3d0 T ilk_fdi_pll_disable +ffffffff81a7b500 T ilk_fdi_disable +ffffffff81a7b770 T intel_fdi_init_hook +ffffffff81a7b7d0 t ilk_fdi_link_train +ffffffff81a7be40 t gen6_fdi_link_train +ffffffff81a7c670 t ivb_manual_fdi_link_train +ffffffff81a7cf10 t cpt_set_fdi_bc_bifurcation +ffffffff81a7e000 T intel_set_cpu_fifo_underrun_reporting +ffffffff81a7e3e0 T intel_set_pch_fifo_underrun_reporting +ffffffff81a7e610 T intel_cpu_fifo_underrun_irq_handler +ffffffff81a7e800 T intel_pch_fifo_underrun_irq_handler +ffffffff81a7e880 T intel_check_cpu_fifo_underruns +ffffffff81a7eaa0 T intel_check_pch_fifo_underruns +ffffffff81a7f000 T intel_frontbuffer_flip_prepare +ffffffff81a7f050 T intel_frontbuffer_flip_complete +ffffffff81a7f130 T intel_frontbuffer_flip +ffffffff81a7f200 T __intel_fb_invalidate +ffffffff81a7f290 T __intel_fb_flush +ffffffff81a7f380 T intel_frontbuffer_get +ffffffff81a7f4c0 t frontbuffer_active +ffffffff81a7f4f0 t frontbuffer_retire +ffffffff81a7f530 T intel_frontbuffer_put +ffffffff81a7f6c0 T intel_frontbuffer_track +ffffffff81a80000 T intel_atomic_global_obj_init +ffffffff81a80070 T intel_atomic_global_obj_cleanup +ffffffff81a80170 T intel_atomic_get_global_obj_state +ffffffff81a803e0 T intel_atomic_get_old_global_obj_state +ffffffff81a80440 T intel_atomic_get_new_global_obj_state +ffffffff81a804a0 T intel_atomic_swap_global_state +ffffffff81a805f0 T intel_atomic_clear_global_state +ffffffff81a80720 T intel_atomic_lock_global_state +ffffffff81a807a0 T intel_atomic_serialize_global_state +ffffffff81a81000 T intel_gmbus_is_valid_pin +ffffffff81a81110 T intel_gmbus_reset +ffffffff81a81170 T intel_bb_set_bits +ffffffff81a812a0 T intel_bb_set_dir +ffffffff81a812d0 T intel_bb_read_bits +ffffffff81a81450 T intel_acquire_bus +ffffffff81a81650 T intel_release_bus +ffffffff81a817f0 T intel_send_start +ffffffff81a81810 T intel_send_stop +ffffffff81a81830 T intel_initiate_xfer +ffffffff81a81850 T intel_read_byte +ffffffff81a81870 T intel_write_byte +ffffffff81a81890 T intel_gmbus_output_aksv +ffffffff81a81960 t do_gmbus_xfer +ffffffff81a81f60 T intel_gmbus_setup +ffffffff81a822f0 T intel_gmbus_teardown +ffffffff81a82370 T intel_gmbus_get_adapter +ffffffff81a823f0 T intel_gmbus_force_bit +ffffffff81a82490 T intel_gmbus_is_forced_bit +ffffffff81a824c0 t gmbus_xfer_read +ffffffff81a82790 t gmbus_xfer_write +ffffffff81a829e0 t gmbus_wait +ffffffff81a82dc0 t gmbus_wait_idle +ffffffff81a82f50 t gmbus_xfer +ffffffff81a83030 t gmbus_func +ffffffff81a83070 t gmbus_lock_bus +ffffffff81a83090 t gmbus_trylock_bus +ffffffff81a830f0 t gmbus_unlock_bus +ffffffff81a84000 T intel_hdcp_capable +ffffffff81a840a0 t intel_hdcp_read_valid_bksv +ffffffff81a84320 T intel_hdcp2_capable +ffffffff81a84400 T is_hdcp_supported +ffffffff81a84450 T intel_hdcp_component_init +ffffffff81a84480 T intel_hdcp_init +ffffffff81a845c0 t intel_hdcp_check_work +ffffffff81a88480 t intel_hdcp_prop_work +ffffffff81a88500 T intel_hdcp_enable +ffffffff81a88550 T intel_hdcp_disable +ffffffff81a88680 t intel_hdcp_update_value +ffffffff81a88840 t _intel_hdcp2_disable +ffffffff81a88c30 t _intel_hdcp_disable +ffffffff81a88f20 T intel_hdcp_update_pipe +ffffffff81a89090 T intel_hdcp_component_fini +ffffffff81a890d0 T intel_hdcp_cleanup +ffffffff81a89210 T intel_hdcp_atomic_check +ffffffff81a892a0 T intel_hdcp_handle_cp_irq +ffffffff81a893a0 t __delayed_work_tick +ffffffff81a893c0 t hdcp2_authenticate_repeater_topology +ffffffff81a896a0 t intel_hdcp_get_repeater_ctl +ffffffff81a8a000 T hsw_write_infoframe +ffffffff81a8a410 t hsw_dip_data_reg +ffffffff81a8a5d0 T hsw_read_infoframe +ffffffff81a8a690 T intel_hdmi_infoframe_enable +ffffffff81a8a730 T intel_hdmi_infoframes_enabled +ffffffff81a8a850 T intel_read_infoframe +ffffffff81a8a9e0 T intel_hdmi_read_gcp_infoframe +ffffffff81a8aad0 T intel_dp_dual_mode_set_tmds_output +ffffffff81a8aba0 T intel_hdmi_tmds_clock +ffffffff81a8abf0 T intel_hdmi_bpc_possible +ffffffff81a8ad20 T intel_hdmi_limited_color_range +ffffffff81a8ad90 T intel_hdmi_compute_config +ffffffff81a8b4e0 t intel_hdmi_compute_output_format +ffffffff81a8b610 T intel_hdmi_encoder_shutdown +ffffffff81a8b6e0 T intel_hdmi_handle_sink_scrambling +ffffffff81a8b800 T intel_infoframe_init +ffffffff81a8b980 t vlv_write_infoframe +ffffffff81a8bce0 t vlv_read_infoframe +ffffffff81a8beb0 t vlv_set_infoframes +ffffffff81a8c250 t vlv_infoframes_enabled +ffffffff81a8c2f0 t g4x_write_infoframe +ffffffff81a8c5b0 t g4x_read_infoframe +ffffffff81a8c700 t g4x_set_infoframes +ffffffff81a8c9a0 t g4x_infoframes_enabled +ffffffff81a8ca20 t hsw_set_infoframes +ffffffff81a8ccc0 t hsw_infoframes_enabled +ffffffff81a8cd50 t ibx_write_infoframe +ffffffff81a8d070 t ibx_read_infoframe +ffffffff81a8d1f0 t ibx_set_infoframes +ffffffff81a8d560 t ibx_infoframes_enabled +ffffffff81a8d5f0 t cpt_write_infoframe +ffffffff81a8d8f0 t cpt_read_infoframe +ffffffff81a8da70 t cpt_set_infoframes +ffffffff81a8dd80 t cpt_infoframes_enabled +ffffffff81a8ddf0 T intel_hdmi_init_connector +ffffffff81a8e480 T intel_hdmi_dsc_get_slice_height +ffffffff81a8e4e0 T intel_hdmi_dsc_get_num_slices +ffffffff81a8e660 T intel_hdmi_dsc_get_bpp +ffffffff81a8e750 t intel_hdmi_compute_clock +ffffffff81a8ea10 t hdmi_port_clock_valid +ffffffff81a8ec40 t intel_write_infoframe +ffffffff81a8ee10 t intel_hdmi_detect +ffffffff81a8efd0 t intel_hdmi_force +ffffffff81a8f0b0 t intel_hdmi_connector_register +ffffffff81a8f0c0 t intel_hdmi_connector_unregister +ffffffff81a8f0d0 t intel_hdmi_set_edid +ffffffff81a8f370 t intel_hdmi_get_modes +ffffffff81a8f3b0 t intel_hdmi_mode_valid +ffffffff81a8f550 t intel_hdmi_mode_clock_valid +ffffffff81a8f6e0 t intel_hdmi_hdcp_write_an_aksv +ffffffff81a8f830 t intel_hdmi_hdcp_read_bksv +ffffffff81a8f900 t intel_hdmi_hdcp_read_bstatus +ffffffff81a8f9d0 t intel_hdmi_hdcp_repeater_present +ffffffff81a8fab0 t intel_hdmi_hdcp_read_ri_prime +ffffffff81a8fb80 t intel_hdmi_hdcp_read_ksv_ready +ffffffff81a8fc60 t intel_hdmi_hdcp_read_ksv_fifo +ffffffff81a8fd30 t intel_hdmi_hdcp_read_v_prime_part +ffffffff81a8fe20 t intel_hdmi_hdcp_toggle_signalling +ffffffff81a900a0 t intel_hdmi_hdcp_check_link +ffffffff81a903f0 t intel_hdmi_hdcp2_capable +ffffffff81a904b0 t intel_hdmi_hdcp2_write_msg +ffffffff81a905a0 t intel_hdmi_hdcp2_read_msg +ffffffff81a90a40 t intel_hdmi_hdcp2_check_link +ffffffff81a91000 T intel_hpd_pin_default +ffffffff81a91030 T intel_encoder_hotplug +ffffffff81a91160 T intel_hpd_trigger_irq +ffffffff81a911d0 T intel_hpd_irq_handler +ffffffff81a915b0 T intel_hpd_init +ffffffff81a916c0 T intel_hpd_poll_enable +ffffffff81a91740 T intel_hpd_poll_disable +ffffffff81a917a0 T intel_hpd_init_work +ffffffff81a91870 t i915_hotplug_work_func +ffffffff81a91bc0 t i915_digport_work_func +ffffffff81a91d50 t i915_hpd_poll_init_work +ffffffff81a91e60 t intel_hpd_irq_storm_reenable_work +ffffffff81a921b0 T intel_hpd_cancel_work +ffffffff81a922d0 T intel_hpd_disable +ffffffff81a92360 T intel_hpd_enable +ffffffff81a923d0 t __delayed_work_tick +ffffffff81a93000 T intel_lpe_audio_irq_handler +ffffffff81a93020 T intel_lpe_audio_init +ffffffff81a93050 T intel_lpe_audio_teardown +ffffffff81a93070 T intel_lpe_audio_notify +ffffffff81a94000 T lspcon_detect_hdr_capability +ffffffff81a940b0 T lspcon_write_infoframe +ffffffff81a94820 T lspcon_read_infoframe +ffffffff81a94860 T lspcon_set_infoframes +ffffffff81a94ac0 T lspcon_infoframes_enabled +ffffffff81a94cb0 T lspcon_wait_pcon_mode +ffffffff81a94cd0 t lspcon_wait_mode +ffffffff81a94f90 T lspcon_init +ffffffff81a95390 T intel_lspcon_infoframes_enabled +ffffffff81a953d0 T lspcon_resume +ffffffff81a95680 t lspcon_change_mode +ffffffff81a96000 T intel_lvds_port_enabled +ffffffff81a96080 T intel_get_lvds_encoder +ffffffff81a960e0 T intel_is_dual_link_lvds +ffffffff81a96150 T intel_lvds_init +ffffffff81a968c0 t intel_enable_lvds +ffffffff81a96a00 t intel_pre_enable_lvds +ffffffff81a96cd0 t intel_lvds_compute_config +ffffffff81a96e30 t pch_disable_lvds +ffffffff81a96e50 t pch_post_disable_lvds +ffffffff81a96e70 t gmch_disable_lvds +ffffffff81a96ea0 t intel_lvds_get_hw_state +ffffffff81a96f60 t intel_lvds_get_config +ffffffff81a97060 t intel_lvds_shutdown +ffffffff81a97100 t intel_no_lvds_dmi_callback +ffffffff81a97150 t intel_disable_lvds +ffffffff81a97280 t intel_lvds_get_modes +ffffffff81a972b0 t intel_lvds_mode_valid +ffffffff81a97330 t intel_dual_link_lvds_callback +ffffffff81a98000 T intel_modeset_setup_hw_state +ffffffff81a9a000 T intel_modeset_verify_crtc +ffffffff81a9a3b0 t verify_connector_state +ffffffff81a9a660 T intel_modeset_verify_disabled +ffffffff81a9b000 T intel_opregion_notify_encoder +ffffffff81a9b170 t swsci +ffffffff81a9b4a0 T intel_opregion_notify_adapter +ffffffff81a9b500 T intel_opregion_asle_intr +ffffffff81a9b550 T intel_opregion_setup +ffffffff81a9bd60 t asle_work +ffffffff81a9c1e0 T intel_opregion_get_panel_type +ffffffff81a9c2d0 T intel_opregion_get_edid +ffffffff81a9c3b0 T intel_opregion_headless_sku +ffffffff81a9c400 T intel_opregion_register +ffffffff81a9c490 T intel_opregion_resume +ffffffff81a9c520 T intel_opregion_suspend +ffffffff81a9c5c0 T intel_opregion_unregister +ffffffff81a9c740 t intel_no_opregion_vbt_callback +ffffffff81a9c7a0 t intel_use_opregion_panel_type_callback +ffffffff81a9d000 T intel_overlay_reset +ffffffff81a9d050 T intel_overlay_switch_off +ffffffff81a9d250 t intel_overlay_release_old_vid +ffffffff81a9d3f0 T intel_overlay_put_image_ioctl +ffffffff81a9e5c0 T intel_overlay_attrs_ioctl +ffffffff81a9ea70 T intel_overlay_setup +ffffffff81a9ecd0 t intel_overlay_last_flip_retire +ffffffff81a9ed10 T intel_overlay_cleanup +ffffffff81a9edd0 T intel_overlay_capture_error_state +ffffffff81a9eec0 T intel_overlay_print_error_state +ffffffff81a9f290 t intel_overlay_release_old_vid_tail +ffffffff81a9f360 t intel_overlay_off_tail +ffffffff81a9f510 t intel_overlay_flip_prepare +ffffffff81aa0000 T intel_panel_use_ssc +ffffffff81aa0060 T intel_panel_preferred_fixed_mode +ffffffff81aa00b0 T intel_panel_fixed_mode +ffffffff81aa0170 T intel_panel_downclock_mode +ffffffff81aa0260 T intel_panel_highest_mode +ffffffff81aa02c0 T intel_panel_get_modes +ffffffff81aa0350 T intel_panel_drrs_type +ffffffff81aa03a0 T intel_panel_compute_config +ffffffff81aa0520 T intel_panel_add_edid_fixed_modes +ffffffff81aa0a50 T intel_panel_add_vbt_lfp_fixed_mode +ffffffff81aa0ab0 t intel_panel_add_fixed_mode +ffffffff81aa0c30 T intel_panel_add_vbt_sdvo_fixed_mode +ffffffff81aa0ca0 T intel_panel_add_encoder_fixed_mode +ffffffff81aa0ce0 T intel_panel_fitting +ffffffff81aa1330 T intel_panel_detect +ffffffff81aa13c0 T intel_panel_mode_valid +ffffffff81aa14d0 T intel_panel_init_alloc +ffffffff81aa1520 T intel_panel_init +ffffffff81aa15e0 T intel_panel_fini +ffffffff81aa2000 T intel_has_pch_trancoder +ffffffff81aa2060 T intel_crtc_pch_transcoder +ffffffff81aa20a0 T intel_pch_transcoder_get_m1_n1 +ffffffff81aa20f0 T intel_pch_transcoder_get_m2_n2 +ffffffff81aa2140 T ilk_pch_pre_enable +ffffffff81aa2170 T ilk_pch_enable +ffffffff81aa2710 t ilk_pch_transcoder_set_timings +ffffffff81aa2990 T ilk_pch_disable +ffffffff81aa29b0 T ilk_pch_post_disable +ffffffff81aa2ce0 T ilk_pch_get_config +ffffffff81aa2ea0 T lpt_pch_enable +ffffffff81aa30d0 T lpt_pch_disable +ffffffff81aa31e0 T lpt_pch_get_config +ffffffff81aa32b0 T intel_pch_sanitize +ffffffff81aa3590 t assert_pch_dp_disabled +ffffffff81aa3680 t assert_pch_hdmi_disabled +ffffffff81aa4000 T lpt_disable_iclkip +ffffffff81aa4070 T lpt_iclkip +ffffffff81aa4100 T lpt_program_iclkip +ffffffff81aa4380 T lpt_get_iclkip +ffffffff81aa4490 T lpt_disable_clkout_dp +ffffffff81aa4570 T intel_init_pch_refclk +ffffffff81aa6000 T intel_crtc_initial_plane_config +ffffffff81aa7000 T intel_pps_lock +ffffffff81aa7060 T intel_pps_unlock +ffffffff81aa70c0 T intel_pps_reset_all +ffffffff81aa7210 T intel_pps_check_power_unlocked +ffffffff81aa73d0 T intel_pps_wait_power_cycle +ffffffff81aa7590 T intel_pps_vdd_on_unlocked +ffffffff81aa7ac0 T intel_pps_vdd_on +ffffffff81aa7bc0 T intel_pps_vdd_off_sync +ffffffff81aa7c90 t intel_pps_vdd_off_sync_unlocked +ffffffff81aa7f70 T intel_pps_vdd_off_unlocked +ffffffff81aa8080 T intel_pps_on_unlocked +ffffffff81aa8480 T intel_pps_on +ffffffff81aa8520 T intel_pps_off_unlocked +ffffffff81aa8770 T intel_pps_off +ffffffff81aa8810 T intel_pps_backlight_on +ffffffff81aa8a20 T intel_pps_backlight_off +ffffffff81aa8c30 T intel_pps_backlight_power +ffffffff81aa8e00 T vlv_pps_init +ffffffff81aa8f60 t vlv_detach_power_sequencer +ffffffff81aa90e0 t vlv_steal_power_sequencer +ffffffff81aa9210 t pps_init_delays +ffffffff81aa9670 t pps_init_registers +ffffffff81aa9a10 T intel_pps_have_panel_power_or_vdd +ffffffff81aa9b70 T intel_pps_encoder_reset +ffffffff81aa9d00 t vlv_initial_power_sequencer_setup +ffffffff81aa9fb0 t pps_vdd_init +ffffffff81aaa0c0 T intel_pps_init +ffffffff81aaa240 t edp_panel_vdd_work +ffffffff81aaa2f0 T intel_pps_init_late +ffffffff81aaa470 T intel_pps_unlock_regs_wa +ffffffff81aaa560 T intel_pps_setup +ffffffff81aaa5d0 T assert_pps_unlocked +ffffffff81aaa820 t intel_pps_get_registers +ffffffff81aaaee0 t wait_panel_status +ffffffff81aab1a0 t intel_pps_readout_hw_state +ffffffff81aab360 t __delayed_work_tick +ffffffff81aac000 T intel_psr_irq_handler +ffffffff81aac680 T intel_psr_init_dpcd +ffffffff81aac910 T intel_psr_compute_config +ffffffff81aad1b0 T intel_psr_get_config +ffffffff81aad360 T intel_psr_disable +ffffffff81aad470 t intel_psr_disable_locked +ffffffff81aad8e0 T intel_psr_pause +ffffffff81aadad0 t intel_psr_exit +ffffffff81aaddb0 T intel_psr_resume +ffffffff81aade40 t intel_psr_activate +ffffffff81aae5e0 T intel_psr2_disable_plane_sel_fetch +ffffffff81aae650 T intel_psr2_program_plane_sel_fetch +ffffffff81aae800 T intel_psr2_program_trans_man_trk_ctl +ffffffff81aae950 T intel_psr2_sel_fetch_update +ffffffff81aaefe0 T intel_psr_pre_plane_update +ffffffff81aaf1b0 T intel_psr_post_plane_update +ffffffff81aafc40 T intel_psr_wait_for_idle_locked +ffffffff81aafe20 T intel_psr_debug_set +ffffffff81ab0050 t psr_irq_control +ffffffff81ab01a0 T intel_psr_invalidate +ffffffff81ab0460 T intel_psr_flush +ffffffff81ab0930 T intel_psr_init +ffffffff81ab0a60 t intel_psr_work +ffffffff81ab0c10 t tgl_dc3co_disable_work +ffffffff81ab0c60 T intel_psr_short_pulse +ffffffff81ab1020 T intel_psr_enabled +ffffffff81ab10a0 T intel_psr_lock +ffffffff81ab1190 T intel_psr_unlock +ffffffff81ab1280 t tgl_psr2_disable_dc3co +ffffffff81ab13b0 t __delayed_work_tick +ffffffff81ab2000 T intel_lookup_range_min_qp +ffffffff81ab20b0 T intel_lookup_range_max_qp +ffffffff81ab3000 T intel_init_quirks +ffffffff81ab30f0 T intel_has_quirk +ffffffff81ab3130 t quirk_ssc_force_disable +ffffffff81ab3160 t quirk_invert_brightness +ffffffff81ab3190 t quirk_backlight_present +ffffffff81ab31c0 t quirk_increase_t12_delay +ffffffff81ab31f0 t quirk_increase_ddi_disabled_time +ffffffff81ab3220 t intel_dmi_reverse_brightness +ffffffff81ab3270 t intel_dmi_no_pps_backlight +ffffffff81ab4000 T intel_sdvo_port_enabled +ffffffff81ab40a0 T intel_sdvo_init +ffffffff81ab4c50 t intel_sdvo_compute_config +ffffffff81ab51b0 t pch_disable_sdvo +ffffffff81ab51e0 t pch_post_disable_sdvo +ffffffff81ab51f0 t intel_disable_sdvo +ffffffff81ab5360 t intel_sdvo_pre_enable +ffffffff81ab5ce0 t intel_enable_sdvo +ffffffff81ab5ee0 t intel_sdvo_get_hw_state +ffffffff81ab5fd0 t intel_sdvo_get_config +ffffffff81ab6540 t intel_sdvo_ddc_proxy_xfer +ffffffff81ab65f0 t intel_sdvo_ddc_proxy_func +ffffffff81ab6620 t __intel_sdvo_write_cmd +ffffffff81ab6ae0 t proxy_lock_bus +ffffffff81ab6b10 t proxy_trylock_bus +ffffffff81ab6b40 t proxy_unlock_bus +ffffffff81ab6b70 t intel_sdvo_enc_destroy +ffffffff81ab6b80 t intel_sdvo_get_preferred_input_mode +ffffffff81ab6f10 t intel_sdvo_get_dtd_from_mode +ffffffff81ab7080 t intel_sdvo_read_response +ffffffff81ab7520 t intel_sdvo_write_sdvox +ffffffff81ab7710 t intel_sdvo_write_infoframe +ffffffff81ab78e0 t intel_sdvo_dvi_init +ffffffff81ab7b60 t intel_sdvo_tv_init +ffffffff81ab7e70 t intel_sdvo_lvds_init +ffffffff81ab8050 t intel_sdvo_hotplug +ffffffff81ab8090 t intel_sdvo_connector_get_hw_state +ffffffff81ab8120 t intel_sdvo_detect +ffffffff81ab84a0 t intel_sdvo_connector_register +ffffffff81ab84b0 t intel_sdvo_connector_unregister +ffffffff81ab84c0 t intel_sdvo_connector_duplicate_state +ffffffff81ab8540 t intel_sdvo_connector_atomic_set_property +ffffffff81ab8710 t intel_sdvo_connector_atomic_get_property +ffffffff81ab8930 t intel_sdvo_get_modes +ffffffff81ab8bf0 t intel_sdvo_mode_valid +ffffffff81ab8cc0 t intel_sdvo_atomic_check +ffffffff81ab8d70 t intel_sdvo_create_enhance_property +ffffffff81aba000 T intel_snps_phy_wait_for_calibration +ffffffff81aba0d0 T intel_snps_phy_update_psr_power_state +ffffffff81aba1a0 T intel_snps_phy_set_signal_levels +ffffffff81aba3f0 T intel_mpllb_calc_state +ffffffff81aba560 T intel_snps_phy_check_hdmi_link_rate +ffffffff81aba5c0 T intel_mpllb_enable +ffffffff81aba820 T intel_mpllb_disable +ffffffff81aba9b0 T intel_mpllb_calc_port_clock +ffffffff81abaa70 T intel_mpllb_readout_hw_state +ffffffff81ababe0 T intel_mpllb_state_verify +ffffffff81abc000 T intel_plane_check_src_coordinates +ffffffff81abc1d0 T vlv_plane_min_cdclk +ffffffff81abc2c0 T ivb_plane_min_cdclk +ffffffff81abc380 T hsw_plane_min_cdclk +ffffffff81abc420 T chv_plane_check_rotation +ffffffff81abc490 T intel_sprite_set_colorkey_ioctl +ffffffff81abc760 T intel_sprite_plane_create +ffffffff81abcab0 t vlv_sprite_update_noarm +ffffffff81abcba0 t vlv_sprite_update_arm +ffffffff81abd260 t vlv_sprite_disable_arm +ffffffff81abd2f0 t vlv_sprite_get_hw_state +ffffffff81abd3b0 t vlv_sprite_check +ffffffff81abd640 t ivb_sprite_update_noarm +ffffffff81abd7b0 t ivb_sprite_update_arm +ffffffff81abdb90 t ivb_sprite_disable_arm +ffffffff81abdc40 t ivb_sprite_get_hw_state +ffffffff81abdcf0 t g4x_sprite_check +ffffffff81abe2c0 t hsw_sprite_max_stride +ffffffff81abe310 t g4x_sprite_max_stride +ffffffff81abe380 t ivb_sprite_min_cdclk +ffffffff81abe4b0 t g4x_sprite_update_noarm +ffffffff81abe620 t g4x_sprite_update_arm +ffffffff81abea70 t g4x_sprite_disable_arm +ffffffff81abeb20 t g4x_sprite_get_hw_state +ffffffff81abebd0 t g4x_sprite_min_cdclk +ffffffff81abec90 t vlv_sprite_format_mod_supported +ffffffff81abedc0 t snb_sprite_format_mod_supported +ffffffff81abeeb0 t g4x_sprite_format_mod_supported +ffffffff81abf000 T intel_tc_port_in_tbt_alt_mode +ffffffff81abf070 T intel_tc_port_in_dp_alt_mode +ffffffff81abf0e0 T intel_tc_port_in_legacy_mode +ffffffff81abf150 T intel_tc_cold_requires_aux_pw +ffffffff81abf1a0 T intel_tc_port_get_lane_mask +ffffffff81abf300 T intel_tc_port_get_pin_assignment_mask +ffffffff81abf460 T intel_tc_port_fia_max_lane_count +ffffffff81abf5a0 T intel_tc_port_set_fia_lane_count +ffffffff81abf7b0 T intel_tc_port_init_mode +ffffffff81abfc30 t intel_tc_port_update_mode +ffffffff81ac0150 T intel_tc_port_sanitize_mode +ffffffff81ac0500 T intel_tc_port_connected +ffffffff81ac05f0 T intel_tc_port_lock +ffffffff81ac0610 t tc_port_live_status_mask +ffffffff81ac08e0 T intel_tc_port_unlock +ffffffff81ac0960 t __intel_tc_port_lock +ffffffff81ac0b60 T intel_tc_port_flush_work +ffffffff81ac0b80 T intel_tc_port_ref_held +ffffffff81ac0bd0 T intel_tc_port_get_link +ffffffff81ac0c50 T intel_tc_port_put_link +ffffffff81ac0ce0 T intel_tc_port_init +ffffffff81ac0f60 t intel_tc_port_disconnect_phy_work +ffffffff81ac0fb0 t tc_phy_status_complete +ffffffff81ac10c0 t tc_phy_take_ownership +ffffffff81ac1260 t __delayed_work_tick +ffffffff81ac2000 T intel_tv_init +ffffffff81ac2420 t intel_tv_compute_config +ffffffff81ac28c0 t intel_tv_get_config +ffffffff81ac2e70 t intel_tv_pre_enable +ffffffff81ac37a0 t intel_enable_tv +ffffffff81ac3800 t intel_disable_tv +ffffffff81ac3860 t intel_tv_get_hw_state +ffffffff81ac38c0 t intel_tv_connector_duplicate_state +ffffffff81ac3940 t intel_tv_mode_to_mode +ffffffff81ac3a90 t intel_tv_get_modes +ffffffff81ac3df0 t intel_tv_detect +ffffffff81ac4250 t intel_tv_mode_valid +ffffffff81ac42e0 t intel_tv_atomic_check +ffffffff81ac5000 T intel_dsc_source_support +ffffffff81ac5060 T intel_dsc_compute_params +ffffffff81ac5520 T intel_dsc_power_domain +ffffffff81ac55d0 T intel_dsc_dsi_pps_write +ffffffff81ac5870 T intel_dsc_dp_pps_write +ffffffff81ac5950 T intel_uncompressed_joiner_enable +ffffffff81ac5a70 T intel_dsc_enable +ffffffff81ac7340 T intel_dsc_disable +ffffffff81ac74d0 T intel_dsc_get_config +ffffffff81ac8000 T intel_vga_disable +ffffffff81ac8120 T intel_vga_redisable_power_on +ffffffff81ac81c0 T intel_vga_redisable +ffffffff81ac8280 T intel_vga_reset_io_mem +ffffffff81ac82e0 T intel_vga_register +ffffffff81ac8310 T intel_vga_unregister +ffffffff81ac9000 T intel_vrr_is_capable +ffffffff81ac90a0 T intel_vrr_check_modeset +ffffffff81ac9130 T intel_vrr_vmin_vblank_start +ffffffff81ac9190 T intel_vrr_vmax_vblank_start +ffffffff81ac91f0 T intel_vrr_compute_config +ffffffff81ac9380 T intel_vrr_enable +ffffffff81ac9560 T intel_vrr_send_push +ffffffff81ac95e0 T intel_vrr_is_push_sent +ffffffff81ac9670 T intel_vrr_disable +ffffffff81ac9740 T intel_vrr_get_config +ffffffff81aca000 T skl_update_scaler_crtc +ffffffff81aca0c0 t skl_update_scaler +ffffffff81aca3e0 T skl_update_scaler_plane +ffffffff81aca7d0 T skl_pfit_enable +ffffffff81acacb0 T skl_program_plane_scaler +ffffffff81acb370 T skl_detach_scalers +ffffffff81acb4b0 T skl_scaler_disable +ffffffff81acc000 T skl_format_to_fourcc +ffffffff81acc180 T icl_is_nv12_y_plane +ffffffff81acc1f0 T icl_is_hdr_plane +ffffffff81acc230 T skl_calc_main_surface_offset +ffffffff81acc470 T skl_universal_plane_create +ffffffff81accb60 t icl_plane_min_width +ffffffff81acccf0 t icl_hdr_plane_max_width +ffffffff81accd40 t icl_sdr_plane_max_width +ffffffff81accd70 t icl_plane_max_height +ffffffff81accda0 t icl_plane_min_cdclk +ffffffff81accde0 t glk_plane_max_width +ffffffff81acce90 t skl_plane_max_height +ffffffff81accec0 t glk_plane_min_cdclk +ffffffff81accf40 t skl_plane_max_width +ffffffff81acd010 t skl_plane_min_cdclk +ffffffff81acd080 t skl_plane_max_stride +ffffffff81acd120 t icl_plane_update_noarm +ffffffff81acdae0 t icl_plane_update_arm +ffffffff81acdc50 t icl_plane_disable_arm +ffffffff81acdd60 t skl_plane_update_noarm +ffffffff81acdf00 t skl_plane_update_arm +ffffffff81ace300 t skl_plane_disable_arm +ffffffff81ace3b0 t skl_plane_get_hw_state +ffffffff81ace470 t skl_plane_check +ffffffff81acf8a0 t skl_plane_async_flip +ffffffff81acf9d0 t skl_plane_enable_flip_done +ffffffff81acfa30 t skl_plane_disable_flip_done +ffffffff81acfa90 T skl_get_initial_plane_config +ffffffff81ad0130 t skl_surf_address +ffffffff81ad0250 t skl_check_main_ccs_coordinates +ffffffff81ad03f0 t gen12_plane_format_mod_supported +ffffffff81ad0640 t skl_plane_format_mod_supported +ffffffff81ad1000 T intel_enabled_dbuf_slices_mask +ffffffff81ad1130 T intel_sagv_pre_plane_update +ffffffff81ad12a0 T intel_sagv_post_plane_update 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intel_guc_init_late +ffffffff81b64690 T intel_guc_write_params +ffffffff81b648a0 T intel_guc_dump_time_info +ffffffff81b649d0 T intel_guc_init +ffffffff81b650d0 T intel_guc_fini +ffffffff81b65190 T intel_guc_send_mmio +ffffffff81b65650 T intel_guc_to_host_process_recv_msg +ffffffff81b65730 T intel_guc_auth_huc +ffffffff81b65790 T intel_guc_suspend +ffffffff81b65850 T intel_guc_resume +ffffffff81b65880 T intel_guc_allocate_vma +ffffffff81b65970 T intel_guc_allocate_and_map_vma +ffffffff81b65a10 T intel_guc_self_cfg32 +ffffffff81b65af0 T intel_guc_self_cfg64 +ffffffff81b65bd0 T intel_guc_load_status +ffffffff81b65d60 T intel_guc_write_barrier +ffffffff81b66000 T intel_guc_ads_print_policy_info +ffffffff81b66020 T intel_guc_global_policies_update +ffffffff81b66070 T intel_guc_ads_create +ffffffff81b66630 T intel_guc_ads_init_late +ffffffff81b66680 T intel_guc_ads_destroy +ffffffff81b666e0 T intel_guc_ads_reset +ffffffff81b66750 T intel_guc_engine_usage_offset +ffffffff81b66790 T intel_guc_engine_usage_record_map +ffffffff81b67000 T intel_guc_capture_getlistsize +ffffffff81b67020 t guc_capture_getlistsize +ffffffff81b67300 T intel_guc_capture_getlist +ffffffff81b67ba0 T intel_guc_capture_getnullheader +ffffffff81b67c50 T intel_guc_capture_print_engine_node +ffffffff81b68150 T intel_guc_capture_free_node +ffffffff81b681d0 T intel_guc_capture_get_matching_node +ffffffff81b68350 T intel_guc_capture_process +ffffffff81b69370 T intel_guc_capture_destroy +ffffffff81b696d0 T intel_guc_capture_init +ffffffff81b69cf0 t guc_capture_log_get_register +ffffffff81b6a080 t guc_capture_alloc_steered_lists_xe_hpg +ffffffff81b6b000 T intel_guc_ct_init_early +ffffffff81b6b120 t ct_incoming_request_worker_func +ffffffff81b6b480 t ct_receive_tasklet_func +ffffffff81b6b4a0 T intel_guc_ct_init +ffffffff81b6b640 T intel_guc_ct_fini +ffffffff81b6b6a0 T intel_guc_ct_enable +ffffffff81b6b9b0 T intel_guc_ct_disable +ffffffff81b6ba60 T intel_guc_ct_send +ffffffff81b6c410 T intel_guc_ct_event_handler +ffffffff81b6c440 t ct_try_receive_message +ffffffff81b6cc20 T intel_guc_ct_print_info +ffffffff81b6cd30 t ct_write +ffffffff81b6ced0 t ct_deadlocked +ffffffff81b6e000 T intel_guc_debugfs_register +ffffffff81b6f000 T intel_guc_fw_upload +ffffffff81b70000 T intel_gt_init_hwconfig +ffffffff81b701d0 T intel_gt_fini_hwconfig +ffffffff81b71000 T intel_guc_log_section_size_capture +ffffffff81b71040 t guc_log_init_sizes +ffffffff81b71240 T intel_guc_check_log_buf_overflow +ffffffff81b712f0 T intel_guc_get_log_buffer_size +ffffffff81b71380 T intel_guc_get_log_buffer_offset +ffffffff81b71470 T intel_guc_log_init_early +ffffffff81b714e0 t copy_debug_logs_work +ffffffff81b71500 T intel_guc_log_create +ffffffff81b71680 T intel_guc_log_destroy +ffffffff81b716b0 T intel_guc_log_set_level +ffffffff81b717e0 T intel_guc_log_relay_created +ffffffff81b71810 T intel_guc_log_relay_open +ffffffff81b718b0 T intel_guc_log_relay_start +ffffffff81b71910 T intel_guc_log_relay_flush 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intel_guc_slpc_dec_waiters +ffffffff81b74fb0 T intel_guc_slpc_print_info +ffffffff81b751c0 T intel_guc_slpc_fini +ffffffff81b76000 T intel_guc_wait_for_pending_msg +ffffffff81b76160 T intel_guc_wait_for_idle +ffffffff81b761b0 T intel_guc_busyness_park +ffffffff81b763b0 T intel_guc_busyness_unpark +ffffffff81b76520 T intel_guc_submission_reset_prepare +ffffffff81b76c90 t guc_flush_destroyed_contexts +ffffffff81b76e00 T intel_guc_submission_reset +ffffffff81b76f20 t __guc_reset_context +ffffffff81b77220 T intel_guc_submission_cancel_requests +ffffffff81b774c0 T intel_guc_submission_reset_finish +ffffffff81b775a0 T intel_guc_submission_init +ffffffff81b77710 T intel_guc_submission_fini +ffffffff81b777b0 T intel_guc_submission_setup +ffffffff81b77bb0 t guc_sched_engine_disabled +ffffffff81b77be0 t guc_sched_engine_destroy +ffffffff81b77c40 t guc_bump_inflight_request_prio +ffffffff81b77d30 t guc_retire_inflight_request_prio +ffffffff81b77db0 t guc_submission_tasklet +ffffffff81b78170 t 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intel_guc_virtual_engine_has_heartbeat +ffffffff81b7ab10 t guc_virtual_get_sibling +ffffffff81b7abb0 t update_context_prio +ffffffff81b7ada0 t try_context_registration +ffffffff81b7b220 t guc_wq_item_append +ffffffff81b7b4a0 t guc_add_request +ffffffff81b7b6e0 t guc_context_policy_init_v70 +ffffffff81b7b860 t guc_resume +ffffffff81b7b960 t guc_request_alloc +ffffffff81b7bc50 t add_to_context +ffffffff81b7bd50 t remove_from_context +ffffffff81b7be20 t guc_engine_reset_prepare +ffffffff81b7be80 t guc_rewind_nop +ffffffff81b7beb0 t guc_reset_nop +ffffffff81b7bee0 t guc_set_default_submission +ffffffff81b7bf20 t guc_engine_busyness +ffffffff81b7c260 t guc_context_alloc +ffffffff81b7c280 t guc_context_revoke +ffffffff81b7c570 t guc_context_pre_pin +ffffffff81b7c590 t guc_context_pin +ffffffff81b7c640 t guc_context_unpin +ffffffff81b7c760 t guc_context_post_unpin +ffffffff81b7c770 t guc_context_cancel_request +ffffffff81b7cc90 t guc_context_sched_disable +ffffffff81b7ce60 t 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intel_uc_cancel_requests +ffffffff81b82530 T intel_uc_runtime_suspend +ffffffff81b82680 T intel_uc_suspend +ffffffff81b82710 T intel_uc_resume +ffffffff81b82790 T intel_uc_runtime_resume +ffffffff81b82840 t guc_enable_communication +ffffffff81b82980 t __uc_check_hw +ffffffff81b82a20 t __uc_fetch_firmwares +ffffffff81b82ab0 t __uc_cleanup_firmwares +ffffffff81b82ae0 t __uc_init +ffffffff81b82b40 t __uc_fini +ffffffff81b82b70 t __uc_init_hw +ffffffff81b831c0 t __uc_fini_hw +ffffffff81b84000 T intel_uc_debugfs_register +ffffffff81b85000 T intel_uc_fw_init_early +ffffffff81b851b0 T intel_uc_fw_fetch +ffffffff81b85960 T intel_uc_fw_upload +ffffffff81b85cf0 T intel_uc_fw_init +ffffffff81b85ed0 T intel_uc_fw_fini +ffffffff81b85f30 T intel_uc_fw_cleanup_fetch +ffffffff81b85fa0 T intel_uc_fw_copy_rsa +ffffffff81b85ff0 T intel_uc_fw_dump +ffffffff81b87000 T __i915_active_init +ffffffff81b870a0 t excl_retire +ffffffff81b87130 t active_work +ffffffff81b87190 T i915_active_add_request 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inteldrm_init_backlight +ffffffff81b8df00 T i915_driver_remove +ffffffff81b8e000 T i915_driver_shutdown +ffffffff81b8e150 T i915_driver_resume_switcheroo +ffffffff81b8e1b0 t i915_drm_resume_early +ffffffff81b8e2e0 t i915_drm_resume +ffffffff81b8e4a0 T intagpsubmatch +ffffffff81b8e4f0 T intagp_print +ffffffff81b8e540 T inteldrm_wsioctl +ffffffff81b8e720 T inteldrm_wsmmap +ffffffff81b8e750 T inteldrm_alloc_screen +ffffffff81b8e780 T inteldrm_free_screen +ffffffff81b8e7a0 T inteldrm_show_screen +ffffffff81b8e870 T inteldrm_load_font +ffffffff81b8e890 T inteldrm_list_font +ffffffff81b8e8b0 T inteldrm_scrollback +ffffffff81b8e8d0 T inteldrm_getchar +ffffffff81b8e8f0 T inteldrm_burner +ffffffff81b8e980 T inteldrm_enter_ddb +ffffffff81b8e9e0 T inteldrm_doswitch +ffffffff81b8ea70 T inteldrm_burner_cb +ffffffff81b8eaa0 T inteldrm_backlight_update_status +ffffffff81b8eb00 T inteldrm_backlight_get_brightness +ffffffff81b8eb50 T inteldrm_match +ffffffff81b8ebe0 T inteldrm_attach +ffffffff81b8f0b0 T inteldrm_detach +ffffffff81b8f0e0 T inteldrm_activate +ffffffff81b8f3f0 T inteldrm_intr +ffffffff81b8f430 T inteldrm_attachhook +ffffffff81b8f690 T inteldrm_forcedetach +ffffffff81b8f6d0 T inteldrm_native_backlight +ffffffff81b8f810 T inteldrm_firmware_backlight +ffffffff81b8f980 t intel_teardown_mchbar +ffffffff81b8fa60 t i915_pcode_init +ffffffff81b8fb60 t i915_driver_open +ffffffff81b8fb80 t i915_driver_postclose +ffffffff81b8fbe0 t i915_driver_lastclose +ffffffff81b8fbf0 t i915_driver_release +ffffffff81b8fd00 t i915_gem_reject_pin_ioctl +ffffffff81b90000 T i915_drm_clients_init +ffffffff81b90030 T i915_drm_client_add +ffffffff81b90110 T __i915_drm_client_free +ffffffff81b90170 T i915_drm_clients_fini +ffffffff81b91000 T i915_gem_get_aperture_ioctl +ffffffff81b910d0 T i915_gem_object_unbind +ffffffff81b91340 T i915_gem_pread_ioctl +ffffffff81b91a20 T i915_gem_pwrite_ioctl +ffffffff81b92210 T i915_gem_sw_finish_ioctl +ffffffff81b922a0 T i915_gem_runtime_suspend +ffffffff81b923a0 T i915_gem_object_ggtt_pin_ww +ffffffff81b92650 T i915_gem_object_ggtt_pin +ffffffff81b927c0 T i915_gem_madvise_ioctl +ffffffff81b92ae0 T i915_gem_drain_freed_objects +ffffffff81b92b60 T i915_gem_drain_workqueue +ffffffff81b92c40 T i915_gem_init +ffffffff81b92fc0 T i915_gem_driver_register +ffffffff81b92ff0 T i915_gem_driver_unregister +ffffffff81b93000 T i915_gem_driver_remove +ffffffff81b930e0 T i915_gem_driver_release +ffffffff81b93230 T i915_gem_init_early +ffffffff81b932b0 T i915_gem_cleanup_early +ffffffff81b93370 T i915_gem_open +ffffffff81b93490 t i915_gem_gtt_prepare +ffffffff81b93790 t __ww_mutex_lock +ffffffff81b94000 T i915_gem_evict_something +ffffffff81b94880 T i915_gem_evict_for_node +ffffffff81b94c50 T i915_gem_evict_vm +ffffffff81b96000 T i915_gem_gtt_prepare_pages +ffffffff81b96030 T i915_gem_gtt_finish_pages +ffffffff81b96090 T i915_gem_gtt_reserve +ffffffff81b96140 T i915_gem_gtt_insert +ffffffff81b97000 T i915_gem_ww_ctx_init +ffffffff81b97060 T i915_gem_ww_unlock_single +ffffffff81b971a0 T i915_gem_ww_ctx_fini +ffffffff81b97210 t i915_gem_ww_ctx_unlock_all +ffffffff81b97370 T i915_gem_ww_ctx_backoff +ffffffff81b98000 T i915_getparam_ioctl +ffffffff81b99000 T intel_gpu_error_find_batch +ffffffff81b99070 T i915_error_printf +ffffffff81b99130 T intel_gpu_error_print_vma +ffffffff81b99160 T i915_gpu_coredump_copy_to_buffer +ffffffff81b991b0 T __i915_gpu_coredump_free +ffffffff81b99340 T intel_engine_coredump_alloc +ffffffff81b99ba0 T intel_engine_coredump_add_request +ffffffff81b99f10 T intel_engine_coredump_add_vma +ffffffff81b9a030 T i915_gpu_coredump_alloc +ffffffff81b9a290 T intel_gt_coredump_alloc +ffffffff81b9aad0 T i915_vma_capture_prepare +ffffffff81b9ab80 T i915_vma_capture_finish +ffffffff81b9abe0 T i915_gpu_coredump +ffffffff81b9b3c0 T i915_error_state_store +ffffffff81b9b420 T i915_capture_error_state +ffffffff81b9b4e0 T i915_first_error_state +ffffffff81b9b550 T i915_reset_error_state +ffffffff81b9b5f0 T i915_disable_error_state +ffffffff81b9c000 T i915_reg_read_ioctl +ffffffff81b9d000 T gen3_irq_reset +ffffffff81b9d0d0 T gen2_irq_reset +ffffffff81b9d1a0 T gen3_irq_init +ffffffff81b9d2e0 T gen2_irq_init +ffffffff81b9d420 T i915_hotplug_interrupt_update +ffffffff81b9d500 T ilk_enable_display_irq +ffffffff81b9d510 t ilk_update_display_irq +ffffffff81b9d650 T ilk_disable_display_irq +ffffffff81b9d750 T bdw_enable_pipe_irq +ffffffff81b9d770 t bdw_update_pipe_irq +ffffffff81b9d8d0 T bdw_disable_pipe_irq +ffffffff81b9d9d0 T ibx_enable_display_interrupt +ffffffff81b9d9e0 t ibx_display_interrupt_update +ffffffff81b9db00 T ibx_disable_display_interrupt +ffffffff81b9dbc0 T i915_pipestat_enable_mask +ffffffff81b9dd60 T i915_enable_pipestat +ffffffff81b9def0 T intel_irqs_enabled +ffffffff81b9df20 T i915_disable_pipestat +ffffffff81b9e0a0 T i915_get_vblank_counter +ffffffff81b9e250 T g4x_get_vblank_counter +ffffffff81b9e2e0 T intel_crtc_get_vblank_timestamp +ffffffff81b9e300 t i915_get_crtc_scanoutpos +ffffffff81b9e750 T intel_get_crtc_scanline +ffffffff81b9e7c0 t __intel_get_crtc_scanline +ffffffff81b9ea30 T gen8_de_pipe_underrun_mask +ffffffff81b9ea70 T i8xx_enable_vblank +ffffffff81b9eb90 T i915gm_enable_vblank +ffffffff81b9ec10 T i965_enable_vblank +ffffffff81b9ed30 T ilk_enable_vblank +ffffffff81b9ede0 T bdw_enable_vblank +ffffffff81b9ef90 T i8xx_disable_vblank +ffffffff81b9f090 T i915gm_disable_vblank +ffffffff81b9f100 T i965_disable_vblank +ffffffff81b9f200 T ilk_disable_vblank +ffffffff81b9f300 T bdw_disable_vblank +ffffffff81b9f480 T gen8_irq_power_well_post_enable +ffffffff81b9f600 T gen8_irq_power_well_pre_disable +ffffffff81b9f790 T intel_synchronize_irq +ffffffff81b9f7b0 T valleyview_enable_display_irqs +ffffffff81b9f820 t vlv_display_irq_reset +ffffffff81b9f9e0 t vlv_display_irq_postinstall +ffffffff81b9fc30 T valleyview_disable_display_irqs +ffffffff81b9fc80 T intel_hpd_irq_setup +ffffffff81b9fcd0 T intel_irq_init +ffffffff81b9ff80 t ivb_parity_work +ffffffff81ba0320 T intel_irq_fini +ffffffff81ba0360 T intel_irq_install +ffffffff81ba0470 t intel_irq_reset +ffffffff81ba0fd0 t intel_irq_postinstall +ffffffff81ba1cd0 T intel_irq_uninstall +ffffffff81ba1d40 T intel_runtime_pm_disable_interrupts +ffffffff81ba1d70 T intel_runtime_pm_enable_interrupts +ffffffff81ba1da0 T intel_synchronize_hardirq +ffffffff81ba1dc0 t i9xx_pipestat_irq_reset +ffffffff81ba1f50 t kasprintf +ffffffff81ba2020 t i915_hpd_irq_setup +ffffffff81ba2130 t icp_hpd_irq_setup +ffffffff81ba2320 t dg1_hpd_irq_setup +ffffffff81ba2380 t gen11_hpd_irq_setup +ffffffff81ba25d0 t bxt_hpd_irq_setup +ffffffff81ba2760 t bdw_update_port_irq +ffffffff81ba28a0 t spt_hpd_irq_setup +ffffffff81ba2ac0 t ilk_hpd_irq_setup +ffffffff81ba2d20 t gen11_display_irq_reset +ffffffff81ba32a0 t ibx_irq_reset +ffffffff81ba33e0 t cherryview_irq_handler +ffffffff81ba36b0 t valleyview_irq_handler +ffffffff81ba3a20 t i965_irq_handler +ffffffff81ba3f90 t i915_irq_handler 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gen8_modify_context +ffffffff81bb5c40 t gen12_configure_oar_context +ffffffff81bb6000 T i915_query_ioctl +ffffffff81bb6110 t query_topology_info +ffffffff81bb6160 t query_engine_info +ffffffff81bb63a0 t query_perf_config +ffffffff81bb66a0 t query_memregion_info +ffffffff81bb6920 t query_hwconfig_blob +ffffffff81bb69a0 t query_geometry_subslices +ffffffff81bb6a30 t fill_topology_info +ffffffff81bb6bd0 t query_perf_config_data +ffffffff81bb8000 T i915_request_slab_cache +ffffffff81bb8030 t i915_fence_get_driver_name +ffffffff81bb8060 t i915_fence_get_timeline_name +ffffffff81bb80c0 t i915_fence_enable_signaling +ffffffff81bb80d0 t i915_fence_signaled +ffffffff81bb8120 t i915_fence_wait +ffffffff81bb8140 t i915_fence_release +ffffffff81bb8230 T i915_request_notify_execute_cb_imm +ffffffff81bb82a0 T i915_request_active_engine +ffffffff81bb8380 T i915_request_free_capture_list +ffffffff81bb83f0 T i915_request_retire +ffffffff81bb85b0 T i915_request_retire_upto +ffffffff81bb8620 T __i915_request_skip +ffffffff81bb86c0 T i915_request_set_error_once +ffffffff81bb8730 T i915_request_mark_eio +ffffffff81bb87c0 T __i915_request_submit +ffffffff81bb8a10 T i915_request_submit +ffffffff81bb8a60 T __i915_request_unsubmit +ffffffff81bb8ad0 T i915_request_unsubmit +ffffffff81bb8b50 T i915_request_cancel +ffffffff81bb8bd0 T __i915_request_create +ffffffff81bb8ef0 t request_alloc_slow +ffffffff81bb9040 T i915_request_create +ffffffff81bb9140 T i915_request_await_execution +ffffffff81bb9250 t __i915_request_await_execution +ffffffff81bb93e0 t i915_request_await_external +ffffffff81bb9520 T i915_request_await_dma_fence +ffffffff81bb98a0 T i915_request_await_deps +ffffffff81bb9910 T i915_request_await_object +ffffffff81bb99c0 T __i915_request_commit +ffffffff81bb9c30 T __i915_request_queue_bh +ffffffff81bb9c70 T __i915_request_queue +ffffffff81bb9cd0 T i915_request_add +ffffffff81bb9d80 T i915_request_wait_timeout +ffffffff81bba0a0 t request_wait_wake +ffffffff81bba0c0 T i915_request_wait +ffffffff81bba120 T i915_request_show +ffffffff81bba350 T i915_test_request_state +ffffffff81bba4c0 T i915_request_module_exit +ffffffff81bba4f0 T i915_request_module_init +ffffffff81bba580 t submit_notify +ffffffff81bba660 t semaphore_notify +ffffffff81bba6b0 t __rq_watchdog_expired +ffffffff81bba760 t __await_execution +ffffffff81bba8e0 t i915_request_await_start +ffffffff81bbaa10 t irq_execute_cb +ffffffff81bbb000 T i915_sg_trim +ffffffff81bbb110 T i915_refct_sgt_init +ffffffff81bbb150 T i915_rsgt_from_mm_node +ffffffff81bbb300 T i915_rsgt_from_buddy_resource +ffffffff81bbb4e0 t i915_refct_sgt_release +ffffffff81bbc000 T i915_sched_lookup_priolist +ffffffff81bbc120 T __i915_priolist_free +ffffffff81bbc140 T i915_schedule +ffffffff81bbc620 T i915_sched_node_init +ffffffff81bbc680 T i915_sched_node_reinit +ffffffff81bbc6c0 T __i915_sched_node_add_dependency +ffffffff81bbc7d0 T i915_sched_node_add_dependency +ffffffff81bbc910 T i915_sched_node_fini +ffffffff81bbc9f0 T i915_request_show_with_schedule +ffffffff81bbcad0 T i915_sched_engine_create +ffffffff81bbcb80 t default_destroy +ffffffff81bbcbd0 t default_disabled +ffffffff81bbcc00 T i915_scheduler_module_exit +ffffffff81bbcc30 T i915_scheduler_module_init +ffffffff81bbd000 T i915_save_display +ffffffff81bbd360 T i915_restore_display +ffffffff81bbe000 T i915_sw_fence_complete +ffffffff81bbe040 t __i915_sw_fence_complete +ffffffff81bbe1c0 T i915_sw_fence_await +ffffffff81bbe240 T __i915_sw_fence_init +ffffffff81bbe2b0 T i915_sw_fence_reinit +ffffffff81bbe2f0 T i915_sw_fence_commit +ffffffff81bbe330 T i915_sw_fence_await_sw_fence +ffffffff81bbe350 t __i915_sw_fence_await_sw_fence +ffffffff81bbe5c0 T i915_sw_fence_await_sw_fence_gfp +ffffffff81bbe5e0 T i915_sw_fence_await_dma_fence +ffffffff81bbe810 t dma_i915_sw_fence_wake +ffffffff81bbe890 t irq_i915_sw_fence_work +ffffffff81bbe8d0 t timer_i915_sw_fence_wake +ffffffff81bbe9b0 t dma_i915_sw_fence_wake_timer +ffffffff81bbea40 T __i915_sw_fence_await_dma_fence +ffffffff81bbeb90 t __dma_i915_sw_fence_wake +ffffffff81bbebf0 T i915_sw_fence_await_reservation +ffffffff81bbecd0 t i915_sw_fence_wake +ffffffff81bbf000 T dma_fence_work_init +ffffffff81bbf080 t fence_notify +ffffffff81bbf170 t fence_work +ffffffff81bbf1d0 T dma_fence_work_chain +ffffffff81bbf220 t get_driver_name +ffffffff81bbf250 t get_timeline_name +ffffffff81bbf290 t fence_release +ffffffff81bc0000 T i915_switcheroo_register +ffffffff81bc0030 T i915_switcheroo_unregister +ffffffff81bc1000 T i915_syncmap_init +ffffffff81bc1030 T i915_syncmap_is_later +ffffffff81bc1130 T i915_syncmap_set +ffffffff81bc11e0 t __sync_set +ffffffff81bc14d0 T i915_syncmap_free +ffffffff81bc1530 t __sync_free +ffffffff81bc2000 T i915_setup_sysfs +ffffffff81bc2030 T i915_teardown_sysfs +ffffffff81bc3000 T i915_ttm_buddy_man_init +ffffffff81bc3210 T i915_ttm_buddy_man_fini +ffffffff81bc3400 T i915_ttm_buddy_man_reserve +ffffffff81bc34d0 T i915_ttm_buddy_man_visible_size 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i915_vma_pin_iomap +ffffffff81bc7bc0 T i915_vma_flush_writes +ffffffff81bc7c30 T i915_vma_unpin_iomap +ffffffff81bc7cc0 T i915_vma_unpin_and_release +ffffffff81bc7d30 T i915_vma_misplaced +ffffffff81bc7dd0 T __i915_vma_set_map_and_fenceable +ffffffff81bc7e50 T i915_gem_valid_gtt_space +ffffffff81bc7ee0 T vma_invalidate_tlb +ffffffff81bc7f20 T i915_vma_pin_ww +ffffffff81bc8940 T i915_ggtt_pin +ffffffff81bc8a20 t __i915_ggtt_pin +ffffffff81bc8b80 t i915_gem_object_lock +ffffffff81bc8d90 T i915_vma_close +ffffffff81bc8e60 T i915_vma_reopen +ffffffff81bc8ee0 T i915_vma_destroy_locked +ffffffff81bc8fd0 t release_references +ffffffff81bc9100 T i915_vma_destroy +ffffffff81bc9240 T i915_vma_parked +ffffffff81bc9510 T i915_vma_revoke_mmap +ffffffff81bc9610 T _i915_vma_move_to_active +ffffffff81bc9840 T __i915_vma_evict +ffffffff81bc9bb0 T __i915_vma_unbind +ffffffff81bc9c50 T i915_vma_unbind +ffffffff81bc9da0 T i915_vma_unbind_async +ffffffff81bc9f90 T i915_vma_unbind_unlocked +ffffffff81bca0a0 T i915_vma_make_unshrinkable +ffffffff81bca0e0 T i915_vma_make_shrinkable +ffffffff81bca100 T i915_vma_make_purgeable +ffffffff81bca120 T i915_vma_module_exit +ffffffff81bca140 T i915_vma_module_init +ffffffff81bca1a0 t __i915_vma_active +ffffffff81bca1f0 t __i915_vma_retire +ffffffff81bca240 t __vma_bind +ffffffff81bca2e0 t __vma_release +ffffffff81bca360 t intel_rotate_pages +ffffffff81bca6c0 t intel_remap_pages +ffffffff81bcaa90 t intel_partial_pages +ffffffff81bcb000 T i915_vma_resource_alloc +ffffffff81bcb050 T i915_vma_resource_free +ffffffff81bcb090 T i915_vma_resource_unhold +ffffffff81bcb0a0 t __i915_vma_resource_unhold +ffffffff81bcb190 T i915_vma_resource_hold +ffffffff81bcb1e0 T i915_vma_resource_unbind +ffffffff81bcb310 T __i915_vma_resource_init +ffffffff81bcb370 t i915_vma_resource_fence_notify +ffffffff81bcb440 T i915_vma_resource_bind_dep_sync +ffffffff81bcb5c0 T i915_vma_resource_bind_dep_sync_all +ffffffff81bcb660 T i915_vma_resource_bind_dep_await +ffffffff81bcb800 T i915_vma_resource_module_exit +ffffffff81bcb820 T i915_vma_resource_module_init +ffffffff81bcb880 t get_driver_name +ffffffff81bcb8b0 t get_timeline_name +ffffffff81bcb8e0 t unbind_fence_release +ffffffff81bcb920 t i915_vma_resource_unbind_work +ffffffff81bcc000 T intel_platform_name +ffffffff81bcc0a0 T intel_device_info_print +ffffffff81bccd30 T intel_device_info_subplatform_init +ffffffff81bcd090 T intel_device_info_runtime_init +ffffffff81bcd770 T intel_driver_caps_print +ffffffff81bce000 T intel_dram_detect +ffffffff81bce480 t skl_get_dram_info +ffffffff81bce660 T intel_dram_edram_detect +ffffffff81bce6f0 t icl_pcode_read_mem_global_info +ffffffff81bce7d0 t skl_dram_get_channel_info +ffffffff81bce9a0 t skl_dram_get_dimm_info +ffffffff81bcf000 T intel_memory_region_lookup +ffffffff81bcf0e0 T intel_memory_region_by_type +ffffffff81bcf1a0 T intel_memory_region_reserve +ffffffff81bcf1c0 T intel_memory_region_debug +ffffffff81bcf220 T intel_memory_region_create +ffffffff81bcf390 T intel_memory_region_set_name +ffffffff81bcf410 T intel_memory_region_avail +ffffffff81bcf490 T intel_memory_region_destroy +ffffffff81bcf500 T intel_memory_regions_hw_probe +ffffffff81bcf650 T intel_memory_regions_driver_release +ffffffff81bd0000 T intel_detect_pch +ffffffff81bd0310 t intel_pch_match +ffffffff81bd0360 t intel_pch_type +ffffffff81bd1000 T snb_pcode_read +ffffffff81bd10d0 t __snb_pcode_rw +ffffffff81bd1260 T snb_pcode_write_timeout +ffffffff81bd1330 T skl_pcode_request +ffffffff81bd1670 T intel_pcode_init +ffffffff81bd16d0 T snb_pcode_read_p +ffffffff81bd17e0 T snb_pcode_write_p +ffffffff81bd2000 T intel_set_memory_cxsr +ffffffff81bd20a0 t _intel_set_memory_cxsr +ffffffff81bd2350 T intel_wm_plane_visible +ffffffff81bd23b0 T ilk_wm_max_level +ffffffff81bd2420 T intel_print_wm_latency +ffffffff81bd2580 T ilk_disable_lp_wm +ffffffff81bd2660 T g4x_wm_get_hw_state +ffffffff81bd2e30 T g4x_wm_sanitize +ffffffff81bd2fd0 t g4x_program_watermarks +ffffffff81bd3370 T vlv_wm_get_hw_state +ffffffff81bd4040 t vlv_invalidate_wms +ffffffff81bd41a0 T vlv_wm_sanitize +ffffffff81bd42f0 t vlv_program_watermarks +ffffffff81bd4a40 T ilk_wm_get_hw_state +ffffffff81bd4eb0 T intel_init_clock_gating +ffffffff81bd4ed0 T intel_suspend_hw +ffffffff81bd4f80 T intel_init_clock_gating_hooks +ffffffff81bd51d0 T intel_init_pm +ffffffff81bd5cc0 T intel_pm_setup +ffffffff81bd5d00 t chv_set_memory_dvfs +ffffffff81bd5ec0 t pvc_init_clock_gating +ffffffff81bd6060 t dg2_init_clock_gating +ffffffff81bd61b0 t xehpsdv_init_clock_gating +ffffffff81bd62b0 t adlp_init_clock_gating +ffffffff81bd63a0 t gen12lp_init_clock_gating +ffffffff81bd6510 t dg1_init_clock_gating +ffffffff81bd6600 t icl_init_clock_gating +ffffffff81bd66c0 t cfl_init_clock_gating +ffffffff81bd67e0 t gen9_init_clock_gating +ffffffff81bd68f0 t skl_init_clock_gating +ffffffff81bd6a30 t kbl_init_clock_gating +ffffffff81bd6c40 t bxt_init_clock_gating +ffffffff81bd6da0 t glk_init_clock_gating +ffffffff81bd6e00 t bdw_init_clock_gating +ffffffff81bd7250 t chv_init_clock_gating +ffffffff81bd7400 t hsw_init_clock_gating +ffffffff81bd7550 t ivb_init_clock_gating +ffffffff81bd7760 t g4x_disable_trickle_feed +ffffffff81bd78c0 t cpt_init_clock_gating +ffffffff81bd7bf0 t vlv_init_clock_gating +ffffffff81bd7d00 t gen6_init_clock_gating +ffffffff81bd7f00 t ilk_init_clock_gating +ffffffff81bd80d0 t g4x_init_clock_gating +ffffffff81bd8190 t i965gm_init_clock_gating +ffffffff81bd8260 t i965g_init_clock_gating +ffffffff81bd82e0 t gen3_init_clock_gating +ffffffff81bd83e0 t i85x_init_clock_gating +ffffffff81bd8480 t i830_init_clock_gating +ffffffff81bd84b0 t nop_init_clock_gating +ffffffff81bd84e0 t ilk_compute_pipe_wm +ffffffff81bd8960 t ilk_compute_intermediate_wm +ffffffff81bd8c90 t ilk_initial_watermarks +ffffffff81bd8d00 t ilk_optimize_watermarks +ffffffff81bd8db0 t ilk_compute_wm_level +ffffffff81bd9320 t ilk_validate_wm_level +ffffffff81bd9460 t ilk_program_watermarks +ffffffff81bda220 t ilk_wm_merge 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intel_uncore_init_mmio +ffffffff81be6380 T intel_uncore_prune_engine_fw_domains +ffffffff81be6550 t fw_domain_fini +ffffffff81be6650 T intel_uncore_fini_mmio +ffffffff81be66f0 T __intel_wait_for_register_fw +ffffffff81be69a0 T __intel_wait_for_register +ffffffff81be6d20 T intel_uncore_forcewake_for_reg +ffffffff81be6e30 t check_for_unclaimed_mmio +ffffffff81be6f90 T intel_uncore_arm_unclaimed_mmio_detection +ffffffff81be70a0 t vgpu_write8 +ffffffff81be70e0 t vgpu_write16 +ffffffff81be7120 t vgpu_write32 +ffffffff81be7160 t vgpu_read8 +ffffffff81be71a0 t vgpu_read16 +ffffffff81be71e0 t vgpu_read32 +ffffffff81be7220 t vgpu_read64 +ffffffff81be7260 t gen5_write8 +ffffffff81be7360 t gen5_write16 +ffffffff81be7460 t gen5_write32 +ffffffff81be7560 t gen5_read8 +ffffffff81be7650 t gen5_read16 +ffffffff81be7740 t gen5_read32 +ffffffff81be7830 t gen5_read64 +ffffffff81be7920 t gen2_write8 +ffffffff81be7a00 t gen2_write16 +ffffffff81be7ae0 t gen2_write32 +ffffffff81be7bc0 t gen2_read8 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__intel_wakeref_put_last +ffffffff81beb100 t ____intel_wakeref_put_last +ffffffff81beb1d0 T __intel_wakeref_init +ffffffff81beb250 t __intel_wakeref_put_work +ffffffff81beb2c0 T intel_wakeref_wait_for_idle +ffffffff81beb3e0 T intel_wakeref_auto_init +ffffffff81beb460 t wakeref_auto_timeout +ffffffff81beb510 T intel_wakeref_auto +ffffffff81beb710 T intel_wakeref_auto_fini +ffffffff81beb7d0 t __delayed_work_tick +ffffffff81bec000 T intel_wopcm_init_early +ffffffff81bec080 T intel_wopcm_init +ffffffff81bed000 T vlv_iosf_sb_get +ffffffff81bed020 T vlv_iosf_sb_put +ffffffff81bed040 T vlv_punit_read +ffffffff81bed090 t vlv_sideband_rw +ffffffff81bed240 T vlv_punit_write +ffffffff81bed290 T vlv_bunit_read +ffffffff81bed2e0 T vlv_bunit_write +ffffffff81bed330 T vlv_nc_read +ffffffff81bed380 T vlv_iosf_sb_read +ffffffff81bed3d0 T vlv_iosf_sb_write +ffffffff81bed420 T vlv_cck_read +ffffffff81bed470 T vlv_cck_write +ffffffff81bed4c0 T vlv_ccu_read +ffffffff81bed510 T vlv_ccu_write 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T atombios_crtc_set_base +ffffffff81bf5340 t dce4_crtc_do_set_base +ffffffff81bf5e30 t avivo_crtc_do_set_base +ffffffff81bf66a0 T atombios_crtc_set_base_atomic +ffffffff81bf66f0 T radeon_atom_disp_eng_pll_init +ffffffff81bf67d0 t atombios_crtc_set_disp_eng_pll +ffffffff81bf68e0 t atombios_crtc_program_ss +ffffffff81bf6b90 T atombios_crtc_mode_set +ffffffff81bf75c0 T radeon_atombios_init_crtc +ffffffff81bf76b0 t radeon_bo_reserve +ffffffff81bf7820 t radeon_bo_unreserve +ffffffff81bf7900 t atombios_crtc_program_pll +ffffffff81bf7bb0 t atombios_crtc_prepare +ffffffff81bf7c60 t atombios_crtc_commit +ffffffff81bf7cd0 t atombios_crtc_mode_fixup +ffffffff81bf8a50 t atombios_crtc_disable +ffffffff81bf8cb0 t radeon_get_shared_nondp_ppll +ffffffff81bf9000 T radeon_atom_copy_swap +ffffffff81bf9020 T radeon_dp_aux_init +ffffffff81bf9110 t radeon_dp_aux_transfer_atom +ffffffff81bf92e0 T radeon_dp_getsinktype +ffffffff81bf9350 T radeon_dp_getdpcd +ffffffff81bf94c0 T radeon_dp_get_panel_mode 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radeon_atom_ext_disable +ffffffff81c00000 T radeon_atom_hw_i2c_xfer +ffffffff81c00160 t radeon_process_i2c_ch +ffffffff81c00330 T radeon_atom_hw_i2c_func +ffffffff81c01000 T btc_get_max_clock_from_voltage_dependency_table +ffffffff81c010d0 T btc_apply_voltage_dependency_rules +ffffffff81c01140 T btc_skip_blacklist_clocks +ffffffff81c01240 T btc_adjust_clock_combinations +ffffffff81c01350 T btc_apply_voltage_delta_rules +ffffffff81c01480 T btc_program_mgcg_hw_sequence +ffffffff81c01580 T btc_dpm_enabled +ffffffff81c01590 T btc_notify_uvd_to_smc +ffffffff81c01600 T btc_reset_to_default +ffffffff81c01650 T btc_read_arb_registers +ffffffff81c016e0 T btc_dpm_vblank_too_short +ffffffff81c01750 T btc_dpm_pre_set_power_state +ffffffff81c02630 T btc_dpm_set_power_state +ffffffff81c02a40 T btc_dpm_post_set_power_state +ffffffff81c02b60 T btc_dpm_enable +ffffffff81c03d70 T btc_dpm_disable +ffffffff81c042a0 T btc_dpm_setup_asic +ffffffff81c04380 T btc_dpm_init +ffffffff81c04780 T btc_dpm_fini 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+ffffffff81c0b390 T ci_dpm_disable +ffffffff81c0ba90 T ci_dpm_set_power_state +ffffffff81c0cc10 T ci_dpm_display_configuration_changed +ffffffff81c0cdb0 T ci_dpm_fini +ffffffff81c0ce60 T ci_dpm_init +ffffffff81c0e5d0 T ci_dpm_debugfs_print_current_performance_level +ffffffff81c0e710 T ci_dpm_print_power_state +ffffffff81c0e7d0 T ci_dpm_get_current_sclk +ffffffff81c0e8a0 T ci_dpm_get_current_mclk +ffffffff81c0e970 T ci_dpm_get_sclk +ffffffff81c0e9c0 T ci_dpm_get_mclk +ffffffff81c0ea10 t ci_populate_all_graphic_levels +ffffffff81c0ef90 t ci_populate_all_memory_levels +ffffffff81c0f8a0 t ci_do_program_memory_timing_parameters +ffffffff81c0fac0 t ci_populate_smc_voltage_table +ffffffff81c0fc20 t ci_enable_sclk_mclk_dpm +ffffffff81c10000 T ci_copy_bytes_to_smc +ffffffff81c10250 T ci_start_smc +ffffffff81c10290 T ci_reset_smc +ffffffff81c102d0 T ci_program_jump_on_start +ffffffff81c10300 T ci_stop_smc_clock +ffffffff81c10340 T ci_start_smc_clock +ffffffff81c10380 T ci_is_smc_running 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cik_init +ffffffff81c20200 t cik_init_microcode +ffffffff81c21210 t cik_pcie_gart_fini +ffffffff81c21310 T cik_fini +ffffffff81c216b0 T dce8_program_fmt +ffffffff81c217e0 T dce8_bandwidth_update +ffffffff81c22400 T cik_get_gpu_clock_counter +ffffffff81c224d0 T cik_set_uvd_clocks +ffffffff81c22550 t cik_set_uvd_clock +ffffffff81c226c0 T cik_set_vce_clocks +ffffffff81c22900 t cik_wait_for_rlc_serdes +ffffffff81c22ad0 t radeon_bo_reserve +ffffffff81c22c40 t radeon_bo_unreserve +ffffffff81c22d20 t cik_update_gfx_pg +ffffffff81c22ec0 t cik_compute_stop +ffffffff81c23030 t cik_cp_compute_fini +ffffffff81c231d0 t dce8_latency_watermark +ffffffff81c24000 T cik_sdma_get_rptr +ffffffff81c24070 T cik_sdma_get_wptr +ffffffff81c240c0 T cik_sdma_set_wptr +ffffffff81c24110 T cik_sdma_ring_ib_execute +ffffffff81c244f0 T cik_sdma_fence_ring_emit +ffffffff81c246d0 t cik_sdma_hdp_flush_ring_emit +ffffffff81c24910 T cik_sdma_semaphore_ring_emit +ffffffff81c24a30 T cik_sdma_enable +ffffffff81c24c10 T cik_sdma_resume +ffffffff81c250f0 T cik_sdma_fini +ffffffff81c25130 T cik_copy_dma +ffffffff81c25500 T cik_sdma_ring_test +ffffffff81c257a0 T cik_sdma_ib_test +ffffffff81c259f0 T cik_sdma_is_lockup +ffffffff81c25a70 T cik_sdma_vm_copy_pages +ffffffff81c25b80 T cik_sdma_vm_write_pages +ffffffff81c25cf0 T cik_sdma_vm_set_pages +ffffffff81c25e60 T cik_sdma_vm_pad_ib +ffffffff81c25eb0 T cik_dma_vm_flush +ffffffff81c27000 T cypress_enable_spread_spectrum +ffffffff81c27140 T cypress_start_dpm +ffffffff81c27190 T cypress_enable_sclk_control +ffffffff81c271f0 T cypress_enable_mclk_control +ffffffff81c27250 T cypress_notify_smc_display_change +ffffffff81c272a0 T cypress_program_response_times +ffffffff81c27370 T cypress_advertise_gen2_capability +ffffffff81c27440 T cypress_notify_link_speed_change_after_state_change +ffffffff81c27500 T cypress_notify_link_speed_change_before_state_change +ffffffff81c275c0 T cypress_get_strobe_mode_settings +ffffffff81c276c0 T cypress_get_mclk_frequency_ratio +ffffffff81c27770 T cypress_map_clkf_to_ibias +ffffffff81c27830 T cypress_convert_power_level_to_smc +ffffffff81c27bf0 t cypress_populate_mclk_value +ffffffff81c28000 T cypress_upload_sw_state +ffffffff81c28180 T cypress_upload_mc_reg_table +ffffffff81c28240 t cypress_convert_mc_reg_table_to_smc +ffffffff81c284e0 T cypress_calculate_burst_time +ffffffff81c28570 T cypress_program_memory_timing_parameters +ffffffff81c28720 T cypress_populate_smc_initial_state +ffffffff81c28ac0 T cypress_populate_smc_acpi_state +ffffffff81c28e50 T cypress_construct_voltage_tables +ffffffff81c28f00 t cypress_trim_voltage_table_to_fit_state_table +ffffffff81c290f0 T cypress_populate_smc_voltage_tables +ffffffff81c29240 T cypress_get_mvdd_configuration +ffffffff81c29300 T cypress_populate_mc_reg_table +ffffffff81c29560 T cypress_get_table_locations +ffffffff81c29640 T cypress_enable_display_gap +ffffffff81c296a0 T cypress_dpm_setup_asic +ffffffff81c29790 T cypress_dpm_enable +ffffffff81c2a270 t cypress_force_mc_use_s1 +ffffffff81c2a4f0 t cypress_gfx_clock_gating_enable +ffffffff81c2a800 t cypress_mg_clock_gating_enable +ffffffff81c2aa80 T cypress_dpm_disable +ffffffff81c2acb0 T cypress_dpm_set_power_state +ffffffff81c2af60 T cypress_dpm_display_configuration_changed +ffffffff81c2b040 T cypress_dpm_init +ffffffff81c2b2b0 T cypress_dpm_fini +ffffffff81c2b340 T cypress_dpm_vblank_too_short +ffffffff81c2b3b0 t cypress_wait_for_mc_sequencer +ffffffff81c2c000 T dce3_2_afmt_hdmi_write_speaker_allocation +ffffffff81c2c070 T dce3_2_afmt_dp_write_speaker_allocation +ffffffff81c2c0e0 T dce3_2_afmt_write_sad_regs +ffffffff81c2c200 T dce3_2_audio_set_dto +ffffffff81c2c340 T dce3_2_hdmi_update_acr +ffffffff81c2c6a0 T dce3_2_set_audio_packet +ffffffff81c2c830 T dce3_2_set_mute +ffffffff81c2d000 T dce6_endpoint_rreg +ffffffff81c2d0e0 T dce6_endpoint_wreg +ffffffff81c2d1d0 T dce6_audio_get_pin +ffffffff81c2d340 T dce6_afmt_select_pin +ffffffff81c2d3d0 T dce6_afmt_write_latency_fields +ffffffff81c2d490 T dce6_afmt_hdmi_write_speaker_allocation +ffffffff81c2d560 T dce6_afmt_dp_write_speaker_allocation +ffffffff81c2d630 T dce6_afmt_write_sad_regs +ffffffff81c2d770 T dce6_audio_enable +ffffffff81c2d7c0 T dce6_hdmi_audio_set_dto +ffffffff81c2d830 T dce6_dp_audio_set_dto +ffffffff81c2e000 T eg_cg_rreg +ffffffff81c2e080 t r100_mm_rreg +ffffffff81c2e0d0 T eg_cg_wreg +ffffffff81c2e140 T eg_pif_phy0_rreg +ffffffff81c2e1c0 T eg_pif_phy0_wreg +ffffffff81c2e220 T eg_pif_phy1_rreg +ffffffff81c2e2a0 T eg_pif_phy1_wreg +ffffffff81c2e300 T evergreen_get_allowed_info_register +ffffffff81c2e390 T evergreen_tiling_fields +ffffffff81c2e430 T sumo_set_uvd_clocks +ffffffff81c2e510 t sumo_set_uvd_clock +ffffffff81c2e6d0 T evergreen_set_uvd_clocks +ffffffff81c2ec70 T evergreen_fix_pci_max_read_req_size +ffffffff81c2ee20 T dce4_program_fmt +ffffffff81c2ef40 T dce4_wait_for_vblank +ffffffff81c2f1c0 T evergreen_page_flip +ffffffff81c2f350 T evergreen_page_flip_pending +ffffffff81c2f3c0 T evergreen_get_temp +ffffffff81c2f490 T sumo_get_temp +ffffffff81c2f4e0 T sumo_pm_init_profile +ffffffff81c2f620 T btc_pm_init_profile +ffffffff81c2f730 T evergreen_pm_misc +ffffffff81c2f8d0 T evergreen_pm_prepare +ffffffff81c2f9d0 T evergreen_pm_finish +ffffffff81c2fad0 T evergreen_hpd_sense +ffffffff81c2fb40 T evergreen_hpd_set_polarity +ffffffff81c2fc80 T evergreen_hpd_init +ffffffff81c2fd50 T evergreen_hpd_fini +ffffffff81c2fdf0 T evergreen_get_number_of_dram_channels +ffffffff81c2fe40 T evergreen_bandwidth_update +ffffffff81c30000 t evergreen_line_buffer_adjust +ffffffff81c30200 t evergreen_program_watermarks +ffffffff81c30cb0 T evergreen_mc_wait_for_idle +ffffffff81c30d50 T evergreen_pcie_gart_tlb_flush +ffffffff81c30e30 T evergreen_mc_stop +ffffffff81c31920 T evergreen_mc_resume +ffffffff81c32030 T evergreen_mc_program +ffffffff81c32440 T evergreen_ring_ib_execute +ffffffff81c328e0 T evergreen_mc_init +ffffffff81c32a20 T evergreen_print_gpu_status_regs +ffffffff81c32a50 T evergreen_is_display_hung +ffffffff81c32c60 T evergreen_gpu_check_soft_reset +ffffffff81c32dc0 T evergreen_gpu_pci_config_reset +ffffffff81c32f40 T evergreen_asic_reset +ffffffff81c33260 T evergreen_gfx_is_lockup +ffffffff81c332d0 T sumo_rlc_fini +ffffffff81c33480 t radeon_bo_reserve +ffffffff81c335f0 t radeon_bo_unreserve +ffffffff81c336d0 T sumo_rlc_init +ffffffff81c33ea0 T evergreen_rlc_resume +ffffffff81c34210 T evergreen_get_vblank_counter +ffffffff81c34280 T evergreen_disable_interrupt_state +ffffffff81c34550 T evergreen_irq_set +ffffffff81c34b10 T evergreen_irq_suspend +ffffffff81c34b60 T evergreen_irq_process +ffffffff81c35630 t evergreen_irq_ack +ffffffff81c35d30 T evergreen_resume +ffffffff81c35e10 t evergreen_init_golden_registers +ffffffff81c36020 t evergreen_startup +ffffffff81c38680 T evergreen_suspend +ffffffff81c38820 T evergreen_init +ffffffff81c38d20 T evergreen_fini +ffffffff81c38f10 T evergreen_pcie_gen2_enable +ffffffff81c39140 T evergreen_program_aspm +ffffffff81c397e0 t evergreen_latency_watermark +ffffffff81c3a000 T evergreen_cs_parse +ffffffff81c3c870 T evergreen_dma_cs_parse +ffffffff81c3da80 T evergreen_ib_parse +ffffffff81c3df30 T evergreen_dma_ib_parse +ffffffff81c3e0f0 t evergreen_cs_track_check +ffffffff81c3f0d0 t evergreen_cs_handle_reg +ffffffff81c40fe0 t evergreen_surface_value_conv_check +ffffffff81c412b0 t evergreen_surface_check +ffffffff81c41740 t evergreen_cs_track_validate_htile +ffffffff81c419e0 t evergreen_vm_reg_valid +ffffffff81c42000 T evergreen_dma_fence_ring_emit +ffffffff81c422c0 T evergreen_dma_ring_ib_execute +ffffffff81c42600 T evergreen_copy_dma +ffffffff81c429b0 T evergreen_dma_is_lockup +ffffffff81c43000 T dce4_audio_enable +ffffffff81c43080 T evergreen_hdmi_update_acr +ffffffff81c432a0 T dce4_afmt_write_latency_fields +ffffffff81c43310 T dce4_afmt_hdmi_write_speaker_allocation +ffffffff81c43380 T dce4_afmt_dp_write_speaker_allocation +ffffffff81c433f0 T evergreen_hdmi_write_sad_regs +ffffffff81c43510 T evergreen_set_avi_packet +ffffffff81c436b0 T dce4_hdmi_audio_set_dto +ffffffff81c43790 T dce4_dp_audio_set_dto +ffffffff81c43880 T dce4_set_vbi_packet +ffffffff81c438f0 T dce4_hdmi_set_color_depth +ffffffff81c43a40 T dce4_set_audio_packet +ffffffff81c43c50 T dce4_set_mute +ffffffff81c43d60 T evergreen_hdmi_enable +ffffffff81c44090 T evergreen_dp_enable +ffffffff81c45000 T kv_dpm_enable_bapm +ffffffff81c45070 T kv_dpm_enable +ffffffff81c465c0 t kv_enable_didt +ffffffff81c46860 T kv_dpm_late_enable +ffffffff81c46a50 T kv_dpm_powergate_uvd +ffffffff81c46bc0 T kv_dpm_disable +ffffffff81c46f30 T kv_dpm_force_performance_level +ffffffff81c470c0 t kv_force_dpm_lowest +ffffffff81c47190 T kv_dpm_pre_set_power_state +ffffffff81c47720 T kv_dpm_set_power_state +ffffffff81c47ed0 t kv_set_valid_clock_range +ffffffff81c48090 t kv_calculate_ds_divider +ffffffff81c48200 t kv_calculate_nbps_level_settings +ffffffff81c48390 t kv_update_vce_dpm +ffffffff81c48570 T kv_dpm_post_set_power_state +ffffffff81c48610 T kv_dpm_setup_asic +ffffffff81c48670 T kv_dpm_init +ffffffff81c48f10 T kv_dpm_debugfs_print_current_performance_level +ffffffff81c48f80 T kv_dpm_get_current_sclk +ffffffff81c48ff0 T kv_dpm_get_current_mclk +ffffffff81c49020 T kv_dpm_print_power_state +ffffffff81c490c0 T kv_dpm_fini +ffffffff81c49160 T kv_dpm_display_configuration_changed +ffffffff81c49190 T kv_dpm_get_sclk +ffffffff81c491e0 T kv_dpm_get_mclk +ffffffff81c4a000 T kv_notify_message_to_smu +ffffffff81c4a0c0 T kv_dpm_get_enable_mask +ffffffff81c4a1a0 T kv_send_msg_to_smc_with_parameter +ffffffff81c4a270 T kv_read_smc_sram_dword +ffffffff81c4a300 T kv_smc_dpm_enable +ffffffff81c4a430 T kv_smc_bapm_enable +ffffffff81c4a560 T kv_copy_bytes_to_smc +ffffffff81c4b000 T tn_smc_rreg +ffffffff81c4b080 T tn_smc_wreg +ffffffff81c4b0f0 T ni_mc_load_microcode +ffffffff81c4b2e0 T ni_init_microcode +ffffffff81c4b820 T cayman_get_allowed_info_register +ffffffff81c4b8b0 T tn_get_temp +ffffffff81c4b940 T cayman_pcie_gart_tlb_flush +ffffffff81c4b990 T cayman_cp_int_cntl_setup +ffffffff81c4b9e0 T cayman_fence_ring_emit +ffffffff81c4bd90 T cayman_ring_ib_execute +ffffffff81c4c210 T cayman_gfx_get_rptr +ffffffff81c4c2a0 T cayman_gfx_get_wptr +ffffffff81c4c310 T cayman_gfx_set_wptr +ffffffff81c4c390 T cayman_gpu_check_soft_reset +ffffffff81c4c510 T cayman_asic_reset +ffffffff81c4c810 T cayman_gfx_is_lockup +ffffffff81c4c880 T cayman_resume +ffffffff81c4c910 t ni_init_golden_registers +ffffffff81c4c9f0 t cayman_startup +ffffffff81c4f0f0 T cayman_suspend +ffffffff81c4f2e0 T cayman_init +ffffffff81c4f8d0 T cayman_fini +ffffffff81c4fb50 T cayman_vm_init +ffffffff81c4fbb0 T cayman_vm_fini +ffffffff81c4fbe0 T cayman_vm_decode_fault +ffffffff81c4fc70 T cayman_vm_flush +ffffffff81c500f0 T tn_set_vce_clocks +ffffffff81c51000 T cayman_dma_get_rptr +ffffffff81c51070 T cayman_dma_get_wptr +ffffffff81c510c0 T cayman_dma_set_wptr +ffffffff81c51110 T cayman_dma_ring_ib_execute +ffffffff81c514a0 T cayman_dma_stop +ffffffff81c51550 T cayman_dma_resume +ffffffff81c517a0 T cayman_dma_fini +ffffffff81c51860 T cayman_dma_is_lockup +ffffffff81c518e0 T cayman_dma_vm_copy_pages +ffffffff81c519d0 T cayman_dma_vm_write_pages +ffffffff81c51b30 T cayman_dma_vm_set_pages +ffffffff81c51c90 T cayman_dma_vm_pad_ib +ffffffff81c51ce0 T cayman_dma_vm_flush +ffffffff81c53000 T ni_get_pi +ffffffff81c53030 T ni_get_ps +ffffffff81c53060 T ni_dpm_vblank_too_short +ffffffff81c530d0 T ni_dpm_force_performance_level +ffffffff81c53220 T ni_copy_and_switch_arb_sets +ffffffff81c53500 T ni_set_uvd_clock_before_set_eng_clock +ffffffff81c53580 T ni_set_uvd_clock_after_set_eng_clock +ffffffff81c53600 T ni_dpm_setup_asic +ffffffff81c53810 T ni_update_current_ps +ffffffff81c538d0 T ni_update_requested_ps +ffffffff81c53990 T ni_dpm_enable +ffffffff81c56bd0 t ni_populate_smc_tdp_limits +ffffffff81c56d90 T ni_dpm_disable +ffffffff81c57150 T ni_dpm_pre_set_power_state +ffffffff81c57730 T ni_dpm_set_power_state +ffffffff81c58850 T ni_dpm_post_set_power_state +ffffffff81c58920 T ni_dpm_init +ffffffff81c592f0 T ni_dpm_fini +ffffffff81c593a0 T ni_dpm_print_power_state +ffffffff81c59470 T ni_dpm_debugfs_print_current_performance_level +ffffffff81c594b0 T ni_dpm_get_current_sclk +ffffffff81c59520 T ni_dpm_get_current_mclk +ffffffff81c59590 T ni_dpm_get_sclk +ffffffff81c595f0 T ni_dpm_get_mclk +ffffffff81c59650 t ni_do_program_memory_timing_parameters +ffffffff81c59780 t ni_calculate_sclk_params +ffffffff81c599a0 t ni_calculate_power_boost_limit +ffffffff81c59b50 t ni_populate_mclk_value +ffffffff81c5a000 T r100_wait_for_vblank +ffffffff81c5a1a0 T r100_page_flip +ffffffff81c5a450 T r100_page_flip_pending +ffffffff81c5a500 T r100_pm_get_dynpm_state +ffffffff81c5a720 T r100_pm_init_profile +ffffffff81c5a800 T r100_pm_misc +ffffffff81c5ac40 T r100_pm_prepare +ffffffff81c5ad00 T r100_pm_finish +ffffffff81c5adc0 T r100_gui_idle +ffffffff81c5ae00 T r100_hpd_sense +ffffffff81c5ae60 T r100_hpd_set_polarity +ffffffff81c5af20 T r100_hpd_init +ffffffff81c5afc0 T r100_hpd_fini +ffffffff81c5b020 T r100_pci_gart_tlb_flush +ffffffff81c5b050 T r100_pci_gart_init +ffffffff81c5b120 T r100_pci_gart_get_page_entry +ffffffff81c5b150 T r100_pci_gart_set_page +ffffffff81c5b190 T r100_pci_gart_enable +ffffffff81c5b280 T r100_pci_gart_disable +ffffffff81c5b300 T r100_pci_gart_fini +ffffffff81c5b380 T r100_irq_set +ffffffff81c5b460 T r100_irq_disable +ffffffff81c5b4d0 T r100_irq_process +ffffffff81c5b7b0 T r100_get_vblank_counter +ffffffff81c5b800 T r100_fence_ring_emit +ffffffff81c5bc70 T r100_semaphore_ring_emit +ffffffff81c5bca0 T r100_copy_blit +ffffffff81c5c340 T r100_ring_start +ffffffff81c5c430 T r100_gfx_get_rptr +ffffffff81c5c490 T r100_gfx_get_wptr +ffffffff81c5c4d0 T r100_gfx_set_wptr +ffffffff81c5c510 T r100_cp_init +ffffffff81c5ca40 T r100_debugfs_cp_init +ffffffff81c5ca70 T r100_cp_fini +ffffffff81c5cb10 T r100_cp_disable +ffffffff81c5cc50 T r100_gui_wait_for_idle +ffffffff81c5cd40 T r100_reloc_pitch_offset +ffffffff81c5ce70 T r100_packet3_load_vbpntr +ffffffff81c5d110 T r100_cs_parse_packet0 +ffffffff81c5d220 T r100_cs_packet_parse_vline +ffffffff81c5d410 T r100_cs_track_check_pkt3_indx_buffer +ffffffff81c5d490 T r100_cs_parse +ffffffff81c5e950 T r100_cs_track_clear +ffffffff81c5ece0 T r100_cs_track_check +ffffffff81c5f6c0 T r100_mc_wait_for_idle +ffffffff81c5f760 T r100_gpu_is_lockup +ffffffff81c5f7c0 T r100_enable_bm +ffffffff81c5f810 T r100_bm_disable +ffffffff81c5f8c0 T r100_asic_reset +ffffffff81c5fbf0 T r100_mc_stop +ffffffff81c5fdb0 T r100_mc_resume +ffffffff81c5fe70 T r100_set_common_regs +ffffffff81c60020 T r100_vram_init_sizes +ffffffff81c60210 T r100_vga_set_state +ffffffff81c60270 T r100_pll_errata_after_index +ffffffff81c602b0 T r100_pll_rreg +ffffffff81c603e0 T r100_pll_wreg +ffffffff81c604f0 T r100_debugfs_rbbm_init +ffffffff81c60520 T r100_debugfs_mc_info_init +ffffffff81c60550 T r100_set_surface_reg +ffffffff81c60760 T r100_clear_surface_reg +ffffffff81c60810 T r100_bandwidth_update +ffffffff81c612c0 T r100_ring_test +ffffffff81c61580 T r100_ring_ib_execute +ffffffff81c617e0 T r100_ib_test +ffffffff81c61b20 T r100_vga_render_disable +ffffffff81c61b80 T r100_resume +ffffffff81c61d80 t r100_startup +ffffffff81c622b0 T r100_suspend +ffffffff81c62390 T r100_fini +ffffffff81c624a0 T r100_restore_sanity +ffffffff81c62540 T r100_init +ffffffff81c62ab0 T r100_mm_rreg_slow +ffffffff81c62b30 T r100_mm_wreg_slow +ffffffff81c62b90 T r100_io_rreg +ffffffff81c62c30 T r100_io_wreg +ffffffff81c62ca0 t r100_cs_track_texture_print +ffffffff81c63000 T r200_copy_dma +ffffffff81c63470 T r200_packet0_check +ffffffff81c64490 T r200_set_safe_registers +ffffffff81c65000 T rv370_pcie_rreg +ffffffff81c65080 T rv370_pcie_wreg +ffffffff81c650f0 T rv370_pcie_gart_tlb_flush +ffffffff81c652f0 T rv370_pcie_gart_get_page_entry +ffffffff81c65350 T rv370_pcie_gart_set_page +ffffffff81c65390 T rv370_pcie_gart_init +ffffffff81c65460 T rv370_pcie_gart_enable +ffffffff81c657c0 T rv370_pcie_gart_disable +ffffffff81c65940 T rv370_pcie_gart_fini +ffffffff81c65970 T r300_fence_ring_emit +ffffffff81c65f00 T r300_ring_start +ffffffff81c66910 T r300_mc_wait_for_idle +ffffffff81c669b0 T r300_asic_reset +ffffffff81c66bd0 T r300_mc_init +ffffffff81c66c80 T rv370_set_pcie_lanes +ffffffff81c66e40 T rv370_get_pcie_lanes +ffffffff81c66ef0 T r300_cs_parse +ffffffff81c67260 t r300_packet0_check +ffffffff81c680c0 T r300_set_reg_safe +ffffffff81c68100 T r300_mc_program +ffffffff81c68280 T r300_clock_startup +ffffffff81c68310 T r300_resume +ffffffff81c684e0 t r300_startup +ffffffff81c68840 T r300_suspend +ffffffff81c688c0 T r300_fini +ffffffff81c689a0 T r300_init +ffffffff81c69000 T r420_pm_init_profile +ffffffff81c690f0 T r420_pipes_init +ffffffff81c692d0 T r420_mc_rreg +ffffffff81c69350 T r420_mc_wreg +ffffffff81c693c0 T r420_resume +ffffffff81c69590 t r420_startup +ffffffff81c69920 T r420_suspend +ffffffff81c69ac0 T r420_fini +ffffffff81c69ba0 T r420_init +ffffffff81c69e20 T r420_debugfs_pipes_info_init +ffffffff81c6a000 T r520_mc_wait_for_idle +ffffffff81c6a0a0 T r520_resume +ffffffff81c6a190 t r520_startup +ffffffff81c6a580 T r520_init +ffffffff81c6b000 T r600_rcu_rreg +ffffffff81c6b080 T r600_rcu_wreg +ffffffff81c6b0f0 T r600_uvd_ctx_rreg +ffffffff81c6b170 T r600_uvd_ctx_wreg +ffffffff81c6b1e0 T r600_get_allowed_info_register +ffffffff81c6b260 T r600_get_xclk +ffffffff81c6b290 T r600_set_uvd_clocks +ffffffff81c6b7f0 T dce3_program_fmt +ffffffff81c6b910 T rv6xx_get_temp +ffffffff81c6b960 T r600_pm_get_dynpm_state +ffffffff81c6bd60 T rs780_pm_init_profile +ffffffff81c6be70 T r600_pm_init_profile +ffffffff81c6c110 T r600_pm_misc +ffffffff81c6c1f0 T r600_gui_idle +ffffffff81c6c230 T r600_hpd_sense +ffffffff81c6c350 T r600_hpd_set_polarity +ffffffff81c6c5c0 T r600_hpd_init +ffffffff81c6c7d0 T r600_hpd_fini +ffffffff81c6c980 T r600_pcie_gart_tlb_flush +ffffffff81c6cac0 T r600_pcie_gart_init +ffffffff81c6cb60 T r600_mc_wait_for_idle +ffffffff81c6cc00 T rs780_mc_rreg +ffffffff81c6cca0 T rs780_mc_wreg +ffffffff81c6cd30 T r600_vram_scratch_init +ffffffff81c6ce30 t radeon_bo_reserve +ffffffff81c6cfa0 t radeon_bo_unreserve +ffffffff81c6d080 T r600_vram_scratch_fini +ffffffff81c6d100 T r600_set_bios_scratch_engine_hung +ffffffff81c6d150 T r600_gpu_check_soft_reset +ffffffff81c6d4d0 T r600_asic_reset +ffffffff81c6d860 t r600_gpu_pci_config_reset +ffffffff81c6da70 T r600_gfx_is_lockup +ffffffff81c6dae0 T r6xx_remap_render_backend +ffffffff81c6dcd0 T r600_count_pipe_bits +ffffffff81c6dd40 T r600_pciep_rreg +ffffffff81c6ddc0 T r600_pciep_wreg +ffffffff81c6de30 T r600_cp_stop +ffffffff81c6deb0 T r600_init_microcode +ffffffff81c6e380 T r600_gfx_get_rptr +ffffffff81c6e3e0 T r600_gfx_get_wptr +ffffffff81c6e420 T r600_gfx_set_wptr +ffffffff81c6e460 T r600_cp_start +ffffffff81c6e7e0 T r600_cp_resume +ffffffff81c6eb40 T r600_ring_init +ffffffff81c6ebe0 T r600_cp_fini +ffffffff81c6ec70 T r600_scratch_init +ffffffff81c6ece0 T r600_ring_test +ffffffff81c6ef90 T r600_fence_ring_emit +ffffffff81c6f850 T r600_semaphore_ring_emit +ffffffff81c6fa40 T r600_copy_cpdma +ffffffff81c70000 T r600_set_surface_reg +ffffffff81c70030 T r600_clear_surface_reg +ffffffff81c70060 T r600_vga_set_state +ffffffff81c700c0 T r600_resume +ffffffff81c70150 t r600_startup +ffffffff81c72150 T r600_suspend +ffffffff81c722c0 T r600_irq_suspend +ffffffff81c72380 t r600_pcie_gart_disable +ffffffff81c72580 T r600_init +ffffffff81c72d50 T r600_ih_ring_init +ffffffff81c72dc0 T r600_irq_fini +ffffffff81c72f00 T r600_fini +ffffffff81c73090 T r600_ring_ib_execute +ffffffff81c73510 T r600_ib_test +ffffffff81c737c0 T r600_ih_ring_alloc +ffffffff81c738e0 T r600_ih_ring_fini +ffffffff81c73970 T r600_rlc_stop +ffffffff81c73b00 T r600_disable_interrupts +ffffffff81c73bb0 T r600_irq_init +ffffffff81c74020 t r600_disable_interrupt_state +ffffffff81c74310 T r600_irq_disable +ffffffff81c743d0 T r600_irq_set +ffffffff81c74b50 t r600_irq_ack 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+ffffffff81c7b6d0 T r600_dma_fence_ring_emit +ffffffff81c7b8c0 T r600_dma_semaphore_ring_emit +ffffffff81c7b9e0 T r600_dma_ib_test +ffffffff81c7bbf0 T r600_dma_ring_ib_execute +ffffffff81c7bf30 T r600_copy_dma +ffffffff81c7d000 T r600_dpm_print_class_info +ffffffff81c7d2b0 T r600_dpm_print_cap_info +ffffffff81c7d340 T r600_dpm_print_ps_status +ffffffff81c7d3d0 T r600_dpm_get_vblank_time +ffffffff81c7d490 T r600_dpm_get_vrefresh +ffffffff81c7d520 T r600_calculate_u_and_p +ffffffff81c7d5a0 T r600_calculate_at +ffffffff81c7d650 T r600_gfx_clockgating_enable +ffffffff81c7d760 T r600_dynamicpm_enable +ffffffff81c7d7c0 T r600_enable_thermal_protection +ffffffff81c7d820 T r600_enable_acpi_pm +ffffffff81c7d870 T r600_enable_dynamic_pcie_gen2 +ffffffff81c7d8d0 T r600_dynamicpm_enabled +ffffffff81c7d910 T r600_enable_sclk_control +ffffffff81c7d970 T r600_enable_mclk_control +ffffffff81c7d9d0 T r600_enable_spll_bypass +ffffffff81c7da30 T r600_wait_for_spll_change +ffffffff81c7dab0 T r600_set_bsp +ffffffff81c7daf0 T r600_set_at +ffffffff81c7db50 T r600_set_tc +ffffffff81c7dbb0 T r600_select_td +ffffffff81c7dc70 T r600_set_vrc +ffffffff81c7dcb0 T r600_set_tpu +ffffffff81c7dd10 T r600_set_tpc +ffffffff81c7dd70 T r600_set_sstu +ffffffff81c7ddd0 T r600_set_sst +ffffffff81c7de20 T r600_set_git +ffffffff81c7de70 T r600_set_fctu +ffffffff81c7ded0 T r600_set_fct +ffffffff81c7df20 T r600_set_ctxcgtt3d_rphc +ffffffff81c7df80 T r600_set_ctxcgtt3d_rsdc +ffffffff81c7dfe0 T r600_set_vddc3d_oorsu +ffffffff81c7e040 T r600_set_vddc3d_oorphc +ffffffff81c7e0a0 T r600_set_vddc3d_oorsdc +ffffffff81c7e100 T r600_set_mpll_lock_time +ffffffff81c7e150 T r600_set_mpll_reset_time +ffffffff81c7e1a0 T r600_engine_clock_entry_enable +ffffffff81c7e2a0 T r600_engine_clock_entry_enable_pulse_skipping +ffffffff81c7e3a0 T r600_engine_clock_entry_enable_post_divider +ffffffff81c7e4a0 T r600_engine_clock_entry_set_post_divider +ffffffff81c7e560 T r600_engine_clock_entry_set_reference_divider +ffffffff81c7e620 T r600_engine_clock_entry_set_feedback_divider +ffffffff81c7e6e0 T r600_engine_clock_entry_set_step_time +ffffffff81c7e7a0 T r600_vid_rt_set_ssu +ffffffff81c7e800 T r600_vid_rt_set_vru +ffffffff81c7e860 T r600_vid_rt_set_vrt +ffffffff81c7e8c0 T r600_voltage_control_enable_pins +ffffffff81c7e910 T r600_voltage_control_program_voltages +ffffffff81c7e9a0 T r600_voltage_control_deactivate_static_control +ffffffff81c7ea30 T r600_power_level_enable +ffffffff81c7eaa0 T r600_power_level_set_voltage_index +ffffffff81c7eb10 T r600_power_level_set_mem_clock_index +ffffffff81c7eb70 T r600_power_level_set_eng_clock_index +ffffffff81c7ebe0 T r600_power_level_set_watermark_id +ffffffff81c7ec50 T r600_power_level_set_pcie_gen2 +ffffffff81c7ecb0 T r600_power_level_get_current_index +ffffffff81c7ecf0 T r600_power_level_get_target_index +ffffffff81c7ed30 T r600_power_level_set_enter_index +ffffffff81c7ed90 T r600_wait_for_power_level_unequal +ffffffff81c7ee80 T r600_wait_for_power_level +ffffffff81c7ef70 T r600_start_dpm +ffffffff81c7f250 T r600_stop_dpm +ffffffff81c7f2a0 T r600_dpm_pre_set_power_state +ffffffff81c7f2d0 T r600_dpm_post_set_power_state +ffffffff81c7f300 T r600_is_uvd_state +ffffffff81c7f340 T r600_is_internal_thermal_sensor +ffffffff81c7f380 T r600_dpm_late_enable +ffffffff81c7f490 T r600_get_platform_caps +ffffffff81c7f530 T r600_parse_extended_power_table +ffffffff81c804a0 T r600_free_extended_power_table +ffffffff81c805a0 T r600_get_pcie_gen_support +ffffffff81c805f0 T r600_get_pcie_lane_support +ffffffff81c80650 T r600_encode_pci_lane_width +ffffffff81c81000 T r600_audio_update_hdmi +ffffffff81c81180 t r600_audio_status +ffffffff81c812a0 T r600_hdmi_buffer_status_changed +ffffffff81c81340 T r600_hdmi_update_audio_settings +ffffffff81c81710 T r600_audio_enable +ffffffff81c81790 T r600_audio_get_pin +ffffffff81c817c0 T r600_hdmi_update_acr +ffffffff81c81b60 T r600_set_avi_packet +ffffffff81c81d60 T r600_hdmi_audio_workaround +ffffffff81c81e30 T r600_hdmi_audio_set_dto +ffffffff81c81ef0 T r600_set_vbi_packet +ffffffff81c81fb0 T r600_set_audio_packet +ffffffff81c82280 T r600_set_mute +ffffffff81c82390 T r600_hdmi_enable +ffffffff81c83000 T radeon_acpi_is_pcie_performance_request_supported +ffffffff81c83050 T radeon_acpi_pcie_notify_device_ready +ffffffff81c83180 T radeon_acpi_pcie_performance_request +ffffffff81c833a0 T radeon_acpi_init +ffffffff81c83af0 t radeon_acpi_event +ffffffff81c83e40 T radeon_acpi_fini +ffffffff81c84000 T radeon_agp_head_init +ffffffff81c84050 T radeon_agp_init +ffffffff81c840a0 T radeon_agp_resume +ffffffff81c84130 T radeon_agp_fini +ffffffff81c84180 T radeon_agp_suspend +ffffffff81c85000 T radeon_agp_disable +ffffffff81c85120 T radeon_asic_init +ffffffff81c859b0 t radeon_invalid_rreg +ffffffff81c859f0 t radeon_invalid_wreg +ffffffff81c85a30 t radeon_invalid_get_allowed_info_register +ffffffff81c86000 T radeon_atombios_i2c_init +ffffffff81c863b0 T radeon_atombios_lookup_gpio +ffffffff81c864b0 T radeon_get_atom_connector_info_from_object_table +ffffffff81c86e10 t radeon_lookup_i2c_gpio +ffffffff81c87110 t radeon_atom_apply_quirks +ffffffff81c87540 T radeon_get_atom_connector_info_from_supported_devices_table +ffffffff81c87a40 T radeon_atom_get_clock_info +ffffffff81c87dc0 T radeon_atombios_sideport_present +ffffffff81c87e70 T radeon_atombios_get_tmds_info +ffffffff81c87fb0 T radeon_atombios_get_ppll_ss_info +ffffffff81c880d0 T radeon_atombios_get_asic_ss_info +ffffffff81c88440 T radeon_atombios_get_lvds_info +ffffffff81c887b0 T radeon_atombios_get_primary_dac_info +ffffffff81c88860 T radeon_atom_get_tv_timings +ffffffff81c88ab0 T radeon_atombios_get_tv_info +ffffffff81c88b60 T radeon_atombios_get_tv_dac_info +ffffffff81c88c60 T radeon_atombios_get_default_voltages +ffffffff81c88d20 T radeon_atombios_get_power_modes +ffffffff81c89df0 T radeon_atom_get_clock_dividers +ffffffff81c8a0f0 T radeon_atom_get_memory_pll_dividers +ffffffff81c8a230 T radeon_atom_set_clock_gating +ffffffff81c8a280 T radeon_atom_get_engine_clock +ffffffff81c8a2d0 T radeon_atom_get_memory_clock +ffffffff81c8a320 T radeon_atom_set_engine_clock +ffffffff81c8a370 T radeon_atom_set_memory_clock +ffffffff81c8a3d0 T radeon_atom_set_engine_dram_timings +ffffffff81c8a440 T radeon_atom_update_memory_dll +ffffffff81c8a490 T radeon_atom_set_ac_timing +ffffffff81c8a4e0 T radeon_atom_set_voltage +ffffffff81c8a5b0 T radeon_atom_get_max_vddc +ffffffff81c8a690 T radeon_atom_get_leakage_vddc_based_on_leakage_idx +ffffffff81c8a760 T radeon_atom_get_leakage_id_from_vbios +ffffffff81c8a820 T radeon_atom_get_leakage_vddc_based_on_leakage_params +ffffffff81c8aa30 T radeon_atom_get_voltage_evv +ffffffff81c8aae0 T radeon_atom_get_voltage_gpio_settings +ffffffff81c8abe0 T radeon_atom_is_voltage_gpio +ffffffff81c8ad70 T radeon_atom_get_svi2_info +ffffffff81c8ae60 T radeon_atom_get_max_voltage +ffffffff81c8b000 T radeon_atom_get_min_voltage +ffffffff81c8b140 T radeon_atom_get_voltage_step +ffffffff81c8b240 T radeon_atom_round_to_true_voltage +ffffffff81c8b3b0 T radeon_atom_get_voltage_table +ffffffff81c8b620 T radeon_atom_get_memory_info +ffffffff81c8b7d0 T radeon_atom_get_mclk_range_table +ffffffff81c8ba20 T radeon_atom_init_mc_reg_table +ffffffff81c8bca0 T radeon_atom_initialize_bios_scratch_regs +ffffffff81c8bd70 T radeon_save_bios_scratch_regs +ffffffff81c8be50 T radeon_restore_bios_scratch_regs +ffffffff81c8bf30 T radeon_atom_output_lock +ffffffff81c8bfc0 T radeon_atombios_connected_scratch_regs +ffffffff81c8c740 T radeon_atombios_encoder_crtc_scratch_regs +ffffffff81c8c880 T radeon_atombios_encoder_dpms_scratch_regs +ffffffff81c8caa0 t radeon_atombios_parse_misc_flags_1_3 +ffffffff81c8cc90 t radeon_atombios_add_pplib_thermal_controller +ffffffff81c8d090 t radeon_atombios_parse_pplib_clock_info +ffffffff81c8d3a0 t radeon_atombios_parse_pplib_non_clock_info +ffffffff81c8e000 T radeon_audio_init +ffffffff81c8e290 T radeon_audio_endpoint_rreg +ffffffff81c8e2d0 T radeon_audio_endpoint_wreg +ffffffff81c8e310 T radeon_audio_get_pin +ffffffff81c8e360 T radeon_audio_detect +ffffffff81c8e690 T radeon_audio_fini +ffffffff81c8e7d0 T radeon_audio_mode_set +ffffffff81c8e820 T radeon_audio_dpms +ffffffff81c8e870 T radeon_audio_decode_dfs_div +ffffffff81c8e8d0 t radeon_audio_hdmi_mode_set +ffffffff81c8f000 t radeon_audio_write_speaker_allocation +ffffffff81c8f0b0 t radeon_audio_write_sad_regs +ffffffff81c8f180 t radeon_audio_set_avi_packet +ffffffff81c8f2c0 t radeon_audio_dp_mode_set +ffffffff81c8f440 t radeon_audio_rreg +ffffffff81c8f490 t radeon_audio_wreg +ffffffff81c90000 T radeon_benchmark +ffffffff81c90940 t radeon_benchmark_move +ffffffff81c90e00 t radeon_bo_reserve +ffffffff81c90f70 t radeon_bo_unreserve +ffffffff81c92000 T radeon_get_bios +ffffffff81c93000 t igp_read_bios_from_vram +ffffffff81c93110 t radeon_read_bios +ffffffff81c94000 T radeon_legacy_get_engine_clock +ffffffff81c940d0 T radeon_legacy_get_memory_clock +ffffffff81c941a0 T radeon_get_clock_info +ffffffff81c94730 T radeon_legacy_set_engine_clock +ffffffff81c94a80 T radeon_legacy_set_clock_gating +ffffffff81c96000 T radeon_combios_check_hardcoded_edid +ffffffff81c96100 T radeon_bios_get_hardcoded_edid +ffffffff81c96180 T radeon_combios_i2c_init +ffffffff81c96940 t combios_setup_i2c_bus +ffffffff81c96c40 T radeon_combios_get_clock_info +ffffffff81c96e30 T radeon_combios_sideport_present +ffffffff81c96eb0 T radeon_combios_get_primary_dac_info +ffffffff81c96ff0 T radeon_combios_get_tv_info +ffffffff81c970f0 T radeon_combios_get_tv_dac_info +ffffffff81c973a0 T radeon_combios_get_lvds_info +ffffffff81c979f0 T radeon_legacy_get_tmds_info_from_table +ffffffff81c97ac0 T radeon_legacy_get_tmds_info_from_combios +ffffffff81c97cd0 T radeon_legacy_get_ext_tmds_info_from_table +ffffffff81c97f10 T radeon_legacy_get_ext_tmds_info_from_combios +ffffffff81c982a0 T radeon_get_legacy_connector_info_from_table +ffffffff81c9a660 T radeon_get_legacy_connector_info_from_bios +ffffffff81c9b3f0 T radeon_combios_get_power_modes +ffffffff81c9bca0 T radeon_external_tmds_setup +ffffffff81c9bd70 T radeon_combios_external_tmds_setup +ffffffff81c9c330 T radeon_combios_asic_init +ffffffff81c9c950 t combios_parse_mmio_table +ffffffff81c9cb70 t combios_parse_pll_table +ffffffff81c9ce40 T radeon_combios_initialize_bios_scratch_regs +ffffffff81c9ced0 T radeon_combios_output_lock +ffffffff81c9cf30 T radeon_combios_connected_scratch_regs +ffffffff81c9d290 T radeon_combios_encoder_crtc_scratch_regs +ffffffff81c9d370 T radeon_combios_encoder_dpms_scratch_regs +ffffffff81c9e000 T radeon_connector_hotplug +ffffffff81c9e100 T radeon_get_monitor_bpc +ffffffff81c9e530 T radeon_connector_edid +ffffffff81c9e5e0 T radeon_connector_encoder_get_dp_bridge_encoder_id +ffffffff81c9e660 T radeon_connector_is_dp12_capable +ffffffff81c9e700 T radeon_add_atom_connector +ffffffff81c9f550 T radeon_add_legacy_connector +ffffffff81c9fa90 t radeon_dp_detect +ffffffff81c9fe50 t radeon_dvi_force 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radeon_lvds_get_modes +ffffffff81ca2810 t radeon_lvds_mode_valid +ffffffff81ca3000 T radeon_cs_parser_init +ffffffff81ca3490 T radeon_cs_ioctl +ffffffff81ca3fc0 t radeon_cs_parser_fini +ffffffff81ca4150 T radeon_cs_packet_parse +ffffffff81ca4300 T radeon_cs_packet_next_is_pkt3_nop +ffffffff81ca4360 T radeon_cs_dump_packet +ffffffff81ca43e0 T radeon_cs_packet_next_reloc +ffffffff81ca45b0 t cmp_size_smaller_first +ffffffff81ca5000 T radeon_crtc_cursor_move +ffffffff81ca5070 t radeon_lock_cursor +ffffffff81ca5230 t radeon_cursor_move_locked +ffffffff81ca5780 T radeon_crtc_cursor_set2 +ffffffff81ca5a00 t radeon_hide_cursor +ffffffff81ca5ac0 t radeon_bo_reserve +ffffffff81ca5c30 t radeon_bo_unreserve +ffffffff81ca5d10 t radeon_show_cursor +ffffffff81ca5f60 T radeon_cursor_reset +ffffffff81ca6000 T radeon_is_px +ffffffff81ca6040 T radeon_program_register_sequence +ffffffff81ca6170 T radeon_pci_config_reset +ffffffff81ca61a0 T radeon_surface_init +ffffffff81ca6360 T radeon_scratch_init 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cail_pll_write +ffffffff81ca7610 T radeon_atombios_fini +ffffffff81ca76b0 T radeon_combios_init +ffffffff81ca76f0 T radeon_combios_fini +ffffffff81ca7720 T radeon_device_init +ffffffff81ca81f0 T radeon_device_fini +ffffffff81ca82f0 T radeon_suspend_kms +ffffffff81ca8660 T radeon_resume_kms +ffffffff81ca88b0 T radeon_gpu_reset +ffffffff81ca9000 T radeon_crtc_load_lut +ffffffff81ca9dc0 T radeon_crtc_handle_vblank +ffffffff81ca9f30 T radeon_get_crtc_scanoutpos +ffffffff81caa560 T radeon_crtc_handle_flip +ffffffff81caa690 T radeon_compute_pll_avivo +ffffffff81caabd0 T radeon_compute_pll_legacy +ffffffff81cab250 T radeon_framebuffer_init +ffffffff81cab2d0 T radeon_update_display_priority +ffffffff81cab330 T radeon_modeset_init +ffffffff81cabe50 T radeon_modeset_fini +ffffffff81cabfb0 T radeon_crtc_scaling_mode_fixup +ffffffff81cac310 T radeon_get_crtc_scanout_position +ffffffff81cac380 t radeon_user_framebuffer_create +ffffffff81cac520 t radeon_crtc_gamma_set +ffffffff81cac560 t radeon_crtc_destroy +ffffffff81cac5a0 t radeon_crtc_set_config +ffffffff81cac660 t radeon_crtc_page_flip_target +ffffffff81cacaf0 t radeon_flip_work_func +ffffffff81cacd10 t radeon_unpin_work_func +ffffffff81cacd90 t radeon_bo_reserve +ffffffff81cacf00 t radeon_bo_unreserve +ffffffff81cad000 T radeon_dp_aux_transfer_native +ffffffff81cae000 T radeondrm_probe +ffffffff81cae060 T radeondrm_attach_kms +ffffffff81cae7a0 T radeondrm_detach_kms +ffffffff81cae830 T radeondrm_activate_kms +ffffffff81cae8f0 T radeondrm_wsioctl +ffffffff81cae9b0 T radeondrm_wsmmap +ffffffff81cae9e0 T radeondrm_alloc_screen +ffffffff81caea10 T radeondrm_free_screen +ffffffff81caea20 T radeondrm_show_screen +ffffffff81caeb00 T radeondrm_enter_ddb +ffffffff81caeb60 T radeondrm_doswitch +ffffffff81caebf0 T radeondrm_setpal +ffffffff81caedf0 T radeondrm_attachhook +ffffffff81caf110 T radeondrm_forcedetach +ffffffff81cb0000 T radeon_setup_encoder_clones +ffffffff81cb00b0 T radeon_get_encoder_enum +ffffffff81cb0230 T radeon_link_encoder_connector +ffffffff81cb0370 T radeon_encoder_set_active_device +ffffffff81cb0430 T radeon_get_connector_for_encoder +ffffffff81cb04b0 T radeon_get_connector_for_encoder_init +ffffffff81cb0530 T radeon_get_external_encoder +ffffffff81cb05c0 T radeon_encoder_get_dp_bridge_encoder_id +ffffffff81cb0660 T radeon_panel_mode_fixup +ffffffff81cb0830 T radeon_dig_monitor_is_duallink +ffffffff81cb0950 T radeon_encoder_is_digital +ffffffff81cb1000 T radeon_align_pitch +ffffffff81cb1090 T radeon_fbdev_init +ffffffff81cb11e0 T radeondrm_burner_cb +ffffffff81cb1210 T radeon_fbdev_fini +ffffffff81cb1280 T radeon_fbdev_set_suspend +ffffffff81cb12d0 T radeon_fbdev_robj_is_fb +ffffffff81cb1320 T radeondrm_burner +ffffffff81cb13a0 t radeonfb_create +ffffffff81cb17b0 t radeon_bo_reserve +ffffffff81cb1920 t radeon_bo_unreserve +ffffffff81cb2000 T radeon_fence_emit +ffffffff81cb2120 T radeon_fence_process +ffffffff81cb21e0 t radeon_fence_activity +ffffffff81cb2380 T radeon_fence_signaled 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radeon_fence_any_seq_signaled +ffffffff81cb4080 t radeon_fence_check_lockup +ffffffff81cb42c0 t __delayed_work_tick +ffffffff81cb42e0 t radeon_fence_check_signaled +ffffffff81cb4370 t radeon_fence_wait_cb +ffffffff81cb5000 T radeon_gart_table_ram_alloc +ffffffff81cb50c0 T radeon_gart_table_ram_free +ffffffff81cb5130 T radeon_gart_table_vram_alloc +ffffffff81cb51b0 T radeon_gart_table_vram_pin +ffffffff81cb52f0 t radeon_bo_reserve +ffffffff81cb5460 t radeon_bo_unreserve +ffffffff81cb5540 T radeon_gart_table_vram_unpin +ffffffff81cb55c0 T radeon_gart_table_vram_free +ffffffff81cb5600 T radeon_gart_unbind +ffffffff81cb5720 T radeon_gart_bind +ffffffff81cb5870 T radeon_gart_init +ffffffff81cb59a0 T radeon_gart_fini +ffffffff81cb6000 T radeon_gem_fault +ffffffff81cb6180 T radeon_gem_vm_reference +ffffffff81cb61b0 T radeon_gem_vm_detach +ffffffff81cb61c0 T radeon_gem_object_create +ffffffff81cb6380 T radeon_gem_init +ffffffff81cb63c0 T radeon_gem_fini +ffffffff81cb63d0 t radeon_gem_object_free +ffffffff81cb6420 t radeon_gem_object_open +ffffffff81cb64c0 t radeon_gem_object_close +ffffffff81cb65b0 t radeon_gem_object_mmap +ffffffff81cb6650 T radeon_gem_info_ioctl +ffffffff81cb66c0 T radeon_gem_pread_ioctl +ffffffff81cb6710 T radeon_gem_pwrite_ioctl +ffffffff81cb6760 T radeon_gem_create_ioctl +ffffffff81cb6880 T radeon_gem_userptr_ioctl +ffffffff81cb68b0 T radeon_gem_set_domain_ioctl +ffffffff81cb6a20 T radeon_mode_dumb_mmap +ffffffff81cb6ad0 T radeon_gem_mmap_ioctl +ffffffff81cb6b90 T radeon_gem_busy_ioctl +ffffffff81cb6c40 T radeon_gem_wait_idle_ioctl +ffffffff81cb6d50 T radeon_gem_set_tiling_ioctl +ffffffff81cb6e00 T radeon_gem_get_tiling_ioctl +ffffffff81cb6ed0 t radeon_bo_reserve +ffffffff81cb70c0 t radeon_bo_unreserve +ffffffff81cb71a0 T radeon_gem_va_ioctl +ffffffff81cb7560 T radeon_gem_op_ioctl +ffffffff81cb7660 T radeon_mode_dumb_create +ffffffff81cb7760 T radeon_gem_debugfs_init +ffffffff81cb8000 T radeon_ddc_probe +ffffffff81cb80c0 T radeon_router_select_ddc_port +ffffffff81cb8320 T radeon_bb_set_bits +ffffffff81cb8490 T radeon_bb_set_dir +ffffffff81cb84c0 T radeon_bb_read_bits +ffffffff81cb85a0 T radeon_acquire_bus +ffffffff81cb89f0 T radeon_release_bus +ffffffff81cb8b60 T radeon_send_start +ffffffff81cb8b80 T radeon_send_stop +ffffffff81cb8ba0 T radeon_initiate_xfer +ffffffff81cb8bc0 T radeon_read_byte +ffffffff81cb8be0 T radeon_write_byte +ffffffff81cb8c00 T radeon_i2c_create +ffffffff81cb8e10 T radeon_i2c_destroy +ffffffff81cb8e90 T radeon_i2c_init +ffffffff81cb8ee0 T radeon_i2c_fini +ffffffff81cb8f90 T radeon_i2c_add +ffffffff81cb9140 T radeon_i2c_lookup +ffffffff81cb9300 T radeon_i2c_get_byte +ffffffff81cb93d0 T radeon_i2c_put_byte +ffffffff81cb9460 T radeon_router_select_cd_port +ffffffff81cb96c0 t radeon_hw_i2c_xfer +ffffffff81cba280 t radeon_hw_i2c_func +ffffffff81cba2b0 t r100_hw_i2c_xfer +ffffffff81cba990 t radeon_get_i2c_prescale +ffffffff81cbb000 T radeon_ib_get +ffffffff81cbb100 T radeon_ib_free +ffffffff81cbb150 T radeon_ib_schedule +ffffffff81cbb3e0 T radeon_ib_pool_init +ffffffff81cbb480 T radeon_ib_pool_fini +ffffffff81cbb4f0 T radeon_ib_ring_tests +ffffffff81cbc000 T radeon_driver_irq_handler_kms +ffffffff81cbc050 T radeon_msi_ok +ffffffff81cbc150 T radeon_irq_kms_init +ffffffff81cbc3e0 t radeon_hotplug_work_func +ffffffff81cbc490 t radeon_dp_work_func +ffffffff81cbc500 T radeon_irq_kms_fini +ffffffff81cbc6a0 T radeon_irq_kms_sw_irq_get +ffffffff81cbc740 T radeon_irq_kms_sw_irq_get_delayed +ffffffff81cbc780 T radeon_irq_kms_sw_irq_put +ffffffff81cbc810 T radeon_irq_kms_pflip_irq_get +ffffffff81cbc8c0 T radeon_irq_kms_pflip_irq_put +ffffffff81cbc960 T radeon_irq_kms_enable_afmt +ffffffff81cbc9f0 T radeon_irq_kms_disable_afmt +ffffffff81cbca80 T radeon_irq_kms_enable_hpd +ffffffff81cbcb70 T radeon_irq_kms_disable_hpd +ffffffff81cbcc50 T radeon_irq_kms_set_irq_n_enabled +ffffffff81cbcdc0 t __delayed_work_tick +ffffffff81cbd000 T radeon_info_ioctl +ffffffff81cbdbf0 T radeon_driver_lastclose_kms +ffffffff81cbdc00 T radeon_driver_open_kms +ffffffff81cbdd30 t radeon_bo_reserve +ffffffff81cbdea0 T radeon_driver_postclose_kms +ffffffff81cbe0c0 T radeon_get_vblank_counter_kms +ffffffff81cbe260 T radeon_enable_vblank_kms +ffffffff81cbe310 T radeon_disable_vblank_kms +ffffffff81cbf000 T radeon_crtc_set_base +ffffffff81cbf020 T radeon_crtc_do_set_base +ffffffff81cbf5c0 T radeon_crtc_set_base_atomic +ffffffff81cbf5e0 t radeon_bo_reserve +ffffffff81cbf750 t radeon_bo_unreserve +ffffffff81cbf830 T radeon_legacy_init_crtc +ffffffff81cbf880 t radeon_crtc_dpms +ffffffff81cbfa80 t radeon_crtc_prepare +ffffffff81cbfb00 t radeon_crtc_commit +ffffffff81cbfb70 t radeon_crtc_mode_fixup +ffffffff81cbfb90 t radeon_crtc_mode_set +ffffffff81cc0fe0 t radeon_crtc_disable +ffffffff81cc2000 T radeon_legacy_get_backlight_level +ffffffff81cc2040 T radeon_legacy_set_backlight_level +ffffffff81cc2080 t radeon_legacy_lvds_update +ffffffff81cc23e0 T radeon_legacy_backlight_init +ffffffff81cc25b0 t radeon_legacy_backlight_get_brightness +ffffffff81cc2610 T radeon_add_legacy_encoder +ffffffff81cc2990 t radeon_legacy_backlight_update_status +ffffffff81cc2a20 t radeon_lvds_enc_destroy +ffffffff81cc2ab0 t radeon_legacy_lvds_dpms +ffffffff81cc2b00 t radeon_legacy_mode_fixup +ffffffff81cc2b70 t radeon_legacy_lvds_prepare +ffffffff81cc2c00 t radeon_legacy_lvds_commit +ffffffff81cc2c80 t radeon_legacy_lvds_mode_set +ffffffff81cc2e90 t radeon_legacy_encoder_disable +ffffffff81cc2ee0 t radeon_legacy_tmds_int_dpms +ffffffff81cc2fa0 t radeon_legacy_tmds_int_prepare +ffffffff81cc3070 t radeon_legacy_tmds_int_commit +ffffffff81cc3140 t radeon_legacy_tmds_int_mode_set +ffffffff81cc33b0 t radeon_legacy_primary_dac_dpms +ffffffff81cc34f0 t radeon_legacy_primary_dac_prepare +ffffffff81cc3550 t radeon_legacy_primary_dac_commit +ffffffff81cc35a0 t radeon_legacy_primary_dac_mode_set +ffffffff81cc3750 t radeon_legacy_primary_dac_detect +ffffffff81cc3940 t radeon_legacy_tv_dac_dpms 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radeon_bo_unref +ffffffff81cc8780 T radeon_bo_pin_restricted +ffffffff81cc8ab0 T radeon_bo_pin +ffffffff81cc8ad0 T radeon_bo_unpin +ffffffff81cc8b40 T radeon_bo_evict_vram +ffffffff81cc8ba0 T radeon_bo_force_delete +ffffffff81cc8d00 T radeon_bo_init +ffffffff81cc8de0 T radeon_bo_fini +ffffffff81cc8e20 T radeon_bo_list_validate +ffffffff81cc9110 T radeon_bo_get_surface_reg +ffffffff81cc93b0 T radeon_bo_set_tiling_flags +ffffffff81cc96c0 T radeon_bo_get_tiling_flags +ffffffff81cc9710 T radeon_bo_move_notify +ffffffff81cc97d0 T radeon_bo_fault_reserve_notify +ffffffff81cc9ad0 T radeon_bo_fence +ffffffff81cca000 T radeon_pm_get_type_index +ffffffff81cca080 T radeon_pm_acpi_event_handler +ffffffff81cca160 t radeon_pm_update_profile +ffffffff81cca280 t radeon_pm_set_clocks +ffffffff81ccac40 T radeon_dpm_enable_uvd +ffffffff81ccad00 T radeon_pm_compute_clocks +ffffffff81ccb740 T radeon_dpm_enable_vce +ffffffff81ccb7b0 T radeon_pm_suspend +ffffffff81ccb8b0 T radeon_pm_resume +ffffffff81ccbba0 T radeon_pm_init +ffffffff81ccc2a0 T radeon_pm_late_init +ffffffff81ccc360 T radeon_pm_fini +ffffffff81ccc470 t radeon_dpm_thermal_work_handler +ffffffff81ccc550 t radeon_dynpm_idle_work_handler +ffffffff81ccc840 t __delayed_work_tick +ffffffff81ccd000 T radeon_gem_prime_get_sg_table +ffffffff81ccd030 T radeon_gem_prime_pin +ffffffff81ccd0c0 t radeon_bo_reserve +ffffffff81ccd230 t radeon_bo_unreserve +ffffffff81ccd310 T radeon_gem_prime_unpin +ffffffff81ccd380 T radeon_gem_prime_export +ffffffff81cce000 T radeon_ring_supports_scratch_reg +ffffffff81cce030 T radeon_ring_free_size +ffffffff81cce0e0 T radeon_ring_lockup_update +ffffffff81cce140 T radeon_ring_alloc +ffffffff81cce2c0 T radeon_ring_lock +ffffffff81cce340 T radeon_ring_commit +ffffffff81cce440 T radeon_ring_unlock_commit +ffffffff81cce470 T radeon_ring_undo +ffffffff81cce4a0 T radeon_ring_unlock_undo +ffffffff81cce4c0 T radeon_ring_test_lockup +ffffffff81cce5e0 T radeon_ring_backup +ffffffff81cce7a0 T radeon_ring_restore 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+ffffffff81cd3930 t radeon_test_create_and_emit_fence +ffffffff81cd3aa0 T radeon_test_syncing +ffffffff81cd3d60 t radeon_test_ring_sync2 +ffffffff81cd40d0 t radeon_bo_reserve +ffffffff81cd4240 t radeon_bo_unreserve +ffffffff81cd5000 T radeon_get_rdev +ffffffff81cd5030 T radeon_ttm_tt_set_userptr +ffffffff81cd5080 T radeon_ttm_tt_is_bound +ffffffff81cd50d0 T radeon_ttm_tt_has_userptr +ffffffff81cd5110 T radeon_ttm_tt_is_readonly +ffffffff81cd5150 T radeon_ttm_init +ffffffff81cd5370 T radeon_ttm_set_active_vram_size +ffffffff81cd53b0 t radeon_bo_reserve +ffffffff81cd5520 t radeon_bo_unreserve +ffffffff81cd5600 T radeon_ttm_fini +ffffffff81cd56d0 t radeon_ttm_tt_create +ffffffff81cd57c0 t radeon_ttm_tt_populate +ffffffff81cd5870 t radeon_ttm_tt_unpopulate +ffffffff81cd5970 t radeon_ttm_tt_destroy +ffffffff81cd59c0 t radeon_evict_flags +ffffffff81cd5b10 t radeon_bo_move +ffffffff81cd5f90 t radeon_ttm_io_mem_reserve +ffffffff81cd7000 T radeon_ucode_print_mc_hdr +ffffffff81cd70b0 t radeon_ucode_print_common_hdr +ffffffff81cd71e0 T radeon_ucode_print_smc_hdr +ffffffff81cd7270 T radeon_ucode_print_gfx_hdr +ffffffff81cd7340 T radeon_ucode_print_rlc_hdr +ffffffff81cd7440 T radeon_ucode_print_sdma_hdr +ffffffff81cd7520 T radeon_ucode_validate +ffffffff81cd8000 T radeon_uvd_init +ffffffff81cd84e0 t radeon_uvd_idle_work_handler +ffffffff81cd8650 t radeon_bo_reserve +ffffffff81cd8840 t radeon_bo_unreserve +ffffffff81cd8920 T radeon_uvd_fini +ffffffff81cd89f0 T radeon_uvd_suspend +ffffffff81cd8bb0 T radeon_uvd_note_usage +ffffffff81cd8df0 T radeon_uvd_get_destroy_msg +ffffffff81cd8f00 T radeon_uvd_resume +ffffffff81cd8f90 T radeon_uvd_force_into_uvd_segment +ffffffff81cd9030 T radeon_uvd_free_handles +ffffffff81cd91f0 T radeon_uvd_cs_parse +ffffffff81cd9910 T radeon_uvd_get_create_msg +ffffffff81cd9a90 t radeon_uvd_send_msg +ffffffff81cd9c30 T radeon_uvd_calc_upll_dividers +ffffffff81cd9dd0 T radeon_uvd_send_upll_ctlreq +ffffffff81cda110 t __delayed_work_tick +ffffffff81cdb000 T radeon_vce_init +ffffffff81cdb600 t radeon_vce_idle_work_handler +ffffffff81cdb6d0 t radeon_bo_reserve +ffffffff81cdb840 t radeon_bo_unreserve +ffffffff81cdb920 T radeon_vce_fini +ffffffff81cdb9a0 T radeon_vce_suspend +ffffffff81cdba80 T radeon_vce_resume +ffffffff81cdbbd0 T radeon_vce_note_usage +ffffffff81cdbcf0 T radeon_vce_free_handles +ffffffff81cdbdb0 T radeon_vce_get_destroy_msg +ffffffff81cdc050 T radeon_vce_get_create_msg +ffffffff81cdc410 T radeon_vce_cs_reloc +ffffffff81cdc510 T radeon_vce_cs_parse +ffffffff81cdcd40 T radeon_vce_semaphore_emit +ffffffff81cdcf10 T radeon_vce_ib_execute +ffffffff81cdd0b0 T radeon_vce_fence_emit +ffffffff81cdd2f0 T radeon_vce_ring_test +ffffffff81cdd440 T radeon_vce_ib_test +ffffffff81cdd560 t __delayed_work_tick +ffffffff81cde000 T radeon_vm_manager_init +ffffffff81cde060 T radeon_vm_manager_fini +ffffffff81cde180 T radeon_vm_get_bos +ffffffff81cde2b0 T radeon_vm_grab_id +ffffffff81cde440 T radeon_vm_flush +ffffffff81cde5d0 T radeon_vm_fence +ffffffff81cde680 T radeon_vm_bo_find +ffffffff81cde6e0 T radeon_vm_bo_add +ffffffff81cde7c0 T radeon_vm_bo_set_addr +ffffffff81cdec20 t radeon_bo_unreserve +ffffffff81cded00 t radeon_vm_clear_bo +ffffffff81cdeef0 T radeon_vm_map_gart +ffffffff81cdef30 T radeon_vm_update_page_directory +ffffffff81cdf2e0 T radeon_vm_bo_update +ffffffff81cdf9c0 T radeon_vm_clear_freed +ffffffff81cdfaa0 T radeon_vm_clear_invalids +ffffffff81cdfb40 T radeon_vm_bo_rmv +ffffffff81cdfc30 T radeon_vm_bo_invalidate +ffffffff81cdfce0 T radeon_vm_init +ffffffff81cdff40 T radeon_vm_fini +ffffffff81ce0210 t radeon_bo_reserve +ffffffff81ce0380 t radeon_vm_frag_ptes +ffffffff81ce1000 T rs400_gart_adjust_size +ffffffff81ce10c0 T rs400_gart_tlb_flush +ffffffff81ce1140 T rs400_gart_init +ffffffff81ce1240 T rs400_gart_enable +ffffffff81ce15a0 T rs400_gart_disable +ffffffff81ce1600 T rs400_gart_fini +ffffffff81ce1670 T rs400_gart_get_page_entry +ffffffff81ce16d0 T rs400_gart_set_page +ffffffff81ce1710 T rs400_mc_wait_for_idle +ffffffff81ce17b0 T rs400_mc_rreg +ffffffff81ce1840 T rs400_mc_wreg +ffffffff81ce18c0 T rs400_resume +ffffffff81ce19f0 t rs400_mc_program +ffffffff81ce1af0 t rs400_startup +ffffffff81ce1ce0 T rs400_suspend +ffffffff81ce1d80 T rs400_fini +ffffffff81ce1e70 T rs400_init +ffffffff81ce3000 T avivo_wait_for_vblank +ffffffff81ce3280 T rs600_page_flip +ffffffff81ce3540 T rs600_page_flip_pending +ffffffff81ce35b0 T avivo_program_fmt +ffffffff81ce36d0 T rs600_pm_misc +ffffffff81ce3a10 T rs600_pm_prepare +ffffffff81ce3b10 T rs600_pm_finish +ffffffff81ce3c10 T rs600_hpd_sense +ffffffff81ce3c70 T rs600_hpd_set_polarity +ffffffff81ce3d30 T rs600_hpd_init +ffffffff81ce3e10 T rs600_hpd_fini +ffffffff81ce3eb0 T rs600_asic_reset +ffffffff81ce4120 T rs600_gart_tlb_flush +ffffffff81ce41e0 T rs600_gart_get_page_entry +ffffffff81ce4240 T rs600_gart_set_page +ffffffff81ce4280 T rs600_irq_set +ffffffff81ce4450 T rs600_irq_disable +ffffffff81ce44d0 t rs600_irq_ack +ffffffff81ce4680 T rs600_irq_process +ffffffff81ce49e0 T rs600_get_vblank_counter +ffffffff81ce4a30 T rs600_mc_wait_for_idle +ffffffff81ce4ad0 T rs600_bandwidth_update +ffffffff81ce4bc0 T rs600_mc_rreg +ffffffff81ce4c40 T rs600_mc_wreg +ffffffff81ce4cb0 T rs600_set_safe_registers +ffffffff81ce4cf0 T rs600_resume +ffffffff81ce4e20 t rs600_startup +ffffffff81ce5640 T rs600_suspend +ffffffff81ce5740 T rs600_fini +ffffffff81ce5840 T rs600_init +ffffffff81ce6000 T rs690_mc_wait_for_idle +ffffffff81ce60a0 T rs690_pm_info +ffffffff81ce6330 T rs690_line_buffer_adjust +ffffffff81ce6430 T rs690_bandwidth_update +ffffffff81ce6750 t rs690_crtc_bandwidth_compute +ffffffff81ce6b80 t rs690_compute_mode_priority +ffffffff81ce7000 T rs690_mc_rreg +ffffffff81ce7090 T rs690_mc_wreg +ffffffff81ce7110 T rs690_resume +ffffffff81ce7200 t rs690_startup +ffffffff81ce74e0 T rs690_suspend +ffffffff81ce7540 T rs690_fini +ffffffff81ce75f0 T rs690_init +ffffffff81ce8000 T rs780_dpm_enable +ffffffff81ce8be0 T rs780_dpm_disable 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+ffffffff81cec8e0 T rv515_clock_startup +ffffffff81cec9b0 T rv515_resume +ffffffff81cecbf0 t rv515_startup +ffffffff81ced0c0 T rv515_suspend +ffffffff81ced130 T rv515_set_safe_registers +ffffffff81ced170 T rv515_fini +ffffffff81ced220 T rv515_init +ffffffff81ced500 T atom_rv515_force_tv_scaler +ffffffff81cf0ba0 T rv515_bandwidth_avivo_update +ffffffff81cf0d40 t rv515_crtc_bandwidth_compute +ffffffff81cf1080 t rv515_compute_mode_priority +ffffffff81cf1530 T rv515_bandwidth_update +ffffffff81cf2000 T rv6xx_dpm_enable +ffffffff81cf27f0 t rv6xx_calculate_stepping_parameters +ffffffff81cf29c0 t rv6xx_program_stepping_parameters_except_lowest_entry +ffffffff81cf2fb0 t rv6xx_program_stepping_parameters_lowest_entry +ffffffff81cf3090 T rv6xx_dpm_disable +ffffffff81cf3410 T rv6xx_dpm_set_power_state +ffffffff81cf3e10 T rv6xx_setup_asic +ffffffff81cf3f50 T rv6xx_dpm_display_configuration_changed +ffffffff81cf3fd0 T rv6xx_dpm_init +ffffffff81cf4520 T rv6xx_dpm_print_power_state +ffffffff81cf45e0 T rv6xx_dpm_debugfs_print_current_performance_level +ffffffff81cf4610 T rv6xx_dpm_get_current_sclk +ffffffff81cf4680 T rv6xx_dpm_get_current_mclk +ffffffff81cf46f0 T rv6xx_dpm_fini +ffffffff81cf4780 T rv6xx_dpm_get_sclk +ffffffff81cf47c0 T rv6xx_dpm_get_mclk +ffffffff81cf4800 T rv6xx_dpm_force_performance_level +ffffffff81cf4990 t rv6xx_generate_steps +ffffffff81cf4ca0 t rv6xx_output_stepping +ffffffff81cf4dc0 t rv6xx_program_mclk_stepping_entry +ffffffff81cf5030 t rv6xx_program_engine_spread_spectrum +ffffffff81cf5310 t rv6xx_step_sw_voltage +ffffffff81cf6000 T rv730_populate_sclk_value +ffffffff81cf6240 T rv730_populate_mclk_value +ffffffff81cf6460 T rv730_read_clock_registers +ffffffff81cf6580 T rv730_populate_smc_acpi_state +ffffffff81cf6730 T rv730_populate_smc_initial_state +ffffffff81cf68f0 T rv730_program_memory_timing_parameters +ffffffff81cf6ad0 T rv730_start_dpm +ffffffff81cf6b60 T rv730_stop_dpm +ffffffff81cf6c20 T rv730_program_dcodt +ffffffff81cf6cf0 T rv730_get_odt_values +ffffffff81cf7000 T rv740_get_decoded_reference_divider +ffffffff81cf70a0 T rv740_get_dll_speed +ffffffff81cf71d0 T rv740_populate_sclk_value +ffffffff81cf73e0 T rv740_populate_mclk_value +ffffffff81cf7840 T rv740_read_clock_registers +ffffffff81cf7970 T rv740_populate_smc_acpi_state +ffffffff81cf7ba0 T rv740_enable_mclk_spread_spectrum +ffffffff81cf7c00 T rv740_get_mclk_frequency_ratio +ffffffff81cf8000 T rv770_set_uvd_clocks +ffffffff81cf8570 T rv770_get_xclk +ffffffff81cf85d0 T rv770_page_flip +ffffffff81cf88e0 T rv770_page_flip_pending +ffffffff81cf8950 T rv770_get_temp +ffffffff81cf89b0 T rv770_pm_misc +ffffffff81cf8a90 T r700_cp_stop +ffffffff81cf8b10 T r700_cp_fini +ffffffff81cf8ba0 T rv770_set_clk_bypass_mode +ffffffff81cf8cc0 T r700_vram_gtt_location +ffffffff81cf8e40 T rv770_resume +ffffffff81cf8ed0 t rv770_init_golden_registers +ffffffff81cf9060 t rv770_startup +ffffffff81cfb030 T rv770_suspend +ffffffff81cfb250 T rv770_init +ffffffff81cfb810 T rv770_fini +ffffffff81cfc000 T rv770_copy_dma +ffffffff81cfd000 T rv770_get_ps +ffffffff81cfd030 T rv770_get_pi +ffffffff81cfd060 T evergreen_get_pi +ffffffff81cfd090 T rv770_restore_cgcg +ffffffff81cfd110 T rv770_stop_dpm +ffffffff81cfd1d0 T rv770_dpm_enabled +ffffffff81cfd210 T rv770_enable_thermal_protection +ffffffff81cfd270 T rv770_enable_acpi_pm +ffffffff81cfd2c0 T rv770_get_seq_value +ffffffff81cfd300 T rv770_write_smc_soft_register +ffffffff81cfd330 T rv770_populate_smc_t +ffffffff81cfd4d0 T rv770_populate_smc_sp +ffffffff81cfd530 T rv770_map_clkf_to_ibias +ffffffff81cfd590 T rv770_populate_vddc_value +ffffffff81cfd640 T rv770_populate_mvdd_value +ffffffff81cfd690 T rv770_calculate_memory_refresh_rate +ffffffff81cfd700 T rv770_enable_backbias +ffffffff81cfd760 T rv770_setup_bsp +ffffffff81cfd850 T rv770_program_git +ffffffff81cfd8a0 T rv770_program_tp +ffffffff81cfd920 T rv770_program_tpp +ffffffff81cfd960 T rv770_program_sstp +ffffffff81cfd9a0 T rv770_program_engine_speed_parameters +ffffffff81cfd9f0 T rv770_program_vc +ffffffff81cfda40 T rv770_clear_vc +ffffffff81cfda80 T rv770_upload_firmware +ffffffff81cfdac0 T rv770_populate_initial_mvdd_value +ffffffff81cfdb10 T rv770_get_memory_module_index +ffffffff81cfdb50 T rv770_enable_voltage_control +ffffffff81cfdbb0 T rv770_halt_smc +ffffffff81cfdc10 T rv770_resume_smc +ffffffff81cfdc60 T rv770_set_sw_state +ffffffff81cfdcc0 T rv770_set_boot_state +ffffffff81cfdd10 T rv770_set_uvd_clock_before_set_eng_clock +ffffffff81cfdd80 T rv770_set_uvd_clock_after_set_eng_clock +ffffffff81cfddf0 T rv770_restrict_performance_levels_before_switch +ffffffff81cfde50 T rv770_dpm_force_performance_level +ffffffff81cfdf10 T r7xx_start_smc +ffffffff81cfdf40 T r7xx_stop_smc +ffffffff81cfdf70 T rv770_read_voltage_smio_registers +ffffffff81cfdfb0 T rv770_reset_smio_status +ffffffff81cfe070 T rv770_get_memory_type +ffffffff81cfe0c0 T rv770_get_pcie_gen2_status +ffffffff81cfe130 T rv770_get_max_vddc +ffffffff81cfe190 T rv770_program_response_times +ffffffff81cfe2e0 T rv770_enable_auto_throttle_source +ffffffff81cfe460 T rv770_dpm_enable +ffffffff81cff4e0 T rv770_dpm_late_enable +ffffffff81cff610 T rv770_dpm_disable +ffffffff81cff970 T rv770_dpm_set_power_state +ffffffff81cfff70 T rv770_dpm_setup_asic +ffffffff81d002d0 T rv770_dpm_display_configuration_changed +ffffffff81d00350 T rv7xx_parse_power_table +ffffffff81d00890 T rv770_get_engine_memory_ss +ffffffff81d00920 T rv770_dpm_init +ffffffff81d00b60 T rv770_dpm_print_power_state +ffffffff81d00c80 T rv770_dpm_debugfs_print_current_performance_level +ffffffff81d00cb0 T rv770_dpm_get_current_sclk +ffffffff81d00d20 T rv770_dpm_get_current_mclk +ffffffff81d00d90 T rv770_dpm_fini +ffffffff81d00e20 T rv770_dpm_get_sclk +ffffffff81d00e60 T rv770_dpm_get_mclk +ffffffff81d00eb0 T rv770_dpm_vblank_too_short +ffffffff81d00f20 t rv770_convert_power_level_to_smc +ffffffff81d02000 T rv770_copy_bytes_to_smc +ffffffff81d02240 T rv770_start_smc +ffffffff81d02290 T rv770_reset_smc +ffffffff81d022e0 T rv770_stop_smc_clock +ffffffff81d02330 T rv770_start_smc_clock +ffffffff81d02380 T rv770_is_smc_running +ffffffff81d023c0 T rv770_send_msg_to_smc +ffffffff81d024a0 T rv770_wait_for_smc_inactive +ffffffff81d02540 T rv770_load_smc_ucode +ffffffff81d026d0 T rv770_read_smc_sram_dword +ffffffff81d02790 T rv770_write_smc_sram_dword +ffffffff81d03000 T si_get_allowed_info_register +ffffffff81d03090 T si_get_xclk +ffffffff81d03100 T si_get_temp +ffffffff81d03150 T si_mc_load_microcode +ffffffff81d03420 T dce6_bandwidth_update +ffffffff81d03820 t dce6_program_watermarks +ffffffff81d042d0 T si_fence_ring_emit +ffffffff81d04750 T si_ring_ib_execute +ffffffff81d04f30 T si_gpu_check_soft_reset +ffffffff81d050d0 T si_asic_reset +ffffffff81d054f0 t si_gpu_pci_config_reset +ffffffff81d058a0 T si_gfx_is_lockup +ffffffff81d05910 T si_vram_gtt_location +ffffffff81d059b0 T si_pcie_gart_tlb_flush +ffffffff81d05a00 T si_ib_parse +ffffffff81d060a0 T si_vm_init +ffffffff81d060e0 T si_vm_fini +ffffffff81d06110 T si_vm_flush +ffffffff81d067f0 T si_init_uvd_internal_cg +ffffffff81d06840 T si_get_csb_size +ffffffff81d068d0 T si_get_csb_buffer +ffffffff81d06a60 T si_rlc_reset +ffffffff81d06ae0 T si_irq_set +ffffffff81d06ff0 t si_disable_interrupt_state +ffffffff81d07270 T si_irq_process +ffffffff81d08460 t si_irq_ack +ffffffff81d08a60 T si_resume +ffffffff81d08af0 t si_init_golden_registers +ffffffff81d08cb0 t si_startup +ffffffff81d0d4c0 T si_suspend +ffffffff81d0d840 T si_init +ffffffff81d0ed00 t si_cp_fini +ffffffff81d0edf0 t si_pcie_gart_fini +ffffffff81d0eef0 T si_fini +ffffffff81d0f1a0 T si_get_gpu_clock_counter +ffffffff81d0f270 T si_set_uvd_clocks +ffffffff81d0f7e0 T si_set_vce_clocks +ffffffff81d0fd20 t si_vce_send_vcepll_ctlreq +ffffffff81d0ff60 t dce6_latency_watermark +ffffffff81d10190 t si_rlc_stop +ffffffff81d10340 t si_vm_reg_valid +ffffffff81d104a0 t si_vm_packet3_cp_dma_check +ffffffff81d10620 t si_update_cg +ffffffff81d10b70 t si_enable_mgcg +ffffffff81d10f90 t si_enable_cgcg +ffffffff81d12000 T si_dma_is_lockup +ffffffff81d12080 T si_dma_vm_copy_pages +ffffffff81d12160 T si_dma_vm_write_pages +ffffffff81d122c0 T si_dma_vm_set_pages +ffffffff81d12420 T si_dma_vm_flush +ffffffff81d128b0 T si_copy_dma +ffffffff81d13000 T si_dpm_force_performance_level +ffffffff81d13160 T si_get_ddr3_mclk_frequency_ratio +ffffffff81d131c0 T si_get_mclk_frequency_ratio +ffffffff81d13240 T si_trim_voltage_table_to_fit_state_table +ffffffff81d13340 T si_dpm_setup_asic +ffffffff81d13510 T si_fan_ctrl_get_fan_speed_percent +ffffffff81d135a0 T si_fan_ctrl_set_fan_speed_percent +ffffffff81d13660 T si_fan_ctrl_set_mode +ffffffff81d138b0 T si_fan_ctrl_get_mode +ffffffff81d13900 T si_dpm_enable +ffffffff81d18c00 t si_populate_smc_tdp_limits +ffffffff81d18e10 T si_dpm_late_enable +ffffffff81d18f60 T si_dpm_disable +ffffffff81d192e0 T si_dpm_pre_set_power_state +ffffffff81d19ee0 T si_dpm_set_power_state +ffffffff81d1b460 T si_dpm_post_set_power_state +ffffffff81d1b490 T si_dpm_display_configuration_changed +ffffffff81d1b570 T si_dpm_init +ffffffff81d1d020 T si_dpm_fini +ffffffff81d1d0d0 T si_dpm_debugfs_print_current_performance_level +ffffffff81d1d120 T si_dpm_get_current_sclk +ffffffff81d1d190 T si_dpm_get_current_mclk +ffffffff81d1d200 t si_get_std_voltage_value +ffffffff81d1d330 t si_convert_power_level_to_smc +ffffffff81d1dbd0 t si_calculate_sclk_params +ffffffff81d1ddf0 t si_convert_mc_reg_table_to_smc +ffffffff81d1df50 t si_program_cac_config_registers +ffffffff81d1f000 T si_copy_bytes_to_smc +ffffffff81d1f250 T si_start_smc +ffffffff81d1f290 T si_reset_smc +ffffffff81d1f2d0 T si_program_jump_on_start +ffffffff81d1f300 T si_stop_smc_clock +ffffffff81d1f340 T si_start_smc_clock +ffffffff81d1f380 T si_is_smc_running +ffffffff81d1f3e0 T si_send_msg_to_smc +ffffffff81d1f4b0 T si_wait_for_smc_inactive +ffffffff81d1f550 T si_load_smc_ucode +ffffffff81d1f6f0 T si_read_smc_sram_dword +ffffffff81d1f7c0 T si_write_smc_sram_dword +ffffffff81d20000 T sumo_get_pi +ffffffff81d20030 T sumo_gfx_clockgating_initialize +ffffffff81d20110 T sumo_program_vc +ffffffff81d20150 T sumo_clear_vc +ffffffff81d20190 T sumo_program_sstp +ffffffff81d20210 T sumo_take_smu_control +ffffffff81d20240 T sumo_get_sleep_divider_from_id +ffffffff81d20270 T sumo_get_sleep_divider_id_from_clock +ffffffff81d20320 T sumo_dpm_enable +ffffffff81d209c0 T sumo_dpm_late_enable +ffffffff81d20f80 T sumo_dpm_disable +ffffffff81d212d0 T sumo_dpm_pre_set_power_state +ffffffff81d21790 T sumo_dpm_set_power_state +ffffffff81d222d0 T sumo_dpm_post_set_power_state +ffffffff81d22370 T sumo_dpm_setup_asic +ffffffff81d22470 T sumo_dpm_display_configuration_changed +ffffffff81d224a0 T sumo_convert_vid2_to_vid7 +ffffffff81d22500 T sumo_construct_sclk_voltage_mapping_table +ffffffff81d225c0 T sumo_construct_vid_mapping_table +ffffffff81d22740 T sumo_dpm_init +ffffffff81d23000 T sumo_dpm_print_power_state +ffffffff81d23120 T sumo_dpm_debugfs_print_current_performance_level +ffffffff81d23150 T sumo_dpm_get_current_sclk +ffffffff81d231c0 T sumo_dpm_get_current_mclk +ffffffff81d231f0 T sumo_dpm_get_current_vddc +ffffffff81d232c0 T sumo_dpm_fini +ffffffff81d23350 T sumo_dpm_get_sclk +ffffffff81d233a0 T sumo_dpm_get_mclk +ffffffff81d233d0 T sumo_dpm_force_performance_level +ffffffff81d237f0 t sumo_power_level_enable +ffffffff81d23a20 t sumo_program_power_level +ffffffff81d24000 T sumo_initialize_m3_arb +ffffffff81d242c0 T sumo_smu_notify_alt_vddnb_change +ffffffff81d24360 t sumo_send_msg_to_smu +ffffffff81d24500 T sumo_smu_pg_init +ffffffff81d24520 T sumo_enable_boost_timer +ffffffff81d24660 T sumo_set_tdp_limit +ffffffff81d246e0 T sumo_boost_state_enable +ffffffff81d24730 T sumo_get_running_fw_version +ffffffff81d25000 T trinity_dpm_enable_bapm +ffffffff81d25080 T trinity_dpm_enable +ffffffff81d25520 T trinity_dpm_late_enable +ffffffff81d25a80 T trinity_dpm_disable +ffffffff81d25e90 T trinity_dpm_force_performance_level +ffffffff81d25f50 T trinity_dpm_pre_set_power_state +ffffffff81d26520 T trinity_dpm_set_power_state +ffffffff81d26ab0 T trinity_dpm_post_set_power_state +ffffffff81d26b50 T trinity_dpm_setup_asic +ffffffff81d26bb0 T trinity_dpm_display_configuration_changed +ffffffff81d26c40 T trinity_dpm_init +ffffffff81d27540 T trinity_dpm_print_power_state +ffffffff81d27650 T trinity_dpm_debugfs_print_current_performance_level +ffffffff81d276e0 T trinity_dpm_get_current_sclk +ffffffff81d27740 T trinity_dpm_get_current_mclk +ffffffff81d27770 T trinity_dpm_fini +ffffffff81d27810 T trinity_dpm_get_sclk +ffffffff81d27860 T trinity_dpm_get_mclk +ffffffff81d27890 t trinity_program_power_level +ffffffff81d28000 T trinity_dpm_bapm_enable +ffffffff81d28150 T trinity_dpm_config +ffffffff81d28230 T trinity_dpm_force_state +ffffffff81d28310 T trinity_dpm_n_levels_disabled +ffffffff81d283f0 T trinity_uvd_dpm_config +ffffffff81d284c0 T trinity_dpm_no_forced_level +ffffffff81d28590 T trinity_dce_enable_voltage_adjustment +ffffffff81d286e0 T trinity_gfx_dynamic_mgpg_config +ffffffff81d287b0 T trinity_acquire_mutex +ffffffff81d28840 T trinity_release_mutex +ffffffff81d29000 T uvd_v1_0_get_rptr +ffffffff81d29040 T uvd_v1_0_get_wptr +ffffffff81d29080 T uvd_v1_0_set_wptr +ffffffff81d290c0 T uvd_v1_0_fence_emit +ffffffff81d294b0 T uvd_v1_0_resume +ffffffff81d29610 T uvd_v1_0_init +ffffffff81d29ba0 T uvd_v1_0_start +ffffffff81d2a320 T uvd_v1_0_fini +ffffffff81d2a490 T uvd_v1_0_stop +ffffffff81d2a600 T uvd_v1_0_ring_test +ffffffff81d2a7d0 T uvd_v1_0_semaphore_emit +ffffffff81d2a800 T uvd_v1_0_ib_execute +ffffffff81d2a9a0 T uvd_v1_0_ib_test +ffffffff81d2b000 T uvd_v2_2_fence_emit +ffffffff81d2b470 T uvd_v2_2_semaphore_emit +ffffffff81d2b680 T uvd_v2_2_resume +ffffffff81d2c000 T uvd_v3_1_semaphore_emit +ffffffff81d2d000 T uvd_v4_2_resume +ffffffff81d2e000 T vce_v1_0_get_rptr +ffffffff81d2e090 T vce_v1_0_get_wptr +ffffffff81d2e120 T vce_v1_0_set_wptr +ffffffff81d2e1b0 T vce_v1_0_enable_mgcg +ffffffff81d2e470 T vce_v1_0_load_fw +ffffffff81d2e640 T vce_v1_0_bo_size +ffffffff81d2e6b0 T vce_v1_0_resume +ffffffff81d2f020 T vce_v1_0_start +ffffffff81d2f7e0 T vce_v1_0_init +ffffffff81d30000 T vce_v2_0_enable_mgcg +ffffffff81d30070 t vce_v2_0_set_dyn_cg +ffffffff81d30260 T vce_v2_0_bo_size +ffffffff81d302d0 T vce_v2_0_resume +ffffffff81d31000 T aldebaran_reset_init +ffffffff81d310c0 t aldebaran_async_reset +ffffffff81d31120 t aldebaran_get_reset_handler +ffffffff81d311d0 T aldebaran_reset_fini +ffffffff81d31230 t aldebaran_mode2_prepare_hwcontext +ffffffff81d31350 t aldebaran_mode2_perform_reset +ffffffff81d31520 t aldebaran_mode2_restore_hwcontext +ffffffff81d319e0 t aldebaran_mode2_reset +ffffffff81d32000 T aldebaran_reg_base_init +ffffffff81d33000 T amdgpu_acpi_is_pcie_performance_request_supported +ffffffff81d33040 T amdgpu_acpi_is_power_shift_control_supported +ffffffff81d33070 T amdgpu_acpi_pcie_notify_device_ready +ffffffff81d33190 t amdgpu_atcs_call +ffffffff81d33280 T amdgpu_acpi_pcie_performance_request +ffffffff81d334d0 T amdgpu_acpi_power_shift_control +ffffffff81d33580 T amdgpu_acpi_smart_shift_update +ffffffff81d336d0 T amdgpu_acpi_init +ffffffff81d33790 t amdgpu_acpi_event +ffffffff81d33ad0 T amdgpu_acpi_get_backlight_caps +ffffffff81d33b20 T amdgpu_acpi_fini +ffffffff81d33b40 T amdgpu_acpi_should_gpu_reset +ffffffff81d33b90 T amdgpu_acpi_detect +ffffffff81d35000 T amdgpu_afmt_acr +ffffffff81d36000 T amdgpu_amdkfd_init +ffffffff81d36040 T amdgpu_amdkfd_fini +ffffffff81d36070 T amdgpu_amdkfd_device_probe +ffffffff81d360a0 T amdgpu_amdkfd_device_init +ffffffff81d36270 t amdgpu_amdkfd_reset_work +ffffffff81d362f0 T amdgpu_amdkfd_device_fini_sw +ffffffff81d36340 T amdgpu_amdkfd_interrupt +ffffffff81d36370 T amdgpu_amdkfd_suspend +ffffffff81d363a0 T amdgpu_amdkfd_resume_iommu +ffffffff81d363d0 T amdgpu_amdkfd_resume +ffffffff81d36400 T amdgpu_amdkfd_pre_reset +ffffffff81d36430 T amdgpu_amdkfd_post_reset +ffffffff81d36460 T amdgpu_amdkfd_gpu_reset +ffffffff81d364c0 T amdgpu_amdkfd_alloc_gtt_mem +ffffffff81d36760 t amdgpu_bo_reserve +ffffffff81d368c0 t amdgpu_bo_unreserve +ffffffff81d369a0 T amdgpu_amdkfd_free_gtt_mem +ffffffff81d36a10 T amdgpu_amdkfd_alloc_gws +ffffffff81d36af0 T amdgpu_amdkfd_free_gws +ffffffff81d36b30 T amdgpu_amdkfd_get_fw_version +ffffffff81d36be0 T amdgpu_amdkfd_get_local_mem_info +ffffffff81d36cb0 T amdgpu_amdkfd_get_gpu_clock_counter +ffffffff81d36cf0 T amdgpu_amdkfd_get_max_engine_clock_in_mhz +ffffffff81d36d70 T amdgpu_amdkfd_get_cu_info +ffffffff81d36ec0 T amdgpu_amdkfd_get_dmabuf_info +ffffffff81d37000 T amdgpu_amdkfd_get_xgmi_hops_count +ffffffff81d37070 T amdgpu_amdkfd_get_xgmi_bandwidth_mbytes +ffffffff81d37100 T amdgpu_amdkfd_get_pcie_bandwidth_mbytes +ffffffff81d37270 T amdgpu_amdkfd_submit_ib +ffffffff81d373d0 T amdgpu_amdkfd_set_compute_idle +ffffffff81d37420 T amdgpu_amdkfd_is_kfd_vmid +ffffffff81d37460 T amdgpu_amdkfd_flush_gpu_tlb_vmid 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dce_v10_0_ext_dpms +ffffffff81dd24c0 t dce_v10_0_ext_prepare +ffffffff81dd24f0 t dce_v10_0_ext_commit +ffffffff81dd2520 t dce_v10_0_ext_mode_set +ffffffff81dd2550 t dce_v10_0_ext_disable +ffffffff81dd2580 t dce_v10_0_set_crtc_irq_state +ffffffff81dd2660 t dce_v10_0_crtc_irq +ffffffff81dd2890 t dce_v10_0_set_crtc_vblank_interrupt_state +ffffffff81dd2960 t dce_v10_0_set_crtc_vline_interrupt_state +ffffffff81dd2a30 t dce_v10_0_set_pageflip_irq_state +ffffffff81dd2ae0 t dce_v10_0_pageflip_irq +ffffffff81dd2c40 t dce_v10_0_set_hpd_irq_state +ffffffff81dd2d10 t dce_v10_0_hpd_irq +ffffffff81dd2e30 t dce_v10_0_crtc_cursor_set2 +ffffffff81dd31a0 t dce_v10_0_crtc_cursor_move +ffffffff81dd3280 t dce_v10_0_crtc_gamma_set +ffffffff81dd32c0 t dce_v10_0_crtc_destroy +ffffffff81dd32f0 t amdgpu_bo_reserve +ffffffff81dd34e0 t amdgpu_bo_unreserve +ffffffff81dd35c0 t dce_v10_0_cursor_move_locked +ffffffff81dd3710 t dce_v10_0_crtc_load_lut +ffffffff81dd3aa0 t dce_v10_0_crtc_dpms +ffffffff81dd3c70 t dce_v10_0_crtc_prepare +ffffffff81dd3cb0 t dce_v10_0_crtc_commit +ffffffff81dd3ce0 t dce_v10_0_crtc_mode_fixup +ffffffff81dd3ea0 t dce_v10_0_crtc_mode_set +ffffffff81dd4090 t dce_v10_0_crtc_set_base +ffffffff81dd40b0 t dce_v10_0_crtc_set_base_atomic +ffffffff81dd40d0 t dce_v10_0_crtc_disable +ffffffff81dd4270 t dce_v10_0_crtc_do_set_base +ffffffff81dd4920 t dce_v10_0_is_display_hung +ffffffff81dd5000 T dce_v11_0_disable_dce +ffffffff81dd5160 t dce_v11_0_early_init +ffffffff81dd52b0 t dce_v11_0_sw_init +ffffffff81dd5730 t dce_v11_0_sw_fini +ffffffff81dd5860 t dce_v11_0_hw_init +ffffffff81dd5c30 t dce_v11_0_hw_fini +ffffffff81dd5dc0 t dce_v11_0_suspend +ffffffff81dd5e20 t dce_v11_0_resume +ffffffff81dd5e90 t dce_v11_0_is_idle +ffffffff81dd5ec0 t dce_v11_0_wait_for_idle +ffffffff81dd5ef0 t dce_v11_0_soft_reset +ffffffff81dd6110 t dce_v11_0_set_clockgating_state +ffffffff81dd6140 t dce_v11_0_set_powergating_state +ffffffff81dd6170 t dce_v11_0_audio_endpt_rreg +ffffffff81dd6200 t dce_v11_0_audio_endpt_wreg +ffffffff81dd6280 t dce_v11_0_bandwidth_update +ffffffff81dd6cf0 t dce_v11_0_vblank_get_counter +ffffffff81dd6d40 t dce_v11_0_hpd_sense +ffffffff81dd6da0 t dce_v11_0_hpd_set_polarity +ffffffff81dd6e70 t dce_v11_0_hpd_get_gpio_reg +ffffffff81dd6ea0 t dce_v11_0_page_flip +ffffffff81dd6fa0 t dce_v11_0_crtc_get_scanoutpos +ffffffff81dd7040 t dce_v11_0_encoder_add +ffffffff81dd7270 t dce_v11_0_latency_watermark +ffffffff81dd7490 t dce_v11_0_encoder_destroy +ffffffff81dd74f0 t dce_v11_0_encoder_prepare +ffffffff81dd76f0 t dce_v11_0_encoder_commit +ffffffff81dd7720 t dce_v11_0_encoder_mode_set +ffffffff81dd85c0 t dce_v11_0_encoder_disable +ffffffff81dd86d0 t dce_v11_0_ext_dpms +ffffffff81dd8700 t dce_v11_0_ext_prepare +ffffffff81dd8730 t dce_v11_0_ext_commit +ffffffff81dd8760 t dce_v11_0_ext_mode_set +ffffffff81dd8790 t dce_v11_0_ext_disable +ffffffff81dd87c0 t dce_v11_0_set_crtc_irq_state +ffffffff81dd88a0 t dce_v11_0_crtc_irq +ffffffff81dd8ac0 t dce_v11_0_set_crtc_vblank_interrupt_state +ffffffff81dd8b90 t dce_v11_0_set_crtc_vline_interrupt_state +ffffffff81dd8c60 t dce_v11_0_set_pageflip_irq_state +ffffffff81dd8d10 t dce_v11_0_pageflip_irq +ffffffff81dd8e70 t dce_v11_0_set_hpd_irq_state +ffffffff81dd8f40 t dce_v11_0_hpd_irq +ffffffff81dd9060 t dce_v11_0_crtc_cursor_set2 +ffffffff81dd93d0 t dce_v11_0_crtc_cursor_move +ffffffff81dd94b0 t dce_v11_0_crtc_gamma_set +ffffffff81dd94f0 t dce_v11_0_crtc_destroy +ffffffff81dd9520 t amdgpu_bo_reserve +ffffffff81dd9710 t amdgpu_bo_unreserve +ffffffff81dd97f0 t dce_v11_0_cursor_move_locked +ffffffff81dd9940 t dce_v11_0_crtc_load_lut +ffffffff81dd9cb0 t dce_v11_0_crtc_dpms +ffffffff81dd9e80 t dce_v11_0_crtc_prepare +ffffffff81dd9ec0 t dce_v11_0_crtc_commit +ffffffff81dd9ef0 t dce_v11_0_crtc_mode_fixup +ffffffff81dda160 t dce_v11_0_crtc_mode_set +ffffffff81dda3c0 t dce_v11_0_crtc_set_base +ffffffff81dda3e0 t dce_v11_0_crtc_set_base_atomic +ffffffff81dda400 t dce_v11_0_crtc_disable +ffffffff81dda5a0 t dce_v11_0_crtc_do_set_base +ffffffff81ddb000 t df_v1_7_sw_init +ffffffff81ddb040 t df_v1_7_sw_fini +ffffffff81ddb070 t df_v1_7_enable_broadcast_mode +ffffffff81ddb190 t df_v1_7_get_fb_channel_number +ffffffff81ddb210 t df_v1_7_get_hbm_channel_number +ffffffff81ddb260 t df_v1_7_update_medium_grain_clock_gating +ffffffff81ddb3d0 t df_v1_7_get_clockgating_state +ffffffff81ddb460 t df_v1_7_enable_ecc_force_par_wr_rmw +ffffffff81ddc000 t df_v3_6_sw_init +ffffffff81ddc150 t df_v3_6_sw_fini +ffffffff81ddc180 t df_v3_6_enable_broadcast_mode +ffffffff81ddc2a0 t df_v3_6_get_fb_channel_number +ffffffff81ddc380 t df_v3_6_get_hbm_channel_number +ffffffff81ddc3d0 t df_v3_6_update_medium_grain_clock_gating +ffffffff81ddc570 t df_v3_6_get_clockgating_state +ffffffff81ddc600 t df_v3_6_pmc_start +ffffffff81ddc980 t df_v3_6_pmc_stop +ffffffff81ddcc20 t df_v3_6_pmc_get_count +ffffffff81ddcdb0 t df_v3_6_get_fica +ffffffff81ddcec0 t df_v3_6_set_fica +ffffffff81ddcfa0 t df_v3_6_query_ras_poison_mode +ffffffff81ddd110 t df_v3_6_perfmon_arm_with_status +ffffffff81dde000 T dimgrey_cavefish_reg_base_init +ffffffff81ddf000 T emu_soc_asic_init +ffffffff81de0000 t gfx_v10_0_early_init +ffffffff81de0420 t gfx_v10_0_late_init +ffffffff81de0490 t gfx_v10_0_sw_init +ffffffff81de1830 t gfx_v10_0_sw_fini +ffffffff81de1b70 t gfx_v10_0_hw_init +ffffffff81de4710 t gfx_v10_0_hw_fini +ffffffff81de4a00 t gfx_v10_0_suspend +ffffffff81de4a40 t gfx_v10_0_resume +ffffffff81de4a50 t gfx_v10_0_is_idle +ffffffff81de4ae0 t gfx_v10_0_wait_for_idle +ffffffff81de4bc0 t gfx_v10_0_soft_reset +ffffffff81de4f10 t gfx_v10_0_set_clockgating_state +ffffffff81de51b0 t gfx_v10_0_set_powergating_state +ffffffff81de5270 t gfx_v10_0_get_clockgating_state +ffffffff81de5380 t gfx10_kiq_set_resources +ffffffff81de56b0 t gfx10_kiq_map_queues +ffffffff81de5a40 t gfx10_kiq_unmap_queues +ffffffff81de5e40 t gfx10_kiq_query_status +ffffffff81de6140 t gfx10_kiq_invalidate_tlbs +ffffffff81de6260 t gfx_v10_0_ring_get_rptr_compute +ffffffff81de6290 t gfx_v10_0_ring_get_wptr_compute +ffffffff81de6300 t gfx_v10_0_ring_set_wptr_compute +ffffffff81de6440 t gfx_v10_0_ring_emit_ib_compute +ffffffff81de6790 t gfx_v10_0_ring_emit_fence_kiq +ffffffff81de6be0 t gfx_v10_0_ring_test_ring +ffffffff81de6e50 t gfx_v10_0_ring_test_ib +ffffffff81de7100 t gfx_v10_0_ring_emit_rreg +ffffffff81de73a0 t gfx_v10_0_ring_emit_wreg +ffffffff81de75e0 t gfx_v10_0_ring_emit_reg_wait +ffffffff81de7630 t gfx_v10_0_ring_emit_reg_write_reg_wait +ffffffff81de76c0 t gfx_v10_0_wait_reg_mem +ffffffff81de79f0 t gfx_v10_0_ring_get_rptr_gfx +ffffffff81de7a20 t gfx_v10_0_ring_get_wptr_gfx +ffffffff81de7b30 t gfx_v10_0_ring_set_wptr_gfx +ffffffff81de7d40 t gfx_v10_0_ring_emit_ib_gfx +ffffffff81de83f0 t gfx_v10_0_ring_emit_fence +ffffffff81de87c0 t gfx_v10_0_ring_emit_pipeline_sync +ffffffff81de8820 t gfx_v10_0_ring_emit_vm_flush +ffffffff81de89f0 t gfx_v10_0_ring_emit_hdp_flush +ffffffff81de8ac0 t gfx_v10_0_ring_emit_gds_switch +ffffffff81de8ba0 t gfx_v10_0_ring_emit_init_cond_exec +ffffffff81de8dd0 t gfx_v10_0_ring_emit_patch_cond_exec +ffffffff81de8e90 t gfx_v10_0_ring_emit_sb +ffffffff81de8f80 t gfx_v10_0_ring_emit_cntxcntl +ffffffff81de9470 t gfx_v10_0_ring_emit_frame_cntl +ffffffff81de9580 t gfx_v10_0_ring_soft_recovery +ffffffff81de95f0 t gfx_v10_0_ring_preempt_ib +ffffffff81de9760 t gfx_v10_0_emit_mem_sync +ffffffff81de9aa0 t gfx_v10_0_write_data_to_reg +ffffffff81de9cb0 t gfx_v10_0_set_eop_interrupt_state +ffffffff81de9d90 t gfx_v10_0_eop_irq +ffffffff81de9f60 t gfx_v10_0_set_gfx_eop_interrupt_state +ffffffff81dea0f0 t gfx_v10_0_set_compute_eop_interrupt_state +ffffffff81dea2a0 t gfx_v10_0_kiq_set_interrupt_state +ffffffff81dea580 t gfx_v10_0_kiq_irq +ffffffff81dea600 t gfx_v10_0_set_priv_reg_fault_state +ffffffff81dea720 t gfx_v10_0_priv_reg_irq +ffffffff81dea780 t gfx_v10_0_handle_priv_fault +ffffffff81dea910 t gfx_v10_0_set_priv_inst_fault_state +ffffffff81deaa30 t gfx_v10_0_priv_inst_irq +ffffffff81deaa90 t gfx_v10_0_is_rlc_enabled +ffffffff81deab10 t gfx_v10_0_set_safe_mode +ffffffff81deadb0 t gfx_v10_0_unset_safe_mode +ffffffff81deae60 t gfx_v10_0_rlc_init +ffffffff81deaee0 t gfx_v10_0_get_csb_size +ffffffff81deaf40 t gfx_v10_0_get_csb_buffer +ffffffff81deb0c0 t gfx_v10_0_rlc_resume +ffffffff81debbc0 t gfx_v10_0_rlc_stop +ffffffff81debca0 t gfx_v10_0_rlc_reset +ffffffff81debe40 t gfx_v10_0_rlc_start +ffffffff81debfe0 t gfx_v10_0_update_spm_vmid +ffffffff81dec110 t gfx_v10_0_wait_for_rlc_autoload_complete +ffffffff81decc80 t gfx_v10_0_init_csb +ffffffff81decf50 t gfx_v10_0_is_rlcg_access_range +ffffffff81decf80 t gfx_v10_0_gfx_mqd_init +ffffffff81ded360 t gfx_v10_0_compute_mqd_init +ffffffff81ded800 t amdgpu_bo_unreserve +ffffffff81ded8e0 t gfx_v10_0_get_gpu_clock_counter +ffffffff81dedde0 t gfx_v10_0_select_se_sh +ffffffff81dede80 t gfx_v10_0_read_wave_data +ffffffff81dee0e0 t gfx_v10_0_read_wave_vgprs +ffffffff81dee110 t gfx_v10_0_read_wave_sgprs +ffffffff81dee190 t gfx_v10_0_select_me_pipe_q +ffffffff81dee1b0 t gfx_v10_0_init_spm_golden_registers +ffffffff81dee220 t gfx_v10_0_update_perfmon_mgcg +ffffffff81dee340 t wave_read_ind +ffffffff81dee420 t wave_read_regs +ffffffff81dee580 t gfx_v10_0_cp_resume +ffffffff81df11c0 t gfx_v10_3_get_disabled_sa +ffffffff81df12d0 t gfx_v10_0_get_rb_active_bitmap +ffffffff81df13f0 t gfx_v10_0_get_wgp_active_bitmap_per_sh +ffffffff81df1500 t gfx_v10_0_enable_gui_idle_interrupt +ffffffff81df1610 t gfx_v10_0_cp_gfx_enable +ffffffff81df1850 t gfx_v10_0_cp_compute_enable +ffffffff81df19e0 t amdgpu_bo_reserve +ffffffff81df1b50 t gfx_v10_0_kiq_init_register +ffffffff81df29c0 t gfx_v10_0_cp_gfx_switch_pipe +ffffffff81df2ac0 t gfx_v10_0_cp_gfx_set_doorbell +ffffffff81df2d90 t gfx_v10_0_cp_gfx_start +ffffffff81df3770 t gfx_v10_0_update_fine_grain_clock_gating +ffffffff81df3a90 t gfx_v10_0_update_medium_grain_clock_gating +ffffffff81df41b0 t gfx_v10_0_update_3d_clock_gating +ffffffff81df4570 t gfx_v10_0_update_coarse_grain_clock_gating +ffffffff81df4930 t gfx_v10_cntl_pg +ffffffff81df5000 t gfx_v11_0_early_init +ffffffff81df53a0 t gfx_v11_0_late_init +ffffffff81df5410 t gfx_v11_0_sw_init +ffffffff81df6350 t gfx_v11_0_sw_fini +ffffffff81df6630 t gfx_v11_0_hw_init +ffffffff81dfaa80 t gfx_v11_0_hw_fini +ffffffff81dfad00 t gfx_v11_0_suspend +ffffffff81dfad40 t gfx_v11_0_resume +ffffffff81dfad50 t gfx_v11_0_is_idle +ffffffff81dfade0 t gfx_v11_0_wait_for_idle +ffffffff81dfaec0 t gfx_v11_0_check_soft_reset +ffffffff81dfaff0 t gfx_v11_0_soft_reset +ffffffff81dfbcd0 t gfx_v11_0_post_soft_reset +ffffffff81dfbce0 t gfx_v11_0_set_clockgating_state +ffffffff81dfc8c0 t gfx_v11_0_set_powergating_state +ffffffff81dfc960 t gfx_v11_0_get_clockgating_state +ffffffff81dfcb30 t gfx11_kiq_set_resources +ffffffff81dfce60 t gfx11_kiq_map_queues +ffffffff81dfd1f0 t gfx11_kiq_unmap_queues +ffffffff81dfd5f0 t gfx11_kiq_query_status +ffffffff81dfd8f0 t gfx11_kiq_invalidate_tlbs +ffffffff81dfda10 t gfx_v11_0_ring_get_rptr_compute +ffffffff81dfda40 t gfx_v11_0_ring_get_wptr_compute +ffffffff81dfdab0 t gfx_v11_0_ring_set_wptr_compute +ffffffff81dfdbf0 t gfx_v11_0_ring_emit_ib_compute +ffffffff81dfdf40 t gfx_v11_0_ring_emit_fence_kiq +ffffffff81dfe380 t gfx_v11_0_ring_test_ring +ffffffff81dfe610 t gfx_v11_0_ring_test_ib +ffffffff81dfe8d0 t gfx_v11_0_ring_emit_rreg +ffffffff81dfeb70 t gfx_v11_0_ring_emit_wreg +ffffffff81dfedb0 t gfx_v11_0_ring_emit_reg_wait +ffffffff81dfee00 t gfx_v11_0_ring_emit_reg_write_reg_wait +ffffffff81dfee70 t gfx_v11_0_wait_reg_mem +ffffffff81dff1a0 t gfx_v11_0_ring_get_rptr_gfx +ffffffff81dff1d0 t gfx_v11_0_ring_get_wptr_gfx +ffffffff81dff2e0 t gfx_v11_0_ring_set_wptr_gfx +ffffffff81dff4f0 t gfx_v11_0_ring_emit_ib_gfx +ffffffff81dffb90 t gfx_v11_0_ring_emit_fence +ffffffff81dfff60 t gfx_v11_0_ring_emit_pipeline_sync +ffffffff81dfffc0 t gfx_v11_0_ring_emit_vm_flush +ffffffff81e00190 t gfx_v11_0_ring_emit_hdp_flush +ffffffff81e00260 t gfx_v11_0_ring_emit_gds_switch +ffffffff81e00340 t gfx_v11_0_ring_emit_init_cond_exec +ffffffff81e00570 t gfx_v11_0_ring_emit_patch_cond_exec +ffffffff81e00630 t gfx_v11_0_ring_emit_cntxcntl +ffffffff81e00790 t gfx_v11_0_ring_emit_frame_cntl +ffffffff81e008a0 t gfx_v11_0_ring_soft_recovery +ffffffff81e00910 t gfx_v11_0_ring_preempt_ib +ffffffff81e00a80 t gfx_v11_0_emit_mem_sync +ffffffff81e00dc0 t gfx_v11_0_write_data_to_reg +ffffffff81e00fd0 t gfx_v11_0_set_eop_interrupt_state +ffffffff81e01060 t gfx_v11_0_eop_irq +ffffffff81e01230 t gfx_v11_0_set_gfx_eop_interrupt_state +ffffffff81e013c0 t gfx_v11_0_set_compute_eop_interrupt_state +ffffffff81e01550 t gfx_v11_0_set_priv_reg_fault_state +ffffffff81e01670 t gfx_v11_0_priv_reg_irq +ffffffff81e016d0 t gfx_v11_0_handle_priv_fault +ffffffff81e01860 t gfx_v11_0_set_priv_inst_fault_state +ffffffff81e01980 t gfx_v11_0_priv_inst_irq +ffffffff81e019e0 t gfx_v11_0_is_rlc_enabled +ffffffff81e01a60 t gfx_v11_0_set_safe_mode +ffffffff81e01bb0 t gfx_v11_0_unset_safe_mode +ffffffff81e01c20 t gfx_v11_0_rlc_init +ffffffff81e01ca0 t gfx_v11_0_get_csb_size +ffffffff81e01d00 t gfx_v11_0_get_csb_buffer +ffffffff81e01e80 t gfx_v11_0_rlc_resume +ffffffff81e02ba0 t gfx_v11_0_rlc_stop +ffffffff81e02c80 t gfx_v11_0_rlc_reset +ffffffff81e02e20 t gfx_v11_0_rlc_start +ffffffff81e02fc0 t gfx_v11_0_update_spm_vmid +ffffffff81e030c0 t gfx_v11_0_init_csb +ffffffff81e03240 t gfx_v11_0_gfx_mqd_init +ffffffff81e03610 t gfx_v11_0_compute_mqd_init +ffffffff81e03b30 t amdgpu_bo_unreserve +ffffffff81e03c10 t gfx_v11_0_get_gpu_clock_counter +ffffffff81e03f70 t gfx_v11_0_select_se_sh +ffffffff81e04010 t gfx_v11_0_read_wave_data +ffffffff81e04250 t gfx_v11_0_read_wave_vgprs +ffffffff81e04280 t gfx_v11_0_read_wave_sgprs +ffffffff81e04300 t gfx_v11_0_select_me_pipe_q +ffffffff81e04320 t gfx_v11_0_update_perf_clk +ffffffff81e04450 t wave_read_ind +ffffffff81e04530 t wave_read_regs +ffffffff81e04690 t gfx_v11_0_disable_gpa_mode +ffffffff81e04820 t gfx_v11_0_cp_resume +ffffffff81e088a0 t gfx_v11_0_config_me_cache +ffffffff81e08c40 t gfx_v11_0_config_pfp_cache +ffffffff81e08fe0 t gfx_v11_0_config_mec_cache +ffffffff81e09380 t gfx_v11_0_enable_gui_idle_interrupt +ffffffff81e09490 t gfx_v11_0_cp_compute_enable +ffffffff81e09660 t gfx_v11_0_cp_gfx_enable +ffffffff81e09850 t amdgpu_bo_reserve +ffffffff81e099c0 t gfx_v11_0_kiq_init_register +ffffffff81e0a830 t gfx_v11_0_cp_gfx_switch_pipe +ffffffff81e0a910 t gfx_v11_0_cp_gfx_set_doorbell +ffffffff81e0aaf0 t gfx_v11_0_cp_gfx_start +ffffffff81e0b3b0 t gfx_v11_cntl_pg +ffffffff81e0c000 t gfx_v8_0_early_init +ffffffff81e0c320 t gfx_v8_0_late_init +ffffffff81e0ca20 t gfx_v8_0_sw_init +ffffffff81e0e0f0 t gfx_v8_0_sw_fini +ffffffff81e0e3b0 t gfx_v8_0_hw_init +ffffffff81e105d0 t gfx_v8_0_hw_fini +ffffffff81e10ac0 t gfx_v8_0_suspend +ffffffff81e10b00 t gfx_v8_0_resume +ffffffff81e10b10 t gfx_v8_0_is_idle +ffffffff81e10b80 t gfx_v8_0_wait_for_idle +ffffffff81e10c30 t gfx_v8_0_check_soft_reset +ffffffff81e10d10 t gfx_v8_0_pre_soft_reset +ffffffff81e10e90 t gfx_v8_0_soft_reset +ffffffff81e11050 t gfx_v8_0_post_soft_reset +ffffffff81e11210 t gfx_v8_0_set_clockgating_state +ffffffff81e114d0 t gfx_v8_0_set_powergating_state +ffffffff81e11890 t gfx_v8_0_get_clockgating_state +ffffffff81e11970 t gfx_v8_0_get_gpu_clock_counter +ffffffff81e11a10 t gfx_v8_0_select_se_sh +ffffffff81e11a70 t gfx_v8_0_read_wave_data +ffffffff81e11f10 t gfx_v8_0_read_wave_sgprs +ffffffff81e11fc0 t gfx_v8_0_select_me_pipe_q +ffffffff81e11fe0 t gfx_v8_0_ring_get_rptr +ffffffff81e12010 t gfx_v8_0_ring_get_wptr_compute +ffffffff81e12040 t gfx_v8_0_ring_set_wptr_compute +ffffffff81e12080 t gfx_v8_0_ring_emit_fence_kiq +ffffffff81e124b0 t gfx_v8_0_ring_test_ring +ffffffff81e126b0 t gfx_v8_0_ring_emit_rreg +ffffffff81e12950 t gfx_v8_0_ring_emit_wreg +ffffffff81e12b90 t gfx_v8_0_ring_get_wptr_gfx +ffffffff81e12bf0 t gfx_v8_0_ring_set_wptr_gfx +ffffffff81e12c60 t gfx_v8_0_ring_emit_ib_gfx +ffffffff81e131c0 t gfx_v8_0_ring_emit_fence_gfx +ffffffff81e136c0 t gfx_v8_0_ring_emit_pipeline_sync +ffffffff81e139b0 t gfx_v8_0_ring_emit_vm_flush +ffffffff81e13d60 t gfx_v8_0_ring_emit_hdp_flush +ffffffff81e14080 t gfx_v8_0_ring_emit_gds_switch +ffffffff81e14850 t gfx_v8_0_ring_test_ib +ffffffff81e14a00 t gfx_v8_0_ring_emit_init_cond_exec +ffffffff81e14c30 t gfx_v8_0_ring_emit_patch_cond_exec +ffffffff81e14ce0 t gfx_v8_ring_emit_sb +ffffffff81e14dd0 t gfx_v8_ring_emit_cntxcntl +ffffffff81e15370 t gfx_v8_0_ring_soft_recovery +ffffffff81e153a0 t gfx_v8_0_emit_mem_sync +ffffffff81e155b0 t gfx_v8_0_ring_emit_ib_compute +ffffffff81e158c0 t gfx_v8_0_ring_emit_fence_compute +ffffffff81e15bc0 t gfx_v8_0_emit_mem_sync_compute +ffffffff81e15e80 t gfx_v8_0_emit_wave_limit +ffffffff81e16030 t gfx_v8_0_set_eop_interrupt_state +ffffffff81e16240 t gfx_v8_0_eop_irq +ffffffff81e16370 t gfx_v8_0_set_priv_reg_fault_state +ffffffff81e163f0 t gfx_v8_0_priv_reg_irq +ffffffff81e16510 t gfx_v8_0_set_priv_inst_fault_state +ffffffff81e16590 t gfx_v8_0_priv_inst_irq +ffffffff81e166b0 t gfx_v8_0_set_cp_ecc_int_state +ffffffff81e16920 t gfx_v8_0_cp_ecc_error_irq +ffffffff81e16970 t gfx_v8_0_set_sq_int_state +ffffffff81e16a00 t gfx_v8_0_sq_irq +ffffffff81e16aa0 t gfx_v8_0_parse_sq_irq +ffffffff81e16cf0 t gfx_v8_0_is_rlc_enabled +ffffffff81e16d30 t gfx_v8_0_set_safe_mode +ffffffff81e16e30 t gfx_v8_0_unset_safe_mode +ffffffff81e16ed0 t gfx_v8_0_rlc_init +ffffffff81e16f80 t gfx_v8_0_get_csb_size +ffffffff81e16fe0 t gfx_v8_0_get_csb_buffer +ffffffff81e17160 t gfx_v8_0_cp_jump_table_num +ffffffff81e171a0 t gfx_v8_0_rlc_resume +ffffffff81e17530 t gfx_v8_0_rlc_stop +ffffffff81e175a0 t gfx_v8_0_rlc_reset +ffffffff81e17620 t gfx_v8_0_rlc_start +ffffffff81e176a0 t gfx_v8_0_update_spm_vmid +ffffffff81e17710 t gfx_v8_0_init_save_restore_list +ffffffff81e17b30 t gfx_v8_0_wait_for_rlc_serdes +ffffffff81e17d50 t gfx_v8_0_sq_irq_work_func +ffffffff81e17d70 t amdgpu_bo_unreserve +ffffffff81e17e50 t gfx_v8_0_kiq_resume +ffffffff81e180b0 t gfx_v8_0_cp_gfx_resume +ffffffff81e18bd0 t gfx_v8_0_kcq_resume +ffffffff81e19600 t amdgpu_bo_reserve +ffffffff81e19770 t gfx_v8_0_mqd_commit +ffffffff81e19950 t gfx_v8_0_mqd_init +ffffffff81e19d70 t gfx_v8_0_deactivate_hqd +ffffffff81e19e30 t gfx_v8_0_update_medium_grain_clock_gating +ffffffff81e1a160 t gfx_v8_0_update_coarse_grain_clock_gating +ffffffff81e1b000 t gfx_v9_0_ras_error_inject +ffffffff81e1b1a0 t gfx_v9_0_query_ras_error_count +ffffffff81e1bd40 t gfx_v9_0_reset_ras_error_count +ffffffff81e1c780 T gfx_v9_0_select_se_sh +ffffffff81e1c820 t gfx_v9_0_early_init +ffffffff81e1cc80 t gfx_v9_0_late_init +ffffffff81e1d990 t gfx_v9_0_sw_init +ffffffff81e1efe0 t gfx_v9_0_sw_fini +ffffffff81e1f290 t gfx_v9_0_hw_init +ffffffff81e22340 t gfx_v9_0_hw_fini +ffffffff81e22ab0 t gfx_v9_0_suspend +ffffffff81e22af0 t gfx_v9_0_resume +ffffffff81e22b00 t gfx_v9_0_is_idle +ffffffff81e22b80 t gfx_v9_0_wait_for_idle +ffffffff81e22c60 t gfx_v9_0_soft_reset +ffffffff81e22ff0 t gfx_v9_0_set_clockgating_state +ffffffff81e230c0 t gfx_v9_0_set_powergating_state +ffffffff81e234c0 t gfx_v9_0_get_clockgating_state +ffffffff81e235d0 t gfx_v9_0_kiq_set_resources +ffffffff81e23900 t gfx_v9_0_kiq_map_queues +ffffffff81e23c40 t gfx_v9_0_kiq_unmap_queues +ffffffff81e23fc0 t gfx_v9_0_kiq_query_status +ffffffff81e242c0 t gfx_v9_0_kiq_invalidate_tlbs +ffffffff81e243e0 t gfx_v9_0_ring_get_rptr_compute +ffffffff81e24410 t gfx_v9_0_ring_get_wptr_compute +ffffffff81e24480 t gfx_v9_0_ring_set_wptr_compute +ffffffff81e244e0 t gfx_v9_0_ring_emit_fence_kiq +ffffffff81e24920 t gfx_v9_0_ring_test_ring +ffffffff81e24b50 t gfx_v9_0_ring_emit_rreg +ffffffff81e24df0 t gfx_v9_0_ring_emit_wreg +ffffffff81e25030 t gfx_v9_0_ring_emit_reg_wait +ffffffff81e25080 t gfx_v9_0_ring_emit_reg_write_reg_wait +ffffffff81e25120 t gfx_v9_0_wait_reg_mem +ffffffff81e25450 t gfx_v9_0_ring_get_rptr_gfx +ffffffff81e25480 t gfx_v9_0_ring_get_wptr_gfx +ffffffff81e25590 t gfx_v9_0_ring_set_wptr_gfx +ffffffff81e256c0 t gfx_v9_0_ring_emit_ib_gfx +ffffffff81e25be0 t gfx_v9_0_ring_emit_fence +ffffffff81e25fa0 t gfx_v9_0_ring_emit_pipeline_sync +ffffffff81e26000 t gfx_v9_0_ring_emit_vm_flush +ffffffff81e26110 t gfx_v9_0_ring_emit_hdp_flush +ffffffff81e261e0 t gfx_v9_0_ring_emit_gds_switch +ffffffff81e262c0 t gfx_v9_0_ring_test_ib +ffffffff81e26470 t gfx_v9_0_ring_emit_init_cond_exec +ffffffff81e266a0 t gfx_v9_0_ring_emit_patch_cond_exec +ffffffff81e26770 t gfx_v9_ring_emit_sb +ffffffff81e26860 t gfx_v9_ring_emit_cntxcntl +ffffffff81e26c60 t gfx_v9_0_ring_emit_frame_cntl +ffffffff81e26d70 t gfx_v9_0_ring_soft_recovery +ffffffff81e26de0 t gfx_v9_0_emit_mem_sync +ffffffff81e270a0 t gfx_v9_0_write_data_to_reg +ffffffff81e272b0 t gfx_v9_0_ring_emit_ib_compute +ffffffff81e275e0 t gfx_v9_0_emit_wave_limit +ffffffff81e277b0 t gfx_v9_0_set_eop_interrupt_state +ffffffff81e27980 t gfx_v9_0_eop_irq +ffffffff81e27ab0 t gfx_v9_0_set_compute_eop_interrupt_state +ffffffff81e27c60 t gfx_v9_0_set_priv_reg_fault_state +ffffffff81e27d80 t gfx_v9_0_priv_reg_irq +ffffffff81e27ea0 t gfx_v9_0_set_priv_inst_fault_state +ffffffff81e27fc0 t gfx_v9_0_priv_inst_irq +ffffffff81e280e0 t gfx_v9_0_set_cp_ecc_error_state +ffffffff81e28910 t gfx_v9_0_is_rlc_enabled +ffffffff81e28990 t gfx_v9_0_set_safe_mode +ffffffff81e28ae0 t gfx_v9_0_unset_safe_mode +ffffffff81e28b50 t gfx_v9_0_rlc_init +ffffffff81e29360 t gfx_v9_0_get_csb_size +ffffffff81e293c0 t gfx_v9_0_get_csb_buffer +ffffffff81e29510 t gfx_v9_0_cp_jump_table_num +ffffffff81e29560 t gfx_v9_0_rlc_resume +ffffffff81e2a300 t gfx_v9_0_rlc_stop +ffffffff81e2a7a0 t gfx_v9_0_rlc_reset +ffffffff81e2a930 t gfx_v9_0_rlc_start +ffffffff81e2aa70 t gfx_v9_0_update_spm_vmid +ffffffff81e2aba0 t gfx_v9_0_is_rlcg_access_range +ffffffff81e2abf0 t gfx_v9_0_init_always_on_cu_mask +ffffffff81e2af50 t gfx_v9_0_init_csb +ffffffff81e2b0e0 t gfx_v9_0_enable_lbpw +ffffffff81e2b1d0 t gfx_v9_0_enable_gui_idle_interrupt +ffffffff81e2b2d0 t amdgpu_bo_unreserve +ffffffff81e2b3b0 t gfx_v9_0_get_gpu_clock_counter +ffffffff81e2bb30 t gfx_v9_0_read_wave_data +ffffffff81e2bd70 t gfx_v9_0_read_wave_vgprs +ffffffff81e2bd90 t gfx_v9_0_read_wave_sgprs +ffffffff81e2bde0 t gfx_v9_0_select_me_pipe_q +ffffffff81e2be00 t wave_read_ind +ffffffff81e2bf10 t wave_read_regs +ffffffff81e2c080 t gfx_v9_0_cp_gfx_enable +ffffffff81e2c160 t amdgpu_bo_reserve +ffffffff81e2c2d0 t gfx_v9_0_kiq_init_register +ffffffff81e2cf50 t gfx_v9_0_mqd_init +ffffffff81e2d490 t gfx_v9_0_update_medium_grain_clock_gating +ffffffff81e2d9a0 t gfx_v9_0_update_3d_clock_gating +ffffffff81e2dd80 t gfx_v9_0_update_coarse_grain_clock_gating +ffffffff81e2f000 t gfx_v9_4_ras_error_inject +ffffffff81e2f130 t gfx_v9_4_query_ras_error_count +ffffffff81e2fef0 t gfx_v9_4_query_ras_error_status +ffffffff81e300c0 t gfx_v9_4_reset_ras_error_count +ffffffff81e31000 T gfx_v9_4_2_do_edc_gpr_workarounds +ffffffff81e31760 T gfx_v9_4_2_init_golden_registers +ffffffff81e317f0 T gfx_v9_4_2_debug_trap_config_init +ffffffff81e31890 T gfx_v9_4_2_set_power_brake_sequence +ffffffff81e31a60 t gfx_v9_4_2_ras_error_inject +ffffffff81e31b90 t gfx_v9_4_2_query_ras_error_count +ffffffff81e31c40 t gfx_v9_4_2_query_ras_error_status +ffffffff81e32490 t gfx_v9_4_2_reset_ras_error_count +ffffffff81e324f0 t gfx_v9_4_2_reset_ras_error_status +ffffffff81e329b0 t gfx_v9_4_2_enable_watchdog_timer +ffffffff81e32bd0 t gfx_v9_4_2_query_uctl2_poison_status +ffffffff81e32c50 t gfx_v9_4_2_run_shader +ffffffff81e32fd0 t gfx_v9_4_2_wait_for_waves_assigned +ffffffff81e33610 t gfx_v9_4_2_query_sram_edc_count +ffffffff81e33960 t gfx_v9_4_2_query_utc_edc_count +ffffffff81e33b40 t wave_read_ind +ffffffff81e34000 t gfxhub_v1_0_get_mc_fb_offset +ffffffff81e34090 t gfxhub_v1_0_setup_vm_pt_regs +ffffffff81e341d0 t gfxhub_v1_0_gart_enable +ffffffff81e356c0 t gfxhub_v1_0_gart_disable +ffffffff81e35950 t gfxhub_v1_0_set_fault_enable_default +ffffffff81e35a40 t gfxhub_v1_0_init +ffffffff81e36000 T gfxhub_v1_1_get_xgmi_info +ffffffff81e37000 t gfxhub_v2_0_get_fb_location +ffffffff81e37090 t gfxhub_v2_0_get_mc_fb_offset +ffffffff81e37120 t gfxhub_v2_0_setup_vm_pt_regs +ffffffff81e37260 t gfxhub_v2_0_gart_enable +ffffffff81e38460 t gfxhub_v2_0_gart_disable +ffffffff81e386a0 t gfxhub_v2_0_set_fault_enable_default +ffffffff81e38790 t gfxhub_v2_0_init +ffffffff81e38860 t gfxhub_v2_0_print_l2_protection_fault_status +ffffffff81e38a30 t gfxhub_v2_0_get_invalidate_req +ffffffff81e39000 t gfxhub_v2_1_get_fb_location +ffffffff81e39090 t gfxhub_v2_1_get_mc_fb_offset +ffffffff81e39120 t gfxhub_v2_1_setup_vm_pt_regs +ffffffff81e39260 t gfxhub_v2_1_gart_enable +ffffffff81e3a540 t gfxhub_v2_1_gart_disable +ffffffff81e3a7c0 t gfxhub_v2_1_set_fault_enable_default +ffffffff81e3a8d0 t gfxhub_v2_1_init +ffffffff81e3a9a0 t gfxhub_v2_1_get_xgmi_info +ffffffff81e3aad0 t gfxhub_v2_1_utcl2_harvest +ffffffff81e3acb0 t gfxhub_v2_1_save_regs +ffffffff81e3b6e0 t gfxhub_v2_1_restore_regs +ffffffff81e3c2c0 t gfxhub_v2_1_halt +ffffffff81e3c680 t gfxhub_v2_1_print_l2_protection_fault_status +ffffffff81e3c850 t gfxhub_v2_1_get_invalidate_req +ffffffff81e3d000 t gfxhub_v3_0_get_fb_location +ffffffff81e3d090 t gfxhub_v3_0_get_mc_fb_offset +ffffffff81e3d120 t gfxhub_v3_0_setup_vm_pt_regs +ffffffff81e3d260 t gfxhub_v3_0_gart_enable +ffffffff81e3e4e0 t gfxhub_v3_0_gart_disable +ffffffff81e3e760 t gfxhub_v3_0_set_fault_enable_default +ffffffff81e3eb00 t gfxhub_v3_0_init +ffffffff81e3ebd0 t gfxhub_v3_0_print_l2_protection_fault_status +ffffffff81e3eda0 t gfxhub_v3_0_get_invalidate_req +ffffffff81e3f000 t gfxhub_v3_0_3_get_fb_location +ffffffff81e3f090 t gfxhub_v3_0_3_get_mc_fb_offset +ffffffff81e3f120 t gfxhub_v3_0_3_setup_vm_pt_regs +ffffffff81e3f260 t gfxhub_v3_0_3_gart_enable +ffffffff81e404f0 t gfxhub_v3_0_3_gart_disable +ffffffff81e40790 t gfxhub_v3_0_3_set_fault_enable_default +ffffffff81e408a0 t gfxhub_v3_0_3_init +ffffffff81e40970 t gfxhub_v3_0_3_print_l2_protection_fault_status +ffffffff81e40b40 t gfxhub_v3_0_3_get_invalidate_req +ffffffff81e41000 t gmc_v10_0_early_init +ffffffff81e411f0 t gmc_v10_0_late_init +ffffffff81e41260 t gmc_v10_0_sw_init +ffffffff81e41680 t gmc_v10_0_sw_fini +ffffffff81e416d0 t gmc_v10_0_hw_init +ffffffff81e41890 t gmc_v10_0_hw_fini +ffffffff81e41920 t gmc_v10_0_suspend +ffffffff81e419b0 t gmc_v10_0_resume +ffffffff81e41a10 t gmc_v10_0_is_idle +ffffffff81e41a40 t gmc_v10_0_wait_for_idle +ffffffff81e41a70 t gmc_v10_0_soft_reset +ffffffff81e41aa0 t gmc_v10_0_set_clockgating_state +ffffffff81e41b50 t gmc_v10_0_set_powergating_state +ffffffff81e41b80 t gmc_v10_0_get_clockgating_state +ffffffff81e41c20 t gmc_v10_0_flush_gpu_tlb +ffffffff81e41ed0 t gmc_v10_0_flush_gpu_tlb_pasid +ffffffff81e420f0 t gmc_v10_0_emit_flush_gpu_tlb +ffffffff81e422a0 t gmc_v10_0_emit_pasid_mapping +ffffffff81e42310 t gmc_v10_0_map_mtype +ffffffff81e42360 t gmc_v10_0_get_vm_pde +ffffffff81e42450 t gmc_v10_0_get_vm_pte +ffffffff81e42500 t gmc_v10_0_get_vbios_fb_size +ffffffff81e42670 t gmc_v10_0_flush_vm_hub +ffffffff81e42ad0 t gmc_v10_0_vm_fault_interrupt_state +ffffffff81e42b40 t gmc_v10_0_process_interrupt +ffffffff81e42e00 t gmc_v10_0_ecc_interrupt_state +ffffffff81e43000 t gmc_v11_0_early_init +ffffffff81e43230 t gmc_v11_0_late_init +ffffffff81e432a0 t gmc_v11_0_sw_init +ffffffff81e435c0 t gmc_v11_0_sw_fini +ffffffff81e43610 t gmc_v11_0_hw_init +ffffffff81e43750 t gmc_v11_0_hw_fini +ffffffff81e437d0 t gmc_v11_0_suspend +ffffffff81e43850 t gmc_v11_0_resume +ffffffff81e438b0 t gmc_v11_0_is_idle +ffffffff81e438e0 t gmc_v11_0_wait_for_idle +ffffffff81e43910 t gmc_v11_0_soft_reset +ffffffff81e43940 t gmc_v11_0_set_clockgating_state +ffffffff81e439c0 t gmc_v11_0_set_powergating_state +ffffffff81e439f0 t gmc_v11_0_get_clockgating_state +ffffffff81e43a30 t gmc_v11_0_flush_gpu_tlb +ffffffff81e43f00 t gmc_v11_0_flush_gpu_tlb_pasid +ffffffff81e440f0 t gmc_v11_0_emit_flush_gpu_tlb +ffffffff81e442a0 t gmc_v11_0_emit_pasid_mapping +ffffffff81e44310 t gmc_v11_0_map_mtype +ffffffff81e44360 t gmc_v11_0_get_vm_pde +ffffffff81e44460 t gmc_v11_0_get_vm_pte +ffffffff81e44510 t gmc_v11_0_get_vbios_fb_size +ffffffff81e44680 t gmc_v11_0_vm_fault_interrupt_state +ffffffff81e446f0 t gmc_v11_0_process_interrupt +ffffffff81e44910 t gmc_v11_0_ecc_interrupt_state +ffffffff81e45000 t gmc_v7_0_early_init +ffffffff81e45090 t gmc_v7_0_late_init +ffffffff81e450e0 t gmc_v7_0_sw_init +ffffffff81e455e0 t gmc_v7_0_sw_fini +ffffffff81e45690 t gmc_v7_0_hw_init +ffffffff81e46030 t gmc_v7_0_hw_fini +ffffffff81e460f0 t gmc_v7_0_suspend +ffffffff81e46130 t gmc_v7_0_resume +ffffffff81e46190 t gmc_v7_0_is_idle +ffffffff81e461e0 t gmc_v7_0_wait_for_idle +ffffffff81e46280 t gmc_v7_0_soft_reset +ffffffff81e464e0 t gmc_v7_0_set_clockgating_state +ffffffff81e46740 t gmc_v7_0_set_powergating_state +ffffffff81e46770 t gmc_v7_0_flush_gpu_tlb +ffffffff81e467a0 t gmc_v7_0_flush_gpu_tlb_pasid +ffffffff81e46860 t gmc_v7_0_emit_flush_gpu_tlb +ffffffff81e468f0 t gmc_v7_0_emit_pasid_mapping +ffffffff81e46920 t gmc_v7_0_set_prt +ffffffff81e46ad0 t gmc_v7_0_get_vm_pde +ffffffff81e46b30 t gmc_v7_0_get_vm_pte +ffffffff81e46b70 t gmc_v7_0_get_vbios_fb_size +ffffffff81e46be0 t gmc_v7_0_vm_fault_interrupt_state +ffffffff81e46cb0 t gmc_v7_0_process_interrupt +ffffffff81e47000 t gmc_v8_0_early_init +ffffffff81e47090 t gmc_v8_0_late_init +ffffffff81e470e0 t gmc_v8_0_sw_init +ffffffff81e47760 t gmc_v8_0_sw_fini +ffffffff81e47810 t gmc_v8_0_hw_init +ffffffff81e484b0 t gmc_v8_0_hw_fini +ffffffff81e48570 t gmc_v8_0_suspend +ffffffff81e485b0 t gmc_v8_0_resume +ffffffff81e48610 t gmc_v8_0_is_idle +ffffffff81e48660 t gmc_v8_0_wait_for_idle +ffffffff81e48700 t gmc_v8_0_check_soft_reset +ffffffff81e48770 t gmc_v8_0_pre_soft_reset +ffffffff81e488e0 t gmc_v8_0_soft_reset +ffffffff81e489b0 t gmc_v8_0_post_soft_reset +ffffffff81e48a20 t gmc_v8_0_set_clockgating_state +ffffffff81e48fe0 t gmc_v8_0_set_powergating_state +ffffffff81e49010 t gmc_v8_0_get_clockgating_state +ffffffff81e49080 t gmc_v8_0_flush_gpu_tlb +ffffffff81e490b0 t gmc_v8_0_flush_gpu_tlb_pasid +ffffffff81e49170 t gmc_v8_0_emit_flush_gpu_tlb +ffffffff81e49200 t gmc_v8_0_emit_pasid_mapping +ffffffff81e49230 t gmc_v8_0_set_prt +ffffffff81e493e0 t gmc_v8_0_get_vm_pde +ffffffff81e49440 t gmc_v8_0_get_vm_pte +ffffffff81e49490 t gmc_v8_0_get_vbios_fb_size +ffffffff81e49500 t gmc_v8_0_vm_fault_interrupt_state +ffffffff81e495d0 t gmc_v8_0_process_interrupt +ffffffff81e4a000 T gmc_v9_0_restore_registers +ffffffff81e4a150 t gmc_v9_0_early_init +ffffffff81e4a500 t gmc_v9_0_late_init +ffffffff81e4a610 t gmc_v9_0_sw_init +ffffffff81e4acc0 t gmc_v9_0_sw_fini +ffffffff81e4ad30 t gmc_v9_0_hw_init +ffffffff81e4b130 t gmc_v9_0_hw_fini +ffffffff81e4b1e0 t gmc_v9_0_suspend +ffffffff81e4b290 t gmc_v9_0_resume +ffffffff81e4b2f0 t gmc_v9_0_is_idle +ffffffff81e4b320 t gmc_v9_0_wait_for_idle +ffffffff81e4b350 t gmc_v9_0_soft_reset +ffffffff81e4b380 t gmc_v9_0_set_clockgating_state +ffffffff81e4b3e0 t gmc_v9_0_set_powergating_state +ffffffff81e4b410 t gmc_v9_0_get_clockgating_state +ffffffff81e4b450 t gmc_v9_0_flush_gpu_tlb +ffffffff81e4ba90 t gmc_v9_0_flush_gpu_tlb_pasid +ffffffff81e4bd60 t gmc_v9_0_emit_flush_gpu_tlb +ffffffff81e4bf30 t gmc_v9_0_emit_pasid_mapping +ffffffff81e4bfa0 t gmc_v9_0_map_mtype +ffffffff81e4bfe0 t gmc_v9_0_get_vm_pde +ffffffff81e4c0e0 t gmc_v9_0_get_vm_pte +ffffffff81e4c1b0 t gmc_v9_0_get_vbios_fb_size +ffffffff81e4c340 t gmc_v9_0_vm_fault_interrupt_state +ffffffff81e4c6c0 t gmc_v9_0_process_interrupt +ffffffff81e4cce0 t gmc_v9_0_ecc_interrupt_state +ffffffff81e4d000 t hdp_v4_0_query_ras_error_count +ffffffff81e4d0c0 t hdp_v4_0_reset_ras_error_count +ffffffff81e4d1e0 t hdp_v4_0_flush_hdp +ffffffff81e4d230 t hdp_v4_0_invalidate_hdp +ffffffff81e4d300 t hdp_v4_0_update_clock_gating +ffffffff81e4d400 t hdp_v4_0_get_clockgating_state +ffffffff81e4d450 t hdp_v4_0_init_registers +ffffffff81e4e000 t hdp_v5_0_flush_hdp +ffffffff81e4e050 t hdp_v5_0_invalidate_hdp +ffffffff81e4e0f0 t hdp_v5_0_update_clock_gating +ffffffff81e4e4e0 t hdp_v5_0_get_clockgating_state +ffffffff81e4e600 t hdp_v5_0_init_registers +ffffffff81e4f000 t hdp_v5_2_flush_hdp +ffffffff81e4f050 t hdp_v5_2_update_clock_gating +ffffffff81e4f440 t hdp_v5_2_get_clockgating_state +ffffffff81e50000 t hdp_v6_0_flush_hdp +ffffffff81e50050 t hdp_v6_0_update_clock_gating +ffffffff81e50360 t hdp_v6_0_get_clockgating_state +ffffffff81e51000 t iceland_ih_early_init +ffffffff81e51050 t iceland_ih_sw_init +ffffffff81e510b0 t iceland_ih_sw_fini +ffffffff81e510f0 t iceland_ih_hw_init +ffffffff81e51320 t iceland_ih_hw_fini +ffffffff81e513f0 t iceland_ih_suspend +ffffffff81e514c0 t iceland_ih_resume +ffffffff81e51500 t iceland_ih_is_idle +ffffffff81e51550 t iceland_ih_wait_for_idle +ffffffff81e515f0 t iceland_ih_soft_reset +ffffffff81e516d0 t iceland_ih_set_clockgating_state +ffffffff81e51700 t iceland_ih_set_powergating_state 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imu_v11_0_start +ffffffff81e548c0 t imu_v11_0_program_rlc_ram +ffffffff81e54a70 t imu_v11_0_wait_for_reset_status +ffffffff81e54bc0 t program_imu_rlc_ram +ffffffff81e55000 T imu_v11_0_3_program_rlc_ram +ffffffff81e56000 T jpeg_v1_0_early_init +ffffffff81e56060 T jpeg_v1_0_sw_init +ffffffff81e56130 T jpeg_v1_0_sw_fini +ffffffff81e56150 T jpeg_v1_0_start +ffffffff81e56bc0 t jpeg_v1_0_decode_ring_get_rptr +ffffffff81e56c50 t jpeg_v1_0_decode_ring_get_wptr +ffffffff81e56ce0 t jpeg_v1_0_decode_ring_set_wptr +ffffffff81e56d50 t jpeg_v1_0_decode_ring_emit_ib +ffffffff81e57660 t jpeg_v1_0_decode_ring_emit_fence +ffffffff81e57fc0 t jpeg_v1_0_decode_ring_emit_vm_flush +ffffffff81e58030 t jpeg_v1_0_decode_ring_nop +ffffffff81e58190 t jpeg_v1_0_decode_ring_insert_start +ffffffff81e58360 t jpeg_v1_0_decode_ring_insert_end +ffffffff81e58530 t jpeg_v1_0_ring_begin_use +ffffffff81e58630 t jpeg_v1_0_decode_ring_emit_wreg +ffffffff81e58890 t jpeg_v1_0_decode_ring_emit_reg_wait +ffffffff81e58cb0 t jpeg_v1_0_set_interrupt_state +ffffffff81e58ce0 t jpeg_v1_0_process_interrupt +ffffffff81e59000 T jpeg_v2_0_dec_ring_insert_start +ffffffff81e591b0 T jpeg_v2_0_dec_ring_insert_end +ffffffff81e59360 T jpeg_v2_0_dec_ring_emit_fence +ffffffff81e59a50 T jpeg_v2_0_dec_ring_emit_ib +ffffffff81e5a240 T jpeg_v2_0_dec_ring_emit_reg_wait +ffffffff81e5a600 T jpeg_v2_0_dec_ring_emit_vm_flush +ffffffff81e5a670 T jpeg_v2_0_dec_ring_emit_wreg +ffffffff81e5a8b0 T jpeg_v2_0_dec_ring_nop +ffffffff81e5aa10 t jpeg_v2_0_early_init +ffffffff81e5aa80 t jpeg_v2_0_sw_init +ffffffff81e5ab90 t jpeg_v2_0_sw_fini +ffffffff81e5abe0 t jpeg_v2_0_hw_init +ffffffff81e5ac60 t jpeg_v2_0_hw_fini +ffffffff81e5ad40 t jpeg_v2_0_suspend +ffffffff81e5ad70 t jpeg_v2_0_resume +ffffffff81e5ae00 t jpeg_v2_0_is_idle +ffffffff81e5ae80 t jpeg_v2_0_wait_for_idle +ffffffff81e5af70 t jpeg_v2_0_set_clockgating_state +ffffffff81e5b020 t jpeg_v2_0_set_powergating_state +ffffffff81e5b820 t jpeg_v2_0_dec_ring_get_rptr +ffffffff81e5b8b0 t jpeg_v2_0_dec_ring_get_wptr +ffffffff81e5b950 t jpeg_v2_0_dec_ring_set_wptr +ffffffff81e5b9f0 t jpeg_v2_0_set_interrupt_state +ffffffff81e5ba20 t jpeg_v2_0_process_interrupt +ffffffff81e5bab0 t jpeg_v2_0_enable_clock_gating +ffffffff81e5bc50 t jpeg_v2_0_disable_clock_gating +ffffffff81e5c000 t jpeg_v2_6_query_ras_poison_status +ffffffff81e5c140 t jpeg_v2_5_early_init +ffffffff81e5c410 t jpeg_v2_5_sw_init +ffffffff81e5c630 t jpeg_v2_5_sw_fini +ffffffff81e5c680 t jpeg_v2_5_hw_init +ffffffff81e5c770 t jpeg_v2_5_hw_fini +ffffffff81e5c8b0 t jpeg_v2_5_suspend +ffffffff81e5c8e0 t jpeg_v2_5_resume +ffffffff81e5c9e0 t jpeg_v2_5_is_idle +ffffffff81e5cae0 t jpeg_v2_5_wait_for_idle +ffffffff81e5cc10 t jpeg_v2_5_set_clockgating_state +ffffffff81e5cd80 t jpeg_v2_5_set_powergating_state +ffffffff81e5d470 t jpeg_v2_5_dec_ring_get_rptr +ffffffff81e5d510 t jpeg_v2_5_dec_ring_get_wptr +ffffffff81e5d5c0 t jpeg_v2_5_dec_ring_set_wptr +ffffffff81e5d670 t jpeg_v2_6_dec_ring_insert_start +ffffffff81e5d830 t jpeg_v2_6_dec_ring_insert_end +ffffffff81e5d9f0 t jpeg_v2_5_set_interrupt_state +ffffffff81e5da20 t jpeg_v2_5_process_interrupt +ffffffff81e5db00 t jpeg_v2_5_enable_clock_gating +ffffffff81e5dbd0 t jpeg_v2_5_disable_clock_gating +ffffffff81e5e000 t jpeg_v3_0_early_init +ffffffff81e5e0f0 t jpeg_v3_0_sw_init +ffffffff81e5e200 t jpeg_v3_0_sw_fini +ffffffff81e5e250 t jpeg_v3_0_hw_init +ffffffff81e5e2d0 t jpeg_v3_0_hw_fini +ffffffff81e5e3b0 t jpeg_v3_0_suspend +ffffffff81e5e3e0 t jpeg_v3_0_resume +ffffffff81e5e470 t jpeg_v3_0_is_idle +ffffffff81e5e4f0 t jpeg_v3_0_wait_for_idle +ffffffff81e5e5e0 t jpeg_v3_0_set_clockgating_state +ffffffff81e5e690 t jpeg_v3_0_set_powergating_state +ffffffff81e5ef40 t jpeg_v3_0_dec_ring_get_rptr +ffffffff81e5efd0 t jpeg_v3_0_dec_ring_get_wptr +ffffffff81e5f070 t jpeg_v3_0_dec_ring_set_wptr +ffffffff81e5f110 t jpeg_v3_0_set_interrupt_state +ffffffff81e5f140 t jpeg_v3_0_process_interrupt +ffffffff81e5f1d0 t jpeg_v3_0_enable_clock_gating +ffffffff81e5f2a0 t jpeg_v3_0_disable_clock_gating +ffffffff81e60000 t jpeg_v4_0_early_init +ffffffff81e60080 t jpeg_v4_0_sw_init +ffffffff81e60190 t jpeg_v4_0_sw_fini +ffffffff81e601e0 t jpeg_v4_0_hw_init +ffffffff81e60300 t jpeg_v4_0_hw_fini +ffffffff81e603e0 t jpeg_v4_0_suspend +ffffffff81e60410 t jpeg_v4_0_resume +ffffffff81e60460 t jpeg_v4_0_is_idle +ffffffff81e604e0 t jpeg_v4_0_wait_for_idle +ffffffff81e605d0 t jpeg_v4_0_set_clockgating_state +ffffffff81e60680 t jpeg_v4_0_set_powergating_state +ffffffff81e60e90 t jpeg_v4_0_dec_ring_get_rptr +ffffffff81e60f20 t jpeg_v4_0_dec_ring_get_wptr +ffffffff81e60fc0 t jpeg_v4_0_dec_ring_set_wptr +ffffffff81e61060 t jpeg_v4_0_set_interrupt_state +ffffffff81e61090 t jpeg_v4_0_process_interrupt +ffffffff81e61130 t jpeg_v4_0_enable_clock_gating +ffffffff81e612e0 t jpeg_v4_0_disable_clock_gating +ffffffff81e62000 t lsdma_v6_0_copy_mem +ffffffff81e62350 t lsdma_v6_0_fill_mem +ffffffff81e62630 t lsdma_v6_0_update_memory_power_gating +ffffffff81e63000 t mca_v3_0_mp0_query_ras_error_count +ffffffff81e63020 t mca_v3_0_ras_block_match +ffffffff81e63070 t mca_v3_0_mp1_query_ras_error_count +ffffffff81e63090 t mca_v3_0_mpio_query_ras_error_count +ffffffff81e630b0 t mca_v3_0_init +ffffffff81e64000 t mes_v10_0_early_init +ffffffff81e64060 t mes_v10_0_late_init +ffffffff81e640b0 t mes_v10_1_sw_init +ffffffff81e64580 t mes_v10_1_sw_fini +ffffffff81e646b0 t mes_v10_1_hw_init +ffffffff81e64f50 t mes_v10_1_hw_fini +ffffffff81e65010 t mes_v10_1_suspend +ffffffff81e650f0 t mes_v10_1_resume +ffffffff81e65140 t mes_v10_1_kiq_hw_init +ffffffff81e65550 t mes_v10_1_add_hw_queue +ffffffff81e656d0 t mes_v10_1_remove_hw_queue +ffffffff81e65760 t mes_v10_1_unmap_legacy_queue +ffffffff81e65850 t mes_v10_1_suspend_gang +ffffffff81e65880 t mes_v10_1_resume_gang +ffffffff81e658b0 t mes_v10_1_submit_pkt_and_poll_completion +ffffffff81e65ab0 t mes_v10_1_load_microcode +ffffffff81e66290 t mes_v10_1_enable +ffffffff81e66700 t mes_v10_1_queue_init +ffffffff81e669a0 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t mmhub_v2_3_get_clockgating +ffffffff81e74e70 t mmhub_v2_3_setup_vm_pt_regs +ffffffff81e74fb0 t mmhub_v2_3_print_l2_protection_fault_status +ffffffff81e751c0 t mmhub_v2_3_get_invalidate_req +ffffffff81e76000 t mmhub_v3_0_get_fb_location +ffffffff81e76090 t mmhub_v3_0_get_mc_fb_offset +ffffffff81e76120 t mmhub_v3_0_init +ffffffff81e761f0 t mmhub_v3_0_gart_enable +ffffffff81e77380 t mmhub_v3_0_set_fault_enable_default +ffffffff81e77490 t mmhub_v3_0_gart_disable +ffffffff81e77710 t mmhub_v3_0_set_clockgating +ffffffff81e778e0 t mmhub_v3_0_get_clockgating +ffffffff81e77990 t mmhub_v3_0_setup_vm_pt_regs +ffffffff81e77ad0 t mmhub_v3_0_print_l2_protection_fault_status +ffffffff81e77cd0 t mmhub_v3_0_get_invalidate_req +ffffffff81e78000 t mmhub_v3_0_1_get_fb_location +ffffffff81e78090 t mmhub_v3_0_1_get_mc_fb_offset +ffffffff81e78120 t mmhub_v3_0_1_init +ffffffff81e781f0 t mmhub_v3_0_1_gart_enable +ffffffff81e79470 t mmhub_v3_0_1_set_fault_enable_default +ffffffff81e79570 t mmhub_v3_0_1_gart_disable +ffffffff81e79800 t mmhub_v3_0_1_set_clockgating +ffffffff81e799c0 t mmhub_v3_0_1_get_clockgating +ffffffff81e79a70 t mmhub_v3_0_1_setup_vm_pt_regs +ffffffff81e79bb0 t mmhub_v3_0_1_print_l2_protection_fault_status +ffffffff81e79db0 t mmhub_v3_0_1_get_invalidate_req +ffffffff81e7a000 t mmhub_v3_0_2_get_fb_location +ffffffff81e7a090 t mmhub_v3_0_2_get_mc_fb_offset +ffffffff81e7a120 t mmhub_v3_0_2_init +ffffffff81e7a1f0 t mmhub_v3_0_2_gart_enable +ffffffff81e7b370 t mmhub_v3_0_2_set_fault_enable_default +ffffffff81e7b480 t mmhub_v3_0_2_gart_disable +ffffffff81e7b700 t mmhub_v3_0_2_set_clockgating +ffffffff81e7b730 t mmhub_v3_0_2_get_clockgating +ffffffff81e7b760 t mmhub_v3_0_2_setup_vm_pt_regs +ffffffff81e7b8a0 t mmhub_v3_0_2_print_l2_protection_fault_status +ffffffff81e7ba80 t mmhub_v3_0_2_get_invalidate_req +ffffffff81e7c000 t mmhub_v9_4_query_ras_error_count +ffffffff81e7c150 t mmhub_v9_4_query_ras_error_status +ffffffff81e7c230 t mmhub_v9_4_reset_ras_error_count +ffffffff81e7c300 t mmhub_v9_4_get_fb_location +ffffffff81e7c410 t mmhub_v9_4_init +ffffffff81e7c560 t mmhub_v9_4_gart_enable +ffffffff81e7d9f0 t mmhub_v9_4_set_fault_enable_default +ffffffff81e7dbd0 t mmhub_v9_4_gart_disable +ffffffff81e7df30 t mmhub_v9_4_set_clockgating +ffffffff81e7e3f0 t mmhub_v9_4_get_clockgating +ffffffff81e7e520 t mmhub_v9_4_setup_vm_pt_regs +ffffffff81e7e570 t mmhub_v9_4_setup_hubid_vm_pt_regs +ffffffff81e7f000 T xgpu_ai_mailbox_set_irq_funcs +ffffffff81e7f050 T xgpu_ai_mailbox_add_irq_id +ffffffff81e7f0e0 T xgpu_ai_mailbox_get_irq +ffffffff81e7f190 t xgpu_ai_mailbox_flr_work +ffffffff81e7f3a0 T xgpu_ai_mailbox_put_irq +ffffffff81e7f3e0 t xgpu_ai_request_full_gpu_access +ffffffff81e7f400 t xgpu_ai_release_full_gpu_access +ffffffff81e7f420 t xgpu_ai_request_init_data +ffffffff81e7f480 t xgpu_ai_request_reset +ffffffff81e7f530 t xgpu_ai_mailbox_trans_msg +ffffffff81e7f760 t xgpu_ai_set_mailbox_ack_irq +ffffffff81e7f7f0 t xgpu_ai_mailbox_ack_irq +ffffffff81e7f840 t xgpu_ai_set_mailbox_rcv_irq +ffffffff81e7f8d0 t xgpu_ai_mailbox_rcv_irq +ffffffff81e7f9b0 t xgpu_ai_send_access_requests +ffffffff81e7faa0 t xgpu_ai_poll_msg +ffffffff81e80000 T xgpu_nv_mailbox_set_irq_funcs +ffffffff81e80050 T xgpu_nv_mailbox_add_irq_id +ffffffff81e800e0 T xgpu_nv_mailbox_get_irq +ffffffff81e80190 t xgpu_nv_mailbox_flr_work +ffffffff81e803b0 T xgpu_nv_mailbox_put_irq +ffffffff81e803f0 t xgpu_nv_request_full_gpu_access +ffffffff81e80410 t xgpu_nv_release_full_gpu_access +ffffffff81e80430 t xgpu_nv_request_init_data +ffffffff81e80450 t xgpu_nv_request_reset +ffffffff81e80550 t xgpu_nv_mailbox_trans_msg +ffffffff81e806f0 t xgpu_nv_set_mailbox_ack_irq +ffffffff81e80770 t xgpu_nv_mailbox_ack_irq +ffffffff81e807c0 t xgpu_nv_set_mailbox_rcv_irq +ffffffff81e80840 t xgpu_nv_mailbox_rcv_irq +ffffffff81e808f0 t xgpu_nv_send_access_requests +ffffffff81e81000 T xgpu_vi_init_golden_registers +ffffffff81e810c0 T xgpu_vi_mailbox_set_irq_funcs +ffffffff81e81110 T xgpu_vi_mailbox_add_irq_id +ffffffff81e811a0 T xgpu_vi_mailbox_get_irq +ffffffff81e81250 t xgpu_vi_mailbox_flr_work +ffffffff81e813a0 T xgpu_vi_mailbox_put_irq +ffffffff81e813e0 t xgpu_vi_request_full_gpu_access +ffffffff81e81400 t xgpu_vi_release_full_gpu_access +ffffffff81e81420 t xgpu_vi_request_reset +ffffffff81e81440 t xgpu_vi_wait_reset_cmpl +ffffffff81e81520 t xgpu_vi_set_mailbox_ack_irq +ffffffff81e815a0 t xgpu_vi_mailbox_ack_irq +ffffffff81e815f0 t xgpu_vi_set_mailbox_rcv_irq +ffffffff81e81670 t xgpu_vi_mailbox_rcv_irq +ffffffff81e81720 t xgpu_vi_mailbox_rcv_msg +ffffffff81e81840 t xgpu_vi_send_access_requests +ffffffff81e82000 t navi10_ih_early_init +ffffffff81e82060 t navi10_ih_sw_init +ffffffff81e821d0 t navi10_ih_sw_fini +ffffffff81e82210 t navi10_ih_hw_init +ffffffff81e82640 t navi10_ih_hw_fini +ffffffff81e826a0 t navi10_ih_suspend +ffffffff81e82700 t navi10_ih_resume +ffffffff81e82710 t navi10_ih_is_idle +ffffffff81e82740 t navi10_ih_wait_for_idle +ffffffff81e82770 t navi10_ih_soft_reset +ffffffff81e827a0 t navi10_ih_set_clockgating_state +ffffffff81e828c0 t navi10_ih_set_powergating_state +ffffffff81e828f0 t navi10_ih_get_clockgating_state +ffffffff81e82980 t navi10_ih_get_wptr +ffffffff81e82a90 t navi10_ih_set_rptr +ffffffff81e82b60 t navi10_ih_self_irq +ffffffff81e82be0 t navi10_ih_toggle_interrupts +ffffffff81e82d70 t force_update_wptr_for_self_int +ffffffff81e84000 t nbio_v2_3_get_hdp_flush_req_offset +ffffffff81e84040 t nbio_v2_3_get_hdp_flush_done_offset +ffffffff81e84080 t nbio_v2_3_get_pcie_index_offset +ffffffff81e840c0 t nbio_v2_3_get_pcie_data_offset +ffffffff81e84100 t nbio_v2_3_get_rev_id +ffffffff81e84160 t nbio_v2_3_mc_access_enable +ffffffff81e84210 t nbio_v2_3_get_memsize +ffffffff81e84280 t nbio_v2_3_sdma_doorbell_range +ffffffff81e84320 t nbio_v2_3_vcn_doorbell_range +ffffffff81e843a0 t nbio_v2_3_enable_doorbell_aperture +ffffffff81e84490 t nbio_v2_3_enable_doorbell_selfring_aperture +ffffffff81e845f0 t nbio_v2_3_ih_doorbell_range +ffffffff81e84700 t nbio_v2_3_update_medium_grain_clock_gating +ffffffff81e847a0 t nbio_v2_3_update_medium_grain_light_sleep +ffffffff81e84840 t nbio_v2_3_get_clockgating_state +ffffffff81e848c0 t nbio_v2_3_ih_control +ffffffff81e84a10 t nbio_v2_3_init_registers +ffffffff81e84aa0 t nbio_v2_3_remap_hdp_registers +ffffffff81e84bb0 t nbio_v2_3_enable_aspm +ffffffff81e84c50 t nbio_v2_3_program_aspm +ffffffff81e852e0 t nbio_v2_3_apply_lc_spc_mode_wa +ffffffff81e85370 t nbio_v2_3_apply_l1_link_width_reconfig_wa +ffffffff81e853e0 t nbio_v2_3_clear_doorbell_interrupt +ffffffff81e86000 t nbio_v4_3_get_hdp_flush_req_offset +ffffffff81e86040 t nbio_v4_3_get_hdp_flush_done_offset +ffffffff81e86080 t nbio_v4_3_get_pcie_index_offset +ffffffff81e860b0 t nbio_v4_3_get_pcie_data_offset +ffffffff81e860f0 t nbio_v4_3_get_rev_id +ffffffff81e86170 t nbio_v4_3_mc_access_enable +ffffffff81e86220 t nbio_v4_3_get_memsize +ffffffff81e86290 t nbio_v4_3_sdma_doorbell_range +ffffffff81e86400 t nbio_v4_3_vcn_doorbell_range +ffffffff81e865b0 t nbio_v4_3_gc_doorbell_init +ffffffff81e866a0 t nbio_v4_3_enable_doorbell_aperture +ffffffff81e86790 t nbio_v4_3_enable_doorbell_selfring_aperture +ffffffff81e868f0 t nbio_v4_3_ih_doorbell_range +ffffffff81e86a10 t nbio_v4_3_update_medium_grain_clock_gating +ffffffff81e86b50 t nbio_v4_3_update_medium_grain_light_sleep +ffffffff81e86c80 t nbio_v4_3_get_clockgating_state +ffffffff81e86d90 t nbio_v4_3_ih_control +ffffffff81e86ee0 t nbio_v4_3_init_registers +ffffffff81e87000 t nbio_v4_3_remap_hdp_registers +ffffffff81e87110 t nbio_v4_3_program_aspm +ffffffff81e87db0 t nbio_v4_3_get_rom_offset +ffffffff81e87e40 t nbio_v4_3_sriov_sdma_doorbell_range +ffffffff81e87e70 t nbio_v4_3_sriov_vcn_doorbell_range +ffffffff81e87ea0 t nbio_v4_3_sriov_gc_doorbell_init +ffffffff81e87ed0 t nbio_v4_3_sriov_ih_doorbell_range +ffffffff81e88000 t nbio_v6_1_get_hdp_flush_req_offset +ffffffff81e88040 t nbio_v6_1_get_hdp_flush_done_offset +ffffffff81e88080 t nbio_v6_1_get_pcie_index_offset +ffffffff81e880c0 t nbio_v6_1_get_pcie_data_offset +ffffffff81e88100 t nbio_v6_1_get_rev_id +ffffffff81e88180 t nbio_v6_1_mc_access_enable +ffffffff81e88230 t nbio_v6_1_get_memsize +ffffffff81e882a0 t nbio_v6_1_sdma_doorbell_range +ffffffff81e88330 t nbio_v6_1_enable_doorbell_aperture +ffffffff81e88420 t nbio_v6_1_enable_doorbell_selfring_aperture +ffffffff81e88580 t nbio_v6_1_ih_doorbell_range +ffffffff81e88690 t nbio_v6_1_update_medium_grain_clock_gating +ffffffff81e88730 t nbio_v6_1_update_medium_grain_light_sleep +ffffffff81e887d0 t nbio_v6_1_get_clockgating_state +ffffffff81e88850 t nbio_v6_1_ih_control +ffffffff81e889a0 t nbio_v6_1_init_registers +ffffffff81e88a70 t nbio_v6_1_remap_hdp_registers +ffffffff81e88b80 t nbio_v6_1_program_aspm +ffffffff81e89000 t nbio_v7_0_get_hdp_flush_req_offset +ffffffff81e89040 t nbio_v7_0_get_hdp_flush_done_offset +ffffffff81e89080 t nbio_v7_0_get_pcie_index_offset +ffffffff81e890c0 t nbio_v7_0_get_pcie_data_offset +ffffffff81e89100 t nbio_v7_0_get_rev_id +ffffffff81e89180 t nbio_v7_0_mc_access_enable +ffffffff81e89230 t nbio_v7_0_get_memsize +ffffffff81e892a0 t nbio_v7_0_sdma_doorbell_range +ffffffff81e89330 t nbio_v7_0_vcn_doorbell_range +ffffffff81e893b0 t nbio_v7_0_enable_doorbell_aperture +ffffffff81e894a0 t nbio_v7_0_enable_doorbell_selfring_aperture +ffffffff81e894d0 t nbio_v7_0_ih_doorbell_range +ffffffff81e895e0 t nbio_v7_0_update_medium_grain_clock_gating +ffffffff81e89710 t nbio_v7_0_update_medium_grain_light_sleep +ffffffff81e897b0 t nbio_v7_0_get_clockgating_state +ffffffff81e89830 t nbio_v7_0_ih_control +ffffffff81e89980 t nbio_v7_0_init_registers +ffffffff81e899d0 t nbio_v7_0_remap_hdp_registers +ffffffff81e89ae0 t nbio_7_0_read_syshub_ind_mmr +ffffffff81e89bb0 t nbio_7_0_write_syshub_ind_mmr +ffffffff81e8a000 t nbio_v7_2_get_hdp_flush_req_offset +ffffffff81e8a040 t nbio_v7_2_get_hdp_flush_done_offset +ffffffff81e8a080 t nbio_v7_2_get_pcie_index_offset +ffffffff81e8a0c0 t nbio_v7_2_get_pcie_data_offset +ffffffff81e8a100 t nbio_v7_2_get_pcie_port_index_offset +ffffffff81e8a130 t nbio_v7_2_get_pcie_port_data_offset +ffffffff81e8a170 t nbio_v7_2_get_rev_id +ffffffff81e8a250 t nbio_v7_2_mc_access_enable +ffffffff81e8a390 t nbio_v7_2_get_memsize +ffffffff81e8a400 t nbio_v7_2_sdma_doorbell_range +ffffffff81e8a4a0 t nbio_v7_2_vcn_doorbell_range +ffffffff81e8a520 t nbio_v7_2_enable_doorbell_aperture +ffffffff81e8a600 t nbio_v7_2_enable_doorbell_selfring_aperture +ffffffff81e8a760 t nbio_v7_2_ih_doorbell_range +ffffffff81e8a7f0 t nbio_v7_2_update_medium_grain_clock_gating +ffffffff81e8a8b0 t nbio_v7_2_update_medium_grain_light_sleep +ffffffff81e8aa40 t nbio_v7_2_get_clockgating_state +ffffffff81e8aad0 t nbio_v7_2_ih_control +ffffffff81e8ac20 t nbio_v7_2_init_registers +ffffffff81e8ade0 t nbio_v7_2_remap_hdp_registers +ffffffff81e8b000 t nbio_v7_4_query_ras_error_count +ffffffff81e8b1a0 t nbio_v7_4_handle_ras_controller_intr_no_bifring +ffffffff81e8b3e0 t nbio_v7_4_handle_ras_err_event_athub_intr_no_bifring +ffffffff81e8b590 t nbio_v7_4_init_ras_controller_interrupt +ffffffff81e8b5d0 t nbio_v7_4_init_ras_err_event_athub_interrupt +ffffffff81e8b610 t nbio_v7_4_get_hdp_flush_req_offset +ffffffff81e8b650 t nbio_v7_4_get_hdp_flush_done_offset +ffffffff81e8b690 t nbio_v7_4_get_pcie_index_offset +ffffffff81e8b6d0 t nbio_v7_4_get_pcie_data_offset +ffffffff81e8b710 t nbio_v7_4_get_rev_id +ffffffff81e8b7d0 t nbio_v7_4_mc_access_enable +ffffffff81e8b880 t nbio_v7_4_get_memsize +ffffffff81e8b8f0 t nbio_v7_4_sdma_doorbell_range +ffffffff81e8b9c0 t nbio_v7_4_vcn_doorbell_range +ffffffff81e8ba60 t nbio_v7_4_enable_doorbell_aperture +ffffffff81e8bb50 t nbio_v7_4_enable_doorbell_selfring_aperture +ffffffff81e8bcb0 t nbio_v7_4_ih_doorbell_range +ffffffff81e8bdc0 t nbio_v7_4_enable_doorbell_interrupt +ffffffff81e8bf00 t nbio_v7_4_update_medium_grain_clock_gating +ffffffff81e8bf30 t nbio_v7_4_update_medium_grain_light_sleep +ffffffff81e8bfd0 t nbio_v7_4_get_clockgating_state +ffffffff81e8c050 t nbio_v7_4_ih_control +ffffffff81e8c1a0 t nbio_v7_4_init_registers +ffffffff81e8c290 t nbio_v7_4_remap_hdp_registers +ffffffff81e8c3a0 t nbio_v7_4_program_aspm +ffffffff81e8c7b0 t nbio_v7_4_set_ras_controller_irq_state +ffffffff81e8c940 t nbio_v7_4_process_ras_controller_irq +ffffffff81e8c970 t nbio_v7_4_set_ras_err_event_athub_irq_state +ffffffff81e8cb00 t nbio_v7_4_process_err_event_athub_irq +ffffffff81e8d000 t nbio_v7_7_get_hdp_flush_req_offset +ffffffff81e8d040 t nbio_v7_7_get_hdp_flush_done_offset +ffffffff81e8d080 t nbio_v7_7_get_pcie_index_offset +ffffffff81e8d0c0 t nbio_v7_7_get_pcie_data_offset +ffffffff81e8d100 t nbio_v7_7_get_pcie_port_index_offset +ffffffff81e8d130 t nbio_v7_7_get_pcie_port_data_offset +ffffffff81e8d170 t nbio_v7_7_get_rev_id +ffffffff81e8d1f0 t nbio_v7_7_mc_access_enable +ffffffff81e8d2a0 t nbio_v7_7_get_memsize +ffffffff81e8d310 t nbio_v7_7_sdma_doorbell_range +ffffffff81e8d3a0 t nbio_v7_7_vcn_doorbell_range +ffffffff81e8d420 t nbio_v7_7_enable_doorbell_aperture +ffffffff81e8d500 t nbio_v7_7_enable_doorbell_selfring_aperture +ffffffff81e8d660 t nbio_v7_7_ih_doorbell_range +ffffffff81e8d770 t nbio_v7_7_update_medium_grain_clock_gating +ffffffff81e8d8b0 t nbio_v7_7_update_medium_grain_light_sleep +ffffffff81e8dac0 t nbio_v7_7_get_clockgating_state +ffffffff81e8dbd0 t nbio_v7_7_ih_control +ffffffff81e8dd20 t nbio_v7_7_init_registers +ffffffff81e8de20 t nbio_v7_7_remap_hdp_registers +ffffffff81e8e000 T nv_grbm_select +ffffffff81e8e0a0 T nv_set_virt_ops +ffffffff81e8e0e0 t nv_common_early_init +ffffffff81e8e4d0 t nv_common_late_init +ffffffff81e8e540 t nv_common_sw_init +ffffffff81e8e580 t nv_common_sw_fini +ffffffff81e8e5b0 t nv_common_hw_init +ffffffff81e8e6c0 t nv_common_hw_fini +ffffffff81e8e720 t nv_common_suspend +ffffffff81e8e780 t nv_common_resume +ffffffff81e8e7c0 t nv_common_is_idle +ffffffff81e8e7f0 t nv_common_wait_for_idle +ffffffff81e8e820 t nv_common_soft_reset +ffffffff81e8e850 t nv_common_set_clockgating_state +ffffffff81e8e920 t nv_common_set_powergating_state +ffffffff81e8e950 t nv_common_get_clockgating_state +ffffffff81e8e9c0 t nv_pcie_rreg +ffffffff81e8ea20 t nv_pcie_wreg +ffffffff81e8ea80 t nv_pcie_rreg64 +ffffffff81e8eae0 t nv_pcie_wreg64 +ffffffff81e8eb40 t nv_didt_rreg +ffffffff81e8ebe0 t nv_didt_wreg +ffffffff81e8ec60 t nv_read_disabled_bios +ffffffff81e8ec90 t nv_read_register +ffffffff81e8ed70 t nv_vga_set_state +ffffffff81e8eda0 t nv_asic_reset +ffffffff81e8eee0 t nv_asic_reset_method +ffffffff81e8efd0 t nv_get_xclk +ffffffff81e8f000 t nv_set_uvd_clocks +ffffffff81e8f030 t nv_set_vce_clocks +ffffffff81e8f060 t nv_get_config_memsize +ffffffff81e8f080 t nv_need_full_reset +ffffffff81e8f0b0 t nv_init_doorbell_index +ffffffff81e8f1e0 t nv_need_reset_on_init +ffffffff81e8f270 t nv_get_pcie_replay_count +ffffffff81e8f2a0 t nv_pre_asic_init +ffffffff81e8f2d0 t nv_update_umd_stable_pstate +ffffffff81e8f390 t nv_query_video_codecs +ffffffff81e90000 T psp_v10_0_set_psp_funcs +ffffffff81e90030 t psp_v10_0_init_microcode +ffffffff81e902a0 t psp_v10_0_ring_init +ffffffff81e90320 t psp_v10_0_ring_create +ffffffff81e90630 t psp_v10_0_ring_stop +ffffffff81e90820 t psp_v10_0_ring_destroy +ffffffff81e908a0 t psp_v10_0_mode1_reset +ffffffff81e908f0 t psp_v10_0_ring_get_wptr +ffffffff81e90950 t psp_v10_0_ring_set_wptr +ffffffff81e91000 T psp_v11_0_set_psp_funcs +ffffffff81e91030 t psp_v11_0_init_microcode +ffffffff81e91450 t psp_v11_0_bootloader_load_kdb +ffffffff81e91470 t psp_v11_0_bootloader_load_spl +ffffffff81e91490 t psp_v11_0_bootloader_load_sysdrv +ffffffff81e914b0 t psp_v11_0_bootloader_load_sos +ffffffff81e91800 t psp_v11_0_ring_init +ffffffff81e91880 t psp_v11_0_ring_create +ffffffff81e91f10 t psp_v11_0_ring_stop +ffffffff81e92130 t psp_v11_0_ring_destroy +ffffffff81e921b0 t psp_v11_0_mode1_reset +ffffffff81e922b0 t psp_v11_0_memory_training +ffffffff81e92730 t psp_v11_0_ring_get_wptr +ffffffff81e92780 t psp_v11_0_ring_set_wptr +ffffffff81e928c0 t psp_v11_0_load_usbc_pd_fw +ffffffff81e92ab0 t psp_v11_0_read_usbc_pd_fw +ffffffff81e92bd0 t psp_v11_0_bootloader_load_component +ffffffff81e92d90 t psp_v11_0_wait_for_bootloader +ffffffff81e92f60 t psp_v11_0_memory_training_send_msg +ffffffff81e94000 T psp_v11_0_8_set_psp_funcs +ffffffff81e94030 t psp_v11_0_8_ring_init +ffffffff81e940b0 t psp_v11_0_8_ring_create +ffffffff81e94740 t psp_v11_0_8_ring_stop +ffffffff81e94ad0 t psp_v11_0_8_ring_destroy +ffffffff81e94b50 t psp_v11_0_8_ring_get_wptr +ffffffff81e94bc0 t psp_v11_0_8_ring_set_wptr +ffffffff81e95000 T psp_v12_0_set_psp_funcs +ffffffff81e95030 t psp_v12_0_init_microcode +ffffffff81e952a0 t psp_v12_0_bootloader_load_sysdrv +ffffffff81e955c0 t psp_v12_0_bootloader_load_sos +ffffffff81e95920 t psp_v12_0_ring_init +ffffffff81e95f00 t psp_v12_0_ring_create +ffffffff81e96460 t psp_v12_0_ring_stop +ffffffff81e96680 t psp_v12_0_ring_destroy +ffffffff81e96700 t psp_v12_0_mode1_reset +ffffffff81e96800 t psp_v12_0_ring_get_wptr +ffffffff81e96870 t psp_v12_0_ring_set_wptr +ffffffff81e97000 T psp_v13_0_set_psp_funcs +ffffffff81e97030 t psp_v13_0_init_microcode +ffffffff81e97160 t psp_v13_0_bootloader_load_kdb +ffffffff81e97180 t psp_v13_0_bootloader_load_spl +ffffffff81e971a0 t psp_v13_0_bootloader_load_sysdrv +ffffffff81e971c0 t psp_v13_0_bootloader_load_soc_drv +ffffffff81e971e0 t psp_v13_0_bootloader_load_intf_drv +ffffffff81e97200 t psp_v13_0_bootloader_load_dbg_drv +ffffffff81e97220 t psp_v13_0_bootloader_load_ras_drv +ffffffff81e97240 t psp_v13_0_bootloader_load_sos +ffffffff81e975a0 t psp_v13_0_ring_init +ffffffff81e97620 t psp_v13_0_ring_create +ffffffff81e97cb0 t psp_v13_0_ring_stop +ffffffff81e98040 t psp_v13_0_ring_destroy +ffffffff81e980c0 t psp_v13_0_memory_training +ffffffff81e98500 t psp_v13_0_ring_get_wptr +ffffffff81e98570 t psp_v13_0_ring_set_wptr +ffffffff81e98670 t psp_v13_0_load_usbc_pd_fw +ffffffff81e98860 t psp_v13_0_read_usbc_pd_fw +ffffffff81e98980 t psp_v13_0_update_spirom +ffffffff81e98b50 t psp_v13_0_vbflash_status +ffffffff81e98bb0 t psp_v13_0_bootloader_load_component +ffffffff81e98d80 t psp_v13_0_wait_for_bootloader +ffffffff81e98f50 t psp_v13_0_memory_training_send_msg +ffffffff81e990b0 t psp_v13_0_exec_spi_cmd +ffffffff81e9a000 T psp_v13_0_4_set_psp_funcs +ffffffff81e9a030 t psp_v13_0_4_init_microcode +ffffffff81e9a100 t psp_v13_0_4_bootloader_load_kdb +ffffffff81e9a120 t psp_v13_0_4_bootloader_load_spl +ffffffff81e9a140 t psp_v13_0_4_bootloader_load_sysdrv +ffffffff81e9a160 t psp_v13_0_4_bootloader_load_soc_drv +ffffffff81e9a180 t psp_v13_0_4_bootloader_load_intf_drv +ffffffff81e9a1a0 t psp_v13_0_4_bootloader_load_dbg_drv +ffffffff81e9a1c0 t psp_v13_0_4_bootloader_load_sos +ffffffff81e9a530 t psp_v13_0_4_ring_init +ffffffff81e9a5b0 t psp_v13_0_4_ring_create +ffffffff81e9ac50 t psp_v13_0_4_ring_stop +ffffffff81e9afe0 t psp_v13_0_4_ring_destroy +ffffffff81e9b060 t psp_v13_0_4_ring_get_wptr +ffffffff81e9b0d0 t psp_v13_0_4_ring_set_wptr +ffffffff81e9b1d0 t psp_v13_0_4_bootloader_load_component +ffffffff81e9b3a0 t psp_v13_0_4_wait_for_bootloader +ffffffff81e9c000 T psp_v3_1_set_psp_funcs +ffffffff81e9c030 t psp_v3_1_init_microcode +ffffffff81e9c0f0 t psp_v3_1_bootloader_load_sysdrv +ffffffff81e9c410 t psp_v3_1_bootloader_load_sos +ffffffff81e9c770 t psp_v3_1_ring_init +ffffffff81e9c7f0 t psp_v3_1_ring_create +ffffffff81e9d2f0 t psp_v3_1_ring_stop +ffffffff81e9d510 t psp_v3_1_ring_destroy +ffffffff81e9d590 t psp_v3_1_smu_reload_quirk +ffffffff81e9d5e0 t psp_v3_1_mode1_reset +ffffffff81e9d6e0 t psp_v3_1_ring_get_wptr +ffffffff81e9d730 t psp_v3_1_ring_set_wptr +ffffffff81e9e000 t sdma_v2_4_early_init +ffffffff81e9e0e0 t sdma_v2_4_sw_init +ffffffff81e9e470 t sdma_v2_4_sw_fini +ffffffff81e9e550 t sdma_v2_4_hw_init +ffffffff81e9e910 t sdma_v2_4_hw_fini +ffffffff81e9e950 t sdma_v2_4_suspend +ffffffff81e9e990 t sdma_v2_4_resume +ffffffff81e9e9a0 t sdma_v2_4_is_idle +ffffffff81e9e9e0 t sdma_v2_4_wait_for_idle +ffffffff81e9ea80 t sdma_v2_4_soft_reset +ffffffff81e9ebc0 t sdma_v2_4_set_clockgating_state +ffffffff81e9ebf0 t sdma_v2_4_set_powergating_state +ffffffff81e9ec20 t sdma_v2_4_ring_get_rptr +ffffffff81e9ec60 t sdma_v2_4_ring_get_wptr +ffffffff81e9ecc0 t sdma_v2_4_ring_set_wptr +ffffffff81e9ed00 t sdma_v2_4_ring_emit_ib +ffffffff81e9efb0 t sdma_v2_4_ring_emit_fence +ffffffff81e9f3b0 t sdma_v2_4_ring_emit_pipeline_sync +ffffffff81e9f630 t sdma_v2_4_ring_emit_vm_flush +ffffffff81e9f8b0 t sdma_v2_4_ring_emit_hdp_flush +ffffffff81e9fb30 t sdma_v2_4_ring_test_ring +ffffffff81e9fe10 t sdma_v2_4_ring_test_ib +ffffffff81e9fff0 t sdma_v2_4_ring_insert_nop +ffffffff81ea0120 t sdma_v2_4_ring_pad_ib +ffffffff81ea0250 t sdma_v2_4_ring_emit_wreg +ffffffff81ea03a0 t sdma_v2_4_emit_copy_buffer +ffffffff81ea0460 t sdma_v2_4_emit_fill_buffer +ffffffff81ea04f0 t sdma_v2_4_vm_copy_pte +ffffffff81ea05b0 t sdma_v2_4_vm_write_pte +ffffffff81ea0680 t sdma_v2_4_vm_set_pte_pde +ffffffff81ea0780 t sdma_v2_4_set_trap_irq_state +ffffffff81ea0840 t sdma_v2_4_process_trap_irq +ffffffff81ea08e0 t sdma_v2_4_process_illegal_inst_irq +ffffffff81ea0960 t sdma_v2_4_enable +ffffffff81ea1000 t sdma_v3_0_early_init +ffffffff81ea1150 t sdma_v3_0_sw_init +ffffffff81ea1500 t sdma_v3_0_sw_fini +ffffffff81ea15e0 t sdma_v3_0_hw_init +ffffffff81ea1710 t sdma_v3_0_hw_fini +ffffffff81ea1760 t sdma_v3_0_suspend +ffffffff81ea17b0 t sdma_v3_0_resume +ffffffff81ea17c0 t sdma_v3_0_is_idle +ffffffff81ea1800 t sdma_v3_0_wait_for_idle +ffffffff81ea18a0 t sdma_v3_0_check_soft_reset +ffffffff81ea1900 t sdma_v3_0_pre_soft_reset +ffffffff81ea1950 t sdma_v3_0_soft_reset +ffffffff81ea1a20 t sdma_v3_0_post_soft_reset +ffffffff81ea1a70 t sdma_v3_0_set_clockgating_state +ffffffff81ea1cd0 t sdma_v3_0_set_powergating_state +ffffffff81ea1d00 t sdma_v3_0_get_clockgating_state +ffffffff81ea1d80 t sdma_v3_0_ring_get_rptr +ffffffff81ea1dc0 t sdma_v3_0_ring_get_wptr +ffffffff81ea1e40 t sdma_v3_0_ring_set_wptr +ffffffff81ea1ef0 t sdma_v3_0_ring_emit_ib +ffffffff81ea21a0 t sdma_v3_0_ring_emit_fence +ffffffff81ea25a0 t sdma_v3_0_ring_emit_pipeline_sync +ffffffff81ea2820 t sdma_v3_0_ring_emit_vm_flush +ffffffff81ea2aa0 t sdma_v3_0_ring_emit_hdp_flush +ffffffff81ea2d20 t sdma_v3_0_ring_test_ring +ffffffff81ea3000 t sdma_v3_0_ring_test_ib +ffffffff81ea31e0 t sdma_v3_0_ring_insert_nop +ffffffff81ea3310 t sdma_v3_0_ring_pad_ib +ffffffff81ea3440 t sdma_v3_0_ring_emit_wreg +ffffffff81ea3590 t sdma_v3_0_emit_copy_buffer +ffffffff81ea3650 t sdma_v3_0_emit_fill_buffer +ffffffff81ea36e0 t sdma_v3_0_vm_copy_pte +ffffffff81ea37a0 t sdma_v3_0_vm_write_pte +ffffffff81ea3870 t sdma_v3_0_vm_set_pte_pde +ffffffff81ea3970 t sdma_v3_0_set_trap_irq_state +ffffffff81ea3a30 t sdma_v3_0_process_trap_irq +ffffffff81ea3ad0 t sdma_v3_0_process_illegal_inst_irq +ffffffff81ea3b50 t sdma_v3_0_ctx_switch_enable +ffffffff81ea3ce0 t sdma_v3_0_enable +ffffffff81ea3e50 t sdma_v3_0_gfx_resume +ffffffff81ea5000 t sdma_v4_0_early_init +ffffffff81ea5580 t sdma_v4_0_late_init +ffffffff81ea5820 t sdma_v4_0_sw_init +ffffffff81ea5b90 t sdma_v4_0_sw_fini +ffffffff81ea5c50 t sdma_v4_0_hw_init +ffffffff81ea8bf0 t sdma_v4_0_hw_fini +ffffffff81ea8cb0 t sdma_v4_0_suspend +ffffffff81ea8d00 t sdma_v4_0_resume +ffffffff81ea8d80 t sdma_v4_0_is_idle +ffffffff81ea8eb0 t sdma_v4_0_wait_for_idle +ffffffff81ea9050 t sdma_v4_0_soft_reset +ffffffff81ea9080 t sdma_v4_0_set_clockgating_state +ffffffff81ea9580 t sdma_v4_0_set_powergating_state +ffffffff81ea9640 t sdma_v4_0_get_clockgating_state +ffffffff81ea96e0 t sdma_v4_0_query_ras_error_count +ffffffff81ea98b0 t sdma_v4_0_reset_ras_error_count +ffffffff81ea9a00 t sdma_v4_0_ring_get_rptr +ffffffff81ea9a60 t sdma_v4_0_ring_get_wptr +ffffffff81ea9c50 t sdma_v4_0_ring_set_wptr +ffffffff81ea9ed0 t sdma_v4_0_ring_emit_ib +ffffffff81eaa180 t sdma_v4_0_ring_emit_fence +ffffffff81eaa5b0 t sdma_v4_0_ring_emit_pipeline_sync +ffffffff81eaa610 t sdma_v4_0_ring_emit_vm_flush +ffffffff81eaa630 t sdma_v4_0_ring_emit_hdp_flush +ffffffff81eaa6d0 t sdma_v4_0_ring_test_ring +ffffffff81eaa9b0 t sdma_v4_0_ring_test_ib +ffffffff81eaab90 t sdma_v4_0_ring_insert_nop +ffffffff81eaacc0 t sdma_v4_0_ring_pad_ib +ffffffff81eaadf0 t sdma_v4_0_ring_emit_wreg +ffffffff81eaaf40 t sdma_v4_0_ring_emit_reg_wait +ffffffff81eaaf90 t sdma_v4_0_wait_reg_mem +ffffffff81eab2c0 t sdma_v4_0_page_ring_get_wptr +ffffffff81eab470 t sdma_v4_0_page_ring_set_wptr +ffffffff81eab630 t sdma_v4_0_emit_copy_buffer +ffffffff81eab6f0 t sdma_v4_0_emit_fill_buffer +ffffffff81eab780 t sdma_v4_0_vm_copy_pte +ffffffff81eab840 t sdma_v4_0_vm_write_pte +ffffffff81eab910 t sdma_v4_0_vm_set_pte_pde +ffffffff81eaba10 t sdma_v4_0_set_trap_irq_state +ffffffff81eabbb0 t sdma_v4_0_process_trap_irq +ffffffff81eabcf0 t sdma_v4_0_process_illegal_inst_irq +ffffffff81eabe10 t sdma_v4_0_set_ecc_irq_state +ffffffff81eabfb0 t sdma_v4_0_process_vm_hole_irq +ffffffff81eac0f0 t sdma_v4_0_process_doorbell_invalid_irq +ffffffff81eac230 t sdma_v4_0_process_pool_timeout_irq +ffffffff81eac370 t sdma_v4_0_process_srbm_write_irq +ffffffff81eac4b0 t sdma_v4_0_process_ras_data_cb +ffffffff81eac530 t sdma_v4_0_ctx_switch_enable +ffffffff81eacbe0 t sdma_v4_0_enable +ffffffff81ead180 t sdma_v4_0_gfx_enable +ffffffff81eae000 t sdma_v4_4_query_ras_error_count +ffffffff81eae270 t sdma_v4_4_reset_ras_error_count +ffffffff81eaf000 t sdma_v5_0_early_init +ffffffff81eaf170 t sdma_v5_0_sw_init +ffffffff81eaf410 t sdma_v5_0_sw_fini +ffffffff81eaf4a0 t sdma_v5_0_hw_init +ffffffff81eb0750 t sdma_v5_0_hw_fini +ffffffff81eb07b0 t sdma_v5_0_suspend +ffffffff81eb0810 t sdma_v5_0_resume +ffffffff81eb0820 t sdma_v5_0_is_idle +ffffffff81eb08b0 t sdma_v5_0_wait_for_idle +ffffffff81eb0970 t sdma_v5_0_soft_reset +ffffffff81eb09a0 t sdma_v5_0_set_clockgating_state +ffffffff81eb0ba0 t sdma_v5_0_set_powergating_state +ffffffff81eb0bd0 t sdma_v5_0_get_clockgating_state +ffffffff81eb0c70 t sdma_v5_0_ring_get_rptr +ffffffff81eb0cd0 t sdma_v5_0_ring_get_wptr +ffffffff81eb0e70 t sdma_v5_0_ring_set_wptr +ffffffff81eb11d0 t sdma_v5_0_ring_emit_ib +ffffffff81eb1490 t sdma_v5_0_ring_emit_fence +ffffffff81eb1900 t sdma_v5_0_ring_emit_pipeline_sync +ffffffff81eb1b80 t sdma_v5_0_ring_emit_vm_flush +ffffffff81eb1ba0 t sdma_v5_0_ring_emit_hdp_flush +ffffffff81eb1e40 t sdma_v5_0_ring_test_ring +ffffffff81eb2200 t sdma_v5_0_ring_test_ib +ffffffff81eb2530 t sdma_v5_0_ring_insert_nop +ffffffff81eb2660 t sdma_v5_0_ring_pad_ib +ffffffff81eb2790 t sdma_v5_0_ring_init_cond_exec +ffffffff81eb29c0 t sdma_v5_0_ring_patch_cond_exec +ffffffff81eb2a80 t sdma_v5_0_ring_emit_wreg +ffffffff81eb2bd0 t sdma_v5_0_ring_emit_reg_wait +ffffffff81eb2e50 t sdma_v5_0_ring_emit_reg_write_reg_wait +ffffffff81eb2ed0 t sdma_v5_0_ring_preempt_ib +ffffffff81eb3010 t sdma_v5_0_ring_emit_mem_sync +ffffffff81eb3220 t sdma_v5_0_emit_copy_buffer +ffffffff81eb32e0 t sdma_v5_0_emit_fill_buffer +ffffffff81eb3370 t sdma_v5_0_vm_copy_pte +ffffffff81eb3430 t sdma_v5_0_vm_write_pte +ffffffff81eb3500 t sdma_v5_0_vm_set_pte_pde +ffffffff81eb3600 t sdma_v5_0_set_trap_irq_state +ffffffff81eb3690 t sdma_v5_0_process_trap_irq +ffffffff81eb37a0 t sdma_v5_0_process_illegal_inst_irq +ffffffff81eb37d0 t sdma_v5_0_mqd_init +ffffffff81eb38b0 t sdma_v5_0_ctx_switch_enable +ffffffff81eb3bb0 t sdma_v5_0_enable +ffffffff81eb4000 t sdma_v5_2_early_init +ffffffff81eb4170 t sdma_v5_2_sw_init +ffffffff81eb43a0 t sdma_v5_2_sw_fini +ffffffff81eb4430 t sdma_v5_2_hw_init +ffffffff81eb4770 t sdma_v5_2_hw_fini +ffffffff81eb47d0 t sdma_v5_2_suspend +ffffffff81eb4830 t sdma_v5_2_resume +ffffffff81eb4840 t sdma_v5_2_is_idle +ffffffff81eb4900 t sdma_v5_2_wait_for_idle +ffffffff81eb4a00 t sdma_v5_2_soft_reset +ffffffff81eb4ca0 t sdma_v5_2_set_clockgating_state +ffffffff81eb4fc0 t sdma_v5_2_set_powergating_state +ffffffff81eb4ff0 t sdma_v5_2_get_clockgating_state +ffffffff81eb5080 t sdma_v5_2_ring_get_rptr +ffffffff81eb50e0 t sdma_v5_2_ring_get_wptr +ffffffff81eb5220 t sdma_v5_2_ring_set_wptr +ffffffff81eb53e0 t sdma_v5_2_ring_emit_ib +ffffffff81eb56a0 t sdma_v5_2_ring_emit_fence +ffffffff81eb5b10 t sdma_v5_2_ring_emit_pipeline_sync +ffffffff81eb5d90 t sdma_v5_2_ring_emit_vm_flush +ffffffff81eb5db0 t sdma_v5_2_ring_emit_hdp_flush +ffffffff81eb6050 t sdma_v5_2_ring_test_ring +ffffffff81eb6410 t sdma_v5_2_ring_test_ib +ffffffff81eb6740 t sdma_v5_2_ring_insert_nop +ffffffff81eb6870 t sdma_v5_2_ring_pad_ib +ffffffff81eb69a0 t sdma_v5_2_ring_init_cond_exec +ffffffff81eb6bd0 t sdma_v5_2_ring_patch_cond_exec +ffffffff81eb6c90 t sdma_v5_2_ring_emit_wreg +ffffffff81eb6de0 t sdma_v5_2_ring_emit_reg_wait +ffffffff81eb7060 t sdma_v5_2_ring_emit_reg_write_reg_wait +ffffffff81eb70e0 t sdma_v5_2_ring_preempt_ib +ffffffff81eb7250 t sdma_v5_2_ring_emit_mem_sync +ffffffff81eb7460 t sdma_v5_2_emit_copy_buffer +ffffffff81eb7520 t sdma_v5_2_emit_fill_buffer +ffffffff81eb75b0 t sdma_v5_2_vm_copy_pte +ffffffff81eb7670 t sdma_v5_2_vm_write_pte +ffffffff81eb7740 t sdma_v5_2_vm_set_pte_pde +ffffffff81eb7840 t sdma_v5_2_set_trap_irq_state +ffffffff81eb7900 t sdma_v5_2_process_trap_irq +ffffffff81eb7a40 t sdma_v5_2_process_illegal_inst_irq +ffffffff81eb7a70 t sdma_v5_2_mqd_init +ffffffff81eb7b50 t sdma_v5_2_ctx_switch_enable +ffffffff81eb7f50 t sdma_v5_2_enable +ffffffff81eb8360 t sdma_v5_2_gfx_resume +ffffffff81eba000 t sdma_v6_0_early_init +ffffffff81eba140 t sdma_v6_0_sw_init +ffffffff81eba320 t sdma_v6_0_sw_fini +ffffffff81eba3b0 t sdma_v6_0_hw_init +ffffffff81eba3c0 t sdma_v6_0_hw_fini +ffffffff81eba410 t sdma_v6_0_suspend +ffffffff81eba460 t sdma_v6_0_resume +ffffffff81eba470 t sdma_v6_0_is_idle +ffffffff81eba500 t sdma_v6_0_wait_for_idle +ffffffff81eba5c0 t sdma_v6_0_check_soft_reset +ffffffff81eba680 t sdma_v6_0_soft_reset +ffffffff81ebab20 t sdma_v6_0_set_clockgating_state +ffffffff81ebab50 t sdma_v6_0_set_powergating_state +ffffffff81ebab80 t sdma_v6_0_get_clockgating_state +ffffffff81ebabb0 t sdma_v6_0_ring_get_rptr +ffffffff81ebac10 t sdma_v6_0_ring_get_wptr +ffffffff81ebac80 t sdma_v6_0_ring_set_wptr +ffffffff81ebafe0 t sdma_v6_0_ring_emit_ib +ffffffff81ebb2a0 t sdma_v6_0_ring_emit_fence +ffffffff81ebb710 t sdma_v6_0_ring_emit_pipeline_sync +ffffffff81ebb990 t sdma_v6_0_ring_emit_vm_flush +ffffffff81ebb9b0 t sdma_v6_0_ring_emit_hdp_flush +ffffffff81ebbc50 t sdma_v6_0_ring_test_ring +ffffffff81ebc010 t sdma_v6_0_ring_test_ib +ffffffff81ebc340 t sdma_v6_0_ring_insert_nop +ffffffff81ebc470 t sdma_v6_0_ring_pad_ib +ffffffff81ebc5a0 t sdma_v6_0_ring_init_cond_exec +ffffffff81ebc7d0 t sdma_v6_0_ring_patch_cond_exec +ffffffff81ebc890 t sdma_v6_0_ring_emit_wreg +ffffffff81ebc9e0 t sdma_v6_0_ring_emit_reg_wait +ffffffff81ebcc60 t sdma_v6_0_ring_emit_reg_write_reg_wait +ffffffff81ebcce0 t sdma_v6_0_ring_preempt_ib +ffffffff81ebce30 t sdma_v6_0_ring_emit_mem_sync +ffffffff81ebd040 t sdma_v6_0_emit_copy_buffer +ffffffff81ebd100 t sdma_v6_0_emit_fill_buffer +ffffffff81ebd190 t sdma_v6_0_vm_copy_pte +ffffffff81ebd250 t sdma_v6_0_vm_write_pte +ffffffff81ebd320 t sdma_v6_0_vm_set_pte_pde +ffffffff81ebd420 t sdma_v6_0_set_trap_irq_state +ffffffff81ebd4b0 t sdma_v6_0_process_trap_irq +ffffffff81ebd5e0 t sdma_v6_0_process_illegal_inst_irq +ffffffff81ebd610 t sdma_v6_0_mqd_init +ffffffff81ebd730 t sdma_v6_0_start +ffffffff81ebd9b0 t sdma_v6_0_enable +ffffffff81ebdb30 t sdma_v6_0_gfx_resume +ffffffff81ebebb0 t sdma_v6_0_gfx_stop +ffffffff81ebf000 T sienna_cichlid_reset_init +ffffffff81ebf0c0 t sienna_cichlid_async_reset +ffffffff81ebf120 t sienna_cichlid_get_reset_handler +ffffffff81ebf180 T sienna_cichlid_reset_fini +ffffffff81ebf1e0 t sienna_cichlid_mode2_prepare_hwcontext +ffffffff81ebf330 t sienna_cichlid_mode2_perform_reset +ffffffff81ebf3b0 t sienna_cichlid_mode2_restore_hwcontext +ffffffff81ebf6a0 t sienna_cichlid_mode2_reset +ffffffff81ec0000 T smu_v11_0_i2c_control_init +ffffffff81ec00d0 T smu_v11_0_i2c_control_fini +ffffffff81ec0110 t smu_v11_0_i2c_xfer +ffffffff81ec11f0 t smu_v11_0_i2c_func +ffffffff81ec1220 t smu_v11_0_i2c_enable +ffffffff81ec1360 t smu_v11_0_i2c_abort +ffffffff81ec1460 t lock_bus +ffffffff81ec1500 t trylock_bus +ffffffff81ec1550 t unlock_bus +ffffffff81ec2000 t smuio_v11_0_get_rom_index_offset +ffffffff81ec2040 t smuio_v11_0_get_rom_data_offset +ffffffff81ec2080 t smuio_v11_0_update_rom_clock_gating +ffffffff81ec21c0 t smuio_v11_0_get_clock_gating_state +ffffffff81ec3000 t smuio_v11_0_6_get_rom_index_offset +ffffffff81ec3040 t smuio_v11_0_6_get_rom_data_offset +ffffffff81ec3080 t smuio_v11_0_6_update_rom_clock_gating +ffffffff81ec31c0 t smuio_v11_0_6_get_clock_gating_state +ffffffff81ec4000 t smuio_v13_0_get_rom_index_offset +ffffffff81ec4040 t smuio_v13_0_get_rom_data_offset +ffffffff81ec4080 t smuio_v13_0_update_rom_clock_gating +ffffffff81ec41c0 t smuio_v13_0_get_clock_gating_state +ffffffff81ec4260 t smuio_v13_0_get_die_id +ffffffff81ec42e0 t smuio_v13_0_get_socket_id +ffffffff81ec4360 t smuio_v13_0_is_host_gpu_xgmi_supported +ffffffff81ec5000 t smuio_v13_0_6_get_rom_index_offset +ffffffff81ec5040 t smuio_v13_0_6_get_rom_data_offset +ffffffff81ec6000 t smuio_v9_0_get_rom_index_offset +ffffffff81ec6040 t smuio_v9_0_get_rom_data_offset +ffffffff81ec6080 t smuio_v9_0_update_rom_clock_gating +ffffffff81ec61c0 t smuio_v9_0_get_clock_gating_state +ffffffff81ec7000 T soc15_grbm_select +ffffffff81ec7080 T soc15_program_register_sequence +ffffffff81ec7280 T soc15_set_virt_ops +ffffffff81ec72f0 t soc15_common_early_init +ffffffff81ec7680 t soc15_common_late_init +ffffffff81ec76c0 t soc15_common_sw_init +ffffffff81ec7720 t soc15_common_sw_fini +ffffffff81ec7770 t soc15_common_hw_init +ffffffff81ec78a0 t soc15_common_hw_fini +ffffffff81ec7970 t soc15_common_suspend +ffffffff81ec79b0 t soc15_common_resume +ffffffff81ec79f0 t soc15_common_is_idle +ffffffff81ec7a20 t soc15_common_wait_for_idle +ffffffff81ec7a50 t soc15_common_soft_reset +ffffffff81ec7a80 t soc15_common_set_clockgating_state +ffffffff81ec7dc0 t soc15_common_set_powergating_state +ffffffff81ec7df0 t soc15_common_get_clockgating_state +ffffffff81ec7ed0 t soc15_pcie_rreg +ffffffff81ec7f30 t soc15_pcie_wreg +ffffffff81ec7f90 t soc15_pcie_rreg64 +ffffffff81ec7ff0 t soc15_pcie_wreg64 +ffffffff81ec8050 t soc15_uvd_ctx_rreg +ffffffff81ec80f0 t soc15_uvd_ctx_wreg +ffffffff81ec8180 t soc15_didt_rreg +ffffffff81ec8220 t soc15_didt_wreg +ffffffff81ec82a0 t soc15_gc_cac_rreg +ffffffff81ec83c0 t soc15_gc_cac_wreg +ffffffff81ec84d0 t soc15_se_cac_rreg +ffffffff81ec85f0 t soc15_se_cac_wreg +ffffffff81ec8700 t soc15_read_disabled_bios +ffffffff81ec8730 t soc15_read_register +ffffffff81ec8830 t soc15_vga_set_state +ffffffff81ec8860 t soc15_asic_reset +ffffffff81ec8960 t soc15_asic_reset_method +ffffffff81ec8ae0 t soc15_get_xclk +ffffffff81ec8b30 t soc15_set_uvd_clocks +ffffffff81ec8b60 t soc15_set_vce_clocks +ffffffff81ec8b90 t soc15_get_config_memsize +ffffffff81ec8bb0 t soc15_need_full_reset +ffffffff81ec8be0 t soc15_get_pcie_usage +ffffffff81ec8d10 t soc15_need_reset_on_init +ffffffff81ec8db0 t soc15_get_pcie_replay_count +ffffffff81ec8e20 t soc15_supports_baco +ffffffff81ec8e80 t soc15_pre_asic_init +ffffffff81ec8e90 t soc15_query_video_codecs +ffffffff81ec8f40 t vega20_get_pcie_usage +ffffffff81eca000 T soc21_grbm_select +ffffffff81eca080 t soc21_common_early_init +ffffffff81eca2d0 t soc21_common_late_init +ffffffff81eca300 t soc21_common_sw_init +ffffffff81eca330 t soc21_common_sw_fini +ffffffff81eca360 t soc21_common_hw_init +ffffffff81eca430 t soc21_common_hw_fini +ffffffff81eca490 t soc21_common_suspend +ffffffff81eca4f0 t soc21_common_resume +ffffffff81eca5c0 t soc21_common_is_idle +ffffffff81eca5f0 t soc21_common_wait_for_idle +ffffffff81eca620 t soc21_common_soft_reset +ffffffff81eca650 t soc21_common_set_clockgating_state +ffffffff81eca700 t soc21_common_set_powergating_state +ffffffff81eca760 t soc21_common_get_clockgating_state +ffffffff81eca7b0 t soc21_pcie_rreg +ffffffff81eca810 t soc21_pcie_wreg +ffffffff81eca870 t soc21_pcie_rreg64 +ffffffff81eca8d0 t soc21_pcie_wreg64 +ffffffff81eca930 t soc21_didt_rreg +ffffffff81eca9d0 t soc21_didt_wreg +ffffffff81ecaa50 t soc21_read_disabled_bios +ffffffff81ecaa80 t soc21_read_register +ffffffff81ecab70 t soc21_vga_set_state +ffffffff81ecaba0 t soc21_asic_reset +ffffffff81ecac80 t soc21_asic_reset_method +ffffffff81ecad40 t soc21_get_xclk +ffffffff81ecad70 t soc21_set_uvd_clocks +ffffffff81ecada0 t soc21_set_vce_clocks +ffffffff81ecadd0 t soc21_get_config_memsize +ffffffff81ecadf0 t soc21_need_full_reset +ffffffff81ecae50 t soc21_init_doorbell_index +ffffffff81ecaf70 t soc21_need_reset_on_init +ffffffff81ecb000 t soc21_get_pcie_replay_count +ffffffff81ecb030 t soc21_pre_asic_init +ffffffff81ecb060 t soc21_update_umd_stable_pstate +ffffffff81ecb0d0 t soc21_query_video_codecs +ffffffff81ecc000 t tonga_ih_early_init +ffffffff81ecc050 t tonga_ih_sw_init +ffffffff81ecc0d0 t tonga_ih_sw_fini +ffffffff81ecc110 t tonga_ih_hw_init +ffffffff81ecc300 t tonga_ih_hw_fini +ffffffff81ecc3a0 t tonga_ih_suspend +ffffffff81ecc440 t tonga_ih_resume +ffffffff81ecc480 t tonga_ih_is_idle +ffffffff81ecc4d0 t tonga_ih_wait_for_idle +ffffffff81ecc570 t tonga_ih_check_soft_reset +ffffffff81ecc5d0 t tonga_ih_pre_soft_reset +ffffffff81ecc680 t tonga_ih_soft_reset +ffffffff81ecc750 t tonga_ih_post_soft_reset +ffffffff81ecc790 t tonga_ih_set_clockgating_state +ffffffff81ecc7c0 t tonga_ih_set_powergating_state +ffffffff81ecc7f0 t tonga_ih_get_wptr +ffffffff81ecc8e0 t tonga_ih_decode_iv +ffffffff81ecc960 t tonga_ih_set_rptr +ffffffff81ecd000 t umc_v6_0_init_registers +ffffffff81ece000 t umc_v6_1_query_ras_error_count +ffffffff81ece4e0 t umc_v6_1_query_ras_error_address +ffffffff81ece7c0 t umc_v6_1_err_cnt_init +ffffffff81ecf000 t umc_v6_7_query_ras_error_count +ffffffff81ecf410 t umc_v6_7_query_ras_error_address +ffffffff81ecf590 t umc_v6_7_query_ras_poison_mode +ffffffff81ecf5f0 t umc_v6_7_convert_error_address +ffffffff81ecf8f0 t umc_v6_7_ecc_info_query_ras_error_count +ffffffff81ecfb30 t umc_v6_7_ecc_info_query_ras_error_address +ffffffff81ed0000 t umc_v8_10_query_ras_error_count +ffffffff81ed0280 t umc_v8_10_query_ras_error_address +ffffffff81ed05b0 t umc_v8_10_err_cnt_init +ffffffff81ed0730 t umc_v8_10_query_ras_poison_mode +ffffffff81ed1000 t umc_v8_7_query_ras_error_count +ffffffff81ed1310 t umc_v8_7_query_ras_error_address +ffffffff81ed14c0 t umc_v8_7_err_cnt_init +ffffffff81ed1610 t umc_v8_7_ecc_info_query_ras_error_count +ffffffff81ed1740 t umc_v8_7_ecc_info_query_ras_error_address +ffffffff81ed2000 t uvd_v5_0_early_init +ffffffff81ed2050 t uvd_v5_0_sw_init +ffffffff81ed2140 t uvd_v5_0_sw_fini +ffffffff81ed2190 t uvd_v5_0_hw_init +ffffffff81ed26a0 t uvd_v5_0_hw_fini +ffffffff81ed2720 t uvd_v5_0_suspend +ffffffff81ed2820 t uvd_v5_0_resume +ffffffff81ed2870 t uvd_v5_0_is_idle +ffffffff81ed28c0 t uvd_v5_0_wait_for_idle +ffffffff81ed2950 t uvd_v5_0_soft_reset +ffffffff81ed29f0 t uvd_v5_0_set_clockgating_state +ffffffff81ed2b90 t uvd_v5_0_set_powergating_state +ffffffff81ed2bd0 t uvd_v5_0_get_clockgating_state +ffffffff81ed2c50 t uvd_v5_0_ring_get_rptr +ffffffff81ed2c90 t uvd_v5_0_ring_get_wptr +ffffffff81ed2cd0 t uvd_v5_0_ring_set_wptr +ffffffff81ed2d00 t uvd_v5_0_ring_emit_ib +ffffffff81ed2f70 t uvd_v5_0_ring_emit_fence +ffffffff81ed3520 t uvd_v5_0_ring_test_ring +ffffffff81ed36c0 t uvd_v5_0_ring_insert_nop +ffffffff81ed3820 t uvd_v5_0_set_interrupt_state +ffffffff81ed3850 t uvd_v5_0_process_interrupt +ffffffff81ed38b0 t uvd_v5_0_stop +ffffffff81ed39c0 t uvd_v5_0_start +ffffffff81ed5000 t uvd_v6_0_early_init +ffffffff81ed5140 t uvd_v6_0_sw_init +ffffffff81ed5460 t uvd_v6_0_sw_fini +ffffffff81ed5520 t uvd_v6_0_hw_init +ffffffff81ed5ae0 t uvd_v6_0_hw_fini +ffffffff81ed5b60 t uvd_v6_0_suspend +ffffffff81ed5c60 t uvd_v6_0_resume +ffffffff81ed5cb0 t uvd_v6_0_is_idle +ffffffff81ed5d00 t uvd_v6_0_wait_for_idle +ffffffff81ed5d90 t uvd_v6_0_check_soft_reset +ffffffff81ed5e10 t uvd_v6_0_pre_soft_reset +ffffffff81ed5e50 t uvd_v6_0_soft_reset +ffffffff81ed5f20 t uvd_v6_0_post_soft_reset +ffffffff81ed5fc0 t uvd_v6_0_set_clockgating_state +ffffffff81ed6150 t uvd_v6_0_set_powergating_state +ffffffff81ed61c0 t uvd_v6_0_get_clockgating_state +ffffffff81ed6250 t uvd_v6_0_ring_get_rptr +ffffffff81ed6290 t uvd_v6_0_ring_get_wptr +ffffffff81ed62d0 t uvd_v6_0_ring_set_wptr +ffffffff81ed6300 t uvd_v6_0_ring_emit_ib +ffffffff81ed6660 t uvd_v6_0_ring_emit_fence +ffffffff81ed6c10 t uvd_v6_0_ring_emit_pipeline_sync +ffffffff81ed7010 t uvd_v6_0_ring_emit_vm_flush +ffffffff81ed7370 t uvd_v6_0_ring_emit_hdp_flush +ffffffff81ed73a0 t uvd_v6_0_ring_test_ring +ffffffff81ed7540 t uvd_v6_0_ring_insert_nop +ffffffff81ed76a0 t uvd_v6_0_ring_emit_wreg +ffffffff81ed7920 t uvd_v6_0_enc_ring_get_rptr +ffffffff81ed7980 t uvd_v6_0_enc_ring_get_wptr +ffffffff81ed79e0 t uvd_v6_0_enc_ring_set_wptr +ffffffff81ed7a20 t uvd_v6_0_enc_ring_emit_ib +ffffffff81ed7c60 t uvd_v6_0_enc_ring_emit_fence +ffffffff81ed7ea0 t uvd_v6_0_enc_ring_emit_pipeline_sync +ffffffff81ed8050 t uvd_v6_0_enc_ring_emit_vm_flush +ffffffff81ed8260 t uvd_v6_0_enc_ring_test_ring +ffffffff81ed83b0 t uvd_v6_0_enc_ring_test_ib +ffffffff81ed8970 t uvd_v6_0_enc_ring_insert_end +ffffffff81ed8a00 t uvd_v6_0_set_interrupt_state +ffffffff81ed8a30 t uvd_v6_0_process_interrupt +ffffffff81ed8b20 t uvd_v6_0_stop +ffffffff81ed8c30 t uvd_v6_0_start +ffffffff81eda000 t uvd_v7_0_early_init +ffffffff81eda270 t uvd_v7_0_sw_init +ffffffff81eda5f0 t uvd_v7_0_sw_fini +ffffffff81eda700 t uvd_v7_0_hw_init +ffffffff81edd610 t uvd_v7_0_hw_fini +ffffffff81edd920 t uvd_v7_0_suspend +ffffffff81edd9d0 t uvd_v7_0_resume +ffffffff81edda20 t uvd_v7_0_set_clockgating_state +ffffffff81edda50 t uvd_v7_0_ring_get_rptr +ffffffff81eddaf0 t uvd_v7_0_ring_get_wptr +ffffffff81eddb90 t uvd_v7_0_ring_set_wptr +ffffffff81eddc10 t uvd_v7_0_ring_patch_cs_in_place +ffffffff81eddc90 t uvd_v7_0_ring_emit_ib +ffffffff81ede040 t uvd_v7_0_ring_emit_fence +ffffffff81ede6a0 t uvd_v7_0_ring_emit_vm_flush +ffffffff81ede710 t uvd_v7_0_ring_emit_hdp_flush +ffffffff81ede740 t uvd_v7_0_ring_test_ring +ffffffff81ede9d0 t uvd_v7_0_ring_insert_nop +ffffffff81edeb70 t uvd_v7_0_ring_emit_wreg +ffffffff81edee40 t uvd_v7_0_ring_emit_reg_wait +ffffffff81edf1e0 t uvd_v7_0_enc_ring_get_rptr +ffffffff81edf2d0 t uvd_v7_0_enc_ring_get_wptr +ffffffff81edf3d0 t uvd_v7_0_enc_ring_set_wptr +ffffffff81edf4d0 t uvd_v7_0_enc_ring_emit_ib +ffffffff81edf710 t uvd_v7_0_enc_ring_emit_fence +ffffffff81edf950 t uvd_v7_0_enc_ring_emit_vm_flush +ffffffff81edf9c0 t uvd_v7_0_enc_ring_test_ring +ffffffff81edfb20 t uvd_v7_0_enc_ring_test_ib +ffffffff81ee00e0 t uvd_v7_0_enc_ring_insert_end +ffffffff81ee0170 t uvd_v7_0_enc_ring_emit_wreg +ffffffff81ee02d0 t uvd_v7_0_enc_ring_emit_reg_wait +ffffffff81ee0490 t uvd_v7_0_set_interrupt_state +ffffffff81ee04c0 t uvd_v7_0_process_interrupt +ffffffff81ee1000 t vce_v3_0_early_init +ffffffff81ee1180 t vce_v3_0_sw_init +ffffffff81ee12d0 t vce_v3_0_sw_fini +ffffffff81ee1320 t vce_v3_0_hw_init +ffffffff81ee1400 t vce_v3_0_hw_fini +ffffffff81ee14f0 t vce_v3_0_suspend +ffffffff81ee15c0 t vce_v3_0_resume +ffffffff81ee1610 t vce_v3_0_is_idle +ffffffff81ee1680 t vce_v3_0_wait_for_idle +ffffffff81ee1730 t vce_v3_0_check_soft_reset +ffffffff81ee1830 t vce_v3_0_pre_soft_reset +ffffffff81ee18d0 t vce_v3_0_soft_reset +ffffffff81ee19a0 t vce_v3_0_post_soft_reset +ffffffff81ee1b00 t vce_v3_0_set_clockgating_state +ffffffff81ee1df0 t vce_v3_0_set_powergating_state +ffffffff81ee2640 t vce_v3_0_get_clockgating_state +ffffffff81ee2700 t vce_v3_0_ring_get_rptr +ffffffff81ee27d0 t vce_v3_0_ring_get_wptr +ffffffff81ee28a0 t vce_v3_0_ring_set_wptr +ffffffff81ee2960 t vce_v3_0_ring_emit_ib +ffffffff81ee2ba0 t vce_v3_0_emit_pipeline_sync +ffffffff81ee2d50 t vce_v3_0_emit_vm_flush +ffffffff81ee2fc0 t vce_v3_0_set_interrupt_state +ffffffff81ee3030 t vce_v3_0_process_interrupt +ffffffff81ee30f0 t vce_v3_0_stop +ffffffff81ee4000 t vce_v4_0_early_init +ffffffff81ee40b0 t vce_v4_0_sw_init +ffffffff81ee42e0 t vce_v4_0_sw_fini +ffffffff81ee4360 t vce_v4_0_hw_init +ffffffff81ee4b40 t vce_v4_0_hw_fini +ffffffff81ee4be0 t vce_v4_0_suspend +ffffffff81ee4e00 t vce_v4_0_resume +ffffffff81ee4eb0 t vce_v4_0_set_clockgating_state +ffffffff81ee4ee0 t vce_v4_0_set_powergating_state +ffffffff81ee4fc0 t vce_v4_0_ring_get_rptr +ffffffff81ee5030 t vce_v4_0_ring_get_wptr +ffffffff81ee50c0 t vce_v4_0_ring_set_wptr +ffffffff81ee5150 t vce_v4_0_ring_emit_ib +ffffffff81ee5390 t vce_v4_0_ring_emit_fence +ffffffff81ee55d0 t vce_v4_0_emit_vm_flush +ffffffff81ee5640 t vce_v4_0_ring_insert_end +ffffffff81ee56d0 t vce_v4_0_emit_wreg +ffffffff81ee5830 t vce_v4_0_emit_reg_wait +ffffffff81ee59f0 t vce_v4_0_set_interrupt_state +ffffffff81ee5a80 t vce_v4_0_process_interrupt +ffffffff81ee5b20 t vce_v4_0_start +ffffffff81ee6500 t vce_v4_0_stop +ffffffff81ee7000 T vcn_dec_sw_ring_emit_fence +ffffffff81ee7240 T vcn_dec_sw_ring_insert_end +ffffffff81ee72d0 T vcn_dec_sw_ring_emit_ib +ffffffff81ee7510 T vcn_dec_sw_ring_emit_reg_wait +ffffffff81ee76d0 T vcn_dec_sw_ring_emit_vm_flush +ffffffff81ee7740 T vcn_dec_sw_ring_emit_wreg +ffffffff81ee8000 T vcn_v1_0_set_pg_for_begin_use +ffffffff81ee8150 T vcn_v1_0_ring_end_use +ffffffff81ee81c0 t vcn_v1_0_early_init +ffffffff81ee8340 t vcn_v1_0_sw_init +ffffffff81ee85e0 t vcn_v1_0_sw_fini +ffffffff81ee8640 t vcn_v1_0_hw_init +ffffffff81ee8720 t vcn_v1_0_hw_fini +ffffffff81ee8820 t vcn_v1_0_suspend +ffffffff81ee8890 t vcn_v1_0_resume +ffffffff81ee8980 t vcn_v1_0_is_idle +ffffffff81ee8a10 t vcn_v1_0_wait_for_idle +ffffffff81ee8b00 t vcn_v1_0_set_clockgating_state +ffffffff81ee8bb0 t vcn_v1_0_set_powergating_state +ffffffff81ee9540 t vcn_v1_0_dec_ring_get_rptr +ffffffff81ee95d0 t vcn_v1_0_dec_ring_get_wptr +ffffffff81ee9660 t vcn_v1_0_dec_ring_set_wptr +ffffffff81ee9770 t vcn_v1_0_ring_patch_cs_in_place +ffffffff81ee9940 t vcn_v1_0_dec_ring_emit_ib +ffffffff81ee9cd0 t vcn_v1_0_dec_ring_emit_fence +ffffffff81eea300 t vcn_v1_0_dec_ring_emit_vm_flush +ffffffff81eea370 t vcn_v1_0_dec_ring_insert_nop +ffffffff81eea500 t vcn_v1_0_dec_ring_insert_start +ffffffff81eea6e0 t vcn_v1_0_dec_ring_insert_end +ffffffff81eea7f0 t vcn_v1_0_ring_begin_use +ffffffff81eea890 t vcn_v1_0_dec_ring_emit_wreg +ffffffff81eeab40 t vcn_v1_0_dec_ring_emit_reg_wait +ffffffff81eeaec0 t vcn_v1_0_enc_ring_get_rptr +ffffffff81eeaf90 t vcn_v1_0_enc_ring_get_wptr +ffffffff81eeb060 t vcn_v1_0_enc_ring_set_wptr +ffffffff81eeb120 t vcn_v1_0_enc_ring_emit_ib +ffffffff81eeb360 t vcn_v1_0_enc_ring_emit_fence +ffffffff81eeb5a0 t vcn_v1_0_enc_ring_emit_vm_flush +ffffffff81eeb610 t vcn_v1_0_enc_ring_insert_end +ffffffff81eeb6a0 t vcn_v1_0_enc_ring_emit_wreg +ffffffff81eeb800 t vcn_v1_0_enc_ring_emit_reg_wait +ffffffff81eeb9c0 t vcn_v1_0_set_interrupt_state +ffffffff81eeb9f0 t vcn_v1_0_process_interrupt +ffffffff81eebaa0 t vcn_v1_0_idle_work_handler +ffffffff81eebc30 t vcn_v1_0_pause_dpg_mode +ffffffff81eecd50 t vcn_v1_0_enable_clock_gating +ffffffff81eed160 t vcn_v1_0_disable_clock_gating +ffffffff81eed6f0 t vcn_1_0_enable_static_power_gating +ffffffff81eed910 t vcn_v1_0_start_dpg_mode +ffffffff81ef1540 t vcn_v1_0_start_spg_mode +ffffffff81ef3760 t vcn_v1_0_clock_gating_dpg_mode +ffffffff81ef4000 T vcn_v2_0_dec_ring_insert_start +ffffffff81ef41c0 T vcn_v2_0_dec_ring_insert_end +ffffffff81ef42c0 T vcn_v2_0_dec_ring_insert_nop +ffffffff81ef4430 T vcn_v2_0_dec_ring_emit_fence +ffffffff81ef49f0 T vcn_v2_0_dec_ring_emit_ib +ffffffff81ef4d50 T vcn_v2_0_dec_ring_emit_reg_wait +ffffffff81ef50a0 T vcn_v2_0_dec_ring_emit_vm_flush +ffffffff81ef5110 T vcn_v2_0_dec_ring_emit_wreg +ffffffff81ef53a0 T vcn_v2_0_enc_ring_emit_fence +ffffffff81ef55e0 T vcn_v2_0_enc_ring_insert_end +ffffffff81ef5670 T vcn_v2_0_enc_ring_emit_ib +ffffffff81ef58b0 T vcn_v2_0_enc_ring_emit_reg_wait +ffffffff81ef5a70 T vcn_v2_0_enc_ring_emit_vm_flush +ffffffff81ef5ae0 T vcn_v2_0_enc_ring_emit_wreg +ffffffff81ef5c40 T vcn_v2_0_dec_ring_test_ring +ffffffff81ef5ee0 t vcn_v2_0_early_init +ffffffff81ef6060 t vcn_v2_0_sw_init +ffffffff81ef6370 t vcn_v2_0_sw_fini +ffffffff81ef63f0 t vcn_v2_0_hw_init +ffffffff81ef6da0 t vcn_v2_0_hw_fini +ffffffff81ef6ea0 t vcn_v2_0_suspend +ffffffff81ef6ed0 t vcn_v2_0_resume +ffffffff81ef6f20 t vcn_v2_0_is_idle +ffffffff81ef6fb0 t vcn_v2_0_wait_for_idle +ffffffff81ef70a0 t vcn_v2_0_set_clockgating_state +ffffffff81ef7130 t vcn_v2_0_set_powergating_state +ffffffff81ef93f0 t vcn_v2_0_dec_ring_get_rptr +ffffffff81ef9480 t vcn_v2_0_dec_ring_get_wptr +ffffffff81ef9520 t vcn_v2_0_dec_ring_set_wptr +ffffffff81ef9650 t vcn_v2_0_enc_ring_get_rptr +ffffffff81ef9720 t vcn_v2_0_enc_ring_get_wptr +ffffffff81ef9810 t vcn_v2_0_enc_ring_set_wptr +ffffffff81ef9900 t vcn_v2_0_set_interrupt_state +ffffffff81ef9930 t vcn_v2_0_process_interrupt +ffffffff81ef99e0 t vcn_v2_0_pause_dpg_mode +ffffffff81efa340 t vcn_v2_0_enable_clock_gating +ffffffff81efa5c0 t vcn_v2_0_disable_clock_gating +ffffffff81efa9c0 t vcn_v2_0_enable_static_power_gating +ffffffff81efaba0 t vcn_v2_0_start_dpg_mode +ffffffff81eff660 t vcn_v2_0_clock_gating_dpg_mode +ffffffff81f00000 t vcn_v2_6_query_poison_status +ffffffff81f000d0 t vcn_v2_5_early_init +ffffffff81f00410 t vcn_v2_5_sw_init +ffffffff81f00890 t vcn_v2_5_sw_fini +ffffffff81f00960 t vcn_v2_5_hw_init +ffffffff81f01420 t vcn_v2_5_hw_fini +ffffffff81f01560 t vcn_v2_5_suspend +ffffffff81f01590 t vcn_v2_5_resume +ffffffff81f015e0 t vcn_v2_5_is_idle +ffffffff81f016d0 t vcn_v2_5_wait_for_idle +ffffffff81f01800 t vcn_v2_5_set_clockgating_state +ffffffff81f01880 t vcn_v2_5_set_powergating_state +ffffffff81f02160 t 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is_upper_pipe_tree_visible +ffffffff81f4c140 T is_pipe_tree_visible +ffffffff81f4c1c0 T build_prescale_params +ffffffff81f4d000 T dc_fixpt_from_fraction +ffffffff81f4d1d0 T dc_fixpt_mul +ffffffff81f4d380 T dc_fixpt_sqr +ffffffff81f4d4f0 T dc_fixpt_recip +ffffffff81f4d560 T dc_fixpt_sinc +ffffffff81f4d750 T dc_fixpt_sin +ffffffff81f4d780 T dc_fixpt_cos +ffffffff81f4d870 T dc_fixpt_exp +ffffffff81f4db70 t fixed31_32_exp_from_taylor_series +ffffffff81f4df50 T dc_fixpt_log +ffffffff81f4e160 T dc_fixpt_u4d19 +ffffffff81f4e1a0 T dc_fixpt_u3d19 +ffffffff81f4e1e0 T dc_fixpt_u2d19 +ffffffff81f4e220 T dc_fixpt_u0d19 +ffffffff81f4e250 T dc_fixpt_clamp_u0d14 +ffffffff81f4e2a0 T dc_fixpt_clamp_u0d10 +ffffffff81f4e2f0 T dc_fixpt_s4d19 +ffffffff81f4f000 T bios_parser_create +ffffffff81f503b0 t bios_parser_get_connectors_number +ffffffff81f50410 t bios_parser_get_connector_id +ffffffff81f504a0 t bios_parser_get_src_obj +ffffffff81f505b0 t bios_parser_get_i2c_info +ffffffff81f507d0 t bios_parser_get_hpd_info +ffffffff81f508b0 t bios_parser_get_device_tag +ffffffff81f50ab0 t bios_parser_get_spread_spectrum_info +ffffffff81f50db0 t bios_parser_get_ss_entry_number +ffffffff81f50fe0 t bios_parser_get_embedded_panel_info +ffffffff81f51530 t bios_parser_get_gpio_pin_info +ffffffff81f51650 t bios_parser_get_encoder_cap_info +ffffffff81f51750 t bios_parser_set_scratch_critical_state +ffffffff81f51760 t bios_parser_is_device_id_supported +ffffffff81f51820 t bios_parser_encoder_control +ffffffff81f51860 t bios_parser_transmitter_control +ffffffff81f518a0 t bios_parser_enable_crtc +ffffffff81f518f0 t bios_parser_adjust_pixel_clock +ffffffff81f51930 t bios_parser_set_pixel_clock +ffffffff81f51970 t bios_parser_set_dce_clock +ffffffff81f519b0 t bios_parser_enable_spread_spectrum_on_ppll +ffffffff81f51a00 t bios_parser_program_crtc_timing +ffffffff81f51a40 t bios_parser_program_display_engine_pll +ffffffff81f51a80 t bios_parser_enable_disp_power_gating +ffffffff81f51ac0 t bios_parser_destroy +ffffffff81f51b80 t bios_get_board_layout_info +ffffffff81f51e10 t get_bios_object +ffffffff81f51fe0 t get_ss_info_from_ss_info_table +ffffffff81f521a0 t get_ss_entry_number_from_ss_info_tbl +ffffffff81f53000 T firmware_parser_create +ffffffff81f54de0 t bios_parser_get_connectors_number +ffffffff81f54f70 t bios_parser_get_connector_id +ffffffff81f55000 t bios_parser_get_src_obj +ffffffff81f552a0 t bios_parser_get_i2c_info +ffffffff81f55530 t bios_parser_get_hpd_info +ffffffff81f556a0 t bios_parser_get_device_tag +ffffffff81f55970 t bios_parser_get_spread_spectrum_info +ffffffff81f55d30 t bios_parser_get_ss_entry_number +ffffffff81f55d60 t bios_parser_get_embedded_panel_info +ffffffff81f55f60 t bios_parser_get_gpio_pin_info +ffffffff81f56080 t bios_parser_get_encoder_cap_info +ffffffff81f561f0 t bios_parser_is_accelerated_mode +ffffffff81f56200 t bios_parser_set_scratch_critical_state +ffffffff81f56210 t bios_parser_is_device_id_supported +ffffffff81f56290 t bios_parser_encoder_control +ffffffff81f562d0 t bios_parser_transmitter_control +ffffffff81f56310 t bios_parser_enable_crtc +ffffffff81f56360 t bios_parser_set_pixel_clock +ffffffff81f563a0 t bios_parser_set_dce_clock +ffffffff81f563e0 t bios_parser_program_crtc_timing +ffffffff81f56420 t bios_parser_enable_disp_power_gating +ffffffff81f56460 t firmware_parser_destroy +ffffffff81f56520 t bios_get_board_layout_info +ffffffff81f569d0 t bios_parser_pack_data_tables +ffffffff81f56a00 t bios_get_atom_dc_golden_table +ffffffff81f56b40 t bios_parser_enable_lvtma_control +ffffffff81f56b90 t bios_parser_get_soc_bb_info +ffffffff81f56ca0 t bios_parser_get_disp_connector_caps_info +ffffffff81f56e00 t bios_parser_get_lttpr_caps +ffffffff81f56f50 t bios_parser_get_lttpr_interop +ffffffff81f57090 t bios_parser_get_connector_speed_cap_info +ffffffff81f571e0 t get_bios_object +ffffffff81f57340 t get_bios_object_from_path_v3 +ffffffff81f58000 T object_id_from_bios_object_id +ffffffff81f59000 T bios_get_image +ffffffff81f59050 T bios_is_accelerated_mode +ffffffff81f590b0 T bios_set_scratch_acc_mode_change +ffffffff81f590f0 T bios_set_scratch_critical_state +ffffffff81f59130 T bios_get_vga_enabled_displays +ffffffff81f5a000 T dal_bios_parser_create +ffffffff81f5a070 T dal_bios_parser_destroy +ffffffff81f5b000 T dal_bios_parser_init_cmd_tbl +ffffffff81f5b800 t encoder_control_digx_v3 +ffffffff81f5b900 t encoder_control_digx_v4 +ffffffff81f5ba00 t encoder_control_digx_v5 +ffffffff81f5bb50 t encoder_control_dig1_v1 +ffffffff81f5bbd0 t encoder_control_dig2_v1 +ffffffff81f5bc50 t encoder_control_dig_v1 +ffffffff81f5bcb0 t transmitter_control_v2 +ffffffff81f5be50 t transmitter_control_v3 +ffffffff81f5c010 t transmitter_control_v4 +ffffffff81f5c1c0 t transmitter_control_v1_5 +ffffffff81f5c340 t transmitter_control_v1_6 +ffffffff81f5c4b0 t set_pixel_clock_v3 +ffffffff81f5c620 t set_pixel_clock_v5 +ffffffff81f5c7c0 t set_pixel_clock_v6 +ffffffff81f5c970 t set_pixel_clock_v7 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+ffffffff81f61000 T dal_bios_parser_init_cmd_tbl_helper2 +ffffffff81f610b0 T dal_cmd_table_helper_controller_id_to_atom2 +ffffffff81f611c0 T dal_cmd_table_helper_transmitter_bp_to_atom2 +ffffffff81f61240 T dal_cmd_table_helper_encoder_mode_bp_to_atom2 +ffffffff81f612d0 T dal_cmd_table_helper_clock_source_id_to_ref_clk_src2 +ffffffff81f613b0 T dal_cmd_table_helper_encoder_id_to_atom2 +ffffffff81f62000 T dal_cmd_tbl_helper_dce110_get_table +ffffffff81f62030 t encoder_action_to_atom +ffffffff81f620b0 t engine_bp_to_atom +ffffffff81f62100 t clock_source_id_to_atom +ffffffff81f621a0 t clock_source_id_to_atom_phy_clk_src_id +ffffffff81f621f0 t signal_type_to_atom_dig_mode +ffffffff81f62250 t hpd_sel_to_atom +ffffffff81f62290 t dig_encoder_sel_to_atom +ffffffff81f622c0 t phy_id_to_atom +ffffffff81f62300 t disp_power_gating_action_to_atom +ffffffff81f63000 T dal_cmd_tbl_helper_dce112_get_table2 +ffffffff81f63030 t encoder_action_to_atom +ffffffff81f630b0 t engine_bp_to_atom +ffffffff81f63100 t clock_source_id_to_atom +ffffffff81f631d0 t clock_source_id_to_atom_phy_clk_src_id +ffffffff81f63220 t signal_type_to_atom_dig_mode +ffffffff81f63280 t hpd_sel_to_atom +ffffffff81f632c0 t dig_encoder_sel_to_atom +ffffffff81f632f0 t phy_id_to_atom +ffffffff81f63330 t disp_power_gating_action_to_atom +ffffffff81f633a0 t dc_clock_type_to_atom +ffffffff81f63420 t transmitter_color_depth_to_atom +ffffffff81f64000 T dal_cmd_tbl_helper_dce112_get_table +ffffffff81f64030 t encoder_action_to_atom +ffffffff81f640b0 t engine_bp_to_atom +ffffffff81f64100 t clock_source_id_to_atom +ffffffff81f641d0 t clock_source_id_to_atom_phy_clk_src_id +ffffffff81f64220 t signal_type_to_atom_dig_mode +ffffffff81f64280 t hpd_sel_to_atom +ffffffff81f642c0 t dig_encoder_sel_to_atom +ffffffff81f642f0 t phy_id_to_atom +ffffffff81f64330 t disp_power_gating_action_to_atom +ffffffff81f643a0 t dc_clock_type_to_atom +ffffffff81f64420 t transmitter_color_depth_to_atom +ffffffff81f65000 T dal_cmd_tbl_helper_dce80_get_table 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+ffffffff81f6c200 T rv1_vbios_smu_set_dprefclk +ffffffff81f6d000 T rv2_clk_mgr_construct +ffffffff81f6e000 T dentist_get_did_from_divider +ffffffff81f6e090 T dcn20_update_clocks_update_dpp_dto +ffffffff81f6e160 T dcn20_update_clocks_update_dentist +ffffffff81f6e680 T dcn2_update_clocks +ffffffff81f6ebf0 T dcn2_read_clocks_from_hw_dentist +ffffffff81f6ecc0 T dcn2_update_clocks_fpga +ffffffff81f6ee40 T dcn2_init_clocks +ffffffff81f6eee0 T dcn2_get_clock +ffffffff81f6ef50 T dcn20_clk_mgr_construct +ffffffff81f6f0a0 t dcn2_enable_pme_wa +ffffffff81f6f0f0 t dcn2_are_clock_states_equal +ffffffff81f6f160 t dcn2_notify_link_rate_change +ffffffff81f70000 t dcn201_update_clocks +ffffffff81f70240 t dcn201_init_clocks +ffffffff81f702e0 T dcn201_clk_mgr_construct +ffffffff81f71000 T rn_clk_mgr_construct +ffffffff81f718e0 t rn_update_clocks +ffffffff81f71e80 t rn_set_low_power_state +ffffffff81f72050 t rn_init_clocks +ffffffff81f720f0 t rn_enable_pme_wa +ffffffff81f72100 t rn_are_clock_states_equal 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dcn3_are_clock_states_equal +ffffffff81f74ab0 t dcn3_notify_wm_ranges +ffffffff81f74d40 t dcn30_notify_link_rate_change +ffffffff81f74e60 t dcn3_set_hard_min_memclk +ffffffff81f74f00 t dcn3_set_hard_max_memclk +ffffffff81f74f60 t dcn3_set_max_memclk +ffffffff81f74fa0 t dcn3_set_min_memclk +ffffffff81f74fe0 t dcn3_get_memclk_states_from_smu +ffffffff81f75120 t dcn3_is_smu_present +ffffffff81f76000 T dcn30_smu_test_message +ffffffff81f76070 t dcn30_smu_send_msg_with_param +ffffffff81f761d0 T dcn30_smu_get_smu_version +ffffffff81f761f0 T dcn30_smu_check_driver_if_version +ffffffff81f76240 T dcn30_smu_check_msg_header_version +ffffffff81f76290 T dcn30_smu_set_dram_addr_high +ffffffff81f762b0 T dcn30_smu_set_dram_addr_low +ffffffff81f762d0 T dcn30_smu_transfer_wm_table_smu_2_dram +ffffffff81f762f0 T dcn30_smu_transfer_wm_table_dram_2_smu +ffffffff81f76310 T dcn30_smu_set_hard_min_by_freq +ffffffff81f76360 T dcn30_smu_set_hard_max_by_freq +ffffffff81f763b0 T dcn30_smu_get_dpm_freq_by_index +ffffffff81f76400 T dcn30_smu_get_dc_mode_max_dpm_freq +ffffffff81f76450 T dcn30_smu_set_min_deep_sleep_dcef_clk +ffffffff81f76470 T dcn30_smu_set_num_of_displays +ffffffff81f76490 T dcn30_smu_set_display_refresh_from_mall +ffffffff81f764c0 T dcn30_smu_set_external_client_df_cstate_allow +ffffffff81f764e0 T dcn30_smu_set_pme_workaround +ffffffff81f77000 T dcn301_smu_get_smu_version +ffffffff81f77070 t dcn301_smu_send_msg_with_param +ffffffff81f771f0 T dcn301_smu_set_dispclk +ffffffff81f77290 T dcn301_smu_set_dprefclk +ffffffff81f77340 T dcn301_smu_set_hard_min_dcfclk +ffffffff81f773e0 T dcn301_smu_set_min_deep_sleep_dcfclk +ffffffff81f77480 T dcn301_smu_set_dppclk +ffffffff81f77520 T dcn301_smu_set_display_idle_optimization +ffffffff81f77570 T dcn301_smu_enable_phy_refclk_pwrdwn +ffffffff81f775c0 T dcn301_smu_enable_pme_wa +ffffffff81f775e0 T dcn301_smu_set_dram_addr_high +ffffffff81f77630 T dcn301_smu_set_dram_addr_low +ffffffff81f77680 T dcn301_smu_transfer_dpm_table_smu_2_dram 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+ffffffff81f7c380 T dcn31_smu_set_min_deep_sleep_dcfclk +ffffffff81f7c400 T dcn31_smu_set_dppclk +ffffffff81f7c470 T dcn31_smu_set_display_idle_optimization +ffffffff81f7c4c0 T dcn31_smu_enable_phy_refclk_pwrdwn +ffffffff81f7c510 T dcn31_smu_enable_pme_wa +ffffffff81f7c550 T dcn31_smu_set_dram_addr_high +ffffffff81f7c590 T dcn31_smu_set_dram_addr_low +ffffffff81f7c5d0 T dcn31_smu_transfer_dpm_table_smu_2_dram +ffffffff81f7c610 T dcn31_smu_transfer_wm_table_dram_2_smu +ffffffff81f7c650 T dcn31_smu_set_zstate_support +ffffffff81f7c6c0 T dcn31_smu_set_dtbclk +ffffffff81f7d000 T dcn314_update_clocks +ffffffff81f7d730 T dcn314_are_clock_states_equal +ffffffff81f7d790 T dcn314_clk_mgr_construct +ffffffff81f7e4a0 T dcn314_clk_mgr_destroy +ffffffff81f7e4f0 t dcn314_enable_pme_wa +ffffffff81f7e500 t dcn314_notify_wm_ranges +ffffffff81f7f000 T dcn314_smu_get_smu_version +ffffffff81f7f020 t dcn314_smu_send_msg_with_param +ffffffff81f7f240 T dcn314_smu_set_dispclk +ffffffff81f7f2b0 T dcn314_smu_set_dprefclk +ffffffff81f7f320 T dcn314_smu_set_hard_min_dcfclk +ffffffff81f7f3a0 T dcn314_smu_set_min_deep_sleep_dcfclk +ffffffff81f7f420 T dcn314_smu_set_dppclk +ffffffff81f7f490 T dcn314_smu_set_display_idle_optimization +ffffffff81f7f4e0 T dcn314_smu_enable_phy_refclk_pwrdwn +ffffffff81f7f530 T dcn314_smu_enable_pme_wa +ffffffff81f7f570 T dcn314_smu_set_dram_addr_high +ffffffff81f7f5b0 T dcn314_smu_set_dram_addr_low +ffffffff81f7f5f0 T dcn314_smu_transfer_dpm_table_smu_2_dram +ffffffff81f7f630 T dcn314_smu_transfer_wm_table_dram_2_smu +ffffffff81f7f670 T dcn314_smu_set_zstate_support +ffffffff81f7f6c0 T dcn314_smu_set_dtbclk +ffffffff81f80000 T dcn315_clk_mgr_construct +ffffffff81f809c0 T dcn315_clk_mgr_destroy +ffffffff81f80a10 t dcn315_update_clocks +ffffffff81f81000 t dcn315_enable_pme_wa +ffffffff81f81010 t dcn315_notify_wm_ranges +ffffffff81f82000 T dcn315_smu_get_smu_version +ffffffff81f82020 t dcn315_smu_send_msg_with_param +ffffffff81f82310 T dcn315_smu_set_dispclk +ffffffff81f82380 T dcn315_smu_set_hard_min_dcfclk +ffffffff81f82400 T dcn315_smu_set_min_deep_sleep_dcfclk +ffffffff81f82480 T dcn315_smu_set_dppclk +ffffffff81f824f0 T dcn315_smu_set_display_idle_optimization +ffffffff81f82540 T dcn315_smu_enable_phy_refclk_pwrdwn +ffffffff81f82590 T dcn315_smu_enable_pme_wa +ffffffff81f825d0 T dcn315_smu_set_dram_addr_high +ffffffff81f82610 T dcn315_smu_set_dram_addr_low +ffffffff81f82650 T dcn315_smu_transfer_dpm_table_smu_2_dram +ffffffff81f82690 T dcn315_smu_transfer_wm_table_dram_2_smu +ffffffff81f826d0 T dcn315_smu_get_dpref_clk +ffffffff81f82730 T dcn315_smu_get_dtbclk +ffffffff81f82790 T dcn315_smu_set_dtbclk +ffffffff81f83000 T dcn316_clk_mgr_construct +ffffffff81f836a0 T dcn316_clk_mgr_destroy +ffffffff81f836f0 t dcn316_update_clocks +ffffffff81f83d20 t dcn316_enable_pme_wa +ffffffff81f83d30 t dcn316_notify_wm_ranges +ffffffff81f840c0 t find_clk_for_voltage +ffffffff81f85000 T dcn316_smu_get_smu_version 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dc_set_generic_gpio_for_stereo +ffffffff81f8e420 T dc_check_update_surfaces_for_stream +ffffffff81f8f040 T dc_dmub_update_dirty_rect +ffffffff81f8f2d0 T dc_update_planes_and_stream +ffffffff81f8fa40 t commit_planes_for_stream +ffffffff81f911e0 T dc_commit_updates_for_stream +ffffffff81f915f0 t copy_surface_update_to_plane +ffffffff81f919f0 t copy_stream_update_to_stream +ffffffff81f92020 T dc_get_current_stream_count +ffffffff81f92060 T dc_get_stream_at_index +ffffffff81f920b0 T dc_interrupt_to_irq_source +ffffffff81f920d0 T dc_interrupt_set +ffffffff81f92120 T dc_interrupt_ack +ffffffff81f92140 T dc_power_down_on_boot +ffffffff81f92190 T dc_set_power_state +ffffffff81f92380 T dc_resume +ffffffff81f923f0 T dc_is_dmcu_initialized +ffffffff81f92440 T dc_is_oem_i2c_device_present +ffffffff81f92490 T dc_submit_i2c +ffffffff81f924c0 T dc_submit_i2c_oem +ffffffff81f92510 T dc_link_add_remote_sink +ffffffff81f926a0 T dc_link_remove_remote_sink +ffffffff81f92790 T get_clock_requirements_for_state +ffffffff81f92810 T dc_set_clock +ffffffff81f92850 T dc_get_clock +ffffffff81f92890 T dc_set_psr_allow_active +ffffffff81f92990 T dc_allow_idle_optimizations +ffffffff81f92a30 T dc_unlock_memory_clock_frequency +ffffffff81f92aa0 T dc_lock_memory_clock_frequency +ffffffff81f92b30 T dc_enable_dcmode_clk_limit +ffffffff81f92c40 t blank_and_force_memclk +ffffffff81f92e20 T dc_is_plane_eligible_for_idle_optimizations +ffffffff81f92e70 T dc_hardware_release +ffffffff81f92ec0 T dc_mclk_switch_using_fw_based_vblank_stretch_shut_down +ffffffff81f92f00 T dc_is_dmub_outbox_supported +ffffffff81f92f60 T dc_enable_dmub_notifications +ffffffff81f92fc0 T dc_enable_dmub_outbox +ffffffff81f93000 T dc_process_dmub_aux_transfer_async +ffffffff81f931a0 T get_link_index_from_dpia_port_index +ffffffff81f93250 T dc_process_dmub_set_config_async +ffffffff81f93340 T dc_process_dmub_set_mst_slots +ffffffff81f93430 T dc_process_dmub_dpia_hpd_int_enable +ffffffff81f93500 T dc_disable_accelerated_mode +ffffffff81f93520 T dc_notify_vsync_int_state +ffffffff81f94000 T pre_surface_trace +ffffffff81f94030 T update_surface_trace +ffffffff81f94060 T post_surface_trace +ffffffff81f94090 T context_timing_trace +ffffffff81f94240 T context_clock_trace +ffffffff81f94270 T dc_status_to_str +ffffffff81f95000 T find_color_matrix +ffffffff81f950b0 T color_space_to_black_color +ffffffff81f95140 T hwss_wait_for_blank_complete +ffffffff81f951f0 T get_mpctree_visual_confirm_color +ffffffff81f95250 T get_surface_visual_confirm_color +ffffffff81f95300 T get_hdr_visual_confirm_color +ffffffff81f953b0 T get_subvp_visual_confirm_color +ffffffff81f954a0 T get_surface_tile_visual_confirm_color +ffffffff81f96000 T get_hpd_gpio +ffffffff81f960e0 T dc_link_wait_for_t12 +ffffffff81f96140 T dc_link_detect_sink +ffffffff81f962f0 T dc_link_is_dp_sink_present +ffffffff81f96570 T reset_cur_dp_mst_topology +ffffffff81f965d0 T dc_link_detect +ffffffff81f97960 T dc_link_get_hpd_state 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T dc_link_increase_mst_payload +ffffffff81f9b630 T core_link_enable_stream +ffffffff81f9c330 t disable_link +ffffffff81f9c450 t dc_link_update_sst_payload +ffffffff81f9c690 T core_link_set_avmute +ffffffff81f9c6e0 T core_link_disable_stream +ffffffff81f9cd50 t get_ext_hdmi_settings +ffffffff81f9cf90 t write_i2c_retimer_setting +ffffffff81f9d640 t write_i2c_default_retimer_setting +ffffffff81f9dce0 t write_i2c_redriver_setting +ffffffff81f9de20 T dc_link_enable_hpd_filter +ffffffff81f9df90 T dc_link_set_drive_settings +ffffffff81f9e060 T dc_link_get_cur_link_res +ffffffff81f9e1b0 T dc_link_set_preferred_link_settings +ffffffff81f9e300 T dc_link_set_preferred_training_settings +ffffffff81f9e440 T dc_link_enable_hpd +ffffffff81f9e450 T dc_link_disable_hpd +ffffffff81f9e460 T dc_link_set_test_pattern +ffffffff81f9e4a0 T dc_link_bandwidth_kbps +ffffffff81f9e540 T dc_link_should_enable_fec +ffffffff81f9e660 T dc_link_get_link_cap +ffffffff81f9e6b0 T dc_link_overwrite_extended_receiver_cap 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dal_ddc_service_set_ddc_pin +ffffffff81f9fed0 T dal_ddc_service_get_ddc_pin +ffffffff81f9ff00 T dal_ddc_service_write_scdc_data +ffffffff81f9fff0 T dal_ddc_service_read_scdc_data +ffffffff81fa1000 T dp_wait_for_training_aux_rd_interval +ffffffff81fa1080 T dc_dp_training_pattern_to_dpcd_training_pattern +ffffffff81fa1100 T dpcd_set_link_settings +ffffffff81fa1280 T dc_dp_initialize_scrambling_data_symbols +ffffffff81fa1320 T dp_is_cr_done +ffffffff81fa1380 T dp_is_ch_eq_done +ffffffff81fa1440 T dp_is_symbol_locked +ffffffff81fa1500 T dp_is_interlane_aligned +ffffffff81fa1530 T dp_hw_to_dpcd_lane_settings +ffffffff81fa15f0 T dp_get_link_encoding_format +ffffffff81fa1640 T dp_decide_lane_settings +ffffffff81fa1a80 T dp_get_lane_status_and_lane_adjust +ffffffff81fa1bc0 T dpcd_set_lane_settings +ffffffff81fa1c00 T dp_is_max_vs_reached +ffffffff81fa1c90 T dp_translate_training_aux_read_interval +ffffffff81fa1cd0 T dp_get_cr_failure +ffffffff81fa1d40 T dp_check_link_loss_status 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dc_link_dp_sync_lt_begin +ffffffff81fa6a00 T dc_link_dp_sync_lt_attempt +ffffffff81fa6f30 t perform_clock_recovery_sequence +ffffffff81fa74f0 t perform_channel_equalization_sequence +ffffffff81fa7b70 T dc_link_dp_sync_lt_end +ffffffff81fa7c60 T dc_link_dp_get_max_link_enc_cap +ffffffff81fa7d50 T dp_get_max_link_cap +ffffffff81fa7f40 T dp_is_lttpr_present +ffffffff81fa7fb0 T read_hpd_rx_irq_data +ffffffff81fa8060 T hpd_rx_irq_check_link_loss_status +ffffffff81fa8160 T dp_verify_link_cap_with_retries +ffffffff81fa8870 T dp_validate_mode_timing +ffffffff81fa8930 T decide_edp_link_settings +ffffffff81fa8a70 T decide_link_settings +ffffffff81fa8eb0 t decide_edp_link_settings_with_dsc +ffffffff81fa9250 T dc_link_dp_allow_hpd_rx_irq +ffffffff81fa9290 T is_dp_branch_device +ffffffff81fa92c0 T dc_link_dp_handle_automated_test +ffffffff81fa9bc0 T dc_link_dp_handle_link_loss +ffffffff81faa020 T dc_link_handle_hpd_rx_irq +ffffffff81faa3c0 T is_mst_supported +ffffffff81faa470 T is_dp_active_dongle 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dc_link_get_backlight_level_nits +ffffffff81fad940 T dc_link_backlight_enable_aux +ffffffff81fad9b0 T dc_link_read_default_bl_aux +ffffffff81fada10 T is_edp_ilr_optimization_required +ffffffff81fadc80 T dc_link_dp_mst_decide_link_encoding_format +ffffffff81fadd00 T dpcd_write_128b_132b_sst_payload_allocation_table +ffffffff81fadff0 T calculate_sst_avg_time_slots_per_mtp +ffffffff81fae050 T dpcd_poll_for_allocation_change_trigger +ffffffff81fae400 T is_dp_128b_132b_signal +ffffffff81fae4d0 T edp_panel_backlight_power_on +ffffffff81fae580 T dc_link_clear_dprx_states +ffffffff81fae5b0 T dp_receiver_power_ctrl +ffffffff81fae600 T dp_source_sequence_trace +ffffffff81fae660 T edp_add_delay_for_T9 +ffffffff81fae6b0 T edp_receiver_ready_T9 +ffffffff81fae780 T edp_receiver_ready_T7 +ffffffff81fae920 T dp_disable_link_phy_mst +ffffffff81faea30 T dp_retrain_link_dp_test +ffffffff81faec50 T dp_set_dsc_on_rx +ffffffff81faecc0 T dp_set_dsc_on_stream +ffffffff81faf290 T dp_set_dsc_enable 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link_enc_cfg_get_link_enc_used_by_stream +ffffffff81fb5420 T link_enc_cfg_get_link_enc +ffffffff81fb54b0 T link_enc_cfg_get_link_enc_used_by_stream_current +ffffffff81fb55e0 T link_enc_cfg_is_link_enc_avail +ffffffff81fb57d0 T link_enc_cfg_set_transient_mode +ffffffff81fb6000 T resource_parse_asic_id +ffffffff81fb6290 T dc_create_resource_pool +ffffffff81fb6590 T dc_destroy_resource_pool +ffffffff81fb6600 T resource_construct +ffffffff81fb6b30 T resource_unreference_clock_source +ffffffff81fb6bb0 T resource_reference_clock_source +ffffffff81fb6c30 T resource_get_clock_source_reference +ffffffff81fb6cc0 T resource_are_vblanks_synchronizable +ffffffff81fb6ee0 T resource_are_streams_timing_synchronizable +ffffffff81fb6fc0 T resource_find_used_clk_src_for_sharing +ffffffff81fb70f0 T get_num_mpc_splits +ffffffff81fb7180 T get_num_odm_splits +ffffffff81fb71d0 T resource_build_scaling_params +ffffffff81fb8100 T resource_build_scaling_params_for_context +ffffffff81fb8250 T find_idle_secondary_pipe +ffffffff81fb82f0 T resource_get_head_pipe_for_stream +ffffffff81fb8400 T dc_add_plane_to_context +ffffffff81fb8d30 t acquire_first_split_pipe +ffffffff81fb8ee0 T dc_remove_plane_from_context +ffffffff81fb9140 T dc_rem_all_planes_for_stream +ffffffff81fb9300 T dc_add_all_planes_for_stream +ffffffff81fb9430 T is_timing_changed +ffffffff81fb9490 T dc_is_stream_unchanged +ffffffff81fb9560 T dc_is_stream_scaling_unchanged +ffffffff81fb9600 T update_audio_usage +ffffffff81fb9670 T dc_add_stream_to_ctx +ffffffff81fb9740 T dc_remove_stream_from_ctx +ffffffff81fb9b30 T resource_map_pool_resources +ffffffff81fba540 t calculate_phy_pix_clks +ffffffff81fba690 T dc_resource_state_copy_construct_current +ffffffff81fba6b0 T dc_resource_state_copy_construct +ffffffff81fba870 T dc_resource_state_construct +ffffffff81fba890 T dc_resource_is_dsc_encoding_supported +ffffffff81fba8e0 T dc_validate_with_context +ffffffff81fbb4e0 t planes_changed_for_existing_stream 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dc_setup_vm_context +ffffffff81fc30f0 T dc_get_vmid_use_vector +ffffffff81fc3150 T vm_helper_init +ffffffff81fc4000 T dc_dmub_srv_create +ffffffff81fc40a0 T dc_dmub_srv_destroy +ffffffff81fc40f0 T dc_dmub_srv_cmd_queue +ffffffff81fc41d0 T dc_dmub_srv_cmd_execute +ffffffff81fc4230 T dc_dmub_srv_wait_idle +ffffffff81fc4290 T dc_dmub_srv_log_diagnostic_data +ffffffff81fc45e0 T dc_dmub_srv_clear_inbox0_ack +ffffffff81fc4640 T dc_dmub_srv_wait_for_inbox0_ack +ffffffff81fc46a0 T dc_dmub_srv_send_inbox0_cmd +ffffffff81fc4700 T dc_dmub_srv_cmd_with_reply_data +ffffffff81fc4780 T dc_dmub_srv_wait_phy_init +ffffffff81fc4840 T dc_dmub_srv_notify_stream_mask +ffffffff81fc48a0 T dc_dmub_srv_is_restore_required +ffffffff81fc4920 T dc_dmub_srv_get_dmub_outbox0_msg +ffffffff81fc4950 T dc_dmub_trace_event_control +ffffffff81fc4970 T dc_dmub_srv_drr_update_cmd +ffffffff81fc4a70 T dc_dmub_srv_set_drr_manual_trigger_cmd +ffffffff81fc4b80 T dc_dmub_srv_p_state_delegate +ffffffff81fc4ed0 T dc_dmub_srv_query_caps_cmd +ffffffff81fc4fc0 T dc_dmub_srv_get_visual_confirm_color_cmd +ffffffff81fc5190 T dc_dmub_setup_subvp_dmub_command +ffffffff81fc5b30 T dc_dmub_srv_get_diagnostic_data +ffffffff81fc5b70 T dc_send_update_cursor_info_to_dmu +ffffffff81fc5e20 T dc_dmub_check_min_version +ffffffff81fc6000 T dc_edid_parser_send_cea +ffffffff81fc60b0 T dc_edid_parser_recv_cea_ack +ffffffff81fc6140 T dc_edid_parser_recv_amd_vsdb +ffffffff81fc7000 T generic_reg_update_ex +ffffffff81fc7370 t set_reg_field_values +ffffffff81fc7530 T generic_reg_set_ex +ffffffff81fc7780 T generic_reg_get +ffffffff81fc77f0 T generic_reg_get2 +ffffffff81fc7880 T generic_reg_get3 +ffffffff81fc7920 T generic_reg_get4 +ffffffff81fc79d0 T generic_reg_get5 +ffffffff81fc7aa0 T generic_reg_get6 +ffffffff81fc7b80 T generic_reg_get7 +ffffffff81fc7c80 T generic_reg_get8 +ffffffff81fc7d90 T generic_reg_wait +ffffffff81fc8000 T generic_write_indirect_reg +ffffffff81fc8050 T generic_read_indirect_reg +ffffffff81fc80f0 T generic_indirect_reg_get +ffffffff81fc82a0 T generic_indirect_reg_update_ex +ffffffff81fc84c0 T generic_indirect_reg_update_ex_sync +ffffffff81fc86c0 T generic_indirect_reg_get_sync +ffffffff81fc87f0 T reg_sequence_start_gather +ffffffff81fc8880 T reg_sequence_start_execute +ffffffff81fc8a90 T reg_sequence_wait_done +ffffffff81fc9000 T dce_abm_create +ffffffff81fc90c0 T dce_abm_destroy +ffffffff81fc9110 t dce_abm_init +ffffffff81fc9390 t dce_abm_set_level +ffffffff81fc9490 t dce_abm_immediate_disable +ffffffff81fc94e0 t dce_abm_set_pipe +ffffffff81fc9630 t dce_abm_set_backlight_level_pwm +ffffffff81fc9830 t dce_abm_get_current_backlight +ffffffff81fc9860 t dce_abm_get_target_backlight +ffffffff81fca000 T dce_aud_az_enable +ffffffff81fca150 T dce_aud_az_disable +ffffffff81fca340 T dce_aud_az_configure +ffffffff81fcb000 t check_audio_bandwidth +ffffffff81fcb190 T dce_aud_wall_dto_setup +ffffffff81fcb310 T dce_aud_hw_init +ffffffff81fcb4e0 T dce_aud_destroy +ffffffff81fcb530 T dce_audio_create +ffffffff81fcb600 t dce_aud_endpoint_valid +ffffffff81fcc000 T dce110_engine_destroy +ffffffff81fcc050 T dce110_aux_engine_construct +ffffffff81fcc0d0 t dce_aux_configure_timeout +ffffffff81fcc2b0 T dce_aux_transfer_raw +ffffffff81fccad0 t acquire +ffffffff81fccd40 T dce_aux_transfer_dmub_raw +ffffffff81fcce40 T dce_aux_transfer_with_retries +ffffffff81fce000 T look_up_in_video_optimized_rate_tlb +ffffffff81fce070 T dce110_clk_src_construct +ffffffff81fce280 t calc_pll_max_vco_construct +ffffffff81fce420 T dce112_clk_src_construct +ffffffff81fce4b0 T dcn20_clk_src_construct +ffffffff81fce550 T dcn3_clk_src_construct +ffffffff81fce5f0 T dcn31_clk_src_construct +ffffffff81fce690 T dcn301_clk_src_construct +ffffffff81fce730 t dce110_clock_source_power_down +ffffffff81fce7c0 t dce110_program_pix_clk +ffffffff81fcee50 t dce110_get_pix_clk_dividers +ffffffff81fcf4a0 t get_pixel_clk_frequency_100hz +ffffffff81fcf5b0 t get_ss_info_from_atombios +ffffffff81fcf870 t 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dce112_i2c_hw_construct +ffffffff81fd7010 T dcn1_i2c_hw_construct +ffffffff81fd7080 T dcn2_i2c_hw_construct +ffffffff81fd7110 t is_hw_busy +ffffffff81fd8000 T dce_i2c_sw_construct +ffffffff81fd8030 T dce_i2c_engine_acquire_sw +ffffffff81fd80d0 T dce_i2c_submit_command_sw +ffffffff81fd88d0 t write_byte_sw +ffffffff81fd9000 T dce_ipp_construct +ffffffff81fd9050 T dce_ipp_destroy +ffffffff81fd90a0 t dce_ipp_cursor_set_position +ffffffff81fd91d0 t dce_ipp_cursor_set_attributes +ffffffff81fd9460 t dce_ipp_program_prescale +ffffffff81fd9620 t dce_ipp_program_input_lut +ffffffff81fd9ab0 t dce_ipp_set_degamma +ffffffff81fda000 T dce110_get_dig_frontend +ffffffff81fda0c0 T dce110_link_encoder_set_dp_phy_pattern_training_pattern +ffffffff81fda160 T dce110_psr_program_dp_dphy_fast_training +ffffffff81fda1d0 T dce110_psr_program_secondary_packet +ffffffff81fda240 T dce110_is_dig_enabled +ffffffff81fda2a0 T dce110_link_encoder_validate_dvi_output +ffffffff81fda350 T dce110_link_encoder_validate_dp_output +ffffffff81fda380 T dce110_link_encoder_construct +ffffffff81fda550 T dce110_link_encoder_validate_output_with_stream +ffffffff81fda700 T dce110_link_encoder_hw_init +ffffffff81fda920 T dce110_link_encoder_destroy +ffffffff81fda970 T dce110_link_encoder_setup +ffffffff81fdaaa0 T dce110_link_encoder_enable_tmds_output +ffffffff81fdab90 T dce110_link_encoder_enable_lvds_output +ffffffff81fdac80 T dce110_link_encoder_enable_dp_output +ffffffff81fdae00 T dce110_link_encoder_enable_dp_mst_output +ffffffff81fdaf80 T dce110_link_encoder_disable_output +ffffffff81fdb1a0 T dce110_link_encoder_dp_set_lane_settings +ffffffff81fdb340 T dce110_link_encoder_dp_set_phy_pattern +ffffffff81fdbb40 t set_dp_phy_pattern_hbr2_compliance_cp2520_2 +ffffffff81fdbd50 T dce110_link_encoder_update_mst_stream_allocation_table +ffffffff81fdbfd0 T dce110_link_encoder_connect_dig_be_to_fe +ffffffff81fdc100 T dce110_link_encoder_enable_hpd +ffffffff81fdc130 T dce110_link_encoder_disable_hpd +ffffffff81fdc160 T dce110_link_encoder_get_max_link_cap +ffffffff81fdd000 T dce_mem_input_construct +ffffffff81fdd060 T dce112_mem_input_construct +ffffffff81fdd0c0 T dce120_mem_input_construct +ffffffff81fdd120 t dce_mi_program_display_marks +ffffffff81fdd3f0 t dce_mi_allocate_dmif +ffffffff81fdd630 t dce_mi_free_dmif +ffffffff81fdd790 t dce_mi_program_surface_flip_and_addr +ffffffff81fddab0 t dce_mi_program_pte_vm +ffffffff81fddc70 t dce_mi_program_surface_config +ffffffff81fde4f0 t dce_mi_is_flip_pending +ffffffff81fde580 t program_nbp_watermark +ffffffff81fde780 t dce112_mi_program_display_marks +ffffffff81fdec90 t dce120_mi_program_display_marks +ffffffff81fdf150 t dce120_program_stutter_watermark +ffffffff81fe0000 T dce110_opp_set_clamping +ffffffff81fe02b0 T dce110_opp_program_bit_depth_reduction +ffffffff81fe0a80 T dce110_opp_program_clamping_and_pixel_encoding +ffffffff81fe0c20 T dce110_opp_set_dyn_expansion +ffffffff81fe0d70 T dce110_opp_program_fmt +ffffffff81fe0ef0 T dce110_opp_construct +ffffffff81fe0f50 T dce110_opp_destroy +ffffffff81fe1000 T dce_panel_cntl_construct +ffffffff81fe1060 t dce_panel_cntl_destroy +ffffffff81fe10b0 t dce_panel_cntl_hw_init +ffffffff81fe12f0 t dce_is_panel_backlight_on +ffffffff81fe13a0 t dce_is_panel_powered_on +ffffffff81fe1450 t dce_store_backlight_level +ffffffff81fe14f0 t dce_driver_set_backlight +ffffffff81fe1680 t dce_get_16_bit_backlight_from_pwm +ffffffff81fe2000 T get_filter_3tap_16p +ffffffff81fe2090 T get_filter_3tap_64p +ffffffff81fe2120 T get_filter_4tap_16p +ffffffff81fe21b0 T get_filter_4tap_64p +ffffffff81fe2240 T get_filter_5tap_64p +ffffffff81fe22d0 T get_filter_6tap_64p +ffffffff81fe2360 T get_filter_7tap_64p +ffffffff81fe23f0 T get_filter_8tap_64p +ffffffff81fe2480 T get_filter_2tap_16p +ffffffff81fe24b0 T get_filter_2tap_64p +ffffffff81fe3000 T dce110_se_audio_mute_control +ffffffff81fe3050 T dce110_se_dp_audio_setup +ffffffff81fe3060 t dce110_se_audio_setup +ffffffff81fe31f0 T dce110_se_dp_audio_enable +ffffffff81fe3430 T dce110_se_dp_audio_disable +ffffffff81fe3590 T dce110_se_hdmi_audio_setup +ffffffff81fe3aa0 T dce110_se_hdmi_audio_disable +ffffffff81fe3b00 T dce110_stream_encoder_construct +ffffffff81fe3b50 t dce110_stream_encoder_dp_set_stream_attribute +ffffffff81fe41a0 t dce110_stream_encoder_hdmi_set_stream_attribute +ffffffff81fe46c0 t dce110_stream_encoder_dvi_set_stream_attribute +ffffffff81fe47f0 t dce110_stream_encoder_lvds_set_stream_attribute +ffffffff81fe48d0 t dce110_stream_encoder_set_throttled_vcp_size +ffffffff81fe4ad0 t dce110_stream_encoder_update_hdmi_info_packets +ffffffff81fe51c0 t dce110_stream_encoder_stop_hdmi_info_packets +ffffffff81fe5460 t dce110_stream_encoder_update_dp_info_packets +ffffffff81fe55f0 t dce110_stream_encoder_stop_dp_info_packets +ffffffff81fe5760 t dce110_stream_encoder_dp_blank +ffffffff81fe58a0 t dce110_stream_encoder_dp_unblank +ffffffff81fe5a60 t setup_stereo_sync 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dmub_abm_destroy +ffffffff81fea110 t dmub_abm_init +ffffffff81fea4f0 t dmub_abm_set_level +ffffffff81fea6b0 t dmub_abm_get_current_backlight +ffffffff81fea6e0 t dmub_abm_get_target_backlight +ffffffff81fea710 t dmub_abm_init_config +ffffffff81fea840 t dmub_abm_set_pause +ffffffff81feb000 T dmub_hw_lock_mgr_cmd +ffffffff81feb0b0 T dmub_hw_lock_mgr_inbox0_cmd +ffffffff81feb0f0 T should_use_dmub_lock +ffffffff81fec000 T dmub_enable_outbox_notification +ffffffff81fed000 T dmub_psr_create +ffffffff81fed0a0 T dmub_psr_destroy +ffffffff81fed0f0 t dmub_psr_copy_settings +ffffffff81fed5a0 t dmub_psr_enable +ffffffff81fed730 t dmub_psr_get_state +ffffffff81feda20 t dmub_psr_set_level +ffffffff81fedb10 t dmub_psr_force_static +ffffffff81fedbc0 t dmub_psr_get_residency +ffffffff81fedc10 t dmub_psr_set_sink_vtotal_in_psr_active +ffffffff81fedcd0 t dmub_psr_set_power_opt +ffffffff81fee000 T dce100_enable_display_power_gating +ffffffff81fee0a0 T dce100_prepare_bandwidth +ffffffff81fee0f0 T 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dce110_compressor_program_compressed_surface_address_and_pitch +ffffffff81ff17f0 T dce110_compressor_set_fbc_invalidation_triggers +ffffffff81ff1870 T dce110_compressor_create +ffffffff81ff1920 T dce110_compressor_construct +ffffffff81ff19a0 T dce110_compressor_destroy +ffffffff81ff19f0 T get_max_support_fbc_buffersize +ffffffff81ff2000 T dce110_update_info_frame +ffffffff81ff20d0 T dce110_enable_stream +ffffffff81ff21d0 T dce110_edp_wait_for_hpd_ready +ffffffff81ff2410 T dce110_edp_power_control +ffffffff81ff28d0 T dce110_edp_wait_for_T12 +ffffffff81ff2a60 T dce110_edp_backlight_control +ffffffff81ff2da0 T dce110_enable_audio_stream +ffffffff81ff2eb0 T dce110_disable_audio_stream +ffffffff81ff3020 T dce110_disable_stream +ffffffff81ff3160 T dce110_unblank_stream +ffffffff81ff3260 T dce110_blank_stream +ffffffff81ff33b0 T dce110_set_avmute +ffffffff81ff3400 T dce110_enable_accelerated_mode +ffffffff81ff37e0 t power_down_all_hw_blocks +ffffffff81ff39a0 T dce110_set_safe_displaymarks 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dce112_compressor_create +ffffffff82003fe0 T dce112_compressor_destroy +ffffffff82005000 T dce112_hw_sequencer_construct +ffffffff82005050 t dce112_enable_display_power_gating +ffffffff82006000 T dce112_validate_bandwidth +ffffffff820060c0 T resource_map_phy_clock_resources +ffffffff82006230 T dce112_add_stream_to_ctx +ffffffff820062d0 T dce112_create_resource_pool +ffffffff82007670 t dce112_resource_destruct +ffffffff82007940 t dce112_destroy_resource_pool +ffffffff820079a0 t dce112_panel_cntl_create +ffffffff82007a30 t dce112_link_encoder_create +ffffffff82007b40 t dce112_validate_global +ffffffff82007bd0 t read_dce_straps +ffffffff82007c30 t create_audio +ffffffff82007c60 t dce112_stream_encoder_create +ffffffff82007d00 t dce112_hwseq_create +ffffffff82008000 T dce121_xgmi_enabled +ffffffff82008060 T dce120_hw_sequencer_construct +ffffffff820080c0 t dce120_enable_display_power_gating +ffffffff820080f0 t dce120_update_dchub +ffffffff82009000 T dce120_create_resource_pool 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cm_helper_translate_curve_to_degamma_hw_format +ffffffff82015000 T dpp_read_state +ffffffff82015260 T dpp1_get_optimal_number_of_taps +ffffffff82015400 T dpp_reset +ffffffff82015470 T dpp1_cnv_setup +ffffffff82015970 T dpp1_set_cursor_attributes +ffffffff82015aa0 T dpp1_set_cursor_position +ffffffff82015bd0 T dpp1_cnv_set_optional_cursor_attributes +ffffffff82015c90 T dpp1_dppclk_control +ffffffff82015d90 T dpp1_construct +ffffffff82015e10 t dpp1_cm_set_regamma_pwl +ffffffff82016000 T dpp1_cm_set_gamut_remap +ffffffff820161a0 T dpp1_cm_set_output_csc_default +ffffffff82016220 t dpp1_cm_program_color_matrix +ffffffff820163e0 T dpp1_cm_set_output_csc_adjustment +ffffffff820163f0 T dpp1_cm_power_on_regamma_lut +ffffffff82016470 T dpp1_cm_program_regamma_lut +ffffffff82016680 T dpp1_cm_configure_regamma_lut +ffffffff82016780 T dpp1_cm_program_regamma_luta_settings +ffffffff82016910 T dpp1_cm_program_regamma_lutb_settings +ffffffff82016aa0 T dpp1_program_input_csc +ffffffff82016cf0 T dpp1_program_bias_and_scale +ffffffff82016e60 T dpp1_program_degamma_lutb_settings +ffffffff82017010 T dpp1_program_degamma_luta_settings +ffffffff820171c0 T dpp1_power_on_degamma_lut +ffffffff82017240 T dpp1_set_degamma +ffffffff82017430 T dpp1_degamma_ram_select +ffffffff82017490 T dpp1_program_degamma_lut +ffffffff820177b0 T dpp1_set_degamma_pwl +ffffffff82017980 T dpp1_full_bypass +ffffffff82017b20 T dpp1_program_input_lut +ffffffff820181f0 T dpp1_set_hdr_multiplier +ffffffff82019000 T dpp1_dscl_calc_lb_num_partitions +ffffffff820191e0 T dpp1_dscl_is_lb_conf_valid +ffffffff82019220 T dpp1_dscl_set_scaler_manual_scale +ffffffff8201a5e0 t dpp1_dscl_get_filter_coeffs_64p +ffffffff8201a6b0 t dpp1_dscl_set_scaler_filter +ffffffff8201b000 T hubbub1_wm_read_state +ffffffff8201b380 T hubbub1_allow_self_refresh_control +ffffffff8201b400 T hubbub1_is_allow_self_refresh_enabled +ffffffff8201b470 T hubbub1_verify_allow_pstate_change_high +ffffffff8201b630 T hubbub1_wm_change_req_wa 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dcn10_pipe_control_lock +ffffffff82026a10 T dcn10_cursor_lock +ffffffff82026bd0 T dcn10_enable_vblanks_synchronization +ffffffff82027350 T dcn10_enable_timing_synchronization +ffffffff82027740 T dcn10_enable_per_frame_crtc_position_reset +ffffffff82027920 T dcn10_program_gamut_remap +ffffffff82027b20 T dcn10_program_output_csc +ffffffff82027c50 T dcn10_update_visual_confirm_color +ffffffff82027d50 T dcn10_update_mpcc +ffffffff82027fd0 T dcn10_blank_pixel_data +ffffffff82028110 T dcn10_set_hdr_multiplier +ffffffff820281a0 T dcn10_program_pipe +ffffffff82028d70 T dcn10_wait_for_pending_cleared +ffffffff82028e70 T dcn10_post_unlock_program_front_end +ffffffff82029120 T dcn10_prepare_bandwidth +ffffffff820292d0 T dcn10_optimize_bandwidth +ffffffff82029480 T dcn10_set_drr +ffffffff82029580 T dcn10_get_position +ffffffff82029610 T dcn10_set_static_screen_control +ffffffff820296b0 T dcn10_setup_stereo +ffffffff82029810 T dcn10_wait_for_mpcc_disconnect +ffffffff820299c0 T dcn10_dummy_display_power_gating +ffffffff820299f0 T dcn10_update_pending_status +ffffffff82029b30 T dcn10_update_dchub +ffffffff82029b60 T dcn10_set_cursor_position +ffffffff8202a0a0 T dcn10_set_cursor_attribute +ffffffff8202a0f0 T dcn10_set_cursor_sdr_white_level +ffffffff8202a1c0 T dcn10_get_vupdate_offset_from_vsync +ffffffff8202a250 T dcn10_calc_vupdate_position +ffffffff8202a2e0 T dcn10_setup_periodic_interrupt +ffffffff8202a3f0 T dcn10_setup_vupdate_interrupt +ffffffff8202a4b0 T dcn10_unblank_stream +ffffffff8202a5c0 T dcn10_send_immediate_sdp_message +ffffffff8202a620 T dcn10_set_clock +ffffffff8202a730 T dcn10_get_clock +ffffffff8202a790 T dcn10_get_dcc_en_bits +ffffffff8202b000 T snprintf_count +ffffffff8202b090 T dcn10_clear_status_bits +ffffffff8202b240 T dcn10_get_hw_state +ffffffff8202d000 T dcn10_hw_sequencer_construct +ffffffff8202e000 T dcn10_ipp_construct +ffffffff8202e050 T dcn20_ipp_construct +ffffffff8202e0a0 t dcn10_ipp_destroy +ffffffff8202f000 T dcn10_link_encoder_set_dp_phy_pattern_training_pattern +ffffffff8202f0b0 T dcn10_get_dig_frontend +ffffffff8202f170 T enc1_configure_encoder +ffffffff8202f1f0 T dcn10_psr_program_dp_dphy_fast_training +ffffffff8202f270 T dcn10_psr_program_secondary_packet +ffffffff8202f2f0 T dcn10_is_dig_enabled +ffffffff8202f350 T dcn10_link_encoder_validate_dvi_output +ffffffff8202f400 T dcn10_link_encoder_validate_dp_output +ffffffff8202f440 T dcn10_link_encoder_construct +ffffffff8202f630 T dcn10_link_encoder_validate_output_with_stream +ffffffff8202f820 T dcn10_link_encoder_hw_init +ffffffff8202fa20 T dcn10_aux_initialize +ffffffff8202fab0 T dcn10_link_encoder_destroy +ffffffff8202fb00 T dcn10_link_encoder_setup +ffffffff8202fc50 T dcn10_link_encoder_enable_tmds_output +ffffffff8202fd40 T dcn10_link_encoder_enable_tmds_output_with_clk_pattern_wa +ffffffff8202fe60 T dcn10_link_encoder_enable_dp_output +ffffffff8202ffe0 T dcn10_link_encoder_enable_dp_mst_output +ffffffff82030160 T dcn10_link_encoder_disable_output +ffffffff82030340 T dcn10_link_encoder_dp_set_lane_settings +ffffffff820304e0 T dcn10_link_encoder_dp_set_phy_pattern +ffffffff82030c00 t set_dp_phy_pattern_hbr2_compliance_cp2520_2 +ffffffff82030e00 T dcn10_link_encoder_update_mst_stream_allocation_table +ffffffff820310e0 T dcn10_link_encoder_connect_dig_be_to_fe +ffffffff82031220 T dcn10_link_encoder_enable_hpd +ffffffff82031260 T dcn10_link_encoder_disable_hpd +ffffffff820312a0 T dcn10_get_dig_mode +ffffffff82031310 T dcn10_link_encoder_get_max_link_cap +ffffffff82031390 t program_pattern_symbols +ffffffff82032000 T mpc1_set_bg_color +ffffffff820321e0 T mpc1_get_mpcc +ffffffff82032270 T mpc1_update_stereo_mix +ffffffff820323a0 T mpc1_assert_idle_mpcc +ffffffff82032470 T mpc1_get_mpcc_for_dpp +ffffffff82032520 T mpc1_is_mpcc_idle +ffffffff82032610 T mpc1_assert_mpcc_idle_before_connect +ffffffff82032750 T mpc1_insert_plane +ffffffff82032cf0 T mpc1_remove_mpcc +ffffffff820330b0 T mpc1_mpc_init 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optc1_set_timing_double_buffer +ffffffff82035b80 T optc1_set_blank +ffffffff82035c60 T optc1_is_blanked +ffffffff82035ce0 T optc1_enable_optc_clock +ffffffff82035f00 T optc1_disable_crtc +ffffffff82035ff0 T optc1_program_blank_color +ffffffff820360a0 T optc1_validate_timing +ffffffff820361a0 T optc1_get_vblank_counter +ffffffff82036200 T optc1_lock +ffffffff820362f0 T optc1_unlock +ffffffff82036360 T optc1_get_position +ffffffff820363e0 T optc1_is_counter_moving +ffffffff82036460 T optc1_did_triggered_reset_occur +ffffffff82036500 T optc1_disable_reset_trigger +ffffffff820365c0 T optc1_enable_reset_trigger +ffffffff820366d0 T optc1_enable_crtc_reset +ffffffff82036830 T optc1_wait_for_state +ffffffff82036900 T optc1_set_early_control +ffffffff82036930 T optc1_set_static_screen_control +ffffffff820369d0 T optc1_set_drr +ffffffff82036c00 T optc1_set_vtotal_min_max +ffffffff82036ca0 T optc1_get_crtc_scanoutpos +ffffffff82036db0 T optc1_program_stereo +ffffffff82036fb0 T optc1_is_stereo_left_eye +ffffffff82037020 T optc1_get_hw_timing +ffffffff82037140 T optc1_read_otg_state +ffffffff82037450 T optc1_get_otg_active_size +ffffffff82037560 T optc1_clear_optc_underflow +ffffffff820375b0 T optc1_tg_init +ffffffff82037660 T optc1_is_tg_enabled +ffffffff820376d0 T optc1_is_optc_underflow_occurred +ffffffff82037740 T optc1_configure_crc +ffffffff820379d0 T optc1_get_crc +ffffffff82037ae0 T dcn10_timing_generator_init +ffffffff82037b50 t optc1_enable_crtc +ffffffff82037c50 t optc1_set_test_pattern +ffffffff82038330 t optc1_program_manual_trigger +ffffffff820383e0 t optc1_setup_manual_trigger +ffffffff82039000 T dcn10_find_first_free_match_stream_enc_for_link +ffffffff820390b0 T dcn10_create_resource_pool +ffffffff8203a260 t dcn10_resource_construct_fp +ffffffff8203a3e0 t dcn10_resource_destruct +ffffffff8203a6f0 t dcn10_destroy_resource_pool +ffffffff8203a750 t dcn10_panel_cntl_create +ffffffff8203a7e0 t dcn10_link_encoder_create +ffffffff8203a8e0 t dcn10_validate_bandwidth +ffffffff8203a960 t dcn10_validate_global +ffffffff8203ab40 t dcn10_acquire_idle_pipe_for_layer +ffffffff8203ac80 t dcn10_validate_plane +ffffffff8203acd0 t dcn10_add_stream_to_ctx +ffffffff8203ae90 t dcn10_patch_unknown_plane_state +ffffffff8203aef0 t read_dce_straps +ffffffff8203af20 t create_audio +ffffffff8203af50 t dcn10_stream_encoder_create +ffffffff8203aff0 t dcn10_hwseq_create +ffffffff8203b0a0 t dcn10_get_dcc_compression_cap +ffffffff8203c000 T enc1_update_generic_info_packet +ffffffff8203c430 T enc1_stream_encoder_dp_set_stream_attribute +ffffffff8203c900 T enc1_stream_encoder_set_stream_attribute_helper +ffffffff8203c980 T enc1_stream_encoder_hdmi_set_stream_attribute +ffffffff8203cf70 T enc1_stream_encoder_dvi_set_stream_attribute +ffffffff8203d100 T enc1_stream_encoder_set_throttled_vcp_size +ffffffff8203d320 T enc1_stream_encoder_update_dp_info_packets +ffffffff8203d4c0 T enc1_stream_encoder_send_immediate_sdp_message +ffffffff8203d8d0 T enc1_stream_encoder_stop_dp_info_packets +ffffffff8203daa0 T enc1_stream_encoder_dp_blank +ffffffff8203dc10 T enc1_stream_encoder_dp_unblank +ffffffff8203de20 T enc1_stream_encoder_set_avmute +ffffffff8203de60 T enc1_reset_hdmi_stream_attribute +ffffffff8203df30 T get_audio_clock_info +ffffffff8203e020 T enc1_se_enable_audio_clock +ffffffff8203e080 T enc1_se_enable_dp_audio +ffffffff8203e150 T enc1_se_audio_mute_control +ffffffff8203e1a0 T enc1_se_dp_audio_setup +ffffffff8203e1b0 t enc1_se_audio_setup +ffffffff8203e340 T enc1_se_dp_audio_enable +ffffffff8203e590 T enc1_se_dp_audio_disable +ffffffff8203e700 T enc1_se_hdmi_audio_setup +ffffffff8203ebd0 T enc1_se_hdmi_audio_disable +ffffffff8203ec60 T enc1_setup_stereo_sync +ffffffff8203ece0 T enc1_dig_connect_to_otg +ffffffff8203ed20 T enc1_dig_source_otg +ffffffff8203ed90 T enc1_stream_encoder_dp_get_pixel_format +ffffffff8203ee80 T dcn10_stream_encoder_construct +ffffffff8203eee0 t enc1_stream_encoder_update_hdmi_info_packets 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dpp20_program_shaper +ffffffff820460a0 T dpp20_program_3dlut +ffffffff820467a0 t dpp20_set3dlut_ram12 +ffffffff82046970 T dpp2_set_hdr_multiplier +ffffffff82047000 t dsc2_get_enc_caps +ffffffff82047080 t dsc2_read_state +ffffffff82047230 t dsc2_validate_stream +ffffffff82047290 t dsc2_set_config +ffffffff82048620 t dsc2_get_packed_pps +ffffffff820487c0 t dsc2_enable +ffffffff82048970 t dsc2_disable +ffffffff82048af0 t dsc2_disconnect +ffffffff82048b60 T dsc2_construct +ffffffff82048bb0 t dsc_prepare_config +ffffffff82049270 t dsc_log_pps +ffffffff8204a000 T dwb2_config_dwb_cnv +ffffffff8204a1f0 T dwb2_disable +ffffffff8204a300 T dwb2_is_enabled +ffffffff8204a3a0 T dwb2_set_stereo +ffffffff8204a490 T dwb2_set_new_content +ffffffff8204a500 T dwb2_set_scaler +ffffffff8204a890 t dwb2_get_caps +ffffffff8204a970 t dwb2_enable +ffffffff8204aad0 t dwb2_update +ffffffff8204ac30 t dwb2_set_warmup +ffffffff8204ada0 T dcn20_dwbc_construct +ffffffff8204b000 T dwb_program_horz_scalar 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dcn20_program_pipe +ffffffff82058e30 T dcn20_post_unlock_program_front_end +ffffffff820591c0 T dcn20_prepare_bandwidth +ffffffff82059310 T dcn20_optimize_bandwidth +ffffffff820594e0 T dcn20_update_bandwidth +ffffffff820597a0 T dcn20_enable_writeback +ffffffff820598f0 T dcn20_disable_writeback +ffffffff82059980 T dcn20_wait_for_blank_complete +ffffffff82059a10 T dcn20_dmdata_status_done +ffffffff82059a60 T dcn20_disable_stream_gating +ffffffff82059b10 T dcn20_enable_stream_gating +ffffffff82059bb0 T dcn20_set_dmdata_attributes +ffffffff82059c70 T dcn20_init_vm_ctx +ffffffff82059d30 T dcn20_init_sys_ctx +ffffffff82059de0 T dcn20_update_plane_addr +ffffffff82059f20 T dcn20_unblank_stream +ffffffff8205a0a0 T dcn20_setup_vupdate_interrupt +ffffffff8205a110 T dcn20_reset_hw_ctx_wrap +ffffffff8205a4b0 T dcn20_update_visual_confirm_color +ffffffff8205a5c0 T dcn20_update_mpcc +ffffffff8205a840 T dcn20_enable_stream +ffffffff8205aa10 T dcn20_program_dmdata_engine +ffffffff8205aab0 T dcn20_fpga_init_hw +ffffffff8205b0b0 T dcn20_optimize_timing_for_fsft +ffffffff8205b0f0 T dcn20_set_disp_pattern_generator +ffffffff8205c000 T dcn20_hw_sequencer_construct +ffffffff8205d000 T enc2_fec_set_enable +ffffffff8205d090 T enc2_fec_set_ready +ffffffff8205d0d0 T enc2_fec_is_active +ffffffff8205d140 T link_enc2_read_state +ffffffff8205d1f0 T dcn20_link_encoder_enable_dp_output +ffffffff8205d300 T dcn20_link_encoder_get_max_link_cap +ffffffff8205d3b0 T dcn20_link_encoder_is_in_alt_mode +ffffffff8205d430 T enc2_hw_init +ffffffff8205d510 T dcn20_link_encoder_construct +ffffffff8205e000 T mmhubbub2_config_mcif_irq +ffffffff8205e130 T mmhubbub2_enable_mcif +ffffffff8205e170 T mmhubbub2_disable_mcif +ffffffff8205e1b0 T mcifwb2_dump_frame +ffffffff8205e2c0 t mmhubbub2_config_mcif_buf +ffffffff8205e910 t mmhubbub2_config_mcif_arb +ffffffff8205ed20 T dcn20_mmhubbub_construct +ffffffff8205f000 T mpc2_update_blending +ffffffff8205f2a0 T mpc2_set_denorm +ffffffff8205f310 T mpc2_set_denorm_clamp +ffffffff8205f460 T mpc2_set_output_csc +ffffffff8205f650 T mpc2_set_ocsc_default +ffffffff8205f830 T mpc20_power_on_ogam_lut +ffffffff8205f8b0 T mpc2_set_output_gamma +ffffffff82060070 T mpc2_assert_idle_mpcc +ffffffff82060180 T mpc2_assert_mpcc_idle_before_connect +ffffffff820603d0 t mpc2_get_mpcc_for_dpp +ffffffff82060490 T dcn20_mpc_construct +ffffffff82061000 T opp2_set_disp_pattern_generator +ffffffff82061810 T opp2_dpg_set_blank_color +ffffffff82061990 T opp2_program_dpg_dimensions +ffffffff82061a20 T opp2_dpg_is_blanked +ffffffff82061ae0 T opp2_program_left_edge_extra_pixel +ffffffff82061b30 T dcn20_opp_construct +ffffffff82062000 T optc2_enable_crtc +ffffffff82062100 T optc2_set_gsl +ffffffff820621f0 T optc2_set_gsl_source_select +ffffffff820622b0 T optc2_set_dsc_config +ffffffff82062380 T optc2_get_dsc_status +ffffffff820623c0 T optc2_is_two_pixels_per_containter +ffffffff820623d0 T optc2_set_odm_bypass +ffffffff82062510 T optc2_set_odm_combine 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dcn20_stream_encoder_create +ffffffff82064790 T dcn20_hwseq_create +ffffffff82064800 T dcn20_clock_source_destroy +ffffffff82064850 T dcn20_dsc_create +ffffffff82064910 T dcn20_dsc_destroy +ffffffff82064960 T dcn20_hubp_create +ffffffff82064a30 T dcn20_build_mapped_resource +ffffffff82064c50 T dcn20_acquire_dsc +ffffffff82064d90 T dcn20_release_dsc +ffffffff82064e00 T dcn20_add_dsc_to_stream_resource +ffffffff82064f50 T dcn20_add_stream_to_ctx +ffffffff820650e0 T dcn20_remove_stream_from_ctx +ffffffff820651e0 T dcn20_split_stream_for_odm +ffffffff82065690 T dcn20_split_stream_for_mpc +ffffffff82065810 T dcn20_calc_max_scaled_time +ffffffff82065890 T dcn20_set_mcif_arb_params +ffffffff82065a00 T dcn20_validate_dsc +ffffffff82065b90 T dcn20_find_secondary_pipe +ffffffff82065d70 T dcn20_merge_pipes_for_validate +ffffffff82066010 T dcn20_validate_apply_pipe_split_flags +ffffffff82066800 T dcn20_fast_validate_bw +ffffffff82066d10 T dcn20_validate_bandwidth +ffffffff82066d90 T dcn20_acquire_idle_pipe_for_layer +ffffffff82066ea0 T dcn20_get_dcc_compression_cap +ffffffff82066ed0 T dcn20_patch_unknown_plane_state +ffffffff82066f30 T dcn20_dwbc_create +ffffffff82067050 T dcn20_mmhubbub_create +ffffffff820671b0 T dcn20_create_resource_pool +ffffffff82068a00 t dcn20_resource_destruct +ffffffff82068ea0 t dcn20_destroy_resource_pool +ffffffff82068f00 t dcn20_panel_cntl_create +ffffffff82068f90 t read_dce_straps +ffffffff82068fc0 t dcn20_create_audio +ffffffff82069000 T enc2_set_dynamic_metadata +ffffffff82069280 T enc2_stream_encoder_dp_unblank +ffffffff820695b0 T enc2_stream_encoder_dp_set_stream_attribute +ffffffff82069610 T enc2_get_fifo_cal_average_level +ffffffff82069670 T dcn20_stream_encoder_construct +ffffffff820696d0 t enc2_stream_encoder_update_hdmi_info_packets +ffffffff820697a0 t enc2_stream_encoder_stop_hdmi_info_packets +ffffffff82069aa0 t enc2_stream_encoder_update_dp_info_packets +ffffffff82069b50 t enc2_read_state +ffffffff82069cd0 t enc2_dp_set_dsc_config +ffffffff82069da0 t enc2_dp_set_dsc_pps_info_packet +ffffffff8206a270 t enc2_dp_set_odm_combine +ffffffff8206a2b0 t enc2_update_hdmi_info_packet +ffffffff8206b000 T dcn20_vmid_setup +ffffffff8206c000 T dccg201_create +ffffffff8206c0b0 t dccg201_update_dpp_dto +ffffffff8206d000 T dpp201_construct +ffffffff8206d080 t dpp201_get_optimal_number_of_taps +ffffffff8206d460 t dpp201_cnv_setup +ffffffff8206e000 T hubbub201_construct +ffffffff8206e060 t hubbub201_program_watermarks +ffffffff8206f000 T dcn201_hubp_construct +ffffffff8206f070 t hubp201_setup +ffffffff8206f360 t hubp201_program_surface_config +ffffffff82070000 T dcn201_update_plane_addr +ffffffff820702a0 T dcn201_init_blank +ffffffff820703e0 T dcn201_init_hw +ffffffff82070ca0 T dcn201_plane_atomic_disconnect +ffffffff82070e10 T dcn201_update_mpcc +ffffffff820710b0 T dcn201_pipe_control_lock +ffffffff820711b0 T dcn201_set_cursor_attribute +ffffffff82071240 T dcn201_set_dmdata_attributes +ffffffff82071350 T dcn201_unblank_stream +ffffffff82072000 T dcn201_hw_sequencer_construct +ffffffff82073000 T dcn201_link_encoder_construct +ffffffff820731a0 t dcn201_link_encoder_is_in_alt_mode +ffffffff82073210 t dcn201_link_encoder_get_max_link_cap +ffffffff82074000 t mpc201_set_out_rate_control +ffffffff82074130 T dcn201_mpc_construct +ffffffff82075000 T dcn201_opp_construct +ffffffff82076000 T optc201_is_two_pixels_per_containter +ffffffff82076010 T dcn201_timing_generator_init +ffffffff82076080 t optc201_validate_timing +ffffffff82076180 t optc201_triplebuffer_unlock +ffffffff82076230 t optc201_triplebuffer_lock +ffffffff82076350 t optc201_get_optc_source +ffffffff82077000 T dcn201_create_resource_pool +ffffffff82077a40 t dcn201_resource_destruct +ffffffff82077d30 t dcn201_destroy_resource_pool +ffffffff82077d90 t dcn201_link_init +ffffffff82077de0 t dcn201_link_encoder_create +ffffffff82077ea0 t dcn201_acquire_idle_pipe_for_layer +ffffffff82077fb0 t dcn201_populate_dml_writeback_from_context +ffffffff82078010 t read_dce_straps +ffffffff82078040 t dcn201_create_audio +ffffffff82078070 t dcn201_stream_encoder_create +ffffffff82078110 t dcn201_hwseq_create +ffffffff82078180 t dcn201_get_dcc_compression_cap +ffffffff82079000 T dccg21_update_dpp_dto +ffffffff82079120 T dccg21_create +ffffffff8207a000 T dcn21_dchvm_init +ffffffff8207a200 T hubbub21_init_dchub +ffffffff8207a3e0 T hubbub21_program_urgent_watermarks +ffffffff8207abd0 T hubbub21_program_stutter_watermarks +ffffffff8207b0c0 T hubbub21_program_pstate_watermarks +ffffffff8207b360 T hubbub21_program_watermarks +ffffffff8207b4c0 T hubbub21_wm_read_state +ffffffff8207b7c0 T hubbub21_construct +ffffffff8207b820 t hubbub21_apply_DEDCN21_147_wa +ffffffff8207c000 T apply_DEDCN21_142_wa_for_hostvm_deadline +ffffffff8207c2e0 T hubp21_program_deadline +ffffffff8207c310 T hubp21_program_requestor +ffffffff8207c6b0 T hubp21_construct +ffffffff8207c720 t hubp21_setup +ffffffff8207c780 t hubp21_set_viewport +ffffffff8207ca70 t hubp21_program_surface_flip_and_addr +ffffffff8207d390 t hubp21_set_vm_system_aperture_settings +ffffffff8207d4c0 t hubp21_init +ffffffff8207d4f0 t hubp21_validate_dml_output +ffffffff8207f000 T dcn21_init_sys_ctx +ffffffff8207f110 T dcn21_s0i3_golden_init_wa +ffffffff8207f170 T dcn21_exit_optimized_pwr_state +ffffffff8207f190 T dcn21_optimize_pwr_state +ffffffff8207f1c0 T dcn21_PLAT_58856_wa +ffffffff8207f220 T dcn21_set_abm_immediate_disable +ffffffff8207f340 T dcn21_set_pipe +ffffffff8207f450 T dcn21_set_backlight_level +ffffffff8207f620 T dcn21_is_abm_supported +ffffffff82080000 T dcn21_hw_sequencer_construct +ffffffff82081000 T dcn21_link_encoder_enable_dp_output +ffffffff82081140 t dcn21_link_encoder_acquire_phy +ffffffff82081320 T dcn21_link_encoder_construct +ffffffff82081510 t dcn21_link_encoder_enable_dp_mst_output +ffffffff82081580 t dcn21_link_encoder_disable_output +ffffffff82082000 T dcn21_fast_validate_bw +ffffffff82082660 T dcn21_create_resource_pool +ffffffff820839c0 t dcn21_resource_destruct +ffffffff82083e60 t dcn21_destroy_resource_pool +ffffffff82083ec0 t dcn21_panel_cntl_create +ffffffff82083f50 t dcn21_link_encoder_create +ffffffff82084050 t dcn21_validate_bandwidth +ffffffff820840d0 t dcn21_patch_unknown_plane_state +ffffffff82084120 t dcn21_get_panel_config_defaults +ffffffff820841a0 t read_dce_straps +ffffffff820841d0 t dcn21_create_audio +ffffffff82084200 t dcn21_stream_encoder_create +ffffffff820842a0 t dcn21_hwseq_create +ffffffff82085000 T afmt3_setup_hdmi_audio +ffffffff820851d0 T afmt3_se_audio_setup +ffffffff82085390 T afmt3_audio_mute_control +ffffffff82085400 T afmt3_audio_info_immediate_update +ffffffff82085440 T afmt3_setup_dp_audio +ffffffff82085530 T afmt3_construct +ffffffff82086000 T cm_helper_program_gamcor_xfer_func +ffffffff820863a0 T cm3_helper_translate_curve_to_hw_format +ffffffff82086fa0 T cm3_helper_convert_to_custom_float +ffffffff820873f0 T cm3_helper_translate_curve_to_degamma_hw_format +ffffffff82087c60 T is_rgb_equal +ffffffff82088000 T dccg3_create +ffffffff820880b0 T dccg30_create +ffffffff82089000 T dcn30_link_encoder_validate_output_with_stream +ffffffff82089010 T dcn30_link_encoder_construct +ffffffff82089230 T enc3_hw_init +ffffffff8208a000 T enc3_stream_encoder_update_hdmi_info_packets +ffffffff8208a100 t enc3_update_hdmi_info_packet +ffffffff8208a4f0 T enc3_stream_encoder_stop_hdmi_info_packets +ffffffff8208aab0 T enc3_dp_set_dsc_pps_info_packet +ffffffff8208add0 T enc3_stream_encoder_update_dp_info_packets +ffffffff8208b010 T enc3_audio_mute_control +ffffffff8208b080 T enc3_se_dp_audio_setup +ffffffff8208b100 T enc3_se_dp_audio_enable +ffffffff8208b1f0 T enc3_se_hdmi_audio_setup +ffffffff8208b500 T dcn30_dio_stream_encoder_construct +ffffffff8208b570 t enc3_stream_encoder_hdmi_set_stream_attribute +ffffffff8208bb60 t enc3_stream_encoder_dvi_set_stream_attribute +ffffffff8208bd60 t enc3_read_state +ffffffff8208bef0 t enc3_dp_set_dsc_config +ffffffff8208bfc0 t enc3_dp_set_odm_combine +ffffffff8208c000 T dpp30_read_state +ffffffff8208c050 T dpp3_program_post_csc +ffffffff8208c230 T dpp3_set_pre_degam +ffffffff8208c2e0 T dpp3_cnv_setup +ffffffff8208cba0 T dpp3_set_cursor_attributes +ffffffff8208cd10 T dpp3_get_optimal_number_of_taps +ffffffff8208d780 T dpp3_construct +ffffffff8208d7e0 t dpp3_deferred_update +ffffffff8208dbb0 t dpp3_program_blnd_lut +ffffffff8208e620 t dpp3_program_shaper +ffffffff82090670 t dpp3_program_3dlut +ffffffff82090e40 t dpp3_set3dlut_ram12 +ffffffff82092000 T dpp3_program_cm_dealpha +ffffffff820920a0 T dpp3_program_cm_bias +ffffffff82092190 T dpp3_program_gamcor_lut +ffffffff82092bd0 t dpp3_power_on_gamcor_lut +ffffffff82092d00 T dpp3_set_hdr_multiplier +ffffffff82092d50 T dpp3_cm_set_gamut_remap +ffffffff82093000 T dwb3_config_fc +ffffffff820931b0 T dwb3_set_stereo +ffffffff82093270 T dwb3_enable +ffffffff820933a0 T dwb3_set_denorm +ffffffff820934c0 T dwb3_disable +ffffffff82093570 T dwb3_update +ffffffff820936a0 T dwb3_is_enabled +ffffffff82093740 T dwb3_set_new_content +ffffffff82093780 t dwb3_get_caps +ffffffff82093820 T dcn30_dwbc_construct +ffffffff82093870 T dwb3_set_host_read_rate_control +ffffffff82094000 T dwb3_ogam_set_input_transfer_func +ffffffff820949d0 T dwb3_set_gamut_remap +ffffffff82094b30 t dwb3_program_gamut_remap +ffffffff82094cc0 T dwb3_program_hdr_mult +ffffffff82095000 T hubbub3_init_dchub_sys_ctx +ffffffff820951e0 T hubbub3_program_watermarks +ffffffff820952f0 T hubbub3_dcc_support_swizzle +ffffffff820953c0 T hubbub3_get_dcc_compression_cap +ffffffff820955b0 T hubbub3_force_wm_propagate_to_pipes +ffffffff82095660 T hubbub3_force_pstate_change_control +ffffffff820956e0 T hubbub3_init_watermarks +ffffffff82095a20 T hubbub3_construct +ffffffff82096000 T hubp3_set_vm_system_aperture_settings +ffffffff82096130 T hubp3_program_surface_flip_and_addr +ffffffff82096b60 T hubp3_dcc_control +ffffffff82096c20 T hubp3_dcc_control_sienna_cichlid +ffffffff82096d30 T hubp3_dmdata_set_attributes +ffffffff82096f30 T hubp3_program_surface_config +ffffffff82097230 T hubp3_read_state +ffffffff82097480 T hubp3_setup +ffffffff82097510 T hubp3_init +ffffffff82097540 T hubp3_construct +ffffffff82098000 T dcn30_set_blend_lut +ffffffff82098070 T dcn30_set_input_transfer_func +ffffffff820981d0 T dcn30_set_output_transfer_func +ffffffff820984f0 T dcn30_update_writeback +ffffffff82098580 t dcn30_set_writeback +ffffffff82098730 T dcn30_mmhubbub_warmup +ffffffff820989e0 T dcn30_enable_writeback +ffffffff82098ab0 T dcn30_disable_writeback +ffffffff82098b90 T dcn30_program_all_writeback_pipes_in_tree +ffffffff82098e80 T dcn30_init_hw +ffffffff82099770 T dcn30_set_avmute +ffffffff820997d0 T dcn30_update_info_frame +ffffffff820998a0 T dcn30_program_dmdata_engine +ffffffff82099940 T dcn30_apply_idle_power_optimizations +ffffffff82099ec0 T dcn30_does_plane_fit_in_mall +ffffffff82099f70 T dcn30_hardware_release +ffffffff8209a080 T dcn30_set_disp_pattern_generator +ffffffff8209a0f0 T dcn30_prepare_bandwidth +ffffffff8209b000 T dcn30_hw_sequencer_construct +ffffffff8209c000 t mmhubbub3_warmup_mcif +ffffffff8209c210 t mmhubbub3_config_mcif_buf +ffffffff8209c6c0 t mmhubbub3_config_mcif_arb +ffffffff8209cb10 T dcn30_mmhubbub_construct +ffffffff8209d000 T mpc3_is_dwb_idle +ffffffff8209d070 T mpc3_set_dwb_mux +ffffffff8209d0f0 T mpc3_disable_dwb_mux +ffffffff8209d170 T mpc3_set_out_rate_control +ffffffff8209d280 T mpc3_get_ogam_current +ffffffff8209d320 T mpc3_power_on_ogam_lut +ffffffff8209d3f0 T mpc3_set_output_gamma +ffffffff8209df90 T mpc3_set_denorm +ffffffff8209e000 T mpc3_set_denorm_clamp +ffffffff8209e150 T mpc3_program_shaper +ffffffff820a03c0 t mpc3_power_on_shaper_3dlut +ffffffff820a0740 T mpc3_init_mpcc +ffffffff820a07c0 T mpc3_set_gamut_remap +ffffffff820a0a10 T mpc3_program_3dlut +ffffffff820a11a0 t mpc3_set3dlut_ram12 +ffffffff820a1380 T mpc3_set_output_csc +ffffffff820a14f0 T mpc3_set_ocsc_default +ffffffff820a1660 T mpc3_set_rmu_mux +ffffffff820a1700 T mpc3_get_rmu_mux_status +ffffffff820a17b0 T mpcc3_acquire_rmu +ffffffff820a1910 t mpcc3_release_rmu +ffffffff820a1a80 t mpc3_set_mpc_mem_lp_mode +ffffffff820a1c10 T dcn30_mpc_construct +ffffffff820a2000 T optc3_triplebuffer_lock +ffffffff820a2120 T optc3_lock_doublebuffer_enable +ffffffff820a23b0 T optc3_lock_doublebuffer_disable +ffffffff820a24c0 T optc3_lock +ffffffff820a2590 T optc3_set_out_mux +ffffffff820a25d0 T optc3_program_blank_color +ffffffff820a2710 T optc3_set_drr_trigger_window +ffffffff820a27a0 T optc3_set_vtotal_change_limit +ffffffff820a2810 T optc3_set_dsc_config +ffffffff820a2860 T optc3_set_odm_bypass +ffffffff820a29e0 T optc3_wait_drr_doublebuffer_pending_clear +ffffffff820a2a60 T optc3_set_vtotal_min_max +ffffffff820a2aa0 T optc3_tg_init +ffffffff820a2b00 T dcn30_timing_generator_init +ffffffff820a2b70 t optc3_set_odm_combine +ffffffff820a3000 T dcn30_add_stream_to_ctx +ffffffff820a3020 T dcn30_populate_dml_pipes_from_context +ffffffff820a3110 T dcn30_populate_dml_writeback_from_context +ffffffff820a3170 T dcn30_calc_max_scaled_time +ffffffff820a31d0 T dcn30_set_mcif_arb_params +ffffffff820a3340 T dcn30_acquire_post_bldn_3dlut +ffffffff820a34c0 T dcn30_release_post_bldn_3dlut +ffffffff820a3570 T dcn30_internal_validate_bw +ffffffff820a4340 t dcn30_split_stream_for_mpc_or_odm +ffffffff820a4660 T dcn30_can_support_mclk_switch_using_fw_based_vblank_stretch +ffffffff820a4780 T dcn30_setup_mclk_switch_using_fw_based_vblank_stretch +ffffffff820a4820 T dcn30_update_soc_for_wm_a +ffffffff820a4870 T dcn30_calculate_wm_and_dlg +ffffffff820a48e0 T dcn30_validate_bandwidth +ffffffff820a4d20 T dcn30_update_bw_bounding_box +ffffffff820a5500 T dcn30_create_resource_pool +ffffffff820a6ad0 t dcn30_resource_destruct +ffffffff820a7040 t dcn30_destroy_resource_pool +ffffffff820a70a0 t dcn30_panel_cntl_create +ffffffff820a7130 t dcn30_link_encoder_create +ffffffff820a71f0 t dcn30_get_panel_config_defaults +ffffffff820a7260 t read_dce_straps +ffffffff820a7290 t dcn30_create_audio +ffffffff820a72c0 t dcn30_stream_encoder_create +ffffffff820a7440 t dcn30_hwseq_create +ffffffff820a8000 T vpg3_update_generic_info_packet +ffffffff820a89a0 T vpg3_construct +ffffffff820a9000 T dccg301_create +ffffffff820aa000 T dcn301_link_encoder_construct +ffffffff820ab000 T hubbub301_construct +ffffffff820ac000 T dcn301_hw_sequencer_construct +ffffffff820ad000 T dcn301_panel_cntl_construct +ffffffff820ad050 t dcn301_panel_cntl_destroy +ffffffff820ad0a0 t dcn301_panel_cntl_hw_init +ffffffff820ad2b0 t dcn301_is_panel_backlight_on +ffffffff820ad310 t dcn301_is_panel_powered_on +ffffffff820ad3c0 t dcn301_store_backlight_level +ffffffff820ad460 t dcn301_get_16_bit_backlight_from_pwm +ffffffff820ae000 T dcn301_create_resource_pool +ffffffff820af5a0 t dcn301_destruct +ffffffff820afae0 t dcn301_destroy_resource_pool +ffffffff820afb40 t dcn301_panel_cntl_create +ffffffff820afbd0 t dcn301_link_encoder_create +ffffffff820afc90 t dcn301_calculate_wm_and_dlg +ffffffff820afd00 t read_dce_straps +ffffffff820afd30 t dcn301_create_audio +ffffffff820afd60 t dcn301_stream_encoder_create +ffffffff820afee0 t dcn301_hwseq_create +ffffffff820b0000 T dcn302_dpp_pg_control +ffffffff820b02a0 T dcn302_hubp_pg_control +ffffffff820b0550 T dcn302_dsc_pg_control +ffffffff820b1000 T dcn302_hw_sequencer_construct +ffffffff820b2000 T dcn302_update_bw_bounding_box +ffffffff820b2050 T dcn302_create_resource_pool +ffffffff820b33e0 t dcn302_resource_destruct +ffffffff820b38f0 t dcn302_destroy_resource_pool +ffffffff820b3940 t dcn302_panel_cntl_create +ffffffff820b39d0 t dcn302_link_encoder_create +ffffffff820b3a90 t dcn302_get_panel_config_defaults +ffffffff820b3b00 t read_dce_straps +ffffffff820b3b30 t dcn302_create_audio +ffffffff820b3b60 t dcn302_stream_encoder_create +ffffffff820b3ce0 t dcn302_hwseq_create +ffffffff820b4000 T dcn303_dpp_pg_control +ffffffff820b4030 T dcn303_hubp_pg_control +ffffffff820b4060 T dcn303_dsc_pg_control +ffffffff820b4090 T dcn303_enable_power_gating_plane +ffffffff820b5000 T dcn303_hw_sequencer_construct +ffffffff820b6000 T dcn303_update_bw_bounding_box +ffffffff820b6050 T dcn303_create_resource_pool +ffffffff820b7290 t dcn303_resource_destruct +ffffffff820b77b0 t dcn303_destroy_resource_pool +ffffffff820b7800 t dcn303_panel_cntl_create +ffffffff820b7890 t dcn303_link_encoder_create +ffffffff820b7950 t dcn303_get_panel_config_defaults +ffffffff820b79c0 t read_dce_straps +ffffffff820b79f0 t dcn303_create_audio +ffffffff820b7a20 t dcn303_stream_encoder_create +ffffffff820b7ba0 t dcn303_hwseq_create +ffffffff820b8000 T afmt31_powerdown +ffffffff820b8090 T afmt31_poweron +ffffffff820b8120 T afmt31_construct +ffffffff820b9000 T apg31_construct +ffffffff820b9050 t apg31_se_audio_setup +ffffffff820b9160 t apg31_audio_mute_control +ffffffff820b91a0 t apg31_enable +ffffffff820b92b0 t apg31_disable +ffffffff820ba000 T dccg31_update_dpp_dto +ffffffff820ba160 T dccg31_set_dpstreamclk +ffffffff820ba2f0 t dccg31_disable_dpstreamclk +ffffffff820ba440 T dccg31_enable_symclk32_se +ffffffff820ba740 T dccg31_disable_symclk32_se +ffffffff820baa10 T dccg31_enable_symclk32_le +ffffffff820babf0 T dccg31_disable_symclk32_le +ffffffff820bad90 T dccg31_disable_dscclk +ffffffff820baf50 T dccg31_enable_dscclk +ffffffff820bb120 T dccg31_set_physymclk +ffffffff820bb640 T dccg31_set_dtbclk_dto +ffffffff820bb8f0 T dccg31_set_audio_dtbclk_dto +ffffffff820bba00 T dccg31_get_dccg_ref_freq +ffffffff820bba30 T dccg31_set_dispclk_change_mode +ffffffff820bba80 T dccg31_init +ffffffff820bbfe0 T dccg31_otg_add_pixel +ffffffff820bc020 T dccg31_otg_drop_pixel +ffffffff820bc060 T dccg31_create +ffffffff820bd000 T dcn31_link_encoder_set_dio_phy_mux +ffffffff820bd390 T dcn31_link_encoder_construct +ffffffff820bd590 T dcn31_link_encoder_construct_minimal +ffffffff820bd610 T dcn31_link_encoder_enable_dp_output +ffffffff820bd850 T dcn31_link_encoder_enable_dp_mst_output +ffffffff820bda90 T dcn31_link_encoder_disable_output +ffffffff820bdd20 T dcn31_link_encoder_is_in_alt_mode +ffffffff820bde60 T dcn31_link_encoder_get_max_link_cap +ffffffff820bdfd0 t enc31_hw_init +ffffffff820bf000 T dcn31_hpo_dp_link_enc_enable +ffffffff820bf160 T dcn31_hpo_dp_link_enc_disable +ffffffff820bf1d0 T dcn31_hpo_dp_link_enc_set_link_test_pattern +ffffffff820bfb00 T dcn31_hpo_dp_link_enc_update_stream_allocation_table +ffffffff820bfd90 T dcn31_hpo_dp_link_enc_set_throttled_vcp_size +ffffffff820c0030 T dcn31_hpo_dp_link_enc_read_state +ffffffff820c02e0 T dcn31_hpo_dp_link_enc_enable_dp_output +ffffffff820c03e0 T dcn31_hpo_dp_link_enc_disable_output +ffffffff820c0520 T dcn31_hpo_dp_link_enc_set_ffe +ffffffff820c0610 T hpo_dp_link_encoder31_construct +ffffffff820c0670 t dcn31_hpo_dp_link_enc_is_in_alt_mode +ffffffff820c1000 T dcn31_hpo_dp_stream_encoder_construct +ffffffff820c1070 t dcn31_hpo_dp_stream_enc_enable_stream +ffffffff820c11b0 t dcn31_hpo_dp_stream_enc_dp_unblank +ffffffff820c1460 t dcn31_hpo_dp_stream_enc_dp_blank +ffffffff820c1560 t dcn31_hpo_dp_stream_enc_disable +ffffffff820c15d0 t dcn31_hpo_dp_stream_enc_set_stream_attribute +ffffffff820c1e80 t dcn31_hpo_dp_stream_enc_update_dp_info_packets +ffffffff820c2040 t dcn31_hpo_dp_stream_enc_stop_dp_info_packets +ffffffff820c21d0 t dcn31_hpo_dp_stream_enc_set_dsc_pps_info_packet +ffffffff820c2470 t dcn31_hpo_dp_stream_enc_map_stream_to_link +ffffffff820c2570 t dcn31_hpo_dp_stream_enc_mute_control +ffffffff820c25e0 t dcn31_hpo_dp_stream_enc_audio_setup +ffffffff820c2690 t dcn31_hpo_dp_stream_enc_audio_enable +ffffffff820c2760 t dcn31_hpo_dp_stream_enc_audio_disable +ffffffff820c2910 t dcn31_hpo_dp_stream_enc_read_state +ffffffff820c2aa0 t dcn31_set_hblank_min_symbol_width +ffffffff820c3000 T hubbub31_init_dchub_sys_ctx +ffffffff820c31f0 T hubbub31_construct +ffffffff820c3290 t hubbub31_get_dcc_compression_cap +ffffffff820c3480 t hubbub31_get_dchub_ref_freq +ffffffff820c3560 t hubbub31_program_watermarks +ffffffff820c4e20 t hubbub31_verify_allow_pstate_change_high +ffffffff820c4fe0 t dcn31_program_det_size +ffffffff820c51c0 t dcn31_program_compbuf_size +ffffffff820c5440 t dcn31_init_crb +ffffffff820c6000 T hubp31_set_unbounded_requesting +ffffffff820c6090 T hubp31_soft_reset +ffffffff820c60e0 T hubp31_construct +ffffffff820c6150 t hubp31_program_extended_blank +ffffffff820c7000 T dcn31_init_hw +ffffffff820c7960 T dcn31_dsc_pg_control +ffffffff820c7cb0 T dcn31_enable_power_gating_plane +ffffffff820c7f10 T dcn31_update_info_frame +ffffffff820c7fe0 T dcn31_z10_save_init +ffffffff820c80a0 T dcn31_z10_restore +ffffffff820c8180 T dcn31_hubp_pg_control +ffffffff820c84a0 T dcn31_init_sys_ctx +ffffffff820c8550 T dcn31_reset_hw_ctx_wrap +ffffffff820c88c0 T dcn31_setup_hpo_hw_control +ffffffff820c9000 T dcn31_hw_sequencer_construct +ffffffff820ca000 T optc31_immediate_disable_crtc +ffffffff820ca100 T optc31_set_drr +ffffffff820ca320 T optc3_init_odm +ffffffff820ca490 T dcn31_timing_generator_init +ffffffff820ca500 t optc31_enable_crtc +ffffffff820ca600 t optc31_disable_crtc +ffffffff820ca6e0 t optc31_set_odm_combine +ffffffff820cb000 T dcn31_panel_cntl_construct +ffffffff820cb040 t dcn31_panel_cntl_destroy +ffffffff820cb090 t dcn31_panel_cntl_hw_init +ffffffff820cb180 t dcn31_is_panel_backlight_on +ffffffff820cb220 t dcn31_is_panel_powered_on +ffffffff820cb2d0 t dcn31_store_backlight_level +ffffffff820cb390 t dcn31_get_16_bit_backlight_from_pwm +ffffffff820cc000 T dcn31_populate_dml_pipes_from_context +ffffffff820cc350 T dcn31_calculate_wm_and_dlg +ffffffff820cc3c0 T dcn31_populate_dml_writeback_from_context +ffffffff820cc420 T dcn31_set_mcif_arb_params +ffffffff820cc480 T dcn31_validate_bandwidth +ffffffff820cc870 T dcn31_create_resource_pool +ffffffff820cdc10 t dcn31_resource_destruct +ffffffff820ce270 t dcn31_destroy_resource_pool +ffffffff820ce2d0 t dcn31_panel_cntl_create +ffffffff820ce340 t dcn31_link_encoder_create +ffffffff820ce400 t dcn31_link_enc_create_minimal +ffffffff820ce4a0 t dcn31_get_panel_config_defaults +ffffffff820ce520 t read_dce_straps +ffffffff820ce550 t dcn31_create_audio +ffffffff820ce580 t dcn31_stream_encoder_create +ffffffff820ce700 t dcn31_hpo_dp_stream_encoder_create +ffffffff820ce8c0 t dcn31_hpo_dp_link_encoder_create +ffffffff820ce950 t dcn31_hwseq_create +ffffffff820cf000 T vpg31_powerdown +ffffffff820cf090 T vpg31_poweron +ffffffff820cf120 T vpg31_construct +ffffffff820d0000 T dccg314_create +ffffffff820d00b0 t dccg314_set_dpstreamclk +ffffffff820d0480 t dccg314_set_dtbclk_dto +ffffffff820d0670 t dccg314_set_pixel_rate_div +ffffffff820d09e0 t dccg314_set_valid_pixel_rate +ffffffff820d0a50 t dccg314_dpp_root_clock_control +ffffffff820d1000 T dcn314_dio_stream_encoder_construct +ffffffff820d1070 t enc314_stream_encoder_hdmi_set_stream_attribute +ffffffff820d1660 t enc314_stream_encoder_dvi_set_stream_attribute +ffffffff820d1870 t enc314_stream_encoder_dp_blank +ffffffff820d18c0 t enc314_stream_encoder_dp_unblank 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+ffffffff820d7000 T dcn314_validate_bandwidth +ffffffff820d74a0 T dcn314_create_resource_pool +ffffffff820d8780 t dcn314_resource_destruct +ffffffff820d8de0 t dcn314_destroy_resource_pool +ffffffff820d8e40 t dcn31_panel_cntl_create +ffffffff820d8eb0 t dcn31_link_encoder_create +ffffffff820d8f70 t dcn31_link_enc_create_minimal +ffffffff820d9010 t dcn314_populate_dml_pipes_from_context +ffffffff820d90a0 t dcn314_update_bw_bounding_box +ffffffff820d90f0 t dcn314_get_panel_config_defaults +ffffffff820d9170 t read_dce_straps +ffffffff820d91a0 t dcn31_create_audio +ffffffff820d91d0 t dcn314_stream_encoder_create +ffffffff820d9350 t dcn31_hpo_dp_stream_encoder_create +ffffffff820d9510 t dcn31_hpo_dp_link_encoder_create +ffffffff820d95a0 t dcn314_hwseq_create +ffffffff820da000 T dcn315_create_resource_pool +ffffffff820db270 t dcn315_resource_destruct +ffffffff820db8d0 t dcn315_destroy_resource_pool +ffffffff820db930 t dcn31_panel_cntl_create +ffffffff820db9a0 t dcn31_link_encoder_create +ffffffff820dba60 t dcn31_link_enc_create_minimal +ffffffff820dbb00 t dcn315_populate_dml_pipes_from_context +ffffffff820dc1a0 t dcn315_get_panel_config_defaults +ffffffff820dc220 t read_dce_straps +ffffffff820dc250 t dcn31_create_audio +ffffffff820dc280 t dcn315_stream_encoder_create +ffffffff820dc400 t dcn31_hpo_dp_stream_encoder_create +ffffffff820dc5c0 t dcn31_hpo_dp_link_encoder_create +ffffffff820dc650 t dcn31_hwseq_create +ffffffff820dd000 T dcn316_create_resource_pool +ffffffff820de2b0 t dcn316_resource_destruct +ffffffff820de910 t dcn316_destroy_resource_pool +ffffffff820de970 t dcn31_panel_cntl_create +ffffffff820de9e0 t dcn31_link_encoder_create +ffffffff820deaa0 t dcn31_link_enc_create_minimal +ffffffff820deb40 t dcn316_populate_dml_pipes_from_context +ffffffff820dee70 t dcn316_get_panel_config_defaults +ffffffff820deef0 t read_dce_straps +ffffffff820def20 t dcn31_create_audio +ffffffff820def50 t dcn316_stream_encoder_create +ffffffff820df0d0 t dcn31_hpo_dp_stream_encoder_create +ffffffff820df290 t dcn31_hpo_dp_link_encoder_create +ffffffff820df320 t dcn31_hwseq_create +ffffffff820e0000 T dccg32_create +ffffffff820e00b0 t dccg32_get_dccg_ref_freq +ffffffff820e00e0 t dccg32_otg_add_pixel +ffffffff820e0120 t dccg32_otg_drop_pixel +ffffffff820e0160 t dccg32_set_dpstreamclk +ffffffff820e0490 t dccg32_set_dtbclk_dto +ffffffff820e0690 t dccg32_set_pixel_rate_div +ffffffff820e0a60 t dccg32_set_valid_pixel_rate +ffffffff820e1000 T enc32_hw_init +ffffffff820e1090 T dcn32_link_encoder_enable_dp_output +ffffffff820e10e0 T dcn32_link_encoder_construct +ffffffff820e12c0 t dcn32_link_encoder_is_in_alt_mode +ffffffff820e1340 t dcn32_link_encoder_get_max_link_cap +ffffffff820e2000 T dcn32_dio_stream_encoder_construct +ffffffff820e2070 t enc32_stream_encoder_hdmi_set_stream_attribute +ffffffff820e25a0 t enc32_stream_encoder_dvi_set_stream_attribute +ffffffff820e2720 t enc32_stream_encoder_dp_unblank +ffffffff820e2be0 t enc32_read_state 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hubp32_update_force_pstate_disallow +ffffffff820e8090 T hubp32_update_mall_sel +ffffffff820e8120 T hubp32_prepare_subvp_buffering +ffffffff820e81c0 T hubp32_phantom_hubp_post_enable +ffffffff820e82d0 T hubp32_cursor_set_attributes +ffffffff820e8590 T hubp32_construct +ffffffff820e9000 T dcn32_dsc_pg_control +ffffffff820e9310 T dcn32_enable_power_gating_plane +ffffffff820e94b0 T dcn32_hubp_pg_control +ffffffff820e9720 T dcn32_apply_idle_power_optimizations +ffffffff820e9990 t dcn32_calculate_cab_allocation +ffffffff820e9d40 T dcn32_commit_subvp_config +ffffffff820e9df0 T dcn32_subvp_pipe_control_lock +ffffffff820e9fc0 T dcn32_set_mcm_luts +ffffffff820ea150 T dcn32_set_input_transfer_func +ffffffff820ea290 T dcn32_set_output_transfer_func +ffffffff820ea4a0 T dcn32_subvp_update_force_pstate +ffffffff820ea610 T dcn32_update_mall_sel +ffffffff820ea790 T dcn32_program_mall_pipe_config +ffffffff820ea870 T dcn32_init_hw +ffffffff820eb080 T dcn32_update_odm +ffffffff820eb690 T dcn32_calculate_dccg_k1_k2_values +ffffffff820eb890 T dcn32_is_dp_dig_pixel_rate_div_policy +ffffffff820eb920 T dcn32_set_pixels_per_cycle +ffffffff820eba60 T dcn32_unblank_stream +ffffffff820ebc30 T dcn32_disable_link_output +ffffffff820ebec0 T dcn32_update_phantom_vp_position +ffffffff820ebfe0 T dcn32_dsc_pg_status +ffffffff820ec0c0 T dcn32_update_dsc_pg +ffffffff820ed000 T dcn32_hw_sequencer_init_functions +ffffffff820ee000 t mmhubbub32_warmup_mcif +ffffffff820ee210 t mmhubbub32_config_mcif_buf +ffffffff820ee6c0 t mmhubbub32_config_mcif_arb +ffffffff820eead0 T dcn32_mmhubbub_construct +ffffffff820ef000 t mpc32_mpc_init +ffffffff820ef220 t mpc32_program_post1dlut +ffffffff820efd00 t mpc32_program_shaper +ffffffff820f1fb0 t mpc32_program_3dlut +ffffffff820f28a0 T dcn32_mpc_construct +ffffffff820f2960 t mpc32_power_on_shaper_3dlut +ffffffff820f2b90 t mpc32_set3dlut_ram12 +ffffffff820f3000 T optc32_set_h_timing_div_manual_mode +ffffffff820f3040 T dcn32_timing_generator_init +ffffffff820f30b0 t optc32_enable_crtc +ffffffff820f31b0 t optc32_disable_crtc +ffffffff820f3290 t optc32_phantom_crtc_post_enable +ffffffff820f3350 t optc32_disable_phantom_otg +ffffffff820f3390 t optc32_set_drr +ffffffff820f35e0 t optc32_set_odm_bypass +ffffffff820f3750 t optc32_set_odm_combine +ffffffff820f4000 T dcn32_panel_cntl_create +ffffffff820f4070 T dcn32_acquire_post_bldn_3dlut +ffffffff820f4160 T dcn32_release_post_bldn_3dlut +ffffffff820f4210 T dcn32_retain_phantom_pipes +ffffffff820f42e0 T dcn32_remove_phantom_pipes +ffffffff820f4450 T dcn32_add_phantom_pipes +ffffffff820f4890 T dcn32_validate_bandwidth +ffffffff820f4d50 T dcn32_populate_dml_pipes_from_context +ffffffff820f5130 T dcn32_calculate_wm_and_dlg +ffffffff820f51a0 T dcn32_create_resource_pool +ffffffff820f5250 t dcn32_resource_construct +ffffffff82101680 T dcn32_acquire_idle_pipe_for_head_pipe_in_layer +ffffffff821018c0 T dcn32_calc_num_avail_chans_for_mall +ffffffff82101930 t dcn32_mpc_create +ffffffff821062f0 t dcn32_resource_destruct +ffffffff82106960 t dcn32_destroy_resource_pool +ffffffff821069c0 t dcn32_link_encoder_create +ffffffff82107920 t dcn32_update_bw_bounding_box +ffffffff82107970 t read_dce_straps +ffffffff821079a0 t dcn32_create_audio +ffffffff82107ce0 t dcn32_stream_encoder_create +ffffffff82109b60 t dcn32_hpo_dp_stream_encoder_create +ffffffff8210a840 t dcn32_hpo_dp_link_encoder_create +ffffffff8210acc0 t dcn32_hwseq_create +ffffffff8210b160 t dcn32_vpg_create +ffffffff8210c000 T dcn32_helper_calculate_num_ways_for_subvp +ffffffff8210c1e0 T dcn32_merge_pipes_for_subvp +ffffffff8210c3b0 T dcn32_all_pipes_have_stream_and_plane +ffffffff8210c440 T dcn32_subvp_in_use +ffffffff8210c4d0 T dcn32_mpo_in_use +ffffffff8210c540 T dcn32_any_surfaces_rotated +ffffffff8210c5d0 T dcn32_determine_det_override +ffffffff8210c910 T dcn32_set_det_allocations +ffffffff8210ca90 T dcn32_save_mall_state +ffffffff8210cb40 T dcn32_restore_mall_state +ffffffff8210d000 T dcn321_link_encoder_construct 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scaler_settings_calculation +ffffffff82131380 T mode_support_and_system_configuration +ffffffff82137160 T display_pipe_configuration +ffffffff821379a0 T dispclkdppclkdcfclk_deep_sleep_prefetch_parameters_watermarks_and_performance_calculation +ffffffff8213d000 T dcn_bw_mod +ffffffff8213d060 T dcn_bw_min2 +ffffffff8213d0a0 T dcn_bw_max +ffffffff8213d0d0 T dcn_bw_max2 +ffffffff8213d110 T dcn_bw_floor2 +ffffffff8213d1b0 T dcn_bw_floor +ffffffff8213d1e0 T dcn_bw_ceil +ffffffff8213d220 T dcn_bw_ceil2 +ffffffff8213d2d0 T dcn_bw_max3 +ffffffff8213d370 T dcn_bw_max5 +ffffffff8213d4e0 T dcn_bw_pow +ffffffff8213d570 T dcn_bw_fabs +ffffffff8213d5d0 T dcn_bw_log +ffffffff8213e000 T swizzle_mode_to_macro_tile_size +ffffffff8213e090 T dcn_validate_bandwidth +ffffffff82140330 T dcn_bw_sync_calcs_and_dml +ffffffff82140580 t dcn_bw_calc_rq_dlg_ttu +ffffffff82140f00 T dcn_find_dcfclk_suits_all +ffffffff82141360 T dcn_bw_update_from_pplib_fclks +ffffffff821414f0 T dcn_bw_update_from_pplib_dcfclks +ffffffff821415c0 T dcn_get_soc_clks +ffffffff82141640 T dcn_bw_notify_pplib_of_wm_ranges +ffffffff82142000 T dcn20_populate_dml_writeback_from_context +ffffffff82142180 T dcn20_fpu_set_wb_arb_params +ffffffff82142330 T dcn20_calculate_dlg_params +ffffffff82142b10 T dcn20_populate_dml_pipes_from_context +ffffffff82143a10 T dcn20_calculate_wm +ffffffff821441b0 T dcn20_update_bounding_box +ffffffff82144430 T dcn20_cap_soc_clocks +ffffffff821447b0 T dcn20_patch_bounding_box +ffffffff82144920 T dcn20_validate_bandwidth_fp +ffffffff82144ab0 t dcn20_validate_bandwidth_internal +ffffffff82144e90 T dcn20_fpu_set_wm_ranges +ffffffff82144f30 T dcn20_fpu_adjust_dppclk +ffffffff82144fd0 T dcn21_populate_dml_pipes_from_context +ffffffff821450d0 T dcn21_validate_bandwidth_fp +ffffffff82145b50 T dcn21_update_bw_bounding_box +ffffffff82146030 T dcn21_clk_mgr_set_bw_params_wm_table +ffffffff82146090 T dcn201_populate_dml_writeback_from_context_fpu +ffffffff821463a0 t calculate_wm_set_for_vlevel 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dcn3_fpu_build_wm_range_table +ffffffff82184be0 T patch_dcn30_soc_bounding_box +ffffffff82185000 T dml30_recalculate +ffffffff82185600 t DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation +ffffffff8218bc50 T dml30_CalculateBytePerPixelAnd256BBlockSizes +ffffffff8218bec0 T dml30_CalculateWriteBackDISPCLK +ffffffff8218c040 T dml30_ModeSupportAndSystemConfigurationFull +ffffffff82193440 t CalculateSwathAndDETConfiguration +ffffffff82193ab0 t TruncToValidBPP +ffffffff82193d30 t dscceComputeDelay +ffffffff82193e70 t CalculateVMAndRowBytes +ffffffff82194520 t CalculatePrefetchSourceLines +ffffffff821946e0 t CalculateUrgentBurstFactor +ffffffff82194970 t CalculateDCFCLKDeepSleep +ffffffff82194c90 t UseMinimumDCFCLK +ffffffff82195e90 t CalculatePrefetchSchedule +ffffffff821973f0 t CalculateFlipSchedule +ffffffff821978e0 t CalculateWatermarksAndDRAMSpeedChangeSupport +ffffffff82198700 t CalculateSwathWidth +ffffffff82199000 T dml30_rq_dlg_get_rq_reg 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dcn_get_max_non_odm_pix_rate_100hz +ffffffff821a1370 T dcn_get_approx_det_segs_required_for_pstate +ffffffff821a2000 T dml31_recalculate +ffffffff821a22e0 t DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation +ffffffff821a90a0 T dml31_CalculateWriteBackDISPCLK +ffffffff821a9220 T dml31_ModeSupportAndSystemConfigurationFull +ffffffff821b1dd0 t CalculateSwathAndDETConfiguration +ffffffff821b2400 t TruncToValidBPP +ffffffff821b2680 t dscceComputeDelay +ffffffff821b27c0 t CalculateDCFCLKDeepSleep +ffffffff821b2b00 t CalculateVMAndRowBytes +ffffffff821b3150 t CalculatePrefetchSourceLines +ffffffff821b3310 t CalculateUrgentBurstFactor +ffffffff821b35a0 t CalculatePrefetchSchedulePerPlane +ffffffff821b3cd0 t CalculateFlipSchedule +ffffffff821b4250 t CalculateWatermarksAndDRAMSpeedChangeSupport +ffffffff821b4eb0 t CalculateSwathWidth +ffffffff821b53c0 t CalculatePrefetchSchedule +ffffffff821b6850 t CalculateVupdateAndDynamicMetadataParameters +ffffffff821b7000 T dml31_rq_dlg_get_rq_reg +ffffffff821b74b0 t dml_rq_dlg_get_rq_params +ffffffff821b7720 T dml31_rq_dlg_get_dlg_reg +ffffffff821ba1e0 t get_surf_rq_param +ffffffff821bb000 T dcn314_update_bw_bounding_box_fpu +ffffffff821bb480 T dcn314_populate_dml_pipes_from_context_fpu +ffffffff821bc000 T dml314_recalculate +ffffffff821bc280 t DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation +ffffffff821c2f60 T dml314_CalculateWriteBackDISPCLK +ffffffff821c30e0 T dml314_ModeSupportAndSystemConfigurationFull +ffffffff821cb9a0 t CalculateBytePerPixelAnd256BBlockSizes +ffffffff821cbc10 t CalculateSwathAndDETConfiguration +ffffffff821cc210 t TruncToValidBPP +ffffffff821cc490 t dscceComputeDelay +ffffffff821cc5d0 t CalculateDCFCLKDeepSleep +ffffffff821cc910 t CalculateVMAndRowBytes +ffffffff821ccf60 t CalculatePrefetchSourceLines +ffffffff821cd120 t CalculateUrgentBurstFactor +ffffffff821cd3b0 t CalculateMaxVStartup +ffffffff821cd4f0 t CalculatePrefetchSchedulePerPlane +ffffffff821cdc20 t CalculateFlipSchedule +ffffffff821ce1a0 t CalculateWatermarksAndDRAMSpeedChangeSupport +ffffffff821cee00 t CalculateSwathWidth +ffffffff821cf310 t CalculatePrefetchSchedule +ffffffff821d07a0 t CalculateVupdateAndDynamicMetadataParameters +ffffffff821d1000 T dml314_rq_dlg_get_rq_reg +ffffffff821d14b0 t dml_rq_dlg_get_rq_params +ffffffff821d1720 T dml314_rq_dlg_get_dlg_reg +ffffffff821d42a0 t get_surf_rq_param +ffffffff821d5000 T dcn32_build_wm_range_table_fpu +ffffffff821d5390 T dcn32_find_dummy_latency_index_for_fw_based_mclk_switch +ffffffff821d55c0 T dcn32_internal_validate_bw +ffffffff821d72d0 T dcn32_helper_populate_phantom_dlg_params +ffffffff821d7470 T dcn32_predict_pipe_split +ffffffff821d76a0 T insert_entry_into_table_sorted +ffffffff821d7ad0 T dcn32_set_phantom_stream_timing +ffffffff821d7d70 t dcn32_split_stream_for_mpc_or_odm +ffffffff821d8100 T dcn32_calculate_wm_and_dlg_fpu +ffffffff821d96e0 T dcn32_patch_dpm_table +ffffffff821d98f0 T dcn32_update_bw_bounding_box_fpu +ffffffff821db1b0 T dcn32_zero_pipe_dcc_fraction +ffffffff821db210 T dcn32_allow_subvp_with_active_margin +ffffffff821db2e0 t subvp_drr_schedulable +ffffffff821dc000 T dml32_recalculate +ffffffff821e0330 T dml32_ModeSupportAndSystemConfigurationFull +ffffffff821e8000 T dml32_dscceComputeDelay +ffffffff821e8140 T dml32_dscComputeDelay +ffffffff821e8180 T IsVertical +ffffffff821e81b0 T dml32_CalculateSinglePipeDPPCLKAndSCLThroughput +ffffffff821e84d0 T dml32_CalculateBytePerPixelAndBlockSizes +ffffffff821e8800 T dml32_CalculateSwathAndDETConfiguration +ffffffff821e9020 T dml32_CalculateSwathWidth +ffffffff821e98c0 T dml32_UnboundedRequest +ffffffff821e9930 T dml32_CalculateDETBufferSize +ffffffff821e9f70 T dml32_CalculateODMMode +ffffffff821ea6d0 T dml32_CalculateRequiredDispclk +ffffffff821ea890 T dml32_RoundToDFSGranularity +ffffffff821ea920 T dml32_CalculateOutputLink +ffffffff821eb450 T dml32_TruncToValidBPP +ffffffff821eb7a0 T dml32_CalculateDPPCLK +ffffffff821eb950 T dml32_RequiredDTBCLK +ffffffff821ebba0 T dml32_DSCDelayRequirement +ffffffff821ec070 T dml32_CalculateSurfaceSizeInMall +ffffffff821ecb80 T dml32_CalculateVMRowAndSwath +ffffffff821ed9b0 T dml32_CalculateVMAndRowBytes +ffffffff821ee5f0 T dml32_CalculatePrefetchSourceLines +ffffffff821ee840 T dml32_CalculateMALLUseForStaticScreen +ffffffff821ee990 T dml32_CalculateRowBandwidth +ffffffff821eeaf0 T dml32_CalculateUrgentLatency +ffffffff821eeb90 T dml32_CalculateUrgentBurstFactor +ffffffff821eee40 T dml32_CalculateDCFCLKDeepSleep +ffffffff821ef190 T dml32_CalculateWriteBackDelay +ffffffff821ef2f0 T dml32_UseMinimumDCFCLK +ffffffff821f01b0 T dml32_CalculateExtraLatencyBytes +ffffffff821f0380 T dml32_CalculateTWait +ffffffff821f0460 T dml32_CalculateVUpdateAndDynamicMetadataParameters +ffffffff821f06c0 T dml32_get_return_bw_mbps +ffffffff821f0880 T dml32_get_return_bw_mbps_vm_only +ffffffff821f0960 T dml32_CalculateExtraLatency +ffffffff821f0b90 T dml32_CalculatePrefetchSchedule +ffffffff821f2150 T dml32_CalculateFlipSchedule +ffffffff821f26d0 T dml32_CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport +ffffffff821f3830 T dml32_CalculateWriteBackDISPCLK +ffffffff821f39f0 T dml32_CalculateMinAndMaxPrefetchMode +ffffffff821f3a30 T dml32_CalculatePixelDeliveryTimes +ffffffff821f3ea0 T dml32_CalculateMetaAndPTETimes +ffffffff821f45e0 T dml32_CalculateVMGroupAndRequestTimes +ffffffff821f4ad0 T dml32_CalculateDCCConfiguration +ffffffff821f50f0 T dml32_CalculateStutterEfficiency +ffffffff821f6040 T dml32_CalculateMaxDETAndMinCompressedBufferSize +ffffffff821f6130 T dml32_CalculateVActiveBandwithSupport +ffffffff821f62c0 T dml32_CalculatePrefetchBandwithSupport +ffffffff821f6560 T dml32_CalculateBandwidthAvailableForImmediateFlip +ffffffff821f66b0 T dml32_CalculateImmediateFlipBandwithSupport +ffffffff821f6900 T dml32_CalculateDETSwathFillLatencyHiding +ffffffff821f7000 T dml32_rq_dlg_get_rq_reg +ffffffff821f76a0 T dml32_rq_dlg_get_dlg_reg +ffffffff821fa000 T dcn321_insert_entry_into_table_sorted +ffffffff821fa430 T dcn321_update_bw_bounding_box_fpu +ffffffff821fc000 T dml_init_instance +ffffffff821fc310 T dml_get_status_message +ffffffff821fc350 T dml_log_pipe_params +ffffffff821fc380 T dml_log_mode_support_params +ffffffff821fd000 T dml_get_voltage_level +ffffffff821fd1f0 t fetch_socbb_params +ffffffff821fd700 t fetch_ip_params +ffffffff821fdba0 t fetch_pipe_params +ffffffff821fecd0 T PixelClockAdjustmentForProgressiveToInterlaceUnit +ffffffff821fed50 T get_clk_dcf_deepsleep +ffffffff821fee60 T get_wm_urgent +ffffffff821fef70 T get_wm_memory_trip +ffffffff821ff080 T get_wm_writeback_urgent +ffffffff821ff190 T get_wm_stutter_exit +ffffffff821ff2a0 T get_wm_stutter_enter_exit +ffffffff821ff3b0 T get_wm_z8_stutter_exit +ffffffff821ff4c0 T get_wm_z8_stutter_enter_exit +ffffffff821ff5d0 T get_stutter_efficiency_z8 +ffffffff821ff6e0 T get_stutter_num_bursts_z8 +ffffffff821ff7f0 T get_wm_dram_clock_change +ffffffff821ff900 T get_wm_writeback_dram_clock_change +ffffffff821ffa10 T get_stutter_efficiency +ffffffff821ffb20 T get_stutter_efficiency_no_vblank +ffffffff821ffc30 T get_stutter_period +ffffffff821ffd40 T get_urgent_latency +ffffffff821ffe50 T get_urgent_extra_latency +ffffffff821fff60 T get_nonurgent_latency +ffffffff82200070 T get_dram_clock_change_latency +ffffffff82200180 T get_dispclk_calculated +ffffffff82200290 T get_total_data_read_bw +ffffffff822003a0 T get_return_bw +ffffffff822004b0 T get_tcalc +ffffffff822005c0 T get_fraction_of_urgent_bandwidth +ffffffff822006d0 T get_fraction_of_urgent_bandwidth_imm_flip +ffffffff822007e0 T get_cstate_max_cap_mode +ffffffff82200900 T get_comp_buffer_size_kbytes +ffffffff82200a10 T get_pixel_chunk_size_in_kbyte +ffffffff82200b30 T get_alpha_pixel_chunk_size_in_kbyte +ffffffff82200c50 T get_meta_chunk_size_in_kbyte +ffffffff82200d70 T get_min_pixel_chunk_size_in_byte +ffffffff82200e80 T get_min_meta_chunk_size_in_byte +ffffffff82200fa0 T get_fclk_watermark +ffffffff822010b0 T get_usr_retraining_watermark +ffffffff822011c0 T get_comp_buffer_reserved_space_kbytes +ffffffff822012e0 T get_comp_buffer_reserved_space_64bytes +ffffffff82201400 T get_comp_buffer_reserved_space_zs +ffffffff82201520 T get_unbounded_request_enabled +ffffffff82201640 T get_dsc_delay +ffffffff82201770 T get_dppclk_calculated +ffffffff82201890 T get_dscclk_calculated +ffffffff822019b0 T get_min_ttu_vblank +ffffffff82201ad0 T get_min_ttu_vblank_in_us +ffffffff82201bf0 T get_vratio_prefetch_l +ffffffff82201d10 T get_vratio_prefetch_c +ffffffff82201e30 T get_dst_x_after_scaler +ffffffff82201f50 T get_dst_y_after_scaler +ffffffff82202070 T get_dst_y_per_vm_vblank +ffffffff82202190 T get_dst_y_per_row_vblank +ffffffff822022b0 T get_dst_y_prefetch +ffffffff822023d0 T get_dst_y_per_vm_flip +ffffffff822024f0 T get_dst_y_per_row_flip +ffffffff82202610 T get_refcyc_per_vm_group_vblank +ffffffff82202730 T get_refcyc_per_vm_group_flip +ffffffff82202850 T get_refcyc_per_vm_req_vblank +ffffffff82202970 T get_refcyc_per_vm_req_flip +ffffffff82202a90 T get_refcyc_per_vm_group_vblank_in_us +ffffffff82202bb0 T get_refcyc_per_vm_group_flip_in_us +ffffffff82202cd0 T get_refcyc_per_vm_req_vblank_in_us +ffffffff82202df0 T get_refcyc_per_vm_req_flip_in_us +ffffffff82202f10 T get_refcyc_per_vm_dmdata_in_us +ffffffff82203030 T get_dmdata_dl_delta_in_us +ffffffff82203150 T get_refcyc_per_line_delivery_l_in_us +ffffffff82203270 T get_refcyc_per_line_delivery_c_in_us +ffffffff82203390 T get_refcyc_per_line_delivery_pre_l_in_us +ffffffff822034b0 T get_refcyc_per_line_delivery_pre_c_in_us +ffffffff822035d0 T get_refcyc_per_req_delivery_l_in_us +ffffffff822036f0 T get_refcyc_per_req_delivery_c_in_us +ffffffff82203810 T get_refcyc_per_req_delivery_pre_l_in_us +ffffffff82203930 T get_refcyc_per_req_delivery_pre_c_in_us +ffffffff82203a50 T get_refcyc_per_cursor_req_delivery_in_us +ffffffff82203b70 T get_refcyc_per_cursor_req_delivery_pre_in_us +ffffffff82203c90 T get_refcyc_per_meta_chunk_nom_l_in_us +ffffffff82203db0 T get_refcyc_per_meta_chunk_nom_c_in_us +ffffffff82203ed0 T get_refcyc_per_meta_chunk_vblank_l_in_us +ffffffff82203ff0 T get_refcyc_per_meta_chunk_vblank_c_in_us +ffffffff82204110 T get_refcyc_per_meta_chunk_flip_l_in_us +ffffffff82204230 T get_refcyc_per_meta_chunk_flip_c_in_us +ffffffff82204350 T get_vstartup +ffffffff82204480 T get_vupdate_offset +ffffffff822045b0 T get_vupdate_width +ffffffff822046d0 T get_vready_offset +ffffffff822047f0 T get_vready_at_or_after_vsync +ffffffff82204920 T get_min_dst_y_next_start +ffffffff82204a50 T get_dst_y_per_pte_row_nom_l +ffffffff82204b70 T get_dst_y_per_pte_row_nom_c +ffffffff82204c90 T get_dst_y_per_meta_row_nom_l +ffffffff82204db0 T get_dst_y_per_meta_row_nom_c +ffffffff82204ed0 T get_refcyc_per_pte_group_nom_l_in_us +ffffffff82204ff0 T get_refcyc_per_pte_group_nom_c_in_us +ffffffff82205110 T get_refcyc_per_pte_group_vblank_l_in_us +ffffffff82205230 T get_refcyc_per_pte_group_vblank_c_in_us +ffffffff82205350 T get_refcyc_per_pte_group_flip_l_in_us +ffffffff82205470 T get_refcyc_per_pte_group_flip_c_in_us +ffffffff82205590 T get_vstartup_calculated +ffffffff822056c0 T get_dpte_row_height_linear_c +ffffffff822057f0 T get_swath_height_l +ffffffff82205920 T get_swath_height_c +ffffffff82205a50 T get_det_stored_buffer_size_l_bytes +ffffffff82205b80 T get_det_stored_buffer_size_c_bytes +ffffffff82205cb0 T get_dpte_group_size_in_bytes +ffffffff82205de0 T get_vm_group_size_in_bytes +ffffffff82205f10 T get_dpte_row_height_linear_l +ffffffff82206040 T get_pte_buffer_mode +ffffffff82206170 T get_subviewport_lines_needed_in_mall +ffffffff822062a0 T get_total_immediate_flip_bytes +ffffffff822063c0 T get_total_immediate_flip_bw +ffffffff822065a0 T get_total_prefetch_bw +ffffffff82206780 T get_total_surface_size_in_mall_bytes +ffffffff82206930 T get_det_buffer_size_kbytes +ffffffff82206a60 T get_is_phantom_pipe +ffffffff82206b90 T Calculate256BBlockSizes +ffffffff82206c80 T CalculateMinAndMaxPrefetchMode +ffffffff82206d00 T ModeSupportAndSystemConfiguration +ffffffff82207020 T CalculateWriteBackDISPCLK +ffffffff82208000 T print__rq_params_st +ffffffff82208030 T print__data_rq_sizing_params_st +ffffffff82208060 T print__data_rq_dlg_params_st +ffffffff82208090 T print__data_rq_misc_params_st +ffffffff822080c0 T print__rq_dlg_params_st +ffffffff822080f0 T print__dlg_sys_params_st +ffffffff82208120 T print__data_rq_regs_st +ffffffff82208150 T print__rq_regs_st +ffffffff82208180 T print__dlg_regs_st +ffffffff822081b0 T print__ttu_regs_st +ffffffff82209000 T dml1_extract_rq_regs +ffffffff82209330 T dml1_rq_dlg_get_rq_params +ffffffff82209500 t get_surf_rq_param +ffffffff8220a200 T dml1_rq_dlg_get_dlg_params +ffffffff8220d000 T _do_calc_rc_params +ffffffff8220e040 t get_qp_set +ffffffff8220f000 T dc_dsc_parse_dsc_dpcd +ffffffff8220f2a0 t dsc_throughput_from_dpcd +ffffffff8220f460 T dc_dsc_compute_bandwidth_range +ffffffff8220f640 t intersect_dsc_caps +ffffffff8220f800 t setup_dsc_config +ffffffff822101d0 T dc_dsc_compute_config +ffffffff822102d0 T dc_dsc_stream_bandwidth_in_kbps +ffffffff82210430 T dc_dsc_stream_bandwidth_overhead_in_kbps +ffffffff82210580 T dc_dsc_get_policy_for_timing +ffffffff82210620 T dc_dsc_policy_set_max_target_bpp_limit +ffffffff82210650 T dc_dsc_policy_set_enable_dsc_when_not_needed +ffffffff82210680 T dc_dsc_policy_set_disable_dsc_stream_overhead +ffffffff82211000 T calc_rc_params +ffffffff82212000 T dscc_compute_dsc_parameters +ffffffff82213000 T dal_hw_factory_dce110_init ffffffff82213060 t define_hpd_registers ffffffff822130b0 t define_ddc_registers -ffffffff82214000 T dal_hw_translate_dce80_init +ffffffff82214000 T dal_hw_translate_dce110_init ffffffff82214030 t offset_to_id -ffffffff822147b0 t id_to_offset -ffffffff82215000 T dal_hw_factory_dcn10_init +ffffffff82214390 t id_to_offset +ffffffff82215000 T dal_hw_factory_dce120_init ffffffff82215060 t define_hpd_registers ffffffff822150b0 t define_ddc_registers -ffffffff82215150 t define_generic_registers -ffffffff82216000 T dal_hw_translate_dcn10_init +ffffffff82216000 T dal_hw_translate_dce120_init ffffffff82216030 t offset_to_id -ffffffff82216390 t id_to_offset -ffffffff82217000 T dal_hw_factory_dcn20_init +ffffffff822163a0 t id_to_offset +ffffffff82217000 T dal_hw_factory_dce80_init ffffffff82217060 t define_hpd_registers ffffffff822170b0 t define_ddc_registers -ffffffff82217160 t define_generic_registers -ffffffff82218000 T dal_hw_translate_dcn20_init +ffffffff82218000 T dal_hw_translate_dce80_init ffffffff82218030 t offset_to_id -ffffffff822182b0 t id_to_offset -ffffffff82219000 T dal_hw_factory_dcn21_init +ffffffff822187b0 t id_to_offset +ffffffff82219000 T dal_hw_factory_dcn10_init ffffffff82219060 t define_hpd_registers ffffffff822190b0 t define_ddc_registers -ffffffff82219160 t define_generic_registers -ffffffff8221a000 T dal_hw_translate_dcn21_init +ffffffff82219150 t define_generic_registers +ffffffff8221a000 T dal_hw_translate_dcn10_init ffffffff8221a030 t offset_to_id -ffffffff8221a2b0 t id_to_offset -ffffffff8221b000 T dal_hw_factory_dcn30_init +ffffffff8221a390 t id_to_offset +ffffffff8221b000 T dal_hw_factory_dcn20_init ffffffff8221b060 t define_hpd_registers ffffffff8221b0b0 t define_ddc_registers ffffffff8221b160 t define_generic_registers -ffffffff8221c000 T dal_hw_translate_dcn30_init +ffffffff8221c000 T dal_hw_translate_dcn20_init ffffffff8221c030 t offset_to_id -ffffffff8221c2c0 t id_to_offset -ffffffff8221d000 T dal_hw_factory_dcn315_init +ffffffff8221c2b0 t id_to_offset +ffffffff8221d000 T dal_hw_factory_dcn21_init ffffffff8221d060 t define_hpd_registers ffffffff8221d0b0 t define_ddc_registers ffffffff8221d160 t define_generic_registers -ffffffff8221e000 T dal_hw_translate_dcn315_init +ffffffff8221e000 T dal_hw_translate_dcn21_init ffffffff8221e030 t offset_to_id ffffffff8221e2b0 t id_to_offset -ffffffff8221f000 T dal_hw_factory_dcn32_init +ffffffff8221f000 T dal_hw_factory_dcn30_init ffffffff8221f060 t define_hpd_registers ffffffff8221f0b0 t define_ddc_registers ffffffff8221f160 t define_generic_registers -ffffffff82220000 T dal_hw_translate_dcn32_init +ffffffff82220000 T dal_hw_translate_dcn30_init ffffffff82220030 t offset_to_id -ffffffff82220290 t id_to_offset -ffffffff82221000 T dal_gpio_open -ffffffff822210c0 T dal_gpio_open_ex -ffffffff82221180 T dal_gpio_get_value -ffffffff82221200 T dal_gpio_set_value -ffffffff82221280 T dal_gpio_get_mode -ffffffff822212b0 T dal_gpio_lock_pin -ffffffff822212d0 T dal_gpio_unlock_pin -ffffffff822212f0 T dal_gpio_change_mode -ffffffff82221370 T dal_gpio_get_id -ffffffff822213a0 T dal_gpio_get_enum -ffffffff822213d0 T dal_gpio_set_config -ffffffff82221450 T dal_gpio_get_pin_info -ffffffff822214b0 T dal_gpio_get_sync_source -ffffffff82221540 T dal_gpio_get_output_state -ffffffff82221570 T dal_gpio_get_ddc -ffffffff822215a0 T dal_gpio_get_hpd -ffffffff822215d0 T dal_gpio_get_generic -ffffffff82221600 T dal_gpio_close -ffffffff82221650 T dal_gpio_create -ffffffff822217e0 T dal_gpio_destroy -ffffffff82222000 T dal_gpio_service_create -ffffffff82222260 T dal_gpio_service_create_irq -ffffffff82222320 T dal_gpio_create_irq -ffffffff822223a0 T dal_gpio_service_create_generic_mux -ffffffff82222440 T dal_gpio_destroy_generic_mux -ffffffff822224d0 T dal_gpio_get_generic_pin_info -ffffffff82222530 T dal_gpio_service_destroy -ffffffff82222660 T dal_mux_setup_config -ffffffff822226c0 T dal_gpio_service_lock -ffffffff82222740 T dal_gpio_service_unlock -ffffffff822227c0 T dal_gpio_service_open -ffffffff82222a00 T dal_gpio_service_close -ffffffff82222aa0 T dal_irq_get_source -ffffffff82222b10 T dal_irq_get_rx_source -ffffffff82222b60 T dal_irq_setup_hpd_filter -ffffffff82222bc0 T dal_gpio_destroy_irq -ffffffff82222c50 T dal_gpio_create_ddc -ffffffff82222dc0 T dal_gpio_destroy_ddc -ffffffff82222e90 T dal_ddc_close -ffffffff82222ee0 T dal_ddc_open -ffffffff82223040 T dal_ddc_change_mode -ffffffff822230e0 T dal_ddc_get_line -ffffffff82223100 T dal_ddc_set_config -ffffffff82224000 T dal_hw_ddc_init -ffffffff82224100 T dal_hw_ddc_get_pin -ffffffff82224110 t dal_hw_ddc_destroy -ffffffff82224170 t set_config -ffffffff82225000 T dal_hw_factory_init -ffffffff82226000 T dal_hw_generic_init -ffffffff82226100 T dal_hw_generic_get_pin -ffffffff82226110 t dal_hw_generic_destroy -ffffffff82226170 t set_config -ffffffff82227000 T dal_hw_gpio_open -ffffffff822270b0 T dal_hw_gpio_config_mode -ffffffff822271a0 T dal_hw_gpio_get_value -ffffffff82227200 T dal_hw_gpio_set_value -ffffffff82227290 T dal_hw_gpio_change_mode -ffffffff822272a0 T dal_hw_gpio_close -ffffffff82227350 T dal_hw_gpio_construct -ffffffff822273b0 T dal_hw_gpio_destruct -ffffffff82228000 T dal_hw_hpd_init -ffffffff82228100 T dal_hw_hpd_get_pin -ffffffff82228110 t dal_hw_hpd_destroy -ffffffff82228170 t get_value -ffffffff82228210 t set_config -ffffffff82229000 T dal_hw_translate_init -ffffffff8222a000 T dc_process_hdcp_msg -ffffffff8222a180 t hdmi_14_process_transaction -ffffffff8222a2e0 t dp_11_process_transaction -ffffffff8222b000 T dal_irq_service_dummy_set -ffffffff8222b050 T dal_irq_service_dummy_ack -ffffffff8222b0a0 T dce110_vblank_set -ffffffff8222b170 T to_dal_irq_source_dce110 -ffffffff8222b2f0 T dal_irq_service_dce110_create -ffffffff8222b370 t hpd_ack -ffffffff8222c000 T dal_irq_service_dce120_create -ffffffff8222c080 t hpd_ack -ffffffff8222d000 T dal_irq_service_dce80_create -ffffffff8222d080 t hpd_ack -ffffffff8222e000 T dal_irq_service_dcn10_create -ffffffff8222e080 t hpd_ack -ffffffff8222e130 t to_dal_irq_source_dcn10 -ffffffff8222f000 T dal_irq_service_dcn20_create -ffffffff8222f080 t hpd_ack -ffffffff8222f130 t to_dal_irq_source_dcn20 -ffffffff82230000 T dal_irq_service_dcn201_create +ffffffff822202c0 t id_to_offset +ffffffff82221000 T dal_hw_factory_dcn315_init +ffffffff82221060 t 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dal_gpio_get_sync_source +ffffffff82225540 T dal_gpio_get_output_state +ffffffff82225570 T dal_gpio_get_ddc +ffffffff822255a0 T dal_gpio_get_hpd +ffffffff822255d0 T dal_gpio_get_generic +ffffffff82225600 T dal_gpio_close +ffffffff82225650 T dal_gpio_create +ffffffff822257e0 T dal_gpio_destroy +ffffffff82226000 T dal_gpio_service_create +ffffffff82226260 T dal_gpio_service_create_irq +ffffffff82226320 T dal_gpio_create_irq +ffffffff822263a0 T dal_gpio_service_create_generic_mux +ffffffff82226440 T dal_gpio_destroy_generic_mux +ffffffff822264d0 T dal_gpio_get_generic_pin_info +ffffffff82226530 T dal_gpio_service_destroy +ffffffff82226660 T dal_mux_setup_config +ffffffff822266c0 T dal_gpio_service_lock +ffffffff82226740 T dal_gpio_service_unlock +ffffffff822267c0 T dal_gpio_service_open +ffffffff82226a00 T dal_gpio_service_close +ffffffff82226aa0 T dal_irq_get_source +ffffffff82226b10 T dal_irq_get_rx_source +ffffffff82226b60 T dal_irq_setup_hpd_filter +ffffffff82226bc0 T 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vmx_handle_cr4_write -ffffffff82543f30 T vmm_handle_xsetbv -ffffffff82543fc0 T vmx_handle_misc_enable_msr -ffffffff82544020 T vmm_pat_is_valid -ffffffff82544100 T vmm_gpa_is_valid -ffffffff82544170 T vmx_exit_reason_decode -ffffffff825441b0 T svm_exit_reason_decode -ffffffff82544fc0 T vcpu_state_decode -ffffffff82545000 T vmm_dispatch_intr -ffffffff82545020 T vmxon -ffffffff82545050 T vmxoff -ffffffff82545080 T vmclear -ffffffff825450b0 T vmptrld -ffffffff825450e0 T vmptrst -ffffffff82545110 T vmwrite -ffffffff82545140 T vmread -ffffffff82545170 T invvpid -ffffffff825451a0 T invept -ffffffff825451d0 T vmx_enter_guest -ffffffff825451fb t skip_init -ffffffff825452c8 t no_l1df_msr -ffffffff825452cb t l1df_tlb_loop -ffffffff825452e4 t l1df_tlb_done -ffffffff825452ec t l1df_load_cache -ffffffff82545303 t done_flush -ffffffff82545396 t do_resume -ffffffff8254541b t fail_launch_or_resume -ffffffff8254545d t fail_launch_unknown -ffffffff8254546a t fail_launch_invalid_vmcs -ffffffff82545477 t fail_launch_valid_vmcs -ffffffff82545494 t vmx_exit_handler_asm -ffffffff82545559 t restore_host -ffffffff825455f0 T svm_enter_guest -ffffffff82545780 t restore_host_svm -ffffffff82546000 T sdmmc_match -ffffffff82546050 T sdmmc_attach -ffffffff82546390 T sdmmc_detach -ffffffff82546440 T sdmmc_activate -ffffffff82546510 T sdmmc_discover_task -ffffffff825465d0 T sdmmc_create_thread -ffffffff82546640 T sdmmc_holds_root_device -ffffffff825466a0 T sdmmc_task_thread -ffffffff82546890 T sdmmc_needs_discover -ffffffff82546940 T sdmmc_del_task -ffffffff825469f0 T sdmmc_card_detach -ffffffff82546ad0 T sdmmc_add_task -ffffffff82546b50 T sdmmc_card_attach -ffffffff82546c60 T sdmmc_enable -ffffffff82546db0 T sdmmc_scan -ffffffff82546e40 T sdmmc_init -ffffffff82546f40 T sdmmc_disable -ffffffff825470a0 T sdmmc_function_free -ffffffff825470c0 T sdmmc_delay -ffffffff82547110 T sdmmc_select_card -ffffffff82547290 T sdmmc_set_bus_power -ffffffff82547450 T sdmmc_function_alloc -ffffffff825474e0 T sdmmc_app_command -ffffffff82547670 T sdmmc_mmc_command -ffffffff825476f0 T sdmmc_go_idle_state -ffffffff82547810 T sdmmc_send_if_cond -ffffffff82547960 T sdmmc_set_relative_addr -ffffffff82548000 T sdmmc_cisptr -ffffffff825480a0 T sdmmc_read_cis -ffffffff825483b0 T sdmmc_print_cis -ffffffff82548520 T sdmmc_check_cis_quirks -ffffffff82549000 T sdmmc_io_enable -ffffffff825492a0 T sdmmc_io_reset -ffffffff825493d0 T sdmmc_io_send_op_cond -ffffffff82549540 T sdmmc_io_scan -ffffffff82549690 T sdmmc_io_init -ffffffff825497c0 T sdmmc_io_set_highspeed -ffffffff82549a70 T sdmmc_io_set_bus_width -ffffffff82549d00 T sdmmc_io_function_ready -ffffffff82549e80 T sdmmc_io_read_1 -ffffffff82549fd0 T sdmmc_io_function_enable -ffffffff8254a3a0 T sdmmc_io_write_1 -ffffffff8254a520 T sdmmc_io_function_disable -ffffffff8254a7a0 T sdmmc_io_attach -ffffffff8254a890 T sdmmc_print -ffffffff8254aae0 T sdmmc_submatch -ffffffff8254ab60 T sdmmc_io_detach -ffffffff8254ac10 T sdmmc_io_rw_direct -ffffffff8254adb0 T sdmmc_io_rw_extended_subr -ffffffff8254af50 T sdmmc_io_rw_extended -ffffffff8254b340 T sdmmc_io_read_2 -ffffffff8254b4a0 T sdmmc_io_write_2 -ffffffff8254b600 T sdmmc_io_read_4 -ffffffff8254b760 T sdmmc_io_write_4 -ffffffff8254b8c0 T sdmmc_io_read_multi_1 -ffffffff8254b9b0 T sdmmc_io_write_multi_1 -ffffffff8254baa0 T sdmmc_io_read_region_1 -ffffffff8254bb90 T sdmmc_io_write_region_1 -ffffffff8254bc80 T sdmmc_io_xchg -ffffffff8254be10 T sdmmc_intr_enable -ffffffff8254c080 T sdmmc_intr_disable -ffffffff8254c2f0 T sdmmc_intr_establish -ffffffff8254c3f0 T sdmmc_intr_disestablish -ffffffff8254c4e0 T sdmmc_card_intr -ffffffff8254c530 T sdmmc_intr_task -ffffffff8254c5c0 T sdmmc_io_set_blocklen -ffffffff8254d000 T sdmmc_mem_enable -ffffffff8254d4e0 T sdmmc_mem_send_op_cond -ffffffff8254d690 T sdmmc_mem_signal_voltage -ffffffff8254d750 T sdmmc_mem_scan -ffffffff8254da60 T sdmmc_decode_csd -ffffffff8254de70 T sdmmc_decode_cid -ffffffff8254e2b0 T sdmmc_mem_send_scr -ffffffff8254e3f0 T sdmmc_mem_decode_scr -ffffffff8254e470 T sdmmc_mem_send_cxd_data -ffffffff8254e5e0 T sdmmc_mem_set_bus_width -ffffffff8254e700 T sdmmc_mem_sd_switch -ffffffff8254e9b0 T sdmmc_be512_to_bitfield512 -ffffffff8254ea60 T sdmmc_mem_mmc_switch -ffffffff8254eb50 T sdmmc_mem_init -ffffffff8254eca0 T sdmmc_mem_set_blocklen -ffffffff8254eda0 T sdmmc_mem_sd_init -ffffffff8254f350 T sdmmc_mem_mmc_init -ffffffff8254fc70 T sdmmc_mem_select_transfer_mode -ffffffff8254fcf0 T sdmmc_mem_execute_tuning -ffffffff8254fd80 T sdmmc_mem_read_block_subr -ffffffff825500e0 T sdmmc_mem_single_read_block -ffffffff825501b0 T sdmmc_mem_read_block -ffffffff82550370 T sdmmc_mem_write_block_subr -ffffffff825506c0 T sdmmc_mem_single_write_block -ffffffff82550790 T sdmmc_mem_write_block -ffffffff82550950 T sdmmc_mem_hibernate_write -ffffffff82551000 T sdmmc_scsi_cmd -ffffffff825511f0 T sdmmc_minphys -ffffffff82551270 T sdmmc_scsi_attach -ffffffff82551460 T sdmmc_alloc_ccbs -ffffffff825515a0 T sdmmc_free_ccbs -ffffffff82551600 T sdmmc_scsi_detach -ffffffff82551760 T sdmmc_stimeout -ffffffff825517e0 T sdmmc_ccb_alloc -ffffffff82551890 T sdmmc_ccb_free -ffffffff82551970 T sdmmc_inquiry -ffffffff82551be0 T sdmmc_start_xs -ffffffff82551cd0 T sdmmc_complete_xs -ffffffff82551da0 T sdmmc_done_xs -ffffffff82551df0 T sdmmc_scsi_hibernate_io -ffffffff82552000 T bwfm_sdio_preinit -ffffffff825524f0 T bwfm_sdio_txcheck -ffffffff82552530 T bwfm_sdio_txdata -ffffffff825525a0 T bwfm_sdio_txctl -ffffffff825526f0 T bwfm_sdio_buscore_read -ffffffff82552700 T bwfm_sdio_buscore_write -ffffffff82552720 T bwfm_sdio_buscore_prepare -ffffffff82552860 T bwfm_sdio_buscore_activate -ffffffff825528e0 T bwfm_sdio_match -ffffffff825529b0 T bwfm_sdio_attach -ffffffff82552c70 T bwfm_sdio_detach -ffffffff82552cd0 T bwfm_sdio_task -ffffffff82552e30 T bwfm_sdio_write_1 -ffffffff82552e60 T bwfm_sdio_read_1 -ffffffff82552e90 T bwfm_sdio_write_4 -ffffffff82552f40 T bwfm_sdio_read_4 -ffffffff82552ff0 T bwfm_sdio_load_microcode -ffffffff82553250 T bwfm_sdio_clkctl -ffffffff82553380 T bwfm_sdio_dev_write -ffffffff825533d0 T bwfm_sdio_intr -ffffffff82553410 T bwfm_sdio_ram_read_write -ffffffff82553640 T bwfm_sdio_htclk -ffffffff825538a0 T bwfm_sdio_readshared -ffffffff82553970 T bwfm_sdio_dev_read -ffffffff825539b0 T bwfm_sdio_rx_frames -ffffffff82553d40 T bwfm_sdio_tx_frames -ffffffff82553e20 T bwfm_sdio_backplane -ffffffff82553ed0 T bwfm_sdio_buf_read -ffffffff82553fb0 T bwfm_sdio_buf_write -ffffffff82554060 T bwfm_sdio_frame_read_write -ffffffff825541e0 T bwfm_sdio_newbuf -ffffffff82554260 T bwfm_sdio_tx_ok -ffffffff825542b0 T bwfm_sdio_tx_ctrlframe -ffffffff825543b0 T bwfm_sdio_tx_dataframe -ffffffff82554500 T bwfm_sdio_rx_glom -ffffffff82555000 T onewire_match -ffffffff82555050 T onewire_attach -ffffffff825550f0 T onewire_detach -ffffffff82555160 T onewire_activate -ffffffff82555180 T onewire_scan -ffffffff82555390 T onewire_createthread -ffffffff82555400 T onewire_print -ffffffff825554d0 T onewirebus_print -ffffffff82555520 T onewire_lock -ffffffff82555540 T onewire_unlock -ffffffff82555560 T onewire_reset -ffffffff82555580 T onewire_bit -ffffffff825555a0 T onewire_read_byte -ffffffff825556e0 T onewire_write_byte -ffffffff825557c0 T onewire_read_block -ffffffff82555860 T onewire_write_block -ffffffff82555900 T onewire_triplet -ffffffff825559e0 T onewire_matchrom -ffffffff82555b30 T onewire_search -ffffffff82555ec0 T onewire_thread -ffffffff82556000 T onewire_crc -ffffffff825560e0 T onewire_crc16 -ffffffff825561c0 T onewire_famname -ffffffff82556200 T onewire_matchbyfam -ffffffff82557000 T owid_match -ffffffff82557030 T owid_attach -ffffffff82557100 T owid_detach -ffffffff82557140 T owid_activate -ffffffff82558000 T owsbm_match -ffffffff82558030 T owsbm_attach -ffffffff825581d0 T owsbm_detach -ffffffff82558240 T owsbm_activate -ffffffff82558270 T owsbm_update -ffffffff82559000 T owtemp_match -ffffffff82559030 T owtemp_attach -ffffffff82559130 T owtemp_detach -ffffffff825591a0 T owtemp_activate -ffffffff825591d0 T owtemp_update -ffffffff8255a000 T owctr_match -ffffffff8255a030 T owctr_attach -ffffffff8255a180 T owctr_detach -ffffffff8255a1f0 T owctr_activate -ffffffff8255a220 T owctr_update -ffffffff8255a250 T owctr_update_counter -ffffffff8255b000 A __text_page_start -ffffffff8255b000 T Xsyscall_meltdown -ffffffff8255b00c T Xsyscall -ffffffff8255b26e t Xsyscall_trampback -ffffffff8255b280 T intr_user_exit -ffffffff8255b2c2 t intr_user_exit_post_ast -ffffffff8255b3ee t Xiretq_trampback -ffffffff8255b3fa T doreti_iret -ffffffff8255c000 T alltraps -ffffffff8255c138 T recall_trap -ffffffff8255c150 T alltraps_kern -ffffffff8255c153 T alltraps_kern_meltdown -ffffffff8255d000 ? Xsyscall32 -ffffffff8255d000 A __kutext_start -ffffffff8255d000 A __text_page_end -ffffffff8255e000 ? Xtrap00 -ffffffff8255e010 ? Xtrap01 -ffffffff8255e020 ? Xtrap02 -ffffffff8255e028 c calltrap_specstk -ffffffff8255e0f0 ? calltrap_specstk_tramp -ffffffff8255e110 ? Xtrap03 -ffffffff8255e120 ? Xtrap04 -ffffffff8255e130 ? Xtrap05 -ffffffff8255e140 ? Xtrap06 -ffffffff8255e150 ? Xtrap07 -ffffffff8255e160 ? Xtrap08 -ffffffff8255e170 ? Xtrap09 -ffffffff8255e180 ? Xtrap0a -ffffffff8255e190 ? Xtrap0b -ffffffff8255e1a0 ? Xtrap0c -ffffffff8255e1b0 ? Xtrap0d -ffffffff8255e240 ? Xtrap0e -ffffffff8255e250 ? Xintrspurious -ffffffff8255e250 ? Xtrap0f -ffffffff8255e260 ? Xtrap10 -ffffffff8255e270 ? Xtrap11 -ffffffff8255e280 ? Xtrap12 -ffffffff8255e290 ? Xtrap13 -ffffffff8255e2a0 ? Xtrap14 -ffffffff8255e2b0 ? Xtrap15 -ffffffff8255e2c0 ? Xtrap16 -ffffffff8255e2c0 ? Xtrap17 -ffffffff8255e2c0 ? Xtrap18 -ffffffff8255e2c0 ? Xtrap19 -ffffffff8255e2c0 ? Xtrap1a -ffffffff8255e2c0 ? Xtrap1b -ffffffff8255e2c0 ? Xtrap1c -ffffffff8255e2c0 ? Xtrap1d -ffffffff8255e2c0 ? Xtrap1e -ffffffff8255e2c0 ? Xtrap1f -ffffffff8255e2d0 ? x2apic_eoi -ffffffff8255e2f0 ? Xintr_lapic_ipi -ffffffff8255e330 ? Xipi_invltlb -ffffffff8255e360 ? Xipi_invlpg -ffffffff8255e390 ? Xipi_invlrange -ffffffff8255e3d0 ? Xipi_invltlb_pcid -ffffffff8255e410 ? Xipi_invlpg_pcid -ffffffff8255e460 ? Xipi_invlrange_pcid -ffffffff8255e4d0 ? Xintr_lapic_ltimer -ffffffff8255e510 ? Xintr_xen_upcall -ffffffff8255e550 ? Xintr_hyperv_upcall -ffffffff8255e590 ? Xintr_legacy0 -ffffffff8255e5d0 ? Xintr_legacy1 -ffffffff8255e610 ? Xintr_legacy2 -ffffffff8255e650 ? Xintr_legacy3 -ffffffff8255e690 ? Xintr_legacy4 -ffffffff8255e6d0 ? Xintr_legacy5 -ffffffff8255e710 ? Xintr_legacy6 -ffffffff8255e750 ? Xintr_legacy7 -ffffffff8255e790 ? Xintr_legacy8 -ffffffff8255e7d0 ? Xintr_legacy9 -ffffffff8255e810 ? Xintr_legacy10 -ffffffff8255e850 ? Xintr_legacy11 -ffffffff8255e890 ? Xintr_legacy12 -ffffffff8255e8d0 ? Xintr_legacy13 -ffffffff8255e910 ? Xintr_legacy14 -ffffffff8255e950 ? Xintr_legacy15 -ffffffff8255e990 ? Xintr_ioapic_edge0 -ffffffff8255e9d0 ? Xintr_ioapic_edge1 -ffffffff8255ea10 ? Xintr_ioapic_edge2 -ffffffff8255ea50 ? Xintr_ioapic_edge3 -ffffffff8255ea90 ? Xintr_ioapic_edge4 -ffffffff8255ead0 ? Xintr_ioapic_edge5 -ffffffff8255eb10 ? Xintr_ioapic_edge6 -ffffffff8255eb50 ? Xintr_ioapic_edge7 -ffffffff8255eb90 ? Xintr_ioapic_edge8 -ffffffff8255ebd0 ? Xintr_ioapic_edge9 -ffffffff8255ec10 ? Xintr_ioapic_edge10 -ffffffff8255ec50 ? Xintr_ioapic_edge11 -ffffffff8255ec90 ? Xintr_ioapic_edge12 -ffffffff8255ecd0 ? Xintr_ioapic_edge13 -ffffffff8255ed10 ? Xintr_ioapic_edge14 -ffffffff8255ed50 ? Xintr_ioapic_edge15 -ffffffff8255ed90 ? Xintr_ioapic_edge16 -ffffffff8255edd0 ? Xintr_ioapic_edge17 -ffffffff8255ee10 ? Xintr_ioapic_edge18 -ffffffff8255ee50 ? Xintr_ioapic_edge19 -ffffffff8255ee90 ? Xintr_ioapic_edge20 -ffffffff8255eed0 ? Xintr_ioapic_edge21 -ffffffff8255ef10 ? Xintr_ioapic_edge22 -ffffffff8255ef50 ? Xintr_ioapic_edge23 -ffffffff8255ef90 ? Xintr_ioapic_edge24 -ffffffff8255efd0 ? Xintr_ioapic_edge25 -ffffffff8255f010 ? Xintr_ioapic_edge26 -ffffffff8255f050 ? Xintr_ioapic_edge27 -ffffffff8255f090 ? Xintr_ioapic_edge28 -ffffffff8255f0d0 ? Xintr_ioapic_edge29 -ffffffff8255f110 ? Xintr_ioapic_edge30 -ffffffff8255f150 ? Xintr_ioapic_edge31 -ffffffff8255f190 ? Xintr_ioapic_edge32 -ffffffff8255f1d0 ? Xintr_ioapic_edge33 -ffffffff8255f210 ? Xintr_ioapic_edge34 -ffffffff8255f250 ? Xintr_ioapic_edge35 -ffffffff8255f290 ? Xintr_ioapic_edge36 -ffffffff8255f2d0 ? Xintr_ioapic_edge37 -ffffffff8255f310 ? Xintr_ioapic_edge38 -ffffffff8255f350 ? Xintr_ioapic_edge39 -ffffffff8255f390 ? Xintr_ioapic_edge40 -ffffffff8255f3d0 ? Xintr_ioapic_edge41 -ffffffff8255f410 ? Xintr_ioapic_edge42 -ffffffff8255f450 ? Xintr_ioapic_edge43 -ffffffff8255f490 ? Xintr_ioapic_edge44 -ffffffff8255f4d0 ? Xintr_ioapic_edge45 -ffffffff8255f510 ? Xintr_ioapic_edge46 -ffffffff8255f550 ? Xintr_ioapic_edge47 -ffffffff8255f590 ? Xintr_ioapic_edge48 -ffffffff8255f5d0 ? Xintr_ioapic_edge49 -ffffffff8255f610 ? Xintr_ioapic_edge50 -ffffffff8255f650 ? Xintr_ioapic_edge51 -ffffffff8255f690 ? Xintr_ioapic_edge52 -ffffffff8255f6d0 ? Xintr_ioapic_edge53 -ffffffff8255f710 ? Xintr_ioapic_edge54 -ffffffff8255f750 ? Xintr_ioapic_edge55 -ffffffff8255f790 ? Xintr_ioapic_edge56 -ffffffff8255f7d0 ? Xintr_ioapic_edge57 -ffffffff8255f810 ? Xintr_ioapic_edge58 -ffffffff8255f850 ? Xintr_ioapic_edge59 -ffffffff8255f890 ? Xintr_ioapic_edge60 -ffffffff8255f8d0 ? Xintr_ioapic_edge61 -ffffffff8255f910 ? Xintr_ioapic_edge62 -ffffffff8255f950 ? Xintr_ioapic_edge63 -ffffffff8255f990 ? Xintr_ioapic_level0 -ffffffff8255f9d0 ? Xintr_ioapic_level1 -ffffffff8255fa10 ? Xintr_ioapic_level2 -ffffffff8255fa50 ? Xintr_ioapic_level3 -ffffffff8255fa90 ? Xintr_ioapic_level4 -ffffffff8255fad0 ? Xintr_ioapic_level5 -ffffffff8255fb10 ? Xintr_ioapic_level6 -ffffffff8255fb50 ? Xintr_ioapic_level7 -ffffffff8255fb90 ? Xintr_ioapic_level8 -ffffffff8255fbd0 ? Xintr_ioapic_level9 -ffffffff8255fc10 ? Xintr_ioapic_level10 -ffffffff8255fc50 ? Xintr_ioapic_level11 -ffffffff8255fc90 ? Xintr_ioapic_level12 -ffffffff8255fcd0 ? Xintr_ioapic_level13 -ffffffff8255fd10 ? Xintr_ioapic_level14 -ffffffff8255fd50 ? Xintr_ioapic_level15 -ffffffff8255fd90 ? Xintr_ioapic_level16 -ffffffff8255fdd0 ? Xintr_ioapic_level17 -ffffffff8255fe10 ? Xintr_ioapic_level18 -ffffffff8255fe50 ? Xintr_ioapic_level19 -ffffffff8255fe90 ? Xintr_ioapic_level20 -ffffffff8255fed0 ? Xintr_ioapic_level21 -ffffffff8255ff10 ? Xintr_ioapic_level22 -ffffffff8255ff50 ? Xintr_ioapic_level23 -ffffffff8255ff90 ? Xintr_ioapic_level24 -ffffffff8255ffd0 ? Xintr_ioapic_level25 -ffffffff82560010 ? Xintr_ioapic_level26 -ffffffff82560050 ? Xintr_ioapic_level27 -ffffffff82560090 ? Xintr_ioapic_level28 -ffffffff825600d0 ? Xintr_ioapic_level29 -ffffffff82560110 ? Xintr_ioapic_level30 -ffffffff82560150 ? Xintr_ioapic_level31 -ffffffff82560190 ? Xintr_ioapic_level32 -ffffffff825601d0 ? Xintr_ioapic_level33 -ffffffff82560210 ? Xintr_ioapic_level34 -ffffffff82560250 ? Xintr_ioapic_level35 -ffffffff82560290 ? Xintr_ioapic_level36 -ffffffff825602d0 ? Xintr_ioapic_level37 -ffffffff82560310 ? Xintr_ioapic_level38 -ffffffff82560350 ? Xintr_ioapic_level39 -ffffffff82560390 ? Xintr_ioapic_level40 -ffffffff825603d0 ? Xintr_ioapic_level41 -ffffffff82560410 ? Xintr_ioapic_level42 -ffffffff82560450 ? Xintr_ioapic_level43 -ffffffff82560490 ? Xintr_ioapic_level44 -ffffffff825604d0 ? Xintr_ioapic_level45 -ffffffff82560510 ? Xintr_ioapic_level46 -ffffffff82560550 ? Xintr_ioapic_level47 -ffffffff82560590 ? Xintr_ioapic_level48 -ffffffff825605d0 ? Xintr_ioapic_level49 -ffffffff82560610 ? Xintr_ioapic_level50 -ffffffff82560650 ? Xintr_ioapic_level51 -ffffffff82560690 ? Xintr_ioapic_level52 -ffffffff825606d0 ? Xintr_ioapic_level53 -ffffffff82560710 ? Xintr_ioapic_level54 -ffffffff82560750 ? Xintr_ioapic_level55 -ffffffff82560790 ? Xintr_ioapic_level56 -ffffffff825607d0 ? Xintr_ioapic_level57 -ffffffff82560810 ? Xintr_ioapic_level58 -ffffffff82560850 ? Xintr_ioapic_level59 -ffffffff82560890 ? Xintr_ioapic_level60 -ffffffff825608d0 ? Xintr_ioapic_level61 -ffffffff82560910 ? Xintr_ioapic_level62 -ffffffff82560950 ? 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dmub_dcn32_get_outbox0_wptr +ffffffff8224cfc0 T dmub_dcn32_set_outbox0_rptr +ffffffff8224cff0 T dmub_dcn32_get_current_time +ffffffff8224d020 T dmub_dcn32_get_diagnostic_data +ffffffff8224d4c0 T dmub_dcn32_configure_dmub_in_system_memory +ffffffff8224d4f0 T dmub_dcn32_send_inbox0_cmd +ffffffff8224d520 T dmub_dcn32_clear_inbox0_ack_register +ffffffff8224d550 T dmub_dcn32_read_inbox0_ack_register +ffffffff8224e000 T dmub_reg_update +ffffffff8224e170 T dmub_reg_set +ffffffff8224e2d0 T dmub_reg_get +ffffffff8224f000 T dmub_flush_buffer_mem +ffffffff8224f030 T dmub_srv_create +ffffffff8224f580 T dmub_srv_destroy +ffffffff8224f5a0 T dmub_srv_calc_region_info +ffffffff8224f810 T dmub_srv_calc_fb_info +ffffffff8224f9b0 T dmub_srv_has_hw_support +ffffffff8224fa20 T dmub_srv_is_hw_init +ffffffff8224faa0 T dmub_srv_hw_init +ffffffff8224fef0 T dmub_srv_hw_reset +ffffffff8224ff80 T dmub_srv_cmd_queue +ffffffff82250090 T dmub_srv_cmd_execute +ffffffff82250150 T dmub_srv_wait_for_auto_load +ffffffff822501f0 T dmub_srv_wait_for_phy_init +ffffffff822502a0 T dmub_srv_wait_for_idle +ffffffff82250350 T dmub_srv_send_gpint_command +ffffffff82250440 T dmub_srv_get_gpint_response +ffffffff822504a0 T dmub_srv_get_gpint_dataout +ffffffff82250500 T dmub_srv_get_fw_boot_status +ffffffff82250570 T dmub_srv_cmd_with_reply_data +ffffffff822507e0 T dmub_srv_get_outbox0_msg +ffffffff82250880 T dmub_srv_get_diagnostic_data +ffffffff822508e0 T dmub_srv_should_detect +ffffffff82250930 T dmub_srv_clear_inbox0_ack +ffffffff82250980 T dmub_srv_wait_for_inbox0_ack +ffffffff82250a10 T dmub_srv_send_inbox0_cmd +ffffffff82251000 T dmub_srv_stat_get_notification +ffffffff82252000 T setup_x_points_distribution +ffffffff82252170 T log_x_points_distribution +ffffffff822521a0 T precompute_pq +ffffffff82252370 t compute_pq +ffffffff82252580 T precompute_de_pq +ffffffff822526e0 t compute_de_pq +ffffffff822529a0 T calculate_user_regamma_coeff +ffffffff82252d70 t apply_lut_1d +ffffffff822530a0 T calculate_user_regamma_ramp +ffffffff822539e0 T mod_color_calculate_degamma_params +ffffffff82253fb0 t build_evenly_distributed_points +ffffffff82254130 t scale_gamma +ffffffff822542e0 t build_degamma +ffffffff822546b0 t build_hlg_degamma +ffffffff822548d0 t map_regamma_hw_to_x_user +ffffffff82255030 T mod_color_calculate_regamma_params +ffffffff822571a0 T mod_color_calculate_degamma_curve +ffffffff82257660 t translate_from_linear_space +ffffffff822579a0 t build_coefficients +ffffffff82257b20 t calculate_mapped_value +ffffffff82258000 T mod_color_is_table_init +ffffffff82258050 T mod_color_get_table +ffffffff822580a0 T mod_color_set_table_init_state +ffffffff82259000 T mod_freesync_create +ffffffff82259070 T mod_freesync_destroy +ffffffff822590b0 T mod_freesync_calc_v_total_from_refresh +ffffffff82259140 T mod_freesync_get_vmin_vmax +ffffffff82259180 T mod_freesync_get_v_position +ffffffff82259200 T mod_freesync_build_vrr_infopacket +ffffffff82259950 T mod_freesync_build_vrr_params +ffffffff82259cd0 T mod_freesync_calc_nominal_field_rate +ffffffff82259d30 T mod_freesync_handle_preflip +ffffffff8225a150 T mod_freesync_handle_v_update +ffffffff8225a610 T mod_freesync_get_settings +ffffffff8225a680 T mod_freesync_calc_field_rate_from_timing +ffffffff8225a6d0 T mod_freesync_get_freesync_enabled +ffffffff8225a700 T mod_freesync_is_valid_range +ffffffff8225b000 T mod_build_vsc_infopacket +ffffffff8225b200 T mod_build_hf_vsif_infopacket +ffffffff8225c000 T dmub_init_abm_config +ffffffff8225c540 t fill_iram_v_2_3 +ffffffff8225c9a0 T dmcu_load_iram +ffffffff8225d180 T is_psr_su_specific_panel +ffffffff8225d210 T mod_power_calc_psr_configs +ffffffff8225d310 T mod_power_only_edp +ffffffff8225d360 T psr_su_set_y_granularity +ffffffff8225e000 T mod_vmid_get_for_ptb +ffffffff8225e230 T mod_vmid_reset +ffffffff8225e2f0 T mod_vmid_create +ffffffff8225e430 T mod_vmid_destroy +ffffffff8225f000 T amdgpu_dpm_get_sclk +ffffffff8225f090 T amdgpu_dpm_get_mclk +ffffffff8225f120 T amdgpu_dpm_set_powergating_by_smu +ffffffff8225f200 T amdgpu_dpm_set_gfx_power_up_by_imu +ffffffff8225f310 T amdgpu_dpm_baco_enter +ffffffff8225f3a0 T amdgpu_dpm_baco_exit +ffffffff8225f430 T amdgpu_dpm_set_mp1_state +ffffffff8225f4d0 T amdgpu_dpm_is_baco_supported +ffffffff8225f580 T amdgpu_dpm_mode2_reset +ffffffff8225f610 T amdgpu_dpm_baco_reset +ffffffff8225f6c0 T amdgpu_dpm_is_mode1_reset_supported +ffffffff8225f730 T amdgpu_dpm_mode1_reset +ffffffff8225f7b0 T amdgpu_dpm_switch_power_profile +ffffffff8225f860 T amdgpu_dpm_set_xgmi_pstate +ffffffff8225f900 T amdgpu_dpm_set_df_cstate +ffffffff8225f9a0 T amdgpu_dpm_allow_xgmi_power_down +ffffffff8225fa20 T amdgpu_dpm_enable_mgpu_fan_boost +ffffffff8225fab0 T amdgpu_dpm_set_clockgating_by_smu +ffffffff8225fb50 T amdgpu_dpm_smu_i2c_bus_access +ffffffff8225fbf0 T amdgpu_pm_acpi_event_handler +ffffffff8225fcb0 T amdgpu_dpm_read_sensor +ffffffff8225fd70 T amdgpu_dpm_compute_clocks +ffffffff8225fe50 T amdgpu_dpm_enable_uvd +ffffffff82260040 T amdgpu_dpm_enable_vce +ffffffff82260230 T amdgpu_dpm_enable_jpeg +ffffffff82260330 T amdgpu_pm_load_smu_firmware +ffffffff822603e0 T amdgpu_dpm_handle_passthrough_sbr +ffffffff82260460 T amdgpu_dpm_send_hbm_bad_pages_num +ffffffff822604e0 T amdgpu_dpm_send_hbm_bad_channel_flag +ffffffff82260560 T amdgpu_dpm_get_dpm_freq_range +ffffffff82260600 T amdgpu_dpm_set_soft_freq_range +ffffffff822606a0 T amdgpu_dpm_write_watermarks_table +ffffffff82260720 T amdgpu_dpm_wait_for_event +ffffffff822607b0 T amdgpu_dpm_set_residency_gfxoff +ffffffff82260830 T amdgpu_dpm_get_residency_gfxoff +ffffffff822608b0 T amdgpu_dpm_get_entrycount_gfxoff +ffffffff82260930 T amdgpu_dpm_get_status_gfxoff +ffffffff822609b0 T amdgpu_dpm_get_thermal_throttling_counter +ffffffff82260a00 T amdgpu_dpm_gfx_state_change +ffffffff82260a70 T amdgpu_dpm_get_ecc_info +ffffffff82260af0 T amdgpu_dpm_get_vce_clock_state +ffffffff82260b80 T amdgpu_dpm_get_current_power_state +ffffffff82260bf0 T amdgpu_dpm_set_power_state +ffffffff82260d50 T amdgpu_dpm_dispatch_task +ffffffff82260df0 T amdgpu_dpm_get_performance_level +ffffffff82260e80 T amdgpu_dpm_force_performance_level +ffffffff82261060 T amdgpu_dpm_get_pp_num_states +ffffffff822610f0 T amdgpu_dpm_get_pp_table +ffffffff82261180 T amdgpu_dpm_set_fine_grain_clk_vol +ffffffff82261220 T amdgpu_dpm_odn_edit_dpm_table +ffffffff822612c0 T amdgpu_dpm_print_clock_levels +ffffffff82261350 T amdgpu_dpm_emit_clock_levels +ffffffff822613f0 T amdgpu_dpm_set_ppfeature_status +ffffffff82261480 T amdgpu_dpm_get_ppfeature_status +ffffffff82261510 T amdgpu_dpm_force_clock_level +ffffffff822615a0 T amdgpu_dpm_get_sclk_od +ffffffff82261620 T amdgpu_dpm_set_sclk_od +ffffffff822617a0 T amdgpu_dpm_get_mclk_od +ffffffff82261820 T amdgpu_dpm_set_mclk_od +ffffffff822619a0 T amdgpu_dpm_get_power_profile_mode +ffffffff82261a30 T amdgpu_dpm_set_power_profile_mode +ffffffff82261ad0 T amdgpu_dpm_get_gpu_metrics +ffffffff82261b60 T amdgpu_dpm_get_fan_control_mode +ffffffff82261bf0 T amdgpu_dpm_set_fan_speed_pwm +ffffffff82261c80 T amdgpu_dpm_get_fan_speed_pwm +ffffffff82261d10 T amdgpu_dpm_get_fan_speed_rpm +ffffffff82261da0 T amdgpu_dpm_set_fan_speed_rpm +ffffffff82261e30 T amdgpu_dpm_set_fan_control_mode +ffffffff82261ec0 T amdgpu_dpm_get_power_limit +ffffffff82261f70 T amdgpu_dpm_set_power_limit +ffffffff82262000 T amdgpu_dpm_is_cclk_dpm_supported +ffffffff82262070 T amdgpu_dpm_debugfs_print_current_performance_level +ffffffff82262100 T amdgpu_dpm_get_smu_prv_buf_details +ffffffff822621a0 T amdgpu_dpm_is_overdrive_supported +ffffffff82262210 T amdgpu_dpm_set_pp_table +ffffffff822622b0 T amdgpu_dpm_get_num_cpu_cores +ffffffff82262300 T amdgpu_dpm_stb_debug_fs_init +ffffffff82262350 T amdgpu_dpm_display_configuration_change +ffffffff822623e0 T amdgpu_dpm_get_clock_by_type +ffffffff82262480 T amdgpu_dpm_get_display_mode_validation_clks +ffffffff82262510 T amdgpu_dpm_get_clock_by_type_with_latency +ffffffff822625b0 T amdgpu_dpm_get_clock_by_type_with_voltage +ffffffff82262650 T amdgpu_dpm_set_watermarks_for_clocks_ranges +ffffffff822626e0 T amdgpu_dpm_display_clock_voltage_request +ffffffff82262770 T amdgpu_dpm_get_current_clocks +ffffffff82262800 T amdgpu_dpm_notify_smu_enable_pwe +ffffffff82262880 T amdgpu_dpm_set_active_display_count +ffffffff82262910 T amdgpu_dpm_set_min_deep_sleep_dcefclk +ffffffff822629a0 T amdgpu_dpm_set_hard_min_dcefclk_by_freq +ffffffff82262a40 T amdgpu_dpm_set_hard_min_fclk_by_freq +ffffffff82262ae0 T amdgpu_dpm_display_disable_memory_clock_switch +ffffffff82262b70 T amdgpu_dpm_get_max_sustainable_clocks_by_dc +ffffffff82262c00 T amdgpu_dpm_get_uclk_dpm_states +ffffffff82262ca0 T amdgpu_dpm_get_dpm_clock_table +ffffffff82263000 T amdgpu_dpm_get_active_displays +ffffffff822630a0 T amdgpu_dpm_get_vblank_time +ffffffff82263150 T amdgpu_dpm_get_vrefresh +ffffffff82264000 T amdgpu_pm_sysfs_init +ffffffff82264030 T amdgpu_pm_sysfs_fini +ffffffff82264060 T amdgpu_debugfs_pm_init +ffffffff82265000 T amdgpu_dpm_print_class_info +ffffffff822652b0 T amdgpu_dpm_print_cap_info +ffffffff82265340 T amdgpu_dpm_print_ps_status +ffffffff822653d0 T amdgpu_pm_print_power_states +ffffffff82265490 T amdgpu_get_platform_caps +ffffffff82265530 T amdgpu_parse_extended_power_table +ffffffff82266540 T amdgpu_free_extended_power_table +ffffffff82266650 T amdgpu_add_thermal_controller +ffffffff82266a80 T amdgpu_get_vce_clock_state +ffffffff82266ac0 T amdgpu_legacy_dpm_compute_clocks +ffffffff82266f30 T amdgpu_dpm_thermal_work_handler +ffffffff82267000 t pp_early_init +ffffffff82267100 t pp_late_init +ffffffff82267220 t pp_sw_init +ffffffff822672b0 t pp_sw_fini +ffffffff82267340 t pp_hw_init +ffffffff822673a0 t pp_hw_fini +ffffffff82267410 t pp_late_fini +ffffffff82267470 t pp_suspend +ffffffff822674c0 t pp_resume +ffffffff822674e0 t pp_is_idle +ffffffff82267510 t pp_wait_for_idle +ffffffff82267540 t pp_sw_reset +ffffffff82267570 t pp_set_clockgating_state +ffffffff822675a0 t pp_set_powergating_state +ffffffff822675d0 t pp_dpm_set_fan_control_mode +ffffffff82267640 t pp_dpm_get_fan_control_mode +ffffffff822676b0 t pp_dpm_set_fan_speed_pwm +ffffffff82267710 t pp_dpm_get_fan_speed_pwm +ffffffff82267770 t pp_dpm_force_clock_level +ffffffff822677d0 t pp_dpm_print_clock_levels +ffffffff82267830 t pp_dpm_emit_clock_levels +ffffffff82267890 t pp_dpm_force_performance_level +ffffffff82267930 t pp_dpm_get_sclk_od +ffffffff82267990 t pp_dpm_set_sclk_od +ffffffff822679f0 t pp_dpm_get_mclk_od +ffffffff82267a50 t pp_dpm_set_mclk_od +ffffffff82267ab0 t pp_dpm_read_sensor +ffffffff82267b70 t pp_dpm_get_performance_level +ffffffff82267bb0 t pp_dpm_get_current_power_state +ffffffff82267c30 t pp_dpm_get_fan_speed_rpm +ffffffff82267c90 t pp_dpm_set_fan_speed_rpm +ffffffff82267cf0 t pp_dpm_get_pp_num_states +ffffffff82267e30 t pp_dpm_get_pp_table +ffffffff82267e80 t pp_dpm_set_pp_table +ffffffff82267fb0 t pp_dpm_switch_power_profile +ffffffff822680f0 t pp_dpm_get_vce_clock_state +ffffffff82268140 t pp_dpm_dispatch_tasks +ffffffff82268180 t pp_dpm_load_fw +ffffffff822681f0 t pp_dpm_fw_loading_complete +ffffffff82268220 t pp_set_powergating_by_smu +ffffffff822683a0 t pp_set_clockgating_by_smu +ffffffff82268410 t pp_set_power_limit +ffffffff822684d0 t pp_get_power_limit +ffffffff82268570 t pp_get_power_profile_mode +ffffffff822685d0 t pp_set_power_profile_mode +ffffffff82268630 t pp_set_fine_grain_clk_vol +ffffffff82268690 t pp_odn_edit_dpm_table +ffffffff822686f0 t pp_dpm_set_mp1_state +ffffffff82268750 t pp_smu_i2c_bus_access +ffffffff822687b0 t pp_gfx_state_change_set +ffffffff82268810 t pp_dpm_get_sclk +ffffffff82268860 t pp_dpm_get_mclk +ffffffff822688b0 t pp_display_configuration_change +ffffffff82268900 t pp_get_display_power_level +ffffffff82268940 t pp_get_current_clocks +ffffffff82268a60 t pp_get_clock_by_type +ffffffff82268ab0 t pp_get_clock_by_type_with_latency +ffffffff82268b00 t pp_get_clock_by_type_with_voltage +ffffffff82268b50 t pp_set_watermarks_for_clocks_ranges +ffffffff82268b90 t pp_display_clock_voltage_request +ffffffff82268bd0 t pp_get_display_mode_validation_clocks +ffffffff82268c30 t pp_notify_smu_enable_pwe +ffffffff82268c90 t pp_enable_mgpu_fan_boost +ffffffff82268cf0 t pp_set_active_display_count +ffffffff82268d30 t pp_set_hard_min_dcefclk_by_freq +ffffffff82268d90 t pp_set_hard_min_fclk_by_freq +ffffffff82268df0 t pp_set_min_deep_sleep_dcefclk +ffffffff82268e50 t pp_get_asic_baco_capability +ffffffff82268ec0 t pp_get_asic_baco_state +ffffffff82268f20 t pp_set_asic_baco_state +ffffffff82268f90 t pp_get_ppfeature_status +ffffffff82268ff0 t pp_set_ppfeature_status +ffffffff82269040 t pp_asic_reset_mode_2 +ffffffff822690a0 t pp_set_df_cstate +ffffffff82269100 t pp_set_xgmi_pstate +ffffffff82269160 t pp_get_gpu_metrics +ffffffff822691c0 t pp_get_prv_buffer_details +ffffffff82269240 t pp_pm_compute_clocks +ffffffff82269310 t pp_swctf_delayed_work_handler +ffffffff82269450 t __delayed_work_tick +ffffffff82269470 t orderly_poweroff +ffffffff8226a000 T ci_baco_set_state +ffffffff8226b000 T baco_program_registers +ffffffff8226b0d0 t baco_cmd_handler +ffffffff8226b250 T soc15_baco_program_registers +ffffffff8226c000 T fiji_baco_set_state +ffffffff8226d000 T phm_setup_asic +ffffffff8226d050 T phm_power_down_asic +ffffffff8226d0a0 T phm_set_power_state +ffffffff8226d110 T phm_enable_dynamic_state_management +ffffffff8226d1c0 T phm_disable_dynamic_state_management +ffffffff8226d260 T phm_force_dpm_levels +ffffffff8226d2b0 T phm_apply_state_adjust_rules +ffffffff8226d300 T phm_apply_clock_adjust_rules +ffffffff8226d350 T phm_powerdown_uvd +ffffffff8226d3a0 T phm_disable_clock_power_gatings +ffffffff8226d3f0 T phm_pre_display_configuration_changed +ffffffff8226d450 T phm_display_configuration_changed +ffffffff8226d4b0 T phm_notify_smc_display_config_after_ps_adjustment +ffffffff8226d510 T phm_stop_thermal_controller +ffffffff8226d570 T phm_register_irq_handlers +ffffffff8226d5c0 T phm_start_thermal_controller +ffffffff8226d710 T phm_check_smc_update_required_for_display_configuration +ffffffff8226d770 T phm_check_states_equal +ffffffff8226d7c0 T phm_store_dal_configuration_data +ffffffff8226d910 T phm_get_dal_power_level +ffffffff8226d970 T phm_set_cpu_power_state +ffffffff8226d9c0 T phm_get_performance_level +ffffffff8226da20 T phm_get_clock_info +ffffffff8226dba0 T phm_get_current_shallow_sleep_clocks +ffffffff8226dbf0 T phm_get_clock_by_type +ffffffff8226dc40 T phm_get_clock_by_type_with_latency +ffffffff8226dc90 T phm_get_clock_by_type_with_voltage +ffffffff8226dce0 T phm_set_watermarks_for_clocks_ranges +ffffffff8226dd30 T phm_display_clock_voltage_request +ffffffff8226dd80 T phm_get_max_high_clocks +ffffffff8226ddd0 T phm_disable_smc_firmware_ctf +ffffffff8226de30 T phm_set_active_display_count +ffffffff8226e000 T hwmgr_early_init +ffffffff8226e470 T hwmgr_sw_init +ffffffff8226e4e0 T hwmgr_sw_fini +ffffffff8226e530 T hwmgr_hw_init +ffffffff8226e6f0 T hwmgr_hw_fini +ffffffff8226e7b0 T hwmgr_suspend +ffffffff8226e830 T hwmgr_resume +ffffffff8226e8d0 T hwmgr_handle_task +ffffffff8226f000 T polaris_baco_set_state +ffffffff82270000 T pp_override_get_default_fuse_value +ffffffff82271000 T psm_init_power_state_table +ffffffff822712a0 T psm_fini_power_state_table +ffffffff82271360 T psm_set_boot_states +ffffffff82271420 T psm_set_performance_states +ffffffff822714e0 T psm_set_user_performance_state +ffffffff82271580 T psm_adjust_power_state_dynamic +ffffffff82272000 T atomctrl_initialize_mc_reg_table +ffffffff82272210 T atomctrl_initialize_mc_reg_table_v2_2 +ffffffff82272420 T atomctrl_set_engine_dram_timings_rv770 +ffffffff82272490 T atomctrl_get_memory_pll_dividers_si +ffffffff82272570 T atomctrl_get_memory_pll_dividers_vi +ffffffff822725f0 T atomctrl_get_memory_pll_dividers_ai +ffffffff822726a0 T atomctrl_get_engine_pll_dividers_kong +ffffffff82272720 T atomctrl_get_engine_pll_dividers_vi +ffffffff822727e0 T atomctrl_get_engine_pll_dividers_ai +ffffffff822728c0 T atomctrl_get_dfs_pll_dividers_vi +ffffffff82272980 T atomctrl_get_reference_clock +ffffffff822729e0 T atomctrl_is_voltage_controlled_by_gpio_v3 +ffffffff82272aa0 T atomctrl_get_voltage_table_v3 +ffffffff82272c00 T atomctrl_get_pp_assign_pin +ffffffff82272cf0 T atomctrl_calculate_voltage_evv_on_sclk +ffffffff82273070 T atomctrl_get_voltage_evv_on_sclk +ffffffff822730f0 T atomctrl_get_voltage_evv +ffffffff822731a0 T atomctrl_get_mpll_reference_clock +ffffffff82273210 T atomctrl_is_asic_internal_ss_supported +ffffffff82273260 T atomctrl_get_memory_clock_spread_spectrum +ffffffff82273360 T atomctrl_get_engine_clock_spread_spectrum +ffffffff82273460 T atomctrl_read_efuse +ffffffff82273510 T atomctrl_set_ac_timing_ai +ffffffff82273570 T atomctrl_get_voltage_evv_on_sclk_ai +ffffffff822735f0 T atomctrl_get_smc_sclk_range_table +ffffffff822736b0 T atomctrl_get_vddc_shared_railinfo +ffffffff82273720 T atomctrl_get_avfs_information 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smu7_disable_clock_power_gating +ffffffff8227e0e0 T smu7_powergate_uvd +ffffffff8227e1d0 T smu7_powergate_vce +ffffffff8227e2c0 T smu7_update_clock_gatings +ffffffff8227e670 T smu7_powergate_gfx +ffffffff8227f000 T smu7_get_sleep_divider_id_from_clock +ffffffff8227f0a0 T smu7_init_function_pointers +ffffffff8227f100 t smu7_hwmgr_backend_init +ffffffff82280f50 t smu7_hwmgr_backend_fini +ffffffff82280fc0 t smu7_setup_asic_task +ffffffff82281330 t smu7_get_power_state_size +ffffffff82281360 t smu7_apply_state_adjust_rules +ffffffff822817e0 t smu7_force_dpm_level +ffffffff82281cf0 t smu7_enable_dpm_tasks +ffffffff82284680 t smu7_disable_dpm_tasks +ffffffff82284dc0 t smu7_dpm_patch_boot_state +ffffffff82284f00 t smu7_get_pp_table_entry +ffffffff82285300 t smu7_get_number_of_powerplay_table_entries +ffffffff82285370 t smu7_dpm_get_mclk +ffffffff82285410 t smu7_dpm_get_sclk +ffffffff822854b0 t smu7_set_power_state_tasks +ffffffff82286240 t smu7_notify_smc_display_config_after_ps_adjustment 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smu7_avfs_control +ffffffff82287c70 t smu7_notify_cac_buffer_info +ffffffff82287e10 t smu7_get_thermal_temperature_range +ffffffff82287eb0 t smu7_get_power_profile_mode +ffffffff82287ef0 t smu7_set_power_profile_mode +ffffffff82288150 t smu7_odn_edit_dpm_table +ffffffff82288300 t phm_add_voltage +ffffffff82288410 t smu7_check_dpm_table_updated +ffffffff82288560 t smu7_odn_initial_default_setting +ffffffff82288690 t smu7_set_dpm_event_sources +ffffffff822887b0 t smu7_get_pp_table_entry_callback_func_v0 +ffffffff82288cb0 t smu7_get_pp_table_entry_callback_func_v1 +ffffffff8228a000 T smu7_enable_didt_config +ffffffff8228a3c0 t smu7_program_pt_config_registers +ffffffff8228a5b0 t smu7_enable_didt +ffffffff8228a7a0 T smu7_disable_didt_config +ffffffff8228a860 T smu7_enable_smc_cac +ffffffff8228a8f0 T smu7_disable_smc_cac +ffffffff8228a980 T smu7_set_power_limit +ffffffff8228a9e0 T smu7_enable_power_containment +ffffffff8228ab70 T smu7_disable_power_containment +ffffffff8228ac90 T smu7_power_control_set_level +ffffffff8228b000 T smu7_fan_ctrl_get_fan_speed_info +ffffffff8228b080 T smu7_fan_ctrl_get_fan_speed_pwm +ffffffff8228b140 T smu7_fan_ctrl_get_fan_speed_rpm +ffffffff8228b1f0 T smu7_fan_ctrl_set_static_mode +ffffffff8228b320 T smu7_fan_ctrl_set_default_mode +ffffffff8228b400 T smu7_fan_ctrl_start_smc_fan_control +ffffffff8228b530 T smu7_fan_ctrl_stop_smc_fan_control +ffffffff8228b550 T smu7_fan_ctrl_set_fan_speed_pwm +ffffffff8228b740 T smu7_fan_ctrl_reset_fan_speed_to_default +ffffffff8228b930 T smu7_fan_ctrl_set_fan_speed_rpm +ffffffff8228bb10 T smu7_thermal_get_temperature +ffffffff8228bb70 T smu7_thermal_disable_alert +ffffffff8228bc10 T smu7_thermal_stop_thermal_controller +ffffffff8228bd90 T smu7_start_thermal_controller +ffffffff8228c140 T smu7_thermal_ctrl_uninitialize_thermal_controller +ffffffff8228d000 T smu8_init_function_pointers +ffffffff8228d040 t smu8_hwmgr_backend_init +ffffffff8228d520 t smu8_hwmgr_backend_fini +ffffffff8228d5a0 t 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smu8_get_max_high_clocks +ffffffff8228f020 t smu8_power_off_asic +ffffffff8228f0a0 t smu8_force_clock_level +ffffffff8228f110 t smu8_print_clock_levels +ffffffff8228f2e0 t smu8_read_sensor +ffffffff8228f5e0 t smu8_notify_cac_buffer_info +ffffffff8228f690 t smu8_get_thermal_temperature_range +ffffffff8228f710 t smu8_dpm_get_pp_table_entry_callback +ffffffff82290000 T smu9_baco_get_capability +ffffffff822900d0 T smu9_baco_get_state +ffffffff82291000 T convert_to_vid +ffffffff82291050 T convert_to_vddc +ffffffff822910a0 T phm_copy_clock_limits_array +ffffffff82291180 T phm_copy_overdrive_settings_limits_array +ffffffff82291260 T phm_set_field_to_u32 +ffffffff822912c0 T phm_wait_on_register +ffffffff822913d0 T phm_wait_on_indirect_register +ffffffff82291500 T phm_wait_for_register_unequal +ffffffff82291600 T phm_wait_for_indirect_register_unequal +ffffffff82291730 T phm_cf_want_uvd_power_gating +ffffffff82291770 T phm_cf_want_vce_power_gating +ffffffff822917b0 T phm_trim_voltage_table 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smu_get_voltage_dependency_table_ppt_v1 +ffffffff822928b0 T smu_set_watermarks_for_clocks_ranges +ffffffff82293000 T tonga_baco_set_state +ffffffff82294000 T vega10_baco_set_state +ffffffff82295000 T vega10_enable_disable_vce_dpm +ffffffff82295090 T vega10_hwmgr_init +ffffffff822950f0 t vega10_hwmgr_backend_init +ffffffff82295ef0 t vega10_hwmgr_backend_fini +ffffffff82295f60 t vega10_setup_asic_task +ffffffff82296090 t vega10_get_power_state_size +ffffffff822960c0 t vega10_apply_state_adjust_rules +ffffffff82296450 t vega10_dpm_force_dpm_level +ffffffff822968b0 t vega10_enable_dpm_tasks +ffffffff82299320 t vega10_disable_dpm_tasks +ffffffff82299900 t vega10_patch_boot_state +ffffffff82299930 t vega10_get_pp_table_entry +ffffffff822999a0 t vega10_power_gate_vce +ffffffff82299a40 t vega10_power_gate_uvd +ffffffff82299ae0 t vega10_dpm_get_mclk +ffffffff82299b80 t vega10_dpm_get_sclk +ffffffff82299c20 t vega10_set_power_state_tasks +ffffffff8229a6b0 t vega10_notify_smc_display_config_after_ps_adjustment +ffffffff8229a860 t vega10_display_configuration_changed_task +ffffffff8229a930 t vega10_set_fan_control_mode +ffffffff8229a9a0 t vega10_get_fan_control_mode +ffffffff8229a9e0 t vega10_check_smc_update_required_for_display_configuration +ffffffff8229aa40 t vega10_check_states_equal +ffffffff8229aba0 t vega10_get_dal_power_level +ffffffff8229abe0 t vega10_get_performance_level +ffffffff8229ac80 t vega10_get_clock_by_type_with_latency +ffffffff8229aeb0 t vega10_get_clock_by_type_with_voltage +ffffffff8229af90 t vega10_set_watermarks_for_clocks_ranges +ffffffff8229aff0 t vega10_display_clock_voltage_request +ffffffff8229b070 t vega10_power_off_asic +ffffffff8229b0e0 t vega10_force_clock_level +ffffffff8229b210 t vega10_emit_clock_levels +ffffffff8229b380 t vega10_print_clock_levels +ffffffff8229bb60 t vega10_get_sclk_od +ffffffff8229bbd0 t vega10_set_sclk_od +ffffffff8229bcd0 t vega10_get_mclk_od +ffffffff8229bd40 t vega10_set_mclk_od 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vega10_populate_single_memory_level +ffffffff8229d9e0 t vega10_get_pp_table_entry_callback_func +ffffffff8229dc00 t vega10_odn_update_power_state +ffffffff8229e000 T vega10_enable_didt_config +ffffffff8229f870 T vega10_disable_didt_config +ffffffff8229fab0 T vega10_initialize_power_tune_defaults +ffffffff8229fbe0 T vega10_set_power_limit +ffffffff8229fc30 T vega10_enable_power_containment +ffffffff8229fd50 T vega10_disable_power_containment +ffffffff8229fe20 T vega10_power_control_set_level +ffffffff8229fe80 t vega10_didt_set_mask +ffffffff822a1000 t vega10_pp_tables_initialize +ffffffff822a29a0 t vega10_pp_tables_uninitialize +ffffffff822a2b50 T vega10_get_number_of_powerplay_table_entries +ffffffff822a2c00 T vega10_get_powerplay_table_entry +ffffffff822a2d80 T vega10_baco_set_cap +ffffffff822a3000 T vega10_fan_ctrl_get_fan_speed_info +ffffffff822a3080 T vega10_fan_ctrl_get_fan_speed_pwm +ffffffff822a31a0 T vega10_fan_ctrl_get_fan_speed_rpm +ffffffff822a32a0 T vega10_fan_ctrl_set_static_mode +ffffffff822a3550 T vega10_fan_ctrl_set_default_mode +ffffffff822a3760 T vega10_fan_ctrl_start_smc_fan_control +ffffffff822a3820 T vega10_fan_ctrl_stop_smc_fan_control +ffffffff822a38e0 T vega10_fan_ctrl_set_fan_speed_pwm +ffffffff822a3b00 T vega10_fan_ctrl_reset_fan_speed_to_default +ffffffff822a3bc0 T vega10_fan_ctrl_set_fan_speed_rpm +ffffffff822a3d90 T vega10_thermal_get_temperature +ffffffff822a3e20 T vega10_thermal_disable_alert +ffffffff822a3f30 T vega10_thermal_stop_thermal_controller +ffffffff822a3f90 T vega10_enable_mgpu_fan_boost +ffffffff822a40a0 T vega10_start_thermal_controller +ffffffff822a4640 T vega10_thermal_ctrl_uninitialize_thermal_controller +ffffffff822a5000 T vega12_baco_set_state +ffffffff822a6000 T vega12_enable_disable_vce_dpm +ffffffff822a6090 T vega12_hwmgr_init +ffffffff822a60d0 t vega12_hwmgr_backend_init +ffffffff822a6930 t vega12_hwmgr_backend_fini +ffffffff822a6990 t vega12_setup_asic_task +ffffffff822a69d0 t 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arcturus_get_gpu_metrics +ffffffff822e7690 t arcturus_get_fan_parameters +ffffffff822e76d0 t arcturus_get_current_clk_freq_by_table +ffffffff822e7810 t arcturus_get_smu_metrics_data +ffffffff822e7a80 t arcturus_upload_dpm_level +ffffffff822e7b70 t arcturus_i2c_xfer +ffffffff822e7e30 t arcturus_i2c_func +ffffffff822e7e60 t arcturus_set_fan_static_mode +ffffffff822e9000 T cyan_skillfish_set_ppt_funcs +ffffffff822e9030 t cyan_skillfish_print_clk_levels +ffffffff822e9150 t cyan_skillfish_od_edit_dpm_table +ffffffff822e9430 t cyan_skillfish_read_sensor +ffffffff822e95e0 t cyan_skillfish_is_dpm_running +ffffffff822e9680 t cyan_skillfish_init_smc_tables +ffffffff822e9760 t cyan_skillfish_get_enabled_mask +ffffffff822e97a0 t cyan_skillfish_get_dpm_ultimate_freq +ffffffff822e9860 t cyan_skillfish_get_gpu_metrics +ffffffff822e9b00 t cyan_skillfish_get_smu_metrics_data +ffffffff822ea000 T navi10_set_ppt_funcs +ffffffff822ea050 t navi10_run_btc +ffffffff822ea0d0 t navi10_get_allowed_feature_mask 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navi10_set_default_od_settings +ffffffff822ec750 t navi10_display_disable_memory_clock_switch +ffffffff822ec7d0 t navi10_get_power_limit +ffffffff822ec8f0 t navi10_update_pcie_parameters +ffffffff822eca50 t navi10_i2c_control_init +ffffffff822ecb80 t navi10_i2c_control_fini +ffffffff822ecbc0 t navi10_init_smc_tables +ffffffff822ecdf0 t navi10_setup_pptable +ffffffff822ed000 t navi10_baco_enter +ffffffff822ed050 t navi10_baco_exit +ffffffff822ed150 t navi1x_get_gpu_metrics +ffffffff822edaf0 t navi10_enable_mgpu_fan_boost +ffffffff822edb70 t navi10_get_fan_parameters +ffffffff822edbb0 t navi10_post_smu_init +ffffffff822ede30 t navi10_get_default_config_table_settings +ffffffff822ede80 t navi10_set_config_table +ffffffff822edf30 t navi1x_get_smu_metrics_data +ffffffff822ee390 t navi10_get_smu_metrics_data +ffffffff822ee5c0 t navi10_i2c_xfer +ffffffff822ee880 t navi10_i2c_func +ffffffff822ee8b0 t navi10_umc_hybrid_cdr_workaround +ffffffff822ef000 T sienna_cichlid_set_ppt_funcs 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sienna_cichlid_is_mode2_reset_supported +ffffffff822f2540 t sienna_cichlid_mode2_reset +ffffffff822f2670 t sienna_cichlid_get_dpm_ultimate_freq +ffffffff822f2690 t sienna_cichlid_get_gpu_metrics +ffffffff822f2b10 t sienna_cichlid_enable_mgpu_fan_boost +ffffffff822f2b60 t sienna_cichlid_get_fan_parameters +ffffffff822f2ba0 t sienna_cichlid_gpo_control +ffffffff822f2c50 t sienna_cichlid_get_ecc_info +ffffffff822f2d40 t sienna_cichlid_stb_get_data_direct +ffffffff822f2de0 t sienna_cichlid_get_default_config_table_settings +ffffffff822f2e50 t sienna_cichlid_set_config_table +ffffffff822f2f20 t sienna_cichlid_get_smu_metrics_data +ffffffff822f3360 t sienna_cichlid_get_throttler_status_locked +ffffffff822f34c0 t sienna_cichlid_get_smartshift_power_percentage +ffffffff822f35f0 t sienna_cichlid_i2c_xfer +ffffffff822f38a0 t sienna_cichlid_i2c_func +ffffffff822f4000 T smu_v11_0_init_microcode +ffffffff822f42a0 T smu_v11_0_fini_microcode +ffffffff822f4320 T smu_v11_0_load_microcode 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smu_v11_0_set_power_limit +ffffffff822f5920 T smu_v11_0_interrupt_work +ffffffff822f59a0 T smu_v11_0_enable_thermal_alert +ffffffff822f5a40 T smu_v11_0_disable_thermal_alert +ffffffff822f5a60 T smu_v11_0_get_gfx_vdd +ffffffff822f5b20 T smu_v11_0_display_clock_voltage_request +ffffffff822f5c60 T smu_v11_0_set_hard_freq_limited_range +ffffffff822f5d40 T smu_v11_0_gfx_off_control +ffffffff822f5db0 T smu_v11_0_get_fan_control_mode +ffffffff822f5e00 T smu_v11_0_set_fan_speed_pwm +ffffffff822f5fa0 t smu_v11_0_set_fan_static_mode +ffffffff822f6150 T smu_v11_0_set_fan_speed_rpm +ffffffff822f6270 T smu_v11_0_get_fan_speed_pwm +ffffffff822f63b0 T smu_v11_0_get_fan_speed_rpm +ffffffff822f64b0 T smu_v11_0_set_fan_control_mode +ffffffff822f6650 T smu_v11_0_set_xgmi_pstate +ffffffff822f6670 T smu_v11_0_register_irq_handler +ffffffff822f6730 T smu_v11_0_get_max_sustainable_clocks_by_dc +ffffffff822f67c0 T smu_v11_0_set_azalia_d3_pme +ffffffff822f67e0 T smu_v11_0_baco_set_armd3_sequence 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smu_v11_0_gfx_ulv_control +ffffffff822f79d0 T smu_v11_0_deep_sleep_control +ffffffff822f7b80 T smu_v11_0_restore_user_od_settings +ffffffff822f7c10 T smu_v11_0_set_smu_mailbox_registers +ffffffff822f7c80 t smu_v11_0_set_irq_state +ffffffff822f8200 t smu_v11_0_irq_process +ffffffff822f84e0 t orderly_poweroff +ffffffff822f9000 T vangogh_set_ppt_funcs +ffffffff822f9040 t vangogh_set_default_dpm_tables +ffffffff822f9070 t vangogh_common_print_clk_levels +ffffffff822f94d0 t vangogh_force_clk_levels +ffffffff822f9700 t vangogh_od_edit_dpm_table +ffffffff822f9c30 t vangogh_get_power_profile_mode +ffffffff822f9d00 t vangogh_set_power_profile_mode +ffffffff822f9e20 t vangogh_dpm_set_vcn_enable +ffffffff822f9e70 t vangogh_dpm_set_jpeg_enable +ffffffff822f9ec0 t vangogh_read_sensor +ffffffff822f9ff0 t vangogh_is_dpm_running +ffffffff822fa050 t vangogh_set_watermarks_table +ffffffff822fa1e0 t vangogh_set_performance_level +ffffffff822fab10 t vangogh_get_power_limit +ffffffff822fac90 t vangogh_get_ppt_limit +ffffffff822fad00 t vangogh_get_dpm_clock_table +ffffffff822fae70 t vangogh_init_smc_tables +ffffffff822fb0c0 t vangogh_system_features_control +ffffffff822fb110 t vangogh_set_power_limit +ffffffff822fb270 t vangogh_get_gfxoff_status +ffffffff822fb300 t vangogh_get_gfxoff_entrycount +ffffffff822fb370 t vangogh_set_gfxoff_residency +ffffffff822fb3e0 t vangogh_get_gfxoff_residency +ffffffff822fb420 t vangogh_mode2_reset +ffffffff822fb560 t vangogh_common_get_gpu_metrics +ffffffff822fbbb0 t vangogh_post_smu_init +ffffffff822fbd50 t vangogh_set_fine_grain_gfx_freq_parameters +ffffffff822fbdc0 t vangogh_common_get_smu_metrics_data +ffffffff822fc110 t vangogh_force_dpm_limit_value +ffffffff822fc250 t vangogh_get_dpm_ultimate_freq +ffffffff822fc610 t vangogh_set_soft_freq_limited_range +ffffffff822fd000 T renoir_set_ppt_funcs +ffffffff822fd0a0 t renoir_get_current_power_state +ffffffff822fd120 t renoir_print_clk_levels +ffffffff822fd620 t renoir_force_clk_levels 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T smu_v12_0_get_gfxoff_status +ffffffff82300240 T smu_v12_0_gfx_off_control +ffffffff82300360 T smu_v12_0_fini_smc_tables +ffffffff82300410 T smu_v12_0_set_default_dpm_tables +ffffffff82300440 T smu_v12_0_mode2_reset +ffffffff82300460 T smu_v12_0_set_soft_freq_limited_range +ffffffff823005a0 T smu_v12_0_set_driver_table_location +ffffffff82300610 T smu_v12_0_get_vbios_bootup_values +ffffffff82301000 T aldebaran_set_ppt_funcs +ffffffff82301040 t aldebaran_get_allowed_feature_mask +ffffffff82301090 t aldebaran_set_default_dpm_table +ffffffff82301290 t aldebaran_populate_umd_state_clk +ffffffff82301390 t aldebaran_print_clk_levels +ffffffff82301550 t aldebaran_force_clk_levels +ffffffff82301700 t aldebaran_usr_edit_dpm_table +ffffffff82301920 t aldebaran_read_sensor +ffffffff82301bc0 t aldebaran_is_dpm_running +ffffffff82301c10 t aldebaran_get_thermal_temperature_range +ffffffff82301ce0 t aldebaran_set_performance_level +ffffffff82301d90 t aldebaran_get_power_limit +ffffffff82301f20 t aldebaran_set_df_cstate +ffffffff82301fa0 t aldebaran_allow_xgmi_power_down +ffffffff82302040 t aldebaran_i2c_control_init +ffffffff82302100 t aldebaran_i2c_control_fini +ffffffff82302140 t aldebaran_get_unique_id +ffffffff82302220 t aldebaran_init_smc_tables +ffffffff823023b0 t aldebaran_set_mp1_state +ffffffff823023f0 t aldebaran_setup_pptable +ffffffff823024c0 t aldebaran_system_features_control +ffffffff82302620 t aldebaran_set_power_limit +ffffffff823026b0 t aldebaran_is_baco_supported +ffffffff823026e0 t aldebaran_is_mode1_reset_supported +ffffffff82302710 t aldebaran_is_mode2_reset_supported +ffffffff82302740 t aldebaran_mode1_reset +ffffffff82302820 t aldebaran_mode2_reset +ffffffff823029d0 t aldebaran_set_soft_freq_limited_range +ffffffff82302bd0 t aldebaran_log_thermal_throttling_event +ffffffff82302ee0 t aldebaran_get_gpu_metrics +ffffffff82303170 t aldebaran_smu_handle_passthrough_sbr +ffffffff82303190 t aldebaran_smu_send_hbm_bad_page_num +ffffffff82303210 t aldebaran_get_ecc_info +ffffffff82303370 t aldebaran_send_hbm_bad_channel_flag +ffffffff82303450 t aldebaran_get_current_clk_freq_by_table +ffffffff82303590 t aldebaran_get_smu_metrics_data +ffffffff823037e0 t aldebaran_upload_dpm_level +ffffffff823038d0 t aldebaran_i2c_xfer +ffffffff82303b80 t aldebaran_i2c_func +ffffffff82304000 T smu_v13_0_init_microcode +ffffffff823041d0 T smu_v13_0_fini_microcode +ffffffff82304250 T smu_v13_0_load_microcode +ffffffff82304280 T smu_v13_0_init_pptable_microcode +ffffffff82304430 T smu_v13_0_get_pptable_from_firmware +ffffffff82304550 T smu_v13_0_check_fw_status +ffffffff823045c0 T smu_v13_0_check_fw_version +ffffffff823046f0 T smu_v13_0_setup_pptable +ffffffff82304890 T smu_v13_0_init_smc_tables +ffffffff823049e0 T smu_v13_0_fini_smc_tables +ffffffff82304bd0 T smu_v13_0_init_power +ffffffff82304c50 T smu_v13_0_fini_power +ffffffff82304cd0 T smu_v13_0_get_vbios_bootup_values +ffffffff82304f60 T smu_v13_0_notify_memory_pool_location +ffffffff82305020 T smu_v13_0_set_min_deep_sleep_dcefclk +ffffffff823050a0 T smu_v13_0_set_driver_table_location +ffffffff82305110 T smu_v13_0_set_tool_table_location +ffffffff82305180 T smu_v13_0_init_display_count +ffffffff823051c0 T smu_v13_0_set_allowed_mask +ffffffff82305290 T smu_v13_0_gfx_off_control +ffffffff82305300 T smu_v13_0_system_features_control +ffffffff82305320 T smu_v13_0_notify_display_change +ffffffff82305390 T smu_v13_0_init_max_sustainable_clocks +ffffffff823055f0 t smu_v13_0_get_max_sustainable_clock +ffffffff82305710 T smu_v13_0_get_current_power_limit +ffffffff823057e0 T smu_v13_0_set_power_limit +ffffffff823058f0 T smu_v13_0_enable_thermal_alert +ffffffff82305980 T smu_v13_0_disable_thermal_alert +ffffffff823059c0 T smu_v13_0_get_gfx_vdd +ffffffff82305a80 T smu_v13_0_display_clock_voltage_request +ffffffff82305bc0 T smu_v13_0_set_hard_freq_limited_range +ffffffff82305ca0 T smu_v13_0_get_fan_control_mode +ffffffff82305cf0 T smu_v13_0_set_fan_speed_pwm +ffffffff82305f00 t smu_v13_0_set_fan_static_mode +ffffffff823060c0 T smu_v13_0_set_fan_control_mode +ffffffff82306220 T smu_v13_0_set_fan_speed_rpm +ffffffff823063c0 T smu_v13_0_set_xgmi_pstate +ffffffff823063e0 T smu_v13_0_register_irq_handler +ffffffff823064b0 T smu_v13_0_get_max_sustainable_clocks_by_dc +ffffffff82306540 T smu_v13_0_set_azalia_d3_pme +ffffffff82306560 T smu_v13_0_wait_for_event +ffffffff823065c0 T smu_v13_0_get_dpm_ultimate_freq +ffffffff82306720 T smu_v13_0_set_soft_freq_limited_range +ffffffff82306800 T smu_v13_0_set_performance_level +ffffffff82306f90 T smu_v13_0_set_power_source +ffffffff82306ff0 T smu_v13_0_set_single_dpm_table +ffffffff82307270 T smu_v13_0_get_dpm_level_range +ffffffff823073f0 T smu_v13_0_get_current_pcie_link_width_level +ffffffff82307440 T smu_v13_0_get_current_pcie_link_width +ffffffff823074a0 T smu_v13_0_get_current_pcie_link_speed_level +ffffffff823074f0 T smu_v13_0_get_current_pcie_link_speed +ffffffff82307540 T smu_v13_0_set_vcn_enable +ffffffff823075f0 T smu_v13_0_set_jpeg_enable +ffffffff82307610 T smu_v13_0_run_btc +ffffffff82307690 T smu_v13_0_gpo_control +ffffffff82307720 T smu_v13_0_deep_sleep_control +ffffffff82307980 T smu_v13_0_gfx_ulv_control +ffffffff823079f0 T smu_v13_0_baco_set_armd3_sequence +ffffffff82307a10 T smu_v13_0_baco_is_support +ffffffff82307aa0 T smu_v13_0_baco_get_state +ffffffff82307ad0 T smu_v13_0_baco_set_state +ffffffff82307b90 T smu_v13_0_baco_enter +ffffffff82307ca0 T smu_v13_0_baco_exit +ffffffff82307d40 T smu_v13_0_set_gfx_power_up_by_imu +ffffffff82307d80 T smu_v13_0_od_edit_dpm_table +ffffffff82308030 T smu_v13_0_set_default_dpm_tables +ffffffff82308060 T smu_v13_0_set_smu_mailbox_registers +ffffffff823080d0 T smu_v13_0_mode1_reset +ffffffff82308150 T smu_v13_0_update_pcie_parameters +ffffffff823083b0 t smu_v13_0_set_irq_state +ffffffff82308930 t smu_v13_0_irq_process +ffffffff82308df0 t orderly_poweroff +ffffffff82309000 T smu_v13_0_0_set_ppt_funcs +ffffffff823090e0 t smu_v13_0_0_get_allowed_feature_mask +ffffffff82309220 t smu_v13_0_0_set_default_dpm_table +ffffffff82309650 t smu_v13_0_0_populate_umd_state_clk +ffffffff82309780 t smu_v13_0_0_print_clk_levels +ffffffff823098a0 t smu_v13_0_0_force_clk_levels +ffffffff82309a20 t smu_v13_0_0_get_power_profile_mode +ffffffff82309c80 t smu_v13_0_0_set_power_profile_mode +ffffffff82309f80 t smu_v13_0_0_read_sensor +ffffffff8230a1a0 t smu_v13_0_0_is_dpm_running +ffffffff8230a1f0 t smu_v13_0_0_get_fan_speed_pwm +ffffffff8230a2d0 t smu_v13_0_0_get_fan_speed_rpm +ffffffff8230a340 t smu_v13_0_0_get_thermal_temperature_range +ffffffff8230a450 t smu_v13_0_0_dump_pptable +ffffffff8230a480 t smu_v13_0_0_get_power_limit +ffffffff8230a560 t smu_v13_0_0_set_df_cstate +ffffffff8230a580 t smu_v13_0_0_i2c_control_init +ffffffff8230a6b0 t smu_v13_0_0_i2c_control_fini +ffffffff8230a6f0 t smu_v13_0_0_get_unique_id +ffffffff8230a7a0 t smu_v13_0_0_init_smc_tables +ffffffff8230a990 t smu_v13_0_0_set_mp1_state +ffffffff8230a9d0 t smu_v13_0_0_setup_pptable +ffffffff8230ab10 t smu_v13_0_0_system_features_control +ffffffff8230ab20 t smu_v13_0_0_baco_enter +ffffffff8230ab70 t smu_v13_0_0_baco_exit +ffffffff8230abd0 t smu_v13_0_0_is_mode1_reset_supported +ffffffff8230ac30 t smu_v13_0_0_mode1_reset +ffffffff8230acc0 t smu_v13_0_0_get_dpm_ultimate_freq +ffffffff8230ade0 t smu_v13_0_0_get_gpu_metrics +ffffffff8230b200 t smu_v13_0_0_enable_mgpu_fan_boost +ffffffff8230b250 t smu_v13_0_0_smu_send_bad_mem_page_num +ffffffff8230b2d0 t smu_v13_0_0_send_bad_mem_channel_flag +ffffffff8230b350 t smu_v13_0_0_get_smu_metrics_data +ffffffff8230b6c0 t smu_v13_0_get_throttler_status +ffffffff8230b880 t smu_v13_0_0_i2c_xfer +ffffffff8230bb30 t smu_v13_0_0_i2c_func +ffffffff8230c000 T smu_v13_0_4_set_ppt_funcs +ffffffff8230c0b0 t smu_v13_0_4_print_clk_levels +ffffffff8230c170 t smu_v13_0_4_force_clk_levels +ffffffff8230c410 t smu_v13_0_4_read_sensor +ffffffff8230c6c0 t smu_v13_0_4_is_dpm_running +ffffffff8230c710 t smu_v13_0_4_set_watermarks_table +ffffffff8230c8a0 t smu_v13_0_4_set_performance_level +ffffffff8230cde0 t smu_v13_0_4_init_smc_tables +ffffffff8230cf50 t smu_v13_0_4_fini_smc_tables +ffffffff8230d000 t smu_v13_0_4_system_features_control +ffffffff8230d050 t smu_v13_0_4_mode2_reset +ffffffff8230d070 t smu_v13_0_4_get_dpm_ultimate_freq +ffffffff8230d490 t smu_v13_0_4_get_gpu_metrics +ffffffff8230d660 t smu_v13_0_4_set_fine_grain_gfx_freq_parameters +ffffffff8230d6c0 t smu_v13_0_4_get_smu_metrics_data +ffffffff8230e000 T smu_v13_0_5_set_ppt_funcs +ffffffff8230e090 t smu_v13_0_5_set_default_dpm_tables +ffffffff8230e0c0 t smu_v13_0_5_print_clk_levels +ffffffff8230e170 t smu_v13_0_5_force_clk_levels +ffffffff8230e2d0 t smu_v13_0_5_od_edit_dpm_table +ffffffff8230e580 t smu_v13_0_5_dpm_set_vcn_enable +ffffffff8230e5a0 t smu_v13_0_5_dpm_set_jpeg_enable +ffffffff8230e5c0 t smu_v13_0_5_read_sensor +ffffffff8230e7e0 t smu_v13_0_5_is_dpm_running +ffffffff8230e830 t smu_v13_0_5_set_watermarks_table +ffffffff8230e9c0 t smu_v13_0_5_set_performance_level +ffffffff8230eba0 t smu_v13_0_5_init_smc_tables +ffffffff8230ed10 t smu_v13_0_5_fini_smc_tables +ffffffff8230edc0 t smu_v13_0_5_system_features_control +ffffffff8230ee10 t smu_v13_0_5_mode2_reset +ffffffff8230ee90 t smu_v13_0_5_get_dpm_ultimate_freq +ffffffff8230f2d0 t smu_v13_0_5_get_gpu_metrics +ffffffff8230f410 t smu_v13_0_5_set_fine_grain_gfx_freq_parameters +ffffffff8230f470 t smu_v13_0_5_get_smu_metrics_data +ffffffff82310000 T smu_v13_0_7_set_ppt_funcs +ffffffff82310050 t smu_v13_0_7_get_allowed_feature_mask +ffffffff823101c0 t smu_v13_0_7_set_default_dpm_table +ffffffff823105f0 t smu_v13_0_7_populate_umd_state_clk +ffffffff82310720 t smu_v13_0_7_print_clk_levels +ffffffff82310840 t smu_v13_0_7_force_clk_levels +ffffffff823109c0 t smu_v13_0_7_get_power_profile_mode +ffffffff82310ca0 t smu_v13_0_7_set_power_profile_mode +ffffffff82310ee0 t smu_v13_0_7_read_sensor +ffffffff823110f0 t smu_v13_0_7_is_dpm_running +ffffffff82311140 t smu_v13_0_7_get_fan_speed_pwm +ffffffff82311220 t smu_v13_0_7_get_fan_speed_rpm +ffffffff82311290 t smu_v13_0_7_get_thermal_temperature_range +ffffffff823113a0 t smu_v13_0_7_dump_pptable +ffffffff823113d0 t smu_v13_0_7_get_power_limit +ffffffff823114b0 t smu_v13_0_7_set_df_cstate +ffffffff823114d0 t smu_v13_0_7_init_smc_tables +ffffffff823116c0 t smu_v13_0_7_check_fw_status +ffffffff82311710 t smu_v13_0_7_set_mp1_state +ffffffff82311750 t smu_v13_0_7_setup_pptable +ffffffff823118b0 t smu_v13_0_7_baco_enter +ffffffff82311900 t smu_v13_0_7_baco_exit +ffffffff82311960 t smu_v13_0_7_is_mode1_reset_supported +ffffffff823119a0 t smu_v13_0_7_get_dpm_ultimate_freq +ffffffff82311ac0 t smu_v13_0_7_get_gpu_metrics +ffffffff82311ed0 t smu_v13_0_7_enable_mgpu_fan_boost +ffffffff82311f20 t smu_v13_0_7_get_smu_metrics_data +ffffffff82312270 t smu_v13_0_7_get_throttler_status +ffffffff82313000 T yellow_carp_set_ppt_funcs +ffffffff82313040 t yellow_carp_set_default_dpm_tables +ffffffff82313070 t yellow_carp_print_clk_levels +ffffffff82313130 t yellow_carp_force_clk_levels +ffffffff823133d0 t yellow_carp_od_edit_dpm_table +ffffffff82313680 t yellow_carp_dpm_set_vcn_enable +ffffffff823136a0 t yellow_carp_dpm_set_jpeg_enable +ffffffff823136c0 t yellow_carp_read_sensor +ffffffff82313a60 t yellow_carp_is_dpm_running +ffffffff82313ab0 t yellow_carp_set_watermarks_table +ffffffff82313c40 t yellow_carp_set_performance_level +ffffffff82314180 t yellow_carp_init_smc_tables +ffffffff823142f0 t yellow_carp_fini_smc_tables +ffffffff823143a0 t yellow_carp_system_features_control +ffffffff823143f0 t yellow_carp_get_gfxoff_status +ffffffff82314480 t yellow_carp_mode2_reset +ffffffff82314500 t yellow_carp_get_dpm_ultimate_freq +ffffffff82314950 t yellow_carp_get_gpu_metrics +ffffffff82314b10 t yellow_carp_post_smu_init +ffffffff82314b90 t yellow_carp_set_fine_grain_gfx_freq_parameters +ffffffff82314bf0 t yellow_carp_get_smu_metrics_data +ffffffff82315000 T smu_cmn_send_msg_without_waiting +ffffffff82315170 T smu_cmn_wait_for_response +ffffffff823152b0 T smu_cmn_send_smc_msg_with_param +ffffffff823155d0 T smu_cmn_to_asic_specific_index +ffffffff823156e0 t __smu_cmn_reg_print_error +ffffffff82315920 T smu_cmn_send_smc_msg +ffffffff82315940 T smu_cmn_send_debug_smc_msg +ffffffff823159c0 T smu_cmn_feature_is_supported +ffffffff82315a70 T smu_cmn_feature_is_enabled +ffffffff82315b60 T smu_cmn_clk_dpm_is_enabled +ffffffff82315c60 T smu_cmn_get_enabled_mask +ffffffff82315d50 T smu_cmn_get_indep_throttler_status +ffffffff82315e00 T smu_cmn_feature_update_enable_state +ffffffff82315ea0 T smu_cmn_feature_set_enabled +ffffffff82315f70 T smu_cmn_get_pp_feature_mask +ffffffff82316120 T smu_cmn_set_pp_feature_mask +ffffffff82316220 T smu_cmn_disable_all_features_with_exception +ffffffff823162d0 T smu_cmn_get_smc_version +ffffffff823163a0 T smu_cmn_update_table +ffffffff82316500 T smu_cmn_write_watermarks_table +ffffffff823165d0 T smu_cmn_write_pptable +ffffffff82316690 T smu_cmn_get_metrics_table +ffffffff823167f0 T smu_cmn_get_combo_pptable +ffffffff823168c0 T smu_cmn_init_soft_gpu_metrics +ffffffff823169a0 T smu_cmn_set_mp1_state +ffffffff82316a40 T smu_cmn_is_audio_func_enabled +ffffffff82317000 T pci_mcfg_init +ffffffff82317050 T pci_lookup_segment +ffffffff823170b0 T pci_attach_hook +ffffffff823170e0 T pci_bus_maxdevs +ffffffff82317110 T pci_make_tag +ffffffff82317180 T pci_decompose_tag +ffffffff823171e0 T pci_conf_size +ffffffff82317240 T pci_mcfg_map_bus +ffffffff823172c0 T pci_conf_read +ffffffff82317410 T pci_conf_write +ffffffff82317550 T pci_msix_table_map +ffffffff82317670 T pci_msix_table_unmap +ffffffff82317710 T msi_hwmask +ffffffff82317740 T msi_hwunmask +ffffffff82317770 T msi_addroute +ffffffff82317870 T msi_delroute +ffffffff823178e0 T pci_intr_map_msi +ffffffff82317960 T msix_hwmask +ffffffff82317990 T msix_hwunmask +ffffffff823179c0 T msix_addroute +ffffffff82317bb0 T msix_delroute +ffffffff82317d10 T pci_intr_map_msix +ffffffff82317de0 T pci_intr_map +ffffffff82318000 T pci_intr_string +ffffffff823180e0 T pci_intr_establish +ffffffff82318130 T pci_intr_establish_cpu +ffffffff82318290 T pci_intr_disestablish +ffffffff823182b0 T pci_init_extents +ffffffff82318490 T pci_probe_device_hook +ffffffff823184d0 T pci_dev_postattach +ffffffff823184e0 T pci_min_powerstate +ffffffff823184f0 T pci_set_powerstate_md +ffffffff82319000 T pciide_machdep_compat_intr_establish +ffffffff82319060 T pciide_machdep_compat_intr_disestablish +ffffffff8231a000 T vga_post_init +ffffffff8231a310 t vm86_emu_inb +ffffffff8231a360 t vm86_emu_inw +ffffffff8231a3a0 t vm86_emu_inl +ffffffff8231a3e0 t vm86_emu_outb +ffffffff8231a430 t vm86_emu_outw +ffffffff8231a470 t vm86_emu_outl +ffffffff8231a4b0 T vga_post_call +ffffffff8231a520 T vga_post_free +ffffffff8231a590 T ddb_vgapost +ffffffff8231b000 T pchbmatch +ffffffff8231b040 T pchbattach +ffffffff8231b4b0 T pchbactivate +ffffffff8231b520 T pchb_amd64ht_attach +ffffffff8231b670 T pchb_rnd +ffffffff8231b6f0 T pchb_print +ffffffff8231c000 T amas_match +ffffffff8231c050 T amas_attach +ffffffff8231c0b0 T amas_intl_nodes +ffffffff8231c140 T amas_get_pagerange +ffffffff8231d000 T agp_flush_cache +ffffffff8231d030 T agp_flush_cache_range +ffffffff8231d040 T agp_init_map +ffffffff8231d110 T agp_destroy_map +ffffffff8231d150 T agp_map_subregion +ffffffff8231d180 T agp_unmap_subregion +ffffffff8231d1b0 T agp_map_atomic +ffffffff8231d1e0 T agp_unmap_atomic +ffffffff8231e000 T cardslotmatch +ffffffff8231e050 T cardslotattach +ffffffff8231e2a0 T cardslot_event +ffffffff8231e300 T cardslot_cb_print +ffffffff8231e350 T cardslot_16_print +ffffffff8231e3a0 T cardslot_16_submatch +ffffffff8231e3f0 T cardslot_event_throw +ffffffff8231e490 T cardslot_process_event +ffffffff8231f000 T cardbusmatch +ffffffff8231f050 T cardbusattach +ffffffff8231f130 T cardbus_read_tuples +ffffffff8231f4e0 T parse_tuple +ffffffff8231f760 T cardbus_attach_card +ffffffff8231fee0 T enable_function +ffffffff8231ff80 T decode_tuples +ffffffff82320050 T cardbusprint +ffffffff82320140 T cardbussubmatch +ffffffff823201a0 T disable_function +ffffffff82320200 T cardbus_detach_card +ffffffff823202e0 T cardbus_intr_establish +ffffffff82320310 T cardbus_intr_disestablish +ffffffff82320330 T cardbus_function_enable +ffffffff82320410 T cardbus_function_disable +ffffffff82320470 T cardbus_matchbyid +ffffffff823204e0 T decode_tuple +ffffffff82321000 T cardbus_mapreg_map +ffffffff823211b0 T cardbus_mapreg_unmap +ffffffff82322000 T cardbus_read_exrom +ffffffff82323000 T rbus_space_alloc +ffffffff82323060 T rbus_space_alloc_subregion +ffffffff82323240 T rbus_space_free +ffffffff823232d0 T rbus_new_body +ffffffff82323360 T rbus_new_root_delegate +ffffffff82323430 T rbus_new_root_share +ffffffff82324000 T com_cardbus_match +ffffffff82324070 T com_cardbus_attach +ffffffff82324220 T com_cardbus_detach +ffffffff823242c0 T com_cardbus_find_csdev +ffffffff82324440 T com_cardbus_gofigure +ffffffff82324900 T com_cardbus_enable +ffffffff823249d0 T com_cardbus_disable +ffffffff82324a20 T com_cardbus_setup +ffffffff82325000 T xl_cardbus_match +ffffffff82325090 T xl_cardbus_attach +ffffffff82325420 T xl_cardbus_detach +ffffffff823254e0 T xl_cardbus_lookup +ffffffff823255a0 T xl_cardbus_intr_ack +ffffffff82326000 T dc_cardbus_match +ffffffff82326030 T dc_cardbus_attach +ffffffff823263c0 T dc_cardbus_detach +ffffffff82326460 T dc_cardbus_setup +ffffffff82327000 T fxp_cardbus_match +ffffffff82327030 T fxp_cardbus_attach +ffffffff82327240 T fxp_cardbus_detach +ffffffff823272d0 T fxp_cardbus_setup +ffffffff82328000 t rl_cardbus_match +ffffffff82328030 t rl_cardbus_attach +ffffffff823281d0 t rl_cardbus_detach +ffffffff82328290 T rl_cardbus_setup +ffffffff82329000 T re_cardbus_probe +ffffffff82329030 T re_cardbus_attach +ffffffff82329230 T re_cardbus_detach +ffffffff82329310 T re_cardbus_setup +ffffffff8232a000 T ath_cardbus_match +ffffffff8232a050 T ath_cardbus_attach +ffffffff8232a180 T ath_cardbus_detach +ffffffff8232a250 T ath_cardbus_enable +ffffffff8232a320 T ath_cardbus_disable +ffffffff8232a370 T ath_cardbus_power +ffffffff8232a3b0 T ath_cardbus_setup +ffffffff8232b000 T athn_cardbus_match +ffffffff8232b030 T athn_cardbus_attach +ffffffff8232b170 T athn_cardbus_detach +ffffffff8232b210 T athn_cardbus_enable +ffffffff8232b2e0 T athn_cardbus_disable +ffffffff8232b330 T athn_cardbus_power +ffffffff8232b370 T athn_cardbus_read +ffffffff8232b3a0 T athn_cardbus_write +ffffffff8232b3d0 T athn_cardbus_write_barrier +ffffffff8232b400 T athn_cardbus_setup +ffffffff8232c000 T atw_cardbus_match +ffffffff8232c030 T atw_cardbus_attach +ffffffff8232c220 T atw_cardbus_detach +ffffffff8232c2e0 T atw_cardbus_enable +ffffffff8232c3b0 T atw_cardbus_disable +ffffffff8232c400 T atw_cardbus_power +ffffffff8232c440 T atw_cardbus_setup +ffffffff8232d000 T rtw_cardbus_match +ffffffff8232d030 T rtw_cardbus_attach +ffffffff8232d280 T rtw_cardbus_detach +ffffffff8232d3a0 T rtw_cardbus_intr_ack +ffffffff8232d3c0 T rtw_cardbus_funcregen +ffffffff8232d420 T rtw_cardbus_enable +ffffffff8232d580 T rtw_cardbus_disable +ffffffff8232d660 T rtw_cardbus_power +ffffffff8232d6a0 T rtw_cardbus_setup +ffffffff8232e000 T ral_cardbus_match +ffffffff8232e030 T ral_cardbus_attach +ffffffff8232e230 T ral_cardbus_detach +ffffffff8232e2e0 T ral_cardbus_activate +ffffffff8232e370 T ral_cardbus_enable +ffffffff8232e4d0 T ral_cardbus_disable +ffffffff8232e520 T ral_cardbus_setup +ffffffff8232e5c0 T ral_cardbus_wakeup +ffffffff8232f000 T acx_cardbus_match +ffffffff8232f030 T acx_cardbus_attach +ffffffff8232f260 T acx_cardbus_detach +ffffffff8232f380 T acx_cardbus_enable +ffffffff8232f450 T acx_cardbus_disable +ffffffff8232f4a0 T acx_cardbus_power +ffffffff8232f4e0 T acx_cardbus_setup +ffffffff82330000 T pgt_cardbus_match +ffffffff82330030 T pgt_cardbus_attach +ffffffff82330230 T pgt_cardbus_detach +ffffffff823302e0 T pgt_cardbus_enable +ffffffff82330440 T pgt_cardbus_disable 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wsemul_vt100_init +ffffffff8238db20 T wsemul_vt100_reset +ffffffff8238dc40 T wsemul_vt100_nextline +ffffffff8238dcd0 T wsemul_vt100_output_normal +ffffffff8238df10 T wsemul_vt100_output_c0c1 +ffffffff8238e190 T wsemul_vt100_jump_scroll +ffffffff8238f000 T wsemul_vt100_scrollup +ffffffff8238f150 T wsemul_vt100_scrolldown +ffffffff8238f2a0 T wsemul_vt100_ed +ffffffff8238f510 T wsemul_vt100_el +ffffffff8238f600 T wsemul_vt100_handle_csi +ffffffff82390590 T vt100_ansimode +ffffffff82390600 T vt100_decmode +ffffffff82390730 T vt100_selectattribute +ffffffff82390870 T wsemul_vt100_handle_dcs +ffffffff82391000 T vt100_initchartables +ffffffff82391200 T vt100_setnrc +ffffffff82392000 T wsemul_vt100_translate +ffffffff82393000 T pckbdprobe +ffffffff82393140 T pckbdattach +ffffffff82393320 T pckbdactivate +ffffffff823933b0 T pckbd_enable +ffffffff82393500 T pckbd_set_leds +ffffffff82393590 T pckbd_ioctl +ffffffff823936e0 T pckbd_cngetc +ffffffff823938d0 T pckbd_cnpollc +ffffffff82393970 T pckbd_cnbell +ffffffff823939c0 T pckbd_set_xtscancode +ffffffff82393b40 T pckbd_init +ffffffff82393ba0 T pckbd_input +ffffffff82393e20 T pckbd_scancode_translate +ffffffff82393f00 T pckbd_bell +ffffffff82393f50 T pckbd_hookup_bell +ffffffff82393f90 T pckbd_cnattach +ffffffff82395000 T pmsprobe +ffffffff823950a0 T pmsattach +ffffffff82395280 T pmsactivate +ffffffff823952e0 T pms_enable +ffffffff82395350 T pms_ioctl +ffffffff823953a0 T pms_disable +ffffffff823953e0 T pms_sec_enable +ffffffff82395450 T pms_sec_ioctl +ffffffff823954a0 T pms_sec_disable +ffffffff823954e0 T pms_ioctl_mouse +ffffffff82395600 T pms_sync_mouse +ffffffff82395660 T pms_proc_mouse +ffffffff82395700 T pms_enable_synaptics +ffffffff82395b30 T pms_ioctl_synaptics +ffffffff82395c00 T pms_sync_synaptics +ffffffff82395c60 T pms_proc_synaptics +ffffffff82395fb0 T pms_disable_synaptics +ffffffff82396090 T pms_enable_alps +ffffffff82396b10 T pms_ioctl_alps +ffffffff82396bc0 T pms_sync_alps +ffffffff82396c60 T pms_proc_alps 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hidms_wacom_setup +ffffffff823a56c0 T hidms_setup +ffffffff823a5c90 T hidms_attach +ffffffff823a5de0 T hidms_detach +ffffffff823a5e20 T hidms_input +ffffffff823a60d0 T hidms_enable +ffffffff823a6120 T hidms_ioctl +ffffffff823a62f0 T hidms_disable +ffffffff823a7000 T hidmt_get_resolution +ffffffff823a7110 T hidmt_setup +ffffffff823a7740 T hidmt_set_input_mode +ffffffff823a77d0 T hidmt_configure +ffffffff823a7870 T hidmt_attach +ffffffff823a7980 T hidmt_detach +ffffffff823a79c0 T hidmt_input +ffffffff823a7eb0 T hidmt_enable +ffffffff823a7ef0 T hidmt_ioctl +ffffffff823a7fc0 T hidmt_disable +ffffffff823a8000 T hidcc_match +ffffffff823a80e0 T hidcc_attach +ffffffff823a8290 T hidcc_parse +ffffffff823a8630 T hidcc_attach_wskbd +ffffffff823a86e0 T hidcc_detach +ffffffff823a8790 T hidcc_intr +ffffffff823a8b60 T hidcc_intr_slice +ffffffff823a8c50 T hidcc_setbits +ffffffff823a8e90 T hidcc_rawinput +ffffffff823a8f30 T hidcc_input +ffffffff823a8f90 T hidcc_bits_to_int +ffffffff823a90c0 T hidcc_usage_to_sym +ffffffff823a92d0 T hidcc_bit_to_sym +ffffffff823a9320 T hidcc_enable +ffffffff823a9340 T hidcc_set_leds +ffffffff823a9370 T hidcc_ioctl +ffffffff823a93e0 T hidcc_is_array +ffffffff823a9430 T hidcc_parse_array +ffffffff823a9540 T hidcc_add_key_volume +ffffffff823a9660 T hidcc_add_key +ffffffff823a9730 T hidcc_bits_to_volume +ffffffff823aa000 T usb_match +ffffffff823aa030 T usb_attach +ffffffff823aa330 T usb_detach +ffffffff823aa3e0 T usb_activate +ffffffff823aa500 T usb_create_task_threads +ffffffff823aa5a0 T usb_explore +ffffffff823aa740 T usb_attach_roothub +ffffffff823aa7e0 T usb_needs_explore +ffffffff823aa830 T usb_detach_roothub +ffffffff823aa920 T usb_wait_task +ffffffff823aa9c0 T usb_abort_task_thread +ffffffff823aaab0 T usb_task_thread +ffffffff823aabd0 T usb_add_task +ffffffff823aacf0 T usb_rem_task +ffffffff823aadb0 T usb_rem_wait_task +ffffffff823aaec0 T usbctlprint +ffffffff823aaf10 T usbopen +ffffffff823aaf80 T usbclose +ffffffff823aafb0 T usb_fill_udc_task +ffffffff823ab050 T usb_fill_udf_task +ffffffff823ab0c0 T usbioctl +ffffffff823ab670 T usb_needs_reattach +ffffffff823ab6c0 T usb_schedsoftintr +ffffffff823ab790 T usb_tap +ffffffff823ac000 T usbd_is_dying +ffffffff823ac040 T usbd_deactivate +ffffffff823ac070 T usbd_ref_incr +ffffffff823ac0a0 T usbd_ref_decr +ffffffff823ac0e0 T usbd_ref_wait +ffffffff823ac160 T usbd_get_devcnt +ffffffff823ac190 T usbd_claim_iface +ffffffff823ac1d0 T usbd_iface_claimed +ffffffff823ac210 T usbd_open_pipe +ffffffff823ac300 T usbd_open_pipe_ival +ffffffff823ac3f0 T usbd_open_pipe_intr +ffffffff823ac640 T usbd_alloc_xfer +ffffffff823ac6c0 T usbd_setup_xfer +ffffffff823ac730 T usbd_transfer +ffffffff823ac9c0 T usbd_free_xfer +ffffffff823aca40 T usbd_close_pipe +ffffffff823acbb0 T usbd_abort_pipe +ffffffff823acc20 T usb_transfer_complete +ffffffff823acea0 T usbd_dopoll +ffffffff823acec0 T usbd_alloc_buffer +ffffffff823acf50 T usbd_free_buffer +ffffffff823acf90 T usbd_setup_default_xfer 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usbd_get_string_desc +ffffffff823b0130 T usbd_get_string +ffffffff823b0320 T usbd_cache_devinfo +ffffffff823b0680 T usbd_printBCD +ffffffff823b0710 T usbd_devinfo +ffffffff823b08b0 T usb_delay_ms +ffffffff823b0910 T usbd_delay_ms +ffffffff823b09d0 T usbd_port_disown_to_1_1 +ffffffff823b0af0 T usbd_reset_port +ffffffff823b0cb0 T usbd_find_idesc +ffffffff823b0d60 T usbd_find_edesc +ffffffff823b0e70 T usbd_fill_iface_data +ffffffff823b10e0 T usbd_parse_idesc +ffffffff823b1200 T usbd_free_iface_data +ffffffff823b1270 T usbd_set_config +ffffffff823b12c0 T usbd_set_config_no +ffffffff823b1390 T usbd_set_config_index +ffffffff823b1850 T usbd_setup_pipe +ffffffff823b1940 T usbd_set_address +ffffffff823b1a00 T usbd_getnewaddr +ffffffff823b1a90 T usbd_probe_and_attach +ffffffff823b2010 T usbd_print +ffffffff823b2120 T usbd_new_device +ffffffff823b29a0 T usbd_reload_device_desc +ffffffff823b2a10 T usb_free_device +ffffffff823b2b80 T usbd_fill_deviceinfo +ffffffff823b2ee0 T usbd_get_routestring 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athn_usb_next_scan +ffffffff8249fe70 T athn_usb_rx_enable +ffffffff8249fee0 T athn_usb_intr +ffffffff824a0070 T athn_usb_alloc_rx_list +ffffffff824a0120 T athn_usb_alloc_tx_list +ffffffff824a0210 T athn_usb_do_async +ffffffff824a0330 T athn_usb_htc_msg +ffffffff824a03c0 T athn_usb_htc_connect_svc +ffffffff824a0590 T athn_usb_wmi_xcmd +ffffffff824a07c0 T athn_usb_read_rom +ffffffff824a0920 T athn_usb_stop +ffffffff824a0c30 T athn_usb_init +ffffffff824a1080 T athn_usb_newstate_cb +ffffffff824a1380 T athn_usb_remove_node +ffffffff824a1480 T athn_usb_switch_chan +ffffffff824a1660 T athn_usb_create_node +ffffffff824a18d0 T athn_usb_newassoc_cb +ffffffff824a1a60 T athn_usb_node_set_rates +ffffffff824a1b90 T athn_usb_count_active_sta +ffffffff824a1be0 T athn_usb_newauth_cb +ffffffff824a1cc0 T athn_usb_node_free_cb +ffffffff824a1d80 T athn_usb_ampdu_tx_start +ffffffff824a1e90 T athn_usb_ampdu_tx_start_cb +ffffffff824a1ef0 T athn_usb_ampdu_tx_stop +ffffffff824a1fd0 T athn_usb_ampdu_tx_stop_cb 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acpivout_get_param +ffffffff8251b4e0 T acpivout_set_param +ffffffff8251b650 T acpivout_select_brightness +ffffffff8251b720 T acpivout_find_brightness +ffffffff8251b7b0 T acpivout_set_brightness +ffffffff8251c000 T acpipwrres_match +ffffffff8251c070 T acpipwrres_attach +ffffffff8251c2b0 T acpipwrres_foundcons +ffffffff8251c440 T acpipwrres_ref_incr +ffffffff8251c4d0 T acpipwrres_hascons +ffffffff8251c520 T acpipwrres_ref_decr +ffffffff8251c5b0 T acpipwrres_addcons +ffffffff8251d000 T aibs_match +ffffffff8251d030 T aibs_attach +ffffffff8251d140 T aibs_probe +ffffffff8251d2a0 T aibs_attach_new +ffffffff8251d3c0 T aibs_attach_sif +ffffffff8251d590 T aibs_notify +ffffffff8251d600 T aibs_add_sensor +ffffffff8251d850 T aibs_getpack +ffffffff8251d8d0 T aibs_refresh +ffffffff8251d930 T aibs_refresh_r +ffffffff8251da70 T aibs_getvalue +ffffffff8251dbc0 T aibs_find_cb +ffffffff8251e000 T aplgpio_match +ffffffff8251e060 T aplgpio_attach +ffffffff8251e300 T aplgpio_intr +ffffffff8251e440 T aplgpio_read_pin +ffffffff8251e490 T aplgpio_write_pin +ffffffff8251e500 T aplgpio_intr_establish +ffffffff8251e620 T aplgpio_intr_enable +ffffffff8251e6b0 T aplgpio_intr_disable +ffffffff8251f000 T bytgpio_match +ffffffff8251f060 T bytgpio_attach +ffffffff8251f320 T bytgpio_intr +ffffffff8251f450 T bytgpio_read_pin +ffffffff8251f4b0 T bytgpio_write_pin +ffffffff8251f530 T bytgpio_intr_establish +ffffffff8251f5a0 T bytgpio_intr_enable +ffffffff8251f690 T bytgpio_intr_disable +ffffffff82520000 T chvgpio_match +ffffffff82520060 T chvgpio_attach +ffffffff82520300 T chvgpio_intr +ffffffff825203d0 T chvgpio_read_pin +ffffffff82520480 T chvgpio_write_pin +ffffffff82520540 T chvgpio_intr_establish +ffffffff82520710 T chvgpio_intr_enable +ffffffff825207e0 T chvgpio_intr_disable +ffffffff825208b0 T chvgpio_opreg_handler +ffffffff82520940 T chvgpio_check_pin +ffffffff82521000 T glkgpio_match +ffffffff82521060 T glkgpio_attach +ffffffff82521300 T glkgpio_intr +ffffffff82521440 T glkgpio_read_pin +ffffffff825214a0 T glkgpio_write_pin +ffffffff82521510 T glkgpio_intr_establish +ffffffff82521630 T glkgpio_intr_enable +ffffffff825216c0 T glkgpio_intr_disable +ffffffff82522000 T pchgpio_match +ffffffff82522060 T pchgpio_attach +ffffffff825224b0 T pchgpio_activate +ffffffff82522560 T pchgpio_intr +ffffffff82522780 T pchgpio_read_pin +ffffffff82522870 T pchgpio_write_pin +ffffffff82522980 T pchgpio_intr_establish +ffffffff82522bb0 T pchgpio_intr_enable +ffffffff82522cf0 T pchgpio_intr_disable +ffffffff82522e30 T pchgpio_save +ffffffff82522ea0 T pchgpio_restore +ffffffff82522f10 T pchgpio_find_group +ffffffff82522f90 T pchgpio_intr_handle +ffffffff82523070 T pchgpio_save_pin +ffffffff82523240 T pchgpio_restore_pin +ffffffff82524000 T tipmic_match +ffffffff82524050 T tipmic_attach +ffffffff82524250 T tipmic_write_1 +ffffffff82524310 T tipmic_intr +ffffffff82524470 T tipmic_get_lpat +ffffffff825245a0 T tipmic_read_pin +ffffffff825245d0 T tipmic_write_pin +ffffffff82524600 T tipmic_thermal_opreg_handler +ffffffff82524e70 T tipmic_power_opreg_handler +ffffffff82525110 T tipmic_read_1 +ffffffff825251d0 T tipmic_raw_to_temp +ffffffff82526000 T ccpmic_match +ffffffff82526050 T ccpmic_attach +ffffffff82526130 T ccpmic_get_lpat +ffffffff82526250 T ccpmic_read_pin +ffffffff825263d0 T ccpmic_write_pin +ffffffff82526530 T ccpmic_thermal_opreg_handler +ffffffff82526770 T ccpmic_power_opreg_handler +ffffffff82526960 T ccpmic_read_1 +ffffffff82526a20 T ccpmic_write_1 +ffffffff82526ae0 T ccpmic_raw_to_temp +ffffffff82527000 T com_acpi_match +ffffffff82527120 T com_acpi_attach +ffffffff825273a0 T com_acpi_is_designware +ffffffff82527400 T com_acpi_intr_designware +ffffffff82527430 T com_acpi_is_console +ffffffff82528000 T sdhc_acpi_match +ffffffff82528060 T sdhc_acpi_attach +ffffffff82528360 T sdhc_acpi_parse_resources +ffffffff82528420 T sdhc_acpi_card_detect_gpio +ffffffff82528480 T sdhc_acpi_card_detect_intr +ffffffff825284c0 T sdhc_acpi_power_on +ffffffff82528540 T sdhc_acpi_explore +ffffffff82528570 T sdhc_acpi_card_detect_nonremovable +ffffffff825285a0 T sdhc_acpi_do_explore +ffffffff82529000 T dwiic_acpi_match +ffffffff82529050 T dwiic_acpi_attach +ffffffff82529410 T dwiic_acpi_parse_crs +ffffffff82529540 T dwiic_acpi_power +ffffffff82529650 T dwiic_acpi_get_params +ffffffff82529790 T dwiic_i2c_intr_establish +ffffffff82529810 T dwiic_i2c_intr_disestablish +ffffffff82529830 T dwiic_i2c_intr_string +ffffffff825298c0 T dwiic_acpi_acquire_bus +ffffffff82529910 T dwiic_acpi_release_bus +ffffffff82529940 T dwiic_acpi_bus_scan +ffffffff82529980 T dwiic_acpi_found_hid +ffffffff82529e40 T dwiic_matchhids +ffffffff82529ed0 T dwiic_acpi_found_ihidev +ffffffff8252a150 T dwiic_acpi_found_iatp +ffffffff8252a2b0 T dwiic_acpi_found_ietp +ffffffff8252b000 T acpicbkbd_match +ffffffff8252b030 T acpicbkbd_attach +ffffffff8252b0d0 T acpicbkbd_activate +ffffffff8252b120 T acpicbkbd_get_backlight +ffffffff8252b1a0 T acpicbkbd_set_backlight +ffffffff8252b240 T acpicbkbd_write_backlight +ffffffff8252c000 T acpials_match +ffffffff8252c090 T acpials_attach +ffffffff8252c230 T acpials_read +ffffffff8252c2b0 T acpials_addtask +ffffffff8252c2f0 T acpials_notify +ffffffff8252c380 T acpials_update +ffffffff8252d000 T tpm_match +ffffffff8252d050 T tpm_attach +ffffffff8252d320 T tpm_activate +ffffffff8252d430 T tpm2_start_method +ffffffff8252d4b0 T tpm_probe +ffffffff8252d560 T tpm_init_tis +ffffffff8252d7d0 T tpm_init_crb +ffffffff8252db10 T tpm_suspend +ffffffff8252dc00 T tpm_resume +ffffffff8252dc30 T tpm_write_tis +ffffffff8252dfb0 T tpm_read_tis +ffffffff8252e190 T tpm_write_crb +ffffffff8252e5a0 T tpm_read_crb +ffffffff8252e8a0 T tpm_request_locality_tis +ffffffff8252e990 T tpm_request_locality_crb +ffffffff8252ea90 T tpm_release_locality_crb +ffffffff8252eae0 T tpm_release_locality_tis +ffffffff8252eb50 T tpm_getburst +ffffffff8252ec00 T tpm_status +ffffffff8252ec20 T tpm_waitfor +ffffffff8252ed00 T tpm_waitfor_status +ffffffff8252f000 T acpihve_match +ffffffff8252f0b0 T acpihve_attach +ffffffff82530000 T acpisbs_match +ffffffff82530030 T acpisbs_attach +ffffffff825302a0 T acpisbs_activate +ffffffff82530380 T acpisbs_read +ffffffff82530440 T acpisbs_setup_sensors +ffffffff82530560 T acpisbs_refresh_sensors +ffffffff825306d0 T acpisbs_notify +ffffffff82530810 T acpi_smbus_read +ffffffff82531000 T surface_match +ffffffff82531060 T surface_attach +ffffffff825310c0 T surface_hotkey +ffffffff82532000 T ipmi_acpi_match +ffffffff82532030 T ipmi_acpi_attach +ffffffff82532260 T ipmi_acpi_parse_crs +ffffffff82533000 T amdgpio_match +ffffffff82533060 T amdgpio_attach +ffffffff825332a0 T amdgpio_activate +ffffffff82533390 T amdgpio_intr +ffffffff82533530 T amdgpio_read_pin +ffffffff82533580 T amdgpio_write_pin +ffffffff825335f0 T amdgpio_intr_establish +ffffffff825336e0 T amdgpio_intr_enable +ffffffff82533760 T amdgpio_intr_disable +ffffffff825337e0 T amdgpio_save +ffffffff82533860 T amdgpio_restore +ffffffff825338f0 T amdgpio_save_pin +ffffffff82533960 T amdgpio_restore_pin +ffffffff825339d0 T amdgpio_pin_intr +ffffffff82534000 T acpihid_match +ffffffff82534030 T acpihid_attach +ffffffff82534210 T acpihid_init_dsm +ffffffff82534370 T acpihid_eval +ffffffff82534590 T acpihid_notify +ffffffff825345f0 T acpihid_button_array_enable +ffffffff82535000 t iosf_acpi_match +ffffffff82535050 t iosf_acpi_attach +ffffffff82535140 t iosf_acpi_mbi_mdr_rd +ffffffff825351b0 t iosf_acpi_mbi_mdr_wr +ffffffff82536000 T acpi_match +ffffffff82536060 T acpi_attach +ffffffff825360a0 T acpi_probe +ffffffff82536240 T acpi_map +ffffffff82536330 T acpi_unmap +ffffffff82536380 T acpi_bus_space_map +ffffffff825363a0 T acpi_bus_space_unmap +ffffffff825363c0 T acpi_intr_establish +ffffffff82536510 T acpi_intr_disestablish +ffffffff82536520 T acpi_scan +ffffffff825366d0 T acpi_acquire_glk +ffffffff82536730 T acpi_release_glk +ffffffff82536780 T acpi_attach_machdep +ffffffff82536910 T acpi_sleep_cpu +ffffffff82536ab0 T acpi_resume_cpu +ffffffff82536bb0 T sleep_mp +ffffffff82536cb0 T resume_mp +ffffffff82536da0 T acpi_iommu_device_map +ffffffff82537000 T hibernate_resume_machdep +ffffffff82537050 T hibernate_drop_to_real_mode +ffffffff82537060 T hibernate_activate_resume_pt_machdep +ffffffff825370a0 T hibernate_switch_stack_machdep +ffffffff825370e0 T hibernate_flush +ffffffff82537110 T acpi_savecpu +ffffffff82538000 T sleep_showstate +ffffffff82538100 T sleep_setstate +ffffffff82538160 T gosleep +ffffffff82538220 T sleep_abort +ffffffff82538250 T sleep_resume +ffffffff825382c0 T suspend_finish +ffffffff82539000 T acpiopen +ffffffff825390d0 T acpiclose +ffffffff82539160 T acpiioctl +ffffffff825392d0 T request_sleep +ffffffff82539350 T acpi_filtdetach +ffffffff825393a0 T acpi_filtread +ffffffff825393e0 T acpikqfilter +ffffffff8253a000 T acpipci_match +ffffffff8253a030 T acpipci_attach +ffffffff8253a2f0 T acpipci_osc +ffffffff8253a430 T acpipci_parse_resources +ffffffff8253a540 T acpipci_attach_bus +ffffffff8253a710 T acpipci_print +ffffffff8253a780 T acpipci_attach_busses +ffffffff8253b000 T efiopen +ffffffff8253b040 T eficlose +ffffffff8253b070 T efiioctl +ffffffff8253b110 T efiioc_get_table +ffffffff8253b270 T efiioc_var_get +ffffffff8253b4f0 T efiioc_var_next +ffffffff8253b710 T efiioc_var_set +ffffffff8253b9c0 T efi_adapt_error +ffffffff8253c000 T efi_match +ffffffff8253c060 T efi_attach +ffffffff8253c330 T efi_map_runtime +ffffffff8253c4b0 T efi_enter +ffffffff8253c550 T efi_leave +ffffffff8253c5d0 T efi_fault +ffffffff8253d000 T vmm_probe +ffffffff8253d050 T vmm_attach +ffffffff8253d170 T vmm_activate +ffffffff8253d2b0 T vmmopen +ffffffff8253d300 T vmmclose +ffffffff8253d330 T vm_find +ffffffff8253d450 T vmmioctl +ffffffff8253d6d0 T vm_create +ffffffff8253da80 T vm_get_info +ffffffff8253dcd0 T vm_terminate +ffffffff8253de40 T vm_resetcpu +ffffffff8253df60 T vm_share_mem +ffffffff8253e0b0 T pledge_ioctl_vmm +ffffffff8253e1a0 T vm_find_vcpu +ffffffff8253e200 T vm_create_check_mem_ranges +ffffffff8253e360 T vm_teardown +ffffffff8253e490 T vcpu_must_stop +ffffffff8253f000 T vmm_enabled +ffffffff8253f090 T vmm_attach_machdep +ffffffff8253f250 T vmm_quiesce_vmx +ffffffff8253f420 T vmm_activate_machdep +ffffffff8253f540 T vmm_stop +ffffffff8253f680 T vmm_start +ffffffff8253f760 T vmmioctl_machdep +ffffffff8253f830 T vm_intr_pending +ffffffff8253f8d0 T vm_mprotect_ept +ffffffff8253fb70 T pledge_ioctl_vmm_machdep +ffffffff8253fbc0 T vm_rwvmparams +ffffffff8253fd50 T vmm_init_pvclock +ffffffff8253fe30 T vm_rwregs +ffffffff8253ff40 T vcpu_readregs_vmx +ffffffff82540370 T vcpu_writeregs_vmx +ffffffff825407e0 T vcpu_readregs_svm +ffffffff82540c90 T vcpu_writeregs_svm +ffffffff82541160 T vmm_get_guest_memtype +ffffffff825411e0 T vmx_mprotect_ept +ffffffff82541460 T vmx_pmap_find_pte_ept +ffffffff82541530 T start_vmm_on_cpu +ffffffff82541610 T stop_vmm_on_cpu +ffffffff825416b0 T vmclear_on_cpu +ffffffff82541730 T vm_impl_init_vmx +ffffffff82541850 T vm_impl_init_svm +ffffffff82541970 T vm_impl_init +ffffffff82541a10 T vm_impl_deinit +ffffffff82541a40 T vcpu_reload_vmcs_vmx +ffffffff82541b80 T vcpu_reset_regs_svm +ffffffff82541f10 T svm_setmsrbrw +ffffffff82542080 T svm_setmsrbr +ffffffff82542150 T vmm_alloc_vpid +ffffffff82542260 T svm_setmsrbw +ffffffff82542340 T vmx_setmsrbr +ffffffff825423f0 T vmx_setmsrbw +ffffffff825424a0 T vmx_setmsrbrw +ffffffff825425b0 T svm_set_clean +ffffffff82542600 T svm_set_dirty +ffffffff82542650 T vcpu_reset_regs_vmx +ffffffff82543200 T vcpu_vmx_check_cap +ffffffff82543300 T vcpu_vmx_compute_ctrl +ffffffff825434e0 T vcpu_init_vmx +ffffffff82543880 T vcpu_deinit_vmx +ffffffff82543a00 T vcpu_reset_regs +ffffffff82543a40 T vcpu_init_svm +ffffffff82543bd0 T vcpu_deinit_svm +ffffffff82543d10 T vcpu_init +ffffffff82543dd0 T vmm_free_vpid +ffffffff82543e40 T vcpu_deinit +ffffffff82543e80 T vm_run +ffffffff82544030 T vcpu_run_vmx +ffffffff825447c0 T vcpu_run_svm +ffffffff82544da0 T vmm_fpurestore +ffffffff82544e60 T vmm_fpusave +ffffffff82544ee0 T vmm_translate_gva +ffffffff82545200 T vmm_update_pvclock +ffffffff82545300 T vmx_get_exit_info +ffffffff82545360 T vmx_handle_exit +ffffffff825457a0 T vmx_instruction_error_decode +ffffffff82545970 T vmm_get_guest_cpu_cpl +ffffffff82545a60 T vmx_handle_intr +ffffffff82545af0 T svm_handle_hlt +ffffffff82545b40 T vmx_handle_hlt +ffffffff82545bf0 T svm_handle_exit +ffffffff82545f10 T svm_handle_np_fault +ffffffff825460b0 T vmm_handle_cpuid +ffffffff82546740 T svm_handle_msr +ffffffff82546a00 T svm_handle_xsetbv +ffffffff82546aa0 T svm_handle_inout +ffffffff82546bc0 T vmm_inject_ud +ffffffff82546bf0 T vmm_inject_db +ffffffff82546c20 T vmx_handle_np_fault +ffffffff82546da0 T vmx_handle_inout +ffffffff82546f40 T vmx_handle_cr +ffffffff825471b0 T vmx_handle_rdmsr +ffffffff82547280 T vmx_handle_wrmsr +ffffffff825474e0 T vmx_handle_xsetbv +ffffffff825475b0 T vmm_inject_gp +ffffffff825475e0 T vmx_get_exit_qualification +ffffffff82547640 T vmx_get_guest_faulttype +ffffffff825476e0 T svm_get_guest_faulttype +ffffffff82547710 T svm_fault_page +ffffffff825477a0 T vmx_fault_page +ffffffff82547900 T vmm_get_guest_cpu_mode +ffffffff82547a00 T vmx_load_pdptes +ffffffff82547c80 T vmx_handle_cr0_write +ffffffff82547e90 T vmx_handle_cr4_write +ffffffff82547f30 T vmm_handle_xsetbv +ffffffff82547fc0 T vmx_handle_misc_enable_msr +ffffffff82548020 T vmm_pat_is_valid +ffffffff82548100 T vmm_gpa_is_valid +ffffffff82548170 T vmx_exit_reason_decode +ffffffff825481b0 T svm_exit_reason_decode +ffffffff82548fc0 T vcpu_state_decode +ffffffff82549000 T vmm_dispatch_intr +ffffffff82549020 T vmxon +ffffffff82549050 T vmxoff +ffffffff82549080 T vmclear +ffffffff825490b0 T vmptrld +ffffffff825490e0 T vmptrst +ffffffff82549110 T vmwrite +ffffffff82549140 T vmread +ffffffff82549170 T invvpid +ffffffff825491a0 T invept +ffffffff825491d0 T vmx_enter_guest +ffffffff825491fb t skip_init +ffffffff825492c8 t no_l1df_msr +ffffffff825492cb t l1df_tlb_loop +ffffffff825492e4 t l1df_tlb_done +ffffffff825492ec t l1df_load_cache +ffffffff82549303 t done_flush +ffffffff82549396 t do_resume +ffffffff8254941b t fail_launch_or_resume +ffffffff8254945d t fail_launch_unknown +ffffffff8254946a t fail_launch_invalid_vmcs +ffffffff82549477 t fail_launch_valid_vmcs +ffffffff82549494 t vmx_exit_handler_asm +ffffffff82549559 t restore_host +ffffffff825495f0 T svm_enter_guest +ffffffff82549780 t restore_host_svm +ffffffff8254a000 T sdmmc_match +ffffffff8254a050 T sdmmc_attach +ffffffff8254a390 T sdmmc_detach +ffffffff8254a440 T sdmmc_activate +ffffffff8254a510 T sdmmc_discover_task +ffffffff8254a5d0 T sdmmc_create_thread +ffffffff8254a640 T sdmmc_holds_root_device +ffffffff8254a6a0 T sdmmc_task_thread +ffffffff8254a890 T sdmmc_needs_discover +ffffffff8254a940 T sdmmc_del_task +ffffffff8254a9f0 T sdmmc_card_detach +ffffffff8254aad0 T sdmmc_add_task +ffffffff8254ab50 T sdmmc_card_attach +ffffffff8254ac60 T sdmmc_enable +ffffffff8254adb0 T sdmmc_scan +ffffffff8254ae40 T sdmmc_init +ffffffff8254af40 T sdmmc_disable +ffffffff8254b0a0 T sdmmc_function_free +ffffffff8254b0c0 T sdmmc_delay +ffffffff8254b110 T sdmmc_select_card +ffffffff8254b290 T sdmmc_set_bus_power +ffffffff8254b450 T sdmmc_function_alloc +ffffffff8254b4e0 T sdmmc_app_command +ffffffff8254b670 T sdmmc_mmc_command +ffffffff8254b6f0 T sdmmc_go_idle_state +ffffffff8254b810 T sdmmc_send_if_cond +ffffffff8254b960 T sdmmc_set_relative_addr +ffffffff8254c000 T sdmmc_cisptr +ffffffff8254c0a0 T sdmmc_read_cis +ffffffff8254c3b0 T sdmmc_print_cis +ffffffff8254c520 T sdmmc_check_cis_quirks +ffffffff8254d000 T sdmmc_io_enable +ffffffff8254d2a0 T sdmmc_io_reset +ffffffff8254d3d0 T sdmmc_io_send_op_cond +ffffffff8254d540 T sdmmc_io_scan +ffffffff8254d690 T sdmmc_io_init +ffffffff8254d7c0 T sdmmc_io_set_highspeed +ffffffff8254da70 T sdmmc_io_set_bus_width +ffffffff8254dd00 T sdmmc_io_function_ready +ffffffff8254de80 T sdmmc_io_read_1 +ffffffff8254dfd0 T sdmmc_io_function_enable +ffffffff8254e3a0 T sdmmc_io_write_1 +ffffffff8254e520 T sdmmc_io_function_disable +ffffffff8254e7a0 T sdmmc_io_attach +ffffffff8254e890 T sdmmc_print +ffffffff8254eae0 T sdmmc_submatch +ffffffff8254eb60 T sdmmc_io_detach +ffffffff8254ec10 T sdmmc_io_rw_direct +ffffffff8254edb0 T sdmmc_io_rw_extended_subr +ffffffff8254ef50 T sdmmc_io_rw_extended +ffffffff8254f340 T sdmmc_io_read_2 +ffffffff8254f4a0 T sdmmc_io_write_2 +ffffffff8254f600 T sdmmc_io_read_4 +ffffffff8254f760 T sdmmc_io_write_4 +ffffffff8254f8c0 T sdmmc_io_read_multi_1 +ffffffff8254f9b0 T sdmmc_io_write_multi_1 +ffffffff8254faa0 T sdmmc_io_read_region_1 +ffffffff8254fb90 T sdmmc_io_write_region_1 +ffffffff8254fc80 T sdmmc_io_xchg +ffffffff8254fe10 T sdmmc_intr_enable +ffffffff82550080 T sdmmc_intr_disable +ffffffff825502f0 T sdmmc_intr_establish +ffffffff825503f0 T sdmmc_intr_disestablish +ffffffff825504e0 T sdmmc_card_intr +ffffffff82550530 T sdmmc_intr_task +ffffffff825505c0 T sdmmc_io_set_blocklen +ffffffff82551000 T sdmmc_mem_enable +ffffffff825514e0 T sdmmc_mem_send_op_cond +ffffffff82551690 T sdmmc_mem_signal_voltage +ffffffff82551750 T sdmmc_mem_scan +ffffffff82551a60 T sdmmc_decode_csd +ffffffff82551e70 T sdmmc_decode_cid +ffffffff825522b0 T sdmmc_mem_send_scr +ffffffff825523f0 T sdmmc_mem_decode_scr +ffffffff82552470 T sdmmc_mem_send_cxd_data +ffffffff825525e0 T sdmmc_mem_set_bus_width +ffffffff82552700 T sdmmc_mem_sd_switch +ffffffff825529b0 T sdmmc_be512_to_bitfield512 +ffffffff82552a60 T sdmmc_mem_mmc_switch +ffffffff82552b50 T sdmmc_mem_init +ffffffff82552ca0 T sdmmc_mem_set_blocklen +ffffffff82552da0 T sdmmc_mem_sd_init +ffffffff82553350 T sdmmc_mem_mmc_init +ffffffff82553c70 T sdmmc_mem_select_transfer_mode +ffffffff82553cf0 T sdmmc_mem_execute_tuning +ffffffff82553d80 T sdmmc_mem_read_block_subr +ffffffff825540e0 T sdmmc_mem_single_read_block +ffffffff825541b0 T sdmmc_mem_read_block +ffffffff82554370 T sdmmc_mem_write_block_subr +ffffffff825546c0 T sdmmc_mem_single_write_block +ffffffff82554790 T sdmmc_mem_write_block +ffffffff82554950 T sdmmc_mem_hibernate_write +ffffffff82555000 T sdmmc_scsi_cmd +ffffffff825551f0 T sdmmc_minphys +ffffffff82555270 T sdmmc_scsi_attach +ffffffff82555460 T sdmmc_alloc_ccbs +ffffffff825555a0 T sdmmc_free_ccbs +ffffffff82555600 T sdmmc_scsi_detach +ffffffff82555760 T sdmmc_stimeout +ffffffff825557e0 T sdmmc_ccb_alloc +ffffffff82555890 T sdmmc_ccb_free +ffffffff82555970 T sdmmc_inquiry +ffffffff82555be0 T sdmmc_start_xs +ffffffff82555cd0 T sdmmc_complete_xs +ffffffff82555da0 T sdmmc_done_xs +ffffffff82555df0 T sdmmc_scsi_hibernate_io +ffffffff82556000 T bwfm_sdio_preinit +ffffffff825564f0 T bwfm_sdio_txcheck +ffffffff82556530 T bwfm_sdio_txdata +ffffffff825565a0 T bwfm_sdio_txctl +ffffffff825566f0 T bwfm_sdio_buscore_read +ffffffff82556700 T bwfm_sdio_buscore_write +ffffffff82556720 T bwfm_sdio_buscore_prepare +ffffffff82556860 T bwfm_sdio_buscore_activate +ffffffff825568e0 T bwfm_sdio_match +ffffffff825569b0 T bwfm_sdio_attach +ffffffff82556c70 T bwfm_sdio_detach +ffffffff82556cd0 T bwfm_sdio_task +ffffffff82556e30 T bwfm_sdio_write_1 +ffffffff82556e60 T bwfm_sdio_read_1 +ffffffff82556e90 T bwfm_sdio_write_4 +ffffffff82556f40 T bwfm_sdio_read_4 +ffffffff82556ff0 T bwfm_sdio_load_microcode +ffffffff82557250 T bwfm_sdio_clkctl +ffffffff82557380 T bwfm_sdio_dev_write +ffffffff825573d0 T bwfm_sdio_intr +ffffffff82557410 T bwfm_sdio_ram_read_write +ffffffff82557640 T bwfm_sdio_htclk +ffffffff825578a0 T bwfm_sdio_readshared +ffffffff82557970 T bwfm_sdio_dev_read +ffffffff825579b0 T bwfm_sdio_rx_frames +ffffffff82557d40 T bwfm_sdio_tx_frames +ffffffff82557e20 T bwfm_sdio_backplane +ffffffff82557ed0 T bwfm_sdio_buf_read +ffffffff82557fb0 T bwfm_sdio_buf_write +ffffffff82558060 T bwfm_sdio_frame_read_write +ffffffff825581e0 T bwfm_sdio_newbuf +ffffffff82558260 T bwfm_sdio_tx_ok +ffffffff825582b0 T bwfm_sdio_tx_ctrlframe +ffffffff825583b0 T bwfm_sdio_tx_dataframe +ffffffff82558500 T bwfm_sdio_rx_glom +ffffffff82559000 T onewire_match +ffffffff82559050 T onewire_attach +ffffffff825590f0 T onewire_detach +ffffffff82559160 T onewire_activate +ffffffff82559180 T onewire_scan +ffffffff82559390 T onewire_createthread +ffffffff82559400 T onewire_print +ffffffff825594d0 T onewirebus_print +ffffffff82559520 T onewire_lock +ffffffff82559540 T onewire_unlock +ffffffff82559560 T onewire_reset +ffffffff82559580 T onewire_bit +ffffffff825595a0 T onewire_read_byte +ffffffff825596e0 T onewire_write_byte +ffffffff825597c0 T onewire_read_block +ffffffff82559860 T onewire_write_block +ffffffff82559900 T onewire_triplet +ffffffff825599e0 T onewire_matchrom +ffffffff82559b30 T onewire_search +ffffffff82559ec0 T onewire_thread +ffffffff8255a000 T onewire_crc +ffffffff8255a0e0 T onewire_crc16 +ffffffff8255a1c0 T onewire_famname +ffffffff8255a200 T onewire_matchbyfam +ffffffff8255b000 T owid_match +ffffffff8255b030 T owid_attach +ffffffff8255b100 T owid_detach +ffffffff8255b140 T owid_activate +ffffffff8255c000 T owsbm_match +ffffffff8255c030 T owsbm_attach +ffffffff8255c1d0 T owsbm_detach +ffffffff8255c240 T owsbm_activate +ffffffff8255c270 T owsbm_update +ffffffff8255d000 T owtemp_match +ffffffff8255d030 T owtemp_attach +ffffffff8255d130 T owtemp_detach +ffffffff8255d1a0 T owtemp_activate +ffffffff8255d1d0 T owtemp_update +ffffffff8255e000 T owctr_match +ffffffff8255e030 T owctr_attach +ffffffff8255e180 T owctr_detach +ffffffff8255e1f0 T owctr_activate +ffffffff8255e220 T owctr_update +ffffffff8255e250 T owctr_update_counter +ffffffff8255f000 A __text_page_start +ffffffff8255f000 T Xsyscall_meltdown +ffffffff8255f00c T Xsyscall +ffffffff8255f26e t Xsyscall_trampback +ffffffff8255f280 T intr_user_exit +ffffffff8255f2c2 t intr_user_exit_post_ast +ffffffff8255f3ee t Xiretq_trampback +ffffffff8255f3fa T doreti_iret +ffffffff82560000 T alltraps +ffffffff82560138 T recall_trap +ffffffff82560150 T alltraps_kern +ffffffff82560153 T alltraps_kern_meltdown +ffffffff82561000 ? Xsyscall32 +ffffffff82561000 A __kutext_start +ffffffff82561000 A __text_page_end +ffffffff82562000 ? Xtrap00 +ffffffff82562010 ? Xtrap01 +ffffffff82562020 ? Xtrap02 +ffffffff82562028 c calltrap_specstk +ffffffff825620f0 ? calltrap_specstk_tramp +ffffffff82562110 ? Xtrap03 +ffffffff82562120 ? Xtrap04 +ffffffff82562130 ? Xtrap05 +ffffffff82562140 ? Xtrap06 +ffffffff82562150 ? Xtrap07 +ffffffff82562160 ? Xtrap08 +ffffffff82562170 ? Xtrap09 +ffffffff82562180 ? Xtrap0a +ffffffff82562190 ? Xtrap0b +ffffffff825621a0 ? Xtrap0c +ffffffff825621b0 ? Xtrap0d +ffffffff82562240 ? Xtrap0e +ffffffff82562250 ? Xintrspurious +ffffffff82562250 ? Xtrap0f +ffffffff82562260 ? Xtrap10 +ffffffff82562270 ? Xtrap11 +ffffffff82562280 ? Xtrap12 +ffffffff82562290 ? Xtrap13 +ffffffff825622a0 ? Xtrap14 +ffffffff825622b0 ? Xtrap15 +ffffffff825622c0 ? Xtrap16 +ffffffff825622c0 ? Xtrap17 +ffffffff825622c0 ? Xtrap18 +ffffffff825622c0 ? Xtrap19 +ffffffff825622c0 ? Xtrap1a +ffffffff825622c0 ? Xtrap1b +ffffffff825622c0 ? Xtrap1c +ffffffff825622c0 ? Xtrap1d +ffffffff825622c0 ? Xtrap1e +ffffffff825622c0 ? Xtrap1f +ffffffff825622d0 ? x2apic_eoi +ffffffff825622f0 ? Xintr_lapic_ipi +ffffffff82562330 ? Xipi_invltlb +ffffffff82562360 ? Xipi_invlpg +ffffffff82562390 ? Xipi_invlrange +ffffffff825623d0 ? Xipi_invltlb_pcid +ffffffff82562410 ? Xipi_invlpg_pcid +ffffffff82562460 ? Xipi_invlrange_pcid +ffffffff825624d0 ? Xintr_lapic_ltimer +ffffffff82562510 ? Xintr_xen_upcall +ffffffff82562550 ? Xintr_hyperv_upcall +ffffffff82562590 ? Xintr_legacy0 +ffffffff825625d0 ? Xintr_legacy1 +ffffffff82562610 ? Xintr_legacy2 +ffffffff82562650 ? Xintr_legacy3 +ffffffff82562690 ? Xintr_legacy4 +ffffffff825626d0 ? Xintr_legacy5 +ffffffff82562710 ? Xintr_legacy6 +ffffffff82562750 ? Xintr_legacy7 +ffffffff82562790 ? Xintr_legacy8 +ffffffff825627d0 ? Xintr_legacy9 +ffffffff82562810 ? Xintr_legacy10 +ffffffff82562850 ? Xintr_legacy11 +ffffffff82562890 ? Xintr_legacy12 +ffffffff825628d0 ? Xintr_legacy13 +ffffffff82562910 ? Xintr_legacy14 +ffffffff82562950 ? Xintr_legacy15 +ffffffff82562990 ? Xintr_ioapic_edge0 +ffffffff825629d0 ? Xintr_ioapic_edge1 +ffffffff82562a10 ? Xintr_ioapic_edge2 +ffffffff82562a50 ? Xintr_ioapic_edge3 +ffffffff82562a90 ? Xintr_ioapic_edge4 +ffffffff82562ad0 ? Xintr_ioapic_edge5 +ffffffff82562b10 ? Xintr_ioapic_edge6 +ffffffff82562b50 ? Xintr_ioapic_edge7 +ffffffff82562b90 ? Xintr_ioapic_edge8 +ffffffff82562bd0 ? Xintr_ioapic_edge9 +ffffffff82562c10 ? Xintr_ioapic_edge10 +ffffffff82562c50 ? Xintr_ioapic_edge11 +ffffffff82562c90 ? Xintr_ioapic_edge12 +ffffffff82562cd0 ? Xintr_ioapic_edge13 +ffffffff82562d10 ? Xintr_ioapic_edge14 +ffffffff82562d50 ? Xintr_ioapic_edge15 +ffffffff82562d90 ? Xintr_ioapic_edge16 +ffffffff82562dd0 ? Xintr_ioapic_edge17 +ffffffff82562e10 ? Xintr_ioapic_edge18 +ffffffff82562e50 ? Xintr_ioapic_edge19 +ffffffff82562e90 ? Xintr_ioapic_edge20 +ffffffff82562ed0 ? Xintr_ioapic_edge21 +ffffffff82562f10 ? Xintr_ioapic_edge22 +ffffffff82562f50 ? Xintr_ioapic_edge23 +ffffffff82562f90 ? Xintr_ioapic_edge24 +ffffffff82562fd0 ? Xintr_ioapic_edge25 +ffffffff82563010 ? Xintr_ioapic_edge26 +ffffffff82563050 ? Xintr_ioapic_edge27 +ffffffff82563090 ? Xintr_ioapic_edge28 +ffffffff825630d0 ? Xintr_ioapic_edge29 +ffffffff82563110 ? Xintr_ioapic_edge30 +ffffffff82563150 ? Xintr_ioapic_edge31 +ffffffff82563190 ? Xintr_ioapic_edge32 +ffffffff825631d0 ? Xintr_ioapic_edge33 +ffffffff82563210 ? Xintr_ioapic_edge34 +ffffffff82563250 ? Xintr_ioapic_edge35 +ffffffff82563290 ? Xintr_ioapic_edge36 +ffffffff825632d0 ? Xintr_ioapic_edge37 +ffffffff82563310 ? Xintr_ioapic_edge38 +ffffffff82563350 ? Xintr_ioapic_edge39 +ffffffff82563390 ? Xintr_ioapic_edge40 +ffffffff825633d0 ? Xintr_ioapic_edge41 +ffffffff82563410 ? Xintr_ioapic_edge42 +ffffffff82563450 ? Xintr_ioapic_edge43 +ffffffff82563490 ? Xintr_ioapic_edge44 +ffffffff825634d0 ? Xintr_ioapic_edge45 +ffffffff82563510 ? Xintr_ioapic_edge46 +ffffffff82563550 ? Xintr_ioapic_edge47 +ffffffff82563590 ? Xintr_ioapic_edge48 +ffffffff825635d0 ? Xintr_ioapic_edge49 +ffffffff82563610 ? Xintr_ioapic_edge50 +ffffffff82563650 ? Xintr_ioapic_edge51 +ffffffff82563690 ? Xintr_ioapic_edge52 +ffffffff825636d0 ? Xintr_ioapic_edge53 +ffffffff82563710 ? Xintr_ioapic_edge54 +ffffffff82563750 ? Xintr_ioapic_edge55 +ffffffff82563790 ? Xintr_ioapic_edge56 +ffffffff825637d0 ? Xintr_ioapic_edge57 +ffffffff82563810 ? Xintr_ioapic_edge58 +ffffffff82563850 ? Xintr_ioapic_edge59 +ffffffff82563890 ? Xintr_ioapic_edge60 +ffffffff825638d0 ? Xintr_ioapic_edge61 +ffffffff82563910 ? Xintr_ioapic_edge62 +ffffffff82563950 ? Xintr_ioapic_edge63 +ffffffff82563990 ? Xintr_ioapic_level0 +ffffffff825639d0 ? Xintr_ioapic_level1 +ffffffff82563a10 ? Xintr_ioapic_level2 +ffffffff82563a50 ? Xintr_ioapic_level3 +ffffffff82563a90 ? Xintr_ioapic_level4 +ffffffff82563ad0 ? Xintr_ioapic_level5 +ffffffff82563b10 ? Xintr_ioapic_level6 +ffffffff82563b50 ? Xintr_ioapic_level7 +ffffffff82563b90 ? Xintr_ioapic_level8 +ffffffff82563bd0 ? Xintr_ioapic_level9 +ffffffff82563c10 ? Xintr_ioapic_level10 +ffffffff82563c50 ? Xintr_ioapic_level11 +ffffffff82563c90 ? Xintr_ioapic_level12 +ffffffff82563cd0 ? Xintr_ioapic_level13 +ffffffff82563d10 ? Xintr_ioapic_level14 +ffffffff82563d50 ? Xintr_ioapic_level15 +ffffffff82563d90 ? Xintr_ioapic_level16 +ffffffff82563dd0 ? Xintr_ioapic_level17 +ffffffff82563e10 ? Xintr_ioapic_level18 +ffffffff82563e50 ? Xintr_ioapic_level19 +ffffffff82563e90 ? Xintr_ioapic_level20 +ffffffff82563ed0 ? Xintr_ioapic_level21 +ffffffff82563f10 ? Xintr_ioapic_level22 +ffffffff82563f50 ? Xintr_ioapic_level23 +ffffffff82563f90 ? Xintr_ioapic_level24 +ffffffff82563fd0 ? Xintr_ioapic_level25 +ffffffff82564010 ? Xintr_ioapic_level26 +ffffffff82564050 ? Xintr_ioapic_level27 +ffffffff82564090 ? Xintr_ioapic_level28 +ffffffff825640d0 ? Xintr_ioapic_level29 +ffffffff82564110 ? Xintr_ioapic_level30 +ffffffff82564150 ? Xintr_ioapic_level31 +ffffffff82564190 ? Xintr_ioapic_level32 +ffffffff825641d0 ? Xintr_ioapic_level33 +ffffffff82564210 ? Xintr_ioapic_level34 +ffffffff82564250 ? Xintr_ioapic_level35 +ffffffff82564290 ? Xintr_ioapic_level36 +ffffffff825642d0 ? Xintr_ioapic_level37 +ffffffff82564310 ? Xintr_ioapic_level38 +ffffffff82564350 ? Xintr_ioapic_level39 +ffffffff82564390 ? Xintr_ioapic_level40 +ffffffff825643d0 ? Xintr_ioapic_level41 +ffffffff82564410 ? Xintr_ioapic_level42 +ffffffff82564450 ? Xintr_ioapic_level43 +ffffffff82564490 ? Xintr_ioapic_level44 +ffffffff825644d0 ? Xintr_ioapic_level45 +ffffffff82564510 ? Xintr_ioapic_level46 +ffffffff82564550 ? Xintr_ioapic_level47 +ffffffff82564590 ? Xintr_ioapic_level48 +ffffffff825645d0 ? Xintr_ioapic_level49 +ffffffff82564610 ? Xintr_ioapic_level50 +ffffffff82564650 ? Xintr_ioapic_level51 +ffffffff82564690 ? Xintr_ioapic_level52 +ffffffff825646d0 ? Xintr_ioapic_level53 +ffffffff82564710 ? Xintr_ioapic_level54 +ffffffff82564750 ? Xintr_ioapic_level55 +ffffffff82564790 ? Xintr_ioapic_level56 +ffffffff825647d0 ? Xintr_ioapic_level57 +ffffffff82564810 ? Xintr_ioapic_level58 +ffffffff82564850 ? Xintr_ioapic_level59 +ffffffff82564890 ? Xintr_ioapic_level60 +ffffffff825648d0 ? Xintr_ioapic_level61 +ffffffff82564910 ? Xintr_ioapic_level62 +ffffffff82564950 ? Xintr_ioapic_level63 +ffffffff82565000 ? codepatch_fill_nop +ffffffff82565000 A __cptext_start +ffffffff82565000 A __kutext_end +ffffffff825650b0 ? codepatch_maprw +ffffffff82565190 ? codepatch_unmaprw +ffffffff82565200 ? codepatch_nop +ffffffff82565360 ? codepatch_replace +ffffffff82565510 ? codepatch_call +ffffffff82565530 ? codepatch_jmp +ffffffff82566000 A __cptext_end +ffffffff82566000 A __rodata_start +ffffffff82566000 C _etext +ffffffff82566000 C etext +ffffffff82567000 r seeprom_read +ffffffff82567004 r icl_mg_pll_find_divisors.div1_vals +ffffffff82567028 r gen9bc_tgp_ddc_pin_map +ffffffff82567038 r athn_ac2qid +ffffffff82567038 r athn_ac2qid +ffffffff82567038 r athn_ac2qid +ffffffff82567044 r rtwn_get_rssi.cckoff +ffffffff8256706c r rsu_ac2qid +ffffffff8256707c r pckbc_portcmd +ffffffff82567080 r tht_fifo_write_pad.pad +ffffffff82567088 r rsu_get_rssi.cckoff +ffffffff8256709c r adlp_n_revids +ffffffff825670ec r apple_iso_trans +ffffffff825670f0 r dg2_g12_revid_step_tbl +ffffffff825670f8 r wihap_check_tx.txratetable +ffffffff825670fc r dmamode +ffffffff82567124 r gen9_edram_size_mb.sets +ffffffff82568000 r isomappings +ffffffff82568080 r unimappings +ffffffff82568230 r replacements +ffffffff8256bbf6 r cmd0646_9_tim_udma +ffffffff825bfded r pp_r600_decoded_lanes +ffffffff825db273 r cmd680_setup_channel.udma_tbl +ffffffff825e2f48 r apollo_udma33_tim +ffffffff825e9030 r substchar +ffffffff825eb165 r apollo_udma100_tim +ffffffff82612bd0 r apollo_udma66_tim +ffffffff8261a106 r apollo_pio_rec +ffffffff82629682 r cy_pio_rec +ffffffff82658ec0 r apollo_udma133_tim +ffffffff82665be0 R drm_ca +ffffffff82665c08 R drm_filtops +ffffffff82665c38 R drmread_filtops +ffffffff82666000 r vga_emulops +ffffffff82666048 R vga_stdscreen +ffffffff82666078 R vga_stdscreen_mono +ffffffff826660a8 R vga_stdscreen_bf +ffffffff826660d8 R vga_40lscreen +ffffffff82666108 R vga_40lscreen_mono +ffffffff82666138 R vga_40lscreen_bf +ffffffff82666168 R vga_50lscreen +ffffffff82666198 R vga_50lscreen_mono +ffffffff826661c8 R vga_50lscreen_bf +ffffffff826661f8 R vga_screenlist +ffffffff82666208 R vga_screenlist_mono +ffffffff82666218 R vga_accessops +ffffffff82666278 r i945_wm_info +ffffffff826662b8 r bgansitopc +ffffffff826662c0 r pctoansi +ffffffff82666300 r sdma_offsets +ffffffff82666300 r sdma_offsets +ffffffff82666338 r iha_rate_tbl +ffffffff82666370 r i830_a_wm_info +ffffffff826663a8 r gen9_edram_size_mb.ways +ffffffff82666408 r aggr_periodic_times +ffffffff82666490 r jsl_ehl_revids +ffffffff82666508 r michael_final.pad +ffffffff82666530 r rt_copysa.maskarray +ffffffff82666538 r i915_wm_info +ffffffff82666540 r amdgpu_ih_clientid_jpeg +ffffffff82666540 r amdgpu_ih_clientid_uvds +ffffffff82666540 r amdgpu_ih_clientid_vcns +ffffffff82666540 r amdgpu_ih_clientid_vcns +ffffffff82666540 r amdgpu_ih_clientid_vcns +ffffffff82666578 r vga_setfontset.cmaptabb +ffffffff82666590 r tgl_revids +ffffffff826665e8 r i830_bc_wm_info +ffffffff82666658 r hsw_activate_psr2.map +ffffffff82666690 r __drm_universal_plane_init.default_modifiers +ffffffff826666a0 r iwn_tid2fifo +ffffffff826666b8 r vga_setfontset.cmaptaba +ffffffff826666c0 r crtc_offsets +ffffffff826666c0 r crtc_offsets +ffffffff826666c0 r crtc_offsets +ffffffff826666e0 r link_speed +ffffffff826666e0 r link_speed +ffffffff826666e0 r link_speed +ffffffff82666760 r rtwn_r88e_get_rssi.cckoff +ffffffff82667000 R edid_vendors +ffffffff826672c0 R edid_nvendors +ffffffff826672d0 R edid_products +ffffffff82667330 R edid_nproducts +ffffffff82667340 r _edid_modes +ffffffff82668000 R videomode_list +ffffffff82669080 R videomode_count +ffffffff8266a000 r ahc_hard_errors +ffffffff8266a080 r critical_sections +ffffffff8266a0b0 r patches +ffffffff8266ad50 r seqprog +ffffffff8266c000 r ahc_switch +ffffffff8266d000 r termstat_strings +ffffffff8266d020 r critical_sections +ffffffff8266d060 r seqprog +ffffffff8266dd50 r patches +ffffffff8266f000 r ahd_switch +ffffffff82670000 R aic_switch +ffffffff82671000 R adw_switch +ffffffff82672000 R gdt_switch +ffffffff82673000 R twe_switch +ffffffff82674000 R ciss_switch +ffffffff82674030 R ciss_level +ffffffff82674050 R ciss_stat +ffffffff82675000 R ami_switch +ffffffff82675028 R ami_raw_switch +ffffffff82676000 R mfi_switch +ffffffff82676028 R mfi_pd_switch +ffffffff82676050 r mfi_iop_xscale +ffffffff82676080 r mfi_iop_ppc +ffffffff826760b0 r mfi_iop_gen2 +ffffffff826760e0 r mfi_iop_skinny +ffffffff82676110 r mfi_bbu_indicators +ffffffff82677000 R qlw_switch +ffffffff82678000 R isp_2100_risc_code +ffffffff8268abf0 R isp_2200_risc_code +ffffffff8269d990 R isp_2300_risc_code +ffffffff826b7408 R qla_switch +ffffffff826b7430 r qla_regs_2100 +ffffffff826b7460 r qla_regs_2200 +ffffffff826b7490 r qla_regs_23XX +ffffffff826b8000 R ahci_atascsi_methods +ffffffff826b9000 R nvme_switch +ffffffff826b9028 r nvme_ops +ffffffff826ba000 R mpi_switch +ffffffff826ba060 r bwi_rf_calc_nrssi_slope_11b.save_phy_regs +ffffffff826ba090 r chv_oa_mux_regs +ffffffff826ba0b0 r fiji_clock_stretcher_lookup_table +ffffffff826ba0b0 r tonga_clock_stretcher_lookup_table +ffffffff826ba0d0 r iosf_pci_devices +ffffffff826ba0f0 r link_speed +ffffffff826ba0f0 r link_speed +ffffffff826ba0f0 r link_speed +ffffffff826ba130 r drm_fb_xfrm.default_dst_pitch +ffffffff826ba130 r non_supported_protection +ffffffff826ba230 r tgl_uy_revids +ffffffff826ba280 r bwi_phy_noise_11g_rev1 +ffffffff826ba300 r cardslot_process_event.antonym_ev +ffffffff826ba390 r gen11_oa_mux_regs +ffffffff826ba480 r ddr2_cycle_tenths +ffffffff826ba4f0 r rtw_intr_rx.ratetbl +ffffffff826ba570 r abm_config +ffffffff826ba5e0 r getbootinfo.ports +ffffffff826ba630 r reg_offsets +ffffffff826ba640 r bwi_rf_lo_measure_11g.rf_lo_adjust +ffffffff826ba650 r init_non_clock_fields.look_up +ffffffff826ba660 r uftdi_8u232am_getrate.roundoff +ffffffff826ba6b0 r zyd_rx_data.rates +ffffffff826ba6d0 r ieee80211_ra_valid_tx_mcs.max_mcs +ffffffff826ba710 r mmio_invalidate_full.gen8_regs +ffffffff826ba740 r bwi_phy_noise_11g +ffffffff826ba750 r hpt366_pio +ffffffff826ba780 r glk_revids +ffffffff826ba7c0 r bwi_rf_calc_nrssi_slope_11g.save_phy3_regs +ffffffff826ba7e0 r ether_crc32_be_update.rev +ffffffff826ba7e0 r rtw_grf5101_mac_crypt.caesar +ffffffff826ba830 r snb_b_fdi_train_param +ffffffff826ba900 r intel_hpll_vco.elk_vco +ffffffff826ba960 r pin_offsets +ffffffff826ba9c0 r firmware_list +ffffffff826baa20 r atom_arg_shift +ffffffff826baa20 r atom_arg_shift +ffffffff826baa60 r pf_syncookie_wstab +ffffffff826baa80 r ieee80211_media_init.mopts +ffffffff826baae0 r add_entropy_words.twist_table +ffffffff826bab80 r urtw_8225v2_txpwr_cck +ffffffff826baba0 r bwfm_pci_prio2fifo +ffffffff826baba0 r ieee80211_up_to_ac.up_to_ac +ffffffff826bac60 r paritytab +ffffffff826bac60 r x86emu_parity_tab +ffffffff826bac80 r legacy_connector_convert +ffffffff826bacc0 r gen7_oa_mux_regs +ffffffff826bace0 r hsw_oa_mux_regs +ffffffff826bad00 r notetab +ffffffff826bad20 r urtw_8225v2_txpwr_cck_ch14 +ffffffff826bad40 r bwi_rf_calibval.rf_calibvals +ffffffff826bade0 r pf_syncookie_msstab +ffffffff826bae40 r xgmi3x16_pcs_err_status_reg_aldebaran +ffffffff826baea0 r uath_wme_init.uath_wme_11g +ffffffff826baec0 r gen7_oa_b_counters +ffffffff826bb020 r icl_revids +ffffffff826bb0e0 r rtwn_iq_calib_run.reg_adda +ffffffff826bb120 r atom_def_dst +ffffffff826bb120 r atom_def_dst +ffffffff826bb160 r sha256_initial_hash_value +ffffffff826bb1c0 r otus_edca_def +ffffffff826bb1e0 r intel_hpll_vco.blb_vco +ffffffff826bb2a0 r epic_pci_subsys_info +ffffffff826bb2c0 r atom_arg_mask +ffffffff826bb2c0 r atom_arg_mask +ffffffff826bb320 r butmap +ffffffff826bb360 r GFX_RLC_SRM_INDEX_CNTL_DATA_OFFSETS +ffffffff826bb3a0 r comsoft.lsrmap +ffffffff826bb3e0 r tulip_mii_phy_readspecific.table +ffffffff826bb400 r kbl_revids +ffffffff826bb4a0 r intel_hpll_vco.pnv_vco +ffffffff826bb500 r dmapageport +ffffffff826bb5c0 r intel_hpll_vco.ctg_vco +ffffffff826bb680 r drm_calculate_luminance_range.pre_computed_values +ffffffff826bc000 R sili_atascsi_methods +ffffffff826bd000 R ncr53c9x_switch +ffffffff826be000 r scf_period +ffffffff826bf000 R siop_script +ffffffff826bf5a0 R lun_switch +ffffffff826bf5d0 R tag_switch +ffffffff826bf660 R load_dsa +ffffffff826bf6c4 R siop_led_on +ffffffff826bf6cc R siop_led_off +ffffffff826bf6d8 R siop_switch +ffffffff826c0000 R ep_vortex_media +ffffffff826c0100 R ep_default_to_media +ffffffff826c1000 R wi_card_ident +ffffffff826c3000 R ucode_table +ffffffff826c4000 r re_revisions +ffffffff826c4290 r re_kstats_tpl +ffffffff826c6000 R smc91cxx_media +ffffffff826c6010 R smc91cxx_mii_bitbang_ops +ffffffff826c7000 R dl10019_mii_bitbang_ops +ffffffff826c7028 R dl10022_mii_bitbang_ops +ffffffff826c8000 R ax88190_mii_bitbang_ops +ffffffff826ca000 R ac97_audio_default +ffffffff826ca020 R ac97_on_off +ffffffff826ca324 R ac97_mic_select +ffffffff826ca628 R ac97_mono_select +ffffffff826ca92c R ac97_source +ffffffff826cac30 R ac97_volume_stereo +ffffffff826cac4c R ac97_volume_mono +ffffffff826cac70 R source_info +ffffffff826cb470 R ac97_ad +ffffffff826cb580 R ac97_ak +ffffffff826cb610 R ac97_av +ffffffff826cb750 R ac97_rl +ffffffff826cb7a0 R ac97_cm +ffffffff826cb820 R ac97_cr +ffffffff826cb840 R ac97_cs +ffffffff826cb920 R ac97_cx +ffffffff826cb980 R ac97_dt +ffffffff826cb9a0 R ac97_em +ffffffff826cb9d0 R ac97_es +ffffffff826cb9f0 R ac97_is +ffffffff826cba10 R ac97_ic +ffffffff826cba90 R ac97_it +ffffffff826cbac0 R ac97_ns +ffffffff826cbb80 R ac97_ps +ffffffff826cbbb0 R ac97_sl +ffffffff826cbbd0 R ac97_st +ffffffff826cbd20 R ac97_vi +ffffffff826cbd50 R ac97_tt +ffffffff826cbdd0 R ac97_ti +ffffffff826cbdf0 R ac97_wb +ffffffff826cbe10 R ac97_wo +ffffffff826cbea0 R ac97_ym +ffffffff826cbef0 R ac97_vendors +ffffffff826cc1f0 R ac97enhancement +ffffffff826cc2f0 R ac97feature +ffffffff826cd000 R lm_chips +ffffffff826cd020 R lm78_sensors +ffffffff826cd1a0 R w83627hf_sensors +ffffffff826cd3a0 R w83627ehf_sensors +ffffffff826cd5c0 R w83627dhg_sensors +ffffffff826cd7c0 R nct6776f_sensors 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kstat_id_tree_RBT_INFO +ffffffff82704058 R kstat_id_tree_RBT_TYPE +ffffffff82704060 r kstat_pv_tree_RBT_INFO +ffffffff82704078 R kstat_pv_tree_RBT_TYPE +ffffffff82704080 r kstat_nm_tree_RBT_INFO +ffffffff82704098 R kstat_nm_tree_RBT_TYPE +ffffffff82705000 r fuse_rd_filtops +ffffffff82706000 R fusefs_vfsops +ffffffff82706070 R fusefs_vars +ffffffff82707000 R fusefs_vops +ffffffff82707110 R fusefsread_filtops +ffffffff82707140 R fusefswrite_filtops +ffffffff82707170 R fusefsvnode_filtops +ffffffff82708000 r pf_state_tree_RBT_INFO +ffffffff82708018 R pf_state_tree_RBT_TYPE +ffffffff82708020 r pf_state_tree_id_RBT_INFO +ffffffff82708038 R pf_state_tree_id_RBT_TYPE +ffffffff82708040 r pf_translate_af.zero +ffffffff82709000 R hfsc_ops +ffffffff82709038 R ifq_hfsc_ops +ffffffff82709040 R hfsc_pf_ops +ffffffff82709088 R pfq_hfsc_ops +ffffffff8270a000 r fqcodel_ops +ffffffff8270a038 R ifq_fqcodel_ops +ffffffff8270a040 r fqcodel_pf_ops +ffffffff8270a088 R pfq_fqcodel_ops +ffffffff8270a090 r codel_intervals +ffffffff8270b000 r pfsync_bulk_req_state_names +ffffffff8270b030 r pfsync_bulk_req_event_names +ffffffff8270b060 r pfsync_qs +ffffffff8270b0d8 r pfsync_kstat_tpl +ffffffff8270b2e0 r pfsync_acts +ffffffff8270c000 R hotplugread_filtops +ffffffff8270d000 R dtps_static +ffffffff8270e000 R db_show_all_cmds +ffffffff8270e180 R db_show_cmds +ffffffff8270e4c0 R db_boot_cmds +ffffffff8270e5a0 R db_command_table +ffffffff8270f000 R ddb_vars +ffffffff82710000 R audio_ca +ffffffff82710028 R audioctlread_filtops +ffffffff82710058 R audiowrite_filtops +ffffffff82710088 R audioread_filtops +ffffffff82711000 R midi_ca +ffffffff82711028 R midiwrite_filtops +ffffffff82711058 R midiread_filtops +ffffffff82712000 r mulawtolin16 +ffffffff82712200 r lintomulaw +ffffffff82713000 R randomread_filtops +ffffffff82713030 R randomwrite_filtops +ffffffff82714000 R video_ca +ffffffff82714028 R video_filtops +ffffffff82715000 R cd9660_vfsops +ffffffff82716000 R cd9660_vops +ffffffff82716110 R cd9660_specvops +ffffffff82716220 R cd9660_fifovops +ffffffff82716330 R cd9660read_filtops +ffffffff82716360 R cd9660write_filtops +ffffffff82716390 R cd9660vnode_filtops +ffffffff82717000 R udf_vfsops +ffffffff82718000 R udf_vops +ffffffff82718110 r mon_lens +ffffffff82719000 r month_days +ffffffff8271a000 R execsw +ffffffff8271b000 r shstrtab +ffffffff8271c000 R copyright +ffffffff8271c0c0 r initpaths +ffffffff8271d000 R sysent +ffffffff8271f000 R bufq_impls +ffffffff82720000 R kqueueops +ffffffff82720038 R kqread_filtops +ffffffff82720068 R proc_filtops +ffffffff82720098 R file_filtops +ffffffff827200c8 R timer_filtops +ffffffff82720100 R sysfilt_ops +ffffffff82720148 R seltrue_filtops +ffffffff82720178 R dead_filtops +ffffffff827201a8 R badfd_filtops +ffffffff827201d8 r mutex_klistops +ffffffff827201f0 r rwlock_klistops +ffffffff82721000 R kv_exec +ffffffff82722000 R addrmask +ffffffff82723000 r rw_ops +ffffffff82724000 r proc_printit.pstat +ffffffff82725000 R pledge_syscalls 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_utf_count +ffffffff82748000 R ntfs_vfsops +ffffffff82749000 R ntfs_vops +ffffffff8274a000 R bpfread_filtops +ffffffff8274a030 R bpf_mbuf_ops +ffffffff8274b000 r bpf_mem_ops +ffffffff8274c000 R priq_ops +ffffffff8274c038 R ifq_priq_ops +ffffffff8274c040 r ifq_kstat_tpl +ffffffff8274c180 r ifiq_kstat_tpl +ffffffff8274d000 r ether_crc32_le_update.crctab +ffffffff8274d040 r ether_crc32_be_update.crctab +ffffffff8274e000 r lcp +ffffffff8274e078 r ipcp +ffffffff8274e0f0 r ipv6cp +ffffffff8274e168 r chap +ffffffff8274e1e0 r pap +ffffffff8274f000 R ifmedia_baudrate_descriptions +ffffffff82750000 r fcstab +ffffffff82752000 R tunread_filtops +ffffffff82752030 R tunwrite_filtops +ffffffff82753000 R bridge_brport +ffffffff82754000 R bstp_etheraddr +ffffffff82755000 r eb_tree_RBT_INFO +ffffffff82755018 R eb_tree_RBT_TYPE +ffffffff82756000 r veb_etherbridge_ops +ffffffff82756028 r veb_pf_ipv4 +ffffffff82756040 r veb_pf_ipv6 +ffffffff82757000 r pipex_pppoe_padding +ffffffff82758000 r rn_addmask.normal_chars +ffffffff82759000 R route_src +ffffffff82759010 R route_usrreqs +ffffffff827590b0 R routedomain +ffffffff82759100 R routesw +ffffffff8275a000 R gre_vars +ffffffff8275a030 r mgre_tree_RBT_INFO +ffffffff8275a048 R mgre_tree_RBT_TYPE +ffffffff8275a050 r egre_tree_RBT_INFO +ffffffff8275a068 R egre_tree_RBT_TYPE +ffffffff8275a070 r nvgre_ucast_tree_RBT_INFO +ffffffff8275a088 R nvgre_ucast_tree_RBT_TYPE +ffffffff8275a090 r nvgre_mcast_tree_RBT_INFO +ffffffff8275a0a8 R nvgre_mcast_tree_RBT_TYPE +ffffffff8275a0b0 r eoip_tree_RBT_INFO +ffffffff8275a0c8 R eoip_tree_RBT_TYPE +ffffffff8275a0d0 r nvgre_etherbridge_ops +ffffffff8275b000 r trunk_protos +ffffffff8275c000 R ethermulticastaddr_slowprotocols +ffffffff8275c006 R lacp_info_tlv_template +ffffffff8275c00e R marker_info_tlv_template +ffffffff8275c012 R marker_response_tlv_template +ffffffff8275c020 R lacp_timer_funcs +ffffffff8275d000 r lacp_rxm_state_names +ffffffff8275d040 r lacp_rxm_event_names +ffffffff8275d090 r aggr_port_selected_names +ffffffff8275d0b0 r lacp_mux_state_names +ffffffff8275d0e0 r lacp_mux_event_names +ffffffff8275d128 r lacp_address_slow +ffffffff8275e000 r tpmr_pf_ipv4 +ffffffff8275e018 r tpmr_pf_ipv6 +ffffffff8275f000 r bpe_tree_RBT_INFO +ffffffff8275f018 R bpe_tree_RBT_TYPE +ffffffff8275f020 r bpe_etherbridge_ops +ffffffff82760000 R pppx_rd_filtops +ffffffff82760030 R pppx_wr_filtops +ffffffff82760060 r pppx_ifs_RBT_INFO +ffffffff82760078 R pppx_ifs_RBT_TYPE +ffffffff82760080 r pppac_rd_filtops +ffffffff827600b0 r pppac_wr_filtops +ffffffff82761000 r vxlan_peers_RBT_INFO +ffffffff82761018 R vxlan_peers_RBT_TYPE +ffffffff82761020 r vxlan_etherbridge_ops +ffffffff82762000 R stoeplitz_cache +ffffffff82763000 R ieee80211_std_rateset_11a +ffffffff82763010 R ieee80211_std_rateset_11b +ffffffff82763020 R ieee80211_std_rateset_11g +ffffffff82763030 R ieee80211_std_ratesets_11n +ffffffff827633b0 R ieee80211_std_ratesets_11ac +ffffffff827636b0 r ieee80211_setbasicrates.basic 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divert_usrreqs +ffffffff8276f000 R icmpctl_vars +ffffffff82770000 R ipctl_vars +ffffffff82770150 R inetctlerrmap +ffffffff82771000 R rip_usrreqs +ffffffff82772000 R tcp_timer_funcs +ffffffff82773000 R tcp_usrreqs +ffffffff827730a0 R tcp6_usrreqs +ffffffff82773140 R tcpctl_vars +ffffffff82774000 R udp_usrreqs +ffffffff827740a0 R udp6_usrreqs +ffffffff82774140 R udpctl_vars +ffffffff82775000 R gre_usrreqs +ffffffff82776000 r ipsec_ids_tree_RBT_INFO +ffffffff82776018 R ipsec_ids_tree_RBT_TYPE +ffffffff82776020 r ipsec_ids_flows_RBT_INFO +ffffffff82776038 R ipsec_ids_flows_RBT_TYPE +ffffffff82776040 R xformsw +ffffffff82776158 R xformswNXFORMSW +ffffffff82777000 R espctl_vars +ffffffff82777050 R ahctl_vars +ffffffff82777070 R ipcompctl_vars +ffffffff82777090 R ipsecctl_vars +ffffffff82778000 R ipseczeroes +ffffffff82779000 r carp_set_state.carp_states +ffffffff8277a000 r Rcon +ffffffff8277b000 r Te2 +ffffffff8277b400 r Te3 +ffffffff8277b800 r Te0 +ffffffff8277bc00 r Te1 +ffffffff8277c000 r rcon +ffffffff8277c030 r Td0 +ffffffff8277c430 r Td1 +ffffffff8277c830 r Td2 +ffffffff8277cc30 r Td3 +ffffffff8277d030 r Td4 +ffffffff8277f000 r K256 +ffffffff8277f100 r sha512_initial_hash_value +ffffffff8277f140 r K512 +ffffffff8277f3c0 r sha384_initial_hash_value +ffffffff82780000 r Blowfish_initstate.initstate +ffffffff82782000 r cast_sbox1 +ffffffff82782400 r cast_sbox2 +ffffffff82782800 r cast_sbox3 +ffffffff82782c00 r cast_sbox4 +ffffffff82783000 r cast_sbox5 +ffffffff82783400 r cast_sbox6 +ffffffff82783800 r cast_sbox7 +ffffffff82783c00 r cast_sbox8 +ffffffff82784000 r des_SPtrans +ffffffff82785000 r des_skb +ffffffff82785800 r odd_parity +ffffffff82786000 R hmac_ipad_buffer +ffffffff82786080 R hmac_opad_buffer +ffffffff82787000 R enc_xform_3des +ffffffff82787040 R enc_xform_blf +ffffffff82787080 R enc_xform_cast5 +ffffffff827870c0 R enc_xform_aes +ffffffff82787100 R enc_xform_aes_ctr +ffffffff82787140 R enc_xform_aes_gcm +ffffffff82787180 R enc_xform_aes_gmac +ffffffff827871c0 R enc_xform_aes_xts +ffffffff82787200 R enc_xform_chacha20_poly1305 +ffffffff82787240 R enc_xform_null +ffffffff82787280 R auth_hash_hmac_md5_96 +ffffffff827872c8 R auth_hash_hmac_sha1_96 +ffffffff82787310 R auth_hash_hmac_ripemd_160_96 +ffffffff82787358 R auth_hash_hmac_sha2_256_128 +ffffffff827873a0 R auth_hash_hmac_sha2_384_192 +ffffffff827873e8 R auth_hash_hmac_sha2_512_256 +ffffffff82787430 R auth_hash_gmac_aes_128 +ffffffff82787478 R auth_hash_gmac_aes_192 +ffffffff827874c0 R auth_hash_gmac_aes_256 +ffffffff82787508 R auth_hash_chacha20_poly1305 +ffffffff82787550 R comp_algo_deflate +ffffffff82788000 r IV +ffffffff82789000 r idgen32_ftable +ffffffff8278a000 r Chacha20_Poly1305_Update.zeroes +ffffffff8278a010 r pad0 +ffffffff8278b000 r null_point +ffffffff8278b020 r base_point +ffffffff8278c000 R mplsdomain +ffffffff8278d000 R mplsctl_vars +ffffffff8278e000 r nfs_nodetree_RBT_INFO +ffffffff8278e018 R nfs_nodetree_RBT_TYPE +ffffffff8278f000 r nfsread_filtops +ffffffff8278f030 r nfswrite_filtops +ffffffff8278f060 r nfsvnode_filtops +ffffffff82790000 r nfsrv_v3errmap +ffffffff827900b0 r nfsrv_v2errmap +ffffffff82791000 R nfs_vfsops +ffffffff82792000 R nfs_vops +ffffffff82792110 R nfs_specvops +ffffffff82792220 R nfs_fifovops +ffffffff82793000 r fserr_interval +ffffffff82794000 R around +ffffffff82794030 R inside +ffffffff82794060 R fragtbl124 +ffffffff82794160 R fragtbl8 +ffffffff82795000 R ffs_vfsops +ffffffff82795070 R sbtry +ffffffff82795080 R ffs_vars +ffffffff82796000 R ffs_vops +ffffffff82796110 R ffs_specvops +ffffffff82796220 R ffs_fifovops +ffffffff82798000 R mfs_vfsops +ffffffff82799000 R mfs_vops +ffffffff8279a000 r quotatypes +ffffffff8279b000 R ufsread_filtops +ffffffff8279b030 R ufswrite_filtops +ffffffff8279b060 R ufsvnode_filtops +ffffffff8279d000 R ext2fs_vfsops +ffffffff8279d070 r incompat +ffffffff8279e000 R ext2fs_vops +ffffffff8279e110 R ext2fs_specvops +ffffffff8279e220 R ext2fs_fifovops +ffffffff8279f000 R uaddr_kernel_functions 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uvm_objtree_RBT_TYPE +ffffffff827a6000 r uvm_pmr_addr_RBT_INFO +ffffffff827a6018 R uvm_pmr_addr_RBT_TYPE +ffffffff827a6020 r uvm_pmr_size_RBT_INFO +ffffffff827a6038 R uvm_pmr_size_RBT_TYPE +ffffffff827a6040 r uvm_pmemrange_addr_RBT_INFO +ffffffff827a6058 R uvm_pmemrange_addr_RBT_TYPE +ffffffff827a7000 R uvm_vnodeops +ffffffff827a7048 r uvn_flush.interval +ffffffff827a8000 R zeroin6_addr +ffffffff827a9000 R in6addr_any +ffffffff827a9010 R in6addr_loopback +ffffffff827a9020 R in6addr_intfacelocal_allnodes +ffffffff827a9030 R in6addr_linklocal_allnodes +ffffffff827a9040 R in6addr_linklocal_allrouters +ffffffff827a9050 R in6mask0 +ffffffff827a9060 R in6mask32 +ffffffff827a9070 R in6mask64 +ffffffff827a9080 R in6mask96 +ffffffff827a9090 R in6mask128 +ffffffff827a90a0 R sa6_any +ffffffff827aa000 R divert6ctl_vars +ffffffff827aa030 R divert6_usrreqs +ffffffff827ab000 R inet6domain +ffffffff827ab050 R inet6sw +ffffffff827ac000 R icmpv6ctl_vars +ffffffff827ad000 R inet6ctlerrmap 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inflate_table.lext +ffffffff827b8080 r inflate_table.dbase +ffffffff827b80c0 r inflate_table.dext +ffffffff827b9000 r configuration_table +ffffffff827ba000 R z_errmsg +ffffffff827bb000 R _dist_code +ffffffff827bb200 R _length_code +ffffffff827bb300 r static_l_desc +ffffffff827bb320 r static_d_desc +ffffffff827bb340 r static_bl_desc +ffffffff827bb360 r static_ltree +ffffffff827bb7e0 r static_dtree +ffffffff827bb860 r extra_lbits +ffffffff827bb8e0 r extra_dbits +ffffffff827bb960 r extra_blbits +ffffffff827bb9b0 r bl_order +ffffffff827bb9d0 r base_length +ffffffff827bba50 r base_dist +ffffffff827bc000 R nam2blk +ffffffff827bd000 R chrtoblktbl +ffffffff827bd0c0 R nchrtoblktbl +ffffffff827be000 R cpuctl_vars +ffffffff827c0000 R cpu_cpuid_features +ffffffff827c01d0 R cpu_ecpuid_features +ffffffff827c0260 R cpu_cpuid_ecxfeatures +ffffffff827c0450 R cpu_ecpuid_ecxfeatures +ffffffff827c05d0 R cpu_seff0_ebxfeatures +ffffffff827c07a0 R cpu_seff0_ecxfeatures +ffffffff827c0800 R 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ahd_num_pci_devs +ffffffff828471a0 R ahd_pci_ca +ffffffff828471d0 r pci_bus_modes +ffffffff82847210 r pci_status_strings +ffffffff82847250 r pci_status_source +ffffffff82847290 r split_status_strings +ffffffff82848000 R adw_pci_ca +ffffffff82848028 R adw_pci_devices +ffffffff82849000 r adw_3550_Default_EEPROM +ffffffff82849080 r adw_38C0800_Default_EEPROM +ffffffff82849100 r adw_38C1600_Default_EEPROM +ffffffff8284a000 R adw_asc3550_mcode +ffffffff8284b3a0 R adw_asc3550_mcode_data +ffffffff8284b3b0 R adw_asc38C0800_mcode +ffffffff8284c888 R adw_asc38C0800_mcode_data +ffffffff8284c8a0 R adw_asc38C1600_mcode +ffffffff8284e160 R adw_asc38C1600_mcode_data +ffffffff8284f000 R twe_pci_ca +ffffffff8284f028 R twe_pci_devices +ffffffff82850000 R arc_ca +ffffffff82850028 R arc_switch +ffffffff82850050 r arc_devices +ffffffff82850190 r arc_intel +ffffffff82850198 r arc_marvell +ffffffff828501a0 r arc_lsi +ffffffff828501a8 r arc_marvell2 +ffffffff82851000 R jmb_ca +ffffffff82851030 r jmb_devices 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tulip_read_macaddr.testpat +ffffffff828e13d0 r tulip_vendors +ffffffff828e1480 r tulip_media_to_ifmedia +ffffffff828e14e0 r tulip_chipdescs +ffffffff828e2000 R ep_pci_ca +ffffffff828e2030 R ep_pci_devices +ffffffff828e3000 R pcn_ca +ffffffff828e3028 R pcn_devices +ffffffff828e3030 r pcn_79c970_rcvfw +ffffffff828e3050 r pcn_79c970_xmtsp +ffffffff828e3070 r pcn_79c970_xmtfw +ffffffff828e3090 r pcn_79c971_rcvfw +ffffffff828e30b0 r pcn_79c971_xmtsp_sram +ffffffff828e30d0 r pcn_79c971_xmtsp +ffffffff828e30f0 r pcn_79c971_xmtfw +ffffffff828e3110 r pcn_variants +ffffffff828e4000 R siop_products +ffffffff828e5000 R siop_pci_ca +ffffffff828e6000 R rdcide_setup +ffffffff828e6005 R rdcide_hold +ffffffff828e600a R rdcide_udmatim +ffffffff828e6010 R rdcide_udmaclk +ffffffff828e6028 R default_product_desc +ffffffff828e6040 R pciide_intel_products +ffffffff828e6630 R pciide_amd_products +ffffffff828e6690 R pciide_cmd_products +ffffffff828e6730 R pciide_via_products +ffffffff828e6810 R pciide_cypress_products +ffffffff828e6820 R pciide_sis_products +ffffffff828e6870 R pciide_natsemi_products +ffffffff828e6890 R pciide_acer_products +ffffffff828e68a0 R pciide_triones_products +ffffffff828e68f0 R pciide_promise_products +ffffffff828e6ac0 R pciide_acard_products +ffffffff828e6b10 R pciide_serverworks_products +ffffffff828e6bb0 R pciide_nvidia_products +ffffffff828e6e80 R pciide_ite_products +ffffffff828e6ea0 R pciide_ati_products +ffffffff828e6f20 R pciide_jmicron_products +ffffffff828e6f70 R pciide_phison_products +ffffffff828e6f80 R pciide_rdc_products +ffffffff828e6f90 R pciide_vendors +ffffffff828e7140 R pciide_pci_ca +ffffffff828e7168 R pciide_jmb_ca +ffffffff828e7190 r piix_isp_dma +ffffffff828e7193 r piix_rtc_dma +ffffffff828e7196 r apollo_pio_set +ffffffff828e719b r cmd0643_9_data_tim_pio +ffffffff828e71a0 r cmd0643_9_data_tim_dma +ffffffff828e71a3 r cmd680_channel_map.init_val +ffffffff828e71b1 r cmd680_setup_channel.udma2_tbl +ffffffff828e71b8 r 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txp_devices +ffffffff828ee000 r cards +ffffffff828ef000 r format_params +ffffffff828ef1a0 r pixfmt_table +ffffffff828ef320 r meteor_pixfmt_table +ffffffff828f0000 R bktr_ca +ffffffff828f0028 R bktr_hw_if +ffffffff828f1000 r tuners +ffffffff828f1170 r freqTable +ffffffff828f1260 r nabcst +ffffffff828f12a0 r irccable +ffffffff828f1310 r hrccable +ffffffff828f1380 r weurope +ffffffff828f1420 r jpnbcst +ffffffff828f1460 r jpncable +ffffffff828f14c0 r xussr +ffffffff828f1530 r australia +ffffffff828f1590 r france +ffffffff828f2000 R xl_pci_ca +ffffffff828f2030 R xl_pci_devices +ffffffff828f3000 R fxp_pci_ca +ffffffff828f3030 R fxp_pci_devices +ffffffff828f4000 R em_devices +ffffffff828f42e0 R em_ca +ffffffff828f4310 r em_counters +ffffffff828f5000 r em_igp_cable_length_table +ffffffff828f5100 r em_igp_2_cable_length_table +ffffffff828f6000 R ixgb_devices +ffffffff828f6010 R ixgb_ca +ffffffff828f7000 R ixgbe_devices +ffffffff828f70b8 R ix_ca +ffffffff828f70e0 r ix_counters +ffffffff828f73e0 r ix_rxq_kstats_tpl +ffffffff828f7458 r ix_txq_kstats_tpl +ffffffff828f8000 r ixgbe_mvals_base +ffffffff828f8060 r ixgbe_mvals_X540 +ffffffff828f80c0 r ixgbe_mvals_X550 +ffffffff828f8120 r ixgbe_mvals_X550EM_x +ffffffff828f8180 r ixgbe_mvals_X550EM_a +ffffffff828fb000 R ixl_ca +ffffffff828fb030 R ixl_port_counters +ffffffff828fb2c0 R ixl_vsi_counters +ffffffff828fb380 r ixl_devices +ffffffff828fb4c0 r ixl_710 +ffffffff828fb4e8 r ixl_722 +ffffffff828fb510 r ixl_pf_aq_regs +ffffffff828fb578 r ixl_710_decrepit +ffffffff828fb5a0 r ixl_phy_type_map +ffffffff828fb770 r ixl_speed_type_map +ffffffff828fb7b0 r ixl_hmc_pack_rxq +ffffffff828fb830 r ixl_hmc_pack_txq +ffffffff828fb8a0 r ixl_sfp_ops +ffffffff828fb8b8 r ixl_qsfp_ops +ffffffff828fc000 r dwqe_pci_devices +ffffffff828fc008 R dwqe_pci_ca +ffffffff828fd000 R xge_ca +ffffffff828fd028 R xge_devices +ffffffff828fd030 r xge_fix_mac +ffffffff828fd110 r xge_xena_dtx_cfg +ffffffff828fd170 r xge_herc_dtx_cfg +ffffffff828fe000 R thtc_ca +ffffffff828fe028 R tht_ca +ffffffff828fe050 r thtc_devices +ffffffff828fe068 r tht_link_state.interval +ffffffff828ff000 R myx_ca +ffffffff828ff028 R myx_devices +ffffffff82900000 R oce_ca +ffffffff82900030 R oce_devices +ffffffff82901000 R dc_pci_ca +ffffffff82902000 R epic_pci_ca +ffffffff82902028 R epic_pci_devices +ffffffff82903000 R ti_pci_ca +ffffffff82903030 R ti_devices +ffffffff82904000 R ne_pci_ca +ffffffff82904030 R ne_pci_prod +ffffffff82905000 R gem_pci_ca +ffffffff82905030 R gem_pci_devices +ffffffff82905050 r gem_promhdr +ffffffff82905052 r gem_promdat +ffffffff8290505a r gem_promdat2 +ffffffff82906000 R cas_ca +ffffffff82906028 R cas_pci_devices +ffffffff82906030 r cas_promhdr +ffffffff82906032 r cas_promdat_sun +ffffffff8290603a r cas_promdat_ns +ffffffff82906042 r cas_promdat2 +ffffffff82907000 R sf_pci_ca +ffffffff82907028 R sf_pci_products +ffffffff82908000 R sis_ca +ffffffff82908028 R sis_devices +ffffffff82909000 R se_devices +ffffffff82909008 R se_ca +ffffffff8290a000 R mbg_ca +ffffffff8290a030 R mbg_devices +ffffffff8290b000 R uhci_pci_ca +ffffffff8290c000 R ohci_pci_ca +ffffffff8290d000 R ehci_pci_ca +ffffffff8290e000 R xhci_pci_ca +ffffffff8290f000 R cbb_pci_ca +ffffffff8290f028 r pccbb_pcmcia_do_io_map.pcic_iowidth +ffffffff82910000 R skc_devices +ffffffff82910030 R skc_ca +ffffffff82910058 R sk_ca +ffffffff82911000 R mskc_devices +ffffffff829110a8 R mskc_ca +ffffffff829110d0 R msk_ca +ffffffff82911100 r msk_mib +ffffffff82912000 R puc_pci_ca +ffffffff82913000 R puc_devs +ffffffff82918000 R com_puc_ca +ffffffff82918030 r puc_port_types +ffffffff82919000 R lpt_puc_ca +ffffffff8291a000 R wi_pci_ca +ffffffff8291a030 r wi_pci_products +ffffffff8291b000 R an_pci_ca +ffffffff8291b030 R an_pci_devices +ffffffff8291c000 R iwi_devices +ffffffff8291c010 R iwi_ca +ffffffff8291d000 R wpi_ca +ffffffff8291d028 r wpi_devices +ffffffff8291d030 r wpi_rates +ffffffff8291d050 r wpi_rf_gain_5ghz +ffffffff8291d0a0 r wpi_dsp_gain_5ghz +ffffffff8291d0f0 r wpi_rf_gain_2ghz +ffffffff8291d140 r wpi_dsp_gain_2ghz +ffffffff8291d190 r wpi_pmgt +ffffffff8291d310 r wpi_bands +ffffffff8291e000 R iwn_mcs2ridx +ffffffff8291e020 R iwn_ca +ffffffff8291e050 r iwn_devices +ffffffff8291e0e8 r iwn4965_sensitivity_limits +ffffffff8291e124 r iwn5000_sensitivity_limits +ffffffff8291e160 r iwn5150_sensitivity_limits +ffffffff8291e19c r iwn1000_sensitivity_limits +ffffffff8291e1d8 r iwn6000_sensitivity_limits +ffffffff8291e214 r iwn2000_sensitivity_limits +ffffffff8291e250 r iwn_fw_errmsg +ffffffff8291e340 r iwn4965_set_txpower.tdiv +ffffffff8291e360 r iwn4965_rf_gain_5ghz +ffffffff8291e3d0 r iwn4965_dsp_gain_5ghz +ffffffff8291e440 r iwn4965_dsp_gain_2ghz +ffffffff8291e4b0 r iwn_pmgt +ffffffff8291e6f0 r iwn4965_post_alive.qid2fifo +ffffffff8291e700 r iwn_bands +ffffffff8291e770 r iwn_rates +ffffffff8291e820 r iwn4965_rf_gain_2ghz +ffffffff8291f000 R iwm_nvm_channels +ffffffff8291f030 R iwm_nvm_channels_8000 +ffffffff8291f070 R iwm_rates +ffffffff8291f0d0 R iwm_ht_mcs2ridx +ffffffff8291f110 R iwm_tid_to_ac +ffffffff8291f118 R iwm_ac_to_tx_fifo +ffffffff8291f120 R iwm_nvm_to_read +ffffffff8291f144 r iwm_set_hw_address_8000.reserved_mac +ffffffff8291f180 r iwm_sf_full_timeout +ffffffff8291f1b0 r iwm_sf_full_timeout_def +ffffffff8291f1e0 r advanced_lookup +ffffffff8291f320 r iwm_devices +ffffffff8291f360 R iwm_ca +ffffffff82920000 R iwx_9560_quz_a0_jf_b0_cfg +ffffffff82920020 R iwx_9560_qu_c0_jf_b0_cfg +ffffffff82920040 R iwx_qu_b0_hr1_b0 +ffffffff82920060 R iwx_qu_b0_hr_b0 +ffffffff82920080 R iwx_ax201_cfg_qu_hr +ffffffff829200a0 R iwx_qu_c0_hr1_b0 +ffffffff829200c0 R iwx_qu_c0_hr_b0 +ffffffff829200e0 R iwx_ax201_cfg_qu_c0_hr_b0 +ffffffff82920100 R iwx_quz_a0_hr1_b0 +ffffffff82920120 R iwx_ax201_cfg_quz_hr +ffffffff82920140 R iwx_cfg_so_a0_hr_b0 +ffffffff82920160 R iwx_cfg_quz_a0_hr_b0 +ffffffff82920180 R iwx_2ax_cfg_so_gf_a0 +ffffffff829201a0 R iwx_2ax_cfg_so_gf_a0_long +ffffffff829201c0 R iwx_2ax_cfg_so_gf4_a0 +ffffffff829201e0 R iwx_2ax_cfg_so_gf4_a0_long +ffffffff82920200 R iwx_2ax_cfg_ty_gf_a0 +ffffffff82920220 R iwx_2ax_cfg_so_jf_b0 +ffffffff82920240 R iwx_nvm_channels_8000 +ffffffff82920280 R iwx_rates +ffffffff829202e0 R iwx_mcs2ridx +ffffffff82920320 R iwx_tid_to_ac +ffffffff82920328 R iwx_ac_to_tx_fifo +ffffffff82920330 r iwx_nvm_channels_uhb +ffffffff8292039e r iwx_is_valid_mac_addr.reserved_mac +ffffffff829203b0 r iwx_sf_full_timeout +ffffffff829203e0 r iwx_sf_full_timeout_def +ffffffff82920410 r advanced_lookup +ffffffff82920550 r iwx_devices +ffffffff82920590 r iwx_dev_info_table +ffffffff82920e18 R iwx_ca +ffffffff82921000 R cmpci_ca +ffffffff82921028 R cmpci_hw_if +ffffffff829210e0 r cmpci_rate_table +ffffffff82921120 R cmpci_devices +ffffffff82921130 r cmpci_query_devinfo.mixer_port_names +ffffffff82921160 r cmpci_query_devinfo.mixer_classes +ffffffff82922000 R iha_pci_ca +ffffffff82922028 R iha_switch +ffffffff82923000 R pcscp_ca +ffffffff82924000 R bge_ca +ffffffff82924030 R bge_devices +ffffffff829241b0 r bge_revisions +ffffffff82924610 r bge_majorrevs +ffffffff82924790 r bge_kstat_tpl +ffffffff82925000 R bnx_devices +ffffffff82925020 R bnx_ca +ffffffff82926000 R vge_ca +ffffffff82926028 R vge_devices +ffffffff82927000 R stge_ca +ffffffff82927028 R stge_mii_bitbang_ops +ffffffff82927050 R stge_devices +ffffffff82928000 R nfe_ca +ffffffff82928030 R nfe_devices +ffffffff82929000 R et_devices +ffffffff82929008 R et_ca +ffffffff8292a000 R jme_devices +ffffffff8292a008 R jme_ca +ffffffff8292b000 R age_devices +ffffffff8292b008 R age_ca +ffffffff8292c000 R alc_devices +ffffffff8292c038 R alc_ca +ffffffff8292d000 R ale_devices +ffffffff8292d008 R ale_ca +ffffffff8292e000 R amdpm_ca +ffffffff8292e030 R amdpm_ids +ffffffff8292f000 R bce_ca +ffffffff8292f028 R bce_devices +ffffffff82930000 R ath_pci_ca +ffffffff82931000 R athn_pci_ca +ffffffff82931030 r athn_pci_devices +ffffffff82932000 R atw_pci_ca +ffffffff82932028 R atw_pci_devices +ffffffff82933000 R rtw_pci_ca +ffffffff82933030 R rtw_pci_products +ffffffff82934000 R rtwn_pci_ca +ffffffff82934030 r rtwn_pci_devices +ffffffff82934040 r rtl8188eu_mac +ffffffff829341b0 r rtl8192cu_mac +ffffffff82934310 r rtl8192ce_mac +ffffffff82934458 r rtl8188eu_bb_prog +ffffffff82934480 r rtl8723a_bb_prog +ffffffff829344a8 r rtl8192ce_bb_prog_1t +ffffffff829344d0 r rtl8192ce_bb_prog_2t +ffffffff82934500 r rtl8188eu_bb_regs +ffffffff82934680 r rtl8188eu_bb_vals +ffffffff82934980 r rtl8188eu_agc_vals +ffffffff82934b80 r rtl8723a_bb_regs +ffffffff82934d00 r rtl8723a_bb_vals +ffffffff82934ff0 r rtl8192ce_agc_vals +ffffffff82935270 r rtl8192ce_bb_regs +ffffffff829353f0 r rtl8192ce_bb_vals_1t +ffffffff829356e0 r rtl8192ce_bb_vals_2t +ffffffff82936000 R ral_pci_ca +ffffffff82936030 R ral_pci_devices +ffffffff82937000 R acx_pci_ca +ffffffff82937028 R acx_pci_devices +ffffffff82938000 R pgt_pci_ca +ffffffff82938028 R pgt_pci_devices +ffffffff82939000 R malo_pci_ca +ffffffff82939028 R malo_pci_devices +ffffffff8293a000 R bwi_pci_ca +ffffffff8293a030 R bwi_pci_devices +ffffffff8293b000 R piixpm_ca +ffffffff8293b030 R piixpm_ids +ffffffff8293c000 R vic_ca +ffffffff8293c028 R vic_devices +ffffffff8293d000 R vmx_devices +ffffffff8293d008 R vmx_ca +ffffffff8293d030 r vmx_tx_kstat_tpl +ffffffff8293d0d0 r vmx_kstat_rate +ffffffff8293d0e0 r vmx_rx_kstat_tpl +ffffffff8293e000 R vmwpvs_ca +ffffffff8293e028 R vmwpvs_switch +ffffffff8293f000 R lii_ca +ffffffff8293f028 R lii_devices +ffffffff82940000 R ichiic_ca +ffffffff82940030 R ichiic_ids +ffffffff82941000 R viapm_ca +ffffffff82941030 R viapm_ids +ffffffff82941070 r val_to_temp +ffffffff82941870 r val_to_uV.mult +ffffffff82942000 R amdiic_ca +ffffffff82942028 R amdiic_ids +ffffffff82943000 R nviic_ca +ffffffff82943030 R nviic_ids +ffffffff82944000 R sdhc_pci_ca +ffffffff82945000 R kate_ca +ffffffff82945030 r kate_proc +ffffffff82946000 R km_ca +ffffffff82946030 r km_devices +ffffffff82947000 R ksmn_ca +ffffffff82947030 r ksmn_devices +ffffffff82948000 R iosf_pci_ca +ffffffff82949000 R itherm_devices +ffffffff82949008 R itherm_ca +ffffffff8294a000 R pchtemp_ca +ffffffff8294a030 R pchtemp_devices +ffffffff8294b000 R rtsx_pci_ca +ffffffff8294c000 R xspd_ca +ffffffff8294c028 R xspd_devices +ffffffff8294d000 R virtio_pci_ca +ffffffff8294e000 R dwiic_pci_ca +ffffffff8294e030 R dwiic_pci_ids +ffffffff8294f000 R bwfm_pci_ca +ffffffff8294f030 r bwfm_pci_devices +ffffffff82950000 R ccp_pci_ca +ffffffff82950030 r ccp_pci_devices +ffffffff82951000 R bnxt_devices +ffffffff82951040 R bnxt_ca +ffffffff82952000 R mcx_ca +ffffffff82952030 r mcx_devices +ffffffff82952060 r mcx_rss_config +ffffffff829520d0 r mcx_eth_cap_map +ffffffff829522d0 r mcx_kstat_ppcnt_ieee8023 +ffffffff829522e8 r mcx_kstat_ppcnt_rfc2863 +ffffffff82952300 r mcx_kstat_ppcnt_rfc2819 +ffffffff82952318 r mcx_kstat_ppcnt_rfc3635 +ffffffff82952330 r mcx_ppcnt_ieee8023_tpl +ffffffff829524b0 r mcx_ppcnt_rfc2863_tpl +ffffffff829525c0 r mcx_ppcnt_rfc2819_tpl +ffffffff82952770 r mcx_ppcnt_rfc3635_tpl +ffffffff829528b0 r mcx_kstat_mtmp_tpl +ffffffff82952950 r mcx_kstat_mtmp_rate +ffffffff82952960 r mcx_queue_kstat_tpl +ffffffff82953000 R iavf_ca +ffffffff82953030 r iavf_devices +ffffffff82953040 r iavf_aq_regs +ffffffff829530b0 r iavf_link_speeds +ffffffff82954000 R rge_ca +ffffffff82954028 R rge_devices +ffffffff82954030 r rtl8125_mac_cfg2_ephy +ffffffff82954090 r rge_phy_config_mac_cfg3.mac_cfg3_a438_value +ffffffff829540b0 r rge_phy_config_mac_cfg3.mac_cfg3_b88e_value +ffffffff82954110 r rge_phy_config_mac_cfg4.mac_cfg4_b87c_value +ffffffff82954170 r rtl8125_mac_cfg4_ephy +ffffffff829541e0 r rtl8125_mac_cfg2_mcu +ffffffff82954e80 r rtl8125_mac_cfg3_mcu +ffffffff82955720 r rtl8125_mac_cfg4_mcu +ffffffff82957d10 r rtl8125_mac_cfg5_mcu +ffffffff82958c10 r rtl8125_mac_bps +ffffffff82958f80 r rtl8125b_mac_bps +ffffffff82959120 r rge_kstats_tpl +ffffffff8295a000 R igc_devices +ffffffff8295a040 R igc_ca +ffffffff8295b000 R ngbe_devices +ffffffff8295b008 R ngbe_ca +ffffffff8295c000 R com_pci_ca +ffffffff8295c030 R com_pci_ids +ffffffff8295d000 r agp_attach.agp_max +ffffffff8295d048 R agp_ca +ffffffff8295e000 R intagp_ca +ffffffff8295f000 r drm_plane_create_rotation_property.props +ffffffff82960000 r drm_bridge_priv_state_funcs +ffffffff82962000 r color_encoding_name +ffffffff82962020 r color_range_name +ffffffff82963000 r drm_subpixel_enum_list +ffffffff82963060 r drm_dpms_enum_list +ffffffff829630a0 r drm_dvi_i_select_enum_list +ffffffff829630d0 r drm_dvi_i_subconnector_enum_list +ffffffff82963100 r drm_tv_select_enum_list +ffffffff82963150 r drm_tv_subconnector_enum_list +ffffffff829631a0 r drm_dp_subconnector_enum_list +ffffffff82963210 r drm_link_status_enum_list +ffffffff82963230 r drm_scaling_mode_enum_list +ffffffff82963270 r drm_aspect_ratio_enum_list +ffffffff829632a0 r hdmi_colorspaces +ffffffff82963370 r dp_colorspaces +ffffffff82963450 r drm_content_type_enum_list +ffffffff829634a0 r drm_panel_orientation_enum_list +ffffffff829634e0 r privacy_screen_enum +ffffffff82964000 r drm_crtc_fence_ops +ffffffff82965000 r drm_dmt_modes +ffffffff82967940 r edid_cea_modes_1 +ffffffff8296b4d0 r edid_cea_modes_193 +ffffffff8296c180 r edid_quirk_list +ffffffff8296c360 r edid_4k_modes +ffffffff8296c5c0 r edid_est_modes +ffffffff8296cdc0 r est3_modes +ffffffff8296cf20 r stereo_mandatory_modes +ffffffff8296cfa0 r extra_modes +ffffffff8296d000 r drm_encoder_enum_list +ffffffff8296e000 r drm_fbdev_client_funcs +ffffffff8296e020 r drm_fb_helper_generic_funcs +ffffffff8296e028 r drm_fbdev_fb_ops +ffffffff8296f000 r drm_fb_xrgb8888_to_rgb332.dst_pixsize +ffffffff8296f004 r drm_fb_xrgb8888_to_rgb565.dst_pixsize +ffffffff8296f008 r drm_fb_xrgb8888_to_rgb888.dst_pixsize +ffffffff8296f00c r drm_fb_xrgb8888_to_xrgb2101010.dst_pixsize +ffffffff8296f010 r drm_fb_xrgb8888_to_gray8.dst_pixsize +ffffffff8296f014 r drm_fb_rgb888_to_xrgb8888.dst_pixsize +ffffffff8296f018 r drm_fb_rgb565_to_xrgb8888.dst_pixsize +ffffffff82970000 r __drm_format_info.formats +ffffffff82971000 R drm_pgops +ffffffff82972000 r drm_ioctls +ffffffff82974000 r dma_fence_stub_ops +ffffffff82974038 R dma_fence_array_ops +ffffffff82974070 R dma_fence_chain_ops +ffffffff829740a8 R dmabufops +ffffffff829740e0 R syncfileops +ffffffff82975000 r drm_plane_type_enum_list +ffffffff82976000 r drm_mode_status_names +ffffffff82977000 r primary_plane_funcs +ffffffff82977068 r safe_modeset_formats +ffffffff82978000 r orientation_data +ffffffff8297b5c0 r lcd800x1280_rightside_up +ffffffff8297b5d8 r lcd720x1280_rightside_up +ffffffff8297b5f0 r lcd800x1280_leftside_up +ffffffff8297b608 r lcd1080x1920_leftside_up +ffffffff8297b620 r lcd1200x1920_rightside_up +ffffffff8297b638 r gpd_micropc +ffffffff8297b650 r gpd_pocket +ffffffff8297b668 r gpd_pocket2 +ffffffff8297b680 r gpd_win +ffffffff8297b698 r gpd_win2 +ffffffff8297b6b0 r itworks_tw891 +ffffffff8297b6c8 r lcd1600x2560_rightside_up +ffffffff8297b6e0 r onegx1_pro +ffffffff8297b6f8 r lcd1600x2560_leftside_up +ffffffff8297b710 r lcd1280x1920_rightside_up +ffffffff8297b728 r .compoundliteral +ffffffff8297b738 r .compoundliteral.5 +ffffffff8297b760 r .compoundliteral.9 +ffffffff8297b780 r .compoundliteral.17 +ffffffff8297b7c0 r .compoundliteral.21 +ffffffff8297b7e0 r .compoundliteral.23 +ffffffff8297b7f0 r .compoundliteral.25 +ffffffff8297c000 r drm_gem_prime_dmabuf_ops +ffffffff8297e000 r is_hdmi_adaptor.dp_dual_mode_hdmi_id +ffffffff8297f000 r drm_dp_phy_name.phy_names +ffffffff8297f048 r drm_dp_i2c_algo +ffffffff8297f058 r drm_dp_i2c_lock_ops +ffffffff8297f070 r dp_aux_bl_ops +ffffffff8297f090 r dpcd_quirk_list +ffffffff8297f320 r drm_dp_psr_setup_time.psr_setup_time_us +ffffffff82980000 R drm_dp_mst_topology_state_funcs +ffffffff82980020 r drm_dp_mst_req_type_str.req_type_str +ffffffff829801f0 r drm_dp_mst_sideband_tx_state_str.sideband_reason_str +ffffffff82980220 r drm_dp_mst_nak_reason_str.nak_reason_str +ffffffff82980278 r drm_dp_mst_i2c_algo +ffffffff82981000 r hdmi_colorimetry_val +ffffffff82982000 r ttm_bo_init_reserved.sys_mem +ffffffff82983000 r ttm_bo_pipeline_gutting.sys_mem +ffffffff82984018 R ttm_bo_vm_ops +ffffffff82985000 r ttm_range_manager_func +ffffffff82986018 r ttm_kmap_iter_io_ops +ffffffff82986030 r ttm_kmap_iter_linear_io_ops +ffffffff82987000 r ttm_sys_manager_func +ffffffff82988000 r ttm_kmap_iter_tt_ops +ffffffff82989000 r drm_sched_fence_ops_scheduled +ffffffff82989038 r drm_sched_fence_ops_finished +ffffffff8298a000 R ch7017_ops +ffffffff8298b000 R ch7xxx_ops +ffffffff8298b060 r ch7xxx_ids +ffffffff8298c000 R ivch_ops +ffffffff8298c060 r backup_addresses +ffffffff8298d000 R ns2501_ops +ffffffff8298d060 r mode_agnostic_values +ffffffff8298d0e0 r ns2501_modes +ffffffff8298e000 R sil164_ops +ffffffff8298f000 R tfp410_ops +ffffffff82990000 r chv_dpll +ffffffff82990050 r vlv_dpll +ffffffff829900a0 r g4x_dpll +ffffffff829900f0 r pch_dpll +ffffffff82990138 r intel_dp_enc_funcs +ffffffff82991000 r intel_hdmi_enc_funcs +ffffffff82992000 r vlv_primary_formats +ffffffff82992030 r ivb_primary_formats +ffffffff82992050 r i965_primary_formats +ffffffff82992070 r i8xx_primary_formats +ffffffff82992080 r i965_plane_funcs +ffffffff829920e8 r i8xx_plane_funcs +ffffffff82993000 r gen11_dsi_encoder_funcs +ffffffff82993020 r gen11_dsi_connector_funcs +ffffffff82993098 r gen11_dsi_connector_helper_funcs +ffffffff829930e8 r gen11_dsi_host_ops +ffffffff82994000 r intel_plane_helper_funcs +ffffffff82995000 r g4x_audio_funcs +ffffffff82995010 r ilk_audio_funcs +ffffffff82995020 r hsw_audio_funcs +ffffffff82995030 r hdmi_audio_clock +ffffffff829950a0 r dp_aud_n_m +ffffffff82995250 r hdmi_aud_ncts_36bpp +ffffffff82995330 r hdmi_aud_ncts_30bpp +ffffffff82995410 r hdmi_aud_ncts_24bpp +ffffffff82996000 r intel_backlight_device_ops +ffffffff82996018 r bxt_pwm_funcs +ffffffff82996048 r cnp_pwm_funcs +ffffffff82996078 r lpt_pwm_funcs +ffffffff829960a8 r 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vce_v4_0_ip_funcs -ffffffff82b160a0 R vce_v4_0_ip_block -ffffffff82b160b8 r vce_v4_0_ring_vm_funcs -ffffffff82b161d8 r vce_v4_0_irq_funcs -ffffffff82b17000 r vcn_v1_0_ip_funcs -ffffffff82b170a0 R vcn_v1_0_ip_block -ffffffff82b170b8 r vcn_v1_0_dec_ring_vm_funcs -ffffffff82b171d8 r vcn_v1_0_enc_ring_vm_funcs -ffffffff82b172f8 r vcn_v1_0_irq_funcs -ffffffff82b18000 r vcn_v2_0_ip_funcs -ffffffff82b180a0 R vcn_v2_0_ip_block -ffffffff82b180b8 r vcn_v2_0_dec_ring_vm_funcs -ffffffff82b181d8 r vcn_v2_0_enc_ring_vm_funcs -ffffffff82b182f8 r vcn_v2_0_irq_funcs -ffffffff82b19000 r vcn_v2_5_ip_funcs -ffffffff82b190a0 R vcn_v2_5_ip_block -ffffffff82b190b8 r vcn_v2_6_ip_funcs -ffffffff82b19158 R vcn_v2_6_ip_block -ffffffff82b19170 R vcn_v2_6_ras_hw_ops -ffffffff82b191b0 r vcn_v2_5_dec_ring_vm_funcs -ffffffff82b192d0 r vcn_v2_6_dec_ring_vm_funcs -ffffffff82b193f0 r vcn_v2_5_enc_ring_vm_funcs -ffffffff82b19510 r vcn_v2_6_enc_ring_vm_funcs -ffffffff82b19630 r vcn_v2_5_irq_funcs -ffffffff82b1a000 r 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i830_info +ffffffff82a02160 r i845g_info +ffffffff82a02220 r i85x_info +ffffffff82a022e0 r i865g_info +ffffffff82a023a0 r i915g_info +ffffffff82a02460 r i915gm_info +ffffffff82a02520 r i945g_info +ffffffff82a025e0 r i945gm_info +ffffffff82a026a0 r i965g_info +ffffffff82a02760 r g33_info +ffffffff82a02820 r i965gm_info +ffffffff82a028e0 r gm45_info +ffffffff82a029a0 r g45_info +ffffffff82a02a60 r pnv_g_info +ffffffff82a02b20 r pnv_m_info +ffffffff82a02be0 r ilk_d_info +ffffffff82a02ca0 r ilk_m_info +ffffffff82a02d60 r snb_d_gt1_info +ffffffff82a02e20 r snb_d_gt2_info +ffffffff82a02ee0 r snb_m_gt1_info +ffffffff82a02fa0 r snb_m_gt2_info +ffffffff82a03060 r ivb_q_info +ffffffff82a03120 r ivb_m_gt1_info +ffffffff82a031e0 r ivb_m_gt2_info +ffffffff82a032a0 r ivb_d_gt1_info +ffffffff82a03360 r ivb_d_gt2_info +ffffffff82a03420 r hsw_gt1_info +ffffffff82a034e0 r hsw_gt2_info +ffffffff82a035a0 r hsw_gt3_info +ffffffff82a03660 r vlv_info +ffffffff82a03720 r bdw_gt1_info +ffffffff82a037e0 r bdw_gt2_info +ffffffff82a038a0 r bdw_gt3_info +ffffffff82a03960 r bdw_rsvd_info +ffffffff82a03a20 r chv_info +ffffffff82a03ae0 r skl_gt1_info +ffffffff82a03ba0 r skl_gt2_info +ffffffff82a03c60 r skl_gt3_info +ffffffff82a03d20 r skl_gt4_info +ffffffff82a03de0 r bxt_info +ffffffff82a03ea0 r glk_info +ffffffff82a03f60 r kbl_gt1_info +ffffffff82a04020 r kbl_gt2_info +ffffffff82a040e0 r kbl_gt3_info +ffffffff82a041a0 r cfl_gt1_info +ffffffff82a04260 r cfl_gt2_info +ffffffff82a04320 r cfl_gt3_info +ffffffff82a043e0 r cml_gt1_info +ffffffff82a044a0 r cml_gt2_info +ffffffff82a04560 r icl_info +ffffffff82a04620 r ehl_info +ffffffff82a046e0 r jsl_info +ffffffff82a047a0 r tgl_info +ffffffff82a04860 r rkl_info +ffffffff82a04920 r adl_s_info +ffffffff82a049e0 r adl_p_info +ffffffff82a04aa0 r dg1_info +ffffffff82a04b60 r dg2_info +ffffffff82a04c20 r ats_m_info +ffffffff82a04ce0 r xelpmp_extra_gt +ffffffff82a04d20 r mtl_info +ffffffff82a05000 r oa_formats +ffffffff82a05060 r gen8_update_reg_state_unlocked.flex_regs +ffffffff82a05080 r gen8_oa_mux_regs +ffffffff82a050a0 r gen12_oa_b_counters +ffffffff82a050e0 r gen12_oa_mux_regs +ffffffff82a06000 r i915_query_funcs +ffffffff82a07000 R i915_fence_ops +ffffffff82a08000 r rsgt_ops +ffffffff82a09000 r fence_ops +ffffffff82a0a000 r i915_ttm_buddy_manager_func +ffffffff82a0b000 r bind_ops +ffffffff82a0c000 r platform_names +ffffffff82a0c140 r subplatform_ult_ids +ffffffff82a0d000 r intel_dram_type_str.str +ffffffff82a0e000 r intel_region_map +ffffffff82a10000 r pvc_clock_gating_funcs +ffffffff82a10008 r dg2_clock_gating_funcs +ffffffff82a10010 r xehpsdv_clock_gating_funcs +ffffffff82a10018 r adlp_clock_gating_funcs +ffffffff82a10020 r dg1_clock_gating_funcs +ffffffff82a10028 r gen12lp_clock_gating_funcs +ffffffff82a10030 r icl_clock_gating_funcs +ffffffff82a10038 r cfl_clock_gating_funcs +ffffffff82a10040 r skl_clock_gating_funcs +ffffffff82a10048 r kbl_clock_gating_funcs +ffffffff82a10050 r bxt_clock_gating_funcs +ffffffff82a10058 r glk_clock_gating_funcs +ffffffff82a10060 r bdw_clock_gating_funcs +ffffffff82a10068 r chv_clock_gating_funcs +ffffffff82a10070 r hsw_clock_gating_funcs +ffffffff82a10078 r ivb_clock_gating_funcs +ffffffff82a10080 r vlv_clock_gating_funcs +ffffffff82a10088 r gen6_clock_gating_funcs +ffffffff82a10090 r ilk_clock_gating_funcs +ffffffff82a10098 r g4x_clock_gating_funcs +ffffffff82a100a0 r i965gm_clock_gating_funcs +ffffffff82a100a8 r i965g_clock_gating_funcs +ffffffff82a100b0 r gen3_clock_gating_funcs +ffffffff82a100b8 r i85x_clock_gating_funcs +ffffffff82a100c0 r i830_clock_gating_funcs +ffffffff82a100c8 r nop_clock_gating_funcs +ffffffff82a100d0 r ilk_wm_funcs +ffffffff82a10108 r nop_funcs +ffffffff82a10140 r vlv_wm_funcs +ffffffff82a10178 r g4x_wm_funcs +ffffffff82a101b0 r pnv_wm_funcs +ffffffff82a101e8 r i965_wm_funcs +ffffffff82a10220 r i9xx_wm_funcs +ffffffff82a10258 r i845_wm_funcs +ffffffff82a10290 r cxsr_latency_table +ffffffff82a11000 r dg2_g10_revid_step_tbl +ffffffff82a11030 r dg2_g11_revid_step_tbl +ffffffff82a11050 r xehpsdv_revids +ffffffff82a11080 r adlp_revids +ffffffff82a110c0 r adls_rpls_revids +ffffffff82a11100 r adls_revids +ffffffff82a11140 r rkl_revids +ffffffff82a11160 r bxt_revids +ffffffff82a111a0 r skl_revids +ffffffff82a111d0 r pvc_bd_subids +ffffffff82a111f0 r pvc_ct_subids +ffffffff82a13000 r forcewake_domain_names +ffffffff82a13080 r __pvc_fw_ranges +ffffffff82a13200 r pvc_shadowed_regs +ffffffff82a13320 r __dg2_fw_ranges +ffffffff82a135f0 r dg2_shadowed_regs +ffffffff82a13710 r __xehp_fw_ranges +ffffffff82a139e0 r gen12_shadowed_regs +ffffffff82a13b00 r __gen12_fw_ranges +ffffffff82a13d10 r __gen11_fw_ranges +ffffffff82a13ec0 r gen11_shadowed_regs +ffffffff82a13f80 r __gen9_fw_ranges +ffffffff82a14100 r gen8_shadowed_regs +ffffffff82a14130 r __chv_fw_ranges +ffffffff82a141f0 r __gen6_fw_ranges +ffffffff82a14200 r __vlv_fw_ranges +ffffffff82a14258 r uncore_get_fallback +ffffffff82a14260 r uncore_get_normal +ffffffff82a14268 r uncore_get_thread_status +ffffffff82a15000 r atom_op_names +ffffffff82a153e0 r opcode_table +ffffffff82a15b90 r atom_dst_to_src +ffffffff82a15c10 r atom_io_names +ffffffff82a15c40 r atom_table_names +ffffffff82a15e90 r atom_iio_len +ffffffff82a16000 r vga_control_regs +ffffffff82a16018 r atombios_helper_funcs +ffffffff82a17000 r voltage_names +ffffffff82a17020 r pre_emph_names +ffffffff82a18000 r radeon_atom_backlight_ops +ffffffff82a18018 r radeon_atom_enc_funcs +ffffffff82a18038 r radeon_atom_dig_helper_funcs +ffffffff82a180a0 r radeon_atom_dac_helper_funcs +ffffffff82a18108 r radeon_atom_ext_helper_funcs +ffffffff82a19000 r caicos_cgcg_cgls_default +ffffffff82a19240 r barts_mgcg_default +ffffffff82a19900 r turks_mgcg_default +ffffffff82a19d80 r caicos_mgcg_default +ffffffff82a1a110 r turks_sysls_default +ffffffff82a1a1d0 r caicos_sysls_default +ffffffff82a1a280 r caicos_cgcg_cgls_enable +ffffffff82a1a4d0 r caicos_cgcg_cgls_disable +ffffffff82a1a730 r barts_mgcg_enable +ffffffff82a1a7b0 r turks_mgcg_enable +ffffffff82a1a830 r caicos_mgcg_enable +ffffffff82a1a8b0 r caicos_mgcg_disable +ffffffff82a1a930 r turks_sysls_enable +ffffffff82a1a9f0 r caicos_sysls_enable +ffffffff82a1aaa0 r turks_sysls_disable +ffffffff82a1ab60 r caicos_sysls_disable +ffffffff82a1b000 r didt_config_ci +ffffffff82a1b5b4 r defaults_bonaire_xt +ffffffff82a1b600 r defaults_saturn_xt +ffffffff82a1b64c r defaults_hawaii_xt +ffffffff82a1b698 r defaults_hawaii_pro +ffffffff82a1c000 r ci_program_jump_on_start.data +ffffffff82a1d000 r bonaire_io_mc_regs +ffffffff82a1d120 r hawaii_io_mc_regs +ffffffff82a1d1d0 r mc_cg_registers +ffffffff82a1d200 r bonaire_mgcg_cgcg_init +ffffffff82a1d5e0 r bonaire_golden_registers +ffffffff82a1d7d0 r bonaire_golden_common_registers +ffffffff82a1d800 r bonaire_golden_spm_registers +ffffffff82a1d810 r kalindi_mgcg_cgcg_init +ffffffff82a1dab0 r kalindi_golden_registers +ffffffff82a1dc20 r kalindi_golden_common_registers +ffffffff82a1dc50 r kalindi_golden_spm_registers +ffffffff82a1dc60 r godavari_golden_registers +ffffffff82a1dde0 r spectre_mgcg_cgcg_init +ffffffff82a1e200 r spectre_golden_registers +ffffffff82a1e330 r spectre_golden_common_registers +ffffffff82a1e360 r spectre_golden_spm_registers +ffffffff82a1e370 r hawaii_mgcg_cgcg_init +ffffffff82a1e880 r hawaii_golden_registers +ffffffff82a1ea30 r hawaii_golden_common_registers +ffffffff82a1ea6c r hawaii_golden_spm_registers +ffffffff82a1ea80 r spectre_rlc_save_restore_register_list +ffffffff82a1f170 r kalindi_rlc_save_restore_register_list +ffffffff82a1f680 r ci_cs_data +ffffffff82a1f6a0 r ci_SECT_CONTEXT_defs +ffffffff82a1f720 r ci_SECT_CONTEXT_def_1 +ffffffff82a1fa70 r ci_SECT_CONTEXT_def_3 +ffffffff82a1fa90 r ci_SECT_CONTEXT_def_4 +ffffffff82a1fd04 r ci_SECT_CONTEXT_def_5 +ffffffff82a1fd0c r ci_SECT_CONTEXT_def_6 +ffffffff82a1fd10 r ci_SECT_CONTEXT_def_2 +ffffffff82a20160 r ci_SECT_CONTEXT_def_7 +ffffffff82a20510 r cik_default_state +ffffffff82a22000 r dce3_2_afmt_write_sad_regs.eld_reg_to_type +ffffffff82a23000 r dce6_afmt_write_sad_regs.eld_reg_to_type +ffffffff82a24000 r ni_tx_offsets +ffffffff82a24020 r evergreen_dp_offsets +ffffffff82a24040 r evergreen_disp_int_status +ffffffff82a24060 r evergreen_golden_registers +ffffffff82a24260 r evergreen_golden_registers2 +ffffffff82a24310 r cypress_mgcg_init +ffffffff82a24a10 r juniper_mgcg_init +ffffffff82a24e80 r redwood_mgcg_init +ffffffff82a251b0 r cedar_golden_registers +ffffffff82a25390 r cedar_mgcg_init +ffffffff82a255f0 r wrestler_golden_registers +ffffffff82a25840 r supersumo_golden_registers +ffffffff82a25ba0 r sumo_golden_registers +ffffffff82a25be0 r barts_golden_registers +ffffffff82a25e00 r turks_golden_registers +ffffffff82a26040 r caicos_golden_registers +ffffffff82a26280 r sumo_rlc_save_restore_register_list +ffffffff82a263d0 r evergreen_cs_data +ffffffff82a26410 r SECT_CONTEXT_defs +ffffffff82a26490 r SECT_CLEAR_defs +ffffffff82a264b0 r SECT_CTRLCONST_defs +ffffffff82a264d0 r SECT_CONTEXT_def_2 +ffffffff82a264f0 r SECT_CONTEXT_def_4 +ffffffff82a26680 r SECT_CONTEXT_def_5 +ffffffff82a266a0 r SECT_CONTEXT_def_6 +ffffffff82a26780 r SECT_CONTEXT_def_1 +ffffffff82a26f20 r SECT_CONTEXT_def_3 +ffffffff82a27000 r SECT_CONTEXT_def_7 +ffffffff82a27488 r SECT_CLEAR_def_1 +ffffffff82a27494 r SECT_CTRLCONST_def_1 +ffffffff82a274a0 r evergreen_default_state +ffffffff82a28000 r cayman_reg_safe_bm +ffffffff82a2a000 r evergreen_reg_safe_bm +ffffffff82a2d000 r evergreen_hdmi_write_sad_regs.eld_reg_to_type +ffffffff82a2e000 r didt_config_kv +ffffffff82a2f000 r barts_io_mc_regs +ffffffff82a2f0f0 r turks_io_mc_regs +ffffffff82a2f1e0 r caicos_io_mc_regs +ffffffff82a2f2d0 r cayman_io_mc_regs +ffffffff82a2f3c0 r cayman_golden_registers +ffffffff82a2f580 r cayman_golden_registers2 +ffffffff82a2f5d0 r dvst_golden_registers +ffffffff82a2f860 r dvst_golden_registers2 +ffffffff82a2f890 r scrapper_golden_registers +ffffffff82a2fd70 r tn_rlc_save_restore_register_list +ffffffff82a2ff60 r cayman_cs_data +ffffffff82a2ffa0 r SECT_CONTEXT_defs +ffffffff82a30020 r SECT_CLEAR_defs +ffffffff82a30040 r SECT_CTRLCONST_defs +ffffffff82a30060 r SECT_CONTEXT_def_2 +ffffffff82a30080 r SECT_CONTEXT_def_4 +ffffffff82a30210 r SECT_CONTEXT_def_5 +ffffffff82a30230 r SECT_CONTEXT_def_1 +ffffffff82a309d0 r SECT_CONTEXT_def_3 +ffffffff82a30ab0 r SECT_CONTEXT_def_6 +ffffffff82a30b90 r SECT_CONTEXT_def_7 +ffffffff82a31018 r SECT_CLEAR_def_1 +ffffffff82a31024 r SECT_CTRLCONST_def_1 +ffffffff82a31030 r cayman_default_state +ffffffff82a32000 r cac_weights_cayman_xt +ffffffff82a32128 r cac_weights_cayman_pro +ffffffff82a32250 r cac_weights_cayman_le +ffffffff82a32380 r cayman_cgcg_cgls_default +ffffffff82a325c0 r cayman_mgcg_default +ffffffff82a32f20 r cayman_sysls_default +ffffffff82a32ff0 r cayman_cgcg_cgls_enable +ffffffff82a33240 r cayman_cgcg_cgls_disable +ffffffff82a334a0 r cayman_mgcg_enable +ffffffff82a33520 r cayman_mgcg_disable +ffffffff82a335a0 r cayman_sysls_enable +ffffffff82a33670 r cayman_sysls_disable +ffffffff82a34000 r rn50_reg_safe_bm +ffffffff82a341a0 r r100_reg_safe_bm +ffffffff82a35000 r r200_reg_safe_bm +ffffffff82a36000 r r300_reg_safe_bm +ffffffff82a37000 r r420_reg_safe_bm +ffffffff82a39000 r color_formats_table +ffffffff82a39480 r r600_reg_safe_bm +ffffffff82a3c000 R r600_utc +ffffffff82a3c040 R r600_dtc +ffffffff82a3c080 r r600_encode_pci_lane_width.encoded_lanes +ffffffff82a3e000 r r100_gfx_ring +ffffffff82a3e070 r r300_gfx_ring +ffffffff82a3e0e0 r rv515_gfx_ring +ffffffff82a3e150 r r600_gfx_ring +ffffffff82a3e1c0 r r600_dma_ring +ffffffff82a3e230 r rv6xx_uvd_ring +ffffffff82a3e2a0 r rv770_uvd_ring +ffffffff82a3e310 r evergreen_gfx_ring +ffffffff82a3e380 r evergreen_dma_ring +ffffffff82a3e3f0 r cayman_gfx_ring +ffffffff82a3e460 r cayman_dma_ring +ffffffff82a3e4d0 r cayman_uvd_ring +ffffffff82a3e540 r trinity_vce_ring +ffffffff82a3e5b0 r si_gfx_ring +ffffffff82a3e620 r si_dma_ring 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radeon_lvds_bridge_connector_funcs +ffffffff82a43310 r radeon_vga_connector_funcs +ffffffff82a43388 r radeon_dvi_connector_funcs +ffffffff82a43400 r radeon_edp_connector_funcs +ffffffff82a43478 r radeon_tv_connector_funcs +ffffffff82a434f0 r radeon_lvds_connector_funcs +ffffffff82a44000 r radeon_family_name +ffffffff82a443f0 r radeon_px_quirk_list +ffffffff82a45000 r radeon_fb_funcs +ffffffff82a45018 r radeon_mode_funcs +ffffffff82a45060 r radeon_tmds_pll_enum_list +ffffffff82a45080 r radeon_tv_std_enum_list +ffffffff82a45100 r radeon_underscan_enum_list +ffffffff82a45130 r radeon_audio_enum_list +ffffffff82a45160 r radeon_dither_enum_list +ffffffff82a45180 r radeon_output_csc_enum_list +ffffffff82a451c0 r radeon_crtc_funcs +ffffffff82a45280 r hpd_names +ffffffff82a452b0 r encoder_names +ffffffff82a453e0 r radeon_afmt_init.eg_offsets +ffffffff82a46000 r aux_offset +ffffffff82a47000 R radeondrm_ca +ffffffff82a47030 r pciidlist +ffffffff82a4b1d0 r kms_driver +ffffffff82a4b2c0 r radeon_ioctls_kms +ffffffff82a4c000 r radeon_fb_helper_funcs +ffffffff82a4c008 r radeonfb_ops +ffffffff82a4d000 R radeon_fence_ops +ffffffff82a4f000 R radeon_gem_object_funcs +ffffffff82a4f060 r radeon_gem_vm_ops +ffffffff82a50000 r radeon_i2c_algo +ffffffff82a50010 r radeon_atom_i2c_algo +ffffffff82a51000 r legacy_helper_funcs +ffffffff82a52000 r radeon_backlight_ops +ffffffff82a52018 r radeon_legacy_lvds_enc_funcs +ffffffff82a52038 r radeon_legacy_lvds_helper_funcs +ffffffff82a520a0 r radeon_legacy_tmds_int_enc_funcs +ffffffff82a520c0 r radeon_legacy_tmds_int_helper_funcs +ffffffff82a52128 r radeon_legacy_primary_dac_enc_funcs +ffffffff82a52148 r radeon_legacy_primary_dac_helper_funcs +ffffffff82a521b0 r radeon_legacy_tv_dac_enc_funcs +ffffffff82a521d0 r radeon_legacy_tv_dac_helper_funcs +ffffffff82a52238 r radeon_legacy_tmds_ext_enc_funcs +ffffffff82a52258 r radeon_legacy_tmds_ext_helper_funcs +ffffffff82a53000 r SLOPE_value +ffffffff82a53030 r YCOEF_EN_value +ffffffff82a53060 r YCOEF_value +ffffffff82a53090 r available_tv_modes +ffffffff82a53110 r hor_timing_NTSC +ffffffff82a53150 r vert_timing_NTSC +ffffffff82a53190 r hor_timing_PAL +ffffffff82a531d0 r vert_timing_PAL +ffffffff82a55000 r radeon_pm_state_type_name +ffffffff82a56000 r radeon_evict_flags.placements +ffffffff82a59000 r rs600_reg_safe_bm +ffffffff82a5b000 r rv515_reg_safe_bm +ffffffff82a5c000 r dll_speed_table +ffffffff82a5d000 r r7xx_golden_registers +ffffffff82a5d090 r r7xx_golden_dyn_gpr_registers +ffffffff82a5d100 r rv770ce_golden_registers +ffffffff82a5d160 r rv770_golden_registers +ffffffff82a5d1b0 r rv770_mgcg_init +ffffffff82a5d8f0 r rv730_golden_registers +ffffffff82a5d950 r rv730_mgcg_init +ffffffff82a5dee0 r rv710_golden_registers +ffffffff82a5df30 r rv710_mgcg_init +ffffffff82a5e1d0 r rv740_golden_registers +ffffffff82a5e360 r rv740_mgcg_init +ffffffff82a60000 r rv730_smc_int_vectors +ffffffff82a60040 r rv710_smc_int_vectors +ffffffff82a60080 r rv740_smc_int_vectors +ffffffff82a600c0 r cypress_smc_int_vectors +ffffffff82a60100 r caicos_smc_int_vectors +ffffffff82a60140 r cayman_smc_int_vectors +ffffffff82a61000 r tahiti_io_mc_regs +ffffffff82a61120 r pitcairn_io_mc_regs +ffffffff82a61240 r verde_io_mc_regs +ffffffff82a61360 r oland_io_mc_regs +ffffffff82a61480 r hainan_io_mc_regs +ffffffff82a615a0 r crtc_offsets +ffffffff82a615c0 r si_disp_int_status +ffffffff82a615e0 r tahiti_golden_registers +ffffffff82a61760 r tahiti_golden_rlc_registers +ffffffff82a617b0 r tahiti_mgcg_cgcg_init +ffffffff82a61d98 r tahiti_golden_registers2 +ffffffff82a61db0 r pitcairn_golden_registers +ffffffff82a61f00 r pitcairn_golden_rlc_registers +ffffffff82a61f40 r pitcairn_mgcg_cgcg_init +ffffffff82a623b0 r verde_golden_registers +ffffffff82a62620 r verde_golden_rlc_registers +ffffffff82a62660 r verde_mgcg_cgcg_init +ffffffff82a62ae0 r oland_golden_registers +ffffffff82a62c30 r oland_golden_rlc_registers +ffffffff82a62c70 r oland_mgcg_cgcg_init +ffffffff82a63000 r hainan_golden_registers +ffffffff82a6312c r hainan_golden_registers2 +ffffffff82a63140 r hainan_mgcg_cgcg_init +ffffffff82a634b0 r verde_rlc_save_restore_register_list +ffffffff82a63820 r si_cs_data +ffffffff82a63840 r si_SECT_CONTEXT_defs +ffffffff82a638c0 r si_SECT_CONTEXT_def_1 +ffffffff82a63c10 r si_SECT_CONTEXT_def_3 +ffffffff82a63c30 r si_SECT_CONTEXT_def_4 +ffffffff82a63ea4 r si_SECT_CONTEXT_def_5 +ffffffff82a63ea8 r si_SECT_CONTEXT_def_6 +ffffffff82a63eb0 r si_SECT_CONTEXT_def_2 +ffffffff82a642f0 r si_SECT_CONTEXT_def_7 +ffffffff82a646a0 r mc_cg_registers +ffffffff82a646d0 r si_default_state +ffffffff82a65000 r cac_weights_tahiti +ffffffff82a654d0 r lcac_tahiti +ffffffff82a65ba0 r cac_override_tahiti +ffffffff82a65bb4 r powertune_data_tahiti +ffffffff82a65bf0 r dte_data_tahiti +ffffffff82a65cc0 r dte_data_new_zealand +ffffffff82a65d90 r dte_data_malta +ffffffff82a65e60 r lcac_pitcairn +ffffffff82a66530 r cac_override_pitcairn +ffffffff82a66544 r powertune_data_pitcairn +ffffffff82a66580 r lcac_cape_verde +ffffffff82a669d0 r cac_override_cape_verde +ffffffff82a669e4 r powertune_data_cape_verde +ffffffff82a66a20 r cac_weights_cape_verde_pro +ffffffff82a66ef0 r cac_weights_heathrow +ffffffff82a673c0 r cac_weights_chelsea_xt +ffffffff82a67890 r cac_weights_chelsea_pro +ffffffff82a67d60 r cac_weights_cape_verde +ffffffff82a68230 r cac_weights_mars_pro +ffffffff82a68700 r lcac_mars_pro +ffffffff82a68a60 r cac_override_oland +ffffffff82a68a74 r powertune_data_mars_pro +ffffffff82a68ab0 r cac_weights_mars_xt +ffffffff82a68f80 r cac_weights_oland_pro +ffffffff82a69450 r cac_weights_oland_xt +ffffffff82a69920 r lcac_oland +ffffffff82a69c7c r powertune_data_oland +ffffffff82a69cb8 r dte_data_oland +ffffffff82a69d90 r cac_weights_hainan +ffffffff82a6a254 r powertune_data_hainan +ffffffff82a6a290 r dte_data_aruba_pro +ffffffff82a6a360 r dte_data_tahiti_pro +ffffffff82a6a430 r dte_data_curacao_pro +ffffffff82a6a500 r dte_data_neptune_xt +ffffffff82a6a5d0 r dte_data_sun_xt +ffffffff82a6a6a0 r dte_data_venus_xtx +ffffffff82a6a770 r dte_data_venus_xt +ffffffff82a6a840 r dte_data_venus_pro +ffffffff82a6a910 r dte_data_mars_pro +ffffffff82a6b000 r si_program_jump_on_start.data +ffffffff82a6c000 r sumo_dtc +ffffffff82a6d000 r trinity_mgcg_shls_default +ffffffff82a6d380 r trinity_sysls_enable +ffffffff82a6d450 r trinity_sysls_disable +ffffffff82a6f000 r GC_BASE +ffffffff82a6f0a8 r HDP_BASE +ffffffff82a6f150 r MMHUB_BASE +ffffffff82a6f1f8 r ATHUB_BASE +ffffffff82a6f2a0 r NBIO_BASE +ffffffff82a6f348 r MP0_BASE +ffffffff82a6f3f0 r MP1_BASE +ffffffff82a6f498 r DF_BASE +ffffffff82a6f540 r OSSSYS_BASE +ffffffff82a6f5e8 r SDMA0_BASE +ffffffff82a6f690 r SDMA1_BASE +ffffffff82a6f738 r SDMA2_BASE +ffffffff82a6f7e0 r SDMA3_BASE +ffffffff82a6f888 r SDMA4_BASE +ffffffff82a6f930 r SMUIO_BASE +ffffffff82a6f9d8 r THM_BASE +ffffffff82a6fa80 r UMC_BASE +ffffffff82a6fb28 r VCN_BASE +ffffffff82a70000 r amdgpu_afmt_predefined_acr +ffffffff82a71000 r atom_op_names +ffffffff82a713e0 r opcode_table +ffffffff82a71bd0 r atom_dst_to_src +ffffffff82a71c50 r atom_io_names +ffffffff82a71c80 r atom_table_names +ffffffff82a71ed0 r atom_iio_len +ffffffff82a72000 r object_connector_convert +ffffffff82a72058 R amdgpu_vbios_version_attr_group +ffffffff82a73000 r voltage_names +ffffffff82a73020 r pre_emph_names +ffffffff82a74000 r amdgpu_atombios_encoder_backlight_ops +ffffffff82a76000 r amdgpu_benchmark.common_modes +ffffffff82a77000 r amdgpu_cgs_ops +ffffffff82a78000 r amdgpu_connector_dp_helper_funcs +ffffffff82a78050 r amdgpu_connector_vga_helper_funcs +ffffffff82a780a0 r amdgpu_connector_dvi_helper_funcs +ffffffff82a780f0 r amdgpu_connector_lvds_helper_funcs +ffffffff82a78140 r amdgpu_connector_dp_funcs +ffffffff82a781c0 r amdgpu_connector_add_common_modes.common_modes +ffffffff82a78248 r amdgpu_connector_edp_funcs +ffffffff82a782c0 r amdgpu_connector_vga_funcs +ffffffff82a78338 r amdgpu_connector_dvi_funcs +ffffffff82a783b0 r amdgpu_connector_lvds_funcs +ffffffff82a7a000 R amdgpu_ctx_num_entities +ffffffff82a7b000 r amdgpu_kms_driver +ffffffff82a7b0f0 r amdgpu_device_ip_reinit_late_sriov.ip_order +ffffffff82a7c000 r hw_id_map +ffffffff82a7c090 r hw_id_names +ffffffff82a7d000 r hpd_names +ffffffff82a7d030 r encoder_names +ffffffff82a7d180 r dcc_retile_formats +ffffffff82a7d270 r dcc_formats +ffffffff82a7d360 R amdgpu_mode_funcs +ffffffff82a7d3b0 r amdgpu_underscan_enum_list +ffffffff82a7d3e0 r amdgpu_audio_enum_list +ffffffff82a7d410 r amdgpu_dither_enum_list +ffffffff82a7d430 r amdgpu_fb_funcs_atomic +ffffffff82a7d448 r amdgpu_fb_funcs +ffffffff82a7e000 R amdgpu_dmabuf_ops +ffffffff82a7f000 R amdgpu_ioctls_kms +ffffffff82a7f210 R amdgpu_ca +ffffffff82a7f240 r pciidlist +ffffffff82a80110 r amdgpu_unsupported_pciidlist +ffffffff82a80690 r amdgpu_kms_driver +ffffffff82a81000 r amdgpu_job_fence_ops +ffffffff82a81038 r amdgpu_fence_ops +ffffffff82a82000 r amdgpu_gem_object_funcs +ffffffff82a82060 r amdgpu_gem_vm_ops +ffffffff82a84000 R amdgpu_gtt_mgr_attr_group +ffffffff82a84018 r amdgpu_gtt_mgr_func +ffffffff82a85000 r amdgpu_atombios_i2c_algo +ffffffff82a86000 R amdgpu_sched_ops +ffffffff82a89000 r amdgpu_vram_names +ffffffff82a8a000 r amdgpu_preempt_mgr_func +ffffffff82a8b000 R psp_ip_funcs +ffffffff82a8b0a0 R psp_v3_1_ip_block +ffffffff82a8b0b8 R psp_v10_0_ip_block +ffffffff82a8b0d0 R psp_v11_0_ip_block +ffffffff82a8b0e8 R psp_v11_0_8_ip_block +ffffffff82a8b100 R psp_v12_0_ip_block +ffffffff82a8b118 R psp_v13_0_ip_block +ffffffff82a8b130 R psp_v13_0_4_ip_block +ffffffff82a8d000 r amdgpu_evict_flags.placements +ffffffff82a91000 R amdgpu_vkms_ip_block +ffffffff82a93000 R amdgpu_vm_cpu_funcs +ffffffff82a95000 R amdgpu_vm_sdma_funcs +ffffffff82a96000 R amdgpu_vram_mgr_attr_group +ffffffff82a96018 r amdgpu_vram_mgr_func +ffffffff82a97000 r xgmi_pcs_err_status_reg_arct +ffffffff82a98000 r GC_BASE +ffffffff82a980c0 r HDP_BASE +ffffffff82a98180 r MMHUB_BASE +ffffffff82a98240 r ATHUB_BASE +ffffffff82a98300 r NBIF0_BASE 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dce_v10_0_ext_helper_funcs +ffffffff82a9b2c0 r dce_v10_0_audio_write_sad_regs.eld_reg_to_type +ffffffff82a9b2f0 r dce_v10_0_crtc_irq_funcs +ffffffff82a9b300 r dce_v10_0_pageflip_irq_funcs +ffffffff82a9b310 r dce_v10_0_hpd_irq_funcs +ffffffff82a9b320 r interrupt_status_offsets +ffffffff82a9b380 r dce_v10_0_crtc_funcs +ffffffff82a9b440 r dce_v10_0_crtc_helper_funcs +ffffffff82a9b4c0 r vga_control_regs +ffffffff82a9b4e0 r dig_offsets +ffffffff82a9b500 r pin_offsets +ffffffff82a9b520 r fiji_mgcg_cgcg_init +ffffffff82a9b540 r golden_settings_fiji_a10 +ffffffff82a9b570 r tonga_mgcg_cgcg_init +ffffffff82a9b590 r golden_settings_tonga_a11 +ffffffff82a9c000 r crtc_offsets +ffffffff82a9c020 r dce_v11_0_ip_funcs +ffffffff82a9c0c0 R dce_v11_0_ip_block +ffffffff82a9c0d8 R dce_v11_2_ip_block +ffffffff82a9c0f0 r dce_v11_0_display_funcs +ffffffff82a9c150 r hpd_offsets +ffffffff82a9c168 r dce_v11_0_encoder_funcs +ffffffff82a9c188 r dce_v11_0_dac_helper_funcs +ffffffff82a9c1f0 r dce_v11_0_dig_helper_funcs +ffffffff82a9c258 r dce_v11_0_ext_helper_funcs +ffffffff82a9c2c0 r dce_v11_0_audio_write_sad_regs.eld_reg_to_type +ffffffff82a9c2f0 r dce_v11_0_crtc_irq_funcs +ffffffff82a9c300 r dce_v11_0_pageflip_irq_funcs +ffffffff82a9c310 r dce_v11_0_hpd_irq_funcs +ffffffff82a9c320 r interrupt_status_offsets +ffffffff82a9c380 r dce_v11_0_crtc_funcs +ffffffff82a9c440 r dce_v11_0_crtc_helper_funcs +ffffffff82a9c4c0 r vga_control_regs +ffffffff82a9c4e0 r dig_offsets +ffffffff82a9c510 r cz_mgcg_cgcg_init +ffffffff82a9c530 r cz_golden_settings_a11 +ffffffff82a9c550 r stoney_golden_settings_a11 +ffffffff82a9c570 r polaris11_golden_settings_a11 +ffffffff82a9c5b0 r polaris10_golden_settings_a11 +ffffffff82a9d000 R df_v1_7_funcs +ffffffff82a9d070 r df_v1_7_channel_number +ffffffff82a9e000 R df_v3_6_funcs +ffffffff82a9e070 r df_v3_6_channel_number +ffffffff82a9f000 r GC_BASE +ffffffff82a9f0a8 r HDP_BASE +ffffffff82a9f150 r MMHUB_BASE +ffffffff82a9f1f8 r ATHUB_BASE +ffffffff82a9f2a0 r NBIO_BASE +ffffffff82a9f348 r MP0_BASE +ffffffff82a9f3f0 r MP1_BASE +ffffffff82a9f498 r VCN0_BASE +ffffffff82a9f540 r DF_BASE +ffffffff82a9f5e8 r DCN_BASE +ffffffff82a9f690 r OSSSYS_BASE +ffffffff82a9f738 r SMUIO_BASE +ffffffff82a9f7e0 r THM_BASE +ffffffff82aa0000 r gfx_v10_0_ip_funcs +ffffffff82aa00a0 R gfx_v10_0_ip_block +ffffffff82aa00b8 r gfx_v10_0_kiq_pm4_funcs +ffffffff82aa00f8 r gfx_v10_0_ring_funcs_kiq +ffffffff82aa0218 r gfx_v10_0_ring_funcs_gfx +ffffffff82aa0338 r gfx_v10_0_ring_funcs_compute +ffffffff82aa0458 r gfx_v10_0_eop_irq_funcs +ffffffff82aa0468 r gfx_v10_0_kiq_irq_funcs +ffffffff82aa0478 r gfx_v10_0_priv_reg_irq_funcs +ffffffff82aa0488 r gfx_v10_0_priv_inst_irq_funcs +ffffffff82aa0498 r gfx_v10_0_rlc_funcs +ffffffff82aa0500 r gfx_v10_0_rlc_funcs_sriov +ffffffff82aa0570 r gfx10_cs_data +ffffffff82aa0590 r gfx10_SECT_CONTEXT_defs +ffffffff82aa0620 r gfx10_SECT_CONTEXT_def_1 +ffffffff82aa0980 r gfx10_SECT_CONTEXT_def_3 +ffffffff82aa0990 r gfx10_SECT_CONTEXT_def_4 +ffffffff82aa0c08 r gfx10_SECT_CONTEXT_def_5 +ffffffff82aa0c10 r gfx10_SECT_CONTEXT_def_6 +ffffffff82aa0c20 r gfx10_SECT_CONTEXT_def_2 +ffffffff82aa1060 r gfx10_SECT_CONTEXT_def_7 +ffffffff82aa1170 r gfx10_SECT_CONTEXT_def_8 +ffffffff82aa14a0 r gfx_v10_0_gfx_funcs +ffffffff82aa14e0 r golden_settings_gc_rlc_spm_10_0_nv10 +ffffffff82aa7780 r golden_settings_gc_rlc_spm_10_1_nv14 +ffffffff82aab1a0 r golden_settings_gc_rlc_spm_10_1_2_nv12 +ffffffff82ab1440 r golden_settings_gc_10_1 +ffffffff82ab1800 r golden_settings_gc_10_0_nv10 +ffffffff82ab1800 r golden_settings_gc_10_1_1 +ffffffff82ab1b90 r golden_settings_gc_10_1_2 +ffffffff82ab1b90 r golden_settings_gc_10_1_nv14 +ffffffff82ab1f80 r golden_settings_gc_10_1_2_nv12 +ffffffff82ab1f80 r golden_settings_gc_10_3 +ffffffff82ab2388 r golden_settings_gc_10_3_sienna_cichlid +ffffffff82ab2390 r golden_settings_gc_10_3_2 +ffffffff82ab2780 r golden_settings_gc_10_3_vangogh +ffffffff82ab29e0 r golden_settings_gc_10_3_3 +ffffffff82ab2bc0 r golden_settings_gc_10_3_4 +ffffffff82ab2f20 r golden_settings_gc_10_3_5 +ffffffff82ab3220 r golden_settings_gc_10_0_cyan_skillfish +ffffffff82ab3550 r golden_settings_gc_10_3_6 +ffffffff82ab3760 r golden_settings_gc_10_3_7 +ffffffff82ab4000 r gfx_v11_0_ip_funcs +ffffffff82ab40a0 R gfx_v11_0_ip_block +ffffffff82ab40b8 r gfx_v11_0_kiq_pm4_funcs +ffffffff82ab40f8 r gfx_v11_0_ring_funcs_kiq +ffffffff82ab4218 r gfx_v11_0_ring_funcs_gfx +ffffffff82ab4338 r gfx_v11_0_ring_funcs_compute +ffffffff82ab4458 r gfx_v11_0_eop_irq_funcs +ffffffff82ab4468 r gfx_v11_0_priv_reg_irq_funcs +ffffffff82ab4478 r gfx_v11_0_priv_inst_irq_funcs +ffffffff82ab4488 r gfx_v11_0_rlc_funcs +ffffffff82ab44f0 r gfx11_cs_data +ffffffff82ab4510 r gfx11_SECT_CONTEXT_defs +ffffffff82ab4590 r gfx11_SECT_CONTEXT_def_1 +ffffffff82ab48f0 r gfx11_SECT_CONTEXT_def_3 +ffffffff82ab4900 r gfx11_SECT_CONTEXT_def_5 +ffffffff82ab4908 r gfx11_SECT_CONTEXT_def_6 +ffffffff82ab4910 r gfx11_SECT_CONTEXT_def_2 +ffffffff82ab4d50 r gfx11_SECT_CONTEXT_def_4 +ffffffff82ab4fd0 r gfx11_SECT_CONTEXT_def_7 +ffffffff82ab5438 r gfx_v11_0_gfx_funcs +ffffffff82ab5480 r golden_settings_gc_11_0_1 +ffffffff82ab6000 r gfx_v8_0_ip_funcs +ffffffff82ab60a0 R gfx_v8_0_ip_block +ffffffff82ab60b8 R gfx_v8_1_ip_block +ffffffff82ab60d0 r gfx_v8_0_gfx_funcs +ffffffff82ab6110 r gfx_v8_0_ring_funcs_kiq +ffffffff82ab6230 r gfx_v8_0_ring_funcs_gfx +ffffffff82ab6350 r gfx_v8_0_ring_funcs_compute +ffffffff82ab6470 r amdgpu_gds_reg_offset +ffffffff82ab6570 r gfx_v8_0_eop_irq_funcs +ffffffff82ab6580 r gfx_v8_0_priv_reg_irq_funcs +ffffffff82ab6590 r gfx_v8_0_priv_inst_irq_funcs +ffffffff82ab65a0 r gfx_v8_0_cp_ecc_error_irq_funcs +ffffffff82ab65b0 r gfx_v8_0_sq_irq_funcs +ffffffff82ab65c0 r sq_edc_source_names +ffffffff82ab65f8 r iceland_rlc_funcs +ffffffff82ab6660 r vi_cs_data +ffffffff82ab6680 r vi_SECT_CONTEXT_defs +ffffffff82ab6700 r vi_SECT_CONTEXT_def_1 +ffffffff82ab6a50 r vi_SECT_CONTEXT_def_3 +ffffffff82ab6a70 r vi_SECT_CONTEXT_def_4 +ffffffff82ab6ce4 r vi_SECT_CONTEXT_def_5 +ffffffff82ab6cec r vi_SECT_CONTEXT_def_6 +ffffffff82ab6cf0 r vi_SECT_CONTEXT_def_2 +ffffffff82ab7140 r vi_SECT_CONTEXT_def_7 +ffffffff82ab74f0 r vgpr_init_compute_shader +ffffffff82ab7600 r vgpr_init_regs +ffffffff82ab7690 r sgpr1_init_regs +ffffffff82ab7720 r sgpr2_init_regs +ffffffff82ab77b0 r sec_ded_counter_registers +ffffffff82ab7820 r iceland_mgcg_cgcg_init +ffffffff82ab7b20 r golden_settings_iceland_a11 +ffffffff82ab7be0 r iceland_golden_common_all +ffffffff82ab7c40 r fiji_mgcg_cgcg_init +ffffffff82ab7df0 r golden_settings_fiji_a10 +ffffffff82ab7e80 r fiji_golden_common_all +ffffffff82ab7f00 r tonga_mgcg_cgcg_init +ffffffff82ab8290 r golden_settings_tonga_a11 +ffffffff82ab8350 r tonga_golden_common_all +ffffffff82ab83b0 r golden_settings_vegam_a11 +ffffffff82ab8480 r vegam_golden_common_all +ffffffff82ab84d0 r golden_settings_polaris11_a11 +ffffffff82ab85a0 r polaris11_golden_common_all +ffffffff82ab85f0 r golden_settings_polaris10_a11 +ffffffff82ab86c0 r polaris10_golden_common_all +ffffffff82ab8720 r cz_mgcg_cgcg_init +ffffffff82ab8ab0 r cz_golden_settings_a11 +ffffffff82ab8b40 r cz_golden_common_all +ffffffff82ab8ba0 r stoney_mgcg_cgcg_init +ffffffff82ab8be0 r stoney_golden_settings_a11 +ffffffff82ab8c60 r stoney_golden_common_all +ffffffff82ab9000 R gfx_v9_0_ras_ops +ffffffff82ab9040 r gfx_v9_0_ip_funcs +ffffffff82ab90e0 R gfx_v9_0_ip_block +ffffffff82ab9100 r ras_gfx_subblocks +ffffffff82ab9b80 r gfx_v9_0_edc_counter_regs +ffffffff82ab9f20 r gfx_v9_0_ras_fields +ffffffff82abb000 r gfx_v9_0_kiq_pm4_funcs +ffffffff82abb040 r gfx_v9_0_ring_funcs_kiq +ffffffff82abb160 r gfx_v9_0_ring_funcs_gfx +ffffffff82abb280 r gfx_v9_0_ring_funcs_compute +ffffffff82abb3a0 r gfx_v9_0_eop_irq_funcs +ffffffff82abb3b0 r gfx_v9_0_priv_reg_irq_funcs +ffffffff82abb3c0 r gfx_v9_0_priv_inst_irq_funcs +ffffffff82abb3d0 r gfx_v9_0_cp_ecc_error_irq_funcs +ffffffff82abb3e0 r gfx_v9_0_rlc_funcs +ffffffff82abb450 r gfx9_cs_data +ffffffff82abb470 r gfx9_SECT_CONTEXT_defs +ffffffff82abb500 r gfx9_SECT_CONTEXT_def_1 +ffffffff82abb850 r gfx9_SECT_CONTEXT_def_3 +ffffffff82abb860 r gfx9_SECT_CONTEXT_def_4 +ffffffff82abbad4 r gfx9_SECT_CONTEXT_def_5 +ffffffff82abbadc r gfx9_SECT_CONTEXT_def_6 +ffffffff82abbae0 r gfx9_SECT_CONTEXT_def_7 +ffffffff82abbbf0 r gfx9_SECT_CONTEXT_def_2 +ffffffff82abc060 r gfx9_SECT_CONTEXT_def_8 +ffffffff82abc2d0 r vgpr_init_compute_shader_arcturus +ffffffff82abcb60 r vgpr_init_regs_arcturus +ffffffff82abccf0 r vgpr_init_regs +ffffffff82abce80 r sgpr1_init_regs +ffffffff82abd010 r sgpr2_init_regs +ffffffff82abd198 r gfx_v9_0_gfx_funcs +ffffffff82abd1e0 r golden_settings_gc_9_0 +ffffffff82abd3c0 r golden_settings_gc_9_0_vg10 +ffffffff82abd570 r golden_settings_gc_9_2_1 +ffffffff82abd6f0 r golden_settings_gc_9_2_1_vg12 +ffffffff82abd830 r golden_settings_gc_9_0_vg20 +ffffffff82abd940 r golden_settings_gc_9_4_1_arct +ffffffff82abda50 r golden_settings_gc_9_1 +ffffffff82abdc90 r golden_settings_gc_9_1_rv2 +ffffffff82abde60 r golden_settings_gc_9_1_rv1 +ffffffff82abdf10 r golden_settings_gc_9_1_rn +ffffffff82abe030 r golden_settings_gc_9_x_common +ffffffff82abf000 R gfx_v9_4_ras_ops +ffffffff82abf040 r gfx_v9_4_edc_counter_regs +ffffffff82abf420 r gfx_v9_4_ras_fields +ffffffff82ac1000 R vgpr_init_regs_aldebaran +ffffffff82ac11b0 R sgpr112_init_regs_aldebaran +ffffffff82ac1360 R sgpr96_init_regs_aldebaran +ffffffff82ac1510 R sgpr64_init_regs_aldebaran +ffffffff82ac16c0 r golden_settings_gc_9_4_2_alde +ffffffff82ac1720 r golden_settings_gc_9_4_2_alde_die_0 +ffffffff82ac17b0 r golden_settings_gc_9_4_2_alde_die_1 +ffffffff82ac1840 r sgpr112_init_compute_shader_aldebaran +ffffffff82ac1a60 r sgpr96_init_compute_shader_aldebaran +ffffffff82ac1c50 r sgpr64_init_compute_shader_aldebaran +ffffffff82ac1dc0 r vgpr_init_compute_shader_aldebaran +ffffffff82ac26a0 r gfx_v9_4_2_edc_counter_regs +ffffffff82ac2a20 r gfx_v9_4_2_ras_fields +ffffffff82ac43c0 r gfx_v9_4_2_utc_blocks +ffffffff82ac5000 R gfxhub_v1_0_funcs +ffffffff82ac6000 R gfxhub_v2_0_funcs +ffffffff82ac6060 r gfxhub_v2_0_vmhub_funcs +ffffffff82ac6070 r gfxhub_client_ids +ffffffff82ac7000 R gfxhub_v2_1_funcs +ffffffff82ac7060 r gfxhub_v2_1_vmhub_funcs +ffffffff82ac7070 r gfxhub_client_ids +ffffffff82ac8000 R gfxhub_v3_0_funcs +ffffffff82ac8060 r gfxhub_v3_0_vmhub_funcs +ffffffff82ac8070 r gfxhub_client_ids +ffffffff82ac9000 R gfxhub_v3_0_3_funcs +ffffffff82ac9060 r gfxhub_v3_0_3_vmhub_funcs +ffffffff82ac9070 r gfxhub_client_ids +ffffffff82aca000 R gmc_v10_0_ip_funcs +ffffffff82aca0a0 R gmc_v10_0_ip_block +ffffffff82aca0b8 r gmc_v10_0_gmc_funcs +ffffffff82aca100 r gmc_v10_0_irq_funcs +ffffffff82aca110 r gmc_v10_0_ecc_funcs +ffffffff82acb000 R gmc_v11_0_ip_funcs +ffffffff82acb0a0 R gmc_v11_0_ip_block +ffffffff82acb0b8 r gmc_v11_0_gmc_funcs +ffffffff82acb100 r gmc_v11_0_irq_funcs +ffffffff82acb110 r gmc_v11_0_ecc_funcs +ffffffff82acc000 r gmc_v7_0_ip_funcs +ffffffff82acc0a0 R gmc_v7_0_ip_block +ffffffff82acc0b8 R gmc_v7_4_ip_block +ffffffff82acc0d0 r gmc_v7_0_gmc_funcs +ffffffff82acc118 r gmc_v7_0_irq_funcs +ffffffff82acc128 r iceland_mgcg_cgcg_init +ffffffff82acc140 r golden_settings_iceland_a11 +ffffffff82acc170 r mc_cg_registers +ffffffff82acc1a0 r mc_cg_en +ffffffff82acc1d0 r mc_cg_ls_en +ffffffff82acd000 r gmc_v8_0_ip_funcs +ffffffff82acd0a0 R gmc_v8_0_ip_block +ffffffff82acd0b8 R gmc_v8_1_ip_block +ffffffff82acd0d0 R gmc_v8_5_ip_block +ffffffff82acd0e8 r gmc_v8_0_gmc_funcs +ffffffff82acd130 r gmc_v8_0_irq_funcs +ffffffff82acd140 r fiji_mgcg_cgcg_init +ffffffff82acd150 r golden_settings_fiji_a10 +ffffffff82acd180 r tonga_mgcg_cgcg_init +ffffffff82acd190 r golden_settings_tonga_a11 +ffffffff82acd1f0 r golden_settings_polaris11_a11 +ffffffff82acd220 r golden_settings_polaris10_a11 +ffffffff82acd25c r cz_mgcg_cgcg_init +ffffffff82acd270 r stoney_mgcg_cgcg_init +ffffffff82acd290 r golden_settings_stoney_common +ffffffff82ace000 R gmc_v9_0_ip_funcs +ffffffff82ace0a0 R gmc_v9_0_ip_block +ffffffff82ace0b8 r gmc_v9_0_gmc_funcs +ffffffff82ace100 r gmc_v9_0_irq_funcs +ffffffff82ace110 r gmc_v9_0_ecc_funcs +ffffffff82ace120 r gfxhub_client_ids +ffffffff82ace190 r mmhub_client_ids_vega10 +ffffffff82ace480 r mmhub_client_ids_vega12 +ffffffff82ace780 r mmhub_client_ids_vega20 +ffffffff82acea70 r mmhub_client_ids_arcturus +ffffffff82ad0280 r mmhub_client_ids_raven +ffffffff82ad0440 r mmhub_client_ids_renoir +ffffffff82ad0630 r mmhub_client_ids_aldebaran +ffffffff82ad1e40 r ecc_umc_mcumc_ctrl_addrs +ffffffff82ad1ec0 r ecc_umc_mcumc_ctrl_mask_addrs +ffffffff82ad1f40 r golden_settings_mmhub_1_0_0 +ffffffff82ad1f70 r golden_settings_athub_1_0_0 +ffffffff82ad2000 R hdp_v4_0_funcs +ffffffff82ad3000 R hdp_v5_0_funcs +ffffffff82ad4000 R hdp_v5_2_funcs +ffffffff82ad5000 R hdp_v6_0_funcs +ffffffff82ad6000 r iceland_ih_ip_funcs +ffffffff82ad60a0 R iceland_ih_ip_block +ffffffff82ad60b8 r iceland_ih_funcs +ffffffff82ad7000 r ih_v6_0_ip_funcs +ffffffff82ad70a0 R ih_v6_0_ip_block +ffffffff82ad70b8 r ih_v6_0_funcs +ffffffff82ad70d8 r ih_v6_0_self_irq_funcs +ffffffff82ad8000 R gfx_v11_0_imu_funcs +ffffffff82ad8030 r imu_rlc_ram_golden_11 +ffffffff82ad8680 r imu_rlc_ram_golden_11_0_2 +ffffffff82ad9000 r imu_rlc_ram_golden_11_0_3 +ffffffff82ada000 r jpeg_v1_0_decode_ring_vm_funcs +ffffffff82ada120 r jpeg_v1_0_irq_funcs +ffffffff82adb000 r jpeg_v2_0_ip_funcs +ffffffff82adb0a0 R jpeg_v2_0_ip_block +ffffffff82adb0b8 r jpeg_v2_0_dec_ring_vm_funcs +ffffffff82adb1d8 r jpeg_v2_0_irq_funcs +ffffffff82adc000 r jpeg_v2_5_ip_funcs +ffffffff82adc0a0 R jpeg_v2_5_ip_block +ffffffff82adc0b8 r jpeg_v2_6_ip_funcs +ffffffff82adc158 R jpeg_v2_6_ip_block +ffffffff82adc170 R jpeg_v2_6_ras_hw_ops +ffffffff82adc1b0 r jpeg_v2_5_dec_ring_vm_funcs +ffffffff82adc2d0 r jpeg_v2_6_dec_ring_vm_funcs +ffffffff82adc3f0 r jpeg_v2_5_irq_funcs +ffffffff82add000 r jpeg_v3_0_ip_funcs +ffffffff82add0a0 R jpeg_v3_0_ip_block +ffffffff82add0b8 r jpeg_v3_0_dec_ring_vm_funcs +ffffffff82add1d8 r jpeg_v3_0_irq_funcs +ffffffff82ade000 r jpeg_v4_0_ip_funcs +ffffffff82ade0a0 R jpeg_v4_0_ip_block +ffffffff82ade0b8 r jpeg_v4_0_dec_ring_vm_funcs +ffffffff82ade1d8 r jpeg_v4_0_irq_funcs +ffffffff82adf000 R lsdma_v6_0_funcs +ffffffff82ae0000 R mca_v3_0_mp0_hw_ops +ffffffff82ae0040 R mca_v3_0_mp1_hw_ops +ffffffff82ae0080 R mca_v3_0_mpio_hw_ops +ffffffff82ae00c0 R mca_v3_0_funcs +ffffffff82ae1000 r mes_v10_1_ip_funcs +ffffffff82ae10a0 R mes_v10_1_ip_block +ffffffff82ae10b8 r mes_v10_1_funcs +ffffffff82ae10e8 r mes_v10_1_ring_funcs +ffffffff82ae2000 r mes_v11_0_ip_funcs +ffffffff82ae20a0 R mes_v11_0_ip_block +ffffffff82ae20b8 r mes_v11_0_funcs +ffffffff82ae20e8 r mes_v11_0_ring_funcs +ffffffff82ae3000 R mmhub_v1_0_funcs +ffffffff82ae3050 r mmhub_v1_0_edc_cnt_regs +ffffffff82ae30c0 r mmhub_v1_0_ras_fields +ffffffff82ae4000 R mmhub_v1_7_funcs +ffffffff82ae4050 r mmhub_v1_7_edc_cnt_regs +ffffffff82ae4250 r mmhub_v1_7_ras_fields +ffffffff82ae59c0 r mmhub_v1_7_ea_err_status_regs +ffffffff82ae6000 R mmhub_v2_0_funcs +ffffffff82ae6050 r mmhub_v2_0_vmhub_funcs +ffffffff82ae6060 r mmhub_client_ids_navi1x +ffffffff82ae6190 r mmhub_client_ids_sienna_cichlid +ffffffff82ae6450 r mmhub_client_ids_beige_goby +ffffffff82ae7000 R mmhub_v2_3_funcs +ffffffff82ae7050 r mmhub_v2_3_vmhub_funcs +ffffffff82ae7060 r mmhub_client_ids_vangogh +ffffffff82ae8000 R mmhub_v3_0_funcs +ffffffff82ae8050 r mmhub_v3_0_vmhub_funcs +ffffffff82ae8060 r mmhub_client_ids_v3_0_0 +ffffffff82ae9000 R mmhub_v3_0_1_funcs +ffffffff82ae9050 r mmhub_v3_0_1_vmhub_funcs +ffffffff82ae9060 r mmhub_client_ids_v3_0_1 +ffffffff82aea000 R mmhub_v3_0_2_funcs +ffffffff82aea050 r mmhub_v3_0_2_vmhub_funcs +ffffffff82aea060 r mmhub_client_ids_v3_0_2 +ffffffff82aeb000 R mmhub_v9_4_ras_hw_ops +ffffffff82aeb040 R mmhub_v9_4_funcs +ffffffff82aeb090 r mmhub_v9_4_edc_cnt_regs +ffffffff82aeb330 r mmhub_v9_4_ras_fields +ffffffff82aed3b0 r mmhub_v9_4_err_status_regs +ffffffff82aee000 r xgpu_ai_mailbox_ack_irq_funcs +ffffffff82aee010 r xgpu_ai_mailbox_rcv_irq_funcs +ffffffff82aee020 R xgpu_ai_virt_ops +ffffffff82aef000 r xgpu_nv_mailbox_ack_irq_funcs +ffffffff82aef010 r xgpu_nv_mailbox_rcv_irq_funcs +ffffffff82aef020 R xgpu_nv_virt_ops +ffffffff82af0000 r xgpu_fiji_mgcg_cgcg_init +ffffffff82af0240 r xgpu_fiji_golden_settings_a10 +ffffffff82af0370 r xgpu_fiji_golden_common_all +ffffffff82af03f0 r xgpu_tonga_mgcg_cgcg_init +ffffffff82af0810 r xgpu_tonga_golden_settings_a11 +ffffffff82af09d0 r xgpu_tonga_golden_common_all +ffffffff82af0a28 r xgpu_vi_mailbox_ack_irq_funcs +ffffffff82af0a38 r xgpu_vi_mailbox_rcv_irq_funcs +ffffffff82af0a48 R xgpu_vi_virt_ops +ffffffff82af1000 r navi10_ih_ip_funcs +ffffffff82af10a0 R navi10_ih_ip_block +ffffffff82af10b8 r navi10_ih_funcs +ffffffff82af10d8 r navi10_ih_self_irq_funcs +ffffffff82af2000 R nbio_v2_3_hdp_flush_reg +ffffffff82af2048 R nbio_v2_3_funcs +ffffffff82af3000 R nbio_v4_3_hdp_flush_reg +ffffffff82af3048 R nbio_v4_3_funcs +ffffffff82af3130 R nbio_v4_3_sriov_funcs +ffffffff82af4000 R nbio_v6_1_hdp_flush_reg +ffffffff82af4048 R nbio_v6_1_funcs +ffffffff82af5000 R nbio_v7_0_hdp_flush_reg +ffffffff82af5048 R nbio_v7_0_funcs +ffffffff82af6000 R nbio_v7_2_hdp_flush_reg +ffffffff82af6048 R nbio_v7_2_funcs +ffffffff82af7000 R nbio_v7_4_hdp_flush_reg +ffffffff82af7048 R nbio_v7_4_ras_hw_ops +ffffffff82af7088 R nbio_v7_4_funcs +ffffffff82af7170 r nbio_v7_4_ras_controller_irq_funcs +ffffffff82af7180 r nbio_v7_4_ras_err_event_athub_irq_funcs +ffffffff82af8000 R nbio_v7_7_hdp_flush_reg +ffffffff82af8048 R nbio_v7_7_funcs +ffffffff82af9000 r nv_common_ip_funcs +ffffffff82af90a0 R nv_common_ip_block +ffffffff82af90b8 r nv_asic_funcs +ffffffff82af9170 r nv_allowed_read_registers +ffffffff82af92f0 r nv_video_codecs_encode +ffffffff82af9300 r sc_video_codecs_decode +ffffffff82af9310 r yc_video_codecs_decode +ffffffff82af9320 r bg_video_codecs_encode +ffffffff82af9330 r bg_video_codecs_decode +ffffffff82af9340 r nv_video_codecs_decode +ffffffff82af9350 r nv_video_codecs_encode_array +ffffffff82af9380 r sc_video_codecs_decode_array +ffffffff82af9420 r yc_video_codecs_decode_array +ffffffff82af9490 r bg_video_codecs_decode_array +ffffffff82af94d0 r nv_video_codecs_decode_array +ffffffff82afa000 r psp_v10_0_funcs +ffffffff82afb000 r psp_v11_0_funcs +ffffffff82afc000 r psp_v11_0_8_funcs +ffffffff82afd000 r psp_v12_0_funcs +ffffffff82afe000 r psp_v13_0_funcs +ffffffff82aff000 r psp_v13_0_4_funcs +ffffffff82b00000 r psp_v3_1_funcs +ffffffff82b01000 r sdma_v2_4_ip_funcs +ffffffff82b010a0 R sdma_v2_4_ip_block +ffffffff82b010b8 r sdma_v2_4_ring_funcs +ffffffff82b011d8 r sdma_v2_4_buffer_funcs +ffffffff82b011f8 r sdma_v2_4_vm_pte_funcs +ffffffff82b01218 r sdma_v2_4_trap_irq_funcs +ffffffff82b01228 r sdma_v2_4_illegal_inst_irq_funcs +ffffffff82b01240 r iceland_mgcg_cgcg_init +ffffffff82b01260 r golden_settings_iceland_a11 +ffffffff82b02000 r sdma_v3_0_ip_funcs +ffffffff82b020a0 R sdma_v3_0_ip_block +ffffffff82b020b8 R sdma_v3_1_ip_block +ffffffff82b020d0 r sdma_v3_0_ring_funcs +ffffffff82b021f0 r sdma_v3_0_buffer_funcs +ffffffff82b02210 r sdma_v3_0_vm_pte_funcs +ffffffff82b02230 r sdma_v3_0_trap_irq_funcs +ffffffff82b02240 r sdma_v3_0_illegal_inst_irq_funcs +ffffffff82b02250 r fiji_mgcg_cgcg_init +ffffffff82b02270 r golden_settings_fiji_a10 +ffffffff82b022d0 r tonga_mgcg_cgcg_init +ffffffff82b022f0 r golden_settings_tonga_a11 +ffffffff82b02370 r golden_settings_polaris11_a11 +ffffffff82b023f0 r golden_settings_polaris10_a11 +ffffffff82b02470 r cz_mgcg_cgcg_init +ffffffff82b02490 r cz_golden_settings_a11 +ffffffff82b02520 r stoney_mgcg_cgcg_init +ffffffff82b02530 r stoney_golden_settings_a11 +ffffffff82b03000 R sdma_v4_0_ip_funcs +ffffffff82b030a0 R sdma_v4_0_ras_hw_ops +ffffffff82b030e0 R sdma_v4_0_ip_block +ffffffff82b030f8 r sdma_v4_0_ring_funcs_2nd_mmhub +ffffffff82b03218 r sdma_v4_0_ring_funcs +ffffffff82b03338 r sdma_v4_0_page_ring_funcs_2nd_mmhub +ffffffff82b03458 r sdma_v4_0_page_ring_funcs +ffffffff82b03578 r sdma_v4_0_buffer_funcs +ffffffff82b03598 r sdma_v4_0_vm_pte_funcs +ffffffff82b035b8 r sdma_v4_0_trap_irq_funcs +ffffffff82b035c8 r sdma_v4_0_illegal_inst_irq_funcs +ffffffff82b035d8 r sdma_v4_0_ecc_irq_funcs +ffffffff82b035e8 r sdma_v4_0_vm_hole_irq_funcs +ffffffff82b035f8 r sdma_v4_0_doorbell_invalid_irq_funcs +ffffffff82b03608 r sdma_v4_0_pool_timeout_irq_funcs +ffffffff82b03618 r sdma_v4_0_srbm_write_irq_funcs +ffffffff82b03630 r golden_settings_sdma_4 +ffffffff82b03890 r golden_settings_sdma_vg10 +ffffffff82b03940 r golden_settings_sdma_vg12 +ffffffff82b039f0 r golden_settings_sdma0_4_2_init +ffffffff82b03a10 r golden_settings_sdma0_4_2 +ffffffff82b03ca0 r golden_settings_sdma1_4_2 +ffffffff82b03f30 r golden_settings_sdma_arct +ffffffff82b04230 r golden_settings_sdma_aldebaran +ffffffff82b043a0 r golden_settings_sdma_4_1 +ffffffff82b044b0 r golden_settings_sdma_rv2 +ffffffff82b044e0 r golden_settings_sdma_rv1 +ffffffff82b04510 r golden_settings_sdma_4_3 +ffffffff82b04600 r sdma_v4_0_ras_fields +ffffffff82b05000 R sdma_v4_4_ras_hw_ops +ffffffff82b05040 r sdma_v4_4_ras_fields +ffffffff82b06000 R sdma_v5_0_ip_funcs +ffffffff82b060a0 R sdma_v5_0_ip_block +ffffffff82b060b8 r sdma_v5_0_ring_funcs +ffffffff82b061d8 r sdma_v5_0_buffer_funcs +ffffffff82b061f8 r sdma_v5_0_vm_pte_funcs +ffffffff82b06218 r sdma_v5_0_trap_irq_funcs +ffffffff82b06228 r sdma_v5_0_illegal_inst_irq_funcs +ffffffff82b06240 r golden_settings_sdma_5 +ffffffff82b06480 r golden_settings_sdma_nv10 +ffffffff82b064b0 r golden_settings_sdma_nv14 +ffffffff82b064e0 r golden_settings_sdma_5_sriov +ffffffff82b066c0 r golden_settings_sdma_nv12 +ffffffff82b06750 r golden_settings_sdma_cyan_skillfish +ffffffff82b07000 R sdma_v5_2_ip_funcs +ffffffff82b070a0 R sdma_v5_2_ip_block +ffffffff82b070b8 r sdma_v5_2_ring_funcs +ffffffff82b071d8 r sdma_v5_2_buffer_funcs +ffffffff82b071f8 r sdma_v5_2_vm_pte_funcs +ffffffff82b07218 r sdma_v5_2_trap_irq_funcs +ffffffff82b07228 r sdma_v5_2_illegal_inst_irq_funcs +ffffffff82b08000 R sdma_v6_0_ip_funcs +ffffffff82b080a0 R sdma_v6_0_ip_block +ffffffff82b080b8 r sdma_v6_0_ring_funcs +ffffffff82b081d8 r sdma_v6_0_buffer_funcs +ffffffff82b081f8 r sdma_v6_0_vm_pte_funcs +ffffffff82b08218 r sdma_v6_0_trap_irq_funcs +ffffffff82b08228 r sdma_v6_0_illegal_inst_irq_funcs +ffffffff82b09000 r smu_v11_0_i2c_algo +ffffffff82b09010 r smu_v11_0_i2c_i2c_lock_ops +ffffffff82b09028 r smu_v11_0_i2c_control_quirks +ffffffff82b0a000 R smuio_v11_0_funcs +ffffffff82b0b000 R smuio_v11_0_6_funcs +ffffffff82b0c000 R smuio_v13_0_funcs +ffffffff82b0d000 R smuio_v13_0_6_funcs +ffffffff82b0e000 R smuio_v9_0_funcs +ffffffff82b0f000 r soc15_common_ip_funcs +ffffffff82b0f0a0 R vega10_common_ip_block +ffffffff82b0f0b8 r soc15_asic_funcs +ffffffff82b0f170 r vega20_asic_funcs +ffffffff82b0f230 r soc15_allowed_read_registers +ffffffff82b0f3c0 r vega_video_codecs_encode +ffffffff82b0f3d0 r vega_video_codecs_decode +ffffffff82b0f3e0 r rv_video_codecs_decode +ffffffff82b0f3f0 r rn_video_codecs_decode +ffffffff82b0f400 r vega_video_codecs_encode_array +ffffffff82b0f430 r vega_video_codecs_decode_array +ffffffff82b0f4b0 r rv_video_codecs_decode_array +ffffffff82b0f540 r rn_video_codecs_decode_array +ffffffff82b10000 r soc21_common_ip_funcs +ffffffff82b100a0 R soc21_common_ip_block +ffffffff82b100b8 r soc21_asic_funcs +ffffffff82b10170 r soc21_allowed_read_registers +ffffffff82b102f0 r vcn_4_0_0_video_codecs_encode_vcn1 +ffffffff82b10300 r vcn_4_0_0_video_codecs_decode_vcn1 +ffffffff82b10310 r vcn_4_0_0_video_codecs_encode_vcn0 +ffffffff82b10320 r vcn_4_0_0_video_codecs_decode_vcn0 +ffffffff82b10330 r vcn_4_0_0_video_codecs_encode_array_vcn1 +ffffffff82b10360 r vcn_4_0_0_video_codecs_decode_array_vcn1 +ffffffff82b103b0 r vcn_4_0_0_video_codecs_encode_array_vcn0 +ffffffff82b103e0 r vcn_4_0_0_video_codecs_decode_array_vcn0 +ffffffff82b11000 r tonga_ih_ip_funcs +ffffffff82b110a0 R tonga_ih_ip_block +ffffffff82b110b8 r tonga_ih_funcs +ffffffff82b12000 R umc_v6_0_funcs +ffffffff82b13000 R umc_v6_1_channel_idx_tbl +ffffffff82b13080 R umc_v6_1_ras_hw_ops +ffffffff82b14000 R umc_v6_7_channel_idx_tbl_second +ffffffff82b14080 R umc_v6_7_channel_idx_tbl_first +ffffffff82b14100 R umc_v6_7_ras_hw_ops +ffffffff82b15000 R umc_v8_10_channelnum_map_colbit_table +ffffffff82b15040 R umc_v8_10_channel_idx_tbl +ffffffff82b150a0 R umc_v8_10_ras_hw_ops +ffffffff82b16000 R umc_v8_7_channel_idx_tbl +ffffffff82b16040 R umc_v8_7_ras_hw_ops +ffffffff82b17000 r uvd_v5_0_ip_funcs +ffffffff82b170a0 R uvd_v5_0_ip_block +ffffffff82b170b8 r uvd_v5_0_ring_funcs +ffffffff82b171d8 r uvd_v5_0_irq_funcs +ffffffff82b18000 r uvd_v6_0_ip_funcs +ffffffff82b180a0 R uvd_v6_0_ip_block +ffffffff82b180b8 R uvd_v6_2_ip_block +ffffffff82b180d0 R uvd_v6_3_ip_block +ffffffff82b180e8 r uvd_v6_0_ring_vm_funcs +ffffffff82b18208 r uvd_v6_0_ring_phys_funcs +ffffffff82b18328 r uvd_v6_0_enc_ring_vm_funcs +ffffffff82b18448 r uvd_v6_0_irq_funcs +ffffffff82b19000 R uvd_v7_0_ip_funcs +ffffffff82b190a0 R uvd_v7_0_ip_block +ffffffff82b190b8 r uvd_v7_0_ring_vm_funcs +ffffffff82b191d8 r uvd_v7_0_enc_ring_vm_funcs +ffffffff82b192f8 r uvd_v7_0_irq_funcs +ffffffff82b1a000 r vce_v3_0_ip_funcs +ffffffff82b1a0a0 R vce_v3_0_ip_block +ffffffff82b1a0b8 R vce_v3_1_ip_block +ffffffff82b1a0d0 R vce_v3_4_ip_block +ffffffff82b1a0e8 r vce_v3_0_ring_vm_funcs +ffffffff82b1a208 r vce_v3_0_ring_phys_funcs +ffffffff82b1a328 r vce_v3_0_irq_funcs +ffffffff82b1b000 R vce_v4_0_ip_funcs +ffffffff82b1b0a0 R vce_v4_0_ip_block +ffffffff82b1b0b8 r vce_v4_0_ring_vm_funcs +ffffffff82b1b1d8 r vce_v4_0_irq_funcs +ffffffff82b1c000 r vcn_v1_0_ip_funcs +ffffffff82b1c0a0 R vcn_v1_0_ip_block +ffffffff82b1c0b8 r vcn_v1_0_dec_ring_vm_funcs +ffffffff82b1c1d8 r vcn_v1_0_enc_ring_vm_funcs +ffffffff82b1c2f8 r vcn_v1_0_irq_funcs +ffffffff82b1d000 r vcn_v2_0_ip_funcs +ffffffff82b1d0a0 R vcn_v2_0_ip_block +ffffffff82b1d0b8 r vcn_v2_0_dec_ring_vm_funcs +ffffffff82b1d1d8 r vcn_v2_0_enc_ring_vm_funcs +ffffffff82b1d2f8 r vcn_v2_0_irq_funcs +ffffffff82b1e000 r vcn_v2_5_ip_funcs +ffffffff82b1e0a0 R vcn_v2_5_ip_block +ffffffff82b1e0b8 r vcn_v2_6_ip_funcs +ffffffff82b1e158 R vcn_v2_6_ip_block +ffffffff82b1e170 R vcn_v2_6_ras_hw_ops +ffffffff82b1e1b0 r vcn_v2_5_dec_ring_vm_funcs +ffffffff82b1e2d0 r vcn_v2_6_dec_ring_vm_funcs +ffffffff82b1e3f0 r vcn_v2_5_enc_ring_vm_funcs +ffffffff82b1e510 r vcn_v2_6_enc_ring_vm_funcs +ffffffff82b1e630 r vcn_v2_5_irq_funcs +ffffffff82b1f000 r vcn_v3_0_ip_funcs +ffffffff82b1f0a0 R vcn_v3_0_ip_block +ffffffff82b1f0b8 r vcn_v3_0_dec_ring_vm_funcs +ffffffff82b1f1d8 r vcn_v3_0_enc_ring_vm_funcs +ffffffff82b1f2f8 r vcn_v3_0_irq_funcs +ffffffff82b20000 r vcn_v4_0_ip_funcs +ffffffff82b200a0 R vcn_v4_0_ip_block +ffffffff82b200b8 r vcn_v4_0_unified_ring_vm_funcs +ffffffff82b201d8 r vcn_v4_0_irq_funcs +ffffffff82b21000 R vega10_ih_ip_funcs +ffffffff82b210a0 R vega10_ih_ip_block +ffffffff82b210b8 r vega10_ih_funcs +ffffffff82b210d8 r vega10_ih_self_irq_funcs +ffffffff82b22000 r GC_BASE +ffffffff82b22064 r HDP_BASE +ffffffff82b220c8 r MMHUB_BASE +ffffffff82b2212c r ATHUB_BASE +ffffffff82b22190 r NBIO_BASE +ffffffff82b221f4 r MP0_BASE +ffffffff82b22258 r MP1_BASE +ffffffff82b222bc r VCE_BASE +ffffffff82b22320 r VCN_BASE +ffffffff82b22384 r DF_BASE +ffffffff82b223e8 r DCE_BASE +ffffffff82b2244c r OSSSYS_BASE +ffffffff82b224b0 r SDMA0_BASE +ffffffff82b22514 r SDMA1_BASE +ffffffff82b22578 r SMUIO_BASE +ffffffff82b225dc r PWR_BASE +ffffffff82b22640 r NBIF_BASE +ffffffff82b226a4 r THM_BASE +ffffffff82b22708 r CLK_BASE +ffffffff82b23000 R vega20_ih_ip_funcs +ffffffff82b230a0 R vega20_ih_ip_block +ffffffff82b230b8 r vega20_ih_funcs +ffffffff82b230d8 r vega20_ih_self_irq_funcs +ffffffff82b24000 r GC_BASE +ffffffff82b24090 r HDP_BASE +ffffffff82b24120 r MMHUB_BASE +ffffffff82b241b0 r ATHUB_BASE +ffffffff82b24240 r NBIO_BASE +ffffffff82b242d0 r MP0_BASE +ffffffff82b24360 r MP1_BASE +ffffffff82b243f0 r UVD_BASE +ffffffff82b24480 r VCE_BASE +ffffffff82b24510 r DF_BASE +ffffffff82b245a0 r DCE_BASE +ffffffff82b24630 r OSSSYS_BASE +ffffffff82b246c0 r SDMA0_BASE +ffffffff82b24750 r SDMA1_BASE +ffffffff82b247e0 r SMUIO_BASE +ffffffff82b24870 r THM_BASE +ffffffff82b24900 r CLK_BASE +ffffffff82b24990 r UMC_BASE +ffffffff82b24a20 r RSMU_BASE +ffffffff82b25000 r vi_common_ip_block +ffffffff82b25018 r vi_common_ip_funcs +ffffffff82b250b8 r vi_asic_funcs +ffffffff82b25170 r vi_allowed_read_registers +ffffffff82b253d0 r topaz_video_codecs_encode +ffffffff82b253e0 r topaz_video_codecs_decode +ffffffff82b253f0 r tonga_video_codecs_encode +ffffffff82b25400 r tonga_video_codecs_decode +ffffffff82b25410 r polaris_video_codecs_encode +ffffffff82b25420 r cz_video_codecs_decode +ffffffff82b25430 r tonga_video_codecs_encode_array +ffffffff82b25450 r tonga_video_codecs_decode_array +ffffffff82b254a0 r polaris_video_codecs_encode_array +ffffffff82b254d0 r cz_video_codecs_decode_array +ffffffff82b25550 r iceland_mgcg_cgcg_init +ffffffff82b25590 r fiji_mgcg_cgcg_init +ffffffff82b255f0 r tonga_mgcg_cgcg_init +ffffffff82b25650 r cz_mgcg_cgcg_init +ffffffff82b25690 r stoney_mgcg_cgcg_init +ffffffff82b26000 r amdgpu_dm_funcs +ffffffff82b260a0 R dm_ip_block +ffffffff82b260b8 R amdgpu_dm_encoder_helper_funcs +ffffffff82b26120 r dm_display_funcs +ffffffff82b26180 r hpd_disconnect_quirk_table +ffffffff82b26ef0 r amdgpu_dm_mode_funcs +ffffffff82b26f38 r amdgpu_dm_encoder_funcs +ffffffff82b26f58 r amdgpu_dm_connector_funcs +ffffffff82b26fd0 r amdgpu_dm_connector_helper_funcs +ffffffff82b27020 r amdgpu_dm_i2c_algo +ffffffff82b271f0 r add_fs_modes.common_rates +ffffffff82b27220 r amdgpu_dm_backlight_ops +ffffffff82b28000 r amdgpu_dm_crtc_funcs +ffffffff82b280c0 r amdgpu_dm_crtc_helper_funcs +ffffffff82b29000 r dm_dtn_log_begin.msg +ffffffff82b2900d r dm_dtn_log_end.msg +ffffffff82b29018 r SYNAPTICS_DEVICE_ID +ffffffff82b2a000 r dm_crtc_irq_funcs +ffffffff82b2a010 r dm_vline0_irq_funcs +ffffffff82b2a020 r dm_dmub_outbox_irq_funcs +ffffffff82b2a030 r dm_vupdate_irq_funcs +ffffffff82b2a040 r dm_dmub_trace_irq_funcs +ffffffff82b2a050 r dm_pageflip_irq_funcs +ffffffff82b2a060 r dm_hpd_irq_funcs +ffffffff82b2b000 r amdgpu_dm_encoder_funcs +ffffffff82b2b020 r dm_mst_cbs +ffffffff82b2b030 r dm_dp_mst_connector_funcs +ffffffff82b2b0a8 r dm_dp_mst_connector_helper_funcs +ffffffff82b2c000 r dm_plane_funcs +ffffffff82b2c068 r dm_plane_helper_funcs +ffffffff82b2e000 r vbios_funcs +ffffffff82b2f000 r vbios_funcs +ffffffff82b34000 r command_table_helper_funcs +ffffffff82b35000 r command_table_helper_funcs +ffffffff82b36000 r command_table_helper_funcs +ffffffff82b37000 r command_table_helper_funcs +ffffffff82b38000 r dce80_max_clks_by_state +ffffffff82b38028 r disp_clk_regs +ffffffff82b3807c r disp_clk_shift +ffffffff82b38088 r disp_clk_mask +ffffffff82b39000 r dce110_max_clks_by_state +ffffffff82b39028 r disp_clk_regs +ffffffff82b3907c r disp_clk_shift +ffffffff82b39088 r disp_clk_mask +ffffffff82b3a000 r dce112_max_clks_by_state +ffffffff82b3a028 r disp_clk_regs +ffffffff82b3a07c r disp_clk_shift +ffffffff82b3a088 r disp_clk_mask +ffffffff82b3b000 r dce120_max_clks_by_state +ffffffff82b3c000 r clk_mgr_regs +ffffffff82b3c054 r clk_mgr_shift +ffffffff82b3c060 r clk_mgr_mask +ffffffff82b3d000 r clk_mgr_regs +ffffffff82b3d054 r clk_mgr_shift +ffffffff82b3d060 r clk_mgr_mask +ffffffff82b3e000 r clk_mgr_regs +ffffffff82b3e054 r clk_mgr_shift +ffffffff82b3e060 r clk_mgr_mask +ffffffff82b3f000 r lpddr5_wm_table +ffffffff82b3f0c0 r ddr5_wm_table +ffffffff82b40000 r lpddr5_wm_table +ffffffff82b400c0 r ddr5_wm_table +ffffffff82b41000 r lpddr5_wm_table +ffffffff82b410c0 r ddr5_wm_table +ffffffff82b42000 r lpddr5_wm_table +ffffffff82b420c0 r ddr4_wm_table +ffffffff82b43000 r clk_mgr_regs_dcn321 +ffffffff82b43054 r clk_mgr_shift_dcn321 +ffffffff82b43060 r clk_mgr_mask_dcn321 +ffffffff82b43084 r clk_mgr_regs_dcn32 +ffffffff82b430d8 r clk_mgr_shift_dcn32 +ffffffff82b430e4 r clk_mgr_mask_dcn32 +ffffffff82b44000 r DC_BUILD_ID +ffffffff82b46000 r output_csc_matrix +ffffffff82b460e0 r black_color_format +ffffffff82b47000 r DP_SINK_BRANCH_DEV_NAME_7580 +ffffffff82b48000 r DP_VGA_DONGLE_BRANCH_DEV_NAME +ffffffff82b48006 r DP_DVI_CONVERTER_ID_4 +ffffffff82b4800d r DP_DVI_CONVERTER_ID_5 +ffffffff82b49000 r DP_VGA_LVDS_CONVERTER_ID_2 +ffffffff82b49007 r DP_VGA_LVDS_CONVERTER_ID_3 +ffffffff82b49010 r dp_lt_fallbacks +ffffffff82b4a000 r mandatory_dpcd_partitions +ffffffff82b4c000 r dce_funcs +ffffffff82b4d000 r funcs +ffffffff82b4e000 R video_optimized_pixel_rates +ffffffff82b4e1b0 r dce110_clk_src_funcs +ffffffff82b4e1d8 r dce112_clk_src_funcs +ffffffff82b4e200 r dcn20_clk_src_funcs +ffffffff82b4e228 r dcn3_clk_src_funcs +ffffffff82b4e250 r dcn31_clk_src_funcs +ffffffff82b4f000 r dce_funcs +ffffffff82b4f068 r dcn10_funcs +ffffffff82b4f0d0 r dcn20_funcs +ffffffff82b4f138 r dcn21_funcs +ffffffff82b50000 r dce_ipp_funcs +ffffffff82b51000 r dce110_lnk_enc_funcs +ffffffff82b52000 r dce_mi_funcs +ffffffff82b52090 r dce112_mi_funcs +ffffffff82b52120 r dce120_mi_funcs +ffffffff82b521b0 r pte_settings +ffffffff82b53000 r funcs +ffffffff82b54000 r dce_link_panel_cntl_funcs +ffffffff82b55000 r filter_3tap_16p_upscale +ffffffff82b55040 r filter_3tap_16p_116 +ffffffff82b55080 r filter_3tap_16p_149 +ffffffff82b550c0 r filter_3tap_16p_183 +ffffffff82b55100 r filter_3tap_64p_upscale +ffffffff82b551d0 r filter_3tap_64p_116 +ffffffff82b552a0 r filter_3tap_64p_149 +ffffffff82b55370 r filter_3tap_64p_183 +ffffffff82b55440 r filter_4tap_16p_upscale +ffffffff82b55490 r filter_4tap_16p_116 +ffffffff82b554e0 r filter_4tap_16p_149 +ffffffff82b55530 r filter_4tap_16p_183 +ffffffff82b55580 r filter_4tap_64p_upscale +ffffffff82b55690 r filter_4tap_64p_116 +ffffffff82b557a0 r filter_4tap_64p_149 +ffffffff82b558b0 r filter_4tap_64p_183 +ffffffff82b559c0 r filter_5tap_64p_upscale +ffffffff82b55b10 r filter_5tap_64p_116 +ffffffff82b55c60 r filter_5tap_64p_149 +ffffffff82b55db0 r filter_5tap_64p_183 +ffffffff82b55f00 r filter_6tap_64p_upscale +ffffffff82b56090 r filter_6tap_64p_116 +ffffffff82b56220 r filter_6tap_64p_149 +ffffffff82b563b0 r filter_6tap_64p_183 +ffffffff82b56540 r filter_7tap_64p_upscale +ffffffff82b56710 r filter_7tap_64p_116 +ffffffff82b568e0 r filter_7tap_64p_149 +ffffffff82b56ab0 r filter_7tap_64p_183 +ffffffff82b56c80 r filter_8tap_64p_upscale +ffffffff82b56e90 r filter_8tap_64p_116 +ffffffff82b570a0 r filter_8tap_64p_149 +ffffffff82b572b0 r filter_8tap_64p_183 +ffffffff82b574c0 r filter_2tap_16p +ffffffff82b574f0 r filter_2tap_64p +ffffffff82b58000 r audio_clock_info_table_48bpc +ffffffff82b58190 r audio_clock_info_table_36bpc +ffffffff82b58320 r audio_clock_info_table +ffffffff82b584e0 r dce110_str_enc_funcs +ffffffff82b59000 r global_color_matrix +ffffffff82b590a8 r dce_transform_funcs +ffffffff82b5a000 r abm_funcs +ffffffff82b5b000 r psr_funcs +ffffffff82b5b040 r DP_SINK_DEVICE_STR_ID_1 +ffffffff82b5b045 r DP_SINK_DEVICE_STR_ID_2 +ffffffff82b5c000 r reg_offsets +ffffffff82b5d000 r bios_regs +ffffffff82b5d008 r res_cap +ffffffff82b5d050 r clk_src_regs +ffffffff82b5d14c r dmcu_regs +ffffffff82b5d1a8 r dmcu_shift +ffffffff82b5d1bc r dmcu_mask +ffffffff82b5d208 r abm_regs +ffffffff82b5d248 r abm_shift +ffffffff82b5d25c r abm_mask +ffffffff82b5d2b0 r dce100_tg_offsets +ffffffff82b5d2f8 r plane_cap +ffffffff82b5d328 r res_create_funcs +ffffffff82b5d358 r dce100_res_pool_funcs +ffffffff82b5d440 r panel_cntl_regs +ffffffff82b5d460 r panel_cntl_shift +ffffffff82b5d470 r panel_cntl_mask +ffffffff82b5d4b0 r link_enc_regs +ffffffff82b5d870 r link_enc_aux_regs +ffffffff82b5d8c0 r link_enc_hpd_regs +ffffffff82b5d8d8 r link_enc_feature +ffffffff82b5d8e8 r cs_shift +ffffffff82b5d8f4 r cs_mask +ffffffff82b5d920 r mi_regs +ffffffff82b5dc38 r mi_shifts +ffffffff82b5dc80 r mi_masks +ffffffff82b5dda0 r ipp_regs +ffffffff82b5df98 r ipp_shift +ffffffff82b5dfc0 r ipp_mask +ffffffff82b5e060 r xfm_regs +ffffffff82b5e600 r xfm_shift +ffffffff82b5e660 r xfm_mask +ffffffff82b5e7e0 r opp_regs +ffffffff82b5e930 r opp_shift +ffffffff82b5e95c r opp_mask +ffffffff82b5ea10 r aux_engine_regs +ffffffff82b5eb00 r aux_mask +ffffffff82b5eb60 r aux_shift +ffffffff82b5eb80 r i2c_hw_regs +ffffffff82b5ecd0 r i2c_shifts +ffffffff82b5ecfc r i2c_masks +ffffffff82b5eda0 r audio_regs +ffffffff82b5eed4 r audio_shift +ffffffff82b5eeec r audio_mask +ffffffff82b5ef30 r stream_enc_regs +ffffffff82b5f5dc r se_shift +ffffffff82b5f660 r se_mask +ffffffff82b5f864 r hwseq_reg +ffffffff82b5fa80 r hwseq_shift +ffffffff82b5fb00 r hwseq_mask +ffffffff82b60000 r reg_offsets +ffffffff82b60018 r dce110_compressor_funcs +ffffffff82b61000 r dce110_funcs +ffffffff82b612c0 r dce110_private_funcs +ffffffff82b62000 r dce110_mem_input_v_funcs +ffffffff82b62090 r dvmm_Hw_Setting_1DTiling +ffffffff82b62120 r dvmm_Hw_Setting_2DTiling +ffffffff82b621b0 r dvmm_Hw_Setting_Linear +ffffffff82b63000 r global_color_matrix +ffffffff82b630b0 r input_csc_matrix +ffffffff82b64000 r funcs +ffffffff82b65000 r bios_regs +ffffffff82b65008 r dce110_res_pool_funcs +ffffffff82b650f0 r clk_src_regs +ffffffff82b651ec r dmcu_regs +ffffffff82b65248 r dmcu_shift +ffffffff82b6525c r dmcu_mask +ffffffff82b652a8 r abm_regs +ffffffff82b652e8 r abm_shift +ffffffff82b652fc r abm_mask +ffffffff82b65350 r dce110_tg_offsets +ffffffff82b65398 r res_create_funcs +ffffffff82b653c8 r plane_cap +ffffffff82b653f4 r underlay_plane_cap +ffffffff82b65420 r stoney_resource_cap +ffffffff82b6545c r carrizo_resource_cap +ffffffff82b654a0 r panel_cntl_regs +ffffffff82b654c0 r panel_cntl_shift +ffffffff82b654d0 r panel_cntl_mask +ffffffff82b65510 r link_enc_regs +ffffffff82b658d0 r link_enc_aux_regs +ffffffff82b65920 r link_enc_hpd_regs +ffffffff82b65938 r link_enc_feature +ffffffff82b65948 r cs_shift +ffffffff82b65954 r cs_mask +ffffffff82b65980 r mi_regs +ffffffff82b65b0c r mi_shifts +ffffffff82b65b54 r mi_masks +ffffffff82b65c70 r ipp_regs +ffffffff82b65d6c r ipp_shift +ffffffff82b65d94 r ipp_mask +ffffffff82b65e30 r xfm_regs +ffffffff82b66100 r xfm_shift +ffffffff82b66160 r xfm_mask +ffffffff82b662e0 r opp_regs +ffffffff82b66430 r opp_shift +ffffffff82b6645c r opp_mask +ffffffff82b66510 r aux_engine_regs +ffffffff82b66600 r aux_mask +ffffffff82b66660 r aux_shift +ffffffff82b66680 r i2c_hw_regs +ffffffff82b667d0 r i2c_shifts +ffffffff82b667fc r i2c_masks +ffffffff82b668a0 r audio_regs +ffffffff82b669d4 r audio_shift +ffffffff82b669ec r audio_mask +ffffffff82b66a30 r stream_enc_regs +ffffffff82b66d0c r se_shift +ffffffff82b66d90 r se_mask +ffffffff82b66f94 r hwseq_stoney_reg +ffffffff82b671b0 r hwseq_cz_reg +ffffffff82b673cc r hwseq_shift +ffffffff82b6744c r hwseq_mask +ffffffff82b68000 r dce110_tg_funcs +ffffffff82b69000 r dce110_tg_v_funcs +ffffffff82b6a000 r dce110_xfmv_funcs +ffffffff82b6b000 r reg_offsets +ffffffff82b6c000 r reg_offsets +ffffffff82b6d000 r bios_regs +ffffffff82b6d010 r clk_src_regs +ffffffff82b6d208 r dmcu_regs +ffffffff82b6d264 r dmcu_shift +ffffffff82b6d278 r dmcu_mask +ffffffff82b6d2c4 r abm_regs +ffffffff82b6d304 r abm_shift +ffffffff82b6d318 r abm_mask +ffffffff82b6d360 r dce112_tg_offsets +ffffffff82b6d3a8 r res_create_funcs +ffffffff82b6d3d8 r plane_cap +ffffffff82b6d404 r polaris_11_resource_cap +ffffffff82b6d440 r polaris_10_resource_cap +ffffffff82b6d480 r dce112_res_pool_funcs +ffffffff82b6d570 r panel_cntl_regs +ffffffff82b6d590 r panel_cntl_shift +ffffffff82b6d5a0 r panel_cntl_mask +ffffffff82b6d5e0 r link_enc_regs +ffffffff82b6d9a0 r link_enc_aux_regs +ffffffff82b6d9f0 r link_enc_hpd_regs +ffffffff82b6da08 r link_enc_feature +ffffffff82b6da18 r cs_shift +ffffffff82b6da24 r cs_mask +ffffffff82b6da50 r mi_regs +ffffffff82b6dd68 r mi_shifts +ffffffff82b6ddb0 r mi_masks +ffffffff82b6ded0 r ipp_regs +ffffffff82b6e0c8 r ipp_shift +ffffffff82b6e0f0 r ipp_mask +ffffffff82b6e190 r xfm_regs +ffffffff82b6e730 r xfm_shift +ffffffff82b6e790 r xfm_mask +ffffffff82b6e910 r opp_regs +ffffffff82b6ea60 r opp_shift +ffffffff82b6ea8c r opp_mask +ffffffff82b6eb40 r aux_engine_regs +ffffffff82b6ec30 r aux_mask +ffffffff82b6ec90 r aux_shift +ffffffff82b6ecb0 r i2c_hw_regs +ffffffff82b6ee00 r i2c_shifts +ffffffff82b6ee2c r i2c_masks +ffffffff82b6eed0 r audio_regs +ffffffff82b6efd8 r audio_shift +ffffffff82b6eff0 r audio_mask +ffffffff82b6f030 r stream_enc_regs +ffffffff82b6f5e8 r se_shift +ffffffff82b6f66c r se_mask +ffffffff82b6f870 r hwseq_reg +ffffffff82b6fa8c r hwseq_shift +ffffffff82b6fb0c r hwseq_mask ffffffff82b70000 r bios_regs ffffffff82b70008 r res_cap -ffffffff82b70048 r dce80_res_pool_funcs -ffffffff82b70130 r clk_src_regs -ffffffff82b7022c r dmcu_regs -ffffffff82b70288 r dmcu_shift -ffffffff82b7029c r dmcu_mask -ffffffff82b702e8 r abm_regs -ffffffff82b70328 r abm_shift -ffffffff82b7033c r abm_mask -ffffffff82b70390 r dce80_tg_offsets -ffffffff82b703d8 r plane_cap -ffffffff82b70408 r res_create_funcs -ffffffff82b70440 r panel_cntl_regs -ffffffff82b70460 r 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-ffffffff82b8c000 R dcn20_dwbc_funcs -ffffffff82b8d000 r filter_12tap_16p_upscale -ffffffff82b8d0e0 r filter_12tap_16p_117 -ffffffff82b8d1c0 r filter_12tap_16p_150 -ffffffff82b8d2a0 r filter_12tap_16p_183 -ffffffff82b8d380 r filter_11tap_16p_upscale -ffffffff82b8d450 r filter_11tap_16p_117 -ffffffff82b8d520 r filter_11tap_16p_150 -ffffffff82b8d5f0 r filter_11tap_16p_183 -ffffffff82b8d6c0 r filter_10tap_16p_upscale -ffffffff82b8d780 r filter_10tap_16p_117 -ffffffff82b8d840 r filter_10tap_16p_150 -ffffffff82b8d900 r filter_10tap_16p_183 -ffffffff82b8d9c0 r filter_9tap_16p_upscale -ffffffff82b8da70 r filter_9tap_16p_117 -ffffffff82b8db20 r filter_9tap_16p_150 -ffffffff82b8dbd0 r filter_9tap_16p_183 -ffffffff82b8dc80 r filter_8tap_16p_upscale -ffffffff82b8dd10 r filter_8tap_16p_117 -ffffffff82b8dda0 r filter_8tap_16p_150 -ffffffff82b8de30 r filter_8tap_16p_183 -ffffffff82b8dec0 r filter_7tap_16p_upscale -ffffffff82b8df40 r filter_7tap_16p_117 -ffffffff82b8dfc0 r filter_7tap_16p_150 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r tf_shift -ffffffff82b95ba4 r tf_mask -ffffffff82b965c0 r ipp_regs -ffffffff82b96710 r ipp_shift -ffffffff82b9672c r ipp_mask -ffffffff82b967a0 r opp_regs -ffffffff82b969b0 r opp_shift -ffffffff82b969e8 r opp_mask -ffffffff82b96ac0 r aux_engine_regs -ffffffff82b96bb0 r aux_mask -ffffffff82b96c10 r aux_shift -ffffffff82b96c30 r i2c_hw_regs -ffffffff82b96d80 r i2c_shifts -ffffffff82b96dac r i2c_masks -ffffffff82b96e50 r mpc_regs -ffffffff82b97398 r mpc_shift -ffffffff82b973e0 r mpc_mask -ffffffff82b974f4 r hubbub_reg -ffffffff82b97668 r hubbub_shift -ffffffff82b976f0 r hubbub_mask -ffffffff82b9790c r res_cap_nv10 -ffffffff82b97950 r vmid_regs -ffffffff82b97b10 r vmid_shifts -ffffffff82b97b18 r vmid_masks -ffffffff82b97b40 r tg_regs -ffffffff82b982c0 r tg_shift -ffffffff82b98380 r tg_mask -ffffffff82b98680 r link_enc_regs -ffffffff82b98e20 r link_enc_aux_regs -ffffffff82b98e80 r link_enc_hpd_regs -ffffffff82b98e98 r le_shift -ffffffff82b98f88 r le_mask -ffffffff82b99340 r stream_enc_regs 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res_create_maximus_funcs -ffffffff82ba46b0 r plane_cap -ffffffff82ba46e0 r link_enc_regs -ffffffff82ba4970 r link_enc_aux_regs -ffffffff82ba4990 r link_enc_hpd_regs -ffffffff82ba4998 r le_shift -ffffffff82ba4a88 r le_mask -ffffffff82ba4e40 r link_enc_feature -ffffffff82ba4e50 r cs_shift -ffffffff82ba4e5c r cs_mask -ffffffff82ba4e90 r hubp_regs -ffffffff82ba5620 r hubp_shift -ffffffff82ba56f8 r hubp_mask -ffffffff82ba5a60 r ipp_regs -ffffffff82ba5b40 r ipp_shift -ffffffff82ba5b5c r ipp_mask -ffffffff82ba5bd0 r tf_regs -ffffffff82ba6c10 r tf_shift -ffffffff82ba6e94 r tf_mask -ffffffff82ba78b0 r opp_regs -ffffffff82ba7960 r opp_shift -ffffffff82ba7998 r opp_mask -ffffffff82ba7a70 r aux_engine_regs -ffffffff82ba7ac0 r aux_mask -ffffffff82ba7b20 r aux_shift -ffffffff82ba7b40 r i2c_hw_regs -ffffffff82ba7bb0 r i2c_shifts -ffffffff82ba7bdc r i2c_masks -ffffffff82ba7c80 r tg_regs -ffffffff82ba7f00 r tg_shift -ffffffff82ba7fc0 r tg_mask -ffffffff82ba82c0 r mpc_regs -ffffffff82ba8808 r mpc_shift -ffffffff82ba8854 r mpc_mask -ffffffff82ba897c r hubbub_reg -ffffffff82ba8af0 r hubbub_shift -ffffffff82ba8b78 r hubbub_mask -ffffffff82ba8da0 r audio_regs -ffffffff82ba8df8 r audio_shift -ffffffff82ba8e10 r audio_mask -ffffffff82ba8e50 r stream_enc_regs -ffffffff82ba90f8 r se_shift -ffffffff82ba91d4 r se_mask -ffffffff82ba9540 r hwseq_reg -ffffffff82ba975c r hwseq_shift -ffffffff82ba97dc r hwseq_mask -ffffffff82baa000 r dccg21_funcs -ffffffff82bab000 r hubbub21_funcs -ffffffff82bac000 r dcn21_funcs -ffffffff82bac2c0 r dcn21_private_funcs -ffffffff82bad000 r dcn21_mpll_cfg_ref -ffffffff82bad190 r dcn21_link_enc_funcs -ffffffff82bae000 r bios_regs -ffffffff82bae008 r res_cap_rn -ffffffff82bae048 r dcn21_res_pool_funcs -ffffffff82bae130 r debug_defaults_drv -ffffffff82bae2a8 r debug_defaults_diags -ffffffff82bae420 r clk_src_regs -ffffffff82bae5c4 r dccg_regs -ffffffff82bae6b0 r dccg_shift -ffffffff82bae748 r dccg_mask -ffffffff82bae9a8 r dmcu_regs -ffffffff82baea04 r dmcu_shift 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aux_mask -ffffffff82c2e824 r aux_shift -ffffffff82c2e83c r i2c_shifts -ffffffff82c2e868 r i2c_masks -ffffffff82c2e90c r audio_shift -ffffffff82c2e924 r audio_mask -ffffffff82c2e960 r se_shift -ffffffff82c2ea3c r se_mask -ffffffff82c2eda8 r vpg_shift -ffffffff82c2edd0 r vpg_mask -ffffffff82c2ee64 r afmt_shift -ffffffff82c2ee78 r afmt_mask -ffffffff82c2eebc r hpo_dp_se_shift -ffffffff82c2eee4 r hpo_dp_se_mask -ffffffff82c2ef84 r apg_shift -ffffffff82c2ef8c r apg_mask -ffffffff82c2efa4 r hpo_dp_le_shift -ffffffff82c2efc0 r hpo_dp_le_mask -ffffffff82c2f024 r hwseq_shift -ffffffff82c2f0a4 r hwseq_mask -ffffffff82c30000 r dcn321_link_enc_funcs -ffffffff82c31000 r res_cap_dcn321 -ffffffff82c31040 r debug_defaults_diags -ffffffff82c311b8 r dccg_shift -ffffffff82c31250 r dccg_mask -ffffffff82c314b0 r abm_shift -ffffffff82c314c4 r abm_mask -ffffffff82c31510 r res_create_funcs -ffffffff82c31540 r res_create_maximus_funcs -ffffffff82c31570 r plane_cap -ffffffff82c3159c r le_shift -ffffffff82c3168c r le_mask -ffffffff82c31a44 r link_enc_feature -ffffffff82c31a58 r debug_defaults_drv -ffffffff82c31bd0 r cs_shift -ffffffff82c31bdc r cs_mask -ffffffff82c31c04 r hubbub_shift -ffffffff82c31c8c r hubbub_mask -ffffffff82c31ea8 r vmid_shifts -ffffffff82c31eb0 r vmid_masks -ffffffff82c31ed0 r hubp_shift -ffffffff82c31fcc r hubp_mask -ffffffff82c323bc r tf_shift -ffffffff82c3268c r tf_mask -ffffffff82c331cc r opp_shift -ffffffff82c33204 r opp_mask -ffffffff82c332d8 r optc_shift -ffffffff82c33398 r optc_mask -ffffffff82c33698 r mpc_shift -ffffffff82c33774 r mpc_mask -ffffffff82c33ae0 r dsc_shift -ffffffff82c33b98 r dsc_mask -ffffffff82c33e70 r dwbc30_shift -ffffffff82c33fa4 r dwbc30_mask -ffffffff82c3446c r mcif_wb30_shift -ffffffff82c34518 r mcif_wb30_mask -ffffffff82c347c4 r aux_mask -ffffffff82c34824 r aux_shift -ffffffff82c3483c r i2c_shifts -ffffffff82c34868 r i2c_masks -ffffffff82c3490c r audio_shift -ffffffff82c34924 r audio_mask -ffffffff82c34960 r se_shift -ffffffff82c34a3c r se_mask -ffffffff82c34da8 r vpg_shift -ffffffff82c34dd0 r vpg_mask -ffffffff82c34e64 r afmt_shift -ffffffff82c34e78 r afmt_mask -ffffffff82c34ebc r hpo_dp_se_shift -ffffffff82c34ee4 r hpo_dp_se_mask -ffffffff82c34f84 r apg_shift -ffffffff82c34f8c r apg_mask -ffffffff82c34fa4 r hpo_dp_le_shift -ffffffff82c34fc0 r hpo_dp_le_mask -ffffffff82c35024 r hwseq_shift -ffffffff82c350a4 r hwseq_mask -ffffffff82c37000 R dcn10_soc_defaults -ffffffff82c3708c R dcn10_ip_defaults -ffffffff82c42000 R dml20_funcs -ffffffff82c42030 R dml20v2_funcs -ffffffff82c42060 R dml21_funcs -ffffffff82c42090 R dml30_funcs -ffffffff82c420c0 R dml31_funcs -ffffffff82c420f0 R dml314_funcs -ffffffff82c42120 R dml32_funcs -ffffffff82c45000 R qp_table_422_10bpc_min -ffffffff82c45740 R qp_table_444_8bpc_max -ffffffff82c46080 R qp_table_420_12bpc_max -ffffffff82c467c0 R qp_table_444_10bpc_min -ffffffff82c47400 R qp_table_420_8bpc_max -ffffffff82c47840 R qp_table_444_8bpc_min -ffffffff82c48180 R qp_table_444_12bpc_min -ffffffff82c490c0 R qp_table_420_12bpc_min -ffffffff82c49800 R qp_table_422_12bpc_min -ffffffff82c4a140 R qp_table_422_12bpc_max -ffffffff82c4aa80 R qp_table_444_12bpc_max -ffffffff82c4b9c0 R qp_table_420_8bpc_min -ffffffff82c4be00 R qp_table_422_8bpc_min -ffffffff82c4c340 R qp_table_422_10bpc_max -ffffffff82c4ca80 R qp_table_420_10bpc_max -ffffffff82c4d040 R qp_table_420_10bpc_min -ffffffff82c4d600 R qp_table_444_10bpc_max -ffffffff82c4e240 R qp_table_422_8bpc_max -ffffffff82c50000 r funcs -ffffffff82c50050 r hpd_regs -ffffffff82c501a0 r hpd_shift -ffffffff82c501b0 r hpd_mask -ffffffff82c501c0 r ddc_data_regs -ffffffff82c503a0 r ddc_clk_regs -ffffffff82c50580 r ddc_shift -ffffffff82c505a8 r ddc_mask -ffffffff82c51000 r funcs -ffffffff82c52000 r funcs -ffffffff82c52050 r hpd_regs -ffffffff82c521a0 r hpd_shift -ffffffff82c521b0 r hpd_mask -ffffffff82c521c0 r ddc_data_regs -ffffffff82c523a0 r ddc_clk_regs -ffffffff82c52580 r ddc_shift -ffffffff82c525a8 r ddc_mask -ffffffff82c53000 r funcs -ffffffff82c54000 r funcs -ffffffff82c54050 r hpd_regs -ffffffff82c541a0 r hpd_shift -ffffffff82c541b0 r hpd_mask -ffffffff82c541c0 r ddc_data_regs -ffffffff82c543a0 r ddc_clk_regs -ffffffff82c54580 r ddc_shift -ffffffff82c545a8 r ddc_mask +ffffffff82b70048 r dce120_res_pool_funcs +ffffffff82b70130 r debug_defaults +ffffffff82b702b0 r clk_src_regs +ffffffff82b704a8 r dmcu_regs +ffffffff82b70504 r dmcu_shift +ffffffff82b70518 r dmcu_mask +ffffffff82b70564 r abm_regs +ffffffff82b705a4 r abm_shift +ffffffff82b705b8 r abm_mask +ffffffff82b70600 r dce120_tg_offsets +ffffffff82b70648 r dce121_res_create_funcs +ffffffff82b70678 r res_create_funcs +ffffffff82b706a8 r plane_cap +ffffffff82b706e0 r panel_cntl_regs +ffffffff82b70700 r panel_cntl_shift +ffffffff82b70710 r panel_cntl_mask +ffffffff82b70750 r link_enc_regs +ffffffff82b70b10 r link_enc_aux_regs +ffffffff82b70b60 r link_enc_hpd_regs +ffffffff82b70b78 r link_enc_feature +ffffffff82b70b88 r cs_shift +ffffffff82b70b94 r cs_mask +ffffffff82b70bc0 r mi_regs +ffffffff82b70ed8 r mi_shifts +ffffffff82b70f20 r mi_masks +ffffffff82b71040 r ipp_regs +ffffffff82b71238 r ipp_shift +ffffffff82b71260 r ipp_mask +ffffffff82b71300 r xfm_regs +ffffffff82b718a0 r xfm_shift +ffffffff82b71900 r xfm_mask +ffffffff82b71a80 r opp_regs +ffffffff82b71bd0 r opp_shift +ffffffff82b71bfc r opp_mask +ffffffff82b71cb0 r aux_engine_regs +ffffffff82b71da0 r aux_mask +ffffffff82b71e00 r aux_shift +ffffffff82b71e20 r i2c_hw_regs +ffffffff82b71f70 r i2c_shifts +ffffffff82b71f9c r i2c_masks +ffffffff82b72040 r audio_regs +ffffffff82b72174 r audio_shift +ffffffff82b7218c r audio_mask +ffffffff82b721d0 r stream_enc_regs +ffffffff82b72788 r se_shift +ffffffff82b7280c r se_mask +ffffffff82b72a10 r dce121_hwseq_reg +ffffffff82b72c2c r dce121_hwseq_shift +ffffffff82b72cac r dce121_hwseq_mask +ffffffff82b72ea0 r hwseq_reg +ffffffff82b730bc r hwseq_shift +ffffffff82b7313c r hwseq_mask +ffffffff82b74000 r dce120_tg_funcs +ffffffff82b75000 r bios_regs +ffffffff82b75008 r res_cap +ffffffff82b75048 r dce80_res_pool_funcs +ffffffff82b75130 r clk_src_regs +ffffffff82b7522c r dmcu_regs +ffffffff82b75288 r dmcu_shift +ffffffff82b7529c r dmcu_mask +ffffffff82b752e8 r abm_regs +ffffffff82b75328 r abm_shift +ffffffff82b7533c r abm_mask +ffffffff82b75390 r dce80_tg_offsets +ffffffff82b753d8 r plane_cap +ffffffff82b75408 r res_create_funcs +ffffffff82b75440 r panel_cntl_regs +ffffffff82b75460 r panel_cntl_shift +ffffffff82b75470 r panel_cntl_mask +ffffffff82b754b0 r link_enc_regs +ffffffff82b75870 r link_enc_aux_regs +ffffffff82b758c0 r link_enc_hpd_regs +ffffffff82b758d8 r link_enc_feature +ffffffff82b758e8 r cs_shift +ffffffff82b758f4 r cs_mask +ffffffff82b75920 r mi_regs +ffffffff82b75c38 r mi_shifts +ffffffff82b75c80 r mi_masks +ffffffff82b75da0 r ipp_regs +ffffffff82b75f98 r ipp_shift +ffffffff82b75fc0 r ipp_mask +ffffffff82b76060 r xfm_regs +ffffffff82b76600 r xfm_shift +ffffffff82b76660 r xfm_mask +ffffffff82b767e0 r opp_regs +ffffffff82b76930 r opp_shift +ffffffff82b7695c r opp_mask +ffffffff82b76a10 r aux_engine_regs +ffffffff82b76b00 r aux_mask +ffffffff82b76b60 r aux_shift +ffffffff82b76b80 r i2c_hw_regs +ffffffff82b76cd0 r i2c_shifts +ffffffff82b76cfc r i2c_masks +ffffffff82b76da0 r audio_regs +ffffffff82b76ed4 r audio_shift +ffffffff82b76eec r audio_mask +ffffffff82b76f30 r stream_enc_regs +ffffffff82b775dc r se_shift +ffffffff82b77660 r se_mask +ffffffff82b77864 r hwseq_reg +ffffffff82b77a80 r hwseq_shift +ffffffff82b77b00 r hwseq_mask +ffffffff82b77cf4 r res_cap_81 +ffffffff82b77d30 r res_cap_83 +ffffffff82b78000 r reg_offsets +ffffffff82b78048 r dce80_tg_funcs +ffffffff82b79000 r dcn10_dpp_funcs +ffffffff82b7a000 r dpp_input_csc_matrix +ffffffff82b7c000 r hubbub1_funcs +ffffffff82b7d000 r dcn10_hubp_funcs +ffffffff82b7e000 r reduceSizeAndFraction.prime_numbers +ffffffff82b80000 r dcn10_funcs +ffffffff82b802c0 r dcn10_private_funcs +ffffffff82b81000 r dcn10_ipp_funcs +ffffffff82b81048 r dcn20_ipp_funcs +ffffffff82b82000 r dcn10_lnk_enc_funcs +ffffffff82b83000 r dcn10_mpc_funcs +ffffffff82b84000 r dcn10_opp_funcs +ffffffff82b85000 r dcn10_tg_funcs +ffffffff82b86000 r bios_regs +ffffffff82b86008 r rv2_res_cap +ffffffff82b86044 r res_cap +ffffffff82b86080 r debug_defaults_drv +ffffffff82b861f8 r debug_defaults_diags +ffffffff82b86370 r clk_src_regs +ffffffff82b864c0 r dmcu_regs +ffffffff82b8651c r dmcu_shift +ffffffff82b86530 r dmcu_mask +ffffffff82b8657c r abm_regs +ffffffff82b865bc r abm_shift +ffffffff82b865d0 r abm_mask +ffffffff82b86618 r res_create_funcs +ffffffff82b86648 r res_create_maximus_funcs +ffffffff82b86678 r plane_cap +ffffffff82b866a8 r dcn10_res_pool_funcs +ffffffff82b86790 r panel_cntl_regs +ffffffff82b867b0 r panel_cntl_shift +ffffffff82b867c0 r panel_cntl_mask +ffffffff82b86800 r link_enc_regs +ffffffff82b86d10 r link_enc_aux_regs +ffffffff82b86d50 r link_enc_hpd_regs +ffffffff82b86d60 r le_shift +ffffffff82b86e50 r le_mask +ffffffff82b87208 r link_enc_feature +ffffffff82b87218 r cs_shift +ffffffff82b87224 r cs_mask +ffffffff82b87250 r hubp_regs +ffffffff82b87900 r hubp_shift +ffffffff82b879c4 r hubp_mask +ffffffff82b87cd0 r ipp_regs +ffffffff82b87db0 r ipp_shift +ffffffff82b87dcc r ipp_mask +ffffffff82b87e40 r tf_regs +ffffffff82b88da0 r tf_shift +ffffffff82b89008 r tf_mask +ffffffff82b899a0 r opp_regs +ffffffff82b89a70 r opp_shift +ffffffff82b89a90 r opp_mask +ffffffff82b89b10 r tg_regs +ffffffff82b8a010 r tg_shift +ffffffff82b8a0d0 r tg_mask +ffffffff82b8a3d0 r aux_engine_regs +ffffffff82b8a4c0 r aux_mask +ffffffff82b8a520 r aux_shift +ffffffff82b8a540 r i2c_hw_regs +ffffffff82b8a690 r i2c_shifts +ffffffff82b8a6bc r i2c_masks +ffffffff82b8a760 r mpc_regs +ffffffff82b8a880 r mpc_shift +ffffffff82b8a898 r mpc_mask +ffffffff82b8a8f4 r hubbub_reg +ffffffff82b8aa68 r hubbub_shift +ffffffff82b8aaf0 r hubbub_mask +ffffffff82b8ad10 r audio_regs +ffffffff82b8adc0 r audio_shift +ffffffff82b8add8 r audio_mask +ffffffff82b8ae20 r stream_enc_regs +ffffffff82b8b370 r se_shift +ffffffff82b8b44c r se_mask +ffffffff82b8b7b8 r hwseq_reg +ffffffff82b8b9d4 r hwseq_shift +ffffffff82b8ba54 r hwseq_mask +ffffffff82b8c000 r audio_clock_info_table_48bpc +ffffffff82b8c190 r audio_clock_info_table_36bpc +ffffffff82b8c320 r audio_clock_info_table +ffffffff82b8c4e0 r dcn10_str_enc_funcs +ffffffff82b8d000 r dccg2_funcs +ffffffff82b8f000 r dpp_input_csc_matrix +ffffffff82b90000 R dcn20_dsc_funcs +ffffffff82b91000 R dcn20_dwbc_funcs +ffffffff82b92000 r filter_12tap_16p_upscale +ffffffff82b920e0 r filter_12tap_16p_117 +ffffffff82b921c0 r filter_12tap_16p_150 +ffffffff82b922a0 r filter_12tap_16p_183 +ffffffff82b92380 r filter_11tap_16p_upscale +ffffffff82b92450 r filter_11tap_16p_117 +ffffffff82b92520 r filter_11tap_16p_150 +ffffffff82b925f0 r filter_11tap_16p_183 +ffffffff82b926c0 r filter_10tap_16p_upscale +ffffffff82b92780 r filter_10tap_16p_117 +ffffffff82b92840 r filter_10tap_16p_150 +ffffffff82b92900 r filter_10tap_16p_183 +ffffffff82b929c0 r filter_9tap_16p_upscale +ffffffff82b92a70 r filter_9tap_16p_117 +ffffffff82b92b20 r filter_9tap_16p_150 +ffffffff82b92bd0 r filter_9tap_16p_183 +ffffffff82b92c80 r filter_8tap_16p_upscale +ffffffff82b92d10 r filter_8tap_16p_117 +ffffffff82b92da0 r filter_8tap_16p_150 +ffffffff82b92e30 r filter_8tap_16p_183 +ffffffff82b92ec0 r filter_7tap_16p_upscale +ffffffff82b92f40 r filter_7tap_16p_117 +ffffffff82b92fc0 r filter_7tap_16p_150 +ffffffff82b93040 r filter_7tap_16p_183 +ffffffff82b930c0 r filter_6tap_16p_upscale +ffffffff82b93130 r filter_6tap_16p_117 +ffffffff82b931a0 r filter_6tap_16p_150 +ffffffff82b93210 r filter_6tap_16p_183 +ffffffff82b93280 r filter_5tap_16p_upscale +ffffffff82b932e0 r filter_5tap_16p_117 +ffffffff82b93340 r filter_5tap_16p_150 +ffffffff82b933a0 r filter_5tap_16p_183 +ffffffff82b93400 r filter_4tap_16p_upscale +ffffffff82b93450 r filter_4tap_16p_117 +ffffffff82b934a0 r filter_4tap_16p_150 +ffffffff82b934f0 r filter_4tap_16p_183 +ffffffff82b93540 r filter_3tap_16p_upscale +ffffffff82b93580 r filter_3tap_16p_117 +ffffffff82b935c0 r filter_3tap_16p_150 +ffffffff82b93600 r filter_3tap_16p_183 +ffffffff82b94000 r hubbub2_funcs +ffffffff82b95000 r dcn20_funcs +ffffffff82b952c0 r dcn20_private_funcs +ffffffff82b96000 r dcn2_mpll_cfg +ffffffff82b96190 r dcn20_link_enc_funcs +ffffffff82b97000 R dcn20_mmhubbub_funcs +ffffffff82b98000 R dcn20_mpc_funcs +ffffffff82b99000 r tf_regs +ffffffff82b9a920 r tf_shift +ffffffff82b9aba4 r tf_mask +ffffffff82b9b5c0 r ipp_regs +ffffffff82b9b710 r ipp_shift +ffffffff82b9b72c r ipp_mask +ffffffff82b9b7a0 r opp_regs +ffffffff82b9b9b0 r opp_shift +ffffffff82b9b9e8 r opp_mask +ffffffff82b9bac0 r aux_engine_regs +ffffffff82b9bbb0 r aux_mask +ffffffff82b9bc10 r aux_shift +ffffffff82b9bc30 r i2c_hw_regs +ffffffff82b9bd80 r i2c_shifts +ffffffff82b9bdac r i2c_masks +ffffffff82b9be50 r mpc_regs +ffffffff82b9c398 r mpc_shift +ffffffff82b9c3e0 r mpc_mask +ffffffff82b9c4f4 r hubbub_reg +ffffffff82b9c668 r hubbub_shift +ffffffff82b9c6f0 r hubbub_mask +ffffffff82b9c90c r res_cap_nv10 +ffffffff82b9c950 r vmid_regs +ffffffff82b9cb10 r vmid_shifts +ffffffff82b9cb18 r vmid_masks +ffffffff82b9cb40 r tg_regs +ffffffff82b9d2c0 r tg_shift +ffffffff82b9d380 r tg_mask +ffffffff82b9d680 r link_enc_regs +ffffffff82b9de20 r link_enc_aux_regs +ffffffff82b9de80 r link_enc_hpd_regs +ffffffff82b9de98 r le_shift +ffffffff82b9df88 r le_mask +ffffffff82b9e340 r stream_enc_regs +ffffffff82b9eb38 r se_shift +ffffffff82b9ec14 r se_mask +ffffffff82b9ef80 r hwseq_reg +ffffffff82b9f19c r hwseq_shift +ffffffff82b9f21c r hwseq_mask +ffffffff82b9f410 r dsc_regs +ffffffff82b9f8a8 r dsc_shift +ffffffff82b9f960 r dsc_mask +ffffffff82b9fc40 r hubp_regs +ffffffff82ba0888 r hubp_shift +ffffffff82ba0984 r hubp_mask +ffffffff82ba0d80 r dwbc20_regs +ffffffff82ba0e38 r dwbc20_shift +ffffffff82ba0eb8 r dwbc20_mask +ffffffff82ba10b0 r mcif_wb20_regs +ffffffff82ba1190 r mcif_wb20_shift +ffffffff82ba1230 r mcif_wb20_mask +ffffffff82ba14b0 r link_enc_feature +ffffffff82ba14c0 r bios_regs +ffffffff82ba14c8 r dcn20_res_pool_funcs +ffffffff82ba15b0 r res_cap_nv14 +ffffffff82ba15f0 r debug_defaults_drv +ffffffff82ba1768 r debug_defaults_diags +ffffffff82ba18e0 r clk_src_regs +ffffffff82ba1ad8 r dccg_regs +ffffffff82ba1bc4 r dccg_shift +ffffffff82ba1c5c r dccg_mask +ffffffff82ba1ebc r dmcu_regs +ffffffff82ba1f18 r dmcu_shift +ffffffff82ba1f2c r dmcu_mask +ffffffff82ba1f78 r abm_regs +ffffffff82ba1fb8 r abm_shift +ffffffff82ba1fcc r abm_mask +ffffffff82ba2018 r res_create_funcs +ffffffff82ba2048 r res_create_maximus_funcs +ffffffff82ba2078 r plane_cap +ffffffff82ba20b0 r panel_cntl_regs +ffffffff82ba20d0 r panel_cntl_shift +ffffffff82ba20e0 r panel_cntl_mask +ffffffff82ba211c r cs_shift +ffffffff82ba2128 r cs_mask +ffffffff82ba2150 r audio_regs +ffffffff82ba2284 r audio_shift +ffffffff82ba229c r audio_mask +ffffffff82ba3000 r dcn20_str_enc_funcs +ffffffff82ba4000 r dccg201_funcs +ffffffff82ba5000 r hubbub201_funcs +ffffffff82ba6000 r dcn201_funcs +ffffffff82ba62c0 r dcn201_private_funcs +ffffffff82ba7000 r dcn201_link_enc_funcs +ffffffff82ba8000 R dcn201_mpc_funcs +ffffffff82ba9000 r bios_regs +ffffffff82ba9008 r res_cap_dnc201 +ffffffff82ba9048 r debug_defaults_drv +ffffffff82ba91c0 r clk_src_regs +ffffffff82ba9268 r dccg_regs +ffffffff82ba9354 r dccg_shift +ffffffff82ba93ec r dccg_mask +ffffffff82ba9650 r res_create_funcs +ffffffff82ba9680 r res_create_maximus_funcs +ffffffff82ba96b0 r plane_cap +ffffffff82ba96e0 r link_enc_regs +ffffffff82ba9970 r link_enc_aux_regs +ffffffff82ba9990 r link_enc_hpd_regs +ffffffff82ba9998 r le_shift +ffffffff82ba9a88 r le_mask +ffffffff82ba9e40 r link_enc_feature +ffffffff82ba9e50 r cs_shift +ffffffff82ba9e5c r cs_mask +ffffffff82ba9e90 r hubp_regs +ffffffff82baa620 r hubp_shift +ffffffff82baa6f8 r hubp_mask +ffffffff82baaa60 r ipp_regs +ffffffff82baab40 r ipp_shift +ffffffff82baab5c r ipp_mask +ffffffff82baabd0 r tf_regs +ffffffff82babc10 r tf_shift +ffffffff82babe94 r tf_mask +ffffffff82bac8b0 r opp_regs +ffffffff82bac960 r opp_shift +ffffffff82bac998 r opp_mask +ffffffff82baca70 r aux_engine_regs +ffffffff82bacac0 r aux_mask +ffffffff82bacb20 r aux_shift +ffffffff82bacb40 r i2c_hw_regs +ffffffff82bacbb0 r i2c_shifts +ffffffff82bacbdc r i2c_masks +ffffffff82bacc80 r tg_regs +ffffffff82bacf00 r tg_shift +ffffffff82bacfc0 r tg_mask +ffffffff82bad2c0 r mpc_regs +ffffffff82bad808 r mpc_shift +ffffffff82bad854 r mpc_mask +ffffffff82bad97c r hubbub_reg +ffffffff82badaf0 r hubbub_shift +ffffffff82badb78 r hubbub_mask +ffffffff82badda0 r audio_regs +ffffffff82baddf8 r audio_shift +ffffffff82bade10 r audio_mask +ffffffff82bade50 r stream_enc_regs +ffffffff82bae0f8 r se_shift +ffffffff82bae1d4 r se_mask +ffffffff82bae540 r hwseq_reg +ffffffff82bae75c r hwseq_shift +ffffffff82bae7dc r hwseq_mask +ffffffff82baf000 r dccg21_funcs +ffffffff82bb0000 r hubbub21_funcs +ffffffff82bb1000 r dcn21_funcs +ffffffff82bb12c0 r dcn21_private_funcs +ffffffff82bb2000 r dcn21_mpll_cfg_ref +ffffffff82bb2190 r dcn21_link_enc_funcs +ffffffff82bb3000 r bios_regs +ffffffff82bb3008 r res_cap_rn +ffffffff82bb3048 r dcn21_res_pool_funcs +ffffffff82bb3130 r debug_defaults_drv +ffffffff82bb32a8 r debug_defaults_diags +ffffffff82bb3420 r clk_src_regs +ffffffff82bb35c4 r dccg_regs +ffffffff82bb36b0 r dccg_shift +ffffffff82bb3748 r dccg_mask +ffffffff82bb39a8 r dmcu_regs +ffffffff82bb3a04 r dmcu_shift +ffffffff82bb3a18 r dmcu_mask +ffffffff82bb3a64 r abm_regs +ffffffff82bb3aa4 r abm_shift +ffffffff82bb3ab8 r abm_mask +ffffffff82bb3b00 r res_create_funcs +ffffffff82bb3b30 r res_create_maximus_funcs +ffffffff82bb3b60 r plane_cap +ffffffff82bb3b90 r panel_cntl_regs +ffffffff82bb3bb0 r panel_cntl_shift +ffffffff82bb3bc0 r panel_cntl_mask +ffffffff82bb3c00 r link_enc_regs +ffffffff82bb4260 r link_enc_aux_regs +ffffffff82bb42b0 r link_enc_hpd_regs +ffffffff82bb42c4 r le_shift +ffffffff82bb43b4 r le_mask +ffffffff82bb476c r link_enc_feature +ffffffff82bb477c r panel_config_defaults +ffffffff82bb47b8 r cs_shift +ffffffff82bb47c4 r cs_mask +ffffffff82bb47f0 r hubp_regs +ffffffff82bb5020 r hubp_shift +ffffffff82bb511c r hubp_mask +ffffffff82bb5510 r ipp_regs +ffffffff82bb55f0 r ipp_shift +ffffffff82bb560c r ipp_mask +ffffffff82bb5680 r tf_regs +ffffffff82bb6740 r tf_shift +ffffffff82bb69c4 r tf_mask +ffffffff82bb73e0 r opp_regs +ffffffff82bb75f0 r opp_shift +ffffffff82bb7628 r opp_mask +ffffffff82bb7700 r tg_regs +ffffffff82bb7c00 r tg_shift +ffffffff82bb7cc0 r tg_mask +ffffffff82bb7fc0 r aux_engine_regs +ffffffff82bb8088 r aux_mask +ffffffff82bb80e8 r aux_shift +ffffffff82bb8100 r i2c_hw_regs +ffffffff82bb8218 r i2c_shifts +ffffffff82bb8244 r i2c_masks +ffffffff82bb82e8 r mpc_regs +ffffffff82bb8830 r mpc_shift +ffffffff82bb8878 r mpc_mask +ffffffff82bb898c r hubbub_reg +ffffffff82bb8b00 r hubbub_shift +ffffffff82bb8b88 r hubbub_mask +ffffffff82bb8db0 r vmid_regs +ffffffff82bb8f70 r vmid_shifts +ffffffff82bb8f78 r vmid_masks +ffffffff82bb8fa0 r dsc_regs +ffffffff82bb9438 r dsc_shift +ffffffff82bb94f0 r dsc_mask +ffffffff82bb97d0 r audio_regs +ffffffff82bb98d8 r audio_shift +ffffffff82bb98f0 r audio_mask +ffffffff82bb9930 r stream_enc_regs +ffffffff82bb9fd4 r se_shift +ffffffff82bba0b0 r se_mask +ffffffff82bba41c r hwseq_reg +ffffffff82bba638 r hwseq_shift +ffffffff82bba6b8 r hwseq_mask +ffffffff82bbb000 r dccg3_funcs +ffffffff82bbc000 r dcn30_link_enc_funcs +ffffffff82bbd000 r dcn30_str_enc_funcs +ffffffff82bbe000 r dpp_input_csc_matrix +ffffffff82bbf000 R dcn30_dwbc_funcs +ffffffff82bc0000 r hubbub30_funcs +ffffffff82bc2000 r dcn30_funcs +ffffffff82bc22c0 r dcn30_private_funcs +ffffffff82bc3000 R dcn30_mmhubbub_funcs +ffffffff82bc4000 R dcn30_mpc_funcs +ffffffff82bc5000 r bios_regs +ffffffff82bc5008 r res_cap_dcn3 +ffffffff82bc5048 r debug_defaults_drv +ffffffff82bc51c0 r debug_defaults_diags +ffffffff82bc5340 r clk_src_regs +ffffffff82bc5538 r dccg_regs +ffffffff82bc5624 r dccg_shift +ffffffff82bc56bc r dccg_mask +ffffffff82bc5920 r abm_regs +ffffffff82bc5aa0 r abm_shift +ffffffff82bc5ab4 r abm_mask +ffffffff82bc5b00 r res_create_funcs +ffffffff82bc5b30 r res_create_maximus_funcs +ffffffff82bc5b60 r plane_cap +ffffffff82bc5b90 r dcn30_res_pool_funcs +ffffffff82bc5c80 r panel_cntl_regs +ffffffff82bc5ca0 r panel_cntl_shift +ffffffff82bc5cb0 r panel_cntl_mask +ffffffff82bc5cf0 r link_enc_regs +ffffffff82bc6490 r link_enc_aux_regs +ffffffff82bc64f0 r link_enc_hpd_regs +ffffffff82bc6508 r le_shift +ffffffff82bc65f8 r le_mask +ffffffff82bc69b0 r link_enc_feature +ffffffff82bc69c0 r panel_config_defaults +ffffffff82bc69fc r cs_shift +ffffffff82bc6a08 r cs_mask +ffffffff82bc6a30 r hubbub_reg +ffffffff82bc6ba4 r hubbub_shift +ffffffff82bc6c2c r hubbub_mask +ffffffff82bc6e50 r vmid_regs +ffffffff82bc7010 r vmid_shifts +ffffffff82bc7018 r vmid_masks +ffffffff82bc7040 r hubp_regs +ffffffff82bc7c88 r hubp_shift +ffffffff82bc7d84 r hubp_mask +ffffffff82bc8180 r dpp_regs +ffffffff82bca100 r tf_shift +ffffffff82bca3d0 r tf_mask +ffffffff82bcaf10 r opp_regs +ffffffff82bcb120 r opp_shift +ffffffff82bcb158 r opp_mask +ffffffff82bcb230 r optc_regs +ffffffff82bcb9b0 r optc_shift +ffffffff82bcba70 r optc_mask +ffffffff82bcbd70 r mpc_regs +ffffffff82bcd55c r mpc_shift +ffffffff82bcd638 r mpc_mask +ffffffff82bcd9b0 r dsc_regs +ffffffff82bcde48 r dsc_shift +ffffffff82bcdf00 r dsc_mask +ffffffff82bce1e0 r dwbc30_regs +ffffffff82bce3bc r dwbc30_shift +ffffffff82bce4f0 r dwbc30_mask +ffffffff82bce9c0 r mcif_wb30_regs +ffffffff82bceabc r mcif_wb30_shift +ffffffff82bceb68 r mcif_wb30_mask +ffffffff82bcee20 r aux_engine_regs +ffffffff82bcef10 r aux_mask +ffffffff82bcef70 r aux_shift +ffffffff82bcef90 r i2c_hw_regs +ffffffff82bcf0e0 r i2c_shifts +ffffffff82bcf10c r i2c_masks +ffffffff82bcf1b0 r audio_regs +ffffffff82bcf2e4 r audio_shift +ffffffff82bcf2fc r audio_mask +ffffffff82bcf340 r stream_enc_regs +ffffffff82bcfb38 r se_shift +ffffffff82bcfc14 r se_mask +ffffffff82bcff80 r vpg_regs +ffffffff82bd000c r vpg_shift +ffffffff82bd0034 r vpg_mask +ffffffff82bd00d0 r afmt_regs +ffffffff82bd01cc r afmt_shift +ffffffff82bd01e0 r afmt_mask +ffffffff82bd0224 r hwseq_reg +ffffffff82bd0440 r hwseq_shift +ffffffff82bd04c0 r hwseq_mask +ffffffff82bd1000 r dccg301_funcs +ffffffff82bd2000 r dcn301_link_enc_funcs +ffffffff82bd3000 r hubbub301_funcs +ffffffff82bd4000 r dcn301_funcs +ffffffff82bd42c0 r dcn301_private_funcs +ffffffff82bd5000 r dcn301_link_panel_cntl_funcs +ffffffff82bd6000 r bios_regs +ffffffff82bd6008 r debug_defaults_drv +ffffffff82bd6180 r debug_defaults_diags +ffffffff82bd6300 r clk_src_regs +ffffffff82bd6450 r dccg_regs +ffffffff82bd653c r dccg_shift +ffffffff82bd65d4 r dccg_mask +ffffffff82bd6840 r abm_regs +ffffffff82bd6940 r abm_shift +ffffffff82bd6954 r abm_mask +ffffffff82bd69a0 r res_create_funcs +ffffffff82bd69d0 r res_create_maximus_funcs +ffffffff82bd6a00 r plane_cap +ffffffff82bd6a30 r panel_cntl_regs +ffffffff82bd6a70 r panel_cntl_shift +ffffffff82bd6a80 r panel_cntl_mask +ffffffff82bd6ac0 r link_enc_regs +ffffffff82bd6fd0 r link_enc_aux_regs +ffffffff82bd7010 r link_enc_hpd_regs +ffffffff82bd7020 r le_shift +ffffffff82bd7110 r le_mask +ffffffff82bd74c8 r link_enc_feature +ffffffff82bd74d8 r cs_shift +ffffffff82bd74e4 r cs_mask +ffffffff82bd750c r hubbub_reg +ffffffff82bd7680 r hubbub_shift +ffffffff82bd7708 r hubbub_mask +ffffffff82bd7930 r vmid_regs +ffffffff82bd7af0 r vmid_shifts +ffffffff82bd7af8 r vmid_masks +ffffffff82bd7b20 r hubp_regs +ffffffff82bd8350 r hubp_shift +ffffffff82bd844c r hubp_mask +ffffffff82bd8840 r dpp_regs +ffffffff82bd9d40 r tf_shift +ffffffff82bda010 r tf_mask +ffffffff82bdab50 r opp_regs +ffffffff82bdacb0 r opp_shift +ffffffff82bdace8 r opp_mask +ffffffff82bdadc0 r optc_regs +ffffffff82bdb2c0 r optc_shift +ffffffff82bdb380 r optc_mask +ffffffff82bdb680 r mpc_regs +ffffffff82bdce6c r mpc_shift +ffffffff82bdcf48 r mpc_mask +ffffffff82bdd2c0 r dsc_regs +ffffffff82bdd50c r dsc_shift +ffffffff82bdd5c4 r dsc_mask +ffffffff82bdd8a0 r dwbc30_regs +ffffffff82bdda7c r dwbc30_shift +ffffffff82bddbb0 r dwbc30_mask +ffffffff82bde080 r mcif_wb30_regs +ffffffff82bde17c r mcif_wb30_shift +ffffffff82bde228 r mcif_wb30_mask +ffffffff82bde4e0 r aux_engine_regs +ffffffff82bde580 r aux_mask +ffffffff82bde5e0 r aux_shift +ffffffff82bde600 r i2c_hw_regs +ffffffff82bde6e0 r i2c_shifts +ffffffff82bde70c r i2c_masks +ffffffff82bde7b0 r audio_regs +ffffffff82bde8e4 r audio_shift +ffffffff82bde8fc r audio_mask +ffffffff82bde940 r stream_enc_regs +ffffffff82bdee90 r se_shift +ffffffff82bdef6c r se_mask +ffffffff82bdf2e0 r vpg_regs +ffffffff82bdf330 r vpg_shift +ffffffff82bdf358 r vpg_mask +ffffffff82bdf3f0 r afmt_regs +ffffffff82bdf480 r afmt_shift +ffffffff82bdf494 r afmt_mask +ffffffff82bdf4d8 r hwseq_reg +ffffffff82bdf6f4 r hwseq_shift +ffffffff82bdf774 r hwseq_mask +ffffffff82be0000 r bios_regs +ffffffff82be0008 r res_cap_dcn302 +ffffffff82be0048 r debug_defaults_drv +ffffffff82be01c0 r debug_defaults_diags +ffffffff82be0340 r clk_src_regs +ffffffff82be04e4 r dccg_regs +ffffffff82be05d0 r dccg_shift +ffffffff82be0668 r dccg_mask +ffffffff82be08d0 r abm_regs +ffffffff82be0a10 r abm_shift +ffffffff82be0a24 r abm_mask +ffffffff82be0a70 r res_create_funcs +ffffffff82be0aa0 r res_create_maximus_funcs +ffffffff82be0ad0 r plane_cap +ffffffff82be0b00 r panel_cntl_regs +ffffffff82be0b20 r panel_cntl_shift +ffffffff82be0b30 r panel_cntl_mask +ffffffff82be0b70 r link_enc_regs +ffffffff82be11d0 r link_enc_aux_regs +ffffffff82be1220 r link_enc_hpd_regs +ffffffff82be1234 r le_shift +ffffffff82be1324 r le_mask +ffffffff82be16dc r link_enc_feature +ffffffff82be16ec r panel_config_defaults +ffffffff82be1728 r cs_shift +ffffffff82be1734 r cs_mask +ffffffff82be175c r hubbub_reg +ffffffff82be18d0 r hubbub_shift +ffffffff82be1958 r hubbub_mask +ffffffff82be1b80 r vmid_regs +ffffffff82be1d40 r vmid_shifts +ffffffff82be1d48 r vmid_masks +ffffffff82be1d70 r hubp_regs +ffffffff82be27ac r hubp_shift +ffffffff82be28a8 r hubp_mask +ffffffff82be2ca0 r dpp_regs +ffffffff82be46e0 r tf_shift +ffffffff82be49b0 r tf_mask +ffffffff82be54f0 r opp_regs +ffffffff82be56a8 r opp_shift +ffffffff82be56e0 r opp_mask +ffffffff82be57c0 r optc_regs +ffffffff82be5e00 r optc_shift +ffffffff82be5ec0 r optc_mask +ffffffff82be61c0 r mpc_regs +ffffffff82be79ac r mpc_shift +ffffffff82be7a88 r mpc_mask +ffffffff82be7e00 r dsc_regs +ffffffff82be81d4 r dsc_shift +ffffffff82be828c r dsc_mask +ffffffff82be8570 r dwbc30_regs +ffffffff82be874c r dwbc30_shift +ffffffff82be8880 r dwbc30_mask +ffffffff82be8d50 r mcif_wb30_regs +ffffffff82be8e4c r mcif_wb30_shift +ffffffff82be8ef8 r mcif_wb30_mask +ffffffff82be91b0 r aux_engine_regs +ffffffff82be9278 r aux_mask +ffffffff82be92d8 r aux_shift +ffffffff82be92f0 r i2c_hw_regs +ffffffff82be9408 r i2c_shifts +ffffffff82be9434 r i2c_masks +ffffffff82be94e0 r audio_regs +ffffffff82be9614 r audio_shift +ffffffff82be962c r audio_mask +ffffffff82be9670 r stream_enc_regs +ffffffff82be9d14 r se_shift +ffffffff82be9df0 r se_mask +ffffffff82bea160 r vpg_regs +ffffffff82bea1d8 r vpg_shift +ffffffff82bea200 r vpg_mask +ffffffff82bea2a0 r afmt_regs +ffffffff82bea378 r afmt_shift +ffffffff82bea38c r afmt_mask +ffffffff82bea3d0 r hwseq_reg +ffffffff82bea5ec r hwseq_shift +ffffffff82bea66c r hwseq_mask +ffffffff82beb000 r bios_regs +ffffffff82beb008 r res_cap_dcn303 +ffffffff82beb048 r debug_defaults_drv +ffffffff82beb1c0 r debug_defaults_diags +ffffffff82beb340 r clk_src_regs +ffffffff82beb3e8 r dccg_regs +ffffffff82beb4d4 r dccg_shift +ffffffff82beb56c r dccg_mask +ffffffff82beb7d0 r abm_regs +ffffffff82beb850 r abm_shift +ffffffff82beb864 r abm_mask +ffffffff82beb8b0 r res_create_funcs +ffffffff82beb8e0 r res_create_maximus_funcs +ffffffff82beb910 r plane_cap +ffffffff82beb940 r panel_cntl_regs +ffffffff82beb960 r panel_cntl_shift +ffffffff82beb970 r panel_cntl_mask +ffffffff82beb9b0 r link_enc_regs +ffffffff82bebc40 r link_enc_aux_regs +ffffffff82bebc60 r link_enc_hpd_regs +ffffffff82bebc68 r le_shift +ffffffff82bebd58 r le_mask +ffffffff82bec110 r link_enc_feature +ffffffff82bec120 r panel_config_defaults +ffffffff82bec15c r cs_shift +ffffffff82bec168 r cs_mask +ffffffff82bec190 r hubbub_reg +ffffffff82bec304 r hubbub_shift +ffffffff82bec38c r hubbub_mask +ffffffff82bec5b0 r vmid_regs +ffffffff82bec770 r vmid_shifts +ffffffff82bec778 r vmid_masks +ffffffff82bec7a0 r hubp_regs +ffffffff82becbb8 r hubp_shift +ffffffff82beccb4 r hubp_mask +ffffffff82bed0b0 r dpp_regs +ffffffff82bedb30 r tf_shift +ffffffff82bede00 r tf_mask +ffffffff82bee940 r opp_regs +ffffffff82bee9f0 r opp_shift +ffffffff82beea28 r opp_mask +ffffffff82beeb00 r optc_regs +ffffffff82beed80 r optc_shift +ffffffff82beee40 r optc_mask +ffffffff82bef140 r mpc_regs +ffffffff82bf092c r mpc_shift +ffffffff82bf0a08 r mpc_mask +ffffffff82bf0d80 r dsc_regs +ffffffff82bf0f08 r dsc_shift +ffffffff82bf0fc0 r dsc_mask +ffffffff82bf12a0 r dwbc30_regs +ffffffff82bf147c r dwbc30_shift +ffffffff82bf15b0 r dwbc30_mask +ffffffff82bf1a80 r mcif_wb30_regs +ffffffff82bf1b7c r mcif_wb30_shift +ffffffff82bf1c28 r mcif_wb30_mask +ffffffff82bf1ee0 r aux_engine_regs +ffffffff82bf1f30 r aux_mask +ffffffff82bf1f90 r aux_shift +ffffffff82bf1fb0 r i2c_hw_regs +ffffffff82bf2020 r i2c_shifts +ffffffff82bf204c r i2c_masks +ffffffff82bf20f0 r audio_regs +ffffffff82bf2224 r audio_shift +ffffffff82bf223c r audio_mask +ffffffff82bf2280 r stream_enc_regs +ffffffff82bf2528 r se_shift +ffffffff82bf2604 r se_mask +ffffffff82bf2970 r vpg_regs +ffffffff82bf29ac r vpg_shift +ffffffff82bf29d4 r vpg_mask +ffffffff82bf2a70 r afmt_regs +ffffffff82bf2adc r afmt_shift +ffffffff82bf2af0 r afmt_mask +ffffffff82bf2b34 r hwseq_reg +ffffffff82bf2d50 r hwseq_shift +ffffffff82bf2dd0 r hwseq_mask +ffffffff82bf3000 r dccg31_funcs +ffffffff82bf4000 r dcn31_link_enc_funcs +ffffffff82bf5000 r dcn30_str_enc_funcs +ffffffff82bf6000 r hubbub31_funcs +ffffffff82bf7000 r dcn31_funcs +ffffffff82bf72c0 r dcn31_private_funcs +ffffffff82bf8000 r dcn31_link_panel_cntl_funcs +ffffffff82bf9000 r bios_regs +ffffffff82bf9008 r res_cap_dcn31 +ffffffff82bf9048 r debug_defaults_diags +ffffffff82bf91c0 r clk_src_regs +ffffffff82bf9370 r clk_src_regs_b0 +ffffffff82bf9514 r dccg_regs +ffffffff82bf9600 r dccg_shift +ffffffff82bf9698 r dccg_mask +ffffffff82bf9900 r abm_regs +ffffffff82bf9a00 r abm_shift +ffffffff82bf9a14 r abm_mask +ffffffff82bf9a60 r res_create_funcs +ffffffff82bf9a90 r res_create_maximus_funcs +ffffffff82bf9ac0 r plane_cap +ffffffff82bf9af0 r link_enc_regs +ffffffff82bfa150 r link_enc_aux_regs +ffffffff82bfa1a0 r link_enc_hpd_regs +ffffffff82bfa1b4 r le_shift +ffffffff82bfa2a4 r le_mask +ffffffff82bfa65c r link_enc_feature +ffffffff82bfa66c r panel_config_defaults +ffffffff82bfa6a8 r debug_defaults_drv +ffffffff82bfa820 r cs_shift +ffffffff82bfa82c r cs_mask +ffffffff82bfa854 r hubbub_reg +ffffffff82bfa9c8 r hubbub_shift +ffffffff82bfaa50 r hubbub_mask +ffffffff82bfac70 r vmid_regs +ffffffff82bfae30 r vmid_shifts +ffffffff82bfae38 r vmid_masks +ffffffff82bfae60 r hubp_regs +ffffffff82bfb690 r hubp_shift +ffffffff82bfb78c r hubp_mask +ffffffff82bfbb80 r dpp_regs +ffffffff82bfd080 r tf_shift +ffffffff82bfd350 r tf_mask +ffffffff82bfde90 r opp_regs +ffffffff82bfdff0 r opp_shift +ffffffff82bfe028 r opp_mask +ffffffff82bfe100 r optc_regs +ffffffff82bfe600 r optc_shift +ffffffff82bfe6c0 r optc_mask +ffffffff82bfe9c0 r mpc_regs +ffffffff82c001ac r mpc_shift +ffffffff82c00288 r mpc_mask +ffffffff82c00600 r dsc_regs +ffffffff82c0084c r dsc_shift +ffffffff82c00904 r dsc_mask +ffffffff82c00be0 r dwbc30_regs +ffffffff82c00dbc r dwbc30_shift +ffffffff82c00ef0 r dwbc30_mask +ffffffff82c013c0 r mcif_wb30_regs +ffffffff82c014bc r mcif_wb30_shift +ffffffff82c01568 r mcif_wb30_mask +ffffffff82c01820 r aux_engine_regs +ffffffff82c018e8 r aux_mask +ffffffff82c01948 r aux_shift +ffffffff82c01960 r i2c_hw_regs +ffffffff82c01a78 r i2c_shifts +ffffffff82c01aa4 r i2c_masks +ffffffff82c01b50 r audio_regs +ffffffff82c01c84 r audio_shift +ffffffff82c01c9c r audio_mask +ffffffff82c01cd8 r se_shift +ffffffff82c01db4 r se_mask +ffffffff82c02120 r vpg_regs +ffffffff82c02210 r vpg_shift +ffffffff82c02238 r vpg_mask +ffffffff82c022e0 r afmt_regs +ffffffff82c023b8 r afmt_shift +ffffffff82c023cc r afmt_mask +ffffffff82c02420 r stream_enc_regs +ffffffff82c03ac0 r hpo_dp_stream_enc_regs +ffffffff82c03cf0 r hpo_dp_se_shift +ffffffff82c03d18 r hpo_dp_se_mask +ffffffff82c03dc0 r apg_regs +ffffffff82c03e00 r apg_shift +ffffffff82c03e08 r apg_mask +ffffffff82c03e20 r hpo_dp_link_enc_regs +ffffffff82c03f30 r hpo_dp_le_shift +ffffffff82c03f4c r hpo_dp_le_mask +ffffffff82c03fb0 r hwseq_reg +ffffffff82c041cc r hwseq_shift +ffffffff82c0424c r hwseq_mask +ffffffff82c05000 r dccg314_funcs +ffffffff82c06000 r dcn314_str_enc_funcs +ffffffff82c07000 r dcn314_funcs +ffffffff82c072c0 r dcn314_private_funcs +ffffffff82c08000 r bios_regs +ffffffff82c08008 r res_cap_dcn314 +ffffffff82c08048 r debug_defaults_diags +ffffffff82c081c0 r clk_src_regs +ffffffff82c08364 r dccg_regs +ffffffff82c08450 r dccg_shift +ffffffff82c084e8 r dccg_mask +ffffffff82c08750 r abm_regs +ffffffff82c08850 r abm_shift +ffffffff82c08864 r abm_mask +ffffffff82c088b0 r res_create_funcs +ffffffff82c088e0 r res_create_maximus_funcs +ffffffff82c08910 r plane_cap +ffffffff82c08940 r link_enc_regs +ffffffff82c08fa0 r link_enc_aux_regs +ffffffff82c08ff0 r link_enc_hpd_regs +ffffffff82c09004 r le_shift +ffffffff82c090f4 r le_mask +ffffffff82c094ac r link_enc_feature +ffffffff82c094bc r panel_config_defaults +ffffffff82c094f8 r debug_defaults_drv +ffffffff82c09670 r cs_shift +ffffffff82c0967c r cs_mask +ffffffff82c096a4 r hubbub_reg +ffffffff82c09818 r hubbub_shift +ffffffff82c098a0 r hubbub_mask +ffffffff82c09ac0 r vmid_regs +ffffffff82c09c80 r vmid_shifts +ffffffff82c09c88 r vmid_masks +ffffffff82c09cb0 r hubp_regs +ffffffff82c0a4e0 r hubp_shift +ffffffff82c0a5dc r hubp_mask +ffffffff82c0a9d0 r dpp_regs +ffffffff82c0bed0 r tf_shift +ffffffff82c0c1a0 r tf_mask +ffffffff82c0cce0 r opp_regs +ffffffff82c0ce40 r opp_shift +ffffffff82c0ce78 r opp_mask +ffffffff82c0cf50 r optc_regs +ffffffff82c0d450 r optc_shift +ffffffff82c0d510 r optc_mask +ffffffff82c0d810 r mpc_regs +ffffffff82c0effc r mpc_shift +ffffffff82c0f0d8 r mpc_mask +ffffffff82c0f450 r dsc_regs +ffffffff82c0f760 r dsc_shift +ffffffff82c0f818 r dsc_mask +ffffffff82c0faf0 r dwbc30_regs +ffffffff82c0fccc r dwbc30_shift +ffffffff82c0fe00 r dwbc30_mask +ffffffff82c102d0 r mcif_wb30_regs +ffffffff82c103cc r mcif_wb30_shift +ffffffff82c10478 r mcif_wb30_mask +ffffffff82c10730 r aux_engine_regs +ffffffff82c107f8 r aux_mask +ffffffff82c10858 r aux_shift +ffffffff82c10870 r i2c_hw_regs +ffffffff82c10988 r i2c_shifts +ffffffff82c109b4 r i2c_masks +ffffffff82c10a60 r audio_regs +ffffffff82c10b94 r audio_shift +ffffffff82c10bac r audio_mask +ffffffff82c10bf0 r stream_enc_regs +ffffffff82c11294 r se_shift +ffffffff82c11370 r se_mask +ffffffff82c116e0 r vpg_regs +ffffffff82c117d0 r vpg_shift +ffffffff82c117f8 r vpg_mask +ffffffff82c118a0 r afmt_regs +ffffffff82c11978 r afmt_shift +ffffffff82c1198c r afmt_mask +ffffffff82c119e0 r hpo_dp_stream_enc_regs +ffffffff82c11c10 r hpo_dp_se_shift +ffffffff82c11c38 r hpo_dp_se_mask +ffffffff82c11ce0 r apg_regs +ffffffff82c11d20 r apg_shift +ffffffff82c11d28 r apg_mask +ffffffff82c11d40 r hpo_dp_link_enc_regs +ffffffff82c11e50 r hpo_dp_le_shift +ffffffff82c11e6c r hpo_dp_le_mask +ffffffff82c11ed0 r hwseq_reg +ffffffff82c120ec r hwseq_shift +ffffffff82c1216c r hwseq_mask +ffffffff82c13000 r bios_regs +ffffffff82c13008 r res_cap_dcn31 +ffffffff82c13048 r debug_defaults_diags +ffffffff82c131c0 r clk_src_regs +ffffffff82c13364 r dccg_regs +ffffffff82c13450 r dccg_shift +ffffffff82c134e8 r dccg_mask +ffffffff82c13750 r abm_regs +ffffffff82c13850 r abm_shift +ffffffff82c13864 r abm_mask +ffffffff82c138b0 r res_create_funcs +ffffffff82c138e0 r res_create_maximus_funcs +ffffffff82c13910 r plane_cap +ffffffff82c13940 r link_enc_regs +ffffffff82c13fa0 r link_enc_aux_regs +ffffffff82c13ff0 r link_enc_hpd_regs +ffffffff82c14004 r le_shift +ffffffff82c140f4 r le_mask +ffffffff82c144ac r link_enc_feature +ffffffff82c144bc r panel_config_defaults +ffffffff82c144f8 r debug_defaults_drv +ffffffff82c14670 r cs_shift +ffffffff82c1467c r cs_mask +ffffffff82c146a4 r hubbub_reg +ffffffff82c14818 r hubbub_shift +ffffffff82c148a0 r hubbub_mask +ffffffff82c14ac0 r vmid_regs +ffffffff82c14c80 r vmid_shifts +ffffffff82c14c88 r vmid_masks +ffffffff82c14cb0 r hubp_regs +ffffffff82c154e0 r hubp_shift +ffffffff82c155dc r hubp_mask +ffffffff82c159d0 r dpp_regs +ffffffff82c16ed0 r tf_shift +ffffffff82c171a0 r tf_mask +ffffffff82c17ce0 r opp_regs +ffffffff82c17e40 r opp_shift +ffffffff82c17e78 r opp_mask +ffffffff82c17f50 r optc_regs +ffffffff82c18450 r optc_shift +ffffffff82c18510 r optc_mask +ffffffff82c18810 r mpc_regs +ffffffff82c19ffc r mpc_shift +ffffffff82c1a0d8 r mpc_mask +ffffffff82c1a450 r dsc_regs +ffffffff82c1a69c r dsc_shift +ffffffff82c1a754 r dsc_mask +ffffffff82c1aa30 r dwbc30_regs +ffffffff82c1ac0c r dwbc30_shift +ffffffff82c1ad40 r dwbc30_mask +ffffffff82c1b210 r mcif_wb30_regs +ffffffff82c1b30c r mcif_wb30_shift +ffffffff82c1b3b8 r mcif_wb30_mask +ffffffff82c1b670 r aux_engine_regs +ffffffff82c1b738 r aux_mask +ffffffff82c1b798 r aux_shift +ffffffff82c1b7b0 r i2c_hw_regs +ffffffff82c1b8c8 r i2c_shifts +ffffffff82c1b8f4 r i2c_masks +ffffffff82c1b9a0 r audio_regs +ffffffff82c1bad4 r audio_shift +ffffffff82c1baec r audio_mask +ffffffff82c1bb30 r stream_enc_regs +ffffffff82c1c1d4 r se_shift +ffffffff82c1c2b0 r se_mask +ffffffff82c1c620 r vpg_regs +ffffffff82c1c710 r vpg_shift +ffffffff82c1c738 r vpg_mask +ffffffff82c1c7e0 r afmt_regs +ffffffff82c1c8b8 r afmt_shift +ffffffff82c1c8cc r afmt_mask +ffffffff82c1c920 r hpo_dp_stream_enc_regs +ffffffff82c1cb50 r hpo_dp_se_shift +ffffffff82c1cb78 r hpo_dp_se_mask +ffffffff82c1cc20 r apg_regs +ffffffff82c1cc60 r apg_shift +ffffffff82c1cc68 r apg_mask +ffffffff82c1cc80 r hpo_dp_link_enc_regs +ffffffff82c1cd90 r hpo_dp_le_shift +ffffffff82c1cdac r hpo_dp_le_mask +ffffffff82c1ce10 r hwseq_reg +ffffffff82c1d02c r hwseq_shift +ffffffff82c1d0ac r hwseq_mask +ffffffff82c1e000 r bios_regs +ffffffff82c1e008 r res_cap_dcn31 +ffffffff82c1e048 r debug_defaults_diags +ffffffff82c1e1c0 r clk_src_regs +ffffffff82c1e364 r dccg_regs +ffffffff82c1e450 r dccg_shift +ffffffff82c1e4e8 r dccg_mask +ffffffff82c1e750 r abm_regs +ffffffff82c1e850 r abm_shift +ffffffff82c1e864 r abm_mask +ffffffff82c1e8b0 r res_create_funcs +ffffffff82c1e8e0 r res_create_maximus_funcs +ffffffff82c1e910 r plane_cap +ffffffff82c1e940 r link_enc_regs +ffffffff82c1efa0 r link_enc_aux_regs +ffffffff82c1eff0 r link_enc_hpd_regs +ffffffff82c1f004 r le_shift +ffffffff82c1f0f4 r le_mask +ffffffff82c1f4ac r link_enc_feature +ffffffff82c1f4bc r panel_config_defaults +ffffffff82c1f4f8 r debug_defaults_drv +ffffffff82c1f670 r cs_shift +ffffffff82c1f67c r cs_mask +ffffffff82c1f6a4 r hubbub_reg +ffffffff82c1f818 r hubbub_shift +ffffffff82c1f8a0 r hubbub_mask +ffffffff82c1fac0 r vmid_regs +ffffffff82c1fc80 r vmid_shifts +ffffffff82c1fc88 r vmid_masks +ffffffff82c1fcb0 r hubp_regs +ffffffff82c204e0 r hubp_shift +ffffffff82c205dc r hubp_mask +ffffffff82c209d0 r dpp_regs +ffffffff82c21ed0 r tf_shift +ffffffff82c221a0 r tf_mask +ffffffff82c22ce0 r opp_regs +ffffffff82c22e40 r opp_shift +ffffffff82c22e78 r opp_mask +ffffffff82c22f50 r optc_regs +ffffffff82c23450 r optc_shift +ffffffff82c23510 r optc_mask +ffffffff82c23810 r mpc_regs +ffffffff82c24ffc r mpc_shift +ffffffff82c250d8 r mpc_mask +ffffffff82c25450 r dsc_regs +ffffffff82c2569c r dsc_shift +ffffffff82c25754 r dsc_mask +ffffffff82c25a30 r dwbc30_regs +ffffffff82c25c0c r dwbc30_shift +ffffffff82c25d40 r dwbc30_mask +ffffffff82c26210 r mcif_wb30_regs +ffffffff82c2630c r mcif_wb30_shift +ffffffff82c263b8 r mcif_wb30_mask +ffffffff82c26670 r aux_engine_regs +ffffffff82c26738 r aux_mask +ffffffff82c26798 r aux_shift +ffffffff82c267b0 r i2c_hw_regs +ffffffff82c268c8 r i2c_shifts +ffffffff82c268f4 r i2c_masks +ffffffff82c269a0 r audio_regs +ffffffff82c26ad4 r audio_shift +ffffffff82c26aec r audio_mask +ffffffff82c26b30 r stream_enc_regs +ffffffff82c271d4 r se_shift +ffffffff82c272b0 r se_mask +ffffffff82c27620 r vpg_regs +ffffffff82c27710 r vpg_shift +ffffffff82c27738 r vpg_mask +ffffffff82c277e0 r afmt_regs +ffffffff82c278b8 r afmt_shift +ffffffff82c278cc r afmt_mask +ffffffff82c27920 r hpo_dp_stream_enc_regs +ffffffff82c27b50 r hpo_dp_se_shift +ffffffff82c27b78 r hpo_dp_se_mask +ffffffff82c27c20 r apg_regs +ffffffff82c27c60 r apg_shift +ffffffff82c27c68 r apg_mask +ffffffff82c27c80 r hpo_dp_link_enc_regs +ffffffff82c27d90 r hpo_dp_le_shift +ffffffff82c27dac r hpo_dp_le_mask +ffffffff82c27e10 r hwseq_reg +ffffffff82c2802c r hwseq_shift +ffffffff82c280ac r hwseq_mask +ffffffff82c29000 r dccg32_funcs +ffffffff82c2a000 r dcn32_link_enc_funcs +ffffffff82c2b000 r dcn32_str_enc_funcs +ffffffff82c2c000 r hubbub32_funcs +ffffffff82c2d000 r dcn32_funcs +ffffffff82c2d2c0 r dcn32_private_funcs +ffffffff82c2e000 R dcn32_mmhubbub_funcs +ffffffff82c2f000 R dcn32_mpc_funcs +ffffffff82c30000 r res_cap_dcn32 +ffffffff82c30040 r debug_defaults_diags +ffffffff82c301b8 r dccg_shift +ffffffff82c30250 r dccg_mask +ffffffff82c304b0 r abm_shift +ffffffff82c304c4 r abm_mask +ffffffff82c30510 r res_create_funcs +ffffffff82c30540 r res_create_maximus_funcs +ffffffff82c30570 r plane_cap +ffffffff82c3059c r le_shift +ffffffff82c3068c r le_mask +ffffffff82c30a44 r link_enc_feature +ffffffff82c30a58 r debug_defaults_drv +ffffffff82c30bd0 r cs_shift +ffffffff82c30bdc r cs_mask +ffffffff82c30c04 r hubbub_shift +ffffffff82c30c8c r hubbub_mask +ffffffff82c30ea8 r vmid_shifts +ffffffff82c30eb0 r vmid_masks +ffffffff82c30ed0 r hubp_shift +ffffffff82c30fcc r hubp_mask +ffffffff82c313bc r tf_shift +ffffffff82c3168c r tf_mask +ffffffff82c321cc r opp_shift +ffffffff82c32204 r opp_mask +ffffffff82c322d8 r optc_shift +ffffffff82c32398 r optc_mask +ffffffff82c32698 r mpc_shift +ffffffff82c32774 r mpc_mask +ffffffff82c32ae0 r dsc_shift +ffffffff82c32b98 r dsc_mask +ffffffff82c32e70 r dwbc30_shift +ffffffff82c32fa4 r dwbc30_mask +ffffffff82c3346c r mcif_wb30_shift +ffffffff82c33518 r mcif_wb30_mask +ffffffff82c337c4 r aux_mask +ffffffff82c33824 r aux_shift +ffffffff82c3383c r i2c_shifts +ffffffff82c33868 r i2c_masks +ffffffff82c3390c r audio_shift +ffffffff82c33924 r audio_mask +ffffffff82c33960 r se_shift +ffffffff82c33a3c r se_mask +ffffffff82c33da8 r vpg_shift +ffffffff82c33dd0 r vpg_mask +ffffffff82c33e64 r afmt_shift +ffffffff82c33e78 r afmt_mask +ffffffff82c33ebc r hpo_dp_se_shift +ffffffff82c33ee4 r hpo_dp_se_mask +ffffffff82c33f84 r apg_shift +ffffffff82c33f8c r apg_mask +ffffffff82c33fa4 r hpo_dp_le_shift +ffffffff82c33fc0 r hpo_dp_le_mask +ffffffff82c34024 r hwseq_shift +ffffffff82c340a4 r hwseq_mask +ffffffff82c35000 r dcn321_link_enc_funcs +ffffffff82c36000 r res_cap_dcn321 +ffffffff82c36040 r debug_defaults_diags +ffffffff82c361b8 r dccg_shift +ffffffff82c36250 r dccg_mask +ffffffff82c364b0 r abm_shift +ffffffff82c364c4 r abm_mask +ffffffff82c36510 r res_create_funcs +ffffffff82c36540 r res_create_maximus_funcs +ffffffff82c36570 r plane_cap +ffffffff82c3659c r le_shift +ffffffff82c3668c r le_mask +ffffffff82c36a44 r link_enc_feature +ffffffff82c36a58 r debug_defaults_drv +ffffffff82c36bd0 r cs_shift +ffffffff82c36bdc r cs_mask +ffffffff82c36c04 r hubbub_shift +ffffffff82c36c8c r hubbub_mask +ffffffff82c36ea8 r vmid_shifts +ffffffff82c36eb0 r vmid_masks +ffffffff82c36ed0 r hubp_shift +ffffffff82c36fcc r hubp_mask +ffffffff82c373bc r tf_shift +ffffffff82c3768c r tf_mask +ffffffff82c381cc r opp_shift +ffffffff82c38204 r opp_mask +ffffffff82c382d8 r optc_shift +ffffffff82c38398 r optc_mask +ffffffff82c38698 r mpc_shift +ffffffff82c38774 r mpc_mask +ffffffff82c38ae0 r dsc_shift +ffffffff82c38b98 r dsc_mask +ffffffff82c38e70 r dwbc30_shift +ffffffff82c38fa4 r dwbc30_mask +ffffffff82c3946c r mcif_wb30_shift +ffffffff82c39518 r mcif_wb30_mask +ffffffff82c397c4 r aux_mask +ffffffff82c39824 r aux_shift +ffffffff82c3983c r i2c_shifts +ffffffff82c39868 r i2c_masks +ffffffff82c3990c r audio_shift +ffffffff82c39924 r audio_mask +ffffffff82c39960 r se_shift +ffffffff82c39a3c r se_mask +ffffffff82c39da8 r vpg_shift +ffffffff82c39dd0 r vpg_mask +ffffffff82c39e64 r afmt_shift +ffffffff82c39e78 r afmt_mask +ffffffff82c39ebc r hpo_dp_se_shift +ffffffff82c39ee4 r hpo_dp_se_mask +ffffffff82c39f84 r apg_shift +ffffffff82c39f8c r apg_mask +ffffffff82c39fa4 r hpo_dp_le_shift +ffffffff82c39fc0 r hpo_dp_le_mask +ffffffff82c3a024 r hwseq_shift +ffffffff82c3a0a4 r hwseq_mask +ffffffff82c3c000 R dcn10_soc_defaults +ffffffff82c3c08c R dcn10_ip_defaults +ffffffff82c47000 R dml20_funcs +ffffffff82c47030 R dml20v2_funcs +ffffffff82c47060 R dml21_funcs +ffffffff82c47090 R dml30_funcs +ffffffff82c470c0 R dml31_funcs +ffffffff82c470f0 R dml314_funcs +ffffffff82c47120 R dml32_funcs +ffffffff82c4a000 R qp_table_422_10bpc_min +ffffffff82c4a740 R qp_table_444_8bpc_max +ffffffff82c4b080 R qp_table_420_12bpc_max +ffffffff82c4b7c0 R qp_table_444_10bpc_min +ffffffff82c4c400 R qp_table_420_8bpc_max +ffffffff82c4c840 R qp_table_444_8bpc_min +ffffffff82c4d180 R qp_table_444_12bpc_min +ffffffff82c4e0c0 R qp_table_420_12bpc_min +ffffffff82c4e800 R qp_table_422_12bpc_min +ffffffff82c4f140 R qp_table_422_12bpc_max +ffffffff82c4fa80 R qp_table_444_12bpc_max +ffffffff82c509c0 R qp_table_420_8bpc_min +ffffffff82c50e00 R qp_table_422_8bpc_min +ffffffff82c51340 R qp_table_422_10bpc_max +ffffffff82c51a80 R qp_table_420_10bpc_max +ffffffff82c52040 R qp_table_420_10bpc_min +ffffffff82c52600 R qp_table_444_10bpc_max +ffffffff82c53240 R qp_table_422_8bpc_max ffffffff82c55000 r funcs +ffffffff82c55050 r hpd_regs +ffffffff82c551a0 r hpd_shift +ffffffff82c551b0 r hpd_mask +ffffffff82c551c0 r ddc_data_regs +ffffffff82c553a0 r ddc_clk_regs +ffffffff82c55580 r ddc_shift +ffffffff82c555a8 r ddc_mask ffffffff82c56000 r funcs -ffffffff82c56050 r hpd_regs -ffffffff82c561a0 r hpd_shift -ffffffff82c561b0 r hpd_mask -ffffffff82c561c0 r ddc_data_regs -ffffffff82c563a0 r ddc_clk_regs -ffffffff82c56580 r ddc_shift -ffffffff82c565a8 r ddc_mask -ffffffff82c565d0 r generic_regs -ffffffff82c56640 r generic_shift -ffffffff82c56650 r generic_mask ffffffff82c57000 r funcs +ffffffff82c57050 r hpd_regs +ffffffff82c571a0 r hpd_shift +ffffffff82c571b0 r hpd_mask +ffffffff82c571c0 r ddc_data_regs +ffffffff82c573a0 r ddc_clk_regs +ffffffff82c57580 r ddc_shift +ffffffff82c575a8 r ddc_mask ffffffff82c58000 r funcs -ffffffff82c58050 r hpd_regs -ffffffff82c581a0 r hpd_shift -ffffffff82c581b0 r hpd_mask -ffffffff82c581c0 r ddc_data_regs_dcn -ffffffff82c58370 r ddc_clk_regs_dcn -ffffffff82c58520 r ddc_shift -ffffffff82c58640 r ddc_mask -ffffffff82c58760 r generic_regs -ffffffff82c587d0 r generic_shift -ffffffff82c587e0 r generic_mask ffffffff82c59000 r funcs +ffffffff82c59050 r hpd_regs +ffffffff82c591a0 r hpd_shift +ffffffff82c591b0 r hpd_mask +ffffffff82c591c0 r ddc_data_regs +ffffffff82c593a0 r ddc_clk_regs +ffffffff82c59580 r ddc_shift +ffffffff82c595a8 r ddc_mask ffffffff82c5a000 r funcs -ffffffff82c5a050 r hpd_regs -ffffffff82c5a168 r hpd_shift -ffffffff82c5a178 r hpd_mask -ffffffff82c5a190 r ddc_data_regs_dcn -ffffffff82c5a2c0 r ddc_clk_regs_dcn -ffffffff82c5a3f0 r ddc_shift -ffffffff82c5a4e0 r ddc_mask -ffffffff82c5a5d0 r generic_regs -ffffffff82c5a604 r generic_shift -ffffffff82c5a60c r generic_mask ffffffff82c5b000 r funcs +ffffffff82c5b050 r hpd_regs +ffffffff82c5b1a0 r hpd_shift +ffffffff82c5b1b0 r hpd_mask +ffffffff82c5b1c0 r ddc_data_regs +ffffffff82c5b3a0 r ddc_clk_regs +ffffffff82c5b580 r ddc_shift +ffffffff82c5b5a8 r ddc_mask +ffffffff82c5b5d0 r generic_regs +ffffffff82c5b640 r generic_shift +ffffffff82c5b650 r generic_mask ffffffff82c5c000 r funcs -ffffffff82c5c050 r hpd_regs -ffffffff82c5c1a0 r hpd_shift -ffffffff82c5c1b0 r hpd_mask -ffffffff82c5c1c0 r ddc_data_regs_dcn -ffffffff82c5c370 r ddc_clk_regs_dcn -ffffffff82c5c520 r ddc_shift -ffffffff82c5c640 r ddc_mask -ffffffff82c5c760 r generic_regs -ffffffff82c5c7d0 r generic_shift -ffffffff82c5c7e0 r generic_mask ffffffff82c5d000 r funcs +ffffffff82c5d050 r hpd_regs +ffffffff82c5d1a0 r hpd_shift +ffffffff82c5d1b0 r hpd_mask +ffffffff82c5d1c0 r ddc_data_regs_dcn +ffffffff82c5d370 r ddc_clk_regs_dcn +ffffffff82c5d520 r ddc_shift +ffffffff82c5d640 r ddc_mask +ffffffff82c5d760 r generic_regs +ffffffff82c5d7d0 r generic_shift +ffffffff82c5d7e0 r generic_mask ffffffff82c5e000 r funcs -ffffffff82c5e050 r hpd_regs -ffffffff82c5e168 r hpd_shift -ffffffff82c5e178 r hpd_mask -ffffffff82c5e190 r ddc_data_regs_dcn -ffffffff82c5e300 r ddc_clk_regs_dcn -ffffffff82c5e470 r ddc_shift -ffffffff82c5e560 r ddc_mask -ffffffff82c5e650 r generic_regs -ffffffff82c5e6c0 r generic_shift -ffffffff82c5e6d0 r generic_mask ffffffff82c5f000 r funcs +ffffffff82c5f050 r hpd_regs +ffffffff82c5f168 r hpd_shift +ffffffff82c5f178 r hpd_mask +ffffffff82c5f190 r ddc_data_regs_dcn +ffffffff82c5f2c0 r ddc_clk_regs_dcn +ffffffff82c5f3f0 r ddc_shift +ffffffff82c5f4e0 r ddc_mask +ffffffff82c5f5d0 r generic_regs +ffffffff82c5f604 r generic_shift +ffffffff82c5f60c r generic_mask ffffffff82c60000 r funcs -ffffffff82c60050 r hpd_regs -ffffffff82c60168 r hpd_shift -ffffffff82c60178 r hpd_mask -ffffffff82c60190 r ddc_data_regs_dcn -ffffffff82c60340 r ddc_clk_regs_dcn -ffffffff82c604f0 r ddc_shift -ffffffff82c60610 r ddc_mask -ffffffff82c60730 r generic_regs -ffffffff82c607a0 r generic_shift -ffffffff82c607b0 r generic_mask ffffffff82c61000 r funcs +ffffffff82c61050 r hpd_regs +ffffffff82c611a0 r hpd_shift +ffffffff82c611b0 r hpd_mask +ffffffff82c611c0 r ddc_data_regs_dcn +ffffffff82c61370 r ddc_clk_regs_dcn +ffffffff82c61520 r ddc_shift +ffffffff82c61640 r ddc_mask +ffffffff82c61760 r generic_regs +ffffffff82c617d0 r generic_shift +ffffffff82c617e0 r generic_mask ffffffff82c62000 r funcs ffffffff82c63000 r funcs +ffffffff82c63050 r hpd_regs +ffffffff82c63168 r hpd_shift +ffffffff82c63178 r hpd_mask +ffffffff82c63190 r ddc_data_regs_dcn +ffffffff82c63300 r ddc_clk_regs_dcn +ffffffff82c63470 r ddc_shift +ffffffff82c63560 r ddc_mask +ffffffff82c63650 r generic_regs +ffffffff82c636c0 r generic_shift +ffffffff82c636d0 r generic_mask ffffffff82c64000 r funcs -ffffffff82c65000 r hdmi_14_protection -ffffffff82c65010 r dp_11_protection -ffffffff82c65020 r hdcp_i2c_offsets -ffffffff82c65050 r hdcp_dpcd_addrs -ffffffff82c66000 r irq_service_funcs_dce110 -ffffffff82c66010 r irq_source_info_dce110 -ffffffff82c672a0 r dummy_irq_info_funcs -ffffffff82c672b0 r hpd_irq_info_funcs -ffffffff82c672c0 r hpd_rx_irq_info_funcs -ffffffff82c672d0 r pflip_irq_info_funcs -ffffffff82c672e0 r vupdate_irq_info_funcs -ffffffff82c672f0 r vblank_irq_info_funcs -ffffffff82c68000 r irq_service_funcs_dce120 -ffffffff82c68008 r dummy_irq_info_funcs -ffffffff82c68018 r hpd_irq_info_funcs -ffffffff82c68028 r hpd_rx_irq_info_funcs -ffffffff82c68038 r pflip_irq_info_funcs -ffffffff82c68048 r vupdate_irq_info_funcs -ffffffff82c68058 r vblank_irq_info_funcs -ffffffff82c68070 r irq_source_info_dce120 -ffffffff82c6a000 r irq_service_funcs_dce80 -ffffffff82c6a008 r dummy_irq_info_funcs -ffffffff82c6a018 r hpd_irq_info_funcs -ffffffff82c6a028 r hpd_rx_irq_info_funcs -ffffffff82c6a038 r pflip_irq_info_funcs -ffffffff82c6a048 r vupdate_irq_info_funcs -ffffffff82c6a058 r vblank_irq_info_funcs -ffffffff82c6a070 r irq_source_info_dce80 -ffffffff82c6c000 r irq_service_funcs_dcn10 -ffffffff82c6c008 r dummy_irq_info_funcs -ffffffff82c6c018 r hpd_irq_info_funcs -ffffffff82c6c028 r hpd_rx_irq_info_funcs -ffffffff82c6c038 r pflip_irq_info_funcs -ffffffff82c6c048 r vupdate_no_lock_irq_info_funcs -ffffffff82c6c058 r vblank_irq_info_funcs -ffffffff82c6c068 r vline0_irq_info_funcs -ffffffff82c6c080 r irq_source_info_dcn10 -ffffffff82c6e000 r irq_service_funcs_dcn20 -ffffffff82c6e008 r dummy_irq_info_funcs -ffffffff82c6e018 r hpd_irq_info_funcs -ffffffff82c6e028 r hpd_rx_irq_info_funcs -ffffffff82c6e038 r pflip_irq_info_funcs -ffffffff82c6e048 r vupdate_no_lock_irq_info_funcs -ffffffff82c6e058 r vblank_irq_info_funcs -ffffffff82c6e068 r vline0_irq_info_funcs -ffffffff82c6e080 r irq_source_info_dcn20 -ffffffff82c70000 r irq_service_funcs_dcn201 -ffffffff82c70008 r dummy_irq_info_funcs -ffffffff82c70018 r hpd_irq_info_funcs -ffffffff82c70028 r hpd_rx_irq_info_funcs -ffffffff82c70038 r pflip_irq_info_funcs -ffffffff82c70048 r vupdate_no_lock_irq_info_funcs -ffffffff82c70058 r vblank_irq_info_funcs -ffffffff82c70068 r vline0_irq_info_funcs -ffffffff82c70080 r irq_source_info_dcn201 -ffffffff82c72000 r irq_source_info_dcn21 -ffffffff82c73290 r irq_service_funcs_dcn21 -ffffffff82c73298 r dummy_irq_info_funcs -ffffffff82c732a8 r hpd_irq_info_funcs -ffffffff82c732b8 r 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vblank_irq_info_funcs -ffffffff82c772f8 r vline0_irq_info_funcs -ffffffff82c77308 r dmub_trace_irq_info_funcs -ffffffff82c78000 r irq_service_funcs_dcn303 -ffffffff82c78008 r dummy_irq_info_funcs -ffffffff82c78018 r hpd_irq_info_funcs -ffffffff82c78028 r hpd_rx_irq_info_funcs -ffffffff82c78038 r pflip_irq_info_funcs -ffffffff82c78048 r vupdate_no_lock_irq_info_funcs -ffffffff82c78058 r vblank_irq_info_funcs -ffffffff82c78068 r vline0_irq_info_funcs -ffffffff82c78080 r irq_source_info_dcn303 -ffffffff82c7a000 r irq_source_info_dcn31 -ffffffff82c7b290 r irq_service_funcs_dcn31 -ffffffff82c7b298 r dummy_irq_info_funcs -ffffffff82c7b2a8 r hpd_irq_info_funcs -ffffffff82c7b2b8 r hpd_rx_irq_info_funcs -ffffffff82c7b2c8 r pflip_irq_info_funcs -ffffffff82c7b2d8 r vupdate_no_lock_irq_info_funcs -ffffffff82c7b2e8 r vblank_irq_info_funcs -ffffffff82c7b2f8 r vline0_irq_info_funcs -ffffffff82c7b308 r outbox_irq_info_funcs -ffffffff82c7c000 r irq_source_info_dcn314 -ffffffff82c7d290 r irq_service_funcs_dcn314 -ffffffff82c7d298 r dummy_irq_info_funcs -ffffffff82c7d2a8 r hpd_irq_info_funcs -ffffffff82c7d2b8 r hpd_rx_irq_info_funcs -ffffffff82c7d2c8 r pflip_irq_info_funcs -ffffffff82c7d2d8 r vupdate_no_lock_irq_info_funcs -ffffffff82c7d2e8 r vblank_irq_info_funcs -ffffffff82c7d2f8 r vline0_irq_info_funcs -ffffffff82c7d308 r outbox_irq_info_funcs -ffffffff82c7e000 r irq_source_info_dcn315 -ffffffff82c7f290 r irq_service_funcs_dcn315 -ffffffff82c7f298 r dummy_irq_info_funcs -ffffffff82c7f2a8 r hpd_irq_info_funcs -ffffffff82c7f2b8 r hpd_rx_irq_info_funcs -ffffffff82c7f2c8 r pflip_irq_info_funcs -ffffffff82c7f2d8 r vupdate_no_lock_irq_info_funcs -ffffffff82c7f2e8 r vblank_irq_info_funcs -ffffffff82c7f2f8 r vline0_irq_info_funcs -ffffffff82c7f308 r outbox_irq_info_funcs -ffffffff82c80000 r irq_source_info_dcn32 -ffffffff82c81290 r irq_service_funcs_dcn32 -ffffffff82c81298 r dummy_irq_info_funcs -ffffffff82c812a8 r hpd_irq_info_funcs -ffffffff82c812b8 r hpd_rx_irq_info_funcs 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-ffffffff82c93060 r numerator05 -ffffffff82c95000 r abm_settings -ffffffff82c95010 r abm_settings_config0 -ffffffff82c95050 r abm_settings_config1 -ffffffff82c95088 r min_reduction_table_v_2_2 -ffffffff82c95095 r max_reduction_table_v_2_2 -ffffffff82c950a2 r min_reduction_table -ffffffff82c950af r max_reduction_table -ffffffff82c96000 R amdgpu_pp_profile_name -ffffffff82c97000 r pp_lib_thermal_controller_names -ffffffff82c98000 r pp_ip_funcs -ffffffff82c980a0 R pp_smu_ip_block -ffffffff82c980b8 r pp_dpm_funcs -ffffffff82c99000 r gpio_tbl -ffffffff82c990f0 r enable_fb_req_rej_tbl -ffffffff82c99140 r use_bclk_tbl -ffffffff82c99310 r turn_off_plls_tbl -ffffffff82c99640 r enter_baco_tbl -ffffffff82c99730 r exit_baco_tbl -ffffffff82c99850 r clean_baco_tbl -ffffffff82c9a000 r gpio_tbl -ffffffff82c9a0f0 r enable_fb_req_rej_tbl -ffffffff82c9a140 r use_bclk_tbl -ffffffff82c9a2e0 r turn_off_plls_tbl -ffffffff82c9a370 r clk_req_b_tbl -ffffffff82c9a490 r enter_baco_tbl -ffffffff82c9a5b0 r exit_baco_tbl -ffffffff82c9a6d0 r clean_baco_tbl -ffffffff82c9b000 r gpio_tbl -ffffffff82c9b0f0 r enable_fb_req_rej_tbl -ffffffff82c9b140 r use_bclk_tbl_vg -ffffffff82c9b200 r turn_off_plls_tbl_vg -ffffffff82c9b350 r use_bclk_tbl -ffffffff82c9b440 r turn_off_plls_tbl -ffffffff82c9b5f0 r clk_req_b_tbl -ffffffff82c9b710 r enter_baco_tbl -ffffffff82c9b830 r exit_baco_tbl -ffffffff82c9b950 r clean_baco_tbl -ffffffff82c9c000 r vega10_fuses_default -ffffffff82cab000 r pp_r600_encode_lanes -ffffffff82cac000 R pptable_v1_0_funcs -ffffffff82cad000 R pptable_funcs -ffffffff82cad020 r soft_dummy_pp_table -ffffffff82cae000 r smu10_hwmgr_funcs -ffffffff82caf000 r smu7_hwmgr_funcs -ffffffff82caf2f8 r smu7_irq_funcs -ffffffff82caf310 r SMU7ThermalPolicy -ffffffff82cb0000 r GCCACConfig_Polaris10 -ffffffff82cb01b0 r DIDTConfig_Polaris10 -ffffffff82cb0a50 r GCCACConfig_Polaris11 -ffffffff82cb0c00 r DIDTConfig_Polaris11_Kicker -ffffffff82cb14a0 r DIDTConfig_Polaris11 -ffffffff82cb1d40 r DIDTConfig_Polaris12 -ffffffff82cb25e0 r GCCACConfig_VegaM -ffffffff82cb2790 r DIDTConfig_VegaM -ffffffff82cb4000 r smu8_hwmgr_funcs -ffffffff82cb42f0 r SMU7ThermalPolicy -ffffffff82cb5000 r smu9_irq_funcs -ffffffff82cb6000 r gpio_tbl_iceland -ffffffff82cb6060 r gpio_tbl -ffffffff82cb6150 r enable_fb_req_rej_tbl -ffffffff82cb61a0 r use_bclk_tbl -ffffffff82cb6370 r turn_off_plls_tbl -ffffffff82cb6610 r enter_baco_tbl -ffffffff82cb6730 r exit_baco_tbl_iceland -ffffffff82cb6870 r clean_baco_tbl_iceland -ffffffff82cb6890 r exit_baco_tbl -ffffffff82cb69b0 r clean_baco_tbl -ffffffff82cb7000 r pre_baco_tbl -ffffffff82cb7090 r enter_baco_tbl -ffffffff82cb72b0 r exit_baco_tbl -ffffffff82cb7520 r clean_baco_tbl -ffffffff82cb8000 r vega10_hwmgr_funcs -ffffffff82cb82f0 r channel_number -ffffffff82cb8320 r SMU7ThermalWithDelayPolicy -ffffffff82cb9000 r SEDiDtStallCtrlConfig_vega10 -ffffffff82cb9110 r SEDiDtStallPatternConfig_vega10 -ffffffff82cb92e0 r SEDiDtWeightConfig_Vega10 -ffffffff82cb93b0 r SEDiDtCtrl1Config_Vega10 -ffffffff82cb9440 r SEDiDtCtrl2Config_Vega10 -ffffffff82cb9510 r SEDiDtCtrl3Config_vega10 -ffffffff82cb9820 r SEDiDtTuningCtrlConfig_Vega10 -ffffffff82cb98b0 r SELCacConfig_Vega10 -ffffffff82cb9a40 r SEDiDtCtrl0Config_Vega10 -ffffffff82cb9d10 r AvfsPSMInitConfig_vega10 -ffffffff82cb9d90 r SEEDCStallPatternConfig_Vega10 -ffffffff82cb9ea0 r SEEDCStallDelayConfig_Vega10 -ffffffff82cb9f80 r SEEDCCtrlConfig_Vega10 -ffffffff82cba040 r PSMSEEDCStallPatternConfig_Vega10 -ffffffff82cba0c0 r PSMSEEDCStallDelayConfig_Vega10 -ffffffff82cba1d0 r PSMSEEDCCtrlResetConfig_Vega10 -ffffffff82cba290 r PSMSEEDCCtrlConfig_Vega10 -ffffffff82cba350 r SEEDCForceStallPatternConfig_Vega10 -ffffffff82cba3e0 r SEEDCCtrlForceStallConfig_Vega10 -ffffffff82cbb000 R vega10_pptable_funcs +ffffffff82c65000 r funcs +ffffffff82c65050 r hpd_regs +ffffffff82c65168 r hpd_shift +ffffffff82c65178 r hpd_mask +ffffffff82c65190 r ddc_data_regs_dcn +ffffffff82c65340 r ddc_clk_regs_dcn +ffffffff82c654f0 r ddc_shift +ffffffff82c65610 r ddc_mask +ffffffff82c65730 r generic_regs +ffffffff82c657a0 r generic_shift +ffffffff82c657b0 r generic_mask +ffffffff82c66000 r funcs +ffffffff82c67000 r funcs +ffffffff82c68000 r funcs +ffffffff82c69000 r funcs +ffffffff82c6a000 r hdmi_14_protection +ffffffff82c6a010 r dp_11_protection +ffffffff82c6a020 r hdcp_i2c_offsets +ffffffff82c6a050 r hdcp_dpcd_addrs +ffffffff82c6b000 r irq_service_funcs_dce110 +ffffffff82c6b010 r irq_source_info_dce110 +ffffffff82c6c2a0 r dummy_irq_info_funcs +ffffffff82c6c2b0 r hpd_irq_info_funcs +ffffffff82c6c2c0 r hpd_rx_irq_info_funcs +ffffffff82c6c2d0 r pflip_irq_info_funcs +ffffffff82c6c2e0 r vupdate_irq_info_funcs +ffffffff82c6c2f0 r vblank_irq_info_funcs +ffffffff82c6d000 r irq_service_funcs_dce120 +ffffffff82c6d008 r dummy_irq_info_funcs +ffffffff82c6d018 r hpd_irq_info_funcs +ffffffff82c6d028 r hpd_rx_irq_info_funcs +ffffffff82c6d038 r pflip_irq_info_funcs +ffffffff82c6d048 r vupdate_irq_info_funcs +ffffffff82c6d058 r vblank_irq_info_funcs +ffffffff82c6d070 r irq_source_info_dce120 +ffffffff82c6f000 r irq_service_funcs_dce80 +ffffffff82c6f008 r dummy_irq_info_funcs +ffffffff82c6f018 r hpd_irq_info_funcs +ffffffff82c6f028 r hpd_rx_irq_info_funcs +ffffffff82c6f038 r pflip_irq_info_funcs +ffffffff82c6f048 r vupdate_irq_info_funcs +ffffffff82c6f058 r vblank_irq_info_funcs +ffffffff82c6f070 r irq_source_info_dce80 +ffffffff82c71000 r irq_service_funcs_dcn10 +ffffffff82c71008 r dummy_irq_info_funcs +ffffffff82c71018 r hpd_irq_info_funcs +ffffffff82c71028 r hpd_rx_irq_info_funcs +ffffffff82c71038 r pflip_irq_info_funcs +ffffffff82c71048 r vupdate_no_lock_irq_info_funcs +ffffffff82c71058 r vblank_irq_info_funcs +ffffffff82c71068 r vline0_irq_info_funcs +ffffffff82c71080 r irq_source_info_dcn10 +ffffffff82c73000 r irq_service_funcs_dcn20 +ffffffff82c73008 r dummy_irq_info_funcs +ffffffff82c73018 r hpd_irq_info_funcs +ffffffff82c73028 r hpd_rx_irq_info_funcs +ffffffff82c73038 r pflip_irq_info_funcs +ffffffff82c73048 r vupdate_no_lock_irq_info_funcs +ffffffff82c73058 r vblank_irq_info_funcs +ffffffff82c73068 r vline0_irq_info_funcs +ffffffff82c73080 r irq_source_info_dcn20 +ffffffff82c75000 r irq_service_funcs_dcn201 +ffffffff82c75008 r dummy_irq_info_funcs +ffffffff82c75018 r hpd_irq_info_funcs +ffffffff82c75028 r hpd_rx_irq_info_funcs +ffffffff82c75038 r pflip_irq_info_funcs +ffffffff82c75048 r vupdate_no_lock_irq_info_funcs +ffffffff82c75058 r vblank_irq_info_funcs +ffffffff82c75068 r vline0_irq_info_funcs +ffffffff82c75080 r irq_source_info_dcn201 +ffffffff82c77000 r irq_source_info_dcn21 +ffffffff82c78290 r irq_service_funcs_dcn21 +ffffffff82c78298 r dummy_irq_info_funcs +ffffffff82c782a8 r hpd_irq_info_funcs +ffffffff82c782b8 r hpd_rx_irq_info_funcs +ffffffff82c782c8 r pflip_irq_info_funcs +ffffffff82c782d8 r vupdate_no_lock_irq_info_funcs +ffffffff82c782e8 r vblank_irq_info_funcs +ffffffff82c782f8 r vline0_irq_info_funcs +ffffffff82c78308 r dmub_outbox_irq_info_funcs +ffffffff82c79000 r irq_source_info_dcn30 +ffffffff82c7a290 r irq_service_funcs_dcn30 +ffffffff82c7a298 r dummy_irq_info_funcs +ffffffff82c7a2a8 r hpd_irq_info_funcs +ffffffff82c7a2b8 r hpd_rx_irq_info_funcs +ffffffff82c7a2c8 r pflip_irq_info_funcs +ffffffff82c7a2d8 r vupdate_no_lock_irq_info_funcs +ffffffff82c7a2e8 r vblank_irq_info_funcs +ffffffff82c7a2f8 r vline0_irq_info_funcs +ffffffff82c7a308 r dmub_trace_irq_info_funcs +ffffffff82c7b000 r irq_source_info_dcn302 +ffffffff82c7c290 r irq_service_funcs_dcn302 +ffffffff82c7c298 r dummy_irq_info_funcs +ffffffff82c7c2a8 r hpd_irq_info_funcs +ffffffff82c7c2b8 r hpd_rx_irq_info_funcs +ffffffff82c7c2c8 r pflip_irq_info_funcs +ffffffff82c7c2d8 r vupdate_no_lock_irq_info_funcs +ffffffff82c7c2e8 r vblank_irq_info_funcs +ffffffff82c7c2f8 r vline0_irq_info_funcs +ffffffff82c7c308 r dmub_trace_irq_info_funcs +ffffffff82c7d000 r irq_service_funcs_dcn303 +ffffffff82c7d008 r dummy_irq_info_funcs +ffffffff82c7d018 r hpd_irq_info_funcs +ffffffff82c7d028 r hpd_rx_irq_info_funcs +ffffffff82c7d038 r pflip_irq_info_funcs +ffffffff82c7d048 r vupdate_no_lock_irq_info_funcs +ffffffff82c7d058 r vblank_irq_info_funcs +ffffffff82c7d068 r vline0_irq_info_funcs +ffffffff82c7d080 r irq_source_info_dcn303 +ffffffff82c7f000 r irq_source_info_dcn31 +ffffffff82c80290 r irq_service_funcs_dcn31 +ffffffff82c80298 r dummy_irq_info_funcs +ffffffff82c802a8 r hpd_irq_info_funcs +ffffffff82c802b8 r hpd_rx_irq_info_funcs +ffffffff82c802c8 r pflip_irq_info_funcs +ffffffff82c802d8 r vupdate_no_lock_irq_info_funcs +ffffffff82c802e8 r vblank_irq_info_funcs +ffffffff82c802f8 r vline0_irq_info_funcs +ffffffff82c80308 r outbox_irq_info_funcs +ffffffff82c81000 r irq_source_info_dcn314 +ffffffff82c82290 r irq_service_funcs_dcn314 +ffffffff82c82298 r dummy_irq_info_funcs +ffffffff82c822a8 r hpd_irq_info_funcs +ffffffff82c822b8 r hpd_rx_irq_info_funcs +ffffffff82c822c8 r pflip_irq_info_funcs +ffffffff82c822d8 r vupdate_no_lock_irq_info_funcs +ffffffff82c822e8 r vblank_irq_info_funcs +ffffffff82c822f8 r vline0_irq_info_funcs +ffffffff82c82308 r outbox_irq_info_funcs +ffffffff82c83000 r irq_source_info_dcn315 +ffffffff82c84290 r irq_service_funcs_dcn315 +ffffffff82c84298 r dummy_irq_info_funcs +ffffffff82c842a8 r hpd_irq_info_funcs +ffffffff82c842b8 r hpd_rx_irq_info_funcs +ffffffff82c842c8 r pflip_irq_info_funcs +ffffffff82c842d8 r vupdate_no_lock_irq_info_funcs +ffffffff82c842e8 r vblank_irq_info_funcs +ffffffff82c842f8 r vline0_irq_info_funcs +ffffffff82c84308 r outbox_irq_info_funcs +ffffffff82c85000 r irq_source_info_dcn32 +ffffffff82c86290 r irq_service_funcs_dcn32 +ffffffff82c86298 r dummy_irq_info_funcs +ffffffff82c862a8 r hpd_irq_info_funcs +ffffffff82c862b8 r hpd_rx_irq_info_funcs +ffffffff82c862c8 r pflip_irq_info_funcs +ffffffff82c862d8 r vupdate_no_lock_irq_info_funcs +ffffffff82c862e8 r vblank_irq_info_funcs +ffffffff82c862f8 r vline0_irq_info_funcs +ffffffff82c86308 r outbox_irq_info_funcs +ffffffff82c87000 r dio_link_hwss +ffffffff82c88000 r dpia_link_hwss +ffffffff82c89000 r hpo_dp_link_hwss +ffffffff82c8a000 r virtual_lnk_enc_funcs +ffffffff82c8b000 r virtual_link_hwss +ffffffff82c8c000 r virtual_str_enc_funcs +ffffffff82c8d000 R dmub_srv_dcn20_regs +ffffffff82c8e000 R dmub_srv_dcn21_regs +ffffffff82c8f000 R dmub_srv_dcn30_regs +ffffffff82c90000 R dmub_srv_dcn301_regs +ffffffff82c91000 R dmub_srv_dcn302_regs +ffffffff82c92000 R dmub_srv_dcn303_regs +ffffffff82c93000 R dmub_srv_dcn31_regs +ffffffff82c94000 R dmub_srv_dcn314_regs +ffffffff82c95000 R dmub_srv_dcn315_regs +ffffffff82c96000 R dmub_srv_dcn316_regs +ffffffff82c97000 R dmub_srv_dcn32_regs +ffffffff82c98000 r numerator01 +ffffffff82c98020 r numerator02 +ffffffff82c98040 r numerator04 +ffffffff82c98060 r numerator05 +ffffffff82c9a000 r abm_settings +ffffffff82c9a010 r abm_settings_config0 +ffffffff82c9a050 r abm_settings_config1 +ffffffff82c9a088 r min_reduction_table_v_2_2 +ffffffff82c9a095 r max_reduction_table_v_2_2 +ffffffff82c9a0a2 r min_reduction_table +ffffffff82c9a0af r max_reduction_table +ffffffff82c9b000 R amdgpu_pp_profile_name +ffffffff82c9c000 r pp_lib_thermal_controller_names +ffffffff82c9d000 r pp_ip_funcs +ffffffff82c9d0a0 R pp_smu_ip_block +ffffffff82c9d0b8 r pp_dpm_funcs +ffffffff82c9e000 r gpio_tbl +ffffffff82c9e0f0 r enable_fb_req_rej_tbl +ffffffff82c9e140 r use_bclk_tbl +ffffffff82c9e310 r turn_off_plls_tbl +ffffffff82c9e640 r enter_baco_tbl +ffffffff82c9e730 r exit_baco_tbl +ffffffff82c9e850 r clean_baco_tbl +ffffffff82c9f000 r gpio_tbl +ffffffff82c9f0f0 r enable_fb_req_rej_tbl +ffffffff82c9f140 r use_bclk_tbl +ffffffff82c9f2e0 r turn_off_plls_tbl +ffffffff82c9f370 r clk_req_b_tbl +ffffffff82c9f490 r enter_baco_tbl +ffffffff82c9f5b0 r exit_baco_tbl +ffffffff82c9f6d0 r clean_baco_tbl +ffffffff82ca0000 r gpio_tbl +ffffffff82ca00f0 r enable_fb_req_rej_tbl +ffffffff82ca0140 r use_bclk_tbl_vg +ffffffff82ca0200 r turn_off_plls_tbl_vg +ffffffff82ca0350 r use_bclk_tbl +ffffffff82ca0440 r turn_off_plls_tbl +ffffffff82ca05f0 r clk_req_b_tbl +ffffffff82ca0710 r enter_baco_tbl +ffffffff82ca0830 r exit_baco_tbl +ffffffff82ca0950 r clean_baco_tbl +ffffffff82ca1000 r vega10_fuses_default +ffffffff82cb0000 r pp_r600_encode_lanes +ffffffff82cb1000 R pptable_v1_0_funcs +ffffffff82cb2000 R pptable_funcs +ffffffff82cb2020 r soft_dummy_pp_table +ffffffff82cb3000 r smu10_hwmgr_funcs +ffffffff82cb4000 r smu7_hwmgr_funcs +ffffffff82cb42f8 r smu7_irq_funcs +ffffffff82cb4310 r SMU7ThermalPolicy +ffffffff82cb5000 r GCCACConfig_Polaris10 +ffffffff82cb51b0 r DIDTConfig_Polaris10 +ffffffff82cb5a50 r GCCACConfig_Polaris11 +ffffffff82cb5c00 r DIDTConfig_Polaris11_Kicker +ffffffff82cb64a0 r DIDTConfig_Polaris11 +ffffffff82cb6d40 r DIDTConfig_Polaris12 +ffffffff82cb75e0 r GCCACConfig_VegaM +ffffffff82cb7790 r DIDTConfig_VegaM +ffffffff82cb9000 r smu8_hwmgr_funcs +ffffffff82cb92f0 r SMU7ThermalPolicy +ffffffff82cba000 r smu9_irq_funcs +ffffffff82cbb000 r gpio_tbl_iceland +ffffffff82cbb060 r gpio_tbl +ffffffff82cbb150 r enable_fb_req_rej_tbl +ffffffff82cbb1a0 r use_bclk_tbl +ffffffff82cbb370 r turn_off_plls_tbl +ffffffff82cbb610 r enter_baco_tbl +ffffffff82cbb730 r exit_baco_tbl_iceland +ffffffff82cbb870 r clean_baco_tbl_iceland +ffffffff82cbb890 r exit_baco_tbl +ffffffff82cbb9b0 r clean_baco_tbl ffffffff82cbc000 r pre_baco_tbl ffffffff82cbc090 r enter_baco_tbl ffffffff82cbc2b0 r exit_baco_tbl ffffffff82cbc520 r clean_baco_tbl -ffffffff82cbd000 r vega12_hwmgr_funcs -ffffffff82cbd2f0 r SMU7ThermalWithDelayPolicy -ffffffff82cbd340 r link_width -ffffffff82cbe000 R vega12_pptable_funcs -ffffffff82cbf000 r clean_baco_tbl -ffffffff82cc0000 r vega20_hwmgr_funcs -ffffffff82cc02f0 r SMU7ThermalWithDelayPolicy -ffffffff82cc0340 r link_width -ffffffff82cc1000 R vega20_pptable_funcs -ffffffff82cc2000 R ci_smu_funcs -ffffffff82cc20e0 r defaults_hawaii_pro -ffffffff82cc212c r defaults_hawaii_xt -ffffffff82cc2178 r defaults_saturn_xt -ffffffff82cc21c4 r defaults_bonaire_xt -ffffffff82cc2210 r ci_program_jump_on_start.data -ffffffff82cc3000 R fiji_smu_funcs -ffffffff82cc30e0 r avfs_graphics_level -ffffffff82cc3240 r fiji_power_tune_data_set_array -ffffffff82cc3246 r fiji_clock_stretch_amount_conversion -ffffffff82cc3260 r fiji_clock_stretcher_ddt_table -ffffffff82cc4000 R iceland_smu_funcs -ffffffff82cc40e0 r defaults_icelandxt -ffffffff82cc412c r defaults_icelandpro -ffffffff82cc4178 r defaults_iceland -ffffffff82cc5000 R polaris10_smu_funcs -ffffffff82cc50e0 r avfs_graphics_level_polaris10 -ffffffff82cc52a0 r avfs_memory_level_polaris10 -ffffffff82cc52c0 r polaris10_power_tune_data_set_array -ffffffff82cc5310 r Range_Table -ffffffff82cc6000 R smu10_smu_funcs -ffffffff82cc7000 r smu7_program_jump_on_start.data -ffffffff82cc7010 r pwr_virus_table_pre -ffffffff82cc7680 r pwr_virus_table_post -ffffffff82cc7f80 r pwr_virus_section1 -ffffffff82cc8610 r pwr_virus_section2 -ffffffff82cc8660 r pwr_virus_section3 -ffffffff82ccfab0 r pwr_virus_section4 -ffffffff82ccfe80 r pwr_virus_section5 -ffffffff82cd0490 r pwr_virus_section6 -ffffffff82cd2000 R smu8_smu_funcs -ffffffff82cd3000 R tonga_smu_funcs -ffffffff82cd30e0 r tonga_power_tune_data_set_array -ffffffff82cd312c r tonga_clock_stretch_amount_conversion -ffffffff82cd3140 r tonga_clock_stretcher_ddt_table -ffffffff82cd4000 R vega10_smu_funcs -ffffffff82cd5000 R vega12_smu_funcs -ffffffff82cd6000 R vega20_smu_funcs -ffffffff82cd7000 R vegam_smu_funcs -ffffffff82cd70e0 r vegam_power_tune_data_set_array -ffffffff82cd7130 r Range_Table -ffffffff82cd8000 R smu_ip_funcs -ffffffff82cd80a0 R smu_v11_0_ip_block -ffffffff82cd80b8 R smu_v12_0_ip_block -ffffffff82cd80d0 R smu_v13_0_ip_block -ffffffff82cd80e8 r swsmu_pm_funcs -ffffffff82cd9000 r arcturus_table_map -ffffffff82cd9080 r arcturus_pwr_src_map -ffffffff82cd9090 r arcturus_workload_map -ffffffff82cd90d0 r arcturus_ppt_funcs -ffffffff82cd94a0 r smu11_thermal_policy -ffffffff82cd94f8 r arcturus_i2c_algo -ffffffff82cd9508 r arcturus_i2c_control_quirks -ffffffff82cd9520 r arcturus_throttler_map -ffffffff82cd9540 r arcturus_message_map -ffffffff82cd9f90 r arcturus_clk_map -ffffffff82cda050 r arcturus_feature_mask_map -ffffffff82cdb000 r cyan_skillfish_ppt_funcs -ffffffff82cdc000 r navi10_ppt_funcs -ffffffff82cdc3d0 r smu11_thermal_policy -ffffffff82cdc428 r navi10_i2c_algo -ffffffff82cdc438 r navi10_i2c_control_quirks -ffffffff82cdc450 r navi1x_throttler_map -ffffffff82cdc470 r NoDbiPrbs7 -ffffffff82cdd470 r DbiPrbs7 -ffffffff82cdf000 r sienna_cichlid_ppt_funcs -ffffffff82cdf3d0 r smu11_thermal_policy -ffffffff82cdf428 r sienna_cichlid_i2c_algo -ffffffff82cdf438 r sienna_cichlid_i2c_control_quirks -ffffffff82cdf450 r sienna_cichlid_throttler_map -ffffffff82ce0000 r smu_v11_0_irq_funcs -ffffffff82ce0010 r link_width -ffffffff82ce1000 r vangogh_ppt_funcs -ffffffff82ce13d0 r vangogh_throttler_map -ffffffff82ce2000 r renoir_ppt_funcs -ffffffff82ce23d0 r renoir_throttler_map -ffffffff82ce3000 r aldebaran_clk_map -ffffffff82ce30c0 r aldebaran_table_map -ffffffff82ce3140 r aldebaran_ppt_funcs -ffffffff82ce3510 r smu13_thermal_policy -ffffffff82ce3568 r aldebaran_i2c_algo -ffffffff82ce3578 r aldebaran_i2c_control_quirks -ffffffff82ce3590 r aldebaran_throttler_map -ffffffff82ce35b0 r aldebaran_message_map -ffffffff82ce4000 r aldebaran_feature_mask_map -ffffffff82ce5000 r smu_v13_0_irq_funcs +ffffffff82cbd000 r vega10_hwmgr_funcs +ffffffff82cbd2f0 r channel_number +ffffffff82cbd320 r SMU7ThermalWithDelayPolicy +ffffffff82cbe000 r SEDiDtStallCtrlConfig_vega10 +ffffffff82cbe110 r SEDiDtStallPatternConfig_vega10 +ffffffff82cbe2e0 r SEDiDtWeightConfig_Vega10 +ffffffff82cbe3b0 r SEDiDtCtrl1Config_Vega10 +ffffffff82cbe440 r SEDiDtCtrl2Config_Vega10 +ffffffff82cbe510 r SEDiDtCtrl3Config_vega10 +ffffffff82cbe820 r SEDiDtTuningCtrlConfig_Vega10 +ffffffff82cbe8b0 r SELCacConfig_Vega10 +ffffffff82cbea40 r SEDiDtCtrl0Config_Vega10 +ffffffff82cbed10 r AvfsPSMInitConfig_vega10 +ffffffff82cbed90 r SEEDCStallPatternConfig_Vega10 +ffffffff82cbeea0 r SEEDCStallDelayConfig_Vega10 +ffffffff82cbef80 r SEEDCCtrlConfig_Vega10 +ffffffff82cbf040 r PSMSEEDCStallPatternConfig_Vega10 +ffffffff82cbf0c0 r PSMSEEDCStallDelayConfig_Vega10 +ffffffff82cbf1d0 r PSMSEEDCCtrlResetConfig_Vega10 +ffffffff82cbf290 r PSMSEEDCCtrlConfig_Vega10 +ffffffff82cbf350 r SEEDCForceStallPatternConfig_Vega10 +ffffffff82cbf3e0 r SEEDCCtrlForceStallConfig_Vega10 +ffffffff82cc0000 R vega10_pptable_funcs +ffffffff82cc1000 r pre_baco_tbl +ffffffff82cc1090 r enter_baco_tbl +ffffffff82cc12b0 r exit_baco_tbl +ffffffff82cc1520 r clean_baco_tbl +ffffffff82cc2000 r vega12_hwmgr_funcs +ffffffff82cc22f0 r SMU7ThermalWithDelayPolicy +ffffffff82cc2340 r link_width +ffffffff82cc3000 R vega12_pptable_funcs +ffffffff82cc4000 r clean_baco_tbl +ffffffff82cc5000 r vega20_hwmgr_funcs +ffffffff82cc52f0 r SMU7ThermalWithDelayPolicy +ffffffff82cc5340 r link_width +ffffffff82cc6000 R vega20_pptable_funcs +ffffffff82cc7000 R ci_smu_funcs +ffffffff82cc70e0 r defaults_hawaii_pro +ffffffff82cc712c r defaults_hawaii_xt +ffffffff82cc7178 r defaults_saturn_xt +ffffffff82cc71c4 r defaults_bonaire_xt +ffffffff82cc7210 r ci_program_jump_on_start.data +ffffffff82cc8000 R fiji_smu_funcs +ffffffff82cc80e0 r avfs_graphics_level +ffffffff82cc8240 r fiji_power_tune_data_set_array +ffffffff82cc8246 r fiji_clock_stretch_amount_conversion +ffffffff82cc8260 r fiji_clock_stretcher_ddt_table +ffffffff82cc9000 R iceland_smu_funcs +ffffffff82cc90e0 r defaults_icelandxt +ffffffff82cc912c r defaults_icelandpro +ffffffff82cc9178 r defaults_iceland +ffffffff82cca000 R polaris10_smu_funcs +ffffffff82cca0e0 r avfs_graphics_level_polaris10 +ffffffff82cca2a0 r avfs_memory_level_polaris10 +ffffffff82cca2c0 r polaris10_power_tune_data_set_array +ffffffff82cca310 r Range_Table +ffffffff82ccb000 R smu10_smu_funcs +ffffffff82ccc000 r smu7_program_jump_on_start.data +ffffffff82ccc010 r pwr_virus_table_pre +ffffffff82ccc680 r pwr_virus_table_post +ffffffff82cccf80 r pwr_virus_section1 +ffffffff82ccd610 r pwr_virus_section2 +ffffffff82ccd660 r pwr_virus_section3 +ffffffff82cd4ab0 r pwr_virus_section4 +ffffffff82cd4e80 r pwr_virus_section5 +ffffffff82cd5490 r pwr_virus_section6 +ffffffff82cd7000 R smu8_smu_funcs +ffffffff82cd8000 R tonga_smu_funcs +ffffffff82cd80e0 r tonga_power_tune_data_set_array +ffffffff82cd812c r tonga_clock_stretch_amount_conversion +ffffffff82cd8140 r tonga_clock_stretcher_ddt_table +ffffffff82cd9000 R vega10_smu_funcs +ffffffff82cda000 R vega12_smu_funcs +ffffffff82cdb000 R vega20_smu_funcs +ffffffff82cdc000 R vegam_smu_funcs +ffffffff82cdc0e0 r vegam_power_tune_data_set_array +ffffffff82cdc130 r Range_Table +ffffffff82cdd000 R smu_ip_funcs +ffffffff82cdd0a0 R smu_v11_0_ip_block +ffffffff82cdd0b8 R smu_v12_0_ip_block +ffffffff82cdd0d0 R smu_v13_0_ip_block +ffffffff82cdd0e8 r swsmu_pm_funcs +ffffffff82cde000 r arcturus_table_map +ffffffff82cde080 r arcturus_pwr_src_map +ffffffff82cde090 r arcturus_workload_map +ffffffff82cde0d0 r arcturus_ppt_funcs +ffffffff82cde4a0 r smu11_thermal_policy +ffffffff82cde4f8 r arcturus_i2c_algo +ffffffff82cde508 r arcturus_i2c_control_quirks +ffffffff82cde520 r arcturus_throttler_map +ffffffff82cde540 r arcturus_message_map +ffffffff82cdef90 r arcturus_clk_map +ffffffff82cdf050 r arcturus_feature_mask_map +ffffffff82ce0000 r cyan_skillfish_ppt_funcs +ffffffff82ce1000 r navi10_ppt_funcs +ffffffff82ce13d0 r smu11_thermal_policy +ffffffff82ce1428 r navi10_i2c_algo +ffffffff82ce1438 r navi10_i2c_control_quirks +ffffffff82ce1450 r navi1x_throttler_map +ffffffff82ce1470 r NoDbiPrbs7 +ffffffff82ce2470 r DbiPrbs7 +ffffffff82ce4000 r sienna_cichlid_ppt_funcs +ffffffff82ce43d0 r smu11_thermal_policy +ffffffff82ce4428 r sienna_cichlid_i2c_algo +ffffffff82ce4438 r sienna_cichlid_i2c_control_quirks +ffffffff82ce4450 r sienna_cichlid_throttler_map +ffffffff82ce5000 r smu_v11_0_irq_funcs ffffffff82ce5010 r link_width -ffffffff82ce6000 r smu_v13_0_0_ppt_funcs -ffffffff82ce63d0 r smu13_thermal_policy -ffffffff82ce6428 r smu_v13_0_0_i2c_algo -ffffffff82ce6438 r smu_v13_0_0_i2c_control_quirks -ffffffff82ce6450 r smu_v13_0_0_throttler_map -ffffffff82ce7000 r smu_v13_0_4_ppt_funcs -ffffffff82ce8000 r smu_v13_0_5_ppt_funcs -ffffffff82ce9000 r smu_v13_0_7_ppt_funcs -ffffffff82ce93d0 r smu13_thermal_policy -ffffffff82ce9430 r smu_v13_0_7_throttler_map -ffffffff82cea000 r yellow_carp_ppt_funcs -ffffffff82ceb000 r __smu_message_names -ffffffff82cec000 R pchb_ca -ffffffff82ced000 R amas_ca -ffffffff82ced028 R amas_devices -ffffffff82ced040 r amas_feature -ffffffff82cee000 R cardslot_ca -ffffffff82cef000 R cardbus_ca -ffffffff82cf0000 R com_cardbus_ca -ffffffff82cf1000 R xl_cardbus_ca -ffffffff82cf1030 R xl_cardbus_products -ffffffff82cf2000 R dc_cardbus_ca -ffffffff82cf2030 R dc_cardbus_devices -ffffffff82cf3000 R fxp_cardbus_ca -ffffffff82cf3028 R fxp_cardbus_devices -ffffffff82cf4000 R rl_cardbus_devices -ffffffff82cf4028 R rl_cardbus_ca -ffffffff82cf5000 R re_cardbus_ca -ffffffff82cf5028 R re_cardbus_devices -ffffffff82cf6000 R ath_cardbus_ca -ffffffff82cf7000 R athn_cardbus_ca -ffffffff82cf7030 r athn_cardbus_devices -ffffffff82cf8000 R atw_cardbus_ca -ffffffff82cf8028 R atw_cardbus_devices -ffffffff82cf9000 R rtw_cardbus_ca -ffffffff82cf9028 R rtw_cardbus_devices -ffffffff82cfa000 R ral_cardbus_ca -ffffffff82cfa030 r ral_cardbus_devices -ffffffff82cfb000 R acx_cardbus_ca -ffffffff82cfb028 r acx_cardbus_devices -ffffffff82cfc000 R pgt_cardbus_ca -ffffffff82cfc028 R pgt_cardbus_devices -ffffffff82cfd000 R ehci_cardbus_ca -ffffffff82cfe000 R ohci_cardbus_ca -ffffffff82cff000 R uhci_cardbus_ca -ffffffff82d00000 R malo_cardbus_ca -ffffffff82d00028 r malo_cardbus_devices -ffffffff82d01000 R bwi_cardbus_ca -ffffffff82d01030 r bwi_cardbus_devices -ffffffff82d02000 R pcmcia_ca -ffffffff82d03000 r pcmcia_parse_cis_tuple.init_cfe -ffffffff82d04000 r pcmcia_cis_quirks -ffffffff82d05000 R ep_pcmcia_ca -ffffffff82d06000 R ne_pcmcia_ca -ffffffff82d06030 R ne2000devs -ffffffff82d08000 R aic_pcmcia_ca -ffffffff82d09000 R com_pcmcia_ca -ffffffff82d0a000 R wdc_pcmcia_ca -ffffffff82d0b000 R sm_pcmcia_ca -ffffffff82d0c000 R xe_pcmcia_ca -ffffffff82d0d000 R wi_pcmcia_ca -ffffffff82d0d030 r wi_pcmcia_products -ffffffff82d0e000 R malo_pcmcia_ca -ffffffff82d0f000 R an_pcmcia_ca -ffffffff82d10000 R pcib_ca -ffffffff82d11000 R amdpcib_ca -ffffffff82d11028 R amdpcib_devices -ffffffff82d12000 R tcpcib_ca -ffffffff82d12028 R tcpcib_devices -ffffffff82d13000 R aapic_ca -ffffffff82d14000 R hme_pci_ca -ffffffff82d14028 r hme_promhdr -ffffffff82d1402a r hme_promdat -ffffffff82d15000 R isa_ca -ffffffff82d16000 R isadma_ca -ffffffff82d17000 R fdc_ca -ffffffff82d18000 R fd_ca -ffffffff82d19000 R com_isa_ca -ffffffff82d1a000 R pckbc_isa_ca -ffffffff82d1b000 R vga_isa_ca -ffffffff82d1c000 R wdc_isa_ca -ffffffff82d1d000 R mpu_midi_hw_if -ffffffff82d1e000 R mpu_isa_ca -ffffffff82d1f000 R pcppi_ca -ffffffff82d20000 R spkr_ca -ffffffff82d20030 r pitchtab -ffffffff82d21000 R lpt_isa_ca -ffffffff82d22000 R wbsio_ca -ffffffff82d23000 R schsio_ca -ffffffff82d24000 R lm_isa_ca -ffffffff82d24028 R lm_wbsio_ca -ffffffff82d25000 R it_sensors -ffffffff82d25110 R it_vrfact -ffffffff82d25140 R it_fan_regs -ffffffff82d25160 R it_fan_ext_regs -ffffffff82d25178 R it_ca -ffffffff82d26000 R abitkv_sensors -ffffffff82d26200 R abitaa_sensors -ffffffff82d26480 R abitav_sensors -ffffffff82d26700 R abitas_sensors -ffffffff82d26980 R abitax_sensors -ffffffff82d26bc0 R abitm4_sensors -ffffffff82d26e80 R abitan_sensors -ffffffff82d27120 R abital_sensors -ffffffff82d273a0 R abitaw_sensors -ffffffff82d27700 R abitni_sensors -ffffffff82d279a0 R abitat_sensors -ffffffff82d27cc0 R abitan2_sensors -ffffffff82d27f60 R abitab_sensors -ffffffff82d28220 R abitan3_sensors -ffffffff82d28500 R abitaw2_sensors -ffffffff82d28860 R abitat2_sensors -ffffffff82d28b60 R abitab2_sensors -ffffffff82d28ea0 R abitin_sensors -ffffffff82d291e0 R uguru_ca -ffffffff82d2a000 R aps_ca -ffffffff82d2b000 R wsdisplay_emul_ca -ffffffff82d2b030 r charClass -ffffffff82d2c000 r usl_syncops -ffffffff82d2d000 R wsevent_filtops -ffffffff82d2e000 R wskbd_ca -ffffffff82d2f000 r latin1_to_upper -ffffffff82d30000 R wsmouse_ca -ffffffff82d31000 R cyrillic_to_koi8 -ffffffff82d31060 R unicode_to_latin2 -ffffffff82d310e0 R unicode_to_latin7 -ffffffff82d32000 R wsemul_vt100_ops -ffffffff82d33000 r decspcgr2uni -ffffffff82d33100 r dectech2uni -ffffffff82d33200 r nrctable -ffffffff82d33320 r nrcovlpos -ffffffff82d34000 r vt100_fkeys -ffffffff82d340c0 r vt100_pfkeys -ffffffff82d340e0 r vt100_numpad -ffffffff82d35000 R pckbd_ca -ffffffff82d35028 R pckbd_accessops -ffffffff82d35040 R pckbd_consops -ffffffff82d35060 R pckbd_keymapdata -ffffffff82d35070 R pckbd_xtbl2 -ffffffff82d35100 R pckbd_xtbl2_ext -ffffffff82d36000 r pckbd_keydesc_us -ffffffff82d36250 r pckbd_keydesc_de -ffffffff82d362f0 r pckbd_keydesc_de_nodead -ffffffff82d36310 r pckbd_keydesc_fr -ffffffff82d363d0 r pckbd_keydesc_fr_dvorak_bepo -ffffffff82d36510 r pckbd_keydesc_dk -ffffffff82d365a0 r pckbd_keydesc_dk_nodead -ffffffff82d365b0 r pckbd_keydesc_it -ffffffff82d36640 r pckbd_keydesc_uk -ffffffff82d366e0 r pckbd_keydesc_jp -ffffffff82d36750 r pckbd_keydesc_sv -ffffffff82d36780 r pckbd_keydesc_sv_nodead -ffffffff82d36790 r pckbd_keydesc_no -ffffffff82d367c0 r pckbd_keydesc_no_nodead -ffffffff82d367d0 r pckbd_keydesc_us_declk -ffffffff82d36860 r pckbd_keydesc_us_dvorak -ffffffff82d36900 r pckbd_keydesc_us_colemak -ffffffff82d36948 r pckbd_keydesc_swapctrlcaps -ffffffff82d36960 r pckbd_keydesc_iopener -ffffffff82d369b0 r pckbd_keydesc_es -ffffffff82d36a50 r pckbd_keydesc_be -ffffffff82d36b10 r pckbd_keydesc_ru -ffffffff82d36c80 r pckbd_keydesc_ua -ffffffff82d36e10 r pckbd_keydesc_sg -ffffffff82d36ec0 r pckbd_keydesc_sg_nodead -ffffffff82d36ee0 r pckbd_keydesc_sf -ffffffff82d36f00 r pckbd_keydesc_pt -ffffffff82d36f90 r pckbd_keydesc_lt -ffffffff82d37070 r pckbd_keydesc_la -ffffffff82d37100 r pckbd_keydesc_br -ffffffff82d37180 r pckbd_keydesc_tr -ffffffff82d37230 r pckbd_keydesc_tr_nodead -ffffffff82d37250 r pckbd_keydesc_pl -ffffffff82d372b0 r pckbd_keydesc_hu -ffffffff82d373c0 r pckbd_keydesc_si -ffffffff82d374d0 r pckbd_keydesc_cf -ffffffff82d375a0 r pckbd_keydesc_cf_nodead -ffffffff82d375c0 r pckbd_keydesc_lv -ffffffff82d37640 r pckbd_keydesc_nl -ffffffff82d37720 r pckbd_keydesc_nl_nodead -ffffffff82d37740 r pckbd_keydesc_is -ffffffff82d377cc r pckbd_keydesc_is_nodead -ffffffff82d377e0 r pckbd_keydesc_ee -ffffffff82d37890 r pckbd_keydesc_ee_nodead -ffffffff82d378b0 R pckbd_keydesctab -ffffffff82d38000 R pms_ca -ffffffff82d38028 R pms_accessops -ffffffff82d38040 R pms_sec_accessops -ffffffff82d38060 R pms_protocols -ffffffff82d381e0 r alps_models -ffffffff82d39000 R skgpio_led_offset -ffffffff82d39008 R skgpio_ca -ffffffff82d3a000 R hidkbd_trtab -ffffffff82d3a100 r apple_fn_trans -ffffffff82d3a120 r apple_tb_trans -ffffffff82d3a140 r apple_mba_trans -ffffffff82d3b000 r hidcc_attach_wskbd.accessops -ffffffff82d3b020 r hidcc_keysyms -ffffffff82d3c000 R usb_ca -ffffffff82d3d000 R usb_known_products -ffffffff82d48f80 R usb_known_vendors -ffffffff82d4b790 R usbd_error_strs -ffffffff82d4c000 R usb_quirks -ffffffff82d4c390 R usb_dev_quirks -ffffffff82d4c398 R usbd_no_quirk -ffffffff82d4d000 R uhub_ca -ffffffff82d4d028 R uhub_uhub_ca -ffffffff82d4e000 R uaudio_ca -ffffffff82d4e028 R uaudio_hw_if -ffffffff82d4e0e0 R uaudio_rates -ffffffff82d4e120 r uaudio_clkname.names -ffffffff82d4e140 r uaudio_feature_addent.features -ffffffff82d4f000 R uvideo_ca -ffffffff82d4f028 R uvideo_hw_if -ffffffff82d4f100 R uvideo_devs -ffffffff82d50000 r utvfu_select_norm.pal -ffffffff82d50040 r utvfu_select_norm.ntsc -ffffffff82d50080 r utvfu_setup_capture.setup -ffffffff82d50180 r utvfu_audio_start_chip.setup -ffffffff82d501c8 r utvfu_audio_stop_chip.setup -ffffffff82d501d8 R utvfu_ca -ffffffff82d50200 R utvfu_vid_hw_if -ffffffff82d502d0 R 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sm_pcmcia_ca +ffffffff82d11000 R xe_pcmcia_ca +ffffffff82d12000 R wi_pcmcia_ca +ffffffff82d12030 r wi_pcmcia_products +ffffffff82d13000 R malo_pcmcia_ca +ffffffff82d14000 R an_pcmcia_ca +ffffffff82d15000 R pcib_ca +ffffffff82d16000 R amdpcib_ca +ffffffff82d16028 R amdpcib_devices +ffffffff82d17000 R tcpcib_ca +ffffffff82d17028 R tcpcib_devices +ffffffff82d18000 R aapic_ca +ffffffff82d19000 R hme_pci_ca +ffffffff82d19028 r hme_promhdr +ffffffff82d1902a r hme_promdat +ffffffff82d1a000 R isa_ca +ffffffff82d1b000 R isadma_ca +ffffffff82d1c000 R fdc_ca +ffffffff82d1d000 R fd_ca +ffffffff82d1e000 R com_isa_ca +ffffffff82d1f000 R pckbc_isa_ca +ffffffff82d20000 R vga_isa_ca +ffffffff82d21000 R wdc_isa_ca +ffffffff82d22000 R mpu_midi_hw_if +ffffffff82d23000 R mpu_isa_ca +ffffffff82d24000 R pcppi_ca +ffffffff82d25000 R spkr_ca +ffffffff82d25030 r pitchtab +ffffffff82d26000 R lpt_isa_ca +ffffffff82d27000 R wbsio_ca +ffffffff82d28000 R schsio_ca +ffffffff82d29000 R lm_isa_ca +ffffffff82d29028 R lm_wbsio_ca +ffffffff82d2a000 R it_sensors +ffffffff82d2a110 R it_vrfact +ffffffff82d2a140 R it_fan_regs +ffffffff82d2a160 R it_fan_ext_regs +ffffffff82d2a178 R it_ca +ffffffff82d2b000 R abitkv_sensors +ffffffff82d2b200 R abitaa_sensors +ffffffff82d2b480 R abitav_sensors +ffffffff82d2b700 R abitas_sensors +ffffffff82d2b980 R abitax_sensors +ffffffff82d2bbc0 R abitm4_sensors +ffffffff82d2be80 R abitan_sensors +ffffffff82d2c120 R abital_sensors +ffffffff82d2c3a0 R abitaw_sensors +ffffffff82d2c700 R abitni_sensors +ffffffff82d2c9a0 R abitat_sensors +ffffffff82d2ccc0 R abitan2_sensors +ffffffff82d2cf60 R abitab_sensors +ffffffff82d2d220 R abitan3_sensors +ffffffff82d2d500 R abitaw2_sensors +ffffffff82d2d860 R abitat2_sensors +ffffffff82d2db60 R abitab2_sensors +ffffffff82d2dea0 R abitin_sensors +ffffffff82d2e1e0 R uguru_ca +ffffffff82d2f000 R aps_ca +ffffffff82d30000 R wsdisplay_emul_ca +ffffffff82d30030 r charClass +ffffffff82d31000 r usl_syncops +ffffffff82d32000 R wsevent_filtops +ffffffff82d33000 R wskbd_ca +ffffffff82d34000 r latin1_to_upper +ffffffff82d35000 R wsmouse_ca +ffffffff82d36000 R cyrillic_to_koi8 +ffffffff82d36060 R unicode_to_latin2 +ffffffff82d360e0 R unicode_to_latin7 +ffffffff82d37000 R wsemul_vt100_ops +ffffffff82d38000 r decspcgr2uni +ffffffff82d38100 r dectech2uni +ffffffff82d38200 r nrctable +ffffffff82d38320 r nrcovlpos +ffffffff82d39000 r vt100_fkeys +ffffffff82d390c0 r vt100_pfkeys +ffffffff82d390e0 r vt100_numpad +ffffffff82d3a000 R pckbd_ca +ffffffff82d3a028 R pckbd_accessops +ffffffff82d3a040 R pckbd_consops +ffffffff82d3a060 R pckbd_keymapdata +ffffffff82d3a070 R pckbd_xtbl2 +ffffffff82d3a100 R pckbd_xtbl2_ext +ffffffff82d3b000 r pckbd_keydesc_us +ffffffff82d3b250 r pckbd_keydesc_de +ffffffff82d3b2f0 r pckbd_keydesc_de_nodead +ffffffff82d3b310 r pckbd_keydesc_fr +ffffffff82d3b3d0 r pckbd_keydesc_fr_dvorak_bepo +ffffffff82d3b510 r pckbd_keydesc_dk +ffffffff82d3b5a0 r pckbd_keydesc_dk_nodead +ffffffff82d3b5b0 r pckbd_keydesc_it +ffffffff82d3b640 r pckbd_keydesc_uk +ffffffff82d3b6e0 r pckbd_keydesc_jp +ffffffff82d3b750 r pckbd_keydesc_sv +ffffffff82d3b780 r pckbd_keydesc_sv_nodead +ffffffff82d3b790 r pckbd_keydesc_no +ffffffff82d3b7c0 r pckbd_keydesc_no_nodead +ffffffff82d3b7d0 r pckbd_keydesc_us_declk +ffffffff82d3b860 r pckbd_keydesc_us_dvorak +ffffffff82d3b900 r pckbd_keydesc_us_colemak +ffffffff82d3b948 r pckbd_keydesc_swapctrlcaps +ffffffff82d3b960 r pckbd_keydesc_iopener +ffffffff82d3b9b0 r pckbd_keydesc_es +ffffffff82d3ba50 r pckbd_keydesc_be +ffffffff82d3bb10 r pckbd_keydesc_ru +ffffffff82d3bc80 r pckbd_keydesc_ua +ffffffff82d3be10 r pckbd_keydesc_sg +ffffffff82d3bec0 r pckbd_keydesc_sg_nodead +ffffffff82d3bee0 r pckbd_keydesc_sf +ffffffff82d3bf00 r pckbd_keydesc_pt +ffffffff82d3bf90 r pckbd_keydesc_lt +ffffffff82d3c070 r pckbd_keydesc_la +ffffffff82d3c100 r pckbd_keydesc_br +ffffffff82d3c180 r pckbd_keydesc_tr +ffffffff82d3c230 r pckbd_keydesc_tr_nodead +ffffffff82d3c250 r pckbd_keydesc_pl +ffffffff82d3c2b0 r pckbd_keydesc_hu +ffffffff82d3c3c0 r pckbd_keydesc_si +ffffffff82d3c4d0 r pckbd_keydesc_cf +ffffffff82d3c5a0 r pckbd_keydesc_cf_nodead +ffffffff82d3c5c0 r pckbd_keydesc_lv +ffffffff82d3c640 r pckbd_keydesc_nl +ffffffff82d3c720 r pckbd_keydesc_nl_nodead +ffffffff82d3c740 r pckbd_keydesc_is +ffffffff82d3c7cc r pckbd_keydesc_is_nodead +ffffffff82d3c7e0 r pckbd_keydesc_ee +ffffffff82d3c890 r pckbd_keydesc_ee_nodead +ffffffff82d3c8b0 R pckbd_keydesctab +ffffffff82d3d000 R pms_ca +ffffffff82d3d028 R pms_accessops +ffffffff82d3d040 R pms_sec_accessops +ffffffff82d3d060 R pms_protocols +ffffffff82d3d1e0 r alps_models +ffffffff82d3e000 R skgpio_led_offset +ffffffff82d3e008 R skgpio_ca +ffffffff82d3f000 R hidkbd_trtab +ffffffff82d3f100 r apple_fn_trans +ffffffff82d3f120 r apple_tb_trans +ffffffff82d3f140 r apple_mba_trans +ffffffff82d40000 r hidcc_attach_wskbd.accessops +ffffffff82d40020 r hidcc_keysyms +ffffffff82d41000 R usb_ca +ffffffff82d42000 R usb_known_products +ffffffff82d4df80 R usb_known_vendors +ffffffff82d50790 R usbd_error_strs +ffffffff82d51000 R usb_quirks +ffffffff82d51390 R usb_dev_quirks +ffffffff82d51398 R usbd_no_quirk +ffffffff82d52000 R uhub_ca +ffffffff82d52028 R uhub_uhub_ca +ffffffff82d53000 R uaudio_ca +ffffffff82d53028 R uaudio_hw_if +ffffffff82d530e0 R uaudio_rates +ffffffff82d53120 r uaudio_clkname.names +ffffffff82d53140 r uaudio_feature_addent.features +ffffffff82d54000 R uvideo_ca +ffffffff82d54028 R uvideo_hw_if +ffffffff82d54100 R uvideo_devs +ffffffff82d55000 r utvfu_select_norm.pal +ffffffff82d55040 r utvfu_select_norm.ntsc +ffffffff82d55080 r utvfu_setup_capture.setup +ffffffff82d55180 r utvfu_audio_start_chip.setup +ffffffff82d551c8 r utvfu_audio_stop_chip.setup +ffffffff82d551d8 R utvfu_ca +ffffffff82d55200 R utvfu_vid_hw_if +ffffffff82d552d0 R utvfu_au_hw_if +ffffffff82d56000 R udl_ca +ffffffff82d56030 r udl_devs +ffffffff82d560b0 r udl_modes +ffffffff82d57000 R umidi_hw_if +ffffffff82d57030 R umidi_ca +ffffffff82d57060 r umidi_evlen +ffffffff82d57080 r packet_length +ffffffff82d58000 r quirk_name +ffffffff82d59000 R ucom_ca +ffffffff82d5a000 R ugen_ca +ffffffff82d5a028 R ugenread_intr_filtops +ffffffff82d5a058 R ugenread_isoc_filtops +ffffffff82d5b000 R uhidev_ca +ffffffff82d5b030 r uhid_graphire_report_descr +ffffffff82d5b0b0 r uhid_graphire3_4x5_report_descr +ffffffff82d5b160 r uhid_xb360gp_report_descr +ffffffff82d5b210 r uhid_xbonegp_report_descr +ffffffff82d5c000 R uhid_ca +ffffffff82d5c028 R uhidread_filtops +ffffffff82d5d000 R fido_ca +ffffffff82d5e000 R ujoy_ca +ffffffff82d5f000 r ukbd_keydesc_us +ffffffff82d5f290 r ukbd_keydesc_de +ffffffff82d5f340 r ukbd_keydesc_de_nodead +ffffffff82d5f360 r ukbd_keydesc_fr +ffffffff82d5f420 r ukbd_keydesc_fr_apple +ffffffff82d5f560 r ukbd_keydesc_fr_dvorak_bepo +ffffffff82d5f6a0 r ukbd_keydesc_dk +ffffffff82d5f740 r ukbd_keydesc_dk_nodead +ffffffff82d5f750 r ukbd_keydesc_it +ffffffff82d5f7f0 r ukbd_keydesc_uk +ffffffff82d5f8a0 r ukbd_keydesc_jp +ffffffff82d5f910 r ukbd_keydesc_sv +ffffffff82d5f940 r ukbd_keydesc_sv_nodead +ffffffff82d5f950 r ukbd_keydesc_no +ffffffff82d5f980 r ukbd_keydesc_no_nodead +ffffffff82d5f990 r ukbd_keydesc_us_dvorak +ffffffff82d5fa30 r ukbd_keydesc_us_colemak +ffffffff82d5fa78 r ukbd_keydesc_swapctrlcaps +ffffffff82d5fa90 r ukbd_keydesc_iopener +ffffffff82d5fae0 r ukbd_keydesc_es +ffffffff82d5fb80 r ukbd_keydesc_be +ffffffff82d5fc40 r ukbd_keydesc_ru +ffffffff82d5fdb0 r ukbd_keydesc_ua +ffffffff82d5ff50 r ukbd_keydesc_sg +ffffffff82d60010 r ukbd_keydesc_sg_nodead +ffffffff82d60030 r ukbd_keydesc_sf +ffffffff82d60050 r ukbd_keydesc_pt +ffffffff82d600e0 r ukbd_keydesc_pt_apple +ffffffff82d60100 r ukbd_keydesc_lt +ffffffff82d601e0 r ukbd_keydesc_la +ffffffff82d60280 r ukbd_keydesc_br +ffffffff82d60310 r ukbd_keydesc_tr +ffffffff82d603d0 r ukbd_keydesc_tr_nodead +ffffffff82d603f0 r ukbd_keydesc_pl +ffffffff82d60450 r ukbd_keydesc_hu +ffffffff82d60560 r ukbd_keydesc_si +ffffffff82d60680 r ukbd_keydesc_cf +ffffffff82d60760 r ukbd_keydesc_cf_nodead +ffffffff82d60780 r ukbd_keydesc_lv +ffffffff82d60800 r ukbd_keydesc_nl +ffffffff82d608e0 r ukbd_keydesc_nl_nodead +ffffffff82d60900 r ukbd_keydesc_is +ffffffff82d60994 r ukbd_keydesc_is_nodead +ffffffff82d609a0 r ukbd_keydesc_ee +ffffffff82d60a50 r ukbd_keydesc_ee_nodead +ffffffff82d60a70 R ukbd_keydesctab +ffffffff82d61000 R ukbd_countrylayout +ffffffff82d61090 R ukbd_consops +ffffffff82d610b0 R ukbd_accessops +ffffffff82d610c8 R ukbd_ca +ffffffff82d62000 R ums_accessops +ffffffff82d62018 R ums_ca +ffffffff82d63000 R umt_accessops +ffffffff82d63018 R umt_ca +ffffffff82d64000 R uts_devs +ffffffff82d64010 R uts_accessops +ffffffff82d64028 R uts_ca +ffffffff82d65000 R ubcmtp_accessops +ffffffff82d65018 R ubcmtp_ca +ffffffff82d65040 r ubcmtp_devices +ffffffff82d66000 R ucycom_methods +ffffffff82d66040 R ucycom_devs +ffffffff82d66050 R ucycom_ca +ffffffff82d67000 R uslhcom_methods +ffffffff82d67040 R uslhcom_ca +ffffffff82d67068 r uslhcom_devs +ffffffff82d68000 R ulpt_ca +ffffffff82d69000 R umass_ca +ffffffff82d69028 R umass_bbb_methods +ffffffff82d69040 R umass_cbi_methods +ffffffff82d6a000 R umass_quirks +ffffffff82d6b000 R umass_scsi_switch +ffffffff82d6c000 R uthum_devs +ffffffff82d6c008 R uthum_ca +ffffffff82d6c030 r uthum_sensor_type_s +ffffffff82d6d000 R ugold_devs +ffffffff82d6d010 R ugold_ca +ffffffff82d6e000 R utrh_devs +ffffffff82d6e008 R utrh_ca +ffffffff82d6f000 R uoakrh_devs +ffffffff82d6f008 R uoakrh_ca +ffffffff82d6f030 R uoakrh_methods +ffffffff82d70000 R uoaklux_devs +ffffffff82d70008 R uoaklux_ca +ffffffff82d70030 R uoaklux_methods +ffffffff82d71000 R uoakv_devs +ffffffff82d71008 R uoakv_ca +ffffffff82d71030 R uoakv_methods +ffffffff82d72000 R uonerng_ca +ffffffff82d73000 R urng_ca +ffffffff82d73030 r urng_devs +ffffffff82d74000 R udcf_ca +ffffffff82d74028 r udcf_devs +ffffffff82d75000 R umbg_ca +ffffffff82d76000 R uvisor_methods +ffffffff82d76040 R uvisor_ca +ffffffff82d76070 r uvisor_devs +ffffffff82d77000 R udsbr_hw_if +ffffffff82d77028 R udsbr_ca +ffffffff82d78000 R utwitch_devs +ffffffff82d78008 R utwitch_ca +ffffffff82d79000 R aue_devs +ffffffff82d791b0 R aue_ca +ffffffff82d7a000 R axe_devs +ffffffff82d7a0d0 R axe_ca +ffffffff82d7b000 R axen_devs +ffffffff82d7b020 R axen_ca +ffffffff82d7c000 R smsc_ca +ffffffff82d7c030 r smsc_devs +ffffffff82d7d000 R cue_ca +ffffffff82d7e000 R kue_devs +ffffffff82d7e088 R kue_ca +ffffffff82d7f000 R cdce_devs +ffffffff82d7f0a0 R cdce_ca +ffffffff82d80000 R urndis_ca +ffffffff82d80030 R urndis_class +ffffffff82d81000 R mos_devs +ffffffff82d81018 R mos_ca +ffffffff82d82000 R mue_devs +ffffffff82d82020 R mue_ca +ffffffff82d83000 R udav_ca +ffffffff82d83030 r udav_devs +ffffffff82d84000 R upl_ca +ffffffff82d85000 R ugl_ca +ffffffff82d86000 R url_ca +ffffffff82d86030 r url_devs +ffffffff82d87000 R ure_devs +ffffffff82d870e8 R ure_ca +ffffffff82d88000 R uaq_devs +ffffffff82d88018 R uaq_ca +ffffffff82d89000 R umodem_methods +ffffffff82d89040 R umodem_ca +ffffffff82d8a000 R uftdi_methods +ffffffff82d8a040 R uftdi_ca +ffffffff82d8a070 r uftdi_devs +ffffffff82d8b000 R uplcom_methods +ffffffff82d8b040 R uplcom_ca +ffffffff82d8b070 r uplcom_devs +ffffffff82d8c000 R umct_methods +ffffffff82d8c040 R umct_ca +ffffffff82d8c070 r umct_devs +ffffffff82d8d000 R uvscom_methods +ffffffff82d8d040 R uvscom_ca +ffffffff82d8d070 r uvscom_devs +ffffffff82d8e000 R ubsa_methods +ffffffff82d8e040 R ubsa_devs +ffffffff82d8e060 R ubsa_ca +ffffffff82d8f000 R ukspan_ca +ffffffff82d8f028 r ukspan_devs +ffffffff82d8f030 r ukspan_methods +ffffffff82d90000 R uslcom_methods +ffffffff82d90040 R uslcom_ca +ffffffff82d90070 r uslcom_devs +ffffffff82d91000 R uark_methods +ffffffff82d91040 R uark_ca +ffffffff82d91068 r uark_devs +ffffffff82d92000 R moscom_methods +ffffffff82d92040 R moscom_ca +ffffffff82d92068 r moscom_devs +ffffffff82d93000 R umcs_methods +ffffffff82d93040 R umcs_devs +ffffffff82d93050 R umcs_ca +ffffffff82d94000 R uscom_methods +ffffffff82d94040 R uscom_ca +ffffffff82d94068 r uscom_devs +ffffffff82d95000 R ucrcom_methods +ffffffff82d95040 R ucrcom_ca +ffffffff82d96000 R uxrcom_methods +ffffffff82d96040 R uxrcom_ca +ffffffff82d96068 r uxrcom_devs +ffffffff82d97000 R uipaq_methods +ffffffff82d97040 R uipaq_ca +ffffffff82d97070 r uipaq_devs +ffffffff82d98000 R umsm_methods +ffffffff82d98040 R umsm_ca +ffffffff82d98070 r umsm_devs +ffffffff82d99000 R uchcom_methods +ffffffff82d99040 R uchcom_ca +ffffffff82d99068 r uchcom_devs +ffffffff82d99080 r dividers +ffffffff82d9a000 R uticom_methods +ffffffff82d9a040 R uticom_ca +ffffffff82d9a070 r uticom_devs +ffffffff82d9b000 R wi_usb_devs +ffffffff82d9b0f0 R wi_usb_ca +ffffffff82d9c000 R atu_ca +ffffffff82d9d000 R ural_ca +ffffffff82d9d030 r ural_devs +ffffffff82d9d0a0 r ural_rf2522_r2 +ffffffff82d9d0e0 r ural_rf2524_r2 +ffffffff82d9d120 r ural_rf2525_hi_r2 +ffffffff82d9d160 r ural_rf2525_r2 +ffffffff82d9d1a0 r ural_rf2525e_r2 +ffffffff82d9d1e0 r ural_rf2526_hi_r2 +ffffffff82d9d220 r ural_rf2526_r2 +ffffffff82d9d260 r ural_def_bbp +ffffffff82d9d2a0 r ural_def_mac +ffffffff82d9e000 R rum_ca +ffffffff82d9e030 r rum_devs +ffffffff82d9e110 r rum_rf5225 +ffffffff82d9e460 r rum_rf5226 +ffffffff82d9e7b0 r rum_def_bbp +ffffffff82d9e7f0 r rum_def_mac +ffffffff82d9f000 R run_ca +ffffffff82d9f030 r run_devs +ffffffff82d9f430 r rt2860_rf2850 +ffffffff82d9f860 r rt2860_rates +ffffffff82d9f920 r rt5592_freqs_40mhz +ffffffff82d9fa60 r rt5592_freqs_20mhz +ffffffff82d9fba0 r rt5592_2ghz_def_rf +ffffffff82d9fbe0 r rt5592_chan_5ghz +ffffffff82d9fe30 r rt5592_def_bbp +ffffffff82d9fe70 r rt5592_bbp_r196 +ffffffff82d9fed0 r rt5390_def_bbp +ffffffff82d9ff00 r rt3572_def_rf +ffffffff82d9ff40 r rt3070_def_rf +ffffffff82d9ff70 r rt3593_def_rf +ffffffff82d9ffb0 r rt5592_def_rf +ffffffff82d9ffe0 r rt5392_def_rf +ffffffff82da0060 r rt5390_def_rf +ffffffff82da00e0 r rt2870_def_mac +ffffffff82da1000 R mtw_ca +ffffffff82da1030 r mtw_devs +ffffffff82da1070 r rt2860_rates +ffffffff82da1130 r mt7601_rf_chan +ffffffff82da11a0 r mt7601_def_bbp +ffffffff82da12d0 r mt7601_rf_bank0 +ffffffff82da1330 r mt7601_rf_bank4 +ffffffff82da13b0 r mt7601_rf_bank5 +ffffffff82da1430 r mt7601_def_mac +ffffffff82da2000 R zyd_ca +ffffffff82da2030 r zyd_devs +ffffffff82da21b0 r zyd_rfmd_init.phyini +ffffffff82da22e0 r zyd_rfmd_init.rfini +ffffffff82da2330 r zyd_rfmd_set_channel.rfprog +ffffffff82da23a0 r zyd_al2230_init.phyini +ffffffff82da2480 r zyd_al2230_init.rfini +ffffffff82da24e0 r zyd_al2230_init_b.phyini +ffffffff82da25d0 r zyd_al2230_init_b.rfini +ffffffff82da2620 r zyd_al2230_set_channel.rfprog +ffffffff82da26d0 r zyd_al7230B_init.phyini_1 +ffffffff82da27b0 r zyd_al7230B_init.rfini_1 +ffffffff82da27f0 r zyd_al7230B_set_channel.rfprog +ffffffff82da2860 r zyd_al7230B_set_channel.rfsc +ffffffff82da2890 r zyd_al2210_init.phyini +ffffffff82da28f0 r zyd_al2210_init.rfini +ffffffff82da2920 r zyd_al2210_set_channel.rfprog +ffffffff82da2960 r zyd_gct_init.phyini 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dt_static_sched_dequeue +ffffffff831380a0 D dt_static_sched_enqueue +ffffffff83138110 D dt_static_sched_fork +ffffffff83138180 D dt_static_sched_off__cpu +ffffffff831381f0 D dt_static_sched_on__cpu +ffffffff83138260 D dt_static_sched_remain__cpu +ffffffff831382d0 D dt_static_sched_sleep +ffffffff83138340 D dt_static_sched_steal +ffffffff831383b0 D dt_static_sched_unsleep +ffffffff83138420 D dt_static_sched_wakeup +ffffffff83138490 D dt_static_raw_syscalls_sys_enter +ffffffff83138500 D dt_static_raw_syscalls_sys_exit +ffffffff83138570 D dt_static_uvm_fault +ffffffff831385e0 D dt_static_uvm_map_insert +ffffffff83138650 D dt_static_uvm_map_remove +ffffffff831386c0 D dt_static_uvm_malloc +ffffffff83138730 D dt_static_uvm_free +ffffffff831387a0 D dt_static_uvm_pool_get +ffffffff83138810 D dt_static_uvm_pool_put +ffffffff83138880 D dt_static_vfs_bufcache_rel +ffffffff831388f0 D dt_static_vfs_bufcache_take +ffffffff83138960 D dt_static_vfs_cleaner +ffffffff831389d0 D dt_static_vmm_guest_enter +ffffffff83138a40 D dt_static_vmm_guest_exit +ffffffff83138ab0 D dt_static_vmm_inout +ffffffff83138b20 D dt_static_smr_call +ffffffff83138b90 D dt_static_smr_called +ffffffff83138c00 D dt_static_smr_barrier_enter +ffffffff83138c70 D dt_static_smr_barrier_exit +ffffffff83138ce0 D dt_static_smr_wakeup +ffffffff83138d50 D dt_static_smr_thread +ffffffff83138dc0 D dt_static_refcnt_none +ffffffff83138e30 D dt_static_refcnt_ethmulti +ffffffff83138ea0 D dt_static_refcnt_ifaddr +ffffffff83138f10 D dt_static_refcnt_ifmaddr +ffffffff83138f80 D dt_static_refcnt_inpcb +ffffffff83138ff0 D dt_static_refcnt_rtentry +ffffffff83139060 D dt_static_refcnt_syncache +ffffffff831390d0 D dt_static_refcnt_tdb +ffffffff8313a000 D db_next_free_breakpoint +ffffffff8313a008 D db_breakpoints_inserted +ffffffff8313b000 D db_ed_style +ffffffff8313c000 D db_examine_format +ffffffff8313c078 D db_print_format +ffffffff8313d000 D db_history_size +ffffffff8313d008 D db_history_curr +ffffffff8313d010 D db_history_last +ffffffff8313e000 D db_tab_stop_width +ffffffff8313e004 D db_max_line +ffffffff8313e008 D db_max_width +ffffffff8313e00c D db_radix +ffffffff8313f000 D db_lastsym +ffffffff8313f008 D db_maxoff +ffffffff83140000 D db_vars +ffffffff83140090 D db_evars +ffffffff83141000 D db_watchpoints_inserted +ffffffff83141008 D db_next_free_watchpoint +ffffffff83142000 D db_log +ffffffff83143000 D audio_cd +ffffffff83143020 D audio_lock +ffffffff83144000 D midi_cd +ffffffff83145000 D rnd_cold +ffffffff83145004 D rnd_slowextract +ffffffff83145008 D rnd_timeout +ffffffff83145050 D rndlock +ffffffff83145060 D rndreinit_timeout +ffffffff831450a8 D rnd_task +ffffffff83146000 D video_cd +ffffffff83147000 d rrip_table_analyze +ffffffff831470e0 d rrip_table_getname +ffffffff831471e0 d rrip_table_getsymname +ffffffff83147280 d rrip_table_extref +ffffffff83148000 D nexecs +ffffffff83149000 D elf_note_names +ffffffff8314a000 D ncpus +ffffffff8314a004 D ncpusfound +ffffffff8314b000 D acct_lock +ffffffff8314b010 D acctsuspend +ffffffff8314b014 D acctresume +ffffffff8314b018 D acctrate +ffffffff8314c000 D ticks +ffffffff8314d000 D fhdlk +ffffffff8314e000 D kqueue_klist_lock +ffffffff8314e010 D kq_timeoutmax +ffffffff8314f000 D stackgap_random +ffffffff83150000 D nprocesses +ffffffff83150004 D nthreads +ffffffff83150008 D fork_tfmrate +ffffffff83151000 D kthread_q +ffffffff83152000 D malloc_mtx +ffffffff83152010 D memname +ffffffff831524a0 D sysctl_kmemlock +ffffffff831524b0 D malloc_errintvl +ffffffff83153000 D maxdmap +ffffffff83153008 D maxsmap +ffffffff83153010 D rlimit_lock +ffffffff83154000 D sched_cost_load +ffffffff83154004 D sched_cost_priority +ffffffff83154008 D sched_cost_runnable +ffffffff8315400c D sched_cost_resident +ffffffff83155000 D intrmap_lock +ffffffff83156000 D nosuidcoredump +ffffffff83156008 D sigio_lock +ffffffff83157000 D smr_lock +ffffffff83157010 D smr_logintvl +ffffffff83158000 D startuphook_list +ffffffff83159000 D sysctl_lock +ffffffff83159010 D sysctl_disklock +ffffffff83159020 d openbsd +ffffffff83159024 d arg_max +ffffffff83159028 d posix_version +ffffffff8315902c d ngroups_max +ffffffff83159030 d int_one +ffffffff83159034 d maxpartitions +ffffffff83159038 d raw_part +ffffffff8315903c D allowpowerdown +ffffffff83159040 D hw_power +ffffffff83159044 d byte_order +ffffffff83159048 d page_size +ffffffff8315a000 d thrsleep_queue +ffffffff8315a010 d thrsleep_lock +ffffffff8315b000 D tc_lock +ffffffff8315b010 D windup_mtx +ffffffff8315b020 D timecounter +ffffffff8315b028 D time_second +ffffffff8315b030 d timehands +ffffffff8315b038 d dummy_timecounter +ffffffff8315b088 d th0 +ffffffff8315b120 d th1 +ffffffff8315c000 D itimer_mtx +ffffffff8315c010 D ratecheck_mtx +ffffffff8315c020 D ppsratecheck_mtx +ffffffff8315c030 D resettodr_to +ffffffff8315c078 D resettodr_task +ffffffff8315d000 D timeout_mutex +ffffffff8315e000 D wdog_auto +ffffffff8315f000 D taskq_sys +ffffffff8315f050 D taskq_sys_mp +ffffffff83160000 d update_loadavg.to +ffffffff83160048 D ccpu +ffffffff83160050 d schedcpu.to +ffffffff83160098 D perflevel +ffffffff8316009c D perfpolicy +ffffffff831600a0 D setperf_to +ffffffff83161000 D autoconf_attdet_mtx +ffffffff83161010 D msgs +ffffffff83162000 d evcount_list +ffffffff83162010 d evcount_percpu_init_list +ffffffff83163000 D syslogf_rwlock +ffffffff83163010 D log_mtx +ffffffff83163020 D logstash_in +ffffffff83163028 D logstash_out +ffffffff83163030 D logstash_rwlock +ffffffff83164000 D pool_head +ffffffff83164010 D pool_lock +ffffffff83164020 D pool_debug +ffffffff83164028 D pool_allocator_single +ffffffff83164040 D pool_allocator_multi +ffffffff83164058 D pool_allocator_multi_ni +ffffffff83164070 D pool_gc_tick +ffffffff831640b8 D pool_gc_task +ffffffff83165000 D kprintf_mutex +ffffffff83165010 D db_panic +ffffffff83165014 D splassert_ctl +ffffffff83165018 D v_putc +ffffffff83165020 D printf_flags +ffffffff83166000 D userconf_base +ffffffff83166004 D userconf_maxdev +ffffffff83166008 D userconf_totdev +ffffffff8316600c D userconf_maxlocnames +ffffffff83166010 D userconf_cnt +ffffffff83166014 D userconf_lines +ffffffff83166018 D userconf_histsz +ffffffff83166020 D userconf_cmds +ffffffff83167000 D ftlock +ffffffff83168000 d ppollcollect.poll_errintvl +ffffffff83169000 D ttydefchars +ffffffff83169014 D ttclos +ffffffff8316901b D ttopen +ffffffff83169022 D ttybg +ffffffff83169028 D ttyin +ffffffff8316902e D ttyout +ffffffff83169038 D ttylist_lock +ffffffff8316a000 D linesw +ffffffff8316a280 D nlinesw +ffffffff8316b000 D pt_softc_lock +ffffffff8316c000 d mbstat_boot_boot_cpumem +ffffffff8316c080 D mbstat +ffffffff8316c090 D mclsizes +ffffffff8316c0b0 D m_extref_mtx +ffffffff8316c0c0 D m_pool_allocator +ffffffff8316d000 D somaxconn +ffffffff8316d004 D sominconn +ffffffff8316d008 D sosplice_lock +ffffffff8316e000 D sb_max +ffffffff8316f000 D unp_df_lock +ffffffff8316f010 D unp_gc_lock +ffffffff8316f020 D unp_rights_mtx +ffffffff8316f030 D unp_ino_mtx +ffffffff8316f040 D unp_gc_task +ffffffff8316f070 D unpst_sendspace +ffffffff8316f074 D unpst_recvspace +ffffffff8316f078 D unpsq_sendspace +ffffffff8316f07c D unpsq_recvspace +ffffffff8316f080 D unpdg_sendspace +ffffffff8316f084 D unpdg_recvspace +ffffffff83170000 D doingcache +ffffffff83171000 D maxvfsconf +ffffffff83171010 d vfsconflist +ffffffff83172000 D lockf_lock +ffffffff83172010 D maxlocksperuid +ffffffff83173000 D iftovt_tab +ffffffff83173040 D vttoif_tab +ffffffff83173064 D suid_clear +ffffffff83173068 D vnode_mtx +ffffffff83173078 D vfs_stall_lock +ffffffff83173090 D vtypes +ffffffff831730e0 D vtags +ffffffff83174000 D syncer_maxdelay +ffffffff83174004 D syncdelay +ffffffff83175000 D dosdirtemplate +ffffffff83176000 D ntfs_hashlock +ffffffff83177000 D ntfs_toupper_lock +ffffffff83178000 D art_table_gc_mtx +ffffffff83178010 D art_table_gc_task +ffffffff83178040 D art_node_gc_mtx +ffffffff83178050 D art_node_gc_task +ffffffff83179000 D bpf_bufsize +ffffffff83179004 D bpf_maxbufsize +ffffffff83179008 D bpf_sysctl_lk +ffffffff8317a000 D ifg_head +ffffffff8317a010 D if_cloners_lock +ffffffff8317a020 D if_input_task_locked +ffffffff8317a050 D netlock +ffffffff8317a060 D ifnetlist +ffffffff8317b000 D ifiq_maxlen_drop +ffffffff8317b004 D ifiq_maxlen_return +ffffffff8317c000 D etherbroadcastaddr +ffffffff8317c006 D ether_ipmulticast_min +ffffffff8317c00c D ether_ipmulticast_max +ffffffff8317c012 D ether_ip6multicast_min +ffffffff8317c018 D ether_ip6multicast_max +ffffffff8317d000 D etherip_cloner +ffffffff8317d030 D etherip_list +ffffffff8317e000 D loop_cloner +ffffffff8317f000 D ifmedia_mtx +ffffffff83180000 D ppp_compressors +ffffffff83180020 D ppp_cloner +ffffffff83181000 D ppp_pkt_init +ffffffff83182000 D ppp_bsd_compress +ffffffff83183000 D ppp_deflate +ffffffff83183070 D ppp_deflate_draft +ffffffff83184000 D tun_cloner +ffffffff83184030 D tap_cloner +ffffffff83185000 D bridgeintrq +ffffffff83185038 D bridge_cloner +ffffffff83186000 d veb_cloner +ffffffff83186030 d vport_cloner +ffffffff83187000 D vlan_tagh_lk +ffffffff83187010 D vlan_cloner +ffffffff83187040 D svlan_cloner +ffffffff83188000 D pipex_list_mtx +ffffffff83188010 D pipex_prune +ffffffff83188018 D pipexoutq +ffffffff83188050 d SHAPad2 +ffffffff83189000 D rtmap_gc +ffffffff83189018 D rt_rc +ffffffff8318a000 D rt_labels +ffffffff8318a010 D rtlabel_mtx +ffffffff8318b000 D enc_cloner +ffffffff8318c000 D gre_cloner +ffffffff8318c030 D gre_list +ffffffff8318c040 D mgre_cloner +ffffffff8318c070 D egre_cloner +ffffffff8318c0a0 D nvgre_cloner +ffffffff8318c0d0 D eoip_cloner +ffffffff8318d000 D trunk_cloner +ffffffff8318e000 d aggr_cloner +ffffffff8318f000 d tpmr_cloner +ffffffff83190000 D mpe_cloner +ffffffff83191000 D mpw_cloner +ffffffff83192000 D mpip_cloner +ffffffff83193000 d bpe_cloner +ffffffff83193030 d bpe_lock +ffffffff83194000 D vether_cloner +ffffffff83195000 D pair_cloner +ffffffff83196000 d vxlan_cloner +ffffffff83196030 d vxlan_lock +ffffffff83196040 d vxlan_teps +ffffffff83197000 D underload_interval +ffffffff83197010 D wg_cloner +ffffffff83198000 d stoeplitz_keyseed +ffffffff83199000 D ieee80211_cache_size +ffffffff8319a000 D arpt_prune +ffffffff8319a004 D arpt_keep +ffffffff8319a008 D arpt_down +ffffffff8319a010 D arpinq +ffffffff8319a048 D arp_mtx +ffffffff8319a058 D arp_maxtries +ffffffff8319b000 D ipport_firstauto +ffffffff8319b004 D ipport_lastauto +ffffffff8319b008 D ipport_hifirstauto +ffffffff8319b00c D ipport_hilastauto +ffffffff8319c000 D divert_sendspace +ffffffff8319c004 D divert_recvspace +ffffffff8319c008 D divbhashsize +ffffffff8319d000 D icmptstamprepl +ffffffff8319d004 D icmperrppslim +ffffffff8319d008 D icmp_redirtimeout +ffffffff8319e000 D ipsendredirects +ffffffff8319e004 D ip_defttl +ffffffff8319e008 D ip_mtudisc +ffffffff8319e00c D ip_mtudisc_timeout +ffffffff8319e010 D ipq_mutex +ffffffff8319e020 D ip_maxqueue +ffffffff8319e028 D ipintrq +ffffffff8319e060 d ipsend_task +ffffffff8319e090 d ipsendraw_task +ffffffff8319f000 D ip_mrtproto +ffffffff8319f004 d sin +ffffffff831a0000 D rip_sendspace +ffffffff831a0008 D rip_recvspace +ffffffff831a1000 D tcprexmtthresh +ffffffff831a1004 D tcptv_keep_init +ffffffff831a1008 D tcp_rst_ppslim +ffffffff831a100c D tcp_ackdrop_ppslim +ffffffff831a1010 D tcp_syn_hash_size +ffffffff831a1014 D tcp_syn_cache_limit +ffffffff831a1018 D tcp_syn_bucket_limit +ffffffff831a101c D tcp_syn_use_limit +ffffffff831a2000 D tcp_outflags +ffffffff831a3000 D tcp_timer_mtx +ffffffff831a3010 D tcp_mssdflt +ffffffff831a3014 D tcp_rttdflt +ffffffff831a3018 D tcp_do_rfc1323 +ffffffff831a301c D tcp_do_sack +ffffffff831a3020 D tcp_do_rfc3390 +ffffffff831a3024 D tcp_do_tso +ffffffff831a3028 D tcp_reass_limit +ffffffff831a302c D tcp_sackhole_limit +ffffffff831a4000 D tcp_backoff +ffffffff831a4034 D tcp_totbackoff +ffffffff831a5000 D tcp_sendspace +ffffffff831a5004 D tcp_recvspace +ffffffff831a5008 D tcp_autorcvbuf_inc +ffffffff831a6000 D udpcksum +ffffffff831a6004 D udp_sendspace +ffffffff831a6008 D udp_recvspace +ffffffff831a7000 D ipsec_flows_mtx +ffffffff831a7010 D ipsec_ids_idle +ffffffff831a7014 D ipsec_ids_next_flow +ffffffff831a7018 D ipsec_policy_head +ffffffff831a7028 D ipsp_ids_gc_timeout +ffffffff831a7070 D tdb_sadb_mtx +ffffffff831a7080 d tdb_hashmask +ffffffff831a8000 D ipo_tdb_mtx +ffffffff831a8010 D ipsec_acquire_mtx +ffffffff831a8020 D ipsec_acquire_head +ffffffff831a9000 D ipsec_keep_invalid +ffffffff831a9004 D ipsec_require_pfs +ffffffff831a9008 D ipsec_soft_timeout +ffffffff831a900c D ipsec_exp_timeout +ffffffff831a9010 D ipsec_soft_first_use +ffffffff831a9014 D ipsec_exp_first_use +ffffffff831a9018 D ipsec_expire_acquire +ffffffff831a901c D esp_enable +ffffffff831a9020 D ah_enable +ffffffff831aa000 D udpencap_enable +ffffffff831aa004 D udpencap_port +ffffffff831ab000 D carp_vh_rc +ffffffff831ab020 D carp_sc_rc +ffffffff831ab040 D carp_opts +ffffffff831ab058 D carp_cloner +ffffffff831ab088 d carp_send_na.mcast +ffffffff831ac000 d PADDING +ffffffff831ad000 d PADDING +ffffffff831ae000 d weak_keys +ffffffff831af000 D swcr_id +ffffffff831b0000 D window_inflate +ffffffff831b0004 D window_deflate +ffffffff831b1000 D ghash_update +ffffffff831b2000 D mpls_defttl +ffffffff831b2004 D mpls_mapttl_ip +ffffffff831b3000 D nfskevq_lock +ffffffff831b4000 D nfs_backoff +ffffffff831b4020 D nfs_ptimers +ffffffff831b5000 D desirednfsrvcache +ffffffff831b5010 D nonidempotent +ffffffff831b5070 D nfsv2_repstat +ffffffff831b6000 D nfsv2_type +ffffffff831b6030 D nfsv3_type +ffffffff831b6060 D nv2tov_type +ffffffff831b6080 D nv3tov_type +ffffffff831b60a0 D nfsv3_procid +ffffffff831b6100 D nfsv2_procid +ffffffff831b615c d nfsv3err_getattr +ffffffff831b6170 d nfsv3err_setattr +ffffffff831b6190 d nfsv3err_lookup +ffffffff831b61a4 d nfsv3err_access +ffffffff831b61b0 d nfsv3err_readlink +ffffffff831b61d0 d nfsv3err_read +ffffffff831b61f0 d nfsv3err_write +ffffffff831b6210 d nfsv3err_create +ffffffff831b6230 d nfsv3err_mkdir +ffffffff831b6250 d nfsv3err_symlink +ffffffff831b6270 d nfsv3err_mknod +ffffffff831b6290 d nfsv3err_remove +ffffffff831b62b0 d nfsv3err_rmdir +ffffffff831b62d0 d nfsv3err_rename +ffffffff831b6300 d nfsv3err_link +ffffffff831b6330 d nfsv3err_readdir +ffffffff831b6350 d nfsv3err_readdirplus +ffffffff831b6366 d nfsv3err_fsstat +ffffffff831b6372 d nfsv3err_fsinfo +ffffffff831b637c d nfsv3err_pathconf +ffffffff831b6386 d nfsv3err_commit +ffffffff831b7000 D nfsrv3_procs +ffffffff831b70b8 D nfs_niothreads +ffffffff831b8000 D fragtbl +ffffffff831b9000 D ffs_vtbl +ffffffff831ba000 D softdep_typenames +ffffffff831ba070 D tickdelay +ffffffff831bb000 D dirchk +ffffffff831bc000 D desireddquot +ffffffff831bd000 D amap_list_lock +ffffffff831be000 d uao_list_lock +ffffffff831bf000 d uvmexp_countersboot_boot_cpumem +ffffffff831bf0c0 D uvmexp_counters +ffffffff831bf0c8 D vm_min_kernel_address +ffffffff831c0000 D no_constraint +ffffffff831c1000 d uvm_kmapent_warn_rate +ffffffff831c2000 D maxslp +ffffffff831c3000 D uvmpagerops +ffffffff831c4000 D uvm_swap_data_lock +ffffffff831c4010 D swap_syscall_lock +ffffffff831c4020 D oommtx +ffffffff831c5000 D uvm_doswapencrypt +ffffffff831c6000 D gif_list +ffffffff831c6010 D gif_cloner +ffffffff831c7000 d sec_cloner +ffffffff831c7030 d sec_tdb_gc_mtx +ffffffff831c7040 d sec_tdb_gc_task +ffffffff831c8000 D divert6_sendspace +ffffffff831c8004 D divert6_recvspace +ffffffff831c8008 D divb6hashsize +ffffffff831c9000 d in6_get_hw_ifid.allone +ffffffff831ca000 D ip6_sendredirects +ffffffff831ca004 D ip6_defhlim +ffffffff831ca008 D ip6_defmcasthlim +ffffffff831ca00c D ip6_maxfragpackets +ffffffff831ca010 D ip6_maxfrags +ffffffff831ca014 D ip6_log_interval +ffffffff831ca018 D ip6_hdrnestlimit +ffffffff831ca01c D ip6_dad_count +ffffffff831ca020 D ip6_auto_flowlabel +ffffffff831ca024 D ip6_use_deprecated +ffffffff831ca028 D ip6_neighborgcthresh +ffffffff831ca02c D ip6_maxdynroutes +ffffffff831ca030 D rip6_sendspace +ffffffff831ca038 D rip6_recvspace +ffffffff831ca040 D icmp6_redirtimeout +ffffffff831ca044 D icmp6errppslim +ffffffff831ca048 D ip6_mtudisc_timeout +ffffffff831cb000 D frag6_mutex +ffffffff831cc000 d icmp6_mtudisc_hiwat +ffffffff831cc004 d icmp6_mtudisc_lowat +ffffffff831cd000 d randomtab_20 +ffffffff831ce000 D ip6intrq +ffffffff831ce038 d ip6send_task +ffffffff831cf000 D nd6_timer_next +ffffffff831cf008 D nd6_expire_next +ffffffff831cf010 D nd6_delay +ffffffff831cf014 D nd6_umaxtries +ffffffff831cf018 D nd6_mmaxtries +ffffffff831cf01c D nd6_gctimer +ffffffff831cf020 D nd6_maxndopt +ffffffff831cf028 D nd6_mtx +ffffffff831cf038 D nd6_list +ffffffff831d0000 d dadq +ffffffff831d1000 D pfkeyv2_mtx +ffffffff831d1010 d pfkeyv2_seq +ffffffff831d2000 D sadb_exts_allowed_in +ffffffff831d2090 D sadb_exts_required_in +ffffffff831d3000 D cold +ffffffff831d4000 D bdevsw +ffffffff831d4460 D nblkdev +ffffffff831d4470 D cdevsw +ffffffff831d6400 D nchrdev +ffffffff831d6404 D mem_no +ffffffff831d6408 D swapdev +ffffffff831d6410 D constab +ffffffff831d7000 D machine +ffffffff831d7008 D cpu_idle_cycle_fcn +ffffffff831d7010 D lid_action +ffffffff831d7014 D pwr_action +ffffffff831d7018 D isa_constraint +ffffffff831d7028 D dma_constraint +ffffffff831d7040 D uvm_md_constraints +ffffffff831d7058 D delay_func +ffffffff831d7060 D initclock_func +ffffffff831d7068 D startclock_func +ffffffff831d7070 D bootinfo_size +ffffffff831d7074 D waittime +ffffffff831d7078 D dumpmag +ffffffff831d8000 D tsc_rdtsc +ffffffff831d8008 D tsc_timecounter +ffffffff831d8058 D tsc_is_synchronized +ffffffff831d9000 D local_apic +ffffffff831d9020 D lapic_id +ffffffff831d9080 D lapic_tpr +ffffffff831d90a0 d lapic_ppr +ffffffff831d9100 d lapic_isr +ffffffff831da000 D warn_once +ffffffff831db000 d errata +ffffffff831dc000 D cpu_ucode_mtx +ffffffff831dd000 D mem_owner_bios +ffffffff831dd008 D mrops +ffffffff831dd028 D mtrrmask +ffffffff831dd030 D mtrrtomrt +ffffffff831de000 D pmap_pg_wc +ffffffff831de008 D pmaps_lock +ffffffff831de018 d pmap_maxkvaddr +ffffffff831df000 D kv_physwait +ffffffff831e0000 D fpu_save_len +ffffffff831e1000 D i8259_pic +ffffffff831e2000 D softintr_pic +ffffffff831e3000 D ipifunc +ffffffff831e4000 D setperf_mp_mutex +ffffffff831e5000 D db_Grp6 +ffffffff831e5040 D db_Grp7 +ffffffff831e5100 D db_Grp8 +ffffffff831e5140 D db_Grp9 +ffffffff831e5200 D db_GrpA +ffffffff831e5240 D db_GrpB +ffffffff831e5280 D db_GrpC +ffffffff831e52c0 D db_inst_0f0x +ffffffff831e5440 D db_inst_0f2x +ffffffff831e55c0 D db_inst_0f3x +ffffffff831e5740 D db_inst_0f8x +ffffffff831e58c0 D db_inst_0f9x +ffffffff831e5a40 D db_inst_0fax +ffffffff831e5bc0 D db_inst_0fbx +ffffffff831e5d40 D db_inst_0fcx +ffffffff831e5ec0 D db_inst_0f +ffffffff831e5f40 D db_Esc92 +ffffffff831e5f80 D db_Esc94 +ffffffff831e5fc0 D db_Esc95 +ffffffff831e6000 D db_Esc96 +ffffffff831e6040 D db_Esc97 +ffffffff831e6080 D db_Esca5 +ffffffff831e60c0 D db_Escb4 +ffffffff831e6100 D db_Esce3 +ffffffff831e6140 D db_Escf4 +ffffffff831e6180 D db_Esc8 +ffffffff831e6240 D db_Esc9 +ffffffff831e6300 D db_Esca +ffffffff831e63c0 D db_Escb +ffffffff831e6480 D db_Escc +ffffffff831e6540 D db_Escd +ffffffff831e6600 D db_Esce +ffffffff831e66c0 D db_Escf +ffffffff831e6780 D db_Esc_inst +ffffffff831e67c0 D db_Grp1 +ffffffff831e6800 D db_Grp2 +ffffffff831e6840 D db_Grp3 +ffffffff831e6900 D db_Grp4 +ffffffff831e69c0 D db_Grp5 +ffffffff831e6a80 D db_inst_table +ffffffff831e8280 D db_bad_inst +ffffffff831e82a0 D db_index_reg_16 +ffffffff831e82e0 D db_reg +ffffffff831e84e0 D db_seg_reg +ffffffff831e8520 D db_lengths +ffffffff831e9000 D db_regs +ffffffff831e91e0 D db_eregs +ffffffff831e91f0 D db_reg_args +ffffffff831ea000 D timer_mutex +ffffffff831ea010 d i8254_timecounter +ffffffff831eb000 D spleen8x16 +ffffffff831eb058 D spleen12x24 +ffffffff831eb0b0 D spleen16x32 +ffffffff831eb108 D spleen32x64 +ffffffff831eb160 d builtin_fonts +ffffffff831eb1e0 d wsfont_add.cookiegen +ffffffff831eb1f0 d spleen8x16_data +ffffffff831ebff0 d spleen12x24_data +ffffffff831ee9f0 d spleen16x32_data +ffffffff831f21f0 d spleen32x64_data +ffffffff83201000 D nsphy_cd +ffffffff83202000 D nsphyter_cd +ffffffff83203000 D gentbi_cd +ffffffff83204000 D qsphy_cd +ffffffff83205000 D inphy_cd +ffffffff83206000 D iophy_cd +ffffffff83207000 D eephy_cd +ffffffff83208000 D exphy_cd +ffffffff83209000 D rlphy_cd +ffffffff8320a000 D lxtphy_cd +ffffffff8320b000 D luphy_cd +ffffffff8320c000 D mtdphy_cd +ffffffff8320d000 D icsphy_cd +ffffffff8320e000 D sqphy_cd +ffffffff8320f000 D tqphy_cd +ffffffff83210000 D ukphy_cd +ffffffff83211000 D dcphy_cd +ffffffff83212000 D bmtphy_cd +ffffffff83213000 D brgphy_cd +ffffffff83214000 D xmphy_cd +ffffffff83215000 D amphy_cd +ffffffff83216000 D acphy_cd +ffffffff83217000 D nsgphy_cd +ffffffff83218000 D urlphy_cd +ffffffff83219000 D rgephy_cd +ffffffff8321a000 D ciphy_cd +ffffffff8321b000 D ipgphy_cd +ffffffff8321c000 D etphy_cd +ffffffff8321d000 D jmphy_cd +ffffffff8321e000 D atphy_cd +ffffffff8321f000 D scsi_autoconf +ffffffff8321f008 D scsibus_cd +ffffffff83220000 D cd_cd +ffffffff83221000 D ch_cd +ffffffff83221020 D chquirks +ffffffff83222000 D sd_cd +ffffffff83223000 D st_cd +ffffffff83224000 D uk_cd +ffffffff83225000 D safte_cd +ffffffff83226000 D ses_cd +ffffffff83227000 D sym_cd +ffffffff83227020 D sym_devices +ffffffff83227070 D asym_devices +ffffffff83228000 D rdac_cd +ffffffff83228020 D rdac_devices +ffffffff83229000 D emc_cd +ffffffff83229020 D emc_devices +ffffffff8322a000 D hds_cd +ffffffff8322a020 D hds_devices +ffffffff8322b000 D atapiscsi_cd +ffffffff8322c000 D wd_cd +ffffffff8322c020 d wddumpmulti +ffffffff8322d000 D mainbus_cd +ffffffff8322d020 D mba_iba +ffffffff8322e000 D bios_cd +ffffffff8322e020 D smbios_uninfo +ffffffff8322f000 D mpbios_cd +ffffffff8322f020 d mp_conf +ffffffff8322f070 d extint_bus +ffffffff8322f0a0 d smi_bus +ffffffff8322f0d0 d nmi_bus +ffffffff83230000 D cpu_info_full_primary +ffffffff83233000 D cpu_info_list +ffffffff83233008 D mp_cpu_funcs +ffffffff83233020 D cpu_cd +ffffffff83233040 D cpu_info +ffffffff83234000 D local_pic +ffffffff83234090 D lapic_readreg +ffffffff83234098 D lapic_writereg +ffffffff832340a0 D x86_ipi +ffffffff83235000 D ioapic_cold +ffffffff83235008 D ioapic_cd +ffffffff83236000 D efifb_std_descr +ffffffff83236030 D efifb_descrs +ffffffff83236038 D efifb_accessops +ffffffff83236098 D efifb_cd +ffffffff83237000 D pvbus_cd +ffffffff83237020 D pvbus_types +ffffffff832370e0 D pvbus_dma_tag +ffffffff83238000 D pvclock_cd +ffffffff83238020 D pvclock_timecounter +ffffffff83239000 D vmt_tclo_rpc +ffffffff832390d0 D vmt_cd +ffffffff8323a000 D xen_cd +ffffffff8323a020 D xen_bus_dma_tag +ffffffff8323b000 D xnf_cd +ffffffff8323c000 D xbf_cd +ffffffff8323d000 D hv_msg_dispatch +ffffffff8323d110 D hv_timecounter +ffffffff8323d160 D hyperv_cd +ffffffff8323e000 d hv_ic_devs +ffffffff8323f000 D hvn_cd +ffffffff83240000 D hvs_cd +ffffffff83241000 D virtio_cd +ffffffff83242000 D vio_cd +ffffffff83243000 D vioblk_cd +ffffffff83244000 D viomb_cd +ffffffff83245000 D viornd_cd +ffffffff83246000 D vioscsi_cd +ffffffff83247000 D vmmci_cd +ffffffff83248000 D pci_cd +ffffffff83249000 D arc_fw_hdr +ffffffff83249008 D arc_cd +ffffffff8324a000 D jmb_cd +ffffffff8324b000 D mfii_cd +ffffffff8324c000 D ips_cd +ffffffff8324d000 D eap_cd +ffffffff8324e000 D auacer_cd +ffffffff8324f000 D auich_cd +ffffffff83250000 D azalia_cd +ffffffff83251000 D envy_cd +ffffffff83251020 D envy_matchids +ffffffff83251030 D envy_rates +ffffffff832510b0 D ak4524_dac +ffffffff832510d8 D ak4524_adc +ffffffff83251100 D ak4358_dac +ffffffff83251128 D ak5365_adc +ffffffff83251150 D unkenvy_codec +ffffffff83251180 D envy_cards +ffffffff832513f0 D envy_cards_ht +ffffffff83251600 d julia_eeprom +ffffffff83252000 D emu_cd +ffffffff83253000 D auixp_cd +ffffffff83254000 D clcs_cd +ffffffff83255000 D yds_cd +ffffffff83256000 D auvia_cd +ffffffff83257000 D qle_cd +ffffffff83258000 D mpii_cd +ffffffff83259000 D aq_cd +ffffffff8325a000 D de_cd +ffffffff8325b000 D pcn_cd +ffffffff8325c000 D wdc_sii3114_vtbl +ffffffff8325c038 D wdc_pdc203xx_vtbl +ffffffff8325c070 D wdc_svwsata_vtbl +ffffffff8325c0a8 D pciide_cd +ffffffff8325c0d0 d sis_hostbr_type +ffffffff8325d000 D ppb_cd +ffffffff8325e000 D vr_cd +ffffffff8325e020 D vr_devices +ffffffff8325f000 D txp_cd +ffffffff83260000 D bt848_card_signature +ffffffff83261000 D bktr_cd +ffffffff83262000 D em_cd +ffffffff83263000 D ixgb_cd +ffffffff83264000 D ix_cd +ffffffff83264020 D ixgbe_smart_speed +ffffffff83264024 D ixgbe_enable_msix +ffffffff83265000 D ixl_cd +ffffffff83265020 d ixl_sff_lock +ffffffff83266000 D xge_cd +ffffffff83267000 D thtc_cd +ffffffff83267020 D tht_cd +ffffffff83267040 D tht_txt_desc +ffffffff83267068 D tht_rxf_desc +ffffffff83267090 D tht_rxd_desc +ffffffff832670b8 D tht_txf_desc +ffffffff83268000 D myx_cd +ffffffff83269000 D oce_cd +ffffffff8326a000 D dc_devs +ffffffff8326b000 D cas_cd +ffffffff8326c000 D sis_cd +ffffffff8326d000 D se_cd +ffffffff8326e000 D mbg_cd +ffffffff8326f000 D cbb_cd +ffffffff8326f020 D yc_chipsets +ffffffff8326f1b0 d pccbb_funcs +ffffffff8326f1e0 d pccbb_pcmcia_funcs +ffffffff83270000 D skc_cd +ffffffff83270020 D sk_cd +ffffffff83271000 D mskc_cd +ffffffff83271020 D msk_cd +ffffffff83272000 D puc_cd +ffffffff83273000 D puc_ndevs +ffffffff83274000 D iwi_cd +ffffffff83275000 D wpi_cd +ffffffff83276000 D iwn_cd +ffffffff83277000 D iwm_cd +ffffffff83278000 D iwx_cd +ffffffff83279000 D cmpci_cd +ffffffff8327a000 D iha_cd +ffffffff8327b000 D pcscp_cd +ffffffff8327b020 D pcscp_glue +ffffffff8327c000 D bge_cd +ffffffff8327d000 D bnx_firmwares +ffffffff8327d160 D bnx_rv2ps +ffffffff8327d1c0 D bnx_cd +ffffffff8327d1e0 d flash_5709 +ffffffff8327d210 d flash_table +ffffffff8327e000 D vge_cd +ffffffff8327f000 D stge_cd +ffffffff83280000 D nfe_cd +ffffffff83281000 D et_cd +ffffffff83282000 D jme_cd +ffffffff83283000 D age_cd +ffffffff83284000 D alc_dma_burst +ffffffff83284020 D alc_cd +ffffffff83285000 D ale_cd +ffffffff83286000 D amdpm_cd +ffffffff83286020 d amdpm_timecounter +ffffffff83287000 D bce_cd +ffffffff83288000 D rtwn_cd +ffffffff83289000 d ral_rt2560_opns +ffffffff83289028 d ral_rt2661_opns +ffffffff83289050 d ral_rt2860_opns +ffffffff8328a000 D piixpm_cd +ffffffff8328b000 D vic_cd +ffffffff8328c000 D vmx_cd +ffffffff8328d000 D vmwpvs_cd +ffffffff8328e000 D lii_cd +ffffffff8328f000 D ichiic_cd +ffffffff83290000 D viapm_cd +ffffffff83290020 d viapm_timecounter +ffffffff83291000 D amdiic_cd +ffffffff83292000 D nviic_cd +ffffffff83293000 D kate_cd +ffffffff83294000 D km_cd +ffffffff83295000 D cpu_model_offsets +ffffffff83295070 D ksmn_cd +ffffffff83296000 D itherm_cd +ffffffff83297000 D pchtemp_cd +ffffffff83298000 D xspd_cd +ffffffff83299000 D virtio_pci_ops +ffffffff8329a000 D bwfm_pci_buscore_ops +ffffffff8329a030 D bwfm_pci_bus_ops +ffffffff8329a058 D bwfm_pci_msgbuf_ops +ffffffff8329b000 D bnxt_cd +ffffffff8329c000 D mcx_cd +ffffffff8329d000 D iavf_cd +ffffffff8329e000 D rge_cd +ffffffff8329f000 D igc_cd +ffffffff832a0000 D ngbe_cd +ffffffff832a1000 D agp_cd +ffffffff832a2000 D intagp_cd +ffffffff832a2020 D agp_i810_methods +ffffffff832a3000 D reservation_ww_class +ffffffff832a4000 d bridge_lock +ffffffff832a4010 d bridge_list +ffffffff832a5000 d drm_connector_enum_list +ffffffff832a51f8 d connector_list_lock +ffffffff832a5208 d connector_list +ffffffff832a6000 d kernel_fb_helper_list +ffffffff832a6010 d kernel_fb_helper_lock +ffffffff832a7000 D drm_global_mutex +ffffffff832a8000 D i2c_bit_algo +ffffffff832a8010 d drm_fence_context_count +ffffffff832a8018 d dma_fence_stub_mtx +ffffffff832a8028 D wait_bit_mtx +ffffffff832a8038 D shrinkers +ffffffff832a9000 d crtc_ww_class +ffffffff832aa000 d panel_lock +ffffffff832aa010 d panel_list +ffffffff832ab000 d ttm_global_mutex +ffffffff832ac000 D intel_bbops +ffffffff832ad000 d i915_sys_placement +ffffffff832ad020 d i915_ttm_bo_driver +ffffffff832ae000 d mchdev_lock +ffffffff832af000 D inteldrm_stdscreen +ffffffff832af030 D inteldrm_scrlist +ffffffff832af038 D inteldrm_screenlist +ffffffff832af048 D inteldrm_accessops +ffffffff832af0a8 D inteldrm_cd +ffffffff832b0000 d capture_mutex +ffffffff832b1000 d mitigations +ffffffff832b2000 D i915_modparams +ffffffff832b3000 d schedule_lock +ffffffff832b4000 d unbind_fence_ops +ffffffff832b5000 D intel_graphics_stolen_res +ffffffff832b6000 D btc_valid_sclk +ffffffff832b7000 d evergreen_cs_packet_parse_vline.vline_start_end +ffffffff832b7020 d evergreen_cs_packet_parse_vline.vline_status +ffffffff832b8000 d r600_cs_packet_parse_vline.vline_start_end +ffffffff832b8008 d r600_cs_packet_parse_vline.vline_status +ffffffff832b9000 d r100_asic +ffffffff832b92e0 d r200_asic +ffffffff832b95c0 d r300_asic_pcie +ffffffff832b98a0 d r300_asic +ffffffff832b9b80 d r420_asic +ffffffff832b9e60 d rs400_asic +ffffffff832ba140 d rs600_asic +ffffffff832ba420 d rs690_asic +ffffffff832ba700 d rv515_asic +ffffffff832ba9e0 d r520_asic +ffffffff832bacc0 d r600_asic +ffffffff832bafa0 d rv6xx_asic +ffffffff832bb280 d rs780_asic +ffffffff832bb560 d rv770_asic +ffffffff832bb840 d evergreen_asic +ffffffff832bbb20 d sumo_asic +ffffffff832bbe00 d btc_asic +ffffffff832bc0e0 d cayman_asic +ffffffff832bc3c0 d trinity_asic +ffffffff832bc6a0 d si_asic +ffffffff832bc980 d ci_asic +ffffffff832bcc60 d kv_asic +ffffffff832bd000 d dce6_funcs +ffffffff832bd018 d dce6_hdmi_funcs +ffffffff832bd088 d dce6_dp_funcs +ffffffff832bd0f8 d dce4_funcs +ffffffff832bd110 d dce4_hdmi_funcs +ffffffff832bd180 d dce4_dp_funcs +ffffffff832bd1f0 d dce32_funcs +ffffffff832bd208 d dce32_hdmi_funcs +ffffffff832bd278 d dce32_dp_funcs +ffffffff832bd2e8 d r600_funcs +ffffffff832bd300 d r600_hdmi_funcs +ffffffff832be000 D radeon_modeset +ffffffff832be004 D radeon_dynclks +ffffffff832be008 D radeon_agpmode +ffffffff832be00c D radeon_gart_size +ffffffff832be010 D radeon_tv +ffffffff832be014 D radeon_audio +ffffffff832be018 D radeon_pcie_gen2 +ffffffff832be01c D radeon_msi +ffffffff832be020 D radeon_lockup_timeout +ffffffff832be024 D radeon_dpm +ffffffff832be028 D radeon_aspm +ffffffff832be02c D radeon_runtime_pm +ffffffff832be030 D radeon_vm_size +ffffffff832be034 D radeon_vm_block_size +ffffffff832be038 D radeon_use_pflipirq +ffffffff832be03c D radeon_bapm +ffffffff832be040 D radeon_backlight +ffffffff832be044 D radeon_auxch +ffffffff832be048 D radeon_uvd +ffffffff832be04c D radeon_vce +ffffffff832be050 D radeon_si_support +ffffffff832be054 D radeon_cik_support +ffffffff832be058 D radeondrm_cd +ffffffff832be078 D radeondrm_stdscreen +ffffffff832be0a8 D radeondrm_scrlist +ffffffff832be0b0 D radeondrm_screenlist +ffffffff832be0c0 D radeondrm_accessops +ffffffff832bf000 D radeon_bbops +ffffffff832c0000 d radeon_bo_driver +ffffffff832c1000 d verde_pg_init +ffffffff832c2000 d cac_weights_pitcairn +ffffffff832c24d0 d cac_weights_oland +ffffffff832c3000 d aldebaran_mode2_handler +ffffffff832c4000 d amdgpu_vbios_version_attrs +ffffffff832c5000 D amdgpu_asic_name +ffffffff832c6000 D amdgpu_gart_size +ffffffff832c6004 D amdgpu_gtt_size +ffffffff832c6008 D amdgpu_moverate +ffffffff832c600c D amdgpu_audio +ffffffff832c6010 D amdgpu_pcie_gen2 +ffffffff832c6014 D amdgpu_msi +ffffffff832c6018 D amdgpu_dpm +ffffffff832c601c D amdgpu_fw_load_type +ffffffff832c6020 D amdgpu_aspm +ffffffff832c6024 D amdgpu_runtime_pm +ffffffff832c6028 D amdgpu_ip_block_mask +ffffffff832c602c D amdgpu_bapm +ffffffff832c6030 D amdgpu_vm_size +ffffffff832c6034 D amdgpu_vm_fragment_size +ffffffff832c6038 D amdgpu_vm_block_size +ffffffff832c603c D amdgpu_vm_update_mode +ffffffff832c6040 D amdgpu_dc +ffffffff832c6044 D amdgpu_sched_jobs +ffffffff832c6048 D amdgpu_sched_hw_submission +ffffffff832c6050 D amdgpu_cg_mask +ffffffff832c6058 D amdgpu_pg_mask +ffffffff832c605c D amdgpu_sdma_phase_quantum +ffffffff832c6060 D amdgpu_pp_feature_mask +ffffffff832c6064 D amdgpu_lbpw +ffffffff832c6068 D amdgpu_compute_multipipe +ffffffff832c606c D amdgpu_gpu_recovery +ffffffff832c6070 D amdgpu_smu_pptable_id +ffffffff832c6074 D amdgpu_dc_feature_mask +ffffffff832c6078 D amdgpu_async_gfx_ring +ffffffff832c607c D amdgpu_discovery +ffffffff832c6080 D amdgpu_noretry +ffffffff832c6084 D amdgpu_force_asic_type +ffffffff832c6088 D amdgpu_tmz +ffffffff832c608c D amdgpu_reset_method +ffffffff832c6090 D amdgpu_num_kcq +ffffffff832c6094 D amdgpu_use_xgmi_p2p +ffffffff832c6098 D amdgpu_sg_display +ffffffff832c60a0 D mgpu_info +ffffffff832c6250 D amdgpu_ras_enable +ffffffff832c6254 D amdgpu_ras_mask +ffffffff832c6258 D amdgpu_bad_page_threshold +ffffffff832c625c D amdgpu_backlight +ffffffff832c6260 D amdgpu_cd +ffffffff832c6280 D amdgpu_stdscreen +ffffffff832c62b0 D amdgpu_scrlist +ffffffff832c62b8 D amdgpu_screenlist +ffffffff832c62c8 D amdgpu_accessops +ffffffff832c7000 d amdgpu_gtt_mgr_attributes +ffffffff832c8000 D amdgpu_bbops +ffffffff832c9000 D soc15_ih_clientid_name +ffffffff832ca000 D ras_error_string +ffffffff832ca030 D ras_block_string +ffffffff832ca0c0 D ras_mca_block_string +ffffffff832cb000 d amdgpu_bo_driver +ffffffff832cc000 d amdgpu_vram_mgr_attributes +ffffffff832cd000 D amdgpu_xgmi_hive_type +ffffffff832cd008 d xgmi_mutex +ffffffff832cd018 D xgmi_ras_hw_ops +ffffffff832cd058 D xgmi_ras +ffffffff832ce000 d gfx_v9_0_ras +ffffffff832cf000 D gfx_v9_4_ras +ffffffff832d0000 D gfx_v9_4_2_ras_ops +ffffffff832d0040 D gfx_v9_4_2_ras +ffffffff832d1000 D hdp_v4_0_ras_hw_ops +ffffffff832d1040 D hdp_v4_0_ras +ffffffff832d2000 d jpeg_v2_6_ras +ffffffff832d3000 D mca_v3_0_mp0_ras +ffffffff832d3058 D mca_v3_0_mp1_ras +ffffffff832d30b0 D mca_v3_0_mpio_ras +ffffffff832d4000 D mmhub_v1_0_ras_hw_ops +ffffffff832d4040 D mmhub_v1_0_ras +ffffffff832d5000 D mmhub_v1_7_ras_hw_ops +ffffffff832d5040 D mmhub_v1_7_ras +ffffffff832d6000 D mmhub_v9_4_ras +ffffffff832d7000 D nbio_v7_4_ras +ffffffff832d8000 d sriov_sc_video_codecs_encode +ffffffff832d8010 d sriov_sc_video_codecs_decode +ffffffff832d8020 d sriov_sc_video_codecs_encode_array +ffffffff832d8050 d sriov_sc_video_codecs_decode_array +ffffffff832d9000 d sdma_v4_0_ras +ffffffff832da000 D sdma_v4_4_ras +ffffffff832db000 d sienna_cichlid_mode2_handler +ffffffff832dc000 D umc_v6_1_ras +ffffffff832dd000 D umc_v6_7_ras +ffffffff832de000 D umc_v8_10_ras +ffffffff832df000 D umc_v8_7_ras +ffffffff832e0000 d vcn_v2_6_ras +ffffffff832e1000 d amdgpu_dm_mode_config_helperfuncs +ffffffff832e1010 d dm_atomic_state_funcs +ffffffff832e2000 d construct_integrated_info.result +ffffffff832e2004 d bios_parser_get_firmware_info.result +ffffffff832e3000 d dce_funcs +ffffffff832e4000 d dce110_funcs +ffffffff832e5000 d dce112_funcs +ffffffff832e6000 d dce120_funcs +ffffffff832e7000 d rv1_clk_funcs +ffffffff832e7088 d rv1_clk_internal_funcs +ffffffff832e8000 d rv2_clk_internal_funcs +ffffffff832e9000 d dcn2_funcs +ffffffff832ea000 D dcn201_funcs +ffffffff832eb000 d dcn21_funcs +ffffffff832eb088 d rn_bw_params +ffffffff832ec000 D dcn3_fpga_funcs +ffffffff832ec088 d dcn3_funcs +ffffffff832ed000 d vg_funcs +ffffffff832ed088 d dummy_clocks +ffffffff832ed1b8 d vg_bw_params +ffffffff832ee000 d dcn31_bw_params +ffffffff832ee2a0 d dcn31_funcs +ffffffff832ef000 d dcn314_bw_params +ffffffff832ef2a0 d dcn314_funcs +ffffffff832f0000 d dcn315_funcs +ffffffff832f0088 d dcn315_bw_params +ffffffff832f1000 d dcn316_funcs +ffffffff832f1088 d dcn316_bw_params +ffffffff832f2000 d dcn32_funcs +ffffffff832f3000 d dcn10_dpp_cap +ffffffff832f4000 D aperture_default_system +ffffffff832f5000 d dcn20_dpp_cap +ffffffff832f5010 d dcn20_dpp_funcs +ffffffff832f6000 d dcn20_hubp_funcs +ffffffff832f7000 d dcn20_opp_funcs +ffffffff832f8000 d dcn20_tg_funcs +ffffffff832f9000 d dcn201_dpp_funcs +ffffffff832f9110 d dcn201_dpp_cap +ffffffff832fa000 d dcn201_hubp_funcs +ffffffff832fb000 d dcn201_opp_funcs +ffffffff832fc000 d dcn201_tg_funcs +ffffffff832fd000 D dcn201_ip +ffffffff832fd1b8 D dcn201_soc +ffffffff832fdb88 d dcn201_res_pool_funcs +ffffffff832fe000 d dcn21_hubp_funcs +ffffffff832ff000 d dcn30_afmt_funcs +ffffffff83300000 d dcn30_dpp_cap +ffffffff83300010 d dcn30_dpp_funcs +ffffffff83301000 d dcn30_hubp_funcs +ffffffff83302000 d dcn30_tg_funcs +ffffffff83303000 d dcn30_vpg_funcs +ffffffff83304000 d res_cap_dcn301 +ffffffff83304040 d dcn301_res_pool_funcs +ffffffff83305000 d dcn302_res_pool_funcs +ffffffff83306000 d dcn303_res_pool_funcs +ffffffff83307000 d dcn31_afmt_funcs +ffffffff83308000 d dcn31_apg_funcs +ffffffff83309000 d dcn31_hpo_dp_link_encoder_funcs +ffffffff8330a000 d dcn31_hubp_funcs +ffffffff8330b000 d dcn31_tg_funcs +ffffffff8330c000 d dcn31_res_pool_funcs +ffffffff8330d000 d dcn31_vpg_funcs +ffffffff8330e000 d dcn314_tg_funcs +ffffffff8330f000 d dcn314_res_pool_funcs +ffffffff83310000 d dcn315_res_pool_funcs +ffffffff83311000 d dcn316_res_pool_funcs +ffffffff83312000 d dcn32_dpp_funcs +ffffffff83312110 d dcn32_dpp_cap +ffffffff83313000 d dcn32_hpo_dp_link_encoder_funcs +ffffffff83314000 d dcn32_hubp_funcs +ffffffff83315000 d dcn32_tg_funcs +ffffffff83316000 d dcn32_res_pool_funcs +ffffffff83317000 d dcn321_res_pool_funcs +ffffffff83318000 D dcn1_0_ip +ffffffff833181b8 D dcn1_0_soc +ffffffff83319000 D dcn2_0_ip +ffffffff833191b8 D dcn2_0_nv14_ip +ffffffff83319370 D dcn2_0_soc +ffffffff83319d40 D dcn2_0_nv14_soc +ffffffff8331a710 D dcn2_1_ip +ffffffff8331a8c8 D dcn2_1_soc +ffffffff8331b298 D ddr4_wm_table_gs +ffffffff8331b358 D lpddr4_wm_table_gs +ffffffff8331b418 D lpddr4_wm_table_with_disabled_ppt +ffffffff8331b4d8 D ddr4_wm_table_rn +ffffffff8331b598 D ddr4_1R_wm_table_rn +ffffffff8331b658 D lpddr4_wm_table_rn +ffffffff8331c000 D dcn3_0_ip +ffffffff8331c1b8 D dcn3_0_soc +ffffffff8331d000 D dcn3_01_ip +ffffffff8331d1b8 D dcn3_01_soc +ffffffff8331db88 D ddr4_wm_table +ffffffff8331dc48 D lpddr5_wm_table +ffffffff8331e000 D dcn3_02_ip +ffffffff8331e1b8 D dcn3_02_soc +ffffffff8331f000 D dcn3_03_ip +ffffffff8331f1b8 D dcn3_03_soc +ffffffff83320000 D dcn3_1_ip +ffffffff833201b8 D dcn3_15_ip +ffffffff83320370 D dcn3_16_ip +ffffffff83320528 d dcn3_15_soc +ffffffff83320ef8 d dcn3_1_soc +ffffffff833218c8 d dcn3_16_soc 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+ffffffff83330ef0 d smu_v13_0_7_clk_map +ffffffff83331000 d yellow_carp_table_map +ffffffff83331080 d yellow_carp_message_map +ffffffff83331ad0 d yellow_carp_feature_mask_map +ffffffff83332000 D pci_conf_lock +ffffffff83332010 D pci_bus_dma_tag +ffffffff83332088 D msi_pic +ffffffff83332118 D msix_pic +ffffffff83333000 D pchb_cd +ffffffff83334000 D amas_cd +ffffffff83335000 D cardslot_cd +ffffffff83336000 D cardbus_cd +ffffffff83337000 d csdevs +ffffffff83338000 d ral_rt2560_opns +ffffffff83338028 d ral_rt2661_opns +ffffffff83338050 d ral_rt2860_opns +ffffffff83339000 D pcmcia_cd +ffffffff8333a000 D pcmcia_3cxem556_func0 +ffffffff8333a0b8 D pcmcia_3cxem556_func0_cfe0 +ffffffff8333a158 D pcmcia_megahertz_xjem1144_func0 +ffffffff8333a210 D pcmcia_megahertz_xjem1144_func0_cfe0 +ffffffff8333a2b0 d pcmcia_3cxem556_func1 +ffffffff8333a368 d pcmcia_3cxem556_func1_cfe0 +ffffffff8333a408 d pcmcia_megahertz_xjem1144_func1 +ffffffff8333a4c0 d pcmcia_megahertz_xjem1144_func1_cfe0 +ffffffff8333a560 d pcmcia_sierra_a555_func1 +ffffffff8333a618 d pcmcia_sierra_a555_func1_cfe0 +ffffffff8333a6b8 d pcmcia_sveclancard_func0 +ffffffff8333a770 d pcmcia_sveclancard_func0_cfe0 +ffffffff8333b000 D ep_pcmcia_prod +ffffffff8333c000 D aic_pcmcia_prod +ffffffff8333d000 D com_pcmcia_prod +ffffffff8333e000 D wdc_pcmcia_pr +ffffffff8333f000 D sm_pcmcia_prod +ffffffff83340000 D xe_cd +ffffffff83341000 D pcib_cd +ffffffff83342000 D amdpcib_cd +ffffffff83343000 D tcpcib_cd +ffffffff83344000 D aapic_cd +ffffffff83345000 D hme_cd +ffffffff83346000 D isa_cd +ffffffff83347000 D isadma_cd +ffffffff83348000 D fdc_cd +ffffffff83349000 D fd_types +ffffffff833491f8 D fd_cd +ffffffff8334a000 D mpu_cd +ffffffff8334b000 D pcppi_cd +ffffffff8334c000 D spkr_cd +ffffffff8334d000 D wbsio_cd +ffffffff8334e000 D schsio_cd +ffffffff8334f000 D it_cd +ffffffff83350000 D uguru_cd +ffffffff83351000 D aps_cd +ffffffff83352000 D isa_bus_dma_tag +ffffffff83353000 D wsdisplay_cd +ffffffff83353020 D wsdisplay_cons +ffffffff83353058 D wsdisplay_defaultscreens +ffffffff83354000 D wskbd_cd +ffffffff83354020 D wskbd_default_bell_data +ffffffff83354030 D wskbd_default_keyrepeat_data +ffffffff83354040 D wskbd_srcops +ffffffff83355000 d compose_tab +ffffffff83356000 D wsmouse_cd +ffffffff83356020 D wsmouse_srcops +ffffffff83357000 D wsmux_srcops +ffffffff83357030 D wsmux_tree_lock +ffffffff83358000 D vt100_output +ffffffff83359000 D pckbd_cd +ffffffff8335a000 D pms_cd +ffffffff8335a020 d synaptics_params +ffffffff8335a030 d alps_params +ffffffff8335b000 D skgpio_cd +ffffffff8335c000 D pctr_conf_lock +ffffffff8335d000 D ukbd_keymapdata +ffffffff8335e000 D usbrev_str +ffffffff8335e030 D usb_cd +ffffffff8335f000 d usbd_ratecheck.errinterval +ffffffff83360000 D uhub_cd +ffffffff83361000 D uaudio_cd +ffffffff83362000 D uvideo_ctrls +ffffffff833622d8 D uvideo_cd +ffffffff83363000 D utvfu_norm_params +ffffffff83363030 D utvfu_cd +ffffffff83364000 D udl_reg_vals_640x480_60 +ffffffff83364020 D udl_reg_vals_640x480_67 +ffffffff83364040 D udl_reg_vals_640x480_72 +ffffffff83364060 D udl_reg_vals_640x480_75 +ffffffff83364080 D udl_reg_vals_800x480_61 +ffffffff833640a0 D udl_reg_vals_800x600_56 +ffffffff833640c0 D udl_reg_vals_800x600_60 +ffffffff833640e0 D udl_reg_vals_800x600_72 +ffffffff83364100 D udl_reg_vals_800x600_74 +ffffffff83364120 D udl_reg_vals_800x600_75 +ffffffff83364140 D udl_reg_vals_1024x768_60 +ffffffff83364160 D udl_reg_vals_1024x768_70 +ffffffff83364180 D udl_reg_vals_1024x768_75 +ffffffff833641a0 D udl_reg_vals_1280x800_60 +ffffffff833641c0 D udl_reg_vals_1280x960_60 +ffffffff833641e0 D udl_reg_vals_1280x1024_60 +ffffffff83364200 D udl_reg_vals_1280x1024_75 +ffffffff83364220 D udl_reg_vals_1366x768_60 +ffffffff83364240 D udl_reg_vals_1440x900_60 +ffffffff83364260 D udl_reg_vals_1440x900_59 +ffffffff83364280 D udl_reg_vals_1440x900_75 +ffffffff833642a0 D udl_reg_vals_1680x1050_60 +ffffffff833642c0 D udl_reg_vals_1600x1200_60 +ffffffff833642e0 D udl_reg_vals_1920x1080_60 +ffffffff83364300 D udl_null_key_1 +ffffffff83364310 D udl_decomp_table +ffffffff83365510 D udl_cd +ffffffff83365530 D udl_stdscreen +ffffffff83365560 D udl_scrlist +ffffffff83365568 D udl_screenlist +ffffffff83365578 D udl_accessops +ffffffff83366000 D umidi_cd +ffffffff83367000 d umq_YAMAHA_YAMAHA_UX256_ANYIFACE +ffffffff83367020 d umq_ROLAND_ROLAND_UM1_2 +ffffffff83367040 d umq_ROLAND_ROLAND_SC8850_2 +ffffffff83367060 d umq_ROLAND_ROLAND_SD90_2 +ffffffff83367080 d umq_ROLAND_ROLAND_UM880N_0 +ffffffff833670a0 d umq_ROLAND_ROLAND_UA100_2 +ffffffff833670c0 d umq_ROLAND_ROLAND_UM4_2 +ffffffff833670e0 d umq_ROLAND_ROLAND_U8_2 +ffffffff83367100 d umq_ROLAND_ROLAND_UM2_2 +ffffffff83367120 d umq_ROLAND_ROLAND_SC8820_2 +ffffffff83367140 d umq_ROLAND_ROLAND_PC300_2 +ffffffff83367160 d umq_ROLAND_ROLAND_SK500_2 +ffffffff83367180 d umq_ROLAND_ROLAND_SCD70_2 +ffffffff833671a0 d umq_ROLAND_ROLAND_UM550_0 +ffffffff833671c0 d umq_ROLAND_ROLAND_SD20_0 +ffffffff833671e0 d umq_ROLAND_ROLAND_SD80_0 +ffffffff83367200 d umq_ROLAND_ROLAND_UA700_3 +ffffffff83367220 d umq_ROLAND_ROLAND_UMONE_ANYIFACE +ffffffff83367240 D umidi_quirklist +ffffffff833674a0 d umq_YAMAHA_YAMAHA_UX256_ANYIFACE_fixed_ep_desc +ffffffff833674c0 d umq_YAMAHA_YAMAHA_UX256_ANYIFACE_fixed_ep_endpoints +ffffffff833674d0 d umq_ROLAND_ROLAND_UM1_2_fixed_ep_desc +ffffffff833674f0 d umq_ROLAND_ROLAND_UM1_2_fixed_ep_endpoints +ffffffff83367500 d umq_ROLAND_ROLAND_SC8850_2_fixed_ep_desc +ffffffff83367520 d umq_ROLAND_ROLAND_SC8850_2_fixed_ep_endpoints +ffffffff83367530 d umq_ROLAND_ROLAND_SD90_2_fixed_ep_desc +ffffffff83367550 d umq_ROLAND_ROLAND_SD90_2_fixed_ep_endpoints +ffffffff83367560 d umq_ROLAND_ROLAND_UM880N_0_fixed_ep_desc +ffffffff83367580 d umq_ROLAND_ROLAND_UM880N_0_fixed_ep_endpoints +ffffffff83367590 d umq_ROLAND_ROLAND_UA100_2_fixed_ep_desc +ffffffff833675b0 d umq_ROLAND_ROLAND_UA100_2_fixed_ep_endpoints +ffffffff833675c0 d umq_ROLAND_ROLAND_UM4_2_fixed_ep_desc +ffffffff833675e0 d umq_ROLAND_ROLAND_UM4_2_fixed_ep_endpoints +ffffffff833675f0 d umq_ROLAND_ROLAND_U8_2_fixed_ep_desc +ffffffff83367610 d umq_ROLAND_ROLAND_U8_2_fixed_ep_endpoints +ffffffff83367620 d umq_ROLAND_ROLAND_UM2_2_fixed_ep_desc +ffffffff83367640 d umq_ROLAND_ROLAND_UM2_2_fixed_ep_endpoints +ffffffff83367650 d umq_ROLAND_ROLAND_SC8820_2_fixed_ep_desc +ffffffff83367670 d umq_ROLAND_ROLAND_SC8820_2_fixed_ep_endpoints +ffffffff83367680 d umq_ROLAND_ROLAND_PC300_2_fixed_ep_desc +ffffffff833676a0 d umq_ROLAND_ROLAND_PC300_2_fixed_ep_endpoints +ffffffff833676b0 d umq_ROLAND_ROLAND_SK500_2_fixed_ep_desc +ffffffff833676d0 d umq_ROLAND_ROLAND_SK500_2_fixed_ep_endpoints +ffffffff833676e0 d umq_ROLAND_ROLAND_SCD70_2_fixed_ep_desc +ffffffff83367700 d umq_ROLAND_ROLAND_SCD70_2_fixed_ep_endpoints +ffffffff83367710 d umq_ROLAND_ROLAND_UM550_0_fixed_ep_desc +ffffffff83367730 d umq_ROLAND_ROLAND_UM550_0_fixed_ep_endpoints +ffffffff83367740 d umq_ROLAND_ROLAND_SD20_0_fixed_ep_desc +ffffffff83367760 d umq_ROLAND_ROLAND_SD20_0_fixed_ep_endpoints +ffffffff83367770 d umq_ROLAND_ROLAND_SD80_0_fixed_ep_desc +ffffffff83367790 d umq_ROLAND_ROLAND_SD80_0_fixed_ep_endpoints +ffffffff833677a0 d umq_ROLAND_ROLAND_UA700_3_fixed_ep_desc +ffffffff833677c0 d umq_ROLAND_ROLAND_UA700_3_fixed_ep_endpoints +ffffffff833677d0 d umq_ROLAND_ROLAND_UMONE_ANYIFACE_fixed_ep_desc +ffffffff833677f0 d umq_ROLAND_ROLAND_UMONE_ANYIFACE_fixed_ep_endpoints +ffffffff83368000 D ucom_cd +ffffffff83368020 D sysctl_ucomlock +ffffffff83369000 D ugen_cd +ffffffff8336a000 D uhidev_cd +ffffffff8336a020 d uhidev_use_rdesc.reportbuf +ffffffff8336b000 D uhid_cd +ffffffff8336c000 D fido_cd +ffffffff8336d000 D ujoy_cd +ffffffff8336e000 D ukbd_cd +ffffffff8336f000 D ums_cd +ffffffff8336f020 d ums_fix_elecom_descriptor.match +ffffffff83370000 D umt_cd +ffffffff83371000 D def_scale +ffffffff83371020 D uts_cd +ffffffff83372000 D ubcmtp_cd +ffffffff83372020 d ubcmtp_wsmousecfg +ffffffff83373000 D ucycom_cd +ffffffff83374000 D uslhcom_cd +ffffffff83375000 D ulpt_fwdevs +ffffffff83375060 D ulpt_cd +ffffffff83375080 D ulptusein +ffffffff83376000 D umass_cd +ffffffff83376020 d umass_bbb_transfer.dCBWtag +ffffffff83377000 D uthum_cd +ffffffff83378000 D ugold_cd +ffffffff83378020 d cmd_init +ffffffff83378028 d cmd_type +ffffffff83378030 d cmd_data +ffffffff83379000 D utrh_cd +ffffffff8337a000 D uoakrh_cd +ffffffff8337b000 D uoaklux_cd +ffffffff8337c000 D uoakv_cd +ffffffff8337d000 D uonerng_cd +ffffffff8337e000 D urng_cd +ffffffff8337f000 D udcf_cd +ffffffff83380000 D umbg_cd +ffffffff83381000 D uvisor_cd +ffffffff83382000 D udsbr_cd +ffffffff83383000 D utwitch_cd +ffffffff83384000 D aue_cd +ffffffff83385000 D axe_cd +ffffffff83386000 D axen_cd +ffffffff83387000 D smsc_cd +ffffffff83388000 D cue_devs +ffffffff83388010 D cue_cd +ffffffff83389000 D kue_cd +ffffffff8338a000 D cdce_cd +ffffffff8338b000 D urndis_cd +ffffffff8338c000 D mos_cd +ffffffff8338d000 D mue_cd +ffffffff8338e000 D udav_cd +ffffffff8338f000 D upl_devs +ffffffff8338f008 D upl_cd +ffffffff83390000 D ugl_devs +ffffffff83390008 D ugl_cd +ffffffff83391000 D url_cd +ffffffff83392000 D ure_cd +ffffffff83393000 D uaq_cd +ffffffff83394000 D umodem_cd +ffffffff83395000 D uftdi_cd +ffffffff83396000 D uplcom_cd +ffffffff83397000 D umct_cd +ffffffff83398000 D uvscom_cd +ffffffff83399000 D ubsa_cd +ffffffff8339a000 D ukspan_cd +ffffffff8339b000 D uslcom_cd +ffffffff8339c000 D uark_cd +ffffffff8339d000 D moscom_cd +ffffffff8339e000 D umcs_cd +ffffffff8339f000 D uscom_cd +ffffffff833a0000 D ucrcom_cd +ffffffff833a1000 D uxrcom_cd +ffffffff833a2000 D uipaq_cd +ffffffff833a3000 D umsm_cd +ffffffff833a4000 D uchcom_cd +ffffffff833a5000 D uticom_cd +ffffffff833a6000 D wi_func_usb +ffffffff833a6060 D wi_usb_cd +ffffffff833a7000 D atu_cd +ffffffff833a7020 D atu_devs +ffffffff833a7270 D atu_radfirm +ffffffff833a8000 D ural_cd +ffffffff833a9000 D rum_cd +ffffffff833aa000 D run_cd +ffffffff833aa020 D rt3070_freqs +ffffffff833ab000 D mtw_cd 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+ffffffff833be000 D lmtemp_cd +ffffffff833bf000 D lmn_worklist +ffffffff833bf240 D lmn_cd +ffffffff833c0000 D lmenv_cd +ffffffff833c1000 D maxtmp_cd +ffffffff833c2000 D adc_cd +ffffffff833c3000 D admtemp_cd +ffffffff833c4000 D admlc_cd +ffffffff833c5000 D admtm_cd +ffffffff833c6000 D admtmp_cd +ffffffff833c7000 D admtt_cd +ffffffff833c8000 D maxds_cd +ffffffff833c9000 D adt_chips +ffffffff833c9160 D worklist +ffffffff833c91a0 D adt_cd +ffffffff833ca000 D admcts_cd +ffffffff833cb000 D wbng_cd +ffffffff833cc000 D nvt_cd +ffffffff833cd000 D adl_worklist +ffffffff833cd138 D adl_cd +ffffffff833ce000 D andl_cd +ffffffff833cf000 D sdtemp_cd +ffffffff833d0000 D lisa_cd +ffffffff833d1000 D ihidev_cd +ffffffff833d2000 D ikbd_cd +ffffffff833d3000 D ims_cd +ffffffff833d4000 D imt_cd +ffffffff833d5000 D iatp_cd +ffffffff833d6000 D ietp_cd +ffffffff833d7000 D bgw_cd +ffffffff833d8000 D icc_cd +ffffffff833d9000 D gpio_cd +ffffffff833da000 D acpi_cd +ffffffff833da020 D acpi_pcidevs +ffffffff833da030 D acpi_pcirootdevs +ffffffff833da040 D acpi_taskq +ffffffff833da050 d acpi_indicator.save_led_state +ffffffff833da060 d acpi_getprop.prop_guid +ffffffff833da070 d acpi_getpropint.prop_guid +ffffffff833da080 D acpi_skip_hids +ffffffff833da0f0 D acpi_isa_hids +ffffffff833db000 D aml_intlen +ffffffff833db010 D aml_table +ffffffff833dbaf0 d osstring +ffffffff833dbb10 D aml_defobj +ffffffff833dbca0 D aml_valid_osi +ffffffff833dbd78 D acpi_max_osi +ffffffff833dbd80 D aml_regionspace +ffffffff833dd000 D acpitimer_cd +ffffffff833dd020 d acpi_timecounter +ffffffff833de000 D acpiac_cd +ffffffff833de020 D acpiac_hids +ffffffff833df000 D acpibat_cd +ffffffff833df020 D acpibat_hids +ffffffff833e0000 D acpibtn_cd +ffffffff833e0020 D acpibtn_hids +ffffffff833e1000 D acpicmos_cd +ffffffff833e1020 D acpicmos_hids +ffffffff833e2000 D acpicpu_cd +ffffffff833e2020 D acpicpu_hids +ffffffff833e2030 d acpicpu_set_pdc.cpu_oscuuid +ffffffff833e3000 D acpihpet_cd +ffffffff833e3020 d hpet_timecounter +ffffffff833e4000 D acpiec_cd +ffffffff833e4020 D acpiec_hids +ffffffff833e5000 D acpitz_cd +ffffffff833e5020 D acpitz_perflevel +ffffffff833e6000 D acpimadt_cd +ffffffff833e7000 D acpimcfg_cd +ffffffff833e8000 D acpiprt_map_list +ffffffff833e8010 D acpiprt_cd +ffffffff833e8030 D acpiprt_pri +ffffffff833e9000 D acpidmar_force_cm +ffffffff833e9008 D acpidmar_cd +ffffffff833e9030 D vtd_faults +ffffffff833ea000 D acpidock_cd +ffffffff833eb000 D abl_cd +ffffffff833eb020 D abl_hids +ffffffff833ec000 D asmc_cd +ffffffff833ec020 D asmc_hids +ffffffff833ed000 D acpiasus_cd +ffffffff833ed020 D acpiasus_hids +ffffffff833ee000 D acpithinkpad_cd +ffffffff833ee020 D acpithinkpad_hids +ffffffff833ef000 D acpitoshiba_cd +ffffffff833ef020 D acpitoshiba_hids +ffffffff833f0000 D acpisony_cd +ffffffff833f1000 D acpivideo_cd +ffffffff833f2000 D acpivout_cd +ffffffff833f3000 D acpipwrres_cd +ffffffff833f4000 D aibs_cd +ffffffff833f4020 d aibs_hids +ffffffff833f5000 D aplgpio_cd +ffffffff833f5020 D aplgpio_hids +ffffffff833f6000 D bytgpio_cd +ffffffff833f6020 D bytgpio_hids +ffffffff833f7000 D chvgpio_cd +ffffffff833f7020 D chvgpio_hids +ffffffff833f8000 D glkgpio_cd +ffffffff833f8020 D glkgpio_hids +ffffffff833f9000 D pchgpio_cd +ffffffff833f9020 D pchgpio_hids +ffffffff833f9070 D pchgpio_devices +ffffffff833fa000 D tipmic_cd +ffffffff833fa020 D tipmic_thermal_regmap +ffffffff833fa030 D tipmic_power_regmap +ffffffff833fb000 D ccpmic_cd +ffffffff833fb020 D ccpmic_thermal_regmap +ffffffff833fb023 D ccpmic_power_regmap +ffffffff833fc000 D com_hids +ffffffff833fd000 D sdhc_hids +ffffffff833fe000 D dwiic_hids +ffffffff833fe050 D ihidev_hids +ffffffff833fe070 D ietp_hids +ffffffff833fe220 D iatp_hids +ffffffff833fe240 d dwiic_acpi_found_ihidev.i2c_hid_guid +ffffffff833ff000 D acpicbkbd_cd +ffffffff833ff020 D acpicbkbd_hids +ffffffff83400000 D acpials_cd +ffffffff83400020 D acpials_hids +ffffffff83401000 D tpm_cd +ffffffff83401020 D tpm_hids +ffffffff83402000 D acpihve_cd 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