--- 7.3/2023-10-01T06:17:06Z/2023-09-25T00:00:00Z/nm-bsd-ot14.txt Wed Oct 4 21:37:12 2023 +++ 7.3/2023-10-01T06:17:06Z/2023-09-26T00:00:00Z/nm-bsd-ot14.txt Thu Oct 5 00:28:14 2023 @@ -2,14 +2,14 @@ 00011006 A mp_pdirpa 0001419d A acpi_pdirpa 01000000 A __kernel_phys_base -0255a000 T __kernel_kutext_phys -0255e000 C __kernel_cptext_phys -0255f000 C __kernel_rodata_phys -02e1b000 R __kernel_kutext_page_phys -02e1d000 C __kernel_randomdata_phys -030dc000 R __kernel_data_phys -03413000 D __kernel_kudata_phys -03414000 C __kernel_bss_phys +0255b000 T __kernel_kutext_phys +0255f000 C __kernel_cptext_phys +02560000 C __kernel_rodata_phys +02e1d000 R __kernel_kutext_page_phys +02e1f000 C __kernel_randomdata_phys +030de000 R __kernel_data_phys +03416000 D __kernel_kudata_phys +03417000 C __kernel_bss_phys 03800000 B __kernel_phys_end 80000000 A __kernel_virt_to_phys ffffffff80000000 A __kernel_base @@ -5504,8 +5504,8 @@ ffffffff8129b490 T clockqueue_reset_intrclock ffffffff8129b5a0 T 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lii_spi_configure -ffffffff818ba900 T lii_eeprom_present -ffffffff818ba990 T lii_eeprom_read -ffffffff818ba9c0 T lii_spi_read -ffffffff818bac80 T lii_read_macaddr -ffffffff818badf0 T lii_intr -ffffffff818baf00 T lii_alloc_rings -ffffffff818bb110 T lii_tick -ffffffff818bb160 T lii_mii_readreg -ffffffff818bb400 T lii_mii_writereg -ffffffff818bb6a0 T lii_mii_statchg -ffffffff818bb710 T lii_media_change -ffffffff818bb760 T lii_media_status -ffffffff818bb7c0 T lii_ioctl -ffffffff818bb950 T lii_start -ffffffff818bbb00 T lii_watchdog -ffffffff818bbb40 T lii_stop -ffffffff818bbbb0 T lii_init -ffffffff818bc0b0 T lii_iff -ffffffff818bc1f0 T lii_tx_put -ffffffff818bc300 T lii_free_tx_space -ffffffff818bc340 T lii_rxintr -ffffffff818bc4f0 T lii_txintr -ffffffff818bd000 T ichiic_match -ffffffff818bd030 T ichiic_attach -ffffffff818bd220 T ichiic_intr -ffffffff818bd330 T ichiic_i2c_acquire_bus -ffffffff818bd380 T ichiic_i2c_release_bus -ffffffff818bd3d0 T ichiic_i2c_exec -ffffffff818be000 T viapm_match -ffffffff818be030 T viapm_attach -ffffffff818be650 T viapm_intr -ffffffff818be760 T viapm_i2c_acquire_bus -ffffffff818be7b0 T viapm_i2c_release_bus -ffffffff818be800 T viapm_i2c_exec -ffffffff818beb20 T viapm_refresh_sensor_data -ffffffff818bee50 T viapm_refresh -ffffffff818bee80 T val_to_uK -ffffffff818bef20 T val_to_rpm -ffffffff818bef60 T val_to_uV -ffffffff818bf000 T viapm_get_timecount -ffffffff818c0000 T amdiic_match -ffffffff818c0030 T amdiic_attach -ffffffff818c0200 T amdiic_intr -ffffffff818c02d0 T amdiic_i2c_acquire_bus -ffffffff818c0320 T amdiic_i2c_release_bus -ffffffff818c0370 T amdiic_i2c_exec -ffffffff818c05d0 T amdiic_read -ffffffff818c0740 T amdiic_wait -ffffffff818c07e0 T amdiic_write -ffffffff818c1000 T nviic_match -ffffffff818c1030 T nviic_attach -ffffffff818c1280 T nviic_i2c_acquire_bus -ffffffff818c12d0 T nviic_i2c_release_bus -ffffffff818c1310 T nviic_i2c_exec -ffffffff818c1530 T nviic_write -ffffffff818c1580 T nviic_read -ffffffff818c2000 T sdhc_pci_match -ffffffff818c2060 T sdhc_pci_attach -ffffffff818c23a0 T sdhc_pci_activate -ffffffff818c2400 T sdhc_takecontroller -ffffffff818c24a0 T sdhc_ricohfix -ffffffff818c2610 T sdhc_pci_conf_write -ffffffff818c3000 T kate_match -ffffffff818c3170 T kate_attach -ffffffff818c3420 T kate_refresh -ffffffff818c4000 T km_match -ffffffff818c4050 T km_attach -ffffffff818c40f0 T km_refresh -ffffffff818c5000 T ksmn_match -ffffffff818c5050 T ksmn_attach -ffffffff818c5240 T ksmn_ccd_attach -ffffffff818c5390 T ksmn_refresh -ffffffff818c54e0 T ksmn_read_reg -ffffffff818c6000 t iosf_pci_match -ffffffff818c6060 t iosf_pci_attach -ffffffff818c6100 t iosf_pci_mbi_mdr_rd -ffffffff818c6160 t iosf_pci_mbi_mdr_wr -ffffffff818c7000 T itherm_probe -ffffffff818c7030 T itherm_attach -ffffffff818c7380 T itherm_activate -ffffffff818c7400 T itherm_enable -ffffffff818c7460 T itherm_refresh -ffffffff818c7470 T itherm_refresh_sensor_data -ffffffff818c7860 T itherm_bias_temperature_sensor -ffffffff818c8000 T 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iwn_wakeup_intr +ffffffff8181e2a0 T iwn_fatal_intr +ffffffff8181e590 T iwn_rval2ridx +ffffffff8181e610 T iwn_tx +ffffffff8181f110 T iwn_rxon_ht40_enabled +ffffffff8181f150 T iwn_set_pslevel +ffffffff8181f310 T iwn_add_broadcast_node +ffffffff8181f550 T iwn_set_critical_temp +ffffffff8181f600 T iwn_set_timing +ffffffff8181f7d0 T iwn_send_sensitivity +ffffffff8181f8d0 T iwn_send_btcoex +ffffffff8181f930 T iwn_send_advanced_btcoex +ffffffff81820090 T iwn5000_runtime_calib +ffffffff81820140 T iwn_config +ffffffff81820680 T iwn6000_temp_offset_calib +ffffffff818206f0 T iwn2000_temp_offset_calib +ffffffff81820790 T iwn_get_active_dwell_time +ffffffff818207d0 T iwn_limit_dwell +ffffffff81820840 T iwn_get_passive_dwell_time +ffffffff818208c0 T iwn_rxon_configure_ht40 +ffffffff81820970 T iwn_update_rxon_restore_power +ffffffff81820a30 T iwn5000_query_calibration +ffffffff81820b20 T iwn5000_send_calibration +ffffffff81820c70 T iwn5000_send_wimax_coex +ffffffff81820d00 T iwn5000_crystal_calib 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iwm_nic_unlock +ffffffff81824280 T iwm_write_mem +ffffffff818243c0 T iwm_write_mem32 +ffffffff818244d0 T iwm_poll_bit +ffffffff818245a0 T iwm_set_bits_mask_prph +ffffffff81824740 T iwm_set_bits_prph +ffffffff81824760 T iwm_clear_bits_prph +ffffffff81824780 T iwm_dma_contig_alloc +ffffffff81824970 T iwm_dma_contig_free +ffffffff81824a30 T iwm_alloc_rx_ring +ffffffff81824c10 T iwm_rx_addbuf +ffffffff81824df0 T iwm_free_rx_ring +ffffffff818250a0 T iwm_disable_rx_dma +ffffffff818252c0 T iwm_reset_rx_ring +ffffffff81825340 T iwm_alloc_tx_ring +ffffffff81825520 T iwm_free_tx_ring +ffffffff81825720 T iwm_reset_tx_ring +ffffffff818258e0 T iwm_enable_rfkill_int +ffffffff81825a00 T iwm_check_rfkill +ffffffff81825a80 T iwm_enable_interrupts +ffffffff81825b30 T iwm_enable_fwload_interrupt +ffffffff81825c00 T iwm_restore_interrupts +ffffffff81825c30 T iwm_disable_interrupts +ffffffff81825cf0 T iwm_ict_reset +ffffffff81825eb0 T iwm_set_hw_ready +ffffffff81826090 T iwm_prepare_card_hw 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iwm_load_firmware_7000 +ffffffff8182e5c0 T iwm_load_cpu_sections_8000 +ffffffff8182e960 T iwm_load_firmware_8000 +ffffffff8182eb70 T iwm_load_firmware +ffffffff8182ec50 T iwm_start_fw +ffffffff8182ee20 T iwm_send_tx_ant_cfg +ffffffff8182eeb0 T iwm_send_phy_cfg_cmd +ffffffff8182ef60 T iwm_send_dqa_cmd +ffffffff8182eff0 T iwm_load_ucode_wait_alive +ffffffff8182f230 T iwm_save_fw_paging +ffffffff8182f2a0 T iwm_send_paging_cmd +ffffffff8182f3f0 T iwm_free_fw_paging +ffffffff8182f560 T iwm_run_init_mvm_ucode +ffffffff8182f9b0 T iwm_send_bt_init_conf +ffffffff8182fa50 T iwm_sf_config +ffffffff8182fca0 T iwm_config_ltr +ffffffff8182fd60 T iwm_get_signal_strength +ffffffff8182fdc0 T iwm_rxmq_get_signal_strength +ffffffff8182fe10 T iwm_rx_rx_phy_cmd +ffffffff8182fe70 T iwm_get_noise +ffffffff8182fee0 T iwm_ccmp_decap +ffffffff8182ffe0 T iwm_rx_hwdecrypt +ffffffff818300b0 T iwm_rx_frame +ffffffff818303e0 T iwm_rx_mpdu +ffffffff818305f0 T iwm_flip_address +ffffffff81830640 T iwm_detect_duplicate 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iwm_umac_scan_fill_channels +ffffffff818354c0 T iwm_fill_probe_req_v1 +ffffffff81835560 T iwm_fill_probe_req +ffffffff818357a0 T iwm_lmac_scan +ffffffff81835ca0 T iwm_config_umac_scan +ffffffff81835eb0 T iwm_umac_scan_size +ffffffff81835f20 T iwm_get_scan_req_umac_chan_param +ffffffff81835f70 T iwm_get_scan_req_umac_data +ffffffff81835fc0 T iwm_umac_scan +ffffffff81836430 T iwm_mcc_update +ffffffff818364c0 T iwm_ridx2rate +ffffffff81836530 T iwm_ack_rates +ffffffff818367f0 T iwm_mac_ctxt_cmd_common +ffffffff81836b00 T iwm_mac_ctxt_cmd_fill_sta +ffffffff81836bb0 T iwm_update_quotas +ffffffff81836fa0 T iwm_del_task +ffffffff81837000 T iwm_scan +ffffffff81837270 T iwm_scan_abort +ffffffff81837390 T iwm_bgscan +ffffffff81837430 T iwm_bgscan_done +ffffffff818374d0 T iwm_bgscan_done_task +ffffffff81837730 T iwm_umac_scan_abort +ffffffff818377c0 T iwm_lmac_scan_abort +ffffffff81837860 T iwm_auth +ffffffff81837c60 T iwm_deauth +ffffffff81837fc0 T iwm_run +ffffffff818386a0 T iwm_allow_mcast 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iwm_dump_driver_status +ffffffff8183c810 T iwm_ioctl +ffffffff8183c980 T iwm_nic_umac_error +ffffffff8183cdc0 T iwm_desc_lookup +ffffffff8183cf50 T iwm_rx_pkt_valid +ffffffff8183cfa0 T iwm_rx_pkt +ffffffff8183dd40 T iwm_notif_intr +ffffffff8183dea0 T iwm_intr +ffffffff8183e2d0 T iwm_intr_msix +ffffffff8183e570 T iwm_match +ffffffff8183e5a0 T iwm_attach_hook +ffffffff8183e5e0 T iwm_attach +ffffffff8183f670 T iwm_radiotap_attach +ffffffff8183f700 T iwm_init_task +ffffffff8183f7c0 T iwm_resume +ffffffff8183f8f0 T iwm_wakeup +ffffffff8183f9a0 T iwm_activate +ffffffff81840000 T iwx_lookup_cmd_ver +ffffffff81840070 T iwx_lookup_notif_ver +ffffffff818400e0 T iwx_is_mimo_ht_plcp +ffffffff81840120 T iwx_store_cscheme +ffffffff81840170 T iwx_ctxt_info_alloc_dma +ffffffff81840210 T iwx_dma_contig_alloc +ffffffff818403f0 T iwx_ctxt_info_free_paging +ffffffff81840550 T iwx_dma_contig_free +ffffffff81840610 T iwx_get_num_sections +ffffffff81840690 T iwx_init_fw_sec +ffffffff81840b40 T iwx_fw_version_str +ffffffff81840b80 T iwx_alloc_fw_monitor_block +ffffffff81840c30 T iwx_alloc_fw_monitor +ffffffff81840cf0 T iwx_apply_debug_destination +ffffffff81841230 T iwx_nic_lock +ffffffff81841380 T iwx_write_prph +ffffffff81841420 T iwx_set_bits_prph +ffffffff81841440 T iwx_clear_bits_prph +ffffffff81841460 T iwx_read_prph +ffffffff81841500 T iwx_nic_unlock +ffffffff818415b0 T iwx_set_ltr +ffffffff81841700 T iwx_ctxt_info_init +ffffffff818419c0 T iwx_ctxt_info_free_fw_img +ffffffff81841b40 T iwx_ctxt_info_gen3_init +ffffffff81842130 T iwx_write_umac_prph +ffffffff818421e0 T iwx_firmware_store_section +ffffffff81842280 T iwx_set_default_calib +ffffffff818422d0 T iwx_fw_info_free +ffffffff81842360 T iwx_read_firmware +ffffffff81842ef0 T iwx_prph_addr_mask +ffffffff81842f30 T iwx_read_prph_unlocked +ffffffff81842fb0 T iwx_nic_assert_locked +ffffffff81843010 T iwx_write_prph_unlocked +ffffffff81843090 T iwx_write_prph64 +ffffffff818431c0 T iwx_read_umac_prph_unlocked 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iwx_apm_config +ffffffff81845470 T iwx_apm_init +ffffffff818456d0 T iwx_apm_stop +ffffffff81845a90 T iwx_init_msix_hw +ffffffff81845b30 T iwx_conf_msix_hw +ffffffff818460d0 T iwx_clear_persistence_bit +ffffffff81846250 T iwx_start_hw +ffffffff81846650 T iwx_stop_device +ffffffff81846bc0 T iwx_nic_config +ffffffff81846c50 T iwx_nic_rx_init +ffffffff81846cb0 T iwx_nic_init +ffffffff81846dd0 T iwx_enable_txq +ffffffff818470a0 T iwx_send_cmd +ffffffff81847680 T iwx_free_resp +ffffffff81847700 T iwx_disable_txq +ffffffff81847960 T iwx_post_alive +ffffffff818479f0 T iwx_schedule_session_protection +ffffffff81847ac0 T iwx_send_cmd_pdu +ffffffff81847b40 T iwx_unprotect_session +ffffffff81847c10 T iwx_fw_valid_tx_ant +ffffffff81847c50 T iwx_fw_valid_rx_ant +ffffffff81847ca0 T iwx_init_channel_map +ffffffff81847ea0 T iwx_mimo_enabled +ffffffff81847ee0 T iwx_setup_ht_rates +ffffffff81847f90 T iwx_setup_vht_rates +ffffffff81848020 T iwx_init_reorder_buffer +ffffffff81848080 T iwx_clear_reorder_buffer +ffffffff81848140 T iwx_rx_ba_session_expired +ffffffff81848240 T iwx_rx_bar_frame_release +ffffffff818482f0 T iwx_release_frames +ffffffff818484e0 T iwx_reorder_timer_expired +ffffffff818486a0 T iwx_find_rxba_data +ffffffff81848730 T iwx_sta_rx_agg_baid_cfg_cmd +ffffffff81848990 T iwx_send_cmd_pdu_status +ffffffff81848a20 T iwx_sta_rx_agg_sta_cmd +ffffffff81848c70 T iwx_sta_rx_agg +ffffffff81848f50 T iwx_mac_ctxt_task +ffffffff818490e0 T iwx_mac_ctxt_cmd +ffffffff818492c0 T iwx_phy_ctxt_task +ffffffff81849480 T iwx_phy_ctxt_update +ffffffff818498e0 T iwx_updatechan +ffffffff818499a0 T iwx_add_task +ffffffff81849a10 T iwx_updateprot +ffffffff81849ad0 T iwx_updateslot +ffffffff81849b90 T iwx_updateedca +ffffffff81849c50 T iwx_updatedtim +ffffffff81849d10 T iwx_sta_tx_agg_start +ffffffff81849f00 T iwx_ba_task +ffffffff8184a050 T iwx_ampdu_rx_start +ffffffff8184a130 T iwx_ampdu_rx_stop +ffffffff8184a210 T iwx_ampdu_tx_start +ffffffff8184a320 T iwx_set_mac_addr_from_csr +ffffffff8184a540 T iwx_flip_hw_address +ffffffff8184a590 T iwx_is_valid_mac_addr +ffffffff8184a630 T iwx_nvm_get +ffffffff8184a900 T iwx_load_firmware +ffffffff8184aae0 T iwx_start_fw +ffffffff8184acc0 T iwx_pnvm_handle_section +ffffffff8184afb0 T iwx_ctxt_info_gen3_set_pnvm +ffffffff8184b000 T iwx_pnvm_parse +ffffffff8184b0f0 T iwx_load_pnvm +ffffffff8184b490 T iwx_send_tx_ant_cfg +ffffffff8184b520 T iwx_send_phy_cfg_cmd +ffffffff8184b5d0 T iwx_send_dqa_cmd +ffffffff8184b660 T iwx_load_ucode_wait_alive +ffffffff8184b720 T iwx_run_init_mvm_ucode +ffffffff8184b970 T iwx_config_ltr +ffffffff8184ba30 T iwx_update_rx_desc +ffffffff8184bad0 T iwx_rxmq_get_signal_strength +ffffffff8184bb20 T iwx_rx_rx_phy_cmd +ffffffff8184bb80 T iwx_get_noise +ffffffff8184bbf0 T iwx_ccmp_decap +ffffffff8184bd30 T iwx_rx_hwdecrypt +ffffffff8184be30 T iwx_rx_frame +ffffffff8184c0f0 T iwx_detect_duplicate +ffffffff8184c1f0 T iwx_is_sn_less +ffffffff8184c250 T iwx_oldsn_workaround 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age_miibus_statchg +ffffffff8188d100 T age_mediachange +ffffffff8188d160 T age_mediastatus +ffffffff8188d1c0 T age_tick +ffffffff8188d220 T age_dma_free +ffffffff8188d4e0 T age_detach +ffffffff8188d5a0 T age_stop +ffffffff8188d8c0 T age_stop_rxmac +ffffffff8188d9f0 T age_stop_txmac +ffffffff8188db20 T age_mac_config +ffffffff8188dbc0 T age_rxintr +ffffffff8188dd90 T age_txintr +ffffffff8188df70 T age_init +ffffffff8188e950 T age_stats_update +ffffffff8188ec70 T age_encap +ffffffff8188eee0 T age_iff +ffffffff8188f040 T age_rxeof +ffffffff8188f3d0 T age_newbuf +ffffffff8188f560 T age_init_rx_ring +ffffffff8188f630 T age_init_rr_ring +ffffffff8188f6b0 T age_init_tx_ring +ffffffff8188f770 T age_init_cmb_block +ffffffff8188f7c0 T age_init_smb_block +ffffffff8188f810 T age_rxvlan +ffffffff81890000 T alc_match +ffffffff81890030 T alc_attach +ffffffff818908c0 T alc_detach +ffffffff81890990 T alc_activate +ffffffff81890a10 T alc_miibus_readreg +ffffffff81890bd0 T alc_mii_readreg_816x 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alc_aspm_813x +ffffffff81893bb0 T alc_init_pcie +ffffffff81893f40 T alc_config_msi +ffffffff81894010 T alc_intr +ffffffff818941f0 T alc_reset +ffffffff818945c0 T alc_dma_alloc +ffffffff81894d30 T alc_ioctl +ffffffff81894e80 T alc_start +ffffffff81895020 T alc_watchdog +ffffffff818950a0 T alc_tick +ffffffff81895100 T alc_dma_free +ffffffff818953c0 T alc_stop +ffffffff81895710 T alc_init +ffffffff81896630 T alc_encap +ffffffff81896860 T alc_txeof +ffffffff81896a50 T alc_iff +ffffffff81896bb0 T alc_stats_clear +ffffffff81896cf0 T alc_stats_update +ffffffff81897150 T alc_rxintr +ffffffff81897370 T alc_newbuf +ffffffff818974f0 T alc_rxeof +ffffffff81897780 T alc_osc_reset +ffffffff81897910 T alc_init_rx_ring +ffffffff81897a10 T alc_init_rr_ring +ffffffff81897a90 T alc_init_tx_ring +ffffffff81897b40 T alc_init_cmb +ffffffff81897b80 T alc_init_smb +ffffffff81897bd0 T alc_rxvlan +ffffffff81897c40 T alc_stop_queue +ffffffff81898000 T ale_match +ffffffff81898030 T ale_attach +ffffffff81898580 T ale_activate +ffffffff81898600 T ale_miibus_readreg +ffffffff81898720 T ale_miibus_writereg +ffffffff81898830 T ale_miibus_statchg +ffffffff81898a50 T ale_stop_mac +ffffffff81898b40 T ale_mac_config +ffffffff81898be0 T ale_mediastatus +ffffffff81898c50 T ale_mediachange +ffffffff81898cb0 T ale_get_macaddr +ffffffff81898e90 T ale_phy_reset +ffffffff818994d0 T ale_intr +ffffffff81899620 T ale_reset +ffffffff81899790 T ale_dma_alloc +ffffffff81899f00 T ale_ioctl +ffffffff8189a050 T ale_start +ffffffff8189a1c0 T ale_watchdog +ffffffff8189a240 T ale_tick +ffffffff8189a2a0 T ale_dma_free +ffffffff8189a560 T ale_detach +ffffffff8189a620 T ale_stop +ffffffff8189a8e0 T ale_init +ffffffff8189b2f0 T ale_encap +ffffffff8189b550 T ale_txeof +ffffffff8189b710 T ale_iff +ffffffff8189b870 T ale_stats_clear +ffffffff8189b940 T ale_stats_update +ffffffff8189bcb0 T ale_rxeof +ffffffff8189bf50 T ale_rx_update_page +ffffffff8189c090 T ale_rxcsum +ffffffff8189c140 T ale_init_rx_pages +ffffffff8189c270 T ale_init_tx_ring +ffffffff8189c360 T ale_rxvlan +ffffffff8189d000 T amdpm_match +ffffffff8189d030 T amdpm_attach +ffffffff8189d3a0 T amdpm_activate +ffffffff8189d410 T amdpm_rnd_callout +ffffffff8189d470 T amdpm_i2c_acquire_bus +ffffffff8189d4c0 T amdpm_i2c_release_bus +ffffffff8189d510 T amdpm_i2c_exec +ffffffff8189d870 T amdpm_get_timecount +ffffffff8189d8a0 T amdpm_intr +ffffffff8189e000 T bce_probe +ffffffff8189e030 T bce_attach +ffffffff8189eae0 T bce_activate +ffffffff8189eb50 T bce_intr +ffffffff8189ee50 T bce_reset +ffffffff8189f410 T bce_ioctl +ffffffff8189f570 T bce_start +ffffffff8189f7c0 T bce_watchdog +ffffffff8189f810 T bce_mii_read +ffffffff8189f950 T bce_mii_write +ffffffff8189fa80 T bce_statchg +ffffffff8189fe10 T bce_mediachange +ffffffff8189fe60 T bce_mediastatus +ffffffff8189fec0 T bce_tick +ffffffff8189ff10 T bce_stop +ffffffff818a0030 T bce_init +ffffffff818a0440 T bce_iff +ffffffff818a0540 T bce_rxintr +ffffffff818a06d0 T bce_txintr +ffffffff818a07c0 T bce_add_rxbuf +ffffffff818a0880 T bce_add_mac +ffffffff818a1000 T ath_pci_match +ffffffff818a1060 T ath_pci_attach +ffffffff818a1290 T ath_pci_detach +ffffffff818a2000 T athn_pci_match +ffffffff818a2030 T athn_pci_attach +ffffffff818a22b0 T athn_pci_detach +ffffffff818a2330 T athn_pci_activate +ffffffff818a23e0 T athn_pci_read +ffffffff818a2410 T athn_pci_write +ffffffff818a2440 T athn_pci_write_barrier +ffffffff818a2470 T athn_pci_disable_aspm +ffffffff818a24e0 T athn_pci_wakeup +ffffffff818a3000 T atw_pci_match +ffffffff818a3030 T atw_pci_attach +ffffffff818a32a0 T atw_pci_detach +ffffffff818a3320 t atw_pci_enable +ffffffff818a33c0 t atw_pci_disable +ffffffff818a4000 T rtw_pci_match +ffffffff818a4030 T rtw_pci_attach +ffffffff818a4250 T rtw_pci_detach +ffffffff818a42d0 T rtw_pci_enable +ffffffff818a4370 T rtw_pci_disable +ffffffff818a5000 T rtwn_pci_match +ffffffff818a5030 T rtwn_pci_attach +ffffffff818a5590 T rtwn_pci_detach +ffffffff818a56a0 T rtwn_pci_activate +ffffffff818a56c0 T rtwn_calib_to +ffffffff818a5720 T rtwn_scan_to +ffffffff818a5740 T rtwn_intr +ffffffff818a5a20 T rtwn_alloc_rx_list +ffffffff818a5d40 T rtwn_alloc_tx_list +ffffffff818a5f80 T rtwn_free_rx_list +ffffffff818a60d0 T rtwn_pci_write_1 +ffffffff818a6100 T rtwn_pci_write_2 +ffffffff818a6130 T rtwn_pci_write_4 +ffffffff818a6160 T rtwn_pci_read_1 +ffffffff818a6190 T rtwn_pci_read_2 +ffffffff818a61c0 T rtwn_pci_read_4 +ffffffff818a61f0 T rtwn_tx +ffffffff818a67c0 T rtwn_power_on +ffffffff818a67f0 T rtwn_dma_init +ffffffff818a6ba0 T rtwn_pci_load_firmware +ffffffff818a6c50 T rtwn_fw_loadpage +ffffffff818a6d90 T rtwn_mac_init +ffffffff818a6f10 T rtwn_bb_init +ffffffff818a73b0 T rtwn_alloc_buffers +ffffffff818a73e0 T rtwn_pci_init +ffffffff818a74b0 T rtwn_pci_stop +ffffffff818a7600 T rtwn_is_oactive +ffffffff818a7640 T rtwn_next_calib +ffffffff818a7660 T rtwn_cancel_calib +ffffffff818a76a0 T rtwn_pci_next_scan +ffffffff818a76c0 T rtwn_cancel_scan +ffffffff818a7700 T rtwn_wait_async +ffffffff818a7730 T rtwn_free_tx_list +ffffffff818a78a0 T rtwn_setup_rx_desc +ffffffff818a7910 T rtwn_reset_rx_list +ffffffff818a79b0 T rtwn_reset_tx_list +ffffffff818a7b00 T rtwn_rx_frame +ffffffff818a7f60 T rtwn_tx_done +ffffffff818a80f0 T rtwn_poll_c2h_events +ffffffff818a82b0 T rtwn_pci_92c_stop +ffffffff818a8490 T rtwn_pci_88e_stop +ffffffff818a8870 T rtwn_pci_23a_stop +ffffffff818a8c10 T rtwn_88e_intr +ffffffff818a8f60 T rtwn_llt_write +ffffffff818a9020 T rtwn_llt_init +ffffffff818a92f0 T rtwn_92c_power_on +ffffffff818a9770 T rtwn_88e_power_on +ffffffff818a9b70 T rtwn_23a_power_on +ffffffff818a9fe0 T rtwn_tx_report +ffffffff818ab000 T ral_pci_match +ffffffff818ab030 T ral_pci_attach +ffffffff818ab210 T ral_pci_detach +ffffffff818ab2b0 T ral_pci_activate +ffffffff818ab340 T ral_pci_wakeup +ffffffff818ac000 T acx_pci_match +ffffffff818ac030 T acx_pci_attach +ffffffff818ac260 T acx_pci_detach +ffffffff818ad000 T pgt_pci_match +ffffffff818ad030 T pgt_pci_attach +ffffffff818ad200 T pgt_pci_detach +ffffffff818ae000 T malo_pci_match +ffffffff818ae030 T malo_pci_attach +ffffffff818ae1e0 T malo_pci_detach +ffffffff818ae230 T malo_pci_activate +ffffffff818ae290 T malo_pci_wakeup +ffffffff818af000 T bwi_pci_match +ffffffff818af070 T bwi_pci_attach +ffffffff818af290 T bwi_pci_detach +ffffffff818af2e0 T bwi_pci_activate +ffffffff818af350 T bwi_reset_bcm4331 +ffffffff818af470 T bwi_pci_conf_write +ffffffff818af4a0 T bwi_pci_conf_read +ffffffff818af4d0 T bwi_pci_wakeup +ffffffff818b0000 T piixpm_match +ffffffff818b0030 T piixpm_attach +ffffffff818b04c0 T piixpm_intr +ffffffff818b05d0 T piixpm_i2c_acquire_bus +ffffffff818b06b0 T piixpm_i2c_release_bus +ffffffff818b0790 T piixpm_i2c_exec +ffffffff818b1000 T vic_match +ffffffff818b10a0 T vic_attach +ffffffff818b1420 T vic_intr +ffffffff818b14a0 T vic_query +ffffffff818b1700 T vic_alloc_data +ffffffff818b1a00 T vic_tick +ffffffff818b1a70 T vic_ioctl +ffffffff818b1ca0 T vic_start +ffffffff818b1fd0 T vic_watchdog +ffffffff818b2000 T vic_media_change +ffffffff818b2030 T vic_media_status +ffffffff818b20f0 T vic_read +ffffffff818b2110 T vic_read_cmd +ffffffff818b2160 T vic_getlladdr +ffffffff818b2210 T vic_alloc_dmamem +ffffffff818b2380 T vic_rx_fill +ffffffff818b2560 T vic_alloc_mbuf +ffffffff818b2620 T vic_init_data +ffffffff818b29d0 T vic_uninit_data +ffffffff818b2ba0 T vic_link_state +ffffffff818b2c20 T vic_write +ffffffff818b2c70 T vic_rx_proc +ffffffff818b2ed0 T vic_tx_proc +ffffffff818b3050 T vic_iff +ffffffff818b3190 T vic_setlladdr +ffffffff818b31f0 T vic_load_txb +ffffffff818b32a0 T vic_init +ffffffff818b3440 T vic_stop +ffffffff818b3580 T vic_rxrinfo +ffffffff818b3650 T vic_free_dmamem +ffffffff818b4000 T vmxnet3_match +ffffffff818b4030 T vmxnet3_attach +ffffffff818b4900 T vmxnet3_intr +ffffffff818b49a0 T vmxnet3_intr_event +ffffffff818b4a20 T vmxnet3_intr_intx +ffffffff818b4a90 T vmxnet3_intr_queue +ffffffff818b4b20 T vmxnet3_dma_init +ffffffff818b4ed0 T vmxnet3_ioctl +ffffffff818b5160 T vmxnet3_start +ffffffff818b5500 T vmxnet3_watchdog +ffffffff818b5550 T vmxnet3_media_change +ffffffff818b5580 T vmxnet3_media_status +ffffffff818b5690 T vmxnet3_link_state +ffffffff818b5750 T vmxnet3_dma_allocmem +ffffffff818b58a0 T vmxnet3_alloc_txring +ffffffff818b5a50 T vmxnet3_alloc_rxring +ffffffff818b5da0 t vmx_dmamem_alloc +ffffffff818b5f00 T vmxnet3_rxfill_tick +ffffffff818b5f70 T vmxnet3_txinit +ffffffff818b6060 T vmxnet3_rxfill +ffffffff818b6350 T vmxnet3_rxinit +ffffffff818b6490 T vmxnet3_txstop +ffffffff818b6590 T vmxnet3_rxstop +ffffffff818b66f0 T vmxnet3_enable_all_intrs +ffffffff818b67c0 T vmxnet3_disable_all_intrs +ffffffff818b6890 T vmxnet3_evintr +ffffffff818b6a60 T vmxnet3_rxintr +ffffffff818b6de0 T vmxnet3_txintr +ffffffff818b6fd0 T vmxnet3_init +ffffffff818b7380 T vmxnet3_rx_csum +ffffffff818b73e0 T vmxnet3_iff +ffffffff818b7520 T vmxnet3_stop +ffffffff818b77e0 T vmxnet3_reset +ffffffff818b7820 t vmx_kstat_create +ffffffff818b7a00 t vmx_kstat_read +ffffffff818b8000 T vmwpvs_match +ffffffff818b8040 T vmwpvs_attach +ffffffff818b8df0 T vmwpvs_scsi_cmd +ffffffff818b9260 T vmwpvs_intx +ffffffff818b92e0 T vmwpvs_msg_task +ffffffff818b9560 T vmwpvs_intr +ffffffff818b9740 T vmwpvs_get_config +ffffffff818b9940 T vmwpvs_dmamem_zalloc +ffffffff818b99a0 T vmwpvs_dmamem_alloc +ffffffff818b9b20 T vmwpvs_ccb_put +ffffffff818b9b80 T vmwpvs_setup_rings +ffffffff818b9cb0 T vmwpvs_setup_msg_ring +ffffffff818b9da0 T vmwpvs_ccb_get +ffffffff818b9e20 T vmwpvs_dmamem_free +ffffffff818b9ea0 T vmwpvs_cmd +ffffffff818b9f50 T vmwpvs_scsi_cmd_done +ffffffff818ba130 T vmwpvs_scsi_cmd_poll +ffffffff818bb000 T lii_match +ffffffff818bb030 T lii_attach +ffffffff818bb440 T lii_activate +ffffffff818bb540 T lii_reset +ffffffff818bb810 T lii_spi_configure +ffffffff818bb900 T lii_eeprom_present +ffffffff818bb990 T lii_eeprom_read +ffffffff818bb9c0 T lii_spi_read +ffffffff818bbc80 T lii_read_macaddr +ffffffff818bbdf0 T lii_intr +ffffffff818bbf00 T lii_alloc_rings +ffffffff818bc110 T lii_tick +ffffffff818bc160 T lii_mii_readreg +ffffffff818bc400 T lii_mii_writereg +ffffffff818bc6a0 T lii_mii_statchg +ffffffff818bc710 T lii_media_change +ffffffff818bc760 T lii_media_status +ffffffff818bc7c0 T lii_ioctl +ffffffff818bc950 T lii_start +ffffffff818bcb00 T lii_watchdog +ffffffff818bcb40 T lii_stop +ffffffff818bcbb0 T lii_init +ffffffff818bd0b0 T lii_iff +ffffffff818bd1f0 T lii_tx_put +ffffffff818bd300 T lii_free_tx_space +ffffffff818bd340 T lii_rxintr +ffffffff818bd4f0 T lii_txintr +ffffffff818be000 T ichiic_match +ffffffff818be030 T ichiic_attach +ffffffff818be220 T ichiic_intr +ffffffff818be330 T ichiic_i2c_acquire_bus +ffffffff818be380 T ichiic_i2c_release_bus +ffffffff818be3d0 T ichiic_i2c_exec +ffffffff818bf000 T viapm_match +ffffffff818bf030 T viapm_attach +ffffffff818bf650 T viapm_intr +ffffffff818bf760 T viapm_i2c_acquire_bus +ffffffff818bf7b0 T viapm_i2c_release_bus +ffffffff818bf800 T viapm_i2c_exec +ffffffff818bfb20 T viapm_refresh_sensor_data +ffffffff818bfe50 T viapm_refresh +ffffffff818bfe80 T val_to_uK +ffffffff818bff20 T val_to_rpm +ffffffff818bff60 T val_to_uV +ffffffff818c0000 T viapm_get_timecount +ffffffff818c1000 T amdiic_match +ffffffff818c1030 T amdiic_attach +ffffffff818c1200 T amdiic_intr +ffffffff818c12d0 T amdiic_i2c_acquire_bus +ffffffff818c1320 T amdiic_i2c_release_bus +ffffffff818c1370 T amdiic_i2c_exec +ffffffff818c15d0 T amdiic_read +ffffffff818c1740 T amdiic_wait +ffffffff818c17e0 T amdiic_write +ffffffff818c2000 T nviic_match +ffffffff818c2030 T nviic_attach +ffffffff818c2280 T nviic_i2c_acquire_bus +ffffffff818c22d0 T nviic_i2c_release_bus +ffffffff818c2310 T nviic_i2c_exec +ffffffff818c2530 T nviic_write +ffffffff818c2580 T nviic_read +ffffffff818c3000 T sdhc_pci_match +ffffffff818c3060 T sdhc_pci_attach +ffffffff818c33a0 T sdhc_pci_activate +ffffffff818c3400 T sdhc_takecontroller +ffffffff818c34a0 T sdhc_ricohfix +ffffffff818c3610 T sdhc_pci_conf_write +ffffffff818c4000 T kate_match +ffffffff818c4170 T kate_attach +ffffffff818c4420 T kate_refresh +ffffffff818c5000 T km_match +ffffffff818c5050 T km_attach +ffffffff818c50f0 T km_refresh +ffffffff818c6000 T ksmn_match +ffffffff818c6050 T ksmn_attach +ffffffff818c6240 T ksmn_ccd_attach +ffffffff818c6390 T ksmn_refresh +ffffffff818c64e0 T ksmn_read_reg +ffffffff818c7000 t iosf_pci_match +ffffffff818c7060 t iosf_pci_attach +ffffffff818c7100 t iosf_pci_mbi_mdr_rd +ffffffff818c7160 t iosf_pci_mbi_mdr_wr +ffffffff818c8000 T itherm_probe +ffffffff818c8030 T itherm_attach +ffffffff818c8380 T itherm_activate +ffffffff818c8400 T itherm_enable +ffffffff818c8460 T itherm_refresh +ffffffff818c8470 T itherm_refresh_sensor_data +ffffffff818c8860 T itherm_bias_temperature_sensor +ffffffff818c9000 T pchtemp_match +ffffffff818c9030 T pchtemp_attach +ffffffff818c9190 T pchtemp_refresh +ffffffff818ca000 T rtsx_pci_match +ffffffff818ca090 T rtsx_pci_attach +ffffffff818cb000 T xspd_match +ffffffff818cb030 T xspd_attach +ffffffff818cb1f0 T xspd_intr +ffffffff818cc000 T virtio_pci_match +ffffffff818cc080 T virtio_pci_attach +ffffffff818cc420 T virtio_pci_detach +ffffffff818cc500 T virtio_pci_kick +ffffffff818cc560 T virtio_pci_read_device_config_1 +ffffffff818cc590 T virtio_pci_read_device_config_2 +ffffffff818cc5c0 T virtio_pci_read_device_config_4 +ffffffff818cc5f0 T virtio_pci_read_device_config_8 +ffffffff818cc670 T virtio_pci_write_device_config_1 +ffffffff818cc6a0 T virtio_pci_write_device_config_2 +ffffffff818cc6d0 T virtio_pci_write_device_config_4 +ffffffff818cc700 T virtio_pci_write_device_config_8 +ffffffff818cc770 T virtio_pci_read_queue_size +ffffffff818cc7e0 T virtio_pci_setup_queue +ffffffff818ccad0 T virtio_pci_set_status +ffffffff818ccb50 T virtio_pci_negotiate_features +ffffffff818ccc90 T virtio_pci_poll_intr +ffffffff818ccd00 T virtio_pci_find_cap +ffffffff818ccec0 T virtio_pci_attach_10 +ffffffff818cd300 T virtio_pci_attach_09 +ffffffff818cd440 T virtio_pci_adjust_config_region +ffffffff818cd4e0 T virtio_pci_setup_msix +ffffffff818cd870 T virtio_pci_legacy_intr +ffffffff818cd910 T virtio_pci_legacy_intr_mpsafe +ffffffff818cd9a0 T virtio_pci_free_irqs +ffffffff818cdbf0 T virtio_pci_negotiate_features_10 +ffffffff818cde30 T virtio_pci_msix_establish +ffffffff818cdf00 T virtio_pci_set_msix_queue_vector +ffffffff818cdf80 T virtio_pci_set_msix_config_vector +ffffffff818cdfc0 T virtio_pci_config_intr +ffffffff818ce000 T virtio_pci_shared_queue_intr +ffffffff818ce010 T virtio_pci_queue_intr +ffffffff818cf000 T dwiic_pci_match +ffffffff818cf030 T dwiic_pci_attach +ffffffff818cf350 T dwiic_pci_activate +ffffffff818cf3c0 T dwiic_pci_bus_scan +ffffffff818d0000 T bwfm_pci_buscore_read +ffffffff818d0060 T bwfm_pci_buscore_write +ffffffff818d00d0 T bwfm_pci_buscore_prepare +ffffffff818d0100 T bwfm_pci_buscore_reset +ffffffff818d02f0 T bwfm_pci_buscore_activate +ffffffff818d0320 T bwfm_pci_preinit +ffffffff818d1440 T bwfm_pci_stop +ffffffff818d14d0 T bwfm_pci_txcheck +ffffffff818d1590 T bwfm_pci_txdata +ffffffff818d18f0 T bwfm_pci_msgbuf_query_dcmd +ffffffff818d1d30 T bwfm_pci_msgbuf_set_dcmd +ffffffff818d1d80 T bwfm_pci_match +ffffffff818d1db0 T bwfm_pci_attach +ffffffff818d2020 T bwfm_pci_detach +ffffffff818d2060 T bwfm_pci_activate +ffffffff818d2210 T bwfm_pci_intr +ffffffff818d2470 T bwfm_pci_select_core +ffffffff818d2550 T bwfm_pci_load_microcode +ffffffff818d29d0 T bwfm_pci_dmamem_alloc +ffffffff818d2b70 T bwfm_pci_setup_ring +ffffffff818d2d80 T bwfm_pci_intr_enable +ffffffff818d2dd0 T bwfm_pci_hostready +ffffffff818d2e40 T bwfm_pci_fill_rx_rings +ffffffff818d2e90 T bwfm_pci_dmamem_free +ffffffff818d2f00 T bwfm_pci_cleanup +ffffffff818d3570 T bwfm_pci_send_mb_data +ffffffff818d3690 T bwfm_pci_intmask +ffffffff818d36d0 T bwfm_pci_pktid_avail +ffffffff818d3740 T bwfm_pci_pktid_new +ffffffff818d38a0 T bwfm_pci_pktid_free +ffffffff818d3950 T bwfm_pci_fill_rx_buf_ring +ffffffff818d3cb0 T bwfm_pci_fill_rx_ioctl_ring +ffffffff818d4030 T bwfm_pci_ring_write_reserve +ffffffff818d4120 T bwfm_pci_ring_write_cancel +ffffffff818d4160 T bwfm_pci_ring_write_commit +ffffffff818d4240 T bwfm_pci_ring_write_rptr +ffffffff818d42c0 T bwfm_pci_ring_write_wptr +ffffffff818d4340 T bwfm_pci_setup_flowring +ffffffff818d44a0 T bwfm_pci_ring_bell +ffffffff818d44e0 T bwfm_pci_ring_update_rptr +ffffffff818d4590 T bwfm_pci_ring_update_wptr +ffffffff818d4640 T bwfm_pci_ring_write_reserve_multi +ffffffff818d4760 T bwfm_pci_ring_read_avail +ffffffff818d4860 T bwfm_pci_ring_read_commit +ffffffff818d48f0 T bwfm_pci_ring_rx +ffffffff818d4b00 T bwfm_pci_msg_rx +ffffffff818d50e0 T bwfm_pci_flowring_delete_cb +ffffffff818d5190 T bwfm_pci_msgbuf_rxioctl +ffffffff818d5280 T bwfm_pci_intr_status +ffffffff818d52c0 T bwfm_pci_intr_ack +ffffffff818d5300 T bwfm_pci_flowring_lookup +ffffffff818d5470 T bwfm_pci_flowring_create +ffffffff818d55a0 T bwfm_pci_flowring_create_cb +ffffffff818d58f0 T bwfm_pci_flowring_delete +ffffffff818d5bc0 T bwfm_pci_msgbuf_h2d_mb_write +ffffffff818d5de0 T bwfm_pci_handle_mb_data +ffffffff818d5eb0 T bwfm_pci_intr_disable +ffffffff818d6000 T ccp_pci_match +ffffffff818d6030 T ccp_pci_attach +ffffffff818d7000 T bnxt_match +ffffffff818d7030 T bnxt_attach +ffffffff818d82a0 T bnxt_dmamem_alloc +ffffffff818d8430 T bnxt_dmamem_free +ffffffff818d84c0 T bnxt_hwrm_ver_get +ffffffff818d8610 T bnxt_hwrm_nvm_get_dev_info +ffffffff818d8760 T bnxt_hwrm_func_drv_rgtr +ffffffff818d8880 T bnxt_hwrm_func_rgtr_async_events +ffffffff818d89a0 T bnxt_hwrm_func_qcaps +ffffffff818d8a80 T bnxt_admin_intr +ffffffff818d8c80 T bnxt_intr +ffffffff818d9150 T bnxt_hwrm_func_qcfg +ffffffff818d9200 T bnxt_hwrm_queue_qportcfg +ffffffff818d92d0 T bnxt_hwrm_func_reset +ffffffff818d9380 T bnxt_mark_cpr_invalid +ffffffff818d93e0 T bnxt_hwrm_ring_alloc +ffffffff818d9590 T bnxt_cfg_async_cr +ffffffff818d9690 T bnxt_write_cp_doorbell +ffffffff818d96d0 T bnxt_set_cp_ring_aggint +ffffffff818d97b0 T bnxt_ioctl +ffffffff818d9940 T bnxt_start +ffffffff818d9d00 T bnxt_watchdog +ffffffff818d9d30 T bnxt_media_change +ffffffff818d9e80 T bnxt_media_status +ffffffff818d9ea0 T bnxt_refill +ffffffff818d9f00 T bnxt_media_autonegotiate +ffffffff818d9ff0 T bnxt_hwrm_port_phy_qcfg +ffffffff818da490 T bnxt_free_slots +ffffffff818da520 T bnxt_hwrm_cmd_hdr_init +ffffffff818da570 T hwrm_send_message +ffffffff818da5f0 T bnxt_queue_up +ffffffff818db520 T bnxt_hwrm_stat_ctx_alloc +ffffffff818db620 T bnxt_write_tx_doorbell +ffffffff818db690 T bnxt_write_rx_doorbell +ffffffff818db710 T bnxt_hwrm_ring_grp_alloc +ffffffff818db810 T bnxt_rx_fill +ffffffff818db920 T bnxt_hwrm_ring_grp_free +ffffffff818dba00 T bnxt_hwrm_ring_free +ffffffff818dbaf0 T bnxt_hwrm_stat_ctx_free +ffffffff818dbbe0 T bnxt_queue_down +ffffffff818dc2c0 T bnxt_up +ffffffff818dc990 T bnxt_hwrm_vnic_ctx_alloc +ffffffff818dca70 T bnxt_hwrm_vnic_alloc +ffffffff818dcb70 T bnxt_hwrm_vnic_cfg +ffffffff818dccb0 T bnxt_hwrm_vnic_cfg_placement +ffffffff818dcd80 T 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rge_disable_sim_im +ffffffff81905dd0 T rge_setup_sim_im +ffffffff81905e50 T rge_link_state +ffffffff81905ed0 t rge_kstat_read +ffffffff81906070 t rge_kstat_copy +ffffffff81907000 T igc_match +ffffffff81907030 T igc_attach +ffffffff819074a0 T igc_detach +ffffffff819076a0 T igc_identify_hardware +ffffffff81907710 T igc_allocate_pci_resources +ffffffff81907830 T igc_allocate_queues +ffffffff81907d20 T igc_is_valid_ether_addr +ffffffff81907d80 T igc_allocate_msix +ffffffff81907fe0 T igc_setup_interface +ffffffff81908220 T igc_reset +ffffffff81908360 T igc_update_link_status +ffffffff81908470 T igc_get_hw_control +ffffffff819084d0 T igc_release_hw_control +ffffffff81908530 T igc_free_pci_resources +ffffffff81908610 T igc_stop +ffffffff81908920 T igc_free_transmit_structures +ffffffff819089a0 T igc_free_receive_structures +ffffffff81908a60 T igc_setup_msix +ffffffff81908af0 T igc_dma_malloc +ffffffff81908c60 T igc_rxrefill +ffffffff81908d30 T igc_dma_free +ffffffff81908de0 T igc_init_dmac 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igc_power_down_phy_copper_base +ffffffff8190f000 T igc_init_nvm_params_i225 +ffffffff8190f180 T igc_acquire_nvm_i225 +ffffffff8190f250 T igc_release_nvm_i225 +ffffffff8190f2c0 T igc_get_flash_presence_i225 +ffffffff8190f310 T igc_read_nvm_srrd_i225 +ffffffff8190f3f0 T igc_write_nvm_srwr_i225 +ffffffff8190f5c0 T igc_validate_nvm_checksum_i225 +ffffffff8190f650 T igc_update_nvm_checksum_i225 +ffffffff8190f7f0 T igc_init_mac_params_i225 +ffffffff8190f8b0 T igc_reset_hw_i225 +ffffffff8190f9d0 T igc_init_hw_i225 +ffffffff8190f9e0 T igc_check_for_link_i225 +ffffffff8190faa0 T igc_acquire_swfw_sync_i225 +ffffffff8190fb80 T igc_release_swfw_sync_i225 +ffffffff8190fc00 T igc_setup_copper_link_i225 +ffffffff8190fc90 T igc_init_phy_params_i225 +ffffffff8190fd70 T igc_get_hw_semaphore_i225 +ffffffff8190ff20 T __igc_write_nvm_srwr +ffffffff81910050 T igc_update_flash_i225 +ffffffff81910420 T igc_set_flsw_flash_burst_counter_i225 +ffffffff81910480 T igc_write_erase_flash_command_i225 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igc_setup_copper_link_generic +ffffffff81914a30 T igc_phy_has_link_generic +ffffffff81914b50 T igc_check_downshift_generic +ffffffff81914b80 T igc_phy_hw_reset_generic +ffffffff81914d20 T igc_power_up_phy_copper +ffffffff81914db0 T igc_power_down_phy_copper +ffffffff81914e40 T igc_write_phy_reg_gpy +ffffffff81915030 T igc_write_xmdio_reg +ffffffff81915130 T igc_read_phy_reg_gpy +ffffffff81915330 T igc_read_xmdio_reg +ffffffff81915420 T __igc_access_xmdio_reg +ffffffff81916000 T ngbe_match +ffffffff81916030 T ngbe_attach +ffffffff81916560 T ngbe_detach +ffffffff819167c0 T ngbe_allocate_pci_resources +ffffffff819168c0 T ngbe_allocate_queues +ffffffff81916dc0 T ngbe_allocate_isb +ffffffff81916e50 T ngbe_init_shared_code +ffffffff81917120 T ngbe_check_flash_load +ffffffff819173c0 T ngbe_allocate_msix +ffffffff81917600 T ngbe_setup_interface +ffffffff81917800 T ngbe_free_isb +ffffffff819178e0 T ngbe_free_transmit_structures +ffffffff81917960 T ngbe_free_receive_structures +ffffffff81917a20 T ngbe_free_pci_resources +ffffffff81917ab0 T ngbe_stop +ffffffff81918070 T ngbe_release_hw_control +ffffffff819180f0 T ngbe_init +ffffffff81918760 T ngbe_setup_isb +ffffffff819187d0 T ngbe_configure_pb +ffffffff819188b0 T ngbe_iff +ffffffff81918aa0 T ngbe_setup_vlan_hw_support +ffffffff81918b60 T ngbe_setup_transmit_structures +ffffffff81918c20 T ngbe_initialize_transmit_unit +ffffffff81918fb0 T ngbe_setup_receive_structures +ffffffff819190d0 T ngbe_initialize_receive_unit +ffffffff81919590 T ngbe_get_hw_control +ffffffff81919610 T ngbe_setup_gpie +ffffffff81919640 T ngbe_configure_ivars +ffffffff81919870 T ngbe_non_sfp_link_config +ffffffff81919920 T ngbe_enable_intr +ffffffff81919ad0 T ngbe_ioctl +ffffffff81919d30 T ngbe_rxrinfo +ffffffff81919e80 T ngbe_disable_intr +ffffffff81919f40 T ngbe_media_change +ffffffff81919fe0 T ngbe_media_status +ffffffff8191a0e0 T ngbe_update_link_status +ffffffff8191a300 T ngbe_rxfill +ffffffff8191a430 T ngbe_get_buf +ffffffff8191a570 T ngbe_start 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ngbe_disable_sec_rx_path +ffffffff8191ddc0 T ngbe_enable_sec_rx_path +ffffffff8191de30 T ngbe_enable_rx_dma +ffffffff8191de80 T ngbe_start_hw +ffffffff8191df40 T ngbe_set_rar +ffffffff8191e090 T ngbe_init_rx_addrs +ffffffff8191e250 T ngbe_update_mc_addr_list +ffffffff8191e3f0 T ngbe_enable_rx +ffffffff8191e530 T ngbe_disable_rx +ffffffff8191e650 T ngbe_clear_vfta +ffffffff8191e750 T ngbe_init_uta_tables +ffffffff8191e7d0 T ngbe_fc_enable +ffffffff8191ea70 T ngbe_setup_fc +ffffffff8191eb50 T ngbe_check_mac_link +ffffffff8191ecc0 T ngbe_set_rxpba +ffffffff8191ed60 T ngbe_eepromcheck_cap +ffffffff8191ee20 T ngbe_phy_led_oem_chk +ffffffff8191ef10 T ngbe_set_fw_drv_ver +ffffffff8191f030 T ngbe_init_thermal_sensor_thresh +ffffffff8191f0f0 T ngbe_validate_mac_addr +ffffffff8191f150 T ngbe_fc_autoneg +ffffffff8191f2e0 T ngbe_fc_autoneg_copper +ffffffff8191f3f0 T ngbe_negotiate_fc +ffffffff8191f4a0 T ngbe_fmgr_cmd_op +ffffffff8191f580 T ngbe_flash_read_dword +ffffffff8191f670 T ngbe_calculate_checksum +ffffffff8191f730 T ngbe_check_internal_phy_id +ffffffff8191f870 T ngbe_gphy_wait_mdio_access_on +ffffffff8191f8f0 T ngbe_check_mng_access +ffffffff8191f940 T ngbe_mng_present +ffffffff8191f990 T ngbe_check_reset_blocked +ffffffff8191fa10 T ngbe_set_ivar +ffffffff8191fb00 T ngbe_pbthresh_setup +ffffffff8191fbc0 T ngbe_disable_queue +ffffffff8191fc20 T ngbe_host_interface_command +ffffffff8191fff0 T ngbe_tx_ctx_setup +ffffffff81920080 T ngbe_read_pci_cfg_word +ffffffff819200e0 T ngbe_set_pci_config_data +ffffffff81920170 T ngbe_get_copper_link_capabilities +ffffffff819201c0 T ngbe_get_eeprom_semaphore +ffffffff81920320 T ngbe_release_eeprom_semaphore +ffffffff819203d0 T ngbe_gphy_dis_eee +ffffffff819204f0 T ngbe_gphy_efuse_calibration +ffffffff819208b0 T ngbe_hpbthresh +ffffffff81920940 T ngbe_lpbthresh +ffffffff81920980 T ngbe_mta_vector +ffffffff819209d0 T ngbe_setup_copper_link +ffffffff81920a20 T ngbe_reset_misc +ffffffff81920d80 T ngbe_set_mta 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agp_i810_unbind_page +ffffffff81923700 T agp_i810_flush_tlb +ffffffff81923730 T agp_i810_enable +ffffffff81923760 T agp_i810_get_chiptype +ffffffff819239d0 T intagp_gmch_match +ffffffff81923a30 T agp_i810_configure +ffffffff81923b70 T intagp_write_gtt +ffffffff81924000 T dma_resv_init +ffffffff81924060 T dma_resv_fini +ffffffff81924160 T dma_resv_reserve_fences +ffffffff81924310 T dma_resv_add_fence +ffffffff81924480 T dma_resv_replace_fences +ffffffff81924530 T dma_resv_iter_first_unlocked +ffffffff819245c0 t dma_resv_iter_walk_unlocked +ffffffff819246b0 T dma_resv_iter_next_unlocked +ffffffff81924740 T dma_resv_iter_first +ffffffff819247c0 T dma_resv_iter_next +ffffffff81924820 T dma_resv_copy_fences +ffffffff81924bc0 T dma_resv_get_fences +ffffffff81924f70 T dma_resv_get_singleton +ffffffff81925070 T dma_resv_wait_timeout +ffffffff81925340 T dma_resv_test_signaled +ffffffff81925490 T dma_resv_describe +ffffffff81926000 T drm_legacy_agp_info +ffffffff819260b0 T drm_legacy_agp_acquire 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drm_atomic_get_old_private_obj_state +ffffffff81928ee0 T drm_atomic_get_new_private_obj_state +ffffffff81928f40 T drm_atomic_get_old_connector_for_encoder +ffffffff81928fb0 T drm_atomic_get_new_connector_for_encoder +ffffffff81929020 T drm_atomic_get_connector_state +ffffffff81929250 T drm_atomic_get_bridge_state +ffffffff81929260 T drm_atomic_get_old_bridge_state +ffffffff819292c0 T drm_atomic_get_new_bridge_state +ffffffff81929320 T drm_atomic_add_encoder_bridges +ffffffff819293e0 T drm_atomic_add_affected_connectors +ffffffff81929510 T drm_atomic_add_affected_planes +ffffffff81929630 T drm_atomic_check_only +ffffffff8192a0e0 T drm_atomic_commit +ffffffff8192a1b0 T drm_atomic_print_new_state +ffffffff8192a3b0 T drm_atomic_nonblocking_commit +ffffffff8192a450 T __drm_atomic_helper_disable_plane +ffffffff8192a4d0 T __drm_atomic_helper_set_config +ffffffff8192a850 t drm_atomic_plane_print_state +ffffffff8192aa70 t drm_atomic_crtc_print_state +ffffffff8192acd0 t drm_atomic_connector_print_state +ffffffff8192ade0 T drm_state_dump +ffffffff8192b000 T drm_atomic_helper_check_modeset +ffffffff8192bf30 t handle_conflicting_encoders +ffffffff8192c220 T drm_atomic_helper_check_wb_encoder_state +ffffffff8192c280 T drm_atomic_helper_check_plane_state +ffffffff8192c630 T drm_atomic_helper_check_crtc_state +ffffffff8192c6e0 T drm_atomic_helper_check_planes +ffffffff8192c990 T drm_atomic_helper_check +ffffffff8192ca40 T drm_atomic_helper_async_check +ffffffff8192cd60 T drm_atomic_helper_update_legacy_modeset_state +ffffffff8192cfd0 T drm_atomic_helper_calc_timestamping_constants +ffffffff8192d070 T drm_atomic_helper_commit_modeset_disables +ffffffff8192d6c0 T drm_atomic_helper_commit_modeset_enables +ffffffff8192d9b0 T drm_atomic_helper_wait_for_fences +ffffffff8192dab0 T drm_atomic_helper_wait_for_vblanks +ffffffff8192de20 T drm_atomic_helper_wait_for_flip_done +ffffffff8192dfe0 T drm_atomic_helper_commit_tail +ffffffff8192e170 T drm_atomic_helper_commit_planes +ffffffff8192e430 T drm_atomic_helper_fake_vblank +ffffffff8192e510 T drm_atomic_helper_commit_hw_done +ffffffff8192e6d0 T drm_atomic_helper_cleanup_planes +ffffffff8192e780 T drm_atomic_helper_commit_tail_rpm +ffffffff8192e910 T drm_atomic_helper_async_commit +ffffffff8192eba0 T drm_atomic_helper_commit +ffffffff8192ee60 T drm_atomic_helper_prepare_planes +ffffffff8192f010 T drm_atomic_helper_setup_commit +ffffffff8192f8a0 t commit_work +ffffffff8192f8c0 T drm_atomic_helper_swap_state +ffffffff8192ff30 t commit_tail +ffffffff81930210 t release_crtc_commit +ffffffff81930250 T drm_atomic_helper_wait_for_dependencies +ffffffff81930450 T drm_atomic_helper_commit_cleanup_done +ffffffff819306c0 T drm_atomic_helper_commit_planes_on_crtc +ffffffff819308f0 T drm_atomic_helper_disable_planes_on_crtc +ffffffff81930a50 T drm_atomic_helper_update_plane +ffffffff81930b80 T drm_atomic_helper_disable_plane +ffffffff81930c40 T drm_atomic_helper_set_config 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drm_atomic_helper_bridge_duplicate_state +ffffffff81932cf0 T drm_atomic_helper_bridge_destroy_state +ffffffff81932d10 T __drm_atomic_helper_bridge_reset +ffffffff81932d60 T drm_atomic_helper_bridge_reset +ffffffff81933000 T drm_atomic_set_mode_for_crtc +ffffffff81933200 T drm_atomic_set_mode_prop_for_crtc +ffffffff81933490 T drm_atomic_set_crtc_for_plane +ffffffff81933600 T drm_atomic_set_fb_for_plane +ffffffff819336e0 T drm_atomic_set_crtc_for_connector +ffffffff81933840 T drm_atomic_get_property +ffffffff81933f80 T drm_atomic_connector_commit_dpms +ffffffff819340e0 T drm_atomic_set_property +ffffffff81934b90 T drm_mode_atomic_ioctl +ffffffff81936000 T drm_is_current_master +ffffffff81936060 T drm_getmagic +ffffffff81936130 T drm_authmagic +ffffffff819361f0 T drm_master_create +ffffffff81936290 T drm_setmaster_ioctl +ffffffff81936350 t drm_new_set_master +ffffffff819364e0 T drm_dropmaster_ioctl +ffffffff81936630 T drm_master_open +ffffffff819366e0 T drm_master_get +ffffffff81936710 T drm_master_release +ffffffff81936860 T drm_master_put +ffffffff819368f0 T drm_file_get_master +ffffffff81936950 T drm_master_internal_acquire +ffffffff819369c0 T drm_master_internal_release +ffffffff81937000 T drm_plane_create_alpha_property +ffffffff819370a0 T drm_plane_create_rotation_property +ffffffff819371e0 T drm_rotation_simplify +ffffffff81937260 T drm_plane_create_zpos_property +ffffffff81937320 T drm_plane_create_zpos_immutable_property +ffffffff819373d0 T drm_atomic_normalize_zpos +ffffffff819376d0 T drm_plane_create_blend_mode_property +ffffffff81937870 t drm_atomic_state_zpos_cmp +ffffffff81938000 T drm_bridge_add +ffffffff81938070 T devm_drm_bridge_add +ffffffff81938110 T drm_bridge_remove +ffffffff81938170 T drm_bridge_attach +ffffffff819382f0 T drm_bridge_detach +ffffffff819383e0 T drm_bridge_chain_mode_fixup +ffffffff81938480 T drm_bridge_chain_mode_valid +ffffffff81938520 T drm_bridge_chain_disable +ffffffff819385b0 T drm_bridge_chain_post_disable +ffffffff81938630 T drm_bridge_chain_mode_set +ffffffff819386c0 T drm_bridge_chain_pre_enable +ffffffff81938750 T drm_bridge_chain_enable +ffffffff819387d0 T drm_atomic_bridge_chain_disable +ffffffff819388d0 T drm_atomic_bridge_chain_post_disable +ffffffff81938b00 T drm_atomic_bridge_chain_pre_enable +ffffffff81938d40 T drm_atomic_bridge_chain_enable +ffffffff81938e50 T drm_atomic_bridge_chain_check +ffffffff819391b0 T drm_bridge_detect +ffffffff81939210 T drm_bridge_get_modes +ffffffff81939270 T drm_bridge_get_edid +ffffffff819392d0 T drm_bridge_hpd_enable +ffffffff819393a0 T drm_bridge_hpd_disable +ffffffff81939440 T drm_bridge_hpd_notify +ffffffff819394a0 t drm_bridge_atomic_duplicate_priv_state +ffffffff819394c0 t drm_bridge_atomic_destroy_priv_state +ffffffff819394e0 t select_bus_fmt_recursive +ffffffff8193a000 T drm_buddy_init +ffffffff8193a470 T drm_buddy_fini +ffffffff8193a570 T drm_get_buddy +ffffffff8193a5b0 T drm_buddy_free_block +ffffffff8193a750 T drm_buddy_free_list +ffffffff8193a7e0 T drm_buddy_block_trim +ffffffff8193aa30 t __alloc_range +ffffffff8193ae00 T drm_buddy_alloc_blocks +ffffffff8193b6a0 T drm_buddy_block_print +ffffffff8193b6e0 T drm_buddy_print +ffffffff8193b850 T drm_buddy_module_exit +ffffffff8193b870 T drm_buddy_module_init +ffffffff8193b8d0 t split_block +ffffffff8193c000 T drm_clflush_pages +ffffffff8193c120 T drm_clflush_sg +ffffffff8193c270 T drm_clflush_virt_range +ffffffff8193c340 T drm_need_swiotlb +ffffffff8193c370 T drm_memcpy_from_wc +ffffffff8193c710 T drm_memcpy_init_early +ffffffff8193d000 T drm_client_init +ffffffff8193d110 T drm_client_register +ffffffff8193d1c0 T drm_client_release +ffffffff8193d260 T drm_client_dev_unregister +ffffffff8193d350 T drm_client_dev_hotplug +ffffffff8193d430 T drm_client_dev_restore +ffffffff8193d510 T drm_client_buffer_vmap +ffffffff8193d580 T drm_client_buffer_vunmap +ffffffff8193d5a0 T drm_client_framebuffer_create +ffffffff8193d880 T drm_client_framebuffer_delete +ffffffff8193d980 T drm_client_framebuffer_flush +ffffffff8193e000 T drm_client_modeset_create +ffffffff8193e140 T drm_client_modeset_free +ffffffff8193e260 T drm_client_modeset_probe +ffffffff8193fa50 t drm_client_pick_crtcs +ffffffff8193fd40 T drm_client_rotation +ffffffff8193fee0 T drm_client_modeset_check +ffffffff8193ff80 t drm_client_modeset_commit_atomic +ffffffff81940180 T drm_client_modeset_commit_locked +ffffffff81940320 T drm_client_modeset_commit +ffffffff81940390 T drm_client_modeset_dpms +ffffffff819405e0 t drm_connector_pick_cmdline_mode +ffffffff81941000 T drm_color_ctm_s31_32_to_qm_n +ffffffff819410e0 T drm_crtc_enable_color_mgmt +ffffffff819411c0 T drm_mode_crtc_set_gamma_size +ffffffff819412e0 T drm_mode_gamma_set_ioctl +ffffffff819417d0 T drm_mode_gamma_get_ioctl +ffffffff81941910 T drm_get_color_encoding_name +ffffffff81941980 T drm_get_color_range_name +ffffffff819419f0 T drm_plane_create_color_properties +ffffffff81941c50 T drm_color_lut_check +ffffffff81942000 T drm_connector_ida_init +ffffffff81942110 T drm_connector_ida_destroy +ffffffff81942220 T drm_get_connector_type_name +ffffffff81942260 T drm_connector_free_work_fn +ffffffff81942320 T drm_connector_init +ffffffff819423a0 t __drm_connector_init +ffffffff819428b0 T drm_connector_init_with_ddc +ffffffff81942940 T drmm_connector_init +ffffffff81942a00 t drm_connector_cleanup_action +ffffffff81942a20 T drm_connector_attach_edid_property +ffffffff81942a40 T drm_connector_attach_encoder +ffffffff81942ac0 T drm_connector_has_possible_encoder +ffffffff81942b00 T drm_connector_cleanup +ffffffff81942e30 T drm_connector_unregister +ffffffff81942ed0 T drm_mode_put_tile_group +ffffffff81942f60 T drm_connector_register +ffffffff81943050 T drm_connector_unregister_all +ffffffff819431f0 T drm_connector_list_iter_begin +ffffffff81943230 T drm_connector_list_iter_next +ffffffff81943340 T drm_connector_list_iter_end +ffffffff81943410 T drm_connector_register_all +ffffffff819435a0 T drm_get_connector_status_name +ffffffff819435f0 T drm_get_connector_force_name +ffffffff81943630 T drm_get_subpixel_order_name +ffffffff81943670 T drm_get_dpms_name +ffffffff819436b0 T drm_display_info_set_bus_formats +ffffffff81943780 T drm_get_dvi_i_select_name +ffffffff819437e0 T drm_get_dvi_i_subconnector_name +ffffffff81943840 T drm_get_tv_select_name +ffffffff819438a0 T drm_get_tv_subconnector_name +ffffffff81943900 T drm_get_dp_subconnector_name +ffffffff81943990 T drm_connector_create_standard_properties +ffffffff81943b10 T drm_mode_create_dvi_i_properties +ffffffff81943bb0 T drm_connector_attach_dp_subconnector_property +ffffffff81943c20 T drm_connector_attach_content_type_property +ffffffff81943cc0 T drm_mode_create_content_type_property +ffffffff81943d40 T drm_connector_attach_tv_margin_properties +ffffffff81943db0 T drm_mode_create_tv_margin_properties +ffffffff81943ed0 T drm_mode_create_tv_properties +ffffffff81944130 T drm_mode_create_scaling_mode_property +ffffffff819441a0 T drm_connector_attach_vrr_capable_property +ffffffff81944230 T drm_connector_attach_scaling_mode_property +ffffffff81944400 T drm_mode_create_aspect_ratio_property +ffffffff81944480 T drm_mode_create_hdmi_colorspace_property +ffffffff81944500 T drm_mode_create_dp_colorspace_property +ffffffff81944580 T drm_mode_create_suggested_offset_properties +ffffffff81944650 T drm_connector_set_path_property +ffffffff819446b0 T drm_connector_set_tile_property +ffffffff81944800 T drm_connector_set_link_status_property +ffffffff81944850 T drm_connector_attach_max_bpc_property +ffffffff81944910 T drm_connector_attach_hdr_output_metadata_property +ffffffff81944960 T drm_connector_attach_colorspace_property +ffffffff819449b0 T drm_connector_atomic_hdr_metadata_equal +ffffffff81944a20 T drm_connector_set_vrr_capable_property +ffffffff81944a70 T drm_connector_set_panel_orientation +ffffffff81944b30 T drm_connector_set_panel_orientation_with_quirk +ffffffff81944c10 T drm_connector_set_orientation_from_panel +ffffffff81944d00 T drm_connector_create_privacy_screen_properties +ffffffff81944da0 T drm_connector_attach_privacy_screen_properties +ffffffff81944e10 T drm_connector_attach_privacy_screen_provider +ffffffff81944f20 t drm_connector_privacy_screen_notifier +ffffffff81944fc0 T drm_connector_update_privacy_screen +ffffffff81945030 T drm_connector_set_obj_prop +ffffffff81945110 T drm_connector_property_set_ioctl +ffffffff81945170 T drm_mode_getconnector +ffffffff819456b0 T drm_connector_find_by_fwnode +ffffffff81945760 T drm_connector_oob_hotplug_event +ffffffff81945850 T drm_mode_get_tile_group +ffffffff81945920 T drm_mode_create_tile_group +ffffffff819459f0 t drm_connector_free +ffffffff81945a30 t kasprintf +ffffffff81946000 T drm_crtc_from_index +ffffffff81946060 T drm_crtc_force_disable +ffffffff81946180 T drm_mode_set_config_internal +ffffffff81946200 T drm_crtc_register_all +ffffffff81946290 T drm_crtc_unregister_all +ffffffff81946300 T drm_crtc_create_fence +ffffffff81946390 T drm_crtc_init_with_planes +ffffffff81946460 t __drm_crtc_init_with_planes +ffffffff81946850 T drmm_crtc_init_with_planes +ffffffff81946950 T __drmm_crtc_alloc_with_planes +ffffffff81946ac0 T drm_crtc_cleanup +ffffffff81946be0 T drm_mode_getcrtc +ffffffff81946d80 t __drm_mode_set_config_internal +ffffffff81946f20 T drm_crtc_check_viewport +ffffffff81946fd0 T drm_mode_setcrtc +ffffffff81947730 T drm_mode_crtc_set_obj_prop +ffffffff819477b0 T drm_crtc_create_scaling_filter_property +ffffffff81947820 t drm_crtc_fence_get_driver_name +ffffffff819478a0 t drm_crtc_fence_get_timeline_name +ffffffff81947910 t kasprintf +ffffffff819479e0 t drmm_crtc_init_with_planes_cleanup +ffffffff81948000 T drm_helper_encoder_in_use +ffffffff81948180 T drm_helper_crtc_in_use +ffffffff819482b0 T drm_helper_disable_unused_functions +ffffffff81948330 t __drm_helper_disable_unused_functions +ffffffff81948430 T drm_crtc_helper_set_mode +ffffffff819488e0 T drm_connector_get_single_encoder +ffffffff819489e0 T drm_crtc_helper_set_config +ffffffff81949600 T drm_helper_connector_dpms +ffffffff819498f0 T drm_helper_resume_force_mode +ffffffff81949be0 T drm_helper_force_disable_all +ffffffff81949cb0 t drm_encoder_disable +ffffffff8194a000 T drm_atomic_helper_check_plane_damage +ffffffff8194a0a0 T drm_atomic_helper_dirtyfb +ffffffff8194a350 T drm_atomic_helper_damage_iter_init +ffffffff8194a4a0 T drm_atomic_helper_damage_iter_next +ffffffff8194a540 T drm_atomic_helper_damage_merged +ffffffff8194b000 T displayid_iter_edid_begin +ffffffff8194b050 T __displayid_iter_next +ffffffff8194b310 T displayid_iter_end +ffffffff8194c000 T drm_mode_create_dumb +ffffffff8194c0c0 T drm_mode_create_dumb_ioctl +ffffffff8194c180 T drm_mode_mmap_dumb_ioctl +ffffffff8194c1f0 T drm_mode_destroy_dumb +ffffffff8194c260 T drm_mode_destroy_dumb_ioctl +ffffffff8194d000 T drm_edid_header_is_valid +ffffffff8194d080 T drm_edid_are_equal +ffffffff8194d0f0 T drm_edid_block_valid +ffffffff8194d2f0 t edid_block_check +ffffffff8194d420 t edid_block_status_print +ffffffff8194d520 T drm_edid_is_valid +ffffffff8194d5a0 T drm_edid_override_set +ffffffff8194d610 T drm_connector_update_edid_property +ffffffff8194d7c0 T drm_edid_override_reset +ffffffff8194d8f0 T drm_add_override_edid_modes +ffffffff8194dad0 T drm_add_edid_modes +ffffffff8194dbc0 T drm_do_get_edid +ffffffff8194dbe0 t _drm_do_get_edid +ffffffff8194e0f0 T drm_edid_raw +ffffffff8194e180 T drm_edid_alloc +ffffffff8194e250 T drm_edid_dup +ffffffff8194e330 T drm_edid_free +ffffffff8194e390 T drm_probe_ddc +ffffffff8194e490 t drm_do_probe_ddc_edid +ffffffff8194e5e0 T drm_get_edid +ffffffff8194e720 T drm_edid_read_custom +ffffffff8194e810 T drm_edid_read_ddc +ffffffff8194e940 T drm_edid_read +ffffffff8194e9c0 T drm_edid_get_panel_id +ffffffff8194eaa0 t edid_block_read +ffffffff8194ed10 T drm_get_edid_switcheroo +ffffffff8194ed60 T drm_edid_duplicate +ffffffff8194ede0 T drm_mode_find_dmt +ffffffff8194ef00 T drm_mode_fixup_1366x768 +ffffffff8194ef60 T drm_find_edid_extension +ffffffff8194f170 T drm_match_cea_mode +ffffffff8194f3c0 T drm_display_mode_from_cea_vic +ffffffff8194f430 T drm_edid_get_monitor_name +ffffffff8194f4e0 t get_monitor_name +ffffffff8194f840 T drm_edid_to_sad +ffffffff8194fa50 T drm_edid_to_speaker_allocation +ffffffff8194fc00 T drm_av_sync_delay +ffffffff8194fcb0 T drm_detect_hdmi_monitor +ffffffff8194fdd0 T drm_detect_monitor_audio +ffffffff8194ffe0 T drm_default_rgb_quant_range +ffffffff81950020 T drm_edid_connector_update +ffffffff81950080 t _drm_edid_connector_update +ffffffff81951f30 t _drm_update_tile_info +ffffffff819521c0 t _drm_edid_connector_property_update +ffffffff81952370 T drm_add_modes_noedid +ffffffff81952460 T drm_set_preferred_mode +ffffffff819524c0 T drm_hdmi_avi_infoframe_from_display_mode +ffffffff81952740 T drm_hdmi_avi_infoframe_quant_range +ffffffff819527e0 T drm_hdmi_vendor_infoframe_from_display_mode +ffffffff819528a0 t connector_bad_edid +ffffffff81952a60 t drm_for_each_detailed_block +ffffffff81952cb0 t __cea_db_iter_next +ffffffff81952f50 t update_display_info +ffffffff81953e20 t get_monitor_range +ffffffff81953ec0 t do_detailed_mode +ffffffff819547e0 t hdmi_mode_alternate_clock +ffffffff81954890 t do_cvt_mode +ffffffff81954ae0 t drm_mode_std +ffffffff819557f0 t do_standard_modes +ffffffff81955940 t drm_monitor_supports_rb +ffffffff81955c30 t drm_gtf2_hbreak +ffffffff81955ec0 t do_established_modes +ffffffff819560c0 t drm_match_hdmi_mode +ffffffff81956300 t do_inferred_modes +ffffffff81956870 t mode_in_range +ffffffff81957000 T drm_encoder_register_all +ffffffff81957090 T drm_encoder_unregister_all +ffffffff81957100 T drm_encoder_init +ffffffff819571d0 t __drm_encoder_init +ffffffff81957390 T drm_encoder_cleanup +ffffffff819574c0 T __drmm_encoder_alloc +ffffffff819575e0 T drmm_encoder_init +ffffffff819576c0 T drm_mode_getencoder +ffffffff81957820 t kasprintf +ffffffff819578f0 t drmm_encoder_alloc_release +ffffffff81958000 T drm_i2c_encoder_dpms +ffffffff81958020 T drm_i2c_encoder_mode_fixup +ffffffff81958060 T drm_i2c_encoder_prepare +ffffffff81958080 T drm_i2c_encoder_commit +ffffffff819580a0 T drm_i2c_encoder_mode_set +ffffffff819580c0 T drm_i2c_encoder_detect +ffffffff819580e0 T drm_i2c_encoder_save +ffffffff81958100 T drm_i2c_encoder_restore +ffffffff81959000 T drm_fb_helper_debug_enter +ffffffff81959100 T drm_fb_helper_debug_leave +ffffffff81959270 T drm_fb_helper_restore_fbdev_mode_unlocked +ffffffff81959310 T drm_fb_helper_blank +ffffffff819593a0 T drm_fb_helper_prepare +ffffffff81959480 t drm_fb_helper_resume_worker +ffffffff819594b0 t drm_fb_helper_damage_work +ffffffff81959830 T drm_fb_helper_init +ffffffff819598a0 T drm_fb_helper_alloc_fbi +ffffffff81959900 T drm_fb_helper_unregister_fbi +ffffffff81959930 T drm_fb_helper_fini +ffffffff81959a30 T drm_fb_helper_set_suspend +ffffffff81959a60 T drm_fb_helper_set_suspend_unlocked +ffffffff81959a90 T drm_fb_helper_set_par +ffffffff81959b80 T drm_fb_helper_pan_display +ffffffff81959c50 T drm_fb_helper_fill_info +ffffffff81959d10 T drm_fb_helper_initial_config +ffffffff81959d40 t __drm_fb_helper_initial_config_and_unlock +ffffffff8195a290 T drm_fb_helper_hotplug_event +ffffffff8195a490 t drm_setup_crtcs_fb +ffffffff8195a5d0 T drm_fb_helper_lastclose +ffffffff8195a680 T drm_fb_helper_output_poll_changed +ffffffff8195a6a0 T drm_fbdev_generic_setup +ffffffff8195a820 t drm_fbdev_client_unregister +ffffffff8195a890 t drm_fbdev_client_restore +ffffffff8195a930 t drm_fbdev_client_hotplug +ffffffff8195ab60 t drm_fbdev_cleanup +ffffffff8195ac00 t drm_fbdev_use_shadow_fb +ffffffff8195ac50 t drm_fb_helper_generic_probe +ffffffff8195b000 T drm_dev_needs_global_mutex +ffffffff8195b060 T drm_file_alloc +ffffffff8195b2c0 T drm_file_free +ffffffff8195b4f0 T drm_lastclose +ffffffff8195b560 T drm_release +ffffffff8195b5b0 T drm_release_noglobal +ffffffff8195b600 T drm_read +ffffffff8195b650 T drm_event_reserve_init_locked +ffffffff8195b6d0 T drm_event_reserve_init +ffffffff8195b790 T drm_event_cancel_free +ffffffff8195b810 T drm_send_event_timestamp_locked +ffffffff8195b820 t drm_send_event_helper +ffffffff8195b9f0 T drm_send_event_locked +ffffffff8195ba10 T drm_send_event +ffffffff8195ba60 T mock_drm_getfile +ffffffff8195c000 T drm_flip_work_allocate_task +ffffffff8195c060 T drm_flip_work_queue_task +ffffffff8195c0b0 T drm_flip_work_queue +ffffffff8195c150 T drm_flip_work_commit +ffffffff8195c1d0 T drm_flip_work_init +ffffffff8195c240 t flip_worker +ffffffff8195c320 T drm_flip_work_cleanup +ffffffff8195d000 T drm_fb_clip_offset +ffffffff8195d040 T drm_fb_memcpy +ffffffff8195d2c0 T drm_fb_swab +ffffffff8195d3c0 t drm_fb_swab32_line +ffffffff8195d420 t drm_fb_swab16_line +ffffffff8195d480 t drm_fb_xfrm +ffffffff8195d740 T drm_fb_xrgb8888_to_rgb332 +ffffffff8195d7a0 t drm_fb_xrgb8888_to_rgb332_line +ffffffff8195d890 T drm_fb_xrgb8888_to_rgb565 +ffffffff8195d910 t drm_fb_xrgb8888_to_rgb565_swab_line +ffffffff8195d990 t drm_fb_xrgb8888_to_rgb565_line +ffffffff8195da80 T drm_fb_xrgb8888_to_rgb888 +ffffffff8195dae0 t drm_fb_xrgb8888_to_rgb888_line +ffffffff8195db70 T drm_fb_xrgb8888_to_xrgb2101010 +ffffffff8195dbd0 t drm_fb_xrgb8888_to_xrgb2101010_line +ffffffff8195dc50 T drm_fb_xrgb8888_to_gray8 +ffffffff8195dcb0 t drm_fb_xrgb8888_to_gray8_line +ffffffff8195dd30 T drm_fb_blit +ffffffff8195e180 T drm_fb_xrgb8888_to_mono +ffffffff8195e510 T drm_fb_build_fourcc_list +ffffffff8195e830 t drm_fb_rgb888_to_xrgb8888_line +ffffffff8195e900 t drm_fb_rgb565_to_xrgb8888_line +ffffffff8195f000 T drm_mode_legacy_fb_format +ffffffff8195f0f0 T drm_driver_legacy_fb_format +ffffffff8195f1f0 T __drm_format_info +ffffffff8195f270 T drm_format_info +ffffffff8195f330 T drm_get_format_info +ffffffff8195f410 T drm_format_info_block_width +ffffffff8195f460 T drm_format_info_block_height +ffffffff8195f4b0 T drm_format_info_bpp +ffffffff8195f530 T drm_format_info_min_pitch +ffffffff81960000 T drm_framebuffer_check_src_coords +ffffffff81960120 T drm_mode_addfb +ffffffff81960330 T drm_mode_addfb2 +ffffffff81960420 T drm_mode_addfb_ioctl +ffffffff81960440 T drm_internal_framebuffer_create +ffffffff81960960 T drm_mode_addfb2_ioctl +ffffffff81960a50 T drm_mode_rmfb +ffffffff81960c20 T drm_framebuffer_lookup +ffffffff81960c70 t drm_mode_rmfb_work_fn +ffffffff81960d30 T drm_mode_rmfb_ioctl +ffffffff81960d50 T drm_mode_getfb +ffffffff81960eb0 T drm_mode_getfb2_ioctl +ffffffff81961260 T drm_mode_dirtyfb_ioctl +ffffffff81961400 T drm_fb_release +ffffffff81961510 T drm_framebuffer_free +ffffffff81961550 T drm_framebuffer_init +ffffffff819616b0 T drm_framebuffer_unregister_private +ffffffff819616f0 T drm_framebuffer_cleanup +ffffffff81961750 T drm_framebuffer_remove +ffffffff81961c00 T drm_framebuffer_plane_width +ffffffff81961c50 T drm_framebuffer_plane_height +ffffffff81961ca0 T drm_framebuffer_print_info +ffffffff81962000 T drm_ref +ffffffff81962030 T drm_unref +ffffffff819620b0 T drm_fault +ffffffff81962270 T drm_flush +ffffffff819622a0 T udv_attach_drm +ffffffff819624c0 T drm_gem_init +ffffffff81962570 t drm_gem_init_release +ffffffff81962590 T drm_gem_object_init +ffffffff819626f0 T drm_gem_private_object_init +ffffffff819627f0 T drm_gem_handle_delete +ffffffff819628e0 t drm_gem_object_release_handle +ffffffff81962970 T drm_gem_dumb_map_offset +ffffffff81962aa0 T drm_gem_object_lookup +ffffffff81962b20 T drm_gem_create_mmap_offset +ffffffff81962b50 T drm_gem_dumb_destroy +ffffffff81962b70 T drm_gem_handle_create_tail +ffffffff81962ce0 t drm_gem_object_handle_put_unlocked +ffffffff81962e30 T drm_gem_handle_create +ffffffff81962e80 T drm_gem_free_mmap_offset +ffffffff81962eb0 T drm_gem_create_mmap_offset_size +ffffffff81962ee0 T drm_gem_get_pages +ffffffff81962f30 T drm_gem_put_pages +ffffffff81962f60 T drm_gem_objects_lookup +ffffffff819630d0 T drm_gem_dma_resv_wait +ffffffff81963210 T drm_gem_close_ioctl +ffffffff81963260 T drm_gem_flink_ioctl +ffffffff819633d0 T drm_gem_open_ioctl +ffffffff81963500 T drm_gem_open +ffffffff81963530 T drm_gem_release +ffffffff81963570 T drm_gem_object_release +ffffffff819636c0 T drm_gem_lru_remove +ffffffff819637a0 T drm_gem_object_free +ffffffff819637f0 T drm_gem_mmap_obj +ffffffff81963900 T drm_gem_mmap +ffffffff81963b80 T drm_gem_print_info +ffffffff81963ca0 T drm_gem_pin +ffffffff81963ce0 T drm_gem_unpin +ffffffff81963d20 T drm_gem_vmap +ffffffff81963d80 T drm_gem_vunmap +ffffffff81963df0 T drm_gem_lock_reservations +ffffffff81964060 T drm_gem_unlock_reservations +ffffffff81964150 T drm_gem_lru_init +ffffffff81964190 T drm_gem_lru_move_tail +ffffffff81964280 T drm_gem_lru_scan +ffffffff81964660 t __ww_mutex_lock +ffffffff81965000 T drm_gem_plane_helper_prepare_fb +ffffffff81966000 T drm_gem_fb_destroy +ffffffff819660c0 T drm_gem_fb_create_handle +ffffffff81967000 T drm_ht_create +ffffffff81967080 T drm_ht_verbose_list +ffffffff81967140 T drm_ht_insert_item +ffffffff81967190 T drm_ht_just_insert_please +ffffffff81967260 T drm_ht_find_item +ffffffff819672b0 T drm_ht_remove_key +ffffffff81967300 T drm_ht_remove_item +ffffffff81967350 T drm_ht_remove +ffffffff81968000 T drm_getunique +ffffffff819680a0 T drm_getclient +ffffffff81968110 T drm_noop +ffffffff81968160 T drm_invalid_op +ffffffff81968190 T drm_version +ffffffff819683b0 T pledge_ioctl_drm +ffffffff81968470 T drm_ioctl_kernel +ffffffff819684c0 T drm_ioctl +ffffffff81968510 T drm_ioctl_flags +ffffffff81968570 T drm_do_ioctl +ffffffff819688c0 T drmioctl +ffffffff81968a10 t drm_getstats +ffffffff81968a60 t drm_setversion +ffffffff81968bc0 t drm_getcap +ffffffff81968db0 t drm_setclientcap +ffffffff81969000 T tasklet_unlock_wait +ffffffff81969080 T tasklet_unlock_spin_wait +ffffffff81969100 T tasklet_run +ffffffff81969180 T set_current_state +ffffffff81969220 T __set_current_state +ffffffff819692b0 T schedule +ffffffff819692f0 T schedule_timeout +ffffffff819693a0 T schedule_timeout_uninterruptible +ffffffff81969400 T wake_up_process +ffffffff81969480 T autoremove_wake_function +ffffffff81969530 T prepare_to_wait +ffffffff81969620 T finish_wait +ffffffff819696d0 T flush_workqueue +ffffffff81969710 T flush_work +ffffffff81969760 T flush_delayed_work +ffffffff81969800 T kthread_func +ffffffff81969840 T kthread_run +ffffffff81969920 T kthread_create_worker +ffffffff819699e0 T kthread_destroy_worker +ffffffff81969a20 T kthread_init_work +ffffffff81969a40 T kthread_queue_work +ffffffff81969a80 T kthread_cancel_work_sync +ffffffff81969ac0 T kthread_flush_work +ffffffff81969b00 T kthread_flush_worker +ffffffff81969b40 T kthread_lookup +ffffffff81969bc0 T kthread_should_park +ffffffff81969c40 T kthread_parkme +ffffffff81969d00 T kthread_park +ffffffff81969e00 T kthread_unpark +ffffffff81969e60 T kthread_should_stop +ffffffff81969ee0 T kthread_stop +ffffffff8196a040 T dmi_match +ffffffff8196a0f0 T dmi_first_match +ffffffff8196a1d0 T dmi_get_system_info +ffffffff8196a240 T dmi_check_system +ffffffff8196a340 T alloc_pages +ffffffff8196a410 T __free_pages +ffffffff8196a510 T __pagevec_release +ffffffff8196a5c0 T kmap +ffffffff8196a600 T kunmap_va +ffffffff8196a620 T kmap_atomic_prot +ffffffff8196a6b0 T kunmap_atomic +ffffffff8196a730 T vmap +ffffffff8196a810 T vunmap +ffffffff8196a860 T is_vmalloc_addr +ffffffff8196a8a0 T print_hex_dump +ffffffff8196a970 T memchr_inv +ffffffff8196a9c0 T panic_cmp +ffffffff8196a9e0 T linux_root_RB_INSERT_COLOR +ffffffff8196abe0 T linux_root_RB_REMOVE_COLOR +ffffffff8196af20 T linux_root_RB_REMOVE +ffffffff8196b050 T linux_root_RB_INSERT +ffffffff8196b0c0 T linux_root_RB_FIND +ffffffff8196b110 T linux_root_RB_NFIND +ffffffff8196b160 T linux_root_RB_NEXT +ffffffff8196b1d0 T linux_root_RB_PREV +ffffffff8196b240 T linux_root_RB_MINMAX +ffffffff8196b290 T idr_init +ffffffff8196b2c0 T idr_destroy +ffffffff8196b400 T idr_tree_SPLAY_REMOVE +ffffffff8196b480 T idr_preload +ffffffff8196b510 T idr_alloc +ffffffff8196b6b0 T idr_tree_SPLAY_INSERT +ffffffff8196b750 T idr_replace +ffffffff8196b7d0 T idr_remove +ffffffff8196b890 T idr_find +ffffffff8196b900 T idr_get_next +ffffffff8196ba30 T idr_for_each +ffffffff8196bb40 T idr_cmp +ffffffff8196bb80 T idr_tree_SPLAY +ffffffff8196bcb0 T idr_tree_SPLAY_MINMAX +ffffffff8196bda0 T ida_init +ffffffff8196bdd0 T ida_destroy +ffffffff8196bde0 T ida_simple_get +ffffffff8196be00 T ida_simple_remove +ffffffff8196be20 T ida_alloc_min +ffffffff8196be40 T ida_alloc_max +ffffffff8196be60 T ida_free +ffffffff8196be80 T xarray_cmp +ffffffff8196bec0 T xarray_tree_SPLAY_INSERT +ffffffff8196bf60 T xarray_tree_SPLAY +ffffffff8196c090 T xarray_tree_SPLAY_REMOVE +ffffffff8196c110 T xarray_tree_SPLAY_MINMAX +ffffffff8196c200 T xa_init_flags +ffffffff8196c280 T xa_destroy +ffffffff8196c3c0 T __xa_alloc +ffffffff8196c540 T __xa_alloc_cyclic +ffffffff8196c5a0 T __xa_erase +ffffffff8196c660 T __xa_load +ffffffff8196c6d0 T __xa_store +ffffffff8196c850 T xa_get_next +ffffffff8196c970 T sg_alloc_table +ffffffff8196c9f0 T sg_free_table +ffffffff8196ca50 T sg_copy_from_buffer +ffffffff8196ca80 T i2c_master_xfer +ffffffff8196cbb0 T __i2c_transfer +ffffffff8196cc60 T i2c_transfer +ffffffff8196cd30 T i2c_bb_master_xfer +ffffffff8196cdd0 T i2c_bb_functionality +ffffffff8196ce00 T i2c_bit_add_bus +ffffffff8196ce40 T vga_disable_bridge +ffffffff8196cef0 T vga_get_uninterruptible +ffffffff8196cf40 T vga_put +ffffffff8196cfc0 T acpi_get_table +ffffffff8196d090 T acpi_put_table +ffffffff8196d0c0 T acpi_get_handle +ffffffff8196d110 T acpi_get_name +ffffffff8196d1b0 T acpi_evaluate_object +ffffffff8196d410 T drm_linux_acpi_notify +ffffffff8196d490 T register_acpi_notifier +ffffffff8196d4d0 T unregister_acpi_notifier +ffffffff8196d560 T acpi_format_exception +ffffffff8196d5b0 T backlight_do_update_status +ffffffff8196d5d0 T backlight_device_register +ffffffff8196d660 T backlight_device_unregister +ffffffff8196d680 T devm_backlight_device_register +ffffffff8196d6d0 T backlight_schedule_update_status +ffffffff8196d6f0 T backlight_enable +ffffffff8196d730 T backlight_disable +ffffffff8196d770 T drm_sysfs_hotplug_event +ffffffff8196d790 T drm_sysfs_connector_hotplug_event +ffffffff8196d7b0 T drm_sysfs_connector_status_event +ffffffff8196d7d0 T dma_fence_get +ffffffff8196d810 T dma_fence_get_rcu +ffffffff8196d850 T dma_fence_get_rcu_safe +ffffffff8196d890 T dma_fence_release +ffffffff8196d8c0 T dma_fence_put +ffffffff8196d930 T dma_fence_signal_timestamp_locked +ffffffff8196da00 T dma_fence_signal +ffffffff8196db40 T dma_fence_signal_locked +ffffffff8196dc70 T dma_fence_signal_timestamp +ffffffff8196dd60 T dma_fence_is_signaled +ffffffff8196ddd0 T dma_fence_is_signaled_locked +ffffffff8196df20 T dma_fence_wait_timeout +ffffffff8196df80 T dma_fence_default_wait +ffffffff8196e230 T dma_fence_wait +ffffffff8196e290 T dma_fence_enable_sw_signaling +ffffffff8196e410 T dma_fence_init +ffffffff8196e470 T dma_fence_add_callback +ffffffff8196e670 T dma_fence_remove_callback +ffffffff8196e6f0 T dma_fence_context_alloc +ffffffff8196e730 t dma_fence_default_wait_cb +ffffffff8196e780 T dma_fence_wait_any_timeout +ffffffff8196eac0 T dma_fence_get_stub +ffffffff8196ec70 T dma_fence_allocate_private_stub +ffffffff8196eda0 T dma_fence_array_create +ffffffff8196eec0 t irq_dma_fence_array_work +ffffffff8196ef50 T dma_fence_array_first +ffffffff8196efb0 T dma_fence_array_next +ffffffff8196f010 t dma_fence_array_get_driver_name +ffffffff8196f040 t dma_fence_array_get_timeline_name +ffffffff8196f070 t dma_fence_array_enable_signaling +ffffffff8196f170 t dma_fence_array_signaled +ffffffff8196f1c0 t dma_fence_array_release +ffffffff8196f280 T dma_fence_chain_find_seqno +ffffffff8196f3a0 T dma_fence_chain_walk +ffffffff8196f5e0 T dma_fence_chain_init +ffffffff8196f6f0 t dma_fence_chain_get_driver_name +ffffffff8196f720 t dma_fence_chain_get_timeline_name +ffffffff8196f750 t dma_fence_chain_enable_signaling +ffffffff8196f900 t dma_fence_chain_signaled +ffffffff8196f9f0 t dma_fence_chain_release +ffffffff8196fb30 T dma_fence_is_container +ffffffff8196fb80 T dmabuf_read +ffffffff8196fbb0 T dmabuf_write +ffffffff8196fbe0 T dmabuf_ioctl +ffffffff8196fc10 T dmabuf_kqfilter +ffffffff8196fc40 T dmabuf_stat +ffffffff8196fd00 T dmabuf_close +ffffffff8196fd70 T dmabuf_seek +ffffffff8196fe00 T dma_buf_export +ffffffff8196feb0 T dma_buf_get +ffffffff8196ff40 T dma_buf_put +ffffffff8196fff0 T dma_buf_fd +ffffffff81970110 T get_dma_buf +ffffffff81970150 T pcie_get_speed_cap +ffffffff819702f0 T printk +ffffffff81970380 T pcie_get_width_cap +ffffffff81970470 T pcie_aspm_enabled +ffffffff81970500 T wait_on_bit +ffffffff819705d0 T wait_on_bit_timeout +ffffffff819706a0 T wake_up_bit +ffffffff819706e0 T clear_and_wake_up_bit +ffffffff81970730 T bit_waitqueue +ffffffff81970760 T __var_waitqueue +ffffffff81970790 T drm_linux_init +ffffffff81970900 T drm_linux_exit +ffffffff81970960 T pci_resize_resource +ffffffff81970ab0 T register_shrinker +ffffffff81970b00 T unregister_shrinker +ffffffff81970b60 T drmbackoff +ffffffff81970bf0 T bitmap_zalloc +ffffffff81970c20 T bitmap_free +ffffffff81970c40 T atomic_dec_and_mutex_lock +ffffffff81970cc0 T interval_tree_iter_first +ffffffff81970d70 T interval_tree_remove +ffffffff81970d90 T interval_tree_insert +ffffffff81970e00 T syncfile_read +ffffffff81970e30 T syncfile_write +ffffffff81970e60 T syncfile_ioctl +ffffffff81970e90 T syncfile_kqfilter +ffffffff81970ec0 T syncfile_stat +ffffffff81970f70 T syncfile_close +ffffffff81971010 T syncfile_seek +ffffffff81971090 T fd_install +ffffffff81971160 T fput +ffffffff819711b0 T get_unused_fd_flags +ffffffff819712c0 T put_unused_fd +ffffffff81971350 T sync_file_get_fence +ffffffff81971400 T sync_file_create +ffffffff81971490 T drm_firmware_drivers_only +ffffffff819714c0 t dma_fence_stub_get_name +ffffffff819714f0 t dma_fence_array_cb_func +ffffffff81971570 t dma_fence_chain_cb +ffffffff81971630 t dma_fence_chain_timo +ffffffff81972000 T drmm_kzalloc +ffffffff81972100 T drmm_kcalloc +ffffffff81972210 T drmm_kstrdup +ffffffff81972350 T drmm_kfree +ffffffff81972450 T drmm_add_action +ffffffff81972510 T drmm_add_action_or_reset +ffffffff819725e0 T drm_managed_release +ffffffff819726a0 T drmm_add_final_kfree +ffffffff81973000 T mipi_dsi_attach +ffffffff81973050 T mipi_dsi_detach +ffffffff819730a0 T devm_mipi_dsi_attach +ffffffff81973110 T mipi_dsi_packet_format_is_short +ffffffff81973160 T mipi_dsi_packet_format_is_long +ffffffff819731b0 T mipi_dsi_create_packet +ffffffff819732c0 T mipi_dsi_shutdown_peripheral +ffffffff81973370 T mipi_dsi_turn_on_peripheral +ffffffff81973420 T mipi_dsi_set_maximum_return_packet_size +ffffffff819734d0 T mipi_dsi_compression_mode +ffffffff81973580 T mipi_dsi_picture_parameter_set +ffffffff81973630 T mipi_dsi_generic_write +ffffffff819736f0 T mipi_dsi_generic_read +ffffffff819737a0 T mipi_dsi_dcs_write_buffer +ffffffff81973860 T mipi_dsi_dcs_write +ffffffff819739b0 T mipi_dsi_dcs_read +ffffffff81973a50 T mipi_dsi_dcs_nop +ffffffff81973b00 T mipi_dsi_dcs_soft_reset +ffffffff81973bb0 T mipi_dsi_dcs_get_power_mode +ffffffff81973c70 T mipi_dsi_dcs_get_pixel_format +ffffffff81973d30 T mipi_dsi_dcs_enter_sleep_mode +ffffffff81973de0 T mipi_dsi_dcs_exit_sleep_mode +ffffffff81973e90 T mipi_dsi_dcs_set_display_off +ffffffff81973f40 T mipi_dsi_dcs_set_display_on +ffffffff81973ff0 T mipi_dsi_dcs_set_column_address +ffffffff819740b0 T mipi_dsi_dcs_set_page_address +ffffffff81974170 T mipi_dsi_dcs_set_tear_off +ffffffff81974220 T mipi_dsi_dcs_set_tear_on +ffffffff819742d0 T mipi_dsi_dcs_set_pixel_format +ffffffff81975000 T __drm_mm_interval_first +ffffffff819750c0 T drm_mm_reserve_node +ffffffff81975370 t add_hole +ffffffff819754d0 T drm_mm_insert_node_in_range +ffffffff81975ac0 T drm_mm_remove_node +ffffffff81975bf0 T drm_mm_replace_node +ffffffff81975dd0 T drm_mm_scan_init_with_range +ffffffff81975e50 T drm_mm_scan_add_block +ffffffff81975fc0 T drm_mm_scan_remove_block +ffffffff81976040 T drm_mm_scan_color_evict +ffffffff81976120 T drm_mm_init +ffffffff819761d0 T drm_mm_takedown +ffffffff81976210 T drm_mm_print +ffffffff81977000 T drm_modeset_register_all +ffffffff819770a0 T drm_modeset_unregister_all +ffffffff819770e0 T drm_mode_getresources +ffffffff81977390 T drm_mode_config_reset +ffffffff819774f0 T drmm_mode_config_init +ffffffff81977b70 T drm_mode_config_cleanup +ffffffff81977eb0 t drm_mode_config_init_release +ffffffff81977ec0 T drm_mode_config_validate +ffffffff81979000 T __drm_mode_object_add +ffffffff81979100 T drm_mode_object_add +ffffffff819791e0 T drm_mode_object_register +ffffffff81979230 T drm_mode_object_unregister +ffffffff819792d0 T drm_mode_object_lease_required +ffffffff81979320 T __drm_mode_object_find +ffffffff819793d0 T drm_mode_object_find +ffffffff81979480 T drm_mode_object_put +ffffffff81979500 T drm_mode_object_get +ffffffff81979560 T drm_object_attach_property +ffffffff81979670 T drm_object_property_set_value +ffffffff81979750 T drm_object_property_get_value +ffffffff819797e0 t __drm_object_property_get_value +ffffffff819798c0 T drm_object_property_get_default_value +ffffffff81979990 T drm_mode_object_get_properties +ffffffff81979ae0 T drm_mode_obj_get_properties_ioctl +ffffffff81979d30 T drm_mode_obj_find_prop_id +ffffffff81979d90 T drm_mode_obj_set_property_ioctl +ffffffff8197b000 T drm_mode_debug_printmodeline +ffffffff8197b140 T drm_mode_vrefresh +ffffffff8197b1e0 T drm_mode_create +ffffffff8197b200 T drm_mode_destroy +ffffffff8197b240 T drm_mode_probed_add +ffffffff8197b2e0 T drm_cvt_mode +ffffffff8197b790 T drm_mode_set_name +ffffffff8197b7e0 T drm_gtf_mode_complex +ffffffff8197bae0 T drm_gtf_mode +ffffffff8197bb30 T drm_mode_get_hv_timing +ffffffff8197bb80 T drm_mode_init +ffffffff8197bc50 T drm_mode_set_crtcinfo +ffffffff8197be00 T drm_mode_copy +ffffffff8197be60 T drm_mode_duplicate +ffffffff8197bee0 T drm_mode_match +ffffffff8197c080 T drm_mode_equal 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drm_mode_config_helper_resume +ffffffff8197e000 T drm_modeset_lock_all +ffffffff8197e1e0 T drm_modeset_acquire_init +ffffffff8197e270 T drm_modeset_lock_all_ctx +ffffffff8197e3e0 T drm_modeset_backoff +ffffffff8197e4b0 T drm_modeset_acquire_fini +ffffffff8197e4e0 T drm_warn_on_modeset_not_all_locked +ffffffff8197e630 T drm_modeset_unlock_all +ffffffff8197e710 T drm_modeset_drop_locks +ffffffff8197e7a0 T drm_modeset_unlock +ffffffff8197e870 t modeset_lock +ffffffff8197eae0 T drm_modeset_lock_init +ffffffff8197eb40 T drm_modeset_lock +ffffffff8197eba0 T drm_modeset_lock_single_interruptible +ffffffff8197ebc0 t __ww_mutex_lock +ffffffff8197f000 T drm_mtrr_add +ffffffff8197f070 T drm_mtrr_del +ffffffff81980000 T drm_panel_init +ffffffff81980040 T drm_panel_add +ffffffff81980090 T drm_panel_remove +ffffffff819800f0 T drm_panel_prepare +ffffffff81980140 T drm_panel_unprepare +ffffffff81980190 T drm_panel_enable +ffffffff81980230 T drm_panel_disable +ffffffff819802c0 T drm_panel_get_modes +ffffffff81980310 T drm_panel_of_backlight +ffffffff81981000 T drm_get_panel_orientation_quirk +ffffffff81982000 T drm_pci_set_busid +ffffffff81982090 t kasprintf +ffffffff81983000 T drm_universal_plane_init +ffffffff819830f0 t __drm_universal_plane_init +ffffffff819837e0 T __drmm_universal_plane_alloc +ffffffff81983920 t drmm_universal_plane_alloc_release +ffffffff81983970 T __drm_universal_plane_alloc +ffffffff81983ab0 T drm_plane_register_all +ffffffff81983ba0 T drm_plane_unregister_all +ffffffff81983c10 T drm_plane_cleanup +ffffffff81983d60 T drm_plane_from_index +ffffffff81983dc0 T drm_plane_force_disable +ffffffff81983ed0 T drm_mode_plane_set_obj_prop +ffffffff81983f50 T drm_mode_getplane_res +ffffffff81984050 T drm_mode_getplane +ffffffff819841b0 T drm_plane_check_pixel_format +ffffffff81984270 T drm_any_plane_has_format +ffffffff819843b0 T drm_mode_setplane +ffffffff81984710 T drm_mode_cursor_ioctl +ffffffff81984780 t drm_mode_cursor_common +ffffffff81984e00 T drm_mode_cursor2_ioctl +ffffffff81984e20 T drm_mode_page_flip_ioctl +ffffffff81985390 T drm_plane_enable_fb_damage_clips +ffffffff819853b0 T drm_plane_get_damage_clips_count +ffffffff819853f0 T __drm_plane_get_damage_clips +ffffffff81985430 T drm_plane_get_damage_clips +ffffffff819854d0 T drm_create_scaling_filter_prop +ffffffff81985620 T drm_plane_create_scaling_filter_property +ffffffff81985690 t kasprintf +ffffffff81985760 t __setplane_internal +ffffffff81985950 t __setplane_check +ffffffff81986000 T drm_plane_helper_update_primary +ffffffff819864b0 t get_connectors_for_crtc +ffffffff819865c0 T drm_plane_helper_disable_primary +ffffffff81986670 T drm_plane_helper_destroy +ffffffff819866a0 T drm_plane_helper_atomic_check +ffffffff81987000 T drm_prime_remove_buf_handle +ffffffff81987090 T drm_prime_init_file_private +ffffffff819870f0 T drm_prime_destroy_file_private +ffffffff81987150 T drm_gem_dmabuf_export +ffffffff819871b0 T drm_gem_dmabuf_release +ffffffff819871f0 T drm_gem_prime_fd_to_handle +ffffffff81987400 T drm_gem_prime_import +ffffffff81987460 t drm_prime_add_buf_handle +ffffffff819875b0 T drm_prime_fd_to_handle_ioctl +ffffffff81987600 T drm_gem_prime_handle_to_fd +ffffffff81987830 T drm_prime_handle_to_fd_ioctl +ffffffff81987890 T drm_gem_map_attach +ffffffff819878b0 T drm_gem_map_detach +ffffffff819878d0 T drm_gem_dmabuf_vmap +ffffffff819878f0 T drm_gem_dmabuf_vunmap +ffffffff81987910 T drm_gem_prime_mmap +ffffffff81987960 T drm_prime_pages_to_sg +ffffffff819879b0 T drm_prime_get_contiguous_size +ffffffff81987a00 T drm_gem_prime_export +ffffffff81987a90 T drm_gem_prime_import_dev +ffffffff81987af0 T drm_prime_sg_to_page_array +ffffffff81987b40 T drm_prime_sg_to_dma_addr_array +ffffffff81987b90 T drm_prime_gem_destroy +ffffffff81988000 T __drm_puts_coredump +ffffffff819880f0 T __drm_printfn_coredump +ffffffff81988210 T __drm_puts_seq_file +ffffffff81988240 T __drm_printfn_seq_file +ffffffff81988270 T __drm_printfn_info +ffffffff819882a0 T __drm_printfn_debug +ffffffff819882d0 T __drm_printfn_err +ffffffff81988310 T drm_puts +ffffffff81988340 T drm_printf +ffffffff819883c0 T drm_print_bits +ffffffff819885e0 T drm_dev_printk +ffffffff81988680 T __drm_dev_dbg +ffffffff81988710 T ___drm_dbg +ffffffff819887a0 T __drm_err +ffffffff81988830 T drm_print_regset32 +ffffffff81989000 T drm_crtc_mode_valid +ffffffff81989050 T drm_encoder_mode_valid +ffffffff81989090 T drm_connector_mode_valid +ffffffff81989110 T drm_kms_helper_poll_enable +ffffffff81989200 T drm_helper_probe_detect +ffffffff819893f0 T drm_helper_probe_single_connector_modes +ffffffff819899b0 t __drm_helper_update_and_validate +ffffffff81989d60 T drm_kms_helper_hotplug_event +ffffffff81989da0 T drm_kms_helper_connector_hotplug_event +ffffffff81989de0 T drm_kms_helper_is_poll_worker +ffffffff81989e10 T drm_kms_helper_poll_disable +ffffffff81989e90 T drm_kms_helper_poll_init +ffffffff81989ef0 t output_poll_execute +ffffffff8198a180 T drm_kms_helper_poll_fini +ffffffff8198a200 T drm_connector_helper_hpd_irq_event +ffffffff8198a2d0 t check_connector_changed +ffffffff8198a4b0 T drm_helper_hpd_irq_event +ffffffff8198a600 T drm_crtc_helper_mode_valid_fixed +ffffffff8198a650 T drm_connector_helper_get_modes_from_ddc +ffffffff8198a6e0 T drm_connector_helper_get_modes_fixed +ffffffff8198a850 T drm_connector_helper_get_modes +ffffffff8198a8b0 t __delayed_work_tick +ffffffff8198b000 T drm_property_create +ffffffff8198b200 T drm_property_create_enum +ffffffff8198b2b0 T drm_property_add_enum +ffffffff8198b4d0 T drm_property_destroy +ffffffff8198b580 T drm_property_create_bitmask +ffffffff8198b6b0 T drm_property_create_range +ffffffff8198b720 T drm_property_create_signed_range +ffffffff8198b790 T drm_property_create_object +ffffffff8198b830 T drm_property_create_bool +ffffffff8198b890 T drm_mode_getproperty_ioctl +ffffffff8198baa0 T drm_property_create_blob +ffffffff8198bbe0 t drm_property_free_blob +ffffffff8198bc60 T drm_property_blob_put +ffffffff8198bca0 T drm_property_destroy_user_blobs +ffffffff8198bd20 T drm_property_blob_get +ffffffff8198bd60 T drm_property_lookup_blob +ffffffff8198bd80 T drm_property_replace_global_blob +ffffffff8198bed0 T drm_property_replace_blob +ffffffff8198bf40 T drm_mode_getblob_ioctl +ffffffff8198c000 T drm_mode_createblob_ioctl +ffffffff8198c100 T drm_mode_destroyblob_ioctl +ffffffff8198c210 T drm_property_change_valid_get +ffffffff8198c460 T drm_property_change_valid_put +ffffffff8198d000 T drm_rect_intersect +ffffffff8198d080 T drm_rect_clip_scaled +ffffffff8198d2f0 T drm_rect_calc_hscale +ffffffff8198d3c0 T drm_rect_calc_vscale +ffffffff8198d490 T drm_rect_debug_print +ffffffff8198d5b0 T drm_rect_rotate +ffffffff8198d670 T drm_rect_rotate_inv +ffffffff8198e000 T drm_self_refresh_helper_update_avg_times +ffffffff8198e140 T drm_self_refresh_helper_alter_state +ffffffff8198e2d0 T drm_self_refresh_helper_init +ffffffff8198e480 t drm_self_refresh_helper_entry_work +ffffffff8198e5e0 T drm_self_refresh_helper_cleanup +ffffffff8198e660 t __delayed_work_tick +ffffffff8198f000 T drm_syncobj_find +ffffffff8198f070 T drm_syncobj_add_point +ffffffff8198f160 t syncobj_wait_syncobj_func +ffffffff8198f210 T drm_syncobj_replace_fence +ffffffff8198f2a0 T drm_syncobj_find_fence +ffffffff8198f600 t drm_syncobj_fence_add_wait +ffffffff8198f6d0 T drm_syncobj_free +ffffffff8198f760 T drm_syncobj_create +ffffffff8198f9a0 T drm_syncobj_get_handle +ffffffff8198fac0 T drm_syncobj_get_fd +ffffffff8198fb10 T drm_syncobj_open +ffffffff8198fb40 T drm_syncobj_release +ffffffff8198fb80 t drm_syncobj_release_handle +ffffffff8198fc30 T drm_syncobj_create_ioctl +ffffffff8198fd60 T drm_syncobj_destroy_ioctl +ffffffff8198fe80 T drm_syncobj_handle_to_fd_ioctl +ffffffff81990070 T drm_syncobj_fd_to_handle_ioctl +ffffffff81990260 T drm_syncobj_transfer_ioctl +ffffffff81990680 T drm_timeout_abs_to_jiffies +ffffffff81990760 T drm_syncobj_wait_ioctl +ffffffff819908f0 t drm_syncobj_array_find +ffffffff81990b20 t drm_syncobj_array_free +ffffffff81990c00 T drm_syncobj_timeline_wait_ioctl +ffffffff81990d90 T drm_syncobj_reset_ioctl +ffffffff81990ef0 T drm_syncobj_signal_ioctl +ffffffff819910c0 T drm_syncobj_timeline_signal_ioctl +ffffffff819912f0 T drm_syncobj_query_ioctl +ffffffff819914f0 t drm_syncobj_array_wait_timeout +ffffffff81991950 t syncobj_wait_fence_func +ffffffff81992000 T drm_vblank_count +ffffffff81992090 T drm_crtc_accurate_vblank_count +ffffffff819921a0 t drm_update_vblank_count +ffffffff819925f0 T drm_vblank_disable_and_save +ffffffff81992740 T drm_vblank_init +ffffffff819928c0 t vblank_disable_fn +ffffffff81992940 t drm_vblank_init_release +ffffffff819929d0 T drm_dev_has_vblank +ffffffff81992a00 T drm_crtc_vblank_waitqueue +ffffffff81992a50 T drm_calc_timestamping_constants +ffffffff81992c80 T drm_crtc_vblank_helper_get_vblank_timestamp_internal +ffffffff819931b0 T drm_crtc_vblank_helper_get_vblank_timestamp +ffffffff819931d0 T drm_crtc_vblank_count +ffffffff81993260 T drm_crtc_vblank_count_and_time +ffffffff81993320 T drm_crtc_arm_vblank_event +ffffffff81993400 T drm_crtc_send_vblank_event +ffffffff819935b0 T drm_vblank_get +ffffffff819936d0 t drm_vblank_enable +ffffffff81993890 T drm_crtc_vblank_get +ffffffff819939a0 T drm_vblank_put +ffffffff81993ad0 T drm_crtc_vblank_put +ffffffff81993af0 T drm_wait_one_vblank +ffffffff81993ff0 T drm_crtc_wait_one_vblank +ffffffff81994010 T drm_crtc_vblank_off +ffffffff81994400 T drm_crtc_vblank_reset +ffffffff81994530 T drm_crtc_set_max_vblank_count +ffffffff81994610 T drm_crtc_vblank_on +ffffffff81994760 t drm_reset_vblank_timestamp +ffffffff81994960 T drm_crtc_vblank_restore +ffffffff81994d40 T drm_legacy_modeset_ctl_ioctl +ffffffff81994f60 T drm_wait_vblank_ioctl +ffffffff81995a50 T drm_handle_vblank +ffffffff81995d30 t drm_handle_vblank_events +ffffffff81995fc0 T drm_crtc_handle_vblank +ffffffff81995fe0 T drm_crtc_get_sequence_ioctl +ffffffff819961d0 T drm_crtc_queue_sequence_ioctl +ffffffff819965a0 t __get_vblank_counter +ffffffff81997000 T drm_handle_vblank_works +ffffffff819971a0 T drm_vblank_cancel_pending_works +ffffffff819972e0 T drm_vblank_work_schedule +ffffffff81997550 T drm_vblank_work_cancel_sync +ffffffff819976a0 T drm_vblank_work_flush +ffffffff819977d0 T drm_vblank_work_init +ffffffff81997840 T drm_vblank_worker_init +ffffffff81998000 T drm_vma_offset_manager_init +ffffffff81998040 T drm_vma_offset_manager_destroy +ffffffff81998060 T drm_vma_offset_lookup_locked +ffffffff819980f0 T drm_vma_offset_add +ffffffff81998180 T drm_vma_offset_remove +ffffffff819981d0 T drm_vma_node_allow +ffffffff819981f0 t vma_node_allow +ffffffff81998320 T drm_vma_node_allow_once +ffffffff81998340 T drm_vma_node_revoke +ffffffff819983c0 T drm_vma_node_is_allowed +ffffffff81999000 T hdmi_avi_infoframe_init +ffffffff81999080 T hdmi_avi_infoframe_check +ffffffff819990d0 T hdmi_avi_infoframe_pack_only +ffffffff819992d0 T hdmi_avi_infoframe_pack +ffffffff81999330 T hdmi_spd_infoframe_init +ffffffff819993f0 T hdmi_spd_infoframe_check +ffffffff81999440 T hdmi_spd_infoframe_pack_only +ffffffff81999570 T hdmi_spd_infoframe_pack +ffffffff819996d0 T hdmi_audio_infoframe_init +ffffffff81999720 T hdmi_audio_infoframe_check +ffffffff81999770 T hdmi_audio_infoframe_pack_only +ffffffff819998c0 T hdmi_audio_infoframe_pack +ffffffff81999910 T hdmi_audio_infoframe_pack_for_dp +ffffffff81999a00 T hdmi_vendor_infoframe_init +ffffffff81999a60 T hdmi_vendor_infoframe_check +ffffffff81999b00 T hdmi_vendor_infoframe_pack_only +ffffffff81999cd0 T hdmi_vendor_infoframe_pack +ffffffff81999d70 T hdmi_drm_infoframe_init +ffffffff81999dd0 T hdmi_drm_infoframe_check +ffffffff81999e20 T hdmi_drm_infoframe_pack_only +ffffffff81999ff0 T hdmi_drm_infoframe_pack +ffffffff8199a040 T hdmi_infoframe_check +ffffffff8199a1a0 T hdmi_infoframe_pack_only +ffffffff8199a3c0 T hdmi_infoframe_pack +ffffffff8199a530 T hdmi_infoframe_log +ffffffff8199b430 T hdmi_drm_infoframe_unpack_only +ffffffff8199b510 T hdmi_infoframe_unpack +ffffffff8199c000 T list_sort +ffffffff8199d000 T radix_tree_lookup +ffffffff8199d0b0 T radix_tree_iter_find +ffffffff8199d1a0 T radix_tree_delete +ffffffff8199d340 T radix_tree_iter_delete +ffffffff8199d360 T radix_tree_insert +ffffffff8199e000 T sort +ffffffff8199e040 t qsort +ffffffff819a0000 T drm_dp_dual_mode_read +ffffffff819a0110 T drm_dp_dual_mode_write +ffffffff819a01f0 T drm_dp_dual_mode_detect +ffffffff819a04a0 T drm_dp_dual_mode_max_tmds_clock +ffffffff819a05d0 T drm_dp_dual_mode_get_tmds_output +ffffffff819a0700 T drm_dp_dual_mode_set_tmds_output +ffffffff819a0990 T drm_dp_get_dual_mode_type_name +ffffffff819a0a00 T drm_lspcon_get_mode +ffffffff819a0ba0 T drm_lspcon_set_mode +ffffffff819a1000 T drm_dp_channel_eq_ok +ffffffff819a1080 T drm_dp_clock_recovery_ok +ffffffff819a1100 T drm_dp_get_adjust_request_voltage +ffffffff819a1140 T drm_dp_get_adjust_request_pre_emphasis +ffffffff819a1190 T drm_dp_get_adjust_tx_ffe_preset +ffffffff819a11d0 T drm_dp_128b132b_lane_channel_eq_done +ffffffff819a1250 T drm_dp_128b132b_lane_symbol_locked +ffffffff819a12c0 T drm_dp_128b132b_eq_interlane_align_done +ffffffff819a12f0 T drm_dp_128b132b_cds_interlane_align_done +ffffffff819a1320 T drm_dp_128b132b_link_training_failed +ffffffff819a1350 T drm_dp_read_clock_recovery_delay +ffffffff819a1450 T drm_dp_read_channel_eq_delay +ffffffff819a1550 T drm_dp_128b132b_read_aux_rd_interval +ffffffff819a1600 T drm_dp_link_train_clock_recovery_delay +ffffffff819a1690 t __8b10b_clock_recovery_delay_us +ffffffff819a1710 T drm_dp_link_train_channel_eq_delay +ffffffff819a1790 T drm_dp_phy_name +ffffffff819a17d0 T drm_dp_lttpr_link_train_clock_recovery_delay +ffffffff819a17f0 T drm_dp_lttpr_link_train_channel_eq_delay +ffffffff819a1860 T drm_dp_link_rate_to_bw_code +ffffffff819a18d0 T drm_dp_bw_code_to_link_rate +ffffffff819a1930 T drm_dp_dpcd_probe +ffffffff819a1a70 t drm_dp_dpcd_access +ffffffff819a1ba0 T drm_dp_dpcd_read +ffffffff819a1cd0 T drm_dp_dpcd_write +ffffffff819a1de0 T drm_dp_dpcd_read_link_status +ffffffff819a1e00 T drm_dp_dpcd_read_phy_link_status +ffffffff819a1f00 T drm_dp_downstream_is_type +ffffffff819a1f40 T drm_dp_downstream_is_tmds +ffffffff819a1fb0 T drm_dp_send_real_edid_checksum +ffffffff819a2210 T drm_dp_read_dpcd_caps +ffffffff819a23a0 T drm_dp_read_downstream_info +ffffffff819a24a0 T drm_dp_downstream_max_dotclock +ffffffff819a24f0 T drm_dp_downstream_max_tmds_clock +ffffffff819a2590 T drm_dp_downstream_min_tmds_clock +ffffffff819a2610 T drm_dp_downstream_max_bpc +ffffffff819a26b0 T drm_dp_downstream_420_passthrough +ffffffff819a2710 T drm_dp_downstream_444_to_420_conversion +ffffffff819a2770 T drm_dp_downstream_rgb_to_ycbcr_conversion +ffffffff819a27d0 T drm_dp_downstream_mode +ffffffff819a2860 T drm_dp_downstream_id +ffffffff819a2880 T drm_dp_downstream_debug +ffffffff819a2920 T drm_dp_subconnector_type +ffffffff819a2990 T drm_dp_set_subconnector_property +ffffffff819a2a00 T drm_dp_read_sink_count_cap +ffffffff819a2a50 T drm_dp_read_sink_count +ffffffff819a2ab0 T drm_dp_remote_aux_init +ffffffff819a2ae0 t drm_dp_aux_crc_work +ffffffff819a2c60 T drm_dp_aux_init +ffffffff819a2d10 T drm_dp_aux_register +ffffffff819a2e30 T drm_dp_aux_unregister +ffffffff819a2e60 T drm_dp_psr_setup_time +ffffffff819a2eb0 T drm_dp_start_crc +ffffffff819a2f60 T drm_dp_stop_crc +ffffffff819a2ff0 T drm_dp_read_desc +ffffffff819a31b0 T drm_dp_dsc_sink_max_slice_count +ffffffff819a3240 T drm_dp_dsc_sink_line_buf_depth +ffffffff819a3280 T drm_dp_dsc_sink_supported_input_bpcs +ffffffff819a32f0 T drm_dp_read_lttpr_common_caps +ffffffff819a33b0 T drm_dp_read_lttpr_phy_caps +ffffffff819a3470 T drm_dp_lttpr_count +ffffffff819a3500 T drm_dp_lttpr_max_link_rate +ffffffff819a3560 T drm_dp_lttpr_max_lane_count +ffffffff819a3590 T drm_dp_lttpr_voltage_swing_level_3_supported +ffffffff819a35c0 T drm_dp_lttpr_pre_emphasis_level_3_supported +ffffffff819a35f0 T drm_dp_get_phy_test_pattern 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drm_dp_mst_hpd_irq_send_new_request +ffffffff819a9d30 T drm_dp_mst_detect_port +ffffffff819a9eb0 T drm_dp_mst_get_edid +ffffffff819a9fc0 T drm_dp_atomic_find_time_slots +ffffffff819aa290 T drm_atomic_get_mst_topology_state +ffffffff819aa2a0 T drm_dp_atomic_release_time_slots +ffffffff819aa4b0 T drm_dp_mst_atomic_setup_commit +ffffffff819aa640 T drm_dp_mst_atomic_wait_for_dependencies +ffffffff819aa7c0 T drm_dp_mst_root_conn_atomic_check +ffffffff819aa8e0 T drm_dp_mst_update_slots +ffffffff819aa940 T drm_dp_check_act_status +ffffffff819aaaf0 T drm_dp_calc_pbn_mode +ffffffff819aab60 T drm_dp_mst_dump_topology +ffffffff819aadb0 t drm_dp_mst_dump_mstb +ffffffff819aae20 T drm_dp_mst_add_affected_dsc_crtcs +ffffffff819aaf50 T drm_dp_mst_dsc_aux_for_port +ffffffff819ab180 T drm_dp_mst_atomic_enable_dsc +ffffffff819ab320 T drm_dp_mst_atomic_check +ffffffff819ab610 t drm_dp_mst_atomic_check_mstb_bw_limit +ffffffff819ab8e0 t drm_dp_mst_duplicate_state +ffffffff819abab0 t drm_dp_mst_destroy_state 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drm_scdc_get_scrambling_status +ffffffff819b3230 T drm_scdc_set_scrambling +ffffffff819b3380 T drm_scdc_set_high_tmds_clock_ratio +ffffffff819b4000 T drm_gem_ttm_mmap +ffffffff819b4070 T drm_gem_ttm_vmap +ffffffff819b4080 T drm_gem_ttm_vunmap +ffffffff819b5000 T ttm_agp_bind +ffffffff819b5050 T ttm_agp_unbind +ffffffff819b5070 T ttm_agp_is_bound +ffffffff819b50c0 T ttm_agp_destroy +ffffffff819b50e0 T ttm_agp_tt_create +ffffffff819b6000 T ttm_bo_move_to_lru_tail +ffffffff819b6040 T ttm_bo_set_bulk_move +ffffffff819b6100 T ttm_bo_delayed_delete +ffffffff819b63f0 t ttm_bo_cleanup_refs +ffffffff819b6790 T ttm_bo_put +ffffffff819b6cd0 T ttm_bo_lock_delayed_workqueue +ffffffff819b6d50 T ttm_bo_unlock_delayed_workqueue +ffffffff819b6dc0 T ttm_bo_eviction_valuable +ffffffff819b6e10 T ttm_mem_evict_first +ffffffff819b7700 T ttm_bo_pin +ffffffff819b77a0 T ttm_bo_unpin +ffffffff819b78b0 T ttm_bo_mem_space +ffffffff819b7b00 t ttm_bo_add_move_fence +ffffffff819b7bc0 T ttm_bo_validate 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drm_sched_job_init +ffffffff819c8bd0 T drm_sched_job_arm +ffffffff819c8c60 T drm_sched_job_add_dependency +ffffffff819c8dd0 T drm_sched_job_add_implicit_dependencies +ffffffff819c8e90 T drm_sched_job_cleanup +ffffffff819c8f40 T drm_sched_wakeup +ffffffff819c9000 T drm_sched_pick_best +ffffffff819c90b0 T drm_sched_init +ffffffff819c9330 t drm_sched_job_timedout +ffffffff819c9490 t drm_sched_main +ffffffff819c98e0 T drm_sched_fini +ffffffff819c9ae0 t __delayed_work_tick +ffffffff819c9b00 t drm_sched_get_cleanup_job +ffffffff819c9c40 t drm_sched_select_entity +ffffffff819ca000 t ch7017_init +ffffffff819ca140 t ch7017_dpms +ffffffff819ca380 t ch7017_mode_valid +ffffffff819ca3c0 t ch7017_mode_set +ffffffff819ca680 t ch7017_detect +ffffffff819ca6b0 t ch7017_get_hw_state +ffffffff819ca740 t ch7017_destroy +ffffffff819ca790 t ch7017_dump_regs +ffffffff819cb000 t ch7xxx_init +ffffffff819cb290 t ch7xxx_dpms +ffffffff819cb370 t ch7xxx_mode_valid +ffffffff819cb3b0 t ch7xxx_mode_set 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intel_bios_is_lvds_present +ffffffff819f0b80 T intel_bios_is_port_present +ffffffff819f0c00 T intel_bios_is_port_edp +ffffffff819f0c60 T intel_bios_encoder_data_lookup +ffffffff819f0ca0 T intel_bios_is_port_dp_dual_mode +ffffffff819f0d10 T intel_bios_is_dsi_present +ffffffff819f0de0 T intel_bios_get_dsc_params +ffffffff819f0ff0 T intel_bios_is_port_hpd_inverted +ffffffff819f10b0 T intel_bios_is_lspcon_present +ffffffff819f1100 T intel_bios_is_lane_reversal_needed +ffffffff819f1150 T intel_bios_port_aux_ch +ffffffff819f13a0 T intel_bios_max_tmds_clock +ffffffff819f1440 T intel_bios_hdmi_level_shift +ffffffff819f14a0 T intel_bios_encoder_dp_boost_level +ffffffff819f1530 T intel_bios_encoder_hdmi_boost_level +ffffffff819f15c0 T intel_bios_dp_max_link_rate +ffffffff819f1650 T intel_bios_dp_max_lane_count +ffffffff819f16b0 T intel_bios_alternate_ddc_pin +ffffffff819f1820 T intel_bios_encoder_supports_typec_usb +ffffffff819f1870 T intel_bios_encoder_supports_tbt +ffffffff819f18c0 t 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intel_connector_init +ffffffff81a02070 T intel_connector_alloc +ffffffff81a02100 T intel_connector_free +ffffffff81a02140 T intel_connector_destroy +ffffffff81a021c0 T intel_connector_register +ffffffff81a021d0 T intel_connector_unregister +ffffffff81a021e0 T intel_connector_attach_encoder +ffffffff81a02200 T intel_connector_get_hw_state +ffffffff81a02250 T intel_connector_get_pipe +ffffffff81a02310 T intel_connector_update_modes +ffffffff81a02340 T intel_ddc_get_modes +ffffffff81a023c0 T intel_attach_force_audio_property +ffffffff81a02460 T intel_attach_broadcast_rgb_property +ffffffff81a02500 T intel_attach_aspect_ratio_property +ffffffff81a02560 T intel_attach_hdmi_colorspace_property +ffffffff81a025b0 T intel_attach_dp_colorspace_property +ffffffff81a03000 T intel_crt_port_enabled +ffffffff81a03080 T intel_crt_reset +ffffffff81a03170 T intel_crt_init +ffffffff81a035a0 t hsw_crt_get_config +ffffffff81a03650 t hsw_crt_compute_config +ffffffff81a03740 t hsw_pre_pll_enable_crt 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intel_crtc_max_vblank_count +ffffffff81a05220 T intel_crtc_vblank_on +ffffffff81a05300 T intel_crtc_vblank_off +ffffffff81a053a0 T intel_crtc_state_alloc +ffffffff81a05440 T intel_crtc_state_reset +ffffffff81a054c0 T intel_crtc_init +ffffffff81a05800 T intel_wait_for_vblank_workers +ffffffff81a058c0 T intel_usecs_to_scanlines +ffffffff81a05910 T intel_pipe_update_start +ffffffff81a05ce0 T intel_pipe_update_end +ffffffff81a05fe0 t intel_crtc_destroy +ffffffff81a06010 t intel_crtc_late_register +ffffffff81a06040 t intel_crtc_vblank_work +ffffffff81a07000 T intel_crtc_state_dump +ffffffff81a09000 T intel_cursor_plane_create +ffffffff81a09200 t i845_cursor_max_stride +ffffffff81a09230 t i845_cursor_update_arm +ffffffff81a09480 t i845_cursor_disable_arm +ffffffff81a094a0 t i845_cursor_get_hw_state +ffffffff81a09540 t i845_check_cursor +ffffffff81a096d0 t i9xx_cursor_max_stride +ffffffff81a09710 t i9xx_cursor_update_arm +ffffffff81a09ad0 t i9xx_cursor_disable_arm +ffffffff81a09af0 t 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icl_ddi_tc_enable_clock +ffffffff81a11e30 t icl_ddi_tc_disable_clock +ffffffff81a11f10 t icl_ddi_tc_is_clock_enabled +ffffffff81a11fd0 t icl_ddi_tc_get_config +ffffffff81a12210 t bxt_ddi_get_config +ffffffff81a12280 t skl_ddi_enable_clock +ffffffff81a12390 t skl_ddi_disable_clock +ffffffff81a12420 t skl_ddi_is_clock_enabled +ffffffff81a12490 t skl_ddi_get_config +ffffffff81a12520 t icl_combo_phy_set_signal_levels +ffffffff81a12ff0 t tgl_dkl_phy_set_signal_levels +ffffffff81a132f0 t icl_mg_phy_set_signal_levels +ffffffff81a13c20 t hsw_set_signal_levels +ffffffff81a13f90 t intel_ddi_update_prepare +ffffffff81a14110 t intel_ddi_update_complete +ffffffff81a14150 t lpt_digital_port_connected +ffffffff81a141c0 t bdw_digital_port_connected +ffffffff81a14230 t hsw_digital_port_connected +ffffffff81a142a0 t intel_ddi_encoder_reset +ffffffff81a14380 t intel_ddi_encoder_destroy +ffffffff81a14430 t icl_program_mg_dp_mode +ffffffff81a146c0 t intel_ddi_init_dp_buf_reg +ffffffff81a14880 t intel_disable_ddi_buf +ffffffff81a14ba0 t intel_ddi_prepare_link_retrain +ffffffff81a15210 t intel_ddi_set_link_train +ffffffff81a15370 t intel_ddi_set_idle_link_train +ffffffff81a15590 t intel_ddi_dp_voltage_max +ffffffff81a15650 t intel_ddi_dp_preemph_max +ffffffff81a16000 T is_hobl_buf_trans +ffffffff81a16040 T intel_ddi_buf_trans_init +ffffffff81a16300 t dg2_get_snps_buf_trans +ffffffff81a16370 t adlp_get_combo_buf_trans +ffffffff81a164a0 t adlp_get_dkl_buf_trans +ffffffff81a16500 t adls_get_combo_buf_trans +ffffffff81a16630 t rkl_get_combo_buf_trans +ffffffff81a16760 t dg1_get_combo_buf_trans +ffffffff81a16890 t tgl_get_combo_buf_trans +ffffffff81a169e0 t tgl_get_dkl_buf_trans +ffffffff81a16a40 t jsl_get_combo_buf_trans +ffffffff81a16af0 t ehl_get_combo_buf_trans +ffffffff81a16ba0 t icl_get_combo_buf_trans +ffffffff81a16c50 t icl_get_mg_buf_trans +ffffffff81a16cb0 t bxt_get_buf_trans +ffffffff81a16d40 t kbl_y_get_buf_trans +ffffffff81a16df0 t kbl_u_get_buf_trans +ffffffff81a16ea0 t kbl_get_buf_trans +ffffffff81a16f50 t skl_y_get_buf_trans +ffffffff81a17000 t skl_u_get_buf_trans +ffffffff81a170b0 t skl_get_buf_trans +ffffffff81a17160 t bdw_get_buf_trans +ffffffff81a17200 t hsw_get_buf_trans +ffffffff81a18000 T intel_update_watermarks +ffffffff81a18040 T vlv_get_hpll_vco +ffffffff81a18090 T vlv_get_cck_clock +ffffffff81a18140 T vlv_get_cck_clock_hpll +ffffffff81a18240 T is_trans_port_sync_mode +ffffffff81a18280 T intel_crtc_bigjoiner_slave_pipes +ffffffff81a182e0 T intel_crtc_is_bigjoiner_slave +ffffffff81a18340 T intel_crtc_is_bigjoiner_master +ffffffff81a183a0 T intel_master_crtc +ffffffff81a18440 T assert_transcoder +ffffffff81a185f0 T vlv_wait_port_ready +ffffffff81a18740 T intel_enable_transcoder +ffffffff81a18a30 T intel_disable_transcoder +ffffffff81a18d30 T intel_rotation_info_size +ffffffff81a18d80 T intel_remapped_info_size +ffffffff81a18eb0 T intel_plane_uses_fence +ffffffff81a18f00 T intel_fb_xy_to_linear +ffffffff81a18f50 T intel_add_fb_offsets +ffffffff81a18fa0 T intel_plane_fb_max_stride +ffffffff81a19020 T intel_set_plane_visible +ffffffff81a19070 T intel_plane_fixup_bitmasks +ffffffff81a19120 T intel_plane_disable_noatomic +ffffffff81a19310 T intel_plane_fence_y_offset +ffffffff81a19370 T intel_display_prepare_reset +ffffffff81a19550 T intel_display_finish_reset +ffffffff81a19750 t __intel_display_resume +ffffffff81a19860 T intel_modeset_init_hw +ffffffff81a19900 T intel_has_pending_fb_unpin +ffffffff81a19a00 T intel_get_crtc_new_encoder +ffffffff81a19ba0 T ilk_pfit_disable +ffffffff81a19c60 T intel_phy_is_combo +ffffffff81a19ce0 T intel_phy_is_tc +ffffffff81a19d50 T intel_phy_is_snps +ffffffff81a19d90 T intel_port_to_phy +ffffffff81a19e20 T intel_port_to_tc +ffffffff81a19f20 T intel_aux_power_domain +ffffffff81a19f60 T intel_modeset_get_crtc_power_domains +ffffffff81a1a180 T intel_modeset_put_crtc_power_domains +ffffffff81a1a1b0 T intel_display_suspend +ffffffff81a1a250 T intel_encoder_destroy +ffffffff81a1a280 T intel_encoder_get_config +ffffffff81a1a2b0 t intel_crtc_readout_derived_state +ffffffff81a1a6e0 T intel_link_compute_m_n +ffffffff81a1a810 T intel_zero_m_n +ffffffff81a1a850 T intel_set_m_n +ffffffff81a1a910 T intel_cpu_transcoder_has_m2_n2 +ffffffff81a1a970 T intel_cpu_transcoder_set_m1_n1 +ffffffff81a1ab30 T intel_cpu_transcoder_set_m2_n2 +ffffffff81a1ac90 T i9xx_set_pipeconf +ffffffff81a1ae40 T ilk_set_pipeconf +ffffffff81a1b020 T bdw_get_pipemisc_bpp +ffffffff81a1b110 T ilk_get_lanes_required +ffffffff81a1b170 T intel_get_m_n +ffffffff81a1b280 T intel_cpu_transcoder_get_m1_n1 +ffffffff81a1b420 T intel_cpu_transcoder_get_m2_n2 +ffffffff81a1b590 T intel_crtc_get_pipe_config +ffffffff81a1b600 T intel_get_load_detect_pipe +ffffffff81a1ba20 T intel_release_load_detect_pipe +ffffffff81a1baf0 T i9xx_crtc_clock_get +ffffffff81a1bd80 T intel_dotclock_calculate +ffffffff81a1bde0 T intel_crtc_dotclock +ffffffff81a1beb0 T intel_encoder_current_mode +ffffffff81a1c060 T intel_fuzzy_clock_check +ffffffff81a1c0b0 T intel_pipe_config_compare +ffffffff81a1eba0 t pipe_config_mismatch +ffffffff81a1ec90 t pipe_config_infoframe_mismatch +ffffffff81a1ee30 T intel_modeset_all_pipes +ffffffff81a1efd0 T intel_atomic_add_affected_planes +ffffffff81a1f0a0 T intel_crtc_update_active_timings +ffffffff81a1f1a0 T intel_calc_active_pipes +ffffffff81a1f230 T intel_crtc_arm_fifo_underrun +ffffffff81a1f2d0 T intel_plane_destroy +ffffffff81a1f300 T intel_get_pipe_from_crtc_id_ioctl +ffffffff81a1f370 T intel_mode_valid_max_plane_size +ffffffff81a1f3f0 T intel_init_display_hooks +ffffffff81a1f4d0 T intel_modeset_init_noirq +ffffffff81a1f790 t intel_atomic_helper_free_state_worker +ffffffff81a1f800 T intel_modeset_init_nogem +ffffffff81a20930 T intel_modeset_init +ffffffff81a20b50 T i830_enable_pipe +ffffffff81a21180 T i830_disable_pipe +ffffffff81a214b0 T intel_display_resume +ffffffff81a215f0 T intel_modeset_driver_remove +ffffffff81a216a0 T intel_modeset_driver_remove_noirq +ffffffff81a21810 T intel_modeset_driver_remove_nogem +ffffffff81a21850 T intel_modeset_probe_defer +ffffffff81a21880 T intel_display_driver_register +ffffffff81a218e0 T intel_display_driver_unregister +ffffffff81a21960 T intel_scanout_needs_vtd_wa +ffffffff81a219a0 t wait_for_pipe_scanline_moving +ffffffff81a21c00 t hsw_get_pipe_config +ffffffff81a229e0 t hsw_crtc_enable +ffffffff81a23410 t hsw_crtc_disable +ffffffff81a235c0 t skl_commit_modeset_enables +ffffffff81a23b80 t intel_get_transcoder_timings +ffffffff81a23e50 t ilk_get_pfit_config +ffffffff81a23fd0 t enabled_bigjoiner_pipes +ffffffff81a241e0 t bdw_set_pipemisc +ffffffff81a24320 t ilk_pfit_enable +ffffffff81a24430 t intel_set_transcoder_timings +ffffffff81a247f0 t intel_update_crtc +ffffffff81a24de0 t intel_pre_plane_update +ffffffff81a252f0 t intel_commit_modeset_enables +ffffffff81a25410 t ilk_get_pipe_config +ffffffff81a25760 t ilk_crtc_enable +ffffffff81a25e10 t ilk_crtc_disable +ffffffff81a260a0 t i9xx_get_pipe_config +ffffffff81a269d0 t valleyview_crtc_enable +ffffffff81a26de0 t i9xx_crtc_disable +ffffffff81a27170 t i9xx_pfit_enable +ffffffff81a272d0 t i9xx_crtc_enable +ffffffff81a27650 t intel_mode_valid +ffffffff81a27800 t intel_atomic_check +ffffffff81a2aaf0 t intel_atomic_commit +ffffffff81a2ae60 t copy_bigjoiner_crtc_state_nomodeset +ffffffff81a2af60 t intel_crtc_copy_uapi_to_hw_state_modeset +ffffffff81a2b0c0 t intel_atomic_commit_ready +ffffffff81a2b160 t intel_atomic_commit_work +ffffffff81a2b180 t intel_atomic_commit_tail +ffffffff81a2c4e0 t intel_atomic_cleanup_work +ffffffff81a2d000 T intel_display_power_domain_str +ffffffff81a2d060 T __intel_display_power_is_enabled +ffffffff81a2d130 T intel_display_power_is_enabled +ffffffff81a2d240 T intel_display_power_set_target_dc_state +ffffffff81a2d360 T intel_display_power_get +ffffffff81a2d3e0 t __intel_display_power_get_domain +ffffffff81a2d5c0 T intel_display_power_get_if_enabled +ffffffff81a2d6f0 T __intel_display_power_put_async +ffffffff81a2d8c0 t __intel_display_power_put_domain +ffffffff81a2da40 T intel_display_power_flush_work +ffffffff81a2db60 t release_async_put_domains +ffffffff81a2dc40 T intel_display_power_put_unchecked +ffffffff81a2dca0 T intel_display_power_get_in_set +ffffffff81a2dd80 T intel_display_power_get_in_set_if_enabled +ffffffff81a2de30 T intel_display_power_put_mask_in_set +ffffffff81a2df00 T intel_power_domains_init +ffffffff81a2e140 t intel_display_power_put_async_work +ffffffff81a2e3b0 T intel_power_domains_cleanup +ffffffff81a2e3d0 T gen9_dbuf_slices_update +ffffffff81a2e5f0 T intel_power_domains_init_hw +ffffffff81a2ed80 t icl_display_core_init +ffffffff81a2f670 t bxt_display_core_init +ffffffff81a2f7a0 T intel_power_domains_driver_remove +ffffffff81a2f890 T intel_power_domains_sanitize_state +ffffffff81a2f980 T intel_power_domains_enable +ffffffff81a2f9e0 T intel_power_domains_disable +ffffffff81a2fa90 T intel_power_domains_suspend +ffffffff81a2fc20 t icl_display_core_uninit +ffffffff81a2fcc0 t bxt_display_core_uninit +ffffffff81a2fd70 T intel_power_domains_resume +ffffffff81a2fe40 T intel_display_power_suspend_late +ffffffff81a2ff30 t hsw_enable_pc8 +ffffffff81a308c0 T intel_display_power_resume_early +ffffffff81a309b0 t hsw_disable_pc8 +ffffffff81a30e10 T intel_display_power_suspend +ffffffff81a30e90 T intel_display_power_resume +ffffffff81a30f70 T intel_display_power_debug +ffffffff81a31040 T intel_display_power_ddi_io_domain +ffffffff81a31120 T intel_display_power_ddi_lanes_domain +ffffffff81a31200 T intel_display_power_legacy_aux_domain +ffffffff81a31310 T intel_display_power_tbt_aux_domain +ffffffff81a31420 t __delayed_work_tick +ffffffff81a32000 T intel_display_power_map_init +ffffffff81a32170 t __set_power_wells +ffffffff81a32550 T intel_display_power_map_cleanup +ffffffff81a33000 T lookup_power_well +ffffffff81a330c0 T intel_power_well_enable +ffffffff81a33150 T intel_power_well_name +ffffffff81a33190 T intel_power_well_disable +ffffffff81a33200 T intel_power_well_sync_hw +ffffffff81a33270 T intel_power_well_get +ffffffff81a33310 T intel_power_well_put +ffffffff81a33410 T intel_power_well_is_enabled +ffffffff81a33430 T intel_power_well_is_enabled_cached +ffffffff81a33460 T intel_display_power_well_is_enabled +ffffffff81a33520 T intel_power_well_is_always_on +ffffffff81a33560 T intel_power_well_domains +ffffffff81a33590 T intel_power_well_refcount +ffffffff81a335c0 T gen9_sanitize_dc_state +ffffffff81a336a0 T gen9_set_dc_state +ffffffff81a339f0 T gen9_enable_dc5 +ffffffff81a33c50 T skl_enable_dc6 +ffffffff81a33da0 T bxt_enable_dc9 +ffffffff81a33f50 T bxt_disable_dc9 +ffffffff81a34040 T gen9_disable_dc_states +ffffffff81a34410 T chv_phy_powergate_ch +ffffffff81a34520 t assert_chv_phy_status +ffffffff81a348c0 T chv_phy_powergate_lanes +ffffffff81a34b80 t i9xx_power_well_sync_hw_noop +ffffffff81a34bb0 t i9xx_always_on_power_well_noop +ffffffff81a34be0 t i9xx_always_on_power_well_enabled +ffffffff81a34c10 t chv_pipe_power_well_sync_hw +ffffffff81a34c40 t chv_pipe_power_well_enable +ffffffff81a34c70 t chv_pipe_power_well_disable +ffffffff81a34cd0 t chv_pipe_power_well_enabled +ffffffff81a34dd0 t chv_dpio_cmn_power_well_enable +ffffffff81a34fe0 t chv_dpio_cmn_power_well_disable +ffffffff81a35110 t vlv_power_well_enabled +ffffffff81a35220 t i830_pipes_power_well_sync_hw +ffffffff81a35310 t i830_pipes_power_well_enable +ffffffff81a353d0 t i830_pipes_power_well_disable +ffffffff81a35400 t i830_pipes_power_well_enabled +ffffffff81a354a0 t hsw_power_well_sync_hw +ffffffff81a35590 t hsw_power_well_enable +ffffffff81a35810 t hsw_power_well_disable +ffffffff81a358c0 t hsw_power_well_enabled +ffffffff81a359a0 t gen9_dc_off_power_well_enable +ffffffff81a359b0 t gen9_dc_off_power_well_disable +ffffffff81a35a50 t gen9_dc_off_power_well_enabled +ffffffff81a35ae0 t bxt_dpio_cmn_power_well_enable +ffffffff81a35b10 t bxt_dpio_cmn_power_well_disable +ffffffff81a35b40 t bxt_dpio_cmn_power_well_enabled +ffffffff81a35b70 t vlv_display_power_well_enable +ffffffff81a35ba0 t vlv_display_power_well_disable +ffffffff81a35c10 t vlv_dpio_cmn_power_well_enable +ffffffff81a35c90 t vlv_dpio_cmn_power_well_disable +ffffffff81a35d90 t vlv_power_well_enable +ffffffff81a35db0 t vlv_power_well_disable +ffffffff81a35dd0 t icl_aux_power_well_enable +ffffffff81a36440 t icl_aux_power_well_disable +ffffffff81a366e0 t tgl_tc_cold_off_power_well_sync_hw +ffffffff81a36700 t tgl_tc_cold_off_power_well_enable +ffffffff81a36720 t tgl_tc_cold_off_power_well_disable +ffffffff81a36740 t tgl_tc_cold_off_power_well_is_enabled +ffffffff81a36770 t xelpdp_aux_power_well_enable +ffffffff81a36850 t xelpdp_aux_power_well_disable +ffffffff81a36930 t xelpdp_aux_power_well_enabled +ffffffff81a369e0 t chv_set_pipe_power_well +ffffffff81a36be0 t vlv_display_power_well_init +ffffffff81a36e70 t vlv_set_power_well +ffffffff81a37080 t hsw_wait_for_power_well_enable +ffffffff81a371c0 t hsw_wait_for_power_well_disable +ffffffff81a37450 t tgl_tc_cold_request +ffffffff81a38000 T intel_dkl_phy_read +ffffffff81a38100 T intel_dkl_phy_write +ffffffff81a381f0 T intel_dkl_phy_rmw +ffffffff81a38310 T intel_dkl_phy_posting_read +ffffffff81a39000 T intel_dmc_has_payload +ffffffff81a39040 T intel_dmc_load_program +ffffffff81a39820 t pipedmc_clock_gating_wa +ffffffff81a39a10 T intel_dmc_disable_program +ffffffff81a39c30 T assert_dmc_loaded +ffffffff81a39d80 T intel_dmc_ucode_init +ffffffff81a3a050 t dmc_load_work_fn +ffffffff81a3a880 T intel_dmc_ucode_suspend +ffffffff81a3a8f0 T intel_dmc_ucode_resume +ffffffff81a3a990 T intel_dmc_ucode_fini +ffffffff81a3aac0 T intel_dmc_print_error_state +ffffffff81a3ab70 T intel_dmc_debugfs_register +ffffffff81a3b000 T intel_dp_is_edp +ffffffff81a3b030 T intel_dp_is_uhbr +ffffffff81a3b070 T intel_dp_max_lane_count +ffffffff81a3b0e0 T intel_dp_link_required +ffffffff81a3b120 T intel_dp_max_data_rate +ffffffff81a3b190 T intel_dp_can_bigjoiner +ffffffff81a3b1e0 T intel_dp_get_link_train_fallback_values +ffffffff81a3b5c0 T intel_dp_mode_to_fec_clock +ffffffff81a3b610 T intel_dp_min_bpp +ffffffff81a3b650 T intel_dp_source_supports_tps3 +ffffffff81a3b6a0 T intel_dp_source_supports_tps4 +ffffffff81a3b6d0 T intel_dp_max_link_rate +ffffffff81a3b790 T intel_dp_rate_select +ffffffff81a3b830 T intel_dp_compute_rate +ffffffff81a3b900 T intel_dp_adjust_compliance_config +ffffffff81a3ba40 T intel_dp_limited_color_range +ffffffff81a3bab0 T intel_dp_compute_psr_vsc_sdp +ffffffff81a3bb30 T intel_dp_needs_vsc_sdp +ffffffff81a3bb80 t intel_dp_compute_vsc_colorimetry +ffffffff81a3bd00 T intel_dp_compute_config +ffffffff81a3c390 t intel_dp_compute_output_format +ffffffff81a3c5c0 T intel_dp_set_link_params +ffffffff81a3c600 T intel_edp_backlight_on +ffffffff81a3c6b0 T intel_edp_backlight_off +ffffffff81a3c760 T intel_dp_sink_set_decompression_state +ffffffff81a3c800 T intel_dp_wait_source_oui +ffffffff81a3c8d0 T intel_dp_set_power +ffffffff81a3cae0 T intel_dp_sync_state +ffffffff81a3cb60 t intel_dp_get_dpcd +ffffffff81a3ccc0 t intel_dp_reset_max_link_params +ffffffff81a3cdd0 T intel_dp_initial_fastset_check +ffffffff81a3ced0 T intel_dp_check_frl_training +ffffffff81a3d460 T intel_dp_pcon_dsc_configure +ffffffff81a3d630 T intel_dp_configure_protocol_converter +ffffffff81a3d7a0 T intel_dp_get_colorimetry_status +ffffffff81a3d800 T intel_edp_fixup_vbt_bpp +ffffffff81a3d8a0 T intel_write_dp_vsc_sdp +ffffffff81a3da30 T intel_dp_set_infoframes +ffffffff81a3db60 t intel_write_dp_sdp +ffffffff81a3de50 T intel_read_dp_sdp +ffffffff81a3e180 T intel_dp_retrain_link +ffffffff81a3e840 T intel_dp_phy_test +ffffffff81a3ef20 T intel_digital_port_connected +ffffffff81a3efc0 T intel_dp_encoder_flush_work +ffffffff81a3f010 T intel_dp_encoder_suspend +ffffffff81a3f050 T intel_dp_encoder_shutdown +ffffffff81a3f090 T intel_dp_hpd_pulse +ffffffff81a3f800 T intel_dp_is_port_edp +ffffffff81a3f850 T intel_dp_init_connector +ffffffff81a409a0 t intel_dp_modeset_retry_work_fn +ffffffff81a40a20 t intel_dp_set_common_rates +ffffffff81a40bc0 T intel_dp_mst_suspend +ffffffff81a40c60 T intel_dp_mst_resume +ffffffff81a40d10 t intel_dp_compute_link_config +ffffffff81a41ab0 t intel_dp_dsc_get_slice_count +ffffffff81a41c20 t intel_dp_set_sink_rates +ffffffff81a41e50 t intel_dp_check_device_service_irq +ffffffff81a42420 t intel_dp_force +ffffffff81a42560 t intel_dp_connector_register +ffffffff81a42640 t intel_dp_connector_unregister +ffffffff81a426a0 t intel_dp_oob_hotplug_event +ffffffff81a42720 t intel_dp_set_edid +ffffffff81a42b50 t intel_dp_get_modes +ffffffff81a42c50 t intel_dp_detect +ffffffff81a43540 t intel_dp_mode_valid +ffffffff81a43ce0 t intel_dp_connector_atomic_check +ffffffff81a44020 t intel_dp_get_dsc_sink_cap +ffffffff81a45000 T intel_dp_aux_fini +ffffffff81a45020 T intel_dp_aux_init +ffffffff81a45200 t xelpdp_aux_ctl_reg +ffffffff81a452c0 t xelpdp_aux_data_reg +ffffffff81a45390 t tgl_aux_ctl_reg +ffffffff81a45410 t tgl_aux_data_reg +ffffffff81a454a0 t skl_aux_ctl_reg +ffffffff81a45520 t skl_aux_data_reg +ffffffff81a455b0 t ilk_aux_ctl_reg +ffffffff81a45630 t ilk_aux_data_reg +ffffffff81a456c0 t g4x_aux_ctl_reg +ffffffff81a45740 t g4x_aux_data_reg +ffffffff81a457d0 t skl_get_aux_clock_divider +ffffffff81a45800 t hsw_get_aux_clock_divider +ffffffff81a458a0 t ilk_get_aux_clock_divider +ffffffff81a45900 t g4x_get_aux_clock_divider +ffffffff81a45950 t skl_get_aux_send_ctl +ffffffff81a459d0 t g4x_get_aux_send_ctl +ffffffff81a45a20 t kasprintf +ffffffff81a45af0 t intel_dp_aux_transfer +ffffffff81a45d40 t intel_dp_aux_xfer +ffffffff81a47000 T intel_dp_aux_init_backlight_funcs +ffffffff81a47270 t intel_dp_aux_hdr_setup_backlight +ffffffff81a473c0 t intel_dp_aux_hdr_get_backlight +ffffffff81a47530 t intel_dp_aux_hdr_set_backlight +ffffffff81a47620 t intel_dp_aux_hdr_disable_backlight +ffffffff81a476a0 t intel_dp_aux_hdr_enable_backlight +ffffffff81a478e0 t intel_dp_aux_vesa_setup_backlight +ffffffff81a47aa0 t intel_dp_aux_vesa_get_backlight +ffffffff81a47ad0 t intel_dp_aux_vesa_set_backlight +ffffffff81a47b70 t intel_dp_aux_vesa_disable_backlight +ffffffff81a47c20 t intel_dp_aux_vesa_enable_backlight +ffffffff81a48000 T intel_dp_hdcp_init +ffffffff81a480b0 t intel_dp_hdcp_write_an_aksv +ffffffff81a481a0 t intel_dp_hdcp_read_bksv +ffffffff81a48230 t intel_dp_hdcp_read_bstatus +ffffffff81a482c0 t intel_dp_hdcp_repeater_present +ffffffff81a48370 t intel_dp_hdcp_read_ri_prime +ffffffff81a48400 t intel_dp_hdcp_read_ksv_ready +ffffffff81a484a0 t intel_dp_hdcp_read_ksv_fifo +ffffffff81a48590 t intel_dp_hdcp_read_v_prime_part +ffffffff81a48630 t intel_dp_hdcp_toggle_signalling +ffffffff81a48660 t intel_dp_mst_hdcp_stream_encryption +ffffffff81a48860 t intel_dp_hdcp_check_link +ffffffff81a488f0 t intel_dp_hdcp_capable +ffffffff81a489a0 t intel_dp_hdcp2_capable +ffffffff81a48a20 t intel_dp_hdcp2_write_msg +ffffffff81a48ae0 t intel_dp_hdcp2_read_msg +ffffffff81a49200 t intel_dp_hdcp2_config_stream_type +ffffffff81a492b0 t intel_dp_mst_hdcp2_stream_encryption +ffffffff81a49530 t intel_dp_mst_hdcp2_check_link +ffffffff81a495f0 t get_hdcp2_dp_msg_data +ffffffff81a49730 t intel_dp_hdcp2_check_link +ffffffff81a4a000 T intel_dp_init_lttpr_and_dprx_caps +ffffffff81a4a2c0 T intel_dp_get_adjust_train +ffffffff81a4a980 T intel_dp_program_link_training_pattern +ffffffff81a4aa80 T intel_dp_set_signal_levels +ffffffff81a4ade0 T intel_dp_dump_link_status +ffffffff81a4aeb0 T intel_dp_stop_link_train +ffffffff81a4b0e0 T intel_dp_start_link_train +ffffffff81a4c210 t intel_dp_link_train_phy +ffffffff81a4e000 T intel_dp_mst_encoder_active_links +ffffffff81a4e030 T intel_dp_mst_encoder_init +ffffffff81a4e270 T intel_dp_mst_source_support +ffffffff81a4e2b0 T intel_dp_mst_encoder_cleanup +ffffffff81a4e310 T intel_dp_mst_is_master_trans +ffffffff81a4e350 T intel_dp_mst_is_slave_trans +ffffffff81a4e390 T intel_dp_mst_add_topology_state_for_crtc +ffffffff81a4e460 t intel_dp_add_mst_connector +ffffffff81a4e670 t intel_dp_mst_poll_hpd_irq +ffffffff81a4e690 t intel_dp_mst_get_hw_state +ffffffff81a4e6f0 t intel_dp_mst_connector_late_register +ffffffff81a4e760 t intel_dp_mst_connector_early_unregister +ffffffff81a4e790 t intel_dp_mst_get_modes +ffffffff81a4e830 t intel_dp_mst_detect +ffffffff81a4e930 t intel_dp_mst_mode_valid_ctx +ffffffff81a4ea90 t intel_mst_atomic_best_encoder +ffffffff81a4eaf0 t intel_dp_mst_atomic_check +ffffffff81a4ec70 t intel_dp_mst_compute_config +ffffffff81a4ef80 t intel_dp_mst_compute_config_late +ffffffff81a4f080 t intel_mst_disable_dp +ffffffff81a4f170 t intel_mst_post_disable_dp +ffffffff81a4f430 t intel_mst_pre_pll_enable_dp +ffffffff81a4f480 t intel_mst_pre_enable_dp +ffffffff81a4f6a0 t intel_mst_enable_dp +ffffffff81a4fa90 t intel_dp_mst_enc_get_hw_state +ffffffff81a4fad0 t intel_dp_mst_enc_get_config +ffffffff81a4faf0 t intel_dp_mst_initial_fastset_check +ffffffff81a4fb10 t intel_dp_mst_encoder_destroy +ffffffff81a50000 T bxt_port_to_phy_channel +ffffffff81a50130 T bxt_ddi_phy_set_signal_levels +ffffffff81a50650 T bxt_ddi_phy_is_enabled +ffffffff81a507a0 T bxt_ddi_phy_uninit +ffffffff81a508a0 T bxt_ddi_phy_init +ffffffff81a50ad0 t _bxt_ddi_phy_init +ffffffff81a510e0 T bxt_ddi_phy_verify_state +ffffffff81a51420 t __phy_reg_verify_state +ffffffff81a51520 T bxt_ddi_phy_calc_lane_lat_optim_mask +ffffffff81a51590 T bxt_ddi_phy_set_lane_optim_mask +ffffffff81a518c0 T bxt_ddi_phy_get_lane_lat_optim_mask +ffffffff81a51b10 T chv_set_phy_signal_level +ffffffff81a51e70 T chv_data_lane_soft_reset +ffffffff81a52050 T chv_phy_pre_pll_enable +ffffffff81a522f0 T chv_phy_pre_encoder_enable +ffffffff81a52580 T chv_phy_release_cl2_override +ffffffff81a52610 T chv_phy_post_pll_disable +ffffffff81a526c0 T vlv_set_phy_signal_level +ffffffff81a52840 T vlv_phy_pre_pll_enable +ffffffff81a52960 T vlv_phy_pre_encoder_enable +ffffffff81a52a80 T vlv_phy_reset_lanes +ffffffff81a53000 T pnv_calc_dpll_params +ffffffff81a530c0 T i9xx_calc_dpll_params +ffffffff81a53190 T vlv_calc_dpll_params +ffffffff81a53250 T chv_calc_dpll_params +ffffffff81a53320 T bxt_find_best_dpll +ffffffff81a53340 t chv_find_best_dpll +ffffffff81a53680 T i9xx_dpll_compute_fp +ffffffff81a536c0 T vlv_compute_dpll +ffffffff81a53740 T chv_compute_dpll +ffffffff81a537c0 T intel_dpll_crtc_compute_clock +ffffffff81a538c0 T intel_dpll_crtc_get_shared_dpll +ffffffff81a53a10 T intel_dpll_init_clock_hook +ffffffff81a53b00 T i9xx_enable_pll +ffffffff81a53eb0 T vlv_enable_pll +ffffffff81a54410 T chv_enable_pll +ffffffff81a54a90 T vlv_force_pll_on +ffffffff81a54be0 T vlv_disable_pll +ffffffff81a54ca0 T chv_disable_pll +ffffffff81a54dd0 T i9xx_disable_pll +ffffffff81a54ed0 T vlv_force_pll_off +ffffffff81a54fc0 T assert_pll_enabled +ffffffff81a550a0 T assert_pll_disabled +ffffffff81a55180 t intel_pll_is_valid +ffffffff81a55250 t dg2_crtc_compute_clock +ffffffff81a552d0 t hsw_crtc_compute_clock +ffffffff81a55390 t hsw_crtc_get_shared_dpll +ffffffff81a55430 t ilk_crtc_compute_clock +ffffffff81a55730 t ilk_crtc_get_shared_dpll +ffffffff81a55780 t g4x_find_best_dpll +ffffffff81a55ac0 t chv_crtc_compute_clock +ffffffff81a55bd0 t vlv_crtc_compute_clock +ffffffff81a56090 t g4x_crtc_compute_clock +ffffffff81a561e0 t i9xx_compute_dpll +ffffffff81a56460 t pnv_crtc_compute_clock +ffffffff81a56820 t i9xx_crtc_compute_clock +ffffffff81a56940 t i9xx_find_best_dpll +ffffffff81a56c70 t i8xx_crtc_compute_clock +ffffffff81a57000 T intel_get_shared_dpll_by_id +ffffffff81a57040 T intel_get_shared_dpll_id +ffffffff81a570d0 T assert_shared_dpll +ffffffff81a571f0 T intel_dpll_get_hw_state +ffffffff81a57220 T icl_tc_port_to_pll_id +ffffffff81a57250 T intel_enable_shared_dpll +ffffffff81a57540 T intel_disable_shared_dpll +ffffffff81a57780 T intel_shared_dpll_swap_state +ffffffff81a57860 T icl_set_active_port_dpll +ffffffff81a578a0 T intel_shared_dpll_init +ffffffff81a57ab0 T intel_compute_shared_dplls +ffffffff81a57b40 T intel_reserve_shared_dplls +ffffffff81a57bd0 T intel_release_shared_dplls +ffffffff81a57c10 T intel_update_active_dpll +ffffffff81a57c70 T intel_dpll_get_freq +ffffffff81a57d00 T intel_dpll_update_ref_clks +ffffffff81a57d50 T intel_dpll_readout_hw_state +ffffffff81a57ed0 T intel_dpll_sanitize_state +ffffffff81a57fb0 T intel_dpll_dump_hw_state +ffffffff81a58030 T intel_shared_dpll_state_verify +ffffffff81a58150 t verify_single_dpll_state +ffffffff81a58470 T intel_shared_dpll_verify_disabled +ffffffff81a584f0 t icl_compute_dplls +ffffffff81a592d0 t icl_get_dplls +ffffffff81a59a50 t icl_put_dplls +ffffffff81a59b10 t icl_update_active_dpll +ffffffff81a59bc0 t icl_update_dpll_ref_clks +ffffffff81a59c00 t icl_dump_hw_state +ffffffff81a59cc0 t combo_pll_enable +ffffffff81a59ee0 t combo_pll_disable +ffffffff81a59fd0 t combo_pll_get_hw_state +ffffffff81a5a060 t icl_ddi_combo_pll_get_freq +ffffffff81a5a230 t icl_dpll_write +ffffffff81a5a4d0 t adlp_cmtg_clock_gating_wa +ffffffff81a5a630 t icl_pll_disable +ffffffff81a5a7d0 t icl_pll_get_hw_state +ffffffff81a5ab10 t tbt_pll_enable +ffffffff81a5acc0 t tbt_pll_disable +ffffffff81a5ace0 t tbt_pll_get_hw_state +ffffffff81a5ad00 t icl_ddi_tbt_pll_get_freq +ffffffff81a5ad70 t mg_pll_enable +ffffffff81a5b320 t mg_pll_disable +ffffffff81a5b360 t dkl_pll_get_hw_state +ffffffff81a5b530 t icl_ddi_mg_pll_get_freq +ffffffff81a5b610 t intel_find_shared_dpll +ffffffff81a5b940 t intel_unreference_shared_dpll +ffffffff81a5baa0 t mg_pll_get_hw_state +ffffffff81a5bcf0 t bxt_compute_dpll +ffffffff81a5c010 t bxt_get_dpll +ffffffff81a5c270 t intel_put_dpll +ffffffff81a5c2d0 t bxt_update_dpll_ref_clks +ffffffff81a5c310 t bxt_dump_hw_state +ffffffff81a5c3c0 t bxt_ddi_pll_enable +ffffffff81a5cec0 t bxt_ddi_pll_disable +ffffffff81a5d0d0 t bxt_ddi_pll_get_hw_state +ffffffff81a5d560 t bxt_ddi_pll_get_freq +ffffffff81a5d5f0 t bxt_ddi_set_dpll_hw_state +ffffffff81a5d7b0 t skl_compute_dpll +ffffffff81a5df30 t skl_get_dpll +ffffffff81a5e160 t skl_update_dpll_ref_clks +ffffffff81a5e1a0 t skl_dump_hw_state +ffffffff81a5e200 t skl_ddi_dpll0_enable +ffffffff81a5e2c0 t skl_ddi_dpll0_disable +ffffffff81a5e2f0 t skl_ddi_dpll0_get_hw_state +ffffffff81a5e3f0 t skl_ddi_pll_get_freq +ffffffff81a5e480 t skl_ddi_wrpll_get_freq +ffffffff81a5e5e0 t skl_ddi_pll_enable +ffffffff81a5e7f0 t skl_ddi_pll_disable +ffffffff81a5e880 t skl_ddi_pll_get_hw_state +ffffffff81a5e9a0 t hsw_compute_dpll +ffffffff81a5f1f0 t hsw_get_dpll +ffffffff81a5f4b0 t hsw_update_dpll_ref_clks +ffffffff81a5f520 t hsw_dump_hw_state +ffffffff81a5f550 t hsw_ddi_wrpll_enable +ffffffff81a5f5d0 t hsw_ddi_wrpll_disable +ffffffff81a5f6b0 t hsw_ddi_wrpll_get_hw_state +ffffffff81a5f750 t hsw_ddi_wrpll_get_freq +ffffffff81a5f840 t hsw_ddi_spll_enable +ffffffff81a5f8a0 t hsw_ddi_spll_disable +ffffffff81a5f970 t hsw_ddi_spll_get_hw_state +ffffffff81a5fa00 t hsw_ddi_spll_get_freq +ffffffff81a5faa0 t hsw_ddi_lcpll_enable +ffffffff81a5fad0 t hsw_ddi_lcpll_disable +ffffffff81a5fb00 t hsw_ddi_lcpll_get_hw_state +ffffffff81a5fb30 t hsw_ddi_lcpll_get_freq +ffffffff81a5fbb0 t ibx_compute_dpll +ffffffff81a5fbe0 t ibx_get_dpll +ffffffff81a5fe60 t ibx_dump_hw_state +ffffffff81a5fec0 t ibx_pch_dpll_enable +ffffffff81a60070 t ibx_pch_dpll_disable +ffffffff81a600f0 t ibx_pch_dpll_get_hw_state +ffffffff81a61000 T intel_dpt_pin +ffffffff81a611e0 T intel_dpt_unpin +ffffffff81a61250 T intel_dpt_resume +ffffffff81a61330 T intel_dpt_suspend +ffffffff81a61400 T intel_dpt_create +ffffffff81a61730 t dpt_insert_page +ffffffff81a617a0 t dpt_clear_range +ffffffff81a617d0 t dpt_insert_entries +ffffffff81a618d0 t dpt_cleanup +ffffffff81a61920 t dpt_bind_vma +ffffffff81a619b0 t dpt_unbind_vma +ffffffff81a619e0 T intel_dpt_destroy +ffffffff81a61a30 t __ww_mutex_lock +ffffffff81a62000 T intel_drrs_type_str +ffffffff81a62040 T intel_drrs_is_active +ffffffff81a62070 T intel_drrs_activate +ffffffff81a62270 T intel_drrs_deactivate +ffffffff81a62350 t intel_drrs_set_state +ffffffff81a624a0 T intel_drrs_invalidate +ffffffff81a624c0 t intel_drrs_frontbuffer_update +ffffffff81a62620 T intel_drrs_flush +ffffffff81a62640 T intel_crtc_drrs_init +ffffffff81a626e0 t intel_drrs_downclock_work +ffffffff81a62740 t __delayed_work_tick +ffffffff81a63000 T intel_dsb_indexed_reg_write +ffffffff81a63140 T intel_dsb_reg_write +ffffffff81a63230 T intel_dsb_commit +ffffffff81a63680 T intel_dsb_prepare +ffffffff81a63810 T intel_dsb_cleanup +ffffffff81a64000 T intel_dsi_bitrate +ffffffff81a640a0 T intel_dsi_tlpx_ns +ffffffff81a640f0 T intel_dsi_get_modes +ffffffff81a64100 T intel_dsi_mode_valid +ffffffff81a641c0 T intel_dsi_host_init +ffffffff81a64270 T intel_dsi_get_panel_orientation +ffffffff81a65000 T intel_dsi_dcs_init_backlight_funcs +ffffffff81a650a0 t dcs_setup_backlight +ffffffff81a65100 t dcs_get_backlight +ffffffff81a65200 t dcs_set_backlight +ffffffff81a652f0 t dcs_disable_backlight +ffffffff81a65670 t dcs_enable_backlight +ffffffff81a66000 T intel_dsi_vbt_exec_sequence +ffffffff81a66020 T intel_dsi_log_params +ffffffff81a663a0 T intel_dsi_vbt_init +ffffffff81a66830 T intel_dsi_vbt_gpio_init +ffffffff81a66850 T intel_dsi_vbt_gpio_cleanup +ffffffff81a67000 T intel_dvo_init +ffffffff81a674f0 t intel_disable_dvo +ffffffff81a675a0 t intel_enable_dvo +ffffffff81a67690 t intel_dvo_get_hw_state +ffffffff81a67700 t intel_dvo_get_config +ffffffff81a677b0 t intel_dvo_compute_config +ffffffff81a67840 t intel_dvo_pre_enable +ffffffff81a67930 t intel_dvo_connector_get_hw_state +ffffffff81a679b0 t intel_dvo_enc_destroy +ffffffff81a679f0 t intel_dvo_detect +ffffffff81a67af0 t intel_dvo_get_modes +ffffffff81a67b60 t intel_dvo_mode_valid +ffffffff81a68000 T intel_fb_get_format_info +ffffffff81a68240 T intel_fb_is_ccs_modifier +ffffffff81a68410 T intel_fb_is_rc_ccs_cc_modifier +ffffffff81a685e0 T intel_fb_is_mc_ccs_modifier +ffffffff81a687b0 T intel_fb_plane_get_modifiers +ffffffff81a688f0 T intel_fb_plane_supports_modifier +ffffffff81a68960 T intel_format_info_is_yuv_semiplanar +ffffffff81a68c00 T intel_fb_is_ccs_aux_plane +ffffffff81a68e40 T intel_fb_rc_ccs_cc_plane +ffffffff81a690a0 T is_surface_linear +ffffffff81a693d0 T main_to_ccs_plane +ffffffff81a696b0 T skl_ccs_to_main_plane +ffffffff81a699a0 T skl_main_to_aux_plane +ffffffff81a69c00 T intel_tile_size +ffffffff81a69c40 T intel_tile_width_bytes +ffffffff81a69e90 T intel_tile_height +ffffffff81a69ef0 T intel_tile_row_size +ffffffff81a69f70 T intel_fb_align_height +ffffffff81a69ff0 T intel_fb_uses_dpt +ffffffff81a6a040 T intel_cursor_alignment +ffffffff81a6a0a0 T intel_surf_alignment +ffffffff81a6a2c0 T intel_fb_plane_get_subsampling +ffffffff81a6a690 T intel_plane_adjust_aligned_offset +ffffffff81a6a700 t intel_adjust_aligned_offset +ffffffff81a6a8b0 T intel_plane_compute_aligned_offset +ffffffff81a6a9b0 t intel_compute_aligned_offset +ffffffff81a6ab70 T intel_fb_needs_pot_stride_remap +ffffffff81a6abc0 T intel_fb_supports_90_270_rotation +ffffffff81a6ac10 T intel_fill_fb_info +ffffffff81a6b850 t calc_plane_remap_info +ffffffff81a6c2b0 T intel_fb_fill_view +ffffffff81a6c300 T intel_plane_compute_gtt +ffffffff81a6cbd0 t intel_plane_check_stride +ffffffff81a6cf40 T intel_framebuffer_init +ffffffff81a6e330 T intel_user_framebuffer_create +ffffffff81a6e470 T intel_framebuffer_create +ffffffff81a6e500 t intel_adjust_tile_offset +ffffffff81a6e640 t intel_user_framebuffer_destroy +ffffffff81a6e6a0 t intel_user_framebuffer_create_handle +ffffffff81a6e6c0 t intel_user_framebuffer_dirty +ffffffff81a6f000 T intel_pin_and_fence_fb_obj +ffffffff81a6f320 t i915_gem_object_lock +ffffffff81a6f530 T intel_unpin_fb_vma +ffffffff81a6f5a0 T intel_plane_pin_fb +ffffffff81a6f8d0 T intel_plane_unpin_fb +ffffffff81a70000 T intel_fbc_cleanup +ffffffff81a701c0 T intel_fbc_pre_update +ffffffff81a70810 T intel_fbc_post_update +ffffffff81a70a60 T intel_fbc_invalidate +ffffffff81a70c80 T intel_fbc_flush +ffffffff81a70f10 T intel_fbc_atomic_check +ffffffff81a71480 T intel_fbc_disable +ffffffff81a71540 t __intel_fbc_disable +ffffffff81a716d0 T intel_fbc_update +ffffffff81a71d90 T intel_fbc_reset_underrun +ffffffff81a71ef0 T intel_fbc_handle_fifo_underrun_irq +ffffffff81a71fa0 T intel_fbc_add_plane +ffffffff81a71fd0 T intel_fbc_init +ffffffff81a72260 T intel_fbc_sanitize +ffffffff81a72330 T intel_fbc_crtc_debugfs_add +ffffffff81a72360 T intel_fbc_debugfs_register +ffffffff81a72390 t intel_fbc_is_ok +ffffffff81a724b0 t intel_fbc_update_state +ffffffff81a72820 t intel_fbc_underrun_work_fn +ffffffff81a72940 t ivb_fbc_activate +ffffffff81a72ba0 t ilk_fbc_deactivate +ffffffff81a72c50 t ilk_fbc_is_active +ffffffff81a72cb0 t ivb_fbc_is_compressing +ffffffff81a72d20 t snb_fbc_nuke +ffffffff81a72da0 t ilk_fbc_program_cfb +ffffffff81a72de0 t ivb_fbc_set_false_color +ffffffff81a72ea0 t snb_fbc_activate +ffffffff81a72f30 t ilk_fbc_is_compressing +ffffffff81a72fa0 t ilk_fbc_activate +ffffffff81a730d0 t i965_fbc_nuke +ffffffff81a73170 t g4x_fbc_activate +ffffffff81a73280 t g4x_fbc_deactivate +ffffffff81a73310 t g4x_fbc_is_active +ffffffff81a73370 t g4x_fbc_is_compressing +ffffffff81a733d0 t g4x_fbc_program_cfb +ffffffff81a73400 t i8xx_fbc_activate +ffffffff81a73570 t i8xx_fbc_deactivate +ffffffff81a73640 t i8xx_fbc_is_active +ffffffff81a736a0 t i8xx_fbc_is_compressing +ffffffff81a73700 t i8xx_fbc_program_cfb +ffffffff81a73780 t i8xx_fbc_nuke +ffffffff81a74000 T intel_fbdev_init +ffffffff81a744d0 t intel_fbdev_suspend_worker +ffffffff81a74500 T intel_fbdev_initial_config_async +ffffffff81a74570 T intel_fbdev_unregister +ffffffff81a745b0 T intel_fbdev_set_suspend +ffffffff81a745e0 T intel_fbdev_fini +ffffffff81a74670 T intel_fbdev_output_poll_changed +ffffffff81a74710 T intel_fbdev_restore_mode +ffffffff81a74790 T intel_fbdev_framebuffer +ffffffff81a747d0 t intelfb_create +ffffffff81a74dd0 t intel_fbdev_set_par +ffffffff81a75000 T assert_fdi_tx_enabled +ffffffff81a750e0 T assert_fdi_tx_disabled +ffffffff81a751c0 T assert_fdi_rx_enabled +ffffffff81a75280 T assert_fdi_rx_disabled +ffffffff81a75340 T assert_fdi_tx_pll_enabled +ffffffff81a753f0 T assert_fdi_rx_pll_enabled +ffffffff81a754b0 T assert_fdi_rx_pll_disabled +ffffffff81a75570 T intel_fdi_link_train +ffffffff81a75590 T intel_fdi_pll_freq_update +ffffffff81a75640 T intel_fdi_link_freq +ffffffff81a75690 T ilk_fdi_compute_config +ffffffff81a759d0 T intel_fdi_normal_train +ffffffff81a75b60 T hsw_fdi_link_train +ffffffff81a76060 T hsw_fdi_disable +ffffffff81a761c0 T ilk_fdi_pll_enable +ffffffff81a763d0 T ilk_fdi_pll_disable +ffffffff81a76500 T ilk_fdi_disable +ffffffff81a76770 T intel_fdi_init_hook +ffffffff81a767d0 t ilk_fdi_link_train +ffffffff81a76e40 t gen6_fdi_link_train +ffffffff81a77670 t ivb_manual_fdi_link_train +ffffffff81a77f10 t cpt_set_fdi_bc_bifurcation +ffffffff81a79000 T intel_set_cpu_fifo_underrun_reporting +ffffffff81a793e0 T intel_set_pch_fifo_underrun_reporting +ffffffff81a79610 T intel_cpu_fifo_underrun_irq_handler +ffffffff81a79800 T intel_pch_fifo_underrun_irq_handler +ffffffff81a79880 T intel_check_cpu_fifo_underruns +ffffffff81a79aa0 T intel_check_pch_fifo_underruns +ffffffff81a7a000 T intel_frontbuffer_flip_prepare +ffffffff81a7a050 T intel_frontbuffer_flip_complete +ffffffff81a7a130 T intel_frontbuffer_flip +ffffffff81a7a200 T __intel_fb_invalidate +ffffffff81a7a290 T __intel_fb_flush +ffffffff81a7a380 T intel_frontbuffer_get +ffffffff81a7a4c0 t frontbuffer_active +ffffffff81a7a4f0 t frontbuffer_retire +ffffffff81a7a530 T intel_frontbuffer_put +ffffffff81a7a6c0 T intel_frontbuffer_track +ffffffff81a7b000 T intel_atomic_global_obj_init +ffffffff81a7b070 T intel_atomic_global_obj_cleanup +ffffffff81a7b170 T intel_atomic_get_global_obj_state +ffffffff81a7b3e0 T intel_atomic_get_old_global_obj_state +ffffffff81a7b440 T intel_atomic_get_new_global_obj_state +ffffffff81a7b4a0 T intel_atomic_swap_global_state +ffffffff81a7b5f0 T intel_atomic_clear_global_state +ffffffff81a7b720 T intel_atomic_lock_global_state +ffffffff81a7b7a0 T intel_atomic_serialize_global_state +ffffffff81a7c000 T intel_gmbus_is_valid_pin +ffffffff81a7c110 T intel_gmbus_reset +ffffffff81a7c170 T intel_bb_set_bits +ffffffff81a7c2a0 T intel_bb_set_dir +ffffffff81a7c2d0 T intel_bb_read_bits +ffffffff81a7c450 T intel_acquire_bus +ffffffff81a7c650 T intel_release_bus +ffffffff81a7c7f0 T intel_send_start +ffffffff81a7c810 T intel_send_stop +ffffffff81a7c830 T intel_initiate_xfer +ffffffff81a7c850 T intel_read_byte +ffffffff81a7c870 T intel_write_byte +ffffffff81a7c890 T intel_gmbus_output_aksv +ffffffff81a7c960 t do_gmbus_xfer +ffffffff81a7cf60 T intel_gmbus_setup +ffffffff81a7d2f0 T intel_gmbus_teardown +ffffffff81a7d370 T intel_gmbus_get_adapter +ffffffff81a7d3f0 T intel_gmbus_force_bit +ffffffff81a7d490 T intel_gmbus_is_forced_bit +ffffffff81a7d4c0 t gmbus_xfer_read +ffffffff81a7d790 t gmbus_xfer_write +ffffffff81a7d9e0 t gmbus_wait +ffffffff81a7ddc0 t gmbus_wait_idle +ffffffff81a7df50 t gmbus_xfer +ffffffff81a7e030 t gmbus_func +ffffffff81a7e070 t gmbus_lock_bus +ffffffff81a7e090 t gmbus_trylock_bus +ffffffff81a7e0f0 t gmbus_unlock_bus +ffffffff81a7f000 T intel_hdcp_capable +ffffffff81a7f0a0 t intel_hdcp_read_valid_bksv +ffffffff81a7f320 T intel_hdcp2_capable +ffffffff81a7f400 T is_hdcp_supported +ffffffff81a7f450 T intel_hdcp_component_init +ffffffff81a7f480 T intel_hdcp_init +ffffffff81a7f5c0 t intel_hdcp_check_work +ffffffff81a83480 t intel_hdcp_prop_work +ffffffff81a83500 T intel_hdcp_enable +ffffffff81a83550 T intel_hdcp_disable +ffffffff81a83680 t intel_hdcp_update_value +ffffffff81a83840 t _intel_hdcp2_disable +ffffffff81a83c30 t _intel_hdcp_disable +ffffffff81a83f20 T intel_hdcp_update_pipe +ffffffff81a84090 T intel_hdcp_component_fini +ffffffff81a840d0 T intel_hdcp_cleanup +ffffffff81a84210 T intel_hdcp_atomic_check +ffffffff81a842a0 T intel_hdcp_handle_cp_irq +ffffffff81a843a0 t __delayed_work_tick +ffffffff81a843c0 t hdcp2_authenticate_repeater_topology +ffffffff81a846a0 t intel_hdcp_get_repeater_ctl +ffffffff81a85000 T hsw_write_infoframe +ffffffff81a85410 t hsw_dip_data_reg +ffffffff81a855d0 T hsw_read_infoframe +ffffffff81a85690 T intel_hdmi_infoframe_enable +ffffffff81a85730 T intel_hdmi_infoframes_enabled +ffffffff81a85850 T intel_read_infoframe +ffffffff81a859e0 T intel_hdmi_read_gcp_infoframe +ffffffff81a85ad0 T intel_dp_dual_mode_set_tmds_output +ffffffff81a85ba0 T intel_hdmi_tmds_clock +ffffffff81a85bf0 T intel_hdmi_bpc_possible +ffffffff81a85d20 T intel_hdmi_limited_color_range +ffffffff81a85d90 T intel_hdmi_compute_config +ffffffff81a864e0 t intel_hdmi_compute_output_format +ffffffff81a86610 T intel_hdmi_encoder_shutdown +ffffffff81a866e0 T intel_hdmi_handle_sink_scrambling +ffffffff81a86800 T intel_infoframe_init +ffffffff81a86980 t vlv_write_infoframe +ffffffff81a86ce0 t vlv_read_infoframe +ffffffff81a86eb0 t vlv_set_infoframes +ffffffff81a87250 t vlv_infoframes_enabled +ffffffff81a872f0 t g4x_write_infoframe +ffffffff81a875b0 t g4x_read_infoframe +ffffffff81a87700 t g4x_set_infoframes +ffffffff81a879a0 t g4x_infoframes_enabled +ffffffff81a87a20 t hsw_set_infoframes +ffffffff81a87cc0 t hsw_infoframes_enabled +ffffffff81a87d50 t ibx_write_infoframe +ffffffff81a88070 t ibx_read_infoframe +ffffffff81a881f0 t ibx_set_infoframes +ffffffff81a88560 t ibx_infoframes_enabled +ffffffff81a885f0 t cpt_write_infoframe +ffffffff81a888f0 t cpt_read_infoframe +ffffffff81a88a70 t cpt_set_infoframes +ffffffff81a88d80 t cpt_infoframes_enabled +ffffffff81a88df0 T intel_hdmi_init_connector +ffffffff81a89480 T intel_hdmi_dsc_get_slice_height +ffffffff81a894e0 T intel_hdmi_dsc_get_num_slices +ffffffff81a89660 T intel_hdmi_dsc_get_bpp +ffffffff81a89750 t intel_hdmi_compute_clock +ffffffff81a89a10 t hdmi_port_clock_valid +ffffffff81a89c40 t intel_write_infoframe +ffffffff81a89e10 t intel_hdmi_detect +ffffffff81a89fd0 t intel_hdmi_force +ffffffff81a8a0b0 t intel_hdmi_connector_register +ffffffff81a8a0c0 t intel_hdmi_connector_unregister +ffffffff81a8a0d0 t intel_hdmi_set_edid +ffffffff81a8a370 t intel_hdmi_get_modes +ffffffff81a8a3b0 t intel_hdmi_mode_valid +ffffffff81a8a550 t intel_hdmi_mode_clock_valid +ffffffff81a8a6e0 t intel_hdmi_hdcp_write_an_aksv +ffffffff81a8a830 t intel_hdmi_hdcp_read_bksv +ffffffff81a8a900 t intel_hdmi_hdcp_read_bstatus +ffffffff81a8a9d0 t intel_hdmi_hdcp_repeater_present +ffffffff81a8aab0 t intel_hdmi_hdcp_read_ri_prime +ffffffff81a8ab80 t intel_hdmi_hdcp_read_ksv_ready +ffffffff81a8ac60 t intel_hdmi_hdcp_read_ksv_fifo +ffffffff81a8ad30 t intel_hdmi_hdcp_read_v_prime_part +ffffffff81a8ae20 t intel_hdmi_hdcp_toggle_signalling +ffffffff81a8b0a0 t intel_hdmi_hdcp_check_link +ffffffff81a8b3f0 t intel_hdmi_hdcp2_capable +ffffffff81a8b4b0 t intel_hdmi_hdcp2_write_msg +ffffffff81a8b5a0 t intel_hdmi_hdcp2_read_msg +ffffffff81a8ba40 t intel_hdmi_hdcp2_check_link +ffffffff81a8c000 T intel_hpd_pin_default +ffffffff81a8c030 T intel_encoder_hotplug +ffffffff81a8c160 T intel_hpd_trigger_irq +ffffffff81a8c1d0 T intel_hpd_irq_handler +ffffffff81a8c5b0 T intel_hpd_init +ffffffff81a8c6c0 T intel_hpd_poll_enable +ffffffff81a8c740 T intel_hpd_poll_disable +ffffffff81a8c7a0 T intel_hpd_init_work +ffffffff81a8c870 t i915_hotplug_work_func +ffffffff81a8cbc0 t i915_digport_work_func +ffffffff81a8cd50 t i915_hpd_poll_init_work +ffffffff81a8ce60 t intel_hpd_irq_storm_reenable_work +ffffffff81a8d1b0 T intel_hpd_cancel_work +ffffffff81a8d2d0 T intel_hpd_disable +ffffffff81a8d360 T intel_hpd_enable +ffffffff81a8d3d0 t __delayed_work_tick +ffffffff81a8e000 T intel_lpe_audio_irq_handler +ffffffff81a8e020 T intel_lpe_audio_init +ffffffff81a8e050 T intel_lpe_audio_teardown +ffffffff81a8e070 T intel_lpe_audio_notify +ffffffff81a8f000 T lspcon_detect_hdr_capability +ffffffff81a8f0b0 T lspcon_write_infoframe +ffffffff81a8f820 T lspcon_read_infoframe +ffffffff81a8f860 T lspcon_set_infoframes +ffffffff81a8fac0 T lspcon_infoframes_enabled +ffffffff81a8fcb0 T lspcon_wait_pcon_mode +ffffffff81a8fcd0 t lspcon_wait_mode +ffffffff81a8ff90 T lspcon_init +ffffffff81a90390 T intel_lspcon_infoframes_enabled +ffffffff81a903d0 T lspcon_resume +ffffffff81a90680 t lspcon_change_mode +ffffffff81a91000 T intel_lvds_port_enabled +ffffffff81a91080 T intel_get_lvds_encoder +ffffffff81a910e0 T intel_is_dual_link_lvds +ffffffff81a91150 T intel_lvds_init +ffffffff81a918c0 t intel_enable_lvds +ffffffff81a91a00 t intel_pre_enable_lvds +ffffffff81a91cd0 t intel_lvds_compute_config +ffffffff81a91e30 t pch_disable_lvds +ffffffff81a91e50 t pch_post_disable_lvds +ffffffff81a91e70 t gmch_disable_lvds +ffffffff81a91ea0 t intel_lvds_get_hw_state +ffffffff81a91f60 t intel_lvds_get_config +ffffffff81a92060 t intel_lvds_shutdown +ffffffff81a92100 t intel_no_lvds_dmi_callback +ffffffff81a92150 t intel_disable_lvds +ffffffff81a92280 t intel_lvds_get_modes +ffffffff81a922b0 t intel_lvds_mode_valid +ffffffff81a92330 t intel_dual_link_lvds_callback +ffffffff81a93000 T intel_modeset_setup_hw_state +ffffffff81a95000 T intel_modeset_verify_crtc +ffffffff81a953b0 t verify_connector_state +ffffffff81a95660 T intel_modeset_verify_disabled +ffffffff81a96000 T intel_opregion_notify_encoder +ffffffff81a96170 t swsci +ffffffff81a964a0 T intel_opregion_notify_adapter +ffffffff81a96500 T intel_opregion_asle_intr +ffffffff81a96550 T intel_opregion_setup +ffffffff81a96d60 t asle_work +ffffffff81a971e0 T intel_opregion_get_panel_type +ffffffff81a972d0 T intel_opregion_get_edid +ffffffff81a973b0 T intel_opregion_headless_sku +ffffffff81a97400 T intel_opregion_register +ffffffff81a97490 T intel_opregion_resume +ffffffff81a97520 T intel_opregion_suspend +ffffffff81a975c0 T intel_opregion_unregister +ffffffff81a97740 t intel_no_opregion_vbt_callback +ffffffff81a977a0 t intel_use_opregion_panel_type_callback +ffffffff81a98000 T intel_overlay_reset +ffffffff81a98050 T intel_overlay_switch_off +ffffffff81a98250 t intel_overlay_release_old_vid +ffffffff81a983f0 T intel_overlay_put_image_ioctl +ffffffff81a995c0 T intel_overlay_attrs_ioctl +ffffffff81a99a70 T intel_overlay_setup +ffffffff81a99cd0 t intel_overlay_last_flip_retire +ffffffff81a99d10 T intel_overlay_cleanup +ffffffff81a99dd0 T intel_overlay_capture_error_state +ffffffff81a99ec0 T intel_overlay_print_error_state +ffffffff81a9a290 t intel_overlay_release_old_vid_tail +ffffffff81a9a360 t intel_overlay_off_tail +ffffffff81a9a510 t intel_overlay_flip_prepare +ffffffff81a9b000 T intel_panel_use_ssc +ffffffff81a9b060 T intel_panel_preferred_fixed_mode +ffffffff81a9b0b0 T intel_panel_fixed_mode +ffffffff81a9b170 T intel_panel_downclock_mode +ffffffff81a9b260 T intel_panel_highest_mode +ffffffff81a9b2c0 T intel_panel_get_modes +ffffffff81a9b350 T intel_panel_drrs_type +ffffffff81a9b3a0 T intel_panel_compute_config +ffffffff81a9b520 T intel_panel_add_edid_fixed_modes +ffffffff81a9ba50 T intel_panel_add_vbt_lfp_fixed_mode +ffffffff81a9bab0 t intel_panel_add_fixed_mode +ffffffff81a9bc30 T intel_panel_add_vbt_sdvo_fixed_mode +ffffffff81a9bca0 T intel_panel_add_encoder_fixed_mode +ffffffff81a9bce0 T intel_panel_fitting +ffffffff81a9c330 T intel_panel_detect +ffffffff81a9c3c0 T intel_panel_mode_valid +ffffffff81a9c4d0 T intel_panel_init_alloc +ffffffff81a9c520 T intel_panel_init +ffffffff81a9c5e0 T intel_panel_fini +ffffffff81a9d000 T intel_has_pch_trancoder +ffffffff81a9d060 T intel_crtc_pch_transcoder +ffffffff81a9d0a0 T intel_pch_transcoder_get_m1_n1 +ffffffff81a9d0f0 T intel_pch_transcoder_get_m2_n2 +ffffffff81a9d140 T ilk_pch_pre_enable +ffffffff81a9d170 T ilk_pch_enable +ffffffff81a9d710 t ilk_pch_transcoder_set_timings +ffffffff81a9d990 T ilk_pch_disable +ffffffff81a9d9b0 T ilk_pch_post_disable +ffffffff81a9dce0 T ilk_pch_get_config +ffffffff81a9dea0 T lpt_pch_enable +ffffffff81a9e0d0 T lpt_pch_disable +ffffffff81a9e1e0 T lpt_pch_get_config +ffffffff81a9e2b0 T intel_pch_sanitize +ffffffff81a9e590 t assert_pch_dp_disabled +ffffffff81a9e680 t assert_pch_hdmi_disabled +ffffffff81a9f000 T lpt_disable_iclkip +ffffffff81a9f070 T lpt_iclkip +ffffffff81a9f100 T lpt_program_iclkip +ffffffff81a9f380 T lpt_get_iclkip +ffffffff81a9f490 T lpt_disable_clkout_dp +ffffffff81a9f570 T intel_init_pch_refclk +ffffffff81aa1000 T intel_crtc_initial_plane_config +ffffffff81aa2000 T intel_pps_lock +ffffffff81aa2060 T intel_pps_unlock +ffffffff81aa20c0 T intel_pps_reset_all +ffffffff81aa2210 T intel_pps_check_power_unlocked +ffffffff81aa23d0 T intel_pps_wait_power_cycle +ffffffff81aa2590 T intel_pps_vdd_on_unlocked +ffffffff81aa2ac0 T intel_pps_vdd_on +ffffffff81aa2bc0 T intel_pps_vdd_off_sync +ffffffff81aa2c90 t intel_pps_vdd_off_sync_unlocked +ffffffff81aa2f70 T intel_pps_vdd_off_unlocked +ffffffff81aa3080 T intel_pps_on_unlocked +ffffffff81aa3480 T intel_pps_on +ffffffff81aa3520 T intel_pps_off_unlocked +ffffffff81aa3770 T intel_pps_off +ffffffff81aa3810 T intel_pps_backlight_on +ffffffff81aa3a20 T intel_pps_backlight_off +ffffffff81aa3c30 T intel_pps_backlight_power +ffffffff81aa3e00 T vlv_pps_init +ffffffff81aa3f60 t vlv_detach_power_sequencer +ffffffff81aa40e0 t vlv_steal_power_sequencer +ffffffff81aa4210 t pps_init_delays +ffffffff81aa4670 t pps_init_registers +ffffffff81aa4a10 T intel_pps_have_panel_power_or_vdd +ffffffff81aa4b70 T intel_pps_encoder_reset +ffffffff81aa4d00 t vlv_initial_power_sequencer_setup +ffffffff81aa4fb0 t pps_vdd_init +ffffffff81aa50c0 T intel_pps_init +ffffffff81aa5240 t edp_panel_vdd_work +ffffffff81aa52f0 T intel_pps_init_late +ffffffff81aa5470 T intel_pps_unlock_regs_wa +ffffffff81aa5560 T intel_pps_setup +ffffffff81aa55d0 T assert_pps_unlocked +ffffffff81aa5820 t intel_pps_get_registers +ffffffff81aa5ee0 t wait_panel_status +ffffffff81aa61a0 t intel_pps_readout_hw_state +ffffffff81aa6360 t __delayed_work_tick +ffffffff81aa7000 T intel_psr_irq_handler +ffffffff81aa7680 T intel_psr_init_dpcd +ffffffff81aa7910 T intel_psr_compute_config +ffffffff81aa81b0 T intel_psr_get_config +ffffffff81aa8360 T intel_psr_disable +ffffffff81aa8470 t intel_psr_disable_locked +ffffffff81aa88e0 T intel_psr_pause +ffffffff81aa8ad0 t intel_psr_exit +ffffffff81aa8db0 T intel_psr_resume +ffffffff81aa8e40 t intel_psr_activate +ffffffff81aa95e0 T intel_psr2_disable_plane_sel_fetch +ffffffff81aa9650 T intel_psr2_program_plane_sel_fetch +ffffffff81aa9800 T intel_psr2_program_trans_man_trk_ctl +ffffffff81aa9950 T intel_psr2_sel_fetch_update +ffffffff81aa9fe0 T intel_psr_pre_plane_update +ffffffff81aaa1b0 T intel_psr_post_plane_update +ffffffff81aaac40 T intel_psr_wait_for_idle_locked +ffffffff81aaae20 T intel_psr_debug_set +ffffffff81aab050 t psr_irq_control +ffffffff81aab1a0 T intel_psr_invalidate +ffffffff81aab460 T intel_psr_flush +ffffffff81aab930 T intel_psr_init +ffffffff81aaba60 t intel_psr_work +ffffffff81aabc10 t tgl_dc3co_disable_work +ffffffff81aabc60 T intel_psr_short_pulse +ffffffff81aac020 T intel_psr_enabled +ffffffff81aac0a0 T intel_psr_lock +ffffffff81aac190 T intel_psr_unlock +ffffffff81aac280 t tgl_psr2_disable_dc3co +ffffffff81aac3b0 t __delayed_work_tick +ffffffff81aad000 T intel_lookup_range_min_qp +ffffffff81aad0b0 T intel_lookup_range_max_qp +ffffffff81aae000 T intel_init_quirks +ffffffff81aae0f0 T intel_has_quirk +ffffffff81aae130 t quirk_ssc_force_disable +ffffffff81aae160 t quirk_invert_brightness +ffffffff81aae190 t quirk_backlight_present +ffffffff81aae1c0 t quirk_increase_t12_delay +ffffffff81aae1f0 t quirk_increase_ddi_disabled_time +ffffffff81aae220 t intel_dmi_reverse_brightness +ffffffff81aae270 t intel_dmi_no_pps_backlight +ffffffff81aaf000 T intel_sdvo_port_enabled +ffffffff81aaf0a0 T intel_sdvo_init +ffffffff81aafc50 t intel_sdvo_compute_config +ffffffff81ab01b0 t pch_disable_sdvo +ffffffff81ab01e0 t pch_post_disable_sdvo +ffffffff81ab01f0 t intel_disable_sdvo +ffffffff81ab0360 t intel_sdvo_pre_enable +ffffffff81ab0ce0 t intel_enable_sdvo +ffffffff81ab0ee0 t intel_sdvo_get_hw_state +ffffffff81ab0fd0 t intel_sdvo_get_config +ffffffff81ab1540 t intel_sdvo_ddc_proxy_xfer +ffffffff81ab15f0 t intel_sdvo_ddc_proxy_func +ffffffff81ab1620 t __intel_sdvo_write_cmd +ffffffff81ab1ae0 t proxy_lock_bus +ffffffff81ab1b10 t proxy_trylock_bus +ffffffff81ab1b40 t proxy_unlock_bus +ffffffff81ab1b70 t intel_sdvo_enc_destroy +ffffffff81ab1b80 t intel_sdvo_get_preferred_input_mode +ffffffff81ab1f10 t intel_sdvo_get_dtd_from_mode +ffffffff81ab2080 t intel_sdvo_read_response +ffffffff81ab2520 t intel_sdvo_write_sdvox +ffffffff81ab2710 t intel_sdvo_write_infoframe +ffffffff81ab28e0 t intel_sdvo_dvi_init +ffffffff81ab2b60 t intel_sdvo_tv_init +ffffffff81ab2e70 t intel_sdvo_lvds_init +ffffffff81ab3050 t intel_sdvo_hotplug +ffffffff81ab3090 t intel_sdvo_connector_get_hw_state +ffffffff81ab3120 t intel_sdvo_detect +ffffffff81ab34a0 t intel_sdvo_connector_register +ffffffff81ab34b0 t intel_sdvo_connector_unregister +ffffffff81ab34c0 t intel_sdvo_connector_duplicate_state +ffffffff81ab3540 t intel_sdvo_connector_atomic_set_property +ffffffff81ab3710 t intel_sdvo_connector_atomic_get_property +ffffffff81ab3930 t intel_sdvo_get_modes +ffffffff81ab3bf0 t intel_sdvo_mode_valid +ffffffff81ab3cc0 t intel_sdvo_atomic_check +ffffffff81ab3d70 t intel_sdvo_create_enhance_property +ffffffff81ab5000 T intel_snps_phy_wait_for_calibration +ffffffff81ab50d0 T intel_snps_phy_update_psr_power_state +ffffffff81ab51a0 T intel_snps_phy_set_signal_levels +ffffffff81ab53f0 T intel_mpllb_calc_state +ffffffff81ab5560 T intel_snps_phy_check_hdmi_link_rate +ffffffff81ab55c0 T intel_mpllb_enable +ffffffff81ab5820 T intel_mpllb_disable +ffffffff81ab59b0 T intel_mpllb_calc_port_clock +ffffffff81ab5a70 T intel_mpllb_readout_hw_state +ffffffff81ab5be0 T intel_mpllb_state_verify +ffffffff81ab7000 T intel_plane_check_src_coordinates +ffffffff81ab71d0 T vlv_plane_min_cdclk +ffffffff81ab72c0 T ivb_plane_min_cdclk +ffffffff81ab7380 T hsw_plane_min_cdclk +ffffffff81ab7420 T chv_plane_check_rotation +ffffffff81ab7490 T intel_sprite_set_colorkey_ioctl +ffffffff81ab7760 T intel_sprite_plane_create +ffffffff81ab7ab0 t vlv_sprite_update_noarm +ffffffff81ab7ba0 t vlv_sprite_update_arm +ffffffff81ab8260 t vlv_sprite_disable_arm +ffffffff81ab82f0 t vlv_sprite_get_hw_state +ffffffff81ab83b0 t vlv_sprite_check +ffffffff81ab8640 t ivb_sprite_update_noarm +ffffffff81ab87b0 t ivb_sprite_update_arm +ffffffff81ab8b90 t ivb_sprite_disable_arm +ffffffff81ab8c40 t ivb_sprite_get_hw_state +ffffffff81ab8cf0 t g4x_sprite_check +ffffffff81ab92c0 t hsw_sprite_max_stride +ffffffff81ab9310 t g4x_sprite_max_stride +ffffffff81ab9380 t ivb_sprite_min_cdclk +ffffffff81ab94b0 t g4x_sprite_update_noarm +ffffffff81ab9620 t g4x_sprite_update_arm +ffffffff81ab9a70 t g4x_sprite_disable_arm +ffffffff81ab9b20 t g4x_sprite_get_hw_state +ffffffff81ab9bd0 t g4x_sprite_min_cdclk +ffffffff81ab9c90 t vlv_sprite_format_mod_supported +ffffffff81ab9dc0 t snb_sprite_format_mod_supported +ffffffff81ab9eb0 t g4x_sprite_format_mod_supported +ffffffff81aba000 T intel_tc_port_in_tbt_alt_mode +ffffffff81aba070 T intel_tc_port_in_dp_alt_mode +ffffffff81aba0e0 T intel_tc_port_in_legacy_mode +ffffffff81aba150 T intel_tc_cold_requires_aux_pw +ffffffff81aba1a0 T intel_tc_port_get_lane_mask +ffffffff81aba300 T intel_tc_port_get_pin_assignment_mask +ffffffff81aba460 T intel_tc_port_fia_max_lane_count +ffffffff81aba5a0 T intel_tc_port_set_fia_lane_count +ffffffff81aba7b0 T intel_tc_port_init_mode +ffffffff81abac30 t intel_tc_port_update_mode +ffffffff81abb150 T intel_tc_port_sanitize_mode +ffffffff81abb500 T intel_tc_port_connected +ffffffff81abb5f0 T intel_tc_port_lock +ffffffff81abb610 t tc_port_live_status_mask +ffffffff81abb8e0 T intel_tc_port_unlock +ffffffff81abb960 t __intel_tc_port_lock +ffffffff81abbb60 T intel_tc_port_flush_work +ffffffff81abbb80 T intel_tc_port_ref_held +ffffffff81abbbd0 T intel_tc_port_get_link +ffffffff81abbc50 T intel_tc_port_put_link +ffffffff81abbce0 T intel_tc_port_init +ffffffff81abbf60 t intel_tc_port_disconnect_phy_work +ffffffff81abbfb0 t tc_phy_status_complete +ffffffff81abc0c0 t tc_phy_take_ownership +ffffffff81abc260 t __delayed_work_tick +ffffffff81abd000 T intel_tv_init +ffffffff81abd420 t intel_tv_compute_config +ffffffff81abd8c0 t intel_tv_get_config +ffffffff81abde70 t intel_tv_pre_enable +ffffffff81abe7a0 t intel_enable_tv +ffffffff81abe800 t intel_disable_tv +ffffffff81abe860 t intel_tv_get_hw_state +ffffffff81abe8c0 t intel_tv_connector_duplicate_state +ffffffff81abe940 t intel_tv_mode_to_mode +ffffffff81abea90 t intel_tv_get_modes +ffffffff81abedf0 t intel_tv_detect +ffffffff81abf250 t intel_tv_mode_valid +ffffffff81abf2e0 t intel_tv_atomic_check +ffffffff81ac0000 T intel_dsc_source_support +ffffffff81ac0060 T intel_dsc_compute_params +ffffffff81ac0520 T intel_dsc_power_domain +ffffffff81ac05d0 T intel_dsc_dsi_pps_write +ffffffff81ac0870 T intel_dsc_dp_pps_write +ffffffff81ac0950 T intel_uncompressed_joiner_enable +ffffffff81ac0a70 T intel_dsc_enable +ffffffff81ac2340 T intel_dsc_disable +ffffffff81ac24d0 T intel_dsc_get_config +ffffffff81ac3000 T intel_vga_disable +ffffffff81ac3120 T intel_vga_redisable_power_on +ffffffff81ac31c0 T intel_vga_redisable +ffffffff81ac3280 T intel_vga_reset_io_mem +ffffffff81ac32e0 T intel_vga_register +ffffffff81ac3310 T intel_vga_unregister +ffffffff81ac4000 T intel_vrr_is_capable +ffffffff81ac40a0 T intel_vrr_check_modeset +ffffffff81ac4130 T intel_vrr_vmin_vblank_start +ffffffff81ac4190 T intel_vrr_vmax_vblank_start +ffffffff81ac41f0 T intel_vrr_compute_config +ffffffff81ac4380 T intel_vrr_enable +ffffffff81ac4560 T intel_vrr_send_push +ffffffff81ac45e0 T intel_vrr_is_push_sent +ffffffff81ac4670 T intel_vrr_disable +ffffffff81ac4740 T intel_vrr_get_config +ffffffff81ac5000 T skl_update_scaler_crtc +ffffffff81ac50c0 t skl_update_scaler +ffffffff81ac53e0 T skl_update_scaler_plane +ffffffff81ac57d0 T skl_pfit_enable +ffffffff81ac5cb0 T skl_program_plane_scaler +ffffffff81ac6370 T skl_detach_scalers +ffffffff81ac64b0 T skl_scaler_disable +ffffffff81ac7000 T skl_format_to_fourcc +ffffffff81ac7180 T icl_is_nv12_y_plane +ffffffff81ac71f0 T icl_is_hdr_plane +ffffffff81ac7230 T skl_calc_main_surface_offset +ffffffff81ac7470 T skl_universal_plane_create +ffffffff81ac7b60 t icl_plane_min_width +ffffffff81ac7cf0 t icl_hdr_plane_max_width +ffffffff81ac7d40 t icl_sdr_plane_max_width +ffffffff81ac7d70 t icl_plane_max_height +ffffffff81ac7da0 t icl_plane_min_cdclk +ffffffff81ac7de0 t glk_plane_max_width +ffffffff81ac7e90 t skl_plane_max_height +ffffffff81ac7ec0 t glk_plane_min_cdclk +ffffffff81ac7f40 t skl_plane_max_width +ffffffff81ac8010 t skl_plane_min_cdclk +ffffffff81ac8080 t skl_plane_max_stride +ffffffff81ac8120 t icl_plane_update_noarm +ffffffff81ac8ae0 t icl_plane_update_arm +ffffffff81ac8c50 t icl_plane_disable_arm +ffffffff81ac8d60 t skl_plane_update_noarm +ffffffff81ac8f00 t skl_plane_update_arm +ffffffff81ac9300 t skl_plane_disable_arm +ffffffff81ac93b0 t skl_plane_get_hw_state +ffffffff81ac9470 t skl_plane_check +ffffffff81aca8a0 t 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intel_gpu_freq +ffffffff81b4bd80 T intel_rps_set_boost_frequency +ffffffff81b4bf10 T intel_rps_dec_waiters +ffffffff81b4bf70 T intel_rps_boost +ffffffff81b4c090 T gen6_rps_get_freq_caps +ffffffff81b4c1e0 T intel_rps_enable +ffffffff81b4d2c0 T intel_rps_disable +ffffffff81b4d550 T intel_freq_opcode +ffffffff81b4d610 T gen11_rps_irq_handler +ffffffff81b4d6a0 T gen6_rps_irq_handler +ffffffff81b4d7b0 T gen5_rps_irq_handler +ffffffff81b4d9d0 T intel_rps_init_early +ffffffff81b4da70 t rps_work +ffffffff81b4de10 t rps_timer +ffffffff81b4e030 T intel_rps_init +ffffffff81b4ed10 T intel_rps_sanitize +ffffffff81b4ed70 T intel_rps_get_cagf +ffffffff81b4ee00 T intel_rps_read_actual_frequency +ffffffff81b4f030 T intel_rps_read_punit_req +ffffffff81b4f0b0 T intel_rps_read_punit_req_frequency +ffffffff81b4f1d0 T intel_rps_get_requested_frequency +ffffffff81b4f390 T intel_rps_get_max_frequency +ffffffff81b4f480 T intel_rps_get_max_raw_freq +ffffffff81b4f500 T intel_rps_get_rp0_frequency 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intel_sseu_info_init +ffffffff81b53ee0 T intel_sseu_make_rpcs +ffffffff81b54050 T intel_sseu_dump +ffffffff81b54250 T intel_sseu_print_topology +ffffffff81b54530 T intel_sseu_print_ss_info +ffffffff81b54590 T intel_slicemask_from_xehp_dssmask +ffffffff81b55000 T intel_sseu_status +ffffffff81b55830 T intel_sseu_debugfs_register +ffffffff81b56000 T intel_gt_init_timelines +ffffffff81b56060 T __intel_timeline_create +ffffffff81b56220 T intel_timeline_create_from_engine +ffffffff81b562e0 T __intel_timeline_pin +ffffffff81b56310 T intel_timeline_pin +ffffffff81b56430 T intel_timeline_reset_seqno +ffffffff81b56460 T intel_timeline_enter +ffffffff81b56550 T intel_timeline_exit +ffffffff81b56610 T intel_timeline_get_seqno +ffffffff81b56670 t __intel_timeline_get_seqno +ffffffff81b56710 T intel_timeline_read_hwsp +ffffffff81b567e0 T intel_timeline_unpin +ffffffff81b56830 T __intel_timeline_free +ffffffff81b568c0 T intel_gt_fini_timelines +ffffffff81b568f0 T intel_gt_show_timelines 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intel_engines_add_sysfs +ffffffff81b5f000 T intel_guc_notify +ffffffff81b5f030 T intel_guc_init_send_regs +ffffffff81b5f0d0 T intel_guc_init_early +ffffffff81b5f210 t gen11_reset_guc_interrupts +ffffffff81b5f260 t gen11_enable_guc_interrupts +ffffffff81b5f320 t gen11_disable_guc_interrupts +ffffffff81b5f3c0 t gen9_reset_guc_interrupts +ffffffff81b5f480 t gen9_enable_guc_interrupts +ffffffff81b5f5a0 t gen9_disable_guc_interrupts +ffffffff81b5f680 T intel_guc_init_late +ffffffff81b5f690 T intel_guc_write_params +ffffffff81b5f8a0 T intel_guc_dump_time_info +ffffffff81b5f9d0 T intel_guc_init +ffffffff81b600d0 T intel_guc_fini +ffffffff81b60190 T intel_guc_send_mmio +ffffffff81b60650 T intel_guc_to_host_process_recv_msg +ffffffff81b60730 T intel_guc_auth_huc +ffffffff81b60790 T intel_guc_suspend +ffffffff81b60850 T intel_guc_resume +ffffffff81b60880 T intel_guc_allocate_vma +ffffffff81b60970 T intel_guc_allocate_and_map_vma +ffffffff81b60a10 T intel_guc_self_cfg32 +ffffffff81b60af0 T intel_guc_self_cfg64 +ffffffff81b60bd0 T intel_guc_load_status +ffffffff81b60d60 T intel_guc_write_barrier +ffffffff81b61000 T intel_guc_ads_print_policy_info +ffffffff81b61020 T intel_guc_global_policies_update +ffffffff81b61070 T intel_guc_ads_create +ffffffff81b61630 T intel_guc_ads_init_late +ffffffff81b61680 T intel_guc_ads_destroy +ffffffff81b616e0 T intel_guc_ads_reset +ffffffff81b61750 T intel_guc_engine_usage_offset +ffffffff81b61790 T intel_guc_engine_usage_record_map +ffffffff81b62000 T intel_guc_capture_getlistsize +ffffffff81b62020 t guc_capture_getlistsize +ffffffff81b62300 T intel_guc_capture_getlist +ffffffff81b62ba0 T intel_guc_capture_getnullheader +ffffffff81b62c50 T intel_guc_capture_print_engine_node +ffffffff81b63150 T intel_guc_capture_free_node +ffffffff81b631d0 T intel_guc_capture_get_matching_node +ffffffff81b63350 T intel_guc_capture_process +ffffffff81b64370 T intel_guc_capture_destroy +ffffffff81b646d0 T intel_guc_capture_init +ffffffff81b64cf0 t guc_capture_log_get_register +ffffffff81b65080 t guc_capture_alloc_steered_lists_xe_hpg +ffffffff81b66000 T intel_guc_ct_init_early +ffffffff81b66120 t ct_incoming_request_worker_func +ffffffff81b66480 t ct_receive_tasklet_func +ffffffff81b664a0 T intel_guc_ct_init +ffffffff81b66640 T intel_guc_ct_fini +ffffffff81b666a0 T intel_guc_ct_enable +ffffffff81b669b0 T intel_guc_ct_disable +ffffffff81b66a60 T intel_guc_ct_send +ffffffff81b67410 T intel_guc_ct_event_handler +ffffffff81b67440 t ct_try_receive_message +ffffffff81b67c20 T intel_guc_ct_print_info +ffffffff81b67d30 t ct_write +ffffffff81b67ed0 t ct_deadlocked +ffffffff81b69000 T intel_guc_debugfs_register +ffffffff81b6a000 T intel_guc_fw_upload +ffffffff81b6b000 T intel_gt_init_hwconfig +ffffffff81b6b1d0 T intel_gt_fini_hwconfig +ffffffff81b6c000 T intel_guc_log_section_size_capture +ffffffff81b6c040 t guc_log_init_sizes +ffffffff81b6c240 T intel_guc_check_log_buf_overflow +ffffffff81b6c2f0 T intel_guc_get_log_buffer_size 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intel_guc_slpc_set_max_freq +ffffffff81b6f2c0 T intel_guc_slpc_get_max_freq +ffffffff81b6f400 T intel_guc_slpc_set_min_freq +ffffffff81b6f5d0 T intel_guc_slpc_get_min_freq +ffffffff81b6f710 T intel_guc_slpc_set_media_ratio_mode +ffffffff81b6f820 T intel_guc_pm_intrmsk_enable +ffffffff81b6f8a0 T intel_guc_slpc_enable +ffffffff81b6fdb0 T intel_guc_slpc_set_boost_freq +ffffffff81b6fe50 t slpc_force_min_freq +ffffffff81b6ff70 T intel_guc_slpc_dec_waiters +ffffffff81b6ffb0 T intel_guc_slpc_print_info +ffffffff81b701c0 T intel_guc_slpc_fini +ffffffff81b71000 T intel_guc_wait_for_pending_msg +ffffffff81b71160 T intel_guc_wait_for_idle +ffffffff81b711b0 T intel_guc_busyness_park +ffffffff81b713b0 T intel_guc_busyness_unpark +ffffffff81b71520 T intel_guc_submission_reset_prepare +ffffffff81b71c90 t guc_flush_destroyed_contexts +ffffffff81b71e00 T intel_guc_submission_reset +ffffffff81b71f20 t __guc_reset_context +ffffffff81b72220 T intel_guc_submission_cancel_requests +ffffffff81b724c0 T intel_guc_submission_reset_finish +ffffffff81b725a0 T intel_guc_submission_init +ffffffff81b72710 T intel_guc_submission_fini +ffffffff81b727b0 T intel_guc_submission_setup +ffffffff81b72bb0 t guc_sched_engine_disabled +ffffffff81b72be0 t guc_sched_engine_destroy +ffffffff81b72c40 t guc_bump_inflight_request_prio +ffffffff81b72d30 t guc_retire_inflight_request_prio +ffffffff81b72db0 t guc_submission_tasklet +ffffffff81b73170 t guc_sanitize +ffffffff81b731e0 t guc_release +ffffffff81b73210 T intel_guc_submission_enable +ffffffff81b733d0 T intel_guc_submission_disable +ffffffff81b73420 T intel_guc_submission_init_early +ffffffff81b73590 t destroyed_worker_func +ffffffff81b73870 t reset_fail_worker_func +ffffffff81b73900 t guc_timestamp_ping +ffffffff81b73b30 T intel_guc_deregister_done_process_msg +ffffffff81b73e90 t register_context +ffffffff81b747f0 T intel_guc_sched_done_process_msg +ffffffff81b74ba0 T intel_guc_context_reset_process_msg +ffffffff81b74de0 T intel_guc_error_capture_process_msg +ffffffff81b74e90 T intel_guc_lookup_engine +ffffffff81b74ee0 T intel_guc_engine_failure_process_msg +ffffffff81b75060 T intel_guc_find_hung_context +ffffffff81b75240 T intel_guc_dump_active_requests +ffffffff81b753d0 T intel_guc_submission_print_info +ffffffff81b75510 T intel_guc_submission_print_context_info +ffffffff81b75950 t emit_bb_start_parent_no_preempt_mid_batch +ffffffff81b75a80 T intel_guc_virtual_engine_has_heartbeat +ffffffff81b75b10 t guc_virtual_get_sibling +ffffffff81b75bb0 t update_context_prio +ffffffff81b75da0 t try_context_registration +ffffffff81b76220 t guc_wq_item_append +ffffffff81b764a0 t guc_add_request +ffffffff81b766e0 t guc_context_policy_init_v70 +ffffffff81b76860 t guc_resume +ffffffff81b76960 t guc_request_alloc +ffffffff81b76c50 t add_to_context +ffffffff81b76d50 t remove_from_context +ffffffff81b76e20 t guc_engine_reset_prepare +ffffffff81b76e80 t guc_rewind_nop +ffffffff81b76eb0 t guc_reset_nop +ffffffff81b76ee0 t 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i915_drm_client_add +ffffffff81b8b110 T __i915_drm_client_free +ffffffff81b8b170 T i915_drm_clients_fini +ffffffff81b8c000 T i915_gem_get_aperture_ioctl +ffffffff81b8c0d0 T i915_gem_object_unbind +ffffffff81b8c340 T i915_gem_pread_ioctl +ffffffff81b8ca20 T i915_gem_pwrite_ioctl +ffffffff81b8d210 T i915_gem_sw_finish_ioctl +ffffffff81b8d2a0 T i915_gem_runtime_suspend +ffffffff81b8d3a0 T i915_gem_object_ggtt_pin_ww +ffffffff81b8d650 T i915_gem_object_ggtt_pin +ffffffff81b8d7c0 T i915_gem_madvise_ioctl +ffffffff81b8dae0 T i915_gem_drain_freed_objects +ffffffff81b8db60 T i915_gem_drain_workqueue +ffffffff81b8dc40 T i915_gem_init +ffffffff81b8dfc0 T i915_gem_driver_register +ffffffff81b8dff0 T i915_gem_driver_unregister +ffffffff81b8e000 T i915_gem_driver_remove +ffffffff81b8e0e0 T i915_gem_driver_release +ffffffff81b8e230 T i915_gem_init_early +ffffffff81b8e2b0 T i915_gem_cleanup_early +ffffffff81b8e370 T i915_gem_open +ffffffff81b8e490 t i915_gem_gtt_prepare +ffffffff81b8e790 t __ww_mutex_lock +ffffffff81b8f000 T i915_gem_evict_something +ffffffff81b8f880 T i915_gem_evict_for_node +ffffffff81b8fc50 T i915_gem_evict_vm +ffffffff81b91000 T i915_gem_gtt_prepare_pages +ffffffff81b91030 T i915_gem_gtt_finish_pages +ffffffff81b91090 T i915_gem_gtt_reserve +ffffffff81b91140 T i915_gem_gtt_insert +ffffffff81b92000 T i915_gem_ww_ctx_init +ffffffff81b92060 T i915_gem_ww_unlock_single +ffffffff81b921a0 T i915_gem_ww_ctx_fini +ffffffff81b92210 t i915_gem_ww_ctx_unlock_all +ffffffff81b92370 T i915_gem_ww_ctx_backoff +ffffffff81b93000 T i915_getparam_ioctl +ffffffff81b94000 T intel_gpu_error_find_batch +ffffffff81b94070 T i915_error_printf +ffffffff81b94130 T intel_gpu_error_print_vma +ffffffff81b94160 T i915_gpu_coredump_copy_to_buffer +ffffffff81b941b0 T __i915_gpu_coredump_free +ffffffff81b94340 T intel_engine_coredump_alloc +ffffffff81b94ba0 T intel_engine_coredump_add_request +ffffffff81b94f10 T intel_engine_coredump_add_vma +ffffffff81b95030 T i915_gpu_coredump_alloc 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ibx_disable_display_interrupt +ffffffff81b98bc0 T i915_pipestat_enable_mask +ffffffff81b98d60 T i915_enable_pipestat +ffffffff81b98ef0 T intel_irqs_enabled +ffffffff81b98f20 T i915_disable_pipestat +ffffffff81b990a0 T i915_get_vblank_counter +ffffffff81b99250 T g4x_get_vblank_counter +ffffffff81b992e0 T intel_crtc_get_vblank_timestamp +ffffffff81b99300 t i915_get_crtc_scanoutpos +ffffffff81b99750 T intel_get_crtc_scanline +ffffffff81b997c0 t __intel_get_crtc_scanline +ffffffff81b99a30 T gen8_de_pipe_underrun_mask +ffffffff81b99a70 T i8xx_enable_vblank +ffffffff81b99b90 T i915gm_enable_vblank +ffffffff81b99c10 T i965_enable_vblank +ffffffff81b99d30 T ilk_enable_vblank +ffffffff81b99de0 T bdw_enable_vblank +ffffffff81b99f90 T i8xx_disable_vblank +ffffffff81b9a090 T i915gm_disable_vblank +ffffffff81b9a100 T i965_disable_vblank +ffffffff81b9a200 T ilk_disable_vblank +ffffffff81b9a300 T bdw_disable_vblank +ffffffff81b9a480 T gen8_irq_power_well_post_enable +ffffffff81b9a600 T gen8_irq_power_well_pre_disable +ffffffff81b9a790 T intel_synchronize_irq +ffffffff81b9a7b0 T valleyview_enable_display_irqs +ffffffff81b9a820 t vlv_display_irq_reset +ffffffff81b9a9e0 t vlv_display_irq_postinstall +ffffffff81b9ac30 T valleyview_disable_display_irqs +ffffffff81b9ac80 T intel_hpd_irq_setup +ffffffff81b9acd0 T intel_irq_init +ffffffff81b9af80 t ivb_parity_work +ffffffff81b9b320 T intel_irq_fini +ffffffff81b9b360 T intel_irq_install +ffffffff81b9b470 t intel_irq_reset +ffffffff81b9bfd0 t intel_irq_postinstall +ffffffff81b9ccd0 T intel_irq_uninstall +ffffffff81b9cd40 T intel_runtime_pm_disable_interrupts +ffffffff81b9cd70 T intel_runtime_pm_enable_interrupts +ffffffff81b9cda0 T intel_synchronize_hardirq +ffffffff81b9cdc0 t i9xx_pipestat_irq_reset +ffffffff81b9cf50 t kasprintf +ffffffff81b9d020 t i915_hpd_irq_setup +ffffffff81b9d130 t icp_hpd_irq_setup +ffffffff81b9d320 t dg1_hpd_irq_setup +ffffffff81b9d380 t gen11_hpd_irq_setup +ffffffff81b9d5d0 t bxt_hpd_irq_setup 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i915_memcpy_init_early +ffffffff81ba5000 T i915_mitigate_clear_residuals +ffffffff81ba6000 T i915_init +ffffffff81ba6240 t i915_check_nomodeset +ffffffff81ba62c0 t i915_mock_selftests +ffffffff81ba62f0 t i915_pmu_init +ffffffff81ba6320 t i915_pmu_exit +ffffffff81ba7000 T i915_params_dump +ffffffff81baa120 T i915_params_copy +ffffffff81bab000 T i915_params_free +ffffffff81bac000 T i915_pci_register_driver +ffffffff81bac030 T i915_pci_unregister_driver +ffffffff81bad000 T i915_oa_config_release +ffffffff81bad060 T i915_perf_get_oa_config +ffffffff81bad0c0 T i915_oa_init_reg_state +ffffffff81bad1d0 T i915_perf_open_ioctl +ffffffff81bad720 T i915_perf_register +ffffffff81bad750 T i915_perf_unregister +ffffffff81bad7c0 T i915_perf_add_config_ioctl +ffffffff81bad810 T i915_perf_remove_config_ioctl +ffffffff81bad890 T i915_perf_init +ffffffff81badc10 t gen7_is_valid_b_counter_addr +ffffffff81badc60 t hsw_is_valid_mux_addr +ffffffff81badce0 t hsw_enable_metric_set +ffffffff81baddc0 t hsw_disable_metric_set +ffffffff81baded0 t gen7_oa_enable +ffffffff81bae030 t gen7_oa_disable +ffffffff81bae0f0 t gen7_oa_read +ffffffff81bae650 t gen7_oa_hw_tail_read +ffffffff81bae6a0 t gen8_oa_read +ffffffff81baecd0 t gen8_is_valid_mux_addr +ffffffff81baed50 t gen8_is_valid_flex_addr +ffffffff81baedd0 t chv_is_valid_mux_addr +ffffffff81baee50 t gen8_oa_enable +ffffffff81baef90 t gen8_oa_disable +ffffffff81baf050 t gen8_enable_metric_set +ffffffff81baf110 t gen8_disable_metric_set +ffffffff81baf1a0 t gen8_oa_hw_tail_read +ffffffff81baf1f0 t gen11_is_valid_mux_addr +ffffffff81baf2b0 t gen11_disable_metric_set +ffffffff81baf340 t gen12_is_valid_b_counter_addr +ffffffff81baf390 t gen12_is_valid_mux_addr +ffffffff81baf3e0 t gen12_oa_enable +ffffffff81baf560 t gen12_oa_disable +ffffffff81baf6a0 t gen12_enable_metric_set +ffffffff81baf7d0 t gen12_disable_metric_set +ffffffff81baf8b0 t gen12_oa_hw_tail_read +ffffffff81baf900 T i915_perf_sysctl_register +ffffffff81baf930 T i915_perf_sysctl_unregister +ffffffff81baf960 T i915_perf_fini +ffffffff81bafa40 t destroy_config +ffffffff81bafad0 T i915_perf_ioctl_version +ffffffff81bafb00 t emit_oa_config +ffffffff81bb01e0 t i915_gem_object_lock +ffffffff81bb03f0 t lrc_configure_all_contexts +ffffffff81bb05b0 t oa_configure_all_contexts +ffffffff81bb08d0 t gen8_modify_self +ffffffff81bb0aa0 t gen8_modify_context +ffffffff81bb0c40 t gen12_configure_oar_context +ffffffff81bb1000 T i915_query_ioctl +ffffffff81bb1110 t query_topology_info +ffffffff81bb1160 t query_engine_info +ffffffff81bb13a0 t query_perf_config +ffffffff81bb16a0 t query_memregion_info +ffffffff81bb1920 t query_hwconfig_blob +ffffffff81bb19a0 t query_geometry_subslices +ffffffff81bb1a30 t fill_topology_info +ffffffff81bb1bd0 t query_perf_config_data +ffffffff81bb3000 T i915_request_slab_cache +ffffffff81bb3030 t i915_fence_get_driver_name +ffffffff81bb3060 t i915_fence_get_timeline_name +ffffffff81bb30c0 t i915_fence_enable_signaling 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i915_request_await_dma_fence +ffffffff81bb48a0 T i915_request_await_deps +ffffffff81bb4910 T i915_request_await_object +ffffffff81bb49c0 T __i915_request_commit +ffffffff81bb4c30 T __i915_request_queue_bh +ffffffff81bb4c70 T __i915_request_queue +ffffffff81bb4cd0 T i915_request_add +ffffffff81bb4d80 T i915_request_wait_timeout +ffffffff81bb50a0 t request_wait_wake +ffffffff81bb50c0 T i915_request_wait +ffffffff81bb5120 T i915_request_show +ffffffff81bb5350 T i915_test_request_state +ffffffff81bb54c0 T i915_request_module_exit +ffffffff81bb54f0 T i915_request_module_init +ffffffff81bb5580 t submit_notify +ffffffff81bb5660 t semaphore_notify +ffffffff81bb56b0 t __rq_watchdog_expired +ffffffff81bb5760 t __await_execution +ffffffff81bb58e0 t i915_request_await_start +ffffffff81bb5a10 t irq_execute_cb +ffffffff81bb6000 T i915_sg_trim +ffffffff81bb6110 T i915_refct_sgt_init +ffffffff81bb6150 T i915_rsgt_from_mm_node +ffffffff81bb6300 T i915_rsgt_from_buddy_resource +ffffffff81bb64e0 t i915_refct_sgt_release +ffffffff81bb7000 T i915_sched_lookup_priolist +ffffffff81bb7120 T __i915_priolist_free +ffffffff81bb7140 T i915_schedule +ffffffff81bb7620 T i915_sched_node_init +ffffffff81bb7680 T i915_sched_node_reinit +ffffffff81bb76c0 T __i915_sched_node_add_dependency +ffffffff81bb77d0 T i915_sched_node_add_dependency +ffffffff81bb7910 T i915_sched_node_fini +ffffffff81bb79f0 T i915_request_show_with_schedule +ffffffff81bb7ad0 T i915_sched_engine_create +ffffffff81bb7b80 t default_destroy +ffffffff81bb7bd0 t default_disabled +ffffffff81bb7c00 T i915_scheduler_module_exit +ffffffff81bb7c30 T i915_scheduler_module_init +ffffffff81bb8000 T i915_save_display +ffffffff81bb8360 T i915_restore_display +ffffffff81bb9000 T i915_sw_fence_complete +ffffffff81bb9040 t __i915_sw_fence_complete +ffffffff81bb91c0 T i915_sw_fence_await +ffffffff81bb9240 T __i915_sw_fence_init +ffffffff81bb92b0 T i915_sw_fence_reinit +ffffffff81bb92f0 T i915_sw_fence_commit +ffffffff81bb9330 T i915_sw_fence_await_sw_fence +ffffffff81bb9350 t __i915_sw_fence_await_sw_fence +ffffffff81bb95c0 T i915_sw_fence_await_sw_fence_gfp +ffffffff81bb95e0 T i915_sw_fence_await_dma_fence +ffffffff81bb9810 t dma_i915_sw_fence_wake +ffffffff81bb9890 t irq_i915_sw_fence_work +ffffffff81bb98d0 t timer_i915_sw_fence_wake +ffffffff81bb99b0 t dma_i915_sw_fence_wake_timer +ffffffff81bb9a40 T __i915_sw_fence_await_dma_fence +ffffffff81bb9b90 t __dma_i915_sw_fence_wake +ffffffff81bb9bf0 T i915_sw_fence_await_reservation +ffffffff81bb9cd0 t i915_sw_fence_wake +ffffffff81bba000 T dma_fence_work_init +ffffffff81bba080 t fence_notify +ffffffff81bba170 t fence_work +ffffffff81bba1d0 T dma_fence_work_chain +ffffffff81bba220 t get_driver_name +ffffffff81bba250 t get_timeline_name +ffffffff81bba290 t fence_release +ffffffff81bbb000 T i915_switcheroo_register +ffffffff81bbb030 T i915_switcheroo_unregister +ffffffff81bbc000 T i915_syncmap_init +ffffffff81bbc030 T i915_syncmap_is_later +ffffffff81bbc130 T i915_syncmap_set +ffffffff81bbc1e0 t __sync_set +ffffffff81bbc4d0 T i915_syncmap_free +ffffffff81bbc530 t __sync_free +ffffffff81bbd000 T i915_setup_sysfs +ffffffff81bbd030 T i915_teardown_sysfs +ffffffff81bbe000 T i915_ttm_buddy_man_init +ffffffff81bbe210 T i915_ttm_buddy_man_fini +ffffffff81bbe400 T i915_ttm_buddy_man_reserve +ffffffff81bbe4d0 T i915_ttm_buddy_man_visible_size +ffffffff81bbe500 T i915_ttm_buddy_man_avail +ffffffff81bbe560 t i915_ttm_buddy_man_alloc +ffffffff81bbe890 t i915_ttm_buddy_man_free +ffffffff81bbe900 t i915_ttm_buddy_man_intersects +ffffffff81bbe9b0 t i915_ttm_buddy_man_compatible +ffffffff81bbea60 t i915_ttm_buddy_man_debug +ffffffff81bbf000 T i915_user_extensions +ffffffff81bc0000 T __i915_printk +ffffffff81bc00c0 T add_taint_for_CI +ffffffff81bc00f0 T cancel_timer +ffffffff81bc0140 T set_timer_ms +ffffffff81bc01f0 T i915_vtd_active +ffffffff81bc1000 T intel_vgpu_detect +ffffffff81bc1030 T intel_vgpu_register +ffffffff81bc1090 T intel_vgpu_active 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release_references +ffffffff81bc4100 T i915_vma_destroy +ffffffff81bc4240 T i915_vma_parked +ffffffff81bc4510 T i915_vma_revoke_mmap +ffffffff81bc4610 T _i915_vma_move_to_active +ffffffff81bc4840 T __i915_vma_evict +ffffffff81bc4bb0 T __i915_vma_unbind +ffffffff81bc4c50 T i915_vma_unbind +ffffffff81bc4da0 T i915_vma_unbind_async +ffffffff81bc4f90 T i915_vma_unbind_unlocked +ffffffff81bc50a0 T i915_vma_make_unshrinkable +ffffffff81bc50e0 T i915_vma_make_shrinkable +ffffffff81bc5100 T i915_vma_make_purgeable +ffffffff81bc5120 T i915_vma_module_exit +ffffffff81bc5140 T i915_vma_module_init +ffffffff81bc51a0 t __i915_vma_active +ffffffff81bc51f0 t __i915_vma_retire +ffffffff81bc5240 t __vma_bind +ffffffff81bc52e0 t __vma_release +ffffffff81bc5360 t intel_rotate_pages +ffffffff81bc56c0 t intel_remap_pages +ffffffff81bc5a90 t intel_partial_pages +ffffffff81bc6000 T i915_vma_resource_alloc +ffffffff81bc6050 T i915_vma_resource_free +ffffffff81bc6090 T i915_vma_resource_unhold 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intel_dram_edram_detect +ffffffff81bc96f0 t icl_pcode_read_mem_global_info +ffffffff81bc97d0 t skl_dram_get_channel_info +ffffffff81bc99a0 t skl_dram_get_dimm_info +ffffffff81bca000 T intel_memory_region_lookup +ffffffff81bca0e0 T intel_memory_region_by_type +ffffffff81bca1a0 T intel_memory_region_reserve +ffffffff81bca1c0 T intel_memory_region_debug +ffffffff81bca220 T intel_memory_region_create +ffffffff81bca390 T intel_memory_region_set_name +ffffffff81bca410 T intel_memory_region_avail +ffffffff81bca490 T intel_memory_region_destroy +ffffffff81bca500 T intel_memory_regions_hw_probe +ffffffff81bca650 T intel_memory_regions_driver_release +ffffffff81bcb000 T intel_detect_pch +ffffffff81bcb310 t intel_pch_match +ffffffff81bcb360 t intel_pch_type +ffffffff81bcc000 T snb_pcode_read +ffffffff81bcc0d0 t __snb_pcode_rw +ffffffff81bcc260 T snb_pcode_write_timeout +ffffffff81bcc330 T skl_pcode_request +ffffffff81bcc670 T intel_pcode_init +ffffffff81bcc6d0 T snb_pcode_read_p +ffffffff81bcc7e0 T snb_pcode_write_p +ffffffff81bcd000 T intel_set_memory_cxsr +ffffffff81bcd0a0 t _intel_set_memory_cxsr +ffffffff81bcd350 T intel_wm_plane_visible +ffffffff81bcd3b0 T ilk_wm_max_level +ffffffff81bcd420 T intel_print_wm_latency +ffffffff81bcd580 T ilk_disable_lp_wm +ffffffff81bcd660 T g4x_wm_get_hw_state +ffffffff81bcde30 T g4x_wm_sanitize +ffffffff81bcdfd0 t g4x_program_watermarks +ffffffff81bce370 T vlv_wm_get_hw_state +ffffffff81bcf040 t vlv_invalidate_wms +ffffffff81bcf1a0 T vlv_wm_sanitize +ffffffff81bcf2f0 t vlv_program_watermarks +ffffffff81bcfa40 T ilk_wm_get_hw_state +ffffffff81bcfeb0 T intel_init_clock_gating +ffffffff81bcfed0 T intel_suspend_hw +ffffffff81bcff80 T intel_init_clock_gating_hooks +ffffffff81bd01d0 T intel_init_pm +ffffffff81bd0cc0 T intel_pm_setup +ffffffff81bd0d00 t chv_set_memory_dvfs +ffffffff81bd0ec0 t pvc_init_clock_gating +ffffffff81bd1060 t dg2_init_clock_gating +ffffffff81bd11b0 t xehpsdv_init_clock_gating +ffffffff81bd12b0 t adlp_init_clock_gating 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t i830_init_clock_gating +ffffffff81bd34b0 t nop_init_clock_gating +ffffffff81bd34e0 t ilk_compute_pipe_wm +ffffffff81bd3960 t ilk_compute_intermediate_wm +ffffffff81bd3c90 t ilk_initial_watermarks +ffffffff81bd3d00 t ilk_optimize_watermarks +ffffffff81bd3db0 t ilk_compute_wm_level +ffffffff81bd4320 t ilk_validate_wm_level +ffffffff81bd4460 t ilk_program_watermarks +ffffffff81bd5220 t ilk_wm_merge +ffffffff81bd5490 t vlv_compute_pipe_wm +ffffffff81bd62d0 t vlv_compute_intermediate_wm +ffffffff81bd65d0 t vlv_initial_watermarks +ffffffff81bd6650 t vlv_atomic_update_fifo +ffffffff81bd6960 t vlv_optimize_watermarks +ffffffff81bd6a20 t g4x_compute_pipe_wm +ffffffff81bd7650 t g4x_compute_intermediate_wm +ffffffff81bd7aa0 t g4x_initial_watermarks +ffffffff81bd7b40 t g4x_optimize_watermarks +ffffffff81bd7c20 t pnv_update_wm +ffffffff81bd82d0 t i965_update_wm +ffffffff81bd86a0 t i9xx_update_wm +ffffffff81bd8e50 t i845_update_wm +ffffffff81bda000 T intel_region_ttm_device_init +ffffffff81bda070 T intel_region_ttm_device_fini +ffffffff81bda090 T intel_region_to_ttm_type +ffffffff81bda0d0 T intel_region_ttm_init +ffffffff81bda170 T intel_region_ttm_fini +ffffffff81bda3d0 T intel_region_ttm_resource_to_rsgt +ffffffff81bda410 T intel_region_ttm_resource_free +ffffffff81bdb000 T intel_runtime_pm_get_raw +ffffffff81bdb090 T intel_runtime_pm_get +ffffffff81bdb140 T intel_runtime_pm_get_if_in_use +ffffffff81bdb1f0 T intel_runtime_pm_get_if_active +ffffffff81bdb2a0 T intel_runtime_pm_get_noresume +ffffffff81bdb3d0 T intel_runtime_pm_put_raw +ffffffff81bdb460 T intel_runtime_pm_put_unchecked +ffffffff81bdb520 T intel_runtime_pm_enable +ffffffff81bdb550 T intel_runtime_pm_disable +ffffffff81bdb580 T intel_runtime_pm_driver_release +ffffffff81bdb610 T intel_runtime_pm_init_early +ffffffff81bdc000 T intel_sbi_read +ffffffff81bdc050 t intel_sbi_rw +ffffffff81bdc240 T intel_sbi_write +ffffffff81bdd000 T intel_step_init +ffffffff81bdd3f0 T intel_step_name +ffffffff81bdd430 t pvc_step_lookup +ffffffff81bde000 T gen3_stolen_base +ffffffff81bde050 T gen11_stolen_base +ffffffff81bde0d0 T i830_stolen_size +ffffffff81bde150 T gen3_stolen_size +ffffffff81bde1c0 T gen6_stolen_size +ffffffff81bde210 T chv_stolen_size +ffffffff81bde280 T gen8_stolen_size +ffffffff81bde2e0 T gen9_stolen_size +ffffffff81bde350 T intel_init_stolen_res +ffffffff81bdf000 T intel_uncore_mmio_debug_init_early +ffffffff81bdf060 T intel_uncore_forcewake_domain_to_str +ffffffff81bdf0d0 T intel_uncore_fw_release_timer +ffffffff81bdf1f0 T intel_uncore_suspend +ffffffff81bdf240 t intel_uncore_forcewake_reset +ffffffff81bdf520 T intel_uncore_resume_early +ffffffff81bdf650 T intel_uncore_unclaimed_mmio +ffffffff81bdf6c0 T intel_uncore_runtime_resume +ffffffff81bdf6f0 T intel_uncore_forcewake_get +ffffffff81bdf860 T intel_uncore_forcewake_user_get +ffffffff81bdf980 T intel_uncore_forcewake_get__locked +ffffffff81bdfa50 T intel_uncore_forcewake_user_put +ffffffff81bdfb90 T intel_uncore_forcewake_put__locked +ffffffff81bdfc90 T intel_uncore_forcewake_put +ffffffff81bdfdb0 T intel_uncore_forcewake_put_delayed +ffffffff81bdff00 T intel_uncore_forcewake_flush +ffffffff81bdffb0 T assert_forcewakes_inactive +ffffffff81be0020 T assert_forcewakes_active +ffffffff81be0050 T intel_uncore_setup_mmio +ffffffff81be0080 t uncore_unmap_mmio +ffffffff81be00b0 T intel_uncore_init_early +ffffffff81be0120 T intel_uncore_init_mmio +ffffffff81be1380 T intel_uncore_prune_engine_fw_domains +ffffffff81be1550 t fw_domain_fini +ffffffff81be1650 T intel_uncore_fini_mmio +ffffffff81be16f0 T __intel_wait_for_register_fw +ffffffff81be19a0 T __intel_wait_for_register +ffffffff81be1d20 T intel_uncore_forcewake_for_reg +ffffffff81be1e30 t check_for_unclaimed_mmio +ffffffff81be1f90 T intel_uncore_arm_unclaimed_mmio_detection +ffffffff81be20a0 t vgpu_write8 +ffffffff81be20e0 t vgpu_write16 +ffffffff81be2120 t vgpu_write32 +ffffffff81be2160 t vgpu_read8 +ffffffff81be21a0 t vgpu_read16 +ffffffff81be21e0 t vgpu_read32 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i915_pmic_bus_access_notifier +ffffffff81be4ce0 t fw_domains_get_with_thread_status +ffffffff81be4e20 t fw_domains_get_with_fallback +ffffffff81be52c0 t fw_domain_wait_ack_with_fallback +ffffffff81be5540 t fw_domains_get_normal +ffffffff81be5870 t ___force_wake_auto +ffffffff81be5900 t __gen6_gt_wait_for_fifo +ffffffff81be6000 T __intel_wakeref_get_first +ffffffff81be60a0 T __intel_wakeref_put_last +ffffffff81be6100 t ____intel_wakeref_put_last +ffffffff81be61d0 T __intel_wakeref_init +ffffffff81be6250 t __intel_wakeref_put_work +ffffffff81be62c0 T intel_wakeref_wait_for_idle +ffffffff81be63e0 T intel_wakeref_auto_init +ffffffff81be6460 t wakeref_auto_timeout +ffffffff81be6510 T intel_wakeref_auto +ffffffff81be6710 T intel_wakeref_auto_fini +ffffffff81be67d0 t __delayed_work_tick +ffffffff81be7000 T intel_wopcm_init_early +ffffffff81be7080 T intel_wopcm_init +ffffffff81be8000 T vlv_iosf_sb_get +ffffffff81be8020 T vlv_iosf_sb_put +ffffffff81be8040 T vlv_punit_read +ffffffff81be8090 t vlv_sideband_rw +ffffffff81be8240 T vlv_punit_write +ffffffff81be8290 T vlv_bunit_read +ffffffff81be82e0 T vlv_bunit_write +ffffffff81be8330 T vlv_nc_read +ffffffff81be8380 T vlv_iosf_sb_read +ffffffff81be83d0 T vlv_iosf_sb_write +ffffffff81be8420 T vlv_cck_read +ffffffff81be8470 T vlv_cck_write +ffffffff81be84c0 T vlv_ccu_read +ffffffff81be8510 T vlv_ccu_write +ffffffff81be8560 T vlv_dpio_read +ffffffff81be8630 T vlv_dpio_write +ffffffff81be86a0 T vlv_flisdsi_read +ffffffff81be86f0 T vlv_flisdsi_write +ffffffff81be9000 T vlv_suspend_complete +ffffffff81be9a40 T vlv_resume_prepare +ffffffff81bea480 T vlv_suspend_init +ffffffff81bea4f0 T vlv_suspend_cleanup +ffffffff81bea550 t vlv_wait_for_pw_status +ffffffff81beb000 T atom_execute_table_scratch_unlocked +ffffffff81beb0a0 t atom_execute_table_locked +ffffffff81beb3d0 T atom_execute_table +ffffffff81beb480 T atom_parse +ffffffff81beb660 T atom_destroy +ffffffff81beb6a0 T atom_asic_init +ffffffff81beb8b0 T atom_parse_data_header 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atombios_crtc_mode_fixup +ffffffff81bf3a50 t atombios_crtc_disable +ffffffff81bf3cb0 t radeon_get_shared_nondp_ppll +ffffffff81bf4000 T radeon_atom_copy_swap +ffffffff81bf4020 T radeon_dp_aux_init +ffffffff81bf4110 t radeon_dp_aux_transfer_atom +ffffffff81bf42e0 T radeon_dp_getsinktype +ffffffff81bf4350 T radeon_dp_getdpcd +ffffffff81bf44c0 T radeon_dp_get_panel_mode +ffffffff81bf45d0 T radeon_dp_set_link_config +ffffffff81bf4650 t radeon_dp_get_dp_link_config +ffffffff81bf47d0 T radeon_dp_mode_valid_helper +ffffffff81bf4880 T radeon_dp_needs_link_train +ffffffff81bf48f0 T radeon_dp_set_rx_power_state +ffffffff81bf4970 T radeon_dp_link_train +ffffffff81bf50f0 t radeon_process_aux_ch +ffffffff81bf5290 t dp_get_adjust_train +ffffffff81bf6000 T atombios_get_backlight_level +ffffffff81bf6070 T atombios_set_backlight_level +ffffffff81bf6220 T atombios_dig_transmitter_setup +ffffffff81bf6240 T radeon_atom_backlight_init +ffffffff81bf6420 t radeon_atom_backlight_get_brightness +ffffffff81bf6480 T atombios_dvo_setup +ffffffff81bf6640 T atombios_digital_setup +ffffffff81bf68f0 T atombios_get_encoder_mode +ffffffff81bf6b80 T atombios_dig_encoder_setup2 +ffffffff81bf6fd0 T atombios_dig_encoder_setup +ffffffff81bf6ff0 T atombios_dig_transmitter_setup2 +ffffffff81bf7950 T atombios_set_edp_panel_power +ffffffff81bf7a80 T radeon_atom_release_dig_encoder +ffffffff81bf7ac0 T radeon_atom_pick_dig_encoder +ffffffff81bf7d00 T radeon_atom_encoder_init +ffffffff81bf7dd0 t atombios_external_encoder_setup +ffffffff81bf8030 T radeon_atom_ext_encoder_setup_ddc +ffffffff81bf8080 T radeon_enc_destroy +ffffffff81bf8130 T radeon_add_atom_encoder +ffffffff81bf8570 t radeon_atom_backlight_update_status +ffffffff81bf85d0 t radeon_atom_encoder_dpms +ffffffff81bf88e0 t radeon_atom_mode_fixup +ffffffff81bf8a20 t radeon_atom_encoder_prepare +ffffffff81bf8f00 t radeon_atom_encoder_commit +ffffffff81bf8f30 t radeon_atom_encoder_mode_set +ffffffff81bf94e0 t radeon_atom_dig_detect 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btc_read_arb_registers +ffffffff81bfc6e0 T btc_dpm_vblank_too_short +ffffffff81bfc750 T btc_dpm_pre_set_power_state +ffffffff81bfd630 T btc_dpm_set_power_state +ffffffff81bfda40 T btc_dpm_post_set_power_state +ffffffff81bfdb60 T btc_dpm_enable +ffffffff81bfed70 T btc_dpm_disable +ffffffff81bff2a0 T btc_dpm_setup_asic +ffffffff81bff380 T btc_dpm_init +ffffffff81bff780 T btc_dpm_fini +ffffffff81bff830 T btc_dpm_debugfs_print_current_performance_level +ffffffff81bff880 T btc_dpm_get_current_sclk +ffffffff81bff900 T btc_dpm_get_current_mclk +ffffffff81bff980 T btc_dpm_get_sclk +ffffffff81bff9d0 T btc_dpm_get_mclk +ffffffff81c00000 T ci_dpm_powergate_uvd +ffffffff81c00380 T ci_dpm_vblank_too_short +ffffffff81c00410 T ci_fan_ctrl_get_fan_speed_percent +ffffffff81c004b0 T ci_fan_ctrl_set_fan_speed_percent +ffffffff81c00580 T ci_fan_ctrl_set_mode +ffffffff81c00710 t ci_fan_ctrl_set_static_mode +ffffffff81c007d0 t ci_thermal_start_smc_fan_control +ffffffff81c00a10 T ci_fan_ctrl_get_mode +ffffffff81c00a70 T ci_dpm_force_performance_level +ffffffff81c01330 t ci_upload_dpm_level_enable_mask +ffffffff81c01660 T ci_dpm_pre_set_power_state +ffffffff81c01960 T ci_dpm_post_set_power_state +ffffffff81c01a30 T ci_dpm_setup_asic +ffffffff81c01c30 T ci_dpm_enable +ffffffff81c05a60 t ci_enable_didt +ffffffff81c05d00 t ci_enable_power_containment +ffffffff81c061a0 T ci_dpm_late_enable +ffffffff81c06390 T ci_dpm_disable +ffffffff81c06a90 T ci_dpm_set_power_state +ffffffff81c07c10 T ci_dpm_display_configuration_changed +ffffffff81c07db0 T ci_dpm_fini +ffffffff81c07e60 T ci_dpm_init +ffffffff81c095d0 T ci_dpm_debugfs_print_current_performance_level +ffffffff81c09710 T ci_dpm_print_power_state +ffffffff81c097d0 T ci_dpm_get_current_sclk +ffffffff81c098a0 T ci_dpm_get_current_mclk +ffffffff81c09970 T ci_dpm_get_sclk +ffffffff81c099c0 T ci_dpm_get_mclk +ffffffff81c09a10 t ci_populate_all_graphic_levels +ffffffff81c09f90 t ci_populate_all_memory_levels +ffffffff81c0a8a0 t ci_do_program_memory_timing_parameters +ffffffff81c0aac0 t ci_populate_smc_voltage_table +ffffffff81c0ac20 t ci_enable_sclk_mclk_dpm +ffffffff81c0b000 T ci_copy_bytes_to_smc +ffffffff81c0b250 T ci_start_smc +ffffffff81c0b290 T ci_reset_smc +ffffffff81c0b2d0 T ci_program_jump_on_start +ffffffff81c0b300 T ci_stop_smc_clock +ffffffff81c0b340 T ci_start_smc_clock +ffffffff81c0b380 T ci_is_smc_running +ffffffff81c0b3f0 T ci_load_smc_ucode +ffffffff81c0b580 T ci_read_smc_sram_dword +ffffffff81c0b650 T ci_write_smc_sram_dword +ffffffff81c0c000 T cik_get_allowed_info_register +ffffffff81c0c0a0 T cik_didt_rreg +ffffffff81c0c140 T cik_didt_wreg +ffffffff81c0c1c0 T ci_get_temp +ffffffff81c0c210 T kv_get_temp +ffffffff81c0c260 T cik_pciep_rreg +ffffffff81c0c2e0 T cik_pciep_wreg +ffffffff81c0c350 T cik_get_xclk +ffffffff81c0c3c0 T cik_mm_rdoorbell +ffffffff81c0c420 T cik_mm_wdoorbell +ffffffff81c0c470 T ci_mc_load_microcode +ffffffff81c0c7c0 T cik_ring_test +ffffffff81c0ca70 T cik_fence_gfx_ring_emit +ffffffff81c0ce70 T cik_fence_compute_ring_emit +ffffffff81c0d100 T cik_semaphore_ring_emit +ffffffff81c0d2d0 T cik_copy_cpdma +ffffffff81c0d6d0 T cik_ring_ib_execute +ffffffff81c0dcb0 T cik_ib_test +ffffffff81c0df90 T cik_gfx_get_rptr +ffffffff81c0dff0 T cik_gfx_get_wptr +ffffffff81c0e030 T cik_gfx_set_wptr +ffffffff81c0e070 T cik_compute_get_rptr +ffffffff81c0e150 T cik_compute_get_wptr +ffffffff81c0e230 T cik_compute_set_wptr +ffffffff81c0e2b0 T cik_gpu_check_soft_reset +ffffffff81c0e420 T cik_asic_reset +ffffffff81c0e830 t cik_gpu_pci_config_reset +ffffffff81c0f050 T cik_gfx_is_lockup +ffffffff81c0f0c0 T cik_pcie_gart_tlb_flush +ffffffff81c0f110 T cik_ib_parse +ffffffff81c0f140 T cik_vm_init +ffffffff81c0f1a0 T cik_vm_fini +ffffffff81c0f1d0 T cik_vm_flush +ffffffff81c0ff20 T cik_enter_rlc_safe_mode +ffffffff81c10010 T cik_exit_rlc_safe_mode +ffffffff81c10050 T cik_update_cg +ffffffff81c10520 t cik_enable_mgcg +ffffffff81c10a40 t cik_enable_cgcg +ffffffff81c10db0 T cik_init_cp_pg_table +ffffffff81c11070 T cik_get_csb_size +ffffffff81c11100 T cik_get_csb_buffer +ffffffff81c112a0 T cik_irq_set +ffffffff81c12040 t cik_disable_interrupt_state +ffffffff81c12500 T cik_irq_process +ffffffff81c13d50 t cik_irq_ack +ffffffff81c146d0 T cik_resume +ffffffff81c14760 t cik_init_golden_registers +ffffffff81c14920 t cik_startup +ffffffff81c1a630 T cik_suspend +ffffffff81c1aa20 T cik_init +ffffffff81c1b200 t cik_init_microcode +ffffffff81c1c210 t cik_pcie_gart_fini +ffffffff81c1c310 T cik_fini +ffffffff81c1c6b0 T dce8_program_fmt +ffffffff81c1c7e0 T dce8_bandwidth_update +ffffffff81c1d400 T cik_get_gpu_clock_counter +ffffffff81c1d4d0 T cik_set_uvd_clocks +ffffffff81c1d550 t cik_set_uvd_clock +ffffffff81c1d6c0 T cik_set_vce_clocks +ffffffff81c1d900 t cik_wait_for_rlc_serdes +ffffffff81c1dad0 t radeon_bo_reserve +ffffffff81c1dc40 t radeon_bo_unreserve +ffffffff81c1dd20 t cik_update_gfx_pg +ffffffff81c1dec0 t cik_compute_stop +ffffffff81c1e030 t cik_cp_compute_fini +ffffffff81c1e1d0 t dce8_latency_watermark +ffffffff81c1f000 T cik_sdma_get_rptr +ffffffff81c1f070 T cik_sdma_get_wptr +ffffffff81c1f0c0 T cik_sdma_set_wptr +ffffffff81c1f110 T cik_sdma_ring_ib_execute +ffffffff81c1f4f0 T cik_sdma_fence_ring_emit +ffffffff81c1f6d0 t cik_sdma_hdp_flush_ring_emit +ffffffff81c1f910 T cik_sdma_semaphore_ring_emit +ffffffff81c1fa30 T cik_sdma_enable +ffffffff81c1fc10 T cik_sdma_resume +ffffffff81c200f0 T cik_sdma_fini +ffffffff81c20130 T cik_copy_dma +ffffffff81c20500 T cik_sdma_ring_test +ffffffff81c207a0 T cik_sdma_ib_test +ffffffff81c209f0 T cik_sdma_is_lockup +ffffffff81c20a70 T cik_sdma_vm_copy_pages +ffffffff81c20b80 T cik_sdma_vm_write_pages +ffffffff81c20cf0 T cik_sdma_vm_set_pages +ffffffff81c20e60 T cik_sdma_vm_pad_ib +ffffffff81c20eb0 T cik_dma_vm_flush +ffffffff81c22000 T cypress_enable_spread_spectrum +ffffffff81c22140 T cypress_start_dpm +ffffffff81c22190 T cypress_enable_sclk_control +ffffffff81c221f0 T cypress_enable_mclk_control +ffffffff81c22250 T cypress_notify_smc_display_change +ffffffff81c222a0 T cypress_program_response_times +ffffffff81c22370 T cypress_advertise_gen2_capability +ffffffff81c22440 T cypress_notify_link_speed_change_after_state_change +ffffffff81c22500 T cypress_notify_link_speed_change_before_state_change +ffffffff81c225c0 T cypress_get_strobe_mode_settings +ffffffff81c226c0 T cypress_get_mclk_frequency_ratio +ffffffff81c22770 T cypress_map_clkf_to_ibias +ffffffff81c22830 T cypress_convert_power_level_to_smc +ffffffff81c22bf0 t cypress_populate_mclk_value +ffffffff81c23000 T cypress_upload_sw_state +ffffffff81c23180 T cypress_upload_mc_reg_table +ffffffff81c23240 t cypress_convert_mc_reg_table_to_smc +ffffffff81c234e0 T cypress_calculate_burst_time +ffffffff81c23570 T cypress_program_memory_timing_parameters +ffffffff81c23720 T cypress_populate_smc_initial_state +ffffffff81c23ac0 T cypress_populate_smc_acpi_state +ffffffff81c23e50 T cypress_construct_voltage_tables +ffffffff81c23f00 t cypress_trim_voltage_table_to_fit_state_table +ffffffff81c240f0 T cypress_populate_smc_voltage_tables +ffffffff81c24240 T cypress_get_mvdd_configuration +ffffffff81c24300 T cypress_populate_mc_reg_table +ffffffff81c24560 T cypress_get_table_locations +ffffffff81c24640 T cypress_enable_display_gap +ffffffff81c246a0 T cypress_dpm_setup_asic +ffffffff81c24790 T cypress_dpm_enable +ffffffff81c25270 t cypress_force_mc_use_s1 +ffffffff81c254f0 t cypress_gfx_clock_gating_enable +ffffffff81c25800 t cypress_mg_clock_gating_enable +ffffffff81c25a80 T cypress_dpm_disable +ffffffff81c25cb0 T cypress_dpm_set_power_state +ffffffff81c25f60 T cypress_dpm_display_configuration_changed +ffffffff81c26040 T cypress_dpm_init +ffffffff81c262b0 T cypress_dpm_fini +ffffffff81c26340 T cypress_dpm_vblank_too_short +ffffffff81c263b0 t cypress_wait_for_mc_sequencer +ffffffff81c27000 T dce3_2_afmt_hdmi_write_speaker_allocation +ffffffff81c27070 T dce3_2_afmt_dp_write_speaker_allocation +ffffffff81c270e0 T dce3_2_afmt_write_sad_regs +ffffffff81c27200 T dce3_2_audio_set_dto +ffffffff81c27340 T dce3_2_hdmi_update_acr +ffffffff81c276a0 T dce3_2_set_audio_packet +ffffffff81c27830 T dce3_2_set_mute +ffffffff81c28000 T dce6_endpoint_rreg +ffffffff81c280e0 T dce6_endpoint_wreg +ffffffff81c281d0 T dce6_audio_get_pin +ffffffff81c28340 T dce6_afmt_select_pin +ffffffff81c283d0 T dce6_afmt_write_latency_fields +ffffffff81c28490 T dce6_afmt_hdmi_write_speaker_allocation +ffffffff81c28560 T dce6_afmt_dp_write_speaker_allocation +ffffffff81c28630 T dce6_afmt_write_sad_regs +ffffffff81c28770 T dce6_audio_enable +ffffffff81c287c0 T dce6_hdmi_audio_set_dto +ffffffff81c28830 T dce6_dp_audio_set_dto +ffffffff81c29000 T eg_cg_rreg +ffffffff81c29080 t r100_mm_rreg +ffffffff81c290d0 T eg_cg_wreg +ffffffff81c29140 T eg_pif_phy0_rreg +ffffffff81c291c0 T eg_pif_phy0_wreg +ffffffff81c29220 T eg_pif_phy1_rreg +ffffffff81c292a0 T eg_pif_phy1_wreg +ffffffff81c29300 T evergreen_get_allowed_info_register +ffffffff81c29390 T evergreen_tiling_fields +ffffffff81c29430 T sumo_set_uvd_clocks +ffffffff81c29510 t sumo_set_uvd_clock +ffffffff81c296d0 T evergreen_set_uvd_clocks +ffffffff81c29c70 T evergreen_fix_pci_max_read_req_size +ffffffff81c29e20 T dce4_program_fmt +ffffffff81c29f40 T dce4_wait_for_vblank +ffffffff81c2a1c0 T evergreen_page_flip +ffffffff81c2a350 T evergreen_page_flip_pending +ffffffff81c2a3c0 T evergreen_get_temp +ffffffff81c2a490 T sumo_get_temp +ffffffff81c2a4e0 T sumo_pm_init_profile +ffffffff81c2a620 T btc_pm_init_profile +ffffffff81c2a730 T evergreen_pm_misc +ffffffff81c2a8d0 T evergreen_pm_prepare +ffffffff81c2a9d0 T evergreen_pm_finish +ffffffff81c2aad0 T evergreen_hpd_sense +ffffffff81c2ab40 T evergreen_hpd_set_polarity +ffffffff81c2ac80 T evergreen_hpd_init +ffffffff81c2ad50 T evergreen_hpd_fini +ffffffff81c2adf0 T evergreen_get_number_of_dram_channels +ffffffff81c2ae40 T evergreen_bandwidth_update +ffffffff81c2b000 t evergreen_line_buffer_adjust +ffffffff81c2b200 t evergreen_program_watermarks +ffffffff81c2bcb0 T evergreen_mc_wait_for_idle +ffffffff81c2bd50 T evergreen_pcie_gart_tlb_flush +ffffffff81c2be30 T evergreen_mc_stop +ffffffff81c2c920 T evergreen_mc_resume +ffffffff81c2d030 T evergreen_mc_program +ffffffff81c2d440 T evergreen_ring_ib_execute +ffffffff81c2d8e0 T evergreen_mc_init +ffffffff81c2da20 T evergreen_print_gpu_status_regs +ffffffff81c2da50 T evergreen_is_display_hung +ffffffff81c2dc60 T evergreen_gpu_check_soft_reset +ffffffff81c2ddc0 T evergreen_gpu_pci_config_reset +ffffffff81c2df40 T evergreen_asic_reset +ffffffff81c2e260 T evergreen_gfx_is_lockup +ffffffff81c2e2d0 T sumo_rlc_fini +ffffffff81c2e480 t radeon_bo_reserve +ffffffff81c2e5f0 t radeon_bo_unreserve +ffffffff81c2e6d0 T sumo_rlc_init +ffffffff81c2eea0 T evergreen_rlc_resume +ffffffff81c2f210 T evergreen_get_vblank_counter +ffffffff81c2f280 T evergreen_disable_interrupt_state +ffffffff81c2f550 T evergreen_irq_set +ffffffff81c2fb10 T evergreen_irq_suspend +ffffffff81c2fb60 T evergreen_irq_process +ffffffff81c30630 t evergreen_irq_ack +ffffffff81c30d30 T evergreen_resume +ffffffff81c30e10 t evergreen_init_golden_registers +ffffffff81c31020 t evergreen_startup +ffffffff81c33680 T evergreen_suspend +ffffffff81c33820 T evergreen_init +ffffffff81c33d20 T evergreen_fini +ffffffff81c33f10 T evergreen_pcie_gen2_enable +ffffffff81c34140 T evergreen_program_aspm +ffffffff81c347e0 t evergreen_latency_watermark +ffffffff81c35000 T evergreen_cs_parse +ffffffff81c37870 T evergreen_dma_cs_parse +ffffffff81c38a80 T evergreen_ib_parse +ffffffff81c38f30 T evergreen_dma_ib_parse +ffffffff81c390f0 t evergreen_cs_track_check +ffffffff81c3a0d0 t evergreen_cs_handle_reg +ffffffff81c3bfe0 t evergreen_surface_value_conv_check +ffffffff81c3c2b0 t evergreen_surface_check +ffffffff81c3c740 t evergreen_cs_track_validate_htile +ffffffff81c3c9e0 t evergreen_vm_reg_valid +ffffffff81c3d000 T evergreen_dma_fence_ring_emit +ffffffff81c3d2c0 T evergreen_dma_ring_ib_execute +ffffffff81c3d600 T evergreen_copy_dma +ffffffff81c3d9b0 T evergreen_dma_is_lockup +ffffffff81c3e000 T dce4_audio_enable +ffffffff81c3e080 T evergreen_hdmi_update_acr +ffffffff81c3e2a0 T dce4_afmt_write_latency_fields +ffffffff81c3e310 T dce4_afmt_hdmi_write_speaker_allocation +ffffffff81c3e380 T dce4_afmt_dp_write_speaker_allocation +ffffffff81c3e3f0 T evergreen_hdmi_write_sad_regs +ffffffff81c3e510 T evergreen_set_avi_packet +ffffffff81c3e6b0 T dce4_hdmi_audio_set_dto +ffffffff81c3e790 T dce4_dp_audio_set_dto +ffffffff81c3e880 T dce4_set_vbi_packet +ffffffff81c3e8f0 T dce4_hdmi_set_color_depth +ffffffff81c3ea40 T dce4_set_audio_packet +ffffffff81c3ec50 T dce4_set_mute +ffffffff81c3ed60 T evergreen_hdmi_enable +ffffffff81c3f090 T evergreen_dp_enable +ffffffff81c40000 T kv_dpm_enable_bapm +ffffffff81c40070 T kv_dpm_enable +ffffffff81c415c0 t kv_enable_didt +ffffffff81c41860 T kv_dpm_late_enable +ffffffff81c41a50 T kv_dpm_powergate_uvd +ffffffff81c41bc0 T kv_dpm_disable +ffffffff81c41f30 T kv_dpm_force_performance_level +ffffffff81c420c0 t kv_force_dpm_lowest +ffffffff81c42190 T kv_dpm_pre_set_power_state +ffffffff81c42720 T kv_dpm_set_power_state +ffffffff81c42ed0 t kv_set_valid_clock_range +ffffffff81c43090 t kv_calculate_ds_divider +ffffffff81c43200 t kv_calculate_nbps_level_settings +ffffffff81c43390 t kv_update_vce_dpm +ffffffff81c43570 T kv_dpm_post_set_power_state +ffffffff81c43610 T kv_dpm_setup_asic +ffffffff81c43670 T kv_dpm_init +ffffffff81c43f10 T kv_dpm_debugfs_print_current_performance_level +ffffffff81c43f80 T kv_dpm_get_current_sclk +ffffffff81c43ff0 T kv_dpm_get_current_mclk +ffffffff81c44020 T kv_dpm_print_power_state +ffffffff81c440c0 T kv_dpm_fini +ffffffff81c44160 T kv_dpm_display_configuration_changed +ffffffff81c44190 T kv_dpm_get_sclk +ffffffff81c441e0 T kv_dpm_get_mclk +ffffffff81c45000 T kv_notify_message_to_smu +ffffffff81c450c0 T kv_dpm_get_enable_mask +ffffffff81c451a0 T kv_send_msg_to_smc_with_parameter +ffffffff81c45270 T kv_read_smc_sram_dword +ffffffff81c45300 T kv_smc_dpm_enable +ffffffff81c45430 T kv_smc_bapm_enable +ffffffff81c45560 T kv_copy_bytes_to_smc +ffffffff81c46000 T tn_smc_rreg +ffffffff81c46080 T tn_smc_wreg +ffffffff81c460f0 T ni_mc_load_microcode +ffffffff81c462e0 T ni_init_microcode +ffffffff81c46820 T cayman_get_allowed_info_register +ffffffff81c468b0 T tn_get_temp +ffffffff81c46940 T cayman_pcie_gart_tlb_flush +ffffffff81c46990 T cayman_cp_int_cntl_setup +ffffffff81c469e0 T cayman_fence_ring_emit +ffffffff81c46d90 T cayman_ring_ib_execute +ffffffff81c47210 T cayman_gfx_get_rptr +ffffffff81c472a0 T cayman_gfx_get_wptr +ffffffff81c47310 T cayman_gfx_set_wptr +ffffffff81c47390 T cayman_gpu_check_soft_reset +ffffffff81c47510 T cayman_asic_reset +ffffffff81c47810 T cayman_gfx_is_lockup +ffffffff81c47880 T cayman_resume +ffffffff81c47910 t ni_init_golden_registers +ffffffff81c479f0 t cayman_startup +ffffffff81c4a0f0 T cayman_suspend +ffffffff81c4a2e0 T cayman_init +ffffffff81c4a8d0 T cayman_fini +ffffffff81c4ab50 T cayman_vm_init +ffffffff81c4abb0 T cayman_vm_fini +ffffffff81c4abe0 T cayman_vm_decode_fault +ffffffff81c4ac70 T cayman_vm_flush +ffffffff81c4b0f0 T tn_set_vce_clocks +ffffffff81c4c000 T cayman_dma_get_rptr +ffffffff81c4c070 T cayman_dma_get_wptr +ffffffff81c4c0c0 T cayman_dma_set_wptr +ffffffff81c4c110 T cayman_dma_ring_ib_execute +ffffffff81c4c4a0 T cayman_dma_stop +ffffffff81c4c550 T cayman_dma_resume +ffffffff81c4c7a0 T cayman_dma_fini +ffffffff81c4c860 T cayman_dma_is_lockup +ffffffff81c4c8e0 T cayman_dma_vm_copy_pages +ffffffff81c4c9d0 T cayman_dma_vm_write_pages +ffffffff81c4cb30 T cayman_dma_vm_set_pages +ffffffff81c4cc90 T cayman_dma_vm_pad_ib +ffffffff81c4cce0 T cayman_dma_vm_flush +ffffffff81c4e000 T ni_get_pi +ffffffff81c4e030 T ni_get_ps +ffffffff81c4e060 T ni_dpm_vblank_too_short +ffffffff81c4e0d0 T ni_dpm_force_performance_level +ffffffff81c4e220 T ni_copy_and_switch_arb_sets +ffffffff81c4e500 T ni_set_uvd_clock_before_set_eng_clock +ffffffff81c4e580 T ni_set_uvd_clock_after_set_eng_clock +ffffffff81c4e600 T ni_dpm_setup_asic +ffffffff81c4e810 T ni_update_current_ps +ffffffff81c4e8d0 T ni_update_requested_ps +ffffffff81c4e990 T ni_dpm_enable +ffffffff81c51bd0 t ni_populate_smc_tdp_limits +ffffffff81c51d90 T ni_dpm_disable +ffffffff81c52150 T ni_dpm_pre_set_power_state +ffffffff81c52730 T ni_dpm_set_power_state +ffffffff81c53850 T ni_dpm_post_set_power_state +ffffffff81c53920 T ni_dpm_init +ffffffff81c542f0 T ni_dpm_fini +ffffffff81c543a0 T ni_dpm_print_power_state +ffffffff81c54470 T ni_dpm_debugfs_print_current_performance_level +ffffffff81c544b0 T ni_dpm_get_current_sclk +ffffffff81c54520 T ni_dpm_get_current_mclk +ffffffff81c54590 T ni_dpm_get_sclk +ffffffff81c545f0 T ni_dpm_get_mclk +ffffffff81c54650 t ni_do_program_memory_timing_parameters +ffffffff81c54780 t ni_calculate_sclk_params +ffffffff81c549a0 t ni_calculate_power_boost_limit +ffffffff81c54b50 t ni_populate_mclk_value +ffffffff81c55000 T r100_wait_for_vblank +ffffffff81c551a0 T r100_page_flip +ffffffff81c55450 T r100_page_flip_pending +ffffffff81c55500 T r100_pm_get_dynpm_state +ffffffff81c55720 T r100_pm_init_profile +ffffffff81c55800 T r100_pm_misc +ffffffff81c55c40 T r100_pm_prepare +ffffffff81c55d00 T r100_pm_finish +ffffffff81c55dc0 T r100_gui_idle +ffffffff81c55e00 T r100_hpd_sense +ffffffff81c55e60 T r100_hpd_set_polarity +ffffffff81c55f20 T r100_hpd_init +ffffffff81c55fc0 T r100_hpd_fini +ffffffff81c56020 T r100_pci_gart_tlb_flush +ffffffff81c56050 T r100_pci_gart_init +ffffffff81c56120 T r100_pci_gart_get_page_entry +ffffffff81c56150 T r100_pci_gart_set_page +ffffffff81c56190 T r100_pci_gart_enable +ffffffff81c56280 T r100_pci_gart_disable +ffffffff81c56300 T r100_pci_gart_fini +ffffffff81c56380 T r100_irq_set +ffffffff81c56460 T r100_irq_disable +ffffffff81c564d0 T r100_irq_process +ffffffff81c567b0 T r100_get_vblank_counter +ffffffff81c56800 T r100_fence_ring_emit +ffffffff81c56c70 T r100_semaphore_ring_emit +ffffffff81c56ca0 T r100_copy_blit +ffffffff81c57340 T r100_ring_start +ffffffff81c57430 T r100_gfx_get_rptr +ffffffff81c57490 T r100_gfx_get_wptr +ffffffff81c574d0 T r100_gfx_set_wptr +ffffffff81c57510 T r100_cp_init +ffffffff81c57a40 T r100_debugfs_cp_init +ffffffff81c57a70 T r100_cp_fini +ffffffff81c57b10 T r100_cp_disable +ffffffff81c57c50 T r100_gui_wait_for_idle +ffffffff81c57d40 T r100_reloc_pitch_offset +ffffffff81c57e70 T r100_packet3_load_vbpntr +ffffffff81c58110 T r100_cs_parse_packet0 +ffffffff81c58220 T r100_cs_packet_parse_vline +ffffffff81c58410 T r100_cs_track_check_pkt3_indx_buffer +ffffffff81c58490 T r100_cs_parse +ffffffff81c59950 T r100_cs_track_clear +ffffffff81c59ce0 T r100_cs_track_check +ffffffff81c5a6c0 T r100_mc_wait_for_idle +ffffffff81c5a760 T r100_gpu_is_lockup +ffffffff81c5a7c0 T r100_enable_bm +ffffffff81c5a810 T r100_bm_disable +ffffffff81c5a8c0 T r100_asic_reset +ffffffff81c5abf0 T r100_mc_stop +ffffffff81c5adb0 T r100_mc_resume +ffffffff81c5ae70 T r100_set_common_regs +ffffffff81c5b020 T r100_vram_init_sizes +ffffffff81c5b210 T r100_vga_set_state +ffffffff81c5b270 T r100_pll_errata_after_index +ffffffff81c5b2b0 T r100_pll_rreg +ffffffff81c5b3e0 T r100_pll_wreg +ffffffff81c5b4f0 T r100_debugfs_rbbm_init +ffffffff81c5b520 T r100_debugfs_mc_info_init +ffffffff81c5b550 T r100_set_surface_reg +ffffffff81c5b760 T r100_clear_surface_reg +ffffffff81c5b810 T r100_bandwidth_update +ffffffff81c5c2c0 T r100_ring_test +ffffffff81c5c580 T r100_ring_ib_execute +ffffffff81c5c7e0 T r100_ib_test +ffffffff81c5cb20 T r100_vga_render_disable +ffffffff81c5cb80 T r100_resume +ffffffff81c5cd80 t r100_startup +ffffffff81c5d2b0 T r100_suspend +ffffffff81c5d390 T r100_fini +ffffffff81c5d4a0 T r100_restore_sanity +ffffffff81c5d540 T r100_init +ffffffff81c5dab0 T r100_mm_rreg_slow +ffffffff81c5db30 T r100_mm_wreg_slow +ffffffff81c5db90 T r100_io_rreg +ffffffff81c5dc30 T r100_io_wreg +ffffffff81c5dca0 t r100_cs_track_texture_print +ffffffff81c5e000 T r200_copy_dma +ffffffff81c5e470 T r200_packet0_check +ffffffff81c5f490 T r200_set_safe_registers +ffffffff81c60000 T rv370_pcie_rreg +ffffffff81c60080 T rv370_pcie_wreg +ffffffff81c600f0 T rv370_pcie_gart_tlb_flush +ffffffff81c602f0 T rv370_pcie_gart_get_page_entry +ffffffff81c60350 T rv370_pcie_gart_set_page +ffffffff81c60390 T rv370_pcie_gart_init +ffffffff81c60460 T rv370_pcie_gart_enable +ffffffff81c607c0 T rv370_pcie_gart_disable +ffffffff81c60940 T rv370_pcie_gart_fini +ffffffff81c60970 T r300_fence_ring_emit +ffffffff81c60f00 T r300_ring_start +ffffffff81c61910 T r300_mc_wait_for_idle +ffffffff81c619b0 T r300_asic_reset +ffffffff81c61bd0 T r300_mc_init +ffffffff81c61c80 T rv370_set_pcie_lanes +ffffffff81c61e40 T rv370_get_pcie_lanes +ffffffff81c61ef0 T r300_cs_parse +ffffffff81c62260 t r300_packet0_check +ffffffff81c630c0 T r300_set_reg_safe +ffffffff81c63100 T r300_mc_program +ffffffff81c63280 T r300_clock_startup +ffffffff81c63310 T r300_resume +ffffffff81c634e0 t r300_startup +ffffffff81c63840 T r300_suspend +ffffffff81c638c0 T r300_fini +ffffffff81c639a0 T r300_init +ffffffff81c64000 T r420_pm_init_profile +ffffffff81c640f0 T r420_pipes_init +ffffffff81c642d0 T r420_mc_rreg +ffffffff81c64350 T r420_mc_wreg +ffffffff81c643c0 T r420_resume +ffffffff81c64590 t r420_startup +ffffffff81c64920 T r420_suspend +ffffffff81c64ac0 T r420_fini +ffffffff81c64ba0 T r420_init +ffffffff81c64e20 T r420_debugfs_pipes_info_init +ffffffff81c65000 T r520_mc_wait_for_idle +ffffffff81c650a0 T r520_resume +ffffffff81c65190 t r520_startup +ffffffff81c65580 T r520_init +ffffffff81c66000 T r600_rcu_rreg +ffffffff81c66080 T r600_rcu_wreg +ffffffff81c660f0 T r600_uvd_ctx_rreg +ffffffff81c66170 T r600_uvd_ctx_wreg +ffffffff81c661e0 T r600_get_allowed_info_register +ffffffff81c66260 T r600_get_xclk +ffffffff81c66290 T r600_set_uvd_clocks +ffffffff81c667f0 T dce3_program_fmt +ffffffff81c66910 T rv6xx_get_temp +ffffffff81c66960 T r600_pm_get_dynpm_state +ffffffff81c66d60 T rs780_pm_init_profile +ffffffff81c66e70 T r600_pm_init_profile +ffffffff81c67110 T r600_pm_misc +ffffffff81c671f0 T r600_gui_idle +ffffffff81c67230 T r600_hpd_sense +ffffffff81c67350 T r600_hpd_set_polarity +ffffffff81c675c0 T r600_hpd_init +ffffffff81c677d0 T r600_hpd_fini +ffffffff81c67980 T r600_pcie_gart_tlb_flush +ffffffff81c67ac0 T r600_pcie_gart_init +ffffffff81c67b60 T r600_mc_wait_for_idle +ffffffff81c67c00 T rs780_mc_rreg +ffffffff81c67ca0 T rs780_mc_wreg +ffffffff81c67d30 T r600_vram_scratch_init +ffffffff81c67e30 t radeon_bo_reserve +ffffffff81c67fa0 t radeon_bo_unreserve +ffffffff81c68080 T r600_vram_scratch_fini +ffffffff81c68100 T r600_set_bios_scratch_engine_hung +ffffffff81c68150 T r600_gpu_check_soft_reset +ffffffff81c684d0 T r600_asic_reset +ffffffff81c68860 t r600_gpu_pci_config_reset +ffffffff81c68a70 T r600_gfx_is_lockup +ffffffff81c68ae0 T r6xx_remap_render_backend +ffffffff81c68cd0 T r600_count_pipe_bits +ffffffff81c68d40 T r600_pciep_rreg +ffffffff81c68dc0 T r600_pciep_wreg +ffffffff81c68e30 T r600_cp_stop +ffffffff81c68eb0 T r600_init_microcode +ffffffff81c69380 T r600_gfx_get_rptr +ffffffff81c693e0 T r600_gfx_get_wptr +ffffffff81c69420 T r600_gfx_set_wptr +ffffffff81c69460 T r600_cp_start +ffffffff81c697e0 T r600_cp_resume +ffffffff81c69b40 T r600_ring_init +ffffffff81c69be0 T r600_cp_fini +ffffffff81c69c70 T r600_scratch_init +ffffffff81c69ce0 T r600_ring_test +ffffffff81c69f90 T r600_fence_ring_emit +ffffffff81c6a850 T r600_semaphore_ring_emit +ffffffff81c6aa40 T r600_copy_cpdma +ffffffff81c6b000 T r600_set_surface_reg +ffffffff81c6b030 T r600_clear_surface_reg +ffffffff81c6b060 T r600_vga_set_state +ffffffff81c6b0c0 T r600_resume +ffffffff81c6b150 t r600_startup +ffffffff81c6d150 T r600_suspend +ffffffff81c6d2c0 T r600_irq_suspend +ffffffff81c6d380 t r600_pcie_gart_disable +ffffffff81c6d580 T r600_init +ffffffff81c6dd50 T r600_ih_ring_init +ffffffff81c6ddc0 T r600_irq_fini +ffffffff81c6df00 T r600_fini +ffffffff81c6e090 T r600_ring_ib_execute +ffffffff81c6e510 T r600_ib_test +ffffffff81c6e7c0 T r600_ih_ring_alloc +ffffffff81c6e8e0 T r600_ih_ring_fini +ffffffff81c6e970 T r600_rlc_stop +ffffffff81c6eb00 T r600_disable_interrupts +ffffffff81c6ebb0 T r600_irq_init +ffffffff81c6f020 t r600_disable_interrupt_state +ffffffff81c6f310 T r600_irq_disable +ffffffff81c6f3d0 T r600_irq_set +ffffffff81c6fb50 t r600_irq_ack +ffffffff81c70040 T r600_irq_process +ffffffff81c70c20 T r600_mmio_hdp_flush +ffffffff81c70ca0 T r600_set_pcie_lanes +ffffffff81c70dd0 T r600_get_pcie_lanes +ffffffff81c70eb0 T r600_get_gpu_clock_counter +ffffffff81c71000 T r600_fmt_is_valid_color +ffffffff81c71040 T r600_fmt_is_valid_texture +ffffffff81c71090 T r600_fmt_get_blocksize +ffffffff81c710d0 T r600_fmt_get_nblocksx +ffffffff81c71130 T r600_fmt_get_nblocksy +ffffffff81c71190 T r600_cs_common_vline_parse +ffffffff81c71460 T r600_mip_minify +ffffffff81c714c0 T r600_cs_parse +ffffffff81c73420 T r600_dma_cs_next_reloc +ffffffff81c734a0 T r600_dma_cs_parse +ffffffff81c73bc0 t r600_cs_track_check +ffffffff81c74cb0 t r600_cs_check_reg +ffffffff81c76000 T r600_dma_get_rptr +ffffffff81c76060 T r600_dma_get_wptr +ffffffff81c760a0 T r600_dma_set_wptr +ffffffff81c760e0 T r600_dma_stop +ffffffff81c76170 T r600_dma_resume +ffffffff81c76380 T r600_dma_fini +ffffffff81c76400 T r600_dma_is_lockup +ffffffff81c76470 T r600_dma_ring_test +ffffffff81c766d0 T r600_dma_fence_ring_emit +ffffffff81c768c0 T r600_dma_semaphore_ring_emit +ffffffff81c769e0 T r600_dma_ib_test +ffffffff81c76bf0 T r600_dma_ring_ib_execute +ffffffff81c76f30 T r600_copy_dma +ffffffff81c78000 T r600_dpm_print_class_info +ffffffff81c782b0 T r600_dpm_print_cap_info +ffffffff81c78340 T r600_dpm_print_ps_status +ffffffff81c783d0 T r600_dpm_get_vblank_time +ffffffff81c78490 T r600_dpm_get_vrefresh +ffffffff81c78520 T r600_calculate_u_and_p +ffffffff81c785a0 T r600_calculate_at +ffffffff81c78650 T r600_gfx_clockgating_enable +ffffffff81c78760 T r600_dynamicpm_enable +ffffffff81c787c0 T r600_enable_thermal_protection +ffffffff81c78820 T r600_enable_acpi_pm +ffffffff81c78870 T r600_enable_dynamic_pcie_gen2 +ffffffff81c788d0 T r600_dynamicpm_enabled +ffffffff81c78910 T r600_enable_sclk_control +ffffffff81c78970 T r600_enable_mclk_control +ffffffff81c789d0 T r600_enable_spll_bypass +ffffffff81c78a30 T r600_wait_for_spll_change +ffffffff81c78ab0 T r600_set_bsp +ffffffff81c78af0 T r600_set_at +ffffffff81c78b50 T r600_set_tc +ffffffff81c78bb0 T r600_select_td +ffffffff81c78c70 T r600_set_vrc +ffffffff81c78cb0 T r600_set_tpu +ffffffff81c78d10 T r600_set_tpc +ffffffff81c78d70 T r600_set_sstu +ffffffff81c78dd0 T r600_set_sst +ffffffff81c78e20 T r600_set_git +ffffffff81c78e70 T r600_set_fctu +ffffffff81c78ed0 T r600_set_fct +ffffffff81c78f20 T r600_set_ctxcgtt3d_rphc +ffffffff81c78f80 T r600_set_ctxcgtt3d_rsdc +ffffffff81c78fe0 T r600_set_vddc3d_oorsu +ffffffff81c79040 T r600_set_vddc3d_oorphc +ffffffff81c790a0 T r600_set_vddc3d_oorsdc +ffffffff81c79100 T r600_set_mpll_lock_time +ffffffff81c79150 T r600_set_mpll_reset_time +ffffffff81c791a0 T r600_engine_clock_entry_enable +ffffffff81c792a0 T r600_engine_clock_entry_enable_pulse_skipping +ffffffff81c793a0 T r600_engine_clock_entry_enable_post_divider +ffffffff81c794a0 T r600_engine_clock_entry_set_post_divider +ffffffff81c79560 T r600_engine_clock_entry_set_reference_divider +ffffffff81c79620 T r600_engine_clock_entry_set_feedback_divider +ffffffff81c796e0 T r600_engine_clock_entry_set_step_time +ffffffff81c797a0 T r600_vid_rt_set_ssu +ffffffff81c79800 T r600_vid_rt_set_vru +ffffffff81c79860 T r600_vid_rt_set_vrt +ffffffff81c798c0 T r600_voltage_control_enable_pins +ffffffff81c79910 T r600_voltage_control_program_voltages +ffffffff81c799a0 T r600_voltage_control_deactivate_static_control +ffffffff81c79a30 T r600_power_level_enable +ffffffff81c79aa0 T r600_power_level_set_voltage_index +ffffffff81c79b10 T r600_power_level_set_mem_clock_index +ffffffff81c79b70 T r600_power_level_set_eng_clock_index +ffffffff81c79be0 T r600_power_level_set_watermark_id +ffffffff81c79c50 T r600_power_level_set_pcie_gen2 +ffffffff81c79cb0 T r600_power_level_get_current_index +ffffffff81c79cf0 T r600_power_level_get_target_index +ffffffff81c79d30 T r600_power_level_set_enter_index +ffffffff81c79d90 T r600_wait_for_power_level_unequal +ffffffff81c79e80 T r600_wait_for_power_level +ffffffff81c79f70 T r600_start_dpm +ffffffff81c7a250 T r600_stop_dpm +ffffffff81c7a2a0 T r600_dpm_pre_set_power_state +ffffffff81c7a2d0 T r600_dpm_post_set_power_state +ffffffff81c7a300 T r600_is_uvd_state +ffffffff81c7a340 T r600_is_internal_thermal_sensor +ffffffff81c7a380 T r600_dpm_late_enable +ffffffff81c7a490 T r600_get_platform_caps +ffffffff81c7a530 T r600_parse_extended_power_table +ffffffff81c7b4a0 T r600_free_extended_power_table +ffffffff81c7b5a0 T r600_get_pcie_gen_support +ffffffff81c7b5f0 T r600_get_pcie_lane_support +ffffffff81c7b650 T r600_encode_pci_lane_width +ffffffff81c7c000 T r600_audio_update_hdmi +ffffffff81c7c180 t r600_audio_status +ffffffff81c7c2a0 T r600_hdmi_buffer_status_changed +ffffffff81c7c340 T r600_hdmi_update_audio_settings +ffffffff81c7c710 T r600_audio_enable +ffffffff81c7c790 T r600_audio_get_pin +ffffffff81c7c7c0 T r600_hdmi_update_acr +ffffffff81c7cb60 T r600_set_avi_packet +ffffffff81c7cd60 T r600_hdmi_audio_workaround +ffffffff81c7ce30 T r600_hdmi_audio_set_dto +ffffffff81c7cef0 T r600_set_vbi_packet +ffffffff81c7cfb0 T r600_set_audio_packet +ffffffff81c7d280 T r600_set_mute +ffffffff81c7d390 T r600_hdmi_enable +ffffffff81c7e000 T radeon_acpi_is_pcie_performance_request_supported +ffffffff81c7e050 T radeon_acpi_pcie_notify_device_ready +ffffffff81c7e180 T radeon_acpi_pcie_performance_request +ffffffff81c7e3a0 T radeon_acpi_init +ffffffff81c7eaf0 t radeon_acpi_event +ffffffff81c7ee40 T radeon_acpi_fini +ffffffff81c7f000 T radeon_agp_head_init +ffffffff81c7f050 T radeon_agp_init +ffffffff81c7f0a0 T radeon_agp_resume +ffffffff81c7f130 T radeon_agp_fini +ffffffff81c7f180 T radeon_agp_suspend +ffffffff81c80000 T radeon_agp_disable +ffffffff81c80120 T radeon_asic_init +ffffffff81c809b0 t radeon_invalid_rreg +ffffffff81c809f0 t radeon_invalid_wreg +ffffffff81c80a30 t radeon_invalid_get_allowed_info_register +ffffffff81c81000 T radeon_atombios_i2c_init +ffffffff81c813b0 T radeon_atombios_lookup_gpio +ffffffff81c814b0 T radeon_get_atom_connector_info_from_object_table +ffffffff81c81e10 t radeon_lookup_i2c_gpio +ffffffff81c82110 t radeon_atom_apply_quirks +ffffffff81c82540 T radeon_get_atom_connector_info_from_supported_devices_table +ffffffff81c82a40 T radeon_atom_get_clock_info +ffffffff81c82dc0 T radeon_atombios_sideport_present +ffffffff81c82e70 T radeon_atombios_get_tmds_info +ffffffff81c82fb0 T radeon_atombios_get_ppll_ss_info +ffffffff81c830d0 T radeon_atombios_get_asic_ss_info +ffffffff81c83440 T radeon_atombios_get_lvds_info +ffffffff81c837b0 T radeon_atombios_get_primary_dac_info +ffffffff81c83860 T radeon_atom_get_tv_timings +ffffffff81c83ab0 T radeon_atombios_get_tv_info +ffffffff81c83b60 T radeon_atombios_get_tv_dac_info +ffffffff81c83c60 T radeon_atombios_get_default_voltages +ffffffff81c83d20 T radeon_atombios_get_power_modes +ffffffff81c84df0 T radeon_atom_get_clock_dividers +ffffffff81c850f0 T radeon_atom_get_memory_pll_dividers +ffffffff81c85230 T radeon_atom_set_clock_gating +ffffffff81c85280 T radeon_atom_get_engine_clock +ffffffff81c852d0 T radeon_atom_get_memory_clock +ffffffff81c85320 T radeon_atom_set_engine_clock +ffffffff81c85370 T radeon_atom_set_memory_clock +ffffffff81c853d0 T radeon_atom_set_engine_dram_timings +ffffffff81c85440 T radeon_atom_update_memory_dll +ffffffff81c85490 T radeon_atom_set_ac_timing +ffffffff81c854e0 T radeon_atom_set_voltage +ffffffff81c855b0 T radeon_atom_get_max_vddc +ffffffff81c85690 T radeon_atom_get_leakage_vddc_based_on_leakage_idx +ffffffff81c85760 T radeon_atom_get_leakage_id_from_vbios +ffffffff81c85820 T radeon_atom_get_leakage_vddc_based_on_leakage_params +ffffffff81c85a30 T radeon_atom_get_voltage_evv +ffffffff81c85ae0 T radeon_atom_get_voltage_gpio_settings +ffffffff81c85be0 T radeon_atom_is_voltage_gpio +ffffffff81c85d70 T radeon_atom_get_svi2_info +ffffffff81c85e60 T radeon_atom_get_max_voltage +ffffffff81c86000 T radeon_atom_get_min_voltage +ffffffff81c86140 T radeon_atom_get_voltage_step +ffffffff81c86240 T radeon_atom_round_to_true_voltage +ffffffff81c863b0 T radeon_atom_get_voltage_table +ffffffff81c86620 T radeon_atom_get_memory_info +ffffffff81c867d0 T radeon_atom_get_mclk_range_table +ffffffff81c86a20 T radeon_atom_init_mc_reg_table +ffffffff81c86ca0 T radeon_atom_initialize_bios_scratch_regs +ffffffff81c86d70 T radeon_save_bios_scratch_regs +ffffffff81c86e50 T radeon_restore_bios_scratch_regs +ffffffff81c86f30 T radeon_atom_output_lock +ffffffff81c86fc0 T radeon_atombios_connected_scratch_regs +ffffffff81c87740 T radeon_atombios_encoder_crtc_scratch_regs +ffffffff81c87880 T radeon_atombios_encoder_dpms_scratch_regs +ffffffff81c87aa0 t radeon_atombios_parse_misc_flags_1_3 +ffffffff81c87c90 t radeon_atombios_add_pplib_thermal_controller +ffffffff81c88090 t radeon_atombios_parse_pplib_clock_info +ffffffff81c883a0 t radeon_atombios_parse_pplib_non_clock_info +ffffffff81c89000 T radeon_audio_init +ffffffff81c89290 T radeon_audio_endpoint_rreg +ffffffff81c892d0 T radeon_audio_endpoint_wreg +ffffffff81c89310 T radeon_audio_get_pin +ffffffff81c89360 T radeon_audio_detect +ffffffff81c89690 T radeon_audio_fini +ffffffff81c897d0 T radeon_audio_mode_set +ffffffff81c89820 T radeon_audio_dpms +ffffffff81c89870 T radeon_audio_decode_dfs_div +ffffffff81c898d0 t radeon_audio_hdmi_mode_set +ffffffff81c8a000 t radeon_audio_write_speaker_allocation +ffffffff81c8a0b0 t radeon_audio_write_sad_regs +ffffffff81c8a180 t radeon_audio_set_avi_packet +ffffffff81c8a2c0 t radeon_audio_dp_mode_set +ffffffff81c8a440 t radeon_audio_rreg +ffffffff81c8a490 t radeon_audio_wreg +ffffffff81c8b000 T radeon_benchmark +ffffffff81c8b940 t radeon_benchmark_move +ffffffff81c8be00 t radeon_bo_reserve +ffffffff81c8bf70 t radeon_bo_unreserve +ffffffff81c8d000 T radeon_get_bios +ffffffff81c8e000 t igp_read_bios_from_vram +ffffffff81c8e110 t radeon_read_bios +ffffffff81c8f000 T radeon_legacy_get_engine_clock +ffffffff81c8f0d0 T radeon_legacy_get_memory_clock +ffffffff81c8f1a0 T radeon_get_clock_info +ffffffff81c8f730 T radeon_legacy_set_engine_clock +ffffffff81c8fa80 T radeon_legacy_set_clock_gating +ffffffff81c91000 T radeon_combios_check_hardcoded_edid +ffffffff81c91100 T radeon_bios_get_hardcoded_edid +ffffffff81c91180 T radeon_combios_i2c_init +ffffffff81c91940 t combios_setup_i2c_bus +ffffffff81c91c40 T radeon_combios_get_clock_info +ffffffff81c91e30 T radeon_combios_sideport_present +ffffffff81c91eb0 T radeon_combios_get_primary_dac_info +ffffffff81c91ff0 T radeon_combios_get_tv_info +ffffffff81c920f0 T radeon_combios_get_tv_dac_info +ffffffff81c923a0 T radeon_combios_get_lvds_info +ffffffff81c929f0 T radeon_legacy_get_tmds_info_from_table +ffffffff81c92ac0 T radeon_legacy_get_tmds_info_from_combios +ffffffff81c92cd0 T radeon_legacy_get_ext_tmds_info_from_table +ffffffff81c92f10 T radeon_legacy_get_ext_tmds_info_from_combios +ffffffff81c932a0 T radeon_get_legacy_connector_info_from_table +ffffffff81c95660 T radeon_get_legacy_connector_info_from_bios +ffffffff81c963f0 T radeon_combios_get_power_modes +ffffffff81c96ca0 T radeon_external_tmds_setup +ffffffff81c96d70 T radeon_combios_external_tmds_setup +ffffffff81c97330 T radeon_combios_asic_init +ffffffff81c97950 t combios_parse_mmio_table +ffffffff81c97b70 t combios_parse_pll_table +ffffffff81c97e40 T radeon_combios_initialize_bios_scratch_regs +ffffffff81c97ed0 T radeon_combios_output_lock +ffffffff81c97f30 T radeon_combios_connected_scratch_regs +ffffffff81c98290 T radeon_combios_encoder_crtc_scratch_regs +ffffffff81c98370 T radeon_combios_encoder_dpms_scratch_regs +ffffffff81c99000 T radeon_connector_hotplug +ffffffff81c99100 T radeon_get_monitor_bpc +ffffffff81c99530 T radeon_connector_edid +ffffffff81c995e0 T radeon_connector_encoder_get_dp_bridge_encoder_id +ffffffff81c99660 T radeon_connector_is_dp12_capable +ffffffff81c99700 T radeon_add_atom_connector +ffffffff81c9a550 T radeon_add_legacy_connector +ffffffff81c9aa90 t radeon_dp_detect +ffffffff81c9ae50 t radeon_dvi_force +ffffffff81c9aea0 t radeon_connector_set_property +ffffffff81c9b6e0 t radeon_connector_unregister +ffffffff81c9b740 t radeon_connector_destroy +ffffffff81c9b7b0 t radeon_best_single_encoder +ffffffff81c9b830 t radeon_connector_get_edid +ffffffff81c9b990 t radeon_dp_get_modes +ffffffff81c9bcc0 t radeon_dp_mode_valid +ffffffff81c9be90 t radeon_dvi_encoder +ffffffff81c9bf70 t radeon_fixup_lvds_native_mode +ffffffff81c9c0a0 t radeon_add_common_modes +ffffffff81c9c190 t radeon_fp_native_mode +ffffffff81c9c260 t radeon_lvds_set_property +ffffffff81c9c350 t radeon_vga_detect +ffffffff81c9c600 t radeon_connector_analog_encoder_conflict_solve +ffffffff81c9c820 t radeon_vga_get_modes +ffffffff81c9c910 t radeon_vga_mode_valid +ffffffff81c9c970 t radeon_dvi_detect +ffffffff81c9d010 t radeon_dvi_mode_valid +ffffffff81c9d1a0 t radeon_tv_detect +ffffffff81c9d3e0 t radeon_tv_get_modes +ffffffff81c9d4b0 t radeon_tv_mode_valid +ffffffff81c9d500 t radeon_lvds_detect +ffffffff81c9d6a0 t radeon_lvds_get_modes +ffffffff81c9d810 t radeon_lvds_mode_valid +ffffffff81c9e000 T radeon_cs_parser_init +ffffffff81c9e490 T radeon_cs_ioctl +ffffffff81c9efc0 t radeon_cs_parser_fini +ffffffff81c9f150 T radeon_cs_packet_parse +ffffffff81c9f300 T radeon_cs_packet_next_is_pkt3_nop +ffffffff81c9f360 T radeon_cs_dump_packet +ffffffff81c9f3e0 T radeon_cs_packet_next_reloc +ffffffff81c9f5b0 t cmp_size_smaller_first +ffffffff81ca0000 T radeon_crtc_cursor_move +ffffffff81ca0070 t radeon_lock_cursor +ffffffff81ca0230 t radeon_cursor_move_locked +ffffffff81ca0780 T radeon_crtc_cursor_set2 +ffffffff81ca0a00 t radeon_hide_cursor +ffffffff81ca0ac0 t radeon_bo_reserve +ffffffff81ca0c30 t radeon_bo_unreserve +ffffffff81ca0d10 t radeon_show_cursor +ffffffff81ca0f60 T radeon_cursor_reset +ffffffff81ca1000 T radeon_is_px +ffffffff81ca1040 T radeon_program_register_sequence +ffffffff81ca1170 T radeon_pci_config_reset +ffffffff81ca11a0 T radeon_surface_init +ffffffff81ca1360 T radeon_scratch_init +ffffffff81ca13e0 T radeon_scratch_get +ffffffff81ca1460 T radeon_scratch_free +ffffffff81ca14c0 T radeon_doorbell_get +ffffffff81ca1570 T radeon_doorbell_free +ffffffff81ca15c0 T radeon_wb_disable +ffffffff81ca15f0 T radeon_wb_fini +ffffffff81ca1690 t radeon_bo_reserve +ffffffff81ca1800 t radeon_bo_unreserve +ffffffff81ca18e0 T radeon_wb_init +ffffffff81ca1bb0 T radeon_vram_location +ffffffff81ca1ce0 T radeon_gtt_location +ffffffff81ca1e10 T radeon_device_is_virtual +ffffffff81ca1e40 T radeon_card_posted +ffffffff81ca2060 T radeon_update_bandwidth_info +ffffffff81ca20e0 T radeon_boot_test_post_card +ffffffff81ca21a0 T radeon_dummy_page_init +ffffffff81ca2260 T radeon_dummy_page_fini +ffffffff81ca22c0 T radeon_atombios_init +ffffffff81ca2450 t cail_reg_read +ffffffff81ca24b0 t cail_reg_write +ffffffff81ca2510 t cail_ioreg_read +ffffffff81ca2530 t cail_ioreg_write +ffffffff81ca2550 t cail_mc_read +ffffffff81ca2580 t cail_mc_write +ffffffff81ca25b0 t cail_pll_read +ffffffff81ca25e0 t cail_pll_write +ffffffff81ca2610 T radeon_atombios_fini +ffffffff81ca26b0 T radeon_combios_init +ffffffff81ca26f0 T radeon_combios_fini +ffffffff81ca2720 T radeon_device_init +ffffffff81ca31f0 T radeon_device_fini +ffffffff81ca32f0 T radeon_suspend_kms +ffffffff81ca3660 T radeon_resume_kms +ffffffff81ca38b0 T radeon_gpu_reset +ffffffff81ca4000 T radeon_crtc_load_lut +ffffffff81ca4dc0 T radeon_crtc_handle_vblank +ffffffff81ca4f30 T radeon_get_crtc_scanoutpos +ffffffff81ca5560 T radeon_crtc_handle_flip +ffffffff81ca5690 T radeon_compute_pll_avivo +ffffffff81ca5bd0 T radeon_compute_pll_legacy +ffffffff81ca6250 T radeon_framebuffer_init +ffffffff81ca62d0 T radeon_update_display_priority +ffffffff81ca6330 T radeon_modeset_init +ffffffff81ca6e50 T radeon_modeset_fini +ffffffff81ca6fb0 T radeon_crtc_scaling_mode_fixup +ffffffff81ca7310 T radeon_get_crtc_scanout_position +ffffffff81ca7380 t radeon_user_framebuffer_create +ffffffff81ca7520 t radeon_crtc_gamma_set +ffffffff81ca7560 t radeon_crtc_destroy +ffffffff81ca75a0 t radeon_crtc_set_config +ffffffff81ca7660 t radeon_crtc_page_flip_target +ffffffff81ca7af0 t radeon_flip_work_func +ffffffff81ca7d10 t radeon_unpin_work_func +ffffffff81ca7d90 t radeon_bo_reserve +ffffffff81ca7f00 t radeon_bo_unreserve +ffffffff81ca8000 T radeon_dp_aux_transfer_native +ffffffff81ca9000 T radeondrm_probe +ffffffff81ca9060 T radeondrm_attach_kms +ffffffff81ca97a0 T radeondrm_detach_kms +ffffffff81ca9830 T radeondrm_activate_kms +ffffffff81ca98f0 T radeondrm_wsioctl +ffffffff81ca99b0 T radeondrm_wsmmap +ffffffff81ca99e0 T radeondrm_alloc_screen +ffffffff81ca9a10 T radeondrm_free_screen +ffffffff81ca9a20 T radeondrm_show_screen +ffffffff81ca9b00 T radeondrm_enter_ddb +ffffffff81ca9b60 T radeondrm_doswitch +ffffffff81ca9bf0 T radeondrm_setpal +ffffffff81ca9df0 T radeondrm_attachhook +ffffffff81caa110 T radeondrm_forcedetach +ffffffff81cab000 T radeon_setup_encoder_clones +ffffffff81cab0b0 T radeon_get_encoder_enum +ffffffff81cab230 T radeon_link_encoder_connector +ffffffff81cab370 T radeon_encoder_set_active_device +ffffffff81cab430 T radeon_get_connector_for_encoder +ffffffff81cab4b0 T radeon_get_connector_for_encoder_init +ffffffff81cab530 T radeon_get_external_encoder +ffffffff81cab5c0 T radeon_encoder_get_dp_bridge_encoder_id +ffffffff81cab660 T radeon_panel_mode_fixup +ffffffff81cab830 T radeon_dig_monitor_is_duallink +ffffffff81cab950 T radeon_encoder_is_digital +ffffffff81cac000 T radeon_align_pitch +ffffffff81cac090 T radeon_fbdev_init +ffffffff81cac1e0 T radeondrm_burner_cb +ffffffff81cac210 T radeon_fbdev_fini +ffffffff81cac280 T radeon_fbdev_set_suspend +ffffffff81cac2d0 T radeon_fbdev_robj_is_fb +ffffffff81cac320 T radeondrm_burner +ffffffff81cac3a0 t radeonfb_create +ffffffff81cac7b0 t radeon_bo_reserve +ffffffff81cac920 t radeon_bo_unreserve +ffffffff81cad000 T radeon_fence_emit +ffffffff81cad120 T radeon_fence_process +ffffffff81cad1e0 t radeon_fence_activity +ffffffff81cad380 T radeon_fence_signaled +ffffffff81cad4b0 T radeon_fence_wait_timeout +ffffffff81cad600 t radeon_fence_wait_seq_timeout +ffffffff81cada70 T radeon_fence_wait +ffffffff81cadba0 T radeon_fence_wait_any +ffffffff81cadcf0 T radeon_fence_wait_next +ffffffff81caddb0 T radeon_fence_wait_empty +ffffffff81cadec0 T radeon_fence_ref +ffffffff81cadf00 T radeon_fence_unref +ffffffff81cadf40 T radeon_fence_count_emitted +ffffffff81cae040 T radeon_fence_need_sync +ffffffff81cae0a0 T radeon_fence_note_sync +ffffffff81cae270 T radeon_fence_driver_start_ring +ffffffff81cae450 T radeon_fence_driver_init +ffffffff81cae590 T radeon_debugfs_fence_init +ffffffff81cae5c0 T radeon_fence_driver_fini +ffffffff81cae7f0 T radeon_fence_driver_force_completion +ffffffff81cae8f0 t radeon_fence_get_driver_name +ffffffff81cae920 t radeon_fence_get_timeline_name +ffffffff81cae9c0 t radeon_fence_enable_signaling +ffffffff81caebd0 t radeon_fence_is_signaled +ffffffff81caed20 t radeon_fence_default_wait +ffffffff81caee80 t radeon_fence_any_seq_signaled +ffffffff81caf080 t radeon_fence_check_lockup +ffffffff81caf2c0 t __delayed_work_tick +ffffffff81caf2e0 t radeon_fence_check_signaled +ffffffff81caf370 t radeon_fence_wait_cb +ffffffff81cb0000 T radeon_gart_table_ram_alloc +ffffffff81cb00c0 T radeon_gart_table_ram_free +ffffffff81cb0130 T radeon_gart_table_vram_alloc +ffffffff81cb01b0 T radeon_gart_table_vram_pin +ffffffff81cb02f0 t radeon_bo_reserve +ffffffff81cb0460 t radeon_bo_unreserve +ffffffff81cb0540 T radeon_gart_table_vram_unpin +ffffffff81cb05c0 T radeon_gart_table_vram_free +ffffffff81cb0600 T radeon_gart_unbind +ffffffff81cb0720 T radeon_gart_bind +ffffffff81cb0870 T radeon_gart_init +ffffffff81cb09a0 T radeon_gart_fini +ffffffff81cb1000 T radeon_gem_fault +ffffffff81cb1180 T radeon_gem_vm_reference +ffffffff81cb11b0 T radeon_gem_vm_detach +ffffffff81cb11c0 T radeon_gem_object_create +ffffffff81cb1380 T radeon_gem_init +ffffffff81cb13c0 T radeon_gem_fini +ffffffff81cb13d0 t radeon_gem_object_free +ffffffff81cb1420 t radeon_gem_object_open +ffffffff81cb14c0 t radeon_gem_object_close +ffffffff81cb15b0 t radeon_gem_object_mmap +ffffffff81cb1650 T radeon_gem_info_ioctl +ffffffff81cb16c0 T radeon_gem_pread_ioctl +ffffffff81cb1710 T radeon_gem_pwrite_ioctl +ffffffff81cb1760 T radeon_gem_create_ioctl +ffffffff81cb1880 T radeon_gem_userptr_ioctl +ffffffff81cb18b0 T radeon_gem_set_domain_ioctl +ffffffff81cb1a20 T radeon_mode_dumb_mmap +ffffffff81cb1ad0 T radeon_gem_mmap_ioctl +ffffffff81cb1b90 T radeon_gem_busy_ioctl +ffffffff81cb1c40 T radeon_gem_wait_idle_ioctl +ffffffff81cb1d50 T radeon_gem_set_tiling_ioctl +ffffffff81cb1e00 T radeon_gem_get_tiling_ioctl +ffffffff81cb1ed0 t radeon_bo_reserve +ffffffff81cb20c0 t radeon_bo_unreserve +ffffffff81cb21a0 T radeon_gem_va_ioctl +ffffffff81cb2560 T radeon_gem_op_ioctl +ffffffff81cb2660 T radeon_mode_dumb_create +ffffffff81cb2760 T radeon_gem_debugfs_init +ffffffff81cb3000 T radeon_ddc_probe +ffffffff81cb30c0 T radeon_router_select_ddc_port +ffffffff81cb3320 T radeon_bb_set_bits +ffffffff81cb3490 T radeon_bb_set_dir +ffffffff81cb34c0 T radeon_bb_read_bits +ffffffff81cb35a0 T radeon_acquire_bus +ffffffff81cb39f0 T radeon_release_bus +ffffffff81cb3b60 T radeon_send_start +ffffffff81cb3b80 T radeon_send_stop +ffffffff81cb3ba0 T radeon_initiate_xfer +ffffffff81cb3bc0 T radeon_read_byte +ffffffff81cb3be0 T radeon_write_byte +ffffffff81cb3c00 T radeon_i2c_create +ffffffff81cb3e10 T radeon_i2c_destroy +ffffffff81cb3e90 T radeon_i2c_init +ffffffff81cb3ee0 T radeon_i2c_fini +ffffffff81cb3f90 T radeon_i2c_add +ffffffff81cb4140 T radeon_i2c_lookup +ffffffff81cb4300 T radeon_i2c_get_byte +ffffffff81cb43d0 T radeon_i2c_put_byte +ffffffff81cb4460 T radeon_router_select_cd_port +ffffffff81cb46c0 t radeon_hw_i2c_xfer +ffffffff81cb5280 t radeon_hw_i2c_func +ffffffff81cb52b0 t r100_hw_i2c_xfer +ffffffff81cb5990 t radeon_get_i2c_prescale +ffffffff81cb6000 T radeon_ib_get +ffffffff81cb6100 T radeon_ib_free +ffffffff81cb6150 T radeon_ib_schedule +ffffffff81cb63e0 T radeon_ib_pool_init +ffffffff81cb6480 T radeon_ib_pool_fini +ffffffff81cb64f0 T radeon_ib_ring_tests +ffffffff81cb7000 T radeon_driver_irq_handler_kms +ffffffff81cb7050 T radeon_msi_ok +ffffffff81cb7150 T radeon_irq_kms_init +ffffffff81cb73e0 t radeon_hotplug_work_func +ffffffff81cb7490 t radeon_dp_work_func +ffffffff81cb7500 T radeon_irq_kms_fini +ffffffff81cb76a0 T radeon_irq_kms_sw_irq_get +ffffffff81cb7740 T radeon_irq_kms_sw_irq_get_delayed +ffffffff81cb7780 T radeon_irq_kms_sw_irq_put +ffffffff81cb7810 T radeon_irq_kms_pflip_irq_get +ffffffff81cb78c0 T radeon_irq_kms_pflip_irq_put +ffffffff81cb7960 T radeon_irq_kms_enable_afmt +ffffffff81cb79f0 T radeon_irq_kms_disable_afmt +ffffffff81cb7a80 T radeon_irq_kms_enable_hpd +ffffffff81cb7b70 T radeon_irq_kms_disable_hpd +ffffffff81cb7c50 T radeon_irq_kms_set_irq_n_enabled +ffffffff81cb7dc0 t __delayed_work_tick +ffffffff81cb8000 T radeon_info_ioctl +ffffffff81cb8bf0 T radeon_driver_lastclose_kms +ffffffff81cb8c00 T radeon_driver_open_kms +ffffffff81cb8d30 t radeon_bo_reserve +ffffffff81cb8ea0 T radeon_driver_postclose_kms +ffffffff81cb90c0 T radeon_get_vblank_counter_kms +ffffffff81cb9260 T radeon_enable_vblank_kms +ffffffff81cb9310 T radeon_disable_vblank_kms +ffffffff81cba000 T radeon_crtc_set_base +ffffffff81cba020 T radeon_crtc_do_set_base +ffffffff81cba5c0 T radeon_crtc_set_base_atomic +ffffffff81cba5e0 t radeon_bo_reserve +ffffffff81cba750 t radeon_bo_unreserve +ffffffff81cba830 T radeon_legacy_init_crtc +ffffffff81cba880 t radeon_crtc_dpms +ffffffff81cbaa80 t radeon_crtc_prepare +ffffffff81cbab00 t radeon_crtc_commit +ffffffff81cbab70 t radeon_crtc_mode_fixup +ffffffff81cbab90 t radeon_crtc_mode_set +ffffffff81cbbfe0 t radeon_crtc_disable +ffffffff81cbd000 T radeon_legacy_get_backlight_level +ffffffff81cbd040 T radeon_legacy_set_backlight_level +ffffffff81cbd080 t radeon_legacy_lvds_update +ffffffff81cbd3e0 T radeon_legacy_backlight_init +ffffffff81cbd5b0 t radeon_legacy_backlight_get_brightness +ffffffff81cbd610 T radeon_add_legacy_encoder +ffffffff81cbd990 t radeon_legacy_backlight_update_status +ffffffff81cbda20 t radeon_lvds_enc_destroy +ffffffff81cbdab0 t radeon_legacy_lvds_dpms +ffffffff81cbdb00 t radeon_legacy_mode_fixup +ffffffff81cbdb70 t radeon_legacy_lvds_prepare +ffffffff81cbdc00 t radeon_legacy_lvds_commit +ffffffff81cbdc80 t radeon_legacy_lvds_mode_set +ffffffff81cbde90 t radeon_legacy_encoder_disable +ffffffff81cbdee0 t radeon_legacy_tmds_int_dpms +ffffffff81cbdfa0 t radeon_legacy_tmds_int_prepare +ffffffff81cbe070 t radeon_legacy_tmds_int_commit +ffffffff81cbe140 t radeon_legacy_tmds_int_mode_set +ffffffff81cbe3b0 t radeon_legacy_primary_dac_dpms +ffffffff81cbe4f0 t radeon_legacy_primary_dac_prepare +ffffffff81cbe550 t radeon_legacy_primary_dac_commit +ffffffff81cbe5a0 t radeon_legacy_primary_dac_mode_set +ffffffff81cbe750 t radeon_legacy_primary_dac_detect +ffffffff81cbe940 t radeon_legacy_tv_dac_dpms +ffffffff81cbeb40 t radeon_legacy_tv_dac_prepare +ffffffff81cbeba0 t radeon_legacy_tv_dac_commit +ffffffff81cbebf0 t radeon_legacy_tv_dac_mode_set +ffffffff81cbef90 t radeon_legacy_tv_dac_detect +ffffffff81cbfbc0 t radeon_ext_tmds_enc_destroy +ffffffff81cbfc10 t radeon_legacy_tmds_ext_dpms +ffffffff81cbfce0 t radeon_legacy_tmds_ext_prepare +ffffffff81cbfdb0 t radeon_legacy_tmds_ext_commit +ffffffff81cbfe80 t radeon_legacy_tmds_ext_mode_set +ffffffff81cc1000 T radeon_legacy_tv_mode_set +ffffffff81cc20b0 T radeon_legacy_tv_adjust_crtc_reg +ffffffff81cc21c0 T radeon_legacy_tv_adjust_pll1 +ffffffff81cc22b0 T radeon_legacy_tv_adjust_pll2 +ffffffff81cc3000 T radeon_ttm_bo_is_radeon_bo +ffffffff81cc3040 t radeon_ttm_bo_destroy +ffffffff81cc3170 T radeon_ttm_placement_from_domain +ffffffff81cc32e0 T radeon_bo_create +ffffffff81cc34a0 T radeon_bo_kmap +ffffffff81cc3580 T radeon_bo_check_tiling +ffffffff81cc3660 T radeon_bo_kunmap +ffffffff81cc36f0 T radeon_bo_ref +ffffffff81cc3730 T radeon_bo_unref +ffffffff81cc3780 T radeon_bo_pin_restricted +ffffffff81cc3ab0 T radeon_bo_pin +ffffffff81cc3ad0 T radeon_bo_unpin +ffffffff81cc3b40 T radeon_bo_evict_vram +ffffffff81cc3ba0 T radeon_bo_force_delete +ffffffff81cc3d00 T radeon_bo_init +ffffffff81cc3de0 T radeon_bo_fini +ffffffff81cc3e20 T radeon_bo_list_validate +ffffffff81cc4110 T radeon_bo_get_surface_reg +ffffffff81cc43b0 T radeon_bo_set_tiling_flags +ffffffff81cc46c0 T radeon_bo_get_tiling_flags +ffffffff81cc4710 T radeon_bo_move_notify +ffffffff81cc47d0 T radeon_bo_fault_reserve_notify +ffffffff81cc4ad0 T radeon_bo_fence +ffffffff81cc5000 T radeon_pm_get_type_index +ffffffff81cc5080 T radeon_pm_acpi_event_handler +ffffffff81cc5160 t radeon_pm_update_profile +ffffffff81cc5280 t radeon_pm_set_clocks +ffffffff81cc5c40 T radeon_dpm_enable_uvd +ffffffff81cc5d00 T radeon_pm_compute_clocks +ffffffff81cc6740 T radeon_dpm_enable_vce +ffffffff81cc67b0 T radeon_pm_suspend +ffffffff81cc68b0 T radeon_pm_resume +ffffffff81cc6ba0 T radeon_pm_init +ffffffff81cc72a0 T radeon_pm_late_init +ffffffff81cc7360 T radeon_pm_fini +ffffffff81cc7470 t radeon_dpm_thermal_work_handler +ffffffff81cc7550 t radeon_dynpm_idle_work_handler +ffffffff81cc7840 t __delayed_work_tick +ffffffff81cc8000 T radeon_gem_prime_get_sg_table +ffffffff81cc8030 T radeon_gem_prime_pin +ffffffff81cc80c0 t radeon_bo_reserve +ffffffff81cc8230 t radeon_bo_unreserve +ffffffff81cc8310 T radeon_gem_prime_unpin +ffffffff81cc8380 T radeon_gem_prime_export +ffffffff81cc9000 T radeon_ring_supports_scratch_reg +ffffffff81cc9030 T radeon_ring_free_size +ffffffff81cc90e0 T radeon_ring_lockup_update +ffffffff81cc9140 T radeon_ring_alloc +ffffffff81cc92c0 T radeon_ring_lock +ffffffff81cc9340 T radeon_ring_commit +ffffffff81cc9440 T radeon_ring_unlock_commit +ffffffff81cc9470 T radeon_ring_undo +ffffffff81cc94a0 T radeon_ring_unlock_undo +ffffffff81cc94c0 T radeon_ring_test_lockup +ffffffff81cc95e0 T radeon_ring_backup +ffffffff81cc97a0 T radeon_ring_restore +ffffffff81cc9960 T radeon_ring_init +ffffffff81cc9b50 t radeon_bo_reserve +ffffffff81cc9cc0 t radeon_bo_unreserve +ffffffff81cc9da0 T radeon_ring_fini +ffffffff81cca000 T radeon_sa_bo_manager_init +ffffffff81cca190 T radeon_sa_bo_manager_fini +ffffffff81cca380 T radeon_sa_bo_manager_start +ffffffff81cca4b0 t radeon_bo_reserve +ffffffff81cca620 t radeon_bo_unreserve +ffffffff81cca700 T radeon_sa_bo_manager_suspend +ffffffff81cca7a0 T radeon_sa_bo_new +ffffffff81ccb050 T radeon_sa_bo_free +ffffffff81ccc000 T radeon_semaphore_create +ffffffff81ccc0f0 T radeon_semaphore_emit_signal +ffffffff81ccc180 T radeon_semaphore_emit_wait +ffffffff81ccc210 T radeon_semaphore_free +ffffffff81ccd000 T radeon_sync_create +ffffffff81ccd090 T radeon_sync_fence +ffffffff81ccd140 T radeon_sync_resv +ffffffff81ccd270 T radeon_sync_rings +ffffffff81ccd430 T radeon_sync_free +ffffffff81cce000 T radeon_test_moves +ffffffff81cce070 t radeon_do_test_moves +ffffffff81cce660 T radeon_test_ring_sync +ffffffff81cce930 t radeon_test_create_and_emit_fence +ffffffff81cceaa0 T radeon_test_syncing +ffffffff81cced60 t radeon_test_ring_sync2 +ffffffff81ccf0d0 t radeon_bo_reserve +ffffffff81ccf240 t radeon_bo_unreserve +ffffffff81cd0000 T radeon_get_rdev +ffffffff81cd0030 T radeon_ttm_tt_set_userptr +ffffffff81cd0080 T radeon_ttm_tt_is_bound +ffffffff81cd00d0 T radeon_ttm_tt_has_userptr +ffffffff81cd0110 T radeon_ttm_tt_is_readonly +ffffffff81cd0150 T radeon_ttm_init +ffffffff81cd0370 T radeon_ttm_set_active_vram_size +ffffffff81cd03b0 t radeon_bo_reserve +ffffffff81cd0520 t radeon_bo_unreserve +ffffffff81cd0600 T radeon_ttm_fini +ffffffff81cd06d0 t radeon_ttm_tt_create +ffffffff81cd07c0 t radeon_ttm_tt_populate +ffffffff81cd0870 t radeon_ttm_tt_unpopulate +ffffffff81cd0970 t radeon_ttm_tt_destroy +ffffffff81cd09c0 t radeon_evict_flags +ffffffff81cd0b10 t radeon_bo_move +ffffffff81cd0f90 t radeon_ttm_io_mem_reserve +ffffffff81cd2000 T radeon_ucode_print_mc_hdr +ffffffff81cd20b0 t radeon_ucode_print_common_hdr +ffffffff81cd21e0 T radeon_ucode_print_smc_hdr +ffffffff81cd2270 T radeon_ucode_print_gfx_hdr +ffffffff81cd2340 T radeon_ucode_print_rlc_hdr +ffffffff81cd2440 T radeon_ucode_print_sdma_hdr +ffffffff81cd2520 T radeon_ucode_validate +ffffffff81cd3000 T radeon_uvd_init +ffffffff81cd34e0 t radeon_uvd_idle_work_handler +ffffffff81cd3650 t radeon_bo_reserve +ffffffff81cd3840 t radeon_bo_unreserve +ffffffff81cd3920 T radeon_uvd_fini +ffffffff81cd39f0 T radeon_uvd_suspend +ffffffff81cd3bb0 T radeon_uvd_note_usage +ffffffff81cd3df0 T radeon_uvd_get_destroy_msg +ffffffff81cd3f00 T radeon_uvd_resume +ffffffff81cd3f90 T radeon_uvd_force_into_uvd_segment +ffffffff81cd4030 T radeon_uvd_free_handles +ffffffff81cd41f0 T radeon_uvd_cs_parse +ffffffff81cd4910 T radeon_uvd_get_create_msg +ffffffff81cd4a90 t radeon_uvd_send_msg +ffffffff81cd4c30 T radeon_uvd_calc_upll_dividers +ffffffff81cd4dd0 T radeon_uvd_send_upll_ctlreq +ffffffff81cd5110 t __delayed_work_tick +ffffffff81cd6000 T radeon_vce_init +ffffffff81cd6600 t radeon_vce_idle_work_handler +ffffffff81cd66d0 t radeon_bo_reserve +ffffffff81cd6840 t radeon_bo_unreserve +ffffffff81cd6920 T radeon_vce_fini +ffffffff81cd69a0 T radeon_vce_suspend +ffffffff81cd6a80 T radeon_vce_resume +ffffffff81cd6bd0 T radeon_vce_note_usage +ffffffff81cd6cf0 T radeon_vce_free_handles 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T rs780_dpm_fini +ffffffff81ce4ba0 T rs780_dpm_get_sclk +ffffffff81ce4be0 T rs780_dpm_get_mclk +ffffffff81ce4c10 T rs780_dpm_debugfs_print_current_performance_level +ffffffff81ce4c40 T rs780_dpm_get_current_sclk +ffffffff81ce4cd0 T rs780_dpm_get_current_mclk +ffffffff81ce4d00 T rs780_dpm_force_performance_level +ffffffff81ce4ef0 t rs780_force_fbdiv +ffffffff81ce6000 T rv515_ring_start +ffffffff81ce6b30 T rv515_mc_wait_for_idle +ffffffff81ce6bd0 T rv515_vga_render_disable +ffffffff81ce6c20 T rv515_mc_rreg +ffffffff81ce6cb0 T rv515_mc_wreg +ffffffff81ce6d30 T rv515_debugfs +ffffffff81ce6d40 T rv515_mc_stop +ffffffff81ce72d0 T rv515_mc_resume +ffffffff81ce78e0 T rv515_clock_startup +ffffffff81ce79b0 T rv515_resume +ffffffff81ce7bf0 t rv515_startup +ffffffff81ce80c0 T rv515_suspend +ffffffff81ce8130 T rv515_set_safe_registers +ffffffff81ce8170 T rv515_fini +ffffffff81ce8220 T rv515_init +ffffffff81ce8500 T atom_rv515_force_tv_scaler +ffffffff81cebba0 T rv515_bandwidth_avivo_update +ffffffff81cebd40 t rv515_crtc_bandwidth_compute +ffffffff81cec080 t rv515_compute_mode_priority +ffffffff81cec530 T rv515_bandwidth_update +ffffffff81ced000 T rv6xx_dpm_enable +ffffffff81ced7f0 t rv6xx_calculate_stepping_parameters +ffffffff81ced9c0 t rv6xx_program_stepping_parameters_except_lowest_entry +ffffffff81cedfb0 t rv6xx_program_stepping_parameters_lowest_entry +ffffffff81cee090 T rv6xx_dpm_disable +ffffffff81cee410 T rv6xx_dpm_set_power_state +ffffffff81ceee10 T rv6xx_setup_asic +ffffffff81ceef50 T rv6xx_dpm_display_configuration_changed +ffffffff81ceefd0 T rv6xx_dpm_init +ffffffff81cef520 T rv6xx_dpm_print_power_state +ffffffff81cef5e0 T rv6xx_dpm_debugfs_print_current_performance_level +ffffffff81cef610 T rv6xx_dpm_get_current_sclk +ffffffff81cef680 T rv6xx_dpm_get_current_mclk +ffffffff81cef6f0 T rv6xx_dpm_fini +ffffffff81cef780 T rv6xx_dpm_get_sclk +ffffffff81cef7c0 T rv6xx_dpm_get_mclk +ffffffff81cef800 T rv6xx_dpm_force_performance_level +ffffffff81cef990 t rv6xx_generate_steps +ffffffff81cefca0 t rv6xx_output_stepping +ffffffff81cefdc0 t rv6xx_program_mclk_stepping_entry +ffffffff81cf0030 t rv6xx_program_engine_spread_spectrum +ffffffff81cf0310 t rv6xx_step_sw_voltage +ffffffff81cf1000 T rv730_populate_sclk_value +ffffffff81cf1240 T rv730_populate_mclk_value +ffffffff81cf1460 T rv730_read_clock_registers +ffffffff81cf1580 T rv730_populate_smc_acpi_state +ffffffff81cf1730 T rv730_populate_smc_initial_state +ffffffff81cf18f0 T rv730_program_memory_timing_parameters +ffffffff81cf1ad0 T rv730_start_dpm +ffffffff81cf1b60 T rv730_stop_dpm +ffffffff81cf1c20 T rv730_program_dcodt +ffffffff81cf1cf0 T rv730_get_odt_values +ffffffff81cf2000 T rv740_get_decoded_reference_divider +ffffffff81cf20a0 T rv740_get_dll_speed +ffffffff81cf21d0 T rv740_populate_sclk_value +ffffffff81cf23e0 T rv740_populate_mclk_value +ffffffff81cf2840 T rv740_read_clock_registers +ffffffff81cf2970 T rv740_populate_smc_acpi_state +ffffffff81cf2ba0 T rv740_enable_mclk_spread_spectrum +ffffffff81cf2c00 T rv740_get_mclk_frequency_ratio +ffffffff81cf3000 T rv770_set_uvd_clocks +ffffffff81cf3570 T rv770_get_xclk +ffffffff81cf35d0 T rv770_page_flip +ffffffff81cf38e0 T rv770_page_flip_pending +ffffffff81cf3950 T rv770_get_temp +ffffffff81cf39b0 T rv770_pm_misc +ffffffff81cf3a90 T r700_cp_stop +ffffffff81cf3b10 T r700_cp_fini +ffffffff81cf3ba0 T rv770_set_clk_bypass_mode +ffffffff81cf3cc0 T r700_vram_gtt_location +ffffffff81cf3e40 T rv770_resume +ffffffff81cf3ed0 t rv770_init_golden_registers +ffffffff81cf4060 t rv770_startup +ffffffff81cf6030 T rv770_suspend +ffffffff81cf6250 T rv770_init +ffffffff81cf6810 T rv770_fini +ffffffff81cf7000 T rv770_copy_dma +ffffffff81cf8000 T rv770_get_ps +ffffffff81cf8030 T rv770_get_pi +ffffffff81cf8060 T evergreen_get_pi +ffffffff81cf8090 T rv770_restore_cgcg +ffffffff81cf8110 T rv770_stop_dpm +ffffffff81cf81d0 T rv770_dpm_enabled +ffffffff81cf8210 T rv770_enable_thermal_protection +ffffffff81cf8270 T rv770_enable_acpi_pm +ffffffff81cf82c0 T rv770_get_seq_value +ffffffff81cf8300 T rv770_write_smc_soft_register +ffffffff81cf8330 T rv770_populate_smc_t +ffffffff81cf84d0 T rv770_populate_smc_sp +ffffffff81cf8530 T rv770_map_clkf_to_ibias +ffffffff81cf8590 T rv770_populate_vddc_value +ffffffff81cf8640 T rv770_populate_mvdd_value +ffffffff81cf8690 T rv770_calculate_memory_refresh_rate +ffffffff81cf8700 T rv770_enable_backbias +ffffffff81cf8760 T rv770_setup_bsp +ffffffff81cf8850 T rv770_program_git +ffffffff81cf88a0 T rv770_program_tp +ffffffff81cf8920 T rv770_program_tpp +ffffffff81cf8960 T rv770_program_sstp +ffffffff81cf89a0 T rv770_program_engine_speed_parameters +ffffffff81cf89f0 T rv770_program_vc +ffffffff81cf8a40 T rv770_clear_vc +ffffffff81cf8a80 T rv770_upload_firmware +ffffffff81cf8ac0 T rv770_populate_initial_mvdd_value +ffffffff81cf8b10 T rv770_get_memory_module_index +ffffffff81cf8b50 T rv770_enable_voltage_control +ffffffff81cf8bb0 T rv770_halt_smc +ffffffff81cf8c10 T rv770_resume_smc +ffffffff81cf8c60 T rv770_set_sw_state +ffffffff81cf8cc0 T rv770_set_boot_state +ffffffff81cf8d10 T rv770_set_uvd_clock_before_set_eng_clock +ffffffff81cf8d80 T rv770_set_uvd_clock_after_set_eng_clock +ffffffff81cf8df0 T rv770_restrict_performance_levels_before_switch +ffffffff81cf8e50 T rv770_dpm_force_performance_level +ffffffff81cf8f10 T r7xx_start_smc +ffffffff81cf8f40 T r7xx_stop_smc +ffffffff81cf8f70 T rv770_read_voltage_smio_registers +ffffffff81cf8fb0 T rv770_reset_smio_status +ffffffff81cf9070 T rv770_get_memory_type +ffffffff81cf90c0 T rv770_get_pcie_gen2_status +ffffffff81cf9130 T rv770_get_max_vddc +ffffffff81cf9190 T rv770_program_response_times +ffffffff81cf92e0 T rv770_enable_auto_throttle_source +ffffffff81cf9460 T rv770_dpm_enable +ffffffff81cfa4e0 T rv770_dpm_late_enable +ffffffff81cfa610 T rv770_dpm_disable +ffffffff81cfa970 T rv770_dpm_set_power_state +ffffffff81cfaf70 T rv770_dpm_setup_asic +ffffffff81cfb2d0 T rv770_dpm_display_configuration_changed +ffffffff81cfb350 T rv7xx_parse_power_table +ffffffff81cfb890 T rv770_get_engine_memory_ss +ffffffff81cfb920 T rv770_dpm_init +ffffffff81cfbb60 T rv770_dpm_print_power_state +ffffffff81cfbc80 T rv770_dpm_debugfs_print_current_performance_level +ffffffff81cfbcb0 T rv770_dpm_get_current_sclk +ffffffff81cfbd20 T rv770_dpm_get_current_mclk +ffffffff81cfbd90 T rv770_dpm_fini +ffffffff81cfbe20 T rv770_dpm_get_sclk +ffffffff81cfbe60 T rv770_dpm_get_mclk +ffffffff81cfbeb0 T rv770_dpm_vblank_too_short +ffffffff81cfbf20 t rv770_convert_power_level_to_smc +ffffffff81cfd000 T rv770_copy_bytes_to_smc +ffffffff81cfd240 T rv770_start_smc +ffffffff81cfd290 T rv770_reset_smc +ffffffff81cfd2e0 T rv770_stop_smc_clock +ffffffff81cfd330 T rv770_start_smc_clock +ffffffff81cfd380 T rv770_is_smc_running +ffffffff81cfd3c0 T rv770_send_msg_to_smc +ffffffff81cfd4a0 T rv770_wait_for_smc_inactive +ffffffff81cfd540 T rv770_load_smc_ucode +ffffffff81cfd6d0 T rv770_read_smc_sram_dword +ffffffff81cfd790 T rv770_write_smc_sram_dword +ffffffff81cfe000 T si_get_allowed_info_register +ffffffff81cfe090 T si_get_xclk +ffffffff81cfe100 T si_get_temp +ffffffff81cfe150 T si_mc_load_microcode +ffffffff81cfe420 T dce6_bandwidth_update +ffffffff81cfe820 t dce6_program_watermarks +ffffffff81cff2d0 T si_fence_ring_emit +ffffffff81cff750 T si_ring_ib_execute +ffffffff81cfff30 T si_gpu_check_soft_reset +ffffffff81d000d0 T si_asic_reset +ffffffff81d004f0 t si_gpu_pci_config_reset +ffffffff81d008a0 T si_gfx_is_lockup +ffffffff81d00910 T si_vram_gtt_location +ffffffff81d009b0 T si_pcie_gart_tlb_flush +ffffffff81d00a00 T si_ib_parse +ffffffff81d010a0 T si_vm_init +ffffffff81d010e0 T si_vm_fini +ffffffff81d01110 T si_vm_flush +ffffffff81d017f0 T si_init_uvd_internal_cg +ffffffff81d01840 T si_get_csb_size +ffffffff81d018d0 T si_get_csb_buffer +ffffffff81d01a60 T si_rlc_reset +ffffffff81d01ae0 T si_irq_set +ffffffff81d01ff0 t si_disable_interrupt_state +ffffffff81d02270 T si_irq_process +ffffffff81d03460 t si_irq_ack +ffffffff81d03a60 T si_resume +ffffffff81d03af0 t si_init_golden_registers +ffffffff81d03cb0 t si_startup +ffffffff81d084c0 T si_suspend +ffffffff81d08840 T si_init +ffffffff81d09d00 t si_cp_fini +ffffffff81d09df0 t si_pcie_gart_fini +ffffffff81d09ef0 T si_fini +ffffffff81d0a1a0 T si_get_gpu_clock_counter +ffffffff81d0a270 T si_set_uvd_clocks +ffffffff81d0a7e0 T si_set_vce_clocks +ffffffff81d0ad20 t si_vce_send_vcepll_ctlreq +ffffffff81d0af60 t dce6_latency_watermark +ffffffff81d0b190 t si_rlc_stop +ffffffff81d0b340 t si_vm_reg_valid +ffffffff81d0b4a0 t si_vm_packet3_cp_dma_check +ffffffff81d0b620 t si_update_cg +ffffffff81d0bb70 t si_enable_mgcg +ffffffff81d0bf90 t si_enable_cgcg +ffffffff81d0d000 T si_dma_is_lockup +ffffffff81d0d080 T si_dma_vm_copy_pages +ffffffff81d0d160 T si_dma_vm_write_pages +ffffffff81d0d2c0 T si_dma_vm_set_pages +ffffffff81d0d420 T si_dma_vm_flush +ffffffff81d0d8b0 T si_copy_dma +ffffffff81d0e000 T si_dpm_force_performance_level +ffffffff81d0e160 T si_get_ddr3_mclk_frequency_ratio +ffffffff81d0e1c0 T si_get_mclk_frequency_ratio +ffffffff81d0e240 T si_trim_voltage_table_to_fit_state_table +ffffffff81d0e340 T si_dpm_setup_asic +ffffffff81d0e510 T si_fan_ctrl_get_fan_speed_percent +ffffffff81d0e5a0 T si_fan_ctrl_set_fan_speed_percent +ffffffff81d0e660 T si_fan_ctrl_set_mode +ffffffff81d0e8b0 T si_fan_ctrl_get_mode +ffffffff81d0e900 T si_dpm_enable +ffffffff81d13c00 t si_populate_smc_tdp_limits +ffffffff81d13e10 T si_dpm_late_enable +ffffffff81d13f60 T si_dpm_disable +ffffffff81d142e0 T si_dpm_pre_set_power_state +ffffffff81d14ee0 T si_dpm_set_power_state +ffffffff81d16460 T si_dpm_post_set_power_state +ffffffff81d16490 T si_dpm_display_configuration_changed +ffffffff81d16570 T si_dpm_init +ffffffff81d18020 T si_dpm_fini +ffffffff81d180d0 T si_dpm_debugfs_print_current_performance_level +ffffffff81d18120 T si_dpm_get_current_sclk +ffffffff81d18190 T si_dpm_get_current_mclk +ffffffff81d18200 t si_get_std_voltage_value +ffffffff81d18330 t si_convert_power_level_to_smc +ffffffff81d18bd0 t si_calculate_sclk_params +ffffffff81d18df0 t si_convert_mc_reg_table_to_smc +ffffffff81d18f50 t si_program_cac_config_registers +ffffffff81d1a000 T si_copy_bytes_to_smc +ffffffff81d1a250 T si_start_smc +ffffffff81d1a290 T si_reset_smc +ffffffff81d1a2d0 T si_program_jump_on_start +ffffffff81d1a300 T si_stop_smc_clock +ffffffff81d1a340 T si_start_smc_clock +ffffffff81d1a380 T si_is_smc_running +ffffffff81d1a3e0 T si_send_msg_to_smc +ffffffff81d1a4b0 T si_wait_for_smc_inactive +ffffffff81d1a550 T si_load_smc_ucode +ffffffff81d1a6f0 T si_read_smc_sram_dword +ffffffff81d1a7c0 T si_write_smc_sram_dword +ffffffff81d1b000 T sumo_get_pi +ffffffff81d1b030 T sumo_gfx_clockgating_initialize +ffffffff81d1b110 T sumo_program_vc +ffffffff81d1b150 T sumo_clear_vc +ffffffff81d1b190 T sumo_program_sstp +ffffffff81d1b210 T sumo_take_smu_control +ffffffff81d1b240 T sumo_get_sleep_divider_from_id +ffffffff81d1b270 T sumo_get_sleep_divider_id_from_clock +ffffffff81d1b320 T sumo_dpm_enable +ffffffff81d1b9c0 T sumo_dpm_late_enable +ffffffff81d1bf80 T sumo_dpm_disable +ffffffff81d1c2d0 T sumo_dpm_pre_set_power_state +ffffffff81d1c790 T sumo_dpm_set_power_state +ffffffff81d1d2d0 T sumo_dpm_post_set_power_state +ffffffff81d1d370 T sumo_dpm_setup_asic +ffffffff81d1d470 T sumo_dpm_display_configuration_changed +ffffffff81d1d4a0 T sumo_convert_vid2_to_vid7 +ffffffff81d1d500 T sumo_construct_sclk_voltage_mapping_table +ffffffff81d1d5c0 T sumo_construct_vid_mapping_table +ffffffff81d1d740 T sumo_dpm_init +ffffffff81d1e000 T sumo_dpm_print_power_state +ffffffff81d1e120 T sumo_dpm_debugfs_print_current_performance_level +ffffffff81d1e150 T sumo_dpm_get_current_sclk +ffffffff81d1e1c0 T sumo_dpm_get_current_mclk +ffffffff81d1e1f0 T sumo_dpm_get_current_vddc +ffffffff81d1e2c0 T sumo_dpm_fini +ffffffff81d1e350 T sumo_dpm_get_sclk +ffffffff81d1e3a0 T sumo_dpm_get_mclk +ffffffff81d1e3d0 T sumo_dpm_force_performance_level +ffffffff81d1e7f0 t sumo_power_level_enable +ffffffff81d1ea20 t sumo_program_power_level +ffffffff81d1f000 T sumo_initialize_m3_arb +ffffffff81d1f2c0 T sumo_smu_notify_alt_vddnb_change +ffffffff81d1f360 t sumo_send_msg_to_smu +ffffffff81d1f500 T sumo_smu_pg_init +ffffffff81d1f520 T sumo_enable_boost_timer +ffffffff81d1f660 T sumo_set_tdp_limit +ffffffff81d1f6e0 T sumo_boost_state_enable +ffffffff81d1f730 T sumo_get_running_fw_version +ffffffff81d20000 T trinity_dpm_enable_bapm +ffffffff81d20080 T trinity_dpm_enable +ffffffff81d20520 T trinity_dpm_late_enable +ffffffff81d20a80 T trinity_dpm_disable +ffffffff81d20e90 T trinity_dpm_force_performance_level +ffffffff81d20f50 T trinity_dpm_pre_set_power_state +ffffffff81d21520 T trinity_dpm_set_power_state +ffffffff81d21ab0 T trinity_dpm_post_set_power_state +ffffffff81d21b50 T trinity_dpm_setup_asic +ffffffff81d21bb0 T trinity_dpm_display_configuration_changed +ffffffff81d21c40 T trinity_dpm_init +ffffffff81d22540 T trinity_dpm_print_power_state +ffffffff81d22650 T trinity_dpm_debugfs_print_current_performance_level +ffffffff81d226e0 T trinity_dpm_get_current_sclk +ffffffff81d22740 T trinity_dpm_get_current_mclk +ffffffff81d22770 T trinity_dpm_fini +ffffffff81d22810 T trinity_dpm_get_sclk +ffffffff81d22860 T trinity_dpm_get_mclk +ffffffff81d22890 t trinity_program_power_level +ffffffff81d23000 T trinity_dpm_bapm_enable +ffffffff81d23150 T trinity_dpm_config +ffffffff81d23230 T trinity_dpm_force_state +ffffffff81d23310 T trinity_dpm_n_levels_disabled +ffffffff81d233f0 T trinity_uvd_dpm_config +ffffffff81d234c0 T trinity_dpm_no_forced_level +ffffffff81d23590 T trinity_dce_enable_voltage_adjustment +ffffffff81d236e0 T trinity_gfx_dynamic_mgpg_config +ffffffff81d237b0 T trinity_acquire_mutex +ffffffff81d23840 T trinity_release_mutex +ffffffff81d24000 T uvd_v1_0_get_rptr +ffffffff81d24040 T uvd_v1_0_get_wptr +ffffffff81d24080 T uvd_v1_0_set_wptr +ffffffff81d240c0 T uvd_v1_0_fence_emit +ffffffff81d244b0 T uvd_v1_0_resume +ffffffff81d24610 T uvd_v1_0_init +ffffffff81d24ba0 T uvd_v1_0_start +ffffffff81d25320 T uvd_v1_0_fini +ffffffff81d25490 T uvd_v1_0_stop +ffffffff81d25600 T uvd_v1_0_ring_test +ffffffff81d257d0 T uvd_v1_0_semaphore_emit +ffffffff81d25800 T uvd_v1_0_ib_execute +ffffffff81d259a0 T uvd_v1_0_ib_test +ffffffff81d26000 T uvd_v2_2_fence_emit +ffffffff81d26470 T uvd_v2_2_semaphore_emit +ffffffff81d26680 T uvd_v2_2_resume +ffffffff81d27000 T uvd_v3_1_semaphore_emit +ffffffff81d28000 T uvd_v4_2_resume +ffffffff81d29000 T vce_v1_0_get_rptr +ffffffff81d29090 T vce_v1_0_get_wptr +ffffffff81d29120 T vce_v1_0_set_wptr +ffffffff81d291b0 T vce_v1_0_enable_mgcg +ffffffff81d29470 T vce_v1_0_load_fw +ffffffff81d29640 T vce_v1_0_bo_size +ffffffff81d296b0 T vce_v1_0_resume +ffffffff81d2a020 T vce_v1_0_start +ffffffff81d2a7e0 T vce_v1_0_init +ffffffff81d2b000 T vce_v2_0_enable_mgcg +ffffffff81d2b070 t vce_v2_0_set_dyn_cg +ffffffff81d2b260 T vce_v2_0_bo_size +ffffffff81d2b2d0 T vce_v2_0_resume +ffffffff81d2c000 T aldebaran_reset_init +ffffffff81d2c0c0 t aldebaran_async_reset +ffffffff81d2c120 t aldebaran_get_reset_handler +ffffffff81d2c1d0 T aldebaran_reset_fini +ffffffff81d2c230 t aldebaran_mode2_prepare_hwcontext +ffffffff81d2c350 t aldebaran_mode2_perform_reset +ffffffff81d2c520 t aldebaran_mode2_restore_hwcontext +ffffffff81d2c9e0 t aldebaran_mode2_reset +ffffffff81d2d000 T aldebaran_reg_base_init +ffffffff81d2e000 T amdgpu_acpi_is_pcie_performance_request_supported +ffffffff81d2e040 T amdgpu_acpi_is_power_shift_control_supported +ffffffff81d2e070 T amdgpu_acpi_pcie_notify_device_ready +ffffffff81d2e190 t amdgpu_atcs_call +ffffffff81d2e280 T amdgpu_acpi_pcie_performance_request +ffffffff81d2e4d0 T amdgpu_acpi_power_shift_control +ffffffff81d2e580 T amdgpu_acpi_smart_shift_update +ffffffff81d2e6d0 T amdgpu_acpi_init +ffffffff81d2e790 t amdgpu_acpi_event +ffffffff81d2ead0 T amdgpu_acpi_get_backlight_caps +ffffffff81d2eb20 T amdgpu_acpi_fini +ffffffff81d2eb40 T amdgpu_acpi_should_gpu_reset +ffffffff81d2eb90 T amdgpu_acpi_detect +ffffffff81d30000 T amdgpu_afmt_acr +ffffffff81d31000 T amdgpu_amdkfd_init +ffffffff81d31040 T amdgpu_amdkfd_fini +ffffffff81d31070 T amdgpu_amdkfd_device_probe +ffffffff81d310a0 T amdgpu_amdkfd_device_init +ffffffff81d31270 t amdgpu_amdkfd_reset_work +ffffffff81d312f0 T amdgpu_amdkfd_device_fini_sw +ffffffff81d31340 T amdgpu_amdkfd_interrupt +ffffffff81d31370 T amdgpu_amdkfd_suspend +ffffffff81d313a0 T amdgpu_amdkfd_resume_iommu +ffffffff81d313d0 T amdgpu_amdkfd_resume +ffffffff81d31400 T amdgpu_amdkfd_pre_reset +ffffffff81d31430 T amdgpu_amdkfd_post_reset +ffffffff81d31460 T amdgpu_amdkfd_gpu_reset +ffffffff81d314c0 T amdgpu_amdkfd_alloc_gtt_mem +ffffffff81d31760 t amdgpu_bo_reserve +ffffffff81d318c0 t amdgpu_bo_unreserve +ffffffff81d319a0 T amdgpu_amdkfd_free_gtt_mem +ffffffff81d31a10 T amdgpu_amdkfd_alloc_gws +ffffffff81d31af0 T amdgpu_amdkfd_free_gws +ffffffff81d31b30 T amdgpu_amdkfd_get_fw_version +ffffffff81d31be0 T amdgpu_amdkfd_get_local_mem_info +ffffffff81d31cb0 T amdgpu_amdkfd_get_gpu_clock_counter +ffffffff81d31cf0 T amdgpu_amdkfd_get_max_engine_clock_in_mhz +ffffffff81d31d70 T amdgpu_amdkfd_get_cu_info +ffffffff81d31ec0 T amdgpu_amdkfd_get_dmabuf_info +ffffffff81d32000 T amdgpu_amdkfd_get_xgmi_hops_count +ffffffff81d32070 T amdgpu_amdkfd_get_xgmi_bandwidth_mbytes +ffffffff81d32100 T amdgpu_amdkfd_get_pcie_bandwidth_mbytes +ffffffff81d32270 T amdgpu_amdkfd_submit_ib +ffffffff81d323d0 T amdgpu_amdkfd_set_compute_idle +ffffffff81d32420 T amdgpu_amdkfd_is_kfd_vmid +ffffffff81d32460 T amdgpu_amdkfd_flush_gpu_tlb_vmid +ffffffff81d32500 T amdgpu_amdkfd_flush_gpu_tlb_pasid +ffffffff81d32530 T amdgpu_amdkfd_have_atomics_support +ffffffff81d32560 T amdgpu_amdkfd_ras_poison_consumption_handler +ffffffff81d325c0 T amdgpu_amdkfd_ras_query_utcl2_poison_status +ffffffff81d33000 T amdgpu_atom_execute_table +ffffffff81d330a0 t amdgpu_atom_execute_table_locked +ffffffff81d333f0 T amdgpu_atom_parse +ffffffff81d33940 T amdgpu_atom_destroy +ffffffff81d33980 T amdgpu_atom_asic_init +ffffffff81d33aa0 T amdgpu_atom_parse_data_header +ffffffff81d33b40 T amdgpu_atom_parse_cmd_header +ffffffff81d33bc0 t atom_op_move +ffffffff81d33da0 t atom_op_and +ffffffff81d33f80 t atom_op_or +ffffffff81d34160 t atom_op_shift_left +ffffffff81d34350 t atom_op_shift_right +ffffffff81d34540 t atom_op_mul +ffffffff81d34690 t atom_op_div +ffffffff81d34800 t atom_op_add +ffffffff81d349e0 t atom_op_sub +ffffffff81d34bc0 t atom_op_setport +ffffffff81d34d40 t atom_op_setregblock +ffffffff81d34e00 t atom_op_setfbbase +ffffffff81d34ed0 t atom_op_compare +ffffffff81d350c0 t atom_op_switch +ffffffff81d35310 t atom_op_jump +ffffffff81d35590 t atom_op_test +ffffffff81d35750 t atom_op_delay +ffffffff81d35830 t atom_op_calltable +ffffffff81d35980 t atom_op_repeat +ffffffff81d359b0 t atom_op_clear +ffffffff81d35ac0 t atom_op_nop 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dce_v10_0_vblank_get_counter +ffffffff81dcbb10 t dce_v10_0_hpd_sense +ffffffff81dcbb70 t dce_v10_0_hpd_set_polarity +ffffffff81dcbc40 t dce_v10_0_hpd_get_gpio_reg +ffffffff81dcbc70 t dce_v10_0_page_flip +ffffffff81dcbd60 t dce_v10_0_crtc_get_scanoutpos +ffffffff81dcbe00 t dce_v10_0_encoder_add +ffffffff81dcc030 t dce_v10_0_latency_watermark +ffffffff81dcc250 t dce_v10_0_encoder_destroy +ffffffff81dcc2b0 t dce_v10_0_encoder_prepare +ffffffff81dcc4b0 t dce_v10_0_encoder_commit +ffffffff81dcc4e0 t dce_v10_0_encoder_mode_set +ffffffff81dcd380 t dce_v10_0_encoder_disable +ffffffff81dcd490 t dce_v10_0_ext_dpms +ffffffff81dcd4c0 t dce_v10_0_ext_prepare +ffffffff81dcd4f0 t dce_v10_0_ext_commit +ffffffff81dcd520 t dce_v10_0_ext_mode_set +ffffffff81dcd550 t dce_v10_0_ext_disable +ffffffff81dcd580 t dce_v10_0_set_crtc_irq_state +ffffffff81dcd660 t dce_v10_0_crtc_irq +ffffffff81dcd890 t dce_v10_0_set_crtc_vblank_interrupt_state +ffffffff81dcd960 t dce_v10_0_set_crtc_vline_interrupt_state +ffffffff81dcda30 t dce_v10_0_set_pageflip_irq_state +ffffffff81dcdae0 t dce_v10_0_pageflip_irq +ffffffff81dcdc40 t dce_v10_0_set_hpd_irq_state +ffffffff81dcdd10 t dce_v10_0_hpd_irq +ffffffff81dcde30 t dce_v10_0_crtc_cursor_set2 +ffffffff81dce1a0 t dce_v10_0_crtc_cursor_move +ffffffff81dce280 t dce_v10_0_crtc_gamma_set +ffffffff81dce2c0 t dce_v10_0_crtc_destroy +ffffffff81dce2f0 t amdgpu_bo_reserve +ffffffff81dce4e0 t amdgpu_bo_unreserve +ffffffff81dce5c0 t dce_v10_0_cursor_move_locked +ffffffff81dce710 t dce_v10_0_crtc_load_lut +ffffffff81dceaa0 t dce_v10_0_crtc_dpms +ffffffff81dcec70 t dce_v10_0_crtc_prepare +ffffffff81dcecb0 t dce_v10_0_crtc_commit +ffffffff81dcece0 t dce_v10_0_crtc_mode_fixup +ffffffff81dceea0 t dce_v10_0_crtc_mode_set +ffffffff81dcf090 t dce_v10_0_crtc_set_base +ffffffff81dcf0b0 t dce_v10_0_crtc_set_base_atomic +ffffffff81dcf0d0 t dce_v10_0_crtc_disable +ffffffff81dcf270 t dce_v10_0_crtc_do_set_base +ffffffff81dcf920 t dce_v10_0_is_display_hung +ffffffff81dd0000 T dce_v11_0_disable_dce +ffffffff81dd0160 t dce_v11_0_early_init +ffffffff81dd02b0 t dce_v11_0_sw_init +ffffffff81dd0730 t dce_v11_0_sw_fini +ffffffff81dd0860 t dce_v11_0_hw_init +ffffffff81dd0c30 t dce_v11_0_hw_fini +ffffffff81dd0dc0 t dce_v11_0_suspend +ffffffff81dd0e20 t dce_v11_0_resume +ffffffff81dd0e90 t dce_v11_0_is_idle +ffffffff81dd0ec0 t dce_v11_0_wait_for_idle +ffffffff81dd0ef0 t dce_v11_0_soft_reset +ffffffff81dd1110 t dce_v11_0_set_clockgating_state +ffffffff81dd1140 t dce_v11_0_set_powergating_state +ffffffff81dd1170 t dce_v11_0_audio_endpt_rreg +ffffffff81dd1200 t dce_v11_0_audio_endpt_wreg +ffffffff81dd1280 t dce_v11_0_bandwidth_update +ffffffff81dd1cf0 t dce_v11_0_vblank_get_counter +ffffffff81dd1d40 t dce_v11_0_hpd_sense +ffffffff81dd1da0 t dce_v11_0_hpd_set_polarity +ffffffff81dd1e70 t dce_v11_0_hpd_get_gpio_reg +ffffffff81dd1ea0 t dce_v11_0_page_flip +ffffffff81dd1fa0 t dce_v11_0_crtc_get_scanoutpos +ffffffff81dd2040 t dce_v11_0_encoder_add +ffffffff81dd2270 t dce_v11_0_latency_watermark +ffffffff81dd2490 t dce_v11_0_encoder_destroy +ffffffff81dd24f0 t dce_v11_0_encoder_prepare +ffffffff81dd26f0 t dce_v11_0_encoder_commit +ffffffff81dd2720 t dce_v11_0_encoder_mode_set +ffffffff81dd35c0 t dce_v11_0_encoder_disable +ffffffff81dd36d0 t dce_v11_0_ext_dpms +ffffffff81dd3700 t dce_v11_0_ext_prepare +ffffffff81dd3730 t dce_v11_0_ext_commit +ffffffff81dd3760 t dce_v11_0_ext_mode_set +ffffffff81dd3790 t dce_v11_0_ext_disable +ffffffff81dd37c0 t dce_v11_0_set_crtc_irq_state +ffffffff81dd38a0 t dce_v11_0_crtc_irq +ffffffff81dd3ac0 t dce_v11_0_set_crtc_vblank_interrupt_state +ffffffff81dd3b90 t dce_v11_0_set_crtc_vline_interrupt_state +ffffffff81dd3c60 t dce_v11_0_set_pageflip_irq_state +ffffffff81dd3d10 t dce_v11_0_pageflip_irq +ffffffff81dd3e70 t dce_v11_0_set_hpd_irq_state +ffffffff81dd3f40 t dce_v11_0_hpd_irq +ffffffff81dd4060 t dce_v11_0_crtc_cursor_set2 +ffffffff81dd43d0 t dce_v11_0_crtc_cursor_move +ffffffff81dd44b0 t dce_v11_0_crtc_gamma_set +ffffffff81dd44f0 t dce_v11_0_crtc_destroy +ffffffff81dd4520 t amdgpu_bo_reserve +ffffffff81dd4710 t amdgpu_bo_unreserve +ffffffff81dd47f0 t dce_v11_0_cursor_move_locked +ffffffff81dd4940 t dce_v11_0_crtc_load_lut +ffffffff81dd4cb0 t dce_v11_0_crtc_dpms +ffffffff81dd4e80 t dce_v11_0_crtc_prepare +ffffffff81dd4ec0 t dce_v11_0_crtc_commit +ffffffff81dd4ef0 t dce_v11_0_crtc_mode_fixup +ffffffff81dd5160 t dce_v11_0_crtc_mode_set +ffffffff81dd53c0 t dce_v11_0_crtc_set_base +ffffffff81dd53e0 t dce_v11_0_crtc_set_base_atomic +ffffffff81dd5400 t dce_v11_0_crtc_disable +ffffffff81dd55a0 t dce_v11_0_crtc_do_set_base +ffffffff81dd6000 t df_v1_7_sw_init +ffffffff81dd6040 t df_v1_7_sw_fini +ffffffff81dd6070 t df_v1_7_enable_broadcast_mode +ffffffff81dd6190 t df_v1_7_get_fb_channel_number +ffffffff81dd6210 t df_v1_7_get_hbm_channel_number +ffffffff81dd6260 t df_v1_7_update_medium_grain_clock_gating +ffffffff81dd63d0 t df_v1_7_get_clockgating_state +ffffffff81dd6460 t df_v1_7_enable_ecc_force_par_wr_rmw +ffffffff81dd7000 t df_v3_6_sw_init +ffffffff81dd7150 t df_v3_6_sw_fini +ffffffff81dd7180 t df_v3_6_enable_broadcast_mode +ffffffff81dd72a0 t df_v3_6_get_fb_channel_number +ffffffff81dd7380 t df_v3_6_get_hbm_channel_number +ffffffff81dd73d0 t df_v3_6_update_medium_grain_clock_gating +ffffffff81dd7570 t df_v3_6_get_clockgating_state +ffffffff81dd7600 t df_v3_6_pmc_start +ffffffff81dd7980 t df_v3_6_pmc_stop +ffffffff81dd7c20 t df_v3_6_pmc_get_count +ffffffff81dd7db0 t df_v3_6_get_fica +ffffffff81dd7ec0 t df_v3_6_set_fica +ffffffff81dd7fa0 t df_v3_6_query_ras_poison_mode +ffffffff81dd8110 t df_v3_6_perfmon_arm_with_status +ffffffff81dd9000 T dimgrey_cavefish_reg_base_init +ffffffff81dda000 T emu_soc_asic_init +ffffffff81ddb000 t gfx_v10_0_early_init +ffffffff81ddb420 t gfx_v10_0_late_init +ffffffff81ddb490 t gfx_v10_0_sw_init +ffffffff81ddc830 t gfx_v10_0_sw_fini +ffffffff81ddcb70 t gfx_v10_0_hw_init +ffffffff81ddf710 t gfx_v10_0_hw_fini +ffffffff81ddfa00 t gfx_v10_0_suspend +ffffffff81ddfa40 t gfx_v10_0_resume +ffffffff81ddfa50 t gfx_v10_0_is_idle +ffffffff81ddfae0 t gfx_v10_0_wait_for_idle +ffffffff81ddfbc0 t gfx_v10_0_soft_reset +ffffffff81ddff10 t gfx_v10_0_set_clockgating_state +ffffffff81de01b0 t gfx_v10_0_set_powergating_state +ffffffff81de0270 t gfx_v10_0_get_clockgating_state +ffffffff81de0380 t gfx10_kiq_set_resources +ffffffff81de06b0 t gfx10_kiq_map_queues +ffffffff81de0a40 t gfx10_kiq_unmap_queues +ffffffff81de0e40 t gfx10_kiq_query_status +ffffffff81de1140 t gfx10_kiq_invalidate_tlbs +ffffffff81de1260 t gfx_v10_0_ring_get_rptr_compute +ffffffff81de1290 t gfx_v10_0_ring_get_wptr_compute +ffffffff81de1300 t gfx_v10_0_ring_set_wptr_compute +ffffffff81de1440 t gfx_v10_0_ring_emit_ib_compute +ffffffff81de1790 t gfx_v10_0_ring_emit_fence_kiq +ffffffff81de1be0 t gfx_v10_0_ring_test_ring +ffffffff81de1e50 t gfx_v10_0_ring_test_ib +ffffffff81de2100 t gfx_v10_0_ring_emit_rreg +ffffffff81de23a0 t gfx_v10_0_ring_emit_wreg +ffffffff81de25e0 t gfx_v10_0_ring_emit_reg_wait +ffffffff81de2630 t gfx_v10_0_ring_emit_reg_write_reg_wait +ffffffff81de26c0 t gfx_v10_0_wait_reg_mem +ffffffff81de29f0 t gfx_v10_0_ring_get_rptr_gfx +ffffffff81de2a20 t gfx_v10_0_ring_get_wptr_gfx +ffffffff81de2b30 t gfx_v10_0_ring_set_wptr_gfx +ffffffff81de2d40 t gfx_v10_0_ring_emit_ib_gfx +ffffffff81de33f0 t gfx_v10_0_ring_emit_fence +ffffffff81de37c0 t gfx_v10_0_ring_emit_pipeline_sync +ffffffff81de3820 t gfx_v10_0_ring_emit_vm_flush +ffffffff81de39f0 t gfx_v10_0_ring_emit_hdp_flush +ffffffff81de3ac0 t gfx_v10_0_ring_emit_gds_switch +ffffffff81de3ba0 t gfx_v10_0_ring_emit_init_cond_exec +ffffffff81de3dd0 t gfx_v10_0_ring_emit_patch_cond_exec +ffffffff81de3e90 t gfx_v10_0_ring_emit_sb +ffffffff81de3f80 t gfx_v10_0_ring_emit_cntxcntl +ffffffff81de4470 t gfx_v10_0_ring_emit_frame_cntl +ffffffff81de4580 t gfx_v10_0_ring_soft_recovery +ffffffff81de45f0 t gfx_v10_0_ring_preempt_ib +ffffffff81de4760 t gfx_v10_0_emit_mem_sync +ffffffff81de4aa0 t gfx_v10_0_write_data_to_reg +ffffffff81de4cb0 t gfx_v10_0_set_eop_interrupt_state +ffffffff81de4d90 t gfx_v10_0_eop_irq +ffffffff81de4f60 t gfx_v10_0_set_gfx_eop_interrupt_state +ffffffff81de50f0 t gfx_v10_0_set_compute_eop_interrupt_state +ffffffff81de52a0 t gfx_v10_0_kiq_set_interrupt_state +ffffffff81de5580 t gfx_v10_0_kiq_irq +ffffffff81de5600 t gfx_v10_0_set_priv_reg_fault_state +ffffffff81de5720 t gfx_v10_0_priv_reg_irq +ffffffff81de5780 t gfx_v10_0_handle_priv_fault +ffffffff81de5910 t gfx_v10_0_set_priv_inst_fault_state +ffffffff81de5a30 t gfx_v10_0_priv_inst_irq +ffffffff81de5a90 t gfx_v10_0_is_rlc_enabled +ffffffff81de5b10 t gfx_v10_0_set_safe_mode +ffffffff81de5db0 t gfx_v10_0_unset_safe_mode +ffffffff81de5e60 t gfx_v10_0_rlc_init +ffffffff81de5ee0 t gfx_v10_0_get_csb_size +ffffffff81de5f40 t gfx_v10_0_get_csb_buffer +ffffffff81de60c0 t gfx_v10_0_rlc_resume +ffffffff81de6bc0 t gfx_v10_0_rlc_stop +ffffffff81de6ca0 t gfx_v10_0_rlc_reset +ffffffff81de6e40 t gfx_v10_0_rlc_start +ffffffff81de6fe0 t gfx_v10_0_update_spm_vmid +ffffffff81de7110 t gfx_v10_0_wait_for_rlc_autoload_complete +ffffffff81de7c80 t gfx_v10_0_init_csb +ffffffff81de7f50 t gfx_v10_0_is_rlcg_access_range +ffffffff81de7f80 t gfx_v10_0_gfx_mqd_init +ffffffff81de8360 t gfx_v10_0_compute_mqd_init +ffffffff81de8800 t amdgpu_bo_unreserve +ffffffff81de88e0 t gfx_v10_0_get_gpu_clock_counter +ffffffff81de8de0 t gfx_v10_0_select_se_sh +ffffffff81de8e80 t gfx_v10_0_read_wave_data +ffffffff81de90e0 t gfx_v10_0_read_wave_vgprs +ffffffff81de9110 t gfx_v10_0_read_wave_sgprs +ffffffff81de9190 t gfx_v10_0_select_me_pipe_q +ffffffff81de91b0 t gfx_v10_0_init_spm_golden_registers +ffffffff81de9220 t gfx_v10_0_update_perfmon_mgcg +ffffffff81de9340 t wave_read_ind +ffffffff81de9420 t wave_read_regs +ffffffff81de9580 t gfx_v10_0_cp_resume +ffffffff81dec1c0 t gfx_v10_3_get_disabled_sa +ffffffff81dec2d0 t gfx_v10_0_get_rb_active_bitmap +ffffffff81dec3f0 t gfx_v10_0_get_wgp_active_bitmap_per_sh +ffffffff81dec500 t gfx_v10_0_enable_gui_idle_interrupt +ffffffff81dec610 t gfx_v10_0_cp_gfx_enable +ffffffff81dec850 t gfx_v10_0_cp_compute_enable +ffffffff81dec9e0 t amdgpu_bo_reserve +ffffffff81decb50 t gfx_v10_0_kiq_init_register +ffffffff81ded9c0 t gfx_v10_0_cp_gfx_switch_pipe +ffffffff81dedac0 t gfx_v10_0_cp_gfx_set_doorbell +ffffffff81dedd90 t gfx_v10_0_cp_gfx_start +ffffffff81dee770 t gfx_v10_0_update_fine_grain_clock_gating +ffffffff81deea90 t gfx_v10_0_update_medium_grain_clock_gating +ffffffff81def1b0 t gfx_v10_0_update_3d_clock_gating +ffffffff81def570 t gfx_v10_0_update_coarse_grain_clock_gating +ffffffff81def930 t gfx_v10_cntl_pg +ffffffff81df0000 t gfx_v11_0_early_init +ffffffff81df03a0 t gfx_v11_0_late_init +ffffffff81df0410 t gfx_v11_0_sw_init +ffffffff81df1350 t gfx_v11_0_sw_fini +ffffffff81df1630 t gfx_v11_0_hw_init +ffffffff81df5a80 t gfx_v11_0_hw_fini +ffffffff81df5d00 t gfx_v11_0_suspend +ffffffff81df5d40 t gfx_v11_0_resume +ffffffff81df5d50 t gfx_v11_0_is_idle +ffffffff81df5de0 t gfx_v11_0_wait_for_idle +ffffffff81df5ec0 t gfx_v11_0_check_soft_reset +ffffffff81df5ff0 t gfx_v11_0_soft_reset +ffffffff81df6cd0 t gfx_v11_0_post_soft_reset +ffffffff81df6ce0 t gfx_v11_0_set_clockgating_state +ffffffff81df78c0 t gfx_v11_0_set_powergating_state +ffffffff81df7960 t gfx_v11_0_get_clockgating_state +ffffffff81df7b30 t gfx11_kiq_set_resources +ffffffff81df7e60 t gfx11_kiq_map_queues +ffffffff81df81f0 t gfx11_kiq_unmap_queues +ffffffff81df85f0 t gfx11_kiq_query_status +ffffffff81df88f0 t gfx11_kiq_invalidate_tlbs +ffffffff81df8a10 t gfx_v11_0_ring_get_rptr_compute +ffffffff81df8a40 t gfx_v11_0_ring_get_wptr_compute +ffffffff81df8ab0 t gfx_v11_0_ring_set_wptr_compute +ffffffff81df8bf0 t gfx_v11_0_ring_emit_ib_compute +ffffffff81df8f40 t gfx_v11_0_ring_emit_fence_kiq +ffffffff81df9380 t gfx_v11_0_ring_test_ring +ffffffff81df9610 t gfx_v11_0_ring_test_ib +ffffffff81df98d0 t gfx_v11_0_ring_emit_rreg +ffffffff81df9b70 t gfx_v11_0_ring_emit_wreg +ffffffff81df9db0 t gfx_v11_0_ring_emit_reg_wait +ffffffff81df9e00 t gfx_v11_0_ring_emit_reg_write_reg_wait +ffffffff81df9e70 t gfx_v11_0_wait_reg_mem +ffffffff81dfa1a0 t gfx_v11_0_ring_get_rptr_gfx +ffffffff81dfa1d0 t gfx_v11_0_ring_get_wptr_gfx +ffffffff81dfa2e0 t gfx_v11_0_ring_set_wptr_gfx +ffffffff81dfa4f0 t gfx_v11_0_ring_emit_ib_gfx +ffffffff81dfab90 t gfx_v11_0_ring_emit_fence +ffffffff81dfaf60 t gfx_v11_0_ring_emit_pipeline_sync +ffffffff81dfafc0 t gfx_v11_0_ring_emit_vm_flush +ffffffff81dfb190 t gfx_v11_0_ring_emit_hdp_flush +ffffffff81dfb260 t gfx_v11_0_ring_emit_gds_switch +ffffffff81dfb340 t gfx_v11_0_ring_emit_init_cond_exec +ffffffff81dfb570 t gfx_v11_0_ring_emit_patch_cond_exec +ffffffff81dfb630 t gfx_v11_0_ring_emit_cntxcntl +ffffffff81dfb790 t gfx_v11_0_ring_emit_frame_cntl +ffffffff81dfb8a0 t gfx_v11_0_ring_soft_recovery +ffffffff81dfb910 t gfx_v11_0_ring_preempt_ib +ffffffff81dfba80 t gfx_v11_0_emit_mem_sync +ffffffff81dfbdc0 t gfx_v11_0_write_data_to_reg +ffffffff81dfbfd0 t gfx_v11_0_set_eop_interrupt_state +ffffffff81dfc060 t gfx_v11_0_eop_irq +ffffffff81dfc230 t gfx_v11_0_set_gfx_eop_interrupt_state +ffffffff81dfc3c0 t gfx_v11_0_set_compute_eop_interrupt_state +ffffffff81dfc550 t gfx_v11_0_set_priv_reg_fault_state +ffffffff81dfc670 t gfx_v11_0_priv_reg_irq +ffffffff81dfc6d0 t gfx_v11_0_handle_priv_fault +ffffffff81dfc860 t gfx_v11_0_set_priv_inst_fault_state +ffffffff81dfc980 t gfx_v11_0_priv_inst_irq +ffffffff81dfc9e0 t gfx_v11_0_is_rlc_enabled +ffffffff81dfca60 t gfx_v11_0_set_safe_mode +ffffffff81dfcbb0 t gfx_v11_0_unset_safe_mode +ffffffff81dfcc20 t gfx_v11_0_rlc_init +ffffffff81dfcca0 t gfx_v11_0_get_csb_size +ffffffff81dfcd00 t gfx_v11_0_get_csb_buffer +ffffffff81dfce80 t gfx_v11_0_rlc_resume +ffffffff81dfdba0 t gfx_v11_0_rlc_stop +ffffffff81dfdc80 t gfx_v11_0_rlc_reset +ffffffff81dfde20 t gfx_v11_0_rlc_start +ffffffff81dfdfc0 t gfx_v11_0_update_spm_vmid +ffffffff81dfe0c0 t gfx_v11_0_init_csb +ffffffff81dfe240 t gfx_v11_0_gfx_mqd_init +ffffffff81dfe610 t gfx_v11_0_compute_mqd_init +ffffffff81dfeb30 t amdgpu_bo_unreserve +ffffffff81dfec10 t gfx_v11_0_get_gpu_clock_counter +ffffffff81dfef70 t gfx_v11_0_select_se_sh +ffffffff81dff010 t gfx_v11_0_read_wave_data +ffffffff81dff250 t gfx_v11_0_read_wave_vgprs +ffffffff81dff280 t gfx_v11_0_read_wave_sgprs +ffffffff81dff300 t gfx_v11_0_select_me_pipe_q +ffffffff81dff320 t gfx_v11_0_update_perf_clk +ffffffff81dff450 t wave_read_ind +ffffffff81dff530 t wave_read_regs +ffffffff81dff690 t gfx_v11_0_disable_gpa_mode +ffffffff81dff820 t gfx_v11_0_cp_resume +ffffffff81e038a0 t gfx_v11_0_config_me_cache +ffffffff81e03c40 t gfx_v11_0_config_pfp_cache +ffffffff81e03fe0 t gfx_v11_0_config_mec_cache +ffffffff81e04380 t gfx_v11_0_enable_gui_idle_interrupt +ffffffff81e04490 t gfx_v11_0_cp_compute_enable +ffffffff81e04660 t gfx_v11_0_cp_gfx_enable +ffffffff81e04850 t amdgpu_bo_reserve +ffffffff81e049c0 t gfx_v11_0_kiq_init_register +ffffffff81e05830 t gfx_v11_0_cp_gfx_switch_pipe +ffffffff81e05910 t gfx_v11_0_cp_gfx_set_doorbell +ffffffff81e05af0 t gfx_v11_0_cp_gfx_start +ffffffff81e063b0 t gfx_v11_cntl_pg +ffffffff81e07000 t gfx_v8_0_early_init +ffffffff81e07320 t gfx_v8_0_late_init +ffffffff81e07a20 t gfx_v8_0_sw_init +ffffffff81e090f0 t gfx_v8_0_sw_fini +ffffffff81e093b0 t gfx_v8_0_hw_init +ffffffff81e0b5d0 t gfx_v8_0_hw_fini +ffffffff81e0bac0 t gfx_v8_0_suspend +ffffffff81e0bb00 t gfx_v8_0_resume +ffffffff81e0bb10 t gfx_v8_0_is_idle +ffffffff81e0bb80 t gfx_v8_0_wait_for_idle +ffffffff81e0bc30 t gfx_v8_0_check_soft_reset +ffffffff81e0bd10 t gfx_v8_0_pre_soft_reset +ffffffff81e0be90 t gfx_v8_0_soft_reset +ffffffff81e0c050 t gfx_v8_0_post_soft_reset +ffffffff81e0c210 t gfx_v8_0_set_clockgating_state +ffffffff81e0c4d0 t gfx_v8_0_set_powergating_state +ffffffff81e0c890 t gfx_v8_0_get_clockgating_state +ffffffff81e0c970 t gfx_v8_0_get_gpu_clock_counter +ffffffff81e0ca10 t gfx_v8_0_select_se_sh +ffffffff81e0ca70 t gfx_v8_0_read_wave_data +ffffffff81e0cf10 t gfx_v8_0_read_wave_sgprs +ffffffff81e0cfc0 t gfx_v8_0_select_me_pipe_q +ffffffff81e0cfe0 t gfx_v8_0_ring_get_rptr +ffffffff81e0d010 t gfx_v8_0_ring_get_wptr_compute +ffffffff81e0d040 t gfx_v8_0_ring_set_wptr_compute +ffffffff81e0d080 t gfx_v8_0_ring_emit_fence_kiq +ffffffff81e0d4b0 t gfx_v8_0_ring_test_ring +ffffffff81e0d6b0 t gfx_v8_0_ring_emit_rreg +ffffffff81e0d950 t gfx_v8_0_ring_emit_wreg +ffffffff81e0db90 t gfx_v8_0_ring_get_wptr_gfx +ffffffff81e0dbf0 t gfx_v8_0_ring_set_wptr_gfx +ffffffff81e0dc60 t gfx_v8_0_ring_emit_ib_gfx +ffffffff81e0e1c0 t gfx_v8_0_ring_emit_fence_gfx +ffffffff81e0e6c0 t gfx_v8_0_ring_emit_pipeline_sync +ffffffff81e0e9b0 t gfx_v8_0_ring_emit_vm_flush +ffffffff81e0ed60 t gfx_v8_0_ring_emit_hdp_flush +ffffffff81e0f080 t gfx_v8_0_ring_emit_gds_switch +ffffffff81e0f850 t gfx_v8_0_ring_test_ib +ffffffff81e0fa00 t gfx_v8_0_ring_emit_init_cond_exec +ffffffff81e0fc30 t gfx_v8_0_ring_emit_patch_cond_exec +ffffffff81e0fce0 t gfx_v8_ring_emit_sb +ffffffff81e0fdd0 t gfx_v8_ring_emit_cntxcntl +ffffffff81e10370 t gfx_v8_0_ring_soft_recovery +ffffffff81e103a0 t gfx_v8_0_emit_mem_sync +ffffffff81e105b0 t gfx_v8_0_ring_emit_ib_compute +ffffffff81e108c0 t gfx_v8_0_ring_emit_fence_compute +ffffffff81e10bc0 t gfx_v8_0_emit_mem_sync_compute +ffffffff81e10e80 t gfx_v8_0_emit_wave_limit +ffffffff81e11030 t gfx_v8_0_set_eop_interrupt_state +ffffffff81e11240 t gfx_v8_0_eop_irq +ffffffff81e11370 t gfx_v8_0_set_priv_reg_fault_state +ffffffff81e113f0 t gfx_v8_0_priv_reg_irq +ffffffff81e11510 t gfx_v8_0_set_priv_inst_fault_state +ffffffff81e11590 t gfx_v8_0_priv_inst_irq +ffffffff81e116b0 t gfx_v8_0_set_cp_ecc_int_state +ffffffff81e11920 t gfx_v8_0_cp_ecc_error_irq +ffffffff81e11970 t gfx_v8_0_set_sq_int_state +ffffffff81e11a00 t gfx_v8_0_sq_irq +ffffffff81e11aa0 t gfx_v8_0_parse_sq_irq +ffffffff81e11cf0 t gfx_v8_0_is_rlc_enabled +ffffffff81e11d30 t gfx_v8_0_set_safe_mode +ffffffff81e11e30 t gfx_v8_0_unset_safe_mode +ffffffff81e11ed0 t gfx_v8_0_rlc_init +ffffffff81e11f80 t gfx_v8_0_get_csb_size +ffffffff81e11fe0 t gfx_v8_0_get_csb_buffer +ffffffff81e12160 t gfx_v8_0_cp_jump_table_num +ffffffff81e121a0 t gfx_v8_0_rlc_resume +ffffffff81e12530 t gfx_v8_0_rlc_stop +ffffffff81e125a0 t gfx_v8_0_rlc_reset +ffffffff81e12620 t gfx_v8_0_rlc_start +ffffffff81e126a0 t gfx_v8_0_update_spm_vmid +ffffffff81e12710 t gfx_v8_0_init_save_restore_list +ffffffff81e12b30 t gfx_v8_0_wait_for_rlc_serdes +ffffffff81e12d50 t gfx_v8_0_sq_irq_work_func +ffffffff81e12d70 t amdgpu_bo_unreserve +ffffffff81e12e50 t gfx_v8_0_kiq_resume +ffffffff81e130b0 t gfx_v8_0_cp_gfx_resume +ffffffff81e13bd0 t gfx_v8_0_kcq_resume +ffffffff81e14600 t amdgpu_bo_reserve +ffffffff81e14770 t gfx_v8_0_mqd_commit +ffffffff81e14950 t gfx_v8_0_mqd_init +ffffffff81e14d70 t gfx_v8_0_deactivate_hqd +ffffffff81e14e30 t gfx_v8_0_update_medium_grain_clock_gating +ffffffff81e15160 t gfx_v8_0_update_coarse_grain_clock_gating +ffffffff81e16000 t gfx_v9_0_ras_error_inject +ffffffff81e161a0 t gfx_v9_0_query_ras_error_count +ffffffff81e16d40 t gfx_v9_0_reset_ras_error_count +ffffffff81e17780 T gfx_v9_0_select_se_sh +ffffffff81e17820 t gfx_v9_0_early_init +ffffffff81e17c80 t gfx_v9_0_late_init +ffffffff81e18990 t gfx_v9_0_sw_init +ffffffff81e19fe0 t gfx_v9_0_sw_fini +ffffffff81e1a290 t gfx_v9_0_hw_init +ffffffff81e1d340 t gfx_v9_0_hw_fini +ffffffff81e1dab0 t gfx_v9_0_suspend +ffffffff81e1daf0 t gfx_v9_0_resume +ffffffff81e1db00 t gfx_v9_0_is_idle +ffffffff81e1db80 t gfx_v9_0_wait_for_idle +ffffffff81e1dc60 t gfx_v9_0_soft_reset +ffffffff81e1dff0 t gfx_v9_0_set_clockgating_state +ffffffff81e1e0c0 t gfx_v9_0_set_powergating_state +ffffffff81e1e4c0 t gfx_v9_0_get_clockgating_state +ffffffff81e1e5d0 t gfx_v9_0_kiq_set_resources +ffffffff81e1e900 t gfx_v9_0_kiq_map_queues +ffffffff81e1ec40 t gfx_v9_0_kiq_unmap_queues +ffffffff81e1efc0 t gfx_v9_0_kiq_query_status +ffffffff81e1f2c0 t gfx_v9_0_kiq_invalidate_tlbs +ffffffff81e1f3e0 t gfx_v9_0_ring_get_rptr_compute +ffffffff81e1f410 t gfx_v9_0_ring_get_wptr_compute +ffffffff81e1f480 t gfx_v9_0_ring_set_wptr_compute +ffffffff81e1f4e0 t gfx_v9_0_ring_emit_fence_kiq +ffffffff81e1f920 t gfx_v9_0_ring_test_ring +ffffffff81e1fb50 t gfx_v9_0_ring_emit_rreg +ffffffff81e1fdf0 t gfx_v9_0_ring_emit_wreg +ffffffff81e20030 t gfx_v9_0_ring_emit_reg_wait +ffffffff81e20080 t gfx_v9_0_ring_emit_reg_write_reg_wait +ffffffff81e20120 t gfx_v9_0_wait_reg_mem +ffffffff81e20450 t gfx_v9_0_ring_get_rptr_gfx +ffffffff81e20480 t gfx_v9_0_ring_get_wptr_gfx +ffffffff81e20590 t gfx_v9_0_ring_set_wptr_gfx +ffffffff81e206c0 t gfx_v9_0_ring_emit_ib_gfx +ffffffff81e20be0 t gfx_v9_0_ring_emit_fence +ffffffff81e20fa0 t gfx_v9_0_ring_emit_pipeline_sync +ffffffff81e21000 t gfx_v9_0_ring_emit_vm_flush +ffffffff81e21110 t gfx_v9_0_ring_emit_hdp_flush +ffffffff81e211e0 t gfx_v9_0_ring_emit_gds_switch +ffffffff81e212c0 t gfx_v9_0_ring_test_ib +ffffffff81e21470 t gfx_v9_0_ring_emit_init_cond_exec +ffffffff81e216a0 t gfx_v9_0_ring_emit_patch_cond_exec +ffffffff81e21770 t gfx_v9_ring_emit_sb +ffffffff81e21860 t gfx_v9_ring_emit_cntxcntl +ffffffff81e21c60 t gfx_v9_0_ring_emit_frame_cntl +ffffffff81e21d70 t gfx_v9_0_ring_soft_recovery +ffffffff81e21de0 t gfx_v9_0_emit_mem_sync +ffffffff81e220a0 t gfx_v9_0_write_data_to_reg +ffffffff81e222b0 t gfx_v9_0_ring_emit_ib_compute +ffffffff81e225e0 t gfx_v9_0_emit_wave_limit +ffffffff81e227b0 t gfx_v9_0_set_eop_interrupt_state +ffffffff81e22980 t gfx_v9_0_eop_irq +ffffffff81e22ab0 t gfx_v9_0_set_compute_eop_interrupt_state +ffffffff81e22c60 t gfx_v9_0_set_priv_reg_fault_state +ffffffff81e22d80 t gfx_v9_0_priv_reg_irq +ffffffff81e22ea0 t gfx_v9_0_set_priv_inst_fault_state +ffffffff81e22fc0 t gfx_v9_0_priv_inst_irq +ffffffff81e230e0 t gfx_v9_0_set_cp_ecc_error_state +ffffffff81e23910 t gfx_v9_0_is_rlc_enabled +ffffffff81e23990 t gfx_v9_0_set_safe_mode +ffffffff81e23ae0 t gfx_v9_0_unset_safe_mode +ffffffff81e23b50 t gfx_v9_0_rlc_init +ffffffff81e24360 t gfx_v9_0_get_csb_size +ffffffff81e243c0 t gfx_v9_0_get_csb_buffer +ffffffff81e24510 t gfx_v9_0_cp_jump_table_num +ffffffff81e24560 t gfx_v9_0_rlc_resume +ffffffff81e25300 t gfx_v9_0_rlc_stop +ffffffff81e257a0 t gfx_v9_0_rlc_reset +ffffffff81e25930 t gfx_v9_0_rlc_start +ffffffff81e25a70 t gfx_v9_0_update_spm_vmid +ffffffff81e25ba0 t gfx_v9_0_is_rlcg_access_range +ffffffff81e25bf0 t gfx_v9_0_init_always_on_cu_mask +ffffffff81e25f50 t gfx_v9_0_init_csb +ffffffff81e260e0 t gfx_v9_0_enable_lbpw +ffffffff81e261d0 t gfx_v9_0_enable_gui_idle_interrupt +ffffffff81e262d0 t amdgpu_bo_unreserve +ffffffff81e263b0 t gfx_v9_0_get_gpu_clock_counter +ffffffff81e26b30 t gfx_v9_0_read_wave_data +ffffffff81e26d70 t gfx_v9_0_read_wave_vgprs +ffffffff81e26d90 t gfx_v9_0_read_wave_sgprs +ffffffff81e26de0 t gfx_v9_0_select_me_pipe_q +ffffffff81e26e00 t wave_read_ind +ffffffff81e26f10 t wave_read_regs +ffffffff81e27080 t gfx_v9_0_cp_gfx_enable +ffffffff81e27160 t amdgpu_bo_reserve +ffffffff81e272d0 t gfx_v9_0_kiq_init_register +ffffffff81e27f50 t gfx_v9_0_mqd_init +ffffffff81e28490 t gfx_v9_0_update_medium_grain_clock_gating +ffffffff81e289a0 t gfx_v9_0_update_3d_clock_gating +ffffffff81e28d80 t gfx_v9_0_update_coarse_grain_clock_gating +ffffffff81e2a000 t gfx_v9_4_ras_error_inject +ffffffff81e2a130 t gfx_v9_4_query_ras_error_count +ffffffff81e2aef0 t gfx_v9_4_query_ras_error_status +ffffffff81e2b0c0 t gfx_v9_4_reset_ras_error_count +ffffffff81e2c000 T gfx_v9_4_2_do_edc_gpr_workarounds +ffffffff81e2c760 T gfx_v9_4_2_init_golden_registers +ffffffff81e2c7f0 T gfx_v9_4_2_debug_trap_config_init +ffffffff81e2c890 T gfx_v9_4_2_set_power_brake_sequence +ffffffff81e2ca60 t gfx_v9_4_2_ras_error_inject +ffffffff81e2cb90 t gfx_v9_4_2_query_ras_error_count +ffffffff81e2cc40 t gfx_v9_4_2_query_ras_error_status +ffffffff81e2d490 t gfx_v9_4_2_reset_ras_error_count +ffffffff81e2d4f0 t gfx_v9_4_2_reset_ras_error_status +ffffffff81e2d9b0 t gfx_v9_4_2_enable_watchdog_timer +ffffffff81e2dbd0 t gfx_v9_4_2_query_uctl2_poison_status +ffffffff81e2dc50 t gfx_v9_4_2_run_shader +ffffffff81e2dfd0 t gfx_v9_4_2_wait_for_waves_assigned +ffffffff81e2e610 t gfx_v9_4_2_query_sram_edc_count +ffffffff81e2e960 t gfx_v9_4_2_query_utc_edc_count +ffffffff81e2eb40 t wave_read_ind +ffffffff81e2f000 t gfxhub_v1_0_get_mc_fb_offset +ffffffff81e2f090 t gfxhub_v1_0_setup_vm_pt_regs +ffffffff81e2f1d0 t gfxhub_v1_0_gart_enable +ffffffff81e306c0 t gfxhub_v1_0_gart_disable +ffffffff81e30950 t gfxhub_v1_0_set_fault_enable_default +ffffffff81e30a40 t gfxhub_v1_0_init +ffffffff81e31000 T gfxhub_v1_1_get_xgmi_info +ffffffff81e32000 t gfxhub_v2_0_get_fb_location +ffffffff81e32090 t gfxhub_v2_0_get_mc_fb_offset +ffffffff81e32120 t gfxhub_v2_0_setup_vm_pt_regs +ffffffff81e32260 t gfxhub_v2_0_gart_enable +ffffffff81e33460 t gfxhub_v2_0_gart_disable +ffffffff81e336a0 t gfxhub_v2_0_set_fault_enable_default +ffffffff81e33790 t gfxhub_v2_0_init +ffffffff81e33860 t gfxhub_v2_0_print_l2_protection_fault_status +ffffffff81e33a30 t gfxhub_v2_0_get_invalidate_req +ffffffff81e34000 t gfxhub_v2_1_get_fb_location +ffffffff81e34090 t gfxhub_v2_1_get_mc_fb_offset +ffffffff81e34120 t gfxhub_v2_1_setup_vm_pt_regs +ffffffff81e34260 t gfxhub_v2_1_gart_enable +ffffffff81e35540 t gfxhub_v2_1_gart_disable +ffffffff81e357c0 t gfxhub_v2_1_set_fault_enable_default +ffffffff81e358d0 t gfxhub_v2_1_init +ffffffff81e359a0 t gfxhub_v2_1_get_xgmi_info +ffffffff81e35ad0 t gfxhub_v2_1_utcl2_harvest +ffffffff81e35cb0 t gfxhub_v2_1_save_regs +ffffffff81e366e0 t gfxhub_v2_1_restore_regs +ffffffff81e372c0 t gfxhub_v2_1_halt +ffffffff81e37680 t gfxhub_v2_1_print_l2_protection_fault_status +ffffffff81e37850 t gfxhub_v2_1_get_invalidate_req +ffffffff81e38000 t gfxhub_v3_0_get_fb_location +ffffffff81e38090 t gfxhub_v3_0_get_mc_fb_offset +ffffffff81e38120 t gfxhub_v3_0_setup_vm_pt_regs +ffffffff81e38260 t gfxhub_v3_0_gart_enable +ffffffff81e394e0 t gfxhub_v3_0_gart_disable +ffffffff81e39760 t gfxhub_v3_0_set_fault_enable_default +ffffffff81e39b00 t gfxhub_v3_0_init +ffffffff81e39bd0 t gfxhub_v3_0_print_l2_protection_fault_status +ffffffff81e39da0 t gfxhub_v3_0_get_invalidate_req +ffffffff81e3a000 t gfxhub_v3_0_3_get_fb_location +ffffffff81e3a090 t gfxhub_v3_0_3_get_mc_fb_offset +ffffffff81e3a120 t gfxhub_v3_0_3_setup_vm_pt_regs +ffffffff81e3a260 t gfxhub_v3_0_3_gart_enable +ffffffff81e3b4f0 t gfxhub_v3_0_3_gart_disable +ffffffff81e3b790 t gfxhub_v3_0_3_set_fault_enable_default +ffffffff81e3b8a0 t gfxhub_v3_0_3_init +ffffffff81e3b970 t gfxhub_v3_0_3_print_l2_protection_fault_status +ffffffff81e3bb40 t gfxhub_v3_0_3_get_invalidate_req +ffffffff81e3c000 t gmc_v10_0_early_init +ffffffff81e3c1f0 t gmc_v10_0_late_init +ffffffff81e3c260 t gmc_v10_0_sw_init +ffffffff81e3c680 t gmc_v10_0_sw_fini +ffffffff81e3c6d0 t gmc_v10_0_hw_init +ffffffff81e3c890 t gmc_v10_0_hw_fini +ffffffff81e3c920 t gmc_v10_0_suspend +ffffffff81e3c9b0 t gmc_v10_0_resume +ffffffff81e3ca10 t gmc_v10_0_is_idle +ffffffff81e3ca40 t gmc_v10_0_wait_for_idle +ffffffff81e3ca70 t gmc_v10_0_soft_reset +ffffffff81e3caa0 t gmc_v10_0_set_clockgating_state +ffffffff81e3cb50 t gmc_v10_0_set_powergating_state +ffffffff81e3cb80 t gmc_v10_0_get_clockgating_state +ffffffff81e3cc20 t gmc_v10_0_flush_gpu_tlb +ffffffff81e3ced0 t gmc_v10_0_flush_gpu_tlb_pasid +ffffffff81e3d0f0 t gmc_v10_0_emit_flush_gpu_tlb +ffffffff81e3d2a0 t gmc_v10_0_emit_pasid_mapping +ffffffff81e3d310 t gmc_v10_0_map_mtype +ffffffff81e3d360 t gmc_v10_0_get_vm_pde +ffffffff81e3d450 t gmc_v10_0_get_vm_pte +ffffffff81e3d500 t gmc_v10_0_get_vbios_fb_size +ffffffff81e3d670 t gmc_v10_0_flush_vm_hub +ffffffff81e3dad0 t gmc_v10_0_vm_fault_interrupt_state +ffffffff81e3db40 t gmc_v10_0_process_interrupt +ffffffff81e3de00 t gmc_v10_0_ecc_interrupt_state +ffffffff81e3e000 t gmc_v11_0_early_init +ffffffff81e3e230 t gmc_v11_0_late_init +ffffffff81e3e2a0 t gmc_v11_0_sw_init +ffffffff81e3e5c0 t gmc_v11_0_sw_fini +ffffffff81e3e610 t gmc_v11_0_hw_init +ffffffff81e3e750 t gmc_v11_0_hw_fini +ffffffff81e3e7d0 t gmc_v11_0_suspend +ffffffff81e3e850 t gmc_v11_0_resume +ffffffff81e3e8b0 t gmc_v11_0_is_idle +ffffffff81e3e8e0 t gmc_v11_0_wait_for_idle +ffffffff81e3e910 t gmc_v11_0_soft_reset +ffffffff81e3e940 t gmc_v11_0_set_clockgating_state +ffffffff81e3e9c0 t gmc_v11_0_set_powergating_state +ffffffff81e3e9f0 t gmc_v11_0_get_clockgating_state +ffffffff81e3ea30 t gmc_v11_0_flush_gpu_tlb +ffffffff81e3ef00 t gmc_v11_0_flush_gpu_tlb_pasid +ffffffff81e3f0f0 t gmc_v11_0_emit_flush_gpu_tlb +ffffffff81e3f2a0 t gmc_v11_0_emit_pasid_mapping +ffffffff81e3f310 t gmc_v11_0_map_mtype +ffffffff81e3f360 t gmc_v11_0_get_vm_pde +ffffffff81e3f460 t gmc_v11_0_get_vm_pte +ffffffff81e3f510 t gmc_v11_0_get_vbios_fb_size +ffffffff81e3f680 t gmc_v11_0_vm_fault_interrupt_state +ffffffff81e3f6f0 t gmc_v11_0_process_interrupt +ffffffff81e3f910 t gmc_v11_0_ecc_interrupt_state +ffffffff81e40000 t gmc_v7_0_early_init +ffffffff81e40090 t gmc_v7_0_late_init +ffffffff81e400e0 t gmc_v7_0_sw_init +ffffffff81e405e0 t gmc_v7_0_sw_fini +ffffffff81e40690 t gmc_v7_0_hw_init +ffffffff81e41030 t gmc_v7_0_hw_fini +ffffffff81e410f0 t gmc_v7_0_suspend +ffffffff81e41130 t gmc_v7_0_resume +ffffffff81e41190 t gmc_v7_0_is_idle +ffffffff81e411e0 t gmc_v7_0_wait_for_idle +ffffffff81e41280 t gmc_v7_0_soft_reset +ffffffff81e414e0 t gmc_v7_0_set_clockgating_state +ffffffff81e41740 t gmc_v7_0_set_powergating_state +ffffffff81e41770 t gmc_v7_0_flush_gpu_tlb +ffffffff81e417a0 t gmc_v7_0_flush_gpu_tlb_pasid +ffffffff81e41860 t gmc_v7_0_emit_flush_gpu_tlb +ffffffff81e418f0 t gmc_v7_0_emit_pasid_mapping +ffffffff81e41920 t gmc_v7_0_set_prt +ffffffff81e41ad0 t gmc_v7_0_get_vm_pde +ffffffff81e41b30 t gmc_v7_0_get_vm_pte +ffffffff81e41b70 t gmc_v7_0_get_vbios_fb_size +ffffffff81e41be0 t gmc_v7_0_vm_fault_interrupt_state +ffffffff81e41cb0 t gmc_v7_0_process_interrupt +ffffffff81e42000 t gmc_v8_0_early_init +ffffffff81e42090 t gmc_v8_0_late_init +ffffffff81e420e0 t gmc_v8_0_sw_init +ffffffff81e42760 t gmc_v8_0_sw_fini +ffffffff81e42810 t gmc_v8_0_hw_init +ffffffff81e434b0 t gmc_v8_0_hw_fini +ffffffff81e43570 t gmc_v8_0_suspend +ffffffff81e435b0 t gmc_v8_0_resume +ffffffff81e43610 t gmc_v8_0_is_idle +ffffffff81e43660 t gmc_v8_0_wait_for_idle +ffffffff81e43700 t gmc_v8_0_check_soft_reset +ffffffff81e43770 t gmc_v8_0_pre_soft_reset +ffffffff81e438e0 t gmc_v8_0_soft_reset +ffffffff81e439b0 t gmc_v8_0_post_soft_reset +ffffffff81e43a20 t gmc_v8_0_set_clockgating_state +ffffffff81e43fe0 t gmc_v8_0_set_powergating_state +ffffffff81e44010 t gmc_v8_0_get_clockgating_state +ffffffff81e44080 t gmc_v8_0_flush_gpu_tlb +ffffffff81e440b0 t gmc_v8_0_flush_gpu_tlb_pasid +ffffffff81e44170 t gmc_v8_0_emit_flush_gpu_tlb +ffffffff81e44200 t gmc_v8_0_emit_pasid_mapping +ffffffff81e44230 t gmc_v8_0_set_prt +ffffffff81e443e0 t gmc_v8_0_get_vm_pde +ffffffff81e44440 t gmc_v8_0_get_vm_pte +ffffffff81e44490 t gmc_v8_0_get_vbios_fb_size +ffffffff81e44500 t gmc_v8_0_vm_fault_interrupt_state +ffffffff81e445d0 t gmc_v8_0_process_interrupt +ffffffff81e45000 T gmc_v9_0_restore_registers +ffffffff81e45150 t gmc_v9_0_early_init +ffffffff81e45500 t gmc_v9_0_late_init +ffffffff81e45610 t gmc_v9_0_sw_init +ffffffff81e45cc0 t gmc_v9_0_sw_fini +ffffffff81e45d30 t gmc_v9_0_hw_init +ffffffff81e46130 t gmc_v9_0_hw_fini +ffffffff81e461e0 t gmc_v9_0_suspend +ffffffff81e46290 t gmc_v9_0_resume +ffffffff81e462f0 t gmc_v9_0_is_idle +ffffffff81e46320 t gmc_v9_0_wait_for_idle +ffffffff81e46350 t gmc_v9_0_soft_reset +ffffffff81e46380 t gmc_v9_0_set_clockgating_state +ffffffff81e463e0 t gmc_v9_0_set_powergating_state +ffffffff81e46410 t gmc_v9_0_get_clockgating_state +ffffffff81e46450 t gmc_v9_0_flush_gpu_tlb +ffffffff81e46a90 t gmc_v9_0_flush_gpu_tlb_pasid +ffffffff81e46d60 t gmc_v9_0_emit_flush_gpu_tlb +ffffffff81e46f30 t gmc_v9_0_emit_pasid_mapping +ffffffff81e46fa0 t gmc_v9_0_map_mtype +ffffffff81e46fe0 t gmc_v9_0_get_vm_pde +ffffffff81e470e0 t gmc_v9_0_get_vm_pte +ffffffff81e471b0 t gmc_v9_0_get_vbios_fb_size +ffffffff81e47340 t gmc_v9_0_vm_fault_interrupt_state +ffffffff81e476c0 t gmc_v9_0_process_interrupt +ffffffff81e47ce0 t gmc_v9_0_ecc_interrupt_state +ffffffff81e48000 t hdp_v4_0_query_ras_error_count +ffffffff81e480c0 t hdp_v4_0_reset_ras_error_count +ffffffff81e481e0 t hdp_v4_0_flush_hdp +ffffffff81e48230 t hdp_v4_0_invalidate_hdp +ffffffff81e48300 t hdp_v4_0_update_clock_gating +ffffffff81e48400 t hdp_v4_0_get_clockgating_state +ffffffff81e48450 t hdp_v4_0_init_registers +ffffffff81e49000 t hdp_v5_0_flush_hdp +ffffffff81e49050 t hdp_v5_0_invalidate_hdp +ffffffff81e490f0 t hdp_v5_0_update_clock_gating +ffffffff81e494e0 t hdp_v5_0_get_clockgating_state +ffffffff81e49600 t hdp_v5_0_init_registers +ffffffff81e4a000 t hdp_v5_2_flush_hdp +ffffffff81e4a050 t hdp_v5_2_update_clock_gating +ffffffff81e4a440 t hdp_v5_2_get_clockgating_state +ffffffff81e4b000 t hdp_v6_0_flush_hdp +ffffffff81e4b050 t hdp_v6_0_update_clock_gating +ffffffff81e4b360 t hdp_v6_0_get_clockgating_state +ffffffff81e4c000 t iceland_ih_early_init +ffffffff81e4c050 t iceland_ih_sw_init +ffffffff81e4c0b0 t iceland_ih_sw_fini +ffffffff81e4c0f0 t iceland_ih_hw_init +ffffffff81e4c320 t iceland_ih_hw_fini +ffffffff81e4c3f0 t iceland_ih_suspend +ffffffff81e4c4c0 t iceland_ih_resume +ffffffff81e4c500 t iceland_ih_is_idle +ffffffff81e4c550 t iceland_ih_wait_for_idle +ffffffff81e4c5f0 t iceland_ih_soft_reset +ffffffff81e4c6d0 t iceland_ih_set_clockgating_state +ffffffff81e4c700 t iceland_ih_set_powergating_state +ffffffff81e4c730 t iceland_ih_get_wptr +ffffffff81e4c820 t iceland_ih_decode_iv +ffffffff81e4c8a0 t iceland_ih_set_rptr +ffffffff81e4d000 t ih_v6_0_early_init +ffffffff81e4d050 t ih_v6_0_sw_init +ffffffff81e4d1b0 t ih_v6_0_sw_fini +ffffffff81e4d1f0 t ih_v6_0_hw_init +ffffffff81e4d7a0 t ih_v6_0_hw_fini +ffffffff81e4d800 t ih_v6_0_suspend +ffffffff81e4d860 t ih_v6_0_resume +ffffffff81e4d870 t ih_v6_0_is_idle +ffffffff81e4d8a0 t ih_v6_0_wait_for_idle +ffffffff81e4d8d0 t ih_v6_0_soft_reset +ffffffff81e4d900 t ih_v6_0_set_clockgating_state +ffffffff81e4da20 t ih_v6_0_set_powergating_state +ffffffff81e4db90 t ih_v6_0_get_clockgating_state +ffffffff81e4dc20 t ih_v6_0_get_wptr +ffffffff81e4dd10 t ih_v6_0_set_rptr +ffffffff81e4dde0 t ih_v6_0_self_irq +ffffffff81e4de50 t ih_v6_0_toggle_interrupts +ffffffff81e4e030 t force_update_wptr_for_self_int +ffffffff81e4f000 t imu_v11_0_init_microcode +ffffffff81e4f1f0 t imu_v11_0_load_microcode +ffffffff81e4f550 t imu_v11_0_setup +ffffffff81e4f7d0 t imu_v11_0_start +ffffffff81e4f8c0 t imu_v11_0_program_rlc_ram +ffffffff81e4fa70 t imu_v11_0_wait_for_reset_status +ffffffff81e4fbc0 t program_imu_rlc_ram +ffffffff81e50000 T imu_v11_0_3_program_rlc_ram +ffffffff81e51000 T jpeg_v1_0_early_init +ffffffff81e51060 T jpeg_v1_0_sw_init +ffffffff81e51130 T jpeg_v1_0_sw_fini +ffffffff81e51150 T jpeg_v1_0_start +ffffffff81e51bc0 t jpeg_v1_0_decode_ring_get_rptr +ffffffff81e51c50 t jpeg_v1_0_decode_ring_get_wptr +ffffffff81e51ce0 t jpeg_v1_0_decode_ring_set_wptr +ffffffff81e51d50 t jpeg_v1_0_decode_ring_emit_ib +ffffffff81e52660 t jpeg_v1_0_decode_ring_emit_fence +ffffffff81e52fc0 t jpeg_v1_0_decode_ring_emit_vm_flush +ffffffff81e53030 t jpeg_v1_0_decode_ring_nop +ffffffff81e53190 t jpeg_v1_0_decode_ring_insert_start +ffffffff81e53360 t jpeg_v1_0_decode_ring_insert_end +ffffffff81e53530 t jpeg_v1_0_ring_begin_use +ffffffff81e53630 t jpeg_v1_0_decode_ring_emit_wreg +ffffffff81e53890 t jpeg_v1_0_decode_ring_emit_reg_wait +ffffffff81e53cb0 t jpeg_v1_0_set_interrupt_state +ffffffff81e53ce0 t jpeg_v1_0_process_interrupt +ffffffff81e54000 T jpeg_v2_0_dec_ring_insert_start +ffffffff81e541b0 T jpeg_v2_0_dec_ring_insert_end +ffffffff81e54360 T jpeg_v2_0_dec_ring_emit_fence +ffffffff81e54a50 T jpeg_v2_0_dec_ring_emit_ib +ffffffff81e55240 T jpeg_v2_0_dec_ring_emit_reg_wait +ffffffff81e55600 T jpeg_v2_0_dec_ring_emit_vm_flush +ffffffff81e55670 T jpeg_v2_0_dec_ring_emit_wreg +ffffffff81e558b0 T jpeg_v2_0_dec_ring_nop +ffffffff81e55a10 t jpeg_v2_0_early_init +ffffffff81e55a80 t jpeg_v2_0_sw_init +ffffffff81e55b90 t jpeg_v2_0_sw_fini +ffffffff81e55be0 t jpeg_v2_0_hw_init +ffffffff81e55c60 t jpeg_v2_0_hw_fini +ffffffff81e55d40 t jpeg_v2_0_suspend +ffffffff81e55d70 t jpeg_v2_0_resume +ffffffff81e55e00 t jpeg_v2_0_is_idle +ffffffff81e55e80 t jpeg_v2_0_wait_for_idle +ffffffff81e55f70 t jpeg_v2_0_set_clockgating_state +ffffffff81e56020 t jpeg_v2_0_set_powergating_state +ffffffff81e56820 t jpeg_v2_0_dec_ring_get_rptr +ffffffff81e568b0 t jpeg_v2_0_dec_ring_get_wptr +ffffffff81e56950 t jpeg_v2_0_dec_ring_set_wptr +ffffffff81e569f0 t jpeg_v2_0_set_interrupt_state +ffffffff81e56a20 t jpeg_v2_0_process_interrupt +ffffffff81e56ab0 t jpeg_v2_0_enable_clock_gating +ffffffff81e56c50 t jpeg_v2_0_disable_clock_gating +ffffffff81e57000 t jpeg_v2_6_query_ras_poison_status +ffffffff81e57140 t jpeg_v2_5_early_init +ffffffff81e57410 t jpeg_v2_5_sw_init +ffffffff81e57630 t jpeg_v2_5_sw_fini +ffffffff81e57680 t jpeg_v2_5_hw_init +ffffffff81e57770 t jpeg_v2_5_hw_fini +ffffffff81e578b0 t jpeg_v2_5_suspend +ffffffff81e578e0 t jpeg_v2_5_resume +ffffffff81e579e0 t jpeg_v2_5_is_idle +ffffffff81e57ae0 t jpeg_v2_5_wait_for_idle +ffffffff81e57c10 t jpeg_v2_5_set_clockgating_state +ffffffff81e57d80 t jpeg_v2_5_set_powergating_state +ffffffff81e58470 t jpeg_v2_5_dec_ring_get_rptr +ffffffff81e58510 t jpeg_v2_5_dec_ring_get_wptr +ffffffff81e585c0 t jpeg_v2_5_dec_ring_set_wptr +ffffffff81e58670 t jpeg_v2_6_dec_ring_insert_start +ffffffff81e58830 t jpeg_v2_6_dec_ring_insert_end +ffffffff81e589f0 t jpeg_v2_5_set_interrupt_state +ffffffff81e58a20 t jpeg_v2_5_process_interrupt +ffffffff81e58b00 t jpeg_v2_5_enable_clock_gating +ffffffff81e58bd0 t jpeg_v2_5_disable_clock_gating +ffffffff81e59000 t jpeg_v3_0_early_init +ffffffff81e590f0 t jpeg_v3_0_sw_init +ffffffff81e59200 t jpeg_v3_0_sw_fini +ffffffff81e59250 t jpeg_v3_0_hw_init +ffffffff81e592d0 t jpeg_v3_0_hw_fini +ffffffff81e593b0 t jpeg_v3_0_suspend +ffffffff81e593e0 t jpeg_v3_0_resume +ffffffff81e59470 t jpeg_v3_0_is_idle +ffffffff81e594f0 t jpeg_v3_0_wait_for_idle +ffffffff81e595e0 t jpeg_v3_0_set_clockgating_state +ffffffff81e59690 t jpeg_v3_0_set_powergating_state +ffffffff81e59f40 t jpeg_v3_0_dec_ring_get_rptr +ffffffff81e59fd0 t jpeg_v3_0_dec_ring_get_wptr +ffffffff81e5a070 t jpeg_v3_0_dec_ring_set_wptr +ffffffff81e5a110 t jpeg_v3_0_set_interrupt_state +ffffffff81e5a140 t jpeg_v3_0_process_interrupt +ffffffff81e5a1d0 t jpeg_v3_0_enable_clock_gating +ffffffff81e5a2a0 t jpeg_v3_0_disable_clock_gating +ffffffff81e5b000 t jpeg_v4_0_early_init +ffffffff81e5b080 t jpeg_v4_0_sw_init +ffffffff81e5b190 t jpeg_v4_0_sw_fini +ffffffff81e5b1e0 t jpeg_v4_0_hw_init +ffffffff81e5b300 t jpeg_v4_0_hw_fini +ffffffff81e5b3e0 t jpeg_v4_0_suspend +ffffffff81e5b410 t jpeg_v4_0_resume +ffffffff81e5b460 t jpeg_v4_0_is_idle +ffffffff81e5b4e0 t jpeg_v4_0_wait_for_idle +ffffffff81e5b5d0 t jpeg_v4_0_set_clockgating_state +ffffffff81e5b680 t jpeg_v4_0_set_powergating_state +ffffffff81e5be90 t jpeg_v4_0_dec_ring_get_rptr +ffffffff81e5bf20 t jpeg_v4_0_dec_ring_get_wptr +ffffffff81e5bfc0 t jpeg_v4_0_dec_ring_set_wptr +ffffffff81e5c060 t jpeg_v4_0_set_interrupt_state +ffffffff81e5c090 t jpeg_v4_0_process_interrupt +ffffffff81e5c130 t jpeg_v4_0_enable_clock_gating +ffffffff81e5c2e0 t jpeg_v4_0_disable_clock_gating +ffffffff81e5d000 t lsdma_v6_0_copy_mem +ffffffff81e5d350 t lsdma_v6_0_fill_mem +ffffffff81e5d630 t lsdma_v6_0_update_memory_power_gating +ffffffff81e5e000 t mca_v3_0_mp0_query_ras_error_count +ffffffff81e5e020 t mca_v3_0_ras_block_match +ffffffff81e5e070 t mca_v3_0_mp1_query_ras_error_count +ffffffff81e5e090 t mca_v3_0_mpio_query_ras_error_count +ffffffff81e5e0b0 t mca_v3_0_init +ffffffff81e5f000 t mes_v10_0_early_init +ffffffff81e5f060 t mes_v10_0_late_init +ffffffff81e5f0b0 t mes_v10_1_sw_init +ffffffff81e5f580 t mes_v10_1_sw_fini +ffffffff81e5f6b0 t mes_v10_1_hw_init +ffffffff81e5ff50 t mes_v10_1_hw_fini +ffffffff81e60010 t mes_v10_1_suspend +ffffffff81e600f0 t mes_v10_1_resume +ffffffff81e60140 t mes_v10_1_kiq_hw_init +ffffffff81e60550 t mes_v10_1_add_hw_queue +ffffffff81e606d0 t mes_v10_1_remove_hw_queue +ffffffff81e60760 t mes_v10_1_unmap_legacy_queue +ffffffff81e60850 t mes_v10_1_suspend_gang +ffffffff81e60880 t mes_v10_1_resume_gang +ffffffff81e608b0 t mes_v10_1_submit_pkt_and_poll_completion +ffffffff81e60ab0 t mes_v10_1_load_microcode +ffffffff81e61290 t mes_v10_1_enable +ffffffff81e61700 t mes_v10_1_queue_init +ffffffff81e619a0 t amdgpu_bo_unreserve +ffffffff81e61a80 t mes_v10_1_ring_get_rptr +ffffffff81e61ab0 t mes_v10_1_ring_get_wptr +ffffffff81e61b20 t mes_v10_1_ring_set_wptr +ffffffff81e62000 t mes_v11_0_early_init +ffffffff81e62060 t mes_v11_0_late_init +ffffffff81e620d0 t mes_v11_0_sw_init +ffffffff81e625b0 t mes_v11_0_sw_fini +ffffffff81e62750 t mes_v11_0_hw_init +ffffffff81e62f60 t mes_v11_0_hw_fini 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mmhub_v2_0_gart_enable +ffffffff81e6d250 t mmhub_v2_0_set_fault_enable_default +ffffffff81e6d360 t mmhub_v2_0_gart_disable +ffffffff81e6d5e0 t mmhub_v2_0_set_clockgating +ffffffff81e6d920 t mmhub_v2_0_get_clockgating +ffffffff81e6dab0 t mmhub_v2_0_setup_vm_pt_regs +ffffffff81e6dbf0 t mmhub_v2_0_print_l2_protection_fault_status +ffffffff81e6de40 t mmhub_v2_0_get_invalidate_req +ffffffff81e6e000 t mmhub_v2_3_init +ffffffff81e6e0e0 t mmhub_v2_3_gart_enable +ffffffff81e6f470 t mmhub_v2_3_set_fault_enable_default +ffffffff81e6f570 t mmhub_v2_3_gart_disable +ffffffff81e6f800 t mmhub_v2_3_set_clockgating +ffffffff81e6fc80 t mmhub_v2_3_get_clockgating +ffffffff81e6fe70 t mmhub_v2_3_setup_vm_pt_regs +ffffffff81e6ffb0 t mmhub_v2_3_print_l2_protection_fault_status +ffffffff81e701c0 t mmhub_v2_3_get_invalidate_req +ffffffff81e71000 t mmhub_v3_0_get_fb_location +ffffffff81e71090 t mmhub_v3_0_get_mc_fb_offset +ffffffff81e71120 t mmhub_v3_0_init +ffffffff81e711f0 t mmhub_v3_0_gart_enable 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mmhub_v3_0_2_get_mc_fb_offset +ffffffff81e75120 t mmhub_v3_0_2_init +ffffffff81e751f0 t mmhub_v3_0_2_gart_enable +ffffffff81e76370 t mmhub_v3_0_2_set_fault_enable_default +ffffffff81e76480 t mmhub_v3_0_2_gart_disable +ffffffff81e76700 t mmhub_v3_0_2_set_clockgating +ffffffff81e76730 t mmhub_v3_0_2_get_clockgating +ffffffff81e76760 t mmhub_v3_0_2_setup_vm_pt_regs +ffffffff81e768a0 t mmhub_v3_0_2_print_l2_protection_fault_status +ffffffff81e76a80 t mmhub_v3_0_2_get_invalidate_req +ffffffff81e77000 t mmhub_v9_4_query_ras_error_count +ffffffff81e77150 t mmhub_v9_4_query_ras_error_status +ffffffff81e77230 t mmhub_v9_4_reset_ras_error_count +ffffffff81e77300 t mmhub_v9_4_get_fb_location +ffffffff81e77410 t mmhub_v9_4_init +ffffffff81e77560 t mmhub_v9_4_gart_enable +ffffffff81e789f0 t mmhub_v9_4_set_fault_enable_default +ffffffff81e78bd0 t mmhub_v9_4_gart_disable +ffffffff81e78f30 t mmhub_v9_4_set_clockgating +ffffffff81e793f0 t mmhub_v9_4_get_clockgating +ffffffff81e79520 t mmhub_v9_4_setup_vm_pt_regs +ffffffff81e79570 t mmhub_v9_4_setup_hubid_vm_pt_regs +ffffffff81e7a000 T xgpu_ai_mailbox_set_irq_funcs +ffffffff81e7a050 T xgpu_ai_mailbox_add_irq_id +ffffffff81e7a0e0 T xgpu_ai_mailbox_get_irq +ffffffff81e7a190 t xgpu_ai_mailbox_flr_work +ffffffff81e7a3a0 T xgpu_ai_mailbox_put_irq +ffffffff81e7a3e0 t xgpu_ai_request_full_gpu_access +ffffffff81e7a400 t xgpu_ai_release_full_gpu_access +ffffffff81e7a420 t xgpu_ai_request_init_data +ffffffff81e7a480 t xgpu_ai_request_reset +ffffffff81e7a530 t xgpu_ai_mailbox_trans_msg +ffffffff81e7a760 t xgpu_ai_set_mailbox_ack_irq +ffffffff81e7a7f0 t xgpu_ai_mailbox_ack_irq +ffffffff81e7a840 t xgpu_ai_set_mailbox_rcv_irq +ffffffff81e7a8d0 t xgpu_ai_mailbox_rcv_irq +ffffffff81e7a9b0 t xgpu_ai_send_access_requests +ffffffff81e7aaa0 t xgpu_ai_poll_msg +ffffffff81e7b000 T xgpu_nv_mailbox_set_irq_funcs +ffffffff81e7b050 T xgpu_nv_mailbox_add_irq_id +ffffffff81e7b0e0 T xgpu_nv_mailbox_get_irq +ffffffff81e7b190 t xgpu_nv_mailbox_flr_work +ffffffff81e7b3b0 T xgpu_nv_mailbox_put_irq +ffffffff81e7b3f0 t xgpu_nv_request_full_gpu_access +ffffffff81e7b410 t xgpu_nv_release_full_gpu_access +ffffffff81e7b430 t xgpu_nv_request_init_data +ffffffff81e7b450 t xgpu_nv_request_reset +ffffffff81e7b550 t xgpu_nv_mailbox_trans_msg +ffffffff81e7b6f0 t xgpu_nv_set_mailbox_ack_irq +ffffffff81e7b770 t xgpu_nv_mailbox_ack_irq +ffffffff81e7b7c0 t xgpu_nv_set_mailbox_rcv_irq +ffffffff81e7b840 t xgpu_nv_mailbox_rcv_irq +ffffffff81e7b8f0 t xgpu_nv_send_access_requests +ffffffff81e7c000 T xgpu_vi_init_golden_registers +ffffffff81e7c0c0 T xgpu_vi_mailbox_set_irq_funcs +ffffffff81e7c110 T xgpu_vi_mailbox_add_irq_id +ffffffff81e7c1a0 T xgpu_vi_mailbox_get_irq +ffffffff81e7c250 t xgpu_vi_mailbox_flr_work +ffffffff81e7c3a0 T xgpu_vi_mailbox_put_irq +ffffffff81e7c3e0 t xgpu_vi_request_full_gpu_access +ffffffff81e7c400 t xgpu_vi_release_full_gpu_access +ffffffff81e7c420 t xgpu_vi_request_reset +ffffffff81e7c440 t xgpu_vi_wait_reset_cmpl +ffffffff81e7c520 t xgpu_vi_set_mailbox_ack_irq +ffffffff81e7c5a0 t xgpu_vi_mailbox_ack_irq +ffffffff81e7c5f0 t xgpu_vi_set_mailbox_rcv_irq +ffffffff81e7c670 t xgpu_vi_mailbox_rcv_irq +ffffffff81e7c720 t xgpu_vi_mailbox_rcv_msg +ffffffff81e7c840 t xgpu_vi_send_access_requests +ffffffff81e7d000 t navi10_ih_early_init +ffffffff81e7d060 t navi10_ih_sw_init +ffffffff81e7d1d0 t navi10_ih_sw_fini +ffffffff81e7d210 t navi10_ih_hw_init +ffffffff81e7d640 t navi10_ih_hw_fini +ffffffff81e7d6a0 t navi10_ih_suspend +ffffffff81e7d700 t navi10_ih_resume +ffffffff81e7d710 t navi10_ih_is_idle +ffffffff81e7d740 t navi10_ih_wait_for_idle +ffffffff81e7d770 t navi10_ih_soft_reset +ffffffff81e7d7a0 t navi10_ih_set_clockgating_state +ffffffff81e7d8c0 t navi10_ih_set_powergating_state +ffffffff81e7d8f0 t navi10_ih_get_clockgating_state +ffffffff81e7d980 t navi10_ih_get_wptr +ffffffff81e7da90 t navi10_ih_set_rptr +ffffffff81e7db60 t navi10_ih_self_irq +ffffffff81e7dbe0 t navi10_ih_toggle_interrupts +ffffffff81e7dd70 t force_update_wptr_for_self_int +ffffffff81e7f000 t nbio_v2_3_get_hdp_flush_req_offset +ffffffff81e7f040 t nbio_v2_3_get_hdp_flush_done_offset +ffffffff81e7f080 t nbio_v2_3_get_pcie_index_offset +ffffffff81e7f0c0 t nbio_v2_3_get_pcie_data_offset +ffffffff81e7f100 t nbio_v2_3_get_rev_id +ffffffff81e7f160 t nbio_v2_3_mc_access_enable +ffffffff81e7f210 t nbio_v2_3_get_memsize +ffffffff81e7f280 t nbio_v2_3_sdma_doorbell_range +ffffffff81e7f320 t nbio_v2_3_vcn_doorbell_range +ffffffff81e7f3a0 t nbio_v2_3_enable_doorbell_aperture +ffffffff81e7f490 t nbio_v2_3_enable_doorbell_selfring_aperture +ffffffff81e7f5f0 t nbio_v2_3_ih_doorbell_range +ffffffff81e7f700 t nbio_v2_3_update_medium_grain_clock_gating +ffffffff81e7f7a0 t nbio_v2_3_update_medium_grain_light_sleep +ffffffff81e7f840 t nbio_v2_3_get_clockgating_state +ffffffff81e7f8c0 t nbio_v2_3_ih_control +ffffffff81e7fa10 t nbio_v2_3_init_registers +ffffffff81e7faa0 t nbio_v2_3_remap_hdp_registers +ffffffff81e7fbb0 t nbio_v2_3_enable_aspm +ffffffff81e7fc50 t nbio_v2_3_program_aspm +ffffffff81e802e0 t nbio_v2_3_apply_lc_spc_mode_wa +ffffffff81e80370 t nbio_v2_3_apply_l1_link_width_reconfig_wa +ffffffff81e803e0 t nbio_v2_3_clear_doorbell_interrupt +ffffffff81e81000 t nbio_v4_3_get_hdp_flush_req_offset +ffffffff81e81040 t nbio_v4_3_get_hdp_flush_done_offset +ffffffff81e81080 t nbio_v4_3_get_pcie_index_offset +ffffffff81e810b0 t nbio_v4_3_get_pcie_data_offset +ffffffff81e810f0 t nbio_v4_3_get_rev_id +ffffffff81e81170 t nbio_v4_3_mc_access_enable +ffffffff81e81220 t nbio_v4_3_get_memsize +ffffffff81e81290 t nbio_v4_3_sdma_doorbell_range +ffffffff81e81400 t nbio_v4_3_vcn_doorbell_range +ffffffff81e815b0 t nbio_v4_3_gc_doorbell_init +ffffffff81e816a0 t nbio_v4_3_enable_doorbell_aperture +ffffffff81e81790 t nbio_v4_3_enable_doorbell_selfring_aperture +ffffffff81e818f0 t nbio_v4_3_ih_doorbell_range +ffffffff81e81a10 t nbio_v4_3_update_medium_grain_clock_gating +ffffffff81e81b50 t nbio_v4_3_update_medium_grain_light_sleep +ffffffff81e81c80 t nbio_v4_3_get_clockgating_state +ffffffff81e81d90 t nbio_v4_3_ih_control +ffffffff81e81ee0 t nbio_v4_3_init_registers +ffffffff81e81ff0 t nbio_v4_3_remap_hdp_registers +ffffffff81e82100 t nbio_v4_3_program_aspm +ffffffff81e82da0 t nbio_v4_3_get_rom_offset +ffffffff81e82e30 t nbio_v4_3_sriov_sdma_doorbell_range +ffffffff81e82e60 t nbio_v4_3_sriov_vcn_doorbell_range +ffffffff81e82e90 t nbio_v4_3_sriov_gc_doorbell_init +ffffffff81e82ec0 t nbio_v4_3_sriov_ih_doorbell_range +ffffffff81e83000 t nbio_v6_1_get_hdp_flush_req_offset +ffffffff81e83040 t nbio_v6_1_get_hdp_flush_done_offset +ffffffff81e83080 t nbio_v6_1_get_pcie_index_offset +ffffffff81e830c0 t nbio_v6_1_get_pcie_data_offset +ffffffff81e83100 t nbio_v6_1_get_rev_id +ffffffff81e83180 t nbio_v6_1_mc_access_enable +ffffffff81e83230 t nbio_v6_1_get_memsize +ffffffff81e832a0 t nbio_v6_1_sdma_doorbell_range +ffffffff81e83330 t nbio_v6_1_enable_doorbell_aperture +ffffffff81e83420 t nbio_v6_1_enable_doorbell_selfring_aperture +ffffffff81e83580 t nbio_v6_1_ih_doorbell_range +ffffffff81e83690 t nbio_v6_1_update_medium_grain_clock_gating +ffffffff81e83730 t nbio_v6_1_update_medium_grain_light_sleep +ffffffff81e837d0 t nbio_v6_1_get_clockgating_state +ffffffff81e83850 t nbio_v6_1_ih_control +ffffffff81e839a0 t nbio_v6_1_init_registers +ffffffff81e83a70 t nbio_v6_1_remap_hdp_registers +ffffffff81e83b80 t nbio_v6_1_program_aspm +ffffffff81e84000 t nbio_v7_0_get_hdp_flush_req_offset +ffffffff81e84040 t nbio_v7_0_get_hdp_flush_done_offset +ffffffff81e84080 t nbio_v7_0_get_pcie_index_offset +ffffffff81e840c0 t nbio_v7_0_get_pcie_data_offset +ffffffff81e84100 t nbio_v7_0_get_rev_id +ffffffff81e84180 t nbio_v7_0_mc_access_enable +ffffffff81e84230 t nbio_v7_0_get_memsize +ffffffff81e842a0 t nbio_v7_0_sdma_doorbell_range +ffffffff81e84330 t nbio_v7_0_vcn_doorbell_range +ffffffff81e843b0 t nbio_v7_0_enable_doorbell_aperture +ffffffff81e844a0 t nbio_v7_0_enable_doorbell_selfring_aperture +ffffffff81e844d0 t nbio_v7_0_ih_doorbell_range +ffffffff81e845e0 t nbio_v7_0_update_medium_grain_clock_gating +ffffffff81e84710 t nbio_v7_0_update_medium_grain_light_sleep +ffffffff81e847b0 t nbio_v7_0_get_clockgating_state +ffffffff81e84830 t nbio_v7_0_ih_control +ffffffff81e84980 t nbio_v7_0_init_registers +ffffffff81e849d0 t nbio_v7_0_remap_hdp_registers +ffffffff81e84ae0 t nbio_7_0_read_syshub_ind_mmr +ffffffff81e84bb0 t nbio_7_0_write_syshub_ind_mmr +ffffffff81e85000 t nbio_v7_2_get_hdp_flush_req_offset +ffffffff81e85040 t nbio_v7_2_get_hdp_flush_done_offset +ffffffff81e85080 t nbio_v7_2_get_pcie_index_offset +ffffffff81e850c0 t nbio_v7_2_get_pcie_data_offset +ffffffff81e85100 t nbio_v7_2_get_pcie_port_index_offset +ffffffff81e85130 t nbio_v7_2_get_pcie_port_data_offset +ffffffff81e85170 t nbio_v7_2_get_rev_id +ffffffff81e85250 t nbio_v7_2_mc_access_enable +ffffffff81e85390 t nbio_v7_2_get_memsize +ffffffff81e85400 t nbio_v7_2_sdma_doorbell_range +ffffffff81e854a0 t nbio_v7_2_vcn_doorbell_range +ffffffff81e85520 t nbio_v7_2_enable_doorbell_aperture +ffffffff81e85600 t nbio_v7_2_enable_doorbell_selfring_aperture +ffffffff81e85760 t nbio_v7_2_ih_doorbell_range +ffffffff81e857f0 t nbio_v7_2_update_medium_grain_clock_gating +ffffffff81e858b0 t nbio_v7_2_update_medium_grain_light_sleep +ffffffff81e85a40 t nbio_v7_2_get_clockgating_state +ffffffff81e85ad0 t nbio_v7_2_ih_control +ffffffff81e85c20 t nbio_v7_2_init_registers +ffffffff81e85de0 t nbio_v7_2_remap_hdp_registers +ffffffff81e86000 t nbio_v7_4_query_ras_error_count +ffffffff81e861a0 t nbio_v7_4_handle_ras_controller_intr_no_bifring +ffffffff81e863e0 t nbio_v7_4_handle_ras_err_event_athub_intr_no_bifring +ffffffff81e86590 t nbio_v7_4_init_ras_controller_interrupt +ffffffff81e865d0 t nbio_v7_4_init_ras_err_event_athub_interrupt +ffffffff81e86610 t nbio_v7_4_get_hdp_flush_req_offset +ffffffff81e86650 t nbio_v7_4_get_hdp_flush_done_offset +ffffffff81e86690 t nbio_v7_4_get_pcie_index_offset +ffffffff81e866d0 t nbio_v7_4_get_pcie_data_offset +ffffffff81e86710 t nbio_v7_4_get_rev_id +ffffffff81e867d0 t nbio_v7_4_mc_access_enable +ffffffff81e86880 t nbio_v7_4_get_memsize +ffffffff81e868f0 t nbio_v7_4_sdma_doorbell_range +ffffffff81e869c0 t nbio_v7_4_vcn_doorbell_range +ffffffff81e86a60 t nbio_v7_4_enable_doorbell_aperture +ffffffff81e86b50 t nbio_v7_4_enable_doorbell_selfring_aperture +ffffffff81e86cb0 t nbio_v7_4_ih_doorbell_range +ffffffff81e86dc0 t nbio_v7_4_enable_doorbell_interrupt +ffffffff81e86f00 t nbio_v7_4_update_medium_grain_clock_gating +ffffffff81e86f30 t nbio_v7_4_update_medium_grain_light_sleep +ffffffff81e86fd0 t nbio_v7_4_get_clockgating_state +ffffffff81e87050 t nbio_v7_4_ih_control +ffffffff81e871a0 t nbio_v7_4_init_registers +ffffffff81e87290 t nbio_v7_4_remap_hdp_registers +ffffffff81e873a0 t nbio_v7_4_program_aspm +ffffffff81e877b0 t nbio_v7_4_set_ras_controller_irq_state +ffffffff81e87940 t nbio_v7_4_process_ras_controller_irq +ffffffff81e87970 t nbio_v7_4_set_ras_err_event_athub_irq_state +ffffffff81e87b00 t nbio_v7_4_process_err_event_athub_irq +ffffffff81e88000 t nbio_v7_7_get_hdp_flush_req_offset +ffffffff81e88040 t nbio_v7_7_get_hdp_flush_done_offset +ffffffff81e88080 t nbio_v7_7_get_pcie_index_offset +ffffffff81e880c0 t nbio_v7_7_get_pcie_data_offset +ffffffff81e88100 t nbio_v7_7_get_pcie_port_index_offset +ffffffff81e88130 t nbio_v7_7_get_pcie_port_data_offset +ffffffff81e88170 t nbio_v7_7_get_rev_id +ffffffff81e881f0 t nbio_v7_7_mc_access_enable +ffffffff81e882a0 t nbio_v7_7_get_memsize +ffffffff81e88310 t nbio_v7_7_sdma_doorbell_range +ffffffff81e883a0 t nbio_v7_7_vcn_doorbell_range +ffffffff81e88420 t nbio_v7_7_enable_doorbell_aperture +ffffffff81e88500 t nbio_v7_7_enable_doorbell_selfring_aperture +ffffffff81e88660 t nbio_v7_7_ih_doorbell_range +ffffffff81e88770 t nbio_v7_7_update_medium_grain_clock_gating +ffffffff81e888b0 t nbio_v7_7_update_medium_grain_light_sleep +ffffffff81e88ac0 t nbio_v7_7_get_clockgating_state +ffffffff81e88bd0 t nbio_v7_7_ih_control +ffffffff81e88d20 t nbio_v7_7_init_registers +ffffffff81e88e20 t nbio_v7_7_remap_hdp_registers +ffffffff81e89000 T nv_grbm_select +ffffffff81e890a0 T nv_set_virt_ops +ffffffff81e890e0 t nv_common_early_init +ffffffff81e894d0 t nv_common_late_init +ffffffff81e89540 t nv_common_sw_init +ffffffff81e89580 t nv_common_sw_fini +ffffffff81e895b0 t nv_common_hw_init +ffffffff81e896c0 t nv_common_hw_fini +ffffffff81e89720 t nv_common_suspend +ffffffff81e89780 t nv_common_resume +ffffffff81e897c0 t nv_common_is_idle +ffffffff81e897f0 t nv_common_wait_for_idle +ffffffff81e89820 t nv_common_soft_reset +ffffffff81e89850 t nv_common_set_clockgating_state +ffffffff81e89920 t nv_common_set_powergating_state +ffffffff81e89950 t nv_common_get_clockgating_state +ffffffff81e899c0 t nv_pcie_rreg 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psp_v10_0_ring_stop +ffffffff81e8b820 t psp_v10_0_ring_destroy +ffffffff81e8b8a0 t psp_v10_0_mode1_reset +ffffffff81e8b8f0 t psp_v10_0_ring_get_wptr +ffffffff81e8b950 t psp_v10_0_ring_set_wptr +ffffffff81e8c000 T psp_v11_0_set_psp_funcs +ffffffff81e8c030 t psp_v11_0_init_microcode +ffffffff81e8c450 t psp_v11_0_bootloader_load_kdb +ffffffff81e8c470 t psp_v11_0_bootloader_load_spl +ffffffff81e8c490 t psp_v11_0_bootloader_load_sysdrv +ffffffff81e8c4b0 t psp_v11_0_bootloader_load_sos +ffffffff81e8c800 t psp_v11_0_ring_init +ffffffff81e8c880 t psp_v11_0_ring_create +ffffffff81e8cf10 t psp_v11_0_ring_stop +ffffffff81e8d130 t psp_v11_0_ring_destroy +ffffffff81e8d1b0 t psp_v11_0_mode1_reset +ffffffff81e8d2b0 t psp_v11_0_memory_training +ffffffff81e8d730 t psp_v11_0_ring_get_wptr +ffffffff81e8d780 t psp_v11_0_ring_set_wptr +ffffffff81e8d8c0 t psp_v11_0_load_usbc_pd_fw +ffffffff81e8dab0 t psp_v11_0_read_usbc_pd_fw +ffffffff81e8dbd0 t psp_v11_0_bootloader_load_component +ffffffff81e8dd90 t psp_v11_0_wait_for_bootloader +ffffffff81e8df60 t psp_v11_0_memory_training_send_msg +ffffffff81e8f000 T psp_v11_0_8_set_psp_funcs +ffffffff81e8f030 t psp_v11_0_8_ring_init +ffffffff81e8f0b0 t psp_v11_0_8_ring_create +ffffffff81e8f740 t psp_v11_0_8_ring_stop +ffffffff81e8fad0 t psp_v11_0_8_ring_destroy +ffffffff81e8fb50 t psp_v11_0_8_ring_get_wptr +ffffffff81e8fbc0 t psp_v11_0_8_ring_set_wptr +ffffffff81e90000 T psp_v12_0_set_psp_funcs +ffffffff81e90030 t psp_v12_0_init_microcode +ffffffff81e902a0 t psp_v12_0_bootloader_load_sysdrv +ffffffff81e905c0 t psp_v12_0_bootloader_load_sos +ffffffff81e90920 t psp_v12_0_ring_init +ffffffff81e90f00 t psp_v12_0_ring_create +ffffffff81e91460 t psp_v12_0_ring_stop +ffffffff81e91680 t psp_v12_0_ring_destroy +ffffffff81e91700 t psp_v12_0_mode1_reset +ffffffff81e91800 t psp_v12_0_ring_get_wptr +ffffffff81e91870 t psp_v12_0_ring_set_wptr +ffffffff81e92000 T psp_v13_0_set_psp_funcs +ffffffff81e92030 t psp_v13_0_init_microcode +ffffffff81e92160 t psp_v13_0_bootloader_load_kdb +ffffffff81e92180 t psp_v13_0_bootloader_load_spl +ffffffff81e921a0 t psp_v13_0_bootloader_load_sysdrv +ffffffff81e921c0 t psp_v13_0_bootloader_load_soc_drv +ffffffff81e921e0 t psp_v13_0_bootloader_load_intf_drv +ffffffff81e92200 t psp_v13_0_bootloader_load_dbg_drv +ffffffff81e92220 t psp_v13_0_bootloader_load_ras_drv +ffffffff81e92240 t psp_v13_0_bootloader_load_sos +ffffffff81e925a0 t psp_v13_0_ring_init +ffffffff81e92620 t psp_v13_0_ring_create +ffffffff81e92cb0 t psp_v13_0_ring_stop +ffffffff81e93040 t psp_v13_0_ring_destroy +ffffffff81e930c0 t psp_v13_0_memory_training +ffffffff81e93500 t psp_v13_0_ring_get_wptr +ffffffff81e93570 t psp_v13_0_ring_set_wptr +ffffffff81e93670 t psp_v13_0_load_usbc_pd_fw +ffffffff81e93860 t psp_v13_0_read_usbc_pd_fw +ffffffff81e93980 t psp_v13_0_update_spirom +ffffffff81e93b50 t psp_v13_0_vbflash_status +ffffffff81e93bb0 t psp_v13_0_bootloader_load_component +ffffffff81e93d80 t psp_v13_0_wait_for_bootloader +ffffffff81e93f50 t psp_v13_0_memory_training_send_msg +ffffffff81e940b0 t psp_v13_0_exec_spi_cmd +ffffffff81e95000 T psp_v13_0_4_set_psp_funcs +ffffffff81e95030 t psp_v13_0_4_init_microcode +ffffffff81e95100 t psp_v13_0_4_bootloader_load_kdb +ffffffff81e95120 t psp_v13_0_4_bootloader_load_spl +ffffffff81e95140 t psp_v13_0_4_bootloader_load_sysdrv +ffffffff81e95160 t psp_v13_0_4_bootloader_load_soc_drv +ffffffff81e95180 t psp_v13_0_4_bootloader_load_intf_drv +ffffffff81e951a0 t psp_v13_0_4_bootloader_load_dbg_drv +ffffffff81e951c0 t psp_v13_0_4_bootloader_load_sos +ffffffff81e95530 t psp_v13_0_4_ring_init +ffffffff81e955b0 t psp_v13_0_4_ring_create +ffffffff81e95c50 t psp_v13_0_4_ring_stop +ffffffff81e95fe0 t psp_v13_0_4_ring_destroy +ffffffff81e96060 t psp_v13_0_4_ring_get_wptr +ffffffff81e960d0 t psp_v13_0_4_ring_set_wptr +ffffffff81e961d0 t psp_v13_0_4_bootloader_load_component +ffffffff81e963a0 t psp_v13_0_4_wait_for_bootloader +ffffffff81e97000 T psp_v3_1_set_psp_funcs +ffffffff81e97030 t psp_v3_1_init_microcode +ffffffff81e970f0 t psp_v3_1_bootloader_load_sysdrv +ffffffff81e97410 t psp_v3_1_bootloader_load_sos +ffffffff81e97770 t psp_v3_1_ring_init +ffffffff81e977f0 t psp_v3_1_ring_create +ffffffff81e982f0 t psp_v3_1_ring_stop +ffffffff81e98510 t psp_v3_1_ring_destroy +ffffffff81e98590 t psp_v3_1_smu_reload_quirk +ffffffff81e985e0 t psp_v3_1_mode1_reset +ffffffff81e986e0 t psp_v3_1_ring_get_wptr +ffffffff81e98730 t psp_v3_1_ring_set_wptr +ffffffff81e99000 t sdma_v2_4_early_init +ffffffff81e990e0 t sdma_v2_4_sw_init +ffffffff81e99470 t sdma_v2_4_sw_fini +ffffffff81e99550 t sdma_v2_4_hw_init +ffffffff81e99910 t sdma_v2_4_hw_fini +ffffffff81e99950 t sdma_v2_4_suspend +ffffffff81e99990 t sdma_v2_4_resume +ffffffff81e999a0 t sdma_v2_4_is_idle +ffffffff81e999e0 t sdma_v2_4_wait_for_idle +ffffffff81e99a80 t sdma_v2_4_soft_reset +ffffffff81e99bc0 t sdma_v2_4_set_clockgating_state +ffffffff81e99bf0 t sdma_v2_4_set_powergating_state +ffffffff81e99c20 t sdma_v2_4_ring_get_rptr +ffffffff81e99c60 t sdma_v2_4_ring_get_wptr +ffffffff81e99cc0 t sdma_v2_4_ring_set_wptr +ffffffff81e99d00 t sdma_v2_4_ring_emit_ib +ffffffff81e99fb0 t sdma_v2_4_ring_emit_fence +ffffffff81e9a3b0 t sdma_v2_4_ring_emit_pipeline_sync +ffffffff81e9a630 t sdma_v2_4_ring_emit_vm_flush +ffffffff81e9a8b0 t sdma_v2_4_ring_emit_hdp_flush +ffffffff81e9ab30 t sdma_v2_4_ring_test_ring +ffffffff81e9ae10 t sdma_v2_4_ring_test_ib +ffffffff81e9aff0 t sdma_v2_4_ring_insert_nop +ffffffff81e9b120 t sdma_v2_4_ring_pad_ib +ffffffff81e9b250 t sdma_v2_4_ring_emit_wreg +ffffffff81e9b3a0 t sdma_v2_4_emit_copy_buffer +ffffffff81e9b460 t sdma_v2_4_emit_fill_buffer +ffffffff81e9b4f0 t sdma_v2_4_vm_copy_pte +ffffffff81e9b5b0 t sdma_v2_4_vm_write_pte +ffffffff81e9b680 t sdma_v2_4_vm_set_pte_pde +ffffffff81e9b780 t sdma_v2_4_set_trap_irq_state +ffffffff81e9b840 t sdma_v2_4_process_trap_irq +ffffffff81e9b8e0 t sdma_v2_4_process_illegal_inst_irq +ffffffff81e9b960 t sdma_v2_4_enable +ffffffff81e9c000 t sdma_v3_0_early_init +ffffffff81e9c150 t sdma_v3_0_sw_init +ffffffff81e9c500 t sdma_v3_0_sw_fini +ffffffff81e9c5e0 t sdma_v3_0_hw_init +ffffffff81e9c710 t sdma_v3_0_hw_fini +ffffffff81e9c760 t sdma_v3_0_suspend +ffffffff81e9c7b0 t sdma_v3_0_resume +ffffffff81e9c7c0 t sdma_v3_0_is_idle +ffffffff81e9c800 t sdma_v3_0_wait_for_idle +ffffffff81e9c8a0 t sdma_v3_0_check_soft_reset +ffffffff81e9c900 t sdma_v3_0_pre_soft_reset +ffffffff81e9c950 t sdma_v3_0_soft_reset +ffffffff81e9ca20 t sdma_v3_0_post_soft_reset +ffffffff81e9ca70 t sdma_v3_0_set_clockgating_state +ffffffff81e9ccd0 t sdma_v3_0_set_powergating_state +ffffffff81e9cd00 t sdma_v3_0_get_clockgating_state +ffffffff81e9cd80 t sdma_v3_0_ring_get_rptr +ffffffff81e9cdc0 t sdma_v3_0_ring_get_wptr +ffffffff81e9ce40 t sdma_v3_0_ring_set_wptr +ffffffff81e9cef0 t sdma_v3_0_ring_emit_ib +ffffffff81e9d1a0 t sdma_v3_0_ring_emit_fence +ffffffff81e9d5a0 t sdma_v3_0_ring_emit_pipeline_sync +ffffffff81e9d820 t sdma_v3_0_ring_emit_vm_flush +ffffffff81e9daa0 t sdma_v3_0_ring_emit_hdp_flush +ffffffff81e9dd20 t sdma_v3_0_ring_test_ring +ffffffff81e9e000 t sdma_v3_0_ring_test_ib +ffffffff81e9e1e0 t sdma_v3_0_ring_insert_nop +ffffffff81e9e310 t sdma_v3_0_ring_pad_ib +ffffffff81e9e440 t sdma_v3_0_ring_emit_wreg +ffffffff81e9e590 t sdma_v3_0_emit_copy_buffer +ffffffff81e9e650 t sdma_v3_0_emit_fill_buffer +ffffffff81e9e6e0 t sdma_v3_0_vm_copy_pte +ffffffff81e9e7a0 t sdma_v3_0_vm_write_pte +ffffffff81e9e870 t sdma_v3_0_vm_set_pte_pde +ffffffff81e9e970 t sdma_v3_0_set_trap_irq_state +ffffffff81e9ea30 t sdma_v3_0_process_trap_irq +ffffffff81e9ead0 t sdma_v3_0_process_illegal_inst_irq +ffffffff81e9eb50 t sdma_v3_0_ctx_switch_enable +ffffffff81e9ece0 t sdma_v3_0_enable +ffffffff81e9ee50 t sdma_v3_0_gfx_resume +ffffffff81ea0000 t sdma_v4_0_early_init +ffffffff81ea0580 t sdma_v4_0_late_init +ffffffff81ea0820 t sdma_v4_0_sw_init +ffffffff81ea0b90 t sdma_v4_0_sw_fini +ffffffff81ea0c50 t sdma_v4_0_hw_init +ffffffff81ea3bf0 t sdma_v4_0_hw_fini +ffffffff81ea3cb0 t sdma_v4_0_suspend +ffffffff81ea3d00 t sdma_v4_0_resume +ffffffff81ea3d80 t sdma_v4_0_is_idle +ffffffff81ea3eb0 t sdma_v4_0_wait_for_idle +ffffffff81ea4050 t sdma_v4_0_soft_reset +ffffffff81ea4080 t sdma_v4_0_set_clockgating_state +ffffffff81ea4580 t sdma_v4_0_set_powergating_state +ffffffff81ea4640 t sdma_v4_0_get_clockgating_state +ffffffff81ea46e0 t sdma_v4_0_query_ras_error_count +ffffffff81ea48b0 t sdma_v4_0_reset_ras_error_count +ffffffff81ea4a00 t sdma_v4_0_ring_get_rptr +ffffffff81ea4a60 t sdma_v4_0_ring_get_wptr +ffffffff81ea4c50 t sdma_v4_0_ring_set_wptr +ffffffff81ea4ed0 t sdma_v4_0_ring_emit_ib +ffffffff81ea5180 t sdma_v4_0_ring_emit_fence +ffffffff81ea55b0 t sdma_v4_0_ring_emit_pipeline_sync +ffffffff81ea5610 t sdma_v4_0_ring_emit_vm_flush +ffffffff81ea5630 t sdma_v4_0_ring_emit_hdp_flush +ffffffff81ea56d0 t sdma_v4_0_ring_test_ring +ffffffff81ea59b0 t sdma_v4_0_ring_test_ib +ffffffff81ea5b90 t sdma_v4_0_ring_insert_nop +ffffffff81ea5cc0 t sdma_v4_0_ring_pad_ib +ffffffff81ea5df0 t sdma_v4_0_ring_emit_wreg +ffffffff81ea5f40 t sdma_v4_0_ring_emit_reg_wait +ffffffff81ea5f90 t sdma_v4_0_wait_reg_mem +ffffffff81ea62c0 t sdma_v4_0_page_ring_get_wptr +ffffffff81ea6470 t sdma_v4_0_page_ring_set_wptr +ffffffff81ea6630 t sdma_v4_0_emit_copy_buffer +ffffffff81ea66f0 t sdma_v4_0_emit_fill_buffer +ffffffff81ea6780 t sdma_v4_0_vm_copy_pte +ffffffff81ea6840 t sdma_v4_0_vm_write_pte +ffffffff81ea6910 t sdma_v4_0_vm_set_pte_pde +ffffffff81ea6a10 t sdma_v4_0_set_trap_irq_state +ffffffff81ea6bb0 t sdma_v4_0_process_trap_irq +ffffffff81ea6cf0 t sdma_v4_0_process_illegal_inst_irq +ffffffff81ea6e10 t sdma_v4_0_set_ecc_irq_state +ffffffff81ea6fb0 t sdma_v4_0_process_vm_hole_irq +ffffffff81ea70f0 t sdma_v4_0_process_doorbell_invalid_irq +ffffffff81ea7230 t sdma_v4_0_process_pool_timeout_irq +ffffffff81ea7370 t sdma_v4_0_process_srbm_write_irq +ffffffff81ea74b0 t sdma_v4_0_process_ras_data_cb +ffffffff81ea7530 t sdma_v4_0_ctx_switch_enable +ffffffff81ea7be0 t sdma_v4_0_enable +ffffffff81ea8180 t sdma_v4_0_gfx_enable +ffffffff81ea9000 t sdma_v4_4_query_ras_error_count +ffffffff81ea9270 t sdma_v4_4_reset_ras_error_count +ffffffff81eaa000 t sdma_v5_0_early_init +ffffffff81eaa170 t sdma_v5_0_sw_init +ffffffff81eaa410 t sdma_v5_0_sw_fini +ffffffff81eaa4a0 t sdma_v5_0_hw_init +ffffffff81eab750 t sdma_v5_0_hw_fini +ffffffff81eab7b0 t sdma_v5_0_suspend +ffffffff81eab810 t sdma_v5_0_resume +ffffffff81eab820 t sdma_v5_0_is_idle +ffffffff81eab8b0 t sdma_v5_0_wait_for_idle +ffffffff81eab970 t sdma_v5_0_soft_reset +ffffffff81eab9a0 t sdma_v5_0_set_clockgating_state +ffffffff81eabba0 t sdma_v5_0_set_powergating_state +ffffffff81eabbd0 t sdma_v5_0_get_clockgating_state +ffffffff81eabc70 t sdma_v5_0_ring_get_rptr +ffffffff81eabcd0 t sdma_v5_0_ring_get_wptr +ffffffff81eabe70 t sdma_v5_0_ring_set_wptr +ffffffff81eac1d0 t sdma_v5_0_ring_emit_ib +ffffffff81eac490 t sdma_v5_0_ring_emit_fence +ffffffff81eac900 t sdma_v5_0_ring_emit_pipeline_sync +ffffffff81eacb80 t sdma_v5_0_ring_emit_vm_flush +ffffffff81eacba0 t sdma_v5_0_ring_emit_hdp_flush +ffffffff81eace40 t sdma_v5_0_ring_test_ring +ffffffff81ead200 t sdma_v5_0_ring_test_ib +ffffffff81ead530 t sdma_v5_0_ring_insert_nop +ffffffff81ead660 t sdma_v5_0_ring_pad_ib +ffffffff81ead790 t sdma_v5_0_ring_init_cond_exec +ffffffff81ead9c0 t sdma_v5_0_ring_patch_cond_exec +ffffffff81eada80 t sdma_v5_0_ring_emit_wreg +ffffffff81eadbd0 t sdma_v5_0_ring_emit_reg_wait +ffffffff81eade50 t sdma_v5_0_ring_emit_reg_write_reg_wait +ffffffff81eaded0 t sdma_v5_0_ring_preempt_ib +ffffffff81eae010 t sdma_v5_0_ring_emit_mem_sync +ffffffff81eae220 t sdma_v5_0_emit_copy_buffer +ffffffff81eae2e0 t sdma_v5_0_emit_fill_buffer +ffffffff81eae370 t sdma_v5_0_vm_copy_pte +ffffffff81eae430 t sdma_v5_0_vm_write_pte +ffffffff81eae500 t sdma_v5_0_vm_set_pte_pde +ffffffff81eae600 t sdma_v5_0_set_trap_irq_state +ffffffff81eae690 t sdma_v5_0_process_trap_irq +ffffffff81eae7a0 t sdma_v5_0_process_illegal_inst_irq +ffffffff81eae7d0 t sdma_v5_0_mqd_init +ffffffff81eae8b0 t sdma_v5_0_ctx_switch_enable +ffffffff81eaebb0 t sdma_v5_0_enable +ffffffff81eaf000 t sdma_v5_2_early_init +ffffffff81eaf170 t sdma_v5_2_sw_init +ffffffff81eaf3a0 t sdma_v5_2_sw_fini +ffffffff81eaf430 t sdma_v5_2_hw_init +ffffffff81eaf770 t sdma_v5_2_hw_fini +ffffffff81eaf7d0 t sdma_v5_2_suspend +ffffffff81eaf830 t sdma_v5_2_resume +ffffffff81eaf840 t sdma_v5_2_is_idle +ffffffff81eaf900 t sdma_v5_2_wait_for_idle +ffffffff81eafa00 t sdma_v5_2_soft_reset +ffffffff81eafca0 t sdma_v5_2_set_clockgating_state +ffffffff81eaffc0 t sdma_v5_2_set_powergating_state +ffffffff81eafff0 t sdma_v5_2_get_clockgating_state +ffffffff81eb0080 t sdma_v5_2_ring_get_rptr +ffffffff81eb00e0 t sdma_v5_2_ring_get_wptr +ffffffff81eb0220 t sdma_v5_2_ring_set_wptr +ffffffff81eb03e0 t sdma_v5_2_ring_emit_ib +ffffffff81eb06a0 t sdma_v5_2_ring_emit_fence +ffffffff81eb0b10 t sdma_v5_2_ring_emit_pipeline_sync +ffffffff81eb0d90 t sdma_v5_2_ring_emit_vm_flush +ffffffff81eb0db0 t sdma_v5_2_ring_emit_hdp_flush +ffffffff81eb1050 t sdma_v5_2_ring_test_ring +ffffffff81eb1410 t sdma_v5_2_ring_test_ib +ffffffff81eb1740 t sdma_v5_2_ring_insert_nop +ffffffff81eb1870 t sdma_v5_2_ring_pad_ib +ffffffff81eb19a0 t sdma_v5_2_ring_init_cond_exec +ffffffff81eb1bd0 t sdma_v5_2_ring_patch_cond_exec +ffffffff81eb1c90 t sdma_v5_2_ring_emit_wreg +ffffffff81eb1de0 t sdma_v5_2_ring_emit_reg_wait +ffffffff81eb2060 t sdma_v5_2_ring_emit_reg_write_reg_wait +ffffffff81eb20e0 t sdma_v5_2_ring_preempt_ib +ffffffff81eb2250 t sdma_v5_2_ring_emit_mem_sync +ffffffff81eb2460 t sdma_v5_2_emit_copy_buffer +ffffffff81eb2520 t sdma_v5_2_emit_fill_buffer +ffffffff81eb25b0 t sdma_v5_2_vm_copy_pte +ffffffff81eb2670 t sdma_v5_2_vm_write_pte +ffffffff81eb2740 t sdma_v5_2_vm_set_pte_pde +ffffffff81eb2840 t sdma_v5_2_set_trap_irq_state +ffffffff81eb2900 t sdma_v5_2_process_trap_irq +ffffffff81eb2a40 t sdma_v5_2_process_illegal_inst_irq +ffffffff81eb2a70 t sdma_v5_2_mqd_init +ffffffff81eb2b50 t sdma_v5_2_ctx_switch_enable +ffffffff81eb2f50 t sdma_v5_2_enable +ffffffff81eb3360 t sdma_v5_2_gfx_resume +ffffffff81eb5000 t sdma_v6_0_early_init +ffffffff81eb5140 t sdma_v6_0_sw_init +ffffffff81eb5320 t sdma_v6_0_sw_fini +ffffffff81eb53b0 t sdma_v6_0_hw_init +ffffffff81eb53c0 t sdma_v6_0_hw_fini +ffffffff81eb5410 t sdma_v6_0_suspend +ffffffff81eb5460 t sdma_v6_0_resume +ffffffff81eb5470 t sdma_v6_0_is_idle +ffffffff81eb5500 t sdma_v6_0_wait_for_idle +ffffffff81eb55c0 t sdma_v6_0_check_soft_reset +ffffffff81eb5680 t sdma_v6_0_soft_reset +ffffffff81eb5b20 t sdma_v6_0_set_clockgating_state +ffffffff81eb5b50 t sdma_v6_0_set_powergating_state +ffffffff81eb5b80 t sdma_v6_0_get_clockgating_state +ffffffff81eb5bb0 t sdma_v6_0_ring_get_rptr +ffffffff81eb5c10 t sdma_v6_0_ring_get_wptr +ffffffff81eb5c80 t sdma_v6_0_ring_set_wptr +ffffffff81eb5fe0 t sdma_v6_0_ring_emit_ib +ffffffff81eb62a0 t sdma_v6_0_ring_emit_fence +ffffffff81eb6710 t sdma_v6_0_ring_emit_pipeline_sync +ffffffff81eb6990 t sdma_v6_0_ring_emit_vm_flush +ffffffff81eb69b0 t sdma_v6_0_ring_emit_hdp_flush +ffffffff81eb6c50 t sdma_v6_0_ring_test_ring +ffffffff81eb7010 t sdma_v6_0_ring_test_ib +ffffffff81eb7340 t sdma_v6_0_ring_insert_nop +ffffffff81eb7470 t sdma_v6_0_ring_pad_ib +ffffffff81eb75a0 t sdma_v6_0_ring_init_cond_exec +ffffffff81eb77d0 t sdma_v6_0_ring_patch_cond_exec +ffffffff81eb7890 t sdma_v6_0_ring_emit_wreg +ffffffff81eb79e0 t sdma_v6_0_ring_emit_reg_wait +ffffffff81eb7c60 t sdma_v6_0_ring_emit_reg_write_reg_wait +ffffffff81eb7ce0 t sdma_v6_0_ring_preempt_ib +ffffffff81eb7e30 t sdma_v6_0_ring_emit_mem_sync +ffffffff81eb8040 t sdma_v6_0_emit_copy_buffer +ffffffff81eb8100 t sdma_v6_0_emit_fill_buffer +ffffffff81eb8190 t sdma_v6_0_vm_copy_pte +ffffffff81eb8250 t sdma_v6_0_vm_write_pte +ffffffff81eb8320 t sdma_v6_0_vm_set_pte_pde +ffffffff81eb8420 t sdma_v6_0_set_trap_irq_state +ffffffff81eb84b0 t sdma_v6_0_process_trap_irq +ffffffff81eb85e0 t sdma_v6_0_process_illegal_inst_irq +ffffffff81eb8610 t sdma_v6_0_mqd_init +ffffffff81eb8730 t sdma_v6_0_start +ffffffff81eb89b0 t sdma_v6_0_enable +ffffffff81eb8b30 t sdma_v6_0_gfx_resume +ffffffff81eb9bb0 t sdma_v6_0_gfx_stop +ffffffff81eba000 T sienna_cichlid_reset_init +ffffffff81eba0c0 t sienna_cichlid_async_reset +ffffffff81eba120 t sienna_cichlid_get_reset_handler +ffffffff81eba180 T sienna_cichlid_reset_fini +ffffffff81eba1e0 t sienna_cichlid_mode2_prepare_hwcontext +ffffffff81eba330 t sienna_cichlid_mode2_perform_reset +ffffffff81eba3b0 t sienna_cichlid_mode2_restore_hwcontext +ffffffff81eba6a0 t sienna_cichlid_mode2_reset +ffffffff81ebb000 T smu_v11_0_i2c_control_init +ffffffff81ebb0d0 T smu_v11_0_i2c_control_fini +ffffffff81ebb110 t smu_v11_0_i2c_xfer +ffffffff81ebc1f0 t smu_v11_0_i2c_func +ffffffff81ebc220 t smu_v11_0_i2c_enable +ffffffff81ebc360 t smu_v11_0_i2c_abort +ffffffff81ebc460 t lock_bus +ffffffff81ebc500 t trylock_bus +ffffffff81ebc550 t unlock_bus +ffffffff81ebd000 t smuio_v11_0_get_rom_index_offset +ffffffff81ebd040 t smuio_v11_0_get_rom_data_offset +ffffffff81ebd080 t smuio_v11_0_update_rom_clock_gating +ffffffff81ebd1c0 t smuio_v11_0_get_clock_gating_state +ffffffff81ebe000 t smuio_v11_0_6_get_rom_index_offset +ffffffff81ebe040 t smuio_v11_0_6_get_rom_data_offset +ffffffff81ebe080 t smuio_v11_0_6_update_rom_clock_gating +ffffffff81ebe1c0 t smuio_v11_0_6_get_clock_gating_state +ffffffff81ebf000 t smuio_v13_0_get_rom_index_offset +ffffffff81ebf040 t smuio_v13_0_get_rom_data_offset +ffffffff81ebf080 t smuio_v13_0_update_rom_clock_gating +ffffffff81ebf1c0 t smuio_v13_0_get_clock_gating_state +ffffffff81ebf260 t smuio_v13_0_get_die_id +ffffffff81ebf2e0 t smuio_v13_0_get_socket_id +ffffffff81ebf360 t smuio_v13_0_is_host_gpu_xgmi_supported +ffffffff81ec0000 t smuio_v13_0_6_get_rom_index_offset +ffffffff81ec0040 t smuio_v13_0_6_get_rom_data_offset +ffffffff81ec1000 t smuio_v9_0_get_rom_index_offset +ffffffff81ec1040 t smuio_v9_0_get_rom_data_offset +ffffffff81ec1080 t smuio_v9_0_update_rom_clock_gating +ffffffff81ec11c0 t smuio_v9_0_get_clock_gating_state +ffffffff81ec2000 T soc15_grbm_select +ffffffff81ec2080 T soc15_program_register_sequence +ffffffff81ec2280 T soc15_set_virt_ops +ffffffff81ec22f0 t soc15_common_early_init +ffffffff81ec2680 t soc15_common_late_init +ffffffff81ec26c0 t soc15_common_sw_init +ffffffff81ec2720 t soc15_common_sw_fini +ffffffff81ec2770 t soc15_common_hw_init +ffffffff81ec28a0 t soc15_common_hw_fini +ffffffff81ec2970 t soc15_common_suspend +ffffffff81ec29b0 t soc15_common_resume +ffffffff81ec29f0 t soc15_common_is_idle +ffffffff81ec2a20 t soc15_common_wait_for_idle +ffffffff81ec2a50 t soc15_common_soft_reset +ffffffff81ec2a80 t soc15_common_set_clockgating_state +ffffffff81ec2dc0 t soc15_common_set_powergating_state +ffffffff81ec2df0 t soc15_common_get_clockgating_state +ffffffff81ec2ed0 t soc15_pcie_rreg +ffffffff81ec2f30 t soc15_pcie_wreg +ffffffff81ec2f90 t soc15_pcie_rreg64 +ffffffff81ec2ff0 t soc15_pcie_wreg64 +ffffffff81ec3050 t soc15_uvd_ctx_rreg +ffffffff81ec30f0 t soc15_uvd_ctx_wreg +ffffffff81ec3180 t soc15_didt_rreg +ffffffff81ec3220 t soc15_didt_wreg +ffffffff81ec32a0 t soc15_gc_cac_rreg +ffffffff81ec33c0 t soc15_gc_cac_wreg +ffffffff81ec34d0 t soc15_se_cac_rreg +ffffffff81ec35f0 t soc15_se_cac_wreg +ffffffff81ec3700 t soc15_read_disabled_bios +ffffffff81ec3730 t soc15_read_register +ffffffff81ec3830 t soc15_vga_set_state +ffffffff81ec3860 t soc15_asic_reset +ffffffff81ec3960 t soc15_asic_reset_method +ffffffff81ec3ae0 t soc15_get_xclk +ffffffff81ec3b30 t soc15_set_uvd_clocks +ffffffff81ec3b60 t soc15_set_vce_clocks +ffffffff81ec3b90 t soc15_get_config_memsize +ffffffff81ec3bb0 t soc15_need_full_reset +ffffffff81ec3be0 t soc15_get_pcie_usage +ffffffff81ec3d10 t soc15_need_reset_on_init +ffffffff81ec3db0 t soc15_get_pcie_replay_count +ffffffff81ec3e20 t soc15_supports_baco +ffffffff81ec3e80 t soc15_pre_asic_init +ffffffff81ec3e90 t soc15_query_video_codecs +ffffffff81ec3f40 t vega20_get_pcie_usage +ffffffff81ec5000 T soc21_grbm_select +ffffffff81ec5080 t soc21_common_early_init +ffffffff81ec52d0 t soc21_common_late_init +ffffffff81ec5300 t soc21_common_sw_init +ffffffff81ec5330 t soc21_common_sw_fini +ffffffff81ec5360 t soc21_common_hw_init +ffffffff81ec5430 t soc21_common_hw_fini +ffffffff81ec5490 t soc21_common_suspend +ffffffff81ec54f0 t soc21_common_resume +ffffffff81ec55c0 t soc21_common_is_idle +ffffffff81ec55f0 t soc21_common_wait_for_idle +ffffffff81ec5620 t soc21_common_soft_reset +ffffffff81ec5650 t soc21_common_set_clockgating_state +ffffffff81ec5700 t soc21_common_set_powergating_state +ffffffff81ec5760 t soc21_common_get_clockgating_state +ffffffff81ec57b0 t soc21_pcie_rreg +ffffffff81ec5810 t soc21_pcie_wreg +ffffffff81ec5870 t soc21_pcie_rreg64 +ffffffff81ec58d0 t soc21_pcie_wreg64 +ffffffff81ec5930 t soc21_didt_rreg +ffffffff81ec59d0 t soc21_didt_wreg +ffffffff81ec5a50 t soc21_read_disabled_bios +ffffffff81ec5a80 t soc21_read_register +ffffffff81ec5b70 t soc21_vga_set_state +ffffffff81ec5ba0 t soc21_asic_reset +ffffffff81ec5c80 t soc21_asic_reset_method +ffffffff81ec5d40 t soc21_get_xclk +ffffffff81ec5d70 t soc21_set_uvd_clocks +ffffffff81ec5da0 t soc21_set_vce_clocks +ffffffff81ec5dd0 t soc21_get_config_memsize +ffffffff81ec5df0 t soc21_need_full_reset +ffffffff81ec5e50 t soc21_init_doorbell_index +ffffffff81ec5f70 t soc21_need_reset_on_init +ffffffff81ec6000 t soc21_get_pcie_replay_count +ffffffff81ec6030 t soc21_pre_asic_init +ffffffff81ec6060 t soc21_update_umd_stable_pstate +ffffffff81ec60d0 t soc21_query_video_codecs +ffffffff81ec7000 t tonga_ih_early_init +ffffffff81ec7050 t tonga_ih_sw_init +ffffffff81ec70d0 t tonga_ih_sw_fini +ffffffff81ec7110 t tonga_ih_hw_init +ffffffff81ec7300 t tonga_ih_hw_fini +ffffffff81ec73a0 t tonga_ih_suspend +ffffffff81ec7440 t tonga_ih_resume +ffffffff81ec7480 t tonga_ih_is_idle +ffffffff81ec74d0 t tonga_ih_wait_for_idle +ffffffff81ec7570 t tonga_ih_check_soft_reset +ffffffff81ec75d0 t tonga_ih_pre_soft_reset +ffffffff81ec7680 t tonga_ih_soft_reset +ffffffff81ec7750 t tonga_ih_post_soft_reset +ffffffff81ec7790 t tonga_ih_set_clockgating_state +ffffffff81ec77c0 t tonga_ih_set_powergating_state +ffffffff81ec77f0 t tonga_ih_get_wptr +ffffffff81ec78e0 t tonga_ih_decode_iv +ffffffff81ec7960 t tonga_ih_set_rptr +ffffffff81ec8000 t umc_v6_0_init_registers +ffffffff81ec9000 t umc_v6_1_query_ras_error_count +ffffffff81ec94e0 t umc_v6_1_query_ras_error_address +ffffffff81ec97c0 t umc_v6_1_err_cnt_init +ffffffff81eca000 t umc_v6_7_query_ras_error_count +ffffffff81eca410 t umc_v6_7_query_ras_error_address +ffffffff81eca590 t umc_v6_7_query_ras_poison_mode +ffffffff81eca5f0 t umc_v6_7_convert_error_address +ffffffff81eca8f0 t umc_v6_7_ecc_info_query_ras_error_count +ffffffff81ecab30 t umc_v6_7_ecc_info_query_ras_error_address +ffffffff81ecb000 t umc_v8_10_query_ras_error_count +ffffffff81ecb280 t umc_v8_10_query_ras_error_address +ffffffff81ecb5b0 t umc_v8_10_err_cnt_init +ffffffff81ecb730 t umc_v8_10_query_ras_poison_mode +ffffffff81ecc000 t umc_v8_7_query_ras_error_count +ffffffff81ecc310 t umc_v8_7_query_ras_error_address +ffffffff81ecc4c0 t umc_v8_7_err_cnt_init +ffffffff81ecc610 t umc_v8_7_ecc_info_query_ras_error_count +ffffffff81ecc740 t umc_v8_7_ecc_info_query_ras_error_address +ffffffff81ecd000 t uvd_v5_0_early_init +ffffffff81ecd050 t uvd_v5_0_sw_init +ffffffff81ecd140 t uvd_v5_0_sw_fini +ffffffff81ecd190 t uvd_v5_0_hw_init +ffffffff81ecd6a0 t uvd_v5_0_hw_fini +ffffffff81ecd720 t uvd_v5_0_suspend +ffffffff81ecd820 t uvd_v5_0_resume +ffffffff81ecd870 t uvd_v5_0_is_idle +ffffffff81ecd8c0 t uvd_v5_0_wait_for_idle +ffffffff81ecd950 t uvd_v5_0_soft_reset +ffffffff81ecd9f0 t uvd_v5_0_set_clockgating_state +ffffffff81ecdb90 t uvd_v5_0_set_powergating_state +ffffffff81ecdbd0 t uvd_v5_0_get_clockgating_state +ffffffff81ecdc50 t uvd_v5_0_ring_get_rptr +ffffffff81ecdc90 t uvd_v5_0_ring_get_wptr +ffffffff81ecdcd0 t uvd_v5_0_ring_set_wptr +ffffffff81ecdd00 t uvd_v5_0_ring_emit_ib +ffffffff81ecdf70 t uvd_v5_0_ring_emit_fence +ffffffff81ece520 t uvd_v5_0_ring_test_ring +ffffffff81ece6c0 t uvd_v5_0_ring_insert_nop +ffffffff81ece820 t uvd_v5_0_set_interrupt_state +ffffffff81ece850 t uvd_v5_0_process_interrupt +ffffffff81ece8b0 t uvd_v5_0_stop +ffffffff81ece9c0 t uvd_v5_0_start +ffffffff81ed0000 t uvd_v6_0_early_init +ffffffff81ed0140 t uvd_v6_0_sw_init +ffffffff81ed0460 t uvd_v6_0_sw_fini +ffffffff81ed0520 t uvd_v6_0_hw_init +ffffffff81ed0ae0 t uvd_v6_0_hw_fini +ffffffff81ed0b60 t uvd_v6_0_suspend +ffffffff81ed0c60 t uvd_v6_0_resume +ffffffff81ed0cb0 t uvd_v6_0_is_idle +ffffffff81ed0d00 t uvd_v6_0_wait_for_idle +ffffffff81ed0d90 t uvd_v6_0_check_soft_reset +ffffffff81ed0e10 t uvd_v6_0_pre_soft_reset +ffffffff81ed0e50 t uvd_v6_0_soft_reset +ffffffff81ed0f20 t uvd_v6_0_post_soft_reset +ffffffff81ed0fc0 t uvd_v6_0_set_clockgating_state +ffffffff81ed1150 t uvd_v6_0_set_powergating_state +ffffffff81ed11c0 t uvd_v6_0_get_clockgating_state +ffffffff81ed1250 t uvd_v6_0_ring_get_rptr +ffffffff81ed1290 t uvd_v6_0_ring_get_wptr +ffffffff81ed12d0 t uvd_v6_0_ring_set_wptr +ffffffff81ed1300 t uvd_v6_0_ring_emit_ib +ffffffff81ed1660 t uvd_v6_0_ring_emit_fence +ffffffff81ed1c10 t uvd_v6_0_ring_emit_pipeline_sync +ffffffff81ed2010 t uvd_v6_0_ring_emit_vm_flush +ffffffff81ed2370 t uvd_v6_0_ring_emit_hdp_flush +ffffffff81ed23a0 t uvd_v6_0_ring_test_ring +ffffffff81ed2540 t uvd_v6_0_ring_insert_nop +ffffffff81ed26a0 t uvd_v6_0_ring_emit_wreg +ffffffff81ed2920 t uvd_v6_0_enc_ring_get_rptr +ffffffff81ed2980 t uvd_v6_0_enc_ring_get_wptr +ffffffff81ed29e0 t uvd_v6_0_enc_ring_set_wptr +ffffffff81ed2a20 t uvd_v6_0_enc_ring_emit_ib +ffffffff81ed2c60 t uvd_v6_0_enc_ring_emit_fence +ffffffff81ed2ea0 t uvd_v6_0_enc_ring_emit_pipeline_sync +ffffffff81ed3050 t uvd_v6_0_enc_ring_emit_vm_flush +ffffffff81ed3260 t uvd_v6_0_enc_ring_test_ring +ffffffff81ed33b0 t uvd_v6_0_enc_ring_test_ib +ffffffff81ed3970 t uvd_v6_0_enc_ring_insert_end +ffffffff81ed3a00 t uvd_v6_0_set_interrupt_state +ffffffff81ed3a30 t uvd_v6_0_process_interrupt +ffffffff81ed3b20 t uvd_v6_0_stop +ffffffff81ed3c30 t uvd_v6_0_start +ffffffff81ed5000 t uvd_v7_0_early_init +ffffffff81ed5270 t uvd_v7_0_sw_init +ffffffff81ed55f0 t uvd_v7_0_sw_fini +ffffffff81ed5700 t uvd_v7_0_hw_init +ffffffff81ed8610 t uvd_v7_0_hw_fini +ffffffff81ed8920 t uvd_v7_0_suspend +ffffffff81ed89d0 t uvd_v7_0_resume +ffffffff81ed8a20 t uvd_v7_0_set_clockgating_state +ffffffff81ed8a50 t uvd_v7_0_ring_get_rptr +ffffffff81ed8af0 t uvd_v7_0_ring_get_wptr +ffffffff81ed8b90 t uvd_v7_0_ring_set_wptr +ffffffff81ed8c10 t uvd_v7_0_ring_patch_cs_in_place +ffffffff81ed8c90 t uvd_v7_0_ring_emit_ib +ffffffff81ed9040 t uvd_v7_0_ring_emit_fence +ffffffff81ed96a0 t uvd_v7_0_ring_emit_vm_flush +ffffffff81ed9710 t uvd_v7_0_ring_emit_hdp_flush +ffffffff81ed9740 t uvd_v7_0_ring_test_ring +ffffffff81ed99d0 t uvd_v7_0_ring_insert_nop +ffffffff81ed9b70 t uvd_v7_0_ring_emit_wreg +ffffffff81ed9e40 t uvd_v7_0_ring_emit_reg_wait +ffffffff81eda1e0 t uvd_v7_0_enc_ring_get_rptr +ffffffff81eda2d0 t uvd_v7_0_enc_ring_get_wptr +ffffffff81eda3d0 t uvd_v7_0_enc_ring_set_wptr +ffffffff81eda4d0 t uvd_v7_0_enc_ring_emit_ib +ffffffff81eda710 t uvd_v7_0_enc_ring_emit_fence +ffffffff81eda950 t uvd_v7_0_enc_ring_emit_vm_flush +ffffffff81eda9c0 t uvd_v7_0_enc_ring_test_ring +ffffffff81edab20 t uvd_v7_0_enc_ring_test_ib +ffffffff81edb0e0 t uvd_v7_0_enc_ring_insert_end +ffffffff81edb170 t uvd_v7_0_enc_ring_emit_wreg +ffffffff81edb2d0 t uvd_v7_0_enc_ring_emit_reg_wait +ffffffff81edb490 t uvd_v7_0_set_interrupt_state +ffffffff81edb4c0 t uvd_v7_0_process_interrupt +ffffffff81edc000 t vce_v3_0_early_init +ffffffff81edc180 t vce_v3_0_sw_init +ffffffff81edc2d0 t vce_v3_0_sw_fini +ffffffff81edc320 t vce_v3_0_hw_init +ffffffff81edc400 t vce_v3_0_hw_fini +ffffffff81edc4f0 t vce_v3_0_suspend +ffffffff81edc5c0 t vce_v3_0_resume +ffffffff81edc610 t vce_v3_0_is_idle +ffffffff81edc680 t vce_v3_0_wait_for_idle +ffffffff81edc730 t vce_v3_0_check_soft_reset +ffffffff81edc830 t vce_v3_0_pre_soft_reset +ffffffff81edc8d0 t vce_v3_0_soft_reset +ffffffff81edc9a0 t vce_v3_0_post_soft_reset +ffffffff81edcb00 t vce_v3_0_set_clockgating_state +ffffffff81edcdf0 t vce_v3_0_set_powergating_state +ffffffff81edd640 t vce_v3_0_get_clockgating_state +ffffffff81edd700 t vce_v3_0_ring_get_rptr +ffffffff81edd7d0 t vce_v3_0_ring_get_wptr +ffffffff81edd8a0 t vce_v3_0_ring_set_wptr +ffffffff81edd960 t vce_v3_0_ring_emit_ib +ffffffff81eddba0 t vce_v3_0_emit_pipeline_sync +ffffffff81eddd50 t vce_v3_0_emit_vm_flush +ffffffff81eddfc0 t vce_v3_0_set_interrupt_state +ffffffff81ede030 t vce_v3_0_process_interrupt +ffffffff81ede0f0 t vce_v3_0_stop +ffffffff81edf000 t vce_v4_0_early_init +ffffffff81edf0b0 t vce_v4_0_sw_init +ffffffff81edf2e0 t vce_v4_0_sw_fini +ffffffff81edf360 t vce_v4_0_hw_init +ffffffff81edfb40 t vce_v4_0_hw_fini +ffffffff81edfbe0 t vce_v4_0_suspend +ffffffff81edfe00 t vce_v4_0_resume +ffffffff81edfeb0 t vce_v4_0_set_clockgating_state +ffffffff81edfee0 t vce_v4_0_set_powergating_state +ffffffff81edffc0 t vce_v4_0_ring_get_rptr +ffffffff81ee0030 t vce_v4_0_ring_get_wptr +ffffffff81ee00c0 t vce_v4_0_ring_set_wptr +ffffffff81ee0150 t vce_v4_0_ring_emit_ib +ffffffff81ee0390 t vce_v4_0_ring_emit_fence +ffffffff81ee05d0 t vce_v4_0_emit_vm_flush +ffffffff81ee0640 t vce_v4_0_ring_insert_end +ffffffff81ee06d0 t vce_v4_0_emit_wreg +ffffffff81ee0830 t vce_v4_0_emit_reg_wait +ffffffff81ee09f0 t vce_v4_0_set_interrupt_state +ffffffff81ee0a80 t vce_v4_0_process_interrupt +ffffffff81ee0b20 t vce_v4_0_start +ffffffff81ee1500 t vce_v4_0_stop +ffffffff81ee2000 T vcn_dec_sw_ring_emit_fence +ffffffff81ee2240 T vcn_dec_sw_ring_insert_end +ffffffff81ee22d0 T vcn_dec_sw_ring_emit_ib +ffffffff81ee2510 T vcn_dec_sw_ring_emit_reg_wait +ffffffff81ee26d0 T vcn_dec_sw_ring_emit_vm_flush +ffffffff81ee2740 T vcn_dec_sw_ring_emit_wreg +ffffffff81ee3000 T vcn_v1_0_set_pg_for_begin_use +ffffffff81ee3150 T vcn_v1_0_ring_end_use +ffffffff81ee31c0 t vcn_v1_0_early_init +ffffffff81ee3340 t vcn_v1_0_sw_init +ffffffff81ee35e0 t vcn_v1_0_sw_fini +ffffffff81ee3640 t vcn_v1_0_hw_init +ffffffff81ee3720 t vcn_v1_0_hw_fini +ffffffff81ee3820 t vcn_v1_0_suspend +ffffffff81ee3890 t vcn_v1_0_resume +ffffffff81ee3980 t vcn_v1_0_is_idle +ffffffff81ee3a10 t vcn_v1_0_wait_for_idle +ffffffff81ee3b00 t vcn_v1_0_set_clockgating_state +ffffffff81ee3bb0 t vcn_v1_0_set_powergating_state +ffffffff81ee4540 t vcn_v1_0_dec_ring_get_rptr +ffffffff81ee45d0 t vcn_v1_0_dec_ring_get_wptr +ffffffff81ee4660 t vcn_v1_0_dec_ring_set_wptr +ffffffff81ee4770 t vcn_v1_0_ring_patch_cs_in_place +ffffffff81ee4940 t vcn_v1_0_dec_ring_emit_ib +ffffffff81ee4cd0 t vcn_v1_0_dec_ring_emit_fence +ffffffff81ee5300 t vcn_v1_0_dec_ring_emit_vm_flush +ffffffff81ee5370 t vcn_v1_0_dec_ring_insert_nop +ffffffff81ee5500 t vcn_v1_0_dec_ring_insert_start +ffffffff81ee56e0 t vcn_v1_0_dec_ring_insert_end +ffffffff81ee57f0 t vcn_v1_0_ring_begin_use +ffffffff81ee5890 t vcn_v1_0_dec_ring_emit_wreg +ffffffff81ee5b40 t vcn_v1_0_dec_ring_emit_reg_wait +ffffffff81ee5ec0 t vcn_v1_0_enc_ring_get_rptr +ffffffff81ee5f90 t vcn_v1_0_enc_ring_get_wptr +ffffffff81ee6060 t vcn_v1_0_enc_ring_set_wptr +ffffffff81ee6120 t vcn_v1_0_enc_ring_emit_ib +ffffffff81ee6360 t vcn_v1_0_enc_ring_emit_fence +ffffffff81ee65a0 t vcn_v1_0_enc_ring_emit_vm_flush +ffffffff81ee6610 t vcn_v1_0_enc_ring_insert_end +ffffffff81ee66a0 t vcn_v1_0_enc_ring_emit_wreg +ffffffff81ee6800 t vcn_v1_0_enc_ring_emit_reg_wait +ffffffff81ee69c0 t vcn_v1_0_set_interrupt_state +ffffffff81ee69f0 t vcn_v1_0_process_interrupt +ffffffff81ee6aa0 t vcn_v1_0_idle_work_handler +ffffffff81ee6c30 t vcn_v1_0_pause_dpg_mode +ffffffff81ee7d50 t vcn_v1_0_enable_clock_gating +ffffffff81ee8160 t vcn_v1_0_disable_clock_gating +ffffffff81ee86f0 t vcn_1_0_enable_static_power_gating +ffffffff81ee8910 t vcn_v1_0_start_dpg_mode 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+ffffffff81ef1da0 t vcn_v2_0_hw_fini +ffffffff81ef1ea0 t vcn_v2_0_suspend +ffffffff81ef1ed0 t vcn_v2_0_resume +ffffffff81ef1f20 t vcn_v2_0_is_idle +ffffffff81ef1fb0 t vcn_v2_0_wait_for_idle +ffffffff81ef20a0 t vcn_v2_0_set_clockgating_state +ffffffff81ef2130 t vcn_v2_0_set_powergating_state +ffffffff81ef43f0 t vcn_v2_0_dec_ring_get_rptr +ffffffff81ef4480 t vcn_v2_0_dec_ring_get_wptr +ffffffff81ef4520 t vcn_v2_0_dec_ring_set_wptr +ffffffff81ef4650 t vcn_v2_0_enc_ring_get_rptr +ffffffff81ef4720 t vcn_v2_0_enc_ring_get_wptr +ffffffff81ef4810 t vcn_v2_0_enc_ring_set_wptr +ffffffff81ef4900 t vcn_v2_0_set_interrupt_state +ffffffff81ef4930 t vcn_v2_0_process_interrupt +ffffffff81ef49e0 t vcn_v2_0_pause_dpg_mode +ffffffff81ef5340 t vcn_v2_0_enable_clock_gating +ffffffff81ef55c0 t vcn_v2_0_disable_clock_gating +ffffffff81ef59c0 t vcn_v2_0_enable_static_power_gating +ffffffff81ef5ba0 t vcn_v2_0_start_dpg_mode +ffffffff81efa660 t vcn_v2_0_clock_gating_dpg_mode +ffffffff81efb000 t vcn_v2_6_query_poison_status +ffffffff81efb0d0 t vcn_v2_5_early_init +ffffffff81efb410 t vcn_v2_5_sw_init +ffffffff81efb890 t vcn_v2_5_sw_fini +ffffffff81efb960 t vcn_v2_5_hw_init +ffffffff81efc420 t vcn_v2_5_hw_fini +ffffffff81efc560 t vcn_v2_5_suspend +ffffffff81efc590 t vcn_v2_5_resume +ffffffff81efc5e0 t vcn_v2_5_is_idle +ffffffff81efc6d0 t vcn_v2_5_wait_for_idle +ffffffff81efc800 t vcn_v2_5_set_clockgating_state +ffffffff81efc880 t vcn_v2_5_set_powergating_state +ffffffff81efd160 t vcn_v2_5_dec_ring_get_rptr +ffffffff81efd200 t vcn_v2_5_dec_ring_get_wptr +ffffffff81efd2b0 t vcn_v2_5_dec_ring_set_wptr +ffffffff81efd360 t vcn_v2_5_enc_ring_get_rptr +ffffffff81efd450 t vcn_v2_5_enc_ring_get_wptr +ffffffff81efd550 t vcn_v2_5_enc_ring_set_wptr +ffffffff81efd650 t vcn_v2_5_set_interrupt_state +ffffffff81efd680 t vcn_v2_5_process_interrupt +ffffffff81efd7a0 t vcn_v2_5_pause_dpg_mode +ffffffff81efe110 t vcn_v2_5_enable_clock_gating +ffffffff81efe410 t vcn_v2_5_disable_clock_gating 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vcn_v3_0_process_interrupt +ffffffff81f0aa50 t vcn_v3_0_pause_dpg_mode +ffffffff81f0b3c0 t vcn_v3_0_enable_clock_gating +ffffffff81f0b640 t vcn_v3_0_disable_clock_gating +ffffffff81f0bbe0 t vcn_v3_0_start_dpg_mode +ffffffff81f10980 t vcn_v3_0_clock_gating_dpg_mode +ffffffff81f12000 t vcn_v4_0_early_init +ffffffff81f12120 t vcn_v4_0_sw_init +ffffffff81f12380 t vcn_v4_0_sw_fini +ffffffff81f12460 t vcn_v4_0_hw_init +ffffffff81f12ea0 t vcn_v4_0_hw_fini +ffffffff81f12fb0 t vcn_v4_0_suspend +ffffffff81f12fe0 t vcn_v4_0_resume +ffffffff81f13030 t vcn_v4_0_is_idle +ffffffff81f13130 t vcn_v4_0_wait_for_idle +ffffffff81f13260 t vcn_v4_0_set_clockgating_state +ffffffff81f13370 t vcn_v4_0_set_powergating_state +ffffffff81f15920 t vcn_v4_0_unified_ring_get_rptr +ffffffff81f15a00 t vcn_v4_0_unified_ring_get_wptr +ffffffff81f15af0 t vcn_v4_0_unified_ring_set_wptr +ffffffff81f15bf0 t vcn_v4_0_ring_patch_cs_in_place +ffffffff81f15e70 t vcn_v4_0_set_interrupt_state +ffffffff81f15ea0 t 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dm_pp_get_clock_levels_by_type +ffffffff81f40520 T dm_pp_get_clock_levels_by_type_with_latency +ffffffff81f406e0 T dm_pp_get_clock_levels_by_type_with_voltage +ffffffff81f408a0 T dm_pp_notify_wm_clock_changes +ffffffff81f408f0 T dm_pp_apply_power_level_change_request +ffffffff81f40920 T dm_pp_apply_clock_for_voltage_request +ffffffff81f409c0 T dm_pp_get_static_clocks +ffffffff81f40a80 T dm_pp_get_funcs +ffffffff81f40b90 t pp_rv_set_wm_ranges +ffffffff81f40ce0 t pp_rv_set_pme_wa_enable +ffffffff81f40d00 t pp_rv_set_active_display_count +ffffffff81f40d20 t pp_rv_set_min_deep_sleep_dcfclk +ffffffff81f40d40 t pp_rv_set_hard_min_dcefclk_by_freq +ffffffff81f40d60 t pp_rv_set_hard_min_fclk_by_freq +ffffffff81f40d80 t pp_nv_set_display_count +ffffffff81f40de0 t pp_nv_set_hard_min_dcefclk_by_freq +ffffffff81f40e50 t pp_nv_set_min_deep_sleep_dcfclk +ffffffff81f40eb0 t pp_nv_set_voltage_by_freq +ffffffff81f40f40 t pp_nv_set_wm_ranges +ffffffff81f40f90 t pp_nv_set_hard_min_uclk_by_freq +ffffffff81f41000 t pp_nv_get_maximum_sustainable_clocks +ffffffff81f41060 t pp_nv_get_uclk_dpm_states +ffffffff81f410c0 t pp_nv_set_pstate_handshake_support +ffffffff81f41110 t pp_rn_set_wm_ranges +ffffffff81f41160 t pp_rn_get_dpm_clock_table +ffffffff81f42000 T amdgpu_dm_set_psr_caps +ffffffff81f42140 T amdgpu_dm_link_setup_psr +ffffffff81f422d0 T amdgpu_dm_psr_enable +ffffffff81f423d0 T amdgpu_dm_psr_disable +ffffffff81f42450 T amdgpu_dm_psr_disable_all +ffffffff81f43000 T dm_get_elapse_time_in_ns +ffffffff81f43030 T dm_perf_trace_timestamp +ffffffff81f44000 T dc_assert_fp_enabled +ffffffff81f44070 T dc_fpu_begin +ffffffff81f440c0 T dc_fpu_end +ffffffff81f45000 T dal_vector_construct +ffffffff81f450d0 T dal_vector_presized_create +ffffffff81f45350 T dal_vector_create +ffffffff81f45470 T dal_vector_destruct +ffffffff81f454c0 T dal_vector_destroy +ffffffff81f45540 T dal_vector_get_count +ffffffff81f45570 T dal_vector_at_index +ffffffff81f455b0 T dal_vector_remove_at_index +ffffffff81f45640 T dal_vector_set_at_index +ffffffff81f456a0 T dal_vector_insert_at +ffffffff81f457a0 T dal_vector_reserve +ffffffff81f45850 T dal_vector_append +ffffffff81f45950 T dal_vector_clone +ffffffff81f45a00 T dal_vector_capacity +ffffffff81f45a30 T dal_vector_clear +ffffffff81f46000 T fixed_point_to_int_frac +ffffffff81f46200 T convert_float_matrix +ffffffff81f462c0 T reduce_fraction +ffffffff81f47000 T is_rgb_cspace +ffffffff81f47080 T is_lower_pipe_tree_visible +ffffffff81f470e0 T is_upper_pipe_tree_visible +ffffffff81f47140 T is_pipe_tree_visible +ffffffff81f471c0 T build_prescale_params +ffffffff81f48000 T dc_fixpt_from_fraction +ffffffff81f481d0 T dc_fixpt_mul +ffffffff81f48380 T dc_fixpt_sqr +ffffffff81f484f0 T dc_fixpt_recip +ffffffff81f48560 T dc_fixpt_sinc +ffffffff81f48750 T dc_fixpt_sin +ffffffff81f48780 T dc_fixpt_cos +ffffffff81f48870 T dc_fixpt_exp +ffffffff81f48b70 t fixed31_32_exp_from_taylor_series +ffffffff81f48f50 T dc_fixpt_log +ffffffff81f49160 T dc_fixpt_u4d19 +ffffffff81f491a0 T dc_fixpt_u3d19 +ffffffff81f491e0 T dc_fixpt_u2d19 +ffffffff81f49220 T dc_fixpt_u0d19 +ffffffff81f49250 T dc_fixpt_clamp_u0d14 +ffffffff81f492a0 T dc_fixpt_clamp_u0d10 +ffffffff81f492f0 T dc_fixpt_s4d19 +ffffffff81f4a000 T bios_parser_create +ffffffff81f4b3b0 t bios_parser_get_connectors_number +ffffffff81f4b410 t bios_parser_get_connector_id +ffffffff81f4b4a0 t bios_parser_get_src_obj +ffffffff81f4b5b0 t bios_parser_get_i2c_info +ffffffff81f4b7d0 t bios_parser_get_hpd_info +ffffffff81f4b8b0 t bios_parser_get_device_tag +ffffffff81f4bab0 t bios_parser_get_spread_spectrum_info +ffffffff81f4bdb0 t bios_parser_get_ss_entry_number +ffffffff81f4bfe0 t bios_parser_get_embedded_panel_info +ffffffff81f4c530 t bios_parser_get_gpio_pin_info +ffffffff81f4c650 t bios_parser_get_encoder_cap_info +ffffffff81f4c750 t bios_parser_set_scratch_critical_state +ffffffff81f4c760 t bios_parser_is_device_id_supported +ffffffff81f4c820 t bios_parser_encoder_control +ffffffff81f4c860 t bios_parser_transmitter_control +ffffffff81f4c8a0 t bios_parser_enable_crtc +ffffffff81f4c8f0 t bios_parser_adjust_pixel_clock +ffffffff81f4c930 t bios_parser_set_pixel_clock +ffffffff81f4c970 t bios_parser_set_dce_clock +ffffffff81f4c9b0 t bios_parser_enable_spread_spectrum_on_ppll +ffffffff81f4ca00 t bios_parser_program_crtc_timing +ffffffff81f4ca40 t bios_parser_program_display_engine_pll +ffffffff81f4ca80 t bios_parser_enable_disp_power_gating +ffffffff81f4cac0 t bios_parser_destroy +ffffffff81f4cb80 t bios_get_board_layout_info +ffffffff81f4ce10 t get_bios_object +ffffffff81f4cfe0 t get_ss_info_from_ss_info_table +ffffffff81f4d1a0 t get_ss_entry_number_from_ss_info_tbl +ffffffff81f4e000 T firmware_parser_create +ffffffff81f4fde0 t bios_parser_get_connectors_number +ffffffff81f4ff70 t bios_parser_get_connector_id +ffffffff81f50000 t bios_parser_get_src_obj +ffffffff81f502a0 t bios_parser_get_i2c_info +ffffffff81f50530 t bios_parser_get_hpd_info +ffffffff81f506a0 t bios_parser_get_device_tag +ffffffff81f50970 t bios_parser_get_spread_spectrum_info +ffffffff81f50d30 t bios_parser_get_ss_entry_number +ffffffff81f50d60 t bios_parser_get_embedded_panel_info +ffffffff81f50f60 t bios_parser_get_gpio_pin_info +ffffffff81f51080 t bios_parser_get_encoder_cap_info +ffffffff81f511f0 t bios_parser_is_accelerated_mode +ffffffff81f51200 t bios_parser_set_scratch_critical_state +ffffffff81f51210 t bios_parser_is_device_id_supported +ffffffff81f51290 t bios_parser_encoder_control +ffffffff81f512d0 t bios_parser_transmitter_control +ffffffff81f51310 t bios_parser_enable_crtc +ffffffff81f51360 t bios_parser_set_pixel_clock +ffffffff81f513a0 t bios_parser_set_dce_clock +ffffffff81f513e0 t bios_parser_program_crtc_timing +ffffffff81f51420 t bios_parser_enable_disp_power_gating +ffffffff81f51460 t firmware_parser_destroy +ffffffff81f51520 t bios_get_board_layout_info +ffffffff81f519d0 t bios_parser_pack_data_tables +ffffffff81f51a00 t bios_get_atom_dc_golden_table +ffffffff81f51b40 t bios_parser_enable_lvtma_control +ffffffff81f51b90 t bios_parser_get_soc_bb_info +ffffffff81f51ca0 t bios_parser_get_disp_connector_caps_info +ffffffff81f51e00 t bios_parser_get_lttpr_caps +ffffffff81f51f50 t bios_parser_get_lttpr_interop +ffffffff81f52090 t bios_parser_get_connector_speed_cap_info +ffffffff81f521e0 t get_bios_object +ffffffff81f52340 t get_bios_object_from_path_v3 +ffffffff81f53000 T object_id_from_bios_object_id +ffffffff81f54000 T bios_get_image +ffffffff81f54050 T bios_is_accelerated_mode +ffffffff81f540b0 T bios_set_scratch_acc_mode_change +ffffffff81f540f0 T bios_set_scratch_critical_state +ffffffff81f54130 T bios_get_vga_enabled_displays +ffffffff81f55000 T dal_bios_parser_create +ffffffff81f55070 T dal_bios_parser_destroy +ffffffff81f56000 T dal_bios_parser_init_cmd_tbl +ffffffff81f56800 t encoder_control_digx_v3 +ffffffff81f56900 t encoder_control_digx_v4 +ffffffff81f56a00 t encoder_control_digx_v5 +ffffffff81f56b50 t encoder_control_dig1_v1 +ffffffff81f56bd0 t encoder_control_dig2_v1 +ffffffff81f56c50 t encoder_control_dig_v1 +ffffffff81f56cb0 t transmitter_control_v2 +ffffffff81f56e50 t transmitter_control_v3 +ffffffff81f57010 t transmitter_control_v4 +ffffffff81f571c0 t transmitter_control_v1_5 +ffffffff81f57340 t transmitter_control_v1_6 +ffffffff81f574b0 t set_pixel_clock_v3 +ffffffff81f57620 t set_pixel_clock_v5 +ffffffff81f577c0 t set_pixel_clock_v6 +ffffffff81f57970 t set_pixel_clock_v7 +ffffffff81f57b40 t enable_spread_spectrum_on_ppll_v1 +ffffffff81f57c60 t enable_spread_spectrum_on_ppll_v2 +ffffffff81f57d90 t enable_spread_spectrum_on_ppll_v3 +ffffffff81f57ea0 t adjust_display_pll_v2 +ffffffff81f57ff0 t adjust_display_pll_v3 +ffffffff81f58160 t dac1_encoder_control_v1 +ffffffff81f581e0 t dac2_encoder_control_v1 +ffffffff81f58260 t dac1_output_control_v1 +ffffffff81f582c0 t dac2_output_control_v1 +ffffffff81f58320 t set_crtc_using_dtd_timing_v3 +ffffffff81f58490 t set_crtc_timing_v1 +ffffffff81f58630 t enable_crtc_v1 +ffffffff81f586d0 t enable_crtc_mem_req_v1 +ffffffff81f58770 t program_clock_v5 +ffffffff81f58870 t program_clock_v6 +ffffffff81f58990 t external_encoder_control_v3 +ffffffff81f58b40 t enable_disp_power_gating_v2_1 +ffffffff81f58c00 t set_dce_clock_v2_1 +ffffffff81f59000 T dal_firmware_parser_init_cmd_tbl +ffffffff81f593d0 t encoder_control_digx_v1_5 +ffffffff81f595b0 t encoder_control_fallback +ffffffff81f59610 t transmitter_control_v1_6 +ffffffff81f597c0 t transmitter_control_v1_7 +ffffffff81f599b0 t transmitter_control_fallback +ffffffff81f59a10 t set_pixel_clock_v7 +ffffffff81f59c70 t set_pixel_clock_fallback +ffffffff81f59cd0 t set_crtc_using_dtd_timing_v3 +ffffffff81f59e40 t enable_crtc_v1 +ffffffff81f59ee0 t external_encoder_control_v3 +ffffffff81f59f10 t enable_disp_power_gating_v2_1 +ffffffff81f5a070 t enable_disp_power_gating_fallback +ffffffff81f5a0d0 t set_dce_clock_v2_1 +ffffffff81f5a1f0 t get_smu_clock_info_v3_1 +ffffffff81f5a260 t enable_lvtma_control +ffffffff81f5b000 T dal_bios_parser_init_cmd_tbl_helper +ffffffff81f5b0a0 T dal_cmd_table_helper_controller_id_to_atom +ffffffff81f5b1c0 T dal_cmd_table_helper_transmitter_bp_to_atom +ffffffff81f5b240 T dal_cmd_table_helper_encoder_mode_bp_to_atom +ffffffff81f5b2d0 T dal_cmd_table_helper_assign_control_parameter +ffffffff81f5b390 T dal_cmd_table_helper_clock_source_id_to_ref_clk_src +ffffffff81f5b470 T dal_cmd_table_helper_encoder_id_to_atom +ffffffff81f5c000 T dal_bios_parser_init_cmd_tbl_helper2 +ffffffff81f5c0b0 T dal_cmd_table_helper_controller_id_to_atom2 +ffffffff81f5c1c0 T dal_cmd_table_helper_transmitter_bp_to_atom2 +ffffffff81f5c240 T dal_cmd_table_helper_encoder_mode_bp_to_atom2 +ffffffff81f5c2d0 T dal_cmd_table_helper_clock_source_id_to_ref_clk_src2 +ffffffff81f5c3b0 T dal_cmd_table_helper_encoder_id_to_atom2 +ffffffff81f5d000 T dal_cmd_tbl_helper_dce110_get_table ffffffff81f5d030 t encoder_action_to_atom ffffffff81f5d0b0 t engine_bp_to_atom ffffffff81f5d100 t clock_source_id_to_atom -ffffffff81f5d1d0 t clock_source_id_to_atom_phy_clk_src_id -ffffffff81f5d220 t signal_type_to_atom_dig_mode -ffffffff81f5d280 t hpd_sel_to_atom -ffffffff81f5d2c0 t dig_encoder_sel_to_atom -ffffffff81f5d2f0 t phy_id_to_atom -ffffffff81f5d330 t disp_power_gating_action_to_atom -ffffffff81f5d3a0 t dc_clock_type_to_atom -ffffffff81f5d420 t transmitter_color_depth_to_atom -ffffffff81f5e000 T dal_cmd_tbl_helper_dce112_get_table +ffffffff81f5d1a0 t clock_source_id_to_atom_phy_clk_src_id +ffffffff81f5d1f0 t signal_type_to_atom_dig_mode +ffffffff81f5d250 t hpd_sel_to_atom +ffffffff81f5d290 t dig_encoder_sel_to_atom +ffffffff81f5d2c0 t phy_id_to_atom +ffffffff81f5d300 t disp_power_gating_action_to_atom +ffffffff81f5e000 T dal_cmd_tbl_helper_dce112_get_table2 ffffffff81f5e030 t encoder_action_to_atom ffffffff81f5e0b0 t engine_bp_to_atom ffffffff81f5e100 t clock_source_id_to_atom @@ -29442,7 +29438,7 @@ ffffffff81f5e2f0 t phy_id_to_atom ffffffff81f5e330 t disp_power_gating_action_to_atom ffffffff81f5e3a0 t dc_clock_type_to_atom ffffffff81f5e420 t transmitter_color_depth_to_atom -ffffffff81f5f000 T dal_cmd_tbl_helper_dce80_get_table +ffffffff81f5f000 T dal_cmd_tbl_helper_dce112_get_table ffffffff81f5f030 t encoder_action_to_atom ffffffff81f5f0b0 t engine_bp_to_atom ffffffff81f5f100 t clock_source_id_to_atom @@ -29450,15852 +29446,15857 @@ ffffffff81f5f1d0 t clock_source_id_to_atom_phy_clk_src ffffffff81f5f220 t signal_type_to_atom_dig_mode ffffffff81f5f280 t hpd_sel_to_atom ffffffff81f5f2c0 t dig_encoder_sel_to_atom -ffffffff81f5f310 t phy_id_to_atom -ffffffff81f5f350 t disp_power_gating_action_to_atom -ffffffff81f60000 T clk_mgr_helper_get_active_display_cnt -ffffffff81f600e0 T clk_mgr_helper_get_active_plane_cnt -ffffffff81f60190 T clk_mgr_exit_optimized_pwr_state -ffffffff81f60290 T clk_mgr_optimize_pwr_state -ffffffff81f603a0 T dc_clk_mgr_create -ffffffff81f60a80 T dc_destroy_clk_mgr -ffffffff81f61000 T dentist_get_divider_from_did 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rv1_clk_mgr_construct -ffffffff81f650c0 t rv1_update_clocks -ffffffff81f655b0 t rv1_init_clocks -ffffffff81f65640 t rv1_enable_pme_wa -ffffffff81f66000 T rv1_vbios_smu_set_dispclk -ffffffff81f660f0 t rv1_vbios_smu_send_msg_with_param -ffffffff81f66200 T rv1_vbios_smu_set_dprefclk -ffffffff81f67000 T rv2_clk_mgr_construct -ffffffff81f68000 T dentist_get_did_from_divider -ffffffff81f68090 T dcn20_update_clocks_update_dpp_dto -ffffffff81f68160 T dcn20_update_clocks_update_dentist -ffffffff81f68680 T dcn2_update_clocks -ffffffff81f68bf0 T dcn2_read_clocks_from_hw_dentist -ffffffff81f68cc0 T dcn2_update_clocks_fpga -ffffffff81f68e40 T dcn2_init_clocks -ffffffff81f68ee0 T dcn2_get_clock -ffffffff81f68f50 T dcn20_clk_mgr_construct -ffffffff81f690a0 t dcn2_enable_pme_wa -ffffffff81f690f0 t dcn2_are_clock_states_equal -ffffffff81f69160 t dcn2_notify_link_rate_change -ffffffff81f6a000 t dcn201_update_clocks -ffffffff81f6a240 t dcn201_init_clocks -ffffffff81f6a2e0 T dcn201_clk_mgr_construct -ffffffff81f6b000 T rn_clk_mgr_construct -ffffffff81f6b8e0 t rn_update_clocks -ffffffff81f6be80 t rn_set_low_power_state -ffffffff81f6c050 t rn_init_clocks -ffffffff81f6c0f0 t rn_enable_pme_wa -ffffffff81f6c100 t rn_are_clock_states_equal -ffffffff81f6c150 t rn_notify_wm_ranges -ffffffff81f6c4e0 t rn_notify_link_rate_change -ffffffff81f6d000 T rn_vbios_smu_get_smu_version -ffffffff81f6d020 t rn_vbios_smu_send_msg_with_param -ffffffff81f6d1b0 T rn_vbios_smu_set_dispclk -ffffffff81f6d2f0 T rn_vbios_smu_set_dprefclk -ffffffff81f6d360 T rn_vbios_smu_set_hard_min_dcfclk -ffffffff81f6d3e0 T rn_vbios_smu_set_min_deep_sleep_dcfclk -ffffffff81f6d460 T rn_vbios_smu_set_phyclk -ffffffff81f6d4a0 T rn_vbios_smu_set_dppclk -ffffffff81f6d560 T rn_vbios_smu_set_dcn_low_power_state -ffffffff81f6d580 T rn_vbios_smu_enable_48mhz_tmdp_refclk_pwrdwn -ffffffff81f6d5a0 T rn_vbios_smu_enable_pme_wa -ffffffff81f6d5c0 T rn_vbios_smu_is_periodic_retraining_disabled -ffffffff81f6e000 T dcn3_init_clocks -ffffffff81f6e3d0 t dcn3_init_clocks_fpga -ffffffff81f6e3e0 T dcn3_clk_mgr_construct -ffffffff81f6e540 T dcn3_clk_mgr_destroy -ffffffff81f6e5b0 t dcn3_update_clocks -ffffffff81f6ea10 t dcn3_enable_pme_wa -ffffffff81f6ea50 t dcn3_are_clock_states_equal -ffffffff81f6eab0 t dcn3_notify_wm_ranges -ffffffff81f6ed40 t dcn30_notify_link_rate_change -ffffffff81f6ee60 t dcn3_set_hard_min_memclk -ffffffff81f6ef00 t dcn3_set_hard_max_memclk -ffffffff81f6ef60 t dcn3_set_max_memclk -ffffffff81f6efa0 t dcn3_set_min_memclk -ffffffff81f6efe0 t dcn3_get_memclk_states_from_smu -ffffffff81f6f120 t dcn3_is_smu_present -ffffffff81f70000 T dcn30_smu_test_message -ffffffff81f70070 t dcn30_smu_send_msg_with_param -ffffffff81f701d0 T dcn30_smu_get_smu_version -ffffffff81f701f0 T dcn30_smu_check_driver_if_version -ffffffff81f70240 T dcn30_smu_check_msg_header_version -ffffffff81f70290 T dcn30_smu_set_dram_addr_high -ffffffff81f702b0 T dcn30_smu_set_dram_addr_low -ffffffff81f702d0 T dcn30_smu_transfer_wm_table_smu_2_dram -ffffffff81f702f0 T dcn30_smu_transfer_wm_table_dram_2_smu -ffffffff81f70310 T dcn30_smu_set_hard_min_by_freq -ffffffff81f70360 T dcn30_smu_set_hard_max_by_freq -ffffffff81f703b0 T dcn30_smu_get_dpm_freq_by_index -ffffffff81f70400 T dcn30_smu_get_dc_mode_max_dpm_freq -ffffffff81f70450 T dcn30_smu_set_min_deep_sleep_dcef_clk -ffffffff81f70470 T dcn30_smu_set_num_of_displays -ffffffff81f70490 T dcn30_smu_set_display_refresh_from_mall -ffffffff81f704c0 T dcn30_smu_set_external_client_df_cstate_allow -ffffffff81f704e0 T dcn30_smu_set_pme_workaround -ffffffff81f71000 T dcn301_smu_get_smu_version -ffffffff81f71070 t dcn301_smu_send_msg_with_param -ffffffff81f711f0 T dcn301_smu_set_dispclk -ffffffff81f71290 T dcn301_smu_set_dprefclk -ffffffff81f71340 T dcn301_smu_set_hard_min_dcfclk -ffffffff81f713e0 T dcn301_smu_set_min_deep_sleep_dcfclk -ffffffff81f71480 T dcn301_smu_set_dppclk -ffffffff81f71520 T dcn301_smu_set_display_idle_optimization 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dcn20_update_clocks_update_dentist +ffffffff81f69680 T dcn2_update_clocks +ffffffff81f69bf0 T dcn2_read_clocks_from_hw_dentist +ffffffff81f69cc0 T dcn2_update_clocks_fpga +ffffffff81f69e40 T dcn2_init_clocks +ffffffff81f69ee0 T dcn2_get_clock +ffffffff81f69f50 T dcn20_clk_mgr_construct +ffffffff81f6a0a0 t dcn2_enable_pme_wa +ffffffff81f6a0f0 t dcn2_are_clock_states_equal +ffffffff81f6a160 t dcn2_notify_link_rate_change +ffffffff81f6b000 t dcn201_update_clocks +ffffffff81f6b240 t dcn201_init_clocks +ffffffff81f6b2e0 T dcn201_clk_mgr_construct +ffffffff81f6c000 T rn_clk_mgr_construct +ffffffff81f6c8e0 t rn_update_clocks +ffffffff81f6ce80 t rn_set_low_power_state +ffffffff81f6d050 t rn_init_clocks +ffffffff81f6d0f0 t rn_enable_pme_wa +ffffffff81f6d100 t rn_are_clock_states_equal +ffffffff81f6d150 t rn_notify_wm_ranges +ffffffff81f6d4e0 t rn_notify_link_rate_change +ffffffff81f6e000 T rn_vbios_smu_get_smu_version +ffffffff81f6e020 t rn_vbios_smu_send_msg_with_param +ffffffff81f6e1b0 T rn_vbios_smu_set_dispclk +ffffffff81f6e2f0 T rn_vbios_smu_set_dprefclk +ffffffff81f6e360 T rn_vbios_smu_set_hard_min_dcfclk +ffffffff81f6e3e0 T rn_vbios_smu_set_min_deep_sleep_dcfclk +ffffffff81f6e460 T rn_vbios_smu_set_phyclk +ffffffff81f6e4a0 T rn_vbios_smu_set_dppclk +ffffffff81f6e560 T rn_vbios_smu_set_dcn_low_power_state +ffffffff81f6e580 T rn_vbios_smu_enable_48mhz_tmdp_refclk_pwrdwn +ffffffff81f6e5a0 T rn_vbios_smu_enable_pme_wa +ffffffff81f6e5c0 T rn_vbios_smu_is_periodic_retraining_disabled +ffffffff81f6f000 T dcn3_init_clocks +ffffffff81f6f3d0 t dcn3_init_clocks_fpga +ffffffff81f6f3e0 T dcn3_clk_mgr_construct +ffffffff81f6f540 T dcn3_clk_mgr_destroy +ffffffff81f6f5b0 t dcn3_update_clocks +ffffffff81f6fa10 t dcn3_enable_pme_wa +ffffffff81f6fa50 t dcn3_are_clock_states_equal +ffffffff81f6fab0 t dcn3_notify_wm_ranges +ffffffff81f6fd40 t dcn30_notify_link_rate_change +ffffffff81f6fe60 t dcn3_set_hard_min_memclk +ffffffff81f6ff00 t dcn3_set_hard_max_memclk +ffffffff81f6ff60 t dcn3_set_max_memclk +ffffffff81f6ffa0 t dcn3_set_min_memclk +ffffffff81f6ffe0 t dcn3_get_memclk_states_from_smu +ffffffff81f70120 t dcn3_is_smu_present +ffffffff81f71000 T dcn30_smu_test_message +ffffffff81f71070 t dcn30_smu_send_msg_with_param +ffffffff81f711d0 T dcn30_smu_get_smu_version +ffffffff81f711f0 T dcn30_smu_check_driver_if_version +ffffffff81f71240 T dcn30_smu_check_msg_header_version +ffffffff81f71290 T dcn30_smu_set_dram_addr_high +ffffffff81f712b0 T dcn30_smu_set_dram_addr_low +ffffffff81f712d0 T dcn30_smu_transfer_wm_table_smu_2_dram +ffffffff81f712f0 T dcn30_smu_transfer_wm_table_dram_2_smu +ffffffff81f71310 T dcn30_smu_set_hard_min_by_freq +ffffffff81f71360 T dcn30_smu_set_hard_max_by_freq +ffffffff81f713b0 T dcn30_smu_get_dpm_freq_by_index +ffffffff81f71400 T dcn30_smu_get_dc_mode_max_dpm_freq +ffffffff81f71450 T dcn30_smu_set_min_deep_sleep_dcef_clk +ffffffff81f71470 T dcn30_smu_set_num_of_displays +ffffffff81f71490 T dcn30_smu_set_display_refresh_from_mall +ffffffff81f714c0 T dcn30_smu_set_external_client_df_cstate_allow +ffffffff81f714e0 T dcn30_smu_set_pme_workaround +ffffffff81f72000 T dcn301_smu_get_smu_version +ffffffff81f72070 t dcn301_smu_send_msg_with_param +ffffffff81f721f0 T dcn301_smu_set_dispclk +ffffffff81f72290 T dcn301_smu_set_dprefclk +ffffffff81f72340 T dcn301_smu_set_hard_min_dcfclk +ffffffff81f723e0 T dcn301_smu_set_min_deep_sleep_dcfclk +ffffffff81f72480 T dcn301_smu_set_dppclk +ffffffff81f72520 T dcn301_smu_set_display_idle_optimization +ffffffff81f72570 T dcn301_smu_enable_phy_refclk_pwrdwn +ffffffff81f725c0 T dcn301_smu_enable_pme_wa +ffffffff81f725e0 T dcn301_smu_set_dram_addr_high +ffffffff81f72630 T dcn301_smu_set_dram_addr_low +ffffffff81f72680 T dcn301_smu_transfer_dpm_table_smu_2_dram +ffffffff81f726a0 T dcn301_smu_transfer_wm_table_dram_2_smu +ffffffff81f73000 T vg_clk_mgr_construct +ffffffff81f737f0 T vg_clk_mgr_destroy +ffffffff81f73840 t vg_update_clocks +ffffffff81f73bd0 t vg_init_clocks +ffffffff81f73c70 t vg_enable_pme_wa +ffffffff81f73c80 t vg_are_clock_states_equal +ffffffff81f73cd0 t vg_notify_wm_ranges +ffffffff81f75000 T dcn31_update_clocks +ffffffff81f75690 T dcn31_init_clocks +ffffffff81f75740 T dcn31_are_clock_states_equal +ffffffff81f757a0 T dcn31_get_dtb_ref_freq_khz +ffffffff81f757d0 T dcn31_clk_mgr_construct +ffffffff81f75e40 T dcn31_clk_mgr_destroy +ffffffff81f75e90 t dcn31_set_low_power_state +ffffffff81f760a0 t dcn31_enable_pme_wa +ffffffff81f760b0 t dcn31_notify_wm_ranges +ffffffff81f76440 t find_clk_for_voltage +ffffffff81f77000 T dcn31_smu_get_smu_version +ffffffff81f77020 t dcn31_smu_send_msg_with_param +ffffffff81f77220 T dcn31_smu_set_dispclk +ffffffff81f77290 T dcn31_smu_set_dprefclk +ffffffff81f77300 T dcn31_smu_set_hard_min_dcfclk +ffffffff81f77380 T dcn31_smu_set_min_deep_sleep_dcfclk +ffffffff81f77400 T dcn31_smu_set_dppclk +ffffffff81f77470 T dcn31_smu_set_display_idle_optimization +ffffffff81f774c0 T dcn31_smu_enable_phy_refclk_pwrdwn +ffffffff81f77510 T dcn31_smu_enable_pme_wa +ffffffff81f77550 T dcn31_smu_set_dram_addr_high +ffffffff81f77590 T dcn31_smu_set_dram_addr_low +ffffffff81f775d0 T dcn31_smu_transfer_dpm_table_smu_2_dram +ffffffff81f77610 T dcn31_smu_transfer_wm_table_dram_2_smu +ffffffff81f77650 T dcn31_smu_set_zstate_support +ffffffff81f776c0 T dcn31_smu_set_dtbclk +ffffffff81f78000 T dcn314_update_clocks +ffffffff81f78730 T dcn314_are_clock_states_equal +ffffffff81f78790 T dcn314_clk_mgr_construct +ffffffff81f794a0 T dcn314_clk_mgr_destroy +ffffffff81f794f0 t dcn314_enable_pme_wa +ffffffff81f79500 t dcn314_notify_wm_ranges +ffffffff81f7a000 T dcn314_smu_get_smu_version +ffffffff81f7a020 t dcn314_smu_send_msg_with_param +ffffffff81f7a240 T dcn314_smu_set_dispclk +ffffffff81f7a2b0 T dcn314_smu_set_dprefclk +ffffffff81f7a320 T dcn314_smu_set_hard_min_dcfclk +ffffffff81f7a3a0 T dcn314_smu_set_min_deep_sleep_dcfclk +ffffffff81f7a420 T dcn314_smu_set_dppclk +ffffffff81f7a490 T dcn314_smu_set_display_idle_optimization +ffffffff81f7a4e0 T dcn314_smu_enable_phy_refclk_pwrdwn +ffffffff81f7a530 T dcn314_smu_enable_pme_wa +ffffffff81f7a570 T dcn314_smu_set_dram_addr_high +ffffffff81f7a5b0 T dcn314_smu_set_dram_addr_low +ffffffff81f7a5f0 T dcn314_smu_transfer_dpm_table_smu_2_dram +ffffffff81f7a630 T dcn314_smu_transfer_wm_table_dram_2_smu +ffffffff81f7a670 T dcn314_smu_set_zstate_support +ffffffff81f7a6c0 T dcn314_smu_set_dtbclk +ffffffff81f7b000 T dcn315_clk_mgr_construct +ffffffff81f7b9c0 T dcn315_clk_mgr_destroy +ffffffff81f7ba10 t dcn315_update_clocks +ffffffff81f7c000 t dcn315_enable_pme_wa +ffffffff81f7c010 t dcn315_notify_wm_ranges +ffffffff81f7d000 T dcn315_smu_get_smu_version +ffffffff81f7d020 t dcn315_smu_send_msg_with_param +ffffffff81f7d310 T dcn315_smu_set_dispclk +ffffffff81f7d380 T dcn315_smu_set_hard_min_dcfclk +ffffffff81f7d400 T dcn315_smu_set_min_deep_sleep_dcfclk +ffffffff81f7d480 T dcn315_smu_set_dppclk +ffffffff81f7d4f0 T dcn315_smu_set_display_idle_optimization +ffffffff81f7d540 T dcn315_smu_enable_phy_refclk_pwrdwn +ffffffff81f7d590 T dcn315_smu_enable_pme_wa +ffffffff81f7d5d0 T dcn315_smu_set_dram_addr_high +ffffffff81f7d610 T dcn315_smu_set_dram_addr_low +ffffffff81f7d650 T dcn315_smu_transfer_dpm_table_smu_2_dram +ffffffff81f7d690 T dcn315_smu_transfer_wm_table_dram_2_smu +ffffffff81f7d6d0 T dcn315_smu_get_dpref_clk +ffffffff81f7d730 T dcn315_smu_get_dtbclk +ffffffff81f7d790 T dcn315_smu_set_dtbclk +ffffffff81f7e000 T dcn316_clk_mgr_construct +ffffffff81f7e6a0 T dcn316_clk_mgr_destroy +ffffffff81f7e6f0 t dcn316_update_clocks +ffffffff81f7ed20 t dcn316_enable_pme_wa +ffffffff81f7ed30 t dcn316_notify_wm_ranges +ffffffff81f7f0c0 t find_clk_for_voltage +ffffffff81f80000 T dcn316_smu_get_smu_version +ffffffff81f80020 t dcn316_smu_send_msg_with_param +ffffffff81f801b0 T dcn316_smu_set_dispclk +ffffffff81f80220 T dcn316_smu_set_hard_min_dcfclk +ffffffff81f802a0 T dcn316_smu_set_min_deep_sleep_dcfclk +ffffffff81f80320 T dcn316_smu_set_dppclk +ffffffff81f80390 T dcn316_smu_set_display_idle_optimization +ffffffff81f803e0 T dcn316_smu_enable_phy_refclk_pwrdwn +ffffffff81f80430 T dcn316_smu_set_dram_addr_high +ffffffff81f80470 T dcn316_smu_set_dram_addr_low +ffffffff81f804b0 T dcn316_smu_transfer_dpm_table_smu_2_dram +ffffffff81f804f0 T dcn316_smu_transfer_wm_table_dram_2_smu +ffffffff81f80530 T dcn316_smu_enable_pme_wa +ffffffff81f80570 T dcn316_smu_set_dtbclk +ffffffff81f805b0 T dcn316_smu_get_dpref_clk +ffffffff81f80610 T dcn316_smu_get_smu_fclk +ffffffff81f81000 T dcn32_init_clocks +ffffffff81f814e0 T dcn32_clk_mgr_construct +ffffffff81f817b0 t dcn32_dump_clk_registers +ffffffff81f819d0 T dcn32_clk_mgr_destroy +ffffffff81f81a40 t dcn32_update_clocks +ffffffff81f82190 t dcn32_enable_pme_wa +ffffffff81f821d0 t dcn32_are_clock_states_equal +ffffffff81f82240 t dcn32_notify_wm_ranges +ffffffff81f823c0 t dcn32_set_hard_min_memclk +ffffffff81f82460 t dcn32_set_hard_max_memclk +ffffffff81f824c0 t dcn32_get_memclk_states_from_smu +ffffffff81f826b0 t dcn32_is_smu_present +ffffffff81f83000 T dcn32_smu_send_fclk_pstate_message +ffffffff81f83020 t dcn32_smu_send_msg_with_param +ffffffff81f83160 T dcn32_smu_send_cab_for_uclk_message +ffffffff81f83190 T dcn32_smu_transfer_wm_table_dram_2_smu +ffffffff81f831b0 T dcn32_smu_set_pme_workaround +ffffffff81f831d0 T dcn32_smu_set_hard_min_by_freq +ffffffff81f84000 T dc_stream_adjust_vmin_vmax +ffffffff81f84170 T dc_stream_get_last_used_drr_vtotal +ffffffff81f842d0 T dc_stream_get_crtc_position +ffffffff81f84500 T dc_stream_configure_crc +ffffffff81f84750 T dc_stream_get_crc +ffffffff81f84830 T dc_stream_set_dyn_expansion +ffffffff81f84aa0 T dc_stream_set_dither_option +ffffffff81f84c10 T dc_stream_set_gamut_remap +ffffffff81f84d90 T dc_stream_program_csc_matrix +ffffffff81f84fb0 T dc_stream_set_static_screen_params +ffffffff81f85140 T dc_create +ffffffff81f85ae0 t dc_construct_ctx +ffffffff81f85c40 t dc_destruct +ffffffff81f85f10 T dc_hardware_init +ffffffff81f86020 T dc_init_callbacks +ffffffff81f86050 T dc_deinit_callbacks +ffffffff81f86080 T dc_destroy +ffffffff81f860d0 T dc_validate_boot_timing +ffffffff81f86460 T dc_enable_stereo +ffffffff81f86560 T dc_trigger_sync +ffffffff81f86b80 T dc_z10_restore +ffffffff81f86bc0 T dc_z10_save_init +ffffffff81f86c00 T dc_commit_streams +ffffffff81f870a0 t commit_minimal_transition_state +ffffffff81f874e0 T dc_create_state +ffffffff81f87570 t dc_commit_state_no_check +ffffffff81f88a20 T dc_release_state +ffffffff81f88a90 T dc_commit_state +ffffffff81f88be0 T dc_acquire_release_mpc_3dlut +ffffffff81f88cd0 T dc_post_update_surfaces_to_stream +ffffffff81f890f0 T dc_copy_state +ffffffff81f892e0 T dc_retain_state +ffffffff81f89310 T dc_set_generic_gpio_for_stereo +ffffffff81f89420 T dc_check_update_surfaces_for_stream +ffffffff81f8a040 T dc_dmub_update_dirty_rect +ffffffff81f8a2d0 T dc_update_planes_and_stream +ffffffff81f8aa40 t commit_planes_for_stream +ffffffff81f8c1e0 T dc_commit_updates_for_stream +ffffffff81f8c5f0 t copy_surface_update_to_plane +ffffffff81f8c9f0 t copy_stream_update_to_stream +ffffffff81f8d020 T dc_get_current_stream_count +ffffffff81f8d060 T dc_get_stream_at_index +ffffffff81f8d0b0 T dc_interrupt_to_irq_source +ffffffff81f8d0d0 T dc_interrupt_set +ffffffff81f8d120 T dc_interrupt_ack +ffffffff81f8d140 T dc_power_down_on_boot +ffffffff81f8d190 T dc_set_power_state +ffffffff81f8d380 T dc_resume +ffffffff81f8d3f0 T dc_is_dmcu_initialized +ffffffff81f8d440 T dc_is_oem_i2c_device_present +ffffffff81f8d490 T dc_submit_i2c +ffffffff81f8d4c0 T dc_submit_i2c_oem +ffffffff81f8d510 T dc_link_add_remote_sink +ffffffff81f8d6a0 T dc_link_remove_remote_sink +ffffffff81f8d790 T get_clock_requirements_for_state +ffffffff81f8d810 T dc_set_clock +ffffffff81f8d850 T dc_get_clock +ffffffff81f8d890 T dc_set_psr_allow_active +ffffffff81f8d990 T dc_allow_idle_optimizations +ffffffff81f8da30 T dc_unlock_memory_clock_frequency +ffffffff81f8daa0 T dc_lock_memory_clock_frequency +ffffffff81f8db30 T dc_enable_dcmode_clk_limit +ffffffff81f8dc40 t blank_and_force_memclk +ffffffff81f8de20 T dc_is_plane_eligible_for_idle_optimizations +ffffffff81f8de70 T dc_hardware_release +ffffffff81f8dec0 T dc_mclk_switch_using_fw_based_vblank_stretch_shut_down +ffffffff81f8df00 T dc_is_dmub_outbox_supported +ffffffff81f8df60 T dc_enable_dmub_notifications +ffffffff81f8dfc0 T dc_enable_dmub_outbox +ffffffff81f8e000 T dc_process_dmub_aux_transfer_async +ffffffff81f8e1a0 T get_link_index_from_dpia_port_index +ffffffff81f8e250 T dc_process_dmub_set_config_async +ffffffff81f8e340 T dc_process_dmub_set_mst_slots +ffffffff81f8e430 T dc_process_dmub_dpia_hpd_int_enable +ffffffff81f8e500 T dc_disable_accelerated_mode +ffffffff81f8e520 T dc_notify_vsync_int_state +ffffffff81f8f000 T pre_surface_trace +ffffffff81f8f030 T update_surface_trace +ffffffff81f8f060 T post_surface_trace +ffffffff81f8f090 T context_timing_trace +ffffffff81f8f240 T context_clock_trace +ffffffff81f8f270 T dc_status_to_str +ffffffff81f90000 T find_color_matrix +ffffffff81f900b0 T color_space_to_black_color +ffffffff81f90140 T hwss_wait_for_blank_complete +ffffffff81f901f0 T get_mpctree_visual_confirm_color +ffffffff81f90250 T get_surface_visual_confirm_color +ffffffff81f90300 T get_hdr_visual_confirm_color +ffffffff81f903b0 T get_subvp_visual_confirm_color +ffffffff81f904a0 T get_surface_tile_visual_confirm_color +ffffffff81f91000 T get_hpd_gpio +ffffffff81f910e0 T dc_link_wait_for_t12 +ffffffff81f91140 T dc_link_detect_sink +ffffffff81f912f0 T dc_link_is_dp_sink_present +ffffffff81f91570 T reset_cur_dp_mst_topology +ffffffff81f915d0 T dc_link_detect +ffffffff81f92960 T dc_link_get_hpd_state +ffffffff81f929d0 T link_create +ffffffff81f93b20 T link_destroy +ffffffff81f93c80 T dc_link_blank_all_dp_displays +ffffffff81f93d50 T dc_link_blank_dp_stream +ffffffff81f93e60 T dc_link_blank_all_edp_displays +ffffffff81f93f20 T dc_power_alpm_dpcd_enable +ffffffff81f93f90 T dc_link_validate_mode_timing +ffffffff81f944b0 T dc_link_get_backlight_level +ffffffff81f94620 T dc_link_get_target_backlight_pwm +ffffffff81f94730 T dc_link_set_backlight_level +ffffffff81f948a0 T dc_link_set_psr_allow_active +ffffffff81f94b20 T dc_link_get_psr_state +ffffffff81f94c50 T dc_link_setup_psr +ffffffff81f950c0 T dc_link_get_psr_residency +ffffffff81f951c0 T dc_link_set_sink_vtotal_in_psr_active +ffffffff81f95240 T dc_link_get_status +ffffffff81f95270 T core_link_resume +ffffffff81f952b0 t program_hpd_filter +ffffffff81f95440 T dc_link_allocate_mst_payload +ffffffff81f95920 t update_mst_stream_alloc_table +ffffffff81f95ba0 t dc_log_vcp_x_y +ffffffff81f95d30 T dc_link_reduce_mst_payload +ffffffff81f961b0 T dc_link_increase_mst_payload +ffffffff81f96630 T core_link_enable_stream +ffffffff81f97330 t disable_link +ffffffff81f97450 t dc_link_update_sst_payload +ffffffff81f97690 T core_link_set_avmute +ffffffff81f976e0 T core_link_disable_stream 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dp_decide_128b_132b_lttpr_mode +ffffffff81fa59c0 T dp_get_lttpr_mode_override +ffffffff81fa5a90 T dp_overwrite_extended_receiver_cap +ffffffff81fa5ba0 t get_active_converter_info +ffffffff81fa6010 T detect_dp_sink_caps +ffffffff81fa6020 t retrieve_link_cap +ffffffff81fa71c0 T detect_edp_sink_caps +ffffffff81fa7480 T dc_link_set_default_brightness_aux +ffffffff81fa7580 T dc_link_dp_enable_hpd +ffffffff81fa75d0 T dc_link_dp_disable_hpd +ffffffff81fa7620 T dc_link_dp_set_test_pattern +ffffffff81fa8020 t set_crtc_test_pattern +ffffffff81fa84b0 T dp_enable_mst_on_sink +ffffffff81fa8530 T dp_set_fec_enable +ffffffff81fa8640 T dpcd_set_source_specific_data +ffffffff81fa8780 T dpcd_write_cable_id_to_dprx +ffffffff81fa87f0 T dc_link_set_backlight_level_nits +ffffffff81fa88a0 T dc_link_get_backlight_level_nits +ffffffff81fa8940 T dc_link_backlight_enable_aux +ffffffff81fa89b0 T dc_link_read_default_bl_aux +ffffffff81fa8a10 T is_edp_ilr_optimization_required +ffffffff81fa8c80 T dc_link_dp_mst_decide_link_encoding_format +ffffffff81fa8d00 T dpcd_write_128b_132b_sst_payload_allocation_table +ffffffff81fa8ff0 T calculate_sst_avg_time_slots_per_mtp +ffffffff81fa9050 T dpcd_poll_for_allocation_change_trigger +ffffffff81fa9400 T is_dp_128b_132b_signal +ffffffff81fa94d0 T edp_panel_backlight_power_on +ffffffff81fa9580 T dc_link_clear_dprx_states +ffffffff81fa95b0 T dp_receiver_power_ctrl +ffffffff81fa9600 T dp_source_sequence_trace +ffffffff81fa9660 T edp_add_delay_for_T9 +ffffffff81fa96b0 T edp_receiver_ready_T9 +ffffffff81fa9780 T edp_receiver_ready_T7 +ffffffff81fa9920 T dp_disable_link_phy_mst +ffffffff81fa9a30 T dp_retrain_link_dp_test +ffffffff81fa9c50 T dp_set_dsc_on_rx +ffffffff81fa9cc0 T dp_set_dsc_on_stream +ffffffff81faa290 T dp_set_dsc_enable +ffffffff81faa340 T dp_set_dsc_pps_sdp +ffffffff81faa7e0 T dp_update_dsc_config +ffffffff81faa850 t dpcd_set_lt_pattern_and_lane_settings +ffffffff81fab000 T core_link_read_dpcd +ffffffff81fab1a0 T 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dce110_link_encoder_enable_tmds_output +ffffffff81fd5b90 T dce110_link_encoder_enable_lvds_output +ffffffff81fd5c80 T dce110_link_encoder_enable_dp_output +ffffffff81fd5e00 T dce110_link_encoder_enable_dp_mst_output +ffffffff81fd5f80 T dce110_link_encoder_disable_output +ffffffff81fd61a0 T dce110_link_encoder_dp_set_lane_settings +ffffffff81fd6340 T dce110_link_encoder_dp_set_phy_pattern +ffffffff81fd6b40 t set_dp_phy_pattern_hbr2_compliance_cp2520_2 +ffffffff81fd6d50 T dce110_link_encoder_update_mst_stream_allocation_table +ffffffff81fd6fd0 T dce110_link_encoder_connect_dig_be_to_fe +ffffffff81fd7100 T dce110_link_encoder_enable_hpd +ffffffff81fd7130 T dce110_link_encoder_disable_hpd +ffffffff81fd7160 T dce110_link_encoder_get_max_link_cap +ffffffff81fd8000 T dce_mem_input_construct +ffffffff81fd8060 T dce112_mem_input_construct +ffffffff81fd80c0 T dce120_mem_input_construct +ffffffff81fd8120 t dce_mi_program_display_marks +ffffffff81fd83f0 t dce_mi_allocate_dmif +ffffffff81fd8630 t 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dce_transform_get_optimal_number_of_taps +ffffffff81fe2300 T dce110_opp_set_csc_adjustment +ffffffff81fe23c0 t program_color_matrix +ffffffff81fe25f0 T dce110_opp_set_csc_default +ffffffff81fe2730 T dce110_opp_program_regamma_pwl +ffffffff81fe2ff0 T dce110_opp_power_on_regamma_lut +ffffffff81fe30b0 T dce110_opp_set_regamma_mode +ffffffff81fe3120 T dce_transform_construct +ffffffff81fe31a0 t dce_transform_reset +ffffffff81fe31e0 t dce_transform_set_scaler +ffffffff81fe3c80 t dce_transform_set_pixel_storage_depth +ffffffff81fe4140 t dce_transform_set_gamut_remap +ffffffff81fe4480 t program_multi_taps_filter +ffffffff81fe5000 T dmub_abm_create +ffffffff81fe50c0 T dmub_abm_destroy +ffffffff81fe5110 t dmub_abm_init +ffffffff81fe54f0 t dmub_abm_set_level +ffffffff81fe56b0 t dmub_abm_get_current_backlight +ffffffff81fe56e0 t dmub_abm_get_target_backlight +ffffffff81fe5710 t dmub_abm_init_config +ffffffff81fe5840 t dmub_abm_set_pause +ffffffff81fe6000 T dmub_hw_lock_mgr_cmd +ffffffff81fe60b0 T dmub_hw_lock_mgr_inbox0_cmd +ffffffff81fe60f0 T should_use_dmub_lock +ffffffff81fe7000 T dmub_enable_outbox_notification +ffffffff81fe8000 T dmub_psr_create +ffffffff81fe80a0 T dmub_psr_destroy +ffffffff81fe80f0 t dmub_psr_copy_settings +ffffffff81fe85a0 t dmub_psr_enable +ffffffff81fe8730 t dmub_psr_get_state +ffffffff81fe8a20 t dmub_psr_set_level +ffffffff81fe8b10 t dmub_psr_force_static +ffffffff81fe8bc0 t dmub_psr_get_residency +ffffffff81fe8c10 t dmub_psr_set_sink_vtotal_in_psr_active +ffffffff81fe8cd0 t dmub_psr_set_power_opt +ffffffff81fe9000 T dce100_enable_display_power_gating +ffffffff81fe90a0 T dce100_prepare_bandwidth +ffffffff81fe90f0 T dce100_optimize_bandwidth +ffffffff81fe9140 T dce100_hw_sequencer_construct +ffffffff81fea000 T dce100_add_stream_to_ctx +ffffffff81fea0a0 T dce100_validate_plane +ffffffff81fea0e0 T dce100_find_first_free_match_stream_enc_for_link +ffffffff81fea190 T dce100_create_resource_pool +ffffffff81feaf40 t dce100_resource_destruct +ffffffff81feb210 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dce110_enable_stream +ffffffff81fed1d0 T dce110_edp_wait_for_hpd_ready +ffffffff81fed410 T dce110_edp_power_control +ffffffff81fed8d0 T dce110_edp_wait_for_T12 +ffffffff81feda60 T dce110_edp_backlight_control +ffffffff81fedd90 T dce110_enable_audio_stream +ffffffff81fedea0 T dce110_disable_audio_stream +ffffffff81fee010 T dce110_disable_stream +ffffffff81fee150 T dce110_unblank_stream +ffffffff81fee250 T dce110_blank_stream +ffffffff81fee3a0 T dce110_set_avmute +ffffffff81fee3f0 T dce110_enable_accelerated_mode +ffffffff81fee7d0 t power_down_all_hw_blocks +ffffffff81fee990 T dce110_set_safe_displaymarks +ffffffff81feeae0 T dce110_apply_ctx_to_hw +ffffffff81fef3b0 t enable_fbc +ffffffff81fef560 T dce110_power_down +ffffffff81fef660 T dce110_prepare_bandwidth +ffffffff81fef7a0 T dce110_optimize_bandwidth +ffffffff81fef970 T dce110_set_backlight_level +ffffffff81fefa80 T dce110_set_abm_immediate_disable +ffffffff81fefb00 T dce110_set_pipe +ffffffff81fefb70 T dce110_enable_lvds_link_output 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dce110_timing_generator_is_counter_moving +ffffffff81ff9fd0 T dce110_timing_generator_wait_for_vactive +ffffffff81ffa0b0 T dce110_timing_generator_setup_global_swap_lock +ffffffff81ffa210 T dce110_timing_generator_tear_down_global_swap_lock +ffffffff81ffa290 T dce110_timing_generator_enable_advanced_request +ffffffff81ffa330 T dce110_timing_generator_set_lock_master +ffffffff81ffa390 T dce110_timing_generator_enable_reset_trigger +ffffffff81ffa470 T dce110_timing_generator_enable_crtc_reset +ffffffff81ffa660 T dce110_timing_generator_disable_reset_trigger +ffffffff81ffa750 T dce110_timing_generator_did_triggered_reset_occur +ffffffff81ffa7e0 T dce110_timing_generator_disable_vga +ffffffff81ffa850 T dce110_timing_generator_set_overscan_color_black +ffffffff81ffa8f0 T dce110_tg_program_blank_color +ffffffff81ffa9b0 T dce110_tg_set_overscan_color +ffffffff81ffaa10 T dce110_tg_program_timing +ffffffff81ffaa40 T dce110_tg_is_blanked +ffffffff81ffaaa0 T dce110_tg_set_blank +ffffffff81ffab00 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dce110_timing_generator_v_program_blank_color +ffffffff81ffc8c0 t dce110_timing_generator_v_set_colors +ffffffff81ffc9f0 t dce110_timing_generator_v_disable_vga +ffffffff81ffca20 t dce110_timing_generator_v_did_triggered_reset_occur +ffffffff81ffca60 t dce110_timing_generator_v_setup_global_swap_lock +ffffffff81ffca80 t dce110_timing_generator_v_enable_reset_trigger +ffffffff81ffcaa0 t dce110_timing_generator_v_disable_reset_trigger +ffffffff81ffcac0 t dce110_timing_generator_v_tear_down_global_swap_lock +ffffffff81ffcae0 t dce110_timing_generator_v_enable_advanced_request +ffffffff81ffd000 T dce110_transform_v_construct +ffffffff81ffd060 t dce110_xfmv_reset +ffffffff81ffd0c0 t dce110_xfmv_set_scaler +ffffffff81ffd820 t dce110_xfmv_set_pixel_storage_depth +ffffffff81ffd900 t dce110_xfmv_set_gamut_remap +ffffffff81ffd930 t program_multi_taps_filter +ffffffff81ffdd20 t program_viewport +ffffffff81ffe000 T dce112_compressor_power_up_fbc +ffffffff81ffe130 T dce112_compressor_enable_fbc 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dpp1_dppclk_control +ffffffff82010d90 T dpp1_construct +ffffffff82010e10 t dpp1_cm_set_regamma_pwl +ffffffff82011000 T dpp1_cm_set_gamut_remap +ffffffff820111a0 T dpp1_cm_set_output_csc_default +ffffffff82011220 t dpp1_cm_program_color_matrix +ffffffff820113e0 T dpp1_cm_set_output_csc_adjustment +ffffffff820113f0 T dpp1_cm_power_on_regamma_lut +ffffffff82011470 T dpp1_cm_program_regamma_lut +ffffffff82011680 T dpp1_cm_configure_regamma_lut +ffffffff82011780 T dpp1_cm_program_regamma_luta_settings +ffffffff82011910 T dpp1_cm_program_regamma_lutb_settings +ffffffff82011aa0 T dpp1_program_input_csc +ffffffff82011cf0 T dpp1_program_bias_and_scale +ffffffff82011e60 T dpp1_program_degamma_lutb_settings +ffffffff82012010 T dpp1_program_degamma_luta_settings +ffffffff820121c0 T dpp1_power_on_degamma_lut +ffffffff82012240 T dpp1_set_degamma +ffffffff82012430 T dpp1_degamma_ram_select +ffffffff82012490 T dpp1_program_degamma_lut +ffffffff820127b0 T dpp1_set_degamma_pwl +ffffffff82012980 T dpp1_full_bypass +ffffffff82012b20 T dpp1_program_input_lut +ffffffff820131f0 T dpp1_set_hdr_multiplier +ffffffff82014000 T dpp1_dscl_calc_lb_num_partitions +ffffffff820141e0 T dpp1_dscl_is_lb_conf_valid +ffffffff82014220 T dpp1_dscl_set_scaler_manual_scale +ffffffff820155e0 t dpp1_dscl_get_filter_coeffs_64p +ffffffff820156b0 t dpp1_dscl_set_scaler_filter +ffffffff82016000 T hubbub1_wm_read_state +ffffffff82016380 T hubbub1_allow_self_refresh_control +ffffffff82016400 T hubbub1_is_allow_self_refresh_enabled +ffffffff82016470 T hubbub1_verify_allow_pstate_change_high +ffffffff82016630 T hubbub1_wm_change_req_wa +ffffffff820166d0 T hubbub1_program_urgent_watermarks +ffffffff82016ab0 T hubbub1_program_stutter_watermarks +ffffffff82016f10 T hubbub1_program_pstate_watermarks +ffffffff82017160 T hubbub1_program_watermarks +ffffffff82017290 T hubbub1_update_dchub +ffffffff820174c0 T hubbub1_toggle_watermark_change_req +ffffffff82017560 T hubbub1_soft_reset +ffffffff820175a0 T hubbub1_construct +ffffffff82017600 t hubbub1_get_dcc_compression_cap +ffffffff82017820 t hubbub1_dcc_support_swizzle +ffffffff820178b0 t hubbub1_dcc_support_pixel_format +ffffffff82018000 T hubp1_set_blank +ffffffff82018110 T hubp1_clear_underflow +ffffffff82018160 T hubp1_vready_workaround +ffffffff820181f0 T hubp1_program_tiling +ffffffff82018460 T hubp1_program_size +ffffffff820185f0 T hubp1_program_rotation +ffffffff82018760 T hubp1_program_pixel_format +ffffffff82018d30 T hubp1_program_surface_flip_and_addr +ffffffff820194c0 T hubp1_dcc_control +ffffffff82019580 T hubp1_program_surface_config +ffffffff82019690 T hubp1_program_requestor +ffffffff82019a60 T hubp1_program_deadline +ffffffff8201a160 T hubp1_is_flip_pending +ffffffff8201a270 T min_set_viewport +ffffffff8201a560 T hubp1_read_state_common +ffffffff8201b200 T hubp1_read_state +ffffffff8201b4c0 T hubp1_get_cursor_pitch +ffffffff8201b560 T hubp1_cursor_set_attributes +ffffffff8201b810 T hubp1_cursor_set_position +ffffffff8201bb70 T hubp1_clk_cntl +ffffffff8201bbc0 T hubp1_vtg_sel +ffffffff8201bc00 T hubp1_in_blank +ffffffff8201bc70 T hubp1_soft_reset +ffffffff8201bcb0 T hubp1_set_flip_int +ffffffff8201bd00 T hubp1_init +ffffffff8201bd30 T dcn10_hubp_construct +ffffffff8201bda0 t hubp1_setup +ffffffff8201be60 t hubp1_setup_interdependent +ffffffff8201c1d0 t hubp1_set_vm_system_aperture_settings +ffffffff8201c3f0 t hubp1_set_vm_context0_settings +ffffffff8201c6d0 t hubp1_set_hubp_blank_en +ffffffff8201c710 t hubp1_disconnect +ffffffff8201c7a0 t hubp1_disable_control +ffffffff8201c7e0 t hubp1_get_underflow_status +ffffffff8201c850 t hubp1_wait_pipe_read_start +ffffffff8201d000 T dcn10_lock_all_pipes +ffffffff8201d100 T dcn10_log_hw_state +ffffffff8201ed10 T dcn10_did_underflow_occur +ffffffff8201edb0 T dcn10_enable_power_gating_plane +ffffffff8201ef50 T dcn10_disable_vga +ffffffff8201f140 T dcn10_dpp_pg_control +ffffffff8201f390 T dcn10_hubp_pg_control +ffffffff8201f5e0 T dcn10_bios_golden_init +ffffffff8201f740 T dcn10_enable_stream_timing +ffffffff8201fb30 T dcn10_verify_allow_pstate_change_high +ffffffff8201fe90 T dcn10_plane_atomic_disconnect +ffffffff8201ffc0 T dcn10_plane_atomic_power_down +ffffffff82020120 T dcn10_plane_atomic_disable +ffffffff82020280 T dcn10_disable_plane +ffffffff82020440 T dcn10_init_pipes +ffffffff82020b40 T dcn10_init_hw +ffffffff82021130 T dcn10_power_down_on_boot +ffffffff820212d0 T dcn10_reset_hw_ctx_wrap +ffffffff820215f0 T dcn10_update_plane_addr +ffffffff82021710 T dcn10_set_input_transfer_func +ffffffff82021880 T dcn10_set_output_transfer_func +ffffffff82021940 T dcn10_pipe_control_lock +ffffffff82021a10 T dcn10_cursor_lock +ffffffff82021bd0 T dcn10_enable_vblanks_synchronization +ffffffff82022350 T dcn10_enable_timing_synchronization +ffffffff82022740 T dcn10_enable_per_frame_crtc_position_reset +ffffffff82022920 T dcn10_program_gamut_remap +ffffffff82022b20 T dcn10_program_output_csc +ffffffff82022c50 T dcn10_update_visual_confirm_color +ffffffff82022d50 T dcn10_update_mpcc +ffffffff82022fd0 T dcn10_blank_pixel_data +ffffffff82023110 T dcn10_set_hdr_multiplier +ffffffff820231a0 T dcn10_program_pipe +ffffffff82023d70 T dcn10_wait_for_pending_cleared +ffffffff82023e70 T dcn10_post_unlock_program_front_end +ffffffff82024120 T dcn10_prepare_bandwidth +ffffffff820242d0 T dcn10_optimize_bandwidth +ffffffff82024480 T dcn10_set_drr +ffffffff82024580 T dcn10_get_position +ffffffff82024610 T dcn10_set_static_screen_control +ffffffff820246b0 T dcn10_setup_stereo +ffffffff82024810 T dcn10_wait_for_mpcc_disconnect +ffffffff820249c0 T dcn10_dummy_display_power_gating +ffffffff820249f0 T dcn10_update_pending_status +ffffffff82024b30 T dcn10_update_dchub +ffffffff82024b60 T dcn10_set_cursor_position +ffffffff820250a0 T dcn10_set_cursor_attribute +ffffffff820250f0 T dcn10_set_cursor_sdr_white_level +ffffffff820251c0 T dcn10_get_vupdate_offset_from_vsync +ffffffff82025250 T dcn10_calc_vupdate_position +ffffffff820252e0 T dcn10_setup_periodic_interrupt +ffffffff820253f0 T dcn10_setup_vupdate_interrupt +ffffffff820254b0 T dcn10_unblank_stream +ffffffff820255c0 T dcn10_send_immediate_sdp_message +ffffffff82025620 T dcn10_set_clock +ffffffff82025730 T dcn10_get_clock +ffffffff82025790 T dcn10_get_dcc_en_bits +ffffffff82026000 T snprintf_count +ffffffff82026090 T dcn10_clear_status_bits +ffffffff82026240 T dcn10_get_hw_state +ffffffff82028000 T dcn10_hw_sequencer_construct +ffffffff82029000 T dcn10_ipp_construct +ffffffff82029050 T dcn20_ipp_construct +ffffffff820290a0 t dcn10_ipp_destroy +ffffffff8202a000 T dcn10_link_encoder_set_dp_phy_pattern_training_pattern +ffffffff8202a0b0 T dcn10_get_dig_frontend +ffffffff8202a170 T enc1_configure_encoder +ffffffff8202a1f0 T dcn10_psr_program_dp_dphy_fast_training +ffffffff8202a270 T dcn10_psr_program_secondary_packet +ffffffff8202a2f0 T dcn10_is_dig_enabled +ffffffff8202a350 T dcn10_link_encoder_validate_dvi_output +ffffffff8202a400 T dcn10_link_encoder_validate_dp_output +ffffffff8202a440 T dcn10_link_encoder_construct +ffffffff8202a630 T dcn10_link_encoder_validate_output_with_stream +ffffffff8202a820 T dcn10_link_encoder_hw_init +ffffffff8202aa20 T dcn10_aux_initialize +ffffffff8202aab0 T dcn10_link_encoder_destroy +ffffffff8202ab00 T dcn10_link_encoder_setup +ffffffff8202ac50 T dcn10_link_encoder_enable_tmds_output +ffffffff8202ad40 T dcn10_link_encoder_enable_tmds_output_with_clk_pattern_wa +ffffffff8202ae60 T dcn10_link_encoder_enable_dp_output +ffffffff8202afe0 T dcn10_link_encoder_enable_dp_mst_output +ffffffff8202b160 T dcn10_link_encoder_disable_output +ffffffff8202b340 T dcn10_link_encoder_dp_set_lane_settings +ffffffff8202b4e0 T dcn10_link_encoder_dp_set_phy_pattern +ffffffff8202bc00 t set_dp_phy_pattern_hbr2_compliance_cp2520_2 +ffffffff8202be00 T dcn10_link_encoder_update_mst_stream_allocation_table +ffffffff8202c0e0 T dcn10_link_encoder_connect_dig_be_to_fe +ffffffff8202c220 T dcn10_link_encoder_enable_hpd +ffffffff8202c260 T dcn10_link_encoder_disable_hpd +ffffffff8202c2a0 T dcn10_get_dig_mode +ffffffff8202c310 T dcn10_link_encoder_get_max_link_cap +ffffffff8202c390 t program_pattern_symbols +ffffffff8202d000 T mpc1_set_bg_color +ffffffff8202d1e0 T mpc1_get_mpcc +ffffffff8202d270 T mpc1_update_stereo_mix +ffffffff8202d3a0 T mpc1_assert_idle_mpcc +ffffffff8202d470 T mpc1_get_mpcc_for_dpp +ffffffff8202d520 T mpc1_is_mpcc_idle +ffffffff8202d610 T mpc1_assert_mpcc_idle_before_connect +ffffffff8202d750 T mpc1_insert_plane +ffffffff8202dcf0 T mpc1_remove_mpcc +ffffffff8202e0b0 T mpc1_mpc_init +ffffffff8202e3d0 T mpc1_mpc_init_single_inst +ffffffff8202e5c0 T mpc1_init_mpcc_list_from_hw +ffffffff8202e890 T mpc1_read_mpcc_state +ffffffff8202ea20 T mpc1_cursor_lock +ffffffff8202eaa0 T mpc1_get_mpc_out_mux +ffffffff8202eb20 T dcn10_mpc_construct +ffffffff8202eca0 t mpc1_update_blending +ffffffff8202f000 T opp1_program_bit_depth_reduction +ffffffff8202f400 T opp1_set_dyn_expansion +ffffffff8202f570 T opp1_program_fmt +ffffffff8202f870 T opp1_program_stereo +ffffffff8202f9a0 T opp1_pipe_clock_control +ffffffff8202f9e0 T opp1_destroy +ffffffff8202fa30 T dcn10_opp_construct +ffffffff82030000 T optc1_program_global_sync +ffffffff82030150 T optc1_setup_vertical_interrupt0 +ffffffff820301e0 T optc1_setup_vertical_interrupt1 +ffffffff82030250 T optc1_setup_vertical_interrupt2 +ffffffff820302c0 T optc1_program_timing +ffffffff82030970 T optc1_is_two_pixels_per_containter +ffffffff820309c0 T optc1_set_vtg_params +ffffffff82030b00 T optc1_set_blank_data_double_buffer +ffffffff82030b40 T optc1_set_timing_double_buffer +ffffffff82030b80 T optc1_set_blank +ffffffff82030c60 T optc1_is_blanked +ffffffff82030ce0 T optc1_enable_optc_clock +ffffffff82030f00 T optc1_disable_crtc +ffffffff82030ff0 T optc1_program_blank_color +ffffffff820310a0 T optc1_validate_timing +ffffffff820311a0 T optc1_get_vblank_counter +ffffffff82031200 T optc1_lock +ffffffff820312f0 T optc1_unlock +ffffffff82031360 T optc1_get_position +ffffffff820313e0 T optc1_is_counter_moving +ffffffff82031460 T optc1_did_triggered_reset_occur +ffffffff82031500 T optc1_disable_reset_trigger +ffffffff820315c0 T optc1_enable_reset_trigger +ffffffff820316d0 T optc1_enable_crtc_reset +ffffffff82031830 T optc1_wait_for_state +ffffffff82031900 T optc1_set_early_control +ffffffff82031930 T optc1_set_static_screen_control +ffffffff820319d0 T optc1_set_drr +ffffffff82031c00 T optc1_set_vtotal_min_max +ffffffff82031ca0 T optc1_get_crtc_scanoutpos +ffffffff82031db0 T optc1_program_stereo +ffffffff82031fb0 T optc1_is_stereo_left_eye +ffffffff82032020 T optc1_get_hw_timing +ffffffff82032140 T optc1_read_otg_state +ffffffff82032450 T optc1_get_otg_active_size +ffffffff82032560 T optc1_clear_optc_underflow +ffffffff820325b0 T optc1_tg_init +ffffffff82032660 T optc1_is_tg_enabled +ffffffff820326d0 T optc1_is_optc_underflow_occurred +ffffffff82032740 T optc1_configure_crc +ffffffff820329d0 T optc1_get_crc +ffffffff82032ae0 T dcn10_timing_generator_init +ffffffff82032b50 t optc1_enable_crtc +ffffffff82032c50 t optc1_set_test_pattern +ffffffff82033330 t optc1_program_manual_trigger +ffffffff820333e0 t optc1_setup_manual_trigger +ffffffff82034000 T dcn10_find_first_free_match_stream_enc_for_link +ffffffff820340b0 T dcn10_create_resource_pool +ffffffff82035260 t dcn10_resource_construct_fp +ffffffff820353e0 t dcn10_resource_destruct +ffffffff820356f0 t dcn10_destroy_resource_pool +ffffffff82035750 t dcn10_panel_cntl_create +ffffffff820357e0 t dcn10_link_encoder_create +ffffffff820358e0 t dcn10_validate_bandwidth +ffffffff82035960 t dcn10_validate_global +ffffffff82035b40 t dcn10_acquire_idle_pipe_for_layer +ffffffff82035c80 t dcn10_validate_plane +ffffffff82035cd0 t dcn10_add_stream_to_ctx +ffffffff82035e90 t dcn10_patch_unknown_plane_state +ffffffff82035ef0 t read_dce_straps +ffffffff82035f20 t create_audio +ffffffff82035f50 t dcn10_stream_encoder_create +ffffffff82035ff0 t dcn10_hwseq_create +ffffffff820360a0 t dcn10_get_dcc_compression_cap +ffffffff82037000 T enc1_update_generic_info_packet +ffffffff82037430 T enc1_stream_encoder_dp_set_stream_attribute +ffffffff82037900 T enc1_stream_encoder_set_stream_attribute_helper +ffffffff82037980 T enc1_stream_encoder_hdmi_set_stream_attribute +ffffffff82037f70 T enc1_stream_encoder_dvi_set_stream_attribute +ffffffff82038100 T enc1_stream_encoder_set_throttled_vcp_size +ffffffff82038320 T enc1_stream_encoder_update_dp_info_packets +ffffffff820384c0 T enc1_stream_encoder_send_immediate_sdp_message +ffffffff820388d0 T enc1_stream_encoder_stop_dp_info_packets +ffffffff82038aa0 T enc1_stream_encoder_dp_blank +ffffffff82038c10 T enc1_stream_encoder_dp_unblank +ffffffff82038e20 T enc1_stream_encoder_set_avmute +ffffffff82038e60 T enc1_reset_hdmi_stream_attribute +ffffffff82038f30 T get_audio_clock_info +ffffffff82039020 T enc1_se_enable_audio_clock +ffffffff82039080 T enc1_se_enable_dp_audio +ffffffff82039150 T enc1_se_audio_mute_control +ffffffff820391a0 T enc1_se_dp_audio_setup +ffffffff820391b0 t enc1_se_audio_setup +ffffffff82039340 T enc1_se_dp_audio_enable +ffffffff82039590 T enc1_se_dp_audio_disable +ffffffff82039700 T enc1_se_hdmi_audio_setup +ffffffff82039bd0 T enc1_se_hdmi_audio_disable +ffffffff82039c60 T enc1_setup_stereo_sync +ffffffff82039ce0 T enc1_dig_connect_to_otg +ffffffff82039d20 T enc1_dig_source_otg +ffffffff82039d90 T enc1_stream_encoder_dp_get_pixel_format +ffffffff82039e80 T dcn10_stream_encoder_construct +ffffffff82039ee0 t enc1_stream_encoder_update_hdmi_info_packets +ffffffff8203a290 t enc1_stream_encoder_stop_hdmi_info_packets +ffffffff8203b000 T dccg2_update_dpp_dto +ffffffff8203b160 T dccg2_get_dccg_ref_freq +ffffffff8203b220 T dccg2_set_fifo_errdet_ovr_en +ffffffff8203b260 T dccg2_otg_add_pixel +ffffffff8203b300 T dccg2_otg_drop_pixel +ffffffff8203b3a0 T dccg2_init +ffffffff8203b3d0 T dccg2_create +ffffffff8203b480 T dcn_dccg_destroy +ffffffff8203c000 T dpp20_read_state +ffffffff8203c1d0 T dpp2_power_on_obuf +ffffffff8203c2a0 T dpp2_dummy_program_input_lut +ffffffff8203c2d0 T dscl2_calc_lb_num_partitions +ffffffff8203c3f0 T dpp2_cnv_set_alpha_keyer +ffffffff8203c670 T dpp2_set_cursor_attributes +ffffffff8203c7d0 T oppn20_dummy_program_regamma_pwl +ffffffff8203c800 T dpp2_construct +ffffffff8203c880 t dpp2_cnv_setup +ffffffff8203e000 T dpp2_set_degamma_pwl +ffffffff8203e3b0 T dpp2_set_degamma +ffffffff8203e560 T dpp2_cm_set_gamut_remap +ffffffff8203e790 T dpp2_program_input_csc +ffffffff8203e9c0 T dpp20_program_blnd_lut +ffffffff8203f110 T dpp20_program_shaper +ffffffff820410a0 T dpp20_program_3dlut +ffffffff820417a0 t dpp20_set3dlut_ram12 +ffffffff82041970 T dpp2_set_hdr_multiplier +ffffffff82042000 t dsc2_get_enc_caps +ffffffff82042080 t dsc2_read_state +ffffffff82042230 t dsc2_validate_stream +ffffffff82042290 t dsc2_set_config +ffffffff82043620 t dsc2_get_packed_pps +ffffffff820437c0 t dsc2_enable +ffffffff82043970 t dsc2_disable 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hubp2_is_triplebuffer_enabled +ffffffff8204cc00 T hubp2_set_flip_control_surface_gsl +ffffffff8204cc50 T hubp2_is_flip_pending +ffffffff8204cd60 T hubp2_set_blank +ffffffff8204cdc0 T hubp2_set_blank_regs +ffffffff8204cec0 T hubp2_cursor_set_position +ffffffff8204d2e0 T hubp2_clk_cntl +ffffffff8204d330 T hubp2_vtg_sel +ffffffff8204d370 T hubp2_clear_underflow +ffffffff8204d3c0 T hubp2_read_state_common +ffffffff8204dfc0 T hubp2_read_state +ffffffff8204e280 T hubp2_construct +ffffffff8204e2f0 t hubp2_setup +ffffffff8204e7a0 t hubp2_validate_dml_output +ffffffff82050000 T dcn20_set_flip_control_gsl +ffffffff82050050 T dcn20_enable_power_gating_plane +ffffffff82050410 T dcn20_dccg_init +ffffffff82050490 T dcn20_disable_vga +ffffffff82050550 T dcn20_program_triple_buffer +ffffffff820505a0 T dcn20_init_blank +ffffffff82050790 T dcn20_dsc_pg_control +ffffffff82050ba0 T dcn20_dpp_pg_control +ffffffff82050e50 T dcn20_hubp_pg_control +ffffffff82051100 T dcn20_plane_atomic_disable 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dcn301_hw_sequencer_construct +ffffffff820a8000 T dcn301_panel_cntl_construct +ffffffff820a8050 t dcn301_panel_cntl_destroy +ffffffff820a80a0 t dcn301_panel_cntl_hw_init +ffffffff820a82b0 t dcn301_is_panel_backlight_on +ffffffff820a8310 t dcn301_is_panel_powered_on +ffffffff820a83c0 t dcn301_store_backlight_level +ffffffff820a8460 t dcn301_get_16_bit_backlight_from_pwm +ffffffff820a9000 T dcn301_create_resource_pool +ffffffff820aa5a0 t dcn301_destruct +ffffffff820aaae0 t dcn301_destroy_resource_pool +ffffffff820aab40 t dcn301_panel_cntl_create +ffffffff820aabd0 t dcn301_link_encoder_create +ffffffff820aac90 t dcn301_calculate_wm_and_dlg +ffffffff820aad00 t read_dce_straps +ffffffff820aad30 t dcn301_create_audio +ffffffff820aad60 t dcn301_stream_encoder_create +ffffffff820aaee0 t dcn301_hwseq_create +ffffffff820ab000 T dcn302_dpp_pg_control +ffffffff820ab2a0 T dcn302_hubp_pg_control +ffffffff820ab550 T dcn302_dsc_pg_control +ffffffff820ac000 T dcn302_hw_sequencer_construct +ffffffff820ad000 T dcn302_update_bw_bounding_box +ffffffff820ad050 T dcn302_create_resource_pool +ffffffff820ae3e0 t dcn302_resource_destruct +ffffffff820ae8f0 t dcn302_destroy_resource_pool +ffffffff820ae940 t dcn302_panel_cntl_create +ffffffff820ae9d0 t dcn302_link_encoder_create +ffffffff820aea90 t dcn302_get_panel_config_defaults +ffffffff820aeb00 t read_dce_straps +ffffffff820aeb30 t dcn302_create_audio +ffffffff820aeb60 t dcn302_stream_encoder_create +ffffffff820aece0 t dcn302_hwseq_create +ffffffff820af000 T dcn303_dpp_pg_control +ffffffff820af030 T dcn303_hubp_pg_control +ffffffff820af060 T dcn303_dsc_pg_control +ffffffff820af090 T dcn303_enable_power_gating_plane +ffffffff820b0000 T dcn303_hw_sequencer_construct +ffffffff820b1000 T dcn303_update_bw_bounding_box +ffffffff820b1050 T dcn303_create_resource_pool +ffffffff820b2290 t dcn303_resource_destruct +ffffffff820b27b0 t dcn303_destroy_resource_pool +ffffffff820b2800 t dcn303_panel_cntl_create +ffffffff820b2890 t dcn303_link_encoder_create +ffffffff820b2950 t dcn303_get_panel_config_defaults +ffffffff820b29c0 t read_dce_straps +ffffffff820b29f0 t dcn303_create_audio +ffffffff820b2a20 t dcn303_stream_encoder_create +ffffffff820b2ba0 t dcn303_hwseq_create +ffffffff820b3000 T afmt31_powerdown +ffffffff820b3090 T afmt31_poweron +ffffffff820b3120 T afmt31_construct +ffffffff820b4000 T apg31_construct +ffffffff820b4050 t apg31_se_audio_setup +ffffffff820b4160 t apg31_audio_mute_control +ffffffff820b41a0 t apg31_enable +ffffffff820b42b0 t apg31_disable +ffffffff820b5000 T dccg31_update_dpp_dto +ffffffff820b5160 T dccg31_set_dpstreamclk +ffffffff820b52f0 t dccg31_disable_dpstreamclk +ffffffff820b5440 T dccg31_enable_symclk32_se +ffffffff820b5740 T dccg31_disable_symclk32_se +ffffffff820b5a10 T dccg31_enable_symclk32_le +ffffffff820b5bf0 T dccg31_disable_symclk32_le +ffffffff820b5d90 T dccg31_disable_dscclk +ffffffff820b5f50 T dccg31_enable_dscclk +ffffffff820b6120 T dccg31_set_physymclk +ffffffff820b6640 T dccg31_set_dtbclk_dto +ffffffff820b68f0 T dccg31_set_audio_dtbclk_dto +ffffffff820b6a00 T dccg31_get_dccg_ref_freq +ffffffff820b6a30 T dccg31_set_dispclk_change_mode +ffffffff820b6a80 T dccg31_init +ffffffff820b6fe0 T dccg31_otg_add_pixel +ffffffff820b7020 T dccg31_otg_drop_pixel +ffffffff820b7060 T dccg31_create +ffffffff820b8000 T dcn31_link_encoder_set_dio_phy_mux +ffffffff820b8390 T dcn31_link_encoder_construct +ffffffff820b8590 T dcn31_link_encoder_construct_minimal +ffffffff820b8610 T dcn31_link_encoder_enable_dp_output +ffffffff820b8850 T dcn31_link_encoder_enable_dp_mst_output +ffffffff820b8a90 T dcn31_link_encoder_disable_output +ffffffff820b8d20 T dcn31_link_encoder_is_in_alt_mode +ffffffff820b8e60 T dcn31_link_encoder_get_max_link_cap +ffffffff820b8fd0 t enc31_hw_init +ffffffff820ba000 T dcn31_hpo_dp_link_enc_enable +ffffffff820ba160 T dcn31_hpo_dp_link_enc_disable +ffffffff820ba1d0 T dcn31_hpo_dp_link_enc_set_link_test_pattern +ffffffff820bab00 T dcn31_hpo_dp_link_enc_update_stream_allocation_table +ffffffff820bad90 T dcn31_hpo_dp_link_enc_set_throttled_vcp_size +ffffffff820bb030 T dcn31_hpo_dp_link_enc_read_state +ffffffff820bb2e0 T dcn31_hpo_dp_link_enc_enable_dp_output +ffffffff820bb3e0 T dcn31_hpo_dp_link_enc_disable_output +ffffffff820bb520 T dcn31_hpo_dp_link_enc_set_ffe +ffffffff820bb610 T hpo_dp_link_encoder31_construct +ffffffff820bb670 t dcn31_hpo_dp_link_enc_is_in_alt_mode +ffffffff820bc000 T dcn31_hpo_dp_stream_encoder_construct +ffffffff820bc070 t dcn31_hpo_dp_stream_enc_enable_stream +ffffffff820bc1b0 t dcn31_hpo_dp_stream_enc_dp_unblank +ffffffff820bc460 t dcn31_hpo_dp_stream_enc_dp_blank +ffffffff820bc560 t dcn31_hpo_dp_stream_enc_disable +ffffffff820bc5d0 t dcn31_hpo_dp_stream_enc_set_stream_attribute +ffffffff820bce80 t dcn31_hpo_dp_stream_enc_update_dp_info_packets +ffffffff820bd040 t dcn31_hpo_dp_stream_enc_stop_dp_info_packets +ffffffff820bd1d0 t dcn31_hpo_dp_stream_enc_set_dsc_pps_info_packet +ffffffff820bd470 t dcn31_hpo_dp_stream_enc_map_stream_to_link +ffffffff820bd570 t dcn31_hpo_dp_stream_enc_mute_control +ffffffff820bd5e0 t dcn31_hpo_dp_stream_enc_audio_setup +ffffffff820bd690 t dcn31_hpo_dp_stream_enc_audio_enable +ffffffff820bd760 t dcn31_hpo_dp_stream_enc_audio_disable +ffffffff820bd910 t dcn31_hpo_dp_stream_enc_read_state +ffffffff820bdaa0 t dcn31_set_hblank_min_symbol_width +ffffffff820be000 T hubbub31_init_dchub_sys_ctx +ffffffff820be1f0 T hubbub31_construct +ffffffff820be290 t hubbub31_get_dcc_compression_cap +ffffffff820be480 t hubbub31_get_dchub_ref_freq +ffffffff820be560 t hubbub31_program_watermarks +ffffffff820bfe20 t hubbub31_verify_allow_pstate_change_high +ffffffff820bffe0 t dcn31_program_det_size +ffffffff820c01c0 t dcn31_program_compbuf_size +ffffffff820c0440 t dcn31_init_crb +ffffffff820c1000 T hubp31_set_unbounded_requesting +ffffffff820c1090 T hubp31_soft_reset +ffffffff820c10e0 T hubp31_construct +ffffffff820c1150 t hubp31_program_extended_blank +ffffffff820c2000 T dcn31_init_hw +ffffffff820c2960 T dcn31_dsc_pg_control +ffffffff820c2cb0 T dcn31_enable_power_gating_plane +ffffffff820c2f10 T dcn31_update_info_frame +ffffffff820c2fe0 T dcn31_z10_save_init +ffffffff820c30a0 T dcn31_z10_restore +ffffffff820c3180 T dcn31_hubp_pg_control +ffffffff820c34a0 T dcn31_init_sys_ctx +ffffffff820c3550 T dcn31_reset_hw_ctx_wrap +ffffffff820c38c0 T dcn31_setup_hpo_hw_control +ffffffff820c4000 T dcn31_hw_sequencer_construct +ffffffff820c5000 T optc31_immediate_disable_crtc +ffffffff820c5100 T optc31_set_drr +ffffffff820c5320 T optc3_init_odm +ffffffff820c5490 T dcn31_timing_generator_init +ffffffff820c5500 t optc31_enable_crtc +ffffffff820c5600 t optc31_disable_crtc +ffffffff820c56e0 t optc31_set_odm_combine +ffffffff820c6000 T dcn31_panel_cntl_construct +ffffffff820c6040 t dcn31_panel_cntl_destroy +ffffffff820c6090 t dcn31_panel_cntl_hw_init +ffffffff820c6180 t dcn31_is_panel_backlight_on +ffffffff820c6220 t dcn31_is_panel_powered_on +ffffffff820c62d0 t dcn31_store_backlight_level +ffffffff820c6390 t dcn31_get_16_bit_backlight_from_pwm +ffffffff820c7000 T dcn31_populate_dml_pipes_from_context +ffffffff820c7350 T dcn31_calculate_wm_and_dlg +ffffffff820c73c0 T dcn31_populate_dml_writeback_from_context +ffffffff820c7420 T dcn31_set_mcif_arb_params +ffffffff820c7480 T dcn31_validate_bandwidth +ffffffff820c7870 T dcn31_create_resource_pool +ffffffff820c8c10 t dcn31_resource_destruct +ffffffff820c9270 t dcn31_destroy_resource_pool +ffffffff820c92d0 t dcn31_panel_cntl_create +ffffffff820c9340 t dcn31_link_encoder_create +ffffffff820c9400 t dcn31_link_enc_create_minimal +ffffffff820c94a0 t dcn31_get_panel_config_defaults +ffffffff820c9520 t read_dce_straps +ffffffff820c9550 t dcn31_create_audio +ffffffff820c9580 t dcn31_stream_encoder_create +ffffffff820c9700 t dcn31_hpo_dp_stream_encoder_create +ffffffff820c98c0 t dcn31_hpo_dp_link_encoder_create +ffffffff820c9950 t dcn31_hwseq_create +ffffffff820ca000 T vpg31_powerdown +ffffffff820ca090 T vpg31_poweron +ffffffff820ca120 T vpg31_construct +ffffffff820cb000 T dccg314_create +ffffffff820cb0b0 t dccg314_set_dpstreamclk +ffffffff820cb480 t dccg314_set_dtbclk_dto +ffffffff820cb670 t dccg314_set_pixel_rate_div +ffffffff820cb9e0 t dccg314_set_valid_pixel_rate +ffffffff820cba50 t dccg314_dpp_root_clock_control +ffffffff820cc000 T dcn314_dio_stream_encoder_construct +ffffffff820cc070 t enc314_stream_encoder_hdmi_set_stream_attribute +ffffffff820cc660 t enc314_stream_encoder_dvi_set_stream_attribute +ffffffff820cc870 t enc314_stream_encoder_dp_blank +ffffffff820cc8c0 t enc314_stream_encoder_dp_unblank +ffffffff820ccc00 t enc314_read_state +ffffffff820ccd60 t enc314_dp_set_dsc_config +ffffffff820ccdb0 t enc314_dp_set_odm_combine +ffffffff820ccdf0 t enc314_set_dig_input_mode +ffffffff820cce40 t enc314_enable_fifo +ffffffff820ccee0 t enc314_disable_fifo +ffffffff820ccf30 t enc314_reset_fifo +ffffffff820ce000 T dcn314_update_odm +ffffffff820ce610 T dcn314_dsc_pg_control +ffffffff820ce9e0 T dcn314_enable_power_gating_plane +ffffffff820cec70 T dcn314_calculate_dccg_k1_k2_values +ffffffff820cee00 T dcn314_set_pixels_per_cycle +ffffffff820ceef0 T dcn314_dpp_root_clock_control +ffffffff820cef50 T dcn314_hubp_pg_control +ffffffff820d0000 T dcn314_hw_sequencer_construct +ffffffff820d1000 T dcn314_timing_generator_init +ffffffff820d1070 t optc314_enable_crtc +ffffffff820d1170 t optc314_disable_crtc +ffffffff820d1250 t optc314_phantom_crtc_post_enable +ffffffff820d1310 t optc314_set_odm_bypass +ffffffff820d1480 t optc314_set_odm_combine +ffffffff820d1780 t optc314_set_h_timing_div_manual_mode +ffffffff820d2000 T dcn314_validate_bandwidth +ffffffff820d24a0 T dcn314_create_resource_pool +ffffffff820d3780 t dcn314_resource_destruct +ffffffff820d3de0 t dcn314_destroy_resource_pool +ffffffff820d3e40 t dcn31_panel_cntl_create +ffffffff820d3eb0 t dcn31_link_encoder_create +ffffffff820d3f70 t dcn31_link_enc_create_minimal +ffffffff820d4010 t dcn314_populate_dml_pipes_from_context +ffffffff820d40a0 t dcn314_update_bw_bounding_box +ffffffff820d40f0 t dcn314_get_panel_config_defaults +ffffffff820d4170 t read_dce_straps +ffffffff820d41a0 t dcn31_create_audio +ffffffff820d41d0 t dcn314_stream_encoder_create +ffffffff820d4350 t dcn31_hpo_dp_stream_encoder_create +ffffffff820d4510 t dcn31_hpo_dp_link_encoder_create +ffffffff820d45a0 t dcn314_hwseq_create +ffffffff820d5000 T dcn315_create_resource_pool +ffffffff820d6270 t dcn315_resource_destruct +ffffffff820d68d0 t dcn315_destroy_resource_pool +ffffffff820d6930 t dcn31_panel_cntl_create +ffffffff820d69a0 t dcn31_link_encoder_create +ffffffff820d6a60 t dcn31_link_enc_create_minimal +ffffffff820d6b00 t dcn315_populate_dml_pipes_from_context +ffffffff820d71a0 t dcn315_get_panel_config_defaults +ffffffff820d7220 t read_dce_straps +ffffffff820d7250 t dcn31_create_audio +ffffffff820d7280 t dcn315_stream_encoder_create +ffffffff820d7400 t dcn31_hpo_dp_stream_encoder_create +ffffffff820d75c0 t dcn31_hpo_dp_link_encoder_create +ffffffff820d7650 t dcn31_hwseq_create +ffffffff820d8000 T dcn316_create_resource_pool +ffffffff820d92b0 t dcn316_resource_destruct +ffffffff820d9910 t dcn316_destroy_resource_pool +ffffffff820d9970 t dcn31_panel_cntl_create +ffffffff820d99e0 t dcn31_link_encoder_create +ffffffff820d9aa0 t dcn31_link_enc_create_minimal +ffffffff820d9b40 t dcn316_populate_dml_pipes_from_context +ffffffff820d9e70 t dcn316_get_panel_config_defaults +ffffffff820d9ef0 t read_dce_straps +ffffffff820d9f20 t dcn31_create_audio +ffffffff820d9f50 t dcn316_stream_encoder_create +ffffffff820da0d0 t dcn31_hpo_dp_stream_encoder_create +ffffffff820da290 t dcn31_hpo_dp_link_encoder_create +ffffffff820da320 t dcn31_hwseq_create +ffffffff820db000 T dccg32_create +ffffffff820db0b0 t dccg32_get_dccg_ref_freq +ffffffff820db0e0 t dccg32_otg_add_pixel +ffffffff820db120 t dccg32_otg_drop_pixel +ffffffff820db160 t dccg32_set_dpstreamclk +ffffffff820db490 t dccg32_set_dtbclk_dto +ffffffff820db690 t dccg32_set_pixel_rate_div +ffffffff820dba60 t dccg32_set_valid_pixel_rate +ffffffff820dc000 T enc32_hw_init +ffffffff820dc090 T dcn32_link_encoder_enable_dp_output +ffffffff820dc0e0 T dcn32_link_encoder_construct +ffffffff820dc2c0 t dcn32_link_encoder_is_in_alt_mode +ffffffff820dc340 t dcn32_link_encoder_get_max_link_cap +ffffffff820dd000 T dcn32_dio_stream_encoder_construct +ffffffff820dd070 t enc32_stream_encoder_hdmi_set_stream_attribute +ffffffff820dd5a0 t enc32_stream_encoder_dvi_set_stream_attribute +ffffffff820dd720 t enc32_stream_encoder_dp_unblank +ffffffff820ddbe0 t enc32_read_state +ffffffff820ddd40 t enc32_dp_set_dsc_config +ffffffff820ddd90 t enc32_dp_set_odm_combine +ffffffff820dddd0 t enc32_set_dig_input_mode +ffffffff820de000 T dpp32_construct +ffffffff820de060 t dscl32_calc_lb_num_partitions +ffffffff820df000 T hpo_dp_link_encoder32_construct +ffffffff820df060 t dcn32_hpo_dp_link_enc_is_in_alt_mode +ffffffff820e0000 T dcn32_program_det_size +ffffffff820e01a0 T hubbub32_program_urgent_watermarks +ffffffff820e0910 T hubbub32_program_stutter_watermarks +ffffffff820e0d60 T hubbub32_program_pstate_watermarks +ffffffff820e11f0 T hubbub32_program_usr_watermarks +ffffffff820e1440 T hubbub32_force_usr_retraining_allow +ffffffff820e14c0 T hubbub32_force_wm_propagate_to_pipes +ffffffff820e1560 T hubbub32_construct +ffffffff820e15e0 t hubbub32_wm_read_state +ffffffff820e1a60 t hubbub32_program_watermarks +ffffffff820e1b70 t hubbub32_init_watermarks +ffffffff820e1fb0 t dcn32_program_compbuf_size +ffffffff820e2230 t dcn32_init_crb +ffffffff820e3000 T hubp32_update_force_pstate_disallow +ffffffff820e3090 T hubp32_update_mall_sel +ffffffff820e3120 T hubp32_prepare_subvp_buffering +ffffffff820e31c0 T hubp32_phantom_hubp_post_enable +ffffffff820e32d0 T hubp32_cursor_set_attributes +ffffffff820e3590 T hubp32_construct +ffffffff820e4000 T dcn32_dsc_pg_control +ffffffff820e4310 T dcn32_enable_power_gating_plane +ffffffff820e44b0 T dcn32_hubp_pg_control +ffffffff820e4720 T dcn32_apply_idle_power_optimizations +ffffffff820e4990 t dcn32_calculate_cab_allocation +ffffffff820e4d40 T dcn32_commit_subvp_config +ffffffff820e4df0 T dcn32_subvp_pipe_control_lock +ffffffff820e4fc0 T dcn32_set_mcm_luts +ffffffff820e5150 T dcn32_set_input_transfer_func +ffffffff820e5290 T dcn32_set_output_transfer_func +ffffffff820e54a0 T dcn32_subvp_update_force_pstate +ffffffff820e5610 T dcn32_update_mall_sel +ffffffff820e5790 T dcn32_program_mall_pipe_config +ffffffff820e5870 T dcn32_init_hw +ffffffff820e6080 T dcn32_update_odm +ffffffff820e6690 T dcn32_calculate_dccg_k1_k2_values +ffffffff820e6890 T dcn32_is_dp_dig_pixel_rate_div_policy +ffffffff820e6920 T dcn32_set_pixels_per_cycle +ffffffff820e6a60 T dcn32_unblank_stream +ffffffff820e6c30 T dcn32_disable_link_output +ffffffff820e6ec0 T dcn32_update_phantom_vp_position +ffffffff820e6fe0 T dcn32_dsc_pg_status +ffffffff820e70c0 T dcn32_update_dsc_pg +ffffffff820e8000 T dcn32_hw_sequencer_init_functions +ffffffff820e9000 t mmhubbub32_warmup_mcif +ffffffff820e9210 t mmhubbub32_config_mcif_buf +ffffffff820e96c0 t mmhubbub32_config_mcif_arb +ffffffff820e9ad0 T dcn32_mmhubbub_construct +ffffffff820ea000 t mpc32_mpc_init +ffffffff820ea220 t mpc32_program_post1dlut +ffffffff820ead00 t mpc32_program_shaper +ffffffff820ecfb0 t mpc32_program_3dlut +ffffffff820ed8a0 T dcn32_mpc_construct +ffffffff820ed960 t mpc32_power_on_shaper_3dlut +ffffffff820edb90 t mpc32_set3dlut_ram12 +ffffffff820ee000 T optc32_set_h_timing_div_manual_mode +ffffffff820ee040 T dcn32_timing_generator_init +ffffffff820ee0b0 t optc32_enable_crtc +ffffffff820ee1b0 t optc32_disable_crtc +ffffffff820ee290 t optc32_phantom_crtc_post_enable +ffffffff820ee350 t optc32_disable_phantom_otg +ffffffff820ee390 t optc32_set_drr +ffffffff820ee5e0 t optc32_set_odm_bypass +ffffffff820ee750 t optc32_set_odm_combine +ffffffff820ef000 T dcn32_panel_cntl_create +ffffffff820ef070 T dcn32_acquire_post_bldn_3dlut +ffffffff820ef160 T dcn32_release_post_bldn_3dlut +ffffffff820ef210 T dcn32_retain_phantom_pipes +ffffffff820ef2e0 T dcn32_remove_phantom_pipes +ffffffff820ef450 T dcn32_add_phantom_pipes +ffffffff820ef890 T dcn32_validate_bandwidth +ffffffff820efd50 T dcn32_populate_dml_pipes_from_context +ffffffff820f0130 T dcn32_calculate_wm_and_dlg +ffffffff820f01a0 T dcn32_create_resource_pool +ffffffff820f0250 t dcn32_resource_construct +ffffffff820fc680 T dcn32_acquire_idle_pipe_for_head_pipe_in_layer +ffffffff820fc8c0 T dcn32_calc_num_avail_chans_for_mall +ffffffff820fc930 t dcn32_mpc_create +ffffffff821012f0 t dcn32_resource_destruct +ffffffff82101960 t dcn32_destroy_resource_pool +ffffffff821019c0 t dcn32_link_encoder_create +ffffffff82102920 t dcn32_update_bw_bounding_box +ffffffff82102970 t read_dce_straps +ffffffff821029a0 t dcn32_create_audio +ffffffff82102ce0 t dcn32_stream_encoder_create +ffffffff82104b60 t dcn32_hpo_dp_stream_encoder_create +ffffffff82105840 t dcn32_hpo_dp_link_encoder_create +ffffffff82105cc0 t dcn32_hwseq_create +ffffffff82106160 t dcn32_vpg_create +ffffffff82107000 T dcn32_helper_calculate_num_ways_for_subvp +ffffffff821071e0 T dcn32_merge_pipes_for_subvp +ffffffff821073b0 T dcn32_all_pipes_have_stream_and_plane +ffffffff82107440 T dcn32_subvp_in_use +ffffffff821074d0 T dcn32_mpo_in_use +ffffffff82107540 T dcn32_any_surfaces_rotated +ffffffff821075d0 T dcn32_determine_det_override +ffffffff82107910 T dcn32_set_det_allocations +ffffffff82107a90 T dcn32_save_mall_state +ffffffff82107b40 T dcn32_restore_mall_state +ffffffff82108000 T dcn321_link_encoder_construct +ffffffff82109000 T dcn321_create_resource_pool +ffffffff821090b0 t dcn321_resource_construct +ffffffff82115480 t dcn321_mpc_create +ffffffff82119e40 t dcn321_resource_destruct +ffffffff8211a4b0 t dcn321_destroy_resource_pool +ffffffff8211a510 t dcn321_link_encoder_create +ffffffff8211b470 t dcn321_update_bw_bounding_box +ffffffff8211b4c0 t read_dce_straps +ffffffff8211b4f0 t dcn321_create_audio +ffffffff8211b830 t dcn321_stream_encoder_create +ffffffff8211d6b0 t dcn321_hpo_dp_stream_encoder_create +ffffffff8211e390 t dcn321_hpo_dp_link_encoder_create +ffffffff8211e810 t dcn321_hwseq_create +ffffffff8211ecb0 t dcn321_vpg_create +ffffffff82120000 T bw_int_to_fixed_nonconst +ffffffff82120090 T bw_frc_to_fixed +ffffffff82120260 T bw_floor2 +ffffffff82120310 T bw_ceil2 +ffffffff82120390 T bw_mul +ffffffff82121000 T convert_to_custom_float_format +ffffffff82122000 T bw_calcs_init +ffffffff82122e30 T bw_calcs +ffffffff82124760 t calculate_bandwidth +ffffffff8212c000 T scaler_settings_calculation +ffffffff8212c380 T mode_support_and_system_configuration +ffffffff82132160 T display_pipe_configuration +ffffffff821329a0 T dispclkdppclkdcfclk_deep_sleep_prefetch_parameters_watermarks_and_performance_calculation +ffffffff82138000 T dcn_bw_mod +ffffffff82138060 T dcn_bw_min2 +ffffffff821380a0 T dcn_bw_max +ffffffff821380d0 T dcn_bw_max2 +ffffffff82138110 T dcn_bw_floor2 +ffffffff821381b0 T dcn_bw_floor +ffffffff821381e0 T dcn_bw_ceil +ffffffff82138220 T dcn_bw_ceil2 +ffffffff821382d0 T dcn_bw_max3 +ffffffff82138370 T dcn_bw_max5 +ffffffff821384e0 T dcn_bw_pow +ffffffff82138570 T dcn_bw_fabs +ffffffff821385d0 T dcn_bw_log +ffffffff82139000 T swizzle_mode_to_macro_tile_size +ffffffff82139090 T dcn_validate_bandwidth +ffffffff8213b330 T dcn_bw_sync_calcs_and_dml +ffffffff8213b580 t dcn_bw_calc_rq_dlg_ttu +ffffffff8213bf00 T dcn_find_dcfclk_suits_all +ffffffff8213c360 T dcn_bw_update_from_pplib_fclks +ffffffff8213c4f0 T dcn_bw_update_from_pplib_dcfclks +ffffffff8213c5c0 T dcn_get_soc_clks +ffffffff8213c640 T dcn_bw_notify_pplib_of_wm_ranges +ffffffff8213d000 T dcn20_populate_dml_writeback_from_context +ffffffff8213d180 T dcn20_fpu_set_wb_arb_params +ffffffff8213d330 T dcn20_calculate_dlg_params +ffffffff8213db10 T dcn20_populate_dml_pipes_from_context +ffffffff8213ea10 T dcn20_calculate_wm +ffffffff8213f1b0 T dcn20_update_bounding_box +ffffffff8213f430 T dcn20_cap_soc_clocks +ffffffff8213f7b0 T dcn20_patch_bounding_box +ffffffff8213f920 T dcn20_validate_bandwidth_fp +ffffffff8213fab0 t dcn20_validate_bandwidth_internal +ffffffff8213fe90 T dcn20_fpu_set_wm_ranges +ffffffff8213ff30 T dcn20_fpu_adjust_dppclk +ffffffff8213ffd0 T dcn21_populate_dml_pipes_from_context +ffffffff821400d0 T dcn21_validate_bandwidth_fp +ffffffff82140b50 T dcn21_update_bw_bounding_box +ffffffff82141030 T dcn21_clk_mgr_set_bw_params_wm_table +ffffffff82141090 T dcn201_populate_dml_writeback_from_context_fpu +ffffffff821413a0 t calculate_wm_set_for_vlevel +ffffffff82142000 T dml20_recalculate +ffffffff82142740 t dml20_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation +ffffffff82147da0 T dml20_ModeSupportAndSystemConfigurationFull +ffffffff8214ed30 t TruncToValidBPP +ffffffff8214ef10 t CalculateVMAndRowBytes +ffffffff8214f5a0 t CalculatePrefetchSourceLines +ffffffff8214f760 t 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dml20v2_rq_dlg_get_rq_params +ffffffff82165660 T dml20v2_rq_dlg_get_dlg_reg +ffffffff821675b0 t get_surf_rq_param +ffffffff82167e30 t calculate_ttu_cursor +ffffffff82169000 T dml21_recalculate +ffffffff82169700 t DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation +ffffffff8216f0b0 T dml21_ModeSupportAndSystemConfigurationFull +ffffffff82175190 t TruncToValidBPP +ffffffff82175720 t CalculateDCFCLKDeepSleep +ffffffff82175a60 t CalculateVMAndRowBytes +ffffffff821762d0 t CalculatePrefetchSourceLines +ffffffff82176490 t CalculateWriteBackDelay +ffffffff82176760 t CalculatePrefetchSchedulePerPlane +ffffffff82176f70 t CalculateUrgentBurstFactor +ffffffff82177380 t CalculateFlipSchedule +ffffffff82177870 t CalculateWatermarksAndDRAMSpeedChangeSupport +ffffffff821788d0 t CalculatePrefetchSchedule +ffffffff8217a000 T dml21_rq_dlg_get_rq_reg +ffffffff8217a490 t dml_rq_dlg_get_rq_params +ffffffff8217a660 T dml21_rq_dlg_get_dlg_reg +ffffffff8217c9b0 t get_surf_rq_param +ffffffff8217d2f0 t calculate_ttu_cursor +ffffffff8217e000 T optc3_fpu_set_vrr_m_const +ffffffff8217e4a0 T dcn30_fpu_populate_dml_writeback_from_context +ffffffff8217e7f0 T dcn30_fpu_set_mcif_arb_params +ffffffff8217e960 T dcn30_fpu_update_soc_for_wm_a +ffffffff8217ea30 T dcn30_fpu_calculate_wm_and_dlg +ffffffff8217f330 T dcn30_fpu_update_dram_channel_width_bytes +ffffffff8217f390 T dcn30_fpu_update_max_clk +ffffffff8217f440 T dcn30_fpu_get_optimal_dcfclk_fclk_for_uclk +ffffffff8217f540 T dcn30_fpu_update_bw_bounding_box +ffffffff8217f720 T dcn30_find_dummy_latency_index_for_fw_based_mclk_switch +ffffffff8217f900 T dcn3_fpu_build_wm_range_table +ffffffff8217fbe0 T patch_dcn30_soc_bounding_box +ffffffff82180000 T dml30_recalculate +ffffffff82180600 t DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation +ffffffff82186c50 T dml30_CalculateBytePerPixelAnd256BBlockSizes +ffffffff82186ec0 T dml30_CalculateWriteBackDISPCLK +ffffffff82187040 T dml30_ModeSupportAndSystemConfigurationFull +ffffffff8218e440 t CalculateSwathAndDETConfiguration +ffffffff8218eab0 t TruncToValidBPP +ffffffff8218ed30 t dscceComputeDelay +ffffffff8218ee70 t CalculateVMAndRowBytes +ffffffff8218f520 t CalculatePrefetchSourceLines +ffffffff8218f6e0 t CalculateUrgentBurstFactor +ffffffff8218f970 t CalculateDCFCLKDeepSleep +ffffffff8218fc90 t UseMinimumDCFCLK +ffffffff82190e90 t CalculatePrefetchSchedule +ffffffff821923f0 t CalculateFlipSchedule +ffffffff821928e0 t CalculateWatermarksAndDRAMSpeedChangeSupport +ffffffff82193700 t CalculateSwathWidth +ffffffff82194000 T dml30_rq_dlg_get_rq_reg +ffffffff821944b0 t dml_rq_dlg_get_rq_params +ffffffff82194720 T dml30_rq_dlg_get_dlg_reg +ffffffff82196ed0 t get_surf_rq_param +ffffffff82197870 t calculate_ttu_cursor +ffffffff82198000 T dcn301_update_bw_bounding_box +ffffffff82198320 T dcn301_fpu_set_wm_ranges +ffffffff821983c0 T dcn301_fpu_init_soc_bounding_box +ffffffff82198460 T dcn301_calculate_wm_and_dlg_fp +ffffffff82198790 t calculate_wm_set_for_vlevel +ffffffff82199000 T dcn302_fpu_update_bw_bounding_box +ffffffff82199ac0 T dcn302_fpu_init_soc_bounding_box +ffffffff8219a000 T dcn303_fpu_update_bw_bounding_box +ffffffff8219ab00 T dcn303_fpu_init_soc_bounding_box +ffffffff8219b000 T dcn31_zero_pipe_dcc_fraction +ffffffff8219b060 T dcn31_update_soc_for_wm_a +ffffffff8219b110 T dcn315_update_soc_for_wm_a +ffffffff8219b1e0 T dcn31_calculate_wm_and_dlg_fp +ffffffff8219b830 T dcn31_update_bw_bounding_box +ffffffff8219bc20 T dcn315_update_bw_bounding_box +ffffffff8219bf10 T dcn316_update_bw_bounding_box +ffffffff8219c310 T dcn_get_max_non_odm_pix_rate_100hz +ffffffff8219c370 T dcn_get_approx_det_segs_required_for_pstate +ffffffff8219d000 T dml31_recalculate +ffffffff8219d2e0 t DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation +ffffffff821a40a0 T dml31_CalculateWriteBackDISPCLK +ffffffff821a4220 T dml31_ModeSupportAndSystemConfigurationFull +ffffffff821acdd0 t CalculateSwathAndDETConfiguration +ffffffff821ad400 t TruncToValidBPP +ffffffff821ad680 t dscceComputeDelay +ffffffff821ad7c0 t CalculateDCFCLKDeepSleep +ffffffff821adb00 t CalculateVMAndRowBytes +ffffffff821ae150 t CalculatePrefetchSourceLines +ffffffff821ae310 t CalculateUrgentBurstFactor +ffffffff821ae5a0 t CalculatePrefetchSchedulePerPlane +ffffffff821aecd0 t CalculateFlipSchedule +ffffffff821af250 t CalculateWatermarksAndDRAMSpeedChangeSupport +ffffffff821afeb0 t CalculateSwathWidth +ffffffff821b03c0 t CalculatePrefetchSchedule +ffffffff821b1850 t CalculateVupdateAndDynamicMetadataParameters +ffffffff821b2000 T dml31_rq_dlg_get_rq_reg +ffffffff821b24b0 t dml_rq_dlg_get_rq_params +ffffffff821b2720 T dml31_rq_dlg_get_dlg_reg +ffffffff821b51e0 t get_surf_rq_param +ffffffff821b6000 T dcn314_update_bw_bounding_box_fpu +ffffffff821b6480 T dcn314_populate_dml_pipes_from_context_fpu +ffffffff821b7000 T dml314_recalculate +ffffffff821b7280 t DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation +ffffffff821bdf60 T dml314_CalculateWriteBackDISPCLK +ffffffff821be0e0 T dml314_ModeSupportAndSystemConfigurationFull +ffffffff821c69a0 t CalculateBytePerPixelAnd256BBlockSizes +ffffffff821c6c10 t CalculateSwathAndDETConfiguration +ffffffff821c7210 t TruncToValidBPP +ffffffff821c7490 t dscceComputeDelay +ffffffff821c75d0 t CalculateDCFCLKDeepSleep +ffffffff821c7910 t CalculateVMAndRowBytes +ffffffff821c7f60 t CalculatePrefetchSourceLines +ffffffff821c8120 t CalculateUrgentBurstFactor +ffffffff821c83b0 t CalculateMaxVStartup +ffffffff821c84f0 t CalculatePrefetchSchedulePerPlane +ffffffff821c8c20 t CalculateFlipSchedule +ffffffff821c91a0 t CalculateWatermarksAndDRAMSpeedChangeSupport +ffffffff821c9e00 t CalculateSwathWidth +ffffffff821ca310 t CalculatePrefetchSchedule +ffffffff821cb7a0 t CalculateVupdateAndDynamicMetadataParameters +ffffffff821cc000 T dml314_rq_dlg_get_rq_reg +ffffffff821cc4b0 t dml_rq_dlg_get_rq_params +ffffffff821cc720 T dml314_rq_dlg_get_dlg_reg +ffffffff821cf2a0 t get_surf_rq_param +ffffffff821d0000 T dcn32_build_wm_range_table_fpu +ffffffff821d0390 T dcn32_find_dummy_latency_index_for_fw_based_mclk_switch +ffffffff821d05c0 T dcn32_internal_validate_bw +ffffffff821d22d0 T dcn32_helper_populate_phantom_dlg_params +ffffffff821d2470 T dcn32_predict_pipe_split +ffffffff821d26a0 T insert_entry_into_table_sorted +ffffffff821d2ad0 T dcn32_set_phantom_stream_timing +ffffffff821d2d70 t dcn32_split_stream_for_mpc_or_odm +ffffffff821d3100 T dcn32_calculate_wm_and_dlg_fpu +ffffffff821d46e0 T dcn32_patch_dpm_table +ffffffff821d48f0 T dcn32_update_bw_bounding_box_fpu +ffffffff821d61b0 T dcn32_zero_pipe_dcc_fraction +ffffffff821d6210 T dcn32_allow_subvp_with_active_margin +ffffffff821d62e0 t subvp_drr_schedulable +ffffffff821d7000 T dml32_recalculate +ffffffff821db330 T dml32_ModeSupportAndSystemConfigurationFull +ffffffff821e3000 T dml32_dscceComputeDelay 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dml32_CalculateMALLUseForStaticScreen +ffffffff821e9990 T dml32_CalculateRowBandwidth +ffffffff821e9af0 T dml32_CalculateUrgentLatency +ffffffff821e9b90 T dml32_CalculateUrgentBurstFactor +ffffffff821e9e40 T dml32_CalculateDCFCLKDeepSleep +ffffffff821ea190 T dml32_CalculateWriteBackDelay +ffffffff821ea2f0 T dml32_UseMinimumDCFCLK +ffffffff821eb1b0 T dml32_CalculateExtraLatencyBytes +ffffffff821eb380 T dml32_CalculateTWait +ffffffff821eb460 T dml32_CalculateVUpdateAndDynamicMetadataParameters +ffffffff821eb6c0 T dml32_get_return_bw_mbps +ffffffff821eb880 T dml32_get_return_bw_mbps_vm_only +ffffffff821eb960 T dml32_CalculateExtraLatency +ffffffff821ebb90 T dml32_CalculatePrefetchSchedule +ffffffff821ed150 T dml32_CalculateFlipSchedule +ffffffff821ed6d0 T dml32_CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport +ffffffff821ee830 T dml32_CalculateWriteBackDISPCLK +ffffffff821ee9f0 T dml32_CalculateMinAndMaxPrefetchMode +ffffffff821eea30 T dml32_CalculatePixelDeliveryTimes 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dml_get_voltage_level +ffffffff821f81f0 t fetch_socbb_params +ffffffff821f8700 t fetch_ip_params +ffffffff821f8ba0 t fetch_pipe_params +ffffffff821f9cd0 T PixelClockAdjustmentForProgressiveToInterlaceUnit +ffffffff821f9d50 T get_clk_dcf_deepsleep +ffffffff821f9e60 T get_wm_urgent +ffffffff821f9f70 T get_wm_memory_trip +ffffffff821fa080 T get_wm_writeback_urgent +ffffffff821fa190 T get_wm_stutter_exit +ffffffff821fa2a0 T get_wm_stutter_enter_exit +ffffffff821fa3b0 T get_wm_z8_stutter_exit +ffffffff821fa4c0 T get_wm_z8_stutter_enter_exit +ffffffff821fa5d0 T get_stutter_efficiency_z8 +ffffffff821fa6e0 T get_stutter_num_bursts_z8 +ffffffff821fa7f0 T get_wm_dram_clock_change +ffffffff821fa900 T get_wm_writeback_dram_clock_change +ffffffff821faa10 T get_stutter_efficiency +ffffffff821fab20 T get_stutter_efficiency_no_vblank +ffffffff821fac30 T get_stutter_period +ffffffff821fad40 T get_urgent_latency +ffffffff821fae50 T get_urgent_extra_latency +ffffffff821faf60 T get_nonurgent_latency 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get_dsc_delay +ffffffff821fc770 T get_dppclk_calculated +ffffffff821fc890 T get_dscclk_calculated +ffffffff821fc9b0 T get_min_ttu_vblank +ffffffff821fcad0 T get_min_ttu_vblank_in_us +ffffffff821fcbf0 T get_vratio_prefetch_l +ffffffff821fcd10 T get_vratio_prefetch_c +ffffffff821fce30 T get_dst_x_after_scaler +ffffffff821fcf50 T get_dst_y_after_scaler +ffffffff821fd070 T get_dst_y_per_vm_vblank +ffffffff821fd190 T get_dst_y_per_row_vblank +ffffffff821fd2b0 T get_dst_y_prefetch +ffffffff821fd3d0 T get_dst_y_per_vm_flip +ffffffff821fd4f0 T get_dst_y_per_row_flip +ffffffff821fd610 T get_refcyc_per_vm_group_vblank +ffffffff821fd730 T get_refcyc_per_vm_group_flip +ffffffff821fd850 T get_refcyc_per_vm_req_vblank +ffffffff821fd970 T get_refcyc_per_vm_req_flip +ffffffff821fda90 T get_refcyc_per_vm_group_vblank_in_us +ffffffff821fdbb0 T get_refcyc_per_vm_group_flip_in_us +ffffffff821fdcd0 T get_refcyc_per_vm_req_vblank_in_us +ffffffff821fddf0 T get_refcyc_per_vm_req_flip_in_us +ffffffff821fdf10 T get_refcyc_per_vm_dmdata_in_us +ffffffff821fe030 T get_dmdata_dl_delta_in_us +ffffffff821fe150 T get_refcyc_per_line_delivery_l_in_us +ffffffff821fe270 T get_refcyc_per_line_delivery_c_in_us +ffffffff821fe390 T get_refcyc_per_line_delivery_pre_l_in_us +ffffffff821fe4b0 T get_refcyc_per_line_delivery_pre_c_in_us +ffffffff821fe5d0 T get_refcyc_per_req_delivery_l_in_us +ffffffff821fe6f0 T get_refcyc_per_req_delivery_c_in_us +ffffffff821fe810 T get_refcyc_per_req_delivery_pre_l_in_us +ffffffff821fe930 T get_refcyc_per_req_delivery_pre_c_in_us +ffffffff821fea50 T get_refcyc_per_cursor_req_delivery_in_us +ffffffff821feb70 T get_refcyc_per_cursor_req_delivery_pre_in_us +ffffffff821fec90 T get_refcyc_per_meta_chunk_nom_l_in_us +ffffffff821fedb0 T get_refcyc_per_meta_chunk_nom_c_in_us +ffffffff821feed0 T get_refcyc_per_meta_chunk_vblank_l_in_us +ffffffff821feff0 T get_refcyc_per_meta_chunk_vblank_c_in_us +ffffffff821ff110 T get_refcyc_per_meta_chunk_flip_l_in_us +ffffffff821ff230 T get_refcyc_per_meta_chunk_flip_c_in_us +ffffffff821ff350 T get_vstartup +ffffffff821ff480 T get_vupdate_offset +ffffffff821ff5b0 T get_vupdate_width +ffffffff821ff6d0 T get_vready_offset +ffffffff821ff7f0 T get_vready_at_or_after_vsync +ffffffff821ff920 T get_min_dst_y_next_start +ffffffff821ffa50 T get_dst_y_per_pte_row_nom_l +ffffffff821ffb70 T get_dst_y_per_pte_row_nom_c +ffffffff821ffc90 T get_dst_y_per_meta_row_nom_l +ffffffff821ffdb0 T get_dst_y_per_meta_row_nom_c +ffffffff821ffed0 T get_refcyc_per_pte_group_nom_l_in_us +ffffffff821ffff0 T get_refcyc_per_pte_group_nom_c_in_us +ffffffff82200110 T get_refcyc_per_pte_group_vblank_l_in_us +ffffffff82200230 T get_refcyc_per_pte_group_vblank_c_in_us +ffffffff82200350 T get_refcyc_per_pte_group_flip_l_in_us +ffffffff82200470 T get_refcyc_per_pte_group_flip_c_in_us +ffffffff82200590 T get_vstartup_calculated +ffffffff822006c0 T get_dpte_row_height_linear_c +ffffffff822007f0 T get_swath_height_l +ffffffff82200920 T get_swath_height_c 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sdmmc_io_read_multi_1 -ffffffff825489b0 T sdmmc_io_write_multi_1 -ffffffff82548aa0 T sdmmc_io_read_region_1 -ffffffff82548b90 T sdmmc_io_write_region_1 -ffffffff82548c80 T sdmmc_io_xchg -ffffffff82548e10 T sdmmc_intr_enable -ffffffff82549080 T sdmmc_intr_disable -ffffffff825492f0 T sdmmc_intr_establish -ffffffff825493f0 T sdmmc_intr_disestablish -ffffffff825494e0 T sdmmc_card_intr -ffffffff82549530 T sdmmc_intr_task -ffffffff825495c0 T sdmmc_io_set_blocklen -ffffffff8254a000 T sdmmc_mem_enable -ffffffff8254a4e0 T sdmmc_mem_send_op_cond -ffffffff8254a690 T sdmmc_mem_signal_voltage -ffffffff8254a750 T sdmmc_mem_scan -ffffffff8254aa60 T sdmmc_decode_csd -ffffffff8254ae70 T sdmmc_decode_cid -ffffffff8254b2b0 T sdmmc_mem_send_scr -ffffffff8254b3f0 T sdmmc_mem_decode_scr -ffffffff8254b470 T sdmmc_mem_send_cxd_data -ffffffff8254b5e0 T sdmmc_mem_set_bus_width -ffffffff8254b700 T sdmmc_mem_sd_switch -ffffffff8254b9b0 T sdmmc_be512_to_bitfield512 -ffffffff8254ba60 T sdmmc_mem_mmc_switch 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bwfm_sdio_dev_read -ffffffff825509b0 T bwfm_sdio_rx_frames -ffffffff82550d40 T bwfm_sdio_tx_frames -ffffffff82550e20 T bwfm_sdio_backplane -ffffffff82550ed0 T bwfm_sdio_buf_read -ffffffff82550fb0 T bwfm_sdio_buf_write -ffffffff82551060 T bwfm_sdio_frame_read_write -ffffffff825511e0 T bwfm_sdio_newbuf -ffffffff82551260 T bwfm_sdio_tx_ok -ffffffff825512b0 T bwfm_sdio_tx_ctrlframe -ffffffff825513b0 T bwfm_sdio_tx_dataframe -ffffffff82551500 T bwfm_sdio_rx_glom -ffffffff82552000 T onewire_match -ffffffff82552050 T onewire_attach -ffffffff825520f0 T onewire_detach -ffffffff82552160 T onewire_activate -ffffffff82552180 T onewire_scan -ffffffff82552390 T onewire_createthread -ffffffff82552400 T onewire_print -ffffffff825524d0 T onewirebus_print -ffffffff82552520 T onewire_lock -ffffffff82552540 T onewire_unlock -ffffffff82552560 T onewire_reset -ffffffff82552580 T onewire_bit -ffffffff825525a0 T onewire_read_byte -ffffffff825526e0 T onewire_write_byte -ffffffff825527c0 T onewire_read_block -ffffffff82552860 T onewire_write_block -ffffffff82552900 T onewire_triplet -ffffffff825529e0 T onewire_matchrom -ffffffff82552b30 T onewire_search -ffffffff82552ec0 T onewire_thread -ffffffff82553000 T onewire_crc -ffffffff825530e0 T onewire_crc16 -ffffffff825531c0 T onewire_famname -ffffffff82553200 T onewire_matchbyfam -ffffffff82554000 T owid_match -ffffffff82554030 T owid_attach -ffffffff82554100 T owid_detach -ffffffff82554140 T owid_activate -ffffffff82555000 T owsbm_match -ffffffff82555030 T owsbm_attach -ffffffff825551d0 T owsbm_detach -ffffffff82555240 T owsbm_activate -ffffffff82555270 T owsbm_update -ffffffff82556000 T owtemp_match -ffffffff82556030 T owtemp_attach -ffffffff82556130 T owtemp_detach -ffffffff825561a0 T owtemp_activate -ffffffff825561d0 T owtemp_update -ffffffff82557000 T owctr_match -ffffffff82557030 T owctr_attach -ffffffff82557180 T owctr_detach -ffffffff825571f0 T owctr_activate -ffffffff82557220 T owctr_update -ffffffff82557250 T owctr_update_counter -ffffffff82558000 A __text_page_start -ffffffff82558000 T Xsyscall_meltdown -ffffffff8255800c T Xsyscall -ffffffff8255826e t Xsyscall_trampback -ffffffff82558280 T intr_user_exit -ffffffff825582c2 t intr_user_exit_post_ast -ffffffff825583ee t Xiretq_trampback -ffffffff825583fa T doreti_iret -ffffffff82559000 T alltraps -ffffffff82559138 T recall_trap -ffffffff82559150 T alltraps_kern -ffffffff82559153 T alltraps_kern_meltdown -ffffffff8255a000 ? Xsyscall32 -ffffffff8255a000 A __kutext_start -ffffffff8255a000 A __text_page_end -ffffffff8255b000 ? Xtrap00 -ffffffff8255b010 ? Xtrap01 -ffffffff8255b020 ? Xtrap02 -ffffffff8255b028 c calltrap_specstk -ffffffff8255b0f0 ? calltrap_specstk_tramp -ffffffff8255b110 ? Xtrap03 -ffffffff8255b120 ? Xtrap04 -ffffffff8255b130 ? Xtrap05 -ffffffff8255b140 ? Xtrap06 -ffffffff8255b150 ? Xtrap07 -ffffffff8255b160 ? Xtrap08 -ffffffff8255b170 ? Xtrap09 -ffffffff8255b180 ? Xtrap0a -ffffffff8255b190 ? Xtrap0b -ffffffff8255b1a0 ? Xtrap0c -ffffffff8255b1b0 ? Xtrap0d -ffffffff8255b240 ? Xtrap0e -ffffffff8255b250 ? Xintrspurious -ffffffff8255b250 ? Xtrap0f -ffffffff8255b260 ? Xtrap10 -ffffffff8255b270 ? Xtrap11 -ffffffff8255b280 ? Xtrap12 -ffffffff8255b290 ? Xtrap13 -ffffffff8255b2a0 ? Xtrap14 -ffffffff8255b2b0 ? Xtrap15 -ffffffff8255b2c0 ? Xtrap16 -ffffffff8255b2c0 ? Xtrap17 -ffffffff8255b2c0 ? Xtrap18 -ffffffff8255b2c0 ? Xtrap19 -ffffffff8255b2c0 ? Xtrap1a -ffffffff8255b2c0 ? Xtrap1b -ffffffff8255b2c0 ? Xtrap1c -ffffffff8255b2c0 ? Xtrap1d -ffffffff8255b2c0 ? Xtrap1e -ffffffff8255b2c0 ? Xtrap1f -ffffffff8255b2d0 ? x2apic_eoi -ffffffff8255b2f0 ? Xintr_lapic_ipi -ffffffff8255b330 ? Xipi_invltlb -ffffffff8255b360 ? Xipi_invlpg -ffffffff8255b390 ? Xipi_invlrange -ffffffff8255b3d0 ? Xipi_invltlb_pcid -ffffffff8255b410 ? Xipi_invlpg_pcid -ffffffff8255b460 ? Xipi_invlrange_pcid -ffffffff8255b4d0 ? Xintr_lapic_ltimer -ffffffff8255b510 ? Xintr_xen_upcall -ffffffff8255b550 ? Xintr_hyperv_upcall -ffffffff8255b590 ? Xintr_legacy0 -ffffffff8255b5d0 ? Xintr_legacy1 -ffffffff8255b610 ? Xintr_legacy2 -ffffffff8255b650 ? Xintr_legacy3 -ffffffff8255b690 ? Xintr_legacy4 -ffffffff8255b6d0 ? Xintr_legacy5 -ffffffff8255b710 ? Xintr_legacy6 -ffffffff8255b750 ? Xintr_legacy7 -ffffffff8255b790 ? Xintr_legacy8 -ffffffff8255b7d0 ? Xintr_legacy9 -ffffffff8255b810 ? Xintr_legacy10 -ffffffff8255b850 ? Xintr_legacy11 -ffffffff8255b890 ? Xintr_legacy12 -ffffffff8255b8d0 ? Xintr_legacy13 -ffffffff8255b910 ? Xintr_legacy14 -ffffffff8255b950 ? Xintr_legacy15 -ffffffff8255b990 ? Xintr_ioapic_edge0 -ffffffff8255b9d0 ? Xintr_ioapic_edge1 -ffffffff8255ba10 ? Xintr_ioapic_edge2 -ffffffff8255ba50 ? Xintr_ioapic_edge3 -ffffffff8255ba90 ? Xintr_ioapic_edge4 -ffffffff8255bad0 ? Xintr_ioapic_edge5 -ffffffff8255bb10 ? Xintr_ioapic_edge6 -ffffffff8255bb50 ? Xintr_ioapic_edge7 -ffffffff8255bb90 ? Xintr_ioapic_edge8 -ffffffff8255bbd0 ? Xintr_ioapic_edge9 -ffffffff8255bc10 ? Xintr_ioapic_edge10 -ffffffff8255bc50 ? Xintr_ioapic_edge11 -ffffffff8255bc90 ? Xintr_ioapic_edge12 -ffffffff8255bcd0 ? Xintr_ioapic_edge13 -ffffffff8255bd10 ? Xintr_ioapic_edge14 -ffffffff8255bd50 ? Xintr_ioapic_edge15 -ffffffff8255bd90 ? Xintr_ioapic_edge16 -ffffffff8255bdd0 ? Xintr_ioapic_edge17 -ffffffff8255be10 ? Xintr_ioapic_edge18 -ffffffff8255be50 ? Xintr_ioapic_edge19 -ffffffff8255be90 ? Xintr_ioapic_edge20 -ffffffff8255bed0 ? Xintr_ioapic_edge21 -ffffffff8255bf10 ? Xintr_ioapic_edge22 -ffffffff8255bf50 ? Xintr_ioapic_edge23 -ffffffff8255bf90 ? Xintr_ioapic_edge24 -ffffffff8255bfd0 ? Xintr_ioapic_edge25 -ffffffff8255c010 ? Xintr_ioapic_edge26 -ffffffff8255c050 ? Xintr_ioapic_edge27 -ffffffff8255c090 ? Xintr_ioapic_edge28 -ffffffff8255c0d0 ? Xintr_ioapic_edge29 -ffffffff8255c110 ? Xintr_ioapic_edge30 -ffffffff8255c150 ? Xintr_ioapic_edge31 -ffffffff8255c190 ? Xintr_ioapic_edge32 -ffffffff8255c1d0 ? Xintr_ioapic_edge33 -ffffffff8255c210 ? Xintr_ioapic_edge34 -ffffffff8255c250 ? Xintr_ioapic_edge35 -ffffffff8255c290 ? Xintr_ioapic_edge36 -ffffffff8255c2d0 ? Xintr_ioapic_edge37 -ffffffff8255c310 ? Xintr_ioapic_edge38 -ffffffff8255c350 ? Xintr_ioapic_edge39 -ffffffff8255c390 ? Xintr_ioapic_edge40 -ffffffff8255c3d0 ? Xintr_ioapic_edge41 -ffffffff8255c410 ? Xintr_ioapic_edge42 -ffffffff8255c450 ? Xintr_ioapic_edge43 -ffffffff8255c490 ? Xintr_ioapic_edge44 -ffffffff8255c4d0 ? Xintr_ioapic_edge45 -ffffffff8255c510 ? Xintr_ioapic_edge46 -ffffffff8255c550 ? Xintr_ioapic_edge47 -ffffffff8255c590 ? Xintr_ioapic_edge48 -ffffffff8255c5d0 ? Xintr_ioapic_edge49 -ffffffff8255c610 ? Xintr_ioapic_edge50 -ffffffff8255c650 ? Xintr_ioapic_edge51 -ffffffff8255c690 ? Xintr_ioapic_edge52 -ffffffff8255c6d0 ? Xintr_ioapic_edge53 -ffffffff8255c710 ? Xintr_ioapic_edge54 -ffffffff8255c750 ? Xintr_ioapic_edge55 -ffffffff8255c790 ? Xintr_ioapic_edge56 -ffffffff8255c7d0 ? Xintr_ioapic_edge57 -ffffffff8255c810 ? Xintr_ioapic_edge58 -ffffffff8255c850 ? Xintr_ioapic_edge59 -ffffffff8255c890 ? Xintr_ioapic_edge60 -ffffffff8255c8d0 ? Xintr_ioapic_edge61 -ffffffff8255c910 ? Xintr_ioapic_edge62 -ffffffff8255c950 ? Xintr_ioapic_edge63 -ffffffff8255c990 ? Xintr_ioapic_level0 -ffffffff8255c9d0 ? Xintr_ioapic_level1 -ffffffff8255ca10 ? Xintr_ioapic_level2 -ffffffff8255ca50 ? Xintr_ioapic_level3 -ffffffff8255ca90 ? Xintr_ioapic_level4 -ffffffff8255cad0 ? Xintr_ioapic_level5 -ffffffff8255cb10 ? Xintr_ioapic_level6 -ffffffff8255cb50 ? Xintr_ioapic_level7 -ffffffff8255cb90 ? Xintr_ioapic_level8 -ffffffff8255cbd0 ? Xintr_ioapic_level9 -ffffffff8255cc10 ? Xintr_ioapic_level10 -ffffffff8255cc50 ? Xintr_ioapic_level11 -ffffffff8255cc90 ? Xintr_ioapic_level12 -ffffffff8255ccd0 ? Xintr_ioapic_level13 -ffffffff8255cd10 ? Xintr_ioapic_level14 -ffffffff8255cd50 ? Xintr_ioapic_level15 -ffffffff8255cd90 ? Xintr_ioapic_level16 -ffffffff8255cdd0 ? Xintr_ioapic_level17 -ffffffff8255ce10 ? Xintr_ioapic_level18 -ffffffff8255ce50 ? Xintr_ioapic_level19 -ffffffff8255ce90 ? Xintr_ioapic_level20 -ffffffff8255ced0 ? Xintr_ioapic_level21 -ffffffff8255cf10 ? Xintr_ioapic_level22 -ffffffff8255cf50 ? Xintr_ioapic_level23 -ffffffff8255cf90 ? Xintr_ioapic_level24 -ffffffff8255cfd0 ? Xintr_ioapic_level25 -ffffffff8255d010 ? Xintr_ioapic_level26 -ffffffff8255d050 ? Xintr_ioapic_level27 -ffffffff8255d090 ? Xintr_ioapic_level28 -ffffffff8255d0d0 ? Xintr_ioapic_level29 -ffffffff8255d110 ? Xintr_ioapic_level30 -ffffffff8255d150 ? Xintr_ioapic_level31 -ffffffff8255d190 ? Xintr_ioapic_level32 -ffffffff8255d1d0 ? Xintr_ioapic_level33 -ffffffff8255d210 ? Xintr_ioapic_level34 -ffffffff8255d250 ? Xintr_ioapic_level35 -ffffffff8255d290 ? Xintr_ioapic_level36 -ffffffff8255d2d0 ? Xintr_ioapic_level37 -ffffffff8255d310 ? Xintr_ioapic_level38 -ffffffff8255d350 ? Xintr_ioapic_level39 -ffffffff8255d390 ? Xintr_ioapic_level40 -ffffffff8255d3d0 ? Xintr_ioapic_level41 -ffffffff8255d410 ? Xintr_ioapic_level42 -ffffffff8255d450 ? Xintr_ioapic_level43 -ffffffff8255d490 ? Xintr_ioapic_level44 -ffffffff8255d4d0 ? Xintr_ioapic_level45 -ffffffff8255d510 ? Xintr_ioapic_level46 -ffffffff8255d550 ? Xintr_ioapic_level47 -ffffffff8255d590 ? Xintr_ioapic_level48 -ffffffff8255d5d0 ? Xintr_ioapic_level49 -ffffffff8255d610 ? Xintr_ioapic_level50 -ffffffff8255d650 ? Xintr_ioapic_level51 -ffffffff8255d690 ? Xintr_ioapic_level52 -ffffffff8255d6d0 ? Xintr_ioapic_level53 -ffffffff8255d710 ? Xintr_ioapic_level54 -ffffffff8255d750 ? Xintr_ioapic_level55 -ffffffff8255d790 ? Xintr_ioapic_level56 -ffffffff8255d7d0 ? Xintr_ioapic_level57 -ffffffff8255d810 ? Xintr_ioapic_level58 -ffffffff8255d850 ? Xintr_ioapic_level59 -ffffffff8255d890 ? Xintr_ioapic_level60 -ffffffff8255d8d0 ? Xintr_ioapic_level61 -ffffffff8255d910 ? Xintr_ioapic_level62 -ffffffff8255d950 ? Xintr_ioapic_level63 -ffffffff8255e000 ? codepatch_fill_nop -ffffffff8255e000 A __cptext_start -ffffffff8255e000 A __kutext_end -ffffffff8255e0b0 ? codepatch_maprw -ffffffff8255e190 ? codepatch_unmaprw -ffffffff8255e200 ? codepatch_nop -ffffffff8255e360 ? codepatch_replace -ffffffff8255e510 ? codepatch_call -ffffffff8255e530 ? codepatch_jmp -ffffffff8255f000 A __cptext_end -ffffffff8255f000 A __rodata_start -ffffffff8255f000 C _etext -ffffffff8255f000 C etext -ffffffff82560000 r seeprom_read -ffffffff82560004 r icl_mg_pll_find_divisors.div1_vals -ffffffff82560028 r gen9bc_tgp_ddc_pin_map -ffffffff82560038 r athn_ac2qid -ffffffff82560038 r athn_ac2qid -ffffffff82560038 r athn_ac2qid -ffffffff82560044 r rtwn_get_rssi.cckoff -ffffffff8256006c r rsu_ac2qid -ffffffff8256007c r pckbc_portcmd -ffffffff82560080 r tht_fifo_write_pad.pad -ffffffff82560088 r rsu_get_rssi.cckoff -ffffffff8256009c r adlp_n_revids -ffffffff825600ec r apple_iso_trans -ffffffff825600f0 r dg2_g12_revid_step_tbl -ffffffff825600f8 r wihap_check_tx.txratetable -ffffffff825600fc r dmamode -ffffffff82560124 r gen9_edram_size_mb.sets -ffffffff82561000 r isomappings -ffffffff82561080 r unimappings -ffffffff82561230 r replacements -ffffffff82564bf6 r cmd0646_9_tim_udma -ffffffff825b8d26 r pp_r600_decoded_lanes -ffffffff825d416c r cmd680_setup_channel.udma_tbl -ffffffff825dbe26 r apollo_udma33_tim -ffffffff825e1ef3 r substchar -ffffffff825e4028 r apollo_udma100_tim -ffffffff8260ba3b r apollo_udma66_tim -ffffffff82612f90 r apollo_pio_rec -ffffffff826224eb r cy_pio_rec -ffffffff82651ceb r apollo_udma133_tim -ffffffff8265e9f0 R drm_ca -ffffffff8265ea18 R drm_filtops -ffffffff8265ea48 R drmread_filtops -ffffffff8265f000 r vga_emulops -ffffffff8265f048 R vga_stdscreen -ffffffff8265f078 R vga_stdscreen_mono -ffffffff8265f0a8 R vga_stdscreen_bf -ffffffff8265f0d8 R vga_40lscreen -ffffffff8265f108 R vga_40lscreen_mono -ffffffff8265f138 R vga_40lscreen_bf -ffffffff8265f168 R vga_50lscreen -ffffffff8265f198 R vga_50lscreen_mono -ffffffff8265f1c8 R vga_50lscreen_bf -ffffffff8265f1f8 R vga_screenlist -ffffffff8265f208 R vga_screenlist_mono -ffffffff8265f218 R vga_accessops -ffffffff8265f278 r i945_wm_info -ffffffff8265f2b8 r bgansitopc -ffffffff8265f2c0 r pctoansi -ffffffff8265f300 r sdma_offsets -ffffffff8265f300 r sdma_offsets -ffffffff8265f338 r iha_rate_tbl -ffffffff8265f370 r i830_a_wm_info -ffffffff8265f3a8 r gen9_edram_size_mb.ways -ffffffff8265f408 r aggr_periodic_times -ffffffff8265f490 r jsl_ehl_revids -ffffffff8265f508 r michael_final.pad -ffffffff8265f530 r rt_copysa.maskarray -ffffffff8265f538 r i915_wm_info -ffffffff8265f540 r amdgpu_ih_clientid_jpeg -ffffffff8265f540 r amdgpu_ih_clientid_uvds -ffffffff8265f540 r amdgpu_ih_clientid_vcns -ffffffff8265f540 r amdgpu_ih_clientid_vcns -ffffffff8265f540 r amdgpu_ih_clientid_vcns -ffffffff8265f578 r vga_setfontset.cmaptabb -ffffffff8265f590 r tgl_revids -ffffffff8265f5e8 r i830_bc_wm_info -ffffffff8265f658 r hsw_activate_psr2.map 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adw_switch -ffffffff8266b000 R gdt_switch -ffffffff8266c000 R twe_switch -ffffffff8266d000 R ciss_switch -ffffffff8266d030 R ciss_level -ffffffff8266d050 R ciss_stat -ffffffff8266e000 R ami_switch -ffffffff8266e028 R ami_raw_switch -ffffffff8266f000 R mfi_switch -ffffffff8266f028 R mfi_pd_switch -ffffffff8266f050 r mfi_iop_xscale -ffffffff8266f080 r mfi_iop_ppc -ffffffff8266f0b0 r mfi_iop_gen2 -ffffffff8266f0e0 r mfi_iop_skinny -ffffffff8266f110 r mfi_bbu_indicators -ffffffff82670000 R qlw_switch -ffffffff82671000 R isp_2100_risc_code -ffffffff82683bf0 R isp_2200_risc_code -ffffffff82696990 R isp_2300_risc_code -ffffffff826b0408 R qla_switch -ffffffff826b0430 r qla_regs_2100 -ffffffff826b0460 r qla_regs_2200 -ffffffff826b0490 r qla_regs_23XX -ffffffff826b1000 R ahci_atascsi_methods -ffffffff826b2000 R nvme_switch -ffffffff826b2028 r nvme_ops -ffffffff826b3000 R mpi_switch -ffffffff826b3060 r bwi_rf_calc_nrssi_slope_11b.save_phy_regs -ffffffff826b3090 r chv_oa_mux_regs -ffffffff826b30b0 r fiji_clock_stretcher_lookup_table -ffffffff826b30b0 r tonga_clock_stretcher_lookup_table -ffffffff826b30d0 r iosf_pci_devices -ffffffff826b30f0 r link_speed -ffffffff826b30f0 r link_speed -ffffffff826b30f0 r link_speed -ffffffff826b3130 r drm_fb_xfrm.default_dst_pitch -ffffffff826b3130 r non_supported_protection -ffffffff826b3230 r tgl_uy_revids -ffffffff826b3280 r bwi_phy_noise_11g_rev1 -ffffffff826b3300 r cardslot_process_event.antonym_ev -ffffffff826b3390 r gen11_oa_mux_regs -ffffffff826b3480 r ddr2_cycle_tenths -ffffffff826b34f0 r rtw_intr_rx.ratetbl -ffffffff826b3570 r abm_config -ffffffff826b35e0 r getbootinfo.ports -ffffffff826b3630 r reg_offsets -ffffffff826b3640 r bwi_rf_lo_measure_11g.rf_lo_adjust -ffffffff826b3650 r init_non_clock_fields.look_up -ffffffff826b3660 r uftdi_8u232am_getrate.roundoff -ffffffff826b36b0 r zyd_rx_data.rates -ffffffff826b36c0 r ieee80211_ra_valid_tx_mcs.max_mcs -ffffffff826b3700 r mmio_invalidate_full.gen8_regs -ffffffff826b3730 r bwi_phy_noise_11g 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dmub_dcn30_setup_windows +ffffffff82244000 T dmub_dcn31_reset +ffffffff82244280 T dmub_dcn31_reset_release +ffffffff82244350 T dmub_dcn31_backdoor_load +ffffffff822445b0 T dmub_dcn31_setup_windows +ffffffff822448f0 T dmub_dcn31_setup_mailbox +ffffffff82244940 T dmub_dcn31_get_inbox1_rptr +ffffffff82244970 T dmub_dcn31_set_inbox1_wptr +ffffffff822449a0 T dmub_dcn31_setup_out_mailbox +ffffffff822449f0 T dmub_dcn31_get_outbox1_wptr +ffffffff82244a20 T dmub_dcn31_set_outbox1_rptr +ffffffff82244a50 T dmub_dcn31_is_hw_init +ffffffff82244ad0 T dmub_dcn31_is_supported +ffffffff82244b30 T dmub_dcn31_is_psrsu_supported +ffffffff82244b60 T dmub_dcn31_set_gpint +ffffffff82244b90 T dmub_dcn31_is_gpint_acked +ffffffff82244bf0 T dmub_dcn31_get_gpint_response +ffffffff82244c20 T dmub_dcn31_get_gpint_dataout +ffffffff82244d40 T dmub_dcn31_get_fw_boot_status +ffffffff82244d70 T dmub_dcn31_enable_dmub_boot_options +ffffffff82244df0 T dmub_dcn31_skip_dmub_panel_power_sequence +ffffffff82244e50 T dmub_dcn31_setup_outbox0 +ffffffff82244ea0 T dmub_dcn31_get_outbox0_wptr +ffffffff82244ed0 T dmub_dcn31_set_outbox0_rptr +ffffffff82244f00 T dmub_dcn31_get_current_time +ffffffff82244f30 T dmub_dcn31_get_diagnostic_data +ffffffff822453d0 T dmub_dcn31_should_detect +ffffffff82246000 T dmub_dcn314_is_psrsu_supported +ffffffff82247000 T dmub_dcn32_reset +ffffffff82247200 T dmub_dcn32_reset_release +ffffffff822472d0 T dmub_dcn32_backdoor_load +ffffffff82247530 T dmub_dcn32_backdoor_load_zfb_mode +ffffffff82247720 T dmub_dcn32_setup_windows +ffffffff82247a60 T dmub_dcn32_setup_mailbox +ffffffff82247ab0 T dmub_dcn32_get_inbox1_rptr +ffffffff82247ae0 T dmub_dcn32_set_inbox1_wptr +ffffffff82247b10 T dmub_dcn32_setup_out_mailbox +ffffffff82247b60 T dmub_dcn32_get_outbox1_wptr +ffffffff82247b90 T dmub_dcn32_set_outbox1_rptr +ffffffff82247bc0 T dmub_dcn32_is_hw_init +ffffffff82247c40 T dmub_dcn32_is_supported +ffffffff82247ca0 T dmub_dcn32_set_gpint +ffffffff82247cd0 T dmub_dcn32_is_gpint_acked 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+ffffffff8224a810 T dmub_srv_calc_fb_info +ffffffff8224a9b0 T dmub_srv_has_hw_support +ffffffff8224aa20 T dmub_srv_is_hw_init +ffffffff8224aaa0 T dmub_srv_hw_init +ffffffff8224aef0 T dmub_srv_hw_reset +ffffffff8224af80 T dmub_srv_cmd_queue +ffffffff8224b090 T dmub_srv_cmd_execute +ffffffff8224b150 T dmub_srv_wait_for_auto_load +ffffffff8224b1f0 T dmub_srv_wait_for_phy_init +ffffffff8224b2a0 T dmub_srv_wait_for_idle +ffffffff8224b350 T dmub_srv_send_gpint_command +ffffffff8224b440 T dmub_srv_get_gpint_response +ffffffff8224b4a0 T dmub_srv_get_gpint_dataout +ffffffff8224b500 T dmub_srv_get_fw_boot_status +ffffffff8224b570 T dmub_srv_cmd_with_reply_data +ffffffff8224b7e0 T dmub_srv_get_outbox0_msg +ffffffff8224b880 T dmub_srv_get_diagnostic_data +ffffffff8224b8e0 T dmub_srv_should_detect +ffffffff8224b930 T dmub_srv_clear_inbox0_ack +ffffffff8224b980 T dmub_srv_wait_for_inbox0_ack +ffffffff8224ba10 T dmub_srv_send_inbox0_cmd +ffffffff8224c000 T dmub_srv_stat_get_notification +ffffffff8224d000 T setup_x_points_distribution +ffffffff8224d170 T log_x_points_distribution +ffffffff8224d1a0 T precompute_pq +ffffffff8224d370 t compute_pq +ffffffff8224d580 T precompute_de_pq +ffffffff8224d6e0 t compute_de_pq +ffffffff8224d9a0 T calculate_user_regamma_coeff +ffffffff8224dd70 t apply_lut_1d +ffffffff8224e0a0 T calculate_user_regamma_ramp +ffffffff8224e9e0 T mod_color_calculate_degamma_params +ffffffff8224efb0 t build_evenly_distributed_points +ffffffff8224f130 t scale_gamma +ffffffff8224f2e0 t build_degamma +ffffffff8224f6b0 t build_hlg_degamma +ffffffff8224f8d0 t map_regamma_hw_to_x_user +ffffffff82250030 T mod_color_calculate_regamma_params +ffffffff822521a0 T mod_color_calculate_degamma_curve +ffffffff82252660 t translate_from_linear_space +ffffffff822529a0 t build_coefficients +ffffffff82252b20 t calculate_mapped_value +ffffffff82253000 T mod_color_is_table_init +ffffffff82253050 T mod_color_get_table +ffffffff822530a0 T mod_color_set_table_init_state +ffffffff82254000 T mod_freesync_create +ffffffff82254070 T mod_freesync_destroy +ffffffff822540b0 T mod_freesync_calc_v_total_from_refresh +ffffffff82254140 T mod_freesync_get_vmin_vmax +ffffffff82254180 T mod_freesync_get_v_position +ffffffff82254200 T mod_freesync_build_vrr_infopacket +ffffffff82254950 T mod_freesync_build_vrr_params +ffffffff82254cd0 T mod_freesync_calc_nominal_field_rate +ffffffff82254d30 T mod_freesync_handle_preflip +ffffffff82255150 T mod_freesync_handle_v_update +ffffffff82255610 T mod_freesync_get_settings +ffffffff82255680 T mod_freesync_calc_field_rate_from_timing +ffffffff822556d0 T mod_freesync_get_freesync_enabled +ffffffff82255700 T mod_freesync_is_valid_range +ffffffff82256000 T mod_build_vsc_infopacket +ffffffff82256200 T mod_build_hf_vsif_infopacket +ffffffff82257000 T dmub_init_abm_config +ffffffff82257540 t fill_iram_v_2_3 +ffffffff822579a0 T dmcu_load_iram +ffffffff82258180 T is_psr_su_specific_panel +ffffffff82258210 T mod_power_calc_psr_configs +ffffffff82258310 T mod_power_only_edp +ffffffff82258360 T psr_su_set_y_granularity +ffffffff82259000 T mod_vmid_get_for_ptb +ffffffff82259230 T mod_vmid_reset +ffffffff822592f0 T mod_vmid_create +ffffffff82259430 T mod_vmid_destroy +ffffffff8225a000 T amdgpu_dpm_get_sclk +ffffffff8225a090 T amdgpu_dpm_get_mclk +ffffffff8225a120 T amdgpu_dpm_set_powergating_by_smu +ffffffff8225a200 T amdgpu_dpm_set_gfx_power_up_by_imu +ffffffff8225a310 T amdgpu_dpm_baco_enter +ffffffff8225a3a0 T amdgpu_dpm_baco_exit +ffffffff8225a430 T amdgpu_dpm_set_mp1_state +ffffffff8225a4d0 T amdgpu_dpm_is_baco_supported +ffffffff8225a580 T amdgpu_dpm_mode2_reset +ffffffff8225a610 T amdgpu_dpm_baco_reset +ffffffff8225a6c0 T amdgpu_dpm_is_mode1_reset_supported +ffffffff8225a730 T amdgpu_dpm_mode1_reset +ffffffff8225a7b0 T amdgpu_dpm_switch_power_profile +ffffffff8225a860 T amdgpu_dpm_set_xgmi_pstate +ffffffff8225a900 T amdgpu_dpm_set_df_cstate +ffffffff8225a9a0 T amdgpu_dpm_allow_xgmi_power_down +ffffffff8225aa20 T amdgpu_dpm_enable_mgpu_fan_boost +ffffffff8225aab0 T amdgpu_dpm_set_clockgating_by_smu +ffffffff8225ab50 T amdgpu_dpm_smu_i2c_bus_access +ffffffff8225abf0 T amdgpu_pm_acpi_event_handler +ffffffff8225acb0 T amdgpu_dpm_read_sensor +ffffffff8225ad70 T amdgpu_dpm_compute_clocks +ffffffff8225ae50 T amdgpu_dpm_enable_uvd +ffffffff8225b040 T amdgpu_dpm_enable_vce +ffffffff8225b230 T amdgpu_dpm_enable_jpeg +ffffffff8225b330 T amdgpu_pm_load_smu_firmware +ffffffff8225b3e0 T amdgpu_dpm_handle_passthrough_sbr +ffffffff8225b460 T amdgpu_dpm_send_hbm_bad_pages_num +ffffffff8225b4e0 T amdgpu_dpm_send_hbm_bad_channel_flag +ffffffff8225b560 T amdgpu_dpm_get_dpm_freq_range +ffffffff8225b600 T amdgpu_dpm_set_soft_freq_range +ffffffff8225b6a0 T amdgpu_dpm_write_watermarks_table +ffffffff8225b720 T amdgpu_dpm_wait_for_event +ffffffff8225b7b0 T amdgpu_dpm_set_residency_gfxoff +ffffffff8225b830 T amdgpu_dpm_get_residency_gfxoff +ffffffff8225b8b0 T amdgpu_dpm_get_entrycount_gfxoff +ffffffff8225b930 T amdgpu_dpm_get_status_gfxoff +ffffffff8225b9b0 T amdgpu_dpm_get_thermal_throttling_counter +ffffffff8225ba00 T amdgpu_dpm_gfx_state_change +ffffffff8225ba70 T amdgpu_dpm_get_ecc_info +ffffffff8225baf0 T amdgpu_dpm_get_vce_clock_state +ffffffff8225bb80 T amdgpu_dpm_get_current_power_state +ffffffff8225bbf0 T amdgpu_dpm_set_power_state +ffffffff8225bd50 T amdgpu_dpm_dispatch_task +ffffffff8225bdf0 T amdgpu_dpm_get_performance_level +ffffffff8225be80 T amdgpu_dpm_force_performance_level +ffffffff8225c060 T amdgpu_dpm_get_pp_num_states +ffffffff8225c0f0 T amdgpu_dpm_get_pp_table +ffffffff8225c180 T amdgpu_dpm_set_fine_grain_clk_vol +ffffffff8225c220 T amdgpu_dpm_odn_edit_dpm_table +ffffffff8225c2c0 T amdgpu_dpm_print_clock_levels +ffffffff8225c350 T amdgpu_dpm_emit_clock_levels +ffffffff8225c3f0 T amdgpu_dpm_set_ppfeature_status +ffffffff8225c480 T amdgpu_dpm_get_ppfeature_status +ffffffff8225c510 T amdgpu_dpm_force_clock_level +ffffffff8225c5a0 T amdgpu_dpm_get_sclk_od +ffffffff8225c620 T amdgpu_dpm_set_sclk_od +ffffffff8225c7a0 T amdgpu_dpm_get_mclk_od +ffffffff8225c820 T amdgpu_dpm_set_mclk_od +ffffffff8225c9a0 T amdgpu_dpm_get_power_profile_mode +ffffffff8225ca30 T amdgpu_dpm_set_power_profile_mode +ffffffff8225cad0 T amdgpu_dpm_get_gpu_metrics +ffffffff8225cb60 T amdgpu_dpm_get_fan_control_mode +ffffffff8225cbf0 T amdgpu_dpm_set_fan_speed_pwm +ffffffff8225cc80 T amdgpu_dpm_get_fan_speed_pwm +ffffffff8225cd10 T amdgpu_dpm_get_fan_speed_rpm +ffffffff8225cda0 T amdgpu_dpm_set_fan_speed_rpm +ffffffff8225ce30 T amdgpu_dpm_set_fan_control_mode +ffffffff8225cec0 T amdgpu_dpm_get_power_limit +ffffffff8225cf70 T amdgpu_dpm_set_power_limit +ffffffff8225d000 T amdgpu_dpm_is_cclk_dpm_supported +ffffffff8225d070 T amdgpu_dpm_debugfs_print_current_performance_level +ffffffff8225d100 T amdgpu_dpm_get_smu_prv_buf_details +ffffffff8225d1a0 T amdgpu_dpm_is_overdrive_supported +ffffffff8225d210 T amdgpu_dpm_set_pp_table +ffffffff8225d2b0 T amdgpu_dpm_get_num_cpu_cores +ffffffff8225d300 T amdgpu_dpm_stb_debug_fs_init +ffffffff8225d350 T amdgpu_dpm_display_configuration_change +ffffffff8225d3e0 T amdgpu_dpm_get_clock_by_type +ffffffff8225d480 T amdgpu_dpm_get_display_mode_validation_clks +ffffffff8225d510 T amdgpu_dpm_get_clock_by_type_with_latency +ffffffff8225d5b0 T amdgpu_dpm_get_clock_by_type_with_voltage +ffffffff8225d650 T amdgpu_dpm_set_watermarks_for_clocks_ranges +ffffffff8225d6e0 T amdgpu_dpm_display_clock_voltage_request +ffffffff8225d770 T amdgpu_dpm_get_current_clocks +ffffffff8225d800 T amdgpu_dpm_notify_smu_enable_pwe +ffffffff8225d880 T amdgpu_dpm_set_active_display_count +ffffffff8225d910 T amdgpu_dpm_set_min_deep_sleep_dcefclk +ffffffff8225d9a0 T amdgpu_dpm_set_hard_min_dcefclk_by_freq +ffffffff8225da40 T amdgpu_dpm_set_hard_min_fclk_by_freq +ffffffff8225dae0 T amdgpu_dpm_display_disable_memory_clock_switch +ffffffff8225db70 T amdgpu_dpm_get_max_sustainable_clocks_by_dc +ffffffff8225dc00 T amdgpu_dpm_get_uclk_dpm_states +ffffffff8225dca0 T amdgpu_dpm_get_dpm_clock_table +ffffffff8225e000 T amdgpu_dpm_get_active_displays +ffffffff8225e0a0 T amdgpu_dpm_get_vblank_time +ffffffff8225e150 T amdgpu_dpm_get_vrefresh +ffffffff8225f000 T amdgpu_pm_sysfs_init +ffffffff8225f030 T amdgpu_pm_sysfs_fini +ffffffff8225f060 T amdgpu_debugfs_pm_init +ffffffff82260000 T amdgpu_dpm_print_class_info +ffffffff822602b0 T amdgpu_dpm_print_cap_info +ffffffff82260340 T amdgpu_dpm_print_ps_status +ffffffff822603d0 T amdgpu_pm_print_power_states +ffffffff82260490 T amdgpu_get_platform_caps +ffffffff82260530 T amdgpu_parse_extended_power_table +ffffffff82261540 T amdgpu_free_extended_power_table +ffffffff82261650 T amdgpu_add_thermal_controller +ffffffff82261a80 T amdgpu_get_vce_clock_state +ffffffff82261ac0 T amdgpu_legacy_dpm_compute_clocks +ffffffff82261f30 T amdgpu_dpm_thermal_work_handler +ffffffff82262000 t pp_early_init +ffffffff82262100 t pp_late_init +ffffffff82262220 t pp_sw_init +ffffffff822622b0 t pp_sw_fini +ffffffff82262340 t pp_hw_init +ffffffff822623a0 t pp_hw_fini +ffffffff82262410 t pp_late_fini +ffffffff82262470 t pp_suspend +ffffffff822624c0 t pp_resume +ffffffff822624e0 t pp_is_idle +ffffffff82262510 t pp_wait_for_idle +ffffffff82262540 t pp_sw_reset +ffffffff82262570 t pp_set_clockgating_state +ffffffff822625a0 t pp_set_powergating_state +ffffffff822625d0 t pp_dpm_set_fan_control_mode +ffffffff82262640 t pp_dpm_get_fan_control_mode +ffffffff822626b0 t pp_dpm_set_fan_speed_pwm +ffffffff82262710 t pp_dpm_get_fan_speed_pwm +ffffffff82262770 t pp_dpm_force_clock_level +ffffffff822627d0 t pp_dpm_print_clock_levels +ffffffff82262830 t pp_dpm_emit_clock_levels +ffffffff82262890 t pp_dpm_force_performance_level +ffffffff82262930 t pp_dpm_get_sclk_od +ffffffff82262990 t pp_dpm_set_sclk_od +ffffffff822629f0 t pp_dpm_get_mclk_od +ffffffff82262a50 t pp_dpm_set_mclk_od +ffffffff82262ab0 t pp_dpm_read_sensor +ffffffff82262b70 t pp_dpm_get_performance_level +ffffffff82262bb0 t pp_dpm_get_current_power_state +ffffffff82262c30 t pp_dpm_get_fan_speed_rpm +ffffffff82262c90 t pp_dpm_set_fan_speed_rpm +ffffffff82262cf0 t pp_dpm_get_pp_num_states +ffffffff82262e30 t pp_dpm_get_pp_table +ffffffff82262e80 t pp_dpm_set_pp_table +ffffffff82262fb0 t pp_dpm_switch_power_profile +ffffffff822630f0 t pp_dpm_get_vce_clock_state +ffffffff82263140 t pp_dpm_dispatch_tasks +ffffffff82263180 t pp_dpm_load_fw +ffffffff822631f0 t pp_dpm_fw_loading_complete +ffffffff82263220 t pp_set_powergating_by_smu +ffffffff822633a0 t pp_set_clockgating_by_smu +ffffffff82263410 t pp_set_power_limit +ffffffff822634d0 t pp_get_power_limit +ffffffff82263570 t pp_get_power_profile_mode +ffffffff822635d0 t pp_set_power_profile_mode +ffffffff82263630 t pp_set_fine_grain_clk_vol +ffffffff82263690 t pp_odn_edit_dpm_table +ffffffff822636f0 t pp_dpm_set_mp1_state +ffffffff82263750 t pp_smu_i2c_bus_access +ffffffff822637b0 t pp_gfx_state_change_set +ffffffff82263810 t pp_dpm_get_sclk +ffffffff82263860 t pp_dpm_get_mclk +ffffffff822638b0 t pp_display_configuration_change +ffffffff82263900 t pp_get_display_power_level +ffffffff82263940 t pp_get_current_clocks +ffffffff82263a60 t pp_get_clock_by_type +ffffffff82263ab0 t pp_get_clock_by_type_with_latency +ffffffff82263b00 t pp_get_clock_by_type_with_voltage +ffffffff82263b50 t pp_set_watermarks_for_clocks_ranges +ffffffff82263b90 t pp_display_clock_voltage_request +ffffffff82263bd0 t pp_get_display_mode_validation_clocks +ffffffff82263c30 t pp_notify_smu_enable_pwe +ffffffff82263c90 t pp_enable_mgpu_fan_boost +ffffffff82263cf0 t pp_set_active_display_count +ffffffff82263d30 t pp_set_hard_min_dcefclk_by_freq +ffffffff82263d90 t pp_set_hard_min_fclk_by_freq +ffffffff82263df0 t pp_set_min_deep_sleep_dcefclk +ffffffff82263e50 t pp_get_asic_baco_capability +ffffffff82263ec0 t pp_get_asic_baco_state +ffffffff82263f20 t pp_set_asic_baco_state +ffffffff82263f90 t pp_get_ppfeature_status +ffffffff82263ff0 t pp_set_ppfeature_status +ffffffff82264040 t pp_asic_reset_mode_2 +ffffffff822640a0 t pp_set_df_cstate +ffffffff82264100 t pp_set_xgmi_pstate +ffffffff82264160 t pp_get_gpu_metrics +ffffffff822641c0 t pp_get_prv_buffer_details +ffffffff82264240 t pp_pm_compute_clocks +ffffffff82264310 t pp_swctf_delayed_work_handler +ffffffff82264450 t __delayed_work_tick +ffffffff82264470 t orderly_poweroff +ffffffff82265000 T ci_baco_set_state +ffffffff82266000 T baco_program_registers +ffffffff822660d0 t baco_cmd_handler +ffffffff82266250 T soc15_baco_program_registers +ffffffff82267000 T fiji_baco_set_state +ffffffff82268000 T phm_setup_asic +ffffffff82268050 T phm_power_down_asic +ffffffff822680a0 T phm_set_power_state +ffffffff82268110 T phm_enable_dynamic_state_management +ffffffff822681c0 T phm_disable_dynamic_state_management +ffffffff82268260 T phm_force_dpm_levels +ffffffff822682b0 T phm_apply_state_adjust_rules +ffffffff82268300 T phm_apply_clock_adjust_rules +ffffffff82268350 T phm_powerdown_uvd +ffffffff822683a0 T phm_disable_clock_power_gatings +ffffffff822683f0 T phm_pre_display_configuration_changed +ffffffff82268450 T phm_display_configuration_changed +ffffffff822684b0 T phm_notify_smc_display_config_after_ps_adjustment +ffffffff82268510 T phm_stop_thermal_controller +ffffffff82268570 T phm_register_irq_handlers +ffffffff822685c0 T phm_start_thermal_controller +ffffffff82268710 T phm_check_smc_update_required_for_display_configuration +ffffffff82268770 T phm_check_states_equal +ffffffff822687c0 T phm_store_dal_configuration_data +ffffffff82268910 T phm_get_dal_power_level +ffffffff82268970 T phm_set_cpu_power_state +ffffffff822689c0 T phm_get_performance_level +ffffffff82268a20 T phm_get_clock_info +ffffffff82268ba0 T phm_get_current_shallow_sleep_clocks +ffffffff82268bf0 T phm_get_clock_by_type +ffffffff82268c40 T phm_get_clock_by_type_with_latency +ffffffff82268c90 T phm_get_clock_by_type_with_voltage +ffffffff82268ce0 T phm_set_watermarks_for_clocks_ranges +ffffffff82268d30 T phm_display_clock_voltage_request +ffffffff82268d80 T phm_get_max_high_clocks +ffffffff82268dd0 T phm_disable_smc_firmware_ctf +ffffffff82268e30 T phm_set_active_display_count +ffffffff82269000 T hwmgr_early_init +ffffffff82269470 T hwmgr_sw_init +ffffffff822694e0 T hwmgr_sw_fini +ffffffff82269530 T hwmgr_hw_init +ffffffff822696f0 T hwmgr_hw_fini +ffffffff822697b0 T hwmgr_suspend +ffffffff82269830 T hwmgr_resume +ffffffff822698d0 T hwmgr_handle_task +ffffffff8226a000 T polaris_baco_set_state +ffffffff8226b000 T pp_override_get_default_fuse_value +ffffffff8226c000 T psm_init_power_state_table +ffffffff8226c2a0 T psm_fini_power_state_table +ffffffff8226c360 T psm_set_boot_states +ffffffff8226c420 T psm_set_performance_states +ffffffff8226c4e0 T psm_set_user_performance_state +ffffffff8226c580 T psm_adjust_power_state_dynamic +ffffffff8226d000 T atomctrl_initialize_mc_reg_table +ffffffff8226d210 T atomctrl_initialize_mc_reg_table_v2_2 +ffffffff8226d420 T atomctrl_set_engine_dram_timings_rv770 +ffffffff8226d490 T atomctrl_get_memory_pll_dividers_si +ffffffff8226d570 T atomctrl_get_memory_pll_dividers_vi +ffffffff8226d5f0 T atomctrl_get_memory_pll_dividers_ai +ffffffff8226d6a0 T atomctrl_get_engine_pll_dividers_kong +ffffffff8226d720 T atomctrl_get_engine_pll_dividers_vi +ffffffff8226d7e0 T atomctrl_get_engine_pll_dividers_ai +ffffffff8226d8c0 T atomctrl_get_dfs_pll_dividers_vi +ffffffff8226d980 T atomctrl_get_reference_clock +ffffffff8226d9e0 T atomctrl_is_voltage_controlled_by_gpio_v3 +ffffffff8226daa0 T atomctrl_get_voltage_table_v3 +ffffffff8226dc00 T atomctrl_get_pp_assign_pin +ffffffff8226dcf0 T atomctrl_calculate_voltage_evv_on_sclk +ffffffff8226e070 T atomctrl_get_voltage_evv_on_sclk +ffffffff8226e0f0 T atomctrl_get_voltage_evv +ffffffff8226e1a0 T atomctrl_get_mpll_reference_clock +ffffffff8226e210 T atomctrl_is_asic_internal_ss_supported +ffffffff8226e260 T atomctrl_get_memory_clock_spread_spectrum +ffffffff8226e360 T atomctrl_get_engine_clock_spread_spectrum +ffffffff8226e460 T atomctrl_read_efuse +ffffffff8226e510 T atomctrl_set_ac_timing_ai +ffffffff8226e570 T atomctrl_get_voltage_evv_on_sclk_ai +ffffffff8226e5f0 T atomctrl_get_smc_sclk_range_table +ffffffff8226e6b0 T atomctrl_get_vddc_shared_railinfo +ffffffff8226e720 T atomctrl_get_avfs_information +ffffffff8226e8a0 T atomctrl_get_svi2_info +ffffffff8226e980 T atomctrl_get_leakage_id_from_efuse +ffffffff8226e9e0 T atomctrl_get_leakage_vddc_base_on_leakage +ffffffff8226eb80 T atomctrl_get_voltage_range +ffffffff8226ec40 T atomctrl_get_edc_hilo_leakage_offset_table +ffffffff8226ecc0 T atomctrl_get_edc_leakage_table +ffffffff8226f000 T pp_atomfwctrl_is_voltage_controlled_by_gpio_v4 +ffffffff8226f0d0 T pp_atomfwctrl_get_voltage_table_v4 +ffffffff8226f290 T pp_atomfwctrl_get_pp_assign_pin +ffffffff8226f370 T pp_atomfwctrl_enter_self_refresh +ffffffff8226f3a0 T pp_atomfwctrl_get_gpu_pll_dividers_vega10 +ffffffff8226f450 T pp_atomfwctrl_get_avfs_information +ffffffff8226f780 T pp_atomfwctrl_get_gpio_information +ffffffff8226f820 T pp_atomfwctrl_get_clk_information_by_clkid +ffffffff8226f8a0 T pp_atomfwctrl_get_vbios_bootup_values +ffffffff8226fc20 T pp_atomfwctrl_get_smc_dpm_information +ffffffff82270000 T encode_pcie_lane_width +ffffffff82270030 T decode_pcie_lane_width +ffffffff82271000 t pp_tables_v1_0_initialize +ffffffff82272430 t pp_tables_v1_0_uninitialize +ffffffff822725e0 T get_number_of_powerplay_table_entries_v1_0 +ffffffff82272690 T get_powerplay_table_entry_v1_0 +ffffffff82273000 T pp_tables_get_response_times +ffffffff822730d0 T pp_tables_get_num_of_entries +ffffffff82273190 T pp_tables_get_entry +ffffffff822734f0 t init_non_clock_fields +ffffffff82273670 t pp_tables_initialize +ffffffff82274ad0 t pp_tables_uninitialize +ffffffff82274cd0 t get_number_of_vce_state_table_entries +ffffffff82274dd0 t get_vce_state_table_entry +ffffffff82275000 T smu10_init_function_pointers +ffffffff82275040 t smu10_hwmgr_backend_init +ffffffff82275700 t smu10_hwmgr_backend_fini +ffffffff82275840 t smu10_setup_asic_task +ffffffff822758b0 t smu10_get_power_state_size +ffffffff822758e0 t smu10_apply_state_adjust_rules +ffffffff82275910 t smu10_dpm_force_dpm_level +ffffffff82275e90 t smu10_enable_dpm_tasks +ffffffff82275f50 t smu10_disable_dpm_tasks +ffffffff82275f80 t smu10_dpm_patch_boot_state +ffffffff82275fb0 t smu10_dpm_get_pp_table_entry +ffffffff82276010 t smu10_dpm_get_num_of_pp_table_entries +ffffffff82276060 t smu10_powergate_vcn +ffffffff82276100 t smu10_dpm_get_mclk +ffffffff82276160 t smu10_dpm_get_sclk +ffffffff822761b0 t smu10_set_power_state_tasks +ffffffff82276220 t smu10_set_cpu_power_state +ffffffff82276250 t smu10_store_cc6_data +ffffffff822762c0 t smu10_get_dal_power_level +ffffffff822762f0 t smu10_get_performance_level +ffffffff82276380 t smu10_get_current_shallow_sleep_clocks +ffffffff822763e0 t smu10_get_clock_by_type_with_latency +ffffffff82276530 t smu10_get_clock_by_type_with_voltage +ffffffff82276640 t smu10_set_watermarks_for_clocks_ranges +ffffffff82276710 t smu10_display_clock_voltage_request +ffffffff822767b0 t smu10_get_max_high_clocks +ffffffff822767e0 t smu10_power_off_asic +ffffffff82276830 t smu10_force_clock_level +ffffffff822769f0 t smu10_print_clock_levels +ffffffff82276d90 t smu10_gfx_off_control +ffffffff82276ea0 t smu10_read_sensor +ffffffff82277020 t smu10_set_active_display_count +ffffffff82277080 t smu10_set_min_deep_sleep_dcefclk +ffffffff822770e0 t smu10_get_power_profile_mode +ffffffff82277120 t smu10_set_power_profile_mode +ffffffff82277270 t smu10_set_fine_grain_clk_vol +ffffffff82277480 t smu10_powergate_mmhub +ffffffff822774a0 t smu10_smus_notify_pwe +ffffffff822774c0 t smu10_powergate_sdma +ffffffff822774e0 t smu10_set_hard_min_dcefclk_by_freq +ffffffff82277540 t smu10_set_hard_min_fclk_by_freq +ffffffff822775a0 t smu10_set_hard_min_gfxclk_by_freq +ffffffff82277600 t smu10_set_soft_max_gfxclk_by_freq +ffffffff82277660 t smu10_asic_reset +ffffffff82277680 t smu10_gfx_state_change +ffffffff822776c0 t smu10_dpm_get_pp_table_entry_callback +ffffffff82278000 T smu7_baco_get_capability +ffffffff82278060 T smu7_baco_get_state +ffffffff822780b0 T smu7_baco_set_state +ffffffff82279000 T smu7_powerdown_uvd +ffffffff82279050 T smu7_disable_clock_power_gating +ffffffff822790e0 T smu7_powergate_uvd +ffffffff822791d0 T smu7_powergate_vce +ffffffff822792c0 T smu7_update_clock_gatings +ffffffff82279670 T smu7_powergate_gfx +ffffffff8227a000 T smu7_get_sleep_divider_id_from_clock +ffffffff8227a0a0 T smu7_init_function_pointers +ffffffff8227a100 t smu7_hwmgr_backend_init +ffffffff8227bf50 t smu7_hwmgr_backend_fini +ffffffff8227bfc0 t smu7_setup_asic_task +ffffffff8227c330 t smu7_get_power_state_size +ffffffff8227c360 t smu7_apply_state_adjust_rules +ffffffff8227c7e0 t smu7_force_dpm_level +ffffffff8227ccf0 t smu7_enable_dpm_tasks +ffffffff8227f680 t smu7_disable_dpm_tasks +ffffffff8227fdc0 t smu7_dpm_patch_boot_state +ffffffff8227ff00 t smu7_get_pp_table_entry +ffffffff82280300 t smu7_get_number_of_powerplay_table_entries +ffffffff82280370 t smu7_dpm_get_mclk +ffffffff82280410 t smu7_dpm_get_sclk +ffffffff822804b0 t smu7_set_power_state_tasks +ffffffff82281240 t smu7_notify_smc_display_config_after_ps_adjustment +ffffffff82281270 t smu7_display_configuration_changed_task +ffffffff82281430 t smu7_set_max_fan_rpm_output +ffffffff82281460 t smu7_set_max_fan_pwm_output +ffffffff82281480 t smu7_set_fan_control_mode +ffffffff82281510 t smu7_get_fan_control_mode +ffffffff82281550 t smu7_register_irq_handlers +ffffffff82281600 t smu7_check_smc_update_required_for_display_configuration +ffffffff822816c0 t smu7_check_states_equal +ffffffff82281860 t smu7_get_performance_level +ffffffff82281900 t smu7_get_clock_by_type +ffffffff82281ac0 t smu7_get_clock_by_type_with_latency +ffffffff82281c60 t smu7_set_watermarks_for_clocks_ranges +ffffffff82281ea0 t smu7_get_max_high_clocks +ffffffff82281f20 t smu7_power_off_asic +ffffffff82281f80 t smu7_force_clock_level +ffffffff82282090 t smu7_print_clock_levels +ffffffff82282670 t smu7_get_sclk_od +ffffffff822826e0 t smu7_set_sclk_od +ffffffff822827a0 t smu7_get_mclk_od +ffffffff82282810 t smu7_set_mclk_od +ffffffff822828d0 t smu7_read_sensor +ffffffff82282ba0 t smu7_avfs_control +ffffffff82282c70 t smu7_notify_cac_buffer_info +ffffffff82282e10 t smu7_get_thermal_temperature_range +ffffffff82282eb0 t smu7_get_power_profile_mode +ffffffff82282ef0 t smu7_set_power_profile_mode +ffffffff82283150 t smu7_odn_edit_dpm_table +ffffffff82283300 t phm_add_voltage +ffffffff82283410 t smu7_check_dpm_table_updated +ffffffff82283560 t smu7_odn_initial_default_setting +ffffffff82283690 t smu7_set_dpm_event_sources +ffffffff822837b0 t smu7_get_pp_table_entry_callback_func_v0 +ffffffff82283cb0 t smu7_get_pp_table_entry_callback_func_v1 +ffffffff82285000 T smu7_enable_didt_config +ffffffff822853c0 t smu7_program_pt_config_registers +ffffffff822855b0 t smu7_enable_didt +ffffffff822857a0 T smu7_disable_didt_config +ffffffff82285860 T smu7_enable_smc_cac +ffffffff822858f0 T smu7_disable_smc_cac +ffffffff82285980 T smu7_set_power_limit +ffffffff822859e0 T smu7_enable_power_containment +ffffffff82285b70 T smu7_disable_power_containment +ffffffff82285c90 T smu7_power_control_set_level +ffffffff82286000 T smu7_fan_ctrl_get_fan_speed_info +ffffffff82286080 T smu7_fan_ctrl_get_fan_speed_pwm +ffffffff82286140 T smu7_fan_ctrl_get_fan_speed_rpm +ffffffff822861f0 T smu7_fan_ctrl_set_static_mode +ffffffff82286320 T smu7_fan_ctrl_set_default_mode +ffffffff82286400 T smu7_fan_ctrl_start_smc_fan_control +ffffffff82286530 T smu7_fan_ctrl_stop_smc_fan_control +ffffffff82286550 T smu7_fan_ctrl_set_fan_speed_pwm +ffffffff82286740 T smu7_fan_ctrl_reset_fan_speed_to_default +ffffffff82286930 T smu7_fan_ctrl_set_fan_speed_rpm +ffffffff82286b10 T smu7_thermal_get_temperature +ffffffff82286b70 T smu7_thermal_disable_alert +ffffffff82286c10 T smu7_thermal_stop_thermal_controller +ffffffff82286d90 T smu7_start_thermal_controller +ffffffff82287140 T smu7_thermal_ctrl_uninitialize_thermal_controller +ffffffff82288000 T smu8_init_function_pointers +ffffffff82288040 t smu8_hwmgr_backend_init +ffffffff82288520 t smu8_hwmgr_backend_fini +ffffffff822885a0 t smu8_setup_asic_task +ffffffff82288ac0 t smu8_get_power_state_size +ffffffff82288af0 t smu8_apply_state_adjust_rules +ffffffff82288c40 t smu8_dpm_force_dpm_level +ffffffff82288f30 t smu8_enable_dpm_tasks +ffffffff822890c0 t smu8_disable_dpm_tasks +ffffffff822891a0 t smu8_dpm_patch_boot_state +ffffffff82289200 t smu8_dpm_get_pp_table_entry +ffffffff82289260 t smu8_dpm_get_num_of_pp_table_entries +ffffffff822892b0 t smu8_dpm_powerdown_uvd +ffffffff82289300 t smu8_dpm_powergate_vce +ffffffff822894d0 t smu8_dpm_powergate_uvd +ffffffff82289700 t smu8_dpm_powergate_acp +ffffffff82289760 t smu8_dpm_get_mclk +ffffffff82289790 t smu8_dpm_get_sclk +ffffffff82289800 t smu8_set_power_state_tasks +ffffffff82289b50 t smu8_set_cpu_power_state +ffffffff82289bd0 t smu8_store_cc6_data +ffffffff82289c50 t smu8_get_dal_power_level +ffffffff82289cd0 t smu8_get_performance_level +ffffffff82289dc0 t smu8_get_current_shallow_sleep_clocks +ffffffff82289e20 t smu8_get_clock_by_type +ffffffff82289f60 t smu8_get_max_high_clocks +ffffffff8228a020 t smu8_power_off_asic +ffffffff8228a0a0 t smu8_force_clock_level +ffffffff8228a110 t smu8_print_clock_levels +ffffffff8228a2e0 t smu8_read_sensor +ffffffff8228a5e0 t smu8_notify_cac_buffer_info +ffffffff8228a690 t smu8_get_thermal_temperature_range +ffffffff8228a710 t smu8_dpm_get_pp_table_entry_callback +ffffffff8228b000 T smu9_baco_get_capability +ffffffff8228b0d0 T smu9_baco_get_state +ffffffff8228c000 T convert_to_vid +ffffffff8228c050 T convert_to_vddc +ffffffff8228c0a0 T phm_copy_clock_limits_array +ffffffff8228c180 T phm_copy_overdrive_settings_limits_array +ffffffff8228c260 T phm_set_field_to_u32 +ffffffff8228c2c0 T phm_wait_on_register +ffffffff8228c3d0 T phm_wait_on_indirect_register +ffffffff8228c500 T phm_wait_for_register_unequal +ffffffff8228c600 T phm_wait_for_indirect_register_unequal +ffffffff8228c730 T phm_cf_want_uvd_power_gating +ffffffff8228c770 T phm_cf_want_vce_power_gating +ffffffff8228c7b0 T phm_trim_voltage_table +ffffffff8228c8e0 T phm_get_svi2_mvdd_voltage_table +ffffffff8228ca70 T phm_get_svi2_vddci_voltage_table +ffffffff8228cc00 T phm_get_svi2_vdd_voltage_table +ffffffff8228cca0 T phm_trim_voltage_table_to_fit_state_table +ffffffff8228cd80 T phm_reset_single_dpm_table +ffffffff8228ce50 T phm_setup_pcie_table_entry +ffffffff8228ce90 T phm_get_dpm_level_enable_mask_value +ffffffff8228cfb0 T phm_get_voltage_index +ffffffff8228d030 T phm_get_voltage_id +ffffffff8228d0b0 T phm_find_closest_vddci +ffffffff8228d110 T phm_find_boot_level +ffffffff8228d180 T phm_get_sclk_for_voltage_evv +ffffffff8228d230 T phm_initializa_dynamic_state_adjustment_rule_settings +ffffffff8228d340 T phm_get_lowest_enabled_level +ffffffff8228d380 T phm_apply_dal_min_voltage_request +ffffffff8228d450 T phm_get_voltage_evv_on_sclk +ffffffff8228d500 T phm_irq_process +ffffffff8228d6a0 t orderly_poweroff +ffffffff8228d6b0 T smu9_register_irq_handlers +ffffffff8228d760 T smu_atom_get_data_table +ffffffff8228d7d0 T smu_get_voltage_dependency_table_ppt_v1 +ffffffff8228d8b0 T smu_set_watermarks_for_clocks_ranges +ffffffff8228e000 T tonga_baco_set_state +ffffffff8228f000 T vega10_baco_set_state +ffffffff82290000 T vega10_enable_disable_vce_dpm +ffffffff82290090 T vega10_hwmgr_init +ffffffff822900f0 t vega10_hwmgr_backend_init +ffffffff82290ef0 t vega10_hwmgr_backend_fini +ffffffff82290f60 t vega10_setup_asic_task +ffffffff82291090 t vega10_get_power_state_size +ffffffff822910c0 t vega10_apply_state_adjust_rules +ffffffff82291450 t vega10_dpm_force_dpm_level +ffffffff822918b0 t vega10_enable_dpm_tasks +ffffffff82294320 t vega10_disable_dpm_tasks +ffffffff82294900 t vega10_patch_boot_state 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vega12_baco_set_state +ffffffff822a1000 T vega12_enable_disable_vce_dpm +ffffffff822a1090 T vega12_hwmgr_init +ffffffff822a10d0 t vega12_hwmgr_backend_init +ffffffff822a1930 t vega12_hwmgr_backend_fini +ffffffff822a1990 t vega12_setup_asic_task +ffffffff822a19d0 t vega12_apply_clocks_adjust_rules +ffffffff822a1dc0 t vega12_dpm_force_dpm_level +ffffffff822a2210 t vega12_enable_dpm_tasks +ffffffff822a2d00 t vega12_disable_dpm_tasks +ffffffff822a2e00 t vega12_patch_boot_state +ffffffff822a2e30 t vega12_power_gate_vce +ffffffff822a2ee0 t vega12_power_gate_uvd +ffffffff822a2f90 t vega12_dpm_get_mclk +ffffffff822a2fe0 t vega12_dpm_get_sclk +ffffffff822a3030 t vega12_notify_smc_display_config_after_ps_adjustment +ffffffff822a3190 t vega12_pre_display_configuration_changed_task +ffffffff822a3270 t vega12_display_configuration_changed_task +ffffffff822a3350 t vega12_set_fan_control_mode +ffffffff822a33b0 t vega12_get_fan_control_mode +ffffffff822a33f0 t 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arcturus_get_unique_id +ffffffff822e1b20 t arcturus_init_smc_tables +ffffffff822e1c90 t arcturus_setup_pptable +ffffffff822e1dd0 t arcturus_set_fan_speed_pwm +ffffffff822e1f70 t arcturus_set_fan_speed_rpm +ffffffff822e2090 t arcturus_log_thermal_throttling_event +ffffffff822e2480 t arcturus_get_gpu_metrics +ffffffff822e2690 t arcturus_get_fan_parameters +ffffffff822e26d0 t arcturus_get_current_clk_freq_by_table +ffffffff822e2810 t arcturus_get_smu_metrics_data +ffffffff822e2a80 t arcturus_upload_dpm_level +ffffffff822e2b70 t arcturus_i2c_xfer +ffffffff822e2e30 t arcturus_i2c_func +ffffffff822e2e60 t arcturus_set_fan_static_mode +ffffffff822e4000 T cyan_skillfish_set_ppt_funcs +ffffffff822e4030 t cyan_skillfish_print_clk_levels +ffffffff822e4150 t cyan_skillfish_od_edit_dpm_table +ffffffff822e4430 t cyan_skillfish_read_sensor +ffffffff822e45e0 t cyan_skillfish_is_dpm_running +ffffffff822e4680 t cyan_skillfish_init_smc_tables +ffffffff822e4760 t cyan_skillfish_get_enabled_mask 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navi10_notify_smc_display_config +ffffffff822e7040 t navi10_is_dpm_running +ffffffff822e7090 t navi10_get_fan_speed_rpm +ffffffff822e7130 t navi10_set_watermarks_table +ffffffff822e72e0 t navi10_get_thermal_temperature_range +ffffffff822e73e0 t navi10_get_uclk_dpm_states +ffffffff822e74f0 t navi10_set_default_od_settings +ffffffff822e7750 t navi10_display_disable_memory_clock_switch +ffffffff822e77d0 t navi10_get_power_limit +ffffffff822e78f0 t navi10_update_pcie_parameters +ffffffff822e7a50 t navi10_i2c_control_init +ffffffff822e7b80 t navi10_i2c_control_fini +ffffffff822e7bc0 t navi10_init_smc_tables +ffffffff822e7df0 t navi10_setup_pptable +ffffffff822e8000 t navi10_baco_enter +ffffffff822e8050 t navi10_baco_exit +ffffffff822e8150 t navi1x_get_gpu_metrics +ffffffff822e8af0 t navi10_enable_mgpu_fan_boost +ffffffff822e8b70 t navi10_get_fan_parameters +ffffffff822e8bb0 t navi10_post_smu_init +ffffffff822e8e30 t navi10_get_default_config_table_settings +ffffffff822e8e80 t navi10_set_config_table +ffffffff822e8f30 t navi1x_get_smu_metrics_data +ffffffff822e9390 t navi10_get_smu_metrics_data +ffffffff822e95c0 t navi10_i2c_xfer +ffffffff822e9880 t navi10_i2c_func +ffffffff822e98b0 t navi10_umc_hybrid_cdr_workaround +ffffffff822ea000 T sienna_cichlid_set_ppt_funcs +ffffffff822ea050 t sienna_cichlid_run_btc +ffffffff822ea0d0 t sienna_cichlid_get_allowed_feature_mask +ffffffff822ea350 t sienna_cichlid_set_default_dpm_table +ffffffff822ea920 t sienna_cichlid_populate_umd_state_clk +ffffffff822ea9e0 t sienna_cichlid_print_clk_levels +ffffffff822eabc0 t sienna_cichlid_force_clk_levels +ffffffff822eacf0 t sienna_cichlid_od_edit_dpm_table +ffffffff822eb270 t sienna_cichlid_restore_user_od_settings +ffffffff822eb300 t sienna_cichlid_get_power_profile_mode +ffffffff822eb560 t sienna_cichlid_set_power_profile_mode +ffffffff822eb820 t sienna_cichlid_dpm_set_vcn_enable +ffffffff822eb8e0 t sienna_cichlid_dpm_set_jpeg_enable +ffffffff822eb960 t sienna_cichlid_read_sensor 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sienna_cichlid_get_smartshift_power_percentage +ffffffff822ee5f0 t sienna_cichlid_i2c_xfer +ffffffff822ee8a0 t sienna_cichlid_i2c_func +ffffffff822ef000 T smu_v11_0_init_microcode +ffffffff822ef2a0 T smu_v11_0_fini_microcode +ffffffff822ef320 T smu_v11_0_load_microcode +ffffffff822ef470 T smu_v11_0_check_fw_status +ffffffff822ef4c0 T smu_v11_0_check_fw_version +ffffffff822ef670 T smu_v11_0_setup_pptable +ffffffff822ef7a0 T smu_v11_0_init_smc_tables +ffffffff822ef900 T smu_v11_0_fini_smc_tables +ffffffff822efb30 T smu_v11_0_init_power +ffffffff822efbc0 T smu_v11_0_fini_power +ffffffff822efc20 T smu_v11_0_get_vbios_bootup_values +ffffffff822eff80 T smu_v11_0_notify_memory_pool_location +ffffffff822f0070 T smu_v11_0_set_min_deep_sleep_dcefclk +ffffffff822f00f0 T smu_v11_0_set_driver_table_location +ffffffff822f0160 T smu_v11_0_set_tool_table_location +ffffffff822f01d0 T smu_v11_0_init_display_count +ffffffff822f0230 T smu_v11_0_set_allowed_mask +ffffffff822f0300 T smu_v11_0_system_features_control +ffffffff822f0320 T smu_v11_0_notify_display_change +ffffffff822f0390 T smu_v11_0_init_max_sustainable_clocks +ffffffff822f05f0 t smu_v11_0_get_max_sustainable_clock +ffffffff822f0710 T smu_v11_0_get_current_power_limit +ffffffff822f07e0 T smu_v11_0_set_power_limit +ffffffff822f0920 T smu_v11_0_interrupt_work +ffffffff822f09a0 T smu_v11_0_enable_thermal_alert +ffffffff822f0a40 T smu_v11_0_disable_thermal_alert +ffffffff822f0a60 T smu_v11_0_get_gfx_vdd +ffffffff822f0b20 T smu_v11_0_display_clock_voltage_request +ffffffff822f0c60 T smu_v11_0_set_hard_freq_limited_range +ffffffff822f0d40 T smu_v11_0_gfx_off_control +ffffffff822f0db0 T smu_v11_0_get_fan_control_mode +ffffffff822f0e00 T smu_v11_0_set_fan_speed_pwm +ffffffff822f0fa0 t smu_v11_0_set_fan_static_mode +ffffffff822f1150 T smu_v11_0_set_fan_speed_rpm +ffffffff822f1270 T smu_v11_0_get_fan_speed_pwm +ffffffff822f13b0 T smu_v11_0_get_fan_speed_rpm +ffffffff822f14b0 T smu_v11_0_set_fan_control_mode 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vangogh_dpm_set_jpeg_enable +ffffffff822f4ec0 t vangogh_read_sensor +ffffffff822f4ff0 t vangogh_is_dpm_running +ffffffff822f5050 t vangogh_set_watermarks_table +ffffffff822f51e0 t vangogh_set_performance_level +ffffffff822f5b10 t vangogh_get_power_limit +ffffffff822f5c90 t vangogh_get_ppt_limit +ffffffff822f5d00 t vangogh_get_dpm_clock_table +ffffffff822f5e70 t vangogh_init_smc_tables +ffffffff822f60c0 t vangogh_system_features_control +ffffffff822f6110 t vangogh_set_power_limit +ffffffff822f6270 t vangogh_get_gfxoff_status +ffffffff822f6300 t vangogh_get_gfxoff_entrycount +ffffffff822f6370 t vangogh_set_gfxoff_residency +ffffffff822f63e0 t vangogh_get_gfxoff_residency +ffffffff822f6420 t vangogh_mode2_reset +ffffffff822f6560 t vangogh_common_get_gpu_metrics +ffffffff822f6bb0 t vangogh_post_smu_init +ffffffff822f6d50 t vangogh_set_fine_grain_gfx_freq_parameters +ffffffff822f6dc0 t vangogh_common_get_smu_metrics_data +ffffffff822f7110 t vangogh_force_dpm_limit_value +ffffffff822f7250 t vangogh_get_dpm_ultimate_freq +ffffffff822f7610 t vangogh_set_soft_freq_limited_range +ffffffff822f8000 T renoir_set_ppt_funcs +ffffffff822f80a0 t renoir_get_current_power_state +ffffffff822f8120 t renoir_print_clk_levels +ffffffff822f8620 t renoir_force_clk_levels +ffffffff822f8850 t renoir_od_edit_dpm_table +ffffffff822f8b30 t renoir_get_power_profile_mode +ffffffff822f8c00 t renoir_set_power_profile_mode +ffffffff822f8d20 t renoir_dpm_set_vcn_enable +ffffffff822f8da0 t renoir_dpm_set_jpeg_enable +ffffffff822f8e20 t renoir_read_sensor +ffffffff822f9210 t renoir_is_dpm_running +ffffffff822f9250 t renoir_set_watermarks_table +ffffffff822f9400 t renoir_set_performance_level +ffffffff822f9940 t renoir_get_dpm_clock_table +ffffffff822f9c90 t renoir_init_smc_tables +ffffffff822f9e00 t renoir_get_enabled_mask +ffffffff822f9e40 t renoir_get_dpm_ultimate_freq +ffffffff822fa0e0 t renoir_get_gpu_metrics +ffffffff822fa300 t renoir_gfx_state_change_set +ffffffff822fa330 t renoir_set_fine_grain_gfx_freq_parameters +ffffffff822fa3d0 t renoir_force_dpm_limit_value +ffffffff822fb000 T smu_v12_0_check_fw_status +ffffffff822fb050 T smu_v12_0_check_fw_version +ffffffff822fb110 T smu_v12_0_powergate_sdma +ffffffff822fb150 T smu_v12_0_set_gfx_cgpg +ffffffff822fb1b0 T smu_v12_0_get_gfxoff_status +ffffffff822fb240 T smu_v12_0_gfx_off_control +ffffffff822fb360 T smu_v12_0_fini_smc_tables +ffffffff822fb410 T smu_v12_0_set_default_dpm_tables +ffffffff822fb440 T smu_v12_0_mode2_reset +ffffffff822fb460 T smu_v12_0_set_soft_freq_limited_range +ffffffff822fb5a0 T smu_v12_0_set_driver_table_location +ffffffff822fb610 T smu_v12_0_get_vbios_bootup_values +ffffffff822fc000 T aldebaran_set_ppt_funcs +ffffffff822fc040 t aldebaran_get_allowed_feature_mask +ffffffff822fc090 t aldebaran_set_default_dpm_table +ffffffff822fc290 t aldebaran_populate_umd_state_clk +ffffffff822fc390 t aldebaran_print_clk_levels +ffffffff822fc550 t aldebaran_force_clk_levels +ffffffff822fc700 t aldebaran_usr_edit_dpm_table +ffffffff822fc920 t aldebaran_read_sensor +ffffffff822fcbc0 t aldebaran_is_dpm_running +ffffffff822fcc10 t aldebaran_get_thermal_temperature_range +ffffffff822fcce0 t aldebaran_set_performance_level +ffffffff822fcd90 t aldebaran_get_power_limit +ffffffff822fcf20 t aldebaran_set_df_cstate +ffffffff822fcfa0 t aldebaran_allow_xgmi_power_down +ffffffff822fd040 t aldebaran_i2c_control_init +ffffffff822fd100 t aldebaran_i2c_control_fini +ffffffff822fd140 t aldebaran_get_unique_id +ffffffff822fd220 t aldebaran_init_smc_tables +ffffffff822fd3b0 t aldebaran_set_mp1_state +ffffffff822fd3f0 t aldebaran_setup_pptable +ffffffff822fd4c0 t aldebaran_system_features_control +ffffffff822fd620 t aldebaran_set_power_limit +ffffffff822fd6b0 t aldebaran_is_baco_supported +ffffffff822fd6e0 t aldebaran_is_mode1_reset_supported +ffffffff822fd710 t aldebaran_is_mode2_reset_supported +ffffffff822fd740 t aldebaran_mode1_reset +ffffffff822fd820 t aldebaran_mode2_reset +ffffffff822fd9d0 t aldebaran_set_soft_freq_limited_range +ffffffff822fdbd0 t aldebaran_log_thermal_throttling_event +ffffffff822fdee0 t aldebaran_get_gpu_metrics +ffffffff822fe170 t aldebaran_smu_handle_passthrough_sbr +ffffffff822fe190 t aldebaran_smu_send_hbm_bad_page_num +ffffffff822fe210 t aldebaran_get_ecc_info +ffffffff822fe370 t aldebaran_send_hbm_bad_channel_flag +ffffffff822fe450 t aldebaran_get_current_clk_freq_by_table +ffffffff822fe590 t aldebaran_get_smu_metrics_data +ffffffff822fe7e0 t aldebaran_upload_dpm_level +ffffffff822fe8d0 t aldebaran_i2c_xfer +ffffffff822feb80 t aldebaran_i2c_func +ffffffff822ff000 T smu_v13_0_init_microcode +ffffffff822ff1d0 T smu_v13_0_fini_microcode +ffffffff822ff250 T smu_v13_0_load_microcode +ffffffff822ff280 T smu_v13_0_init_pptable_microcode +ffffffff822ff430 T smu_v13_0_get_pptable_from_firmware +ffffffff822ff550 T smu_v13_0_check_fw_status +ffffffff822ff5c0 T smu_v13_0_check_fw_version +ffffffff822ff6f0 T smu_v13_0_setup_pptable +ffffffff822ff890 T smu_v13_0_init_smc_tables +ffffffff822ff9e0 T smu_v13_0_fini_smc_tables +ffffffff822ffbd0 T smu_v13_0_init_power +ffffffff822ffc50 T smu_v13_0_fini_power +ffffffff822ffcd0 T smu_v13_0_get_vbios_bootup_values +ffffffff822fff60 T smu_v13_0_notify_memory_pool_location +ffffffff82300020 T smu_v13_0_set_min_deep_sleep_dcefclk +ffffffff823000a0 T smu_v13_0_set_driver_table_location +ffffffff82300110 T smu_v13_0_set_tool_table_location +ffffffff82300180 T smu_v13_0_init_display_count +ffffffff823001c0 T smu_v13_0_set_allowed_mask +ffffffff82300290 T smu_v13_0_gfx_off_control +ffffffff82300300 T smu_v13_0_system_features_control +ffffffff82300320 T smu_v13_0_notify_display_change +ffffffff82300390 T smu_v13_0_init_max_sustainable_clocks +ffffffff823005f0 t smu_v13_0_get_max_sustainable_clock +ffffffff82300710 T smu_v13_0_get_current_power_limit +ffffffff823007e0 T smu_v13_0_set_power_limit +ffffffff823008f0 T smu_v13_0_enable_thermal_alert +ffffffff82300980 T smu_v13_0_disable_thermal_alert +ffffffff823009c0 T smu_v13_0_get_gfx_vdd +ffffffff82300a80 T smu_v13_0_display_clock_voltage_request +ffffffff82300bc0 T smu_v13_0_set_hard_freq_limited_range +ffffffff82300ca0 T smu_v13_0_get_fan_control_mode +ffffffff82300cf0 T smu_v13_0_set_fan_speed_pwm +ffffffff82300f00 t smu_v13_0_set_fan_static_mode +ffffffff823010c0 T smu_v13_0_set_fan_control_mode +ffffffff82301220 T smu_v13_0_set_fan_speed_rpm +ffffffff823013c0 T smu_v13_0_set_xgmi_pstate +ffffffff823013e0 T smu_v13_0_register_irq_handler +ffffffff823014b0 T smu_v13_0_get_max_sustainable_clocks_by_dc +ffffffff82301540 T smu_v13_0_set_azalia_d3_pme +ffffffff82301560 T smu_v13_0_wait_for_event +ffffffff823015c0 T smu_v13_0_get_dpm_ultimate_freq +ffffffff82301720 T smu_v13_0_set_soft_freq_limited_range +ffffffff82301800 T smu_v13_0_set_performance_level +ffffffff82301f90 T smu_v13_0_set_power_source +ffffffff82301ff0 T smu_v13_0_set_single_dpm_table +ffffffff82302270 T smu_v13_0_get_dpm_level_range +ffffffff823023f0 T smu_v13_0_get_current_pcie_link_width_level +ffffffff82302440 T smu_v13_0_get_current_pcie_link_width +ffffffff823024a0 T smu_v13_0_get_current_pcie_link_speed_level +ffffffff823024f0 T smu_v13_0_get_current_pcie_link_speed +ffffffff82302540 T smu_v13_0_set_vcn_enable +ffffffff823025f0 T smu_v13_0_set_jpeg_enable +ffffffff82302610 T smu_v13_0_run_btc +ffffffff82302690 T smu_v13_0_gpo_control +ffffffff82302720 T smu_v13_0_deep_sleep_control +ffffffff82302980 T smu_v13_0_gfx_ulv_control +ffffffff823029f0 T smu_v13_0_baco_set_armd3_sequence +ffffffff82302a10 T smu_v13_0_baco_is_support +ffffffff82302aa0 T smu_v13_0_baco_get_state +ffffffff82302ad0 T smu_v13_0_baco_set_state +ffffffff82302b90 T smu_v13_0_baco_enter +ffffffff82302ca0 T smu_v13_0_baco_exit +ffffffff82302d40 T smu_v13_0_set_gfx_power_up_by_imu +ffffffff82302d80 T smu_v13_0_od_edit_dpm_table +ffffffff82303030 T smu_v13_0_set_default_dpm_tables +ffffffff82303060 T smu_v13_0_set_smu_mailbox_registers +ffffffff823030d0 T smu_v13_0_mode1_reset +ffffffff82303150 T smu_v13_0_update_pcie_parameters +ffffffff823033b0 t smu_v13_0_set_irq_state +ffffffff82303930 t smu_v13_0_irq_process +ffffffff82303df0 t orderly_poweroff +ffffffff82304000 T smu_v13_0_0_set_ppt_funcs +ffffffff823040e0 t smu_v13_0_0_get_allowed_feature_mask +ffffffff82304220 t smu_v13_0_0_set_default_dpm_table +ffffffff82304650 t smu_v13_0_0_populate_umd_state_clk +ffffffff82304780 t smu_v13_0_0_print_clk_levels +ffffffff823048a0 t smu_v13_0_0_force_clk_levels +ffffffff82304a20 t smu_v13_0_0_get_power_profile_mode +ffffffff82304c80 t smu_v13_0_0_set_power_profile_mode +ffffffff82304f80 t smu_v13_0_0_read_sensor +ffffffff823051a0 t smu_v13_0_0_is_dpm_running +ffffffff823051f0 t smu_v13_0_0_get_fan_speed_pwm +ffffffff823052d0 t smu_v13_0_0_get_fan_speed_rpm +ffffffff82305340 t smu_v13_0_0_get_thermal_temperature_range +ffffffff82305450 t smu_v13_0_0_dump_pptable +ffffffff82305480 t smu_v13_0_0_get_power_limit +ffffffff82305560 t smu_v13_0_0_set_df_cstate +ffffffff82305580 t smu_v13_0_0_i2c_control_init +ffffffff823056b0 t smu_v13_0_0_i2c_control_fini +ffffffff823056f0 t smu_v13_0_0_get_unique_id +ffffffff823057a0 t smu_v13_0_0_init_smc_tables +ffffffff82305990 t smu_v13_0_0_set_mp1_state +ffffffff823059d0 t smu_v13_0_0_setup_pptable +ffffffff82305b10 t smu_v13_0_0_system_features_control +ffffffff82305b20 t smu_v13_0_0_baco_enter +ffffffff82305b70 t smu_v13_0_0_baco_exit +ffffffff82305bd0 t smu_v13_0_0_is_mode1_reset_supported +ffffffff82305c30 t smu_v13_0_0_mode1_reset +ffffffff82305cc0 t smu_v13_0_0_get_dpm_ultimate_freq +ffffffff82305de0 t smu_v13_0_0_get_gpu_metrics +ffffffff82306200 t smu_v13_0_0_enable_mgpu_fan_boost +ffffffff82306250 t smu_v13_0_0_smu_send_bad_mem_page_num +ffffffff823062d0 t smu_v13_0_0_send_bad_mem_channel_flag +ffffffff82306350 t smu_v13_0_0_get_smu_metrics_data +ffffffff823066c0 t smu_v13_0_get_throttler_status +ffffffff82306880 t smu_v13_0_0_i2c_xfer +ffffffff82306b30 t smu_v13_0_0_i2c_func +ffffffff82307000 T smu_v13_0_4_set_ppt_funcs +ffffffff823070b0 t smu_v13_0_4_print_clk_levels +ffffffff82307170 t smu_v13_0_4_force_clk_levels +ffffffff82307410 t smu_v13_0_4_read_sensor +ffffffff823076c0 t smu_v13_0_4_is_dpm_running +ffffffff82307710 t smu_v13_0_4_set_watermarks_table +ffffffff823078a0 t smu_v13_0_4_set_performance_level +ffffffff82307de0 t smu_v13_0_4_init_smc_tables +ffffffff82307f50 t smu_v13_0_4_fini_smc_tables +ffffffff82308000 t smu_v13_0_4_system_features_control +ffffffff82308050 t smu_v13_0_4_mode2_reset +ffffffff82308070 t smu_v13_0_4_get_dpm_ultimate_freq +ffffffff82308490 t smu_v13_0_4_get_gpu_metrics +ffffffff82308660 t smu_v13_0_4_set_fine_grain_gfx_freq_parameters +ffffffff823086c0 t smu_v13_0_4_get_smu_metrics_data +ffffffff82309000 T smu_v13_0_5_set_ppt_funcs +ffffffff82309090 t smu_v13_0_5_set_default_dpm_tables +ffffffff823090c0 t smu_v13_0_5_print_clk_levels +ffffffff82309170 t smu_v13_0_5_force_clk_levels +ffffffff823092d0 t smu_v13_0_5_od_edit_dpm_table +ffffffff82309580 t smu_v13_0_5_dpm_set_vcn_enable +ffffffff823095a0 t smu_v13_0_5_dpm_set_jpeg_enable +ffffffff823095c0 t smu_v13_0_5_read_sensor +ffffffff823097e0 t smu_v13_0_5_is_dpm_running +ffffffff82309830 t smu_v13_0_5_set_watermarks_table +ffffffff823099c0 t smu_v13_0_5_set_performance_level +ffffffff82309ba0 t smu_v13_0_5_init_smc_tables +ffffffff82309d10 t smu_v13_0_5_fini_smc_tables +ffffffff82309dc0 t smu_v13_0_5_system_features_control +ffffffff82309e10 t smu_v13_0_5_mode2_reset +ffffffff82309e90 t smu_v13_0_5_get_dpm_ultimate_freq +ffffffff8230a2d0 t smu_v13_0_5_get_gpu_metrics +ffffffff8230a410 t smu_v13_0_5_set_fine_grain_gfx_freq_parameters +ffffffff8230a470 t smu_v13_0_5_get_smu_metrics_data +ffffffff8230b000 T smu_v13_0_7_set_ppt_funcs +ffffffff8230b050 t smu_v13_0_7_get_allowed_feature_mask +ffffffff8230b1c0 t smu_v13_0_7_set_default_dpm_table +ffffffff8230b5f0 t smu_v13_0_7_populate_umd_state_clk +ffffffff8230b720 t smu_v13_0_7_print_clk_levels +ffffffff8230b840 t smu_v13_0_7_force_clk_levels +ffffffff8230b9c0 t smu_v13_0_7_get_power_profile_mode +ffffffff8230bca0 t smu_v13_0_7_set_power_profile_mode +ffffffff8230bee0 t smu_v13_0_7_read_sensor +ffffffff8230c0f0 t smu_v13_0_7_is_dpm_running +ffffffff8230c140 t smu_v13_0_7_get_fan_speed_pwm +ffffffff8230c220 t smu_v13_0_7_get_fan_speed_rpm +ffffffff8230c290 t smu_v13_0_7_get_thermal_temperature_range +ffffffff8230c3a0 t smu_v13_0_7_dump_pptable +ffffffff8230c3d0 t smu_v13_0_7_get_power_limit +ffffffff8230c4b0 t smu_v13_0_7_set_df_cstate +ffffffff8230c4d0 t smu_v13_0_7_init_smc_tables +ffffffff8230c6c0 t smu_v13_0_7_check_fw_status +ffffffff8230c710 t smu_v13_0_7_set_mp1_state +ffffffff8230c750 t smu_v13_0_7_setup_pptable +ffffffff8230c8b0 t smu_v13_0_7_baco_enter +ffffffff8230c900 t smu_v13_0_7_baco_exit +ffffffff8230c960 t smu_v13_0_7_is_mode1_reset_supported +ffffffff8230c9a0 t smu_v13_0_7_get_dpm_ultimate_freq +ffffffff8230cac0 t smu_v13_0_7_get_gpu_metrics +ffffffff8230ced0 t smu_v13_0_7_enable_mgpu_fan_boost +ffffffff8230cf20 t smu_v13_0_7_get_smu_metrics_data +ffffffff8230d270 t smu_v13_0_7_get_throttler_status +ffffffff8230e000 T yellow_carp_set_ppt_funcs +ffffffff8230e040 t yellow_carp_set_default_dpm_tables +ffffffff8230e070 t yellow_carp_print_clk_levels +ffffffff8230e130 t yellow_carp_force_clk_levels +ffffffff8230e3d0 t yellow_carp_od_edit_dpm_table +ffffffff8230e680 t yellow_carp_dpm_set_vcn_enable +ffffffff8230e6a0 t yellow_carp_dpm_set_jpeg_enable +ffffffff8230e6c0 t yellow_carp_read_sensor +ffffffff8230ea60 t yellow_carp_is_dpm_running +ffffffff8230eab0 t yellow_carp_set_watermarks_table +ffffffff8230ec40 t yellow_carp_set_performance_level +ffffffff8230f180 t yellow_carp_init_smc_tables +ffffffff8230f2f0 t yellow_carp_fini_smc_tables +ffffffff8230f3a0 t yellow_carp_system_features_control +ffffffff8230f3f0 t yellow_carp_get_gfxoff_status +ffffffff8230f480 t yellow_carp_mode2_reset +ffffffff8230f500 t yellow_carp_get_dpm_ultimate_freq +ffffffff8230f950 t yellow_carp_get_gpu_metrics +ffffffff8230fb10 t yellow_carp_post_smu_init +ffffffff8230fb90 t yellow_carp_set_fine_grain_gfx_freq_parameters +ffffffff8230fbf0 t yellow_carp_get_smu_metrics_data +ffffffff82310000 T smu_cmn_send_msg_without_waiting +ffffffff82310170 T smu_cmn_wait_for_response +ffffffff823102b0 T smu_cmn_send_smc_msg_with_param +ffffffff823105d0 T smu_cmn_to_asic_specific_index +ffffffff823106e0 t __smu_cmn_reg_print_error +ffffffff82310920 T smu_cmn_send_smc_msg +ffffffff82310940 T smu_cmn_send_debug_smc_msg +ffffffff823109c0 T smu_cmn_feature_is_supported +ffffffff82310a70 T smu_cmn_feature_is_enabled +ffffffff82310b60 T smu_cmn_clk_dpm_is_enabled +ffffffff82310c60 T smu_cmn_get_enabled_mask +ffffffff82310d50 T smu_cmn_get_indep_throttler_status +ffffffff82310e00 T smu_cmn_feature_update_enable_state +ffffffff82310ea0 T smu_cmn_feature_set_enabled +ffffffff82310f70 T smu_cmn_get_pp_feature_mask +ffffffff82311120 T smu_cmn_set_pp_feature_mask +ffffffff82311220 T smu_cmn_disable_all_features_with_exception +ffffffff823112d0 T smu_cmn_get_smc_version +ffffffff823113a0 T smu_cmn_update_table +ffffffff82311500 T smu_cmn_write_watermarks_table +ffffffff823115d0 T smu_cmn_write_pptable +ffffffff82311690 T smu_cmn_get_metrics_table +ffffffff823117f0 T smu_cmn_get_combo_pptable +ffffffff823118c0 T smu_cmn_init_soft_gpu_metrics +ffffffff823119a0 T smu_cmn_set_mp1_state +ffffffff82311a40 T smu_cmn_is_audio_func_enabled +ffffffff82312000 T pci_mcfg_init +ffffffff82312050 T pci_lookup_segment +ffffffff823120b0 T pci_attach_hook +ffffffff823120e0 T pci_bus_maxdevs +ffffffff82312110 T pci_make_tag +ffffffff82312180 T pci_decompose_tag +ffffffff823121e0 T pci_conf_size +ffffffff82312240 T pci_mcfg_map_bus +ffffffff823122c0 T pci_conf_read +ffffffff82312410 T pci_conf_write +ffffffff82312550 T pci_msix_table_map +ffffffff82312670 T pci_msix_table_unmap +ffffffff82312710 T msi_hwmask +ffffffff82312740 T msi_hwunmask +ffffffff82312770 T msi_addroute +ffffffff82312870 T msi_delroute +ffffffff823128e0 T pci_intr_map_msi +ffffffff82312960 T msix_hwmask +ffffffff82312990 T msix_hwunmask +ffffffff823129c0 T msix_addroute +ffffffff82312bb0 T msix_delroute +ffffffff82312d10 T pci_intr_map_msix +ffffffff82312de0 T pci_intr_map +ffffffff82313000 T pci_intr_string +ffffffff823130e0 T pci_intr_establish +ffffffff82313130 T pci_intr_establish_cpu +ffffffff82313290 T pci_intr_disestablish +ffffffff823132b0 T pci_init_extents +ffffffff82313490 T pci_probe_device_hook +ffffffff823134d0 T pci_dev_postattach +ffffffff823134e0 T pci_min_powerstate +ffffffff823134f0 T pci_set_powerstate_md +ffffffff82314000 T pciide_machdep_compat_intr_establish +ffffffff82314060 T pciide_machdep_compat_intr_disestablish +ffffffff82315000 T vga_post_init +ffffffff82315310 t vm86_emu_inb +ffffffff82315360 t vm86_emu_inw +ffffffff823153a0 t vm86_emu_inl +ffffffff823153e0 t vm86_emu_outb +ffffffff82315430 t vm86_emu_outw +ffffffff82315470 t vm86_emu_outl +ffffffff823154b0 T vga_post_call +ffffffff82315520 T vga_post_free +ffffffff82315590 T ddb_vgapost +ffffffff82316000 T pchbmatch +ffffffff82316040 T pchbattach +ffffffff823164b0 T pchbactivate +ffffffff82316520 T pchb_amd64ht_attach +ffffffff82316670 T pchb_rnd +ffffffff823166f0 T pchb_print +ffffffff82317000 T amas_match +ffffffff82317050 T amas_attach +ffffffff823170b0 T amas_intl_nodes +ffffffff82317140 T amas_get_pagerange +ffffffff82318000 T agp_flush_cache +ffffffff82318030 T agp_flush_cache_range +ffffffff82318040 T agp_init_map +ffffffff82318110 T agp_destroy_map +ffffffff82318150 T agp_map_subregion +ffffffff82318180 T agp_unmap_subregion +ffffffff823181b0 T agp_map_atomic +ffffffff823181e0 T agp_unmap_atomic +ffffffff82319000 T cardslotmatch +ffffffff82319050 T cardslotattach +ffffffff823192a0 T cardslot_event +ffffffff82319300 T cardslot_cb_print +ffffffff82319350 T cardslot_16_print +ffffffff823193a0 T cardslot_16_submatch +ffffffff823193f0 T cardslot_event_throw +ffffffff82319490 T cardslot_process_event +ffffffff8231a000 T cardbusmatch +ffffffff8231a050 T cardbusattach +ffffffff8231a130 T cardbus_read_tuples +ffffffff8231a4e0 T parse_tuple +ffffffff8231a760 T cardbus_attach_card +ffffffff8231aee0 T enable_function +ffffffff8231af80 T decode_tuples +ffffffff8231b050 T cardbusprint +ffffffff8231b140 T cardbussubmatch +ffffffff8231b1a0 T disable_function +ffffffff8231b200 T cardbus_detach_card +ffffffff8231b2e0 T cardbus_intr_establish +ffffffff8231b310 T cardbus_intr_disestablish +ffffffff8231b330 T cardbus_function_enable +ffffffff8231b410 T cardbus_function_disable +ffffffff8231b470 T cardbus_matchbyid +ffffffff8231b4e0 T decode_tuple +ffffffff8231c000 T cardbus_mapreg_map +ffffffff8231c1b0 T cardbus_mapreg_unmap +ffffffff8231d000 T cardbus_read_exrom +ffffffff8231e000 T rbus_space_alloc +ffffffff8231e060 T rbus_space_alloc_subregion +ffffffff8231e240 T rbus_space_free +ffffffff8231e2d0 T rbus_new_body +ffffffff8231e360 T rbus_new_root_delegate +ffffffff8231e430 T rbus_new_root_share +ffffffff8231f000 T com_cardbus_match +ffffffff8231f070 T com_cardbus_attach +ffffffff8231f220 T com_cardbus_detach +ffffffff8231f2c0 T com_cardbus_find_csdev +ffffffff8231f440 T com_cardbus_gofigure +ffffffff8231f900 T com_cardbus_enable +ffffffff8231f9d0 T com_cardbus_disable +ffffffff8231fa20 T com_cardbus_setup +ffffffff82320000 T xl_cardbus_match +ffffffff82320090 T xl_cardbus_attach +ffffffff82320420 T xl_cardbus_detach +ffffffff823204e0 T xl_cardbus_lookup +ffffffff823205a0 T xl_cardbus_intr_ack +ffffffff82321000 T dc_cardbus_match +ffffffff82321030 T dc_cardbus_attach +ffffffff823213c0 T dc_cardbus_detach +ffffffff82321460 T dc_cardbus_setup +ffffffff82322000 T fxp_cardbus_match +ffffffff82322030 T fxp_cardbus_attach +ffffffff82322240 T fxp_cardbus_detach +ffffffff823222d0 T fxp_cardbus_setup +ffffffff82323000 t rl_cardbus_match +ffffffff82323030 t rl_cardbus_attach +ffffffff823231d0 t rl_cardbus_detach +ffffffff82323290 T rl_cardbus_setup +ffffffff82324000 T re_cardbus_probe +ffffffff82324030 T re_cardbus_attach +ffffffff82324230 T re_cardbus_detach +ffffffff82324310 T re_cardbus_setup +ffffffff82325000 T ath_cardbus_match +ffffffff82325050 T ath_cardbus_attach +ffffffff82325180 T ath_cardbus_detach +ffffffff82325250 T ath_cardbus_enable +ffffffff82325320 T ath_cardbus_disable +ffffffff82325370 T ath_cardbus_power +ffffffff823253b0 T ath_cardbus_setup +ffffffff82326000 T athn_cardbus_match +ffffffff82326030 T athn_cardbus_attach +ffffffff82326170 T athn_cardbus_detach +ffffffff82326210 T athn_cardbus_enable +ffffffff823262e0 T athn_cardbus_disable +ffffffff82326330 T athn_cardbus_power +ffffffff82326370 T athn_cardbus_read +ffffffff823263a0 T athn_cardbus_write +ffffffff823263d0 T athn_cardbus_write_barrier +ffffffff82326400 T athn_cardbus_setup +ffffffff82327000 T atw_cardbus_match +ffffffff82327030 T atw_cardbus_attach +ffffffff82327220 T atw_cardbus_detach +ffffffff823272e0 T atw_cardbus_enable +ffffffff823273b0 T atw_cardbus_disable +ffffffff82327400 T atw_cardbus_power +ffffffff82327440 T atw_cardbus_setup +ffffffff82328000 T rtw_cardbus_match +ffffffff82328030 T rtw_cardbus_attach +ffffffff82328280 T rtw_cardbus_detach +ffffffff823283a0 T rtw_cardbus_intr_ack +ffffffff823283c0 T rtw_cardbus_funcregen +ffffffff82328420 T rtw_cardbus_enable +ffffffff82328580 T rtw_cardbus_disable +ffffffff82328660 T rtw_cardbus_power +ffffffff823286a0 T rtw_cardbus_setup +ffffffff82329000 T ral_cardbus_match +ffffffff82329030 T ral_cardbus_attach +ffffffff82329230 T ral_cardbus_detach +ffffffff823292e0 T ral_cardbus_activate +ffffffff82329370 T ral_cardbus_enable +ffffffff823294d0 T ral_cardbus_disable +ffffffff82329520 T ral_cardbus_setup +ffffffff823295c0 T ral_cardbus_wakeup +ffffffff8232a000 T acx_cardbus_match +ffffffff8232a030 T acx_cardbus_attach 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malo_cardbus_disable +ffffffff8232f500 T malo_cardbus_setup +ffffffff82330000 T bwi_cardbus_match +ffffffff82330030 T bwi_cardbus_attach +ffffffff823302a0 T bwi_cardbus_detach +ffffffff82330350 T bwi_cardbus_enable +ffffffff823304b0 T bwi_cardbus_disable +ffffffff82330500 T bwi_cardbus_setup +ffffffff823305a0 T bwi_cardbus_conf_read +ffffffff823305d0 T bwi_cardbus_conf_write +ffffffff82331000 T rbus_pccbb_parent_mem +ffffffff82331060 T rbus_pccbb_parent_io +ffffffff823310d0 T pccbb_attach_hook +ffffffff82332000 T pcmcia_match +ffffffff82332050 T pcmcia_attach +ffffffff823320d0 T pcmcia_activate +ffffffff82332180 T pcmcia_ccr_read +ffffffff823321d0 T pcmcia_ccr_write +ffffffff82332240 T pcmcia_card_attach +ffffffff82332450 T pcmcia_print +ffffffff823326b0 T pcmcia_submatch +ffffffff82332700 T pcmcia_card_detach +ffffffff823327b0 T pcmcia_card_deactivate +ffffffff82332820 T pcmcia_card_gettype +ffffffff82332880 T pcmcia_function_init +ffffffff823328d0 T pcmcia_function_enable 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ne_pcmcia_ax88190_set_iobase +ffffffff8233b000 T aic_pcmcia_match +ffffffff8233b0b0 T aic_pcmcia_attach +ffffffff8233b2b0 T aic_pcmcia_detach +ffffffff8233c000 T com_pcmcia_match +ffffffff8233c220 T com_pcmcia_attach +ffffffff8233c500 T com_pcmcia_detach +ffffffff8233c5a0 T com_pcmcia_activate +ffffffff8233c660 T com_pcmcia_enable1 +ffffffff8233c710 T com_pcmcia_enable +ffffffff8233c810 T com_pcmcia_disable +ffffffff8233c850 T com_pcmcia_disable1 +ffffffff8233d000 t wdc_pcmcia_match +ffffffff8233d0d0 t wdc_pcmcia_attach +ffffffff8233d540 T wdc_pcmcia_detach +ffffffff8233d640 T wdc_pcmcia_activate +ffffffff8233d760 T wdc_pcmcia_disk_device_interface_callback +ffffffff8233d800 T wdc_pcmcia_disk_device_interface +ffffffff8233d860 T wdc_pcmcia_lookup +ffffffff8233e000 T sm_pcmcia_match +ffffffff8233e100 T sm_pcmcia_attach +ffffffff8233e320 T sm_pcmcia_detach +ffffffff8233e3c0 T sm_pcmcia_activate +ffffffff8233e450 T sm_pcmcia_funce_enaddr +ffffffff8233e470 T sm_pcmcia_ascii_enaddr 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wsmuxread +ffffffff82384240 T wsmuxioctl +ffffffff82384270 T wsmux_add_mux +ffffffff82384350 T wsmux_detach_sc_locked +ffffffff82384440 T wsmuxkqfilter +ffffffff823844a0 T wsmux_depth +ffffffff82384540 T wsmux_attach_sc +ffffffff82384700 T wsmux_set_display +ffffffff82384830 T wsmux_get_layout +ffffffff82384860 T wsmux_set_layout +ffffffff82385000 T wsemul_pick +ffffffff82385070 T wsemul_getname +ffffffff82386000 T wsemul_getchar +ffffffff823861d0 T wsemul_local_translate +ffffffff82386490 T wsemul_utf8_translate +ffffffff82387000 T wsemul_vt100_cnattach +ffffffff82387200 T wsemul_vt100_attach +ffffffff823874d0 T wsemul_vt100_output +ffffffff823877b0 T wsemul_vt100_detach +ffffffff823878e0 T wsemul_vt100_resetop +ffffffff82387a90 T wsemul_vt100_output_esc +ffffffff82388110 T wsemul_vt100_output_csi +ffffffff82388250 T wsemul_vt100_output_scs94 +ffffffff82388310 T wsemul_vt100_output_scs94_percent +ffffffff82388360 T wsemul_vt100_output_scs96 +ffffffff823884b0 T wsemul_vt100_output_scs96_percent +ffffffff82388500 T wsemul_vt100_output_esc_hash +ffffffff82388860 T wsemul_vt100_output_esc_spc +ffffffff82388890 T wsemul_vt100_output_string +ffffffff82388900 T wsemul_vt100_output_string_esc +ffffffff82388950 T wsemul_vt100_output_dcs +ffffffff82388a00 T wsemul_vt100_output_dcs_dollar +ffffffff82388a60 T wsemul_vt100_output_esc_percent +ffffffff82388ac0 T wsemul_vt100_init +ffffffff82388b20 T wsemul_vt100_reset +ffffffff82388c40 T wsemul_vt100_nextline +ffffffff82388cd0 T wsemul_vt100_output_normal +ffffffff82388f10 T wsemul_vt100_output_c0c1 +ffffffff82389190 T wsemul_vt100_jump_scroll +ffffffff8238a000 T wsemul_vt100_scrollup +ffffffff8238a150 T wsemul_vt100_scrolldown +ffffffff8238a2a0 T wsemul_vt100_ed +ffffffff8238a510 T wsemul_vt100_el +ffffffff8238a600 T wsemul_vt100_handle_csi +ffffffff8238b590 T vt100_ansimode +ffffffff8238b600 T vt100_decmode +ffffffff8238b730 T vt100_selectattribute +ffffffff8238b870 T wsemul_vt100_handle_dcs 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nvram_csum_valid +ffffffff8239b150 T nvramopen +ffffffff8239b1a0 T nvramclose +ffffffff8239b1d0 T nvramread +ffffffff8239b2f0 T nvram_get_byte +ffffffff8239c000 T hid_start_parse +ffffffff8239c070 T hid_end_parse +ffffffff8239c0b0 T hid_get_item +ffffffff8239cc70 T hid_report_size +ffffffff8239cdc0 T hid_locate +ffffffff8239cf30 T hid_get_data_sub +ffffffff8239d050 T hid_get_data +ffffffff8239d160 T hid_get_udata +ffffffff8239d270 T hid_is_collection +ffffffff8239d390 T hid_get_collection_data +ffffffff8239d4a0 T hid_get_id_of_collection +ffffffff8239e000 T hidkbd_attach +ffffffff8239e0f0 T hidkbd_parse_desc +ffffffff8239e460 T hidkbd_delayed_decode +ffffffff8239e480 T hidkbd_attach_wskbd +ffffffff8239e510 T hidkbd_detach +ffffffff8239e5b0 T hidkbd_translate +ffffffff8239e600 T hidkbd_apple_translate +ffffffff8239e690 T hidkbd_apple_munge +ffffffff8239e800 T hidkbd_apple_tb_munge +ffffffff8239e9e0 T hidkbd_apple_iso_munge +ffffffff8239ec30 T hidkbd_apple_mba_munge +ffffffff8239ed90 T hidkbd_apple_iso_mba_munge +ffffffff8239efd0 T hidkbd_input +ffffffff8239f0d0 T hidkbd_decode +ffffffff8239f450 T hidkbd_enable +ffffffff8239f490 T hidkbd_set_leds +ffffffff8239f570 T hidkbd_ioctl +ffffffff8239f610 T hidkbd_bell +ffffffff8239f660 T hidkbd_cngetc +ffffffff8239f6f0 T hidkbd_hookup_bell +ffffffff823a0000 T hidms_stylus_hid_parse +ffffffff823a0300 T hidms_pad_buttons_hid_parse +ffffffff823a03d0 T hidms_wacom_setup +ffffffff823a06c0 T hidms_setup +ffffffff823a0c90 T hidms_attach +ffffffff823a0de0 T hidms_detach +ffffffff823a0e20 T hidms_input +ffffffff823a10d0 T hidms_enable +ffffffff823a1120 T hidms_ioctl +ffffffff823a12f0 T hidms_disable +ffffffff823a2000 T hidmt_get_resolution +ffffffff823a2110 T hidmt_setup +ffffffff823a2740 T hidmt_set_input_mode +ffffffff823a27d0 T hidmt_configure +ffffffff823a2870 T hidmt_attach +ffffffff823a2980 T hidmt_detach +ffffffff823a29c0 T hidmt_input +ffffffff823a2eb0 T hidmt_enable +ffffffff823a2ef0 T hidmt_ioctl +ffffffff823a2fc0 T hidmt_disable +ffffffff823a3000 T hidcc_match +ffffffff823a30e0 T hidcc_attach +ffffffff823a3290 T hidcc_parse +ffffffff823a3630 T hidcc_attach_wskbd +ffffffff823a36e0 T hidcc_detach +ffffffff823a3790 T hidcc_intr +ffffffff823a3b60 T hidcc_intr_slice +ffffffff823a3c50 T hidcc_setbits +ffffffff823a3e90 T hidcc_rawinput +ffffffff823a3f30 T hidcc_input +ffffffff823a3f90 T hidcc_bits_to_int +ffffffff823a40c0 T hidcc_usage_to_sym +ffffffff823a42d0 T hidcc_bit_to_sym +ffffffff823a4320 T hidcc_enable +ffffffff823a4340 T hidcc_set_leds +ffffffff823a4370 T hidcc_ioctl +ffffffff823a43e0 T hidcc_is_array +ffffffff823a4430 T hidcc_parse_array +ffffffff823a4540 T hidcc_add_key_volume +ffffffff823a4660 T hidcc_add_key +ffffffff823a4730 T hidcc_bits_to_volume +ffffffff823a5000 T usb_match +ffffffff823a5030 T usb_attach +ffffffff823a5330 T usb_detach +ffffffff823a53e0 T usb_activate +ffffffff823a5500 T usb_create_task_threads +ffffffff823a55a0 T usb_explore +ffffffff823a5740 T usb_attach_roothub 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usbd_get_report_descriptor +ffffffff823a93e0 T usbd_get_hid_descriptor +ffffffff823a9460 T usbd_get_config +ffffffff823a94b0 T usb_detach_wait +ffffffff823a9530 T usb_detach_wakeup +ffffffff823aa000 T usb_block_allocmem +ffffffff823aa260 T usb_block_freemem +ffffffff823aa2c0 T usb_allocmem +ffffffff823aa500 T usb_freemem +ffffffff823aa5c0 T usb_syncmem +ffffffff823ab000 T usbd_errstr +ffffffff823ab070 T usbd_get_string_desc +ffffffff823ab130 T usbd_get_string +ffffffff823ab320 T usbd_cache_devinfo +ffffffff823ab680 T usbd_printBCD +ffffffff823ab710 T usbd_devinfo +ffffffff823ab8b0 T usb_delay_ms +ffffffff823ab910 T usbd_delay_ms +ffffffff823ab9d0 T usbd_port_disown_to_1_1 +ffffffff823abaf0 T usbd_reset_port +ffffffff823abcb0 T usbd_find_idesc +ffffffff823abd60 T usbd_find_edesc +ffffffff823abe70 T usbd_fill_iface_data +ffffffff823ac0e0 T usbd_parse_idesc +ffffffff823ac200 T usbd_free_iface_data +ffffffff823ac270 T usbd_set_config +ffffffff823ac2c0 T usbd_set_config_no +ffffffff823ac390 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toshiba_get_brightness +ffffffff82511b20 T toshiba_fn_key_brightness_up +ffffffff82511c70 T toshiba_fn_key_brightness_down +ffffffff82511dc0 T toshiba_fn_key_video_output +ffffffff82511f10 T toshiba_get_video_output +ffffffff82512080 T toshiba_set_video_output +ffffffff82513000 T acpisony_match +ffffffff82513070 T acpisony_attach +ffffffff825130e0 T acpisony_activate +ffffffff82513120 T acpisony_notify_setup +ffffffff82513310 T acpisony_notify +ffffffff825136c0 T acpisony_find_offset +ffffffff825137d0 T acpisony_set_hotkey +ffffffff825139c0 T acpisony_brightness_down +ffffffff82513ad0 T acpisony_get_brightness +ffffffff82513b50 T acpisony_set_brightness +ffffffff82514000 T acpivideo_match +ffffffff82514070 T acpivideo_attach +ffffffff825141d0 T acpivideo_getpcibus +ffffffff82514210 T acpivideo_notify +ffffffff82514270 T acpivideo_set_policy +ffffffff82514340 T acpi_foundvout +ffffffff82514410 T acpivideo_print +ffffffff82515000 T acpivout_match +ffffffff82515070 T acpivout_attach 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aibs_find_cb +ffffffff82518000 T aplgpio_match +ffffffff82518060 T aplgpio_attach +ffffffff82518300 T aplgpio_intr +ffffffff82518440 T aplgpio_read_pin +ffffffff82518490 T aplgpio_write_pin +ffffffff82518500 T aplgpio_intr_establish +ffffffff82518620 T aplgpio_intr_enable +ffffffff825186b0 T aplgpio_intr_disable +ffffffff82519000 T bytgpio_match +ffffffff82519060 T bytgpio_attach +ffffffff82519320 T bytgpio_intr +ffffffff82519450 T bytgpio_read_pin +ffffffff825194b0 T bytgpio_write_pin +ffffffff82519530 T bytgpio_intr_establish +ffffffff825195a0 T bytgpio_intr_enable +ffffffff82519690 T bytgpio_intr_disable +ffffffff8251a000 T chvgpio_match +ffffffff8251a060 T chvgpio_attach +ffffffff8251a300 T chvgpio_intr +ffffffff8251a3d0 T chvgpio_read_pin +ffffffff8251a480 T chvgpio_write_pin +ffffffff8251a540 T chvgpio_intr_establish +ffffffff8251a710 T chvgpio_intr_enable +ffffffff8251a7e0 T chvgpio_intr_disable +ffffffff8251a8b0 T chvgpio_opreg_handler +ffffffff8251a940 T chvgpio_check_pin +ffffffff8251b000 T glkgpio_match +ffffffff8251b060 T glkgpio_attach +ffffffff8251b300 T glkgpio_intr +ffffffff8251b440 T glkgpio_read_pin +ffffffff8251b4a0 T glkgpio_write_pin +ffffffff8251b510 T glkgpio_intr_establish +ffffffff8251b630 T glkgpio_intr_enable +ffffffff8251b6c0 T glkgpio_intr_disable +ffffffff8251c000 T pchgpio_match +ffffffff8251c060 T pchgpio_attach +ffffffff8251c4b0 T pchgpio_activate +ffffffff8251c560 T pchgpio_intr +ffffffff8251c780 T pchgpio_read_pin +ffffffff8251c870 T pchgpio_write_pin +ffffffff8251c980 T pchgpio_intr_establish +ffffffff8251cbb0 T pchgpio_intr_enable +ffffffff8251ccf0 T pchgpio_intr_disable +ffffffff8251ce30 T pchgpio_save +ffffffff8251cea0 T pchgpio_restore +ffffffff8251cf10 T pchgpio_find_group +ffffffff8251cf90 T pchgpio_intr_handle +ffffffff8251d070 T pchgpio_save_pin +ffffffff8251d240 T pchgpio_restore_pin +ffffffff8251e000 T tipmic_match +ffffffff8251e050 T tipmic_attach +ffffffff8251e250 T tipmic_write_1 +ffffffff8251e310 T tipmic_intr +ffffffff8251e470 T tipmic_get_lpat +ffffffff8251e5a0 T tipmic_read_pin +ffffffff8251e5d0 T tipmic_write_pin +ffffffff8251e600 T tipmic_thermal_opreg_handler +ffffffff8251ee70 T tipmic_power_opreg_handler +ffffffff8251f110 T tipmic_read_1 +ffffffff8251f1d0 T tipmic_raw_to_temp +ffffffff82520000 T ccpmic_match +ffffffff82520050 T ccpmic_attach +ffffffff82520130 T ccpmic_get_lpat +ffffffff82520250 T ccpmic_read_pin +ffffffff825203d0 T ccpmic_write_pin +ffffffff82520530 T ccpmic_thermal_opreg_handler +ffffffff82520770 T ccpmic_power_opreg_handler +ffffffff82520960 T ccpmic_read_1 +ffffffff82520a20 T ccpmic_write_1 +ffffffff82520ae0 T ccpmic_raw_to_temp +ffffffff82521000 T com_acpi_match +ffffffff82521120 T com_acpi_attach +ffffffff825213a0 T com_acpi_is_designware +ffffffff82521400 T com_acpi_intr_designware +ffffffff82521430 T com_acpi_is_console +ffffffff82522000 T sdhc_acpi_match +ffffffff82522060 T sdhc_acpi_attach +ffffffff82522360 T sdhc_acpi_parse_resources +ffffffff82522420 T sdhc_acpi_card_detect_gpio +ffffffff82522480 T sdhc_acpi_card_detect_intr +ffffffff825224c0 T sdhc_acpi_power_on +ffffffff82522540 T sdhc_acpi_explore +ffffffff82522570 T sdhc_acpi_card_detect_nonremovable +ffffffff825225a0 T sdhc_acpi_do_explore +ffffffff82523000 T dwiic_acpi_match +ffffffff82523050 T dwiic_acpi_attach +ffffffff82523410 T dwiic_acpi_parse_crs +ffffffff82523540 T dwiic_acpi_power +ffffffff82523650 T dwiic_acpi_get_params +ffffffff82523790 T dwiic_i2c_intr_establish +ffffffff82523810 T dwiic_i2c_intr_disestablish +ffffffff82523830 T dwiic_i2c_intr_string +ffffffff825238c0 T dwiic_acpi_acquire_bus +ffffffff82523910 T dwiic_acpi_release_bus +ffffffff82523940 T dwiic_acpi_bus_scan +ffffffff82523980 T dwiic_acpi_found_hid +ffffffff82523e40 T dwiic_matchhids +ffffffff82523ed0 T dwiic_acpi_found_ihidev +ffffffff82524150 T dwiic_acpi_found_iatp +ffffffff825242b0 T dwiic_acpi_found_ietp +ffffffff82525000 T acpicbkbd_match +ffffffff82525030 T acpicbkbd_attach +ffffffff825250d0 T acpicbkbd_activate +ffffffff82525120 T acpicbkbd_get_backlight +ffffffff825251a0 T acpicbkbd_set_backlight +ffffffff82525240 T acpicbkbd_write_backlight +ffffffff82526000 T acpials_match +ffffffff82526090 T acpials_attach +ffffffff82526230 T acpials_read +ffffffff825262b0 T acpials_addtask +ffffffff825262f0 T acpials_notify +ffffffff82526380 T acpials_update +ffffffff82527000 T tpm_match +ffffffff82527050 T tpm_attach +ffffffff82527320 T tpm_activate +ffffffff82527430 T tpm2_start_method +ffffffff825274b0 T tpm_probe +ffffffff82527560 T tpm_init_tis +ffffffff825277d0 T tpm_init_crb +ffffffff82527b10 T tpm_suspend +ffffffff82527c00 T tpm_resume +ffffffff82527c30 T tpm_write_tis +ffffffff82527fb0 T tpm_read_tis +ffffffff82528190 T tpm_write_crb +ffffffff825285a0 T tpm_read_crb +ffffffff825288a0 T tpm_request_locality_tis +ffffffff82528990 T tpm_request_locality_crb +ffffffff82528a90 T tpm_release_locality_crb +ffffffff82528ae0 T tpm_release_locality_tis +ffffffff82528b50 T tpm_getburst +ffffffff82528c00 T tpm_status +ffffffff82528c20 T tpm_waitfor +ffffffff82528d00 T tpm_waitfor_status +ffffffff82529000 T acpihve_match +ffffffff825290b0 T acpihve_attach +ffffffff8252a000 T acpisbs_match +ffffffff8252a030 T acpisbs_attach +ffffffff8252a2a0 T acpisbs_activate +ffffffff8252a380 T acpisbs_read +ffffffff8252a440 T acpisbs_setup_sensors +ffffffff8252a560 T acpisbs_refresh_sensors +ffffffff8252a6d0 T acpisbs_notify +ffffffff8252a810 T acpi_smbus_read +ffffffff8252b000 T surface_match +ffffffff8252b060 T surface_attach +ffffffff8252b0c0 T surface_hotkey +ffffffff8252c000 T ipmi_acpi_match +ffffffff8252c030 T ipmi_acpi_attach +ffffffff8252c260 T ipmi_acpi_parse_crs +ffffffff8252d000 T amdgpio_match +ffffffff8252d060 T amdgpio_attach +ffffffff8252d2a0 T amdgpio_activate +ffffffff8252d390 T amdgpio_intr +ffffffff8252d530 T amdgpio_read_pin +ffffffff8252d580 T amdgpio_write_pin +ffffffff8252d5f0 T amdgpio_intr_establish +ffffffff8252d6e0 T amdgpio_intr_enable +ffffffff8252d760 T amdgpio_intr_disable +ffffffff8252d7e0 T amdgpio_save +ffffffff8252d860 T amdgpio_restore +ffffffff8252d8f0 T amdgpio_save_pin +ffffffff8252d960 T amdgpio_restore_pin +ffffffff8252d9d0 T amdgpio_pin_intr +ffffffff8252e000 T acpihid_match +ffffffff8252e030 T acpihid_attach +ffffffff8252e210 T acpihid_init_dsm +ffffffff8252e370 T acpihid_eval +ffffffff8252e590 T acpihid_notify +ffffffff8252e5f0 T acpihid_button_array_enable +ffffffff8252f000 t iosf_acpi_match +ffffffff8252f050 t iosf_acpi_attach +ffffffff8252f140 t iosf_acpi_mbi_mdr_rd +ffffffff8252f1b0 t iosf_acpi_mbi_mdr_wr +ffffffff82530000 T acpi_match +ffffffff82530060 T acpi_attach +ffffffff825300a0 T acpi_probe +ffffffff82530240 T acpi_map +ffffffff82530330 T acpi_unmap +ffffffff82530380 T acpi_bus_space_map +ffffffff825303a0 T acpi_bus_space_unmap +ffffffff825303c0 T acpi_intr_establish +ffffffff82530510 T acpi_intr_disestablish +ffffffff82530520 T acpi_scan +ffffffff825306d0 T acpi_acquire_glk +ffffffff82530730 T acpi_release_glk +ffffffff82530780 T acpi_attach_machdep +ffffffff82530910 T acpi_sleep_cpu +ffffffff82530ab0 T acpi_resume_cpu +ffffffff82530bb0 T sleep_mp +ffffffff82530cb0 T resume_mp +ffffffff82530da0 T acpi_iommu_device_map +ffffffff82531000 T hibernate_resume_machdep +ffffffff82531050 T hibernate_drop_to_real_mode +ffffffff82531060 T hibernate_activate_resume_pt_machdep +ffffffff825310a0 T hibernate_switch_stack_machdep +ffffffff825310e0 T hibernate_flush +ffffffff82531110 T acpi_savecpu +ffffffff82532000 T sleep_showstate +ffffffff82532100 T sleep_setstate +ffffffff82532160 T gosleep +ffffffff82532220 T sleep_abort +ffffffff82532250 T sleep_resume +ffffffff825322c0 T suspend_finish +ffffffff82533000 T acpiopen +ffffffff825330d0 T acpiclose +ffffffff82533160 T acpiioctl +ffffffff825332d0 T request_sleep +ffffffff82533350 T acpi_filtdetach +ffffffff825333a0 T acpi_filtread +ffffffff825333e0 T acpikqfilter +ffffffff82534000 T acpipci_match +ffffffff82534030 T acpipci_attach +ffffffff825342f0 T acpipci_osc +ffffffff82534430 T acpipci_parse_resources +ffffffff82534540 T acpipci_attach_bus +ffffffff82534710 T acpipci_print +ffffffff82534780 T acpipci_attach_busses +ffffffff82535000 T efiopen +ffffffff82535040 T eficlose +ffffffff82535070 T efiioctl +ffffffff82535110 T efiioc_get_table +ffffffff82535270 T efiioc_var_get +ffffffff825354f0 T efiioc_var_next +ffffffff82535710 T efiioc_var_set +ffffffff825359c0 T efi_adapt_error +ffffffff82536000 T efi_match +ffffffff82536060 T efi_attach +ffffffff82536330 T efi_map_runtime +ffffffff825364b0 T efi_enter +ffffffff82536550 T efi_leave +ffffffff825365d0 T efi_fault +ffffffff82537000 T vmm_probe +ffffffff82537050 T vmm_attach +ffffffff82537170 T vmm_activate +ffffffff825372b0 T vmmopen +ffffffff82537300 T vmmclose +ffffffff82537330 T vm_find +ffffffff82537450 T vmmioctl +ffffffff825376d0 T vm_create +ffffffff82537a80 T vm_get_info +ffffffff82537cd0 T vm_terminate +ffffffff82537e40 T vm_resetcpu +ffffffff82537f60 T vm_share_mem +ffffffff825380b0 T pledge_ioctl_vmm +ffffffff825381a0 T vm_find_vcpu +ffffffff82538200 T vm_create_check_mem_ranges +ffffffff82538360 T vm_teardown +ffffffff82538490 T vcpu_must_stop +ffffffff82539000 T vmm_enabled +ffffffff82539090 T vmm_attach_machdep +ffffffff82539250 T vmm_quiesce_vmx +ffffffff82539420 T vmm_activate_machdep +ffffffff82539540 T vmm_stop +ffffffff82539680 T vmm_start +ffffffff82539760 T vmmioctl_machdep +ffffffff82539830 T vm_intr_pending +ffffffff825398d0 T vm_mprotect_ept +ffffffff82539b70 T pledge_ioctl_vmm_machdep +ffffffff82539bc0 T vm_rwvmparams +ffffffff82539d50 T vmm_init_pvclock +ffffffff82539e30 T vm_rwregs +ffffffff82539f40 T vcpu_readregs_vmx +ffffffff8253a370 T vcpu_writeregs_vmx +ffffffff8253a7e0 T vcpu_readregs_svm +ffffffff8253ac90 T vcpu_writeregs_svm +ffffffff8253b160 T vmm_get_guest_memtype +ffffffff8253b1e0 T vmx_mprotect_ept +ffffffff8253b460 T vmx_pmap_find_pte_ept +ffffffff8253b530 T start_vmm_on_cpu +ffffffff8253b610 T stop_vmm_on_cpu +ffffffff8253b6b0 T vmclear_on_cpu +ffffffff8253b730 T vm_impl_init_vmx +ffffffff8253b850 T vm_impl_init_svm +ffffffff8253b970 T vm_impl_init +ffffffff8253ba10 T vm_impl_deinit +ffffffff8253ba40 T vcpu_reload_vmcs_vmx +ffffffff8253bb80 T vcpu_reset_regs_svm +ffffffff8253bf10 T svm_setmsrbrw +ffffffff8253c080 T svm_setmsrbr +ffffffff8253c150 T vmm_alloc_vpid +ffffffff8253c260 T svm_setmsrbw +ffffffff8253c340 T vmx_setmsrbr +ffffffff8253c3f0 T vmx_setmsrbw +ffffffff8253c4a0 T vmx_setmsrbrw +ffffffff8253c5b0 T svm_set_clean +ffffffff8253c600 T svm_set_dirty +ffffffff8253c650 T vcpu_reset_regs_vmx +ffffffff8253d200 T vcpu_vmx_check_cap +ffffffff8253d300 T vcpu_vmx_compute_ctrl +ffffffff8253d4e0 T vcpu_init_vmx +ffffffff8253d880 T vcpu_deinit_vmx +ffffffff8253da00 T vcpu_reset_regs +ffffffff8253da40 T vcpu_init_svm +ffffffff8253dbd0 T vcpu_deinit_svm +ffffffff8253dd10 T vcpu_init +ffffffff8253ddd0 T vmm_free_vpid +ffffffff8253de40 T vcpu_deinit +ffffffff8253de80 T vm_run +ffffffff8253e030 T vcpu_run_vmx +ffffffff8253e7c0 T vcpu_run_svm +ffffffff8253eda0 T vmm_fpurestore +ffffffff8253ee60 T vmm_fpusave +ffffffff8253eee0 T vmm_translate_gva +ffffffff8253f200 T vmm_update_pvclock +ffffffff8253f300 T vmx_get_exit_info +ffffffff8253f360 T vmx_handle_exit +ffffffff8253f7a0 T vmx_instruction_error_decode +ffffffff8253f970 T vmm_get_guest_cpu_cpl +ffffffff8253fa60 T vmx_handle_intr +ffffffff8253faf0 T svm_handle_hlt +ffffffff8253fb40 T vmx_handle_hlt +ffffffff8253fbf0 T svm_handle_exit +ffffffff8253ff10 T svm_handle_np_fault +ffffffff825400b0 T vmm_handle_cpuid +ffffffff82540740 T svm_handle_msr +ffffffff82540a00 T svm_handle_xsetbv +ffffffff82540aa0 T svm_handle_inout +ffffffff82540bc0 T vmm_inject_ud +ffffffff82540bf0 T vmm_inject_db +ffffffff82540c20 T vmx_handle_np_fault +ffffffff82540da0 T vmx_handle_inout +ffffffff82540f40 T vmx_handle_cr +ffffffff825411b0 T vmx_handle_rdmsr +ffffffff82541280 T vmx_handle_wrmsr +ffffffff825414e0 T vmx_handle_xsetbv +ffffffff825415b0 T vmm_inject_gp +ffffffff825415e0 T vmx_get_exit_qualification +ffffffff82541640 T vmx_get_guest_faulttype +ffffffff825416e0 T svm_get_guest_faulttype +ffffffff82541710 T svm_fault_page +ffffffff825417a0 T vmx_fault_page +ffffffff82541900 T vmm_get_guest_cpu_mode +ffffffff82541a00 T vmx_load_pdptes +ffffffff82541c80 T vmx_handle_cr0_write +ffffffff82541e90 T vmx_handle_cr4_write +ffffffff82541f30 T vmm_handle_xsetbv +ffffffff82541fc0 T vmx_handle_misc_enable_msr +ffffffff82542020 T vmm_pat_is_valid +ffffffff82542100 T vmm_gpa_is_valid +ffffffff82542170 T vmx_exit_reason_decode +ffffffff825421b0 T svm_exit_reason_decode +ffffffff82542fc0 T vcpu_state_decode +ffffffff82543000 T vmm_dispatch_intr +ffffffff82543020 T vmxon +ffffffff82543050 T vmxoff +ffffffff82543080 T vmclear +ffffffff825430b0 T vmptrld +ffffffff825430e0 T vmptrst +ffffffff82543110 T vmwrite +ffffffff82543140 T vmread +ffffffff82543170 T invvpid +ffffffff825431a0 T invept +ffffffff825431d0 T vmx_enter_guest +ffffffff825431fb t skip_init +ffffffff825432c8 t no_l1df_msr +ffffffff825432cb t l1df_tlb_loop +ffffffff825432e4 t l1df_tlb_done +ffffffff825432ec t l1df_load_cache +ffffffff82543303 t done_flush +ffffffff82543396 t do_resume +ffffffff8254341b t fail_launch_or_resume +ffffffff8254345d t fail_launch_unknown +ffffffff8254346a t fail_launch_invalid_vmcs +ffffffff82543477 t fail_launch_valid_vmcs +ffffffff82543494 t vmx_exit_handler_asm +ffffffff82543559 t restore_host +ffffffff825435f0 T svm_enter_guest +ffffffff82543780 t restore_host_svm +ffffffff82544000 T sdmmc_match +ffffffff82544050 T sdmmc_attach +ffffffff82544390 T sdmmc_detach +ffffffff82544440 T sdmmc_activate +ffffffff82544510 T sdmmc_discover_task +ffffffff825445d0 T sdmmc_create_thread +ffffffff82544640 T sdmmc_holds_root_device +ffffffff825446a0 T sdmmc_task_thread +ffffffff82544890 T sdmmc_needs_discover +ffffffff82544940 T sdmmc_del_task +ffffffff825449f0 T sdmmc_card_detach +ffffffff82544ad0 T sdmmc_add_task +ffffffff82544b50 T sdmmc_card_attach +ffffffff82544c60 T sdmmc_enable +ffffffff82544db0 T sdmmc_scan +ffffffff82544e40 T sdmmc_init +ffffffff82544f40 T sdmmc_disable +ffffffff825450a0 T sdmmc_function_free +ffffffff825450c0 T sdmmc_delay +ffffffff82545110 T sdmmc_select_card +ffffffff82545290 T sdmmc_set_bus_power +ffffffff82545450 T sdmmc_function_alloc +ffffffff825454e0 T sdmmc_app_command +ffffffff82545670 T sdmmc_mmc_command +ffffffff825456f0 T sdmmc_go_idle_state +ffffffff82545810 T sdmmc_send_if_cond +ffffffff82545960 T sdmmc_set_relative_addr +ffffffff82546000 T sdmmc_cisptr +ffffffff825460a0 T sdmmc_read_cis +ffffffff825463b0 T sdmmc_print_cis +ffffffff82546520 T sdmmc_check_cis_quirks +ffffffff82547000 T sdmmc_io_enable +ffffffff825472a0 T sdmmc_io_reset +ffffffff825473d0 T sdmmc_io_send_op_cond +ffffffff82547540 T sdmmc_io_scan +ffffffff82547690 T sdmmc_io_init +ffffffff825477c0 T sdmmc_io_set_highspeed +ffffffff82547a70 T sdmmc_io_set_bus_width +ffffffff82547d00 T sdmmc_io_function_ready +ffffffff82547e80 T sdmmc_io_read_1 +ffffffff82547fd0 T sdmmc_io_function_enable +ffffffff825483a0 T sdmmc_io_write_1 +ffffffff82548520 T sdmmc_io_function_disable +ffffffff825487a0 T sdmmc_io_attach +ffffffff82548890 T sdmmc_print +ffffffff82548ae0 T sdmmc_submatch +ffffffff82548b60 T sdmmc_io_detach +ffffffff82548c10 T sdmmc_io_rw_direct +ffffffff82548db0 T sdmmc_io_rw_extended_subr +ffffffff82548f50 T sdmmc_io_rw_extended +ffffffff82549340 T sdmmc_io_read_2 +ffffffff825494a0 T sdmmc_io_write_2 +ffffffff82549600 T sdmmc_io_read_4 +ffffffff82549760 T sdmmc_io_write_4 +ffffffff825498c0 T sdmmc_io_read_multi_1 +ffffffff825499b0 T sdmmc_io_write_multi_1 +ffffffff82549aa0 T sdmmc_io_read_region_1 +ffffffff82549b90 T sdmmc_io_write_region_1 +ffffffff82549c80 T sdmmc_io_xchg +ffffffff82549e10 T sdmmc_intr_enable +ffffffff8254a080 T sdmmc_intr_disable +ffffffff8254a2f0 T sdmmc_intr_establish +ffffffff8254a3f0 T sdmmc_intr_disestablish +ffffffff8254a4e0 T sdmmc_card_intr +ffffffff8254a530 T sdmmc_intr_task +ffffffff8254a5c0 T sdmmc_io_set_blocklen +ffffffff8254b000 T sdmmc_mem_enable +ffffffff8254b4e0 T sdmmc_mem_send_op_cond +ffffffff8254b690 T sdmmc_mem_signal_voltage +ffffffff8254b750 T sdmmc_mem_scan +ffffffff8254ba60 T sdmmc_decode_csd +ffffffff8254be70 T sdmmc_decode_cid +ffffffff8254c2b0 T sdmmc_mem_send_scr +ffffffff8254c3f0 T sdmmc_mem_decode_scr +ffffffff8254c470 T sdmmc_mem_send_cxd_data +ffffffff8254c5e0 T sdmmc_mem_set_bus_width +ffffffff8254c700 T sdmmc_mem_sd_switch +ffffffff8254c9b0 T sdmmc_be512_to_bitfield512 +ffffffff8254ca60 T sdmmc_mem_mmc_switch +ffffffff8254cb50 T sdmmc_mem_init +ffffffff8254cca0 T sdmmc_mem_set_blocklen +ffffffff8254cda0 T sdmmc_mem_sd_init +ffffffff8254d350 T sdmmc_mem_mmc_init +ffffffff8254dc70 T sdmmc_mem_select_transfer_mode +ffffffff8254dcf0 T sdmmc_mem_execute_tuning +ffffffff8254dd80 T sdmmc_mem_read_block_subr +ffffffff8254e0e0 T sdmmc_mem_single_read_block +ffffffff8254e1b0 T sdmmc_mem_read_block +ffffffff8254e370 T sdmmc_mem_write_block_subr +ffffffff8254e6c0 T sdmmc_mem_single_write_block +ffffffff8254e790 T sdmmc_mem_write_block +ffffffff8254e950 T sdmmc_mem_hibernate_write +ffffffff8254f000 T sdmmc_scsi_cmd +ffffffff8254f1f0 T sdmmc_minphys +ffffffff8254f270 T sdmmc_scsi_attach +ffffffff8254f460 T sdmmc_alloc_ccbs +ffffffff8254f5a0 T sdmmc_free_ccbs +ffffffff8254f600 T sdmmc_scsi_detach +ffffffff8254f760 T sdmmc_stimeout +ffffffff8254f7e0 T sdmmc_ccb_alloc +ffffffff8254f890 T sdmmc_ccb_free +ffffffff8254f970 T sdmmc_inquiry +ffffffff8254fbe0 T sdmmc_start_xs +ffffffff8254fcd0 T sdmmc_complete_xs +ffffffff8254fda0 T sdmmc_done_xs +ffffffff8254fdf0 T sdmmc_scsi_hibernate_io +ffffffff82550000 T bwfm_sdio_preinit +ffffffff825504f0 T bwfm_sdio_txcheck +ffffffff82550530 T bwfm_sdio_txdata +ffffffff825505a0 T bwfm_sdio_txctl +ffffffff825506f0 T bwfm_sdio_buscore_read +ffffffff82550700 T bwfm_sdio_buscore_write +ffffffff82550720 T bwfm_sdio_buscore_prepare +ffffffff82550860 T bwfm_sdio_buscore_activate +ffffffff825508e0 T bwfm_sdio_match +ffffffff825509b0 T bwfm_sdio_attach +ffffffff82550c70 T bwfm_sdio_detach +ffffffff82550cd0 T bwfm_sdio_task +ffffffff82550e30 T bwfm_sdio_write_1 +ffffffff82550e60 T bwfm_sdio_read_1 +ffffffff82550e90 T bwfm_sdio_write_4 +ffffffff82550f40 T bwfm_sdio_read_4 +ffffffff82550ff0 T bwfm_sdio_load_microcode +ffffffff82551250 T bwfm_sdio_clkctl +ffffffff82551380 T bwfm_sdio_dev_write +ffffffff825513d0 T bwfm_sdio_intr +ffffffff82551410 T bwfm_sdio_ram_read_write +ffffffff82551640 T bwfm_sdio_htclk +ffffffff825518a0 T bwfm_sdio_readshared +ffffffff82551970 T bwfm_sdio_dev_read +ffffffff825519b0 T bwfm_sdio_rx_frames +ffffffff82551d40 T bwfm_sdio_tx_frames +ffffffff82551e20 T bwfm_sdio_backplane +ffffffff82551ed0 T bwfm_sdio_buf_read +ffffffff82551fb0 T bwfm_sdio_buf_write +ffffffff82552060 T bwfm_sdio_frame_read_write +ffffffff825521e0 T bwfm_sdio_newbuf +ffffffff82552260 T bwfm_sdio_tx_ok +ffffffff825522b0 T bwfm_sdio_tx_ctrlframe +ffffffff825523b0 T bwfm_sdio_tx_dataframe +ffffffff82552500 T bwfm_sdio_rx_glom +ffffffff82553000 T onewire_match +ffffffff82553050 T onewire_attach +ffffffff825530f0 T onewire_detach +ffffffff82553160 T onewire_activate +ffffffff82553180 T onewire_scan +ffffffff82553390 T onewire_createthread +ffffffff82553400 T onewire_print +ffffffff825534d0 T onewirebus_print +ffffffff82553520 T onewire_lock +ffffffff82553540 T onewire_unlock +ffffffff82553560 T onewire_reset +ffffffff82553580 T onewire_bit +ffffffff825535a0 T onewire_read_byte +ffffffff825536e0 T onewire_write_byte +ffffffff825537c0 T onewire_read_block +ffffffff82553860 T onewire_write_block +ffffffff82553900 T onewire_triplet +ffffffff825539e0 T onewire_matchrom +ffffffff82553b30 T onewire_search +ffffffff82553ec0 T onewire_thread +ffffffff82554000 T onewire_crc +ffffffff825540e0 T onewire_crc16 +ffffffff825541c0 T onewire_famname +ffffffff82554200 T onewire_matchbyfam +ffffffff82555000 T owid_match +ffffffff82555030 T owid_attach +ffffffff82555100 T owid_detach +ffffffff82555140 T owid_activate +ffffffff82556000 T owsbm_match +ffffffff82556030 T owsbm_attach +ffffffff825561d0 T owsbm_detach +ffffffff82556240 T owsbm_activate +ffffffff82556270 T owsbm_update +ffffffff82557000 T owtemp_match +ffffffff82557030 T owtemp_attach +ffffffff82557130 T owtemp_detach +ffffffff825571a0 T owtemp_activate +ffffffff825571d0 T owtemp_update +ffffffff82558000 T owctr_match +ffffffff82558030 T owctr_attach +ffffffff82558180 T owctr_detach +ffffffff825581f0 T owctr_activate +ffffffff82558220 T owctr_update +ffffffff82558250 T owctr_update_counter +ffffffff82559000 A __text_page_start +ffffffff82559000 T Xsyscall_meltdown +ffffffff8255900c T Xsyscall +ffffffff8255926e t Xsyscall_trampback +ffffffff82559280 T intr_user_exit +ffffffff825592c2 t intr_user_exit_post_ast +ffffffff825593ee t Xiretq_trampback +ffffffff825593fa T doreti_iret +ffffffff8255a000 T alltraps +ffffffff8255a138 T recall_trap +ffffffff8255a150 T alltraps_kern +ffffffff8255a153 T alltraps_kern_meltdown +ffffffff8255b000 ? Xsyscall32 +ffffffff8255b000 A __kutext_start +ffffffff8255b000 A __text_page_end +ffffffff8255c000 ? Xtrap00 +ffffffff8255c010 ? Xtrap01 +ffffffff8255c020 ? Xtrap02 +ffffffff8255c028 c calltrap_specstk +ffffffff8255c0f0 ? calltrap_specstk_tramp +ffffffff8255c110 ? Xtrap03 +ffffffff8255c120 ? Xtrap04 +ffffffff8255c130 ? Xtrap05 +ffffffff8255c140 ? Xtrap06 +ffffffff8255c150 ? Xtrap07 +ffffffff8255c160 ? Xtrap08 +ffffffff8255c170 ? Xtrap09 +ffffffff8255c180 ? Xtrap0a +ffffffff8255c190 ? Xtrap0b +ffffffff8255c1a0 ? Xtrap0c +ffffffff8255c1b0 ? Xtrap0d +ffffffff8255c240 ? Xtrap0e +ffffffff8255c250 ? Xintrspurious +ffffffff8255c250 ? Xtrap0f +ffffffff8255c260 ? Xtrap10 +ffffffff8255c270 ? Xtrap11 +ffffffff8255c280 ? Xtrap12 +ffffffff8255c290 ? Xtrap13 +ffffffff8255c2a0 ? Xtrap14 +ffffffff8255c2b0 ? Xtrap15 +ffffffff8255c2c0 ? Xtrap16 +ffffffff8255c2c0 ? Xtrap17 +ffffffff8255c2c0 ? Xtrap18 +ffffffff8255c2c0 ? Xtrap19 +ffffffff8255c2c0 ? Xtrap1a +ffffffff8255c2c0 ? Xtrap1b +ffffffff8255c2c0 ? Xtrap1c +ffffffff8255c2c0 ? Xtrap1d +ffffffff8255c2c0 ? Xtrap1e +ffffffff8255c2c0 ? Xtrap1f +ffffffff8255c2d0 ? x2apic_eoi +ffffffff8255c2f0 ? Xintr_lapic_ipi +ffffffff8255c330 ? Xipi_invltlb +ffffffff8255c360 ? Xipi_invlpg +ffffffff8255c390 ? Xipi_invlrange +ffffffff8255c3d0 ? Xipi_invltlb_pcid +ffffffff8255c410 ? Xipi_invlpg_pcid +ffffffff8255c460 ? Xipi_invlrange_pcid +ffffffff8255c4d0 ? Xintr_lapic_ltimer +ffffffff8255c510 ? Xintr_xen_upcall +ffffffff8255c550 ? Xintr_hyperv_upcall +ffffffff8255c590 ? Xintr_legacy0 +ffffffff8255c5d0 ? Xintr_legacy1 +ffffffff8255c610 ? Xintr_legacy2 +ffffffff8255c650 ? Xintr_legacy3 +ffffffff8255c690 ? Xintr_legacy4 +ffffffff8255c6d0 ? Xintr_legacy5 +ffffffff8255c710 ? Xintr_legacy6 +ffffffff8255c750 ? Xintr_legacy7 +ffffffff8255c790 ? Xintr_legacy8 +ffffffff8255c7d0 ? Xintr_legacy9 +ffffffff8255c810 ? Xintr_legacy10 +ffffffff8255c850 ? Xintr_legacy11 +ffffffff8255c890 ? Xintr_legacy12 +ffffffff8255c8d0 ? Xintr_legacy13 +ffffffff8255c910 ? Xintr_legacy14 +ffffffff8255c950 ? Xintr_legacy15 +ffffffff8255c990 ? Xintr_ioapic_edge0 +ffffffff8255c9d0 ? Xintr_ioapic_edge1 +ffffffff8255ca10 ? Xintr_ioapic_edge2 +ffffffff8255ca50 ? Xintr_ioapic_edge3 +ffffffff8255ca90 ? Xintr_ioapic_edge4 +ffffffff8255cad0 ? Xintr_ioapic_edge5 +ffffffff8255cb10 ? Xintr_ioapic_edge6 +ffffffff8255cb50 ? Xintr_ioapic_edge7 +ffffffff8255cb90 ? Xintr_ioapic_edge8 +ffffffff8255cbd0 ? Xintr_ioapic_edge9 +ffffffff8255cc10 ? Xintr_ioapic_edge10 +ffffffff8255cc50 ? Xintr_ioapic_edge11 +ffffffff8255cc90 ? Xintr_ioapic_edge12 +ffffffff8255ccd0 ? Xintr_ioapic_edge13 +ffffffff8255cd10 ? Xintr_ioapic_edge14 +ffffffff8255cd50 ? Xintr_ioapic_edge15 +ffffffff8255cd90 ? Xintr_ioapic_edge16 +ffffffff8255cdd0 ? Xintr_ioapic_edge17 +ffffffff8255ce10 ? Xintr_ioapic_edge18 +ffffffff8255ce50 ? Xintr_ioapic_edge19 +ffffffff8255ce90 ? Xintr_ioapic_edge20 +ffffffff8255ced0 ? Xintr_ioapic_edge21 +ffffffff8255cf10 ? Xintr_ioapic_edge22 +ffffffff8255cf50 ? Xintr_ioapic_edge23 +ffffffff8255cf90 ? Xintr_ioapic_edge24 +ffffffff8255cfd0 ? Xintr_ioapic_edge25 +ffffffff8255d010 ? Xintr_ioapic_edge26 +ffffffff8255d050 ? Xintr_ioapic_edge27 +ffffffff8255d090 ? Xintr_ioapic_edge28 +ffffffff8255d0d0 ? Xintr_ioapic_edge29 +ffffffff8255d110 ? Xintr_ioapic_edge30 +ffffffff8255d150 ? Xintr_ioapic_edge31 +ffffffff8255d190 ? Xintr_ioapic_edge32 +ffffffff8255d1d0 ? Xintr_ioapic_edge33 +ffffffff8255d210 ? Xintr_ioapic_edge34 +ffffffff8255d250 ? Xintr_ioapic_edge35 +ffffffff8255d290 ? Xintr_ioapic_edge36 +ffffffff8255d2d0 ? Xintr_ioapic_edge37 +ffffffff8255d310 ? Xintr_ioapic_edge38 +ffffffff8255d350 ? Xintr_ioapic_edge39 +ffffffff8255d390 ? Xintr_ioapic_edge40 +ffffffff8255d3d0 ? Xintr_ioapic_edge41 +ffffffff8255d410 ? Xintr_ioapic_edge42 +ffffffff8255d450 ? Xintr_ioapic_edge43 +ffffffff8255d490 ? Xintr_ioapic_edge44 +ffffffff8255d4d0 ? Xintr_ioapic_edge45 +ffffffff8255d510 ? Xintr_ioapic_edge46 +ffffffff8255d550 ? Xintr_ioapic_edge47 +ffffffff8255d590 ? Xintr_ioapic_edge48 +ffffffff8255d5d0 ? Xintr_ioapic_edge49 +ffffffff8255d610 ? Xintr_ioapic_edge50 +ffffffff8255d650 ? Xintr_ioapic_edge51 +ffffffff8255d690 ? Xintr_ioapic_edge52 +ffffffff8255d6d0 ? Xintr_ioapic_edge53 +ffffffff8255d710 ? Xintr_ioapic_edge54 +ffffffff8255d750 ? Xintr_ioapic_edge55 +ffffffff8255d790 ? Xintr_ioapic_edge56 +ffffffff8255d7d0 ? Xintr_ioapic_edge57 +ffffffff8255d810 ? Xintr_ioapic_edge58 +ffffffff8255d850 ? Xintr_ioapic_edge59 +ffffffff8255d890 ? Xintr_ioapic_edge60 +ffffffff8255d8d0 ? Xintr_ioapic_edge61 +ffffffff8255d910 ? Xintr_ioapic_edge62 +ffffffff8255d950 ? Xintr_ioapic_edge63 +ffffffff8255d990 ? Xintr_ioapic_level0 +ffffffff8255d9d0 ? Xintr_ioapic_level1 +ffffffff8255da10 ? Xintr_ioapic_level2 +ffffffff8255da50 ? Xintr_ioapic_level3 +ffffffff8255da90 ? Xintr_ioapic_level4 +ffffffff8255dad0 ? Xintr_ioapic_level5 +ffffffff8255db10 ? Xintr_ioapic_level6 +ffffffff8255db50 ? Xintr_ioapic_level7 +ffffffff8255db90 ? Xintr_ioapic_level8 +ffffffff8255dbd0 ? Xintr_ioapic_level9 +ffffffff8255dc10 ? Xintr_ioapic_level10 +ffffffff8255dc50 ? Xintr_ioapic_level11 +ffffffff8255dc90 ? Xintr_ioapic_level12 +ffffffff8255dcd0 ? Xintr_ioapic_level13 +ffffffff8255dd10 ? Xintr_ioapic_level14 +ffffffff8255dd50 ? Xintr_ioapic_level15 +ffffffff8255dd90 ? Xintr_ioapic_level16 +ffffffff8255ddd0 ? Xintr_ioapic_level17 +ffffffff8255de10 ? Xintr_ioapic_level18 +ffffffff8255de50 ? Xintr_ioapic_level19 +ffffffff8255de90 ? Xintr_ioapic_level20 +ffffffff8255ded0 ? Xintr_ioapic_level21 +ffffffff8255df10 ? Xintr_ioapic_level22 +ffffffff8255df50 ? Xintr_ioapic_level23 +ffffffff8255df90 ? Xintr_ioapic_level24 +ffffffff8255dfd0 ? Xintr_ioapic_level25 +ffffffff8255e010 ? Xintr_ioapic_level26 +ffffffff8255e050 ? Xintr_ioapic_level27 +ffffffff8255e090 ? Xintr_ioapic_level28 +ffffffff8255e0d0 ? Xintr_ioapic_level29 +ffffffff8255e110 ? Xintr_ioapic_level30 +ffffffff8255e150 ? Xintr_ioapic_level31 +ffffffff8255e190 ? Xintr_ioapic_level32 +ffffffff8255e1d0 ? Xintr_ioapic_level33 +ffffffff8255e210 ? Xintr_ioapic_level34 +ffffffff8255e250 ? Xintr_ioapic_level35 +ffffffff8255e290 ? Xintr_ioapic_level36 +ffffffff8255e2d0 ? Xintr_ioapic_level37 +ffffffff8255e310 ? Xintr_ioapic_level38 +ffffffff8255e350 ? Xintr_ioapic_level39 +ffffffff8255e390 ? Xintr_ioapic_level40 +ffffffff8255e3d0 ? Xintr_ioapic_level41 +ffffffff8255e410 ? Xintr_ioapic_level42 +ffffffff8255e450 ? Xintr_ioapic_level43 +ffffffff8255e490 ? Xintr_ioapic_level44 +ffffffff8255e4d0 ? Xintr_ioapic_level45 +ffffffff8255e510 ? Xintr_ioapic_level46 +ffffffff8255e550 ? Xintr_ioapic_level47 +ffffffff8255e590 ? Xintr_ioapic_level48 +ffffffff8255e5d0 ? Xintr_ioapic_level49 +ffffffff8255e610 ? Xintr_ioapic_level50 +ffffffff8255e650 ? Xintr_ioapic_level51 +ffffffff8255e690 ? Xintr_ioapic_level52 +ffffffff8255e6d0 ? Xintr_ioapic_level53 +ffffffff8255e710 ? Xintr_ioapic_level54 +ffffffff8255e750 ? Xintr_ioapic_level55 +ffffffff8255e790 ? Xintr_ioapic_level56 +ffffffff8255e7d0 ? Xintr_ioapic_level57 +ffffffff8255e810 ? Xintr_ioapic_level58 +ffffffff8255e850 ? Xintr_ioapic_level59 +ffffffff8255e890 ? Xintr_ioapic_level60 +ffffffff8255e8d0 ? Xintr_ioapic_level61 +ffffffff8255e910 ? Xintr_ioapic_level62 +ffffffff8255e950 ? Xintr_ioapic_level63 +ffffffff8255f000 ? codepatch_fill_nop +ffffffff8255f000 A __cptext_start +ffffffff8255f000 A __kutext_end +ffffffff8255f0b0 ? codepatch_maprw +ffffffff8255f190 ? codepatch_unmaprw +ffffffff8255f200 ? codepatch_nop +ffffffff8255f360 ? codepatch_replace +ffffffff8255f510 ? codepatch_call +ffffffff8255f530 ? codepatch_jmp +ffffffff82560000 A __cptext_end +ffffffff82560000 A __rodata_start +ffffffff82560000 C _etext +ffffffff82560000 C etext +ffffffff82561000 r seeprom_read +ffffffff82561004 r icl_mg_pll_find_divisors.div1_vals +ffffffff82561028 r gen9bc_tgp_ddc_pin_map +ffffffff82561038 r athn_ac2qid +ffffffff82561038 r athn_ac2qid +ffffffff82561038 r athn_ac2qid +ffffffff82561044 r rtwn_get_rssi.cckoff +ffffffff8256106c r rsu_ac2qid +ffffffff8256107c r pckbc_portcmd +ffffffff82561080 r tht_fifo_write_pad.pad +ffffffff82561088 r rsu_get_rssi.cckoff +ffffffff8256109c r adlp_n_revids +ffffffff825610ec r apple_iso_trans +ffffffff825610f0 r dg2_g12_revid_step_tbl +ffffffff825610f8 r wihap_check_tx.txratetable +ffffffff825610fc r dmamode +ffffffff82561124 r gen9_edram_size_mb.sets +ffffffff82562000 r isomappings +ffffffff82562080 r unimappings +ffffffff82562230 r replacements +ffffffff82565bf6 r cmd0646_9_tim_udma +ffffffff825b9dc2 r pp_r600_decoded_lanes +ffffffff825d51df r cmd680_setup_channel.udma_tbl +ffffffff825dceaa r apollo_udma33_tim +ffffffff825e2f77 r substchar +ffffffff825e50ac r apollo_udma100_tim +ffffffff8260caed r apollo_udma66_tim +ffffffff82614012 r apollo_pio_rec +ffffffff8262356d r cy_pio_rec +ffffffff82652d80 r apollo_udma133_tim +ffffffff8265fa88 R drm_ca +ffffffff8265fab0 R drm_filtops +ffffffff8265fae0 R drmread_filtops +ffffffff82660000 r vga_emulops +ffffffff82660048 R vga_stdscreen +ffffffff82660078 R vga_stdscreen_mono +ffffffff826600a8 R vga_stdscreen_bf +ffffffff826600d8 R vga_40lscreen +ffffffff82660108 R vga_40lscreen_mono +ffffffff82660138 R vga_40lscreen_bf +ffffffff82660168 R vga_50lscreen +ffffffff82660198 R vga_50lscreen_mono +ffffffff826601c8 R vga_50lscreen_bf +ffffffff826601f8 R vga_screenlist +ffffffff82660208 R vga_screenlist_mono +ffffffff82660218 R vga_accessops +ffffffff82660278 r i945_wm_info +ffffffff826602b8 r bgansitopc +ffffffff826602c0 r pctoansi +ffffffff82660300 r sdma_offsets +ffffffff82660300 r sdma_offsets +ffffffff82660338 r iha_rate_tbl +ffffffff82660370 r i830_a_wm_info +ffffffff826603a8 r gen9_edram_size_mb.ways +ffffffff82660408 r aggr_periodic_times +ffffffff82660490 r jsl_ehl_revids +ffffffff82660508 r michael_final.pad +ffffffff82660530 r rt_copysa.maskarray +ffffffff82660538 r i915_wm_info +ffffffff82660540 r amdgpu_ih_clientid_jpeg +ffffffff82660540 r amdgpu_ih_clientid_uvds +ffffffff82660540 r amdgpu_ih_clientid_vcns +ffffffff82660540 r amdgpu_ih_clientid_vcns +ffffffff82660540 r amdgpu_ih_clientid_vcns +ffffffff82660578 r vga_setfontset.cmaptabb +ffffffff82660590 r tgl_revids +ffffffff826605e8 r i830_bc_wm_info +ffffffff82660658 r hsw_activate_psr2.map +ffffffff82660690 r __drm_universal_plane_init.default_modifiers +ffffffff826606a0 r iwn_tid2fifo +ffffffff826606b8 r vga_setfontset.cmaptaba +ffffffff826606c0 r crtc_offsets +ffffffff826606c0 r crtc_offsets +ffffffff826606c0 r crtc_offsets +ffffffff826606e0 r link_speed +ffffffff826606e0 r link_speed +ffffffff826606e0 r link_speed +ffffffff82660760 r rtwn_r88e_get_rssi.cckoff +ffffffff82661000 R edid_vendors +ffffffff826612c0 R edid_nvendors +ffffffff826612d0 R edid_products +ffffffff82661330 R edid_nproducts +ffffffff82661340 r _edid_modes +ffffffff82662000 R videomode_list +ffffffff82663080 R videomode_count +ffffffff82664000 r ahc_hard_errors +ffffffff82664080 r critical_sections +ffffffff826640b0 r patches +ffffffff82664d50 r seqprog +ffffffff82666000 r ahc_switch +ffffffff82667000 r termstat_strings +ffffffff82667020 r critical_sections +ffffffff82667060 r seqprog +ffffffff82667d50 r patches +ffffffff82669000 r ahd_switch +ffffffff8266a000 R aic_switch +ffffffff8266b000 R adw_switch +ffffffff8266c000 R gdt_switch +ffffffff8266d000 R twe_switch +ffffffff8266e000 R ciss_switch +ffffffff8266e030 R ciss_level +ffffffff8266e050 R ciss_stat +ffffffff8266f000 R ami_switch +ffffffff8266f028 R ami_raw_switch +ffffffff82670000 R mfi_switch +ffffffff82670028 R mfi_pd_switch +ffffffff82670050 r mfi_iop_xscale +ffffffff82670080 r mfi_iop_ppc +ffffffff826700b0 r mfi_iop_gen2 +ffffffff826700e0 r mfi_iop_skinny +ffffffff82670110 r mfi_bbu_indicators +ffffffff82671000 R qlw_switch +ffffffff82672000 R isp_2100_risc_code +ffffffff82684bf0 R isp_2200_risc_code +ffffffff82697990 R isp_2300_risc_code +ffffffff826b1408 R qla_switch +ffffffff826b1430 r qla_regs_2100 +ffffffff826b1460 r qla_regs_2200 +ffffffff826b1490 r qla_regs_23XX +ffffffff826b2000 R ahci_atascsi_methods +ffffffff826b3000 R nvme_switch +ffffffff826b3028 r nvme_ops +ffffffff826b4000 R mpi_switch +ffffffff826b4060 r bwi_rf_calc_nrssi_slope_11b.save_phy_regs +ffffffff826b4090 r chv_oa_mux_regs +ffffffff826b40b0 r fiji_clock_stretcher_lookup_table +ffffffff826b40b0 r tonga_clock_stretcher_lookup_table +ffffffff826b40d0 r iosf_pci_devices +ffffffff826b40f0 r link_speed +ffffffff826b40f0 r link_speed +ffffffff826b40f0 r link_speed +ffffffff826b4130 r drm_fb_xfrm.default_dst_pitch +ffffffff826b4130 r non_supported_protection +ffffffff826b4230 r tgl_uy_revids +ffffffff826b4280 r bwi_phy_noise_11g_rev1 +ffffffff826b4300 r cardslot_process_event.antonym_ev +ffffffff826b4390 r gen11_oa_mux_regs +ffffffff826b4480 r ddr2_cycle_tenths +ffffffff826b44f0 r rtw_intr_rx.ratetbl +ffffffff826b4570 r abm_config +ffffffff826b45e0 r getbootinfo.ports +ffffffff826b4630 r reg_offsets +ffffffff826b4640 r bwi_rf_lo_measure_11g.rf_lo_adjust +ffffffff826b4650 r init_non_clock_fields.look_up +ffffffff826b4660 r uftdi_8u232am_getrate.roundoff +ffffffff826b46b0 r zyd_rx_data.rates +ffffffff826b46c0 r ieee80211_ra_valid_tx_mcs.max_mcs +ffffffff826b4700 r mmio_invalidate_full.gen8_regs +ffffffff826b4730 r bwi_phy_noise_11g +ffffffff826b4740 r hpt366_pio +ffffffff826b4770 r glk_revids +ffffffff826b47b0 r bwi_rf_calc_nrssi_slope_11g.save_phy3_regs +ffffffff826b47d0 r ether_crc32_be_update.rev +ffffffff826b47d0 r rtw_grf5101_mac_crypt.caesar +ffffffff826b4820 r snb_b_fdi_train_param +ffffffff826b48f0 r intel_hpll_vco.elk_vco +ffffffff826b4950 r pin_offsets +ffffffff826b49b0 r firmware_list +ffffffff826b4a10 r atom_arg_shift +ffffffff826b4a10 r atom_arg_shift +ffffffff826b4a50 r pf_syncookie_wstab +ffffffff826b4a70 r ieee80211_media_init.mopts +ffffffff826b4ad0 r add_entropy_words.twist_table +ffffffff826b4b70 r urtw_8225v2_txpwr_cck +ffffffff826b4b90 r bwfm_pci_prio2fifo +ffffffff826b4b90 r ieee80211_up_to_ac.up_to_ac +ffffffff826b4c50 r paritytab +ffffffff826b4c50 r x86emu_parity_tab +ffffffff826b4c70 r legacy_connector_convert +ffffffff826b4cb0 r gen7_oa_mux_regs +ffffffff826b4cd0 r hsw_oa_mux_regs +ffffffff826b4cf0 r notetab +ffffffff826b4d10 r urtw_8225v2_txpwr_cck_ch14 +ffffffff826b4d30 r bwi_rf_calibval.rf_calibvals +ffffffff826b4dd0 r pf_syncookie_msstab +ffffffff826b4e30 r xgmi3x16_pcs_err_status_reg_aldebaran +ffffffff826b4e90 r uath_wme_init.uath_wme_11g +ffffffff826b4eb0 r gen7_oa_b_counters +ffffffff826b5010 r icl_revids +ffffffff826b50d0 r rtwn_iq_calib_run.reg_adda +ffffffff826b5110 r atom_def_dst +ffffffff826b5110 r atom_def_dst +ffffffff826b5150 r sha256_initial_hash_value +ffffffff826b51b0 r otus_edca_def +ffffffff826b51d0 r intel_hpll_vco.blb_vco +ffffffff826b5290 r epic_pci_subsys_info +ffffffff826b52b0 r atom_arg_mask +ffffffff826b52b0 r atom_arg_mask +ffffffff826b5310 r butmap +ffffffff826b5350 r GFX_RLC_SRM_INDEX_CNTL_DATA_OFFSETS +ffffffff826b5390 r comsoft.lsrmap +ffffffff826b53d0 r tulip_mii_phy_readspecific.table +ffffffff826b53f0 r kbl_revids +ffffffff826b5490 r intel_hpll_vco.pnv_vco +ffffffff826b54f0 r dmapageport +ffffffff826b55b0 r intel_hpll_vco.ctg_vco +ffffffff826b5670 r drm_calculate_luminance_range.pre_computed_values +ffffffff826b6000 R sili_atascsi_methods +ffffffff826b7000 R ncr53c9x_switch +ffffffff826b8000 r scf_period +ffffffff826b9000 R siop_script +ffffffff826b95a0 R lun_switch +ffffffff826b95d0 R tag_switch +ffffffff826b9660 R load_dsa +ffffffff826b96c4 R siop_led_on +ffffffff826b96cc R siop_led_off +ffffffff826b96d8 R siop_switch +ffffffff826ba000 R ep_vortex_media +ffffffff826ba100 R ep_default_to_media +ffffffff826bb000 R wi_card_ident +ffffffff826bd000 R ucode_table +ffffffff826be000 r re_revisions +ffffffff826be290 r re_kstats_tpl +ffffffff826c0000 R smc91cxx_media +ffffffff826c0010 R smc91cxx_mii_bitbang_ops +ffffffff826c1000 R dl10019_mii_bitbang_ops +ffffffff826c1028 R dl10022_mii_bitbang_ops +ffffffff826c2000 R ax88190_mii_bitbang_ops +ffffffff826c4000 R ac97_audio_default +ffffffff826c4020 R ac97_on_off +ffffffff826c4324 R ac97_mic_select +ffffffff826c4628 R ac97_mono_select +ffffffff826c492c R ac97_source +ffffffff826c4c30 R ac97_volume_stereo +ffffffff826c4c4c R ac97_volume_mono +ffffffff826c4c70 R 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ar9380_2_2_tx_gain_high_power_vals_5g +ffffffff826e3380 r ar9380_2_2_tx_gain_high_power_vals_2g +ffffffff826e3520 r ar9380_2_2_tx_gain_vals_5g +ffffffff826e36c0 r ar9380_2_2_tx_gain_vals_2g +ffffffff826e3860 r ar9485_1_1_tx_gain_regs +ffffffff826e38f0 r ar9485_1_1_tx_gain_vals_2g +ffffffff826e3a10 r ar9380_def_rom +ffffffff826e3e50 r ar9380_def_rom_h112 +ffffffff826e4290 r ar9380_def_rom_h116 +ffffffff826e46d0 r ar9380_def_rom_x112 +ffffffff826e4b10 r ar9380_def_rom_x113 +ffffffff826e5000 R atw_txthresh_tab_lo +ffffffff826e5050 R atw_txthresh_tab_hi +ffffffff826e50a0 r atw_attach.empty_macaddr +ffffffff826e50b0 r atw_attach.type_strings +ffffffff826e50d0 r atw_rfmd2958_ifn +ffffffff826e5110 r atw_rfmd2958_rf1r +ffffffff826e5150 r atw_rxintr.rate_tbl +ffffffff826e6000 r rtw_identify_sta.empty_macaddr +ffffffff826e7000 r rtwn_set_key.etherzeroaddr +ffffffff826e7010 r rtl8188eu_rf_prog +ffffffff826e7030 r rtl8188ftv_rf_prog +ffffffff826e7050 r rtl8192e_rf_prog +ffffffff826e7080 r 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codel_intervals +ffffffff82705000 r pfsync_bulk_req_state_names +ffffffff82705030 r pfsync_bulk_req_event_names +ffffffff82705060 r pfsync_qs +ffffffff827050d8 r pfsync_kstat_tpl +ffffffff827052e0 r pfsync_acts +ffffffff82706000 R hotplugread_filtops +ffffffff82707000 R dtps_static +ffffffff82708000 R db_show_all_cmds +ffffffff82708180 R db_show_cmds +ffffffff827084c0 R db_boot_cmds +ffffffff827085a0 R db_command_table +ffffffff82709000 R ddb_vars +ffffffff8270a000 R audio_ca +ffffffff8270a028 R audioctlread_filtops +ffffffff8270a058 R audiowrite_filtops +ffffffff8270a088 R audioread_filtops +ffffffff8270b000 R midi_ca +ffffffff8270b028 R midiwrite_filtops +ffffffff8270b058 R midiread_filtops +ffffffff8270c000 r mulawtolin16 +ffffffff8270c200 r lintomulaw +ffffffff8270d000 R randomread_filtops +ffffffff8270d030 R randomwrite_filtops +ffffffff8270e000 R video_ca +ffffffff8270e028 R video_filtops +ffffffff8270f000 R cd9660_vfsops +ffffffff82710000 R cd9660_vops +ffffffff82710110 R cd9660_specvops +ffffffff82710220 R cd9660_fifovops +ffffffff82710330 R cd9660read_filtops +ffffffff82710360 R cd9660write_filtops +ffffffff82710390 R cd9660vnode_filtops +ffffffff82711000 R udf_vfsops +ffffffff82712000 R udf_vops +ffffffff82712110 r mon_lens +ffffffff82713000 r month_days +ffffffff82714000 R execsw +ffffffff82715000 r shstrtab +ffffffff82716000 R copyright +ffffffff827160c0 r initpaths +ffffffff82717000 R sysent +ffffffff82719000 R bufq_impls +ffffffff8271a000 R kqueueops +ffffffff8271a038 R kqread_filtops +ffffffff8271a068 R proc_filtops +ffffffff8271a098 R file_filtops +ffffffff8271a0c8 R timer_filtops +ffffffff8271a100 R sysfilt_ops +ffffffff8271a148 R seltrue_filtops +ffffffff8271a178 R dead_filtops +ffffffff8271a1a8 R badfd_filtops +ffffffff8271a1d8 r mutex_klistops +ffffffff8271a1f0 r rwlock_klistops +ffffffff8271b000 R kv_exec +ffffffff8271c000 R addrmask +ffffffff8271d000 r rw_ops +ffffffff8271e000 r proc_printit.pstat +ffffffff8271f000 R pledge_syscalls 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rn_addmask.normal_chars +ffffffff82753000 R route_src +ffffffff82753010 R route_usrreqs +ffffffff827530b0 R routedomain +ffffffff82753100 R routesw +ffffffff82754000 R gre_vars +ffffffff82754030 r mgre_tree_RBT_INFO +ffffffff82754048 R mgre_tree_RBT_TYPE +ffffffff82754050 r egre_tree_RBT_INFO +ffffffff82754068 R egre_tree_RBT_TYPE +ffffffff82754070 r nvgre_ucast_tree_RBT_INFO +ffffffff82754088 R nvgre_ucast_tree_RBT_TYPE +ffffffff82754090 r nvgre_mcast_tree_RBT_INFO +ffffffff827540a8 R nvgre_mcast_tree_RBT_TYPE +ffffffff827540b0 r eoip_tree_RBT_INFO +ffffffff827540c8 R eoip_tree_RBT_TYPE +ffffffff827540d0 r nvgre_etherbridge_ops +ffffffff82755000 r trunk_protos +ffffffff82756000 R ethermulticastaddr_slowprotocols +ffffffff82756006 R lacp_info_tlv_template +ffffffff8275600e R marker_info_tlv_template +ffffffff82756012 R marker_response_tlv_template +ffffffff82756020 R lacp_timer_funcs +ffffffff82757000 r lacp_rxm_state_names +ffffffff82757040 r lacp_rxm_event_names +ffffffff82757090 r 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divert_usrreqs +ffffffff82769000 R icmpctl_vars +ffffffff8276a000 R ipctl_vars +ffffffff8276a150 R inetctlerrmap +ffffffff8276b000 R rip_usrreqs +ffffffff8276c000 R tcp_timer_funcs +ffffffff8276d000 R tcp_usrreqs +ffffffff8276d0a0 R tcp6_usrreqs +ffffffff8276d140 R tcpctl_vars +ffffffff8276e000 R udp_usrreqs +ffffffff8276e0a0 R udp6_usrreqs +ffffffff8276e140 R udpctl_vars +ffffffff8276f000 R gre_usrreqs +ffffffff82770000 r ipsec_ids_tree_RBT_INFO +ffffffff82770018 R ipsec_ids_tree_RBT_TYPE +ffffffff82770020 r ipsec_ids_flows_RBT_INFO +ffffffff82770038 R ipsec_ids_flows_RBT_TYPE +ffffffff82770040 R xformsw +ffffffff82770158 R xformswNXFORMSW +ffffffff82771000 R espctl_vars +ffffffff82771050 R ahctl_vars +ffffffff82771070 R ipcompctl_vars +ffffffff82771090 R ipsecctl_vars +ffffffff82772000 R ipseczeroes +ffffffff82773000 r carp_set_state.carp_states +ffffffff82774000 r Rcon +ffffffff82775000 r Te2 +ffffffff82775400 r Te3 +ffffffff82775800 r Te0 +ffffffff82775c00 r Te1 +ffffffff82776000 r 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uvm_objtree_RBT_TYPE +ffffffff827a0000 r uvm_pmr_addr_RBT_INFO +ffffffff827a0018 R uvm_pmr_addr_RBT_TYPE +ffffffff827a0020 r uvm_pmr_size_RBT_INFO +ffffffff827a0038 R uvm_pmr_size_RBT_TYPE +ffffffff827a0040 r uvm_pmemrange_addr_RBT_INFO +ffffffff827a0058 R uvm_pmemrange_addr_RBT_TYPE +ffffffff827a1000 R uvm_vnodeops +ffffffff827a1048 r uvn_flush.interval +ffffffff827a2000 R zeroin6_addr +ffffffff827a3000 R in6addr_any +ffffffff827a3010 R in6addr_loopback +ffffffff827a3020 R in6addr_intfacelocal_allnodes +ffffffff827a3030 R in6addr_linklocal_allnodes +ffffffff827a3040 R in6addr_linklocal_allrouters +ffffffff827a3050 R in6mask0 +ffffffff827a3060 R in6mask32 +ffffffff827a3070 R in6mask64 +ffffffff827a3080 R in6mask96 +ffffffff827a3090 R in6mask128 +ffffffff827a30a0 R sa6_any +ffffffff827a4000 R divert6ctl_vars +ffffffff827a4030 R divert6_usrreqs +ffffffff827a5000 R inet6domain +ffffffff827a5050 R inet6sw +ffffffff827a6000 R icmpv6ctl_vars +ffffffff827a7000 R inet6ctlerrmap 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cpuctl_vars +ffffffff827ba000 R cpu_cpuid_features +ffffffff827ba1d0 R cpu_ecpuid_features +ffffffff827ba260 R cpu_cpuid_ecxfeatures +ffffffff827ba450 R cpu_ecpuid_ecxfeatures +ffffffff827ba5d0 R cpu_seff0_ebxfeatures +ffffffff827ba7a0 R cpu_seff0_ecxfeatures +ffffffff827ba800 R cpu_seff0_edxfeatures +ffffffff827ba8a0 R cpu_tpm_eaxfeatures +ffffffff827ba8c0 R cpu_cpuid_perf_eax +ffffffff827ba8d0 R cpu_cpuid_apmi_edx +ffffffff827ba8f0 R cpu_amdspec_ebxfeatures +ffffffff827ba9a0 R cpu_xsave_extfeatures +ffffffff827ba9f0 R cpu_arch_cap_features +ffffffff827bb000 R sigcode +ffffffff827bb016 R sigcoderet +ffffffff827bb038 R esigcode +ffffffff827bb038 R sigfill +ffffffff827bb039 R sigfillsiz +ffffffff827bb039 r esigfill +ffffffff827bb03d r bogus_proc_pmap +ffffffff827bb070 r spl_lowered +ffffffff827bb0a6 r intr_spl_lowered +ffffffff827bb113 R _xrstor +ffffffff827bb117 R _xrstors +ffffffff827bb11b R _xsave +ffffffff827bb11f R _xsaves +ffffffff827bb123 R _xsaveopt +ffffffff827bb127 R _pcid_set_reuse +ffffffff827bb133 R _jmprax +ffffffff827bb136 R _jmprax_len +ffffffff827bb138 R _jmpr11 +ffffffff827bb13c R _jmpr11_len +ffffffff827bb13e R _jmpr13 +ffffffff827bb142 R _jmpr13_len +ffffffff827bd000 r cpurevs +ffffffff827bd16c r amd64_errata_set5 +ffffffff827bd16e r amd64_errata_set1 +ffffffff827bd180 r amd64_errata_set8 +ffffffff827bd19f r amd64_errata_set6 +ffffffff827bd1a4 r amd64_errata_set7 +ffffffff827bd1ac r amd64_errata_set3 +ffffffff827bd1af r amd64_errata_set2 +ffffffff827bd1b8 r amd64_errata_set9 +ffffffff827be000 R ptp_masks +ffffffff827be020 R ptp_shifts +ffffffff827be030 R nkptpmax +ffffffff827be050 R nbpd +ffffffff827be070 R normal_pdes +ffffffff827bf000 R trap_type +ffffffff827bf0b0 R trap_types +ffffffff827c0000 r x86fpflags_to_siginfo.x86fp_siginfo_table +ffffffff827c1000 R x86_soft_intr_to_ssir +ffffffff827c3000 R Xexceptions +ffffffff827c3100 r spl_lowered +ffffffff827c312d R i8259_stubs +ffffffff827c32ad R ioapic_edge_stubs +ffffffff827c38ad R ioapic_level_stubs +ffffffff827c4000 R _stac +ffffffff827c4003 R _clac +ffffffff827c5000 R x86_bus_space_io_ops +ffffffff827c5130 R x86_bus_space_mem_ops +ffffffff827c6000 ? cpu_spinup_trampoline +ffffffff827c60b6 R cpu_spinup_trampoline_end +ffffffff827c60b6 R mp_tramp_data_start +ffffffff827c60fc R mp_tramp_data_end +ffffffff827c8000 R db_acpi_cmds +ffffffff827c80a0 R db_machine_command_table +ffffffff827c9000 r i8254_delay.delaytab +ffffffff827ca000 R rasops_cmap +ffffffff827cb000 r reverse +ffffffff827cb100 r ibm437_level1 +ffffffff827cb230 r ibm437_level2_0 +ffffffff827cb248 r ibm437_level2_1 +ffffffff827cb260 r ibm437_level2_3 +ffffffff827cb278 r ibm437_level2_32 +ffffffff827cb290 r ibm437_level2_34 +ffffffff827cb2a8 r ibm437_level2_35 +ffffffff827cb2c0 r ibm437_level2_37 +ffffffff827cb2e0 r ibm437_chars_0 +ffffffff827cb3e0 r ibm437_chars_1 +ffffffff827cb3f0 r ibm437_chars_3 +ffffffff827cb430 r ibm437_chars_32 +ffffffff827cb460 r ibm437_chars_34 +ffffffff827cb4d0 r ibm437_chars_35 +ffffffff827cb4f0 r ibm437_chars_37 +ffffffff827cc000 R mii_media_table +ffffffff827cd000 R nsphy_ca +ffffffff827cd028 R nsphy_funcs +ffffffff827cd040 r nsphys +ffffffff827ce000 R nsphyter_ca +ffffffff827ce028 R nsphyter_funcs +ffffffff827ce040 r nsphyterphys +ffffffff827cf000 R gentbi_ca +ffffffff827cf028 R gentbi_funcs +ffffffff827d0000 R qsphy_ca +ffffffff827d0028 R qsphy_funcs +ffffffff827d0040 r qsphys +ffffffff827d1000 R inphy_ca +ffffffff827d1028 R inphy_funcs +ffffffff827d1040 r inphys +ffffffff827d2000 R iophy_ca +ffffffff827d2028 R iophy_funcs +ffffffff827d2040 r iophys +ffffffff827d3000 R eephy_ca +ffffffff827d3028 R eephy_funcs +ffffffff827d3040 r eephys +ffffffff827d4000 R exphy_ca +ffffffff827d4028 R exphy_funcs +ffffffff827d5000 R rlphy_ca +ffffffff827d5028 R rlphy_funcs +ffffffff827d5040 r rlphys +ffffffff827d6000 R lxtphy_ca +ffffffff827d6028 R lxtphy_funcs +ffffffff827d6040 R lxtphy971_funcs +ffffffff827d6060 r lxtphys +ffffffff827d7000 R luphy_ca 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pci_subclass_dasp +ffffffff8281ac10 R pci_class +ffffffff8281ae20 r pci_known_vendors +ffffffff8281c3e0 r pci_known_products +ffffffff8283f000 R vga_pci_ca +ffffffff8283f030 r vga_devs +ffffffff82840000 R ahc_pci_ident_table +ffffffff828405d0 R ahc_pci_ca +ffffffff82841000 R ahd_pci_ident_table +ffffffff82841198 R ahd_num_pci_devs +ffffffff828411a0 R ahd_pci_ca +ffffffff828411d0 r pci_bus_modes +ffffffff82841210 r pci_status_strings +ffffffff82841250 r pci_status_source +ffffffff82841290 r split_status_strings +ffffffff82842000 R adw_pci_ca +ffffffff82842028 R adw_pci_devices +ffffffff82843000 r adw_3550_Default_EEPROM +ffffffff82843080 r adw_38C0800_Default_EEPROM +ffffffff82843100 r adw_38C1600_Default_EEPROM +ffffffff82844000 R adw_asc3550_mcode +ffffffff828453a0 R adw_asc3550_mcode_data +ffffffff828453b0 R adw_asc38C0800_mcode +ffffffff82846888 R adw_asc38C0800_mcode_data +ffffffff828468a0 R adw_asc38C1600_mcode +ffffffff82848160 R adw_asc38C1600_mcode_data +ffffffff82849000 R twe_pci_ca +ffffffff82849028 R twe_pci_devices +ffffffff8284a000 R arc_ca +ffffffff8284a028 R arc_switch +ffffffff8284a050 r arc_devices +ffffffff8284a190 r arc_intel +ffffffff8284a198 r arc_marvell +ffffffff8284a1a0 r arc_lsi +ffffffff8284a1a8 r arc_marvell2 +ffffffff8284b000 R jmb_ca +ffffffff8284b030 r jmb_devices +ffffffff8284c000 R ahci_pci_ca +ffffffff8284c028 R ahci_jmb_ca +ffffffff8284c050 r ahci_devices +ffffffff8284d000 R nvme_pci_ca +ffffffff8284d028 r nvme_msi_blacklist +ffffffff8284e000 R ami_pci_ca +ffffffff8284e030 r ami_pci_subsys +ffffffff8284e270 r ami_pci_vendors +ffffffff8284f000 R mfi_pci_ca +ffffffff8284f030 r mfi_pci_devices +ffffffff82850000 R mfii_ca +ffffffff82850028 R mfii_switch +ffffffff82850050 R mfii_pd_switch +ffffffff82850078 R mfii_iop_thunderbolt +ffffffff82850088 R mfii_iop_25 +ffffffff82850098 R mfii_iop_35 +ffffffff828500b0 R mfii_devices +ffffffff82850140 r mfi_bbu_indicators +ffffffff82851000 R ips_ca +ffffffff82851028 r ips_ids +ffffffff82851040 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emuxki_recbuf_sz +ffffffff82858170 r emuxki_recsrc_szreg +ffffffff8285817c r emuxki_recsrc_bufaddrreg +ffffffff82858190 r emuxki_rate_to_pitch.logMagTable +ffffffff82858390 r emuxki_rate_to_pitch.logSlopeTable +ffffffff82859000 R auixp_pci_devices +ffffffff82859010 R auixp_ca +ffffffff82859038 R auixp_hw_if +ffffffff8285a000 R clcs_ca +ffffffff8285a028 R cs4280_hw_if +ffffffff8285a0e0 R cs4280_devices +ffffffff8285b000 R yds_ca +ffffffff8285b028 r yds_hw_if +ffffffff8285b0e0 r yds_chip_capability_list +ffffffff8285b120 r yds_get_lpfk.lpfkt +ffffffff8285b160 r yds_get_lpfq.lpfqt +ffffffff8285c000 R auvia_ca +ffffffff8285c028 R auvia_hw_if +ffffffff8285c0e0 R auvia_devices +ffffffff8285c0f0 r auvia_set_params_sub.slottab +ffffffff8285d000 R gdt_pci_ca +ffffffff8285e000 R ciss_pci_ca +ffffffff8285e030 R ciss_pci_devices +ffffffff8285f000 R qlw_pci_ca +ffffffff8285f030 r qlw_devices +ffffffff8285f050 r isp_1040_risc_code +ffffffff828649f0 r isp_1080_risc_code +ffffffff8286c470 r isp_12160_risc_code +ffffffff82874000 R qla_pci_ca +ffffffff82874030 r qla_devices +ffffffff82875000 R qle_ca +ffffffff82875028 R qle_switch +ffffffff82875050 r qle_devices +ffffffff82875070 r isp_2400_risc_code +ffffffff828a4a50 r isp_2500_risc_code +ffffffff828d7000 R mpi_pci_ca +ffffffff828d7030 r mpi_devices +ffffffff828d8000 R mpii_ca +ffffffff828d8028 R mpii_switch +ffffffff828d8050 r mpii_devices +ffffffff828d9000 R sili_pci_ca +ffffffff828d9030 r sili_devices +ffffffff828da000 R aq_devices +ffffffff828da060 R aq_products +ffffffff828da1d0 R aq_fw1x_ops +ffffffff828da1f8 R aq_fw2x_ops +ffffffff828da220 R aq2_fw_ops +ffffffff828da248 R aq_ca +ffffffff828db000 R de_ca +ffffffff828db030 r tulip_srom_conninfo +ffffffff828db120 r tulip_mii_phy_attrlist +ffffffff828db1e0 r tulip_21140_znyx_zx34x_boardsw +ffffffff828db208 r tulip_21040_10baset_only_boardsw +ffffffff828db230 r tulip_21040_boardsw +ffffffff828db258 r tulip_2114x_isv_boardsw +ffffffff828db280 r tulip_21140_smc9332_boardsw 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+ffffffff828e000a R rdcide_udmatim +ffffffff828e0010 R rdcide_udmaclk +ffffffff828e0028 R default_product_desc +ffffffff828e0040 R pciide_intel_products +ffffffff828e0630 R pciide_amd_products +ffffffff828e0690 R pciide_cmd_products +ffffffff828e0730 R pciide_via_products +ffffffff828e0810 R pciide_cypress_products +ffffffff828e0820 R pciide_sis_products +ffffffff828e0870 R pciide_natsemi_products +ffffffff828e0890 R pciide_acer_products +ffffffff828e08a0 R pciide_triones_products +ffffffff828e08f0 R pciide_promise_products +ffffffff828e0ac0 R pciide_acard_products +ffffffff828e0b10 R pciide_serverworks_products +ffffffff828e0bb0 R pciide_nvidia_products +ffffffff828e0e80 R pciide_ite_products +ffffffff828e0ea0 R pciide_ati_products +ffffffff828e0f20 R pciide_jmicron_products +ffffffff828e0f70 R pciide_phison_products +ffffffff828e0f80 R pciide_rdc_products +ffffffff828e0f90 R pciide_vendors +ffffffff828e1140 R pciide_pci_ca +ffffffff828e1168 R pciide_jmb_ca +ffffffff828e1190 r piix_isp_dma +ffffffff828e1193 r piix_rtc_dma +ffffffff828e1196 r apollo_pio_set +ffffffff828e119b r cmd0643_9_data_tim_pio +ffffffff828e11a0 r cmd0643_9_data_tim_dma +ffffffff828e11a3 r cmd680_channel_map.init_val +ffffffff828e11b1 r cmd680_setup_channel.udma2_tbl +ffffffff828e11b8 r cmd680_setup_channel.dma_tbl +ffffffff828e11be r cmd680_setup_channel.pio_tbl +ffffffff828e11d0 r satalink_ba5_regmap +ffffffff828e1690 r sii3114_chansetup.channel_names +ffffffff828e16b0 r cy_pio_pulse +ffffffff828e16c0 r sis_udma133new_tim +ffffffff828e16e0 r sis_pio133new_tim +ffffffff828e16f4 r sis_dma133new_tim +ffffffff828e1700 r sis_udma66_tim +ffffffff828e1706 r sis_udma100new_tim +ffffffff828e170c r sis_udma133old_tim +ffffffff828e1713 r sis_pio_act +ffffffff828e1718 r sis_pio_rec +ffffffff828e171d r natsemi_pio_pulse +ffffffff828e1722 r natsemi_pio_recover +ffffffff828e1727 r natsemi_dma_pulse +ffffffff828e172a r natsemi_dma_recover +ffffffff828e1730 r scx200_udma33 +ffffffff828e173c r scx200_dma33 +ffffffff828e1750 r scx200_pio33 +ffffffff828e1778 r acer_udma +ffffffff828e177e r acer_pio +ffffffff828e1790 r hpt370_pio +ffffffff828e17a4 r hpt370_dma +ffffffff828e17b0 r hpt370_udma +ffffffff828e17d0 r hpt372_pio +ffffffff828e17e4 r hpt372_dma +ffffffff828e17f0 r hpt372_udma +ffffffff828e180c r hpt366_dma +ffffffff828e1820 r hpt366_udma +ffffffff828e1840 r hpt374_pio +ffffffff828e1854 r hpt374_dma +ffffffff828e1860 r hpt374_udma +ffffffff828e187c r pdc2xx_pa +ffffffff828e1881 r pdc2xx_pb +ffffffff828e1886 r pdc2xx_dma_mb +ffffffff828e1889 r pdc2xx_dma_mc +ffffffff828e188c r pdc2xx_udma_mc +ffffffff828e1892 r acard_act_udma +ffffffff828e1899 r acard_rec_udma +ffffffff828e18a0 r acard_udma_conf +ffffffff828e18a7 r acard_act_dma +ffffffff828e18aa r acard_rec_dma +ffffffff828e18ad r acard_act_pio +ffffffff828e18b2 r acard_rec_pio +ffffffff828e18b7 r nforce_udma +ffffffff828e18be r nforce_pio +ffffffff828e18c3 r ixp_mdma_timings +ffffffff828e18c6 r ixp_pio_timings +ffffffff828e2000 R ppb_ca +ffffffff828e3000 R cy_pci_ca +ffffffff828e3030 R cy_pci_devices +ffffffff828e4000 R rl_pci_ca +ffffffff828e4030 R rl_pci_devices +ffffffff828e5000 R re_pci_devices +ffffffff828e5030 R re_pci_ca +ffffffff828e6000 R vr_ca +ffffffff828e7000 R txp_ca +ffffffff828e7030 R txp_devices +ffffffff828e8000 r cards +ffffffff828e9000 r format_params +ffffffff828e91a0 r pixfmt_table +ffffffff828e9320 r meteor_pixfmt_table +ffffffff828ea000 R bktr_ca +ffffffff828ea028 R bktr_hw_if +ffffffff828eb000 r tuners +ffffffff828eb170 r freqTable +ffffffff828eb260 r nabcst +ffffffff828eb2a0 r irccable +ffffffff828eb310 r hrccable +ffffffff828eb380 r weurope +ffffffff828eb420 r jpnbcst +ffffffff828eb460 r jpncable +ffffffff828eb4c0 r xussr +ffffffff828eb530 r australia +ffffffff828eb590 r france +ffffffff828ec000 R xl_pci_ca +ffffffff828ec030 R xl_pci_devices +ffffffff828ed000 R fxp_pci_ca +ffffffff828ed030 R fxp_pci_devices +ffffffff828ee000 R em_devices +ffffffff828ee2e0 R em_ca +ffffffff828ee310 r em_counters +ffffffff828ef000 r em_igp_cable_length_table +ffffffff828ef100 r em_igp_2_cable_length_table +ffffffff828f0000 R ixgb_devices +ffffffff828f0010 R ixgb_ca +ffffffff828f1000 R ixgbe_devices +ffffffff828f10b8 R ix_ca +ffffffff828f10e0 r ix_counters +ffffffff828f13e0 r ix_rxq_kstats_tpl +ffffffff828f1458 r ix_txq_kstats_tpl +ffffffff828f2000 r ixgbe_mvals_base +ffffffff828f2060 r ixgbe_mvals_X540 +ffffffff828f20c0 r ixgbe_mvals_X550 +ffffffff828f2120 r ixgbe_mvals_X550EM_x +ffffffff828f2180 r ixgbe_mvals_X550EM_a +ffffffff828f5000 R ixl_ca +ffffffff828f5030 R ixl_port_counters +ffffffff828f52c0 R ixl_vsi_counters +ffffffff828f5380 r ixl_devices +ffffffff828f54c0 r ixl_710 +ffffffff828f54e8 r ixl_722 +ffffffff828f5510 r ixl_pf_aq_regs +ffffffff828f5578 r ixl_710_decrepit +ffffffff828f55a0 r ixl_phy_type_map +ffffffff828f5770 r ixl_speed_type_map +ffffffff828f57b0 r ixl_hmc_pack_rxq +ffffffff828f5830 r ixl_hmc_pack_txq +ffffffff828f58a0 r ixl_sfp_ops +ffffffff828f58b8 r ixl_qsfp_ops +ffffffff828f6000 R xge_ca +ffffffff828f6028 R xge_devices +ffffffff828f6030 r xge_fix_mac +ffffffff828f6110 r xge_xena_dtx_cfg +ffffffff828f6170 r xge_herc_dtx_cfg +ffffffff828f7000 R thtc_ca +ffffffff828f7028 R tht_ca +ffffffff828f7050 r thtc_devices +ffffffff828f7068 r tht_link_state.interval +ffffffff828f8000 R myx_ca +ffffffff828f8028 R myx_devices +ffffffff828f9000 R oce_ca +ffffffff828f9030 R oce_devices +ffffffff828fa000 R dc_pci_ca +ffffffff828fb000 R epic_pci_ca +ffffffff828fb028 R epic_pci_devices +ffffffff828fc000 R ti_pci_ca +ffffffff828fc030 R ti_devices +ffffffff828fd000 R ne_pci_ca +ffffffff828fd030 R ne_pci_prod +ffffffff828fe000 R gem_pci_ca +ffffffff828fe030 R gem_pci_devices +ffffffff828fe050 r gem_promhdr +ffffffff828fe052 r gem_promdat +ffffffff828fe05a r gem_promdat2 +ffffffff828ff000 R cas_ca +ffffffff828ff028 R cas_pci_devices +ffffffff828ff030 r cas_promhdr +ffffffff828ff032 r cas_promdat_sun +ffffffff828ff03a r cas_promdat_ns +ffffffff828ff042 r cas_promdat2 +ffffffff82900000 R sf_pci_ca +ffffffff82900028 R sf_pci_products +ffffffff82901000 R sis_ca +ffffffff82901028 R sis_devices +ffffffff82902000 R se_devices +ffffffff82902008 R se_ca +ffffffff82903000 R mbg_ca +ffffffff82903030 R mbg_devices +ffffffff82904000 R uhci_pci_ca +ffffffff82905000 R ohci_pci_ca +ffffffff82906000 R ehci_pci_ca +ffffffff82907000 R xhci_pci_ca +ffffffff82908000 R cbb_pci_ca +ffffffff82908028 r pccbb_pcmcia_do_io_map.pcic_iowidth +ffffffff82909000 R skc_devices +ffffffff82909030 R skc_ca +ffffffff82909058 R sk_ca +ffffffff8290a000 R mskc_devices +ffffffff8290a0a8 R mskc_ca +ffffffff8290a0d0 R msk_ca +ffffffff8290a100 r msk_mib +ffffffff8290b000 R puc_pci_ca +ffffffff8290c000 R puc_devs +ffffffff82911000 R com_puc_ca +ffffffff82911030 r puc_port_types +ffffffff82912000 R lpt_puc_ca +ffffffff82913000 R wi_pci_ca +ffffffff82913030 r wi_pci_products +ffffffff82914000 R an_pci_ca +ffffffff82914030 R an_pci_devices +ffffffff82915000 R iwi_devices +ffffffff82915010 R iwi_ca +ffffffff82916000 R wpi_ca +ffffffff82916028 r wpi_devices +ffffffff82916030 r wpi_rates +ffffffff82916050 r wpi_rf_gain_5ghz +ffffffff829160a0 r wpi_dsp_gain_5ghz +ffffffff829160f0 r wpi_rf_gain_2ghz +ffffffff82916140 r wpi_dsp_gain_2ghz +ffffffff82916190 r wpi_pmgt +ffffffff82916310 r wpi_bands +ffffffff82917000 R iwn_mcs2ridx +ffffffff82917020 R iwn_ca +ffffffff82917050 r iwn_devices +ffffffff829170e8 r iwn4965_sensitivity_limits +ffffffff82917124 r iwn5000_sensitivity_limits +ffffffff82917160 r iwn5150_sensitivity_limits +ffffffff8291719c r iwn1000_sensitivity_limits +ffffffff829171d8 r iwn6000_sensitivity_limits +ffffffff82917214 r iwn2000_sensitivity_limits +ffffffff82917250 r iwn_fw_errmsg +ffffffff82917340 r iwn4965_set_txpower.tdiv +ffffffff82917360 r iwn4965_rf_gain_5ghz +ffffffff829173d0 r iwn4965_dsp_gain_5ghz +ffffffff82917440 r iwn4965_dsp_gain_2ghz +ffffffff829174b0 r iwn_pmgt +ffffffff829176f0 r iwn4965_post_alive.qid2fifo +ffffffff82917700 r iwn_bands +ffffffff82917770 r iwn_rates +ffffffff82917820 r iwn4965_rf_gain_2ghz +ffffffff82918000 R iwm_nvm_channels +ffffffff82918030 R iwm_nvm_channels_8000 +ffffffff82918070 R iwm_rates +ffffffff829180d0 R iwm_ht_mcs2ridx +ffffffff82918110 R iwm_tid_to_ac +ffffffff82918118 R iwm_ac_to_tx_fifo +ffffffff82918120 R iwm_nvm_to_read +ffffffff82918144 r iwm_set_hw_address_8000.reserved_mac +ffffffff82918180 r iwm_sf_full_timeout +ffffffff829181b0 r iwm_sf_full_timeout_def +ffffffff829181e0 r advanced_lookup +ffffffff82918320 r iwm_devices +ffffffff82918360 R iwm_ca +ffffffff82919000 R iwx_9560_quz_a0_jf_b0_cfg +ffffffff82919020 R iwx_9560_qu_c0_jf_b0_cfg +ffffffff82919040 R iwx_qu_b0_hr1_b0 +ffffffff82919060 R iwx_qu_b0_hr_b0 +ffffffff82919080 R iwx_ax201_cfg_qu_hr +ffffffff829190a0 R iwx_qu_c0_hr1_b0 +ffffffff829190c0 R iwx_qu_c0_hr_b0 +ffffffff829190e0 R iwx_ax201_cfg_qu_c0_hr_b0 +ffffffff82919100 R iwx_quz_a0_hr1_b0 +ffffffff82919120 R iwx_ax201_cfg_quz_hr +ffffffff82919140 R iwx_cfg_so_a0_hr_b0 +ffffffff82919160 R iwx_cfg_quz_a0_hr_b0 +ffffffff82919180 R iwx_2ax_cfg_so_gf_a0 +ffffffff829191a0 R iwx_2ax_cfg_so_gf_a0_long +ffffffff829191c0 R iwx_2ax_cfg_so_gf4_a0 +ffffffff829191e0 R iwx_2ax_cfg_so_gf4_a0_long +ffffffff82919200 R iwx_2ax_cfg_ty_gf_a0 +ffffffff82919220 R iwx_2ax_cfg_so_jf_b0 +ffffffff82919240 R iwx_nvm_channels_8000 +ffffffff82919280 R iwx_rates +ffffffff829192e0 R iwx_mcs2ridx +ffffffff82919320 R iwx_tid_to_ac +ffffffff82919328 R iwx_ac_to_tx_fifo +ffffffff82919330 r iwx_nvm_channels_uhb +ffffffff8291939e r iwx_is_valid_mac_addr.reserved_mac +ffffffff829193b0 r iwx_sf_full_timeout +ffffffff829193e0 r iwx_sf_full_timeout_def +ffffffff82919410 r advanced_lookup +ffffffff82919550 r iwx_devices +ffffffff82919590 r iwx_dev_info_table +ffffffff82919e18 R iwx_ca +ffffffff8291a000 R cmpci_ca +ffffffff8291a028 R cmpci_hw_if +ffffffff8291a0e0 r cmpci_rate_table +ffffffff8291a120 R cmpci_devices +ffffffff8291a130 r cmpci_query_devinfo.mixer_port_names +ffffffff8291a160 r cmpci_query_devinfo.mixer_classes +ffffffff8291b000 R iha_pci_ca +ffffffff8291b028 R iha_switch +ffffffff8291c000 R pcscp_ca +ffffffff8291d000 R bge_ca +ffffffff8291d030 R bge_devices +ffffffff8291d1b0 r bge_revisions +ffffffff8291d610 r bge_majorrevs +ffffffff8291d790 r bge_kstat_tpl +ffffffff8291e000 R bnx_devices +ffffffff8291e020 R bnx_ca +ffffffff8291f000 R vge_ca +ffffffff8291f028 R vge_devices +ffffffff82920000 R stge_ca +ffffffff82920028 R stge_mii_bitbang_ops +ffffffff82920050 R stge_devices +ffffffff82921000 R nfe_ca +ffffffff82921030 R nfe_devices +ffffffff82922000 R et_devices +ffffffff82922008 R et_ca +ffffffff82923000 R jme_devices +ffffffff82923008 R jme_ca +ffffffff82924000 R age_devices +ffffffff82924008 R age_ca +ffffffff82925000 R alc_devices +ffffffff82925038 R alc_ca +ffffffff82926000 R ale_devices +ffffffff82926008 R ale_ca +ffffffff82927000 R amdpm_ca +ffffffff82927030 R amdpm_ids +ffffffff82928000 R bce_ca +ffffffff82928028 R bce_devices +ffffffff82929000 R ath_pci_ca +ffffffff8292a000 R athn_pci_ca +ffffffff8292a030 r athn_pci_devices +ffffffff8292b000 R atw_pci_ca +ffffffff8292b028 R atw_pci_devices +ffffffff8292c000 R rtw_pci_ca +ffffffff8292c030 R rtw_pci_products +ffffffff8292d000 R rtwn_pci_ca +ffffffff8292d030 r rtwn_pci_devices +ffffffff8292d040 r rtl8188eu_mac +ffffffff8292d1b0 r rtl8192cu_mac +ffffffff8292d310 r rtl8192ce_mac +ffffffff8292d458 r rtl8188eu_bb_prog +ffffffff8292d480 r rtl8723a_bb_prog +ffffffff8292d4a8 r rtl8192ce_bb_prog_1t +ffffffff8292d4d0 r rtl8192ce_bb_prog_2t +ffffffff8292d500 r rtl8188eu_bb_regs +ffffffff8292d680 r rtl8188eu_bb_vals +ffffffff8292d980 r rtl8188eu_agc_vals +ffffffff8292db80 r rtl8723a_bb_regs +ffffffff8292dd00 r rtl8723a_bb_vals +ffffffff8292dff0 r rtl8192ce_agc_vals +ffffffff8292e270 r rtl8192ce_bb_regs +ffffffff8292e3f0 r rtl8192ce_bb_vals_1t +ffffffff8292e6e0 r rtl8192ce_bb_vals_2t +ffffffff8292f000 R ral_pci_ca +ffffffff8292f030 R ral_pci_devices +ffffffff82930000 R acx_pci_ca +ffffffff82930028 R acx_pci_devices +ffffffff82931000 R pgt_pci_ca +ffffffff82931028 R pgt_pci_devices +ffffffff82932000 R malo_pci_ca +ffffffff82932028 R malo_pci_devices +ffffffff82933000 R bwi_pci_ca +ffffffff82933030 R bwi_pci_devices +ffffffff82934000 R piixpm_ca +ffffffff82934030 R piixpm_ids +ffffffff82935000 R vic_ca +ffffffff82935028 R vic_devices +ffffffff82936000 R vmx_devices +ffffffff82936008 R vmx_ca +ffffffff82936030 r vmx_tx_kstat_tpl +ffffffff829360d0 r vmx_kstat_rate +ffffffff829360e0 r vmx_rx_kstat_tpl +ffffffff82937000 R vmwpvs_ca +ffffffff82937028 R vmwpvs_switch +ffffffff82938000 R lii_ca +ffffffff82938028 R lii_devices +ffffffff82939000 R ichiic_ca +ffffffff82939030 R ichiic_ids +ffffffff8293a000 R viapm_ca +ffffffff8293a030 R viapm_ids +ffffffff8293a070 r val_to_temp +ffffffff8293a870 r val_to_uV.mult +ffffffff8293b000 R amdiic_ca +ffffffff8293b028 R amdiic_ids +ffffffff8293c000 R nviic_ca +ffffffff8293c030 R nviic_ids +ffffffff8293d000 R sdhc_pci_ca +ffffffff8293e000 R kate_ca +ffffffff8293e030 r kate_proc +ffffffff8293f000 R km_ca +ffffffff8293f030 r km_devices +ffffffff82940000 R ksmn_ca +ffffffff82940030 r ksmn_devices +ffffffff82941000 R iosf_pci_ca +ffffffff82942000 R itherm_devices +ffffffff82942008 R itherm_ca +ffffffff82943000 R pchtemp_ca +ffffffff82943030 R pchtemp_devices +ffffffff82944000 R rtsx_pci_ca +ffffffff82945000 R xspd_ca +ffffffff82945028 R xspd_devices +ffffffff82946000 R virtio_pci_ca +ffffffff82947000 R dwiic_pci_ca +ffffffff82947030 R dwiic_pci_ids +ffffffff82948000 R bwfm_pci_ca +ffffffff82948030 r bwfm_pci_devices +ffffffff82949000 R ccp_pci_ca +ffffffff82949030 r ccp_pci_devices +ffffffff8294a000 R bnxt_devices +ffffffff8294a040 R bnxt_ca +ffffffff8294b000 R mcx_ca +ffffffff8294b030 r mcx_devices +ffffffff8294b060 r mcx_rss_config +ffffffff8294b0d0 r mcx_eth_cap_map +ffffffff8294b2d0 r mcx_kstat_ppcnt_ieee8023 +ffffffff8294b2e8 r mcx_kstat_ppcnt_rfc2863 +ffffffff8294b300 r mcx_kstat_ppcnt_rfc2819 +ffffffff8294b318 r mcx_kstat_ppcnt_rfc3635 +ffffffff8294b330 r mcx_ppcnt_ieee8023_tpl +ffffffff8294b4b0 r mcx_ppcnt_rfc2863_tpl +ffffffff8294b5c0 r mcx_ppcnt_rfc2819_tpl +ffffffff8294b770 r mcx_ppcnt_rfc3635_tpl +ffffffff8294b8b0 r mcx_kstat_mtmp_tpl +ffffffff8294b950 r mcx_kstat_mtmp_rate +ffffffff8294b960 r mcx_queue_kstat_tpl +ffffffff8294c000 R iavf_ca +ffffffff8294c030 r iavf_devices +ffffffff8294c040 r iavf_aq_regs +ffffffff8294c0b0 r iavf_link_speeds +ffffffff8294d000 R rge_ca +ffffffff8294d028 R rge_devices +ffffffff8294d030 r rtl8125_mac_cfg2_ephy +ffffffff8294d090 r rge_phy_config_mac_cfg3.mac_cfg3_a438_value +ffffffff8294d0b0 r rge_phy_config_mac_cfg3.mac_cfg3_b88e_value +ffffffff8294d110 r rge_phy_config_mac_cfg4.mac_cfg4_b87c_value +ffffffff8294d170 r rtl8125_mac_cfg4_ephy +ffffffff8294d1e0 r rtl8125_mac_cfg2_mcu +ffffffff8294de80 r rtl8125_mac_cfg3_mcu +ffffffff8294e720 r rtl8125_mac_cfg4_mcu +ffffffff82950d10 r rtl8125_mac_cfg5_mcu +ffffffff82951c10 r rtl8125_mac_bps +ffffffff82951f80 r rtl8125b_mac_bps +ffffffff82952120 r rge_kstats_tpl +ffffffff82953000 R igc_devices +ffffffff82953040 R igc_ca +ffffffff82954000 R ngbe_devices +ffffffff82954008 R ngbe_ca +ffffffff82955000 R com_pci_ca +ffffffff82955030 R com_pci_ids +ffffffff82956000 r agp_attach.agp_max +ffffffff82956048 R agp_ca +ffffffff82957000 R intagp_ca +ffffffff82958000 r drm_plane_create_rotation_property.props +ffffffff82959000 r drm_bridge_priv_state_funcs +ffffffff8295b000 r color_encoding_name +ffffffff8295b020 r color_range_name +ffffffff8295c000 r drm_subpixel_enum_list +ffffffff8295c060 r drm_dpms_enum_list +ffffffff8295c0a0 r drm_dvi_i_select_enum_list +ffffffff8295c0d0 r drm_dvi_i_subconnector_enum_list +ffffffff8295c100 r drm_tv_select_enum_list +ffffffff8295c150 r drm_tv_subconnector_enum_list +ffffffff8295c1a0 r drm_dp_subconnector_enum_list +ffffffff8295c210 r drm_link_status_enum_list +ffffffff8295c230 r drm_scaling_mode_enum_list +ffffffff8295c270 r drm_aspect_ratio_enum_list +ffffffff8295c2a0 r hdmi_colorspaces +ffffffff8295c370 r dp_colorspaces +ffffffff8295c450 r drm_content_type_enum_list +ffffffff8295c4a0 r drm_panel_orientation_enum_list +ffffffff8295c4e0 r privacy_screen_enum +ffffffff8295d000 r drm_crtc_fence_ops +ffffffff8295e000 r drm_dmt_modes +ffffffff82960940 r edid_cea_modes_1 +ffffffff829644d0 r edid_cea_modes_193 +ffffffff82965180 r edid_quirk_list +ffffffff82965360 r edid_4k_modes +ffffffff829655c0 r edid_est_modes +ffffffff82965dc0 r est3_modes +ffffffff82965f20 r stereo_mandatory_modes +ffffffff82965fa0 r extra_modes +ffffffff82966000 r drm_encoder_enum_list +ffffffff82967000 r drm_fbdev_client_funcs +ffffffff82967020 r drm_fb_helper_generic_funcs +ffffffff82967028 r drm_fbdev_fb_ops +ffffffff82968000 r drm_fb_xrgb8888_to_rgb332.dst_pixsize +ffffffff82968004 r drm_fb_xrgb8888_to_rgb565.dst_pixsize +ffffffff82968008 r drm_fb_xrgb8888_to_rgb888.dst_pixsize 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drm_dp_mst_topology_state_funcs +ffffffff82979020 r drm_dp_mst_req_type_str.req_type_str +ffffffff829791f0 r drm_dp_mst_sideband_tx_state_str.sideband_reason_str +ffffffff82979220 r drm_dp_mst_nak_reason_str.nak_reason_str +ffffffff82979278 r drm_dp_mst_i2c_algo +ffffffff8297a000 r hdmi_colorimetry_val +ffffffff8297b000 r ttm_bo_init_reserved.sys_mem +ffffffff8297c000 r ttm_bo_pipeline_gutting.sys_mem +ffffffff8297d018 R ttm_bo_vm_ops +ffffffff8297e000 r ttm_range_manager_func +ffffffff8297f018 r ttm_kmap_iter_io_ops +ffffffff8297f030 r ttm_kmap_iter_linear_io_ops +ffffffff82980000 r ttm_sys_manager_func +ffffffff82981000 r ttm_kmap_iter_tt_ops +ffffffff82982000 r drm_sched_fence_ops_scheduled +ffffffff82982038 r drm_sched_fence_ops_finished +ffffffff82983000 R ch7017_ops +ffffffff82984000 R ch7xxx_ops +ffffffff82984060 r ch7xxx_ids +ffffffff82985000 R ivch_ops +ffffffff82985060 r backup_addresses +ffffffff82986000 R ns2501_ops +ffffffff82986060 r mode_agnostic_values +ffffffff829860e0 r ns2501_modes +ffffffff82987000 R sil164_ops +ffffffff82988000 R tfp410_ops +ffffffff82989000 r chv_dpll +ffffffff82989050 r vlv_dpll +ffffffff829890a0 r g4x_dpll +ffffffff829890f0 r pch_dpll +ffffffff82989138 r intel_dp_enc_funcs +ffffffff8298a000 r intel_hdmi_enc_funcs +ffffffff8298b000 r vlv_primary_formats +ffffffff8298b030 r ivb_primary_formats +ffffffff8298b050 r i965_primary_formats +ffffffff8298b070 r i8xx_primary_formats +ffffffff8298b080 r i965_plane_funcs +ffffffff8298b0e8 r i8xx_plane_funcs +ffffffff8298c000 r gen11_dsi_encoder_funcs +ffffffff8298c020 r gen11_dsi_connector_funcs +ffffffff8298c098 r gen11_dsi_connector_helper_funcs +ffffffff8298c0e8 r gen11_dsi_host_ops +ffffffff8298d000 r intel_plane_helper_funcs +ffffffff8298e000 r g4x_audio_funcs +ffffffff8298e010 r ilk_audio_funcs +ffffffff8298e020 r hsw_audio_funcs +ffffffff8298e030 r hdmi_audio_clock +ffffffff8298e0a0 r dp_aud_n_m +ffffffff8298e250 r hdmi_aud_ncts_36bpp +ffffffff8298e330 r hdmi_aud_ncts_30bpp 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adls_combo_phy_trans_edp_hbr2 +ffffffff8299b660 r _adls_combo_phy_trans_edp_hbr3 +ffffffff8299b6e0 r _adls_combo_phy_trans_edp_hbr2 +ffffffff8299b758 r adls_combo_phy_trans_dp_hbr2_hbr3 +ffffffff8299b768 r tgl_combo_phy_trans_dp_hbr +ffffffff8299b780 r _adls_combo_phy_trans_dp_hbr2_hbr3 +ffffffff8299b800 r _tgl_combo_phy_trans_dp_hbr +ffffffff8299b878 r icl_combo_phy_trans_dp_hbr2_edp_hbr3 +ffffffff8299b888 r icl_combo_phy_trans_edp_hbr2 +ffffffff8299b8a0 r _icl_combo_phy_trans_dp_hbr2_edp_hbr3 +ffffffff8299b920 r _icl_combo_phy_trans_edp_hbr2 +ffffffff8299b998 r rkl_combo_phy_trans_dp_hbr2_hbr3 +ffffffff8299b9a8 r rkl_combo_phy_trans_dp_hbr +ffffffff8299b9c0 r _rkl_combo_phy_trans_dp_hbr2_hbr3 +ffffffff8299ba40 r _rkl_combo_phy_trans_dp_hbr +ffffffff8299bab8 r dg1_combo_phy_trans_dp_hbr2_hbr3 +ffffffff8299bac8 r dg1_combo_phy_trans_dp_rbr_hbr +ffffffff8299bae0 r _dg1_combo_phy_trans_dp_hbr2_hbr3 +ffffffff8299bb60 r _dg1_combo_phy_trans_dp_rbr_hbr +ffffffff8299bbd8 r tgl_uy_combo_phy_trans_dp_hbr2 +ffffffff8299bbe8 r tgl_combo_phy_trans_dp_hbr2 +ffffffff8299bc00 r _tgl_uy_combo_phy_trans_dp_hbr2 +ffffffff8299bc80 r _tgl_combo_phy_trans_dp_hbr2 +ffffffff8299bcf8 r tgl_dkl_phy_trans_dp_hbr2 +ffffffff8299bd08 r tgl_dkl_phy_trans_dp_hbr +ffffffff8299bd20 r _tgl_dkl_phy_trans_dp_hbr2 +ffffffff8299bda0 r _tgl_dkl_phy_trans_dp_hbr +ffffffff8299be18 r jsl_combo_phy_trans_edp_hbr2 +ffffffff8299be28 r jsl_combo_phy_trans_edp_hbr +ffffffff8299be40 r _jsl_combo_phy_trans_edp_hbr2 +ffffffff8299bec0 r _jsl_combo_phy_trans_edp_hbr +ffffffff8299bf38 r ehl_combo_phy_trans_dp +ffffffff8299bf48 r ehl_combo_phy_trans_edp_hbr2 +ffffffff8299bf60 r _ehl_combo_phy_trans_edp_hbr2 +ffffffff8299bfe0 r _ehl_combo_phy_trans_dp +ffffffff8299c058 r icl_mg_phy_trans_hdmi +ffffffff8299c070 r _icl_mg_phy_trans_hdmi +ffffffff8299c0e8 r icl_mg_phy_trans_hbr2_hbr3 +ffffffff8299c0f8 r icl_mg_phy_trans_rbr_hbr +ffffffff8299c110 r _icl_mg_phy_trans_hbr2_hbr3 +ffffffff8299c190 r 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d11_port_domains +ffffffff8299e180 r i9xx_port_domains +ffffffff8299f000 r xelpdp_power_wells +ffffffff8299f030 r xelpd_power_wells +ffffffff8299f060 r dg1_power_wells +ffffffff8299f0a0 r adls_power_wells +ffffffff8299f0e0 r rkl_power_wells +ffffffff8299f120 r tgl_power_wells +ffffffff8299f170 r icl_power_wells +ffffffff8299f1a0 r glk_power_wells +ffffffff8299f1d0 r bxt_power_wells +ffffffff8299f200 r skl_power_wells +ffffffff8299f230 r chv_power_wells +ffffffff8299f250 r bdw_power_wells +ffffffff8299f270 r hsw_power_wells +ffffffff8299f290 r vlv_power_wells +ffffffff8299f2b0 r i830_power_wells +ffffffff8299f2d0 r i9xx_power_wells +ffffffff8299f2e0 r i9xx_pwdoms_always_on +ffffffff8299f2f0 r .compoundliteral +ffffffff8299f308 r .compoundliteral.6 +ffffffff8299f320 r i9xx_power_wells_always_on +ffffffff8299f338 r .compoundliteral.10 +ffffffff8299f338 r .compoundliteral.8 +ffffffff8299f350 r .compoundliteral.11 +ffffffff8299f360 r icl_power_wells_pw_1 +ffffffff8299f378 r xelpdp_pwdoms_dc_off +ffffffff8299f388 r .compoundliteral.14 +ffffffff8299f3a0 r .compoundliteral.15 +ffffffff8299f3b0 r xelpdp_pwdoms_pw_2 +ffffffff8299f3c0 r .compoundliteral.17 +ffffffff8299f3d8 r .compoundliteral.18 +ffffffff8299f3e8 r xelpd_pwdoms_pw_a +ffffffff8299f3f8 r .compoundliteral.20 +ffffffff8299f410 r .compoundliteral.21 +ffffffff8299f420 r xelpd_pwdoms_pw_b +ffffffff8299f430 r .compoundliteral.23 +ffffffff8299f448 r .compoundliteral.24 +ffffffff8299f458 r xelpd_pwdoms_pw_c +ffffffff8299f468 r .compoundliteral.26 +ffffffff8299f480 r .compoundliteral.27 +ffffffff8299f490 r xelpd_pwdoms_pw_d +ffffffff8299f4a0 r .compoundliteral.29 +ffffffff8299f4b8 r .compoundliteral.30 +ffffffff8299f4c8 r icl_pwdoms_aux_a +ffffffff8299f4d8 r icl_pwdoms_aux_b +ffffffff8299f4e8 r xelpdp_pwdoms_aux_tc1 +ffffffff8299f4f8 r xelpdp_pwdoms_aux_tc2 +ffffffff8299f508 r xelpdp_pwdoms_aux_tc3 +ffffffff8299f518 r xelpdp_pwdoms_aux_tc4 +ffffffff8299f528 r .compoundliteral.37 +ffffffff8299f5b8 r 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dg2_dp_uhbr13_100 +ffffffff829c1360 r dg2_hdmi_25_175 +ffffffff829c1384 r dg2_hdmi_27_0 +ffffffff829c13a8 r dg2_hdmi_74_25 +ffffffff829c13cc r dg2_hdmi_148_5 +ffffffff829c13f0 r dg2_hdmi_297 +ffffffff829c1414 r dg2_hdmi_594 +ffffffff829c1438 r dg2_hdmi_25200 +ffffffff829c145c r dg2_hdmi_27027 +ffffffff829c1480 r dg2_hdmi_28320 +ffffffff829c14a4 r dg2_hdmi_30240 +ffffffff829c14c8 r dg2_hdmi_31500 +ffffffff829c14ec r dg2_hdmi_36000 +ffffffff829c1510 r dg2_hdmi_40000 +ffffffff829c1534 r dg2_hdmi_49500 +ffffffff829c1558 r dg2_hdmi_50000 +ffffffff829c157c r dg2_hdmi_57284 +ffffffff829c15a0 r dg2_hdmi_58000 +ffffffff829c15c4 r dg2_hdmi_65000 +ffffffff829c15e8 r dg2_hdmi_71000 +ffffffff829c160c r dg2_hdmi_74176 +ffffffff829c1630 r dg2_hdmi_75000 +ffffffff829c1654 r dg2_hdmi_78750 +ffffffff829c1678 r dg2_hdmi_85500 +ffffffff829c169c r dg2_hdmi_88750 +ffffffff829c16c0 r dg2_hdmi_106500 +ffffffff829c16e4 r dg2_hdmi_108000 +ffffffff829c1708 r dg2_hdmi_115500 +ffffffff829c172c r dg2_hdmi_119000 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intel_dsi_connector_funcs +ffffffff829c80b0 r intel_dsi_connector_helper_funcs +ffffffff829c9000 r lfsr_converts +ffffffff829ca000 r clflush_ops +ffffffff829cb000 r create_extensions +ffffffff829cb010 r set_proto_ctx_engines_extensions +ffffffff829cc000 r create_extensions +ffffffff829cd000 r i915_dmabuf_ops +ffffffff829cf000 r execbuf_extensions +ffffffff829cf010 r user_ring_map +ffffffff829d0000 r i915_gem_object_internal_ops +ffffffff829d1000 r i915_gem_object_funcs +ffffffff829d2000 R i915_gem_shmem_ops +ffffffff829d2080 r shmem_region_ops +ffffffff829d3000 r i915_region_stolen_lmem_ops +ffffffff829d3020 r i915_region_stolen_smem_ops +ffffffff829d3040 r i915_gem_object_stolen_ops +ffffffff829d4000 r ttm_system_region_ops +ffffffff829d4020 r sys_placement_flags +ffffffff829d4030 r tt_rsgt_ops +ffffffff829d4038 r i915_gem_ttm_obj_ops +ffffffff829d5000 r dma_fence_memcpy_ops +ffffffff829d6000 r i915_ttm_recover_region.recover_ops +ffffffff829d6020 r i915_ttm_backup_region.backup_ops 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intel_engine_class_repr.uabi_names +ffffffff829df030 r uabi_classes +ffffffff829df036 r legacy_ring_idx.map +ffffffff829e0000 r execlists_context_ops +ffffffff829e0080 r virtual_context_ops +ffffffff829e1000 r mmio_invalidate_full.gen12_regs +ffffffff829e2000 r pvc_instance0_steering_table +ffffffff829e2070 r xehpsdv_mslice_steering_table +ffffffff829e20a0 r dg2_lncf_steering_table +ffffffff829e20c0 r xehpsdv_lncf_steering_table +ffffffff829e20e0 r icl_l3bank_steering_table +ffffffff829e3000 r wf_ops +ffffffff829e4000 r gen12_rcs_offsets +ffffffff829e4090 r gen9_rcs_offsets +ffffffff829e4110 r gen9_xcs_offsets +ffffffff829e4190 r gen8_xcs_offsets +ffffffff829e5000 r pvc_mocs_table +ffffffff829e5020 r dg2_mocs_table_g10_ax +ffffffff829e5040 r dg2_mocs_table +ffffffff829e5060 r xehpsdv_mocs_table +ffffffff829e5260 r dg1_mocs_table +ffffffff829e5460 r tgl_mocs_table +ffffffff829e5660 r gen12_mocs_table +ffffffff829e5860 r icl_mocs_table +ffffffff829e5a60 r skl_mocs_table +ffffffff829e5c60 r broxton_mocs_table +ffffffff829e5c80 r mocs_offset.offset +ffffffff829e6000 r intel_region_lmem_ops +ffffffff829e8000 r ring_context_ops +ffffffff829e9000 r cparams +ffffffff829ea000 r mcr_ranges_xehp +ffffffff829ea070 r mcr_ranges_gen12 +ffffffff829ea0a0 r mcr_ranges_gen8 +ffffffff829eb028 r guc_class_engine_class_map +ffffffff829eb030 r xe_lpd_lists +ffffffff829eb170 r default_lists +ffffffff829eb2b0 r xe_lpd_global_regs +ffffffff829eb390 r xe_lpd_rc_class_regs +ffffffff829eb3f0 r xe_lpd_rc_inst_regs +ffffffff829eb6f0 r empty_regs_list +ffffffff829eb6f0 r xe_lpd_vd_inst_regs +ffffffff829eb9f0 r xe_lpd_vec_class_regs +ffffffff829eba50 r xe_lpd_vec_inst_regs +ffffffff829ebd50 r xe_lpd_blt_inst_regs +ffffffff829ec050 r default_global_regs +ffffffff829ec0e0 r default_rc_class_regs +ffffffff829ed000 r _guc_log_init_sizes.sections +ffffffff829ef000 r guc_context_ops +ffffffff829ef080 r virtual_guc_context_ops +ffffffff829ef100 r virtual_parent_context_ops +ffffffff829ef180 r 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i9xx_wm_funcs +ffffffff82a09258 r i845_wm_funcs +ffffffff82a09290 r cxsr_latency_table +ffffffff82a0a000 r dg2_g10_revid_step_tbl +ffffffff82a0a030 r dg2_g11_revid_step_tbl +ffffffff82a0a050 r xehpsdv_revids +ffffffff82a0a080 r adlp_revids +ffffffff82a0a0c0 r adls_rpls_revids +ffffffff82a0a100 r adls_revids +ffffffff82a0a140 r rkl_revids +ffffffff82a0a160 r bxt_revids +ffffffff82a0a1a0 r skl_revids +ffffffff82a0a1d0 r pvc_bd_subids +ffffffff82a0a1f0 r pvc_ct_subids +ffffffff82a0c000 r forcewake_domain_names +ffffffff82a0c080 r __pvc_fw_ranges +ffffffff82a0c200 r pvc_shadowed_regs +ffffffff82a0c320 r __dg2_fw_ranges +ffffffff82a0c5f0 r dg2_shadowed_regs +ffffffff82a0c710 r __xehp_fw_ranges +ffffffff82a0c9e0 r gen12_shadowed_regs +ffffffff82a0cb00 r __gen12_fw_ranges +ffffffff82a0cd10 r __gen11_fw_ranges +ffffffff82a0cec0 r gen11_shadowed_regs +ffffffff82a0cf80 r __gen9_fw_ranges +ffffffff82a0d100 r gen8_shadowed_regs +ffffffff82a0d130 r __chv_fw_ranges +ffffffff82a0d1f0 r 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caicos_sysls_default +ffffffff82a13280 r caicos_cgcg_cgls_enable +ffffffff82a134d0 r caicos_cgcg_cgls_disable +ffffffff82a13730 r barts_mgcg_enable +ffffffff82a137b0 r turks_mgcg_enable +ffffffff82a13830 r caicos_mgcg_enable +ffffffff82a138b0 r caicos_mgcg_disable +ffffffff82a13930 r turks_sysls_enable +ffffffff82a139f0 r caicos_sysls_enable +ffffffff82a13aa0 r turks_sysls_disable +ffffffff82a13b60 r caicos_sysls_disable +ffffffff82a14000 r didt_config_ci +ffffffff82a145b4 r defaults_bonaire_xt +ffffffff82a14600 r defaults_saturn_xt +ffffffff82a1464c r defaults_hawaii_xt +ffffffff82a14698 r defaults_hawaii_pro +ffffffff82a15000 r ci_program_jump_on_start.data +ffffffff82a16000 r bonaire_io_mc_regs +ffffffff82a16120 r hawaii_io_mc_regs +ffffffff82a161d0 r mc_cg_registers +ffffffff82a16200 r bonaire_mgcg_cgcg_init +ffffffff82a165e0 r bonaire_golden_registers +ffffffff82a167d0 r bonaire_golden_common_registers +ffffffff82a16800 r bonaire_golden_spm_registers +ffffffff82a16810 r kalindi_mgcg_cgcg_init +ffffffff82a16ab0 r kalindi_golden_registers +ffffffff82a16c20 r kalindi_golden_common_registers +ffffffff82a16c50 r kalindi_golden_spm_registers +ffffffff82a16c60 r godavari_golden_registers +ffffffff82a16de0 r spectre_mgcg_cgcg_init +ffffffff82a17200 r spectre_golden_registers +ffffffff82a17330 r spectre_golden_common_registers +ffffffff82a17360 r spectre_golden_spm_registers +ffffffff82a17370 r hawaii_mgcg_cgcg_init +ffffffff82a17880 r hawaii_golden_registers +ffffffff82a17a30 r hawaii_golden_common_registers +ffffffff82a17a6c r hawaii_golden_spm_registers +ffffffff82a17a80 r spectre_rlc_save_restore_register_list +ffffffff82a18170 r kalindi_rlc_save_restore_register_list +ffffffff82a18680 r ci_cs_data +ffffffff82a186a0 r ci_SECT_CONTEXT_defs +ffffffff82a18720 r ci_SECT_CONTEXT_def_1 +ffffffff82a18a70 r ci_SECT_CONTEXT_def_3 +ffffffff82a18a90 r ci_SECT_CONTEXT_def_4 +ffffffff82a18d04 r ci_SECT_CONTEXT_def_5 +ffffffff82a18d0c r ci_SECT_CONTEXT_def_6 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evergreen_cs_data +ffffffff82a1f410 r SECT_CONTEXT_defs +ffffffff82a1f490 r SECT_CLEAR_defs +ffffffff82a1f4b0 r SECT_CTRLCONST_defs +ffffffff82a1f4d0 r SECT_CONTEXT_def_2 +ffffffff82a1f4f0 r SECT_CONTEXT_def_4 +ffffffff82a1f680 r SECT_CONTEXT_def_5 +ffffffff82a1f6a0 r SECT_CONTEXT_def_6 +ffffffff82a1f780 r SECT_CONTEXT_def_1 +ffffffff82a1ff20 r SECT_CONTEXT_def_3 +ffffffff82a20000 r SECT_CONTEXT_def_7 +ffffffff82a20488 r SECT_CLEAR_def_1 +ffffffff82a20494 r SECT_CTRLCONST_def_1 +ffffffff82a204a0 r evergreen_default_state +ffffffff82a21000 r cayman_reg_safe_bm +ffffffff82a23000 r evergreen_reg_safe_bm +ffffffff82a26000 r evergreen_hdmi_write_sad_regs.eld_reg_to_type +ffffffff82a27000 r didt_config_kv +ffffffff82a28000 r barts_io_mc_regs +ffffffff82a280f0 r turks_io_mc_regs +ffffffff82a281e0 r caicos_io_mc_regs +ffffffff82a282d0 r cayman_io_mc_regs +ffffffff82a283c0 r cayman_golden_registers +ffffffff82a28580 r cayman_golden_registers2 +ffffffff82a285d0 r dvst_golden_registers +ffffffff82a28860 r dvst_golden_registers2 +ffffffff82a28890 r scrapper_golden_registers +ffffffff82a28d70 r tn_rlc_save_restore_register_list +ffffffff82a28f60 r cayman_cs_data +ffffffff82a28fa0 r SECT_CONTEXT_defs +ffffffff82a29020 r SECT_CLEAR_defs +ffffffff82a29040 r SECT_CTRLCONST_defs +ffffffff82a29060 r SECT_CONTEXT_def_2 +ffffffff82a29080 r SECT_CONTEXT_def_4 +ffffffff82a29210 r SECT_CONTEXT_def_5 +ffffffff82a29230 r SECT_CONTEXT_def_1 +ffffffff82a299d0 r SECT_CONTEXT_def_3 +ffffffff82a29ab0 r SECT_CONTEXT_def_6 +ffffffff82a29b90 r SECT_CONTEXT_def_7 +ffffffff82a2a018 r SECT_CLEAR_def_1 +ffffffff82a2a024 r SECT_CTRLCONST_def_1 +ffffffff82a2a030 r cayman_default_state +ffffffff82a2b000 r cac_weights_cayman_xt +ffffffff82a2b128 r cac_weights_cayman_pro +ffffffff82a2b250 r cac_weights_cayman_le +ffffffff82a2b380 r cayman_cgcg_cgls_default +ffffffff82a2b5c0 r cayman_mgcg_default +ffffffff82a2bf20 r cayman_sysls_default +ffffffff82a2bff0 r cayman_cgcg_cgls_enable +ffffffff82a2c240 r cayman_cgcg_cgls_disable +ffffffff82a2c4a0 r cayman_mgcg_enable +ffffffff82a2c520 r cayman_mgcg_disable +ffffffff82a2c5a0 r cayman_sysls_enable +ffffffff82a2c670 r cayman_sysls_disable +ffffffff82a2d000 r rn50_reg_safe_bm +ffffffff82a2d1a0 r r100_reg_safe_bm +ffffffff82a2e000 r r200_reg_safe_bm +ffffffff82a2f000 r r300_reg_safe_bm +ffffffff82a30000 r r420_reg_safe_bm +ffffffff82a32000 r color_formats_table +ffffffff82a32480 r r600_reg_safe_bm +ffffffff82a35000 R r600_utc +ffffffff82a35040 R r600_dtc +ffffffff82a35080 r r600_encode_pci_lane_width.encoded_lanes +ffffffff82a37000 r r100_gfx_ring +ffffffff82a37070 r r300_gfx_ring +ffffffff82a370e0 r rv515_gfx_ring +ffffffff82a37150 r r600_gfx_ring +ffffffff82a371c0 r r600_dma_ring +ffffffff82a37230 r rv6xx_uvd_ring +ffffffff82a372a0 r rv770_uvd_ring +ffffffff82a37310 r evergreen_gfx_ring +ffffffff82a37380 r evergreen_dma_ring +ffffffff82a373f0 r cayman_gfx_ring +ffffffff82a37460 r cayman_dma_ring +ffffffff82a374d0 r cayman_uvd_ring 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radeon_lvds_connector_helper_funcs +ffffffff82a3c190 r radeon_dp_connector_funcs +ffffffff82a3c298 r radeon_lvds_bridge_connector_funcs +ffffffff82a3c310 r radeon_vga_connector_funcs +ffffffff82a3c388 r radeon_dvi_connector_funcs +ffffffff82a3c400 r radeon_edp_connector_funcs +ffffffff82a3c478 r radeon_tv_connector_funcs +ffffffff82a3c4f0 r radeon_lvds_connector_funcs +ffffffff82a3d000 r radeon_family_name +ffffffff82a3d3f0 r radeon_px_quirk_list +ffffffff82a3e000 r radeon_fb_funcs +ffffffff82a3e018 r radeon_mode_funcs +ffffffff82a3e060 r radeon_tmds_pll_enum_list +ffffffff82a3e080 r radeon_tv_std_enum_list +ffffffff82a3e100 r radeon_underscan_enum_list +ffffffff82a3e130 r radeon_audio_enum_list +ffffffff82a3e160 r radeon_dither_enum_list +ffffffff82a3e180 r radeon_output_csc_enum_list +ffffffff82a3e1c0 r radeon_crtc_funcs +ffffffff82a3e280 r hpd_names +ffffffff82a3e2b0 r encoder_names +ffffffff82a3e3e0 r radeon_afmt_init.eg_offsets +ffffffff82a3f000 r aux_offset +ffffffff82a40000 R radeondrm_ca +ffffffff82a40030 r pciidlist +ffffffff82a441d0 r kms_driver +ffffffff82a442c0 r radeon_ioctls_kms +ffffffff82a45000 r radeon_fb_helper_funcs +ffffffff82a45008 r radeonfb_ops +ffffffff82a46000 R radeon_fence_ops +ffffffff82a48000 R radeon_gem_object_funcs +ffffffff82a48060 r radeon_gem_vm_ops +ffffffff82a49000 r radeon_i2c_algo +ffffffff82a49010 r radeon_atom_i2c_algo +ffffffff82a4a000 r legacy_helper_funcs +ffffffff82a4b000 r radeon_backlight_ops +ffffffff82a4b018 r radeon_legacy_lvds_enc_funcs +ffffffff82a4b038 r radeon_legacy_lvds_helper_funcs +ffffffff82a4b0a0 r radeon_legacy_tmds_int_enc_funcs +ffffffff82a4b0c0 r radeon_legacy_tmds_int_helper_funcs +ffffffff82a4b128 r radeon_legacy_primary_dac_enc_funcs +ffffffff82a4b148 r radeon_legacy_primary_dac_helper_funcs +ffffffff82a4b1b0 r radeon_legacy_tv_dac_enc_funcs +ffffffff82a4b1d0 r radeon_legacy_tv_dac_helper_funcs +ffffffff82a4b238 r radeon_legacy_tmds_ext_enc_funcs +ffffffff82a4b258 r radeon_legacy_tmds_ext_helper_funcs +ffffffff82a4c000 r SLOPE_value +ffffffff82a4c030 r YCOEF_EN_value +ffffffff82a4c060 r YCOEF_value +ffffffff82a4c090 r available_tv_modes +ffffffff82a4c110 r hor_timing_NTSC +ffffffff82a4c150 r vert_timing_NTSC +ffffffff82a4c190 r hor_timing_PAL +ffffffff82a4c1d0 r vert_timing_PAL +ffffffff82a4e000 r radeon_pm_state_type_name +ffffffff82a4f000 r radeon_evict_flags.placements +ffffffff82a52000 r rs600_reg_safe_bm +ffffffff82a54000 r rv515_reg_safe_bm +ffffffff82a55000 r dll_speed_table +ffffffff82a56000 r r7xx_golden_registers +ffffffff82a56090 r r7xx_golden_dyn_gpr_registers +ffffffff82a56100 r rv770ce_golden_registers +ffffffff82a56160 r rv770_golden_registers +ffffffff82a561b0 r rv770_mgcg_init +ffffffff82a568f0 r rv730_golden_registers +ffffffff82a56950 r rv730_mgcg_init +ffffffff82a56ee0 r rv710_golden_registers +ffffffff82a56f30 r rv710_mgcg_init +ffffffff82a571d0 r rv740_golden_registers +ffffffff82a57360 r rv740_mgcg_init +ffffffff82a59000 r rv730_smc_int_vectors +ffffffff82a59040 r rv710_smc_int_vectors +ffffffff82a59080 r rv740_smc_int_vectors +ffffffff82a590c0 r cypress_smc_int_vectors +ffffffff82a59100 r caicos_smc_int_vectors +ffffffff82a59140 r cayman_smc_int_vectors +ffffffff82a5a000 r tahiti_io_mc_regs +ffffffff82a5a120 r pitcairn_io_mc_regs +ffffffff82a5a240 r verde_io_mc_regs +ffffffff82a5a360 r oland_io_mc_regs +ffffffff82a5a480 r hainan_io_mc_regs +ffffffff82a5a5a0 r crtc_offsets +ffffffff82a5a5c0 r si_disp_int_status +ffffffff82a5a5e0 r tahiti_golden_registers +ffffffff82a5a760 r tahiti_golden_rlc_registers +ffffffff82a5a7b0 r tahiti_mgcg_cgcg_init +ffffffff82a5ad98 r tahiti_golden_registers2 +ffffffff82a5adb0 r pitcairn_golden_registers +ffffffff82a5af00 r pitcairn_golden_rlc_registers +ffffffff82a5af40 r pitcairn_mgcg_cgcg_init +ffffffff82a5b3b0 r verde_golden_registers +ffffffff82a5b620 r verde_golden_rlc_registers +ffffffff82a5b660 r verde_mgcg_cgcg_init +ffffffff82a5bae0 r oland_golden_registers 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lcac_pitcairn +ffffffff82a5f530 r cac_override_pitcairn +ffffffff82a5f544 r powertune_data_pitcairn +ffffffff82a5f580 r lcac_cape_verde +ffffffff82a5f9d0 r cac_override_cape_verde +ffffffff82a5f9e4 r powertune_data_cape_verde +ffffffff82a5fa20 r cac_weights_cape_verde_pro +ffffffff82a5fef0 r cac_weights_heathrow +ffffffff82a603c0 r cac_weights_chelsea_xt +ffffffff82a60890 r cac_weights_chelsea_pro +ffffffff82a60d60 r cac_weights_cape_verde +ffffffff82a61230 r cac_weights_mars_pro +ffffffff82a61700 r lcac_mars_pro +ffffffff82a61a60 r cac_override_oland +ffffffff82a61a74 r powertune_data_mars_pro +ffffffff82a61ab0 r cac_weights_mars_xt +ffffffff82a61f80 r cac_weights_oland_pro +ffffffff82a62450 r cac_weights_oland_xt +ffffffff82a62920 r lcac_oland +ffffffff82a62c7c r powertune_data_oland +ffffffff82a62cb8 r dte_data_oland +ffffffff82a62d90 r cac_weights_hainan +ffffffff82a63254 r powertune_data_hainan +ffffffff82a63290 r dte_data_aruba_pro +ffffffff82a63360 r dte_data_tahiti_pro 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amdgpu_connector_vga_funcs +ffffffff82a71338 r amdgpu_connector_dvi_funcs +ffffffff82a713b0 r amdgpu_connector_lvds_funcs +ffffffff82a73000 R amdgpu_ctx_num_entities +ffffffff82a74000 r amdgpu_kms_driver +ffffffff82a740f0 r amdgpu_device_ip_reinit_late_sriov.ip_order +ffffffff82a75000 r hw_id_map +ffffffff82a75090 r hw_id_names +ffffffff82a76000 r hpd_names +ffffffff82a76030 r encoder_names +ffffffff82a76180 r dcc_retile_formats +ffffffff82a76270 r dcc_formats +ffffffff82a76360 R amdgpu_mode_funcs +ffffffff82a763b0 r amdgpu_underscan_enum_list +ffffffff82a763e0 r amdgpu_audio_enum_list +ffffffff82a76410 r amdgpu_dither_enum_list +ffffffff82a76430 r amdgpu_fb_funcs_atomic +ffffffff82a76448 r amdgpu_fb_funcs +ffffffff82a77000 R amdgpu_dmabuf_ops +ffffffff82a78000 R amdgpu_ioctls_kms +ffffffff82a78210 R amdgpu_ca +ffffffff82a78240 r pciidlist +ffffffff82a79110 r amdgpu_unsupported_pciidlist +ffffffff82a79690 r amdgpu_kms_driver +ffffffff82a7a000 r amdgpu_job_fence_ops +ffffffff82a7a038 r amdgpu_fence_ops +ffffffff82a7b000 r amdgpu_gem_object_funcs +ffffffff82a7b060 r amdgpu_gem_vm_ops +ffffffff82a7d000 R amdgpu_gtt_mgr_attr_group +ffffffff82a7d018 r amdgpu_gtt_mgr_func +ffffffff82a7e000 r amdgpu_atombios_i2c_algo +ffffffff82a7f000 R amdgpu_sched_ops +ffffffff82a82000 r amdgpu_vram_names +ffffffff82a83000 r amdgpu_preempt_mgr_func +ffffffff82a84000 R psp_ip_funcs +ffffffff82a840a0 R psp_v3_1_ip_block +ffffffff82a840b8 R psp_v10_0_ip_block +ffffffff82a840d0 R psp_v11_0_ip_block +ffffffff82a840e8 R psp_v11_0_8_ip_block +ffffffff82a84100 R psp_v12_0_ip_block +ffffffff82a84118 R psp_v13_0_ip_block +ffffffff82a84130 R psp_v13_0_4_ip_block +ffffffff82a86000 r amdgpu_evict_flags.placements +ffffffff82a8a000 R amdgpu_vkms_ip_block +ffffffff82a8c000 R amdgpu_vm_cpu_funcs +ffffffff82a8e000 R amdgpu_vm_sdma_funcs +ffffffff82a8f000 R amdgpu_vram_mgr_attr_group +ffffffff82a8f018 r amdgpu_vram_mgr_func +ffffffff82a90000 r xgmi_pcs_err_status_reg_arct +ffffffff82a91000 r GC_BASE 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dce_v10_0_encoder_funcs +ffffffff82a94188 r dce_v10_0_dac_helper_funcs +ffffffff82a941f0 r dce_v10_0_dig_helper_funcs +ffffffff82a94258 r dce_v10_0_ext_helper_funcs +ffffffff82a942c0 r dce_v10_0_audio_write_sad_regs.eld_reg_to_type +ffffffff82a942f0 r dce_v10_0_crtc_irq_funcs +ffffffff82a94300 r dce_v10_0_pageflip_irq_funcs +ffffffff82a94310 r dce_v10_0_hpd_irq_funcs +ffffffff82a94320 r interrupt_status_offsets +ffffffff82a94380 r dce_v10_0_crtc_funcs +ffffffff82a94440 r dce_v10_0_crtc_helper_funcs +ffffffff82a944c0 r vga_control_regs +ffffffff82a944e0 r dig_offsets +ffffffff82a94500 r pin_offsets +ffffffff82a94520 r fiji_mgcg_cgcg_init +ffffffff82a94540 r golden_settings_fiji_a10 +ffffffff82a94570 r tonga_mgcg_cgcg_init +ffffffff82a94590 r golden_settings_tonga_a11 +ffffffff82a95000 r crtc_offsets +ffffffff82a95020 r dce_v11_0_ip_funcs +ffffffff82a950c0 R dce_v11_0_ip_block +ffffffff82a950d8 R dce_v11_2_ip_block +ffffffff82a950f0 r dce_v11_0_display_funcs +ffffffff82a95150 r hpd_offsets +ffffffff82a95168 r dce_v11_0_encoder_funcs +ffffffff82a95188 r dce_v11_0_dac_helper_funcs +ffffffff82a951f0 r dce_v11_0_dig_helper_funcs +ffffffff82a95258 r dce_v11_0_ext_helper_funcs +ffffffff82a952c0 r dce_v11_0_audio_write_sad_regs.eld_reg_to_type +ffffffff82a952f0 r dce_v11_0_crtc_irq_funcs +ffffffff82a95300 r dce_v11_0_pageflip_irq_funcs +ffffffff82a95310 r dce_v11_0_hpd_irq_funcs +ffffffff82a95320 r interrupt_status_offsets +ffffffff82a95380 r dce_v11_0_crtc_funcs +ffffffff82a95440 r dce_v11_0_crtc_helper_funcs +ffffffff82a954c0 r vga_control_regs +ffffffff82a954e0 r dig_offsets +ffffffff82a95510 r cz_mgcg_cgcg_init +ffffffff82a95530 r cz_golden_settings_a11 +ffffffff82a95550 r stoney_golden_settings_a11 +ffffffff82a95570 r polaris11_golden_settings_a11 +ffffffff82a955b0 r polaris10_golden_settings_a11 +ffffffff82a96000 R df_v1_7_funcs +ffffffff82a96070 r df_v1_7_channel_number +ffffffff82a97000 R df_v3_6_funcs +ffffffff82a97070 r df_v3_6_channel_number +ffffffff82a98000 r GC_BASE +ffffffff82a980a8 r HDP_BASE +ffffffff82a98150 r MMHUB_BASE +ffffffff82a981f8 r ATHUB_BASE +ffffffff82a982a0 r NBIO_BASE +ffffffff82a98348 r MP0_BASE +ffffffff82a983f0 r MP1_BASE +ffffffff82a98498 r VCN0_BASE +ffffffff82a98540 r DF_BASE +ffffffff82a985e8 r DCN_BASE +ffffffff82a98690 r OSSSYS_BASE +ffffffff82a98738 r SMUIO_BASE +ffffffff82a987e0 r THM_BASE +ffffffff82a99000 r gfx_v10_0_ip_funcs +ffffffff82a990a0 R gfx_v10_0_ip_block +ffffffff82a990b8 r gfx_v10_0_kiq_pm4_funcs +ffffffff82a990f8 r gfx_v10_0_ring_funcs_kiq +ffffffff82a99218 r gfx_v10_0_ring_funcs_gfx +ffffffff82a99338 r gfx_v10_0_ring_funcs_compute +ffffffff82a99458 r gfx_v10_0_eop_irq_funcs +ffffffff82a99468 r gfx_v10_0_kiq_irq_funcs +ffffffff82a99478 r gfx_v10_0_priv_reg_irq_funcs +ffffffff82a99488 r gfx_v10_0_priv_inst_irq_funcs +ffffffff82a99498 r gfx_v10_0_rlc_funcs +ffffffff82a99500 r gfx_v10_0_rlc_funcs_sriov +ffffffff82a99570 r gfx10_cs_data +ffffffff82a99590 r gfx10_SECT_CONTEXT_defs +ffffffff82a99620 r gfx10_SECT_CONTEXT_def_1 +ffffffff82a99980 r gfx10_SECT_CONTEXT_def_3 +ffffffff82a99990 r gfx10_SECT_CONTEXT_def_4 +ffffffff82a99c08 r gfx10_SECT_CONTEXT_def_5 +ffffffff82a99c10 r gfx10_SECT_CONTEXT_def_6 +ffffffff82a99c20 r gfx10_SECT_CONTEXT_def_2 +ffffffff82a9a060 r gfx10_SECT_CONTEXT_def_7 +ffffffff82a9a170 r gfx10_SECT_CONTEXT_def_8 +ffffffff82a9a4a0 r gfx_v10_0_gfx_funcs +ffffffff82a9a4e0 r golden_settings_gc_rlc_spm_10_0_nv10 +ffffffff82aa0780 r golden_settings_gc_rlc_spm_10_1_nv14 +ffffffff82aa41a0 r golden_settings_gc_rlc_spm_10_1_2_nv12 +ffffffff82aaa440 r golden_settings_gc_10_1 +ffffffff82aaa800 r golden_settings_gc_10_0_nv10 +ffffffff82aaa800 r golden_settings_gc_10_1_1 +ffffffff82aaab90 r golden_settings_gc_10_1_2 +ffffffff82aaab90 r golden_settings_gc_10_1_nv14 +ffffffff82aaaf80 r golden_settings_gc_10_1_2_nv12 +ffffffff82aaaf80 r golden_settings_gc_10_3 +ffffffff82aab388 r golden_settings_gc_10_3_sienna_cichlid +ffffffff82aab390 r golden_settings_gc_10_3_2 +ffffffff82aab780 r golden_settings_gc_10_3_vangogh +ffffffff82aab9e0 r golden_settings_gc_10_3_3 +ffffffff82aabbc0 r golden_settings_gc_10_3_4 +ffffffff82aabf20 r golden_settings_gc_10_3_5 +ffffffff82aac220 r golden_settings_gc_10_0_cyan_skillfish +ffffffff82aac550 r golden_settings_gc_10_3_6 +ffffffff82aac760 r golden_settings_gc_10_3_7 +ffffffff82aad000 r gfx_v11_0_ip_funcs +ffffffff82aad0a0 R gfx_v11_0_ip_block +ffffffff82aad0b8 r gfx_v11_0_kiq_pm4_funcs +ffffffff82aad0f8 r gfx_v11_0_ring_funcs_kiq +ffffffff82aad218 r gfx_v11_0_ring_funcs_gfx +ffffffff82aad338 r gfx_v11_0_ring_funcs_compute +ffffffff82aad458 r gfx_v11_0_eop_irq_funcs +ffffffff82aad468 r gfx_v11_0_priv_reg_irq_funcs +ffffffff82aad478 r gfx_v11_0_priv_inst_irq_funcs +ffffffff82aad488 r gfx_v11_0_rlc_funcs +ffffffff82aad4f0 r gfx11_cs_data +ffffffff82aad510 r gfx11_SECT_CONTEXT_defs +ffffffff82aad590 r gfx11_SECT_CONTEXT_def_1 +ffffffff82aad8f0 r gfx11_SECT_CONTEXT_def_3 +ffffffff82aad900 r gfx11_SECT_CONTEXT_def_5 +ffffffff82aad908 r gfx11_SECT_CONTEXT_def_6 +ffffffff82aad910 r gfx11_SECT_CONTEXT_def_2 +ffffffff82aadd50 r gfx11_SECT_CONTEXT_def_4 +ffffffff82aadfd0 r gfx11_SECT_CONTEXT_def_7 +ffffffff82aae438 r gfx_v11_0_gfx_funcs +ffffffff82aae480 r golden_settings_gc_11_0_1 +ffffffff82aaf000 r gfx_v8_0_ip_funcs +ffffffff82aaf0a0 R gfx_v8_0_ip_block +ffffffff82aaf0b8 R gfx_v8_1_ip_block +ffffffff82aaf0d0 r gfx_v8_0_gfx_funcs +ffffffff82aaf110 r gfx_v8_0_ring_funcs_kiq +ffffffff82aaf230 r gfx_v8_0_ring_funcs_gfx +ffffffff82aaf350 r gfx_v8_0_ring_funcs_compute +ffffffff82aaf470 r amdgpu_gds_reg_offset +ffffffff82aaf570 r gfx_v8_0_eop_irq_funcs +ffffffff82aaf580 r gfx_v8_0_priv_reg_irq_funcs +ffffffff82aaf590 r gfx_v8_0_priv_inst_irq_funcs +ffffffff82aaf5a0 r gfx_v8_0_cp_ecc_error_irq_funcs +ffffffff82aaf5b0 r gfx_v8_0_sq_irq_funcs +ffffffff82aaf5c0 r sq_edc_source_names +ffffffff82aaf5f8 r iceland_rlc_funcs +ffffffff82aaf660 r vi_cs_data +ffffffff82aaf680 r vi_SECT_CONTEXT_defs +ffffffff82aaf700 r vi_SECT_CONTEXT_def_1 +ffffffff82aafa50 r vi_SECT_CONTEXT_def_3 +ffffffff82aafa70 r vi_SECT_CONTEXT_def_4 +ffffffff82aafce4 r vi_SECT_CONTEXT_def_5 +ffffffff82aafcec r vi_SECT_CONTEXT_def_6 +ffffffff82aafcf0 r vi_SECT_CONTEXT_def_2 +ffffffff82ab0140 r vi_SECT_CONTEXT_def_7 +ffffffff82ab04f0 r vgpr_init_compute_shader +ffffffff82ab0600 r vgpr_init_regs +ffffffff82ab0690 r sgpr1_init_regs +ffffffff82ab0720 r sgpr2_init_regs +ffffffff82ab07b0 r sec_ded_counter_registers +ffffffff82ab0820 r iceland_mgcg_cgcg_init +ffffffff82ab0b20 r golden_settings_iceland_a11 +ffffffff82ab0be0 r iceland_golden_common_all +ffffffff82ab0c40 r fiji_mgcg_cgcg_init +ffffffff82ab0df0 r golden_settings_fiji_a10 +ffffffff82ab0e80 r fiji_golden_common_all +ffffffff82ab0f00 r tonga_mgcg_cgcg_init +ffffffff82ab1290 r golden_settings_tonga_a11 +ffffffff82ab1350 r tonga_golden_common_all +ffffffff82ab13b0 r golden_settings_vegam_a11 +ffffffff82ab1480 r vegam_golden_common_all +ffffffff82ab14d0 r golden_settings_polaris11_a11 +ffffffff82ab15a0 r polaris11_golden_common_all +ffffffff82ab15f0 r golden_settings_polaris10_a11 +ffffffff82ab16c0 r polaris10_golden_common_all +ffffffff82ab1720 r cz_mgcg_cgcg_init +ffffffff82ab1ab0 r cz_golden_settings_a11 +ffffffff82ab1b40 r cz_golden_common_all +ffffffff82ab1ba0 r stoney_mgcg_cgcg_init +ffffffff82ab1be0 r stoney_golden_settings_a11 +ffffffff82ab1c60 r stoney_golden_common_all +ffffffff82ab2000 R gfx_v9_0_ras_ops +ffffffff82ab2040 r gfx_v9_0_ip_funcs +ffffffff82ab20e0 R gfx_v9_0_ip_block +ffffffff82ab2100 r ras_gfx_subblocks +ffffffff82ab2b80 r gfx_v9_0_edc_counter_regs +ffffffff82ab2f20 r gfx_v9_0_ras_fields +ffffffff82ab4000 r gfx_v9_0_kiq_pm4_funcs +ffffffff82ab4040 r gfx_v9_0_ring_funcs_kiq +ffffffff82ab4160 r gfx_v9_0_ring_funcs_gfx +ffffffff82ab4280 r gfx_v9_0_ring_funcs_compute +ffffffff82ab43a0 r gfx_v9_0_eop_irq_funcs +ffffffff82ab43b0 r gfx_v9_0_priv_reg_irq_funcs +ffffffff82ab43c0 r gfx_v9_0_priv_inst_irq_funcs +ffffffff82ab43d0 r gfx_v9_0_cp_ecc_error_irq_funcs +ffffffff82ab43e0 r gfx_v9_0_rlc_funcs +ffffffff82ab4450 r gfx9_cs_data +ffffffff82ab4470 r gfx9_SECT_CONTEXT_defs +ffffffff82ab4500 r gfx9_SECT_CONTEXT_def_1 +ffffffff82ab4850 r gfx9_SECT_CONTEXT_def_3 +ffffffff82ab4860 r gfx9_SECT_CONTEXT_def_4 +ffffffff82ab4ad4 r gfx9_SECT_CONTEXT_def_5 +ffffffff82ab4adc r gfx9_SECT_CONTEXT_def_6 +ffffffff82ab4ae0 r gfx9_SECT_CONTEXT_def_7 +ffffffff82ab4bf0 r gfx9_SECT_CONTEXT_def_2 +ffffffff82ab5060 r gfx9_SECT_CONTEXT_def_8 +ffffffff82ab52d0 r vgpr_init_compute_shader_arcturus +ffffffff82ab5b60 r vgpr_init_regs_arcturus +ffffffff82ab5cf0 r vgpr_init_regs +ffffffff82ab5e80 r sgpr1_init_regs +ffffffff82ab6010 r sgpr2_init_regs +ffffffff82ab6198 r gfx_v9_0_gfx_funcs +ffffffff82ab61e0 r golden_settings_gc_9_0 +ffffffff82ab63c0 r golden_settings_gc_9_0_vg10 +ffffffff82ab6570 r golden_settings_gc_9_2_1 +ffffffff82ab66f0 r golden_settings_gc_9_2_1_vg12 +ffffffff82ab6830 r golden_settings_gc_9_0_vg20 +ffffffff82ab6940 r golden_settings_gc_9_4_1_arct +ffffffff82ab6a50 r golden_settings_gc_9_1 +ffffffff82ab6c90 r golden_settings_gc_9_1_rv2 +ffffffff82ab6e60 r golden_settings_gc_9_1_rv1 +ffffffff82ab6f10 r golden_settings_gc_9_1_rn +ffffffff82ab7030 r golden_settings_gc_9_x_common +ffffffff82ab8000 R gfx_v9_4_ras_ops +ffffffff82ab8040 r gfx_v9_4_edc_counter_regs +ffffffff82ab8420 r gfx_v9_4_ras_fields +ffffffff82aba000 R vgpr_init_regs_aldebaran +ffffffff82aba1b0 R sgpr112_init_regs_aldebaran +ffffffff82aba360 R sgpr96_init_regs_aldebaran +ffffffff82aba510 R sgpr64_init_regs_aldebaran +ffffffff82aba6c0 r golden_settings_gc_9_4_2_alde +ffffffff82aba720 r golden_settings_gc_9_4_2_alde_die_0 +ffffffff82aba7b0 r golden_settings_gc_9_4_2_alde_die_1 +ffffffff82aba840 r sgpr112_init_compute_shader_aldebaran +ffffffff82abaa60 r sgpr96_init_compute_shader_aldebaran +ffffffff82abac50 r sgpr64_init_compute_shader_aldebaran +ffffffff82abadc0 r vgpr_init_compute_shader_aldebaran +ffffffff82abb6a0 r gfx_v9_4_2_edc_counter_regs +ffffffff82abba20 r gfx_v9_4_2_ras_fields +ffffffff82abd3c0 r gfx_v9_4_2_utc_blocks +ffffffff82abe000 R gfxhub_v1_0_funcs +ffffffff82abf000 R gfxhub_v2_0_funcs +ffffffff82abf060 r gfxhub_v2_0_vmhub_funcs ffffffff82abf070 r gfxhub_client_ids -ffffffff82ac0000 R gfxhub_v3_0_3_funcs -ffffffff82ac0060 r gfxhub_v3_0_3_vmhub_funcs +ffffffff82ac0000 R gfxhub_v2_1_funcs +ffffffff82ac0060 r gfxhub_v2_1_vmhub_funcs ffffffff82ac0070 r gfxhub_client_ids -ffffffff82ac1000 R gmc_v10_0_ip_funcs -ffffffff82ac10a0 R gmc_v10_0_ip_block -ffffffff82ac10b8 r gmc_v10_0_gmc_funcs -ffffffff82ac1100 r gmc_v10_0_irq_funcs -ffffffff82ac1110 r gmc_v10_0_ecc_funcs -ffffffff82ac2000 R gmc_v11_0_ip_funcs -ffffffff82ac20a0 R gmc_v11_0_ip_block -ffffffff82ac20b8 r gmc_v11_0_gmc_funcs -ffffffff82ac2100 r gmc_v11_0_irq_funcs -ffffffff82ac2110 r gmc_v11_0_ecc_funcs -ffffffff82ac3000 r gmc_v7_0_ip_funcs -ffffffff82ac30a0 R gmc_v7_0_ip_block -ffffffff82ac30b8 R gmc_v7_4_ip_block -ffffffff82ac30d0 r gmc_v7_0_gmc_funcs -ffffffff82ac3118 r gmc_v7_0_irq_funcs -ffffffff82ac3128 r iceland_mgcg_cgcg_init -ffffffff82ac3140 r golden_settings_iceland_a11 -ffffffff82ac3170 r mc_cg_registers -ffffffff82ac31a0 r mc_cg_en -ffffffff82ac31d0 r mc_cg_ls_en -ffffffff82ac4000 r gmc_v8_0_ip_funcs -ffffffff82ac40a0 R gmc_v8_0_ip_block -ffffffff82ac40b8 R gmc_v8_1_ip_block -ffffffff82ac40d0 R gmc_v8_5_ip_block -ffffffff82ac40e8 r gmc_v8_0_gmc_funcs -ffffffff82ac4130 r gmc_v8_0_irq_funcs -ffffffff82ac4140 r fiji_mgcg_cgcg_init -ffffffff82ac4150 r golden_settings_fiji_a10 -ffffffff82ac4180 r tonga_mgcg_cgcg_init -ffffffff82ac4190 r golden_settings_tonga_a11 -ffffffff82ac41f0 r golden_settings_polaris11_a11 -ffffffff82ac4220 r golden_settings_polaris10_a11 -ffffffff82ac425c r cz_mgcg_cgcg_init -ffffffff82ac4270 r stoney_mgcg_cgcg_init -ffffffff82ac4290 r golden_settings_stoney_common -ffffffff82ac5000 R gmc_v9_0_ip_funcs -ffffffff82ac50a0 R gmc_v9_0_ip_block -ffffffff82ac50b8 r gmc_v9_0_gmc_funcs -ffffffff82ac5100 r gmc_v9_0_irq_funcs -ffffffff82ac5110 r gmc_v9_0_ecc_funcs -ffffffff82ac5120 r gfxhub_client_ids -ffffffff82ac5190 r mmhub_client_ids_vega10 -ffffffff82ac5480 r mmhub_client_ids_vega12 -ffffffff82ac5780 r mmhub_client_ids_vega20 -ffffffff82ac5a70 r mmhub_client_ids_arcturus -ffffffff82ac7280 r mmhub_client_ids_raven -ffffffff82ac7440 r mmhub_client_ids_renoir -ffffffff82ac7630 r mmhub_client_ids_aldebaran -ffffffff82ac8e40 r ecc_umc_mcumc_ctrl_addrs -ffffffff82ac8ec0 r ecc_umc_mcumc_ctrl_mask_addrs -ffffffff82ac8f40 r golden_settings_mmhub_1_0_0 -ffffffff82ac8f70 r golden_settings_athub_1_0_0 -ffffffff82ac9000 R hdp_v4_0_funcs -ffffffff82aca000 R hdp_v5_0_funcs -ffffffff82acb000 R hdp_v5_2_funcs -ffffffff82acc000 R hdp_v6_0_funcs -ffffffff82acd000 r iceland_ih_ip_funcs -ffffffff82acd0a0 R iceland_ih_ip_block -ffffffff82acd0b8 r iceland_ih_funcs -ffffffff82ace000 r ih_v6_0_ip_funcs -ffffffff82ace0a0 R ih_v6_0_ip_block -ffffffff82ace0b8 r ih_v6_0_funcs -ffffffff82ace0d8 r ih_v6_0_self_irq_funcs -ffffffff82acf000 R gfx_v11_0_imu_funcs -ffffffff82acf030 r imu_rlc_ram_golden_11 -ffffffff82acf680 r imu_rlc_ram_golden_11_0_2 -ffffffff82ad0000 r imu_rlc_ram_golden_11_0_3 -ffffffff82ad1000 r jpeg_v1_0_decode_ring_vm_funcs -ffffffff82ad1120 r jpeg_v1_0_irq_funcs -ffffffff82ad2000 r jpeg_v2_0_ip_funcs -ffffffff82ad20a0 R jpeg_v2_0_ip_block -ffffffff82ad20b8 r jpeg_v2_0_dec_ring_vm_funcs -ffffffff82ad21d8 r jpeg_v2_0_irq_funcs -ffffffff82ad3000 r jpeg_v2_5_ip_funcs -ffffffff82ad30a0 R jpeg_v2_5_ip_block -ffffffff82ad30b8 r jpeg_v2_6_ip_funcs -ffffffff82ad3158 R jpeg_v2_6_ip_block -ffffffff82ad3170 R jpeg_v2_6_ras_hw_ops -ffffffff82ad31b0 r jpeg_v2_5_dec_ring_vm_funcs -ffffffff82ad32d0 r jpeg_v2_6_dec_ring_vm_funcs -ffffffff82ad33f0 r jpeg_v2_5_irq_funcs -ffffffff82ad4000 r jpeg_v3_0_ip_funcs -ffffffff82ad40a0 R jpeg_v3_0_ip_block -ffffffff82ad40b8 r jpeg_v3_0_dec_ring_vm_funcs -ffffffff82ad41d8 r jpeg_v3_0_irq_funcs -ffffffff82ad5000 r jpeg_v4_0_ip_funcs -ffffffff82ad50a0 R jpeg_v4_0_ip_block -ffffffff82ad50b8 r jpeg_v4_0_dec_ring_vm_funcs -ffffffff82ad51d8 r jpeg_v4_0_irq_funcs -ffffffff82ad6000 R lsdma_v6_0_funcs -ffffffff82ad7000 R mca_v3_0_mp0_hw_ops -ffffffff82ad7040 R mca_v3_0_mp1_hw_ops -ffffffff82ad7080 R mca_v3_0_mpio_hw_ops -ffffffff82ad70c0 R mca_v3_0_funcs -ffffffff82ad8000 r mes_v10_1_ip_funcs -ffffffff82ad80a0 R mes_v10_1_ip_block -ffffffff82ad80b8 r mes_v10_1_funcs -ffffffff82ad80e8 r mes_v10_1_ring_funcs -ffffffff82ad9000 r mes_v11_0_ip_funcs -ffffffff82ad90a0 R mes_v11_0_ip_block -ffffffff82ad90b8 r mes_v11_0_funcs -ffffffff82ad90e8 r mes_v11_0_ring_funcs -ffffffff82ada000 R mmhub_v1_0_funcs -ffffffff82ada050 r mmhub_v1_0_edc_cnt_regs -ffffffff82ada0c0 r mmhub_v1_0_ras_fields -ffffffff82adb000 R mmhub_v1_7_funcs -ffffffff82adb050 r mmhub_v1_7_edc_cnt_regs -ffffffff82adb250 r mmhub_v1_7_ras_fields -ffffffff82adc9c0 r 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jpeg_v2_0_irq_funcs +ffffffff82ad5000 r jpeg_v2_5_ip_funcs +ffffffff82ad50a0 R jpeg_v2_5_ip_block +ffffffff82ad50b8 r jpeg_v2_6_ip_funcs +ffffffff82ad5158 R jpeg_v2_6_ip_block +ffffffff82ad5170 R jpeg_v2_6_ras_hw_ops +ffffffff82ad51b0 r jpeg_v2_5_dec_ring_vm_funcs +ffffffff82ad52d0 r jpeg_v2_6_dec_ring_vm_funcs +ffffffff82ad53f0 r jpeg_v2_5_irq_funcs +ffffffff82ad6000 r jpeg_v3_0_ip_funcs +ffffffff82ad60a0 R jpeg_v3_0_ip_block +ffffffff82ad60b8 r jpeg_v3_0_dec_ring_vm_funcs +ffffffff82ad61d8 r jpeg_v3_0_irq_funcs +ffffffff82ad7000 r jpeg_v4_0_ip_funcs +ffffffff82ad70a0 R jpeg_v4_0_ip_block +ffffffff82ad70b8 r jpeg_v4_0_dec_ring_vm_funcs +ffffffff82ad71d8 r jpeg_v4_0_irq_funcs +ffffffff82ad8000 R lsdma_v6_0_funcs +ffffffff82ad9000 R mca_v3_0_mp0_hw_ops +ffffffff82ad9040 R mca_v3_0_mp1_hw_ops +ffffffff82ad9080 R mca_v3_0_mpio_hw_ops +ffffffff82ad90c0 R mca_v3_0_funcs +ffffffff82ada000 r mes_v10_1_ip_funcs +ffffffff82ada0a0 R mes_v10_1_ip_block +ffffffff82ada0b8 r mes_v10_1_funcs +ffffffff82ada0e8 r mes_v10_1_ring_funcs +ffffffff82adb000 r mes_v11_0_ip_funcs +ffffffff82adb0a0 R mes_v11_0_ip_block +ffffffff82adb0b8 r mes_v11_0_funcs +ffffffff82adb0e8 r mes_v11_0_ring_funcs +ffffffff82adc000 R mmhub_v1_0_funcs +ffffffff82adc050 r mmhub_v1_0_edc_cnt_regs +ffffffff82adc0c0 r mmhub_v1_0_ras_fields +ffffffff82add000 R mmhub_v1_7_funcs +ffffffff82add050 r mmhub_v1_7_edc_cnt_regs +ffffffff82add250 r mmhub_v1_7_ras_fields +ffffffff82ade9c0 r mmhub_v1_7_ea_err_status_regs +ffffffff82adf000 R mmhub_v2_0_funcs +ffffffff82adf050 r mmhub_v2_0_vmhub_funcs +ffffffff82adf060 r mmhub_client_ids_navi1x +ffffffff82adf190 r mmhub_client_ids_sienna_cichlid +ffffffff82adf450 r mmhub_client_ids_beige_goby +ffffffff82ae0000 R mmhub_v2_3_funcs +ffffffff82ae0050 r mmhub_v2_3_vmhub_funcs +ffffffff82ae0060 r mmhub_client_ids_vangogh +ffffffff82ae1000 R mmhub_v3_0_funcs +ffffffff82ae1050 r mmhub_v3_0_vmhub_funcs +ffffffff82ae1060 r mmhub_client_ids_v3_0_0 +ffffffff82ae2000 R mmhub_v3_0_1_funcs +ffffffff82ae2050 r mmhub_v3_0_1_vmhub_funcs +ffffffff82ae2060 r mmhub_client_ids_v3_0_1 +ffffffff82ae3000 R mmhub_v3_0_2_funcs +ffffffff82ae3050 r mmhub_v3_0_2_vmhub_funcs +ffffffff82ae3060 r mmhub_client_ids_v3_0_2 +ffffffff82ae4000 R mmhub_v9_4_ras_hw_ops +ffffffff82ae4040 R mmhub_v9_4_funcs +ffffffff82ae4090 r mmhub_v9_4_edc_cnt_regs +ffffffff82ae4330 r mmhub_v9_4_ras_fields +ffffffff82ae63b0 r mmhub_v9_4_err_status_regs +ffffffff82ae7000 r xgpu_ai_mailbox_ack_irq_funcs +ffffffff82ae7010 r xgpu_ai_mailbox_rcv_irq_funcs +ffffffff82ae7020 R xgpu_ai_virt_ops +ffffffff82ae8000 r xgpu_nv_mailbox_ack_irq_funcs +ffffffff82ae8010 r xgpu_nv_mailbox_rcv_irq_funcs +ffffffff82ae8020 R xgpu_nv_virt_ops +ffffffff82ae9000 r xgpu_fiji_mgcg_cgcg_init +ffffffff82ae9240 r xgpu_fiji_golden_settings_a10 +ffffffff82ae9370 r xgpu_fiji_golden_common_all +ffffffff82ae93f0 r xgpu_tonga_mgcg_cgcg_init +ffffffff82ae9810 r xgpu_tonga_golden_settings_a11 +ffffffff82ae99d0 r xgpu_tonga_golden_common_all +ffffffff82ae9a28 r xgpu_vi_mailbox_ack_irq_funcs +ffffffff82ae9a38 r xgpu_vi_mailbox_rcv_irq_funcs +ffffffff82ae9a48 R xgpu_vi_virt_ops +ffffffff82aea000 r navi10_ih_ip_funcs +ffffffff82aea0a0 R navi10_ih_ip_block +ffffffff82aea0b8 r navi10_ih_funcs +ffffffff82aea0d8 r navi10_ih_self_irq_funcs +ffffffff82aeb000 R nbio_v2_3_hdp_flush_reg +ffffffff82aeb048 R nbio_v2_3_funcs +ffffffff82aec000 R nbio_v4_3_hdp_flush_reg +ffffffff82aec048 R nbio_v4_3_funcs +ffffffff82aec130 R nbio_v4_3_sriov_funcs +ffffffff82aed000 R nbio_v6_1_hdp_flush_reg +ffffffff82aed048 R nbio_v6_1_funcs +ffffffff82aee000 R nbio_v7_0_hdp_flush_reg +ffffffff82aee048 R nbio_v7_0_funcs +ffffffff82aef000 R nbio_v7_2_hdp_flush_reg +ffffffff82aef048 R nbio_v7_2_funcs +ffffffff82af0000 R nbio_v7_4_hdp_flush_reg +ffffffff82af0048 R nbio_v7_4_ras_hw_ops +ffffffff82af0088 R nbio_v7_4_funcs +ffffffff82af0170 r nbio_v7_4_ras_controller_irq_funcs +ffffffff82af0180 r nbio_v7_4_ras_err_event_athub_irq_funcs +ffffffff82af1000 R nbio_v7_7_hdp_flush_reg +ffffffff82af1048 R nbio_v7_7_funcs +ffffffff82af2000 r nv_common_ip_funcs +ffffffff82af20a0 R nv_common_ip_block +ffffffff82af20b8 r nv_asic_funcs +ffffffff82af2170 r nv_allowed_read_registers +ffffffff82af22f0 r nv_video_codecs_encode +ffffffff82af2300 r sc_video_codecs_decode +ffffffff82af2310 r yc_video_codecs_decode +ffffffff82af2320 r bg_video_codecs_encode +ffffffff82af2330 r bg_video_codecs_decode +ffffffff82af2340 r nv_video_codecs_decode +ffffffff82af2350 r nv_video_codecs_encode_array +ffffffff82af2380 r sc_video_codecs_decode_array +ffffffff82af2420 r yc_video_codecs_decode_array +ffffffff82af2490 r bg_video_codecs_decode_array +ffffffff82af24d0 r nv_video_codecs_decode_array +ffffffff82af3000 r psp_v10_0_funcs +ffffffff82af4000 r psp_v11_0_funcs +ffffffff82af5000 r psp_v11_0_8_funcs +ffffffff82af6000 r psp_v12_0_funcs +ffffffff82af7000 r psp_v13_0_funcs +ffffffff82af8000 r psp_v13_0_4_funcs +ffffffff82af9000 r psp_v3_1_funcs +ffffffff82afa000 r sdma_v2_4_ip_funcs +ffffffff82afa0a0 R sdma_v2_4_ip_block +ffffffff82afa0b8 r sdma_v2_4_ring_funcs +ffffffff82afa1d8 r sdma_v2_4_buffer_funcs +ffffffff82afa1f8 r sdma_v2_4_vm_pte_funcs +ffffffff82afa218 r sdma_v2_4_trap_irq_funcs +ffffffff82afa228 r sdma_v2_4_illegal_inst_irq_funcs +ffffffff82afa240 r iceland_mgcg_cgcg_init +ffffffff82afa260 r golden_settings_iceland_a11 +ffffffff82afb000 r sdma_v3_0_ip_funcs +ffffffff82afb0a0 R sdma_v3_0_ip_block +ffffffff82afb0b8 R sdma_v3_1_ip_block +ffffffff82afb0d0 r sdma_v3_0_ring_funcs +ffffffff82afb1f0 r sdma_v3_0_buffer_funcs +ffffffff82afb210 r sdma_v3_0_vm_pte_funcs +ffffffff82afb230 r sdma_v3_0_trap_irq_funcs +ffffffff82afb240 r sdma_v3_0_illegal_inst_irq_funcs +ffffffff82afb250 r fiji_mgcg_cgcg_init +ffffffff82afb270 r golden_settings_fiji_a10 +ffffffff82afb2d0 r tonga_mgcg_cgcg_init +ffffffff82afb2f0 r golden_settings_tonga_a11 +ffffffff82afb370 r golden_settings_polaris11_a11 +ffffffff82afb3f0 r golden_settings_polaris10_a11 +ffffffff82afb470 r cz_mgcg_cgcg_init +ffffffff82afb490 r cz_golden_settings_a11 +ffffffff82afb520 r stoney_mgcg_cgcg_init +ffffffff82afb530 r stoney_golden_settings_a11 +ffffffff82afc000 R sdma_v4_0_ip_funcs +ffffffff82afc0a0 R sdma_v4_0_ras_hw_ops +ffffffff82afc0e0 R sdma_v4_0_ip_block +ffffffff82afc0f8 r sdma_v4_0_ring_funcs_2nd_mmhub +ffffffff82afc218 r sdma_v4_0_ring_funcs +ffffffff82afc338 r sdma_v4_0_page_ring_funcs_2nd_mmhub +ffffffff82afc458 r sdma_v4_0_page_ring_funcs +ffffffff82afc578 r sdma_v4_0_buffer_funcs +ffffffff82afc598 r sdma_v4_0_vm_pte_funcs +ffffffff82afc5b8 r sdma_v4_0_trap_irq_funcs +ffffffff82afc5c8 r sdma_v4_0_illegal_inst_irq_funcs +ffffffff82afc5d8 r sdma_v4_0_ecc_irq_funcs +ffffffff82afc5e8 r sdma_v4_0_vm_hole_irq_funcs +ffffffff82afc5f8 r sdma_v4_0_doorbell_invalid_irq_funcs +ffffffff82afc608 r sdma_v4_0_pool_timeout_irq_funcs +ffffffff82afc618 r sdma_v4_0_srbm_write_irq_funcs +ffffffff82afc630 r golden_settings_sdma_4 +ffffffff82afc890 r golden_settings_sdma_vg10 +ffffffff82afc940 r golden_settings_sdma_vg12 +ffffffff82afc9f0 r golden_settings_sdma0_4_2_init +ffffffff82afca10 r golden_settings_sdma0_4_2 +ffffffff82afcca0 r golden_settings_sdma1_4_2 +ffffffff82afcf30 r golden_settings_sdma_arct +ffffffff82afd230 r golden_settings_sdma_aldebaran +ffffffff82afd3a0 r golden_settings_sdma_4_1 +ffffffff82afd4b0 r golden_settings_sdma_rv2 +ffffffff82afd4e0 r golden_settings_sdma_rv1 +ffffffff82afd510 r golden_settings_sdma_4_3 +ffffffff82afd600 r sdma_v4_0_ras_fields +ffffffff82afe000 R sdma_v4_4_ras_hw_ops +ffffffff82afe040 r sdma_v4_4_ras_fields +ffffffff82aff000 R sdma_v5_0_ip_funcs +ffffffff82aff0a0 R sdma_v5_0_ip_block +ffffffff82aff0b8 r sdma_v5_0_ring_funcs +ffffffff82aff1d8 r sdma_v5_0_buffer_funcs +ffffffff82aff1f8 r sdma_v5_0_vm_pte_funcs +ffffffff82aff218 r sdma_v5_0_trap_irq_funcs +ffffffff82aff228 r sdma_v5_0_illegal_inst_irq_funcs +ffffffff82aff240 r golden_settings_sdma_5 +ffffffff82aff480 r golden_settings_sdma_nv10 +ffffffff82aff4b0 r golden_settings_sdma_nv14 +ffffffff82aff4e0 r golden_settings_sdma_5_sriov +ffffffff82aff6c0 r golden_settings_sdma_nv12 +ffffffff82aff750 r golden_settings_sdma_cyan_skillfish +ffffffff82b00000 R sdma_v5_2_ip_funcs +ffffffff82b000a0 R sdma_v5_2_ip_block +ffffffff82b000b8 r sdma_v5_2_ring_funcs +ffffffff82b001d8 r sdma_v5_2_buffer_funcs +ffffffff82b001f8 r sdma_v5_2_vm_pte_funcs +ffffffff82b00218 r sdma_v5_2_trap_irq_funcs +ffffffff82b00228 r sdma_v5_2_illegal_inst_irq_funcs +ffffffff82b01000 R sdma_v6_0_ip_funcs +ffffffff82b010a0 R sdma_v6_0_ip_block +ffffffff82b010b8 r sdma_v6_0_ring_funcs +ffffffff82b011d8 r sdma_v6_0_buffer_funcs +ffffffff82b011f8 r sdma_v6_0_vm_pte_funcs +ffffffff82b01218 r sdma_v6_0_trap_irq_funcs +ffffffff82b01228 r sdma_v6_0_illegal_inst_irq_funcs +ffffffff82b02000 r smu_v11_0_i2c_algo +ffffffff82b02010 r smu_v11_0_i2c_i2c_lock_ops +ffffffff82b02028 r smu_v11_0_i2c_control_quirks +ffffffff82b03000 R smuio_v11_0_funcs +ffffffff82b04000 R smuio_v11_0_6_funcs +ffffffff82b05000 R smuio_v13_0_funcs +ffffffff82b06000 R smuio_v13_0_6_funcs +ffffffff82b07000 R smuio_v9_0_funcs +ffffffff82b08000 r soc15_common_ip_funcs +ffffffff82b080a0 R vega10_common_ip_block +ffffffff82b080b8 r soc15_asic_funcs +ffffffff82b08170 r vega20_asic_funcs +ffffffff82b08230 r soc15_allowed_read_registers +ffffffff82b083c0 r vega_video_codecs_encode +ffffffff82b083d0 r vega_video_codecs_decode +ffffffff82b083e0 r rv_video_codecs_decode +ffffffff82b083f0 r rn_video_codecs_decode +ffffffff82b08400 r vega_video_codecs_encode_array +ffffffff82b08430 r vega_video_codecs_decode_array +ffffffff82b084b0 r rv_video_codecs_decode_array +ffffffff82b08540 r rn_video_codecs_decode_array +ffffffff82b09000 r soc21_common_ip_funcs +ffffffff82b090a0 R soc21_common_ip_block +ffffffff82b090b8 r soc21_asic_funcs +ffffffff82b09170 r soc21_allowed_read_registers +ffffffff82b092f0 r vcn_4_0_0_video_codecs_encode_vcn1 +ffffffff82b09300 r vcn_4_0_0_video_codecs_decode_vcn1 +ffffffff82b09310 r vcn_4_0_0_video_codecs_encode_vcn0 +ffffffff82b09320 r vcn_4_0_0_video_codecs_decode_vcn0 +ffffffff82b09330 r vcn_4_0_0_video_codecs_encode_array_vcn1 +ffffffff82b09360 r vcn_4_0_0_video_codecs_decode_array_vcn1 +ffffffff82b093b0 r vcn_4_0_0_video_codecs_encode_array_vcn0 +ffffffff82b093e0 r vcn_4_0_0_video_codecs_decode_array_vcn0 +ffffffff82b0a000 r tonga_ih_ip_funcs +ffffffff82b0a0a0 R tonga_ih_ip_block +ffffffff82b0a0b8 r tonga_ih_funcs +ffffffff82b0b000 R umc_v6_0_funcs +ffffffff82b0c000 R umc_v6_1_channel_idx_tbl +ffffffff82b0c080 R umc_v6_1_ras_hw_ops +ffffffff82b0d000 R umc_v6_7_channel_idx_tbl_second +ffffffff82b0d080 R umc_v6_7_channel_idx_tbl_first +ffffffff82b0d100 R umc_v6_7_ras_hw_ops +ffffffff82b0e000 R umc_v8_10_channelnum_map_colbit_table +ffffffff82b0e040 R umc_v8_10_channel_idx_tbl +ffffffff82b0e0a0 R umc_v8_10_ras_hw_ops +ffffffff82b0f000 R umc_v8_7_channel_idx_tbl +ffffffff82b0f040 R umc_v8_7_ras_hw_ops +ffffffff82b10000 r uvd_v5_0_ip_funcs +ffffffff82b100a0 R uvd_v5_0_ip_block +ffffffff82b100b8 r uvd_v5_0_ring_funcs +ffffffff82b101d8 r uvd_v5_0_irq_funcs +ffffffff82b11000 r uvd_v6_0_ip_funcs +ffffffff82b110a0 R uvd_v6_0_ip_block +ffffffff82b110b8 R uvd_v6_2_ip_block +ffffffff82b110d0 R uvd_v6_3_ip_block +ffffffff82b110e8 r uvd_v6_0_ring_vm_funcs +ffffffff82b11208 r uvd_v6_0_ring_phys_funcs +ffffffff82b11328 r uvd_v6_0_enc_ring_vm_funcs +ffffffff82b11448 r uvd_v6_0_irq_funcs +ffffffff82b12000 R uvd_v7_0_ip_funcs +ffffffff82b120a0 R uvd_v7_0_ip_block +ffffffff82b120b8 r uvd_v7_0_ring_vm_funcs +ffffffff82b121d8 r uvd_v7_0_enc_ring_vm_funcs +ffffffff82b122f8 r uvd_v7_0_irq_funcs +ffffffff82b13000 r vce_v3_0_ip_funcs +ffffffff82b130a0 R vce_v3_0_ip_block +ffffffff82b130b8 R vce_v3_1_ip_block +ffffffff82b130d0 R vce_v3_4_ip_block +ffffffff82b130e8 r vce_v3_0_ring_vm_funcs +ffffffff82b13208 r vce_v3_0_ring_phys_funcs +ffffffff82b13328 r vce_v3_0_irq_funcs +ffffffff82b14000 R vce_v4_0_ip_funcs +ffffffff82b140a0 R vce_v4_0_ip_block +ffffffff82b140b8 r vce_v4_0_ring_vm_funcs +ffffffff82b141d8 r vce_v4_0_irq_funcs +ffffffff82b15000 r vcn_v1_0_ip_funcs +ffffffff82b150a0 R vcn_v1_0_ip_block +ffffffff82b150b8 r vcn_v1_0_dec_ring_vm_funcs +ffffffff82b151d8 r vcn_v1_0_enc_ring_vm_funcs +ffffffff82b152f8 r vcn_v1_0_irq_funcs +ffffffff82b16000 r vcn_v2_0_ip_funcs +ffffffff82b160a0 R vcn_v2_0_ip_block +ffffffff82b160b8 r vcn_v2_0_dec_ring_vm_funcs +ffffffff82b161d8 r vcn_v2_0_enc_ring_vm_funcs +ffffffff82b162f8 r vcn_v2_0_irq_funcs +ffffffff82b17000 r vcn_v2_5_ip_funcs +ffffffff82b170a0 R vcn_v2_5_ip_block +ffffffff82b170b8 r vcn_v2_6_ip_funcs +ffffffff82b17158 R vcn_v2_6_ip_block +ffffffff82b17170 R vcn_v2_6_ras_hw_ops +ffffffff82b171b0 r vcn_v2_5_dec_ring_vm_funcs +ffffffff82b172d0 r vcn_v2_6_dec_ring_vm_funcs +ffffffff82b173f0 r vcn_v2_5_enc_ring_vm_funcs +ffffffff82b17510 r vcn_v2_6_enc_ring_vm_funcs +ffffffff82b17630 r vcn_v2_5_irq_funcs +ffffffff82b18000 r vcn_v3_0_ip_funcs +ffffffff82b180a0 R vcn_v3_0_ip_block +ffffffff82b180b8 r vcn_v3_0_dec_ring_vm_funcs +ffffffff82b181d8 r vcn_v3_0_enc_ring_vm_funcs +ffffffff82b182f8 r vcn_v3_0_irq_funcs +ffffffff82b19000 r vcn_v4_0_ip_funcs +ffffffff82b190a0 R vcn_v4_0_ip_block +ffffffff82b190b8 r vcn_v4_0_unified_ring_vm_funcs +ffffffff82b191d8 r vcn_v4_0_irq_funcs +ffffffff82b1a000 R vega10_ih_ip_funcs +ffffffff82b1a0a0 R vega10_ih_ip_block +ffffffff82b1a0b8 r vega10_ih_funcs +ffffffff82b1a0d8 r vega10_ih_self_irq_funcs ffffffff82b1b000 r GC_BASE -ffffffff82b1b090 r HDP_BASE -ffffffff82b1b120 r MMHUB_BASE -ffffffff82b1b1b0 r ATHUB_BASE -ffffffff82b1b240 r NBIO_BASE -ffffffff82b1b2d0 r MP0_BASE -ffffffff82b1b360 r MP1_BASE -ffffffff82b1b3f0 r UVD_BASE -ffffffff82b1b480 r VCE_BASE -ffffffff82b1b510 r DF_BASE -ffffffff82b1b5a0 r DCE_BASE -ffffffff82b1b630 r OSSSYS_BASE -ffffffff82b1b6c0 r SDMA0_BASE -ffffffff82b1b750 r SDMA1_BASE -ffffffff82b1b7e0 r SMUIO_BASE -ffffffff82b1b870 r THM_BASE -ffffffff82b1b900 r CLK_BASE -ffffffff82b1b990 r UMC_BASE -ffffffff82b1ba20 r RSMU_BASE -ffffffff82b1c000 r vi_common_ip_block -ffffffff82b1c018 r vi_common_ip_funcs -ffffffff82b1c0b8 r vi_asic_funcs -ffffffff82b1c170 r vi_allowed_read_registers -ffffffff82b1c3d0 r topaz_video_codecs_encode -ffffffff82b1c3e0 r topaz_video_codecs_decode -ffffffff82b1c3f0 r tonga_video_codecs_encode -ffffffff82b1c400 r tonga_video_codecs_decode -ffffffff82b1c410 r polaris_video_codecs_encode -ffffffff82b1c420 r cz_video_codecs_decode -ffffffff82b1c430 r tonga_video_codecs_encode_array -ffffffff82b1c450 r tonga_video_codecs_decode_array -ffffffff82b1c4a0 r polaris_video_codecs_encode_array -ffffffff82b1c4d0 r cz_video_codecs_decode_array -ffffffff82b1c550 r iceland_mgcg_cgcg_init -ffffffff82b1c590 r fiji_mgcg_cgcg_init -ffffffff82b1c5f0 r tonga_mgcg_cgcg_init -ffffffff82b1c650 r cz_mgcg_cgcg_init -ffffffff82b1c690 r stoney_mgcg_cgcg_init -ffffffff82b1d000 r amdgpu_dm_funcs -ffffffff82b1d0a0 R dm_ip_block -ffffffff82b1d0b8 R amdgpu_dm_encoder_helper_funcs -ffffffff82b1d120 r dm_display_funcs -ffffffff82b1d180 r hpd_disconnect_quirk_table -ffffffff82b1def0 r amdgpu_dm_mode_funcs -ffffffff82b1df38 r amdgpu_dm_encoder_funcs -ffffffff82b1df58 r amdgpu_dm_connector_funcs -ffffffff82b1dfd0 r amdgpu_dm_connector_helper_funcs -ffffffff82b1e020 r amdgpu_dm_i2c_algo -ffffffff82b1e1f0 r add_fs_modes.common_rates -ffffffff82b1e220 r amdgpu_dm_backlight_ops -ffffffff82b1f000 r amdgpu_dm_crtc_funcs -ffffffff82b1f0c0 r amdgpu_dm_crtc_helper_funcs -ffffffff82b20000 r dm_dtn_log_begin.msg -ffffffff82b2000d r dm_dtn_log_end.msg -ffffffff82b20018 r SYNAPTICS_DEVICE_ID -ffffffff82b21000 r dm_crtc_irq_funcs -ffffffff82b21010 r dm_vline0_irq_funcs -ffffffff82b21020 r dm_dmub_outbox_irq_funcs -ffffffff82b21030 r dm_vupdate_irq_funcs -ffffffff82b21040 r dm_dmub_trace_irq_funcs -ffffffff82b21050 r dm_pageflip_irq_funcs -ffffffff82b21060 r dm_hpd_irq_funcs -ffffffff82b22000 r amdgpu_dm_encoder_funcs -ffffffff82b22020 r dm_mst_cbs -ffffffff82b22030 r dm_dp_mst_connector_funcs -ffffffff82b220a8 r dm_dp_mst_connector_helper_funcs -ffffffff82b23000 r dm_plane_funcs -ffffffff82b23068 r dm_plane_helper_funcs -ffffffff82b25000 r vbios_funcs -ffffffff82b26000 r vbios_funcs -ffffffff82b2b000 r command_table_helper_funcs -ffffffff82b2c000 r command_table_helper_funcs +ffffffff82b1b064 r HDP_BASE +ffffffff82b1b0c8 r MMHUB_BASE +ffffffff82b1b12c r ATHUB_BASE +ffffffff82b1b190 r NBIO_BASE +ffffffff82b1b1f4 r MP0_BASE +ffffffff82b1b258 r MP1_BASE +ffffffff82b1b2bc r VCE_BASE +ffffffff82b1b320 r VCN_BASE +ffffffff82b1b384 r DF_BASE +ffffffff82b1b3e8 r DCE_BASE +ffffffff82b1b44c r OSSSYS_BASE +ffffffff82b1b4b0 r SDMA0_BASE +ffffffff82b1b514 r SDMA1_BASE +ffffffff82b1b578 r SMUIO_BASE +ffffffff82b1b5dc r PWR_BASE +ffffffff82b1b640 r NBIF_BASE +ffffffff82b1b6a4 r THM_BASE +ffffffff82b1b708 r CLK_BASE +ffffffff82b1c000 R vega20_ih_ip_funcs +ffffffff82b1c0a0 R vega20_ih_ip_block +ffffffff82b1c0b8 r vega20_ih_funcs +ffffffff82b1c0d8 r vega20_ih_self_irq_funcs +ffffffff82b1d000 r GC_BASE +ffffffff82b1d090 r HDP_BASE +ffffffff82b1d120 r MMHUB_BASE +ffffffff82b1d1b0 r ATHUB_BASE +ffffffff82b1d240 r NBIO_BASE +ffffffff82b1d2d0 r MP0_BASE +ffffffff82b1d360 r MP1_BASE +ffffffff82b1d3f0 r UVD_BASE +ffffffff82b1d480 r VCE_BASE +ffffffff82b1d510 r DF_BASE +ffffffff82b1d5a0 r DCE_BASE +ffffffff82b1d630 r OSSSYS_BASE +ffffffff82b1d6c0 r SDMA0_BASE +ffffffff82b1d750 r SDMA1_BASE +ffffffff82b1d7e0 r SMUIO_BASE +ffffffff82b1d870 r THM_BASE +ffffffff82b1d900 r CLK_BASE +ffffffff82b1d990 r UMC_BASE +ffffffff82b1da20 r RSMU_BASE +ffffffff82b1e000 r vi_common_ip_block +ffffffff82b1e018 r vi_common_ip_funcs +ffffffff82b1e0b8 r vi_asic_funcs +ffffffff82b1e170 r vi_allowed_read_registers +ffffffff82b1e3d0 r topaz_video_codecs_encode +ffffffff82b1e3e0 r topaz_video_codecs_decode +ffffffff82b1e3f0 r tonga_video_codecs_encode +ffffffff82b1e400 r tonga_video_codecs_decode +ffffffff82b1e410 r polaris_video_codecs_encode +ffffffff82b1e420 r cz_video_codecs_decode +ffffffff82b1e430 r tonga_video_codecs_encode_array +ffffffff82b1e450 r tonga_video_codecs_decode_array +ffffffff82b1e4a0 r polaris_video_codecs_encode_array +ffffffff82b1e4d0 r cz_video_codecs_decode_array +ffffffff82b1e550 r iceland_mgcg_cgcg_init +ffffffff82b1e590 r fiji_mgcg_cgcg_init +ffffffff82b1e5f0 r tonga_mgcg_cgcg_init +ffffffff82b1e650 r cz_mgcg_cgcg_init +ffffffff82b1e690 r stoney_mgcg_cgcg_init +ffffffff82b1f000 r amdgpu_dm_funcs +ffffffff82b1f0a0 R dm_ip_block +ffffffff82b1f0b8 R amdgpu_dm_encoder_helper_funcs +ffffffff82b1f120 r dm_display_funcs +ffffffff82b1f180 r hpd_disconnect_quirk_table +ffffffff82b1fef0 r amdgpu_dm_mode_funcs +ffffffff82b1ff38 r amdgpu_dm_encoder_funcs +ffffffff82b1ff58 r amdgpu_dm_connector_funcs +ffffffff82b1ffd0 r amdgpu_dm_connector_helper_funcs +ffffffff82b20020 r amdgpu_dm_i2c_algo +ffffffff82b201f0 r add_fs_modes.common_rates +ffffffff82b20220 r amdgpu_dm_backlight_ops +ffffffff82b21000 r amdgpu_dm_crtc_funcs +ffffffff82b210c0 r amdgpu_dm_crtc_helper_funcs +ffffffff82b22000 r dm_dtn_log_begin.msg +ffffffff82b2200d r dm_dtn_log_end.msg +ffffffff82b22018 r SYNAPTICS_DEVICE_ID +ffffffff82b23000 r dm_crtc_irq_funcs +ffffffff82b23010 r dm_vline0_irq_funcs +ffffffff82b23020 r dm_dmub_outbox_irq_funcs +ffffffff82b23030 r dm_vupdate_irq_funcs +ffffffff82b23040 r dm_dmub_trace_irq_funcs +ffffffff82b23050 r dm_pageflip_irq_funcs +ffffffff82b23060 r dm_hpd_irq_funcs +ffffffff82b24000 r amdgpu_dm_encoder_funcs +ffffffff82b24020 r dm_mst_cbs +ffffffff82b24030 r dm_dp_mst_connector_funcs +ffffffff82b240a8 r dm_dp_mst_connector_helper_funcs +ffffffff82b25000 r dm_plane_funcs +ffffffff82b25068 r dm_plane_helper_funcs +ffffffff82b27000 r vbios_funcs +ffffffff82b28000 r vbios_funcs ffffffff82b2d000 r command_table_helper_funcs ffffffff82b2e000 r command_table_helper_funcs -ffffffff82b2f000 r dce80_max_clks_by_state -ffffffff82b2f028 r disp_clk_regs -ffffffff82b2f07c r disp_clk_shift -ffffffff82b2f088 r disp_clk_mask -ffffffff82b30000 r dce110_max_clks_by_state -ffffffff82b30028 r disp_clk_regs -ffffffff82b3007c r disp_clk_shift -ffffffff82b30088 r disp_clk_mask -ffffffff82b31000 r dce112_max_clks_by_state +ffffffff82b2f000 r command_table_helper_funcs +ffffffff82b30000 r command_table_helper_funcs +ffffffff82b31000 r dce80_max_clks_by_state ffffffff82b31028 r disp_clk_regs ffffffff82b3107c r disp_clk_shift ffffffff82b31088 r disp_clk_mask -ffffffff82b32000 r dce120_max_clks_by_state -ffffffff82b33000 r clk_mgr_regs -ffffffff82b33054 r clk_mgr_shift -ffffffff82b33060 r clk_mgr_mask -ffffffff82b34000 r clk_mgr_regs -ffffffff82b34054 r clk_mgr_shift -ffffffff82b34060 r clk_mgr_mask +ffffffff82b32000 r dce110_max_clks_by_state +ffffffff82b32028 r disp_clk_regs +ffffffff82b3207c r disp_clk_shift +ffffffff82b32088 r disp_clk_mask +ffffffff82b33000 r dce112_max_clks_by_state +ffffffff82b33028 r disp_clk_regs +ffffffff82b3307c r disp_clk_shift +ffffffff82b33088 r disp_clk_mask +ffffffff82b34000 r dce120_max_clks_by_state ffffffff82b35000 r clk_mgr_regs ffffffff82b35054 r clk_mgr_shift ffffffff82b35060 r clk_mgr_mask -ffffffff82b36000 r lpddr5_wm_table -ffffffff82b360c0 r ddr5_wm_table -ffffffff82b37000 r lpddr5_wm_table -ffffffff82b370c0 r ddr5_wm_table +ffffffff82b36000 r clk_mgr_regs +ffffffff82b36054 r clk_mgr_shift +ffffffff82b36060 r clk_mgr_mask +ffffffff82b37000 r clk_mgr_regs +ffffffff82b37054 r clk_mgr_shift +ffffffff82b37060 r clk_mgr_mask ffffffff82b38000 r lpddr5_wm_table ffffffff82b380c0 r ddr5_wm_table ffffffff82b39000 r lpddr5_wm_table -ffffffff82b390c0 r ddr4_wm_table -ffffffff82b3a000 r clk_mgr_regs_dcn321 -ffffffff82b3a054 r clk_mgr_shift_dcn321 -ffffffff82b3a060 r clk_mgr_mask_dcn321 -ffffffff82b3a084 r clk_mgr_regs_dcn32 -ffffffff82b3a0d8 r clk_mgr_shift_dcn32 -ffffffff82b3a0e4 r clk_mgr_mask_dcn32 -ffffffff82b3b000 r DC_BUILD_ID -ffffffff82b3d000 r output_csc_matrix -ffffffff82b3d0e0 r black_color_format -ffffffff82b3e000 r DP_SINK_BRANCH_DEV_NAME_7580 -ffffffff82b3f000 r DP_VGA_DONGLE_BRANCH_DEV_NAME -ffffffff82b3f006 r DP_DVI_CONVERTER_ID_4 -ffffffff82b3f00d r DP_DVI_CONVERTER_ID_5 -ffffffff82b40000 r DP_VGA_LVDS_CONVERTER_ID_2 -ffffffff82b40007 r DP_VGA_LVDS_CONVERTER_ID_3 -ffffffff82b40010 r dp_lt_fallbacks -ffffffff82b41000 r mandatory_dpcd_partitions -ffffffff82b43000 r dce_funcs -ffffffff82b44000 r funcs -ffffffff82b45000 R video_optimized_pixel_rates -ffffffff82b451b0 r dce110_clk_src_funcs -ffffffff82b451d8 r dce112_clk_src_funcs -ffffffff82b45200 r dcn20_clk_src_funcs -ffffffff82b45228 r dcn3_clk_src_funcs -ffffffff82b45250 r dcn31_clk_src_funcs -ffffffff82b46000 r dce_funcs -ffffffff82b46068 r dcn10_funcs -ffffffff82b460d0 r dcn20_funcs -ffffffff82b46138 r dcn21_funcs -ffffffff82b47000 r dce_ipp_funcs -ffffffff82b48000 r dce110_lnk_enc_funcs -ffffffff82b49000 r dce_mi_funcs -ffffffff82b49090 r dce112_mi_funcs -ffffffff82b49120 r dce120_mi_funcs -ffffffff82b491b0 r pte_settings -ffffffff82b4a000 r funcs -ffffffff82b4b000 r dce_link_panel_cntl_funcs -ffffffff82b4c000 r filter_3tap_16p_upscale -ffffffff82b4c040 r filter_3tap_16p_116 -ffffffff82b4c080 r filter_3tap_16p_149 -ffffffff82b4c0c0 r filter_3tap_16p_183 -ffffffff82b4c100 r filter_3tap_64p_upscale -ffffffff82b4c1d0 r filter_3tap_64p_116 -ffffffff82b4c2a0 r filter_3tap_64p_149 -ffffffff82b4c370 r filter_3tap_64p_183 -ffffffff82b4c440 r filter_4tap_16p_upscale -ffffffff82b4c490 r filter_4tap_16p_116 -ffffffff82b4c4e0 r filter_4tap_16p_149 -ffffffff82b4c530 r filter_4tap_16p_183 -ffffffff82b4c580 r filter_4tap_64p_upscale -ffffffff82b4c690 r filter_4tap_64p_116 -ffffffff82b4c7a0 r filter_4tap_64p_149 -ffffffff82b4c8b0 r filter_4tap_64p_183 -ffffffff82b4c9c0 r filter_5tap_64p_upscale -ffffffff82b4cb10 r filter_5tap_64p_116 -ffffffff82b4cc60 r filter_5tap_64p_149 -ffffffff82b4cdb0 r filter_5tap_64p_183 -ffffffff82b4cf00 r filter_6tap_64p_upscale -ffffffff82b4d090 r filter_6tap_64p_116 -ffffffff82b4d220 r filter_6tap_64p_149 -ffffffff82b4d3b0 r filter_6tap_64p_183 -ffffffff82b4d540 r filter_7tap_64p_upscale -ffffffff82b4d710 r filter_7tap_64p_116 -ffffffff82b4d8e0 r filter_7tap_64p_149 -ffffffff82b4dab0 r filter_7tap_64p_183 -ffffffff82b4dc80 r filter_8tap_64p_upscale -ffffffff82b4de90 r filter_8tap_64p_116 -ffffffff82b4e0a0 r filter_8tap_64p_149 -ffffffff82b4e2b0 r filter_8tap_64p_183 -ffffffff82b4e4c0 r filter_2tap_16p -ffffffff82b4e4f0 r filter_2tap_64p -ffffffff82b4f000 r audio_clock_info_table_48bpc -ffffffff82b4f190 r audio_clock_info_table_36bpc -ffffffff82b4f320 r audio_clock_info_table -ffffffff82b4f4e0 r dce110_str_enc_funcs -ffffffff82b50000 r global_color_matrix -ffffffff82b500a8 r dce_transform_funcs -ffffffff82b51000 r abm_funcs -ffffffff82b52000 r psr_funcs -ffffffff82b52040 r DP_SINK_DEVICE_STR_ID_1 -ffffffff82b52045 r DP_SINK_DEVICE_STR_ID_2 -ffffffff82b53000 r reg_offsets -ffffffff82b54000 r bios_regs -ffffffff82b54008 r res_cap -ffffffff82b54050 r clk_src_regs -ffffffff82b5414c r dmcu_regs -ffffffff82b541a8 r dmcu_shift -ffffffff82b541bc r dmcu_mask -ffffffff82b54208 r abm_regs -ffffffff82b54248 r abm_shift -ffffffff82b5425c r abm_mask -ffffffff82b542b0 r dce100_tg_offsets -ffffffff82b542f8 r plane_cap -ffffffff82b54328 r res_create_funcs -ffffffff82b54358 r dce100_res_pool_funcs -ffffffff82b54440 r panel_cntl_regs -ffffffff82b54460 r panel_cntl_shift -ffffffff82b54470 r panel_cntl_mask -ffffffff82b544b0 r link_enc_regs -ffffffff82b54870 r link_enc_aux_regs -ffffffff82b548c0 r link_enc_hpd_regs -ffffffff82b548d8 r link_enc_feature -ffffffff82b548e8 r cs_shift -ffffffff82b548f4 r cs_mask -ffffffff82b54920 r mi_regs -ffffffff82b54c38 r mi_shifts -ffffffff82b54c80 r mi_masks -ffffffff82b54da0 r ipp_regs -ffffffff82b54f98 r ipp_shift -ffffffff82b54fc0 r ipp_mask -ffffffff82b55060 r xfm_regs -ffffffff82b55600 r xfm_shift -ffffffff82b55660 r xfm_mask -ffffffff82b557e0 r opp_regs -ffffffff82b55930 r opp_shift -ffffffff82b5595c r opp_mask -ffffffff82b55a10 r aux_engine_regs -ffffffff82b55b00 r aux_mask -ffffffff82b55b60 r aux_shift -ffffffff82b55b80 r i2c_hw_regs -ffffffff82b55cd0 r i2c_shifts -ffffffff82b55cfc r i2c_masks -ffffffff82b55da0 r audio_regs -ffffffff82b55ed4 r audio_shift -ffffffff82b55eec r audio_mask -ffffffff82b55f30 r stream_enc_regs -ffffffff82b565dc r se_shift -ffffffff82b56660 r se_mask -ffffffff82b56864 r hwseq_reg -ffffffff82b56a80 r hwseq_shift -ffffffff82b56b00 r hwseq_mask -ffffffff82b57000 r reg_offsets -ffffffff82b57018 r dce110_compressor_funcs -ffffffff82b58000 r dce110_funcs -ffffffff82b582c0 r dce110_private_funcs -ffffffff82b59000 r dce110_mem_input_v_funcs -ffffffff82b59090 r dvmm_Hw_Setting_1DTiling -ffffffff82b59120 r dvmm_Hw_Setting_2DTiling -ffffffff82b591b0 r dvmm_Hw_Setting_Linear -ffffffff82b5a000 r global_color_matrix -ffffffff82b5a0b0 r input_csc_matrix -ffffffff82b5b000 r funcs -ffffffff82b5c000 r bios_regs -ffffffff82b5c008 r dce110_res_pool_funcs -ffffffff82b5c0f0 r clk_src_regs -ffffffff82b5c1ec r dmcu_regs -ffffffff82b5c248 r dmcu_shift -ffffffff82b5c25c r dmcu_mask -ffffffff82b5c2a8 r abm_regs -ffffffff82b5c2e8 r abm_shift -ffffffff82b5c2fc r abm_mask -ffffffff82b5c350 r dce110_tg_offsets -ffffffff82b5c398 r res_create_funcs -ffffffff82b5c3c8 r plane_cap -ffffffff82b5c3f4 r underlay_plane_cap -ffffffff82b5c420 r stoney_resource_cap -ffffffff82b5c45c r carrizo_resource_cap -ffffffff82b5c4a0 r panel_cntl_regs -ffffffff82b5c4c0 r panel_cntl_shift -ffffffff82b5c4d0 r panel_cntl_mask -ffffffff82b5c510 r link_enc_regs -ffffffff82b5c8d0 r link_enc_aux_regs -ffffffff82b5c920 r link_enc_hpd_regs -ffffffff82b5c938 r link_enc_feature -ffffffff82b5c948 r cs_shift -ffffffff82b5c954 r cs_mask -ffffffff82b5c980 r mi_regs -ffffffff82b5cb0c r mi_shifts -ffffffff82b5cb54 r mi_masks -ffffffff82b5cc70 r ipp_regs -ffffffff82b5cd6c r ipp_shift -ffffffff82b5cd94 r ipp_mask -ffffffff82b5ce30 r xfm_regs -ffffffff82b5d100 r xfm_shift -ffffffff82b5d160 r xfm_mask -ffffffff82b5d2e0 r opp_regs -ffffffff82b5d430 r opp_shift -ffffffff82b5d45c r opp_mask -ffffffff82b5d510 r aux_engine_regs -ffffffff82b5d600 r aux_mask -ffffffff82b5d660 r aux_shift -ffffffff82b5d680 r i2c_hw_regs -ffffffff82b5d7d0 r i2c_shifts -ffffffff82b5d7fc r i2c_masks -ffffffff82b5d8a0 r audio_regs -ffffffff82b5d9d4 r audio_shift -ffffffff82b5d9ec r audio_mask -ffffffff82b5da30 r stream_enc_regs -ffffffff82b5dd0c r se_shift -ffffffff82b5dd90 r se_mask -ffffffff82b5df94 r hwseq_stoney_reg -ffffffff82b5e1b0 r hwseq_cz_reg -ffffffff82b5e3cc r hwseq_shift -ffffffff82b5e44c r hwseq_mask -ffffffff82b5f000 r dce110_tg_funcs -ffffffff82b60000 r dce110_tg_v_funcs -ffffffff82b61000 r dce110_xfmv_funcs -ffffffff82b62000 r reg_offsets -ffffffff82b63000 r reg_offsets -ffffffff82b64000 r bios_regs -ffffffff82b64010 r clk_src_regs -ffffffff82b64208 r dmcu_regs -ffffffff82b64264 r dmcu_shift -ffffffff82b64278 r dmcu_mask -ffffffff82b642c4 r abm_regs -ffffffff82b64304 r abm_shift -ffffffff82b64318 r abm_mask -ffffffff82b64360 r dce112_tg_offsets -ffffffff82b643a8 r res_create_funcs -ffffffff82b643d8 r plane_cap -ffffffff82b64404 r polaris_11_resource_cap -ffffffff82b64440 r polaris_10_resource_cap -ffffffff82b64480 r dce112_res_pool_funcs -ffffffff82b64570 r panel_cntl_regs -ffffffff82b64590 r panel_cntl_shift -ffffffff82b645a0 r panel_cntl_mask -ffffffff82b645e0 r link_enc_regs -ffffffff82b649a0 r link_enc_aux_regs -ffffffff82b649f0 r link_enc_hpd_regs -ffffffff82b64a08 r link_enc_feature -ffffffff82b64a18 r cs_shift -ffffffff82b64a24 r cs_mask -ffffffff82b64a50 r mi_regs -ffffffff82b64d68 r mi_shifts -ffffffff82b64db0 r mi_masks -ffffffff82b64ed0 r ipp_regs -ffffffff82b650c8 r ipp_shift -ffffffff82b650f0 r ipp_mask -ffffffff82b65190 r xfm_regs -ffffffff82b65730 r xfm_shift -ffffffff82b65790 r xfm_mask -ffffffff82b65910 r opp_regs -ffffffff82b65a60 r opp_shift -ffffffff82b65a8c r opp_mask -ffffffff82b65b40 r aux_engine_regs -ffffffff82b65c30 r aux_mask -ffffffff82b65c90 r aux_shift -ffffffff82b65cb0 r i2c_hw_regs -ffffffff82b65e00 r i2c_shifts -ffffffff82b65e2c r i2c_masks -ffffffff82b65ed0 r audio_regs -ffffffff82b65fd8 r audio_shift -ffffffff82b65ff0 r audio_mask -ffffffff82b66030 r stream_enc_regs -ffffffff82b665e8 r se_shift -ffffffff82b6666c r se_mask -ffffffff82b66870 r hwseq_reg -ffffffff82b66a8c r hwseq_shift -ffffffff82b66b0c r hwseq_mask -ffffffff82b67000 r bios_regs -ffffffff82b67008 r res_cap -ffffffff82b67048 r dce120_res_pool_funcs -ffffffff82b67130 r debug_defaults -ffffffff82b672b0 r clk_src_regs -ffffffff82b674a8 r dmcu_regs -ffffffff82b67504 r dmcu_shift -ffffffff82b67518 r dmcu_mask -ffffffff82b67564 r abm_regs -ffffffff82b675a4 r abm_shift -ffffffff82b675b8 r abm_mask -ffffffff82b67600 r dce120_tg_offsets -ffffffff82b67648 r dce121_res_create_funcs -ffffffff82b67678 r res_create_funcs -ffffffff82b676a8 r plane_cap -ffffffff82b676e0 r panel_cntl_regs -ffffffff82b67700 r panel_cntl_shift -ffffffff82b67710 r panel_cntl_mask -ffffffff82b67750 r link_enc_regs -ffffffff82b67b10 r link_enc_aux_regs -ffffffff82b67b60 r link_enc_hpd_regs -ffffffff82b67b78 r link_enc_feature -ffffffff82b67b88 r cs_shift -ffffffff82b67b94 r cs_mask -ffffffff82b67bc0 r mi_regs -ffffffff82b67ed8 r mi_shifts -ffffffff82b67f20 r mi_masks -ffffffff82b68040 r ipp_regs -ffffffff82b68238 r ipp_shift -ffffffff82b68260 r ipp_mask -ffffffff82b68300 r xfm_regs -ffffffff82b688a0 r xfm_shift -ffffffff82b68900 r xfm_mask -ffffffff82b68a80 r opp_regs -ffffffff82b68bd0 r opp_shift -ffffffff82b68bfc r opp_mask -ffffffff82b68cb0 r aux_engine_regs -ffffffff82b68da0 r aux_mask -ffffffff82b68e00 r aux_shift -ffffffff82b68e20 r i2c_hw_regs -ffffffff82b68f70 r i2c_shifts -ffffffff82b68f9c r i2c_masks -ffffffff82b69040 r audio_regs -ffffffff82b69174 r audio_shift -ffffffff82b6918c r audio_mask -ffffffff82b691d0 r stream_enc_regs -ffffffff82b69788 r se_shift -ffffffff82b6980c r se_mask -ffffffff82b69a10 r dce121_hwseq_reg -ffffffff82b69c2c r dce121_hwseq_shift -ffffffff82b69cac r dce121_hwseq_mask -ffffffff82b69ea0 r hwseq_reg -ffffffff82b6a0bc r hwseq_shift -ffffffff82b6a13c r hwseq_mask -ffffffff82b6b000 r dce120_tg_funcs -ffffffff82b6c000 r bios_regs -ffffffff82b6c008 r res_cap -ffffffff82b6c048 r dce80_res_pool_funcs -ffffffff82b6c130 r clk_src_regs -ffffffff82b6c22c r dmcu_regs -ffffffff82b6c288 r dmcu_shift -ffffffff82b6c29c r dmcu_mask -ffffffff82b6c2e8 r abm_regs -ffffffff82b6c328 r abm_shift -ffffffff82b6c33c r abm_mask -ffffffff82b6c390 r dce80_tg_offsets -ffffffff82b6c3d8 r plane_cap -ffffffff82b6c408 r res_create_funcs -ffffffff82b6c440 r panel_cntl_regs -ffffffff82b6c460 r panel_cntl_shift -ffffffff82b6c470 r panel_cntl_mask -ffffffff82b6c4b0 r link_enc_regs -ffffffff82b6c870 r link_enc_aux_regs -ffffffff82b6c8c0 r link_enc_hpd_regs -ffffffff82b6c8d8 r link_enc_feature -ffffffff82b6c8e8 r cs_shift -ffffffff82b6c8f4 r cs_mask -ffffffff82b6c920 r mi_regs -ffffffff82b6cc38 r mi_shifts -ffffffff82b6cc80 r mi_masks -ffffffff82b6cda0 r ipp_regs -ffffffff82b6cf98 r ipp_shift -ffffffff82b6cfc0 r ipp_mask -ffffffff82b6d060 r xfm_regs -ffffffff82b6d600 r xfm_shift -ffffffff82b6d660 r xfm_mask -ffffffff82b6d7e0 r opp_regs -ffffffff82b6d930 r opp_shift -ffffffff82b6d95c r opp_mask -ffffffff82b6da10 r aux_engine_regs -ffffffff82b6db00 r aux_mask -ffffffff82b6db60 r aux_shift -ffffffff82b6db80 r i2c_hw_regs -ffffffff82b6dcd0 r i2c_shifts -ffffffff82b6dcfc r i2c_masks -ffffffff82b6dda0 r audio_regs -ffffffff82b6ded4 r audio_shift -ffffffff82b6deec r audio_mask -ffffffff82b6df30 r stream_enc_regs -ffffffff82b6e5dc r se_shift -ffffffff82b6e660 r se_mask -ffffffff82b6e864 r hwseq_reg -ffffffff82b6ea80 r hwseq_shift -ffffffff82b6eb00 r hwseq_mask -ffffffff82b6ecf4 r res_cap_81 -ffffffff82b6ed30 r res_cap_83 -ffffffff82b6f000 r reg_offsets -ffffffff82b6f048 r dce80_tg_funcs -ffffffff82b70000 r dcn10_dpp_funcs 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qp_table_420_8bpc_min -ffffffff82c47e00 R qp_table_422_8bpc_min -ffffffff82c48340 R qp_table_422_10bpc_max -ffffffff82c48a80 R qp_table_420_10bpc_max -ffffffff82c49040 R qp_table_420_10bpc_min -ffffffff82c49600 R qp_table_444_10bpc_max -ffffffff82c4a240 R qp_table_422_8bpc_max -ffffffff82c4c000 r funcs -ffffffff82c4c050 r hpd_regs -ffffffff82c4c1a0 r hpd_shift -ffffffff82c4c1b0 r hpd_mask -ffffffff82c4c1c0 r ddc_data_regs -ffffffff82c4c3a0 r ddc_clk_regs -ffffffff82c4c580 r ddc_shift -ffffffff82c4c5a8 r ddc_mask -ffffffff82c4d000 r funcs +ffffffff82b390c0 r ddr5_wm_table +ffffffff82b3a000 r lpddr5_wm_table +ffffffff82b3a0c0 r ddr5_wm_table +ffffffff82b3b000 r lpddr5_wm_table +ffffffff82b3b0c0 r ddr4_wm_table +ffffffff82b3c000 r clk_mgr_regs_dcn321 +ffffffff82b3c054 r clk_mgr_shift_dcn321 +ffffffff82b3c060 r clk_mgr_mask_dcn321 +ffffffff82b3c084 r clk_mgr_regs_dcn32 +ffffffff82b3c0d8 r clk_mgr_shift_dcn32 +ffffffff82b3c0e4 r clk_mgr_mask_dcn32 +ffffffff82b3d000 r DC_BUILD_ID +ffffffff82b3f000 r output_csc_matrix +ffffffff82b3f0e0 r black_color_format +ffffffff82b40000 r DP_SINK_BRANCH_DEV_NAME_7580 +ffffffff82b41000 r DP_VGA_DONGLE_BRANCH_DEV_NAME +ffffffff82b41006 r DP_DVI_CONVERTER_ID_4 +ffffffff82b4100d r DP_DVI_CONVERTER_ID_5 +ffffffff82b42000 r DP_VGA_LVDS_CONVERTER_ID_2 +ffffffff82b42007 r DP_VGA_LVDS_CONVERTER_ID_3 +ffffffff82b42010 r dp_lt_fallbacks +ffffffff82b43000 r mandatory_dpcd_partitions +ffffffff82b45000 r dce_funcs +ffffffff82b46000 r funcs +ffffffff82b47000 R video_optimized_pixel_rates +ffffffff82b471b0 r dce110_clk_src_funcs +ffffffff82b471d8 r dce112_clk_src_funcs +ffffffff82b47200 r dcn20_clk_src_funcs +ffffffff82b47228 r dcn3_clk_src_funcs +ffffffff82b47250 r dcn31_clk_src_funcs +ffffffff82b48000 r dce_funcs +ffffffff82b48068 r dcn10_funcs +ffffffff82b480d0 r dcn20_funcs +ffffffff82b48138 r dcn21_funcs +ffffffff82b49000 r dce_ipp_funcs +ffffffff82b4a000 r dce110_lnk_enc_funcs +ffffffff82b4b000 r dce_mi_funcs +ffffffff82b4b090 r dce112_mi_funcs +ffffffff82b4b120 r dce120_mi_funcs +ffffffff82b4b1b0 r pte_settings +ffffffff82b4c000 r funcs +ffffffff82b4d000 r dce_link_panel_cntl_funcs +ffffffff82b4e000 r filter_3tap_16p_upscale +ffffffff82b4e040 r filter_3tap_16p_116 +ffffffff82b4e080 r filter_3tap_16p_149 +ffffffff82b4e0c0 r filter_3tap_16p_183 +ffffffff82b4e100 r filter_3tap_64p_upscale +ffffffff82b4e1d0 r filter_3tap_64p_116 +ffffffff82b4e2a0 r filter_3tap_64p_149 +ffffffff82b4e370 r filter_3tap_64p_183 +ffffffff82b4e440 r filter_4tap_16p_upscale +ffffffff82b4e490 r filter_4tap_16p_116 +ffffffff82b4e4e0 r filter_4tap_16p_149 +ffffffff82b4e530 r filter_4tap_16p_183 +ffffffff82b4e580 r filter_4tap_64p_upscale +ffffffff82b4e690 r filter_4tap_64p_116 +ffffffff82b4e7a0 r filter_4tap_64p_149 +ffffffff82b4e8b0 r filter_4tap_64p_183 +ffffffff82b4e9c0 r filter_5tap_64p_upscale +ffffffff82b4eb10 r filter_5tap_64p_116 +ffffffff82b4ec60 r filter_5tap_64p_149 +ffffffff82b4edb0 r filter_5tap_64p_183 +ffffffff82b4ef00 r filter_6tap_64p_upscale +ffffffff82b4f090 r filter_6tap_64p_116 +ffffffff82b4f220 r filter_6tap_64p_149 +ffffffff82b4f3b0 r filter_6tap_64p_183 +ffffffff82b4f540 r filter_7tap_64p_upscale +ffffffff82b4f710 r filter_7tap_64p_116 +ffffffff82b4f8e0 r filter_7tap_64p_149 +ffffffff82b4fab0 r filter_7tap_64p_183 +ffffffff82b4fc80 r filter_8tap_64p_upscale +ffffffff82b4fe90 r filter_8tap_64p_116 +ffffffff82b500a0 r filter_8tap_64p_149 +ffffffff82b502b0 r filter_8tap_64p_183 +ffffffff82b504c0 r filter_2tap_16p +ffffffff82b504f0 r filter_2tap_64p +ffffffff82b51000 r audio_clock_info_table_48bpc +ffffffff82b51190 r audio_clock_info_table_36bpc +ffffffff82b51320 r audio_clock_info_table +ffffffff82b514e0 r dce110_str_enc_funcs +ffffffff82b52000 r global_color_matrix +ffffffff82b520a8 r dce_transform_funcs +ffffffff82b53000 r abm_funcs +ffffffff82b54000 r psr_funcs +ffffffff82b54040 r DP_SINK_DEVICE_STR_ID_1 +ffffffff82b54045 r DP_SINK_DEVICE_STR_ID_2 +ffffffff82b55000 r reg_offsets +ffffffff82b56000 r bios_regs +ffffffff82b56008 r res_cap +ffffffff82b56050 r clk_src_regs +ffffffff82b5614c r dmcu_regs +ffffffff82b561a8 r dmcu_shift +ffffffff82b561bc r dmcu_mask +ffffffff82b56208 r abm_regs +ffffffff82b56248 r abm_shift +ffffffff82b5625c r abm_mask +ffffffff82b562b0 r dce100_tg_offsets +ffffffff82b562f8 r plane_cap +ffffffff82b56328 r res_create_funcs +ffffffff82b56358 r dce100_res_pool_funcs +ffffffff82b56440 r panel_cntl_regs +ffffffff82b56460 r panel_cntl_shift +ffffffff82b56470 r panel_cntl_mask +ffffffff82b564b0 r link_enc_regs +ffffffff82b56870 r link_enc_aux_regs +ffffffff82b568c0 r link_enc_hpd_regs +ffffffff82b568d8 r link_enc_feature +ffffffff82b568e8 r cs_shift +ffffffff82b568f4 r cs_mask +ffffffff82b56920 r mi_regs +ffffffff82b56c38 r mi_shifts +ffffffff82b56c80 r mi_masks +ffffffff82b56da0 r ipp_regs +ffffffff82b56f98 r ipp_shift +ffffffff82b56fc0 r ipp_mask +ffffffff82b57060 r xfm_regs +ffffffff82b57600 r xfm_shift +ffffffff82b57660 r xfm_mask +ffffffff82b577e0 r opp_regs +ffffffff82b57930 r opp_shift +ffffffff82b5795c r opp_mask +ffffffff82b57a10 r aux_engine_regs +ffffffff82b57b00 r aux_mask +ffffffff82b57b60 r aux_shift +ffffffff82b57b80 r i2c_hw_regs +ffffffff82b57cd0 r i2c_shifts +ffffffff82b57cfc r i2c_masks +ffffffff82b57da0 r audio_regs +ffffffff82b57ed4 r audio_shift +ffffffff82b57eec r audio_mask +ffffffff82b57f30 r stream_enc_regs +ffffffff82b585dc r se_shift +ffffffff82b58660 r se_mask +ffffffff82b58864 r hwseq_reg +ffffffff82b58a80 r hwseq_shift +ffffffff82b58b00 r hwseq_mask +ffffffff82b59000 r reg_offsets +ffffffff82b59018 r dce110_compressor_funcs +ffffffff82b5a000 r dce110_funcs +ffffffff82b5a2c0 r dce110_private_funcs +ffffffff82b5b000 r dce110_mem_input_v_funcs +ffffffff82b5b090 r dvmm_Hw_Setting_1DTiling +ffffffff82b5b120 r dvmm_Hw_Setting_2DTiling +ffffffff82b5b1b0 r dvmm_Hw_Setting_Linear +ffffffff82b5c000 r global_color_matrix +ffffffff82b5c0b0 r input_csc_matrix +ffffffff82b5d000 r funcs +ffffffff82b5e000 r bios_regs +ffffffff82b5e008 r dce110_res_pool_funcs +ffffffff82b5e0f0 r clk_src_regs +ffffffff82b5e1ec r dmcu_regs +ffffffff82b5e248 r dmcu_shift +ffffffff82b5e25c r dmcu_mask +ffffffff82b5e2a8 r abm_regs +ffffffff82b5e2e8 r abm_shift +ffffffff82b5e2fc r abm_mask +ffffffff82b5e350 r dce110_tg_offsets +ffffffff82b5e398 r res_create_funcs +ffffffff82b5e3c8 r plane_cap +ffffffff82b5e3f4 r underlay_plane_cap +ffffffff82b5e420 r stoney_resource_cap +ffffffff82b5e45c r carrizo_resource_cap +ffffffff82b5e4a0 r panel_cntl_regs +ffffffff82b5e4c0 r panel_cntl_shift +ffffffff82b5e4d0 r panel_cntl_mask +ffffffff82b5e510 r link_enc_regs +ffffffff82b5e8d0 r link_enc_aux_regs +ffffffff82b5e920 r link_enc_hpd_regs +ffffffff82b5e938 r link_enc_feature +ffffffff82b5e948 r cs_shift +ffffffff82b5e954 r cs_mask +ffffffff82b5e980 r mi_regs +ffffffff82b5eb0c r mi_shifts +ffffffff82b5eb54 r mi_masks +ffffffff82b5ec70 r ipp_regs +ffffffff82b5ed6c r ipp_shift +ffffffff82b5ed94 r ipp_mask +ffffffff82b5ee30 r xfm_regs +ffffffff82b5f100 r xfm_shift +ffffffff82b5f160 r xfm_mask +ffffffff82b5f2e0 r opp_regs +ffffffff82b5f430 r opp_shift +ffffffff82b5f45c r opp_mask +ffffffff82b5f510 r aux_engine_regs +ffffffff82b5f600 r aux_mask +ffffffff82b5f660 r aux_shift +ffffffff82b5f680 r i2c_hw_regs +ffffffff82b5f7d0 r i2c_shifts +ffffffff82b5f7fc r i2c_masks +ffffffff82b5f8a0 r audio_regs +ffffffff82b5f9d4 r audio_shift +ffffffff82b5f9ec r audio_mask +ffffffff82b5fa30 r stream_enc_regs +ffffffff82b5fd0c r se_shift +ffffffff82b5fd90 r se_mask +ffffffff82b5ff94 r hwseq_stoney_reg +ffffffff82b601b0 r hwseq_cz_reg +ffffffff82b603cc r hwseq_shift +ffffffff82b6044c r hwseq_mask +ffffffff82b61000 r dce110_tg_funcs +ffffffff82b62000 r dce110_tg_v_funcs +ffffffff82b63000 r dce110_xfmv_funcs +ffffffff82b64000 r reg_offsets +ffffffff82b65000 r reg_offsets +ffffffff82b66000 r bios_regs +ffffffff82b66010 r clk_src_regs +ffffffff82b66208 r dmcu_regs +ffffffff82b66264 r dmcu_shift +ffffffff82b66278 r dmcu_mask +ffffffff82b662c4 r abm_regs +ffffffff82b66304 r abm_shift +ffffffff82b66318 r abm_mask +ffffffff82b66360 r dce112_tg_offsets +ffffffff82b663a8 r res_create_funcs +ffffffff82b663d8 r plane_cap +ffffffff82b66404 r polaris_11_resource_cap +ffffffff82b66440 r polaris_10_resource_cap +ffffffff82b66480 r dce112_res_pool_funcs +ffffffff82b66570 r panel_cntl_regs +ffffffff82b66590 r panel_cntl_shift +ffffffff82b665a0 r panel_cntl_mask +ffffffff82b665e0 r link_enc_regs +ffffffff82b669a0 r link_enc_aux_regs +ffffffff82b669f0 r link_enc_hpd_regs +ffffffff82b66a08 r link_enc_feature +ffffffff82b66a18 r cs_shift +ffffffff82b66a24 r cs_mask +ffffffff82b66a50 r mi_regs +ffffffff82b66d68 r mi_shifts +ffffffff82b66db0 r mi_masks +ffffffff82b66ed0 r ipp_regs +ffffffff82b670c8 r ipp_shift +ffffffff82b670f0 r ipp_mask +ffffffff82b67190 r xfm_regs +ffffffff82b67730 r xfm_shift +ffffffff82b67790 r xfm_mask +ffffffff82b67910 r opp_regs +ffffffff82b67a60 r opp_shift +ffffffff82b67a8c r opp_mask +ffffffff82b67b40 r aux_engine_regs +ffffffff82b67c30 r aux_mask +ffffffff82b67c90 r aux_shift +ffffffff82b67cb0 r i2c_hw_regs +ffffffff82b67e00 r i2c_shifts +ffffffff82b67e2c r i2c_masks +ffffffff82b67ed0 r audio_regs +ffffffff82b67fd8 r audio_shift +ffffffff82b67ff0 r audio_mask +ffffffff82b68030 r stream_enc_regs +ffffffff82b685e8 r se_shift +ffffffff82b6866c r se_mask +ffffffff82b68870 r hwseq_reg +ffffffff82b68a8c r hwseq_shift +ffffffff82b68b0c r hwseq_mask +ffffffff82b69000 r bios_regs +ffffffff82b69008 r res_cap +ffffffff82b69048 r dce120_res_pool_funcs +ffffffff82b69130 r debug_defaults +ffffffff82b692b0 r clk_src_regs +ffffffff82b694a8 r dmcu_regs +ffffffff82b69504 r dmcu_shift +ffffffff82b69518 r dmcu_mask +ffffffff82b69564 r abm_regs +ffffffff82b695a4 r abm_shift +ffffffff82b695b8 r abm_mask +ffffffff82b69600 r dce120_tg_offsets +ffffffff82b69648 r dce121_res_create_funcs +ffffffff82b69678 r res_create_funcs +ffffffff82b696a8 r plane_cap +ffffffff82b696e0 r panel_cntl_regs +ffffffff82b69700 r panel_cntl_shift +ffffffff82b69710 r panel_cntl_mask +ffffffff82b69750 r link_enc_regs +ffffffff82b69b10 r link_enc_aux_regs +ffffffff82b69b60 r link_enc_hpd_regs +ffffffff82b69b78 r link_enc_feature +ffffffff82b69b88 r cs_shift +ffffffff82b69b94 r cs_mask +ffffffff82b69bc0 r mi_regs +ffffffff82b69ed8 r mi_shifts +ffffffff82b69f20 r mi_masks +ffffffff82b6a040 r ipp_regs +ffffffff82b6a238 r ipp_shift +ffffffff82b6a260 r ipp_mask +ffffffff82b6a300 r xfm_regs +ffffffff82b6a8a0 r xfm_shift +ffffffff82b6a900 r xfm_mask +ffffffff82b6aa80 r opp_regs +ffffffff82b6abd0 r opp_shift +ffffffff82b6abfc r opp_mask +ffffffff82b6acb0 r aux_engine_regs +ffffffff82b6ada0 r aux_mask +ffffffff82b6ae00 r aux_shift +ffffffff82b6ae20 r i2c_hw_regs +ffffffff82b6af70 r i2c_shifts +ffffffff82b6af9c r i2c_masks +ffffffff82b6b040 r audio_regs +ffffffff82b6b174 r audio_shift +ffffffff82b6b18c r audio_mask +ffffffff82b6b1d0 r stream_enc_regs +ffffffff82b6b788 r se_shift +ffffffff82b6b80c r se_mask +ffffffff82b6ba10 r dce121_hwseq_reg +ffffffff82b6bc2c r dce121_hwseq_shift +ffffffff82b6bcac r dce121_hwseq_mask +ffffffff82b6bea0 r hwseq_reg +ffffffff82b6c0bc r hwseq_shift +ffffffff82b6c13c r hwseq_mask +ffffffff82b6d000 r dce120_tg_funcs +ffffffff82b6e000 r bios_regs +ffffffff82b6e008 r res_cap +ffffffff82b6e048 r dce80_res_pool_funcs +ffffffff82b6e130 r clk_src_regs +ffffffff82b6e22c r dmcu_regs +ffffffff82b6e288 r dmcu_shift +ffffffff82b6e29c r dmcu_mask +ffffffff82b6e2e8 r abm_regs +ffffffff82b6e328 r abm_shift +ffffffff82b6e33c r abm_mask +ffffffff82b6e390 r dce80_tg_offsets +ffffffff82b6e3d8 r plane_cap +ffffffff82b6e408 r res_create_funcs +ffffffff82b6e440 r panel_cntl_regs +ffffffff82b6e460 r panel_cntl_shift +ffffffff82b6e470 r panel_cntl_mask +ffffffff82b6e4b0 r link_enc_regs +ffffffff82b6e870 r link_enc_aux_regs +ffffffff82b6e8c0 r link_enc_hpd_regs +ffffffff82b6e8d8 r link_enc_feature +ffffffff82b6e8e8 r cs_shift +ffffffff82b6e8f4 r cs_mask +ffffffff82b6e920 r mi_regs +ffffffff82b6ec38 r mi_shifts +ffffffff82b6ec80 r mi_masks +ffffffff82b6eda0 r ipp_regs +ffffffff82b6ef98 r ipp_shift +ffffffff82b6efc0 r ipp_mask +ffffffff82b6f060 r xfm_regs +ffffffff82b6f600 r xfm_shift +ffffffff82b6f660 r xfm_mask +ffffffff82b6f7e0 r opp_regs +ffffffff82b6f930 r opp_shift +ffffffff82b6f95c r opp_mask +ffffffff82b6fa10 r aux_engine_regs +ffffffff82b6fb00 r aux_mask +ffffffff82b6fb60 r aux_shift +ffffffff82b6fb80 r i2c_hw_regs +ffffffff82b6fcd0 r i2c_shifts +ffffffff82b6fcfc r i2c_masks +ffffffff82b6fda0 r audio_regs +ffffffff82b6fed4 r audio_shift +ffffffff82b6feec r audio_mask +ffffffff82b6ff30 r stream_enc_regs +ffffffff82b705dc r se_shift +ffffffff82b70660 r se_mask +ffffffff82b70864 r hwseq_reg +ffffffff82b70a80 r hwseq_shift +ffffffff82b70b00 r hwseq_mask +ffffffff82b70cf4 r res_cap_81 +ffffffff82b70d30 r res_cap_83 +ffffffff82b71000 r reg_offsets +ffffffff82b71048 r dce80_tg_funcs +ffffffff82b72000 r dcn10_dpp_funcs +ffffffff82b73000 r dpp_input_csc_matrix +ffffffff82b75000 r hubbub1_funcs +ffffffff82b76000 r dcn10_hubp_funcs +ffffffff82b77000 r reduceSizeAndFraction.prime_numbers +ffffffff82b79000 r dcn10_funcs +ffffffff82b792c0 r dcn10_private_funcs +ffffffff82b7a000 r dcn10_ipp_funcs +ffffffff82b7a048 r dcn20_ipp_funcs +ffffffff82b7b000 r dcn10_lnk_enc_funcs +ffffffff82b7c000 r dcn10_mpc_funcs +ffffffff82b7d000 r dcn10_opp_funcs +ffffffff82b7e000 r dcn10_tg_funcs +ffffffff82b7f000 r bios_regs +ffffffff82b7f008 r rv2_res_cap +ffffffff82b7f044 r res_cap +ffffffff82b7f080 r debug_defaults_drv +ffffffff82b7f1f8 r debug_defaults_diags +ffffffff82b7f370 r clk_src_regs +ffffffff82b7f4c0 r dmcu_regs +ffffffff82b7f51c r dmcu_shift +ffffffff82b7f530 r dmcu_mask +ffffffff82b7f57c r abm_regs +ffffffff82b7f5bc r abm_shift +ffffffff82b7f5d0 r abm_mask +ffffffff82b7f618 r res_create_funcs +ffffffff82b7f648 r res_create_maximus_funcs +ffffffff82b7f678 r plane_cap +ffffffff82b7f6a8 r dcn10_res_pool_funcs +ffffffff82b7f790 r panel_cntl_regs +ffffffff82b7f7b0 r panel_cntl_shift +ffffffff82b7f7c0 r panel_cntl_mask +ffffffff82b7f800 r link_enc_regs +ffffffff82b7fd10 r link_enc_aux_regs +ffffffff82b7fd50 r link_enc_hpd_regs +ffffffff82b7fd60 r le_shift +ffffffff82b7fe50 r le_mask +ffffffff82b80208 r link_enc_feature +ffffffff82b80218 r cs_shift +ffffffff82b80224 r cs_mask +ffffffff82b80250 r hubp_regs +ffffffff82b80900 r hubp_shift +ffffffff82b809c4 r hubp_mask +ffffffff82b80cd0 r ipp_regs +ffffffff82b80db0 r ipp_shift +ffffffff82b80dcc r ipp_mask +ffffffff82b80e40 r tf_regs +ffffffff82b81da0 r tf_shift +ffffffff82b82008 r tf_mask +ffffffff82b829a0 r opp_regs +ffffffff82b82a70 r opp_shift +ffffffff82b82a90 r opp_mask +ffffffff82b82b10 r tg_regs +ffffffff82b83010 r tg_shift +ffffffff82b830d0 r tg_mask +ffffffff82b833d0 r aux_engine_regs +ffffffff82b834c0 r aux_mask +ffffffff82b83520 r aux_shift +ffffffff82b83540 r i2c_hw_regs +ffffffff82b83690 r i2c_shifts +ffffffff82b836bc r i2c_masks +ffffffff82b83760 r mpc_regs +ffffffff82b83880 r mpc_shift +ffffffff82b83898 r mpc_mask +ffffffff82b838f4 r hubbub_reg +ffffffff82b83a68 r hubbub_shift +ffffffff82b83af0 r hubbub_mask +ffffffff82b83d10 r audio_regs +ffffffff82b83dc0 r audio_shift +ffffffff82b83dd8 r audio_mask +ffffffff82b83e20 r stream_enc_regs +ffffffff82b84370 r se_shift +ffffffff82b8444c r se_mask +ffffffff82b847b8 r hwseq_reg +ffffffff82b849d4 r hwseq_shift +ffffffff82b84a54 r hwseq_mask +ffffffff82b85000 r audio_clock_info_table_48bpc +ffffffff82b85190 r audio_clock_info_table_36bpc +ffffffff82b85320 r audio_clock_info_table +ffffffff82b854e0 r dcn10_str_enc_funcs +ffffffff82b86000 r dccg2_funcs +ffffffff82b88000 r dpp_input_csc_matrix +ffffffff82b89000 R dcn20_dsc_funcs +ffffffff82b8a000 R dcn20_dwbc_funcs +ffffffff82b8b000 r filter_12tap_16p_upscale +ffffffff82b8b0e0 r filter_12tap_16p_117 +ffffffff82b8b1c0 r filter_12tap_16p_150 +ffffffff82b8b2a0 r filter_12tap_16p_183 +ffffffff82b8b380 r filter_11tap_16p_upscale +ffffffff82b8b450 r filter_11tap_16p_117 +ffffffff82b8b520 r filter_11tap_16p_150 +ffffffff82b8b5f0 r filter_11tap_16p_183 +ffffffff82b8b6c0 r filter_10tap_16p_upscale +ffffffff82b8b780 r filter_10tap_16p_117 +ffffffff82b8b840 r filter_10tap_16p_150 +ffffffff82b8b900 r filter_10tap_16p_183 +ffffffff82b8b9c0 r filter_9tap_16p_upscale +ffffffff82b8ba70 r filter_9tap_16p_117 +ffffffff82b8bb20 r filter_9tap_16p_150 +ffffffff82b8bbd0 r filter_9tap_16p_183 +ffffffff82b8bc80 r filter_8tap_16p_upscale +ffffffff82b8bd10 r filter_8tap_16p_117 +ffffffff82b8bda0 r filter_8tap_16p_150 +ffffffff82b8be30 r filter_8tap_16p_183 +ffffffff82b8bec0 r filter_7tap_16p_upscale +ffffffff82b8bf40 r filter_7tap_16p_117 +ffffffff82b8bfc0 r filter_7tap_16p_150 +ffffffff82b8c040 r filter_7tap_16p_183 +ffffffff82b8c0c0 r filter_6tap_16p_upscale +ffffffff82b8c130 r filter_6tap_16p_117 +ffffffff82b8c1a0 r filter_6tap_16p_150 +ffffffff82b8c210 r filter_6tap_16p_183 +ffffffff82b8c280 r filter_5tap_16p_upscale +ffffffff82b8c2e0 r filter_5tap_16p_117 +ffffffff82b8c340 r filter_5tap_16p_150 +ffffffff82b8c3a0 r filter_5tap_16p_183 +ffffffff82b8c400 r filter_4tap_16p_upscale +ffffffff82b8c450 r filter_4tap_16p_117 +ffffffff82b8c4a0 r filter_4tap_16p_150 +ffffffff82b8c4f0 r filter_4tap_16p_183 +ffffffff82b8c540 r filter_3tap_16p_upscale +ffffffff82b8c580 r filter_3tap_16p_117 +ffffffff82b8c5c0 r filter_3tap_16p_150 +ffffffff82b8c600 r filter_3tap_16p_183 +ffffffff82b8d000 r hubbub2_funcs +ffffffff82b8e000 r dcn20_funcs +ffffffff82b8e2c0 r dcn20_private_funcs +ffffffff82b8f000 r dcn2_mpll_cfg +ffffffff82b8f190 r dcn20_link_enc_funcs +ffffffff82b90000 R dcn20_mmhubbub_funcs +ffffffff82b91000 R dcn20_mpc_funcs +ffffffff82b92000 r tf_regs +ffffffff82b93920 r tf_shift +ffffffff82b93ba4 r tf_mask +ffffffff82b945c0 r ipp_regs +ffffffff82b94710 r ipp_shift +ffffffff82b9472c r ipp_mask +ffffffff82b947a0 r opp_regs +ffffffff82b949b0 r opp_shift +ffffffff82b949e8 r opp_mask +ffffffff82b94ac0 r aux_engine_regs +ffffffff82b94bb0 r aux_mask +ffffffff82b94c10 r aux_shift +ffffffff82b94c30 r i2c_hw_regs +ffffffff82b94d80 r i2c_shifts +ffffffff82b94dac r i2c_masks +ffffffff82b94e50 r mpc_regs +ffffffff82b95398 r mpc_shift +ffffffff82b953e0 r mpc_mask +ffffffff82b954f4 r hubbub_reg +ffffffff82b95668 r hubbub_shift +ffffffff82b956f0 r hubbub_mask +ffffffff82b9590c r res_cap_nv10 +ffffffff82b95950 r vmid_regs +ffffffff82b95b10 r vmid_shifts +ffffffff82b95b18 r vmid_masks +ffffffff82b95b40 r tg_regs +ffffffff82b962c0 r tg_shift +ffffffff82b96380 r tg_mask +ffffffff82b96680 r link_enc_regs +ffffffff82b96e20 r link_enc_aux_regs +ffffffff82b96e80 r link_enc_hpd_regs +ffffffff82b96e98 r le_shift +ffffffff82b96f88 r le_mask +ffffffff82b97340 r stream_enc_regs +ffffffff82b97b38 r se_shift +ffffffff82b97c14 r se_mask +ffffffff82b97f80 r hwseq_reg +ffffffff82b9819c r hwseq_shift +ffffffff82b9821c r hwseq_mask +ffffffff82b98410 r dsc_regs +ffffffff82b988a8 r dsc_shift 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+ffffffff82b9b0d0 r panel_cntl_shift +ffffffff82b9b0e0 r panel_cntl_mask +ffffffff82b9b11c r cs_shift +ffffffff82b9b128 r cs_mask +ffffffff82b9b150 r audio_regs +ffffffff82b9b284 r audio_shift +ffffffff82b9b29c r audio_mask +ffffffff82b9c000 r dcn20_str_enc_funcs +ffffffff82b9d000 r dccg201_funcs +ffffffff82b9e000 r hubbub201_funcs +ffffffff82b9f000 r dcn201_funcs +ffffffff82b9f2c0 r dcn201_private_funcs +ffffffff82ba0000 r dcn201_link_enc_funcs +ffffffff82ba1000 R dcn201_mpc_funcs +ffffffff82ba2000 r bios_regs +ffffffff82ba2008 r res_cap_dnc201 +ffffffff82ba2048 r debug_defaults_drv +ffffffff82ba21c0 r clk_src_regs +ffffffff82ba2268 r dccg_regs +ffffffff82ba2354 r dccg_shift +ffffffff82ba23ec r dccg_mask +ffffffff82ba2650 r res_create_funcs +ffffffff82ba2680 r res_create_maximus_funcs +ffffffff82ba26b0 r plane_cap +ffffffff82ba26e0 r link_enc_regs +ffffffff82ba2970 r link_enc_aux_regs +ffffffff82ba2990 r link_enc_hpd_regs +ffffffff82ba2998 r le_shift +ffffffff82ba2a88 r le_mask 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+ffffffff82ba6e50 r stream_enc_regs +ffffffff82ba70f8 r se_shift +ffffffff82ba71d4 r se_mask +ffffffff82ba7540 r hwseq_reg +ffffffff82ba775c r hwseq_shift +ffffffff82ba77dc r hwseq_mask +ffffffff82ba8000 r dccg21_funcs +ffffffff82ba9000 r hubbub21_funcs +ffffffff82baa000 r dcn21_funcs +ffffffff82baa2c0 r dcn21_private_funcs +ffffffff82bab000 r dcn21_mpll_cfg_ref +ffffffff82bab190 r dcn21_link_enc_funcs +ffffffff82bac000 r bios_regs +ffffffff82bac008 r res_cap_rn +ffffffff82bac048 r dcn21_res_pool_funcs +ffffffff82bac130 r debug_defaults_drv +ffffffff82bac2a8 r debug_defaults_diags +ffffffff82bac420 r clk_src_regs +ffffffff82bac5c4 r dccg_regs +ffffffff82bac6b0 r dccg_shift +ffffffff82bac748 r dccg_mask +ffffffff82bac9a8 r dmcu_regs +ffffffff82baca04 r dmcu_shift +ffffffff82baca18 r dmcu_mask +ffffffff82baca64 r abm_regs +ffffffff82bacaa4 r abm_shift +ffffffff82bacab8 r abm_mask +ffffffff82bacb00 r res_create_funcs +ffffffff82bacb30 r res_create_maximus_funcs +ffffffff82bacb60 r plane_cap +ffffffff82bacb90 r panel_cntl_regs +ffffffff82bacbb0 r panel_cntl_shift +ffffffff82bacbc0 r panel_cntl_mask +ffffffff82bacc00 r link_enc_regs +ffffffff82bad260 r link_enc_aux_regs +ffffffff82bad2b0 r link_enc_hpd_regs +ffffffff82bad2c4 r le_shift +ffffffff82bad3b4 r le_mask +ffffffff82bad76c r link_enc_feature +ffffffff82bad77c r panel_config_defaults +ffffffff82bad7b8 r cs_shift +ffffffff82bad7c4 r cs_mask +ffffffff82bad7f0 r hubp_regs +ffffffff82bae020 r hubp_shift +ffffffff82bae11c r hubp_mask +ffffffff82bae510 r ipp_regs +ffffffff82bae5f0 r ipp_shift +ffffffff82bae60c r ipp_mask +ffffffff82bae680 r tf_regs +ffffffff82baf740 r tf_shift +ffffffff82baf9c4 r tf_mask +ffffffff82bb03e0 r opp_regs +ffffffff82bb05f0 r opp_shift +ffffffff82bb0628 r opp_mask +ffffffff82bb0700 r tg_regs +ffffffff82bb0c00 r tg_shift +ffffffff82bb0cc0 r tg_mask +ffffffff82bb0fc0 r aux_engine_regs +ffffffff82bb1088 r aux_mask +ffffffff82bb10e8 r aux_shift +ffffffff82bb1100 r i2c_hw_regs +ffffffff82bb1218 r i2c_shifts +ffffffff82bb1244 r i2c_masks +ffffffff82bb12e8 r mpc_regs +ffffffff82bb1830 r mpc_shift +ffffffff82bb1878 r mpc_mask +ffffffff82bb198c r hubbub_reg +ffffffff82bb1b00 r hubbub_shift +ffffffff82bb1b88 r hubbub_mask +ffffffff82bb1db0 r vmid_regs +ffffffff82bb1f70 r vmid_shifts +ffffffff82bb1f78 r vmid_masks +ffffffff82bb1fa0 r dsc_regs +ffffffff82bb2438 r dsc_shift +ffffffff82bb24f0 r dsc_mask +ffffffff82bb27d0 r audio_regs +ffffffff82bb28d8 r audio_shift +ffffffff82bb28f0 r audio_mask +ffffffff82bb2930 r stream_enc_regs +ffffffff82bb2fd4 r se_shift +ffffffff82bb30b0 r se_mask +ffffffff82bb341c r hwseq_reg +ffffffff82bb3638 r hwseq_shift +ffffffff82bb36b8 r hwseq_mask +ffffffff82bb4000 r dccg3_funcs +ffffffff82bb5000 r dcn30_link_enc_funcs +ffffffff82bb6000 r dcn30_str_enc_funcs +ffffffff82bb7000 r dpp_input_csc_matrix +ffffffff82bb8000 R dcn30_dwbc_funcs +ffffffff82bb9000 r hubbub30_funcs +ffffffff82bbb000 r dcn30_funcs +ffffffff82bbb2c0 r dcn30_private_funcs +ffffffff82bbc000 R dcn30_mmhubbub_funcs +ffffffff82bbd000 R dcn30_mpc_funcs +ffffffff82bbe000 r bios_regs +ffffffff82bbe008 r res_cap_dcn3 +ffffffff82bbe048 r debug_defaults_drv +ffffffff82bbe1c0 r debug_defaults_diags +ffffffff82bbe340 r clk_src_regs +ffffffff82bbe538 r dccg_regs +ffffffff82bbe624 r dccg_shift +ffffffff82bbe6bc r dccg_mask +ffffffff82bbe920 r abm_regs +ffffffff82bbeaa0 r abm_shift +ffffffff82bbeab4 r abm_mask +ffffffff82bbeb00 r res_create_funcs +ffffffff82bbeb30 r res_create_maximus_funcs +ffffffff82bbeb60 r plane_cap +ffffffff82bbeb90 r dcn30_res_pool_funcs +ffffffff82bbec80 r panel_cntl_regs +ffffffff82bbeca0 r panel_cntl_shift +ffffffff82bbecb0 r panel_cntl_mask +ffffffff82bbecf0 r link_enc_regs +ffffffff82bbf490 r link_enc_aux_regs +ffffffff82bbf4f0 r link_enc_hpd_regs +ffffffff82bbf508 r le_shift +ffffffff82bbf5f8 r le_mask +ffffffff82bbf9b0 r link_enc_feature +ffffffff82bbf9c0 r panel_config_defaults +ffffffff82bbf9fc r cs_shift +ffffffff82bbfa08 r cs_mask +ffffffff82bbfa30 r hubbub_reg +ffffffff82bbfba4 r hubbub_shift +ffffffff82bbfc2c r hubbub_mask +ffffffff82bbfe50 r vmid_regs +ffffffff82bc0010 r vmid_shifts +ffffffff82bc0018 r vmid_masks +ffffffff82bc0040 r hubp_regs +ffffffff82bc0c88 r hubp_shift +ffffffff82bc0d84 r hubp_mask +ffffffff82bc1180 r dpp_regs +ffffffff82bc3100 r tf_shift +ffffffff82bc33d0 r tf_mask +ffffffff82bc3f10 r opp_regs +ffffffff82bc4120 r opp_shift +ffffffff82bc4158 r opp_mask +ffffffff82bc4230 r optc_regs +ffffffff82bc49b0 r optc_shift +ffffffff82bc4a70 r optc_mask +ffffffff82bc4d70 r mpc_regs +ffffffff82bc655c r mpc_shift +ffffffff82bc6638 r mpc_mask +ffffffff82bc69b0 r dsc_regs +ffffffff82bc6e48 r dsc_shift +ffffffff82bc6f00 r dsc_mask +ffffffff82bc71e0 r dwbc30_regs +ffffffff82bc73bc r dwbc30_shift +ffffffff82bc74f0 r dwbc30_mask +ffffffff82bc79c0 r mcif_wb30_regs +ffffffff82bc7abc r mcif_wb30_shift +ffffffff82bc7b68 r mcif_wb30_mask +ffffffff82bc7e20 r aux_engine_regs +ffffffff82bc7f10 r aux_mask +ffffffff82bc7f70 r aux_shift +ffffffff82bc7f90 r i2c_hw_regs +ffffffff82bc80e0 r i2c_shifts +ffffffff82bc810c r i2c_masks +ffffffff82bc81b0 r audio_regs +ffffffff82bc82e4 r audio_shift +ffffffff82bc82fc r audio_mask +ffffffff82bc8340 r stream_enc_regs +ffffffff82bc8b38 r se_shift +ffffffff82bc8c14 r se_mask +ffffffff82bc8f80 r vpg_regs +ffffffff82bc900c r vpg_shift +ffffffff82bc9034 r vpg_mask +ffffffff82bc90d0 r afmt_regs +ffffffff82bc91cc r afmt_shift +ffffffff82bc91e0 r afmt_mask +ffffffff82bc9224 r hwseq_reg +ffffffff82bc9440 r hwseq_shift +ffffffff82bc94c0 r hwseq_mask +ffffffff82bca000 r dccg301_funcs +ffffffff82bcb000 r dcn301_link_enc_funcs +ffffffff82bcc000 r hubbub301_funcs +ffffffff82bcd000 r dcn301_funcs +ffffffff82bcd2c0 r dcn301_private_funcs +ffffffff82bce000 r dcn301_link_panel_cntl_funcs +ffffffff82bcf000 r bios_regs +ffffffff82bcf008 r debug_defaults_drv +ffffffff82bcf180 r debug_defaults_diags +ffffffff82bcf300 r clk_src_regs +ffffffff82bcf450 r dccg_regs +ffffffff82bcf53c r dccg_shift +ffffffff82bcf5d4 r dccg_mask +ffffffff82bcf840 r abm_regs +ffffffff82bcf940 r abm_shift +ffffffff82bcf954 r abm_mask +ffffffff82bcf9a0 r res_create_funcs +ffffffff82bcf9d0 r res_create_maximus_funcs +ffffffff82bcfa00 r plane_cap +ffffffff82bcfa30 r panel_cntl_regs +ffffffff82bcfa70 r panel_cntl_shift +ffffffff82bcfa80 r panel_cntl_mask +ffffffff82bcfac0 r link_enc_regs +ffffffff82bcffd0 r link_enc_aux_regs +ffffffff82bd0010 r link_enc_hpd_regs +ffffffff82bd0020 r le_shift +ffffffff82bd0110 r le_mask +ffffffff82bd04c8 r link_enc_feature +ffffffff82bd04d8 r cs_shift +ffffffff82bd04e4 r cs_mask +ffffffff82bd050c r hubbub_reg +ffffffff82bd0680 r hubbub_shift +ffffffff82bd0708 r hubbub_mask +ffffffff82bd0930 r vmid_regs +ffffffff82bd0af0 r vmid_shifts +ffffffff82bd0af8 r vmid_masks +ffffffff82bd0b20 r hubp_regs +ffffffff82bd1350 r hubp_shift +ffffffff82bd144c r hubp_mask +ffffffff82bd1840 r dpp_regs +ffffffff82bd2d40 r tf_shift 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+ffffffff82bda6dc r link_enc_feature +ffffffff82bda6ec r panel_config_defaults +ffffffff82bda728 r cs_shift +ffffffff82bda734 r cs_mask +ffffffff82bda75c r hubbub_reg +ffffffff82bda8d0 r hubbub_shift +ffffffff82bda958 r hubbub_mask +ffffffff82bdab80 r vmid_regs +ffffffff82bdad40 r vmid_shifts +ffffffff82bdad48 r vmid_masks +ffffffff82bdad70 r hubp_regs +ffffffff82bdb7ac r hubp_shift +ffffffff82bdb8a8 r hubp_mask +ffffffff82bdbca0 r dpp_regs +ffffffff82bdd6e0 r tf_shift +ffffffff82bdd9b0 r tf_mask +ffffffff82bde4f0 r opp_regs +ffffffff82bde6a8 r opp_shift +ffffffff82bde6e0 r opp_mask +ffffffff82bde7c0 r optc_regs +ffffffff82bdee00 r optc_shift +ffffffff82bdeec0 r optc_mask +ffffffff82bdf1c0 r mpc_regs +ffffffff82be09ac r mpc_shift +ffffffff82be0a88 r mpc_mask +ffffffff82be0e00 r dsc_regs +ffffffff82be11d4 r dsc_shift +ffffffff82be128c r dsc_mask +ffffffff82be1570 r dwbc30_regs +ffffffff82be174c r dwbc30_shift +ffffffff82be1880 r dwbc30_mask +ffffffff82be1d50 r mcif_wb30_regs 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opp_regs +ffffffff82be79f0 r opp_shift +ffffffff82be7a28 r opp_mask +ffffffff82be7b00 r optc_regs +ffffffff82be7d80 r optc_shift +ffffffff82be7e40 r optc_mask +ffffffff82be8140 r mpc_regs +ffffffff82be992c r mpc_shift +ffffffff82be9a08 r mpc_mask +ffffffff82be9d80 r dsc_regs +ffffffff82be9f08 r dsc_shift +ffffffff82be9fc0 r dsc_mask +ffffffff82bea2a0 r dwbc30_regs +ffffffff82bea47c r dwbc30_shift +ffffffff82bea5b0 r dwbc30_mask +ffffffff82beaa80 r mcif_wb30_regs +ffffffff82beab7c r mcif_wb30_shift +ffffffff82beac28 r mcif_wb30_mask +ffffffff82beaee0 r aux_engine_regs +ffffffff82beaf30 r aux_mask +ffffffff82beaf90 r aux_shift +ffffffff82beafb0 r i2c_hw_regs +ffffffff82beb020 r i2c_shifts +ffffffff82beb04c r i2c_masks +ffffffff82beb0f0 r audio_regs +ffffffff82beb224 r audio_shift +ffffffff82beb23c r audio_mask +ffffffff82beb280 r stream_enc_regs +ffffffff82beb528 r se_shift +ffffffff82beb604 r se_mask +ffffffff82beb970 r vpg_regs +ffffffff82beb9ac r vpg_shift +ffffffff82beb9d4 r vpg_mask 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+ffffffff82bf31a0 r link_enc_hpd_regs +ffffffff82bf31b4 r le_shift +ffffffff82bf32a4 r le_mask +ffffffff82bf365c r link_enc_feature +ffffffff82bf366c r panel_config_defaults +ffffffff82bf36a8 r debug_defaults_drv +ffffffff82bf3820 r cs_shift +ffffffff82bf382c r cs_mask +ffffffff82bf3854 r hubbub_reg +ffffffff82bf39c8 r hubbub_shift +ffffffff82bf3a50 r hubbub_mask +ffffffff82bf3c70 r vmid_regs +ffffffff82bf3e30 r vmid_shifts +ffffffff82bf3e38 r vmid_masks +ffffffff82bf3e60 r hubp_regs +ffffffff82bf4690 r hubp_shift +ffffffff82bf478c r hubp_mask +ffffffff82bf4b80 r dpp_regs +ffffffff82bf6080 r tf_shift +ffffffff82bf6350 r tf_mask +ffffffff82bf6e90 r opp_regs +ffffffff82bf6ff0 r opp_shift +ffffffff82bf7028 r opp_mask +ffffffff82bf7100 r optc_regs +ffffffff82bf7600 r optc_shift +ffffffff82bf76c0 r optc_mask +ffffffff82bf79c0 r mpc_regs +ffffffff82bf91ac r mpc_shift +ffffffff82bf9288 r mpc_mask +ffffffff82bf9600 r dsc_regs +ffffffff82bf984c r dsc_shift +ffffffff82bf9904 r dsc_mask +ffffffff82bf9be0 r dwbc30_regs +ffffffff82bf9dbc r dwbc30_shift +ffffffff82bf9ef0 r dwbc30_mask +ffffffff82bfa3c0 r mcif_wb30_regs +ffffffff82bfa4bc r mcif_wb30_shift +ffffffff82bfa568 r mcif_wb30_mask +ffffffff82bfa820 r aux_engine_regs +ffffffff82bfa8e8 r aux_mask +ffffffff82bfa948 r aux_shift +ffffffff82bfa960 r i2c_hw_regs +ffffffff82bfaa78 r i2c_shifts +ffffffff82bfaaa4 r i2c_masks +ffffffff82bfab50 r audio_regs +ffffffff82bfac84 r audio_shift +ffffffff82bfac9c r audio_mask +ffffffff82bfacd8 r se_shift +ffffffff82bfadb4 r se_mask +ffffffff82bfb120 r vpg_regs +ffffffff82bfb210 r vpg_shift +ffffffff82bfb238 r vpg_mask +ffffffff82bfb2e0 r afmt_regs +ffffffff82bfb3b8 r afmt_shift +ffffffff82bfb3cc r afmt_mask +ffffffff82bfb420 r stream_enc_regs +ffffffff82bfcac0 r hpo_dp_stream_enc_regs +ffffffff82bfccf0 r hpo_dp_se_shift +ffffffff82bfcd18 r hpo_dp_se_mask +ffffffff82bfcdc0 r apg_regs +ffffffff82bfce00 r apg_shift +ffffffff82bfce08 r apg_mask +ffffffff82bfce20 r hpo_dp_link_enc_regs +ffffffff82bfcf30 r hpo_dp_le_shift +ffffffff82bfcf4c r hpo_dp_le_mask +ffffffff82bfcfb0 r hwseq_reg +ffffffff82bfd1cc r hwseq_shift +ffffffff82bfd24c r hwseq_mask +ffffffff82bfe000 r dccg314_funcs +ffffffff82bff000 r dcn314_str_enc_funcs +ffffffff82c00000 r dcn314_funcs +ffffffff82c002c0 r dcn314_private_funcs +ffffffff82c01000 r bios_regs +ffffffff82c01008 r res_cap_dcn314 +ffffffff82c01048 r debug_defaults_diags +ffffffff82c011c0 r clk_src_regs +ffffffff82c01364 r dccg_regs +ffffffff82c01450 r dccg_shift +ffffffff82c014e8 r dccg_mask +ffffffff82c01750 r abm_regs +ffffffff82c01850 r abm_shift +ffffffff82c01864 r abm_mask +ffffffff82c018b0 r res_create_funcs +ffffffff82c018e0 r res_create_maximus_funcs +ffffffff82c01910 r plane_cap +ffffffff82c01940 r link_enc_regs +ffffffff82c01fa0 r link_enc_aux_regs +ffffffff82c01ff0 r link_enc_hpd_regs +ffffffff82c02004 r le_shift +ffffffff82c020f4 r le_mask +ffffffff82c024ac r link_enc_feature +ffffffff82c024bc r panel_config_defaults +ffffffff82c024f8 r debug_defaults_drv +ffffffff82c02670 r cs_shift +ffffffff82c0267c r cs_mask +ffffffff82c026a4 r hubbub_reg +ffffffff82c02818 r hubbub_shift +ffffffff82c028a0 r hubbub_mask +ffffffff82c02ac0 r vmid_regs +ffffffff82c02c80 r vmid_shifts +ffffffff82c02c88 r vmid_masks +ffffffff82c02cb0 r hubp_regs +ffffffff82c034e0 r hubp_shift +ffffffff82c035dc r hubp_mask +ffffffff82c039d0 r dpp_regs +ffffffff82c04ed0 r tf_shift +ffffffff82c051a0 r tf_mask +ffffffff82c05ce0 r opp_regs +ffffffff82c05e40 r opp_shift +ffffffff82c05e78 r opp_mask +ffffffff82c05f50 r optc_regs +ffffffff82c06450 r optc_shift +ffffffff82c06510 r optc_mask +ffffffff82c06810 r mpc_regs +ffffffff82c07ffc r mpc_shift +ffffffff82c080d8 r mpc_mask +ffffffff82c08450 r dsc_regs +ffffffff82c08760 r dsc_shift +ffffffff82c08818 r dsc_mask +ffffffff82c08af0 r dwbc30_regs +ffffffff82c08ccc r dwbc30_shift +ffffffff82c08e00 r dwbc30_mask +ffffffff82c092d0 r mcif_wb30_regs +ffffffff82c093cc r mcif_wb30_shift +ffffffff82c09478 r mcif_wb30_mask +ffffffff82c09730 r aux_engine_regs +ffffffff82c097f8 r aux_mask +ffffffff82c09858 r aux_shift +ffffffff82c09870 r i2c_hw_regs +ffffffff82c09988 r i2c_shifts +ffffffff82c099b4 r i2c_masks +ffffffff82c09a60 r audio_regs +ffffffff82c09b94 r audio_shift +ffffffff82c09bac r audio_mask +ffffffff82c09bf0 r stream_enc_regs +ffffffff82c0a294 r se_shift +ffffffff82c0a370 r se_mask +ffffffff82c0a6e0 r vpg_regs +ffffffff82c0a7d0 r vpg_shift +ffffffff82c0a7f8 r vpg_mask +ffffffff82c0a8a0 r afmt_regs +ffffffff82c0a978 r afmt_shift +ffffffff82c0a98c r afmt_mask +ffffffff82c0a9e0 r hpo_dp_stream_enc_regs +ffffffff82c0ac10 r hpo_dp_se_shift +ffffffff82c0ac38 r hpo_dp_se_mask +ffffffff82c0ace0 r apg_regs +ffffffff82c0ad20 r apg_shift +ffffffff82c0ad28 r apg_mask +ffffffff82c0ad40 r hpo_dp_link_enc_regs +ffffffff82c0ae50 r hpo_dp_le_shift +ffffffff82c0ae6c r hpo_dp_le_mask +ffffffff82c0aed0 r hwseq_reg +ffffffff82c0b0ec r hwseq_shift +ffffffff82c0b16c r hwseq_mask +ffffffff82c0c000 r bios_regs +ffffffff82c0c008 r res_cap_dcn31 +ffffffff82c0c048 r debug_defaults_diags +ffffffff82c0c1c0 r clk_src_regs +ffffffff82c0c364 r dccg_regs +ffffffff82c0c450 r dccg_shift +ffffffff82c0c4e8 r dccg_mask +ffffffff82c0c750 r abm_regs +ffffffff82c0c850 r abm_shift +ffffffff82c0c864 r abm_mask +ffffffff82c0c8b0 r res_create_funcs +ffffffff82c0c8e0 r res_create_maximus_funcs +ffffffff82c0c910 r plane_cap +ffffffff82c0c940 r link_enc_regs +ffffffff82c0cfa0 r link_enc_aux_regs +ffffffff82c0cff0 r link_enc_hpd_regs +ffffffff82c0d004 r le_shift +ffffffff82c0d0f4 r le_mask +ffffffff82c0d4ac r link_enc_feature +ffffffff82c0d4bc r panel_config_defaults +ffffffff82c0d4f8 r debug_defaults_drv +ffffffff82c0d670 r cs_shift +ffffffff82c0d67c r cs_mask +ffffffff82c0d6a4 r hubbub_reg +ffffffff82c0d818 r hubbub_shift +ffffffff82c0d8a0 r hubbub_mask +ffffffff82c0dac0 r vmid_regs +ffffffff82c0dc80 r vmid_shifts +ffffffff82c0dc88 r vmid_masks +ffffffff82c0dcb0 r hubp_regs +ffffffff82c0e4e0 r hubp_shift +ffffffff82c0e5dc r hubp_mask +ffffffff82c0e9d0 r dpp_regs +ffffffff82c0fed0 r tf_shift +ffffffff82c101a0 r tf_mask +ffffffff82c10ce0 r opp_regs +ffffffff82c10e40 r opp_shift +ffffffff82c10e78 r opp_mask +ffffffff82c10f50 r optc_regs +ffffffff82c11450 r optc_shift +ffffffff82c11510 r optc_mask +ffffffff82c11810 r mpc_regs +ffffffff82c12ffc r mpc_shift +ffffffff82c130d8 r mpc_mask +ffffffff82c13450 r dsc_regs +ffffffff82c1369c r dsc_shift +ffffffff82c13754 r dsc_mask +ffffffff82c13a30 r dwbc30_regs +ffffffff82c13c0c r dwbc30_shift +ffffffff82c13d40 r dwbc30_mask +ffffffff82c14210 r mcif_wb30_regs +ffffffff82c1430c r mcif_wb30_shift +ffffffff82c143b8 r mcif_wb30_mask +ffffffff82c14670 r aux_engine_regs +ffffffff82c14738 r aux_mask +ffffffff82c14798 r aux_shift +ffffffff82c147b0 r i2c_hw_regs +ffffffff82c148c8 r i2c_shifts +ffffffff82c148f4 r i2c_masks +ffffffff82c149a0 r audio_regs +ffffffff82c14ad4 r audio_shift +ffffffff82c14aec r audio_mask +ffffffff82c14b30 r stream_enc_regs +ffffffff82c151d4 r se_shift +ffffffff82c152b0 r se_mask +ffffffff82c15620 r vpg_regs +ffffffff82c15710 r vpg_shift +ffffffff82c15738 r vpg_mask +ffffffff82c157e0 r afmt_regs +ffffffff82c158b8 r afmt_shift +ffffffff82c158cc r afmt_mask +ffffffff82c15920 r hpo_dp_stream_enc_regs +ffffffff82c15b50 r hpo_dp_se_shift +ffffffff82c15b78 r hpo_dp_se_mask +ffffffff82c15c20 r apg_regs +ffffffff82c15c60 r apg_shift +ffffffff82c15c68 r apg_mask +ffffffff82c15c80 r hpo_dp_link_enc_regs +ffffffff82c15d90 r hpo_dp_le_shift +ffffffff82c15dac r hpo_dp_le_mask +ffffffff82c15e10 r hwseq_reg +ffffffff82c1602c r hwseq_shift +ffffffff82c160ac r hwseq_mask +ffffffff82c17000 r bios_regs +ffffffff82c17008 r res_cap_dcn31 +ffffffff82c17048 r debug_defaults_diags +ffffffff82c171c0 r clk_src_regs +ffffffff82c17364 r dccg_regs +ffffffff82c17450 r dccg_shift +ffffffff82c174e8 r dccg_mask +ffffffff82c17750 r abm_regs +ffffffff82c17850 r abm_shift +ffffffff82c17864 r abm_mask +ffffffff82c178b0 r res_create_funcs +ffffffff82c178e0 r res_create_maximus_funcs +ffffffff82c17910 r plane_cap +ffffffff82c17940 r link_enc_regs +ffffffff82c17fa0 r link_enc_aux_regs +ffffffff82c17ff0 r link_enc_hpd_regs +ffffffff82c18004 r le_shift +ffffffff82c180f4 r le_mask +ffffffff82c184ac r link_enc_feature +ffffffff82c184bc r panel_config_defaults +ffffffff82c184f8 r debug_defaults_drv +ffffffff82c18670 r cs_shift +ffffffff82c1867c r cs_mask +ffffffff82c186a4 r hubbub_reg +ffffffff82c18818 r hubbub_shift +ffffffff82c188a0 r hubbub_mask +ffffffff82c18ac0 r vmid_regs +ffffffff82c18c80 r vmid_shifts +ffffffff82c18c88 r vmid_masks +ffffffff82c18cb0 r hubp_regs +ffffffff82c194e0 r hubp_shift +ffffffff82c195dc r hubp_mask +ffffffff82c199d0 r dpp_regs +ffffffff82c1aed0 r tf_shift +ffffffff82c1b1a0 r tf_mask +ffffffff82c1bce0 r opp_regs +ffffffff82c1be40 r opp_shift +ffffffff82c1be78 r opp_mask +ffffffff82c1bf50 r optc_regs +ffffffff82c1c450 r optc_shift +ffffffff82c1c510 r optc_mask +ffffffff82c1c810 r mpc_regs +ffffffff82c1dffc r mpc_shift +ffffffff82c1e0d8 r mpc_mask +ffffffff82c1e450 r dsc_regs +ffffffff82c1e69c r dsc_shift +ffffffff82c1e754 r dsc_mask +ffffffff82c1ea30 r dwbc30_regs +ffffffff82c1ec0c r dwbc30_shift +ffffffff82c1ed40 r dwbc30_mask +ffffffff82c1f210 r mcif_wb30_regs +ffffffff82c1f30c r mcif_wb30_shift +ffffffff82c1f3b8 r mcif_wb30_mask +ffffffff82c1f670 r aux_engine_regs +ffffffff82c1f738 r aux_mask +ffffffff82c1f798 r aux_shift +ffffffff82c1f7b0 r i2c_hw_regs +ffffffff82c1f8c8 r i2c_shifts +ffffffff82c1f8f4 r i2c_masks +ffffffff82c1f9a0 r audio_regs +ffffffff82c1fad4 r audio_shift +ffffffff82c1faec r audio_mask +ffffffff82c1fb30 r stream_enc_regs +ffffffff82c201d4 r se_shift +ffffffff82c202b0 r se_mask +ffffffff82c20620 r vpg_regs +ffffffff82c20710 r vpg_shift +ffffffff82c20738 r vpg_mask +ffffffff82c207e0 r afmt_regs +ffffffff82c208b8 r afmt_shift +ffffffff82c208cc r afmt_mask +ffffffff82c20920 r hpo_dp_stream_enc_regs +ffffffff82c20b50 r hpo_dp_se_shift +ffffffff82c20b78 r hpo_dp_se_mask +ffffffff82c20c20 r apg_regs +ffffffff82c20c60 r apg_shift +ffffffff82c20c68 r apg_mask +ffffffff82c20c80 r hpo_dp_link_enc_regs +ffffffff82c20d90 r hpo_dp_le_shift +ffffffff82c20dac r hpo_dp_le_mask +ffffffff82c20e10 r hwseq_reg +ffffffff82c2102c r hwseq_shift +ffffffff82c210ac r hwseq_mask +ffffffff82c22000 r dccg32_funcs +ffffffff82c23000 r dcn32_link_enc_funcs +ffffffff82c24000 r dcn32_str_enc_funcs +ffffffff82c25000 r hubbub32_funcs +ffffffff82c26000 r dcn32_funcs +ffffffff82c262c0 r dcn32_private_funcs +ffffffff82c27000 R dcn32_mmhubbub_funcs +ffffffff82c28000 R dcn32_mpc_funcs +ffffffff82c29000 r res_cap_dcn32 +ffffffff82c29040 r debug_defaults_diags +ffffffff82c291b8 r dccg_shift +ffffffff82c29250 r dccg_mask +ffffffff82c294b0 r abm_shift +ffffffff82c294c4 r abm_mask +ffffffff82c29510 r res_create_funcs +ffffffff82c29540 r res_create_maximus_funcs +ffffffff82c29570 r plane_cap +ffffffff82c2959c r le_shift +ffffffff82c2968c r le_mask +ffffffff82c29a44 r link_enc_feature +ffffffff82c29a58 r debug_defaults_drv +ffffffff82c29bd0 r cs_shift +ffffffff82c29bdc r cs_mask +ffffffff82c29c04 r hubbub_shift +ffffffff82c29c8c r hubbub_mask +ffffffff82c29ea8 r vmid_shifts +ffffffff82c29eb0 r vmid_masks +ffffffff82c29ed0 r hubp_shift +ffffffff82c29fcc r hubp_mask +ffffffff82c2a3bc r tf_shift +ffffffff82c2a68c r tf_mask +ffffffff82c2b1cc r opp_shift +ffffffff82c2b204 r opp_mask +ffffffff82c2b2d8 r optc_shift +ffffffff82c2b398 r optc_mask +ffffffff82c2b698 r mpc_shift +ffffffff82c2b774 r mpc_mask +ffffffff82c2bae0 r dsc_shift +ffffffff82c2bb98 r dsc_mask +ffffffff82c2be70 r dwbc30_shift +ffffffff82c2bfa4 r dwbc30_mask +ffffffff82c2c46c r mcif_wb30_shift +ffffffff82c2c518 r mcif_wb30_mask +ffffffff82c2c7c4 r aux_mask +ffffffff82c2c824 r aux_shift +ffffffff82c2c83c r i2c_shifts +ffffffff82c2c868 r i2c_masks +ffffffff82c2c90c r audio_shift +ffffffff82c2c924 r audio_mask +ffffffff82c2c960 r se_shift +ffffffff82c2ca3c r se_mask +ffffffff82c2cda8 r vpg_shift +ffffffff82c2cdd0 r vpg_mask +ffffffff82c2ce64 r afmt_shift +ffffffff82c2ce78 r afmt_mask +ffffffff82c2cebc r hpo_dp_se_shift +ffffffff82c2cee4 r hpo_dp_se_mask +ffffffff82c2cf84 r apg_shift +ffffffff82c2cf8c r apg_mask +ffffffff82c2cfa4 r hpo_dp_le_shift +ffffffff82c2cfc0 r hpo_dp_le_mask +ffffffff82c2d024 r hwseq_shift +ffffffff82c2d0a4 r hwseq_mask +ffffffff82c2e000 r dcn321_link_enc_funcs +ffffffff82c2f000 r res_cap_dcn321 +ffffffff82c2f040 r debug_defaults_diags +ffffffff82c2f1b8 r dccg_shift +ffffffff82c2f250 r dccg_mask +ffffffff82c2f4b0 r abm_shift +ffffffff82c2f4c4 r abm_mask +ffffffff82c2f510 r res_create_funcs +ffffffff82c2f540 r res_create_maximus_funcs +ffffffff82c2f570 r plane_cap +ffffffff82c2f59c r le_shift +ffffffff82c2f68c r le_mask +ffffffff82c2fa44 r link_enc_feature +ffffffff82c2fa58 r debug_defaults_drv +ffffffff82c2fbd0 r cs_shift +ffffffff82c2fbdc r cs_mask +ffffffff82c2fc04 r hubbub_shift +ffffffff82c2fc8c r hubbub_mask +ffffffff82c2fea8 r vmid_shifts +ffffffff82c2feb0 r vmid_masks +ffffffff82c2fed0 r hubp_shift +ffffffff82c2ffcc r hubp_mask +ffffffff82c303bc r tf_shift +ffffffff82c3068c r tf_mask +ffffffff82c311cc r opp_shift +ffffffff82c31204 r opp_mask +ffffffff82c312d8 r optc_shift +ffffffff82c31398 r optc_mask +ffffffff82c31698 r mpc_shift +ffffffff82c31774 r mpc_mask +ffffffff82c31ae0 r dsc_shift +ffffffff82c31b98 r dsc_mask +ffffffff82c31e70 r dwbc30_shift +ffffffff82c31fa4 r dwbc30_mask +ffffffff82c3246c r mcif_wb30_shift +ffffffff82c32518 r mcif_wb30_mask +ffffffff82c327c4 r aux_mask +ffffffff82c32824 r aux_shift +ffffffff82c3283c r i2c_shifts +ffffffff82c32868 r i2c_masks +ffffffff82c3290c r audio_shift +ffffffff82c32924 r audio_mask +ffffffff82c32960 r se_shift +ffffffff82c32a3c r se_mask +ffffffff82c32da8 r vpg_shift +ffffffff82c32dd0 r vpg_mask +ffffffff82c32e64 r afmt_shift +ffffffff82c32e78 r afmt_mask +ffffffff82c32ebc r hpo_dp_se_shift +ffffffff82c32ee4 r hpo_dp_se_mask +ffffffff82c32f84 r apg_shift +ffffffff82c32f8c r apg_mask +ffffffff82c32fa4 r hpo_dp_le_shift +ffffffff82c32fc0 r hpo_dp_le_mask +ffffffff82c33024 r hwseq_shift +ffffffff82c330a4 r hwseq_mask +ffffffff82c35000 R dcn10_soc_defaults +ffffffff82c3508c R dcn10_ip_defaults +ffffffff82c40000 R dml20_funcs +ffffffff82c40030 R dml20v2_funcs +ffffffff82c40060 R dml21_funcs +ffffffff82c40090 R dml30_funcs +ffffffff82c400c0 R dml31_funcs +ffffffff82c400f0 R dml314_funcs +ffffffff82c40120 R dml32_funcs +ffffffff82c43000 R qp_table_422_10bpc_min +ffffffff82c43740 R qp_table_444_8bpc_max +ffffffff82c44080 R qp_table_420_12bpc_max +ffffffff82c447c0 R qp_table_444_10bpc_min +ffffffff82c45400 R qp_table_420_8bpc_max +ffffffff82c45840 R qp_table_444_8bpc_min +ffffffff82c46180 R qp_table_444_12bpc_min +ffffffff82c470c0 R qp_table_420_12bpc_min +ffffffff82c47800 R qp_table_422_12bpc_min +ffffffff82c48140 R qp_table_422_12bpc_max +ffffffff82c48a80 R qp_table_444_12bpc_max +ffffffff82c499c0 R qp_table_420_8bpc_min +ffffffff82c49e00 R qp_table_422_8bpc_min +ffffffff82c4a340 R qp_table_422_10bpc_max +ffffffff82c4aa80 R qp_table_420_10bpc_max +ffffffff82c4b040 R qp_table_420_10bpc_min +ffffffff82c4b600 R qp_table_444_10bpc_max +ffffffff82c4c240 R qp_table_422_8bpc_max ffffffff82c4e000 r funcs ffffffff82c4e050 r hpd_regs ffffffff82c4e1a0 r hpd_shift @@ -45322,111 +45323,111 @@ ffffffff82c521c0 r ddc_data_regs ffffffff82c523a0 r ddc_clk_regs ffffffff82c52580 r ddc_shift ffffffff82c525a8 r ddc_mask -ffffffff82c525d0 r generic_regs -ffffffff82c52640 r generic_shift -ffffffff82c52650 r generic_mask ffffffff82c53000 r funcs ffffffff82c54000 r funcs ffffffff82c54050 r hpd_regs ffffffff82c541a0 r hpd_shift ffffffff82c541b0 r hpd_mask -ffffffff82c541c0 r ddc_data_regs_dcn -ffffffff82c54370 r ddc_clk_regs_dcn -ffffffff82c54520 r ddc_shift -ffffffff82c54640 r ddc_mask -ffffffff82c54760 r generic_regs -ffffffff82c547d0 r generic_shift -ffffffff82c547e0 r generic_mask +ffffffff82c541c0 r ddc_data_regs +ffffffff82c543a0 r ddc_clk_regs +ffffffff82c54580 r ddc_shift +ffffffff82c545a8 r ddc_mask +ffffffff82c545d0 r generic_regs +ffffffff82c54640 r generic_shift +ffffffff82c54650 r generic_mask ffffffff82c55000 r funcs ffffffff82c56000 r funcs ffffffff82c56050 r hpd_regs -ffffffff82c56168 r hpd_shift -ffffffff82c56178 r hpd_mask -ffffffff82c56190 r ddc_data_regs_dcn -ffffffff82c562c0 r ddc_clk_regs_dcn -ffffffff82c563f0 r ddc_shift -ffffffff82c564e0 r ddc_mask -ffffffff82c565d0 r generic_regs -ffffffff82c56604 r generic_shift -ffffffff82c5660c r generic_mask +ffffffff82c561a0 r hpd_shift +ffffffff82c561b0 r hpd_mask +ffffffff82c561c0 r ddc_data_regs_dcn +ffffffff82c56370 r ddc_clk_regs_dcn +ffffffff82c56520 r ddc_shift +ffffffff82c56640 r ddc_mask +ffffffff82c56760 r generic_regs +ffffffff82c567d0 r generic_shift +ffffffff82c567e0 r generic_mask ffffffff82c57000 r funcs ffffffff82c58000 r funcs ffffffff82c58050 r hpd_regs -ffffffff82c581a0 r hpd_shift -ffffffff82c581b0 r hpd_mask -ffffffff82c581c0 r ddc_data_regs_dcn -ffffffff82c58370 r ddc_clk_regs_dcn -ffffffff82c58520 r ddc_shift -ffffffff82c58640 r ddc_mask -ffffffff82c58760 r generic_regs -ffffffff82c587d0 r generic_shift -ffffffff82c587e0 r generic_mask +ffffffff82c58168 r hpd_shift +ffffffff82c58178 r hpd_mask +ffffffff82c58190 r ddc_data_regs_dcn +ffffffff82c582c0 r ddc_clk_regs_dcn +ffffffff82c583f0 r ddc_shift +ffffffff82c584e0 r ddc_mask +ffffffff82c585d0 r generic_regs +ffffffff82c58604 r generic_shift +ffffffff82c5860c r generic_mask ffffffff82c59000 r funcs ffffffff82c5a000 r funcs ffffffff82c5a050 r hpd_regs -ffffffff82c5a168 r hpd_shift -ffffffff82c5a178 r hpd_mask -ffffffff82c5a190 r ddc_data_regs_dcn -ffffffff82c5a300 r ddc_clk_regs_dcn -ffffffff82c5a470 r ddc_shift -ffffffff82c5a560 r ddc_mask -ffffffff82c5a650 r generic_regs -ffffffff82c5a6c0 r generic_shift -ffffffff82c5a6d0 r generic_mask +ffffffff82c5a1a0 r hpd_shift +ffffffff82c5a1b0 r hpd_mask +ffffffff82c5a1c0 r ddc_data_regs_dcn +ffffffff82c5a370 r ddc_clk_regs_dcn +ffffffff82c5a520 r ddc_shift +ffffffff82c5a640 r ddc_mask +ffffffff82c5a760 r generic_regs +ffffffff82c5a7d0 r generic_shift +ffffffff82c5a7e0 r generic_mask ffffffff82c5b000 r funcs ffffffff82c5c000 r funcs ffffffff82c5c050 r hpd_regs ffffffff82c5c168 r hpd_shift ffffffff82c5c178 r hpd_mask ffffffff82c5c190 r ddc_data_regs_dcn -ffffffff82c5c340 r ddc_clk_regs_dcn -ffffffff82c5c4f0 r ddc_shift -ffffffff82c5c610 r ddc_mask -ffffffff82c5c730 r generic_regs -ffffffff82c5c7a0 r generic_shift -ffffffff82c5c7b0 r generic_mask +ffffffff82c5c300 r ddc_clk_regs_dcn +ffffffff82c5c470 r ddc_shift +ffffffff82c5c560 r ddc_mask +ffffffff82c5c650 r generic_regs +ffffffff82c5c6c0 r generic_shift +ffffffff82c5c6d0 r generic_mask ffffffff82c5d000 r funcs ffffffff82c5e000 r funcs +ffffffff82c5e050 r hpd_regs +ffffffff82c5e168 r hpd_shift +ffffffff82c5e178 r hpd_mask +ffffffff82c5e190 r ddc_data_regs_dcn +ffffffff82c5e340 r ddc_clk_regs_dcn +ffffffff82c5e4f0 r ddc_shift +ffffffff82c5e610 r ddc_mask +ffffffff82c5e730 r generic_regs +ffffffff82c5e7a0 r generic_shift +ffffffff82c5e7b0 r generic_mask ffffffff82c5f000 r funcs ffffffff82c60000 r funcs -ffffffff82c61000 r hdmi_14_protection -ffffffff82c61010 r dp_11_protection -ffffffff82c61020 r hdcp_i2c_offsets -ffffffff82c61050 r hdcp_dpcd_addrs -ffffffff82c62000 r irq_service_funcs_dce110 -ffffffff82c62010 r irq_source_info_dce110 -ffffffff82c632a0 r dummy_irq_info_funcs -ffffffff82c632b0 r hpd_irq_info_funcs -ffffffff82c632c0 r hpd_rx_irq_info_funcs -ffffffff82c632d0 r pflip_irq_info_funcs -ffffffff82c632e0 r vupdate_irq_info_funcs -ffffffff82c632f0 r vblank_irq_info_funcs -ffffffff82c64000 r irq_service_funcs_dce120 -ffffffff82c64008 r dummy_irq_info_funcs -ffffffff82c64018 r hpd_irq_info_funcs -ffffffff82c64028 r hpd_rx_irq_info_funcs -ffffffff82c64038 r pflip_irq_info_funcs -ffffffff82c64048 r vupdate_irq_info_funcs -ffffffff82c64058 r vblank_irq_info_funcs -ffffffff82c64070 r irq_source_info_dce120 -ffffffff82c66000 r irq_service_funcs_dce80 +ffffffff82c61000 r funcs +ffffffff82c62000 r funcs +ffffffff82c63000 r hdmi_14_protection +ffffffff82c63010 r dp_11_protection +ffffffff82c63020 r hdcp_i2c_offsets +ffffffff82c63050 r hdcp_dpcd_addrs +ffffffff82c64000 r irq_service_funcs_dce110 +ffffffff82c64010 r irq_source_info_dce110 +ffffffff82c652a0 r dummy_irq_info_funcs +ffffffff82c652b0 r hpd_irq_info_funcs +ffffffff82c652c0 r hpd_rx_irq_info_funcs +ffffffff82c652d0 r pflip_irq_info_funcs +ffffffff82c652e0 r vupdate_irq_info_funcs +ffffffff82c652f0 r vblank_irq_info_funcs +ffffffff82c66000 r irq_service_funcs_dce120 ffffffff82c66008 r dummy_irq_info_funcs ffffffff82c66018 r hpd_irq_info_funcs ffffffff82c66028 r hpd_rx_irq_info_funcs ffffffff82c66038 r pflip_irq_info_funcs ffffffff82c66048 r vupdate_irq_info_funcs ffffffff82c66058 r vblank_irq_info_funcs -ffffffff82c66070 r irq_source_info_dce80 -ffffffff82c68000 r irq_service_funcs_dcn10 +ffffffff82c66070 r irq_source_info_dce120 +ffffffff82c68000 r irq_service_funcs_dce80 ffffffff82c68008 r dummy_irq_info_funcs ffffffff82c68018 r hpd_irq_info_funcs ffffffff82c68028 r hpd_rx_irq_info_funcs ffffffff82c68038 r pflip_irq_info_funcs -ffffffff82c68048 r vupdate_no_lock_irq_info_funcs +ffffffff82c68048 r vupdate_irq_info_funcs ffffffff82c68058 r vblank_irq_info_funcs -ffffffff82c68068 r vline0_irq_info_funcs -ffffffff82c68080 r irq_source_info_dcn10 -ffffffff82c6a000 r irq_service_funcs_dcn20 +ffffffff82c68070 r irq_source_info_dce80 +ffffffff82c6a000 r irq_service_funcs_dcn10 ffffffff82c6a008 r dummy_irq_info_funcs ffffffff82c6a018 r hpd_irq_info_funcs ffffffff82c6a028 r hpd_rx_irq_info_funcs @@ -45434,8 +45435,8 @@ ffffffff82c6a038 r pflip_irq_info_funcs ffffffff82c6a048 r vupdate_no_lock_irq_info_funcs ffffffff82c6a058 r vblank_irq_info_funcs ffffffff82c6a068 r vline0_irq_info_funcs -ffffffff82c6a080 r irq_source_info_dcn20 -ffffffff82c6c000 r irq_service_funcs_dcn201 +ffffffff82c6a080 r irq_source_info_dcn10 +ffffffff82c6c000 r irq_service_funcs_dcn20 ffffffff82c6c008 r dummy_irq_info_funcs ffffffff82c6c018 r hpd_irq_info_funcs ffffffff82c6c028 r hpd_rx_irq_info_funcs @@ -45443,19 +45444,18 @@ ffffffff82c6c038 r pflip_irq_info_funcs ffffffff82c6c048 r vupdate_no_lock_irq_info_funcs ffffffff82c6c058 r vblank_irq_info_funcs ffffffff82c6c068 r vline0_irq_info_funcs -ffffffff82c6c080 r irq_source_info_dcn201 -ffffffff82c6e000 r irq_source_info_dcn21 -ffffffff82c6f290 r irq_service_funcs_dcn21 -ffffffff82c6f298 r dummy_irq_info_funcs -ffffffff82c6f2a8 r hpd_irq_info_funcs -ffffffff82c6f2b8 r hpd_rx_irq_info_funcs -ffffffff82c6f2c8 r pflip_irq_info_funcs -ffffffff82c6f2d8 r vupdate_no_lock_irq_info_funcs -ffffffff82c6f2e8 r vblank_irq_info_funcs -ffffffff82c6f2f8 r vline0_irq_info_funcs -ffffffff82c6f308 r dmub_outbox_irq_info_funcs -ffffffff82c70000 r irq_source_info_dcn30 -ffffffff82c71290 r irq_service_funcs_dcn30 +ffffffff82c6c080 r irq_source_info_dcn20 +ffffffff82c6e000 r irq_service_funcs_dcn201 +ffffffff82c6e008 r dummy_irq_info_funcs +ffffffff82c6e018 r hpd_irq_info_funcs +ffffffff82c6e028 r hpd_rx_irq_info_funcs +ffffffff82c6e038 r pflip_irq_info_funcs +ffffffff82c6e048 r vupdate_no_lock_irq_info_funcs +ffffffff82c6e058 r vblank_irq_info_funcs +ffffffff82c6e068 r vline0_irq_info_funcs +ffffffff82c6e080 r irq_source_info_dcn201 +ffffffff82c70000 r irq_source_info_dcn21 +ffffffff82c71290 r irq_service_funcs_dcn21 ffffffff82c71298 r dummy_irq_info_funcs ffffffff82c712a8 r hpd_irq_info_funcs ffffffff82c712b8 r hpd_rx_irq_info_funcs @@ -45463,9 +45463,9 @@ ffffffff82c712c8 r pflip_irq_info_funcs ffffffff82c712d8 r vupdate_no_lock_irq_info_funcs ffffffff82c712e8 r vblank_irq_info_funcs ffffffff82c712f8 r vline0_irq_info_funcs -ffffffff82c71308 r dmub_trace_irq_info_funcs -ffffffff82c72000 r irq_source_info_dcn302 -ffffffff82c73290 r irq_service_funcs_dcn302 +ffffffff82c71308 r dmub_outbox_irq_info_funcs +ffffffff82c72000 r irq_source_info_dcn30 +ffffffff82c73290 r irq_service_funcs_dcn30 ffffffff82c73298 r dummy_irq_info_funcs ffffffff82c732a8 r hpd_irq_info_funcs ffffffff82c732b8 r hpd_rx_irq_info_funcs @@ -45474,27 +45474,27 @@ ffffffff82c732d8 r vupdate_no_lock_irq_info_funcs ffffffff82c732e8 r vblank_irq_info_funcs ffffffff82c732f8 r vline0_irq_info_funcs ffffffff82c73308 r dmub_trace_irq_info_funcs -ffffffff82c74000 r irq_service_funcs_dcn303 -ffffffff82c74008 r dummy_irq_info_funcs -ffffffff82c74018 r hpd_irq_info_funcs -ffffffff82c74028 r hpd_rx_irq_info_funcs -ffffffff82c74038 r pflip_irq_info_funcs -ffffffff82c74048 r vupdate_no_lock_irq_info_funcs -ffffffff82c74058 r vblank_irq_info_funcs -ffffffff82c74068 r vline0_irq_info_funcs -ffffffff82c74080 r irq_source_info_dcn303 -ffffffff82c76000 r irq_source_info_dcn31 -ffffffff82c77290 r irq_service_funcs_dcn31 -ffffffff82c77298 r dummy_irq_info_funcs -ffffffff82c772a8 r hpd_irq_info_funcs -ffffffff82c772b8 r hpd_rx_irq_info_funcs -ffffffff82c772c8 r pflip_irq_info_funcs -ffffffff82c772d8 r vupdate_no_lock_irq_info_funcs -ffffffff82c772e8 r vblank_irq_info_funcs -ffffffff82c772f8 r vline0_irq_info_funcs -ffffffff82c77308 r outbox_irq_info_funcs -ffffffff82c78000 r irq_source_info_dcn314 -ffffffff82c79290 r irq_service_funcs_dcn314 +ffffffff82c74000 r irq_source_info_dcn302 +ffffffff82c75290 r irq_service_funcs_dcn302 +ffffffff82c75298 r dummy_irq_info_funcs +ffffffff82c752a8 r hpd_irq_info_funcs +ffffffff82c752b8 r hpd_rx_irq_info_funcs +ffffffff82c752c8 r pflip_irq_info_funcs +ffffffff82c752d8 r vupdate_no_lock_irq_info_funcs +ffffffff82c752e8 r vblank_irq_info_funcs +ffffffff82c752f8 r vline0_irq_info_funcs +ffffffff82c75308 r dmub_trace_irq_info_funcs +ffffffff82c76000 r irq_service_funcs_dcn303 +ffffffff82c76008 r dummy_irq_info_funcs +ffffffff82c76018 r hpd_irq_info_funcs +ffffffff82c76028 r hpd_rx_irq_info_funcs +ffffffff82c76038 r pflip_irq_info_funcs +ffffffff82c76048 r vupdate_no_lock_irq_info_funcs +ffffffff82c76058 r vblank_irq_info_funcs +ffffffff82c76068 r vline0_irq_info_funcs +ffffffff82c76080 r irq_source_info_dcn303 +ffffffff82c78000 r irq_source_info_dcn31 +ffffffff82c79290 r irq_service_funcs_dcn31 ffffffff82c79298 r dummy_irq_info_funcs ffffffff82c792a8 r hpd_irq_info_funcs ffffffff82c792b8 r hpd_rx_irq_info_funcs @@ -45503,8 +45503,8 @@ ffffffff82c792d8 r vupdate_no_lock_irq_info_funcs ffffffff82c792e8 r vblank_irq_info_funcs ffffffff82c792f8 r vline0_irq_info_funcs ffffffff82c79308 r outbox_irq_info_funcs -ffffffff82c7a000 r irq_source_info_dcn315 -ffffffff82c7b290 r irq_service_funcs_dcn315 +ffffffff82c7a000 r irq_source_info_dcn314 +ffffffff82c7b290 r irq_service_funcs_dcn314 ffffffff82c7b298 r dummy_irq_info_funcs ffffffff82c7b2a8 r hpd_irq_info_funcs ffffffff82c7b2b8 r hpd_rx_irq_info_funcs @@ -45513,8 +45513,8 @@ ffffffff82c7b2d8 r vupdate_no_lock_irq_info_funcs ffffffff82c7b2e8 r vblank_irq_info_funcs ffffffff82c7b2f8 r vline0_irq_info_funcs ffffffff82c7b308 r outbox_irq_info_funcs -ffffffff82c7c000 r irq_source_info_dcn32 -ffffffff82c7d290 r irq_service_funcs_dcn32 +ffffffff82c7c000 r irq_source_info_dcn315 +ffffffff82c7d290 r irq_service_funcs_dcn315 ffffffff82c7d298 r dummy_irq_info_funcs ffffffff82c7d2a8 r hpd_irq_info_funcs ffffffff82c7d2b8 r hpd_rx_irq_info_funcs @@ -45523,9124 +45523,9104 @@ ffffffff82c7d2d8 r vupdate_no_lock_irq_info_funcs ffffffff82c7d2e8 r vblank_irq_info_funcs ffffffff82c7d2f8 r vline0_irq_info_funcs ffffffff82c7d308 r outbox_irq_info_funcs -ffffffff82c7e000 r dio_link_hwss -ffffffff82c7f000 r dpia_link_hwss -ffffffff82c80000 r hpo_dp_link_hwss -ffffffff82c81000 r virtual_lnk_enc_funcs -ffffffff82c82000 r virtual_link_hwss -ffffffff82c83000 r virtual_str_enc_funcs -ffffffff82c84000 R dmub_srv_dcn20_regs -ffffffff82c85000 R dmub_srv_dcn21_regs -ffffffff82c86000 R dmub_srv_dcn30_regs -ffffffff82c87000 R dmub_srv_dcn301_regs -ffffffff82c88000 R dmub_srv_dcn302_regs -ffffffff82c89000 R dmub_srv_dcn303_regs -ffffffff82c8a000 R dmub_srv_dcn31_regs -ffffffff82c8b000 R dmub_srv_dcn314_regs -ffffffff82c8c000 R dmub_srv_dcn315_regs -ffffffff82c8d000 R dmub_srv_dcn316_regs -ffffffff82c8e000 R dmub_srv_dcn32_regs -ffffffff82c8f000 r numerator01 -ffffffff82c8f020 r numerator02 -ffffffff82c8f040 r numerator04 -ffffffff82c8f060 r numerator05 -ffffffff82c91000 r abm_settings -ffffffff82c91010 r abm_settings_config0 -ffffffff82c91050 r abm_settings_config1 -ffffffff82c91088 r min_reduction_table_v_2_2 -ffffffff82c91095 r max_reduction_table_v_2_2 -ffffffff82c910a2 r min_reduction_table -ffffffff82c910af r max_reduction_table -ffffffff82c92000 R amdgpu_pp_profile_name -ffffffff82c93000 r pp_lib_thermal_controller_names -ffffffff82c94000 r pp_ip_funcs -ffffffff82c940a0 R pp_smu_ip_block -ffffffff82c940b8 r pp_dpm_funcs -ffffffff82c95000 r gpio_tbl -ffffffff82c950f0 r enable_fb_req_rej_tbl -ffffffff82c95140 r use_bclk_tbl -ffffffff82c95310 r turn_off_plls_tbl -ffffffff82c95640 r enter_baco_tbl -ffffffff82c95730 r exit_baco_tbl -ffffffff82c95850 r clean_baco_tbl -ffffffff82c96000 r gpio_tbl -ffffffff82c960f0 r enable_fb_req_rej_tbl -ffffffff82c96140 r use_bclk_tbl -ffffffff82c962e0 r turn_off_plls_tbl -ffffffff82c96370 r clk_req_b_tbl -ffffffff82c96490 r enter_baco_tbl -ffffffff82c965b0 r exit_baco_tbl -ffffffff82c966d0 r clean_baco_tbl +ffffffff82c7e000 r irq_source_info_dcn32 +ffffffff82c7f290 r irq_service_funcs_dcn32 +ffffffff82c7f298 r dummy_irq_info_funcs +ffffffff82c7f2a8 r hpd_irq_info_funcs +ffffffff82c7f2b8 r hpd_rx_irq_info_funcs +ffffffff82c7f2c8 r pflip_irq_info_funcs +ffffffff82c7f2d8 r vupdate_no_lock_irq_info_funcs +ffffffff82c7f2e8 r vblank_irq_info_funcs +ffffffff82c7f2f8 r vline0_irq_info_funcs +ffffffff82c7f308 r outbox_irq_info_funcs +ffffffff82c80000 r dio_link_hwss +ffffffff82c81000 r dpia_link_hwss +ffffffff82c82000 r hpo_dp_link_hwss +ffffffff82c83000 r virtual_lnk_enc_funcs +ffffffff82c84000 r virtual_link_hwss +ffffffff82c85000 r virtual_str_enc_funcs +ffffffff82c86000 R dmub_srv_dcn20_regs +ffffffff82c87000 R dmub_srv_dcn21_regs +ffffffff82c88000 R dmub_srv_dcn30_regs +ffffffff82c89000 R dmub_srv_dcn301_regs +ffffffff82c8a000 R dmub_srv_dcn302_regs +ffffffff82c8b000 R dmub_srv_dcn303_regs +ffffffff82c8c000 R dmub_srv_dcn31_regs +ffffffff82c8d000 R dmub_srv_dcn314_regs +ffffffff82c8e000 R dmub_srv_dcn315_regs +ffffffff82c8f000 R dmub_srv_dcn316_regs +ffffffff82c90000 R dmub_srv_dcn32_regs +ffffffff82c91000 r numerator01 +ffffffff82c91020 r numerator02 +ffffffff82c91040 r numerator04 +ffffffff82c91060 r numerator05 +ffffffff82c93000 r abm_settings +ffffffff82c93010 r abm_settings_config0 +ffffffff82c93050 r abm_settings_config1 +ffffffff82c93088 r min_reduction_table_v_2_2 +ffffffff82c93095 r max_reduction_table_v_2_2 +ffffffff82c930a2 r min_reduction_table +ffffffff82c930af r max_reduction_table +ffffffff82c94000 R amdgpu_pp_profile_name +ffffffff82c95000 r pp_lib_thermal_controller_names +ffffffff82c96000 r pp_ip_funcs +ffffffff82c960a0 R pp_smu_ip_block +ffffffff82c960b8 r pp_dpm_funcs ffffffff82c97000 r gpio_tbl ffffffff82c970f0 r enable_fb_req_rej_tbl -ffffffff82c97140 r use_bclk_tbl_vg -ffffffff82c97200 r turn_off_plls_tbl_vg -ffffffff82c97350 r use_bclk_tbl -ffffffff82c97440 r turn_off_plls_tbl -ffffffff82c975f0 r clk_req_b_tbl -ffffffff82c97710 r enter_baco_tbl -ffffffff82c97830 r exit_baco_tbl -ffffffff82c97950 r clean_baco_tbl -ffffffff82c98000 r vega10_fuses_default -ffffffff82ca7000 r pp_r600_encode_lanes -ffffffff82ca8000 R pptable_v1_0_funcs -ffffffff82ca9000 R pptable_funcs -ffffffff82ca9020 r soft_dummy_pp_table -ffffffff82caa000 r smu10_hwmgr_funcs -ffffffff82cab000 r smu7_hwmgr_funcs -ffffffff82cab2f8 r smu7_irq_funcs -ffffffff82cab310 r SMU7ThermalPolicy -ffffffff82cac000 r GCCACConfig_Polaris10 -ffffffff82cac1b0 r DIDTConfig_Polaris10 -ffffffff82caca50 r GCCACConfig_Polaris11 -ffffffff82cacc00 r DIDTConfig_Polaris11_Kicker -ffffffff82cad4a0 r DIDTConfig_Polaris11 -ffffffff82cadd40 r DIDTConfig_Polaris12 -ffffffff82cae5e0 r GCCACConfig_VegaM -ffffffff82cae790 r DIDTConfig_VegaM -ffffffff82cb0000 r smu8_hwmgr_funcs -ffffffff82cb02f0 r SMU7ThermalPolicy -ffffffff82cb1000 r smu9_irq_funcs -ffffffff82cb2000 r gpio_tbl_iceland -ffffffff82cb2060 r gpio_tbl -ffffffff82cb2150 r enable_fb_req_rej_tbl -ffffffff82cb21a0 r use_bclk_tbl -ffffffff82cb2370 r turn_off_plls_tbl -ffffffff82cb2610 r enter_baco_tbl -ffffffff82cb2730 r exit_baco_tbl_iceland -ffffffff82cb2870 r clean_baco_tbl_iceland -ffffffff82cb2890 r exit_baco_tbl -ffffffff82cb29b0 r clean_baco_tbl -ffffffff82cb3000 r pre_baco_tbl -ffffffff82cb3090 r enter_baco_tbl -ffffffff82cb32b0 r exit_baco_tbl -ffffffff82cb3520 r clean_baco_tbl -ffffffff82cb4000 r vega10_hwmgr_funcs -ffffffff82cb42f0 r channel_number -ffffffff82cb4320 r SMU7ThermalWithDelayPolicy -ffffffff82cb5000 r SEDiDtStallCtrlConfig_vega10 -ffffffff82cb5110 r SEDiDtStallPatternConfig_vega10 -ffffffff82cb52e0 r SEDiDtWeightConfig_Vega10 -ffffffff82cb53b0 r SEDiDtCtrl1Config_Vega10 -ffffffff82cb5440 r SEDiDtCtrl2Config_Vega10 -ffffffff82cb5510 r SEDiDtCtrl3Config_vega10 -ffffffff82cb5820 r SEDiDtTuningCtrlConfig_Vega10 -ffffffff82cb58b0 r SELCacConfig_Vega10 -ffffffff82cb5a40 r SEDiDtCtrl0Config_Vega10 -ffffffff82cb5d10 r AvfsPSMInitConfig_vega10 -ffffffff82cb5d90 r SEEDCStallPatternConfig_Vega10 -ffffffff82cb5ea0 r SEEDCStallDelayConfig_Vega10 -ffffffff82cb5f80 r SEEDCCtrlConfig_Vega10 -ffffffff82cb6040 r PSMSEEDCStallPatternConfig_Vega10 -ffffffff82cb60c0 r PSMSEEDCStallDelayConfig_Vega10 -ffffffff82cb61d0 r PSMSEEDCCtrlResetConfig_Vega10 -ffffffff82cb6290 r PSMSEEDCCtrlConfig_Vega10 -ffffffff82cb6350 r SEEDCForceStallPatternConfig_Vega10 -ffffffff82cb63e0 r SEEDCCtrlForceStallConfig_Vega10 -ffffffff82cb7000 R vega10_pptable_funcs -ffffffff82cb8000 r pre_baco_tbl -ffffffff82cb8090 r enter_baco_tbl -ffffffff82cb82b0 r exit_baco_tbl -ffffffff82cb8520 r clean_baco_tbl -ffffffff82cb9000 r vega12_hwmgr_funcs -ffffffff82cb92f0 r SMU7ThermalWithDelayPolicy -ffffffff82cb9340 r link_width -ffffffff82cba000 R vega12_pptable_funcs -ffffffff82cbb000 r clean_baco_tbl -ffffffff82cbc000 r vega20_hwmgr_funcs -ffffffff82cbc2f0 r SMU7ThermalWithDelayPolicy -ffffffff82cbc340 r link_width -ffffffff82cbd000 R vega20_pptable_funcs -ffffffff82cbe000 R ci_smu_funcs -ffffffff82cbe0e0 r defaults_hawaii_pro -ffffffff82cbe12c r defaults_hawaii_xt -ffffffff82cbe178 r defaults_saturn_xt -ffffffff82cbe1c4 r defaults_bonaire_xt -ffffffff82cbe210 r ci_program_jump_on_start.data -ffffffff82cbf000 R fiji_smu_funcs -ffffffff82cbf0e0 r avfs_graphics_level -ffffffff82cbf240 r fiji_power_tune_data_set_array -ffffffff82cbf246 r fiji_clock_stretch_amount_conversion -ffffffff82cbf260 r fiji_clock_stretcher_ddt_table -ffffffff82cc0000 R iceland_smu_funcs -ffffffff82cc00e0 r defaults_icelandxt -ffffffff82cc012c r defaults_icelandpro -ffffffff82cc0178 r defaults_iceland -ffffffff82cc1000 R polaris10_smu_funcs -ffffffff82cc10e0 r avfs_graphics_level_polaris10 -ffffffff82cc12a0 r avfs_memory_level_polaris10 -ffffffff82cc12c0 r polaris10_power_tune_data_set_array -ffffffff82cc1310 r Range_Table -ffffffff82cc2000 R smu10_smu_funcs -ffffffff82cc3000 r smu7_program_jump_on_start.data -ffffffff82cc3010 r pwr_virus_table_pre -ffffffff82cc3680 r pwr_virus_table_post -ffffffff82cc3f80 r pwr_virus_section1 -ffffffff82cc4610 r pwr_virus_section2 -ffffffff82cc4660 r pwr_virus_section3 -ffffffff82ccbab0 r pwr_virus_section4 -ffffffff82ccbe80 r pwr_virus_section5 -ffffffff82ccc490 r pwr_virus_section6 -ffffffff82cce000 R smu8_smu_funcs -ffffffff82ccf000 R tonga_smu_funcs -ffffffff82ccf0e0 r tonga_power_tune_data_set_array -ffffffff82ccf12c r tonga_clock_stretch_amount_conversion -ffffffff82ccf140 r tonga_clock_stretcher_ddt_table -ffffffff82cd0000 R vega10_smu_funcs -ffffffff82cd1000 R vega12_smu_funcs -ffffffff82cd2000 R vega20_smu_funcs -ffffffff82cd3000 R vegam_smu_funcs -ffffffff82cd30e0 r vegam_power_tune_data_set_array -ffffffff82cd3130 r Range_Table -ffffffff82cd4000 R smu_ip_funcs -ffffffff82cd40a0 R smu_v11_0_ip_block -ffffffff82cd40b8 R smu_v12_0_ip_block -ffffffff82cd40d0 R smu_v13_0_ip_block -ffffffff82cd40e8 r swsmu_pm_funcs -ffffffff82cd5000 r arcturus_table_map -ffffffff82cd5080 r arcturus_pwr_src_map -ffffffff82cd5090 r arcturus_workload_map -ffffffff82cd50d0 r arcturus_ppt_funcs -ffffffff82cd54a0 r smu11_thermal_policy -ffffffff82cd54f8 r arcturus_i2c_algo -ffffffff82cd5508 r arcturus_i2c_control_quirks -ffffffff82cd5520 r arcturus_throttler_map -ffffffff82cd5540 r arcturus_message_map -ffffffff82cd5f90 r arcturus_clk_map -ffffffff82cd6050 r arcturus_feature_mask_map -ffffffff82cd7000 r cyan_skillfish_ppt_funcs -ffffffff82cd8000 r navi10_ppt_funcs -ffffffff82cd83d0 r smu11_thermal_policy -ffffffff82cd8428 r navi10_i2c_algo -ffffffff82cd8438 r navi10_i2c_control_quirks -ffffffff82cd8450 r navi1x_throttler_map -ffffffff82cd8470 r NoDbiPrbs7 -ffffffff82cd9470 r DbiPrbs7 -ffffffff82cdb000 r sienna_cichlid_ppt_funcs -ffffffff82cdb3d0 r smu11_thermal_policy -ffffffff82cdb428 r sienna_cichlid_i2c_algo -ffffffff82cdb438 r sienna_cichlid_i2c_control_quirks -ffffffff82cdb450 r sienna_cichlid_throttler_map -ffffffff82cdc000 r smu_v11_0_irq_funcs -ffffffff82cdc010 r link_width -ffffffff82cdd000 r vangogh_ppt_funcs -ffffffff82cdd3d0 r vangogh_throttler_map -ffffffff82cde000 r renoir_ppt_funcs -ffffffff82cde3d0 r renoir_throttler_map -ffffffff82cdf000 r aldebaran_clk_map -ffffffff82cdf0c0 r aldebaran_table_map -ffffffff82cdf140 r aldebaran_ppt_funcs -ffffffff82cdf510 r smu13_thermal_policy -ffffffff82cdf568 r aldebaran_i2c_algo -ffffffff82cdf578 r aldebaran_i2c_control_quirks -ffffffff82cdf590 r aldebaran_throttler_map -ffffffff82cdf5b0 r aldebaran_message_map -ffffffff82ce0000 r aldebaran_feature_mask_map -ffffffff82ce1000 r smu_v13_0_irq_funcs -ffffffff82ce1010 r link_width -ffffffff82ce2000 r smu_v13_0_0_ppt_funcs -ffffffff82ce23d0 r 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r pitchtab -ffffffff82d1d000 R lpt_isa_ca -ffffffff82d1e000 R wbsio_ca -ffffffff82d1f000 R schsio_ca -ffffffff82d20000 R lm_isa_ca -ffffffff82d20028 R lm_wbsio_ca -ffffffff82d21000 R it_sensors -ffffffff82d21110 R it_vrfact -ffffffff82d21140 R it_fan_regs -ffffffff82d21160 R it_fan_ext_regs -ffffffff82d21178 R it_ca -ffffffff82d22000 R abitkv_sensors -ffffffff82d22200 R abitaa_sensors -ffffffff82d22480 R abitav_sensors -ffffffff82d22700 R abitas_sensors -ffffffff82d22980 R abitax_sensors -ffffffff82d22bc0 R abitm4_sensors -ffffffff82d22e80 R abitan_sensors -ffffffff82d23120 R abital_sensors -ffffffff82d233a0 R abitaw_sensors -ffffffff82d23700 R abitni_sensors -ffffffff82d239a0 R abitat_sensors -ffffffff82d23cc0 R abitan2_sensors -ffffffff82d23f60 R abitab_sensors -ffffffff82d24220 R abitan3_sensors -ffffffff82d24500 R abitaw2_sensors -ffffffff82d24860 R abitat2_sensors -ffffffff82d24b60 R abitab2_sensors -ffffffff82d24ea0 R abitin_sensors -ffffffff82d251e0 R uguru_ca -ffffffff82d26000 R aps_ca -ffffffff82d27000 R wsdisplay_emul_ca -ffffffff82d27030 r charClass -ffffffff82d28000 r usl_syncops -ffffffff82d29000 R wsevent_filtops -ffffffff82d2a000 R wskbd_ca -ffffffff82d2b000 r latin1_to_upper -ffffffff82d2c000 R wsmouse_ca -ffffffff82d2d000 R cyrillic_to_koi8 -ffffffff82d2d060 R unicode_to_latin2 -ffffffff82d2d0e0 R unicode_to_latin7 -ffffffff82d2e000 R wsemul_vt100_ops -ffffffff82d2f000 r decspcgr2uni -ffffffff82d2f100 r dectech2uni -ffffffff82d2f200 r nrctable -ffffffff82d2f320 r nrcovlpos -ffffffff82d30000 r vt100_fkeys -ffffffff82d300c0 r vt100_pfkeys -ffffffff82d300e0 r vt100_numpad -ffffffff82d31000 R pckbd_ca -ffffffff82d31028 R pckbd_accessops -ffffffff82d31040 R pckbd_consops -ffffffff82d31060 R pckbd_keymapdata -ffffffff82d31070 R pckbd_xtbl2 -ffffffff82d31100 R pckbd_xtbl2_ext -ffffffff82d32000 r pckbd_keydesc_us -ffffffff82d32250 r pckbd_keydesc_de -ffffffff82d322f0 r pckbd_keydesc_de_nodead -ffffffff82d32310 r pckbd_keydesc_fr -ffffffff82d323d0 r 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pckbd_keydesc_br -ffffffff82d33180 r pckbd_keydesc_tr -ffffffff82d33230 r pckbd_keydesc_tr_nodead -ffffffff82d33250 r pckbd_keydesc_pl -ffffffff82d332b0 r pckbd_keydesc_hu -ffffffff82d333c0 r pckbd_keydesc_si -ffffffff82d334d0 r pckbd_keydesc_cf -ffffffff82d335a0 r pckbd_keydesc_cf_nodead -ffffffff82d335c0 r pckbd_keydesc_lv -ffffffff82d33640 r pckbd_keydesc_nl -ffffffff82d33720 r pckbd_keydesc_nl_nodead -ffffffff82d33740 r pckbd_keydesc_is -ffffffff82d337cc r pckbd_keydesc_is_nodead -ffffffff82d337e0 r pckbd_keydesc_ee -ffffffff82d33890 r pckbd_keydesc_ee_nodead -ffffffff82d338b0 R pckbd_keydesctab -ffffffff82d34000 R pms_ca -ffffffff82d34028 R pms_accessops -ffffffff82d34040 R pms_sec_accessops -ffffffff82d34060 R pms_protocols -ffffffff82d341e0 r alps_models -ffffffff82d35000 R skgpio_led_offset -ffffffff82d35008 R skgpio_ca -ffffffff82d36000 R hidkbd_trtab -ffffffff82d36100 r apple_fn_trans -ffffffff82d36120 r apple_tb_trans -ffffffff82d36140 r apple_mba_trans -ffffffff82d37000 r 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udl_ca -ffffffff82d4d030 r udl_devs -ffffffff82d4d0b0 r udl_modes -ffffffff82d4e000 R umidi_hw_if -ffffffff82d4e030 R umidi_ca -ffffffff82d4e060 r umidi_evlen -ffffffff82d4e080 r packet_length -ffffffff82d4f000 r quirk_name -ffffffff82d50000 R ucom_ca -ffffffff82d51000 R ugen_ca -ffffffff82d51028 R ugenread_intr_filtops -ffffffff82d51058 R ugenread_isoc_filtops -ffffffff82d52000 R uhidev_ca -ffffffff82d52030 r uhid_graphire_report_descr -ffffffff82d520b0 r uhid_graphire3_4x5_report_descr -ffffffff82d52160 r uhid_xb360gp_report_descr -ffffffff82d52210 r uhid_xbonegp_report_descr -ffffffff82d53000 R uhid_ca -ffffffff82d53028 R uhidread_filtops -ffffffff82d54000 R fido_ca -ffffffff82d55000 R ujoy_ca -ffffffff82d56000 r ukbd_keydesc_us -ffffffff82d56290 r ukbd_keydesc_de -ffffffff82d56340 r ukbd_keydesc_de_nodead -ffffffff82d56360 r ukbd_keydesc_fr -ffffffff82d56420 r ukbd_keydesc_fr_apple -ffffffff82d56560 r ukbd_keydesc_fr_dvorak_bepo -ffffffff82d566a0 r ukbd_keydesc_dk -ffffffff82d56740 r ukbd_keydesc_dk_nodead -ffffffff82d56750 r ukbd_keydesc_it -ffffffff82d567f0 r ukbd_keydesc_uk -ffffffff82d568a0 r ukbd_keydesc_jp -ffffffff82d56910 r ukbd_keydesc_sv -ffffffff82d56940 r ukbd_keydesc_sv_nodead -ffffffff82d56950 r ukbd_keydesc_no -ffffffff82d56980 r ukbd_keydesc_no_nodead -ffffffff82d56990 r ukbd_keydesc_us_dvorak -ffffffff82d56a30 r ukbd_keydesc_us_colemak -ffffffff82d56a78 r ukbd_keydesc_swapctrlcaps -ffffffff82d56a90 r ukbd_keydesc_iopener -ffffffff82d56ae0 r ukbd_keydesc_es -ffffffff82d56b80 r ukbd_keydesc_be -ffffffff82d56c40 r ukbd_keydesc_ru -ffffffff82d56db0 r ukbd_keydesc_ua -ffffffff82d56f50 r ukbd_keydesc_sg -ffffffff82d57010 r ukbd_keydesc_sg_nodead -ffffffff82d57030 r ukbd_keydesc_sf -ffffffff82d57050 r ukbd_keydesc_pt -ffffffff82d570e0 r ukbd_keydesc_pt_apple -ffffffff82d57100 r ukbd_keydesc_lt -ffffffff82d571e0 r ukbd_keydesc_la -ffffffff82d57280 r ukbd_keydesc_br -ffffffff82d57310 r ukbd_keydesc_tr -ffffffff82d573d0 r ukbd_keydesc_tr_nodead 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db_history_size -ffffffff83133008 D db_history_curr -ffffffff83133010 D db_history_last -ffffffff83134000 D db_tab_stop_width -ffffffff83134004 D db_max_line -ffffffff83134008 D db_max_width -ffffffff8313400c D db_radix -ffffffff83135000 D db_lastsym -ffffffff83135008 D db_maxoff -ffffffff83136000 D db_vars -ffffffff83136090 D db_evars -ffffffff83137000 D db_watchpoints_inserted -ffffffff83137008 D db_next_free_watchpoint -ffffffff83138000 D db_log -ffffffff83139000 D audio_cd -ffffffff83139020 D audio_lock -ffffffff8313a000 D midi_cd -ffffffff8313b000 D rnd_cold -ffffffff8313b004 D rnd_slowextract -ffffffff8313b008 D rnd_timeout -ffffffff8313b050 D rndlock -ffffffff8313b060 D rndreinit_timeout -ffffffff8313b0a8 D rnd_task -ffffffff8313c000 D video_cd -ffffffff8313d000 d rrip_table_analyze -ffffffff8313d0e0 d rrip_table_getname -ffffffff8313d1e0 d rrip_table_getsymname -ffffffff8313d280 d rrip_table_extref -ffffffff8313e000 D nexecs -ffffffff8313f000 D elf_note_names -ffffffff83140000 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startuphook_list -ffffffff8314f000 D sysctl_lock -ffffffff8314f010 D sysctl_disklock -ffffffff8314f020 d openbsd -ffffffff8314f024 d arg_max -ffffffff8314f028 d posix_version -ffffffff8314f02c d ngroups_max -ffffffff8314f030 d int_one -ffffffff8314f034 d maxpartitions -ffffffff8314f038 d raw_part -ffffffff8314f03c D allowpowerdown -ffffffff8314f040 D hw_power -ffffffff8314f044 d byte_order -ffffffff8314f048 d page_size -ffffffff83150000 d thrsleep_queue -ffffffff83150010 d thrsleep_lock -ffffffff83151000 D tc_lock -ffffffff83151010 D windup_mtx -ffffffff83151020 D timecounter -ffffffff83151028 D time_second -ffffffff83151030 d timehands -ffffffff83151038 d dummy_timecounter -ffffffff83151088 d th0 -ffffffff83151120 d th1 -ffffffff83152000 D itimer_mtx -ffffffff83152010 D ratecheck_mtx -ffffffff83152020 D ppsratecheck_mtx -ffffffff83152030 D resettodr_to -ffffffff83152078 D resettodr_task -ffffffff83153000 D timeout_mutex -ffffffff83154000 D wdog_auto -ffffffff83155000 D taskq_sys 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userconf_base -ffffffff8315c004 D userconf_maxdev -ffffffff8315c008 D userconf_totdev -ffffffff8315c00c D userconf_maxlocnames -ffffffff8315c010 D userconf_cnt -ffffffff8315c014 D userconf_lines -ffffffff8315c018 D userconf_histsz -ffffffff8315c020 D userconf_cmds -ffffffff8315d000 D ftlock -ffffffff8315e000 d ppollcollect.poll_errintvl -ffffffff8315f000 D ttydefchars -ffffffff8315f014 D ttclos -ffffffff8315f01b D ttopen -ffffffff8315f022 D ttybg -ffffffff8315f028 D ttyin -ffffffff8315f02e D ttyout -ffffffff8315f038 D ttylist_lock -ffffffff83160000 D linesw -ffffffff83160280 D nlinesw -ffffffff83161000 D pt_softc_lock -ffffffff83162000 d mbstat_boot_boot_cpumem -ffffffff83162080 D mbstat -ffffffff83162090 D mclsizes -ffffffff831620b0 D m_extref_mtx -ffffffff831620c0 D m_pool_allocator -ffffffff83163000 D somaxconn -ffffffff83163004 D sominconn -ffffffff83163008 D sosplice_lock -ffffffff83164000 D sb_max -ffffffff83165000 D unp_df_lock -ffffffff83165010 D unp_gc_lock -ffffffff83165020 D unp_rights_mtx -ffffffff83165030 D unp_ino_mtx -ffffffff83165040 D unp_gc_task -ffffffff83165070 D unpst_sendspace -ffffffff83165074 D unpst_recvspace -ffffffff83165078 D unpsq_sendspace -ffffffff8316507c D unpsq_recvspace -ffffffff83165080 D unpdg_sendspace -ffffffff83165084 D unpdg_recvspace -ffffffff83166000 D doingcache -ffffffff83167000 D maxvfsconf -ffffffff83167010 d vfsconflist -ffffffff83168000 D lockf_lock -ffffffff83168010 D maxlocksperuid -ffffffff83169000 D iftovt_tab -ffffffff83169040 D vttoif_tab -ffffffff83169064 D suid_clear -ffffffff83169068 D vnode_mtx -ffffffff83169078 D vfs_stall_lock -ffffffff83169090 D vtypes -ffffffff831690e0 D vtags -ffffffff8316a000 D syncer_maxdelay -ffffffff8316a004 D syncdelay -ffffffff8316b000 D dosdirtemplate -ffffffff8316c000 D ntfs_hashlock -ffffffff8316d000 D ntfs_toupper_lock -ffffffff8316e000 D art_table_gc_mtx -ffffffff8316e010 D art_table_gc_task -ffffffff8316e040 D art_node_gc_mtx -ffffffff8316e050 D art_node_gc_task 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R malo_pcmcia_ca +ffffffff82d0d000 R an_pcmcia_ca +ffffffff82d0e000 R pcib_ca +ffffffff82d0f000 R amdpcib_ca +ffffffff82d0f028 R amdpcib_devices +ffffffff82d10000 R tcpcib_ca +ffffffff82d10028 R tcpcib_devices +ffffffff82d11000 R aapic_ca +ffffffff82d12000 R hme_pci_ca +ffffffff82d12028 r hme_promhdr +ffffffff82d1202a r hme_promdat +ffffffff82d13000 R isa_ca +ffffffff82d14000 R isadma_ca +ffffffff82d15000 R fdc_ca +ffffffff82d16000 R fd_ca +ffffffff82d17000 R com_isa_ca +ffffffff82d18000 R pckbc_isa_ca +ffffffff82d19000 R vga_isa_ca +ffffffff82d1a000 R wdc_isa_ca +ffffffff82d1b000 R mpu_midi_hw_if +ffffffff82d1c000 R mpu_isa_ca +ffffffff82d1d000 R pcppi_ca +ffffffff82d1e000 R spkr_ca +ffffffff82d1e030 r pitchtab +ffffffff82d1f000 R lpt_isa_ca +ffffffff82d20000 R wbsio_ca +ffffffff82d21000 R schsio_ca +ffffffff82d22000 R lm_isa_ca +ffffffff82d22028 R lm_wbsio_ca +ffffffff82d23000 R it_sensors +ffffffff82d23110 R it_vrfact +ffffffff82d23140 R it_fan_regs +ffffffff82d23160 R it_fan_ext_regs +ffffffff82d23178 R it_ca +ffffffff82d24000 R abitkv_sensors +ffffffff82d24200 R abitaa_sensors +ffffffff82d24480 R abitav_sensors +ffffffff82d24700 R abitas_sensors +ffffffff82d24980 R abitax_sensors +ffffffff82d24bc0 R abitm4_sensors +ffffffff82d24e80 R abitan_sensors +ffffffff82d25120 R abital_sensors +ffffffff82d253a0 R abitaw_sensors +ffffffff82d25700 R abitni_sensors +ffffffff82d259a0 R abitat_sensors +ffffffff82d25cc0 R abitan2_sensors +ffffffff82d25f60 R abitab_sensors +ffffffff82d26220 R abitan3_sensors +ffffffff82d26500 R abitaw2_sensors +ffffffff82d26860 R abitat2_sensors +ffffffff82d26b60 R abitab2_sensors +ffffffff82d26ea0 R abitin_sensors +ffffffff82d271e0 R uguru_ca +ffffffff82d28000 R aps_ca +ffffffff82d29000 R wsdisplay_emul_ca +ffffffff82d29030 r charClass +ffffffff82d2a000 r usl_syncops +ffffffff82d2b000 R wsevent_filtops +ffffffff82d2c000 R wskbd_ca +ffffffff82d2d000 r latin1_to_upper +ffffffff82d2e000 R wsmouse_ca +ffffffff82d2f000 R cyrillic_to_koi8 +ffffffff82d2f060 R unicode_to_latin2 +ffffffff82d2f0e0 R unicode_to_latin7 +ffffffff82d30000 R wsemul_vt100_ops +ffffffff82d31000 r decspcgr2uni +ffffffff82d31100 r dectech2uni +ffffffff82d31200 r nrctable +ffffffff82d31320 r nrcovlpos +ffffffff82d32000 r vt100_fkeys +ffffffff82d320c0 r vt100_pfkeys +ffffffff82d320e0 r vt100_numpad +ffffffff82d33000 R pckbd_ca +ffffffff82d33028 R pckbd_accessops +ffffffff82d33040 R pckbd_consops +ffffffff82d33060 R pckbd_keymapdata +ffffffff82d33070 R pckbd_xtbl2 +ffffffff82d33100 R pckbd_xtbl2_ext +ffffffff82d34000 r pckbd_keydesc_us +ffffffff82d34250 r pckbd_keydesc_de +ffffffff82d342f0 r pckbd_keydesc_de_nodead +ffffffff82d34310 r pckbd_keydesc_fr +ffffffff82d343d0 r pckbd_keydesc_fr_dvorak_bepo +ffffffff82d34510 r pckbd_keydesc_dk +ffffffff82d345a0 r pckbd_keydesc_dk_nodead +ffffffff82d345b0 r pckbd_keydesc_it +ffffffff82d34640 r pckbd_keydesc_uk +ffffffff82d346e0 r pckbd_keydesc_jp +ffffffff82d34750 r pckbd_keydesc_sv +ffffffff82d34780 r pckbd_keydesc_sv_nodead +ffffffff82d34790 r pckbd_keydesc_no +ffffffff82d347c0 r pckbd_keydesc_no_nodead +ffffffff82d347d0 r pckbd_keydesc_us_declk +ffffffff82d34860 r pckbd_keydesc_us_dvorak +ffffffff82d34900 r pckbd_keydesc_us_colemak +ffffffff82d34948 r pckbd_keydesc_swapctrlcaps +ffffffff82d34960 r pckbd_keydesc_iopener +ffffffff82d349b0 r pckbd_keydesc_es +ffffffff82d34a50 r pckbd_keydesc_be +ffffffff82d34b10 r pckbd_keydesc_ru +ffffffff82d34c80 r pckbd_keydesc_ua +ffffffff82d34e10 r pckbd_keydesc_sg +ffffffff82d34ec0 r pckbd_keydesc_sg_nodead +ffffffff82d34ee0 r pckbd_keydesc_sf +ffffffff82d34f00 r pckbd_keydesc_pt +ffffffff82d34f90 r pckbd_keydesc_lt +ffffffff82d35070 r pckbd_keydesc_la +ffffffff82d35100 r pckbd_keydesc_br +ffffffff82d35180 r pckbd_keydesc_tr +ffffffff82d35230 r pckbd_keydesc_tr_nodead +ffffffff82d35250 r pckbd_keydesc_pl +ffffffff82d352b0 r pckbd_keydesc_hu +ffffffff82d353c0 r pckbd_keydesc_si +ffffffff82d354d0 r pckbd_keydesc_cf +ffffffff82d355a0 r pckbd_keydesc_cf_nodead +ffffffff82d355c0 r pckbd_keydesc_lv +ffffffff82d35640 r pckbd_keydesc_nl +ffffffff82d35720 r pckbd_keydesc_nl_nodead +ffffffff82d35740 r pckbd_keydesc_is +ffffffff82d357cc r pckbd_keydesc_is_nodead +ffffffff82d357e0 r pckbd_keydesc_ee +ffffffff82d35890 r pckbd_keydesc_ee_nodead +ffffffff82d358b0 R pckbd_keydesctab +ffffffff82d36000 R pms_ca +ffffffff82d36028 R pms_accessops +ffffffff82d36040 R pms_sec_accessops +ffffffff82d36060 R pms_protocols +ffffffff82d361e0 r alps_models +ffffffff82d37000 R skgpio_led_offset +ffffffff82d37008 R skgpio_ca +ffffffff82d38000 R hidkbd_trtab +ffffffff82d38100 r apple_fn_trans +ffffffff82d38120 r apple_tb_trans +ffffffff82d38140 r apple_mba_trans +ffffffff82d39000 r hidcc_attach_wskbd.accessops +ffffffff82d39020 r hidcc_keysyms +ffffffff82d3a000 R usb_ca +ffffffff82d3b000 R usb_known_products +ffffffff82d46f80 R usb_known_vendors +ffffffff82d49790 R usbd_error_strs +ffffffff82d4a000 R usb_quirks +ffffffff82d4a390 R usb_dev_quirks +ffffffff82d4a398 R usbd_no_quirk +ffffffff82d4b000 R uhub_ca +ffffffff82d4b028 R uhub_uhub_ca +ffffffff82d4c000 R uaudio_ca +ffffffff82d4c028 R uaudio_hw_if +ffffffff82d4c0e0 R uaudio_rates +ffffffff82d4c120 r uaudio_clkname.names +ffffffff82d4c140 r uaudio_feature_addent.features +ffffffff82d4d000 R uvideo_ca +ffffffff82d4d028 R uvideo_hw_if +ffffffff82d4d100 R uvideo_devs +ffffffff82d4e000 r utvfu_select_norm.pal +ffffffff82d4e040 r utvfu_select_norm.ntsc +ffffffff82d4e080 r utvfu_setup_capture.setup +ffffffff82d4e180 r utvfu_audio_start_chip.setup +ffffffff82d4e1c8 r utvfu_audio_stop_chip.setup +ffffffff82d4e1d8 R utvfu_ca +ffffffff82d4e200 R utvfu_vid_hw_if +ffffffff82d4e2d0 R utvfu_au_hw_if +ffffffff82d4f000 R udl_ca +ffffffff82d4f030 r udl_devs +ffffffff82d4f0b0 r udl_modes +ffffffff82d50000 R umidi_hw_if +ffffffff82d50030 R umidi_ca +ffffffff82d50060 r umidi_evlen +ffffffff82d50080 r packet_length +ffffffff82d51000 r quirk_name +ffffffff82d52000 R ucom_ca +ffffffff82d53000 R ugen_ca +ffffffff82d53028 R ugenread_intr_filtops +ffffffff82d53058 R ugenread_isoc_filtops +ffffffff82d54000 R uhidev_ca +ffffffff82d54030 r uhid_graphire_report_descr +ffffffff82d540b0 r uhid_graphire3_4x5_report_descr +ffffffff82d54160 r uhid_xb360gp_report_descr +ffffffff82d54210 r uhid_xbonegp_report_descr +ffffffff82d55000 R uhid_ca +ffffffff82d55028 R uhidread_filtops +ffffffff82d56000 R fido_ca +ffffffff82d57000 R ujoy_ca +ffffffff82d58000 r ukbd_keydesc_us +ffffffff82d58290 r ukbd_keydesc_de +ffffffff82d58340 r ukbd_keydesc_de_nodead +ffffffff82d58360 r ukbd_keydesc_fr +ffffffff82d58420 r ukbd_keydesc_fr_apple +ffffffff82d58560 r ukbd_keydesc_fr_dvorak_bepo +ffffffff82d586a0 r ukbd_keydesc_dk +ffffffff82d58740 r ukbd_keydesc_dk_nodead +ffffffff82d58750 r ukbd_keydesc_it +ffffffff82d587f0 r ukbd_keydesc_uk +ffffffff82d588a0 r ukbd_keydesc_jp +ffffffff82d58910 r ukbd_keydesc_sv +ffffffff82d58940 r ukbd_keydesc_sv_nodead +ffffffff82d58950 r ukbd_keydesc_no +ffffffff82d58980 r ukbd_keydesc_no_nodead +ffffffff82d58990 r ukbd_keydesc_us_dvorak +ffffffff82d58a30 r ukbd_keydesc_us_colemak +ffffffff82d58a78 r ukbd_keydesc_swapctrlcaps +ffffffff82d58a90 r ukbd_keydesc_iopener +ffffffff82d58ae0 r ukbd_keydesc_es +ffffffff82d58b80 r ukbd_keydesc_be +ffffffff82d58c40 r ukbd_keydesc_ru +ffffffff82d58db0 r ukbd_keydesc_ua +ffffffff82d58f50 r ukbd_keydesc_sg +ffffffff82d59010 r ukbd_keydesc_sg_nodead +ffffffff82d59030 r ukbd_keydesc_sf +ffffffff82d59050 r ukbd_keydesc_pt +ffffffff82d590e0 r ukbd_keydesc_pt_apple +ffffffff82d59100 r ukbd_keydesc_lt +ffffffff82d591e0 r ukbd_keydesc_la +ffffffff82d59280 r ukbd_keydesc_br +ffffffff82d59310 r ukbd_keydesc_tr +ffffffff82d593d0 r ukbd_keydesc_tr_nodead +ffffffff82d593f0 r ukbd_keydesc_pl +ffffffff82d59450 r ukbd_keydesc_hu +ffffffff82d59560 r ukbd_keydesc_si +ffffffff82d59680 r ukbd_keydesc_cf +ffffffff82d59760 r ukbd_keydesc_cf_nodead +ffffffff82d59780 r ukbd_keydesc_lv +ffffffff82d59800 r ukbd_keydesc_nl +ffffffff82d598e0 r ukbd_keydesc_nl_nodead +ffffffff82d59900 r ukbd_keydesc_is +ffffffff82d59994 r ukbd_keydesc_is_nodead +ffffffff82d599a0 r ukbd_keydesc_ee +ffffffff82d59a50 r ukbd_keydesc_ee_nodead +ffffffff82d59a70 R ukbd_keydesctab +ffffffff82d5a000 R ukbd_countrylayout +ffffffff82d5a090 R ukbd_consops +ffffffff82d5a0b0 R ukbd_accessops +ffffffff82d5a0c8 R ukbd_ca +ffffffff82d5b000 R ums_accessops +ffffffff82d5b018 R ums_ca +ffffffff82d5c000 R umt_accessops +ffffffff82d5c018 R umt_ca +ffffffff82d5d000 R uts_devs +ffffffff82d5d010 R uts_accessops +ffffffff82d5d028 R uts_ca +ffffffff82d5e000 R ubcmtp_accessops +ffffffff82d5e018 R ubcmtp_ca +ffffffff82d5e040 r ubcmtp_devices +ffffffff82d5f000 R ucycom_methods +ffffffff82d5f040 R ucycom_devs +ffffffff82d5f050 R ucycom_ca +ffffffff82d60000 R uslhcom_methods +ffffffff82d60040 R uslhcom_ca +ffffffff82d60068 r uslhcom_devs +ffffffff82d61000 R ulpt_ca +ffffffff82d62000 R umass_ca +ffffffff82d62028 R umass_bbb_methods +ffffffff82d62040 R umass_cbi_methods +ffffffff82d63000 R umass_quirks +ffffffff82d64000 R umass_scsi_switch +ffffffff82d65000 R uthum_devs +ffffffff82d65008 R uthum_ca +ffffffff82d65030 r uthum_sensor_type_s +ffffffff82d66000 R ugold_devs +ffffffff82d66010 R ugold_ca +ffffffff82d67000 R utrh_devs +ffffffff82d67008 R utrh_ca +ffffffff82d68000 R uoakrh_devs +ffffffff82d68008 R uoakrh_ca +ffffffff82d68030 R uoakrh_methods +ffffffff82d69000 R uoaklux_devs +ffffffff82d69008 R uoaklux_ca +ffffffff82d69030 R uoaklux_methods +ffffffff82d6a000 R uoakv_devs +ffffffff82d6a008 R uoakv_ca +ffffffff82d6a030 R uoakv_methods +ffffffff82d6b000 R uonerng_ca +ffffffff82d6c000 R urng_ca +ffffffff82d6c030 r urng_devs +ffffffff82d6d000 R udcf_ca +ffffffff82d6d028 r udcf_devs +ffffffff82d6e000 R umbg_ca +ffffffff82d6f000 R uvisor_methods +ffffffff82d6f040 R uvisor_ca +ffffffff82d6f070 r uvisor_devs +ffffffff82d70000 R udsbr_hw_if +ffffffff82d70028 R udsbr_ca +ffffffff82d71000 R utwitch_devs +ffffffff82d71008 R utwitch_ca +ffffffff82d72000 R aue_devs +ffffffff82d721b0 R aue_ca +ffffffff82d73000 R axe_devs +ffffffff82d730d0 R axe_ca +ffffffff82d74000 R axen_devs +ffffffff82d74020 R axen_ca +ffffffff82d75000 R smsc_ca +ffffffff82d75030 r smsc_devs +ffffffff82d76000 R cue_ca +ffffffff82d77000 R kue_devs +ffffffff82d77088 R kue_ca +ffffffff82d78000 R cdce_devs +ffffffff82d780a0 R cdce_ca +ffffffff82d79000 R urndis_ca +ffffffff82d79030 R urndis_class +ffffffff82d7a000 R mos_devs +ffffffff82d7a018 R mos_ca +ffffffff82d7b000 R mue_devs +ffffffff82d7b020 R mue_ca +ffffffff82d7c000 R udav_ca +ffffffff82d7c030 r udav_devs +ffffffff82d7d000 R upl_ca +ffffffff82d7e000 R ugl_ca +ffffffff82d7f000 R url_ca +ffffffff82d7f030 r url_devs +ffffffff82d80000 R ure_devs +ffffffff82d800e8 R ure_ca +ffffffff82d81000 R uaq_devs +ffffffff82d81018 R uaq_ca +ffffffff82d82000 R umodem_methods +ffffffff82d82040 R umodem_ca +ffffffff82d83000 R uftdi_methods +ffffffff82d83040 R uftdi_ca +ffffffff82d83070 r uftdi_devs +ffffffff82d84000 R uplcom_methods +ffffffff82d84040 R uplcom_ca +ffffffff82d84070 r uplcom_devs +ffffffff82d85000 R umct_methods +ffffffff82d85040 R umct_ca +ffffffff82d85070 r umct_devs +ffffffff82d86000 R uvscom_methods +ffffffff82d86040 R uvscom_ca +ffffffff82d86070 r uvscom_devs +ffffffff82d87000 R ubsa_methods +ffffffff82d87040 R ubsa_devs +ffffffff82d87060 R ubsa_ca +ffffffff82d88000 R ukspan_ca +ffffffff82d88028 r ukspan_devs +ffffffff82d88030 r ukspan_methods +ffffffff82d89000 R uslcom_methods +ffffffff82d89040 R uslcom_ca +ffffffff82d89070 r uslcom_devs +ffffffff82d8a000 R uark_methods +ffffffff82d8a040 R uark_ca +ffffffff82d8a068 r uark_devs +ffffffff82d8b000 R moscom_methods +ffffffff82d8b040 R moscom_ca +ffffffff82d8b068 r moscom_devs +ffffffff82d8c000 R umcs_methods +ffffffff82d8c040 R umcs_devs +ffffffff82d8c050 R umcs_ca +ffffffff82d8d000 R uscom_methods +ffffffff82d8d040 R uscom_ca +ffffffff82d8d068 r uscom_devs +ffffffff82d8e000 R ucrcom_methods +ffffffff82d8e040 R ucrcom_ca +ffffffff82d8f000 R uxrcom_methods +ffffffff82d8f040 R uxrcom_ca +ffffffff82d8f068 r uxrcom_devs +ffffffff82d90000 R uipaq_methods +ffffffff82d90040 R uipaq_ca +ffffffff82d90070 r uipaq_devs +ffffffff82d91000 R umsm_methods +ffffffff82d91040 R umsm_ca +ffffffff82d91070 r umsm_devs +ffffffff82d92000 R uchcom_methods +ffffffff82d92040 R uchcom_ca +ffffffff82d92068 r uchcom_devs +ffffffff82d92080 r dividers +ffffffff82d93000 R uticom_methods +ffffffff82d93040 R uticom_ca +ffffffff82d93070 r uticom_devs +ffffffff82d94000 R wi_usb_devs +ffffffff82d940f0 R wi_usb_ca +ffffffff82d95000 R atu_ca +ffffffff82d96000 R ural_ca +ffffffff82d96030 r ural_devs +ffffffff82d960a0 r ural_rf2522_r2 +ffffffff82d960e0 r ural_rf2524_r2 +ffffffff82d96120 r ural_rf2525_hi_r2 +ffffffff82d96160 r ural_rf2525_r2 +ffffffff82d961a0 r ural_rf2525e_r2 +ffffffff82d961e0 r ural_rf2526_hi_r2 +ffffffff82d96220 r ural_rf2526_r2 +ffffffff82d96260 r ural_def_bbp +ffffffff82d962a0 r ural_def_mac +ffffffff82d97000 R rum_ca +ffffffff82d97030 r rum_devs +ffffffff82d97110 r rum_rf5225 +ffffffff82d97460 r rum_rf5226 +ffffffff82d977b0 r rum_def_bbp +ffffffff82d977f0 r rum_def_mac +ffffffff82d98000 R run_ca +ffffffff82d98030 r run_devs +ffffffff82d98430 r rt2860_rf2850 +ffffffff82d98860 r rt2860_rates +ffffffff82d98920 r rt5592_freqs_40mhz +ffffffff82d98a60 r rt5592_freqs_20mhz +ffffffff82d98ba0 r rt5592_2ghz_def_rf +ffffffff82d98be0 r rt5592_chan_5ghz +ffffffff82d98e30 r rt5592_def_bbp +ffffffff82d98e70 r rt5592_bbp_r196 +ffffffff82d98ed0 r rt5390_def_bbp +ffffffff82d98f00 r rt3572_def_rf +ffffffff82d98f40 r rt3070_def_rf +ffffffff82d98f70 r rt3593_def_rf +ffffffff82d98fb0 r rt5592_def_rf +ffffffff82d98fe0 r rt5392_def_rf +ffffffff82d99060 r rt5390_def_rf +ffffffff82d990e0 r rt2870_def_mac +ffffffff82d9a000 R mtw_ca +ffffffff82d9a030 r mtw_devs +ffffffff82d9a070 r rt2860_rates +ffffffff82d9a130 r mt7601_rf_chan +ffffffff82d9a1a0 r mt7601_def_bbp +ffffffff82d9a2d0 r mt7601_rf_bank0 +ffffffff82d9a330 r mt7601_rf_bank4 +ffffffff82d9a3b0 r mt7601_rf_bank5 +ffffffff82d9a430 r mt7601_def_mac +ffffffff82d9b000 R zyd_ca +ffffffff82d9b030 r zyd_devs +ffffffff82d9b1b0 r zyd_rfmd_init.phyini +ffffffff82d9b2e0 r zyd_rfmd_init.rfini +ffffffff82d9b330 r zyd_rfmd_set_channel.rfprog +ffffffff82d9b3a0 r zyd_al2230_init.phyini +ffffffff82d9b480 r zyd_al2230_init.rfini +ffffffff82d9b4e0 r zyd_al2230_init_b.phyini +ffffffff82d9b5d0 r zyd_al2230_init_b.rfini +ffffffff82d9b620 r zyd_al2230_set_channel.rfprog +ffffffff82d9b6d0 r zyd_al7230B_init.phyini_1 +ffffffff82d9b7b0 r zyd_al7230B_init.rfini_1 +ffffffff82d9b7f0 r zyd_al7230B_set_channel.rfprog +ffffffff82d9b860 r zyd_al7230B_set_channel.rfsc +ffffffff82d9b890 r zyd_al2210_init.phyini +ffffffff82d9b8f0 r zyd_al2210_init.rfini +ffffffff82d9b920 r zyd_al2210_set_channel.rfprog +ffffffff82d9b960 r zyd_gct_init.phyini +ffffffff82d9b9b0 r zyd_gct_init.rfini +ffffffff82d9ba50 r zyd_gct_set_channel.rfprog +ffffffff82d9ba90 r zyd_maxim_set_channel.phyini +ffffffff82d9bba0 r zyd_maxim_set_channel.rfini +ffffffff82d9bbe0 r zyd_maxim_set_channel.rfprog +ffffffff82d9bc50 r zyd_maxim2_set_channel.phyini +ffffffff82d9bd70 r zyd_maxim2_set_channel.rfini +ffffffff82d9bdb0 r zyd_maxim2_set_channel.rfprog +ffffffff82d9be20 r zyd_rf_name.zyd_rfs +ffffffff82d9bea0 r zyd_def_phyB +ffffffff82d9c0d0 r zyd_def_phy +ffffffff82d9d000 R upgt_ca +ffffffff82d9d028 r upgt_devs_1 +ffffffff82d9d030 r upgt_devs_2 +ffffffff82d9e000 R urtw_ca +ffffffff82d9e030 r urtw_devs +ffffffff82d9e090 r urtw_ratetable +ffffffff82d9e0f0 r urtw_8225_gain +ffffffff82d9e110 r urtw_8225_txpwr_cck_ch14 +ffffffff82d9e140 r urtw_8225_txpwr_cck +ffffffff82d9e170 r urtw_8225_tx_gain_cck_ofdm +ffffffff82d9e176 r urtw_8225_txpwr_ofdm +ffffffff82d9e180 r urtw_8225_rf_part1 +ffffffff82d9e200 r urtw_8225_rxgain +ffffffff82d9e2c0 r urtw_8225_agc +ffffffff82d9e340 r urtw_8225_rf_part2 +ffffffff82d9e470 r urtw_8225_rf_part3 +ffffffff82d9e550 r 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dt_static_smr_called +ffffffff83130c00 D dt_static_smr_barrier_enter +ffffffff83130c70 D dt_static_smr_barrier_exit +ffffffff83130ce0 D dt_static_smr_wakeup +ffffffff83130d50 D dt_static_smr_thread +ffffffff83130dc0 D dt_static_refcnt_none +ffffffff83130e30 D dt_static_refcnt_ethmulti +ffffffff83130ea0 D dt_static_refcnt_ifaddr +ffffffff83130f10 D dt_static_refcnt_ifmaddr +ffffffff83130f80 D dt_static_refcnt_inpcb +ffffffff83130ff0 D dt_static_refcnt_rtentry +ffffffff83131060 D dt_static_refcnt_syncache +ffffffff831310d0 D dt_static_refcnt_tdb +ffffffff83132000 D db_next_free_breakpoint +ffffffff83132008 D db_breakpoints_inserted +ffffffff83133000 D db_ed_style +ffffffff83134000 D db_examine_format +ffffffff83134078 D db_print_format +ffffffff83135000 D db_history_size +ffffffff83135008 D db_history_curr +ffffffff83135010 D db_history_last +ffffffff83136000 D db_tab_stop_width +ffffffff83136004 D db_max_line +ffffffff83136008 D db_max_width +ffffffff8313600c D db_radix +ffffffff83137000 D db_lastsym +ffffffff83137008 D db_maxoff +ffffffff83138000 D db_vars +ffffffff83138090 D db_evars +ffffffff83139000 D db_watchpoints_inserted +ffffffff83139008 D db_next_free_watchpoint +ffffffff8313a000 D db_log +ffffffff8313b000 D audio_cd +ffffffff8313b020 D audio_lock +ffffffff8313c000 D midi_cd +ffffffff8313d000 D rnd_cold +ffffffff8313d004 D rnd_slowextract +ffffffff8313d008 D rnd_timeout +ffffffff8313d050 D rndlock +ffffffff8313d060 D rndreinit_timeout +ffffffff8313d0a8 D rnd_task +ffffffff8313e000 D video_cd +ffffffff8313f000 d rrip_table_analyze +ffffffff8313f0e0 d rrip_table_getname +ffffffff8313f1e0 d rrip_table_getsymname +ffffffff8313f280 d rrip_table_extref +ffffffff83140000 D nexecs +ffffffff83141000 D elf_note_names +ffffffff83142000 D ncpus +ffffffff83142004 D ncpusfound +ffffffff83143000 D acct_lock +ffffffff83143010 D acctsuspend +ffffffff83143014 D acctresume +ffffffff83143018 D acctrate +ffffffff83144000 D ticks +ffffffff83145000 D fhdlk +ffffffff83146000 D kqueue_klist_lock +ffffffff83146010 D kq_timeoutmax +ffffffff83147000 D stackgap_random +ffffffff83148000 D nprocesses +ffffffff83148004 D nthreads +ffffffff83148008 D fork_tfmrate +ffffffff83149000 D kthread_q +ffffffff8314a000 D malloc_mtx +ffffffff8314a010 D memname +ffffffff8314a4a0 D sysctl_kmemlock +ffffffff8314a4b0 D malloc_errintvl +ffffffff8314b000 D maxdmap +ffffffff8314b008 D maxsmap +ffffffff8314b010 D rlimit_lock +ffffffff8314c000 D sched_cost_load +ffffffff8314c004 D sched_cost_priority +ffffffff8314c008 D sched_cost_runnable +ffffffff8314c00c D sched_cost_resident +ffffffff8314d000 D intrmap_lock +ffffffff8314e000 D nosuidcoredump +ffffffff8314e008 D sigio_lock +ffffffff8314f000 D smr_lock +ffffffff8314f010 D smr_logintvl +ffffffff83150000 D startuphook_list +ffffffff83151000 D sysctl_lock +ffffffff83151010 D sysctl_disklock +ffffffff83151020 d openbsd +ffffffff83151024 d arg_max +ffffffff83151028 d posix_version +ffffffff8315102c d ngroups_max +ffffffff83151030 d int_one +ffffffff83151034 d maxpartitions +ffffffff83151038 d raw_part +ffffffff8315103c D allowpowerdown +ffffffff83151040 D hw_power +ffffffff83151044 d byte_order +ffffffff83151048 d page_size +ffffffff83152000 d thrsleep_queue +ffffffff83152010 d thrsleep_lock +ffffffff83153000 D tc_lock +ffffffff83153010 D windup_mtx +ffffffff83153020 D timecounter +ffffffff83153028 D time_second +ffffffff83153030 d timehands +ffffffff83153038 d dummy_timecounter +ffffffff83153088 d th0 +ffffffff83153120 d th1 +ffffffff83154000 D itimer_mtx +ffffffff83154010 D ratecheck_mtx +ffffffff83154020 D ppsratecheck_mtx +ffffffff83154030 D resettodr_to +ffffffff83154078 D resettodr_task +ffffffff83155000 D timeout_mutex +ffffffff83156000 D wdog_auto +ffffffff83157000 D taskq_sys +ffffffff83157050 D taskq_sys_mp +ffffffff83158000 d update_loadavg.to +ffffffff83158048 D ccpu +ffffffff83158050 d schedcpu.to +ffffffff83158098 D perflevel +ffffffff8315809c D perfpolicy +ffffffff831580a0 D setperf_to +ffffffff83159000 D autoconf_attdet_mtx +ffffffff83159010 D msgs +ffffffff8315a000 d evcount_list +ffffffff8315a010 d evcount_percpu_init_list +ffffffff8315b000 D syslogf_rwlock +ffffffff8315b010 D log_mtx +ffffffff8315b020 D logstash_in +ffffffff8315b028 D logstash_out +ffffffff8315b030 D logstash_rwlock +ffffffff8315c000 D pool_head +ffffffff8315c010 D pool_lock +ffffffff8315c020 D pool_debug +ffffffff8315c028 D pool_allocator_single +ffffffff8315c040 D pool_allocator_multi +ffffffff8315c058 D pool_allocator_multi_ni +ffffffff8315c070 D pool_gc_tick +ffffffff8315c0b8 D pool_gc_task +ffffffff8315d000 D kprintf_mutex +ffffffff8315d010 D db_panic +ffffffff8315d014 D splassert_ctl +ffffffff8315d018 D v_putc +ffffffff8315d020 D printf_flags +ffffffff8315e000 D userconf_base +ffffffff8315e004 D userconf_maxdev +ffffffff8315e008 D userconf_totdev +ffffffff8315e00c D userconf_maxlocnames +ffffffff8315e010 D userconf_cnt +ffffffff8315e014 D userconf_lines +ffffffff8315e018 D userconf_histsz +ffffffff8315e020 D userconf_cmds +ffffffff8315f000 D ftlock +ffffffff83160000 d ppollcollect.poll_errintvl +ffffffff83161000 D ttydefchars +ffffffff83161014 D ttclos +ffffffff8316101b D ttopen +ffffffff83161022 D ttybg +ffffffff83161028 D ttyin +ffffffff8316102e D ttyout +ffffffff83161038 D ttylist_lock +ffffffff83162000 D linesw +ffffffff83162280 D nlinesw +ffffffff83163000 D pt_softc_lock +ffffffff83164000 d mbstat_boot_boot_cpumem +ffffffff83164080 D mbstat +ffffffff83164090 D mclsizes +ffffffff831640b0 D m_extref_mtx +ffffffff831640c0 D m_pool_allocator +ffffffff83165000 D somaxconn +ffffffff83165004 D sominconn +ffffffff83165008 D sosplice_lock +ffffffff83166000 D sb_max +ffffffff83167000 D unp_df_lock +ffffffff83167010 D unp_gc_lock +ffffffff83167020 D unp_rights_mtx +ffffffff83167030 D unp_ino_mtx +ffffffff83167040 D unp_gc_task +ffffffff83167070 D unpst_sendspace +ffffffff83167074 D unpst_recvspace +ffffffff83167078 D unpsq_sendspace +ffffffff8316707c D unpsq_recvspace +ffffffff83167080 D unpdg_sendspace +ffffffff83167084 D unpdg_recvspace +ffffffff83168000 D doingcache +ffffffff83169000 D maxvfsconf +ffffffff83169010 d vfsconflist +ffffffff8316a000 D lockf_lock +ffffffff8316a010 D maxlocksperuid +ffffffff8316b000 D iftovt_tab +ffffffff8316b040 D vttoif_tab +ffffffff8316b064 D suid_clear +ffffffff8316b068 D vnode_mtx +ffffffff8316b078 D vfs_stall_lock +ffffffff8316b090 D vtypes +ffffffff8316b0e0 D vtags +ffffffff8316c000 D syncer_maxdelay +ffffffff8316c004 D syncdelay +ffffffff8316d000 D dosdirtemplate +ffffffff8316e000 D ntfs_hashlock +ffffffff8316f000 D ntfs_toupper_lock +ffffffff83170000 D art_table_gc_mtx +ffffffff83170010 D art_table_gc_task +ffffffff83170040 D art_node_gc_mtx +ffffffff83170050 D art_node_gc_task +ffffffff83171000 D bpf_bufsize +ffffffff83171004 D bpf_maxbufsize +ffffffff83171008 D bpf_sysctl_lk +ffffffff83172000 D ifg_head +ffffffff83172010 D if_cloners_lock +ffffffff83172020 D if_input_task_locked +ffffffff83172050 D netlock +ffffffff83172060 D ifnetlist +ffffffff83173000 D ifiq_maxlen_drop +ffffffff83173004 D ifiq_maxlen_return +ffffffff83174000 D etherbroadcastaddr +ffffffff83174006 D ether_ipmulticast_min +ffffffff8317400c D ether_ipmulticast_max +ffffffff83174012 D ether_ip6multicast_min +ffffffff83174018 D ether_ip6multicast_max +ffffffff83175000 D etherip_cloner +ffffffff83175030 D etherip_list +ffffffff83176000 D loop_cloner +ffffffff83177000 D ifmedia_mtx +ffffffff83178000 D ppp_compressors +ffffffff83178020 D ppp_cloner +ffffffff83179000 D ppp_pkt_init +ffffffff8317a000 D ppp_bsd_compress +ffffffff8317b000 D ppp_deflate +ffffffff8317b070 D ppp_deflate_draft +ffffffff8317c000 D tun_cloner +ffffffff8317c030 D tap_cloner +ffffffff8317d000 D bridgeintrq +ffffffff8317d038 D bridge_cloner +ffffffff8317e000 d veb_cloner +ffffffff8317e030 d vport_cloner +ffffffff8317f000 D vlan_tagh_lk +ffffffff8317f010 D vlan_cloner +ffffffff8317f040 D svlan_cloner +ffffffff83180000 D pipex_list_mtx +ffffffff83180010 D pipex_prune +ffffffff83180018 D pipexoutq +ffffffff83180050 d SHAPad2 +ffffffff83181000 D rtmap_gc +ffffffff83181018 D rt_rc +ffffffff83182000 D rt_labels +ffffffff83182010 D rtlabel_mtx +ffffffff83183000 D enc_cloner +ffffffff83184000 D gre_cloner +ffffffff83184030 D gre_list +ffffffff83184040 D mgre_cloner +ffffffff83184070 D egre_cloner +ffffffff831840a0 D nvgre_cloner +ffffffff831840d0 D eoip_cloner +ffffffff83185000 D trunk_cloner +ffffffff83186000 d aggr_cloner +ffffffff83187000 d tpmr_cloner +ffffffff83188000 D mpe_cloner +ffffffff83189000 D mpw_cloner +ffffffff8318a000 D mpip_cloner +ffffffff8318b000 d bpe_cloner +ffffffff8318b030 d bpe_lock +ffffffff8318c000 D vether_cloner +ffffffff8318d000 D pair_cloner +ffffffff8318e000 d vxlan_cloner +ffffffff8318e030 d vxlan_lock +ffffffff8318e040 d vxlan_teps +ffffffff8318f000 D underload_interval +ffffffff8318f010 D wg_cloner +ffffffff83190000 d stoeplitz_keyseed +ffffffff83191000 D ieee80211_cache_size +ffffffff83192000 D arpt_prune +ffffffff83192004 D arpt_keep +ffffffff83192008 D arpt_down +ffffffff83192010 D arpinq +ffffffff83192048 D arp_mtx +ffffffff83192058 D arp_maxtries +ffffffff83193000 D ipport_firstauto +ffffffff83193004 D ipport_lastauto +ffffffff83193008 D ipport_hifirstauto +ffffffff8319300c D ipport_hilastauto +ffffffff83194000 D divert_sendspace +ffffffff83194004 D divert_recvspace +ffffffff83194008 D divbhashsize +ffffffff83195000 D icmptstamprepl +ffffffff83195004 D icmperrppslim +ffffffff83195008 D icmp_redirtimeout +ffffffff83196000 D ipsendredirects +ffffffff83196004 D ip_defttl +ffffffff83196008 D ip_mtudisc +ffffffff8319600c D ip_mtudisc_timeout +ffffffff83196010 D ipq_mutex +ffffffff83196020 D ip_maxqueue +ffffffff83196028 D ipintrq +ffffffff83196060 d ipsend_task +ffffffff83196090 d ipsendraw_task +ffffffff83197000 D ip_mrtproto +ffffffff83197004 d sin +ffffffff83198000 D rip_sendspace +ffffffff83198008 D rip_recvspace +ffffffff83199000 D tcprexmtthresh +ffffffff83199004 D tcptv_keep_init +ffffffff83199008 D tcp_rst_ppslim +ffffffff8319900c D tcp_ackdrop_ppslim +ffffffff83199010 D tcp_syn_hash_size +ffffffff83199014 D tcp_syn_cache_limit +ffffffff83199018 D tcp_syn_bucket_limit +ffffffff8319901c D tcp_syn_use_limit +ffffffff8319a000 D tcp_outflags +ffffffff8319b000 D tcp_timer_mtx +ffffffff8319b010 D tcp_mssdflt +ffffffff8319b014 D tcp_rttdflt +ffffffff8319b018 D tcp_do_rfc1323 +ffffffff8319b01c D tcp_do_sack +ffffffff8319b020 D tcp_do_rfc3390 +ffffffff8319b024 D tcp_do_tso +ffffffff8319b028 D tcp_reass_limit +ffffffff8319b02c D tcp_sackhole_limit +ffffffff8319c000 D tcp_backoff +ffffffff8319c034 D tcp_totbackoff +ffffffff8319d000 D tcp_sendspace +ffffffff8319d004 D tcp_recvspace +ffffffff8319d008 D tcp_autorcvbuf_inc +ffffffff8319e000 D udpcksum +ffffffff8319e004 D udp_sendspace +ffffffff8319e008 D udp_recvspace +ffffffff8319f000 D ipsec_flows_mtx +ffffffff8319f010 D ipsec_ids_idle +ffffffff8319f014 D ipsec_ids_next_flow +ffffffff8319f018 D ipsec_policy_head +ffffffff8319f028 D ipsp_ids_gc_timeout +ffffffff8319f070 D tdb_sadb_mtx +ffffffff8319f080 d tdb_hashmask +ffffffff831a0000 D ipo_tdb_mtx +ffffffff831a0010 D ipsec_acquire_mtx +ffffffff831a0020 D ipsec_acquire_head +ffffffff831a1000 D ipsec_keep_invalid +ffffffff831a1004 D ipsec_require_pfs +ffffffff831a1008 D ipsec_soft_timeout +ffffffff831a100c D ipsec_exp_timeout +ffffffff831a1010 D ipsec_soft_first_use +ffffffff831a1014 D ipsec_exp_first_use +ffffffff831a1018 D ipsec_expire_acquire +ffffffff831a101c D esp_enable +ffffffff831a1020 D ah_enable +ffffffff831a2000 D udpencap_enable +ffffffff831a2004 D udpencap_port +ffffffff831a3000 D carp_vh_rc +ffffffff831a3020 D carp_sc_rc +ffffffff831a3040 D carp_opts +ffffffff831a3058 D carp_cloner +ffffffff831a3088 d carp_send_na.mcast +ffffffff831a4000 d PADDING +ffffffff831a5000 d PADDING +ffffffff831a6000 d weak_keys +ffffffff831a7000 D swcr_id +ffffffff831a8000 D window_inflate +ffffffff831a8004 D window_deflate +ffffffff831a9000 D ghash_update +ffffffff831aa000 D mpls_defttl +ffffffff831aa004 D mpls_mapttl_ip +ffffffff831ab000 D nfskevq_lock +ffffffff831ac000 D nfs_backoff +ffffffff831ac020 D nfs_ptimers +ffffffff831ad000 D desirednfsrvcache +ffffffff831ad010 D nonidempotent +ffffffff831ad070 D nfsv2_repstat +ffffffff831ae000 D nfsv2_type +ffffffff831ae030 D nfsv3_type +ffffffff831ae060 D nv2tov_type +ffffffff831ae080 D nv3tov_type +ffffffff831ae0a0 D nfsv3_procid +ffffffff831ae100 D nfsv2_procid +ffffffff831ae15c d nfsv3err_getattr +ffffffff831ae170 d nfsv3err_setattr +ffffffff831ae190 d nfsv3err_lookup +ffffffff831ae1a4 d nfsv3err_access +ffffffff831ae1b0 d nfsv3err_readlink +ffffffff831ae1d0 d nfsv3err_read +ffffffff831ae1f0 d nfsv3err_write +ffffffff831ae210 d nfsv3err_create +ffffffff831ae230 d nfsv3err_mkdir +ffffffff831ae250 d nfsv3err_symlink +ffffffff831ae270 d nfsv3err_mknod +ffffffff831ae290 d nfsv3err_remove +ffffffff831ae2b0 d nfsv3err_rmdir +ffffffff831ae2d0 d nfsv3err_rename +ffffffff831ae300 d nfsv3err_link +ffffffff831ae330 d nfsv3err_readdir +ffffffff831ae350 d nfsv3err_readdirplus +ffffffff831ae366 d nfsv3err_fsstat +ffffffff831ae372 d nfsv3err_fsinfo +ffffffff831ae37c d nfsv3err_pathconf +ffffffff831ae386 d nfsv3err_commit +ffffffff831af000 D nfsrv3_procs +ffffffff831af0b8 D nfs_niothreads +ffffffff831b0000 D fragtbl +ffffffff831b1000 D ffs_vtbl +ffffffff831b2000 D softdep_typenames +ffffffff831b2070 D tickdelay +ffffffff831b3000 D dirchk +ffffffff831b4000 D desireddquot +ffffffff831b5000 D amap_list_lock +ffffffff831b6000 d uao_list_lock +ffffffff831b7000 d uvmexp_countersboot_boot_cpumem +ffffffff831b70c0 D uvmexp_counters +ffffffff831b70c8 D vm_min_kernel_address +ffffffff831b8000 D no_constraint +ffffffff831b9000 d uvm_kmapent_warn_rate +ffffffff831ba000 D maxslp +ffffffff831bb000 D uvmpagerops +ffffffff831bc000 D uvm_swap_data_lock +ffffffff831bc010 D swap_syscall_lock +ffffffff831bc020 D oommtx +ffffffff831bd000 D uvm_doswapencrypt +ffffffff831be000 D gif_list +ffffffff831be010 D gif_cloner +ffffffff831bf000 d sec_cloner +ffffffff831bf030 d sec_tdb_gc_mtx +ffffffff831bf040 d sec_tdb_gc_task +ffffffff831c0000 D divert6_sendspace +ffffffff831c0004 D divert6_recvspace +ffffffff831c0008 D divb6hashsize +ffffffff831c1000 d in6_get_hw_ifid.allone +ffffffff831c2000 D ip6_sendredirects +ffffffff831c2004 D ip6_defhlim +ffffffff831c2008 D ip6_defmcasthlim +ffffffff831c200c D ip6_maxfragpackets +ffffffff831c2010 D ip6_maxfrags +ffffffff831c2014 D ip6_log_interval +ffffffff831c2018 D ip6_hdrnestlimit +ffffffff831c201c D ip6_dad_count +ffffffff831c2020 D ip6_auto_flowlabel +ffffffff831c2024 D ip6_use_deprecated +ffffffff831c2028 D ip6_neighborgcthresh +ffffffff831c202c D ip6_maxdynroutes +ffffffff831c2030 D rip6_sendspace +ffffffff831c2038 D rip6_recvspace +ffffffff831c2040 D icmp6_redirtimeout +ffffffff831c2044 D icmp6errppslim +ffffffff831c2048 D ip6_mtudisc_timeout +ffffffff831c3000 D frag6_mutex +ffffffff831c4000 d icmp6_mtudisc_hiwat +ffffffff831c4004 d icmp6_mtudisc_lowat +ffffffff831c5000 d randomtab_20 +ffffffff831c6000 D ip6intrq +ffffffff831c6038 d ip6send_task +ffffffff831c7000 D nd6_timer_next +ffffffff831c7008 D nd6_expire_next +ffffffff831c7010 D nd6_delay +ffffffff831c7014 D nd6_umaxtries +ffffffff831c7018 D nd6_mmaxtries +ffffffff831c701c D nd6_gctimer +ffffffff831c7020 D nd6_maxndopt +ffffffff831c7028 D nd6_mtx +ffffffff831c7038 D nd6_list +ffffffff831c8000 d dadq +ffffffff831c9000 D pfkeyv2_mtx +ffffffff831c9010 d pfkeyv2_seq +ffffffff831ca000 D sadb_exts_allowed_in +ffffffff831ca090 D sadb_exts_required_in +ffffffff831cb000 D cold +ffffffff831cc000 D bdevsw +ffffffff831cc460 D nblkdev +ffffffff831cc470 D cdevsw +ffffffff831ce400 D nchrdev +ffffffff831ce404 D mem_no +ffffffff831ce408 D swapdev +ffffffff831ce410 D constab +ffffffff831cf000 D machine +ffffffff831cf008 D cpu_idle_cycle_fcn +ffffffff831cf010 D lid_action +ffffffff831cf014 D pwr_action +ffffffff831cf018 D isa_constraint +ffffffff831cf028 D dma_constraint +ffffffff831cf040 D uvm_md_constraints +ffffffff831cf058 D delay_func +ffffffff831cf060 D initclock_func +ffffffff831cf068 D startclock_func +ffffffff831cf070 D bootinfo_size +ffffffff831cf074 D waittime +ffffffff831cf078 D dumpmag +ffffffff831d0000 D tsc_rdtsc +ffffffff831d0008 D tsc_timecounter +ffffffff831d0058 D tsc_is_synchronized +ffffffff831d1000 D local_apic +ffffffff831d1020 D lapic_id +ffffffff831d1080 D lapic_tpr +ffffffff831d10a0 d lapic_ppr +ffffffff831d1100 d lapic_isr +ffffffff831d2000 D warn_once +ffffffff831d3000 d errata +ffffffff831d4000 D cpu_ucode_mtx +ffffffff831d5000 D mem_owner_bios +ffffffff831d5008 D mrops +ffffffff831d5028 D mtrrmask +ffffffff831d5030 D mtrrtomrt +ffffffff831d6000 D pmap_pg_wc +ffffffff831d6008 D pmaps_lock +ffffffff831d6018 d pmap_maxkvaddr +ffffffff831d7000 D kv_physwait +ffffffff831d8000 D fpu_save_len +ffffffff831d9000 D i8259_pic +ffffffff831da000 D softintr_pic +ffffffff831db000 D ipifunc +ffffffff831dc000 D setperf_mp_mutex +ffffffff831dd000 D db_Grp6 +ffffffff831dd040 D db_Grp7 +ffffffff831dd100 D db_Grp8 +ffffffff831dd140 D db_Grp9 +ffffffff831dd200 D db_GrpA +ffffffff831dd240 D db_GrpB +ffffffff831dd280 D db_GrpC +ffffffff831dd2c0 D db_inst_0f0x +ffffffff831dd440 D db_inst_0f2x +ffffffff831dd5c0 D db_inst_0f3x +ffffffff831dd740 D db_inst_0f8x +ffffffff831dd8c0 D db_inst_0f9x +ffffffff831dda40 D db_inst_0fax +ffffffff831ddbc0 D db_inst_0fbx +ffffffff831ddd40 D db_inst_0fcx +ffffffff831ddec0 D db_inst_0f +ffffffff831ddf40 D db_Esc92 +ffffffff831ddf80 D db_Esc94 +ffffffff831ddfc0 D db_Esc95 +ffffffff831de000 D db_Esc96 +ffffffff831de040 D db_Esc97 +ffffffff831de080 D db_Esca5 +ffffffff831de0c0 D db_Escb4 +ffffffff831de100 D db_Esce3 +ffffffff831de140 D db_Escf4 +ffffffff831de180 D db_Esc8 +ffffffff831de240 D db_Esc9 +ffffffff831de300 D db_Esca +ffffffff831de3c0 D db_Escb +ffffffff831de480 D db_Escc +ffffffff831de540 D db_Escd +ffffffff831de600 D db_Esce +ffffffff831de6c0 D db_Escf +ffffffff831de780 D db_Esc_inst +ffffffff831de7c0 D db_Grp1 +ffffffff831de800 D db_Grp2 +ffffffff831de840 D db_Grp3 +ffffffff831de900 D db_Grp4 +ffffffff831de9c0 D db_Grp5 +ffffffff831dea80 D db_inst_table +ffffffff831e0280 D db_bad_inst +ffffffff831e02a0 D db_index_reg_16 +ffffffff831e02e0 D db_reg +ffffffff831e04e0 D db_seg_reg +ffffffff831e0520 D db_lengths +ffffffff831e1000 D db_regs +ffffffff831e11e0 D db_eregs +ffffffff831e11f0 D db_reg_args +ffffffff831e2000 D timer_mutex +ffffffff831e2010 d i8254_timecounter +ffffffff831e3000 D spleen8x16 +ffffffff831e3058 D spleen12x24 +ffffffff831e30b0 D spleen16x32 +ffffffff831e3108 D spleen32x64 +ffffffff831e3160 d builtin_fonts +ffffffff831e31e0 d wsfont_add.cookiegen +ffffffff831e31f0 d spleen8x16_data +ffffffff831e3ff0 d spleen12x24_data +ffffffff831e69f0 d spleen16x32_data +ffffffff831ea1f0 d spleen32x64_data +ffffffff831f9000 D nsphy_cd +ffffffff831fa000 D nsphyter_cd +ffffffff831fb000 D gentbi_cd +ffffffff831fc000 D qsphy_cd +ffffffff831fd000 D inphy_cd +ffffffff831fe000 D iophy_cd +ffffffff831ff000 D eephy_cd +ffffffff83200000 D exphy_cd +ffffffff83201000 D rlphy_cd +ffffffff83202000 D lxtphy_cd +ffffffff83203000 D luphy_cd +ffffffff83204000 D mtdphy_cd +ffffffff83205000 D icsphy_cd +ffffffff83206000 D sqphy_cd +ffffffff83207000 D tqphy_cd +ffffffff83208000 D ukphy_cd +ffffffff83209000 D dcphy_cd +ffffffff8320a000 D bmtphy_cd +ffffffff8320b000 D brgphy_cd +ffffffff8320c000 D xmphy_cd +ffffffff8320d000 D amphy_cd +ffffffff8320e000 D acphy_cd +ffffffff8320f000 D nsgphy_cd +ffffffff83210000 D urlphy_cd +ffffffff83211000 D rgephy_cd +ffffffff83212000 D ciphy_cd +ffffffff83213000 D ipgphy_cd +ffffffff83214000 D etphy_cd +ffffffff83215000 D jmphy_cd +ffffffff83216000 D atphy_cd +ffffffff83217000 D scsi_autoconf +ffffffff83217008 D scsibus_cd +ffffffff83218000 D cd_cd +ffffffff83219000 D ch_cd +ffffffff83219020 D chquirks +ffffffff8321a000 D sd_cd +ffffffff8321b000 D st_cd +ffffffff8321c000 D uk_cd +ffffffff8321d000 D safte_cd +ffffffff8321e000 D ses_cd +ffffffff8321f000 D sym_cd +ffffffff8321f020 D sym_devices +ffffffff8321f070 D asym_devices +ffffffff83220000 D rdac_cd +ffffffff83220020 D rdac_devices +ffffffff83221000 D emc_cd +ffffffff83221020 D emc_devices +ffffffff83222000 D hds_cd +ffffffff83222020 D hds_devices +ffffffff83223000 D atapiscsi_cd +ffffffff83224000 D wd_cd +ffffffff83224020 d wddumpmulti +ffffffff83225000 D mainbus_cd +ffffffff83225020 D mba_iba +ffffffff83226000 D bios_cd +ffffffff83226020 D smbios_uninfo +ffffffff83227000 D mpbios_cd +ffffffff83227020 d mp_conf +ffffffff83227070 d extint_bus +ffffffff832270a0 d smi_bus +ffffffff832270d0 d nmi_bus +ffffffff83228000 D cpu_info_full_primary +ffffffff8322b000 D cpu_info_list +ffffffff8322b008 D mp_cpu_funcs +ffffffff8322b020 D cpu_cd +ffffffff8322b040 D cpu_info +ffffffff8322c000 D local_pic +ffffffff8322c090 D lapic_readreg +ffffffff8322c098 D lapic_writereg +ffffffff8322c0a0 D x86_ipi +ffffffff8322d000 D ioapic_cold +ffffffff8322d008 D ioapic_cd +ffffffff8322e000 D efifb_std_descr +ffffffff8322e030 D efifb_descrs +ffffffff8322e038 D efifb_accessops +ffffffff8322e098 D efifb_cd +ffffffff8322f000 D pvbus_cd +ffffffff8322f020 D pvbus_types +ffffffff8322f0e0 D pvbus_dma_tag +ffffffff83230000 D pvclock_cd +ffffffff83230020 D pvclock_timecounter +ffffffff83231000 D vmt_tclo_rpc +ffffffff832310d0 D vmt_cd +ffffffff83232000 D xen_cd +ffffffff83232020 D xen_bus_dma_tag +ffffffff83233000 D xnf_cd +ffffffff83234000 D xbf_cd +ffffffff83235000 D hv_msg_dispatch +ffffffff83235110 D hv_timecounter +ffffffff83235160 D hyperv_cd +ffffffff83236000 d hv_ic_devs +ffffffff83237000 D hvn_cd +ffffffff83238000 D hvs_cd +ffffffff83239000 D virtio_cd +ffffffff8323a000 D vio_cd +ffffffff8323b000 D vioblk_cd +ffffffff8323c000 D viomb_cd +ffffffff8323d000 D viornd_cd +ffffffff8323e000 D vioscsi_cd +ffffffff8323f000 D vmmci_cd +ffffffff83240000 D pci_cd +ffffffff83241000 D arc_fw_hdr +ffffffff83241008 D arc_cd +ffffffff83242000 D jmb_cd +ffffffff83243000 D mfii_cd +ffffffff83244000 D ips_cd +ffffffff83245000 D eap_cd +ffffffff83246000 D auacer_cd +ffffffff83247000 D auich_cd +ffffffff83248000 D azalia_cd +ffffffff83249000 D envy_cd +ffffffff83249020 D envy_matchids +ffffffff83249030 D envy_rates +ffffffff832490b0 D ak4524_dac +ffffffff832490d8 D ak4524_adc +ffffffff83249100 D ak4358_dac +ffffffff83249128 D ak5365_adc +ffffffff83249150 D unkenvy_codec +ffffffff83249180 D envy_cards +ffffffff832493f0 D envy_cards_ht +ffffffff83249600 d julia_eeprom +ffffffff8324a000 D emu_cd +ffffffff8324b000 D auixp_cd +ffffffff8324c000 D clcs_cd +ffffffff8324d000 D yds_cd +ffffffff8324e000 D auvia_cd +ffffffff8324f000 D qle_cd +ffffffff83250000 D mpii_cd +ffffffff83251000 D aq_cd +ffffffff83252000 D de_cd +ffffffff83253000 D pcn_cd +ffffffff83254000 D wdc_sii3114_vtbl +ffffffff83254038 D wdc_pdc203xx_vtbl +ffffffff83254070 D wdc_svwsata_vtbl +ffffffff832540a8 D pciide_cd +ffffffff832540d0 d sis_hostbr_type +ffffffff83255000 D ppb_cd +ffffffff83256000 D vr_cd +ffffffff83256020 D vr_devices +ffffffff83257000 D txp_cd +ffffffff83258000 D bt848_card_signature +ffffffff83259000 D bktr_cd +ffffffff8325a000 D em_cd +ffffffff8325b000 D ixgb_cd +ffffffff8325c000 D ix_cd +ffffffff8325c020 D ixgbe_smart_speed +ffffffff8325c024 D ixgbe_enable_msix +ffffffff8325d000 D ixl_cd +ffffffff8325d020 d ixl_sff_lock +ffffffff8325e000 D xge_cd +ffffffff8325f000 D thtc_cd +ffffffff8325f020 D tht_cd +ffffffff8325f040 D tht_txt_desc +ffffffff8325f068 D tht_rxf_desc +ffffffff8325f090 D tht_rxd_desc +ffffffff8325f0b8 D tht_txf_desc +ffffffff83260000 D myx_cd +ffffffff83261000 D oce_cd +ffffffff83262000 D dc_devs +ffffffff83263000 D cas_cd +ffffffff83264000 D sis_cd +ffffffff83265000 D se_cd +ffffffff83266000 D mbg_cd +ffffffff83267000 D cbb_cd +ffffffff83267020 D yc_chipsets +ffffffff832671b0 d pccbb_funcs +ffffffff832671e0 d pccbb_pcmcia_funcs +ffffffff83268000 D skc_cd +ffffffff83268020 D sk_cd +ffffffff83269000 D mskc_cd +ffffffff83269020 D msk_cd +ffffffff8326a000 D puc_cd +ffffffff8326b000 D puc_ndevs +ffffffff8326c000 D iwi_cd +ffffffff8326d000 D wpi_cd +ffffffff8326e000 D iwn_cd +ffffffff8326f000 D iwm_cd +ffffffff83270000 D iwx_cd +ffffffff83271000 D cmpci_cd +ffffffff83272000 D iha_cd +ffffffff83273000 D pcscp_cd +ffffffff83273020 D pcscp_glue +ffffffff83274000 D bge_cd +ffffffff83275000 D bnx_firmwares +ffffffff83275160 D bnx_rv2ps +ffffffff832751c0 D bnx_cd +ffffffff832751e0 d flash_5709 +ffffffff83275210 d flash_table +ffffffff83276000 D vge_cd +ffffffff83277000 D stge_cd +ffffffff83278000 D nfe_cd +ffffffff83279000 D et_cd +ffffffff8327a000 D jme_cd +ffffffff8327b000 D age_cd +ffffffff8327c000 D alc_dma_burst +ffffffff8327c020 D alc_cd +ffffffff8327d000 D ale_cd +ffffffff8327e000 D amdpm_cd +ffffffff8327e020 d amdpm_timecounter +ffffffff8327f000 D bce_cd +ffffffff83280000 D rtwn_cd +ffffffff83281000 d ral_rt2560_opns +ffffffff83281028 d ral_rt2661_opns +ffffffff83281050 d ral_rt2860_opns +ffffffff83282000 D piixpm_cd +ffffffff83283000 D vic_cd +ffffffff83284000 D vmx_cd +ffffffff83285000 D vmwpvs_cd +ffffffff83286000 D lii_cd +ffffffff83287000 D ichiic_cd +ffffffff83288000 D viapm_cd +ffffffff83288020 d viapm_timecounter +ffffffff83289000 D amdiic_cd +ffffffff8328a000 D nviic_cd +ffffffff8328b000 D kate_cd +ffffffff8328c000 D km_cd +ffffffff8328d000 D cpu_model_offsets +ffffffff8328d070 D ksmn_cd +ffffffff8328e000 D itherm_cd +ffffffff8328f000 D pchtemp_cd +ffffffff83290000 D xspd_cd +ffffffff83291000 D virtio_pci_ops +ffffffff83292000 D bwfm_pci_buscore_ops +ffffffff83292030 D bwfm_pci_bus_ops +ffffffff83292058 D bwfm_pci_msgbuf_ops +ffffffff83293000 D bnxt_cd +ffffffff83294000 D mcx_cd +ffffffff83295000 D iavf_cd +ffffffff83296000 D rge_cd +ffffffff83297000 D igc_cd +ffffffff83298000 D ngbe_cd +ffffffff83299000 D agp_cd +ffffffff8329a000 D intagp_cd +ffffffff8329a020 D agp_i810_methods +ffffffff8329b000 D reservation_ww_class +ffffffff8329c000 d bridge_lock +ffffffff8329c010 d bridge_list +ffffffff8329d000 d drm_connector_enum_list +ffffffff8329d1f8 d connector_list_lock +ffffffff8329d208 d connector_list +ffffffff8329e000 d kernel_fb_helper_list +ffffffff8329e010 d kernel_fb_helper_lock +ffffffff8329f000 D drm_global_mutex +ffffffff832a0000 D i2c_bit_algo +ffffffff832a0010 d drm_fence_context_count +ffffffff832a0018 d dma_fence_stub_mtx +ffffffff832a0028 D wait_bit_mtx +ffffffff832a0038 D shrinkers +ffffffff832a1000 d crtc_ww_class +ffffffff832a2000 d panel_lock +ffffffff832a2010 d panel_list +ffffffff832a3000 d ttm_global_mutex +ffffffff832a4000 D intel_bbops +ffffffff832a5000 d i915_sys_placement +ffffffff832a5020 d i915_ttm_bo_driver +ffffffff832a6000 d mchdev_lock +ffffffff832a7000 D inteldrm_stdscreen +ffffffff832a7030 D inteldrm_scrlist +ffffffff832a7038 D inteldrm_screenlist +ffffffff832a7048 D inteldrm_accessops +ffffffff832a70a8 D inteldrm_cd +ffffffff832a8000 d capture_mutex +ffffffff832a9000 d mitigations +ffffffff832aa000 D i915_modparams +ffffffff832ab000 d schedule_lock +ffffffff832ac000 d unbind_fence_ops +ffffffff832ad000 D intel_graphics_stolen_res +ffffffff832ae000 D btc_valid_sclk +ffffffff832af000 d evergreen_cs_packet_parse_vline.vline_start_end +ffffffff832af020 d evergreen_cs_packet_parse_vline.vline_status +ffffffff832b0000 d r600_cs_packet_parse_vline.vline_start_end +ffffffff832b0008 d r600_cs_packet_parse_vline.vline_status +ffffffff832b1000 d r100_asic +ffffffff832b12e0 d r200_asic +ffffffff832b15c0 d r300_asic_pcie +ffffffff832b18a0 d r300_asic +ffffffff832b1b80 d r420_asic +ffffffff832b1e60 d rs400_asic +ffffffff832b2140 d rs600_asic +ffffffff832b2420 d rs690_asic +ffffffff832b2700 d rv515_asic +ffffffff832b29e0 d r520_asic +ffffffff832b2cc0 d r600_asic +ffffffff832b2fa0 d rv6xx_asic +ffffffff832b3280 d rs780_asic +ffffffff832b3560 d rv770_asic +ffffffff832b3840 d evergreen_asic +ffffffff832b3b20 d sumo_asic +ffffffff832b3e00 d btc_asic +ffffffff832b40e0 d cayman_asic +ffffffff832b43c0 d trinity_asic +ffffffff832b46a0 d si_asic +ffffffff832b4980 d ci_asic +ffffffff832b4c60 d kv_asic +ffffffff832b5000 d dce6_funcs +ffffffff832b5018 d dce6_hdmi_funcs +ffffffff832b5088 d dce6_dp_funcs +ffffffff832b50f8 d dce4_funcs +ffffffff832b5110 d dce4_hdmi_funcs +ffffffff832b5180 d dce4_dp_funcs +ffffffff832b51f0 d dce32_funcs +ffffffff832b5208 d dce32_hdmi_funcs +ffffffff832b5278 d dce32_dp_funcs +ffffffff832b52e8 d r600_funcs +ffffffff832b5300 d r600_hdmi_funcs +ffffffff832b6000 D radeon_modeset +ffffffff832b6004 D radeon_dynclks +ffffffff832b6008 D radeon_agpmode +ffffffff832b600c D radeon_gart_size +ffffffff832b6010 D radeon_tv +ffffffff832b6014 D radeon_audio +ffffffff832b6018 D radeon_pcie_gen2 +ffffffff832b601c D radeon_msi +ffffffff832b6020 D radeon_lockup_timeout +ffffffff832b6024 D radeon_dpm +ffffffff832b6028 D radeon_aspm +ffffffff832b602c D radeon_runtime_pm +ffffffff832b6030 D radeon_vm_size +ffffffff832b6034 D radeon_vm_block_size +ffffffff832b6038 D radeon_use_pflipirq +ffffffff832b603c D radeon_bapm +ffffffff832b6040 D radeon_backlight +ffffffff832b6044 D radeon_auxch +ffffffff832b6048 D radeon_uvd +ffffffff832b604c D radeon_vce +ffffffff832b6050 D radeon_si_support +ffffffff832b6054 D radeon_cik_support +ffffffff832b6058 D radeondrm_cd +ffffffff832b6078 D radeondrm_stdscreen +ffffffff832b60a8 D radeondrm_scrlist +ffffffff832b60b0 D radeondrm_screenlist +ffffffff832b60c0 D radeondrm_accessops +ffffffff832b7000 D radeon_bbops +ffffffff832b8000 d radeon_bo_driver +ffffffff832b9000 d verde_pg_init +ffffffff832ba000 d cac_weights_pitcairn +ffffffff832ba4d0 d cac_weights_oland +ffffffff832bb000 d aldebaran_mode2_handler +ffffffff832bc000 d amdgpu_vbios_version_attrs +ffffffff832bd000 D amdgpu_asic_name +ffffffff832be000 D amdgpu_gart_size +ffffffff832be004 D amdgpu_gtt_size +ffffffff832be008 D amdgpu_moverate +ffffffff832be00c D amdgpu_audio +ffffffff832be010 D amdgpu_pcie_gen2 +ffffffff832be014 D amdgpu_msi +ffffffff832be018 D amdgpu_dpm +ffffffff832be01c D amdgpu_fw_load_type +ffffffff832be020 D amdgpu_aspm +ffffffff832be024 D amdgpu_runtime_pm +ffffffff832be028 D amdgpu_ip_block_mask +ffffffff832be02c D amdgpu_bapm +ffffffff832be030 D amdgpu_vm_size +ffffffff832be034 D amdgpu_vm_fragment_size +ffffffff832be038 D amdgpu_vm_block_size +ffffffff832be03c D amdgpu_vm_update_mode +ffffffff832be040 D amdgpu_dc +ffffffff832be044 D amdgpu_sched_jobs +ffffffff832be048 D amdgpu_sched_hw_submission +ffffffff832be050 D amdgpu_cg_mask +ffffffff832be058 D amdgpu_pg_mask +ffffffff832be05c D amdgpu_sdma_phase_quantum +ffffffff832be060 D amdgpu_pp_feature_mask +ffffffff832be064 D amdgpu_lbpw +ffffffff832be068 D amdgpu_compute_multipipe +ffffffff832be06c D amdgpu_gpu_recovery +ffffffff832be070 D amdgpu_smu_pptable_id +ffffffff832be074 D amdgpu_dc_feature_mask +ffffffff832be078 D amdgpu_async_gfx_ring +ffffffff832be07c D amdgpu_discovery +ffffffff832be080 D amdgpu_noretry +ffffffff832be084 D amdgpu_force_asic_type +ffffffff832be088 D amdgpu_tmz +ffffffff832be08c D amdgpu_reset_method +ffffffff832be090 D amdgpu_num_kcq +ffffffff832be094 D amdgpu_use_xgmi_p2p +ffffffff832be098 D amdgpu_sg_display +ffffffff832be0a0 D mgpu_info +ffffffff832be250 D amdgpu_ras_enable +ffffffff832be254 D amdgpu_ras_mask +ffffffff832be258 D amdgpu_bad_page_threshold +ffffffff832be25c D amdgpu_backlight +ffffffff832be260 D amdgpu_cd +ffffffff832be280 D amdgpu_stdscreen +ffffffff832be2b0 D amdgpu_scrlist +ffffffff832be2b8 D amdgpu_screenlist +ffffffff832be2c8 D amdgpu_accessops +ffffffff832bf000 d amdgpu_gtt_mgr_attributes +ffffffff832c0000 D amdgpu_bbops +ffffffff832c1000 D soc15_ih_clientid_name +ffffffff832c2000 D ras_error_string +ffffffff832c2030 D ras_block_string +ffffffff832c20c0 D ras_mca_block_string +ffffffff832c3000 d amdgpu_bo_driver +ffffffff832c4000 d amdgpu_vram_mgr_attributes +ffffffff832c5000 D amdgpu_xgmi_hive_type +ffffffff832c5008 d xgmi_mutex +ffffffff832c5018 D xgmi_ras_hw_ops +ffffffff832c5058 D xgmi_ras +ffffffff832c6000 d gfx_v9_0_ras +ffffffff832c7000 D gfx_v9_4_ras +ffffffff832c8000 D gfx_v9_4_2_ras_ops +ffffffff832c8040 D gfx_v9_4_2_ras +ffffffff832c9000 D hdp_v4_0_ras_hw_ops +ffffffff832c9040 D hdp_v4_0_ras +ffffffff832ca000 d jpeg_v2_6_ras +ffffffff832cb000 D mca_v3_0_mp0_ras +ffffffff832cb058 D mca_v3_0_mp1_ras +ffffffff832cb0b0 D mca_v3_0_mpio_ras +ffffffff832cc000 D mmhub_v1_0_ras_hw_ops +ffffffff832cc040 D mmhub_v1_0_ras +ffffffff832cd000 D mmhub_v1_7_ras_hw_ops +ffffffff832cd040 D mmhub_v1_7_ras +ffffffff832ce000 D mmhub_v9_4_ras +ffffffff832cf000 D nbio_v7_4_ras +ffffffff832d0000 d sriov_sc_video_codecs_encode +ffffffff832d0010 d sriov_sc_video_codecs_decode +ffffffff832d0020 d sriov_sc_video_codecs_encode_array +ffffffff832d0050 d sriov_sc_video_codecs_decode_array +ffffffff832d1000 d sdma_v4_0_ras +ffffffff832d2000 D sdma_v4_4_ras +ffffffff832d3000 d sienna_cichlid_mode2_handler +ffffffff832d4000 D umc_v6_1_ras +ffffffff832d5000 D umc_v6_7_ras +ffffffff832d6000 D umc_v8_10_ras +ffffffff832d7000 D umc_v8_7_ras +ffffffff832d8000 d vcn_v2_6_ras +ffffffff832d9000 d amdgpu_dm_mode_config_helperfuncs +ffffffff832d9010 d dm_atomic_state_funcs +ffffffff832da000 d construct_integrated_info.result +ffffffff832da004 d bios_parser_get_firmware_info.result +ffffffff832db000 d dce_funcs +ffffffff832dc000 d dce110_funcs +ffffffff832dd000 d dce112_funcs +ffffffff832de000 d dce120_funcs +ffffffff832df000 d rv1_clk_funcs +ffffffff832df088 d rv1_clk_internal_funcs +ffffffff832e0000 d rv2_clk_internal_funcs +ffffffff832e1000 d dcn2_funcs +ffffffff832e2000 D dcn201_funcs +ffffffff832e3000 d dcn21_funcs +ffffffff832e3088 d rn_bw_params +ffffffff832e4000 D dcn3_fpga_funcs +ffffffff832e4088 d dcn3_funcs +ffffffff832e5000 d vg_funcs +ffffffff832e5088 d dummy_clocks +ffffffff832e51b8 d vg_bw_params +ffffffff832e6000 d dcn31_bw_params +ffffffff832e62a0 d dcn31_funcs +ffffffff832e7000 d dcn314_bw_params +ffffffff832e72a0 d dcn314_funcs +ffffffff832e8000 d dcn315_funcs +ffffffff832e8088 d dcn315_bw_params +ffffffff832e9000 d dcn316_funcs +ffffffff832e9088 d dcn316_bw_params +ffffffff832ea000 d dcn32_funcs +ffffffff832eb000 d dcn10_dpp_cap +ffffffff832ec000 D aperture_default_system +ffffffff832ed000 d dcn20_dpp_cap +ffffffff832ed010 d dcn20_dpp_funcs +ffffffff832ee000 d dcn20_hubp_funcs +ffffffff832ef000 d dcn20_opp_funcs +ffffffff832f0000 d dcn20_tg_funcs +ffffffff832f1000 d dcn201_dpp_funcs +ffffffff832f1110 d dcn201_dpp_cap +ffffffff832f2000 d dcn201_hubp_funcs +ffffffff832f3000 d dcn201_opp_funcs +ffffffff832f4000 d dcn201_tg_funcs +ffffffff832f5000 D dcn201_ip +ffffffff832f51b8 D dcn201_soc +ffffffff832f5b88 d dcn201_res_pool_funcs +ffffffff832f6000 d dcn21_hubp_funcs +ffffffff832f7000 d dcn30_afmt_funcs +ffffffff832f8000 d dcn30_dpp_cap +ffffffff832f8010 d dcn30_dpp_funcs +ffffffff832f9000 d dcn30_hubp_funcs +ffffffff832fa000 d dcn30_tg_funcs +ffffffff832fb000 d dcn30_vpg_funcs +ffffffff832fc000 d res_cap_dcn301 +ffffffff832fc040 d dcn301_res_pool_funcs +ffffffff832fd000 d dcn302_res_pool_funcs +ffffffff832fe000 d dcn303_res_pool_funcs +ffffffff832ff000 d dcn31_afmt_funcs +ffffffff83300000 d dcn31_apg_funcs +ffffffff83301000 d dcn31_hpo_dp_link_encoder_funcs +ffffffff83302000 d dcn31_hubp_funcs +ffffffff83303000 d dcn31_tg_funcs +ffffffff83304000 d dcn31_res_pool_funcs +ffffffff83305000 d dcn31_vpg_funcs +ffffffff83306000 d dcn314_tg_funcs +ffffffff83307000 d dcn314_res_pool_funcs +ffffffff83308000 d dcn315_res_pool_funcs +ffffffff83309000 d dcn316_res_pool_funcs +ffffffff8330a000 d dcn32_dpp_funcs +ffffffff8330a110 d dcn32_dpp_cap +ffffffff8330b000 d dcn32_hpo_dp_link_encoder_funcs +ffffffff8330c000 d dcn32_hubp_funcs +ffffffff8330d000 d dcn32_tg_funcs +ffffffff8330e000 d dcn32_res_pool_funcs +ffffffff8330f000 d dcn321_res_pool_funcs +ffffffff83310000 D dcn1_0_ip +ffffffff833101b8 D dcn1_0_soc +ffffffff83311000 D dcn2_0_ip +ffffffff833111b8 D dcn2_0_nv14_ip +ffffffff83311370 D dcn2_0_soc +ffffffff83311d40 D dcn2_0_nv14_soc +ffffffff83312710 D dcn2_1_ip +ffffffff833128c8 D dcn2_1_soc +ffffffff83313298 D ddr4_wm_table_gs +ffffffff83313358 D lpddr4_wm_table_gs +ffffffff83313418 D lpddr4_wm_table_with_disabled_ppt +ffffffff833134d8 D ddr4_wm_table_rn +ffffffff83313598 D ddr4_1R_wm_table_rn +ffffffff83313658 D lpddr4_wm_table_rn +ffffffff83314000 D dcn3_0_ip +ffffffff833141b8 D dcn3_0_soc +ffffffff83315000 D dcn3_01_ip +ffffffff833151b8 D dcn3_01_soc +ffffffff83315b88 D ddr4_wm_table +ffffffff83315c48 D lpddr5_wm_table +ffffffff83316000 D dcn3_02_ip +ffffffff833161b8 D dcn3_02_soc +ffffffff83317000 D dcn3_03_ip +ffffffff833171b8 D dcn3_03_soc +ffffffff83318000 D dcn3_1_ip +ffffffff833181b8 D dcn3_15_ip +ffffffff83318370 D dcn3_16_ip +ffffffff83318528 d dcn3_15_soc +ffffffff83318ef8 d dcn3_1_soc +ffffffff833198c8 d dcn3_16_soc +ffffffff8331b000 D dcn3_14_ip +ffffffff8331b1b8 D dcn3_14_soc +ffffffff8331c000 D dcn3_2_ip +ffffffff8331c1b8 D dcn3_2_soc +ffffffff8331d000 D dcn3_21_ip +ffffffff8331d1b8 D dcn3_21_soc +ffffffff8331e000 d dsc_policy_max_target_bpp_limit +ffffffff8331f000 D DIDTEDCConfig_P12 +ffffffff8331f070 d smu7_profiling +ffffffff83320000 d cyan_skillfish_table_map +ffffffff83320080 d cyan_skillfish_message_map +ffffffff83321000 d navi10_table_map +ffffffff83321080 d navi10_pwr_src_map +ffffffff83321090 d navi10_workload_map +ffffffff833210d0 d navi10_message_map +ffffffff83321b20 d navi10_clk_map +ffffffff83321be0 d navi10_feature_mask_map +ffffffff83322000 d sienna_cichlid_message_map +ffffffff83322a50 d sienna_cichlid_table_map +ffffffff83322ad0 d sienna_cichlid_pwr_src_map +ffffffff83322ae0 d sienna_cichlid_workload_map +ffffffff83322b20 d sienna_cichlid_clk_map +ffffffff83322be0 d sienna_cichlid_feature_mask_map +ffffffff83323000 d vangogh_message_map +ffffffff83323a50 d vangogh_table_map +ffffffff83323ad0 d vangogh_workload_map +ffffffff83323b10 d vangogh_feature_mask_map +ffffffff83324000 d renoir_table_map +ffffffff83324080 d renoir_workload_map +ffffffff833240c0 d renoir_message_map +ffffffff83324b10 d renoir_clk_map +ffffffff83325000 d smu_v13_0_0_message_map +ffffffff83325a50 d smu_v13_0_0_feature_mask_map +ffffffff83325e20 d smu_v13_0_0_table_map +ffffffff83325ea0 d smu_v13_0_0_pwr_src_map +ffffffff83325eb0 d smu_v13_0_0_workload_map +ffffffff83325ef0 d smu_v13_0_0_clk_map +ffffffff83326000 d smu_v13_0_4_message_map +ffffffff83326a50 d smu_v13_0_4_table_map +ffffffff83326ad0 d smu_v13_0_4_feature_mask_map +ffffffff83327000 d smu_v13_0_5_table_map +ffffffff83327080 d smu_v13_0_5_message_map +ffffffff83327ad0 d smu_v13_0_5_feature_mask_map +ffffffff83328000 d smu_v13_0_7_message_map +ffffffff83328a50 d smu_v13_0_7_feature_mask_map +ffffffff83328e20 d smu_v13_0_7_table_map +ffffffff83328ea0 d smu_v13_0_7_pwr_src_map +ffffffff83328eb0 d smu_v13_0_7_workload_map +ffffffff83328ef0 d smu_v13_0_7_clk_map +ffffffff83329000 d yellow_carp_table_map +ffffffff83329080 d yellow_carp_message_map +ffffffff83329ad0 d yellow_carp_feature_mask_map +ffffffff8332a000 D pci_conf_lock +ffffffff8332a010 D pci_bus_dma_tag +ffffffff8332a088 D msi_pic +ffffffff8332a118 D msix_pic +ffffffff8332b000 D pchb_cd +ffffffff8332c000 D amas_cd +ffffffff8332d000 D cardslot_cd +ffffffff8332e000 D cardbus_cd +ffffffff8332f000 d csdevs +ffffffff83330000 d ral_rt2560_opns +ffffffff83330028 d ral_rt2661_opns +ffffffff83330050 d ral_rt2860_opns +ffffffff83331000 D pcmcia_cd +ffffffff83332000 D pcmcia_3cxem556_func0 +ffffffff833320b8 D pcmcia_3cxem556_func0_cfe0 +ffffffff83332158 D pcmcia_megahertz_xjem1144_func0 +ffffffff83332210 D pcmcia_megahertz_xjem1144_func0_cfe0 +ffffffff833322b0 d pcmcia_3cxem556_func1 +ffffffff83332368 d pcmcia_3cxem556_func1_cfe0 +ffffffff83332408 d pcmcia_megahertz_xjem1144_func1 +ffffffff833324c0 d pcmcia_megahertz_xjem1144_func1_cfe0 +ffffffff83332560 d pcmcia_sierra_a555_func1 +ffffffff83332618 d pcmcia_sierra_a555_func1_cfe0 +ffffffff833326b8 d pcmcia_sveclancard_func0 +ffffffff83332770 d pcmcia_sveclancard_func0_cfe0 +ffffffff83333000 D ep_pcmcia_prod +ffffffff83334000 D aic_pcmcia_prod +ffffffff83335000 D com_pcmcia_prod +ffffffff83336000 D wdc_pcmcia_pr +ffffffff83337000 D sm_pcmcia_prod +ffffffff83338000 D xe_cd +ffffffff83339000 D pcib_cd +ffffffff8333a000 D amdpcib_cd +ffffffff8333b000 D tcpcib_cd +ffffffff8333c000 D aapic_cd +ffffffff8333d000 D hme_cd +ffffffff8333e000 D isa_cd +ffffffff8333f000 D isadma_cd +ffffffff83340000 D fdc_cd +ffffffff83341000 D fd_types +ffffffff833411f8 D fd_cd +ffffffff83342000 D mpu_cd +ffffffff83343000 D pcppi_cd +ffffffff83344000 D spkr_cd +ffffffff83345000 D wbsio_cd +ffffffff83346000 D schsio_cd +ffffffff83347000 D it_cd +ffffffff83348000 D uguru_cd +ffffffff83349000 D aps_cd +ffffffff8334a000 D isa_bus_dma_tag +ffffffff8334b000 D wsdisplay_cd +ffffffff8334b020 D wsdisplay_cons +ffffffff8334b058 D wsdisplay_defaultscreens +ffffffff8334c000 D wskbd_cd +ffffffff8334c020 D wskbd_default_bell_data +ffffffff8334c030 D wskbd_default_keyrepeat_data +ffffffff8334c040 D wskbd_srcops +ffffffff8334d000 d compose_tab +ffffffff8334e000 D wsmouse_cd +ffffffff8334e020 D wsmouse_srcops +ffffffff8334f000 D wsmux_srcops +ffffffff8334f030 D wsmux_tree_lock +ffffffff83350000 D vt100_output +ffffffff83351000 D pckbd_cd +ffffffff83352000 D pms_cd +ffffffff83352020 d synaptics_params +ffffffff83352030 d alps_params +ffffffff83353000 D skgpio_cd +ffffffff83354000 D pctr_conf_lock +ffffffff83355000 D ukbd_keymapdata +ffffffff83356000 D usbrev_str +ffffffff83356030 D usb_cd +ffffffff83357000 d usbd_ratecheck.errinterval +ffffffff83358000 D uhub_cd +ffffffff83359000 D uaudio_cd +ffffffff8335a000 D uvideo_ctrls +ffffffff8335a2d8 D uvideo_cd +ffffffff8335b000 D utvfu_norm_params +ffffffff8335b030 D utvfu_cd +ffffffff8335c000 D udl_reg_vals_640x480_60 +ffffffff8335c020 D udl_reg_vals_640x480_67 +ffffffff8335c040 D udl_reg_vals_640x480_72 +ffffffff8335c060 D udl_reg_vals_640x480_75 +ffffffff8335c080 D udl_reg_vals_800x480_61 +ffffffff8335c0a0 D udl_reg_vals_800x600_56 +ffffffff8335c0c0 D udl_reg_vals_800x600_60 +ffffffff8335c0e0 D udl_reg_vals_800x600_72 +ffffffff8335c100 D udl_reg_vals_800x600_74 +ffffffff8335c120 D udl_reg_vals_800x600_75 +ffffffff8335c140 D udl_reg_vals_1024x768_60 +ffffffff8335c160 D udl_reg_vals_1024x768_70 +ffffffff8335c180 D udl_reg_vals_1024x768_75 +ffffffff8335c1a0 D udl_reg_vals_1280x800_60 +ffffffff8335c1c0 D udl_reg_vals_1280x960_60 +ffffffff8335c1e0 D udl_reg_vals_1280x1024_60 +ffffffff8335c200 D udl_reg_vals_1280x1024_75 +ffffffff8335c220 D udl_reg_vals_1366x768_60 +ffffffff8335c240 D udl_reg_vals_1440x900_60 +ffffffff8335c260 D udl_reg_vals_1440x900_59 +ffffffff8335c280 D udl_reg_vals_1440x900_75 +ffffffff8335c2a0 D udl_reg_vals_1680x1050_60 +ffffffff8335c2c0 D udl_reg_vals_1600x1200_60 +ffffffff8335c2e0 D udl_reg_vals_1920x1080_60 +ffffffff8335c300 D udl_null_key_1 +ffffffff8335c310 D udl_decomp_table +ffffffff8335d510 D udl_cd +ffffffff8335d530 D udl_stdscreen +ffffffff8335d560 D udl_scrlist +ffffffff8335d568 D udl_screenlist +ffffffff8335d578 D udl_accessops +ffffffff8335e000 D umidi_cd +ffffffff8335f000 d umq_YAMAHA_YAMAHA_UX256_ANYIFACE +ffffffff8335f020 d umq_ROLAND_ROLAND_UM1_2 +ffffffff8335f040 d umq_ROLAND_ROLAND_SC8850_2 +ffffffff8335f060 d umq_ROLAND_ROLAND_SD90_2 +ffffffff8335f080 d umq_ROLAND_ROLAND_UM880N_0 +ffffffff8335f0a0 d umq_ROLAND_ROLAND_UA100_2 +ffffffff8335f0c0 d umq_ROLAND_ROLAND_UM4_2 +ffffffff8335f0e0 d umq_ROLAND_ROLAND_U8_2 +ffffffff8335f100 d umq_ROLAND_ROLAND_UM2_2 +ffffffff8335f120 d umq_ROLAND_ROLAND_SC8820_2 +ffffffff8335f140 d umq_ROLAND_ROLAND_PC300_2 +ffffffff8335f160 d umq_ROLAND_ROLAND_SK500_2 +ffffffff8335f180 d umq_ROLAND_ROLAND_SCD70_2 +ffffffff8335f1a0 d umq_ROLAND_ROLAND_UM550_0 +ffffffff8335f1c0 d umq_ROLAND_ROLAND_SD20_0 +ffffffff8335f1e0 d umq_ROLAND_ROLAND_SD80_0 +ffffffff8335f200 d umq_ROLAND_ROLAND_UA700_3 +ffffffff8335f220 d umq_ROLAND_ROLAND_UMONE_ANYIFACE +ffffffff8335f240 D umidi_quirklist +ffffffff8335f4a0 d umq_YAMAHA_YAMAHA_UX256_ANYIFACE_fixed_ep_desc +ffffffff8335f4c0 d umq_YAMAHA_YAMAHA_UX256_ANYIFACE_fixed_ep_endpoints +ffffffff8335f4d0 d umq_ROLAND_ROLAND_UM1_2_fixed_ep_desc +ffffffff8335f4f0 d umq_ROLAND_ROLAND_UM1_2_fixed_ep_endpoints +ffffffff8335f500 d umq_ROLAND_ROLAND_SC8850_2_fixed_ep_desc +ffffffff8335f520 d umq_ROLAND_ROLAND_SC8850_2_fixed_ep_endpoints +ffffffff8335f530 d umq_ROLAND_ROLAND_SD90_2_fixed_ep_desc +ffffffff8335f550 d umq_ROLAND_ROLAND_SD90_2_fixed_ep_endpoints +ffffffff8335f560 d umq_ROLAND_ROLAND_UM880N_0_fixed_ep_desc +ffffffff8335f580 d umq_ROLAND_ROLAND_UM880N_0_fixed_ep_endpoints +ffffffff8335f590 d umq_ROLAND_ROLAND_UA100_2_fixed_ep_desc +ffffffff8335f5b0 d umq_ROLAND_ROLAND_UA100_2_fixed_ep_endpoints +ffffffff8335f5c0 d umq_ROLAND_ROLAND_UM4_2_fixed_ep_desc +ffffffff8335f5e0 d umq_ROLAND_ROLAND_UM4_2_fixed_ep_endpoints +ffffffff8335f5f0 d umq_ROLAND_ROLAND_U8_2_fixed_ep_desc +ffffffff8335f610 d umq_ROLAND_ROLAND_U8_2_fixed_ep_endpoints +ffffffff8335f620 d umq_ROLAND_ROLAND_UM2_2_fixed_ep_desc +ffffffff8335f640 d umq_ROLAND_ROLAND_UM2_2_fixed_ep_endpoints +ffffffff8335f650 d umq_ROLAND_ROLAND_SC8820_2_fixed_ep_desc +ffffffff8335f670 d umq_ROLAND_ROLAND_SC8820_2_fixed_ep_endpoints +ffffffff8335f680 d umq_ROLAND_ROLAND_PC300_2_fixed_ep_desc +ffffffff8335f6a0 d umq_ROLAND_ROLAND_PC300_2_fixed_ep_endpoints +ffffffff8335f6b0 d umq_ROLAND_ROLAND_SK500_2_fixed_ep_desc +ffffffff8335f6d0 d umq_ROLAND_ROLAND_SK500_2_fixed_ep_endpoints +ffffffff8335f6e0 d umq_ROLAND_ROLAND_SCD70_2_fixed_ep_desc +ffffffff8335f700 d umq_ROLAND_ROLAND_SCD70_2_fixed_ep_endpoints +ffffffff8335f710 d umq_ROLAND_ROLAND_UM550_0_fixed_ep_desc +ffffffff8335f730 d umq_ROLAND_ROLAND_UM550_0_fixed_ep_endpoints +ffffffff8335f740 d umq_ROLAND_ROLAND_SD20_0_fixed_ep_desc +ffffffff8335f760 d umq_ROLAND_ROLAND_SD20_0_fixed_ep_endpoints +ffffffff8335f770 d umq_ROLAND_ROLAND_SD80_0_fixed_ep_desc +ffffffff8335f790 d umq_ROLAND_ROLAND_SD80_0_fixed_ep_endpoints +ffffffff8335f7a0 d umq_ROLAND_ROLAND_UA700_3_fixed_ep_desc +ffffffff8335f7c0 d umq_ROLAND_ROLAND_UA700_3_fixed_ep_endpoints +ffffffff8335f7d0 d umq_ROLAND_ROLAND_UMONE_ANYIFACE_fixed_ep_desc +ffffffff8335f7f0 d umq_ROLAND_ROLAND_UMONE_ANYIFACE_fixed_ep_endpoints +ffffffff83360000 D ucom_cd +ffffffff83361000 D ugen_cd +ffffffff83362000 D uhidev_cd +ffffffff83362020 d uhidev_use_rdesc.reportbuf +ffffffff83363000 D uhid_cd +ffffffff83364000 D fido_cd +ffffffff83365000 D ujoy_cd +ffffffff83366000 D ukbd_cd +ffffffff83367000 D ums_cd +ffffffff83367020 d ums_fix_elecom_descriptor.match +ffffffff83368000 D umt_cd +ffffffff83369000 D def_scale +ffffffff83369020 D uts_cd +ffffffff8336a000 D ubcmtp_cd +ffffffff8336a020 d ubcmtp_wsmousecfg +ffffffff8336b000 D ucycom_cd +ffffffff8336c000 D uslhcom_cd +ffffffff8336d000 D ulpt_fwdevs +ffffffff8336d060 D ulpt_cd +ffffffff8336d080 D ulptusein +ffffffff8336e000 D umass_cd +ffffffff8336e020 d umass_bbb_transfer.dCBWtag +ffffffff8336f000 D uthum_cd +ffffffff83370000 D ugold_cd +ffffffff83370020 d cmd_init +ffffffff83370028 d cmd_type +ffffffff83370030 d cmd_data +ffffffff83371000 D utrh_cd +ffffffff83372000 D uoakrh_cd +ffffffff83373000 D uoaklux_cd +ffffffff83374000 D uoakv_cd +ffffffff83375000 D uonerng_cd +ffffffff83376000 D urng_cd +ffffffff83377000 D udcf_cd +ffffffff83378000 D umbg_cd +ffffffff83379000 D uvisor_cd +ffffffff8337a000 D udsbr_cd +ffffffff8337b000 D utwitch_cd +ffffffff8337c000 D aue_cd +ffffffff8337d000 D axe_cd +ffffffff8337e000 D axen_cd +ffffffff8337f000 D smsc_cd +ffffffff83380000 D cue_devs +ffffffff83380010 D cue_cd +ffffffff83381000 D kue_cd +ffffffff83382000 D cdce_cd +ffffffff83383000 D urndis_cd +ffffffff83384000 D mos_cd +ffffffff83385000 D mue_cd +ffffffff83386000 D udav_cd +ffffffff83387000 D upl_devs +ffffffff83387008 D upl_cd +ffffffff83388000 D ugl_devs +ffffffff83388008 D ugl_cd +ffffffff83389000 D url_cd +ffffffff8338a000 D ure_cd +ffffffff8338b000 D uaq_cd +ffffffff8338c000 D umodem_cd +ffffffff8338d000 D uftdi_cd +ffffffff8338e000 D uplcom_cd +ffffffff8338f000 D umct_cd +ffffffff83390000 D uvscom_cd +ffffffff83391000 D ubsa_cd +ffffffff83392000 D ukspan_cd +ffffffff83393000 D uslcom_cd +ffffffff83394000 D uark_cd +ffffffff83395000 D moscom_cd +ffffffff83396000 D umcs_cd +ffffffff83397000 D uscom_cd +ffffffff83398000 D ucrcom_cd +ffffffff83399000 D uxrcom_cd +ffffffff8339a000 D uipaq_cd +ffffffff8339b000 D umsm_cd +ffffffff8339c000 D uchcom_cd +ffffffff8339d000 D uticom_cd +ffffffff8339e000 D wi_func_usb +ffffffff8339e060 D wi_usb_cd +ffffffff8339f000 D atu_cd +ffffffff8339f020 D atu_devs +ffffffff8339f270 D atu_radfirm +ffffffff833a0000 D ural_cd +ffffffff833a1000 D rum_cd +ffffffff833a2000 D run_cd +ffffffff833a2020 D rt3070_freqs +ffffffff833a3000 D mtw_cd +ffffffff833a4000 D zyd_cd +ffffffff833a5000 D upgt_cd +ffffffff833a6000 D urtw_cd +ffffffff833a7000 D urtwn_cd +ffffffff833a8000 D rsu_cd +ffffffff833a9000 D otus_cd +ffffffff833a9020 d AR_PLCP_HDR_INTR +ffffffff833aa000 D umb_xfer_tout +ffffffff833aa010 D umb_uuid_basic_connect +ffffffff833aa020 D umb_uuid_context_internet +ffffffff833aa030 D umb_uuid_qmi_mbim +ffffffff833aa040 D umb_cd +ffffffff833aa060 D umb_delay +ffffffff833aa070 D umb_qmi_alloc_cid +ffffffff833aa080 D umb_qmi_fcc_auth +ffffffff833ab000 D uath_cd +ffffffff833ac000 D uow_cd +ffffffff833ad000 D uberry_cd +ffffffff833ae000 D upd_cd +ffffffff833ae020 d upd_usage_roots +ffffffff833ae0a0 d upd_usage_batdep +ffffffff833af000 D uwacom_cd +ffffffff833af020 d uwacom_attach.wacom_report_buf +ffffffff833b0000 D bwfm_usb_bus_ops +ffffffff833b1000 D umstc_cd +ffffffff833b2000 D uhidpp_cd +ffffffff833b3000 D ucc_cd +ffffffff833b4000 D iic_cd +ffffffff833b5000 D probe_addrs_sensor +ffffffff833b5008 D probe_addrs_eeprom +ffffffff833b6000 D lmtemp_cd +ffffffff833b7000 D lmn_worklist +ffffffff833b7240 D lmn_cd +ffffffff833b8000 D lmenv_cd +ffffffff833b9000 D maxtmp_cd +ffffffff833ba000 D adc_cd +ffffffff833bb000 D admtemp_cd +ffffffff833bc000 D admlc_cd +ffffffff833bd000 D admtm_cd +ffffffff833be000 D admtmp_cd +ffffffff833bf000 D admtt_cd +ffffffff833c0000 D maxds_cd +ffffffff833c1000 D adt_chips +ffffffff833c1160 D worklist +ffffffff833c11a0 D adt_cd +ffffffff833c2000 D admcts_cd +ffffffff833c3000 D wbng_cd +ffffffff833c4000 D nvt_cd +ffffffff833c5000 D adl_worklist +ffffffff833c5138 D adl_cd +ffffffff833c6000 D andl_cd +ffffffff833c7000 D sdtemp_cd +ffffffff833c8000 D lisa_cd +ffffffff833c9000 D ihidev_cd +ffffffff833ca000 D ikbd_cd +ffffffff833cb000 D ims_cd +ffffffff833cc000 D imt_cd +ffffffff833cd000 D iatp_cd +ffffffff833ce000 D ietp_cd +ffffffff833cf000 D bgw_cd +ffffffff833d0000 D icc_cd +ffffffff833d1000 D gpio_cd +ffffffff833d2000 D acpi_cd +ffffffff833d2020 D acpi_pcidevs +ffffffff833d2030 D acpi_pcirootdevs +ffffffff833d2040 D acpi_taskq +ffffffff833d2050 d acpi_indicator.save_led_state +ffffffff833d2060 d acpi_getprop.prop_guid +ffffffff833d2070 d acpi_getpropint.prop_guid +ffffffff833d2080 D acpi_skip_hids +ffffffff833d20f0 D acpi_isa_hids +ffffffff833d3000 D aml_intlen +ffffffff833d3010 D aml_table +ffffffff833d3af0 d osstring +ffffffff833d3b10 D aml_defobj +ffffffff833d3ca0 D aml_valid_osi +ffffffff833d3d78 D acpi_max_osi +ffffffff833d3d80 D aml_regionspace +ffffffff833d5000 D acpitimer_cd +ffffffff833d5020 d acpi_timecounter +ffffffff833d6000 D acpiac_cd +ffffffff833d6020 D acpiac_hids +ffffffff833d7000 D acpibat_cd +ffffffff833d7020 D acpibat_hids +ffffffff833d8000 D acpibtn_cd +ffffffff833d8020 D acpibtn_hids +ffffffff833d9000 D acpicmos_cd +ffffffff833d9020 D acpicmos_hids +ffffffff833da000 D acpicpu_cd +ffffffff833da020 D acpicpu_hids +ffffffff833da030 d acpicpu_set_pdc.cpu_oscuuid +ffffffff833db000 D acpihpet_cd +ffffffff833db020 d hpet_timecounter +ffffffff833dc000 D acpiec_cd +ffffffff833dc020 D acpiec_hids +ffffffff833dd000 D acpitz_cd +ffffffff833dd020 D acpitz_perflevel +ffffffff833de000 D acpimadt_cd +ffffffff833df000 D acpimcfg_cd +ffffffff833e0000 D acpiprt_map_list +ffffffff833e0010 D acpiprt_cd +ffffffff833e0030 D acpiprt_pri +ffffffff833e1000 D acpidmar_force_cm +ffffffff833e1008 D acpidmar_cd +ffffffff833e1030 D vtd_faults +ffffffff833e2000 D acpidock_cd +ffffffff833e3000 D abl_cd +ffffffff833e3020 D abl_hids +ffffffff833e4000 D asmc_cd +ffffffff833e4020 D asmc_hids +ffffffff833e5000 D acpiasus_cd +ffffffff833e5020 D acpiasus_hids +ffffffff833e6000 D acpithinkpad_cd +ffffffff833e6020 D acpithinkpad_hids +ffffffff833e7000 D acpitoshiba_cd +ffffffff833e7020 D acpitoshiba_hids +ffffffff833e8000 D acpisony_cd +ffffffff833e9000 D acpivideo_cd +ffffffff833ea000 D acpivout_cd +ffffffff833eb000 D acpipwrres_cd +ffffffff833ec000 D aibs_cd +ffffffff833ec020 d aibs_hids +ffffffff833ed000 D aplgpio_cd +ffffffff833ed020 D aplgpio_hids +ffffffff833ee000 D bytgpio_cd +ffffffff833ee020 D bytgpio_hids +ffffffff833ef000 D chvgpio_cd +ffffffff833ef020 D chvgpio_hids +ffffffff833f0000 D glkgpio_cd +ffffffff833f0020 D glkgpio_hids +ffffffff833f1000 D pchgpio_cd +ffffffff833f1020 D pchgpio_hids +ffffffff833f1070 D pchgpio_devices +ffffffff833f2000 D tipmic_cd +ffffffff833f2020 D tipmic_thermal_regmap +ffffffff833f2030 D tipmic_power_regmap +ffffffff833f3000 D ccpmic_cd +ffffffff833f3020 D ccpmic_thermal_regmap +ffffffff833f3023 D ccpmic_power_regmap +ffffffff833f4000 D com_hids +ffffffff833f5000 D sdhc_hids +ffffffff833f6000 D dwiic_hids +ffffffff833f6050 D ihidev_hids +ffffffff833f6070 D ietp_hids +ffffffff833f6220 D iatp_hids +ffffffff833f6240 d dwiic_acpi_found_ihidev.i2c_hid_guid +ffffffff833f7000 D acpicbkbd_cd +ffffffff833f7020 D acpicbkbd_hids +ffffffff833f8000 D acpials_cd +ffffffff833f8020 D acpials_hids +ffffffff833f9000 D tpm_cd +ffffffff833f9020 D tpm_hids +ffffffff833fa000 D acpihve_cd +ffffffff833fb000 D acpisbs_cd +ffffffff833fb020 D acpisbs_hids +ffffffff833fc000 D acpisurface_cd +ffffffff833fc020 D acpisurface_hids +ffffffff833fd000 D ipmi_acpi_hids +ffffffff833fe000 D amdgpio_cd +ffffffff833fe020 D amdgpio_hids +ffffffff833ff000 D acpihid_cd +ffffffff833ff020 D acpihid_hids +ffffffff833ff030 d acpihid_guid +ffffffff83400000 d iosf_hids +ffffffff83401000 D acpipci_cd +ffffffff83401020 D acpipci_hids +ffffffff83401040 d acpipci_osc.uuid +ffffffff83402000 D efi_cd +ffffffff83403000 D vmm_cd +ffffffff83404000 D vmm_hv_signature +ffffffff83405000 D sdmmc_cd +ffffffff83406000 D bwfm_sdio_bus_ops +ffffffff83406028 D bwfm_sdio_buscore_ops +ffffffff83407000 D onewire_cd +ffffffff83408000 D owid_cd +ffffffff83409000 D owsbm_cd +ffffffff8340a000 D owtemp_cd +ffffffff8340b000 D owctr_cd +ffffffff8340c000 D hz +ffffffff8340c004 D tick +ffffffff8340c008 D tick_nsec +ffffffff8340c00c D initialvnodes +ffffffff8340c010 D maxprocess +ffffffff8340c014 D maxthread +ffffffff8340c018 D maxfiles +ffffffff8340c020 D nmbclust +ffffffff8340c028 D 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vgaconsole +ffffffff8341848c B vga_console_type +ffffffff83419000 b wdc_alloc_queue.inited +ffffffff83419008 B wdc_xfer_pool +ffffffff834191b0 B wdc_xfer_iopool +ffffffff8341a000 B aic_debug +ffffffff8341b000 B gdt_cnt +ffffffff8341b004 B gdt_polling +ffffffff8341b005 B gdt_from_wait +ffffffff8341b008 b gdt_exec_ccb.__level +ffffffff8341b00c B gdt_wait_index +ffffffff8341b010 B gdt_wait_gdt +ffffffff8341c000 B sili_error_pmp_ports +ffffffff8341d000 B ncr53c9x_debug +ffffffff8341d008 b ecb_iopool +ffffffff8341d048 b ecb_pool_initialized +ffffffff8341d050 b ecb_pool +ffffffff8341d1f8 B sdebug +ffffffff8341e000 B epic_copy_small +ffffffff8341f000 B comconsaddr +ffffffff8341f008 B comconsiot +ffffffff8341f010 B comconsioh +ffffffff8341f018 B comconsfreq +ffffffff8341f01c B comcons_reg_width +ffffffff8341f020 B commajor +ffffffff8341f024 B comconsunit +ffffffff8341f028 B comcons_reg_shift +ffffffff8341f02c B comconsattached +ffffffff83420000 B pckbc_console +ffffffff83420004 B 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