--- 7.3/2023-10-01T06:17:06Z/2023-09-05T00:00:00Z/nm-bsd-ot14.txt	Mon Oct  2 11:03:57 2023
+++ 7.3/2023-10-01T06:17:06Z/2023-09-06T00:00:00Z/nm-bsd-ot14.txt	Mon Oct  2 13:49:25 2023
@@ -5488,24 +5488,23 @@ ffffffff8129a670 T clockqueue_intrclock_install
 ffffffff8129a6e0 T clockintr_establish
 ffffffff8129a780 T clockintr_hardclock
 ffffffff8129a7f0 T clockintr_statclock
-ffffffff8129a910 T clockintr_schedule
-ffffffff8129aa90 T clockintr_advance
-ffffffff8129acd0 T clockintr_stagger
-ffffffff8129ad90 T clockintr_trigger
-ffffffff8129ae20 T clockintr_dispatch
-ffffffff8129b2e0 T clockqueue_next
-ffffffff8129b360 T clockintr_cancel_locked
-ffffffff8129b440 T clockintr_schedule_locked
-ffffffff8129b550 T nsec_advance
-ffffffff8129b5d0 T clockqueue_reset_intrclock
-ffffffff8129b6e0 T clockintr_cancel
-ffffffff8129b860 T clockintr_expiration
-ffffffff8129b8d0 T clockintr_nsecuptime
-ffffffff8129b930 T clockqueue_init
-ffffffff8129b9b0 T sysctl_clockintr
-ffffffff8129bba0 T db_show_all_clockintr
-ffffffff8129bc80 T db_show_clockintr_cpu
-ffffffff8129bf00 T db_show_clockintr
+ffffffff8129a900 T clockintr_schedule
+ffffffff8129aa80 T clockintr_advance
+ffffffff8129acc0 T clockintr_stagger
+ffffffff8129ad80 T clockintr_trigger
+ffffffff8129ae10 T clockintr_dispatch
+ffffffff8129b2d0 T clockqueue_next
+ffffffff8129b350 T clockintr_cancel_locked
+ffffffff8129b430 T clockintr_schedule_locked
+ffffffff8129b540 T nsec_advance
+ffffffff8129b5c0 T clockqueue_reset_intrclock
+ffffffff8129b6d0 T clockintr_advance_random
+ffffffff8129b790 T clockintr_cancel
+ffffffff8129b910 T clockqueue_init
+ffffffff8129b990 T sysctl_clockintr
+ffffffff8129bb80 T db_show_all_clockintr
+ffffffff8129bc60 T db_show_clockintr_cpu
+ffffffff8129bee0 T db_show_clockintr
 ffffffff8129c000 T filedesc_init
 ffffffff8129c090 T find_last_set
 ffffffff8129c130 T fd_iterfile
@@ -15133,22 +15132,22 @@ ffffffff81782610 t em_commit_shadow_ram
 ffffffff81782b90 T em_read_part_num
 ffffffff81782c30 T em_read_mac_addr
 ffffffff81782db0 T em_mc_addr_list_update
-ffffffff81782fd0 T em_hash_mc_addr
-ffffffff817830d0 T em_rar_set
-ffffffff817831d0 T em_mta_set
-ffffffff81783340 T em_get_bus_info
-ffffffff817834d0 T em_check_mng_mode
-ffffffff81783550 T em_valid_nvm_bank_detect_ich8lan
-ffffffff81783700 T em_read_eeprom_spt
-ffffffff817839d0 T em_read_ich8_data32
-ffffffff81783b40 t em_ich8_cycle_init
-ffffffff81783cf0 t em_ich8_flash_cycle
-ffffffff81783e60 T em_configure_k1_ich8lan
-ffffffff81784070 t em_get_hw_eeprom_semaphore
-ffffffff817841e0 t em_shift_out_mdi_bits
-ffffffff81784360 t em_erase_ich8_4k_segment
-ffffffff817845a0 t em_write_ich8_byte
-ffffffff81784710 t em_read_ich8_data
+ffffffff81782ec0 T em_hash_mc_addr
+ffffffff81782fc0 T em_mta_set
+ffffffff81783130 T em_rar_set
+ffffffff81783230 T em_get_bus_info
+ffffffff817833c0 T em_check_mng_mode
+ffffffff81783440 T em_valid_nvm_bank_detect_ich8lan
+ffffffff817835f0 T em_read_eeprom_spt
+ffffffff817838c0 T em_read_ich8_data32
+ffffffff81783a30 t em_ich8_cycle_init
+ffffffff81783be0 t em_ich8_flash_cycle
+ffffffff81783d50 T em_configure_k1_ich8lan
+ffffffff81783f60 t em_get_hw_eeprom_semaphore
+ffffffff817840d0 t em_shift_out_mdi_bits
+ffffffff81784250 t em_erase_ich8_4k_segment
+ffffffff81784490 t em_write_ich8_byte
+ffffffff81784600 t em_read_ich8_data
 ffffffff81785000 T em_lookup_gcu
 ffffffff81785030 T em_attach_miibus
 ffffffff81785060 T gcu_miibus_readreg
@@ -39305,18 +39304,18 @@ ffffffff82560000 r isomappings
 ffffffff82560080 r unimappings
 ffffffff82560230 r replacements
 ffffffff82563bf6 r cmd0646_9_tim_udma
-ffffffff825b7d28 r pp_r600_decoded_lanes
-ffffffff825d3176 r cmd680_setup_channel.udma_tbl
-ffffffff825dae59 r apollo_udma33_tim
-ffffffff825e0f26 r substchar
-ffffffff825e305b r apollo_udma100_tim
-ffffffff8260aa6f r apollo_udma66_tim
-ffffffff82611faf r apollo_pio_rec
-ffffffff826214d0 r cy_pio_rec
-ffffffff82650cb3 r apollo_udma133_tim
-ffffffff8265d9b8 R drm_ca
-ffffffff8265d9e0 R drm_filtops
-ffffffff8265da10 R drmread_filtops
+ffffffff825b7d1e r pp_r600_decoded_lanes
+ffffffff825d316c r cmd680_setup_channel.udma_tbl
+ffffffff825dae4f r apollo_udma33_tim
+ffffffff825e0f1c r substchar
+ffffffff825e3051 r apollo_udma100_tim
+ffffffff8260aa65 r apollo_udma66_tim
+ffffffff82611fa5 r apollo_pio_rec
+ffffffff826214c6 r cy_pio_rec
+ffffffff82650ca9 r apollo_udma133_tim
+ffffffff8265d9b0 R drm_ca
+ffffffff8265d9d8 R drm_filtops
+ffffffff8265da08 R drmread_filtops
 ffffffff8265e000 r vga_emulops
 ffffffff8265e048 R vga_stdscreen
 ffffffff8265e078 R vga_stdscreen_mono