--- 7.3/2023-09-01T06:17:13Z/2023-08-29T00:00:00Z/nm-bsd-ot14.txt Mon Sep 4 16:28:03 2023 +++ 7.3/2023-09-01T06:17:13Z/2023-08-30T00:00:00Z/nm-bsd-ot14.txt Mon Sep 4 19:14:37 2023 @@ -2,14 +2,14 @@ 00011006 A mp_pdirpa 0001419d A acpi_pdirpa 01000000 A __kernel_phys_base -0255a000 T __kernel_kutext_phys -0255e000 C __kernel_cptext_phys -0255f000 C __kernel_rodata_phys -02e1b000 R __kernel_kutext_page_phys -02e1d000 C __kernel_randomdata_phys -030dc000 R __kernel_data_phys -03412000 D __kernel_kudata_phys -03413000 C __kernel_bss_phys +02559000 T __kernel_kutext_phys +0255d000 C __kernel_cptext_phys +0255e000 C __kernel_rodata_phys +02e1a000 R __kernel_kutext_page_phys +02e1c000 C __kernel_randomdata_phys +030db000 R __kernel_data_phys +03411000 D __kernel_kudata_phys +03412000 C __kernel_bss_phys 03800000 B __kernel_phys_end 80000000 A __kernel_virt_to_phys ffffffff80000000 A __kernel_base @@ -5440,8 +5440,8 @@ ffffffff81295740 T vmcmd_mutable ffffffff812957b0 T vmcmd_randomize ffffffff81295910 T exec_setup_stack ffffffff81296000 T main -ffffffff81296810 T start_init -ffffffff81296b00 T check_console +ffffffff812967e0 T start_init +ffffffff81296ad0 T check_console ffffffff81297000 T sys_acct ffffffff812971c0 T acct_start ffffffff81297220 T acct_process @@ -5628,18 +5628,18 @@ ffffffff812a74d0 T exec_timekeep_map ffffffff812a7670 T exec_sigcode_map ffffffff812a8000 T sys_exit ffffffff812a8020 T exit1 -ffffffff812a8660 T sys___threxit -ffffffff812a86c0 T process_untrace -ffffffff812a8750 T process_reparent -ffffffff812a88c0 T process_clear_orphan -ffffffff812a8930 T exit2 -ffffffff812a89a0 T proc_free -ffffffff812a8a00 T reaper -ffffffff812a8bd0 T process_zap -ffffffff812a8da0 T dowait6 -ffffffff812a9220 T proc_finish_wait -ffffffff812a9330 T sys_wait4 -ffffffff812a9480 T sys_waitid +ffffffff812a8730 T sys___threxit +ffffffff812a8790 T process_untrace +ffffffff812a8820 T process_reparent +ffffffff812a8990 T process_clear_orphan +ffffffff812a8a00 T exit2 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sched_stop_secondary_cpus +ffffffff812c0b90 T sched_barrier_task +ffffffff812c0c70 T sched_barrier +ffffffff812c0d60 T cpuset_clear +ffffffff812c0d90 T cpuset_add_all +ffffffff812c0dc0 T cpuset_union +ffffffff812c0e30 T cpuset_cardinality +ffffffff812c0f10 T sysctl_hwncpuonline +ffffffff812c0ff0 T cpu_is_online +ffffffff812c1040 T sysctl_hwsmt ffffffff812c2000 T intrmap_create ffffffff812c21a0 t intrmap_cpus_get ffffffff812c2330 t intrmap_set_grid @@ -6097,23325 +6097,23337 @@ ffffffff812d5fe0 T tc_adjtime ffffffff812d7000 T settime ffffffff812d70e0 T resettodr ffffffff812d7150 T clock_gettime -ffffffff812d73f0 T sys_clock_gettime -ffffffff812d74b0 T sys_clock_settime -ffffffff812d7540 T sys_clock_getres -ffffffff812d7700 T sys_nanosleep -ffffffff812d7970 T sys_gettimeofday -ffffffff812d7a40 T sys_settimeofday -ffffffff812d7b50 T sys_adjfreq -ffffffff812d7c70 T sys_adjtime -ffffffff812d7e70 T setitimer -ffffffff812d81e0 T process_reset_itimer_flag -ffffffff812d8250 T cancel_all_itimers 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ieee80211_ccmp_delete_key +ffffffff814050f0 T ieee80211_ccmp_encrypt +ffffffff814055b0 t ieee80211_ccmp_phase1 +ffffffff81405940 T ieee80211_ccmp_get_pn +ffffffff81405a50 T ieee80211_ccmp_decrypt +ffffffff81406000 T ieee80211_tkip_set_key +ffffffff814060a0 T ieee80211_tkip_delete_key +ffffffff81406110 T ieee80211_tkip_mic +ffffffff81406290 T ieee80211_tkip_encrypt +ffffffff814066e0 t Phase1 +ffffffff81406870 t Phase2 +ffffffff81406b00 T ieee80211_tkip_get_tsc +ffffffff81406c10 T ieee80211_tkip_decrypt +ffffffff81407110 T ieee80211_michael_mic_failure +ffffffff814072a0 T ieee80211_michael_mic_failure_timeout +ffffffff814072d0 t ieee80211_tkip_deauth +ffffffff81408000 T ieee80211_wep_set_key +ffffffff81408060 T ieee80211_wep_delete_key +ffffffff814080d0 T ieee80211_wep_encrypt +ffffffff81408470 T ieee80211_wep_decrypt +ffffffff81409000 T ieee80211_get_hdrlen +ffffffff81409090 T ieee80211_input_hwdecrypt +ffffffff81409260 T ieee80211_inputm +ffffffff81409d60 T ieee80211_input_ba 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ieee80211_recv_probe_req +ffffffff8140c760 T ieee80211_recv_auth +ffffffff8140c800 T ieee80211_recv_assoc_req +ffffffff8140d1b0 T ieee80211_recv_assoc_resp +ffffffff8140d710 T ieee80211_recv_deauth +ffffffff8140d880 T ieee80211_recv_disassoc +ffffffff8140d990 T ieee80211_recv_addba_req +ffffffff8140ddb0 T ieee80211_addba_req_refuse +ffffffff8140de50 T ieee80211_addba_req_accept +ffffffff8140dee0 T ieee80211_recv_addba_resp +ffffffff8140e080 T ieee80211_addba_resp_refuse +ffffffff8140e0c0 T ieee80211_addba_resp_accept +ffffffff8140e140 T ieee80211_recv_delba +ffffffff8140e2c0 T ieee80211_recv_sa_query_req +ffffffff8140e330 T ieee80211_recv_sa_query_resp +ffffffff8140e3a0 T ieee80211_recv_action +ffffffff8140e4c0 T ieee80211_recv_mgmt +ffffffff8140e620 T ieee80211_bar_tid +ffffffff8140f000 T ieee80211_node2req +ffffffff8140f370 T ieee80211_req2node +ffffffff8140f480 T ieee80211_disable_wep +ffffffff8140f590 T ieee80211_disable_rsn +ffffffff8140f5f0 T ieee80211_ioctl +ffffffff81411000 T ieee80211_inact_timeout +ffffffff814110a0 T ieee80211_node_cache_timeout +ffffffff814110e0 T ieee80211_clean_nodes +ffffffff81411400 T ieee80211_print_ess +ffffffff814115f0 T ieee80211_print_ess_list +ffffffff81411660 T ieee80211_get_ess +ffffffff814116f0 T ieee80211_del_ess +ffffffff81411850 T ieee80211_add_ess +ffffffff81411ed0 T ieee80211_ess_adjust_rssi +ffffffff81411f40 T ieee80211_ess_calculate_score +ffffffff814120a0 T ieee80211_ess_is_better +ffffffff814121f0 T ieee80211_match_ess +ffffffff814122e0 T ieee80211_switch_ess +ffffffff81412550 T ieee80211_set_ess +ffffffff81412820 T ieee80211_deselect_ess +ffffffff81412880 T ieee80211_node_attach +ffffffff81412a60 T ieee80211_node_alloc +ffffffff81412a80 T ieee80211_node_free +ffffffff81412b30 T ieee80211_node_copy +ffffffff81412ce0 T ieee80211_node_getrssi +ffffffff81412d10 T ieee80211_node_checkrssi +ffffffff81412da0 T ieee80211_set_tim +ffffffff81412e10 T ieee80211_alloc_node_helper +ffffffff81412e90 T ieee80211_node_lateattach +ffffffff81412f50 T ieee80211_node_detach +ffffffff814130d0 T ieee80211_free_allnodes +ffffffff814131f0 T ieee80211_reset_scan +ffffffff81413280 T ieee80211_node_raise_inact +ffffffff814132c0 T ieee80211_begin_scan +ffffffff81413470 T ieee80211_node_cleanup +ffffffff81413520 T ieee80211_iterate_nodes +ffffffff814135b0 T ieee80211_next_scan +ffffffff814136e0 T ieee80211_end_scan +ffffffff81413c40 T ieee80211_create_ibss +ffffffff81414110 T ieee80211_match_bss +ffffffff81414580 T ieee80211_node_free_unref_cb +ffffffff814145f0 T ieee80211_node_tx_stopped +ffffffff81414700 T ieee80211_node_switch_bss +ffffffff814149d0 T ieee80211_node_tx_flushed +ffffffff81414b50 T ieee80211_find_node +ffffffff81414bf0 T ieee80211_node_join_bss +ffffffff81414dd0 T ieee80211_choose_rsnparams +ffffffff81414f00 T ieee80211_node_choose_bss +ffffffff814150f0 T ieee80211_free_node +ffffffff814151f0 T ieee80211_node_cmp +ffffffff81415210 T ieee80211_clean_inactive_nodes +ffffffff814152d0 T ieee80211_get_rate +ffffffff81415330 T ieee80211_ba_del +ffffffff81415420 T ieee80211_node_set_timeouts +ffffffff81415520 T ieee80211_node_addba_request_ac_be_to +ffffffff81415540 T ieee80211_node_addba_request_ac_bk_to +ffffffff81415570 T ieee80211_node_addba_request_ac_vi_to +ffffffff814155a0 T ieee80211_node_addba_request_ac_vo_to +ffffffff814155d0 T ieee80211_setup_node +ffffffff81415760 T ieee80211_alloc_node +ffffffff81415800 T ieee80211_dup_bss +ffffffff814158d0 T ieee80211_find_txnode +ffffffff81415ae0 T ieee80211_find_rxnode +ffffffff81415df0 T ieee80211_node_tx_ba_clear +ffffffff81415e60 T ieee80211_release_node +ffffffff81415ef0 T ieee80211_clean_cached +ffffffff81415f80 T ieee80211_node_leave +ffffffff814161f0 T ieee80211_setup_htcaps +ffffffff814162a0 T ieee80211_clear_htcaps +ffffffff81416320 T ieee80211_setup_htop +ffffffff814163a0 T ieee80211_setup_vhtcaps +ffffffff81416420 T ieee80211_setup_vhtop +ffffffff81416480 T ieee80211_clear_vhtcaps +ffffffff814164d0 T ieee80211_setup_rates +ffffffff81416590 T ieee80211_node_trigger_addba_req +ffffffff814165f0 T ieee80211_node_addba_request +ffffffff81416620 T ieee80211_iserp_sta +ffffffff814167d0 T ieee80211_needs_auth +ffffffff81416800 T ieee80211_node_join_ht +ffffffff81416850 T ieee80211_node_join_rsn +ffffffff81416960 T ieee80211_count_longslotsta +ffffffff814169b0 T ieee80211_count_nonerpsta +ffffffff81416a10 T ieee80211_count_pssta +ffffffff81416a60 T ieee80211_count_rekeysta +ffffffff81416ab0 T ieee80211_node_join_11g +ffffffff81416c40 T ieee80211_node_join +ffffffff81416f40 T ieee80211_node_leave_ht +ffffffff81417070 T ieee80211_node_leave_vht +ffffffff814170c0 T ieee80211_node_leave_rsn +ffffffff81417200 T ieee80211_node_leave_11g +ffffffff81417520 T ieee80211_node_leave_pwrsave +ffffffff814176e0 T ieee80211_ibss_merge +ffffffff814179e0 T ieee80211_notify_dtim +ffffffff81417ac0 T ieee80211_ess_cmp +ffffffff81417ae0 t ieee80211_tree_RBT_COMPARE +ffffffff81417b00 t ieee80211_ess_tree_RBT_COMPARE +ffffffff81418000 T ieee80211_output +ffffffff814180f0 T ieee80211_action_name +ffffffff81418140 T ieee80211_mgmt_output +ffffffff814183a0 T ieee80211_pwrsave +ffffffff814184d0 T ieee80211_up_to_ac +ffffffff81418590 T ieee80211_classify +ffffffff81418680 T ieee80211_can_use_ampdu +ffffffff814186e0 T ieee80211_tx_compressed_bar +ffffffff81418820 T ieee80211_get_compressed_bar +ffffffff814188f0 T ieee80211_encap +ffffffff81418d60 T ieee80211_add_capinfo +ffffffff81418df0 T ieee80211_add_ssid +ffffffff81418e50 T ieee80211_add_rates +ffffffff81418ec0 T ieee80211_add_ds_params +ffffffff81418f20 T ieee80211_add_tim +ffffffff81419080 T ieee80211_add_ibss_params +ffffffff814190b0 T ieee80211_add_edca_params +ffffffff81419230 T ieee80211_add_erp +ffffffff814192d0 T ieee80211_add_qos_capability +ffffffff81419310 T ieee80211_add_wme_info +ffffffff81419350 T ieee80211_add_wme_param +ffffffff814194e0 T ieee80211_add_rsn_body +ffffffff814197c0 T ieee80211_add_rsn +ffffffff81419820 T ieee80211_add_wpa +ffffffff81419890 T ieee80211_add_xrates +ffffffff81419920 T ieee80211_add_htcaps +ffffffff814199f0 T ieee80211_add_htop +ffffffff81419ac0 T ieee80211_add_vhtcaps +ffffffff81419b60 T ieee80211_add_tie +ffffffff81419bb0 T ieee80211_getmgmt +ffffffff81419c70 T ieee80211_get_probe_req +ffffffff8141a020 T ieee80211_get_probe_resp +ffffffff8141a580 T ieee80211_get_auth +ffffffff8141a610 T ieee80211_get_deauth +ffffffff8141a690 T ieee80211_get_assoc_req +ffffffff8141ab90 T ieee80211_get_assoc_resp +ffffffff8141af50 T ieee80211_get_disassoc +ffffffff8141afd0 T ieee80211_get_addba_req +ffffffff8141b0c0 T ieee80211_output_ba_move_window +ffffffff8141b1b0 T ieee80211_output_ba_move_window_to_first_unacked +ffffffff8141b340 T ieee80211_output_ba_record_ack +ffffffff8141b490 T ieee80211_get_addba_resp +ffffffff8141b590 T ieee80211_get_delba +ffffffff8141b630 T ieee80211_get_sa_query +ffffffff8141b6c0 T ieee80211_get_action +ffffffff8141b950 T ieee80211_send_mgmt +ffffffff8141bcf0 T ieee80211_get_rts +ffffffff8141bd80 T ieee80211_get_cts_to_self +ffffffff8141be10 T ieee80211_beacon_alloc +ffffffff8141d000 T ieee80211_eapol_key_input +ffffffff8141d210 T ieee80211_recv_eapol_key_req +ffffffff8141d370 T ieee80211_recv_4way_msg3 +ffffffff8141dd10 T ieee80211_recv_4way_msg2or4 +ffffffff8141de50 T ieee80211_recv_4way_msg1 +ffffffff8141e130 T ieee80211_recv_wpa_group_msg1 +ffffffff8141e460 T ieee80211_recv_rsn_group_msg1 +ffffffff8141e990 T ieee80211_recv_group_msg2 +ffffffff8141eae0 T ieee80211_recv_4way_msg2 +ffffffff8141ecf0 T ieee80211_must_update_group_key +ffffffff8141ed50 T ieee80211_recv_4way_msg4 +ffffffff8141f000 T ieee80211_send_eapol_key +ffffffff8141f220 T ieee80211_eapol_timeout +ffffffff8141f2a0 T ieee80211_send_4way_msg1 +ffffffff8141f560 T ieee80211_send_4way_msg3 +ffffffff8141faa0 T ieee80211_send_group_msg1 +ffffffff8141ffb0 T ieee80211_add_gtk_kde +ffffffff81420070 T ieee80211_add_pmkid_kde +ffffffff814200c0 T ieee80211_add_igtk_kde +ffffffff81420190 T ieee80211_get_eapol_key +ffffffff81420250 T ieee80211_send_4way_msg2 +ffffffff81420470 T ieee80211_send_4way_msg4 +ffffffff81420650 T ieee80211_send_group_msg2 +ffffffff81420830 T ieee80211_send_eapol_key_req +ffffffff81421000 T ieee80211_proto_attach +ffffffff814210b0 T ieee80211_newstate +ffffffff81421d80 T ieee80211_proto_detach +ffffffff81421dc0 T ieee80211_print_essid +ffffffff81421f40 T ieee80211_fix_rate +ffffffff81422380 T ieee80211_reset_erp +ffffffff814224a0 T ieee80211_set_shortslottime +ffffffff81422500 T ieee80211_keyrun +ffffffff81422670 T ieee80211_setkeys +ffffffff814228b0 t ieee80211_node_gtk_rekey +ffffffff81422910 T ieee80211_setkeysdone +ffffffff81422a10 T ieee80211_gtk_rekey_timeout +ffffffff81422a60 T ieee80211_sa_query_timeout +ffffffff81422b30 T ieee80211_sa_query_request +ffffffff81422bb0 T ieee80211_ht_negotiate +ffffffff81422d80 T ieee80211_vht_negotiate +ffffffff81422f90 T ieee80211_tx_ba_timeout +ffffffff814230b0 T ieee80211_delba_request +ffffffff81423230 T ieee80211_rx_ba_timeout +ffffffff814232c0 T ieee80211_addba_request +ffffffff81423490 T ieee80211_auth_open_confirm +ffffffff81423540 T ieee80211_try_another_bss +ffffffff81423650 T ieee80211_auth_open +ffffffff81423950 T ieee80211_set_beacon_miss_threshold +ffffffff814239e0 T ieee80211_stop_ampdu_tx +ffffffff81423af0 T ieee80211_check_wpa_supplicant_failure +ffffffff81423b70 T ieee80211_set_link_state +ffffffff81423c00 T ieee80211_rtm_80211info_task +ffffffff81424000 T ieee80211_ra_get_ht_rateset +ffffffff81424080 T ieee80211_ra_use_ht_sgi +ffffffff81424100 T ieee80211_ra_get_txrate +ffffffff81424190 T ieee80211_ra_next_lower_intra_rate +ffffffff81424330 T ieee80211_ra_next_intra_rate +ffffffff814244c0 T ieee80211_ra_next_rateset +ffffffff814246e0 T ieee80211_ra_best_mcs_in_rateset +ffffffff81424760 T ieee80211_ra_probe_next_rateset +ffffffff81424a20 T ieee80211_ra_next_mcs +ffffffff81424a70 T ieee80211_ra_probe_clear +ffffffff81424ab0 T ieee80211_ra_probe_done +ffffffff81424af0 T ieee80211_ra_intra_mode_ra_finished +ffffffff81424e60 T ieee80211_ra_trigger_next_rateset +ffffffff81424ed0 T ieee80211_ra_inter_mode_ra_finished +ffffffff81424f00 T ieee80211_ra_best_rate +ffffffff81424fa0 T ieee80211_ra_probe_next_rate +ffffffff81425040 T ieee80211_ra_valid_tx_mcs +ffffffff814250c0 T ieee80211_ra_valid_rates +ffffffff81425190 T ieee80211_ra_probe_valid +ffffffff814251e0 T ieee80211_ra_add_stats_ht +ffffffff81425480 T ieee80211_ra_choose +ffffffff814258c0 T ieee80211_ra_node_init +ffffffff81426000 T ieee80211_ra_vht_get_rateset +ffffffff814260a0 T ieee80211_ra_vht_use_sgi +ffffffff814261b0 T ieee80211_ra_vht_get_txrate +ffffffff81426250 T ieee80211_ra_vht_next_lower_intra_rate +ffffffff81426290 T ieee80211_ra_vht_get_max_mcs +ffffffff81426310 T ieee80211_ra_vht_next_intra_rate +ffffffff81426400 T ieee80211_ra_vht_next_rateset +ffffffff81426550 T ieee80211_ra_vht_best_mcs_in_rateset +ffffffff814265f0 T ieee80211_ra_vht_probe_next_rateset +ffffffff814268e0 T ieee80211_ra_vht_next_mcs +ffffffff81426970 T ieee80211_ra_vht_probe_clear +ffffffff814269a0 T ieee80211_ra_vht_probe_done +ffffffff814269f0 T ieee80211_ra_vht_intra_mode_ra_finished +ffffffff81426dc0 T ieee80211_ra_vht_trigger_next_rateset +ffffffff81426e30 T ieee80211_ra_vht_inter_mode_ra_finished +ffffffff81426e60 T ieee80211_ra_vht_best_rate +ffffffff81427120 T ieee80211_ra_vht_probe_next_rate +ffffffff814271d0 T ieee80211_ra_vht_init_valid_rates +ffffffff814273d0 T ieee80211_ra_vht_probe_valid +ffffffff81427420 T ieee80211_ra_vht_add_stats +ffffffff81427710 T ieee80211_ra_vht_choose +ffffffff81427b40 T ieee80211_ra_vht_node_init +ffffffff81428000 T ieee80211_rssadapt_choose +ffffffff814280d0 T ieee80211_rssadapt_updatestats +ffffffff81428150 T ieee80211_rssadapt_input +ffffffff81428190 T ieee80211_rssadapt_lower_rate +ffffffff81428210 T ieee80211_rssadapt_raise_rate +ffffffff81429000 T bsearch +ffffffff814290b0 T ieee80211_regdomain_compare_cn +ffffffff814290d0 T ieee80211_regdomain_compare_rn +ffffffff814290f0 T ieee80211_name2countrycode +ffffffff81429190 T ieee80211_name2regdomain +ffffffff81429230 T ieee80211_countrycode2name +ffffffff814292c0 T ieee80211_regdomain2name +ffffffff81429340 T ieee80211_regdomain2flag +ffffffff81429400 T ieee80211_countrycode2regdomain +ffffffff8142a000 T arptimer +ffffffff8142a080 T arptfree +ffffffff8142a160 T arpinit +ffffffff8142a1d0 T arp_rtrequest +ffffffff8142a610 T arprequest +ffffffff8142a750 T arpinvalidate +ffffffff8142a7b0 T arpreply +ffffffff8142a890 T arpresolve +ffffffff8142ae90 T arppullup +ffffffff8142af50 T arpinput +ffffffff8142afb0 T arpintr +ffffffff8142b060 T in_arpinput +ffffffff8142b480 T arplookup +ffffffff8142b570 T arpcache +ffffffff8142b8f0 T arpproxy +ffffffff8142b9d0 T revarpinput +ffffffff8142ba20 T in_revarpinput +ffffffff8142bae0 T revarprequest +ffffffff8142bc20 T revarpwhoarewe +ffffffff8142be10 T revarpwhoami +ffffffff8142c000 T igmp_init +ffffffff8142c090 T rti_fill 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ipsec_input_disabled +ffffffff81463920 T ah46_input +ffffffff81463ae0 T ipsec_protoff +ffffffff81463bd0 T ah4_ctlinput +ffffffff81463c20 T ipsec_common_ctlinput +ffffffff81463d80 T esp46_input +ffffffff81463f40 T ipcomp46_input +ffffffff81464100 T ipsec_set_mtu +ffffffff814641c0 T udpencap_ctlinput +ffffffff814643f0 T esp4_ctlinput +ffffffff81464440 T ipsec_forward_check +ffffffff814644f0 T ipsec_local_check +ffffffff81465000 T ipsp_process_packet +ffffffff81465570 T ipsp_process_done +ffffffff81465970 T ipsec_hdrsz +ffffffff81465a60 T ipsec_adjust_mtu +ffffffff81466000 T esp_attach +ffffffff81466030 T esp_init +ffffffff81466550 T esp_zeroize +ffffffff81466630 T esp_input +ffffffff81467060 T checkreplaywindow +ffffffff81467350 T esp_output +ffffffff81468000 T ah_attach +ffffffff81468030 T ah_init +ffffffff81468280 T ah_zeroize +ffffffff81468320 T ah_massage_headers +ffffffff81468b20 T ah_input +ffffffff814693e0 T ah_output +ffffffff8146a000 T carp_vh_ref +ffffffff8146a020 T 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Xresume_ioapic_level5 +ffffffff815ef000 T Xintr_ioapic_level5_untramp +ffffffff815ef310 T Xrecurse_ioapic_level6 +ffffffff815ef390 T Xresume_ioapic_level6 +ffffffff815ef3c0 T Xintr_ioapic_level6_untramp +ffffffff815ef6d0 T Xrecurse_ioapic_level7 +ffffffff815ef750 T Xresume_ioapic_level7 +ffffffff815ef780 T Xintr_ioapic_level7_untramp +ffffffff815efa90 T Xrecurse_ioapic_level8 +ffffffff815efb10 T Xresume_ioapic_level8 +ffffffff815efb40 T Xintr_ioapic_level8_untramp +ffffffff815efe50 T Xrecurse_ioapic_level9 +ffffffff815efed0 T Xresume_ioapic_level9 +ffffffff815eff00 T Xintr_ioapic_level9_untramp +ffffffff815f0210 T Xrecurse_ioapic_level10 +ffffffff815f0290 T Xresume_ioapic_level10 +ffffffff815f02c0 T Xintr_ioapic_level10_untramp +ffffffff815f05d0 T Xrecurse_ioapic_level11 +ffffffff815f0650 T Xresume_ioapic_level11 +ffffffff815f0680 T Xintr_ioapic_level11_untramp +ffffffff815f0990 T Xrecurse_ioapic_level12 +ffffffff815f0a10 T Xresume_ioapic_level12 +ffffffff815f0a40 T Xintr_ioapic_level12_untramp +ffffffff815f0d50 T Xrecurse_ioapic_level13 +ffffffff815f0dd0 T Xresume_ioapic_level13 +ffffffff815f0e00 T Xintr_ioapic_level13_untramp +ffffffff815f1110 T Xrecurse_ioapic_level14 +ffffffff815f1190 T Xresume_ioapic_level14 +ffffffff815f11c0 T Xintr_ioapic_level14_untramp +ffffffff815f14d0 T Xrecurse_ioapic_level15 +ffffffff815f1550 T Xresume_ioapic_level15 +ffffffff815f1580 T Xintr_ioapic_level15_untramp +ffffffff815f1890 T Xrecurse_ioapic_level16 +ffffffff815f1910 T Xresume_ioapic_level16 +ffffffff815f1940 T Xintr_ioapic_level16_untramp +ffffffff815f1c50 T Xrecurse_ioapic_level17 +ffffffff815f1cd0 T Xresume_ioapic_level17 +ffffffff815f1d00 T Xintr_ioapic_level17_untramp +ffffffff815f2010 T Xrecurse_ioapic_level18 +ffffffff815f2090 T Xresume_ioapic_level18 +ffffffff815f20c0 T Xintr_ioapic_level18_untramp +ffffffff815f23d0 T Xrecurse_ioapic_level19 +ffffffff815f2450 T Xresume_ioapic_level19 +ffffffff815f2480 T Xintr_ioapic_level19_untramp +ffffffff815f2790 T Xrecurse_ioapic_level20 +ffffffff815f2810 T Xresume_ioapic_level20 +ffffffff815f2840 T Xintr_ioapic_level20_untramp +ffffffff815f2b50 T Xrecurse_ioapic_level21 +ffffffff815f2bd0 T Xresume_ioapic_level21 +ffffffff815f2c00 T Xintr_ioapic_level21_untramp +ffffffff815f2f10 T Xrecurse_ioapic_level22 +ffffffff815f2f90 T Xresume_ioapic_level22 +ffffffff815f2fc0 T Xintr_ioapic_level22_untramp +ffffffff815f32d0 T Xrecurse_ioapic_level23 +ffffffff815f3350 T Xresume_ioapic_level23 +ffffffff815f3380 T Xintr_ioapic_level23_untramp +ffffffff815f3690 T Xrecurse_ioapic_level24 +ffffffff815f3710 T Xresume_ioapic_level24 +ffffffff815f3740 T Xintr_ioapic_level24_untramp +ffffffff815f3a50 T Xrecurse_ioapic_level25 +ffffffff815f3ad0 T Xresume_ioapic_level25 +ffffffff815f3b00 T Xintr_ioapic_level25_untramp +ffffffff815f3e10 T Xrecurse_ioapic_level26 +ffffffff815f3e90 T Xresume_ioapic_level26 +ffffffff815f3ec0 T Xintr_ioapic_level26_untramp +ffffffff815f41d0 T Xrecurse_ioapic_level27 +ffffffff815f4250 T Xresume_ioapic_level27 +ffffffff815f4280 T Xintr_ioapic_level27_untramp +ffffffff815f4590 T Xrecurse_ioapic_level28 +ffffffff815f4610 T Xresume_ioapic_level28 +ffffffff815f4640 T Xintr_ioapic_level28_untramp +ffffffff815f4950 T Xrecurse_ioapic_level29 +ffffffff815f49d0 T Xresume_ioapic_level29 +ffffffff815f4a00 T Xintr_ioapic_level29_untramp +ffffffff815f4d10 T Xrecurse_ioapic_level30 +ffffffff815f4d90 T Xresume_ioapic_level30 +ffffffff815f4dc0 T Xintr_ioapic_level30_untramp +ffffffff815f50d0 T Xrecurse_ioapic_level31 +ffffffff815f5150 T Xresume_ioapic_level31 +ffffffff815f5180 T Xintr_ioapic_level31_untramp +ffffffff815f5490 T Xrecurse_ioapic_level32 +ffffffff815f5510 T Xresume_ioapic_level32 +ffffffff815f5540 T Xintr_ioapic_level32_untramp +ffffffff815f5850 T Xrecurse_ioapic_level33 +ffffffff815f58d0 T Xresume_ioapic_level33 +ffffffff815f5900 T Xintr_ioapic_level33_untramp +ffffffff815f5c10 T Xrecurse_ioapic_level34 +ffffffff815f5c90 T Xresume_ioapic_level34 +ffffffff815f5cc0 T Xintr_ioapic_level34_untramp +ffffffff815f5fd0 T Xrecurse_ioapic_level35 +ffffffff815f6050 T Xresume_ioapic_level35 +ffffffff815f6080 T Xintr_ioapic_level35_untramp +ffffffff815f6390 T Xrecurse_ioapic_level36 +ffffffff815f6410 T Xresume_ioapic_level36 +ffffffff815f6440 T Xintr_ioapic_level36_untramp +ffffffff815f6750 T Xrecurse_ioapic_level37 +ffffffff815f67d0 T Xresume_ioapic_level37 +ffffffff815f6800 T Xintr_ioapic_level37_untramp +ffffffff815f6b10 T Xrecurse_ioapic_level38 +ffffffff815f6b90 T Xresume_ioapic_level38 +ffffffff815f6bc0 T Xintr_ioapic_level38_untramp +ffffffff815f6ed0 T Xrecurse_ioapic_level39 +ffffffff815f6f50 T Xresume_ioapic_level39 +ffffffff815f6f80 T Xintr_ioapic_level39_untramp +ffffffff815f7290 T Xrecurse_ioapic_level40 +ffffffff815f7310 T Xresume_ioapic_level40 +ffffffff815f7340 T Xintr_ioapic_level40_untramp +ffffffff815f7650 T Xrecurse_ioapic_level41 +ffffffff815f76d0 T Xresume_ioapic_level41 +ffffffff815f7700 T Xintr_ioapic_level41_untramp +ffffffff815f7a10 T Xrecurse_ioapic_level42 +ffffffff815f7a90 T Xresume_ioapic_level42 +ffffffff815f7ac0 T Xintr_ioapic_level42_untramp +ffffffff815f7dd0 T Xrecurse_ioapic_level43 +ffffffff815f7e50 T Xresume_ioapic_level43 +ffffffff815f7e80 T Xintr_ioapic_level43_untramp +ffffffff815f8190 T Xrecurse_ioapic_level44 +ffffffff815f8210 T Xresume_ioapic_level44 +ffffffff815f8240 T Xintr_ioapic_level44_untramp +ffffffff815f8550 T Xrecurse_ioapic_level45 +ffffffff815f85d0 T Xresume_ioapic_level45 +ffffffff815f8600 T Xintr_ioapic_level45_untramp +ffffffff815f8910 T Xrecurse_ioapic_level46 +ffffffff815f8990 T Xresume_ioapic_level46 +ffffffff815f89c0 T Xintr_ioapic_level46_untramp +ffffffff815f8cd0 T Xrecurse_ioapic_level47 +ffffffff815f8d50 T Xresume_ioapic_level47 +ffffffff815f8d80 T Xintr_ioapic_level47_untramp +ffffffff815f9090 T Xrecurse_ioapic_level48 +ffffffff815f9110 T Xresume_ioapic_level48 +ffffffff815f9140 T Xintr_ioapic_level48_untramp +ffffffff815f9450 T Xrecurse_ioapic_level49 +ffffffff815f94d0 T Xresume_ioapic_level49 +ffffffff815f9500 T Xintr_ioapic_level49_untramp +ffffffff815f9810 T Xrecurse_ioapic_level50 +ffffffff815f9890 T Xresume_ioapic_level50 +ffffffff815f98c0 T Xintr_ioapic_level50_untramp +ffffffff815f9bd0 T Xrecurse_ioapic_level51 +ffffffff815f9c50 T Xresume_ioapic_level51 +ffffffff815f9c80 T Xintr_ioapic_level51_untramp +ffffffff815f9f90 T Xrecurse_ioapic_level52 +ffffffff815fa010 T Xresume_ioapic_level52 +ffffffff815fa040 T Xintr_ioapic_level52_untramp +ffffffff815fa350 T Xrecurse_ioapic_level53 +ffffffff815fa3d0 T Xresume_ioapic_level53 +ffffffff815fa400 T Xintr_ioapic_level53_untramp +ffffffff815fa710 T Xrecurse_ioapic_level54 +ffffffff815fa790 T Xresume_ioapic_level54 +ffffffff815fa7c0 T Xintr_ioapic_level54_untramp +ffffffff815faad0 T Xrecurse_ioapic_level55 +ffffffff815fab50 T Xresume_ioapic_level55 +ffffffff815fab80 T Xintr_ioapic_level55_untramp +ffffffff815fae90 T Xrecurse_ioapic_level56 +ffffffff815faf10 T Xresume_ioapic_level56 +ffffffff815faf40 T Xintr_ioapic_level56_untramp +ffffffff815fb250 T Xrecurse_ioapic_level57 +ffffffff815fb2d0 T Xresume_ioapic_level57 +ffffffff815fb300 T Xintr_ioapic_level57_untramp +ffffffff815fb610 T Xrecurse_ioapic_level58 +ffffffff815fb690 T Xresume_ioapic_level58 +ffffffff815fb6c0 T Xintr_ioapic_level58_untramp +ffffffff815fb9d0 T Xrecurse_ioapic_level59 +ffffffff815fba50 T Xresume_ioapic_level59 +ffffffff815fba80 T Xintr_ioapic_level59_untramp +ffffffff815fbd90 T Xrecurse_ioapic_level60 +ffffffff815fbe10 T Xresume_ioapic_level60 +ffffffff815fbe40 T Xintr_ioapic_level60_untramp +ffffffff815fc150 T Xrecurse_ioapic_level61 +ffffffff815fc1d0 T Xresume_ioapic_level61 +ffffffff815fc200 T Xintr_ioapic_level61_untramp +ffffffff815fc510 T Xrecurse_ioapic_level62 +ffffffff815fc590 T Xresume_ioapic_level62 +ffffffff815fc5c0 T Xintr_ioapic_level62_untramp +ffffffff815fc8d0 T Xrecurse_ioapic_level63 +ffffffff815fc950 T Xresume_ioapic_level63 +ffffffff815fc980 T Xintr_ioapic_level63_untramp +ffffffff815fcc90 T retpoline_r13 +ffffffff815fccb0 T Xsofttty +ffffffff815fccf0 T Xsoftnet +ffffffff815fcd30 T Xsoftclock +ffffffff815fd000 T kcopy +ffffffff815fd0d0 T copyout +ffffffff815fd160 T _copyin +ffffffff815fd200 T copy_fault +ffffffff815fd230 T copyoutstr +ffffffff815fd2c0 T _copyinstr +ffffffff815fd340 T copystr_fault +ffffffff815fd349 t copystr_return +ffffffff815fe000 T Xspllower +ffffffff815fe080 T Xdoreti +ffffffff815ff000 T mds_handler_ivb +ffffffff815ff070 T mds_handler_bdw +ffffffff815ff0e0 T mds_handler_skl +ffffffff815ff100 T mds_handler_skl_sse +ffffffff815ff180 T mds_handler_skl_avx +ffffffff815ff200 T mds_handler_silvermont +ffffffff815ff260 T mds_handler_knights +ffffffff81600000 T intr_default_setup +ffffffff81600080 T x86_nmi +ffffffff816000d0 T intr_calculatemasks +ffffffff81600470 T intr_allocate_slot_cpu +ffffffff81600610 T intr_allocate_slot +ffffffff816008c0 T intr_establish +ffffffff81600d10 T intr_disestablish +ffffffff81600e50 T intr_handler +ffffffff81600f10 T cpu_intr_init +ffffffff81601160 T intr_printconfig +ffffffff81601190 T intr_barrier +ffffffff816011b0 T splraise +ffffffff81601220 T spllower +ffffffff81601290 T softintr +ffffffff81602000 T x86_bus_space_io_read_1 +ffffffff81602030 T x86_bus_space_io_read_2 +ffffffff81602060 T x86_bus_space_io_read_4 +ffffffff81602090 T x86_bus_space_io_read_8 +ffffffff816020b0 T x86_bus_space_io_read_multi_1 +ffffffff816020f0 T x86_bus_space_io_read_multi_2 +ffffffff81602130 T x86_bus_space_io_read_multi_4 +ffffffff81602170 T x86_bus_space_io_read_multi_8 +ffffffff81602190 T x86_bus_space_io_read_region_1 +ffffffff816021d0 T x86_bus_space_io_read_region_2 +ffffffff81602210 T x86_bus_space_io_read_region_4 +ffffffff81602250 T x86_bus_space_io_read_region_8 +ffffffff81602270 T x86_bus_space_io_write_1 +ffffffff816022a0 T x86_bus_space_io_write_2 +ffffffff816022d0 T x86_bus_space_io_write_4 +ffffffff81602300 T x86_bus_space_io_write_8 +ffffffff81602320 T x86_bus_space_io_write_multi_1 +ffffffff81602360 T x86_bus_space_io_write_multi_2 +ffffffff816023a0 T x86_bus_space_io_write_multi_4 +ffffffff816023e0 T x86_bus_space_io_write_multi_8 +ffffffff81602400 T x86_bus_space_io_write_region_1 +ffffffff81602440 T x86_bus_space_io_write_region_2 +ffffffff81602480 T x86_bus_space_io_write_region_4 +ffffffff816024c0 T x86_bus_space_io_write_region_8 +ffffffff816024e0 T x86_bus_space_io_set_multi_1 +ffffffff81602530 T x86_bus_space_io_set_multi_2 +ffffffff81602580 T x86_bus_space_io_set_multi_4 +ffffffff816025d0 T x86_bus_space_io_set_multi_8 +ffffffff816025f0 T x86_bus_space_io_set_region_1 +ffffffff81602650 T x86_bus_space_io_set_region_2 +ffffffff816026b0 T x86_bus_space_io_set_region_4 +ffffffff81602710 T x86_bus_space_io_set_region_8 +ffffffff81602730 T x86_bus_space_io_copy_1 +ffffffff816027c0 T x86_bus_space_io_copy_2 +ffffffff81602850 T x86_bus_space_io_copy_4 +ffffffff816028e0 T x86_bus_space_io_copy_8 +ffffffff81602900 T x86_bus_space_io_vaddr +ffffffff81602930 T x86_bus_space_io_mmap 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pci_get_ext_capability +ffffffff816adfa0 T pci_requester_id +ffffffff816ae000 T pci_find_device +ffffffff816ae0a0 T pci_vpd_read +ffffffff816ae210 T pci_vpd_write +ffffffff816ae3a0 T pci_matchbyid +ffffffff816ae410 T pci_disable_legacy_vga +ffffffff816ae480 T pciopen +ffffffff816ae4f0 T pciclose +ffffffff816ae530 T pciioctl +ffffffff816aee40 T pci_disable_vga +ffffffff816aee80 T pci_unroute_vga +ffffffff816aef10 T pci_route_vga +ffffffff816aefa0 T pci_enable_vga +ffffffff816aefe0 T pci_intr_msix_count +ffffffff816b0000 T obsd_pci_io_find +ffffffff816b0180 T obsd_pci_mem_find +ffffffff816b03f0 T pci_mapreg_type +ffffffff816b0470 T pci_mapreg_probe +ffffffff816b05a0 T pci_mapreg_info +ffffffff816b0600 T pci_mapreg_assign +ffffffff816b07f0 T pci_mapreg_map +ffffffff816b1000 T pci_lookup_quirkdata +ffffffff816b2000 T pci_findvendor +ffffffff816b2060 T pci_findproduct +ffffffff816b20d0 T pci_devinfo +ffffffff816b3000 T vga_pci_match +ffffffff816b30a0 T vga_pci_attach +ffffffff816b3280 T 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AdwRamSelfTest +ffffffff816bc8c0 T AdwLoadMCode +ffffffff816bcd10 T AdwASC3550Cabling +ffffffff816bce70 T AdwASC38C0800Cabling +ffffffff816bcfd0 T AdwASC38C1600Cabling +ffffffff816bd100 T AdwResetCCB +ffffffff816bd190 T AdwSleepMilliSecond +ffffffff816bd1b0 T AdwWaitEEPCmd +ffffffff816bd220 T AdwExeScsiQueue +ffffffff816bd390 T AdwResetChip +ffffffff816bd3f0 T AdwSendIdleCmd +ffffffff816bd5b0 T AdwDelayMicroSecond +ffffffff816bd5d0 T AdwResetSCSIBus +ffffffff816bd900 T AdwISR +ffffffff816bdb30 T AdwInquiryHandling +ffffffff816be000 T AdwInitCarriers +ffffffff816bf000 T twe_pci_match +ffffffff816bf030 T twe_pci_attach +ffffffff816c0000 T arc_match +ffffffff816c0070 T arc_attach +ffffffff816c02b0 T arc_detach +ffffffff816c0360 T arc_activate +ffffffff816c03e0 T arc_scsi_cmd +ffffffff816c06f0 T arc_match_board +ffffffff816c0760 T arc_map_pci_resources +ffffffff816c0970 T arc_alloc_ccbs +ffffffff816c0cd0 T arc_iop_set_conf +ffffffff816c0e70 T arc_enable_all_intr +ffffffff816c0f70 T arc_bioctl +ffffffff816c1030 T arc_create_sensors +ffffffff816c1230 T arc_unmap_pci_resources +ffffffff816c1290 T arc_stop_bgrb_proc +ffffffff816c1310 T arc_flush_cache +ffffffff816c1390 T arc_intr_A +ffffffff816c1570 T arc_read +ffffffff816c1590 T arc_write +ffffffff816c15e0 T arc_scsi_cmd_done +ffffffff816c16e0 T arc_intr_C +ffffffff816c1940 T arc_intr_D +ffffffff816c1c00 T arc_intr +ffffffff816c1c50 T arc_load_xs +ffffffff816c1dc0 T arc_complete +ffffffff816c1ff0 T arc_disable_all_intr +ffffffff816c20e0 T arc_chipA_firmware +ffffffff816c2310 T arc_wait_eq +ffffffff816c23b0 T arc_msg0 +ffffffff816c25c0 T arc_read_region +ffffffff816c25f0 T arc_chipB_firmware +ffffffff816c2690 T arc_chipC_firmware +ffffffff816c28c0 T arc_chipD_firmware +ffffffff816c2b30 T arc_bio_inq +ffffffff816c2cd0 T arc_bio_vol +ffffffff816c2e70 T arc_bio_disk +ffffffff816c3120 T arc_bio_alarm +ffffffff816c3270 T arc_bio_blink +ffffffff816c3340 T arc_bio_alarm_state +ffffffff816c3400 T arc_lock +ffffffff816c3510 T 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ahci_samsung_attach +ffffffff816c6600 T ahci_map_regs +ffffffff816c66a0 T ahci_map_intr +ffffffff816c6730 T ahci_unmap_regs +ffffffff816c6780 T ahci_unmap_intr +ffffffff816c7000 T nvme_pci_match +ffffffff816c7060 T nvme_pci_attach +ffffffff816c7240 T nvme_pci_detach +ffffffff816c7270 T nvme_pci_activate +ffffffff816c8000 T ami_pci_match +ffffffff816c8100 T ami_pci_attach +ffffffff816c8810 T ami_pci_find_device +ffffffff816c9000 T mfi_pci_match +ffffffff816c9080 T mfi_pci_attach +ffffffff816c9320 T mfi_pci_find_device +ffffffff816ca000 T mfii_match +ffffffff816ca070 T mfii_attach +ffffffff816cabb0 T mfii_detach +ffffffff816cae80 T mfii_activate +ffffffff816caf20 T mfii_scsi_cmd +ffffffff816cb210 T mfii_scsi_ioctl +ffffffff816cb270 T mfii_pd_scsi_cmd +ffffffff816cb4f0 T mfii_pd_scsi_probe +ffffffff816cb6a0 T mfii_find_iop +ffffffff816cb770 T mfii_get_ccb +ffffffff816cb7f0 T mfii_put_ccb +ffffffff816cb860 T mfii_aen +ffffffff816cb9d0 T mfii_abort_task +ffffffff816cbc30 T mfii_write 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mpii_alloc_ccbs +ffffffff81716b30 T mpii_alloc_replies +ffffffff81716bf0 T mpii_alloc_queues +ffffffff81716d50 T mpii_iocinit +ffffffff81716ed0 T mpii_wait_eq +ffffffff81716f80 T mpii_read +ffffffff81716fb0 T mpii_push_replies +ffffffff81717110 T mpii_init_queues +ffffffff81717190 T mpii_board_info +ffffffff81717390 T mpii_portfacts +ffffffff817174c0 T mpii_target_map +ffffffff817175b0 T mpii_cfg_coalescing +ffffffff81717680 T mpii_eventnotify +ffffffff81717850 T mpii_portenable +ffffffff81717940 T mpii_intr +ffffffff81717c70 T mpii_ioctl +ffffffff81717d80 T mpii_create_sensors +ffffffff81717f10 T mpii_dmamem_free +ffffffff81717fa0 T mpii_get_ccb +ffffffff81718030 T mpii_reply +ffffffff81718100 T mpii_event_process +ffffffff817183f0 T mpii_load_xs_sas3 +ffffffff817185a0 T mpii_load_xs +ffffffff817187a0 T mpii_req_cfg_header +ffffffff81718960 T mpii_req_cfg_page +ffffffff81718b90 T mpii_wait_ne +ffffffff81718c40 T mpii_reset_soft +ffffffff81718d70 T mpii_reset_hard +ffffffff81718fa0 T mpii_handshake_send +ffffffff81719200 T mpii_handshake_recv_dword +ffffffff81719370 T mpii_handshake_recv +ffffffff81719540 T mpii_empty_done +ffffffff81719570 T mpii_push_reply +ffffffff817195f0 T mpii_poll +ffffffff81719770 T mpii_eventack +ffffffff81719960 T mpii_eventack_done +ffffffff817199e0 T mpii_start +ffffffff81719ab0 T mpii_event_sas +ffffffff81719ee0 T mpii_eventnotify_done +ffffffff81719f20 T mpii_event_raid +ffffffff8171a250 T mpii_find_dev +ffffffff8171a2b0 T mpii_insert_dev +ffffffff8171a330 T mpii_remove_dev +ffffffff8171a3b0 T mpii_event_discovery +ffffffff8171a410 T mpii_sas_remove_device +ffffffff8171a5d0 T mpii_event_done +ffffffff8171a690 T mpii_wait +ffffffff8171a810 T mpii_dmamem_alloc +ffffffff8171a9b0 T mpii_scsi_cmd_tmo_handler +ffffffff8171ab10 T mpii_put_ccb +ffffffff8171abb0 T mpii_poll_done +ffffffff8171abe0 T mpii_wait_done +ffffffff8171ac20 T mpii_scsi_cmd_done +ffffffff8171ae80 T mpii_scsi_cmd_tmo +ffffffff8171af30 T mpii_scsi_cmd_tmo_done +ffffffff8171af50 T mpii_ioctl_cache +ffffffff8171b1f0 T mpii_ioctl_inq +ffffffff8171b2a0 T mpii_ioctl_vol +ffffffff8171b520 T mpii_ioctl_disk +ffffffff8171b700 T mpii_find_vol +ffffffff8171b750 T mpii_bio_hs +ffffffff8171b940 T mpii_bio_disk +ffffffff8171bb90 T mpii_bio_volstate +ffffffff8171bd30 T mpii_refresh_sensors +ffffffff8171c000 T sili_pci_match +ffffffff8171c0b0 T sili_pci_attach +ffffffff8171c3c0 T sili_pci_detach +ffffffff8171c470 T sili_pci_activate +ffffffff8171c4b0 T sili_lookup +ffffffff8171d000 T aq_fw1x_reset +ffffffff8171d050 T aq1_get_mac_addr +ffffffff8171d130 T aq_fw1x_set_mode +ffffffff8171d160 T aq_fw1x_get_mode +ffffffff8171d190 T aq_fw1x_get_stats +ffffffff8171d1c0 T aq_fw2x_reset +ffffffff8171d250 T aq_fw2x_set_mode +ffffffff8171d3f0 T aq_fw2x_get_mode +ffffffff8171d580 T aq_fw2x_get_stats +ffffffff8171d5b0 T aq2_fw_reset +ffffffff8171d740 T aq2_get_mac_addr +ffffffff8171d7f0 T aq2_fw_set_mode +ffffffff8171da10 T aq2_fw_get_mode +ffffffff8171dae0 T aq2_fw_get_stats +ffffffff8171db10 T aq_match +ffffffff8171db40 T aq_attach +ffffffff8171e7b0 T aq_activate +ffffffff8171e7e0 T aq_lookup +ffffffff8171e860 T aq_intr +ffffffff8171e9f0 T aq_intr_link +ffffffff8171eaf0 T aq1_fw_reboot +ffffffff8171ed40 T aq2_fw_reboot +ffffffff8171f250 T aq_hw_reset +ffffffff8171f3b0 T aq_init_rss +ffffffff8171f720 T aq_hw_init +ffffffff8171fa30 T aq_ifmedia_change +ffffffff8171fb10 T aq_ifmedia_status +ffffffff8171fc10 T aq_ioctl +ffffffff8171fe50 T aq_start +ffffffff81720190 T aq_watchdog +ffffffff817201c0 T aq_set_linkmode +ffffffff817201f0 T aq_refill +ffffffff81720260 T aq_intr_queue +ffffffff81720340 T aq_enable_intr +ffffffff81720450 T aq1_fw_read_version +ffffffff817204f0 T aq1_mac_soft_reset +ffffffff81720520 T aq1_fw_version_init +ffffffff817206a0 T aq1_hw_init_ucp +ffffffff81720830 T aq1_mac_soft_reset_rbl +ffffffff81720ad0 T aq1_global_software_reset +ffffffff81720bf0 T aq1_mac_soft_reset_flb +ffffffff81720fb0 T aq2_interface_buffer_read +ffffffff817210f0 T aq1_fw_downld_dwords +ffffffff81721410 T aq_hw_l3_filter_set +ffffffff81721620 T aq_hw_init_tx_path +ffffffff81721890 T aq_hw_init_rx_path +ffffffff81722090 T aq_set_mac_addr +ffffffff817222b0 T aq_hw_qos_set +ffffffff817228d0 T aq2_filter_art_set +ffffffff81722a80 T aq_get_linkmode +ffffffff81722af0 T aq_txring_reset +ffffffff81722ea0 T aq_rxring_reset +ffffffff817233b0 T aq_rx_fill +ffffffff817235b0 T aq_rxeof +ffffffff81723930 T aq_txeof +ffffffff81723b00 T aq_update_link_status +ffffffff81723ba0 T aq_free_slots +ffffffff81723c50 T aq_queue_up +ffffffff817240c0 T aq_dmamem_alloc +ffffffff81724210 T aq_dmamem_free +ffffffff81724280 T aq_queue_down +ffffffff81724560 T aq_invalidate_rx_desc_cache +ffffffff817245e0 T aq_up +ffffffff81724a20 T aq_down +ffffffff81724b70 T aq_rxrinfo +ffffffff81724c60 T aq_iff +ffffffff81725000 T tulip_probe +ffffffff81725060 T tulip_attach +ffffffff81725aa0 T tulip_timeout_callback +ffffffff81725af0 T tulip_timeout +ffffffff81725b60 T tulip_txprobe +ffffffff81725ca0 T tulip_txput +ffffffff81726230 T tulip_media_set +ffffffff81726820 T tulip_reset +ffffffff81726be0 T tulip_mii_autonegotiate +ffffffff81726ee0 T tulip_mii_readreg +ffffffff81727090 T tulip_mii_writereg +ffffffff81727250 T tulip_linkup +ffffffff81727320 T tulip_init +ffffffff817274a0 T tulip_media_print +ffffffff817274f0 T tulip_media_link_monitor +ffffffff81727760 T tulip_mii_map_abilities +ffffffff817277f0 T tulip_media_poll +ffffffff81727ce0 T tulip_mii_phy_readspecific +ffffffff81727ea0 T tulip_media_select +ffffffff81727fb0 T tulip_21040_mediainfo_init +ffffffff817280b0 T tulip_21040_media_probe +ffffffff817281a0 T tulip_21040_10baset_only_media_probe +ffffffff81728260 T tulip_21040_10baset_only_media_select +ffffffff817282c0 T tulip_21040_auibnc_only_media_probe +ffffffff81728350 T tulip_21040_auibnc_only_media_select +ffffffff817283a0 T tulip_21041_mediainfo_init +ffffffff81728460 T tulip_21041_media_probe +ffffffff81728540 T tulip_21041_media_poll +ffffffff81728860 T tulip_mii_get_phyaddr +ffffffff81728920 T tulip_2114x_media_preset +ffffffff81728b40 T tulip_null_media_poll +ffffffff81728b70 T tulip_21140_mediainit +ffffffff81728bc0 T tulip_21140_evalboard_media_probe +ffffffff81728da0 T tulip_21140_accton_media_probe +ffffffff81728fc0 T tulip_21140_smc9332_media_probe +ffffffff817291f0 T tulip_21140_cogent_em100_media_probe +ffffffff81729360 T tulip_21140_znyx_zx34x_media_probe +ffffffff817295a0 T tulip_2114x_media_probe +ffffffff817295d0 T tulip_delay_300ns +ffffffff817296e0 T tulip_srom_idle +ffffffff8172a080 T tulip_srom_read +ffffffff8172ae20 T tulip_mii_writebits +ffffffff8172b3b0 T tulip_mii_turnaround +ffffffff8172bb80 T tulip_mii_readbits +ffffffff8172bf60 T tulip_identify_dec_nic +ffffffff8172c010 T tulip_identify_znyx_nic +ffffffff8172c300 T tulip_identify_smc_nic +ffffffff8172c4e0 T tulip_identify_cogent_nic +ffffffff8172c5d0 T tulip_identify_accton_nic +ffffffff8172c700 T tulip_identify_asante_nic +ffffffff8172c9d0 T tulip_identify_compex_nic +ffffffff8172cb20 T tulip_srom_decode +ffffffff8172d770 T tulip_read_macaddr +ffffffff8172e0f0 T tulip_ifmedia_add +ffffffff8172e1e0 T tulip_ifmedia_change +ffffffff8172e3c0 T tulip_ifmedia_status +ffffffff8172e430 T tulip_alloc_rxmap +ffffffff8172e470 T tulip_free_rxmap +ffffffff8172e4b0 T tulip_alloc_txmap +ffffffff8172e4f0 T tulip_free_txmap +ffffffff8172e530 T tulip_addr_filter +ffffffff8172e840 T tulip_rx_intr +ffffffff8172ee50 T tulip_txput_setup +ffffffff8172f0e0 T tulip_tx_intr +ffffffff8172f500 T tulip_print_abnormal_interrupt +ffffffff8172f530 T tulip_intr_handler +ffffffff8172f8e0 T tulip_ifstart +ffffffff8172f9b0 T tulip_intr_shared +ffffffff8172fa20 T tulip_intr_normal +ffffffff8172fa70 T tulip_ifioctl +ffffffff8172fb60 T tulip_ifwatchdog +ffffffff8172fc60 T tulip_busdma_allocmem +ffffffff8172fdf0 T tulip_busdma_init +ffffffff81730010 T tulip_initcsrs +ffffffff81730110 T tulip_initring +ffffffff81731000 T ep_pci_match +ffffffff81731030 T ep_pci_attach +ffffffff81732000 T pcn_match +ffffffff81732070 T pcn_attach +ffffffff817327e0 T pcn_tick +ffffffff81732830 T pcn_reset +ffffffff817328a0 T pcn_intr +ffffffff81732ae0 T pcn_ioctl +ffffffff81732c40 T pcn_start +ffffffff81733090 T pcn_watchdog +ffffffff81733100 T pcn_txintr +ffffffff817335c0 T pcn_init +ffffffff81733e80 T pcn_stop +ffffffff81734000 T pcn_rxintr +ffffffff81734520 T pcn_spnd +ffffffff81734620 T pcn_add_rxbuf +ffffffff81734810 T pcn_rxdrain +ffffffff817348b0 T pcn_set_filter +ffffffff81734a10 T pcn_79c970_mediainit +ffffffff81734b20 T pcn_79c970_mediachange +ffffffff81734ce0 T pcn_79c970_mediastatus +ffffffff81734d20 T pcn_79c971_mediainit +ffffffff81734df0 T pcn_mii_readreg +ffffffff81734eb0 T pcn_mii_writereg +ffffffff81734f50 T pcn_mii_statchg +ffffffff81734fb0 T pcn_79c971_mediachange +ffffffff81735000 T pcn_79c971_mediastatus +ffffffff81736000 T siop_lookup_product +ffffffff817360a0 T siop_pci_attach_common +ffffffff81736530 T siop_pci_reset +ffffffff81737000 T siop_pci_match +ffffffff81737050 T siop_pci_attach +ffffffff81738000 T sii3114_read_reg +ffffffff81738060 T sii3114_write_reg +ffffffff817380d0 T pdc203xx_read_reg +ffffffff81738130 T pdc203xx_write_reg +ffffffff817381a0 T svwsata_read_reg +ffffffff81738200 T svwsata_write_reg +ffffffff81738240 T svwsata_lba48_write_reg +ffffffff81738280 T pciide_pci_read +ffffffff817382d0 T pciide_pci_write +ffffffff81738340 T default_chip_map +ffffffff81738990 T artisea_chip_map +ffffffff81738bf0 T piix_chip_map +ffffffff817391e0 T piixsata_chip_map +ffffffff81739700 T sch_chip_map +ffffffff81739a20 T amd756_chip_map +ffffffff81739e30 T ixp_chip_map +ffffffff8173a1a0 T cmd_chip_map +ffffffff8173a300 T cmd0643_9_chip_map +ffffffff8173a600 T cmd680_chip_map +ffffffff8173a7e0 T sii3112_chip_map +ffffffff8173ab60 T sii3114_chip_map +ffffffff8173af60 T apollo_chip_map +ffffffff8173b5c0 T sata_chip_map +ffffffff8173b7e0 T cy693_chip_map +ffffffff8173bba0 T sis_chip_map +ffffffff8173c2e0 T natsemi_chip_map +ffffffff8173c740 T ns_scx200_chip_map +ffffffff8173cad0 T acer_chip_map +ffffffff8173d150 T hpt_chip_map +ffffffff8173d630 T pdc202xx_chip_map +ffffffff8173dff0 T pdcsata_chip_map +ffffffff8173e770 T acard_chip_map +ffffffff8173e9e0 T serverworks_chip_map +ffffffff8173ecf0 T svwsata_chip_map +ffffffff8173f0d0 T nforce_chip_map +ffffffff8173f4f0 T ite_chip_map +ffffffff8173f7b0 T jmicron_chip_map +ffffffff8173fbc0 T phison_chip_map +ffffffff8173fee0 T rdc_chip_map +ffffffff81740330 T pciide_match +ffffffff817403d0 T pciide_attach +ffffffff817404b0 T pciide_detach +ffffffff81740510 T pciide_activate +ffffffff81740c40 T pciide_lookup_product +ffffffff81740ea0 T pciide_dmacmd_read +ffffffff81740ed0 T pciide_dmacmd_write +ffffffff81740f00 T pciide_dmactl_read +ffffffff81740f30 T pciide_dmactl_write +ffffffff81740f60 T pciide_dmatbl_write +ffffffff81740f90 T pciide_mapregs_compat +ffffffff81741110 T pciide_unmapregs_compat +ffffffff817411a0 T pciide_mapregs_native +ffffffff81741490 T pciide_unmapregs_native +ffffffff81741520 T pciide_mapreg_dma +ffffffff817416b0 T pciide_dma_init +ffffffff81741980 T pciide_dma_start +ffffffff81741a00 T pciide_dma_finish +ffffffff81741bd0 T pciide_unmapreg_dma +ffffffff81741c00 T pciide_intr_flag +ffffffff81741e10 T pciide_compat_intr +ffffffff81741e90 T pciide_pci_intr +ffffffff81741f50 T pciide_channel_dma_setup +ffffffff81742020 T pciide_dma_table_setup +ffffffff81742260 T pciide_irqack +ffffffff817422b0 T pciide_chansetup +ffffffff81742390 T pciide_chanfree +ffffffff817423e0 T pciide_mapchan +ffffffff81742470 T pciide_unmap_chan +ffffffff81742540 T pciide_chan_candisable +ffffffff817425b0 T pciide_map_compat_intr +ffffffff81742650 T pciide_unmap_compat_intr +ffffffff817426b0 T pciide_print_channels +ffffffff81742780 T pciide_print_modes +ffffffff81742790 T default_chip_unmap +ffffffff81742870 T sata_setup_channel +ffffffff81742990 T piix_timing_debug +ffffffff817429c0 T piix_setup_channel +ffffffff81742e50 T piix3_4_setup_channel +ffffffff817435f0 T piix_setup_idetim_timings +ffffffff81743660 T piix_setup_idetim_drvs +ffffffff81743780 T piix_setup_sidetim_timings +ffffffff817437f0 T amd756_setup_channel +ffffffff81743ba0 T apollo_setup_channel +ffffffff81743f20 T cmd_channel_map +ffffffff81744290 T cmd_pci_intr +ffffffff81744390 T cmd646_9_irqack +ffffffff81744490 T cmd0643_9_setup_channel +ffffffff817448b0 T cmd680_setup_channel +ffffffff81744db0 T cmd680_channel_map +ffffffff817450e0 T sii_fixup_cacheline +ffffffff817453b0 T sii3112_setup_channel +ffffffff81745570 T sii3112_drv_probe +ffffffff81745990 T sii3114_mapreg_dma +ffffffff81745c70 T sii3114_chansetup +ffffffff81745d40 T sii3114_mapchan +ffffffff81746060 T sii3114_dmacmd_read +ffffffff817460a0 T sii3114_dmacmd_write +ffffffff817460e0 T sii3114_dmactl_read +ffffffff81746120 T sii3114_dmactl_write +ffffffff81746160 T sii3114_dmatbl_write +ffffffff817461a0 T cy693_setup_channel +ffffffff817463c0 T sis_hostbr_match +ffffffff81746490 T sis_south_match +ffffffff817464d0 T sis_setup_channel +ffffffff81746810 T sis96x_setup_channel +ffffffff81746af0 T natsemi_irqack +ffffffff81746b90 T natsemi_setup_channel +ffffffff81746f80 T natsemi_pci_intr +ffffffff81747080 T ns_scx200_setup_channel +ffffffff81747380 T acer_dma_init +ffffffff817473c0 T acer_setup_channel +ffffffff817477c0 T acer_pci_intr +ffffffff817478b0 T hpt_setup_channel +ffffffff81747c00 T hpt_pci_intr +ffffffff81747d10 T pdc268_config_read +ffffffff81747d80 T pdc20268_setup_channel +ffffffff81747f50 T pdc202xx_setup_channel +ffffffff817483a0 T pdc20262_dma_start +ffffffff81748510 T pdc20262_dma_finish +ffffffff817485e0 T pdc20265_pci_intr +ffffffff81748790 T pdc202xx_pci_intr +ffffffff817488a0 T pdc203xx_pci_intr +ffffffff81748990 T pdc205xx_pci_intr +ffffffff81748ac0 T pdc203xx_irqack +ffffffff81748b50 T pdc203xx_setup_channel +ffffffff81748c50 T pdc205xx_do_reset +ffffffff81748cf0 T pdc205xx_drv_probe +ffffffff81748f70 T pdc203xx_dma_start +ffffffff81749030 T pdc203xx_dma_finish +ffffffff81749120 T serverworks_setup_channel +ffffffff81749550 T serverworks_pci_intr +ffffffff81749660 T svwsata_mapreg_dma +ffffffff81749710 T svwsata_drv_probe +ffffffff817499f0 T svwsata_mapchan +ffffffff81749ae0 T svwsata_dmacmd_read +ffffffff81749b10 T svwsata_dmacmd_write +ffffffff81749b40 T svwsata_dmactl_read +ffffffff81749b70 T svwsata_dmactl_write +ffffffff81749ba0 T svwsata_dmatbl_write +ffffffff81749bd0 T acard_setup_channel +ffffffff81749ff0 T nforce_setup_channel +ffffffff8174a340 T nforce_pci_intr +ffffffff8174a430 T ite_setup_channel +ffffffff8174a7b0 T ixp_setup_channel +ffffffff8174ab50 T jmicron_setup_channel +ffffffff8174adb0 T phison_setup_channel +ffffffff8174afc0 T sch_setup_channel +ffffffff8174b1c0 T rdc_setup_channel +ffffffff8174c000 T ppbmatch +ffffffff8174c050 T ppbattach +ffffffff8174c7d0 T ppbdetach +ffffffff8174c8f0 T ppbactivate +ffffffff8174cd70 T ppb_alloc_busrange +ffffffff8174cf20 T ppb_hotplug_insert +ffffffff8174cf80 T ppb_hotplug_rescan +ffffffff8174cfc0 T ppb_hotplug_remove +ffffffff8174d120 T ppb_hotplug_insert_finish +ffffffff8174d150 T ppb_intr +ffffffff8174d210 T ppb_alloc_resources +ffffffff8174d920 T ppbprint +ffffffff8174e000 T cy_pci_match +ffffffff8174e030 T cy_pci_attach +ffffffff8174f000 T rl_pci_match +ffffffff8174f060 T rl_pci_attach +ffffffff8174f220 T rl_pci_detach +ffffffff81750000 T re_pci_probe +ffffffff817500a0 T re_pci_attach +ffffffff817503d0 T re_pci_detach +ffffffff81750490 T re_pci_activate +ffffffff81751000 T vr_probe +ffffffff817510f0 T vr_attach +ffffffff81751880 T vr_activate +ffffffff81751900 T vr_mii_readreg +ffffffff81751a70 T vr_mii_writereg +ffffffff81751bd0 T vr_miibus_readreg +ffffffff81751c40 T vr_miibus_writereg +ffffffff81751ca0 T vr_miibus_statchg +ffffffff81751cc0 T vr_setcfg +ffffffff81751ee0 T vr_iff +ffffffff81752060 T vr_reset +ffffffff81752170 T vr_quirks +ffffffff81752270 T vr_dmamem_alloc +ffffffff817523d0 T vr_dmamem_free +ffffffff81752440 T vr_intr +ffffffff81752670 T vr_chipinit +ffffffff81752750 T vr_ioctl +ffffffff817528f0 T vr_start +ffffffff81752ac0 T vr_watchdog +ffffffff81752b50 T vr_wol +ffffffff81752d00 T vr_ifmedia_upd +ffffffff81752d50 T vr_ifmedia_sts +ffffffff81752db0 T vr_tick +ffffffff81752e30 T vr_rxtick +ffffffff81752f10 T vr_stop +ffffffff817531a0 T vr_init +ffffffff81753740 T vr_list_tx_init +ffffffff81753840 T vr_list_rx_init +ffffffff81753a00 T vr_fill_rx_ring +ffffffff81753ad0 T vr_alloc_mbuf +ffffffff81753c40 T vr_rxeof +ffffffff81753ec0 T vr_rxeoc +ffffffff81754050 T vr_txeof +ffffffff81754210 T vr_encap +ffffffff81755000 T txp_probe +ffffffff81755030 T txp_attach +ffffffff817551a0 T txp_attachhook +ffffffff817554c0 T txp_chip_init +ffffffff81755680 T txp_download_fw +ffffffff81755b20 T txp_alloc_rings +ffffffff81756960 T txp_command +ffffffff81756a30 T txp_ifmedia_upd +ffffffff81756b40 T txp_ifmedia_sts +ffffffff81756e30 T txp_ioctl +ffffffff81756f50 T txp_start +ffffffff81757310 T txp_watchdog +ffffffff81757340 T txp_capabilities +ffffffff817574f0 T txp_tick +ffffffff81757640 T txp_intr +ffffffff817578b0 T txp_reset_adapter +ffffffff817579b0 T txp_download_fw_wait +ffffffff81757aa0 T txp_download_fw_section +ffffffff81757e10 T txp_dma_malloc +ffffffff81757fb0 T txp_dma_free +ffffffff81758030 T txp_rx_reclaim +ffffffff81758310 T txp_rxbuf_reclaim +ffffffff81758590 T txp_tx_reclaim +ffffffff81758740 T txp_init +ffffffff81758880 T txp_stop +ffffffff81758980 T txp_set_filter +ffffffff81758b10 T txp_command2 +ffffffff81758e00 T txp_cmd_desc_numfree +ffffffff81758e60 T txp_response +ffffffff81759130 T txp_rsp_fixup +ffffffff81759220 T txp_show_descriptor +ffffffff8175a000 T init_audio_devices +ffffffff8175a120 T init_BTSC +ffffffff8175a1e0 T set_audio +ffffffff8175a570 T set_bctv_audio +ffffffff8175a8b0 T msp_autodetect +ffffffff8175ace0 T temp_mute +ffffffff8175ad80 T set_BTSC +ffffffff8175ada0 T bctv_gpio_write +ffffffff8175af10 T msp_read_id +ffffffff8175afd0 T dpl_read_id +ffffffff8175b090 T dpl_autodetect +ffffffff8175c000 T writeEEProm +ffffffff8175c030 T readEEProm +ffffffff8175c100 T signCard +ffffffff8175c1b0 T probeCard +ffffffff8175e000 T bktr_name +ffffffff8175e030 T common_bktr_attach +ffffffff8175e330 T common_bktr_intr +ffffffff8175e950 T video_open +ffffffff8175ee10 t set_fps +ffffffff8175ef50 T vbi_open +ffffffff8175eff0 T tuner_open +ffffffff8175f040 T video_close +ffffffff8175f130 T tuner_close +ffffffff8175f160 T vbi_close +ffffffff8175f190 T video_read +ffffffff8175f350 t start_capture +ffffffff81762290 T vbi_read +ffffffff817623b0 T video_ioctl +ffffffff81763850 T bktr_common_ioctl +ffffffff81764020 T tuner_ioctl +ffffffff81764f70 T i2cWrite +ffffffff81765090 T i2cRead +ffffffff817651b0 T msp_dpl_read +ffffffff81765480 T msp_dpl_write +ffffffff81765640 T msp_dpl_reset +ffffffff81765940 t i2c_write_byte +ffffffff81765b20 t i2c_read_byte +ffffffff81765d40 t split +ffffffff81765f40 t getline +ffffffff81767000 t bktr_probe +ffffffff81767060 t bktr_attach +ffffffff817672e0 T bktr_get_info +ffffffff817673c0 T bktr_set_info +ffffffff81767520 T get_bktr_mem +ffffffff81767750 T free_bktr_mem +ffffffff817677b0 T bktropen +ffffffff81767870 T bktrclose +ffffffff81767900 T bktrread +ffffffff81767990 T bktrwrite +ffffffff817679c0 T bktrioctl +ffffffff81767a70 T bktrmmap +ffffffff81767b10 t bktr_intr +ffffffff81768000 T select_tuner +ffffffff81768050 T tv_freq +ffffffff817682a0 T do_afc +ffffffff817683d0 T get_tuner_status +ffffffff817683f0 T tv_channel +ffffffff817684b0 T tuner_getchnlset +ffffffff81769000 T xl_pci_match +ffffffff81769030 T xl_pci_attach +ffffffff81769390 T xl_pci_detach +ffffffff81769420 T xl_pci_wol_power +ffffffff81769470 T xl_pci_intr_ack +ffffffff8176a000 T fxp_pci_match +ffffffff8176a030 T fxp_pci_attach +ffffffff8176a360 T fxp_pci_detach +ffffffff8176b000 T em_probe +ffffffff8176b030 T em_attach +ffffffff8176b530 T em_detach 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em_setup_transmit_structures +ffffffff8176ec20 T em_initialize_transmit_unit +ffffffff8176f240 T em_setup_receive_structures +ffffffff8176f380 T em_setup_queues_msix +ffffffff8176fa40 T em_intr +ffffffff8176fb40 T em_txeof +ffffffff8176fd10 T em_rxeof +ffffffff817701d0 T em_rxrefill +ffffffff817702e0 T em_media_status +ffffffff81770520 T em_flowstatus +ffffffff81770630 T em_media_change +ffffffff81770790 T em_tx_ctx_setup +ffffffff81770920 T em_transmit_checksum_setup +ffffffff81770a00 T em_fill_descriptors +ffffffff81770a80 T em_82547_fifo_workaround +ffffffff81770af0 T em_82547_tx_fifo_reset +ffffffff81770f60 T em_pci_clear_mwi +ffffffff81770f90 T em_pci_set_mwi +ffffffff81770fc0 T em_smartspeed +ffffffff817711c0 T em_kstat_read +ffffffff817715e0 T em_flush_desc_rings +ffffffff81771710 T em_free_transmit_structures +ffffffff817718e0 T em_free_receive_structures +ffffffff81771af0 T em_legacy_irq_quirk_spt +ffffffff81771bd0 T em_allocate_msix +ffffffff81771de0 T em_allocate_legacy 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+ffffffff8178a000 T ixgb_validate_eeprom_checksum +ffffffff8178a080 T ixgb_read_eeprom +ffffffff8178a2f0 T ixgb_update_eeprom_checksum +ffffffff8178a360 T ixgb_write_eeprom +ffffffff8178a820 t ixgb_shift_out_bits +ffffffff8178a960 T ixgb_get_eeprom_data +ffffffff8178aa00 T ixgb_get_eeprom_word +ffffffff8178aae0 T ixgb_get_ee_mac_addr +ffffffff8178abd0 T ixgb_get_ee_pba_number +ffffffff8178ac90 T ixgb_get_ee_device_id +ffffffff8178b000 T ixgb_mac_reset +ffffffff8178b1e0 T ixgb_adapter_stop +ffffffff8178b320 T ixgb_init_hw +ffffffff8178b630 T ixgb_init_rx_addrs +ffffffff8178b760 T mac_addr_valid +ffffffff8178b7c0 T ixgb_clear_vfta +ffffffff8178b840 T ixgb_clear_hw_cntrs +ffffffff8178bf20 T ixgb_setup_fc +ffffffff8178c0b0 T ixgb_check_for_link +ffffffff8178c2c0 T ixgb_rar_set +ffffffff8178c330 T ixgb_mc_addr_list_update +ffffffff8178c5b0 T ixgb_write_vfta +ffffffff8178c5e0 T ixgb_read_phy_reg +ffffffff8178cae0 T ixgb_write_phy_reg +ffffffff8178cfd0 T ixgb_check_for_bad_link +ffffffff8178d090 T ixgb_led_on +ffffffff8178d0e0 T ixgb_led_off +ffffffff8178e000 T ixgbe_probe +ffffffff8178e030 T ixgbe_attach +ffffffff8178e5a0 T ixgbe_detach +ffffffff8178e7c0 T ixgbe_activate +ffffffff8178e8d0 T ixgbe_identify_hardware +ffffffff8178e990 T ixgbe_allocate_pci_resources +ffffffff8178eae0 T ixgbe_allocate_queues +ffffffff8178efe0 T ixgbe_allocate_msix +ffffffff8178f220 T ixgbe_allocate_legacy +ffffffff8178f340 T ixgbe_setup_interface +ffffffff8178f6a0 T ixgbe_free_transmit_structures +ffffffff8178f720 T ixgbe_free_receive_structures +ffffffff8178f7e0 T ixgbe_free_pci_resources +ffffffff8178f8c0 T ixgbe_stop +ffffffff8178fbe0 T ixgbe_init +ffffffff81790820 T ixgbe_start +ffffffff81790a00 T ixgbe_encap +ffffffff81790e30 T ixgbe_ioctl +ffffffff81791190 T ixgbe_rxrinfo +ffffffff817912f0 T ixgbe_get_sffpage +ffffffff817914a0 T ixgbe_disable_intr +ffffffff81791570 T ixgbe_iff +ffffffff817916e0 T ixgbe_enable_intr +ffffffff817917f0 T ixgbe_enable_queues +ffffffff81791900 T ixgbe_watchdog +ffffffff81791b10 T ixgbe_setup_transmit_structures +ffffffff81791bf0 T ixgbe_initialize_transmit_units +ffffffff81791ec0 T ixgbe_setup_receive_structures +ffffffff81791ff0 T ixgbe_initialize_receive_units +ffffffff817924d0 T ixgbe_config_gpie +ffffffff817925a0 T ixgbe_setup_vlan_hw_support +ffffffff81792710 T ixgbe_configure_ivars +ffffffff817928c0 T ixgbe_set_ivar +ffffffff81792a90 T ixgbe_config_link +ffffffff81792c30 T ixgbe_config_delay_values +ffffffff81792d50 t ix_kstats_tick +ffffffff81792e20 T ixgbe_enable_queue +ffffffff81792ef0 T ixgbe_disable_queue +ffffffff81792fc0 T ixgbe_link_intr +ffffffff81792fd0 T ixgbe_intr +ffffffff817934a0 T ixgbe_queue_intr +ffffffff817935f0 T ixgbe_rxeof +ffffffff81793b60 T ixgbe_txeof +ffffffff81793d00 T ixgbe_rxrefill +ffffffff81793dc0 T ixgbe_legacy_intr +ffffffff81793f80 T ixgbe_update_link_status +ffffffff817940d0 T ixgbe_handle_mod +ffffffff817941f0 T ixgbe_handle_msf +ffffffff817942c0 T ixgbe_handle_phy +ffffffff81794350 T ixgbe_media_status +ffffffff81794560 T ixgbe_media_change +ffffffff81794610 T ixgbe_mc_array_itr +ffffffff81794650 T ixgbe_setup_msix +ffffffff817946e0 T ixgbe_add_media_types +ffffffff81794980 T ixgbe_dma_malloc +ffffffff81794b70 T ixgbe_dma_free +ffffffff81794c20 T ixgbe_allocate_transmit_buffers +ffffffff81794d90 T ixgbe_setup_transmit_ring +ffffffff81794f30 T ixgbe_free_transmit_buffers +ffffffff81795060 T ixgbe_get_buf +ffffffff817951a0 T ixgbe_allocate_receive_buffers +ffffffff817952e0 T ixgbe_setup_receive_ring +ffffffff817953c0 T ixgbe_rxfill +ffffffff817954f0 T ixgbe_initialize_rss_mapping +ffffffff81795760 T ixgbe_map_queue_statistics +ffffffff81795860 T ixgbe_free_receive_buffers +ffffffff817959a0 T ixgbe_rx_checksum +ffffffff817959f0 T ixgbe_read_pci_cfg +ffffffff81795a50 T ixgbe_write_pci_cfg +ffffffff81795ad0 t ix_kstats_read +ffffffff81795c90 t ix_rxq_kstats_read +ffffffff81795df0 t ix_txq_kstats_read +ffffffff81796000 T ixgbe_init_ops_generic +ffffffff81796270 T ixgbe_init_eeprom_params_generic +ffffffff81796320 T ixgbe_read_eerd_generic +ffffffff81796420 T ixgbe_read_eeprom_bit_bang_generic +ffffffff817966c0 T ixgbe_write_eeprom_generic +ffffffff81796b10 T ixgbe_validate_eeprom_checksum_generic +ffffffff81796bc0 T ixgbe_update_eeprom_checksum_generic +ffffffff81796c40 T ixgbe_calc_eeprom_checksum_generic +ffffffff81796de0 T ixgbe_init_hw_generic +ffffffff81796e40 T ixgbe_start_hw_generic +ffffffff81796f60 T ixgbe_clear_hw_cntrs_generic +ffffffff81797940 T ixgbe_enable_rx_dma_generic +ffffffff817979a0 T ixgbe_get_mac_addr_generic +ffffffff81797a30 T ixgbe_stop_adapter_generic +ffffffff81797bb0 T ixgbe_get_bus_info_generic +ffffffff81797c60 T ixgbe_set_lan_id_multi_port_pcie +ffffffff81797d30 T ixgbe_acquire_swfw_sync +ffffffff81797f60 T ixgbe_release_swfw_sync +ffffffff81798010 T prot_autoc_read_generic +ffffffff81798070 T prot_autoc_write_generic +ffffffff817980c0 T ixgbe_led_on_generic +ffffffff81798180 T ixgbe_led_off_generic +ffffffff81798230 T ixgbe_blink_led_start_generic +ffffffff817983a0 T ixgbe_blink_led_stop_generic +ffffffff817984c0 T ixgbe_set_rar_generic +ffffffff817985e0 T ixgbe_clear_rar_generic +ffffffff817986e0 T ixgbe_init_rx_addrs_generic +ffffffff817988e0 T ixgbe_update_mc_addr_list_generic +ffffffff81798ae0 T ixgbe_enable_mc_generic +ffffffff81798b50 T ixgbe_disable_mc_generic +ffffffff81798bb0 T ixgbe_enable_rx_generic +ffffffff81798c70 T ixgbe_disable_rx_generic +ffffffff81798d50 T ixgbe_fc_enable_generic +ffffffff81799180 T ixgbe_setup_fc_generic +ffffffff81799450 T ixgbe_fc_autoneg +ffffffff81799620 T ixgbe_device_supports_autoneg_fc +ffffffff81799720 T ixgbe_start_hw_gen2 +ffffffff81799900 T ixgbe_identify_phy +ffffffff81799960 T ixgbe_set_pci_config_data_generic +ffffffff817999e0 T ixgbe_disable_rx +ffffffff81799a20 T ixgbe_disable_pcie_master +ffffffff81799b70 T ixgbe_read_eerd_buffer_generic +ffffffff81799cb0 T ixgbe_poll_eerd_eewr_done +ffffffff81799d50 T ixgbe_write_eewr_buffer_generic +ffffffff81799ed0 T ixgbe_write_eewr_generic +ffffffff81799f20 T ixgbe_acquire_eeprom +ffffffff8179a0a0 T ixgbe_get_eeprom_semaphore +ffffffff8179a2b0 T ixgbe_release_eeprom_semaphore +ffffffff8179a320 T ixgbe_ready_eeprom +ffffffff8179a490 T ixgbe_shift_out_eeprom_bits +ffffffff8179a650 T ixgbe_shift_in_eeprom_bits +ffffffff8179a7b0 T ixgbe_standby_eeprom +ffffffff8179a890 T ixgbe_raise_eeprom_clk +ffffffff8179a900 T ixgbe_lower_eeprom_clk +ffffffff8179a970 T ixgbe_release_eeprom +ffffffff8179aa50 T ixgbe_validate_mac_addr +ffffffff8179aab0 T ixgbe_init_uta_tables +ffffffff8179aaf0 T ixgbe_add_uc_addr +ffffffff8179ab60 T ixgbe_mta_vector +ffffffff8179ac10 T ixgbe_set_mta +ffffffff8179acd0 T ixgbe_negotiate_fc +ffffffff8179ad80 T ixgbe_fc_autoneg_fiber +ffffffff8179aeb0 T ixgbe_fc_autoneg_backplane +ffffffff8179b010 T ixgbe_fc_autoneg_copper +ffffffff8179b140 T ixgbe_disable_sec_rx_path_generic +ffffffff8179b200 T ixgbe_enable_sec_rx_path_generic +ffffffff8179b290 T ixgbe_enable_rx +ffffffff8179b2d0 T ixgbe_get_pcie_msix_count_generic +ffffffff8179b350 T ixgbe_insert_mac_addr_generic +ffffffff8179b560 T ixgbe_set_vmdq +ffffffff8179b5a0 T ixgbe_set_rar +ffffffff8179b5f0 T ixgbe_clear_vmdq +ffffffff8179b630 T ixgbe_clear_vmdq_generic +ffffffff8179b7d0 T ixgbe_set_vmdq_generic +ffffffff8179b880 T ixgbe_init_uta_tables_generic +ffffffff8179b900 T ixgbe_find_vlvf_slot +ffffffff8179b9c0 T ixgbe_set_vfta_generic +ffffffff8179bad0 T ixgbe_set_vlvf_generic +ffffffff8179bd60 T ixgbe_clear_vfta_generic +ffffffff8179be60 T ixgbe_need_crosstalk_fix +ffffffff8179beb0 T ixgbe_check_mac_link_generic +ffffffff8179c0a0 T ixgbe_get_device_caps_generic +ffffffff8179c0f0 T ixgbe_calculate_checksum +ffffffff8179c1b0 T ixgbe_hic_unlocked +ffffffff8179c390 T ixgbe_host_interface_command +ffffffff8179c560 T ixgbe_clear_tx_pending +ffffffff8179c750 T ixgbe_mng_present +ffffffff8179c7c0 T ixgbe_mng_enabled +ffffffff8179c880 T ixgbe_setup_mac_link_multispeed_fiber +ffffffff8179cc40 T ixgbe_flap_tx_laser +ffffffff8179cc80 T ixgbe_check_link +ffffffff8179ccd0 T ixgbe_set_soft_rate_select_speed +ffffffff8179cdc0 T ixgbe_init_shared_code +ffffffff8179ce70 T ixgbe_set_mac_type +ffffffff8179d030 T ixgbe_init_hw +ffffffff8179d070 T ixgbe_get_media_type +ffffffff8179d0b0 T ixgbe_read_mbx +ffffffff8179d110 T ixgbe_write_mbx +ffffffff8179d160 T ixgbe_check_for_msg +ffffffff8179d1a0 T ixgbe_check_for_ack +ffffffff8179d1e0 T ixgbe_check_for_rst +ffffffff8179d220 T ixgbe_poll_for_msg +ffffffff8179d2e0 T ixgbe_poll_for_ack +ffffffff8179d3a0 T ixgbe_read_posted_mbx +ffffffff8179d480 T ixgbe_write_posted_mbx +ffffffff8179d550 T ixgbe_init_mbx_ops_generic +ffffffff8179d590 T ixgbe_read_v2p_mailbox +ffffffff8179d600 T ixgbe_check_for_bit_pf +ffffffff8179d690 T ixgbe_check_for_msg_pf +ffffffff8179d740 T ixgbe_check_for_ack_pf +ffffffff8179d7e0 T ixgbe_check_for_rst_pf +ffffffff8179d8e0 T ixgbe_obtain_mbx_lock_pf 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ixgbe_setup_mac_link_82598 +ffffffff8179fb40 T ixgbe_get_link_capabilities_82598 +ffffffff8179fc10 T ixgbe_setup_copper_link_82598 +ffffffff8179fd20 T ixgbe_start_mac_link_82598 +ffffffff8179fe40 T ixgbe_validate_link_ready +ffffffff8179fef0 T ixgbe_read_i2c_phy_82598 +ffffffff817a1000 T ixgbe_init_mac_link_ops_82599 +ffffffff817a1190 T ixgbe_disable_tx_laser_multispeed_fiber +ffffffff817a1260 T ixgbe_enable_tx_laser_multispeed_fiber +ffffffff817a12e0 T ixgbe_flap_tx_laser_multispeed_fiber +ffffffff817a1420 T ixgbe_setup_mac_link_82599 +ffffffff817a16b0 T ixgbe_set_hard_rate_select_speed +ffffffff817a1770 T ixgbe_verify_lesm_fw_enabled_82599 +ffffffff817a1830 T ixgbe_setup_mac_link_smartspeed +ffffffff817a1bb0 T ixgbe_init_phy_ops_82599 +ffffffff817a1d00 T ixgbe_read_i2c_byte_82599 +ffffffff817a1e80 T ixgbe_write_i2c_byte_82599 +ffffffff817a2000 T ixgbe_setup_copper_link_82599 +ffffffff817a2060 T ixgbe_setup_sfp_modules_82599 +ffffffff817a2220 T prot_autoc_read_82599 +ffffffff817a2330 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ixgbe_validate_eeprom_checksum_X540 +ffffffff817a4590 T ixgbe_calc_eeprom_checksum_X540 +ffffffff817a4730 T ixgbe_reset_hw_X540 +ffffffff817a4ac0 T ixgbe_get_media_type_X540 +ffffffff817a4af0 T ixgbe_get_supported_physical_layer_X540 +ffffffff817a4b70 T ixgbe_start_hw_X540 +ffffffff817a4bc0 T ixgbe_acquire_swfw_sync_X540 +ffffffff817a5010 T ixgbe_release_swfw_sync_X540 +ffffffff817a5140 T ixgbe_init_swfw_sync_X540 +ffffffff817a5220 T ixgbe_setup_mac_link_X540 +ffffffff817a5240 T ixgbe_blink_led_start_X540 +ffffffff817a5360 T ixgbe_blink_led_stop_X540 +ffffffff817a5460 T ixgbe_get_link_capabilities_X540 +ffffffff817a54a0 T ixgbe_update_flash_X540 +ffffffff817a5680 T ixgbe_poll_flash_update_done_X540 +ffffffff817a5710 T ixgbe_get_swfw_sync_semaphore +ffffffff817a58a0 T ixgbe_release_swfw_sync_semaphore +ffffffff817a6000 T ixgbe_init_ops_X550 +ffffffff817a6110 T ixgbe_dmac_config_X550 +ffffffff817a61f0 T ixgbe_dmac_config_tcs_X550 +ffffffff817a6340 T ixgbe_dmac_update_tcs_X550 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ixgbe_shutdown_fw_phy +ffffffff817a7800 T ixgbe_read_phy_reg_x550em +ffffffff817a7830 T ixgbe_write_phy_reg_x550em +ffffffff817a7860 T ixgbe_init_ops_X550EM +ffffffff817a7b10 T ixgbe_get_bus_info_X550em +ffffffff817a7b60 T ixgbe_get_media_type_X550em +ffffffff817a7c50 T ixgbe_setup_sfp_modules_X550em +ffffffff817a7de0 T ixgbe_get_link_capabilities_X550em +ffffffff817a7eb0 T ixgbe_reset_hw_X550em +ffffffff817a8530 T ixgbe_get_supported_physical_layer_X550em +ffffffff817a86b0 T ixgbe_setup_fc_X550em +ffffffff817a8810 T ixgbe_init_phy_ops_X550em +ffffffff817a8ce0 T ixgbe_setup_fw_link +ffffffff817a8e10 T ixgbe_fc_autoneg_fw +ffffffff817a8e40 T ixgbe_setup_eee_fw +ffffffff817a8ea0 T ixgbe_init_ops_X550EM_a +ffffffff817a8fd0 T ixgbe_read_iosf_sb_reg_x550 +ffffffff817a9150 T ixgbe_write_iosf_sb_reg_x550 +ffffffff817a92d0 T ixgbe_read_iosf_sb_reg_x550a +ffffffff817a9370 T ixgbe_write_iosf_sb_reg_x550a +ffffffff817a9400 T ixgbe_acquire_swfw_sync_X550a +ffffffff817a9540 T ixgbe_release_swfw_sync_X550a +ffffffff817a95e0 T ixgbe_fc_autoneg_fiber_x550em_a +ffffffff817a9620 T ixgbe_fc_autoneg_backplane_x550em_a +ffffffff817a9780 T ixgbe_setup_fc_backplane_x550em_a +ffffffff817a9970 T ixgbe_fc_autoneg_sgmii_x550em_a +ffffffff817a9a60 T ixgbe_init_ops_X550EM_x +ffffffff817a9b20 T ixgbe_acquire_swfw_sync_X550em +ffffffff817a9be0 T ixgbe_release_swfw_sync_X550em +ffffffff817a9c70 T ixgbe_iosf_wait +ffffffff817a9d20 T ixgbe_get_phy_token +ffffffff817a9da0 T ixgbe_put_phy_token +ffffffff817a9e20 T ixgbe_supported_sfp_modules_X550em +ffffffff817a9ea0 T ixgbe_identify_sfp_module_X550em +ffffffff817a9f20 T ixgbe_init_mac_link_ops_X550em +ffffffff817aa060 T ixgbe_restart_an_internal_phy_x550em +ffffffff817aa170 T ixgbe_setup_sgmii +ffffffff817aa410 T ixgbe_setup_sgmii_fw +ffffffff817aa6f0 T ixgbe_setup_mac_link_sfp_x550a +ffffffff817aa8e0 T ixgbe_setup_mac_link_sfp_x550em +ffffffff817aa9a0 T ixgbe_setup_mac_link_t_X550em +ffffffff817aaa50 T ixgbe_check_link_t_X550em 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wpi_alloc_fwmem +ffffffff818052e0 T wpi_alloc_shared +ffffffff81805320 T wpi_alloc_tx_ring +ffffffff818054d0 T wpi_alloc_rx_ring +ffffffff818056d0 T wpi_apm_stop +ffffffff818057f0 T wpi_ioctl +ffffffff81805a50 T wpi_start +ffffffff81805bd0 T wpi_watchdog +ffffffff81805cb0 T wpi_node_alloc +ffffffff81805cd0 T wpi_newassoc +ffffffff81805e20 T wpi_updateedca +ffffffff818060f0 T wpi_set_key +ffffffff81806370 T wpi_delete_key +ffffffff818065b0 T wpi_newstate +ffffffff81806880 T wpi_media_change +ffffffff818069e0 T wpi_radiotap_attach +ffffffff81806a70 T wpi_calib_timeout +ffffffff81806b70 T wpi_init_task +ffffffff81806be0 T wpi_free_tx_ring +ffffffff81806dd0 T wpi_free_shared +ffffffff81806ec0 T wpi_free_fwmem +ffffffff81806fb0 T wpi_free_rx_ring +ffffffff818070f0 T wpi_stop +ffffffff81807150 T wpi_wakeup +ffffffff818071f0 T wpi_init +ffffffff81807340 T wpi_nic_lock +ffffffff81807400 T wpi_read_prom_data +ffffffff81807800 T wpi_dma_contig_alloc +ffffffff818079f0 T wpi_dma_contig_free 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wpi_apm_stop_master +ffffffff8180c810 T wpi_nic_config +ffffffff8180c9c0 T wpi_hw_init +ffffffff8180d240 T wpi_hw_stop +ffffffff8180e000 T iwn_match +ffffffff8180e030 T iwn_attach +ffffffff8180ec10 T iwn_detach +ffffffff8180f000 T iwn_activate +ffffffff8180f0c0 T iwn_intr +ffffffff8180f5a0 T iwn4965_attach +ffffffff8180f6f0 T iwn5000_attach +ffffffff8180fa30 T iwn_hw_prepare +ffffffff8180fd90 T iwn_read_eeprom +ffffffff81810040 T iwn_alloc_fwmem +ffffffff81810070 T iwn_alloc_kw +ffffffff818100a0 T iwn_alloc_ict +ffffffff818100e0 T iwn_alloc_sched +ffffffff81810120 T iwn_alloc_tx_ring +ffffffff81810290 T iwn_alloc_rx_ring +ffffffff818104b0 T iwn_ioctl +ffffffff81810750 T iwn_start +ffffffff818108f0 T iwn_watchdog +ffffffff818109e0 T iwn_node_alloc +ffffffff81810a00 T iwn_bgscan +ffffffff81810a80 T iwn_newassoc +ffffffff81810b70 T iwn_updateedca +ffffffff81810e70 T iwn_set_key +ffffffff81810fa0 T iwn_delete_key +ffffffff818110a0 T iwn_updatechan +ffffffff818111a0 T iwn_updateprot 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iwn_rx_compressed_ba +ffffffff8181b3c0 T iwn_ampdu_txq_advance +ffffffff8181b550 T iwn_clear_oactive +ffffffff8181b5d0 T iwn5000_rx_calib_results +ffffffff8181b740 T iwn_rx_statistics +ffffffff8181b8e0 T iwn4965_power_calibration +ffffffff8181b930 T iwn_get_noise +ffffffff8181b9a0 T iwn_collect_noise +ffffffff8181bb00 T iwn_tune_sensitivity +ffffffff8181c210 T iwn_tx_done_free_txdata +ffffffff8181c2c0 T iwn_ampdu_tx_done +ffffffff8181c570 T iwn_tx_done +ffffffff8181c7e0 T iwn_cmd_done +ffffffff8181c8d0 T iwn_notif_intr +ffffffff8181cf20 T iwn_init_sensitivity +ffffffff8181d1e0 T iwn_wakeup_intr +ffffffff8181d2a0 T iwn_fatal_intr +ffffffff8181d590 T iwn_rval2ridx +ffffffff8181d610 T iwn_tx +ffffffff8181e110 T iwn_rxon_ht40_enabled +ffffffff8181e150 T iwn_set_pslevel +ffffffff8181e310 T iwn_add_broadcast_node +ffffffff8181e550 T iwn_set_critical_temp +ffffffff8181e600 T iwn_set_timing +ffffffff8181e7d0 T iwn_send_sensitivity +ffffffff8181e8d0 T iwn_send_btcoex +ffffffff8181e930 T iwn_send_advanced_btcoex +ffffffff8181f090 T iwn5000_runtime_calib +ffffffff8181f140 T iwn_config +ffffffff8181f680 T iwn6000_temp_offset_calib +ffffffff8181f6f0 T iwn2000_temp_offset_calib +ffffffff8181f790 T iwn_get_active_dwell_time +ffffffff8181f7d0 T iwn_limit_dwell +ffffffff8181f840 T iwn_get_passive_dwell_time +ffffffff8181f8c0 T iwn_rxon_configure_ht40 +ffffffff8181f970 T iwn_update_rxon_restore_power +ffffffff8181fa30 T iwn5000_query_calibration +ffffffff8181fb20 T iwn5000_send_calibration +ffffffff8181fc70 T iwn5000_send_wimax_coex +ffffffff8181fd00 T iwn5000_crystal_calib +ffffffff8181fd60 T iwn_hw_stop +ffffffff81820150 T iwn_hw_init +ffffffff81820870 T iwn4965_load_bootcode +ffffffff81820c20 T iwn5000_load_firmware_section +ffffffff81820e70 T iwn_read_firmware_leg +ffffffff81820f80 T iwn_read_firmware_tlv +ffffffff81821200 T iwn_read_firmware +ffffffff81821430 T iwn_apm_stop_master +ffffffff81822000 T iwm_lookup_cmd_ver +ffffffff81822070 T iwm_is_mimo_ht_plcp +ffffffff818220b0 T iwm_is_mimo_ht_mcs +ffffffff818220f0 T iwm_store_cscheme +ffffffff81822140 T iwm_firmware_store_section +ffffffff818221e0 T iwm_set_default_calib +ffffffff81822230 T iwm_fw_info_free +ffffffff81822280 T iwm_fw_version_str +ffffffff818222c0 T iwm_read_firmware +ffffffff81822c10 T iwm_read_prph_unlocked +ffffffff81822c70 T iwm_read_prph +ffffffff81822cf0 T iwm_nic_assert_locked +ffffffff81822d50 T iwm_write_prph_unlocked +ffffffff81822dc0 T iwm_write_prph +ffffffff81822e50 T iwm_write_prph64 +ffffffff81822f50 T iwm_read_mem +ffffffff81823080 T iwm_nic_lock +ffffffff818231d0 T iwm_nic_unlock +ffffffff81823280 T iwm_write_mem +ffffffff818233c0 T iwm_write_mem32 +ffffffff818234d0 T iwm_poll_bit +ffffffff818235a0 T iwm_set_bits_mask_prph +ffffffff81823740 T iwm_set_bits_prph +ffffffff81823760 T iwm_clear_bits_prph +ffffffff81823780 T iwm_dma_contig_alloc +ffffffff81823970 T iwm_dma_contig_free +ffffffff81823a30 T iwm_alloc_rx_ring +ffffffff81823c10 T iwm_rx_addbuf +ffffffff81823df0 T iwm_free_rx_ring +ffffffff818240a0 T iwm_disable_rx_dma +ffffffff818242c0 T iwm_reset_rx_ring +ffffffff81824340 T iwm_alloc_tx_ring +ffffffff81824520 T iwm_free_tx_ring +ffffffff81824720 T iwm_reset_tx_ring +ffffffff818248e0 T iwm_enable_rfkill_int +ffffffff81824a00 T iwm_check_rfkill +ffffffff81824a80 T iwm_enable_interrupts +ffffffff81824b30 T iwm_enable_fwload_interrupt +ffffffff81824c00 T iwm_restore_interrupts +ffffffff81824c30 T iwm_disable_interrupts +ffffffff81824cf0 T iwm_ict_reset +ffffffff81824eb0 T iwm_set_hw_ready +ffffffff81825090 T iwm_prepare_card_hw +ffffffff818251d0 T iwm_apm_config +ffffffff818252b0 T iwm_apm_init +ffffffff818259a0 T iwm_apm_stop +ffffffff81825d60 T iwm_init_msix_hw +ffffffff81825e00 T iwm_conf_msix_hw +ffffffff81826350 T iwm_clear_persistence_bit +ffffffff818264a0 T iwm_start_hw +ffffffff818266c0 T iwm_stop_device +ffffffff81826ce0 T iwm_nic_config +ffffffff81826dc0 T iwm_nic_rx_init +ffffffff81826de0 T iwm_nic_rx_mq_init +ffffffff818271e0 T iwm_nic_rx_legacy_init +ffffffff81827420 T iwm_nic_tx_init +ffffffff818275f0 T iwm_nic_init +ffffffff81827750 T iwm_enable_ac_txq +ffffffff81827bd0 T iwm_enable_txq +ffffffff81827db0 T iwm_send_cmd_pdu +ffffffff81827e30 T iwm_disable_txq +ffffffff81827f10 T iwm_post_alive +ffffffff81828490 T iwm_phy_db_get_section +ffffffff81828540 T iwm_phy_db_set_section +ffffffff81828690 T iwm_is_valid_channel +ffffffff81828700 T iwm_ch_id_to_ch_index +ffffffff81828780 T iwm_channel_id_to_papd +ffffffff81828820 T iwm_channel_id_to_txp +ffffffff818289c0 T iwm_phy_db_get_section_data +ffffffff81828b50 T iwm_send_phy_db_cmd +ffffffff81828bf0 T iwm_send_cmd +ffffffff818292d0 T iwm_phy_db_send_all_channel_groups +ffffffff818294a0 T iwm_send_phy_db_data +ffffffff81829790 T iwm_send_time_event_cmd +ffffffff818298a0 T iwm_free_resp +ffffffff81829920 T iwm_protect_session +ffffffff818299d0 T iwm_unprotect_session +ffffffff81829a80 T iwm_nvm_read_chunk +ffffffff81829be0 T iwm_nvm_read_section +ffffffff81829ca0 T iwm_fw_valid_tx_ant +ffffffff81829ce0 T iwm_fw_valid_rx_ant +ffffffff81829d30 T iwm_valid_siso_ant_rate_mask +ffffffff81829d90 T iwm_init_channel_map +ffffffff81829f10 T iwm_mimo_enabled +ffffffff81829f50 T iwm_setup_ht_rates +ffffffff8182a000 T iwm_setup_vht_rates +ffffffff8182a090 T iwm_init_reorder_buffer +ffffffff8182a0f0 T iwm_clear_reorder_buffer +ffffffff8182a1b0 T iwm_rx_ba_session_expired +ffffffff8182a2b0 T iwm_reorder_timer_expired +ffffffff8182a470 T iwm_release_frames +ffffffff8182a660 T iwm_sta_rx_agg +ffffffff8182ab60 T iwm_send_cmd_pdu_status +ffffffff8182abf0 T iwm_mac_ctxt_task +ffffffff8182ad50 T iwm_mac_ctxt_cmd +ffffffff8182af50 T iwm_updateprot +ffffffff8182b010 T iwm_add_task +ffffffff8182b080 T iwm_updateslot +ffffffff8182b140 T iwm_updateedca +ffffffff8182b200 T iwm_phy_ctxt_task +ffffffff8182b3d0 T iwm_phy_ctxt_update +ffffffff8182b540 T iwm_setrates +ffffffff8182b6d0 T iwm_updatechan +ffffffff8182b790 T iwm_updatedtim +ffffffff8182b850 T iwm_sta_tx_agg +ffffffff8182bd60 T iwm_flush_sta +ffffffff8182bf00 T iwm_txq_advance +ffffffff8182c0f0 T iwm_clear_oactive +ffffffff8182c170 T iwm_ba_task +ffffffff8182c3c0 T iwm_ampdu_rx_start +ffffffff8182c4a0 T iwm_ampdu_rx_stop +ffffffff8182c580 T iwm_ampdu_tx_start +ffffffff8182c6a0 T iwm_ampdu_tx_stop +ffffffff8182c780 T iwm_set_hw_address_8000 +ffffffff8182ca00 T iwm_parse_nvm_data +ffffffff8182cc50 T iwm_parse_nvm_sections +ffffffff8182cd50 T iwm_nvm_init +ffffffff8182d010 T iwm_firmware_load_sect +ffffffff8182d0c0 T iwm_firmware_load_chunk +ffffffff8182d370 T iwm_load_firmware_7000 +ffffffff8182d5c0 T iwm_load_cpu_sections_8000 +ffffffff8182d960 T iwm_load_firmware_8000 +ffffffff8182db70 T iwm_load_firmware +ffffffff8182dc50 T iwm_start_fw +ffffffff8182de20 T iwm_send_tx_ant_cfg +ffffffff8182deb0 T iwm_send_phy_cfg_cmd +ffffffff8182df60 T iwm_send_dqa_cmd +ffffffff8182dff0 T iwm_load_ucode_wait_alive +ffffffff8182e230 T iwm_save_fw_paging +ffffffff8182e2a0 T iwm_send_paging_cmd +ffffffff8182e3f0 T iwm_free_fw_paging +ffffffff8182e560 T iwm_run_init_mvm_ucode +ffffffff8182e9b0 T iwm_send_bt_init_conf +ffffffff8182ea50 T iwm_sf_config +ffffffff8182eca0 T iwm_config_ltr +ffffffff8182ed60 T iwm_get_signal_strength +ffffffff8182edc0 T iwm_rxmq_get_signal_strength +ffffffff8182ee10 T iwm_rx_rx_phy_cmd +ffffffff8182ee70 T iwm_get_noise +ffffffff8182eee0 T iwm_ccmp_decap +ffffffff8182efe0 T iwm_rx_hwdecrypt +ffffffff8182f0b0 T iwm_rx_frame +ffffffff8182f3e0 T iwm_rx_mpdu +ffffffff8182f5f0 T iwm_flip_address +ffffffff8182f640 T iwm_detect_duplicate +ffffffff8182f740 T iwm_is_sn_less +ffffffff8182f7a0 T iwm_oldsn_workaround +ffffffff8182f860 T iwm_rx_reorder +ffffffff8182fe90 T iwm_rx_mpdu_mq +ffffffff818302a0 T iwm_ra_choose +ffffffff81830360 T iwm_ht_single_rate_control +ffffffff81830590 T iwm_vht_single_rate_control +ffffffff818307e0 T iwm_rx_tx_cmd_single +ffffffff818309b0 T iwm_txd_done +ffffffff81830a80 T iwm_reset_sched +ffffffff81830b30 T iwm_ampdu_tx_done +ffffffff81830e80 T iwm_rx_tx_cmd +ffffffff81831050 T iwm_ampdu_rate_control +ffffffff81831210 T iwm_rx_compressed_ba +ffffffff818313f0 T iwm_rx_bmiss +ffffffff818314e0 T iwm_binding_cmd +ffffffff81831680 T iwm_phy_ctxt_cmd_hdr +ffffffff818316f0 T iwm_phy_ctxt_cmd_data +ffffffff81831870 T iwm_get_vht_ctrl_pos +ffffffff818318e0 T iwm_phy_ctxt_cmd_uhb +ffffffff81831b10 T iwm_phy_ctxt_cmd +ffffffff81831c60 T iwm_update_sched +ffffffff81831d30 T iwm_send_cmd_status +ffffffff81831e50 T iwm_cmd_done +ffffffff81831ff0 T iwm_tx_fill_cmd +ffffffff81832420 T iwm_rval2ridx +ffffffff818324b0 T iwm_tx +ffffffff81832ed0 T iwm_flush_tx_path +ffffffff81832fa0 T iwm_wait_tx_queues_empty +ffffffff81833060 T iwm_led_enable +ffffffff81833090 T iwm_led_disable +ffffffff818330c0 T iwm_led_is_enabled +ffffffff81833120 T iwm_led_blink_timeout +ffffffff818331a0 T iwm_led_blink_start +ffffffff818331f0 T iwm_led_blink_stop +ffffffff81833240 T iwm_beacon_filter_send_cmd +ffffffff818332d0 T iwm_beacon_filter_set_cqm_params +ffffffff81833310 T iwm_update_beacon_abort +ffffffff81833400 T iwm_power_build_cmd +ffffffff81833490 T iwm_power_mac_update_mode +ffffffff818336a0 T iwm_power_update_device +ffffffff81833740 T iwm_enable_beacon_filter +ffffffff81833830 T iwm_disable_beacon_filter +ffffffff81833910 T iwm_add_sta_cmd +ffffffff81833d10 T iwm_add_aux_sta +ffffffff81833eb0 T iwm_drain_sta +ffffffff81834060 T iwm_rm_sta_cmd +ffffffff81834120 T iwm_scan_rx_chain +ffffffff81834190 T iwm_scan_rate_n_flags +ffffffff81834290 T iwm_lmac_scan_fill_channels +ffffffff81834370 T iwm_umac_scan_fill_channels +ffffffff81834460 T iwm_fill_probe_req_v1 +ffffffff81834500 T iwm_fill_probe_req +ffffffff81834740 T iwm_lmac_scan +ffffffff81834c40 T iwm_config_umac_scan +ffffffff81834e50 T iwm_umac_scan_size +ffffffff81834ec0 T iwm_get_scan_req_umac_chan_param +ffffffff81834f10 T iwm_get_scan_req_umac_data +ffffffff81834f60 T iwm_umac_scan +ffffffff818353d0 T iwm_mcc_update +ffffffff81835460 T iwm_ridx2rate +ffffffff818354d0 T iwm_ack_rates +ffffffff81835790 T iwm_mac_ctxt_cmd_common +ffffffff81835aa0 T iwm_mac_ctxt_cmd_fill_sta +ffffffff81835b50 T iwm_update_quotas +ffffffff81835f40 T iwm_del_task +ffffffff81835fa0 T iwm_scan +ffffffff81836210 T iwm_scan_abort +ffffffff81836330 T iwm_bgscan +ffffffff818363d0 T iwm_bgscan_done +ffffffff81836470 T iwm_bgscan_done_task +ffffffff818366d0 T iwm_umac_scan_abort +ffffffff81836760 T iwm_lmac_scan_abort +ffffffff81836800 T iwm_auth +ffffffff81836c00 T iwm_deauth +ffffffff81836f60 T iwm_run +ffffffff81837640 T iwm_allow_mcast +ffffffff81837740 T iwm_run_stop +ffffffff81837db0 T iwm_node_alloc +ffffffff81837dd0 T iwm_set_key_v1 +ffffffff81837f10 T iwm_set_key +ffffffff81838180 T iwm_delete_key_v1 +ffffffff818382b0 T iwm_delete_key +ffffffff81838520 T iwm_calib_timeout +ffffffff818385e0 T iwm_set_rate_table_vht +ffffffff81838900 T iwm_set_rate_table +ffffffff81838d00 T iwm_media_change +ffffffff81838ef0 T iwm_stop +ffffffff81839390 T iwm_init +ffffffff81839650 T iwm_newstate_task +ffffffff818397d0 T iwm_newstate +ffffffff81839930 T iwm_endscan +ffffffff81839980 T iwm_fill_sf_command +ffffffff81839a80 T iwm_send_soc_conf +ffffffff81839bc0 T iwm_send_update_mcc_cmd +ffffffff81839d80 T iwm_send_temp_report_ths_cmd +ffffffff81839e50 T iwm_tt_tx_backoff +ffffffff81839ee0 T iwm_fill_paging_mem +ffffffff8183a110 T iwm_alloc_fw_paging_mem +ffffffff8183a2b0 T iwm_init_hw +ffffffff8183ac80 T iwm_preinit +ffffffff8183aea0 T iwm_start +ffffffff8183b070 T iwm_watchdog +ffffffff8183b210 T iwm_nic_error +ffffffff8183b700 T iwm_dump_driver_status +ffffffff8183b7a0 T iwm_ioctl +ffffffff8183b910 T iwm_nic_umac_error +ffffffff8183bd50 T iwm_desc_lookup +ffffffff8183bee0 T iwm_rx_pkt_valid +ffffffff8183bf30 T iwm_rx_pkt +ffffffff8183ccd0 T iwm_notif_intr +ffffffff8183ce30 T iwm_intr +ffffffff8183d260 T iwm_intr_msix +ffffffff8183d500 T iwm_match +ffffffff8183d530 T iwm_attach_hook +ffffffff8183d570 T iwm_attach +ffffffff8183e600 T iwm_radiotap_attach +ffffffff8183e690 T iwm_init_task +ffffffff8183e750 T iwm_resume +ffffffff8183e880 T iwm_wakeup +ffffffff8183e930 T iwm_activate +ffffffff8183f000 T iwx_lookup_cmd_ver +ffffffff8183f070 T iwx_lookup_notif_ver +ffffffff8183f0e0 T iwx_is_mimo_ht_plcp +ffffffff8183f120 T iwx_store_cscheme +ffffffff8183f170 T iwx_ctxt_info_alloc_dma +ffffffff8183f210 T iwx_dma_contig_alloc +ffffffff8183f3f0 T iwx_ctxt_info_free_paging +ffffffff8183f550 T iwx_dma_contig_free +ffffffff8183f610 T iwx_get_num_sections +ffffffff8183f690 T iwx_init_fw_sec +ffffffff8183fb40 T iwx_fw_version_str +ffffffff8183fb80 T iwx_alloc_fw_monitor_block +ffffffff8183fc30 T iwx_alloc_fw_monitor +ffffffff8183fcf0 T iwx_apply_debug_destination +ffffffff81840230 T iwx_nic_lock +ffffffff81840380 T iwx_write_prph +ffffffff81840420 T iwx_set_bits_prph +ffffffff81840440 T iwx_clear_bits_prph +ffffffff81840460 T iwx_read_prph +ffffffff81840500 T iwx_nic_unlock +ffffffff818405b0 T iwx_set_ltr +ffffffff81840700 T iwx_ctxt_info_init +ffffffff818409c0 T iwx_ctxt_info_free_fw_img +ffffffff81840b40 T iwx_ctxt_info_gen3_init +ffffffff81841130 T iwx_write_umac_prph +ffffffff818411e0 T iwx_firmware_store_section +ffffffff81841280 T iwx_set_default_calib +ffffffff818412d0 T iwx_fw_info_free +ffffffff81841360 T iwx_read_firmware +ffffffff81841ef0 T iwx_prph_addr_mask +ffffffff81841f30 T iwx_read_prph_unlocked +ffffffff81841fb0 T iwx_nic_assert_locked +ffffffff81842010 T iwx_write_prph_unlocked +ffffffff81842090 T iwx_write_prph64 +ffffffff818421c0 T iwx_read_umac_prph_unlocked +ffffffff81842240 T iwx_read_umac_prph +ffffffff818422e0 T iwx_write_umac_prph_unlocked +ffffffff81842360 T iwx_read_mem +ffffffff81842490 T iwx_write_mem +ffffffff818425d0 T iwx_write_mem32 +ffffffff818426e0 T iwx_poll_bit +ffffffff818427b0 T iwx_set_bits_mask_prph +ffffffff81842990 T iwx_alloc_rx_ring +ffffffff81842b70 T iwx_rx_addbuf +ffffffff81842d80 T iwx_free_rx_ring +ffffffff81843030 T iwx_disable_rx_dma +ffffffff81843290 T iwx_reset_rx_ring +ffffffff81843330 T iwx_alloc_tx_ring +ffffffff81843540 T iwx_free_tx_ring +ffffffff818437d0 T iwx_reset_tx_ring +ffffffff81843a30 T iwx_enable_rfkill_int +ffffffff81843b10 T iwx_check_rfkill +ffffffff81843b90 T iwx_enable_interrupts +ffffffff81843c40 T iwx_enable_fwload_interrupt +ffffffff81843d20 T iwx_restore_interrupts +ffffffff81843d50 T iwx_disable_interrupts +ffffffff81843e10 T iwx_ict_reset +ffffffff81843fd0 T iwx_set_hw_ready +ffffffff818441b0 T iwx_prepare_card_hw +ffffffff818442f0 T iwx_force_power_gating +ffffffff818443a0 T iwx_apm_config +ffffffff81844470 T iwx_apm_init +ffffffff818446d0 T iwx_apm_stop +ffffffff81844a90 T iwx_init_msix_hw +ffffffff81844b30 T iwx_conf_msix_hw +ffffffff818450d0 T iwx_clear_persistence_bit +ffffffff81845250 T iwx_start_hw +ffffffff81845650 T iwx_stop_device +ffffffff81845bc0 T iwx_nic_config +ffffffff81845c50 T iwx_nic_rx_init +ffffffff81845cb0 T iwx_nic_init +ffffffff81845dd0 T iwx_enable_txq +ffffffff818460a0 T iwx_send_cmd +ffffffff81846680 T iwx_free_resp +ffffffff81846700 T iwx_disable_txq +ffffffff81846960 T iwx_post_alive +ffffffff818469f0 T iwx_schedule_session_protection +ffffffff81846ac0 T iwx_send_cmd_pdu +ffffffff81846b40 T iwx_unprotect_session +ffffffff81846c10 T iwx_fw_valid_tx_ant +ffffffff81846c50 T iwx_fw_valid_rx_ant +ffffffff81846ca0 T iwx_init_channel_map +ffffffff81846ea0 T iwx_mimo_enabled +ffffffff81846ee0 T iwx_setup_ht_rates +ffffffff81846f90 T iwx_setup_vht_rates +ffffffff81847020 T iwx_init_reorder_buffer +ffffffff81847080 T iwx_clear_reorder_buffer +ffffffff81847140 T iwx_rx_ba_session_expired +ffffffff81847240 T iwx_rx_bar_frame_release +ffffffff818472f0 T iwx_release_frames +ffffffff818474e0 T iwx_reorder_timer_expired +ffffffff818476a0 T iwx_find_rxba_data +ffffffff81847730 T iwx_sta_rx_agg_baid_cfg_cmd +ffffffff81847990 T iwx_send_cmd_pdu_status +ffffffff81847a20 T iwx_sta_rx_agg_sta_cmd +ffffffff81847c70 T iwx_sta_rx_agg +ffffffff81847f50 T iwx_mac_ctxt_task +ffffffff818480e0 T iwx_mac_ctxt_cmd +ffffffff818482c0 T iwx_phy_ctxt_task +ffffffff81848480 T iwx_phy_ctxt_update +ffffffff818488e0 T iwx_updatechan +ffffffff818489a0 T iwx_add_task +ffffffff81848a10 T iwx_updateprot +ffffffff81848ad0 T iwx_updateslot +ffffffff81848b90 T iwx_updateedca +ffffffff81848c50 T iwx_updatedtim +ffffffff81848d10 T iwx_sta_tx_agg_start +ffffffff81848f00 T iwx_ba_task +ffffffff81849050 T iwx_ampdu_rx_start +ffffffff81849130 T iwx_ampdu_rx_stop +ffffffff81849210 T iwx_ampdu_tx_start +ffffffff81849320 T iwx_set_mac_addr_from_csr +ffffffff81849540 T iwx_flip_hw_address +ffffffff81849590 T iwx_is_valid_mac_addr +ffffffff81849630 T iwx_nvm_get +ffffffff81849900 T iwx_load_firmware +ffffffff81849ae0 T iwx_start_fw +ffffffff81849cc0 T iwx_pnvm_handle_section +ffffffff81849fb0 T iwx_ctxt_info_gen3_set_pnvm +ffffffff8184a000 T iwx_pnvm_parse +ffffffff8184a0f0 T iwx_load_pnvm +ffffffff8184a490 T iwx_send_tx_ant_cfg +ffffffff8184a520 T iwx_send_phy_cfg_cmd +ffffffff8184a5d0 T iwx_send_dqa_cmd +ffffffff8184a660 T iwx_load_ucode_wait_alive +ffffffff8184a720 T iwx_run_init_mvm_ucode +ffffffff8184a970 T iwx_config_ltr +ffffffff8184aa30 T iwx_update_rx_desc +ffffffff8184aad0 T iwx_rxmq_get_signal_strength +ffffffff8184ab20 T iwx_rx_rx_phy_cmd +ffffffff8184ab80 T iwx_get_noise +ffffffff8184abf0 T iwx_ccmp_decap +ffffffff8184ad30 T iwx_rx_hwdecrypt +ffffffff8184ae30 T iwx_rx_frame +ffffffff8184b0f0 T iwx_detect_duplicate +ffffffff8184b1f0 T iwx_is_sn_less +ffffffff8184b250 T iwx_oldsn_workaround +ffffffff8184b310 T iwx_rx_reorder +ffffffff8184b940 T iwx_rx_mpdu_mq +ffffffff8184bc90 T iwx_clear_tx_desc +ffffffff8184be10 T iwx_txd_done +ffffffff8184bed0 T iwx_txq_advance +ffffffff8184c210 T iwx_tx_update_byte_tbl +ffffffff8184c2b0 T iwx_rx_tx_cmd +ffffffff8184c410 T iwx_clear_oactive +ffffffff8184c490 T iwx_rx_compressed_ba +ffffffff8184c610 T iwx_rx_bmiss +ffffffff8184c700 T iwx_binding_cmd +ffffffff8184c890 T iwx_get_vht_ctrl_pos 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T bce_attach +ffffffff8189dae0 T bce_activate +ffffffff8189db50 T bce_intr +ffffffff8189de50 T bce_reset +ffffffff8189e410 T bce_ioctl +ffffffff8189e570 T bce_start +ffffffff8189e7c0 T bce_watchdog +ffffffff8189e810 T bce_mii_read +ffffffff8189e950 T bce_mii_write +ffffffff8189ea80 T bce_statchg +ffffffff8189ee10 T bce_mediachange +ffffffff8189ee60 T bce_mediastatus +ffffffff8189eec0 T bce_tick +ffffffff8189ef10 T bce_stop +ffffffff8189f030 T bce_init +ffffffff8189f440 T bce_iff +ffffffff8189f540 T bce_rxintr +ffffffff8189f6d0 T bce_txintr +ffffffff8189f7c0 T bce_add_rxbuf +ffffffff8189f880 T bce_add_mac +ffffffff818a0000 T ath_pci_match +ffffffff818a0060 T ath_pci_attach +ffffffff818a0290 T ath_pci_detach +ffffffff818a1000 T athn_pci_match +ffffffff818a1030 T athn_pci_attach +ffffffff818a12b0 T athn_pci_detach +ffffffff818a1330 T athn_pci_activate +ffffffff818a13e0 T athn_pci_read +ffffffff818a1410 T athn_pci_write +ffffffff818a1440 T athn_pci_write_barrier +ffffffff818a1470 T athn_pci_disable_aspm +ffffffff818a14e0 T athn_pci_wakeup +ffffffff818a2000 T atw_pci_match +ffffffff818a2030 T atw_pci_attach +ffffffff818a22a0 T atw_pci_detach +ffffffff818a2320 t atw_pci_enable +ffffffff818a23c0 t atw_pci_disable +ffffffff818a3000 T rtw_pci_match +ffffffff818a3030 T rtw_pci_attach +ffffffff818a3250 T rtw_pci_detach +ffffffff818a32d0 T rtw_pci_enable +ffffffff818a3370 T rtw_pci_disable +ffffffff818a4000 T rtwn_pci_match +ffffffff818a4030 T rtwn_pci_attach +ffffffff818a4590 T rtwn_pci_detach +ffffffff818a46a0 T rtwn_pci_activate +ffffffff818a46c0 T rtwn_calib_to +ffffffff818a4720 T rtwn_scan_to +ffffffff818a4740 T rtwn_intr +ffffffff818a4a20 T rtwn_alloc_rx_list +ffffffff818a4d40 T rtwn_alloc_tx_list +ffffffff818a4f80 T rtwn_free_rx_list +ffffffff818a50d0 T rtwn_pci_write_1 +ffffffff818a5100 T rtwn_pci_write_2 +ffffffff818a5130 T rtwn_pci_write_4 +ffffffff818a5160 T rtwn_pci_read_1 +ffffffff818a5190 T rtwn_pci_read_2 +ffffffff818a51c0 T rtwn_pci_read_4 +ffffffff818a51f0 T rtwn_tx +ffffffff818a57c0 T rtwn_power_on +ffffffff818a57f0 T rtwn_dma_init +ffffffff818a5ba0 T rtwn_pci_load_firmware +ffffffff818a5c50 T rtwn_fw_loadpage +ffffffff818a5d90 T rtwn_mac_init +ffffffff818a5f10 T rtwn_bb_init +ffffffff818a63b0 T rtwn_alloc_buffers +ffffffff818a63e0 T rtwn_pci_init +ffffffff818a64b0 T rtwn_pci_stop +ffffffff818a6600 T rtwn_is_oactive +ffffffff818a6640 T rtwn_next_calib +ffffffff818a6660 T rtwn_cancel_calib +ffffffff818a66a0 T rtwn_pci_next_scan +ffffffff818a66c0 T rtwn_cancel_scan +ffffffff818a6700 T rtwn_wait_async +ffffffff818a6730 T rtwn_free_tx_list +ffffffff818a68a0 T rtwn_setup_rx_desc +ffffffff818a6910 T rtwn_reset_rx_list +ffffffff818a69b0 T rtwn_reset_tx_list +ffffffff818a6b00 T rtwn_rx_frame +ffffffff818a6f60 T rtwn_tx_done +ffffffff818a70f0 T rtwn_poll_c2h_events +ffffffff818a72b0 T rtwn_pci_92c_stop +ffffffff818a7490 T rtwn_pci_88e_stop +ffffffff818a7870 T rtwn_pci_23a_stop +ffffffff818a7c10 T rtwn_88e_intr +ffffffff818a7f60 T rtwn_llt_write +ffffffff818a8020 T rtwn_llt_init +ffffffff818a82f0 T rtwn_92c_power_on +ffffffff818a8770 T rtwn_88e_power_on +ffffffff818a8b70 T rtwn_23a_power_on +ffffffff818a8fe0 T rtwn_tx_report +ffffffff818aa000 T ral_pci_match +ffffffff818aa030 T ral_pci_attach +ffffffff818aa210 T ral_pci_detach +ffffffff818aa2b0 T ral_pci_activate +ffffffff818aa340 T ral_pci_wakeup +ffffffff818ab000 T acx_pci_match +ffffffff818ab030 T acx_pci_attach +ffffffff818ab260 T acx_pci_detach +ffffffff818ac000 T pgt_pci_match +ffffffff818ac030 T pgt_pci_attach +ffffffff818ac200 T pgt_pci_detach +ffffffff818ad000 T malo_pci_match +ffffffff818ad030 T malo_pci_attach +ffffffff818ad1e0 T malo_pci_detach +ffffffff818ad230 T malo_pci_activate +ffffffff818ad290 T malo_pci_wakeup +ffffffff818ae000 T bwi_pci_match +ffffffff818ae070 T bwi_pci_attach +ffffffff818ae290 T bwi_pci_detach +ffffffff818ae2e0 T bwi_pci_activate +ffffffff818ae350 T bwi_reset_bcm4331 +ffffffff818ae470 T bwi_pci_conf_write +ffffffff818ae4a0 T bwi_pci_conf_read +ffffffff818ae4d0 T bwi_pci_wakeup +ffffffff818af000 T piixpm_match +ffffffff818af030 T piixpm_attach +ffffffff818af4c0 T piixpm_intr +ffffffff818af5d0 T piixpm_i2c_acquire_bus +ffffffff818af6b0 T piixpm_i2c_release_bus +ffffffff818af790 T piixpm_i2c_exec +ffffffff818b0000 T vic_match +ffffffff818b00a0 T vic_attach +ffffffff818b0420 T vic_intr +ffffffff818b04a0 T vic_query +ffffffff818b0700 T vic_alloc_data +ffffffff818b0a00 T vic_tick +ffffffff818b0a70 T vic_ioctl +ffffffff818b0ca0 T vic_start +ffffffff818b0fd0 T vic_watchdog +ffffffff818b1000 T vic_media_change +ffffffff818b1030 T vic_media_status +ffffffff818b10f0 T vic_read +ffffffff818b1110 T vic_read_cmd +ffffffff818b1160 T vic_getlladdr +ffffffff818b1210 T vic_alloc_dmamem +ffffffff818b1380 T vic_rx_fill +ffffffff818b1560 T vic_alloc_mbuf +ffffffff818b1620 T vic_init_data +ffffffff818b19d0 T vic_uninit_data +ffffffff818b1ba0 T vic_link_state +ffffffff818b1c20 T vic_write +ffffffff818b1c70 T vic_rx_proc +ffffffff818b1ed0 T vic_tx_proc +ffffffff818b2050 T vic_iff +ffffffff818b2190 T vic_setlladdr +ffffffff818b21f0 T vic_load_txb +ffffffff818b22a0 T vic_init +ffffffff818b2440 T vic_stop +ffffffff818b2580 T vic_rxrinfo +ffffffff818b2650 T vic_free_dmamem +ffffffff818b3000 T vmxnet3_match +ffffffff818b3030 T vmxnet3_attach +ffffffff818b3900 T vmxnet3_intr +ffffffff818b39a0 T vmxnet3_intr_event +ffffffff818b3a20 T vmxnet3_intr_intx +ffffffff818b3a90 T vmxnet3_intr_queue +ffffffff818b3b20 T vmxnet3_dma_init +ffffffff818b3ed0 T vmxnet3_ioctl +ffffffff818b4160 T vmxnet3_start +ffffffff818b4500 T vmxnet3_watchdog +ffffffff818b4550 T vmxnet3_media_change +ffffffff818b4580 T vmxnet3_media_status +ffffffff818b4690 T vmxnet3_link_state +ffffffff818b4750 T vmxnet3_dma_allocmem +ffffffff818b48a0 T vmxnet3_alloc_txring +ffffffff818b4a50 T vmxnet3_alloc_rxring +ffffffff818b4da0 t vmx_dmamem_alloc +ffffffff818b4f00 T vmxnet3_rxfill_tick +ffffffff818b4f70 T vmxnet3_txinit +ffffffff818b5060 T vmxnet3_rxfill +ffffffff818b5350 T vmxnet3_rxinit +ffffffff818b5490 T vmxnet3_txstop +ffffffff818b5590 T vmxnet3_rxstop +ffffffff818b56f0 T vmxnet3_enable_all_intrs +ffffffff818b57c0 T vmxnet3_disable_all_intrs +ffffffff818b5890 T vmxnet3_evintr +ffffffff818b5a60 T vmxnet3_rxintr +ffffffff818b5de0 T vmxnet3_txintr +ffffffff818b5fd0 T vmxnet3_init +ffffffff818b6380 T vmxnet3_rx_csum +ffffffff818b63e0 T vmxnet3_iff +ffffffff818b6520 T vmxnet3_stop +ffffffff818b67e0 T vmxnet3_reset +ffffffff818b6820 t vmx_kstat_create +ffffffff818b6a00 t vmx_kstat_read +ffffffff818b7000 T vmwpvs_match +ffffffff818b7040 T vmwpvs_attach +ffffffff818b7df0 T vmwpvs_scsi_cmd +ffffffff818b8260 T vmwpvs_intx +ffffffff818b82e0 T vmwpvs_msg_task +ffffffff818b8560 T vmwpvs_intr +ffffffff818b8740 T vmwpvs_get_config +ffffffff818b8940 T vmwpvs_dmamem_zalloc +ffffffff818b89a0 T vmwpvs_dmamem_alloc +ffffffff818b8b20 T vmwpvs_ccb_put +ffffffff818b8b80 T vmwpvs_setup_rings +ffffffff818b8cb0 T vmwpvs_setup_msg_ring +ffffffff818b8da0 T vmwpvs_ccb_get +ffffffff818b8e20 T vmwpvs_dmamem_free +ffffffff818b8ea0 T vmwpvs_cmd +ffffffff818b8f50 T vmwpvs_scsi_cmd_done +ffffffff818b9130 T vmwpvs_scsi_cmd_poll +ffffffff818ba000 T lii_match +ffffffff818ba030 T lii_attach +ffffffff818ba440 T lii_activate +ffffffff818ba540 T lii_reset +ffffffff818ba810 T lii_spi_configure +ffffffff818ba900 T lii_eeprom_present +ffffffff818ba990 T lii_eeprom_read +ffffffff818ba9c0 T lii_spi_read +ffffffff818bac80 T lii_read_macaddr +ffffffff818badf0 T lii_intr +ffffffff818baf00 T lii_alloc_rings +ffffffff818bb110 T lii_tick +ffffffff818bb160 T lii_mii_readreg +ffffffff818bb400 T lii_mii_writereg +ffffffff818bb6a0 T lii_mii_statchg +ffffffff818bb710 T lii_media_change +ffffffff818bb760 T lii_media_status +ffffffff818bb7c0 T lii_ioctl +ffffffff818bb950 T lii_start +ffffffff818bbb00 T lii_watchdog +ffffffff818bbb40 T lii_stop +ffffffff818bbbb0 T lii_init +ffffffff818bc0b0 T lii_iff +ffffffff818bc1f0 T lii_tx_put +ffffffff818bc300 T lii_free_tx_space +ffffffff818bc340 T lii_rxintr +ffffffff818bc4f0 T lii_txintr +ffffffff818bd000 T ichiic_match +ffffffff818bd030 T ichiic_attach +ffffffff818bd220 T ichiic_intr +ffffffff818bd330 T ichiic_i2c_acquire_bus +ffffffff818bd380 T ichiic_i2c_release_bus +ffffffff818bd3d0 T ichiic_i2c_exec +ffffffff818be000 T viapm_match +ffffffff818be030 T viapm_attach +ffffffff818be650 T viapm_intr +ffffffff818be760 T viapm_i2c_acquire_bus +ffffffff818be7b0 T viapm_i2c_release_bus +ffffffff818be800 T viapm_i2c_exec +ffffffff818beb20 T viapm_refresh_sensor_data +ffffffff818bee50 T viapm_refresh +ffffffff818bee80 T val_to_uK +ffffffff818bef20 T val_to_rpm +ffffffff818bef60 T val_to_uV +ffffffff818bf000 T viapm_get_timecount +ffffffff818c0000 T amdiic_match +ffffffff818c0030 T amdiic_attach +ffffffff818c0200 T amdiic_intr +ffffffff818c02d0 T amdiic_i2c_acquire_bus +ffffffff818c0320 T amdiic_i2c_release_bus +ffffffff818c0370 T amdiic_i2c_exec +ffffffff818c05d0 T amdiic_read +ffffffff818c0740 T amdiic_wait +ffffffff818c07e0 T amdiic_write +ffffffff818c1000 T nviic_match +ffffffff818c1030 T nviic_attach +ffffffff818c1280 T nviic_i2c_acquire_bus +ffffffff818c12d0 T nviic_i2c_release_bus +ffffffff818c1310 T nviic_i2c_exec +ffffffff818c1530 T nviic_write +ffffffff818c1580 T nviic_read +ffffffff818c2000 T sdhc_pci_match +ffffffff818c2060 T sdhc_pci_attach +ffffffff818c23a0 T sdhc_pci_activate +ffffffff818c2400 T sdhc_takecontroller +ffffffff818c24a0 T sdhc_ricohfix +ffffffff818c2610 T sdhc_pci_conf_write +ffffffff818c3000 T kate_match +ffffffff818c3170 T kate_attach +ffffffff818c3420 T kate_refresh +ffffffff818c4000 T km_match +ffffffff818c4050 T km_attach +ffffffff818c40f0 T km_refresh +ffffffff818c5000 T ksmn_match +ffffffff818c5050 T ksmn_attach +ffffffff818c5240 T ksmn_ccd_attach +ffffffff818c5390 T ksmn_refresh +ffffffff818c54e0 T ksmn_read_reg +ffffffff818c6000 t iosf_pci_match +ffffffff818c6060 t iosf_pci_attach +ffffffff818c6100 t iosf_pci_mbi_mdr_rd +ffffffff818c6160 t iosf_pci_mbi_mdr_wr +ffffffff818c7000 T itherm_probe +ffffffff818c7030 T itherm_attach +ffffffff818c7380 T itherm_activate +ffffffff818c7400 T itherm_enable +ffffffff818c7460 T itherm_refresh +ffffffff818c7470 T itherm_refresh_sensor_data +ffffffff818c7860 T itherm_bias_temperature_sensor +ffffffff818c8000 T pchtemp_match +ffffffff818c8030 T pchtemp_attach +ffffffff818c8190 T pchtemp_refresh +ffffffff818c9000 T rtsx_pci_match +ffffffff818c9090 T rtsx_pci_attach +ffffffff818ca000 T xspd_match +ffffffff818ca030 T xspd_attach +ffffffff818ca1f0 T xspd_intr +ffffffff818cb000 T virtio_pci_match +ffffffff818cb080 T virtio_pci_attach +ffffffff818cb420 T virtio_pci_detach +ffffffff818cb500 T virtio_pci_kick +ffffffff818cb560 T virtio_pci_read_device_config_1 +ffffffff818cb590 T virtio_pci_read_device_config_2 +ffffffff818cb5c0 T virtio_pci_read_device_config_4 +ffffffff818cb5f0 T virtio_pci_read_device_config_8 +ffffffff818cb670 T virtio_pci_write_device_config_1 +ffffffff818cb6a0 T virtio_pci_write_device_config_2 +ffffffff818cb6d0 T virtio_pci_write_device_config_4 +ffffffff818cb700 T virtio_pci_write_device_config_8 +ffffffff818cb770 T virtio_pci_read_queue_size +ffffffff818cb7e0 T virtio_pci_setup_queue +ffffffff818cbad0 T virtio_pci_set_status +ffffffff818cbb50 T virtio_pci_negotiate_features +ffffffff818cbc90 T virtio_pci_poll_intr +ffffffff818cbd00 T virtio_pci_find_cap +ffffffff818cbec0 T virtio_pci_attach_10 +ffffffff818cc300 T virtio_pci_attach_09 +ffffffff818cc440 T virtio_pci_adjust_config_region +ffffffff818cc4e0 T virtio_pci_setup_msix +ffffffff818cc870 T virtio_pci_legacy_intr +ffffffff818cc910 T virtio_pci_legacy_intr_mpsafe +ffffffff818cc9a0 T virtio_pci_free_irqs +ffffffff818ccbf0 T virtio_pci_negotiate_features_10 +ffffffff818cce30 T virtio_pci_msix_establish +ffffffff818ccf00 T virtio_pci_set_msix_queue_vector +ffffffff818ccf80 T virtio_pci_set_msix_config_vector +ffffffff818ccfc0 T virtio_pci_config_intr +ffffffff818cd000 T virtio_pci_shared_queue_intr +ffffffff818cd010 T virtio_pci_queue_intr +ffffffff818ce000 T dwiic_pci_match +ffffffff818ce030 T dwiic_pci_attach +ffffffff818ce350 T dwiic_pci_activate +ffffffff818ce3c0 T dwiic_pci_bus_scan +ffffffff818cf000 T bwfm_pci_buscore_read +ffffffff818cf060 T bwfm_pci_buscore_write +ffffffff818cf0d0 T bwfm_pci_buscore_prepare +ffffffff818cf100 T bwfm_pci_buscore_reset +ffffffff818cf2f0 T bwfm_pci_buscore_activate +ffffffff818cf320 T bwfm_pci_preinit +ffffffff818d0440 T bwfm_pci_stop +ffffffff818d04d0 T bwfm_pci_txcheck +ffffffff818d0590 T bwfm_pci_txdata +ffffffff818d08f0 T bwfm_pci_msgbuf_query_dcmd +ffffffff818d0d30 T bwfm_pci_msgbuf_set_dcmd +ffffffff818d0d80 T bwfm_pci_match +ffffffff818d0db0 T bwfm_pci_attach +ffffffff818d1020 T bwfm_pci_detach +ffffffff818d1060 T bwfm_pci_activate +ffffffff818d1210 T bwfm_pci_intr +ffffffff818d1470 T bwfm_pci_select_core +ffffffff818d1550 T bwfm_pci_load_microcode +ffffffff818d19d0 T bwfm_pci_dmamem_alloc +ffffffff818d1b70 T bwfm_pci_setup_ring +ffffffff818d1d80 T bwfm_pci_intr_enable +ffffffff818d1dd0 T bwfm_pci_hostready +ffffffff818d1e40 T bwfm_pci_fill_rx_rings +ffffffff818d1e90 T bwfm_pci_dmamem_free +ffffffff818d1f00 T bwfm_pci_cleanup +ffffffff818d2570 T bwfm_pci_send_mb_data +ffffffff818d2690 T bwfm_pci_intmask +ffffffff818d26d0 T bwfm_pci_pktid_avail +ffffffff818d2740 T bwfm_pci_pktid_new +ffffffff818d28a0 T bwfm_pci_pktid_free +ffffffff818d2950 T bwfm_pci_fill_rx_buf_ring +ffffffff818d2cb0 T bwfm_pci_fill_rx_ioctl_ring +ffffffff818d3030 T bwfm_pci_ring_write_reserve +ffffffff818d3120 T bwfm_pci_ring_write_cancel +ffffffff818d3160 T bwfm_pci_ring_write_commit +ffffffff818d3240 T bwfm_pci_ring_write_rptr +ffffffff818d32c0 T bwfm_pci_ring_write_wptr +ffffffff818d3340 T bwfm_pci_setup_flowring +ffffffff818d34a0 T bwfm_pci_ring_bell +ffffffff818d34e0 T bwfm_pci_ring_update_rptr +ffffffff818d3590 T bwfm_pci_ring_update_wptr +ffffffff818d3640 T bwfm_pci_ring_write_reserve_multi +ffffffff818d3760 T bwfm_pci_ring_read_avail +ffffffff818d3860 T bwfm_pci_ring_read_commit +ffffffff818d38f0 T bwfm_pci_ring_rx +ffffffff818d3b00 T bwfm_pci_msg_rx +ffffffff818d40e0 T bwfm_pci_flowring_delete_cb +ffffffff818d4190 T bwfm_pci_msgbuf_rxioctl +ffffffff818d4280 T bwfm_pci_intr_status +ffffffff818d42c0 T bwfm_pci_intr_ack +ffffffff818d4300 T bwfm_pci_flowring_lookup +ffffffff818d4470 T bwfm_pci_flowring_create +ffffffff818d45a0 T bwfm_pci_flowring_create_cb +ffffffff818d48f0 T bwfm_pci_flowring_delete +ffffffff818d4bc0 T bwfm_pci_msgbuf_h2d_mb_write +ffffffff818d4de0 T bwfm_pci_handle_mb_data +ffffffff818d4eb0 T bwfm_pci_intr_disable +ffffffff818d5000 T ccp_pci_match +ffffffff818d5030 T ccp_pci_attach +ffffffff818d6000 T bnxt_match +ffffffff818d6030 T bnxt_attach +ffffffff818d72a0 T bnxt_dmamem_alloc +ffffffff818d7430 T bnxt_dmamem_free +ffffffff818d74c0 T bnxt_hwrm_ver_get +ffffffff818d7610 T bnxt_hwrm_nvm_get_dev_info +ffffffff818d7760 T bnxt_hwrm_func_drv_rgtr +ffffffff818d7880 T bnxt_hwrm_func_rgtr_async_events +ffffffff818d79a0 T bnxt_hwrm_func_qcaps +ffffffff818d7a80 T bnxt_admin_intr +ffffffff818d7c80 T bnxt_intr +ffffffff818d8150 T bnxt_hwrm_func_qcfg +ffffffff818d8200 T bnxt_hwrm_queue_qportcfg +ffffffff818d82d0 T bnxt_hwrm_func_reset +ffffffff818d8380 T bnxt_mark_cpr_invalid +ffffffff818d83e0 T bnxt_hwrm_ring_alloc +ffffffff818d8590 T bnxt_cfg_async_cr +ffffffff818d8690 T bnxt_write_cp_doorbell +ffffffff818d86d0 T bnxt_set_cp_ring_aggint +ffffffff818d87b0 T bnxt_ioctl +ffffffff818d8940 T bnxt_start +ffffffff818d8d00 T bnxt_watchdog +ffffffff818d8d30 T bnxt_media_change +ffffffff818d8e80 T bnxt_media_status +ffffffff818d8ea0 T bnxt_refill +ffffffff818d8f00 T bnxt_media_autonegotiate +ffffffff818d8ff0 T bnxt_hwrm_port_phy_qcfg +ffffffff818d9490 T bnxt_free_slots +ffffffff818d9520 T bnxt_hwrm_cmd_hdr_init +ffffffff818d9570 T hwrm_send_message +ffffffff818d95f0 T bnxt_queue_up +ffffffff818da520 T bnxt_hwrm_stat_ctx_alloc +ffffffff818da620 T bnxt_write_tx_doorbell +ffffffff818da690 T bnxt_write_rx_doorbell +ffffffff818da710 T bnxt_hwrm_ring_grp_alloc +ffffffff818da810 T bnxt_rx_fill +ffffffff818da920 T bnxt_hwrm_ring_grp_free +ffffffff818daa00 T bnxt_hwrm_ring_free +ffffffff818daaf0 T bnxt_hwrm_stat_ctx_free +ffffffff818dabe0 T bnxt_queue_down +ffffffff818db2c0 T bnxt_up +ffffffff818db990 T bnxt_hwrm_vnic_ctx_alloc +ffffffff818dba70 T bnxt_hwrm_vnic_alloc +ffffffff818dbb70 T bnxt_hwrm_vnic_cfg +ffffffff818dbcb0 T bnxt_hwrm_vnic_cfg_placement +ffffffff818dbd80 T bnxt_hwrm_set_filter +ffffffff818dbf10 T bnxt_hwrm_vnic_rss_cfg +ffffffff818dbff0 T bnxt_iff +ffffffff818dc160 T bnxt_hwrm_vnic_free +ffffffff818dc250 T bnxt_hwrm_vnic_ctx_free +ffffffff818dc340 T bnxt_down +ffffffff818dc6e0 T bnxt_hwrm_free_filter +ffffffff818dc7c0 T bnxt_hwrm_cfa_l2_set_rx_mask +ffffffff818dc8a0 T bnxt_rxrinfo +ffffffff818dc9f0 T bnxt_get_sffpage +ffffffff818dcd00 T bnxt_load_mbuf +ffffffff818dcdb0 T bnxt_handle_async_event +ffffffff818dce00 T bnxt_cpr_next_cmpl +ffffffff818dce70 T bnxt_cpr_commit +ffffffff818dcea0 T bnxt_cpr_rollback +ffffffff818dced0 T bnxt_write_cp_doorbell_index +ffffffff818dcf50 T bnxt_rx +ffffffff818dd230 T bnxt_txeof +ffffffff818dd360 T bnxt_get_media_type +ffffffff818dd8c0 T bnxt_add_media_type +ffffffff818dda90 T _hwrm_send_message +ffffffff818e0940 T bnxt_rx_fill_slots +ffffffff818e0b00 T bnxt_hwrm_err_map +ffffffff818e0b40 T _bnxt_hwrm_set_async_event_bit +ffffffff818e1000 t mcx_match +ffffffff818e1030 t mcx_attach +ffffffff818e4110 T mcx_rx_fill +ffffffff818e4360 T mcx_load_mbuf +ffffffff818e4410 t mcx_dmamem_alloc +ffffffff818e4570 t mcx_pages +ffffffff818e4e50 t mcx_iff +ffffffff818e5290 t mcx_alloc_uar +ffffffff818e5480 t mcx_admin_intr +ffffffff818e5630 t mcx_create_eq +ffffffff818e5bc0 t mcx_ioctl +ffffffff818e66a0 t mcx_start +ffffffff818e6ba0 t mcx_watchdog +ffffffff818e6bd0 t mcx_media_change +ffffffff818e6e90 t mcx_media_status +ffffffff818e6fd0 t mcx_refill +ffffffff818e7040 t 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igc_update_mc_addr_list +ffffffff8190c310 T igc_check_for_link +ffffffff8190c350 T igc_reset_hw +ffffffff8190c390 T igc_init_hw +ffffffff8190c3d0 T igc_get_speed_and_duplex +ffffffff8190c410 T igc_rar_set +ffffffff8190c450 T igc_check_reset_block +ffffffff8190c490 T igc_get_phy_info +ffffffff8190c4d0 T igc_phy_hw_reset +ffffffff8190c510 T igc_read_mac_addr +ffffffff8190c540 T igc_validate_nvm_checksum +ffffffff8190d000 T igc_acquire_phy_base +ffffffff8190d030 T igc_release_phy_base +ffffffff8190d060 T igc_init_hw_base +ffffffff8190d160 T igc_power_down_phy_copper_base +ffffffff8190e000 T igc_init_nvm_params_i225 +ffffffff8190e180 T igc_acquire_nvm_i225 +ffffffff8190e250 T igc_release_nvm_i225 +ffffffff8190e2c0 T igc_get_flash_presence_i225 +ffffffff8190e310 T igc_read_nvm_srrd_i225 +ffffffff8190e3f0 T igc_write_nvm_srwr_i225 +ffffffff8190e5c0 T igc_validate_nvm_checksum_i225 +ffffffff8190e650 T igc_update_nvm_checksum_i225 +ffffffff8190e7f0 T igc_init_mac_params_i225 +ffffffff8190e8b0 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igc_check_alt_mac_addr_generic +ffffffff81910440 T igc_hash_mc_addr_generic +ffffffff819104e0 T igc_update_mc_addr_list_generic +ffffffff81910650 T igc_clear_hw_cntrs_base_generic +ffffffff81910a40 T igc_setup_link_generic +ffffffff81910bd0 T igc_set_fc_watermarks_generic +ffffffff81910c80 T igc_force_mac_fc_generic +ffffffff81910d40 T igc_config_fc_after_link_up_generic +ffffffff81910f60 T igc_get_speed_and_duplex_copper_generic +ffffffff81911000 T igc_put_hw_semaphore_generic +ffffffff81911050 T igc_get_auto_rd_done_generic +ffffffff819112a0 T igc_disable_pcie_master_generic +ffffffff81912000 T igc_init_nvm_ops_generic +ffffffff81912080 T igc_null_read_nvm +ffffffff819120b0 T igc_null_nvm_generic +ffffffff819120e0 T igc_reload_nvm_generic +ffffffff81912160 T igc_null_write_nvm +ffffffff81912190 T igc_poll_eerd_eewr_done +ffffffff81912230 T igc_read_nvm_eerd +ffffffff81912360 T igc_read_mac_addr_generic +ffffffff81912440 T igc_validate_nvm_checksum_generic +ffffffff81913000 T igc_init_phy_ops_generic +ffffffff819130f0 T igc_null_set_page +ffffffff81913120 T igc_null_read_reg +ffffffff81913150 T igc_null_phy_generic +ffffffff81913180 T igc_null_lplu_state +ffffffff819131b0 T igc_null_write_reg +ffffffff819131e0 T igc_check_reset_block_generic +ffffffff81913240 T igc_get_phy_id +ffffffff819132f0 T igc_read_phy_reg_mdic +ffffffff81913400 T igc_write_phy_reg_mdic +ffffffff81913500 T igc_phy_setup_autoneg +ffffffff81913700 T igc_copper_link_autoneg +ffffffff81913850 T igc_wait_autoneg +ffffffff81913920 T igc_setup_copper_link_generic +ffffffff81913a30 T igc_phy_has_link_generic +ffffffff81913b50 T igc_check_downshift_generic +ffffffff81913b80 T igc_phy_hw_reset_generic +ffffffff81913d20 T igc_power_up_phy_copper +ffffffff81913db0 T igc_power_down_phy_copper +ffffffff81913e40 T igc_write_phy_reg_gpy +ffffffff81914030 T igc_write_xmdio_reg +ffffffff81914130 T igc_read_phy_reg_gpy +ffffffff81914330 T igc_read_xmdio_reg +ffffffff81914420 T __igc_access_xmdio_reg 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drm_atomic_add_encoder_bridges +ffffffff819283e0 T drm_atomic_add_affected_connectors +ffffffff81928510 T drm_atomic_add_affected_planes +ffffffff81928630 T drm_atomic_check_only +ffffffff819290e0 T drm_atomic_commit +ffffffff819291b0 T drm_atomic_print_new_state +ffffffff819293b0 T drm_atomic_nonblocking_commit +ffffffff81929450 T __drm_atomic_helper_disable_plane +ffffffff819294d0 T __drm_atomic_helper_set_config +ffffffff81929850 t drm_atomic_plane_print_state +ffffffff81929a70 t drm_atomic_crtc_print_state +ffffffff81929cd0 t drm_atomic_connector_print_state +ffffffff81929de0 T drm_state_dump +ffffffff8192a000 T drm_atomic_helper_check_modeset +ffffffff8192af30 t handle_conflicting_encoders +ffffffff8192b220 T drm_atomic_helper_check_wb_encoder_state +ffffffff8192b280 T drm_atomic_helper_check_plane_state +ffffffff8192b630 T drm_atomic_helper_check_crtc_state +ffffffff8192b6e0 T drm_atomic_helper_check_planes +ffffffff8192b990 T drm_atomic_helper_check +ffffffff8192ba40 T drm_atomic_helper_async_check +ffffffff8192bd60 T drm_atomic_helper_update_legacy_modeset_state +ffffffff8192bfd0 T drm_atomic_helper_calc_timestamping_constants +ffffffff8192c070 T drm_atomic_helper_commit_modeset_disables +ffffffff8192c6c0 T drm_atomic_helper_commit_modeset_enables +ffffffff8192c9b0 T drm_atomic_helper_wait_for_fences +ffffffff8192cab0 T drm_atomic_helper_wait_for_vblanks +ffffffff8192ce20 T drm_atomic_helper_wait_for_flip_done +ffffffff8192cfe0 T drm_atomic_helper_commit_tail +ffffffff8192d170 T drm_atomic_helper_commit_planes +ffffffff8192d430 T drm_atomic_helper_fake_vblank +ffffffff8192d510 T drm_atomic_helper_commit_hw_done +ffffffff8192d6d0 T drm_atomic_helper_cleanup_planes +ffffffff8192d780 T drm_atomic_helper_commit_tail_rpm +ffffffff8192d910 T drm_atomic_helper_async_commit +ffffffff8192dba0 T drm_atomic_helper_commit +ffffffff8192de60 T drm_atomic_helper_prepare_planes +ffffffff8192e010 T drm_atomic_helper_setup_commit +ffffffff8192e8a0 t commit_work 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drm_atomic_helper_bridge_propagate_bus_fmt +ffffffff81930880 t set_best_encoder +ffffffff81931000 T __drm_atomic_helper_crtc_state_reset +ffffffff81931030 T __drm_atomic_helper_crtc_reset +ffffffff81931090 T drm_atomic_helper_crtc_reset +ffffffff81931130 T __drm_atomic_helper_crtc_duplicate_state +ffffffff81931200 T drm_atomic_helper_crtc_duplicate_state +ffffffff819312a0 T __drm_atomic_helper_crtc_destroy_state +ffffffff81931360 T drm_atomic_helper_crtc_destroy_state +ffffffff81931390 T __drm_atomic_helper_plane_state_reset +ffffffff81931460 T __drm_atomic_helper_plane_reset +ffffffff819314c0 T drm_atomic_helper_plane_reset +ffffffff819315a0 T __drm_atomic_helper_plane_destroy_state +ffffffff81931610 T __drm_atomic_helper_plane_duplicate_state +ffffffff81931690 T drm_atomic_helper_plane_duplicate_state +ffffffff81931760 T drm_atomic_helper_plane_destroy_state +ffffffff819317e0 T __drm_atomic_helper_connector_state_reset +ffffffff81931810 T __drm_atomic_helper_connector_reset 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drm_atomic_get_property +ffffffff81932f80 T drm_atomic_connector_commit_dpms +ffffffff819330e0 T drm_atomic_set_property +ffffffff81933b90 T drm_mode_atomic_ioctl +ffffffff81935000 T drm_is_current_master +ffffffff81935060 T drm_getmagic +ffffffff81935130 T drm_authmagic +ffffffff819351f0 T drm_master_create +ffffffff81935290 T drm_setmaster_ioctl +ffffffff81935350 t drm_new_set_master +ffffffff819354e0 T drm_dropmaster_ioctl +ffffffff81935630 T drm_master_open +ffffffff819356e0 T drm_master_get +ffffffff81935710 T drm_master_release +ffffffff81935860 T drm_master_put +ffffffff819358f0 T drm_file_get_master +ffffffff81935950 T drm_master_internal_acquire +ffffffff819359c0 T drm_master_internal_release +ffffffff81936000 T drm_plane_create_alpha_property +ffffffff819360a0 T drm_plane_create_rotation_property +ffffffff819361e0 T drm_rotation_simplify +ffffffff81936260 T drm_plane_create_zpos_property +ffffffff81936320 T drm_plane_create_zpos_immutable_property +ffffffff819363d0 T drm_atomic_normalize_zpos +ffffffff819366d0 T drm_plane_create_blend_mode_property +ffffffff81936870 t drm_atomic_state_zpos_cmp +ffffffff81937000 T drm_bridge_add +ffffffff81937070 T devm_drm_bridge_add +ffffffff81937110 T drm_bridge_remove +ffffffff81937170 T drm_bridge_attach +ffffffff819372f0 T drm_bridge_detach +ffffffff819373e0 T drm_bridge_chain_mode_fixup +ffffffff81937480 T drm_bridge_chain_mode_valid +ffffffff81937520 T drm_bridge_chain_disable +ffffffff819375b0 T drm_bridge_chain_post_disable +ffffffff81937630 T drm_bridge_chain_mode_set +ffffffff819376c0 T drm_bridge_chain_pre_enable +ffffffff81937750 T drm_bridge_chain_enable +ffffffff819377d0 T drm_atomic_bridge_chain_disable +ffffffff819378d0 T drm_atomic_bridge_chain_post_disable +ffffffff81937b00 T drm_atomic_bridge_chain_pre_enable +ffffffff81937d40 T drm_atomic_bridge_chain_enable +ffffffff81937e50 T drm_atomic_bridge_chain_check +ffffffff819381b0 T drm_bridge_detect +ffffffff81938210 T drm_bridge_get_modes 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drm_memcpy_from_wc +ffffffff8193b710 T drm_memcpy_init_early +ffffffff8193c000 T drm_client_init +ffffffff8193c110 T drm_client_register +ffffffff8193c1c0 T drm_client_release +ffffffff8193c260 T drm_client_dev_unregister +ffffffff8193c350 T drm_client_dev_hotplug +ffffffff8193c430 T drm_client_dev_restore +ffffffff8193c510 T drm_client_buffer_vmap +ffffffff8193c580 T drm_client_buffer_vunmap +ffffffff8193c5a0 T drm_client_framebuffer_create +ffffffff8193c880 T drm_client_framebuffer_delete +ffffffff8193c980 T drm_client_framebuffer_flush +ffffffff8193d000 T drm_client_modeset_create +ffffffff8193d140 T drm_client_modeset_free +ffffffff8193d260 T drm_client_modeset_probe +ffffffff8193ea50 t drm_client_pick_crtcs +ffffffff8193ed40 T drm_client_rotation +ffffffff8193eee0 T drm_client_modeset_check +ffffffff8193ef80 t drm_client_modeset_commit_atomic +ffffffff8193f180 T drm_client_modeset_commit_locked +ffffffff8193f320 T drm_client_modeset_commit +ffffffff8193f390 T drm_client_modeset_dpms +ffffffff8193f5e0 t drm_connector_pick_cmdline_mode +ffffffff81940000 T drm_color_ctm_s31_32_to_qm_n +ffffffff819400e0 T drm_crtc_enable_color_mgmt +ffffffff819401c0 T drm_mode_crtc_set_gamma_size +ffffffff819402e0 T drm_mode_gamma_set_ioctl +ffffffff819407d0 T drm_mode_gamma_get_ioctl +ffffffff81940910 T drm_get_color_encoding_name +ffffffff81940980 T drm_get_color_range_name +ffffffff819409f0 T drm_plane_create_color_properties +ffffffff81940c50 T drm_color_lut_check +ffffffff81941000 T drm_connector_ida_init +ffffffff81941110 T drm_connector_ida_destroy +ffffffff81941220 T drm_get_connector_type_name +ffffffff81941260 T drm_connector_free_work_fn +ffffffff81941320 T drm_connector_init +ffffffff819413a0 t __drm_connector_init +ffffffff819418b0 T drm_connector_init_with_ddc +ffffffff81941940 T drmm_connector_init +ffffffff81941a00 t drm_connector_cleanup_action +ffffffff81941a20 T drm_connector_attach_edid_property +ffffffff81941a40 T drm_connector_attach_encoder +ffffffff81941ac0 T drm_connector_has_possible_encoder +ffffffff81941b00 T drm_connector_cleanup +ffffffff81941e30 T drm_connector_unregister +ffffffff81941ed0 T drm_mode_put_tile_group +ffffffff81941f60 T drm_connector_register +ffffffff81942050 T drm_connector_unregister_all +ffffffff819421f0 T drm_connector_list_iter_begin +ffffffff81942230 T drm_connector_list_iter_next +ffffffff81942340 T drm_connector_list_iter_end +ffffffff81942410 T drm_connector_register_all +ffffffff819425a0 T drm_get_connector_status_name +ffffffff819425f0 T drm_get_connector_force_name +ffffffff81942630 T drm_get_subpixel_order_name +ffffffff81942670 T drm_get_dpms_name +ffffffff819426b0 T drm_display_info_set_bus_formats +ffffffff81942780 T drm_get_dvi_i_select_name +ffffffff819427e0 T drm_get_dvi_i_subconnector_name +ffffffff81942840 T drm_get_tv_select_name +ffffffff819428a0 T drm_get_tv_subconnector_name +ffffffff81942900 T drm_get_dp_subconnector_name +ffffffff81942990 T drm_connector_create_standard_properties +ffffffff81942b10 T drm_mode_create_dvi_i_properties +ffffffff81942bb0 T drm_connector_attach_dp_subconnector_property +ffffffff81942c20 T drm_connector_attach_content_type_property +ffffffff81942cc0 T drm_mode_create_content_type_property +ffffffff81942d40 T drm_connector_attach_tv_margin_properties +ffffffff81942db0 T drm_mode_create_tv_margin_properties +ffffffff81942ed0 T drm_mode_create_tv_properties +ffffffff81943130 T drm_mode_create_scaling_mode_property +ffffffff819431a0 T drm_connector_attach_vrr_capable_property +ffffffff81943230 T drm_connector_attach_scaling_mode_property +ffffffff81943400 T drm_mode_create_aspect_ratio_property +ffffffff81943480 T drm_mode_create_hdmi_colorspace_property +ffffffff81943500 T drm_mode_create_dp_colorspace_property +ffffffff81943580 T drm_mode_create_suggested_offset_properties +ffffffff81943650 T drm_connector_set_path_property +ffffffff819436b0 T drm_connector_set_tile_property +ffffffff81943800 T drm_connector_set_link_status_property +ffffffff81943850 T drm_connector_attach_max_bpc_property +ffffffff81943910 T drm_connector_attach_hdr_output_metadata_property +ffffffff81943960 T drm_connector_attach_colorspace_property +ffffffff819439b0 T drm_connector_atomic_hdr_metadata_equal +ffffffff81943a20 T drm_connector_set_vrr_capable_property +ffffffff81943a70 T drm_connector_set_panel_orientation +ffffffff81943b30 T drm_connector_set_panel_orientation_with_quirk +ffffffff81943c10 T drm_connector_set_orientation_from_panel +ffffffff81943d00 T drm_connector_create_privacy_screen_properties +ffffffff81943da0 T drm_connector_attach_privacy_screen_properties +ffffffff81943e10 T drm_connector_attach_privacy_screen_provider +ffffffff81943f20 t drm_connector_privacy_screen_notifier +ffffffff81943fc0 T drm_connector_update_privacy_screen +ffffffff81944030 T drm_connector_set_obj_prop +ffffffff81944110 T drm_connector_property_set_ioctl +ffffffff81944170 T drm_mode_getconnector +ffffffff819446b0 T drm_connector_find_by_fwnode +ffffffff81944760 T drm_connector_oob_hotplug_event +ffffffff81944850 T drm_mode_get_tile_group +ffffffff81944920 T drm_mode_create_tile_group +ffffffff819449f0 t drm_connector_free +ffffffff81944a30 t kasprintf +ffffffff81945000 T drm_crtc_from_index +ffffffff81945060 T drm_crtc_force_disable +ffffffff81945180 T drm_mode_set_config_internal +ffffffff81945200 T drm_crtc_register_all +ffffffff81945290 T drm_crtc_unregister_all +ffffffff81945300 T drm_crtc_create_fence +ffffffff81945390 T drm_crtc_init_with_planes +ffffffff81945460 t __drm_crtc_init_with_planes +ffffffff81945850 T drmm_crtc_init_with_planes +ffffffff81945950 T __drmm_crtc_alloc_with_planes +ffffffff81945ac0 T drm_crtc_cleanup +ffffffff81945be0 T drm_mode_getcrtc +ffffffff81945d80 t __drm_mode_set_config_internal +ffffffff81945f20 T drm_crtc_check_viewport +ffffffff81945fd0 T drm_mode_setcrtc +ffffffff81946730 T drm_mode_crtc_set_obj_prop +ffffffff819467b0 T drm_crtc_create_scaling_filter_property +ffffffff81946820 t drm_crtc_fence_get_driver_name +ffffffff819468a0 t drm_crtc_fence_get_timeline_name +ffffffff81946910 t kasprintf +ffffffff819469e0 t drmm_crtc_init_with_planes_cleanup +ffffffff81947000 T drm_helper_encoder_in_use +ffffffff81947180 T drm_helper_crtc_in_use +ffffffff819472b0 T drm_helper_disable_unused_functions +ffffffff81947330 t __drm_helper_disable_unused_functions +ffffffff81947430 T drm_crtc_helper_set_mode +ffffffff819478e0 T drm_connector_get_single_encoder +ffffffff819479e0 T drm_crtc_helper_set_config +ffffffff81948600 T drm_helper_connector_dpms +ffffffff819488f0 T drm_helper_resume_force_mode +ffffffff81948be0 T drm_helper_force_disable_all +ffffffff81948cb0 t drm_encoder_disable +ffffffff81949000 T drm_atomic_helper_check_plane_damage +ffffffff819490a0 T drm_atomic_helper_dirtyfb +ffffffff81949350 T drm_atomic_helper_damage_iter_init +ffffffff819494a0 T drm_atomic_helper_damage_iter_next +ffffffff81949540 T drm_atomic_helper_damage_merged +ffffffff8194a000 T displayid_iter_edid_begin +ffffffff8194a050 T __displayid_iter_next +ffffffff8194a310 T displayid_iter_end +ffffffff8194b000 T drm_mode_create_dumb +ffffffff8194b0c0 T drm_mode_create_dumb_ioctl +ffffffff8194b180 T drm_mode_mmap_dumb_ioctl +ffffffff8194b1f0 T drm_mode_destroy_dumb +ffffffff8194b260 T drm_mode_destroy_dumb_ioctl +ffffffff8194c000 T drm_edid_header_is_valid +ffffffff8194c080 T drm_edid_are_equal +ffffffff8194c0f0 T drm_edid_block_valid +ffffffff8194c300 t edid_block_check +ffffffff8194c430 t edid_block_status_print +ffffffff8194c530 T drm_edid_is_valid +ffffffff8194c5b0 T drm_edid_override_set +ffffffff8194c620 T drm_connector_update_edid_property +ffffffff8194c7d0 T drm_edid_override_reset +ffffffff8194c900 T drm_add_override_edid_modes +ffffffff8194cae0 T drm_add_edid_modes +ffffffff8194cbd0 T drm_do_get_edid +ffffffff8194cbf0 t _drm_do_get_edid +ffffffff8194d100 T drm_edid_raw +ffffffff8194d190 T drm_edid_alloc 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drm_default_rgb_quant_range +ffffffff8194f030 T drm_edid_connector_update +ffffffff8194f090 t _drm_edid_connector_update +ffffffff81950f40 t _drm_update_tile_info +ffffffff819511d0 t _drm_edid_connector_property_update +ffffffff81951380 T drm_add_modes_noedid +ffffffff81951470 T drm_set_preferred_mode +ffffffff819514d0 T drm_hdmi_avi_infoframe_from_display_mode +ffffffff81951750 T drm_hdmi_avi_infoframe_quant_range +ffffffff819517f0 T drm_hdmi_vendor_infoframe_from_display_mode +ffffffff819518b0 t connector_bad_edid +ffffffff81951a70 t drm_for_each_detailed_block +ffffffff81951cc0 t __cea_db_iter_next +ffffffff81951f60 t update_display_info +ffffffff81952de0 t get_monitor_range +ffffffff81952e80 t do_detailed_mode +ffffffff819537a0 t hdmi_mode_alternate_clock +ffffffff81953850 t do_cvt_mode +ffffffff81953aa0 t drm_mode_std +ffffffff819547b0 t do_standard_modes +ffffffff81954900 t drm_monitor_supports_rb +ffffffff81954bf0 t drm_gtf2_hbreak +ffffffff81954e80 t do_established_modes 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drm_fb_helper_restore_fbdev_mode_unlocked +ffffffff81958310 T drm_fb_helper_blank +ffffffff819583a0 T drm_fb_helper_prepare +ffffffff81958480 t drm_fb_helper_resume_worker +ffffffff819584b0 t drm_fb_helper_damage_work +ffffffff81958830 T drm_fb_helper_init +ffffffff819588a0 T drm_fb_helper_alloc_fbi +ffffffff81958900 T drm_fb_helper_unregister_fbi +ffffffff81958930 T drm_fb_helper_fini +ffffffff81958a30 T drm_fb_helper_set_suspend +ffffffff81958a60 T drm_fb_helper_set_suspend_unlocked +ffffffff81958a90 T drm_fb_helper_set_par +ffffffff81958b80 T drm_fb_helper_pan_display +ffffffff81958c50 T drm_fb_helper_fill_info +ffffffff81958d10 T drm_fb_helper_initial_config +ffffffff81958d40 t __drm_fb_helper_initial_config_and_unlock +ffffffff81959290 T drm_fb_helper_hotplug_event +ffffffff81959490 t drm_setup_crtcs_fb +ffffffff819595d0 T drm_fb_helper_lastclose +ffffffff81959680 T drm_fb_helper_output_poll_changed +ffffffff819596a0 T drm_fbdev_generic_setup +ffffffff81959820 t drm_fbdev_client_unregister +ffffffff81959890 t drm_fbdev_client_restore +ffffffff81959930 t drm_fbdev_client_hotplug +ffffffff81959b60 t drm_fbdev_cleanup +ffffffff81959c00 t drm_fbdev_use_shadow_fb +ffffffff81959c50 t drm_fb_helper_generic_probe +ffffffff8195a000 T drm_dev_needs_global_mutex +ffffffff8195a060 T drm_file_alloc +ffffffff8195a2c0 T drm_file_free +ffffffff8195a4f0 T drm_lastclose +ffffffff8195a560 T drm_release +ffffffff8195a5b0 T drm_release_noglobal +ffffffff8195a600 T drm_read +ffffffff8195a650 T drm_event_reserve_init_locked +ffffffff8195a6d0 T drm_event_reserve_init +ffffffff8195a790 T drm_event_cancel_free +ffffffff8195a810 T drm_send_event_timestamp_locked +ffffffff8195a820 t drm_send_event_helper +ffffffff8195a9f0 T drm_send_event_locked +ffffffff8195aa10 T drm_send_event +ffffffff8195aa60 T mock_drm_getfile +ffffffff8195b000 T drm_flip_work_allocate_task +ffffffff8195b060 T drm_flip_work_queue_task +ffffffff8195b0b0 T drm_flip_work_queue +ffffffff8195b150 T drm_flip_work_commit +ffffffff8195b1d0 T drm_flip_work_init +ffffffff8195b240 t flip_worker +ffffffff8195b320 T drm_flip_work_cleanup +ffffffff8195c000 T drm_fb_clip_offset +ffffffff8195c040 T drm_fb_memcpy +ffffffff8195c2c0 T drm_fb_swab +ffffffff8195c3c0 t drm_fb_swab32_line +ffffffff8195c420 t drm_fb_swab16_line +ffffffff8195c480 t drm_fb_xfrm +ffffffff8195c740 T drm_fb_xrgb8888_to_rgb332 +ffffffff8195c7a0 t drm_fb_xrgb8888_to_rgb332_line +ffffffff8195c890 T drm_fb_xrgb8888_to_rgb565 +ffffffff8195c910 t drm_fb_xrgb8888_to_rgb565_swab_line +ffffffff8195c990 t drm_fb_xrgb8888_to_rgb565_line +ffffffff8195ca80 T drm_fb_xrgb8888_to_rgb888 +ffffffff8195cae0 t drm_fb_xrgb8888_to_rgb888_line +ffffffff8195cb70 T drm_fb_xrgb8888_to_xrgb2101010 +ffffffff8195cbd0 t drm_fb_xrgb8888_to_xrgb2101010_line +ffffffff8195cc50 T drm_fb_xrgb8888_to_gray8 +ffffffff8195ccb0 t drm_fb_xrgb8888_to_gray8_line +ffffffff8195cd30 T drm_fb_blit +ffffffff8195d180 T drm_fb_xrgb8888_to_mono +ffffffff8195d510 T drm_fb_build_fourcc_list +ffffffff8195d830 t drm_fb_rgb888_to_xrgb8888_line +ffffffff8195d900 t drm_fb_rgb565_to_xrgb8888_line +ffffffff8195e000 T drm_mode_legacy_fb_format +ffffffff8195e0f0 T drm_driver_legacy_fb_format +ffffffff8195e1f0 T __drm_format_info +ffffffff8195e270 T drm_format_info +ffffffff8195e330 T drm_get_format_info +ffffffff8195e410 T drm_format_info_block_width +ffffffff8195e460 T drm_format_info_block_height +ffffffff8195e4b0 T drm_format_info_bpp +ffffffff8195e530 T drm_format_info_min_pitch +ffffffff8195f000 T drm_framebuffer_check_src_coords +ffffffff8195f120 T drm_mode_addfb +ffffffff8195f330 T drm_mode_addfb2 +ffffffff8195f420 T drm_mode_addfb_ioctl +ffffffff8195f440 T drm_internal_framebuffer_create +ffffffff8195f960 T drm_mode_addfb2_ioctl +ffffffff8195fa50 T drm_mode_rmfb +ffffffff8195fc20 T drm_framebuffer_lookup +ffffffff8195fc70 t drm_mode_rmfb_work_fn +ffffffff8195fd30 T drm_mode_rmfb_ioctl +ffffffff8195fd50 T drm_mode_getfb +ffffffff8195feb0 T drm_mode_getfb2_ioctl +ffffffff81960260 T drm_mode_dirtyfb_ioctl +ffffffff81960400 T drm_fb_release +ffffffff81960510 T drm_framebuffer_free +ffffffff81960550 T drm_framebuffer_init +ffffffff819606b0 T drm_framebuffer_unregister_private +ffffffff819606f0 T drm_framebuffer_cleanup +ffffffff81960750 T drm_framebuffer_remove +ffffffff81960c00 T drm_framebuffer_plane_width +ffffffff81960c50 T drm_framebuffer_plane_height +ffffffff81960ca0 T drm_framebuffer_print_info +ffffffff81961000 T drm_ref +ffffffff81961030 T drm_unref +ffffffff819610b0 T drm_fault +ffffffff81961270 T drm_flush +ffffffff819612a0 T udv_attach_drm +ffffffff819614c0 T drm_gem_init +ffffffff81961570 t drm_gem_init_release +ffffffff81961590 T drm_gem_object_init +ffffffff819616f0 T drm_gem_private_object_init +ffffffff819617f0 T drm_gem_handle_delete +ffffffff819618e0 t drm_gem_object_release_handle +ffffffff81961970 T drm_gem_dumb_map_offset +ffffffff81961aa0 T drm_gem_object_lookup +ffffffff81961b20 T drm_gem_create_mmap_offset +ffffffff81961b50 T drm_gem_dumb_destroy +ffffffff81961b70 T drm_gem_handle_create_tail +ffffffff81961ce0 t drm_gem_object_handle_put_unlocked +ffffffff81961e30 T drm_gem_handle_create +ffffffff81961e80 T drm_gem_free_mmap_offset +ffffffff81961eb0 T drm_gem_create_mmap_offset_size +ffffffff81961ee0 T drm_gem_get_pages +ffffffff81961f30 T drm_gem_put_pages +ffffffff81961f60 T drm_gem_objects_lookup +ffffffff819620d0 T drm_gem_dma_resv_wait +ffffffff81962210 T drm_gem_close_ioctl +ffffffff81962260 T drm_gem_flink_ioctl +ffffffff819623d0 T drm_gem_open_ioctl +ffffffff81962500 T drm_gem_open +ffffffff81962530 T drm_gem_release +ffffffff81962570 T drm_gem_object_release +ffffffff819626c0 T drm_gem_lru_remove +ffffffff819627a0 T drm_gem_object_free +ffffffff819627f0 T drm_gem_mmap_obj +ffffffff81962900 T drm_gem_mmap +ffffffff81962b80 T drm_gem_print_info +ffffffff81962ca0 T drm_gem_pin +ffffffff81962ce0 T drm_gem_unpin +ffffffff81962d20 T drm_gem_vmap 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linux_root_RB_INSERT_COLOR +ffffffff81969be0 T linux_root_RB_REMOVE_COLOR +ffffffff81969f20 T linux_root_RB_REMOVE +ffffffff8196a050 T linux_root_RB_INSERT +ffffffff8196a0c0 T linux_root_RB_FIND +ffffffff8196a110 T linux_root_RB_NFIND +ffffffff8196a160 T linux_root_RB_NEXT +ffffffff8196a1d0 T linux_root_RB_PREV +ffffffff8196a240 T linux_root_RB_MINMAX +ffffffff8196a290 T idr_init +ffffffff8196a2c0 T idr_destroy +ffffffff8196a400 T idr_tree_SPLAY_REMOVE +ffffffff8196a480 T idr_preload +ffffffff8196a510 T idr_alloc +ffffffff8196a6b0 T idr_tree_SPLAY_INSERT +ffffffff8196a750 T idr_replace +ffffffff8196a7d0 T idr_remove +ffffffff8196a890 T idr_find +ffffffff8196a900 T idr_get_next +ffffffff8196aa30 T idr_for_each +ffffffff8196ab40 T idr_cmp +ffffffff8196ab80 T idr_tree_SPLAY +ffffffff8196acb0 T idr_tree_SPLAY_MINMAX +ffffffff8196ada0 T ida_init +ffffffff8196add0 T ida_destroy +ffffffff8196ade0 T ida_simple_get +ffffffff8196ae00 T ida_simple_remove +ffffffff8196ae20 T ida_alloc_min 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dma_fence_signal_timestamp_locked +ffffffff8196ca00 T dma_fence_signal +ffffffff8196cb40 T dma_fence_signal_locked +ffffffff8196cc70 T dma_fence_signal_timestamp +ffffffff8196cd60 T dma_fence_is_signaled +ffffffff8196cdd0 T dma_fence_is_signaled_locked +ffffffff8196cf20 T dma_fence_wait_timeout +ffffffff8196cf80 T dma_fence_default_wait +ffffffff8196d230 T dma_fence_wait +ffffffff8196d290 T dma_fence_enable_sw_signaling +ffffffff8196d410 T dma_fence_init +ffffffff8196d470 T dma_fence_add_callback +ffffffff8196d670 T dma_fence_remove_callback +ffffffff8196d6f0 T dma_fence_context_alloc +ffffffff8196d730 t dma_fence_default_wait_cb +ffffffff8196d780 T dma_fence_wait_any_timeout +ffffffff8196dac0 T dma_fence_get_stub +ffffffff8196dc70 T dma_fence_allocate_private_stub +ffffffff8196dda0 T dma_fence_array_create +ffffffff8196dec0 t irq_dma_fence_array_work +ffffffff8196df50 T dma_fence_array_first +ffffffff8196dfb0 T dma_fence_array_next +ffffffff8196e010 t dma_fence_array_get_driver_name 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get_dma_buf +ffffffff8196f150 T pcie_get_speed_cap +ffffffff8196f2f0 T printk +ffffffff8196f380 T pcie_get_width_cap +ffffffff8196f470 T pcie_aspm_enabled +ffffffff8196f500 T wait_on_bit +ffffffff8196f5d0 T wait_on_bit_timeout +ffffffff8196f6a0 T wake_up_bit +ffffffff8196f6e0 T clear_and_wake_up_bit +ffffffff8196f730 T bit_waitqueue +ffffffff8196f760 T __var_waitqueue +ffffffff8196f790 T drm_linux_init +ffffffff8196f900 T drm_linux_exit +ffffffff8196f960 T pci_resize_resource +ffffffff8196fab0 T register_shrinker +ffffffff8196fb00 T unregister_shrinker +ffffffff8196fb60 T drmbackoff +ffffffff8196fbf0 T bitmap_zalloc +ffffffff8196fc20 T bitmap_free +ffffffff8196fc40 T atomic_dec_and_mutex_lock +ffffffff8196fcc0 T interval_tree_iter_first +ffffffff8196fd70 T interval_tree_remove +ffffffff8196fd90 T interval_tree_insert +ffffffff8196fe00 T syncfile_read +ffffffff8196fe30 T syncfile_write +ffffffff8196fe60 T syncfile_ioctl +ffffffff8196fe90 T syncfile_kqfilter +ffffffff8196fec0 T syncfile_stat +ffffffff8196ff70 T syncfile_close +ffffffff81970010 T syncfile_seek +ffffffff81970090 T fd_install +ffffffff81970160 T fput +ffffffff819701b0 T get_unused_fd_flags +ffffffff819702c0 T put_unused_fd +ffffffff81970350 T sync_file_get_fence +ffffffff81970400 T sync_file_create +ffffffff81970490 T drm_firmware_drivers_only +ffffffff819704c0 t dma_fence_stub_get_name +ffffffff819704f0 t dma_fence_array_cb_func +ffffffff81970570 t dma_fence_chain_cb +ffffffff81970630 t dma_fence_chain_timo +ffffffff81971000 T drmm_kzalloc +ffffffff81971100 T drmm_kcalloc +ffffffff81971210 T drmm_kstrdup +ffffffff81971350 T drmm_kfree +ffffffff81971450 T drmm_add_action +ffffffff81971510 T drmm_add_action_or_reset +ffffffff819715e0 T drm_managed_release +ffffffff819716a0 T drmm_add_final_kfree +ffffffff81972000 T mipi_dsi_attach +ffffffff81972050 T mipi_dsi_detach +ffffffff819720a0 T devm_mipi_dsi_attach +ffffffff81972110 T mipi_dsi_packet_format_is_short +ffffffff81972160 T mipi_dsi_packet_format_is_long +ffffffff819721b0 T mipi_dsi_create_packet +ffffffff819722c0 T mipi_dsi_shutdown_peripheral +ffffffff81972370 T mipi_dsi_turn_on_peripheral +ffffffff81972420 T mipi_dsi_set_maximum_return_packet_size +ffffffff819724d0 T mipi_dsi_compression_mode +ffffffff81972580 T mipi_dsi_picture_parameter_set +ffffffff81972630 T mipi_dsi_generic_write +ffffffff819726f0 T mipi_dsi_generic_read +ffffffff819727a0 T mipi_dsi_dcs_write_buffer +ffffffff81972860 T mipi_dsi_dcs_write +ffffffff819729b0 T mipi_dsi_dcs_read +ffffffff81972a50 T mipi_dsi_dcs_nop +ffffffff81972b00 T mipi_dsi_dcs_soft_reset +ffffffff81972bb0 T mipi_dsi_dcs_get_power_mode +ffffffff81972c70 T mipi_dsi_dcs_get_pixel_format +ffffffff81972d30 T mipi_dsi_dcs_enter_sleep_mode +ffffffff81972de0 T mipi_dsi_dcs_exit_sleep_mode +ffffffff81972e90 T mipi_dsi_dcs_set_display_off +ffffffff81972f40 T mipi_dsi_dcs_set_display_on +ffffffff81972ff0 T mipi_dsi_dcs_set_column_address +ffffffff819730b0 T mipi_dsi_dcs_set_page_address +ffffffff81973170 T mipi_dsi_dcs_set_tear_off +ffffffff81973220 T mipi_dsi_dcs_set_tear_on +ffffffff819732d0 T mipi_dsi_dcs_set_pixel_format +ffffffff81974000 T __drm_mm_interval_first +ffffffff819740c0 T drm_mm_reserve_node +ffffffff81974370 t add_hole +ffffffff819744d0 T drm_mm_insert_node_in_range +ffffffff81974ac0 T drm_mm_remove_node +ffffffff81974bf0 T drm_mm_replace_node +ffffffff81974dd0 T drm_mm_scan_init_with_range +ffffffff81974e50 T drm_mm_scan_add_block +ffffffff81974fc0 T drm_mm_scan_remove_block +ffffffff81975040 T drm_mm_scan_color_evict +ffffffff81975120 T drm_mm_init +ffffffff819751d0 T drm_mm_takedown +ffffffff81975210 T drm_mm_print +ffffffff81976000 T drm_modeset_register_all +ffffffff819760a0 T drm_modeset_unregister_all +ffffffff819760e0 T drm_mode_getresources +ffffffff81976390 T drm_mode_config_reset +ffffffff819764f0 T drmm_mode_config_init +ffffffff81976b70 T drm_mode_config_cleanup +ffffffff81976eb0 t drm_mode_config_init_release +ffffffff81976ec0 T drm_mode_config_validate +ffffffff81978000 T __drm_mode_object_add +ffffffff81978100 T drm_mode_object_add +ffffffff819781e0 T drm_mode_object_register +ffffffff81978230 T drm_mode_object_unregister +ffffffff819782d0 T drm_mode_object_lease_required +ffffffff81978320 T __drm_mode_object_find +ffffffff819783d0 T drm_mode_object_find +ffffffff81978480 T drm_mode_object_put +ffffffff81978500 T drm_mode_object_get +ffffffff81978560 T drm_object_attach_property +ffffffff81978670 T drm_object_property_set_value +ffffffff81978750 T drm_object_property_get_value +ffffffff819787e0 t __drm_object_property_get_value +ffffffff819788c0 T drm_object_property_get_default_value +ffffffff81978990 T drm_mode_object_get_properties +ffffffff81978ae0 T drm_mode_obj_get_properties_ioctl +ffffffff81978d30 T drm_mode_obj_find_prop_id +ffffffff81978d90 T drm_mode_obj_set_property_ioctl +ffffffff8197a000 T drm_mode_debug_printmodeline +ffffffff8197a140 T drm_mode_vrefresh +ffffffff8197a1e0 T drm_mode_create +ffffffff8197a200 T drm_mode_destroy +ffffffff8197a240 T drm_mode_probed_add +ffffffff8197a2e0 T drm_cvt_mode +ffffffff8197a790 T drm_mode_set_name +ffffffff8197a7e0 T drm_gtf_mode_complex +ffffffff8197aae0 T drm_gtf_mode +ffffffff8197ab30 T drm_mode_get_hv_timing +ffffffff8197ab80 T drm_mode_init +ffffffff8197ac50 T drm_mode_set_crtcinfo +ffffffff8197ae00 T drm_mode_copy +ffffffff8197ae60 T drm_mode_duplicate +ffffffff8197aee0 T drm_mode_match +ffffffff8197b080 T drm_mode_equal +ffffffff8197b0a0 T drm_mode_equal_no_clocks +ffffffff8197b0c0 T drm_mode_equal_no_clocks_no_stereo +ffffffff8197b180 T drm_mode_validate_driver +ffffffff8197b270 T drm_mode_validate_size +ffffffff8197b2c0 T drm_mode_validate_ycbcr420 +ffffffff8197b330 T drm_mode_is_420_only +ffffffff8197b380 T drm_get_mode_status_name +ffffffff8197b400 T drm_mode_prune_invalid +ffffffff8197b690 T drm_mode_sort +ffffffff8197b6c0 t drm_mode_compare +ffffffff8197b850 T drm_connector_list_update +ffffffff8197ba20 T drm_mode_parse_command_line_for_connector +ffffffff8197ba50 T drm_mode_create_from_cmdline_mode +ffffffff8197bb40 T drm_mode_convert_to_umode +ffffffff8197bcd0 T drm_mode_convert_umode +ffffffff8197bef0 T drm_mode_is_420_also +ffffffff8197bf40 T drm_mode_is_420 +ffffffff8197c000 T drm_helper_move_panel_connectors_to_head +ffffffff8197c0f0 T drm_helper_mode_fill_fb_struct +ffffffff8197c1b0 T drm_crtc_init +ffffffff8197c280 T drm_mode_config_helper_suspend +ffffffff8197c310 T drm_mode_config_helper_resume +ffffffff8197d000 T drm_modeset_lock_all +ffffffff8197d1e0 T drm_modeset_acquire_init +ffffffff8197d270 T drm_modeset_lock_all_ctx +ffffffff8197d3e0 T drm_modeset_backoff +ffffffff8197d4b0 T drm_modeset_acquire_fini +ffffffff8197d4e0 T drm_warn_on_modeset_not_all_locked +ffffffff8197d630 T drm_modeset_unlock_all +ffffffff8197d710 T drm_modeset_drop_locks +ffffffff8197d7a0 T drm_modeset_unlock +ffffffff8197d870 t modeset_lock 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+ffffffff81986960 T drm_prime_pages_to_sg +ffffffff819869b0 T drm_prime_get_contiguous_size +ffffffff81986a00 T drm_gem_prime_export +ffffffff81986a90 T drm_gem_prime_import_dev +ffffffff81986af0 T drm_prime_sg_to_page_array +ffffffff81986b40 T drm_prime_sg_to_dma_addr_array +ffffffff81986b90 T drm_prime_gem_destroy +ffffffff81987000 T __drm_puts_coredump +ffffffff819870f0 T __drm_printfn_coredump +ffffffff81987210 T __drm_puts_seq_file +ffffffff81987240 T __drm_printfn_seq_file +ffffffff81987270 T __drm_printfn_info +ffffffff819872a0 T __drm_printfn_debug +ffffffff819872d0 T __drm_printfn_err +ffffffff81987310 T drm_puts +ffffffff81987340 T drm_printf +ffffffff819873c0 T drm_print_bits +ffffffff819875e0 T drm_dev_printk +ffffffff81987680 T __drm_dev_dbg +ffffffff81987710 T ___drm_dbg +ffffffff819877a0 T __drm_err +ffffffff81987830 T drm_print_regset32 +ffffffff81988000 T drm_crtc_mode_valid +ffffffff81988050 T drm_encoder_mode_valid +ffffffff81988090 T drm_connector_mode_valid +ffffffff81988110 T drm_kms_helper_poll_enable +ffffffff81988200 T drm_helper_probe_detect +ffffffff819883f0 T drm_helper_probe_single_connector_modes +ffffffff819889b0 t __drm_helper_update_and_validate +ffffffff81988d60 T drm_kms_helper_hotplug_event +ffffffff81988da0 T drm_kms_helper_connector_hotplug_event +ffffffff81988de0 T drm_kms_helper_is_poll_worker +ffffffff81988e10 T drm_kms_helper_poll_disable +ffffffff81988e90 T drm_kms_helper_poll_init +ffffffff81988ef0 t output_poll_execute +ffffffff81989180 T drm_kms_helper_poll_fini +ffffffff81989200 T drm_connector_helper_hpd_irq_event +ffffffff819892d0 t check_connector_changed +ffffffff819894b0 T drm_helper_hpd_irq_event +ffffffff81989600 T drm_crtc_helper_mode_valid_fixed +ffffffff81989650 T drm_connector_helper_get_modes_from_ddc +ffffffff819896e0 T drm_connector_helper_get_modes_fixed +ffffffff81989850 T drm_connector_helper_get_modes +ffffffff819898b0 t __delayed_work_tick +ffffffff8198a000 T drm_property_create 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drm_property_change_valid_put +ffffffff8198c000 T drm_rect_intersect +ffffffff8198c080 T drm_rect_clip_scaled +ffffffff8198c2f0 T drm_rect_calc_hscale +ffffffff8198c3c0 T drm_rect_calc_vscale +ffffffff8198c490 T drm_rect_debug_print +ffffffff8198c5b0 T drm_rect_rotate +ffffffff8198c670 T drm_rect_rotate_inv +ffffffff8198d000 T drm_self_refresh_helper_update_avg_times +ffffffff8198d140 T drm_self_refresh_helper_alter_state +ffffffff8198d2d0 T drm_self_refresh_helper_init +ffffffff8198d480 t drm_self_refresh_helper_entry_work +ffffffff8198d5e0 T drm_self_refresh_helper_cleanup +ffffffff8198d660 t __delayed_work_tick +ffffffff8198e000 T drm_syncobj_find +ffffffff8198e070 T drm_syncobj_add_point +ffffffff8198e160 t syncobj_wait_syncobj_func +ffffffff8198e210 T drm_syncobj_replace_fence +ffffffff8198e2a0 T drm_syncobj_find_fence +ffffffff8198e600 t drm_syncobj_fence_add_wait +ffffffff8198e6d0 T drm_syncobj_free +ffffffff8198e760 T drm_syncobj_create +ffffffff8198e9a0 T drm_syncobj_get_handle +ffffffff8198eac0 T drm_syncobj_get_fd +ffffffff8198eb10 T drm_syncobj_open +ffffffff8198eb40 T drm_syncobj_release +ffffffff8198eb80 t drm_syncobj_release_handle +ffffffff8198ec30 T drm_syncobj_create_ioctl +ffffffff8198ed60 T drm_syncobj_destroy_ioctl +ffffffff8198ee80 T drm_syncobj_handle_to_fd_ioctl +ffffffff8198f070 T drm_syncobj_fd_to_handle_ioctl +ffffffff8198f260 T drm_syncobj_transfer_ioctl +ffffffff8198f680 T drm_timeout_abs_to_jiffies +ffffffff8198f760 T drm_syncobj_wait_ioctl +ffffffff8198f8f0 t drm_syncobj_array_find +ffffffff8198fb20 t drm_syncobj_array_free +ffffffff8198fc00 T drm_syncobj_timeline_wait_ioctl +ffffffff8198fd90 T drm_syncobj_reset_ioctl +ffffffff8198fef0 T drm_syncobj_signal_ioctl +ffffffff819900c0 T drm_syncobj_timeline_signal_ioctl +ffffffff819902f0 T drm_syncobj_query_ioctl +ffffffff819904f0 t drm_syncobj_array_wait_timeout +ffffffff81990950 t syncobj_wait_fence_func +ffffffff81991000 T drm_vblank_count +ffffffff81991090 T drm_crtc_accurate_vblank_count +ffffffff819911a0 t drm_update_vblank_count +ffffffff819915f0 T drm_vblank_disable_and_save +ffffffff81991740 T drm_vblank_init +ffffffff819918c0 t vblank_disable_fn +ffffffff81991940 t drm_vblank_init_release +ffffffff819919d0 T drm_dev_has_vblank +ffffffff81991a00 T drm_crtc_vblank_waitqueue +ffffffff81991a50 T drm_calc_timestamping_constants +ffffffff81991c80 T drm_crtc_vblank_helper_get_vblank_timestamp_internal +ffffffff819921b0 T drm_crtc_vblank_helper_get_vblank_timestamp +ffffffff819921d0 T drm_crtc_vblank_count +ffffffff81992260 T drm_crtc_vblank_count_and_time +ffffffff81992320 T drm_crtc_arm_vblank_event +ffffffff81992400 T drm_crtc_send_vblank_event +ffffffff819925b0 T drm_vblank_get +ffffffff819926d0 t drm_vblank_enable +ffffffff81992890 T drm_crtc_vblank_get +ffffffff819929a0 T drm_vblank_put +ffffffff81992ad0 T drm_crtc_vblank_put +ffffffff81992af0 T drm_wait_one_vblank +ffffffff81992ff0 T drm_crtc_wait_one_vblank +ffffffff81993010 T drm_crtc_vblank_off +ffffffff81993400 T drm_crtc_vblank_reset +ffffffff81993530 T drm_crtc_set_max_vblank_count +ffffffff81993610 T drm_crtc_vblank_on +ffffffff81993760 t drm_reset_vblank_timestamp +ffffffff81993960 T drm_crtc_vblank_restore +ffffffff81993d40 T drm_legacy_modeset_ctl_ioctl +ffffffff81993f60 T drm_wait_vblank_ioctl +ffffffff81994a50 T drm_handle_vblank +ffffffff81994d30 t drm_handle_vblank_events +ffffffff81994fc0 T drm_crtc_handle_vblank +ffffffff81994fe0 T drm_crtc_get_sequence_ioctl +ffffffff819951d0 T drm_crtc_queue_sequence_ioctl +ffffffff819955a0 t __get_vblank_counter +ffffffff81996000 T drm_handle_vblank_works +ffffffff819961a0 T drm_vblank_cancel_pending_works +ffffffff819962e0 T drm_vblank_work_schedule +ffffffff81996550 T drm_vblank_work_cancel_sync +ffffffff819966a0 T drm_vblank_work_flush +ffffffff819967d0 T drm_vblank_work_init +ffffffff81996840 T drm_vblank_worker_init +ffffffff81997000 T drm_vma_offset_manager_init +ffffffff81997040 T drm_vma_offset_manager_destroy +ffffffff81997060 T drm_vma_offset_lookup_locked +ffffffff819970f0 T drm_vma_offset_add +ffffffff81997180 T drm_vma_offset_remove +ffffffff819971d0 T drm_vma_node_allow +ffffffff819971f0 t vma_node_allow +ffffffff81997320 T drm_vma_node_allow_once +ffffffff81997340 T drm_vma_node_revoke +ffffffff819973c0 T drm_vma_node_is_allowed +ffffffff81998000 T hdmi_avi_infoframe_init +ffffffff81998080 T hdmi_avi_infoframe_check +ffffffff819980d0 T hdmi_avi_infoframe_pack_only +ffffffff819982d0 T hdmi_avi_infoframe_pack +ffffffff81998330 T hdmi_spd_infoframe_init +ffffffff819983f0 T hdmi_spd_infoframe_check +ffffffff81998440 T hdmi_spd_infoframe_pack_only +ffffffff81998570 T hdmi_spd_infoframe_pack +ffffffff819986d0 T hdmi_audio_infoframe_init +ffffffff81998720 T hdmi_audio_infoframe_check +ffffffff81998770 T hdmi_audio_infoframe_pack_only +ffffffff819988c0 T hdmi_audio_infoframe_pack +ffffffff81998910 T hdmi_audio_infoframe_pack_for_dp +ffffffff81998a00 T hdmi_vendor_infoframe_init +ffffffff81998a60 T hdmi_vendor_infoframe_check +ffffffff81998b00 T hdmi_vendor_infoframe_pack_only +ffffffff81998cd0 T hdmi_vendor_infoframe_pack +ffffffff81998d70 T hdmi_drm_infoframe_init +ffffffff81998dd0 T hdmi_drm_infoframe_check +ffffffff81998e20 T hdmi_drm_infoframe_pack_only +ffffffff81998ff0 T hdmi_drm_infoframe_pack +ffffffff81999040 T hdmi_infoframe_check +ffffffff819991a0 T hdmi_infoframe_pack_only +ffffffff819993c0 T hdmi_infoframe_pack +ffffffff81999530 T hdmi_infoframe_log +ffffffff8199a430 T hdmi_drm_infoframe_unpack_only +ffffffff8199a510 T hdmi_infoframe_unpack +ffffffff8199b000 T list_sort +ffffffff8199c000 T radix_tree_lookup +ffffffff8199c0b0 T radix_tree_iter_find +ffffffff8199c1a0 T radix_tree_delete +ffffffff8199c340 T radix_tree_iter_delete +ffffffff8199c360 T radix_tree_insert +ffffffff8199d000 T sort +ffffffff8199d040 t qsort +ffffffff8199f000 T drm_dp_dual_mode_read +ffffffff8199f110 T drm_dp_dual_mode_write +ffffffff8199f1f0 T drm_dp_dual_mode_detect +ffffffff8199f4a0 T drm_dp_dual_mode_max_tmds_clock +ffffffff8199f5d0 T drm_dp_dual_mode_get_tmds_output +ffffffff8199f700 T drm_dp_dual_mode_set_tmds_output +ffffffff8199f990 T drm_dp_get_dual_mode_type_name +ffffffff8199fa00 T drm_lspcon_get_mode +ffffffff8199fba0 T drm_lspcon_set_mode +ffffffff819a0000 T drm_dp_channel_eq_ok +ffffffff819a0080 T drm_dp_clock_recovery_ok +ffffffff819a0100 T drm_dp_get_adjust_request_voltage +ffffffff819a0140 T drm_dp_get_adjust_request_pre_emphasis +ffffffff819a0190 T drm_dp_get_adjust_tx_ffe_preset +ffffffff819a01d0 T drm_dp_128b132b_lane_channel_eq_done +ffffffff819a0250 T drm_dp_128b132b_lane_symbol_locked +ffffffff819a02c0 T drm_dp_128b132b_eq_interlane_align_done +ffffffff819a02f0 T drm_dp_128b132b_cds_interlane_align_done +ffffffff819a0320 T drm_dp_128b132b_link_training_failed +ffffffff819a0350 T drm_dp_read_clock_recovery_delay +ffffffff819a0450 T drm_dp_read_channel_eq_delay +ffffffff819a0550 T drm_dp_128b132b_read_aux_rd_interval +ffffffff819a0600 T drm_dp_link_train_clock_recovery_delay +ffffffff819a0690 t __8b10b_clock_recovery_delay_us +ffffffff819a0710 T drm_dp_link_train_channel_eq_delay +ffffffff819a0790 T drm_dp_phy_name +ffffffff819a07d0 T drm_dp_lttpr_link_train_clock_recovery_delay +ffffffff819a07f0 T drm_dp_lttpr_link_train_channel_eq_delay +ffffffff819a0860 T drm_dp_link_rate_to_bw_code +ffffffff819a08d0 T drm_dp_bw_code_to_link_rate +ffffffff819a0930 T drm_dp_dpcd_probe +ffffffff819a0a70 t drm_dp_dpcd_access +ffffffff819a0ba0 T drm_dp_dpcd_read +ffffffff819a0cd0 T drm_dp_dpcd_write +ffffffff819a0de0 T drm_dp_dpcd_read_link_status +ffffffff819a0e00 T drm_dp_dpcd_read_phy_link_status +ffffffff819a0f00 T drm_dp_downstream_is_type +ffffffff819a0f40 T drm_dp_downstream_is_tmds +ffffffff819a0fb0 T drm_dp_send_real_edid_checksum +ffffffff819a1210 T drm_dp_read_dpcd_caps +ffffffff819a13a0 T drm_dp_read_downstream_info +ffffffff819a14a0 T drm_dp_downstream_max_dotclock +ffffffff819a14f0 T drm_dp_downstream_max_tmds_clock +ffffffff819a1590 T drm_dp_downstream_min_tmds_clock +ffffffff819a1610 T drm_dp_downstream_max_bpc +ffffffff819a16b0 T drm_dp_downstream_420_passthrough +ffffffff819a1710 T drm_dp_downstream_444_to_420_conversion +ffffffff819a1770 T drm_dp_downstream_rgb_to_ycbcr_conversion +ffffffff819a17d0 T drm_dp_downstream_mode +ffffffff819a1860 T drm_dp_downstream_id +ffffffff819a1880 T drm_dp_downstream_debug +ffffffff819a1920 T drm_dp_subconnector_type +ffffffff819a1990 T drm_dp_set_subconnector_property +ffffffff819a1a00 T drm_dp_read_sink_count_cap +ffffffff819a1a50 T drm_dp_read_sink_count +ffffffff819a1ab0 T drm_dp_remote_aux_init +ffffffff819a1ae0 t drm_dp_aux_crc_work +ffffffff819a1c60 T drm_dp_aux_init +ffffffff819a1d10 T drm_dp_aux_register +ffffffff819a1e30 T drm_dp_aux_unregister +ffffffff819a1e60 T drm_dp_psr_setup_time +ffffffff819a1eb0 T drm_dp_start_crc +ffffffff819a1f60 T drm_dp_stop_crc +ffffffff819a1ff0 T drm_dp_read_desc +ffffffff819a21b0 T drm_dp_dsc_sink_max_slice_count +ffffffff819a2240 T drm_dp_dsc_sink_line_buf_depth +ffffffff819a2280 T drm_dp_dsc_sink_supported_input_bpcs +ffffffff819a22f0 T drm_dp_read_lttpr_common_caps +ffffffff819a23b0 T drm_dp_read_lttpr_phy_caps +ffffffff819a2470 T drm_dp_lttpr_count +ffffffff819a2500 T drm_dp_lttpr_max_link_rate +ffffffff819a2560 T drm_dp_lttpr_max_lane_count +ffffffff819a2590 T drm_dp_lttpr_voltage_swing_level_3_supported +ffffffff819a25c0 T drm_dp_lttpr_pre_emphasis_level_3_supported +ffffffff819a25f0 T drm_dp_get_phy_test_pattern +ffffffff819a2710 T drm_dp_set_phy_test_pattern +ffffffff819a27e0 T drm_dp_vsc_sdp_log +ffffffff819a2b00 T drm_dp_get_pcon_max_frl_bw +ffffffff819a2b50 T drm_dp_pcon_frl_prepare +ffffffff819a2ba0 T drm_dp_pcon_is_frl_ready +ffffffff819a2bf0 T drm_dp_pcon_frl_configure_1 +ffffffff819a2cf0 T drm_dp_pcon_frl_configure_2 +ffffffff819a2d50 T drm_dp_pcon_reset_frl_config +ffffffff819a2da0 T drm_dp_pcon_frl_enable +ffffffff819a2e60 T drm_dp_pcon_hdmi_link_active +ffffffff819a2eb0 T drm_dp_pcon_hdmi_link_mode +ffffffff819a2f20 T drm_dp_pcon_hdmi_frl_link_error_count +ffffffff819a3020 T drm_dp_pcon_enc_is_dsc_1_2 +ffffffff819a3050 T drm_dp_pcon_dsc_max_slices +ffffffff819a30e0 T drm_dp_pcon_dsc_max_slice_width +ffffffff819a3110 T drm_dp_pcon_dsc_bpp_incr +ffffffff819a3150 T drm_dp_pcon_pps_default +ffffffff819a31e0 T drm_dp_pcon_pps_override_buf +ffffffff819a3290 T drm_dp_pcon_pps_override_param +ffffffff819a3370 T drm_dp_pcon_convert_rgb_to_ycbcr +ffffffff819a3410 T drm_edp_backlight_set_level +ffffffff819a34f0 T drm_edp_backlight_enable +ffffffff819a3700 t drm_edp_backlight_set_enable +ffffffff819a3830 T drm_edp_backlight_disable +ffffffff819a3870 T drm_edp_backlight_init +ffffffff819a3dc0 T drm_panel_dp_aux_backlight +ffffffff819a3f50 t __128b132b_channel_eq_delay_us +ffffffff819a3fd0 t __8b10b_channel_eq_delay_us +ffffffff819a4050 t drm_dp_aux_get_crc +ffffffff819a4120 t drm_dp_i2c_xfer +ffffffff819a4370 t drm_dp_i2c_functionality +ffffffff819a43a0 t drm_dp_i2c_do_msg +ffffffff819a4770 t lock_bus +ffffffff819a4790 t trylock_bus +ffffffff819a47e0 t unlock_bus +ffffffff819a4800 t dp_aux_backlight_update_status +ffffffff819a5000 T drm_dp_encode_sideband_req +ffffffff819a5420 T drm_dp_decode_sideband_req +ffffffff819a5970 T drm_dp_dump_sideband_msg_req_body +ffffffff819a5d30 T drm_dp_mst_get_port_malloc +ffffffff819a5d80 T drm_dp_mst_put_port_malloc +ffffffff819a5e80 t kref_put +ffffffff819a5ec0 T drm_atomic_get_mst_payload_state +ffffffff819a5f20 T drm_dp_mst_dpcd_read +ffffffff819a61e0 T drm_dp_mst_dpcd_write +ffffffff819a6230 t drm_dp_send_dpcd_write +ffffffff819a6470 T drm_dp_mst_connector_late_register +ffffffff819a64f0 T drm_dp_mst_connector_early_unregister +ffffffff819a6530 T drm_dp_send_power_updown_phy +ffffffff819a6770 t drm_dp_mst_topology_put_port +ffffffff819a68a0 t drm_dp_mst_wait_tx_reply +ffffffff819a6c40 T drm_dp_send_query_stream_enc_status +ffffffff819a6f00 T drm_dp_add_payload_part1 +ffffffff819a70b0 T drm_dp_remove_payload +ffffffff819a7250 T drm_dp_add_payload_part2 +ffffffff819a7400 T drm_dp_get_vc_payload_bw +ffffffff819a74a0 T drm_dp_read_mst_cap +ffffffff819a7500 T drm_dp_mst_topology_mgr_set_mst +ffffffff819a77c0 t drm_dp_dpcd_write_payload +ffffffff819a7950 t drm_dp_mst_topology_put_mstb +ffffffff819a7a50 T drm_dp_mst_topology_mgr_suspend +ffffffff819a7b10 t drm_dp_mst_topology_mgr_invalidate_mstb +ffffffff819a7b80 T drm_dp_mst_topology_mgr_resume +ffffffff819a7dc0 T drm_dp_mst_hpd_irq_handle_event +ffffffff819a8ca0 T drm_dp_mst_hpd_irq_send_new_request +ffffffff819a8d30 T drm_dp_mst_detect_port +ffffffff819a8eb0 T drm_dp_mst_get_edid +ffffffff819a8fc0 T drm_dp_atomic_find_time_slots +ffffffff819a9290 T drm_atomic_get_mst_topology_state +ffffffff819a92a0 T drm_dp_atomic_release_time_slots +ffffffff819a94b0 T drm_dp_mst_atomic_setup_commit +ffffffff819a9640 T drm_dp_mst_atomic_wait_for_dependencies +ffffffff819a97c0 T drm_dp_mst_root_conn_atomic_check +ffffffff819a98e0 T drm_dp_mst_update_slots +ffffffff819a9940 T drm_dp_check_act_status +ffffffff819a9af0 T drm_dp_calc_pbn_mode +ffffffff819a9b60 T drm_dp_mst_dump_topology +ffffffff819a9db0 t drm_dp_mst_dump_mstb +ffffffff819a9e20 T drm_dp_mst_add_affected_dsc_crtcs +ffffffff819a9f50 T drm_dp_mst_dsc_aux_for_port +ffffffff819aa180 T drm_dp_mst_atomic_enable_dsc +ffffffff819aa320 T drm_dp_mst_atomic_check +ffffffff819aa610 t drm_dp_mst_atomic_check_mstb_bw_limit +ffffffff819aa8e0 t drm_dp_mst_duplicate_state +ffffffff819aaab0 t drm_dp_mst_destroy_state +ffffffff819aab70 T drm_atomic_get_old_mst_topology_state +ffffffff819aab80 T drm_atomic_get_new_mst_topology_state +ffffffff819aab90 T drm_dp_mst_topology_mgr_init +ffffffff819aae00 t drm_dp_mst_link_probe_work +ffffffff819ab0a0 t drm_dp_tx_work +ffffffff819ab0f0 t drm_dp_delayed_destroy_work +ffffffff819ab510 t drm_dp_mst_up_req_work +ffffffff819aba20 T drm_dp_mst_topology_mgr_destroy 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__delayed_work_tick +ffffffff819bc000 T ttm_eu_backoff_reservation +ffffffff819bc130 T ttm_eu_reserve_buffers +ffffffff819bc520 T ttm_eu_fence_buffer_objects +ffffffff819bc670 t __ww_mutex_lock +ffffffff819bd000 T ttm_prot_from_caching +ffffffff819be000 T ttm_pool_alloc +ffffffff819beae0 t ttm_pool_free_range +ffffffff819bed90 T ttm_pool_free +ffffffff819befa0 T ttm_pool_init +ffffffff819bf250 T ttm_pool_fini +ffffffff819bf420 t ttm_pool_type_fini +ffffffff819bf660 T ttm_pool_mgr_init +ffffffff819bf940 t ttm_pool_shrinker_count +ffffffff819bf990 t ttm_pool_shrinker_scan +ffffffff819bfba0 T ttm_pool_mgr_fini +ffffffff819c0000 T ttm_range_man_init_nocheck +ffffffff819c0180 T ttm_range_man_fini_nocheck +ffffffff819c0310 t ttm_range_man_alloc +ffffffff819c0450 t ttm_range_man_free +ffffffff819c04b0 t ttm_range_man_intersects +ffffffff819c0510 t ttm_range_man_compatible +ffffffff819c0570 t ttm_range_man_debug +ffffffff819c1000 T ttm_lru_bulk_move_init +ffffffff819c1020 T ttm_lru_bulk_move_tail +ffffffff819c11e0 T ttm_resource_add_bulk_move +ffffffff819c12b0 T ttm_resource_del_bulk_move +ffffffff819c13f0 T ttm_resource_move_to_lru_tail +ffffffff819c1560 T ttm_resource_init +ffffffff819c1660 T ttm_resource_fini +ffffffff819c16d0 T ttm_resource_alloc +ffffffff819c1820 T ttm_resource_free +ffffffff819c19e0 T ttm_resource_intersects +ffffffff819c1a40 T ttm_resource_compatible +ffffffff819c1aa0 T ttm_resource_compat +ffffffff819c1c30 T ttm_resource_set_bo +ffffffff819c1c80 T ttm_resource_manager_init +ffffffff819c1d30 T ttm_resource_manager_evict_all +ffffffff819c1f00 T ttm_resource_manager_usage +ffffffff819c1f60 T ttm_resource_manager_debug +ffffffff819c2050 T ttm_resource_manager_first +ffffffff819c20e0 T ttm_resource_manager_next +ffffffff819c2220 T ttm_kmap_iter_iomap_init +ffffffff819c2280 T ttm_kmap_iter_linear_io_init +ffffffff819c2450 T ttm_kmap_iter_linear_io_fini +ffffffff819c24a0 T ttm_resource_manager_create_debugfs +ffffffff819c24d0 t ttm_kmap_iter_iomap_map_local +ffffffff819c2610 t ttm_kmap_iter_iomap_unmap_local +ffffffff819c2630 t ttm_kmap_iter_linear_io_map_local +ffffffff819c3000 T ttm_sys_man_init +ffffffff819c3130 t ttm_sys_man_alloc +ffffffff819c31b0 t ttm_sys_man_free +ffffffff819c4000 T ttm_tt_create +ffffffff819c4100 T ttm_tt_destroy +ffffffff819c4120 T ttm_tt_init +ffffffff819c41f0 T ttm_tt_fini +ffffffff819c42d0 T ttm_sg_tt_init +ffffffff819c44f0 T ttm_tt_swapin +ffffffff819c4600 T ttm_tt_swapout +ffffffff819c4650 T ttm_tt_populate +ffffffff819c4820 T ttm_tt_unpopulate +ffffffff819c48d0 T ttm_tt_mgr_init +ffffffff819c4930 T ttm_kmap_iter_tt_init +ffffffff819c4990 t ttm_kmap_iter_tt_map_local +ffffffff819c49f0 t ttm_kmap_iter_tt_unmap_local +ffffffff819c5000 T drm_sched_entity_init +ffffffff819c5180 T drm_sched_entity_modify_sched +ffffffff819c5200 T drm_sched_entity_is_ready +ffffffff819c5240 T drm_sched_entity_flush +ffffffff819c55a0 T drm_sched_entity_fini +ffffffff819c58b0 T drm_sched_entity_destroy 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icl_combo_phy_set_signal_levels +ffffffff81a11ff0 t tgl_dkl_phy_set_signal_levels +ffffffff81a122f0 t icl_mg_phy_set_signal_levels +ffffffff81a12c20 t hsw_set_signal_levels +ffffffff81a12f90 t intel_ddi_update_prepare +ffffffff81a13110 t intel_ddi_update_complete +ffffffff81a13150 t lpt_digital_port_connected +ffffffff81a131c0 t bdw_digital_port_connected +ffffffff81a13230 t hsw_digital_port_connected +ffffffff81a132a0 t intel_ddi_encoder_reset +ffffffff81a13380 t intel_ddi_encoder_destroy +ffffffff81a13430 t icl_program_mg_dp_mode +ffffffff81a136c0 t intel_ddi_init_dp_buf_reg +ffffffff81a13880 t intel_disable_ddi_buf +ffffffff81a13ba0 t intel_ddi_prepare_link_retrain +ffffffff81a14210 t intel_ddi_set_link_train +ffffffff81a14370 t intel_ddi_set_idle_link_train +ffffffff81a14590 t intel_ddi_dp_voltage_max +ffffffff81a14650 t intel_ddi_dp_preemph_max +ffffffff81a15000 T is_hobl_buf_trans +ffffffff81a15040 T intel_ddi_buf_trans_init +ffffffff81a15300 t dg2_get_snps_buf_trans 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+ffffffff81a17240 T is_trans_port_sync_mode +ffffffff81a17280 T intel_crtc_bigjoiner_slave_pipes +ffffffff81a172e0 T intel_crtc_is_bigjoiner_slave +ffffffff81a17340 T intel_crtc_is_bigjoiner_master +ffffffff81a173a0 T intel_master_crtc +ffffffff81a17440 T assert_transcoder +ffffffff81a175f0 T vlv_wait_port_ready +ffffffff81a17740 T intel_enable_transcoder +ffffffff81a17a30 T intel_disable_transcoder +ffffffff81a17d30 T intel_rotation_info_size +ffffffff81a17d80 T intel_remapped_info_size +ffffffff81a17eb0 T intel_plane_uses_fence +ffffffff81a17f00 T intel_fb_xy_to_linear +ffffffff81a17f50 T intel_add_fb_offsets +ffffffff81a17fa0 T intel_plane_fb_max_stride +ffffffff81a18020 T intel_set_plane_visible +ffffffff81a18070 T intel_plane_fixup_bitmasks +ffffffff81a18120 T intel_plane_disable_noatomic +ffffffff81a18310 T intel_plane_fence_y_offset +ffffffff81a18370 T intel_display_prepare_reset +ffffffff81a18550 T intel_display_finish_reset +ffffffff81a18750 t __intel_display_resume +ffffffff81a18860 T intel_modeset_init_hw +ffffffff81a18900 T intel_has_pending_fb_unpin +ffffffff81a18a00 T intel_get_crtc_new_encoder +ffffffff81a18ba0 T ilk_pfit_disable +ffffffff81a18c60 T intel_phy_is_combo +ffffffff81a18ce0 T intel_phy_is_tc +ffffffff81a18d50 T intel_phy_is_snps +ffffffff81a18d90 T intel_port_to_phy +ffffffff81a18e20 T intel_port_to_tc +ffffffff81a18f20 T intel_aux_power_domain +ffffffff81a18f60 T intel_modeset_get_crtc_power_domains +ffffffff81a19180 T intel_modeset_put_crtc_power_domains +ffffffff81a191b0 T intel_display_suspend +ffffffff81a19250 T intel_encoder_destroy +ffffffff81a19280 T intel_encoder_get_config +ffffffff81a192b0 t intel_crtc_readout_derived_state +ffffffff81a196e0 T intel_link_compute_m_n +ffffffff81a19810 T intel_zero_m_n +ffffffff81a19850 T intel_set_m_n +ffffffff81a19910 T intel_cpu_transcoder_has_m2_n2 +ffffffff81a19970 T intel_cpu_transcoder_set_m1_n1 +ffffffff81a19b30 T intel_cpu_transcoder_set_m2_n2 +ffffffff81a19c90 T i9xx_set_pipeconf +ffffffff81a19e40 T ilk_set_pipeconf +ffffffff81a1a020 T bdw_get_pipemisc_bpp +ffffffff81a1a110 T ilk_get_lanes_required +ffffffff81a1a170 T intel_get_m_n +ffffffff81a1a280 T intel_cpu_transcoder_get_m1_n1 +ffffffff81a1a420 T intel_cpu_transcoder_get_m2_n2 +ffffffff81a1a590 T intel_crtc_get_pipe_config +ffffffff81a1a600 T intel_get_load_detect_pipe +ffffffff81a1aa20 T intel_release_load_detect_pipe +ffffffff81a1aaf0 T i9xx_crtc_clock_get +ffffffff81a1ad80 T intel_dotclock_calculate +ffffffff81a1ade0 T intel_crtc_dotclock +ffffffff81a1aeb0 T intel_encoder_current_mode +ffffffff81a1b060 T intel_fuzzy_clock_check +ffffffff81a1b0b0 T intel_pipe_config_compare +ffffffff81a1dba0 t pipe_config_mismatch +ffffffff81a1dc90 t pipe_config_infoframe_mismatch +ffffffff81a1de30 T intel_modeset_all_pipes +ffffffff81a1dfd0 T intel_atomic_add_affected_planes +ffffffff81a1e0a0 T intel_crtc_update_active_timings +ffffffff81a1e1a0 T intel_calc_active_pipes +ffffffff81a1e230 T intel_crtc_arm_fifo_underrun +ffffffff81a1e2d0 T intel_plane_destroy +ffffffff81a1e300 T intel_get_pipe_from_crtc_id_ioctl +ffffffff81a1e370 T intel_mode_valid_max_plane_size +ffffffff81a1e3f0 T intel_init_display_hooks +ffffffff81a1e4d0 T intel_modeset_init_noirq +ffffffff81a1e790 t intel_atomic_helper_free_state_worker +ffffffff81a1e800 T intel_modeset_init_nogem +ffffffff81a1f930 T intel_modeset_init +ffffffff81a1fb50 T i830_enable_pipe +ffffffff81a20180 T i830_disable_pipe +ffffffff81a204b0 T intel_display_resume +ffffffff81a205f0 T intel_modeset_driver_remove +ffffffff81a206a0 T intel_modeset_driver_remove_noirq +ffffffff81a20810 T intel_modeset_driver_remove_nogem +ffffffff81a20850 T intel_modeset_probe_defer +ffffffff81a20880 T intel_display_driver_register +ffffffff81a208e0 T intel_display_driver_unregister +ffffffff81a20960 T intel_scanout_needs_vtd_wa +ffffffff81a209a0 t wait_for_pipe_scanline_moving +ffffffff81a20c00 t hsw_get_pipe_config +ffffffff81a219e0 t hsw_crtc_enable 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intel_crtc_copy_uapi_to_hw_state_modeset +ffffffff81a2a0c0 t intel_atomic_commit_ready +ffffffff81a2a160 t intel_atomic_commit_work +ffffffff81a2a180 t intel_atomic_commit_tail +ffffffff81a2b4e0 t intel_atomic_cleanup_work +ffffffff81a2c000 T intel_display_power_domain_str +ffffffff81a2c060 T __intel_display_power_is_enabled +ffffffff81a2c130 T intel_display_power_is_enabled +ffffffff81a2c240 T intel_display_power_set_target_dc_state +ffffffff81a2c360 T intel_display_power_get +ffffffff81a2c3e0 t __intel_display_power_get_domain +ffffffff81a2c5c0 T intel_display_power_get_if_enabled +ffffffff81a2c6f0 T __intel_display_power_put_async +ffffffff81a2c8c0 t __intel_display_power_put_domain +ffffffff81a2ca40 T intel_display_power_flush_work +ffffffff81a2cb60 t release_async_put_domains +ffffffff81a2cc40 T intel_display_power_put_unchecked +ffffffff81a2cca0 T intel_display_power_get_in_set +ffffffff81a2cd80 T intel_display_power_get_in_set_if_enabled +ffffffff81a2ce30 T intel_display_power_put_mask_in_set +ffffffff81a2cf00 T intel_power_domains_init +ffffffff81a2d140 t intel_display_power_put_async_work +ffffffff81a2d3b0 T intel_power_domains_cleanup +ffffffff81a2d3d0 T gen9_dbuf_slices_update +ffffffff81a2d5f0 T intel_power_domains_init_hw +ffffffff81a2dd80 t icl_display_core_init +ffffffff81a2e670 t bxt_display_core_init +ffffffff81a2e7a0 T intel_power_domains_driver_remove +ffffffff81a2e890 T intel_power_domains_sanitize_state +ffffffff81a2e980 T intel_power_domains_enable +ffffffff81a2e9e0 T intel_power_domains_disable +ffffffff81a2ea90 T intel_power_domains_suspend +ffffffff81a2ec20 t icl_display_core_uninit +ffffffff81a2ecc0 t bxt_display_core_uninit +ffffffff81a2ed70 T intel_power_domains_resume +ffffffff81a2ee40 T intel_display_power_suspend_late +ffffffff81a2ef30 t hsw_enable_pc8 +ffffffff81a2f8c0 T intel_display_power_resume_early +ffffffff81a2f9b0 t hsw_disable_pc8 +ffffffff81a2fe10 T intel_display_power_suspend +ffffffff81a2fe90 T intel_display_power_resume +ffffffff81a2ff70 T intel_display_power_debug +ffffffff81a30040 T intel_display_power_ddi_io_domain +ffffffff81a30120 T intel_display_power_ddi_lanes_domain +ffffffff81a30200 T intel_display_power_legacy_aux_domain +ffffffff81a30310 T intel_display_power_tbt_aux_domain +ffffffff81a30420 t __delayed_work_tick +ffffffff81a31000 T intel_display_power_map_init +ffffffff81a31170 t __set_power_wells +ffffffff81a31550 T intel_display_power_map_cleanup +ffffffff81a32000 T lookup_power_well +ffffffff81a320c0 T intel_power_well_enable +ffffffff81a32150 T intel_power_well_name +ffffffff81a32190 T intel_power_well_disable +ffffffff81a32200 T intel_power_well_sync_hw +ffffffff81a32270 T intel_power_well_get +ffffffff81a32310 T intel_power_well_put +ffffffff81a32410 T intel_power_well_is_enabled +ffffffff81a32430 T intel_power_well_is_enabled_cached +ffffffff81a32460 T intel_display_power_well_is_enabled +ffffffff81a32520 T intel_power_well_is_always_on +ffffffff81a32560 T intel_power_well_domains +ffffffff81a32590 T intel_power_well_refcount +ffffffff81a325c0 T gen9_sanitize_dc_state +ffffffff81a326a0 T gen9_set_dc_state +ffffffff81a329f0 T gen9_enable_dc5 +ffffffff81a32c50 T skl_enable_dc6 +ffffffff81a32da0 T bxt_enable_dc9 +ffffffff81a32f50 T bxt_disable_dc9 +ffffffff81a33040 T gen9_disable_dc_states +ffffffff81a33410 T chv_phy_powergate_ch +ffffffff81a33520 t assert_chv_phy_status +ffffffff81a338c0 T chv_phy_powergate_lanes +ffffffff81a33b80 t i9xx_power_well_sync_hw_noop +ffffffff81a33bb0 t i9xx_always_on_power_well_noop +ffffffff81a33be0 t i9xx_always_on_power_well_enabled +ffffffff81a33c10 t chv_pipe_power_well_sync_hw +ffffffff81a33c40 t chv_pipe_power_well_enable +ffffffff81a33c70 t chv_pipe_power_well_disable +ffffffff81a33cd0 t chv_pipe_power_well_enabled +ffffffff81a33dd0 t chv_dpio_cmn_power_well_enable +ffffffff81a33fe0 t chv_dpio_cmn_power_well_disable +ffffffff81a34110 t vlv_power_well_enabled +ffffffff81a34220 t i830_pipes_power_well_sync_hw +ffffffff81a34310 t i830_pipes_power_well_enable +ffffffff81a343d0 t i830_pipes_power_well_disable +ffffffff81a34400 t i830_pipes_power_well_enabled +ffffffff81a344a0 t hsw_power_well_sync_hw +ffffffff81a34590 t hsw_power_well_enable +ffffffff81a34810 t hsw_power_well_disable +ffffffff81a348c0 t hsw_power_well_enabled +ffffffff81a349a0 t gen9_dc_off_power_well_enable +ffffffff81a349b0 t gen9_dc_off_power_well_disable +ffffffff81a34a50 t gen9_dc_off_power_well_enabled +ffffffff81a34ae0 t bxt_dpio_cmn_power_well_enable +ffffffff81a34b10 t bxt_dpio_cmn_power_well_disable +ffffffff81a34b40 t bxt_dpio_cmn_power_well_enabled +ffffffff81a34b70 t vlv_display_power_well_enable +ffffffff81a34ba0 t vlv_display_power_well_disable +ffffffff81a34c10 t vlv_dpio_cmn_power_well_enable +ffffffff81a34c90 t vlv_dpio_cmn_power_well_disable +ffffffff81a34d90 t vlv_power_well_enable +ffffffff81a34db0 t vlv_power_well_disable +ffffffff81a34dd0 t icl_aux_power_well_enable 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+ffffffff81a38a10 T intel_dmc_disable_program +ffffffff81a38c30 T assert_dmc_loaded +ffffffff81a38d80 T intel_dmc_ucode_init +ffffffff81a39050 t dmc_load_work_fn +ffffffff81a39880 T intel_dmc_ucode_suspend +ffffffff81a398f0 T intel_dmc_ucode_resume +ffffffff81a39990 T intel_dmc_ucode_fini +ffffffff81a39ac0 T intel_dmc_print_error_state +ffffffff81a39b70 T intel_dmc_debugfs_register +ffffffff81a3a000 T intel_dp_is_edp +ffffffff81a3a030 T intel_dp_is_uhbr +ffffffff81a3a070 T intel_dp_max_lane_count +ffffffff81a3a0e0 T intel_dp_link_required +ffffffff81a3a120 T intel_dp_max_data_rate +ffffffff81a3a190 T intel_dp_can_bigjoiner +ffffffff81a3a1e0 T intel_dp_get_link_train_fallback_values +ffffffff81a3a5c0 T intel_dp_mode_to_fec_clock +ffffffff81a3a610 T intel_dp_min_bpp +ffffffff81a3a650 T intel_dp_source_supports_tps3 +ffffffff81a3a6a0 T intel_dp_source_supports_tps4 +ffffffff81a3a6d0 T intel_dp_max_link_rate +ffffffff81a3a790 T intel_dp_rate_select +ffffffff81a3a830 T intel_dp_compute_rate +ffffffff81a3a900 T intel_dp_adjust_compliance_config +ffffffff81a3aa40 T intel_dp_limited_color_range +ffffffff81a3aab0 T intel_dp_compute_psr_vsc_sdp +ffffffff81a3ab30 T intel_dp_needs_vsc_sdp +ffffffff81a3ab80 t intel_dp_compute_vsc_colorimetry +ffffffff81a3ad00 T intel_dp_compute_config +ffffffff81a3b390 t intel_dp_compute_output_format +ffffffff81a3b5c0 T intel_dp_set_link_params +ffffffff81a3b600 T intel_edp_backlight_on +ffffffff81a3b6b0 T intel_edp_backlight_off +ffffffff81a3b760 T intel_dp_sink_set_decompression_state +ffffffff81a3b800 T intel_dp_wait_source_oui +ffffffff81a3b8d0 T intel_dp_set_power +ffffffff81a3bae0 T intel_dp_sync_state +ffffffff81a3bb60 t intel_dp_get_dpcd +ffffffff81a3bcc0 t intel_dp_reset_max_link_params +ffffffff81a3bdd0 T intel_dp_initial_fastset_check +ffffffff81a3bed0 T intel_dp_check_frl_training +ffffffff81a3c460 T intel_dp_pcon_dsc_configure +ffffffff81a3c630 T intel_dp_configure_protocol_converter +ffffffff81a3c7a0 T intel_dp_get_colorimetry_status +ffffffff81a3c800 T intel_edp_fixup_vbt_bpp +ffffffff81a3c8a0 T intel_write_dp_vsc_sdp +ffffffff81a3ca30 T intel_dp_set_infoframes +ffffffff81a3cb60 t intel_write_dp_sdp +ffffffff81a3ce50 T intel_read_dp_sdp +ffffffff81a3d180 T intel_dp_retrain_link +ffffffff81a3d840 T intel_dp_phy_test +ffffffff81a3df20 T intel_digital_port_connected +ffffffff81a3dfc0 T intel_dp_encoder_flush_work +ffffffff81a3e010 T intel_dp_encoder_suspend +ffffffff81a3e050 T intel_dp_encoder_shutdown +ffffffff81a3e090 T intel_dp_hpd_pulse +ffffffff81a3e800 T intel_dp_is_port_edp +ffffffff81a3e850 T intel_dp_init_connector +ffffffff81a3f9a0 t intel_dp_modeset_retry_work_fn +ffffffff81a3fa20 t intel_dp_set_common_rates +ffffffff81a3fbc0 T intel_dp_mst_suspend +ffffffff81a3fc60 T intel_dp_mst_resume +ffffffff81a3fd10 t intel_dp_compute_link_config +ffffffff81a40ab0 t intel_dp_dsc_get_slice_count +ffffffff81a40c20 t intel_dp_set_sink_rates +ffffffff81a40e50 t intel_dp_check_device_service_irq +ffffffff81a41420 t intel_dp_force +ffffffff81a41560 t intel_dp_connector_register +ffffffff81a41640 t intel_dp_connector_unregister +ffffffff81a416a0 t intel_dp_oob_hotplug_event +ffffffff81a41720 t intel_dp_set_edid +ffffffff81a41b50 t intel_dp_get_modes +ffffffff81a41c50 t intel_dp_detect +ffffffff81a42540 t intel_dp_mode_valid +ffffffff81a42ce0 t intel_dp_connector_atomic_check +ffffffff81a43020 t intel_dp_get_dsc_sink_cap +ffffffff81a44000 T intel_dp_aux_fini +ffffffff81a44020 T intel_dp_aux_init +ffffffff81a44200 t xelpdp_aux_ctl_reg +ffffffff81a442c0 t xelpdp_aux_data_reg +ffffffff81a44390 t tgl_aux_ctl_reg +ffffffff81a44410 t tgl_aux_data_reg +ffffffff81a444a0 t skl_aux_ctl_reg +ffffffff81a44520 t skl_aux_data_reg +ffffffff81a445b0 t ilk_aux_ctl_reg +ffffffff81a44630 t ilk_aux_data_reg +ffffffff81a446c0 t g4x_aux_ctl_reg +ffffffff81a44740 t g4x_aux_data_reg +ffffffff81a447d0 t skl_get_aux_clock_divider +ffffffff81a44800 t hsw_get_aux_clock_divider +ffffffff81a448a0 t ilk_get_aux_clock_divider +ffffffff81a44900 t g4x_get_aux_clock_divider +ffffffff81a44950 t skl_get_aux_send_ctl +ffffffff81a449d0 t g4x_get_aux_send_ctl +ffffffff81a44a20 t kasprintf +ffffffff81a44af0 t intel_dp_aux_transfer +ffffffff81a44d40 t intel_dp_aux_xfer +ffffffff81a46000 T intel_dp_aux_init_backlight_funcs +ffffffff81a46270 t intel_dp_aux_hdr_setup_backlight +ffffffff81a463c0 t intel_dp_aux_hdr_get_backlight +ffffffff81a46530 t intel_dp_aux_hdr_set_backlight +ffffffff81a46620 t intel_dp_aux_hdr_disable_backlight +ffffffff81a466a0 t intel_dp_aux_hdr_enable_backlight +ffffffff81a468e0 t intel_dp_aux_vesa_setup_backlight +ffffffff81a46aa0 t intel_dp_aux_vesa_get_backlight +ffffffff81a46ad0 t intel_dp_aux_vesa_set_backlight +ffffffff81a46b70 t intel_dp_aux_vesa_disable_backlight +ffffffff81a46c20 t intel_dp_aux_vesa_enable_backlight +ffffffff81a47000 T intel_dp_hdcp_init +ffffffff81a470b0 t intel_dp_hdcp_write_an_aksv +ffffffff81a471a0 t intel_dp_hdcp_read_bksv +ffffffff81a47230 t intel_dp_hdcp_read_bstatus +ffffffff81a472c0 t intel_dp_hdcp_repeater_present +ffffffff81a47370 t intel_dp_hdcp_read_ri_prime +ffffffff81a47400 t intel_dp_hdcp_read_ksv_ready +ffffffff81a474a0 t intel_dp_hdcp_read_ksv_fifo +ffffffff81a47590 t intel_dp_hdcp_read_v_prime_part +ffffffff81a47630 t intel_dp_hdcp_toggle_signalling +ffffffff81a47660 t intel_dp_mst_hdcp_stream_encryption +ffffffff81a47860 t intel_dp_hdcp_check_link +ffffffff81a478f0 t intel_dp_hdcp_capable +ffffffff81a479a0 t intel_dp_hdcp2_capable +ffffffff81a47a20 t intel_dp_hdcp2_write_msg +ffffffff81a47ae0 t intel_dp_hdcp2_read_msg +ffffffff81a48200 t intel_dp_hdcp2_config_stream_type +ffffffff81a482b0 t intel_dp_mst_hdcp2_stream_encryption +ffffffff81a48530 t intel_dp_mst_hdcp2_check_link +ffffffff81a485f0 t get_hdcp2_dp_msg_data +ffffffff81a48730 t intel_dp_hdcp2_check_link +ffffffff81a49000 T intel_dp_init_lttpr_and_dprx_caps +ffffffff81a492c0 T intel_dp_get_adjust_train +ffffffff81a49980 T intel_dp_program_link_training_pattern +ffffffff81a49a80 T intel_dp_set_signal_levels +ffffffff81a49de0 T intel_dp_dump_link_status +ffffffff81a49eb0 T intel_dp_stop_link_train +ffffffff81a4a0e0 T intel_dp_start_link_train +ffffffff81a4b210 t intel_dp_link_train_phy +ffffffff81a4d000 T intel_dp_mst_encoder_active_links +ffffffff81a4d030 T intel_dp_mst_encoder_init +ffffffff81a4d270 T intel_dp_mst_source_support +ffffffff81a4d2b0 T intel_dp_mst_encoder_cleanup +ffffffff81a4d310 T intel_dp_mst_is_master_trans +ffffffff81a4d350 T intel_dp_mst_is_slave_trans +ffffffff81a4d390 T intel_dp_mst_add_topology_state_for_crtc +ffffffff81a4d460 t intel_dp_add_mst_connector +ffffffff81a4d670 t intel_dp_mst_poll_hpd_irq +ffffffff81a4d690 t intel_dp_mst_get_hw_state +ffffffff81a4d6f0 t intel_dp_mst_connector_late_register +ffffffff81a4d760 t intel_dp_mst_connector_early_unregister +ffffffff81a4d790 t intel_dp_mst_get_modes +ffffffff81a4d830 t intel_dp_mst_detect +ffffffff81a4d930 t intel_dp_mst_mode_valid_ctx +ffffffff81a4da90 t intel_mst_atomic_best_encoder +ffffffff81a4daf0 t intel_dp_mst_atomic_check +ffffffff81a4dc70 t intel_dp_mst_compute_config +ffffffff81a4df80 t intel_dp_mst_compute_config_late +ffffffff81a4e080 t intel_mst_disable_dp +ffffffff81a4e170 t intel_mst_post_disable_dp +ffffffff81a4e430 t intel_mst_pre_pll_enable_dp +ffffffff81a4e480 t intel_mst_pre_enable_dp +ffffffff81a4e6a0 t intel_mst_enable_dp +ffffffff81a4ea90 t intel_dp_mst_enc_get_hw_state +ffffffff81a4ead0 t intel_dp_mst_enc_get_config +ffffffff81a4eaf0 t intel_dp_mst_initial_fastset_check +ffffffff81a4eb10 t intel_dp_mst_encoder_destroy +ffffffff81a4f000 T bxt_port_to_phy_channel +ffffffff81a4f130 T bxt_ddi_phy_set_signal_levels +ffffffff81a4f650 T bxt_ddi_phy_is_enabled +ffffffff81a4f7a0 T bxt_ddi_phy_uninit +ffffffff81a4f8a0 T bxt_ddi_phy_init +ffffffff81a4fad0 t _bxt_ddi_phy_init +ffffffff81a500e0 T bxt_ddi_phy_verify_state +ffffffff81a50420 t __phy_reg_verify_state +ffffffff81a50520 T bxt_ddi_phy_calc_lane_lat_optim_mask +ffffffff81a50590 T bxt_ddi_phy_set_lane_optim_mask +ffffffff81a508c0 T bxt_ddi_phy_get_lane_lat_optim_mask +ffffffff81a50b10 T chv_set_phy_signal_level +ffffffff81a50e70 T chv_data_lane_soft_reset +ffffffff81a51050 T chv_phy_pre_pll_enable +ffffffff81a512f0 T chv_phy_pre_encoder_enable +ffffffff81a51580 T chv_phy_release_cl2_override +ffffffff81a51610 T chv_phy_post_pll_disable +ffffffff81a516c0 T vlv_set_phy_signal_level +ffffffff81a51840 T vlv_phy_pre_pll_enable +ffffffff81a51960 T vlv_phy_pre_encoder_enable +ffffffff81a51a80 T vlv_phy_reset_lanes +ffffffff81a52000 T pnv_calc_dpll_params +ffffffff81a520c0 T i9xx_calc_dpll_params +ffffffff81a52190 T vlv_calc_dpll_params +ffffffff81a52250 T chv_calc_dpll_params +ffffffff81a52320 T bxt_find_best_dpll +ffffffff81a52340 t chv_find_best_dpll +ffffffff81a52680 T i9xx_dpll_compute_fp +ffffffff81a526c0 T vlv_compute_dpll +ffffffff81a52740 T chv_compute_dpll +ffffffff81a527c0 T intel_dpll_crtc_compute_clock +ffffffff81a528c0 T intel_dpll_crtc_get_shared_dpll +ffffffff81a52a10 T intel_dpll_init_clock_hook +ffffffff81a52b00 T i9xx_enable_pll +ffffffff81a52eb0 T vlv_enable_pll +ffffffff81a53410 T chv_enable_pll +ffffffff81a53a90 T vlv_force_pll_on +ffffffff81a53be0 T vlv_disable_pll +ffffffff81a53ca0 T chv_disable_pll +ffffffff81a53dd0 T i9xx_disable_pll +ffffffff81a53ed0 T vlv_force_pll_off +ffffffff81a53fc0 T assert_pll_enabled +ffffffff81a540a0 T assert_pll_disabled +ffffffff81a54180 t intel_pll_is_valid +ffffffff81a54250 t dg2_crtc_compute_clock +ffffffff81a542d0 t hsw_crtc_compute_clock +ffffffff81a54390 t hsw_crtc_get_shared_dpll +ffffffff81a54430 t ilk_crtc_compute_clock +ffffffff81a54730 t ilk_crtc_get_shared_dpll +ffffffff81a54780 t g4x_find_best_dpll +ffffffff81a54ac0 t chv_crtc_compute_clock +ffffffff81a54bd0 t vlv_crtc_compute_clock +ffffffff81a55090 t g4x_crtc_compute_clock +ffffffff81a551e0 t i9xx_compute_dpll +ffffffff81a55460 t pnv_crtc_compute_clock +ffffffff81a55820 t i9xx_crtc_compute_clock +ffffffff81a55940 t i9xx_find_best_dpll +ffffffff81a55c70 t i8xx_crtc_compute_clock +ffffffff81a56000 T intel_get_shared_dpll_by_id +ffffffff81a56040 T intel_get_shared_dpll_id +ffffffff81a560d0 T assert_shared_dpll +ffffffff81a561f0 T intel_dpll_get_hw_state +ffffffff81a56220 T icl_tc_port_to_pll_id +ffffffff81a56250 T intel_enable_shared_dpll +ffffffff81a56540 T intel_disable_shared_dpll +ffffffff81a56780 T intel_shared_dpll_swap_state +ffffffff81a56860 T icl_set_active_port_dpll +ffffffff81a568a0 T intel_shared_dpll_init +ffffffff81a56ab0 T intel_compute_shared_dplls +ffffffff81a56b40 T intel_reserve_shared_dplls +ffffffff81a56bd0 T intel_release_shared_dplls +ffffffff81a56c10 T intel_update_active_dpll +ffffffff81a56c70 T intel_dpll_get_freq +ffffffff81a56d00 T intel_dpll_update_ref_clks +ffffffff81a56d50 T intel_dpll_readout_hw_state +ffffffff81a56ed0 T intel_dpll_sanitize_state +ffffffff81a56fb0 T intel_dpll_dump_hw_state +ffffffff81a57030 T intel_shared_dpll_state_verify +ffffffff81a57150 t verify_single_dpll_state +ffffffff81a57470 T intel_shared_dpll_verify_disabled +ffffffff81a574f0 t icl_compute_dplls +ffffffff81a582d0 t icl_get_dplls +ffffffff81a58a50 t icl_put_dplls +ffffffff81a58b10 t icl_update_active_dpll +ffffffff81a58bc0 t icl_update_dpll_ref_clks +ffffffff81a58c00 t icl_dump_hw_state +ffffffff81a58cc0 t combo_pll_enable +ffffffff81a58ee0 t combo_pll_disable +ffffffff81a58fd0 t combo_pll_get_hw_state +ffffffff81a59060 t icl_ddi_combo_pll_get_freq +ffffffff81a59230 t icl_dpll_write +ffffffff81a594d0 t adlp_cmtg_clock_gating_wa +ffffffff81a59630 t icl_pll_disable +ffffffff81a597d0 t icl_pll_get_hw_state +ffffffff81a59b10 t tbt_pll_enable +ffffffff81a59cc0 t tbt_pll_disable +ffffffff81a59ce0 t tbt_pll_get_hw_state +ffffffff81a59d00 t icl_ddi_tbt_pll_get_freq +ffffffff81a59d70 t mg_pll_enable +ffffffff81a5a320 t mg_pll_disable +ffffffff81a5a360 t dkl_pll_get_hw_state +ffffffff81a5a530 t icl_ddi_mg_pll_get_freq +ffffffff81a5a610 t intel_find_shared_dpll +ffffffff81a5a940 t intel_unreference_shared_dpll +ffffffff81a5aaa0 t mg_pll_get_hw_state +ffffffff81a5acf0 t bxt_compute_dpll +ffffffff81a5b010 t bxt_get_dpll +ffffffff81a5b270 t intel_put_dpll +ffffffff81a5b2d0 t bxt_update_dpll_ref_clks +ffffffff81a5b310 t bxt_dump_hw_state +ffffffff81a5b3c0 t bxt_ddi_pll_enable +ffffffff81a5bec0 t bxt_ddi_pll_disable +ffffffff81a5c0d0 t bxt_ddi_pll_get_hw_state +ffffffff81a5c560 t bxt_ddi_pll_get_freq +ffffffff81a5c5f0 t bxt_ddi_set_dpll_hw_state +ffffffff81a5c7b0 t skl_compute_dpll +ffffffff81a5cf30 t skl_get_dpll +ffffffff81a5d160 t skl_update_dpll_ref_clks +ffffffff81a5d1a0 t skl_dump_hw_state +ffffffff81a5d200 t skl_ddi_dpll0_enable +ffffffff81a5d2c0 t skl_ddi_dpll0_disable +ffffffff81a5d2f0 t skl_ddi_dpll0_get_hw_state +ffffffff81a5d3f0 t skl_ddi_pll_get_freq +ffffffff81a5d480 t skl_ddi_wrpll_get_freq +ffffffff81a5d5e0 t skl_ddi_pll_enable +ffffffff81a5d7f0 t skl_ddi_pll_disable +ffffffff81a5d880 t skl_ddi_pll_get_hw_state +ffffffff81a5d9a0 t hsw_compute_dpll +ffffffff81a5e1f0 t hsw_get_dpll +ffffffff81a5e4b0 t hsw_update_dpll_ref_clks +ffffffff81a5e520 t hsw_dump_hw_state +ffffffff81a5e550 t hsw_ddi_wrpll_enable +ffffffff81a5e5d0 t hsw_ddi_wrpll_disable +ffffffff81a5e6b0 t hsw_ddi_wrpll_get_hw_state +ffffffff81a5e750 t hsw_ddi_wrpll_get_freq +ffffffff81a5e840 t hsw_ddi_spll_enable +ffffffff81a5e8a0 t hsw_ddi_spll_disable +ffffffff81a5e970 t hsw_ddi_spll_get_hw_state +ffffffff81a5ea00 t hsw_ddi_spll_get_freq +ffffffff81a5eaa0 t hsw_ddi_lcpll_enable +ffffffff81a5ead0 t hsw_ddi_lcpll_disable +ffffffff81a5eb00 t hsw_ddi_lcpll_get_hw_state +ffffffff81a5eb30 t hsw_ddi_lcpll_get_freq +ffffffff81a5ebb0 t ibx_compute_dpll +ffffffff81a5ebe0 t ibx_get_dpll +ffffffff81a5ee60 t ibx_dump_hw_state +ffffffff81a5eec0 t ibx_pch_dpll_enable +ffffffff81a5f070 t ibx_pch_dpll_disable +ffffffff81a5f0f0 t ibx_pch_dpll_get_hw_state +ffffffff81a60000 T intel_dpt_pin +ffffffff81a601e0 T intel_dpt_unpin +ffffffff81a60250 T intel_dpt_resume +ffffffff81a60330 T intel_dpt_suspend +ffffffff81a60400 T intel_dpt_create +ffffffff81a60730 t dpt_insert_page +ffffffff81a607a0 t dpt_clear_range +ffffffff81a607d0 t dpt_insert_entries +ffffffff81a608d0 t dpt_cleanup +ffffffff81a60920 t dpt_bind_vma +ffffffff81a609b0 t dpt_unbind_vma +ffffffff81a609e0 T intel_dpt_destroy +ffffffff81a60a30 t __ww_mutex_lock +ffffffff81a61000 T intel_drrs_type_str +ffffffff81a61040 T intel_drrs_is_active +ffffffff81a61070 T intel_drrs_activate +ffffffff81a61270 T intel_drrs_deactivate +ffffffff81a61350 t intel_drrs_set_state +ffffffff81a614a0 T intel_drrs_invalidate +ffffffff81a614c0 t intel_drrs_frontbuffer_update +ffffffff81a61620 T intel_drrs_flush +ffffffff81a61640 T intel_crtc_drrs_init +ffffffff81a616e0 t intel_drrs_downclock_work +ffffffff81a61740 t __delayed_work_tick +ffffffff81a62000 T intel_dsb_indexed_reg_write +ffffffff81a62140 T intel_dsb_reg_write +ffffffff81a62230 T intel_dsb_commit +ffffffff81a62680 T intel_dsb_prepare +ffffffff81a62810 T intel_dsb_cleanup +ffffffff81a63000 T intel_dsi_bitrate +ffffffff81a630a0 T intel_dsi_tlpx_ns +ffffffff81a630f0 T intel_dsi_get_modes +ffffffff81a63100 T intel_dsi_mode_valid +ffffffff81a631c0 T intel_dsi_host_init +ffffffff81a63270 T intel_dsi_get_panel_orientation +ffffffff81a64000 T intel_dsi_dcs_init_backlight_funcs +ffffffff81a640a0 t dcs_setup_backlight +ffffffff81a64100 t dcs_get_backlight +ffffffff81a64200 t dcs_set_backlight +ffffffff81a642f0 t dcs_disable_backlight +ffffffff81a64670 t dcs_enable_backlight +ffffffff81a65000 T intel_dsi_vbt_exec_sequence +ffffffff81a65020 T intel_dsi_log_params +ffffffff81a653a0 T intel_dsi_vbt_init +ffffffff81a65830 T intel_dsi_vbt_gpio_init +ffffffff81a65850 T intel_dsi_vbt_gpio_cleanup +ffffffff81a66000 T intel_dvo_init +ffffffff81a664f0 t intel_disable_dvo +ffffffff81a665a0 t intel_enable_dvo +ffffffff81a66690 t intel_dvo_get_hw_state +ffffffff81a66700 t intel_dvo_get_config +ffffffff81a667b0 t intel_dvo_compute_config +ffffffff81a66840 t intel_dvo_pre_enable +ffffffff81a66930 t intel_dvo_connector_get_hw_state +ffffffff81a669b0 t intel_dvo_enc_destroy +ffffffff81a669f0 t intel_dvo_detect +ffffffff81a66af0 t intel_dvo_get_modes +ffffffff81a66b60 t intel_dvo_mode_valid +ffffffff81a67000 T intel_fb_get_format_info +ffffffff81a67240 T intel_fb_is_ccs_modifier +ffffffff81a67410 T intel_fb_is_rc_ccs_cc_modifier +ffffffff81a675e0 T intel_fb_is_mc_ccs_modifier +ffffffff81a677b0 T intel_fb_plane_get_modifiers +ffffffff81a678f0 T intel_fb_plane_supports_modifier +ffffffff81a67960 T intel_format_info_is_yuv_semiplanar +ffffffff81a67c00 T intel_fb_is_ccs_aux_plane +ffffffff81a67e40 T intel_fb_rc_ccs_cc_plane +ffffffff81a680a0 T is_surface_linear +ffffffff81a683d0 T main_to_ccs_plane +ffffffff81a686b0 T skl_ccs_to_main_plane +ffffffff81a689a0 T skl_main_to_aux_plane +ffffffff81a68c00 T intel_tile_size +ffffffff81a68c40 T intel_tile_width_bytes +ffffffff81a68e90 T intel_tile_height +ffffffff81a68ef0 T intel_tile_row_size +ffffffff81a68f70 T intel_fb_align_height +ffffffff81a68ff0 T intel_fb_uses_dpt +ffffffff81a69040 T intel_cursor_alignment +ffffffff81a690a0 T intel_surf_alignment +ffffffff81a692c0 T intel_fb_plane_get_subsampling +ffffffff81a69690 T intel_plane_adjust_aligned_offset +ffffffff81a69700 t intel_adjust_aligned_offset +ffffffff81a698b0 T intel_plane_compute_aligned_offset +ffffffff81a699b0 t intel_compute_aligned_offset +ffffffff81a69b70 T intel_fb_needs_pot_stride_remap +ffffffff81a69bc0 T intel_fb_supports_90_270_rotation +ffffffff81a69c10 T intel_fill_fb_info +ffffffff81a6a850 t calc_plane_remap_info +ffffffff81a6b2b0 T intel_fb_fill_view +ffffffff81a6b300 T intel_plane_compute_gtt +ffffffff81a6bbd0 t intel_plane_check_stride +ffffffff81a6bf40 T intel_framebuffer_init +ffffffff81a6d330 T intel_user_framebuffer_create +ffffffff81a6d470 T intel_framebuffer_create +ffffffff81a6d500 t intel_adjust_tile_offset +ffffffff81a6d640 t intel_user_framebuffer_destroy +ffffffff81a6d6a0 t intel_user_framebuffer_create_handle +ffffffff81a6d6c0 t intel_user_framebuffer_dirty +ffffffff81a6e000 T intel_pin_and_fence_fb_obj +ffffffff81a6e320 t i915_gem_object_lock +ffffffff81a6e530 T intel_unpin_fb_vma +ffffffff81a6e5a0 T intel_plane_pin_fb +ffffffff81a6e8d0 T intel_plane_unpin_fb +ffffffff81a6f000 T intel_fbc_cleanup +ffffffff81a6f1c0 T intel_fbc_pre_update +ffffffff81a6f810 T intel_fbc_post_update +ffffffff81a6fa60 T intel_fbc_invalidate +ffffffff81a6fc80 T intel_fbc_flush +ffffffff81a6ff10 T intel_fbc_atomic_check +ffffffff81a70480 T intel_fbc_disable +ffffffff81a70540 t __intel_fbc_disable +ffffffff81a706d0 T intel_fbc_update +ffffffff81a70d90 T intel_fbc_reset_underrun +ffffffff81a70ef0 T intel_fbc_handle_fifo_underrun_irq +ffffffff81a70fa0 T intel_fbc_add_plane +ffffffff81a70fd0 T intel_fbc_init +ffffffff81a71260 T intel_fbc_sanitize +ffffffff81a71330 T intel_fbc_crtc_debugfs_add +ffffffff81a71360 T intel_fbc_debugfs_register +ffffffff81a71390 t intel_fbc_is_ok +ffffffff81a714b0 t intel_fbc_update_state +ffffffff81a71820 t intel_fbc_underrun_work_fn +ffffffff81a71940 t ivb_fbc_activate +ffffffff81a71ba0 t ilk_fbc_deactivate +ffffffff81a71c50 t ilk_fbc_is_active +ffffffff81a71cb0 t ivb_fbc_is_compressing +ffffffff81a71d20 t snb_fbc_nuke +ffffffff81a71da0 t ilk_fbc_program_cfb +ffffffff81a71de0 t ivb_fbc_set_false_color +ffffffff81a71ea0 t snb_fbc_activate +ffffffff81a71f30 t ilk_fbc_is_compressing +ffffffff81a71fa0 t ilk_fbc_activate +ffffffff81a720d0 t i965_fbc_nuke +ffffffff81a72170 t g4x_fbc_activate +ffffffff81a72280 t g4x_fbc_deactivate +ffffffff81a72310 t g4x_fbc_is_active +ffffffff81a72370 t g4x_fbc_is_compressing +ffffffff81a723d0 t g4x_fbc_program_cfb +ffffffff81a72400 t i8xx_fbc_activate +ffffffff81a72570 t i8xx_fbc_deactivate +ffffffff81a72640 t i8xx_fbc_is_active +ffffffff81a726a0 t i8xx_fbc_is_compressing +ffffffff81a72700 t i8xx_fbc_program_cfb +ffffffff81a72780 t i8xx_fbc_nuke +ffffffff81a73000 T intel_fbdev_init +ffffffff81a734d0 t intel_fbdev_suspend_worker +ffffffff81a73500 T intel_fbdev_initial_config_async +ffffffff81a73570 T intel_fbdev_unregister +ffffffff81a735b0 T intel_fbdev_set_suspend +ffffffff81a735e0 T intel_fbdev_fini +ffffffff81a73670 T intel_fbdev_output_poll_changed +ffffffff81a73710 T intel_fbdev_restore_mode +ffffffff81a73790 T intel_fbdev_framebuffer +ffffffff81a737d0 t intelfb_create +ffffffff81a73dd0 t intel_fbdev_set_par +ffffffff81a74000 T assert_fdi_tx_enabled +ffffffff81a740e0 T assert_fdi_tx_disabled +ffffffff81a741c0 T assert_fdi_rx_enabled +ffffffff81a74280 T assert_fdi_rx_disabled +ffffffff81a74340 T assert_fdi_tx_pll_enabled +ffffffff81a743f0 T assert_fdi_rx_pll_enabled +ffffffff81a744b0 T assert_fdi_rx_pll_disabled +ffffffff81a74570 T intel_fdi_link_train +ffffffff81a74590 T intel_fdi_pll_freq_update +ffffffff81a74640 T intel_fdi_link_freq +ffffffff81a74690 T ilk_fdi_compute_config +ffffffff81a749d0 T intel_fdi_normal_train +ffffffff81a74b60 T hsw_fdi_link_train +ffffffff81a75060 T hsw_fdi_disable +ffffffff81a751c0 T ilk_fdi_pll_enable +ffffffff81a753d0 T ilk_fdi_pll_disable +ffffffff81a75500 T ilk_fdi_disable +ffffffff81a75770 T intel_fdi_init_hook +ffffffff81a757d0 t ilk_fdi_link_train +ffffffff81a75e40 t gen6_fdi_link_train +ffffffff81a76670 t ivb_manual_fdi_link_train +ffffffff81a76f10 t cpt_set_fdi_bc_bifurcation +ffffffff81a78000 T intel_set_cpu_fifo_underrun_reporting +ffffffff81a783e0 T intel_set_pch_fifo_underrun_reporting +ffffffff81a78610 T intel_cpu_fifo_underrun_irq_handler +ffffffff81a78800 T intel_pch_fifo_underrun_irq_handler +ffffffff81a78880 T intel_check_cpu_fifo_underruns +ffffffff81a78aa0 T intel_check_pch_fifo_underruns +ffffffff81a79000 T intel_frontbuffer_flip_prepare +ffffffff81a79050 T intel_frontbuffer_flip_complete +ffffffff81a79130 T intel_frontbuffer_flip +ffffffff81a79200 T __intel_fb_invalidate +ffffffff81a79290 T __intel_fb_flush +ffffffff81a79380 T intel_frontbuffer_get +ffffffff81a794c0 t frontbuffer_active +ffffffff81a794f0 t frontbuffer_retire +ffffffff81a79530 T intel_frontbuffer_put +ffffffff81a796c0 T intel_frontbuffer_track +ffffffff81a7a000 T intel_atomic_global_obj_init +ffffffff81a7a070 T intel_atomic_global_obj_cleanup +ffffffff81a7a170 T intel_atomic_get_global_obj_state +ffffffff81a7a3e0 T intel_atomic_get_old_global_obj_state +ffffffff81a7a440 T intel_atomic_get_new_global_obj_state +ffffffff81a7a4a0 T intel_atomic_swap_global_state +ffffffff81a7a5f0 T intel_atomic_clear_global_state +ffffffff81a7a720 T intel_atomic_lock_global_state +ffffffff81a7a7a0 T intel_atomic_serialize_global_state +ffffffff81a7b000 T intel_gmbus_is_valid_pin +ffffffff81a7b110 T intel_gmbus_reset +ffffffff81a7b170 T intel_bb_set_bits +ffffffff81a7b2a0 T intel_bb_set_dir +ffffffff81a7b2d0 T intel_bb_read_bits +ffffffff81a7b450 T intel_acquire_bus +ffffffff81a7b650 T intel_release_bus +ffffffff81a7b7f0 T intel_send_start +ffffffff81a7b810 T intel_send_stop +ffffffff81a7b830 T intel_initiate_xfer +ffffffff81a7b850 T intel_read_byte +ffffffff81a7b870 T intel_write_byte +ffffffff81a7b890 T intel_gmbus_output_aksv +ffffffff81a7b960 t do_gmbus_xfer +ffffffff81a7bf60 T intel_gmbus_setup +ffffffff81a7c2f0 T intel_gmbus_teardown +ffffffff81a7c370 T intel_gmbus_get_adapter +ffffffff81a7c3f0 T intel_gmbus_force_bit +ffffffff81a7c490 T intel_gmbus_is_forced_bit +ffffffff81a7c4c0 t gmbus_xfer_read +ffffffff81a7c790 t gmbus_xfer_write +ffffffff81a7c9e0 t gmbus_wait +ffffffff81a7cdc0 t gmbus_wait_idle +ffffffff81a7cf50 t gmbus_xfer +ffffffff81a7d030 t gmbus_func +ffffffff81a7d070 t gmbus_lock_bus +ffffffff81a7d090 t gmbus_trylock_bus +ffffffff81a7d0f0 t gmbus_unlock_bus +ffffffff81a7e000 T intel_hdcp_capable +ffffffff81a7e0a0 t intel_hdcp_read_valid_bksv +ffffffff81a7e320 T intel_hdcp2_capable +ffffffff81a7e400 T is_hdcp_supported +ffffffff81a7e450 T intel_hdcp_component_init +ffffffff81a7e480 T intel_hdcp_init +ffffffff81a7e5c0 t intel_hdcp_check_work +ffffffff81a82480 t intel_hdcp_prop_work +ffffffff81a82500 T intel_hdcp_enable +ffffffff81a82550 T intel_hdcp_disable +ffffffff81a82680 t intel_hdcp_update_value +ffffffff81a82840 t _intel_hdcp2_disable +ffffffff81a82c30 t _intel_hdcp_disable +ffffffff81a82f20 T intel_hdcp_update_pipe +ffffffff81a83090 T intel_hdcp_component_fini +ffffffff81a830d0 T intel_hdcp_cleanup +ffffffff81a83210 T intel_hdcp_atomic_check +ffffffff81a832a0 T intel_hdcp_handle_cp_irq +ffffffff81a833a0 t __delayed_work_tick +ffffffff81a833c0 t hdcp2_authenticate_repeater_topology +ffffffff81a836a0 t intel_hdcp_get_repeater_ctl +ffffffff81a84000 T hsw_write_infoframe +ffffffff81a84410 t hsw_dip_data_reg +ffffffff81a845d0 T hsw_read_infoframe +ffffffff81a84690 T intel_hdmi_infoframe_enable +ffffffff81a84730 T intel_hdmi_infoframes_enabled +ffffffff81a84850 T intel_read_infoframe +ffffffff81a849e0 T intel_hdmi_read_gcp_infoframe +ffffffff81a84ad0 T intel_dp_dual_mode_set_tmds_output +ffffffff81a84ba0 T intel_hdmi_tmds_clock +ffffffff81a84bf0 T intel_hdmi_bpc_possible +ffffffff81a84d20 T intel_hdmi_limited_color_range +ffffffff81a84d90 T intel_hdmi_compute_config +ffffffff81a854e0 t intel_hdmi_compute_output_format +ffffffff81a85610 T intel_hdmi_encoder_shutdown +ffffffff81a856e0 T intel_hdmi_handle_sink_scrambling +ffffffff81a85800 T intel_infoframe_init +ffffffff81a85980 t vlv_write_infoframe +ffffffff81a85ce0 t vlv_read_infoframe +ffffffff81a85eb0 t vlv_set_infoframes +ffffffff81a86250 t vlv_infoframes_enabled +ffffffff81a862f0 t g4x_write_infoframe +ffffffff81a865b0 t g4x_read_infoframe +ffffffff81a86700 t g4x_set_infoframes +ffffffff81a869a0 t g4x_infoframes_enabled +ffffffff81a86a20 t hsw_set_infoframes +ffffffff81a86cc0 t hsw_infoframes_enabled +ffffffff81a86d50 t ibx_write_infoframe +ffffffff81a87070 t ibx_read_infoframe +ffffffff81a871f0 t ibx_set_infoframes +ffffffff81a87560 t ibx_infoframes_enabled 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intel_hdmi_hdcp_repeater_present +ffffffff81a89ab0 t intel_hdmi_hdcp_read_ri_prime +ffffffff81a89b80 t intel_hdmi_hdcp_read_ksv_ready +ffffffff81a89c60 t intel_hdmi_hdcp_read_ksv_fifo +ffffffff81a89d30 t intel_hdmi_hdcp_read_v_prime_part +ffffffff81a89e20 t intel_hdmi_hdcp_toggle_signalling +ffffffff81a8a0a0 t intel_hdmi_hdcp_check_link +ffffffff81a8a3f0 t intel_hdmi_hdcp2_capable +ffffffff81a8a4b0 t intel_hdmi_hdcp2_write_msg +ffffffff81a8a5a0 t intel_hdmi_hdcp2_read_msg +ffffffff81a8aa40 t intel_hdmi_hdcp2_check_link +ffffffff81a8b000 T intel_hpd_pin_default +ffffffff81a8b030 T intel_encoder_hotplug +ffffffff81a8b160 T intel_hpd_trigger_irq +ffffffff81a8b1d0 T intel_hpd_irq_handler +ffffffff81a8b5b0 T intel_hpd_init +ffffffff81a8b6c0 T intel_hpd_poll_enable +ffffffff81a8b740 T intel_hpd_poll_disable +ffffffff81a8b7a0 T intel_hpd_init_work +ffffffff81a8b870 t i915_hotplug_work_func +ffffffff81a8bbc0 t i915_digport_work_func +ffffffff81a8bd50 t i915_hpd_poll_init_work +ffffffff81a8be60 t intel_hpd_irq_storm_reenable_work +ffffffff81a8c1b0 T intel_hpd_cancel_work +ffffffff81a8c2d0 T intel_hpd_disable +ffffffff81a8c360 T intel_hpd_enable +ffffffff81a8c3d0 t __delayed_work_tick +ffffffff81a8d000 T intel_lpe_audio_irq_handler +ffffffff81a8d020 T intel_lpe_audio_init +ffffffff81a8d050 T intel_lpe_audio_teardown +ffffffff81a8d070 T intel_lpe_audio_notify +ffffffff81a8e000 T lspcon_detect_hdr_capability +ffffffff81a8e0b0 T lspcon_write_infoframe +ffffffff81a8e820 T lspcon_read_infoframe +ffffffff81a8e860 T lspcon_set_infoframes +ffffffff81a8eac0 T lspcon_infoframes_enabled +ffffffff81a8ecb0 T lspcon_wait_pcon_mode +ffffffff81a8ecd0 t lspcon_wait_mode +ffffffff81a8ef90 T lspcon_init +ffffffff81a8f390 T intel_lspcon_infoframes_enabled +ffffffff81a8f3d0 T lspcon_resume +ffffffff81a8f680 t lspcon_change_mode +ffffffff81a90000 T intel_lvds_port_enabled +ffffffff81a90080 T intel_get_lvds_encoder +ffffffff81a900e0 T intel_is_dual_link_lvds +ffffffff81a90150 T intel_lvds_init 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+ffffffff81a95d60 t asle_work +ffffffff81a961e0 T intel_opregion_get_panel_type +ffffffff81a962d0 T intel_opregion_get_edid +ffffffff81a963b0 T intel_opregion_headless_sku +ffffffff81a96400 T intel_opregion_register +ffffffff81a96490 T intel_opregion_resume +ffffffff81a96520 T intel_opregion_suspend +ffffffff81a965c0 T intel_opregion_unregister +ffffffff81a96740 t intel_no_opregion_vbt_callback +ffffffff81a967a0 t intel_use_opregion_panel_type_callback +ffffffff81a97000 T intel_overlay_reset +ffffffff81a97050 T intel_overlay_switch_off +ffffffff81a97250 t intel_overlay_release_old_vid +ffffffff81a973f0 T intel_overlay_put_image_ioctl +ffffffff81a985c0 T intel_overlay_attrs_ioctl +ffffffff81a98a70 T intel_overlay_setup +ffffffff81a98cd0 t intel_overlay_last_flip_retire +ffffffff81a98d10 T intel_overlay_cleanup +ffffffff81a98dd0 T intel_overlay_capture_error_state +ffffffff81a98ec0 T intel_overlay_print_error_state +ffffffff81a99290 t intel_overlay_release_old_vid_tail +ffffffff81a99360 t intel_overlay_off_tail +ffffffff81a99510 t intel_overlay_flip_prepare +ffffffff81a9a000 T intel_panel_use_ssc +ffffffff81a9a060 T intel_panel_preferred_fixed_mode +ffffffff81a9a0b0 T intel_panel_fixed_mode +ffffffff81a9a170 T intel_panel_downclock_mode +ffffffff81a9a260 T intel_panel_highest_mode +ffffffff81a9a2c0 T intel_panel_get_modes +ffffffff81a9a350 T intel_panel_drrs_type +ffffffff81a9a3a0 T intel_panel_compute_config +ffffffff81a9a520 T intel_panel_add_edid_fixed_modes +ffffffff81a9aa50 T intel_panel_add_vbt_lfp_fixed_mode +ffffffff81a9aab0 t intel_panel_add_fixed_mode +ffffffff81a9ac30 T intel_panel_add_vbt_sdvo_fixed_mode +ffffffff81a9aca0 T intel_panel_add_encoder_fixed_mode +ffffffff81a9ace0 T intel_panel_fitting +ffffffff81a9b330 T intel_panel_detect +ffffffff81a9b3c0 T intel_panel_mode_valid +ffffffff81a9b4d0 T intel_panel_init_alloc +ffffffff81a9b520 T intel_panel_init +ffffffff81a9b5e0 T intel_panel_fini +ffffffff81a9c000 T intel_has_pch_trancoder +ffffffff81a9c060 T intel_crtc_pch_transcoder +ffffffff81a9c0a0 T intel_pch_transcoder_get_m1_n1 +ffffffff81a9c0f0 T intel_pch_transcoder_get_m2_n2 +ffffffff81a9c140 T ilk_pch_pre_enable +ffffffff81a9c170 T ilk_pch_enable +ffffffff81a9c710 t ilk_pch_transcoder_set_timings +ffffffff81a9c990 T ilk_pch_disable +ffffffff81a9c9b0 T ilk_pch_post_disable +ffffffff81a9cce0 T ilk_pch_get_config +ffffffff81a9cea0 T lpt_pch_enable +ffffffff81a9d0d0 T lpt_pch_disable +ffffffff81a9d1e0 T lpt_pch_get_config +ffffffff81a9d2b0 T intel_pch_sanitize +ffffffff81a9d590 t assert_pch_dp_disabled +ffffffff81a9d680 t assert_pch_hdmi_disabled +ffffffff81a9e000 T lpt_disable_iclkip +ffffffff81a9e070 T lpt_iclkip +ffffffff81a9e100 T lpt_program_iclkip +ffffffff81a9e380 T lpt_get_iclkip +ffffffff81a9e490 T lpt_disable_clkout_dp +ffffffff81a9e570 T intel_init_pch_refclk +ffffffff81aa0000 T intel_crtc_initial_plane_config +ffffffff81aa1000 T intel_pps_lock +ffffffff81aa1060 T intel_pps_unlock +ffffffff81aa10c0 T intel_pps_reset_all +ffffffff81aa1210 T intel_pps_check_power_unlocked +ffffffff81aa13d0 T intel_pps_wait_power_cycle +ffffffff81aa1590 T intel_pps_vdd_on_unlocked +ffffffff81aa1ac0 T intel_pps_vdd_on +ffffffff81aa1bc0 T intel_pps_vdd_off_sync +ffffffff81aa1c90 t intel_pps_vdd_off_sync_unlocked +ffffffff81aa1f70 T intel_pps_vdd_off_unlocked +ffffffff81aa2080 T intel_pps_on_unlocked +ffffffff81aa2480 T intel_pps_on +ffffffff81aa2520 T intel_pps_off_unlocked +ffffffff81aa2770 T intel_pps_off +ffffffff81aa2810 T intel_pps_backlight_on +ffffffff81aa2a20 T intel_pps_backlight_off +ffffffff81aa2c30 T intel_pps_backlight_power +ffffffff81aa2e00 T vlv_pps_init +ffffffff81aa2f60 t vlv_detach_power_sequencer +ffffffff81aa30e0 t vlv_steal_power_sequencer +ffffffff81aa3210 t pps_init_delays +ffffffff81aa3680 t pps_init_registers +ffffffff81aa3a20 T intel_pps_have_panel_power_or_vdd +ffffffff81aa3b80 T intel_pps_encoder_reset +ffffffff81aa3d10 t vlv_initial_power_sequencer_setup +ffffffff81aa3fc0 t pps_vdd_init +ffffffff81aa40d0 T intel_pps_init +ffffffff81aa4250 t edp_panel_vdd_work +ffffffff81aa4300 T intel_pps_init_late +ffffffff81aa4480 T intel_pps_unlock_regs_wa +ffffffff81aa4570 T intel_pps_setup +ffffffff81aa45e0 T assert_pps_unlocked +ffffffff81aa4830 t intel_pps_get_registers +ffffffff81aa4ef0 t wait_panel_status +ffffffff81aa51b0 t intel_pps_readout_hw_state +ffffffff81aa5370 t __delayed_work_tick +ffffffff81aa6000 T intel_psr_irq_handler +ffffffff81aa6680 T intel_psr_init_dpcd +ffffffff81aa6910 T intel_psr_compute_config +ffffffff81aa71b0 T intel_psr_get_config +ffffffff81aa7360 T intel_psr_disable +ffffffff81aa7470 t intel_psr_disable_locked +ffffffff81aa78e0 T intel_psr_pause +ffffffff81aa7ad0 t intel_psr_exit +ffffffff81aa7db0 T intel_psr_resume +ffffffff81aa7e40 t intel_psr_activate +ffffffff81aa85e0 T intel_psr2_disable_plane_sel_fetch +ffffffff81aa8650 T intel_psr2_program_plane_sel_fetch +ffffffff81aa8800 T intel_psr2_program_trans_man_trk_ctl +ffffffff81aa8950 T intel_psr2_sel_fetch_update +ffffffff81aa8fe0 T intel_psr_pre_plane_update +ffffffff81aa91b0 T intel_psr_post_plane_update +ffffffff81aa9c40 T intel_psr_wait_for_idle_locked +ffffffff81aa9e20 T intel_psr_debug_set +ffffffff81aaa050 t psr_irq_control +ffffffff81aaa1a0 T intel_psr_invalidate +ffffffff81aaa460 T intel_psr_flush +ffffffff81aaa930 T intel_psr_init +ffffffff81aaaa60 t intel_psr_work +ffffffff81aaac10 t tgl_dc3co_disable_work +ffffffff81aaac60 T intel_psr_short_pulse +ffffffff81aab020 T intel_psr_enabled +ffffffff81aab0a0 T intel_psr_lock +ffffffff81aab190 T intel_psr_unlock +ffffffff81aab280 t tgl_psr2_disable_dc3co +ffffffff81aab3b0 t __delayed_work_tick +ffffffff81aac000 T intel_lookup_range_min_qp +ffffffff81aac0b0 T intel_lookup_range_max_qp +ffffffff81aad000 T intel_init_quirks +ffffffff81aad0f0 T intel_has_quirk +ffffffff81aad130 t quirk_ssc_force_disable +ffffffff81aad160 t quirk_invert_brightness +ffffffff81aad190 t quirk_backlight_present +ffffffff81aad1c0 t quirk_increase_t12_delay +ffffffff81aad1f0 t quirk_increase_ddi_disabled_time +ffffffff81aad220 t intel_dmi_reverse_brightness +ffffffff81aad270 t intel_dmi_no_pps_backlight +ffffffff81aae000 T intel_sdvo_port_enabled +ffffffff81aae0a0 T intel_sdvo_init +ffffffff81aaec50 t intel_sdvo_compute_config +ffffffff81aaf1b0 t pch_disable_sdvo +ffffffff81aaf1e0 t pch_post_disable_sdvo +ffffffff81aaf1f0 t intel_disable_sdvo +ffffffff81aaf360 t intel_sdvo_pre_enable +ffffffff81aafce0 t intel_enable_sdvo +ffffffff81aafee0 t intel_sdvo_get_hw_state +ffffffff81aaffd0 t intel_sdvo_get_config +ffffffff81ab0540 t intel_sdvo_ddc_proxy_xfer +ffffffff81ab05f0 t intel_sdvo_ddc_proxy_func +ffffffff81ab0620 t __intel_sdvo_write_cmd +ffffffff81ab0ae0 t proxy_lock_bus +ffffffff81ab0b10 t proxy_trylock_bus +ffffffff81ab0b40 t proxy_unlock_bus +ffffffff81ab0b70 t intel_sdvo_enc_destroy +ffffffff81ab0b80 t intel_sdvo_get_preferred_input_mode +ffffffff81ab0f10 t intel_sdvo_get_dtd_from_mode +ffffffff81ab1080 t intel_sdvo_read_response +ffffffff81ab1520 t intel_sdvo_write_sdvox +ffffffff81ab1710 t intel_sdvo_write_infoframe +ffffffff81ab18e0 t intel_sdvo_dvi_init +ffffffff81ab1b60 t intel_sdvo_tv_init +ffffffff81ab1e70 t intel_sdvo_lvds_init +ffffffff81ab2050 t intel_sdvo_hotplug +ffffffff81ab2090 t intel_sdvo_connector_get_hw_state +ffffffff81ab2120 t intel_sdvo_detect +ffffffff81ab24a0 t intel_sdvo_connector_register +ffffffff81ab24b0 t intel_sdvo_connector_unregister +ffffffff81ab24c0 t intel_sdvo_connector_duplicate_state +ffffffff81ab2540 t intel_sdvo_connector_atomic_set_property +ffffffff81ab2710 t intel_sdvo_connector_atomic_get_property +ffffffff81ab2930 t intel_sdvo_get_modes +ffffffff81ab2bf0 t intel_sdvo_mode_valid +ffffffff81ab2cc0 t intel_sdvo_atomic_check +ffffffff81ab2d70 t intel_sdvo_create_enhance_property +ffffffff81ab4000 T intel_snps_phy_wait_for_calibration +ffffffff81ab40d0 T intel_snps_phy_update_psr_power_state +ffffffff81ab41a0 T intel_snps_phy_set_signal_levels +ffffffff81ab43f0 T intel_mpllb_calc_state +ffffffff81ab4560 T intel_snps_phy_check_hdmi_link_rate +ffffffff81ab45c0 T intel_mpllb_enable +ffffffff81ab4820 T intel_mpllb_disable +ffffffff81ab49b0 T intel_mpllb_calc_port_clock +ffffffff81ab4a70 T intel_mpllb_readout_hw_state +ffffffff81ab4be0 T intel_mpllb_state_verify +ffffffff81ab6000 T intel_plane_check_src_coordinates +ffffffff81ab61d0 T vlv_plane_min_cdclk +ffffffff81ab62c0 T ivb_plane_min_cdclk +ffffffff81ab6380 T hsw_plane_min_cdclk +ffffffff81ab6420 T chv_plane_check_rotation +ffffffff81ab6490 T intel_sprite_set_colorkey_ioctl +ffffffff81ab6760 T intel_sprite_plane_create +ffffffff81ab6ab0 t vlv_sprite_update_noarm +ffffffff81ab6ba0 t vlv_sprite_update_arm +ffffffff81ab7260 t vlv_sprite_disable_arm +ffffffff81ab72f0 t vlv_sprite_get_hw_state +ffffffff81ab73b0 t vlv_sprite_check +ffffffff81ab7640 t ivb_sprite_update_noarm +ffffffff81ab77b0 t ivb_sprite_update_arm +ffffffff81ab7b90 t ivb_sprite_disable_arm +ffffffff81ab7c40 t ivb_sprite_get_hw_state +ffffffff81ab7cf0 t g4x_sprite_check +ffffffff81ab82c0 t hsw_sprite_max_stride +ffffffff81ab8310 t g4x_sprite_max_stride +ffffffff81ab8380 t ivb_sprite_min_cdclk +ffffffff81ab84b0 t g4x_sprite_update_noarm +ffffffff81ab8620 t g4x_sprite_update_arm +ffffffff81ab8a70 t g4x_sprite_disable_arm +ffffffff81ab8b20 t g4x_sprite_get_hw_state +ffffffff81ab8bd0 t g4x_sprite_min_cdclk +ffffffff81ab8c90 t vlv_sprite_format_mod_supported +ffffffff81ab8dc0 t snb_sprite_format_mod_supported +ffffffff81ab8eb0 t g4x_sprite_format_mod_supported +ffffffff81ab9000 T intel_tc_port_in_tbt_alt_mode +ffffffff81ab9070 T intel_tc_port_in_dp_alt_mode +ffffffff81ab90e0 T intel_tc_port_in_legacy_mode +ffffffff81ab9150 T intel_tc_cold_requires_aux_pw +ffffffff81ab91a0 T intel_tc_port_get_lane_mask +ffffffff81ab9300 T intel_tc_port_get_pin_assignment_mask +ffffffff81ab9460 T intel_tc_port_fia_max_lane_count +ffffffff81ab95a0 T intel_tc_port_set_fia_lane_count +ffffffff81ab97b0 T intel_tc_port_init_mode +ffffffff81ab9c30 t intel_tc_port_update_mode +ffffffff81aba150 T intel_tc_port_sanitize_mode +ffffffff81aba500 T intel_tc_port_connected +ffffffff81aba5f0 T intel_tc_port_lock +ffffffff81aba610 t tc_port_live_status_mask +ffffffff81aba8e0 T intel_tc_port_unlock +ffffffff81aba960 t __intel_tc_port_lock +ffffffff81abab60 T intel_tc_port_flush_work +ffffffff81abab80 T intel_tc_port_ref_held +ffffffff81ababd0 T intel_tc_port_get_link +ffffffff81abac50 T intel_tc_port_put_link +ffffffff81abace0 T intel_tc_port_init +ffffffff81abaf60 t intel_tc_port_disconnect_phy_work +ffffffff81abafb0 t tc_phy_status_complete +ffffffff81abb0c0 t tc_phy_take_ownership +ffffffff81abb260 t __delayed_work_tick +ffffffff81abc000 T intel_tv_init +ffffffff81abc420 t intel_tv_compute_config +ffffffff81abc8c0 t intel_tv_get_config +ffffffff81abce70 t intel_tv_pre_enable +ffffffff81abd7a0 t intel_enable_tv +ffffffff81abd800 t intel_disable_tv +ffffffff81abd860 t intel_tv_get_hw_state +ffffffff81abd8c0 t intel_tv_connector_duplicate_state +ffffffff81abd940 t intel_tv_mode_to_mode +ffffffff81abda90 t intel_tv_get_modes +ffffffff81abddf0 t intel_tv_detect +ffffffff81abe250 t intel_tv_mode_valid +ffffffff81abe2e0 t intel_tv_atomic_check +ffffffff81abf000 T intel_dsc_source_support +ffffffff81abf060 T intel_dsc_compute_params +ffffffff81abf520 T intel_dsc_power_domain +ffffffff81abf5d0 T intel_dsc_dsi_pps_write +ffffffff81abf870 T intel_dsc_dp_pps_write +ffffffff81abf950 T intel_uncompressed_joiner_enable +ffffffff81abfa70 T intel_dsc_enable +ffffffff81ac1340 T intel_dsc_disable +ffffffff81ac14d0 T intel_dsc_get_config +ffffffff81ac2000 T intel_vga_disable +ffffffff81ac2120 T intel_vga_redisable_power_on +ffffffff81ac21c0 T intel_vga_redisable +ffffffff81ac2280 T intel_vga_reset_io_mem +ffffffff81ac22e0 T intel_vga_register +ffffffff81ac2310 T intel_vga_unregister +ffffffff81ac3000 T intel_vrr_is_capable +ffffffff81ac30a0 T intel_vrr_check_modeset +ffffffff81ac3130 T intel_vrr_vmin_vblank_start +ffffffff81ac3190 T intel_vrr_vmax_vblank_start +ffffffff81ac31f0 T intel_vrr_compute_config +ffffffff81ac3380 T intel_vrr_enable +ffffffff81ac3560 T intel_vrr_send_push +ffffffff81ac35e0 T intel_vrr_is_push_sent +ffffffff81ac3670 T intel_vrr_disable +ffffffff81ac3740 T intel_vrr_get_config +ffffffff81ac4000 T skl_update_scaler_crtc +ffffffff81ac40c0 t skl_update_scaler +ffffffff81ac43e0 T skl_update_scaler_plane +ffffffff81ac47d0 T skl_pfit_enable +ffffffff81ac4cb0 T skl_program_plane_scaler +ffffffff81ac5370 T skl_detach_scalers +ffffffff81ac54b0 T skl_scaler_disable +ffffffff81ac6000 T skl_format_to_fourcc +ffffffff81ac6180 T icl_is_nv12_y_plane +ffffffff81ac61f0 T icl_is_hdr_plane +ffffffff81ac6230 T skl_calc_main_surface_offset +ffffffff81ac6470 T skl_universal_plane_create +ffffffff81ac6b60 t icl_plane_min_width +ffffffff81ac6cf0 t icl_hdr_plane_max_width +ffffffff81ac6d40 t icl_sdr_plane_max_width +ffffffff81ac6d70 t icl_plane_max_height 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intel_guc_slpc_enable +ffffffff81b6edb0 T intel_guc_slpc_set_boost_freq +ffffffff81b6ee50 t slpc_force_min_freq +ffffffff81b6ef70 T intel_guc_slpc_dec_waiters +ffffffff81b6efb0 T intel_guc_slpc_print_info +ffffffff81b6f1c0 T intel_guc_slpc_fini +ffffffff81b70000 T intel_guc_wait_for_pending_msg +ffffffff81b70160 T intel_guc_wait_for_idle +ffffffff81b701b0 T intel_guc_busyness_park +ffffffff81b703b0 T intel_guc_busyness_unpark +ffffffff81b70520 T intel_guc_submission_reset_prepare +ffffffff81b70c90 t guc_flush_destroyed_contexts +ffffffff81b70e00 T intel_guc_submission_reset +ffffffff81b70f20 t __guc_reset_context +ffffffff81b71220 T intel_guc_submission_cancel_requests +ffffffff81b714c0 T intel_guc_submission_reset_finish +ffffffff81b715a0 T intel_guc_submission_init +ffffffff81b71710 T intel_guc_submission_fini +ffffffff81b717b0 T intel_guc_submission_setup +ffffffff81b71bb0 t guc_sched_engine_disabled +ffffffff81b71be0 t guc_sched_engine_destroy +ffffffff81b71c40 t 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intel_guc_submission_print_context_info +ffffffff81b74950 t emit_bb_start_parent_no_preempt_mid_batch +ffffffff81b74a80 T intel_guc_virtual_engine_has_heartbeat +ffffffff81b74b10 t guc_virtual_get_sibling +ffffffff81b74bb0 t update_context_prio +ffffffff81b74da0 t try_context_registration +ffffffff81b75220 t guc_wq_item_append +ffffffff81b754a0 t guc_add_request +ffffffff81b756e0 t guc_context_policy_init_v70 +ffffffff81b75860 t guc_resume +ffffffff81b75960 t guc_request_alloc +ffffffff81b75c50 t add_to_context +ffffffff81b75d50 t remove_from_context +ffffffff81b75e20 t guc_engine_reset_prepare +ffffffff81b75e80 t guc_rewind_nop +ffffffff81b75eb0 t guc_reset_nop +ffffffff81b75ee0 t guc_set_default_submission +ffffffff81b75f20 t guc_engine_busyness +ffffffff81b76260 t guc_context_alloc +ffffffff81b76280 t guc_context_revoke +ffffffff81b76570 t guc_context_pre_pin +ffffffff81b76590 t guc_context_pin +ffffffff81b76640 t guc_context_unpin +ffffffff81b76760 t guc_context_post_unpin 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i915_print_iommu_status +ffffffff81b870e0 T i915_driver_probe +ffffffff81b87e90 T inteldrm_init_backlight +ffffffff81b87f00 T i915_driver_remove +ffffffff81b88000 T i915_driver_shutdown +ffffffff81b88150 T i915_driver_resume_switcheroo +ffffffff81b881b0 t i915_drm_resume_early +ffffffff81b882e0 t i915_drm_resume +ffffffff81b884a0 T intagpsubmatch +ffffffff81b884f0 T intagp_print +ffffffff81b88540 T inteldrm_wsioctl +ffffffff81b886e0 T inteldrm_wsmmap +ffffffff81b88710 T inteldrm_alloc_screen +ffffffff81b88740 T inteldrm_free_screen +ffffffff81b88760 T inteldrm_show_screen +ffffffff81b88830 T inteldrm_load_font +ffffffff81b88850 T inteldrm_list_font +ffffffff81b88870 T inteldrm_scrollback +ffffffff81b88890 T inteldrm_getchar +ffffffff81b888b0 T inteldrm_burner +ffffffff81b88940 T inteldrm_enter_ddb +ffffffff81b889a0 T inteldrm_doswitch +ffffffff81b88a30 T inteldrm_burner_cb +ffffffff81b88a60 T inteldrm_backlight_update_status +ffffffff81b88ac0 T inteldrm_backlight_get_brightness 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i915_gem_sw_finish_ioctl +ffffffff81b8c2a0 T i915_gem_runtime_suspend +ffffffff81b8c3a0 T i915_gem_object_ggtt_pin_ww +ffffffff81b8c650 T i915_gem_object_ggtt_pin +ffffffff81b8c7c0 T i915_gem_madvise_ioctl +ffffffff81b8cae0 T i915_gem_drain_freed_objects +ffffffff81b8cb60 T i915_gem_drain_workqueue +ffffffff81b8cc40 T i915_gem_init +ffffffff81b8cfc0 T i915_gem_driver_register +ffffffff81b8cff0 T i915_gem_driver_unregister +ffffffff81b8d000 T i915_gem_driver_remove +ffffffff81b8d0e0 T i915_gem_driver_release +ffffffff81b8d230 T i915_gem_init_early +ffffffff81b8d2b0 T i915_gem_cleanup_early +ffffffff81b8d370 T i915_gem_open +ffffffff81b8d490 t i915_gem_gtt_prepare +ffffffff81b8d790 t __ww_mutex_lock +ffffffff81b8e000 T i915_gem_evict_something +ffffffff81b8e880 T i915_gem_evict_for_node +ffffffff81b8ec50 T i915_gem_evict_vm +ffffffff81b90000 T i915_gem_gtt_prepare_pages +ffffffff81b90030 T i915_gem_gtt_finish_pages +ffffffff81b90090 T i915_gem_gtt_reserve +ffffffff81b90140 T i915_gem_gtt_insert +ffffffff81b91000 T i915_gem_ww_ctx_init +ffffffff81b91060 T i915_gem_ww_unlock_single +ffffffff81b911a0 T i915_gem_ww_ctx_fini +ffffffff81b91210 t i915_gem_ww_ctx_unlock_all +ffffffff81b91370 T i915_gem_ww_ctx_backoff +ffffffff81b92000 T i915_getparam_ioctl +ffffffff81b93000 T intel_gpu_error_find_batch +ffffffff81b93070 T i915_error_printf +ffffffff81b93130 T intel_gpu_error_print_vma +ffffffff81b93160 T i915_gpu_coredump_copy_to_buffer +ffffffff81b931b0 T __i915_gpu_coredump_free +ffffffff81b93340 T intel_engine_coredump_alloc +ffffffff81b93ba0 T intel_engine_coredump_add_request +ffffffff81b93f10 T intel_engine_coredump_add_vma +ffffffff81b94030 T i915_gpu_coredump_alloc +ffffffff81b94290 T intel_gt_coredump_alloc +ffffffff81b94ad0 T i915_vma_capture_prepare +ffffffff81b94b80 T i915_vma_capture_finish +ffffffff81b94be0 T i915_gpu_coredump +ffffffff81b953c0 T i915_error_state_store +ffffffff81b95420 T i915_capture_error_state +ffffffff81b954e0 T i915_first_error_state +ffffffff81b95550 T i915_reset_error_state +ffffffff81b955f0 T i915_disable_error_state +ffffffff81b96000 T i915_reg_read_ioctl +ffffffff81b97000 T gen3_irq_reset +ffffffff81b970d0 T gen2_irq_reset +ffffffff81b971a0 T gen3_irq_init +ffffffff81b972e0 T gen2_irq_init +ffffffff81b97420 T i915_hotplug_interrupt_update +ffffffff81b97500 T ilk_enable_display_irq +ffffffff81b97510 t ilk_update_display_irq +ffffffff81b97650 T ilk_disable_display_irq +ffffffff81b97750 T bdw_enable_pipe_irq +ffffffff81b97770 t bdw_update_pipe_irq +ffffffff81b978d0 T bdw_disable_pipe_irq +ffffffff81b979d0 T ibx_enable_display_interrupt +ffffffff81b979e0 t ibx_display_interrupt_update +ffffffff81b97b00 T ibx_disable_display_interrupt +ffffffff81b97bc0 T i915_pipestat_enable_mask +ffffffff81b97d60 T i915_enable_pipestat +ffffffff81b97ef0 T intel_irqs_enabled +ffffffff81b97f20 T i915_disable_pipestat +ffffffff81b980a0 T i915_get_vblank_counter +ffffffff81b98250 T g4x_get_vblank_counter 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intel_hpd_irq_setup +ffffffff81b99cd0 T intel_irq_init +ffffffff81b99f80 t ivb_parity_work +ffffffff81b9a320 T intel_irq_fini +ffffffff81b9a360 T intel_irq_install +ffffffff81b9a470 t intel_irq_reset +ffffffff81b9afd0 t intel_irq_postinstall +ffffffff81b9bcd0 T intel_irq_uninstall +ffffffff81b9bd40 T intel_runtime_pm_disable_interrupts +ffffffff81b9bd70 T intel_runtime_pm_enable_interrupts +ffffffff81b9bda0 T intel_synchronize_hardirq +ffffffff81b9bdc0 t i9xx_pipestat_irq_reset +ffffffff81b9bf50 t kasprintf +ffffffff81b9c020 t i915_hpd_irq_setup +ffffffff81b9c130 t icp_hpd_irq_setup +ffffffff81b9c320 t dg1_hpd_irq_setup +ffffffff81b9c380 t gen11_hpd_irq_setup +ffffffff81b9c5d0 t bxt_hpd_irq_setup +ffffffff81b9c760 t bdw_update_port_irq +ffffffff81b9c8a0 t spt_hpd_irq_setup +ffffffff81b9cac0 t ilk_hpd_irq_setup +ffffffff81b9cd20 t gen11_display_irq_reset +ffffffff81b9d2a0 t ibx_irq_reset +ffffffff81b9d3e0 t cherryview_irq_handler +ffffffff81b9d6b0 t valleyview_irq_handler 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oa_configure_all_contexts +ffffffff81baf8d0 t gen8_modify_self +ffffffff81bafaa0 t gen8_modify_context +ffffffff81bafc40 t gen12_configure_oar_context +ffffffff81bb0000 T i915_query_ioctl +ffffffff81bb0110 t query_topology_info +ffffffff81bb0160 t query_engine_info +ffffffff81bb03a0 t query_perf_config +ffffffff81bb06a0 t query_memregion_info +ffffffff81bb0920 t query_hwconfig_blob +ffffffff81bb09a0 t query_geometry_subslices +ffffffff81bb0a30 t fill_topology_info +ffffffff81bb0bd0 t query_perf_config_data +ffffffff81bb2000 T i915_request_slab_cache +ffffffff81bb2030 t i915_fence_get_driver_name +ffffffff81bb2060 t i915_fence_get_timeline_name +ffffffff81bb20c0 t i915_fence_enable_signaling +ffffffff81bb20d0 t i915_fence_signaled +ffffffff81bb2120 t i915_fence_wait +ffffffff81bb2140 t i915_fence_release +ffffffff81bb2230 T i915_request_notify_execute_cb_imm +ffffffff81bb22a0 T i915_request_active_engine +ffffffff81bb2380 T i915_request_free_capture_list +ffffffff81bb23f0 T i915_request_retire +ffffffff81bb25b0 T i915_request_retire_upto +ffffffff81bb2620 T __i915_request_skip +ffffffff81bb26c0 T i915_request_set_error_once +ffffffff81bb2730 T i915_request_mark_eio +ffffffff81bb27c0 T __i915_request_submit +ffffffff81bb2a10 T i915_request_submit +ffffffff81bb2a60 T __i915_request_unsubmit +ffffffff81bb2ad0 T i915_request_unsubmit +ffffffff81bb2b50 T i915_request_cancel +ffffffff81bb2bd0 T __i915_request_create +ffffffff81bb2ef0 t request_alloc_slow +ffffffff81bb3040 T i915_request_create +ffffffff81bb3140 T i915_request_await_execution +ffffffff81bb3250 t __i915_request_await_execution +ffffffff81bb33e0 t i915_request_await_external +ffffffff81bb3520 T i915_request_await_dma_fence +ffffffff81bb38a0 T i915_request_await_deps +ffffffff81bb3910 T i915_request_await_object +ffffffff81bb39c0 T __i915_request_commit +ffffffff81bb3c30 T __i915_request_queue_bh +ffffffff81bb3c70 T __i915_request_queue +ffffffff81bb3cd0 T i915_request_add +ffffffff81bb3d80 T i915_request_wait_timeout +ffffffff81bb40a0 t request_wait_wake +ffffffff81bb40c0 T i915_request_wait +ffffffff81bb4120 T i915_request_show +ffffffff81bb4350 T i915_test_request_state +ffffffff81bb44c0 T i915_request_module_exit +ffffffff81bb44f0 T i915_request_module_init +ffffffff81bb4580 t submit_notify +ffffffff81bb4660 t semaphore_notify +ffffffff81bb46b0 t __rq_watchdog_expired +ffffffff81bb4760 t __await_execution +ffffffff81bb48e0 t i915_request_await_start +ffffffff81bb4a10 t irq_execute_cb +ffffffff81bb5000 T i915_sg_trim +ffffffff81bb5110 T i915_refct_sgt_init +ffffffff81bb5150 T i915_rsgt_from_mm_node +ffffffff81bb5300 T i915_rsgt_from_buddy_resource +ffffffff81bb54e0 t i915_refct_sgt_release +ffffffff81bb6000 T i915_sched_lookup_priolist +ffffffff81bb6120 T __i915_priolist_free +ffffffff81bb6140 T i915_schedule +ffffffff81bb6620 T i915_sched_node_init +ffffffff81bb6680 T i915_sched_node_reinit +ffffffff81bb66c0 T __i915_sched_node_add_dependency +ffffffff81bb67d0 T i915_sched_node_add_dependency +ffffffff81bb6910 T i915_sched_node_fini +ffffffff81bb69f0 T i915_request_show_with_schedule +ffffffff81bb6ad0 T i915_sched_engine_create +ffffffff81bb6b80 t default_destroy +ffffffff81bb6bd0 t default_disabled +ffffffff81bb6c00 T i915_scheduler_module_exit +ffffffff81bb6c30 T i915_scheduler_module_init +ffffffff81bb7000 T i915_save_display +ffffffff81bb7360 T i915_restore_display +ffffffff81bb8000 T i915_sw_fence_complete +ffffffff81bb8040 t __i915_sw_fence_complete +ffffffff81bb81c0 T i915_sw_fence_await +ffffffff81bb8240 T __i915_sw_fence_init +ffffffff81bb82b0 T i915_sw_fence_reinit +ffffffff81bb82f0 T i915_sw_fence_commit +ffffffff81bb8330 T i915_sw_fence_await_sw_fence +ffffffff81bb8350 t __i915_sw_fence_await_sw_fence +ffffffff81bb85c0 T i915_sw_fence_await_sw_fence_gfp +ffffffff81bb85e0 T i915_sw_fence_await_dma_fence +ffffffff81bb8810 t dma_i915_sw_fence_wake +ffffffff81bb8890 t irq_i915_sw_fence_work +ffffffff81bb88d0 t timer_i915_sw_fence_wake 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i915_ttm_buddy_man_reserve +ffffffff81bbd4d0 T i915_ttm_buddy_man_visible_size +ffffffff81bbd500 T i915_ttm_buddy_man_avail +ffffffff81bbd560 t i915_ttm_buddy_man_alloc +ffffffff81bbd890 t i915_ttm_buddy_man_free +ffffffff81bbd900 t i915_ttm_buddy_man_intersects +ffffffff81bbd9b0 t i915_ttm_buddy_man_compatible +ffffffff81bbda60 t i915_ttm_buddy_man_debug +ffffffff81bbe000 T i915_user_extensions +ffffffff81bbf000 T __i915_printk +ffffffff81bbf0c0 T add_taint_for_CI +ffffffff81bbf0f0 T cancel_timer +ffffffff81bbf140 T set_timer_ms +ffffffff81bbf1f0 T i915_vtd_active +ffffffff81bc0000 T intel_vgpu_detect +ffffffff81bc0030 T intel_vgpu_register +ffffffff81bc0090 T intel_vgpu_active +ffffffff81bc00c0 T intel_vgpu_has_full_ppgtt +ffffffff81bc0100 T intel_vgpu_has_hwsp_emulation +ffffffff81bc0140 T intel_vgpu_has_huge_gtt +ffffffff81bc0180 T intel_vgt_deballoon +ffffffff81bc03c0 T intel_vgt_balloon +ffffffff81bc1000 T i915_vma_instance +ffffffff81bc15b0 T i915_vma_work +ffffffff81bc1620 T i915_vma_wait_for_bind +ffffffff81bc16a0 T i915_vma_bind +ffffffff81bc19f0 T i915_vma_pin_iomap +ffffffff81bc1bc0 T i915_vma_flush_writes +ffffffff81bc1c30 T i915_vma_unpin_iomap +ffffffff81bc1cc0 T i915_vma_unpin_and_release +ffffffff81bc1d30 T i915_vma_misplaced +ffffffff81bc1dd0 T __i915_vma_set_map_and_fenceable +ffffffff81bc1e50 T i915_gem_valid_gtt_space +ffffffff81bc1ee0 T vma_invalidate_tlb +ffffffff81bc1f20 T i915_vma_pin_ww +ffffffff81bc2940 T i915_ggtt_pin +ffffffff81bc2a20 t __i915_ggtt_pin +ffffffff81bc2b80 t i915_gem_object_lock +ffffffff81bc2d90 T i915_vma_close +ffffffff81bc2e60 T i915_vma_reopen +ffffffff81bc2ee0 T i915_vma_destroy_locked +ffffffff81bc2fd0 t release_references +ffffffff81bc3100 T i915_vma_destroy +ffffffff81bc3240 T i915_vma_parked +ffffffff81bc3510 T i915_vma_revoke_mmap +ffffffff81bc3610 T _i915_vma_move_to_active +ffffffff81bc3840 T __i915_vma_evict +ffffffff81bc3bb0 T __i915_vma_unbind +ffffffff81bc3c50 T i915_vma_unbind +ffffffff81bc3da0 T i915_vma_unbind_async +ffffffff81bc3f90 T i915_vma_unbind_unlocked +ffffffff81bc40a0 T i915_vma_make_unshrinkable +ffffffff81bc40e0 T i915_vma_make_shrinkable +ffffffff81bc4100 T i915_vma_make_purgeable +ffffffff81bc4120 T i915_vma_module_exit +ffffffff81bc4140 T i915_vma_module_init +ffffffff81bc41a0 t __i915_vma_active +ffffffff81bc41f0 t __i915_vma_retire +ffffffff81bc4240 t __vma_bind +ffffffff81bc42e0 t __vma_release +ffffffff81bc4360 t intel_rotate_pages +ffffffff81bc46c0 t intel_remap_pages +ffffffff81bc4a90 t intel_partial_pages +ffffffff81bc5000 T i915_vma_resource_alloc +ffffffff81bc5050 T i915_vma_resource_free +ffffffff81bc5090 T i915_vma_resource_unhold +ffffffff81bc50a0 t __i915_vma_resource_unhold +ffffffff81bc5190 T i915_vma_resource_hold +ffffffff81bc51e0 T i915_vma_resource_unbind +ffffffff81bc5310 T __i915_vma_resource_init +ffffffff81bc5370 t i915_vma_resource_fence_notify +ffffffff81bc5440 T i915_vma_resource_bind_dep_sync +ffffffff81bc55c0 T i915_vma_resource_bind_dep_sync_all +ffffffff81bc5660 T i915_vma_resource_bind_dep_await +ffffffff81bc5800 T i915_vma_resource_module_exit +ffffffff81bc5820 T i915_vma_resource_module_init +ffffffff81bc5880 t get_driver_name +ffffffff81bc58b0 t get_timeline_name +ffffffff81bc58e0 t unbind_fence_release +ffffffff81bc5920 t i915_vma_resource_unbind_work +ffffffff81bc6000 T intel_platform_name +ffffffff81bc60a0 T intel_device_info_print +ffffffff81bc6d30 T intel_device_info_subplatform_init +ffffffff81bc7090 T intel_device_info_runtime_init +ffffffff81bc7770 T intel_driver_caps_print +ffffffff81bc8000 T intel_dram_detect +ffffffff81bc8480 t skl_get_dram_info +ffffffff81bc8660 T intel_dram_edram_detect +ffffffff81bc86f0 t icl_pcode_read_mem_global_info +ffffffff81bc87d0 t skl_dram_get_channel_info +ffffffff81bc89a0 t skl_dram_get_dimm_info +ffffffff81bc9000 T intel_memory_region_lookup +ffffffff81bc90e0 T intel_memory_region_by_type +ffffffff81bc91a0 T intel_memory_region_reserve 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T intel_runtime_pm_get_raw +ffffffff81bda090 T intel_runtime_pm_get +ffffffff81bda140 T intel_runtime_pm_get_if_in_use +ffffffff81bda1f0 T intel_runtime_pm_get_if_active +ffffffff81bda2a0 T intel_runtime_pm_get_noresume +ffffffff81bda3d0 T intel_runtime_pm_put_raw +ffffffff81bda460 T intel_runtime_pm_put_unchecked +ffffffff81bda520 T intel_runtime_pm_enable +ffffffff81bda550 T intel_runtime_pm_disable +ffffffff81bda580 T intel_runtime_pm_driver_release +ffffffff81bda610 T intel_runtime_pm_init_early +ffffffff81bdb000 T intel_sbi_read +ffffffff81bdb050 t intel_sbi_rw +ffffffff81bdb240 T intel_sbi_write +ffffffff81bdc000 T intel_step_init +ffffffff81bdc3f0 T intel_step_name +ffffffff81bdc430 t pvc_step_lookup +ffffffff81bdd000 T gen3_stolen_base +ffffffff81bdd050 T gen11_stolen_base +ffffffff81bdd0d0 T i830_stolen_size +ffffffff81bdd150 T gen3_stolen_size +ffffffff81bdd1c0 T gen6_stolen_size +ffffffff81bdd210 T chv_stolen_size +ffffffff81bdd280 T gen8_stolen_size +ffffffff81bdd2e0 T gen9_stolen_size +ffffffff81bdd350 T intel_init_stolen_res +ffffffff81bde000 T intel_uncore_mmio_debug_init_early +ffffffff81bde060 T intel_uncore_forcewake_domain_to_str +ffffffff81bde0d0 T intel_uncore_fw_release_timer +ffffffff81bde1f0 T intel_uncore_suspend +ffffffff81bde240 t intel_uncore_forcewake_reset +ffffffff81bde520 T intel_uncore_resume_early +ffffffff81bde650 T intel_uncore_unclaimed_mmio +ffffffff81bde6c0 T intel_uncore_runtime_resume +ffffffff81bde6f0 T intel_uncore_forcewake_get +ffffffff81bde860 T intel_uncore_forcewake_user_get +ffffffff81bde980 T intel_uncore_forcewake_get__locked +ffffffff81bdea50 T intel_uncore_forcewake_user_put +ffffffff81bdeb90 T intel_uncore_forcewake_put__locked +ffffffff81bdec90 T intel_uncore_forcewake_put +ffffffff81bdedb0 T intel_uncore_forcewake_put_delayed +ffffffff81bdef00 T intel_uncore_forcewake_flush +ffffffff81bdefb0 T assert_forcewakes_inactive +ffffffff81bdf020 T assert_forcewakes_active +ffffffff81bdf050 T intel_uncore_setup_mmio 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__gen6_gt_wait_for_fifo +ffffffff81be5000 T __intel_wakeref_get_first +ffffffff81be50a0 T __intel_wakeref_put_last +ffffffff81be5100 t ____intel_wakeref_put_last +ffffffff81be51d0 T __intel_wakeref_init +ffffffff81be5250 t __intel_wakeref_put_work +ffffffff81be52c0 T intel_wakeref_wait_for_idle +ffffffff81be53e0 T intel_wakeref_auto_init +ffffffff81be5460 t wakeref_auto_timeout +ffffffff81be5510 T intel_wakeref_auto +ffffffff81be5710 T intel_wakeref_auto_fini +ffffffff81be57d0 t __delayed_work_tick +ffffffff81be6000 T intel_wopcm_init_early +ffffffff81be6080 T intel_wopcm_init +ffffffff81be7000 T vlv_iosf_sb_get +ffffffff81be7020 T vlv_iosf_sb_put +ffffffff81be7040 T vlv_punit_read +ffffffff81be7090 t vlv_sideband_rw +ffffffff81be7240 T vlv_punit_write +ffffffff81be7290 T vlv_bunit_read +ffffffff81be72e0 T vlv_bunit_write +ffffffff81be7330 T vlv_nc_read +ffffffff81be7380 T vlv_iosf_sb_read +ffffffff81be73d0 T vlv_iosf_sb_write +ffffffff81be7420 T vlv_cck_read +ffffffff81be7470 T vlv_cck_write +ffffffff81be74c0 T vlv_ccu_read +ffffffff81be7510 T vlv_ccu_write +ffffffff81be7560 T vlv_dpio_read +ffffffff81be7630 T vlv_dpio_write +ffffffff81be76a0 T vlv_flisdsi_read +ffffffff81be76f0 T vlv_flisdsi_write +ffffffff81be8000 T vlv_suspend_complete +ffffffff81be8a40 T vlv_resume_prepare +ffffffff81be9480 T vlv_suspend_init +ffffffff81be94f0 T vlv_suspend_cleanup +ffffffff81be9550 t vlv_wait_for_pw_status +ffffffff81bea000 T atom_execute_table_scratch_unlocked +ffffffff81bea0a0 t atom_execute_table_locked +ffffffff81bea3d0 T atom_execute_table +ffffffff81bea480 T atom_parse +ffffffff81bea660 T atom_destroy +ffffffff81bea6a0 T atom_asic_init +ffffffff81bea8b0 T atom_parse_data_header +ffffffff81bea950 T atom_parse_cmd_header +ffffffff81bea9d0 T atom_allocate_fb_scratch +ffffffff81beaaa0 t atom_op_move +ffffffff81beac80 t atom_op_and +ffffffff81beae60 t atom_op_or +ffffffff81beb040 t atom_op_shift_left +ffffffff81beb230 t atom_op_shift_right +ffffffff81beb420 t atom_op_mul +ffffffff81beb570 t atom_op_div +ffffffff81beb6e0 t atom_op_add +ffffffff81beb8c0 t atom_op_sub +ffffffff81bebaa0 t atom_op_setport +ffffffff81bebc20 t atom_op_setregblock +ffffffff81bebce0 t atom_op_setfbbase +ffffffff81bebdb0 t atom_op_compare +ffffffff81bebfa0 t atom_op_switch +ffffffff81bec1f0 t atom_op_jump +ffffffff81bec470 t atom_op_test +ffffffff81bec630 t atom_op_delay +ffffffff81bec710 t atom_op_calltable +ffffffff81bec860 t atom_op_repeat +ffffffff81bec890 t atom_op_clear +ffffffff81bec9a0 t atom_op_nop +ffffffff81bec9d0 t atom_op_eot +ffffffff81beca00 t atom_op_mask +ffffffff81beccd0 t atom_op_postcard +ffffffff81becd80 t atom_op_beep +ffffffff81becda0 t atom_op_savereg +ffffffff81becdd0 t atom_op_restorereg +ffffffff81bece00 t atom_op_setdatablock +ffffffff81becf40 t atom_op_xor +ffffffff81bed120 t atom_op_shl +ffffffff81bed340 t atom_op_shr +ffffffff81bed560 t atom_op_debug +ffffffff81bed590 t atom_put_dst +ffffffff81beda60 t atom_get_src_int +ffffffff81bee110 t atom_iio_execute +ffffffff81bef000 T atombios_crtc_dpms +ffffffff81bef2f0 T atombios_crtc_set_base +ffffffff81bef340 t dce4_crtc_do_set_base +ffffffff81befe30 t avivo_crtc_do_set_base +ffffffff81bf06a0 T atombios_crtc_set_base_atomic +ffffffff81bf06f0 T radeon_atom_disp_eng_pll_init +ffffffff81bf07d0 t atombios_crtc_set_disp_eng_pll +ffffffff81bf08e0 t atombios_crtc_program_ss +ffffffff81bf0b90 T atombios_crtc_mode_set +ffffffff81bf15c0 T radeon_atombios_init_crtc +ffffffff81bf16b0 t radeon_bo_reserve +ffffffff81bf1820 t radeon_bo_unreserve +ffffffff81bf1900 t atombios_crtc_program_pll +ffffffff81bf1bb0 t atombios_crtc_prepare +ffffffff81bf1c60 t atombios_crtc_commit +ffffffff81bf1cd0 t atombios_crtc_mode_fixup +ffffffff81bf2a50 t atombios_crtc_disable +ffffffff81bf2cb0 t radeon_get_shared_nondp_ppll +ffffffff81bf3000 T radeon_atom_copy_swap +ffffffff81bf3020 T radeon_dp_aux_init +ffffffff81bf3110 t radeon_dp_aux_transfer_atom +ffffffff81bf32e0 T radeon_dp_getsinktype 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atombios_set_edp_panel_power +ffffffff81bf6a80 T radeon_atom_release_dig_encoder +ffffffff81bf6ac0 T radeon_atom_pick_dig_encoder +ffffffff81bf6d00 T radeon_atom_encoder_init +ffffffff81bf6dd0 t atombios_external_encoder_setup +ffffffff81bf7030 T radeon_atom_ext_encoder_setup_ddc +ffffffff81bf7080 T radeon_enc_destroy +ffffffff81bf7130 T radeon_add_atom_encoder +ffffffff81bf7570 t radeon_atom_backlight_update_status +ffffffff81bf75d0 t radeon_atom_encoder_dpms +ffffffff81bf78e0 t radeon_atom_mode_fixup +ffffffff81bf7a20 t radeon_atom_encoder_prepare +ffffffff81bf7f00 t radeon_atom_encoder_commit +ffffffff81bf7f30 t radeon_atom_encoder_mode_set +ffffffff81bf84e0 t radeon_atom_dig_detect +ffffffff81bf85f0 t radeon_atom_encoder_disable +ffffffff81bf8890 t radeon_atom_encoder_dpms_avivo +ffffffff81bf8ac0 t radeon_atom_encoder_dpms_dig +ffffffff81bf8fc0 t radeon_atom_dac_detect +ffffffff81bf91b0 t radeon_atom_ext_dpms +ffffffff81bf91e0 t radeon_atom_ext_prepare +ffffffff81bf9210 t radeon_atom_ext_commit +ffffffff81bf9240 t radeon_atom_ext_mode_set +ffffffff81bf9270 t radeon_atom_ext_disable +ffffffff81bfa000 T radeon_atom_hw_i2c_xfer +ffffffff81bfa160 t radeon_process_i2c_ch +ffffffff81bfa330 T radeon_atom_hw_i2c_func +ffffffff81bfb000 T btc_get_max_clock_from_voltage_dependency_table +ffffffff81bfb0d0 T btc_apply_voltage_dependency_rules +ffffffff81bfb140 T btc_skip_blacklist_clocks +ffffffff81bfb240 T btc_adjust_clock_combinations +ffffffff81bfb350 T btc_apply_voltage_delta_rules +ffffffff81bfb480 T btc_program_mgcg_hw_sequence +ffffffff81bfb580 T btc_dpm_enabled +ffffffff81bfb590 T btc_notify_uvd_to_smc +ffffffff81bfb600 T btc_reset_to_default +ffffffff81bfb650 T btc_read_arb_registers +ffffffff81bfb6e0 T btc_dpm_vblank_too_short +ffffffff81bfb750 T btc_dpm_pre_set_power_state +ffffffff81bfc630 T btc_dpm_set_power_state +ffffffff81bfca40 T btc_dpm_post_set_power_state +ffffffff81bfcb60 T btc_dpm_enable +ffffffff81bfdd70 T btc_dpm_disable +ffffffff81bfe2a0 T btc_dpm_setup_asic +ffffffff81bfe380 T btc_dpm_init +ffffffff81bfe780 T btc_dpm_fini +ffffffff81bfe830 T btc_dpm_debugfs_print_current_performance_level +ffffffff81bfe880 T btc_dpm_get_current_sclk +ffffffff81bfe900 T btc_dpm_get_current_mclk +ffffffff81bfe980 T btc_dpm_get_sclk +ffffffff81bfe9d0 T btc_dpm_get_mclk +ffffffff81bff000 T ci_dpm_powergate_uvd +ffffffff81bff380 T ci_dpm_vblank_too_short +ffffffff81bff410 T ci_fan_ctrl_get_fan_speed_percent +ffffffff81bff4b0 T ci_fan_ctrl_set_fan_speed_percent +ffffffff81bff580 T ci_fan_ctrl_set_mode +ffffffff81bff710 t ci_fan_ctrl_set_static_mode +ffffffff81bff7d0 t ci_thermal_start_smc_fan_control +ffffffff81bffa10 T ci_fan_ctrl_get_mode +ffffffff81bffa70 T ci_dpm_force_performance_level +ffffffff81c00330 t ci_upload_dpm_level_enable_mask +ffffffff81c00660 T ci_dpm_pre_set_power_state +ffffffff81c00960 T ci_dpm_post_set_power_state +ffffffff81c00a30 T ci_dpm_setup_asic +ffffffff81c00c30 T ci_dpm_enable +ffffffff81c04a60 t ci_enable_didt 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ci_stop_smc_clock +ffffffff81c0a340 T ci_start_smc_clock +ffffffff81c0a380 T ci_is_smc_running +ffffffff81c0a3f0 T ci_load_smc_ucode +ffffffff81c0a580 T ci_read_smc_sram_dword +ffffffff81c0a650 T ci_write_smc_sram_dword +ffffffff81c0b000 T cik_get_allowed_info_register +ffffffff81c0b0a0 T cik_didt_rreg +ffffffff81c0b140 T cik_didt_wreg +ffffffff81c0b1c0 T ci_get_temp +ffffffff81c0b210 T kv_get_temp +ffffffff81c0b260 T cik_pciep_rreg +ffffffff81c0b2e0 T cik_pciep_wreg +ffffffff81c0b350 T cik_get_xclk +ffffffff81c0b3c0 T cik_mm_rdoorbell +ffffffff81c0b420 T cik_mm_wdoorbell +ffffffff81c0b470 T ci_mc_load_microcode +ffffffff81c0b7c0 T cik_ring_test +ffffffff81c0ba70 T cik_fence_gfx_ring_emit +ffffffff81c0be70 T cik_fence_compute_ring_emit +ffffffff81c0c100 T cik_semaphore_ring_emit +ffffffff81c0c2d0 T cik_copy_cpdma +ffffffff81c0c6d0 T cik_ring_ib_execute +ffffffff81c0ccb0 T cik_ib_test +ffffffff81c0cf90 T cik_gfx_get_rptr +ffffffff81c0cff0 T cik_gfx_get_wptr +ffffffff81c0d030 T cik_gfx_set_wptr +ffffffff81c0d070 T cik_compute_get_rptr +ffffffff81c0d150 T cik_compute_get_wptr +ffffffff81c0d230 T cik_compute_set_wptr +ffffffff81c0d2b0 T cik_gpu_check_soft_reset +ffffffff81c0d420 T cik_asic_reset +ffffffff81c0d830 t cik_gpu_pci_config_reset +ffffffff81c0e050 T cik_gfx_is_lockup +ffffffff81c0e0c0 T cik_pcie_gart_tlb_flush +ffffffff81c0e110 T cik_ib_parse +ffffffff81c0e140 T cik_vm_init +ffffffff81c0e1a0 T cik_vm_fini +ffffffff81c0e1d0 T cik_vm_flush +ffffffff81c0ef20 T cik_enter_rlc_safe_mode +ffffffff81c0f010 T cik_exit_rlc_safe_mode +ffffffff81c0f050 T cik_update_cg +ffffffff81c0f520 t cik_enable_mgcg +ffffffff81c0fa40 t cik_enable_cgcg +ffffffff81c0fdb0 T cik_init_cp_pg_table +ffffffff81c10070 T cik_get_csb_size +ffffffff81c10100 T cik_get_csb_buffer +ffffffff81c102a0 T cik_irq_set +ffffffff81c11040 t cik_disable_interrupt_state +ffffffff81c11500 T cik_irq_process +ffffffff81c12d50 t cik_irq_ack +ffffffff81c136d0 T cik_resume +ffffffff81c13760 t cik_init_golden_registers +ffffffff81c13920 t cik_startup +ffffffff81c19630 T cik_suspend +ffffffff81c19a20 T cik_init +ffffffff81c1a200 t cik_init_microcode +ffffffff81c1b210 t cik_pcie_gart_fini +ffffffff81c1b310 T cik_fini +ffffffff81c1b6b0 T dce8_program_fmt +ffffffff81c1b7e0 T dce8_bandwidth_update +ffffffff81c1c400 T cik_get_gpu_clock_counter +ffffffff81c1c4d0 T cik_set_uvd_clocks +ffffffff81c1c550 t cik_set_uvd_clock +ffffffff81c1c6c0 T cik_set_vce_clocks +ffffffff81c1c900 t cik_wait_for_rlc_serdes +ffffffff81c1cad0 t radeon_bo_reserve +ffffffff81c1cc40 t radeon_bo_unreserve +ffffffff81c1cd20 t cik_update_gfx_pg +ffffffff81c1cec0 t cik_compute_stop +ffffffff81c1d030 t cik_cp_compute_fini +ffffffff81c1d1d0 t dce8_latency_watermark +ffffffff81c1e000 T cik_sdma_get_rptr +ffffffff81c1e070 T cik_sdma_get_wptr +ffffffff81c1e0c0 T cik_sdma_set_wptr +ffffffff81c1e110 T cik_sdma_ring_ib_execute +ffffffff81c1e4f0 T cik_sdma_fence_ring_emit +ffffffff81c1e6d0 t cik_sdma_hdp_flush_ring_emit +ffffffff81c1e910 T cik_sdma_semaphore_ring_emit +ffffffff81c1ea30 T cik_sdma_enable +ffffffff81c1ec10 T cik_sdma_resume +ffffffff81c1f0f0 T cik_sdma_fini +ffffffff81c1f130 T cik_copy_dma +ffffffff81c1f500 T cik_sdma_ring_test +ffffffff81c1f7a0 T cik_sdma_ib_test +ffffffff81c1f9f0 T cik_sdma_is_lockup +ffffffff81c1fa70 T cik_sdma_vm_copy_pages +ffffffff81c1fb80 T cik_sdma_vm_write_pages +ffffffff81c1fcf0 T cik_sdma_vm_set_pages +ffffffff81c1fe60 T cik_sdma_vm_pad_ib +ffffffff81c1feb0 T cik_dma_vm_flush +ffffffff81c21000 T cypress_enable_spread_spectrum +ffffffff81c21140 T cypress_start_dpm +ffffffff81c21190 T cypress_enable_sclk_control +ffffffff81c211f0 T cypress_enable_mclk_control +ffffffff81c21250 T cypress_notify_smc_display_change +ffffffff81c212a0 T cypress_program_response_times +ffffffff81c21370 T cypress_advertise_gen2_capability +ffffffff81c21440 T cypress_notify_link_speed_change_after_state_change +ffffffff81c21500 T cypress_notify_link_speed_change_before_state_change +ffffffff81c215c0 T cypress_get_strobe_mode_settings +ffffffff81c216c0 T cypress_get_mclk_frequency_ratio +ffffffff81c21770 T cypress_map_clkf_to_ibias +ffffffff81c21830 T cypress_convert_power_level_to_smc +ffffffff81c21bf0 t cypress_populate_mclk_value +ffffffff81c22000 T cypress_upload_sw_state +ffffffff81c22180 T cypress_upload_mc_reg_table +ffffffff81c22240 t cypress_convert_mc_reg_table_to_smc +ffffffff81c224e0 T cypress_calculate_burst_time +ffffffff81c22570 T cypress_program_memory_timing_parameters +ffffffff81c22720 T cypress_populate_smc_initial_state +ffffffff81c22ac0 T cypress_populate_smc_acpi_state +ffffffff81c22e50 T cypress_construct_voltage_tables +ffffffff81c22f00 t cypress_trim_voltage_table_to_fit_state_table +ffffffff81c230f0 T cypress_populate_smc_voltage_tables +ffffffff81c23240 T cypress_get_mvdd_configuration +ffffffff81c23300 T cypress_populate_mc_reg_table +ffffffff81c23560 T cypress_get_table_locations +ffffffff81c23640 T cypress_enable_display_gap +ffffffff81c236a0 T cypress_dpm_setup_asic +ffffffff81c23790 T cypress_dpm_enable +ffffffff81c24270 t cypress_force_mc_use_s1 +ffffffff81c244f0 t cypress_gfx_clock_gating_enable +ffffffff81c24800 t cypress_mg_clock_gating_enable +ffffffff81c24a80 T cypress_dpm_disable +ffffffff81c24cb0 T cypress_dpm_set_power_state +ffffffff81c24f60 T cypress_dpm_display_configuration_changed +ffffffff81c25040 T cypress_dpm_init +ffffffff81c252b0 T cypress_dpm_fini +ffffffff81c25340 T cypress_dpm_vblank_too_short +ffffffff81c253b0 t cypress_wait_for_mc_sequencer +ffffffff81c26000 T dce3_2_afmt_hdmi_write_speaker_allocation +ffffffff81c26070 T dce3_2_afmt_dp_write_speaker_allocation +ffffffff81c260e0 T dce3_2_afmt_write_sad_regs +ffffffff81c26200 T dce3_2_audio_set_dto +ffffffff81c26340 T dce3_2_hdmi_update_acr +ffffffff81c266a0 T dce3_2_set_audio_packet +ffffffff81c26830 T dce3_2_set_mute +ffffffff81c27000 T dce6_endpoint_rreg +ffffffff81c270e0 T dce6_endpoint_wreg +ffffffff81c271d0 T dce6_audio_get_pin +ffffffff81c27340 T dce6_afmt_select_pin +ffffffff81c273d0 T dce6_afmt_write_latency_fields +ffffffff81c27490 T dce6_afmt_hdmi_write_speaker_allocation +ffffffff81c27560 T dce6_afmt_dp_write_speaker_allocation +ffffffff81c27630 T dce6_afmt_write_sad_regs +ffffffff81c27770 T dce6_audio_enable +ffffffff81c277c0 T dce6_hdmi_audio_set_dto +ffffffff81c27830 T dce6_dp_audio_set_dto +ffffffff81c28000 T eg_cg_rreg +ffffffff81c28080 t r100_mm_rreg +ffffffff81c280d0 T eg_cg_wreg +ffffffff81c28140 T eg_pif_phy0_rreg +ffffffff81c281c0 T eg_pif_phy0_wreg +ffffffff81c28220 T eg_pif_phy1_rreg +ffffffff81c282a0 T eg_pif_phy1_wreg +ffffffff81c28300 T evergreen_get_allowed_info_register +ffffffff81c28390 T evergreen_tiling_fields +ffffffff81c28430 T sumo_set_uvd_clocks +ffffffff81c28510 t sumo_set_uvd_clock +ffffffff81c286d0 T evergreen_set_uvd_clocks +ffffffff81c28c70 T evergreen_fix_pci_max_read_req_size +ffffffff81c28e20 T dce4_program_fmt +ffffffff81c28f40 T dce4_wait_for_vblank +ffffffff81c291c0 T evergreen_page_flip +ffffffff81c29350 T evergreen_page_flip_pending +ffffffff81c293c0 T evergreen_get_temp +ffffffff81c29490 T sumo_get_temp +ffffffff81c294e0 T sumo_pm_init_profile +ffffffff81c29620 T btc_pm_init_profile +ffffffff81c29730 T evergreen_pm_misc +ffffffff81c298d0 T evergreen_pm_prepare +ffffffff81c299d0 T evergreen_pm_finish +ffffffff81c29ad0 T evergreen_hpd_sense +ffffffff81c29b40 T evergreen_hpd_set_polarity +ffffffff81c29c80 T evergreen_hpd_init +ffffffff81c29d50 T evergreen_hpd_fini +ffffffff81c29df0 T evergreen_get_number_of_dram_channels +ffffffff81c29e40 T evergreen_bandwidth_update +ffffffff81c2a000 t evergreen_line_buffer_adjust +ffffffff81c2a200 t evergreen_program_watermarks +ffffffff81c2acb0 T evergreen_mc_wait_for_idle +ffffffff81c2ad50 T evergreen_pcie_gart_tlb_flush +ffffffff81c2ae30 T evergreen_mc_stop +ffffffff81c2b920 T evergreen_mc_resume +ffffffff81c2c030 T evergreen_mc_program +ffffffff81c2c440 T evergreen_ring_ib_execute +ffffffff81c2c8e0 T evergreen_mc_init +ffffffff81c2ca20 T evergreen_print_gpu_status_regs +ffffffff81c2ca50 T evergreen_is_display_hung +ffffffff81c2cc60 T evergreen_gpu_check_soft_reset +ffffffff81c2cdc0 T evergreen_gpu_pci_config_reset +ffffffff81c2cf40 T evergreen_asic_reset +ffffffff81c2d260 T evergreen_gfx_is_lockup +ffffffff81c2d2d0 T sumo_rlc_fini +ffffffff81c2d480 t radeon_bo_reserve +ffffffff81c2d5f0 t radeon_bo_unreserve +ffffffff81c2d6d0 T sumo_rlc_init +ffffffff81c2dea0 T evergreen_rlc_resume +ffffffff81c2e210 T evergreen_get_vblank_counter +ffffffff81c2e280 T evergreen_disable_interrupt_state +ffffffff81c2e550 T evergreen_irq_set +ffffffff81c2eb10 T evergreen_irq_suspend +ffffffff81c2eb60 T evergreen_irq_process +ffffffff81c2f630 t evergreen_irq_ack +ffffffff81c2fd30 T evergreen_resume +ffffffff81c2fe10 t evergreen_init_golden_registers +ffffffff81c30020 t evergreen_startup +ffffffff81c32680 T evergreen_suspend +ffffffff81c32820 T evergreen_init +ffffffff81c32d20 T evergreen_fini +ffffffff81c32f10 T evergreen_pcie_gen2_enable +ffffffff81c33140 T evergreen_program_aspm +ffffffff81c337e0 t evergreen_latency_watermark +ffffffff81c34000 T evergreen_cs_parse +ffffffff81c36870 T evergreen_dma_cs_parse +ffffffff81c37a80 T evergreen_ib_parse +ffffffff81c37f30 T evergreen_dma_ib_parse +ffffffff81c380f0 t evergreen_cs_track_check +ffffffff81c390d0 t evergreen_cs_handle_reg +ffffffff81c3afe0 t evergreen_surface_value_conv_check +ffffffff81c3b2b0 t evergreen_surface_check +ffffffff81c3b740 t evergreen_cs_track_validate_htile +ffffffff81c3b9e0 t evergreen_vm_reg_valid +ffffffff81c3c000 T evergreen_dma_fence_ring_emit +ffffffff81c3c2c0 T evergreen_dma_ring_ib_execute +ffffffff81c3c600 T evergreen_copy_dma +ffffffff81c3c9b0 T evergreen_dma_is_lockup +ffffffff81c3d000 T dce4_audio_enable +ffffffff81c3d080 T evergreen_hdmi_update_acr +ffffffff81c3d2a0 T dce4_afmt_write_latency_fields +ffffffff81c3d310 T dce4_afmt_hdmi_write_speaker_allocation +ffffffff81c3d380 T dce4_afmt_dp_write_speaker_allocation +ffffffff81c3d3f0 T evergreen_hdmi_write_sad_regs +ffffffff81c3d510 T evergreen_set_avi_packet +ffffffff81c3d6b0 T dce4_hdmi_audio_set_dto +ffffffff81c3d790 T dce4_dp_audio_set_dto +ffffffff81c3d880 T dce4_set_vbi_packet +ffffffff81c3d8f0 T dce4_hdmi_set_color_depth +ffffffff81c3da40 T dce4_set_audio_packet +ffffffff81c3dc50 T dce4_set_mute +ffffffff81c3dd60 T evergreen_hdmi_enable +ffffffff81c3e090 T evergreen_dp_enable +ffffffff81c3f000 T kv_dpm_enable_bapm +ffffffff81c3f070 T kv_dpm_enable +ffffffff81c405c0 t kv_enable_didt +ffffffff81c40860 T kv_dpm_late_enable +ffffffff81c40a50 T kv_dpm_powergate_uvd +ffffffff81c40bc0 T kv_dpm_disable +ffffffff81c40f30 T kv_dpm_force_performance_level +ffffffff81c410c0 t kv_force_dpm_lowest +ffffffff81c41190 T kv_dpm_pre_set_power_state +ffffffff81c41720 T kv_dpm_set_power_state +ffffffff81c41ed0 t kv_set_valid_clock_range +ffffffff81c42090 t kv_calculate_ds_divider +ffffffff81c42200 t kv_calculate_nbps_level_settings +ffffffff81c42390 t kv_update_vce_dpm +ffffffff81c42570 T kv_dpm_post_set_power_state +ffffffff81c42610 T kv_dpm_setup_asic +ffffffff81c42670 T kv_dpm_init +ffffffff81c42f10 T kv_dpm_debugfs_print_current_performance_level +ffffffff81c42f80 T kv_dpm_get_current_sclk +ffffffff81c42ff0 T kv_dpm_get_current_mclk +ffffffff81c43020 T kv_dpm_print_power_state +ffffffff81c430c0 T kv_dpm_fini +ffffffff81c43160 T kv_dpm_display_configuration_changed +ffffffff81c43190 T kv_dpm_get_sclk +ffffffff81c431e0 T kv_dpm_get_mclk +ffffffff81c44000 T kv_notify_message_to_smu +ffffffff81c440c0 T kv_dpm_get_enable_mask +ffffffff81c441a0 T kv_send_msg_to_smc_with_parameter +ffffffff81c44270 T kv_read_smc_sram_dword +ffffffff81c44300 T kv_smc_dpm_enable +ffffffff81c44430 T kv_smc_bapm_enable +ffffffff81c44560 T kv_copy_bytes_to_smc +ffffffff81c45000 T tn_smc_rreg +ffffffff81c45080 T tn_smc_wreg +ffffffff81c450f0 T ni_mc_load_microcode +ffffffff81c452e0 T ni_init_microcode +ffffffff81c45820 T cayman_get_allowed_info_register +ffffffff81c458b0 T tn_get_temp +ffffffff81c45940 T cayman_pcie_gart_tlb_flush +ffffffff81c45990 T cayman_cp_int_cntl_setup +ffffffff81c459e0 T cayman_fence_ring_emit +ffffffff81c45d90 T cayman_ring_ib_execute +ffffffff81c46210 T cayman_gfx_get_rptr +ffffffff81c462a0 T cayman_gfx_get_wptr +ffffffff81c46310 T cayman_gfx_set_wptr +ffffffff81c46390 T cayman_gpu_check_soft_reset +ffffffff81c46510 T cayman_asic_reset +ffffffff81c46810 T cayman_gfx_is_lockup +ffffffff81c46880 T cayman_resume +ffffffff81c46910 t ni_init_golden_registers +ffffffff81c469f0 t cayman_startup +ffffffff81c490f0 T cayman_suspend +ffffffff81c492e0 T cayman_init +ffffffff81c498d0 T cayman_fini +ffffffff81c49b50 T cayman_vm_init +ffffffff81c49bb0 T cayman_vm_fini +ffffffff81c49be0 T cayman_vm_decode_fault +ffffffff81c49c70 T cayman_vm_flush +ffffffff81c4a0f0 T tn_set_vce_clocks +ffffffff81c4b000 T cayman_dma_get_rptr +ffffffff81c4b070 T cayman_dma_get_wptr +ffffffff81c4b0c0 T cayman_dma_set_wptr +ffffffff81c4b110 T cayman_dma_ring_ib_execute +ffffffff81c4b4a0 T cayman_dma_stop +ffffffff81c4b550 T cayman_dma_resume +ffffffff81c4b7a0 T cayman_dma_fini +ffffffff81c4b860 T cayman_dma_is_lockup +ffffffff81c4b8e0 T cayman_dma_vm_copy_pages +ffffffff81c4b9d0 T cayman_dma_vm_write_pages +ffffffff81c4bb30 T cayman_dma_vm_set_pages +ffffffff81c4bc90 T cayman_dma_vm_pad_ib +ffffffff81c4bce0 T cayman_dma_vm_flush +ffffffff81c4d000 T ni_get_pi +ffffffff81c4d030 T ni_get_ps +ffffffff81c4d060 T ni_dpm_vblank_too_short +ffffffff81c4d0d0 T ni_dpm_force_performance_level +ffffffff81c4d220 T ni_copy_and_switch_arb_sets +ffffffff81c4d500 T ni_set_uvd_clock_before_set_eng_clock +ffffffff81c4d580 T ni_set_uvd_clock_after_set_eng_clock +ffffffff81c4d600 T ni_dpm_setup_asic +ffffffff81c4d810 T ni_update_current_ps +ffffffff81c4d8d0 T ni_update_requested_ps +ffffffff81c4d990 T ni_dpm_enable +ffffffff81c50bd0 t ni_populate_smc_tdp_limits +ffffffff81c50d90 T ni_dpm_disable +ffffffff81c51150 T ni_dpm_pre_set_power_state +ffffffff81c51730 T ni_dpm_set_power_state +ffffffff81c52850 T ni_dpm_post_set_power_state +ffffffff81c52920 T ni_dpm_init +ffffffff81c532f0 T ni_dpm_fini +ffffffff81c533a0 T ni_dpm_print_power_state +ffffffff81c53470 T ni_dpm_debugfs_print_current_performance_level +ffffffff81c534b0 T ni_dpm_get_current_sclk +ffffffff81c53520 T ni_dpm_get_current_mclk +ffffffff81c53590 T ni_dpm_get_sclk +ffffffff81c535f0 T ni_dpm_get_mclk +ffffffff81c53650 t ni_do_program_memory_timing_parameters +ffffffff81c53780 t ni_calculate_sclk_params +ffffffff81c539a0 t ni_calculate_power_boost_limit +ffffffff81c53b50 t ni_populate_mclk_value +ffffffff81c54000 T r100_wait_for_vblank +ffffffff81c541a0 T r100_page_flip +ffffffff81c54450 T r100_page_flip_pending +ffffffff81c54500 T r100_pm_get_dynpm_state +ffffffff81c54720 T r100_pm_init_profile +ffffffff81c54800 T r100_pm_misc +ffffffff81c54c40 T r100_pm_prepare +ffffffff81c54d00 T r100_pm_finish +ffffffff81c54dc0 T r100_gui_idle +ffffffff81c54e00 T r100_hpd_sense +ffffffff81c54e60 T r100_hpd_set_polarity +ffffffff81c54f20 T r100_hpd_init +ffffffff81c54fc0 T r100_hpd_fini +ffffffff81c55020 T r100_pci_gart_tlb_flush +ffffffff81c55050 T r100_pci_gart_init +ffffffff81c55120 T r100_pci_gart_get_page_entry +ffffffff81c55150 T r100_pci_gart_set_page +ffffffff81c55190 T r100_pci_gart_enable +ffffffff81c55280 T r100_pci_gart_disable +ffffffff81c55300 T r100_pci_gart_fini +ffffffff81c55380 T r100_irq_set +ffffffff81c55460 T r100_irq_disable +ffffffff81c554d0 T r100_irq_process +ffffffff81c557b0 T r100_get_vblank_counter +ffffffff81c55800 T r100_fence_ring_emit +ffffffff81c55c70 T r100_semaphore_ring_emit +ffffffff81c55ca0 T r100_copy_blit +ffffffff81c56340 T r100_ring_start +ffffffff81c56430 T r100_gfx_get_rptr +ffffffff81c56490 T r100_gfx_get_wptr +ffffffff81c564d0 T r100_gfx_set_wptr +ffffffff81c56510 T r100_cp_init +ffffffff81c56a40 T r100_debugfs_cp_init +ffffffff81c56a70 T r100_cp_fini +ffffffff81c56b10 T r100_cp_disable +ffffffff81c56c50 T r100_gui_wait_for_idle +ffffffff81c56d40 T r100_reloc_pitch_offset +ffffffff81c56e70 T r100_packet3_load_vbpntr +ffffffff81c57110 T r100_cs_parse_packet0 +ffffffff81c57220 T r100_cs_packet_parse_vline +ffffffff81c57410 T r100_cs_track_check_pkt3_indx_buffer +ffffffff81c57490 T r100_cs_parse +ffffffff81c58950 T r100_cs_track_clear +ffffffff81c58ce0 T r100_cs_track_check +ffffffff81c596c0 T r100_mc_wait_for_idle +ffffffff81c59760 T r100_gpu_is_lockup +ffffffff81c597c0 T r100_enable_bm +ffffffff81c59810 T r100_bm_disable +ffffffff81c598c0 T r100_asic_reset +ffffffff81c59bf0 T r100_mc_stop +ffffffff81c59db0 T r100_mc_resume +ffffffff81c59e70 T r100_set_common_regs +ffffffff81c5a020 T r100_vram_init_sizes +ffffffff81c5a210 T r100_vga_set_state +ffffffff81c5a270 T r100_pll_errata_after_index +ffffffff81c5a2b0 T r100_pll_rreg +ffffffff81c5a3e0 T r100_pll_wreg +ffffffff81c5a4f0 T r100_debugfs_rbbm_init +ffffffff81c5a520 T r100_debugfs_mc_info_init +ffffffff81c5a550 T r100_set_surface_reg +ffffffff81c5a760 T r100_clear_surface_reg +ffffffff81c5a810 T r100_bandwidth_update +ffffffff81c5b2c0 T r100_ring_test +ffffffff81c5b580 T r100_ring_ib_execute +ffffffff81c5b7e0 T r100_ib_test +ffffffff81c5bb20 T r100_vga_render_disable +ffffffff81c5bb80 T r100_resume +ffffffff81c5bd80 t r100_startup +ffffffff81c5c2b0 T r100_suspend +ffffffff81c5c390 T r100_fini +ffffffff81c5c4a0 T r100_restore_sanity +ffffffff81c5c540 T r100_init +ffffffff81c5cab0 T r100_mm_rreg_slow +ffffffff81c5cb30 T r100_mm_wreg_slow +ffffffff81c5cb90 T r100_io_rreg +ffffffff81c5cc30 T r100_io_wreg +ffffffff81c5cca0 t r100_cs_track_texture_print +ffffffff81c5d000 T r200_copy_dma +ffffffff81c5d470 T r200_packet0_check +ffffffff81c5e490 T r200_set_safe_registers +ffffffff81c5f000 T rv370_pcie_rreg +ffffffff81c5f080 T rv370_pcie_wreg +ffffffff81c5f0f0 T rv370_pcie_gart_tlb_flush +ffffffff81c5f2f0 T rv370_pcie_gart_get_page_entry +ffffffff81c5f350 T rv370_pcie_gart_set_page +ffffffff81c5f390 T rv370_pcie_gart_init +ffffffff81c5f460 T rv370_pcie_gart_enable +ffffffff81c5f7c0 T rv370_pcie_gart_disable +ffffffff81c5f940 T rv370_pcie_gart_fini +ffffffff81c5f970 T r300_fence_ring_emit +ffffffff81c5ff00 T r300_ring_start +ffffffff81c60910 T r300_mc_wait_for_idle +ffffffff81c609b0 T r300_asic_reset +ffffffff81c60bd0 T r300_mc_init +ffffffff81c60c80 T rv370_set_pcie_lanes +ffffffff81c60e40 T rv370_get_pcie_lanes +ffffffff81c60ef0 T r300_cs_parse +ffffffff81c61260 t r300_packet0_check +ffffffff81c620c0 T r300_set_reg_safe +ffffffff81c62100 T r300_mc_program +ffffffff81c62280 T r300_clock_startup +ffffffff81c62310 T r300_resume +ffffffff81c624e0 t r300_startup +ffffffff81c62840 T r300_suspend +ffffffff81c628c0 T r300_fini +ffffffff81c629a0 T r300_init +ffffffff81c63000 T r420_pm_init_profile +ffffffff81c630f0 T r420_pipes_init +ffffffff81c632d0 T r420_mc_rreg +ffffffff81c63350 T r420_mc_wreg +ffffffff81c633c0 T r420_resume +ffffffff81c63590 t r420_startup +ffffffff81c63920 T r420_suspend +ffffffff81c63ac0 T r420_fini +ffffffff81c63ba0 T r420_init +ffffffff81c63e20 T r420_debugfs_pipes_info_init +ffffffff81c64000 T r520_mc_wait_for_idle +ffffffff81c640a0 T r520_resume +ffffffff81c64190 t r520_startup +ffffffff81c64580 T r520_init +ffffffff81c65000 T r600_rcu_rreg +ffffffff81c65080 T r600_rcu_wreg +ffffffff81c650f0 T r600_uvd_ctx_rreg +ffffffff81c65170 T r600_uvd_ctx_wreg +ffffffff81c651e0 T r600_get_allowed_info_register +ffffffff81c65260 T r600_get_xclk +ffffffff81c65290 T r600_set_uvd_clocks +ffffffff81c657f0 T dce3_program_fmt +ffffffff81c65910 T rv6xx_get_temp +ffffffff81c65960 T r600_pm_get_dynpm_state +ffffffff81c65d60 T rs780_pm_init_profile +ffffffff81c65e70 T r600_pm_init_profile +ffffffff81c66110 T r600_pm_misc +ffffffff81c661f0 T r600_gui_idle +ffffffff81c66230 T r600_hpd_sense +ffffffff81c66350 T r600_hpd_set_polarity +ffffffff81c665c0 T r600_hpd_init +ffffffff81c667d0 T r600_hpd_fini +ffffffff81c66980 T r600_pcie_gart_tlb_flush +ffffffff81c66ac0 T r600_pcie_gart_init +ffffffff81c66b60 T r600_mc_wait_for_idle +ffffffff81c66c00 T rs780_mc_rreg +ffffffff81c66ca0 T rs780_mc_wreg +ffffffff81c66d30 T r600_vram_scratch_init +ffffffff81c66e30 t radeon_bo_reserve +ffffffff81c66fa0 t radeon_bo_unreserve +ffffffff81c67080 T r600_vram_scratch_fini +ffffffff81c67100 T r600_set_bios_scratch_engine_hung +ffffffff81c67150 T r600_gpu_check_soft_reset +ffffffff81c674d0 T r600_asic_reset +ffffffff81c67860 t r600_gpu_pci_config_reset +ffffffff81c67a70 T r600_gfx_is_lockup +ffffffff81c67ae0 T r6xx_remap_render_backend +ffffffff81c67cd0 T r600_count_pipe_bits +ffffffff81c67d40 T r600_pciep_rreg +ffffffff81c67dc0 T r600_pciep_wreg +ffffffff81c67e30 T r600_cp_stop +ffffffff81c67eb0 T r600_init_microcode +ffffffff81c68380 T r600_gfx_get_rptr +ffffffff81c683e0 T r600_gfx_get_wptr +ffffffff81c68420 T r600_gfx_set_wptr +ffffffff81c68460 T r600_cp_start +ffffffff81c687e0 T r600_cp_resume +ffffffff81c68b40 T r600_ring_init +ffffffff81c68be0 T r600_cp_fini +ffffffff81c68c70 T r600_scratch_init +ffffffff81c68ce0 T r600_ring_test +ffffffff81c68f90 T r600_fence_ring_emit +ffffffff81c69850 T r600_semaphore_ring_emit +ffffffff81c69a40 T r600_copy_cpdma +ffffffff81c6a000 T r600_set_surface_reg +ffffffff81c6a030 T r600_clear_surface_reg +ffffffff81c6a060 T r600_vga_set_state +ffffffff81c6a0c0 T r600_resume +ffffffff81c6a150 t r600_startup +ffffffff81c6c150 T r600_suspend +ffffffff81c6c2c0 T r600_irq_suspend +ffffffff81c6c380 t r600_pcie_gart_disable +ffffffff81c6c580 T r600_init +ffffffff81c6cd50 T r600_ih_ring_init +ffffffff81c6cdc0 T r600_irq_fini +ffffffff81c6cf00 T r600_fini +ffffffff81c6d090 T r600_ring_ib_execute +ffffffff81c6d510 T r600_ib_test +ffffffff81c6d7c0 T r600_ih_ring_alloc +ffffffff81c6d8e0 T r600_ih_ring_fini +ffffffff81c6d970 T r600_rlc_stop +ffffffff81c6db00 T r600_disable_interrupts +ffffffff81c6dbb0 T r600_irq_init +ffffffff81c6e020 t r600_disable_interrupt_state +ffffffff81c6e310 T r600_irq_disable +ffffffff81c6e3d0 T r600_irq_set +ffffffff81c6eb50 t r600_irq_ack +ffffffff81c6f040 T r600_irq_process +ffffffff81c6fc20 T r600_mmio_hdp_flush +ffffffff81c6fca0 T r600_set_pcie_lanes +ffffffff81c6fdd0 T r600_get_pcie_lanes +ffffffff81c6feb0 T r600_get_gpu_clock_counter +ffffffff81c70000 T r600_fmt_is_valid_color +ffffffff81c70040 T r600_fmt_is_valid_texture +ffffffff81c70090 T r600_fmt_get_blocksize +ffffffff81c700d0 T r600_fmt_get_nblocksx +ffffffff81c70130 T r600_fmt_get_nblocksy +ffffffff81c70190 T r600_cs_common_vline_parse +ffffffff81c70460 T r600_mip_minify +ffffffff81c704c0 T r600_cs_parse +ffffffff81c72420 T r600_dma_cs_next_reloc +ffffffff81c724a0 T r600_dma_cs_parse +ffffffff81c72bc0 t r600_cs_track_check +ffffffff81c73cb0 t r600_cs_check_reg +ffffffff81c75000 T r600_dma_get_rptr +ffffffff81c75060 T r600_dma_get_wptr +ffffffff81c750a0 T r600_dma_set_wptr +ffffffff81c750e0 T r600_dma_stop +ffffffff81c75170 T r600_dma_resume +ffffffff81c75380 T r600_dma_fini +ffffffff81c75400 T r600_dma_is_lockup +ffffffff81c75470 T r600_dma_ring_test +ffffffff81c756d0 T r600_dma_fence_ring_emit +ffffffff81c758c0 T r600_dma_semaphore_ring_emit +ffffffff81c759e0 T r600_dma_ib_test +ffffffff81c75bf0 T r600_dma_ring_ib_execute +ffffffff81c75f30 T r600_copy_dma +ffffffff81c77000 T r600_dpm_print_class_info +ffffffff81c772b0 T r600_dpm_print_cap_info +ffffffff81c77340 T r600_dpm_print_ps_status +ffffffff81c773d0 T r600_dpm_get_vblank_time +ffffffff81c77490 T r600_dpm_get_vrefresh +ffffffff81c77520 T r600_calculate_u_and_p +ffffffff81c775a0 T r600_calculate_at +ffffffff81c77650 T r600_gfx_clockgating_enable +ffffffff81c77760 T r600_dynamicpm_enable +ffffffff81c777c0 T r600_enable_thermal_protection +ffffffff81c77820 T r600_enable_acpi_pm +ffffffff81c77870 T r600_enable_dynamic_pcie_gen2 +ffffffff81c778d0 T r600_dynamicpm_enabled +ffffffff81c77910 T r600_enable_sclk_control +ffffffff81c77970 T r600_enable_mclk_control +ffffffff81c779d0 T r600_enable_spll_bypass +ffffffff81c77a30 T r600_wait_for_spll_change +ffffffff81c77ab0 T r600_set_bsp +ffffffff81c77af0 T r600_set_at +ffffffff81c77b50 T r600_set_tc +ffffffff81c77bb0 T r600_select_td +ffffffff81c77c70 T r600_set_vrc +ffffffff81c77cb0 T r600_set_tpu +ffffffff81c77d10 T r600_set_tpc +ffffffff81c77d70 T r600_set_sstu +ffffffff81c77dd0 T r600_set_sst +ffffffff81c77e20 T r600_set_git +ffffffff81c77e70 T r600_set_fctu +ffffffff81c77ed0 T r600_set_fct +ffffffff81c77f20 T r600_set_ctxcgtt3d_rphc +ffffffff81c77f80 T r600_set_ctxcgtt3d_rsdc +ffffffff81c77fe0 T r600_set_vddc3d_oorsu +ffffffff81c78040 T r600_set_vddc3d_oorphc +ffffffff81c780a0 T r600_set_vddc3d_oorsdc +ffffffff81c78100 T r600_set_mpll_lock_time +ffffffff81c78150 T r600_set_mpll_reset_time +ffffffff81c781a0 T r600_engine_clock_entry_enable +ffffffff81c782a0 T r600_engine_clock_entry_enable_pulse_skipping +ffffffff81c783a0 T r600_engine_clock_entry_enable_post_divider +ffffffff81c784a0 T r600_engine_clock_entry_set_post_divider +ffffffff81c78560 T r600_engine_clock_entry_set_reference_divider +ffffffff81c78620 T r600_engine_clock_entry_set_feedback_divider +ffffffff81c786e0 T r600_engine_clock_entry_set_step_time +ffffffff81c787a0 T r600_vid_rt_set_ssu +ffffffff81c78800 T r600_vid_rt_set_vru +ffffffff81c78860 T r600_vid_rt_set_vrt +ffffffff81c788c0 T r600_voltage_control_enable_pins +ffffffff81c78910 T r600_voltage_control_program_voltages +ffffffff81c789a0 T r600_voltage_control_deactivate_static_control +ffffffff81c78a30 T r600_power_level_enable +ffffffff81c78aa0 T r600_power_level_set_voltage_index +ffffffff81c78b10 T r600_power_level_set_mem_clock_index +ffffffff81c78b70 T r600_power_level_set_eng_clock_index +ffffffff81c78be0 T r600_power_level_set_watermark_id +ffffffff81c78c50 T r600_power_level_set_pcie_gen2 +ffffffff81c78cb0 T r600_power_level_get_current_index +ffffffff81c78cf0 T r600_power_level_get_target_index +ffffffff81c78d30 T r600_power_level_set_enter_index +ffffffff81c78d90 T r600_wait_for_power_level_unequal +ffffffff81c78e80 T r600_wait_for_power_level +ffffffff81c78f70 T r600_start_dpm +ffffffff81c79250 T r600_stop_dpm +ffffffff81c792a0 T r600_dpm_pre_set_power_state +ffffffff81c792d0 T r600_dpm_post_set_power_state +ffffffff81c79300 T r600_is_uvd_state +ffffffff81c79340 T r600_is_internal_thermal_sensor +ffffffff81c79380 T r600_dpm_late_enable +ffffffff81c79490 T r600_get_platform_caps +ffffffff81c79530 T r600_parse_extended_power_table +ffffffff81c7a4a0 T r600_free_extended_power_table +ffffffff81c7a5a0 T r600_get_pcie_gen_support +ffffffff81c7a5f0 T r600_get_pcie_lane_support +ffffffff81c7a650 T r600_encode_pci_lane_width +ffffffff81c7b000 T r600_audio_update_hdmi +ffffffff81c7b180 t r600_audio_status +ffffffff81c7b2a0 T r600_hdmi_buffer_status_changed +ffffffff81c7b340 T r600_hdmi_update_audio_settings +ffffffff81c7b710 T r600_audio_enable +ffffffff81c7b790 T r600_audio_get_pin +ffffffff81c7b7c0 T r600_hdmi_update_acr +ffffffff81c7bb60 T r600_set_avi_packet +ffffffff81c7bd60 T r600_hdmi_audio_workaround +ffffffff81c7be30 T r600_hdmi_audio_set_dto +ffffffff81c7bef0 T r600_set_vbi_packet +ffffffff81c7bfb0 T r600_set_audio_packet +ffffffff81c7c280 T r600_set_mute +ffffffff81c7c390 T r600_hdmi_enable +ffffffff81c7d000 T radeon_acpi_is_pcie_performance_request_supported +ffffffff81c7d050 T radeon_acpi_pcie_notify_device_ready +ffffffff81c7d180 T radeon_acpi_pcie_performance_request +ffffffff81c7d3a0 T radeon_acpi_init +ffffffff81c7daf0 t radeon_acpi_event +ffffffff81c7de40 T radeon_acpi_fini +ffffffff81c7e000 T radeon_agp_head_init +ffffffff81c7e050 T radeon_agp_init +ffffffff81c7e0a0 T radeon_agp_resume +ffffffff81c7e130 T radeon_agp_fini +ffffffff81c7e180 T radeon_agp_suspend +ffffffff81c7f000 T radeon_agp_disable +ffffffff81c7f120 T radeon_asic_init +ffffffff81c7f9b0 t radeon_invalid_rreg +ffffffff81c7f9f0 t radeon_invalid_wreg +ffffffff81c7fa30 t radeon_invalid_get_allowed_info_register +ffffffff81c80000 T radeon_atombios_i2c_init +ffffffff81c803b0 T radeon_atombios_lookup_gpio +ffffffff81c804b0 T radeon_get_atom_connector_info_from_object_table +ffffffff81c80e10 t radeon_lookup_i2c_gpio +ffffffff81c81110 t radeon_atom_apply_quirks +ffffffff81c81540 T radeon_get_atom_connector_info_from_supported_devices_table +ffffffff81c81a40 T radeon_atom_get_clock_info +ffffffff81c81dc0 T radeon_atombios_sideport_present +ffffffff81c81e70 T radeon_atombios_get_tmds_info +ffffffff81c81fb0 T radeon_atombios_get_ppll_ss_info +ffffffff81c820d0 T radeon_atombios_get_asic_ss_info +ffffffff81c82440 T radeon_atombios_get_lvds_info +ffffffff81c827b0 T radeon_atombios_get_primary_dac_info +ffffffff81c82860 T radeon_atom_get_tv_timings +ffffffff81c82ab0 T radeon_atombios_get_tv_info +ffffffff81c82b60 T radeon_atombios_get_tv_dac_info +ffffffff81c82c60 T radeon_atombios_get_default_voltages +ffffffff81c82d20 T radeon_atombios_get_power_modes +ffffffff81c83df0 T radeon_atom_get_clock_dividers +ffffffff81c840f0 T radeon_atom_get_memory_pll_dividers +ffffffff81c84230 T radeon_atom_set_clock_gating +ffffffff81c84280 T radeon_atom_get_engine_clock +ffffffff81c842d0 T radeon_atom_get_memory_clock +ffffffff81c84320 T radeon_atom_set_engine_clock +ffffffff81c84370 T radeon_atom_set_memory_clock +ffffffff81c843d0 T radeon_atom_set_engine_dram_timings +ffffffff81c84440 T radeon_atom_update_memory_dll +ffffffff81c84490 T radeon_atom_set_ac_timing +ffffffff81c844e0 T radeon_atom_set_voltage +ffffffff81c845b0 T radeon_atom_get_max_vddc +ffffffff81c84690 T radeon_atom_get_leakage_vddc_based_on_leakage_idx +ffffffff81c84760 T radeon_atom_get_leakage_id_from_vbios +ffffffff81c84820 T radeon_atom_get_leakage_vddc_based_on_leakage_params +ffffffff81c84a30 T radeon_atom_get_voltage_evv +ffffffff81c84ae0 T radeon_atom_get_voltage_gpio_settings +ffffffff81c84be0 T radeon_atom_is_voltage_gpio +ffffffff81c84d70 T radeon_atom_get_svi2_info +ffffffff81c84e60 T radeon_atom_get_max_voltage +ffffffff81c85000 T radeon_atom_get_min_voltage +ffffffff81c85140 T radeon_atom_get_voltage_step +ffffffff81c85240 T radeon_atom_round_to_true_voltage +ffffffff81c853b0 T radeon_atom_get_voltage_table +ffffffff81c85620 T radeon_atom_get_memory_info +ffffffff81c857d0 T radeon_atom_get_mclk_range_table +ffffffff81c85a20 T radeon_atom_init_mc_reg_table +ffffffff81c85ca0 T radeon_atom_initialize_bios_scratch_regs +ffffffff81c85d70 T radeon_save_bios_scratch_regs +ffffffff81c85e50 T radeon_restore_bios_scratch_regs +ffffffff81c85f30 T radeon_atom_output_lock +ffffffff81c85fc0 T radeon_atombios_connected_scratch_regs +ffffffff81c86740 T radeon_atombios_encoder_crtc_scratch_regs +ffffffff81c86880 T radeon_atombios_encoder_dpms_scratch_regs +ffffffff81c86aa0 t radeon_atombios_parse_misc_flags_1_3 +ffffffff81c86c90 t radeon_atombios_add_pplib_thermal_controller +ffffffff81c87090 t radeon_atombios_parse_pplib_clock_info +ffffffff81c873a0 t radeon_atombios_parse_pplib_non_clock_info +ffffffff81c88000 T radeon_audio_init +ffffffff81c88290 T radeon_audio_endpoint_rreg +ffffffff81c882d0 T radeon_audio_endpoint_wreg +ffffffff81c88310 T radeon_audio_get_pin +ffffffff81c88360 T radeon_audio_detect +ffffffff81c88690 T radeon_audio_fini +ffffffff81c887d0 T radeon_audio_mode_set +ffffffff81c88820 T radeon_audio_dpms +ffffffff81c88870 T radeon_audio_decode_dfs_div +ffffffff81c888d0 t radeon_audio_hdmi_mode_set +ffffffff81c89000 t radeon_audio_write_speaker_allocation +ffffffff81c890b0 t radeon_audio_write_sad_regs +ffffffff81c89180 t radeon_audio_set_avi_packet +ffffffff81c892c0 t radeon_audio_dp_mode_set +ffffffff81c89440 t radeon_audio_rreg +ffffffff81c89490 t radeon_audio_wreg +ffffffff81c8a000 T radeon_benchmark +ffffffff81c8a940 t radeon_benchmark_move +ffffffff81c8ae00 t radeon_bo_reserve +ffffffff81c8af70 t radeon_bo_unreserve +ffffffff81c8c000 T radeon_get_bios +ffffffff81c8d000 t igp_read_bios_from_vram +ffffffff81c8d110 t radeon_read_bios +ffffffff81c8e000 T radeon_legacy_get_engine_clock +ffffffff81c8e0d0 T radeon_legacy_get_memory_clock +ffffffff81c8e1a0 T radeon_get_clock_info +ffffffff81c8e730 T radeon_legacy_set_engine_clock +ffffffff81c8ea80 T radeon_legacy_set_clock_gating +ffffffff81c90000 T radeon_combios_check_hardcoded_edid +ffffffff81c90100 T radeon_bios_get_hardcoded_edid +ffffffff81c90180 T radeon_combios_i2c_init +ffffffff81c90940 t combios_setup_i2c_bus +ffffffff81c90c40 T radeon_combios_get_clock_info +ffffffff81c90e30 T radeon_combios_sideport_present +ffffffff81c90eb0 T radeon_combios_get_primary_dac_info +ffffffff81c90ff0 T radeon_combios_get_tv_info +ffffffff81c910f0 T radeon_combios_get_tv_dac_info +ffffffff81c913a0 T radeon_combios_get_lvds_info +ffffffff81c919f0 T radeon_legacy_get_tmds_info_from_table +ffffffff81c91ac0 T radeon_legacy_get_tmds_info_from_combios +ffffffff81c91cd0 T radeon_legacy_get_ext_tmds_info_from_table +ffffffff81c91f10 T radeon_legacy_get_ext_tmds_info_from_combios +ffffffff81c922a0 T radeon_get_legacy_connector_info_from_table +ffffffff81c94660 T radeon_get_legacy_connector_info_from_bios +ffffffff81c953f0 T radeon_combios_get_power_modes +ffffffff81c95ca0 T radeon_external_tmds_setup +ffffffff81c95d70 T radeon_combios_external_tmds_setup +ffffffff81c96330 T radeon_combios_asic_init +ffffffff81c96950 t combios_parse_mmio_table +ffffffff81c96b70 t combios_parse_pll_table +ffffffff81c96e40 T radeon_combios_initialize_bios_scratch_regs +ffffffff81c96ed0 T radeon_combios_output_lock +ffffffff81c96f30 T radeon_combios_connected_scratch_regs +ffffffff81c97290 T radeon_combios_encoder_crtc_scratch_regs +ffffffff81c97370 T radeon_combios_encoder_dpms_scratch_regs +ffffffff81c98000 T radeon_connector_hotplug +ffffffff81c98100 T radeon_get_monitor_bpc +ffffffff81c98530 T radeon_connector_edid +ffffffff81c985e0 T radeon_connector_encoder_get_dp_bridge_encoder_id +ffffffff81c98660 T radeon_connector_is_dp12_capable +ffffffff81c98700 T radeon_add_atom_connector +ffffffff81c99550 T radeon_add_legacy_connector +ffffffff81c99a90 t radeon_dp_detect +ffffffff81c99e50 t radeon_dvi_force +ffffffff81c99ea0 t radeon_connector_set_property +ffffffff81c9a6e0 t radeon_connector_unregister +ffffffff81c9a740 t radeon_connector_destroy +ffffffff81c9a7b0 t radeon_best_single_encoder +ffffffff81c9a830 t radeon_connector_get_edid +ffffffff81c9a990 t radeon_dp_get_modes +ffffffff81c9acc0 t radeon_dp_mode_valid +ffffffff81c9ae90 t radeon_dvi_encoder +ffffffff81c9af70 t radeon_fixup_lvds_native_mode +ffffffff81c9b0a0 t radeon_add_common_modes +ffffffff81c9b190 t radeon_fp_native_mode +ffffffff81c9b260 t radeon_lvds_set_property +ffffffff81c9b350 t radeon_vga_detect +ffffffff81c9b600 t radeon_connector_analog_encoder_conflict_solve +ffffffff81c9b820 t radeon_vga_get_modes +ffffffff81c9b910 t radeon_vga_mode_valid +ffffffff81c9b970 t radeon_dvi_detect +ffffffff81c9c010 t radeon_dvi_mode_valid +ffffffff81c9c1a0 t radeon_tv_detect +ffffffff81c9c3e0 t radeon_tv_get_modes +ffffffff81c9c4b0 t radeon_tv_mode_valid +ffffffff81c9c500 t radeon_lvds_detect +ffffffff81c9c6a0 t radeon_lvds_get_modes +ffffffff81c9c810 t radeon_lvds_mode_valid +ffffffff81c9d000 T radeon_cs_parser_init +ffffffff81c9d490 T radeon_cs_ioctl +ffffffff81c9dfc0 t radeon_cs_parser_fini +ffffffff81c9e150 T radeon_cs_packet_parse +ffffffff81c9e300 T radeon_cs_packet_next_is_pkt3_nop +ffffffff81c9e360 T radeon_cs_dump_packet +ffffffff81c9e3e0 T radeon_cs_packet_next_reloc +ffffffff81c9e5b0 t cmp_size_smaller_first +ffffffff81c9f000 T radeon_crtc_cursor_move +ffffffff81c9f070 t radeon_lock_cursor +ffffffff81c9f230 t radeon_cursor_move_locked +ffffffff81c9f780 T radeon_crtc_cursor_set2 +ffffffff81c9fa00 t radeon_hide_cursor +ffffffff81c9fac0 t radeon_bo_reserve +ffffffff81c9fc30 t radeon_bo_unreserve +ffffffff81c9fd10 t radeon_show_cursor +ffffffff81c9ff60 T radeon_cursor_reset +ffffffff81ca0000 T radeon_is_px +ffffffff81ca0040 T radeon_program_register_sequence +ffffffff81ca0170 T radeon_pci_config_reset +ffffffff81ca01a0 T radeon_surface_init +ffffffff81ca0360 T radeon_scratch_init +ffffffff81ca03e0 T radeon_scratch_get +ffffffff81ca0460 T radeon_scratch_free +ffffffff81ca04c0 T radeon_doorbell_get +ffffffff81ca0570 T radeon_doorbell_free +ffffffff81ca05c0 T radeon_wb_disable +ffffffff81ca05f0 T radeon_wb_fini +ffffffff81ca0690 t radeon_bo_reserve +ffffffff81ca0800 t radeon_bo_unreserve +ffffffff81ca08e0 T radeon_wb_init +ffffffff81ca0bb0 T radeon_vram_location +ffffffff81ca0ce0 T radeon_gtt_location +ffffffff81ca0e10 T radeon_device_is_virtual +ffffffff81ca0e40 T radeon_card_posted +ffffffff81ca1060 T radeon_update_bandwidth_info +ffffffff81ca10e0 T radeon_boot_test_post_card +ffffffff81ca11a0 T radeon_dummy_page_init +ffffffff81ca1260 T radeon_dummy_page_fini +ffffffff81ca12c0 T radeon_atombios_init +ffffffff81ca1450 t cail_reg_read +ffffffff81ca14b0 t cail_reg_write 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radeon_crtc_scaling_mode_fixup +ffffffff81ca6310 T radeon_get_crtc_scanout_position +ffffffff81ca6380 t radeon_user_framebuffer_create +ffffffff81ca6520 t radeon_crtc_gamma_set +ffffffff81ca6560 t radeon_crtc_destroy +ffffffff81ca65a0 t radeon_crtc_set_config +ffffffff81ca6660 t radeon_crtc_page_flip_target +ffffffff81ca6af0 t radeon_flip_work_func +ffffffff81ca6d10 t radeon_unpin_work_func +ffffffff81ca6d90 t radeon_bo_reserve +ffffffff81ca6f00 t radeon_bo_unreserve +ffffffff81ca7000 T radeon_dp_aux_transfer_native +ffffffff81ca8000 T radeondrm_probe +ffffffff81ca8060 T radeondrm_attach_kms +ffffffff81ca87a0 T radeondrm_detach_kms +ffffffff81ca8830 T radeondrm_activate_kms +ffffffff81ca88f0 T radeondrm_wsioctl +ffffffff81ca89a0 T radeondrm_wsmmap +ffffffff81ca89d0 T radeondrm_alloc_screen +ffffffff81ca8a00 T radeondrm_free_screen +ffffffff81ca8a10 T radeondrm_show_screen +ffffffff81ca8af0 T radeondrm_enter_ddb +ffffffff81ca8b50 T radeondrm_doswitch +ffffffff81ca8be0 T radeondrm_setpal +ffffffff81ca8de0 T radeondrm_attachhook +ffffffff81ca9100 T radeondrm_forcedetach +ffffffff81caa000 T radeon_setup_encoder_clones +ffffffff81caa0b0 T radeon_get_encoder_enum +ffffffff81caa230 T radeon_link_encoder_connector +ffffffff81caa370 T radeon_encoder_set_active_device +ffffffff81caa430 T radeon_get_connector_for_encoder +ffffffff81caa4b0 T radeon_get_connector_for_encoder_init +ffffffff81caa530 T radeon_get_external_encoder +ffffffff81caa5c0 T radeon_encoder_get_dp_bridge_encoder_id +ffffffff81caa660 T radeon_panel_mode_fixup +ffffffff81caa830 T radeon_dig_monitor_is_duallink +ffffffff81caa950 T radeon_encoder_is_digital +ffffffff81cab000 T radeon_align_pitch +ffffffff81cab090 T radeon_fbdev_init +ffffffff81cab1e0 T radeondrm_burner_cb +ffffffff81cab210 T radeon_fbdev_fini +ffffffff81cab280 T radeon_fbdev_set_suspend +ffffffff81cab2d0 T radeon_fbdev_robj_is_fb +ffffffff81cab320 T radeondrm_burner +ffffffff81cab3a0 t radeonfb_create +ffffffff81cab7b0 t radeon_bo_reserve +ffffffff81cab920 t radeon_bo_unreserve +ffffffff81cac000 T radeon_fence_emit +ffffffff81cac120 T radeon_fence_process +ffffffff81cac1e0 t radeon_fence_activity +ffffffff81cac380 T radeon_fence_signaled +ffffffff81cac4b0 T radeon_fence_wait_timeout +ffffffff81cac600 t radeon_fence_wait_seq_timeout +ffffffff81caca70 T radeon_fence_wait +ffffffff81cacba0 T radeon_fence_wait_any +ffffffff81caccf0 T radeon_fence_wait_next +ffffffff81cacdb0 T radeon_fence_wait_empty +ffffffff81cacec0 T radeon_fence_ref +ffffffff81cacf00 T radeon_fence_unref +ffffffff81cacf40 T radeon_fence_count_emitted +ffffffff81cad040 T radeon_fence_need_sync +ffffffff81cad0a0 T radeon_fence_note_sync +ffffffff81cad270 T radeon_fence_driver_start_ring +ffffffff81cad450 T radeon_fence_driver_init +ffffffff81cad590 T radeon_debugfs_fence_init +ffffffff81cad5c0 T radeon_fence_driver_fini +ffffffff81cad7f0 T radeon_fence_driver_force_completion +ffffffff81cad8f0 t radeon_fence_get_driver_name +ffffffff81cad920 t radeon_fence_get_timeline_name +ffffffff81cad9c0 t radeon_fence_enable_signaling +ffffffff81cadbd0 t radeon_fence_is_signaled +ffffffff81cadd20 t radeon_fence_default_wait +ffffffff81cade80 t radeon_fence_any_seq_signaled +ffffffff81cae080 t radeon_fence_check_lockup +ffffffff81cae2c0 t __delayed_work_tick +ffffffff81cae2e0 t radeon_fence_check_signaled +ffffffff81cae370 t radeon_fence_wait_cb +ffffffff81caf000 T radeon_gart_table_ram_alloc +ffffffff81caf0c0 T radeon_gart_table_ram_free +ffffffff81caf130 T radeon_gart_table_vram_alloc +ffffffff81caf1b0 T radeon_gart_table_vram_pin +ffffffff81caf2f0 t radeon_bo_reserve +ffffffff81caf460 t radeon_bo_unreserve +ffffffff81caf540 T radeon_gart_table_vram_unpin +ffffffff81caf5c0 T radeon_gart_table_vram_free +ffffffff81caf600 T radeon_gart_unbind +ffffffff81caf720 T radeon_gart_bind +ffffffff81caf870 T radeon_gart_init +ffffffff81caf9a0 T radeon_gart_fini +ffffffff81cb0000 T radeon_gem_fault +ffffffff81cb0180 T radeon_gem_vm_reference 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+ffffffff81cb1560 T radeon_gem_op_ioctl +ffffffff81cb1660 T radeon_mode_dumb_create +ffffffff81cb1760 T radeon_gem_debugfs_init +ffffffff81cb2000 T radeon_ddc_probe +ffffffff81cb20c0 T radeon_router_select_ddc_port +ffffffff81cb2320 T radeon_bb_set_bits +ffffffff81cb2490 T radeon_bb_set_dir +ffffffff81cb24c0 T radeon_bb_read_bits +ffffffff81cb25a0 T radeon_acquire_bus +ffffffff81cb29f0 T radeon_release_bus +ffffffff81cb2b60 T radeon_send_start +ffffffff81cb2b80 T radeon_send_stop +ffffffff81cb2ba0 T radeon_initiate_xfer +ffffffff81cb2bc0 T radeon_read_byte +ffffffff81cb2be0 T radeon_write_byte +ffffffff81cb2c00 T radeon_i2c_create +ffffffff81cb2e10 T radeon_i2c_destroy +ffffffff81cb2e90 T radeon_i2c_init +ffffffff81cb2ee0 T radeon_i2c_fini +ffffffff81cb2f90 T radeon_i2c_add +ffffffff81cb3140 T radeon_i2c_lookup +ffffffff81cb3300 T radeon_i2c_get_byte +ffffffff81cb33d0 T radeon_i2c_put_byte +ffffffff81cb3460 T radeon_router_select_cd_port +ffffffff81cb36c0 t radeon_hw_i2c_xfer +ffffffff81cb4280 t radeon_hw_i2c_func +ffffffff81cb42b0 t r100_hw_i2c_xfer +ffffffff81cb4990 t radeon_get_i2c_prescale +ffffffff81cb5000 T radeon_ib_get +ffffffff81cb5100 T radeon_ib_free +ffffffff81cb5150 T radeon_ib_schedule +ffffffff81cb53e0 T radeon_ib_pool_init +ffffffff81cb5480 T radeon_ib_pool_fini +ffffffff81cb54f0 T radeon_ib_ring_tests +ffffffff81cb6000 T radeon_driver_irq_handler_kms +ffffffff81cb6050 T radeon_msi_ok +ffffffff81cb6150 T radeon_irq_kms_init +ffffffff81cb63e0 t radeon_hotplug_work_func +ffffffff81cb6490 t radeon_dp_work_func +ffffffff81cb6500 T radeon_irq_kms_fini +ffffffff81cb66a0 T radeon_irq_kms_sw_irq_get +ffffffff81cb6740 T radeon_irq_kms_sw_irq_get_delayed +ffffffff81cb6780 T radeon_irq_kms_sw_irq_put +ffffffff81cb6810 T radeon_irq_kms_pflip_irq_get +ffffffff81cb68c0 T radeon_irq_kms_pflip_irq_put +ffffffff81cb6960 T radeon_irq_kms_enable_afmt +ffffffff81cb69f0 T radeon_irq_kms_disable_afmt +ffffffff81cb6a80 T radeon_irq_kms_enable_hpd +ffffffff81cb6b70 T radeon_irq_kms_disable_hpd +ffffffff81cb6c50 T radeon_irq_kms_set_irq_n_enabled +ffffffff81cb6dc0 t __delayed_work_tick +ffffffff81cb7000 T radeon_info_ioctl +ffffffff81cb7bf0 T radeon_driver_lastclose_kms +ffffffff81cb7c00 T radeon_driver_open_kms +ffffffff81cb7d30 t radeon_bo_reserve +ffffffff81cb7ea0 T radeon_driver_postclose_kms +ffffffff81cb80c0 T radeon_get_vblank_counter_kms +ffffffff81cb8260 T radeon_enable_vblank_kms +ffffffff81cb8310 T radeon_disable_vblank_kms +ffffffff81cb9000 T radeon_crtc_set_base +ffffffff81cb9020 T radeon_crtc_do_set_base +ffffffff81cb95c0 T radeon_crtc_set_base_atomic +ffffffff81cb95e0 t radeon_bo_reserve +ffffffff81cb9750 t radeon_bo_unreserve +ffffffff81cb9830 T radeon_legacy_init_crtc +ffffffff81cb9880 t radeon_crtc_dpms +ffffffff81cb9a80 t radeon_crtc_prepare +ffffffff81cb9b00 t radeon_crtc_commit +ffffffff81cb9b70 t radeon_crtc_mode_fixup +ffffffff81cb9b90 t radeon_crtc_mode_set +ffffffff81cbafe0 t radeon_crtc_disable +ffffffff81cbc000 T radeon_legacy_get_backlight_level +ffffffff81cbc040 T radeon_legacy_set_backlight_level +ffffffff81cbc080 t radeon_legacy_lvds_update +ffffffff81cbc3e0 T radeon_legacy_backlight_init +ffffffff81cbc5b0 t radeon_legacy_backlight_get_brightness +ffffffff81cbc610 T radeon_add_legacy_encoder +ffffffff81cbc990 t radeon_legacy_backlight_update_status +ffffffff81cbca20 t radeon_lvds_enc_destroy +ffffffff81cbcab0 t radeon_legacy_lvds_dpms +ffffffff81cbcb00 t radeon_legacy_mode_fixup +ffffffff81cbcb70 t radeon_legacy_lvds_prepare +ffffffff81cbcc00 t radeon_legacy_lvds_commit +ffffffff81cbcc80 t radeon_legacy_lvds_mode_set +ffffffff81cbce90 t radeon_legacy_encoder_disable +ffffffff81cbcee0 t radeon_legacy_tmds_int_dpms +ffffffff81cbcfa0 t radeon_legacy_tmds_int_prepare +ffffffff81cbd070 t radeon_legacy_tmds_int_commit +ffffffff81cbd140 t radeon_legacy_tmds_int_mode_set +ffffffff81cbd3b0 t radeon_legacy_primary_dac_dpms +ffffffff81cbd4f0 t radeon_legacy_primary_dac_prepare +ffffffff81cbd550 t radeon_legacy_primary_dac_commit +ffffffff81cbd5a0 t radeon_legacy_primary_dac_mode_set +ffffffff81cbd750 t radeon_legacy_primary_dac_detect +ffffffff81cbd940 t radeon_legacy_tv_dac_dpms +ffffffff81cbdb40 t radeon_legacy_tv_dac_prepare +ffffffff81cbdba0 t radeon_legacy_tv_dac_commit +ffffffff81cbdbf0 t radeon_legacy_tv_dac_mode_set +ffffffff81cbdf90 t radeon_legacy_tv_dac_detect +ffffffff81cbebc0 t radeon_ext_tmds_enc_destroy +ffffffff81cbec10 t radeon_legacy_tmds_ext_dpms +ffffffff81cbece0 t radeon_legacy_tmds_ext_prepare +ffffffff81cbedb0 t radeon_legacy_tmds_ext_commit +ffffffff81cbee80 t radeon_legacy_tmds_ext_mode_set +ffffffff81cc0000 T radeon_legacy_tv_mode_set +ffffffff81cc10b0 T radeon_legacy_tv_adjust_crtc_reg +ffffffff81cc11c0 T radeon_legacy_tv_adjust_pll1 +ffffffff81cc12b0 T radeon_legacy_tv_adjust_pll2 +ffffffff81cc2000 T radeon_ttm_bo_is_radeon_bo +ffffffff81cc2040 t radeon_ttm_bo_destroy +ffffffff81cc2170 T radeon_ttm_placement_from_domain +ffffffff81cc22e0 T radeon_bo_create +ffffffff81cc24a0 T radeon_bo_kmap +ffffffff81cc2580 T radeon_bo_check_tiling +ffffffff81cc2660 T radeon_bo_kunmap +ffffffff81cc26f0 T radeon_bo_ref +ffffffff81cc2730 T radeon_bo_unref +ffffffff81cc2780 T radeon_bo_pin_restricted +ffffffff81cc2ab0 T radeon_bo_pin +ffffffff81cc2ad0 T radeon_bo_unpin +ffffffff81cc2b40 T radeon_bo_evict_vram +ffffffff81cc2ba0 T radeon_bo_force_delete +ffffffff81cc2d00 T radeon_bo_init +ffffffff81cc2de0 T radeon_bo_fini +ffffffff81cc2e20 T radeon_bo_list_validate +ffffffff81cc3110 T radeon_bo_get_surface_reg +ffffffff81cc33b0 T radeon_bo_set_tiling_flags +ffffffff81cc36c0 T radeon_bo_get_tiling_flags +ffffffff81cc3710 T radeon_bo_move_notify +ffffffff81cc37d0 T radeon_bo_fault_reserve_notify +ffffffff81cc3ad0 T radeon_bo_fence +ffffffff81cc4000 T radeon_pm_get_type_index +ffffffff81cc4080 T radeon_pm_acpi_event_handler +ffffffff81cc4160 t radeon_pm_update_profile +ffffffff81cc4280 t radeon_pm_set_clocks +ffffffff81cc4c40 T radeon_dpm_enable_uvd +ffffffff81cc4d00 T radeon_pm_compute_clocks +ffffffff81cc5740 T radeon_dpm_enable_vce +ffffffff81cc57b0 T radeon_pm_suspend +ffffffff81cc58b0 T radeon_pm_resume +ffffffff81cc5ba0 T radeon_pm_init +ffffffff81cc62a0 T radeon_pm_late_init +ffffffff81cc6360 T radeon_pm_fini +ffffffff81cc6470 t radeon_dpm_thermal_work_handler +ffffffff81cc6550 t radeon_dynpm_idle_work_handler +ffffffff81cc6840 t __delayed_work_tick +ffffffff81cc7000 T radeon_gem_prime_get_sg_table +ffffffff81cc7030 T radeon_gem_prime_pin +ffffffff81cc70c0 t radeon_bo_reserve +ffffffff81cc7230 t radeon_bo_unreserve +ffffffff81cc7310 T radeon_gem_prime_unpin +ffffffff81cc7380 T radeon_gem_prime_export +ffffffff81cc8000 T radeon_ring_supports_scratch_reg +ffffffff81cc8030 T radeon_ring_free_size +ffffffff81cc80e0 T radeon_ring_lockup_update +ffffffff81cc8140 T radeon_ring_alloc +ffffffff81cc82c0 T radeon_ring_lock +ffffffff81cc8340 T radeon_ring_commit +ffffffff81cc8440 T radeon_ring_unlock_commit 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+ffffffff81ccf9c0 t radeon_evict_flags +ffffffff81ccfb10 t radeon_bo_move +ffffffff81ccff90 t radeon_ttm_io_mem_reserve +ffffffff81cd1000 T radeon_ucode_print_mc_hdr +ffffffff81cd10b0 t radeon_ucode_print_common_hdr +ffffffff81cd11e0 T radeon_ucode_print_smc_hdr +ffffffff81cd1270 T radeon_ucode_print_gfx_hdr +ffffffff81cd1340 T radeon_ucode_print_rlc_hdr +ffffffff81cd1440 T radeon_ucode_print_sdma_hdr +ffffffff81cd1520 T radeon_ucode_validate +ffffffff81cd2000 T radeon_uvd_init +ffffffff81cd24e0 t radeon_uvd_idle_work_handler +ffffffff81cd2650 t radeon_bo_reserve +ffffffff81cd2840 t radeon_bo_unreserve +ffffffff81cd2920 T radeon_uvd_fini +ffffffff81cd29f0 T radeon_uvd_suspend +ffffffff81cd2bb0 T radeon_uvd_note_usage +ffffffff81cd2df0 T radeon_uvd_get_destroy_msg +ffffffff81cd2f00 T radeon_uvd_resume +ffffffff81cd2f90 T radeon_uvd_force_into_uvd_segment +ffffffff81cd3030 T radeon_uvd_free_handles +ffffffff81cd31f0 T radeon_uvd_cs_parse +ffffffff81cd3910 T radeon_uvd_get_create_msg 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radeon_vm_manager_init +ffffffff81cd8060 T radeon_vm_manager_fini +ffffffff81cd8180 T radeon_vm_get_bos +ffffffff81cd82b0 T radeon_vm_grab_id +ffffffff81cd8440 T radeon_vm_flush +ffffffff81cd85d0 T radeon_vm_fence +ffffffff81cd8680 T radeon_vm_bo_find +ffffffff81cd86e0 T radeon_vm_bo_add +ffffffff81cd87c0 T radeon_vm_bo_set_addr +ffffffff81cd8c20 t radeon_bo_unreserve +ffffffff81cd8d00 t radeon_vm_clear_bo +ffffffff81cd8ef0 T radeon_vm_map_gart +ffffffff81cd8f30 T radeon_vm_update_page_directory +ffffffff81cd92e0 T radeon_vm_bo_update +ffffffff81cd99c0 T radeon_vm_clear_freed +ffffffff81cd9aa0 T radeon_vm_clear_invalids +ffffffff81cd9b40 T radeon_vm_bo_rmv +ffffffff81cd9c30 T radeon_vm_bo_invalidate +ffffffff81cd9ce0 T radeon_vm_init +ffffffff81cd9f40 T radeon_vm_fini +ffffffff81cda210 t radeon_bo_reserve +ffffffff81cda380 t radeon_vm_frag_ptes +ffffffff81cdb000 T rs400_gart_adjust_size +ffffffff81cdb0c0 T rs400_gart_tlb_flush +ffffffff81cdb140 T rs400_gart_init +ffffffff81cdb240 T rs400_gart_enable +ffffffff81cdb5a0 T rs400_gart_disable +ffffffff81cdb600 T rs400_gart_fini +ffffffff81cdb670 T rs400_gart_get_page_entry +ffffffff81cdb6d0 T rs400_gart_set_page +ffffffff81cdb710 T rs400_mc_wait_for_idle +ffffffff81cdb7b0 T rs400_mc_rreg +ffffffff81cdb840 T rs400_mc_wreg +ffffffff81cdb8c0 T rs400_resume +ffffffff81cdb9f0 t rs400_mc_program +ffffffff81cdbaf0 t rs400_startup +ffffffff81cdbce0 T rs400_suspend +ffffffff81cdbd80 T rs400_fini +ffffffff81cdbe70 T rs400_init +ffffffff81cdd000 T avivo_wait_for_vblank +ffffffff81cdd280 T rs600_page_flip +ffffffff81cdd540 T rs600_page_flip_pending +ffffffff81cdd5b0 T avivo_program_fmt +ffffffff81cdd6d0 T rs600_pm_misc +ffffffff81cdda10 T rs600_pm_prepare +ffffffff81cddb10 T rs600_pm_finish +ffffffff81cddc10 T rs600_hpd_sense +ffffffff81cddc70 T rs600_hpd_set_polarity +ffffffff81cddd30 T rs600_hpd_init +ffffffff81cdde10 T rs600_hpd_fini +ffffffff81cddeb0 T rs600_asic_reset +ffffffff81cde120 T rs600_gart_tlb_flush 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rv515_vga_render_disable +ffffffff81ce5c20 T rv515_mc_rreg +ffffffff81ce5cb0 T rv515_mc_wreg +ffffffff81ce5d30 T rv515_debugfs +ffffffff81ce5d40 T rv515_mc_stop +ffffffff81ce62d0 T rv515_mc_resume +ffffffff81ce68e0 T rv515_clock_startup +ffffffff81ce69b0 T rv515_resume +ffffffff81ce6bf0 t rv515_startup +ffffffff81ce70c0 T rv515_suspend +ffffffff81ce7130 T rv515_set_safe_registers +ffffffff81ce7170 T rv515_fini +ffffffff81ce7220 T rv515_init +ffffffff81ce7500 T atom_rv515_force_tv_scaler +ffffffff81ceaba0 T rv515_bandwidth_avivo_update +ffffffff81cead40 t rv515_crtc_bandwidth_compute +ffffffff81ceb080 t rv515_compute_mode_priority +ffffffff81ceb530 T rv515_bandwidth_update +ffffffff81cec000 T rv6xx_dpm_enable +ffffffff81cec7f0 t rv6xx_calculate_stepping_parameters +ffffffff81cec9c0 t rv6xx_program_stepping_parameters_except_lowest_entry +ffffffff81cecfb0 t rv6xx_program_stepping_parameters_lowest_entry +ffffffff81ced090 T rv6xx_dpm_disable +ffffffff81ced410 T rv6xx_dpm_set_power_state +ffffffff81cede10 T rv6xx_setup_asic +ffffffff81cedf50 T rv6xx_dpm_display_configuration_changed +ffffffff81cedfd0 T rv6xx_dpm_init +ffffffff81cee520 T rv6xx_dpm_print_power_state +ffffffff81cee5e0 T rv6xx_dpm_debugfs_print_current_performance_level +ffffffff81cee610 T rv6xx_dpm_get_current_sclk +ffffffff81cee680 T rv6xx_dpm_get_current_mclk +ffffffff81cee6f0 T rv6xx_dpm_fini +ffffffff81cee780 T rv6xx_dpm_get_sclk +ffffffff81cee7c0 T rv6xx_dpm_get_mclk +ffffffff81cee800 T rv6xx_dpm_force_performance_level +ffffffff81cee990 t rv6xx_generate_steps +ffffffff81ceeca0 t rv6xx_output_stepping +ffffffff81ceedc0 t rv6xx_program_mclk_stepping_entry +ffffffff81cef030 t rv6xx_program_engine_spread_spectrum +ffffffff81cef310 t rv6xx_step_sw_voltage +ffffffff81cf0000 T rv730_populate_sclk_value +ffffffff81cf0240 T rv730_populate_mclk_value +ffffffff81cf0460 T rv730_read_clock_registers +ffffffff81cf0580 T rv730_populate_smc_acpi_state +ffffffff81cf0730 T rv730_populate_smc_initial_state +ffffffff81cf08f0 T rv730_program_memory_timing_parameters +ffffffff81cf0ad0 T rv730_start_dpm +ffffffff81cf0b60 T rv730_stop_dpm +ffffffff81cf0c20 T rv730_program_dcodt +ffffffff81cf0cf0 T rv730_get_odt_values +ffffffff81cf1000 T rv740_get_decoded_reference_divider +ffffffff81cf10a0 T rv740_get_dll_speed +ffffffff81cf11d0 T rv740_populate_sclk_value +ffffffff81cf13e0 T rv740_populate_mclk_value +ffffffff81cf1840 T rv740_read_clock_registers +ffffffff81cf1970 T rv740_populate_smc_acpi_state +ffffffff81cf1ba0 T rv740_enable_mclk_spread_spectrum +ffffffff81cf1c00 T rv740_get_mclk_frequency_ratio +ffffffff81cf2000 T rv770_set_uvd_clocks +ffffffff81cf2570 T rv770_get_xclk +ffffffff81cf25d0 T rv770_page_flip +ffffffff81cf28e0 T rv770_page_flip_pending +ffffffff81cf2950 T rv770_get_temp +ffffffff81cf29b0 T rv770_pm_misc +ffffffff81cf2a90 T r700_cp_stop +ffffffff81cf2b10 T r700_cp_fini +ffffffff81cf2ba0 T rv770_set_clk_bypass_mode +ffffffff81cf2cc0 T r700_vram_gtt_location +ffffffff81cf2e40 T rv770_resume +ffffffff81cf2ed0 t rv770_init_golden_registers +ffffffff81cf3060 t rv770_startup +ffffffff81cf5030 T rv770_suspend +ffffffff81cf5250 T rv770_init +ffffffff81cf5810 T rv770_fini +ffffffff81cf6000 T rv770_copy_dma +ffffffff81cf7000 T rv770_get_ps +ffffffff81cf7030 T rv770_get_pi +ffffffff81cf7060 T evergreen_get_pi +ffffffff81cf7090 T rv770_restore_cgcg +ffffffff81cf7110 T rv770_stop_dpm +ffffffff81cf71d0 T rv770_dpm_enabled +ffffffff81cf7210 T rv770_enable_thermal_protection +ffffffff81cf7270 T rv770_enable_acpi_pm +ffffffff81cf72c0 T rv770_get_seq_value +ffffffff81cf7300 T rv770_write_smc_soft_register +ffffffff81cf7330 T rv770_populate_smc_t +ffffffff81cf74d0 T rv770_populate_smc_sp +ffffffff81cf7530 T rv770_map_clkf_to_ibias +ffffffff81cf7590 T rv770_populate_vddc_value +ffffffff81cf7640 T rv770_populate_mvdd_value +ffffffff81cf7690 T rv770_calculate_memory_refresh_rate +ffffffff81cf7700 T rv770_enable_backbias +ffffffff81cf7760 T rv770_setup_bsp +ffffffff81cf7850 T rv770_program_git +ffffffff81cf78a0 T rv770_program_tp +ffffffff81cf7920 T rv770_program_tpp +ffffffff81cf7960 T rv770_program_sstp +ffffffff81cf79a0 T rv770_program_engine_speed_parameters +ffffffff81cf79f0 T rv770_program_vc +ffffffff81cf7a40 T rv770_clear_vc +ffffffff81cf7a80 T rv770_upload_firmware +ffffffff81cf7ac0 T rv770_populate_initial_mvdd_value +ffffffff81cf7b10 T rv770_get_memory_module_index +ffffffff81cf7b50 T rv770_enable_voltage_control +ffffffff81cf7bb0 T rv770_halt_smc +ffffffff81cf7c10 T rv770_resume_smc +ffffffff81cf7c60 T rv770_set_sw_state +ffffffff81cf7cc0 T rv770_set_boot_state +ffffffff81cf7d10 T rv770_set_uvd_clock_before_set_eng_clock +ffffffff81cf7d80 T rv770_set_uvd_clock_after_set_eng_clock +ffffffff81cf7df0 T rv770_restrict_performance_levels_before_switch +ffffffff81cf7e50 T rv770_dpm_force_performance_level +ffffffff81cf7f10 T r7xx_start_smc +ffffffff81cf7f40 T r7xx_stop_smc +ffffffff81cf7f70 T rv770_read_voltage_smio_registers +ffffffff81cf7fb0 T rv770_reset_smio_status +ffffffff81cf8070 T rv770_get_memory_type +ffffffff81cf80c0 T rv770_get_pcie_gen2_status +ffffffff81cf8130 T rv770_get_max_vddc +ffffffff81cf8190 T rv770_program_response_times +ffffffff81cf82e0 T rv770_enable_auto_throttle_source +ffffffff81cf8460 T rv770_dpm_enable +ffffffff81cf94e0 T rv770_dpm_late_enable +ffffffff81cf9610 T rv770_dpm_disable +ffffffff81cf9970 T rv770_dpm_set_power_state +ffffffff81cf9f70 T rv770_dpm_setup_asic +ffffffff81cfa2d0 T rv770_dpm_display_configuration_changed +ffffffff81cfa350 T rv7xx_parse_power_table +ffffffff81cfa890 T rv770_get_engine_memory_ss +ffffffff81cfa920 T rv770_dpm_init +ffffffff81cfab60 T rv770_dpm_print_power_state +ffffffff81cfac80 T rv770_dpm_debugfs_print_current_performance_level +ffffffff81cfacb0 T rv770_dpm_get_current_sclk +ffffffff81cfad20 T rv770_dpm_get_current_mclk +ffffffff81cfad90 T rv770_dpm_fini +ffffffff81cfae20 T rv770_dpm_get_sclk +ffffffff81cfae60 T rv770_dpm_get_mclk +ffffffff81cfaeb0 T rv770_dpm_vblank_too_short +ffffffff81cfaf20 t rv770_convert_power_level_to_smc +ffffffff81cfc000 T rv770_copy_bytes_to_smc +ffffffff81cfc240 T rv770_start_smc +ffffffff81cfc290 T rv770_reset_smc +ffffffff81cfc2e0 T rv770_stop_smc_clock +ffffffff81cfc330 T rv770_start_smc_clock +ffffffff81cfc380 T rv770_is_smc_running +ffffffff81cfc3c0 T rv770_send_msg_to_smc +ffffffff81cfc4a0 T rv770_wait_for_smc_inactive +ffffffff81cfc540 T rv770_load_smc_ucode +ffffffff81cfc6d0 T rv770_read_smc_sram_dword +ffffffff81cfc790 T rv770_write_smc_sram_dword +ffffffff81cfd000 T si_get_allowed_info_register +ffffffff81cfd090 T si_get_xclk +ffffffff81cfd100 T si_get_temp +ffffffff81cfd150 T si_mc_load_microcode +ffffffff81cfd420 T dce6_bandwidth_update +ffffffff81cfd820 t dce6_program_watermarks +ffffffff81cfe2d0 T si_fence_ring_emit +ffffffff81cfe750 T si_ring_ib_execute +ffffffff81cfef30 T si_gpu_check_soft_reset +ffffffff81cff0d0 T si_asic_reset +ffffffff81cff4f0 t si_gpu_pci_config_reset +ffffffff81cff8a0 T si_gfx_is_lockup +ffffffff81cff910 T si_vram_gtt_location +ffffffff81cff9b0 T si_pcie_gart_tlb_flush +ffffffff81cffa00 T si_ib_parse +ffffffff81d000a0 T si_vm_init +ffffffff81d000e0 T si_vm_fini +ffffffff81d00110 T si_vm_flush +ffffffff81d007f0 T si_init_uvd_internal_cg +ffffffff81d00840 T si_get_csb_size +ffffffff81d008d0 T si_get_csb_buffer +ffffffff81d00a60 T si_rlc_reset +ffffffff81d00ae0 T si_irq_set +ffffffff81d00ff0 t si_disable_interrupt_state +ffffffff81d01270 T si_irq_process +ffffffff81d02460 t si_irq_ack +ffffffff81d02a60 T si_resume +ffffffff81d02af0 t si_init_golden_registers +ffffffff81d02cb0 t si_startup +ffffffff81d074a0 T si_suspend +ffffffff81d07820 T si_init +ffffffff81d08ce0 t si_cp_fini +ffffffff81d08dd0 t si_pcie_gart_fini +ffffffff81d08ed0 T si_fini +ffffffff81d09180 T si_get_gpu_clock_counter +ffffffff81d09250 T si_set_uvd_clocks +ffffffff81d097c0 T si_set_vce_clocks +ffffffff81d09d00 t si_vce_send_vcepll_ctlreq +ffffffff81d09f40 t dce6_latency_watermark +ffffffff81d0a170 t si_rlc_stop +ffffffff81d0a320 t si_vm_reg_valid +ffffffff81d0a480 t si_vm_packet3_cp_dma_check +ffffffff81d0a600 t si_update_cg +ffffffff81d0ab50 t si_enable_mgcg +ffffffff81d0af70 t si_enable_cgcg +ffffffff81d0c000 T si_dma_is_lockup +ffffffff81d0c080 T si_dma_vm_copy_pages +ffffffff81d0c160 T si_dma_vm_write_pages +ffffffff81d0c2c0 T si_dma_vm_set_pages +ffffffff81d0c420 T si_dma_vm_flush +ffffffff81d0c8b0 T si_copy_dma +ffffffff81d0d000 T si_dpm_force_performance_level +ffffffff81d0d160 T si_get_ddr3_mclk_frequency_ratio +ffffffff81d0d1c0 T si_get_mclk_frequency_ratio +ffffffff81d0d240 T si_trim_voltage_table_to_fit_state_table +ffffffff81d0d340 T si_dpm_setup_asic +ffffffff81d0d510 T si_fan_ctrl_get_fan_speed_percent +ffffffff81d0d5a0 T si_fan_ctrl_set_fan_speed_percent +ffffffff81d0d660 T si_fan_ctrl_set_mode +ffffffff81d0d8b0 T si_fan_ctrl_get_mode +ffffffff81d0d900 T si_dpm_enable +ffffffff81d12c00 t si_populate_smc_tdp_limits +ffffffff81d12e10 T si_dpm_late_enable +ffffffff81d12f60 T si_dpm_disable +ffffffff81d132e0 T si_dpm_pre_set_power_state +ffffffff81d13ee0 T si_dpm_set_power_state +ffffffff81d15460 T si_dpm_post_set_power_state +ffffffff81d15490 T si_dpm_display_configuration_changed +ffffffff81d15570 T si_dpm_init +ffffffff81d17020 T si_dpm_fini +ffffffff81d170d0 T si_dpm_debugfs_print_current_performance_level +ffffffff81d17120 T si_dpm_get_current_sclk +ffffffff81d17190 T si_dpm_get_current_mclk +ffffffff81d17200 t si_get_std_voltage_value +ffffffff81d17330 t si_convert_power_level_to_smc +ffffffff81d17bd0 t si_calculate_sclk_params +ffffffff81d17df0 t si_convert_mc_reg_table_to_smc +ffffffff81d17f50 t si_program_cac_config_registers +ffffffff81d19000 T si_copy_bytes_to_smc +ffffffff81d19250 T si_start_smc +ffffffff81d19290 T si_reset_smc +ffffffff81d192d0 T si_program_jump_on_start +ffffffff81d19300 T si_stop_smc_clock +ffffffff81d19340 T si_start_smc_clock +ffffffff81d19380 T si_is_smc_running +ffffffff81d193e0 T si_send_msg_to_smc +ffffffff81d194b0 T si_wait_for_smc_inactive +ffffffff81d19550 T si_load_smc_ucode +ffffffff81d196f0 T si_read_smc_sram_dword +ffffffff81d197c0 T si_write_smc_sram_dword +ffffffff81d1a000 T sumo_get_pi +ffffffff81d1a030 T sumo_gfx_clockgating_initialize +ffffffff81d1a110 T sumo_program_vc +ffffffff81d1a150 T sumo_clear_vc +ffffffff81d1a190 T sumo_program_sstp +ffffffff81d1a210 T sumo_take_smu_control +ffffffff81d1a240 T sumo_get_sleep_divider_from_id +ffffffff81d1a270 T sumo_get_sleep_divider_id_from_clock +ffffffff81d1a320 T sumo_dpm_enable +ffffffff81d1a9c0 T sumo_dpm_late_enable +ffffffff81d1af80 T sumo_dpm_disable +ffffffff81d1b2d0 T sumo_dpm_pre_set_power_state +ffffffff81d1b790 T sumo_dpm_set_power_state +ffffffff81d1c2d0 T sumo_dpm_post_set_power_state +ffffffff81d1c370 T sumo_dpm_setup_asic +ffffffff81d1c470 T sumo_dpm_display_configuration_changed +ffffffff81d1c4a0 T sumo_convert_vid2_to_vid7 +ffffffff81d1c500 T sumo_construct_sclk_voltage_mapping_table +ffffffff81d1c5c0 T sumo_construct_vid_mapping_table +ffffffff81d1c740 T sumo_dpm_init +ffffffff81d1d000 T sumo_dpm_print_power_state +ffffffff81d1d120 T sumo_dpm_debugfs_print_current_performance_level +ffffffff81d1d150 T sumo_dpm_get_current_sclk +ffffffff81d1d1c0 T sumo_dpm_get_current_mclk +ffffffff81d1d1f0 T sumo_dpm_get_current_vddc +ffffffff81d1d2c0 T sumo_dpm_fini +ffffffff81d1d350 T sumo_dpm_get_sclk +ffffffff81d1d3a0 T sumo_dpm_get_mclk +ffffffff81d1d3d0 T sumo_dpm_force_performance_level +ffffffff81d1d7f0 t sumo_power_level_enable +ffffffff81d1da20 t sumo_program_power_level +ffffffff81d1e000 T sumo_initialize_m3_arb +ffffffff81d1e2c0 T sumo_smu_notify_alt_vddnb_change +ffffffff81d1e360 t sumo_send_msg_to_smu +ffffffff81d1e500 T sumo_smu_pg_init +ffffffff81d1e520 T sumo_enable_boost_timer +ffffffff81d1e660 T sumo_set_tdp_limit +ffffffff81d1e6e0 T sumo_boost_state_enable +ffffffff81d1e730 T sumo_get_running_fw_version +ffffffff81d1f000 T trinity_dpm_enable_bapm +ffffffff81d1f080 T trinity_dpm_enable +ffffffff81d1f520 T trinity_dpm_late_enable +ffffffff81d1fa80 T trinity_dpm_disable +ffffffff81d1fe90 T trinity_dpm_force_performance_level +ffffffff81d1ff50 T trinity_dpm_pre_set_power_state +ffffffff81d20520 T trinity_dpm_set_power_state +ffffffff81d20ab0 T trinity_dpm_post_set_power_state +ffffffff81d20b50 T trinity_dpm_setup_asic +ffffffff81d20bb0 T trinity_dpm_display_configuration_changed +ffffffff81d20c40 T trinity_dpm_init +ffffffff81d21540 T trinity_dpm_print_power_state +ffffffff81d21650 T trinity_dpm_debugfs_print_current_performance_level +ffffffff81d216e0 T trinity_dpm_get_current_sclk +ffffffff81d21740 T trinity_dpm_get_current_mclk +ffffffff81d21770 T trinity_dpm_fini +ffffffff81d21810 T trinity_dpm_get_sclk +ffffffff81d21860 T trinity_dpm_get_mclk +ffffffff81d21890 t trinity_program_power_level +ffffffff81d22000 T trinity_dpm_bapm_enable +ffffffff81d22150 T trinity_dpm_config +ffffffff81d22230 T trinity_dpm_force_state +ffffffff81d22310 T trinity_dpm_n_levels_disabled +ffffffff81d223f0 T trinity_uvd_dpm_config +ffffffff81d224c0 T trinity_dpm_no_forced_level +ffffffff81d22590 T trinity_dce_enable_voltage_adjustment +ffffffff81d226e0 T trinity_gfx_dynamic_mgpg_config +ffffffff81d227b0 T trinity_acquire_mutex +ffffffff81d22840 T trinity_release_mutex +ffffffff81d23000 T uvd_v1_0_get_rptr +ffffffff81d23040 T uvd_v1_0_get_wptr +ffffffff81d23080 T uvd_v1_0_set_wptr +ffffffff81d230c0 T uvd_v1_0_fence_emit +ffffffff81d234b0 T uvd_v1_0_resume +ffffffff81d23610 T uvd_v1_0_init +ffffffff81d23ba0 T uvd_v1_0_start +ffffffff81d24320 T uvd_v1_0_fini +ffffffff81d24490 T uvd_v1_0_stop +ffffffff81d24600 T uvd_v1_0_ring_test +ffffffff81d247d0 T uvd_v1_0_semaphore_emit +ffffffff81d24800 T uvd_v1_0_ib_execute +ffffffff81d249a0 T uvd_v1_0_ib_test +ffffffff81d25000 T uvd_v2_2_fence_emit +ffffffff81d25470 T uvd_v2_2_semaphore_emit +ffffffff81d25680 T uvd_v2_2_resume +ffffffff81d26000 T uvd_v3_1_semaphore_emit +ffffffff81d27000 T uvd_v4_2_resume +ffffffff81d28000 T vce_v1_0_get_rptr +ffffffff81d28090 T vce_v1_0_get_wptr +ffffffff81d28120 T vce_v1_0_set_wptr +ffffffff81d281b0 T vce_v1_0_enable_mgcg +ffffffff81d28470 T vce_v1_0_load_fw +ffffffff81d28640 T vce_v1_0_bo_size +ffffffff81d286b0 T vce_v1_0_resume +ffffffff81d29020 T vce_v1_0_start +ffffffff81d297e0 T vce_v1_0_init +ffffffff81d2a000 T vce_v2_0_enable_mgcg +ffffffff81d2a070 t vce_v2_0_set_dyn_cg +ffffffff81d2a260 T vce_v2_0_bo_size +ffffffff81d2a2d0 T vce_v2_0_resume +ffffffff81d2b000 T aldebaran_reset_init +ffffffff81d2b0c0 t aldebaran_async_reset +ffffffff81d2b120 t aldebaran_get_reset_handler +ffffffff81d2b1d0 T aldebaran_reset_fini +ffffffff81d2b230 t aldebaran_mode2_prepare_hwcontext +ffffffff81d2b350 t aldebaran_mode2_perform_reset +ffffffff81d2b520 t aldebaran_mode2_restore_hwcontext +ffffffff81d2b9e0 t aldebaran_mode2_reset +ffffffff81d2c000 T aldebaran_reg_base_init +ffffffff81d2d000 T amdgpu_acpi_is_pcie_performance_request_supported +ffffffff81d2d040 T amdgpu_acpi_is_power_shift_control_supported +ffffffff81d2d070 T amdgpu_acpi_pcie_notify_device_ready +ffffffff81d2d190 t amdgpu_atcs_call +ffffffff81d2d280 T amdgpu_acpi_pcie_performance_request +ffffffff81d2d4d0 T amdgpu_acpi_power_shift_control +ffffffff81d2d580 T amdgpu_acpi_smart_shift_update +ffffffff81d2d6d0 T amdgpu_acpi_init +ffffffff81d2d790 t amdgpu_acpi_event +ffffffff81d2dad0 T amdgpu_acpi_get_backlight_caps +ffffffff81d2db20 T amdgpu_acpi_fini +ffffffff81d2db40 T amdgpu_acpi_should_gpu_reset +ffffffff81d2db90 T amdgpu_acpi_detect +ffffffff81d2f000 T amdgpu_afmt_acr +ffffffff81d30000 T amdgpu_amdkfd_init +ffffffff81d30040 T amdgpu_amdkfd_fini +ffffffff81d30070 T amdgpu_amdkfd_device_probe +ffffffff81d300a0 T amdgpu_amdkfd_device_init +ffffffff81d30270 t amdgpu_amdkfd_reset_work +ffffffff81d302f0 T amdgpu_amdkfd_device_fini_sw +ffffffff81d30340 T amdgpu_amdkfd_interrupt +ffffffff81d30370 T amdgpu_amdkfd_suspend +ffffffff81d303a0 T amdgpu_amdkfd_resume_iommu +ffffffff81d303d0 T amdgpu_amdkfd_resume +ffffffff81d30400 T amdgpu_amdkfd_pre_reset +ffffffff81d30430 T amdgpu_amdkfd_post_reset +ffffffff81d30460 T amdgpu_amdkfd_gpu_reset +ffffffff81d304c0 T amdgpu_amdkfd_alloc_gtt_mem +ffffffff81d30760 t amdgpu_bo_reserve +ffffffff81d308c0 t amdgpu_bo_unreserve +ffffffff81d309a0 T amdgpu_amdkfd_free_gtt_mem +ffffffff81d30a10 T amdgpu_amdkfd_alloc_gws +ffffffff81d30af0 T amdgpu_amdkfd_free_gws +ffffffff81d30b30 T amdgpu_amdkfd_get_fw_version +ffffffff81d30be0 T amdgpu_amdkfd_get_local_mem_info +ffffffff81d30cb0 T amdgpu_amdkfd_get_gpu_clock_counter +ffffffff81d30cf0 T amdgpu_amdkfd_get_max_engine_clock_in_mhz +ffffffff81d30d70 T amdgpu_amdkfd_get_cu_info +ffffffff81d30ec0 T amdgpu_amdkfd_get_dmabuf_info +ffffffff81d31000 T amdgpu_amdkfd_get_xgmi_hops_count +ffffffff81d31070 T amdgpu_amdkfd_get_xgmi_bandwidth_mbytes +ffffffff81d31100 T amdgpu_amdkfd_get_pcie_bandwidth_mbytes +ffffffff81d31270 T amdgpu_amdkfd_submit_ib +ffffffff81d313d0 T amdgpu_amdkfd_set_compute_idle +ffffffff81d31420 T amdgpu_amdkfd_is_kfd_vmid +ffffffff81d31460 T amdgpu_amdkfd_flush_gpu_tlb_vmid +ffffffff81d31500 T amdgpu_amdkfd_flush_gpu_tlb_pasid +ffffffff81d31530 T amdgpu_amdkfd_have_atomics_support +ffffffff81d31560 T amdgpu_amdkfd_ras_poison_consumption_handler +ffffffff81d315c0 T amdgpu_amdkfd_ras_query_utcl2_poison_status +ffffffff81d32000 T amdgpu_atom_execute_table +ffffffff81d320a0 t amdgpu_atom_execute_table_locked +ffffffff81d323f0 T amdgpu_atom_parse +ffffffff81d32940 T amdgpu_atom_destroy +ffffffff81d32980 T amdgpu_atom_asic_init +ffffffff81d32aa0 T amdgpu_atom_parse_data_header +ffffffff81d32b40 T amdgpu_atom_parse_cmd_header +ffffffff81d32bc0 t atom_op_move +ffffffff81d32da0 t atom_op_and +ffffffff81d32f80 t atom_op_or +ffffffff81d33160 t atom_op_shift_left +ffffffff81d33350 t atom_op_shift_right +ffffffff81d33540 t atom_op_mul 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dce_v10_0_encoder_prepare +ffffffff81dcb4b0 t dce_v10_0_encoder_commit +ffffffff81dcb4e0 t dce_v10_0_encoder_mode_set +ffffffff81dcc380 t dce_v10_0_encoder_disable +ffffffff81dcc490 t dce_v10_0_ext_dpms +ffffffff81dcc4c0 t dce_v10_0_ext_prepare +ffffffff81dcc4f0 t dce_v10_0_ext_commit +ffffffff81dcc520 t dce_v10_0_ext_mode_set +ffffffff81dcc550 t dce_v10_0_ext_disable +ffffffff81dcc580 t dce_v10_0_set_crtc_irq_state +ffffffff81dcc660 t dce_v10_0_crtc_irq +ffffffff81dcc890 t dce_v10_0_set_crtc_vblank_interrupt_state +ffffffff81dcc960 t dce_v10_0_set_crtc_vline_interrupt_state +ffffffff81dcca30 t dce_v10_0_set_pageflip_irq_state +ffffffff81dccae0 t dce_v10_0_pageflip_irq +ffffffff81dccc40 t dce_v10_0_set_hpd_irq_state +ffffffff81dccd10 t dce_v10_0_hpd_irq +ffffffff81dcce30 t dce_v10_0_crtc_cursor_set2 +ffffffff81dcd1a0 t dce_v10_0_crtc_cursor_move +ffffffff81dcd280 t dce_v10_0_crtc_gamma_set +ffffffff81dcd2c0 t dce_v10_0_crtc_destroy +ffffffff81dcd2f0 t amdgpu_bo_reserve +ffffffff81dcd4e0 t amdgpu_bo_unreserve +ffffffff81dcd5c0 t dce_v10_0_cursor_move_locked +ffffffff81dcd710 t dce_v10_0_crtc_load_lut +ffffffff81dcdaa0 t dce_v10_0_crtc_dpms +ffffffff81dcdc70 t dce_v10_0_crtc_prepare +ffffffff81dcdcb0 t dce_v10_0_crtc_commit +ffffffff81dcdce0 t dce_v10_0_crtc_mode_fixup +ffffffff81dcdea0 t dce_v10_0_crtc_mode_set +ffffffff81dce090 t dce_v10_0_crtc_set_base +ffffffff81dce0b0 t dce_v10_0_crtc_set_base_atomic +ffffffff81dce0d0 t dce_v10_0_crtc_disable +ffffffff81dce270 t dce_v10_0_crtc_do_set_base +ffffffff81dce920 t dce_v10_0_is_display_hung +ffffffff81dcf000 T dce_v11_0_disable_dce +ffffffff81dcf160 t dce_v11_0_early_init +ffffffff81dcf2b0 t dce_v11_0_sw_init +ffffffff81dcf730 t dce_v11_0_sw_fini +ffffffff81dcf860 t dce_v11_0_hw_init +ffffffff81dcfc30 t dce_v11_0_hw_fini +ffffffff81dcfdc0 t dce_v11_0_suspend +ffffffff81dcfe20 t dce_v11_0_resume +ffffffff81dcfe90 t dce_v11_0_is_idle +ffffffff81dcfec0 t dce_v11_0_wait_for_idle +ffffffff81dcfef0 t dce_v11_0_soft_reset +ffffffff81dd0110 t dce_v11_0_set_clockgating_state +ffffffff81dd0140 t dce_v11_0_set_powergating_state +ffffffff81dd0170 t dce_v11_0_audio_endpt_rreg +ffffffff81dd0200 t dce_v11_0_audio_endpt_wreg +ffffffff81dd0280 t dce_v11_0_bandwidth_update +ffffffff81dd0cf0 t dce_v11_0_vblank_get_counter +ffffffff81dd0d40 t dce_v11_0_hpd_sense +ffffffff81dd0da0 t dce_v11_0_hpd_set_polarity +ffffffff81dd0e70 t dce_v11_0_hpd_get_gpio_reg +ffffffff81dd0ea0 t dce_v11_0_page_flip +ffffffff81dd0fa0 t dce_v11_0_crtc_get_scanoutpos +ffffffff81dd1040 t dce_v11_0_encoder_add +ffffffff81dd1270 t dce_v11_0_latency_watermark +ffffffff81dd1490 t dce_v11_0_encoder_destroy +ffffffff81dd14f0 t dce_v11_0_encoder_prepare +ffffffff81dd16f0 t dce_v11_0_encoder_commit +ffffffff81dd1720 t dce_v11_0_encoder_mode_set +ffffffff81dd25c0 t dce_v11_0_encoder_disable +ffffffff81dd26d0 t dce_v11_0_ext_dpms +ffffffff81dd2700 t dce_v11_0_ext_prepare +ffffffff81dd2730 t dce_v11_0_ext_commit +ffffffff81dd2760 t dce_v11_0_ext_mode_set +ffffffff81dd2790 t dce_v11_0_ext_disable +ffffffff81dd27c0 t dce_v11_0_set_crtc_irq_state +ffffffff81dd28a0 t dce_v11_0_crtc_irq +ffffffff81dd2ac0 t dce_v11_0_set_crtc_vblank_interrupt_state +ffffffff81dd2b90 t dce_v11_0_set_crtc_vline_interrupt_state +ffffffff81dd2c60 t dce_v11_0_set_pageflip_irq_state +ffffffff81dd2d10 t dce_v11_0_pageflip_irq +ffffffff81dd2e70 t dce_v11_0_set_hpd_irq_state +ffffffff81dd2f40 t dce_v11_0_hpd_irq +ffffffff81dd3060 t dce_v11_0_crtc_cursor_set2 +ffffffff81dd33d0 t dce_v11_0_crtc_cursor_move +ffffffff81dd34b0 t dce_v11_0_crtc_gamma_set +ffffffff81dd34f0 t dce_v11_0_crtc_destroy +ffffffff81dd3520 t amdgpu_bo_reserve +ffffffff81dd3710 t amdgpu_bo_unreserve +ffffffff81dd37f0 t dce_v11_0_cursor_move_locked +ffffffff81dd3940 t dce_v11_0_crtc_load_lut +ffffffff81dd3cb0 t dce_v11_0_crtc_dpms +ffffffff81dd3e80 t dce_v11_0_crtc_prepare +ffffffff81dd3ec0 t dce_v11_0_crtc_commit +ffffffff81dd3ef0 t dce_v11_0_crtc_mode_fixup +ffffffff81dd4160 t dce_v11_0_crtc_mode_set +ffffffff81dd43c0 t dce_v11_0_crtc_set_base +ffffffff81dd43e0 t dce_v11_0_crtc_set_base_atomic +ffffffff81dd4400 t dce_v11_0_crtc_disable +ffffffff81dd45a0 t dce_v11_0_crtc_do_set_base +ffffffff81dd5000 t df_v1_7_sw_init +ffffffff81dd5040 t df_v1_7_sw_fini +ffffffff81dd5070 t df_v1_7_enable_broadcast_mode +ffffffff81dd5190 t df_v1_7_get_fb_channel_number +ffffffff81dd5210 t df_v1_7_get_hbm_channel_number +ffffffff81dd5260 t df_v1_7_update_medium_grain_clock_gating +ffffffff81dd53d0 t df_v1_7_get_clockgating_state +ffffffff81dd5460 t df_v1_7_enable_ecc_force_par_wr_rmw +ffffffff81dd6000 t df_v3_6_sw_init +ffffffff81dd6150 t df_v3_6_sw_fini +ffffffff81dd6180 t df_v3_6_enable_broadcast_mode +ffffffff81dd62a0 t df_v3_6_get_fb_channel_number +ffffffff81dd6380 t df_v3_6_get_hbm_channel_number +ffffffff81dd63d0 t df_v3_6_update_medium_grain_clock_gating +ffffffff81dd6570 t df_v3_6_get_clockgating_state +ffffffff81dd6600 t df_v3_6_pmc_start +ffffffff81dd6980 t df_v3_6_pmc_stop +ffffffff81dd6c20 t df_v3_6_pmc_get_count +ffffffff81dd6db0 t df_v3_6_get_fica +ffffffff81dd6ec0 t df_v3_6_set_fica +ffffffff81dd6fa0 t df_v3_6_query_ras_poison_mode +ffffffff81dd7110 t df_v3_6_perfmon_arm_with_status +ffffffff81dd8000 T dimgrey_cavefish_reg_base_init +ffffffff81dd9000 T emu_soc_asic_init +ffffffff81dda000 t gfx_v10_0_early_init +ffffffff81dda420 t gfx_v10_0_late_init +ffffffff81dda490 t gfx_v10_0_sw_init +ffffffff81ddb830 t gfx_v10_0_sw_fini +ffffffff81ddbb70 t gfx_v10_0_hw_init +ffffffff81dde710 t gfx_v10_0_hw_fini +ffffffff81ddea00 t gfx_v10_0_suspend +ffffffff81ddea40 t gfx_v10_0_resume +ffffffff81ddea50 t gfx_v10_0_is_idle +ffffffff81ddeae0 t gfx_v10_0_wait_for_idle +ffffffff81ddebc0 t gfx_v10_0_soft_reset +ffffffff81ddef10 t gfx_v10_0_set_clockgating_state +ffffffff81ddf1b0 t gfx_v10_0_set_powergating_state +ffffffff81ddf270 t gfx_v10_0_get_clockgating_state +ffffffff81ddf380 t gfx10_kiq_set_resources +ffffffff81ddf6b0 t gfx10_kiq_map_queues +ffffffff81ddfa40 t gfx10_kiq_unmap_queues +ffffffff81ddfe40 t gfx10_kiq_query_status +ffffffff81de0140 t gfx10_kiq_invalidate_tlbs +ffffffff81de0260 t gfx_v10_0_ring_get_rptr_compute +ffffffff81de0290 t gfx_v10_0_ring_get_wptr_compute +ffffffff81de0300 t gfx_v10_0_ring_set_wptr_compute +ffffffff81de0440 t gfx_v10_0_ring_emit_ib_compute +ffffffff81de0790 t gfx_v10_0_ring_emit_fence_kiq +ffffffff81de0be0 t gfx_v10_0_ring_test_ring +ffffffff81de0e50 t gfx_v10_0_ring_test_ib +ffffffff81de1100 t gfx_v10_0_ring_emit_rreg +ffffffff81de13a0 t gfx_v10_0_ring_emit_wreg +ffffffff81de15e0 t gfx_v10_0_ring_emit_reg_wait +ffffffff81de1630 t gfx_v10_0_ring_emit_reg_write_reg_wait +ffffffff81de16c0 t gfx_v10_0_wait_reg_mem +ffffffff81de19f0 t gfx_v10_0_ring_get_rptr_gfx +ffffffff81de1a20 t gfx_v10_0_ring_get_wptr_gfx +ffffffff81de1b30 t gfx_v10_0_ring_set_wptr_gfx +ffffffff81de1d40 t gfx_v10_0_ring_emit_ib_gfx +ffffffff81de23f0 t gfx_v10_0_ring_emit_fence +ffffffff81de27c0 t gfx_v10_0_ring_emit_pipeline_sync +ffffffff81de2820 t gfx_v10_0_ring_emit_vm_flush +ffffffff81de29f0 t gfx_v10_0_ring_emit_hdp_flush +ffffffff81de2ac0 t gfx_v10_0_ring_emit_gds_switch +ffffffff81de2ba0 t gfx_v10_0_ring_emit_init_cond_exec +ffffffff81de2dd0 t gfx_v10_0_ring_emit_patch_cond_exec +ffffffff81de2e90 t gfx_v10_0_ring_emit_sb +ffffffff81de2f80 t gfx_v10_0_ring_emit_cntxcntl +ffffffff81de3470 t gfx_v10_0_ring_emit_frame_cntl +ffffffff81de3580 t gfx_v10_0_ring_soft_recovery +ffffffff81de35f0 t gfx_v10_0_ring_preempt_ib +ffffffff81de3760 t gfx_v10_0_emit_mem_sync +ffffffff81de3aa0 t gfx_v10_0_write_data_to_reg +ffffffff81de3cb0 t gfx_v10_0_set_eop_interrupt_state +ffffffff81de3d90 t gfx_v10_0_eop_irq +ffffffff81de3f60 t gfx_v10_0_set_gfx_eop_interrupt_state +ffffffff81de40f0 t gfx_v10_0_set_compute_eop_interrupt_state +ffffffff81de42a0 t gfx_v10_0_kiq_set_interrupt_state +ffffffff81de4580 t gfx_v10_0_kiq_irq +ffffffff81de4600 t gfx_v10_0_set_priv_reg_fault_state +ffffffff81de4720 t gfx_v10_0_priv_reg_irq +ffffffff81de4780 t gfx_v10_0_handle_priv_fault +ffffffff81de4910 t gfx_v10_0_set_priv_inst_fault_state +ffffffff81de4a30 t gfx_v10_0_priv_inst_irq +ffffffff81de4a90 t gfx_v10_0_is_rlc_enabled +ffffffff81de4b10 t gfx_v10_0_set_safe_mode +ffffffff81de4db0 t gfx_v10_0_unset_safe_mode +ffffffff81de4e60 t gfx_v10_0_rlc_init +ffffffff81de4ee0 t gfx_v10_0_get_csb_size +ffffffff81de4f40 t gfx_v10_0_get_csb_buffer +ffffffff81de50c0 t gfx_v10_0_rlc_resume +ffffffff81de5bc0 t gfx_v10_0_rlc_stop +ffffffff81de5ca0 t gfx_v10_0_rlc_reset +ffffffff81de5e40 t gfx_v10_0_rlc_start +ffffffff81de5fe0 t gfx_v10_0_update_spm_vmid +ffffffff81de6110 t gfx_v10_0_wait_for_rlc_autoload_complete +ffffffff81de6c80 t gfx_v10_0_init_csb +ffffffff81de6f50 t gfx_v10_0_is_rlcg_access_range +ffffffff81de6f80 t gfx_v10_0_gfx_mqd_init +ffffffff81de7360 t gfx_v10_0_compute_mqd_init +ffffffff81de7800 t amdgpu_bo_unreserve +ffffffff81de78e0 t gfx_v10_0_get_gpu_clock_counter +ffffffff81de7de0 t gfx_v10_0_select_se_sh +ffffffff81de7e80 t gfx_v10_0_read_wave_data +ffffffff81de80e0 t gfx_v10_0_read_wave_vgprs +ffffffff81de8110 t gfx_v10_0_read_wave_sgprs +ffffffff81de8190 t gfx_v10_0_select_me_pipe_q +ffffffff81de81b0 t gfx_v10_0_init_spm_golden_registers +ffffffff81de8220 t gfx_v10_0_update_perfmon_mgcg +ffffffff81de8340 t wave_read_ind +ffffffff81de8420 t wave_read_regs +ffffffff81de8580 t gfx_v10_0_cp_resume +ffffffff81deb1c0 t gfx_v10_3_get_disabled_sa +ffffffff81deb2d0 t gfx_v10_0_get_rb_active_bitmap +ffffffff81deb3f0 t gfx_v10_0_get_wgp_active_bitmap_per_sh +ffffffff81deb500 t gfx_v10_0_enable_gui_idle_interrupt +ffffffff81deb610 t gfx_v10_0_cp_gfx_enable +ffffffff81deb850 t gfx_v10_0_cp_compute_enable +ffffffff81deb9e0 t amdgpu_bo_reserve +ffffffff81debb50 t gfx_v10_0_kiq_init_register +ffffffff81dec9c0 t gfx_v10_0_cp_gfx_switch_pipe +ffffffff81decac0 t gfx_v10_0_cp_gfx_set_doorbell +ffffffff81decd90 t gfx_v10_0_cp_gfx_start +ffffffff81ded770 t gfx_v10_0_update_fine_grain_clock_gating +ffffffff81deda90 t gfx_v10_0_update_medium_grain_clock_gating +ffffffff81dee1b0 t gfx_v10_0_update_3d_clock_gating +ffffffff81dee570 t gfx_v10_0_update_coarse_grain_clock_gating +ffffffff81dee930 t gfx_v10_cntl_pg +ffffffff81def000 t gfx_v11_0_early_init +ffffffff81def3a0 t gfx_v11_0_late_init +ffffffff81def410 t gfx_v11_0_sw_init +ffffffff81df0350 t gfx_v11_0_sw_fini +ffffffff81df0630 t gfx_v11_0_hw_init +ffffffff81df4a80 t gfx_v11_0_hw_fini +ffffffff81df4d00 t gfx_v11_0_suspend +ffffffff81df4d40 t gfx_v11_0_resume +ffffffff81df4d50 t gfx_v11_0_is_idle +ffffffff81df4de0 t gfx_v11_0_wait_for_idle +ffffffff81df4ec0 t gfx_v11_0_check_soft_reset +ffffffff81df4ff0 t gfx_v11_0_soft_reset +ffffffff81df5cd0 t gfx_v11_0_post_soft_reset +ffffffff81df5ce0 t gfx_v11_0_set_clockgating_state +ffffffff81df68c0 t gfx_v11_0_set_powergating_state +ffffffff81df6960 t gfx_v11_0_get_clockgating_state +ffffffff81df6b30 t gfx11_kiq_set_resources +ffffffff81df6e60 t gfx11_kiq_map_queues +ffffffff81df71f0 t gfx11_kiq_unmap_queues +ffffffff81df75f0 t gfx11_kiq_query_status +ffffffff81df78f0 t gfx11_kiq_invalidate_tlbs +ffffffff81df7a10 t gfx_v11_0_ring_get_rptr_compute +ffffffff81df7a40 t gfx_v11_0_ring_get_wptr_compute +ffffffff81df7ab0 t gfx_v11_0_ring_set_wptr_compute +ffffffff81df7bf0 t gfx_v11_0_ring_emit_ib_compute +ffffffff81df7f40 t gfx_v11_0_ring_emit_fence_kiq +ffffffff81df8380 t gfx_v11_0_ring_test_ring +ffffffff81df8610 t gfx_v11_0_ring_test_ib +ffffffff81df88d0 t gfx_v11_0_ring_emit_rreg +ffffffff81df8b70 t gfx_v11_0_ring_emit_wreg +ffffffff81df8db0 t gfx_v11_0_ring_emit_reg_wait +ffffffff81df8e00 t gfx_v11_0_ring_emit_reg_write_reg_wait +ffffffff81df8e70 t gfx_v11_0_wait_reg_mem +ffffffff81df91a0 t gfx_v11_0_ring_get_rptr_gfx +ffffffff81df91d0 t gfx_v11_0_ring_get_wptr_gfx +ffffffff81df92e0 t gfx_v11_0_ring_set_wptr_gfx +ffffffff81df94f0 t gfx_v11_0_ring_emit_ib_gfx +ffffffff81df9b90 t gfx_v11_0_ring_emit_fence +ffffffff81df9f60 t gfx_v11_0_ring_emit_pipeline_sync +ffffffff81df9fc0 t gfx_v11_0_ring_emit_vm_flush +ffffffff81dfa190 t gfx_v11_0_ring_emit_hdp_flush +ffffffff81dfa260 t gfx_v11_0_ring_emit_gds_switch +ffffffff81dfa340 t gfx_v11_0_ring_emit_init_cond_exec +ffffffff81dfa570 t gfx_v11_0_ring_emit_patch_cond_exec +ffffffff81dfa630 t gfx_v11_0_ring_emit_cntxcntl +ffffffff81dfa790 t gfx_v11_0_ring_emit_frame_cntl +ffffffff81dfa8a0 t gfx_v11_0_ring_soft_recovery +ffffffff81dfa910 t gfx_v11_0_ring_preempt_ib +ffffffff81dfaa80 t gfx_v11_0_emit_mem_sync +ffffffff81dfadc0 t gfx_v11_0_write_data_to_reg +ffffffff81dfafd0 t gfx_v11_0_set_eop_interrupt_state +ffffffff81dfb060 t gfx_v11_0_eop_irq +ffffffff81dfb230 t gfx_v11_0_set_gfx_eop_interrupt_state +ffffffff81dfb3c0 t gfx_v11_0_set_compute_eop_interrupt_state +ffffffff81dfb550 t gfx_v11_0_set_priv_reg_fault_state +ffffffff81dfb670 t gfx_v11_0_priv_reg_irq +ffffffff81dfb6d0 t gfx_v11_0_handle_priv_fault +ffffffff81dfb860 t gfx_v11_0_set_priv_inst_fault_state +ffffffff81dfb980 t gfx_v11_0_priv_inst_irq +ffffffff81dfb9e0 t gfx_v11_0_is_rlc_enabled +ffffffff81dfba60 t gfx_v11_0_set_safe_mode +ffffffff81dfbbb0 t gfx_v11_0_unset_safe_mode +ffffffff81dfbc20 t gfx_v11_0_rlc_init +ffffffff81dfbca0 t gfx_v11_0_get_csb_size +ffffffff81dfbd00 t gfx_v11_0_get_csb_buffer +ffffffff81dfbe80 t gfx_v11_0_rlc_resume +ffffffff81dfcba0 t gfx_v11_0_rlc_stop +ffffffff81dfcc80 t gfx_v11_0_rlc_reset +ffffffff81dfce20 t gfx_v11_0_rlc_start +ffffffff81dfcfc0 t gfx_v11_0_update_spm_vmid +ffffffff81dfd0c0 t gfx_v11_0_init_csb +ffffffff81dfd240 t gfx_v11_0_gfx_mqd_init +ffffffff81dfd610 t gfx_v11_0_compute_mqd_init +ffffffff81dfdb30 t amdgpu_bo_unreserve +ffffffff81dfdc10 t gfx_v11_0_get_gpu_clock_counter +ffffffff81dfdf70 t gfx_v11_0_select_se_sh +ffffffff81dfe010 t gfx_v11_0_read_wave_data +ffffffff81dfe250 t gfx_v11_0_read_wave_vgprs +ffffffff81dfe280 t gfx_v11_0_read_wave_sgprs +ffffffff81dfe300 t gfx_v11_0_select_me_pipe_q +ffffffff81dfe320 t gfx_v11_0_update_perf_clk +ffffffff81dfe450 t wave_read_ind +ffffffff81dfe530 t wave_read_regs +ffffffff81dfe690 t gfx_v11_0_disable_gpa_mode +ffffffff81dfe820 t gfx_v11_0_cp_resume +ffffffff81e028a0 t gfx_v11_0_config_me_cache +ffffffff81e02c40 t gfx_v11_0_config_pfp_cache +ffffffff81e02fe0 t gfx_v11_0_config_mec_cache +ffffffff81e03380 t gfx_v11_0_enable_gui_idle_interrupt +ffffffff81e03490 t gfx_v11_0_cp_compute_enable +ffffffff81e03660 t gfx_v11_0_cp_gfx_enable +ffffffff81e03850 t amdgpu_bo_reserve +ffffffff81e039c0 t gfx_v11_0_kiq_init_register +ffffffff81e04830 t gfx_v11_0_cp_gfx_switch_pipe +ffffffff81e04910 t gfx_v11_0_cp_gfx_set_doorbell +ffffffff81e04af0 t gfx_v11_0_cp_gfx_start +ffffffff81e053b0 t gfx_v11_cntl_pg +ffffffff81e06000 t gfx_v8_0_early_init +ffffffff81e06320 t gfx_v8_0_late_init +ffffffff81e06a20 t gfx_v8_0_sw_init +ffffffff81e080f0 t gfx_v8_0_sw_fini +ffffffff81e083b0 t gfx_v8_0_hw_init +ffffffff81e0a5d0 t gfx_v8_0_hw_fini +ffffffff81e0aac0 t gfx_v8_0_suspend +ffffffff81e0ab00 t gfx_v8_0_resume +ffffffff81e0ab10 t gfx_v8_0_is_idle +ffffffff81e0ab80 t gfx_v8_0_wait_for_idle +ffffffff81e0ac30 t gfx_v8_0_check_soft_reset +ffffffff81e0ad10 t gfx_v8_0_pre_soft_reset +ffffffff81e0ae90 t gfx_v8_0_soft_reset +ffffffff81e0b050 t gfx_v8_0_post_soft_reset +ffffffff81e0b210 t gfx_v8_0_set_clockgating_state +ffffffff81e0b4d0 t gfx_v8_0_set_powergating_state +ffffffff81e0b890 t gfx_v8_0_get_clockgating_state +ffffffff81e0b970 t gfx_v8_0_get_gpu_clock_counter +ffffffff81e0ba10 t gfx_v8_0_select_se_sh +ffffffff81e0ba70 t gfx_v8_0_read_wave_data +ffffffff81e0bf10 t gfx_v8_0_read_wave_sgprs +ffffffff81e0bfc0 t gfx_v8_0_select_me_pipe_q +ffffffff81e0bfe0 t gfx_v8_0_ring_get_rptr +ffffffff81e0c010 t gfx_v8_0_ring_get_wptr_compute +ffffffff81e0c040 t gfx_v8_0_ring_set_wptr_compute +ffffffff81e0c080 t gfx_v8_0_ring_emit_fence_kiq +ffffffff81e0c4b0 t gfx_v8_0_ring_test_ring +ffffffff81e0c6b0 t gfx_v8_0_ring_emit_rreg +ffffffff81e0c950 t gfx_v8_0_ring_emit_wreg +ffffffff81e0cb90 t gfx_v8_0_ring_get_wptr_gfx +ffffffff81e0cbf0 t gfx_v8_0_ring_set_wptr_gfx +ffffffff81e0cc60 t gfx_v8_0_ring_emit_ib_gfx +ffffffff81e0d1c0 t gfx_v8_0_ring_emit_fence_gfx +ffffffff81e0d6c0 t gfx_v8_0_ring_emit_pipeline_sync +ffffffff81e0d9b0 t gfx_v8_0_ring_emit_vm_flush +ffffffff81e0dd60 t gfx_v8_0_ring_emit_hdp_flush +ffffffff81e0e080 t gfx_v8_0_ring_emit_gds_switch +ffffffff81e0e850 t gfx_v8_0_ring_test_ib +ffffffff81e0ea00 t gfx_v8_0_ring_emit_init_cond_exec +ffffffff81e0ec30 t gfx_v8_0_ring_emit_patch_cond_exec +ffffffff81e0ece0 t gfx_v8_ring_emit_sb +ffffffff81e0edd0 t gfx_v8_ring_emit_cntxcntl +ffffffff81e0f370 t gfx_v8_0_ring_soft_recovery +ffffffff81e0f3a0 t gfx_v8_0_emit_mem_sync +ffffffff81e0f5b0 t gfx_v8_0_ring_emit_ib_compute +ffffffff81e0f8c0 t gfx_v8_0_ring_emit_fence_compute +ffffffff81e0fbc0 t gfx_v8_0_emit_mem_sync_compute +ffffffff81e0fe80 t gfx_v8_0_emit_wave_limit +ffffffff81e10030 t gfx_v8_0_set_eop_interrupt_state +ffffffff81e10240 t gfx_v8_0_eop_irq +ffffffff81e10370 t gfx_v8_0_set_priv_reg_fault_state +ffffffff81e103f0 t gfx_v8_0_priv_reg_irq +ffffffff81e10510 t gfx_v8_0_set_priv_inst_fault_state +ffffffff81e10590 t gfx_v8_0_priv_inst_irq +ffffffff81e106b0 t gfx_v8_0_set_cp_ecc_int_state +ffffffff81e10920 t gfx_v8_0_cp_ecc_error_irq +ffffffff81e10970 t gfx_v8_0_set_sq_int_state +ffffffff81e10a00 t gfx_v8_0_sq_irq +ffffffff81e10aa0 t gfx_v8_0_parse_sq_irq +ffffffff81e10cf0 t gfx_v8_0_is_rlc_enabled +ffffffff81e10d30 t gfx_v8_0_set_safe_mode +ffffffff81e10e30 t gfx_v8_0_unset_safe_mode +ffffffff81e10ed0 t gfx_v8_0_rlc_init +ffffffff81e10f80 t gfx_v8_0_get_csb_size +ffffffff81e10fe0 t gfx_v8_0_get_csb_buffer +ffffffff81e11160 t gfx_v8_0_cp_jump_table_num +ffffffff81e111a0 t gfx_v8_0_rlc_resume +ffffffff81e11530 t gfx_v8_0_rlc_stop +ffffffff81e115a0 t gfx_v8_0_rlc_reset +ffffffff81e11620 t gfx_v8_0_rlc_start +ffffffff81e116a0 t gfx_v8_0_update_spm_vmid +ffffffff81e11710 t gfx_v8_0_init_save_restore_list +ffffffff81e11b30 t gfx_v8_0_wait_for_rlc_serdes +ffffffff81e11d50 t gfx_v8_0_sq_irq_work_func +ffffffff81e11d70 t amdgpu_bo_unreserve +ffffffff81e11e50 t gfx_v8_0_kiq_resume +ffffffff81e120b0 t gfx_v8_0_cp_gfx_resume +ffffffff81e12bd0 t gfx_v8_0_kcq_resume +ffffffff81e13600 t amdgpu_bo_reserve +ffffffff81e13770 t gfx_v8_0_mqd_commit +ffffffff81e13950 t gfx_v8_0_mqd_init +ffffffff81e13d70 t gfx_v8_0_deactivate_hqd +ffffffff81e13e30 t gfx_v8_0_update_medium_grain_clock_gating +ffffffff81e14160 t gfx_v8_0_update_coarse_grain_clock_gating +ffffffff81e15000 t gfx_v9_0_ras_error_inject +ffffffff81e151a0 t gfx_v9_0_query_ras_error_count +ffffffff81e15d40 t gfx_v9_0_reset_ras_error_count +ffffffff81e16780 T gfx_v9_0_select_se_sh +ffffffff81e16820 t gfx_v9_0_early_init +ffffffff81e16c80 t gfx_v9_0_late_init +ffffffff81e17990 t gfx_v9_0_sw_init +ffffffff81e18fe0 t gfx_v9_0_sw_fini +ffffffff81e19290 t gfx_v9_0_hw_init +ffffffff81e1c340 t gfx_v9_0_hw_fini +ffffffff81e1cab0 t gfx_v9_0_suspend +ffffffff81e1caf0 t gfx_v9_0_resume +ffffffff81e1cb00 t gfx_v9_0_is_idle +ffffffff81e1cb80 t gfx_v9_0_wait_for_idle +ffffffff81e1cc60 t gfx_v9_0_soft_reset +ffffffff81e1cff0 t gfx_v9_0_set_clockgating_state +ffffffff81e1d0c0 t gfx_v9_0_set_powergating_state +ffffffff81e1d4c0 t gfx_v9_0_get_clockgating_state +ffffffff81e1d5d0 t gfx_v9_0_kiq_set_resources +ffffffff81e1d900 t gfx_v9_0_kiq_map_queues +ffffffff81e1dc40 t gfx_v9_0_kiq_unmap_queues +ffffffff81e1dfc0 t gfx_v9_0_kiq_query_status +ffffffff81e1e2c0 t gfx_v9_0_kiq_invalidate_tlbs +ffffffff81e1e3e0 t gfx_v9_0_ring_get_rptr_compute +ffffffff81e1e410 t gfx_v9_0_ring_get_wptr_compute +ffffffff81e1e480 t gfx_v9_0_ring_set_wptr_compute +ffffffff81e1e4e0 t gfx_v9_0_ring_emit_fence_kiq +ffffffff81e1e920 t gfx_v9_0_ring_test_ring +ffffffff81e1eb50 t gfx_v9_0_ring_emit_rreg +ffffffff81e1edf0 t gfx_v9_0_ring_emit_wreg +ffffffff81e1f030 t gfx_v9_0_ring_emit_reg_wait +ffffffff81e1f080 t gfx_v9_0_ring_emit_reg_write_reg_wait +ffffffff81e1f120 t gfx_v9_0_wait_reg_mem +ffffffff81e1f450 t gfx_v9_0_ring_get_rptr_gfx +ffffffff81e1f480 t gfx_v9_0_ring_get_wptr_gfx +ffffffff81e1f590 t gfx_v9_0_ring_set_wptr_gfx +ffffffff81e1f6c0 t gfx_v9_0_ring_emit_ib_gfx +ffffffff81e1fbe0 t gfx_v9_0_ring_emit_fence +ffffffff81e1ffa0 t gfx_v9_0_ring_emit_pipeline_sync +ffffffff81e20000 t gfx_v9_0_ring_emit_vm_flush +ffffffff81e20110 t gfx_v9_0_ring_emit_hdp_flush +ffffffff81e201e0 t gfx_v9_0_ring_emit_gds_switch +ffffffff81e202c0 t gfx_v9_0_ring_test_ib +ffffffff81e20470 t gfx_v9_0_ring_emit_init_cond_exec +ffffffff81e206a0 t gfx_v9_0_ring_emit_patch_cond_exec +ffffffff81e20770 t gfx_v9_ring_emit_sb +ffffffff81e20860 t gfx_v9_ring_emit_cntxcntl +ffffffff81e20c60 t gfx_v9_0_ring_emit_frame_cntl +ffffffff81e20d70 t gfx_v9_0_ring_soft_recovery +ffffffff81e20de0 t gfx_v9_0_emit_mem_sync +ffffffff81e210a0 t gfx_v9_0_write_data_to_reg +ffffffff81e212b0 t gfx_v9_0_ring_emit_ib_compute +ffffffff81e215e0 t gfx_v9_0_emit_wave_limit +ffffffff81e217b0 t gfx_v9_0_set_eop_interrupt_state +ffffffff81e21980 t gfx_v9_0_eop_irq +ffffffff81e21ab0 t gfx_v9_0_set_compute_eop_interrupt_state +ffffffff81e21c60 t gfx_v9_0_set_priv_reg_fault_state +ffffffff81e21d80 t gfx_v9_0_priv_reg_irq +ffffffff81e21ea0 t gfx_v9_0_set_priv_inst_fault_state +ffffffff81e21fc0 t gfx_v9_0_priv_inst_irq +ffffffff81e220e0 t gfx_v9_0_set_cp_ecc_error_state +ffffffff81e22910 t gfx_v9_0_is_rlc_enabled +ffffffff81e22990 t gfx_v9_0_set_safe_mode +ffffffff81e22ae0 t gfx_v9_0_unset_safe_mode +ffffffff81e22b50 t gfx_v9_0_rlc_init +ffffffff81e23360 t gfx_v9_0_get_csb_size +ffffffff81e233c0 t gfx_v9_0_get_csb_buffer +ffffffff81e23510 t gfx_v9_0_cp_jump_table_num +ffffffff81e23560 t gfx_v9_0_rlc_resume +ffffffff81e24300 t gfx_v9_0_rlc_stop +ffffffff81e247a0 t gfx_v9_0_rlc_reset +ffffffff81e24930 t gfx_v9_0_rlc_start +ffffffff81e24a70 t gfx_v9_0_update_spm_vmid +ffffffff81e24ba0 t gfx_v9_0_is_rlcg_access_range +ffffffff81e24bf0 t gfx_v9_0_init_always_on_cu_mask +ffffffff81e24f50 t gfx_v9_0_init_csb +ffffffff81e250e0 t gfx_v9_0_enable_lbpw +ffffffff81e251d0 t gfx_v9_0_enable_gui_idle_interrupt +ffffffff81e252d0 t amdgpu_bo_unreserve +ffffffff81e253b0 t gfx_v9_0_get_gpu_clock_counter +ffffffff81e25b30 t gfx_v9_0_read_wave_data +ffffffff81e25d70 t gfx_v9_0_read_wave_vgprs +ffffffff81e25d90 t gfx_v9_0_read_wave_sgprs +ffffffff81e25de0 t gfx_v9_0_select_me_pipe_q +ffffffff81e25e00 t wave_read_ind +ffffffff81e25f10 t wave_read_regs +ffffffff81e26080 t gfx_v9_0_cp_gfx_enable +ffffffff81e26160 t amdgpu_bo_reserve +ffffffff81e262d0 t gfx_v9_0_kiq_init_register +ffffffff81e26f50 t gfx_v9_0_mqd_init +ffffffff81e27490 t gfx_v9_0_update_medium_grain_clock_gating +ffffffff81e279a0 t gfx_v9_0_update_3d_clock_gating +ffffffff81e27d80 t gfx_v9_0_update_coarse_grain_clock_gating +ffffffff81e29000 t gfx_v9_4_ras_error_inject +ffffffff81e29130 t gfx_v9_4_query_ras_error_count +ffffffff81e29ef0 t gfx_v9_4_query_ras_error_status +ffffffff81e2a0c0 t gfx_v9_4_reset_ras_error_count +ffffffff81e2b000 T gfx_v9_4_2_do_edc_gpr_workarounds +ffffffff81e2b760 T gfx_v9_4_2_init_golden_registers +ffffffff81e2b7f0 T gfx_v9_4_2_debug_trap_config_init +ffffffff81e2b890 T gfx_v9_4_2_set_power_brake_sequence +ffffffff81e2ba60 t gfx_v9_4_2_ras_error_inject +ffffffff81e2bb90 t gfx_v9_4_2_query_ras_error_count +ffffffff81e2bc40 t gfx_v9_4_2_query_ras_error_status +ffffffff81e2c490 t gfx_v9_4_2_reset_ras_error_count +ffffffff81e2c4f0 t gfx_v9_4_2_reset_ras_error_status +ffffffff81e2c9b0 t gfx_v9_4_2_enable_watchdog_timer +ffffffff81e2cbd0 t gfx_v9_4_2_query_uctl2_poison_status +ffffffff81e2cc50 t gfx_v9_4_2_run_shader +ffffffff81e2cfd0 t gfx_v9_4_2_wait_for_waves_assigned +ffffffff81e2d610 t gfx_v9_4_2_query_sram_edc_count +ffffffff81e2d960 t gfx_v9_4_2_query_utc_edc_count +ffffffff81e2db40 t wave_read_ind +ffffffff81e2e000 t gfxhub_v1_0_get_mc_fb_offset +ffffffff81e2e090 t gfxhub_v1_0_setup_vm_pt_regs +ffffffff81e2e1d0 t gfxhub_v1_0_gart_enable +ffffffff81e2f6c0 t gfxhub_v1_0_gart_disable +ffffffff81e2f950 t gfxhub_v1_0_set_fault_enable_default +ffffffff81e2fa40 t gfxhub_v1_0_init +ffffffff81e30000 T gfxhub_v1_1_get_xgmi_info +ffffffff81e31000 t gfxhub_v2_0_get_fb_location +ffffffff81e31090 t gfxhub_v2_0_get_mc_fb_offset +ffffffff81e31120 t gfxhub_v2_0_setup_vm_pt_regs +ffffffff81e31260 t gfxhub_v2_0_gart_enable +ffffffff81e32460 t gfxhub_v2_0_gart_disable +ffffffff81e326a0 t gfxhub_v2_0_set_fault_enable_default +ffffffff81e32790 t gfxhub_v2_0_init +ffffffff81e32860 t gfxhub_v2_0_print_l2_protection_fault_status +ffffffff81e32a30 t gfxhub_v2_0_get_invalidate_req +ffffffff81e33000 t gfxhub_v2_1_get_fb_location +ffffffff81e33090 t gfxhub_v2_1_get_mc_fb_offset +ffffffff81e33120 t gfxhub_v2_1_setup_vm_pt_regs +ffffffff81e33260 t gfxhub_v2_1_gart_enable +ffffffff81e34540 t gfxhub_v2_1_gart_disable +ffffffff81e347c0 t gfxhub_v2_1_set_fault_enable_default +ffffffff81e348d0 t gfxhub_v2_1_init +ffffffff81e349a0 t gfxhub_v2_1_get_xgmi_info +ffffffff81e34ad0 t gfxhub_v2_1_utcl2_harvest +ffffffff81e34cb0 t gfxhub_v2_1_save_regs +ffffffff81e356e0 t gfxhub_v2_1_restore_regs +ffffffff81e362c0 t gfxhub_v2_1_halt +ffffffff81e36680 t gfxhub_v2_1_print_l2_protection_fault_status +ffffffff81e36850 t gfxhub_v2_1_get_invalidate_req +ffffffff81e37000 t gfxhub_v3_0_get_fb_location +ffffffff81e37090 t gfxhub_v3_0_get_mc_fb_offset +ffffffff81e37120 t gfxhub_v3_0_setup_vm_pt_regs +ffffffff81e37260 t gfxhub_v3_0_gart_enable +ffffffff81e384e0 t gfxhub_v3_0_gart_disable +ffffffff81e38760 t gfxhub_v3_0_set_fault_enable_default +ffffffff81e38b00 t gfxhub_v3_0_init +ffffffff81e38bd0 t gfxhub_v3_0_print_l2_protection_fault_status +ffffffff81e38da0 t gfxhub_v3_0_get_invalidate_req +ffffffff81e39000 t gfxhub_v3_0_3_get_fb_location +ffffffff81e39090 t gfxhub_v3_0_3_get_mc_fb_offset +ffffffff81e39120 t gfxhub_v3_0_3_setup_vm_pt_regs +ffffffff81e39260 t gfxhub_v3_0_3_gart_enable +ffffffff81e3a4f0 t gfxhub_v3_0_3_gart_disable +ffffffff81e3a790 t gfxhub_v3_0_3_set_fault_enable_default +ffffffff81e3a8a0 t gfxhub_v3_0_3_init +ffffffff81e3a970 t gfxhub_v3_0_3_print_l2_protection_fault_status +ffffffff81e3ab40 t gfxhub_v3_0_3_get_invalidate_req +ffffffff81e3b000 t gmc_v10_0_early_init +ffffffff81e3b1f0 t gmc_v10_0_late_init +ffffffff81e3b260 t gmc_v10_0_sw_init +ffffffff81e3b680 t gmc_v10_0_sw_fini +ffffffff81e3b6d0 t gmc_v10_0_hw_init +ffffffff81e3b890 t gmc_v10_0_hw_fini +ffffffff81e3b920 t gmc_v10_0_suspend +ffffffff81e3b9b0 t gmc_v10_0_resume +ffffffff81e3ba10 t gmc_v10_0_is_idle +ffffffff81e3ba40 t gmc_v10_0_wait_for_idle +ffffffff81e3ba70 t gmc_v10_0_soft_reset +ffffffff81e3baa0 t gmc_v10_0_set_clockgating_state +ffffffff81e3bb50 t gmc_v10_0_set_powergating_state +ffffffff81e3bb80 t gmc_v10_0_get_clockgating_state +ffffffff81e3bc20 t gmc_v10_0_flush_gpu_tlb +ffffffff81e3bed0 t gmc_v10_0_flush_gpu_tlb_pasid +ffffffff81e3c0f0 t gmc_v10_0_emit_flush_gpu_tlb +ffffffff81e3c2a0 t gmc_v10_0_emit_pasid_mapping +ffffffff81e3c310 t gmc_v10_0_map_mtype +ffffffff81e3c360 t gmc_v10_0_get_vm_pde +ffffffff81e3c450 t gmc_v10_0_get_vm_pte +ffffffff81e3c500 t gmc_v10_0_get_vbios_fb_size +ffffffff81e3c670 t gmc_v10_0_flush_vm_hub +ffffffff81e3cad0 t gmc_v10_0_vm_fault_interrupt_state +ffffffff81e3cb40 t gmc_v10_0_process_interrupt +ffffffff81e3ce00 t gmc_v10_0_ecc_interrupt_state +ffffffff81e3d000 t gmc_v11_0_early_init +ffffffff81e3d230 t gmc_v11_0_late_init +ffffffff81e3d2a0 t gmc_v11_0_sw_init +ffffffff81e3d5c0 t gmc_v11_0_sw_fini +ffffffff81e3d610 t gmc_v11_0_hw_init +ffffffff81e3d750 t gmc_v11_0_hw_fini +ffffffff81e3d7d0 t gmc_v11_0_suspend +ffffffff81e3d850 t gmc_v11_0_resume +ffffffff81e3d8b0 t gmc_v11_0_is_idle +ffffffff81e3d8e0 t gmc_v11_0_wait_for_idle +ffffffff81e3d910 t gmc_v11_0_soft_reset +ffffffff81e3d940 t gmc_v11_0_set_clockgating_state +ffffffff81e3d9c0 t gmc_v11_0_set_powergating_state +ffffffff81e3d9f0 t gmc_v11_0_get_clockgating_state +ffffffff81e3da30 t gmc_v11_0_flush_gpu_tlb +ffffffff81e3df00 t gmc_v11_0_flush_gpu_tlb_pasid +ffffffff81e3e0f0 t gmc_v11_0_emit_flush_gpu_tlb +ffffffff81e3e2a0 t gmc_v11_0_emit_pasid_mapping +ffffffff81e3e310 t gmc_v11_0_map_mtype +ffffffff81e3e360 t gmc_v11_0_get_vm_pde +ffffffff81e3e460 t gmc_v11_0_get_vm_pte +ffffffff81e3e510 t gmc_v11_0_get_vbios_fb_size +ffffffff81e3e680 t gmc_v11_0_vm_fault_interrupt_state +ffffffff81e3e6f0 t gmc_v11_0_process_interrupt +ffffffff81e3e910 t gmc_v11_0_ecc_interrupt_state +ffffffff81e3f000 t gmc_v7_0_early_init +ffffffff81e3f090 t gmc_v7_0_late_init +ffffffff81e3f0e0 t gmc_v7_0_sw_init +ffffffff81e3f5e0 t gmc_v7_0_sw_fini +ffffffff81e3f690 t gmc_v7_0_hw_init +ffffffff81e40030 t gmc_v7_0_hw_fini +ffffffff81e400f0 t gmc_v7_0_suspend +ffffffff81e40130 t gmc_v7_0_resume +ffffffff81e40190 t gmc_v7_0_is_idle +ffffffff81e401e0 t gmc_v7_0_wait_for_idle +ffffffff81e40280 t gmc_v7_0_soft_reset +ffffffff81e404e0 t gmc_v7_0_set_clockgating_state +ffffffff81e40740 t gmc_v7_0_set_powergating_state +ffffffff81e40770 t gmc_v7_0_flush_gpu_tlb +ffffffff81e407a0 t gmc_v7_0_flush_gpu_tlb_pasid +ffffffff81e40860 t gmc_v7_0_emit_flush_gpu_tlb +ffffffff81e408f0 t gmc_v7_0_emit_pasid_mapping +ffffffff81e40920 t gmc_v7_0_set_prt +ffffffff81e40ad0 t gmc_v7_0_get_vm_pde +ffffffff81e40b30 t gmc_v7_0_get_vm_pte +ffffffff81e40b70 t gmc_v7_0_get_vbios_fb_size +ffffffff81e40be0 t gmc_v7_0_vm_fault_interrupt_state +ffffffff81e40cb0 t gmc_v7_0_process_interrupt +ffffffff81e41000 t gmc_v8_0_early_init +ffffffff81e41090 t gmc_v8_0_late_init +ffffffff81e410e0 t gmc_v8_0_sw_init +ffffffff81e41760 t gmc_v8_0_sw_fini +ffffffff81e41810 t gmc_v8_0_hw_init +ffffffff81e424b0 t gmc_v8_0_hw_fini +ffffffff81e42570 t gmc_v8_0_suspend +ffffffff81e425b0 t gmc_v8_0_resume +ffffffff81e42610 t gmc_v8_0_is_idle +ffffffff81e42660 t gmc_v8_0_wait_for_idle +ffffffff81e42700 t gmc_v8_0_check_soft_reset +ffffffff81e42770 t gmc_v8_0_pre_soft_reset +ffffffff81e428e0 t gmc_v8_0_soft_reset +ffffffff81e429b0 t gmc_v8_0_post_soft_reset +ffffffff81e42a20 t gmc_v8_0_set_clockgating_state +ffffffff81e42fe0 t gmc_v8_0_set_powergating_state +ffffffff81e43010 t gmc_v8_0_get_clockgating_state +ffffffff81e43080 t gmc_v8_0_flush_gpu_tlb +ffffffff81e430b0 t gmc_v8_0_flush_gpu_tlb_pasid +ffffffff81e43170 t gmc_v8_0_emit_flush_gpu_tlb +ffffffff81e43200 t gmc_v8_0_emit_pasid_mapping +ffffffff81e43230 t gmc_v8_0_set_prt +ffffffff81e433e0 t gmc_v8_0_get_vm_pde +ffffffff81e43440 t gmc_v8_0_get_vm_pte +ffffffff81e43490 t gmc_v8_0_get_vbios_fb_size +ffffffff81e43500 t gmc_v8_0_vm_fault_interrupt_state +ffffffff81e435d0 t gmc_v8_0_process_interrupt +ffffffff81e44000 T gmc_v9_0_restore_registers +ffffffff81e44150 t gmc_v9_0_early_init +ffffffff81e44500 t gmc_v9_0_late_init +ffffffff81e44610 t gmc_v9_0_sw_init +ffffffff81e44cc0 t gmc_v9_0_sw_fini +ffffffff81e44d30 t gmc_v9_0_hw_init +ffffffff81e45130 t gmc_v9_0_hw_fini +ffffffff81e451e0 t gmc_v9_0_suspend +ffffffff81e45290 t gmc_v9_0_resume +ffffffff81e452f0 t gmc_v9_0_is_idle +ffffffff81e45320 t gmc_v9_0_wait_for_idle +ffffffff81e45350 t gmc_v9_0_soft_reset +ffffffff81e45380 t gmc_v9_0_set_clockgating_state +ffffffff81e453e0 t gmc_v9_0_set_powergating_state +ffffffff81e45410 t gmc_v9_0_get_clockgating_state +ffffffff81e45450 t gmc_v9_0_flush_gpu_tlb +ffffffff81e45a90 t gmc_v9_0_flush_gpu_tlb_pasid +ffffffff81e45d60 t gmc_v9_0_emit_flush_gpu_tlb +ffffffff81e45f30 t gmc_v9_0_emit_pasid_mapping +ffffffff81e45fa0 t gmc_v9_0_map_mtype +ffffffff81e45fe0 t gmc_v9_0_get_vm_pde +ffffffff81e460e0 t gmc_v9_0_get_vm_pte +ffffffff81e461b0 t gmc_v9_0_get_vbios_fb_size +ffffffff81e46340 t gmc_v9_0_vm_fault_interrupt_state +ffffffff81e466c0 t gmc_v9_0_process_interrupt +ffffffff81e46ce0 t gmc_v9_0_ecc_interrupt_state +ffffffff81e47000 t hdp_v4_0_query_ras_error_count +ffffffff81e470c0 t hdp_v4_0_reset_ras_error_count +ffffffff81e471e0 t hdp_v4_0_flush_hdp +ffffffff81e47230 t hdp_v4_0_invalidate_hdp +ffffffff81e47300 t hdp_v4_0_update_clock_gating +ffffffff81e47400 t hdp_v4_0_get_clockgating_state +ffffffff81e47450 t hdp_v4_0_init_registers +ffffffff81e48000 t hdp_v5_0_flush_hdp +ffffffff81e48050 t hdp_v5_0_invalidate_hdp +ffffffff81e480f0 t hdp_v5_0_update_clock_gating +ffffffff81e484e0 t hdp_v5_0_get_clockgating_state +ffffffff81e48600 t hdp_v5_0_init_registers +ffffffff81e49000 t hdp_v5_2_flush_hdp +ffffffff81e49050 t hdp_v5_2_update_clock_gating +ffffffff81e49440 t hdp_v5_2_get_clockgating_state +ffffffff81e4a000 t hdp_v6_0_flush_hdp +ffffffff81e4a050 t hdp_v6_0_update_clock_gating +ffffffff81e4a360 t hdp_v6_0_get_clockgating_state +ffffffff81e4b000 t iceland_ih_early_init +ffffffff81e4b050 t iceland_ih_sw_init +ffffffff81e4b0b0 t iceland_ih_sw_fini +ffffffff81e4b0f0 t iceland_ih_hw_init +ffffffff81e4b320 t iceland_ih_hw_fini +ffffffff81e4b3f0 t iceland_ih_suspend +ffffffff81e4b4c0 t iceland_ih_resume +ffffffff81e4b500 t iceland_ih_is_idle +ffffffff81e4b550 t iceland_ih_wait_for_idle +ffffffff81e4b5f0 t iceland_ih_soft_reset +ffffffff81e4b6d0 t iceland_ih_set_clockgating_state +ffffffff81e4b700 t iceland_ih_set_powergating_state +ffffffff81e4b730 t iceland_ih_get_wptr +ffffffff81e4b820 t iceland_ih_decode_iv +ffffffff81e4b8a0 t iceland_ih_set_rptr +ffffffff81e4c000 t ih_v6_0_early_init +ffffffff81e4c050 t ih_v6_0_sw_init +ffffffff81e4c1b0 t ih_v6_0_sw_fini +ffffffff81e4c1f0 t ih_v6_0_hw_init +ffffffff81e4c7a0 t ih_v6_0_hw_fini +ffffffff81e4c800 t ih_v6_0_suspend +ffffffff81e4c860 t ih_v6_0_resume +ffffffff81e4c870 t ih_v6_0_is_idle +ffffffff81e4c8a0 t ih_v6_0_wait_for_idle +ffffffff81e4c8d0 t ih_v6_0_soft_reset +ffffffff81e4c900 t ih_v6_0_set_clockgating_state +ffffffff81e4ca20 t ih_v6_0_set_powergating_state +ffffffff81e4cb90 t ih_v6_0_get_clockgating_state +ffffffff81e4cc20 t ih_v6_0_get_wptr +ffffffff81e4cd10 t ih_v6_0_set_rptr +ffffffff81e4cde0 t ih_v6_0_self_irq +ffffffff81e4ce50 t ih_v6_0_toggle_interrupts +ffffffff81e4d030 t force_update_wptr_for_self_int +ffffffff81e4e000 t imu_v11_0_init_microcode +ffffffff81e4e1f0 t imu_v11_0_load_microcode +ffffffff81e4e550 t imu_v11_0_setup +ffffffff81e4e7d0 t imu_v11_0_start +ffffffff81e4e8c0 t imu_v11_0_program_rlc_ram +ffffffff81e4ea70 t imu_v11_0_wait_for_reset_status +ffffffff81e4ebc0 t program_imu_rlc_ram +ffffffff81e4f000 T imu_v11_0_3_program_rlc_ram +ffffffff81e50000 T jpeg_v1_0_early_init +ffffffff81e50060 T jpeg_v1_0_sw_init +ffffffff81e50130 T jpeg_v1_0_sw_fini +ffffffff81e50150 T jpeg_v1_0_start +ffffffff81e50bc0 t jpeg_v1_0_decode_ring_get_rptr +ffffffff81e50c50 t jpeg_v1_0_decode_ring_get_wptr +ffffffff81e50ce0 t jpeg_v1_0_decode_ring_set_wptr +ffffffff81e50d50 t jpeg_v1_0_decode_ring_emit_ib +ffffffff81e51660 t jpeg_v1_0_decode_ring_emit_fence +ffffffff81e51fc0 t jpeg_v1_0_decode_ring_emit_vm_flush +ffffffff81e52030 t jpeg_v1_0_decode_ring_nop +ffffffff81e52190 t jpeg_v1_0_decode_ring_insert_start +ffffffff81e52360 t jpeg_v1_0_decode_ring_insert_end +ffffffff81e52530 t jpeg_v1_0_ring_begin_use +ffffffff81e52630 t jpeg_v1_0_decode_ring_emit_wreg +ffffffff81e52890 t jpeg_v1_0_decode_ring_emit_reg_wait +ffffffff81e52cb0 t jpeg_v1_0_set_interrupt_state +ffffffff81e52ce0 t jpeg_v1_0_process_interrupt +ffffffff81e53000 T jpeg_v2_0_dec_ring_insert_start +ffffffff81e531b0 T jpeg_v2_0_dec_ring_insert_end +ffffffff81e53360 T jpeg_v2_0_dec_ring_emit_fence +ffffffff81e53a50 T jpeg_v2_0_dec_ring_emit_ib +ffffffff81e54240 T jpeg_v2_0_dec_ring_emit_reg_wait +ffffffff81e54600 T jpeg_v2_0_dec_ring_emit_vm_flush +ffffffff81e54670 T jpeg_v2_0_dec_ring_emit_wreg +ffffffff81e548b0 T jpeg_v2_0_dec_ring_nop +ffffffff81e54a10 t jpeg_v2_0_early_init +ffffffff81e54a80 t jpeg_v2_0_sw_init +ffffffff81e54b90 t jpeg_v2_0_sw_fini +ffffffff81e54be0 t jpeg_v2_0_hw_init +ffffffff81e54c60 t jpeg_v2_0_hw_fini +ffffffff81e54d40 t jpeg_v2_0_suspend +ffffffff81e54d70 t jpeg_v2_0_resume +ffffffff81e54e00 t jpeg_v2_0_is_idle +ffffffff81e54e80 t jpeg_v2_0_wait_for_idle +ffffffff81e54f70 t jpeg_v2_0_set_clockgating_state +ffffffff81e55020 t jpeg_v2_0_set_powergating_state +ffffffff81e55820 t jpeg_v2_0_dec_ring_get_rptr +ffffffff81e558b0 t jpeg_v2_0_dec_ring_get_wptr +ffffffff81e55950 t jpeg_v2_0_dec_ring_set_wptr +ffffffff81e559f0 t jpeg_v2_0_set_interrupt_state +ffffffff81e55a20 t jpeg_v2_0_process_interrupt +ffffffff81e55ab0 t jpeg_v2_0_enable_clock_gating +ffffffff81e55c50 t jpeg_v2_0_disable_clock_gating +ffffffff81e56000 t jpeg_v2_6_query_ras_poison_status +ffffffff81e56140 t jpeg_v2_5_early_init +ffffffff81e56410 t jpeg_v2_5_sw_init +ffffffff81e56630 t jpeg_v2_5_sw_fini +ffffffff81e56680 t jpeg_v2_5_hw_init +ffffffff81e56770 t jpeg_v2_5_hw_fini +ffffffff81e568b0 t jpeg_v2_5_suspend +ffffffff81e568e0 t jpeg_v2_5_resume +ffffffff81e569e0 t jpeg_v2_5_is_idle +ffffffff81e56ae0 t jpeg_v2_5_wait_for_idle +ffffffff81e56c10 t jpeg_v2_5_set_clockgating_state +ffffffff81e56d80 t jpeg_v2_5_set_powergating_state +ffffffff81e57470 t jpeg_v2_5_dec_ring_get_rptr +ffffffff81e57510 t jpeg_v2_5_dec_ring_get_wptr +ffffffff81e575c0 t jpeg_v2_5_dec_ring_set_wptr +ffffffff81e57670 t jpeg_v2_6_dec_ring_insert_start +ffffffff81e57830 t jpeg_v2_6_dec_ring_insert_end +ffffffff81e579f0 t jpeg_v2_5_set_interrupt_state +ffffffff81e57a20 t jpeg_v2_5_process_interrupt +ffffffff81e57b00 t jpeg_v2_5_enable_clock_gating +ffffffff81e57bd0 t jpeg_v2_5_disable_clock_gating +ffffffff81e58000 t jpeg_v3_0_early_init +ffffffff81e580f0 t jpeg_v3_0_sw_init +ffffffff81e58200 t jpeg_v3_0_sw_fini +ffffffff81e58250 t jpeg_v3_0_hw_init +ffffffff81e582d0 t jpeg_v3_0_hw_fini +ffffffff81e583b0 t jpeg_v3_0_suspend +ffffffff81e583e0 t jpeg_v3_0_resume +ffffffff81e58470 t jpeg_v3_0_is_idle +ffffffff81e584f0 t jpeg_v3_0_wait_for_idle +ffffffff81e585e0 t jpeg_v3_0_set_clockgating_state +ffffffff81e58690 t jpeg_v3_0_set_powergating_state +ffffffff81e58f40 t jpeg_v3_0_dec_ring_get_rptr +ffffffff81e58fd0 t jpeg_v3_0_dec_ring_get_wptr +ffffffff81e59070 t jpeg_v3_0_dec_ring_set_wptr +ffffffff81e59110 t jpeg_v3_0_set_interrupt_state +ffffffff81e59140 t jpeg_v3_0_process_interrupt +ffffffff81e591d0 t jpeg_v3_0_enable_clock_gating +ffffffff81e592a0 t jpeg_v3_0_disable_clock_gating +ffffffff81e5a000 t jpeg_v4_0_early_init +ffffffff81e5a080 t jpeg_v4_0_sw_init +ffffffff81e5a190 t jpeg_v4_0_sw_fini +ffffffff81e5a1e0 t jpeg_v4_0_hw_init +ffffffff81e5a300 t jpeg_v4_0_hw_fini +ffffffff81e5a3e0 t jpeg_v4_0_suspend +ffffffff81e5a410 t jpeg_v4_0_resume +ffffffff81e5a460 t jpeg_v4_0_is_idle +ffffffff81e5a4e0 t jpeg_v4_0_wait_for_idle +ffffffff81e5a5d0 t jpeg_v4_0_set_clockgating_state +ffffffff81e5a680 t jpeg_v4_0_set_powergating_state +ffffffff81e5ae90 t jpeg_v4_0_dec_ring_get_rptr +ffffffff81e5af20 t jpeg_v4_0_dec_ring_get_wptr +ffffffff81e5afc0 t jpeg_v4_0_dec_ring_set_wptr +ffffffff81e5b060 t jpeg_v4_0_set_interrupt_state +ffffffff81e5b090 t jpeg_v4_0_process_interrupt +ffffffff81e5b130 t jpeg_v4_0_enable_clock_gating +ffffffff81e5b2e0 t jpeg_v4_0_disable_clock_gating +ffffffff81e5c000 t lsdma_v6_0_copy_mem +ffffffff81e5c350 t lsdma_v6_0_fill_mem +ffffffff81e5c630 t lsdma_v6_0_update_memory_power_gating +ffffffff81e5d000 t mca_v3_0_mp0_query_ras_error_count +ffffffff81e5d020 t mca_v3_0_ras_block_match +ffffffff81e5d070 t mca_v3_0_mp1_query_ras_error_count +ffffffff81e5d090 t mca_v3_0_mpio_query_ras_error_count +ffffffff81e5d0b0 t mca_v3_0_init +ffffffff81e5e000 t mes_v10_0_early_init +ffffffff81e5e060 t mes_v10_0_late_init +ffffffff81e5e0b0 t mes_v10_1_sw_init +ffffffff81e5e580 t mes_v10_1_sw_fini +ffffffff81e5e6b0 t mes_v10_1_hw_init +ffffffff81e5ef50 t mes_v10_1_hw_fini +ffffffff81e5f010 t mes_v10_1_suspend +ffffffff81e5f0f0 t mes_v10_1_resume +ffffffff81e5f140 t mes_v10_1_kiq_hw_init +ffffffff81e5f550 t mes_v10_1_add_hw_queue +ffffffff81e5f6d0 t mes_v10_1_remove_hw_queue +ffffffff81e5f760 t mes_v10_1_unmap_legacy_queue +ffffffff81e5f850 t mes_v10_1_suspend_gang +ffffffff81e5f880 t mes_v10_1_resume_gang +ffffffff81e5f8b0 t mes_v10_1_submit_pkt_and_poll_completion +ffffffff81e5fab0 t mes_v10_1_load_microcode +ffffffff81e60290 t mes_v10_1_enable +ffffffff81e60700 t mes_v10_1_queue_init +ffffffff81e609a0 t amdgpu_bo_unreserve +ffffffff81e60a80 t mes_v10_1_ring_get_rptr +ffffffff81e60ab0 t mes_v10_1_ring_get_wptr +ffffffff81e60b20 t mes_v10_1_ring_set_wptr +ffffffff81e61000 t mes_v11_0_early_init +ffffffff81e61060 t mes_v11_0_late_init +ffffffff81e610d0 t mes_v11_0_sw_init +ffffffff81e615b0 t mes_v11_0_sw_fini +ffffffff81e61750 t mes_v11_0_hw_init +ffffffff81e61f60 t mes_v11_0_hw_fini +ffffffff81e61f90 t mes_v11_0_suspend +ffffffff81e61fa0 t mes_v11_0_resume +ffffffff81e61ff0 t mes_v11_0_kiq_hw_init +ffffffff81e621f0 t mes_v11_0_kiq_hw_fini +ffffffff81e62630 t mes_v11_0_add_hw_queue +ffffffff81e62830 t mes_v11_0_remove_hw_queue +ffffffff81e628c0 t mes_v11_0_unmap_legacy_queue +ffffffff81e629c0 t mes_v11_0_suspend_gang +ffffffff81e629f0 t mes_v11_0_resume_gang +ffffffff81e62a20 t mes_v11_0_misc_op +ffffffff81e62b90 t mes_v11_0_submit_pkt_and_poll_completion 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mmhub_v1_7_reset_ras_error_count +ffffffff81e682d0 t mmhub_v1_7_reset_ras_error_status +ffffffff81e683c0 t mmhub_v1_7_get_fb_location +ffffffff81e684d0 t mmhub_v1_7_init +ffffffff81e68570 t mmhub_v1_7_gart_enable +ffffffff81e69a50 t mmhub_v1_7_set_fault_enable_default +ffffffff81e69b60 t mmhub_v1_7_gart_disable +ffffffff81e69df0 t mmhub_v1_7_set_clockgating +ffffffff81e6a170 t mmhub_v1_7_get_clockgating +ffffffff81e6a290 t mmhub_v1_7_setup_vm_pt_regs +ffffffff81e6b000 t mmhub_v2_0_init +ffffffff81e6b0d0 t mmhub_v2_0_gart_enable +ffffffff81e6c250 t mmhub_v2_0_set_fault_enable_default +ffffffff81e6c360 t mmhub_v2_0_gart_disable +ffffffff81e6c5e0 t mmhub_v2_0_set_clockgating +ffffffff81e6c920 t mmhub_v2_0_get_clockgating +ffffffff81e6cab0 t mmhub_v2_0_setup_vm_pt_regs +ffffffff81e6cbf0 t mmhub_v2_0_print_l2_protection_fault_status +ffffffff81e6ce40 t mmhub_v2_0_get_invalidate_req +ffffffff81e6d000 t mmhub_v2_3_init +ffffffff81e6d0e0 t mmhub_v2_3_gart_enable +ffffffff81e6e470 t mmhub_v2_3_set_fault_enable_default +ffffffff81e6e570 t mmhub_v2_3_gart_disable +ffffffff81e6e800 t mmhub_v2_3_set_clockgating +ffffffff81e6ec80 t mmhub_v2_3_get_clockgating +ffffffff81e6ee70 t mmhub_v2_3_setup_vm_pt_regs +ffffffff81e6efb0 t mmhub_v2_3_print_l2_protection_fault_status +ffffffff81e6f1c0 t mmhub_v2_3_get_invalidate_req +ffffffff81e70000 t mmhub_v3_0_get_fb_location +ffffffff81e70090 t mmhub_v3_0_get_mc_fb_offset +ffffffff81e70120 t mmhub_v3_0_init +ffffffff81e701f0 t mmhub_v3_0_gart_enable +ffffffff81e71380 t mmhub_v3_0_set_fault_enable_default +ffffffff81e71490 t mmhub_v3_0_gart_disable +ffffffff81e71710 t mmhub_v3_0_set_clockgating +ffffffff81e718e0 t mmhub_v3_0_get_clockgating +ffffffff81e71990 t mmhub_v3_0_setup_vm_pt_regs +ffffffff81e71ad0 t mmhub_v3_0_print_l2_protection_fault_status +ffffffff81e71cd0 t mmhub_v3_0_get_invalidate_req +ffffffff81e72000 t mmhub_v3_0_1_get_fb_location +ffffffff81e72090 t mmhub_v3_0_1_get_mc_fb_offset +ffffffff81e72120 t mmhub_v3_0_1_init +ffffffff81e721f0 t mmhub_v3_0_1_gart_enable +ffffffff81e73470 t mmhub_v3_0_1_set_fault_enable_default +ffffffff81e73570 t mmhub_v3_0_1_gart_disable +ffffffff81e73800 t mmhub_v3_0_1_set_clockgating +ffffffff81e739c0 t mmhub_v3_0_1_get_clockgating +ffffffff81e73a70 t mmhub_v3_0_1_setup_vm_pt_regs +ffffffff81e73bb0 t mmhub_v3_0_1_print_l2_protection_fault_status +ffffffff81e73db0 t mmhub_v3_0_1_get_invalidate_req +ffffffff81e74000 t mmhub_v3_0_2_get_fb_location +ffffffff81e74090 t mmhub_v3_0_2_get_mc_fb_offset +ffffffff81e74120 t mmhub_v3_0_2_init +ffffffff81e741f0 t mmhub_v3_0_2_gart_enable +ffffffff81e75370 t mmhub_v3_0_2_set_fault_enable_default +ffffffff81e75480 t mmhub_v3_0_2_gart_disable +ffffffff81e75700 t mmhub_v3_0_2_set_clockgating +ffffffff81e75730 t mmhub_v3_0_2_get_clockgating +ffffffff81e75760 t mmhub_v3_0_2_setup_vm_pt_regs +ffffffff81e758a0 t mmhub_v3_0_2_print_l2_protection_fault_status +ffffffff81e75a80 t mmhub_v3_0_2_get_invalidate_req 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xgpu_ai_request_reset +ffffffff81e79530 t xgpu_ai_mailbox_trans_msg +ffffffff81e79760 t xgpu_ai_set_mailbox_ack_irq +ffffffff81e797f0 t xgpu_ai_mailbox_ack_irq +ffffffff81e79840 t xgpu_ai_set_mailbox_rcv_irq +ffffffff81e798d0 t xgpu_ai_mailbox_rcv_irq +ffffffff81e799b0 t xgpu_ai_send_access_requests +ffffffff81e79aa0 t xgpu_ai_poll_msg +ffffffff81e7a000 T xgpu_nv_mailbox_set_irq_funcs +ffffffff81e7a050 T xgpu_nv_mailbox_add_irq_id +ffffffff81e7a0e0 T xgpu_nv_mailbox_get_irq +ffffffff81e7a190 t xgpu_nv_mailbox_flr_work +ffffffff81e7a3b0 T xgpu_nv_mailbox_put_irq +ffffffff81e7a3f0 t xgpu_nv_request_full_gpu_access +ffffffff81e7a410 t xgpu_nv_release_full_gpu_access +ffffffff81e7a430 t xgpu_nv_request_init_data +ffffffff81e7a450 t xgpu_nv_request_reset +ffffffff81e7a550 t xgpu_nv_mailbox_trans_msg +ffffffff81e7a6f0 t xgpu_nv_set_mailbox_ack_irq +ffffffff81e7a770 t xgpu_nv_mailbox_ack_irq +ffffffff81e7a7c0 t xgpu_nv_set_mailbox_rcv_irq +ffffffff81e7a840 t xgpu_nv_mailbox_rcv_irq +ffffffff81e7a8f0 t xgpu_nv_send_access_requests +ffffffff81e7b000 T xgpu_vi_init_golden_registers +ffffffff81e7b0c0 T xgpu_vi_mailbox_set_irq_funcs +ffffffff81e7b110 T xgpu_vi_mailbox_add_irq_id +ffffffff81e7b1a0 T xgpu_vi_mailbox_get_irq +ffffffff81e7b250 t xgpu_vi_mailbox_flr_work +ffffffff81e7b3a0 T xgpu_vi_mailbox_put_irq +ffffffff81e7b3e0 t xgpu_vi_request_full_gpu_access +ffffffff81e7b400 t xgpu_vi_release_full_gpu_access +ffffffff81e7b420 t xgpu_vi_request_reset +ffffffff81e7b440 t xgpu_vi_wait_reset_cmpl +ffffffff81e7b520 t xgpu_vi_set_mailbox_ack_irq +ffffffff81e7b5a0 t xgpu_vi_mailbox_ack_irq +ffffffff81e7b5f0 t xgpu_vi_set_mailbox_rcv_irq +ffffffff81e7b670 t xgpu_vi_mailbox_rcv_irq +ffffffff81e7b720 t xgpu_vi_mailbox_rcv_msg +ffffffff81e7b840 t xgpu_vi_send_access_requests +ffffffff81e7c000 t navi10_ih_early_init +ffffffff81e7c060 t navi10_ih_sw_init +ffffffff81e7c1d0 t navi10_ih_sw_fini +ffffffff81e7c210 t navi10_ih_hw_init +ffffffff81e7c640 t navi10_ih_hw_fini +ffffffff81e7c6a0 t navi10_ih_suspend +ffffffff81e7c700 t navi10_ih_resume +ffffffff81e7c710 t navi10_ih_is_idle +ffffffff81e7c740 t navi10_ih_wait_for_idle +ffffffff81e7c770 t navi10_ih_soft_reset +ffffffff81e7c7a0 t navi10_ih_set_clockgating_state +ffffffff81e7c8c0 t navi10_ih_set_powergating_state +ffffffff81e7c8f0 t navi10_ih_get_clockgating_state +ffffffff81e7c980 t navi10_ih_get_wptr +ffffffff81e7ca90 t navi10_ih_set_rptr +ffffffff81e7cb60 t navi10_ih_self_irq +ffffffff81e7cbe0 t navi10_ih_toggle_interrupts +ffffffff81e7cd70 t force_update_wptr_for_self_int +ffffffff81e7e000 t nbio_v2_3_get_hdp_flush_req_offset +ffffffff81e7e040 t nbio_v2_3_get_hdp_flush_done_offset +ffffffff81e7e080 t nbio_v2_3_get_pcie_index_offset +ffffffff81e7e0c0 t nbio_v2_3_get_pcie_data_offset +ffffffff81e7e100 t nbio_v2_3_get_rev_id +ffffffff81e7e160 t nbio_v2_3_mc_access_enable +ffffffff81e7e210 t nbio_v2_3_get_memsize +ffffffff81e7e280 t nbio_v2_3_sdma_doorbell_range +ffffffff81e7e320 t nbio_v2_3_vcn_doorbell_range +ffffffff81e7e3a0 t nbio_v2_3_enable_doorbell_aperture +ffffffff81e7e490 t nbio_v2_3_enable_doorbell_selfring_aperture +ffffffff81e7e5f0 t nbio_v2_3_ih_doorbell_range +ffffffff81e7e700 t nbio_v2_3_update_medium_grain_clock_gating +ffffffff81e7e7a0 t nbio_v2_3_update_medium_grain_light_sleep +ffffffff81e7e840 t nbio_v2_3_get_clockgating_state +ffffffff81e7e8c0 t nbio_v2_3_ih_control +ffffffff81e7ea10 t nbio_v2_3_init_registers +ffffffff81e7eaa0 t nbio_v2_3_remap_hdp_registers +ffffffff81e7ebb0 t nbio_v2_3_enable_aspm +ffffffff81e7ec50 t nbio_v2_3_program_aspm +ffffffff81e7f2e0 t nbio_v2_3_apply_lc_spc_mode_wa +ffffffff81e7f370 t nbio_v2_3_apply_l1_link_width_reconfig_wa +ffffffff81e7f3e0 t nbio_v2_3_clear_doorbell_interrupt +ffffffff81e80000 t nbio_v4_3_get_hdp_flush_req_offset +ffffffff81e80040 t nbio_v4_3_get_hdp_flush_done_offset +ffffffff81e80080 t nbio_v4_3_get_pcie_index_offset +ffffffff81e800b0 t nbio_v4_3_get_pcie_data_offset +ffffffff81e800f0 t nbio_v4_3_get_rev_id +ffffffff81e80170 t nbio_v4_3_mc_access_enable +ffffffff81e80220 t nbio_v4_3_get_memsize +ffffffff81e80290 t nbio_v4_3_sdma_doorbell_range +ffffffff81e80400 t nbio_v4_3_vcn_doorbell_range +ffffffff81e805b0 t nbio_v4_3_gc_doorbell_init +ffffffff81e806a0 t nbio_v4_3_enable_doorbell_aperture +ffffffff81e80790 t nbio_v4_3_enable_doorbell_selfring_aperture +ffffffff81e808f0 t nbio_v4_3_ih_doorbell_range +ffffffff81e80a10 t nbio_v4_3_update_medium_grain_clock_gating +ffffffff81e80b50 t nbio_v4_3_update_medium_grain_light_sleep +ffffffff81e80c80 t nbio_v4_3_get_clockgating_state +ffffffff81e80d90 t nbio_v4_3_ih_control +ffffffff81e80ee0 t nbio_v4_3_init_registers +ffffffff81e80ff0 t nbio_v4_3_remap_hdp_registers +ffffffff81e81100 t nbio_v4_3_program_aspm +ffffffff81e81da0 t nbio_v4_3_get_rom_offset +ffffffff81e81e30 t nbio_v4_3_sriov_sdma_doorbell_range +ffffffff81e81e60 t nbio_v4_3_sriov_vcn_doorbell_range +ffffffff81e81e90 t nbio_v4_3_sriov_gc_doorbell_init +ffffffff81e81ec0 t nbio_v4_3_sriov_ih_doorbell_range +ffffffff81e82000 t nbio_v6_1_get_hdp_flush_req_offset +ffffffff81e82040 t nbio_v6_1_get_hdp_flush_done_offset +ffffffff81e82080 t nbio_v6_1_get_pcie_index_offset +ffffffff81e820c0 t nbio_v6_1_get_pcie_data_offset +ffffffff81e82100 t nbio_v6_1_get_rev_id +ffffffff81e82180 t nbio_v6_1_mc_access_enable +ffffffff81e82230 t nbio_v6_1_get_memsize +ffffffff81e822a0 t nbio_v6_1_sdma_doorbell_range +ffffffff81e82330 t nbio_v6_1_enable_doorbell_aperture +ffffffff81e82420 t nbio_v6_1_enable_doorbell_selfring_aperture +ffffffff81e82580 t nbio_v6_1_ih_doorbell_range +ffffffff81e82690 t nbio_v6_1_update_medium_grain_clock_gating +ffffffff81e82730 t nbio_v6_1_update_medium_grain_light_sleep +ffffffff81e827d0 t nbio_v6_1_get_clockgating_state +ffffffff81e82850 t nbio_v6_1_ih_control +ffffffff81e829a0 t nbio_v6_1_init_registers +ffffffff81e82a70 t nbio_v6_1_remap_hdp_registers +ffffffff81e82b80 t nbio_v6_1_program_aspm +ffffffff81e83000 t nbio_v7_0_get_hdp_flush_req_offset +ffffffff81e83040 t nbio_v7_0_get_hdp_flush_done_offset +ffffffff81e83080 t nbio_v7_0_get_pcie_index_offset +ffffffff81e830c0 t nbio_v7_0_get_pcie_data_offset +ffffffff81e83100 t nbio_v7_0_get_rev_id +ffffffff81e83180 t nbio_v7_0_mc_access_enable +ffffffff81e83230 t nbio_v7_0_get_memsize +ffffffff81e832a0 t nbio_v7_0_sdma_doorbell_range +ffffffff81e83330 t nbio_v7_0_vcn_doorbell_range +ffffffff81e833b0 t nbio_v7_0_enable_doorbell_aperture +ffffffff81e834a0 t nbio_v7_0_enable_doorbell_selfring_aperture +ffffffff81e834d0 t nbio_v7_0_ih_doorbell_range +ffffffff81e835e0 t nbio_v7_0_update_medium_grain_clock_gating +ffffffff81e83710 t nbio_v7_0_update_medium_grain_light_sleep +ffffffff81e837b0 t nbio_v7_0_get_clockgating_state +ffffffff81e83830 t nbio_v7_0_ih_control +ffffffff81e83980 t nbio_v7_0_init_registers +ffffffff81e839d0 t nbio_v7_0_remap_hdp_registers +ffffffff81e83ae0 t nbio_7_0_read_syshub_ind_mmr +ffffffff81e83bb0 t nbio_7_0_write_syshub_ind_mmr +ffffffff81e84000 t nbio_v7_2_get_hdp_flush_req_offset +ffffffff81e84040 t nbio_v7_2_get_hdp_flush_done_offset +ffffffff81e84080 t nbio_v7_2_get_pcie_index_offset +ffffffff81e840c0 t nbio_v7_2_get_pcie_data_offset +ffffffff81e84100 t nbio_v7_2_get_pcie_port_index_offset +ffffffff81e84130 t nbio_v7_2_get_pcie_port_data_offset +ffffffff81e84170 t nbio_v7_2_get_rev_id +ffffffff81e84250 t nbio_v7_2_mc_access_enable +ffffffff81e84390 t nbio_v7_2_get_memsize +ffffffff81e84400 t nbio_v7_2_sdma_doorbell_range +ffffffff81e844a0 t nbio_v7_2_vcn_doorbell_range +ffffffff81e84520 t nbio_v7_2_enable_doorbell_aperture +ffffffff81e84600 t nbio_v7_2_enable_doorbell_selfring_aperture +ffffffff81e84760 t nbio_v7_2_ih_doorbell_range +ffffffff81e847f0 t nbio_v7_2_update_medium_grain_clock_gating +ffffffff81e848b0 t nbio_v7_2_update_medium_grain_light_sleep +ffffffff81e84a40 t nbio_v7_2_get_clockgating_state +ffffffff81e84ad0 t nbio_v7_2_ih_control +ffffffff81e84c20 t nbio_v7_2_init_registers +ffffffff81e84de0 t nbio_v7_2_remap_hdp_registers +ffffffff81e85000 t nbio_v7_4_query_ras_error_count +ffffffff81e851a0 t nbio_v7_4_handle_ras_controller_intr_no_bifring +ffffffff81e853e0 t nbio_v7_4_handle_ras_err_event_athub_intr_no_bifring +ffffffff81e85590 t nbio_v7_4_init_ras_controller_interrupt +ffffffff81e855d0 t nbio_v7_4_init_ras_err_event_athub_interrupt +ffffffff81e85610 t nbio_v7_4_get_hdp_flush_req_offset +ffffffff81e85650 t nbio_v7_4_get_hdp_flush_done_offset +ffffffff81e85690 t nbio_v7_4_get_pcie_index_offset +ffffffff81e856d0 t nbio_v7_4_get_pcie_data_offset +ffffffff81e85710 t nbio_v7_4_get_rev_id +ffffffff81e857d0 t nbio_v7_4_mc_access_enable +ffffffff81e85880 t nbio_v7_4_get_memsize +ffffffff81e858f0 t nbio_v7_4_sdma_doorbell_range +ffffffff81e859c0 t nbio_v7_4_vcn_doorbell_range +ffffffff81e85a60 t nbio_v7_4_enable_doorbell_aperture +ffffffff81e85b50 t nbio_v7_4_enable_doorbell_selfring_aperture +ffffffff81e85cb0 t nbio_v7_4_ih_doorbell_range +ffffffff81e85dc0 t nbio_v7_4_enable_doorbell_interrupt +ffffffff81e85f00 t nbio_v7_4_update_medium_grain_clock_gating +ffffffff81e85f30 t nbio_v7_4_update_medium_grain_light_sleep +ffffffff81e85fd0 t nbio_v7_4_get_clockgating_state +ffffffff81e86050 t nbio_v7_4_ih_control +ffffffff81e861a0 t nbio_v7_4_init_registers +ffffffff81e86290 t nbio_v7_4_remap_hdp_registers +ffffffff81e863a0 t nbio_v7_4_program_aspm +ffffffff81e867b0 t nbio_v7_4_set_ras_controller_irq_state +ffffffff81e86940 t nbio_v7_4_process_ras_controller_irq +ffffffff81e86970 t nbio_v7_4_set_ras_err_event_athub_irq_state +ffffffff81e86b00 t nbio_v7_4_process_err_event_athub_irq +ffffffff81e87000 t nbio_v7_7_get_hdp_flush_req_offset +ffffffff81e87040 t nbio_v7_7_get_hdp_flush_done_offset +ffffffff81e87080 t nbio_v7_7_get_pcie_index_offset +ffffffff81e870c0 t nbio_v7_7_get_pcie_data_offset +ffffffff81e87100 t nbio_v7_7_get_pcie_port_index_offset +ffffffff81e87130 t nbio_v7_7_get_pcie_port_data_offset +ffffffff81e87170 t nbio_v7_7_get_rev_id +ffffffff81e871f0 t nbio_v7_7_mc_access_enable +ffffffff81e872a0 t nbio_v7_7_get_memsize +ffffffff81e87310 t nbio_v7_7_sdma_doorbell_range +ffffffff81e873a0 t nbio_v7_7_vcn_doorbell_range +ffffffff81e87420 t nbio_v7_7_enable_doorbell_aperture +ffffffff81e87500 t nbio_v7_7_enable_doorbell_selfring_aperture +ffffffff81e87660 t nbio_v7_7_ih_doorbell_range +ffffffff81e87770 t nbio_v7_7_update_medium_grain_clock_gating +ffffffff81e878b0 t nbio_v7_7_update_medium_grain_light_sleep +ffffffff81e87ac0 t nbio_v7_7_get_clockgating_state +ffffffff81e87bd0 t nbio_v7_7_ih_control +ffffffff81e87d20 t nbio_v7_7_init_registers +ffffffff81e87e20 t nbio_v7_7_remap_hdp_registers +ffffffff81e88000 T nv_grbm_select +ffffffff81e880a0 T nv_set_virt_ops +ffffffff81e880e0 t nv_common_early_init +ffffffff81e884d0 t nv_common_late_init +ffffffff81e88540 t nv_common_sw_init +ffffffff81e88580 t nv_common_sw_fini +ffffffff81e885b0 t nv_common_hw_init +ffffffff81e886c0 t nv_common_hw_fini +ffffffff81e88720 t nv_common_suspend +ffffffff81e88780 t nv_common_resume +ffffffff81e887c0 t nv_common_is_idle +ffffffff81e887f0 t nv_common_wait_for_idle +ffffffff81e88820 t nv_common_soft_reset +ffffffff81e88850 t nv_common_set_clockgating_state +ffffffff81e88920 t nv_common_set_powergating_state +ffffffff81e88950 t nv_common_get_clockgating_state +ffffffff81e889c0 t nv_pcie_rreg +ffffffff81e88a20 t nv_pcie_wreg +ffffffff81e88a80 t nv_pcie_rreg64 +ffffffff81e88ae0 t nv_pcie_wreg64 +ffffffff81e88b40 t nv_didt_rreg +ffffffff81e88be0 t nv_didt_wreg +ffffffff81e88c60 t nv_read_disabled_bios +ffffffff81e88c90 t nv_read_register +ffffffff81e88d70 t nv_vga_set_state +ffffffff81e88da0 t nv_asic_reset +ffffffff81e88ee0 t nv_asic_reset_method +ffffffff81e88fd0 t nv_get_xclk +ffffffff81e89000 t nv_set_uvd_clocks +ffffffff81e89030 t nv_set_vce_clocks +ffffffff81e89060 t nv_get_config_memsize +ffffffff81e89080 t nv_need_full_reset +ffffffff81e890b0 t nv_init_doorbell_index +ffffffff81e891e0 t nv_need_reset_on_init +ffffffff81e89270 t nv_get_pcie_replay_count +ffffffff81e892a0 t nv_pre_asic_init +ffffffff81e892d0 t nv_update_umd_stable_pstate +ffffffff81e89390 t nv_query_video_codecs +ffffffff81e8a000 T psp_v10_0_set_psp_funcs +ffffffff81e8a030 t psp_v10_0_init_microcode +ffffffff81e8a2a0 t psp_v10_0_ring_init +ffffffff81e8a320 t psp_v10_0_ring_create +ffffffff81e8a630 t psp_v10_0_ring_stop +ffffffff81e8a820 t psp_v10_0_ring_destroy +ffffffff81e8a8a0 t psp_v10_0_mode1_reset +ffffffff81e8a8f0 t psp_v10_0_ring_get_wptr +ffffffff81e8a950 t psp_v10_0_ring_set_wptr +ffffffff81e8b000 T psp_v11_0_set_psp_funcs +ffffffff81e8b030 t psp_v11_0_init_microcode +ffffffff81e8b450 t psp_v11_0_bootloader_load_kdb +ffffffff81e8b470 t psp_v11_0_bootloader_load_spl +ffffffff81e8b490 t psp_v11_0_bootloader_load_sysdrv +ffffffff81e8b4b0 t psp_v11_0_bootloader_load_sos +ffffffff81e8b800 t psp_v11_0_ring_init +ffffffff81e8b880 t psp_v11_0_ring_create +ffffffff81e8bf10 t psp_v11_0_ring_stop +ffffffff81e8c130 t psp_v11_0_ring_destroy +ffffffff81e8c1b0 t psp_v11_0_mode1_reset +ffffffff81e8c2b0 t psp_v11_0_memory_training +ffffffff81e8c730 t psp_v11_0_ring_get_wptr +ffffffff81e8c780 t psp_v11_0_ring_set_wptr +ffffffff81e8c8c0 t psp_v11_0_load_usbc_pd_fw +ffffffff81e8cab0 t psp_v11_0_read_usbc_pd_fw +ffffffff81e8cbd0 t psp_v11_0_bootloader_load_component +ffffffff81e8cd90 t psp_v11_0_wait_for_bootloader +ffffffff81e8cf60 t psp_v11_0_memory_training_send_msg +ffffffff81e8e000 T psp_v11_0_8_set_psp_funcs +ffffffff81e8e030 t psp_v11_0_8_ring_init +ffffffff81e8e0b0 t psp_v11_0_8_ring_create +ffffffff81e8e740 t psp_v11_0_8_ring_stop +ffffffff81e8ead0 t psp_v11_0_8_ring_destroy +ffffffff81e8eb50 t psp_v11_0_8_ring_get_wptr +ffffffff81e8ebc0 t psp_v11_0_8_ring_set_wptr +ffffffff81e8f000 T psp_v12_0_set_psp_funcs +ffffffff81e8f030 t psp_v12_0_init_microcode +ffffffff81e8f2a0 t psp_v12_0_bootloader_load_sysdrv +ffffffff81e8f5c0 t psp_v12_0_bootloader_load_sos +ffffffff81e8f920 t psp_v12_0_ring_init +ffffffff81e8ff00 t psp_v12_0_ring_create +ffffffff81e90460 t psp_v12_0_ring_stop +ffffffff81e90680 t psp_v12_0_ring_destroy +ffffffff81e90700 t psp_v12_0_mode1_reset +ffffffff81e90800 t psp_v12_0_ring_get_wptr +ffffffff81e90870 t psp_v12_0_ring_set_wptr +ffffffff81e91000 T psp_v13_0_set_psp_funcs +ffffffff81e91030 t psp_v13_0_init_microcode +ffffffff81e91160 t psp_v13_0_bootloader_load_kdb +ffffffff81e91180 t psp_v13_0_bootloader_load_spl +ffffffff81e911a0 t psp_v13_0_bootloader_load_sysdrv +ffffffff81e911c0 t psp_v13_0_bootloader_load_soc_drv +ffffffff81e911e0 t psp_v13_0_bootloader_load_intf_drv +ffffffff81e91200 t psp_v13_0_bootloader_load_dbg_drv +ffffffff81e91220 t psp_v13_0_bootloader_load_ras_drv +ffffffff81e91240 t psp_v13_0_bootloader_load_sos +ffffffff81e915a0 t psp_v13_0_ring_init +ffffffff81e91620 t psp_v13_0_ring_create +ffffffff81e91cb0 t psp_v13_0_ring_stop +ffffffff81e92040 t psp_v13_0_ring_destroy +ffffffff81e920c0 t psp_v13_0_memory_training +ffffffff81e92500 t psp_v13_0_ring_get_wptr +ffffffff81e92570 t psp_v13_0_ring_set_wptr +ffffffff81e92670 t psp_v13_0_load_usbc_pd_fw +ffffffff81e92860 t psp_v13_0_read_usbc_pd_fw +ffffffff81e92980 t psp_v13_0_update_spirom +ffffffff81e92b50 t psp_v13_0_vbflash_status +ffffffff81e92bb0 t psp_v13_0_bootloader_load_component +ffffffff81e92d80 t psp_v13_0_wait_for_bootloader +ffffffff81e92f50 t psp_v13_0_memory_training_send_msg +ffffffff81e930b0 t psp_v13_0_exec_spi_cmd +ffffffff81e94000 T psp_v13_0_4_set_psp_funcs +ffffffff81e94030 t psp_v13_0_4_init_microcode +ffffffff81e94100 t psp_v13_0_4_bootloader_load_kdb +ffffffff81e94120 t psp_v13_0_4_bootloader_load_spl +ffffffff81e94140 t psp_v13_0_4_bootloader_load_sysdrv +ffffffff81e94160 t psp_v13_0_4_bootloader_load_soc_drv +ffffffff81e94180 t psp_v13_0_4_bootloader_load_intf_drv +ffffffff81e941a0 t psp_v13_0_4_bootloader_load_dbg_drv +ffffffff81e941c0 t psp_v13_0_4_bootloader_load_sos +ffffffff81e94530 t psp_v13_0_4_ring_init +ffffffff81e945b0 t psp_v13_0_4_ring_create +ffffffff81e94c50 t psp_v13_0_4_ring_stop +ffffffff81e94fe0 t psp_v13_0_4_ring_destroy +ffffffff81e95060 t psp_v13_0_4_ring_get_wptr +ffffffff81e950d0 t psp_v13_0_4_ring_set_wptr +ffffffff81e951d0 t psp_v13_0_4_bootloader_load_component +ffffffff81e953a0 t psp_v13_0_4_wait_for_bootloader +ffffffff81e96000 T psp_v3_1_set_psp_funcs +ffffffff81e96030 t psp_v3_1_init_microcode +ffffffff81e960f0 t psp_v3_1_bootloader_load_sysdrv +ffffffff81e96410 t psp_v3_1_bootloader_load_sos +ffffffff81e96770 t psp_v3_1_ring_init +ffffffff81e967f0 t psp_v3_1_ring_create +ffffffff81e972f0 t psp_v3_1_ring_stop +ffffffff81e97510 t psp_v3_1_ring_destroy +ffffffff81e97590 t psp_v3_1_smu_reload_quirk +ffffffff81e975e0 t psp_v3_1_mode1_reset +ffffffff81e976e0 t psp_v3_1_ring_get_wptr +ffffffff81e97730 t psp_v3_1_ring_set_wptr +ffffffff81e98000 t sdma_v2_4_early_init +ffffffff81e980e0 t sdma_v2_4_sw_init +ffffffff81e98470 t sdma_v2_4_sw_fini +ffffffff81e98550 t sdma_v2_4_hw_init +ffffffff81e98910 t sdma_v2_4_hw_fini +ffffffff81e98950 t sdma_v2_4_suspend +ffffffff81e98990 t sdma_v2_4_resume +ffffffff81e989a0 t sdma_v2_4_is_idle +ffffffff81e989e0 t sdma_v2_4_wait_for_idle +ffffffff81e98a80 t sdma_v2_4_soft_reset +ffffffff81e98bc0 t sdma_v2_4_set_clockgating_state +ffffffff81e98bf0 t sdma_v2_4_set_powergating_state +ffffffff81e98c20 t sdma_v2_4_ring_get_rptr +ffffffff81e98c60 t sdma_v2_4_ring_get_wptr +ffffffff81e98cc0 t sdma_v2_4_ring_set_wptr +ffffffff81e98d00 t sdma_v2_4_ring_emit_ib +ffffffff81e98fb0 t sdma_v2_4_ring_emit_fence +ffffffff81e993b0 t sdma_v2_4_ring_emit_pipeline_sync +ffffffff81e99630 t sdma_v2_4_ring_emit_vm_flush +ffffffff81e998b0 t sdma_v2_4_ring_emit_hdp_flush +ffffffff81e99b30 t sdma_v2_4_ring_test_ring +ffffffff81e99e10 t sdma_v2_4_ring_test_ib +ffffffff81e99ff0 t sdma_v2_4_ring_insert_nop +ffffffff81e9a120 t sdma_v2_4_ring_pad_ib +ffffffff81e9a250 t sdma_v2_4_ring_emit_wreg +ffffffff81e9a3a0 t sdma_v2_4_emit_copy_buffer +ffffffff81e9a460 t sdma_v2_4_emit_fill_buffer +ffffffff81e9a4f0 t sdma_v2_4_vm_copy_pte +ffffffff81e9a5b0 t sdma_v2_4_vm_write_pte +ffffffff81e9a680 t sdma_v2_4_vm_set_pte_pde +ffffffff81e9a780 t sdma_v2_4_set_trap_irq_state +ffffffff81e9a840 t sdma_v2_4_process_trap_irq +ffffffff81e9a8e0 t sdma_v2_4_process_illegal_inst_irq +ffffffff81e9a960 t sdma_v2_4_enable +ffffffff81e9b000 t sdma_v3_0_early_init +ffffffff81e9b150 t sdma_v3_0_sw_init +ffffffff81e9b500 t sdma_v3_0_sw_fini +ffffffff81e9b5e0 t sdma_v3_0_hw_init +ffffffff81e9b710 t sdma_v3_0_hw_fini +ffffffff81e9b760 t sdma_v3_0_suspend +ffffffff81e9b7b0 t sdma_v3_0_resume +ffffffff81e9b7c0 t sdma_v3_0_is_idle +ffffffff81e9b800 t sdma_v3_0_wait_for_idle +ffffffff81e9b8a0 t sdma_v3_0_check_soft_reset +ffffffff81e9b900 t sdma_v3_0_pre_soft_reset +ffffffff81e9b950 t sdma_v3_0_soft_reset +ffffffff81e9ba20 t sdma_v3_0_post_soft_reset +ffffffff81e9ba70 t sdma_v3_0_set_clockgating_state +ffffffff81e9bcd0 t sdma_v3_0_set_powergating_state +ffffffff81e9bd00 t sdma_v3_0_get_clockgating_state +ffffffff81e9bd80 t sdma_v3_0_ring_get_rptr +ffffffff81e9bdc0 t sdma_v3_0_ring_get_wptr +ffffffff81e9be40 t sdma_v3_0_ring_set_wptr +ffffffff81e9bef0 t sdma_v3_0_ring_emit_ib +ffffffff81e9c1a0 t sdma_v3_0_ring_emit_fence +ffffffff81e9c5a0 t sdma_v3_0_ring_emit_pipeline_sync +ffffffff81e9c820 t sdma_v3_0_ring_emit_vm_flush +ffffffff81e9caa0 t sdma_v3_0_ring_emit_hdp_flush +ffffffff81e9cd20 t sdma_v3_0_ring_test_ring +ffffffff81e9d000 t sdma_v3_0_ring_test_ib +ffffffff81e9d1e0 t sdma_v3_0_ring_insert_nop +ffffffff81e9d310 t sdma_v3_0_ring_pad_ib +ffffffff81e9d440 t sdma_v3_0_ring_emit_wreg +ffffffff81e9d590 t sdma_v3_0_emit_copy_buffer +ffffffff81e9d650 t sdma_v3_0_emit_fill_buffer +ffffffff81e9d6e0 t sdma_v3_0_vm_copy_pte +ffffffff81e9d7a0 t sdma_v3_0_vm_write_pte +ffffffff81e9d870 t sdma_v3_0_vm_set_pte_pde +ffffffff81e9d970 t sdma_v3_0_set_trap_irq_state +ffffffff81e9da30 t sdma_v3_0_process_trap_irq +ffffffff81e9dad0 t sdma_v3_0_process_illegal_inst_irq +ffffffff81e9db50 t sdma_v3_0_ctx_switch_enable +ffffffff81e9dce0 t sdma_v3_0_enable +ffffffff81e9de50 t sdma_v3_0_gfx_resume +ffffffff81e9f000 t sdma_v4_0_early_init +ffffffff81e9f580 t sdma_v4_0_late_init +ffffffff81e9f820 t sdma_v4_0_sw_init +ffffffff81e9fb90 t sdma_v4_0_sw_fini +ffffffff81e9fc50 t sdma_v4_0_hw_init +ffffffff81ea2bf0 t sdma_v4_0_hw_fini +ffffffff81ea2cb0 t sdma_v4_0_suspend +ffffffff81ea2d00 t sdma_v4_0_resume +ffffffff81ea2d80 t sdma_v4_0_is_idle +ffffffff81ea2eb0 t sdma_v4_0_wait_for_idle +ffffffff81ea3050 t sdma_v4_0_soft_reset +ffffffff81ea3080 t sdma_v4_0_set_clockgating_state +ffffffff81ea3580 t sdma_v4_0_set_powergating_state +ffffffff81ea3640 t sdma_v4_0_get_clockgating_state +ffffffff81ea36e0 t sdma_v4_0_query_ras_error_count +ffffffff81ea38b0 t sdma_v4_0_reset_ras_error_count +ffffffff81ea3a00 t sdma_v4_0_ring_get_rptr +ffffffff81ea3a60 t sdma_v4_0_ring_get_wptr +ffffffff81ea3c50 t sdma_v4_0_ring_set_wptr +ffffffff81ea3ed0 t sdma_v4_0_ring_emit_ib +ffffffff81ea4180 t sdma_v4_0_ring_emit_fence +ffffffff81ea45b0 t sdma_v4_0_ring_emit_pipeline_sync +ffffffff81ea4610 t sdma_v4_0_ring_emit_vm_flush +ffffffff81ea4630 t sdma_v4_0_ring_emit_hdp_flush +ffffffff81ea46d0 t sdma_v4_0_ring_test_ring +ffffffff81ea49b0 t sdma_v4_0_ring_test_ib +ffffffff81ea4b90 t sdma_v4_0_ring_insert_nop +ffffffff81ea4cc0 t sdma_v4_0_ring_pad_ib +ffffffff81ea4df0 t sdma_v4_0_ring_emit_wreg +ffffffff81ea4f40 t sdma_v4_0_ring_emit_reg_wait +ffffffff81ea4f90 t sdma_v4_0_wait_reg_mem +ffffffff81ea52c0 t sdma_v4_0_page_ring_get_wptr +ffffffff81ea5470 t sdma_v4_0_page_ring_set_wptr +ffffffff81ea5630 t sdma_v4_0_emit_copy_buffer +ffffffff81ea56f0 t sdma_v4_0_emit_fill_buffer +ffffffff81ea5780 t sdma_v4_0_vm_copy_pte +ffffffff81ea5840 t sdma_v4_0_vm_write_pte +ffffffff81ea5910 t sdma_v4_0_vm_set_pte_pde +ffffffff81ea5a10 t sdma_v4_0_set_trap_irq_state +ffffffff81ea5bb0 t sdma_v4_0_process_trap_irq +ffffffff81ea5cf0 t sdma_v4_0_process_illegal_inst_irq +ffffffff81ea5e10 t sdma_v4_0_set_ecc_irq_state +ffffffff81ea5fb0 t sdma_v4_0_process_vm_hole_irq +ffffffff81ea60f0 t sdma_v4_0_process_doorbell_invalid_irq +ffffffff81ea6230 t sdma_v4_0_process_pool_timeout_irq +ffffffff81ea6370 t sdma_v4_0_process_srbm_write_irq +ffffffff81ea64b0 t sdma_v4_0_process_ras_data_cb +ffffffff81ea6530 t sdma_v4_0_ctx_switch_enable +ffffffff81ea6be0 t sdma_v4_0_enable +ffffffff81ea7180 t sdma_v4_0_gfx_enable +ffffffff81ea8000 t sdma_v4_4_query_ras_error_count +ffffffff81ea8270 t sdma_v4_4_reset_ras_error_count +ffffffff81ea9000 t sdma_v5_0_early_init +ffffffff81ea9170 t sdma_v5_0_sw_init +ffffffff81ea9410 t sdma_v5_0_sw_fini +ffffffff81ea94a0 t sdma_v5_0_hw_init +ffffffff81eaa750 t sdma_v5_0_hw_fini +ffffffff81eaa7b0 t sdma_v5_0_suspend +ffffffff81eaa810 t sdma_v5_0_resume +ffffffff81eaa820 t sdma_v5_0_is_idle +ffffffff81eaa8b0 t sdma_v5_0_wait_for_idle +ffffffff81eaa970 t sdma_v5_0_soft_reset +ffffffff81eaa9a0 t sdma_v5_0_set_clockgating_state +ffffffff81eaaba0 t sdma_v5_0_set_powergating_state +ffffffff81eaabd0 t sdma_v5_0_get_clockgating_state +ffffffff81eaac70 t sdma_v5_0_ring_get_rptr +ffffffff81eaacd0 t sdma_v5_0_ring_get_wptr +ffffffff81eaae70 t sdma_v5_0_ring_set_wptr +ffffffff81eab1d0 t sdma_v5_0_ring_emit_ib +ffffffff81eab490 t sdma_v5_0_ring_emit_fence +ffffffff81eab900 t sdma_v5_0_ring_emit_pipeline_sync +ffffffff81eabb80 t sdma_v5_0_ring_emit_vm_flush +ffffffff81eabba0 t sdma_v5_0_ring_emit_hdp_flush +ffffffff81eabe40 t sdma_v5_0_ring_test_ring +ffffffff81eac200 t sdma_v5_0_ring_test_ib +ffffffff81eac530 t sdma_v5_0_ring_insert_nop +ffffffff81eac660 t sdma_v5_0_ring_pad_ib +ffffffff81eac790 t sdma_v5_0_ring_init_cond_exec +ffffffff81eac9c0 t sdma_v5_0_ring_patch_cond_exec +ffffffff81eaca80 t sdma_v5_0_ring_emit_wreg +ffffffff81eacbd0 t sdma_v5_0_ring_emit_reg_wait +ffffffff81eace50 t sdma_v5_0_ring_emit_reg_write_reg_wait +ffffffff81eaced0 t sdma_v5_0_ring_preempt_ib +ffffffff81ead010 t sdma_v5_0_ring_emit_mem_sync +ffffffff81ead220 t sdma_v5_0_emit_copy_buffer +ffffffff81ead2e0 t sdma_v5_0_emit_fill_buffer +ffffffff81ead370 t sdma_v5_0_vm_copy_pte +ffffffff81ead430 t sdma_v5_0_vm_write_pte +ffffffff81ead500 t sdma_v5_0_vm_set_pte_pde +ffffffff81ead600 t sdma_v5_0_set_trap_irq_state +ffffffff81ead690 t sdma_v5_0_process_trap_irq +ffffffff81ead7a0 t sdma_v5_0_process_illegal_inst_irq +ffffffff81ead7d0 t sdma_v5_0_mqd_init +ffffffff81ead8b0 t sdma_v5_0_ctx_switch_enable +ffffffff81eadbb0 t sdma_v5_0_enable +ffffffff81eae000 t sdma_v5_2_early_init +ffffffff81eae170 t sdma_v5_2_sw_init +ffffffff81eae3a0 t sdma_v5_2_sw_fini +ffffffff81eae430 t sdma_v5_2_hw_init +ffffffff81eae770 t sdma_v5_2_hw_fini +ffffffff81eae7d0 t sdma_v5_2_suspend +ffffffff81eae830 t sdma_v5_2_resume +ffffffff81eae840 t sdma_v5_2_is_idle +ffffffff81eae900 t sdma_v5_2_wait_for_idle +ffffffff81eaea00 t sdma_v5_2_soft_reset +ffffffff81eaeca0 t sdma_v5_2_set_clockgating_state +ffffffff81eaefc0 t sdma_v5_2_set_powergating_state +ffffffff81eaeff0 t sdma_v5_2_get_clockgating_state +ffffffff81eaf080 t sdma_v5_2_ring_get_rptr +ffffffff81eaf0e0 t sdma_v5_2_ring_get_wptr +ffffffff81eaf220 t sdma_v5_2_ring_set_wptr +ffffffff81eaf3e0 t sdma_v5_2_ring_emit_ib +ffffffff81eaf6a0 t sdma_v5_2_ring_emit_fence +ffffffff81eafb10 t sdma_v5_2_ring_emit_pipeline_sync +ffffffff81eafd90 t sdma_v5_2_ring_emit_vm_flush +ffffffff81eafdb0 t sdma_v5_2_ring_emit_hdp_flush +ffffffff81eb0050 t sdma_v5_2_ring_test_ring +ffffffff81eb0410 t sdma_v5_2_ring_test_ib +ffffffff81eb0740 t sdma_v5_2_ring_insert_nop +ffffffff81eb0870 t sdma_v5_2_ring_pad_ib +ffffffff81eb09a0 t sdma_v5_2_ring_init_cond_exec +ffffffff81eb0bd0 t sdma_v5_2_ring_patch_cond_exec +ffffffff81eb0c90 t sdma_v5_2_ring_emit_wreg +ffffffff81eb0de0 t sdma_v5_2_ring_emit_reg_wait +ffffffff81eb1060 t sdma_v5_2_ring_emit_reg_write_reg_wait +ffffffff81eb10e0 t sdma_v5_2_ring_preempt_ib +ffffffff81eb1250 t sdma_v5_2_ring_emit_mem_sync +ffffffff81eb1460 t sdma_v5_2_emit_copy_buffer +ffffffff81eb1520 t sdma_v5_2_emit_fill_buffer +ffffffff81eb15b0 t sdma_v5_2_vm_copy_pte +ffffffff81eb1670 t sdma_v5_2_vm_write_pte +ffffffff81eb1740 t sdma_v5_2_vm_set_pte_pde +ffffffff81eb1840 t sdma_v5_2_set_trap_irq_state +ffffffff81eb1900 t sdma_v5_2_process_trap_irq +ffffffff81eb1a40 t sdma_v5_2_process_illegal_inst_irq +ffffffff81eb1a70 t sdma_v5_2_mqd_init +ffffffff81eb1b50 t sdma_v5_2_ctx_switch_enable +ffffffff81eb1f50 t sdma_v5_2_enable +ffffffff81eb2360 t sdma_v5_2_gfx_resume +ffffffff81eb4000 t sdma_v6_0_early_init +ffffffff81eb4140 t sdma_v6_0_sw_init +ffffffff81eb4320 t sdma_v6_0_sw_fini +ffffffff81eb43b0 t sdma_v6_0_hw_init +ffffffff81eb43c0 t sdma_v6_0_hw_fini +ffffffff81eb4410 t sdma_v6_0_suspend +ffffffff81eb4460 t sdma_v6_0_resume +ffffffff81eb4470 t sdma_v6_0_is_idle +ffffffff81eb4500 t sdma_v6_0_wait_for_idle +ffffffff81eb45c0 t sdma_v6_0_check_soft_reset +ffffffff81eb4680 t sdma_v6_0_soft_reset +ffffffff81eb4b20 t sdma_v6_0_set_clockgating_state +ffffffff81eb4b50 t sdma_v6_0_set_powergating_state +ffffffff81eb4b80 t sdma_v6_0_get_clockgating_state +ffffffff81eb4bb0 t sdma_v6_0_ring_get_rptr +ffffffff81eb4c10 t sdma_v6_0_ring_get_wptr +ffffffff81eb4c80 t sdma_v6_0_ring_set_wptr +ffffffff81eb4fe0 t sdma_v6_0_ring_emit_ib +ffffffff81eb52a0 t sdma_v6_0_ring_emit_fence +ffffffff81eb5710 t sdma_v6_0_ring_emit_pipeline_sync +ffffffff81eb5990 t sdma_v6_0_ring_emit_vm_flush +ffffffff81eb59b0 t sdma_v6_0_ring_emit_hdp_flush +ffffffff81eb5c50 t sdma_v6_0_ring_test_ring +ffffffff81eb6010 t sdma_v6_0_ring_test_ib +ffffffff81eb6340 t sdma_v6_0_ring_insert_nop +ffffffff81eb6470 t sdma_v6_0_ring_pad_ib +ffffffff81eb65a0 t sdma_v6_0_ring_init_cond_exec +ffffffff81eb67d0 t sdma_v6_0_ring_patch_cond_exec +ffffffff81eb6890 t sdma_v6_0_ring_emit_wreg +ffffffff81eb69e0 t sdma_v6_0_ring_emit_reg_wait +ffffffff81eb6c60 t sdma_v6_0_ring_emit_reg_write_reg_wait +ffffffff81eb6ce0 t sdma_v6_0_ring_preempt_ib +ffffffff81eb6e30 t sdma_v6_0_ring_emit_mem_sync +ffffffff81eb7040 t sdma_v6_0_emit_copy_buffer +ffffffff81eb7100 t sdma_v6_0_emit_fill_buffer +ffffffff81eb7190 t sdma_v6_0_vm_copy_pte +ffffffff81eb7250 t sdma_v6_0_vm_write_pte +ffffffff81eb7320 t sdma_v6_0_vm_set_pte_pde +ffffffff81eb7420 t sdma_v6_0_set_trap_irq_state +ffffffff81eb74b0 t sdma_v6_0_process_trap_irq +ffffffff81eb75e0 t sdma_v6_0_process_illegal_inst_irq +ffffffff81eb7610 t sdma_v6_0_mqd_init +ffffffff81eb7730 t sdma_v6_0_start +ffffffff81eb79b0 t sdma_v6_0_enable +ffffffff81eb7b30 t sdma_v6_0_gfx_resume +ffffffff81eb8bb0 t sdma_v6_0_gfx_stop +ffffffff81eb9000 T sienna_cichlid_reset_init +ffffffff81eb90c0 t sienna_cichlid_async_reset +ffffffff81eb9120 t sienna_cichlid_get_reset_handler +ffffffff81eb9180 T sienna_cichlid_reset_fini +ffffffff81eb91e0 t sienna_cichlid_mode2_prepare_hwcontext +ffffffff81eb9330 t sienna_cichlid_mode2_perform_reset +ffffffff81eb93b0 t sienna_cichlid_mode2_restore_hwcontext +ffffffff81eb96a0 t sienna_cichlid_mode2_reset +ffffffff81eba000 T smu_v11_0_i2c_control_init +ffffffff81eba0d0 T smu_v11_0_i2c_control_fini +ffffffff81eba110 t smu_v11_0_i2c_xfer +ffffffff81ebb1f0 t smu_v11_0_i2c_func +ffffffff81ebb220 t smu_v11_0_i2c_enable +ffffffff81ebb360 t smu_v11_0_i2c_abort +ffffffff81ebb460 t lock_bus +ffffffff81ebb500 t trylock_bus +ffffffff81ebb550 t unlock_bus +ffffffff81ebc000 t smuio_v11_0_get_rom_index_offset +ffffffff81ebc040 t smuio_v11_0_get_rom_data_offset +ffffffff81ebc080 t smuio_v11_0_update_rom_clock_gating +ffffffff81ebc1c0 t smuio_v11_0_get_clock_gating_state +ffffffff81ebd000 t smuio_v11_0_6_get_rom_index_offset +ffffffff81ebd040 t smuio_v11_0_6_get_rom_data_offset +ffffffff81ebd080 t smuio_v11_0_6_update_rom_clock_gating +ffffffff81ebd1c0 t smuio_v11_0_6_get_clock_gating_state +ffffffff81ebe000 t smuio_v13_0_get_rom_index_offset +ffffffff81ebe040 t smuio_v13_0_get_rom_data_offset +ffffffff81ebe080 t smuio_v13_0_update_rom_clock_gating +ffffffff81ebe1c0 t smuio_v13_0_get_clock_gating_state +ffffffff81ebe260 t smuio_v13_0_get_die_id +ffffffff81ebe2e0 t smuio_v13_0_get_socket_id +ffffffff81ebe360 t smuio_v13_0_is_host_gpu_xgmi_supported +ffffffff81ebf000 t smuio_v13_0_6_get_rom_index_offset +ffffffff81ebf040 t smuio_v13_0_6_get_rom_data_offset +ffffffff81ec0000 t smuio_v9_0_get_rom_index_offset +ffffffff81ec0040 t smuio_v9_0_get_rom_data_offset +ffffffff81ec0080 t smuio_v9_0_update_rom_clock_gating +ffffffff81ec01c0 t smuio_v9_0_get_clock_gating_state +ffffffff81ec1000 T soc15_grbm_select +ffffffff81ec1080 T soc15_program_register_sequence +ffffffff81ec1280 T soc15_set_virt_ops +ffffffff81ec12f0 t soc15_common_early_init +ffffffff81ec1680 t soc15_common_late_init +ffffffff81ec16c0 t soc15_common_sw_init +ffffffff81ec1720 t soc15_common_sw_fini +ffffffff81ec1770 t soc15_common_hw_init +ffffffff81ec18a0 t soc15_common_hw_fini +ffffffff81ec1970 t soc15_common_suspend +ffffffff81ec19b0 t soc15_common_resume +ffffffff81ec19f0 t soc15_common_is_idle +ffffffff81ec1a20 t soc15_common_wait_for_idle +ffffffff81ec1a50 t soc15_common_soft_reset +ffffffff81ec1a80 t soc15_common_set_clockgating_state +ffffffff81ec1dc0 t soc15_common_set_powergating_state +ffffffff81ec1df0 t soc15_common_get_clockgating_state +ffffffff81ec1ed0 t soc15_pcie_rreg +ffffffff81ec1f30 t soc15_pcie_wreg +ffffffff81ec1f90 t soc15_pcie_rreg64 +ffffffff81ec1ff0 t soc15_pcie_wreg64 +ffffffff81ec2050 t soc15_uvd_ctx_rreg +ffffffff81ec20f0 t soc15_uvd_ctx_wreg +ffffffff81ec2180 t soc15_didt_rreg +ffffffff81ec2220 t soc15_didt_wreg +ffffffff81ec22a0 t soc15_gc_cac_rreg +ffffffff81ec23c0 t soc15_gc_cac_wreg +ffffffff81ec24d0 t soc15_se_cac_rreg +ffffffff81ec25f0 t soc15_se_cac_wreg +ffffffff81ec2700 t soc15_read_disabled_bios +ffffffff81ec2730 t soc15_read_register +ffffffff81ec2830 t soc15_vga_set_state +ffffffff81ec2860 t soc15_asic_reset +ffffffff81ec2960 t soc15_asic_reset_method +ffffffff81ec2ae0 t soc15_get_xclk +ffffffff81ec2b30 t soc15_set_uvd_clocks +ffffffff81ec2b60 t soc15_set_vce_clocks +ffffffff81ec2b90 t soc15_get_config_memsize +ffffffff81ec2bb0 t soc15_need_full_reset +ffffffff81ec2be0 t soc15_get_pcie_usage +ffffffff81ec2d10 t soc15_need_reset_on_init +ffffffff81ec2db0 t soc15_get_pcie_replay_count +ffffffff81ec2e20 t soc15_supports_baco +ffffffff81ec2e80 t soc15_pre_asic_init +ffffffff81ec2e90 t soc15_query_video_codecs +ffffffff81ec2f40 t vega20_get_pcie_usage +ffffffff81ec4000 T soc21_grbm_select +ffffffff81ec4080 t soc21_common_early_init +ffffffff81ec42d0 t soc21_common_late_init +ffffffff81ec4300 t soc21_common_sw_init +ffffffff81ec4330 t soc21_common_sw_fini +ffffffff81ec4360 t soc21_common_hw_init +ffffffff81ec4430 t soc21_common_hw_fini +ffffffff81ec4490 t soc21_common_suspend +ffffffff81ec44f0 t soc21_common_resume +ffffffff81ec45c0 t soc21_common_is_idle +ffffffff81ec45f0 t soc21_common_wait_for_idle +ffffffff81ec4620 t soc21_common_soft_reset +ffffffff81ec4650 t soc21_common_set_clockgating_state +ffffffff81ec4700 t soc21_common_set_powergating_state +ffffffff81ec4760 t soc21_common_get_clockgating_state +ffffffff81ec47b0 t soc21_pcie_rreg +ffffffff81ec4810 t soc21_pcie_wreg +ffffffff81ec4870 t soc21_pcie_rreg64 +ffffffff81ec48d0 t soc21_pcie_wreg64 +ffffffff81ec4930 t soc21_didt_rreg +ffffffff81ec49d0 t soc21_didt_wreg +ffffffff81ec4a50 t soc21_read_disabled_bios +ffffffff81ec4a80 t soc21_read_register +ffffffff81ec4b70 t soc21_vga_set_state +ffffffff81ec4ba0 t soc21_asic_reset +ffffffff81ec4c80 t soc21_asic_reset_method +ffffffff81ec4d40 t soc21_get_xclk +ffffffff81ec4d70 t soc21_set_uvd_clocks +ffffffff81ec4da0 t soc21_set_vce_clocks +ffffffff81ec4dd0 t soc21_get_config_memsize +ffffffff81ec4df0 t soc21_need_full_reset +ffffffff81ec4e50 t soc21_init_doorbell_index +ffffffff81ec4f70 t soc21_need_reset_on_init +ffffffff81ec5000 t soc21_get_pcie_replay_count +ffffffff81ec5030 t soc21_pre_asic_init +ffffffff81ec5060 t soc21_update_umd_stable_pstate +ffffffff81ec50d0 t soc21_query_video_codecs +ffffffff81ec6000 t tonga_ih_early_init +ffffffff81ec6050 t tonga_ih_sw_init +ffffffff81ec60d0 t tonga_ih_sw_fini +ffffffff81ec6110 t tonga_ih_hw_init +ffffffff81ec6300 t tonga_ih_hw_fini +ffffffff81ec63a0 t tonga_ih_suspend +ffffffff81ec6440 t tonga_ih_resume +ffffffff81ec6480 t tonga_ih_is_idle +ffffffff81ec64d0 t tonga_ih_wait_for_idle +ffffffff81ec6570 t tonga_ih_check_soft_reset +ffffffff81ec65d0 t tonga_ih_pre_soft_reset +ffffffff81ec6680 t tonga_ih_soft_reset +ffffffff81ec6750 t tonga_ih_post_soft_reset +ffffffff81ec6790 t tonga_ih_set_clockgating_state +ffffffff81ec67c0 t tonga_ih_set_powergating_state +ffffffff81ec67f0 t tonga_ih_get_wptr +ffffffff81ec68e0 t tonga_ih_decode_iv +ffffffff81ec6960 t tonga_ih_set_rptr +ffffffff81ec7000 t umc_v6_0_init_registers +ffffffff81ec8000 t umc_v6_1_query_ras_error_count +ffffffff81ec84e0 t umc_v6_1_query_ras_error_address +ffffffff81ec87c0 t umc_v6_1_err_cnt_init +ffffffff81ec9000 t umc_v6_7_query_ras_error_count +ffffffff81ec9410 t umc_v6_7_query_ras_error_address +ffffffff81ec9590 t umc_v6_7_query_ras_poison_mode +ffffffff81ec95f0 t umc_v6_7_convert_error_address +ffffffff81ec98f0 t umc_v6_7_ecc_info_query_ras_error_count +ffffffff81ec9b30 t umc_v6_7_ecc_info_query_ras_error_address +ffffffff81eca000 t umc_v8_10_query_ras_error_count +ffffffff81eca280 t umc_v8_10_query_ras_error_address +ffffffff81eca5b0 t umc_v8_10_err_cnt_init +ffffffff81eca730 t umc_v8_10_query_ras_poison_mode +ffffffff81ecb000 t umc_v8_7_query_ras_error_count +ffffffff81ecb310 t umc_v8_7_query_ras_error_address +ffffffff81ecb4c0 t umc_v8_7_err_cnt_init +ffffffff81ecb610 t umc_v8_7_ecc_info_query_ras_error_count +ffffffff81ecb740 t umc_v8_7_ecc_info_query_ras_error_address +ffffffff81ecc000 t uvd_v5_0_early_init +ffffffff81ecc050 t uvd_v5_0_sw_init +ffffffff81ecc140 t uvd_v5_0_sw_fini +ffffffff81ecc190 t uvd_v5_0_hw_init +ffffffff81ecc6a0 t uvd_v5_0_hw_fini +ffffffff81ecc720 t uvd_v5_0_suspend +ffffffff81ecc820 t uvd_v5_0_resume +ffffffff81ecc870 t uvd_v5_0_is_idle +ffffffff81ecc8c0 t uvd_v5_0_wait_for_idle +ffffffff81ecc950 t uvd_v5_0_soft_reset +ffffffff81ecc9f0 t uvd_v5_0_set_clockgating_state +ffffffff81eccb90 t uvd_v5_0_set_powergating_state +ffffffff81eccbd0 t uvd_v5_0_get_clockgating_state +ffffffff81eccc50 t uvd_v5_0_ring_get_rptr +ffffffff81eccc90 t uvd_v5_0_ring_get_wptr +ffffffff81ecccd0 t uvd_v5_0_ring_set_wptr +ffffffff81eccd00 t uvd_v5_0_ring_emit_ib +ffffffff81eccf70 t uvd_v5_0_ring_emit_fence +ffffffff81ecd520 t uvd_v5_0_ring_test_ring +ffffffff81ecd6c0 t uvd_v5_0_ring_insert_nop +ffffffff81ecd820 t uvd_v5_0_set_interrupt_state +ffffffff81ecd850 t uvd_v5_0_process_interrupt +ffffffff81ecd8b0 t uvd_v5_0_stop +ffffffff81ecd9c0 t uvd_v5_0_start +ffffffff81ecf000 t uvd_v6_0_early_init +ffffffff81ecf140 t uvd_v6_0_sw_init +ffffffff81ecf460 t uvd_v6_0_sw_fini +ffffffff81ecf520 t uvd_v6_0_hw_init +ffffffff81ecfae0 t uvd_v6_0_hw_fini +ffffffff81ecfb60 t uvd_v6_0_suspend +ffffffff81ecfc60 t uvd_v6_0_resume +ffffffff81ecfcb0 t uvd_v6_0_is_idle +ffffffff81ecfd00 t uvd_v6_0_wait_for_idle +ffffffff81ecfd90 t uvd_v6_0_check_soft_reset +ffffffff81ecfe10 t uvd_v6_0_pre_soft_reset +ffffffff81ecfe50 t uvd_v6_0_soft_reset +ffffffff81ecff20 t uvd_v6_0_post_soft_reset +ffffffff81ecffc0 t uvd_v6_0_set_clockgating_state +ffffffff81ed0150 t uvd_v6_0_set_powergating_state +ffffffff81ed01c0 t uvd_v6_0_get_clockgating_state +ffffffff81ed0250 t uvd_v6_0_ring_get_rptr +ffffffff81ed0290 t uvd_v6_0_ring_get_wptr +ffffffff81ed02d0 t uvd_v6_0_ring_set_wptr +ffffffff81ed0300 t uvd_v6_0_ring_emit_ib +ffffffff81ed0660 t uvd_v6_0_ring_emit_fence +ffffffff81ed0c10 t uvd_v6_0_ring_emit_pipeline_sync +ffffffff81ed1010 t uvd_v6_0_ring_emit_vm_flush +ffffffff81ed1370 t uvd_v6_0_ring_emit_hdp_flush +ffffffff81ed13a0 t uvd_v6_0_ring_test_ring +ffffffff81ed1540 t uvd_v6_0_ring_insert_nop +ffffffff81ed16a0 t uvd_v6_0_ring_emit_wreg +ffffffff81ed1920 t uvd_v6_0_enc_ring_get_rptr +ffffffff81ed1980 t uvd_v6_0_enc_ring_get_wptr +ffffffff81ed19e0 t uvd_v6_0_enc_ring_set_wptr +ffffffff81ed1a20 t uvd_v6_0_enc_ring_emit_ib +ffffffff81ed1c60 t uvd_v6_0_enc_ring_emit_fence +ffffffff81ed1ea0 t uvd_v6_0_enc_ring_emit_pipeline_sync +ffffffff81ed2050 t uvd_v6_0_enc_ring_emit_vm_flush +ffffffff81ed2260 t uvd_v6_0_enc_ring_test_ring +ffffffff81ed23b0 t uvd_v6_0_enc_ring_test_ib +ffffffff81ed2970 t uvd_v6_0_enc_ring_insert_end +ffffffff81ed2a00 t uvd_v6_0_set_interrupt_state +ffffffff81ed2a30 t uvd_v6_0_process_interrupt +ffffffff81ed2b20 t uvd_v6_0_stop +ffffffff81ed2c30 t uvd_v6_0_start +ffffffff81ed4000 t uvd_v7_0_early_init +ffffffff81ed4270 t uvd_v7_0_sw_init +ffffffff81ed45f0 t uvd_v7_0_sw_fini +ffffffff81ed4700 t uvd_v7_0_hw_init +ffffffff81ed7610 t uvd_v7_0_hw_fini +ffffffff81ed7920 t uvd_v7_0_suspend +ffffffff81ed79d0 t uvd_v7_0_resume +ffffffff81ed7a20 t uvd_v7_0_set_clockgating_state +ffffffff81ed7a50 t uvd_v7_0_ring_get_rptr +ffffffff81ed7af0 t uvd_v7_0_ring_get_wptr +ffffffff81ed7b90 t uvd_v7_0_ring_set_wptr +ffffffff81ed7c10 t uvd_v7_0_ring_patch_cs_in_place +ffffffff81ed7c90 t uvd_v7_0_ring_emit_ib +ffffffff81ed8040 t uvd_v7_0_ring_emit_fence +ffffffff81ed86a0 t uvd_v7_0_ring_emit_vm_flush +ffffffff81ed8710 t uvd_v7_0_ring_emit_hdp_flush +ffffffff81ed8740 t uvd_v7_0_ring_test_ring +ffffffff81ed89d0 t uvd_v7_0_ring_insert_nop +ffffffff81ed8b70 t uvd_v7_0_ring_emit_wreg +ffffffff81ed8e40 t uvd_v7_0_ring_emit_reg_wait +ffffffff81ed91e0 t uvd_v7_0_enc_ring_get_rptr +ffffffff81ed92d0 t uvd_v7_0_enc_ring_get_wptr +ffffffff81ed93d0 t uvd_v7_0_enc_ring_set_wptr +ffffffff81ed94d0 t uvd_v7_0_enc_ring_emit_ib +ffffffff81ed9710 t uvd_v7_0_enc_ring_emit_fence +ffffffff81ed9950 t uvd_v7_0_enc_ring_emit_vm_flush +ffffffff81ed99c0 t uvd_v7_0_enc_ring_test_ring +ffffffff81ed9b20 t uvd_v7_0_enc_ring_test_ib +ffffffff81eda0e0 t uvd_v7_0_enc_ring_insert_end +ffffffff81eda170 t uvd_v7_0_enc_ring_emit_wreg +ffffffff81eda2d0 t uvd_v7_0_enc_ring_emit_reg_wait +ffffffff81eda490 t uvd_v7_0_set_interrupt_state +ffffffff81eda4c0 t uvd_v7_0_process_interrupt +ffffffff81edb000 t vce_v3_0_early_init +ffffffff81edb180 t vce_v3_0_sw_init +ffffffff81edb2d0 t vce_v3_0_sw_fini +ffffffff81edb320 t vce_v3_0_hw_init +ffffffff81edb400 t vce_v3_0_hw_fini +ffffffff81edb4f0 t vce_v3_0_suspend +ffffffff81edb5c0 t vce_v3_0_resume +ffffffff81edb610 t vce_v3_0_is_idle +ffffffff81edb680 t vce_v3_0_wait_for_idle +ffffffff81edb730 t vce_v3_0_check_soft_reset +ffffffff81edb830 t vce_v3_0_pre_soft_reset +ffffffff81edb8d0 t vce_v3_0_soft_reset +ffffffff81edb9a0 t vce_v3_0_post_soft_reset +ffffffff81edbb00 t vce_v3_0_set_clockgating_state +ffffffff81edbdf0 t vce_v3_0_set_powergating_state +ffffffff81edc640 t vce_v3_0_get_clockgating_state +ffffffff81edc700 t vce_v3_0_ring_get_rptr +ffffffff81edc7d0 t vce_v3_0_ring_get_wptr +ffffffff81edc8a0 t vce_v3_0_ring_set_wptr +ffffffff81edc960 t vce_v3_0_ring_emit_ib +ffffffff81edcba0 t vce_v3_0_emit_pipeline_sync +ffffffff81edcd50 t vce_v3_0_emit_vm_flush +ffffffff81edcfc0 t vce_v3_0_set_interrupt_state +ffffffff81edd030 t vce_v3_0_process_interrupt +ffffffff81edd0f0 t vce_v3_0_stop +ffffffff81ede000 t vce_v4_0_early_init +ffffffff81ede0b0 t vce_v4_0_sw_init +ffffffff81ede2e0 t vce_v4_0_sw_fini +ffffffff81ede360 t vce_v4_0_hw_init +ffffffff81edeb40 t vce_v4_0_hw_fini +ffffffff81edebe0 t vce_v4_0_suspend +ffffffff81edee00 t vce_v4_0_resume +ffffffff81edeeb0 t vce_v4_0_set_clockgating_state +ffffffff81edeee0 t vce_v4_0_set_powergating_state +ffffffff81edefc0 t vce_v4_0_ring_get_rptr +ffffffff81edf030 t vce_v4_0_ring_get_wptr +ffffffff81edf0c0 t vce_v4_0_ring_set_wptr +ffffffff81edf150 t vce_v4_0_ring_emit_ib +ffffffff81edf390 t vce_v4_0_ring_emit_fence +ffffffff81edf5d0 t vce_v4_0_emit_vm_flush +ffffffff81edf640 t vce_v4_0_ring_insert_end +ffffffff81edf6d0 t vce_v4_0_emit_wreg +ffffffff81edf830 t vce_v4_0_emit_reg_wait +ffffffff81edf9f0 t vce_v4_0_set_interrupt_state +ffffffff81edfa80 t vce_v4_0_process_interrupt +ffffffff81edfb20 t vce_v4_0_start +ffffffff81ee0500 t vce_v4_0_stop +ffffffff81ee1000 T vcn_dec_sw_ring_emit_fence +ffffffff81ee1240 T vcn_dec_sw_ring_insert_end +ffffffff81ee12d0 T vcn_dec_sw_ring_emit_ib +ffffffff81ee1510 T vcn_dec_sw_ring_emit_reg_wait +ffffffff81ee16d0 T vcn_dec_sw_ring_emit_vm_flush +ffffffff81ee1740 T vcn_dec_sw_ring_emit_wreg +ffffffff81ee2000 T vcn_v1_0_set_pg_for_begin_use +ffffffff81ee2150 T vcn_v1_0_ring_end_use +ffffffff81ee21c0 t vcn_v1_0_early_init +ffffffff81ee2340 t vcn_v1_0_sw_init +ffffffff81ee25e0 t vcn_v1_0_sw_fini +ffffffff81ee2640 t vcn_v1_0_hw_init +ffffffff81ee2720 t vcn_v1_0_hw_fini +ffffffff81ee2820 t vcn_v1_0_suspend +ffffffff81ee2890 t vcn_v1_0_resume +ffffffff81ee2980 t vcn_v1_0_is_idle +ffffffff81ee2a10 t vcn_v1_0_wait_for_idle +ffffffff81ee2b00 t vcn_v1_0_set_clockgating_state +ffffffff81ee2bb0 t vcn_v1_0_set_powergating_state +ffffffff81ee3540 t vcn_v1_0_dec_ring_get_rptr +ffffffff81ee35d0 t vcn_v1_0_dec_ring_get_wptr +ffffffff81ee3660 t vcn_v1_0_dec_ring_set_wptr +ffffffff81ee3770 t vcn_v1_0_ring_patch_cs_in_place +ffffffff81ee3940 t vcn_v1_0_dec_ring_emit_ib +ffffffff81ee3cd0 t vcn_v1_0_dec_ring_emit_fence +ffffffff81ee4300 t vcn_v1_0_dec_ring_emit_vm_flush +ffffffff81ee4370 t vcn_v1_0_dec_ring_insert_nop +ffffffff81ee4500 t vcn_v1_0_dec_ring_insert_start +ffffffff81ee46e0 t vcn_v1_0_dec_ring_insert_end +ffffffff81ee47f0 t vcn_v1_0_ring_begin_use +ffffffff81ee4890 t vcn_v1_0_dec_ring_emit_wreg +ffffffff81ee4b40 t vcn_v1_0_dec_ring_emit_reg_wait +ffffffff81ee4ec0 t vcn_v1_0_enc_ring_get_rptr +ffffffff81ee4f90 t vcn_v1_0_enc_ring_get_wptr +ffffffff81ee5060 t vcn_v1_0_enc_ring_set_wptr +ffffffff81ee5120 t vcn_v1_0_enc_ring_emit_ib +ffffffff81ee5360 t vcn_v1_0_enc_ring_emit_fence +ffffffff81ee55a0 t vcn_v1_0_enc_ring_emit_vm_flush +ffffffff81ee5610 t vcn_v1_0_enc_ring_insert_end +ffffffff81ee56a0 t vcn_v1_0_enc_ring_emit_wreg +ffffffff81ee5800 t vcn_v1_0_enc_ring_emit_reg_wait +ffffffff81ee59c0 t vcn_v1_0_set_interrupt_state +ffffffff81ee59f0 t vcn_v1_0_process_interrupt +ffffffff81ee5aa0 t vcn_v1_0_idle_work_handler +ffffffff81ee5c30 t vcn_v1_0_pause_dpg_mode +ffffffff81ee6d50 t vcn_v1_0_enable_clock_gating +ffffffff81ee7160 t vcn_v1_0_disable_clock_gating +ffffffff81ee76f0 t vcn_1_0_enable_static_power_gating +ffffffff81ee7910 t vcn_v1_0_start_dpg_mode +ffffffff81eeb540 t vcn_v1_0_start_spg_mode +ffffffff81eed760 t vcn_v1_0_clock_gating_dpg_mode +ffffffff81eee000 T vcn_v2_0_dec_ring_insert_start +ffffffff81eee1c0 T vcn_v2_0_dec_ring_insert_end +ffffffff81eee2c0 T vcn_v2_0_dec_ring_insert_nop +ffffffff81eee430 T vcn_v2_0_dec_ring_emit_fence +ffffffff81eee9f0 T vcn_v2_0_dec_ring_emit_ib +ffffffff81eeed50 T vcn_v2_0_dec_ring_emit_reg_wait +ffffffff81eef0a0 T vcn_v2_0_dec_ring_emit_vm_flush +ffffffff81eef110 T vcn_v2_0_dec_ring_emit_wreg +ffffffff81eef3a0 T vcn_v2_0_enc_ring_emit_fence +ffffffff81eef5e0 T vcn_v2_0_enc_ring_insert_end +ffffffff81eef670 T vcn_v2_0_enc_ring_emit_ib +ffffffff81eef8b0 T vcn_v2_0_enc_ring_emit_reg_wait +ffffffff81eefa70 T vcn_v2_0_enc_ring_emit_vm_flush +ffffffff81eefae0 T vcn_v2_0_enc_ring_emit_wreg +ffffffff81eefc40 T vcn_v2_0_dec_ring_test_ring +ffffffff81eefee0 t vcn_v2_0_early_init +ffffffff81ef0060 t vcn_v2_0_sw_init +ffffffff81ef0370 t vcn_v2_0_sw_fini +ffffffff81ef03f0 t vcn_v2_0_hw_init +ffffffff81ef0da0 t vcn_v2_0_hw_fini +ffffffff81ef0ea0 t vcn_v2_0_suspend +ffffffff81ef0ed0 t vcn_v2_0_resume +ffffffff81ef0f20 t vcn_v2_0_is_idle +ffffffff81ef0fb0 t vcn_v2_0_wait_for_idle +ffffffff81ef10a0 t vcn_v2_0_set_clockgating_state +ffffffff81ef1130 t vcn_v2_0_set_powergating_state +ffffffff81ef33f0 t vcn_v2_0_dec_ring_get_rptr +ffffffff81ef3480 t vcn_v2_0_dec_ring_get_wptr +ffffffff81ef3520 t vcn_v2_0_dec_ring_set_wptr +ffffffff81ef3650 t vcn_v2_0_enc_ring_get_rptr +ffffffff81ef3720 t vcn_v2_0_enc_ring_get_wptr +ffffffff81ef3810 t vcn_v2_0_enc_ring_set_wptr +ffffffff81ef3900 t vcn_v2_0_set_interrupt_state +ffffffff81ef3930 t vcn_v2_0_process_interrupt +ffffffff81ef39e0 t vcn_v2_0_pause_dpg_mode +ffffffff81ef4340 t vcn_v2_0_enable_clock_gating +ffffffff81ef45c0 t vcn_v2_0_disable_clock_gating +ffffffff81ef49c0 t vcn_v2_0_enable_static_power_gating +ffffffff81ef4ba0 t vcn_v2_0_start_dpg_mode +ffffffff81ef9660 t vcn_v2_0_clock_gating_dpg_mode +ffffffff81efa000 t vcn_v2_6_query_poison_status +ffffffff81efa0d0 t vcn_v2_5_early_init +ffffffff81efa410 t vcn_v2_5_sw_init +ffffffff81efa890 t vcn_v2_5_sw_fini +ffffffff81efa960 t vcn_v2_5_hw_init +ffffffff81efb420 t vcn_v2_5_hw_fini +ffffffff81efb560 t vcn_v2_5_suspend +ffffffff81efb590 t vcn_v2_5_resume +ffffffff81efb5e0 t vcn_v2_5_is_idle +ffffffff81efb6d0 t vcn_v2_5_wait_for_idle +ffffffff81efb800 t vcn_v2_5_set_clockgating_state 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vcn_v3_0_is_idle +ffffffff81f065c0 t vcn_v3_0_wait_for_idle +ffffffff81f066f0 t vcn_v3_0_set_clockgating_state +ffffffff81f06800 t vcn_v3_0_set_powergating_state +ffffffff81f09080 t vcn_v3_0_dec_ring_get_rptr +ffffffff81f09120 t vcn_v3_0_dec_ring_get_wptr +ffffffff81f091d0 t vcn_v3_0_dec_ring_set_wptr +ffffffff81f09340 t vcn_v3_0_ring_patch_cs_in_place +ffffffff81f09640 t vcn_v3_0_enc_ring_get_rptr +ffffffff81f09730 t vcn_v3_0_enc_ring_get_wptr +ffffffff81f09830 t vcn_v3_0_enc_ring_set_wptr +ffffffff81f09930 t vcn_v3_0_set_interrupt_state +ffffffff81f09960 t vcn_v3_0_process_interrupt +ffffffff81f09a50 t vcn_v3_0_pause_dpg_mode +ffffffff81f0a3c0 t vcn_v3_0_enable_clock_gating +ffffffff81f0a640 t vcn_v3_0_disable_clock_gating +ffffffff81f0abe0 t vcn_v3_0_start_dpg_mode +ffffffff81f0f980 t vcn_v3_0_clock_gating_dpg_mode +ffffffff81f11000 t vcn_v4_0_early_init +ffffffff81f11120 t vcn_v4_0_sw_init +ffffffff81f11380 t vcn_v4_0_sw_fini +ffffffff81f11460 t vcn_v4_0_hw_init +ffffffff81f11ea0 t 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is_rgb_cspace +ffffffff81f45080 T is_lower_pipe_tree_visible +ffffffff81f450e0 T is_upper_pipe_tree_visible +ffffffff81f45140 T is_pipe_tree_visible +ffffffff81f451c0 T build_prescale_params +ffffffff81f46000 T dc_fixpt_from_fraction +ffffffff81f461d0 T dc_fixpt_mul +ffffffff81f46380 T dc_fixpt_sqr +ffffffff81f464f0 T dc_fixpt_recip +ffffffff81f46560 T dc_fixpt_sinc +ffffffff81f46750 T dc_fixpt_sin +ffffffff81f46780 T dc_fixpt_cos +ffffffff81f46870 T dc_fixpt_exp +ffffffff81f46b70 t fixed31_32_exp_from_taylor_series +ffffffff81f46f50 T dc_fixpt_log +ffffffff81f47160 T dc_fixpt_u4d19 +ffffffff81f471a0 T dc_fixpt_u3d19 +ffffffff81f471e0 T dc_fixpt_u2d19 +ffffffff81f47220 T dc_fixpt_u0d19 +ffffffff81f47250 T dc_fixpt_clamp_u0d14 +ffffffff81f472a0 T dc_fixpt_clamp_u0d10 +ffffffff81f472f0 T dc_fixpt_s4d19 +ffffffff81f48000 T bios_parser_create +ffffffff81f493b0 t bios_parser_get_connectors_number +ffffffff81f49410 t bios_parser_get_connector_id +ffffffff81f494a0 t bios_parser_get_src_obj +ffffffff81f495b0 t bios_parser_get_i2c_info +ffffffff81f497d0 t bios_parser_get_hpd_info +ffffffff81f498b0 t bios_parser_get_device_tag +ffffffff81f49ab0 t bios_parser_get_spread_spectrum_info +ffffffff81f49db0 t bios_parser_get_ss_entry_number +ffffffff81f49fe0 t bios_parser_get_embedded_panel_info +ffffffff81f4a530 t bios_parser_get_gpio_pin_info +ffffffff81f4a650 t bios_parser_get_encoder_cap_info +ffffffff81f4a750 t bios_parser_set_scratch_critical_state +ffffffff81f4a760 t bios_parser_is_device_id_supported +ffffffff81f4a820 t bios_parser_encoder_control +ffffffff81f4a860 t bios_parser_transmitter_control +ffffffff81f4a8a0 t bios_parser_enable_crtc +ffffffff81f4a8f0 t bios_parser_adjust_pixel_clock +ffffffff81f4a930 t bios_parser_set_pixel_clock +ffffffff81f4a970 t bios_parser_set_dce_clock +ffffffff81f4a9b0 t bios_parser_enable_spread_spectrum_on_ppll +ffffffff81f4aa00 t bios_parser_program_crtc_timing +ffffffff81f4aa40 t bios_parser_program_display_engine_pll +ffffffff81f4aa80 t bios_parser_enable_disp_power_gating +ffffffff81f4aac0 t bios_parser_destroy +ffffffff81f4ab80 t bios_get_board_layout_info +ffffffff81f4ae10 t get_bios_object +ffffffff81f4afe0 t get_ss_info_from_ss_info_table +ffffffff81f4b1a0 t get_ss_entry_number_from_ss_info_tbl +ffffffff81f4c000 T firmware_parser_create +ffffffff81f4dde0 t bios_parser_get_connectors_number +ffffffff81f4df70 t bios_parser_get_connector_id +ffffffff81f4e000 t bios_parser_get_src_obj +ffffffff81f4e2a0 t bios_parser_get_i2c_info +ffffffff81f4e530 t bios_parser_get_hpd_info +ffffffff81f4e6a0 t bios_parser_get_device_tag +ffffffff81f4e970 t bios_parser_get_spread_spectrum_info +ffffffff81f4ed30 t bios_parser_get_ss_entry_number +ffffffff81f4ed60 t bios_parser_get_embedded_panel_info +ffffffff81f4ef60 t bios_parser_get_gpio_pin_info +ffffffff81f4f080 t bios_parser_get_encoder_cap_info +ffffffff81f4f1f0 t bios_parser_is_accelerated_mode +ffffffff81f4f200 t bios_parser_set_scratch_critical_state +ffffffff81f4f210 t bios_parser_is_device_id_supported +ffffffff81f4f290 t bios_parser_encoder_control +ffffffff81f4f2d0 t bios_parser_transmitter_control +ffffffff81f4f310 t bios_parser_enable_crtc +ffffffff81f4f360 t bios_parser_set_pixel_clock +ffffffff81f4f3a0 t bios_parser_set_dce_clock +ffffffff81f4f3e0 t bios_parser_program_crtc_timing +ffffffff81f4f420 t bios_parser_enable_disp_power_gating +ffffffff81f4f460 t firmware_parser_destroy +ffffffff81f4f520 t bios_get_board_layout_info +ffffffff81f4f9d0 t bios_parser_pack_data_tables +ffffffff81f4fa00 t bios_get_atom_dc_golden_table +ffffffff81f4fb40 t bios_parser_enable_lvtma_control +ffffffff81f4fb90 t bios_parser_get_soc_bb_info +ffffffff81f4fca0 t bios_parser_get_disp_connector_caps_info +ffffffff81f4fe00 t bios_parser_get_lttpr_caps +ffffffff81f4ff50 t bios_parser_get_lttpr_interop +ffffffff81f50090 t bios_parser_get_connector_speed_cap_info +ffffffff81f501e0 t get_bios_object +ffffffff81f50340 t get_bios_object_from_path_v3 +ffffffff81f51000 T object_id_from_bios_object_id +ffffffff81f52000 T bios_get_image +ffffffff81f52050 T bios_is_accelerated_mode +ffffffff81f520b0 T bios_set_scratch_acc_mode_change +ffffffff81f520f0 T bios_set_scratch_critical_state +ffffffff81f52130 T bios_get_vga_enabled_displays +ffffffff81f53000 T dal_bios_parser_create +ffffffff81f53070 T dal_bios_parser_destroy +ffffffff81f54000 T dal_bios_parser_init_cmd_tbl +ffffffff81f54800 t encoder_control_digx_v3 +ffffffff81f54900 t encoder_control_digx_v4 +ffffffff81f54a00 t encoder_control_digx_v5 +ffffffff81f54b50 t encoder_control_dig1_v1 +ffffffff81f54bd0 t encoder_control_dig2_v1 +ffffffff81f54c50 t encoder_control_dig_v1 +ffffffff81f54cb0 t transmitter_control_v2 +ffffffff81f54e50 t transmitter_control_v3 +ffffffff81f55010 t transmitter_control_v4 +ffffffff81f551c0 t transmitter_control_v1_5 +ffffffff81f55340 t transmitter_control_v1_6 +ffffffff81f554b0 t set_pixel_clock_v3 +ffffffff81f55620 t set_pixel_clock_v5 +ffffffff81f557c0 t set_pixel_clock_v6 +ffffffff81f55970 t set_pixel_clock_v7 +ffffffff81f55b40 t enable_spread_spectrum_on_ppll_v1 +ffffffff81f55c60 t enable_spread_spectrum_on_ppll_v2 +ffffffff81f55d90 t enable_spread_spectrum_on_ppll_v3 +ffffffff81f55ea0 t adjust_display_pll_v2 +ffffffff81f55ff0 t adjust_display_pll_v3 +ffffffff81f56160 t dac1_encoder_control_v1 +ffffffff81f561e0 t dac2_encoder_control_v1 +ffffffff81f56260 t dac1_output_control_v1 +ffffffff81f562c0 t dac2_output_control_v1 +ffffffff81f56320 t set_crtc_using_dtd_timing_v3 +ffffffff81f56490 t set_crtc_timing_v1 +ffffffff81f56630 t enable_crtc_v1 +ffffffff81f566d0 t enable_crtc_mem_req_v1 +ffffffff81f56770 t program_clock_v5 +ffffffff81f56870 t program_clock_v6 +ffffffff81f56990 t external_encoder_control_v3 +ffffffff81f56b40 t enable_disp_power_gating_v2_1 +ffffffff81f56c00 t set_dce_clock_v2_1 +ffffffff81f57000 T dal_firmware_parser_init_cmd_tbl +ffffffff81f573d0 t encoder_control_digx_v1_5 +ffffffff81f575b0 t encoder_control_fallback +ffffffff81f57610 t transmitter_control_v1_6 +ffffffff81f577c0 t transmitter_control_v1_7 +ffffffff81f579b0 t transmitter_control_fallback +ffffffff81f57a10 t set_pixel_clock_v7 +ffffffff81f57c70 t set_pixel_clock_fallback +ffffffff81f57cd0 t set_crtc_using_dtd_timing_v3 +ffffffff81f57e40 t enable_crtc_v1 +ffffffff81f57ee0 t external_encoder_control_v3 +ffffffff81f57f10 t enable_disp_power_gating_v2_1 +ffffffff81f58070 t enable_disp_power_gating_fallback +ffffffff81f580d0 t set_dce_clock_v2_1 +ffffffff81f581f0 t get_smu_clock_info_v3_1 +ffffffff81f58260 t enable_lvtma_control +ffffffff81f59000 T dal_bios_parser_init_cmd_tbl_helper +ffffffff81f590a0 T dal_cmd_table_helper_controller_id_to_atom +ffffffff81f591c0 T dal_cmd_table_helper_transmitter_bp_to_atom +ffffffff81f59240 T dal_cmd_table_helper_encoder_mode_bp_to_atom +ffffffff81f592d0 T dal_cmd_table_helper_assign_control_parameter +ffffffff81f59390 T dal_cmd_table_helper_clock_source_id_to_ref_clk_src +ffffffff81f59470 T dal_cmd_table_helper_encoder_id_to_atom +ffffffff81f5a000 T dal_bios_parser_init_cmd_tbl_helper2 +ffffffff81f5a0b0 T dal_cmd_table_helper_controller_id_to_atom2 +ffffffff81f5a1c0 T dal_cmd_table_helper_transmitter_bp_to_atom2 +ffffffff81f5a240 T dal_cmd_table_helper_encoder_mode_bp_to_atom2 +ffffffff81f5a2d0 T dal_cmd_table_helper_clock_source_id_to_ref_clk_src2 +ffffffff81f5a3b0 T dal_cmd_table_helper_encoder_id_to_atom2 +ffffffff81f5b000 T dal_cmd_tbl_helper_dce110_get_table +ffffffff81f5b030 t encoder_action_to_atom +ffffffff81f5b0b0 t engine_bp_to_atom +ffffffff81f5b100 t clock_source_id_to_atom +ffffffff81f5b1a0 t clock_source_id_to_atom_phy_clk_src_id +ffffffff81f5b1f0 t signal_type_to_atom_dig_mode +ffffffff81f5b250 t hpd_sel_to_atom +ffffffff81f5b290 t dig_encoder_sel_to_atom +ffffffff81f5b2c0 t phy_id_to_atom +ffffffff81f5b300 t disp_power_gating_action_to_atom +ffffffff81f5c000 T dal_cmd_tbl_helper_dce112_get_table2 ffffffff81f5c030 t encoder_action_to_atom ffffffff81f5c0b0 t engine_bp_to_atom ffffffff81f5c100 t clock_source_id_to_atom -ffffffff81f5c1a0 t clock_source_id_to_atom_phy_clk_src_id -ffffffff81f5c1f0 t signal_type_to_atom_dig_mode -ffffffff81f5c250 t hpd_sel_to_atom -ffffffff81f5c290 t dig_encoder_sel_to_atom -ffffffff81f5c2c0 t phy_id_to_atom -ffffffff81f5c300 t disp_power_gating_action_to_atom -ffffffff81f5d000 T dal_cmd_tbl_helper_dce112_get_table2 +ffffffff81f5c1d0 t clock_source_id_to_atom_phy_clk_src_id +ffffffff81f5c220 t signal_type_to_atom_dig_mode +ffffffff81f5c280 t hpd_sel_to_atom +ffffffff81f5c2c0 t dig_encoder_sel_to_atom +ffffffff81f5c2f0 t phy_id_to_atom +ffffffff81f5c330 t disp_power_gating_action_to_atom +ffffffff81f5c3a0 t dc_clock_type_to_atom +ffffffff81f5c420 t transmitter_color_depth_to_atom +ffffffff81f5d000 T dal_cmd_tbl_helper_dce112_get_table ffffffff81f5d030 t encoder_action_to_atom ffffffff81f5d0b0 t engine_bp_to_atom ffffffff81f5d100 t clock_source_id_to_atom @@ -29427,7 +29439,7 @@ ffffffff81f5d2f0 t phy_id_to_atom ffffffff81f5d330 t disp_power_gating_action_to_atom ffffffff81f5d3a0 t dc_clock_type_to_atom ffffffff81f5d420 t transmitter_color_depth_to_atom -ffffffff81f5e000 T dal_cmd_tbl_helper_dce112_get_table +ffffffff81f5e000 T dal_cmd_tbl_helper_dce80_get_table ffffffff81f5e030 t encoder_action_to_atom ffffffff81f5e0b0 t engine_bp_to_atom ffffffff81f5e100 t clock_source_id_to_atom @@ -29435,25573 +29447,25563 @@ ffffffff81f5e1d0 t clock_source_id_to_atom_phy_clk_src ffffffff81f5e220 t signal_type_to_atom_dig_mode ffffffff81f5e280 t hpd_sel_to_atom ffffffff81f5e2c0 t dig_encoder_sel_to_atom -ffffffff81f5e2f0 t phy_id_to_atom -ffffffff81f5e330 t disp_power_gating_action_to_atom -ffffffff81f5e3a0 t dc_clock_type_to_atom -ffffffff81f5e420 t transmitter_color_depth_to_atom -ffffffff81f5f000 T dal_cmd_tbl_helper_dce80_get_table -ffffffff81f5f030 t encoder_action_to_atom -ffffffff81f5f0b0 t engine_bp_to_atom -ffffffff81f5f100 t clock_source_id_to_atom -ffffffff81f5f1d0 t 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rn_vbios_smu_send_msg_with_param -ffffffff81f6d1b0 T rn_vbios_smu_set_dispclk -ffffffff81f6d2f0 T rn_vbios_smu_set_dprefclk -ffffffff81f6d360 T rn_vbios_smu_set_hard_min_dcfclk -ffffffff81f6d3e0 T rn_vbios_smu_set_min_deep_sleep_dcfclk -ffffffff81f6d460 T rn_vbios_smu_set_phyclk -ffffffff81f6d4a0 T rn_vbios_smu_set_dppclk -ffffffff81f6d560 T rn_vbios_smu_set_dcn_low_power_state -ffffffff81f6d580 T rn_vbios_smu_enable_48mhz_tmdp_refclk_pwrdwn -ffffffff81f6d5a0 T rn_vbios_smu_enable_pme_wa -ffffffff81f6d5c0 T rn_vbios_smu_is_periodic_retraining_disabled -ffffffff81f6e000 T dcn3_init_clocks -ffffffff81f6e3d0 t dcn3_init_clocks_fpga -ffffffff81f6e3e0 T dcn3_clk_mgr_construct -ffffffff81f6e540 T dcn3_clk_mgr_destroy -ffffffff81f6e5b0 t dcn3_update_clocks -ffffffff81f6ea10 t dcn3_enable_pme_wa -ffffffff81f6ea50 t dcn3_are_clock_states_equal -ffffffff81f6eab0 t dcn3_notify_wm_ranges -ffffffff81f6ed40 t dcn30_notify_link_rate_change -ffffffff81f6ee60 t dcn3_set_hard_min_memclk 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-ffffffff81f70490 T dcn30_smu_set_display_refresh_from_mall -ffffffff81f704c0 T dcn30_smu_set_external_client_df_cstate_allow -ffffffff81f704e0 T dcn30_smu_set_pme_workaround -ffffffff81f71000 T dcn301_smu_get_smu_version -ffffffff81f71070 t dcn301_smu_send_msg_with_param -ffffffff81f711f0 T dcn301_smu_set_dispclk -ffffffff81f71290 T dcn301_smu_set_dprefclk -ffffffff81f71340 T dcn301_smu_set_hard_min_dcfclk -ffffffff81f713e0 T dcn301_smu_set_min_deep_sleep_dcfclk -ffffffff81f71480 T dcn301_smu_set_dppclk -ffffffff81f71520 T dcn301_smu_set_display_idle_optimization -ffffffff81f71570 T dcn301_smu_enable_phy_refclk_pwrdwn -ffffffff81f715c0 T dcn301_smu_enable_pme_wa -ffffffff81f715e0 T dcn301_smu_set_dram_addr_high -ffffffff81f71630 T dcn301_smu_set_dram_addr_low -ffffffff81f71680 T dcn301_smu_transfer_dpm_table_smu_2_dram -ffffffff81f716a0 T dcn301_smu_transfer_wm_table_dram_2_smu -ffffffff81f72000 T vg_clk_mgr_construct -ffffffff81f727f0 T vg_clk_mgr_destroy -ffffffff81f72840 t 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rn_vbios_smu_set_dcn_low_power_state +ffffffff81f6c580 T rn_vbios_smu_enable_48mhz_tmdp_refclk_pwrdwn +ffffffff81f6c5a0 T rn_vbios_smu_enable_pme_wa +ffffffff81f6c5c0 T rn_vbios_smu_is_periodic_retraining_disabled +ffffffff81f6d000 T dcn3_init_clocks +ffffffff81f6d3d0 t dcn3_init_clocks_fpga +ffffffff81f6d3e0 T dcn3_clk_mgr_construct +ffffffff81f6d540 T dcn3_clk_mgr_destroy +ffffffff81f6d5b0 t dcn3_update_clocks +ffffffff81f6da10 t dcn3_enable_pme_wa +ffffffff81f6da50 t dcn3_are_clock_states_equal +ffffffff81f6dab0 t dcn3_notify_wm_ranges +ffffffff81f6dd40 t dcn30_notify_link_rate_change +ffffffff81f6de60 t dcn3_set_hard_min_memclk +ffffffff81f6df00 t dcn3_set_hard_max_memclk +ffffffff81f6df60 t dcn3_set_max_memclk +ffffffff81f6dfa0 t dcn3_set_min_memclk +ffffffff81f6dfe0 t dcn3_get_memclk_states_from_smu +ffffffff81f6e120 t dcn3_is_smu_present +ffffffff81f6f000 T dcn30_smu_test_message +ffffffff81f6f070 t dcn30_smu_send_msg_with_param +ffffffff81f6f1d0 T dcn30_smu_get_smu_version +ffffffff81f6f1f0 T dcn30_smu_check_driver_if_version +ffffffff81f6f240 T dcn30_smu_check_msg_header_version +ffffffff81f6f290 T dcn30_smu_set_dram_addr_high +ffffffff81f6f2b0 T dcn30_smu_set_dram_addr_low +ffffffff81f6f2d0 T dcn30_smu_transfer_wm_table_smu_2_dram +ffffffff81f6f2f0 T dcn30_smu_transfer_wm_table_dram_2_smu +ffffffff81f6f310 T dcn30_smu_set_hard_min_by_freq +ffffffff81f6f360 T dcn30_smu_set_hard_max_by_freq +ffffffff81f6f3b0 T dcn30_smu_get_dpm_freq_by_index +ffffffff81f6f400 T dcn30_smu_get_dc_mode_max_dpm_freq +ffffffff81f6f450 T dcn30_smu_set_min_deep_sleep_dcef_clk +ffffffff81f6f470 T dcn30_smu_set_num_of_displays +ffffffff81f6f490 T dcn30_smu_set_display_refresh_from_mall +ffffffff81f6f4c0 T dcn30_smu_set_external_client_df_cstate_allow +ffffffff81f6f4e0 T dcn30_smu_set_pme_workaround +ffffffff81f70000 T dcn301_smu_get_smu_version +ffffffff81f70070 t dcn301_smu_send_msg_with_param +ffffffff81f701f0 T dcn301_smu_set_dispclk +ffffffff81f70290 T dcn301_smu_set_dprefclk +ffffffff81f70340 T dcn301_smu_set_hard_min_dcfclk +ffffffff81f703e0 T dcn301_smu_set_min_deep_sleep_dcfclk +ffffffff81f70480 T dcn301_smu_set_dppclk +ffffffff81f70520 T dcn301_smu_set_display_idle_optimization +ffffffff81f70570 T dcn301_smu_enable_phy_refclk_pwrdwn +ffffffff81f705c0 T dcn301_smu_enable_pme_wa +ffffffff81f705e0 T dcn301_smu_set_dram_addr_high +ffffffff81f70630 T dcn301_smu_set_dram_addr_low +ffffffff81f70680 T dcn301_smu_transfer_dpm_table_smu_2_dram +ffffffff81f706a0 T dcn301_smu_transfer_wm_table_dram_2_smu +ffffffff81f71000 T vg_clk_mgr_construct +ffffffff81f717f0 T vg_clk_mgr_destroy +ffffffff81f71840 t vg_update_clocks +ffffffff81f71bd0 t vg_init_clocks +ffffffff81f71c70 t vg_enable_pme_wa +ffffffff81f71c80 t vg_are_clock_states_equal +ffffffff81f71cd0 t vg_notify_wm_ranges +ffffffff81f73000 T dcn31_update_clocks +ffffffff81f73690 T dcn31_init_clocks +ffffffff81f73740 T dcn31_are_clock_states_equal +ffffffff81f737a0 T dcn31_get_dtb_ref_freq_khz +ffffffff81f737d0 T dcn31_clk_mgr_construct +ffffffff81f73e40 T dcn31_clk_mgr_destroy +ffffffff81f73e90 t dcn31_set_low_power_state +ffffffff81f740a0 t dcn31_enable_pme_wa +ffffffff81f740b0 t dcn31_notify_wm_ranges +ffffffff81f74440 t find_clk_for_voltage +ffffffff81f75000 T dcn31_smu_get_smu_version +ffffffff81f75020 t dcn31_smu_send_msg_with_param +ffffffff81f75220 T dcn31_smu_set_dispclk +ffffffff81f75290 T dcn31_smu_set_dprefclk +ffffffff81f75300 T dcn31_smu_set_hard_min_dcfclk +ffffffff81f75380 T dcn31_smu_set_min_deep_sleep_dcfclk +ffffffff81f75400 T dcn31_smu_set_dppclk +ffffffff81f75470 T dcn31_smu_set_display_idle_optimization +ffffffff81f754c0 T dcn31_smu_enable_phy_refclk_pwrdwn +ffffffff81f75510 T dcn31_smu_enable_pme_wa +ffffffff81f75550 T dcn31_smu_set_dram_addr_high +ffffffff81f75590 T dcn31_smu_set_dram_addr_low +ffffffff81f755d0 T dcn31_smu_transfer_dpm_table_smu_2_dram +ffffffff81f75610 T dcn31_smu_transfer_wm_table_dram_2_smu +ffffffff81f75650 T dcn31_smu_set_zstate_support +ffffffff81f756c0 T dcn31_smu_set_dtbclk +ffffffff81f76000 T dcn314_update_clocks +ffffffff81f76730 T dcn314_are_clock_states_equal +ffffffff81f76790 T dcn314_clk_mgr_construct +ffffffff81f774a0 T dcn314_clk_mgr_destroy +ffffffff81f774f0 t dcn314_enable_pme_wa +ffffffff81f77500 t dcn314_notify_wm_ranges +ffffffff81f78000 T dcn314_smu_get_smu_version +ffffffff81f78020 t dcn314_smu_send_msg_with_param +ffffffff81f78240 T dcn314_smu_set_dispclk +ffffffff81f782b0 T dcn314_smu_set_dprefclk +ffffffff81f78320 T dcn314_smu_set_hard_min_dcfclk +ffffffff81f783a0 T dcn314_smu_set_min_deep_sleep_dcfclk +ffffffff81f78420 T dcn314_smu_set_dppclk +ffffffff81f78490 T dcn314_smu_set_display_idle_optimization +ffffffff81f784e0 T dcn314_smu_enable_phy_refclk_pwrdwn +ffffffff81f78530 T dcn314_smu_enable_pme_wa +ffffffff81f78570 T dcn314_smu_set_dram_addr_high +ffffffff81f785b0 T dcn314_smu_set_dram_addr_low +ffffffff81f785f0 T dcn314_smu_transfer_dpm_table_smu_2_dram +ffffffff81f78630 T dcn314_smu_transfer_wm_table_dram_2_smu +ffffffff81f78670 T dcn314_smu_set_zstate_support +ffffffff81f786c0 T dcn314_smu_set_dtbclk +ffffffff81f79000 T dcn315_clk_mgr_construct +ffffffff81f799c0 T dcn315_clk_mgr_destroy +ffffffff81f79a10 t dcn315_update_clocks +ffffffff81f7a000 t dcn315_enable_pme_wa +ffffffff81f7a010 t dcn315_notify_wm_ranges +ffffffff81f7b000 T dcn315_smu_get_smu_version +ffffffff81f7b020 t dcn315_smu_send_msg_with_param +ffffffff81f7b1b0 T dcn315_smu_set_dispclk +ffffffff81f7b220 T dcn315_smu_set_hard_min_dcfclk +ffffffff81f7b2a0 T dcn315_smu_set_min_deep_sleep_dcfclk +ffffffff81f7b320 T dcn315_smu_set_dppclk +ffffffff81f7b390 T dcn315_smu_set_display_idle_optimization +ffffffff81f7b3e0 T dcn315_smu_enable_phy_refclk_pwrdwn +ffffffff81f7b430 T dcn315_smu_enable_pme_wa +ffffffff81f7b470 T dcn315_smu_set_dram_addr_high +ffffffff81f7b4b0 T dcn315_smu_set_dram_addr_low +ffffffff81f7b4f0 T dcn315_smu_transfer_dpm_table_smu_2_dram +ffffffff81f7b530 T dcn315_smu_transfer_wm_table_dram_2_smu +ffffffff81f7b570 T dcn315_smu_get_dpref_clk +ffffffff81f7b5d0 T dcn315_smu_get_dtbclk +ffffffff81f7b630 T dcn315_smu_set_dtbclk +ffffffff81f7c000 T dcn316_clk_mgr_construct +ffffffff81f7c6a0 T dcn316_clk_mgr_destroy +ffffffff81f7c6f0 t dcn316_update_clocks +ffffffff81f7cd20 t dcn316_enable_pme_wa +ffffffff81f7cd30 t dcn316_notify_wm_ranges +ffffffff81f7d0c0 t find_clk_for_voltage +ffffffff81f7e000 T dcn316_smu_get_smu_version +ffffffff81f7e020 t dcn316_smu_send_msg_with_param +ffffffff81f7e1b0 T dcn316_smu_set_dispclk +ffffffff81f7e220 T dcn316_smu_set_hard_min_dcfclk +ffffffff81f7e2a0 T dcn316_smu_set_min_deep_sleep_dcfclk +ffffffff81f7e320 T dcn316_smu_set_dppclk +ffffffff81f7e390 T dcn316_smu_set_display_idle_optimization +ffffffff81f7e3e0 T dcn316_smu_enable_phy_refclk_pwrdwn +ffffffff81f7e430 T dcn316_smu_set_dram_addr_high +ffffffff81f7e470 T dcn316_smu_set_dram_addr_low +ffffffff81f7e4b0 T dcn316_smu_transfer_dpm_table_smu_2_dram +ffffffff81f7e4f0 T dcn316_smu_transfer_wm_table_dram_2_smu +ffffffff81f7e530 T dcn316_smu_enable_pme_wa +ffffffff81f7e570 T dcn316_smu_set_dtbclk +ffffffff81f7e5b0 T dcn316_smu_get_dpref_clk +ffffffff81f7e610 T dcn316_smu_get_smu_fclk +ffffffff81f7f000 T dcn32_init_clocks +ffffffff81f7f4e0 T dcn32_clk_mgr_construct +ffffffff81f7f7b0 t dcn32_dump_clk_registers +ffffffff81f7f9d0 T dcn32_clk_mgr_destroy +ffffffff81f7fa40 t dcn32_update_clocks +ffffffff81f80190 t dcn32_enable_pme_wa +ffffffff81f801d0 t dcn32_are_clock_states_equal +ffffffff81f80240 t dcn32_notify_wm_ranges +ffffffff81f803c0 t dcn32_set_hard_min_memclk +ffffffff81f80460 t dcn32_set_hard_max_memclk +ffffffff81f804c0 t dcn32_get_memclk_states_from_smu +ffffffff81f806b0 t dcn32_is_smu_present +ffffffff81f81000 T dcn32_smu_send_fclk_pstate_message +ffffffff81f81020 t dcn32_smu_send_msg_with_param +ffffffff81f81160 T dcn32_smu_send_cab_for_uclk_message +ffffffff81f81190 T dcn32_smu_transfer_wm_table_dram_2_smu +ffffffff81f811b0 T dcn32_smu_set_pme_workaround +ffffffff81f811d0 T dcn32_smu_set_hard_min_by_freq +ffffffff81f82000 T dc_stream_adjust_vmin_vmax +ffffffff81f82170 T dc_stream_get_last_used_drr_vtotal +ffffffff81f822d0 T dc_stream_get_crtc_position +ffffffff81f82500 T dc_stream_configure_crc +ffffffff81f82750 T dc_stream_get_crc +ffffffff81f82830 T dc_stream_set_dyn_expansion +ffffffff81f82aa0 T dc_stream_set_dither_option +ffffffff81f82c10 T dc_stream_set_gamut_remap +ffffffff81f82d90 T dc_stream_program_csc_matrix +ffffffff81f82fb0 T dc_stream_set_static_screen_params +ffffffff81f83140 T dc_create +ffffffff81f83ae0 t dc_construct_ctx +ffffffff81f83c40 t dc_destruct +ffffffff81f83f10 T dc_hardware_init +ffffffff81f84020 T dc_init_callbacks +ffffffff81f84050 T dc_deinit_callbacks +ffffffff81f84080 T dc_destroy +ffffffff81f840d0 T dc_validate_boot_timing +ffffffff81f84460 T dc_enable_stereo +ffffffff81f84560 T dc_trigger_sync +ffffffff81f84b80 T dc_z10_restore +ffffffff81f84bc0 T dc_z10_save_init +ffffffff81f84c00 T dc_commit_streams +ffffffff81f850a0 t commit_minimal_transition_state +ffffffff81f854e0 T dc_create_state +ffffffff81f85570 t dc_commit_state_no_check +ffffffff81f86a20 T dc_release_state +ffffffff81f86a90 T dc_commit_state +ffffffff81f86be0 T dc_acquire_release_mpc_3dlut +ffffffff81f86cd0 T dc_post_update_surfaces_to_stream +ffffffff81f870f0 T dc_copy_state +ffffffff81f872e0 T dc_retain_state +ffffffff81f87310 T dc_set_generic_gpio_for_stereo +ffffffff81f87420 T dc_check_update_surfaces_for_stream +ffffffff81f88040 T dc_dmub_update_dirty_rect +ffffffff81f882d0 T dc_update_planes_and_stream +ffffffff81f88a40 t commit_planes_for_stream +ffffffff81f8a130 T dc_commit_updates_for_stream +ffffffff81f8a540 t copy_surface_update_to_plane +ffffffff81f8a940 t copy_stream_update_to_stream +ffffffff81f8af70 T dc_get_current_stream_count +ffffffff81f8afb0 T dc_get_stream_at_index +ffffffff81f8b000 T dc_interrupt_to_irq_source +ffffffff81f8b020 T dc_interrupt_set +ffffffff81f8b070 T dc_interrupt_ack +ffffffff81f8b090 T dc_power_down_on_boot +ffffffff81f8b0e0 T dc_set_power_state +ffffffff81f8b2d0 T dc_resume +ffffffff81f8b340 T dc_is_dmcu_initialized +ffffffff81f8b390 T dc_is_oem_i2c_device_present +ffffffff81f8b3e0 T dc_submit_i2c +ffffffff81f8b410 T dc_submit_i2c_oem +ffffffff81f8b460 T dc_link_add_remote_sink +ffffffff81f8b5f0 T dc_link_remove_remote_sink +ffffffff81f8b6e0 T get_clock_requirements_for_state +ffffffff81f8b760 T dc_set_clock +ffffffff81f8b7a0 T dc_get_clock +ffffffff81f8b7e0 T dc_set_psr_allow_active +ffffffff81f8b8e0 T dc_allow_idle_optimizations +ffffffff81f8b980 T dc_unlock_memory_clock_frequency +ffffffff81f8b9f0 T dc_lock_memory_clock_frequency +ffffffff81f8ba80 T dc_enable_dcmode_clk_limit +ffffffff81f8bb90 t blank_and_force_memclk +ffffffff81f8bd70 T dc_is_plane_eligible_for_idle_optimizations +ffffffff81f8bdc0 T dc_hardware_release +ffffffff81f8be10 T dc_mclk_switch_using_fw_based_vblank_stretch_shut_down +ffffffff81f8be50 T dc_is_dmub_outbox_supported +ffffffff81f8beb0 T dc_enable_dmub_notifications +ffffffff81f8bf10 T dc_enable_dmub_outbox +ffffffff81f8bf50 T dc_process_dmub_aux_transfer_async +ffffffff81f8c0f0 T get_link_index_from_dpia_port_index +ffffffff81f8c1a0 T dc_process_dmub_set_config_async +ffffffff81f8c290 T dc_process_dmub_set_mst_slots +ffffffff81f8c380 T dc_process_dmub_dpia_hpd_int_enable +ffffffff81f8c450 T dc_disable_accelerated_mode +ffffffff81f8c470 T dc_notify_vsync_int_state +ffffffff81f8d000 T pre_surface_trace +ffffffff81f8d030 T update_surface_trace +ffffffff81f8d060 T post_surface_trace +ffffffff81f8d090 T context_timing_trace +ffffffff81f8d240 T context_clock_trace +ffffffff81f8d270 T dc_status_to_str +ffffffff81f8e000 T find_color_matrix +ffffffff81f8e0b0 T color_space_to_black_color +ffffffff81f8e140 T hwss_wait_for_blank_complete +ffffffff81f8e1f0 T get_mpctree_visual_confirm_color +ffffffff81f8e250 T get_surface_visual_confirm_color +ffffffff81f8e300 T get_hdr_visual_confirm_color +ffffffff81f8e3b0 T get_subvp_visual_confirm_color +ffffffff81f8e4a0 T get_surface_tile_visual_confirm_color +ffffffff81f8f000 T get_hpd_gpio +ffffffff81f8f0e0 T dc_link_wait_for_t12 +ffffffff81f8f140 T dc_link_detect_sink +ffffffff81f8f2f0 T dc_link_is_dp_sink_present +ffffffff81f8f570 T reset_cur_dp_mst_topology +ffffffff81f8f5d0 T dc_link_detect +ffffffff81f90960 T dc_link_get_hpd_state +ffffffff81f909d0 T link_create +ffffffff81f91b20 T link_destroy +ffffffff81f91c80 T dc_link_blank_all_dp_displays +ffffffff81f91d50 T dc_link_blank_dp_stream +ffffffff81f91e60 T dc_link_blank_all_edp_displays +ffffffff81f91f20 T dc_power_alpm_dpcd_enable +ffffffff81f91f90 T dc_link_validate_mode_timing +ffffffff81f924b0 T dc_link_get_backlight_level +ffffffff81f92620 T dc_link_get_target_backlight_pwm +ffffffff81f92730 T dc_link_set_backlight_level +ffffffff81f928a0 T dc_link_set_psr_allow_active +ffffffff81f92b20 T dc_link_get_psr_state +ffffffff81f92c50 T dc_link_setup_psr +ffffffff81f930c0 T dc_link_get_psr_residency +ffffffff81f931c0 T dc_link_set_sink_vtotal_in_psr_active +ffffffff81f93240 T dc_link_get_status +ffffffff81f93270 T core_link_resume +ffffffff81f932b0 t program_hpd_filter +ffffffff81f93440 T dc_link_allocate_mst_payload +ffffffff81f93920 t update_mst_stream_alloc_table +ffffffff81f93ba0 t dc_log_vcp_x_y +ffffffff81f93d30 T dc_link_reduce_mst_payload +ffffffff81f941b0 T dc_link_increase_mst_payload +ffffffff81f94630 T core_link_enable_stream +ffffffff81f95330 t disable_link +ffffffff81f95450 t dc_link_update_sst_payload +ffffffff81f95690 T core_link_set_avmute +ffffffff81f956e0 T core_link_disable_stream +ffffffff81f95d50 t get_ext_hdmi_settings +ffffffff81f95f90 t write_i2c_retimer_setting +ffffffff81f96640 t write_i2c_default_retimer_setting +ffffffff81f96ce0 t write_i2c_redriver_setting +ffffffff81f96e20 T dc_link_enable_hpd_filter +ffffffff81f96f90 T dc_link_set_drive_settings +ffffffff81f97060 T dc_link_get_cur_link_res +ffffffff81f971b0 T dc_link_set_preferred_link_settings +ffffffff81f97300 T dc_link_set_preferred_training_settings +ffffffff81f97440 T dc_link_enable_hpd +ffffffff81f97450 T dc_link_disable_hpd +ffffffff81f97460 T dc_link_set_test_pattern +ffffffff81f974a0 T dc_link_bandwidth_kbps +ffffffff81f97540 T dc_link_should_enable_fec +ffffffff81f97660 T dc_link_get_link_cap +ffffffff81f976b0 T dc_link_overwrite_extended_receiver_cap +ffffffff81f976c0 T dc_link_is_fec_supported +ffffffff81f97780 T dc_bandwidth_in_kbps_from_timing +ffffffff81f978e0 T dc_get_cur_link_res_map +ffffffff81f979c0 T dc_restore_link_res_map +ffffffff81f97af0 t read_current_link_settings_on_detect +ffffffff81f97d00 t enable_link_dp +ffffffff81f98000 T dal_ddc_i2c_payloads_add +ffffffff81f980c0 T dal_ddc_service_create +ffffffff81f98230 T dal_ddc_service_destroy +ffffffff81f982c0 T dal_ddc_service_get_type +ffffffff81f982f0 T dal_ddc_service_set_transaction_type +ffffffff81f98320 T dal_ddc_service_is_in_aux_transaction_mode +ffffffff81f98360 T ddc_service_set_dongle_type +ffffffff81f98390 T get_defer_delay +ffffffff81f984c0 T dal_ddc_service_i2c_query_dp_dual_mode_adaptor +ffffffff81f988d0 T dal_ddc_service_query_ddc_data +ffffffff81f98c90 T dal_ddc_submit_aux_command +ffffffff81f98d80 T dc_link_aux_transfer_with_retries +ffffffff81f98d90 T dc_link_aux_transfer_raw +ffffffff81f98dc0 T dc_link_aux_try_to_configure_timeout +ffffffff81f98ea0 T dal_ddc_service_set_ddc_pin +ffffffff81f98ed0 T dal_ddc_service_get_ddc_pin +ffffffff81f98f00 T dal_ddc_service_write_scdc_data +ffffffff81f98ff0 T dal_ddc_service_read_scdc_data +ffffffff81f9a000 T dp_wait_for_training_aux_rd_interval +ffffffff81f9a080 T dc_dp_training_pattern_to_dpcd_training_pattern +ffffffff81f9a100 T dpcd_set_link_settings +ffffffff81f9a280 T dc_dp_initialize_scrambling_data_symbols +ffffffff81f9a320 T dp_is_cr_done +ffffffff81f9a380 T dp_is_ch_eq_done +ffffffff81f9a440 T dp_is_symbol_locked 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dc_dmub_srv_cmd_with_reply_data +ffffffff81fbd780 T dc_dmub_srv_wait_phy_init +ffffffff81fbd840 T dc_dmub_srv_notify_stream_mask +ffffffff81fbd8a0 T dc_dmub_srv_is_restore_required +ffffffff81fbd920 T dc_dmub_srv_get_dmub_outbox0_msg +ffffffff81fbd950 T dc_dmub_trace_event_control +ffffffff81fbd970 T dc_dmub_srv_drr_update_cmd +ffffffff81fbda70 T dc_dmub_srv_set_drr_manual_trigger_cmd +ffffffff81fbdb80 T dc_dmub_srv_p_state_delegate +ffffffff81fbded0 T dc_dmub_srv_query_caps_cmd +ffffffff81fbdfc0 T dc_dmub_srv_get_visual_confirm_color_cmd +ffffffff81fbe190 T dc_dmub_setup_subvp_dmub_command +ffffffff81fbeb30 T dc_dmub_srv_get_diagnostic_data +ffffffff81fbeb70 T dc_send_update_cursor_info_to_dmu +ffffffff81fbee20 T dc_dmub_check_min_version +ffffffff81fbf000 T dc_edid_parser_send_cea +ffffffff81fbf0b0 T dc_edid_parser_recv_cea_ack +ffffffff81fbf140 T dc_edid_parser_recv_amd_vsdb +ffffffff81fc0000 T generic_reg_update_ex +ffffffff81fc0370 t set_reg_field_values +ffffffff81fc0530 T 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dce_set_blender_mode +ffffffff81fcd360 T dce_clock_gating_power_up +ffffffff81fcd400 T dce_crtc_switch_to_clk_src +ffffffff81fcd5c0 T dce_use_lut +ffffffff81fce000 T dce_i2c_oem_device_present +ffffffff81fce080 T dce_i2c_submit_command +ffffffff81fcf000 T acquire_i2c_hw_engine +ffffffff81fcf3a0 T dce_i2c_submit_command_hw +ffffffff81fcfd70 t set_speed +ffffffff81fcfec0 T dce_i2c_hw_construct +ffffffff81fcff30 T dce100_i2c_hw_construct +ffffffff81fcffa0 T dce112_i2c_hw_construct +ffffffff81fd0010 T dcn1_i2c_hw_construct +ffffffff81fd0080 T dcn2_i2c_hw_construct +ffffffff81fd0110 t is_hw_busy +ffffffff81fd1000 T dce_i2c_sw_construct +ffffffff81fd1030 T dce_i2c_engine_acquire_sw +ffffffff81fd10d0 T dce_i2c_submit_command_sw +ffffffff81fd18d0 t write_byte_sw +ffffffff81fd2000 T dce_ipp_construct +ffffffff81fd2050 T dce_ipp_destroy +ffffffff81fd20a0 t dce_ipp_cursor_set_position +ffffffff81fd21d0 t dce_ipp_cursor_set_attributes +ffffffff81fd2460 t dce_ipp_program_prescale +ffffffff81fd2620 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dce110_timing_generator_setup_global_swap_lock +ffffffff81ff8210 T dce110_timing_generator_tear_down_global_swap_lock +ffffffff81ff8290 T dce110_timing_generator_enable_advanced_request +ffffffff81ff8330 T dce110_timing_generator_set_lock_master +ffffffff81ff8390 T dce110_timing_generator_enable_reset_trigger +ffffffff81ff8470 T dce110_timing_generator_enable_crtc_reset +ffffffff81ff8660 T dce110_timing_generator_disable_reset_trigger +ffffffff81ff8750 T dce110_timing_generator_did_triggered_reset_occur +ffffffff81ff87e0 T dce110_timing_generator_disable_vga +ffffffff81ff8850 T dce110_timing_generator_set_overscan_color_black +ffffffff81ff88f0 T dce110_tg_program_blank_color +ffffffff81ff89b0 T dce110_tg_set_overscan_color +ffffffff81ff8a10 T dce110_tg_program_timing +ffffffff81ff8a40 T dce110_tg_is_blanked +ffffffff81ff8aa0 T dce110_tg_set_blank +ffffffff81ff8b00 T dce110_tg_validate_timing +ffffffff81ff8bd0 T dce110_tg_wait_for_state +ffffffff81ff8cd0 T dce110_tg_set_colors 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dpp1_dscl_calc_lb_num_partitions +ffffffff820121e0 T dpp1_dscl_is_lb_conf_valid +ffffffff82012220 T dpp1_dscl_set_scaler_manual_scale +ffffffff820135e0 t dpp1_dscl_get_filter_coeffs_64p +ffffffff820136b0 t dpp1_dscl_set_scaler_filter +ffffffff82014000 T hubbub1_wm_read_state +ffffffff82014380 T hubbub1_allow_self_refresh_control +ffffffff82014400 T hubbub1_is_allow_self_refresh_enabled +ffffffff82014470 T hubbub1_verify_allow_pstate_change_high +ffffffff82014630 T hubbub1_wm_change_req_wa +ffffffff820146d0 T hubbub1_program_urgent_watermarks +ffffffff82014ab0 T hubbub1_program_stutter_watermarks +ffffffff82014f10 T hubbub1_program_pstate_watermarks +ffffffff82015160 T hubbub1_program_watermarks +ffffffff82015290 T hubbub1_update_dchub +ffffffff820154c0 T hubbub1_toggle_watermark_change_req +ffffffff82015560 T hubbub1_soft_reset +ffffffff820155a0 T hubbub1_construct +ffffffff82015600 t hubbub1_get_dcc_compression_cap +ffffffff82015820 t hubbub1_dcc_support_swizzle +ffffffff820158b0 t hubbub1_dcc_support_pixel_format +ffffffff82016000 T hubp1_set_blank +ffffffff82016110 T hubp1_clear_underflow +ffffffff82016160 T hubp1_vready_workaround +ffffffff820161f0 T hubp1_program_tiling +ffffffff82016460 T hubp1_program_size +ffffffff820165f0 T hubp1_program_rotation +ffffffff82016760 T hubp1_program_pixel_format +ffffffff82016d30 T hubp1_program_surface_flip_and_addr +ffffffff820174c0 T hubp1_dcc_control +ffffffff82017580 T hubp1_program_surface_config +ffffffff82017690 T hubp1_program_requestor +ffffffff82017a60 T hubp1_program_deadline +ffffffff82018160 T hubp1_is_flip_pending +ffffffff82018270 T min_set_viewport +ffffffff82018560 T hubp1_read_state_common +ffffffff82019200 T hubp1_read_state +ffffffff820194c0 T hubp1_get_cursor_pitch +ffffffff82019560 T hubp1_cursor_set_attributes +ffffffff82019810 T hubp1_cursor_set_position +ffffffff82019b70 T hubp1_clk_cntl +ffffffff82019bc0 T hubp1_vtg_sel +ffffffff82019c00 T hubp1_in_blank +ffffffff82019c70 T hubp1_soft_reset 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dcn10_plane_atomic_disconnect +ffffffff8201dfc0 T dcn10_plane_atomic_power_down +ffffffff8201e120 T dcn10_plane_atomic_disable +ffffffff8201e280 T dcn10_disable_plane +ffffffff8201e440 T dcn10_init_pipes +ffffffff8201eb40 T dcn10_init_hw +ffffffff8201f130 T dcn10_power_down_on_boot +ffffffff8201f2d0 T dcn10_reset_hw_ctx_wrap +ffffffff8201f5f0 T dcn10_update_plane_addr +ffffffff8201f710 T dcn10_set_input_transfer_func +ffffffff8201f880 T dcn10_set_output_transfer_func +ffffffff8201f940 T dcn10_pipe_control_lock +ffffffff8201fa10 T dcn10_cursor_lock +ffffffff8201fbd0 T dcn10_enable_vblanks_synchronization +ffffffff82020350 T dcn10_enable_timing_synchronization +ffffffff82020740 T dcn10_enable_per_frame_crtc_position_reset +ffffffff82020920 T dcn10_program_gamut_remap +ffffffff82020b20 T dcn10_program_output_csc +ffffffff82020c50 T dcn10_update_visual_confirm_color +ffffffff82020d50 T dcn10_update_mpcc +ffffffff82020fd0 T dcn10_blank_pixel_data +ffffffff82021110 T dcn10_set_hdr_multiplier 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T dcn10_send_immediate_sdp_message +ffffffff82023620 T dcn10_set_clock +ffffffff82023730 T dcn10_get_clock +ffffffff82023790 T dcn10_get_dcc_en_bits +ffffffff82024000 T snprintf_count +ffffffff82024090 T dcn10_clear_status_bits +ffffffff82024240 T dcn10_get_hw_state +ffffffff82026000 T dcn10_hw_sequencer_construct +ffffffff82027000 T dcn10_ipp_construct +ffffffff82027050 T dcn20_ipp_construct +ffffffff820270a0 t dcn10_ipp_destroy +ffffffff82028000 T dcn10_link_encoder_set_dp_phy_pattern_training_pattern +ffffffff820280b0 T dcn10_get_dig_frontend +ffffffff82028170 T enc1_configure_encoder +ffffffff820281f0 T dcn10_psr_program_dp_dphy_fast_training +ffffffff82028270 T dcn10_psr_program_secondary_packet +ffffffff820282f0 T dcn10_is_dig_enabled +ffffffff82028350 T dcn10_link_encoder_validate_dvi_output +ffffffff82028400 T dcn10_link_encoder_validate_dp_output +ffffffff82028440 T dcn10_link_encoder_construct +ffffffff82028630 T dcn10_link_encoder_validate_output_with_stream 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+ffffffff8202a390 t program_pattern_symbols +ffffffff8202b000 T mpc1_set_bg_color +ffffffff8202b1e0 T mpc1_get_mpcc +ffffffff8202b270 T mpc1_update_stereo_mix +ffffffff8202b3a0 T mpc1_assert_idle_mpcc +ffffffff8202b470 T mpc1_get_mpcc_for_dpp +ffffffff8202b520 T mpc1_is_mpcc_idle +ffffffff8202b610 T mpc1_assert_mpcc_idle_before_connect +ffffffff8202b750 T mpc1_insert_plane +ffffffff8202bca0 T mpc1_remove_mpcc +ffffffff8202c060 T mpc1_mpc_init +ffffffff8202c380 T mpc1_mpc_init_single_inst +ffffffff8202c570 T mpc1_init_mpcc_list_from_hw +ffffffff8202c840 T mpc1_read_mpcc_state +ffffffff8202c9d0 T mpc1_cursor_lock +ffffffff8202ca50 T mpc1_get_mpc_out_mux +ffffffff8202cad0 T dcn10_mpc_construct +ffffffff8202cc50 t mpc1_update_blending +ffffffff8202d000 T opp1_program_bit_depth_reduction +ffffffff8202d400 T opp1_set_dyn_expansion +ffffffff8202d570 T opp1_program_fmt +ffffffff8202d870 T opp1_program_stereo +ffffffff8202d9a0 T opp1_pipe_clock_control +ffffffff8202d9e0 T opp1_destroy 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optc1_disable_reset_trigger +ffffffff8202f5c0 T optc1_enable_reset_trigger +ffffffff8202f6d0 T optc1_enable_crtc_reset +ffffffff8202f830 T optc1_wait_for_state +ffffffff8202f900 T optc1_set_early_control +ffffffff8202f930 T optc1_set_static_screen_control +ffffffff8202f9d0 T optc1_set_drr +ffffffff8202fc00 T optc1_set_vtotal_min_max +ffffffff8202fca0 T optc1_get_crtc_scanoutpos +ffffffff8202fdb0 T optc1_program_stereo +ffffffff8202ffb0 T optc1_is_stereo_left_eye +ffffffff82030020 T optc1_get_hw_timing +ffffffff82030140 T optc1_read_otg_state +ffffffff82030450 T optc1_get_otg_active_size +ffffffff82030560 T optc1_clear_optc_underflow +ffffffff820305b0 T optc1_tg_init +ffffffff82030660 T optc1_is_tg_enabled +ffffffff820306d0 T optc1_is_optc_underflow_occurred +ffffffff82030740 T optc1_configure_crc +ffffffff820309d0 T optc1_get_crc +ffffffff82030ae0 T dcn10_timing_generator_init +ffffffff82030b50 t optc1_enable_crtc +ffffffff82030c50 t optc1_set_test_pattern +ffffffff82031330 t optc1_program_manual_trigger +ffffffff820313e0 t optc1_setup_manual_trigger +ffffffff82032000 T dcn10_find_first_free_match_stream_enc_for_link +ffffffff820320b0 T dcn10_create_resource_pool +ffffffff82033260 t dcn10_resource_construct_fp +ffffffff820333e0 t dcn10_resource_destruct +ffffffff820336f0 t dcn10_destroy_resource_pool +ffffffff82033750 t dcn10_panel_cntl_create +ffffffff820337e0 t dcn10_link_encoder_create +ffffffff820338e0 t dcn10_validate_bandwidth +ffffffff82033960 t dcn10_validate_global +ffffffff82033b40 t dcn10_acquire_idle_pipe_for_layer +ffffffff82033c80 t dcn10_validate_plane +ffffffff82033cd0 t dcn10_add_stream_to_ctx +ffffffff82033e90 t dcn10_patch_unknown_plane_state +ffffffff82033ef0 t read_dce_straps +ffffffff82033f20 t create_audio +ffffffff82033f50 t dcn10_stream_encoder_create +ffffffff82033ff0 t dcn10_hwseq_create +ffffffff820340a0 t dcn10_get_dcc_compression_cap +ffffffff82035000 T enc1_update_generic_info_packet +ffffffff82035430 T enc1_stream_encoder_dp_set_stream_attribute +ffffffff82035900 T enc1_stream_encoder_set_stream_attribute_helper +ffffffff82035980 T enc1_stream_encoder_hdmi_set_stream_attribute +ffffffff82035f70 T enc1_stream_encoder_dvi_set_stream_attribute +ffffffff82036100 T enc1_stream_encoder_set_throttled_vcp_size +ffffffff82036320 T enc1_stream_encoder_update_dp_info_packets +ffffffff820364c0 T enc1_stream_encoder_send_immediate_sdp_message +ffffffff820368d0 T enc1_stream_encoder_stop_dp_info_packets +ffffffff82036aa0 T enc1_stream_encoder_dp_blank +ffffffff82036c10 T enc1_stream_encoder_dp_unblank +ffffffff82036e20 T enc1_stream_encoder_set_avmute +ffffffff82036e60 T enc1_reset_hdmi_stream_attribute +ffffffff82036f30 T get_audio_clock_info +ffffffff82037020 T enc1_se_enable_audio_clock +ffffffff82037080 T enc1_se_enable_dp_audio +ffffffff82037150 T enc1_se_audio_mute_control +ffffffff820371a0 T enc1_se_dp_audio_setup +ffffffff820371b0 t enc1_se_audio_setup +ffffffff82037340 T enc1_se_dp_audio_enable +ffffffff82037590 T enc1_se_dp_audio_disable +ffffffff82037700 T enc1_se_hdmi_audio_setup +ffffffff82037bd0 T enc1_se_hdmi_audio_disable +ffffffff82037c60 T enc1_setup_stereo_sync +ffffffff82037ce0 T enc1_dig_connect_to_otg +ffffffff82037d20 T enc1_dig_source_otg +ffffffff82037d90 T enc1_stream_encoder_dp_get_pixel_format +ffffffff82037e80 T dcn10_stream_encoder_construct +ffffffff82037ee0 t enc1_stream_encoder_update_hdmi_info_packets +ffffffff82038290 t enc1_stream_encoder_stop_hdmi_info_packets +ffffffff82039000 T dccg2_update_dpp_dto +ffffffff82039160 T dccg2_get_dccg_ref_freq +ffffffff82039220 T dccg2_set_fifo_errdet_ovr_en +ffffffff82039260 T dccg2_otg_add_pixel +ffffffff82039300 T dccg2_otg_drop_pixel +ffffffff820393a0 T dccg2_init +ffffffff820393d0 T dccg2_create +ffffffff82039480 T dcn_dccg_destroy +ffffffff8203a000 T dpp20_read_state +ffffffff8203a1d0 T dpp2_power_on_obuf +ffffffff8203a2a0 T dpp2_dummy_program_input_lut +ffffffff8203a2d0 T dscl2_calc_lb_num_partitions +ffffffff8203a3f0 T dpp2_cnv_set_alpha_keyer +ffffffff8203a670 T dpp2_set_cursor_attributes +ffffffff8203a7d0 T oppn20_dummy_program_regamma_pwl +ffffffff8203a800 T dpp2_construct +ffffffff8203a880 t dpp2_cnv_setup +ffffffff8203c000 T dpp2_set_degamma_pwl +ffffffff8203c3b0 T dpp2_set_degamma +ffffffff8203c560 T dpp2_cm_set_gamut_remap +ffffffff8203c790 T dpp2_program_input_csc +ffffffff8203c9c0 T dpp20_program_blnd_lut +ffffffff8203d110 T dpp20_program_shaper +ffffffff8203f0a0 T dpp20_program_3dlut +ffffffff8203f7a0 t dpp20_set3dlut_ram12 +ffffffff8203f970 T dpp2_set_hdr_multiplier +ffffffff82040000 t dsc2_get_enc_caps +ffffffff82040080 t dsc2_read_state +ffffffff82040230 t dsc2_validate_stream +ffffffff82040290 t dsc2_set_config +ffffffff82041620 t dsc2_get_packed_pps +ffffffff820417c0 t dsc2_enable +ffffffff82041970 t dsc2_disable +ffffffff82041af0 t dsc2_disconnect +ffffffff82041b60 T dsc2_construct +ffffffff82041bb0 t dsc_prepare_config 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hubbub2_read_state +ffffffff82046eb0 T hubbub2_construct +ffffffff82046f10 t hubbub2_program_watermarks +ffffffff82048000 T hubp2_set_vm_system_aperture_settings +ffffffff820481e0 T hubp2_program_deadline +ffffffff82048930 T hubp2_vready_at_or_After_vsync +ffffffff820489d0 T hubp2_setup_interdependent +ffffffff82048e30 T hubp2_program_size +ffffffff82048fc0 T hubp2_program_rotation +ffffffff82049130 T hubp2_dcc_control +ffffffff820491f0 T hubp2_program_pixel_format +ffffffff820497c0 T hubp2_program_surface_config +ffffffff82049a00 T hubp2_get_lines_per_chunk +ffffffff82049ac0 T hubp2_cursor_set_attributes +ffffffff82049e80 T hubp2_dmdata_set_attributes +ffffffff8204a260 T hubp2_dmdata_load +ffffffff8204a2f0 T hubp2_dmdata_status_done +ffffffff8204a360 T hubp2_program_surface_flip_and_addr +ffffffff8204aab0 T hubp2_enable_triplebuffer +ffffffff8204ab80 T hubp2_is_triplebuffer_enabled +ffffffff8204ac00 T hubp2_set_flip_control_surface_gsl +ffffffff8204ac50 T hubp2_is_flip_pending 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dcn20_set_dmdata_attributes +ffffffff82052d10 T dcn20_init_vm_ctx +ffffffff82052dd0 T dcn20_init_sys_ctx +ffffffff82052e80 T dcn20_update_plane_addr +ffffffff82052fc0 T dcn20_unblank_stream +ffffffff82053140 T dcn20_setup_vupdate_interrupt +ffffffff820531b0 T dcn20_reset_hw_ctx_wrap +ffffffff82053550 T dcn20_update_visual_confirm_color +ffffffff82053660 T dcn20_update_mpcc +ffffffff820538e0 T dcn20_enable_stream +ffffffff82053ab0 T dcn20_program_dmdata_engine +ffffffff82053b50 T dcn20_fpga_init_hw +ffffffff82054150 T dcn20_optimize_timing_for_fsft +ffffffff82054190 T dcn20_set_disp_pattern_generator +ffffffff82055000 T dcn20_hw_sequencer_construct +ffffffff82056000 T enc2_fec_set_enable +ffffffff82056090 T enc2_fec_set_ready +ffffffff820560d0 T enc2_fec_is_active +ffffffff82056140 T link_enc2_read_state +ffffffff820561f0 T dcn20_link_encoder_enable_dp_output +ffffffff82056300 T dcn20_link_encoder_get_max_link_cap +ffffffff820563b0 T dcn20_link_encoder_is_in_alt_mode +ffffffff82056430 T enc2_hw_init +ffffffff82056510 T dcn20_link_encoder_construct +ffffffff82057000 T mmhubbub2_config_mcif_irq +ffffffff82057130 T mmhubbub2_enable_mcif +ffffffff82057170 T mmhubbub2_disable_mcif +ffffffff820571b0 T mcifwb2_dump_frame +ffffffff820572c0 t mmhubbub2_config_mcif_buf +ffffffff82057910 t mmhubbub2_config_mcif_arb +ffffffff82057d20 T dcn20_mmhubbub_construct +ffffffff82058000 T mpc2_update_blending +ffffffff820582a0 T mpc2_set_denorm +ffffffff82058310 T mpc2_set_denorm_clamp +ffffffff82058460 T mpc2_set_output_csc +ffffffff82058650 T mpc2_set_ocsc_default +ffffffff82058830 T mpc20_power_on_ogam_lut +ffffffff820588b0 T mpc2_set_output_gamma +ffffffff82059070 T mpc2_assert_idle_mpcc +ffffffff82059180 T mpc2_assert_mpcc_idle_before_connect +ffffffff820593d0 t mpc2_get_mpcc_for_dpp +ffffffff82059490 T dcn20_mpc_construct +ffffffff8205a000 T opp2_set_disp_pattern_generator +ffffffff8205a810 T opp2_dpg_set_blank_color +ffffffff8205a990 T opp2_program_dpg_dimensions +ffffffff8205aa20 T opp2_dpg_is_blanked +ffffffff8205aae0 T opp2_program_left_edge_extra_pixel +ffffffff8205ab30 T dcn20_opp_construct +ffffffff8205b000 T optc2_enable_crtc +ffffffff8205b100 T optc2_set_gsl +ffffffff8205b1f0 T optc2_set_gsl_source_select +ffffffff8205b2b0 T optc2_set_dsc_config +ffffffff8205b380 T optc2_get_dsc_status +ffffffff8205b3c0 T optc2_is_two_pixels_per_containter +ffffffff8205b3d0 T optc2_set_odm_bypass +ffffffff8205b510 T optc2_set_odm_combine +ffffffff8205b700 T optc2_get_optc_source +ffffffff8205b7d0 T optc2_triplebuffer_lock +ffffffff8205b8f0 T optc2_triplebuffer_unlock +ffffffff8205b9a0 T optc2_lock_doublebuffer_enable +ffffffff8205bb80 T optc2_lock_doublebuffer_disable +ffffffff8205bc60 T optc2_setup_manual_trigger +ffffffff8205bd80 T optc2_program_manual_trigger +ffffffff8205bdf0 T optc2_configure_crc +ffffffff8205be80 T optc2_get_last_used_drr_vtotal +ffffffff8205bec0 T dcn20_timing_generator_init +ffffffff8205bf30 t optc2_set_dwb_source +ffffffff8205bfc0 t optc2_align_vblanks +ffffffff8205d000 T dcn20_dpp_destroy +ffffffff8205d050 T dcn20_dpp_create +ffffffff8205d120 T dcn20_ipp_create +ffffffff8205d1e0 T dcn20_opp_create +ffffffff8205d2a0 T dcn20_aux_engine_create +ffffffff8205d340 T dcn20_i2c_hw_create +ffffffff8205d3d0 T dcn20_mpc_create +ffffffff8205d460 T dcn20_hubbub_create +ffffffff8205d530 T dcn20_timing_generator_create +ffffffff8205d5d0 T dcn20_link_encoder_create +ffffffff8205d6d0 T dcn20_stream_encoder_create +ffffffff8205d790 T dcn20_hwseq_create +ffffffff8205d800 T dcn20_clock_source_destroy +ffffffff8205d850 T dcn20_dsc_create +ffffffff8205d910 T dcn20_dsc_destroy +ffffffff8205d960 T dcn20_hubp_create +ffffffff8205da30 T dcn20_build_mapped_resource +ffffffff8205dc50 T dcn20_acquire_dsc +ffffffff8205dd90 T dcn20_release_dsc +ffffffff8205de00 T dcn20_add_dsc_to_stream_resource +ffffffff8205df50 T dcn20_add_stream_to_ctx +ffffffff8205e0e0 T dcn20_remove_stream_from_ctx +ffffffff8205e1e0 T dcn20_split_stream_for_odm +ffffffff8205e690 T dcn20_split_stream_for_mpc +ffffffff8205e810 T dcn20_calc_max_scaled_time +ffffffff8205e890 T dcn20_set_mcif_arb_params +ffffffff8205ea00 T dcn20_validate_dsc +ffffffff8205eb90 T dcn20_find_secondary_pipe +ffffffff8205ed70 T dcn20_merge_pipes_for_validate +ffffffff8205f010 T dcn20_validate_apply_pipe_split_flags +ffffffff8205f800 T dcn20_fast_validate_bw +ffffffff8205fd10 T dcn20_validate_bandwidth +ffffffff8205fd90 T dcn20_acquire_idle_pipe_for_layer +ffffffff8205fea0 T dcn20_get_dcc_compression_cap +ffffffff8205fed0 T dcn20_patch_unknown_plane_state +ffffffff8205ff30 T dcn20_dwbc_create +ffffffff82060050 T dcn20_mmhubbub_create +ffffffff820601b0 T dcn20_create_resource_pool +ffffffff82061a00 t dcn20_resource_destruct +ffffffff82061ea0 t dcn20_destroy_resource_pool +ffffffff82061f00 t dcn20_panel_cntl_create +ffffffff82061f90 t read_dce_straps +ffffffff82061fc0 t dcn20_create_audio +ffffffff82062000 T enc2_set_dynamic_metadata +ffffffff82062280 T enc2_stream_encoder_dp_unblank +ffffffff820625b0 T enc2_stream_encoder_dp_set_stream_attribute +ffffffff82062610 T enc2_get_fifo_cal_average_level +ffffffff82062670 T dcn20_stream_encoder_construct +ffffffff820626d0 t enc2_stream_encoder_update_hdmi_info_packets +ffffffff820627a0 t enc2_stream_encoder_stop_hdmi_info_packets +ffffffff82062aa0 t enc2_stream_encoder_update_dp_info_packets +ffffffff82062b50 t enc2_read_state +ffffffff82062cd0 t enc2_dp_set_dsc_config +ffffffff82062da0 t enc2_dp_set_dsc_pps_info_packet +ffffffff82063270 t enc2_dp_set_odm_combine +ffffffff820632b0 t enc2_update_hdmi_info_packet +ffffffff82064000 T dcn20_vmid_setup +ffffffff82065000 T dccg201_create +ffffffff820650b0 t dccg201_update_dpp_dto +ffffffff82066000 T dpp201_construct +ffffffff82066080 t dpp201_get_optimal_number_of_taps +ffffffff82066460 t dpp201_cnv_setup +ffffffff82067000 T hubbub201_construct +ffffffff82067060 t hubbub201_program_watermarks +ffffffff82068000 T dcn201_hubp_construct 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optc201_triplebuffer_unlock +ffffffff8206f230 t optc201_triplebuffer_lock +ffffffff8206f350 t optc201_get_optc_source +ffffffff82070000 T dcn201_create_resource_pool +ffffffff82070a40 t dcn201_resource_destruct +ffffffff82070d30 t dcn201_destroy_resource_pool +ffffffff82070d90 t dcn201_link_init +ffffffff82070de0 t dcn201_link_encoder_create +ffffffff82070ea0 t dcn201_acquire_idle_pipe_for_layer +ffffffff82070fb0 t dcn201_populate_dml_writeback_from_context +ffffffff82071010 t read_dce_straps +ffffffff82071040 t dcn201_create_audio +ffffffff82071070 t dcn201_stream_encoder_create +ffffffff82071110 t dcn201_hwseq_create +ffffffff82071180 t dcn201_get_dcc_compression_cap +ffffffff82072000 T dccg21_update_dpp_dto +ffffffff82072120 T dccg21_create +ffffffff82073000 T dcn21_dchvm_init +ffffffff82073200 T hubbub21_init_dchub +ffffffff820733e0 T hubbub21_program_urgent_watermarks +ffffffff82073bd0 T hubbub21_program_stutter_watermarks +ffffffff820740c0 T hubbub21_program_pstate_watermarks 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dpp3_program_cm_dealpha +ffffffff8208b0a0 T dpp3_program_cm_bias +ffffffff8208b190 T dpp3_program_gamcor_lut +ffffffff8208bbd0 t dpp3_power_on_gamcor_lut +ffffffff8208bd00 T dpp3_set_hdr_multiplier +ffffffff8208bd50 T dpp3_cm_set_gamut_remap +ffffffff8208c000 T dwb3_config_fc +ffffffff8208c1b0 T dwb3_set_stereo +ffffffff8208c270 T dwb3_enable +ffffffff8208c3a0 T dwb3_set_denorm +ffffffff8208c4c0 T dwb3_disable +ffffffff8208c570 T dwb3_update +ffffffff8208c6a0 T dwb3_is_enabled +ffffffff8208c740 T dwb3_set_new_content +ffffffff8208c780 t dwb3_get_caps +ffffffff8208c820 T dcn30_dwbc_construct +ffffffff8208c870 T dwb3_set_host_read_rate_control +ffffffff8208d000 T dwb3_ogam_set_input_transfer_func +ffffffff8208d9d0 T dwb3_set_gamut_remap +ffffffff8208db30 t dwb3_program_gamut_remap +ffffffff8208dcc0 T dwb3_program_hdr_mult +ffffffff8208e000 T hubbub3_init_dchub_sys_ctx +ffffffff8208e1e0 T hubbub3_program_watermarks +ffffffff8208e2f0 T hubbub3_dcc_support_swizzle +ffffffff8208e3c0 T hubbub3_get_dcc_compression_cap +ffffffff8208e5b0 T hubbub3_force_wm_propagate_to_pipes +ffffffff8208e660 T hubbub3_force_pstate_change_control +ffffffff8208e6e0 T hubbub3_init_watermarks +ffffffff8208ea20 T hubbub3_construct +ffffffff8208f000 T hubp3_set_vm_system_aperture_settings +ffffffff8208f130 T hubp3_program_surface_flip_and_addr +ffffffff8208fb60 T hubp3_dcc_control +ffffffff8208fc20 T hubp3_dcc_control_sienna_cichlid +ffffffff8208fd30 T hubp3_dmdata_set_attributes +ffffffff8208ff30 T hubp3_program_surface_config +ffffffff82090230 T hubp3_read_state +ffffffff82090480 T hubp3_setup +ffffffff82090510 T hubp3_init +ffffffff82090540 T hubp3_construct +ffffffff82091000 T dcn30_set_blend_lut +ffffffff82091070 T dcn30_set_input_transfer_func +ffffffff820911d0 T dcn30_set_output_transfer_func +ffffffff820914f0 T dcn30_update_writeback +ffffffff82091580 t dcn30_set_writeback +ffffffff82091730 T dcn30_mmhubbub_warmup +ffffffff820919e0 T dcn30_enable_writeback +ffffffff82091ab0 T dcn30_disable_writeback +ffffffff82091b90 T dcn30_program_all_writeback_pipes_in_tree +ffffffff82091e80 T dcn30_init_hw +ffffffff82092770 T dcn30_set_avmute +ffffffff820927d0 T dcn30_update_info_frame +ffffffff820928a0 T dcn30_program_dmdata_engine +ffffffff82092940 T dcn30_apply_idle_power_optimizations +ffffffff82092ec0 T dcn30_does_plane_fit_in_mall +ffffffff82092f70 T dcn30_hardware_release +ffffffff82093080 T dcn30_set_disp_pattern_generator +ffffffff820930f0 T dcn30_prepare_bandwidth +ffffffff82094000 T dcn30_hw_sequencer_construct +ffffffff82095000 t mmhubbub3_warmup_mcif +ffffffff82095210 t mmhubbub3_config_mcif_buf +ffffffff820956c0 t mmhubbub3_config_mcif_arb +ffffffff82095b10 T dcn30_mmhubbub_construct +ffffffff82096000 T mpc3_is_dwb_idle +ffffffff82096070 T mpc3_set_dwb_mux +ffffffff820960f0 T mpc3_disable_dwb_mux +ffffffff82096170 T mpc3_set_out_rate_control +ffffffff82096280 T mpc3_get_ogam_current +ffffffff82096320 T mpc3_power_on_ogam_lut +ffffffff820963f0 T mpc3_set_output_gamma +ffffffff82096f90 T mpc3_set_denorm +ffffffff82097000 T mpc3_set_denorm_clamp +ffffffff82097150 T mpc3_program_shaper +ffffffff820993c0 t mpc3_power_on_shaper_3dlut +ffffffff82099740 T mpc3_init_mpcc +ffffffff820997c0 T mpc3_set_gamut_remap +ffffffff82099a10 T mpc3_program_3dlut +ffffffff8209a1a0 t mpc3_set3dlut_ram12 +ffffffff8209a380 T mpc3_set_output_csc +ffffffff8209a4f0 T mpc3_set_ocsc_default +ffffffff8209a660 T mpc3_set_rmu_mux +ffffffff8209a700 T mpc3_get_rmu_mux_status +ffffffff8209a7b0 T mpcc3_acquire_rmu +ffffffff8209a910 t mpcc3_release_rmu +ffffffff8209aa80 t mpc3_set_mpc_mem_lp_mode +ffffffff8209ac10 T dcn30_mpc_construct +ffffffff8209b000 T optc3_triplebuffer_lock +ffffffff8209b120 T optc3_lock_doublebuffer_enable +ffffffff8209b3b0 T optc3_lock_doublebuffer_disable +ffffffff8209b4c0 T optc3_lock +ffffffff8209b590 T optc3_set_out_mux +ffffffff8209b5d0 T optc3_program_blank_color +ffffffff8209b710 T optc3_set_drr_trigger_window +ffffffff8209b7a0 T optc3_set_vtotal_change_limit +ffffffff8209b810 T optc3_set_dsc_config +ffffffff8209b860 T optc3_set_odm_bypass +ffffffff8209b9e0 T optc3_wait_drr_doublebuffer_pending_clear +ffffffff8209ba60 T optc3_set_vtotal_min_max +ffffffff8209baa0 T optc3_tg_init +ffffffff8209bb00 T dcn30_timing_generator_init +ffffffff8209bb70 t optc3_set_odm_combine +ffffffff8209c000 T dcn30_add_stream_to_ctx +ffffffff8209c020 T dcn30_populate_dml_pipes_from_context +ffffffff8209c110 T dcn30_populate_dml_writeback_from_context +ffffffff8209c170 T dcn30_calc_max_scaled_time +ffffffff8209c1d0 T dcn30_set_mcif_arb_params +ffffffff8209c340 T dcn30_acquire_post_bldn_3dlut +ffffffff8209c4c0 T dcn30_release_post_bldn_3dlut +ffffffff8209c570 T dcn30_internal_validate_bw +ffffffff8209d340 t dcn30_split_stream_for_mpc_or_odm +ffffffff8209d660 T dcn30_can_support_mclk_switch_using_fw_based_vblank_stretch +ffffffff8209d780 T dcn30_setup_mclk_switch_using_fw_based_vblank_stretch +ffffffff8209d820 T dcn30_update_soc_for_wm_a +ffffffff8209d870 T dcn30_calculate_wm_and_dlg +ffffffff8209d8e0 T dcn30_validate_bandwidth +ffffffff8209dd20 T dcn30_update_bw_bounding_box +ffffffff8209e500 T dcn30_create_resource_pool +ffffffff8209fad0 t dcn30_resource_destruct +ffffffff820a0040 t dcn30_destroy_resource_pool +ffffffff820a00a0 t dcn30_panel_cntl_create +ffffffff820a0130 t dcn30_link_encoder_create +ffffffff820a01f0 t dcn30_get_panel_config_defaults +ffffffff820a0260 t read_dce_straps +ffffffff820a0290 t dcn30_create_audio +ffffffff820a02c0 t dcn30_stream_encoder_create +ffffffff820a0440 t dcn30_hwseq_create +ffffffff820a1000 T vpg3_update_generic_info_packet +ffffffff820a19a0 T vpg3_construct +ffffffff820a2000 T dccg301_create +ffffffff820a3000 T dcn301_link_encoder_construct +ffffffff820a4000 T hubbub301_construct +ffffffff820a5000 T dcn301_hw_sequencer_construct +ffffffff820a6000 T dcn301_panel_cntl_construct +ffffffff820a6050 t dcn301_panel_cntl_destroy +ffffffff820a60a0 t dcn301_panel_cntl_hw_init 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dcn302_destroy_resource_pool +ffffffff820ac940 t dcn302_panel_cntl_create +ffffffff820ac9d0 t dcn302_link_encoder_create +ffffffff820aca90 t dcn302_get_panel_config_defaults +ffffffff820acb00 t read_dce_straps +ffffffff820acb30 t dcn302_create_audio +ffffffff820acb60 t dcn302_stream_encoder_create +ffffffff820acce0 t dcn302_hwseq_create +ffffffff820ad000 T dcn303_dpp_pg_control +ffffffff820ad030 T dcn303_hubp_pg_control +ffffffff820ad060 T dcn303_dsc_pg_control +ffffffff820ad090 T dcn303_enable_power_gating_plane +ffffffff820ae000 T dcn303_hw_sequencer_construct +ffffffff820af000 T dcn303_update_bw_bounding_box +ffffffff820af050 T dcn303_create_resource_pool +ffffffff820b0290 t dcn303_resource_destruct +ffffffff820b07b0 t dcn303_destroy_resource_pool +ffffffff820b0800 t dcn303_panel_cntl_create +ffffffff820b0890 t dcn303_link_encoder_create +ffffffff820b0950 t dcn303_get_panel_config_defaults +ffffffff820b09c0 t read_dce_straps +ffffffff820b09f0 t dcn303_create_audio +ffffffff820b0a20 t dcn303_stream_encoder_create +ffffffff820b0ba0 t dcn303_hwseq_create +ffffffff820b1000 T afmt31_powerdown +ffffffff820b1090 T afmt31_poweron +ffffffff820b1120 T afmt31_construct +ffffffff820b2000 T apg31_construct +ffffffff820b2050 t apg31_se_audio_setup +ffffffff820b2160 t apg31_audio_mute_control +ffffffff820b21a0 t apg31_enable +ffffffff820b22b0 t apg31_disable +ffffffff820b3000 T dccg31_update_dpp_dto +ffffffff820b3160 T dccg31_set_dpstreamclk +ffffffff820b32f0 t dccg31_disable_dpstreamclk +ffffffff820b3440 T dccg31_enable_symclk32_se +ffffffff820b3730 T dccg31_disable_symclk32_se +ffffffff820b3a00 T dccg31_enable_symclk32_le +ffffffff820b3bd0 T dccg31_disable_symclk32_le +ffffffff820b3d70 T dccg31_disable_dscclk +ffffffff820b3f30 T dccg31_enable_dscclk +ffffffff820b4100 T dccg31_set_physymclk +ffffffff820b4620 T dccg31_set_dtbclk_dto +ffffffff820b48d0 T dccg31_set_audio_dtbclk_dto +ffffffff820b49e0 T dccg31_get_dccg_ref_freq +ffffffff820b4a10 T dccg31_set_dispclk_change_mode +ffffffff820b4a60 T dccg31_init +ffffffff820b4fc0 T dccg31_otg_add_pixel +ffffffff820b5000 T dccg31_otg_drop_pixel +ffffffff820b5040 T dccg31_create +ffffffff820b6000 T dcn31_link_encoder_set_dio_phy_mux +ffffffff820b6390 T dcn31_link_encoder_construct +ffffffff820b6590 T dcn31_link_encoder_construct_minimal +ffffffff820b6610 T dcn31_link_encoder_enable_dp_output +ffffffff820b6850 T dcn31_link_encoder_enable_dp_mst_output +ffffffff820b6a90 T dcn31_link_encoder_disable_output +ffffffff820b6d20 T dcn31_link_encoder_is_in_alt_mode +ffffffff820b6e60 T dcn31_link_encoder_get_max_link_cap +ffffffff820b6fd0 t enc31_hw_init +ffffffff820b8000 T dcn31_hpo_dp_link_enc_enable +ffffffff820b8160 T dcn31_hpo_dp_link_enc_disable +ffffffff820b81d0 T dcn31_hpo_dp_link_enc_set_link_test_pattern +ffffffff820b8b00 T dcn31_hpo_dp_link_enc_update_stream_allocation_table +ffffffff820b8d90 T dcn31_hpo_dp_link_enc_set_throttled_vcp_size +ffffffff820b9030 T dcn31_hpo_dp_link_enc_read_state +ffffffff820b92e0 T dcn31_hpo_dp_link_enc_enable_dp_output +ffffffff820b93e0 T dcn31_hpo_dp_link_enc_disable_output +ffffffff820b9520 T dcn31_hpo_dp_link_enc_set_ffe +ffffffff820b9610 T hpo_dp_link_encoder31_construct +ffffffff820b9670 t dcn31_hpo_dp_link_enc_is_in_alt_mode +ffffffff820ba000 T dcn31_hpo_dp_stream_encoder_construct +ffffffff820ba070 t dcn31_hpo_dp_stream_enc_enable_stream +ffffffff820ba1b0 t dcn31_hpo_dp_stream_enc_dp_unblank +ffffffff820ba460 t dcn31_hpo_dp_stream_enc_dp_blank +ffffffff820ba560 t dcn31_hpo_dp_stream_enc_disable +ffffffff820ba5d0 t dcn31_hpo_dp_stream_enc_set_stream_attribute +ffffffff820bae80 t dcn31_hpo_dp_stream_enc_update_dp_info_packets +ffffffff820bb040 t dcn31_hpo_dp_stream_enc_stop_dp_info_packets +ffffffff820bb1d0 t dcn31_hpo_dp_stream_enc_set_dsc_pps_info_packet +ffffffff820bb470 t dcn31_hpo_dp_stream_enc_map_stream_to_link +ffffffff820bb570 t dcn31_hpo_dp_stream_enc_mute_control +ffffffff820bb5e0 t dcn31_hpo_dp_stream_enc_audio_setup +ffffffff820bb690 t dcn31_hpo_dp_stream_enc_audio_enable +ffffffff820bb760 t dcn31_hpo_dp_stream_enc_audio_disable +ffffffff820bb910 t dcn31_hpo_dp_stream_enc_read_state +ffffffff820bbaa0 t dcn31_set_hblank_min_symbol_width +ffffffff820bc000 T hubbub31_init_dchub_sys_ctx +ffffffff820bc1f0 T hubbub31_construct +ffffffff820bc290 t hubbub31_get_dcc_compression_cap +ffffffff820bc480 t hubbub31_get_dchub_ref_freq +ffffffff820bc560 t hubbub31_program_watermarks +ffffffff820bde20 t hubbub31_verify_allow_pstate_change_high +ffffffff820bdfe0 t dcn31_program_det_size +ffffffff820be1c0 t dcn31_program_compbuf_size +ffffffff820be440 t dcn31_init_crb +ffffffff820bf000 T hubp31_set_unbounded_requesting +ffffffff820bf090 T hubp31_soft_reset +ffffffff820bf0e0 T hubp31_construct +ffffffff820bf150 t hubp31_program_extended_blank +ffffffff820c0000 T dcn31_init_hw +ffffffff820c0960 T dcn31_dsc_pg_control +ffffffff820c0cb0 T dcn31_enable_power_gating_plane +ffffffff820c0f10 T dcn31_update_info_frame +ffffffff820c0fe0 T dcn31_z10_save_init +ffffffff820c10a0 T dcn31_z10_restore +ffffffff820c1180 T dcn31_hubp_pg_control +ffffffff820c14a0 T dcn31_init_sys_ctx +ffffffff820c1550 T dcn31_reset_hw_ctx_wrap +ffffffff820c18c0 T dcn31_setup_hpo_hw_control +ffffffff820c2000 T dcn31_hw_sequencer_construct +ffffffff820c3000 T optc31_immediate_disable_crtc +ffffffff820c3100 T optc31_set_drr +ffffffff820c3320 T optc3_init_odm +ffffffff820c3490 T dcn31_timing_generator_init +ffffffff820c3500 t optc31_enable_crtc +ffffffff820c3600 t optc31_disable_crtc +ffffffff820c36e0 t optc31_set_odm_combine +ffffffff820c4000 T dcn31_panel_cntl_construct +ffffffff820c4040 t dcn31_panel_cntl_destroy +ffffffff820c4090 t dcn31_panel_cntl_hw_init +ffffffff820c4180 t dcn31_is_panel_backlight_on +ffffffff820c4220 t dcn31_is_panel_powered_on +ffffffff820c42d0 t dcn31_store_backlight_level +ffffffff820c4390 t dcn31_get_16_bit_backlight_from_pwm +ffffffff820c5000 T dcn31_populate_dml_pipes_from_context +ffffffff820c5350 T dcn31_calculate_wm_and_dlg +ffffffff820c53c0 T dcn31_populate_dml_writeback_from_context +ffffffff820c5420 T dcn31_set_mcif_arb_params +ffffffff820c5480 T dcn31_validate_bandwidth +ffffffff820c5870 T dcn31_create_resource_pool +ffffffff820c6c10 t dcn31_resource_destruct +ffffffff820c7270 t dcn31_destroy_resource_pool +ffffffff820c72d0 t dcn31_panel_cntl_create +ffffffff820c7340 t dcn31_link_encoder_create +ffffffff820c7400 t dcn31_link_enc_create_minimal +ffffffff820c74a0 t dcn31_get_panel_config_defaults +ffffffff820c7520 t read_dce_straps +ffffffff820c7550 t dcn31_create_audio +ffffffff820c7580 t dcn31_stream_encoder_create +ffffffff820c7700 t dcn31_hpo_dp_stream_encoder_create +ffffffff820c78c0 t dcn31_hpo_dp_link_encoder_create +ffffffff820c7950 t dcn31_hwseq_create +ffffffff820c8000 T vpg31_powerdown +ffffffff820c8090 T vpg31_poweron +ffffffff820c8120 T vpg31_construct +ffffffff820c9000 T dccg314_create +ffffffff820c90b0 t dccg314_set_dpstreamclk +ffffffff820c9480 t dccg314_set_dtbclk_dto +ffffffff820c9670 t dccg314_set_pixel_rate_div +ffffffff820c99e0 t dccg314_set_valid_pixel_rate +ffffffff820c9a50 t dccg314_dpp_root_clock_control +ffffffff820ca000 T dcn314_dio_stream_encoder_construct +ffffffff820ca070 t enc314_stream_encoder_hdmi_set_stream_attribute +ffffffff820ca660 t enc314_stream_encoder_dvi_set_stream_attribute +ffffffff820ca870 t enc314_stream_encoder_dp_blank +ffffffff820ca8c0 t enc314_stream_encoder_dp_unblank +ffffffff820cac00 t enc314_read_state +ffffffff820cad60 t enc314_dp_set_dsc_config +ffffffff820cadb0 t enc314_dp_set_odm_combine +ffffffff820cadf0 t enc314_set_dig_input_mode +ffffffff820cae40 t enc314_enable_fifo +ffffffff820caee0 t enc314_disable_fifo +ffffffff820caf30 t enc314_reset_fifo +ffffffff820cc000 T dcn314_update_odm +ffffffff820cc610 T dcn314_dsc_pg_control +ffffffff820cc9e0 T dcn314_enable_power_gating_plane +ffffffff820ccc70 T dcn314_calculate_dccg_k1_k2_values +ffffffff820cce00 T dcn314_set_pixels_per_cycle +ffffffff820ccef0 T dcn314_dpp_root_clock_control +ffffffff820ccf50 T dcn314_hubp_pg_control +ffffffff820ce000 T dcn314_hw_sequencer_construct +ffffffff820cf000 T dcn314_timing_generator_init +ffffffff820cf070 t optc314_enable_crtc +ffffffff820cf170 t optc314_disable_crtc +ffffffff820cf250 t optc314_phantom_crtc_post_enable +ffffffff820cf310 t optc314_set_odm_bypass +ffffffff820cf480 t optc314_set_odm_combine +ffffffff820cf780 t optc314_set_h_timing_div_manual_mode +ffffffff820d0000 T dcn314_validate_bandwidth +ffffffff820d04a0 T dcn314_create_resource_pool +ffffffff820d1780 t dcn314_resource_destruct +ffffffff820d1de0 t dcn314_destroy_resource_pool +ffffffff820d1e40 t dcn31_panel_cntl_create +ffffffff820d1eb0 t dcn31_link_encoder_create +ffffffff820d1f70 t dcn31_link_enc_create_minimal +ffffffff820d2010 t dcn314_populate_dml_pipes_from_context +ffffffff820d20a0 t dcn314_update_bw_bounding_box +ffffffff820d20f0 t dcn314_get_panel_config_defaults +ffffffff820d2170 t read_dce_straps +ffffffff820d21a0 t dcn31_create_audio +ffffffff820d21d0 t dcn314_stream_encoder_create +ffffffff820d2350 t dcn31_hpo_dp_stream_encoder_create +ffffffff820d2510 t dcn31_hpo_dp_link_encoder_create +ffffffff820d25a0 t dcn314_hwseq_create +ffffffff820d3000 T dcn315_create_resource_pool +ffffffff820d4270 t dcn315_resource_destruct +ffffffff820d48d0 t dcn315_destroy_resource_pool +ffffffff820d4930 t dcn31_panel_cntl_create +ffffffff820d49a0 t dcn31_link_encoder_create +ffffffff820d4a60 t dcn31_link_enc_create_minimal +ffffffff820d4b00 t dcn315_populate_dml_pipes_from_context +ffffffff820d51a0 t dcn315_get_panel_config_defaults +ffffffff820d5220 t read_dce_straps +ffffffff820d5250 t dcn31_create_audio +ffffffff820d5280 t dcn315_stream_encoder_create +ffffffff820d5400 t dcn31_hpo_dp_stream_encoder_create +ffffffff820d55c0 t dcn31_hpo_dp_link_encoder_create +ffffffff820d5650 t dcn31_hwseq_create +ffffffff820d6000 T dcn316_create_resource_pool +ffffffff820d72b0 t dcn316_resource_destruct +ffffffff820d7910 t dcn316_destroy_resource_pool +ffffffff820d7970 t dcn31_panel_cntl_create +ffffffff820d79e0 t dcn31_link_encoder_create +ffffffff820d7aa0 t dcn31_link_enc_create_minimal +ffffffff820d7b40 t dcn316_populate_dml_pipes_from_context +ffffffff820d7e70 t dcn316_get_panel_config_defaults +ffffffff820d7ef0 t read_dce_straps +ffffffff820d7f20 t dcn31_create_audio +ffffffff820d7f50 t dcn316_stream_encoder_create +ffffffff820d80d0 t dcn31_hpo_dp_stream_encoder_create +ffffffff820d8290 t dcn31_hpo_dp_link_encoder_create +ffffffff820d8320 t dcn31_hwseq_create +ffffffff820d9000 T dccg32_create +ffffffff820d90b0 t dccg32_get_dccg_ref_freq +ffffffff820d90e0 t dccg32_otg_add_pixel +ffffffff820d9120 t dccg32_otg_drop_pixel +ffffffff820d9160 t dccg32_set_dpstreamclk +ffffffff820d9530 t dccg32_set_dtbclk_dto +ffffffff820d9730 t dccg32_set_pixel_rate_div +ffffffff820d9b00 t dccg32_set_valid_pixel_rate +ffffffff820da000 T enc32_hw_init +ffffffff820da090 T dcn32_link_encoder_enable_dp_output +ffffffff820da0e0 T dcn32_link_encoder_construct +ffffffff820da2c0 t dcn32_link_encoder_is_in_alt_mode +ffffffff820da340 t dcn32_link_encoder_get_max_link_cap +ffffffff820db000 T dcn32_dio_stream_encoder_construct +ffffffff820db070 t enc32_stream_encoder_hdmi_set_stream_attribute +ffffffff820db5a0 t enc32_stream_encoder_dvi_set_stream_attribute +ffffffff820db720 t enc32_stream_encoder_dp_unblank +ffffffff820dbbe0 t enc32_read_state +ffffffff820dbd40 t enc32_dp_set_dsc_config +ffffffff820dbd90 t enc32_dp_set_odm_combine +ffffffff820dbdd0 t enc32_set_dig_input_mode +ffffffff820dc000 T dpp32_construct +ffffffff820dc060 t dscl32_calc_lb_num_partitions +ffffffff820dd000 T hpo_dp_link_encoder32_construct +ffffffff820dd060 t dcn32_hpo_dp_link_enc_is_in_alt_mode +ffffffff820de000 T dcn32_program_det_size +ffffffff820de1a0 T hubbub32_program_urgent_watermarks +ffffffff820de910 T hubbub32_program_stutter_watermarks +ffffffff820ded60 T hubbub32_program_pstate_watermarks +ffffffff820df1f0 T hubbub32_program_usr_watermarks +ffffffff820df440 T hubbub32_force_usr_retraining_allow +ffffffff820df4c0 T hubbub32_force_wm_propagate_to_pipes +ffffffff820df560 T hubbub32_construct +ffffffff820df5e0 t hubbub32_wm_read_state +ffffffff820dfa60 t hubbub32_program_watermarks +ffffffff820dfb70 t hubbub32_init_watermarks +ffffffff820dffb0 t dcn32_program_compbuf_size +ffffffff820e0230 t dcn32_init_crb +ffffffff820e1000 T hubp32_update_force_pstate_disallow +ffffffff820e1090 T hubp32_update_mall_sel +ffffffff820e1120 T hubp32_prepare_subvp_buffering +ffffffff820e11c0 T hubp32_phantom_hubp_post_enable +ffffffff820e12d0 T hubp32_cursor_set_attributes +ffffffff820e1590 T hubp32_construct +ffffffff820e2000 T dcn32_dsc_pg_control +ffffffff820e2310 T dcn32_enable_power_gating_plane +ffffffff820e24b0 T dcn32_hubp_pg_control +ffffffff820e2720 T dcn32_apply_idle_power_optimizations +ffffffff820e2990 t dcn32_calculate_cab_allocation +ffffffff820e2d40 T dcn32_commit_subvp_config +ffffffff820e2df0 T dcn32_subvp_pipe_control_lock +ffffffff820e2fc0 T dcn32_set_mcm_luts +ffffffff820e3150 T dcn32_set_input_transfer_func +ffffffff820e3290 T dcn32_set_output_transfer_func +ffffffff820e34a0 T dcn32_subvp_update_force_pstate +ffffffff820e3610 T dcn32_update_mall_sel +ffffffff820e3790 T dcn32_program_mall_pipe_config +ffffffff820e3870 T dcn32_init_hw +ffffffff820e4080 T dcn32_update_odm +ffffffff820e4690 T dcn32_calculate_dccg_k1_k2_values +ffffffff820e4890 T dcn32_is_dp_dig_pixel_rate_div_policy +ffffffff820e4920 T dcn32_set_pixels_per_cycle +ffffffff820e4a60 T dcn32_unblank_stream +ffffffff820e4c30 T dcn32_disable_link_output +ffffffff820e4ec0 T dcn32_update_phantom_vp_position +ffffffff820e4fe0 T dcn32_dsc_pg_status +ffffffff820e50c0 T dcn32_update_dsc_pg +ffffffff820e6000 T dcn32_hw_sequencer_init_functions +ffffffff820e7000 t mmhubbub32_warmup_mcif +ffffffff820e7210 t mmhubbub32_config_mcif_buf +ffffffff820e76c0 t mmhubbub32_config_mcif_arb +ffffffff820e7ad0 T dcn32_mmhubbub_construct +ffffffff820e8000 t mpc32_mpc_init +ffffffff820e8220 t mpc32_program_post1dlut +ffffffff820e8d00 t mpc32_program_shaper +ffffffff820eafb0 t mpc32_program_3dlut +ffffffff820eb8a0 T dcn32_mpc_construct +ffffffff820eb960 t mpc32_power_on_shaper_3dlut +ffffffff820ebb90 t mpc32_set3dlut_ram12 +ffffffff820ec000 T optc32_set_h_timing_div_manual_mode +ffffffff820ec040 T dcn32_timing_generator_init +ffffffff820ec0b0 t optc32_enable_crtc +ffffffff820ec1b0 t optc32_disable_crtc +ffffffff820ec290 t optc32_phantom_crtc_post_enable +ffffffff820ec350 t optc32_disable_phantom_otg +ffffffff820ec390 t optc32_set_drr +ffffffff820ec5e0 t optc32_set_odm_bypass +ffffffff820ec750 t optc32_set_odm_combine +ffffffff820ed000 T dcn32_panel_cntl_create +ffffffff820ed070 T dcn32_acquire_post_bldn_3dlut +ffffffff820ed160 T dcn32_release_post_bldn_3dlut +ffffffff820ed210 T dcn32_retain_phantom_pipes +ffffffff820ed2e0 T dcn32_remove_phantom_pipes +ffffffff820ed450 T dcn32_add_phantom_pipes +ffffffff820ed890 T dcn32_validate_bandwidth +ffffffff820edd50 T dcn32_populate_dml_pipes_from_context +ffffffff820ee130 T dcn32_calculate_wm_and_dlg +ffffffff820ee1a0 T dcn32_create_resource_pool +ffffffff820ee250 t dcn32_resource_construct +ffffffff820fa680 T dcn32_acquire_idle_pipe_for_head_pipe_in_layer +ffffffff820fa8c0 T dcn32_calc_num_avail_chans_for_mall +ffffffff820fa930 t dcn32_mpc_create +ffffffff820ff2f0 t dcn32_resource_destruct +ffffffff820ff960 t dcn32_destroy_resource_pool +ffffffff820ff9c0 t dcn32_link_encoder_create +ffffffff82100920 t dcn32_update_bw_bounding_box +ffffffff82100970 t read_dce_straps +ffffffff821009a0 t dcn32_create_audio +ffffffff82100ce0 t dcn32_stream_encoder_create +ffffffff82102b60 t dcn32_hpo_dp_stream_encoder_create +ffffffff82103840 t dcn32_hpo_dp_link_encoder_create +ffffffff82103cc0 t dcn32_hwseq_create +ffffffff82104160 t dcn32_vpg_create +ffffffff82105000 T dcn32_helper_calculate_num_ways_for_subvp +ffffffff821051e0 T dcn32_merge_pipes_for_subvp +ffffffff821053b0 T dcn32_all_pipes_have_stream_and_plane +ffffffff82105440 T dcn32_subvp_in_use +ffffffff821054d0 T dcn32_mpo_in_use +ffffffff82105540 T dcn32_any_surfaces_rotated +ffffffff821055d0 T dcn32_determine_det_override +ffffffff82105910 T dcn32_set_det_allocations +ffffffff82105a90 T dcn32_save_mall_state +ffffffff82105b40 T dcn32_restore_mall_state +ffffffff82106000 T dcn321_link_encoder_construct +ffffffff82107000 T dcn321_create_resource_pool +ffffffff821070b0 t dcn321_resource_construct +ffffffff82113480 t dcn321_mpc_create +ffffffff82117e40 t dcn321_resource_destruct +ffffffff821184b0 t dcn321_destroy_resource_pool +ffffffff82118510 t dcn321_link_encoder_create +ffffffff82119470 t dcn321_update_bw_bounding_box +ffffffff821194c0 t read_dce_straps +ffffffff821194f0 t dcn321_create_audio +ffffffff82119830 t dcn321_stream_encoder_create +ffffffff8211b6b0 t dcn321_hpo_dp_stream_encoder_create +ffffffff8211c390 t dcn321_hpo_dp_link_encoder_create +ffffffff8211c810 t dcn321_hwseq_create +ffffffff8211ccb0 t dcn321_vpg_create +ffffffff8211e000 T bw_int_to_fixed_nonconst +ffffffff8211e090 T bw_frc_to_fixed +ffffffff8211e260 T bw_floor2 +ffffffff8211e310 T bw_ceil2 +ffffffff8211e390 T bw_mul +ffffffff8211f000 T convert_to_custom_float_format +ffffffff82120000 T bw_calcs_init +ffffffff82120e30 T bw_calcs +ffffffff82122760 t calculate_bandwidth +ffffffff8212a000 T scaler_settings_calculation +ffffffff8212a380 T mode_support_and_system_configuration +ffffffff82130160 T display_pipe_configuration +ffffffff821309a0 T dispclkdppclkdcfclk_deep_sleep_prefetch_parameters_watermarks_and_performance_calculation +ffffffff82136000 T dcn_bw_mod +ffffffff82136060 T dcn_bw_min2 +ffffffff821360a0 T dcn_bw_max +ffffffff821360d0 T dcn_bw_max2 +ffffffff82136110 T dcn_bw_floor2 +ffffffff821361b0 T dcn_bw_floor +ffffffff821361e0 T dcn_bw_ceil +ffffffff82136220 T dcn_bw_ceil2 +ffffffff821362d0 T dcn_bw_max3 +ffffffff82136370 T dcn_bw_max5 +ffffffff821364e0 T dcn_bw_pow +ffffffff82136570 T dcn_bw_fabs +ffffffff821365d0 T dcn_bw_log +ffffffff82137000 T swizzle_mode_to_macro_tile_size +ffffffff82137090 T dcn_validate_bandwidth +ffffffff82139330 T dcn_bw_sync_calcs_and_dml +ffffffff82139580 t dcn_bw_calc_rq_dlg_ttu +ffffffff82139f00 T dcn_find_dcfclk_suits_all +ffffffff8213a360 T dcn_bw_update_from_pplib_fclks +ffffffff8213a4f0 T dcn_bw_update_from_pplib_dcfclks +ffffffff8213a5c0 T dcn_get_soc_clks +ffffffff8213a640 T dcn_bw_notify_pplib_of_wm_ranges +ffffffff8213b000 T dcn20_populate_dml_writeback_from_context +ffffffff8213b180 T dcn20_fpu_set_wb_arb_params +ffffffff8213b330 T dcn20_calculate_dlg_params +ffffffff8213bb10 T dcn20_populate_dml_pipes_from_context +ffffffff8213ca10 T dcn20_calculate_wm +ffffffff8213d1b0 T dcn20_update_bounding_box +ffffffff8213d430 T dcn20_cap_soc_clocks +ffffffff8213d7b0 T dcn20_patch_bounding_box +ffffffff8213d920 T dcn20_validate_bandwidth_fp +ffffffff8213dab0 t dcn20_validate_bandwidth_internal +ffffffff8213de90 T dcn20_fpu_set_wm_ranges +ffffffff8213df30 T dcn20_fpu_adjust_dppclk +ffffffff8213dfd0 T dcn21_populate_dml_pipes_from_context +ffffffff8213e0d0 T dcn21_validate_bandwidth_fp +ffffffff8213eb50 T dcn21_update_bw_bounding_box +ffffffff8213f030 T dcn21_clk_mgr_set_bw_params_wm_table +ffffffff8213f090 T dcn201_populate_dml_writeback_from_context_fpu +ffffffff8213f3a0 t calculate_wm_set_for_vlevel +ffffffff82140000 T dml20_recalculate +ffffffff82140740 t dml20_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation +ffffffff82145da0 T dml20_ModeSupportAndSystemConfigurationFull +ffffffff8214cd30 t TruncToValidBPP +ffffffff8214cf10 t CalculateVMAndRowBytes +ffffffff8214d5a0 t CalculatePrefetchSourceLines +ffffffff8214d760 t CalculateWriteBackDelay +ffffffff8214da30 t CalculatePrefetchSchedule +ffffffff8214e8f0 t CalculateFlipSchedule +ffffffff8214eca0 t adjust_ReturnBW +ffffffff8214f000 T dml20v2_recalculate +ffffffff8214f740 t dml20v2_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation +ffffffff82154e50 T dml20v2_ModeSupportAndSystemConfigurationFull +ffffffff8215bcd0 t TruncToValidBPP +ffffffff8215c260 t CalculateVMAndRowBytes +ffffffff8215c8f0 t CalculatePrefetchSourceLines +ffffffff8215cab0 t CalculateWriteBackDelay +ffffffff8215cd80 t CalculateDelayAfterScaler +ffffffff8215d0d0 t CalculatePrefetchSchedule +ffffffff8215de40 t CalculateFlipSchedule +ffffffff8215e1f0 t adjust_ReturnBW +ffffffff8215f000 T dml20_rq_dlg_get_rq_reg +ffffffff8215f490 t dml20_rq_dlg_get_rq_params +ffffffff8215f660 T dml20_rq_dlg_get_dlg_reg +ffffffff821615a0 t get_surf_rq_param +ffffffff82161e20 t calculate_ttu_cursor +ffffffff82163000 T dml20v2_rq_dlg_get_rq_reg +ffffffff82163490 t dml20v2_rq_dlg_get_rq_params +ffffffff82163660 T dml20v2_rq_dlg_get_dlg_reg +ffffffff821655b0 t get_surf_rq_param +ffffffff82165e30 t calculate_ttu_cursor +ffffffff82167000 T dml21_recalculate +ffffffff82167700 t DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation +ffffffff8216d0b0 T dml21_ModeSupportAndSystemConfigurationFull +ffffffff82173190 t TruncToValidBPP +ffffffff82173720 t CalculateDCFCLKDeepSleep +ffffffff82173a60 t CalculateVMAndRowBytes +ffffffff821742d0 t CalculatePrefetchSourceLines +ffffffff82174490 t CalculateWriteBackDelay +ffffffff82174760 t CalculatePrefetchSchedulePerPlane +ffffffff82174f70 t CalculateUrgentBurstFactor +ffffffff82175380 t CalculateFlipSchedule +ffffffff82175870 t CalculateWatermarksAndDRAMSpeedChangeSupport +ffffffff821768d0 t CalculatePrefetchSchedule +ffffffff82178000 T dml21_rq_dlg_get_rq_reg +ffffffff82178490 t dml_rq_dlg_get_rq_params +ffffffff82178660 T dml21_rq_dlg_get_dlg_reg +ffffffff8217a9b0 t get_surf_rq_param +ffffffff8217b2f0 t calculate_ttu_cursor +ffffffff8217c000 T optc3_fpu_set_vrr_m_const +ffffffff8217c4a0 T dcn30_fpu_populate_dml_writeback_from_context +ffffffff8217c7f0 T dcn30_fpu_set_mcif_arb_params +ffffffff8217c960 T dcn30_fpu_update_soc_for_wm_a +ffffffff8217ca30 T dcn30_fpu_calculate_wm_and_dlg +ffffffff8217d330 T dcn30_fpu_update_dram_channel_width_bytes +ffffffff8217d390 T dcn30_fpu_update_max_clk +ffffffff8217d440 T dcn30_fpu_get_optimal_dcfclk_fclk_for_uclk +ffffffff8217d540 T dcn30_fpu_update_bw_bounding_box +ffffffff8217d720 T dcn30_find_dummy_latency_index_for_fw_based_mclk_switch +ffffffff8217d900 T dcn3_fpu_build_wm_range_table +ffffffff8217dbe0 T patch_dcn30_soc_bounding_box +ffffffff8217e000 T dml30_recalculate +ffffffff8217e600 t DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation +ffffffff82184c50 T dml30_CalculateBytePerPixelAnd256BBlockSizes +ffffffff82184ec0 T dml30_CalculateWriteBackDISPCLK +ffffffff82185040 T dml30_ModeSupportAndSystemConfigurationFull +ffffffff8218c440 t CalculateSwathAndDETConfiguration +ffffffff8218cab0 t TruncToValidBPP +ffffffff8218cd30 t dscceComputeDelay +ffffffff8218ce70 t CalculateVMAndRowBytes +ffffffff8218d520 t CalculatePrefetchSourceLines +ffffffff8218d6e0 t CalculateUrgentBurstFactor +ffffffff8218d970 t CalculateDCFCLKDeepSleep +ffffffff8218dc90 t UseMinimumDCFCLK +ffffffff8218ee90 t CalculatePrefetchSchedule +ffffffff821903f0 t CalculateFlipSchedule +ffffffff821908e0 t CalculateWatermarksAndDRAMSpeedChangeSupport +ffffffff82191700 t CalculateSwathWidth +ffffffff82192000 T dml30_rq_dlg_get_rq_reg +ffffffff821924b0 t dml_rq_dlg_get_rq_params +ffffffff82192720 T dml30_rq_dlg_get_dlg_reg +ffffffff82194ed0 t get_surf_rq_param +ffffffff82195870 t calculate_ttu_cursor +ffffffff82196000 T dcn301_update_bw_bounding_box +ffffffff82196320 T dcn301_fpu_set_wm_ranges +ffffffff821963c0 T dcn301_fpu_init_soc_bounding_box +ffffffff82196460 T dcn301_calculate_wm_and_dlg_fp +ffffffff82196790 t calculate_wm_set_for_vlevel +ffffffff82197000 T dcn302_fpu_update_bw_bounding_box +ffffffff82197ac0 T dcn302_fpu_init_soc_bounding_box +ffffffff82198000 T dcn303_fpu_update_bw_bounding_box +ffffffff82198b00 T dcn303_fpu_init_soc_bounding_box +ffffffff82199000 T dcn31_zero_pipe_dcc_fraction +ffffffff82199060 T dcn31_update_soc_for_wm_a +ffffffff82199110 T dcn315_update_soc_for_wm_a +ffffffff821991e0 T dcn31_calculate_wm_and_dlg_fp +ffffffff82199830 T dcn31_update_bw_bounding_box +ffffffff82199c20 T dcn315_update_bw_bounding_box +ffffffff82199f10 T dcn316_update_bw_bounding_box +ffffffff8219a310 T dcn_get_max_non_odm_pix_rate_100hz +ffffffff8219a370 T dcn_get_approx_det_segs_required_for_pstate +ffffffff8219b000 T dml31_recalculate +ffffffff8219b2e0 t DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation +ffffffff821a20a0 T dml31_CalculateWriteBackDISPCLK +ffffffff821a2220 T dml31_ModeSupportAndSystemConfigurationFull +ffffffff821aade0 t CalculateSwathAndDETConfiguration +ffffffff821ab410 t TruncToValidBPP +ffffffff821ab690 t dscceComputeDelay +ffffffff821ab7d0 t CalculateDCFCLKDeepSleep +ffffffff821abb10 t CalculateVMAndRowBytes +ffffffff821ac160 t CalculatePrefetchSourceLines +ffffffff821ac320 t CalculateUrgentBurstFactor +ffffffff821ac5b0 t CalculatePrefetchSchedulePerPlane +ffffffff821acce0 t CalculateFlipSchedule +ffffffff821ad260 t CalculateWatermarksAndDRAMSpeedChangeSupport +ffffffff821adec0 t CalculateSwathWidth +ffffffff821ae3d0 t CalculatePrefetchSchedule +ffffffff821af860 t CalculateVupdateAndDynamicMetadataParameters +ffffffff821b0000 T dml31_rq_dlg_get_rq_reg +ffffffff821b04b0 t dml_rq_dlg_get_rq_params +ffffffff821b0720 T dml31_rq_dlg_get_dlg_reg +ffffffff821b31e0 t get_surf_rq_param +ffffffff821b4000 T dcn314_update_bw_bounding_box_fpu +ffffffff821b4480 T dcn314_populate_dml_pipes_from_context_fpu +ffffffff821b5000 T dml314_recalculate +ffffffff821b5280 t DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation +ffffffff821bbf60 T dml314_CalculateWriteBackDISPCLK +ffffffff821bc0e0 T dml314_ModeSupportAndSystemConfigurationFull +ffffffff821c4a20 t CalculateBytePerPixelAnd256BBlockSizes +ffffffff821c4c90 t CalculateSwathAndDETConfiguration +ffffffff821c5290 t TruncToValidBPP +ffffffff821c5510 t dscceComputeDelay +ffffffff821c5650 t CalculateDCFCLKDeepSleep +ffffffff821c5990 t CalculateVMAndRowBytes +ffffffff821c5fe0 t CalculatePrefetchSourceLines +ffffffff821c61a0 t CalculateUrgentBurstFactor +ffffffff821c6430 t CalculateMaxVStartup +ffffffff821c6570 t CalculatePrefetchSchedulePerPlane +ffffffff821c6ca0 t CalculateFlipSchedule +ffffffff821c7220 t CalculateWatermarksAndDRAMSpeedChangeSupport +ffffffff821c7e80 t CalculateSwathWidth +ffffffff821c8390 t CalculatePrefetchSchedule +ffffffff821c9820 t CalculateVupdateAndDynamicMetadataParameters +ffffffff821ca000 T dml314_rq_dlg_get_rq_reg +ffffffff821ca4b0 t dml_rq_dlg_get_rq_params +ffffffff821ca720 T dml314_rq_dlg_get_dlg_reg +ffffffff821cd2a0 t get_surf_rq_param +ffffffff821ce000 T dcn32_build_wm_range_table_fpu +ffffffff821ce390 T dcn32_find_dummy_latency_index_for_fw_based_mclk_switch +ffffffff821ce5c0 T dcn32_internal_validate_bw +ffffffff821d02d0 T dcn32_helper_populate_phantom_dlg_params +ffffffff821d0470 T dcn32_predict_pipe_split +ffffffff821d06a0 T insert_entry_into_table_sorted +ffffffff821d0ad0 T dcn32_set_phantom_stream_timing +ffffffff821d0d70 t dcn32_split_stream_for_mpc_or_odm +ffffffff821d1100 T dcn32_calculate_wm_and_dlg_fpu +ffffffff821d26e0 T dcn32_patch_dpm_table +ffffffff821d28f0 T dcn32_update_bw_bounding_box_fpu +ffffffff821d41b0 T dcn32_zero_pipe_dcc_fraction +ffffffff821d4210 T dcn32_allow_subvp_with_active_margin +ffffffff821d42e0 t subvp_drr_schedulable +ffffffff821d5000 T dml32_recalculate +ffffffff821d9330 T dml32_ModeSupportAndSystemConfigurationFull +ffffffff821e1000 T dml32_dscceComputeDelay +ffffffff821e1140 T dml32_dscComputeDelay +ffffffff821e1180 T IsVertical +ffffffff821e11b0 T dml32_CalculateSinglePipeDPPCLKAndSCLThroughput +ffffffff821e14d0 T dml32_CalculateBytePerPixelAndBlockSizes +ffffffff821e1800 T dml32_CalculateSwathAndDETConfiguration +ffffffff821e2020 T dml32_CalculateSwathWidth +ffffffff821e28c0 T dml32_UnboundedRequest +ffffffff821e2930 T dml32_CalculateDETBufferSize +ffffffff821e2f70 T dml32_CalculateODMMode +ffffffff821e36d0 T dml32_CalculateRequiredDispclk +ffffffff821e3890 T dml32_RoundToDFSGranularity +ffffffff821e3920 T dml32_CalculateOutputLink +ffffffff821e4450 T dml32_TruncToValidBPP +ffffffff821e47a0 T dml32_CalculateDPPCLK +ffffffff821e4950 T dml32_RequiredDTBCLK +ffffffff821e4ba0 T dml32_DSCDelayRequirement +ffffffff821e5070 T dml32_CalculateSurfaceSizeInMall +ffffffff821e5b80 T dml32_CalculateVMRowAndSwath +ffffffff821e69b0 T dml32_CalculateVMAndRowBytes +ffffffff821e75f0 T dml32_CalculatePrefetchSourceLines +ffffffff821e7840 T dml32_CalculateMALLUseForStaticScreen +ffffffff821e7990 T dml32_CalculateRowBandwidth +ffffffff821e7af0 T dml32_CalculateUrgentLatency +ffffffff821e7b90 T dml32_CalculateUrgentBurstFactor +ffffffff821e7e40 T dml32_CalculateDCFCLKDeepSleep +ffffffff821e8190 T dml32_CalculateWriteBackDelay +ffffffff821e82f0 T dml32_UseMinimumDCFCLK +ffffffff821e91b0 T dml32_CalculateExtraLatencyBytes +ffffffff821e9380 T dml32_CalculateTWait +ffffffff821e9460 T dml32_CalculateVUpdateAndDynamicMetadataParameters +ffffffff821e96c0 T dml32_get_return_bw_mbps +ffffffff821e9880 T dml32_get_return_bw_mbps_vm_only +ffffffff821e9960 T dml32_CalculateExtraLatency +ffffffff821e9b90 T dml32_CalculatePrefetchSchedule +ffffffff821eb140 T dml32_CalculateFlipSchedule +ffffffff821eb6c0 T dml32_CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport +ffffffff821ec820 T dml32_CalculateWriteBackDISPCLK +ffffffff821ec9e0 T dml32_CalculateMinAndMaxPrefetchMode +ffffffff821eca20 T dml32_CalculatePixelDeliveryTimes +ffffffff821ece90 T dml32_CalculateMetaAndPTETimes +ffffffff821ed5d0 T dml32_CalculateVMGroupAndRequestTimes +ffffffff821edac0 T dml32_CalculateDCCConfiguration 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PixelClockAdjustmentForProgressiveToInterlaceUnit +ffffffff821f7d50 T get_clk_dcf_deepsleep +ffffffff821f7e60 T get_wm_urgent +ffffffff821f7f70 T get_wm_memory_trip +ffffffff821f8080 T get_wm_writeback_urgent +ffffffff821f8190 T get_wm_stutter_exit +ffffffff821f82a0 T get_wm_stutter_enter_exit +ffffffff821f83b0 T get_wm_z8_stutter_exit +ffffffff821f84c0 T get_wm_z8_stutter_enter_exit +ffffffff821f85d0 T get_stutter_efficiency_z8 +ffffffff821f86e0 T get_stutter_num_bursts_z8 +ffffffff821f87f0 T get_wm_dram_clock_change +ffffffff821f8900 T get_wm_writeback_dram_clock_change +ffffffff821f8a10 T get_stutter_efficiency +ffffffff821f8b20 T get_stutter_efficiency_no_vblank +ffffffff821f8c30 T get_stutter_period +ffffffff821f8d40 T get_urgent_latency +ffffffff821f8e50 T get_urgent_extra_latency +ffffffff821f8f60 T get_nonurgent_latency +ffffffff821f9070 T get_dram_clock_change_latency +ffffffff821f9180 T get_dispclk_calculated +ffffffff821f9290 T get_total_data_read_bw +ffffffff821f93a0 T get_return_bw +ffffffff821f94b0 T get_tcalc +ffffffff821f95c0 T get_fraction_of_urgent_bandwidth +ffffffff821f96d0 T get_fraction_of_urgent_bandwidth_imm_flip +ffffffff821f97e0 T get_cstate_max_cap_mode +ffffffff821f9900 T get_comp_buffer_size_kbytes +ffffffff821f9a10 T get_pixel_chunk_size_in_kbyte +ffffffff821f9b30 T get_alpha_pixel_chunk_size_in_kbyte +ffffffff821f9c50 T get_meta_chunk_size_in_kbyte +ffffffff821f9d70 T get_min_pixel_chunk_size_in_byte +ffffffff821f9e80 T get_min_meta_chunk_size_in_byte +ffffffff821f9fa0 T get_fclk_watermark +ffffffff821fa0b0 T get_usr_retraining_watermark +ffffffff821fa1c0 T get_comp_buffer_reserved_space_kbytes +ffffffff821fa2e0 T get_comp_buffer_reserved_space_64bytes +ffffffff821fa400 T get_comp_buffer_reserved_space_zs +ffffffff821fa520 T get_unbounded_request_enabled +ffffffff821fa640 T get_dsc_delay +ffffffff821fa770 T get_dppclk_calculated +ffffffff821fa890 T get_dscclk_calculated +ffffffff821fa9b0 T get_min_ttu_vblank +ffffffff821faad0 T get_min_ttu_vblank_in_us +ffffffff821fabf0 T get_vratio_prefetch_l +ffffffff821fad10 T get_vratio_prefetch_c +ffffffff821fae30 T get_dst_x_after_scaler +ffffffff821faf50 T get_dst_y_after_scaler +ffffffff821fb070 T get_dst_y_per_vm_vblank +ffffffff821fb190 T get_dst_y_per_row_vblank +ffffffff821fb2b0 T get_dst_y_prefetch +ffffffff821fb3d0 T get_dst_y_per_vm_flip +ffffffff821fb4f0 T get_dst_y_per_row_flip +ffffffff821fb610 T get_refcyc_per_vm_group_vblank +ffffffff821fb730 T get_refcyc_per_vm_group_flip +ffffffff821fb850 T get_refcyc_per_vm_req_vblank +ffffffff821fb970 T get_refcyc_per_vm_req_flip +ffffffff821fba90 T get_refcyc_per_vm_group_vblank_in_us +ffffffff821fbbb0 T get_refcyc_per_vm_group_flip_in_us +ffffffff821fbcd0 T get_refcyc_per_vm_req_vblank_in_us +ffffffff821fbdf0 T get_refcyc_per_vm_req_flip_in_us +ffffffff821fbf10 T get_refcyc_per_vm_dmdata_in_us +ffffffff821fc030 T get_dmdata_dl_delta_in_us +ffffffff821fc150 T get_refcyc_per_line_delivery_l_in_us +ffffffff821fc270 T get_refcyc_per_line_delivery_c_in_us +ffffffff821fc390 T get_refcyc_per_line_delivery_pre_l_in_us +ffffffff821fc4b0 T get_refcyc_per_line_delivery_pre_c_in_us +ffffffff821fc5d0 T get_refcyc_per_req_delivery_l_in_us +ffffffff821fc6f0 T get_refcyc_per_req_delivery_c_in_us +ffffffff821fc810 T get_refcyc_per_req_delivery_pre_l_in_us +ffffffff821fc930 T get_refcyc_per_req_delivery_pre_c_in_us +ffffffff821fca50 T get_refcyc_per_cursor_req_delivery_in_us +ffffffff821fcb70 T get_refcyc_per_cursor_req_delivery_pre_in_us +ffffffff821fcc90 T get_refcyc_per_meta_chunk_nom_l_in_us +ffffffff821fcdb0 T get_refcyc_per_meta_chunk_nom_c_in_us +ffffffff821fced0 T get_refcyc_per_meta_chunk_vblank_l_in_us +ffffffff821fcff0 T get_refcyc_per_meta_chunk_vblank_c_in_us +ffffffff821fd110 T get_refcyc_per_meta_chunk_flip_l_in_us +ffffffff821fd230 T get_refcyc_per_meta_chunk_flip_c_in_us +ffffffff821fd350 T get_vstartup +ffffffff821fd480 T get_vupdate_offset +ffffffff821fd5b0 T get_vupdate_width +ffffffff821fd6d0 T get_vready_offset +ffffffff821fd7f0 T get_vready_at_or_after_vsync +ffffffff821fd920 T get_min_dst_y_next_start +ffffffff821fda50 T get_dst_y_per_pte_row_nom_l +ffffffff821fdb70 T get_dst_y_per_pte_row_nom_c +ffffffff821fdc90 T get_dst_y_per_meta_row_nom_l +ffffffff821fddb0 T get_dst_y_per_meta_row_nom_c +ffffffff821fded0 T get_refcyc_per_pte_group_nom_l_in_us +ffffffff821fdff0 T get_refcyc_per_pte_group_nom_c_in_us +ffffffff821fe110 T get_refcyc_per_pte_group_vblank_l_in_us +ffffffff821fe230 T get_refcyc_per_pte_group_vblank_c_in_us +ffffffff821fe350 T get_refcyc_per_pte_group_flip_l_in_us +ffffffff821fe470 T get_refcyc_per_pte_group_flip_c_in_us +ffffffff821fe590 T get_vstartup_calculated +ffffffff821fe6c0 T get_dpte_row_height_linear_c +ffffffff821fe7f0 T get_swath_height_l +ffffffff821fe920 T get_swath_height_c +ffffffff821fea50 T get_det_stored_buffer_size_l_bytes +ffffffff821feb80 T get_det_stored_buffer_size_c_bytes +ffffffff821fecb0 T get_dpte_group_size_in_bytes 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sdmmc_read_cis -ffffffff825453b0 T sdmmc_print_cis -ffffffff82545520 T sdmmc_check_cis_quirks -ffffffff82546000 T sdmmc_io_enable -ffffffff825462a0 T sdmmc_io_reset -ffffffff825463d0 T sdmmc_io_send_op_cond -ffffffff82546540 T sdmmc_io_scan -ffffffff82546690 T sdmmc_io_init -ffffffff825467c0 T sdmmc_io_set_highspeed -ffffffff82546a70 T sdmmc_io_set_bus_width -ffffffff82546d00 T sdmmc_io_function_ready -ffffffff82546e80 T sdmmc_io_read_1 -ffffffff82546fd0 T sdmmc_io_function_enable -ffffffff825473a0 T sdmmc_io_write_1 -ffffffff82547520 T sdmmc_io_function_disable -ffffffff825477a0 T sdmmc_io_attach -ffffffff82547890 T sdmmc_print -ffffffff82547ae0 T sdmmc_submatch -ffffffff82547b60 T sdmmc_io_detach -ffffffff82547c10 T sdmmc_io_rw_direct -ffffffff82547db0 T sdmmc_io_rw_extended_subr -ffffffff82547f50 T sdmmc_io_rw_extended -ffffffff82548340 T sdmmc_io_read_2 -ffffffff825484a0 T sdmmc_io_write_2 -ffffffff82548600 T sdmmc_io_read_4 -ffffffff82548760 T sdmmc_io_write_4 -ffffffff825488c0 T sdmmc_io_read_multi_1 -ffffffff825489b0 T sdmmc_io_write_multi_1 -ffffffff82548aa0 T sdmmc_io_read_region_1 -ffffffff82548b90 T sdmmc_io_write_region_1 -ffffffff82548c80 T sdmmc_io_xchg -ffffffff82548e10 T sdmmc_intr_enable -ffffffff82549080 T sdmmc_intr_disable -ffffffff825492f0 T sdmmc_intr_establish -ffffffff825493f0 T sdmmc_intr_disestablish -ffffffff825494e0 T sdmmc_card_intr -ffffffff82549530 T sdmmc_intr_task -ffffffff825495c0 T sdmmc_io_set_blocklen -ffffffff8254a000 T sdmmc_mem_enable -ffffffff8254a4e0 T sdmmc_mem_send_op_cond -ffffffff8254a690 T sdmmc_mem_signal_voltage -ffffffff8254a750 T sdmmc_mem_scan -ffffffff8254aa60 T sdmmc_decode_csd -ffffffff8254ae70 T sdmmc_decode_cid -ffffffff8254b2b0 T sdmmc_mem_send_scr -ffffffff8254b3f0 T sdmmc_mem_decode_scr -ffffffff8254b470 T sdmmc_mem_send_cxd_data -ffffffff8254b5e0 T sdmmc_mem_set_bus_width -ffffffff8254b700 T sdmmc_mem_sd_switch -ffffffff8254b9b0 T sdmmc_be512_to_bitfield512 -ffffffff8254ba60 T sdmmc_mem_mmc_switch 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-ffffffff8254eda0 T sdmmc_done_xs -ffffffff8254edf0 T sdmmc_scsi_hibernate_io -ffffffff8254f000 T bwfm_sdio_preinit -ffffffff8254f4f0 T bwfm_sdio_txcheck -ffffffff8254f530 T bwfm_sdio_txdata -ffffffff8254f5a0 T bwfm_sdio_txctl -ffffffff8254f6f0 T bwfm_sdio_buscore_read -ffffffff8254f700 T bwfm_sdio_buscore_write -ffffffff8254f720 T bwfm_sdio_buscore_prepare -ffffffff8254f860 T bwfm_sdio_buscore_activate -ffffffff8254f8e0 T bwfm_sdio_match -ffffffff8254f9b0 T bwfm_sdio_attach -ffffffff8254fc70 T bwfm_sdio_detach -ffffffff8254fcd0 T bwfm_sdio_task -ffffffff8254fe30 T bwfm_sdio_write_1 -ffffffff8254fe60 T bwfm_sdio_read_1 -ffffffff8254fe90 T bwfm_sdio_write_4 -ffffffff8254ff40 T bwfm_sdio_read_4 -ffffffff8254fff0 T bwfm_sdio_load_microcode -ffffffff82550250 T bwfm_sdio_clkctl -ffffffff82550380 T bwfm_sdio_dev_write -ffffffff825503d0 T bwfm_sdio_intr -ffffffff82550410 T bwfm_sdio_ram_read_write -ffffffff82550640 T bwfm_sdio_htclk -ffffffff825508a0 T bwfm_sdio_readshared -ffffffff82550970 T bwfm_sdio_dev_read -ffffffff825509b0 T bwfm_sdio_rx_frames -ffffffff82550d40 T bwfm_sdio_tx_frames -ffffffff82550e20 T bwfm_sdio_backplane -ffffffff82550ed0 T bwfm_sdio_buf_read -ffffffff82550fb0 T bwfm_sdio_buf_write -ffffffff82551060 T bwfm_sdio_frame_read_write -ffffffff825511e0 T bwfm_sdio_newbuf -ffffffff82551260 T bwfm_sdio_tx_ok -ffffffff825512b0 T bwfm_sdio_tx_ctrlframe -ffffffff825513b0 T bwfm_sdio_tx_dataframe -ffffffff82551500 T bwfm_sdio_rx_glom -ffffffff82552000 T onewire_match -ffffffff82552050 T onewire_attach -ffffffff825520f0 T onewire_detach -ffffffff82552160 T onewire_activate -ffffffff82552180 T onewire_scan -ffffffff82552390 T onewire_createthread -ffffffff82552400 T onewire_print -ffffffff825524d0 T onewirebus_print -ffffffff82552520 T onewire_lock -ffffffff82552540 T onewire_unlock -ffffffff82552560 T onewire_reset -ffffffff82552580 T onewire_bit -ffffffff825525a0 T onewire_read_byte -ffffffff825526e0 T onewire_write_byte -ffffffff825527c0 T onewire_read_block -ffffffff82552860 T onewire_write_block -ffffffff82552900 T onewire_triplet -ffffffff825529e0 T onewire_matchrom -ffffffff82552b30 T onewire_search -ffffffff82552ec0 T onewire_thread -ffffffff82553000 T onewire_crc -ffffffff825530e0 T onewire_crc16 -ffffffff825531c0 T onewire_famname -ffffffff82553200 T onewire_matchbyfam -ffffffff82554000 T owid_match -ffffffff82554030 T owid_attach -ffffffff82554100 T owid_detach -ffffffff82554140 T owid_activate -ffffffff82555000 T owsbm_match -ffffffff82555030 T owsbm_attach -ffffffff825551d0 T owsbm_detach -ffffffff82555240 T owsbm_activate -ffffffff82555270 T owsbm_update -ffffffff82556000 T owtemp_match -ffffffff82556030 T owtemp_attach -ffffffff82556130 T owtemp_detach -ffffffff825561a0 T owtemp_activate -ffffffff825561d0 T owtemp_update -ffffffff82557000 T owctr_match -ffffffff82557030 T owctr_attach -ffffffff82557180 T owctr_detach -ffffffff825571f0 T owctr_activate -ffffffff82557220 T owctr_update -ffffffff82557250 T owctr_update_counter -ffffffff82558000 A __text_page_start -ffffffff82558000 T Xsyscall_meltdown -ffffffff8255800c T Xsyscall -ffffffff8255826e t Xsyscall_trampback -ffffffff82558280 T intr_user_exit -ffffffff825582c2 t intr_user_exit_post_ast -ffffffff825583ee t Xiretq_trampback -ffffffff825583fa T doreti_iret -ffffffff82559000 T alltraps -ffffffff82559138 T recall_trap -ffffffff82559150 T alltraps_kern -ffffffff82559153 T alltraps_kern_meltdown -ffffffff8255a000 ? Xsyscall32 -ffffffff8255a000 A __kutext_start -ffffffff8255a000 A __text_page_end -ffffffff8255b000 ? Xtrap00 -ffffffff8255b010 ? Xtrap01 -ffffffff8255b020 ? Xtrap02 -ffffffff8255b028 c calltrap_specstk -ffffffff8255b0f0 ? calltrap_specstk_tramp -ffffffff8255b110 ? Xtrap03 -ffffffff8255b120 ? Xtrap04 -ffffffff8255b130 ? Xtrap05 -ffffffff8255b140 ? Xtrap06 -ffffffff8255b150 ? Xtrap07 -ffffffff8255b160 ? Xtrap08 -ffffffff8255b170 ? Xtrap09 -ffffffff8255b180 ? Xtrap0a -ffffffff8255b190 ? Xtrap0b -ffffffff8255b1a0 ? Xtrap0c -ffffffff8255b1b0 ? Xtrap0d -ffffffff8255b240 ? Xtrap0e -ffffffff8255b250 ? Xintrspurious -ffffffff8255b250 ? Xtrap0f -ffffffff8255b260 ? Xtrap10 -ffffffff8255b270 ? Xtrap11 -ffffffff8255b280 ? Xtrap12 -ffffffff8255b290 ? Xtrap13 -ffffffff8255b2a0 ? Xtrap14 -ffffffff8255b2b0 ? Xtrap15 -ffffffff8255b2c0 ? Xtrap16 -ffffffff8255b2c0 ? Xtrap17 -ffffffff8255b2c0 ? Xtrap18 -ffffffff8255b2c0 ? Xtrap19 -ffffffff8255b2c0 ? Xtrap1a -ffffffff8255b2c0 ? Xtrap1b -ffffffff8255b2c0 ? Xtrap1c -ffffffff8255b2c0 ? Xtrap1d -ffffffff8255b2c0 ? Xtrap1e -ffffffff8255b2c0 ? Xtrap1f -ffffffff8255b2d0 ? x2apic_eoi -ffffffff8255b2f0 ? Xintr_lapic_ipi -ffffffff8255b330 ? Xipi_invltlb -ffffffff8255b360 ? Xipi_invlpg -ffffffff8255b390 ? Xipi_invlrange -ffffffff8255b3d0 ? Xipi_invltlb_pcid -ffffffff8255b410 ? Xipi_invlpg_pcid -ffffffff8255b460 ? Xipi_invlrange_pcid -ffffffff8255b4d0 ? Xintr_lapic_ltimer -ffffffff8255b510 ? Xintr_xen_upcall -ffffffff8255b550 ? Xintr_hyperv_upcall -ffffffff8255b590 ? Xintr_legacy0 -ffffffff8255b5d0 ? Xintr_legacy1 -ffffffff8255b610 ? Xintr_legacy2 -ffffffff8255b650 ? Xintr_legacy3 -ffffffff8255b690 ? Xintr_legacy4 -ffffffff8255b6d0 ? Xintr_legacy5 -ffffffff8255b710 ? Xintr_legacy6 -ffffffff8255b750 ? Xintr_legacy7 -ffffffff8255b790 ? Xintr_legacy8 -ffffffff8255b7d0 ? Xintr_legacy9 -ffffffff8255b810 ? Xintr_legacy10 -ffffffff8255b850 ? Xintr_legacy11 -ffffffff8255b890 ? Xintr_legacy12 -ffffffff8255b8d0 ? Xintr_legacy13 -ffffffff8255b910 ? Xintr_legacy14 -ffffffff8255b950 ? Xintr_legacy15 -ffffffff8255b990 ? Xintr_ioapic_edge0 -ffffffff8255b9d0 ? Xintr_ioapic_edge1 -ffffffff8255ba10 ? Xintr_ioapic_edge2 -ffffffff8255ba50 ? Xintr_ioapic_edge3 -ffffffff8255ba90 ? Xintr_ioapic_edge4 -ffffffff8255bad0 ? Xintr_ioapic_edge5 -ffffffff8255bb10 ? Xintr_ioapic_edge6 -ffffffff8255bb50 ? Xintr_ioapic_edge7 -ffffffff8255bb90 ? Xintr_ioapic_edge8 -ffffffff8255bbd0 ? Xintr_ioapic_edge9 -ffffffff8255bc10 ? Xintr_ioapic_edge10 -ffffffff8255bc50 ? Xintr_ioapic_edge11 -ffffffff8255bc90 ? Xintr_ioapic_edge12 -ffffffff8255bcd0 ? Xintr_ioapic_edge13 -ffffffff8255bd10 ? Xintr_ioapic_edge14 -ffffffff8255bd50 ? Xintr_ioapic_edge15 -ffffffff8255bd90 ? Xintr_ioapic_edge16 -ffffffff8255bdd0 ? Xintr_ioapic_edge17 -ffffffff8255be10 ? Xintr_ioapic_edge18 -ffffffff8255be50 ? Xintr_ioapic_edge19 -ffffffff8255be90 ? Xintr_ioapic_edge20 -ffffffff8255bed0 ? Xintr_ioapic_edge21 -ffffffff8255bf10 ? Xintr_ioapic_edge22 -ffffffff8255bf50 ? Xintr_ioapic_edge23 -ffffffff8255bf90 ? Xintr_ioapic_edge24 -ffffffff8255bfd0 ? Xintr_ioapic_edge25 -ffffffff8255c010 ? Xintr_ioapic_edge26 -ffffffff8255c050 ? Xintr_ioapic_edge27 -ffffffff8255c090 ? Xintr_ioapic_edge28 -ffffffff8255c0d0 ? Xintr_ioapic_edge29 -ffffffff8255c110 ? Xintr_ioapic_edge30 -ffffffff8255c150 ? Xintr_ioapic_edge31 -ffffffff8255c190 ? Xintr_ioapic_edge32 -ffffffff8255c1d0 ? Xintr_ioapic_edge33 -ffffffff8255c210 ? Xintr_ioapic_edge34 -ffffffff8255c250 ? Xintr_ioapic_edge35 -ffffffff8255c290 ? Xintr_ioapic_edge36 -ffffffff8255c2d0 ? Xintr_ioapic_edge37 -ffffffff8255c310 ? Xintr_ioapic_edge38 -ffffffff8255c350 ? Xintr_ioapic_edge39 -ffffffff8255c390 ? Xintr_ioapic_edge40 -ffffffff8255c3d0 ? Xintr_ioapic_edge41 -ffffffff8255c410 ? Xintr_ioapic_edge42 -ffffffff8255c450 ? Xintr_ioapic_edge43 -ffffffff8255c490 ? Xintr_ioapic_edge44 -ffffffff8255c4d0 ? Xintr_ioapic_edge45 -ffffffff8255c510 ? Xintr_ioapic_edge46 -ffffffff8255c550 ? Xintr_ioapic_edge47 -ffffffff8255c590 ? Xintr_ioapic_edge48 -ffffffff8255c5d0 ? Xintr_ioapic_edge49 -ffffffff8255c610 ? Xintr_ioapic_edge50 -ffffffff8255c650 ? Xintr_ioapic_edge51 -ffffffff8255c690 ? Xintr_ioapic_edge52 -ffffffff8255c6d0 ? Xintr_ioapic_edge53 -ffffffff8255c710 ? Xintr_ioapic_edge54 -ffffffff8255c750 ? Xintr_ioapic_edge55 -ffffffff8255c790 ? Xintr_ioapic_edge56 -ffffffff8255c7d0 ? Xintr_ioapic_edge57 -ffffffff8255c810 ? Xintr_ioapic_edge58 -ffffffff8255c850 ? Xintr_ioapic_edge59 -ffffffff8255c890 ? Xintr_ioapic_edge60 -ffffffff8255c8d0 ? Xintr_ioapic_edge61 -ffffffff8255c910 ? Xintr_ioapic_edge62 -ffffffff8255c950 ? Xintr_ioapic_edge63 -ffffffff8255c990 ? Xintr_ioapic_level0 -ffffffff8255c9d0 ? Xintr_ioapic_level1 -ffffffff8255ca10 ? Xintr_ioapic_level2 -ffffffff8255ca50 ? Xintr_ioapic_level3 -ffffffff8255ca90 ? Xintr_ioapic_level4 -ffffffff8255cad0 ? Xintr_ioapic_level5 -ffffffff8255cb10 ? Xintr_ioapic_level6 -ffffffff8255cb50 ? Xintr_ioapic_level7 -ffffffff8255cb90 ? Xintr_ioapic_level8 -ffffffff8255cbd0 ? Xintr_ioapic_level9 -ffffffff8255cc10 ? Xintr_ioapic_level10 -ffffffff8255cc50 ? Xintr_ioapic_level11 -ffffffff8255cc90 ? Xintr_ioapic_level12 -ffffffff8255ccd0 ? Xintr_ioapic_level13 -ffffffff8255cd10 ? Xintr_ioapic_level14 -ffffffff8255cd50 ? Xintr_ioapic_level15 -ffffffff8255cd90 ? Xintr_ioapic_level16 -ffffffff8255cdd0 ? Xintr_ioapic_level17 -ffffffff8255ce10 ? Xintr_ioapic_level18 -ffffffff8255ce50 ? Xintr_ioapic_level19 -ffffffff8255ce90 ? Xintr_ioapic_level20 -ffffffff8255ced0 ? Xintr_ioapic_level21 -ffffffff8255cf10 ? Xintr_ioapic_level22 -ffffffff8255cf50 ? Xintr_ioapic_level23 -ffffffff8255cf90 ? Xintr_ioapic_level24 -ffffffff8255cfd0 ? Xintr_ioapic_level25 -ffffffff8255d010 ? Xintr_ioapic_level26 -ffffffff8255d050 ? Xintr_ioapic_level27 -ffffffff8255d090 ? Xintr_ioapic_level28 -ffffffff8255d0d0 ? Xintr_ioapic_level29 -ffffffff8255d110 ? Xintr_ioapic_level30 -ffffffff8255d150 ? Xintr_ioapic_level31 -ffffffff8255d190 ? Xintr_ioapic_level32 -ffffffff8255d1d0 ? Xintr_ioapic_level33 -ffffffff8255d210 ? Xintr_ioapic_level34 -ffffffff8255d250 ? Xintr_ioapic_level35 -ffffffff8255d290 ? Xintr_ioapic_level36 -ffffffff8255d2d0 ? Xintr_ioapic_level37 -ffffffff8255d310 ? Xintr_ioapic_level38 -ffffffff8255d350 ? Xintr_ioapic_level39 -ffffffff8255d390 ? Xintr_ioapic_level40 -ffffffff8255d3d0 ? Xintr_ioapic_level41 -ffffffff8255d410 ? Xintr_ioapic_level42 -ffffffff8255d450 ? Xintr_ioapic_level43 -ffffffff8255d490 ? Xintr_ioapic_level44 -ffffffff8255d4d0 ? Xintr_ioapic_level45 -ffffffff8255d510 ? Xintr_ioapic_level46 -ffffffff8255d550 ? Xintr_ioapic_level47 -ffffffff8255d590 ? Xintr_ioapic_level48 -ffffffff8255d5d0 ? Xintr_ioapic_level49 -ffffffff8255d610 ? Xintr_ioapic_level50 -ffffffff8255d650 ? Xintr_ioapic_level51 -ffffffff8255d690 ? Xintr_ioapic_level52 -ffffffff8255d6d0 ? Xintr_ioapic_level53 -ffffffff8255d710 ? Xintr_ioapic_level54 -ffffffff8255d750 ? Xintr_ioapic_level55 -ffffffff8255d790 ? Xintr_ioapic_level56 -ffffffff8255d7d0 ? Xintr_ioapic_level57 -ffffffff8255d810 ? Xintr_ioapic_level58 -ffffffff8255d850 ? Xintr_ioapic_level59 -ffffffff8255d890 ? Xintr_ioapic_level60 -ffffffff8255d8d0 ? Xintr_ioapic_level61 -ffffffff8255d910 ? Xintr_ioapic_level62 -ffffffff8255d950 ? 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dmub_dcn31_get_inbox1_rptr +ffffffff82242970 T dmub_dcn31_set_inbox1_wptr +ffffffff822429a0 T dmub_dcn31_setup_out_mailbox +ffffffff822429f0 T dmub_dcn31_get_outbox1_wptr +ffffffff82242a20 T dmub_dcn31_set_outbox1_rptr +ffffffff82242a50 T dmub_dcn31_is_hw_init +ffffffff82242ad0 T dmub_dcn31_is_supported +ffffffff82242b30 T dmub_dcn31_is_psrsu_supported +ffffffff82242b60 T dmub_dcn31_set_gpint +ffffffff82242b90 T dmub_dcn31_is_gpint_acked +ffffffff82242bf0 T dmub_dcn31_get_gpint_response +ffffffff82242c20 T dmub_dcn31_get_gpint_dataout +ffffffff82242d40 T dmub_dcn31_get_fw_boot_status +ffffffff82242d70 T dmub_dcn31_enable_dmub_boot_options +ffffffff82242df0 T dmub_dcn31_skip_dmub_panel_power_sequence +ffffffff82242e50 T dmub_dcn31_setup_outbox0 +ffffffff82242ea0 T dmub_dcn31_get_outbox0_wptr +ffffffff82242ed0 T dmub_dcn31_set_outbox0_rptr +ffffffff82242f00 T dmub_dcn31_get_current_time +ffffffff82242f30 T dmub_dcn31_get_diagnostic_data +ffffffff822433d0 T dmub_dcn31_should_detect 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dmub_srv_cmd_execute +ffffffff82249150 T dmub_srv_wait_for_auto_load +ffffffff822491f0 T dmub_srv_wait_for_phy_init +ffffffff822492a0 T dmub_srv_wait_for_idle +ffffffff82249350 T dmub_srv_send_gpint_command +ffffffff82249440 T dmub_srv_get_gpint_response +ffffffff822494a0 T dmub_srv_get_gpint_dataout +ffffffff82249500 T dmub_srv_get_fw_boot_status +ffffffff82249570 T dmub_srv_cmd_with_reply_data +ffffffff822497e0 T dmub_srv_get_outbox0_msg +ffffffff82249880 T dmub_srv_get_diagnostic_data +ffffffff822498e0 T dmub_srv_should_detect +ffffffff82249930 T dmub_srv_clear_inbox0_ack +ffffffff82249980 T dmub_srv_wait_for_inbox0_ack +ffffffff82249a10 T dmub_srv_send_inbox0_cmd +ffffffff8224a000 T dmub_srv_stat_get_notification +ffffffff8224b000 T setup_x_points_distribution +ffffffff8224b170 T log_x_points_distribution +ffffffff8224b1a0 T precompute_pq +ffffffff8224b370 t compute_pq +ffffffff8224b580 T precompute_de_pq +ffffffff8224b6e0 t compute_de_pq +ffffffff8224b9a0 T calculate_user_regamma_coeff +ffffffff8224bd70 t apply_lut_1d +ffffffff8224c0a0 T calculate_user_regamma_ramp +ffffffff8224c9e0 T mod_color_calculate_degamma_params +ffffffff8224cfb0 t build_evenly_distributed_points +ffffffff8224d130 t scale_gamma +ffffffff8224d2e0 t build_degamma +ffffffff8224d6b0 t build_hlg_degamma +ffffffff8224d8d0 t map_regamma_hw_to_x_user +ffffffff8224e030 T mod_color_calculate_regamma_params +ffffffff822501a0 T mod_color_calculate_degamma_curve +ffffffff82250660 t translate_from_linear_space +ffffffff822509a0 t build_coefficients +ffffffff82250b20 t calculate_mapped_value +ffffffff82251000 T mod_color_is_table_init +ffffffff82251050 T mod_color_get_table +ffffffff822510a0 T mod_color_set_table_init_state +ffffffff82252000 T mod_freesync_create +ffffffff82252070 T mod_freesync_destroy +ffffffff822520b0 T mod_freesync_calc_v_total_from_refresh +ffffffff82252140 T mod_freesync_get_vmin_vmax +ffffffff82252180 T mod_freesync_get_v_position +ffffffff82252200 T mod_freesync_build_vrr_infopacket +ffffffff82252950 T mod_freesync_build_vrr_params +ffffffff82252cd0 T mod_freesync_calc_nominal_field_rate +ffffffff82252d30 T mod_freesync_handle_preflip +ffffffff82253150 T mod_freesync_handle_v_update +ffffffff82253610 T mod_freesync_get_settings +ffffffff82253680 T mod_freesync_calc_field_rate_from_timing +ffffffff822536d0 T mod_freesync_get_freesync_enabled +ffffffff82253700 T mod_freesync_is_valid_range +ffffffff82254000 T mod_build_vsc_infopacket +ffffffff82254200 T mod_build_hf_vsif_infopacket +ffffffff82255000 T dmub_init_abm_config +ffffffff82255540 t fill_iram_v_2_3 +ffffffff822559a0 T dmcu_load_iram +ffffffff82256180 T is_psr_su_specific_panel +ffffffff82256210 T mod_power_calc_psr_configs +ffffffff82256310 T mod_power_only_edp +ffffffff82256360 T psr_su_set_y_granularity +ffffffff82257000 T mod_vmid_get_for_ptb +ffffffff82257230 T mod_vmid_reset +ffffffff822572f0 T mod_vmid_create +ffffffff82257430 T mod_vmid_destroy +ffffffff82258000 T amdgpu_dpm_get_sclk +ffffffff82258090 T amdgpu_dpm_get_mclk +ffffffff82258120 T amdgpu_dpm_set_powergating_by_smu +ffffffff82258200 T amdgpu_dpm_set_gfx_power_up_by_imu +ffffffff82258310 T amdgpu_dpm_baco_enter +ffffffff822583a0 T amdgpu_dpm_baco_exit +ffffffff82258430 T amdgpu_dpm_set_mp1_state +ffffffff822584d0 T amdgpu_dpm_is_baco_supported +ffffffff82258580 T amdgpu_dpm_mode2_reset +ffffffff82258610 T amdgpu_dpm_baco_reset +ffffffff822586c0 T amdgpu_dpm_is_mode1_reset_supported +ffffffff82258730 T amdgpu_dpm_mode1_reset +ffffffff822587b0 T amdgpu_dpm_switch_power_profile +ffffffff82258860 T amdgpu_dpm_set_xgmi_pstate +ffffffff82258900 T amdgpu_dpm_set_df_cstate +ffffffff822589a0 T amdgpu_dpm_allow_xgmi_power_down +ffffffff82258a20 T amdgpu_dpm_enable_mgpu_fan_boost +ffffffff82258ab0 T amdgpu_dpm_set_clockgating_by_smu +ffffffff82258b50 T amdgpu_dpm_smu_i2c_bus_access +ffffffff82258bf0 T amdgpu_pm_acpi_event_handler +ffffffff82258cb0 T amdgpu_dpm_read_sensor +ffffffff82258d70 T amdgpu_dpm_compute_clocks +ffffffff82258e50 T amdgpu_dpm_enable_uvd +ffffffff82259040 T amdgpu_dpm_enable_vce +ffffffff82259230 T amdgpu_dpm_enable_jpeg +ffffffff82259330 T amdgpu_pm_load_smu_firmware +ffffffff822593e0 T amdgpu_dpm_handle_passthrough_sbr +ffffffff82259460 T amdgpu_dpm_send_hbm_bad_pages_num +ffffffff822594e0 T amdgpu_dpm_send_hbm_bad_channel_flag +ffffffff82259560 T amdgpu_dpm_get_dpm_freq_range +ffffffff82259600 T amdgpu_dpm_set_soft_freq_range +ffffffff822596a0 T amdgpu_dpm_write_watermarks_table +ffffffff82259720 T amdgpu_dpm_wait_for_event +ffffffff822597b0 T amdgpu_dpm_set_residency_gfxoff +ffffffff82259830 T amdgpu_dpm_get_residency_gfxoff +ffffffff822598b0 T amdgpu_dpm_get_entrycount_gfxoff +ffffffff82259930 T amdgpu_dpm_get_status_gfxoff +ffffffff822599b0 T amdgpu_dpm_get_thermal_throttling_counter +ffffffff82259a00 T amdgpu_dpm_gfx_state_change +ffffffff82259a70 T amdgpu_dpm_get_ecc_info +ffffffff82259af0 T amdgpu_dpm_get_vce_clock_state +ffffffff82259b80 T amdgpu_dpm_get_current_power_state +ffffffff82259bf0 T amdgpu_dpm_set_power_state +ffffffff82259d50 T amdgpu_dpm_dispatch_task +ffffffff82259df0 T amdgpu_dpm_get_performance_level +ffffffff82259e80 T amdgpu_dpm_force_performance_level +ffffffff8225a060 T amdgpu_dpm_get_pp_num_states +ffffffff8225a0f0 T amdgpu_dpm_get_pp_table +ffffffff8225a180 T amdgpu_dpm_set_fine_grain_clk_vol +ffffffff8225a220 T amdgpu_dpm_odn_edit_dpm_table +ffffffff8225a2c0 T amdgpu_dpm_print_clock_levels +ffffffff8225a350 T amdgpu_dpm_emit_clock_levels +ffffffff8225a3f0 T amdgpu_dpm_set_ppfeature_status +ffffffff8225a480 T amdgpu_dpm_get_ppfeature_status +ffffffff8225a510 T amdgpu_dpm_force_clock_level +ffffffff8225a5a0 T amdgpu_dpm_get_sclk_od +ffffffff8225a620 T amdgpu_dpm_set_sclk_od +ffffffff8225a7a0 T amdgpu_dpm_get_mclk_od +ffffffff8225a820 T amdgpu_dpm_set_mclk_od +ffffffff8225a9a0 T amdgpu_dpm_get_power_profile_mode +ffffffff8225aa30 T amdgpu_dpm_set_power_profile_mode +ffffffff8225aad0 T amdgpu_dpm_get_gpu_metrics +ffffffff8225ab60 T amdgpu_dpm_get_fan_control_mode +ffffffff8225abf0 T amdgpu_dpm_set_fan_speed_pwm +ffffffff8225ac80 T amdgpu_dpm_get_fan_speed_pwm +ffffffff8225ad10 T amdgpu_dpm_get_fan_speed_rpm +ffffffff8225ada0 T amdgpu_dpm_set_fan_speed_rpm +ffffffff8225ae30 T amdgpu_dpm_set_fan_control_mode +ffffffff8225aec0 T amdgpu_dpm_get_power_limit +ffffffff8225af70 T amdgpu_dpm_set_power_limit +ffffffff8225b000 T amdgpu_dpm_is_cclk_dpm_supported +ffffffff8225b070 T amdgpu_dpm_debugfs_print_current_performance_level +ffffffff8225b100 T amdgpu_dpm_get_smu_prv_buf_details +ffffffff8225b1a0 T amdgpu_dpm_is_overdrive_supported +ffffffff8225b210 T amdgpu_dpm_set_pp_table +ffffffff8225b2b0 T amdgpu_dpm_get_num_cpu_cores +ffffffff8225b300 T amdgpu_dpm_stb_debug_fs_init +ffffffff8225b350 T amdgpu_dpm_display_configuration_change +ffffffff8225b3e0 T amdgpu_dpm_get_clock_by_type +ffffffff8225b480 T amdgpu_dpm_get_display_mode_validation_clks +ffffffff8225b510 T amdgpu_dpm_get_clock_by_type_with_latency +ffffffff8225b5b0 T amdgpu_dpm_get_clock_by_type_with_voltage +ffffffff8225b650 T amdgpu_dpm_set_watermarks_for_clocks_ranges +ffffffff8225b6e0 T amdgpu_dpm_display_clock_voltage_request +ffffffff8225b770 T amdgpu_dpm_get_current_clocks +ffffffff8225b800 T amdgpu_dpm_notify_smu_enable_pwe +ffffffff8225b880 T amdgpu_dpm_set_active_display_count +ffffffff8225b910 T amdgpu_dpm_set_min_deep_sleep_dcefclk +ffffffff8225b9a0 T amdgpu_dpm_set_hard_min_dcefclk_by_freq +ffffffff8225ba40 T amdgpu_dpm_set_hard_min_fclk_by_freq +ffffffff8225bae0 T amdgpu_dpm_display_disable_memory_clock_switch +ffffffff8225bb70 T amdgpu_dpm_get_max_sustainable_clocks_by_dc +ffffffff8225bc00 T amdgpu_dpm_get_uclk_dpm_states +ffffffff8225bca0 T amdgpu_dpm_get_dpm_clock_table +ffffffff8225c000 T amdgpu_dpm_get_active_displays +ffffffff8225c0a0 T amdgpu_dpm_get_vblank_time +ffffffff8225c150 T amdgpu_dpm_get_vrefresh +ffffffff8225d000 T amdgpu_pm_sysfs_init +ffffffff8225d030 T amdgpu_pm_sysfs_fini +ffffffff8225d060 T amdgpu_debugfs_pm_init +ffffffff8225e000 T amdgpu_dpm_print_class_info +ffffffff8225e2b0 T amdgpu_dpm_print_cap_info +ffffffff8225e340 T amdgpu_dpm_print_ps_status +ffffffff8225e3d0 T amdgpu_pm_print_power_states +ffffffff8225e490 T amdgpu_get_platform_caps +ffffffff8225e530 T amdgpu_parse_extended_power_table +ffffffff8225f540 T amdgpu_free_extended_power_table +ffffffff8225f650 T amdgpu_add_thermal_controller +ffffffff8225fa80 T amdgpu_get_vce_clock_state +ffffffff8225fac0 T amdgpu_legacy_dpm_compute_clocks +ffffffff8225ff30 T amdgpu_dpm_thermal_work_handler +ffffffff82260000 t pp_early_init +ffffffff82260100 t pp_late_init +ffffffff82260220 t pp_sw_init +ffffffff822602b0 t pp_sw_fini +ffffffff82260340 t pp_hw_init +ffffffff822603a0 t pp_hw_fini +ffffffff82260410 t pp_late_fini +ffffffff82260470 t pp_suspend +ffffffff822604c0 t pp_resume +ffffffff822604e0 t pp_is_idle +ffffffff82260510 t pp_wait_for_idle +ffffffff82260540 t pp_sw_reset +ffffffff82260570 t pp_set_clockgating_state +ffffffff822605a0 t pp_set_powergating_state +ffffffff822605d0 t pp_dpm_set_fan_control_mode +ffffffff82260640 t pp_dpm_get_fan_control_mode +ffffffff822606b0 t pp_dpm_set_fan_speed_pwm +ffffffff82260710 t pp_dpm_get_fan_speed_pwm +ffffffff82260770 t pp_dpm_force_clock_level +ffffffff822607d0 t pp_dpm_print_clock_levels +ffffffff82260830 t pp_dpm_emit_clock_levels +ffffffff82260890 t pp_dpm_force_performance_level +ffffffff82260930 t pp_dpm_get_sclk_od +ffffffff82260990 t pp_dpm_set_sclk_od +ffffffff822609f0 t pp_dpm_get_mclk_od +ffffffff82260a50 t pp_dpm_set_mclk_od +ffffffff82260ab0 t pp_dpm_read_sensor +ffffffff82260b70 t pp_dpm_get_performance_level +ffffffff82260bb0 t pp_dpm_get_current_power_state +ffffffff82260c30 t pp_dpm_get_fan_speed_rpm +ffffffff82260c90 t pp_dpm_set_fan_speed_rpm +ffffffff82260cf0 t pp_dpm_get_pp_num_states +ffffffff82260e30 t pp_dpm_get_pp_table +ffffffff82260e80 t pp_dpm_set_pp_table +ffffffff82260fb0 t pp_dpm_switch_power_profile +ffffffff822610f0 t pp_dpm_get_vce_clock_state +ffffffff82261140 t pp_dpm_dispatch_tasks +ffffffff82261180 t pp_dpm_load_fw +ffffffff822611f0 t pp_dpm_fw_loading_complete +ffffffff82261220 t pp_set_powergating_by_smu +ffffffff822613a0 t pp_set_clockgating_by_smu +ffffffff82261410 t pp_set_power_limit +ffffffff822614d0 t pp_get_power_limit +ffffffff82261570 t pp_get_power_profile_mode +ffffffff822615d0 t pp_set_power_profile_mode +ffffffff82261630 t pp_set_fine_grain_clk_vol +ffffffff82261690 t pp_odn_edit_dpm_table +ffffffff822616f0 t pp_dpm_set_mp1_state +ffffffff82261750 t pp_smu_i2c_bus_access +ffffffff822617b0 t pp_gfx_state_change_set +ffffffff82261810 t pp_dpm_get_sclk +ffffffff82261860 t pp_dpm_get_mclk +ffffffff822618b0 t pp_display_configuration_change +ffffffff82261900 t pp_get_display_power_level +ffffffff82261940 t pp_get_current_clocks +ffffffff82261a60 t pp_get_clock_by_type +ffffffff82261ab0 t pp_get_clock_by_type_with_latency +ffffffff82261b00 t pp_get_clock_by_type_with_voltage +ffffffff82261b50 t pp_set_watermarks_for_clocks_ranges +ffffffff82261b90 t pp_display_clock_voltage_request +ffffffff82261bd0 t pp_get_display_mode_validation_clocks +ffffffff82261c30 t pp_notify_smu_enable_pwe +ffffffff82261c90 t pp_enable_mgpu_fan_boost +ffffffff82261cf0 t pp_set_active_display_count +ffffffff82261d30 t pp_set_hard_min_dcefclk_by_freq +ffffffff82261d90 t pp_set_hard_min_fclk_by_freq +ffffffff82261df0 t pp_set_min_deep_sleep_dcefclk +ffffffff82261e50 t pp_get_asic_baco_capability +ffffffff82261ec0 t pp_get_asic_baco_state +ffffffff82261f20 t pp_set_asic_baco_state +ffffffff82261f90 t pp_get_ppfeature_status +ffffffff82261ff0 t pp_set_ppfeature_status +ffffffff82262040 t pp_asic_reset_mode_2 +ffffffff822620a0 t pp_set_df_cstate +ffffffff82262100 t pp_set_xgmi_pstate +ffffffff82262160 t pp_get_gpu_metrics +ffffffff822621c0 t pp_get_prv_buffer_details +ffffffff82262240 t pp_pm_compute_clocks +ffffffff82262310 t pp_swctf_delayed_work_handler +ffffffff82262450 t __delayed_work_tick +ffffffff82262470 t orderly_poweroff +ffffffff82263000 T ci_baco_set_state +ffffffff82264000 T baco_program_registers +ffffffff822640d0 t baco_cmd_handler +ffffffff82264250 T soc15_baco_program_registers +ffffffff82265000 T fiji_baco_set_state +ffffffff82266000 T phm_setup_asic +ffffffff82266050 T phm_power_down_asic +ffffffff822660a0 T phm_set_power_state +ffffffff82266110 T phm_enable_dynamic_state_management +ffffffff822661c0 T phm_disable_dynamic_state_management +ffffffff82266260 T phm_force_dpm_levels +ffffffff822662b0 T phm_apply_state_adjust_rules +ffffffff82266300 T phm_apply_clock_adjust_rules +ffffffff82266350 T phm_powerdown_uvd +ffffffff822663a0 T phm_disable_clock_power_gatings +ffffffff822663f0 T phm_pre_display_configuration_changed +ffffffff82266450 T phm_display_configuration_changed +ffffffff822664b0 T phm_notify_smc_display_config_after_ps_adjustment +ffffffff82266510 T phm_stop_thermal_controller +ffffffff82266570 T phm_register_irq_handlers +ffffffff822665c0 T phm_start_thermal_controller +ffffffff82266710 T phm_check_smc_update_required_for_display_configuration +ffffffff82266770 T phm_check_states_equal +ffffffff822667c0 T phm_store_dal_configuration_data +ffffffff82266910 T phm_get_dal_power_level +ffffffff82266970 T phm_set_cpu_power_state +ffffffff822669c0 T phm_get_performance_level +ffffffff82266a20 T phm_get_clock_info +ffffffff82266ba0 T phm_get_current_shallow_sleep_clocks +ffffffff82266bf0 T phm_get_clock_by_type +ffffffff82266c40 T phm_get_clock_by_type_with_latency +ffffffff82266c90 T phm_get_clock_by_type_with_voltage +ffffffff82266ce0 T phm_set_watermarks_for_clocks_ranges +ffffffff82266d30 T phm_display_clock_voltage_request +ffffffff82266d80 T phm_get_max_high_clocks +ffffffff82266dd0 T phm_disable_smc_firmware_ctf +ffffffff82266e30 T phm_set_active_display_count +ffffffff82267000 T hwmgr_early_init +ffffffff82267470 T hwmgr_sw_init +ffffffff822674e0 T hwmgr_sw_fini +ffffffff82267530 T hwmgr_hw_init +ffffffff822676f0 T hwmgr_hw_fini +ffffffff822677b0 T hwmgr_suspend +ffffffff82267830 T hwmgr_resume +ffffffff822678d0 T hwmgr_handle_task +ffffffff82268000 T polaris_baco_set_state +ffffffff82269000 T pp_override_get_default_fuse_value +ffffffff8226a000 T psm_init_power_state_table +ffffffff8226a2a0 T psm_fini_power_state_table +ffffffff8226a360 T psm_set_boot_states +ffffffff8226a420 T psm_set_performance_states +ffffffff8226a4e0 T psm_set_user_performance_state +ffffffff8226a580 T psm_adjust_power_state_dynamic +ffffffff8226b000 T atomctrl_initialize_mc_reg_table +ffffffff8226b210 T atomctrl_initialize_mc_reg_table_v2_2 +ffffffff8226b420 T atomctrl_set_engine_dram_timings_rv770 +ffffffff8226b490 T atomctrl_get_memory_pll_dividers_si +ffffffff8226b570 T atomctrl_get_memory_pll_dividers_vi +ffffffff8226b5f0 T atomctrl_get_memory_pll_dividers_ai +ffffffff8226b6a0 T atomctrl_get_engine_pll_dividers_kong +ffffffff8226b720 T atomctrl_get_engine_pll_dividers_vi +ffffffff8226b7e0 T atomctrl_get_engine_pll_dividers_ai +ffffffff8226b8c0 T atomctrl_get_dfs_pll_dividers_vi +ffffffff8226b980 T atomctrl_get_reference_clock +ffffffff8226b9e0 T atomctrl_is_voltage_controlled_by_gpio_v3 +ffffffff8226baa0 T atomctrl_get_voltage_table_v3 +ffffffff8226bc00 T atomctrl_get_pp_assign_pin +ffffffff8226bcf0 T atomctrl_calculate_voltage_evv_on_sclk +ffffffff8226c070 T atomctrl_get_voltage_evv_on_sclk +ffffffff8226c0f0 T atomctrl_get_voltage_evv +ffffffff8226c1a0 T atomctrl_get_mpll_reference_clock +ffffffff8226c210 T atomctrl_is_asic_internal_ss_supported +ffffffff8226c260 T atomctrl_get_memory_clock_spread_spectrum +ffffffff8226c360 T atomctrl_get_engine_clock_spread_spectrum +ffffffff8226c460 T atomctrl_read_efuse +ffffffff8226c510 T atomctrl_set_ac_timing_ai +ffffffff8226c570 T atomctrl_get_voltage_evv_on_sclk_ai +ffffffff8226c5f0 T atomctrl_get_smc_sclk_range_table +ffffffff8226c6b0 T atomctrl_get_vddc_shared_railinfo +ffffffff8226c720 T atomctrl_get_avfs_information +ffffffff8226c8a0 T atomctrl_get_svi2_info +ffffffff8226c980 T atomctrl_get_leakage_id_from_efuse +ffffffff8226c9e0 T atomctrl_get_leakage_vddc_base_on_leakage +ffffffff8226cb80 T atomctrl_get_voltage_range +ffffffff8226cc40 T atomctrl_get_edc_hilo_leakage_offset_table +ffffffff8226ccc0 T atomctrl_get_edc_leakage_table +ffffffff8226d000 T pp_atomfwctrl_is_voltage_controlled_by_gpio_v4 +ffffffff8226d0d0 T pp_atomfwctrl_get_voltage_table_v4 +ffffffff8226d290 T pp_atomfwctrl_get_pp_assign_pin +ffffffff8226d370 T pp_atomfwctrl_enter_self_refresh +ffffffff8226d3a0 T pp_atomfwctrl_get_gpu_pll_dividers_vega10 +ffffffff8226d450 T pp_atomfwctrl_get_avfs_information +ffffffff8226d780 T pp_atomfwctrl_get_gpio_information +ffffffff8226d820 T pp_atomfwctrl_get_clk_information_by_clkid +ffffffff8226d8a0 T pp_atomfwctrl_get_vbios_bootup_values +ffffffff8226dc20 T pp_atomfwctrl_get_smc_dpm_information +ffffffff8226e000 T encode_pcie_lane_width +ffffffff8226e030 T decode_pcie_lane_width +ffffffff8226f000 t pp_tables_v1_0_initialize +ffffffff82270430 t pp_tables_v1_0_uninitialize +ffffffff822705e0 T get_number_of_powerplay_table_entries_v1_0 +ffffffff82270690 T get_powerplay_table_entry_v1_0 +ffffffff82271000 T pp_tables_get_response_times +ffffffff822710d0 T pp_tables_get_num_of_entries +ffffffff82271190 T pp_tables_get_entry +ffffffff822714f0 t init_non_clock_fields +ffffffff82271670 t pp_tables_initialize +ffffffff82272ad0 t pp_tables_uninitialize +ffffffff82272cd0 t get_number_of_vce_state_table_entries +ffffffff82272dd0 t get_vce_state_table_entry +ffffffff82273000 T smu10_init_function_pointers +ffffffff82273040 t smu10_hwmgr_backend_init +ffffffff82273700 t smu10_hwmgr_backend_fini +ffffffff82273840 t smu10_setup_asic_task +ffffffff822738b0 t smu10_get_power_state_size +ffffffff822738e0 t smu10_apply_state_adjust_rules +ffffffff82273910 t smu10_dpm_force_dpm_level +ffffffff82273e90 t smu10_enable_dpm_tasks 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smu10_print_clock_levels +ffffffff82274d90 t smu10_gfx_off_control +ffffffff82274ea0 t smu10_read_sensor +ffffffff82275020 t smu10_set_active_display_count +ffffffff82275080 t smu10_set_min_deep_sleep_dcefclk +ffffffff822750e0 t smu10_get_power_profile_mode +ffffffff82275120 t smu10_set_power_profile_mode +ffffffff82275270 t smu10_set_fine_grain_clk_vol +ffffffff82275480 t smu10_powergate_mmhub +ffffffff822754a0 t smu10_smus_notify_pwe +ffffffff822754c0 t smu10_powergate_sdma +ffffffff822754e0 t smu10_set_hard_min_dcefclk_by_freq +ffffffff82275540 t smu10_set_hard_min_fclk_by_freq +ffffffff822755a0 t smu10_set_hard_min_gfxclk_by_freq +ffffffff82275600 t smu10_set_soft_max_gfxclk_by_freq +ffffffff82275660 t smu10_asic_reset +ffffffff82275680 t smu10_gfx_state_change +ffffffff822756c0 t smu10_dpm_get_pp_table_entry_callback +ffffffff82276000 T smu7_baco_get_capability +ffffffff82276060 T smu7_baco_get_state +ffffffff822760b0 T smu7_baco_set_state +ffffffff82277000 T smu7_powerdown_uvd +ffffffff82277050 T smu7_disable_clock_power_gating +ffffffff822770e0 T smu7_powergate_uvd +ffffffff822771d0 T smu7_powergate_vce +ffffffff822772c0 T smu7_update_clock_gatings +ffffffff82277670 T smu7_powergate_gfx +ffffffff82278000 T smu7_get_sleep_divider_id_from_clock +ffffffff822780a0 T smu7_init_function_pointers +ffffffff82278100 t smu7_hwmgr_backend_init +ffffffff82279f50 t smu7_hwmgr_backend_fini +ffffffff82279fc0 t smu7_setup_asic_task +ffffffff8227a330 t smu7_get_power_state_size +ffffffff8227a360 t smu7_apply_state_adjust_rules +ffffffff8227a7e0 t smu7_force_dpm_level +ffffffff8227acf0 t smu7_enable_dpm_tasks +ffffffff8227d680 t smu7_disable_dpm_tasks +ffffffff8227ddc0 t smu7_dpm_patch_boot_state +ffffffff8227df00 t smu7_get_pp_table_entry +ffffffff8227e300 t smu7_get_number_of_powerplay_table_entries +ffffffff8227e370 t smu7_dpm_get_mclk +ffffffff8227e410 t smu7_dpm_get_sclk +ffffffff8227e4b0 t smu7_set_power_state_tasks +ffffffff8227f240 t smu7_notify_smc_display_config_after_ps_adjustment +ffffffff8227f270 t smu7_display_configuration_changed_task +ffffffff8227f430 t smu7_set_max_fan_rpm_output +ffffffff8227f460 t smu7_set_max_fan_pwm_output +ffffffff8227f480 t smu7_set_fan_control_mode +ffffffff8227f510 t smu7_get_fan_control_mode +ffffffff8227f550 t smu7_register_irq_handlers +ffffffff8227f600 t smu7_check_smc_update_required_for_display_configuration +ffffffff8227f6c0 t smu7_check_states_equal +ffffffff8227f860 t smu7_get_performance_level +ffffffff8227f900 t smu7_get_clock_by_type +ffffffff8227fac0 t smu7_get_clock_by_type_with_latency +ffffffff8227fc60 t smu7_set_watermarks_for_clocks_ranges +ffffffff8227fea0 t smu7_get_max_high_clocks +ffffffff8227ff20 t smu7_power_off_asic +ffffffff8227ff80 t smu7_force_clock_level +ffffffff82280090 t smu7_print_clock_levels +ffffffff82280670 t smu7_get_sclk_od +ffffffff822806e0 t smu7_set_sclk_od +ffffffff822807a0 t smu7_get_mclk_od +ffffffff82280810 t smu7_set_mclk_od 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smu7_disable_power_containment +ffffffff82283c90 T smu7_power_control_set_level +ffffffff82284000 T smu7_fan_ctrl_get_fan_speed_info +ffffffff82284080 T smu7_fan_ctrl_get_fan_speed_pwm +ffffffff82284140 T smu7_fan_ctrl_get_fan_speed_rpm +ffffffff822841f0 T smu7_fan_ctrl_set_static_mode +ffffffff82284320 T smu7_fan_ctrl_set_default_mode +ffffffff82284400 T smu7_fan_ctrl_start_smc_fan_control +ffffffff82284530 T smu7_fan_ctrl_stop_smc_fan_control +ffffffff82284550 T smu7_fan_ctrl_set_fan_speed_pwm +ffffffff82284740 T smu7_fan_ctrl_reset_fan_speed_to_default +ffffffff82284930 T smu7_fan_ctrl_set_fan_speed_rpm +ffffffff82284b10 T smu7_thermal_get_temperature +ffffffff82284b70 T smu7_thermal_disable_alert +ffffffff82284c10 T smu7_thermal_stop_thermal_controller +ffffffff82284d90 T smu7_start_thermal_controller +ffffffff82285140 T smu7_thermal_ctrl_uninitialize_thermal_controller +ffffffff82286000 T smu8_init_function_pointers +ffffffff82286040 t smu8_hwmgr_backend_init +ffffffff82286520 t smu8_hwmgr_backend_fini +ffffffff822865a0 t smu8_setup_asic_task +ffffffff82286ac0 t smu8_get_power_state_size +ffffffff82286af0 t smu8_apply_state_adjust_rules +ffffffff82286c40 t smu8_dpm_force_dpm_level +ffffffff82286f30 t smu8_enable_dpm_tasks +ffffffff822870c0 t smu8_disable_dpm_tasks +ffffffff822871a0 t smu8_dpm_patch_boot_state +ffffffff82287200 t smu8_dpm_get_pp_table_entry +ffffffff82287260 t smu8_dpm_get_num_of_pp_table_entries +ffffffff822872b0 t smu8_dpm_powerdown_uvd +ffffffff82287300 t smu8_dpm_powergate_vce +ffffffff822874d0 t smu8_dpm_powergate_uvd +ffffffff82287700 t smu8_dpm_powergate_acp +ffffffff82287760 t smu8_dpm_get_mclk +ffffffff82287790 t smu8_dpm_get_sclk +ffffffff82287800 t smu8_set_power_state_tasks +ffffffff82287b50 t smu8_set_cpu_power_state +ffffffff82287bd0 t smu8_store_cc6_data +ffffffff82287c50 t smu8_get_dal_power_level +ffffffff82287cd0 t smu8_get_performance_level +ffffffff82287dc0 t smu8_get_current_shallow_sleep_clocks +ffffffff82287e20 t smu8_get_clock_by_type +ffffffff82287f60 t smu8_get_max_high_clocks +ffffffff82288020 t smu8_power_off_asic +ffffffff822880a0 t smu8_force_clock_level +ffffffff82288110 t smu8_print_clock_levels +ffffffff822882e0 t smu8_read_sensor +ffffffff822885e0 t smu8_notify_cac_buffer_info +ffffffff82288690 t smu8_get_thermal_temperature_range +ffffffff82288710 t smu8_dpm_get_pp_table_entry_callback +ffffffff82289000 T smu9_baco_get_capability +ffffffff822890d0 T smu9_baco_get_state +ffffffff8228a000 T convert_to_vid +ffffffff8228a050 T convert_to_vddc +ffffffff8228a0a0 T phm_copy_clock_limits_array +ffffffff8228a180 T phm_copy_overdrive_settings_limits_array +ffffffff8228a260 T phm_set_field_to_u32 +ffffffff8228a2c0 T phm_wait_on_register +ffffffff8228a3d0 T phm_wait_on_indirect_register +ffffffff8228a500 T phm_wait_for_register_unequal +ffffffff8228a600 T phm_wait_for_indirect_register_unequal +ffffffff8228a730 T phm_cf_want_uvd_power_gating +ffffffff8228a770 T phm_cf_want_vce_power_gating +ffffffff8228a7b0 T phm_trim_voltage_table +ffffffff8228a8e0 T phm_get_svi2_mvdd_voltage_table +ffffffff8228aa70 T phm_get_svi2_vddci_voltage_table +ffffffff8228ac00 T phm_get_svi2_vdd_voltage_table +ffffffff8228aca0 T phm_trim_voltage_table_to_fit_state_table +ffffffff8228ad80 T phm_reset_single_dpm_table +ffffffff8228ae50 T phm_setup_pcie_table_entry +ffffffff8228ae90 T phm_get_dpm_level_enable_mask_value +ffffffff8228afb0 T phm_get_voltage_index +ffffffff8228b030 T phm_get_voltage_id +ffffffff8228b0b0 T phm_find_closest_vddci +ffffffff8228b110 T phm_find_boot_level +ffffffff8228b180 T phm_get_sclk_for_voltage_evv +ffffffff8228b230 T phm_initializa_dynamic_state_adjustment_rule_settings +ffffffff8228b340 T phm_get_lowest_enabled_level +ffffffff8228b380 T phm_apply_dal_min_voltage_request +ffffffff8228b450 T phm_get_voltage_evv_on_sclk +ffffffff8228b500 T phm_irq_process +ffffffff8228b6a0 t orderly_poweroff +ffffffff8228b6b0 T smu9_register_irq_handlers +ffffffff8228b760 T smu_atom_get_data_table +ffffffff8228b7d0 T smu_get_voltage_dependency_table_ppt_v1 +ffffffff8228b8b0 T smu_set_watermarks_for_clocks_ranges +ffffffff8228c000 T tonga_baco_set_state +ffffffff8228d000 T vega10_baco_set_state +ffffffff8228e000 T vega10_enable_disable_vce_dpm +ffffffff8228e090 T vega10_hwmgr_init +ffffffff8228e0f0 t vega10_hwmgr_backend_init +ffffffff8228eef0 t vega10_hwmgr_backend_fini +ffffffff8228ef60 t vega10_setup_asic_task +ffffffff8228f090 t vega10_get_power_state_size +ffffffff8228f0c0 t vega10_apply_state_adjust_rules +ffffffff8228f450 t vega10_dpm_force_dpm_level +ffffffff8228f8b0 t vega10_enable_dpm_tasks +ffffffff82292320 t vega10_disable_dpm_tasks +ffffffff82292900 t vega10_patch_boot_state +ffffffff82292930 t vega10_get_pp_table_entry +ffffffff822929a0 t vega10_power_gate_vce +ffffffff82292a40 t vega10_power_gate_uvd +ffffffff82292ae0 t vega10_dpm_get_mclk +ffffffff82292b80 t vega10_dpm_get_sclk +ffffffff82292c20 t vega10_set_power_state_tasks +ffffffff822936b0 t vega10_notify_smc_display_config_after_ps_adjustment +ffffffff82293860 t vega10_display_configuration_changed_task +ffffffff82293930 t vega10_set_fan_control_mode +ffffffff822939a0 t vega10_get_fan_control_mode +ffffffff822939e0 t vega10_check_smc_update_required_for_display_configuration +ffffffff82293a40 t vega10_check_states_equal +ffffffff82293ba0 t vega10_get_dal_power_level +ffffffff82293be0 t vega10_get_performance_level +ffffffff82293c80 t vega10_get_clock_by_type_with_latency +ffffffff82293eb0 t vega10_get_clock_by_type_with_voltage +ffffffff82293f90 t vega10_set_watermarks_for_clocks_ranges +ffffffff82293ff0 t vega10_display_clock_voltage_request +ffffffff82294070 t vega10_power_off_asic +ffffffff822940e0 t vega10_force_clock_level +ffffffff82294210 t vega10_emit_clock_levels +ffffffff82294380 t vega10_print_clock_levels +ffffffff82294b60 t vega10_get_sclk_od +ffffffff82294bd0 t vega10_set_sclk_od +ffffffff82294cd0 t vega10_get_mclk_od +ffffffff82294d40 t vega10_set_mclk_od +ffffffff82294e30 t vega10_read_sensor +ffffffff82295080 t vega10_avfs_enable +ffffffff82295140 t vega10_notify_cac_buffer_info +ffffffff822951f0 t vega10_get_thermal_temperature_range +ffffffff82295310 t vega10_get_power_profile_mode +ffffffff82295350 t vega10_set_power_profile_mode +ffffffff82295470 t vega10_odn_edit_dpm_table +ffffffff82295a30 t vega10_get_ppfeature_status +ffffffff82295ab0 t vega10_set_ppfeature_status +ffffffff82295b50 t vega10_set_mp1_state +ffffffff82295bc0 t vega10_disable_power_features_for_compute_performance +ffffffff82295db0 t vega10_upload_dpm_bootup_level +ffffffff82295ec0 t vega10_upload_dpm_max_level +ffffffff82295fa0 t vega10_trim_voltage_table_to_fit_state_table +ffffffff822960a0 t vega10_odn_initial_default_setting +ffffffff82296270 t vega10_populate_all_graphic_levels +ffffffff82296470 t vega10_populate_all_memory_levels +ffffffff822965d0 t vega10_populate_single_gfx_level +ffffffff82296720 t vega10_populate_single_soc_level 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vega10_fan_ctrl_set_static_mode +ffffffff8229c550 T vega10_fan_ctrl_set_default_mode +ffffffff8229c760 T vega10_fan_ctrl_start_smc_fan_control +ffffffff8229c820 T vega10_fan_ctrl_stop_smc_fan_control +ffffffff8229c8e0 T vega10_fan_ctrl_set_fan_speed_pwm +ffffffff8229cb00 T vega10_fan_ctrl_reset_fan_speed_to_default +ffffffff8229cbc0 T vega10_fan_ctrl_set_fan_speed_rpm +ffffffff8229cd90 T vega10_thermal_get_temperature +ffffffff8229ce20 T vega10_thermal_disable_alert +ffffffff8229cf30 T vega10_thermal_stop_thermal_controller +ffffffff8229cf90 T vega10_enable_mgpu_fan_boost +ffffffff8229d0a0 T vega10_start_thermal_controller +ffffffff8229d640 T vega10_thermal_ctrl_uninitialize_thermal_controller +ffffffff8229e000 T vega12_baco_set_state +ffffffff8229f000 T vega12_enable_disable_vce_dpm +ffffffff8229f090 T vega12_hwmgr_init +ffffffff8229f0d0 t vega12_hwmgr_backend_init +ffffffff8229f930 t vega12_hwmgr_backend_fini +ffffffff8229f990 t vega12_setup_asic_task +ffffffff8229f9d0 t vega12_apply_clocks_adjust_rules +ffffffff8229fdc0 t vega12_dpm_force_dpm_level +ffffffff822a0210 t vega12_enable_dpm_tasks +ffffffff822a0d00 t vega12_disable_dpm_tasks +ffffffff822a0e00 t vega12_patch_boot_state +ffffffff822a0e30 t vega12_power_gate_vce +ffffffff822a0ee0 t vega12_power_gate_uvd +ffffffff822a0f90 t vega12_dpm_get_mclk +ffffffff822a0fe0 t vega12_dpm_get_sclk +ffffffff822a1030 t vega12_notify_smc_display_config_after_ps_adjustment +ffffffff822a1190 t vega12_pre_display_configuration_changed_task +ffffffff822a1270 t vega12_display_configuration_changed_task +ffffffff822a1350 t vega12_set_fan_control_mode +ffffffff822a13b0 t vega12_get_fan_control_mode +ffffffff822a13f0 t vega12_check_smc_update_required_for_display_configuration +ffffffff822a1450 t vega12_get_dal_power_level +ffffffff822a1480 t vega12_get_performance_level +ffffffff822a14b0 t vega12_get_clock_by_type_with_latency +ffffffff822a1790 t vega12_get_clock_by_type_with_voltage +ffffffff822a17c0 t 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arcturus_get_power_profile_mode +ffffffff822deb20 t arcturus_set_power_profile_mode +ffffffff822dee00 t arcturus_dpm_set_vcn_enable +ffffffff822deed0 t arcturus_read_sensor +ffffffff822df0b0 t arcturus_is_dpm_running +ffffffff822df100 t arcturus_get_fan_speed_pwm +ffffffff822df240 t arcturus_get_fan_speed_rpm +ffffffff822df350 t arcturus_get_thermal_temperature_range +ffffffff822df450 t arcturus_set_performance_level +ffffffff822df560 t arcturus_dump_pptable +ffffffff822df590 t arcturus_get_power_limit +ffffffff822df690 t arcturus_set_df_cstate +ffffffff822df7a0 t arcturus_allow_xgmi_power_down +ffffffff822df890 t arcturus_i2c_control_init +ffffffff822df9c0 t arcturus_i2c_control_fini +ffffffff822dfa00 t arcturus_get_unique_id +ffffffff822dfb20 t arcturus_init_smc_tables +ffffffff822dfc90 t arcturus_setup_pptable +ffffffff822dfdd0 t arcturus_set_fan_speed_pwm +ffffffff822dff70 t arcturus_set_fan_speed_rpm +ffffffff822e0090 t arcturus_log_thermal_throttling_event +ffffffff822e0480 t arcturus_get_gpu_metrics +ffffffff822e0690 t arcturus_get_fan_parameters +ffffffff822e06d0 t arcturus_get_current_clk_freq_by_table +ffffffff822e0810 t arcturus_get_smu_metrics_data +ffffffff822e0a80 t arcturus_upload_dpm_level +ffffffff822e0b70 t arcturus_i2c_xfer +ffffffff822e0e30 t arcturus_i2c_func +ffffffff822e0e60 t arcturus_set_fan_static_mode +ffffffff822e2000 T cyan_skillfish_set_ppt_funcs +ffffffff822e2030 t cyan_skillfish_print_clk_levels +ffffffff822e2150 t cyan_skillfish_od_edit_dpm_table +ffffffff822e2430 t cyan_skillfish_read_sensor +ffffffff822e25e0 t cyan_skillfish_is_dpm_running +ffffffff822e2680 t cyan_skillfish_init_smc_tables +ffffffff822e2760 t cyan_skillfish_get_enabled_mask +ffffffff822e27a0 t cyan_skillfish_get_dpm_ultimate_freq +ffffffff822e2860 t cyan_skillfish_get_gpu_metrics +ffffffff822e2b00 t cyan_skillfish_get_smu_metrics_data +ffffffff822e3000 T navi10_set_ppt_funcs +ffffffff822e3050 t navi10_run_btc +ffffffff822e30d0 t navi10_get_allowed_feature_mask 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navi10_set_default_od_settings +ffffffff822e5750 t navi10_display_disable_memory_clock_switch +ffffffff822e57d0 t navi10_get_power_limit +ffffffff822e58f0 t navi10_update_pcie_parameters +ffffffff822e5a50 t navi10_i2c_control_init +ffffffff822e5b80 t navi10_i2c_control_fini +ffffffff822e5bc0 t navi10_init_smc_tables +ffffffff822e5df0 t navi10_setup_pptable +ffffffff822e6000 t navi10_baco_enter +ffffffff822e6050 t navi10_baco_exit +ffffffff822e6150 t navi1x_get_gpu_metrics +ffffffff822e6af0 t navi10_enable_mgpu_fan_boost +ffffffff822e6b70 t navi10_get_fan_parameters +ffffffff822e6bb0 t navi10_post_smu_init +ffffffff822e6e30 t navi10_get_default_config_table_settings +ffffffff822e6e80 t navi10_set_config_table +ffffffff822e6f30 t navi1x_get_smu_metrics_data +ffffffff822e7390 t navi10_get_smu_metrics_data +ffffffff822e75c0 t navi10_i2c_xfer +ffffffff822e7880 t navi10_i2c_func +ffffffff822e78b0 t navi10_umc_hybrid_cdr_workaround +ffffffff822e8000 T sienna_cichlid_set_ppt_funcs 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smu_v11_0_set_power_limit +ffffffff822ee920 T smu_v11_0_interrupt_work +ffffffff822ee9a0 T smu_v11_0_enable_thermal_alert +ffffffff822eea40 T smu_v11_0_disable_thermal_alert +ffffffff822eea60 T smu_v11_0_get_gfx_vdd +ffffffff822eeb20 T smu_v11_0_display_clock_voltage_request +ffffffff822eec60 T smu_v11_0_set_hard_freq_limited_range +ffffffff822eed40 T smu_v11_0_gfx_off_control +ffffffff822eedb0 T smu_v11_0_get_fan_control_mode +ffffffff822eee00 T smu_v11_0_set_fan_speed_pwm +ffffffff822eefa0 t smu_v11_0_set_fan_static_mode +ffffffff822ef150 T smu_v11_0_set_fan_speed_rpm +ffffffff822ef270 T smu_v11_0_get_fan_speed_pwm +ffffffff822ef3b0 T smu_v11_0_get_fan_speed_rpm +ffffffff822ef4b0 T smu_v11_0_set_fan_control_mode +ffffffff822ef650 T smu_v11_0_set_xgmi_pstate +ffffffff822ef670 T smu_v11_0_register_irq_handler +ffffffff822ef730 T smu_v11_0_get_max_sustainable_clocks_by_dc +ffffffff822ef7c0 T smu_v11_0_set_azalia_d3_pme +ffffffff822ef7e0 T smu_v11_0_baco_set_armd3_sequence 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smu_v11_0_gfx_ulv_control +ffffffff822f09d0 T smu_v11_0_deep_sleep_control +ffffffff822f0b80 T smu_v11_0_restore_user_od_settings +ffffffff822f0c10 T smu_v11_0_set_smu_mailbox_registers +ffffffff822f0c80 t smu_v11_0_set_irq_state +ffffffff822f1200 t smu_v11_0_irq_process +ffffffff822f14e0 t orderly_poweroff +ffffffff822f2000 T vangogh_set_ppt_funcs +ffffffff822f2040 t vangogh_set_default_dpm_tables +ffffffff822f2070 t vangogh_common_print_clk_levels +ffffffff822f24d0 t vangogh_force_clk_levels +ffffffff822f2700 t vangogh_od_edit_dpm_table +ffffffff822f2c30 t vangogh_get_power_profile_mode +ffffffff822f2d00 t vangogh_set_power_profile_mode +ffffffff822f2e20 t vangogh_dpm_set_vcn_enable +ffffffff822f2e70 t vangogh_dpm_set_jpeg_enable +ffffffff822f2ec0 t vangogh_read_sensor +ffffffff822f2ff0 t vangogh_is_dpm_running +ffffffff822f3050 t vangogh_set_watermarks_table +ffffffff822f31e0 t vangogh_set_performance_level +ffffffff822f3b10 t vangogh_get_power_limit +ffffffff822f3c90 t vangogh_get_ppt_limit +ffffffff822f3d00 t vangogh_get_dpm_clock_table +ffffffff822f3e70 t vangogh_init_smc_tables +ffffffff822f40c0 t vangogh_system_features_control +ffffffff822f4110 t vangogh_set_power_limit +ffffffff822f4270 t vangogh_get_gfxoff_status +ffffffff822f4300 t vangogh_get_gfxoff_entrycount +ffffffff822f4370 t vangogh_set_gfxoff_residency +ffffffff822f43e0 t vangogh_get_gfxoff_residency +ffffffff822f4420 t vangogh_mode2_reset +ffffffff822f4560 t vangogh_common_get_gpu_metrics +ffffffff822f4bb0 t vangogh_post_smu_init +ffffffff822f4d50 t vangogh_set_fine_grain_gfx_freq_parameters +ffffffff822f4dc0 t vangogh_common_get_smu_metrics_data +ffffffff822f5110 t vangogh_force_dpm_limit_value +ffffffff822f5250 t vangogh_get_dpm_ultimate_freq +ffffffff822f5610 t vangogh_set_soft_freq_limited_range +ffffffff822f6000 T renoir_set_ppt_funcs +ffffffff822f60a0 t renoir_get_current_power_state +ffffffff822f6120 t renoir_print_clk_levels +ffffffff822f6620 t renoir_force_clk_levels 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T smu_v12_0_get_gfxoff_status +ffffffff822f9240 T smu_v12_0_gfx_off_control +ffffffff822f9360 T smu_v12_0_fini_smc_tables +ffffffff822f9410 T smu_v12_0_set_default_dpm_tables +ffffffff822f9440 T smu_v12_0_mode2_reset +ffffffff822f9460 T smu_v12_0_set_soft_freq_limited_range +ffffffff822f95a0 T smu_v12_0_set_driver_table_location +ffffffff822f9610 T smu_v12_0_get_vbios_bootup_values +ffffffff822fa000 T aldebaran_set_ppt_funcs +ffffffff822fa040 t aldebaran_get_allowed_feature_mask +ffffffff822fa090 t aldebaran_set_default_dpm_table +ffffffff822fa290 t aldebaran_populate_umd_state_clk +ffffffff822fa390 t aldebaran_print_clk_levels +ffffffff822fa550 t aldebaran_force_clk_levels +ffffffff822fa700 t aldebaran_usr_edit_dpm_table +ffffffff822fa920 t aldebaran_read_sensor +ffffffff822fabc0 t aldebaran_is_dpm_running +ffffffff822fac10 t aldebaran_get_thermal_temperature_range +ffffffff822face0 t aldebaran_set_performance_level +ffffffff822fad90 t aldebaran_get_power_limit +ffffffff822faf20 t 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aldebaran_get_ecc_info +ffffffff822fc370 t aldebaran_send_hbm_bad_channel_flag +ffffffff822fc450 t aldebaran_get_current_clk_freq_by_table +ffffffff822fc590 t aldebaran_get_smu_metrics_data +ffffffff822fc7e0 t aldebaran_upload_dpm_level +ffffffff822fc8d0 t aldebaran_i2c_xfer +ffffffff822fcb80 t aldebaran_i2c_func +ffffffff822fd000 T smu_v13_0_init_microcode +ffffffff822fd1d0 T smu_v13_0_fini_microcode +ffffffff822fd250 T smu_v13_0_load_microcode +ffffffff822fd280 T smu_v13_0_init_pptable_microcode +ffffffff822fd430 T smu_v13_0_get_pptable_from_firmware +ffffffff822fd550 T smu_v13_0_check_fw_status +ffffffff822fd5c0 T smu_v13_0_check_fw_version +ffffffff822fd6f0 T smu_v13_0_setup_pptable +ffffffff822fd890 T smu_v13_0_init_smc_tables +ffffffff822fd9e0 T smu_v13_0_fini_smc_tables +ffffffff822fdbd0 T smu_v13_0_init_power +ffffffff822fdc50 T smu_v13_0_fini_power +ffffffff822fdcd0 T smu_v13_0_get_vbios_bootup_values +ffffffff822fdf60 T smu_v13_0_notify_memory_pool_location +ffffffff822fe020 T smu_v13_0_set_min_deep_sleep_dcefclk +ffffffff822fe0a0 T smu_v13_0_set_driver_table_location +ffffffff822fe110 T smu_v13_0_set_tool_table_location +ffffffff822fe180 T smu_v13_0_init_display_count +ffffffff822fe1c0 T smu_v13_0_set_allowed_mask +ffffffff822fe290 T smu_v13_0_gfx_off_control +ffffffff822fe300 T smu_v13_0_system_features_control +ffffffff822fe320 T smu_v13_0_notify_display_change +ffffffff822fe390 T smu_v13_0_init_max_sustainable_clocks +ffffffff822fe5f0 t smu_v13_0_get_max_sustainable_clock +ffffffff822fe710 T smu_v13_0_get_current_power_limit +ffffffff822fe7e0 T smu_v13_0_set_power_limit +ffffffff822fe8f0 T smu_v13_0_enable_thermal_alert +ffffffff822fe980 T smu_v13_0_disable_thermal_alert +ffffffff822fe9c0 T smu_v13_0_get_gfx_vdd +ffffffff822fea80 T smu_v13_0_display_clock_voltage_request +ffffffff822febc0 T smu_v13_0_set_hard_freq_limited_range +ffffffff822feca0 T smu_v13_0_get_fan_control_mode +ffffffff822fecf0 T smu_v13_0_set_fan_speed_pwm +ffffffff822fef00 t smu_v13_0_set_fan_static_mode +ffffffff822ff0c0 T smu_v13_0_set_fan_control_mode +ffffffff822ff220 T smu_v13_0_set_fan_speed_rpm +ffffffff822ff3c0 T smu_v13_0_set_xgmi_pstate +ffffffff822ff3e0 T smu_v13_0_register_irq_handler +ffffffff822ff4b0 T smu_v13_0_get_max_sustainable_clocks_by_dc +ffffffff822ff540 T smu_v13_0_set_azalia_d3_pme +ffffffff822ff560 T smu_v13_0_wait_for_event +ffffffff822ff5c0 T smu_v13_0_get_dpm_ultimate_freq +ffffffff822ff720 T smu_v13_0_set_soft_freq_limited_range +ffffffff822ff800 T smu_v13_0_set_performance_level +ffffffff822fff90 T smu_v13_0_set_power_source +ffffffff822ffff0 T smu_v13_0_set_single_dpm_table +ffffffff82300270 T smu_v13_0_get_dpm_level_range +ffffffff823003f0 T smu_v13_0_get_current_pcie_link_width_level +ffffffff82300440 T smu_v13_0_get_current_pcie_link_width +ffffffff823004a0 T smu_v13_0_get_current_pcie_link_speed_level +ffffffff823004f0 T smu_v13_0_get_current_pcie_link_speed +ffffffff82300540 T smu_v13_0_set_vcn_enable +ffffffff823005f0 T smu_v13_0_set_jpeg_enable +ffffffff82300610 T smu_v13_0_run_btc +ffffffff82300690 T smu_v13_0_gpo_control +ffffffff82300720 T smu_v13_0_deep_sleep_control +ffffffff82300980 T smu_v13_0_gfx_ulv_control +ffffffff823009f0 T smu_v13_0_baco_set_armd3_sequence +ffffffff82300a10 T smu_v13_0_baco_is_support +ffffffff82300aa0 T smu_v13_0_baco_get_state +ffffffff82300ad0 T smu_v13_0_baco_set_state +ffffffff82300b90 T smu_v13_0_baco_enter +ffffffff82300ca0 T smu_v13_0_baco_exit +ffffffff82300d40 T smu_v13_0_set_gfx_power_up_by_imu +ffffffff82300d80 T smu_v13_0_od_edit_dpm_table +ffffffff82301030 T smu_v13_0_set_default_dpm_tables +ffffffff82301060 T smu_v13_0_set_smu_mailbox_registers +ffffffff823010d0 T smu_v13_0_mode1_reset +ffffffff82301150 T smu_v13_0_update_pcie_parameters +ffffffff823013b0 t smu_v13_0_set_irq_state +ffffffff82301930 t smu_v13_0_irq_process +ffffffff82301df0 t orderly_poweroff +ffffffff82302000 T smu_v13_0_0_set_ppt_funcs +ffffffff823020e0 t smu_v13_0_0_get_allowed_feature_mask +ffffffff82302220 t smu_v13_0_0_set_default_dpm_table +ffffffff82302650 t smu_v13_0_0_populate_umd_state_clk +ffffffff82302780 t smu_v13_0_0_print_clk_levels +ffffffff823028a0 t smu_v13_0_0_force_clk_levels +ffffffff82302a20 t smu_v13_0_0_get_power_profile_mode +ffffffff82302c80 t smu_v13_0_0_set_power_profile_mode +ffffffff82302f80 t smu_v13_0_0_read_sensor +ffffffff823031a0 t smu_v13_0_0_is_dpm_running +ffffffff823031f0 t smu_v13_0_0_get_fan_speed_pwm +ffffffff823032d0 t smu_v13_0_0_get_fan_speed_rpm +ffffffff82303340 t smu_v13_0_0_get_thermal_temperature_range +ffffffff82303450 t smu_v13_0_0_dump_pptable +ffffffff82303480 t smu_v13_0_0_get_power_limit +ffffffff82303560 t smu_v13_0_0_set_df_cstate +ffffffff82303580 t smu_v13_0_0_i2c_control_init +ffffffff823036b0 t smu_v13_0_0_i2c_control_fini +ffffffff823036f0 t smu_v13_0_0_get_unique_id +ffffffff823037a0 t smu_v13_0_0_init_smc_tables +ffffffff82303990 t smu_v13_0_0_set_mp1_state +ffffffff823039d0 t smu_v13_0_0_setup_pptable +ffffffff82303b10 t smu_v13_0_0_system_features_control +ffffffff82303b20 t smu_v13_0_0_baco_enter +ffffffff82303b70 t smu_v13_0_0_baco_exit +ffffffff82303bd0 t smu_v13_0_0_is_mode1_reset_supported +ffffffff82303c30 t smu_v13_0_0_mode1_reset +ffffffff82303cc0 t smu_v13_0_0_get_dpm_ultimate_freq +ffffffff82303de0 t smu_v13_0_0_get_gpu_metrics +ffffffff82304210 t smu_v13_0_0_enable_mgpu_fan_boost +ffffffff82304260 t smu_v13_0_0_smu_send_bad_mem_page_num +ffffffff823042e0 t smu_v13_0_0_send_bad_mem_channel_flag +ffffffff82304360 t smu_v13_0_0_get_smu_metrics_data +ffffffff823046d0 t smu_v13_0_get_throttler_status +ffffffff82304890 t smu_v13_0_0_i2c_xfer +ffffffff82304b40 t smu_v13_0_0_i2c_func +ffffffff82305000 T smu_v13_0_4_set_ppt_funcs +ffffffff823050b0 t smu_v13_0_4_print_clk_levels +ffffffff82305170 t smu_v13_0_4_force_clk_levels +ffffffff82305410 t smu_v13_0_4_read_sensor +ffffffff823056c0 t smu_v13_0_4_is_dpm_running +ffffffff82305710 t smu_v13_0_4_set_watermarks_table +ffffffff823058a0 t smu_v13_0_4_set_performance_level +ffffffff82305de0 t smu_v13_0_4_init_smc_tables +ffffffff82305f50 t smu_v13_0_4_fini_smc_tables +ffffffff82306000 t smu_v13_0_4_system_features_control +ffffffff82306050 t smu_v13_0_4_mode2_reset +ffffffff82306070 t smu_v13_0_4_get_dpm_ultimate_freq +ffffffff82306490 t smu_v13_0_4_get_gpu_metrics +ffffffff82306660 t smu_v13_0_4_set_fine_grain_gfx_freq_parameters +ffffffff823066c0 t smu_v13_0_4_get_smu_metrics_data +ffffffff82307000 T smu_v13_0_5_set_ppt_funcs +ffffffff82307090 t smu_v13_0_5_set_default_dpm_tables +ffffffff823070c0 t smu_v13_0_5_print_clk_levels +ffffffff82307170 t smu_v13_0_5_force_clk_levels +ffffffff823072d0 t smu_v13_0_5_od_edit_dpm_table +ffffffff82307580 t smu_v13_0_5_dpm_set_vcn_enable +ffffffff823075a0 t smu_v13_0_5_dpm_set_jpeg_enable +ffffffff823075c0 t smu_v13_0_5_read_sensor +ffffffff823077e0 t smu_v13_0_5_is_dpm_running +ffffffff82307830 t smu_v13_0_5_set_watermarks_table +ffffffff823079c0 t smu_v13_0_5_set_performance_level +ffffffff82307ba0 t smu_v13_0_5_init_smc_tables +ffffffff82307d10 t smu_v13_0_5_fini_smc_tables +ffffffff82307dc0 t smu_v13_0_5_system_features_control +ffffffff82307e10 t smu_v13_0_5_mode2_reset +ffffffff82307e90 t smu_v13_0_5_get_dpm_ultimate_freq +ffffffff823082d0 t smu_v13_0_5_get_gpu_metrics +ffffffff82308410 t smu_v13_0_5_set_fine_grain_gfx_freq_parameters +ffffffff82308470 t smu_v13_0_5_get_smu_metrics_data +ffffffff82309000 T smu_v13_0_7_set_ppt_funcs +ffffffff82309050 t smu_v13_0_7_get_allowed_feature_mask +ffffffff823091c0 t smu_v13_0_7_set_default_dpm_table +ffffffff823095f0 t smu_v13_0_7_populate_umd_state_clk +ffffffff82309720 t smu_v13_0_7_print_clk_levels +ffffffff82309840 t smu_v13_0_7_force_clk_levels +ffffffff823099c0 t smu_v13_0_7_get_power_profile_mode +ffffffff82309ca0 t smu_v13_0_7_set_power_profile_mode +ffffffff82309ee0 t smu_v13_0_7_read_sensor +ffffffff8230a0f0 t smu_v13_0_7_is_dpm_running +ffffffff8230a140 t smu_v13_0_7_get_fan_speed_pwm +ffffffff8230a220 t smu_v13_0_7_get_fan_speed_rpm +ffffffff8230a290 t smu_v13_0_7_get_thermal_temperature_range +ffffffff8230a3a0 t smu_v13_0_7_dump_pptable +ffffffff8230a3d0 t smu_v13_0_7_get_power_limit +ffffffff8230a4b0 t smu_v13_0_7_set_df_cstate +ffffffff8230a4d0 t smu_v13_0_7_init_smc_tables +ffffffff8230a6c0 t smu_v13_0_7_check_fw_status +ffffffff8230a710 t smu_v13_0_7_set_mp1_state +ffffffff8230a750 t smu_v13_0_7_setup_pptable +ffffffff8230a8b0 t smu_v13_0_7_baco_enter +ffffffff8230a900 t smu_v13_0_7_baco_exit +ffffffff8230a960 t smu_v13_0_7_is_mode1_reset_supported +ffffffff8230a9a0 t smu_v13_0_7_get_dpm_ultimate_freq +ffffffff8230aac0 t smu_v13_0_7_get_gpu_metrics +ffffffff8230aed0 t smu_v13_0_7_enable_mgpu_fan_boost +ffffffff8230af20 t smu_v13_0_7_get_smu_metrics_data +ffffffff8230b270 t smu_v13_0_7_get_throttler_status +ffffffff8230c000 T yellow_carp_set_ppt_funcs +ffffffff8230c040 t yellow_carp_set_default_dpm_tables +ffffffff8230c070 t yellow_carp_print_clk_levels +ffffffff8230c130 t yellow_carp_force_clk_levels +ffffffff8230c3d0 t yellow_carp_od_edit_dpm_table +ffffffff8230c680 t yellow_carp_dpm_set_vcn_enable +ffffffff8230c6a0 t yellow_carp_dpm_set_jpeg_enable +ffffffff8230c6c0 t yellow_carp_read_sensor +ffffffff8230ca60 t yellow_carp_is_dpm_running +ffffffff8230cab0 t yellow_carp_set_watermarks_table +ffffffff8230cc40 t yellow_carp_set_performance_level +ffffffff8230d180 t yellow_carp_init_smc_tables +ffffffff8230d2f0 t yellow_carp_fini_smc_tables +ffffffff8230d3a0 t yellow_carp_system_features_control +ffffffff8230d3f0 t yellow_carp_get_gfxoff_status +ffffffff8230d480 t yellow_carp_mode2_reset +ffffffff8230d500 t yellow_carp_get_dpm_ultimate_freq +ffffffff8230d950 t yellow_carp_get_gpu_metrics +ffffffff8230db10 t yellow_carp_post_smu_init +ffffffff8230db90 t yellow_carp_set_fine_grain_gfx_freq_parameters +ffffffff8230dbf0 t yellow_carp_get_smu_metrics_data +ffffffff8230e000 T smu_cmn_send_msg_without_waiting +ffffffff8230e170 T smu_cmn_wait_for_response +ffffffff8230e2b0 T smu_cmn_send_smc_msg_with_param +ffffffff8230e5d0 T smu_cmn_to_asic_specific_index +ffffffff8230e6e0 t __smu_cmn_reg_print_error +ffffffff8230e920 T smu_cmn_send_smc_msg +ffffffff8230e940 T smu_cmn_send_debug_smc_msg +ffffffff8230e9c0 T smu_cmn_feature_is_supported +ffffffff8230ea70 T smu_cmn_feature_is_enabled +ffffffff8230eb60 T smu_cmn_clk_dpm_is_enabled +ffffffff8230ec60 T smu_cmn_get_enabled_mask +ffffffff8230ed50 T smu_cmn_get_indep_throttler_status +ffffffff8230ee00 T smu_cmn_feature_update_enable_state +ffffffff8230eea0 T smu_cmn_feature_set_enabled +ffffffff8230ef70 T smu_cmn_get_pp_feature_mask +ffffffff8230f120 T smu_cmn_set_pp_feature_mask +ffffffff8230f220 T smu_cmn_disable_all_features_with_exception +ffffffff8230f2d0 T smu_cmn_get_smc_version +ffffffff8230f3a0 T smu_cmn_update_table +ffffffff8230f500 T smu_cmn_write_watermarks_table +ffffffff8230f5d0 T smu_cmn_write_pptable +ffffffff8230f690 T smu_cmn_get_metrics_table +ffffffff8230f7f0 T smu_cmn_get_combo_pptable +ffffffff8230f8c0 T smu_cmn_init_soft_gpu_metrics +ffffffff8230f9a0 T smu_cmn_set_mp1_state +ffffffff8230fa40 T smu_cmn_is_audio_func_enabled +ffffffff82310000 T pci_mcfg_init +ffffffff82310050 T pci_lookup_segment +ffffffff823100b0 T pci_attach_hook +ffffffff823100e0 T pci_bus_maxdevs +ffffffff82310110 T pci_make_tag +ffffffff82310180 T pci_decompose_tag +ffffffff823101e0 T pci_conf_size +ffffffff82310240 T pci_mcfg_map_bus +ffffffff823102c0 T pci_conf_read +ffffffff82310410 T pci_conf_write +ffffffff82310550 T pci_msix_table_map +ffffffff82310670 T pci_msix_table_unmap +ffffffff82310710 T msi_hwmask +ffffffff82310740 T msi_hwunmask +ffffffff82310770 T msi_addroute +ffffffff82310870 T msi_delroute +ffffffff823108e0 T pci_intr_map_msi +ffffffff82310960 T msix_hwmask +ffffffff82310990 T msix_hwunmask +ffffffff823109c0 T msix_addroute +ffffffff82310bb0 T msix_delroute +ffffffff82310d10 T pci_intr_map_msix +ffffffff82310de0 T pci_intr_map +ffffffff82311000 T pci_intr_string +ffffffff823110e0 T pci_intr_establish +ffffffff82311130 T pci_intr_establish_cpu +ffffffff82311290 T pci_intr_disestablish +ffffffff823112b0 T pci_init_extents +ffffffff82311490 T pci_probe_device_hook +ffffffff823114d0 T pci_dev_postattach +ffffffff823114e0 T pci_min_powerstate +ffffffff823114f0 T pci_set_powerstate_md +ffffffff82312000 T pciide_machdep_compat_intr_establish +ffffffff82312060 T pciide_machdep_compat_intr_disestablish +ffffffff82313000 T vga_post_init +ffffffff82313310 t vm86_emu_inb +ffffffff82313360 t vm86_emu_inw +ffffffff823133a0 t vm86_emu_inl +ffffffff823133e0 t vm86_emu_outb +ffffffff82313430 t vm86_emu_outw +ffffffff82313470 t vm86_emu_outl +ffffffff823134b0 T vga_post_call +ffffffff82313520 T vga_post_free +ffffffff82313590 T ddb_vgapost +ffffffff82314000 T pchbmatch +ffffffff82314040 T pchbattach +ffffffff823144b0 T pchbactivate +ffffffff82314520 T pchb_amd64ht_attach +ffffffff82314670 T pchb_rnd +ffffffff823146f0 T pchb_print +ffffffff82315000 T amas_match +ffffffff82315050 T amas_attach +ffffffff823150b0 T amas_intl_nodes +ffffffff82315140 T amas_get_pagerange +ffffffff82316000 T agp_flush_cache +ffffffff82316030 T agp_flush_cache_range +ffffffff82316040 T agp_init_map +ffffffff82316110 T agp_destroy_map +ffffffff82316150 T agp_map_subregion +ffffffff82316180 T agp_unmap_subregion +ffffffff823161b0 T agp_map_atomic +ffffffff823161e0 T agp_unmap_atomic +ffffffff82317000 T cardslotmatch +ffffffff82317050 T cardslotattach +ffffffff823172a0 T cardslot_event +ffffffff82317300 T cardslot_cb_print +ffffffff82317350 T cardslot_16_print +ffffffff823173a0 T cardslot_16_submatch +ffffffff823173f0 T cardslot_event_throw +ffffffff82317490 T cardslot_process_event +ffffffff82318000 T cardbusmatch +ffffffff82318050 T cardbusattach +ffffffff82318130 T cardbus_read_tuples +ffffffff823184e0 T parse_tuple +ffffffff82318760 T cardbus_attach_card +ffffffff82318ee0 T enable_function +ffffffff82318f80 T decode_tuples +ffffffff82319050 T cardbusprint +ffffffff82319140 T cardbussubmatch +ffffffff823191a0 T disable_function +ffffffff82319200 T cardbus_detach_card +ffffffff823192e0 T cardbus_intr_establish +ffffffff82319310 T cardbus_intr_disestablish +ffffffff82319330 T cardbus_function_enable +ffffffff82319410 T cardbus_function_disable +ffffffff82319470 T cardbus_matchbyid +ffffffff823194e0 T decode_tuple +ffffffff8231a000 T cardbus_mapreg_map +ffffffff8231a1b0 T cardbus_mapreg_unmap +ffffffff8231b000 T cardbus_read_exrom +ffffffff8231c000 T rbus_space_alloc +ffffffff8231c060 T rbus_space_alloc_subregion +ffffffff8231c240 T rbus_space_free +ffffffff8231c2d0 T rbus_new_body +ffffffff8231c360 T rbus_new_root_delegate +ffffffff8231c430 T rbus_new_root_share +ffffffff8231d000 T com_cardbus_match +ffffffff8231d070 T com_cardbus_attach +ffffffff8231d220 T com_cardbus_detach +ffffffff8231d2c0 T com_cardbus_find_csdev +ffffffff8231d440 T com_cardbus_gofigure +ffffffff8231d900 T com_cardbus_enable +ffffffff8231d9d0 T com_cardbus_disable +ffffffff8231da20 T com_cardbus_setup +ffffffff8231e000 T xl_cardbus_match +ffffffff8231e090 T xl_cardbus_attach +ffffffff8231e420 T xl_cardbus_detach +ffffffff8231e4e0 T xl_cardbus_lookup +ffffffff8231e5a0 T xl_cardbus_intr_ack +ffffffff8231f000 T dc_cardbus_match +ffffffff8231f030 T dc_cardbus_attach +ffffffff8231f3c0 T dc_cardbus_detach +ffffffff8231f460 T dc_cardbus_setup +ffffffff82320000 T fxp_cardbus_match +ffffffff82320030 T fxp_cardbus_attach +ffffffff82320240 T fxp_cardbus_detach +ffffffff823202d0 T fxp_cardbus_setup +ffffffff82321000 t rl_cardbus_match +ffffffff82321030 t rl_cardbus_attach +ffffffff823211d0 t rl_cardbus_detach +ffffffff82321290 T rl_cardbus_setup +ffffffff82322000 T re_cardbus_probe +ffffffff82322030 T re_cardbus_attach +ffffffff82322230 T re_cardbus_detach +ffffffff82322310 T re_cardbus_setup +ffffffff82323000 T ath_cardbus_match +ffffffff82323050 T ath_cardbus_attach +ffffffff82323180 T ath_cardbus_detach +ffffffff82323250 T ath_cardbus_enable +ffffffff82323320 T ath_cardbus_disable +ffffffff82323370 T ath_cardbus_power +ffffffff823233b0 T ath_cardbus_setup +ffffffff82324000 T athn_cardbus_match +ffffffff82324030 T athn_cardbus_attach +ffffffff82324170 T athn_cardbus_detach +ffffffff82324210 T athn_cardbus_enable +ffffffff823242e0 T athn_cardbus_disable +ffffffff82324330 T athn_cardbus_power +ffffffff82324370 T athn_cardbus_read +ffffffff823243a0 T athn_cardbus_write +ffffffff823243d0 T athn_cardbus_write_barrier +ffffffff82324400 T athn_cardbus_setup +ffffffff82325000 T atw_cardbus_match +ffffffff82325030 T atw_cardbus_attach +ffffffff82325220 T atw_cardbus_detach +ffffffff823252e0 T atw_cardbus_enable +ffffffff823253b0 T atw_cardbus_disable +ffffffff82325400 T atw_cardbus_power +ffffffff82325440 T atw_cardbus_setup +ffffffff82326000 T rtw_cardbus_match +ffffffff82326030 T rtw_cardbus_attach +ffffffff82326280 T rtw_cardbus_detach +ffffffff823263a0 T rtw_cardbus_intr_ack +ffffffff823263c0 T rtw_cardbus_funcregen +ffffffff82326420 T rtw_cardbus_enable +ffffffff82326580 T rtw_cardbus_disable +ffffffff82326660 T rtw_cardbus_power +ffffffff823266a0 T rtw_cardbus_setup +ffffffff82327000 T ral_cardbus_match +ffffffff82327030 T ral_cardbus_attach +ffffffff82327230 T ral_cardbus_detach +ffffffff823272e0 T ral_cardbus_activate +ffffffff82327370 T ral_cardbus_enable +ffffffff823274d0 T ral_cardbus_disable +ffffffff82327520 T ral_cardbus_setup +ffffffff823275c0 T ral_cardbus_wakeup +ffffffff82328000 T acx_cardbus_match +ffffffff82328030 T acx_cardbus_attach +ffffffff82328260 T acx_cardbus_detach +ffffffff82328380 T acx_cardbus_enable +ffffffff82328450 T acx_cardbus_disable +ffffffff823284a0 T acx_cardbus_power +ffffffff823284e0 T acx_cardbus_setup +ffffffff82329000 T pgt_cardbus_match +ffffffff82329030 T pgt_cardbus_attach +ffffffff82329230 T pgt_cardbus_detach +ffffffff823292e0 T pgt_cardbus_enable +ffffffff82329440 T pgt_cardbus_disable +ffffffff82329490 T pgt_cardbus_power +ffffffff823294f0 T pgt_cardbus_setup +ffffffff8232a000 T ehci_cardbus_match +ffffffff8232a040 T ehci_cardbus_attach +ffffffff8232a2e0 T ehci_cardbus_detach +ffffffff8232b000 T ohci_cardbus_match +ffffffff8232b040 T ohci_cardbus_attach +ffffffff8232b2d0 T ohci_cardbus_detach +ffffffff8232c000 T uhci_cardbus_match +ffffffff8232c040 T uhci_cardbus_attach +ffffffff8232c350 T uhci_cardbus_detach +ffffffff8232d000 T malo_cardbus_match +ffffffff8232d030 T malo_cardbus_attach +ffffffff8232d270 T malo_cardbus_detach +ffffffff8232d340 T malo_cardbus_enable +ffffffff8232d4b0 T malo_cardbus_disable +ffffffff8232d500 T malo_cardbus_setup +ffffffff8232e000 T bwi_cardbus_match +ffffffff8232e030 T bwi_cardbus_attach +ffffffff8232e2a0 T bwi_cardbus_detach +ffffffff8232e350 T bwi_cardbus_enable +ffffffff8232e4b0 T bwi_cardbus_disable +ffffffff8232e500 T bwi_cardbus_setup +ffffffff8232e5a0 T bwi_cardbus_conf_read +ffffffff8232e5d0 T bwi_cardbus_conf_write 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pcmcia_parse_cis_tuple +ffffffff82334e60 T pcmcia_print_cis +ffffffff82336000 T pcmcia_check_cis_quirks +ffffffff82337000 T ep_pcmcia_match +ffffffff82337110 T ep_pcmcia_attach +ffffffff82337560 T ep_pcmcia_detach +ffffffff82337600 T ep_pcmcia_activate +ffffffff823376e0 T ep_pcmcia_lookup +ffffffff823377f0 T ep_pcmcia_enable1 +ffffffff823378a0 T ep_pcmcia_get_enaddr +ffffffff82338000 T ne_pcmcia_match +ffffffff82338140 T ne_pcmcia_attach +ffffffff82338760 T ne_pcmcia_detach +ffffffff82338820 T ne_pcmcia_activate +ffffffff82338910 T ne_pcmcia_get_enaddr +ffffffff82338af0 T ne_pcmcia_dl10019_get_enaddr +ffffffff82338d40 T ne_pcmcia_ax88190_set_iobase +ffffffff82339000 T aic_pcmcia_match +ffffffff823390b0 T aic_pcmcia_attach +ffffffff823392b0 T aic_pcmcia_detach +ffffffff8233a000 T com_pcmcia_match +ffffffff8233a220 T com_pcmcia_attach +ffffffff8233a500 T com_pcmcia_detach +ffffffff8233a5a0 T com_pcmcia_activate +ffffffff8233a660 T com_pcmcia_enable1 +ffffffff8233a710 T com_pcmcia_enable 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T xe_ioctl +ffffffff8233df70 T xe_start +ffffffff8233e210 T xe_watchdog +ffffffff8233e250 T xe_intr +ffffffff8233e620 T xe_full_reset +ffffffff8233ebf0 T xe_mdi_read +ffffffff8233f580 T xe_mdi_write +ffffffff8233fe90 T xe_statchg +ffffffff8233fec0 T xe_mediachange +ffffffff8233ff50 T xe_mediastatus +ffffffff8233ffb0 T xe_init +ffffffff82340010 T xe_stop +ffffffff82340140 T xe_reset +ffffffff823402b0 T xe_pcmcia_lan_nid_ciscallback +ffffffff82340400 T xe_pcmcia_manfid_ciscallback +ffffffff82340520 T xe_get +ffffffff823407f0 T xe_set_address +ffffffff82340ab0 T xe_cycle_power +ffffffff82341000 T wi_pcmcia_match +ffffffff82341130 T wi_pcmcia_attach +ffffffff823413e0 T wi_pcmcia_detach +ffffffff823414a0 T wi_pcmcia_activate +ffffffff82341590 T wi_pcmcia_wakeup +ffffffff82342000 T malo_pcmcia_match +ffffffff82342050 T malo_pcmcia_attach +ffffffff82342220 T malo_pcmcia_detach +ffffffff823422a0 T malo_pcmcia_activate +ffffffff82342500 T cmalo_intr +ffffffff82342760 T cmalo_attach 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cmalo_select_network +ffffffff823453a0 T cmalo_cmd_set_auth +ffffffff82345460 T cmalo_cmd_set_assoc +ffffffff823457c0 T cmalo_reflect_network +ffffffff823458b0 T cmalo_tx_done +ffffffff82345970 T cmalo_rx +ffffffff82345b70 T cmalo_cmd_response +ffffffff82345d90 T cmalo_event +ffffffff82345e00 T cmalo_tx +ffffffff82345ff0 T cmalo_cmd_set_wep +ffffffff82346240 T cmalo_rate2bitmap +ffffffff82346280 T cmalo_hexdump +ffffffff823462b0 T cmalo_cmd_request +ffffffff82346410 T cmalo_cmd_rsp_hwspec +ffffffff82346480 T cmalo_cmd_rsp_scan +ffffffff82346690 T cmalo_parse_elements +ffffffff82346790 T cmalo_cmd_rsp_assoc +ffffffff823467d0 T cmalo_cmd_set_80211d +ffffffff823468d0 T cmalo_cmd_set_bgscan_config +ffffffff82346a30 T cmalo_cmd_set_bgscan_query +ffffffff82347000 T an_pcmcia_match +ffffffff82347060 T an_pcmcia_attach +ffffffff82347250 T an_pcmcia_detach +ffffffff823472e0 T an_pcmcia_activate +ffffffff82348000 T pcibmatch +ffffffff823480d0 T pcibattach +ffffffff82348110 T pcib_callback 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isa_dmamem_unmap +ffffffff82352000 T isa_dmamem_mmap +ffffffff823520a0 T isa_drq_isfree +ffffffff82352110 T isa_malloc +ffffffff823522c0 T isa_free +ffffffff823523f0 T isa_mappage +ffffffff82353000 T fdcprobe +ffffffff82353280 T fdcattach +ffffffff823533c0 T out_fdc +ffffffff82353490 T fdcintr +ffffffff823534a0 T fdc_create_kthread +ffffffff82353510 T fdcattach_deferred +ffffffff823535d0 T fdcpseudointr +ffffffff82353610 T fddprint +ffffffff82353660 T fdcresult +ffffffff82353740 T fdcstart +ffffffff82353770 T fdcstatus +ffffffff82354000 T fdprobe +ffffffff82354190 T fdattach +ffffffff823542d0 T fdactivate +ffffffff82354370 T fdgetdisklabel +ffffffff82354490 T fdstrategy +ffffffff823546c0 T fd_motor_on +ffffffff82354720 T fd_motor_off +ffffffff82354800 T fdtimeout +ffffffff82354880 T fd_nvtotype +ffffffff823548f0 T fdstart +ffffffff823549a0 T fdfinish +ffffffff82354af0 T fdread +ffffffff82354b20 T fdwrite +ffffffff82354b50 T fd_set_motor +ffffffff82354c10 T fdintr +ffffffff82355980 T fdopen +ffffffff82355bd0 T fdclose +ffffffff82355c60 T fdsize +ffffffff82355c90 T fddump +ffffffff82355cc0 T fdretry +ffffffff82355e60 T fdioctl +ffffffff82356310 T fdformat +ffffffff82357000 T com_isa_probe +ffffffff823570d0 T com_isa_attach +ffffffff82358000 T pckbc_isa_match +ffffffff823581e0 T pckbc_isa_attach +ffffffff82358390 T pckbc_isa_activate +ffffffff82359000 T vga_isa_match +ffffffff823590f0 T vga_isa_attach +ffffffff82359130 T vga_isa_cnattach +ffffffff8235a000 T wdc_isa_probe +ffffffff8235a130 T wdc_isa_attach +ffffffff8235a350 t wdc_isa_dma_init +ffffffff8235a3c0 t wdc_isa_dma_start +ffffffff8235a3f0 t wdc_isa_dma_finish +ffffffff8235b000 T mpu_open +ffffffff8235b180 T mpu_close +ffffffff8235b2b0 T mpu_output +ffffffff8235b3c0 T mpu_getinfo +ffffffff8235b400 T mpu_find +ffffffff8235b560 T mpu_reset +ffffffff8235b680 T mpu_readinput +ffffffff8235b710 T mpu_intr +ffffffff8235c000 T mpu_isa_match +ffffffff8235c060 T mpu_isa_attach +ffffffff8235c0f0 T mpu_test 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button_event +ffffffff8236df20 T ctrl_event +ffffffff8236e130 T mouse_moverel +ffffffff8236e260 T mouse_zaxis +ffffffff8236e2f0 T mouse_copy_end +ffffffff8236e360 T mouse_copy_selection +ffffffff8236e4b0 T mouse_copy_start +ffffffff8236e620 T mouse_copy_word +ffffffff8236e950 T mouse_copy_line +ffffffff8236eab0 T mouse_paste +ffffffff8236eb50 T mouse_copy_extend_after +ffffffff8236ec50 T mouse_copy_extend +ffffffff8236ece0 T inverse_char +ffffffff8236ede0 T inverse_region +ffffffff8236ee50 T skip_spc_right +ffffffff8236ef40 T skip_spc_left +ffffffff8236f010 T skip_char_right +ffffffff8236f110 T skip_char_left +ffffffff8236f210 T class_cmp +ffffffff8236f2e0 T remove_selection +ffffffff8236f380 T mouse_copy_extend_char +ffffffff8236f6e0 T mouse_copy_extend_word +ffffffff8236fc90 T mouse_copy_extend_line +ffffffff8236ff40 T mouse_hide +ffffffff82370000 T usl_sync_init +ffffffff82370150 T usl_attachtimeout +ffffffff823701c0 T usl_detachtimeout +ffffffff82370230 T usl_sync_done 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wsemul_vt100_init +ffffffff82386b20 T wsemul_vt100_reset +ffffffff82386c40 T wsemul_vt100_nextline +ffffffff82386cd0 T wsemul_vt100_output_normal +ffffffff82386f10 T wsemul_vt100_output_c0c1 +ffffffff82387190 T wsemul_vt100_jump_scroll +ffffffff82388000 T wsemul_vt100_scrollup +ffffffff82388150 T wsemul_vt100_scrolldown +ffffffff823882a0 T wsemul_vt100_ed +ffffffff82388510 T wsemul_vt100_el +ffffffff82388600 T wsemul_vt100_handle_csi +ffffffff82389590 T vt100_ansimode +ffffffff82389600 T vt100_decmode +ffffffff82389730 T vt100_selectattribute +ffffffff82389870 T wsemul_vt100_handle_dcs +ffffffff8238a000 T vt100_initchartables +ffffffff8238a200 T vt100_setnrc +ffffffff8238b000 T wsemul_vt100_translate +ffffffff8238c000 T pckbdprobe +ffffffff8238c140 T pckbdattach +ffffffff8238c320 T pckbdactivate +ffffffff8238c3b0 T pckbd_enable +ffffffff8238c500 T pckbd_set_leds +ffffffff8238c590 T pckbd_ioctl +ffffffff8238c6e0 T pckbd_cngetc +ffffffff8238c8d0 T pckbd_cnpollc +ffffffff8238c970 T pckbd_cnbell +ffffffff8238c9c0 T pckbd_set_xtscancode +ffffffff8238cb40 T pckbd_init +ffffffff8238cba0 T pckbd_input +ffffffff8238ce20 T pckbd_scancode_translate +ffffffff8238cf00 T pckbd_bell +ffffffff8238cf50 T pckbd_hookup_bell +ffffffff8238cf90 T pckbd_cnattach +ffffffff8238e000 T pmsprobe +ffffffff8238e0a0 T pmsattach +ffffffff8238e280 T pmsactivate +ffffffff8238e2e0 T pms_enable +ffffffff8238e350 T pms_ioctl +ffffffff8238e3a0 T pms_disable +ffffffff8238e3e0 T pms_sec_enable +ffffffff8238e450 T pms_sec_ioctl +ffffffff8238e4a0 T pms_sec_disable +ffffffff8238e4e0 T pms_ioctl_mouse +ffffffff8238e600 T pms_sync_mouse +ffffffff8238e660 T pms_proc_mouse +ffffffff8238e700 T pms_enable_synaptics +ffffffff8238eb30 T pms_ioctl_synaptics +ffffffff8238ec00 T pms_sync_synaptics +ffffffff8238ec60 T pms_proc_synaptics +ffffffff8238efb0 T pms_disable_synaptics +ffffffff8238f090 T pms_enable_alps +ffffffff8238fb10 T pms_ioctl_alps +ffffffff8238fbc0 T pms_sync_alps +ffffffff8238fc60 T pms_proc_alps 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hidms_wacom_setup +ffffffff8239e6c0 T hidms_setup +ffffffff8239ec90 T hidms_attach +ffffffff8239ede0 T hidms_detach +ffffffff8239ee20 T hidms_input +ffffffff8239f0d0 T hidms_enable +ffffffff8239f120 T hidms_ioctl +ffffffff8239f2f0 T hidms_disable +ffffffff823a0000 T hidmt_get_resolution +ffffffff823a0110 T hidmt_setup +ffffffff823a0740 T hidmt_set_input_mode +ffffffff823a07d0 T hidmt_configure +ffffffff823a0870 T hidmt_attach +ffffffff823a0980 T hidmt_detach +ffffffff823a09c0 T hidmt_input +ffffffff823a0eb0 T hidmt_enable +ffffffff823a0ef0 T hidmt_ioctl +ffffffff823a0fc0 T hidmt_disable +ffffffff823a1000 T hidcc_match +ffffffff823a10e0 T hidcc_attach +ffffffff823a1290 T hidcc_parse +ffffffff823a1630 T hidcc_attach_wskbd +ffffffff823a16e0 T hidcc_detach +ffffffff823a1790 T hidcc_intr +ffffffff823a1b60 T hidcc_intr_slice +ffffffff823a1c50 T hidcc_setbits +ffffffff823a1e90 T hidcc_rawinput +ffffffff823a1f30 T hidcc_input +ffffffff823a1f90 T hidcc_bits_to_int +ffffffff823a20c0 T hidcc_usage_to_sym +ffffffff823a22d0 T hidcc_bit_to_sym +ffffffff823a2320 T hidcc_enable +ffffffff823a2340 T hidcc_set_leds +ffffffff823a2370 T hidcc_ioctl +ffffffff823a23e0 T hidcc_is_array +ffffffff823a2430 T hidcc_parse_array +ffffffff823a2540 T hidcc_add_key_volume +ffffffff823a2660 T hidcc_add_key +ffffffff823a2730 T hidcc_bits_to_volume +ffffffff823a3000 T usb_match +ffffffff823a3030 T usb_attach +ffffffff823a3330 T usb_detach +ffffffff823a33e0 T usb_activate +ffffffff823a3500 T usb_create_task_threads +ffffffff823a35a0 T usb_explore +ffffffff823a3740 T usb_attach_roothub +ffffffff823a37e0 T usb_needs_explore +ffffffff823a3830 T usb_detach_roothub +ffffffff823a3920 T usb_wait_task +ffffffff823a39c0 T usb_abort_task_thread +ffffffff823a3ab0 T usb_task_thread +ffffffff823a3bd0 T usb_add_task +ffffffff823a3cf0 T usb_rem_task +ffffffff823a3db0 T usb_rem_wait_task +ffffffff823a3ec0 T usbctlprint +ffffffff823a3f10 T usbopen +ffffffff823a3f80 T usbclose +ffffffff823a3fb0 T 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usbd_get_string_desc +ffffffff823a9130 T usbd_get_string +ffffffff823a9320 T usbd_cache_devinfo +ffffffff823a9680 T usbd_printBCD +ffffffff823a9710 T usbd_devinfo +ffffffff823a98b0 T usb_delay_ms +ffffffff823a9910 T usbd_delay_ms +ffffffff823a99d0 T usbd_port_disown_to_1_1 +ffffffff823a9af0 T usbd_reset_port +ffffffff823a9cb0 T usbd_find_idesc +ffffffff823a9d60 T usbd_find_edesc +ffffffff823a9e70 T usbd_fill_iface_data +ffffffff823aa0e0 T usbd_parse_idesc +ffffffff823aa200 T usbd_free_iface_data +ffffffff823aa270 T usbd_set_config +ffffffff823aa2c0 T usbd_set_config_no +ffffffff823aa390 T usbd_set_config_index +ffffffff823aa850 T usbd_setup_pipe +ffffffff823aa940 T usbd_set_address +ffffffff823aaa00 T usbd_getnewaddr +ffffffff823aaa90 T usbd_probe_and_attach +ffffffff823ab010 T usbd_print +ffffffff823ab120 T usbd_new_device +ffffffff823ab9a0 T usbd_reload_device_desc +ffffffff823aba10 T usb_free_device +ffffffff823abb80 T usbd_fill_deviceinfo +ffffffff823abee0 T usbd_get_cdesc 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umb_kstat_attach +ffffffff8248ad10 T umb_open +ffffffff8248ad70 T umb_down +ffffffff8248b000 T umb_close +ffffffff8248b060 T umb_kstat_detach +ffffffff8248b0f0 T umb_alloc_xfers +ffffffff8248b1b0 T umb_free_xfers +ffffffff8248b230 T umb_alloc_bulkpipes +ffffffff8248b330 T umb_rx +ffffffff8248b390 T umb_close_bulkpipes +ffffffff8248b420 T umb_setpin +ffffffff8248b720 T umb_setdataclass +ffffffff8248b7f0 T umb_encap +ffffffff8248bd60 T umb_send_inet_proposal +ffffffff8248bf80 T umb_newstate +ffffffff8248c0f0 T umb_cmd +ffffffff8248c1e0 T umb_up +ffffffff8248c7a0 T umb_allocate_cid +ffffffff8248c850 T umb_radio +ffffffff8248c8f0 T umb_send_fcc_auth +ffffffff8248ca60 T umb_packet_service +ffffffff8248cb00 T umb_connect +ffffffff8248cb80 T umb_qry_ipconfig +ffffffff8248cc90 T umb_clear_addr +ffffffff8248cf80 T umb_disconnect +ffffffff8248cfd0 T umb_get_encap_response +ffffffff8248d070 T umb_decode_response +ffffffff8248d1d0 T umb_handle_indicate_status_msg +ffffffff8248d270 T umb_handle_opendone_msg +ffffffff8248d4c0 T umb_handle_closedone_msg +ffffffff8248d500 T umb_command_done +ffffffff8248d810 T umb_decode_cid +ffffffff8248dad0 T umb_decode_register_state +ffffffff8248dd10 T umb_decode_devices_caps +ffffffff8248deb0 T umb_decode_subscriber_status +ffffffff8248e120 T umb_decode_radio_state +ffffffff8248e200 T umb_decode_pin +ffffffff8248e340 T umb_decode_packet_service +ffffffff8248e730 T umb_decode_signal_state +ffffffff8248e8b0 T umb_decode_connect_info +ffffffff8248ea10 T umb_add_inet_config +ffffffff8248ece0 T umb_add_inet6_config +ffffffff8248f050 T umb_decode_ip_configuration +ffffffff8248f890 T umb_rxeof +ffffffff8248f9c0 T umb_decap +ffffffff8248fc10 T umb_txeof +ffffffff8248fcb0 T umb_send_encap_command +ffffffff8248fda0 T umb_ctrl_msg +ffffffff82490070 T umb_cmd1 +ffffffff82490170 T umb_send_connect +ffffffff82490350 T umb_decode_qmi +ffffffff82491000 T uath_match +ffffffff82491070 T uath_attach +ffffffff82491810 T uath_detach +ffffffff82491a20 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athn_usb_wait_async +ffffffff824968f0 T athn_usb_close_pipes +ffffffff824969c0 T athn_usb_free_tx_cmd +ffffffff82496a10 T athn_usb_free_tx_list +ffffffff82496b40 T athn_usb_free_rx_list +ffffffff82496b90 T athn_usb_load_firmware +ffffffff82496d80 T athn_usb_htc_setup +ffffffff824970c0 T athn_usb_ioctl +ffffffff82497270 T athn_usb_start +ffffffff82497400 T athn_usb_watchdog +ffffffff82497490 T athn_usb_node_alloc +ffffffff824974b0 T athn_usb_newauth +ffffffff82497680 T athn_usb_newassoc +ffffffff824977b0 T athn_usb_node_free +ffffffff824978b0 T athn_usb_updateslot +ffffffff824978e0 T athn_usb_updateedca +ffffffff824979a0 T athn_usb_set_key +ffffffff82497ae0 T athn_usb_delete_key +ffffffff82497c30 T athn_usb_newstate +ffffffff82497d40 T athn_usb_media_change +ffffffff82497dd0 T athn_usb_next_scan +ffffffff82497e70 T athn_usb_rx_enable +ffffffff82497ee0 T athn_usb_intr +ffffffff82498070 T athn_usb_alloc_rx_list +ffffffff82498120 T athn_usb_alloc_tx_list +ffffffff82498210 T athn_usb_do_async +ffffffff82498330 T athn_usb_htc_msg +ffffffff824983c0 T athn_usb_htc_connect_svc +ffffffff82498590 T athn_usb_wmi_xcmd +ffffffff824987c0 T athn_usb_read_rom +ffffffff82498920 T athn_usb_stop +ffffffff82498c30 T athn_usb_init +ffffffff82499080 T athn_usb_newstate_cb +ffffffff82499380 T athn_usb_remove_node +ffffffff82499480 T athn_usb_switch_chan +ffffffff82499660 T athn_usb_create_node +ffffffff824998d0 T athn_usb_newassoc_cb +ffffffff82499a60 T athn_usb_node_set_rates +ffffffff82499b90 T athn_usb_count_active_sta +ffffffff82499be0 T athn_usb_newauth_cb +ffffffff82499cc0 T athn_usb_node_free_cb +ffffffff82499d80 T athn_usb_ampdu_tx_start +ffffffff82499e90 T athn_usb_ampdu_tx_start_cb +ffffffff82499ef0 T athn_usb_ampdu_tx_stop +ffffffff82499fd0 T athn_usb_ampdu_tx_stop_cb +ffffffff8249a030 T athn_usb_clean_nodes +ffffffff8249a0f0 T athn_usb_updateedca_cb +ffffffff8249a130 T athn_usb_updateslot_cb +ffffffff8249a170 T athn_usb_set_key_cb +ffffffff8249a230 T athn_usb_delete_key_cb +ffffffff8249a290 T athn_usb_bcneof +ffffffff8249a2f0 T athn_usb_swba +ffffffff8249a450 T athn_usb_tx_status +ffffffff8249a4c0 T athn_usb_rx_wmi_ctrl +ffffffff8249a6e0 T athn_usb_rx_radiotap +ffffffff8249a8b0 T athn_usb_rx_frame +ffffffff8249ab20 T athn_usb_rxeof +ffffffff8249ae40 T athn_usb_txeof +ffffffff8249af00 T athn_usb_tx +ffffffff8249c000 T uow_match +ffffffff8249c070 T uow_attach +ffffffff8249c520 T uow_detach +ffffffff8249c5f0 T uow_activate +ffffffff8249c660 T uow_intr +ffffffff8249c6b0 T uow_reset +ffffffff8249c6d0 T uow_ow_reset +ffffffff8249c720 T uow_ow_bit +ffffffff8249c7b0 T uow_ow_read_byte +ffffffff8249c830 T uow_ow_write_byte +ffffffff8249c890 T uow_ow_read_block +ffffffff8249c920 T uow_ow_write_block +ffffffff8249c990 T uow_ow_matchrom +ffffffff8249ca60 T uow_cmd +ffffffff8249cba0 T uow_read +ffffffff8249ccb0 T uow_write +ffffffff8249cd90 T uow_ow_search +ffffffff8249d000 T uberry_match +ffffffff8249d070 T uberry_attach +ffffffff8249d1f0 T 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bwfm_usb_attach +ffffffff824a0a40 T bwfm_usb_detach +ffffffff824a0b20 T bwfm_usb_dl_cmd +ffffffff824a0bc0 T bwfm_usb_load_microcode +ffffffff824a0f30 T bwfm_usb_alloc_rx_list +ffffffff824a1020 T bwfm_usb_alloc_tx_list +ffffffff824a1140 T bwfm_usb_rxeof +ffffffff824a12f0 T bwfm_usb_free_rx_list +ffffffff824a1370 T bwfm_usb_free_tx_list +ffffffff824a13f0 T bwfm_usb_newbuf +ffffffff824a1470 T bwfm_usb_txeof +ffffffff824a1580 T bwfm_usb_txctl_cb +ffffffff824a2000 T umstc_match +ffffffff824a20b0 T umstc_attach +ffffffff824a21b0 T umstc_detach +ffffffff824a2200 T umstc_intr +ffffffff824a2340 T umstc_brightness_task +ffffffff824a3000 T uhidpp_match +ffffffff824a30e0 T uhidpp_attach +ffffffff824a3450 T uhidpp_detach +ffffffff824a3690 T uhidpp_intr +ffffffff824a37d0 T uhidpp_task +ffffffff824a3870 T hidpp10_get_type +ffffffff824a3970 T hidpp10_get_name +ffffffff824a3a70 T hidpp10_enable_notifications +ffffffff824a3ae0 T uhidpp_is_notification +ffffffff824a3b60 T uhidpp_claim_notification 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acpivout_find_brightness +ffffffff825137b0 T acpivout_set_brightness +ffffffff82514000 T acpipwrres_match +ffffffff82514070 T acpipwrres_attach +ffffffff825142b0 T acpipwrres_foundcons +ffffffff82514440 T acpipwrres_ref_incr +ffffffff825144d0 T acpipwrres_hascons +ffffffff82514520 T acpipwrres_ref_decr +ffffffff825145b0 T acpipwrres_addcons +ffffffff82515000 T aibs_match +ffffffff82515030 T aibs_attach +ffffffff82515140 T aibs_probe +ffffffff825152a0 T aibs_attach_new +ffffffff825153c0 T aibs_attach_sif +ffffffff82515590 T aibs_notify +ffffffff82515600 T aibs_add_sensor +ffffffff82515850 T aibs_getpack +ffffffff825158d0 T aibs_refresh +ffffffff82515930 T aibs_refresh_r +ffffffff82515a70 T aibs_getvalue +ffffffff82515bc0 T aibs_find_cb +ffffffff82516000 T aplgpio_match +ffffffff82516060 T aplgpio_attach +ffffffff82516300 T aplgpio_intr +ffffffff82516440 T aplgpio_read_pin +ffffffff82516490 T aplgpio_write_pin +ffffffff82516500 T aplgpio_intr_establish +ffffffff82516620 T aplgpio_intr_enable +ffffffff825166b0 T aplgpio_intr_disable +ffffffff82517000 T bytgpio_match +ffffffff82517060 T bytgpio_attach +ffffffff82517320 T bytgpio_intr +ffffffff82517450 T bytgpio_read_pin +ffffffff825174b0 T bytgpio_write_pin +ffffffff82517530 T bytgpio_intr_establish +ffffffff825175a0 T bytgpio_intr_enable +ffffffff82517690 T bytgpio_intr_disable +ffffffff82518000 T chvgpio_match +ffffffff82518060 T chvgpio_attach +ffffffff82518300 T chvgpio_intr +ffffffff825183d0 T chvgpio_read_pin +ffffffff82518480 T chvgpio_write_pin +ffffffff82518540 T chvgpio_intr_establish +ffffffff82518710 T chvgpio_intr_enable +ffffffff825187e0 T chvgpio_intr_disable +ffffffff825188b0 T chvgpio_opreg_handler +ffffffff82518940 T chvgpio_check_pin +ffffffff82519000 T glkgpio_match +ffffffff82519060 T glkgpio_attach +ffffffff82519300 T glkgpio_intr +ffffffff82519440 T glkgpio_read_pin +ffffffff825194a0 T glkgpio_write_pin +ffffffff82519510 T glkgpio_intr_establish +ffffffff82519630 T glkgpio_intr_enable +ffffffff825196c0 T glkgpio_intr_disable +ffffffff8251a000 T pchgpio_match +ffffffff8251a060 T pchgpio_attach +ffffffff8251a4b0 T pchgpio_activate +ffffffff8251a560 T pchgpio_intr +ffffffff8251a780 T pchgpio_read_pin +ffffffff8251a870 T pchgpio_write_pin +ffffffff8251a980 T pchgpio_intr_establish +ffffffff8251abb0 T pchgpio_intr_enable +ffffffff8251acf0 T pchgpio_intr_disable +ffffffff8251ae30 T pchgpio_save +ffffffff8251aea0 T pchgpio_restore +ffffffff8251af10 T pchgpio_find_group +ffffffff8251af90 T pchgpio_intr_handle +ffffffff8251b070 T pchgpio_save_pin +ffffffff8251b240 T pchgpio_restore_pin +ffffffff8251c000 T tipmic_match +ffffffff8251c050 T tipmic_attach +ffffffff8251c250 T tipmic_write_1 +ffffffff8251c310 T tipmic_intr +ffffffff8251c470 T tipmic_get_lpat +ffffffff8251c5a0 T tipmic_read_pin +ffffffff8251c5d0 T tipmic_write_pin +ffffffff8251c600 T tipmic_thermal_opreg_handler +ffffffff8251ce70 T tipmic_power_opreg_handler +ffffffff8251d110 T tipmic_read_1 +ffffffff8251d1d0 T tipmic_raw_to_temp +ffffffff8251e000 T ccpmic_match +ffffffff8251e050 T ccpmic_attach +ffffffff8251e130 T ccpmic_get_lpat +ffffffff8251e250 T ccpmic_read_pin +ffffffff8251e3d0 T ccpmic_write_pin +ffffffff8251e530 T ccpmic_thermal_opreg_handler +ffffffff8251e770 T ccpmic_power_opreg_handler +ffffffff8251e960 T ccpmic_read_1 +ffffffff8251ea20 T ccpmic_write_1 +ffffffff8251eae0 T ccpmic_raw_to_temp +ffffffff8251f000 T com_acpi_match +ffffffff8251f120 T com_acpi_attach +ffffffff8251f3a0 T com_acpi_is_designware +ffffffff8251f400 T com_acpi_intr_designware +ffffffff8251f430 T com_acpi_is_console +ffffffff82520000 T sdhc_acpi_match +ffffffff82520060 T sdhc_acpi_attach +ffffffff82520360 T sdhc_acpi_parse_resources +ffffffff82520420 T sdhc_acpi_card_detect_gpio +ffffffff82520480 T sdhc_acpi_card_detect_intr +ffffffff825204c0 T sdhc_acpi_power_on +ffffffff82520540 T sdhc_acpi_explore +ffffffff82520570 T sdhc_acpi_card_detect_nonremovable +ffffffff825205a0 T sdhc_acpi_do_explore +ffffffff82521000 T dwiic_acpi_match +ffffffff82521050 T dwiic_acpi_attach +ffffffff82521410 T dwiic_acpi_parse_crs +ffffffff82521540 T dwiic_acpi_power +ffffffff82521650 T dwiic_acpi_get_params +ffffffff82521790 T dwiic_i2c_intr_establish +ffffffff82521810 T dwiic_i2c_intr_disestablish +ffffffff82521830 T dwiic_i2c_intr_string +ffffffff825218c0 T dwiic_acpi_acquire_bus +ffffffff82521910 T dwiic_acpi_release_bus +ffffffff82521940 T dwiic_acpi_bus_scan +ffffffff82521980 T dwiic_acpi_found_hid +ffffffff82521e40 T dwiic_matchhids +ffffffff82521ed0 T dwiic_acpi_found_ihidev +ffffffff82522150 T dwiic_acpi_found_iatp +ffffffff825222b0 T dwiic_acpi_found_ietp +ffffffff82523000 T acpicbkbd_match +ffffffff82523030 T acpicbkbd_attach +ffffffff825230d0 T acpicbkbd_activate +ffffffff82523120 T acpicbkbd_get_backlight +ffffffff825231a0 T acpicbkbd_set_backlight +ffffffff82523240 T acpicbkbd_write_backlight +ffffffff82524000 T acpials_match +ffffffff82524090 T acpials_attach +ffffffff82524230 T acpials_read +ffffffff825242b0 T acpials_addtask +ffffffff825242f0 T acpials_notify +ffffffff82524380 T acpials_update +ffffffff82525000 T tpm_match +ffffffff82525050 T tpm_attach +ffffffff82525320 T tpm_activate +ffffffff82525430 T tpm2_start_method +ffffffff825254b0 T tpm_probe +ffffffff82525560 T tpm_init_tis +ffffffff825257d0 T tpm_init_crb +ffffffff82525b10 T tpm_suspend +ffffffff82525c00 T tpm_resume +ffffffff82525c30 T tpm_write_tis +ffffffff82525fb0 T tpm_read_tis +ffffffff82526190 T tpm_write_crb +ffffffff825265a0 T tpm_read_crb +ffffffff825268a0 T tpm_request_locality_tis +ffffffff82526990 T tpm_request_locality_crb +ffffffff82526a90 T tpm_release_locality_crb +ffffffff82526ae0 T tpm_release_locality_tis +ffffffff82526b50 T tpm_getburst +ffffffff82526c00 T tpm_status +ffffffff82526c20 T tpm_waitfor +ffffffff82526d00 T tpm_waitfor_status +ffffffff82527000 T acpihve_match +ffffffff825270b0 T acpihve_attach +ffffffff82528000 T acpisbs_match +ffffffff82528030 T acpisbs_attach +ffffffff825282a0 T acpisbs_activate +ffffffff82528380 T acpisbs_read +ffffffff82528440 T acpisbs_setup_sensors +ffffffff82528560 T acpisbs_refresh_sensors +ffffffff825286d0 T acpisbs_notify +ffffffff82528810 T acpi_smbus_read +ffffffff82529000 T surface_match +ffffffff82529060 T surface_attach +ffffffff825290c0 T surface_hotkey +ffffffff8252a000 T ipmi_acpi_match +ffffffff8252a030 T ipmi_acpi_attach +ffffffff8252a260 T ipmi_acpi_parse_crs +ffffffff8252b000 T amdgpio_match +ffffffff8252b060 T amdgpio_attach +ffffffff8252b2a0 T amdgpio_activate +ffffffff8252b390 T amdgpio_intr +ffffffff8252b530 T amdgpio_read_pin +ffffffff8252b580 T amdgpio_write_pin +ffffffff8252b5f0 T amdgpio_intr_establish +ffffffff8252b6e0 T amdgpio_intr_enable +ffffffff8252b760 T amdgpio_intr_disable +ffffffff8252b7e0 T amdgpio_save +ffffffff8252b860 T amdgpio_restore +ffffffff8252b8f0 T amdgpio_save_pin +ffffffff8252b960 T amdgpio_restore_pin +ffffffff8252b9d0 T amdgpio_pin_intr +ffffffff8252c000 T acpihid_match +ffffffff8252c030 T acpihid_attach +ffffffff8252c210 T acpihid_init_dsm +ffffffff8252c370 T acpihid_eval +ffffffff8252c590 T acpihid_notify +ffffffff8252c5f0 T acpihid_button_array_enable +ffffffff8252d000 t iosf_acpi_match +ffffffff8252d050 t iosf_acpi_attach +ffffffff8252d140 t iosf_acpi_mbi_mdr_rd +ffffffff8252d1b0 t iosf_acpi_mbi_mdr_wr +ffffffff8252e000 T acpi_match +ffffffff8252e060 T acpi_attach +ffffffff8252e0a0 T acpi_probe +ffffffff8252e240 T acpi_map +ffffffff8252e330 T acpi_unmap +ffffffff8252e380 T acpi_bus_space_map +ffffffff8252e3a0 T acpi_bus_space_unmap +ffffffff8252e3c0 T acpi_intr_establish +ffffffff8252e510 T acpi_intr_disestablish +ffffffff8252e520 T acpi_scan +ffffffff8252e6d0 T acpi_acquire_glk +ffffffff8252e730 T acpi_release_glk +ffffffff8252e780 T acpi_attach_machdep +ffffffff8252e910 T acpi_sleep_cpu +ffffffff8252eab0 T acpi_resume_cpu +ffffffff8252ebb0 T sleep_mp +ffffffff8252ecb0 T resume_mp +ffffffff8252eda0 T acpi_iommu_device_map +ffffffff8252f000 T hibernate_resume_machdep +ffffffff8252f050 T hibernate_drop_to_real_mode +ffffffff8252f060 T hibernate_activate_resume_pt_machdep +ffffffff8252f0a0 T hibernate_switch_stack_machdep +ffffffff8252f0e0 T hibernate_flush +ffffffff8252f110 T acpi_savecpu +ffffffff82530000 T sleep_showstate +ffffffff82530100 T sleep_setstate +ffffffff82530160 T gosleep +ffffffff82530220 T sleep_abort +ffffffff82530250 T sleep_resume +ffffffff825302c0 T suspend_finish +ffffffff82531000 T acpiopen +ffffffff825310d0 T acpiclose +ffffffff82531160 T acpiioctl +ffffffff825312d0 T request_sleep +ffffffff82531350 T acpi_filtdetach +ffffffff825313a0 T acpi_filtread +ffffffff825313e0 T acpikqfilter +ffffffff82532000 T acpipci_match +ffffffff82532030 T acpipci_attach +ffffffff825322f0 T acpipci_osc +ffffffff82532430 T acpipci_parse_resources +ffffffff82532540 T acpipci_attach_bus +ffffffff82532710 T acpipci_print +ffffffff82532780 T acpipci_attach_busses +ffffffff82533000 T efiopen +ffffffff82533040 T eficlose +ffffffff82533070 T efiioctl +ffffffff82533110 T efiioc_get_table +ffffffff82533270 T efiioc_var_get +ffffffff825334f0 T efiioc_var_next +ffffffff82533710 T efiioc_var_set +ffffffff825339c0 T efi_adapt_error +ffffffff82534000 T efi_match +ffffffff82534060 T efi_attach +ffffffff82534330 T efi_map_runtime +ffffffff825344b0 T efi_enter +ffffffff82534550 T efi_leave +ffffffff825345d0 T efi_fault +ffffffff82535000 T vmm_probe +ffffffff82535050 T vmm_attach +ffffffff82535170 T vmm_activate +ffffffff825352b0 T vmmopen +ffffffff82535300 T vmmclose +ffffffff82535330 T vm_find +ffffffff82535450 T vmmioctl +ffffffff825356d0 T vm_create +ffffffff82535a80 T vm_get_info +ffffffff82535cd0 T vm_terminate +ffffffff82535e40 T vm_resetcpu +ffffffff82535f60 T vm_share_mem +ffffffff825360b0 T pledge_ioctl_vmm +ffffffff825361a0 T vm_find_vcpu +ffffffff82536200 T vm_create_check_mem_ranges +ffffffff82536360 T vm_teardown +ffffffff82536490 T vcpu_must_stop +ffffffff82537000 T vmm_enabled +ffffffff82537090 T vmm_attach_machdep +ffffffff82537250 T vmm_quiesce_vmx +ffffffff82537420 T vmm_activate_machdep +ffffffff82537540 T vmm_stop +ffffffff82537680 T vmm_start +ffffffff82537760 T vmmioctl_machdep +ffffffff82537830 T vm_intr_pending +ffffffff825378d0 T vm_mprotect_ept +ffffffff82537b70 T pledge_ioctl_vmm_machdep +ffffffff82537bc0 T vm_rwvmparams +ffffffff82537d50 T vmm_init_pvclock +ffffffff82537e30 T vm_rwregs +ffffffff82537f40 T vcpu_readregs_vmx +ffffffff82538370 T vcpu_writeregs_vmx +ffffffff825387e0 T vcpu_readregs_svm +ffffffff82538c90 T vcpu_writeregs_svm +ffffffff82539160 T vmm_get_guest_memtype +ffffffff825391e0 T vmx_mprotect_ept +ffffffff82539460 T vmx_pmap_find_pte_ept +ffffffff82539530 T start_vmm_on_cpu +ffffffff82539610 T stop_vmm_on_cpu +ffffffff825396b0 T vmclear_on_cpu +ffffffff82539730 T vm_impl_init_vmx +ffffffff82539850 T vm_impl_init_svm +ffffffff82539970 T vm_impl_init +ffffffff82539a10 T vm_impl_deinit +ffffffff82539a40 T vcpu_reload_vmcs_vmx +ffffffff82539b80 T vcpu_reset_regs_svm +ffffffff82539f10 T svm_setmsrbrw +ffffffff8253a080 T svm_setmsrbr +ffffffff8253a150 T vmm_alloc_vpid +ffffffff8253a260 T svm_setmsrbw +ffffffff8253a340 T vmx_setmsrbr +ffffffff8253a3f0 T vmx_setmsrbw +ffffffff8253a4a0 T vmx_setmsrbrw +ffffffff8253a5b0 T svm_set_clean +ffffffff8253a600 T svm_set_dirty +ffffffff8253a650 T vcpu_reset_regs_vmx +ffffffff8253b200 T vcpu_vmx_check_cap +ffffffff8253b300 T vcpu_vmx_compute_ctrl +ffffffff8253b4e0 T vcpu_init_vmx +ffffffff8253b880 T vcpu_deinit_vmx +ffffffff8253ba00 T vcpu_reset_regs +ffffffff8253ba40 T vcpu_init_svm +ffffffff8253bbd0 T vcpu_deinit_svm +ffffffff8253bd10 T vcpu_init +ffffffff8253bdd0 T vmm_free_vpid +ffffffff8253be40 T vcpu_deinit +ffffffff8253be80 T vm_run +ffffffff8253c030 T vcpu_run_vmx +ffffffff8253c7b0 T vcpu_run_svm +ffffffff8253cd80 T vmm_fpurestore +ffffffff8253ce40 T vmm_fpusave +ffffffff8253cec0 T vmm_translate_gva +ffffffff8253d1e0 T vmm_update_pvclock +ffffffff8253d2e0 T vmx_get_exit_info +ffffffff8253d340 T vmx_handle_exit +ffffffff8253d780 T vmx_instruction_error_decode +ffffffff8253d950 T vmm_get_guest_cpu_cpl +ffffffff8253da40 T vmx_handle_intr +ffffffff8253dad0 T svm_handle_hlt +ffffffff8253db20 T vmx_handle_hlt +ffffffff8253dbd0 T svm_handle_exit +ffffffff8253def0 T svm_handle_np_fault +ffffffff8253e090 T vmm_handle_cpuid +ffffffff8253e720 T svm_handle_msr +ffffffff8253e9e0 T svm_handle_xsetbv +ffffffff8253ea80 T svm_handle_inout +ffffffff8253eba0 T vmm_inject_ud +ffffffff8253ebd0 T vmm_inject_db +ffffffff8253ec00 T vmx_handle_np_fault +ffffffff8253ed80 T vmx_handle_inout +ffffffff8253ef20 T vmx_handle_cr +ffffffff8253f190 T vmx_handle_rdmsr +ffffffff8253f260 T vmx_handle_wrmsr +ffffffff8253f4c0 T vmx_handle_xsetbv +ffffffff8253f590 T vmm_inject_gp +ffffffff8253f5c0 T vmx_get_exit_qualification +ffffffff8253f620 T vmx_get_guest_faulttype +ffffffff8253f6c0 T svm_get_guest_faulttype +ffffffff8253f6f0 T svm_fault_page +ffffffff8253f780 T vmx_fault_page +ffffffff8253f8e0 T vmm_get_guest_cpu_mode +ffffffff8253f9e0 T vmx_load_pdptes +ffffffff8253fc60 T vmx_handle_cr0_write +ffffffff8253fe70 T vmx_handle_cr4_write +ffffffff8253ff10 T vmm_handle_xsetbv +ffffffff8253ffa0 T vmx_handle_misc_enable_msr +ffffffff82540000 T vmm_pat_is_valid +ffffffff825400e0 T vmm_gpa_is_valid +ffffffff82540150 T vmx_exit_reason_decode +ffffffff82540190 T svm_exit_reason_decode +ffffffff82540fa0 T vcpu_state_decode +ffffffff82541000 T vmm_dispatch_intr +ffffffff82541020 T vmxon +ffffffff82541050 T vmxoff +ffffffff82541080 T vmclear +ffffffff825410b0 T vmptrld +ffffffff825410e0 T vmptrst +ffffffff82541110 T vmwrite +ffffffff82541140 T vmread +ffffffff82541170 T invvpid +ffffffff825411a0 T invept +ffffffff825411d0 T vmx_enter_guest +ffffffff825411fb t skip_init +ffffffff825412c8 t no_l1df_msr +ffffffff825412cb t l1df_tlb_loop +ffffffff825412e4 t l1df_tlb_done +ffffffff825412ec t l1df_load_cache +ffffffff82541303 t done_flush +ffffffff82541396 t do_resume +ffffffff8254141b t fail_launch_or_resume +ffffffff8254145d t fail_launch_unknown +ffffffff8254146a t fail_launch_invalid_vmcs +ffffffff82541477 t fail_launch_valid_vmcs +ffffffff82541494 t vmx_exit_handler_asm +ffffffff82541559 t restore_host +ffffffff825415f0 T svm_enter_guest +ffffffff82541780 t restore_host_svm +ffffffff82542000 T sdmmc_match +ffffffff82542050 T sdmmc_attach +ffffffff82542390 T sdmmc_detach +ffffffff82542440 T sdmmc_activate +ffffffff82542510 T sdmmc_discover_task +ffffffff825425d0 T sdmmc_create_thread +ffffffff82542640 T sdmmc_holds_root_device +ffffffff825426a0 T sdmmc_task_thread +ffffffff82542890 T sdmmc_needs_discover +ffffffff82542940 T sdmmc_del_task +ffffffff825429f0 T sdmmc_card_detach +ffffffff82542ad0 T sdmmc_add_task +ffffffff82542b50 T sdmmc_card_attach +ffffffff82542c60 T sdmmc_enable +ffffffff82542db0 T sdmmc_scan +ffffffff82542e40 T sdmmc_init +ffffffff82542f40 T sdmmc_disable +ffffffff825430a0 T sdmmc_function_free +ffffffff825430c0 T sdmmc_delay +ffffffff82543110 T sdmmc_select_card +ffffffff82543290 T sdmmc_set_bus_power +ffffffff82543450 T sdmmc_function_alloc +ffffffff825434e0 T sdmmc_app_command +ffffffff82543670 T sdmmc_mmc_command +ffffffff825436f0 T sdmmc_go_idle_state +ffffffff82543810 T sdmmc_send_if_cond +ffffffff82543960 T sdmmc_set_relative_addr +ffffffff82544000 T sdmmc_cisptr +ffffffff825440a0 T sdmmc_read_cis +ffffffff825443b0 T sdmmc_print_cis +ffffffff82544520 T sdmmc_check_cis_quirks +ffffffff82545000 T sdmmc_io_enable +ffffffff825452a0 T sdmmc_io_reset +ffffffff825453d0 T sdmmc_io_send_op_cond +ffffffff82545540 T sdmmc_io_scan +ffffffff82545690 T sdmmc_io_init +ffffffff825457c0 T sdmmc_io_set_highspeed +ffffffff82545a70 T sdmmc_io_set_bus_width +ffffffff82545d00 T sdmmc_io_function_ready +ffffffff82545e80 T sdmmc_io_read_1 +ffffffff82545fd0 T sdmmc_io_function_enable +ffffffff825463a0 T sdmmc_io_write_1 +ffffffff82546520 T sdmmc_io_function_disable +ffffffff825467a0 T sdmmc_io_attach +ffffffff82546890 T sdmmc_print +ffffffff82546ae0 T sdmmc_submatch +ffffffff82546b60 T sdmmc_io_detach +ffffffff82546c10 T sdmmc_io_rw_direct +ffffffff82546db0 T sdmmc_io_rw_extended_subr +ffffffff82546f50 T sdmmc_io_rw_extended +ffffffff82547340 T sdmmc_io_read_2 +ffffffff825474a0 T sdmmc_io_write_2 +ffffffff82547600 T sdmmc_io_read_4 +ffffffff82547760 T sdmmc_io_write_4 +ffffffff825478c0 T sdmmc_io_read_multi_1 +ffffffff825479b0 T sdmmc_io_write_multi_1 +ffffffff82547aa0 T sdmmc_io_read_region_1 +ffffffff82547b90 T sdmmc_io_write_region_1 +ffffffff82547c80 T sdmmc_io_xchg +ffffffff82547e10 T sdmmc_intr_enable +ffffffff82548080 T sdmmc_intr_disable +ffffffff825482f0 T sdmmc_intr_establish +ffffffff825483f0 T sdmmc_intr_disestablish +ffffffff825484e0 T sdmmc_card_intr +ffffffff82548530 T sdmmc_intr_task +ffffffff825485c0 T sdmmc_io_set_blocklen +ffffffff82549000 T sdmmc_mem_enable +ffffffff825494e0 T sdmmc_mem_send_op_cond +ffffffff82549690 T sdmmc_mem_signal_voltage +ffffffff82549750 T sdmmc_mem_scan +ffffffff82549a60 T sdmmc_decode_csd +ffffffff82549e70 T sdmmc_decode_cid +ffffffff8254a2b0 T sdmmc_mem_send_scr +ffffffff8254a3f0 T sdmmc_mem_decode_scr +ffffffff8254a470 T sdmmc_mem_send_cxd_data +ffffffff8254a5e0 T sdmmc_mem_set_bus_width +ffffffff8254a700 T sdmmc_mem_sd_switch +ffffffff8254a9b0 T sdmmc_be512_to_bitfield512 +ffffffff8254aa60 T sdmmc_mem_mmc_switch +ffffffff8254ab50 T sdmmc_mem_init +ffffffff8254aca0 T sdmmc_mem_set_blocklen +ffffffff8254ada0 T sdmmc_mem_sd_init +ffffffff8254b350 T sdmmc_mem_mmc_init +ffffffff8254bc70 T sdmmc_mem_select_transfer_mode +ffffffff8254bcf0 T sdmmc_mem_execute_tuning +ffffffff8254bd80 T sdmmc_mem_read_block_subr +ffffffff8254c0e0 T sdmmc_mem_single_read_block +ffffffff8254c1b0 T sdmmc_mem_read_block +ffffffff8254c370 T sdmmc_mem_write_block_subr +ffffffff8254c6c0 T sdmmc_mem_single_write_block +ffffffff8254c790 T sdmmc_mem_write_block +ffffffff8254c950 T sdmmc_mem_hibernate_write +ffffffff8254d000 T sdmmc_scsi_cmd +ffffffff8254d1f0 T sdmmc_minphys +ffffffff8254d270 T sdmmc_scsi_attach +ffffffff8254d460 T sdmmc_alloc_ccbs +ffffffff8254d5a0 T sdmmc_free_ccbs +ffffffff8254d600 T sdmmc_scsi_detach +ffffffff8254d760 T sdmmc_stimeout +ffffffff8254d7e0 T sdmmc_ccb_alloc +ffffffff8254d890 T sdmmc_ccb_free +ffffffff8254d970 T sdmmc_inquiry +ffffffff8254dbe0 T sdmmc_start_xs +ffffffff8254dcd0 T sdmmc_complete_xs +ffffffff8254dda0 T sdmmc_done_xs +ffffffff8254ddf0 T sdmmc_scsi_hibernate_io +ffffffff8254e000 T bwfm_sdio_preinit +ffffffff8254e4f0 T bwfm_sdio_txcheck +ffffffff8254e530 T bwfm_sdio_txdata +ffffffff8254e5a0 T bwfm_sdio_txctl +ffffffff8254e6f0 T bwfm_sdio_buscore_read +ffffffff8254e700 T bwfm_sdio_buscore_write +ffffffff8254e720 T bwfm_sdio_buscore_prepare +ffffffff8254e860 T bwfm_sdio_buscore_activate +ffffffff8254e8e0 T bwfm_sdio_match +ffffffff8254e9b0 T bwfm_sdio_attach +ffffffff8254ec70 T bwfm_sdio_detach +ffffffff8254ecd0 T bwfm_sdio_task +ffffffff8254ee30 T bwfm_sdio_write_1 +ffffffff8254ee60 T bwfm_sdio_read_1 +ffffffff8254ee90 T bwfm_sdio_write_4 +ffffffff8254ef40 T bwfm_sdio_read_4 +ffffffff8254eff0 T bwfm_sdio_load_microcode +ffffffff8254f250 T bwfm_sdio_clkctl +ffffffff8254f380 T bwfm_sdio_dev_write +ffffffff8254f3d0 T bwfm_sdio_intr +ffffffff8254f410 T bwfm_sdio_ram_read_write +ffffffff8254f640 T bwfm_sdio_htclk +ffffffff8254f8a0 T bwfm_sdio_readshared +ffffffff8254f970 T bwfm_sdio_dev_read +ffffffff8254f9b0 T bwfm_sdio_rx_frames +ffffffff8254fd40 T bwfm_sdio_tx_frames +ffffffff8254fe20 T bwfm_sdio_backplane +ffffffff8254fed0 T bwfm_sdio_buf_read +ffffffff8254ffb0 T bwfm_sdio_buf_write +ffffffff82550060 T bwfm_sdio_frame_read_write +ffffffff825501e0 T bwfm_sdio_newbuf +ffffffff82550260 T bwfm_sdio_tx_ok +ffffffff825502b0 T bwfm_sdio_tx_ctrlframe +ffffffff825503b0 T bwfm_sdio_tx_dataframe +ffffffff82550500 T bwfm_sdio_rx_glom +ffffffff82551000 T onewire_match +ffffffff82551050 T onewire_attach +ffffffff825510f0 T onewire_detach +ffffffff82551160 T onewire_activate +ffffffff82551180 T onewire_scan +ffffffff82551390 T onewire_createthread +ffffffff82551400 T onewire_print +ffffffff825514d0 T onewirebus_print +ffffffff82551520 T onewire_lock +ffffffff82551540 T onewire_unlock +ffffffff82551560 T onewire_reset +ffffffff82551580 T onewire_bit +ffffffff825515a0 T onewire_read_byte +ffffffff825516e0 T onewire_write_byte +ffffffff825517c0 T onewire_read_block +ffffffff82551860 T onewire_write_block +ffffffff82551900 T onewire_triplet +ffffffff825519e0 T onewire_matchrom +ffffffff82551b30 T onewire_search +ffffffff82551ec0 T onewire_thread +ffffffff82552000 T onewire_crc +ffffffff825520e0 T onewire_crc16 +ffffffff825521c0 T onewire_famname +ffffffff82552200 T onewire_matchbyfam +ffffffff82553000 T owid_match +ffffffff82553030 T owid_attach +ffffffff82553100 T owid_detach +ffffffff82553140 T owid_activate +ffffffff82554000 T owsbm_match +ffffffff82554030 T owsbm_attach +ffffffff825541d0 T owsbm_detach +ffffffff82554240 T owsbm_activate +ffffffff82554270 T owsbm_update +ffffffff82555000 T owtemp_match +ffffffff82555030 T owtemp_attach +ffffffff82555130 T owtemp_detach +ffffffff825551a0 T owtemp_activate +ffffffff825551d0 T owtemp_update +ffffffff82556000 T owctr_match +ffffffff82556030 T owctr_attach +ffffffff82556180 T owctr_detach +ffffffff825561f0 T owctr_activate +ffffffff82556220 T owctr_update +ffffffff82556250 T owctr_update_counter +ffffffff82557000 A __text_page_start +ffffffff82557000 T Xsyscall_meltdown +ffffffff8255700c T Xsyscall +ffffffff8255726e t Xsyscall_trampback +ffffffff82557280 T intr_user_exit +ffffffff825572c2 t intr_user_exit_post_ast +ffffffff825573ee t Xiretq_trampback +ffffffff825573fa T doreti_iret +ffffffff82558000 T alltraps +ffffffff82558138 T recall_trap +ffffffff82558150 T alltraps_kern +ffffffff82558153 T alltraps_kern_meltdown +ffffffff82559000 ? Xsyscall32 +ffffffff82559000 A __kutext_start +ffffffff82559000 A __text_page_end +ffffffff8255a000 ? Xtrap00 +ffffffff8255a010 ? Xtrap01 +ffffffff8255a020 ? Xtrap02 +ffffffff8255a028 c calltrap_specstk +ffffffff8255a0f0 ? calltrap_specstk_tramp +ffffffff8255a110 ? Xtrap03 +ffffffff8255a120 ? Xtrap04 +ffffffff8255a130 ? Xtrap05 +ffffffff8255a140 ? Xtrap06 +ffffffff8255a150 ? Xtrap07 +ffffffff8255a160 ? Xtrap08 +ffffffff8255a170 ? Xtrap09 +ffffffff8255a180 ? Xtrap0a +ffffffff8255a190 ? Xtrap0b +ffffffff8255a1a0 ? Xtrap0c +ffffffff8255a1b0 ? Xtrap0d +ffffffff8255a240 ? Xtrap0e +ffffffff8255a250 ? Xintrspurious +ffffffff8255a250 ? Xtrap0f +ffffffff8255a260 ? Xtrap10 +ffffffff8255a270 ? Xtrap11 +ffffffff8255a280 ? Xtrap12 +ffffffff8255a290 ? Xtrap13 +ffffffff8255a2a0 ? Xtrap14 +ffffffff8255a2b0 ? Xtrap15 +ffffffff8255a2c0 ? Xtrap16 +ffffffff8255a2c0 ? Xtrap17 +ffffffff8255a2c0 ? Xtrap18 +ffffffff8255a2c0 ? Xtrap19 +ffffffff8255a2c0 ? Xtrap1a +ffffffff8255a2c0 ? Xtrap1b +ffffffff8255a2c0 ? Xtrap1c +ffffffff8255a2c0 ? Xtrap1d +ffffffff8255a2c0 ? Xtrap1e +ffffffff8255a2c0 ? Xtrap1f +ffffffff8255a2d0 ? x2apic_eoi +ffffffff8255a2f0 ? Xintr_lapic_ipi +ffffffff8255a330 ? Xipi_invltlb +ffffffff8255a360 ? Xipi_invlpg +ffffffff8255a390 ? Xipi_invlrange +ffffffff8255a3d0 ? Xipi_invltlb_pcid +ffffffff8255a410 ? Xipi_invlpg_pcid +ffffffff8255a460 ? Xipi_invlrange_pcid +ffffffff8255a4d0 ? Xintr_lapic_ltimer +ffffffff8255a510 ? Xintr_xen_upcall +ffffffff8255a550 ? Xintr_hyperv_upcall +ffffffff8255a590 ? Xintr_legacy0 +ffffffff8255a5d0 ? Xintr_legacy1 +ffffffff8255a610 ? Xintr_legacy2 +ffffffff8255a650 ? Xintr_legacy3 +ffffffff8255a690 ? Xintr_legacy4 +ffffffff8255a6d0 ? Xintr_legacy5 +ffffffff8255a710 ? Xintr_legacy6 +ffffffff8255a750 ? Xintr_legacy7 +ffffffff8255a790 ? Xintr_legacy8 +ffffffff8255a7d0 ? Xintr_legacy9 +ffffffff8255a810 ? Xintr_legacy10 +ffffffff8255a850 ? Xintr_legacy11 +ffffffff8255a890 ? Xintr_legacy12 +ffffffff8255a8d0 ? Xintr_legacy13 +ffffffff8255a910 ? Xintr_legacy14 +ffffffff8255a950 ? Xintr_legacy15 +ffffffff8255a990 ? Xintr_ioapic_edge0 +ffffffff8255a9d0 ? Xintr_ioapic_edge1 +ffffffff8255aa10 ? Xintr_ioapic_edge2 +ffffffff8255aa50 ? Xintr_ioapic_edge3 +ffffffff8255aa90 ? Xintr_ioapic_edge4 +ffffffff8255aad0 ? Xintr_ioapic_edge5 +ffffffff8255ab10 ? Xintr_ioapic_edge6 +ffffffff8255ab50 ? Xintr_ioapic_edge7 +ffffffff8255ab90 ? Xintr_ioapic_edge8 +ffffffff8255abd0 ? Xintr_ioapic_edge9 +ffffffff8255ac10 ? Xintr_ioapic_edge10 +ffffffff8255ac50 ? Xintr_ioapic_edge11 +ffffffff8255ac90 ? Xintr_ioapic_edge12 +ffffffff8255acd0 ? Xintr_ioapic_edge13 +ffffffff8255ad10 ? Xintr_ioapic_edge14 +ffffffff8255ad50 ? Xintr_ioapic_edge15 +ffffffff8255ad90 ? Xintr_ioapic_edge16 +ffffffff8255add0 ? Xintr_ioapic_edge17 +ffffffff8255ae10 ? Xintr_ioapic_edge18 +ffffffff8255ae50 ? Xintr_ioapic_edge19 +ffffffff8255ae90 ? Xintr_ioapic_edge20 +ffffffff8255aed0 ? Xintr_ioapic_edge21 +ffffffff8255af10 ? Xintr_ioapic_edge22 +ffffffff8255af50 ? Xintr_ioapic_edge23 +ffffffff8255af90 ? Xintr_ioapic_edge24 +ffffffff8255afd0 ? Xintr_ioapic_edge25 +ffffffff8255b010 ? Xintr_ioapic_edge26 +ffffffff8255b050 ? Xintr_ioapic_edge27 +ffffffff8255b090 ? Xintr_ioapic_edge28 +ffffffff8255b0d0 ? Xintr_ioapic_edge29 +ffffffff8255b110 ? Xintr_ioapic_edge30 +ffffffff8255b150 ? Xintr_ioapic_edge31 +ffffffff8255b190 ? Xintr_ioapic_edge32 +ffffffff8255b1d0 ? Xintr_ioapic_edge33 +ffffffff8255b210 ? Xintr_ioapic_edge34 +ffffffff8255b250 ? Xintr_ioapic_edge35 +ffffffff8255b290 ? Xintr_ioapic_edge36 +ffffffff8255b2d0 ? Xintr_ioapic_edge37 +ffffffff8255b310 ? Xintr_ioapic_edge38 +ffffffff8255b350 ? Xintr_ioapic_edge39 +ffffffff8255b390 ? Xintr_ioapic_edge40 +ffffffff8255b3d0 ? Xintr_ioapic_edge41 +ffffffff8255b410 ? Xintr_ioapic_edge42 +ffffffff8255b450 ? Xintr_ioapic_edge43 +ffffffff8255b490 ? Xintr_ioapic_edge44 +ffffffff8255b4d0 ? Xintr_ioapic_edge45 +ffffffff8255b510 ? Xintr_ioapic_edge46 +ffffffff8255b550 ? Xintr_ioapic_edge47 +ffffffff8255b590 ? Xintr_ioapic_edge48 +ffffffff8255b5d0 ? Xintr_ioapic_edge49 +ffffffff8255b610 ? Xintr_ioapic_edge50 +ffffffff8255b650 ? Xintr_ioapic_edge51 +ffffffff8255b690 ? Xintr_ioapic_edge52 +ffffffff8255b6d0 ? Xintr_ioapic_edge53 +ffffffff8255b710 ? Xintr_ioapic_edge54 +ffffffff8255b750 ? Xintr_ioapic_edge55 +ffffffff8255b790 ? Xintr_ioapic_edge56 +ffffffff8255b7d0 ? Xintr_ioapic_edge57 +ffffffff8255b810 ? Xintr_ioapic_edge58 +ffffffff8255b850 ? Xintr_ioapic_edge59 +ffffffff8255b890 ? Xintr_ioapic_edge60 +ffffffff8255b8d0 ? Xintr_ioapic_edge61 +ffffffff8255b910 ? Xintr_ioapic_edge62 +ffffffff8255b950 ? Xintr_ioapic_edge63 +ffffffff8255b990 ? Xintr_ioapic_level0 +ffffffff8255b9d0 ? Xintr_ioapic_level1 +ffffffff8255ba10 ? Xintr_ioapic_level2 +ffffffff8255ba50 ? Xintr_ioapic_level3 +ffffffff8255ba90 ? Xintr_ioapic_level4 +ffffffff8255bad0 ? Xintr_ioapic_level5 +ffffffff8255bb10 ? Xintr_ioapic_level6 +ffffffff8255bb50 ? Xintr_ioapic_level7 +ffffffff8255bb90 ? Xintr_ioapic_level8 +ffffffff8255bbd0 ? Xintr_ioapic_level9 +ffffffff8255bc10 ? Xintr_ioapic_level10 +ffffffff8255bc50 ? Xintr_ioapic_level11 +ffffffff8255bc90 ? Xintr_ioapic_level12 +ffffffff8255bcd0 ? Xintr_ioapic_level13 +ffffffff8255bd10 ? Xintr_ioapic_level14 +ffffffff8255bd50 ? Xintr_ioapic_level15 +ffffffff8255bd90 ? Xintr_ioapic_level16 +ffffffff8255bdd0 ? Xintr_ioapic_level17 +ffffffff8255be10 ? Xintr_ioapic_level18 +ffffffff8255be50 ? Xintr_ioapic_level19 +ffffffff8255be90 ? Xintr_ioapic_level20 +ffffffff8255bed0 ? Xintr_ioapic_level21 +ffffffff8255bf10 ? Xintr_ioapic_level22 +ffffffff8255bf50 ? Xintr_ioapic_level23 +ffffffff8255bf90 ? Xintr_ioapic_level24 +ffffffff8255bfd0 ? Xintr_ioapic_level25 +ffffffff8255c010 ? Xintr_ioapic_level26 +ffffffff8255c050 ? Xintr_ioapic_level27 +ffffffff8255c090 ? Xintr_ioapic_level28 +ffffffff8255c0d0 ? Xintr_ioapic_level29 +ffffffff8255c110 ? Xintr_ioapic_level30 +ffffffff8255c150 ? Xintr_ioapic_level31 +ffffffff8255c190 ? Xintr_ioapic_level32 +ffffffff8255c1d0 ? Xintr_ioapic_level33 +ffffffff8255c210 ? Xintr_ioapic_level34 +ffffffff8255c250 ? Xintr_ioapic_level35 +ffffffff8255c290 ? Xintr_ioapic_level36 +ffffffff8255c2d0 ? Xintr_ioapic_level37 +ffffffff8255c310 ? Xintr_ioapic_level38 +ffffffff8255c350 ? Xintr_ioapic_level39 +ffffffff8255c390 ? Xintr_ioapic_level40 +ffffffff8255c3d0 ? Xintr_ioapic_level41 +ffffffff8255c410 ? Xintr_ioapic_level42 +ffffffff8255c450 ? Xintr_ioapic_level43 +ffffffff8255c490 ? Xintr_ioapic_level44 +ffffffff8255c4d0 ? Xintr_ioapic_level45 +ffffffff8255c510 ? Xintr_ioapic_level46 +ffffffff8255c550 ? Xintr_ioapic_level47 +ffffffff8255c590 ? Xintr_ioapic_level48 +ffffffff8255c5d0 ? Xintr_ioapic_level49 +ffffffff8255c610 ? Xintr_ioapic_level50 +ffffffff8255c650 ? Xintr_ioapic_level51 +ffffffff8255c690 ? Xintr_ioapic_level52 +ffffffff8255c6d0 ? Xintr_ioapic_level53 +ffffffff8255c710 ? Xintr_ioapic_level54 +ffffffff8255c750 ? Xintr_ioapic_level55 +ffffffff8255c790 ? Xintr_ioapic_level56 +ffffffff8255c7d0 ? Xintr_ioapic_level57 +ffffffff8255c810 ? Xintr_ioapic_level58 +ffffffff8255c850 ? Xintr_ioapic_level59 +ffffffff8255c890 ? Xintr_ioapic_level60 +ffffffff8255c8d0 ? Xintr_ioapic_level61 +ffffffff8255c910 ? Xintr_ioapic_level62 +ffffffff8255c950 ? Xintr_ioapic_level63 +ffffffff8255d000 ? codepatch_fill_nop +ffffffff8255d000 A __cptext_start +ffffffff8255d000 A __kutext_end +ffffffff8255d0b0 ? codepatch_maprw +ffffffff8255d190 ? codepatch_unmaprw +ffffffff8255d200 ? codepatch_nop +ffffffff8255d360 ? codepatch_replace +ffffffff8255d510 ? codepatch_call +ffffffff8255d530 ? codepatch_jmp +ffffffff8255e000 A __cptext_end +ffffffff8255e000 A __rodata_start +ffffffff8255e000 C _etext +ffffffff8255e000 C etext +ffffffff8255f000 r seeprom_read +ffffffff8255f004 r icl_mg_pll_find_divisors.div1_vals +ffffffff8255f028 r gen9bc_tgp_ddc_pin_map +ffffffff8255f038 r athn_ac2qid +ffffffff8255f038 r athn_ac2qid +ffffffff8255f038 r athn_ac2qid +ffffffff8255f044 r rtwn_get_rssi.cckoff +ffffffff8255f06c r rsu_ac2qid +ffffffff8255f07c r pckbc_portcmd +ffffffff8255f080 r tht_fifo_write_pad.pad +ffffffff8255f088 r rsu_get_rssi.cckoff +ffffffff8255f09c r adlp_n_revids +ffffffff8255f0ec r apple_iso_trans +ffffffff8255f0f0 r dg2_g12_revid_step_tbl +ffffffff8255f0f8 r wihap_check_tx.txratetable +ffffffff8255f0fc r dmamode +ffffffff8255f124 r gen9_edram_size_mb.sets +ffffffff82560000 r isomappings +ffffffff82560080 r unimappings +ffffffff82560230 r replacements +ffffffff82563bf6 r cmd0646_9_tim_udma +ffffffff825b7d12 r pp_r600_decoded_lanes +ffffffff825d3160 r cmd680_setup_channel.udma_tbl +ffffffff825dae43 r apollo_udma33_tim +ffffffff825e0f10 r substchar +ffffffff825e3045 r apollo_udma100_tim +ffffffff8260aa52 r apollo_udma66_tim +ffffffff82611fa7 r apollo_pio_rec +ffffffff826214c8 r cy_pio_rec +ffffffff82650cc1 r apollo_udma133_tim +ffffffff8265d9c8 R drm_ca +ffffffff8265d9f0 R drm_filtops +ffffffff8265da20 R drmread_filtops +ffffffff8265e000 r vga_emulops +ffffffff8265e048 R vga_stdscreen +ffffffff8265e078 R vga_stdscreen_mono +ffffffff8265e0a8 R vga_stdscreen_bf +ffffffff8265e0d8 R vga_40lscreen +ffffffff8265e108 R vga_40lscreen_mono +ffffffff8265e138 R vga_40lscreen_bf +ffffffff8265e168 R vga_50lscreen +ffffffff8265e198 R vga_50lscreen_mono +ffffffff8265e1c8 R vga_50lscreen_bf +ffffffff8265e1f8 R vga_screenlist +ffffffff8265e208 R vga_screenlist_mono +ffffffff8265e218 R vga_accessops +ffffffff8265e278 r i945_wm_info +ffffffff8265e2b8 r bgansitopc +ffffffff8265e2c0 r pctoansi +ffffffff8265e300 r sdma_offsets +ffffffff8265e300 r sdma_offsets +ffffffff8265e338 r iha_rate_tbl +ffffffff8265e370 r i830_a_wm_info +ffffffff8265e3a8 r gen9_edram_size_mb.ways +ffffffff8265e408 r aggr_periodic_times +ffffffff8265e490 r jsl_ehl_revids +ffffffff8265e508 r michael_final.pad +ffffffff8265e530 r rt_copysa.maskarray +ffffffff8265e538 r i915_wm_info +ffffffff8265e540 r amdgpu_ih_clientid_jpeg +ffffffff8265e540 r amdgpu_ih_clientid_uvds +ffffffff8265e540 r amdgpu_ih_clientid_vcns +ffffffff8265e540 r amdgpu_ih_clientid_vcns +ffffffff8265e540 r amdgpu_ih_clientid_vcns +ffffffff8265e578 r vga_setfontset.cmaptabb +ffffffff8265e590 r tgl_revids +ffffffff8265e5e8 r i830_bc_wm_info +ffffffff8265e658 r hsw_activate_psr2.map +ffffffff8265e690 r __drm_universal_plane_init.default_modifiers +ffffffff8265e6a0 r iwn_tid2fifo +ffffffff8265e6b8 r vga_setfontset.cmaptaba +ffffffff8265e6c0 r crtc_offsets +ffffffff8265e6c0 r crtc_offsets +ffffffff8265e6c0 r crtc_offsets +ffffffff8265e6e0 r link_speed +ffffffff8265e6e0 r link_speed +ffffffff8265e6e0 r link_speed +ffffffff8265e760 r rtwn_r88e_get_rssi.cckoff +ffffffff8265f000 R edid_vendors +ffffffff8265f2c0 R edid_nvendors +ffffffff8265f2d0 R edid_products +ffffffff8265f330 R edid_nproducts +ffffffff8265f340 r _edid_modes +ffffffff82660000 R videomode_list +ffffffff82661080 R videomode_count +ffffffff82662000 r ahc_hard_errors +ffffffff82662080 r critical_sections +ffffffff826620b0 r patches +ffffffff82662d50 r seqprog +ffffffff82664000 r ahc_switch +ffffffff82665000 r termstat_strings +ffffffff82665020 r critical_sections +ffffffff82665060 r seqprog +ffffffff82665d50 r patches +ffffffff82667000 r ahd_switch +ffffffff82668000 R aic_switch +ffffffff82669000 R adw_switch +ffffffff8266a000 R gdt_switch +ffffffff8266b000 R twe_switch +ffffffff8266c000 R ciss_switch +ffffffff8266c030 R ciss_level +ffffffff8266c050 R ciss_stat +ffffffff8266d000 R ami_switch +ffffffff8266d028 R ami_raw_switch +ffffffff8266e000 R mfi_switch +ffffffff8266e028 R mfi_pd_switch +ffffffff8266e050 r mfi_iop_xscale +ffffffff8266e080 r mfi_iop_ppc +ffffffff8266e0b0 r mfi_iop_gen2 +ffffffff8266e0e0 r mfi_iop_skinny +ffffffff8266e110 r mfi_bbu_indicators +ffffffff8266f000 R qlw_switch +ffffffff82670000 R isp_2100_risc_code +ffffffff82682bf0 R isp_2200_risc_code +ffffffff82695990 R isp_2300_risc_code +ffffffff826af408 R qla_switch +ffffffff826af430 r qla_regs_2100 +ffffffff826af460 r qla_regs_2200 +ffffffff826af490 r qla_regs_23XX +ffffffff826b0000 R ahci_atascsi_methods +ffffffff826b1000 R nvme_switch +ffffffff826b1028 r nvme_ops +ffffffff826b2000 R mpi_switch +ffffffff826b2060 r bwi_rf_calc_nrssi_slope_11b.save_phy_regs +ffffffff826b2090 r chv_oa_mux_regs +ffffffff826b20b0 r fiji_clock_stretcher_lookup_table +ffffffff826b20b0 r tonga_clock_stretcher_lookup_table +ffffffff826b20d0 r iosf_pci_devices +ffffffff826b20f0 r link_speed +ffffffff826b20f0 r link_speed +ffffffff826b20f0 r link_speed +ffffffff826b2130 r drm_fb_xfrm.default_dst_pitch +ffffffff826b2130 r non_supported_protection +ffffffff826b2230 r tgl_uy_revids +ffffffff826b2280 r bwi_phy_noise_11g_rev1 +ffffffff826b2300 r cardslot_process_event.antonym_ev +ffffffff826b2390 r gen11_oa_mux_regs +ffffffff826b2480 r ddr2_cycle_tenths +ffffffff826b24f0 r rtw_intr_rx.ratetbl +ffffffff826b2570 r abm_config +ffffffff826b25e0 r getbootinfo.ports.30 +ffffffff826b2630 r reg_offsets +ffffffff826b2640 r bwi_rf_lo_measure_11g.rf_lo_adjust +ffffffff826b2650 r init_non_clock_fields.look_up +ffffffff826b2660 r uftdi_8u232am_getrate.roundoff +ffffffff826b26b0 r zyd_rx_data.rates +ffffffff826b26c0 r ieee80211_ra_valid_tx_mcs.max_mcs +ffffffff826b2700 r mmio_invalidate_full.gen8_regs +ffffffff826b2730 r bwi_phy_noise_11g +ffffffff826b2740 r hpt366_pio +ffffffff826b2770 r glk_revids +ffffffff826b27b0 r bwi_rf_calc_nrssi_slope_11g.save_phy3_regs +ffffffff826b27d0 r ether_crc32_be_update.rev +ffffffff826b27d0 r rtw_grf5101_mac_crypt.caesar +ffffffff826b2820 r snb_b_fdi_train_param +ffffffff826b28f0 r intel_hpll_vco.elk_vco +ffffffff826b2950 r pin_offsets +ffffffff826b29b0 r firmware_list +ffffffff826b2a10 r atom_arg_shift +ffffffff826b2a10 r atom_arg_shift +ffffffff826b2a50 r pf_syncookie_wstab +ffffffff826b2a70 r ieee80211_media_init.mopts +ffffffff826b2ad0 r add_entropy_words.twist_table +ffffffff826b2b70 r urtw_8225v2_txpwr_cck +ffffffff826b2b90 r bwfm_pci_prio2fifo +ffffffff826b2b90 r ieee80211_up_to_ac.up_to_ac +ffffffff826b2c50 r paritytab +ffffffff826b2c50 r x86emu_parity_tab +ffffffff826b2c70 r legacy_connector_convert +ffffffff826b2cb0 r gen7_oa_mux_regs +ffffffff826b2cd0 r hsw_oa_mux_regs +ffffffff826b2cf0 r notetab +ffffffff826b2d10 r urtw_8225v2_txpwr_cck_ch14 +ffffffff826b2d30 r bwi_rf_calibval.rf_calibvals +ffffffff826b2dd0 r pf_syncookie_msstab +ffffffff826b2e30 r xgmi3x16_pcs_err_status_reg_aldebaran +ffffffff826b2e90 r uath_wme_init.uath_wme_11g +ffffffff826b2eb0 r gen7_oa_b_counters +ffffffff826b3010 r icl_revids +ffffffff826b30d0 r rtwn_iq_calib_run.reg_adda +ffffffff826b3110 r atom_def_dst +ffffffff826b3110 r atom_def_dst +ffffffff826b3150 r sha256_initial_hash_value +ffffffff826b31b0 r otus_edca_def +ffffffff826b31d0 r intel_hpll_vco.blb_vco +ffffffff826b3290 r epic_pci_subsys_info +ffffffff826b32b0 r atom_arg_mask +ffffffff826b32b0 r atom_arg_mask +ffffffff826b3310 r butmap +ffffffff826b3350 r GFX_RLC_SRM_INDEX_CNTL_DATA_OFFSETS +ffffffff826b3390 r comsoft.lsrmap +ffffffff826b33d0 r tulip_mii_phy_readspecific.table +ffffffff826b33f0 r kbl_revids +ffffffff826b3490 r intel_hpll_vco.pnv_vco +ffffffff826b34f0 r dmapageport +ffffffff826b35b0 r intel_hpll_vco.ctg_vco +ffffffff826b3670 r drm_calculate_luminance_range.pre_computed_values +ffffffff826b4000 R sili_atascsi_methods +ffffffff826b5000 R ncr53c9x_switch +ffffffff826b6000 r scf_period +ffffffff826b7000 R siop_script +ffffffff826b75a0 R lun_switch +ffffffff826b75d0 R tag_switch +ffffffff826b7660 R load_dsa +ffffffff826b76c4 R siop_led_on +ffffffff826b76cc R siop_led_off +ffffffff826b76d8 R siop_switch +ffffffff826b8000 R ep_vortex_media +ffffffff826b8100 R ep_default_to_media +ffffffff826b9000 R wi_card_ident +ffffffff826bb000 R ucode_table +ffffffff826bc000 r re_revisions +ffffffff826bc290 r re_kstats_tpl +ffffffff826be000 R smc91cxx_media +ffffffff826be010 R smc91cxx_mii_bitbang_ops +ffffffff826bf000 R dl10019_mii_bitbang_ops +ffffffff826bf028 R dl10022_mii_bitbang_ops +ffffffff826c0000 R ax88190_mii_bitbang_ops +ffffffff826c2000 R ac97_audio_default +ffffffff826c2020 R ac97_on_off +ffffffff826c2324 R ac97_mic_select +ffffffff826c2628 R ac97_mono_select +ffffffff826c292c R ac97_source +ffffffff826c2c30 R ac97_volume_stereo +ffffffff826c2c4c R ac97_volume_mono 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ar9380_2_2_tx_gain_high_power_vals_5g +ffffffff826e1380 r ar9380_2_2_tx_gain_high_power_vals_2g +ffffffff826e1520 r ar9380_2_2_tx_gain_vals_5g +ffffffff826e16c0 r ar9380_2_2_tx_gain_vals_2g +ffffffff826e1860 r ar9485_1_1_tx_gain_regs +ffffffff826e18f0 r ar9485_1_1_tx_gain_vals_2g +ffffffff826e1a10 r ar9380_def_rom +ffffffff826e1e50 r ar9380_def_rom_h112 +ffffffff826e2290 r ar9380_def_rom_h116 +ffffffff826e26d0 r ar9380_def_rom_x112 +ffffffff826e2b10 r ar9380_def_rom_x113 +ffffffff826e3000 R atw_txthresh_tab_lo +ffffffff826e3050 R atw_txthresh_tab_hi +ffffffff826e30a0 r atw_attach.empty_macaddr +ffffffff826e30b0 r atw_attach.type_strings +ffffffff826e30d0 r atw_rfmd2958_ifn +ffffffff826e3110 r atw_rfmd2958_rf1r +ffffffff826e3150 r atw_rxintr.rate_tbl +ffffffff826e4000 r rtw_identify_sta.empty_macaddr +ffffffff826e5000 r rtwn_set_key.etherzeroaddr +ffffffff826e5010 r rtl8188eu_rf_prog +ffffffff826e5030 r rtl8188ftv_rf_prog +ffffffff826e5050 r rtl8192e_rf_prog +ffffffff826e5080 r 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codel_intervals +ffffffff82703000 r pfsync_bulk_req_state_names +ffffffff82703030 r pfsync_bulk_req_event_names +ffffffff82703060 r pfsync_qs +ffffffff827030d8 r pfsync_kstat_tpl +ffffffff827032e0 r pfsync_acts +ffffffff82704000 R hotplugread_filtops +ffffffff82705000 R dtps_static +ffffffff82706000 R db_show_all_cmds +ffffffff82706180 R db_show_cmds +ffffffff827064c0 R db_boot_cmds +ffffffff827065a0 R db_command_table +ffffffff82707000 R ddb_vars +ffffffff82708000 R audio_ca +ffffffff82708028 R audioctlread_filtops +ffffffff82708058 R audiowrite_filtops +ffffffff82708088 R audioread_filtops +ffffffff82709000 R midi_ca +ffffffff82709028 R midiwrite_filtops +ffffffff82709058 R midiread_filtops +ffffffff8270a000 r mulawtolin16 +ffffffff8270a200 r lintomulaw +ffffffff8270b000 R randomread_filtops +ffffffff8270b030 R randomwrite_filtops +ffffffff8270c000 R video_ca +ffffffff8270c028 R video_filtops +ffffffff8270d000 R cd9660_vfsops +ffffffff8270e000 R cd9660_vops +ffffffff8270e110 R cd9660_specvops +ffffffff8270e220 R cd9660_fifovops +ffffffff8270e330 R cd9660read_filtops +ffffffff8270e360 R cd9660write_filtops +ffffffff8270e390 R cd9660vnode_filtops +ffffffff8270f000 R udf_vfsops +ffffffff82710000 R udf_vops +ffffffff82710110 r mon_lens +ffffffff82711000 r month_days +ffffffff82712000 R execsw +ffffffff82713000 r shstrtab +ffffffff82714000 R copyright +ffffffff827140c0 r initpaths +ffffffff82715000 R sysent +ffffffff82717000 R bufq_impls +ffffffff82718000 R kqueueops +ffffffff82718038 R kqread_filtops +ffffffff82718068 R proc_filtops +ffffffff82718098 R file_filtops +ffffffff827180c8 R timer_filtops +ffffffff82718100 R sysfilt_ops +ffffffff82718148 R seltrue_filtops +ffffffff82718178 R dead_filtops +ffffffff827181a8 R badfd_filtops +ffffffff827181d8 r mutex_klistops +ffffffff827181f0 r rwlock_klistops +ffffffff82719000 R kv_exec +ffffffff8271a000 R addrmask +ffffffff8271b000 r rw_ops +ffffffff8271c000 r proc_printit.pstat +ffffffff8271d000 R pledge_syscalls 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rn_addmask.normal_chars +ffffffff82751000 R route_src +ffffffff82751010 R route_usrreqs +ffffffff827510b0 R routedomain +ffffffff82751100 R routesw +ffffffff82752000 R gre_vars +ffffffff82752030 r mgre_tree_RBT_INFO +ffffffff82752048 R mgre_tree_RBT_TYPE +ffffffff82752050 r egre_tree_RBT_INFO +ffffffff82752068 R egre_tree_RBT_TYPE +ffffffff82752070 r nvgre_ucast_tree_RBT_INFO +ffffffff82752088 R nvgre_ucast_tree_RBT_TYPE +ffffffff82752090 r nvgre_mcast_tree_RBT_INFO +ffffffff827520a8 R nvgre_mcast_tree_RBT_TYPE +ffffffff827520b0 r eoip_tree_RBT_INFO +ffffffff827520c8 R eoip_tree_RBT_TYPE +ffffffff827520d0 r nvgre_etherbridge_ops +ffffffff82753000 r trunk_protos +ffffffff82754000 R ethermulticastaddr_slowprotocols +ffffffff82754006 R lacp_info_tlv_template +ffffffff8275400e R marker_info_tlv_template +ffffffff82754012 R marker_response_tlv_template +ffffffff82754020 R lacp_timer_funcs +ffffffff82755000 r lacp_rxm_state_names +ffffffff82755040 r lacp_rxm_event_names +ffffffff82755090 r aggr_port_selected_names +ffffffff827550b0 r lacp_mux_state_names +ffffffff827550e0 r lacp_mux_event_names +ffffffff82755128 r lacp_address_slow +ffffffff82756000 r tpmr_pf_ipv4 +ffffffff82756018 r tpmr_pf_ipv6 +ffffffff82757000 r bpe_tree_RBT_INFO +ffffffff82757018 R bpe_tree_RBT_TYPE +ffffffff82757020 r bpe_etherbridge_ops +ffffffff82758000 R pppx_rd_filtops +ffffffff82758030 R pppx_wr_filtops +ffffffff82758060 r pppx_ifs_RBT_INFO +ffffffff82758078 R pppx_ifs_RBT_TYPE +ffffffff82758080 r pppac_rd_filtops +ffffffff827580b0 r pppac_wr_filtops +ffffffff82759000 r vxlan_peers_RBT_INFO +ffffffff82759018 R vxlan_peers_RBT_TYPE +ffffffff82759020 r vxlan_etherbridge_ops +ffffffff8275a000 R stoeplitz_cache +ffffffff8275b000 R ieee80211_std_rateset_11a +ffffffff8275b010 R ieee80211_std_rateset_11b +ffffffff8275b020 R ieee80211_std_rateset_11g +ffffffff8275b030 R ieee80211_std_ratesets_11n +ffffffff8275b3b0 R ieee80211_std_ratesets_11ac +ffffffff8275b6b0 r ieee80211_setbasicrates.basic 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divert_usrreqs +ffffffff82767000 R icmpctl_vars +ffffffff82768000 R ipctl_vars +ffffffff82768150 R inetctlerrmap +ffffffff82769000 R rip_usrreqs +ffffffff8276a000 R tcp_timer_funcs +ffffffff8276b000 R tcp_usrreqs +ffffffff8276b0a0 R tcp6_usrreqs +ffffffff8276b140 R tcpctl_vars +ffffffff8276c000 R udp_usrreqs +ffffffff8276c0a0 R udp6_usrreqs +ffffffff8276c140 R udpctl_vars +ffffffff8276d000 R gre_usrreqs +ffffffff8276e000 r ipsec_ids_tree_RBT_INFO +ffffffff8276e018 R ipsec_ids_tree_RBT_TYPE +ffffffff8276e020 r ipsec_ids_flows_RBT_INFO +ffffffff8276e038 R ipsec_ids_flows_RBT_TYPE +ffffffff8276e040 R xformsw +ffffffff8276e158 R xformswNXFORMSW +ffffffff8276f000 R espctl_vars +ffffffff8276f050 R ahctl_vars +ffffffff8276f070 R ipcompctl_vars +ffffffff8276f090 R ipsecctl_vars +ffffffff82770000 R ipseczeroes +ffffffff82771000 r carp_set_state.carp_states +ffffffff82772000 r Rcon +ffffffff82773000 r Te2 +ffffffff82773400 r Te3 +ffffffff82773800 r Te0 +ffffffff82773c00 r Te1 +ffffffff82774000 r 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uvm_objtree_RBT_TYPE +ffffffff8279e000 r uvm_pmr_addr_RBT_INFO +ffffffff8279e018 R uvm_pmr_addr_RBT_TYPE +ffffffff8279e020 r uvm_pmr_size_RBT_INFO +ffffffff8279e038 R uvm_pmr_size_RBT_TYPE +ffffffff8279e040 r uvm_pmemrange_addr_RBT_INFO +ffffffff8279e058 R uvm_pmemrange_addr_RBT_TYPE +ffffffff8279f000 R uvm_vnodeops +ffffffff8279f048 r uvn_flush.interval +ffffffff827a0000 R zeroin6_addr +ffffffff827a1000 R in6addr_any +ffffffff827a1010 R in6addr_loopback +ffffffff827a1020 R in6addr_intfacelocal_allnodes +ffffffff827a1030 R in6addr_linklocal_allnodes +ffffffff827a1040 R in6addr_linklocal_allrouters +ffffffff827a1050 R in6mask0 +ffffffff827a1060 R in6mask32 +ffffffff827a1070 R in6mask64 +ffffffff827a1080 R in6mask96 +ffffffff827a1090 R in6mask128 +ffffffff827a10a0 R sa6_any +ffffffff827a2000 R divert6ctl_vars +ffffffff827a2030 R divert6_usrreqs +ffffffff827a3000 R inet6domain +ffffffff827a3050 R inet6sw +ffffffff827a4000 R icmpv6ctl_vars +ffffffff827a5000 R inet6ctlerrmap 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ahci_devices +ffffffff8284b000 R nvme_pci_ca +ffffffff8284b028 r nvme_msi_blacklist +ffffffff8284c000 R ami_pci_ca +ffffffff8284c030 r ami_pci_subsys +ffffffff8284c270 r ami_pci_vendors +ffffffff8284d000 R mfi_pci_ca +ffffffff8284d030 r mfi_pci_devices +ffffffff8284e000 R mfii_ca +ffffffff8284e028 R mfii_switch +ffffffff8284e050 R mfii_pd_switch +ffffffff8284e078 R mfii_iop_thunderbolt +ffffffff8284e088 R mfii_iop_25 +ffffffff8284e098 R mfii_iop_35 +ffffffff8284e0b0 R mfii_devices +ffffffff8284e140 r mfi_bbu_indicators +ffffffff8284f000 R ips_ca +ffffffff8284f028 r ips_ids +ffffffff8284f040 r ips_chips +ffffffff8284f090 r ips_names +ffffffff8284f128 r ips_switch +ffffffff8284f150 r ips_pt_switch +ffffffff82850000 R eap_ca +ffffffff82850028 R eap1370_hw_if +ffffffff828500e0 R eap1371_hw_if +ffffffff82850198 R eap_midi_hw_if +ffffffff828501d0 R eap_devices +ffffffff82851000 R auacer_pci_devices +ffffffff82851008 R auacer_ca +ffffffff82851030 R auacer_hw_if +ffffffff82852000 R auich_ca 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+ffffffff828f0060 r ixgbe_mvals_X540 +ffffffff828f00c0 r ixgbe_mvals_X550 +ffffffff828f0120 r ixgbe_mvals_X550EM_x +ffffffff828f0180 r ixgbe_mvals_X550EM_a +ffffffff828f3000 R ixl_ca +ffffffff828f3030 R ixl_port_counters +ffffffff828f32c0 R ixl_vsi_counters +ffffffff828f3380 r ixl_devices +ffffffff828f34c0 r ixl_710 +ffffffff828f34e8 r ixl_722 +ffffffff828f3510 r ixl_pf_aq_regs +ffffffff828f3578 r ixl_710_decrepit +ffffffff828f35a0 r ixl_phy_type_map +ffffffff828f3770 r ixl_speed_type_map +ffffffff828f37b0 r ixl_hmc_pack_rxq +ffffffff828f3830 r ixl_hmc_pack_txq +ffffffff828f38a0 r ixl_sfp_ops +ffffffff828f38b8 r ixl_qsfp_ops +ffffffff828f4000 R xge_ca +ffffffff828f4028 R xge_devices +ffffffff828f4030 r xge_fix_mac +ffffffff828f4110 r xge_xena_dtx_cfg +ffffffff828f4170 r xge_herc_dtx_cfg +ffffffff828f5000 R thtc_ca +ffffffff828f5028 R tht_ca +ffffffff828f5050 r thtc_devices +ffffffff828f5068 r tht_link_state.interval +ffffffff828f6000 R myx_ca +ffffffff828f6028 R myx_devices +ffffffff828f7000 R oce_ca +ffffffff828f7030 R oce_devices +ffffffff828f8000 R dc_pci_ca +ffffffff828f9000 R epic_pci_ca +ffffffff828f9028 R epic_pci_devices +ffffffff828fa000 R ti_pci_ca +ffffffff828fa030 R ti_devices +ffffffff828fb000 R ne_pci_ca +ffffffff828fb030 R ne_pci_prod +ffffffff828fc000 R gem_pci_ca +ffffffff828fc030 R gem_pci_devices +ffffffff828fc050 r gem_promhdr +ffffffff828fc052 r gem_promdat +ffffffff828fc05a r gem_promdat2 +ffffffff828fd000 R cas_ca +ffffffff828fd028 R cas_pci_devices +ffffffff828fd030 r cas_promhdr +ffffffff828fd032 r cas_promdat_sun +ffffffff828fd03a r cas_promdat_ns +ffffffff828fd042 r cas_promdat2 +ffffffff828fe000 R sf_pci_ca +ffffffff828fe028 R sf_pci_products +ffffffff828ff000 R sis_ca +ffffffff828ff028 R sis_devices +ffffffff82900000 R se_devices +ffffffff82900008 R se_ca +ffffffff82901000 R uhci_pci_ca +ffffffff82902000 R ohci_pci_ca +ffffffff82903000 R ehci_pci_ca +ffffffff82904000 R xhci_pci_ca +ffffffff82905000 R cbb_pci_ca +ffffffff82905028 r pccbb_pcmcia_do_io_map.pcic_iowidth +ffffffff82906000 R skc_devices +ffffffff82906030 R skc_ca +ffffffff82906058 R sk_ca +ffffffff82907000 R mskc_devices +ffffffff829070a8 R mskc_ca +ffffffff829070d0 R msk_ca +ffffffff82907100 r msk_mib +ffffffff82908000 R puc_pci_ca +ffffffff82909000 R puc_devs +ffffffff8290e000 R com_puc_ca +ffffffff8290e030 r puc_port_types +ffffffff8290f000 R lpt_puc_ca +ffffffff82910000 R wi_pci_ca +ffffffff82910030 r wi_pci_products +ffffffff82911000 R an_pci_ca +ffffffff82911030 R an_pci_devices +ffffffff82912000 R iwi_devices +ffffffff82912010 R iwi_ca +ffffffff82913000 R wpi_ca +ffffffff82913028 r wpi_devices +ffffffff82913030 r wpi_rates +ffffffff82913050 r wpi_rf_gain_5ghz +ffffffff829130a0 r wpi_dsp_gain_5ghz +ffffffff829130f0 r wpi_rf_gain_2ghz +ffffffff82913140 r wpi_dsp_gain_2ghz +ffffffff82913190 r wpi_pmgt +ffffffff82913310 r wpi_bands +ffffffff82914000 R iwn_mcs2ridx +ffffffff82914020 R iwn_ca +ffffffff82914050 r iwn_devices +ffffffff829140e8 r iwn4965_sensitivity_limits +ffffffff82914124 r iwn5000_sensitivity_limits +ffffffff82914160 r iwn5150_sensitivity_limits +ffffffff8291419c r iwn1000_sensitivity_limits +ffffffff829141d8 r iwn6000_sensitivity_limits +ffffffff82914214 r iwn2000_sensitivity_limits +ffffffff82914250 r iwn_fw_errmsg +ffffffff82914340 r iwn4965_set_txpower.tdiv +ffffffff82914360 r iwn4965_rf_gain_5ghz +ffffffff829143d0 r iwn4965_dsp_gain_5ghz +ffffffff82914440 r iwn4965_dsp_gain_2ghz +ffffffff829144b0 r iwn_pmgt +ffffffff829146f0 r iwn4965_post_alive.qid2fifo +ffffffff82914700 r iwn_bands +ffffffff82914770 r iwn_rates +ffffffff82914820 r iwn4965_rf_gain_2ghz +ffffffff82915000 R iwm_nvm_channels +ffffffff82915030 R iwm_nvm_channels_8000 +ffffffff82915070 R iwm_rates +ffffffff829150d0 R iwm_ht_mcs2ridx +ffffffff82915110 R iwm_tid_to_ac +ffffffff82915118 R iwm_ac_to_tx_fifo +ffffffff82915120 R iwm_nvm_to_read +ffffffff82915144 r iwm_set_hw_address_8000.reserved_mac +ffffffff82915180 r iwm_sf_full_timeout +ffffffff829151b0 r iwm_sf_full_timeout_def +ffffffff829151e0 r advanced_lookup +ffffffff82915320 r iwm_devices +ffffffff82915360 R iwm_ca +ffffffff82916000 R iwx_9560_quz_a0_jf_b0_cfg +ffffffff82916020 R iwx_9560_qu_c0_jf_b0_cfg +ffffffff82916040 R iwx_qu_b0_hr1_b0 +ffffffff82916060 R iwx_qu_b0_hr_b0 +ffffffff82916080 R iwx_ax201_cfg_qu_hr +ffffffff829160a0 R iwx_qu_c0_hr1_b0 +ffffffff829160c0 R iwx_qu_c0_hr_b0 +ffffffff829160e0 R iwx_ax201_cfg_qu_c0_hr_b0 +ffffffff82916100 R iwx_quz_a0_hr1_b0 +ffffffff82916120 R iwx_ax201_cfg_quz_hr +ffffffff82916140 R iwx_cfg_so_a0_hr_b0 +ffffffff82916160 R iwx_cfg_quz_a0_hr_b0 +ffffffff82916180 R iwx_2ax_cfg_so_gf_a0 +ffffffff829161a0 R iwx_2ax_cfg_so_gf_a0_long +ffffffff829161c0 R iwx_2ax_cfg_so_gf4_a0 +ffffffff829161e0 R iwx_2ax_cfg_so_gf4_a0_long +ffffffff82916200 R iwx_2ax_cfg_ty_gf_a0 +ffffffff82916220 R iwx_2ax_cfg_so_jf_b0 +ffffffff82916240 R iwx_nvm_channels_8000 +ffffffff82916280 R iwx_rates +ffffffff829162e0 R iwx_mcs2ridx +ffffffff82916320 R iwx_tid_to_ac +ffffffff82916328 R iwx_ac_to_tx_fifo +ffffffff82916330 r iwx_nvm_channels_uhb +ffffffff8291639e r iwx_is_valid_mac_addr.reserved_mac +ffffffff829163b0 r iwx_sf_full_timeout +ffffffff829163e0 r iwx_sf_full_timeout_def +ffffffff82916410 r advanced_lookup +ffffffff82916550 r iwx_devices +ffffffff82916590 r iwx_dev_info_table +ffffffff82916e18 R iwx_ca +ffffffff82917000 R cmpci_ca +ffffffff82917028 R cmpci_hw_if +ffffffff829170e0 r cmpci_rate_table +ffffffff82917120 R cmpci_devices +ffffffff82917130 r cmpci_query_devinfo.mixer_port_names +ffffffff82917160 r cmpci_query_devinfo.mixer_classes +ffffffff82918000 R iha_pci_ca +ffffffff82918028 R iha_switch +ffffffff82919000 R pcscp_ca +ffffffff8291a000 R bge_ca +ffffffff8291a030 R bge_devices +ffffffff8291a1b0 r bge_revisions +ffffffff8291a610 r bge_majorrevs +ffffffff8291a790 r bge_kstat_tpl +ffffffff8291b000 R bnx_devices +ffffffff8291b020 R bnx_ca +ffffffff8291c000 R vge_ca +ffffffff8291c028 R vge_devices +ffffffff8291d000 R stge_ca +ffffffff8291d028 R stge_mii_bitbang_ops +ffffffff8291d050 R stge_devices +ffffffff8291e000 R nfe_ca +ffffffff8291e030 R nfe_devices +ffffffff8291f000 R et_devices +ffffffff8291f008 R et_ca +ffffffff82920000 R jme_devices +ffffffff82920008 R jme_ca +ffffffff82921000 R age_devices +ffffffff82921008 R age_ca +ffffffff82922000 R alc_devices +ffffffff82922038 R alc_ca +ffffffff82923000 R ale_devices +ffffffff82923008 R ale_ca +ffffffff82924000 R amdpm_ca +ffffffff82924030 R amdpm_ids +ffffffff82925000 R bce_ca +ffffffff82925028 R bce_devices +ffffffff82926000 R ath_pci_ca +ffffffff82927000 R athn_pci_ca +ffffffff82927030 r athn_pci_devices +ffffffff82928000 R atw_pci_ca +ffffffff82928028 R atw_pci_devices +ffffffff82929000 R rtw_pci_ca +ffffffff82929030 R rtw_pci_products +ffffffff8292a000 R rtwn_pci_ca +ffffffff8292a030 r rtwn_pci_devices +ffffffff8292a040 r rtl8188eu_mac +ffffffff8292a1b0 r rtl8192cu_mac +ffffffff8292a310 r rtl8192ce_mac +ffffffff8292a458 r rtl8188eu_bb_prog +ffffffff8292a480 r rtl8723a_bb_prog +ffffffff8292a4a8 r rtl8192ce_bb_prog_1t +ffffffff8292a4d0 r rtl8192ce_bb_prog_2t +ffffffff8292a500 r rtl8188eu_bb_regs +ffffffff8292a680 r rtl8188eu_bb_vals +ffffffff8292a980 r rtl8188eu_agc_vals +ffffffff8292ab80 r rtl8723a_bb_regs +ffffffff8292ad00 r rtl8723a_bb_vals +ffffffff8292aff0 r rtl8192ce_agc_vals +ffffffff8292b270 r rtl8192ce_bb_regs +ffffffff8292b3f0 r rtl8192ce_bb_vals_1t +ffffffff8292b6e0 r rtl8192ce_bb_vals_2t +ffffffff8292c000 R ral_pci_ca +ffffffff8292c030 R ral_pci_devices +ffffffff8292d000 R acx_pci_ca +ffffffff8292d028 R acx_pci_devices +ffffffff8292e000 R pgt_pci_ca +ffffffff8292e028 R pgt_pci_devices +ffffffff8292f000 R malo_pci_ca +ffffffff8292f028 R malo_pci_devices +ffffffff82930000 R bwi_pci_ca +ffffffff82930030 R bwi_pci_devices +ffffffff82931000 R piixpm_ca +ffffffff82931030 R piixpm_ids +ffffffff82932000 R vic_ca +ffffffff82932028 R vic_devices +ffffffff82933000 R vmx_devices +ffffffff82933008 R vmx_ca +ffffffff82933030 r vmx_tx_kstat_tpl +ffffffff829330d0 r vmx_kstat_rate +ffffffff829330e0 r vmx_rx_kstat_tpl +ffffffff82934000 R vmwpvs_ca +ffffffff82934028 R vmwpvs_switch +ffffffff82935000 R lii_ca +ffffffff82935028 R lii_devices +ffffffff82936000 R ichiic_ca +ffffffff82936030 R ichiic_ids +ffffffff82937000 R viapm_ca +ffffffff82937030 R viapm_ids +ffffffff82937070 r val_to_temp +ffffffff82937870 r val_to_uV.mult +ffffffff82938000 R amdiic_ca +ffffffff82938028 R amdiic_ids +ffffffff82939000 R nviic_ca +ffffffff82939030 R nviic_ids +ffffffff8293a000 R sdhc_pci_ca +ffffffff8293b000 R kate_ca +ffffffff8293b030 r kate_proc +ffffffff8293c000 R km_ca +ffffffff8293c030 r km_devices +ffffffff8293d000 R ksmn_ca +ffffffff8293d030 r ksmn_devices +ffffffff8293e000 R iosf_pci_ca +ffffffff8293f000 R itherm_devices +ffffffff8293f008 R itherm_ca +ffffffff82940000 R pchtemp_ca +ffffffff82940030 R pchtemp_devices +ffffffff82941000 R rtsx_pci_ca +ffffffff82942000 R xspd_ca +ffffffff82942028 R xspd_devices +ffffffff82943000 R virtio_pci_ca +ffffffff82944000 R dwiic_pci_ca +ffffffff82944030 R dwiic_pci_ids +ffffffff82945000 R bwfm_pci_ca +ffffffff82945030 r bwfm_pci_devices +ffffffff82946000 R ccp_pci_ca +ffffffff82946030 r ccp_pci_devices +ffffffff82947000 R bnxt_devices +ffffffff82947040 R bnxt_ca +ffffffff82948000 R mcx_ca +ffffffff82948030 r mcx_devices +ffffffff82948060 r mcx_rss_config +ffffffff829480d0 r mcx_eth_cap_map +ffffffff829482d0 r mcx_kstat_ppcnt_ieee8023 +ffffffff829482e8 r mcx_kstat_ppcnt_rfc2863 +ffffffff82948300 r mcx_kstat_ppcnt_rfc2819 +ffffffff82948318 r mcx_kstat_ppcnt_rfc3635 +ffffffff82948330 r mcx_ppcnt_ieee8023_tpl +ffffffff829484b0 r mcx_ppcnt_rfc2863_tpl +ffffffff829485c0 r mcx_ppcnt_rfc2819_tpl +ffffffff82948770 r mcx_ppcnt_rfc3635_tpl +ffffffff829488b0 r mcx_kstat_mtmp_tpl +ffffffff82948950 r mcx_kstat_mtmp_rate +ffffffff82948960 r mcx_queue_kstat_tpl +ffffffff82949000 R iavf_ca +ffffffff82949030 r iavf_devices +ffffffff82949040 r iavf_aq_regs +ffffffff829490b0 r iavf_link_speeds +ffffffff8294a000 R rge_ca +ffffffff8294a028 R rge_devices +ffffffff8294a030 r rtl8125_mac_cfg2_ephy +ffffffff8294a090 r rge_phy_config_mac_cfg3.mac_cfg3_a438_value +ffffffff8294a0b0 r rge_phy_config_mac_cfg3.mac_cfg3_b88e_value +ffffffff8294a110 r rge_phy_config_mac_cfg4.mac_cfg4_b87c_value +ffffffff8294a170 r rtl8125_mac_cfg4_ephy +ffffffff8294a1e0 r rtl8125_mac_cfg2_mcu +ffffffff8294ae80 r rtl8125_mac_cfg3_mcu +ffffffff8294b720 r rtl8125_mac_cfg4_mcu +ffffffff8294dd10 r rtl8125_mac_cfg5_mcu +ffffffff8294ec10 r rtl8125_mac_bps +ffffffff8294ef80 r rtl8125b_mac_bps +ffffffff8294f120 r rge_kstats_tpl +ffffffff82950000 R igc_devices +ffffffff82950040 R igc_ca +ffffffff82951000 R ngbe_devices +ffffffff82951008 R ngbe_ca +ffffffff82952000 R com_pci_ca +ffffffff82952030 R com_pci_ids +ffffffff82953000 r agp_attach.agp_max +ffffffff82953048 R agp_ca +ffffffff82954000 R intagp_ca +ffffffff82955000 r drm_plane_create_rotation_property.props +ffffffff82956000 r drm_bridge_priv_state_funcs +ffffffff82958000 r color_encoding_name +ffffffff82958020 r color_range_name +ffffffff82959000 r drm_subpixel_enum_list +ffffffff82959060 r drm_dpms_enum_list +ffffffff829590a0 r drm_dvi_i_select_enum_list +ffffffff829590d0 r drm_dvi_i_subconnector_enum_list +ffffffff82959100 r drm_tv_select_enum_list +ffffffff82959150 r drm_tv_subconnector_enum_list +ffffffff829591a0 r drm_dp_subconnector_enum_list +ffffffff82959210 r drm_link_status_enum_list +ffffffff82959230 r drm_scaling_mode_enum_list +ffffffff82959270 r drm_aspect_ratio_enum_list +ffffffff829592a0 r hdmi_colorspaces +ffffffff82959370 r dp_colorspaces +ffffffff82959450 r drm_content_type_enum_list +ffffffff829594a0 r drm_panel_orientation_enum_list +ffffffff829594e0 r privacy_screen_enum +ffffffff8295a000 r drm_crtc_fence_ops +ffffffff8295b000 r drm_dmt_modes +ffffffff8295d940 r edid_cea_modes_1 +ffffffff829614d0 r edid_cea_modes_193 +ffffffff82962180 r edid_quirk_list +ffffffff82962350 r edid_4k_modes +ffffffff829625b0 r edid_est_modes +ffffffff82962db0 r est3_modes +ffffffff82962f10 r stereo_mandatory_modes +ffffffff82962f90 r extra_modes +ffffffff82963000 r drm_encoder_enum_list +ffffffff82964000 r drm_fbdev_client_funcs +ffffffff82964020 r drm_fb_helper_generic_funcs +ffffffff82964028 r drm_fbdev_fb_ops +ffffffff82965000 r drm_fb_xrgb8888_to_rgb332.dst_pixsize +ffffffff82965004 r drm_fb_xrgb8888_to_rgb565.dst_pixsize +ffffffff82965008 r drm_fb_xrgb8888_to_rgb888.dst_pixsize +ffffffff8296500c r drm_fb_xrgb8888_to_xrgb2101010.dst_pixsize +ffffffff82965010 r drm_fb_xrgb8888_to_gray8.dst_pixsize +ffffffff82965014 r drm_fb_rgb888_to_xrgb8888.dst_pixsize +ffffffff82965018 r drm_fb_rgb565_to_xrgb8888.dst_pixsize +ffffffff82966000 r __drm_format_info.formats +ffffffff82967000 R drm_pgops +ffffffff82968000 r drm_ioctls +ffffffff8296a000 r dma_fence_stub_ops +ffffffff8296a038 R dma_fence_array_ops +ffffffff8296a070 R dma_fence_chain_ops +ffffffff8296a0a8 R dmabufops +ffffffff8296a0e0 R syncfileops +ffffffff8296b000 r drm_plane_type_enum_list +ffffffff8296c000 r drm_mode_status_names +ffffffff8296d000 r primary_plane_funcs +ffffffff8296d068 r safe_modeset_formats +ffffffff8296e000 r orientation_data +ffffffff829715c0 r lcd800x1280_rightside_up +ffffffff829715d8 r lcd720x1280_rightside_up +ffffffff829715f0 r lcd800x1280_leftside_up +ffffffff82971608 r lcd1080x1920_leftside_up +ffffffff82971620 r lcd1200x1920_rightside_up +ffffffff82971638 r gpd_micropc +ffffffff82971650 r gpd_pocket +ffffffff82971668 r gpd_pocket2 +ffffffff82971680 r gpd_win +ffffffff82971698 r gpd_win2 +ffffffff829716b0 r itworks_tw891 +ffffffff829716c8 r lcd1600x2560_rightside_up +ffffffff829716e0 r onegx1_pro +ffffffff829716f8 r lcd1600x2560_leftside_up +ffffffff82971710 r lcd1280x1920_rightside_up +ffffffff82971728 r .compoundliteral +ffffffff82971738 r .compoundliteral.5 +ffffffff82971760 r .compoundliteral.9 +ffffffff82971780 r .compoundliteral.17 +ffffffff829717c0 r .compoundliteral.21 +ffffffff829717e0 r .compoundliteral.23 +ffffffff829717f0 r .compoundliteral.25 +ffffffff82972000 r drm_gem_prime_dmabuf_ops +ffffffff82974000 r is_hdmi_adaptor.dp_dual_mode_hdmi_id +ffffffff82975000 r drm_dp_phy_name.phy_names +ffffffff82975048 r drm_dp_i2c_algo +ffffffff82975058 r drm_dp_i2c_lock_ops +ffffffff82975070 r dp_aux_bl_ops +ffffffff82975090 r dpcd_quirk_list +ffffffff82975320 r drm_dp_psr_setup_time.psr_setup_time_us +ffffffff82976000 R drm_dp_mst_topology_state_funcs +ffffffff82976020 r drm_dp_mst_req_type_str.req_type_str +ffffffff829761f0 r drm_dp_mst_sideband_tx_state_str.sideband_reason_str +ffffffff82976220 r drm_dp_mst_nak_reason_str.nak_reason_str +ffffffff82976278 r drm_dp_mst_i2c_algo +ffffffff82977000 r hdmi_colorimetry_val +ffffffff82978000 r ttm_bo_init_reserved.sys_mem +ffffffff82979000 r ttm_bo_pipeline_gutting.sys_mem +ffffffff8297a018 R ttm_bo_vm_ops +ffffffff8297b000 r ttm_range_manager_func +ffffffff8297c018 r ttm_kmap_iter_io_ops +ffffffff8297c030 r ttm_kmap_iter_linear_io_ops +ffffffff8297d000 r ttm_sys_manager_func +ffffffff8297e000 r ttm_kmap_iter_tt_ops +ffffffff8297f000 r drm_sched_fence_ops_scheduled +ffffffff8297f038 r drm_sched_fence_ops_finished +ffffffff82980000 R ch7017_ops +ffffffff82981000 R ch7xxx_ops +ffffffff82981060 r ch7xxx_ids +ffffffff82982000 R ivch_ops +ffffffff82982060 r backup_addresses +ffffffff82983000 R ns2501_ops +ffffffff82983060 r mode_agnostic_values +ffffffff829830e0 r ns2501_modes +ffffffff82984000 R sil164_ops +ffffffff82985000 R tfp410_ops +ffffffff82986000 r chv_dpll +ffffffff82986050 r vlv_dpll +ffffffff829860a0 r g4x_dpll +ffffffff829860f0 r pch_dpll +ffffffff82986138 r intel_dp_enc_funcs +ffffffff82987000 r intel_hdmi_enc_funcs +ffffffff82988000 r vlv_primary_formats +ffffffff82988030 r ivb_primary_formats +ffffffff82988050 r i965_primary_formats +ffffffff82988070 r i8xx_primary_formats +ffffffff82988080 r i965_plane_funcs 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adlp_clock_gating_funcs +ffffffff82a06020 r dg1_clock_gating_funcs +ffffffff82a06028 r gen12lp_clock_gating_funcs +ffffffff82a06030 r icl_clock_gating_funcs +ffffffff82a06038 r cfl_clock_gating_funcs +ffffffff82a06040 r skl_clock_gating_funcs +ffffffff82a06048 r kbl_clock_gating_funcs +ffffffff82a06050 r bxt_clock_gating_funcs +ffffffff82a06058 r glk_clock_gating_funcs +ffffffff82a06060 r bdw_clock_gating_funcs +ffffffff82a06068 r chv_clock_gating_funcs +ffffffff82a06070 r hsw_clock_gating_funcs +ffffffff82a06078 r ivb_clock_gating_funcs +ffffffff82a06080 r vlv_clock_gating_funcs +ffffffff82a06088 r gen6_clock_gating_funcs +ffffffff82a06090 r ilk_clock_gating_funcs +ffffffff82a06098 r g4x_clock_gating_funcs +ffffffff82a060a0 r i965gm_clock_gating_funcs +ffffffff82a060a8 r i965g_clock_gating_funcs +ffffffff82a060b0 r gen3_clock_gating_funcs +ffffffff82a060b8 r i85x_clock_gating_funcs +ffffffff82a060c0 r i830_clock_gating_funcs +ffffffff82a060c8 r nop_clock_gating_funcs +ffffffff82a060d0 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bonaire_mgcg_cgcg_init +ffffffff82a135e0 r bonaire_golden_registers +ffffffff82a137d0 r bonaire_golden_common_registers +ffffffff82a13800 r bonaire_golden_spm_registers +ffffffff82a13810 r kalindi_mgcg_cgcg_init +ffffffff82a13ab0 r kalindi_golden_registers +ffffffff82a13c20 r kalindi_golden_common_registers +ffffffff82a13c50 r kalindi_golden_spm_registers +ffffffff82a13c60 r godavari_golden_registers +ffffffff82a13de0 r spectre_mgcg_cgcg_init +ffffffff82a14200 r spectre_golden_registers +ffffffff82a14330 r spectre_golden_common_registers +ffffffff82a14360 r spectre_golden_spm_registers +ffffffff82a14370 r hawaii_mgcg_cgcg_init +ffffffff82a14880 r hawaii_golden_registers +ffffffff82a14a30 r hawaii_golden_common_registers +ffffffff82a14a6c r hawaii_golden_spm_registers +ffffffff82a14a80 r spectre_rlc_save_restore_register_list +ffffffff82a15170 r kalindi_rlc_save_restore_register_list +ffffffff82a15680 r ci_cs_data +ffffffff82a156a0 r ci_SECT_CONTEXT_defs +ffffffff82a15720 r ci_SECT_CONTEXT_def_1 +ffffffff82a15a70 r ci_SECT_CONTEXT_def_3 +ffffffff82a15a90 r ci_SECT_CONTEXT_def_4 +ffffffff82a15d04 r ci_SECT_CONTEXT_def_5 +ffffffff82a15d0c r ci_SECT_CONTEXT_def_6 +ffffffff82a15d10 r ci_SECT_CONTEXT_def_2 +ffffffff82a16160 r ci_SECT_CONTEXT_def_7 +ffffffff82a16510 r cik_default_state +ffffffff82a18000 r dce3_2_afmt_write_sad_regs.eld_reg_to_type +ffffffff82a19000 r dce6_afmt_write_sad_regs.eld_reg_to_type +ffffffff82a1a000 r ni_tx_offsets +ffffffff82a1a020 r evergreen_dp_offsets +ffffffff82a1a040 r evergreen_disp_int_status +ffffffff82a1a060 r evergreen_golden_registers +ffffffff82a1a260 r evergreen_golden_registers2 +ffffffff82a1a310 r cypress_mgcg_init +ffffffff82a1aa10 r juniper_mgcg_init +ffffffff82a1ae80 r redwood_mgcg_init +ffffffff82a1b1b0 r cedar_golden_registers +ffffffff82a1b390 r cedar_mgcg_init +ffffffff82a1b5f0 r wrestler_golden_registers +ffffffff82a1b840 r supersumo_golden_registers +ffffffff82a1bba0 r sumo_golden_registers +ffffffff82a1bbe0 r barts_golden_registers +ffffffff82a1be00 r turks_golden_registers +ffffffff82a1c040 r caicos_golden_registers +ffffffff82a1c280 r sumo_rlc_save_restore_register_list +ffffffff82a1c3d0 r evergreen_cs_data +ffffffff82a1c410 r SECT_CONTEXT_defs +ffffffff82a1c490 r SECT_CLEAR_defs +ffffffff82a1c4b0 r SECT_CTRLCONST_defs +ffffffff82a1c4d0 r SECT_CONTEXT_def_2 +ffffffff82a1c4f0 r SECT_CONTEXT_def_4 +ffffffff82a1c680 r SECT_CONTEXT_def_5 +ffffffff82a1c6a0 r SECT_CONTEXT_def_6 +ffffffff82a1c780 r SECT_CONTEXT_def_1 +ffffffff82a1cf20 r SECT_CONTEXT_def_3 +ffffffff82a1d000 r SECT_CONTEXT_def_7 +ffffffff82a1d488 r SECT_CLEAR_def_1 +ffffffff82a1d494 r SECT_CTRLCONST_def_1 +ffffffff82a1d4a0 r evergreen_default_state +ffffffff82a1e000 r cayman_reg_safe_bm +ffffffff82a20000 r evergreen_reg_safe_bm +ffffffff82a23000 r evergreen_hdmi_write_sad_regs.eld_reg_to_type +ffffffff82a24000 r didt_config_kv +ffffffff82a25000 r barts_io_mc_regs +ffffffff82a250f0 r turks_io_mc_regs +ffffffff82a251e0 r caicos_io_mc_regs +ffffffff82a252d0 r cayman_io_mc_regs +ffffffff82a253c0 r cayman_golden_registers +ffffffff82a25580 r cayman_golden_registers2 +ffffffff82a255d0 r dvst_golden_registers +ffffffff82a25860 r dvst_golden_registers2 +ffffffff82a25890 r scrapper_golden_registers +ffffffff82a25d70 r tn_rlc_save_restore_register_list +ffffffff82a25f60 r cayman_cs_data +ffffffff82a25fa0 r SECT_CONTEXT_defs +ffffffff82a26020 r SECT_CLEAR_defs +ffffffff82a26040 r SECT_CTRLCONST_defs +ffffffff82a26060 r SECT_CONTEXT_def_2 +ffffffff82a26080 r SECT_CONTEXT_def_4 +ffffffff82a26210 r SECT_CONTEXT_def_5 +ffffffff82a26230 r SECT_CONTEXT_def_1 +ffffffff82a269d0 r SECT_CONTEXT_def_3 +ffffffff82a26ab0 r SECT_CONTEXT_def_6 +ffffffff82a26b90 r SECT_CONTEXT_def_7 +ffffffff82a27018 r SECT_CLEAR_def_1 +ffffffff82a27024 r SECT_CTRLCONST_def_1 +ffffffff82a27030 r cayman_default_state +ffffffff82a28000 r cac_weights_cayman_xt +ffffffff82a28128 r cac_weights_cayman_pro +ffffffff82a28250 r cac_weights_cayman_le +ffffffff82a28380 r cayman_cgcg_cgls_default +ffffffff82a285c0 r cayman_mgcg_default +ffffffff82a28f20 r cayman_sysls_default +ffffffff82a28ff0 r cayman_cgcg_cgls_enable +ffffffff82a29240 r cayman_cgcg_cgls_disable +ffffffff82a294a0 r cayman_mgcg_enable +ffffffff82a29520 r cayman_mgcg_disable +ffffffff82a295a0 r cayman_sysls_enable +ffffffff82a29670 r cayman_sysls_disable +ffffffff82a2a000 r rn50_reg_safe_bm +ffffffff82a2a1a0 r r100_reg_safe_bm +ffffffff82a2b000 r r200_reg_safe_bm +ffffffff82a2c000 r r300_reg_safe_bm +ffffffff82a2d000 r r420_reg_safe_bm +ffffffff82a2f000 r color_formats_table +ffffffff82a2f480 r r600_reg_safe_bm +ffffffff82a32000 R r600_utc +ffffffff82a32040 R r600_dtc +ffffffff82a32080 r r600_encode_pci_lane_width.encoded_lanes +ffffffff82a34000 r r100_gfx_ring +ffffffff82a34070 r r300_gfx_ring +ffffffff82a340e0 r rv515_gfx_ring +ffffffff82a34150 r r600_gfx_ring +ffffffff82a341c0 r r600_dma_ring +ffffffff82a34230 r rv6xx_uvd_ring +ffffffff82a342a0 r rv770_uvd_ring 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r radeon_vga_connector_helper_funcs +ffffffff82a390a0 r radeon_dvi_connector_helper_funcs +ffffffff82a390f0 r radeon_tv_connector_helper_funcs +ffffffff82a39140 r radeon_lvds_connector_helper_funcs +ffffffff82a39190 r radeon_dp_connector_funcs +ffffffff82a39298 r radeon_lvds_bridge_connector_funcs +ffffffff82a39310 r radeon_vga_connector_funcs +ffffffff82a39388 r radeon_dvi_connector_funcs +ffffffff82a39400 r radeon_edp_connector_funcs +ffffffff82a39478 r radeon_tv_connector_funcs +ffffffff82a394f0 r radeon_lvds_connector_funcs +ffffffff82a3a000 r radeon_family_name +ffffffff82a3a3f0 r radeon_px_quirk_list +ffffffff82a3b000 r radeon_fb_funcs +ffffffff82a3b018 r radeon_mode_funcs +ffffffff82a3b060 r radeon_tmds_pll_enum_list +ffffffff82a3b080 r radeon_tv_std_enum_list +ffffffff82a3b100 r radeon_underscan_enum_list +ffffffff82a3b130 r radeon_audio_enum_list +ffffffff82a3b160 r radeon_dither_enum_list +ffffffff82a3b180 r radeon_output_csc_enum_list +ffffffff82a3b1c0 r radeon_crtc_funcs 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radeon_legacy_tv_dac_enc_funcs +ffffffff82a481d0 r radeon_legacy_tv_dac_helper_funcs +ffffffff82a48238 r radeon_legacy_tmds_ext_enc_funcs +ffffffff82a48258 r radeon_legacy_tmds_ext_helper_funcs +ffffffff82a49000 r SLOPE_value +ffffffff82a49030 r YCOEF_EN_value +ffffffff82a49060 r YCOEF_value +ffffffff82a49090 r available_tv_modes +ffffffff82a49110 r hor_timing_NTSC +ffffffff82a49150 r vert_timing_NTSC +ffffffff82a49190 r hor_timing_PAL +ffffffff82a491d0 r vert_timing_PAL +ffffffff82a4b000 r radeon_pm_state_type_name +ffffffff82a4c000 r radeon_evict_flags.placements +ffffffff82a4f000 r rs600_reg_safe_bm +ffffffff82a51000 r rv515_reg_safe_bm +ffffffff82a52000 r dll_speed_table +ffffffff82a53000 r r7xx_golden_registers +ffffffff82a53090 r r7xx_golden_dyn_gpr_registers +ffffffff82a53100 r rv770ce_golden_registers +ffffffff82a53160 r rv770_golden_registers +ffffffff82a531b0 r rv770_mgcg_init +ffffffff82a538f0 r rv730_golden_registers +ffffffff82a53950 r rv730_mgcg_init +ffffffff82a53ee0 r rv710_golden_registers +ffffffff82a53f30 r rv710_mgcg_init +ffffffff82a541d0 r rv740_golden_registers +ffffffff82a54360 r rv740_mgcg_init +ffffffff82a56000 r rv730_smc_int_vectors +ffffffff82a56040 r rv710_smc_int_vectors +ffffffff82a56080 r rv740_smc_int_vectors +ffffffff82a560c0 r cypress_smc_int_vectors +ffffffff82a56100 r caicos_smc_int_vectors +ffffffff82a56140 r cayman_smc_int_vectors +ffffffff82a57000 r tahiti_io_mc_regs +ffffffff82a57120 r pitcairn_io_mc_regs +ffffffff82a57240 r verde_io_mc_regs +ffffffff82a57360 r oland_io_mc_regs +ffffffff82a57480 r hainan_io_mc_regs +ffffffff82a575a0 r crtc_offsets +ffffffff82a575c0 r si_disp_int_status +ffffffff82a575e0 r tahiti_golden_registers +ffffffff82a57760 r tahiti_golden_rlc_registers +ffffffff82a577b0 r tahiti_mgcg_cgcg_init +ffffffff82a57d98 r tahiti_golden_registers2 +ffffffff82a57db0 r pitcairn_golden_registers +ffffffff82a57f00 r pitcairn_golden_rlc_registers +ffffffff82a57f40 r pitcairn_mgcg_cgcg_init +ffffffff82a583b0 r verde_golden_registers +ffffffff82a58620 r verde_golden_rlc_registers +ffffffff82a58660 r verde_mgcg_cgcg_init +ffffffff82a58ae0 r oland_golden_registers +ffffffff82a58c30 r oland_golden_rlc_registers +ffffffff82a58c70 r oland_mgcg_cgcg_init +ffffffff82a59000 r hainan_golden_registers +ffffffff82a5912c r hainan_golden_registers2 +ffffffff82a59140 r hainan_mgcg_cgcg_init +ffffffff82a594b0 r verde_rlc_save_restore_register_list +ffffffff82a59820 r si_cs_data +ffffffff82a59840 r si_SECT_CONTEXT_defs +ffffffff82a598c0 r si_SECT_CONTEXT_def_1 +ffffffff82a59c10 r si_SECT_CONTEXT_def_3 +ffffffff82a59c30 r si_SECT_CONTEXT_def_4 +ffffffff82a59ea4 r si_SECT_CONTEXT_def_5 +ffffffff82a59ea8 r si_SECT_CONTEXT_def_6 +ffffffff82a59eb0 r si_SECT_CONTEXT_def_2 +ffffffff82a5a2f0 r si_SECT_CONTEXT_def_7 +ffffffff82a5a6a0 r mc_cg_registers +ffffffff82a5a6d0 r si_default_state +ffffffff82a5b000 r cac_weights_tahiti +ffffffff82a5b4d0 r lcac_tahiti +ffffffff82a5bba0 r cac_override_tahiti +ffffffff82a5bbb4 r powertune_data_tahiti +ffffffff82a5bbf0 r dte_data_tahiti +ffffffff82a5bcc0 r dte_data_new_zealand +ffffffff82a5bd90 r dte_data_malta +ffffffff82a5be60 r lcac_pitcairn +ffffffff82a5c530 r cac_override_pitcairn +ffffffff82a5c544 r powertune_data_pitcairn +ffffffff82a5c580 r lcac_cape_verde +ffffffff82a5c9d0 r cac_override_cape_verde +ffffffff82a5c9e4 r powertune_data_cape_verde +ffffffff82a5ca20 r cac_weights_cape_verde_pro +ffffffff82a5cef0 r cac_weights_heathrow +ffffffff82a5d3c0 r cac_weights_chelsea_xt +ffffffff82a5d890 r cac_weights_chelsea_pro +ffffffff82a5dd60 r cac_weights_cape_verde +ffffffff82a5e230 r cac_weights_mars_pro +ffffffff82a5e700 r lcac_mars_pro +ffffffff82a5ea60 r cac_override_oland +ffffffff82a5ea74 r powertune_data_mars_pro +ffffffff82a5eab0 r cac_weights_mars_xt +ffffffff82a5ef80 r cac_weights_oland_pro +ffffffff82a5f450 r cac_weights_oland_xt +ffffffff82a5f920 r lcac_oland +ffffffff82a5fc7c r powertune_data_oland +ffffffff82a5fcb8 r dte_data_oland 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amdgpu_connector_dp_funcs +ffffffff82a6e1c0 r amdgpu_connector_add_common_modes.common_modes +ffffffff82a6e248 r amdgpu_connector_edp_funcs +ffffffff82a6e2c0 r amdgpu_connector_vga_funcs +ffffffff82a6e338 r amdgpu_connector_dvi_funcs +ffffffff82a6e3b0 r amdgpu_connector_lvds_funcs +ffffffff82a70000 R amdgpu_ctx_num_entities +ffffffff82a71000 r amdgpu_kms_driver +ffffffff82a710f0 r amdgpu_device_ip_reinit_late_sriov.ip_order +ffffffff82a72000 r hw_id_map +ffffffff82a72090 r hw_id_names +ffffffff82a73000 r hpd_names +ffffffff82a73030 r encoder_names +ffffffff82a73180 r dcc_retile_formats +ffffffff82a73270 r dcc_formats +ffffffff82a73360 R amdgpu_mode_funcs +ffffffff82a733b0 r amdgpu_underscan_enum_list +ffffffff82a733e0 r amdgpu_audio_enum_list +ffffffff82a73410 r amdgpu_dither_enum_list +ffffffff82a73430 r amdgpu_fb_funcs +ffffffff82a74000 R amdgpu_dmabuf_ops +ffffffff82a75000 R amdgpu_ioctls_kms +ffffffff82a75210 R amdgpu_ca +ffffffff82a75240 r pciidlist +ffffffff82a76110 r amdgpu_unsupported_pciidlist +ffffffff82a76690 r amdgpu_kms_driver +ffffffff82a77000 r amdgpu_job_fence_ops +ffffffff82a77038 r amdgpu_fence_ops +ffffffff82a78000 r amdgpu_gem_object_funcs +ffffffff82a78060 r amdgpu_gem_vm_ops +ffffffff82a7a000 R amdgpu_gtt_mgr_attr_group +ffffffff82a7a018 r amdgpu_gtt_mgr_func +ffffffff82a7b000 r amdgpu_atombios_i2c_algo +ffffffff82a7c000 R amdgpu_sched_ops +ffffffff82a7f000 r amdgpu_vram_names +ffffffff82a80000 r amdgpu_preempt_mgr_func +ffffffff82a81000 R psp_ip_funcs +ffffffff82a810a0 R psp_v3_1_ip_block +ffffffff82a810b8 R psp_v10_0_ip_block +ffffffff82a810d0 R psp_v11_0_ip_block +ffffffff82a810e8 R psp_v11_0_8_ip_block +ffffffff82a81100 R psp_v12_0_ip_block +ffffffff82a81118 R psp_v13_0_ip_block +ffffffff82a81130 R psp_v13_0_4_ip_block +ffffffff82a83000 r amdgpu_evict_flags.placements +ffffffff82a87000 R amdgpu_vkms_ip_block +ffffffff82a89000 R amdgpu_vm_cpu_funcs +ffffffff82a8b000 R amdgpu_vm_sdma_funcs +ffffffff82a8c000 R amdgpu_vram_mgr_attr_group +ffffffff82a8c018 r amdgpu_vram_mgr_func +ffffffff82a8d000 r xgmi_pcs_err_status_reg_arct +ffffffff82a8e000 r GC_BASE +ffffffff82a8e0c0 r HDP_BASE +ffffffff82a8e180 r MMHUB_BASE +ffffffff82a8e240 r ATHUB_BASE +ffffffff82a8e300 r NBIF0_BASE +ffffffff82a8e3c0 r MP0_BASE +ffffffff82a8e480 r MP1_BASE +ffffffff82a8e540 r UVD_BASE +ffffffff82a8e600 r DF_BASE +ffffffff82a8e6c0 r OSSSYS_BASE +ffffffff82a8e780 r SDMA0_BASE +ffffffff82a8e840 r SDMA1_BASE +ffffffff82a8e900 r SDMA2_BASE +ffffffff82a8e9c0 r SDMA3_BASE +ffffffff82a8ea80 r SDMA4_BASE +ffffffff82a8eb40 r SDMA5_BASE +ffffffff82a8ec00 r SDMA6_BASE +ffffffff82a8ecc0 r SDMA7_BASE +ffffffff82a8ed80 r SMUIO_BASE +ffffffff82a8ee40 r THM_BASE +ffffffff82a8ef00 r UMC_BASE +ffffffff82a8efc0 r RSMU_BASE +ffffffff82a90000 r cz_ih_ip_funcs +ffffffff82a900a0 R cz_ih_ip_block +ffffffff82a900b8 r cz_ih_funcs +ffffffff82a91000 r crtc_offsets +ffffffff82a91020 r dce_v10_0_ip_funcs +ffffffff82a910c0 R dce_v10_0_ip_block +ffffffff82a910d8 R dce_v10_1_ip_block +ffffffff82a910f0 r dce_v10_0_display_funcs +ffffffff82a91150 r hpd_offsets +ffffffff82a91168 r dce_v10_0_encoder_funcs +ffffffff82a91188 r dce_v10_0_dac_helper_funcs +ffffffff82a911f0 r dce_v10_0_dig_helper_funcs +ffffffff82a91258 r dce_v10_0_ext_helper_funcs +ffffffff82a912c0 r dce_v10_0_audio_write_sad_regs.eld_reg_to_type +ffffffff82a912f0 r dce_v10_0_crtc_irq_funcs +ffffffff82a91300 r dce_v10_0_pageflip_irq_funcs +ffffffff82a91310 r dce_v10_0_hpd_irq_funcs +ffffffff82a91320 r interrupt_status_offsets +ffffffff82a91380 r dce_v10_0_crtc_funcs +ffffffff82a91440 r dce_v10_0_crtc_helper_funcs +ffffffff82a914c0 r vga_control_regs +ffffffff82a914e0 r dig_offsets +ffffffff82a91500 r pin_offsets +ffffffff82a91520 r fiji_mgcg_cgcg_init +ffffffff82a91540 r golden_settings_fiji_a10 +ffffffff82a91570 r tonga_mgcg_cgcg_init +ffffffff82a91590 r golden_settings_tonga_a11 ffffffff82a92000 r crtc_offsets -ffffffff82a92020 r dce_v10_0_ip_funcs -ffffffff82a920c0 R dce_v10_0_ip_block -ffffffff82a920d8 R dce_v10_1_ip_block -ffffffff82a920f0 r dce_v10_0_display_funcs +ffffffff82a92020 r dce_v11_0_ip_funcs +ffffffff82a920c0 R dce_v11_0_ip_block +ffffffff82a920d8 R dce_v11_2_ip_block +ffffffff82a920f0 r dce_v11_0_display_funcs ffffffff82a92150 r hpd_offsets -ffffffff82a92168 r dce_v10_0_encoder_funcs -ffffffff82a92188 r dce_v10_0_dac_helper_funcs -ffffffff82a921f0 r dce_v10_0_dig_helper_funcs -ffffffff82a92258 r dce_v10_0_ext_helper_funcs -ffffffff82a922c0 r dce_v10_0_audio_write_sad_regs.eld_reg_to_type -ffffffff82a922f0 r dce_v10_0_crtc_irq_funcs -ffffffff82a92300 r dce_v10_0_pageflip_irq_funcs -ffffffff82a92310 r dce_v10_0_hpd_irq_funcs +ffffffff82a92168 r dce_v11_0_encoder_funcs +ffffffff82a92188 r dce_v11_0_dac_helper_funcs +ffffffff82a921f0 r dce_v11_0_dig_helper_funcs +ffffffff82a92258 r dce_v11_0_ext_helper_funcs +ffffffff82a922c0 r dce_v11_0_audio_write_sad_regs.eld_reg_to_type +ffffffff82a922f0 r dce_v11_0_crtc_irq_funcs +ffffffff82a92300 r dce_v11_0_pageflip_irq_funcs +ffffffff82a92310 r dce_v11_0_hpd_irq_funcs ffffffff82a92320 r interrupt_status_offsets -ffffffff82a92380 r dce_v10_0_crtc_funcs -ffffffff82a92440 r dce_v10_0_crtc_helper_funcs +ffffffff82a92380 r dce_v11_0_crtc_funcs +ffffffff82a92440 r dce_v11_0_crtc_helper_funcs ffffffff82a924c0 r vga_control_regs ffffffff82a924e0 r dig_offsets -ffffffff82a92500 r pin_offsets -ffffffff82a92520 r fiji_mgcg_cgcg_init -ffffffff82a92540 r golden_settings_fiji_a10 -ffffffff82a92570 r tonga_mgcg_cgcg_init -ffffffff82a92590 r golden_settings_tonga_a11 -ffffffff82a93000 r crtc_offsets -ffffffff82a93020 r dce_v11_0_ip_funcs -ffffffff82a930c0 R dce_v11_0_ip_block -ffffffff82a930d8 R dce_v11_2_ip_block -ffffffff82a930f0 r dce_v11_0_display_funcs -ffffffff82a93150 r hpd_offsets -ffffffff82a93168 r dce_v11_0_encoder_funcs -ffffffff82a93188 r dce_v11_0_dac_helper_funcs -ffffffff82a931f0 r dce_v11_0_dig_helper_funcs -ffffffff82a93258 r dce_v11_0_ext_helper_funcs -ffffffff82a932c0 r dce_v11_0_audio_write_sad_regs.eld_reg_to_type -ffffffff82a932f0 r dce_v11_0_crtc_irq_funcs -ffffffff82a93300 r dce_v11_0_pageflip_irq_funcs -ffffffff82a93310 r dce_v11_0_hpd_irq_funcs -ffffffff82a93320 r interrupt_status_offsets -ffffffff82a93380 r dce_v11_0_crtc_funcs -ffffffff82a93440 r dce_v11_0_crtc_helper_funcs -ffffffff82a934c0 r vga_control_regs -ffffffff82a934e0 r dig_offsets -ffffffff82a93510 r cz_mgcg_cgcg_init -ffffffff82a93530 r cz_golden_settings_a11 -ffffffff82a93550 r stoney_golden_settings_a11 -ffffffff82a93570 r polaris11_golden_settings_a11 -ffffffff82a935b0 r polaris10_golden_settings_a11 -ffffffff82a94000 R df_v1_7_funcs -ffffffff82a94070 r df_v1_7_channel_number -ffffffff82a95000 R df_v3_6_funcs -ffffffff82a95070 r df_v3_6_channel_number -ffffffff82a96000 r GC_BASE -ffffffff82a960a8 r HDP_BASE -ffffffff82a96150 r MMHUB_BASE -ffffffff82a961f8 r ATHUB_BASE -ffffffff82a962a0 r NBIO_BASE -ffffffff82a96348 r MP0_BASE -ffffffff82a963f0 r MP1_BASE -ffffffff82a96498 r VCN0_BASE -ffffffff82a96540 r DF_BASE -ffffffff82a965e8 r DCN_BASE -ffffffff82a96690 r OSSSYS_BASE -ffffffff82a96738 r SMUIO_BASE -ffffffff82a967e0 r THM_BASE -ffffffff82a97000 r gfx_v10_0_ip_funcs -ffffffff82a970a0 R gfx_v10_0_ip_block -ffffffff82a970b8 r gfx_v10_0_kiq_pm4_funcs -ffffffff82a970f8 r gfx_v10_0_ring_funcs_kiq -ffffffff82a97218 r gfx_v10_0_ring_funcs_gfx -ffffffff82a97338 r gfx_v10_0_ring_funcs_compute -ffffffff82a97458 r gfx_v10_0_eop_irq_funcs -ffffffff82a97468 r gfx_v10_0_kiq_irq_funcs -ffffffff82a97478 r gfx_v10_0_priv_reg_irq_funcs -ffffffff82a97488 r gfx_v10_0_priv_inst_irq_funcs -ffffffff82a97498 r gfx_v10_0_rlc_funcs -ffffffff82a97500 r gfx_v10_0_rlc_funcs_sriov -ffffffff82a97570 r gfx10_cs_data -ffffffff82a97590 r gfx10_SECT_CONTEXT_defs -ffffffff82a97620 r gfx10_SECT_CONTEXT_def_1 -ffffffff82a97980 r gfx10_SECT_CONTEXT_def_3 -ffffffff82a97990 r gfx10_SECT_CONTEXT_def_4 -ffffffff82a97c08 r gfx10_SECT_CONTEXT_def_5 -ffffffff82a97c10 r gfx10_SECT_CONTEXT_def_6 -ffffffff82a97c20 r gfx10_SECT_CONTEXT_def_2 -ffffffff82a98060 r gfx10_SECT_CONTEXT_def_7 -ffffffff82a98170 r gfx10_SECT_CONTEXT_def_8 -ffffffff82a984a0 r gfx_v10_0_gfx_funcs -ffffffff82a984e0 r golden_settings_gc_rlc_spm_10_0_nv10 -ffffffff82a9e780 r golden_settings_gc_rlc_spm_10_1_nv14 -ffffffff82aa21a0 r golden_settings_gc_rlc_spm_10_1_2_nv12 -ffffffff82aa8440 r golden_settings_gc_10_1 -ffffffff82aa8800 r golden_settings_gc_10_0_nv10 -ffffffff82aa8800 r golden_settings_gc_10_1_1 -ffffffff82aa8b90 r golden_settings_gc_10_1_2 -ffffffff82aa8b90 r golden_settings_gc_10_1_nv14 -ffffffff82aa8f80 r golden_settings_gc_10_1_2_nv12 -ffffffff82aa8f80 r golden_settings_gc_10_3 -ffffffff82aa9388 r golden_settings_gc_10_3_sienna_cichlid -ffffffff82aa9390 r golden_settings_gc_10_3_2 -ffffffff82aa9780 r golden_settings_gc_10_3_vangogh -ffffffff82aa99e0 r golden_settings_gc_10_3_3 -ffffffff82aa9bc0 r golden_settings_gc_10_3_4 -ffffffff82aa9f20 r golden_settings_gc_10_3_5 -ffffffff82aaa220 r golden_settings_gc_10_0_cyan_skillfish -ffffffff82aaa550 r golden_settings_gc_10_3_6 -ffffffff82aaa760 r golden_settings_gc_10_3_7 -ffffffff82aab000 r gfx_v11_0_ip_funcs -ffffffff82aab0a0 R gfx_v11_0_ip_block -ffffffff82aab0b8 r gfx_v11_0_kiq_pm4_funcs -ffffffff82aab0f8 r gfx_v11_0_ring_funcs_kiq -ffffffff82aab218 r gfx_v11_0_ring_funcs_gfx -ffffffff82aab338 r gfx_v11_0_ring_funcs_compute -ffffffff82aab458 r gfx_v11_0_eop_irq_funcs -ffffffff82aab468 r gfx_v11_0_priv_reg_irq_funcs -ffffffff82aab478 r gfx_v11_0_priv_inst_irq_funcs -ffffffff82aab488 r gfx_v11_0_rlc_funcs -ffffffff82aab4f0 r gfx11_cs_data -ffffffff82aab510 r gfx11_SECT_CONTEXT_defs -ffffffff82aab590 r gfx11_SECT_CONTEXT_def_1 -ffffffff82aab8f0 r gfx11_SECT_CONTEXT_def_3 -ffffffff82aab900 r gfx11_SECT_CONTEXT_def_5 -ffffffff82aab908 r gfx11_SECT_CONTEXT_def_6 -ffffffff82aab910 r gfx11_SECT_CONTEXT_def_2 -ffffffff82aabd50 r gfx11_SECT_CONTEXT_def_4 -ffffffff82aabfd0 r gfx11_SECT_CONTEXT_def_7 -ffffffff82aac438 r gfx_v11_0_gfx_funcs -ffffffff82aac480 r golden_settings_gc_11_0_1 -ffffffff82aad000 r gfx_v8_0_ip_funcs -ffffffff82aad0a0 R gfx_v8_0_ip_block -ffffffff82aad0b8 R gfx_v8_1_ip_block -ffffffff82aad0d0 r gfx_v8_0_gfx_funcs -ffffffff82aad110 r gfx_v8_0_ring_funcs_kiq -ffffffff82aad230 r gfx_v8_0_ring_funcs_gfx -ffffffff82aad350 r gfx_v8_0_ring_funcs_compute -ffffffff82aad470 r amdgpu_gds_reg_offset -ffffffff82aad570 r gfx_v8_0_eop_irq_funcs -ffffffff82aad580 r gfx_v8_0_priv_reg_irq_funcs -ffffffff82aad590 r gfx_v8_0_priv_inst_irq_funcs -ffffffff82aad5a0 r gfx_v8_0_cp_ecc_error_irq_funcs -ffffffff82aad5b0 r gfx_v8_0_sq_irq_funcs -ffffffff82aad5c0 r sq_edc_source_names -ffffffff82aad5f8 r iceland_rlc_funcs -ffffffff82aad660 r vi_cs_data -ffffffff82aad680 r vi_SECT_CONTEXT_defs -ffffffff82aad700 r vi_SECT_CONTEXT_def_1 -ffffffff82aada50 r vi_SECT_CONTEXT_def_3 -ffffffff82aada70 r vi_SECT_CONTEXT_def_4 -ffffffff82aadce4 r vi_SECT_CONTEXT_def_5 -ffffffff82aadcec r vi_SECT_CONTEXT_def_6 -ffffffff82aadcf0 r vi_SECT_CONTEXT_def_2 -ffffffff82aae140 r vi_SECT_CONTEXT_def_7 -ffffffff82aae4f0 r vgpr_init_compute_shader -ffffffff82aae600 r vgpr_init_regs -ffffffff82aae690 r sgpr1_init_regs -ffffffff82aae720 r sgpr2_init_regs -ffffffff82aae7b0 r sec_ded_counter_registers -ffffffff82aae820 r iceland_mgcg_cgcg_init -ffffffff82aaeb20 r golden_settings_iceland_a11 -ffffffff82aaebe0 r iceland_golden_common_all -ffffffff82aaec40 r fiji_mgcg_cgcg_init -ffffffff82aaedf0 r golden_settings_fiji_a10 -ffffffff82aaee80 r fiji_golden_common_all -ffffffff82aaef00 r tonga_mgcg_cgcg_init -ffffffff82aaf290 r golden_settings_tonga_a11 -ffffffff82aaf350 r tonga_golden_common_all -ffffffff82aaf3b0 r golden_settings_vegam_a11 -ffffffff82aaf480 r vegam_golden_common_all -ffffffff82aaf4d0 r golden_settings_polaris11_a11 -ffffffff82aaf5a0 r polaris11_golden_common_all -ffffffff82aaf5f0 r golden_settings_polaris10_a11 -ffffffff82aaf6c0 r polaris10_golden_common_all -ffffffff82aaf720 r cz_mgcg_cgcg_init -ffffffff82aafab0 r cz_golden_settings_a11 -ffffffff82aafb40 r cz_golden_common_all -ffffffff82aafba0 r stoney_mgcg_cgcg_init -ffffffff82aafbe0 r stoney_golden_settings_a11 -ffffffff82aafc60 r stoney_golden_common_all -ffffffff82ab0000 R gfx_v9_0_ras_ops -ffffffff82ab0040 r gfx_v9_0_ip_funcs -ffffffff82ab00e0 R gfx_v9_0_ip_block -ffffffff82ab0100 r ras_gfx_subblocks -ffffffff82ab0b80 r gfx_v9_0_edc_counter_regs -ffffffff82ab0f20 r gfx_v9_0_ras_fields -ffffffff82ab2000 r gfx_v9_0_kiq_pm4_funcs -ffffffff82ab2040 r gfx_v9_0_ring_funcs_kiq -ffffffff82ab2160 r gfx_v9_0_ring_funcs_gfx -ffffffff82ab2280 r gfx_v9_0_ring_funcs_compute -ffffffff82ab23a0 r gfx_v9_0_eop_irq_funcs -ffffffff82ab23b0 r gfx_v9_0_priv_reg_irq_funcs -ffffffff82ab23c0 r gfx_v9_0_priv_inst_irq_funcs -ffffffff82ab23d0 r gfx_v9_0_cp_ecc_error_irq_funcs -ffffffff82ab23e0 r gfx_v9_0_rlc_funcs -ffffffff82ab2450 r gfx9_cs_data -ffffffff82ab2470 r gfx9_SECT_CONTEXT_defs -ffffffff82ab2500 r gfx9_SECT_CONTEXT_def_1 -ffffffff82ab2850 r gfx9_SECT_CONTEXT_def_3 -ffffffff82ab2860 r gfx9_SECT_CONTEXT_def_4 -ffffffff82ab2ad4 r gfx9_SECT_CONTEXT_def_5 -ffffffff82ab2adc r gfx9_SECT_CONTEXT_def_6 -ffffffff82ab2ae0 r gfx9_SECT_CONTEXT_def_7 -ffffffff82ab2bf0 r gfx9_SECT_CONTEXT_def_2 -ffffffff82ab3060 r gfx9_SECT_CONTEXT_def_8 -ffffffff82ab32d0 r vgpr_init_compute_shader_arcturus -ffffffff82ab3b60 r vgpr_init_regs_arcturus -ffffffff82ab3cf0 r vgpr_init_regs -ffffffff82ab3e80 r sgpr1_init_regs -ffffffff82ab4010 r sgpr2_init_regs -ffffffff82ab4198 r gfx_v9_0_gfx_funcs -ffffffff82ab41e0 r golden_settings_gc_9_0 -ffffffff82ab43c0 r golden_settings_gc_9_0_vg10 -ffffffff82ab4570 r golden_settings_gc_9_2_1 -ffffffff82ab46f0 r golden_settings_gc_9_2_1_vg12 -ffffffff82ab4830 r golden_settings_gc_9_0_vg20 -ffffffff82ab4940 r golden_settings_gc_9_4_1_arct -ffffffff82ab4a50 r golden_settings_gc_9_1 -ffffffff82ab4c90 r golden_settings_gc_9_1_rv2 -ffffffff82ab4e60 r golden_settings_gc_9_1_rv1 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gfxhub_v2_0_funcs -ffffffff82abd060 r gfxhub_v2_0_vmhub_funcs +ffffffff82a92510 r cz_mgcg_cgcg_init +ffffffff82a92530 r cz_golden_settings_a11 +ffffffff82a92550 r stoney_golden_settings_a11 +ffffffff82a92570 r polaris11_golden_settings_a11 +ffffffff82a925b0 r polaris10_golden_settings_a11 +ffffffff82a93000 R df_v1_7_funcs +ffffffff82a93070 r df_v1_7_channel_number +ffffffff82a94000 R df_v3_6_funcs +ffffffff82a94070 r df_v3_6_channel_number +ffffffff82a95000 r GC_BASE +ffffffff82a950a8 r HDP_BASE +ffffffff82a95150 r MMHUB_BASE +ffffffff82a951f8 r ATHUB_BASE +ffffffff82a952a0 r NBIO_BASE +ffffffff82a95348 r MP0_BASE +ffffffff82a953f0 r MP1_BASE +ffffffff82a95498 r VCN0_BASE +ffffffff82a95540 r DF_BASE +ffffffff82a955e8 r DCN_BASE +ffffffff82a95690 r OSSSYS_BASE +ffffffff82a95738 r SMUIO_BASE +ffffffff82a957e0 r THM_BASE +ffffffff82a96000 r gfx_v10_0_ip_funcs +ffffffff82a960a0 R gfx_v10_0_ip_block +ffffffff82a960b8 r gfx_v10_0_kiq_pm4_funcs +ffffffff82a960f8 r gfx_v10_0_ring_funcs_kiq +ffffffff82a96218 r gfx_v10_0_ring_funcs_gfx +ffffffff82a96338 r gfx_v10_0_ring_funcs_compute +ffffffff82a96458 r gfx_v10_0_eop_irq_funcs +ffffffff82a96468 r gfx_v10_0_kiq_irq_funcs +ffffffff82a96478 r gfx_v10_0_priv_reg_irq_funcs +ffffffff82a96488 r gfx_v10_0_priv_inst_irq_funcs +ffffffff82a96498 r gfx_v10_0_rlc_funcs +ffffffff82a96500 r gfx_v10_0_rlc_funcs_sriov +ffffffff82a96570 r gfx10_cs_data +ffffffff82a96590 r gfx10_SECT_CONTEXT_defs +ffffffff82a96620 r gfx10_SECT_CONTEXT_def_1 +ffffffff82a96980 r gfx10_SECT_CONTEXT_def_3 +ffffffff82a96990 r gfx10_SECT_CONTEXT_def_4 +ffffffff82a96c08 r gfx10_SECT_CONTEXT_def_5 +ffffffff82a96c10 r gfx10_SECT_CONTEXT_def_6 +ffffffff82a96c20 r gfx10_SECT_CONTEXT_def_2 +ffffffff82a97060 r gfx10_SECT_CONTEXT_def_7 +ffffffff82a97170 r gfx10_SECT_CONTEXT_def_8 +ffffffff82a974a0 r gfx_v10_0_gfx_funcs +ffffffff82a974e0 r golden_settings_gc_rlc_spm_10_0_nv10 +ffffffff82a9d780 r golden_settings_gc_rlc_spm_10_1_nv14 +ffffffff82aa11a0 r golden_settings_gc_rlc_spm_10_1_2_nv12 +ffffffff82aa7440 r golden_settings_gc_10_1 +ffffffff82aa7800 r golden_settings_gc_10_0_nv10 +ffffffff82aa7800 r golden_settings_gc_10_1_1 +ffffffff82aa7b90 r golden_settings_gc_10_1_2 +ffffffff82aa7b90 r golden_settings_gc_10_1_nv14 +ffffffff82aa7f80 r golden_settings_gc_10_1_2_nv12 +ffffffff82aa7f80 r golden_settings_gc_10_3 +ffffffff82aa8388 r golden_settings_gc_10_3_sienna_cichlid +ffffffff82aa8390 r golden_settings_gc_10_3_2 +ffffffff82aa8780 r golden_settings_gc_10_3_vangogh +ffffffff82aa89e0 r golden_settings_gc_10_3_3 +ffffffff82aa8bc0 r golden_settings_gc_10_3_4 +ffffffff82aa8f20 r golden_settings_gc_10_3_5 +ffffffff82aa9220 r golden_settings_gc_10_0_cyan_skillfish +ffffffff82aa9550 r golden_settings_gc_10_3_6 +ffffffff82aa9760 r golden_settings_gc_10_3_7 +ffffffff82aaa000 r gfx_v11_0_ip_funcs +ffffffff82aaa0a0 R gfx_v11_0_ip_block +ffffffff82aaa0b8 r gfx_v11_0_kiq_pm4_funcs +ffffffff82aaa0f8 r gfx_v11_0_ring_funcs_kiq +ffffffff82aaa218 r gfx_v11_0_ring_funcs_gfx +ffffffff82aaa338 r gfx_v11_0_ring_funcs_compute +ffffffff82aaa458 r gfx_v11_0_eop_irq_funcs +ffffffff82aaa468 r gfx_v11_0_priv_reg_irq_funcs +ffffffff82aaa478 r gfx_v11_0_priv_inst_irq_funcs +ffffffff82aaa488 r gfx_v11_0_rlc_funcs +ffffffff82aaa4f0 r gfx11_cs_data +ffffffff82aaa510 r gfx11_SECT_CONTEXT_defs +ffffffff82aaa590 r gfx11_SECT_CONTEXT_def_1 +ffffffff82aaa8f0 r gfx11_SECT_CONTEXT_def_3 +ffffffff82aaa900 r gfx11_SECT_CONTEXT_def_5 +ffffffff82aaa908 r gfx11_SECT_CONTEXT_def_6 +ffffffff82aaa910 r gfx11_SECT_CONTEXT_def_2 +ffffffff82aaad50 r gfx11_SECT_CONTEXT_def_4 +ffffffff82aaafd0 r gfx11_SECT_CONTEXT_def_7 +ffffffff82aab438 r gfx_v11_0_gfx_funcs +ffffffff82aab480 r golden_settings_gc_11_0_1 +ffffffff82aac000 r gfx_v8_0_ip_funcs +ffffffff82aac0a0 R gfx_v8_0_ip_block +ffffffff82aac0b8 R gfx_v8_1_ip_block +ffffffff82aac0d0 r gfx_v8_0_gfx_funcs +ffffffff82aac110 r gfx_v8_0_ring_funcs_kiq +ffffffff82aac230 r gfx_v8_0_ring_funcs_gfx +ffffffff82aac350 r gfx_v8_0_ring_funcs_compute +ffffffff82aac470 r amdgpu_gds_reg_offset +ffffffff82aac570 r gfx_v8_0_eop_irq_funcs +ffffffff82aac580 r gfx_v8_0_priv_reg_irq_funcs +ffffffff82aac590 r gfx_v8_0_priv_inst_irq_funcs +ffffffff82aac5a0 r gfx_v8_0_cp_ecc_error_irq_funcs +ffffffff82aac5b0 r gfx_v8_0_sq_irq_funcs +ffffffff82aac5c0 r sq_edc_source_names +ffffffff82aac5f8 r iceland_rlc_funcs +ffffffff82aac660 r vi_cs_data +ffffffff82aac680 r vi_SECT_CONTEXT_defs +ffffffff82aac700 r vi_SECT_CONTEXT_def_1 +ffffffff82aaca50 r vi_SECT_CONTEXT_def_3 +ffffffff82aaca70 r vi_SECT_CONTEXT_def_4 +ffffffff82aacce4 r vi_SECT_CONTEXT_def_5 +ffffffff82aaccec r vi_SECT_CONTEXT_def_6 +ffffffff82aaccf0 r vi_SECT_CONTEXT_def_2 +ffffffff82aad140 r vi_SECT_CONTEXT_def_7 +ffffffff82aad4f0 r vgpr_init_compute_shader +ffffffff82aad600 r vgpr_init_regs +ffffffff82aad690 r sgpr1_init_regs +ffffffff82aad720 r sgpr2_init_regs +ffffffff82aad7b0 r sec_ded_counter_registers +ffffffff82aad820 r iceland_mgcg_cgcg_init +ffffffff82aadb20 r golden_settings_iceland_a11 +ffffffff82aadbe0 r iceland_golden_common_all +ffffffff82aadc40 r fiji_mgcg_cgcg_init +ffffffff82aaddf0 r golden_settings_fiji_a10 +ffffffff82aade80 r fiji_golden_common_all +ffffffff82aadf00 r tonga_mgcg_cgcg_init +ffffffff82aae290 r golden_settings_tonga_a11 +ffffffff82aae350 r tonga_golden_common_all +ffffffff82aae3b0 r golden_settings_vegam_a11 +ffffffff82aae480 r vegam_golden_common_all +ffffffff82aae4d0 r golden_settings_polaris11_a11 +ffffffff82aae5a0 r polaris11_golden_common_all +ffffffff82aae5f0 r golden_settings_polaris10_a11 +ffffffff82aae6c0 r polaris10_golden_common_all +ffffffff82aae720 r cz_mgcg_cgcg_init +ffffffff82aaeab0 r cz_golden_settings_a11 +ffffffff82aaeb40 r cz_golden_common_all +ffffffff82aaeba0 r stoney_mgcg_cgcg_init +ffffffff82aaebe0 r stoney_golden_settings_a11 +ffffffff82aaec60 r stoney_golden_common_all +ffffffff82aaf000 R gfx_v9_0_ras_ops +ffffffff82aaf040 r gfx_v9_0_ip_funcs +ffffffff82aaf0e0 R gfx_v9_0_ip_block +ffffffff82aaf100 r ras_gfx_subblocks +ffffffff82aafb80 r gfx_v9_0_edc_counter_regs +ffffffff82aaff20 r gfx_v9_0_ras_fields +ffffffff82ab1000 r gfx_v9_0_kiq_pm4_funcs +ffffffff82ab1040 r gfx_v9_0_ring_funcs_kiq +ffffffff82ab1160 r gfx_v9_0_ring_funcs_gfx +ffffffff82ab1280 r gfx_v9_0_ring_funcs_compute +ffffffff82ab13a0 r gfx_v9_0_eop_irq_funcs +ffffffff82ab13b0 r gfx_v9_0_priv_reg_irq_funcs +ffffffff82ab13c0 r gfx_v9_0_priv_inst_irq_funcs +ffffffff82ab13d0 r gfx_v9_0_cp_ecc_error_irq_funcs +ffffffff82ab13e0 r gfx_v9_0_rlc_funcs +ffffffff82ab1450 r gfx9_cs_data +ffffffff82ab1470 r gfx9_SECT_CONTEXT_defs +ffffffff82ab1500 r gfx9_SECT_CONTEXT_def_1 +ffffffff82ab1850 r gfx9_SECT_CONTEXT_def_3 +ffffffff82ab1860 r gfx9_SECT_CONTEXT_def_4 +ffffffff82ab1ad4 r gfx9_SECT_CONTEXT_def_5 +ffffffff82ab1adc r gfx9_SECT_CONTEXT_def_6 +ffffffff82ab1ae0 r gfx9_SECT_CONTEXT_def_7 +ffffffff82ab1bf0 r gfx9_SECT_CONTEXT_def_2 +ffffffff82ab2060 r gfx9_SECT_CONTEXT_def_8 +ffffffff82ab22d0 r vgpr_init_compute_shader_arcturus +ffffffff82ab2b60 r vgpr_init_regs_arcturus +ffffffff82ab2cf0 r vgpr_init_regs +ffffffff82ab2e80 r sgpr1_init_regs +ffffffff82ab3010 r sgpr2_init_regs +ffffffff82ab3198 r gfx_v9_0_gfx_funcs +ffffffff82ab31e0 r golden_settings_gc_9_0 +ffffffff82ab33c0 r golden_settings_gc_9_0_vg10 +ffffffff82ab3570 r golden_settings_gc_9_2_1 +ffffffff82ab36f0 r golden_settings_gc_9_2_1_vg12 +ffffffff82ab3830 r golden_settings_gc_9_0_vg20 +ffffffff82ab3940 r golden_settings_gc_9_4_1_arct +ffffffff82ab3a50 r golden_settings_gc_9_1 +ffffffff82ab3c90 r golden_settings_gc_9_1_rv2 +ffffffff82ab3e60 r golden_settings_gc_9_1_rv1 +ffffffff82ab3f10 r golden_settings_gc_9_1_rn +ffffffff82ab4030 r golden_settings_gc_9_x_common +ffffffff82ab5000 R gfx_v9_4_ras_ops +ffffffff82ab5040 r gfx_v9_4_edc_counter_regs +ffffffff82ab5420 r gfx_v9_4_ras_fields +ffffffff82ab7000 R vgpr_init_regs_aldebaran +ffffffff82ab71b0 R sgpr112_init_regs_aldebaran +ffffffff82ab7360 R sgpr96_init_regs_aldebaran +ffffffff82ab7510 R sgpr64_init_regs_aldebaran +ffffffff82ab76c0 r golden_settings_gc_9_4_2_alde +ffffffff82ab7720 r golden_settings_gc_9_4_2_alde_die_0 +ffffffff82ab77b0 r golden_settings_gc_9_4_2_alde_die_1 +ffffffff82ab7840 r sgpr112_init_compute_shader_aldebaran +ffffffff82ab7a60 r sgpr96_init_compute_shader_aldebaran +ffffffff82ab7c50 r sgpr64_init_compute_shader_aldebaran +ffffffff82ab7dc0 r vgpr_init_compute_shader_aldebaran +ffffffff82ab86a0 r gfx_v9_4_2_edc_counter_regs +ffffffff82ab8a20 r gfx_v9_4_2_ras_fields +ffffffff82aba3c0 r gfx_v9_4_2_utc_blocks +ffffffff82abb000 R gfxhub_v1_0_funcs +ffffffff82abc000 R gfxhub_v2_0_funcs +ffffffff82abc060 r gfxhub_v2_0_vmhub_funcs +ffffffff82abc070 r gfxhub_client_ids +ffffffff82abd000 R gfxhub_v2_1_funcs +ffffffff82abd060 r gfxhub_v2_1_vmhub_funcs ffffffff82abd070 r gfxhub_client_ids -ffffffff82abe000 R gfxhub_v2_1_funcs -ffffffff82abe060 r gfxhub_v2_1_vmhub_funcs +ffffffff82abe000 R gfxhub_v3_0_funcs +ffffffff82abe060 r gfxhub_v3_0_vmhub_funcs ffffffff82abe070 r gfxhub_client_ids -ffffffff82abf000 R gfxhub_v3_0_funcs -ffffffff82abf060 r gfxhub_v3_0_vmhub_funcs +ffffffff82abf000 R gfxhub_v3_0_3_funcs +ffffffff82abf060 r gfxhub_v3_0_3_vmhub_funcs ffffffff82abf070 r gfxhub_client_ids -ffffffff82ac0000 R gfxhub_v3_0_3_funcs -ffffffff82ac0060 r gfxhub_v3_0_3_vmhub_funcs -ffffffff82ac0070 r gfxhub_client_ids -ffffffff82ac1000 R gmc_v10_0_ip_funcs -ffffffff82ac10a0 R gmc_v10_0_ip_block -ffffffff82ac10b8 r gmc_v10_0_gmc_funcs -ffffffff82ac1100 r gmc_v10_0_irq_funcs -ffffffff82ac1110 r gmc_v10_0_ecc_funcs -ffffffff82ac2000 R gmc_v11_0_ip_funcs -ffffffff82ac20a0 R gmc_v11_0_ip_block -ffffffff82ac20b8 r gmc_v11_0_gmc_funcs -ffffffff82ac2100 r gmc_v11_0_irq_funcs -ffffffff82ac2110 r gmc_v11_0_ecc_funcs -ffffffff82ac3000 r gmc_v7_0_ip_funcs -ffffffff82ac30a0 R gmc_v7_0_ip_block -ffffffff82ac30b8 R gmc_v7_4_ip_block -ffffffff82ac30d0 r gmc_v7_0_gmc_funcs -ffffffff82ac3118 r gmc_v7_0_irq_funcs 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gmc_v9_0_ecc_funcs -ffffffff82ac5120 r gfxhub_client_ids -ffffffff82ac5190 r mmhub_client_ids_vega10 -ffffffff82ac5480 r mmhub_client_ids_vega12 -ffffffff82ac5780 r mmhub_client_ids_vega20 -ffffffff82ac5a70 r mmhub_client_ids_arcturus -ffffffff82ac7280 r mmhub_client_ids_raven -ffffffff82ac7440 r mmhub_client_ids_renoir -ffffffff82ac7630 r mmhub_client_ids_aldebaran -ffffffff82ac8e40 r ecc_umc_mcumc_ctrl_addrs -ffffffff82ac8ec0 r ecc_umc_mcumc_ctrl_mask_addrs -ffffffff82ac8f40 r golden_settings_mmhub_1_0_0 -ffffffff82ac8f70 r golden_settings_athub_1_0_0 -ffffffff82ac9000 R hdp_v4_0_funcs -ffffffff82aca000 R hdp_v5_0_funcs -ffffffff82acb000 R hdp_v5_2_funcs -ffffffff82acc000 R hdp_v6_0_funcs -ffffffff82acd000 r iceland_ih_ip_funcs -ffffffff82acd0a0 R iceland_ih_ip_block -ffffffff82acd0b8 r iceland_ih_funcs -ffffffff82ace000 r ih_v6_0_ip_funcs -ffffffff82ace0a0 R ih_v6_0_ip_block -ffffffff82ace0b8 r ih_v6_0_funcs -ffffffff82ace0d8 r ih_v6_0_self_irq_funcs -ffffffff82acf000 R gfx_v11_0_imu_funcs -ffffffff82acf030 r imu_rlc_ram_golden_11 -ffffffff82acf680 r imu_rlc_ram_golden_11_0_2 -ffffffff82ad0000 r imu_rlc_ram_golden_11_0_3 -ffffffff82ad1000 r jpeg_v1_0_decode_ring_vm_funcs -ffffffff82ad1120 r jpeg_v1_0_irq_funcs -ffffffff82ad2000 r jpeg_v2_0_ip_funcs -ffffffff82ad20a0 R jpeg_v2_0_ip_block -ffffffff82ad20b8 r jpeg_v2_0_dec_ring_vm_funcs -ffffffff82ad21d8 r jpeg_v2_0_irq_funcs -ffffffff82ad3000 r jpeg_v2_5_ip_funcs -ffffffff82ad30a0 R jpeg_v2_5_ip_block -ffffffff82ad30b8 r jpeg_v2_6_ip_funcs -ffffffff82ad3158 R jpeg_v2_6_ip_block -ffffffff82ad3170 R jpeg_v2_6_ras_hw_ops -ffffffff82ad31b0 r jpeg_v2_5_dec_ring_vm_funcs -ffffffff82ad32d0 r jpeg_v2_6_dec_ring_vm_funcs -ffffffff82ad33f0 r jpeg_v2_5_irq_funcs -ffffffff82ad4000 r jpeg_v3_0_ip_funcs -ffffffff82ad40a0 R jpeg_v3_0_ip_block -ffffffff82ad40b8 r jpeg_v3_0_dec_ring_vm_funcs -ffffffff82ad41d8 r jpeg_v3_0_irq_funcs -ffffffff82ad5000 r jpeg_v4_0_ip_funcs -ffffffff82ad50a0 R jpeg_v4_0_ip_block -ffffffff82ad50b8 r jpeg_v4_0_dec_ring_vm_funcs -ffffffff82ad51d8 r jpeg_v4_0_irq_funcs -ffffffff82ad6000 R lsdma_v6_0_funcs -ffffffff82ad7000 R mca_v3_0_mp0_hw_ops -ffffffff82ad7040 R mca_v3_0_mp1_hw_ops -ffffffff82ad7080 R mca_v3_0_mpio_hw_ops -ffffffff82ad70c0 R mca_v3_0_funcs -ffffffff82ad8000 r mes_v10_1_ip_funcs -ffffffff82ad80a0 R mes_v10_1_ip_block -ffffffff82ad80b8 r mes_v10_1_funcs -ffffffff82ad80e8 r mes_v10_1_ring_funcs -ffffffff82ad9000 r mes_v11_0_ip_funcs -ffffffff82ad90a0 R mes_v11_0_ip_block -ffffffff82ad90b8 r mes_v11_0_funcs -ffffffff82ad90e8 r mes_v11_0_ring_funcs -ffffffff82ada000 R mmhub_v1_0_funcs -ffffffff82ada050 r mmhub_v1_0_edc_cnt_regs -ffffffff82ada0c0 r mmhub_v1_0_ras_fields -ffffffff82adb000 R mmhub_v1_7_funcs -ffffffff82adb050 r mmhub_v1_7_edc_cnt_regs -ffffffff82adb250 r mmhub_v1_7_ras_fields -ffffffff82adc9c0 r mmhub_v1_7_ea_err_status_regs -ffffffff82add000 R mmhub_v2_0_funcs -ffffffff82add050 r mmhub_v2_0_vmhub_funcs -ffffffff82add060 r mmhub_client_ids_navi1x -ffffffff82add190 r mmhub_client_ids_sienna_cichlid -ffffffff82add450 r mmhub_client_ids_beige_goby -ffffffff82ade000 R mmhub_v2_3_funcs -ffffffff82ade050 r mmhub_v2_3_vmhub_funcs -ffffffff82ade060 r mmhub_client_ids_vangogh -ffffffff82adf000 R mmhub_v3_0_funcs -ffffffff82adf050 r mmhub_v3_0_vmhub_funcs -ffffffff82adf060 r mmhub_client_ids_v3_0_0 -ffffffff82ae0000 R mmhub_v3_0_1_funcs -ffffffff82ae0050 r mmhub_v3_0_1_vmhub_funcs -ffffffff82ae0060 r mmhub_client_ids_v3_0_1 -ffffffff82ae1000 R mmhub_v3_0_2_funcs -ffffffff82ae1050 r mmhub_v3_0_2_vmhub_funcs -ffffffff82ae1060 r mmhub_client_ids_v3_0_2 -ffffffff82ae2000 R mmhub_v9_4_ras_hw_ops -ffffffff82ae2040 R mmhub_v9_4_funcs -ffffffff82ae2090 r mmhub_v9_4_edc_cnt_regs -ffffffff82ae2330 r mmhub_v9_4_ras_fields -ffffffff82ae43b0 r mmhub_v9_4_err_status_regs -ffffffff82ae5000 r xgpu_ai_mailbox_ack_irq_funcs -ffffffff82ae5010 r xgpu_ai_mailbox_rcv_irq_funcs -ffffffff82ae5020 R xgpu_ai_virt_ops -ffffffff82ae6000 r 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mmhub_client_ids_vega10 +ffffffff82ac4480 r mmhub_client_ids_vega12 +ffffffff82ac4780 r mmhub_client_ids_vega20 +ffffffff82ac4a70 r mmhub_client_ids_arcturus +ffffffff82ac6280 r mmhub_client_ids_raven +ffffffff82ac6440 r mmhub_client_ids_renoir +ffffffff82ac6630 r mmhub_client_ids_aldebaran +ffffffff82ac7e40 r ecc_umc_mcumc_ctrl_addrs +ffffffff82ac7ec0 r ecc_umc_mcumc_ctrl_mask_addrs +ffffffff82ac7f40 r golden_settings_mmhub_1_0_0 +ffffffff82ac7f70 r golden_settings_athub_1_0_0 +ffffffff82ac8000 R hdp_v4_0_funcs +ffffffff82ac9000 R hdp_v5_0_funcs +ffffffff82aca000 R hdp_v5_2_funcs +ffffffff82acb000 R hdp_v6_0_funcs +ffffffff82acc000 r iceland_ih_ip_funcs +ffffffff82acc0a0 R iceland_ih_ip_block +ffffffff82acc0b8 r iceland_ih_funcs +ffffffff82acd000 r ih_v6_0_ip_funcs +ffffffff82acd0a0 R ih_v6_0_ip_block +ffffffff82acd0b8 r ih_v6_0_funcs +ffffffff82acd0d8 r ih_v6_0_self_irq_funcs +ffffffff82ace000 R gfx_v11_0_imu_funcs +ffffffff82ace030 r imu_rlc_ram_golden_11 +ffffffff82ace680 r imu_rlc_ram_golden_11_0_2 +ffffffff82acf000 r imu_rlc_ram_golden_11_0_3 +ffffffff82ad0000 r jpeg_v1_0_decode_ring_vm_funcs +ffffffff82ad0120 r jpeg_v1_0_irq_funcs +ffffffff82ad1000 r jpeg_v2_0_ip_funcs +ffffffff82ad10a0 R jpeg_v2_0_ip_block +ffffffff82ad10b8 r jpeg_v2_0_dec_ring_vm_funcs +ffffffff82ad11d8 r jpeg_v2_0_irq_funcs +ffffffff82ad2000 r jpeg_v2_5_ip_funcs +ffffffff82ad20a0 R jpeg_v2_5_ip_block +ffffffff82ad20b8 r jpeg_v2_6_ip_funcs +ffffffff82ad2158 R jpeg_v2_6_ip_block +ffffffff82ad2170 R jpeg_v2_6_ras_hw_ops +ffffffff82ad21b0 r jpeg_v2_5_dec_ring_vm_funcs +ffffffff82ad22d0 r jpeg_v2_6_dec_ring_vm_funcs +ffffffff82ad23f0 r jpeg_v2_5_irq_funcs +ffffffff82ad3000 r jpeg_v3_0_ip_funcs +ffffffff82ad30a0 R jpeg_v3_0_ip_block +ffffffff82ad30b8 r jpeg_v3_0_dec_ring_vm_funcs +ffffffff82ad31d8 r jpeg_v3_0_irq_funcs +ffffffff82ad4000 r jpeg_v4_0_ip_funcs +ffffffff82ad40a0 R jpeg_v4_0_ip_block +ffffffff82ad40b8 r jpeg_v4_0_dec_ring_vm_funcs +ffffffff82ad41d8 r jpeg_v4_0_irq_funcs +ffffffff82ad5000 R lsdma_v6_0_funcs +ffffffff82ad6000 R mca_v3_0_mp0_hw_ops +ffffffff82ad6040 R mca_v3_0_mp1_hw_ops +ffffffff82ad6080 R mca_v3_0_mpio_hw_ops +ffffffff82ad60c0 R mca_v3_0_funcs +ffffffff82ad7000 r mes_v10_1_ip_funcs +ffffffff82ad70a0 R mes_v10_1_ip_block +ffffffff82ad70b8 r mes_v10_1_funcs +ffffffff82ad70e8 r mes_v10_1_ring_funcs +ffffffff82ad8000 r mes_v11_0_ip_funcs +ffffffff82ad80a0 R mes_v11_0_ip_block +ffffffff82ad80b8 r mes_v11_0_funcs +ffffffff82ad80e8 r mes_v11_0_ring_funcs +ffffffff82ad9000 R mmhub_v1_0_funcs +ffffffff82ad9050 r mmhub_v1_0_edc_cnt_regs +ffffffff82ad90c0 r mmhub_v1_0_ras_fields +ffffffff82ada000 R mmhub_v1_7_funcs +ffffffff82ada050 r mmhub_v1_7_edc_cnt_regs +ffffffff82ada250 r mmhub_v1_7_ras_fields +ffffffff82adb9c0 r mmhub_v1_7_ea_err_status_regs +ffffffff82adc000 R mmhub_v2_0_funcs +ffffffff82adc050 r mmhub_v2_0_vmhub_funcs +ffffffff82adc060 r mmhub_client_ids_navi1x +ffffffff82adc190 r mmhub_client_ids_sienna_cichlid +ffffffff82adc450 r mmhub_client_ids_beige_goby +ffffffff82add000 R mmhub_v2_3_funcs +ffffffff82add050 r mmhub_v2_3_vmhub_funcs +ffffffff82add060 r mmhub_client_ids_vangogh +ffffffff82ade000 R mmhub_v3_0_funcs +ffffffff82ade050 r mmhub_v3_0_vmhub_funcs +ffffffff82ade060 r mmhub_client_ids_v3_0_0 +ffffffff82adf000 R mmhub_v3_0_1_funcs +ffffffff82adf050 r mmhub_v3_0_1_vmhub_funcs +ffffffff82adf060 r mmhub_client_ids_v3_0_1 +ffffffff82ae0000 R mmhub_v3_0_2_funcs +ffffffff82ae0050 r mmhub_v3_0_2_vmhub_funcs +ffffffff82ae0060 r mmhub_client_ids_v3_0_2 +ffffffff82ae1000 R mmhub_v9_4_ras_hw_ops +ffffffff82ae1040 R mmhub_v9_4_funcs +ffffffff82ae1090 r mmhub_v9_4_edc_cnt_regs +ffffffff82ae1330 r mmhub_v9_4_ras_fields +ffffffff82ae33b0 r mmhub_v9_4_err_status_regs +ffffffff82ae4000 r xgpu_ai_mailbox_ack_irq_funcs +ffffffff82ae4010 r xgpu_ai_mailbox_rcv_irq_funcs +ffffffff82ae4020 R xgpu_ai_virt_ops +ffffffff82ae5000 r xgpu_nv_mailbox_ack_irq_funcs +ffffffff82ae5010 r xgpu_nv_mailbox_rcv_irq_funcs +ffffffff82ae5020 R xgpu_nv_virt_ops +ffffffff82ae6000 r xgpu_fiji_mgcg_cgcg_init +ffffffff82ae6240 r xgpu_fiji_golden_settings_a10 +ffffffff82ae6370 r xgpu_fiji_golden_common_all +ffffffff82ae63f0 r xgpu_tonga_mgcg_cgcg_init +ffffffff82ae6810 r xgpu_tonga_golden_settings_a11 +ffffffff82ae69d0 r xgpu_tonga_golden_common_all +ffffffff82ae6a28 r xgpu_vi_mailbox_ack_irq_funcs +ffffffff82ae6a38 r xgpu_vi_mailbox_rcv_irq_funcs +ffffffff82ae6a48 R xgpu_vi_virt_ops +ffffffff82ae7000 r navi10_ih_ip_funcs +ffffffff82ae70a0 R navi10_ih_ip_block +ffffffff82ae70b8 r navi10_ih_funcs +ffffffff82ae70d8 r navi10_ih_self_irq_funcs +ffffffff82ae8000 R nbio_v2_3_hdp_flush_reg +ffffffff82ae8048 R nbio_v2_3_funcs +ffffffff82ae9000 R nbio_v4_3_hdp_flush_reg +ffffffff82ae9048 R nbio_v4_3_funcs +ffffffff82ae9130 R nbio_v4_3_sriov_funcs +ffffffff82aea000 R nbio_v6_1_hdp_flush_reg +ffffffff82aea048 R nbio_v6_1_funcs +ffffffff82aeb000 R nbio_v7_0_hdp_flush_reg +ffffffff82aeb048 R nbio_v7_0_funcs +ffffffff82aec000 R nbio_v7_2_hdp_flush_reg +ffffffff82aec048 R nbio_v7_2_funcs +ffffffff82aed000 R nbio_v7_4_hdp_flush_reg +ffffffff82aed048 R nbio_v7_4_ras_hw_ops +ffffffff82aed088 R nbio_v7_4_funcs +ffffffff82aed170 r nbio_v7_4_ras_controller_irq_funcs +ffffffff82aed180 r nbio_v7_4_ras_err_event_athub_irq_funcs +ffffffff82aee000 R nbio_v7_7_hdp_flush_reg +ffffffff82aee048 R nbio_v7_7_funcs +ffffffff82aef000 r nv_common_ip_funcs +ffffffff82aef0a0 R nv_common_ip_block +ffffffff82aef0b8 r nv_asic_funcs +ffffffff82aef170 r nv_allowed_read_registers +ffffffff82aef2f0 r nv_video_codecs_encode +ffffffff82aef300 r sc_video_codecs_decode +ffffffff82aef310 r yc_video_codecs_decode +ffffffff82aef320 r bg_video_codecs_encode +ffffffff82aef330 r bg_video_codecs_decode +ffffffff82aef340 r nv_video_codecs_decode +ffffffff82aef350 r nv_video_codecs_encode_array +ffffffff82aef380 r sc_video_codecs_decode_array +ffffffff82aef420 r yc_video_codecs_decode_array +ffffffff82aef490 r bg_video_codecs_decode_array +ffffffff82aef4d0 r nv_video_codecs_decode_array +ffffffff82af0000 r psp_v10_0_funcs +ffffffff82af1000 r psp_v11_0_funcs +ffffffff82af2000 r psp_v11_0_8_funcs +ffffffff82af3000 r psp_v12_0_funcs +ffffffff82af4000 r psp_v13_0_funcs +ffffffff82af5000 r psp_v13_0_4_funcs +ffffffff82af6000 r psp_v3_1_funcs +ffffffff82af7000 r sdma_v2_4_ip_funcs +ffffffff82af70a0 R sdma_v2_4_ip_block +ffffffff82af70b8 r sdma_v2_4_ring_funcs +ffffffff82af71d8 r sdma_v2_4_buffer_funcs +ffffffff82af71f8 r sdma_v2_4_vm_pte_funcs +ffffffff82af7218 r sdma_v2_4_trap_irq_funcs +ffffffff82af7228 r sdma_v2_4_illegal_inst_irq_funcs +ffffffff82af7240 r iceland_mgcg_cgcg_init +ffffffff82af7260 r golden_settings_iceland_a11 +ffffffff82af8000 r sdma_v3_0_ip_funcs +ffffffff82af80a0 R sdma_v3_0_ip_block +ffffffff82af80b8 R sdma_v3_1_ip_block +ffffffff82af80d0 r sdma_v3_0_ring_funcs +ffffffff82af81f0 r sdma_v3_0_buffer_funcs +ffffffff82af8210 r sdma_v3_0_vm_pte_funcs +ffffffff82af8230 r sdma_v3_0_trap_irq_funcs +ffffffff82af8240 r sdma_v3_0_illegal_inst_irq_funcs +ffffffff82af8250 r fiji_mgcg_cgcg_init +ffffffff82af8270 r golden_settings_fiji_a10 +ffffffff82af82d0 r tonga_mgcg_cgcg_init +ffffffff82af82f0 r golden_settings_tonga_a11 +ffffffff82af8370 r golden_settings_polaris11_a11 +ffffffff82af83f0 r golden_settings_polaris10_a11 +ffffffff82af8470 r cz_mgcg_cgcg_init +ffffffff82af8490 r cz_golden_settings_a11 +ffffffff82af8520 r stoney_mgcg_cgcg_init +ffffffff82af8530 r stoney_golden_settings_a11 +ffffffff82af9000 R sdma_v4_0_ip_funcs +ffffffff82af90a0 R sdma_v4_0_ras_hw_ops +ffffffff82af90e0 R sdma_v4_0_ip_block +ffffffff82af90f8 r sdma_v4_0_ring_funcs_2nd_mmhub +ffffffff82af9218 r sdma_v4_0_ring_funcs +ffffffff82af9338 r sdma_v4_0_page_ring_funcs_2nd_mmhub +ffffffff82af9458 r sdma_v4_0_page_ring_funcs +ffffffff82af9578 r sdma_v4_0_buffer_funcs +ffffffff82af9598 r sdma_v4_0_vm_pte_funcs +ffffffff82af95b8 r sdma_v4_0_trap_irq_funcs +ffffffff82af95c8 r sdma_v4_0_illegal_inst_irq_funcs +ffffffff82af95d8 r sdma_v4_0_ecc_irq_funcs +ffffffff82af95e8 r sdma_v4_0_vm_hole_irq_funcs +ffffffff82af95f8 r sdma_v4_0_doorbell_invalid_irq_funcs +ffffffff82af9608 r sdma_v4_0_pool_timeout_irq_funcs +ffffffff82af9618 r sdma_v4_0_srbm_write_irq_funcs +ffffffff82af9630 r golden_settings_sdma_4 +ffffffff82af9890 r golden_settings_sdma_vg10 +ffffffff82af9940 r golden_settings_sdma_vg12 +ffffffff82af99f0 r golden_settings_sdma0_4_2_init +ffffffff82af9a10 r golden_settings_sdma0_4_2 +ffffffff82af9ca0 r golden_settings_sdma1_4_2 +ffffffff82af9f30 r golden_settings_sdma_arct +ffffffff82afa230 r golden_settings_sdma_aldebaran +ffffffff82afa3a0 r golden_settings_sdma_4_1 +ffffffff82afa4b0 r golden_settings_sdma_rv2 +ffffffff82afa4e0 r golden_settings_sdma_rv1 +ffffffff82afa510 r golden_settings_sdma_4_3 +ffffffff82afa600 r sdma_v4_0_ras_fields +ffffffff82afb000 R sdma_v4_4_ras_hw_ops +ffffffff82afb040 r sdma_v4_4_ras_fields +ffffffff82afc000 R sdma_v5_0_ip_funcs +ffffffff82afc0a0 R sdma_v5_0_ip_block +ffffffff82afc0b8 r sdma_v5_0_ring_funcs +ffffffff82afc1d8 r sdma_v5_0_buffer_funcs +ffffffff82afc1f8 r sdma_v5_0_vm_pte_funcs +ffffffff82afc218 r sdma_v5_0_trap_irq_funcs +ffffffff82afc228 r sdma_v5_0_illegal_inst_irq_funcs +ffffffff82afc240 r golden_settings_sdma_5 +ffffffff82afc480 r golden_settings_sdma_nv10 +ffffffff82afc4b0 r golden_settings_sdma_nv14 +ffffffff82afc4e0 r golden_settings_sdma_5_sriov +ffffffff82afc6c0 r golden_settings_sdma_nv12 +ffffffff82afc750 r golden_settings_sdma_cyan_skillfish +ffffffff82afd000 R sdma_v5_2_ip_funcs +ffffffff82afd0a0 R sdma_v5_2_ip_block +ffffffff82afd0b8 r sdma_v5_2_ring_funcs +ffffffff82afd1d8 r sdma_v5_2_buffer_funcs +ffffffff82afd1f8 r sdma_v5_2_vm_pte_funcs +ffffffff82afd218 r sdma_v5_2_trap_irq_funcs +ffffffff82afd228 r sdma_v5_2_illegal_inst_irq_funcs +ffffffff82afe000 R sdma_v6_0_ip_funcs +ffffffff82afe0a0 R sdma_v6_0_ip_block +ffffffff82afe0b8 r sdma_v6_0_ring_funcs +ffffffff82afe1d8 r sdma_v6_0_buffer_funcs +ffffffff82afe1f8 r sdma_v6_0_vm_pte_funcs +ffffffff82afe218 r sdma_v6_0_trap_irq_funcs +ffffffff82afe228 r sdma_v6_0_illegal_inst_irq_funcs +ffffffff82aff000 r smu_v11_0_i2c_algo +ffffffff82aff010 r smu_v11_0_i2c_i2c_lock_ops +ffffffff82aff028 r smu_v11_0_i2c_control_quirks +ffffffff82b00000 R smuio_v11_0_funcs +ffffffff82b01000 R smuio_v11_0_6_funcs +ffffffff82b02000 R smuio_v13_0_funcs +ffffffff82b03000 R smuio_v13_0_6_funcs +ffffffff82b04000 R smuio_v9_0_funcs +ffffffff82b05000 r soc15_common_ip_funcs +ffffffff82b050a0 R vega10_common_ip_block +ffffffff82b050b8 r soc15_asic_funcs +ffffffff82b05170 r vega20_asic_funcs +ffffffff82b05230 r soc15_allowed_read_registers +ffffffff82b053c0 r vega_video_codecs_encode +ffffffff82b053d0 r vega_video_codecs_decode +ffffffff82b053e0 r rv_video_codecs_decode +ffffffff82b053f0 r rn_video_codecs_decode +ffffffff82b05400 r vega_video_codecs_encode_array +ffffffff82b05430 r vega_video_codecs_decode_array +ffffffff82b054b0 r rv_video_codecs_decode_array +ffffffff82b05540 r rn_video_codecs_decode_array +ffffffff82b06000 r soc21_common_ip_funcs +ffffffff82b060a0 R soc21_common_ip_block +ffffffff82b060b8 r soc21_asic_funcs +ffffffff82b06170 r soc21_allowed_read_registers +ffffffff82b062f0 r vcn_4_0_0_video_codecs_encode_vcn1 +ffffffff82b06300 r vcn_4_0_0_video_codecs_decode_vcn1 +ffffffff82b06310 r vcn_4_0_0_video_codecs_encode_vcn0 +ffffffff82b06320 r vcn_4_0_0_video_codecs_decode_vcn0 +ffffffff82b06330 r vcn_4_0_0_video_codecs_encode_array_vcn1 +ffffffff82b06360 r vcn_4_0_0_video_codecs_decode_array_vcn1 +ffffffff82b063b0 r vcn_4_0_0_video_codecs_encode_array_vcn0 +ffffffff82b063e0 r vcn_4_0_0_video_codecs_decode_array_vcn0 +ffffffff82b07000 r tonga_ih_ip_funcs +ffffffff82b070a0 R tonga_ih_ip_block +ffffffff82b070b8 r tonga_ih_funcs +ffffffff82b08000 R umc_v6_0_funcs +ffffffff82b09000 R umc_v6_1_channel_idx_tbl +ffffffff82b09080 R umc_v6_1_ras_hw_ops +ffffffff82b0a000 R umc_v6_7_channel_idx_tbl_second +ffffffff82b0a080 R umc_v6_7_channel_idx_tbl_first +ffffffff82b0a100 R umc_v6_7_ras_hw_ops +ffffffff82b0b000 R umc_v8_10_channelnum_map_colbit_table +ffffffff82b0b040 R umc_v8_10_channel_idx_tbl +ffffffff82b0b0a0 R umc_v8_10_ras_hw_ops +ffffffff82b0c000 R umc_v8_7_channel_idx_tbl +ffffffff82b0c040 R umc_v8_7_ras_hw_ops +ffffffff82b0d000 r uvd_v5_0_ip_funcs +ffffffff82b0d0a0 R uvd_v5_0_ip_block +ffffffff82b0d0b8 r uvd_v5_0_ring_funcs +ffffffff82b0d1d8 r uvd_v5_0_irq_funcs +ffffffff82b0e000 r uvd_v6_0_ip_funcs +ffffffff82b0e0a0 R uvd_v6_0_ip_block +ffffffff82b0e0b8 R uvd_v6_2_ip_block +ffffffff82b0e0d0 R uvd_v6_3_ip_block +ffffffff82b0e0e8 r uvd_v6_0_ring_vm_funcs +ffffffff82b0e208 r uvd_v6_0_ring_phys_funcs +ffffffff82b0e328 r uvd_v6_0_enc_ring_vm_funcs +ffffffff82b0e448 r uvd_v6_0_irq_funcs +ffffffff82b0f000 R uvd_v7_0_ip_funcs +ffffffff82b0f0a0 R uvd_v7_0_ip_block +ffffffff82b0f0b8 r uvd_v7_0_ring_vm_funcs +ffffffff82b0f1d8 r uvd_v7_0_enc_ring_vm_funcs +ffffffff82b0f2f8 r uvd_v7_0_irq_funcs +ffffffff82b10000 r vce_v3_0_ip_funcs +ffffffff82b100a0 R vce_v3_0_ip_block +ffffffff82b100b8 R vce_v3_1_ip_block +ffffffff82b100d0 R vce_v3_4_ip_block +ffffffff82b100e8 r vce_v3_0_ring_vm_funcs +ffffffff82b10208 r vce_v3_0_ring_phys_funcs +ffffffff82b10328 r vce_v3_0_irq_funcs +ffffffff82b11000 R vce_v4_0_ip_funcs +ffffffff82b110a0 R vce_v4_0_ip_block +ffffffff82b110b8 r vce_v4_0_ring_vm_funcs +ffffffff82b111d8 r vce_v4_0_irq_funcs +ffffffff82b12000 r vcn_v1_0_ip_funcs +ffffffff82b120a0 R vcn_v1_0_ip_block +ffffffff82b120b8 r vcn_v1_0_dec_ring_vm_funcs +ffffffff82b121d8 r vcn_v1_0_enc_ring_vm_funcs +ffffffff82b122f8 r vcn_v1_0_irq_funcs +ffffffff82b13000 r vcn_v2_0_ip_funcs +ffffffff82b130a0 R vcn_v2_0_ip_block +ffffffff82b130b8 r vcn_v2_0_dec_ring_vm_funcs +ffffffff82b131d8 r vcn_v2_0_enc_ring_vm_funcs +ffffffff82b132f8 r vcn_v2_0_irq_funcs +ffffffff82b14000 r vcn_v2_5_ip_funcs +ffffffff82b140a0 R vcn_v2_5_ip_block +ffffffff82b140b8 r vcn_v2_6_ip_funcs +ffffffff82b14158 R vcn_v2_6_ip_block +ffffffff82b14170 R vcn_v2_6_ras_hw_ops +ffffffff82b141b0 r vcn_v2_5_dec_ring_vm_funcs +ffffffff82b142d0 r vcn_v2_6_dec_ring_vm_funcs +ffffffff82b143f0 r vcn_v2_5_enc_ring_vm_funcs +ffffffff82b14510 r vcn_v2_6_enc_ring_vm_funcs +ffffffff82b14630 r vcn_v2_5_irq_funcs +ffffffff82b15000 r vcn_v3_0_ip_funcs +ffffffff82b150a0 R vcn_v3_0_ip_block +ffffffff82b150b8 r vcn_v3_0_dec_ring_vm_funcs +ffffffff82b151d8 r vcn_v3_0_enc_ring_vm_funcs +ffffffff82b152f8 r vcn_v3_0_irq_funcs +ffffffff82b16000 r vcn_v4_0_ip_funcs +ffffffff82b160a0 R vcn_v4_0_ip_block +ffffffff82b160b8 r vcn_v4_0_unified_ring_vm_funcs +ffffffff82b161d8 r vcn_v4_0_irq_funcs +ffffffff82b17000 R vega10_ih_ip_funcs +ffffffff82b170a0 R vega10_ih_ip_block +ffffffff82b170b8 r vega10_ih_funcs +ffffffff82b170d8 r vega10_ih_self_irq_funcs +ffffffff82b18000 r GC_BASE +ffffffff82b18064 r HDP_BASE +ffffffff82b180c8 r MMHUB_BASE +ffffffff82b1812c r ATHUB_BASE +ffffffff82b18190 r NBIO_BASE +ffffffff82b181f4 r MP0_BASE +ffffffff82b18258 r MP1_BASE +ffffffff82b182bc r VCE_BASE +ffffffff82b18320 r VCN_BASE +ffffffff82b18384 r DF_BASE +ffffffff82b183e8 r DCE_BASE +ffffffff82b1844c r OSSSYS_BASE +ffffffff82b184b0 r SDMA0_BASE +ffffffff82b18514 r SDMA1_BASE +ffffffff82b18578 r SMUIO_BASE +ffffffff82b185dc r PWR_BASE +ffffffff82b18640 r NBIF_BASE +ffffffff82b186a4 r THM_BASE +ffffffff82b18708 r CLK_BASE +ffffffff82b19000 R vega20_ih_ip_funcs +ffffffff82b190a0 R vega20_ih_ip_block +ffffffff82b190b8 r vega20_ih_funcs +ffffffff82b190d8 r vega20_ih_self_irq_funcs +ffffffff82b1a000 r GC_BASE +ffffffff82b1a090 r HDP_BASE +ffffffff82b1a120 r MMHUB_BASE +ffffffff82b1a1b0 r ATHUB_BASE +ffffffff82b1a240 r NBIO_BASE +ffffffff82b1a2d0 r MP0_BASE +ffffffff82b1a360 r MP1_BASE +ffffffff82b1a3f0 r UVD_BASE +ffffffff82b1a480 r VCE_BASE +ffffffff82b1a510 r DF_BASE +ffffffff82b1a5a0 r DCE_BASE +ffffffff82b1a630 r OSSSYS_BASE +ffffffff82b1a6c0 r SDMA0_BASE +ffffffff82b1a750 r SDMA1_BASE +ffffffff82b1a7e0 r SMUIO_BASE +ffffffff82b1a870 r THM_BASE +ffffffff82b1a900 r CLK_BASE +ffffffff82b1a990 r UMC_BASE +ffffffff82b1aa20 r RSMU_BASE +ffffffff82b1b000 r vi_common_ip_block +ffffffff82b1b018 r vi_common_ip_funcs +ffffffff82b1b0b8 r vi_asic_funcs +ffffffff82b1b170 r vi_allowed_read_registers +ffffffff82b1b3d0 r topaz_video_codecs_encode +ffffffff82b1b3e0 r topaz_video_codecs_decode +ffffffff82b1b3f0 r tonga_video_codecs_encode +ffffffff82b1b400 r tonga_video_codecs_decode +ffffffff82b1b410 r polaris_video_codecs_encode +ffffffff82b1b420 r cz_video_codecs_decode +ffffffff82b1b430 r tonga_video_codecs_encode_array +ffffffff82b1b450 r tonga_video_codecs_decode_array +ffffffff82b1b4a0 r polaris_video_codecs_encode_array +ffffffff82b1b4d0 r cz_video_codecs_decode_array +ffffffff82b1b550 r iceland_mgcg_cgcg_init +ffffffff82b1b590 r fiji_mgcg_cgcg_init +ffffffff82b1b5f0 r tonga_mgcg_cgcg_init +ffffffff82b1b650 r cz_mgcg_cgcg_init +ffffffff82b1b690 r stoney_mgcg_cgcg_init +ffffffff82b1c000 r amdgpu_dm_funcs +ffffffff82b1c0a0 R dm_ip_block +ffffffff82b1c0b8 R amdgpu_dm_encoder_helper_funcs +ffffffff82b1c120 r dm_display_funcs +ffffffff82b1c180 r hpd_disconnect_quirk_table +ffffffff82b1cef0 r amdgpu_dm_mode_funcs +ffffffff82b1cf38 r amdgpu_dm_encoder_funcs +ffffffff82b1cf58 r amdgpu_dm_connector_funcs +ffffffff82b1cfd0 r amdgpu_dm_connector_helper_funcs +ffffffff82b1d020 r amdgpu_dm_i2c_algo +ffffffff82b1d1f0 r add_fs_modes.common_rates +ffffffff82b1d220 r amdgpu_dm_backlight_ops +ffffffff82b1e000 r amdgpu_dm_crtc_funcs +ffffffff82b1e0c0 r amdgpu_dm_crtc_helper_funcs +ffffffff82b1f000 r dm_dtn_log_begin.msg +ffffffff82b1f00d r dm_dtn_log_end.msg +ffffffff82b1f018 r SYNAPTICS_DEVICE_ID +ffffffff82b20000 r dm_crtc_irq_funcs +ffffffff82b20010 r dm_vline0_irq_funcs +ffffffff82b20020 r dm_dmub_outbox_irq_funcs +ffffffff82b20030 r dm_vupdate_irq_funcs +ffffffff82b20040 r dm_dmub_trace_irq_funcs +ffffffff82b20050 r dm_pageflip_irq_funcs +ffffffff82b20060 r dm_hpd_irq_funcs +ffffffff82b21000 r amdgpu_dm_encoder_funcs +ffffffff82b21020 r dm_mst_cbs +ffffffff82b21030 r dm_dp_mst_connector_funcs +ffffffff82b210a8 r dm_dp_mst_connector_helper_funcs +ffffffff82b22000 r dm_plane_funcs +ffffffff82b22068 r dm_plane_helper_funcs +ffffffff82b24000 r vbios_funcs ffffffff82b25000 r vbios_funcs -ffffffff82b26000 r vbios_funcs +ffffffff82b2a000 r command_table_helper_funcs ffffffff82b2b000 r command_table_helper_funcs ffffffff82b2c000 r command_table_helper_funcs ffffffff82b2d000 r command_table_helper_funcs -ffffffff82b2e000 r command_table_helper_funcs -ffffffff82b2f000 r dce80_max_clks_by_state +ffffffff82b2e000 r dce80_max_clks_by_state +ffffffff82b2e028 r disp_clk_regs +ffffffff82b2e07c r disp_clk_shift +ffffffff82b2e088 r disp_clk_mask +ffffffff82b2f000 r dce110_max_clks_by_state ffffffff82b2f028 r disp_clk_regs ffffffff82b2f07c r disp_clk_shift ffffffff82b2f088 r disp_clk_mask -ffffffff82b30000 r dce110_max_clks_by_state +ffffffff82b30000 r dce112_max_clks_by_state ffffffff82b30028 r disp_clk_regs ffffffff82b3007c r disp_clk_shift ffffffff82b30088 r disp_clk_mask -ffffffff82b31000 r dce112_max_clks_by_state -ffffffff82b31028 r disp_clk_regs -ffffffff82b3107c r disp_clk_shift -ffffffff82b31088 r disp_clk_mask -ffffffff82b32000 r dce120_max_clks_by_state +ffffffff82b31000 r dce120_max_clks_by_state +ffffffff82b32000 r clk_mgr_regs +ffffffff82b32054 r clk_mgr_shift +ffffffff82b32060 r clk_mgr_mask ffffffff82b33000 r clk_mgr_regs ffffffff82b33054 r clk_mgr_shift ffffffff82b33060 r clk_mgr_mask ffffffff82b34000 r clk_mgr_regs ffffffff82b34054 r clk_mgr_shift ffffffff82b34060 r clk_mgr_mask -ffffffff82b35000 r clk_mgr_regs -ffffffff82b35054 r clk_mgr_shift -ffffffff82b35060 r clk_mgr_mask +ffffffff82b35000 r lpddr5_wm_table +ffffffff82b350c0 r ddr5_wm_table ffffffff82b36000 r lpddr5_wm_table ffffffff82b360c0 r ddr5_wm_table ffffffff82b37000 r lpddr5_wm_table ffffffff82b370c0 r ddr5_wm_table ffffffff82b38000 r lpddr5_wm_table -ffffffff82b380c0 r ddr5_wm_table -ffffffff82b39000 r lpddr5_wm_table -ffffffff82b390c0 r ddr4_wm_table -ffffffff82b3a000 r clk_mgr_regs_dcn321 -ffffffff82b3a054 r clk_mgr_shift_dcn321 -ffffffff82b3a060 r clk_mgr_mask_dcn321 -ffffffff82b3a084 r clk_mgr_regs_dcn32 -ffffffff82b3a0d8 r clk_mgr_shift_dcn32 -ffffffff82b3a0e4 r clk_mgr_mask_dcn32 -ffffffff82b3b000 r DC_BUILD_ID -ffffffff82b3d000 r output_csc_matrix -ffffffff82b3d0e0 r black_color_format -ffffffff82b3e000 r DP_SINK_BRANCH_DEV_NAME_7580 -ffffffff82b3f000 r DP_VGA_DONGLE_BRANCH_DEV_NAME -ffffffff82b3f006 r DP_DVI_CONVERTER_ID_4 -ffffffff82b3f00d r DP_DVI_CONVERTER_ID_5 -ffffffff82b40000 r DP_VGA_LVDS_CONVERTER_ID_2 -ffffffff82b40007 r DP_VGA_LVDS_CONVERTER_ID_3 -ffffffff82b40010 r dp_lt_fallbacks -ffffffff82b41000 r mandatory_dpcd_partitions -ffffffff82b43000 r dce_funcs -ffffffff82b44000 r funcs -ffffffff82b45000 R video_optimized_pixel_rates -ffffffff82b451b0 r dce110_clk_src_funcs -ffffffff82b451d8 r dce112_clk_src_funcs -ffffffff82b45200 r dcn20_clk_src_funcs -ffffffff82b45228 r dcn3_clk_src_funcs -ffffffff82b45250 r dcn31_clk_src_funcs -ffffffff82b46000 r dce_funcs -ffffffff82b46068 r dcn10_funcs -ffffffff82b460d0 r dcn20_funcs -ffffffff82b46138 r dcn21_funcs -ffffffff82b47000 r dce_ipp_funcs -ffffffff82b48000 r dce110_lnk_enc_funcs -ffffffff82b49000 r dce_mi_funcs -ffffffff82b49090 r dce112_mi_funcs -ffffffff82b49120 r dce120_mi_funcs -ffffffff82b491b0 r pte_settings -ffffffff82b4a000 r funcs -ffffffff82b4b000 r dce_link_panel_cntl_funcs -ffffffff82b4c000 r filter_3tap_16p_upscale -ffffffff82b4c040 r filter_3tap_16p_116 -ffffffff82b4c080 r filter_3tap_16p_149 -ffffffff82b4c0c0 r filter_3tap_16p_183 -ffffffff82b4c100 r filter_3tap_64p_upscale -ffffffff82b4c1d0 r filter_3tap_64p_116 -ffffffff82b4c2a0 r filter_3tap_64p_149 -ffffffff82b4c370 r filter_3tap_64p_183 -ffffffff82b4c440 r filter_4tap_16p_upscale -ffffffff82b4c490 r filter_4tap_16p_116 -ffffffff82b4c4e0 r filter_4tap_16p_149 -ffffffff82b4c530 r filter_4tap_16p_183 -ffffffff82b4c580 r filter_4tap_64p_upscale -ffffffff82b4c690 r filter_4tap_64p_116 -ffffffff82b4c7a0 r filter_4tap_64p_149 -ffffffff82b4c8b0 r filter_4tap_64p_183 -ffffffff82b4c9c0 r filter_5tap_64p_upscale -ffffffff82b4cb10 r filter_5tap_64p_116 -ffffffff82b4cc60 r filter_5tap_64p_149 -ffffffff82b4cdb0 r filter_5tap_64p_183 -ffffffff82b4cf00 r filter_6tap_64p_upscale -ffffffff82b4d090 r filter_6tap_64p_116 -ffffffff82b4d220 r filter_6tap_64p_149 -ffffffff82b4d3b0 r filter_6tap_64p_183 -ffffffff82b4d540 r filter_7tap_64p_upscale -ffffffff82b4d710 r filter_7tap_64p_116 -ffffffff82b4d8e0 r filter_7tap_64p_149 -ffffffff82b4dab0 r filter_7tap_64p_183 -ffffffff82b4dc80 r filter_8tap_64p_upscale -ffffffff82b4de90 r filter_8tap_64p_116 -ffffffff82b4e0a0 r filter_8tap_64p_149 -ffffffff82b4e2b0 r filter_8tap_64p_183 -ffffffff82b4e4c0 r filter_2tap_16p -ffffffff82b4e4f0 r filter_2tap_64p -ffffffff82b4f000 r audio_clock_info_table_48bpc -ffffffff82b4f190 r audio_clock_info_table_36bpc -ffffffff82b4f320 r audio_clock_info_table -ffffffff82b4f4e0 r dce110_str_enc_funcs -ffffffff82b50000 r global_color_matrix -ffffffff82b500a8 r dce_transform_funcs -ffffffff82b51000 r abm_funcs -ffffffff82b52000 r psr_funcs -ffffffff82b52040 r DP_SINK_DEVICE_STR_ID_1 -ffffffff82b52045 r DP_SINK_DEVICE_STR_ID_2 -ffffffff82b53000 r reg_offsets -ffffffff82b54000 r bios_regs -ffffffff82b54008 r res_cap -ffffffff82b54050 r clk_src_regs -ffffffff82b5414c r dmcu_regs -ffffffff82b541a8 r dmcu_shift -ffffffff82b541bc r dmcu_mask -ffffffff82b54208 r abm_regs -ffffffff82b54248 r abm_shift -ffffffff82b5425c r abm_mask -ffffffff82b542b0 r dce100_tg_offsets -ffffffff82b542f8 r plane_cap -ffffffff82b54328 r res_create_funcs -ffffffff82b54358 r dce100_res_pool_funcs -ffffffff82b54440 r panel_cntl_regs -ffffffff82b54460 r panel_cntl_shift -ffffffff82b54470 r panel_cntl_mask -ffffffff82b544b0 r link_enc_regs -ffffffff82b54870 r link_enc_aux_regs -ffffffff82b548c0 r link_enc_hpd_regs -ffffffff82b548d8 r link_enc_feature -ffffffff82b548e8 r cs_shift -ffffffff82b548f4 r cs_mask -ffffffff82b54920 r mi_regs -ffffffff82b54c38 r mi_shifts -ffffffff82b54c80 r mi_masks -ffffffff82b54da0 r ipp_regs -ffffffff82b54f98 r ipp_shift -ffffffff82b54fc0 r ipp_mask -ffffffff82b55060 r xfm_regs -ffffffff82b55600 r xfm_shift -ffffffff82b55660 r xfm_mask -ffffffff82b557e0 r opp_regs -ffffffff82b55930 r opp_shift -ffffffff82b5595c r opp_mask -ffffffff82b55a10 r aux_engine_regs -ffffffff82b55b00 r aux_mask -ffffffff82b55b60 r aux_shift -ffffffff82b55b80 r i2c_hw_regs -ffffffff82b55cd0 r i2c_shifts -ffffffff82b55cfc r i2c_masks -ffffffff82b55da0 r audio_regs -ffffffff82b55ed4 r audio_shift -ffffffff82b55eec r audio_mask -ffffffff82b55f30 r stream_enc_regs -ffffffff82b565dc r se_shift -ffffffff82b56660 r se_mask -ffffffff82b56864 r hwseq_reg -ffffffff82b56a80 r hwseq_shift -ffffffff82b56b00 r hwseq_mask -ffffffff82b57000 r reg_offsets -ffffffff82b57018 r dce110_compressor_funcs -ffffffff82b58000 r dce110_funcs -ffffffff82b582c0 r dce110_private_funcs -ffffffff82b59000 r dce110_mem_input_v_funcs -ffffffff82b59090 r dvmm_Hw_Setting_1DTiling -ffffffff82b59120 r dvmm_Hw_Setting_2DTiling -ffffffff82b591b0 r dvmm_Hw_Setting_Linear -ffffffff82b5a000 r global_color_matrix -ffffffff82b5a0b0 r input_csc_matrix -ffffffff82b5b000 r funcs -ffffffff82b5c000 r bios_regs -ffffffff82b5c008 r dce110_res_pool_funcs -ffffffff82b5c0f0 r clk_src_regs -ffffffff82b5c1ec r dmcu_regs -ffffffff82b5c248 r dmcu_shift -ffffffff82b5c25c r dmcu_mask -ffffffff82b5c2a8 r abm_regs -ffffffff82b5c2e8 r abm_shift -ffffffff82b5c2fc r abm_mask -ffffffff82b5c350 r dce110_tg_offsets -ffffffff82b5c398 r res_create_funcs -ffffffff82b5c3c8 r plane_cap -ffffffff82b5c3f4 r underlay_plane_cap -ffffffff82b5c420 r stoney_resource_cap -ffffffff82b5c45c r carrizo_resource_cap -ffffffff82b5c4a0 r panel_cntl_regs -ffffffff82b5c4c0 r panel_cntl_shift -ffffffff82b5c4d0 r panel_cntl_mask -ffffffff82b5c510 r link_enc_regs -ffffffff82b5c8d0 r link_enc_aux_regs -ffffffff82b5c920 r link_enc_hpd_regs -ffffffff82b5c938 r link_enc_feature -ffffffff82b5c948 r cs_shift -ffffffff82b5c954 r cs_mask -ffffffff82b5c980 r mi_regs -ffffffff82b5cb0c r mi_shifts -ffffffff82b5cb54 r mi_masks -ffffffff82b5cc70 r ipp_regs -ffffffff82b5cd6c r ipp_shift -ffffffff82b5cd94 r ipp_mask -ffffffff82b5ce30 r xfm_regs -ffffffff82b5d100 r xfm_shift -ffffffff82b5d160 r xfm_mask -ffffffff82b5d2e0 r opp_regs -ffffffff82b5d430 r opp_shift -ffffffff82b5d45c r opp_mask -ffffffff82b5d510 r aux_engine_regs -ffffffff82b5d600 r aux_mask -ffffffff82b5d660 r aux_shift -ffffffff82b5d680 r i2c_hw_regs -ffffffff82b5d7d0 r i2c_shifts -ffffffff82b5d7fc r i2c_masks -ffffffff82b5d8a0 r audio_regs -ffffffff82b5d9d4 r audio_shift -ffffffff82b5d9ec r audio_mask -ffffffff82b5da30 r stream_enc_regs -ffffffff82b5dd0c r se_shift -ffffffff82b5dd90 r se_mask -ffffffff82b5df94 r hwseq_stoney_reg -ffffffff82b5e1b0 r hwseq_cz_reg -ffffffff82b5e3cc r hwseq_shift -ffffffff82b5e44c r hwseq_mask -ffffffff82b5f000 r dce110_tg_funcs -ffffffff82b60000 r dce110_tg_v_funcs -ffffffff82b61000 r dce110_xfmv_funcs +ffffffff82b380c0 r ddr4_wm_table +ffffffff82b39000 r clk_mgr_regs_dcn321 +ffffffff82b39054 r clk_mgr_shift_dcn321 +ffffffff82b39060 r clk_mgr_mask_dcn321 +ffffffff82b39084 r clk_mgr_regs_dcn32 +ffffffff82b390d8 r clk_mgr_shift_dcn32 +ffffffff82b390e4 r clk_mgr_mask_dcn32 +ffffffff82b3a000 r DC_BUILD_ID +ffffffff82b3c000 r output_csc_matrix +ffffffff82b3c0e0 r black_color_format +ffffffff82b3d000 r DP_SINK_BRANCH_DEV_NAME_7580 +ffffffff82b3e000 r DP_VGA_DONGLE_BRANCH_DEV_NAME +ffffffff82b3e006 r DP_DVI_CONVERTER_ID_4 +ffffffff82b3e00d r DP_DVI_CONVERTER_ID_5 +ffffffff82b3f000 r DP_VGA_LVDS_CONVERTER_ID_2 +ffffffff82b3f007 r DP_VGA_LVDS_CONVERTER_ID_3 +ffffffff82b3f010 r dp_lt_fallbacks +ffffffff82b40000 r mandatory_dpcd_partitions +ffffffff82b42000 r dce_funcs +ffffffff82b43000 r funcs +ffffffff82b44000 R video_optimized_pixel_rates +ffffffff82b441b0 r dce110_clk_src_funcs +ffffffff82b441d8 r dce112_clk_src_funcs +ffffffff82b44200 r dcn20_clk_src_funcs +ffffffff82b44228 r dcn3_clk_src_funcs +ffffffff82b44250 r dcn31_clk_src_funcs +ffffffff82b45000 r dce_funcs +ffffffff82b45068 r dcn10_funcs +ffffffff82b450d0 r dcn20_funcs +ffffffff82b45138 r dcn21_funcs +ffffffff82b46000 r dce_ipp_funcs +ffffffff82b47000 r dce110_lnk_enc_funcs +ffffffff82b48000 r dce_mi_funcs +ffffffff82b48090 r dce112_mi_funcs +ffffffff82b48120 r dce120_mi_funcs +ffffffff82b481b0 r pte_settings +ffffffff82b49000 r funcs +ffffffff82b4a000 r dce_link_panel_cntl_funcs +ffffffff82b4b000 r filter_3tap_16p_upscale +ffffffff82b4b040 r filter_3tap_16p_116 +ffffffff82b4b080 r filter_3tap_16p_149 +ffffffff82b4b0c0 r filter_3tap_16p_183 +ffffffff82b4b100 r filter_3tap_64p_upscale +ffffffff82b4b1d0 r filter_3tap_64p_116 +ffffffff82b4b2a0 r filter_3tap_64p_149 +ffffffff82b4b370 r filter_3tap_64p_183 +ffffffff82b4b440 r filter_4tap_16p_upscale +ffffffff82b4b490 r filter_4tap_16p_116 +ffffffff82b4b4e0 r filter_4tap_16p_149 +ffffffff82b4b530 r filter_4tap_16p_183 +ffffffff82b4b580 r filter_4tap_64p_upscale +ffffffff82b4b690 r filter_4tap_64p_116 +ffffffff82b4b7a0 r filter_4tap_64p_149 +ffffffff82b4b8b0 r filter_4tap_64p_183 +ffffffff82b4b9c0 r filter_5tap_64p_upscale +ffffffff82b4bb10 r filter_5tap_64p_116 +ffffffff82b4bc60 r filter_5tap_64p_149 +ffffffff82b4bdb0 r filter_5tap_64p_183 +ffffffff82b4bf00 r filter_6tap_64p_upscale +ffffffff82b4c090 r filter_6tap_64p_116 +ffffffff82b4c220 r filter_6tap_64p_149 +ffffffff82b4c3b0 r filter_6tap_64p_183 +ffffffff82b4c540 r filter_7tap_64p_upscale +ffffffff82b4c710 r filter_7tap_64p_116 +ffffffff82b4c8e0 r filter_7tap_64p_149 +ffffffff82b4cab0 r filter_7tap_64p_183 +ffffffff82b4cc80 r filter_8tap_64p_upscale +ffffffff82b4ce90 r filter_8tap_64p_116 +ffffffff82b4d0a0 r filter_8tap_64p_149 +ffffffff82b4d2b0 r filter_8tap_64p_183 +ffffffff82b4d4c0 r filter_2tap_16p +ffffffff82b4d4f0 r filter_2tap_64p +ffffffff82b4e000 r audio_clock_info_table_48bpc +ffffffff82b4e190 r audio_clock_info_table_36bpc +ffffffff82b4e320 r audio_clock_info_table +ffffffff82b4e4e0 r dce110_str_enc_funcs +ffffffff82b4f000 r global_color_matrix +ffffffff82b4f0a8 r dce_transform_funcs +ffffffff82b50000 r abm_funcs +ffffffff82b51000 r psr_funcs +ffffffff82b51040 r DP_SINK_DEVICE_STR_ID_1 +ffffffff82b51045 r DP_SINK_DEVICE_STR_ID_2 +ffffffff82b52000 r reg_offsets +ffffffff82b53000 r bios_regs +ffffffff82b53008 r res_cap +ffffffff82b53050 r clk_src_regs +ffffffff82b5314c r dmcu_regs +ffffffff82b531a8 r dmcu_shift +ffffffff82b531bc r dmcu_mask +ffffffff82b53208 r abm_regs +ffffffff82b53248 r abm_shift +ffffffff82b5325c r abm_mask +ffffffff82b532b0 r dce100_tg_offsets +ffffffff82b532f8 r plane_cap +ffffffff82b53328 r res_create_funcs +ffffffff82b53358 r dce100_res_pool_funcs +ffffffff82b53440 r panel_cntl_regs +ffffffff82b53460 r panel_cntl_shift +ffffffff82b53470 r panel_cntl_mask +ffffffff82b534b0 r link_enc_regs +ffffffff82b53870 r link_enc_aux_regs +ffffffff82b538c0 r link_enc_hpd_regs +ffffffff82b538d8 r link_enc_feature +ffffffff82b538e8 r cs_shift +ffffffff82b538f4 r cs_mask +ffffffff82b53920 r mi_regs +ffffffff82b53c38 r mi_shifts +ffffffff82b53c80 r mi_masks +ffffffff82b53da0 r ipp_regs +ffffffff82b53f98 r ipp_shift +ffffffff82b53fc0 r ipp_mask +ffffffff82b54060 r xfm_regs +ffffffff82b54600 r xfm_shift +ffffffff82b54660 r xfm_mask +ffffffff82b547e0 r opp_regs +ffffffff82b54930 r opp_shift +ffffffff82b5495c r opp_mask +ffffffff82b54a10 r aux_engine_regs +ffffffff82b54b00 r aux_mask +ffffffff82b54b60 r aux_shift +ffffffff82b54b80 r i2c_hw_regs +ffffffff82b54cd0 r i2c_shifts +ffffffff82b54cfc r i2c_masks +ffffffff82b54da0 r audio_regs +ffffffff82b54ed4 r audio_shift +ffffffff82b54eec r audio_mask +ffffffff82b54f30 r stream_enc_regs +ffffffff82b555dc r se_shift +ffffffff82b55660 r se_mask +ffffffff82b55864 r hwseq_reg +ffffffff82b55a80 r hwseq_shift +ffffffff82b55b00 r hwseq_mask +ffffffff82b56000 r reg_offsets +ffffffff82b56018 r dce110_compressor_funcs +ffffffff82b57000 r dce110_funcs +ffffffff82b572c0 r dce110_private_funcs +ffffffff82b58000 r dce110_mem_input_v_funcs +ffffffff82b58090 r dvmm_Hw_Setting_1DTiling +ffffffff82b58120 r dvmm_Hw_Setting_2DTiling +ffffffff82b581b0 r dvmm_Hw_Setting_Linear +ffffffff82b59000 r global_color_matrix +ffffffff82b590b0 r input_csc_matrix +ffffffff82b5a000 r funcs +ffffffff82b5b000 r bios_regs +ffffffff82b5b008 r dce110_res_pool_funcs +ffffffff82b5b0f0 r clk_src_regs +ffffffff82b5b1ec r dmcu_regs +ffffffff82b5b248 r dmcu_shift +ffffffff82b5b25c r dmcu_mask +ffffffff82b5b2a8 r abm_regs +ffffffff82b5b2e8 r abm_shift +ffffffff82b5b2fc r abm_mask +ffffffff82b5b350 r dce110_tg_offsets +ffffffff82b5b398 r res_create_funcs +ffffffff82b5b3c8 r plane_cap +ffffffff82b5b3f4 r underlay_plane_cap +ffffffff82b5b420 r stoney_resource_cap +ffffffff82b5b45c r carrizo_resource_cap +ffffffff82b5b4a0 r panel_cntl_regs +ffffffff82b5b4c0 r panel_cntl_shift +ffffffff82b5b4d0 r panel_cntl_mask +ffffffff82b5b510 r link_enc_regs +ffffffff82b5b8d0 r link_enc_aux_regs +ffffffff82b5b920 r link_enc_hpd_regs +ffffffff82b5b938 r link_enc_feature +ffffffff82b5b948 r cs_shift +ffffffff82b5b954 r cs_mask +ffffffff82b5b980 r mi_regs +ffffffff82b5bb0c r mi_shifts +ffffffff82b5bb54 r mi_masks +ffffffff82b5bc70 r ipp_regs +ffffffff82b5bd6c r ipp_shift +ffffffff82b5bd94 r ipp_mask +ffffffff82b5be30 r xfm_regs +ffffffff82b5c100 r xfm_shift +ffffffff82b5c160 r xfm_mask +ffffffff82b5c2e0 r opp_regs +ffffffff82b5c430 r opp_shift +ffffffff82b5c45c r opp_mask +ffffffff82b5c510 r aux_engine_regs +ffffffff82b5c600 r aux_mask +ffffffff82b5c660 r aux_shift +ffffffff82b5c680 r i2c_hw_regs +ffffffff82b5c7d0 r i2c_shifts +ffffffff82b5c7fc r i2c_masks +ffffffff82b5c8a0 r audio_regs +ffffffff82b5c9d4 r audio_shift +ffffffff82b5c9ec r audio_mask +ffffffff82b5ca30 r stream_enc_regs +ffffffff82b5cd0c r se_shift +ffffffff82b5cd90 r se_mask +ffffffff82b5cf94 r hwseq_stoney_reg +ffffffff82b5d1b0 r hwseq_cz_reg +ffffffff82b5d3cc r hwseq_shift +ffffffff82b5d44c r hwseq_mask +ffffffff82b5e000 r dce110_tg_funcs +ffffffff82b5f000 r dce110_tg_v_funcs +ffffffff82b60000 r dce110_xfmv_funcs +ffffffff82b61000 r reg_offsets ffffffff82b62000 r reg_offsets -ffffffff82b63000 r reg_offsets -ffffffff82b64000 r bios_regs -ffffffff82b64010 r clk_src_regs -ffffffff82b64208 r dmcu_regs -ffffffff82b64264 r dmcu_shift -ffffffff82b64278 r dmcu_mask -ffffffff82b642c4 r abm_regs -ffffffff82b64304 r abm_shift -ffffffff82b64318 r abm_mask -ffffffff82b64360 r dce112_tg_offsets -ffffffff82b643a8 r res_create_funcs -ffffffff82b643d8 r plane_cap -ffffffff82b64404 r polaris_11_resource_cap -ffffffff82b64440 r polaris_10_resource_cap -ffffffff82b64480 r dce112_res_pool_funcs -ffffffff82b64570 r panel_cntl_regs -ffffffff82b64590 r panel_cntl_shift -ffffffff82b645a0 r panel_cntl_mask -ffffffff82b645e0 r link_enc_regs -ffffffff82b649a0 r link_enc_aux_regs -ffffffff82b649f0 r link_enc_hpd_regs -ffffffff82b64a08 r link_enc_feature -ffffffff82b64a18 r cs_shift -ffffffff82b64a24 r cs_mask -ffffffff82b64a50 r mi_regs -ffffffff82b64d68 r mi_shifts -ffffffff82b64db0 r mi_masks -ffffffff82b64ed0 r ipp_regs -ffffffff82b650c8 r ipp_shift -ffffffff82b650f0 r ipp_mask -ffffffff82b65190 r xfm_regs -ffffffff82b65730 r xfm_shift -ffffffff82b65790 r xfm_mask -ffffffff82b65910 r opp_regs -ffffffff82b65a60 r opp_shift -ffffffff82b65a8c r opp_mask -ffffffff82b65b40 r aux_engine_regs -ffffffff82b65c30 r aux_mask -ffffffff82b65c90 r aux_shift -ffffffff82b65cb0 r i2c_hw_regs -ffffffff82b65e00 r i2c_shifts -ffffffff82b65e2c r i2c_masks -ffffffff82b65ed0 r audio_regs -ffffffff82b65fd8 r audio_shift -ffffffff82b65ff0 r audio_mask -ffffffff82b66030 r stream_enc_regs -ffffffff82b665e8 r se_shift -ffffffff82b6666c r se_mask -ffffffff82b66870 r hwseq_reg -ffffffff82b66a8c r hwseq_shift -ffffffff82b66b0c r hwseq_mask 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dcn32_mmhubbub_funcs -ffffffff82c26000 R dcn32_mpc_funcs -ffffffff82c27000 r res_cap_dcn32 -ffffffff82c27040 r debug_defaults_diags -ffffffff82c271b8 r dccg_shift -ffffffff82c27250 r dccg_mask -ffffffff82c274b0 r abm_shift -ffffffff82c274c4 r abm_mask -ffffffff82c27510 r res_create_funcs -ffffffff82c27540 r res_create_maximus_funcs -ffffffff82c27570 r plane_cap -ffffffff82c2759c r le_shift -ffffffff82c2768c r le_mask -ffffffff82c27a44 r link_enc_feature -ffffffff82c27a58 r debug_defaults_drv -ffffffff82c27bd0 r cs_shift -ffffffff82c27bdc r cs_mask -ffffffff82c27c04 r hubbub_shift -ffffffff82c27c8c r hubbub_mask -ffffffff82c27ea8 r vmid_shifts -ffffffff82c27eb0 r vmid_masks -ffffffff82c27ed0 r hubp_shift -ffffffff82c27fcc r hubp_mask -ffffffff82c283bc r tf_shift -ffffffff82c2868c r tf_mask -ffffffff82c291cc r opp_shift -ffffffff82c29204 r opp_mask -ffffffff82c292d8 r optc_shift -ffffffff82c29398 r optc_mask -ffffffff82c29698 r mpc_shift -ffffffff82c29774 r mpc_mask -ffffffff82c29ae0 r dsc_shift -ffffffff82c29b98 r dsc_mask -ffffffff82c29e70 r dwbc30_shift -ffffffff82c29fa4 r dwbc30_mask -ffffffff82c2a46c r mcif_wb30_shift -ffffffff82c2a518 r mcif_wb30_mask -ffffffff82c2a7c4 r aux_mask -ffffffff82c2a824 r aux_shift -ffffffff82c2a83c r i2c_shifts -ffffffff82c2a868 r i2c_masks -ffffffff82c2a90c r audio_shift -ffffffff82c2a924 r audio_mask -ffffffff82c2a960 r se_shift -ffffffff82c2aa3c r se_mask -ffffffff82c2ada8 r vpg_shift -ffffffff82c2add0 r vpg_mask -ffffffff82c2ae64 r afmt_shift -ffffffff82c2ae78 r afmt_mask -ffffffff82c2aebc r hpo_dp_se_shift -ffffffff82c2aee4 r hpo_dp_se_mask -ffffffff82c2af84 r apg_shift -ffffffff82c2af8c r apg_mask -ffffffff82c2afa4 r hpo_dp_le_shift -ffffffff82c2afc0 r hpo_dp_le_mask -ffffffff82c2b024 r hwseq_shift -ffffffff82c2b0a4 r hwseq_mask -ffffffff82c2c000 r dcn321_link_enc_funcs -ffffffff82c2d000 r res_cap_dcn321 -ffffffff82c2d040 r debug_defaults_diags -ffffffff82c2d1b8 r dccg_shift -ffffffff82c2d250 r dccg_mask -ffffffff82c2d4b0 r abm_shift -ffffffff82c2d4c4 r abm_mask -ffffffff82c2d510 r res_create_funcs -ffffffff82c2d540 r res_create_maximus_funcs -ffffffff82c2d570 r plane_cap -ffffffff82c2d59c r le_shift -ffffffff82c2d68c r le_mask -ffffffff82c2da44 r link_enc_feature -ffffffff82c2da58 r debug_defaults_drv -ffffffff82c2dbd0 r cs_shift -ffffffff82c2dbdc r cs_mask -ffffffff82c2dc04 r hubbub_shift -ffffffff82c2dc8c r hubbub_mask -ffffffff82c2dea8 r vmid_shifts -ffffffff82c2deb0 r vmid_masks -ffffffff82c2ded0 r hubp_shift -ffffffff82c2dfcc r hubp_mask -ffffffff82c2e3bc r tf_shift -ffffffff82c2e68c r tf_mask -ffffffff82c2f1cc r opp_shift -ffffffff82c2f204 r opp_mask -ffffffff82c2f2d8 r optc_shift -ffffffff82c2f398 r optc_mask -ffffffff82c2f698 r mpc_shift -ffffffff82c2f774 r mpc_mask -ffffffff82c2fae0 r dsc_shift -ffffffff82c2fb98 r dsc_mask -ffffffff82c2fe70 r dwbc30_shift -ffffffff82c2ffa4 r dwbc30_mask -ffffffff82c3046c r mcif_wb30_shift -ffffffff82c30518 r mcif_wb30_mask -ffffffff82c307c4 r aux_mask -ffffffff82c30824 r aux_shift -ffffffff82c3083c r i2c_shifts -ffffffff82c30868 r i2c_masks -ffffffff82c3090c r audio_shift -ffffffff82c30924 r audio_mask -ffffffff82c30960 r se_shift -ffffffff82c30a3c r se_mask -ffffffff82c30da8 r vpg_shift -ffffffff82c30dd0 r vpg_mask -ffffffff82c30e64 r afmt_shift -ffffffff82c30e78 r afmt_mask -ffffffff82c30ebc r hpo_dp_se_shift -ffffffff82c30ee4 r hpo_dp_se_mask -ffffffff82c30f84 r apg_shift -ffffffff82c30f8c r apg_mask -ffffffff82c30fa4 r hpo_dp_le_shift -ffffffff82c30fc0 r hpo_dp_le_mask -ffffffff82c31024 r hwseq_shift -ffffffff82c310a4 r hwseq_mask -ffffffff82c33000 R dcn10_soc_defaults -ffffffff82c3308c R dcn10_ip_defaults -ffffffff82c3e000 R dml20_funcs -ffffffff82c3e030 R dml20v2_funcs -ffffffff82c3e060 R dml21_funcs -ffffffff82c3e090 R dml30_funcs -ffffffff82c3e0c0 R dml31_funcs -ffffffff82c3e0f0 R dml314_funcs -ffffffff82c3e120 R dml32_funcs -ffffffff82c41000 R qp_table_422_10bpc_min -ffffffff82c41740 R qp_table_444_8bpc_max -ffffffff82c42080 R qp_table_420_12bpc_max -ffffffff82c427c0 R qp_table_444_10bpc_min -ffffffff82c43400 R qp_table_420_8bpc_max -ffffffff82c43840 R qp_table_444_8bpc_min -ffffffff82c44180 R qp_table_444_12bpc_min -ffffffff82c450c0 R qp_table_420_12bpc_min -ffffffff82c45800 R qp_table_422_12bpc_min -ffffffff82c46140 R qp_table_422_12bpc_max -ffffffff82c46a80 R qp_table_444_12bpc_max -ffffffff82c479c0 R qp_table_420_8bpc_min -ffffffff82c47e00 R qp_table_422_8bpc_min -ffffffff82c48340 R qp_table_422_10bpc_max -ffffffff82c48a80 R qp_table_420_10bpc_max -ffffffff82c49040 R qp_table_420_10bpc_min -ffffffff82c49600 R qp_table_444_10bpc_max -ffffffff82c4a240 R qp_table_422_8bpc_max +ffffffff82b63000 r bios_regs +ffffffff82b63010 r clk_src_regs +ffffffff82b63208 r dmcu_regs +ffffffff82b63264 r dmcu_shift +ffffffff82b63278 r dmcu_mask +ffffffff82b632c4 r abm_regs +ffffffff82b63304 r abm_shift +ffffffff82b63318 r abm_mask +ffffffff82b63360 r dce112_tg_offsets +ffffffff82b633a8 r res_create_funcs +ffffffff82b633d8 r plane_cap +ffffffff82b63404 r polaris_11_resource_cap +ffffffff82b63440 r polaris_10_resource_cap +ffffffff82b63480 r dce112_res_pool_funcs +ffffffff82b63570 r panel_cntl_regs +ffffffff82b63590 r panel_cntl_shift +ffffffff82b635a0 r panel_cntl_mask +ffffffff82b635e0 r link_enc_regs +ffffffff82b639a0 r link_enc_aux_regs +ffffffff82b639f0 r link_enc_hpd_regs +ffffffff82b63a08 r link_enc_feature +ffffffff82b63a18 r cs_shift +ffffffff82b63a24 r cs_mask +ffffffff82b63a50 r mi_regs +ffffffff82b63d68 r mi_shifts +ffffffff82b63db0 r mi_masks +ffffffff82b63ed0 r ipp_regs +ffffffff82b640c8 r ipp_shift +ffffffff82b640f0 r ipp_mask +ffffffff82b64190 r xfm_regs +ffffffff82b64730 r xfm_shift +ffffffff82b64790 r xfm_mask +ffffffff82b64910 r opp_regs +ffffffff82b64a60 r opp_shift +ffffffff82b64a8c r opp_mask +ffffffff82b64b40 r aux_engine_regs +ffffffff82b64c30 r aux_mask +ffffffff82b64c90 r aux_shift +ffffffff82b64cb0 r i2c_hw_regs +ffffffff82b64e00 r i2c_shifts +ffffffff82b64e2c r i2c_masks +ffffffff82b64ed0 r audio_regs +ffffffff82b64fd8 r audio_shift +ffffffff82b64ff0 r audio_mask +ffffffff82b65030 r stream_enc_regs +ffffffff82b655e8 r se_shift +ffffffff82b6566c r se_mask +ffffffff82b65870 r hwseq_reg +ffffffff82b65a8c r hwseq_shift +ffffffff82b65b0c r hwseq_mask +ffffffff82b66000 r bios_regs +ffffffff82b66008 r res_cap +ffffffff82b66048 r dce120_res_pool_funcs +ffffffff82b66130 r debug_defaults +ffffffff82b662b0 r clk_src_regs +ffffffff82b664a8 r dmcu_regs +ffffffff82b66504 r dmcu_shift +ffffffff82b66518 r dmcu_mask +ffffffff82b66564 r abm_regs +ffffffff82b665a4 r abm_shift +ffffffff82b665b8 r abm_mask +ffffffff82b66600 r dce120_tg_offsets +ffffffff82b66648 r dce121_res_create_funcs +ffffffff82b66678 r res_create_funcs +ffffffff82b666a8 r plane_cap +ffffffff82b666e0 r panel_cntl_regs +ffffffff82b66700 r panel_cntl_shift +ffffffff82b66710 r panel_cntl_mask +ffffffff82b66750 r link_enc_regs +ffffffff82b66b10 r link_enc_aux_regs +ffffffff82b66b60 r link_enc_hpd_regs +ffffffff82b66b78 r link_enc_feature +ffffffff82b66b88 r cs_shift +ffffffff82b66b94 r cs_mask +ffffffff82b66bc0 r mi_regs +ffffffff82b66ed8 r mi_shifts +ffffffff82b66f20 r mi_masks +ffffffff82b67040 r ipp_regs +ffffffff82b67238 r ipp_shift +ffffffff82b67260 r ipp_mask +ffffffff82b67300 r xfm_regs +ffffffff82b678a0 r xfm_shift +ffffffff82b67900 r xfm_mask +ffffffff82b67a80 r opp_regs +ffffffff82b67bd0 r opp_shift +ffffffff82b67bfc r opp_mask +ffffffff82b67cb0 r aux_engine_regs +ffffffff82b67da0 r aux_mask +ffffffff82b67e00 r aux_shift +ffffffff82b67e20 r i2c_hw_regs +ffffffff82b67f70 r i2c_shifts +ffffffff82b67f9c r i2c_masks +ffffffff82b68040 r audio_regs +ffffffff82b68174 r audio_shift +ffffffff82b6818c r audio_mask +ffffffff82b681d0 r stream_enc_regs +ffffffff82b68788 r se_shift +ffffffff82b6880c r se_mask +ffffffff82b68a10 r dce121_hwseq_reg +ffffffff82b68c2c r dce121_hwseq_shift +ffffffff82b68cac r dce121_hwseq_mask +ffffffff82b68ea0 r hwseq_reg +ffffffff82b690bc r hwseq_shift +ffffffff82b6913c r hwseq_mask +ffffffff82b6a000 r dce120_tg_funcs +ffffffff82b6b000 r bios_regs +ffffffff82b6b008 r res_cap +ffffffff82b6b048 r dce80_res_pool_funcs +ffffffff82b6b130 r clk_src_regs +ffffffff82b6b22c r dmcu_regs +ffffffff82b6b288 r dmcu_shift +ffffffff82b6b29c r dmcu_mask +ffffffff82b6b2e8 r abm_regs +ffffffff82b6b328 r abm_shift +ffffffff82b6b33c r abm_mask +ffffffff82b6b390 r dce80_tg_offsets +ffffffff82b6b3d8 r plane_cap +ffffffff82b6b408 r res_create_funcs +ffffffff82b6b440 r panel_cntl_regs +ffffffff82b6b460 r panel_cntl_shift +ffffffff82b6b470 r panel_cntl_mask +ffffffff82b6b4b0 r link_enc_regs +ffffffff82b6b870 r link_enc_aux_regs +ffffffff82b6b8c0 r link_enc_hpd_regs +ffffffff82b6b8d8 r link_enc_feature +ffffffff82b6b8e8 r cs_shift +ffffffff82b6b8f4 r cs_mask +ffffffff82b6b920 r mi_regs +ffffffff82b6bc38 r mi_shifts +ffffffff82b6bc80 r mi_masks +ffffffff82b6bda0 r ipp_regs +ffffffff82b6bf98 r ipp_shift +ffffffff82b6bfc0 r ipp_mask +ffffffff82b6c060 r xfm_regs +ffffffff82b6c600 r xfm_shift +ffffffff82b6c660 r xfm_mask +ffffffff82b6c7e0 r opp_regs +ffffffff82b6c930 r opp_shift +ffffffff82b6c95c r opp_mask +ffffffff82b6ca10 r aux_engine_regs +ffffffff82b6cb00 r aux_mask +ffffffff82b6cb60 r aux_shift +ffffffff82b6cb80 r i2c_hw_regs +ffffffff82b6ccd0 r i2c_shifts +ffffffff82b6ccfc r i2c_masks +ffffffff82b6cda0 r audio_regs +ffffffff82b6ced4 r audio_shift +ffffffff82b6ceec r audio_mask +ffffffff82b6cf30 r stream_enc_regs +ffffffff82b6d5dc r se_shift +ffffffff82b6d660 r se_mask +ffffffff82b6d864 r hwseq_reg +ffffffff82b6da80 r hwseq_shift +ffffffff82b6db00 r hwseq_mask +ffffffff82b6dcf4 r res_cap_81 +ffffffff82b6dd30 r res_cap_83 +ffffffff82b6e000 r reg_offsets +ffffffff82b6e048 r dce80_tg_funcs +ffffffff82b6f000 r dcn10_dpp_funcs +ffffffff82b70000 r dpp_input_csc_matrix +ffffffff82b72000 r hubbub1_funcs +ffffffff82b73000 r dcn10_hubp_funcs +ffffffff82b74000 r reduceSizeAndFraction.prime_numbers +ffffffff82b76000 r dcn10_funcs +ffffffff82b762c0 r dcn10_private_funcs +ffffffff82b77000 r dcn10_ipp_funcs +ffffffff82b77048 r dcn20_ipp_funcs +ffffffff82b78000 r dcn10_lnk_enc_funcs +ffffffff82b79000 r dcn10_mpc_funcs +ffffffff82b7a000 r dcn10_opp_funcs +ffffffff82b7b000 r dcn10_tg_funcs +ffffffff82b7c000 r bios_regs +ffffffff82b7c008 r rv2_res_cap +ffffffff82b7c044 r res_cap +ffffffff82b7c080 r debug_defaults_drv +ffffffff82b7c1f8 r debug_defaults_diags +ffffffff82b7c370 r clk_src_regs +ffffffff82b7c4c0 r dmcu_regs +ffffffff82b7c51c r dmcu_shift +ffffffff82b7c530 r dmcu_mask +ffffffff82b7c57c r abm_regs +ffffffff82b7c5bc r abm_shift +ffffffff82b7c5d0 r abm_mask +ffffffff82b7c618 r res_create_funcs +ffffffff82b7c648 r res_create_maximus_funcs +ffffffff82b7c678 r plane_cap +ffffffff82b7c6a8 r dcn10_res_pool_funcs +ffffffff82b7c790 r panel_cntl_regs +ffffffff82b7c7b0 r panel_cntl_shift +ffffffff82b7c7c0 r panel_cntl_mask +ffffffff82b7c800 r link_enc_regs +ffffffff82b7cd10 r link_enc_aux_regs +ffffffff82b7cd50 r link_enc_hpd_regs +ffffffff82b7cd60 r le_shift +ffffffff82b7ce50 r le_mask +ffffffff82b7d208 r link_enc_feature +ffffffff82b7d218 r cs_shift +ffffffff82b7d224 r cs_mask +ffffffff82b7d250 r hubp_regs +ffffffff82b7d900 r hubp_shift +ffffffff82b7d9c4 r hubp_mask +ffffffff82b7dcd0 r ipp_regs +ffffffff82b7ddb0 r ipp_shift +ffffffff82b7ddcc r ipp_mask +ffffffff82b7de40 r tf_regs +ffffffff82b7eda0 r tf_shift +ffffffff82b7f008 r tf_mask +ffffffff82b7f9a0 r opp_regs +ffffffff82b7fa70 r opp_shift +ffffffff82b7fa90 r opp_mask +ffffffff82b7fb10 r tg_regs +ffffffff82b80010 r tg_shift +ffffffff82b800d0 r tg_mask +ffffffff82b803d0 r aux_engine_regs +ffffffff82b804c0 r aux_mask +ffffffff82b80520 r aux_shift +ffffffff82b80540 r i2c_hw_regs +ffffffff82b80690 r i2c_shifts +ffffffff82b806bc r i2c_masks +ffffffff82b80760 r mpc_regs +ffffffff82b80880 r mpc_shift +ffffffff82b80898 r mpc_mask +ffffffff82b808f4 r hubbub_reg +ffffffff82b80a68 r hubbub_shift +ffffffff82b80af0 r hubbub_mask +ffffffff82b80d10 r audio_regs +ffffffff82b80dc0 r audio_shift +ffffffff82b80dd8 r audio_mask +ffffffff82b80e20 r stream_enc_regs +ffffffff82b81370 r se_shift +ffffffff82b8144c r se_mask +ffffffff82b817b8 r hwseq_reg +ffffffff82b819d4 r hwseq_shift +ffffffff82b81a54 r hwseq_mask +ffffffff82b82000 r audio_clock_info_table_48bpc +ffffffff82b82190 r audio_clock_info_table_36bpc +ffffffff82b82320 r audio_clock_info_table +ffffffff82b824e0 r dcn10_str_enc_funcs +ffffffff82b83000 r dccg2_funcs +ffffffff82b85000 r dpp_input_csc_matrix +ffffffff82b86000 R dcn20_dsc_funcs +ffffffff82b87000 R dcn20_dwbc_funcs +ffffffff82b88000 r filter_12tap_16p_upscale +ffffffff82b880e0 r filter_12tap_16p_117 +ffffffff82b881c0 r filter_12tap_16p_150 +ffffffff82b882a0 r filter_12tap_16p_183 +ffffffff82b88380 r filter_11tap_16p_upscale +ffffffff82b88450 r filter_11tap_16p_117 +ffffffff82b88520 r filter_11tap_16p_150 +ffffffff82b885f0 r filter_11tap_16p_183 +ffffffff82b886c0 r filter_10tap_16p_upscale +ffffffff82b88780 r filter_10tap_16p_117 +ffffffff82b88840 r filter_10tap_16p_150 +ffffffff82b88900 r filter_10tap_16p_183 +ffffffff82b889c0 r filter_9tap_16p_upscale +ffffffff82b88a70 r filter_9tap_16p_117 +ffffffff82b88b20 r filter_9tap_16p_150 +ffffffff82b88bd0 r filter_9tap_16p_183 +ffffffff82b88c80 r filter_8tap_16p_upscale +ffffffff82b88d10 r filter_8tap_16p_117 +ffffffff82b88da0 r filter_8tap_16p_150 +ffffffff82b88e30 r filter_8tap_16p_183 +ffffffff82b88ec0 r filter_7tap_16p_upscale +ffffffff82b88f40 r filter_7tap_16p_117 +ffffffff82b88fc0 r filter_7tap_16p_150 +ffffffff82b89040 r filter_7tap_16p_183 +ffffffff82b890c0 r filter_6tap_16p_upscale +ffffffff82b89130 r filter_6tap_16p_117 +ffffffff82b891a0 r filter_6tap_16p_150 +ffffffff82b89210 r filter_6tap_16p_183 +ffffffff82b89280 r filter_5tap_16p_upscale +ffffffff82b892e0 r filter_5tap_16p_117 +ffffffff82b89340 r filter_5tap_16p_150 +ffffffff82b893a0 r filter_5tap_16p_183 +ffffffff82b89400 r filter_4tap_16p_upscale +ffffffff82b89450 r filter_4tap_16p_117 +ffffffff82b894a0 r filter_4tap_16p_150 +ffffffff82b894f0 r filter_4tap_16p_183 +ffffffff82b89540 r filter_3tap_16p_upscale +ffffffff82b89580 r filter_3tap_16p_117 +ffffffff82b895c0 r filter_3tap_16p_150 +ffffffff82b89600 r filter_3tap_16p_183 +ffffffff82b8a000 r hubbub2_funcs +ffffffff82b8b000 r dcn20_funcs +ffffffff82b8b2c0 r dcn20_private_funcs +ffffffff82b8c000 r dcn2_mpll_cfg +ffffffff82b8c190 r dcn20_link_enc_funcs +ffffffff82b8d000 R dcn20_mmhubbub_funcs +ffffffff82b8e000 R dcn20_mpc_funcs +ffffffff82b8f000 r tf_regs +ffffffff82b90920 r tf_shift +ffffffff82b90ba4 r tf_mask +ffffffff82b915c0 r ipp_regs +ffffffff82b91710 r ipp_shift +ffffffff82b9172c r ipp_mask +ffffffff82b917a0 r opp_regs +ffffffff82b919b0 r opp_shift +ffffffff82b919e8 r opp_mask +ffffffff82b91ac0 r aux_engine_regs +ffffffff82b91bb0 r aux_mask +ffffffff82b91c10 r aux_shift +ffffffff82b91c30 r i2c_hw_regs +ffffffff82b91d80 r i2c_shifts +ffffffff82b91dac r i2c_masks +ffffffff82b91e50 r mpc_regs +ffffffff82b92398 r mpc_shift +ffffffff82b923e0 r mpc_mask +ffffffff82b924f4 r hubbub_reg +ffffffff82b92668 r hubbub_shift +ffffffff82b926f0 r hubbub_mask +ffffffff82b9290c r res_cap_nv10 +ffffffff82b92950 r vmid_regs +ffffffff82b92b10 r vmid_shifts +ffffffff82b92b18 r vmid_masks +ffffffff82b92b40 r tg_regs +ffffffff82b932c0 r tg_shift +ffffffff82b93380 r tg_mask +ffffffff82b93680 r link_enc_regs +ffffffff82b93e20 r link_enc_aux_regs +ffffffff82b93e80 r link_enc_hpd_regs +ffffffff82b93e98 r le_shift +ffffffff82b93f88 r le_mask +ffffffff82b94340 r stream_enc_regs +ffffffff82b94b38 r se_shift +ffffffff82b94c14 r se_mask +ffffffff82b94f80 r hwseq_reg +ffffffff82b9519c r hwseq_shift +ffffffff82b9521c r hwseq_mask +ffffffff82b95410 r dsc_regs +ffffffff82b958a8 r dsc_shift +ffffffff82b95960 r dsc_mask +ffffffff82b95c40 r hubp_regs +ffffffff82b96888 r hubp_shift +ffffffff82b96984 r hubp_mask +ffffffff82b96d80 r dwbc20_regs +ffffffff82b96e38 r dwbc20_shift +ffffffff82b96eb8 r dwbc20_mask +ffffffff82b970b0 r mcif_wb20_regs +ffffffff82b97190 r mcif_wb20_shift +ffffffff82b97230 r mcif_wb20_mask +ffffffff82b974b0 r link_enc_feature +ffffffff82b974c0 r bios_regs +ffffffff82b974c8 r dcn20_res_pool_funcs +ffffffff82b975b0 r res_cap_nv14 +ffffffff82b975f0 r debug_defaults_drv +ffffffff82b97768 r debug_defaults_diags +ffffffff82b978e0 r clk_src_regs +ffffffff82b97ad8 r dccg_regs +ffffffff82b97bc4 r dccg_shift +ffffffff82b97c5c r dccg_mask +ffffffff82b97ebc r dmcu_regs +ffffffff82b97f18 r dmcu_shift +ffffffff82b97f2c r dmcu_mask +ffffffff82b97f78 r abm_regs +ffffffff82b97fb8 r abm_shift +ffffffff82b97fcc r abm_mask +ffffffff82b98018 r res_create_funcs +ffffffff82b98048 r res_create_maximus_funcs +ffffffff82b98078 r plane_cap +ffffffff82b980b0 r panel_cntl_regs +ffffffff82b980d0 r panel_cntl_shift +ffffffff82b980e0 r panel_cntl_mask +ffffffff82b9811c r cs_shift +ffffffff82b98128 r cs_mask +ffffffff82b98150 r audio_regs +ffffffff82b98284 r audio_shift +ffffffff82b9829c r audio_mask +ffffffff82b99000 r dcn20_str_enc_funcs +ffffffff82b9a000 r dccg201_funcs +ffffffff82b9b000 r hubbub201_funcs +ffffffff82b9c000 r dcn201_funcs +ffffffff82b9c2c0 r dcn201_private_funcs +ffffffff82b9d000 r dcn201_link_enc_funcs +ffffffff82b9e000 R dcn201_mpc_funcs +ffffffff82b9f000 r bios_regs +ffffffff82b9f008 r res_cap_dnc201 +ffffffff82b9f048 r debug_defaults_drv +ffffffff82b9f1c0 r clk_src_regs +ffffffff82b9f268 r dccg_regs +ffffffff82b9f354 r dccg_shift +ffffffff82b9f3ec r dccg_mask +ffffffff82b9f650 r res_create_funcs +ffffffff82b9f680 r res_create_maximus_funcs +ffffffff82b9f6b0 r plane_cap +ffffffff82b9f6e0 r link_enc_regs +ffffffff82b9f970 r link_enc_aux_regs +ffffffff82b9f990 r link_enc_hpd_regs +ffffffff82b9f998 r le_shift +ffffffff82b9fa88 r le_mask +ffffffff82b9fe40 r link_enc_feature +ffffffff82b9fe50 r cs_shift +ffffffff82b9fe5c r cs_mask +ffffffff82b9fe90 r hubp_regs +ffffffff82ba0620 r hubp_shift +ffffffff82ba06f8 r hubp_mask +ffffffff82ba0a60 r ipp_regs +ffffffff82ba0b40 r ipp_shift +ffffffff82ba0b5c r ipp_mask +ffffffff82ba0bd0 r tf_regs +ffffffff82ba1c10 r tf_shift +ffffffff82ba1e94 r tf_mask +ffffffff82ba28b0 r opp_regs +ffffffff82ba2960 r opp_shift +ffffffff82ba2998 r opp_mask +ffffffff82ba2a70 r aux_engine_regs +ffffffff82ba2ac0 r aux_mask +ffffffff82ba2b20 r aux_shift +ffffffff82ba2b40 r i2c_hw_regs +ffffffff82ba2bb0 r i2c_shifts +ffffffff82ba2bdc r i2c_masks +ffffffff82ba2c80 r tg_regs +ffffffff82ba2f00 r tg_shift +ffffffff82ba2fc0 r tg_mask +ffffffff82ba32c0 r mpc_regs +ffffffff82ba3808 r mpc_shift +ffffffff82ba3854 r mpc_mask +ffffffff82ba397c r hubbub_reg +ffffffff82ba3af0 r hubbub_shift +ffffffff82ba3b78 r hubbub_mask +ffffffff82ba3da0 r audio_regs +ffffffff82ba3df8 r audio_shift +ffffffff82ba3e10 r audio_mask +ffffffff82ba3e50 r stream_enc_regs +ffffffff82ba40f8 r se_shift +ffffffff82ba41d4 r se_mask +ffffffff82ba4540 r hwseq_reg +ffffffff82ba475c r hwseq_shift +ffffffff82ba47dc r hwseq_mask +ffffffff82ba5000 r dccg21_funcs +ffffffff82ba6000 r hubbub21_funcs +ffffffff82ba7000 r dcn21_funcs +ffffffff82ba72c0 r dcn21_private_funcs +ffffffff82ba8000 r dcn21_mpll_cfg_ref +ffffffff82ba8190 r dcn21_link_enc_funcs +ffffffff82ba9000 r bios_regs +ffffffff82ba9008 r res_cap_rn +ffffffff82ba9048 r dcn21_res_pool_funcs +ffffffff82ba9130 r debug_defaults_drv +ffffffff82ba92a8 r debug_defaults_diags +ffffffff82ba9420 r clk_src_regs +ffffffff82ba95c4 r dccg_regs +ffffffff82ba96b0 r dccg_shift +ffffffff82ba9748 r dccg_mask +ffffffff82ba99a8 r dmcu_regs +ffffffff82ba9a04 r dmcu_shift +ffffffff82ba9a18 r dmcu_mask +ffffffff82ba9a64 r abm_regs +ffffffff82ba9aa4 r abm_shift +ffffffff82ba9ab8 r abm_mask +ffffffff82ba9b00 r res_create_funcs +ffffffff82ba9b30 r res_create_maximus_funcs +ffffffff82ba9b60 r plane_cap +ffffffff82ba9b90 r panel_cntl_regs +ffffffff82ba9bb0 r panel_cntl_shift +ffffffff82ba9bc0 r panel_cntl_mask +ffffffff82ba9c00 r link_enc_regs +ffffffff82baa260 r link_enc_aux_regs +ffffffff82baa2b0 r link_enc_hpd_regs +ffffffff82baa2c4 r le_shift +ffffffff82baa3b4 r le_mask +ffffffff82baa76c r link_enc_feature +ffffffff82baa77c r panel_config_defaults +ffffffff82baa7b8 r cs_shift +ffffffff82baa7c4 r cs_mask +ffffffff82baa7f0 r hubp_regs +ffffffff82bab020 r hubp_shift +ffffffff82bab11c r hubp_mask +ffffffff82bab510 r ipp_regs +ffffffff82bab5f0 r ipp_shift +ffffffff82bab60c r ipp_mask +ffffffff82bab680 r tf_regs +ffffffff82bac740 r tf_shift +ffffffff82bac9c4 r tf_mask +ffffffff82bad3e0 r opp_regs +ffffffff82bad5f0 r opp_shift +ffffffff82bad628 r opp_mask +ffffffff82bad700 r tg_regs +ffffffff82badc00 r tg_shift +ffffffff82badcc0 r tg_mask +ffffffff82badfc0 r aux_engine_regs +ffffffff82bae088 r aux_mask +ffffffff82bae0e8 r aux_shift +ffffffff82bae100 r i2c_hw_regs +ffffffff82bae218 r i2c_shifts +ffffffff82bae244 r i2c_masks +ffffffff82bae2e8 r mpc_regs +ffffffff82bae830 r mpc_shift +ffffffff82bae878 r mpc_mask +ffffffff82bae98c r hubbub_reg +ffffffff82baeb00 r hubbub_shift +ffffffff82baeb88 r hubbub_mask +ffffffff82baedb0 r vmid_regs +ffffffff82baef70 r vmid_shifts +ffffffff82baef78 r vmid_masks +ffffffff82baefa0 r dsc_regs +ffffffff82baf438 r dsc_shift +ffffffff82baf4f0 r dsc_mask +ffffffff82baf7d0 r audio_regs +ffffffff82baf8d8 r audio_shift +ffffffff82baf8f0 r audio_mask +ffffffff82baf930 r stream_enc_regs +ffffffff82baffd4 r se_shift +ffffffff82bb00b0 r se_mask +ffffffff82bb041c r hwseq_reg +ffffffff82bb0638 r hwseq_shift +ffffffff82bb06b8 r hwseq_mask +ffffffff82bb1000 r dccg3_funcs +ffffffff82bb2000 r dcn30_link_enc_funcs +ffffffff82bb3000 r dcn30_str_enc_funcs +ffffffff82bb4000 r dpp_input_csc_matrix +ffffffff82bb5000 R dcn30_dwbc_funcs +ffffffff82bb6000 r hubbub30_funcs +ffffffff82bb8000 r dcn30_funcs +ffffffff82bb82c0 r dcn30_private_funcs +ffffffff82bb9000 R dcn30_mmhubbub_funcs +ffffffff82bba000 R dcn30_mpc_funcs +ffffffff82bbb000 r bios_regs +ffffffff82bbb008 r res_cap_dcn3 +ffffffff82bbb048 r debug_defaults_drv +ffffffff82bbb1c0 r debug_defaults_diags +ffffffff82bbb340 r clk_src_regs +ffffffff82bbb538 r dccg_regs +ffffffff82bbb624 r dccg_shift +ffffffff82bbb6bc r dccg_mask +ffffffff82bbb920 r abm_regs +ffffffff82bbbaa0 r abm_shift +ffffffff82bbbab4 r abm_mask +ffffffff82bbbb00 r res_create_funcs +ffffffff82bbbb30 r res_create_maximus_funcs +ffffffff82bbbb60 r plane_cap +ffffffff82bbbb90 r dcn30_res_pool_funcs +ffffffff82bbbc80 r panel_cntl_regs +ffffffff82bbbca0 r panel_cntl_shift +ffffffff82bbbcb0 r panel_cntl_mask +ffffffff82bbbcf0 r link_enc_regs +ffffffff82bbc490 r link_enc_aux_regs +ffffffff82bbc4f0 r link_enc_hpd_regs +ffffffff82bbc508 r le_shift +ffffffff82bbc5f8 r le_mask +ffffffff82bbc9b0 r link_enc_feature +ffffffff82bbc9c0 r panel_config_defaults +ffffffff82bbc9fc r cs_shift +ffffffff82bbca08 r cs_mask +ffffffff82bbca30 r hubbub_reg +ffffffff82bbcba4 r hubbub_shift +ffffffff82bbcc2c r hubbub_mask +ffffffff82bbce50 r vmid_regs +ffffffff82bbd010 r vmid_shifts +ffffffff82bbd018 r vmid_masks +ffffffff82bbd040 r hubp_regs +ffffffff82bbdc88 r hubp_shift +ffffffff82bbdd84 r hubp_mask +ffffffff82bbe180 r dpp_regs +ffffffff82bc0100 r tf_shift +ffffffff82bc03d0 r tf_mask +ffffffff82bc0f10 r opp_regs +ffffffff82bc1120 r opp_shift +ffffffff82bc1158 r opp_mask +ffffffff82bc1230 r optc_regs +ffffffff82bc19b0 r optc_shift +ffffffff82bc1a70 r optc_mask +ffffffff82bc1d70 r mpc_regs +ffffffff82bc355c r mpc_shift +ffffffff82bc3638 r mpc_mask +ffffffff82bc39b0 r dsc_regs +ffffffff82bc3e48 r dsc_shift +ffffffff82bc3f00 r dsc_mask +ffffffff82bc41e0 r dwbc30_regs +ffffffff82bc43bc r dwbc30_shift +ffffffff82bc44f0 r dwbc30_mask +ffffffff82bc49c0 r mcif_wb30_regs +ffffffff82bc4abc r mcif_wb30_shift +ffffffff82bc4b68 r mcif_wb30_mask +ffffffff82bc4e20 r aux_engine_regs +ffffffff82bc4f10 r aux_mask +ffffffff82bc4f70 r aux_shift +ffffffff82bc4f90 r i2c_hw_regs +ffffffff82bc50e0 r i2c_shifts +ffffffff82bc510c r i2c_masks +ffffffff82bc51b0 r audio_regs +ffffffff82bc52e4 r audio_shift +ffffffff82bc52fc r audio_mask +ffffffff82bc5340 r stream_enc_regs +ffffffff82bc5b38 r se_shift +ffffffff82bc5c14 r se_mask +ffffffff82bc5f80 r vpg_regs +ffffffff82bc600c r vpg_shift +ffffffff82bc6034 r vpg_mask +ffffffff82bc60d0 r afmt_regs +ffffffff82bc61cc r afmt_shift +ffffffff82bc61e0 r afmt_mask +ffffffff82bc6224 r hwseq_reg +ffffffff82bc6440 r hwseq_shift +ffffffff82bc64c0 r hwseq_mask +ffffffff82bc7000 r dccg301_funcs +ffffffff82bc8000 r dcn301_link_enc_funcs +ffffffff82bc9000 r hubbub301_funcs +ffffffff82bca000 r dcn301_funcs +ffffffff82bca2c0 r dcn301_private_funcs +ffffffff82bcb000 r dcn301_link_panel_cntl_funcs +ffffffff82bcc000 r bios_regs +ffffffff82bcc008 r debug_defaults_drv +ffffffff82bcc180 r debug_defaults_diags +ffffffff82bcc300 r clk_src_regs +ffffffff82bcc450 r dccg_regs +ffffffff82bcc53c r dccg_shift +ffffffff82bcc5d4 r dccg_mask +ffffffff82bcc840 r abm_regs +ffffffff82bcc940 r abm_shift +ffffffff82bcc954 r abm_mask +ffffffff82bcc9a0 r res_create_funcs +ffffffff82bcc9d0 r res_create_maximus_funcs +ffffffff82bcca00 r plane_cap +ffffffff82bcca30 r panel_cntl_regs +ffffffff82bcca70 r panel_cntl_shift +ffffffff82bcca80 r panel_cntl_mask +ffffffff82bccac0 r link_enc_regs +ffffffff82bccfd0 r link_enc_aux_regs +ffffffff82bcd010 r link_enc_hpd_regs +ffffffff82bcd020 r le_shift +ffffffff82bcd110 r le_mask +ffffffff82bcd4c8 r link_enc_feature +ffffffff82bcd4d8 r cs_shift +ffffffff82bcd4e4 r cs_mask +ffffffff82bcd50c r hubbub_reg +ffffffff82bcd680 r hubbub_shift +ffffffff82bcd708 r hubbub_mask +ffffffff82bcd930 r vmid_regs +ffffffff82bcdaf0 r vmid_shifts +ffffffff82bcdaf8 r vmid_masks +ffffffff82bcdb20 r hubp_regs +ffffffff82bce350 r hubp_shift +ffffffff82bce44c r hubp_mask +ffffffff82bce840 r dpp_regs +ffffffff82bcfd40 r tf_shift +ffffffff82bd0010 r tf_mask +ffffffff82bd0b50 r opp_regs +ffffffff82bd0cb0 r opp_shift +ffffffff82bd0ce8 r opp_mask +ffffffff82bd0dc0 r optc_regs +ffffffff82bd12c0 r optc_shift +ffffffff82bd1380 r optc_mask +ffffffff82bd1680 r mpc_regs +ffffffff82bd2e6c r mpc_shift +ffffffff82bd2f48 r mpc_mask +ffffffff82bd32c0 r dsc_regs +ffffffff82bd350c r dsc_shift +ffffffff82bd35c4 r dsc_mask +ffffffff82bd38a0 r dwbc30_regs +ffffffff82bd3a7c r dwbc30_shift +ffffffff82bd3bb0 r dwbc30_mask +ffffffff82bd4080 r mcif_wb30_regs +ffffffff82bd417c r mcif_wb30_shift +ffffffff82bd4228 r mcif_wb30_mask +ffffffff82bd44e0 r aux_engine_regs +ffffffff82bd4580 r aux_mask +ffffffff82bd45e0 r aux_shift +ffffffff82bd4600 r i2c_hw_regs +ffffffff82bd46e0 r i2c_shifts +ffffffff82bd470c r i2c_masks +ffffffff82bd47b0 r audio_regs +ffffffff82bd48e4 r audio_shift +ffffffff82bd48fc r audio_mask +ffffffff82bd4940 r stream_enc_regs +ffffffff82bd4e90 r se_shift +ffffffff82bd4f6c r se_mask +ffffffff82bd52e0 r vpg_regs +ffffffff82bd5330 r vpg_shift +ffffffff82bd5358 r vpg_mask +ffffffff82bd53f0 r afmt_regs +ffffffff82bd5480 r afmt_shift +ffffffff82bd5494 r afmt_mask +ffffffff82bd54d8 r hwseq_reg +ffffffff82bd56f4 r hwseq_shift +ffffffff82bd5774 r hwseq_mask +ffffffff82bd6000 r bios_regs +ffffffff82bd6008 r res_cap_dcn302 +ffffffff82bd6048 r debug_defaults_drv +ffffffff82bd61c0 r debug_defaults_diags +ffffffff82bd6340 r clk_src_regs +ffffffff82bd64e4 r dccg_regs +ffffffff82bd65d0 r dccg_shift +ffffffff82bd6668 r dccg_mask +ffffffff82bd68d0 r abm_regs +ffffffff82bd6a10 r abm_shift +ffffffff82bd6a24 r abm_mask +ffffffff82bd6a70 r res_create_funcs +ffffffff82bd6aa0 r res_create_maximus_funcs +ffffffff82bd6ad0 r plane_cap +ffffffff82bd6b00 r panel_cntl_regs +ffffffff82bd6b20 r panel_cntl_shift +ffffffff82bd6b30 r panel_cntl_mask +ffffffff82bd6b70 r link_enc_regs +ffffffff82bd71d0 r link_enc_aux_regs +ffffffff82bd7220 r link_enc_hpd_regs +ffffffff82bd7234 r le_shift +ffffffff82bd7324 r le_mask +ffffffff82bd76dc r link_enc_feature +ffffffff82bd76ec r panel_config_defaults +ffffffff82bd7728 r cs_shift +ffffffff82bd7734 r cs_mask +ffffffff82bd775c r hubbub_reg +ffffffff82bd78d0 r hubbub_shift +ffffffff82bd7958 r hubbub_mask +ffffffff82bd7b80 r vmid_regs +ffffffff82bd7d40 r vmid_shifts +ffffffff82bd7d48 r vmid_masks +ffffffff82bd7d70 r hubp_regs +ffffffff82bd87ac r hubp_shift +ffffffff82bd88a8 r hubp_mask +ffffffff82bd8ca0 r dpp_regs +ffffffff82bda6e0 r tf_shift +ffffffff82bda9b0 r tf_mask +ffffffff82bdb4f0 r opp_regs +ffffffff82bdb6a8 r opp_shift +ffffffff82bdb6e0 r opp_mask +ffffffff82bdb7c0 r optc_regs +ffffffff82bdbe00 r optc_shift +ffffffff82bdbec0 r optc_mask +ffffffff82bdc1c0 r mpc_regs +ffffffff82bdd9ac r mpc_shift +ffffffff82bdda88 r mpc_mask +ffffffff82bdde00 r dsc_regs +ffffffff82bde1d4 r dsc_shift +ffffffff82bde28c r dsc_mask +ffffffff82bde570 r dwbc30_regs +ffffffff82bde74c r dwbc30_shift +ffffffff82bde880 r dwbc30_mask +ffffffff82bded50 r mcif_wb30_regs +ffffffff82bdee4c r mcif_wb30_shift +ffffffff82bdeef8 r mcif_wb30_mask +ffffffff82bdf1b0 r aux_engine_regs +ffffffff82bdf278 r aux_mask +ffffffff82bdf2d8 r aux_shift +ffffffff82bdf2f0 r i2c_hw_regs +ffffffff82bdf408 r i2c_shifts +ffffffff82bdf434 r i2c_masks +ffffffff82bdf4e0 r audio_regs +ffffffff82bdf614 r audio_shift +ffffffff82bdf62c r audio_mask +ffffffff82bdf670 r stream_enc_regs +ffffffff82bdfd14 r se_shift +ffffffff82bdfdf0 r se_mask +ffffffff82be0160 r vpg_regs +ffffffff82be01d8 r vpg_shift +ffffffff82be0200 r vpg_mask +ffffffff82be02a0 r afmt_regs +ffffffff82be0378 r afmt_shift +ffffffff82be038c r afmt_mask +ffffffff82be03d0 r hwseq_reg +ffffffff82be05ec r hwseq_shift +ffffffff82be066c r hwseq_mask +ffffffff82be1000 r bios_regs +ffffffff82be1008 r res_cap_dcn303 +ffffffff82be1048 r debug_defaults_drv +ffffffff82be11c0 r debug_defaults_diags +ffffffff82be1340 r clk_src_regs +ffffffff82be13e8 r dccg_regs +ffffffff82be14d4 r dccg_shift +ffffffff82be156c r dccg_mask +ffffffff82be17d0 r abm_regs +ffffffff82be1850 r abm_shift +ffffffff82be1864 r abm_mask +ffffffff82be18b0 r res_create_funcs +ffffffff82be18e0 r res_create_maximus_funcs +ffffffff82be1910 r plane_cap +ffffffff82be1940 r panel_cntl_regs +ffffffff82be1960 r panel_cntl_shift +ffffffff82be1970 r panel_cntl_mask +ffffffff82be19b0 r link_enc_regs +ffffffff82be1c40 r link_enc_aux_regs +ffffffff82be1c60 r link_enc_hpd_regs +ffffffff82be1c68 r le_shift +ffffffff82be1d58 r le_mask +ffffffff82be2110 r link_enc_feature +ffffffff82be2120 r panel_config_defaults +ffffffff82be215c r cs_shift +ffffffff82be2168 r cs_mask +ffffffff82be2190 r hubbub_reg +ffffffff82be2304 r hubbub_shift +ffffffff82be238c r hubbub_mask +ffffffff82be25b0 r vmid_regs +ffffffff82be2770 r vmid_shifts +ffffffff82be2778 r vmid_masks +ffffffff82be27a0 r hubp_regs +ffffffff82be2bb8 r hubp_shift +ffffffff82be2cb4 r hubp_mask +ffffffff82be30b0 r dpp_regs +ffffffff82be3b30 r tf_shift +ffffffff82be3e00 r tf_mask +ffffffff82be4940 r opp_regs +ffffffff82be49f0 r opp_shift +ffffffff82be4a28 r opp_mask +ffffffff82be4b00 r optc_regs +ffffffff82be4d80 r optc_shift +ffffffff82be4e40 r optc_mask +ffffffff82be5140 r mpc_regs +ffffffff82be692c r mpc_shift +ffffffff82be6a08 r mpc_mask +ffffffff82be6d80 r dsc_regs +ffffffff82be6f08 r dsc_shift +ffffffff82be6fc0 r dsc_mask +ffffffff82be72a0 r dwbc30_regs +ffffffff82be747c r dwbc30_shift +ffffffff82be75b0 r dwbc30_mask +ffffffff82be7a80 r mcif_wb30_regs +ffffffff82be7b7c r mcif_wb30_shift +ffffffff82be7c28 r mcif_wb30_mask +ffffffff82be7ee0 r aux_engine_regs +ffffffff82be7f30 r aux_mask +ffffffff82be7f90 r aux_shift +ffffffff82be7fb0 r i2c_hw_regs +ffffffff82be8020 r i2c_shifts +ffffffff82be804c r i2c_masks +ffffffff82be80f0 r audio_regs +ffffffff82be8224 r audio_shift +ffffffff82be823c r audio_mask +ffffffff82be8280 r stream_enc_regs +ffffffff82be8528 r se_shift +ffffffff82be8604 r se_mask +ffffffff82be8970 r vpg_regs +ffffffff82be89ac r vpg_shift +ffffffff82be89d4 r vpg_mask +ffffffff82be8a70 r afmt_regs +ffffffff82be8adc r afmt_shift +ffffffff82be8af0 r afmt_mask +ffffffff82be8b34 r hwseq_reg +ffffffff82be8d50 r hwseq_shift +ffffffff82be8dd0 r hwseq_mask +ffffffff82be9000 r dccg31_funcs +ffffffff82bea000 r dcn31_link_enc_funcs +ffffffff82beb000 r dcn30_str_enc_funcs +ffffffff82bec000 r hubbub31_funcs +ffffffff82bed000 r dcn31_funcs +ffffffff82bed2c0 r dcn31_private_funcs +ffffffff82bee000 r dcn31_link_panel_cntl_funcs +ffffffff82bef000 r bios_regs +ffffffff82bef008 r res_cap_dcn31 +ffffffff82bef048 r debug_defaults_diags +ffffffff82bef1c0 r clk_src_regs +ffffffff82bef370 r clk_src_regs_b0 +ffffffff82bef514 r dccg_regs +ffffffff82bef600 r dccg_shift +ffffffff82bef698 r dccg_mask +ffffffff82bef900 r abm_regs +ffffffff82befa00 r abm_shift +ffffffff82befa14 r abm_mask +ffffffff82befa60 r res_create_funcs +ffffffff82befa90 r res_create_maximus_funcs +ffffffff82befac0 r plane_cap +ffffffff82befaf0 r link_enc_regs +ffffffff82bf0150 r link_enc_aux_regs +ffffffff82bf01a0 r link_enc_hpd_regs +ffffffff82bf01b4 r le_shift +ffffffff82bf02a4 r le_mask +ffffffff82bf065c r link_enc_feature +ffffffff82bf066c r panel_config_defaults +ffffffff82bf06a8 r debug_defaults_drv +ffffffff82bf0820 r cs_shift +ffffffff82bf082c r cs_mask +ffffffff82bf0854 r hubbub_reg +ffffffff82bf09c8 r hubbub_shift +ffffffff82bf0a50 r hubbub_mask +ffffffff82bf0c70 r vmid_regs +ffffffff82bf0e30 r vmid_shifts +ffffffff82bf0e38 r vmid_masks +ffffffff82bf0e60 r hubp_regs +ffffffff82bf1690 r hubp_shift +ffffffff82bf178c r hubp_mask +ffffffff82bf1b80 r dpp_regs +ffffffff82bf3080 r tf_shift +ffffffff82bf3350 r tf_mask +ffffffff82bf3e90 r opp_regs +ffffffff82bf3ff0 r opp_shift +ffffffff82bf4028 r opp_mask +ffffffff82bf4100 r optc_regs +ffffffff82bf4600 r optc_shift +ffffffff82bf46c0 r optc_mask +ffffffff82bf49c0 r mpc_regs +ffffffff82bf61ac r mpc_shift +ffffffff82bf6288 r mpc_mask +ffffffff82bf6600 r dsc_regs +ffffffff82bf684c r dsc_shift +ffffffff82bf6904 r dsc_mask +ffffffff82bf6be0 r dwbc30_regs +ffffffff82bf6dbc r dwbc30_shift +ffffffff82bf6ef0 r dwbc30_mask +ffffffff82bf73c0 r mcif_wb30_regs +ffffffff82bf74bc r mcif_wb30_shift +ffffffff82bf7568 r mcif_wb30_mask +ffffffff82bf7820 r aux_engine_regs +ffffffff82bf78e8 r aux_mask +ffffffff82bf7948 r aux_shift +ffffffff82bf7960 r i2c_hw_regs +ffffffff82bf7a78 r i2c_shifts +ffffffff82bf7aa4 r i2c_masks +ffffffff82bf7b50 r audio_regs +ffffffff82bf7c84 r audio_shift +ffffffff82bf7c9c r audio_mask +ffffffff82bf7cd8 r se_shift +ffffffff82bf7db4 r se_mask +ffffffff82bf8120 r vpg_regs +ffffffff82bf8210 r vpg_shift +ffffffff82bf8238 r vpg_mask +ffffffff82bf82e0 r afmt_regs +ffffffff82bf83b8 r afmt_shift +ffffffff82bf83cc r afmt_mask +ffffffff82bf8420 r stream_enc_regs +ffffffff82bf9ac0 r hpo_dp_stream_enc_regs +ffffffff82bf9cf0 r hpo_dp_se_shift +ffffffff82bf9d18 r hpo_dp_se_mask +ffffffff82bf9dc0 r apg_regs +ffffffff82bf9e00 r apg_shift +ffffffff82bf9e08 r apg_mask +ffffffff82bf9e20 r hpo_dp_link_enc_regs +ffffffff82bf9f30 r hpo_dp_le_shift +ffffffff82bf9f4c r hpo_dp_le_mask +ffffffff82bf9fb0 r hwseq_reg +ffffffff82bfa1cc r hwseq_shift +ffffffff82bfa24c r hwseq_mask +ffffffff82bfb000 r dccg314_funcs +ffffffff82bfc000 r dcn314_str_enc_funcs +ffffffff82bfd000 r dcn314_funcs +ffffffff82bfd2c0 r dcn314_private_funcs +ffffffff82bfe000 r bios_regs +ffffffff82bfe008 r res_cap_dcn314 +ffffffff82bfe048 r debug_defaults_diags +ffffffff82bfe1c0 r clk_src_regs +ffffffff82bfe364 r dccg_regs +ffffffff82bfe450 r dccg_shift +ffffffff82bfe4e8 r dccg_mask +ffffffff82bfe750 r abm_regs +ffffffff82bfe850 r abm_shift +ffffffff82bfe864 r abm_mask +ffffffff82bfe8b0 r res_create_funcs +ffffffff82bfe8e0 r res_create_maximus_funcs +ffffffff82bfe910 r plane_cap +ffffffff82bfe940 r link_enc_regs +ffffffff82bfefa0 r link_enc_aux_regs +ffffffff82bfeff0 r link_enc_hpd_regs +ffffffff82bff004 r le_shift +ffffffff82bff0f4 r le_mask +ffffffff82bff4ac r link_enc_feature +ffffffff82bff4bc r panel_config_defaults +ffffffff82bff4f8 r debug_defaults_drv +ffffffff82bff670 r cs_shift +ffffffff82bff67c r cs_mask +ffffffff82bff6a4 r hubbub_reg +ffffffff82bff818 r hubbub_shift +ffffffff82bff8a0 r hubbub_mask +ffffffff82bffac0 r vmid_regs +ffffffff82bffc80 r vmid_shifts +ffffffff82bffc88 r vmid_masks +ffffffff82bffcb0 r hubp_regs +ffffffff82c004e0 r hubp_shift +ffffffff82c005dc r hubp_mask +ffffffff82c009d0 r dpp_regs +ffffffff82c01ed0 r tf_shift +ffffffff82c021a0 r tf_mask +ffffffff82c02ce0 r opp_regs +ffffffff82c02e40 r opp_shift +ffffffff82c02e78 r opp_mask +ffffffff82c02f50 r optc_regs +ffffffff82c03450 r optc_shift +ffffffff82c03510 r optc_mask +ffffffff82c03810 r mpc_regs +ffffffff82c04ffc r mpc_shift +ffffffff82c050d8 r mpc_mask +ffffffff82c05450 r dsc_regs +ffffffff82c05760 r dsc_shift +ffffffff82c05818 r dsc_mask +ffffffff82c05af0 r dwbc30_regs +ffffffff82c05ccc r dwbc30_shift +ffffffff82c05e00 r dwbc30_mask +ffffffff82c062d0 r mcif_wb30_regs +ffffffff82c063cc r mcif_wb30_shift +ffffffff82c06478 r mcif_wb30_mask +ffffffff82c06730 r aux_engine_regs +ffffffff82c067f8 r aux_mask +ffffffff82c06858 r aux_shift +ffffffff82c06870 r i2c_hw_regs +ffffffff82c06988 r i2c_shifts +ffffffff82c069b4 r i2c_masks +ffffffff82c06a60 r audio_regs +ffffffff82c06b94 r audio_shift +ffffffff82c06bac r audio_mask +ffffffff82c06bf0 r stream_enc_regs +ffffffff82c07294 r se_shift +ffffffff82c07370 r se_mask +ffffffff82c076e0 r vpg_regs +ffffffff82c077d0 r vpg_shift +ffffffff82c077f8 r vpg_mask +ffffffff82c078a0 r afmt_regs +ffffffff82c07978 r afmt_shift +ffffffff82c0798c r afmt_mask +ffffffff82c079e0 r hpo_dp_stream_enc_regs +ffffffff82c07c10 r hpo_dp_se_shift +ffffffff82c07c38 r hpo_dp_se_mask +ffffffff82c07ce0 r apg_regs +ffffffff82c07d20 r apg_shift +ffffffff82c07d28 r apg_mask +ffffffff82c07d40 r hpo_dp_link_enc_regs +ffffffff82c07e50 r hpo_dp_le_shift +ffffffff82c07e6c r hpo_dp_le_mask +ffffffff82c07ed0 r hwseq_reg +ffffffff82c080ec r hwseq_shift +ffffffff82c0816c r hwseq_mask +ffffffff82c09000 r bios_regs +ffffffff82c09008 r res_cap_dcn31 +ffffffff82c09048 r debug_defaults_diags +ffffffff82c091c0 r clk_src_regs +ffffffff82c09364 r dccg_regs +ffffffff82c09450 r dccg_shift +ffffffff82c094e8 r dccg_mask +ffffffff82c09750 r abm_regs +ffffffff82c09850 r abm_shift +ffffffff82c09864 r abm_mask +ffffffff82c098b0 r res_create_funcs +ffffffff82c098e0 r res_create_maximus_funcs +ffffffff82c09910 r plane_cap +ffffffff82c09940 r link_enc_regs +ffffffff82c09fa0 r link_enc_aux_regs +ffffffff82c09ff0 r link_enc_hpd_regs +ffffffff82c0a004 r le_shift +ffffffff82c0a0f4 r le_mask +ffffffff82c0a4ac r link_enc_feature +ffffffff82c0a4bc r panel_config_defaults +ffffffff82c0a4f8 r debug_defaults_drv +ffffffff82c0a670 r cs_shift +ffffffff82c0a67c r cs_mask +ffffffff82c0a6a4 r hubbub_reg +ffffffff82c0a818 r hubbub_shift +ffffffff82c0a8a0 r hubbub_mask +ffffffff82c0aac0 r vmid_regs +ffffffff82c0ac80 r vmid_shifts +ffffffff82c0ac88 r vmid_masks +ffffffff82c0acb0 r hubp_regs +ffffffff82c0b4e0 r hubp_shift +ffffffff82c0b5dc r hubp_mask +ffffffff82c0b9d0 r dpp_regs +ffffffff82c0ced0 r tf_shift +ffffffff82c0d1a0 r tf_mask +ffffffff82c0dce0 r opp_regs +ffffffff82c0de40 r opp_shift +ffffffff82c0de78 r opp_mask +ffffffff82c0df50 r optc_regs +ffffffff82c0e450 r optc_shift +ffffffff82c0e510 r optc_mask +ffffffff82c0e810 r mpc_regs +ffffffff82c0fffc r mpc_shift +ffffffff82c100d8 r mpc_mask +ffffffff82c10450 r dsc_regs +ffffffff82c1069c r dsc_shift +ffffffff82c10754 r dsc_mask +ffffffff82c10a30 r dwbc30_regs +ffffffff82c10c0c r dwbc30_shift +ffffffff82c10d40 r dwbc30_mask +ffffffff82c11210 r mcif_wb30_regs +ffffffff82c1130c r mcif_wb30_shift +ffffffff82c113b8 r mcif_wb30_mask +ffffffff82c11670 r aux_engine_regs +ffffffff82c11738 r aux_mask +ffffffff82c11798 r aux_shift +ffffffff82c117b0 r i2c_hw_regs +ffffffff82c118c8 r i2c_shifts +ffffffff82c118f4 r i2c_masks +ffffffff82c119a0 r audio_regs +ffffffff82c11ad4 r audio_shift +ffffffff82c11aec r audio_mask +ffffffff82c11b30 r stream_enc_regs +ffffffff82c121d4 r se_shift +ffffffff82c122b0 r se_mask +ffffffff82c12620 r vpg_regs +ffffffff82c12710 r vpg_shift +ffffffff82c12738 r vpg_mask +ffffffff82c127e0 r afmt_regs +ffffffff82c128b8 r afmt_shift +ffffffff82c128cc r afmt_mask +ffffffff82c12920 r hpo_dp_stream_enc_regs +ffffffff82c12b50 r hpo_dp_se_shift +ffffffff82c12b78 r hpo_dp_se_mask +ffffffff82c12c20 r apg_regs +ffffffff82c12c60 r apg_shift +ffffffff82c12c68 r apg_mask +ffffffff82c12c80 r hpo_dp_link_enc_regs +ffffffff82c12d90 r hpo_dp_le_shift +ffffffff82c12dac r hpo_dp_le_mask +ffffffff82c12e10 r hwseq_reg +ffffffff82c1302c r hwseq_shift +ffffffff82c130ac r hwseq_mask +ffffffff82c14000 r bios_regs +ffffffff82c14008 r res_cap_dcn31 +ffffffff82c14048 r debug_defaults_diags +ffffffff82c141c0 r clk_src_regs +ffffffff82c14364 r dccg_regs +ffffffff82c14450 r dccg_shift +ffffffff82c144e8 r dccg_mask +ffffffff82c14750 r abm_regs +ffffffff82c14850 r abm_shift +ffffffff82c14864 r abm_mask +ffffffff82c148b0 r res_create_funcs +ffffffff82c148e0 r res_create_maximus_funcs +ffffffff82c14910 r plane_cap +ffffffff82c14940 r link_enc_regs +ffffffff82c14fa0 r link_enc_aux_regs +ffffffff82c14ff0 r link_enc_hpd_regs +ffffffff82c15004 r le_shift +ffffffff82c150f4 r le_mask +ffffffff82c154ac r link_enc_feature +ffffffff82c154bc r panel_config_defaults +ffffffff82c154f8 r debug_defaults_drv +ffffffff82c15670 r cs_shift +ffffffff82c1567c r cs_mask +ffffffff82c156a4 r hubbub_reg +ffffffff82c15818 r hubbub_shift +ffffffff82c158a0 r hubbub_mask +ffffffff82c15ac0 r vmid_regs +ffffffff82c15c80 r vmid_shifts +ffffffff82c15c88 r vmid_masks +ffffffff82c15cb0 r hubp_regs +ffffffff82c164e0 r hubp_shift +ffffffff82c165dc r hubp_mask +ffffffff82c169d0 r dpp_regs +ffffffff82c17ed0 r tf_shift +ffffffff82c181a0 r tf_mask +ffffffff82c18ce0 r opp_regs +ffffffff82c18e40 r opp_shift +ffffffff82c18e78 r opp_mask +ffffffff82c18f50 r optc_regs +ffffffff82c19450 r optc_shift +ffffffff82c19510 r optc_mask +ffffffff82c19810 r mpc_regs +ffffffff82c1affc r mpc_shift +ffffffff82c1b0d8 r mpc_mask +ffffffff82c1b450 r dsc_regs +ffffffff82c1b69c r dsc_shift +ffffffff82c1b754 r dsc_mask +ffffffff82c1ba30 r dwbc30_regs +ffffffff82c1bc0c r dwbc30_shift +ffffffff82c1bd40 r dwbc30_mask +ffffffff82c1c210 r mcif_wb30_regs +ffffffff82c1c30c r mcif_wb30_shift +ffffffff82c1c3b8 r mcif_wb30_mask +ffffffff82c1c670 r aux_engine_regs +ffffffff82c1c738 r aux_mask +ffffffff82c1c798 r aux_shift +ffffffff82c1c7b0 r i2c_hw_regs +ffffffff82c1c8c8 r i2c_shifts +ffffffff82c1c8f4 r i2c_masks +ffffffff82c1c9a0 r audio_regs +ffffffff82c1cad4 r audio_shift +ffffffff82c1caec r audio_mask +ffffffff82c1cb30 r stream_enc_regs +ffffffff82c1d1d4 r se_shift +ffffffff82c1d2b0 r se_mask +ffffffff82c1d620 r vpg_regs +ffffffff82c1d710 r vpg_shift +ffffffff82c1d738 r vpg_mask +ffffffff82c1d7e0 r afmt_regs +ffffffff82c1d8b8 r afmt_shift +ffffffff82c1d8cc r afmt_mask +ffffffff82c1d920 r hpo_dp_stream_enc_regs +ffffffff82c1db50 r hpo_dp_se_shift +ffffffff82c1db78 r hpo_dp_se_mask +ffffffff82c1dc20 r apg_regs +ffffffff82c1dc60 r apg_shift +ffffffff82c1dc68 r apg_mask +ffffffff82c1dc80 r hpo_dp_link_enc_regs +ffffffff82c1dd90 r hpo_dp_le_shift +ffffffff82c1ddac r hpo_dp_le_mask +ffffffff82c1de10 r hwseq_reg +ffffffff82c1e02c r hwseq_shift +ffffffff82c1e0ac r hwseq_mask +ffffffff82c1f000 r dccg32_funcs +ffffffff82c20000 r dcn32_link_enc_funcs +ffffffff82c21000 r dcn32_str_enc_funcs +ffffffff82c22000 r hubbub32_funcs +ffffffff82c23000 r dcn32_funcs +ffffffff82c232c0 r dcn32_private_funcs +ffffffff82c24000 R dcn32_mmhubbub_funcs +ffffffff82c25000 R dcn32_mpc_funcs +ffffffff82c26000 r res_cap_dcn32 +ffffffff82c26040 r debug_defaults_diags +ffffffff82c261b8 r dccg_shift +ffffffff82c26250 r dccg_mask +ffffffff82c264b0 r abm_shift +ffffffff82c264c4 r abm_mask +ffffffff82c26510 r res_create_funcs +ffffffff82c26540 r res_create_maximus_funcs +ffffffff82c26570 r plane_cap +ffffffff82c2659c r le_shift +ffffffff82c2668c r le_mask +ffffffff82c26a44 r link_enc_feature +ffffffff82c26a58 r debug_defaults_drv +ffffffff82c26bd0 r cs_shift +ffffffff82c26bdc r cs_mask +ffffffff82c26c04 r hubbub_shift +ffffffff82c26c8c r hubbub_mask +ffffffff82c26ea8 r vmid_shifts +ffffffff82c26eb0 r vmid_masks +ffffffff82c26ed0 r hubp_shift +ffffffff82c26fcc r hubp_mask +ffffffff82c273bc r tf_shift +ffffffff82c2768c r tf_mask +ffffffff82c281cc r opp_shift +ffffffff82c28204 r opp_mask +ffffffff82c282d8 r optc_shift +ffffffff82c28398 r optc_mask +ffffffff82c28698 r mpc_shift +ffffffff82c28774 r mpc_mask +ffffffff82c28ae0 r dsc_shift +ffffffff82c28b98 r dsc_mask +ffffffff82c28e70 r dwbc30_shift +ffffffff82c28fa4 r dwbc30_mask +ffffffff82c2946c r mcif_wb30_shift +ffffffff82c29518 r mcif_wb30_mask +ffffffff82c297c4 r aux_mask +ffffffff82c29824 r aux_shift +ffffffff82c2983c r i2c_shifts +ffffffff82c29868 r i2c_masks +ffffffff82c2990c r audio_shift +ffffffff82c29924 r audio_mask +ffffffff82c29960 r se_shift +ffffffff82c29a3c r se_mask +ffffffff82c29da8 r vpg_shift +ffffffff82c29dd0 r vpg_mask +ffffffff82c29e64 r afmt_shift +ffffffff82c29e78 r afmt_mask +ffffffff82c29ebc r hpo_dp_se_shift +ffffffff82c29ee4 r hpo_dp_se_mask +ffffffff82c29f84 r apg_shift +ffffffff82c29f8c r apg_mask +ffffffff82c29fa4 r hpo_dp_le_shift +ffffffff82c29fc0 r hpo_dp_le_mask +ffffffff82c2a024 r hwseq_shift +ffffffff82c2a0a4 r hwseq_mask +ffffffff82c2b000 r dcn321_link_enc_funcs +ffffffff82c2c000 r res_cap_dcn321 +ffffffff82c2c040 r debug_defaults_diags +ffffffff82c2c1b8 r dccg_shift +ffffffff82c2c250 r dccg_mask +ffffffff82c2c4b0 r abm_shift +ffffffff82c2c4c4 r abm_mask +ffffffff82c2c510 r res_create_funcs +ffffffff82c2c540 r res_create_maximus_funcs +ffffffff82c2c570 r plane_cap +ffffffff82c2c59c r le_shift +ffffffff82c2c68c r le_mask +ffffffff82c2ca44 r link_enc_feature +ffffffff82c2ca58 r debug_defaults_drv +ffffffff82c2cbd0 r cs_shift +ffffffff82c2cbdc r cs_mask +ffffffff82c2cc04 r hubbub_shift +ffffffff82c2cc8c r hubbub_mask +ffffffff82c2cea8 r vmid_shifts +ffffffff82c2ceb0 r vmid_masks +ffffffff82c2ced0 r hubp_shift +ffffffff82c2cfcc r hubp_mask +ffffffff82c2d3bc r tf_shift +ffffffff82c2d68c r tf_mask +ffffffff82c2e1cc r opp_shift +ffffffff82c2e204 r opp_mask +ffffffff82c2e2d8 r optc_shift +ffffffff82c2e398 r optc_mask +ffffffff82c2e698 r mpc_shift +ffffffff82c2e774 r mpc_mask +ffffffff82c2eae0 r dsc_shift +ffffffff82c2eb98 r dsc_mask +ffffffff82c2ee70 r dwbc30_shift +ffffffff82c2efa4 r dwbc30_mask +ffffffff82c2f46c r mcif_wb30_shift +ffffffff82c2f518 r mcif_wb30_mask +ffffffff82c2f7c4 r aux_mask +ffffffff82c2f824 r aux_shift +ffffffff82c2f83c r i2c_shifts +ffffffff82c2f868 r i2c_masks +ffffffff82c2f90c r audio_shift +ffffffff82c2f924 r audio_mask +ffffffff82c2f960 r se_shift +ffffffff82c2fa3c r se_mask +ffffffff82c2fda8 r vpg_shift +ffffffff82c2fdd0 r vpg_mask +ffffffff82c2fe64 r afmt_shift +ffffffff82c2fe78 r afmt_mask +ffffffff82c2febc r hpo_dp_se_shift +ffffffff82c2fee4 r hpo_dp_se_mask +ffffffff82c2ff84 r apg_shift +ffffffff82c2ff8c r apg_mask +ffffffff82c2ffa4 r hpo_dp_le_shift +ffffffff82c2ffc0 r hpo_dp_le_mask +ffffffff82c30024 r hwseq_shift +ffffffff82c300a4 r hwseq_mask +ffffffff82c32000 R dcn10_soc_defaults +ffffffff82c3208c R dcn10_ip_defaults +ffffffff82c3d000 R dml20_funcs +ffffffff82c3d030 R dml20v2_funcs +ffffffff82c3d060 R dml21_funcs +ffffffff82c3d090 R dml30_funcs +ffffffff82c3d0c0 R dml31_funcs +ffffffff82c3d0f0 R dml314_funcs +ffffffff82c3d120 R dml32_funcs +ffffffff82c40000 R qp_table_422_10bpc_min +ffffffff82c40740 R qp_table_444_8bpc_max +ffffffff82c41080 R qp_table_420_12bpc_max +ffffffff82c417c0 R qp_table_444_10bpc_min +ffffffff82c42400 R qp_table_420_8bpc_max +ffffffff82c42840 R qp_table_444_8bpc_min +ffffffff82c43180 R qp_table_444_12bpc_min +ffffffff82c440c0 R qp_table_420_12bpc_min +ffffffff82c44800 R qp_table_422_12bpc_min +ffffffff82c45140 R qp_table_422_12bpc_max +ffffffff82c45a80 R qp_table_444_12bpc_max +ffffffff82c469c0 R qp_table_420_8bpc_min +ffffffff82c46e00 R qp_table_422_8bpc_min +ffffffff82c47340 R qp_table_422_10bpc_max +ffffffff82c47a80 R qp_table_420_10bpc_max +ffffffff82c48040 R qp_table_420_10bpc_min +ffffffff82c48600 R qp_table_444_10bpc_max +ffffffff82c49240 R qp_table_422_8bpc_max +ffffffff82c4b000 r funcs +ffffffff82c4b050 r hpd_regs +ffffffff82c4b1a0 r hpd_shift +ffffffff82c4b1b0 r hpd_mask +ffffffff82c4b1c0 r ddc_data_regs +ffffffff82c4b3a0 r ddc_clk_regs +ffffffff82c4b580 r ddc_shift +ffffffff82c4b5a8 r ddc_mask ffffffff82c4c000 r funcs -ffffffff82c4c050 r hpd_regs -ffffffff82c4c1a0 r hpd_shift -ffffffff82c4c1b0 r hpd_mask -ffffffff82c4c1c0 r ddc_data_regs -ffffffff82c4c3a0 r ddc_clk_regs -ffffffff82c4c580 r ddc_shift -ffffffff82c4c5a8 r ddc_mask ffffffff82c4d000 r funcs +ffffffff82c4d050 r hpd_regs +ffffffff82c4d1a0 r hpd_shift +ffffffff82c4d1b0 r hpd_mask +ffffffff82c4d1c0 r ddc_data_regs +ffffffff82c4d3a0 r ddc_clk_regs +ffffffff82c4d580 r ddc_shift +ffffffff82c4d5a8 r ddc_mask ffffffff82c4e000 r funcs -ffffffff82c4e050 r hpd_regs -ffffffff82c4e1a0 r hpd_shift -ffffffff82c4e1b0 r hpd_mask -ffffffff82c4e1c0 r ddc_data_regs -ffffffff82c4e3a0 r ddc_clk_regs -ffffffff82c4e580 r ddc_shift -ffffffff82c4e5a8 r ddc_mask ffffffff82c4f000 r funcs +ffffffff82c4f050 r hpd_regs +ffffffff82c4f1a0 r hpd_shift +ffffffff82c4f1b0 r hpd_mask +ffffffff82c4f1c0 r ddc_data_regs +ffffffff82c4f3a0 r ddc_clk_regs +ffffffff82c4f580 r ddc_shift +ffffffff82c4f5a8 r ddc_mask ffffffff82c50000 r funcs -ffffffff82c50050 r hpd_regs -ffffffff82c501a0 r hpd_shift -ffffffff82c501b0 r hpd_mask -ffffffff82c501c0 r ddc_data_regs -ffffffff82c503a0 r ddc_clk_regs -ffffffff82c50580 r ddc_shift -ffffffff82c505a8 r ddc_mask ffffffff82c51000 r funcs +ffffffff82c51050 r hpd_regs +ffffffff82c511a0 r hpd_shift +ffffffff82c511b0 r hpd_mask +ffffffff82c511c0 r ddc_data_regs +ffffffff82c513a0 r ddc_clk_regs +ffffffff82c51580 r ddc_shift +ffffffff82c515a8 r ddc_mask +ffffffff82c515d0 r generic_regs +ffffffff82c51640 r generic_shift +ffffffff82c51650 r generic_mask ffffffff82c52000 r funcs -ffffffff82c52050 r hpd_regs -ffffffff82c521a0 r hpd_shift -ffffffff82c521b0 r hpd_mask -ffffffff82c521c0 r ddc_data_regs -ffffffff82c523a0 r ddc_clk_regs -ffffffff82c52580 r ddc_shift -ffffffff82c525a8 r ddc_mask -ffffffff82c525d0 r generic_regs -ffffffff82c52640 r generic_shift -ffffffff82c52650 r generic_mask ffffffff82c53000 r funcs +ffffffff82c53050 r hpd_regs +ffffffff82c531a0 r hpd_shift +ffffffff82c531b0 r hpd_mask +ffffffff82c531c0 r ddc_data_regs_dcn +ffffffff82c53370 r ddc_clk_regs_dcn +ffffffff82c53520 r ddc_shift +ffffffff82c53640 r ddc_mask +ffffffff82c53760 r generic_regs +ffffffff82c537d0 r generic_shift +ffffffff82c537e0 r generic_mask ffffffff82c54000 r funcs -ffffffff82c54050 r hpd_regs -ffffffff82c541a0 r hpd_shift -ffffffff82c541b0 r hpd_mask -ffffffff82c541c0 r ddc_data_regs_dcn -ffffffff82c54370 r ddc_clk_regs_dcn -ffffffff82c54520 r ddc_shift -ffffffff82c54640 r ddc_mask -ffffffff82c54760 r generic_regs -ffffffff82c547d0 r generic_shift -ffffffff82c547e0 r generic_mask ffffffff82c55000 r funcs +ffffffff82c55050 r hpd_regs +ffffffff82c55168 r hpd_shift +ffffffff82c55178 r hpd_mask +ffffffff82c55190 r ddc_data_regs_dcn +ffffffff82c552c0 r ddc_clk_regs_dcn +ffffffff82c553f0 r ddc_shift +ffffffff82c554e0 r ddc_mask +ffffffff82c555d0 r generic_regs +ffffffff82c55604 r generic_shift +ffffffff82c5560c r generic_mask ffffffff82c56000 r funcs -ffffffff82c56050 r hpd_regs -ffffffff82c56168 r hpd_shift -ffffffff82c56178 r hpd_mask -ffffffff82c56190 r ddc_data_regs_dcn -ffffffff82c562c0 r ddc_clk_regs_dcn -ffffffff82c563f0 r ddc_shift -ffffffff82c564e0 r ddc_mask -ffffffff82c565d0 r generic_regs -ffffffff82c56604 r generic_shift -ffffffff82c5660c r generic_mask ffffffff82c57000 r funcs +ffffffff82c57050 r hpd_regs +ffffffff82c571a0 r hpd_shift +ffffffff82c571b0 r hpd_mask +ffffffff82c571c0 r ddc_data_regs_dcn +ffffffff82c57370 r ddc_clk_regs_dcn +ffffffff82c57520 r ddc_shift +ffffffff82c57640 r ddc_mask +ffffffff82c57760 r generic_regs +ffffffff82c577d0 r generic_shift +ffffffff82c577e0 r generic_mask ffffffff82c58000 r funcs -ffffffff82c58050 r hpd_regs -ffffffff82c581a0 r hpd_shift -ffffffff82c581b0 r hpd_mask -ffffffff82c581c0 r ddc_data_regs_dcn -ffffffff82c58370 r ddc_clk_regs_dcn -ffffffff82c58520 r ddc_shift -ffffffff82c58640 r ddc_mask -ffffffff82c58760 r generic_regs -ffffffff82c587d0 r generic_shift -ffffffff82c587e0 r generic_mask ffffffff82c59000 r funcs +ffffffff82c59050 r hpd_regs +ffffffff82c59168 r hpd_shift +ffffffff82c59178 r hpd_mask +ffffffff82c59190 r ddc_data_regs_dcn +ffffffff82c59300 r ddc_clk_regs_dcn +ffffffff82c59470 r ddc_shift +ffffffff82c59560 r ddc_mask +ffffffff82c59650 r generic_regs +ffffffff82c596c0 r generic_shift +ffffffff82c596d0 r generic_mask ffffffff82c5a000 r funcs -ffffffff82c5a050 r hpd_regs -ffffffff82c5a168 r hpd_shift -ffffffff82c5a178 r hpd_mask -ffffffff82c5a190 r ddc_data_regs_dcn -ffffffff82c5a300 r ddc_clk_regs_dcn -ffffffff82c5a470 r ddc_shift -ffffffff82c5a560 r ddc_mask -ffffffff82c5a650 r generic_regs -ffffffff82c5a6c0 r generic_shift -ffffffff82c5a6d0 r generic_mask ffffffff82c5b000 r funcs +ffffffff82c5b050 r hpd_regs +ffffffff82c5b168 r hpd_shift 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vupdate_no_lock_irq_info_funcs -ffffffff82c772e8 r vblank_irq_info_funcs -ffffffff82c772f8 r vline0_irq_info_funcs -ffffffff82c77308 r outbox_irq_info_funcs -ffffffff82c78000 r irq_source_info_dcn314 -ffffffff82c79290 r irq_service_funcs_dcn314 -ffffffff82c79298 r dummy_irq_info_funcs -ffffffff82c792a8 r hpd_irq_info_funcs -ffffffff82c792b8 r hpd_rx_irq_info_funcs -ffffffff82c792c8 r pflip_irq_info_funcs -ffffffff82c792d8 r vupdate_no_lock_irq_info_funcs -ffffffff82c792e8 r vblank_irq_info_funcs -ffffffff82c792f8 r vline0_irq_info_funcs -ffffffff82c79308 r outbox_irq_info_funcs -ffffffff82c7a000 r irq_source_info_dcn315 -ffffffff82c7b290 r irq_service_funcs_dcn315 -ffffffff82c7b298 r dummy_irq_info_funcs -ffffffff82c7b2a8 r hpd_irq_info_funcs -ffffffff82c7b2b8 r hpd_rx_irq_info_funcs -ffffffff82c7b2c8 r pflip_irq_info_funcs -ffffffff82c7b2d8 r vupdate_no_lock_irq_info_funcs -ffffffff82c7b2e8 r vblank_irq_info_funcs -ffffffff82c7b2f8 r vline0_irq_info_funcs -ffffffff82c7b308 r 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-ffffffff82c8c000 R dmub_srv_dcn315_regs -ffffffff82c8d000 R dmub_srv_dcn316_regs -ffffffff82c8e000 R dmub_srv_dcn32_regs -ffffffff82c8f000 r numerator01 -ffffffff82c8f020 r numerator02 -ffffffff82c8f040 r numerator04 -ffffffff82c8f060 r numerator05 -ffffffff82c91000 r abm_settings -ffffffff82c91010 r abm_settings_config0 -ffffffff82c91050 r abm_settings_config1 -ffffffff82c91088 r min_reduction_table_v_2_2 -ffffffff82c91095 r max_reduction_table_v_2_2 -ffffffff82c910a2 r min_reduction_table -ffffffff82c910af r max_reduction_table -ffffffff82c92000 R amdgpu_pp_profile_name -ffffffff82c93000 r pp_lib_thermal_controller_names -ffffffff82c94000 r pp_ip_funcs -ffffffff82c940a0 R pp_smu_ip_block -ffffffff82c940b8 r pp_dpm_funcs +ffffffff82c60000 r hdmi_14_protection +ffffffff82c60010 r dp_11_protection +ffffffff82c60020 r hdcp_i2c_offsets +ffffffff82c60050 r hdcp_dpcd_addrs +ffffffff82c61000 r irq_service_funcs_dce110 +ffffffff82c61010 r irq_source_info_dce110 +ffffffff82c622a0 r dummy_irq_info_funcs +ffffffff82c622b0 r hpd_irq_info_funcs +ffffffff82c622c0 r hpd_rx_irq_info_funcs +ffffffff82c622d0 r pflip_irq_info_funcs +ffffffff82c622e0 r vupdate_irq_info_funcs +ffffffff82c622f0 r vblank_irq_info_funcs +ffffffff82c63000 r irq_service_funcs_dce120 +ffffffff82c63008 r dummy_irq_info_funcs +ffffffff82c63018 r hpd_irq_info_funcs +ffffffff82c63028 r hpd_rx_irq_info_funcs +ffffffff82c63038 r pflip_irq_info_funcs +ffffffff82c63048 r vupdate_irq_info_funcs +ffffffff82c63058 r vblank_irq_info_funcs +ffffffff82c63070 r irq_source_info_dce120 +ffffffff82c65000 r irq_service_funcs_dce80 +ffffffff82c65008 r dummy_irq_info_funcs +ffffffff82c65018 r hpd_irq_info_funcs +ffffffff82c65028 r hpd_rx_irq_info_funcs +ffffffff82c65038 r pflip_irq_info_funcs +ffffffff82c65048 r vupdate_irq_info_funcs +ffffffff82c65058 r vblank_irq_info_funcs +ffffffff82c65070 r irq_source_info_dce80 +ffffffff82c67000 r irq_service_funcs_dcn10 +ffffffff82c67008 r dummy_irq_info_funcs +ffffffff82c67018 r hpd_irq_info_funcs +ffffffff82c67028 r hpd_rx_irq_info_funcs +ffffffff82c67038 r pflip_irq_info_funcs +ffffffff82c67048 r vupdate_no_lock_irq_info_funcs +ffffffff82c67058 r vblank_irq_info_funcs +ffffffff82c67068 r vline0_irq_info_funcs +ffffffff82c67080 r irq_source_info_dcn10 +ffffffff82c69000 r irq_service_funcs_dcn20 +ffffffff82c69008 r dummy_irq_info_funcs +ffffffff82c69018 r hpd_irq_info_funcs +ffffffff82c69028 r hpd_rx_irq_info_funcs +ffffffff82c69038 r pflip_irq_info_funcs +ffffffff82c69048 r vupdate_no_lock_irq_info_funcs +ffffffff82c69058 r vblank_irq_info_funcs +ffffffff82c69068 r vline0_irq_info_funcs +ffffffff82c69080 r irq_source_info_dcn20 +ffffffff82c6b000 r irq_service_funcs_dcn201 +ffffffff82c6b008 r dummy_irq_info_funcs +ffffffff82c6b018 r hpd_irq_info_funcs +ffffffff82c6b028 r hpd_rx_irq_info_funcs +ffffffff82c6b038 r pflip_irq_info_funcs +ffffffff82c6b048 r vupdate_no_lock_irq_info_funcs +ffffffff82c6b058 r vblank_irq_info_funcs +ffffffff82c6b068 r vline0_irq_info_funcs +ffffffff82c6b080 r irq_source_info_dcn201 +ffffffff82c6d000 r irq_source_info_dcn21 +ffffffff82c6e290 r irq_service_funcs_dcn21 +ffffffff82c6e298 r dummy_irq_info_funcs +ffffffff82c6e2a8 r hpd_irq_info_funcs +ffffffff82c6e2b8 r hpd_rx_irq_info_funcs +ffffffff82c6e2c8 r pflip_irq_info_funcs +ffffffff82c6e2d8 r vupdate_no_lock_irq_info_funcs +ffffffff82c6e2e8 r vblank_irq_info_funcs +ffffffff82c6e2f8 r vline0_irq_info_funcs +ffffffff82c6e308 r dmub_outbox_irq_info_funcs +ffffffff82c6f000 r irq_source_info_dcn30 +ffffffff82c70290 r irq_service_funcs_dcn30 +ffffffff82c70298 r dummy_irq_info_funcs +ffffffff82c702a8 r hpd_irq_info_funcs +ffffffff82c702b8 r hpd_rx_irq_info_funcs +ffffffff82c702c8 r pflip_irq_info_funcs +ffffffff82c702d8 r vupdate_no_lock_irq_info_funcs +ffffffff82c702e8 r vblank_irq_info_funcs +ffffffff82c702f8 r vline0_irq_info_funcs +ffffffff82c70308 r dmub_trace_irq_info_funcs +ffffffff82c71000 r irq_source_info_dcn302 +ffffffff82c72290 r irq_service_funcs_dcn302 +ffffffff82c72298 r dummy_irq_info_funcs +ffffffff82c722a8 r hpd_irq_info_funcs +ffffffff82c722b8 r hpd_rx_irq_info_funcs +ffffffff82c722c8 r pflip_irq_info_funcs +ffffffff82c722d8 r vupdate_no_lock_irq_info_funcs +ffffffff82c722e8 r vblank_irq_info_funcs +ffffffff82c722f8 r vline0_irq_info_funcs +ffffffff82c72308 r dmub_trace_irq_info_funcs +ffffffff82c73000 r irq_service_funcs_dcn303 +ffffffff82c73008 r dummy_irq_info_funcs +ffffffff82c73018 r hpd_irq_info_funcs +ffffffff82c73028 r hpd_rx_irq_info_funcs +ffffffff82c73038 r pflip_irq_info_funcs +ffffffff82c73048 r vupdate_no_lock_irq_info_funcs +ffffffff82c73058 r vblank_irq_info_funcs +ffffffff82c73068 r vline0_irq_info_funcs +ffffffff82c73080 r irq_source_info_dcn303 +ffffffff82c75000 r irq_source_info_dcn31 +ffffffff82c76290 r irq_service_funcs_dcn31 +ffffffff82c76298 r dummy_irq_info_funcs +ffffffff82c762a8 r hpd_irq_info_funcs +ffffffff82c762b8 r hpd_rx_irq_info_funcs +ffffffff82c762c8 r pflip_irq_info_funcs +ffffffff82c762d8 r vupdate_no_lock_irq_info_funcs +ffffffff82c762e8 r vblank_irq_info_funcs +ffffffff82c762f8 r vline0_irq_info_funcs +ffffffff82c76308 r outbox_irq_info_funcs +ffffffff82c77000 r irq_source_info_dcn314 +ffffffff82c78290 r irq_service_funcs_dcn314 +ffffffff82c78298 r dummy_irq_info_funcs +ffffffff82c782a8 r hpd_irq_info_funcs +ffffffff82c782b8 r hpd_rx_irq_info_funcs +ffffffff82c782c8 r pflip_irq_info_funcs +ffffffff82c782d8 r vupdate_no_lock_irq_info_funcs +ffffffff82c782e8 r vblank_irq_info_funcs +ffffffff82c782f8 r vline0_irq_info_funcs +ffffffff82c78308 r outbox_irq_info_funcs +ffffffff82c79000 r irq_source_info_dcn315 +ffffffff82c7a290 r irq_service_funcs_dcn315 +ffffffff82c7a298 r dummy_irq_info_funcs +ffffffff82c7a2a8 r hpd_irq_info_funcs +ffffffff82c7a2b8 r hpd_rx_irq_info_funcs +ffffffff82c7a2c8 r pflip_irq_info_funcs +ffffffff82c7a2d8 r vupdate_no_lock_irq_info_funcs +ffffffff82c7a2e8 r vblank_irq_info_funcs +ffffffff82c7a2f8 r vline0_irq_info_funcs +ffffffff82c7a308 r outbox_irq_info_funcs +ffffffff82c7b000 r irq_source_info_dcn32 +ffffffff82c7c290 r irq_service_funcs_dcn32 +ffffffff82c7c298 r dummy_irq_info_funcs +ffffffff82c7c2a8 r hpd_irq_info_funcs +ffffffff82c7c2b8 r hpd_rx_irq_info_funcs +ffffffff82c7c2c8 r pflip_irq_info_funcs +ffffffff82c7c2d8 r vupdate_no_lock_irq_info_funcs +ffffffff82c7c2e8 r vblank_irq_info_funcs +ffffffff82c7c2f8 r vline0_irq_info_funcs +ffffffff82c7c308 r outbox_irq_info_funcs +ffffffff82c7d000 r dio_link_hwss +ffffffff82c7e000 r dpia_link_hwss +ffffffff82c7f000 r hpo_dp_link_hwss +ffffffff82c80000 r virtual_lnk_enc_funcs +ffffffff82c81000 r virtual_link_hwss +ffffffff82c82000 r virtual_str_enc_funcs +ffffffff82c83000 R dmub_srv_dcn20_regs +ffffffff82c84000 R dmub_srv_dcn21_regs +ffffffff82c85000 R dmub_srv_dcn30_regs +ffffffff82c86000 R dmub_srv_dcn301_regs +ffffffff82c87000 R dmub_srv_dcn302_regs +ffffffff82c88000 R dmub_srv_dcn303_regs +ffffffff82c89000 R dmub_srv_dcn31_regs +ffffffff82c8a000 R dmub_srv_dcn314_regs +ffffffff82c8b000 R dmub_srv_dcn315_regs +ffffffff82c8c000 R dmub_srv_dcn316_regs +ffffffff82c8d000 R dmub_srv_dcn32_regs +ffffffff82c8e000 r numerator01 +ffffffff82c8e020 r numerator02 +ffffffff82c8e040 r numerator04 +ffffffff82c8e060 r numerator05 +ffffffff82c90000 r abm_settings +ffffffff82c90010 r abm_settings_config0 +ffffffff82c90050 r abm_settings_config1 +ffffffff82c90088 r min_reduction_table_v_2_2 +ffffffff82c90095 r max_reduction_table_v_2_2 +ffffffff82c900a2 r min_reduction_table +ffffffff82c900af r max_reduction_table +ffffffff82c91000 R amdgpu_pp_profile_name +ffffffff82c92000 r pp_lib_thermal_controller_names +ffffffff82c93000 r pp_ip_funcs +ffffffff82c930a0 R pp_smu_ip_block +ffffffff82c930b8 r pp_dpm_funcs +ffffffff82c94000 r gpio_tbl +ffffffff82c940f0 r enable_fb_req_rej_tbl +ffffffff82c94140 r use_bclk_tbl +ffffffff82c94310 r turn_off_plls_tbl +ffffffff82c94640 r enter_baco_tbl +ffffffff82c94730 r exit_baco_tbl +ffffffff82c94850 r clean_baco_tbl ffffffff82c95000 r gpio_tbl ffffffff82c950f0 r enable_fb_req_rej_tbl ffffffff82c95140 r use_bclk_tbl -ffffffff82c95310 r turn_off_plls_tbl -ffffffff82c95640 r enter_baco_tbl -ffffffff82c95730 r exit_baco_tbl -ffffffff82c95850 r clean_baco_tbl +ffffffff82c952e0 r turn_off_plls_tbl +ffffffff82c95370 r clk_req_b_tbl +ffffffff82c95490 r enter_baco_tbl +ffffffff82c955b0 r exit_baco_tbl +ffffffff82c956d0 r clean_baco_tbl ffffffff82c96000 r gpio_tbl ffffffff82c960f0 r enable_fb_req_rej_tbl -ffffffff82c96140 r use_bclk_tbl -ffffffff82c962e0 r turn_off_plls_tbl -ffffffff82c96370 r clk_req_b_tbl -ffffffff82c96490 r enter_baco_tbl -ffffffff82c965b0 r exit_baco_tbl -ffffffff82c966d0 r clean_baco_tbl -ffffffff82c97000 r gpio_tbl -ffffffff82c970f0 r enable_fb_req_rej_tbl -ffffffff82c97140 r use_bclk_tbl_vg -ffffffff82c97200 r turn_off_plls_tbl_vg -ffffffff82c97350 r use_bclk_tbl -ffffffff82c97440 r turn_off_plls_tbl -ffffffff82c975f0 r clk_req_b_tbl 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pcib_ca -ffffffff82d0d000 R amdpcib_ca -ffffffff82d0d028 R amdpcib_devices -ffffffff82d0e000 R tcpcib_ca -ffffffff82d0e028 R tcpcib_devices -ffffffff82d0f000 R aapic_ca -ffffffff82d10000 R hme_pci_ca -ffffffff82d10028 r hme_promhdr -ffffffff82d1002a r hme_promdat -ffffffff82d11000 R isa_ca -ffffffff82d12000 R isadma_ca -ffffffff82d13000 R fdc_ca -ffffffff82d14000 R fd_ca -ffffffff82d15000 R com_isa_ca -ffffffff82d16000 R pckbc_isa_ca -ffffffff82d17000 R vga_isa_ca -ffffffff82d18000 R wdc_isa_ca -ffffffff82d19000 R mpu_midi_hw_if -ffffffff82d1a000 R mpu_isa_ca -ffffffff82d1b000 R pcppi_ca -ffffffff82d1c000 R spkr_ca -ffffffff82d1c030 r pitchtab -ffffffff82d1d000 R lpt_isa_ca -ffffffff82d1e000 R wbsio_ca -ffffffff82d1f000 R schsio_ca -ffffffff82d20000 R lm_isa_ca -ffffffff82d20028 R lm_wbsio_ca -ffffffff82d21000 R it_sensors -ffffffff82d21110 R it_vrfact -ffffffff82d21140 R it_fan_regs -ffffffff82d21160 R it_fan_ext_regs -ffffffff82d21178 R it_ca -ffffffff82d22000 R abitkv_sensors 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pckbd_keydesc_nl -ffffffff82d33720 r pckbd_keydesc_nl_nodead -ffffffff82d33740 r pckbd_keydesc_is -ffffffff82d337cc r pckbd_keydesc_is_nodead -ffffffff82d337e0 r pckbd_keydesc_ee -ffffffff82d33890 r pckbd_keydesc_ee_nodead -ffffffff82d338b0 R pckbd_keydesctab -ffffffff82d34000 R pms_ca -ffffffff82d34028 R pms_accessops -ffffffff82d34040 R pms_sec_accessops -ffffffff82d34060 R pms_protocols -ffffffff82d341e0 r alps_models -ffffffff82d35000 R skgpio_led_offset -ffffffff82d35008 R skgpio_ca -ffffffff82d36000 R hidkbd_trtab -ffffffff82d36100 r apple_fn_trans -ffffffff82d36120 r apple_tb_trans -ffffffff82d36140 r apple_mba_trans -ffffffff82d37000 r hidcc_attach_wskbd.accessops -ffffffff82d37020 r hidcc_keysyms -ffffffff82d38000 R usb_ca -ffffffff82d39000 R usb_known_products -ffffffff82d44f80 R usb_known_vendors -ffffffff82d47790 R usbd_error_strs -ffffffff82d48000 R usb_quirks -ffffffff82d48390 R usb_dev_quirks -ffffffff82d48398 R usbd_no_quirk -ffffffff82d49000 R uhub_ca -ffffffff82d49028 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dt_static_sched_sleep -ffffffff8312d340 D dt_static_sched_steal -ffffffff8312d3b0 D dt_static_sched_unsleep -ffffffff8312d420 D dt_static_sched_wakeup -ffffffff8312d490 D dt_static_raw_syscalls_sys_enter -ffffffff8312d500 D dt_static_raw_syscalls_sys_exit -ffffffff8312d570 D dt_static_uvm_fault -ffffffff8312d5e0 D dt_static_uvm_map_insert -ffffffff8312d650 D dt_static_uvm_map_remove -ffffffff8312d6c0 D dt_static_uvm_malloc -ffffffff8312d730 D dt_static_uvm_free -ffffffff8312d7a0 D dt_static_uvm_pool_get -ffffffff8312d810 D dt_static_uvm_pool_put -ffffffff8312d880 D dt_static_vfs_bufcache_rel -ffffffff8312d8f0 D dt_static_vfs_bufcache_take -ffffffff8312d960 D dt_static_vfs_cleaner -ffffffff8312d9d0 D dt_static_vmm_guest_enter -ffffffff8312da40 D dt_static_vmm_guest_exit -ffffffff8312dab0 D dt_static_vmm_inout -ffffffff8312db20 D dt_static_smr_call -ffffffff8312db90 D dt_static_smr_called -ffffffff8312dc00 D dt_static_smr_barrier_enter -ffffffff8312dc70 D dt_static_smr_barrier_exit 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-ffffffff83136000 D db_watchpoints_inserted -ffffffff83136008 D db_next_free_watchpoint -ffffffff83137000 D db_log -ffffffff83138000 D audio_cd -ffffffff83138020 D audio_lock -ffffffff83139000 D midi_cd -ffffffff8313a000 D rnd_cold -ffffffff8313a004 D rnd_slowextract -ffffffff8313a008 D rnd_timeout -ffffffff8313a050 D rndlock -ffffffff8313a060 D rndreinit_timeout -ffffffff8313a0a8 D rnd_task -ffffffff8313b000 D video_cd -ffffffff8313c000 d rrip_table_analyze -ffffffff8313c0e0 d rrip_table_getname -ffffffff8313c1e0 d rrip_table_getsymname -ffffffff8313c280 d rrip_table_extref -ffffffff8313d000 D nexecs -ffffffff8313e000 D elf_note_names -ffffffff8313f000 D ncpus -ffffffff8313f004 D ncpusfound -ffffffff83140000 D acct_lock -ffffffff83140010 D acctsuspend -ffffffff83140014 D acctresume -ffffffff83140018 D acctrate -ffffffff83141000 D ticks -ffffffff83142000 D fhdlk -ffffffff83143000 D kqueue_klist_lock -ffffffff83143010 D kq_timeoutmax -ffffffff83144000 D stackgap_random -ffffffff83145000 D nprocesses -ffffffff83145004 D nthreads -ffffffff83145008 D fork_tfmrate -ffffffff83146000 D kthread_q -ffffffff83147000 D malloc_mtx -ffffffff83147010 D memname -ffffffff831474a0 D sysctl_kmemlock -ffffffff831474b0 D malloc_errintvl -ffffffff83148000 D maxdmap -ffffffff83148008 D maxsmap -ffffffff83148010 D rlimit_lock -ffffffff83149000 D sched_cost_load -ffffffff83149004 D sched_cost_priority -ffffffff83149008 D sched_cost_runnable -ffffffff8314900c D sched_cost_resident -ffffffff8314a000 D intrmap_lock -ffffffff8314b000 D nosuidcoredump -ffffffff8314b008 D sigio_lock -ffffffff8314c000 D smr_lock -ffffffff8314c010 D smr_logintvl -ffffffff8314d000 D startuphook_list -ffffffff8314e000 D sysctl_lock -ffffffff8314e010 D sysctl_disklock -ffffffff8314e020 d openbsd -ffffffff8314e024 d arg_max -ffffffff8314e028 d posix_version -ffffffff8314e02c d ngroups_max -ffffffff8314e030 d int_one -ffffffff8314e034 d maxpartitions -ffffffff8314e038 d raw_part -ffffffff8314e03c D allowpowerdown -ffffffff8314e040 D hw_power -ffffffff8314e044 d byte_order -ffffffff8314e048 d page_size -ffffffff8314f000 d thrsleep_queue -ffffffff8314f010 d thrsleep_lock -ffffffff83150000 D tc_lock -ffffffff83150010 D windup_mtx -ffffffff83150020 D timecounter -ffffffff83150028 D time_second -ffffffff83150030 d timehands -ffffffff83150038 d dummy_timecounter -ffffffff83150088 d th0 -ffffffff83150120 d th1 -ffffffff83151000 D itimer_mtx -ffffffff83151010 D ratecheck_mtx -ffffffff83151020 D ppsratecheck_mtx -ffffffff83151030 D resettodr_to -ffffffff83151078 D resettodr_task -ffffffff83152000 D timeout_mutex -ffffffff83153000 D wdog_auto -ffffffff83154000 D taskq_sys -ffffffff83154050 D taskq_sys_mp -ffffffff83155000 D ccpu -ffffffff83155004 D perflevel -ffffffff83155008 D perfpolicy -ffffffff83155010 D setperf_to -ffffffff83156000 D autoconf_attdet_mtx -ffffffff83156010 D msgs -ffffffff83157000 d evcount_list -ffffffff83157010 d evcount_percpu_init_list -ffffffff83158000 D syslogf_rwlock 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ether_ipmulticast_min -ffffffff8317100c D ether_ipmulticast_max -ffffffff83171012 D ether_ip6multicast_min -ffffffff83171018 D ether_ip6multicast_max -ffffffff83172000 D etherip_cloner -ffffffff83172030 D etherip_list -ffffffff83173000 D loop_cloner -ffffffff83174000 D ifmedia_mtx -ffffffff83175000 D ppp_compressors -ffffffff83175020 D ppp_cloner -ffffffff83176000 D ppp_pkt_init -ffffffff83177000 D ppp_bsd_compress -ffffffff83178000 D ppp_deflate -ffffffff83178070 D ppp_deflate_draft -ffffffff83179000 D tun_cloner -ffffffff83179030 D tap_cloner -ffffffff8317a000 D bridgeintrq -ffffffff8317a038 D bridge_cloner -ffffffff8317b000 d veb_cloner -ffffffff8317b030 d vport_cloner -ffffffff8317c000 D vlan_tagh_lk -ffffffff8317c010 D vlan_cloner -ffffffff8317c040 D svlan_cloner -ffffffff8317d000 D pipex_list_mtx -ffffffff8317d010 D pipex_prune -ffffffff8317d018 D pipexoutq -ffffffff8317d050 d SHAPad2 -ffffffff8317e000 D rtmap_gc -ffffffff8317e018 D rt_rc -ffffffff8317f000 D rt_labels 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tcp_syn_cache_limit -ffffffff83196018 D tcp_syn_bucket_limit -ffffffff8319601c D tcp_syn_use_limit -ffffffff83197000 D tcp_outflags -ffffffff83198000 D tcp_timer_mtx -ffffffff83198010 D tcp_mssdflt -ffffffff83198014 D tcp_rttdflt -ffffffff83198018 D tcp_do_rfc1323 -ffffffff8319801c D tcp_do_sack -ffffffff83198020 D tcp_do_rfc3390 -ffffffff83198024 D tcp_do_tso -ffffffff83198028 D tcp_reass_limit -ffffffff8319802c D tcp_sackhole_limit -ffffffff83199000 D tcp_backoff -ffffffff83199034 D tcp_totbackoff -ffffffff8319a000 D tcp_sendspace -ffffffff8319a004 D tcp_recvspace -ffffffff8319a008 D tcp_autorcvbuf_inc -ffffffff8319b000 D udpcksum -ffffffff8319b004 D udp_sendspace -ffffffff8319b008 D udp_recvspace -ffffffff8319c000 D ipsec_flows_mtx -ffffffff8319c010 D ipsec_ids_idle -ffffffff8319c014 D ipsec_ids_next_flow -ffffffff8319c018 D ipsec_policy_head -ffffffff8319c028 D ipsp_ids_gc_timeout -ffffffff8319c070 D tdb_sadb_mtx -ffffffff8319c080 d tdb_hashmask -ffffffff8319d000 D ipo_tdb_mtx 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pp_r600_encode_lanes +ffffffff82ca7000 R pptable_v1_0_funcs +ffffffff82ca8000 R pptable_funcs +ffffffff82ca8020 r soft_dummy_pp_table +ffffffff82ca9000 r smu10_hwmgr_funcs +ffffffff82caa000 r smu7_hwmgr_funcs +ffffffff82caa2f8 r smu7_irq_funcs +ffffffff82caa310 r SMU7ThermalPolicy +ffffffff82cab000 r GCCACConfig_Polaris10 +ffffffff82cab1b0 r DIDTConfig_Polaris10 +ffffffff82caba50 r GCCACConfig_Polaris11 +ffffffff82cabc00 r DIDTConfig_Polaris11_Kicker +ffffffff82cac4a0 r DIDTConfig_Polaris11 +ffffffff82cacd40 r DIDTConfig_Polaris12 +ffffffff82cad5e0 r GCCACConfig_VegaM +ffffffff82cad790 r DIDTConfig_VegaM +ffffffff82caf000 r smu8_hwmgr_funcs +ffffffff82caf2f0 r SMU7ThermalPolicy +ffffffff82cb0000 r smu9_irq_funcs +ffffffff82cb1000 r gpio_tbl_iceland +ffffffff82cb1060 r gpio_tbl +ffffffff82cb1150 r enable_fb_req_rej_tbl +ffffffff82cb11a0 r use_bclk_tbl +ffffffff82cb1370 r turn_off_plls_tbl +ffffffff82cb1610 r enter_baco_tbl +ffffffff82cb1730 r exit_baco_tbl_iceland +ffffffff82cb1870 r clean_baco_tbl_iceland +ffffffff82cb1890 r exit_baco_tbl +ffffffff82cb19b0 r clean_baco_tbl +ffffffff82cb2000 r pre_baco_tbl +ffffffff82cb2090 r enter_baco_tbl +ffffffff82cb22b0 r exit_baco_tbl +ffffffff82cb2520 r clean_baco_tbl +ffffffff82cb3000 r vega10_hwmgr_funcs +ffffffff82cb32f0 r channel_number +ffffffff82cb3320 r SMU7ThermalWithDelayPolicy +ffffffff82cb4000 r SEDiDtStallCtrlConfig_vega10 +ffffffff82cb4110 r SEDiDtStallPatternConfig_vega10 +ffffffff82cb42e0 r SEDiDtWeightConfig_Vega10 +ffffffff82cb43b0 r SEDiDtCtrl1Config_Vega10 +ffffffff82cb4440 r SEDiDtCtrl2Config_Vega10 +ffffffff82cb4510 r SEDiDtCtrl3Config_vega10 +ffffffff82cb4820 r SEDiDtTuningCtrlConfig_Vega10 +ffffffff82cb48b0 r SELCacConfig_Vega10 +ffffffff82cb4a40 r SEDiDtCtrl0Config_Vega10 +ffffffff82cb4d10 r AvfsPSMInitConfig_vega10 +ffffffff82cb4d90 r SEEDCStallPatternConfig_Vega10 +ffffffff82cb4ea0 r SEEDCStallDelayConfig_Vega10 +ffffffff82cb4f80 r SEEDCCtrlConfig_Vega10 +ffffffff82cb5040 r PSMSEEDCStallPatternConfig_Vega10 +ffffffff82cb50c0 r PSMSEEDCStallDelayConfig_Vega10 +ffffffff82cb51d0 r PSMSEEDCCtrlResetConfig_Vega10 +ffffffff82cb5290 r PSMSEEDCCtrlConfig_Vega10 +ffffffff82cb5350 r SEEDCForceStallPatternConfig_Vega10 +ffffffff82cb53e0 r SEEDCCtrlForceStallConfig_Vega10 +ffffffff82cb6000 R vega10_pptable_funcs +ffffffff82cb7000 r pre_baco_tbl +ffffffff82cb7090 r enter_baco_tbl +ffffffff82cb72b0 r exit_baco_tbl +ffffffff82cb7520 r clean_baco_tbl +ffffffff82cb8000 r vega12_hwmgr_funcs +ffffffff82cb82f0 r SMU7ThermalWithDelayPolicy +ffffffff82cb8340 r link_width +ffffffff82cb9000 R vega12_pptable_funcs +ffffffff82cba000 r clean_baco_tbl +ffffffff82cbb000 r vega20_hwmgr_funcs +ffffffff82cbb2f0 r SMU7ThermalWithDelayPolicy +ffffffff82cbb340 r link_width +ffffffff82cbc000 R vega20_pptable_funcs +ffffffff82cbd000 R ci_smu_funcs +ffffffff82cbd0e0 r defaults_hawaii_pro +ffffffff82cbd12c r defaults_hawaii_xt +ffffffff82cbd178 r defaults_saturn_xt +ffffffff82cbd1c4 r defaults_bonaire_xt +ffffffff82cbd210 r ci_program_jump_on_start.data +ffffffff82cbe000 R fiji_smu_funcs +ffffffff82cbe0e0 r avfs_graphics_level +ffffffff82cbe240 r fiji_power_tune_data_set_array +ffffffff82cbe246 r fiji_clock_stretch_amount_conversion +ffffffff82cbe260 r fiji_clock_stretcher_ddt_table +ffffffff82cbf000 R iceland_smu_funcs +ffffffff82cbf0e0 r defaults_icelandxt +ffffffff82cbf12c r defaults_icelandpro +ffffffff82cbf178 r defaults_iceland +ffffffff82cc0000 R polaris10_smu_funcs +ffffffff82cc00e0 r avfs_graphics_level_polaris10 +ffffffff82cc02a0 r avfs_memory_level_polaris10 +ffffffff82cc02c0 r polaris10_power_tune_data_set_array +ffffffff82cc0310 r Range_Table +ffffffff82cc1000 R smu10_smu_funcs +ffffffff82cc2000 r smu7_program_jump_on_start.data +ffffffff82cc2010 r pwr_virus_table_pre +ffffffff82cc2680 r pwr_virus_table_post +ffffffff82cc2f80 r pwr_virus_section1 +ffffffff82cc3610 r pwr_virus_section2 +ffffffff82cc3660 r pwr_virus_section3 +ffffffff82ccaab0 r pwr_virus_section4 +ffffffff82ccae80 r pwr_virus_section5 +ffffffff82ccb490 r pwr_virus_section6 +ffffffff82ccd000 R smu8_smu_funcs +ffffffff82cce000 R tonga_smu_funcs +ffffffff82cce0e0 r tonga_power_tune_data_set_array +ffffffff82cce12c r tonga_clock_stretch_amount_conversion +ffffffff82cce140 r tonga_clock_stretcher_ddt_table +ffffffff82ccf000 R vega10_smu_funcs +ffffffff82cd0000 R vega12_smu_funcs +ffffffff82cd1000 R vega20_smu_funcs +ffffffff82cd2000 R vegam_smu_funcs +ffffffff82cd20e0 r vegam_power_tune_data_set_array +ffffffff82cd2130 r Range_Table +ffffffff82cd3000 R smu_ip_funcs +ffffffff82cd30a0 R smu_v11_0_ip_block +ffffffff82cd30b8 R smu_v12_0_ip_block +ffffffff82cd30d0 R smu_v13_0_ip_block +ffffffff82cd30e8 r swsmu_pm_funcs +ffffffff82cd4000 r arcturus_table_map +ffffffff82cd4080 r arcturus_pwr_src_map +ffffffff82cd4090 r arcturus_workload_map +ffffffff82cd40d0 r arcturus_ppt_funcs +ffffffff82cd44a0 r smu11_thermal_policy +ffffffff82cd44f8 r arcturus_i2c_algo +ffffffff82cd4508 r arcturus_i2c_control_quirks +ffffffff82cd4520 r arcturus_throttler_map +ffffffff82cd4540 r arcturus_message_map +ffffffff82cd4f90 r arcturus_clk_map +ffffffff82cd5050 r arcturus_feature_mask_map +ffffffff82cd6000 r cyan_skillfish_ppt_funcs +ffffffff82cd7000 r navi10_ppt_funcs +ffffffff82cd73d0 r smu11_thermal_policy +ffffffff82cd7428 r navi10_i2c_algo +ffffffff82cd7438 r navi10_i2c_control_quirks +ffffffff82cd7450 r navi1x_throttler_map +ffffffff82cd7470 r NoDbiPrbs7 +ffffffff82cd8470 r DbiPrbs7 +ffffffff82cda000 r sienna_cichlid_ppt_funcs +ffffffff82cda3d0 r smu11_thermal_policy +ffffffff82cda428 r sienna_cichlid_i2c_algo +ffffffff82cda438 r sienna_cichlid_i2c_control_quirks +ffffffff82cda450 r sienna_cichlid_throttler_map +ffffffff82cdb000 r smu_v11_0_irq_funcs +ffffffff82cdb010 r link_width +ffffffff82cdc000 r vangogh_ppt_funcs +ffffffff82cdc3d0 r vangogh_throttler_map +ffffffff82cdd000 r renoir_ppt_funcs +ffffffff82cdd3d0 r renoir_throttler_map +ffffffff82cde000 r aldebaran_clk_map +ffffffff82cde0c0 r aldebaran_table_map +ffffffff82cde140 r aldebaran_ppt_funcs +ffffffff82cde510 r smu13_thermal_policy +ffffffff82cde568 r aldebaran_i2c_algo +ffffffff82cde578 r aldebaran_i2c_control_quirks +ffffffff82cde590 r aldebaran_throttler_map +ffffffff82cde5b0 r aldebaran_message_map +ffffffff82cdf000 r aldebaran_feature_mask_map +ffffffff82ce0000 r smu_v13_0_irq_funcs +ffffffff82ce0010 r link_width +ffffffff82ce1000 r smu_v13_0_0_ppt_funcs +ffffffff82ce13d0 r smu13_thermal_policy +ffffffff82ce1428 r smu_v13_0_0_i2c_algo +ffffffff82ce1438 r smu_v13_0_0_i2c_control_quirks +ffffffff82ce1450 r smu_v13_0_0_throttler_map +ffffffff82ce2000 r smu_v13_0_4_ppt_funcs +ffffffff82ce3000 r smu_v13_0_5_ppt_funcs +ffffffff82ce4000 r smu_v13_0_7_ppt_funcs +ffffffff82ce43d0 r smu13_thermal_policy +ffffffff82ce4430 r smu_v13_0_7_throttler_map +ffffffff82ce5000 r yellow_carp_ppt_funcs +ffffffff82ce6000 r __smu_message_names +ffffffff82ce7000 R pchb_ca +ffffffff82ce8000 R amas_ca +ffffffff82ce8028 R amas_devices +ffffffff82ce8040 r amas_feature +ffffffff82ce9000 R cardslot_ca +ffffffff82cea000 R cardbus_ca +ffffffff82ceb000 R com_cardbus_ca +ffffffff82cec000 R xl_cardbus_ca +ffffffff82cec030 R xl_cardbus_products +ffffffff82ced000 R dc_cardbus_ca +ffffffff82ced030 R dc_cardbus_devices +ffffffff82cee000 R fxp_cardbus_ca +ffffffff82cee028 R fxp_cardbus_devices +ffffffff82cef000 R rl_cardbus_devices +ffffffff82cef028 R rl_cardbus_ca +ffffffff82cf0000 R re_cardbus_ca +ffffffff82cf0028 R re_cardbus_devices +ffffffff82cf1000 R ath_cardbus_ca +ffffffff82cf2000 R athn_cardbus_ca +ffffffff82cf2030 r athn_cardbus_devices +ffffffff82cf3000 R atw_cardbus_ca +ffffffff82cf3028 R atw_cardbus_devices +ffffffff82cf4000 R rtw_cardbus_ca +ffffffff82cf4028 R rtw_cardbus_devices +ffffffff82cf5000 R ral_cardbus_ca +ffffffff82cf5030 r ral_cardbus_devices +ffffffff82cf6000 R acx_cardbus_ca +ffffffff82cf6028 r acx_cardbus_devices +ffffffff82cf7000 R pgt_cardbus_ca +ffffffff82cf7028 R pgt_cardbus_devices +ffffffff82cf8000 R ehci_cardbus_ca +ffffffff82cf9000 R ohci_cardbus_ca +ffffffff82cfa000 R uhci_cardbus_ca +ffffffff82cfb000 R malo_cardbus_ca +ffffffff82cfb028 r malo_cardbus_devices +ffffffff82cfc000 R bwi_cardbus_ca +ffffffff82cfc030 r bwi_cardbus_devices +ffffffff82cfd000 R pcmcia_ca +ffffffff82cfe000 r pcmcia_parse_cis_tuple.init_cfe +ffffffff82cff000 r pcmcia_cis_quirks +ffffffff82d00000 R ep_pcmcia_ca +ffffffff82d01000 R ne_pcmcia_ca +ffffffff82d01030 R ne2000devs +ffffffff82d03000 R aic_pcmcia_ca +ffffffff82d04000 R com_pcmcia_ca +ffffffff82d05000 R wdc_pcmcia_ca +ffffffff82d06000 R sm_pcmcia_ca +ffffffff82d07000 R xe_pcmcia_ca +ffffffff82d08000 R wi_pcmcia_ca +ffffffff82d08030 r wi_pcmcia_products +ffffffff82d09000 R malo_pcmcia_ca +ffffffff82d0a000 R an_pcmcia_ca +ffffffff82d0b000 R pcib_ca +ffffffff82d0c000 R amdpcib_ca +ffffffff82d0c028 R amdpcib_devices +ffffffff82d0d000 R tcpcib_ca +ffffffff82d0d028 R tcpcib_devices +ffffffff82d0e000 R aapic_ca +ffffffff82d0f000 R hme_pci_ca +ffffffff82d0f028 r hme_promhdr +ffffffff82d0f02a r hme_promdat +ffffffff82d10000 R isa_ca +ffffffff82d11000 R isadma_ca +ffffffff82d12000 R fdc_ca +ffffffff82d13000 R fd_ca +ffffffff82d14000 R com_isa_ca +ffffffff82d15000 R pckbc_isa_ca +ffffffff82d16000 R vga_isa_ca +ffffffff82d17000 R wdc_isa_ca +ffffffff82d18000 R mpu_midi_hw_if +ffffffff82d19000 R mpu_isa_ca +ffffffff82d1a000 R pcppi_ca +ffffffff82d1b000 R spkr_ca +ffffffff82d1b030 r pitchtab +ffffffff82d1c000 R lpt_isa_ca +ffffffff82d1d000 R wbsio_ca +ffffffff82d1e000 R schsio_ca +ffffffff82d1f000 R lm_isa_ca +ffffffff82d1f028 R lm_wbsio_ca +ffffffff82d20000 R it_sensors +ffffffff82d20110 R it_vrfact +ffffffff82d20140 R it_fan_regs +ffffffff82d20160 R it_fan_ext_regs +ffffffff82d20178 R it_ca +ffffffff82d21000 R abitkv_sensors +ffffffff82d21200 R abitaa_sensors +ffffffff82d21480 R abitav_sensors +ffffffff82d21700 R abitas_sensors +ffffffff82d21980 R abitax_sensors +ffffffff82d21bc0 R abitm4_sensors +ffffffff82d21e80 R abitan_sensors +ffffffff82d22120 R abital_sensors +ffffffff82d223a0 R abitaw_sensors +ffffffff82d22700 R abitni_sensors +ffffffff82d229a0 R abitat_sensors +ffffffff82d22cc0 R abitan2_sensors +ffffffff82d22f60 R abitab_sensors +ffffffff82d23220 R abitan3_sensors +ffffffff82d23500 R abitaw2_sensors +ffffffff82d23860 R abitat2_sensors +ffffffff82d23b60 R abitab2_sensors +ffffffff82d23ea0 R abitin_sensors +ffffffff82d241e0 R uguru_ca +ffffffff82d25000 R aps_ca +ffffffff82d26000 R wsdisplay_emul_ca +ffffffff82d26030 r charClass +ffffffff82d27000 r usl_syncops +ffffffff82d28000 R wsevent_filtops +ffffffff82d29000 R wskbd_ca +ffffffff82d2a000 r latin1_to_upper +ffffffff82d2b000 R wsmouse_ca +ffffffff82d2c000 R cyrillic_to_koi8 +ffffffff82d2c060 R unicode_to_latin2 +ffffffff82d2c0e0 R unicode_to_latin7 +ffffffff82d2d000 R wsemul_vt100_ops +ffffffff82d2e000 r decspcgr2uni +ffffffff82d2e100 r dectech2uni +ffffffff82d2e200 r nrctable +ffffffff82d2e320 r nrcovlpos +ffffffff82d2f000 r vt100_fkeys +ffffffff82d2f0c0 r vt100_pfkeys +ffffffff82d2f0e0 r vt100_numpad +ffffffff82d30000 R pckbd_ca +ffffffff82d30028 R pckbd_accessops +ffffffff82d30040 R pckbd_consops +ffffffff82d30060 R pckbd_keymapdata +ffffffff82d30070 R pckbd_xtbl2 +ffffffff82d30100 R pckbd_xtbl2_ext +ffffffff82d31000 r pckbd_keydesc_us +ffffffff82d31250 r pckbd_keydesc_de +ffffffff82d312f0 r pckbd_keydesc_de_nodead +ffffffff82d31310 r pckbd_keydesc_fr +ffffffff82d313d0 r pckbd_keydesc_fr_dvorak_bepo +ffffffff82d31510 r pckbd_keydesc_dk +ffffffff82d315a0 r pckbd_keydesc_dk_nodead +ffffffff82d315b0 r pckbd_keydesc_it +ffffffff82d31640 r pckbd_keydesc_uk +ffffffff82d316e0 r pckbd_keydesc_jp +ffffffff82d31750 r pckbd_keydesc_sv +ffffffff82d31780 r pckbd_keydesc_sv_nodead +ffffffff82d31790 r pckbd_keydesc_no +ffffffff82d317c0 r pckbd_keydesc_no_nodead +ffffffff82d317d0 r pckbd_keydesc_us_declk +ffffffff82d31860 r pckbd_keydesc_us_dvorak +ffffffff82d31900 r pckbd_keydesc_us_colemak +ffffffff82d31948 r pckbd_keydesc_swapctrlcaps +ffffffff82d31960 r pckbd_keydesc_iopener +ffffffff82d319b0 r pckbd_keydesc_es +ffffffff82d31a50 r pckbd_keydesc_be +ffffffff82d31b10 r pckbd_keydesc_ru +ffffffff82d31c80 r pckbd_keydesc_ua +ffffffff82d31e10 r pckbd_keydesc_sg +ffffffff82d31ec0 r pckbd_keydesc_sg_nodead +ffffffff82d31ee0 r pckbd_keydesc_sf +ffffffff82d31f00 r pckbd_keydesc_pt +ffffffff82d31f90 r pckbd_keydesc_lt +ffffffff82d32070 r pckbd_keydesc_la +ffffffff82d32100 r pckbd_keydesc_br +ffffffff82d32180 r pckbd_keydesc_tr +ffffffff82d32230 r pckbd_keydesc_tr_nodead +ffffffff82d32250 r pckbd_keydesc_pl +ffffffff82d322b0 r pckbd_keydesc_hu +ffffffff82d323c0 r pckbd_keydesc_si +ffffffff82d324d0 r pckbd_keydesc_cf +ffffffff82d325a0 r pckbd_keydesc_cf_nodead +ffffffff82d325c0 r pckbd_keydesc_lv +ffffffff82d32640 r pckbd_keydesc_nl +ffffffff82d32720 r pckbd_keydesc_nl_nodead +ffffffff82d32740 r pckbd_keydesc_is +ffffffff82d327cc r pckbd_keydesc_is_nodead +ffffffff82d327e0 r pckbd_keydesc_ee +ffffffff82d32890 r pckbd_keydesc_ee_nodead +ffffffff82d328b0 R pckbd_keydesctab +ffffffff82d33000 R pms_ca +ffffffff82d33028 R pms_accessops +ffffffff82d33040 R pms_sec_accessops +ffffffff82d33060 R pms_protocols +ffffffff82d331e0 r alps_models +ffffffff82d34000 R skgpio_led_offset +ffffffff82d34008 R skgpio_ca +ffffffff82d35000 R hidkbd_trtab +ffffffff82d35100 r apple_fn_trans +ffffffff82d35120 r apple_tb_trans +ffffffff82d35140 r apple_mba_trans +ffffffff82d36000 r hidcc_attach_wskbd.accessops +ffffffff82d36020 r hidcc_keysyms +ffffffff82d37000 R usb_ca +ffffffff82d38000 R usb_known_products +ffffffff82d43f80 R usb_known_vendors +ffffffff82d46790 R usbd_error_strs +ffffffff82d47000 R usb_quirks +ffffffff82d47390 R usb_dev_quirks +ffffffff82d47398 R usbd_no_quirk +ffffffff82d48000 R uhub_ca +ffffffff82d48028 R uhub_uhub_ca +ffffffff82d49000 R uaudio_ca +ffffffff82d49028 R uaudio_hw_if +ffffffff82d490e0 R uaudio_rates +ffffffff82d49120 r uaudio_clkname.names +ffffffff82d49140 r uaudio_feature_addent.features +ffffffff82d4a000 R uvideo_ca +ffffffff82d4a028 R uvideo_hw_if +ffffffff82d4a100 R uvideo_devs +ffffffff82d4b000 r utvfu_select_norm.pal +ffffffff82d4b040 r utvfu_select_norm.ntsc +ffffffff82d4b080 r utvfu_setup_capture.setup +ffffffff82d4b180 r utvfu_audio_start_chip.setup +ffffffff82d4b1c8 r utvfu_audio_stop_chip.setup +ffffffff82d4b1d8 R utvfu_ca +ffffffff82d4b200 R utvfu_vid_hw_if +ffffffff82d4b2d0 R utvfu_au_hw_if +ffffffff82d4c000 R udl_ca +ffffffff82d4c030 r udl_devs +ffffffff82d4c0b0 r udl_modes +ffffffff82d4d000 R umidi_hw_if +ffffffff82d4d030 R umidi_ca +ffffffff82d4d060 r umidi_evlen +ffffffff82d4d080 r packet_length +ffffffff82d4e000 r quirk_name +ffffffff82d4f000 R ucom_ca +ffffffff82d50000 R ugen_ca +ffffffff82d50028 R ugenread_intr_filtops +ffffffff82d50058 R ugenread_isoc_filtops +ffffffff82d51000 R uhidev_ca +ffffffff82d51030 r uhid_graphire_report_descr +ffffffff82d510b0 r uhid_graphire3_4x5_report_descr +ffffffff82d51160 r uhid_xb360gp_report_descr +ffffffff82d51210 r uhid_xbonegp_report_descr +ffffffff82d52000 R uhid_ca +ffffffff82d52028 R uhidread_filtops +ffffffff82d53000 R fido_ca +ffffffff82d54000 R ujoy_ca +ffffffff82d55000 r ukbd_keydesc_us +ffffffff82d55290 r ukbd_keydesc_de +ffffffff82d55340 r ukbd_keydesc_de_nodead +ffffffff82d55360 r ukbd_keydesc_fr +ffffffff82d55420 r ukbd_keydesc_fr_apple +ffffffff82d55560 r ukbd_keydesc_fr_dvorak_bepo +ffffffff82d556a0 r ukbd_keydesc_dk +ffffffff82d55740 r ukbd_keydesc_dk_nodead +ffffffff82d55750 r ukbd_keydesc_it +ffffffff82d557f0 r ukbd_keydesc_uk +ffffffff82d558a0 r ukbd_keydesc_jp +ffffffff82d55910 r ukbd_keydesc_sv +ffffffff82d55940 r ukbd_keydesc_sv_nodead +ffffffff82d55950 r ukbd_keydesc_no +ffffffff82d55980 r ukbd_keydesc_no_nodead +ffffffff82d55990 r ukbd_keydesc_us_dvorak +ffffffff82d55a30 r ukbd_keydesc_us_colemak +ffffffff82d55a78 r ukbd_keydesc_swapctrlcaps +ffffffff82d55a90 r ukbd_keydesc_iopener +ffffffff82d55ae0 r ukbd_keydesc_es +ffffffff82d55b80 r ukbd_keydesc_be +ffffffff82d55c40 r ukbd_keydesc_ru +ffffffff82d55db0 r ukbd_keydesc_ua +ffffffff82d55f50 r ukbd_keydesc_sg +ffffffff82d56010 r ukbd_keydesc_sg_nodead +ffffffff82d56030 r ukbd_keydesc_sf +ffffffff82d56050 r ukbd_keydesc_pt +ffffffff82d560e0 r ukbd_keydesc_pt_apple +ffffffff82d56100 r ukbd_keydesc_lt +ffffffff82d561e0 r ukbd_keydesc_la +ffffffff82d56280 r ukbd_keydesc_br +ffffffff82d56310 r ukbd_keydesc_tr +ffffffff82d563d0 r ukbd_keydesc_tr_nodead +ffffffff82d563f0 r ukbd_keydesc_pl +ffffffff82d56450 r ukbd_keydesc_hu +ffffffff82d56560 r ukbd_keydesc_si +ffffffff82d56680 r ukbd_keydesc_cf +ffffffff82d56760 r ukbd_keydesc_cf_nodead +ffffffff82d56780 r ukbd_keydesc_lv +ffffffff82d56800 r ukbd_keydesc_nl +ffffffff82d568e0 r ukbd_keydesc_nl_nodead +ffffffff82d56900 r ukbd_keydesc_is +ffffffff82d56994 r ukbd_keydesc_is_nodead +ffffffff82d569a0 r ukbd_keydesc_ee +ffffffff82d56a50 r ukbd_keydesc_ee_nodead +ffffffff82d56a70 R ukbd_keydesctab +ffffffff82d57000 R ukbd_countrylayout +ffffffff82d57090 R ukbd_consops +ffffffff82d570b0 R ukbd_accessops +ffffffff82d570c8 R ukbd_ca +ffffffff82d58000 R ums_accessops +ffffffff82d58018 R ums_ca +ffffffff82d59000 R umt_accessops +ffffffff82d59018 R umt_ca +ffffffff82d5a000 R uts_devs +ffffffff82d5a010 R uts_accessops +ffffffff82d5a028 R uts_ca +ffffffff82d5b000 R ubcmtp_accessops +ffffffff82d5b018 R ubcmtp_ca +ffffffff82d5b040 r ubcmtp_devices +ffffffff82d5c000 R ucycom_methods +ffffffff82d5c040 R ucycom_devs +ffffffff82d5c050 R ucycom_ca +ffffffff82d5d000 R uslhcom_methods +ffffffff82d5d040 R uslhcom_ca +ffffffff82d5d068 r uslhcom_devs +ffffffff82d5e000 R ulpt_ca +ffffffff82d5f000 R umass_ca +ffffffff82d5f028 R umass_bbb_methods +ffffffff82d5f040 R umass_cbi_methods +ffffffff82d60000 R umass_quirks +ffffffff82d61000 R umass_scsi_switch +ffffffff82d62000 R uthum_devs +ffffffff82d62008 R uthum_ca +ffffffff82d62030 r uthum_sensor_type_s +ffffffff82d63000 R ugold_devs +ffffffff82d63010 R ugold_ca +ffffffff82d64000 R utrh_devs +ffffffff82d64008 R utrh_ca +ffffffff82d65000 R uoakrh_devs +ffffffff82d65008 R uoakrh_ca +ffffffff82d65030 R uoakrh_methods +ffffffff82d66000 R uoaklux_devs +ffffffff82d66008 R uoaklux_ca +ffffffff82d66030 R uoaklux_methods +ffffffff82d67000 R uoakv_devs +ffffffff82d67008 R uoakv_ca +ffffffff82d67030 R uoakv_methods +ffffffff82d68000 R uonerng_ca +ffffffff82d69000 R urng_ca +ffffffff82d69030 r urng_devs +ffffffff82d6a000 R udcf_ca +ffffffff82d6a028 r udcf_devs +ffffffff82d6b000 R umbg_ca +ffffffff82d6c000 R uvisor_methods +ffffffff82d6c040 R uvisor_ca +ffffffff82d6c070 r uvisor_devs +ffffffff82d6d000 R udsbr_hw_if +ffffffff82d6d028 R udsbr_ca +ffffffff82d6e000 R utwitch_devs +ffffffff82d6e008 R utwitch_ca +ffffffff82d6f000 R aue_devs +ffffffff82d6f1b0 R aue_ca +ffffffff82d70000 R axe_devs +ffffffff82d700d0 R axe_ca +ffffffff82d71000 R axen_devs +ffffffff82d71020 R axen_ca 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ath_softcrypto +ffffffff83106018 D ath_cd +ffffffff83107000 D athn_cd +ffffffff83108000 D bwfm_2ghz_channels +ffffffff83108010 D bwfm_5ghz_channels +ffffffff83108030 D bwfm_proto_bcdc_ops +ffffffff83108050 D bwfm_cd +ffffffff83109000 D atw_bbp_io_enable_delay +ffffffff83109004 D atw_bbp_io_disable_delay +ffffffff83109008 D atw_writewep_delay +ffffffff8310900c D atw_beacon_len_adjust +ffffffff83109010 D atw_dwelltime +ffffffff83109018 D atw_cd +ffffffff8310a000 D rtw_dwelltime +ffffffff8310a004 D rtw_macbangbits_timeout +ffffffff8310a008 D rtw_cd +ffffffff8310b000 D ral_cd +ffffffff8310c000 D rt3090_freqs +ffffffff8310d000 D acx_beacon_intvl +ffffffff8310d008 D acx_cd +ffffffff8310e000 D pgt_cd +ffffffff8310f000 D sf_cd +ffffffff83110000 D malo_cd +ffffffff83111000 D bwi_cd +ffffffff83111020 D bwi_constraint +ffffffff83111030 D bwi_pa_mode +ffffffff83112000 D iosf_cd +ffffffff83112020 d iosf_lock +ffffffff83112030 d iosf_mbi_mtx +ffffffff83113000 D uhci_cd +ffffffff83114000 D ohci_cd +ffffffff83115000 D ehci_cd +ffffffff83116000 D xhci_cd +ffffffff83117000 D ccp_cd +ffffffff83118000 D sdhc_functions +ffffffff83118068 D sdhc_cd +ffffffff83119000 D rtsx_functions +ffffffff83119068 D rtsx_cd +ffffffff8311a000 D radio_cd +ffffffff8311b000 D kcs_if +ffffffff8311b040 D smic_if +ffffffff8311b080 D bt_if +ffffffff8311b0c0 D ipmi_cd +ffffffff8311b0e0 D maxsdrlen +ffffffff8311c000 D vscsi_cd +ffffffff8311d000 D mpath_cd +ffffffff8311e000 D softraid_cd +ffffffff8311e020 D smd +ffffffff8311f000 D spdmem_cd +ffffffff83120000 D dwiic_cd +ffffffff83121000 D kstat_lock +ffffffff83121010 D kstat_next_id +ffffffff83121018 D kstat_default_lock +ffffffff83122000 D pf_hdr_limit +ffffffff83122010 D pf_pool_limits +ffffffff83122080 D pf_state_list +ffffffff831220b0 D pf_purge_states_task +ffffffff831220e0 D pf_purge_states_to +ffffffff83122128 D pf_purge_states_collect +ffffffff83122130 D pf_purge_to +ffffffff83122178 D pf_purge_task +ffffffff83123000 D pf_tags +ffffffff83123010 D pf_qids +ffffffff83123020 D pf_lock +ffffffff83123030 D pf_state_lock +ffffffff83123040 D pfioctl_rw +ffffffff83123050 d pf_open_trans.ticket +ffffffff83124000 D pfi_update +ffffffff83125000 D pflog_cloner +ffffffff83126000 D pfsync_cloner +ffffffff83127000 D pflow_cloner +ffffffff83128000 D pppoe_cloner +ffffffff83128030 D pppoediscinq +ffffffff83128060 D pppoeinq +ffffffff83129000 D dt_lock +ffffffff8312a000 D dt_prov_profile +ffffffff8312a030 D dt_prov_interval +ffffffff8312b000 D dtps_nsysent +ffffffff8312b008 D dt_prov_syscall +ffffffff8312c000 D dt_prov_static +ffffffff8312c030 D dt_static_sched_dequeue +ffffffff8312c0a0 D dt_static_sched_enqueue +ffffffff8312c110 D dt_static_sched_fork +ffffffff8312c180 D dt_static_sched_off__cpu +ffffffff8312c1f0 D dt_static_sched_on__cpu +ffffffff8312c260 D dt_static_sched_remain__cpu +ffffffff8312c2d0 D dt_static_sched_sleep +ffffffff8312c340 D dt_static_sched_steal +ffffffff8312c3b0 D dt_static_sched_unsleep +ffffffff8312c420 D dt_static_sched_wakeup +ffffffff8312c490 D dt_static_raw_syscalls_sys_enter +ffffffff8312c500 D dt_static_raw_syscalls_sys_exit +ffffffff8312c570 D dt_static_uvm_fault +ffffffff8312c5e0 D dt_static_uvm_map_insert +ffffffff8312c650 D dt_static_uvm_map_remove +ffffffff8312c6c0 D dt_static_uvm_malloc +ffffffff8312c730 D dt_static_uvm_free +ffffffff8312c7a0 D dt_static_uvm_pool_get +ffffffff8312c810 D dt_static_uvm_pool_put +ffffffff8312c880 D dt_static_vfs_bufcache_rel +ffffffff8312c8f0 D dt_static_vfs_bufcache_take +ffffffff8312c960 D dt_static_vfs_cleaner +ffffffff8312c9d0 D dt_static_vmm_guest_enter +ffffffff8312ca40 D dt_static_vmm_guest_exit +ffffffff8312cab0 D dt_static_vmm_inout +ffffffff8312cb20 D dt_static_smr_call +ffffffff8312cb90 D dt_static_smr_called +ffffffff8312cc00 D dt_static_smr_barrier_enter +ffffffff8312cc70 D dt_static_smr_barrier_exit +ffffffff8312cce0 D dt_static_smr_wakeup +ffffffff8312cd50 D dt_static_smr_thread +ffffffff8312cdc0 D dt_static_refcnt_none +ffffffff8312ce30 D dt_static_refcnt_ethmulti +ffffffff8312cea0 D dt_static_refcnt_ifaddr +ffffffff8312cf10 D dt_static_refcnt_ifmaddr +ffffffff8312cf80 D dt_static_refcnt_inpcb +ffffffff8312cff0 D dt_static_refcnt_rtentry +ffffffff8312d060 D dt_static_refcnt_syncache +ffffffff8312d0d0 D dt_static_refcnt_tdb +ffffffff8312e000 D db_next_free_breakpoint +ffffffff8312e008 D db_breakpoints_inserted +ffffffff8312f000 D db_ed_style +ffffffff83130000 D db_examine_format +ffffffff83130078 D db_print_format +ffffffff83131000 D db_history_size +ffffffff83131008 D db_history_curr +ffffffff83131010 D db_history_last +ffffffff83132000 D db_tab_stop_width +ffffffff83132004 D db_max_line +ffffffff83132008 D db_max_width +ffffffff8313200c D db_radix +ffffffff83133000 D db_lastsym +ffffffff83133008 D db_maxoff +ffffffff83134000 D db_vars +ffffffff83134090 D db_evars +ffffffff83135000 D db_watchpoints_inserted +ffffffff83135008 D db_next_free_watchpoint +ffffffff83136000 D db_log +ffffffff83137000 D audio_cd +ffffffff83137020 D audio_lock +ffffffff83138000 D midi_cd +ffffffff83139000 D rnd_cold +ffffffff83139004 D rnd_slowextract +ffffffff83139008 D rnd_timeout +ffffffff83139050 D rndlock +ffffffff83139060 D rndreinit_timeout +ffffffff831390a8 D rnd_task +ffffffff8313a000 D video_cd +ffffffff8313b000 d rrip_table_analyze +ffffffff8313b0e0 d rrip_table_getname +ffffffff8313b1e0 d rrip_table_getsymname +ffffffff8313b280 d rrip_table_extref +ffffffff8313c000 D nexecs +ffffffff8313d000 D elf_note_names +ffffffff8313e000 D ncpus +ffffffff8313e004 D ncpusfound +ffffffff8313f000 D acct_lock +ffffffff8313f010 D acctsuspend +ffffffff8313f014 D acctresume +ffffffff8313f018 D acctrate +ffffffff83140000 D ticks +ffffffff83141000 D fhdlk +ffffffff83142000 D kqueue_klist_lock +ffffffff83142010 D kq_timeoutmax +ffffffff83143000 D stackgap_random +ffffffff83144000 D nprocesses +ffffffff83144004 D nthreads +ffffffff83144008 D fork_tfmrate +ffffffff83145000 D kthread_q +ffffffff83146000 D malloc_mtx +ffffffff83146010 D memname +ffffffff831464a0 D sysctl_kmemlock +ffffffff831464b0 D malloc_errintvl +ffffffff83147000 D maxdmap +ffffffff83147008 D maxsmap +ffffffff83147010 D rlimit_lock +ffffffff83148000 D sched_cost_load +ffffffff83148004 D sched_cost_priority +ffffffff83148008 D sched_cost_runnable +ffffffff8314800c D sched_cost_resident +ffffffff83149000 D intrmap_lock +ffffffff8314a000 D nosuidcoredump +ffffffff8314a008 D sigio_lock +ffffffff8314b000 D smr_lock +ffffffff8314b010 D smr_logintvl +ffffffff8314c000 D startuphook_list +ffffffff8314d000 D sysctl_lock +ffffffff8314d010 D sysctl_disklock +ffffffff8314d020 d openbsd +ffffffff8314d024 d arg_max +ffffffff8314d028 d posix_version +ffffffff8314d02c d ngroups_max +ffffffff8314d030 d int_one +ffffffff8314d034 d maxpartitions +ffffffff8314d038 d raw_part +ffffffff8314d03c D allowpowerdown +ffffffff8314d040 D hw_power +ffffffff8314d044 d byte_order +ffffffff8314d048 d page_size +ffffffff8314e000 d thrsleep_queue +ffffffff8314e010 d thrsleep_lock +ffffffff8314f000 D tc_lock +ffffffff8314f010 D windup_mtx +ffffffff8314f020 D timecounter +ffffffff8314f028 D time_second +ffffffff8314f030 d timehands +ffffffff8314f038 d dummy_timecounter +ffffffff8314f088 d th0 +ffffffff8314f120 d th1 +ffffffff83150000 D itimer_mtx +ffffffff83150010 D ratecheck_mtx +ffffffff83150020 D ppsratecheck_mtx +ffffffff83150030 D resettodr_to +ffffffff83150078 D resettodr_task +ffffffff83151000 D timeout_mutex +ffffffff83152000 D wdog_auto +ffffffff83153000 D taskq_sys +ffffffff83153050 D taskq_sys_mp +ffffffff83154000 D ccpu +ffffffff83154004 D perflevel +ffffffff83154008 D perfpolicy +ffffffff83154010 D setperf_to +ffffffff83155000 D autoconf_attdet_mtx +ffffffff83155010 D msgs +ffffffff83156000 d evcount_list +ffffffff83156010 d evcount_percpu_init_list +ffffffff83157000 D syslogf_rwlock +ffffffff83157010 D log_mtx +ffffffff83157020 D logstash_in +ffffffff83157028 D logstash_out +ffffffff83157030 D logstash_rwlock +ffffffff83158000 D pool_head +ffffffff83158010 D pool_lock +ffffffff83158020 D pool_debug +ffffffff83158028 D pool_allocator_single +ffffffff83158040 D pool_allocator_multi +ffffffff83158058 D pool_allocator_multi_ni +ffffffff83158070 D pool_gc_tick +ffffffff831580b8 D pool_gc_task +ffffffff83159000 D kprintf_mutex +ffffffff83159010 D db_panic +ffffffff83159014 D splassert_ctl +ffffffff83159018 D v_putc +ffffffff83159020 D printf_flags +ffffffff8315a000 D userconf_base +ffffffff8315a004 D userconf_maxdev +ffffffff8315a008 D userconf_totdev +ffffffff8315a00c D userconf_maxlocnames +ffffffff8315a010 D userconf_cnt +ffffffff8315a014 D userconf_lines +ffffffff8315a018 D userconf_histsz +ffffffff8315a020 D userconf_cmds +ffffffff8315b000 D ftlock +ffffffff8315c000 d ppollcollect.poll_errintvl +ffffffff8315d000 D ttydefchars +ffffffff8315d014 D ttclos +ffffffff8315d01b D ttopen +ffffffff8315d022 D ttybg +ffffffff8315d028 D ttyin +ffffffff8315d02e D ttyout +ffffffff8315d038 D ttylist_lock +ffffffff8315e000 D linesw +ffffffff8315e280 D nlinesw +ffffffff8315f000 D pt_softc_lock +ffffffff83160000 d mbstat_boot_boot_cpumem +ffffffff83160080 D mbstat +ffffffff83160090 D mclsizes +ffffffff831600b0 D m_extref_mtx +ffffffff831600c0 D m_pool_allocator +ffffffff83161000 D somaxconn +ffffffff83161004 D sominconn +ffffffff83161008 D sosplice_lock +ffffffff83162000 D sb_max +ffffffff83163000 D unp_df_lock +ffffffff83163010 D unp_gc_lock +ffffffff83163020 D unp_rights_mtx +ffffffff83163030 D unp_ino_mtx +ffffffff83163040 D unp_gc_task +ffffffff83163070 D unpst_sendspace +ffffffff83163074 D unpst_recvspace +ffffffff83163078 D unpsq_sendspace +ffffffff8316307c D unpsq_recvspace +ffffffff83163080 D unpdg_sendspace +ffffffff83163084 D unpdg_recvspace +ffffffff83164000 D doingcache +ffffffff83165000 D maxvfsconf +ffffffff83165010 d vfsconflist +ffffffff83166000 D lockf_lock +ffffffff83166010 D maxlocksperuid +ffffffff83167000 D iftovt_tab +ffffffff83167040 D vttoif_tab +ffffffff83167064 D suid_clear +ffffffff83167068 D vnode_mtx +ffffffff83167078 D vfs_stall_lock +ffffffff83167090 D vtypes +ffffffff831670e0 D vtags +ffffffff83168000 D syncer_maxdelay +ffffffff83168004 D syncdelay +ffffffff83169000 D dosdirtemplate +ffffffff8316a000 D ntfs_hashlock +ffffffff8316b000 D ntfs_toupper_lock +ffffffff8316c000 D art_table_gc_mtx +ffffffff8316c010 D art_table_gc_task +ffffffff8316c040 D art_node_gc_mtx +ffffffff8316c050 D art_node_gc_task +ffffffff8316d000 D bpf_bufsize +ffffffff8316d004 D bpf_maxbufsize +ffffffff8316d008 D bpf_sysctl_lk +ffffffff8316e000 D ifg_head +ffffffff8316e010 D if_cloners_lock +ffffffff8316e020 D if_input_task_locked +ffffffff8316e050 D netlock +ffffffff8316e060 D ifnetlist +ffffffff8316f000 D ifiq_maxlen_drop +ffffffff8316f004 D ifiq_maxlen_return +ffffffff83170000 D etherbroadcastaddr +ffffffff83170006 D ether_ipmulticast_min +ffffffff8317000c D ether_ipmulticast_max +ffffffff83170012 D ether_ip6multicast_min +ffffffff83170018 D ether_ip6multicast_max +ffffffff83171000 D etherip_cloner +ffffffff83171030 D etherip_list +ffffffff83172000 D loop_cloner +ffffffff83173000 D ifmedia_mtx +ffffffff83174000 D ppp_compressors +ffffffff83174020 D ppp_cloner +ffffffff83175000 D ppp_pkt_init +ffffffff83176000 D ppp_bsd_compress +ffffffff83177000 D ppp_deflate +ffffffff83177070 D ppp_deflate_draft +ffffffff83178000 D tun_cloner +ffffffff83178030 D tap_cloner +ffffffff83179000 D bridgeintrq +ffffffff83179038 D bridge_cloner +ffffffff8317a000 d veb_cloner +ffffffff8317a030 d vport_cloner +ffffffff8317b000 D vlan_tagh_lk +ffffffff8317b010 D vlan_cloner +ffffffff8317b040 D svlan_cloner +ffffffff8317c000 D pipex_list_mtx +ffffffff8317c010 D pipex_prune +ffffffff8317c018 D pipexoutq +ffffffff8317c050 d SHAPad2 +ffffffff8317d000 D rtmap_gc +ffffffff8317d018 D rt_rc +ffffffff8317e000 D rt_labels +ffffffff8317e010 D rtlabel_mtx +ffffffff8317f000 D enc_cloner +ffffffff83180000 D gre_cloner +ffffffff83180030 D gre_list +ffffffff83180040 D mgre_cloner +ffffffff83180070 D egre_cloner +ffffffff831800a0 D nvgre_cloner +ffffffff831800d0 D eoip_cloner +ffffffff83181000 D trunk_cloner +ffffffff83182000 d aggr_cloner +ffffffff83183000 d tpmr_cloner +ffffffff83184000 D mpe_cloner +ffffffff83185000 D mpw_cloner +ffffffff83186000 D mpip_cloner +ffffffff83187000 d bpe_cloner +ffffffff83187030 d bpe_lock +ffffffff83188000 D vether_cloner +ffffffff83189000 D pair_cloner +ffffffff8318a000 d vxlan_cloner +ffffffff8318a030 d vxlan_lock +ffffffff8318a040 d vxlan_teps +ffffffff8318b000 D underload_interval +ffffffff8318b010 D wg_cloner +ffffffff8318c000 d stoeplitz_keyseed +ffffffff8318d000 D ieee80211_cache_size +ffffffff8318e000 D arpt_prune +ffffffff8318e004 D arpt_keep +ffffffff8318e008 D arpt_down +ffffffff8318e010 D arpinq +ffffffff8318e048 D arp_mtx +ffffffff8318e058 D arp_maxtries +ffffffff8318f000 D ipport_firstauto +ffffffff8318f004 D ipport_lastauto +ffffffff8318f008 D ipport_hifirstauto +ffffffff8318f00c D ipport_hilastauto +ffffffff83190000 D divert_sendspace +ffffffff83190004 D divert_recvspace +ffffffff83190008 D divbhashsize +ffffffff83191000 D icmptstamprepl +ffffffff83191004 D icmperrppslim +ffffffff83191008 D icmp_redirtimeout +ffffffff83192000 D ipsendredirects +ffffffff83192004 D ip_defttl +ffffffff83192008 D ip_mtudisc +ffffffff8319200c D ip_mtudisc_timeout +ffffffff83192010 D ipq_mutex +ffffffff83192020 D ip_maxqueue +ffffffff83192028 D ipintrq +ffffffff83192060 d ipsend_task +ffffffff83192090 d ipsendraw_task +ffffffff83193000 D ip_mrtproto +ffffffff83193004 d sin +ffffffff83194000 D rip_sendspace +ffffffff83194008 D rip_recvspace +ffffffff83195000 D tcprexmtthresh +ffffffff83195004 D tcptv_keep_init +ffffffff83195008 D tcp_rst_ppslim +ffffffff8319500c D tcp_ackdrop_ppslim +ffffffff83195010 D tcp_syn_hash_size +ffffffff83195014 D tcp_syn_cache_limit +ffffffff83195018 D tcp_syn_bucket_limit +ffffffff8319501c D tcp_syn_use_limit +ffffffff83196000 D tcp_outflags +ffffffff83197000 D tcp_timer_mtx +ffffffff83197010 D tcp_mssdflt +ffffffff83197014 D tcp_rttdflt +ffffffff83197018 D tcp_do_rfc1323 +ffffffff8319701c D tcp_do_sack +ffffffff83197020 D tcp_do_rfc3390 +ffffffff83197024 D tcp_do_tso +ffffffff83197028 D tcp_reass_limit +ffffffff8319702c D tcp_sackhole_limit +ffffffff83198000 D tcp_backoff +ffffffff83198034 D tcp_totbackoff +ffffffff83199000 D tcp_sendspace +ffffffff83199004 D tcp_recvspace +ffffffff83199008 D tcp_autorcvbuf_inc +ffffffff8319a000 D udpcksum +ffffffff8319a004 D udp_sendspace +ffffffff8319a008 D udp_recvspace +ffffffff8319b000 D ipsec_flows_mtx +ffffffff8319b010 D ipsec_ids_idle +ffffffff8319b014 D ipsec_ids_next_flow +ffffffff8319b018 D ipsec_policy_head +ffffffff8319b028 D ipsp_ids_gc_timeout +ffffffff8319b070 D tdb_sadb_mtx +ffffffff8319b080 d tdb_hashmask +ffffffff8319c000 D ipo_tdb_mtx +ffffffff8319c010 D ipsec_acquire_mtx +ffffffff8319c020 D ipsec_acquire_head +ffffffff8319d000 D ipsec_keep_invalid +ffffffff8319d004 D ipsec_require_pfs +ffffffff8319d008 D ipsec_soft_timeout +ffffffff8319d00c D ipsec_exp_timeout +ffffffff8319d010 D ipsec_soft_first_use +ffffffff8319d014 D ipsec_exp_first_use +ffffffff8319d018 D ipsec_expire_acquire +ffffffff8319d01c D esp_enable +ffffffff8319d020 D ah_enable +ffffffff8319e000 D udpencap_enable +ffffffff8319e004 D udpencap_port +ffffffff8319f000 D carp_vh_rc +ffffffff8319f020 D carp_sc_rc +ffffffff8319f040 D carp_opts +ffffffff8319f058 D carp_cloner +ffffffff8319f088 d carp_send_na.mcast +ffffffff831a0000 d PADDING ffffffff831a1000 d PADDING -ffffffff831a2000 d PADDING -ffffffff831a3000 d weak_keys -ffffffff831a4000 D swcr_id -ffffffff831a5000 D window_inflate -ffffffff831a5004 D window_deflate -ffffffff831a6000 D ghash_update -ffffffff831a7000 D mpls_defttl -ffffffff831a7004 D mpls_mapttl_ip -ffffffff831a8000 D nfskevq_lock -ffffffff831a9000 D nfs_backoff -ffffffff831a9020 D nfs_ptimers -ffffffff831aa000 D desirednfsrvcache -ffffffff831aa010 D nonidempotent -ffffffff831aa070 D nfsv2_repstat -ffffffff831ab000 D nfsv2_type -ffffffff831ab030 D nfsv3_type -ffffffff831ab060 D nv2tov_type -ffffffff831ab080 D nv3tov_type -ffffffff831ab0a0 D nfsv3_procid -ffffffff831ab100 D nfsv2_procid -ffffffff831ab15c d nfsv3err_getattr -ffffffff831ab170 d nfsv3err_setattr -ffffffff831ab190 d nfsv3err_lookup -ffffffff831ab1a4 d nfsv3err_access -ffffffff831ab1b0 d nfsv3err_readlink -ffffffff831ab1d0 d nfsv3err_read -ffffffff831ab1f0 d nfsv3err_write -ffffffff831ab210 d nfsv3err_create -ffffffff831ab230 d nfsv3err_mkdir -ffffffff831ab250 d nfsv3err_symlink -ffffffff831ab270 d nfsv3err_mknod -ffffffff831ab290 d nfsv3err_remove -ffffffff831ab2b0 d nfsv3err_rmdir -ffffffff831ab2d0 d nfsv3err_rename -ffffffff831ab300 d nfsv3err_link -ffffffff831ab330 d nfsv3err_readdir -ffffffff831ab350 d nfsv3err_readdirplus -ffffffff831ab366 d nfsv3err_fsstat -ffffffff831ab372 d nfsv3err_fsinfo -ffffffff831ab37c d nfsv3err_pathconf -ffffffff831ab386 d nfsv3err_commit -ffffffff831ac000 D nfsrv3_procs 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in6_get_hw_ifid.allone -ffffffff831bf000 D ip6_sendredirects -ffffffff831bf004 D ip6_defhlim -ffffffff831bf008 D ip6_defmcasthlim -ffffffff831bf00c D ip6_maxfragpackets -ffffffff831bf010 D ip6_maxfrags -ffffffff831bf014 D ip6_log_interval -ffffffff831bf018 D ip6_hdrnestlimit -ffffffff831bf01c D ip6_dad_count -ffffffff831bf020 D ip6_auto_flowlabel -ffffffff831bf024 D ip6_use_deprecated -ffffffff831bf028 D ip6_neighborgcthresh -ffffffff831bf02c D ip6_maxdynroutes -ffffffff831bf030 D rip6_sendspace -ffffffff831bf038 D rip6_recvspace -ffffffff831bf040 D icmp6_redirtimeout -ffffffff831bf044 D icmp6errppslim -ffffffff831bf048 D ip6_mtudisc_timeout -ffffffff831c0000 D frag6_mutex -ffffffff831c1000 d icmp6_mtudisc_hiwat -ffffffff831c1004 d icmp6_mtudisc_lowat -ffffffff831c2000 d randomtab_20 -ffffffff831c3000 D ip6intrq -ffffffff831c3038 d ip6send_task -ffffffff831c4000 D nd6_timer_next -ffffffff831c4008 D nd6_expire_next -ffffffff831c4010 D nd6_delay -ffffffff831c4014 D nd6_umaxtries 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tsc_rdtsc -ffffffff831cd008 D tsc_timecounter -ffffffff831cd058 D tsc_is_synchronized -ffffffff831ce000 D local_apic -ffffffff831ce020 D lapic_id -ffffffff831ce080 D lapic_tpr -ffffffff831ce0a0 d lapic_ppr -ffffffff831ce100 d lapic_isr -ffffffff831cf000 D warn_once -ffffffff831d0000 d errata -ffffffff831d1000 D cpu_ucode_mtx -ffffffff831d2000 D mem_owner_bios -ffffffff831d2008 D mrops -ffffffff831d2028 D mtrrmask -ffffffff831d2030 D mtrrtomrt -ffffffff831d3000 D pmap_pg_wc -ffffffff831d3008 D pmaps_lock -ffffffff831d3018 d pmap_maxkvaddr -ffffffff831d4000 D kv_physwait -ffffffff831d5000 D fpu_save_len -ffffffff831d6000 D i8259_pic -ffffffff831d7000 D softintr_pic -ffffffff831d8000 D ipifunc -ffffffff831d9000 D setperf_mp_mutex -ffffffff831da000 D db_Grp6 -ffffffff831da040 D db_Grp7 -ffffffff831da100 D db_Grp8 -ffffffff831da140 D db_Grp9 -ffffffff831da200 D db_GrpA -ffffffff831da240 D db_GrpB -ffffffff831da280 D db_GrpC -ffffffff831da2c0 D db_inst_0f0x -ffffffff831da440 D db_inst_0f2x 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sqphy_cd -ffffffff83204000 D tqphy_cd -ffffffff83205000 D ukphy_cd -ffffffff83206000 D dcphy_cd -ffffffff83207000 D bmtphy_cd -ffffffff83208000 D brgphy_cd -ffffffff83209000 D xmphy_cd -ffffffff8320a000 D amphy_cd -ffffffff8320b000 D acphy_cd -ffffffff8320c000 D nsgphy_cd -ffffffff8320d000 D urlphy_cd -ffffffff8320e000 D rgephy_cd -ffffffff8320f000 D ciphy_cd -ffffffff83210000 D ipgphy_cd -ffffffff83211000 D etphy_cd -ffffffff83212000 D jmphy_cd -ffffffff83213000 D atphy_cd -ffffffff83214000 D scsi_autoconf -ffffffff83214008 D scsibus_cd -ffffffff83215000 D cd_cd -ffffffff83216000 D ch_cd -ffffffff83216020 D chquirks -ffffffff83217000 D sd_cd -ffffffff83218000 D st_cd -ffffffff83219000 D uk_cd -ffffffff8321a000 D safte_cd -ffffffff8321b000 D ses_cd -ffffffff8321c000 D sym_cd -ffffffff8321c020 D sym_devices -ffffffff8321c070 D asym_devices -ffffffff8321d000 D rdac_cd -ffffffff8321d020 D rdac_devices -ffffffff8321e000 D emc_cd -ffffffff8321e020 D emc_devices -ffffffff8321f000 D hds_cd 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pvclock_cd -ffffffff8322d020 D pvclock_timecounter -ffffffff8322e000 D vmt_tclo_rpc -ffffffff8322e0d0 D vmt_cd -ffffffff8322f000 D xen_cd -ffffffff8322f020 D xen_bus_dma_tag -ffffffff83230000 D xnf_cd -ffffffff83231000 D xbf_cd -ffffffff83232000 D hv_msg_dispatch -ffffffff83232110 D hv_timecounter -ffffffff83232160 D hyperv_cd -ffffffff83233000 d hv_ic_devs -ffffffff83234000 D hvn_cd -ffffffff83235000 D hvs_cd -ffffffff83236000 D virtio_cd -ffffffff83237000 D vio_cd -ffffffff83238000 D vioblk_cd -ffffffff83239000 D viomb_cd -ffffffff8323a000 D viornd_cd -ffffffff8323b000 D vioscsi_cd -ffffffff8323c000 D vmmci_cd -ffffffff8323d000 D pci_cd -ffffffff8323e000 D arc_fw_hdr -ffffffff8323e008 D arc_cd -ffffffff8323f000 D jmb_cd -ffffffff83240000 D mfii_cd -ffffffff83241000 D ips_cd -ffffffff83242000 D eap_cd -ffffffff83243000 D auacer_cd -ffffffff83244000 D auich_cd -ffffffff83245000 D azalia_cd -ffffffff83246000 D envy_cd -ffffffff83246020 D envy_matchids -ffffffff83246030 D envy_rates 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ixgbe_smart_speed -ffffffff83259024 D ixgbe_enable_msix -ffffffff8325a000 D ixl_cd -ffffffff8325a020 d ixl_sff_lock -ffffffff8325b000 D xge_cd -ffffffff8325c000 D thtc_cd -ffffffff8325c020 D tht_cd -ffffffff8325c040 D tht_txt_desc -ffffffff8325c068 D tht_rxf_desc -ffffffff8325c090 D tht_rxd_desc -ffffffff8325c0b8 D tht_txf_desc -ffffffff8325d000 D myx_cd -ffffffff8325e000 D oce_cd -ffffffff8325f000 D dc_devs -ffffffff83260000 D cas_cd -ffffffff83261000 D sis_cd -ffffffff83262000 D se_cd -ffffffff83263000 D cbb_cd -ffffffff83263020 D yc_chipsets -ffffffff832631b0 d pccbb_funcs -ffffffff832631e0 d pccbb_pcmcia_funcs -ffffffff83264000 D skc_cd -ffffffff83264020 D sk_cd -ffffffff83265000 D mskc_cd -ffffffff83265020 D msk_cd -ffffffff83266000 D puc_cd -ffffffff83267000 D puc_ndevs -ffffffff83268000 D iwi_cd -ffffffff83269000 D wpi_cd -ffffffff8326a000 D iwn_cd -ffffffff8326b000 D iwm_cd -ffffffff8326c000 D iwx_cd -ffffffff8326d000 D cmpci_cd -ffffffff8326e000 D iha_cd -ffffffff8326f000 D pcscp_cd -ffffffff8326f020 D pcscp_glue -ffffffff83270000 D bge_cd -ffffffff83271000 D bnx_firmwares -ffffffff83271160 D bnx_rv2ps -ffffffff832711c0 D bnx_cd -ffffffff832711e0 d flash_5709 -ffffffff83271210 d flash_table -ffffffff83272000 D vge_cd -ffffffff83273000 D stge_cd -ffffffff83274000 D nfe_cd -ffffffff83275000 D et_cd -ffffffff83276000 D jme_cd -ffffffff83277000 D age_cd -ffffffff83278000 D alc_dma_burst -ffffffff83278020 D alc_cd -ffffffff83279000 D ale_cd -ffffffff8327a000 D amdpm_cd -ffffffff8327a020 d amdpm_timecounter -ffffffff8327b000 D bce_cd -ffffffff8327c000 D rtwn_cd -ffffffff8327d000 d ral_rt2560_opns -ffffffff8327d028 d ral_rt2661_opns -ffffffff8327d050 d ral_rt2860_opns -ffffffff8327e000 D piixpm_cd -ffffffff8327f000 D vic_cd -ffffffff83280000 D vmx_cd -ffffffff83281000 D vmwpvs_cd -ffffffff83282000 D lii_cd -ffffffff83283000 D ichiic_cd -ffffffff83284000 D viapm_cd -ffffffff83284020 d viapm_timecounter -ffffffff83285000 D amdiic_cd -ffffffff83286000 D nviic_cd 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+ffffffff8321c020 D rdac_devices +ffffffff8321d000 D emc_cd +ffffffff8321d020 D emc_devices +ffffffff8321e000 D hds_cd +ffffffff8321e020 D hds_devices +ffffffff8321f000 D atapiscsi_cd +ffffffff83220000 D wd_cd +ffffffff83220020 d wddumpmulti +ffffffff83221000 D mainbus_cd +ffffffff83221020 D mba_iba +ffffffff83222000 D bios_cd +ffffffff83222020 D smbios_uninfo +ffffffff83223000 D mpbios_cd +ffffffff83223020 d mp_conf +ffffffff83223070 d extint_bus +ffffffff832230a0 d smi_bus +ffffffff832230d0 d nmi_bus +ffffffff83224000 D cpu_info_full_primary +ffffffff83227000 D cpu_info_list +ffffffff83227008 D mp_cpu_funcs +ffffffff83227020 D cpu_cd +ffffffff83227040 D cpu_info +ffffffff83228000 D local_pic +ffffffff83228090 D lapic_readreg +ffffffff83228098 D lapic_writereg +ffffffff832280a0 D x86_ipi +ffffffff83229000 D ioapic_cold +ffffffff83229008 D ioapic_cd +ffffffff8322a000 D efifb_std_descr +ffffffff8322a030 D efifb_descrs +ffffffff8322a038 D efifb_accessops +ffffffff8322a098 D efifb_cd +ffffffff8322b000 D pvbus_cd +ffffffff8322b020 D pvbus_types +ffffffff8322b0e0 D pvbus_dma_tag +ffffffff8322c000 D pvclock_cd +ffffffff8322c020 D pvclock_timecounter +ffffffff8322d000 D vmt_tclo_rpc +ffffffff8322d0d0 D vmt_cd +ffffffff8322e000 D xen_cd +ffffffff8322e020 D xen_bus_dma_tag +ffffffff8322f000 D xnf_cd +ffffffff83230000 D xbf_cd +ffffffff83231000 D hv_msg_dispatch +ffffffff83231110 D hv_timecounter +ffffffff83231160 D hyperv_cd +ffffffff83232000 d hv_ic_devs +ffffffff83233000 D hvn_cd +ffffffff83234000 D hvs_cd +ffffffff83235000 D virtio_cd +ffffffff83236000 D vio_cd +ffffffff83237000 D vioblk_cd +ffffffff83238000 D viomb_cd +ffffffff83239000 D viornd_cd +ffffffff8323a000 D vioscsi_cd +ffffffff8323b000 D vmmci_cd +ffffffff8323c000 D pci_cd +ffffffff8323d000 D arc_fw_hdr +ffffffff8323d008 D arc_cd +ffffffff8323e000 D jmb_cd +ffffffff8323f000 D mfii_cd +ffffffff83240000 D ips_cd +ffffffff83241000 D eap_cd +ffffffff83242000 D auacer_cd +ffffffff83243000 D auich_cd +ffffffff83244000 D azalia_cd +ffffffff83245000 D envy_cd +ffffffff83245020 D envy_matchids +ffffffff83245030 D envy_rates +ffffffff832450b0 D ak4524_dac +ffffffff832450d8 D ak4524_adc +ffffffff83245100 D ak4358_dac +ffffffff83245128 D ak5365_adc +ffffffff83245150 D unkenvy_codec +ffffffff83245180 D envy_cards +ffffffff832453f0 D envy_cards_ht +ffffffff83245600 d julia_eeprom +ffffffff83246000 D emu_cd +ffffffff83247000 D auixp_cd +ffffffff83248000 D clcs_cd +ffffffff83249000 D yds_cd +ffffffff8324a000 D auvia_cd +ffffffff8324b000 D qle_cd +ffffffff8324c000 D mpii_cd +ffffffff8324d000 D aq_cd +ffffffff8324e000 D de_cd +ffffffff8324f000 D pcn_cd +ffffffff83250000 D wdc_sii3114_vtbl +ffffffff83250038 D wdc_pdc203xx_vtbl +ffffffff83250070 D wdc_svwsata_vtbl +ffffffff832500a8 D pciide_cd +ffffffff832500d0 d sis_hostbr_type +ffffffff83251000 D ppb_cd +ffffffff83252000 D vr_cd +ffffffff83252020 D vr_devices +ffffffff83253000 D txp_cd +ffffffff83254000 D bt848_card_signature +ffffffff83255000 D bktr_cd +ffffffff83256000 D em_cd +ffffffff83257000 D ixgb_cd +ffffffff83258000 D ix_cd +ffffffff83258020 D ixgbe_smart_speed +ffffffff83258024 D ixgbe_enable_msix +ffffffff83259000 D ixl_cd +ffffffff83259020 d ixl_sff_lock +ffffffff8325a000 D xge_cd +ffffffff8325b000 D thtc_cd +ffffffff8325b020 D tht_cd +ffffffff8325b040 D tht_txt_desc +ffffffff8325b068 D tht_rxf_desc +ffffffff8325b090 D tht_rxd_desc +ffffffff8325b0b8 D tht_txf_desc +ffffffff8325c000 D myx_cd +ffffffff8325d000 D oce_cd +ffffffff8325e000 D dc_devs +ffffffff8325f000 D cas_cd +ffffffff83260000 D sis_cd +ffffffff83261000 D se_cd +ffffffff83262000 D cbb_cd +ffffffff83262020 D yc_chipsets +ffffffff832621b0 d pccbb_funcs +ffffffff832621e0 d pccbb_pcmcia_funcs +ffffffff83263000 D skc_cd +ffffffff83263020 D sk_cd +ffffffff83264000 D mskc_cd +ffffffff83264020 D msk_cd +ffffffff83265000 D puc_cd +ffffffff83266000 D puc_ndevs +ffffffff83267000 D iwi_cd +ffffffff83268000 D wpi_cd +ffffffff83269000 D iwn_cd +ffffffff8326a000 D iwm_cd +ffffffff8326b000 D iwx_cd +ffffffff8326c000 D cmpci_cd +ffffffff8326d000 D iha_cd +ffffffff8326e000 D pcscp_cd +ffffffff8326e020 D pcscp_glue +ffffffff8326f000 D bge_cd +ffffffff83270000 D bnx_firmwares +ffffffff83270160 D bnx_rv2ps +ffffffff832701c0 D bnx_cd +ffffffff832701e0 d flash_5709 +ffffffff83270210 d flash_table +ffffffff83271000 D vge_cd +ffffffff83272000 D stge_cd +ffffffff83273000 D nfe_cd +ffffffff83274000 D et_cd +ffffffff83275000 D jme_cd +ffffffff83276000 D age_cd +ffffffff83277000 D alc_dma_burst +ffffffff83277020 D alc_cd +ffffffff83278000 D ale_cd +ffffffff83279000 D amdpm_cd +ffffffff83279020 d amdpm_timecounter +ffffffff8327a000 D bce_cd +ffffffff8327b000 D rtwn_cd +ffffffff8327c000 d ral_rt2560_opns +ffffffff8327c028 d ral_rt2661_opns +ffffffff8327c050 d ral_rt2860_opns +ffffffff8327d000 D piixpm_cd +ffffffff8327e000 D vic_cd +ffffffff8327f000 D vmx_cd +ffffffff83280000 D vmwpvs_cd +ffffffff83281000 D lii_cd +ffffffff83282000 D ichiic_cd +ffffffff83283000 D viapm_cd +ffffffff83283020 d viapm_timecounter +ffffffff83284000 D amdiic_cd +ffffffff83285000 D nviic_cd +ffffffff83286000 D kate_cd +ffffffff83287000 D km_cd +ffffffff83288000 D cpu_model_offsets +ffffffff83288070 D ksmn_cd +ffffffff83289000 D itherm_cd +ffffffff8328a000 D pchtemp_cd +ffffffff8328b000 D xspd_cd +ffffffff8328c000 D virtio_pci_ops +ffffffff8328d000 D bwfm_pci_buscore_ops +ffffffff8328d030 D bwfm_pci_bus_ops +ffffffff8328d058 D bwfm_pci_msgbuf_ops +ffffffff8328e000 D bnxt_cd +ffffffff8328f000 D mcx_cd +ffffffff83290000 D iavf_cd +ffffffff83291000 D rge_cd +ffffffff83292000 D igc_cd +ffffffff83293000 D ngbe_cd +ffffffff83294000 D agp_cd +ffffffff83295000 D intagp_cd +ffffffff83295020 D agp_i810_methods +ffffffff83296000 D reservation_ww_class +ffffffff83297000 d bridge_lock +ffffffff83297010 d bridge_list +ffffffff83298000 d drm_connector_enum_list +ffffffff832981f8 d connector_list_lock +ffffffff83298208 d connector_list +ffffffff83299000 d kernel_fb_helper_list +ffffffff83299010 d kernel_fb_helper_lock +ffffffff8329a000 D drm_global_mutex +ffffffff8329b000 D i2c_bit_algo +ffffffff8329b010 d drm_fence_context_count +ffffffff8329b018 d dma_fence_stub_mtx +ffffffff8329b028 D wait_bit_mtx +ffffffff8329b038 D shrinkers +ffffffff8329c000 d crtc_ww_class +ffffffff8329d000 d panel_lock +ffffffff8329d010 d panel_list +ffffffff8329e000 d ttm_global_mutex +ffffffff8329f000 D intel_bbops +ffffffff832a0000 d i915_sys_placement +ffffffff832a0020 d i915_ttm_bo_driver +ffffffff832a1000 d mchdev_lock +ffffffff832a2000 D inteldrm_stdscreen +ffffffff832a2030 D inteldrm_scrlist +ffffffff832a2038 D inteldrm_screenlist +ffffffff832a2048 D inteldrm_accessops +ffffffff832a20a8 D inteldrm_cd +ffffffff832a3000 d capture_mutex +ffffffff832a4000 d mitigations +ffffffff832a5000 D i915_modparams +ffffffff832a6000 d schedule_lock +ffffffff832a7000 d unbind_fence_ops +ffffffff832a8000 D intel_graphics_stolen_res +ffffffff832a9000 D btc_valid_sclk +ffffffff832aa000 d evergreen_cs_packet_parse_vline.vline_start_end +ffffffff832aa020 d evergreen_cs_packet_parse_vline.vline_status +ffffffff832ab000 d r600_cs_packet_parse_vline.vline_start_end +ffffffff832ab008 d r600_cs_packet_parse_vline.vline_status +ffffffff832ac000 d r100_asic +ffffffff832ac2e0 d r200_asic +ffffffff832ac5c0 d r300_asic_pcie +ffffffff832ac8a0 d r300_asic +ffffffff832acb80 d r420_asic +ffffffff832ace60 d rs400_asic +ffffffff832ad140 d rs600_asic +ffffffff832ad420 d rs690_asic +ffffffff832ad700 d rv515_asic +ffffffff832ad9e0 d r520_asic +ffffffff832adcc0 d r600_asic +ffffffff832adfa0 d rv6xx_asic +ffffffff832ae280 d rs780_asic +ffffffff832ae560 d rv770_asic +ffffffff832ae840 d evergreen_asic +ffffffff832aeb20 d sumo_asic +ffffffff832aee00 d btc_asic +ffffffff832af0e0 d cayman_asic +ffffffff832af3c0 d trinity_asic +ffffffff832af6a0 d si_asic +ffffffff832af980 d ci_asic +ffffffff832afc60 d kv_asic +ffffffff832b0000 d dce6_funcs +ffffffff832b0018 d dce6_hdmi_funcs +ffffffff832b0088 d dce6_dp_funcs +ffffffff832b00f8 d dce4_funcs +ffffffff832b0110 d dce4_hdmi_funcs +ffffffff832b0180 d dce4_dp_funcs +ffffffff832b01f0 d dce32_funcs +ffffffff832b0208 d dce32_hdmi_funcs +ffffffff832b0278 d dce32_dp_funcs +ffffffff832b02e8 d r600_funcs +ffffffff832b0300 d r600_hdmi_funcs +ffffffff832b1000 D radeon_modeset +ffffffff832b1004 D radeon_dynclks +ffffffff832b1008 D radeon_agpmode +ffffffff832b100c D radeon_gart_size +ffffffff832b1010 D radeon_tv +ffffffff832b1014 D radeon_audio +ffffffff832b1018 D radeon_pcie_gen2 +ffffffff832b101c D radeon_msi +ffffffff832b1020 D radeon_lockup_timeout +ffffffff832b1024 D radeon_dpm +ffffffff832b1028 D radeon_aspm +ffffffff832b102c D radeon_runtime_pm +ffffffff832b1030 D radeon_vm_size +ffffffff832b1034 D radeon_vm_block_size +ffffffff832b1038 D radeon_use_pflipirq +ffffffff832b103c D radeon_bapm +ffffffff832b1040 D radeon_backlight +ffffffff832b1044 D radeon_auxch +ffffffff832b1048 D radeon_uvd +ffffffff832b104c D radeon_vce +ffffffff832b1050 D radeon_si_support +ffffffff832b1054 D radeon_cik_support +ffffffff832b1058 D radeondrm_cd +ffffffff832b1078 D radeondrm_stdscreen +ffffffff832b10a8 D radeondrm_scrlist +ffffffff832b10b0 D radeondrm_screenlist +ffffffff832b10c0 D radeondrm_accessops +ffffffff832b2000 D radeon_bbops +ffffffff832b3000 d radeon_bo_driver +ffffffff832b4000 d verde_pg_init +ffffffff832b5000 d cac_weights_pitcairn +ffffffff832b54d0 d cac_weights_oland +ffffffff832b6000 d aldebaran_mode2_handler +ffffffff832b7000 d amdgpu_vbios_version_attrs +ffffffff832b8000 D amdgpu_asic_name +ffffffff832b9000 D amdgpu_gart_size +ffffffff832b9004 D amdgpu_gtt_size +ffffffff832b9008 D amdgpu_moverate +ffffffff832b900c D amdgpu_audio +ffffffff832b9010 D amdgpu_pcie_gen2 +ffffffff832b9014 D amdgpu_msi +ffffffff832b9018 D amdgpu_dpm +ffffffff832b901c D amdgpu_fw_load_type +ffffffff832b9020 D amdgpu_aspm +ffffffff832b9024 D amdgpu_runtime_pm +ffffffff832b9028 D amdgpu_ip_block_mask +ffffffff832b902c D amdgpu_bapm +ffffffff832b9030 D amdgpu_vm_size +ffffffff832b9034 D amdgpu_vm_fragment_size +ffffffff832b9038 D amdgpu_vm_block_size +ffffffff832b903c D amdgpu_vm_update_mode +ffffffff832b9040 D amdgpu_dc +ffffffff832b9044 D amdgpu_sched_jobs +ffffffff832b9048 D amdgpu_sched_hw_submission +ffffffff832b9050 D amdgpu_cg_mask +ffffffff832b9058 D amdgpu_pg_mask +ffffffff832b905c D amdgpu_sdma_phase_quantum +ffffffff832b9060 D amdgpu_pp_feature_mask +ffffffff832b9064 D amdgpu_lbpw +ffffffff832b9068 D amdgpu_compute_multipipe +ffffffff832b906c D amdgpu_gpu_recovery +ffffffff832b9070 D amdgpu_smu_pptable_id +ffffffff832b9074 D amdgpu_dc_feature_mask +ffffffff832b9078 D amdgpu_async_gfx_ring +ffffffff832b907c D amdgpu_discovery +ffffffff832b9080 D amdgpu_noretry +ffffffff832b9084 D amdgpu_force_asic_type +ffffffff832b9088 D amdgpu_tmz +ffffffff832b908c D amdgpu_reset_method +ffffffff832b9090 D amdgpu_num_kcq +ffffffff832b9094 D amdgpu_use_xgmi_p2p +ffffffff832b9098 D amdgpu_sg_display +ffffffff832b90a0 D mgpu_info +ffffffff832b9250 D amdgpu_ras_enable +ffffffff832b9254 D amdgpu_ras_mask +ffffffff832b9258 D amdgpu_bad_page_threshold +ffffffff832b925c D amdgpu_backlight +ffffffff832b9260 D amdgpu_cd +ffffffff832b9280 D amdgpu_stdscreen +ffffffff832b92b0 D amdgpu_scrlist +ffffffff832b92b8 D amdgpu_screenlist +ffffffff832b92c8 D amdgpu_accessops +ffffffff832ba000 d amdgpu_gtt_mgr_attributes +ffffffff832bb000 D amdgpu_bbops +ffffffff832bc000 D soc15_ih_clientid_name +ffffffff832bd000 D ras_error_string +ffffffff832bd030 D ras_block_string +ffffffff832bd0c0 D ras_mca_block_string +ffffffff832be000 d amdgpu_bo_driver +ffffffff832bf000 d amdgpu_vram_mgr_attributes +ffffffff832c0000 D amdgpu_xgmi_hive_type +ffffffff832c0008 d xgmi_mutex +ffffffff832c0018 D xgmi_ras_hw_ops +ffffffff832c0058 D xgmi_ras +ffffffff832c1000 d gfx_v9_0_ras +ffffffff832c2000 D gfx_v9_4_ras +ffffffff832c3000 D gfx_v9_4_2_ras_ops +ffffffff832c3040 D gfx_v9_4_2_ras +ffffffff832c4000 D hdp_v4_0_ras_hw_ops +ffffffff832c4040 D hdp_v4_0_ras +ffffffff832c5000 d jpeg_v2_6_ras +ffffffff832c6000 D mca_v3_0_mp0_ras +ffffffff832c6058 D mca_v3_0_mp1_ras +ffffffff832c60b0 D mca_v3_0_mpio_ras +ffffffff832c7000 D mmhub_v1_0_ras_hw_ops +ffffffff832c7040 D mmhub_v1_0_ras +ffffffff832c8000 D mmhub_v1_7_ras_hw_ops +ffffffff832c8040 D mmhub_v1_7_ras +ffffffff832c9000 D mmhub_v9_4_ras +ffffffff832ca000 D nbio_v7_4_ras +ffffffff832cb000 d sriov_sc_video_codecs_encode +ffffffff832cb010 d sriov_sc_video_codecs_decode +ffffffff832cb020 d sriov_sc_video_codecs_encode_array +ffffffff832cb050 d sriov_sc_video_codecs_decode_array +ffffffff832cc000 d sdma_v4_0_ras +ffffffff832cd000 D sdma_v4_4_ras +ffffffff832ce000 d sienna_cichlid_mode2_handler +ffffffff832cf000 D umc_v6_1_ras +ffffffff832d0000 D umc_v6_7_ras +ffffffff832d1000 D umc_v8_10_ras +ffffffff832d2000 D umc_v8_7_ras +ffffffff832d3000 d vcn_v2_6_ras +ffffffff832d4000 d amdgpu_dm_mode_config_helperfuncs +ffffffff832d4010 d dm_atomic_state_funcs +ffffffff832d5000 d construct_integrated_info.result +ffffffff832d5004 d bios_parser_get_firmware_info.result +ffffffff832d6000 d dce_funcs +ffffffff832d7000 d dce110_funcs +ffffffff832d8000 d dce112_funcs +ffffffff832d9000 d dce120_funcs +ffffffff832da000 d rv1_clk_funcs +ffffffff832da088 d rv1_clk_internal_funcs +ffffffff832db000 d rv2_clk_internal_funcs +ffffffff832dc000 d dcn2_funcs +ffffffff832dd000 D dcn201_funcs +ffffffff832de000 d dcn21_funcs +ffffffff832de088 d rn_bw_params +ffffffff832df000 D dcn3_fpga_funcs +ffffffff832df088 d dcn3_funcs +ffffffff832e0000 d vg_funcs +ffffffff832e0088 d dummy_clocks +ffffffff832e01b8 d vg_bw_params +ffffffff832e1000 d dcn31_bw_params +ffffffff832e12a0 d dcn31_funcs +ffffffff832e2000 d dcn314_bw_params +ffffffff832e22a0 d dcn314_funcs +ffffffff832e3000 d dcn315_funcs +ffffffff832e3088 d dcn315_bw_params +ffffffff832e4000 d dcn316_funcs +ffffffff832e4088 d dcn316_bw_params +ffffffff832e5000 d dcn32_funcs +ffffffff832e6000 d dcn10_dpp_cap +ffffffff832e7000 D aperture_default_system +ffffffff832e8000 d dcn20_dpp_cap +ffffffff832e8010 d dcn20_dpp_funcs +ffffffff832e9000 d dcn20_hubp_funcs +ffffffff832ea000 d dcn20_opp_funcs +ffffffff832eb000 d dcn20_tg_funcs +ffffffff832ec000 d dcn201_dpp_funcs +ffffffff832ec110 d dcn201_dpp_cap +ffffffff832ed000 d dcn201_hubp_funcs +ffffffff832ee000 d dcn201_opp_funcs +ffffffff832ef000 d dcn201_tg_funcs +ffffffff832f0000 D dcn201_ip +ffffffff832f01b8 D dcn201_soc +ffffffff832f0b88 d dcn201_res_pool_funcs +ffffffff832f1000 d dcn21_hubp_funcs +ffffffff832f2000 d dcn30_afmt_funcs +ffffffff832f3000 d dcn30_dpp_cap +ffffffff832f3010 d dcn30_dpp_funcs +ffffffff832f4000 d dcn30_hubp_funcs +ffffffff832f5000 d dcn30_tg_funcs +ffffffff832f6000 d dcn30_vpg_funcs +ffffffff832f7000 d res_cap_dcn301 +ffffffff832f7040 d dcn301_res_pool_funcs +ffffffff832f8000 d dcn302_res_pool_funcs +ffffffff832f9000 d dcn303_res_pool_funcs +ffffffff832fa000 d dcn31_afmt_funcs +ffffffff832fb000 d dcn31_apg_funcs +ffffffff832fc000 d dcn31_hpo_dp_link_encoder_funcs +ffffffff832fd000 d dcn31_hubp_funcs +ffffffff832fe000 d dcn31_tg_funcs +ffffffff832ff000 d dcn31_res_pool_funcs +ffffffff83300000 d dcn31_vpg_funcs +ffffffff83301000 d dcn314_tg_funcs +ffffffff83302000 d dcn314_res_pool_funcs +ffffffff83303000 d dcn315_res_pool_funcs +ffffffff83304000 d dcn316_res_pool_funcs +ffffffff83305000 d dcn32_dpp_funcs +ffffffff83305110 d dcn32_dpp_cap +ffffffff83306000 d dcn32_hpo_dp_link_encoder_funcs +ffffffff83307000 d dcn32_hubp_funcs +ffffffff83308000 d dcn32_tg_funcs +ffffffff83309000 d dcn32_res_pool_funcs +ffffffff8330a000 d dcn321_res_pool_funcs +ffffffff8330b000 D dcn1_0_ip +ffffffff8330b1b8 D dcn1_0_soc +ffffffff8330c000 D dcn2_0_ip +ffffffff8330c1b8 D dcn2_0_nv14_ip +ffffffff8330c370 D dcn2_0_soc +ffffffff8330cd40 D dcn2_0_nv14_soc +ffffffff8330d710 D dcn2_1_ip +ffffffff8330d8c8 D dcn2_1_soc +ffffffff8330e298 D ddr4_wm_table_gs +ffffffff8330e358 D lpddr4_wm_table_gs +ffffffff8330e418 D lpddr4_wm_table_with_disabled_ppt +ffffffff8330e4d8 D ddr4_wm_table_rn +ffffffff8330e598 D ddr4_1R_wm_table_rn +ffffffff8330e658 D lpddr4_wm_table_rn +ffffffff8330f000 D dcn3_0_ip +ffffffff8330f1b8 D dcn3_0_soc +ffffffff83310000 D dcn3_01_ip +ffffffff833101b8 D dcn3_01_soc +ffffffff83310b88 D ddr4_wm_table +ffffffff83310c48 D lpddr5_wm_table +ffffffff83311000 D dcn3_02_ip +ffffffff833111b8 D dcn3_02_soc +ffffffff83312000 D dcn3_03_ip +ffffffff833121b8 D dcn3_03_soc +ffffffff83313000 D dcn3_1_ip +ffffffff833131b8 D dcn3_15_ip +ffffffff83313370 D dcn3_16_ip +ffffffff83313528 d dcn3_15_soc +ffffffff83313ef8 d dcn3_1_soc +ffffffff833148c8 d dcn3_16_soc +ffffffff83316000 D dcn3_14_ip +ffffffff833161b8 D dcn3_14_soc +ffffffff83317000 D dcn3_2_ip +ffffffff833171b8 D dcn3_2_soc +ffffffff83318000 D dcn3_21_ip +ffffffff833181b8 D dcn3_21_soc +ffffffff83319000 d dsc_policy_max_target_bpp_limit +ffffffff8331a000 D DIDTEDCConfig_P12 +ffffffff8331a070 d smu7_profiling +ffffffff8331b000 d cyan_skillfish_table_map +ffffffff8331b080 d cyan_skillfish_message_map +ffffffff8331c000 d navi10_table_map +ffffffff8331c080 d navi10_pwr_src_map +ffffffff8331c090 d navi10_workload_map +ffffffff8331c0d0 d navi10_message_map +ffffffff8331cb20 d navi10_clk_map +ffffffff8331cbe0 d navi10_feature_mask_map +ffffffff8331d000 d sienna_cichlid_message_map +ffffffff8331da50 d sienna_cichlid_table_map +ffffffff8331dad0 d sienna_cichlid_pwr_src_map +ffffffff8331dae0 d sienna_cichlid_workload_map +ffffffff8331db20 d sienna_cichlid_clk_map +ffffffff8331dbe0 d sienna_cichlid_feature_mask_map +ffffffff8331e000 d vangogh_message_map +ffffffff8331ea50 d vangogh_table_map +ffffffff8331ead0 d vangogh_workload_map +ffffffff8331eb10 d vangogh_feature_mask_map +ffffffff8331f000 d renoir_table_map +ffffffff8331f080 d renoir_workload_map +ffffffff8331f0c0 d renoir_message_map +ffffffff8331fb10 d renoir_clk_map +ffffffff83320000 d smu_v13_0_0_message_map +ffffffff83320a50 d smu_v13_0_0_feature_mask_map +ffffffff83320e20 d smu_v13_0_0_table_map +ffffffff83320ea0 d smu_v13_0_0_pwr_src_map +ffffffff83320eb0 d smu_v13_0_0_workload_map +ffffffff83320ef0 d smu_v13_0_0_clk_map +ffffffff83321000 d smu_v13_0_4_message_map +ffffffff83321a50 d smu_v13_0_4_table_map +ffffffff83321ad0 d smu_v13_0_4_feature_mask_map +ffffffff83322000 d smu_v13_0_5_table_map +ffffffff83322080 d smu_v13_0_5_message_map +ffffffff83322ad0 d smu_v13_0_5_feature_mask_map +ffffffff83323000 d smu_v13_0_7_message_map +ffffffff83323a50 d smu_v13_0_7_feature_mask_map +ffffffff83323e20 d smu_v13_0_7_table_map +ffffffff83323ea0 d smu_v13_0_7_pwr_src_map +ffffffff83323eb0 d smu_v13_0_7_workload_map +ffffffff83323ef0 d smu_v13_0_7_clk_map +ffffffff83324000 d yellow_carp_table_map +ffffffff83324080 d yellow_carp_message_map +ffffffff83324ad0 d yellow_carp_feature_mask_map +ffffffff83325000 D pci_conf_lock +ffffffff83325010 D pci_bus_dma_tag +ffffffff83325088 D msi_pic +ffffffff83325118 D msix_pic +ffffffff83326000 D pchb_cd +ffffffff83327000 D amas_cd +ffffffff83328000 D cardslot_cd +ffffffff83329000 D cardbus_cd +ffffffff8332a000 d csdevs +ffffffff8332b000 d ral_rt2560_opns +ffffffff8332b028 d ral_rt2661_opns +ffffffff8332b050 d ral_rt2860_opns +ffffffff8332c000 D pcmcia_cd +ffffffff8332d000 D pcmcia_3cxem556_func0 +ffffffff8332d0b8 D pcmcia_3cxem556_func0_cfe0 +ffffffff8332d158 D pcmcia_megahertz_xjem1144_func0 +ffffffff8332d210 D pcmcia_megahertz_xjem1144_func0_cfe0 +ffffffff8332d2b0 d pcmcia_3cxem556_func1 +ffffffff8332d368 d pcmcia_3cxem556_func1_cfe0 +ffffffff8332d408 d pcmcia_megahertz_xjem1144_func1 +ffffffff8332d4c0 d pcmcia_megahertz_xjem1144_func1_cfe0 +ffffffff8332d560 d pcmcia_sierra_a555_func1 +ffffffff8332d618 d pcmcia_sierra_a555_func1_cfe0 +ffffffff8332d6b8 d pcmcia_sveclancard_func0 +ffffffff8332d770 d pcmcia_sveclancard_func0_cfe0 +ffffffff8332e000 D ep_pcmcia_prod +ffffffff8332f000 D aic_pcmcia_prod +ffffffff83330000 D com_pcmcia_prod +ffffffff83331000 D wdc_pcmcia_pr +ffffffff83332000 D sm_pcmcia_prod +ffffffff83333000 D xe_cd +ffffffff83334000 D pcib_cd +ffffffff83335000 D amdpcib_cd +ffffffff83336000 D tcpcib_cd +ffffffff83337000 D aapic_cd +ffffffff83338000 D hme_cd +ffffffff83339000 D isa_cd +ffffffff8333a000 D isadma_cd +ffffffff8333b000 D fdc_cd +ffffffff8333c000 D fd_types +ffffffff8333c1f8 D fd_cd +ffffffff8333d000 D mpu_cd +ffffffff8333e000 D pcppi_cd +ffffffff8333f000 D spkr_cd +ffffffff83340000 D wbsio_cd +ffffffff83341000 D schsio_cd +ffffffff83342000 D it_cd +ffffffff83343000 D uguru_cd +ffffffff83344000 D aps_cd +ffffffff83345000 D isa_bus_dma_tag +ffffffff83346000 D wsdisplay_cd +ffffffff83346020 D wsdisplay_cons +ffffffff83346058 D wsdisplay_defaultscreens +ffffffff83347000 D wskbd_cd +ffffffff83347020 D wskbd_default_bell_data +ffffffff83347030 D wskbd_default_keyrepeat_data +ffffffff83347040 D wskbd_srcops +ffffffff83348000 d compose_tab +ffffffff83349000 D wsmouse_cd +ffffffff83349020 D wsmouse_srcops +ffffffff8334a000 D wsmux_srcops +ffffffff8334a030 D wsmux_tree_lock +ffffffff8334b000 D vt100_output +ffffffff8334c000 D pckbd_cd +ffffffff8334d000 D pms_cd +ffffffff8334d020 d synaptics_params +ffffffff8334d030 d alps_params +ffffffff8334e000 D skgpio_cd +ffffffff8334f000 D pctr_conf_lock +ffffffff83350000 D ukbd_keymapdata +ffffffff83351000 D usbrev_str +ffffffff83351030 D usb_cd +ffffffff83352000 d usbd_ratecheck.errinterval +ffffffff83353000 D uhub_cd +ffffffff83354000 D uaudio_cd +ffffffff83355000 D uvideo_ctrls +ffffffff833552d8 D uvideo_cd +ffffffff83356000 D utvfu_norm_params +ffffffff83356030 D utvfu_cd +ffffffff83357000 D udl_reg_vals_640x480_60 +ffffffff83357020 D udl_reg_vals_640x480_67 +ffffffff83357040 D udl_reg_vals_640x480_72 +ffffffff83357060 D udl_reg_vals_640x480_75 +ffffffff83357080 D udl_reg_vals_800x480_61 +ffffffff833570a0 D udl_reg_vals_800x600_56 +ffffffff833570c0 D udl_reg_vals_800x600_60 +ffffffff833570e0 D udl_reg_vals_800x600_72 +ffffffff83357100 D udl_reg_vals_800x600_74 +ffffffff83357120 D udl_reg_vals_800x600_75 +ffffffff83357140 D udl_reg_vals_1024x768_60 +ffffffff83357160 D udl_reg_vals_1024x768_70 +ffffffff83357180 D udl_reg_vals_1024x768_75 +ffffffff833571a0 D udl_reg_vals_1280x800_60 +ffffffff833571c0 D udl_reg_vals_1280x960_60 +ffffffff833571e0 D udl_reg_vals_1280x1024_60 +ffffffff83357200 D udl_reg_vals_1280x1024_75 +ffffffff83357220 D udl_reg_vals_1366x768_60 +ffffffff83357240 D udl_reg_vals_1440x900_60 +ffffffff83357260 D udl_reg_vals_1440x900_59 +ffffffff83357280 D udl_reg_vals_1440x900_75 +ffffffff833572a0 D udl_reg_vals_1680x1050_60 +ffffffff833572c0 D udl_reg_vals_1600x1200_60 +ffffffff833572e0 D udl_reg_vals_1920x1080_60 +ffffffff83357300 D udl_null_key_1 +ffffffff83357310 D udl_decomp_table +ffffffff83358510 D udl_cd +ffffffff83358530 D udl_stdscreen +ffffffff83358560 D udl_scrlist +ffffffff83358568 D udl_screenlist +ffffffff83358578 D udl_accessops +ffffffff83359000 D umidi_cd +ffffffff8335a000 d umq_YAMAHA_YAMAHA_UX256_ANYIFACE +ffffffff8335a020 d umq_ROLAND_ROLAND_UM1_2 +ffffffff8335a040 d umq_ROLAND_ROLAND_SC8850_2 +ffffffff8335a060 d umq_ROLAND_ROLAND_SD90_2 +ffffffff8335a080 d umq_ROLAND_ROLAND_UM880N_0 +ffffffff8335a0a0 d umq_ROLAND_ROLAND_UA100_2 +ffffffff8335a0c0 d umq_ROLAND_ROLAND_UM4_2 +ffffffff8335a0e0 d umq_ROLAND_ROLAND_U8_2 +ffffffff8335a100 d umq_ROLAND_ROLAND_UM2_2 +ffffffff8335a120 d umq_ROLAND_ROLAND_SC8820_2 +ffffffff8335a140 d umq_ROLAND_ROLAND_PC300_2 +ffffffff8335a160 d umq_ROLAND_ROLAND_SK500_2 +ffffffff8335a180 d umq_ROLAND_ROLAND_SCD70_2 +ffffffff8335a1a0 d umq_ROLAND_ROLAND_UM550_0 +ffffffff8335a1c0 d umq_ROLAND_ROLAND_SD20_0 +ffffffff8335a1e0 d umq_ROLAND_ROLAND_SD80_0 +ffffffff8335a200 d umq_ROLAND_ROLAND_UA700_3 +ffffffff8335a220 d umq_ROLAND_ROLAND_UMONE_ANYIFACE +ffffffff8335a240 D umidi_quirklist +ffffffff8335a4a0 d umq_YAMAHA_YAMAHA_UX256_ANYIFACE_fixed_ep_desc +ffffffff8335a4c0 d umq_YAMAHA_YAMAHA_UX256_ANYIFACE_fixed_ep_endpoints +ffffffff8335a4d0 d umq_ROLAND_ROLAND_UM1_2_fixed_ep_desc +ffffffff8335a4f0 d umq_ROLAND_ROLAND_UM1_2_fixed_ep_endpoints +ffffffff8335a500 d umq_ROLAND_ROLAND_SC8850_2_fixed_ep_desc +ffffffff8335a520 d umq_ROLAND_ROLAND_SC8850_2_fixed_ep_endpoints +ffffffff8335a530 d umq_ROLAND_ROLAND_SD90_2_fixed_ep_desc +ffffffff8335a550 d umq_ROLAND_ROLAND_SD90_2_fixed_ep_endpoints +ffffffff8335a560 d umq_ROLAND_ROLAND_UM880N_0_fixed_ep_desc +ffffffff8335a580 d umq_ROLAND_ROLAND_UM880N_0_fixed_ep_endpoints +ffffffff8335a590 d umq_ROLAND_ROLAND_UA100_2_fixed_ep_desc +ffffffff8335a5b0 d umq_ROLAND_ROLAND_UA100_2_fixed_ep_endpoints +ffffffff8335a5c0 d umq_ROLAND_ROLAND_UM4_2_fixed_ep_desc +ffffffff8335a5e0 d umq_ROLAND_ROLAND_UM4_2_fixed_ep_endpoints +ffffffff8335a5f0 d umq_ROLAND_ROLAND_U8_2_fixed_ep_desc +ffffffff8335a610 d umq_ROLAND_ROLAND_U8_2_fixed_ep_endpoints +ffffffff8335a620 d umq_ROLAND_ROLAND_UM2_2_fixed_ep_desc +ffffffff8335a640 d umq_ROLAND_ROLAND_UM2_2_fixed_ep_endpoints +ffffffff8335a650 d umq_ROLAND_ROLAND_SC8820_2_fixed_ep_desc +ffffffff8335a670 d umq_ROLAND_ROLAND_SC8820_2_fixed_ep_endpoints +ffffffff8335a680 d umq_ROLAND_ROLAND_PC300_2_fixed_ep_desc +ffffffff8335a6a0 d umq_ROLAND_ROLAND_PC300_2_fixed_ep_endpoints +ffffffff8335a6b0 d umq_ROLAND_ROLAND_SK500_2_fixed_ep_desc +ffffffff8335a6d0 d umq_ROLAND_ROLAND_SK500_2_fixed_ep_endpoints +ffffffff8335a6e0 d umq_ROLAND_ROLAND_SCD70_2_fixed_ep_desc +ffffffff8335a700 d umq_ROLAND_ROLAND_SCD70_2_fixed_ep_endpoints +ffffffff8335a710 d umq_ROLAND_ROLAND_UM550_0_fixed_ep_desc +ffffffff8335a730 d umq_ROLAND_ROLAND_UM550_0_fixed_ep_endpoints +ffffffff8335a740 d umq_ROLAND_ROLAND_SD20_0_fixed_ep_desc +ffffffff8335a760 d umq_ROLAND_ROLAND_SD20_0_fixed_ep_endpoints +ffffffff8335a770 d umq_ROLAND_ROLAND_SD80_0_fixed_ep_desc +ffffffff8335a790 d umq_ROLAND_ROLAND_SD80_0_fixed_ep_endpoints +ffffffff8335a7a0 d umq_ROLAND_ROLAND_UA700_3_fixed_ep_desc +ffffffff8335a7c0 d umq_ROLAND_ROLAND_UA700_3_fixed_ep_endpoints +ffffffff8335a7d0 d umq_ROLAND_ROLAND_UMONE_ANYIFACE_fixed_ep_desc +ffffffff8335a7f0 d umq_ROLAND_ROLAND_UMONE_ANYIFACE_fixed_ep_endpoints +ffffffff8335b000 D ucom_cd +ffffffff8335c000 D ugen_cd +ffffffff8335d000 D uhidev_cd +ffffffff8335d020 d uhidev_use_rdesc.reportbuf +ffffffff8335e000 D uhid_cd +ffffffff8335f000 D fido_cd +ffffffff83360000 D ujoy_cd +ffffffff83361000 D ukbd_cd +ffffffff83362000 D ums_cd +ffffffff83362020 d ums_fix_elecom_descriptor.match +ffffffff83363000 D umt_cd +ffffffff83364000 D def_scale +ffffffff83364020 D uts_cd +ffffffff83365000 D ubcmtp_cd +ffffffff83365020 d ubcmtp_wsmousecfg +ffffffff83366000 D ucycom_cd +ffffffff83367000 D uslhcom_cd +ffffffff83368000 D ulpt_fwdevs +ffffffff83368060 D ulpt_cd +ffffffff83368080 D ulptusein +ffffffff83369000 D umass_cd +ffffffff83369020 d umass_bbb_transfer.dCBWtag +ffffffff8336a000 D uthum_cd +ffffffff8336b000 D ugold_cd +ffffffff8336b020 d cmd_init +ffffffff8336b028 d cmd_type +ffffffff8336b030 d cmd_data +ffffffff8336c000 D utrh_cd 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umb_uuid_qmi_mbim +ffffffff833a5040 D umb_cd +ffffffff833a5060 D umb_delay +ffffffff833a5070 D umb_qmi_alloc_cid +ffffffff833a5080 D umb_qmi_fcc_auth +ffffffff833a6000 D uath_cd +ffffffff833a7000 D uow_cd +ffffffff833a8000 D uberry_cd +ffffffff833a9000 D upd_cd +ffffffff833a9020 d upd_usage_roots +ffffffff833a90a0 d upd_usage_batdep +ffffffff833aa000 D uwacom_cd +ffffffff833aa020 d uwacom_attach.wacom_report_buf +ffffffff833ab000 D bwfm_usb_bus_ops +ffffffff833ac000 D umstc_cd +ffffffff833ad000 D uhidpp_cd +ffffffff833ae000 D ucc_cd +ffffffff833af000 D iic_cd +ffffffff833b0000 D probe_addrs_sensor +ffffffff833b0008 D probe_addrs_eeprom +ffffffff833b1000 D lmtemp_cd +ffffffff833b2000 D lmn_worklist +ffffffff833b2240 D lmn_cd +ffffffff833b3000 D lmenv_cd +ffffffff833b4000 D maxtmp_cd +ffffffff833b5000 D adc_cd +ffffffff833b6000 D admtemp_cd +ffffffff833b7000 D admlc_cd +ffffffff833b8000 D admtm_cd +ffffffff833b9000 D admtmp_cd +ffffffff833ba000 D admtt_cd +ffffffff833bb000 D maxds_cd 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acpidmar_cd +ffffffff833dc030 D vtd_faults +ffffffff833dd000 D acpidock_cd +ffffffff833de000 D abl_cd +ffffffff833de020 D abl_hids +ffffffff833df000 D asmc_cd +ffffffff833df020 D asmc_hids +ffffffff833e0000 D acpiasus_cd +ffffffff833e0020 D acpiasus_hids +ffffffff833e1000 D acpithinkpad_cd +ffffffff833e1020 D acpithinkpad_hids +ffffffff833e2000 D acpitoshiba_cd +ffffffff833e2020 D acpitoshiba_hids +ffffffff833e3000 D acpisony_cd +ffffffff833e4000 D acpivideo_cd +ffffffff833e5000 D acpivout_cd +ffffffff833e6000 D acpipwrres_cd +ffffffff833e7000 D aibs_cd +ffffffff833e7020 d aibs_hids +ffffffff833e8000 D aplgpio_cd +ffffffff833e8020 D aplgpio_hids +ffffffff833e9000 D bytgpio_cd +ffffffff833e9020 D bytgpio_hids +ffffffff833ea000 D chvgpio_cd +ffffffff833ea020 D chvgpio_hids +ffffffff833eb000 D glkgpio_cd +ffffffff833eb020 D glkgpio_hids +ffffffff833ec000 D pchgpio_cd +ffffffff833ec020 D pchgpio_hids +ffffffff833ec070 D pchgpio_devices +ffffffff833ed000 D tipmic_cd +ffffffff833ed020 D tipmic_thermal_regmap +ffffffff833ed030 D tipmic_power_regmap +ffffffff833ee000 D ccpmic_cd +ffffffff833ee020 D ccpmic_thermal_regmap +ffffffff833ee023 D ccpmic_power_regmap +ffffffff833ef000 D com_hids +ffffffff833f0000 D sdhc_hids +ffffffff833f1000 D dwiic_hids +ffffffff833f1050 D ihidev_hids +ffffffff833f1070 D ietp_hids +ffffffff833f1220 D iatp_hids +ffffffff833f1240 d dwiic_acpi_found_ihidev.i2c_hid_guid +ffffffff833f2000 D acpicbkbd_cd +ffffffff833f2020 D acpicbkbd_hids +ffffffff833f3000 D acpials_cd +ffffffff833f3020 D acpials_hids +ffffffff833f4000 D tpm_cd +ffffffff833f4020 D tpm_hids +ffffffff833f5000 D acpihve_cd +ffffffff833f6000 D acpisbs_cd +ffffffff833f6020 D acpisbs_hids +ffffffff833f7000 D acpisurface_cd +ffffffff833f7020 D acpisurface_hids +ffffffff833f8000 D ipmi_acpi_hids +ffffffff833f9000 D amdgpio_cd +ffffffff833f9020 D amdgpio_hids +ffffffff833fa000 D acpihid_cd +ffffffff833fa020 D acpihid_hids +ffffffff833fa030 d acpihid_guid +ffffffff833fb000 d iosf_hids +ffffffff833fc000 D acpipci_cd +ffffffff833fc020 D acpipci_hids +ffffffff833fc040 d acpipci_osc.uuid +ffffffff833fd000 D efi_cd +ffffffff833fe000 D vmm_cd +ffffffff833ff000 D vmm_hv_signature +ffffffff83400000 D sdmmc_cd +ffffffff83401000 D bwfm_sdio_bus_ops +ffffffff83401028 D bwfm_sdio_buscore_ops +ffffffff83402000 D onewire_cd +ffffffff83403000 D owid_cd +ffffffff83404000 D owsbm_cd +ffffffff83405000 D owtemp_cd +ffffffff83406000 D owctr_cd +ffffffff83407000 D hz +ffffffff83407004 D tick +ffffffff83407008 D tick_nsec +ffffffff8340700c D initialvnodes +ffffffff83407010 D maxprocess +ffffffff83407014 D maxthread +ffffffff83407018 D maxfiles +ffffffff83407020 D nmbclust +ffffffff83407028 D bufcachepercent +ffffffff8340702c D fscale +ffffffff83407030 D shminfo +ffffffff83407044 D seminfo +ffffffff83408000 D extraloc +ffffffff83408100 D rextraloc +ffffffff83408110 D locnames +ffffffff834081f0 D locnamp +ffffffff8340840c D pv_size +ffffffff83408410 D pv +ffffffff83408630 d loc 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ip_directedbcast +ffffffff834fc014 B ip_frags +ffffffff834fc018 B ipcounters +ffffffff834fc020 B ipqent_pool +ffffffff834fc1c8 B ipq_pool +ffffffff834fc370 B ipq +ffffffff834fc378 b ipsend_mq +ffffffff834fc3a8 b ipsendraw_mq +ffffffff834fd000 B ip_mrouter +ffffffff834fd800 b mrt_api_config +ffffffff834fd810 B mrt_count +ffffffff834fe010 B ip_mrouterq +ffffffff834fe048 b ip_mforward.srctun +ffffffff834fe050 B mrtstat +ffffffff834ff000 B rawcbtable +ffffffff83500000 B tcp_debug +ffffffff83516a80 B tcp_debx +ffffffff83517000 B tcp_rst_ppslim_count +ffffffff83517004 B tcp_ackdrop_ppslim_count +ffffffff83517008 B tcp_saveti6 +ffffffff83517044 B tcp_saveti +ffffffff83517070 B tcp_ackdrop_ppslim_last +ffffffff83517080 B tcp_rst_ppslim_last +ffffffff83517090 B syn_cache_pool +ffffffff83517240 B tcp_syn_cache +ffffffff83517290 B tcp_syn_cache_active +ffffffff83518000 B tcp_ack_on_push +ffffffff83518004 B tcp_do_ecn +ffffffff83518008 B tcp_iss +ffffffff83518010 B tcp_starttime +ffffffff83518018 B tcpcb_pool +ffffffff835181c0 B tcpqe_pool +ffffffff83518368 B sackhl_pool +ffffffff83518510 B tcpcounters +ffffffff83518520 B tcp_secret +ffffffff83518530 B tcp_secret_ctx +ffffffff83519000 B tcp_keepidle +ffffffff83519004 B tcp_keepintvl +ffffffff83519008 B tcp_maxpersistidle +ffffffff8351900c B tcp_delack_msecs +ffffffff83519010 B tcp_maxidle +ffffffff83519014 B tcp_always_keepalive +ffffffff8351a000 B tcbtable +ffffffff8351b000 B udpcounters +ffffffff8351b008 B udbtable +ffffffff8351c000 B ipsec_in_use +ffffffff8351c008 B ipsec_last_added +ffffffff8351c010 B ipsp_ids_gc_list +ffffffff8351c018 B tdb_pool +ffffffff8351c1c0 b tdbkey +ffffffff8351c1d0 b tdbh +ffffffff8351c1d8 b tdbdst +ffffffff8351c1e0 b tdbsrc +ffffffff8351c1e8 b tdb_count +ffffffff8351c1f0 B ipsec_ids_tree +ffffffff8351c1f8 B ipsec_ids_flows +ffffffff8351d000 B spd_tables +ffffffff8351d008 B spd_table_max +ffffffff8351d010 B ipsec_policy_pool +ffffffff8351d1b8 B ipsec_acquire_pool +ffffffff8351e000 B ipip_allow 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krpc_call.xid +ffffffff83526000 B nfs_bufqlen +ffffffff83526004 B nfs_bufqmax +ffffffff83526008 B nfs_bufq +ffffffff83527000 B nfsbootdevname +ffffffff83528000 B nfs_node_pool +ffffffff83529000 B kevlist +ffffffff83529008 B pnfskq +ffffffff8352a000 B nfs_realign_test +ffffffff8352a004 B nfs_realign_count +ffffffff8352b000 B nfsrvhash +ffffffff8352b008 B nfsrvhashtbl +ffffffff8352b010 B nfsrvhashkey +ffffffff8352b020 B nfsrvlruhead +ffffffff8352b030 B numnfsrvcache +ffffffff8352c000 b nfs_get_xid.nfs_xid_ctx +ffffffff8352c038 b nfs_get_xid.called +ffffffff8352c03c B rpc_call +ffffffff8352c040 B rpc_vers +ffffffff8352c044 B nfs_prog +ffffffff8352c048 B rpc_reply +ffffffff8352c04c B rpc_msgdenied +ffffffff8352c050 B rpc_msgaccepted +ffffffff8352c054 B rpc_mismatch +ffffffff8352c058 B rpc_autherr +ffffffff8352c05c B rpc_auth_unix +ffffffff8352c060 B nfs_true +ffffffff8352c064 B nfs_false +ffffffff8352c068 B nfs_xdrneg1 +ffffffff8352c06c B nfs_ticks +ffffffff8352c070 B nfsreqpl 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proc_waiting +ffffffff83532034 B req_clear_remove +ffffffff83532038 B softdep_worklist_req +ffffffff83532040 B softdep_hashkey +ffffffff83532050 B pagedep_hashtbl +ffffffff83532058 B pagedep_hash +ffffffff83532060 B pagedep_in_progress +ffffffff83532078 B pagedep_pool +ffffffff83532220 B inodedep_hashtbl +ffffffff83532228 B inodedep_hash +ffffffff83532230 B num_inodedep +ffffffff83532238 B max_softdeps +ffffffff83532240 B inodedep_in_progress +ffffffff83532258 B inodedep_pool +ffffffff83532400 B newblk_hashtbl +ffffffff83532408 B newblk_hash +ffffffff83532410 B newblk_in_progress +ffffffff83532428 B newblk_pool +ffffffff835325d0 B mkdirlisthd +ffffffff835325d8 B proc_waiting_timeout +ffffffff83532620 B bmsafemap_pool +ffffffff835327c8 B allocdirect_pool +ffffffff83532970 B indirdep_pool +ffffffff83532b18 B allocindir_pool +ffffffff83532cc0 B freefrag_pool +ffffffff83532e68 B freeblks_pool +ffffffff83533010 B freefile_pool +ffffffff835331b8 B diradd_pool +ffffffff83533360 B mkdir_pool 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uao_list +ffffffff83540000 B udv_list +ffffffff83540008 B udv_lock +ffffffff83541000 b uvmadvice +ffffffff83542000 b uvm_pause.toggle +ffffffff83543000 B uvmexp +ffffffff83543158 B uvm +ffffffff83544000 B kernel_map +ffffffff83544008 b kernel_map_store +ffffffff83545000 B uvm_maxkaddr +ffffffff83545008 b uvm_kmapent_mtx +ffffffff83545018 b uvm_kmapent_last_warn_time +ffffffff83545028 B uvm_map_entry_kmem_pool +ffffffff835451d0 B uvm_map_entry_pool +ffffffff83545380 b uvm_map_init.kernel_map_entry +ffffffff8356f380 B uvm_vmspace_pool +ffffffff83570000 B malloc_conf +ffffffff83571000 B uvm_wxabort +ffffffff83572000 B vm_nphysseg +ffffffff83572010 B vm_physmem +ffffffff83572310 b virtual_space_start +ffffffff83572318 b virtual_space_end +ffffffff83573000 B psegs +ffffffff83573100 B uvm_pseg_lck +ffffffff83574000 B uvm_nowait_failed +ffffffff83575000 B oom +ffffffff83575008 B swap_priority +ffffffff83575010 B swapmap +ffffffff83575018 B vndxfer_pool +ffffffff835751c0 B vndbuf_pool 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icmp6_mtudisc_callbacks +ffffffff8357e008 B icmp6_mtudisc_timeout_q +ffffffff8357e040 B icmp6_redirect_timeout_q +ffffffff8357e078 B icmp6counters +ffffffff8357e080 b icmp6_redirect_diag.buf +ffffffff8357e480 b icmp6errppslim_last +ffffffff8357e490 b icmp6errpps_count +ffffffff8357f000 b ip6send_mq +ffffffff8357f030 B ip6counters +ffffffff8357f040 B ip6_soiikey +ffffffff83580000 B ip6_mrouter_ver +ffffffff83580010 B ip6_mrouter +ffffffff83580810 B ip6_mrouterq +ffffffff83580848 B mrt6stat +ffffffff835808b0 B ip6_mrtproto +ffffffff83581000 B ip6_id_ctx +ffffffff83582000 b mld6_init.hbh_buf +ffffffff83582008 B mld6_timers_are_running +ffffffff83582010 b ip6_opts +ffffffff83583000 B nd6_maxnudhint +ffffffff83583004 B nd6_debug +ffffffff83583008 B nd6_pool +ffffffff835831b0 B nd6_expire_task +ffffffff835831e0 B nd6_timer_to +ffffffff83583228 B nd6_slowtimo_ch +ffffffff83583270 B nd6_expire_timeout +ffffffff835832b8 B ln_hold_total +ffffffff835832bc B nd6_inuse +ffffffff83584000 B rawin6pcbtable +ffffffff83584078 B rip6counters +ffffffff83585000 B pkptable +ffffffff83585038 B pkpcb_pool +ffffffff835851e0 b nregistered +ffffffff835851e4 b npromisc +ffffffff83586000 B setperf_prio +ffffffff83586004 B cpureset_delay +ffffffff83586008 B ssym +ffffffff83586010 B esym +ffffffff83586018 B bootdev +ffffffff8358601c B biosbasemem +ffffffff83586020 B bootapiver +ffffffff83586024 B safepri +ffffffff83586028 B exec_map +ffffffff83586030 B phys_map +ffffffff83586038 B allowaperture +ffffffff83586040 B msgbuf_paddr +ffffffff83586048 B msgbuf_vaddr +ffffffff83586050 B physmem +ffffffff83586058 B idt_vaddr +ffffffff83586060 B idt_paddr +ffffffff83586068 B bios_diskinfo +ffffffff83586070 B bios_cksumlen +ffffffff83586074 B kbd_reset +ffffffff83586078 B forceukbd +ffffffff8358607c B dumpsize +ffffffff83586080 B dumplo +ffffffff83586088 B mem_cluster_cnt +ffffffff83586090 B mem_clusters +ffffffff83586190 B dumpmem_vaddr +ffffffff83586198 B dumppcb +ffffffff83586520 B dumpmem_sz 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amd64_has_aesni +ffffffff83589000 B tsc_is_invariant +ffffffff83589008 B tsc_frequency +ffffffff83589010 B tsc_recalibrate +ffffffff83589040 B tsc_bp_status +ffffffff835890c0 B tsc_test_cycles +ffffffff835890c8 B tsc_test_rounds +ffffffff835890cc B tsc_ingress_barrier +ffffffff835890d0 B tsc_egress_barrier +ffffffff83589100 B tsc_ap_status +ffffffff83589180 B tsc_ap_name +ffffffff8358a000 b vc3_sc +ffffffff8358a010 b viac3_rnd.buffer +ffffffff8358a058 B viac3_rnd_tmo +ffffffff8358a0a0 B viac3_rnd_present +ffffffff8358b000 B aesni_sc +ffffffff8358b008 B aesnipl +ffffffff8358b1b0 B aesni_ops +ffffffff8358c000 b amd64_errata.printed +ffffffff8358d000 B cpu_ucode_size +ffffffff8358d008 B cpu_ucode_data +ffffffff8358d010 B cpu_ucode_intel_applied +ffffffff8358e000 b ap_open_count +ffffffff8358e008 B zeropage +ffffffff8358e010 B mem_range_softc +ffffffff8358f000 B mtrrdef +ffffffff8358f008 B mtrrcap +ffffffff83590000 B nkptp +ffffffff83590020 B pg_nx +ffffffff83590028 B pg_g_kern +ffffffff83590030 B pmap_initialized +ffffffff83590038 B kernel_pmap_store +ffffffff83590110 B cr3_reuse_pcid +ffffffff83590118 b cr3_pcid_temp +ffffffff83590120 B virtual_avail +ffffffff83590128 B pg_xo +ffffffff83590130 B protection_codes +ffffffff83590170 B pmap_use_pcid +ffffffff83590174 b cr3_pcid_proc +ffffffff83590178 B cr3_pcid_proc_intel +ffffffff83590180 B pmaps +ffffffff83590188 B pmap_pmap_pool +ffffffff83590330 B pmap_pv_pool +ffffffff835904d8 B pmap_pdp_pool +ffffffff83591000 B fpu_mxcsr_mask +ffffffff83591008 B xsave_mask +ffffffff83592000 B x86_soft_intrs +ffffffff83593000 B i8259_imen +ffffffff83594000 B intr_shared_edge +ffffffff83594008 B fake_softclock_intrhand +ffffffff83594078 B fake_softnet_intrhand +ffffffff835940e8 B fake_softtty_intrhand +ffffffff83594158 B fake_timer_intrhand +ffffffff835941c8 B fake_ipi_intrhand +ffffffff83594238 B fake_xen_intrhand +ffffffff835942a8 B fake_hyperv_intrhand +ffffffff83595000 B atdevbase +ffffffff83595010 b ioport_ex_storage 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