--- 7.3/2023-08-01T06:17:05Z/2023-07-20T00:00:00Z/nm-bsd-ot14.txt	Thu Aug  3 15:35:37 2023
+++ 7.3/2023-08-01T06:17:05Z/2023-07-21T00:00:00Z/nm-bsd-ot14.txt	Thu Aug  3 18:25:13 2023
@@ -18504,18 +18504,18 @@ ffffffff819386c0 T drm_bridge_chain_pre_enable
 ffffffff81938750 T drm_bridge_chain_enable
 ffffffff819387d0 T drm_atomic_bridge_chain_disable
 ffffffff819388d0 T drm_atomic_bridge_chain_post_disable
-ffffffff819389e0 T drm_atomic_bridge_chain_pre_enable
-ffffffff81938ae0 T drm_atomic_bridge_chain_enable
-ffffffff81938bf0 T drm_atomic_bridge_chain_check
-ffffffff81938f50 T drm_bridge_detect
-ffffffff81938fb0 T drm_bridge_get_modes
-ffffffff81939010 T drm_bridge_get_edid
-ffffffff81939070 T drm_bridge_hpd_enable
-ffffffff81939140 T drm_bridge_hpd_disable
-ffffffff819391e0 T drm_bridge_hpd_notify
-ffffffff81939240 t drm_bridge_atomic_duplicate_priv_state
-ffffffff81939260 t drm_bridge_atomic_destroy_priv_state
-ffffffff81939280 t select_bus_fmt_recursive
+ffffffff81938b00 T drm_atomic_bridge_chain_pre_enable
+ffffffff81938d40 T drm_atomic_bridge_chain_enable
+ffffffff81938e50 T drm_atomic_bridge_chain_check
+ffffffff819391b0 T drm_bridge_detect
+ffffffff81939210 T drm_bridge_get_modes
+ffffffff81939270 T drm_bridge_get_edid
+ffffffff819392d0 T drm_bridge_hpd_enable
+ffffffff819393a0 T drm_bridge_hpd_disable
+ffffffff81939440 T drm_bridge_hpd_notify
+ffffffff819394a0 t drm_bridge_atomic_duplicate_priv_state
+ffffffff819394c0 t drm_bridge_atomic_destroy_priv_state
+ffffffff819394e0 t select_bus_fmt_recursive
 ffffffff8193a000 T drm_buddy_init
 ffffffff8193a470 T drm_buddy_fini
 ffffffff8193a570 T drm_get_buddy
@@ -20513,15 +20513,15 @@ ffffffff81a14150 t lpt_digital_port_connected
 ffffffff81a141c0 t bdw_digital_port_connected
 ffffffff81a14230 t hsw_digital_port_connected
 ffffffff81a142a0 t intel_ddi_encoder_reset
-ffffffff81a142e0 t intel_ddi_encoder_destroy
-ffffffff81a14390 t icl_program_mg_dp_mode
-ffffffff81a14620 t intel_ddi_init_dp_buf_reg
-ffffffff81a147e0 t intel_disable_ddi_buf
-ffffffff81a14b00 t intel_ddi_prepare_link_retrain
-ffffffff81a15170 t intel_ddi_set_link_train
-ffffffff81a152d0 t intel_ddi_set_idle_link_train
-ffffffff81a154f0 t intel_ddi_dp_voltage_max
-ffffffff81a155b0 t intel_ddi_dp_preemph_max
+ffffffff81a14380 t intel_ddi_encoder_destroy
+ffffffff81a14430 t icl_program_mg_dp_mode
+ffffffff81a146c0 t intel_ddi_init_dp_buf_reg
+ffffffff81a14880 t intel_disable_ddi_buf
+ffffffff81a14ba0 t intel_ddi_prepare_link_retrain
+ffffffff81a15210 t intel_ddi_set_link_train
+ffffffff81a15370 t intel_ddi_set_idle_link_train
+ffffffff81a15590 t intel_ddi_dp_voltage_max
+ffffffff81a15650 t intel_ddi_dp_preemph_max
 ffffffff81a16000 T is_hobl_buf_trans
 ffffffff81a16040 T intel_ddi_buf_trans_init
 ffffffff81a16300 t dg2_get_snps_buf_trans
@@ -21575,33 +21575,33 @@ ffffffff81aa6370 t __delayed_work_tick
 ffffffff81aa7000 T intel_psr_irq_handler
 ffffffff81aa7680 T intel_psr_init_dpcd
 ffffffff81aa7910 T intel_psr_compute_config
-ffffffff81aa81c0 T intel_psr_get_config
-ffffffff81aa8370 T intel_psr_disable
-ffffffff81aa8480 t intel_psr_disable_locked
-ffffffff81aa88f0 T intel_psr_pause
-ffffffff81aa8ae0 t intel_psr_exit
-ffffffff81aa8dc0 T intel_psr_resume
-ffffffff81aa8e50 t intel_psr_activate
-ffffffff81aa95f0 T intel_psr2_disable_plane_sel_fetch
-ffffffff81aa9660 T intel_psr2_program_plane_sel_fetch
-ffffffff81aa9810 T intel_psr2_program_trans_man_trk_ctl
-ffffffff81aa9960 T intel_psr2_sel_fetch_update
-ffffffff81aa9ff0 T intel_psr_pre_plane_update
-ffffffff81aaa1c0 T intel_psr_post_plane_update
-ffffffff81aaac50 T intel_psr_wait_for_idle_locked
-ffffffff81aaae30 T intel_psr_debug_set
-ffffffff81aab060 t psr_irq_control
-ffffffff81aab1b0 T intel_psr_invalidate
-ffffffff81aab470 T intel_psr_flush
-ffffffff81aab940 T intel_psr_init
-ffffffff81aaba70 t intel_psr_work
-ffffffff81aabc20 t tgl_dc3co_disable_work
-ffffffff81aabc70 T intel_psr_short_pulse
-ffffffff81aac030 T intel_psr_enabled
-ffffffff81aac0b0 T intel_psr_lock
-ffffffff81aac1a0 T intel_psr_unlock
-ffffffff81aac290 t tgl_psr2_disable_dc3co
-ffffffff81aac3c0 t __delayed_work_tick
+ffffffff81aa81b0 T intel_psr_get_config
+ffffffff81aa8360 T intel_psr_disable
+ffffffff81aa8470 t intel_psr_disable_locked
+ffffffff81aa88e0 T intel_psr_pause
+ffffffff81aa8ad0 t intel_psr_exit
+ffffffff81aa8db0 T intel_psr_resume
+ffffffff81aa8e40 t intel_psr_activate
+ffffffff81aa95e0 T intel_psr2_disable_plane_sel_fetch
+ffffffff81aa9650 T intel_psr2_program_plane_sel_fetch
+ffffffff81aa9800 T intel_psr2_program_trans_man_trk_ctl
+ffffffff81aa9950 T intel_psr2_sel_fetch_update
+ffffffff81aa9fe0 T intel_psr_pre_plane_update
+ffffffff81aaa1b0 T intel_psr_post_plane_update
+ffffffff81aaac40 T intel_psr_wait_for_idle_locked
+ffffffff81aaae20 T intel_psr_debug_set
+ffffffff81aab050 t psr_irq_control
+ffffffff81aab1a0 T intel_psr_invalidate
+ffffffff81aab460 T intel_psr_flush
+ffffffff81aab930 T intel_psr_init
+ffffffff81aaba60 t intel_psr_work
+ffffffff81aabc10 t tgl_dc3co_disable_work
+ffffffff81aabc60 T intel_psr_short_pulse
+ffffffff81aac020 T intel_psr_enabled
+ffffffff81aac0a0 T intel_psr_lock
+ffffffff81aac190 T intel_psr_unlock
+ffffffff81aac280 t tgl_psr2_disable_dc3co
+ffffffff81aac3b0 t __delayed_work_tick
 ffffffff81aad000 T intel_lookup_range_min_qp
 ffffffff81aad0b0 T intel_lookup_range_max_qp
 ffffffff81aae000 T intel_init_quirks
@@ -21696,22 +21696,23 @@ ffffffff81aba1a0 T intel_tc_port_get_lane_mask
 ffffffff81aba300 T intel_tc_port_get_pin_assignment_mask
 ffffffff81aba460 T intel_tc_port_fia_max_lane_count
 ffffffff81aba5a0 T intel_tc_port_set_fia_lane_count
-ffffffff81aba7b0 T intel_tc_port_sanitize
-ffffffff81abae40 T intel_tc_port_connected
-ffffffff81abaf30 T intel_tc_port_lock
-ffffffff81abaf50 t tc_port_live_status_mask
-ffffffff81abb220 T intel_tc_port_unlock
-ffffffff81abb2a0 t __intel_tc_port_lock
-ffffffff81abb4a0 T intel_tc_port_flush_work
-ffffffff81abb4c0 T intel_tc_port_ref_held
-ffffffff81abb510 T intel_tc_port_get_link
-ffffffff81abb590 T intel_tc_port_put_link
-ffffffff81abb620 T intel_tc_port_init
-ffffffff81abb8c0 t intel_tc_port_disconnect_phy_work
-ffffffff81abb910 t tc_phy_status_complete
-ffffffff81abba20 t tc_phy_take_ownership
-ffffffff81abbbc0 t intel_tc_port_update_mode
-ffffffff81abc0e0 t __delayed_work_tick
+ffffffff81aba7b0 T intel_tc_port_init_mode
+ffffffff81abac30 t intel_tc_port_update_mode
+ffffffff81abb150 T intel_tc_port_sanitize_mode
+ffffffff81abb500 T intel_tc_port_connected
+ffffffff81abb5f0 T intel_tc_port_lock
+ffffffff81abb610 t tc_port_live_status_mask
+ffffffff81abb8e0 T intel_tc_port_unlock
+ffffffff81abb960 t __intel_tc_port_lock
+ffffffff81abbb60 T intel_tc_port_flush_work
+ffffffff81abbb80 T intel_tc_port_ref_held
+ffffffff81abbbd0 T intel_tc_port_get_link
+ffffffff81abbc50 T intel_tc_port_put_link
+ffffffff81abbce0 T intel_tc_port_init
+ffffffff81abbf60 t intel_tc_port_disconnect_phy_work
+ffffffff81abbfb0 t tc_phy_status_complete
+ffffffff81abc0c0 t tc_phy_take_ownership
+ffffffff81abc260 t __delayed_work_tick
 ffffffff81abd000 T intel_tv_init
 ffffffff81abd420 t intel_tv_compute_config
 ffffffff81abd8c0 t intel_tv_get_config
@@ -23895,17 +23896,17 @@ ffffffff81c06a90 T ci_dpm_set_power_state
 ffffffff81c07c10 T ci_dpm_display_configuration_changed
 ffffffff81c07db0 T ci_dpm_fini
 ffffffff81c07e60 T ci_dpm_init
-ffffffff81c09530 T ci_dpm_debugfs_print_current_performance_level
-ffffffff81c09670 T ci_dpm_print_power_state
-ffffffff81c09730 T ci_dpm_get_current_sclk
-ffffffff81c09800 T ci_dpm_get_current_mclk
-ffffffff81c098d0 T ci_dpm_get_sclk
-ffffffff81c09920 T ci_dpm_get_mclk
-ffffffff81c09970 t ci_populate_all_graphic_levels
-ffffffff81c09ef0 t ci_populate_all_memory_levels
-ffffffff81c0a800 t ci_do_program_memory_timing_parameters
-ffffffff81c0aa20 t ci_populate_smc_voltage_table
-ffffffff81c0ab80 t ci_enable_sclk_mclk_dpm
+ffffffff81c095d0 T ci_dpm_debugfs_print_current_performance_level
+ffffffff81c09710 T ci_dpm_print_power_state
+ffffffff81c097d0 T ci_dpm_get_current_sclk
+ffffffff81c098a0 T ci_dpm_get_current_mclk
+ffffffff81c09970 T ci_dpm_get_sclk
+ffffffff81c099c0 T ci_dpm_get_mclk
+ffffffff81c09a10 t ci_populate_all_graphic_levels
+ffffffff81c09f90 t ci_populate_all_memory_levels
+ffffffff81c0a8a0 t ci_do_program_memory_timing_parameters
+ffffffff81c0aac0 t ci_populate_smc_voltage_table
+ffffffff81c0ac20 t ci_enable_sclk_mclk_dpm
 ffffffff81c0b000 T ci_copy_bytes_to_smc
 ffffffff81c0b250 T ci_start_smc
 ffffffff81c0b290 T ci_reset_smc
@@ -24015,32 +24016,32 @@ ffffffff81c226c0 T cypress_get_mclk_frequency_ratio
 ffffffff81c22770 T cypress_map_clkf_to_ibias
 ffffffff81c22830 T cypress_convert_power_level_to_smc
 ffffffff81c22bf0 t cypress_populate_mclk_value
-ffffffff81c22fc0 T cypress_upload_sw_state
-ffffffff81c23140 T cypress_upload_mc_reg_table
-ffffffff81c23200 t cypress_convert_mc_reg_table_to_smc
-ffffffff81c234a0 T cypress_calculate_burst_time
-ffffffff81c23530 T cypress_program_memory_timing_parameters
-ffffffff81c236e0 T cypress_populate_smc_initial_state
-ffffffff81c23a80 T cypress_populate_smc_acpi_state
-ffffffff81c23e10 T cypress_construct_voltage_tables
-ffffffff81c23ec0 t cypress_trim_voltage_table_to_fit_state_table
-ffffffff81c240b0 T cypress_populate_smc_voltage_tables
-ffffffff81c24200 T cypress_get_mvdd_configuration
-ffffffff81c242c0 T cypress_populate_mc_reg_table
-ffffffff81c24520 T cypress_get_table_locations
-ffffffff81c24600 T cypress_enable_display_gap
-ffffffff81c24660 T cypress_dpm_setup_asic
-ffffffff81c24750 T cypress_dpm_enable
-ffffffff81c25230 t cypress_force_mc_use_s1
-ffffffff81c254b0 t cypress_gfx_clock_gating_enable
-ffffffff81c257c0 t cypress_mg_clock_gating_enable
-ffffffff81c25a40 T cypress_dpm_disable
-ffffffff81c25c70 T cypress_dpm_set_power_state
-ffffffff81c25f20 T cypress_dpm_display_configuration_changed
-ffffffff81c26000 T cypress_dpm_init
-ffffffff81c26270 T cypress_dpm_fini
-ffffffff81c26300 T cypress_dpm_vblank_too_short
-ffffffff81c26370 t cypress_wait_for_mc_sequencer
+ffffffff81c23000 T cypress_upload_sw_state
+ffffffff81c23180 T cypress_upload_mc_reg_table
+ffffffff81c23240 t cypress_convert_mc_reg_table_to_smc
+ffffffff81c234e0 T cypress_calculate_burst_time
+ffffffff81c23570 T cypress_program_memory_timing_parameters
+ffffffff81c23720 T cypress_populate_smc_initial_state
+ffffffff81c23ac0 T cypress_populate_smc_acpi_state
+ffffffff81c23e50 T cypress_construct_voltage_tables
+ffffffff81c23f00 t cypress_trim_voltage_table_to_fit_state_table
+ffffffff81c240f0 T cypress_populate_smc_voltage_tables
+ffffffff81c24240 T cypress_get_mvdd_configuration
+ffffffff81c24300 T cypress_populate_mc_reg_table
+ffffffff81c24560 T cypress_get_table_locations
+ffffffff81c24640 T cypress_enable_display_gap
+ffffffff81c246a0 T cypress_dpm_setup_asic
+ffffffff81c24790 T cypress_dpm_enable
+ffffffff81c25270 t cypress_force_mc_use_s1
+ffffffff81c254f0 t cypress_gfx_clock_gating_enable
+ffffffff81c25800 t cypress_mg_clock_gating_enable
+ffffffff81c25a80 T cypress_dpm_disable
+ffffffff81c25cb0 T cypress_dpm_set_power_state
+ffffffff81c25f60 T cypress_dpm_display_configuration_changed
+ffffffff81c26040 T cypress_dpm_init
+ffffffff81c262b0 T cypress_dpm_fini
+ffffffff81c26340 T cypress_dpm_vblank_too_short
+ffffffff81c263b0 t cypress_wait_for_mc_sequencer
 ffffffff81c27000 T dce3_2_afmt_hdmi_write_speaker_allocation
 ffffffff81c27070 T dce3_2_afmt_dp_write_speaker_allocation
 ffffffff81c270e0 T dce3_2_afmt_write_sad_regs
@@ -25311,10 +25312,10 @@ ffffffff81cf2000 T rv740_get_decoded_reference_divider
 ffffffff81cf20a0 T rv740_get_dll_speed
 ffffffff81cf21d0 T rv740_populate_sclk_value
 ffffffff81cf23e0 T rv740_populate_mclk_value
-ffffffff81cf2820 T rv740_read_clock_registers
-ffffffff81cf2950 T rv740_populate_smc_acpi_state
-ffffffff81cf2b80 T rv740_enable_mclk_spread_spectrum
-ffffffff81cf2be0 T rv740_get_mclk_frequency_ratio
+ffffffff81cf2840 T rv740_read_clock_registers
+ffffffff81cf2970 T rv740_populate_smc_acpi_state
+ffffffff81cf2ba0 T rv740_enable_mclk_spread_spectrum
+ffffffff81cf2c00 T rv740_get_mclk_frequency_ratio
 ffffffff81cf3000 T rv770_set_uvd_clocks
 ffffffff81cf3570 T rv770_get_xclk
 ffffffff81cf35d0 T rv770_page_flip
@@ -25845,14 +25846,14 @@ ffffffff81d4c070 t amdgpu_connector_lvds_get_modes
 ffffffff81d4c1e0 t amdgpu_connector_lvds_mode_valid
 ffffffff81d4d000 T amdgpu_cs_report_moved_bytes
 ffffffff81d4d070 T amdgpu_cs_ioctl
-ffffffff81d4ee40 t amdgpu_cs_parser_fini
-ffffffff81d4efd0 T amdgpu_cs_wait_ioctl
-ffffffff81d4f110 T amdgpu_cs_fence_to_handle_ioctl
-ffffffff81d4f2b0 t amdgpu_cs_get_fence
-ffffffff81d4f360 T amdgpu_cs_wait_fences_ioctl
-ffffffff81d4f650 T amdgpu_cs_find_mapping
-ffffffff81d4f750 t amdgpu_cs_bo_validate
-ffffffff81d4fa60 t amdgpu_cs_list_validate
+ffffffff81d4ee50 t amdgpu_cs_parser_fini
+ffffffff81d4efe0 T amdgpu_cs_wait_ioctl
+ffffffff81d4f120 T amdgpu_cs_fence_to_handle_ioctl
+ffffffff81d4f2c0 t amdgpu_cs_get_fence
+ffffffff81d4f370 T amdgpu_cs_wait_fences_ioctl
+ffffffff81d4f660 T amdgpu_cs_find_mapping
+ffffffff81d4f760 t amdgpu_cs_bo_validate
+ffffffff81d4fa70 t amdgpu_cs_list_validate
 ffffffff81d50000 T amdgpu_csa_vaddr
 ffffffff81d50060 T amdgpu_allocate_static_csa
 ffffffff81d50100 T amdgpu_free_static_csa
@@ -26686,30 +26687,30 @@ ffffffff81db7d60 T amdgpu_vm_clear_freed
 ffffffff81db7ee0 T amdgpu_vm_handle_moved
 ffffffff81db8100 T amdgpu_vm_bo_add
 ffffffff81db81d0 T amdgpu_vm_bo_map
-ffffffff81db8520 T amdgpu_vm_bo_replace_map
-ffffffff81db8800 T amdgpu_vm_bo_clear_mappings
-ffffffff81db8d30 T amdgpu_vm_bo_unmap
-ffffffff81db8e60 T amdgpu_vm_bo_lookup_mapping
-ffffffff81db8ed0 T amdgpu_vm_bo_trace_cs
-ffffffff81db8f00 T amdgpu_vm_bo_del
-ffffffff81db90f0 T amdgpu_vm_evictable
-ffffffff81db91a0 T amdgpu_vm_bo_invalidate
-ffffffff81db9460 T amdgpu_vm_adjust_size
-ffffffff81db96c0 T amdgpu_vm_wait_idle
-ffffffff81db9730 T amdgpu_vm_init
-ffffffff81db9af0 t amdgpu_bo_reserve
-ffffffff81db9c50 t amdgpu_bo_unreserve
-ffffffff81db9d30 T amdgpu_vm_make_compute
-ffffffff81db9f30 T amdgpu_vm_release_compute
-ffffffff81db9fe0 T amdgpu_vm_fini
-ffffffff81dba440 T amdgpu_vm_manager_init
-ffffffff81dba5e0 T amdgpu_vm_manager_fini
-ffffffff81dba640 T amdgpu_vm_ioctl
-ffffffff81dba770 T amdgpu_vm_get_task_info
-ffffffff81dba810 T amdgpu_vm_set_task_info
-ffffffff81dba8f0 T amdgpu_vm_handle_fault
-ffffffff81dbaac0 t amdgpu_vm_add_prt_cb
-ffffffff81dbac10 t amdgpu_vm_prt_cb
+ffffffff81db8510 T amdgpu_vm_bo_replace_map
+ffffffff81db8810 T amdgpu_vm_bo_clear_mappings
+ffffffff81db8d40 T amdgpu_vm_bo_unmap
+ffffffff81db8e70 T amdgpu_vm_bo_lookup_mapping
+ffffffff81db8ee0 T amdgpu_vm_bo_trace_cs
+ffffffff81db8f10 T amdgpu_vm_bo_del
+ffffffff81db9100 T amdgpu_vm_evictable
+ffffffff81db91b0 T amdgpu_vm_bo_invalidate
+ffffffff81db9470 T amdgpu_vm_adjust_size
+ffffffff81db96d0 T amdgpu_vm_wait_idle
+ffffffff81db9740 T amdgpu_vm_init
+ffffffff81db9b00 t amdgpu_bo_reserve
+ffffffff81db9c60 t amdgpu_bo_unreserve
+ffffffff81db9d40 T amdgpu_vm_make_compute
+ffffffff81db9f40 T amdgpu_vm_release_compute
+ffffffff81db9ff0 T amdgpu_vm_fini
+ffffffff81dba450 T amdgpu_vm_manager_init
+ffffffff81dba5f0 T amdgpu_vm_manager_fini
+ffffffff81dba650 T amdgpu_vm_ioctl
+ffffffff81dba780 T amdgpu_vm_get_task_info
+ffffffff81dba820 T amdgpu_vm_set_task_info
+ffffffff81dba900 T amdgpu_vm_handle_fault
+ffffffff81dbaad0 t amdgpu_vm_add_prt_cb
+ffffffff81dbac20 t amdgpu_vm_prt_cb
 ffffffff81dbb000 t amdgpu_vm_cpu_map_table
 ffffffff81dbb020 t amdgpu_vm_cpu_prepare
 ffffffff81dbb070 t amdgpu_vm_cpu_update
@@ -29023,34 +29024,34 @@ ffffffff81f2b850 t dm_handle_hpd_rx_offload_work
 ffffffff81f2b9a0 t amdgpu_dm_atomic_check
 ffffffff81f2cc90 t dm_update_plane_state
 ffffffff81f2d630 t dm_update_crtc_state
-ffffffff81f2e270 t dm_atomic_destroy_state
-ffffffff81f2e2b0 t fill_dc_plane_info_and_addr
-ffffffff81f2e5f0 t fill_hdr_info_packet
-ffffffff81f2e750 t get_highest_refresh_rate_mode
-ffffffff81f2e880 t update_stream_scaling_settings
-ffffffff81f2e9c0 t amdgpu_dm_atomic_commit_tail
-ffffffff81f30e60 t amdgpu_dm_backlight_set_level
-ffffffff81f31040 t dm_atomic_duplicate_state
-ffffffff81f310e0 t dm_dmub_outbox1_low_irq
-ffffffff81f31350 t dm_handle_hpd_work
-ffffffff81f313c0 t amdgpu_dm_encoder_destroy
-ffffffff81f313f0 t amdgpu_dm_i2c_xfer
-ffffffff81f31540 t amdgpu_dm_i2c_func
-ffffffff81f31570 t amdgpu_dm_connector_detect
-ffffffff81f31630 t amdgpu_dm_connector_late_register
-ffffffff81f31690 t amdgpu_dm_connector_unregister
-ffffffff81f316b0 t amdgpu_dm_connector_destroy
-ffffffff81f317d0 t get_modes
-ffffffff81f317e0 t amdgpu_dm_connector_atomic_check
-ffffffff81f318e0 t amdgpu_dm_connector_get_modes
-ffffffff81f31e50 t amdgpu_dm_backlight_update_status
-ffffffff81f31ed0 t amdgpu_dm_backlight_get_brightness
-ffffffff81f320c0 t dm_crtc_high_irq
-ffffffff81f32260 t dm_vupdate_high_irq
-ffffffff81f323e0 t dm_pflip_high_irq
-ffffffff81f325f0 t handle_hpd_irq
-ffffffff81f32600 t dm_gpureset_toggle_interrupts
-ffffffff81f32810 t s3_handle_mst
+ffffffff81f2e290 t dm_atomic_destroy_state
+ffffffff81f2e2d0 t fill_dc_plane_info_and_addr
+ffffffff81f2e610 t fill_hdr_info_packet
+ffffffff81f2e770 t get_highest_refresh_rate_mode
+ffffffff81f2e8a0 t update_stream_scaling_settings
+ffffffff81f2e9e0 t amdgpu_dm_atomic_commit_tail
+ffffffff81f30e70 t amdgpu_dm_backlight_set_level
+ffffffff81f31050 t dm_atomic_duplicate_state
+ffffffff81f310f0 t dm_dmub_outbox1_low_irq
+ffffffff81f31360 t dm_handle_hpd_work
+ffffffff81f313d0 t amdgpu_dm_encoder_destroy
+ffffffff81f31400 t amdgpu_dm_i2c_xfer
+ffffffff81f31550 t amdgpu_dm_i2c_func
+ffffffff81f31580 t amdgpu_dm_connector_detect
+ffffffff81f31640 t amdgpu_dm_connector_late_register
+ffffffff81f316a0 t amdgpu_dm_connector_unregister
+ffffffff81f316c0 t amdgpu_dm_connector_destroy
+ffffffff81f317e0 t get_modes
+ffffffff81f317f0 t amdgpu_dm_connector_atomic_check
+ffffffff81f318f0 t amdgpu_dm_connector_get_modes
+ffffffff81f31e70 t amdgpu_dm_backlight_update_status
+ffffffff81f31ef0 t amdgpu_dm_backlight_get_brightness
+ffffffff81f320e0 t dm_crtc_high_irq
+ffffffff81f32280 t dm_vupdate_high_irq
+ffffffff81f32400 t dm_pflip_high_irq
+ffffffff81f32610 t handle_hpd_irq
+ffffffff81f32620 t dm_gpureset_toggle_interrupts
+ffffffff81f32830 t s3_handle_mst
 ffffffff81f33000 T amdgpu_dm_init_color_mod
 ffffffff81f33010 T amdgpu_dm_verify_lut_sizes
 ffffffff81f330e0 T amdgpu_dm_update_crtc_color_mgmt
@@ -29684,50 +29685,50 @@ ffffffff81f87940 T dc_retain_state
 ffffffff81f87970 T dc_release_state
 ffffffff81f879e0 T dc_set_generic_gpio_for_stereo
 ffffffff81f87af0 T dc_check_update_surfaces_for_stream
-ffffffff81f88760 T dc_dmub_update_dirty_rect
-ffffffff81f889f0 T dc_update_planes_and_stream
-ffffffff81f89140 t commit_minimal_transition_state
-ffffffff81f894d0 t commit_planes_for_stream
-ffffffff81f8abc0 T dc_commit_updates_for_stream
-ffffffff81f8afb0 t copy_surface_update_to_plane
-ffffffff81f8b3b0 t copy_stream_update_to_stream
-ffffffff81f8b9e0 T dc_get_current_stream_count
-ffffffff81f8ba20 T dc_get_stream_at_index
-ffffffff81f8ba70 T dc_interrupt_to_irq_source
-ffffffff81f8ba90 T dc_interrupt_set
-ffffffff81f8bae0 T dc_interrupt_ack
-ffffffff81f8bb00 T dc_power_down_on_boot
-ffffffff81f8bb50 T dc_set_power_state
-ffffffff81f8bd50 T dc_resume
-ffffffff81f8bdc0 T dc_is_dmcu_initialized
-ffffffff81f8be10 T dc_is_oem_i2c_device_present
-ffffffff81f8be60 T dc_submit_i2c
-ffffffff81f8be90 T dc_submit_i2c_oem
-ffffffff81f8bee0 T dc_link_add_remote_sink
-ffffffff81f8c070 T dc_link_remove_remote_sink
-ffffffff81f8c160 T get_clock_requirements_for_state
-ffffffff81f8c1e0 T dc_set_clock
-ffffffff81f8c220 T dc_get_clock
-ffffffff81f8c260 T dc_set_psr_allow_active
-ffffffff81f8c360 T dc_allow_idle_optimizations
-ffffffff81f8c400 T dc_unlock_memory_clock_frequency
-ffffffff81f8c470 T dc_lock_memory_clock_frequency
-ffffffff81f8c500 T dc_enable_dcmode_clk_limit
-ffffffff81f8c610 t blank_and_force_memclk
-ffffffff81f8c7f0 T dc_is_plane_eligible_for_idle_optimizations
-ffffffff81f8c840 T dc_hardware_release
-ffffffff81f8c890 T dc_mclk_switch_using_fw_based_vblank_stretch_shut_down
-ffffffff81f8c8d0 T dc_is_dmub_outbox_supported
-ffffffff81f8c930 T dc_enable_dmub_notifications
-ffffffff81f8c990 T dc_enable_dmub_outbox
-ffffffff81f8c9d0 T dc_process_dmub_aux_transfer_async
-ffffffff81f8cb70 T get_link_index_from_dpia_port_index
-ffffffff81f8cc20 T dc_process_dmub_set_config_async
-ffffffff81f8cd10 T dc_process_dmub_set_mst_slots
-ffffffff81f8ce00 T dc_process_dmub_dpia_hpd_int_enable
-ffffffff81f8ced0 T dc_disable_accelerated_mode
-ffffffff81f8cef0 T dc_notify_vsync_int_state
-ffffffff81f8d120 T dc_extended_blank_supported
+ffffffff81f88730 T dc_dmub_update_dirty_rect
+ffffffff81f889c0 T dc_update_planes_and_stream
+ffffffff81f89110 t commit_minimal_transition_state
+ffffffff81f894a0 t commit_planes_for_stream
+ffffffff81f8ab90 T dc_commit_updates_for_stream
+ffffffff81f8af80 t copy_surface_update_to_plane
+ffffffff81f8b380 t copy_stream_update_to_stream
+ffffffff81f8b9b0 T dc_get_current_stream_count
+ffffffff81f8b9f0 T dc_get_stream_at_index
+ffffffff81f8ba40 T dc_interrupt_to_irq_source
+ffffffff81f8ba60 T dc_interrupt_set
+ffffffff81f8bab0 T dc_interrupt_ack
+ffffffff81f8bad0 T dc_power_down_on_boot
+ffffffff81f8bb20 T dc_set_power_state
+ffffffff81f8bd10 T dc_resume
+ffffffff81f8bd80 T dc_is_dmcu_initialized
+ffffffff81f8bdd0 T dc_is_oem_i2c_device_present
+ffffffff81f8be20 T dc_submit_i2c
+ffffffff81f8be50 T dc_submit_i2c_oem
+ffffffff81f8bea0 T dc_link_add_remote_sink
+ffffffff81f8c030 T dc_link_remove_remote_sink
+ffffffff81f8c120 T get_clock_requirements_for_state
+ffffffff81f8c1a0 T dc_set_clock
+ffffffff81f8c1e0 T dc_get_clock
+ffffffff81f8c220 T dc_set_psr_allow_active
+ffffffff81f8c320 T dc_allow_idle_optimizations
+ffffffff81f8c3c0 T dc_unlock_memory_clock_frequency
+ffffffff81f8c430 T dc_lock_memory_clock_frequency
+ffffffff81f8c4c0 T dc_enable_dcmode_clk_limit
+ffffffff81f8c5d0 t blank_and_force_memclk
+ffffffff81f8c7b0 T dc_is_plane_eligible_for_idle_optimizations
+ffffffff81f8c800 T dc_hardware_release
+ffffffff81f8c850 T dc_mclk_switch_using_fw_based_vblank_stretch_shut_down
+ffffffff81f8c890 T dc_is_dmub_outbox_supported
+ffffffff81f8c8f0 T dc_enable_dmub_notifications
+ffffffff81f8c950 T dc_enable_dmub_outbox
+ffffffff81f8c990 T dc_process_dmub_aux_transfer_async
+ffffffff81f8cb30 T get_link_index_from_dpia_port_index
+ffffffff81f8cbe0 T dc_process_dmub_set_config_async
+ffffffff81f8ccd0 T dc_process_dmub_set_mst_slots
+ffffffff81f8cdc0 T dc_process_dmub_dpia_hpd_int_enable
+ffffffff81f8ce90 T dc_disable_accelerated_mode
+ffffffff81f8ceb0 T dc_notify_vsync_int_state
+ffffffff81f8d0e0 T dc_extended_blank_supported
 ffffffff81f8e000 T pre_surface_trace
 ffffffff81f8e030 T update_surface_trace
 ffffffff81f8e060 T post_surface_trace
@@ -39257,13 +39258,13 @@ ffffffff825d0e6c r cmd680_setup_channel.udma_tbl
 ffffffff825d8b2c r apollo_udma33_tim
 ffffffff825dec2c r substchar
 ffffffff825e0d52 r apollo_udma100_tim
-ffffffff826086b0 r apollo_udma66_tim
-ffffffff8260fbce r apollo_pio_rec
-ffffffff8261f006 r cy_pio_rec
-ffffffff8264e711 r apollo_udma133_tim
-ffffffff8265b3d0 R drm_ca
-ffffffff8265b3f8 R drm_filtops
-ffffffff8265b428 R drmread_filtops
+ffffffff82608703 r apollo_udma66_tim
+ffffffff8260fc4e r apollo_pio_rec
+ffffffff8261f086 r cy_pio_rec
+ffffffff8264e7aa r apollo_udma133_tim
+ffffffff8265b468 R drm_ca
+ffffffff8265b490 R drm_filtops
+ffffffff8265b4c0 R drmread_filtops
 ffffffff8265c000 r vga_emulops
 ffffffff8265c048 R vga_stdscreen
 ffffffff8265c078 R vga_stdscreen_mono