--- 7.3/2023-06-01T06:17:21Z/2023-05-12T00:00:00Z/nm-bsd-ot14.txt	Fri Jun  2 09:13:54 2023
+++ 7.3/2023-06-01T06:17:21Z/2023-05-13T00:00:00Z/nm-bsd-ot14.txt	Fri Jun  2 11:20:24 2023
@@ -9233,18 +9233,18 @@ ffffffff81429610 T arprequest
 ffffffff81429750 T arpinvalidate
 ffffffff814297b0 T arpreply
 ffffffff81429890 T arpresolve
-ffffffff81429ee0 T arppullup
-ffffffff81429fa0 T arpinput
-ffffffff8142a000 T arpintr
-ffffffff8142a0b0 T in_arpinput
-ffffffff8142a4d0 T arplookup
-ffffffff8142a5c0 T arpcache
-ffffffff8142a940 T arpproxy
-ffffffff8142aa20 T revarpinput
-ffffffff8142aa70 T in_revarpinput
-ffffffff8142ab30 T revarprequest
-ffffffff8142ac70 T revarpwhoarewe
-ffffffff8142ae60 T revarpwhoami
+ffffffff81429e90 T arppullup
+ffffffff81429f50 T arpinput
+ffffffff81429fb0 T arpintr
+ffffffff8142a060 T in_arpinput
+ffffffff8142a480 T arplookup
+ffffffff8142a570 T arpcache
+ffffffff8142a8f0 T arpproxy
+ffffffff8142a9d0 T revarpinput
+ffffffff8142aa20 T in_revarpinput
+ffffffff8142aae0 T revarprequest
+ffffffff8142ac20 T revarpwhoarewe
+ffffffff8142ae10 T revarpwhoami
 ffffffff8142b000 T igmp_init
 ffffffff8142b090 T rti_fill
 ffffffff8142b160 T rti_find
@@ -19797,14 +19797,15 @@ ffffffff819bd530 T ttm_eu_fence_buffer_objects
 ffffffff819bd680 t __ww_mutex_lock
 ffffffff819be000 T ttm_prot_from_caching
 ffffffff819bf000 T ttm_pool_alloc
-ffffffff819bf7c0 T ttm_pool_free
-ffffffff819bfbe0 T ttm_pool_init
-ffffffff819bfe90 T ttm_pool_fini
-ffffffff819c0060 t ttm_pool_type_fini
-ffffffff819c02a0 T ttm_pool_mgr_init
-ffffffff819c0580 t ttm_pool_shrinker_count
-ffffffff819c05d0 t ttm_pool_shrinker_scan
-ffffffff819c07e0 T ttm_pool_mgr_fini
+ffffffff819bfae0 t ttm_pool_free_range
+ffffffff819bfd90 T ttm_pool_free
+ffffffff819bffa0 T ttm_pool_init
+ffffffff819c0250 T ttm_pool_fini
+ffffffff819c0420 t ttm_pool_type_fini
+ffffffff819c0660 T ttm_pool_mgr_init
+ffffffff819c0940 t ttm_pool_shrinker_count
+ffffffff819c0990 t ttm_pool_shrinker_scan
+ffffffff819c0ba0 T ttm_pool_mgr_fini
 ffffffff819c1000 T ttm_range_man_init_nocheck
 ffffffff819c1180 T ttm_range_man_fini_nocheck
 ffffffff819c1310 t ttm_range_man_alloc
@@ -28996,41 +28997,41 @@ ffffffff81f2aa40 t dm_dmub_hw_init
 ffffffff81f2ae10 t dmub_aux_setconfig_callback
 ffffffff81f2aec0 t dmub_hpd_callback
 ffffffff81f2b010 t amdgpu_dm_fini
-ffffffff81f2b1d0 t handle_hpd_irq_helper
-ffffffff81f2b300 t handle_hpd_rx_irq
-ffffffff81f2b760 t emulated_link_detect
-ffffffff81f2b860 t dm_handle_hpd_rx_offload_work
-ffffffff81f2b9b0 t amdgpu_dm_atomic_check
-ffffffff81f2cc40 t dm_update_plane_state
-ffffffff81f2d5d0 t dm_update_crtc_state
-ffffffff81f2e210 t dm_atomic_destroy_state
-ffffffff81f2e250 t fill_dc_plane_info_and_addr
-ffffffff81f2e590 t fill_hdr_info_packet
-ffffffff81f2e6f0 t get_highest_refresh_rate_mode
-ffffffff81f2e820 t update_stream_scaling_settings
-ffffffff81f2e960 t amdgpu_dm_atomic_commit_tail
-ffffffff81f30de0 t amdgpu_dm_backlight_set_level
-ffffffff81f30fc0 t dm_atomic_duplicate_state
-ffffffff81f31060 t dm_dmub_outbox1_low_irq
-ffffffff81f312d0 t dm_handle_hpd_work
-ffffffff81f31340 t amdgpu_dm_encoder_destroy
-ffffffff81f31370 t amdgpu_dm_i2c_xfer
-ffffffff81f314c0 t amdgpu_dm_i2c_func
-ffffffff81f314f0 t amdgpu_dm_connector_detect
-ffffffff81f315b0 t amdgpu_dm_connector_late_register
-ffffffff81f31610 t amdgpu_dm_connector_unregister
-ffffffff81f31630 t amdgpu_dm_connector_destroy
-ffffffff81f31750 t get_modes
-ffffffff81f31760 t amdgpu_dm_connector_atomic_check
-ffffffff81f31860 t amdgpu_dm_connector_get_modes
-ffffffff81f31de0 t amdgpu_dm_backlight_update_status
-ffffffff81f31e60 t amdgpu_dm_backlight_get_brightness
-ffffffff81f32050 t dm_crtc_high_irq
-ffffffff81f321f0 t dm_vupdate_high_irq
-ffffffff81f32370 t dm_pflip_high_irq
-ffffffff81f32580 t handle_hpd_irq
-ffffffff81f32590 t dm_gpureset_toggle_interrupts
-ffffffff81f327a0 t s3_handle_mst
+ffffffff81f2b1e0 t handle_hpd_irq_helper
+ffffffff81f2b310 t handle_hpd_rx_irq
+ffffffff81f2b770 t emulated_link_detect
+ffffffff81f2b870 t dm_handle_hpd_rx_offload_work
+ffffffff81f2b9c0 t amdgpu_dm_atomic_check
+ffffffff81f2cc50 t dm_update_plane_state
+ffffffff81f2d5e0 t dm_update_crtc_state
+ffffffff81f2e220 t dm_atomic_destroy_state
+ffffffff81f2e260 t fill_dc_plane_info_and_addr
+ffffffff81f2e5a0 t fill_hdr_info_packet
+ffffffff81f2e700 t get_highest_refresh_rate_mode
+ffffffff81f2e830 t update_stream_scaling_settings
+ffffffff81f2e970 t amdgpu_dm_atomic_commit_tail
+ffffffff81f30df0 t amdgpu_dm_backlight_set_level
+ffffffff81f30fd0 t dm_atomic_duplicate_state
+ffffffff81f31070 t dm_dmub_outbox1_low_irq
+ffffffff81f312e0 t dm_handle_hpd_work
+ffffffff81f31350 t amdgpu_dm_encoder_destroy
+ffffffff81f31380 t amdgpu_dm_i2c_xfer
+ffffffff81f314d0 t amdgpu_dm_i2c_func
+ffffffff81f31500 t amdgpu_dm_connector_detect
+ffffffff81f315c0 t amdgpu_dm_connector_late_register
+ffffffff81f31620 t amdgpu_dm_connector_unregister
+ffffffff81f31640 t amdgpu_dm_connector_destroy
+ffffffff81f31760 t get_modes
+ffffffff81f31770 t amdgpu_dm_connector_atomic_check
+ffffffff81f31870 t amdgpu_dm_connector_get_modes
+ffffffff81f31df0 t amdgpu_dm_backlight_update_status
+ffffffff81f31e70 t amdgpu_dm_backlight_get_brightness
+ffffffff81f32060 t dm_crtc_high_irq
+ffffffff81f32200 t dm_vupdate_high_irq
+ffffffff81f32380 t dm_pflip_high_irq
+ffffffff81f32590 t handle_hpd_irq
+ffffffff81f325a0 t dm_gpureset_toggle_interrupts
+ffffffff81f327b0 t s3_handle_mst
 ffffffff81f33000 T amdgpu_dm_init_color_mod
 ffffffff81f33010 T amdgpu_dm_verify_lut_sizes
 ffffffff81f330e0 T amdgpu_dm_update_crtc_color_mgmt
@@ -29171,9 +29172,9 @@ ffffffff81f40110 t pp_rn_set_wm_ranges
 ffffffff81f40160 t pp_rn_get_dpm_clock_table
 ffffffff81f41000 T amdgpu_dm_set_psr_caps
 ffffffff81f41110 T amdgpu_dm_link_setup_psr
-ffffffff81f41290 T amdgpu_dm_psr_enable
-ffffffff81f41390 T amdgpu_dm_psr_disable
-ffffffff81f41410 T amdgpu_dm_psr_disable_all
+ffffffff81f412a0 T amdgpu_dm_psr_enable
+ffffffff81f413a0 T amdgpu_dm_psr_disable
+ffffffff81f41420 T amdgpu_dm_psr_disable_all
 ffffffff81f42000 T dm_get_elapse_time_in_ns
 ffffffff81f42030 T dm_perf_trace_timestamp
 ffffffff81f43000 T dc_assert_fp_enabled
@@ -31367,22 +31368,22 @@ ffffffff8209c1d0 T dcn30_set_mcif_arb_params
 ffffffff8209c340 T dcn30_acquire_post_bldn_3dlut
 ffffffff8209c4c0 T dcn30_release_post_bldn_3dlut
 ffffffff8209c570 T dcn30_internal_validate_bw
-ffffffff8209d350 t dcn30_split_stream_for_mpc_or_odm
-ffffffff8209d670 T dcn30_can_support_mclk_switch_using_fw_based_vblank_stretch
-ffffffff8209d790 T dcn30_setup_mclk_switch_using_fw_based_vblank_stretch
-ffffffff8209d830 T dcn30_update_soc_for_wm_a
-ffffffff8209d880 T dcn30_calculate_wm_and_dlg
-ffffffff8209d8f0 T dcn30_validate_bandwidth
+ffffffff8209d340 t dcn30_split_stream_for_mpc_or_odm
+ffffffff8209d660 T dcn30_can_support_mclk_switch_using_fw_based_vblank_stretch
+ffffffff8209d780 T dcn30_setup_mclk_switch_using_fw_based_vblank_stretch
+ffffffff8209d820 T dcn30_update_soc_for_wm_a
+ffffffff8209d870 T dcn30_calculate_wm_and_dlg
+ffffffff8209d8e0 T dcn30_validate_bandwidth
 ffffffff8209dd20 T dcn30_update_bw_bounding_box
 ffffffff8209e500 T dcn30_create_resource_pool
-ffffffff8209fac0 t dcn30_resource_destruct
-ffffffff820a0030 t dcn30_destroy_resource_pool
-ffffffff820a0090 t dcn30_panel_cntl_create
-ffffffff820a0120 t dcn30_link_encoder_create
-ffffffff820a01e0 t read_dce_straps
-ffffffff820a0210 t dcn30_create_audio
-ffffffff820a0240 t dcn30_stream_encoder_create
-ffffffff820a03c0 t dcn30_hwseq_create
+ffffffff8209fad0 t dcn30_resource_destruct
+ffffffff820a0040 t dcn30_destroy_resource_pool
+ffffffff820a00a0 t dcn30_panel_cntl_create
+ffffffff820a0130 t dcn30_link_encoder_create
+ffffffff820a01f0 t read_dce_straps
+ffffffff820a0220 t dcn30_create_audio
+ffffffff820a0250 t dcn30_stream_encoder_create
+ffffffff820a03d0 t dcn30_hwseq_create
 ffffffff820a1000 T vpg3_update_generic_info_packet
 ffffffff820a19a0 T vpg3_construct
 ffffffff820a2000 T dccg301_create
@@ -31540,19 +31541,19 @@ ffffffff820c5350 T dcn31_calculate_wm_and_dlg
 ffffffff820c53d0 T dcn31_populate_dml_writeback_from_context
 ffffffff820c5430 T dcn31_set_mcif_arb_params
 ffffffff820c5490 T dcn31_validate_bandwidth
-ffffffff820c5870 T dcn31_create_resource_pool
-ffffffff820c6c10 t dcn31_resource_destruct
-ffffffff820c7270 t dcn31_destroy_resource_pool
-ffffffff820c72d0 t dcn31_panel_cntl_create
-ffffffff820c7340 t dcn31_link_encoder_create
-ffffffff820c7400 t dcn31_link_enc_create_minimal
-ffffffff820c74a0 t dcn31_get_panel_config_defaults
-ffffffff820c7510 t read_dce_straps
-ffffffff820c7540 t dcn31_create_audio
-ffffffff820c7570 t dcn31_stream_encoder_create
-ffffffff820c76f0 t dcn31_hpo_dp_stream_encoder_create
-ffffffff820c78b0 t dcn31_hpo_dp_link_encoder_create
-ffffffff820c7940 t dcn31_hwseq_create
+ffffffff820c5880 T dcn31_create_resource_pool
+ffffffff820c6c20 t dcn31_resource_destruct
+ffffffff820c7280 t dcn31_destroy_resource_pool
+ffffffff820c72e0 t dcn31_panel_cntl_create
+ffffffff820c7350 t dcn31_link_encoder_create
+ffffffff820c7410 t dcn31_link_enc_create_minimal
+ffffffff820c74b0 t dcn31_get_panel_config_defaults
+ffffffff820c7520 t read_dce_straps
+ffffffff820c7550 t dcn31_create_audio
+ffffffff820c7580 t dcn31_stream_encoder_create
+ffffffff820c7700 t dcn31_hpo_dp_stream_encoder_create
+ffffffff820c78c0 t dcn31_hpo_dp_link_encoder_create
+ffffffff820c7950 t dcn31_hwseq_create
 ffffffff820c8000 T vpg31_powerdown
 ffffffff820c8090 T vpg31_poweron
 ffffffff820c8120 T vpg31_construct
@@ -31587,21 +31588,22 @@ ffffffff820cf250 t optc314_phantom_crtc_post_enable
 ffffffff820cf310 t optc314_set_odm_bypass
 ffffffff820cf480 t optc314_set_odm_combine
 ffffffff820cf780 t optc314_set_h_timing_div_manual_mode
-ffffffff820d0000 T dcn314_create_resource_pool
-ffffffff820d12d0 t dcn314_resource_destruct
-ffffffff820d1930 t dcn314_destroy_resource_pool
-ffffffff820d1990 t dcn31_panel_cntl_create
-ffffffff820d1a00 t dcn31_link_encoder_create
-ffffffff820d1ac0 t dcn31_link_enc_create_minimal
-ffffffff820d1b60 t dcn314_populate_dml_pipes_from_context
-ffffffff820d1bf0 t dcn314_update_bw_bounding_box
-ffffffff820d1c40 t dcn314_get_panel_config_defaults
-ffffffff820d1cb0 t read_dce_straps
-ffffffff820d1ce0 t dcn31_create_audio
-ffffffff820d1d10 t dcn314_stream_encoder_create
-ffffffff820d1e90 t dcn31_hpo_dp_stream_encoder_create
-ffffffff820d2050 t dcn31_hpo_dp_link_encoder_create
-ffffffff820d20e0 t dcn314_hwseq_create
+ffffffff820d0000 T dcn314_validate_bandwidth
+ffffffff820d04a0 T dcn314_create_resource_pool
+ffffffff820d1770 t dcn314_resource_destruct
+ffffffff820d1dd0 t dcn314_destroy_resource_pool
+ffffffff820d1e30 t dcn31_panel_cntl_create
+ffffffff820d1ea0 t dcn31_link_encoder_create
+ffffffff820d1f60 t dcn31_link_enc_create_minimal
+ffffffff820d2000 t dcn314_populate_dml_pipes_from_context
+ffffffff820d2090 t dcn314_update_bw_bounding_box
+ffffffff820d20e0 t dcn314_get_panel_config_defaults
+ffffffff820d2150 t read_dce_straps
+ffffffff820d2180 t dcn31_create_audio
+ffffffff820d21b0 t dcn314_stream_encoder_create
+ffffffff820d2330 t dcn31_hpo_dp_stream_encoder_create
+ffffffff820d24f0 t dcn31_hpo_dp_link_encoder_create
+ffffffff820d2580 t dcn314_hwseq_create
 ffffffff820d3000 T dcn315_create_resource_pool
 ffffffff820d4270 t dcn315_resource_destruct
 ffffffff820d48d0 t dcn315_destroy_resource_pool
@@ -31878,8 +31880,8 @@ ffffffff8217d350 T dcn30_fpu_update_max_clk
 ffffffff8217d400 T dcn30_fpu_get_optimal_dcfclk_fclk_for_uclk
 ffffffff8217d500 T dcn30_fpu_update_bw_bounding_box
 ffffffff8217d6e0 T dcn30_find_dummy_latency_index_for_fw_based_mclk_switch
-ffffffff8217d8a0 T dcn3_fpu_build_wm_range_table
-ffffffff8217db80 T patch_dcn30_soc_bounding_box
+ffffffff8217d8c0 T dcn3_fpu_build_wm_range_table
+ffffffff8217dba0 T patch_dcn30_soc_bounding_box
 ffffffff8217e000 T dml30_recalculate
 ffffffff8217e600 t DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation
 ffffffff82184c50 T dml30_CalculateBytePerPixelAnd256BBlockSizes
@@ -32605,6 +32607,7 @@ ffffffff822549a0 T dmcu_load_iram
 ffffffff82255180 T is_psr_su_specific_panel
 ffffffff82255210 T mod_power_calc_psr_configs
 ffffffff82255310 T mod_power_only_edp
+ffffffff82255360 T psr_su_set_y_granularity
 ffffffff82256000 T mod_vmid_get_for_ptb
 ffffffff82256230 T mod_vmid_reset
 ffffffff822562f0 T mod_vmid_create
@@ -33521,86 +33524,86 @@ ffffffff822d80f0 T smu_get_status_gfxoff
 ffffffff822d8150 T smu_set_soft_freq_range
 ffffffff822d8190 T smu_get_dpm_freq_range
 ffffffff822d81e0 T smu_set_gfx_power_up_by_imu
-ffffffff822d8230 T is_support_sw_smu
-ffffffff822d8270 T is_support_cclk_dpm
-ffffffff822d82d0 T smu_allow_xgmi_power_down
-ffffffff822d8390 T smu_write_watermarks_table
-ffffffff822d8400 T smu_set_ac_dc
-ffffffff822d8500 t smu_early_init
-ffffffff822d8760 t smu_late_init
-ffffffff822d8f10 t smu_sw_init
-ffffffff822d9750 t smu_sw_fini
-ffffffff822d99a0 t smu_hw_init
-ffffffff822d9da0 t smu_hw_fini
-ffffffff822d9ea0 t smu_late_fini
-ffffffff822d9ec0 t smu_suspend
-ffffffff822d9f90 t smu_resume
-ffffffff822da170 t smu_set_clockgating_state
-ffffffff822da1a0 t smu_set_powergating_state
-ffffffff822da1d0 T smu_get_power_limit
-ffffffff822da320 T smu_mode1_reset_is_support
-ffffffff822da370 T smu_mode2_reset_is_support
-ffffffff822da3c0 T smu_mode1_reset
-ffffffff822da410 T smu_handle_passthrough_sbr
-ffffffff822da460 T smu_get_ecc_info
-ffffffff822da4b0 T smu_wait_for_event
-ffffffff822da500 T smu_stb_collect_info
-ffffffff822da560 T amdgpu_smu_stb_debug_fs_init
-ffffffff822da590 T smu_send_hbm_bad_pages_num
-ffffffff822da5e0 T smu_send_hbm_bad_channel_flag
-ffffffff822da630 t smu_set_fan_control_mode
-ffffffff822da6f0 t smu_get_fan_control_mode
-ffffffff822da770 t smu_set_fan_speed_pwm
-ffffffff822da820 t smu_get_fan_speed_pwm
-ffffffff822da880 t smu_force_ppclk_levels
-ffffffff822da9a0 t smu_print_ppclk_levels
-ffffffff822daa10 t smu_emit_ppclk_levels
-ffffffff822daa80 t smu_force_performance_level
-ffffffff822dad20 t smu_read_sensor
-ffffffff822daf20 t smu_get_performance_level
-ffffffff822daf90 t smu_get_current_power_state
-ffffffff822daff0 t smu_get_fan_speed_rpm
-ffffffff822db050 t smu_set_fan_speed_rpm
-ffffffff822db100 t smu_get_power_num_states
-ffffffff822db180 t smu_sys_get_pp_table
-ffffffff822db1f0 t smu_sys_set_pp_table
-ffffffff822db3e0 t smu_switch_power_profile
-ffffffff822db4f0 t smu_handle_dpm_task
-ffffffff822db5a0 t smu_load_microcode
-ffffffff822db690 t smu_dpm_set_power_gate
-ffffffff822dba10 t smu_set_power_limit
-ffffffff822dbb40 t smu_get_power_profile_mode
-ffffffff822dbba0 t smu_set_power_profile_mode
-ffffffff822dbc00 t smu_od_edit_dpm_table
-ffffffff822dbc60 t smu_set_mp1_state
-ffffffff822dbcc0 t smu_gfx_state_change_set
-ffffffff822dbd00 t smu_get_sclk
-ffffffff822dbd80 t smu_get_mclk
-ffffffff822dbe00 t smu_display_configuration_change
-ffffffff822dbe90 t smu_get_clock_by_type_with_latency
-ffffffff822dbf50 t smu_display_clock_voltage_request
-ffffffff822dbfb0 t smu_enable_mgpu_fan_boost
-ffffffff822dc010 t smu_set_display_count
-ffffffff822dc080 t smu_set_deep_sleep_dcefclk
-ffffffff822dc0f0 t smu_get_baco_capability
-ffffffff822dc150 t smu_baco_set_state
-ffffffff822dc230 t smu_sys_get_pp_feature_mask
-ffffffff822dc2a0 t smu_sys_set_pp_feature_mask
-ffffffff822dc310 t smu_mode2_reset
-ffffffff822dc3c0 t smu_set_df_cstate
-ffffffff822dc480 t smu_set_xgmi_pstate
-ffffffff822dc530 t smu_sys_get_gpu_metrics
-ffffffff822dc590 t smu_set_watermarks_for_clock_ranges
-ffffffff822dc610 t smu_display_disable_memory_clock_switch
-ffffffff822dc670 t smu_get_max_sustainable_clocks_by_dc
-ffffffff822dc6d0 t smu_get_uclk_dpm_states
-ffffffff822dc730 t smu_get_dpm_clock_table
-ffffffff822dc790 t smu_get_prv_buffer_details
-ffffffff822dc800 t smu_adjust_power_state_dynamic
-ffffffff822dca60 t smu_throttling_logging_work_fn
-ffffffff822dcab0 t smu_interrupt_work_fn
-ffffffff822dcb00 t smu_smc_hw_setup
-ffffffff822dd460 t smu_smc_hw_cleanup
+ffffffff822d8280 T is_support_sw_smu
+ffffffff822d82c0 T is_support_cclk_dpm
+ffffffff822d8320 T smu_allow_xgmi_power_down
+ffffffff822d83e0 T smu_write_watermarks_table
+ffffffff822d8450 T smu_set_ac_dc
+ffffffff822d8550 t smu_early_init
+ffffffff822d87b0 t smu_late_init
+ffffffff822d8f60 t smu_sw_init
+ffffffff822d97a0 t smu_sw_fini
+ffffffff822d99f0 t smu_hw_init
+ffffffff822d9e30 t smu_hw_fini
+ffffffff822d9f30 t smu_late_fini
+ffffffff822d9f50 t smu_suspend
+ffffffff822da020 t smu_resume
+ffffffff822da290 t smu_set_clockgating_state
+ffffffff822da2c0 t smu_set_powergating_state
+ffffffff822da2f0 T smu_get_power_limit
+ffffffff822da440 T smu_mode1_reset_is_support
+ffffffff822da490 T smu_mode2_reset_is_support
+ffffffff822da4e0 T smu_mode1_reset
+ffffffff822da530 T smu_handle_passthrough_sbr
+ffffffff822da580 T smu_get_ecc_info
+ffffffff822da5d0 T smu_wait_for_event
+ffffffff822da620 T smu_stb_collect_info
+ffffffff822da680 T amdgpu_smu_stb_debug_fs_init
+ffffffff822da6b0 T smu_send_hbm_bad_pages_num
+ffffffff822da700 T smu_send_hbm_bad_channel_flag
+ffffffff822da750 t smu_set_fan_control_mode
+ffffffff822da810 t smu_get_fan_control_mode
+ffffffff822da890 t smu_set_fan_speed_pwm
+ffffffff822da940 t smu_get_fan_speed_pwm
+ffffffff822da9a0 t smu_force_ppclk_levels
+ffffffff822daac0 t smu_print_ppclk_levels
+ffffffff822dab30 t smu_emit_ppclk_levels
+ffffffff822daba0 t smu_force_performance_level
+ffffffff822dae40 t smu_read_sensor
+ffffffff822db040 t smu_get_performance_level
+ffffffff822db0b0 t smu_get_current_power_state
+ffffffff822db110 t smu_get_fan_speed_rpm
+ffffffff822db170 t smu_set_fan_speed_rpm
+ffffffff822db220 t smu_get_power_num_states
+ffffffff822db2a0 t smu_sys_get_pp_table
+ffffffff822db310 t smu_sys_set_pp_table
+ffffffff822db500 t smu_switch_power_profile
+ffffffff822db610 t smu_handle_dpm_task
+ffffffff822db6c0 t smu_load_microcode
+ffffffff822db7b0 t smu_dpm_set_power_gate
+ffffffff822dbb30 t smu_set_power_limit
+ffffffff822dbc60 t smu_get_power_profile_mode
+ffffffff822dbcc0 t smu_set_power_profile_mode
+ffffffff822dbd20 t smu_od_edit_dpm_table
+ffffffff822dbd80 t smu_set_mp1_state
+ffffffff822dbde0 t smu_gfx_state_change_set
+ffffffff822dbe20 t smu_get_sclk
+ffffffff822dbea0 t smu_get_mclk
+ffffffff822dbf20 t smu_display_configuration_change
+ffffffff822dbfb0 t smu_get_clock_by_type_with_latency
+ffffffff822dc070 t smu_display_clock_voltage_request
+ffffffff822dc0d0 t smu_enable_mgpu_fan_boost
+ffffffff822dc130 t smu_set_display_count
+ffffffff822dc1a0 t smu_set_deep_sleep_dcefclk
+ffffffff822dc210 t smu_get_baco_capability
+ffffffff822dc270 t smu_baco_set_state
+ffffffff822dc350 t smu_sys_get_pp_feature_mask
+ffffffff822dc3c0 t smu_sys_set_pp_feature_mask
+ffffffff822dc430 t smu_mode2_reset
+ffffffff822dc4e0 t smu_set_df_cstate
+ffffffff822dc5a0 t smu_set_xgmi_pstate
+ffffffff822dc650 t smu_sys_get_gpu_metrics
+ffffffff822dc6b0 t smu_set_watermarks_for_clock_ranges
+ffffffff822dc730 t smu_display_disable_memory_clock_switch
+ffffffff822dc790 t smu_get_max_sustainable_clocks_by_dc
+ffffffff822dc7f0 t smu_get_uclk_dpm_states
+ffffffff822dc850 t smu_get_dpm_clock_table
+ffffffff822dc8b0 t smu_get_prv_buffer_details
+ffffffff822dc920 t smu_adjust_power_state_dynamic
+ffffffff822dcb80 t smu_throttling_logging_work_fn
+ffffffff822dcbd0 t smu_interrupt_work_fn
+ffffffff822dcc20 t smu_smc_hw_setup
+ffffffff822dd580 t smu_smc_hw_cleanup
 ffffffff822de000 T arcturus_set_ppt_funcs
 ffffffff822de050 t arcturus_run_btc
 ffffffff822de100 t arcturus_get_allowed_feature_mask
@@ -39195,17 +39198,17 @@ ffffffff8255a080 r unimappings
 ffffffff8255a230 r replacements
 ffffffff8255db1f r cmd0646_9_tim_udma
 ffffffff825b16d4 r pp_r600_decoded_lanes
-ffffffff825cca7d r cmd680_setup_channel.udma_tbl
-ffffffff825d4728 r apollo_udma33_tim
-ffffffff825da815 r substchar
-ffffffff825dc921 r apollo_udma100_tim
-ffffffff8260424d r apollo_udma66_tim
-ffffffff8260b6f9 r apollo_pio_rec
-ffffffff8261aad3 r cy_pio_rec
-ffffffff8264a08b r apollo_udma133_tim
-ffffffff82656c68 R drm_ca
-ffffffff82656c90 R drm_filtops
-ffffffff82656cc0 R drmread_filtops
+ffffffff825cca8e r cmd680_setup_channel.udma_tbl
+ffffffff825d4753 r apollo_udma33_tim
+ffffffff825da840 r substchar
+ffffffff825dc94c r apollo_udma100_tim
+ffffffff82604278 r apollo_udma66_tim
+ffffffff8260b724 r apollo_pio_rec
+ffffffff8261aace r cy_pio_rec
+ffffffff8264a0b6 r apollo_udma133_tim
+ffffffff82656c90 R drm_ca
+ffffffff82656cb8 R drm_filtops
+ffffffff82656ce8 R drmread_filtops
 ffffffff82657000 r vga_emulops
 ffffffff82657048 R vga_stdscreen
 ffffffff82657078 R vga_stdscreen_mono
@@ -42287,67 +42290,67 @@ ffffffff829ec300 r hpd_ilk
 ffffffff829ec340 r hpd_mask_i915
 ffffffff829ed000 r init_funcs
 ffffffff829ee000 R pciidlist
-ffffffff829f00b8 r i830_info
-ffffffff829f0178 r i845g_info
-ffffffff829f0238 r i85x_info
-ffffffff829f02f8 r i865g_info
-ffffffff829f03b8 r i915g_info
-ffffffff829f0478 r i915gm_info
-ffffffff829f0538 r i945g_info
-ffffffff829f05f8 r i945gm_info
-ffffffff829f06b8 r i965g_info
-ffffffff829f0778 r g33_info
-ffffffff829f0838 r i965gm_info
-ffffffff829f08f8 r gm45_info
-ffffffff829f09b8 r g45_info
-ffffffff829f0a78 r pnv_g_info
-ffffffff829f0b38 r pnv_m_info
-ffffffff829f0bf8 r ilk_d_info
-ffffffff829f0cb8 r ilk_m_info
-ffffffff829f0d78 r snb_d_gt1_info
-ffffffff829f0e38 r snb_d_gt2_info
-ffffffff829f0ef8 r snb_m_gt1_info
-ffffffff829f0fb8 r snb_m_gt2_info
-ffffffff829f1078 r ivb_q_info
-ffffffff829f1138 r ivb_m_gt1_info
-ffffffff829f11f8 r ivb_m_gt2_info
-ffffffff829f12b8 r ivb_d_gt1_info
-ffffffff829f1378 r ivb_d_gt2_info
-ffffffff829f1438 r hsw_gt1_info
-ffffffff829f14f8 r hsw_gt2_info
-ffffffff829f15b8 r hsw_gt3_info
-ffffffff829f1678 r vlv_info
-ffffffff829f1738 r bdw_gt1_info
-ffffffff829f17f8 r bdw_gt2_info
-ffffffff829f18b8 r bdw_gt3_info
-ffffffff829f1978 r bdw_rsvd_info
-ffffffff829f1a38 r chv_info
-ffffffff829f1af8 r skl_gt1_info
-ffffffff829f1bb8 r skl_gt2_info
-ffffffff829f1c78 r skl_gt3_info
-ffffffff829f1d38 r skl_gt4_info
-ffffffff829f1df8 r bxt_info
-ffffffff829f1eb8 r glk_info
-ffffffff829f1f78 r kbl_gt1_info
-ffffffff829f2038 r kbl_gt2_info
-ffffffff829f20f8 r kbl_gt3_info
-ffffffff829f21b8 r cfl_gt1_info
-ffffffff829f2278 r cfl_gt2_info
-ffffffff829f2338 r cfl_gt3_info
-ffffffff829f23f8 r cml_gt1_info
-ffffffff829f24b8 r cml_gt2_info
-ffffffff829f2578 r icl_info
-ffffffff829f2638 r ehl_info
-ffffffff829f26f8 r jsl_info
-ffffffff829f27b8 r tgl_info
-ffffffff829f2878 r rkl_info
-ffffffff829f2938 r adl_s_info
-ffffffff829f29f8 r adl_p_info
-ffffffff829f2ab8 r dg1_info
-ffffffff829f2b78 r dg2_info
-ffffffff829f2c38 r ats_m_info
-ffffffff829f2d00 r xelpmp_extra_gt
-ffffffff829f2d40 r mtl_info
+ffffffff829f00a0 r i830_info
+ffffffff829f0160 r i845g_info
+ffffffff829f0220 r i85x_info
+ffffffff829f02e0 r i865g_info
+ffffffff829f03a0 r i915g_info
+ffffffff829f0460 r i915gm_info
+ffffffff829f0520 r i945g_info
+ffffffff829f05e0 r i945gm_info
+ffffffff829f06a0 r i965g_info
+ffffffff829f0760 r g33_info
+ffffffff829f0820 r i965gm_info
+ffffffff829f08e0 r gm45_info
+ffffffff829f09a0 r g45_info
+ffffffff829f0a60 r pnv_g_info
+ffffffff829f0b20 r pnv_m_info
+ffffffff829f0be0 r ilk_d_info
+ffffffff829f0ca0 r ilk_m_info
+ffffffff829f0d60 r snb_d_gt1_info
+ffffffff829f0e20 r snb_d_gt2_info
+ffffffff829f0ee0 r snb_m_gt1_info
+ffffffff829f0fa0 r snb_m_gt2_info
+ffffffff829f1060 r ivb_q_info
+ffffffff829f1120 r ivb_m_gt1_info
+ffffffff829f11e0 r ivb_m_gt2_info
+ffffffff829f12a0 r ivb_d_gt1_info
+ffffffff829f1360 r ivb_d_gt2_info
+ffffffff829f1420 r hsw_gt1_info
+ffffffff829f14e0 r hsw_gt2_info
+ffffffff829f15a0 r hsw_gt3_info
+ffffffff829f1660 r vlv_info
+ffffffff829f1720 r bdw_gt1_info
+ffffffff829f17e0 r bdw_gt2_info
+ffffffff829f18a0 r bdw_gt3_info
+ffffffff829f1960 r bdw_rsvd_info
+ffffffff829f1a20 r chv_info
+ffffffff829f1ae0 r skl_gt1_info
+ffffffff829f1ba0 r skl_gt2_info
+ffffffff829f1c60 r skl_gt3_info
+ffffffff829f1d20 r skl_gt4_info
+ffffffff829f1de0 r bxt_info
+ffffffff829f1ea0 r glk_info
+ffffffff829f1f60 r kbl_gt1_info
+ffffffff829f2020 r kbl_gt2_info
+ffffffff829f20e0 r kbl_gt3_info
+ffffffff829f21a0 r cfl_gt1_info
+ffffffff829f2260 r cfl_gt2_info
+ffffffff829f2320 r cfl_gt3_info
+ffffffff829f23e0 r cml_gt1_info
+ffffffff829f24a0 r cml_gt2_info
+ffffffff829f2560 r icl_info
+ffffffff829f2620 r ehl_info
+ffffffff829f26e0 r jsl_info
+ffffffff829f27a0 r tgl_info
+ffffffff829f2860 r rkl_info
+ffffffff829f2920 r adl_s_info
+ffffffff829f29e0 r adl_p_info
+ffffffff829f2aa0 r dg1_info
+ffffffff829f2b60 r dg2_info
+ffffffff829f2c20 r ats_m_info
+ffffffff829f2ce0 r xelpmp_extra_gt
+ffffffff829f2d20 r mtl_info
 ffffffff829f3000 r oa_formats
 ffffffff829f3060 r gen8_update_reg_state_unlocked.flex_regs
 ffffffff829f3080 r gen8_oa_mux_regs
@@ -54700,8 +54703,9 @@ ffffffff83708000 b pq_initialized
 ffffffff83708001 b de_pg_initialized
 ffffffff83708010 b pq_table
 ffffffff83709020 b de_pq_table
-ffffffff8370b000 b fill_backlight_transform_table_v_2_2.__warned
-ffffffff8370b004 b fill_backlight_transform_table.__warned
+ffffffff8370b000 b psr_su_set_y_granularity.__warned
+ffffffff8370b004 b fill_backlight_transform_table_v_2_2.__warned
+ffffffff8370b008 b fill_backlight_transform_table.__warned
 ffffffff8370c000 b mod_vmid_get_for_ptb.__warned
 ffffffff8370d000 b cyan_skillfish_sclk_default
 ffffffff8370d004 b cyan_skillfish_user_settings.0