--- 7.3/2023-05-27T05:58:46Z/2023-04-22T00:00:00Z/nm-bsd-ot14.txt Sat May 27 14:41:07 2023 +++ 7.3/2023-05-27T05:58:46Z/2023-04-29T00:00:00Z/nm-bsd-ot14.txt Sat May 27 15:59:55 2023 @@ -2,14 +2,14 @@ 00011006 A mp_pdirpa 0001419d A acpi_pdirpa 01000000 A __kernel_phys_base -02549000 T __kernel_kutext_phys -0254d000 C __kernel_cptext_phys -0254e000 C __kernel_rodata_phys -02e01000 R __kernel_kutext_page_phys -02e03000 C __kernel_randomdata_phys -030c4000 R __kernel_data_phys -033f5000 D __kernel_kudata_phys -033f6000 C __kernel_bss_phys +0254f000 T __kernel_kutext_phys +02553000 C __kernel_cptext_phys +02554000 C __kernel_rodata_phys +02e0b000 R __kernel_kutext_page_phys +02e0d000 C __kernel_randomdata_phys +030ce000 R __kernel_data_phys +03402000 D __kernel_kudata_phys +03403000 C __kernel_bss_phys 03800000 B __kernel_phys_end 80000000 A __kernel_virt_to_phys ffffffff80000000 A __kernel_base @@ -2777,52019 +2777,52086 @@ ffffffff8114a260 T rtw_grf5101_host_crypt ffffffff8114a290 T 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rtwn_get_txpower +ffffffff81151bc0 T rtwn_r88e_get_txpower +ffffffff81151df0 T rtwn_r92e_get_txpower +ffffffff81152010 T rtwn_r92c_get_txpower +ffffffff811524d0 T rtwn_chan2group +ffffffff81152520 T rtwn_set_txpower +ffffffff811525f0 T rtwn_iq_calib_chain +ffffffff81152940 T rtwn_iq_calib_run +ffffffff81153460 T rtwn_iq_calib_compare_results +ffffffff81153610 T rtwn_iq_calib_write_results +ffffffff81153910 T rtwn_iq_calib +ffffffff81153af0 T rtwn_lc_calib +ffffffff81153e60 T rtwn_enable_intr +ffffffff81154030 T rtwn_disable_intr +ffffffff81155000 T rt2560_attach +ffffffff811555c0 T rt2560_amrr_timeout +ffffffff81155640 T rt2560_next_scan +ffffffff81155690 T rt2560_get_macaddr +ffffffff81155710 T rt2560_read_eeprom +ffffffff811558a0 T rt2560_get_rf +ffffffff811558e0 T rt2560_alloc_tx_ring +ffffffff81155b90 T rt2560_alloc_rx_ring +ffffffff81155f10 T rt2560_ioctl +ffffffff811560e0 T rt2560_start +ffffffff811562e0 T rt2560_watchdog +ffffffff81156370 T rt2560_node_alloc +ffffffff81156390 T rt2560_newassoc +ffffffff81156420 T rt2560_updateslot +ffffffff81156540 T rt2560_newstate +ffffffff81156a60 T rt2560_media_change +ffffffff81156ad0 T rt2560_free_tx_ring +ffffffff81156c80 T rt2560_detach +ffffffff81156d40 T rt2560_free_rx_ring +ffffffff81156ee0 T rt2560_suspend +ffffffff81156f20 T rt2560_stop +ffffffff81157150 T rt2560_wakeup +ffffffff81157190 T rt2560_init +ffffffff81157720 T rt2560_reset_tx_ring +ffffffff81157850 T rt2560_reset_rx_ring +ffffffff811578f0 T rt2560_iter_func +ffffffff81157910 T rt2560_update_led +ffffffff81157950 T rt2560_set_chan +ffffffff81158c70 T rt2560_update_plcp +ffffffff81158d30 T rt2560_set_slottime +ffffffff81158e10 T rt2560_set_basicrates +ffffffff81158e50 T rt2560_set_bssid +ffffffff81158eb0 T rt2560_tx_bcn +ffffffff81159080 T rt2560_enable_tsf_sync +ffffffff81159160 T rt2560_eeprom_read +ffffffff811595b0 T rt2560_encryption_intr +ffffffff81159730 T rt2560_tx_intr +ffffffff81159990 T rt2560_prio_intr +ffffffff81159b70 T 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rt2860_updateslot +ffffffff811678e0 T rt2860_updateedca +ffffffff81167bd0 T rt2860_set_key +ffffffff81167f10 T rt2860_delete_key +ffffffff81167fd0 T rt2860_newstate +ffffffff81168720 T rt2860_media_change +ffffffff81168860 T rt2860_detach +ffffffff81168940 T rt2860_free_tx_pool +ffffffff81168a40 T rt2860_suspend +ffffffff81168a80 T rt2860_stop +ffffffff81168e10 T rt2860_wakeup +ffffffff81168e50 T rt2860_init +ffffffff81169fd0 T rt2860_reset_tx_ring +ffffffff8116a0c0 T rt2860_reset_rx_ring +ffffffff8116a140 T rt2860_iter_func +ffffffff8116a180 T rt2860_updatestats +ffffffff8116a280 T rt2860_set_leds +ffffffff8116a380 T rt2860_set_gp_timer +ffffffff8116a490 T rt2860_switch_chan +ffffffff8116a590 T rt2860_enable_mrr +ffffffff8116a600 T rt2860_set_txpreamble +ffffffff8116a670 T rt2860_set_basicrates +ffffffff8116a6c0 T rt2860_set_bssid +ffffffff8116a720 T rt2860_setup_beacon +ffffffff8116a840 T rt2860_enable_tsf_sync +ffffffff8116a900 T rt3090_efuse_read_2 +ffffffff8116aa30 T rt3290_efuse_read_2 +ffffffff8116ab60 T rt2860_eeprom_read_2 +ffffffff8116aff0 T rt2860_intr_coherent +ffffffff8116b050 T rt2860_txrx_enable +ffffffff8116b1b0 T rt2860_drain_stats_fifo +ffffffff8116b280 T rt2860_tx_intr +ffffffff8116b4a0 T rt2860_rx_intr +ffffffff8116ba60 T rt2860_rssi2dbm +ffffffff8116bb10 T rt2860_tbtt_intr +ffffffff8116bc40 T rt2860_updateprot +ffffffff8116bcf0 T rt2860_gp_intr +ffffffff8116bd40 T rt2860_intr +ffffffff8116bff0 T rt2860_tx +ffffffff8116c5f0 T rt2860_mcu_bbp_write +ffffffff8116c760 T rt2860_mcu_cmd +ffffffff8116c9d0 T rt2860_mcu_bbp_read +ffffffff8116cba0 T rt2860_rf_write +ffffffff8116cc70 T rt3090_rf_read +ffffffff8116cd80 T rt3090_rf_write +ffffffff8116d020 T rt2860_select_chan_group +ffffffff8116d3a0 T rt2860_set_chan +ffffffff8116dae0 T rt3090_set_chan +ffffffff8116dce0 T rt5390_set_chan +ffffffff8116e100 T rt3090_rf_init +ffffffff8116e5f0 T rt3090_filter_calib +ffffffff8116e7d0 T rt3090_set_rx_antenna +ffffffff8116e940 T rt5390_rf_init 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+ffffffff81174fd0 T acx_join_bss +ffffffff81175100 T acx_set_beacon_tmplt +ffffffff81175380 T acx_set_probe_resp_tmplt +ffffffff81175530 T acx_init_tmplt_ordered +ffffffff81175680 T acx_set_tmplt +ffffffff81175720 T acx_beacon_locate +ffffffff811757c0 T acx_iter_func +ffffffff81176000 T acx111_set_param +ffffffff811760f0 T acx111_init +ffffffff81176180 T acx111_write_config +ffffffff81176260 T acx111_set_fw_txdesc_rate +ffffffff811762b0 T acx111_set_bss_join_param +ffffffff811762e0 T acx111_init_memory +ffffffff81176470 T acx111_init_fw_txring +ffffffff81177000 T acx100_set_param +ffffffff81177100 T acx100_init +ffffffff81177230 T acx100_set_wepkey +ffffffff81177310 T acx100_read_config +ffffffff811773e0 T acx100_write_config +ffffffff81177510 T acx100_set_fw_txdesc_rate +ffffffff81177550 T acx100_set_bss_join_param +ffffffff81177580 T acx100_proc_wep_rxbuf +ffffffff811775d0 T acx100_init_wep +ffffffff811776b0 T acx100_init_tmplt +ffffffff81177770 T acx100_init_fw_ring +ffffffff81177a30 T acx100_init_memory +ffffffff81177bc0 T acx100_init_fw_txring +ffffffff81177cc0 T acx100_init_fw_rxring +ffffffff81177db0 T acx100_set_txpower +ffffffff81178000 T pgt_write_memory_barrier +ffffffff81178030 T pgt_read_4 +ffffffff81178060 T pgt_write_4 +ffffffff81178090 T pgt_write_4_flush +ffffffff811780e0 T pgt_debug_events +ffffffff81178110 T pgt_queue_frags_pending +ffffffff81178150 T pgt_reinit_rx_desc_frag +ffffffff811781a0 T pgt_load_tx_desc_frag +ffffffff81178260 T pgt_unload_tx_desc_frag +ffffffff811782b0 T pgt_load_firmware +ffffffff81178670 T pgt_reboot +ffffffff81178750 T pgt_cleanup_queue +ffffffff81178870 T pgt_reset +ffffffff81178d70 T pgt_stop +ffffffff81179140 T pgt_drain_tx_queue +ffffffff811792e0 T pgt_update_hw_from_sw +ffffffff81179fd0 T pgt_attach +ffffffff8117a180 T pgt_dma_alloc +ffffffff8117a5e0 T pgt_net_attach +ffffffff8117abe0 T pgt_per_device_kthread +ffffffff8117adc0 T pgt_detach +ffffffff8117af10 T pgt_dma_free +ffffffff8117b420 T pgt_init_intr +ffffffff8117b470 T pgt_update_intr +ffffffff8117b820 T pgt_rxdone +ffffffff8117b8d0 T pgt_txdone +ffffffff8117b9d0 T pgt_mgmtrx_completion +ffffffff8117bbd0 T pgt_datarx_completion +ffffffff8117be70 T pgt_input_frames +ffffffff8117c190 T pgt_ieee80211_encap +ffffffff8117c440 T pgt_wakeup_intr +ffffffff8117c580 T pgt_sleep_intr +ffffffff8117c6d0 T pgt_empty_traps +ffffffff8117c760 T pgt_update_sw_from_hw +ffffffff8117cc40 T pgt_async_reset +ffffffff8117cc90 T pgt_async_update +ffffffff8117cce0 T pgt_intr +ffffffff8117cf90 T pgt_start +ffffffff8117d460 T pgt_trap_received +ffffffff8117d5a0 T pgt_oid_get +ffffffff8117d610 T pgt_mgmt_request +ffffffff8117d8d0 T pgt_oid_retrieve +ffffffff8117d940 T pgt_oid_set +ffffffff8117d9b0 T pgt_state_dump +ffffffff8117dad0 T pgt_desc_transmit +ffffffff8117dc50 T pgt_maybe_trigger +ffffffff8117de00 T pgt_ieee80211_node_alloc +ffffffff8117de60 T pgt_ieee80211_newassoc +ffffffff8117de90 T pgt_ieee80211_node_free +ffffffff8117deb0 T pgt_ieee80211_node_copy +ffffffff8117ded0 T pgt_ieee80211_send_mgmt +ffffffff8117df00 T pgt_ioctl +ffffffff8117e5f0 T pgt_watchdog +ffffffff8117e6f0 T pgt_newstate +ffffffff8117e7f0 T pgt_media_change +ffffffff8117e850 T pgt_media_status +ffffffff8117e9c0 T pgt_obj_bss2scanres +ffffffff8117eb50 T pgt_init +ffffffff8117ec00 T node_mark_active_ap +ffffffff8117ec30 T node_mark_active_adhoc +ffffffff8117ec70 T pgt_hostap_handle_mlme +ffffffff8117ed50 T pgt_dma_alloc_queue +ffffffff8117efc0 T pgt_dma_free_queue +ffffffff8117f0d0 T pgt_activate +ffffffff8117f160 T pgt_wakeup +ffffffff81180000 T sf_reg_read +ffffffff81180060 T sf_reg_write +ffffffff811800c0 T sf_attach +ffffffff81180620 T sf_tick +ffffffff81180680 T sf_reset +ffffffff81180800 T sf_read_eeprom +ffffffff811808a0 T sf_mii_read +ffffffff81180990 T sf_mii_write +ffffffff81180ad0 T sf_mii_statchg +ffffffff81180c90 T sf_mediachange +ffffffff81180ce0 T sf_mediastatus +ffffffff81180d40 T sf_ioctl +ffffffff81180ec0 T sf_start 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malo_media_status +ffffffff81184bb0 T malo_detach +ffffffff81184cb0 T malo_stop +ffffffff81184e00 T malo_free_cmd +ffffffff81184e90 T malo_free_rx_ring +ffffffff81185010 T malo_free_tx_ring +ffffffff811851a0 T malo_send_cmd +ffffffff81185220 T malo_send_cmd_dma +ffffffff81185330 T malo_cmd_response +ffffffff811854d0 T malo_reset_rx_ring +ffffffff81185560 T malo_reset_tx_ring +ffffffff81185690 T malo_init +ffffffff81185930 T malo_load_bootimg +ffffffff81185da0 T malo_load_firmware +ffffffff811860c0 T malo_cmd_get_spec +ffffffff811862d0 T malo_cmd_set_channel +ffffffff81186420 T malo_cmd_set_antenna +ffffffff81186580 T malo_cmd_set_radio +ffffffff811866d0 T malo_cmd_set_txpower +ffffffff81186850 T malo_cmd_set_rts +ffffffff811869a0 T malo_tx_mgt +ffffffff81186ca0 T malo_tx_data +ffffffff81187010 T malo_cmd_set_prescan +ffffffff81187150 T malo_cmd_set_postscan +ffffffff811872b0 T malo_cmd_set_aid +ffffffff81187420 T malo_cmd_set_rate +ffffffff81187690 T malo_fix2rate +ffffffff811876d0 T malo_set_slot +ffffffff81187770 T malo_chip2rate +ffffffff811877b0 T malo_tx_setup_desc +ffffffff81187800 T malo_cmd_set_slot +ffffffff81188000 T bwi_intr +ffffffff81188640 T bwi_disable_intrs +ffffffff811886a0 T bwi_init_statechg +ffffffff81188b20 T bwi_mac_config_ps +ffffffff81188c60 T bwi_txeof +ffffffff81188d50 T bwi_enable_intrs +ffffffff81188db0 T bwi_led_event +ffffffff81188f40 T bwi_attach +ffffffff81189950 T bwi_amrr_timeout +ffffffff811899c0 T bwi_next_scan +ffffffff81189a10 T bwi_calibrate +ffffffff81189ab0 T bwi_power_on +ffffffff81189be0 T bwi_bbp_attach +ffffffff8118a1b0 T bwi_bbp_power_on +ffffffff8118a2d0 T bwi_set_clock_delay +ffffffff8118a570 T bwi_set_clock_mode +ffffffff8118a960 T bwi_get_pwron_delay +ffffffff8118ab70 T bwi_bus_attach +ffffffff8118adc0 T bwi_get_card_flags +ffffffff8118ae50 T bwi_led_attach +ffffffff8118b020 T bwi_regwin_switch +ffffffff8118b140 T bwi_mac_lateattach +ffffffff8118b260 T bwi_bbp_power_off +ffffffff8118b310 T bwi_dma_alloc +ffffffff8118b610 T bwi_ioctl +ffffffff8118b7e0 T bwi_start +ffffffff8118baa0 T bwi_watchdog +ffffffff8118bb40 T bwi_read_sprom +ffffffff8118bb70 T bwi_get_eaddr +ffffffff8118bc40 T bwi_updateslot +ffffffff8118bd70 T bwi_newstate +ffffffff8118bfe0 T bwi_newassoc +ffffffff8118c070 T bwi_node_alloc +ffffffff8118c090 T bwi_media_change +ffffffff8118c100 T bwi_detach +ffffffff8118c1f0 T bwi_stop +ffffffff8118c690 T bwi_mac_detach +ffffffff8118c6f0 T bwi_dma_free +ffffffff8118cb70 T bwi_dma_mbuf_destroy +ffffffff8118cce0 T bwi_tmplt_write_4 +ffffffff8118cd50 T bwi_hostflags_write +ffffffff8118ce10 T bwi_memobj_write_2 +ffffffff8118cea0 T bwi_hostflags_read +ffffffff8118cf70 T bwi_memobj_read_2 +ffffffff8118cfe0 T bwi_memobj_read_4 +ffffffff8118d100 T bwi_memobj_write_4 +ffffffff8118d1e0 T bwi_mac_reset +ffffffff8118d3b0 T bwi_phy_attach +ffffffff8118d510 T bwi_rf_attach +ffffffff8118d840 T bwi_mac_test +ffffffff8118daf0 T bwi_mac_get_property +ffffffff8118dc20 T bwi_rf_map_txpower +ffffffff8118e050 T bwi_regwin_disable +ffffffff8118e390 T bwi_mac_init +ffffffff8118eba0 T bwi_mac_setup_tpctl +ffffffff8118edd0 T bwi_rf_clear_state +ffffffff8118ef00 T bwi_phy_clear_state +ffffffff8118ef30 T bwi_regwin_is_enabled +ffffffff8118efe0 T bwi_bus_init +ffffffff8118f5e0 T bwi_phy_calibrate +ffffffff8118f680 T bwi_mac_fw_alloc +ffffffff8118fab0 T bwi_mac_fw_load +ffffffff8118fd90 T bwi_mac_gpio_init +ffffffff81190090 T bwi_mac_fw_init +ffffffff81190130 T bwi_rf_set_ant_mode +ffffffff81190b60 T bwi_mac_opmode_init +ffffffff81190d60 T bwi_mac_hostflags_init +ffffffff81190f50 T bwi_mac_bss_param_init +ffffffff811911a0 T bwi_regwin_enable +ffffffff81191350 T bwi_mac_set_tpctl_11bg +ffffffff811916c0 T bwi_phy_set_bbp_atten +ffffffff811917e0 T bwi_rf_write +ffffffff81191840 T bwi_rf_read +ffffffff811918c0 T bwi_rf_lo_adjust +ffffffff811919a0 T bwi_mac_dummy_xmit +ffffffff811921e0 T bwi_mac_init_tpctl_11bg +ffffffff811925f0 T bwi_phy_write +ffffffff81192650 T bwi_phy_read +ffffffff811926b0 T bwi_rf_clear_tssi +ffffffff81192820 T bwi_mac_fw_free +ffffffff81192880 T bwi_get_firmware +ffffffff81192a20 T bwi_fwimage_is_valid +ffffffff81192b30 T bwi_mac_gpio_fini +ffffffff81192d10 T bwi_mac_fw_load_iv +ffffffff81192ea0 T bwi_mac_set_retry_lim +ffffffff81192ff0 T bwi_mac_set_ackrates +ffffffff811931a0 T bwi_rate2modtype +ffffffff811931f0 T bwi_mac_start +ffffffff811932b0 T bwi_mac_stop +ffffffff811933b0 T bwi_mac_reset_hwkeys +ffffffff81193410 T bwi_mac_shutdown +ffffffff81193550 T bwi_mac_updateslot +ffffffff81193620 T bwi_mac_attach +ffffffff811937a0 T bwi_mac_balance_atten +ffffffff811938b0 T bwi_mac_adjust_tpctl +ffffffff81193b10 T bwi_mac_lock +ffffffff81193cd0 T bwi_mac_unlock +ffffffff81193e60 T bwi_mac_calibrate_txpower +ffffffff81194220 T bwi_rf_get_latest_tssi +ffffffff81194360 T bwi_rf_tssi2dbm +ffffffff811943c0 T bwi_mac_set_promisc +ffffffff81194460 T bwi_phy_init_11a +ffffffff81194490 T bwi_phy_init_11g +ffffffff81195020 T bwi_tbl_write_2 +ffffffff81195110 T bwi_tbl_write_4 +ffffffff81195250 T bwi_nrssi_write +ffffffff81195300 T bwi_nrssi_read +ffffffff811953d0 T bwi_phy_init_11b_rev5 +ffffffff811962e0 T bwi_phy_init_11b_rev6 +ffffffff81197950 T bwi_phy_config_11g +ffffffff81198940 T bwi_rf_get_gains +ffffffff8119a0c0 T bwi_rf_init +ffffffff8119a180 T bwi_rf_init_hw_nrssi_table +ffffffff8119a320 T bwi_phy_init_11b_rev2 +ffffffff8119a350 T bwi_phy_init_11b_rev4 +ffffffff8119ab20 T bwi_rf_set_chan +ffffffff8119add0 T bwi_rf_init_bcm2050 +ffffffff8119ceb0 T bwi_phy_config_agc +ffffffff8119e950 T bwi_set_gains +ffffffff8119edb0 T bwi_nrssi_11g +ffffffff8119ee40 T bwi_get_rf_lo +ffffffff8119eeb0 T bwi_rf_lo_isused +ffffffff8119ef30 T bwi_rf_on_11a +ffffffff8119ef60 T bwi_rf_off_11a +ffffffff8119f180 T bwi_rf_calc_rssi_bcm2060 +ffffffff8119f1c0 T bwi_rf_calc_rssi_bcm2050 +ffffffff8119f2e0 T bwi_rf_calc_rssi_bcm2053 +ffffffff8119f340 T bwi_rf_on_11bg +ffffffff8119f5e0 T bwi_rf_off_11bg +ffffffff8119f640 T bwi_rf_calc_nrssi_slope_11b +ffffffff811a0360 T bwi_rf_set_nrssi_thr_11b +ffffffff811a06f0 T bwi_rf_lo_update_11g +ffffffff811a1960 T bwi_rf_lo_update_11b +ffffffff811a2830 T bwi_rf_off_11g_rev5 +ffffffff811a2980 T bwi_rf_calc_nrssi_slope_11g +ffffffff811a43b0 T bwi_rf_set_nrssi_thr_11g +ffffffff811a45b0 T bwi_rf_workaround +ffffffff811a46e0 T bwi_rf_gain_max_reached +ffffffff811a4940 T bwi_rf_lo_find +ffffffff811a49f0 T bwi_rf_lo_write +ffffffff811a4a50 T bwi_bitswap4 +ffffffff811a4ab0 T bwi_phy812_value +ffffffff811a4d50 T bwi_rf_calibval +ffffffff811a4e10 T _bwi_adjust_devide +ffffffff811a4e50 T bwi_rf_calc_txpower +ffffffff811a4fa0 T bwi_rf_get_tp_ctrl2 +ffffffff811a50d0 T _bwi_rf_lo_update_11g +ffffffff811a5450 T bwi_rf_lo_devi_measure +ffffffff811a57a0 T bwi_rf_lo_measure_11g +ffffffff811a5a80 T bwi_rf_set_nrssi_ofs_11g +ffffffff811a7630 T bwi_rf_init_sw_nrssi_table +ffffffff811a76d0 T _nrssi_threshold +ffffffff811a7740 T bwi_rf_lo_measure_11b +ffffffff811a78f0 T bwi_setup_desc32 +ffffffff811a79b0 T bwi_power_off +ffffffff811a7a90 T bwi_regwin_select +ffffffff811a7b40 T bwi_regwin_info +ffffffff811a7bc0 T bwi_led_blink_next +ffffffff811a7c50 T bwi_led_blink_end +ffffffff811a7c80 T bwi_led_onoff +ffffffff811a7cd0 T bwi_led_newstate +ffffffff811a8040 T bwi_led_blink_start +ffffffff811a8110 T bwi_get_clock_freq +ffffffff811a8290 T bwi_init +ffffffff811a82d0 T bwi_set_bssid +ffffffff811a8500 T bwi_set_addr_filter +ffffffff811a85b0 T bwi_set_chan +ffffffff811a8620 T bwi_encap +ffffffff811a8d00 T bwi_newstate_begin +ffffffff811a8d70 T bwi_iter_func +ffffffff811a8d90 T bwi_newbuf30 +ffffffff811a8f60 T bwi_init_tx_ring32 +ffffffff811a9090 T bwi_free_tx_ring32 +ffffffff811a92d0 T bwi_init_rx_ring32 +ffffffff811a9440 T bwi_free_rx_ring32 +ffffffff811a94e0 T bwi_newbuf +ffffffff811a96d0 T bwi_setup_rx_desc32 +ffffffff811a9790 T bwi_setup_tx_desc32 +ffffffff811a9850 T bwi_rxeof32 +ffffffff811a9900 T bwi_start_tx32 +ffffffff811a9960 T bwi_init_txstats32 +ffffffff811a9b00 T bwi_free_txstats32 +ffffffff811a9b20 T bwi_txeof_status32 +ffffffff811a9c60 T bwi_dma_ring_alloc +ffffffff811a9e00 T bwi_dma_txstats_alloc +ffffffff811aa120 T bwi_dma_mbuf_create30 +ffffffff811aab60 T bwi_dma_mbuf_create +ffffffff811ab060 T bwi_dma_txstats_free +ffffffff811ab120 T bwi_init_rxdesc_ring32 +ffffffff811ab1e0 T bwi_rxeof +ffffffff811ab5f0 T bwi_calc_rssi +ffffffff811ab640 T bwi_plcp2rate +ffffffff811ab660 T bwi_reset_rx_ring32 +ffffffff811ab8f0 T bwi_ofdm_plcp_header +ffffffff811ab950 T bwi_ds_plcp_header +ffffffff811ab9e0 T bwi_plcp_header +ffffffff811abad0 T bwi_ack_rate +ffffffff811abc20 T bwi_txtime +ffffffff811abcd0 T bwi_txeof_status +ffffffff811abd90 T _bwi_txeof +ffffffff811abf10 T bwi_regwin_name +ffffffff811abfa0 T bwi_regwin_disable_bits +ffffffff811ad000 T iosf_mbi_attach +ffffffff811ad050 T iosf_mbi_read +ffffffff811ad110 T iosf_mbi_write +ffffffff811ad1d0 T iosf_mbi_modify +ffffffff811ad2b0 T iosf_mbi_available +ffffffff811ad2f0 T iosf_mbi_punit_acquire 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uhci_device_intr_transfer +ffffffff811af6f0 T uhci_device_intr_start +ffffffff811af870 T uhci_device_intr_abort +ffffffff811af8c0 T uhci_device_intr_close +ffffffff811afae0 T uhci_device_clear_toggle +ffffffff811afb10 T uhci_device_intr_done +ffffffff811afe60 T uhci_device_bulk_transfer +ffffffff811afec0 T uhci_device_bulk_start +ffffffff811b00c0 T uhci_device_bulk_abort +ffffffff811b00e0 T uhci_device_bulk_close +ffffffff811b0130 T uhci_device_bulk_done +ffffffff811b0310 T uhci_device_isoc_transfer +ffffffff811b0380 T uhci_device_isoc_start +ffffffff811b04e0 T uhci_device_isoc_abort +ffffffff811b05a0 T uhci_device_isoc_close +ffffffff811b0720 T uhci_device_isoc_done +ffffffff811b07c0 T uhci_globalreset +ffffffff811b0830 T uhci_init +ffffffff811b12d0 T uhci_reset +ffffffff811b1390 T uhci_alloc_std +ffffffff811b14a0 T uhci_alloc_sqh +ffffffff811b15a0 T uhci_poll_hub +ffffffff811b16f0 T uhci_run +ffffffff811b1830 T uhci_activate +ffffffff811b1b30 T uhci_detach +ffffffff811b1ba0 T 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ohci_device_intr_done +ffffffff811b6170 T ohci_device_bulk_transfer +ffffffff811b61d0 T ohci_device_bulk_start +ffffffff811b6370 T ohci_device_bulk_abort +ffffffff811b6390 T ohci_device_bulk_close +ffffffff811b6410 T ohci_device_bulk_done +ffffffff811b6440 T ohci_device_isoc_transfer +ffffffff811b64d0 T ohci_device_isoc_start +ffffffff811b6540 T ohci_device_isoc_abort +ffffffff811b6630 T ohci_device_isoc_close +ffffffff811b6710 T ohci_device_isoc_done +ffffffff811b6740 T ohci_activate +ffffffff811b6bb0 T ohci_detach +ffffffff811b6c20 T ohci_alloc_sed +ffffffff811b6d30 T ohci_free_sed +ffffffff811b6d70 T ohci_alloc_std +ffffffff811b6ef0 T ohci_hash_add_td +ffffffff811b6f80 T ohci_free_std +ffffffff811b6ff0 T ohci_alloc_std_chain +ffffffff811b7240 T ohci_alloc_sitd +ffffffff811b73d0 T ohci_hash_add_itd +ffffffff811b7460 T ohci_free_sitd +ffffffff811b7520 T ohci_hash_rem_itd +ffffffff811b75a0 T ohci_checkrev +ffffffff811b7680 T ohci_handover +ffffffff811b77f0 T ohci_init +ffffffff811b8600 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ieee80211_eapol_key_encrypt +ffffffff81400fd0 T ieee80211_eapol_key_decrypt +ffffffff814010e0 T ieee80211_pmksa_add +ffffffff81401230 T ieee80211_pmksa_find +ffffffff81402000 T ieee80211_bip_set_key +ffffffff81402080 T ieee80211_bip_delete_key +ffffffff814020f0 T ieee80211_bip_encap +ffffffff814022f0 T ieee80211_bip_decap +ffffffff81403000 T ieee80211_ccmp_set_key +ffffffff81403080 T ieee80211_ccmp_delete_key +ffffffff814030f0 T ieee80211_ccmp_encrypt +ffffffff814035b0 t ieee80211_ccmp_phase1 +ffffffff81403940 T ieee80211_ccmp_get_pn +ffffffff81403a50 T ieee80211_ccmp_decrypt +ffffffff81404000 T ieee80211_tkip_set_key +ffffffff814040a0 T ieee80211_tkip_delete_key +ffffffff81404110 T ieee80211_tkip_mic +ffffffff81404290 T ieee80211_tkip_encrypt +ffffffff814046e0 t Phase1 +ffffffff81404870 t Phase2 +ffffffff81404b00 T ieee80211_tkip_get_tsc +ffffffff81404c10 T ieee80211_tkip_decrypt +ffffffff81405110 T ieee80211_michael_mic_failure +ffffffff814052a0 T ieee80211_michael_mic_failure_timeout +ffffffff814052d0 t ieee80211_tkip_deauth +ffffffff81406000 T ieee80211_wep_set_key +ffffffff81406060 T ieee80211_wep_delete_key +ffffffff814060d0 T ieee80211_wep_encrypt +ffffffff81406470 T ieee80211_wep_decrypt +ffffffff81407000 T ieee80211_get_hdrlen +ffffffff81407090 T ieee80211_input_hwdecrypt +ffffffff81407260 T ieee80211_inputm +ffffffff81407d50 T ieee80211_input_ba +ffffffff81408040 T ieee80211_amsdu_decap +ffffffff81408330 T ieee80211_decap +ffffffff814084b0 T ieee80211_recv_pspoll +ffffffff814085d0 T ieee80211_recv_bar +ffffffff814086c0 T ieee80211_input +ffffffff81408730 T ieee80211_ba_move_window +ffffffff81408880 T ieee80211_input_ba_seq +ffffffff81408a30 T ieee80211_input_ba_flush +ffffffff81408b60 T ieee80211_input_ba_gap_skip +ffffffff81408c00 T ieee80211_input_ba_gap_timeout +ffffffff81408d20 T ieee80211_enqueue_data +ffffffff81408f00 T ieee80211_amsdu_decap_validate +ffffffff81408fc0 T ieee80211_parse_edca_params_body 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ieee80211_recv_sa_query_req +ffffffff8140c320 T ieee80211_recv_sa_query_resp +ffffffff8140c390 T ieee80211_recv_action +ffffffff8140c4b0 T ieee80211_recv_mgmt +ffffffff8140c610 T ieee80211_bar_tid +ffffffff8140d000 T ieee80211_node2req +ffffffff8140d370 T ieee80211_req2node +ffffffff8140d480 T ieee80211_disable_wep +ffffffff8140d590 T ieee80211_disable_rsn +ffffffff8140d5f0 T ieee80211_ioctl +ffffffff8140f000 T ieee80211_inact_timeout +ffffffff8140f0a0 T ieee80211_node_cache_timeout +ffffffff8140f0e0 T ieee80211_clean_nodes +ffffffff8140f400 T ieee80211_print_ess +ffffffff8140f5f0 T ieee80211_print_ess_list +ffffffff8140f660 T ieee80211_get_ess +ffffffff8140f6f0 T ieee80211_del_ess +ffffffff8140f850 T ieee80211_add_ess +ffffffff8140fed0 T ieee80211_ess_adjust_rssi +ffffffff8140ff40 T ieee80211_ess_calculate_score +ffffffff814100a0 T ieee80211_ess_is_better +ffffffff814101f0 T ieee80211_match_ess +ffffffff814102e0 T ieee80211_switch_ess +ffffffff81410550 T ieee80211_set_ess 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+ffffffff81412700 T ieee80211_node_switch_bss +ffffffff814129d0 T ieee80211_node_tx_flushed +ffffffff81412b50 T ieee80211_find_node +ffffffff81412bf0 T ieee80211_node_join_bss +ffffffff81412dd0 T ieee80211_choose_rsnparams +ffffffff81412f00 T ieee80211_node_choose_bss +ffffffff814130f0 T ieee80211_free_node +ffffffff814131f0 T ieee80211_node_cmp +ffffffff81413210 T ieee80211_clean_inactive_nodes +ffffffff814132d0 T ieee80211_get_rate +ffffffff81413330 T ieee80211_ba_del +ffffffff81413420 T ieee80211_node_set_timeouts +ffffffff81413520 T ieee80211_node_addba_request_ac_be_to +ffffffff81413540 T ieee80211_node_addba_request_ac_bk_to +ffffffff81413570 T ieee80211_node_addba_request_ac_vi_to +ffffffff814135a0 T ieee80211_node_addba_request_ac_vo_to +ffffffff814135d0 T ieee80211_setup_node +ffffffff81413760 T ieee80211_alloc_node +ffffffff81413800 T ieee80211_dup_bss +ffffffff814138d0 T ieee80211_find_txnode +ffffffff81413ae0 T ieee80211_find_rxnode +ffffffff81413df0 T ieee80211_node_tx_ba_clear +ffffffff81413e60 T ieee80211_release_node +ffffffff81413ef0 T ieee80211_clean_cached +ffffffff81413f80 T ieee80211_node_leave +ffffffff814141f0 T ieee80211_setup_htcaps +ffffffff814142a0 T ieee80211_clear_htcaps +ffffffff81414320 T ieee80211_setup_htop +ffffffff814143a0 T ieee80211_setup_vhtcaps +ffffffff81414420 T ieee80211_setup_vhtop +ffffffff81414480 T ieee80211_clear_vhtcaps +ffffffff814144d0 T ieee80211_setup_rates +ffffffff81414590 T ieee80211_node_trigger_addba_req +ffffffff814145f0 T ieee80211_node_addba_request +ffffffff81414620 T ieee80211_iserp_sta +ffffffff814147d0 T ieee80211_needs_auth +ffffffff81414800 T ieee80211_node_join_ht +ffffffff81414850 T ieee80211_node_join_rsn +ffffffff81414960 T ieee80211_count_longslotsta +ffffffff814149b0 T ieee80211_count_nonerpsta +ffffffff81414a10 T ieee80211_count_pssta +ffffffff81414a60 T ieee80211_count_rekeysta +ffffffff81414ab0 T ieee80211_node_join_11g +ffffffff81414c40 T ieee80211_node_join +ffffffff81414f40 T ieee80211_node_leave_ht +ffffffff81415070 T ieee80211_node_leave_vht +ffffffff814150c0 T ieee80211_node_leave_rsn +ffffffff81415200 T ieee80211_node_leave_11g +ffffffff81415520 T ieee80211_node_leave_pwrsave +ffffffff814156e0 T ieee80211_ibss_merge +ffffffff814159e0 T ieee80211_notify_dtim +ffffffff81415ac0 T ieee80211_ess_cmp +ffffffff81415ae0 t ieee80211_tree_RBT_COMPARE +ffffffff81415b00 t ieee80211_ess_tree_RBT_COMPARE +ffffffff81416000 T ieee80211_output +ffffffff814160f0 T ieee80211_action_name +ffffffff81416140 T ieee80211_mgmt_output +ffffffff814163a0 T ieee80211_pwrsave +ffffffff814164d0 T ieee80211_up_to_ac +ffffffff81416590 T ieee80211_classify +ffffffff81416680 T ieee80211_can_use_ampdu +ffffffff814166e0 T ieee80211_tx_compressed_bar +ffffffff81416820 T ieee80211_get_compressed_bar +ffffffff814168f0 T ieee80211_encap +ffffffff81416d70 T ieee80211_add_capinfo +ffffffff81416e00 T ieee80211_add_ssid +ffffffff81416e60 T ieee80211_add_rates +ffffffff81416ed0 T ieee80211_add_ds_params +ffffffff81416f30 T ieee80211_add_tim +ffffffff81417090 T ieee80211_add_ibss_params +ffffffff814170c0 T ieee80211_add_edca_params +ffffffff81417240 T ieee80211_add_erp +ffffffff814172e0 T ieee80211_add_qos_capability +ffffffff81417320 T ieee80211_add_wme_info +ffffffff81417360 T ieee80211_add_wme_param +ffffffff814174f0 T ieee80211_add_rsn_body +ffffffff814177d0 T ieee80211_add_rsn +ffffffff81417830 T ieee80211_add_wpa +ffffffff814178a0 T ieee80211_add_xrates +ffffffff81417930 T ieee80211_add_htcaps +ffffffff81417a00 T ieee80211_add_htop +ffffffff81417ad0 T ieee80211_add_vhtcaps +ffffffff81417b70 T ieee80211_add_tie +ffffffff81417bc0 T ieee80211_getmgmt +ffffffff81417c80 T ieee80211_get_probe_req +ffffffff81418030 T ieee80211_get_probe_resp +ffffffff81418590 T ieee80211_get_auth +ffffffff81418620 T ieee80211_get_deauth +ffffffff814186a0 T ieee80211_get_assoc_req +ffffffff81418ba0 T ieee80211_get_assoc_resp +ffffffff81418f60 T ieee80211_get_disassoc +ffffffff81418fe0 T ieee80211_get_addba_req +ffffffff814190d0 T ieee80211_output_ba_move_window +ffffffff814191c0 T ieee80211_output_ba_move_window_to_first_unacked +ffffffff81419350 T ieee80211_output_ba_record_ack +ffffffff814194a0 T ieee80211_get_addba_resp +ffffffff814195a0 T ieee80211_get_delba +ffffffff81419640 T ieee80211_get_sa_query +ffffffff814196d0 T ieee80211_get_action +ffffffff81419960 T ieee80211_send_mgmt +ffffffff81419d00 T ieee80211_get_rts +ffffffff81419d90 T ieee80211_get_cts_to_self +ffffffff81419e20 T ieee80211_beacon_alloc +ffffffff8141b000 T ieee80211_eapol_key_input +ffffffff8141b210 T ieee80211_recv_eapol_key_req +ffffffff8141b370 T ieee80211_recv_4way_msg3 +ffffffff8141bd10 T ieee80211_recv_4way_msg2or4 +ffffffff8141be50 T ieee80211_recv_4way_msg1 +ffffffff8141c130 T ieee80211_recv_wpa_group_msg1 +ffffffff8141c460 T ieee80211_recv_rsn_group_msg1 +ffffffff8141c990 T ieee80211_recv_group_msg2 +ffffffff8141cae0 T ieee80211_recv_4way_msg2 +ffffffff8141ccf0 T ieee80211_must_update_group_key +ffffffff8141cd50 T ieee80211_recv_4way_msg4 +ffffffff8141d000 T ieee80211_send_eapol_key +ffffffff8141d220 T ieee80211_eapol_timeout +ffffffff8141d2a0 T ieee80211_send_4way_msg1 +ffffffff8141d560 T ieee80211_send_4way_msg3 +ffffffff8141dab0 T ieee80211_send_group_msg1 +ffffffff8141dfd0 T ieee80211_add_gtk_kde +ffffffff8141e090 T ieee80211_add_pmkid_kde +ffffffff8141e0e0 T ieee80211_add_igtk_kde +ffffffff8141e1b0 T ieee80211_get_eapol_key +ffffffff8141e270 T ieee80211_send_4way_msg2 +ffffffff8141e490 T ieee80211_send_4way_msg4 +ffffffff8141e670 T ieee80211_send_group_msg2 +ffffffff8141e850 T ieee80211_send_eapol_key_req +ffffffff8141f000 T ieee80211_proto_attach +ffffffff8141f0b0 T ieee80211_newstate +ffffffff8141fd80 T ieee80211_proto_detach +ffffffff8141fdc0 T ieee80211_print_essid +ffffffff8141ff40 T ieee80211_fix_rate +ffffffff81420380 T ieee80211_reset_erp +ffffffff814204a0 T ieee80211_set_shortslottime +ffffffff81420500 T ieee80211_keyrun +ffffffff81420670 T ieee80211_setkeys +ffffffff814208b0 t ieee80211_node_gtk_rekey +ffffffff81420910 T ieee80211_setkeysdone +ffffffff81420a10 T ieee80211_gtk_rekey_timeout +ffffffff81420a60 T ieee80211_sa_query_timeout +ffffffff81420b30 T ieee80211_sa_query_request +ffffffff81420bb0 T ieee80211_ht_negotiate +ffffffff81420d80 T ieee80211_vht_negotiate +ffffffff81420f90 T ieee80211_tx_ba_timeout +ffffffff814210b0 T ieee80211_delba_request +ffffffff81421230 T ieee80211_rx_ba_timeout +ffffffff814212c0 T ieee80211_addba_request +ffffffff81421490 T ieee80211_auth_open_confirm +ffffffff81421540 T ieee80211_try_another_bss +ffffffff81421650 T ieee80211_auth_open +ffffffff81421950 T ieee80211_set_beacon_miss_threshold +ffffffff814219e0 T ieee80211_stop_ampdu_tx +ffffffff81421af0 T ieee80211_check_wpa_supplicant_failure +ffffffff81421b70 T ieee80211_set_link_state +ffffffff81421c00 T ieee80211_rtm_80211info_task +ffffffff81422000 T ieee80211_ra_get_ht_rateset +ffffffff81422080 T ieee80211_ra_use_ht_sgi +ffffffff81422100 T ieee80211_ra_get_txrate +ffffffff81422190 T ieee80211_ra_next_lower_intra_rate +ffffffff81422330 T ieee80211_ra_next_intra_rate +ffffffff814224c0 T ieee80211_ra_next_rateset +ffffffff814226e0 T ieee80211_ra_best_mcs_in_rateset +ffffffff81422760 T ieee80211_ra_probe_next_rateset +ffffffff81422a20 T ieee80211_ra_next_mcs +ffffffff81422a70 T ieee80211_ra_probe_clear +ffffffff81422ab0 T ieee80211_ra_probe_done +ffffffff81422af0 T ieee80211_ra_intra_mode_ra_finished +ffffffff81422e60 T ieee80211_ra_trigger_next_rateset +ffffffff81422ed0 T ieee80211_ra_inter_mode_ra_finished +ffffffff81422f00 T ieee80211_ra_best_rate +ffffffff81422fa0 T ieee80211_ra_probe_next_rate +ffffffff81423040 T ieee80211_ra_valid_tx_mcs +ffffffff814230c0 T ieee80211_ra_valid_rates +ffffffff81423190 T ieee80211_ra_probe_valid +ffffffff814231e0 T ieee80211_ra_add_stats_ht +ffffffff81423480 T ieee80211_ra_choose +ffffffff814238c0 T ieee80211_ra_node_init +ffffffff81424000 T ieee80211_ra_vht_get_rateset +ffffffff814240a0 T ieee80211_ra_vht_use_sgi +ffffffff814241b0 T ieee80211_ra_vht_get_txrate +ffffffff81424250 T ieee80211_ra_vht_next_lower_intra_rate +ffffffff81424290 T ieee80211_ra_vht_get_max_mcs +ffffffff81424310 T ieee80211_ra_vht_next_intra_rate +ffffffff81424400 T ieee80211_ra_vht_next_rateset +ffffffff81424550 T ieee80211_ra_vht_best_mcs_in_rateset +ffffffff814245f0 T ieee80211_ra_vht_probe_next_rateset +ffffffff814248e0 T ieee80211_ra_vht_next_mcs +ffffffff81424970 T ieee80211_ra_vht_probe_clear +ffffffff814249a0 T ieee80211_ra_vht_probe_done +ffffffff814249f0 T ieee80211_ra_vht_intra_mode_ra_finished +ffffffff81424dc0 T ieee80211_ra_vht_trigger_next_rateset +ffffffff81424e30 T ieee80211_ra_vht_inter_mode_ra_finished +ffffffff81424e60 T ieee80211_ra_vht_best_rate +ffffffff81425120 T ieee80211_ra_vht_probe_next_rate +ffffffff814251d0 T ieee80211_ra_vht_init_valid_rates +ffffffff814253d0 T ieee80211_ra_vht_probe_valid +ffffffff81425420 T ieee80211_ra_vht_add_stats +ffffffff81425710 T ieee80211_ra_vht_choose +ffffffff81425b40 T ieee80211_ra_vht_node_init +ffffffff81426000 T ieee80211_rssadapt_choose +ffffffff814260d0 T ieee80211_rssadapt_updatestats +ffffffff81426150 T ieee80211_rssadapt_input +ffffffff81426190 T ieee80211_rssadapt_lower_rate +ffffffff81426210 T ieee80211_rssadapt_raise_rate +ffffffff81427000 T bsearch +ffffffff814270b0 T ieee80211_regdomain_compare_cn +ffffffff814270d0 T ieee80211_regdomain_compare_rn +ffffffff814270f0 T ieee80211_name2countrycode +ffffffff81427190 T ieee80211_name2regdomain +ffffffff81427230 T ieee80211_countrycode2name +ffffffff814272c0 T ieee80211_regdomain2name +ffffffff81427340 T ieee80211_regdomain2flag +ffffffff81427400 T ieee80211_countrycode2regdomain +ffffffff81428000 T arptimer +ffffffff81428080 T arptfree +ffffffff81428160 T arpinit +ffffffff814281d0 T arp_rtrequest +ffffffff81428610 T arprequest +ffffffff81428750 T arpinvalidate +ffffffff814287b0 T arpreply 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in_len2mask +ffffffff8142c260 T in_nam2sin +ffffffff8142c2c0 T in_sa2sin +ffffffff8142c300 T in_control +ffffffff8142c340 T in_ioctl +ffffffff8142c6b0 T in_ioctl_get +ffffffff8142c820 T in_ioctl_set_ifaddr +ffffffff8142ca10 T in_ioctl_change_ifaddr +ffffffff8142ce20 T in_scrubhost +ffffffff8142ce50 T in_addhost +ffffffff8142ce80 T in_ifscrub +ffffffff8142cf20 T in_ifinit +ffffffff8142d1c0 T in_purgeaddr +ffffffff8142d2c0 T in_remove_prefix +ffffffff8142d330 T in_insert_prefix +ffffffff8142d3b0 T in_addmulti +ffffffff8142d550 T in_delmulti +ffffffff8142d6a0 T in_broadcast +ffffffff8142d730 T in_hasmulti +ffffffff8142d7d0 T in_ifdetach +ffffffff8142d860 T in_prefixlen2mask +ffffffff8142e000 T in_init +ffffffff8142e060 T in_pcbhash +ffffffff8142e180 T in_pcblhash +ffffffff8142e240 T in_pcbinit +ffffffff8142e2f0 T in_baddynamic +ffffffff8142e360 T in_rootonly +ffffffff8142e3e0 T in_pcballoc +ffffffff8142e560 T in_pcbresize +ffffffff8142e740 T in_pcbhash_insert +ffffffff8142e920 T in_pcbbind +ffffffff8142ec20 T in_pcbaddrisavail +ffffffff8142ee10 T in_pcbpickport +ffffffff8142f000 T in_pcbrehash +ffffffff8142f090 T in_pcblookup_local +ffffffff8142f340 T in_pcbunref +ffffffff8142f430 T in_pcbconnect +ffffffff8142f6a0 T in_pcbselsrc +ffffffff8142f8d0 T in_pcblookup +ffffffff8142f9d0 T in_pcbdisconnect +ffffffff8142fb10 T in_pcbdetach +ffffffff8142fc60 T in_pcbref +ffffffff8142fcb0 T in_setsockaddr +ffffffff8142fd10 T in_setpeeraddr +ffffffff8142fd80 T in_sockaddr +ffffffff8142fde0 T in_peeraddr +ffffffff8142fe60 T in_pcbnotifyall +ffffffff8142ffd0 T in_losing +ffffffff81430060 T in_rtchange +ffffffff814300b0 T in_pcbrtentry +ffffffff81430200 T in_pcbhash_lookup +ffffffff814303b0 T in_pcblookup_listen +ffffffff81431000 T inet_nat64_mask +ffffffff81431060 T inet_nat64 +ffffffff814311f0 T inet_nat64_inet +ffffffff814312b0 T inet_nat64_inet6 +ffffffff81431380 T inet_nat46 +ffffffff81431430 T inet_nat46_inet +ffffffff81431490 T inet_nat46_inet6 +ffffffff81432000 T inet_ntop +ffffffff814320d0 t inet_ntop6 +ffffffff814325c0 T sockaddr_ntop +ffffffff81433000 T divert_attach +ffffffff81433090 T divert_detach +ffffffff814330e0 T divert_lock +ffffffff81433140 T divert_unlock +ffffffff814331a0 T divert_bind +ffffffff814331e0 T divert_shutdown +ffffffff81433220 T divert_send +ffffffff81433260 T divert_init +ffffffff814332b0 T divert_output +ffffffff81433570 T divert_packet +ffffffff81433820 T divert_sysctl_divstat +ffffffff814338f0 T divert_sysctl +ffffffff81434000 T icmp_init +ffffffff81434080 T icmp_mtudisc_timeout +ffffffff81434180 T icmp_do_error +ffffffff81434500 T icmp_ratelimit +ffffffff81434560 T icmp_error +ffffffff814345e0 T icmp_reflect +ffffffff81434930 T icmp_send +ffffffff81434a10 T icmp_input +ffffffff81434ab0 T icmp_input_if +ffffffff81435420 T iptime +ffffffff814354c0 T icmp_sysctl +ffffffff81435670 T icmp_sysctl_icmpstat +ffffffff81435760 T icmp_mtudisc_clone +ffffffff81435910 T icmp_mtudisc +ffffffff81435ae0 T icmp_do_exthdr +ffffffff81436000 T ip_randomid +ffffffff81437000 T ip_init +ffffffff81437280 T ip_ours +ffffffff81437300 T ip_fragcheck +ffffffff81437650 T ipintr +ffffffff81437700 T ip_deliver +ffffffff81437a80 T ipv4_input +ffffffff81437b00 T ip_input_if +ffffffff81437fc0 T ipv4_check +ffffffff814382e0 T ip_dooptions +ffffffff814388e0 T in_ouraddr +ffffffff81438c40 T ip_forward +ffffffff814390f0 T ip_flush +ffffffff81439200 T ip_reass +ffffffff814397c0 T ip_freef +ffffffff814398c0 T ip_slowtimo +ffffffff81439950 T save_rte +ffffffff81439a30 T ip_srcroute +ffffffff81439b90 T ip_stripoptions +ffffffff81439c30 T ip_sysctl +ffffffff81439f80 T ip_sysctl_ipstat +ffffffff8143a1f0 T ip_savecontrol +ffffffff8143a420 T ip_send_do_dispatch +ffffffff8143a500 T ip_send +ffffffff8143a530 T ip_send_raw +ffffffff8143a560 t ip_send_dispatch +ffffffff8143a580 t ip_sendraw_dispatch +ffffffff8143b000 T mfc_find +ffffffff8143b0d0 T ip_mrouter_set +ffffffff8143b240 T ip_mrouter_init +ffffffff8143b2c0 T ip_mrouter_done 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ip_output_ipsec_lookup +ffffffff8143eed0 T in_proto_cksum_out +ffffffff8143f100 T ip_mloopback +ffffffff8143f1b0 T ip_output_ipsec_send +ffffffff8143f410 T in_ifcap_cksum +ffffffff8143f470 T ip_fragment +ffffffff8143f9b0 T ip_output_ipsec_pmtu_update +ffffffff8143fab0 T ip_optcopy +ffffffff8143fbe0 T ip_ctloutput +ffffffff81440490 T ip_pcbopts +ffffffff814406d0 T ip_setmoptions +ffffffff81440c50 T ip_getmoptions +ffffffff81440db0 T ip_multicast_if +ffffffff81440e90 T ip_freemoptions +ffffffff81440f20 T in_delayed_cksum +ffffffff81441000 T rip_attach +ffffffff814410f0 T rip_detach +ffffffff81441170 T rip_lock +ffffffff814411d0 T rip_unlock +ffffffff81441230 T rip_bind +ffffffff814412f0 T rip_connect +ffffffff81441370 T rip_disconnect +ffffffff814413e0 T rip_shutdown +ffffffff81441420 T rip_send +ffffffff81441500 T rip_init +ffffffff81441520 T rip_input +ffffffff814418a0 T rip_output +ffffffff81441a90 T rip_chkhdr +ffffffff81441b90 T rip_ctloutput +ffffffff81442000 T tcp_trace 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tcp_signature +ffffffff8144f000 T tcp_timer_rexmt +ffffffff8144f510 T tcp_timer_persist +ffffffff8144f6d0 T tcp_timer_keep +ffffffff8144f900 T tcp_timer_2msl +ffffffff8144fa50 T tcp_timer_reaper +ffffffff8144fac0 T tcp_timer_delack +ffffffff8144fb80 T tcp_timer_init +ffffffff8144fc20 T tcp_slowtimo +ffffffff8144fc60 T tcp_canceltimers +ffffffff8144fcf0 T tcp_timer_freesack +ffffffff81450000 T tcp_attach +ffffffff814501c0 T tcp_detach +ffffffff81450280 T tcp_bind +ffffffff81450350 T tcp_listen +ffffffff81450440 T tcp_connect +ffffffff814506d0 T tcp_accept +ffffffff814507a0 T tcp_disconnect +ffffffff81450860 T tcp_shutdown +ffffffff814509f0 T tcp_rcvd +ffffffff81450aa0 T tcp_send +ffffffff81450bb0 T tcp_abort +ffffffff81450c60 T tcp_sense +ffffffff81450d10 T tcp_rcvoob +ffffffff81450e20 T tcp_sendoob +ffffffff81450f90 T tcp_sockaddr +ffffffff81451060 T tcp_peeraddr +ffffffff81451130 T tcp_fill_info +ffffffff814514f0 T tcp_ctloutput +ffffffff81451840 T tcp_dodisconnect +ffffffff81451990 T tcp_usrclosed +ffffffff81451a60 T tcp_ident +ffffffff81451de0 T tcp_sysctl_tcpstat +ffffffff81452400 T tcp_sysctl +ffffffff81452920 T tcp_update_sndspace +ffffffff81452a80 T tcp_update_rcvspace +ffffffff81453000 T udp_attach +ffffffff814530f0 T udp_detach +ffffffff81453140 T udp_lock +ffffffff814531a0 T udp_unlock +ffffffff81453200 T udp_bind +ffffffff81453240 T udp_connect +ffffffff814532f0 T udp_disconnect +ffffffff814533a0 T udp_shutdown +ffffffff814533e0 T udp_send +ffffffff814534f0 T udp_init +ffffffff81453520 T udp_input +ffffffff81454300 T udp_sbappend +ffffffff81454570 T udp_notify +ffffffff814545b0 T udp6_ctlinput +ffffffff814548f0 T udp_ctlinput +ffffffff81454a60 T udp_output +ffffffff81454ec0 T udp_sysctl +ffffffff81455160 T udp_sysctl_udpstat +ffffffff81456000 T gre_send +ffffffff81457000 T ipsp_ids_gc +ffffffff81457120 T ipsp_init +ffffffff81457200 T tdb_hash +ffffffff81457320 T reserve_spi +ffffffff814575a0 T tdb_alloc +ffffffff814576b0 T gettdb_dir +ffffffff814577f0 T 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qle_free_ccbs +ffffffff8170e1d0 T qle_classify_port +ffffffff8170e2c0 T qle_get_loop_id +ffffffff8170e330 T qle_get_port_db +ffffffff8170e410 T qle_get_port_name_list +ffffffff8170e670 T qle_add_loop_port +ffffffff8170e8f0 T qle_add_fabric_port +ffffffff8170eab0 T qle_add_logged_in_port +ffffffff8170ed00 T qle_handle_resp +ffffffff8170f0c0 T qle_dump_iocb +ffffffff8170f0f0 T qle_async +ffffffff8170f310 T qle_read +ffffffff8170f360 T qle_write +ffffffff8170f3b0 T qle_clear_isr +ffffffff8170f400 T qle_put_marker +ffffffff8170f440 T qle_put_cmd +ffffffff8170f7a0 T qle_write_mbox +ffffffff8170f7f0 T qle_set_ints +ffffffff8170f850 T qle_update_done +ffffffff8170f880 T qle_update_cancel +ffffffff8170f8c0 T qle_update_start +ffffffff8170f910 T qle_update_defer +ffffffff8170f960 T qle_clear_port_lists +ffffffff8170fac0 T qle_update_topology +ffffffff8170fbb0 T qle_update_fabric +ffffffff8170fcc0 T qle_ct_pass_through +ffffffff8170ffb0 T qle_sge +ffffffff8170fff0 T qle_next_fabric_port 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mpii_push_replies +ffffffff81714110 T mpii_init_queues +ffffffff81714190 T mpii_board_info +ffffffff81714390 T mpii_portfacts +ffffffff817144c0 T mpii_target_map +ffffffff817145b0 T mpii_cfg_coalescing +ffffffff81714680 T mpii_eventnotify +ffffffff81714850 T mpii_portenable +ffffffff81714940 T mpii_intr +ffffffff81714c70 T mpii_ioctl +ffffffff81714d80 T mpii_create_sensors +ffffffff81714f10 T mpii_dmamem_free +ffffffff81714fa0 T mpii_get_ccb +ffffffff81715030 T mpii_reply +ffffffff81715100 T mpii_event_process +ffffffff817153f0 T mpii_load_xs_sas3 +ffffffff817155a0 T mpii_load_xs +ffffffff817157a0 T mpii_req_cfg_header +ffffffff81715960 T mpii_req_cfg_page +ffffffff81715b90 T mpii_wait_ne +ffffffff81715c40 T mpii_reset_soft +ffffffff81715d70 T mpii_reset_hard +ffffffff81715fa0 T mpii_handshake_send +ffffffff81716200 T mpii_handshake_recv_dword +ffffffff81716370 T mpii_handshake_recv +ffffffff81716540 T mpii_empty_done +ffffffff81716570 T mpii_push_reply +ffffffff817165f0 T mpii_poll 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aq1_fw_reboot +ffffffff8171bd40 T aq2_fw_reboot +ffffffff8171c250 T aq_hw_reset +ffffffff8171c3b0 T aq_init_rss +ffffffff8171c720 T aq_hw_init +ffffffff8171ca30 T aq_ifmedia_change +ffffffff8171cb10 T aq_ifmedia_status +ffffffff8171cc10 T aq_ioctl +ffffffff8171ce50 T aq_start +ffffffff8171d190 T aq_watchdog +ffffffff8171d1c0 T aq_set_linkmode +ffffffff8171d1f0 T aq_refill +ffffffff8171d260 T aq_intr_queue +ffffffff8171d340 T aq_enable_intr +ffffffff8171d450 T aq1_fw_read_version +ffffffff8171d4f0 T aq1_mac_soft_reset +ffffffff8171d520 T aq1_fw_version_init +ffffffff8171d6a0 T aq1_hw_init_ucp +ffffffff8171d830 T aq1_mac_soft_reset_rbl +ffffffff8171dad0 T aq1_global_software_reset +ffffffff8171dbf0 T aq1_mac_soft_reset_flb +ffffffff8171dfb0 T aq2_interface_buffer_read +ffffffff8171e0f0 T aq1_fw_downld_dwords +ffffffff8171e410 T aq_hw_l3_filter_set +ffffffff8171e620 T aq_hw_init_tx_path +ffffffff8171e890 T aq_hw_init_rx_path +ffffffff8171f090 T aq_set_mac_addr +ffffffff8171f2b0 T aq_hw_qos_set +ffffffff8171f8d0 T aq2_filter_art_set +ffffffff8171fa80 T aq_get_linkmode +ffffffff8171faf0 T aq_txring_reset +ffffffff8171fea0 T aq_rxring_reset +ffffffff817203b0 T aq_rx_fill +ffffffff817205b0 T aq_rxeof +ffffffff81720930 T aq_txeof +ffffffff81720b00 T aq_update_link_status +ffffffff81720ba0 T aq_free_slots +ffffffff81720c50 T aq_queue_up +ffffffff817210c0 T aq_dmamem_alloc +ffffffff81721210 T aq_dmamem_free +ffffffff81721280 T aq_queue_down +ffffffff81721560 T aq_invalidate_rx_desc_cache +ffffffff817215e0 T aq_up +ffffffff81721a20 T aq_down +ffffffff81721b70 T aq_rxrinfo +ffffffff81721c60 T aq_iff +ffffffff81722000 T tulip_probe +ffffffff81722060 T tulip_attach +ffffffff81722ab0 T tulip_timeout_callback +ffffffff81722b00 T tulip_timeout +ffffffff81722b70 T tulip_txprobe +ffffffff81722cb0 T tulip_txput +ffffffff81723230 T tulip_media_set +ffffffff81723820 T tulip_reset +ffffffff81723be0 T tulip_mii_autonegotiate +ffffffff81723ee0 T tulip_mii_readreg +ffffffff81724090 T tulip_mii_writereg +ffffffff81724250 T tulip_linkup +ffffffff81724320 T tulip_init +ffffffff817244a0 T tulip_media_print +ffffffff817244f0 T tulip_media_link_monitor +ffffffff81724760 T tulip_mii_map_abilities +ffffffff817247f0 T tulip_media_poll +ffffffff81724ce0 T tulip_mii_phy_readspecific +ffffffff81724ea0 T tulip_media_select +ffffffff81724fb0 T tulip_21040_mediainfo_init +ffffffff817250b0 T tulip_21040_media_probe +ffffffff817251a0 T tulip_21040_10baset_only_media_probe +ffffffff81725260 T tulip_21040_10baset_only_media_select +ffffffff817252c0 T tulip_21040_auibnc_only_media_probe +ffffffff81725350 T tulip_21040_auibnc_only_media_select +ffffffff817253a0 T tulip_21041_mediainfo_init +ffffffff81725460 T tulip_21041_media_probe +ffffffff81725540 T tulip_21041_media_poll +ffffffff81725850 T tulip_mii_get_phyaddr +ffffffff81725910 T tulip_2114x_media_preset +ffffffff81725b30 T tulip_null_media_poll +ffffffff81725b60 T tulip_21140_mediainit +ffffffff81725bb0 T tulip_21140_evalboard_media_probe +ffffffff81725d90 T tulip_21140_accton_media_probe +ffffffff81725fb0 T tulip_21140_smc9332_media_probe +ffffffff817261e0 T tulip_21140_cogent_em100_media_probe +ffffffff81726350 T tulip_21140_znyx_zx34x_media_probe +ffffffff81726590 T tulip_2114x_media_probe +ffffffff817265c0 T tulip_delay_300ns +ffffffff817266d0 T tulip_srom_idle +ffffffff81727070 T tulip_srom_read +ffffffff81727e10 T tulip_mii_writebits +ffffffff817283a0 T tulip_mii_turnaround +ffffffff81728b70 T tulip_mii_readbits +ffffffff81728f50 T tulip_identify_dec_nic +ffffffff81729000 T tulip_identify_znyx_nic +ffffffff817292d0 T tulip_identify_smc_nic +ffffffff817294b0 T tulip_identify_cogent_nic +ffffffff817295a0 T tulip_identify_accton_nic +ffffffff817296d0 T tulip_identify_asante_nic +ffffffff817299a0 T tulip_identify_compex_nic +ffffffff81729af0 T tulip_srom_decode +ffffffff8172a740 T tulip_read_macaddr +ffffffff8172b100 T tulip_ifmedia_add +ffffffff8172b1f0 T tulip_ifmedia_change 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pcn_ioctl +ffffffff8172fc40 T pcn_start +ffffffff81730090 T pcn_watchdog +ffffffff81730100 T pcn_txintr +ffffffff817305c0 T pcn_init +ffffffff81730e80 T pcn_stop +ffffffff81731000 T pcn_rxintr +ffffffff81731520 T pcn_spnd +ffffffff81731620 T pcn_add_rxbuf +ffffffff81731810 T pcn_rxdrain +ffffffff817318b0 T pcn_set_filter +ffffffff81731a10 T pcn_79c970_mediainit +ffffffff81731b20 T pcn_79c970_mediachange +ffffffff81731ce0 T pcn_79c970_mediastatus +ffffffff81731d20 T pcn_79c971_mediainit +ffffffff81731df0 T pcn_mii_readreg +ffffffff81731eb0 T pcn_mii_writereg +ffffffff81731f50 T pcn_mii_statchg +ffffffff81731fb0 T pcn_79c971_mediachange +ffffffff81732000 T pcn_79c971_mediastatus +ffffffff81733000 T siop_lookup_product +ffffffff817330a0 T siop_pci_attach_common +ffffffff81733530 T siop_pci_reset +ffffffff81734000 T siop_pci_match +ffffffff81734050 T siop_pci_attach +ffffffff81735000 T sii3114_read_reg +ffffffff81735060 T sii3114_write_reg +ffffffff817350d0 T pdc203xx_read_reg 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pdcsata_chip_map +ffffffff8173b770 T acard_chip_map +ffffffff8173b9e0 T serverworks_chip_map +ffffffff8173bcf0 T svwsata_chip_map +ffffffff8173c0d0 T nforce_chip_map +ffffffff8173c4f0 T ite_chip_map +ffffffff8173c7b0 T jmicron_chip_map +ffffffff8173cbc0 T phison_chip_map +ffffffff8173cee0 T rdc_chip_map +ffffffff8173d330 T pciide_match +ffffffff8173d3d0 T pciide_attach +ffffffff8173d4b0 T pciide_detach +ffffffff8173d510 T pciide_activate +ffffffff8173dc40 T pciide_lookup_product +ffffffff8173dea0 T pciide_dmacmd_read +ffffffff8173ded0 T pciide_dmacmd_write +ffffffff8173df00 T pciide_dmactl_read +ffffffff8173df30 T pciide_dmactl_write +ffffffff8173df60 T pciide_dmatbl_write +ffffffff8173df90 T pciide_mapregs_compat +ffffffff8173e110 T pciide_unmapregs_compat +ffffffff8173e1a0 T pciide_mapregs_native +ffffffff8173e490 T pciide_unmapregs_native +ffffffff8173e520 T pciide_mapreg_dma +ffffffff8173e6b0 T pciide_dma_init +ffffffff8173e980 T pciide_dma_start +ffffffff8173ea00 T pciide_dma_finish +ffffffff8173ebd0 T pciide_unmapreg_dma +ffffffff8173ec00 T pciide_intr_flag +ffffffff8173ee10 T pciide_compat_intr +ffffffff8173ee90 T pciide_pci_intr +ffffffff8173ef50 T pciide_channel_dma_setup +ffffffff8173f020 T pciide_dma_table_setup +ffffffff8173f260 T pciide_irqack +ffffffff8173f2b0 T pciide_chansetup +ffffffff8173f390 T pciide_chanfree +ffffffff8173f3e0 T pciide_mapchan +ffffffff8173f470 T pciide_unmap_chan +ffffffff8173f540 T pciide_chan_candisable +ffffffff8173f5b0 T pciide_map_compat_intr +ffffffff8173f650 T pciide_unmap_compat_intr +ffffffff8173f6b0 T pciide_print_channels +ffffffff8173f780 T pciide_print_modes +ffffffff8173f790 T default_chip_unmap +ffffffff8173f870 T sata_setup_channel +ffffffff8173f990 T piix_timing_debug +ffffffff8173f9c0 T piix_setup_channel +ffffffff8173fe50 T piix3_4_setup_channel +ffffffff817405f0 T piix_setup_idetim_timings +ffffffff81740660 T piix_setup_idetim_drvs +ffffffff81740780 T piix_setup_sidetim_timings +ffffffff817407f0 T amd756_setup_channel +ffffffff81740ba0 T apollo_setup_channel +ffffffff81740f20 T cmd_channel_map +ffffffff81741290 T cmd_pci_intr +ffffffff81741390 T cmd646_9_irqack +ffffffff81741490 T cmd0643_9_setup_channel +ffffffff817418b0 T cmd680_setup_channel +ffffffff81741db0 T cmd680_channel_map +ffffffff817420e0 T sii_fixup_cacheline +ffffffff817423b0 T sii3112_setup_channel +ffffffff81742570 T sii3112_drv_probe +ffffffff81742990 T sii3114_mapreg_dma +ffffffff81742c70 T sii3114_chansetup +ffffffff81742d40 T sii3114_mapchan +ffffffff81743060 T sii3114_dmacmd_read +ffffffff817430a0 T sii3114_dmacmd_write +ffffffff817430e0 T sii3114_dmactl_read +ffffffff81743120 T sii3114_dmactl_write +ffffffff81743160 T sii3114_dmatbl_write +ffffffff817431a0 T cy693_setup_channel +ffffffff817433c0 T sis_hostbr_match +ffffffff81743490 T sis_south_match +ffffffff817434d0 T sis_setup_channel +ffffffff81743810 T sis96x_setup_channel +ffffffff81743af0 T natsemi_irqack +ffffffff81743b90 T natsemi_setup_channel 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svwsata_drv_probe +ffffffff817469f0 T svwsata_mapchan +ffffffff81746ae0 T svwsata_dmacmd_read +ffffffff81746b10 T svwsata_dmacmd_write +ffffffff81746b40 T svwsata_dmactl_read +ffffffff81746b70 T svwsata_dmactl_write +ffffffff81746ba0 T svwsata_dmatbl_write +ffffffff81746bd0 T acard_setup_channel +ffffffff81746ff0 T nforce_setup_channel +ffffffff81747340 T nforce_pci_intr +ffffffff81747430 T ite_setup_channel +ffffffff817477b0 T ixp_setup_channel +ffffffff81747b50 T jmicron_setup_channel +ffffffff81747db0 T phison_setup_channel +ffffffff81747fc0 T sch_setup_channel +ffffffff817481c0 T rdc_setup_channel +ffffffff81749000 T ppbmatch +ffffffff81749050 T ppbattach +ffffffff817497d0 T ppbdetach +ffffffff817498f0 T ppbactivate +ffffffff81749d70 T ppb_alloc_busrange +ffffffff81749f20 T ppb_hotplug_insert +ffffffff81749f80 T ppb_hotplug_rescan +ffffffff81749fc0 T ppb_hotplug_remove +ffffffff8174a120 T ppb_hotplug_insert_finish +ffffffff8174a150 T ppb_intr +ffffffff8174a210 T ppb_alloc_resources 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vr_ifmedia_upd +ffffffff8174fd50 T vr_ifmedia_sts +ffffffff8174fdb0 T vr_tick +ffffffff8174fe30 T vr_rxtick +ffffffff8174ff10 T vr_stop +ffffffff817501a0 T vr_init +ffffffff81750740 T vr_list_tx_init +ffffffff81750840 T vr_list_rx_init +ffffffff81750a00 T vr_fill_rx_ring +ffffffff81750ad0 T vr_alloc_mbuf +ffffffff81750c40 T vr_rxeof +ffffffff81750ec0 T vr_rxeoc +ffffffff81751050 T vr_txeof +ffffffff81751210 T vr_encap +ffffffff81752000 T txp_probe +ffffffff81752030 T txp_attach +ffffffff817521a0 T txp_attachhook +ffffffff817524c0 T txp_chip_init +ffffffff81752680 T txp_download_fw +ffffffff81752b20 T txp_alloc_rings +ffffffff81753960 T txp_command +ffffffff81753a30 T txp_ifmedia_upd +ffffffff81753b40 T txp_ifmedia_sts +ffffffff81753e30 T txp_ioctl +ffffffff81753f50 T txp_start +ffffffff81754310 T txp_watchdog +ffffffff81754340 T txp_capabilities +ffffffff817544f0 T txp_tick +ffffffff81754640 T txp_intr +ffffffff817548b0 T txp_reset_adapter +ffffffff817549b0 T txp_download_fw_wait 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bktr_name +ffffffff8175b030 T common_bktr_attach +ffffffff8175b330 T common_bktr_intr +ffffffff8175b950 T video_open +ffffffff8175be10 t set_fps +ffffffff8175bf50 T vbi_open +ffffffff8175bff0 T tuner_open +ffffffff8175c040 T video_close +ffffffff8175c130 T tuner_close +ffffffff8175c160 T vbi_close +ffffffff8175c190 T video_read +ffffffff8175c350 t start_capture +ffffffff8175f290 T vbi_read +ffffffff8175f3b0 T video_ioctl +ffffffff81760850 T bktr_common_ioctl +ffffffff81761020 T tuner_ioctl +ffffffff81761f70 T i2cWrite +ffffffff81762090 T i2cRead +ffffffff817621b0 T msp_dpl_read +ffffffff81762480 T msp_dpl_write +ffffffff81762640 T msp_dpl_reset +ffffffff81762940 t i2c_write_byte +ffffffff81762b20 t i2c_read_byte +ffffffff81762d40 t split +ffffffff81762f40 t getline +ffffffff81764000 t bktr_probe +ffffffff81764060 t bktr_attach +ffffffff817642e0 T bktr_get_info +ffffffff817643c0 T bktr_set_info +ffffffff81764520 T get_bktr_mem +ffffffff81764750 T free_bktr_mem +ffffffff817647b0 T bktropen +ffffffff81764870 T bktrclose +ffffffff81764900 T bktrread +ffffffff81764990 T bktrwrite +ffffffff817649c0 T bktrioctl +ffffffff81764a70 T bktrmmap +ffffffff81764b10 t bktr_intr +ffffffff81765000 T select_tuner +ffffffff81765050 T tv_freq +ffffffff817652a0 T do_afc +ffffffff817653d0 T get_tuner_status +ffffffff817653f0 T tv_channel +ffffffff817654b0 T tuner_getchnlset +ffffffff81766000 T xl_pci_match +ffffffff81766030 T xl_pci_attach +ffffffff81766390 T xl_pci_detach +ffffffff81766420 T xl_pci_wol_power +ffffffff81766470 T xl_pci_intr_ack +ffffffff81767000 T fxp_pci_match +ffffffff81767030 T fxp_pci_attach +ffffffff81767360 T fxp_pci_detach +ffffffff81768000 T em_probe +ffffffff81768030 T em_attach +ffffffff81768530 T em_detach +ffffffff817685c0 T em_activate +ffffffff81768640 T em_defer_attach +ffffffff817686e0 T em_stop +ffffffff817687d0 T em_free_pci_resources +ffffffff81768a90 T em_setup_interface +ffffffff81768c80 T em_update_link_status +ffffffff81768e70 T em_local_timer +ffffffff81768f20 T em_82547_move_tail +ffffffff81768f60 T em_identify_hardware +ffffffff81769070 T em_allocate_pci_resources +ffffffff81769470 T em_allocate_desc_rings +ffffffff81769580 T em_hardware_init +ffffffff81769820 T em_kstat_attach +ffffffff81769970 T em_start +ffffffff81769c60 T em_encap +ffffffff8176a140 T em_82547_move_tail_locked +ffffffff8176a370 T em_82547_update_fifo_head +ffffffff8176a3c0 T em_ioctl +ffffffff8176a6b0 T em_init +ffffffff8176aa10 T em_get_sffpage +ffffffff8176aad0 T em_disable_intr +ffffffff8176abd0 T em_iff +ffffffff8176aee0 T em_initialize_receive_unit +ffffffff8176b670 T em_enable_intr +ffffffff8176b7d0 T em_watchdog +ffffffff8176b980 T em_enable_hw_vlans +ffffffff8176ba20 T em_setup_transmit_structures +ffffffff8176bc20 T em_initialize_transmit_unit +ffffffff8176c240 T em_setup_receive_structures +ffffffff8176c380 T em_setup_queues_msix +ffffffff8176ca40 T em_intr +ffffffff8176cb40 T em_txeof +ffffffff8176cd10 T em_rxeof +ffffffff8176d1d0 T em_rxrefill +ffffffff8176d2e0 T em_media_status +ffffffff8176d520 T em_flowstatus +ffffffff8176d630 T em_media_change +ffffffff8176d790 T em_tx_ctx_setup +ffffffff8176d920 T em_transmit_checksum_setup +ffffffff8176da00 T em_fill_descriptors +ffffffff8176da80 T em_82547_fifo_workaround +ffffffff8176daf0 T em_82547_tx_fifo_reset +ffffffff8176df60 T em_pci_clear_mwi +ffffffff8176df90 T em_pci_set_mwi +ffffffff8176dfc0 T em_smartspeed +ffffffff8176e1c0 T em_kstat_read +ffffffff8176e5e0 T em_flush_desc_rings +ffffffff8176e710 T em_free_transmit_structures +ffffffff8176e8e0 T em_free_receive_structures +ffffffff8176eaf0 T em_legacy_irq_quirk_spt +ffffffff8176ebd0 T em_allocate_msix +ffffffff8176ede0 T em_allocate_legacy +ffffffff8176ef00 T em_dma_free +ffffffff8176ef70 T em_disable_aspm +ffffffff8176f040 T em_dma_malloc +ffffffff8176f1d0 T em_allocate_transmit_structures +ffffffff8176f2c0 T em_get_buf +ffffffff8176f420 T em_allocate_receive_structures +ffffffff8176f5f0 T em_rxfill +ffffffff8176f740 T em_tbi_adjust_stats +ffffffff8176f910 T em_receive_checksum +ffffffff8176f980 T em_write_pci_cfg +ffffffff8176fa00 T em_read_pci_cfg +ffffffff8176fa70 T em_read_pcie_cap_reg +ffffffff8176faa0 T em_flush_tx_ring +ffffffff8176fc10 T em_flush_rx_ring +ffffffff8176fdd0 T em_queue_intr_msix +ffffffff8176fe80 T em_link_intr_msix +ffffffff8176ffb0 T em_enable_queue_intr_msix +ffffffff81771000 T em_set_mac_type +ffffffff81771a00 T em_set_sfp_media_type_82575 +ffffffff81771d50 T em_translate_82542_register +ffffffff81771f80 T em_read_sfp_data_byte +ffffffff81772070 T em_set_media_type +ffffffff817722e0 T em_reset_hw +ffffffff81772eb0 T em_disable_pciex_master +ffffffff81772f80 T em_check_phy_reset_block +ffffffff81773040 T em_gate_hw_phy_config_ich8lan +ffffffff817730e0 t em_get_software_flag +ffffffff81773260 T em_hv_phy_workarounds_ich8lan +ffffffff817735f0 T em_lv_phy_workarounds_ich8lan +ffffffff817736f0 t em_phy_init_script +ffffffff81773960 T em_read_eeprom +ffffffff81774040 T em_set_eee_i350 +ffffffff81774160 T em_init_hw +ffffffff81775e00 T em_phy_reset +ffffffff81776040 T em_clear_vfta_i350 +ffffffff81776220 T em_read_phy_reg +ffffffff817763c0 T em_setup_link +ffffffff81778c60 T em_enable_tx_pkt_filtering +ffffffff81779030 T em_clear_hw_cntrs +ffffffff81779920 T em_write_phy_reg +ffffffff81779ab0 T em_power_up_serdes_link_82575 +ffffffff81779ba0 T em_copper_link_autoneg +ffffffff81779cd0 T em_phy_setup_autoneg +ffffffff81779e40 T em_copper_link_postconfig +ffffffff81779f10 T em_config_collision_dist +ffffffff81779fa0 t em_config_mac_to_phy +ffffffff8177a110 t em_config_fc_after_link_up +ffffffff8177a410 t em_config_dsp_after_link_change +ffffffff8177ad00 T em_force_mac_fc +ffffffff8177add0 T em_check_for_link +ffffffff8177b5c0 T em_get_pcs_speed_and_duplex_82575 +ffffffff8177b680 T em_k1_gig_workaround_hv +ffffffff8177b7b0 T em_link_stall_workaround_hv +ffffffff8177b890 T em_k1_workaround_lv +ffffffff8177b950 T em_k1_workaround_lpt_lp +ffffffff8177bc10 T em_set_eee_pchlan +ffffffff8177bcb0 t em_polarity_reversal_workaround +ffffffff8177bef0 T em_get_speed_and_duplex +ffffffff8177c3b0 T em_access_phy_wakeup_reg_bm +ffffffff8177c510 t em_write_phy_reg_ex +ffffffff8177c780 t em_read_phy_reg_ex +ffffffff8177cc30 T em_access_phy_debug_regs_hv +ffffffff8177cd00 T em_access_phy_reg_hv +ffffffff8177cec0 t em_swfw_sync_acquire +ffffffff8177d070 t em_swfw_sync_release +ffffffff8177d1f0 T em_sgmii_uses_mdio_82575 +ffffffff8177d250 T em_read_phy_reg_i2c +ffffffff8177d330 T em_write_phy_reg_i2c +ffffffff8177d410 T em_phy_hw_reset +ffffffff8177da50 T em_oem_bits_config_pchlan +ffffffff8177dc30 T em_initialize_M88E1512_phy +ffffffff8177ddf0 T em_init_eeprom_params +ffffffff8177e330 T em_get_flash_presence_i210 +ffffffff8177e390 t em_acquire_eeprom +ffffffff8177e580 t em_read_eeprom_ich8 +ffffffff8177e750 t em_release_eeprom +ffffffff8177e8c0 t em_standby_eeprom +ffffffff8177eab0 t em_shift_out_ee_bits +ffffffff8177ec50 t em_shift_in_ee_bits +ffffffff8177ed90 T em_validate_eeprom_checksum +ffffffff8177ef40 T em_write_eeprom +ffffffff8177f4f0 T em_update_eeprom_checksum +ffffffff8177f610 t em_commit_shadow_ram +ffffffff8177fb90 T em_read_part_num +ffffffff8177fc30 T em_read_mac_addr +ffffffff8177fdb0 T em_mc_addr_list_update +ffffffff8177ffd0 T em_hash_mc_addr +ffffffff817800d0 T em_rar_set +ffffffff817801d0 T em_mta_set +ffffffff81780340 T em_get_bus_info +ffffffff817804d0 T em_check_mng_mode +ffffffff81780550 T em_valid_nvm_bank_detect_ich8lan +ffffffff81780700 T em_read_eeprom_spt +ffffffff817809d0 T em_read_ich8_data32 +ffffffff81780b40 t em_ich8_cycle_init +ffffffff81780cf0 t em_ich8_flash_cycle +ffffffff81780e60 T em_configure_k1_ich8lan +ffffffff81781070 t em_get_hw_eeprom_semaphore +ffffffff817811e0 t em_shift_out_mdi_bits +ffffffff81781360 t em_erase_ich8_4k_segment +ffffffff817815a0 t em_write_ich8_byte +ffffffff81781710 t em_read_ich8_data +ffffffff81782000 T em_lookup_gcu +ffffffff81782030 T em_attach_miibus +ffffffff81782060 T gcu_miibus_readreg +ffffffff817821d0 T gcu_miibus_writereg +ffffffff81782320 T gcu_miibus_statchg +ffffffff81783000 T ixgb_probe +ffffffff81783030 T ixgb_attach +ffffffff81783450 T ixgb_local_timer +ffffffff817834f0 T ixgb_identify_hardware +ffffffff817835f0 T ixgb_allocate_pci_resources +ffffffff81783780 T ixgb_dma_malloc +ffffffff81783980 T ixgb_hardware_init +ffffffff81783a40 T ixgb_setup_interface +ffffffff81783b70 T ixgb_update_stats_counters +ffffffff81784470 T ixgb_update_link_status +ffffffff817844f0 T ixgb_dma_free +ffffffff817845a0 T ixgb_free_pci_resources +ffffffff81784630 T ixgb_start +ffffffff81784820 T ixgb_encap +ffffffff81784a10 T ixgb_ioctl +ffffffff81784cb0 T ixgb_init +ffffffff81785150 T ixgb_set_promisc +ffffffff817851d0 T ixgb_stop +ffffffff81785250 T ixgb_disable_intr +ffffffff81785280 T ixgb_set_multi +ffffffff81785390 T ixgb_enable_intr +ffffffff817853e0 T ixgb_watchdog +ffffffff81785470 T ixgb_enable_hw_vlans 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+ffffffff81787a00 T ixgb_get_eeprom_word +ffffffff81787ae0 T ixgb_get_ee_mac_addr +ffffffff81787bd0 T ixgb_get_ee_pba_number +ffffffff81787c90 T ixgb_get_ee_device_id +ffffffff81788000 T ixgb_mac_reset +ffffffff817881e0 T ixgb_adapter_stop +ffffffff81788320 T ixgb_init_hw +ffffffff81788630 T ixgb_init_rx_addrs +ffffffff81788760 T mac_addr_valid +ffffffff817887c0 T ixgb_clear_vfta +ffffffff81788840 T ixgb_clear_hw_cntrs +ffffffff81788f20 T ixgb_setup_fc +ffffffff817890b0 T ixgb_check_for_link +ffffffff817892c0 T ixgb_rar_set +ffffffff81789330 T ixgb_mc_addr_list_update +ffffffff817895b0 T ixgb_write_vfta +ffffffff817895e0 T ixgb_read_phy_reg +ffffffff81789ae0 T ixgb_write_phy_reg +ffffffff81789fd0 T ixgb_check_for_bad_link +ffffffff8178a090 T ixgb_led_on +ffffffff8178a0e0 T ixgb_led_off +ffffffff8178b000 T ixgbe_probe +ffffffff8178b030 T ixgbe_attach +ffffffff8178b5a0 T ixgbe_detach +ffffffff8178b7c0 T ixgbe_activate +ffffffff8178b8d0 T ixgbe_identify_hardware +ffffffff8178b990 T ixgbe_allocate_pci_resources +ffffffff8178bae0 T ixgbe_allocate_queues +ffffffff8178bfe0 T ixgbe_allocate_msix +ffffffff8178c220 T ixgbe_allocate_legacy +ffffffff8178c340 T ixgbe_setup_interface +ffffffff8178c680 T ixgbe_free_transmit_structures +ffffffff8178c700 T ixgbe_free_receive_structures +ffffffff8178c7c0 T ixgbe_free_pci_resources +ffffffff8178c8a0 T ixgbe_stop +ffffffff8178cbc0 T ixgbe_init +ffffffff8178d800 T ixgbe_start +ffffffff8178d9e0 T ixgbe_encap +ffffffff8178dce0 T ixgbe_ioctl +ffffffff8178e040 T ixgbe_rxrinfo +ffffffff8178e1a0 T ixgbe_get_sffpage +ffffffff8178e350 T ixgbe_disable_intr +ffffffff8178e420 T ixgbe_iff +ffffffff8178e590 T ixgbe_enable_intr +ffffffff8178e6a0 T ixgbe_enable_queues +ffffffff8178e7b0 T ixgbe_watchdog +ffffffff8178e9c0 T ixgbe_setup_transmit_structures +ffffffff8178eaa0 T ixgbe_initialize_transmit_units +ffffffff8178ed60 T ixgbe_setup_receive_structures +ffffffff8178ee90 T ixgbe_initialize_receive_units +ffffffff8178f370 T ixgbe_config_gpie +ffffffff8178f440 T ixgbe_setup_vlan_hw_support +ffffffff8178f5d0 T ixgbe_configure_ivars +ffffffff8178f780 T ixgbe_set_ivar +ffffffff8178f950 T ixgbe_config_link +ffffffff8178faf0 T ixgbe_config_delay_values +ffffffff8178fc10 t ix_kstats_tick +ffffffff8178fce0 T ixgbe_enable_queue +ffffffff8178fdb0 T ixgbe_disable_queue +ffffffff8178fe80 T ixgbe_link_intr +ffffffff8178fe90 T ixgbe_intr +ffffffff81790360 T ixgbe_queue_intr +ffffffff817904b0 T ixgbe_rxeof +ffffffff81790880 T ixgbe_txeof +ffffffff81790a20 T ixgbe_rxrefill +ffffffff81790ae0 T ixgbe_legacy_intr +ffffffff81790ca0 T ixgbe_update_link_status +ffffffff81790df0 T ixgbe_handle_mod +ffffffff81790f10 T ixgbe_handle_msf +ffffffff81790fe0 T ixgbe_handle_phy +ffffffff81791070 T ixgbe_media_status +ffffffff81791280 T ixgbe_media_change +ffffffff81791330 T ixgbe_mc_array_itr +ffffffff81791370 T ixgbe_setup_msix +ffffffff81791400 T ixgbe_add_media_types +ffffffff817916a0 T ixgbe_dma_malloc +ffffffff81791890 T ixgbe_dma_free +ffffffff81791940 T ixgbe_allocate_transmit_buffers +ffffffff81791ab0 T ixgbe_setup_transmit_ring +ffffffff81791c50 T ixgbe_free_transmit_buffers +ffffffff81791d80 T ixgbe_get_buf +ffffffff81791ec0 T ixgbe_allocate_receive_buffers +ffffffff81792000 T ixgbe_setup_receive_ring +ffffffff817920e0 T ixgbe_rxfill +ffffffff81792210 T ixgbe_initialize_rss_mapping +ffffffff81792480 T ixgbe_map_queue_statistics +ffffffff81792580 T ixgbe_free_receive_buffers +ffffffff817926c0 T ixgbe_rx_checksum +ffffffff81792710 T ixgbe_read_pci_cfg +ffffffff81792770 T ixgbe_write_pci_cfg +ffffffff817927f0 t ix_kstats_read +ffffffff817929b0 t ix_rxq_kstats_read +ffffffff81792b10 t ix_txq_kstats_read +ffffffff81793000 T ixgbe_init_ops_generic +ffffffff81793270 T ixgbe_init_eeprom_params_generic +ffffffff81793320 T ixgbe_read_eerd_generic +ffffffff81793420 T ixgbe_read_eeprom_bit_bang_generic +ffffffff817936c0 T ixgbe_write_eeprom_generic +ffffffff81793b10 T ixgbe_validate_eeprom_checksum_generic +ffffffff81793bc0 T ixgbe_update_eeprom_checksum_generic +ffffffff81793c40 T ixgbe_calc_eeprom_checksum_generic +ffffffff81793de0 T ixgbe_init_hw_generic +ffffffff81793e40 T ixgbe_start_hw_generic +ffffffff81793f60 T ixgbe_clear_hw_cntrs_generic +ffffffff81794940 T ixgbe_enable_rx_dma_generic +ffffffff817949a0 T ixgbe_get_mac_addr_generic +ffffffff81794a30 T ixgbe_stop_adapter_generic +ffffffff81794bb0 T ixgbe_get_bus_info_generic +ffffffff81794c60 T ixgbe_set_lan_id_multi_port_pcie +ffffffff81794d30 T ixgbe_acquire_swfw_sync +ffffffff81794f60 T ixgbe_release_swfw_sync +ffffffff81795010 T prot_autoc_read_generic +ffffffff81795070 T prot_autoc_write_generic +ffffffff817950c0 T ixgbe_led_on_generic +ffffffff81795180 T ixgbe_led_off_generic +ffffffff81795230 T ixgbe_blink_led_start_generic +ffffffff817953a0 T ixgbe_blink_led_stop_generic +ffffffff817954c0 T ixgbe_set_rar_generic +ffffffff817955e0 T ixgbe_clear_rar_generic +ffffffff817956e0 T ixgbe_init_rx_addrs_generic +ffffffff817958e0 T ixgbe_update_mc_addr_list_generic +ffffffff81795ae0 T ixgbe_enable_mc_generic +ffffffff81795b50 T ixgbe_disable_mc_generic +ffffffff81795bb0 T ixgbe_enable_rx_generic +ffffffff81795c70 T ixgbe_disable_rx_generic +ffffffff81795d50 T ixgbe_fc_enable_generic +ffffffff81796180 T ixgbe_setup_fc_generic +ffffffff81796450 T ixgbe_fc_autoneg +ffffffff81796620 T ixgbe_device_supports_autoneg_fc +ffffffff81796720 T ixgbe_start_hw_gen2 +ffffffff81796900 T ixgbe_identify_phy +ffffffff81796960 T ixgbe_set_pci_config_data_generic +ffffffff817969e0 T ixgbe_disable_rx +ffffffff81796a20 T ixgbe_disable_pcie_master +ffffffff81796b70 T ixgbe_read_eerd_buffer_generic +ffffffff81796cb0 T ixgbe_poll_eerd_eewr_done +ffffffff81796d50 T ixgbe_write_eewr_buffer_generic +ffffffff81796ed0 T ixgbe_write_eewr_generic +ffffffff81796f20 T ixgbe_acquire_eeprom +ffffffff817970a0 T ixgbe_get_eeprom_semaphore +ffffffff817972b0 T ixgbe_release_eeprom_semaphore +ffffffff81797320 T ixgbe_ready_eeprom +ffffffff81797490 T ixgbe_shift_out_eeprom_bits +ffffffff81797650 T ixgbe_shift_in_eeprom_bits +ffffffff817977b0 T ixgbe_standby_eeprom +ffffffff81797890 T ixgbe_raise_eeprom_clk +ffffffff81797900 T ixgbe_lower_eeprom_clk +ffffffff81797970 T ixgbe_release_eeprom +ffffffff81797a50 T ixgbe_validate_mac_addr +ffffffff81797ab0 T ixgbe_init_uta_tables +ffffffff81797af0 T ixgbe_add_uc_addr +ffffffff81797b60 T ixgbe_mta_vector +ffffffff81797c10 T ixgbe_set_mta +ffffffff81797cd0 T ixgbe_negotiate_fc +ffffffff81797d80 T ixgbe_fc_autoneg_fiber +ffffffff81797eb0 T ixgbe_fc_autoneg_backplane +ffffffff81798010 T ixgbe_fc_autoneg_copper +ffffffff81798140 T ixgbe_disable_sec_rx_path_generic +ffffffff81798200 T ixgbe_enable_sec_rx_path_generic +ffffffff81798290 T ixgbe_enable_rx +ffffffff817982d0 T ixgbe_get_pcie_msix_count_generic +ffffffff81798350 T ixgbe_insert_mac_addr_generic +ffffffff81798560 T ixgbe_set_vmdq +ffffffff817985a0 T ixgbe_set_rar +ffffffff817985f0 T ixgbe_clear_vmdq +ffffffff81798630 T ixgbe_clear_vmdq_generic +ffffffff817987d0 T ixgbe_set_vmdq_generic +ffffffff81798880 T ixgbe_init_uta_tables_generic +ffffffff81798900 T ixgbe_find_vlvf_slot +ffffffff817989c0 T ixgbe_set_vfta_generic +ffffffff81798ad0 T ixgbe_set_vlvf_generic +ffffffff81798d60 T ixgbe_clear_vfta_generic +ffffffff81798e60 T ixgbe_need_crosstalk_fix +ffffffff81798eb0 T ixgbe_check_mac_link_generic +ffffffff817990a0 T ixgbe_get_device_caps_generic +ffffffff817990f0 T ixgbe_calculate_checksum +ffffffff817991b0 T ixgbe_hic_unlocked +ffffffff81799390 T ixgbe_host_interface_command +ffffffff81799560 T ixgbe_clear_tx_pending +ffffffff81799750 T ixgbe_mng_present +ffffffff817997c0 T ixgbe_mng_enabled +ffffffff81799880 T ixgbe_setup_mac_link_multispeed_fiber +ffffffff81799c40 T ixgbe_flap_tx_laser +ffffffff81799c80 T ixgbe_check_link +ffffffff81799cd0 T ixgbe_set_soft_rate_select_speed +ffffffff81799dc0 T ixgbe_init_shared_code +ffffffff81799e70 T ixgbe_set_mac_type +ffffffff8179a030 T ixgbe_init_hw +ffffffff8179a070 T ixgbe_get_media_type +ffffffff8179a0b0 T ixgbe_read_mbx +ffffffff8179a110 T ixgbe_write_mbx +ffffffff8179a160 T ixgbe_check_for_msg +ffffffff8179a1a0 T ixgbe_check_for_ack +ffffffff8179a1e0 T ixgbe_check_for_rst +ffffffff8179a220 T ixgbe_poll_for_msg +ffffffff8179a2e0 T ixgbe_poll_for_ack +ffffffff8179a3a0 T ixgbe_read_posted_mbx +ffffffff8179a480 T ixgbe_write_posted_mbx +ffffffff8179a550 T ixgbe_init_mbx_ops_generic +ffffffff8179a590 T ixgbe_read_v2p_mailbox +ffffffff8179a600 T ixgbe_check_for_bit_pf +ffffffff8179a690 T ixgbe_check_for_msg_pf +ffffffff8179a740 T ixgbe_check_for_ack_pf +ffffffff8179a7e0 T ixgbe_check_for_rst_pf +ffffffff8179a8e0 T ixgbe_obtain_mbx_lock_pf +ffffffff8179a970 T ixgbe_write_mbx_pf +ffffffff8179ab40 T ixgbe_read_mbx_pf +ffffffff8179ac50 T ixgbe_init_mbx_params_pf +ffffffff8179b000 T ixgbe_set_pcie_completion_timeout +ffffffff8179b090 T ixgbe_init_ops_82598 +ffffffff8179b1e0 T ixgbe_init_phy_ops_82598 +ffffffff8179b2d0 T ixgbe_start_hw_82598 +ffffffff8179b480 T ixgbe_reset_hw_82598 +ffffffff8179b950 T ixgbe_get_media_type_82598 +ffffffff8179ba20 T ixgbe_get_supported_physical_layer_82598 +ffffffff8179bbf0 T ixgbe_read_analog_reg8_82598 +ffffffff8179bcb0 T ixgbe_write_analog_reg8_82598 +ffffffff8179bd30 T ixgbe_set_lan_id_multi_port_pcie_82598 +ffffffff8179bdd0 T ixgbe_enable_rx_dma_82598 +ffffffff8179be20 T ixgbe_set_vmdq_82598 +ffffffff8179bed0 T ixgbe_clear_vmdq_82598 +ffffffff8179bf80 T ixgbe_set_vfta_82598 +ffffffff8179c0b0 T ixgbe_clear_vfta_82598 +ffffffff8179c260 T ixgbe_fc_enable_82598 +ffffffff8179c6c0 T ixgbe_read_i2c_eeprom_82598 +ffffffff8179c6e0 T ixgbe_check_mac_link_82598 +ffffffff8179c980 T ixgbe_setup_mac_link_82598 +ffffffff8179cb40 T ixgbe_get_link_capabilities_82598 +ffffffff8179cc10 T ixgbe_setup_copper_link_82598 +ffffffff8179cd20 T ixgbe_start_mac_link_82598 +ffffffff8179ce40 T ixgbe_validate_link_ready +ffffffff8179cef0 T ixgbe_read_i2c_phy_82598 +ffffffff8179e000 T ixgbe_init_mac_link_ops_82599 +ffffffff8179e190 T ixgbe_disable_tx_laser_multispeed_fiber +ffffffff8179e260 T ixgbe_enable_tx_laser_multispeed_fiber +ffffffff8179e2e0 T ixgbe_flap_tx_laser_multispeed_fiber +ffffffff8179e420 T ixgbe_setup_mac_link_82599 +ffffffff8179e6b0 T ixgbe_set_hard_rate_select_speed +ffffffff8179e770 T ixgbe_verify_lesm_fw_enabled_82599 +ffffffff8179e830 T ixgbe_setup_mac_link_smartspeed +ffffffff8179ebb0 T ixgbe_init_phy_ops_82599 +ffffffff8179ed00 T ixgbe_read_i2c_byte_82599 +ffffffff8179ee80 T ixgbe_write_i2c_byte_82599 +ffffffff8179f000 T ixgbe_setup_copper_link_82599 +ffffffff8179f060 T ixgbe_setup_sfp_modules_82599 +ffffffff8179f220 T prot_autoc_read_82599 +ffffffff8179f330 T prot_autoc_write_82599 +ffffffff8179f4a0 T ixgbe_reset_pipeline_82599 +ffffffff8179f7e0 T ixgbe_init_ops_82599 +ffffffff8179f9c0 T ixgbe_identify_phy_82599 +ffffffff8179fa50 T ixgbe_reset_hw_82599 +ffffffff8179ffa0 T ixgbe_get_media_type_82599 +ffffffff817a00d0 T ixgbe_get_supported_physical_layer_82599 +ffffffff817a02a0 T ixgbe_enable_rx_dma_82599 +ffffffff817a0310 T ixgbe_read_analog_reg8_82599 +ffffffff817a03d0 T ixgbe_write_analog_reg8_82599 +ffffffff817a0450 T ixgbe_start_hw_82599 +ffffffff817a0550 T ixgbe_get_link_capabilities_82599 +ffffffff817a0690 T ixgbe_stop_mac_link_on_d3_82599 +ffffffff817a0750 T ixgbe_read_eeprom_82599 +ffffffff817a0780 T ixgbe_start_mac_link_82599 +ffffffff817a0960 T ixgbe_verify_fw_version_82599 +ffffffff817a1000 T ixgbe_init_ops_X540 +ffffffff817a1220 T ixgbe_init_eeprom_params_X540 +ffffffff817a12b0 T ixgbe_read_eerd_X540 +ffffffff817a1340 T ixgbe_write_eewr_X540 +ffffffff817a13d0 T ixgbe_update_eeprom_checksum_X540 +ffffffff817a14a0 T ixgbe_validate_eeprom_checksum_X540 +ffffffff817a1590 T ixgbe_calc_eeprom_checksum_X540 +ffffffff817a1730 T ixgbe_reset_hw_X540 +ffffffff817a1ac0 T ixgbe_get_media_type_X540 +ffffffff817a1af0 T ixgbe_get_supported_physical_layer_X540 +ffffffff817a1b70 T ixgbe_start_hw_X540 +ffffffff817a1bc0 T ixgbe_acquire_swfw_sync_X540 +ffffffff817a2010 T ixgbe_release_swfw_sync_X540 +ffffffff817a2140 T ixgbe_init_swfw_sync_X540 +ffffffff817a2220 T ixgbe_setup_mac_link_X540 +ffffffff817a2240 T ixgbe_blink_led_start_X540 +ffffffff817a2360 T ixgbe_blink_led_stop_X540 +ffffffff817a2460 T ixgbe_get_link_capabilities_X540 +ffffffff817a24a0 T ixgbe_update_flash_X540 +ffffffff817a2680 T ixgbe_poll_flash_update_done_X540 +ffffffff817a2710 T ixgbe_get_swfw_sync_semaphore +ffffffff817a28a0 T ixgbe_release_swfw_sync_semaphore +ffffffff817a3000 T ixgbe_init_ops_X550 +ffffffff817a3110 T ixgbe_dmac_config_X550 +ffffffff817a31f0 T ixgbe_dmac_config_tcs_X550 +ffffffff817a3340 T ixgbe_dmac_update_tcs_X550 +ffffffff817a3400 T ixgbe_set_source_address_pruning_X550 +ffffffff817a34f0 T ixgbe_init_eeprom_params_X550 +ffffffff817a3570 T ixgbe_calc_eeprom_checksum_X550 +ffffffff817a3590 T ixgbe_read_ee_hostif_X550 +ffffffff817a3660 T ixgbe_write_ee_hostif_X550 +ffffffff817a3720 T ixgbe_update_eeprom_checksum_X550 +ffffffff817a38b0 T ixgbe_validate_eeprom_checksum_X550 +ffffffff817a3a00 T ixgbe_disable_rx_x550 +ffffffff817a3b20 T ixgbe_led_on_t_X550em +ffffffff817a3be0 T ixgbe_led_off_t_X550em +ffffffff817a3ca0 T ixgbe_read_cs4227 +ffffffff817a3cd0 T ixgbe_write_cs4227 +ffffffff817a3d00 T ixgbe_read_pe +ffffffff817a3d50 T ixgbe_write_pe +ffffffff817a3db0 T ixgbe_reset_cs4227 +ffffffff817a4040 T ixgbe_check_cs4227 +ffffffff817a41f0 T ixgbe_setup_mux_ctl +ffffffff817a4280 T ixgbe_identify_phy_x550em +ffffffff817a44a0 T ixgbe_read_mng_if_sel_x550em +ffffffff817a4520 T ixgbe_fw_phy_activity +ffffffff817a4640 T ixgbe_get_phy_id_fw +ffffffff817a4750 T ixgbe_identify_phy_fw +ffffffff817a47a0 T ixgbe_shutdown_fw_phy +ffffffff817a4800 T ixgbe_read_phy_reg_x550em +ffffffff817a4830 T ixgbe_write_phy_reg_x550em +ffffffff817a4860 T ixgbe_init_ops_X550EM +ffffffff817a4b10 T ixgbe_get_bus_info_X550em +ffffffff817a4b60 T ixgbe_get_media_type_X550em +ffffffff817a4c50 T ixgbe_setup_sfp_modules_X550em +ffffffff817a4de0 T ixgbe_get_link_capabilities_X550em +ffffffff817a4eb0 T ixgbe_reset_hw_X550em +ffffffff817a5530 T ixgbe_get_supported_physical_layer_X550em +ffffffff817a56b0 T ixgbe_setup_fc_X550em +ffffffff817a5810 T ixgbe_init_phy_ops_X550em +ffffffff817a5ce0 T ixgbe_setup_fw_link +ffffffff817a5e10 T ixgbe_fc_autoneg_fw +ffffffff817a5e40 T ixgbe_setup_eee_fw +ffffffff817a5ea0 T ixgbe_init_ops_X550EM_a +ffffffff817a5fd0 T ixgbe_read_iosf_sb_reg_x550 +ffffffff817a6150 T ixgbe_write_iosf_sb_reg_x550 +ffffffff817a62d0 T ixgbe_read_iosf_sb_reg_x550a +ffffffff817a6370 T ixgbe_write_iosf_sb_reg_x550a +ffffffff817a6400 T ixgbe_acquire_swfw_sync_X550a +ffffffff817a6540 T ixgbe_release_swfw_sync_X550a +ffffffff817a65e0 T ixgbe_fc_autoneg_fiber_x550em_a +ffffffff817a6620 T ixgbe_fc_autoneg_backplane_x550em_a +ffffffff817a6780 T ixgbe_setup_fc_backplane_x550em_a +ffffffff817a6970 T ixgbe_fc_autoneg_sgmii_x550em_a +ffffffff817a6a60 T ixgbe_init_ops_X550EM_x +ffffffff817a6b20 T ixgbe_acquire_swfw_sync_X550em +ffffffff817a6be0 T ixgbe_release_swfw_sync_X550em +ffffffff817a6c70 T ixgbe_iosf_wait +ffffffff817a6d20 T ixgbe_get_phy_token +ffffffff817a6da0 T ixgbe_put_phy_token +ffffffff817a6e20 T ixgbe_supported_sfp_modules_X550em +ffffffff817a6ea0 T ixgbe_identify_sfp_module_X550em +ffffffff817a6f20 T ixgbe_init_mac_link_ops_X550em +ffffffff817a7060 T ixgbe_restart_an_internal_phy_x550em +ffffffff817a7170 T ixgbe_setup_sgmii +ffffffff817a7410 T ixgbe_setup_sgmii_fw +ffffffff817a76f0 T ixgbe_setup_mac_link_sfp_x550a +ffffffff817a78e0 T ixgbe_setup_mac_link_sfp_x550em +ffffffff817a79a0 T ixgbe_setup_mac_link_t_X550em +ffffffff817a7a50 T ixgbe_check_link_t_X550em +ffffffff817a7b30 T ixgbe_get_lasi_ext_t_x550em +ffffffff817a7cb0 T ixgbe_enable_lasi_ext_t_x550em +ffffffff817a7e40 T ixgbe_setup_kr_speed_x550em +ffffffff817a8050 T ixgbe_reset_phy_fw +ffffffff817a8120 T ixgbe_check_overtemp_fw +ffffffff817a81b0 T ixgbe_read_phy_reg_x550a +ffffffff817a8250 T ixgbe_write_phy_reg_x550a +ffffffff817a8300 T ixgbe_setup_kr_x550em +ffffffff817a8370 T ixgbe_setup_internal_phy_t_x550em +ffffffff817a8500 T ixgbe_enter_lplu_t_x550em +ffffffff817a87f0 T ixgbe_handle_lasi_ext_t_x550em +ffffffff817a8870 T ixgbe_reset_phy_t_X550em +ffffffff817a88c0 T ixgbe_set_mdio_speed +ffffffff817a89a0 T ixgbe_init_ext_t_x550em +ffffffff817a8a50 T ixgbe_setup_sfi_x550a +ffffffff817a8c00 T ixgbe_setup_ixfi_x550em_x +ffffffff817a8de0 T ixgbe_setup_ixfi_x550em +ffffffff817a8fc0 T ixgbe_ext_phy_t_x550em_get_link +ffffffff817a9050 T ixgbe_setup_phy_loopback_x550em +ffffffff817a9240 T ixgbe_read_ee_hostif_buffer_X550 +ffffffff817a93d0 T ixgbe_write_ee_hostif_data_X550 +ffffffff817a9440 T ixgbe_checksum_ptr_x550 +ffffffff817a95d0 T ixgbe_calc_checksum_X550 +ffffffff817a9760 T ixgbe_update_flash_X550 +ffffffff817a97b0 T ixgbe_get_lcd_t_x550em +ffffffff817a9870 T ixgbe_set_mux +ffffffff817aa000 T ixgbe_read_i2c_combined_generic_int +ffffffff817aa260 T ixgbe_i2c_start +ffffffff817aa3c0 T ixgbe_clock_in_i2c_byte +ffffffff817aa4b0 T ixgbe_clock_out_i2c_bit +ffffffff817aa5c0 T ixgbe_i2c_stop +ffffffff817aa750 T ixgbe_i2c_bus_clear +ffffffff817aa870 T ixgbe_read_i2c_combined_generic +ffffffff817aa890 T ixgbe_read_i2c_combined_generic_unlocked +ffffffff817aa8b0 T ixgbe_write_i2c_combined_generic_int +ffffffff817aaa90 T ixgbe_write_i2c_combined_generic +ffffffff817aaab0 T ixgbe_write_i2c_combined_generic_unlocked +ffffffff817aaad0 T ixgbe_init_phy_ops_generic +ffffffff817aac00 T ixgbe_identify_phy_generic +ffffffff817ab0d0 T ixgbe_reset_phy_generic +ffffffff817ab260 T ixgbe_read_phy_reg_generic +ffffffff817ab300 T ixgbe_write_phy_reg_generic +ffffffff817ab3a0 T ixgbe_read_phy_reg_mdi +ffffffff817ab520 T ixgbe_write_phy_reg_mdi +ffffffff817ab690 T ixgbe_setup_phy_link_generic +ffffffff817ab940 T ixgbe_setup_phy_link_speed_generic +ffffffff817ab990 T ixgbe_get_phy_firmware_version_generic +ffffffff817ab9c0 T ixgbe_read_i2c_byte_generic +ffffffff817ab9e0 T ixgbe_write_i2c_byte_generic +ffffffff817aba00 T ixgbe_read_i2c_eeprom_generic +ffffffff817aba30 T ixgbe_write_i2c_eeprom_generic +ffffffff817aba50 T ixgbe_identify_module_generic +ffffffff817abac0 T ixgbe_read_i2c_byte_generic_unlocked +ffffffff817abae0 T ixgbe_write_i2c_byte_generic_unlocked +ffffffff817abb00 T ixgbe_tn_check_overtemp +ffffffff817abb70 T ixgbe_check_reset_blocked +ffffffff817abbd0 T ixgbe_validate_phy_addr +ffffffff817abc40 T ixgbe_get_phy_id +ffffffff817abcf0 T ixgbe_get_phy_type_from_id +ffffffff817abdb0 T ixgbe_get_copper_link_capabilities_generic +ffffffff817abea0 T ixgbe_get_copper_speeds_supported +ffffffff817abf60 T ixgbe_check_phy_link_tnx +ffffffff817ac220 T ixgbe_setup_phy_link_tnx +ffffffff817ac4d0 T ixgbe_get_phy_firmware_version_tnx +ffffffff817ac500 T ixgbe_reset_phy_nl +ffffffff817ac7a0 T ixgbe_get_sfp_init_sequence_offsets +ffffffff817ac980 T ixgbe_is_sfp +ffffffff817ac9d0 T ixgbe_identify_sfp_module_generic +ffffffff817acdc0 T ixgbe_identify_qsfp_module_generic +ffffffff817ad0b0 T ixgbe_get_supported_phy_sfp_layer_generic +ffffffff817ad250 T ixgbe_is_sfp_probe +ffffffff817ad2a0 T ixgbe_read_i2c_byte_generic_int +ffffffff817ad4a0 T ixgbe_clock_out_i2c_byte +ffffffff817ad600 T ixgbe_get_i2c_ack +ffffffff817ad800 T ixgbe_write_i2c_byte_generic_int +ffffffff817ad930 T ixgbe_set_i2c_data +ffffffff817adae0 T ixgbe_raise_i2c_clk +ffffffff817adc00 T ixgbe_lower_i2c_clk +ffffffff817adc90 T ixgbe_clock_in_i2c_bit +ffffffff817ade60 T ixgbe_get_i2c_data +ffffffff817adf10 T ixgbe_set_copper_phy_power +ffffffff817ae000 t ixl_match +ffffffff817ae0a0 t ixl_attach +ffffffff817b0c40 t ixl_710_rd_ctl +ffffffff817b0dd0 t ixl_710_wr_ctl +ffffffff817b0f80 t ixl_710_set_rss_key +ffffffff817b1100 t ixl_710_set_rss_lut +ffffffff817b1180 t ixl_wakeup +ffffffff817b11a0 t ixl_722_rd_ctl +ffffffff817b11d0 t ixl_722_wr_ctl +ffffffff817b1200 t ixl_722_set_rss_key +ffffffff817b1230 t ixl_722_set_rss_lut +ffffffff817b1260 t ixl_dmamem_alloc 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oce_intr +ffffffff817c64a0 T oce_init_stats +ffffffff817c6510 T oce_init_queues +ffffffff817c6690 T oce_attach_ifp +ffffffff817c6780 T oce_tick +ffffffff817c67d0 T oce_refill_rx +ffffffff817c6860 T oce_attachhook +ffffffff817c6a00 T oce_dma_free +ffffffff817c6ab0 T oce_get_link_status +ffffffff817c6c30 T oce_first_mcc +ffffffff817c6d20 T oce_media_change +ffffffff817c6d50 T oce_media_status +ffffffff817c6e80 T oce_ioctl +ffffffff817c7020 T oce_start +ffffffff817c7120 T oce_watchdog +ffffffff817c7180 T oce_init +ffffffff817c7660 T oce_stop +ffffffff817c79a0 T oce_rxrinfo +ffffffff817c7ae0 T oce_iff +ffffffff817c7c20 T oce_update_mcast +ffffffff817c7d90 T oce_set_promisc +ffffffff817c7e30 T oce_link_status +ffffffff817c7ed0 T oce_update_stats +ffffffff817c7fb0 T oce_macaddr_set +ffffffff817c8210 T oce_config_vlan +ffffffff817c8430 T oce_set_flow_control +ffffffff817c8650 T oce_new_rq +ffffffff817c89c0 T oce_alloc_rx_bufs +ffffffff817c8b10 T oce_drain_eq +ffffffff817c8c30 T oce_cmd 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iwm_ampdu_tx_stop +ffffffff81829780 T iwm_set_hw_address_8000 +ffffffff81829a00 T iwm_parse_nvm_data +ffffffff81829c50 T iwm_parse_nvm_sections +ffffffff81829d50 T iwm_nvm_init +ffffffff8182a010 T iwm_firmware_load_sect +ffffffff8182a0c0 T iwm_firmware_load_chunk +ffffffff8182a370 T iwm_load_firmware_7000 +ffffffff8182a5c0 T iwm_load_cpu_sections_8000 +ffffffff8182a960 T iwm_load_firmware_8000 +ffffffff8182ab70 T iwm_load_firmware +ffffffff8182ac50 T iwm_start_fw +ffffffff8182ae20 T iwm_send_tx_ant_cfg +ffffffff8182aeb0 T iwm_send_phy_cfg_cmd +ffffffff8182af60 T iwm_send_dqa_cmd +ffffffff8182aff0 T iwm_load_ucode_wait_alive +ffffffff8182b230 T iwm_save_fw_paging +ffffffff8182b2a0 T iwm_send_paging_cmd +ffffffff8182b3f0 T iwm_free_fw_paging +ffffffff8182b560 T iwm_run_init_mvm_ucode +ffffffff8182b9b0 T iwm_send_bt_init_conf +ffffffff8182ba50 T iwm_sf_config +ffffffff8182bca0 T iwm_config_ltr +ffffffff8182bd60 T iwm_get_signal_strength +ffffffff8182bdc0 T iwm_rxmq_get_signal_strength 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iwm_get_vht_ctrl_pos +ffffffff8182e8e0 T iwm_phy_ctxt_cmd_uhb +ffffffff8182eb10 T iwm_phy_ctxt_cmd +ffffffff8182ec60 T iwm_update_sched +ffffffff8182ed30 T iwm_send_cmd_status +ffffffff8182ee50 T iwm_cmd_done +ffffffff8182eff0 T iwm_tx_fill_cmd +ffffffff8182f420 T iwm_rval2ridx +ffffffff8182f4b0 T iwm_tx +ffffffff8182fed0 T iwm_flush_tx_path +ffffffff8182ffa0 T iwm_wait_tx_queues_empty +ffffffff81830060 T iwm_led_enable +ffffffff81830090 T iwm_led_disable +ffffffff818300c0 T iwm_led_is_enabled +ffffffff81830120 T iwm_led_blink_timeout +ffffffff818301a0 T iwm_led_blink_start +ffffffff818301f0 T iwm_led_blink_stop +ffffffff81830240 T iwm_beacon_filter_send_cmd +ffffffff818302d0 T iwm_beacon_filter_set_cqm_params +ffffffff81830310 T iwm_update_beacon_abort +ffffffff81830400 T iwm_power_build_cmd +ffffffff81830490 T iwm_power_mac_update_mode +ffffffff818306a0 T iwm_power_update_device +ffffffff81830740 T iwm_enable_beacon_filter +ffffffff81830830 T iwm_disable_beacon_filter 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iwm_bgscan +ffffffff818333d0 T iwm_bgscan_done +ffffffff81833470 T iwm_bgscan_done_task +ffffffff818336d0 T iwm_umac_scan_abort +ffffffff81833760 T iwm_lmac_scan_abort +ffffffff81833800 T iwm_auth +ffffffff81833c00 T iwm_deauth +ffffffff81833f60 T iwm_run +ffffffff81834640 T iwm_allow_mcast +ffffffff81834740 T iwm_run_stop +ffffffff81834db0 T iwm_node_alloc +ffffffff81834dd0 T iwm_set_key_v1 +ffffffff81834f10 T iwm_set_key +ffffffff81835180 T iwm_delete_key_v1 +ffffffff818352b0 T iwm_delete_key +ffffffff81835520 T iwm_calib_timeout +ffffffff818355e0 T iwm_set_rate_table_vht +ffffffff81835900 T iwm_set_rate_table +ffffffff81835d00 T iwm_media_change +ffffffff81835ef0 T iwm_stop +ffffffff81836390 T iwm_init +ffffffff81836650 T iwm_newstate_task +ffffffff818367d0 T iwm_newstate +ffffffff81836930 T iwm_endscan +ffffffff81836980 T iwm_fill_sf_command +ffffffff81836a80 T iwm_send_soc_conf +ffffffff81836bc0 T iwm_send_update_mcc_cmd +ffffffff81836d80 T iwm_send_temp_report_ths_cmd +ffffffff81836e50 T iwm_tt_tx_backoff +ffffffff81836ee0 T iwm_fill_paging_mem +ffffffff81837110 T iwm_alloc_fw_paging_mem +ffffffff818372b0 T iwm_init_hw +ffffffff81837c80 T iwm_preinit +ffffffff81837ea0 T iwm_start +ffffffff81838070 T iwm_watchdog +ffffffff81838210 T iwm_nic_error +ffffffff81838700 T iwm_dump_driver_status +ffffffff818387a0 T iwm_ioctl +ffffffff81838910 T iwm_nic_umac_error +ffffffff81838d50 T iwm_desc_lookup +ffffffff81838ee0 T iwm_rx_pkt_valid +ffffffff81838f30 T iwm_rx_pkt +ffffffff81839cd0 T iwm_notif_intr +ffffffff81839e30 T iwm_intr +ffffffff8183a260 T iwm_intr_msix +ffffffff8183a500 T iwm_match +ffffffff8183a530 T iwm_attach_hook +ffffffff8183a570 T iwm_attach +ffffffff8183b640 T iwm_radiotap_attach +ffffffff8183b6d0 T iwm_init_task +ffffffff8183b790 T iwm_resume +ffffffff8183b8c0 T iwm_wakeup +ffffffff8183b970 T iwm_activate +ffffffff8183c000 T iwx_lookup_cmd_ver +ffffffff8183c070 T iwx_lookup_notif_ver +ffffffff8183c0e0 T iwx_is_mimo_ht_plcp +ffffffff8183c120 T iwx_store_cscheme +ffffffff8183c170 T iwx_ctxt_info_alloc_dma +ffffffff8183c210 T iwx_dma_contig_alloc +ffffffff8183c3f0 T iwx_ctxt_info_free_paging +ffffffff8183c550 T iwx_dma_contig_free +ffffffff8183c610 T iwx_get_num_sections +ffffffff8183c690 T iwx_init_fw_sec +ffffffff8183cb40 T iwx_fw_version_str +ffffffff8183cb80 T iwx_alloc_fw_monitor_block +ffffffff8183cc30 T iwx_alloc_fw_monitor +ffffffff8183ccf0 T iwx_apply_debug_destination +ffffffff8183d230 T iwx_nic_lock +ffffffff8183d380 T iwx_write_prph +ffffffff8183d420 T iwx_set_bits_prph +ffffffff8183d440 T iwx_clear_bits_prph +ffffffff8183d460 T iwx_read_prph +ffffffff8183d500 T iwx_nic_unlock +ffffffff8183d5b0 T iwx_set_ltr +ffffffff8183d700 T iwx_ctxt_info_init +ffffffff8183d9c0 T iwx_ctxt_info_free_fw_img +ffffffff8183db40 T iwx_ctxt_info_gen3_init +ffffffff8183e130 T iwx_write_umac_prph +ffffffff8183e1e0 T iwx_firmware_store_section +ffffffff8183e280 T iwx_set_default_calib +ffffffff8183e2d0 T iwx_fw_info_free +ffffffff8183e360 T iwx_read_firmware +ffffffff8183eef0 T iwx_prph_addr_mask +ffffffff8183ef30 T iwx_read_prph_unlocked +ffffffff8183efb0 T iwx_nic_assert_locked +ffffffff8183f010 T iwx_write_prph_unlocked +ffffffff8183f090 T iwx_write_prph64 +ffffffff8183f1c0 T iwx_read_umac_prph_unlocked +ffffffff8183f240 T iwx_read_umac_prph +ffffffff8183f2e0 T iwx_write_umac_prph_unlocked +ffffffff8183f360 T iwx_read_mem +ffffffff8183f490 T iwx_write_mem +ffffffff8183f5d0 T iwx_write_mem32 +ffffffff8183f6e0 T iwx_poll_bit +ffffffff8183f7b0 T iwx_set_bits_mask_prph +ffffffff8183f990 T iwx_alloc_rx_ring +ffffffff8183fb70 T iwx_rx_addbuf +ffffffff8183fd80 T iwx_free_rx_ring +ffffffff81840030 T iwx_disable_rx_dma +ffffffff81840290 T iwx_reset_rx_ring +ffffffff81840330 T iwx_alloc_tx_ring +ffffffff81840540 T iwx_free_tx_ring +ffffffff818407d0 T iwx_reset_tx_ring +ffffffff81840a30 T iwx_enable_rfkill_int +ffffffff81840b10 T iwx_check_rfkill +ffffffff81840b90 T iwx_enable_interrupts +ffffffff81840c40 T iwx_enable_fwload_interrupt +ffffffff81840d20 T iwx_restore_interrupts +ffffffff81840d50 T iwx_disable_interrupts +ffffffff81840e10 T iwx_ict_reset +ffffffff81840fd0 T iwx_set_hw_ready +ffffffff818411b0 T iwx_prepare_card_hw +ffffffff818412f0 T iwx_force_power_gating +ffffffff818413a0 T iwx_apm_config +ffffffff81841470 T iwx_apm_init +ffffffff818416d0 T iwx_apm_stop +ffffffff81841a90 T iwx_init_msix_hw +ffffffff81841b30 T iwx_conf_msix_hw +ffffffff818420d0 T iwx_clear_persistence_bit +ffffffff81842250 T iwx_start_hw +ffffffff81842650 T iwx_stop_device +ffffffff81842bc0 T iwx_nic_config +ffffffff81842c50 T iwx_nic_rx_init +ffffffff81842cb0 T iwx_nic_init +ffffffff81842dd0 T iwx_enable_txq +ffffffff818430a0 T iwx_send_cmd +ffffffff81843680 T iwx_free_resp +ffffffff81843700 T iwx_disable_txq +ffffffff81843960 T iwx_post_alive +ffffffff818439f0 T iwx_schedule_session_protection +ffffffff81843ac0 T iwx_send_cmd_pdu +ffffffff81843b40 T iwx_unprotect_session +ffffffff81843c10 T iwx_fw_valid_tx_ant +ffffffff81843c50 T iwx_fw_valid_rx_ant +ffffffff81843ca0 T iwx_init_channel_map +ffffffff81843ea0 T iwx_mimo_enabled +ffffffff81843ee0 T iwx_setup_ht_rates +ffffffff81843f90 T iwx_setup_vht_rates +ffffffff81844020 T iwx_init_reorder_buffer +ffffffff81844080 T iwx_clear_reorder_buffer +ffffffff81844140 T iwx_rx_ba_session_expired +ffffffff81844240 T iwx_rx_bar_frame_release +ffffffff818442f0 T iwx_release_frames +ffffffff818444e0 T iwx_reorder_timer_expired +ffffffff818446a0 T iwx_find_rxba_data +ffffffff81844730 T iwx_sta_rx_agg_baid_cfg_cmd +ffffffff81844980 T iwx_send_cmd_pdu_status +ffffffff81844a10 T iwx_sta_rx_agg_sta_cmd +ffffffff81844c60 T iwx_sta_rx_agg +ffffffff81844f30 T iwx_mac_ctxt_task +ffffffff818450c0 T iwx_mac_ctxt_cmd +ffffffff818452a0 T iwx_phy_ctxt_task +ffffffff81845460 T iwx_phy_ctxt_update +ffffffff818458c0 T iwx_updatechan +ffffffff81845980 T iwx_add_task +ffffffff818459f0 T iwx_updateprot +ffffffff81845ab0 T iwx_updateslot +ffffffff81845b70 T iwx_updateedca +ffffffff81845c30 T iwx_updatedtim +ffffffff81845cf0 T iwx_sta_tx_agg_start +ffffffff81845ee0 T iwx_ba_task +ffffffff81846030 T iwx_ampdu_rx_start +ffffffff81846110 T iwx_ampdu_rx_stop +ffffffff818461f0 T iwx_ampdu_tx_start +ffffffff81846300 T iwx_set_mac_addr_from_csr +ffffffff81846520 T iwx_flip_hw_address +ffffffff81846570 T iwx_is_valid_mac_addr +ffffffff81846610 T iwx_nvm_get +ffffffff818468e0 T iwx_load_firmware +ffffffff81846ac0 T iwx_start_fw +ffffffff81846ca0 T iwx_pnvm_handle_section +ffffffff81846f90 T iwx_ctxt_info_gen3_set_pnvm +ffffffff81846fe0 T iwx_pnvm_parse +ffffffff818470d0 T iwx_load_pnvm +ffffffff81847470 T iwx_send_tx_ant_cfg +ffffffff81847500 T iwx_send_phy_cfg_cmd +ffffffff818475b0 T iwx_send_dqa_cmd +ffffffff81847640 T iwx_load_ucode_wait_alive +ffffffff81847700 T iwx_run_init_mvm_ucode +ffffffff81847950 T iwx_config_ltr +ffffffff81847a10 T iwx_update_rx_desc +ffffffff81847ab0 T iwx_rxmq_get_signal_strength +ffffffff81847b00 T iwx_rx_rx_phy_cmd +ffffffff81847b60 T iwx_get_noise +ffffffff81847bd0 T iwx_ccmp_decap +ffffffff81847d10 T iwx_rx_hwdecrypt +ffffffff81847e10 T iwx_rx_frame +ffffffff818480d0 T iwx_detect_duplicate +ffffffff818481d0 T iwx_is_sn_less +ffffffff81848230 T iwx_oldsn_workaround +ffffffff818482f0 T iwx_rx_reorder +ffffffff81848920 T iwx_rx_mpdu_mq +ffffffff81848c70 T iwx_clear_tx_desc +ffffffff81848df0 T iwx_txd_done +ffffffff81848eb0 T iwx_txq_advance +ffffffff818491f0 T iwx_tx_update_byte_tbl +ffffffff81849290 T iwx_rx_tx_cmd +ffffffff818493f0 T iwx_clear_oactive +ffffffff81849470 T iwx_rx_compressed_ba +ffffffff818495f0 T iwx_rx_bmiss +ffffffff818496e0 T iwx_binding_cmd +ffffffff81849870 T iwx_get_vht_ctrl_pos +ffffffff818498e0 T iwx_phy_ctxt_cmd_uhb_v3_v4 +ffffffff81849b30 T iwx_phy_ctxt_cmd_v3_v4 +ffffffff81849d80 T iwx_phy_ctxt_cmd +ffffffff81849e80 T iwx_send_cmd_status +ffffffff81849fa0 T iwx_cmd_done +ffffffff8184a080 T iwx_fw_rateidx_ofdm +ffffffff8184a0e0 T iwx_fw_rateidx_cck +ffffffff8184a140 T iwx_tx_fill_cmd +ffffffff8184a3f0 T iwx_rval2ridx +ffffffff8184a480 T iwx_tx +ffffffff8184ab80 T iwx_flush_sta_tids +ffffffff8184ad30 T iwx_wait_tx_queues_empty +ffffffff8184adf0 T iwx_drain_sta +ffffffff8184af90 T iwx_flush_sta +ffffffff8184b2f0 T iwx_beacon_filter_send_cmd +ffffffff8184b380 T iwx_update_beacon_abort +ffffffff8184b490 T iwx_power_build_cmd +ffffffff8184b520 T iwx_power_mac_update_mode +ffffffff8184b740 T iwx_power_update_device +ffffffff8184b7e0 T iwx_enable_beacon_filter +ffffffff8184b8f0 T iwx_disable_beacon_filter +ffffffff8184b9e0 T iwx_add_sta_cmd +ffffffff8184bce0 T iwx_rm_sta_cmd +ffffffff8184bda0 T iwx_rm_sta +ffffffff8184c210 T iwx_disable_mgmt_queue +ffffffff8184c2f0 T iwx_umac_scan_fill_channels +ffffffff8184c430 T iwx_fill_probe_req +ffffffff8184c670 T iwx_config_umac_scan_reduced +ffffffff8184c7d0 T iwx_scan_umac_flags_v2 +ffffffff8184c810 T iwx_scan_umac_dwell_v10 +ffffffff8184c880 T iwx_scan_umac_fill_general_p_v10 +ffffffff8184c910 T iwx_scan_umac_fill_ch_p_v6 +ffffffff8184ca50 T iwx_umac_scan_v14 +ffffffff8184cd40 T iwx_mcc_update +ffffffff8184cdd0 T iwx_ridx2rate +ffffffff8184ce40 T iwx_ack_rates +ffffffff8184d100 T iwx_mac_ctxt_cmd_common +ffffffff8184d410 T iwx_mac_ctxt_cmd_fill_sta +ffffffff8184d4a0 T iwx_clear_statistics +ffffffff8184d580 T iwx_del_task +ffffffff8184d5e0 T iwx_scan +ffffffff8184d780 T iwx_scan_abort +ffffffff8184d830 T iwx_bgscan +ffffffff8184d8b0 T iwx_bgscan_done +ffffffff8184d950 T iwx_bgscan_done_task +ffffffff8184dac0 T iwx_umac_scan_abort +ffffffff8184db50 T iwx_enable_mgmt_queue +ffffffff8184dbe0 T iwx_rs_rval2idx +ffffffff8184dc50 T iwx_rs_ht_rates +ffffffff8184dd20 T iwx_rs_vht_rates +ffffffff8184dde0 T iwx_rs_init_v3 +ffffffff8184e210 T iwx_rs_init_v4 +ffffffff8184e650 T iwx_rs_init +ffffffff8184e6b0 T iwx_rs_update +ffffffff8184e950 T iwx_phy_send_rlc +ffffffff8184ea40 T iwx_auth +ffffffff8184f030 T iwx_deauth +ffffffff8184f2d0 T iwx_run +ffffffff8184f960 T iwx_sf_config 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cmpci_trigger_output +ffffffff81859210 T cmpci_trigger_input +ffffffff818594c0 T cmpci_mixerreg_read +ffffffff81859550 T cmpci_mixerreg_write +ffffffff818595c0 T cmpci_reg_partial_write_1 +ffffffff81859650 T cmpci_reg_partial_write_4 +ffffffff818596e0 T cmpci_reg_set_1 +ffffffff81859750 T cmpci_reg_clear_1 +ffffffff818597c0 T cmpci_reg_set_4 +ffffffff81859830 T cmpci_reg_clear_4 +ffffffff818598a0 T cmpci_reg_set_reg_misc +ffffffff818598e0 T cmpci_reg_clear_reg_misc +ffffffff81859930 T cmpci_rate_to_index +ffffffff818599b0 T cmpci_index_to_rate +ffffffff818599e0 T cmpci_index_to_divider +ffffffff81859a10 T cmpci_intr +ffffffff81859d10 T cmpci_set_mixer_gain +ffffffff8185a460 T cmpci_resume +ffffffff8185a4d0 T cmpci_alloc_dmamem +ffffffff8185a6a0 T cmpci_free_dmamem +ffffffff8185a770 T cmpci_find_dmamem +ffffffff8185a7d0 T cmpci_adjust +ffffffff8185a820 T cmpci_set_out_ports +ffffffff8185ae20 T cmpci_set_in_ports +ffffffff8185c000 T iha_pci_probe +ffffffff8185c070 T iha_pci_attach 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bnx_dma_free +ffffffff8186e3a0 T bnx_fw_sync +ffffffff8186e560 T bnx_load_rv2p_fw +ffffffff8186e670 T bnx_load_cpu_fw +ffffffff8186eb00 T bnx_init_cpus +ffffffff8186f4a0 T bnx_init_context +ffffffff8186fb50 T bnx_set_mac_addr +ffffffff8186fbc0 T bnx_stop +ffffffff8186fe90 T bnx_disable_intr +ffffffff8186fef0 T bnx_free_rx_chain +ffffffff8186ffc0 T bnx_free_tx_chain +ffffffff818700c0 T bnx_blockinit +ffffffff81870690 T bnx_get_buf +ffffffff81870870 T bnx_init_tx_context +ffffffff81870930 T bnx_init_tx_chain +ffffffff81870a70 T bnx_init_rx_context +ffffffff81870b30 T bnx_fill_rx_chain +ffffffff81870c70 T bnx_init_rx_chain +ffffffff81870d70 T bnx_phy_intr +ffffffff81870e10 T bnx_rx_intr +ffffffff81871170 T bnx_tx_intr +ffffffff818712e0 T bnx_enable_intr +ffffffff818713a0 T bnx_init +ffffffff818717c0 T bnx_iff +ffffffff81871be0 T bnx_tx_encap +ffffffff81871e20 T bnx_stats_update +ffffffff81873000 T vge_probe +ffffffff81873030 T vge_attach +ffffffff81873410 T vge_detach +ffffffff818734d0 T vge_read_eeprom +ffffffff818735d0 T vge_miipoll_stop +ffffffff818736a0 T vge_miipoll_start +ffffffff81873800 T vge_miibus_readreg +ffffffff818739e0 T vge_miibus_writereg +ffffffff81873bd0 T vge_cam_clear +ffffffff81873f30 T vge_cam_set +ffffffff818742f0 T vge_iff +ffffffff818744b0 T vge_reset +ffffffff81874640 T vge_allocmem +ffffffff81874a60 T vge_freemem +ffffffff81874bb0 T vge_intr +ffffffff81874db0 T vge_ioctl +ffffffff81874f00 T vge_start +ffffffff81875100 T vge_watchdog +ffffffff81875170 T vge_miibus_statchg +ffffffff818753b0 T vge_ifmedia_upd +ffffffff818753d0 T vge_ifmedia_sts +ffffffff81875430 T vge_tick +ffffffff81875500 T vge_stop +ffffffff81875700 T vge_newbuf +ffffffff81875930 T vge_tx_list_init +ffffffff818759e0 T vge_rx_list_init +ffffffff81875ae0 T vge_rxeof +ffffffff81875f10 T vge_txeof +ffffffff81876090 T vge_init +ffffffff81876820 T vge_encap +ffffffff81877000 T stge_match +ffffffff81877030 T stge_attach +ffffffff818778b0 T stge_mii_bitbang_read +ffffffff81877900 T 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jme_mediastatus +ffffffff81884820 T jme_mediachange +ffffffff81884880 T jme_eeprom_read_byte +ffffffff818849e0 T jme_eeprom_macaddr +ffffffff81884b20 T jme_reg_macaddr +ffffffff81884bc0 T jme_map_intr_vector +ffffffff81884c60 T jme_intr +ffffffff81884e10 T jme_reset +ffffffff81884e80 T jme_dma_alloc +ffffffff81885450 T jme_ioctl +ffffffff818855a0 T jme_start +ffffffff818856f0 T jme_watchdog +ffffffff81885790 T jme_tick +ffffffff818857f0 T jme_detach +ffffffff818858b0 T jme_stop +ffffffff81885b90 T jme_dma_free +ffffffff81885cc0 T jme_encap +ffffffff81885f50 T jme_init +ffffffff818866c0 T jme_iff +ffffffff81886820 T jme_discard_rxbufs +ffffffff818868a0 T jme_rxpkt +ffffffff81886c10 T jme_newbuf +ffffffff81886d80 T jme_init_rx_ring +ffffffff81886ea0 T jme_set_vlan +ffffffff81887000 T age_match +ffffffff81887030 T age_attach +ffffffff81887490 T age_intr +ffffffff81887680 T age_phy_reset +ffffffff81887f40 T age_reset +ffffffff81888070 T age_dma_alloc +ffffffff818887e0 T age_get_macaddr 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alc_match +ffffffff8188c030 T alc_attach +ffffffff8188c880 T alc_detach +ffffffff8188c950 T alc_activate +ffffffff8188c9d0 T alc_miibus_readreg +ffffffff8188cb90 T alc_mii_readreg_816x +ffffffff8188cc90 T alc_mii_readreg_813x +ffffffff8188cda0 T alc_miibus_writereg +ffffffff8188cf70 T alc_mii_writereg_816x +ffffffff8188d080 T alc_mii_writereg_813x +ffffffff8188d180 T alc_miibus_statchg +ffffffff8188d530 T alc_stop_mac +ffffffff8188d620 T alc_start_queue +ffffffff8188d6d0 T alc_mac_config +ffffffff8188d7a0 T alc_aspm +ffffffff8188d870 T alc_dsp_fixup +ffffffff8188de90 T alc_miidbg_readreg +ffffffff8188ded0 T alc_miidbg_writereg +ffffffff8188df20 T alc_miiext_readreg +ffffffff8188e050 T alc_miiext_writereg +ffffffff8188e190 T alc_mediastatus +ffffffff8188e200 T alc_mediachange +ffffffff8188e260 T alc_get_macaddr +ffffffff8188e280 T alc_get_macaddr_816x +ffffffff8188e510 T alc_get_macaddr_813x +ffffffff8188e9c0 T alc_get_macaddr_par +ffffffff8188ea70 T alc_disable_l0s_l1 +ffffffff8188eb00 T alc_phy_reset +ffffffff8188eb20 T alc_phy_reset_816x +ffffffff8188f3b0 T alc_phy_reset_813x +ffffffff8188f7a0 T alc_phy_down +ffffffff8188f8d0 T alc_aspm_816x +ffffffff8188f980 T alc_aspm_813x +ffffffff8188fb70 T alc_init_pcie +ffffffff8188ff00 T alc_config_msi +ffffffff8188ffd0 T alc_intr +ffffffff818901b0 T alc_reset +ffffffff81890580 T alc_dma_alloc +ffffffff81890cf0 T alc_ioctl +ffffffff81890e40 T alc_start +ffffffff81890fe0 T alc_watchdog +ffffffff81891060 T alc_tick +ffffffff818910c0 T alc_dma_free +ffffffff81891380 T alc_stop +ffffffff818916d0 T alc_init +ffffffff818925f0 T alc_encap +ffffffff81892820 T alc_txeof +ffffffff81892a10 T alc_iff +ffffffff81892b70 T alc_stats_clear +ffffffff81892cb0 T alc_stats_update +ffffffff81893110 T alc_rxintr +ffffffff81893330 T alc_newbuf +ffffffff818934b0 T alc_rxeof +ffffffff81893740 T alc_osc_reset +ffffffff818938d0 T alc_init_rx_ring +ffffffff818939d0 T alc_init_rr_ring +ffffffff81893a50 T alc_init_tx_ring +ffffffff81893b00 T alc_init_cmb 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T ale_stats_update +ffffffff81897cb0 T ale_rxeof +ffffffff81897f50 T ale_rx_update_page +ffffffff81898090 T ale_rxcsum +ffffffff81898140 T ale_init_rx_pages +ffffffff81898270 T ale_init_tx_ring +ffffffff81898360 T ale_rxvlan +ffffffff81899000 T amdpm_match +ffffffff81899030 T amdpm_attach +ffffffff818993a0 T amdpm_activate +ffffffff81899410 T amdpm_rnd_callout +ffffffff81899470 T amdpm_i2c_acquire_bus +ffffffff818994c0 T amdpm_i2c_release_bus +ffffffff81899510 T amdpm_i2c_exec +ffffffff81899870 T amdpm_get_timecount +ffffffff818998a0 T amdpm_intr +ffffffff8189a000 T bce_probe +ffffffff8189a030 T bce_attach +ffffffff8189aae0 T bce_activate +ffffffff8189ab50 T bce_intr +ffffffff8189ae50 T bce_reset +ffffffff8189b410 T bce_ioctl +ffffffff8189b570 T bce_start +ffffffff8189b7c0 T bce_watchdog +ffffffff8189b810 T bce_mii_read +ffffffff8189b950 T bce_mii_write +ffffffff8189ba80 T bce_statchg +ffffffff8189be10 T bce_mediachange +ffffffff8189be60 T bce_mediastatus +ffffffff8189bec0 T bce_tick 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rtw_pci_disable +ffffffff818a1000 T rtwn_pci_match +ffffffff818a1030 T rtwn_pci_attach +ffffffff818a1590 T rtwn_pci_detach +ffffffff818a16a0 T rtwn_pci_activate +ffffffff818a16c0 T rtwn_calib_to +ffffffff818a1720 T rtwn_scan_to +ffffffff818a1740 T rtwn_intr +ffffffff818a1a20 T rtwn_alloc_rx_list +ffffffff818a1d40 T rtwn_alloc_tx_list +ffffffff818a1f80 T rtwn_free_rx_list +ffffffff818a20d0 T rtwn_pci_write_1 +ffffffff818a2100 T rtwn_pci_write_2 +ffffffff818a2130 T rtwn_pci_write_4 +ffffffff818a2160 T rtwn_pci_read_1 +ffffffff818a2190 T rtwn_pci_read_2 +ffffffff818a21c0 T rtwn_pci_read_4 +ffffffff818a21f0 T rtwn_tx +ffffffff818a27c0 T rtwn_power_on +ffffffff818a27f0 T rtwn_dma_init +ffffffff818a2ba0 T rtwn_pci_load_firmware +ffffffff818a2c50 T rtwn_fw_loadpage +ffffffff818a2d90 T rtwn_mac_init +ffffffff818a2f10 T rtwn_bb_init +ffffffff818a33b0 T rtwn_alloc_buffers +ffffffff818a33e0 T rtwn_pci_init +ffffffff818a34b0 T rtwn_pci_stop +ffffffff818a3600 T rtwn_is_oactive +ffffffff818a3640 T rtwn_next_calib +ffffffff818a3660 T rtwn_cancel_calib +ffffffff818a36a0 T rtwn_pci_next_scan +ffffffff818a36c0 T rtwn_cancel_scan +ffffffff818a3700 T rtwn_wait_async +ffffffff818a3730 T rtwn_free_tx_list +ffffffff818a38a0 T rtwn_setup_rx_desc +ffffffff818a3910 T rtwn_reset_rx_list +ffffffff818a39b0 T rtwn_reset_tx_list +ffffffff818a3b00 T rtwn_rx_frame +ffffffff818a3f60 T rtwn_tx_done +ffffffff818a40f0 T rtwn_poll_c2h_events +ffffffff818a42b0 T rtwn_pci_92c_stop +ffffffff818a4490 T rtwn_pci_88e_stop +ffffffff818a4870 T rtwn_pci_23a_stop +ffffffff818a4c10 T rtwn_88e_intr +ffffffff818a4f60 T rtwn_llt_write +ffffffff818a5020 T rtwn_llt_init +ffffffff818a52f0 T rtwn_92c_power_on +ffffffff818a5770 T rtwn_88e_power_on +ffffffff818a5b70 T rtwn_23a_power_on +ffffffff818a5fe0 T rtwn_tx_report +ffffffff818a7000 T ral_pci_match +ffffffff818a7030 T ral_pci_attach +ffffffff818a7210 T ral_pci_detach +ffffffff818a72b0 T ral_pci_activate +ffffffff818a7340 T ral_pci_wakeup +ffffffff818a8000 T acx_pci_match +ffffffff818a8030 T acx_pci_attach +ffffffff818a8260 T acx_pci_detach +ffffffff818a9000 T pgt_pci_match +ffffffff818a9030 T pgt_pci_attach +ffffffff818a9200 T pgt_pci_detach +ffffffff818aa000 T malo_pci_match +ffffffff818aa030 T malo_pci_attach +ffffffff818aa1e0 T malo_pci_detach +ffffffff818aa230 T malo_pci_activate +ffffffff818aa290 T malo_pci_wakeup +ffffffff818ab000 T bwi_pci_match +ffffffff818ab070 T bwi_pci_attach +ffffffff818ab290 T bwi_pci_detach +ffffffff818ab2e0 T bwi_pci_activate +ffffffff818ab350 T bwi_reset_bcm4331 +ffffffff818ab470 T bwi_pci_conf_write +ffffffff818ab4a0 T bwi_pci_conf_read +ffffffff818ab4d0 T bwi_pci_wakeup +ffffffff818ac000 T piixpm_match +ffffffff818ac030 T piixpm_attach +ffffffff818ac4c0 T piixpm_intr +ffffffff818ac5d0 T piixpm_i2c_acquire_bus +ffffffff818ac6b0 T piixpm_i2c_release_bus +ffffffff818ac790 T piixpm_i2c_exec +ffffffff818ad000 T vic_match +ffffffff818ad0a0 T vic_attach +ffffffff818ad440 T vic_intr +ffffffff818ad4c0 T vic_query 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vmxnet3_stop +ffffffff818b3270 T vmxnet3_reset +ffffffff818b32b0 t vmx_kstat_create +ffffffff818b3490 t vmx_kstat_read +ffffffff818b4000 T vmwpvs_match +ffffffff818b4040 T vmwpvs_attach +ffffffff818b4df0 T vmwpvs_scsi_cmd +ffffffff818b5260 T vmwpvs_intx +ffffffff818b52e0 T vmwpvs_msg_task +ffffffff818b5560 T vmwpvs_intr +ffffffff818b5740 T vmwpvs_get_config +ffffffff818b5940 T vmwpvs_dmamem_zalloc +ffffffff818b59a0 T vmwpvs_dmamem_alloc +ffffffff818b5b20 T vmwpvs_ccb_put +ffffffff818b5b80 T vmwpvs_setup_rings +ffffffff818b5cb0 T vmwpvs_setup_msg_ring +ffffffff818b5da0 T vmwpvs_ccb_get +ffffffff818b5e20 T vmwpvs_dmamem_free +ffffffff818b5ea0 T vmwpvs_cmd +ffffffff818b5f50 T vmwpvs_scsi_cmd_done +ffffffff818b6130 T vmwpvs_scsi_cmd_poll +ffffffff818b7000 T lii_match +ffffffff818b7030 T lii_attach +ffffffff818b7440 T lii_activate +ffffffff818b7540 T lii_reset +ffffffff818b7810 T lii_spi_configure +ffffffff818b7900 T lii_eeprom_present +ffffffff818b7990 T lii_eeprom_read +ffffffff818b79c0 T lii_spi_read +ffffffff818b7c80 T lii_read_macaddr +ffffffff818b7df0 T lii_intr +ffffffff818b7f00 T lii_alloc_rings +ffffffff818b8110 T lii_tick +ffffffff818b8160 T lii_mii_readreg +ffffffff818b8400 T lii_mii_writereg +ffffffff818b86a0 T lii_mii_statchg +ffffffff818b8710 T lii_media_change +ffffffff818b8760 T lii_media_status +ffffffff818b87c0 T lii_ioctl +ffffffff818b8950 T lii_start +ffffffff818b8b00 T lii_watchdog +ffffffff818b8b40 T lii_stop +ffffffff818b8bb0 T lii_init +ffffffff818b90b0 T lii_iff +ffffffff818b91f0 T lii_tx_put +ffffffff818b9300 T lii_free_tx_space +ffffffff818b9340 T lii_rxintr +ffffffff818b94f0 T lii_txintr +ffffffff818ba000 T ichiic_match +ffffffff818ba030 T ichiic_attach +ffffffff818ba220 T ichiic_intr +ffffffff818ba330 T ichiic_i2c_acquire_bus +ffffffff818ba380 T ichiic_i2c_release_bus +ffffffff818ba3d0 T ichiic_i2c_exec +ffffffff818bb000 T viapm_match +ffffffff818bb030 T viapm_attach +ffffffff818bb650 T viapm_intr +ffffffff818bb760 T viapm_i2c_acquire_bus +ffffffff818bb7b0 T viapm_i2c_release_bus +ffffffff818bb800 T viapm_i2c_exec +ffffffff818bbb20 T viapm_refresh_sensor_data +ffffffff818bbe50 T viapm_refresh +ffffffff818bbe80 T val_to_uK +ffffffff818bbf20 T val_to_rpm +ffffffff818bbf60 T val_to_uV +ffffffff818bc000 T viapm_get_timecount +ffffffff818bd000 T amdiic_match +ffffffff818bd030 T amdiic_attach +ffffffff818bd200 T amdiic_intr +ffffffff818bd2d0 T amdiic_i2c_acquire_bus +ffffffff818bd320 T amdiic_i2c_release_bus +ffffffff818bd370 T amdiic_i2c_exec +ffffffff818bd5d0 T amdiic_read +ffffffff818bd740 T amdiic_wait +ffffffff818bd7e0 T amdiic_write +ffffffff818be000 T nviic_match +ffffffff818be030 T nviic_attach +ffffffff818be280 T nviic_i2c_acquire_bus +ffffffff818be2d0 T nviic_i2c_release_bus +ffffffff818be310 T nviic_i2c_exec +ffffffff818be530 T nviic_write +ffffffff818be580 T nviic_read +ffffffff818bf000 T sdhc_pci_match +ffffffff818bf060 T sdhc_pci_attach +ffffffff818bf3a0 T sdhc_pci_activate +ffffffff818bf400 T sdhc_takecontroller +ffffffff818bf4a0 T sdhc_ricohfix +ffffffff818bf610 T sdhc_pci_conf_write +ffffffff818c0000 T kate_match +ffffffff818c0170 T kate_attach +ffffffff818c0420 T kate_refresh +ffffffff818c1000 T km_match +ffffffff818c1050 T km_attach +ffffffff818c10f0 T km_refresh +ffffffff818c2000 T ksmn_match +ffffffff818c2050 T ksmn_attach +ffffffff818c2230 T ksmn_ccd_attach +ffffffff818c2380 T ksmn_refresh +ffffffff818c24d0 T ksmn_read_reg +ffffffff818c3000 t iosf_pci_match +ffffffff818c3060 t iosf_pci_attach +ffffffff818c3100 t iosf_pci_mbi_mdr_rd +ffffffff818c3160 t iosf_pci_mbi_mdr_wr +ffffffff818c4000 T itherm_probe +ffffffff818c4030 T itherm_attach +ffffffff818c4380 T itherm_activate +ffffffff818c4400 T itherm_enable +ffffffff818c4460 T itherm_refresh +ffffffff818c4470 T itherm_refresh_sensor_data +ffffffff818c4860 T itherm_bias_temperature_sensor +ffffffff818c5000 T pchtemp_match +ffffffff818c5030 T pchtemp_attach +ffffffff818c5190 T pchtemp_refresh +ffffffff818c6000 T rtsx_pci_match +ffffffff818c6090 T rtsx_pci_attach +ffffffff818c7000 T xspd_match +ffffffff818c7030 T xspd_attach +ffffffff818c71f0 T xspd_intr +ffffffff818c8000 T virtio_pci_match +ffffffff818c8080 T virtio_pci_attach +ffffffff818c8430 T virtio_pci_detach +ffffffff818c8510 T virtio_pci_kick +ffffffff818c8570 T virtio_pci_read_device_config_1 +ffffffff818c85a0 T virtio_pci_read_device_config_2 +ffffffff818c85d0 T virtio_pci_read_device_config_4 +ffffffff818c8600 T virtio_pci_read_device_config_8 +ffffffff818c8680 T virtio_pci_write_device_config_1 +ffffffff818c86b0 T virtio_pci_write_device_config_2 +ffffffff818c86e0 T virtio_pci_write_device_config_4 +ffffffff818c8710 T virtio_pci_write_device_config_8 +ffffffff818c8780 T virtio_pci_read_queue_size +ffffffff818c87f0 T virtio_pci_setup_queue +ffffffff818c8ae0 T virtio_pci_set_status +ffffffff818c8b60 T virtio_pci_negotiate_features +ffffffff818c8ca0 T virtio_pci_poll_intr +ffffffff818c8d10 T virtio_pci_find_cap +ffffffff818c8ed0 T virtio_pci_attach_10 +ffffffff818c9310 T virtio_pci_attach_09 +ffffffff818c9450 T virtio_pci_adjust_config_region +ffffffff818c94f0 T virtio_pci_setup_msix +ffffffff818c9850 T virtio_pci_legacy_intr +ffffffff818c98f0 T virtio_pci_legacy_intr_mpsafe +ffffffff818c9980 T virtio_pci_free_irqs +ffffffff818c9bd0 T virtio_pci_negotiate_features_10 +ffffffff818c9e10 T virtio_pci_msix_establish +ffffffff818c9ee0 T virtio_pci_set_msix_queue_vector +ffffffff818c9f60 T virtio_pci_set_msix_config_vector +ffffffff818c9fa0 T virtio_pci_config_intr +ffffffff818c9fe0 T virtio_pci_shared_queue_intr +ffffffff818c9ff0 T virtio_pci_queue_intr +ffffffff818cb000 T dwiic_pci_match +ffffffff818cb030 T dwiic_pci_attach +ffffffff818cb350 T dwiic_pci_activate +ffffffff818cb3c0 T dwiic_pci_bus_scan +ffffffff818cc000 T bwfm_pci_buscore_read +ffffffff818cc060 T bwfm_pci_buscore_write +ffffffff818cc0d0 T bwfm_pci_buscore_prepare +ffffffff818cc100 T bwfm_pci_buscore_reset +ffffffff818cc2f0 T bwfm_pci_buscore_activate +ffffffff818cc320 T bwfm_pci_preinit +ffffffff818cd440 T bwfm_pci_stop +ffffffff818cd4d0 T bwfm_pci_txcheck +ffffffff818cd590 T bwfm_pci_txdata +ffffffff818cd8f0 T bwfm_pci_msgbuf_query_dcmd +ffffffff818cdd30 T bwfm_pci_msgbuf_set_dcmd +ffffffff818cdd80 T bwfm_pci_match +ffffffff818cddb0 T bwfm_pci_attach +ffffffff818ce020 T bwfm_pci_detach +ffffffff818ce060 T bwfm_pci_activate +ffffffff818ce210 T bwfm_pci_intr +ffffffff818ce470 T bwfm_pci_select_core +ffffffff818ce550 T bwfm_pci_load_microcode +ffffffff818ce9d0 T bwfm_pci_dmamem_alloc +ffffffff818ceb70 T bwfm_pci_setup_ring +ffffffff818ced80 T bwfm_pci_intr_enable +ffffffff818cedd0 T bwfm_pci_hostready +ffffffff818cee40 T bwfm_pci_fill_rx_rings +ffffffff818cee90 T bwfm_pci_dmamem_free +ffffffff818cef00 T bwfm_pci_cleanup +ffffffff818cf570 T bwfm_pci_send_mb_data +ffffffff818cf690 T bwfm_pci_intmask +ffffffff818cf6d0 T bwfm_pci_pktid_avail +ffffffff818cf740 T bwfm_pci_pktid_new +ffffffff818cf8a0 T bwfm_pci_pktid_free +ffffffff818cf950 T bwfm_pci_fill_rx_buf_ring +ffffffff818cfcb0 T bwfm_pci_fill_rx_ioctl_ring +ffffffff818d0030 T bwfm_pci_ring_write_reserve +ffffffff818d0120 T bwfm_pci_ring_write_cancel +ffffffff818d0160 T bwfm_pci_ring_write_commit +ffffffff818d0240 T bwfm_pci_ring_write_rptr +ffffffff818d02c0 T bwfm_pci_ring_write_wptr +ffffffff818d0340 T bwfm_pci_setup_flowring +ffffffff818d04a0 T bwfm_pci_ring_bell +ffffffff818d04e0 T bwfm_pci_ring_update_rptr +ffffffff818d0590 T bwfm_pci_ring_update_wptr +ffffffff818d0640 T bwfm_pci_ring_write_reserve_multi +ffffffff818d0760 T bwfm_pci_ring_read_avail +ffffffff818d0860 T bwfm_pci_ring_read_commit +ffffffff818d08f0 T bwfm_pci_ring_rx +ffffffff818d0b00 T bwfm_pci_msg_rx +ffffffff818d10e0 T bwfm_pci_flowring_delete_cb +ffffffff818d1190 T bwfm_pci_msgbuf_rxioctl +ffffffff818d1280 T bwfm_pci_intr_status +ffffffff818d12c0 T bwfm_pci_intr_ack +ffffffff818d1300 T bwfm_pci_flowring_lookup +ffffffff818d1470 T bwfm_pci_flowring_create +ffffffff818d15a0 T bwfm_pci_flowring_create_cb +ffffffff818d18f0 T bwfm_pci_flowring_delete +ffffffff818d1bc0 T bwfm_pci_msgbuf_h2d_mb_write +ffffffff818d1de0 T bwfm_pci_handle_mb_data +ffffffff818d1eb0 T bwfm_pci_intr_disable +ffffffff818d2000 T ccp_pci_match +ffffffff818d2030 T ccp_pci_attach +ffffffff818d3000 T bnxt_match +ffffffff818d3030 T bnxt_attach +ffffffff818d42a0 T bnxt_dmamem_alloc +ffffffff818d4430 T bnxt_dmamem_free +ffffffff818d44c0 T bnxt_hwrm_ver_get +ffffffff818d4610 T bnxt_hwrm_nvm_get_dev_info +ffffffff818d4760 T bnxt_hwrm_func_drv_rgtr +ffffffff818d4880 T bnxt_hwrm_func_rgtr_async_events +ffffffff818d49a0 T bnxt_hwrm_func_qcaps +ffffffff818d4a80 T bnxt_admin_intr +ffffffff818d4c80 T bnxt_intr +ffffffff818d5150 T bnxt_hwrm_func_qcfg +ffffffff818d5200 T bnxt_hwrm_queue_qportcfg +ffffffff818d52d0 T bnxt_hwrm_func_reset +ffffffff818d5380 T bnxt_mark_cpr_invalid +ffffffff818d53e0 T bnxt_hwrm_ring_alloc +ffffffff818d5590 T bnxt_cfg_async_cr +ffffffff818d5690 T bnxt_write_cp_doorbell +ffffffff818d56d0 T bnxt_set_cp_ring_aggint +ffffffff818d57b0 T bnxt_ioctl +ffffffff818d5940 T bnxt_start +ffffffff818d5d60 T bnxt_watchdog +ffffffff818d5d90 T bnxt_media_change +ffffffff818d5ee0 T bnxt_media_status +ffffffff818d5f00 T bnxt_refill +ffffffff818d5f60 T bnxt_media_autonegotiate +ffffffff818d6050 T bnxt_hwrm_port_phy_qcfg +ffffffff818d64f0 T bnxt_free_slots +ffffffff818d6580 T bnxt_hwrm_cmd_hdr_init +ffffffff818d65d0 T hwrm_send_message +ffffffff818d6650 T bnxt_queue_up +ffffffff818d7580 T bnxt_hwrm_stat_ctx_alloc +ffffffff818d7680 T bnxt_write_tx_doorbell +ffffffff818d76f0 T bnxt_write_rx_doorbell +ffffffff818d7770 T bnxt_hwrm_ring_grp_alloc +ffffffff818d7870 T bnxt_rx_fill +ffffffff818d7980 T bnxt_hwrm_ring_grp_free +ffffffff818d7a60 T bnxt_hwrm_ring_free +ffffffff818d7b50 T bnxt_hwrm_stat_ctx_free +ffffffff818d7c40 T bnxt_queue_down +ffffffff818d8320 T bnxt_up +ffffffff818d89f0 T bnxt_hwrm_vnic_ctx_alloc +ffffffff818d8ad0 T bnxt_hwrm_vnic_alloc +ffffffff818d8bd0 T bnxt_hwrm_vnic_cfg +ffffffff818d8d10 T bnxt_hwrm_vnic_cfg_placement +ffffffff818d8de0 T bnxt_hwrm_set_filter +ffffffff818d8f70 T bnxt_hwrm_vnic_rss_cfg +ffffffff818d9050 T bnxt_iff +ffffffff818d91c0 T bnxt_hwrm_vnic_free +ffffffff818d92b0 T bnxt_hwrm_vnic_ctx_free +ffffffff818d93a0 T bnxt_down +ffffffff818d9740 T bnxt_hwrm_free_filter +ffffffff818d9820 T bnxt_hwrm_cfa_l2_set_rx_mask +ffffffff818d9900 T bnxt_rxrinfo +ffffffff818d9a50 T bnxt_get_sffpage +ffffffff818d9d60 T bnxt_load_mbuf +ffffffff818d9e10 T bnxt_handle_async_event +ffffffff818d9e60 T bnxt_cpr_next_cmpl +ffffffff818d9ed0 T bnxt_cpr_commit +ffffffff818d9f00 T bnxt_cpr_rollback +ffffffff818d9f30 T bnxt_write_cp_doorbell_index +ffffffff818d9fb0 T bnxt_rx +ffffffff818da290 T bnxt_txeof +ffffffff818da3c0 T bnxt_get_media_type +ffffffff818da920 T bnxt_add_media_type +ffffffff818daaf0 T _hwrm_send_message +ffffffff818dd9a0 T bnxt_rx_fill_slots +ffffffff818ddb60 T bnxt_hwrm_err_map +ffffffff818ddba0 T _bnxt_hwrm_set_async_event_bit +ffffffff818de000 t mcx_match +ffffffff818de030 t mcx_attach +ffffffff818e1110 T mcx_rx_fill +ffffffff818e1360 T mcx_load_mbuf +ffffffff818e1410 t mcx_dmamem_alloc +ffffffff818e1570 t mcx_pages +ffffffff818e1e50 t mcx_iff +ffffffff818e2290 t mcx_alloc_uar +ffffffff818e2480 t mcx_admin_intr +ffffffff818e2630 t mcx_create_eq +ffffffff818e2bc0 t mcx_ioctl +ffffffff818e36a0 t mcx_start +ffffffff818e3ba0 t mcx_watchdog +ffffffff818e3bd0 t mcx_media_change +ffffffff818e3e90 t mcx_media_status +ffffffff818e3fd0 t mcx_refill +ffffffff818e4040 t mcx_cq_intr +ffffffff818e4560 t mcx_calibrate +ffffffff818e4720 t mcx_port_change +ffffffff818e4860 t mcx_cmdq_post +ffffffff818e4940 t mcx_set_flow_table_entry_mac +ffffffff818e4e10 t mcx_delete_flow_table_entry +ffffffff818e5290 t mcx_access_hca_reg +ffffffff818e56c0 t mcx_cmdq_exec +ffffffff818e58c0 t mcx_up +ffffffff818e8bc0 t mcx_down +ffffffff818e9c20 t mcx_create_flow_table +ffffffff818e9fd0 t mcx_create_flow_group +ffffffff818ea4b0 t mcx_destroy_sq +ffffffff818ea760 t mcx_destroy_cq +ffffffff818eaa20 t mcx_arm_cq +ffffffff818eab40 t mcx_destroy_flow_table +ffffffff818eaea0 t mcx_kstat_attach_ppcnt +ffffffff818eafd0 t mcx_kstat_ppcnt_read +ffffffff818eb0f0 t mcx_kstat_mtmp_read +ffffffff818eb280 t mcx_kstat_queue_read +ffffffff818ec710 t mcx_timecounter_read +ffffffff818ed000 t iavf_match +ffffffff818ed030 t iavf_attach +ffffffff818ed900 t iavf_reset +ffffffff818edbd0 t iavf_dmamem_alloc +ffffffff818edd30 t iavf_arq_fill +ffffffff818edfe0 t iavf_arq_timeout +ffffffff818ee010 t iavf_init_admin_queue +ffffffff818ee1c0 t iavf_get_version +ffffffff818ee3e0 t iavf_get_vf_resources +ffffffff818ee5b0 t iavf_config_irq_map +ffffffff818ee7a0 t iavf_intr +ffffffff818eee20 t iavf_ioctl +ffffffff818ef9d0 t iavf_start +ffffffff818efd20 t iavf_watchdog +ffffffff818efd50 t iavf_media_change +ffffffff818efd80 t iavf_media_status +ffffffff818efe10 t iavf_arq_unfill +ffffffff818eff10 t iavf_down +ffffffff818f0470 t iavf_up +ffffffff818f10e0 t iavf_queue_select +ffffffff818f12e0 t iavf_rxfill +ffffffff818f14e0 t iavf_rxrefill +ffffffff818f1500 t iavf_process_arq +ffffffff818f2000 T rge_match +ffffffff818f2030 T rge_attach +ffffffff818f2520 T rge_activate +ffffffff818f2660 T rge_intr +ffffffff818f2950 T rge_config_imtype +ffffffff818f29c0 T rge_exit_oob +ffffffff818f31e0 T rge_hw_init +ffffffff818f35d0 T rge_get_macaddr +ffffffff818f3650 T rge_set_phy_power +ffffffff818f38b0 T rge_phy_config +ffffffff818f41f0 T rge_allocmem +ffffffff818f4600 T rge_ioctl +ffffffff818f47b0 T rge_start +ffffffff818f4980 T rge_watchdog +ffffffff818f49c0 T rge_wol +ffffffff818f4bf0 T rge_tick +ffffffff818f4c70 T rge_txstart +ffffffff818f4ca0 T rge_ifmedia_upd +ffffffff818f5260 T rge_ifmedia_sts +ffffffff818f5350 T rge_add_media_types +ffffffff818f5400 T rge_kstat_attach +ffffffff818f56e0 T rge_wol_power +ffffffff818f57c0 T rge_rxeof +ffffffff818f5bc0 T rge_txeof +ffffffff818f5dc0 T rge_init +ffffffff818f6f80 T rge_setup_intr +ffffffff818f70f0 T rge_encap +ffffffff818f7390 T rge_stop +ffffffff818f75f0 T rge_iff +ffffffff818f7770 T rge_set_macaddr +ffffffff818f7840 T rge_rx_list_init +ffffffff818f7900 T rge_tx_list_init +ffffffff818f79c0 T rge_read_csi +ffffffff818f7c30 T rge_write_csi +ffffffff818f7eb0 T rge_write_mac_ocp +ffffffff818f7f00 T rge_read_mac_ocp +ffffffff818f7f80 T rge_reset +ffffffff818f8140 T rge_write_phy_ocp +ffffffff818f8200 T rge_read_phy_ocp +ffffffff818f82b0 T rge_read_phy +ffffffff818f8380 T rge_write_phy +ffffffff818f8460 T rge_get_link_status +ffffffff818f84c0 T rge_newbuf +ffffffff818f8640 T rge_discard_rxbuf +ffffffff818f86b0 T rge_fill_rx_ring +ffffffff818f8730 T rge_phy_config_mac_cfg2 +ffffffff818fa140 T rge_phy_config_mac_cfg3 +ffffffff818fbdf0 T rge_phy_config_mac_cfg4 +ffffffff818ffe60 T rge_phy_config_mac_cfg5 +ffffffff81900950 T rge_patch_phy_mcu +ffffffff81900bd0 T rge_write_ephy +ffffffff81900e30 T rge_phy_config_mcu +ffffffff819018f0 T rge_read_ephy +ffffffff81901b70 T rge_disable_phy_ocp_pwrsave +ffffffff81901d40 T rge_disable_hw_im +ffffffff81901d70 T rge_disable_sim_im +ffffffff81901dd0 T rge_setup_sim_im +ffffffff81901e50 T rge_link_state +ffffffff81901ed0 t rge_kstat_read +ffffffff81902070 t rge_kstat_copy +ffffffff81903000 T igc_match +ffffffff81903030 T igc_attach +ffffffff819034a0 T igc_detach +ffffffff819036a0 T igc_identify_hardware +ffffffff81903710 T igc_allocate_pci_resources +ffffffff81903830 T igc_allocate_queues +ffffffff81903d20 T igc_is_valid_ether_addr +ffffffff81903d80 T igc_allocate_msix +ffffffff81903fe0 T igc_setup_interface +ffffffff81904220 T igc_reset +ffffffff81904360 T igc_update_link_status +ffffffff81904470 T igc_get_hw_control +ffffffff819044d0 T igc_release_hw_control +ffffffff81904530 T igc_free_pci_resources +ffffffff81904610 T igc_stop +ffffffff81904920 T igc_free_transmit_structures +ffffffff819049a0 T igc_free_receive_structures +ffffffff81904a60 T igc_setup_msix +ffffffff81904af0 T igc_dma_malloc +ffffffff81904c60 T igc_rxrefill +ffffffff81904d30 T igc_dma_free +ffffffff81904de0 T igc_init_dmac +ffffffff81905080 T igc_intr_queue +ffffffff81905190 T igc_intr_link +ffffffff81905310 T igc_ioctl +ffffffff819055f0 T igc_start +ffffffff81905a20 T igc_watchdog +ffffffff81905a50 T igc_media_change +ffffffff81905b60 T igc_media_status +ffffffff81905d10 T igc_init +ffffffff81906200 T igc_setup_transmit_structures +ffffffff819062c0 T igc_initialize_transmit_unit +ffffffff819064e0 T igc_setup_receive_structures +ffffffff81906660 T igc_initialize_receive_unit +ffffffff81906a30 T igc_iff +ffffffff81906b80 T igc_configure_queues +ffffffff81906d90 T igc_rxfill +ffffffff81906ec0 T igc_enable_intr +ffffffff81906f90 T igc_tx_ctx_setup +ffffffff819070a0 T igc_txeof +ffffffff81907260 T igc_disable_intr +ffffffff81907300 T igc_rxrinfo +ffffffff81907430 T igc_get_buf +ffffffff81907570 T igc_rxeof +ffffffff81907910 T igc_rx_checksum +ffffffff81907960 T igc_set_queues +ffffffff81907a40 T igc_enable_queue +ffffffff81907a70 T igc_allocate_transmit_buffers +ffffffff81907bd0 T igc_setup_transmit_ring +ffffffff81907d50 T igc_free_transmit_buffers +ffffffff81907e70 T igc_allocate_receive_buffers +ffffffff81907fa0 T igc_setup_receive_ring +ffffffff81908060 T igc_initialize_rss_mapping +ffffffff81908280 T igc_free_receive_buffers +ffffffff81909000 T igc_init_mac_params +ffffffff81909040 T igc_init_nvm_params +ffffffff81909080 T igc_init_phy_params +ffffffff819090c0 T igc_set_mac_type +ffffffff81909170 T igc_setup_init_funcs +ffffffff819092d0 T igc_update_mc_addr_list +ffffffff81909310 T igc_check_for_link +ffffffff81909350 T igc_reset_hw +ffffffff81909390 T igc_init_hw +ffffffff819093d0 T igc_get_speed_and_duplex +ffffffff81909410 T igc_rar_set +ffffffff81909450 T igc_check_reset_block +ffffffff81909490 T igc_get_phy_info +ffffffff819094d0 T igc_phy_hw_reset +ffffffff81909510 T igc_read_mac_addr +ffffffff81909540 T igc_validate_nvm_checksum +ffffffff8190a000 T igc_acquire_phy_base +ffffffff8190a030 T igc_release_phy_base +ffffffff8190a060 T igc_init_hw_base +ffffffff8190a160 T igc_power_down_phy_copper_base +ffffffff8190b000 T igc_init_nvm_params_i225 +ffffffff8190b180 T igc_acquire_nvm_i225 +ffffffff8190b250 T igc_release_nvm_i225 +ffffffff8190b2c0 T igc_get_flash_presence_i225 +ffffffff8190b310 T igc_read_nvm_srrd_i225 +ffffffff8190b3f0 T igc_write_nvm_srwr_i225 +ffffffff8190b5c0 T igc_validate_nvm_checksum_i225 +ffffffff8190b650 T igc_update_nvm_checksum_i225 +ffffffff8190b7f0 T igc_init_mac_params_i225 +ffffffff8190b8b0 T igc_reset_hw_i225 +ffffffff8190b9d0 T igc_init_hw_i225 +ffffffff8190b9e0 T igc_check_for_link_i225 +ffffffff8190baa0 T igc_acquire_swfw_sync_i225 +ffffffff8190bb80 T igc_release_swfw_sync_i225 +ffffffff8190bc00 T igc_setup_copper_link_i225 +ffffffff8190bc90 T igc_init_phy_params_i225 +ffffffff8190bd70 T igc_get_hw_semaphore_i225 +ffffffff8190bf20 T __igc_write_nvm_srwr +ffffffff8190c050 T igc_update_flash_i225 +ffffffff8190c420 T igc_set_flsw_flash_burst_counter_i225 +ffffffff8190c480 T igc_write_erase_flash_command_i225 +ffffffff8190c580 T igc_pool_flash_update_done_i225 +ffffffff8190c610 T igc_set_ltr_i225 +ffffffff8190c880 T igc_init_function_pointers_i225 +ffffffff8190c8f0 T igc_set_eee_i225 +ffffffff8190d000 T igc_init_mac_ops_generic +ffffffff8190d050 T igc_null_ops_generic +ffffffff8190d080 T igc_config_collision_dist_generic +ffffffff8190d0f0 T igc_rar_set_generic +ffffffff8190d1d0 T igc_write_vfta_generic +ffffffff8190d220 T igc_init_rx_addrs_generic +ffffffff8190d2c0 T igc_check_alt_mac_addr_generic +ffffffff8190d440 T igc_hash_mc_addr_generic +ffffffff8190d4e0 T igc_update_mc_addr_list_generic +ffffffff8190d650 T igc_clear_hw_cntrs_base_generic +ffffffff8190da40 T igc_setup_link_generic +ffffffff8190dbd0 T igc_set_fc_watermarks_generic +ffffffff8190dc80 T igc_force_mac_fc_generic +ffffffff8190dd40 T igc_config_fc_after_link_up_generic +ffffffff8190df60 T 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drm_atomic_private_obj_init +ffffffff81924c40 T drm_atomic_private_obj_fini +ffffffff81924cd0 T drm_atomic_get_private_obj_state +ffffffff81924e80 T drm_atomic_get_old_private_obj_state +ffffffff81924ee0 T drm_atomic_get_new_private_obj_state +ffffffff81924f40 T drm_atomic_get_old_connector_for_encoder +ffffffff81924fb0 T drm_atomic_get_new_connector_for_encoder +ffffffff81925020 T drm_atomic_get_connector_state +ffffffff81925250 T drm_atomic_get_bridge_state +ffffffff81925260 T drm_atomic_get_old_bridge_state +ffffffff819252c0 T drm_atomic_get_new_bridge_state +ffffffff81925320 T drm_atomic_add_encoder_bridges +ffffffff819253e0 T drm_atomic_add_affected_connectors +ffffffff81925510 T drm_atomic_add_affected_planes +ffffffff81925630 T drm_atomic_check_only +ffffffff819260e0 T drm_atomic_commit +ffffffff819261b0 T drm_atomic_print_new_state +ffffffff819263b0 T drm_atomic_nonblocking_commit +ffffffff81926450 T __drm_atomic_helper_disable_plane +ffffffff819264d0 T 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drm_atomic_helper_update_plane +ffffffff8192cad0 T drm_atomic_helper_disable_plane +ffffffff8192cb90 T drm_atomic_helper_set_config +ffffffff8192cc40 T drm_atomic_helper_disable_all +ffffffff8192cdf0 T drm_atomic_helper_shutdown +ffffffff8192cf40 T drm_atomic_helper_duplicate_state +ffffffff8192d0b0 T drm_atomic_helper_suspend +ffffffff8192d200 T drm_atomic_helper_commit_duplicated_state +ffffffff8192d340 T drm_atomic_helper_resume +ffffffff8192d470 T drm_atomic_helper_page_flip +ffffffff8192d530 t page_flip_common +ffffffff8192d630 T drm_atomic_helper_page_flip_target +ffffffff8192d750 T drm_atomic_helper_bridge_propagate_bus_fmt +ffffffff8192d7d0 t set_best_encoder +ffffffff8192e000 T __drm_atomic_helper_crtc_state_reset +ffffffff8192e030 T __drm_atomic_helper_crtc_reset +ffffffff8192e090 T drm_atomic_helper_crtc_reset +ffffffff8192e130 T __drm_atomic_helper_crtc_duplicate_state +ffffffff8192e200 T drm_atomic_helper_crtc_duplicate_state +ffffffff8192e2a0 T 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drm_buddy_fini +ffffffff81936570 T drm_get_buddy +ffffffff819365b0 T drm_buddy_free_block +ffffffff81936750 T drm_buddy_free_list +ffffffff819367e0 T drm_buddy_block_trim +ffffffff81936a30 t __alloc_range +ffffffff81936e00 T drm_buddy_alloc_blocks +ffffffff819376a0 T drm_buddy_block_print +ffffffff819376e0 T drm_buddy_print +ffffffff81937850 T drm_buddy_module_exit +ffffffff81937870 T drm_buddy_module_init +ffffffff819378d0 t split_block +ffffffff81938000 T drm_clflush_pages +ffffffff81938120 T drm_clflush_sg +ffffffff81938270 T drm_clflush_virt_range +ffffffff81938340 T drm_need_swiotlb +ffffffff81938370 T drm_memcpy_from_wc +ffffffff81938710 T drm_memcpy_init_early +ffffffff81939000 T drm_client_init +ffffffff81939110 T drm_client_register +ffffffff81939180 T drm_client_release +ffffffff81939220 T drm_client_dev_unregister +ffffffff81939310 T drm_client_dev_hotplug +ffffffff819393f0 T drm_client_dev_restore +ffffffff819394d0 T drm_client_buffer_vmap +ffffffff81939540 T drm_client_buffer_vunmap +ffffffff81939560 T drm_client_framebuffer_create +ffffffff81939840 T drm_client_framebuffer_delete +ffffffff81939950 T drm_client_framebuffer_flush +ffffffff8193a000 T drm_client_modeset_create +ffffffff8193a140 T drm_client_modeset_free +ffffffff8193a260 T drm_client_modeset_probe +ffffffff8193ba30 t drm_client_pick_crtcs +ffffffff8193bd20 T drm_client_rotation +ffffffff8193bec0 T drm_client_modeset_check +ffffffff8193bf60 t drm_client_modeset_commit_atomic +ffffffff8193c160 T drm_client_modeset_commit_locked +ffffffff8193c300 T drm_client_modeset_commit +ffffffff8193c370 T drm_client_modeset_dpms +ffffffff8193c5c0 t drm_connector_pick_cmdline_mode +ffffffff8193d000 T drm_color_ctm_s31_32_to_qm_n +ffffffff8193d0e0 T drm_crtc_enable_color_mgmt +ffffffff8193d1c0 T drm_mode_crtc_set_gamma_size +ffffffff8193d2e0 T drm_mode_gamma_set_ioctl +ffffffff8193d7d0 T drm_mode_gamma_get_ioctl +ffffffff8193d910 T drm_get_color_encoding_name +ffffffff8193d980 T drm_get_color_range_name +ffffffff8193d9f0 T drm_plane_create_color_properties +ffffffff8193dc50 T drm_color_lut_check +ffffffff8193e000 T drm_connector_ida_init +ffffffff8193e110 T drm_connector_ida_destroy +ffffffff8193e220 T drm_get_connector_type_name +ffffffff8193e260 T drm_connector_free_work_fn +ffffffff8193e320 T drm_connector_init +ffffffff8193e3a0 t __drm_connector_init +ffffffff8193e8b0 T drm_connector_init_with_ddc +ffffffff8193e940 T drmm_connector_init +ffffffff8193ea00 t drm_connector_cleanup_action +ffffffff8193ea20 T drm_connector_attach_edid_property +ffffffff8193ea40 T drm_connector_attach_encoder +ffffffff8193eac0 T drm_connector_has_possible_encoder +ffffffff8193eb00 T drm_connector_cleanup +ffffffff8193ee30 T drm_connector_unregister +ffffffff8193eed0 T drm_mode_put_tile_group +ffffffff8193ef60 T drm_connector_register +ffffffff8193f050 T drm_connector_unregister_all +ffffffff8193f1f0 T drm_connector_list_iter_begin +ffffffff8193f230 T drm_connector_list_iter_next +ffffffff8193f340 T drm_connector_list_iter_end +ffffffff8193f410 T drm_connector_register_all +ffffffff8193f5a0 T drm_get_connector_status_name +ffffffff8193f5f0 T drm_get_connector_force_name +ffffffff8193f630 T drm_get_subpixel_order_name +ffffffff8193f670 T drm_get_dpms_name +ffffffff8193f6b0 T drm_display_info_set_bus_formats +ffffffff8193f780 T drm_get_dvi_i_select_name +ffffffff8193f7e0 T drm_get_dvi_i_subconnector_name +ffffffff8193f840 T drm_get_tv_select_name +ffffffff8193f8a0 T drm_get_tv_subconnector_name +ffffffff8193f900 T drm_get_dp_subconnector_name +ffffffff8193f990 T drm_connector_create_standard_properties +ffffffff8193fb10 T drm_mode_create_dvi_i_properties +ffffffff8193fbb0 T drm_connector_attach_dp_subconnector_property +ffffffff8193fc20 T drm_connector_attach_content_type_property +ffffffff8193fcc0 T drm_mode_create_content_type_property +ffffffff8193fd40 T drm_connector_attach_tv_margin_properties +ffffffff8193fdb0 T drm_mode_create_tv_margin_properties +ffffffff8193fed0 T drm_mode_create_tv_properties +ffffffff81940130 T drm_mode_create_scaling_mode_property +ffffffff819401a0 T drm_connector_attach_vrr_capable_property +ffffffff81940230 T drm_connector_attach_scaling_mode_property +ffffffff81940400 T drm_mode_create_aspect_ratio_property +ffffffff81940480 T drm_mode_create_hdmi_colorspace_property +ffffffff81940500 T drm_mode_create_dp_colorspace_property +ffffffff81940580 T drm_mode_create_suggested_offset_properties +ffffffff81940650 T drm_connector_set_path_property +ffffffff819406b0 T drm_connector_set_tile_property +ffffffff81940800 T drm_connector_set_link_status_property +ffffffff81940850 T drm_connector_attach_max_bpc_property +ffffffff81940910 T drm_connector_attach_hdr_output_metadata_property +ffffffff81940960 T drm_connector_attach_colorspace_property +ffffffff819409b0 T drm_connector_atomic_hdr_metadata_equal +ffffffff81940a20 T drm_connector_set_vrr_capable_property +ffffffff81940a70 T drm_connector_set_panel_orientation +ffffffff81940b30 T drm_connector_set_panel_orientation_with_quirk +ffffffff81940c10 T drm_connector_set_orientation_from_panel +ffffffff81940d00 T drm_connector_create_privacy_screen_properties +ffffffff81940da0 T drm_connector_attach_privacy_screen_properties +ffffffff81940e10 T drm_connector_attach_privacy_screen_provider +ffffffff81940f20 t drm_connector_privacy_screen_notifier +ffffffff81940fc0 T drm_connector_update_privacy_screen +ffffffff81941030 T drm_connector_set_obj_prop +ffffffff81941110 T drm_connector_property_set_ioctl +ffffffff81941170 T drm_mode_getconnector +ffffffff819416b0 T drm_connector_find_by_fwnode +ffffffff81941760 T drm_connector_oob_hotplug_event +ffffffff81941850 T drm_mode_get_tile_group +ffffffff81941920 T drm_mode_create_tile_group +ffffffff819419f0 t drm_connector_free +ffffffff81941a30 t kasprintf +ffffffff81942000 T drm_crtc_from_index +ffffffff81942060 T drm_crtc_force_disable +ffffffff81942180 T drm_mode_set_config_internal +ffffffff81942200 T drm_crtc_register_all +ffffffff81942290 T drm_crtc_unregister_all +ffffffff81942300 T drm_crtc_create_fence +ffffffff81942390 T drm_crtc_init_with_planes +ffffffff81942460 t __drm_crtc_init_with_planes +ffffffff81942850 T drmm_crtc_init_with_planes +ffffffff81942950 T __drmm_crtc_alloc_with_planes +ffffffff81942ac0 T drm_crtc_cleanup +ffffffff81942be0 T drm_mode_getcrtc +ffffffff81942d80 t __drm_mode_set_config_internal +ffffffff81942f20 T drm_crtc_check_viewport +ffffffff81942fd0 T drm_mode_setcrtc +ffffffff81943730 T drm_mode_crtc_set_obj_prop +ffffffff819437b0 T drm_crtc_create_scaling_filter_property +ffffffff81943820 t drm_crtc_fence_get_driver_name +ffffffff819438a0 t drm_crtc_fence_get_timeline_name +ffffffff81943910 t kasprintf +ffffffff819439e0 t drmm_crtc_init_with_planes_cleanup +ffffffff81944000 T drm_helper_encoder_in_use +ffffffff81944180 T drm_helper_crtc_in_use +ffffffff819442b0 T drm_helper_disable_unused_functions +ffffffff81944330 t __drm_helper_disable_unused_functions +ffffffff81944430 T drm_crtc_helper_set_mode +ffffffff819448e0 T drm_connector_get_single_encoder +ffffffff819449e0 T drm_crtc_helper_set_config +ffffffff81945600 T drm_helper_connector_dpms +ffffffff819458f0 T drm_helper_resume_force_mode +ffffffff81945be0 T drm_helper_force_disable_all +ffffffff81945cb0 t drm_encoder_disable +ffffffff81946000 T drm_atomic_helper_check_plane_damage +ffffffff819460a0 T drm_atomic_helper_dirtyfb +ffffffff81946350 T drm_atomic_helper_damage_iter_init +ffffffff819464a0 T drm_atomic_helper_damage_iter_next +ffffffff81946540 T drm_atomic_helper_damage_merged +ffffffff81947000 T displayid_iter_edid_begin +ffffffff81947050 T __displayid_iter_next +ffffffff819472e0 T displayid_iter_end +ffffffff81948000 T drm_mode_create_dumb +ffffffff819480c0 T drm_mode_create_dumb_ioctl +ffffffff81948180 T drm_mode_mmap_dumb_ioctl +ffffffff819481f0 T drm_mode_destroy_dumb +ffffffff81948260 T drm_mode_destroy_dumb_ioctl +ffffffff81949000 T drm_edid_header_is_valid +ffffffff81949080 T drm_edid_are_equal +ffffffff819490f0 T drm_edid_block_valid +ffffffff81949300 t edid_block_check +ffffffff81949430 t edid_block_status_print +ffffffff81949530 T drm_edid_is_valid +ffffffff819495b0 T drm_edid_override_set +ffffffff81949620 T drm_connector_update_edid_property +ffffffff819497d0 T drm_edid_override_reset +ffffffff81949900 T drm_add_override_edid_modes +ffffffff81949ae0 T drm_add_edid_modes +ffffffff81949bd0 T drm_do_get_edid +ffffffff81949bf0 t _drm_do_get_edid +ffffffff8194a100 T drm_edid_raw +ffffffff8194a190 T drm_edid_alloc +ffffffff8194a260 T drm_edid_dup +ffffffff8194a340 T drm_edid_free +ffffffff8194a3a0 T drm_probe_ddc +ffffffff8194a4a0 t drm_do_probe_ddc_edid +ffffffff8194a5f0 T drm_get_edid +ffffffff8194a730 T drm_edid_read_custom +ffffffff8194a820 T drm_edid_read_ddc +ffffffff8194a950 T drm_edid_read +ffffffff8194a9d0 T drm_edid_get_panel_id +ffffffff8194aab0 t edid_block_read +ffffffff8194ad20 T drm_get_edid_switcheroo +ffffffff8194ad70 T drm_edid_duplicate +ffffffff8194adf0 T drm_mode_find_dmt +ffffffff8194af10 T drm_mode_fixup_1366x768 +ffffffff8194af70 T drm_find_edid_extension +ffffffff8194b180 T drm_match_cea_mode +ffffffff8194b3d0 T drm_display_mode_from_cea_vic +ffffffff8194b440 T drm_edid_get_monitor_name +ffffffff8194b4f0 t get_monitor_name +ffffffff8194b850 T drm_edid_to_sad +ffffffff8194ba60 T drm_edid_to_speaker_allocation +ffffffff8194bc10 T drm_av_sync_delay +ffffffff8194bcc0 T drm_detect_hdmi_monitor +ffffffff8194bde0 T drm_detect_monitor_audio +ffffffff8194bff0 T drm_default_rgb_quant_range +ffffffff8194c030 T drm_edid_connector_update +ffffffff8194c090 t _drm_edid_connector_update +ffffffff8194df40 t _drm_update_tile_info +ffffffff8194e1d0 t _drm_edid_connector_property_update +ffffffff8194e380 T drm_add_modes_noedid +ffffffff8194e470 T drm_set_preferred_mode +ffffffff8194e4d0 T drm_hdmi_avi_infoframe_from_display_mode +ffffffff8194e750 T drm_hdmi_avi_infoframe_quant_range +ffffffff8194e7f0 T drm_hdmi_vendor_infoframe_from_display_mode +ffffffff8194e8b0 t connector_bad_edid +ffffffff8194ea70 t drm_for_each_detailed_block +ffffffff8194ecc0 t __cea_db_iter_next +ffffffff8194ef60 t update_display_info +ffffffff8194fde0 t get_monitor_range +ffffffff8194fe80 t do_detailed_mode +ffffffff819507a0 t hdmi_mode_alternate_clock +ffffffff81950850 t do_cvt_mode +ffffffff81950aa0 t drm_mode_std +ffffffff819517b0 t do_standard_modes +ffffffff81951900 t drm_monitor_supports_rb +ffffffff81951bf0 t drm_gtf2_hbreak +ffffffff81951e80 t do_established_modes +ffffffff81952080 t drm_match_hdmi_mode +ffffffff819522c0 t do_inferred_modes +ffffffff81952830 t mode_in_range +ffffffff81953000 T drm_encoder_register_all +ffffffff81953090 T drm_encoder_unregister_all +ffffffff81953100 T drm_encoder_init +ffffffff819531d0 t __drm_encoder_init +ffffffff81953390 T drm_encoder_cleanup +ffffffff819534c0 T __drmm_encoder_alloc +ffffffff819535e0 T drmm_encoder_init +ffffffff819536c0 T drm_mode_getencoder +ffffffff81953820 t kasprintf +ffffffff819538f0 t drmm_encoder_alloc_release +ffffffff81954000 T drm_i2c_encoder_dpms +ffffffff81954020 T drm_i2c_encoder_mode_fixup +ffffffff81954060 T drm_i2c_encoder_prepare +ffffffff81954080 T drm_i2c_encoder_commit +ffffffff819540a0 T drm_i2c_encoder_mode_set +ffffffff819540c0 T drm_i2c_encoder_detect +ffffffff819540e0 T drm_i2c_encoder_save +ffffffff81954100 T drm_i2c_encoder_restore +ffffffff81955000 T drm_fb_helper_debug_enter +ffffffff81955100 T drm_fb_helper_debug_leave +ffffffff81955270 T drm_fb_helper_restore_fbdev_mode_unlocked +ffffffff81955310 T drm_fb_helper_blank +ffffffff819553a0 T drm_fb_helper_prepare +ffffffff81955480 t drm_fb_helper_resume_worker +ffffffff819554b0 t drm_fb_helper_damage_work +ffffffff81955830 T drm_fb_helper_init +ffffffff819558a0 T drm_fb_helper_alloc_fbi +ffffffff81955900 T drm_fb_helper_unregister_fbi +ffffffff81955930 T drm_fb_helper_fini +ffffffff81955a30 T drm_fb_helper_set_suspend +ffffffff81955a60 T drm_fb_helper_set_suspend_unlocked +ffffffff81955a90 T drm_fb_helper_set_par +ffffffff81955b80 T drm_fb_helper_pan_display +ffffffff81955c50 T drm_fb_helper_fill_info +ffffffff81955d10 T drm_fb_helper_initial_config +ffffffff81955d40 t __drm_fb_helper_initial_config_and_unlock +ffffffff81956290 T drm_fb_helper_hotplug_event +ffffffff81956490 t drm_setup_crtcs_fb +ffffffff819565d0 T drm_fb_helper_lastclose +ffffffff81956680 T drm_fb_helper_output_poll_changed +ffffffff819566a0 T drm_fbdev_generic_setup +ffffffff81956850 t drm_fbdev_client_hotplug +ffffffff81956a80 t drm_fbdev_client_unregister +ffffffff81956af0 t drm_fbdev_client_restore +ffffffff81956b90 t drm_fbdev_cleanup +ffffffff81956c30 t drm_fbdev_use_shadow_fb +ffffffff81956c80 t drm_fb_helper_generic_probe +ffffffff81957000 T drm_dev_needs_global_mutex +ffffffff81957060 T drm_file_alloc +ffffffff819572d0 T drm_file_free +ffffffff81957500 T drm_lastclose +ffffffff81957570 T drm_release +ffffffff819575c0 T drm_release_noglobal +ffffffff81957610 T drm_read +ffffffff81957660 T drm_event_reserve_init_locked +ffffffff819576e0 T drm_event_reserve_init +ffffffff819577a0 T drm_event_cancel_free +ffffffff81957820 T drm_send_event_timestamp_locked +ffffffff81957830 t drm_send_event_helper +ffffffff81957a10 T drm_send_event_locked +ffffffff81957a30 T drm_send_event +ffffffff81957a80 T mock_drm_getfile +ffffffff81958000 T drm_flip_work_allocate_task +ffffffff81958060 T drm_flip_work_queue_task +ffffffff819580b0 T drm_flip_work_queue +ffffffff81958150 T drm_flip_work_commit +ffffffff819581d0 T drm_flip_work_init +ffffffff81958240 t flip_worker +ffffffff81958320 T drm_flip_work_cleanup +ffffffff81959000 T drm_fb_clip_offset +ffffffff81959040 T drm_fb_memcpy +ffffffff819592c0 T drm_fb_swab +ffffffff819593c0 t drm_fb_swab32_line +ffffffff81959420 t drm_fb_swab16_line +ffffffff81959480 t drm_fb_xfrm +ffffffff81959740 T drm_fb_xrgb8888_to_rgb332 +ffffffff819597a0 t drm_fb_xrgb8888_to_rgb332_line +ffffffff81959890 T drm_fb_xrgb8888_to_rgb565 +ffffffff81959910 t drm_fb_xrgb8888_to_rgb565_swab_line +ffffffff81959990 t drm_fb_xrgb8888_to_rgb565_line +ffffffff81959a80 T drm_fb_xrgb8888_to_rgb888 +ffffffff81959ae0 t drm_fb_xrgb8888_to_rgb888_line +ffffffff81959b70 T drm_fb_xrgb8888_to_xrgb2101010 +ffffffff81959bd0 t drm_fb_xrgb8888_to_xrgb2101010_line +ffffffff81959c50 T drm_fb_xrgb8888_to_gray8 +ffffffff81959cb0 t drm_fb_xrgb8888_to_gray8_line +ffffffff81959d30 T drm_fb_blit +ffffffff8195a180 T drm_fb_xrgb8888_to_mono +ffffffff8195a510 T drm_fb_build_fourcc_list +ffffffff8195a840 t drm_fb_rgb888_to_xrgb8888_line +ffffffff8195a910 t drm_fb_rgb565_to_xrgb8888_line +ffffffff8195b000 T drm_mode_legacy_fb_format +ffffffff8195b0f0 T drm_driver_legacy_fb_format +ffffffff8195b1f0 T __drm_format_info +ffffffff8195b270 T drm_format_info +ffffffff8195b330 T drm_get_format_info +ffffffff8195b410 T drm_format_info_block_width +ffffffff8195b460 T drm_format_info_block_height +ffffffff8195b4b0 T drm_format_info_bpp +ffffffff8195b530 T drm_format_info_min_pitch +ffffffff8195c000 T drm_framebuffer_check_src_coords +ffffffff8195c120 T drm_mode_addfb +ffffffff8195c330 T drm_mode_addfb2 +ffffffff8195c420 T drm_mode_addfb_ioctl +ffffffff8195c440 T drm_internal_framebuffer_create +ffffffff8195c960 T drm_mode_addfb2_ioctl +ffffffff8195ca50 T drm_mode_rmfb +ffffffff8195cc20 T drm_framebuffer_lookup +ffffffff8195cc70 t drm_mode_rmfb_work_fn +ffffffff8195cd30 T drm_mode_rmfb_ioctl +ffffffff8195cd50 T drm_mode_getfb +ffffffff8195ceb0 T drm_mode_getfb2_ioctl +ffffffff8195d260 T drm_mode_dirtyfb_ioctl +ffffffff8195d400 T drm_fb_release +ffffffff8195d510 T drm_framebuffer_free +ffffffff8195d550 T drm_framebuffer_init +ffffffff8195d6b0 T drm_framebuffer_unregister_private +ffffffff8195d6f0 T drm_framebuffer_cleanup +ffffffff8195d750 T drm_framebuffer_remove +ffffffff8195dc00 T drm_framebuffer_plane_width +ffffffff8195dc50 T drm_framebuffer_plane_height +ffffffff8195dca0 T drm_framebuffer_print_info +ffffffff8195e000 T drm_ref +ffffffff8195e030 T drm_unref +ffffffff8195e0b0 T drm_fault +ffffffff8195e270 T drm_flush +ffffffff8195e2a0 T udv_attach_drm +ffffffff8195e4c0 T drm_gem_init +ffffffff8195e570 t drm_gem_init_release +ffffffff8195e590 T drm_gem_object_init +ffffffff8195e6f0 T drm_gem_private_object_init +ffffffff8195e7f0 T drm_gem_handle_delete +ffffffff8195e8e0 t drm_gem_object_release_handle +ffffffff8195e970 T drm_gem_dumb_map_offset +ffffffff8195eaa0 T drm_gem_object_lookup +ffffffff8195eb20 T drm_gem_create_mmap_offset +ffffffff8195eb50 T drm_gem_dumb_destroy +ffffffff8195eb70 T drm_gem_handle_create_tail +ffffffff8195ece0 t drm_gem_object_handle_put_unlocked +ffffffff8195ee30 T drm_gem_handle_create +ffffffff8195ee80 T drm_gem_free_mmap_offset +ffffffff8195eeb0 T drm_gem_create_mmap_offset_size +ffffffff8195eee0 T drm_gem_get_pages +ffffffff8195ef30 T drm_gem_put_pages +ffffffff8195ef60 T drm_gem_objects_lookup +ffffffff8195f0d0 T drm_gem_dma_resv_wait +ffffffff8195f210 T drm_gem_close_ioctl +ffffffff8195f260 T drm_gem_flink_ioctl +ffffffff8195f3d0 T drm_gem_open_ioctl +ffffffff8195f500 T drm_gem_open +ffffffff8195f530 T drm_gem_release +ffffffff8195f570 T drm_gem_object_release +ffffffff8195f6c0 T drm_gem_lru_remove +ffffffff8195f7a0 T drm_gem_object_free +ffffffff8195f7f0 T drm_gem_mmap_obj +ffffffff8195f900 T drm_gem_mmap +ffffffff8195fb80 T drm_gem_print_info +ffffffff8195fca0 T drm_gem_pin +ffffffff8195fce0 T drm_gem_unpin +ffffffff8195fd20 T drm_gem_vmap +ffffffff8195fd80 T drm_gem_vunmap +ffffffff8195fdf0 T drm_gem_lock_reservations +ffffffff81960060 T drm_gem_unlock_reservations +ffffffff81960160 T drm_gem_lru_init +ffffffff819601a0 T drm_gem_lru_move_tail +ffffffff81960290 T drm_gem_lru_scan +ffffffff81960680 t __ww_mutex_lock +ffffffff81961000 T drm_gem_plane_helper_prepare_fb +ffffffff81962000 T drm_gem_fb_destroy +ffffffff819620c0 T drm_gem_fb_create_handle +ffffffff81963000 T drm_ht_create +ffffffff81963080 T drm_ht_verbose_list +ffffffff81963140 T drm_ht_insert_item +ffffffff81963190 T drm_ht_just_insert_please +ffffffff81963260 T drm_ht_find_item +ffffffff819632b0 T drm_ht_remove_key +ffffffff81963300 T drm_ht_remove_item +ffffffff81963350 T drm_ht_remove +ffffffff81964000 T drm_getunique +ffffffff819640a0 T drm_getclient +ffffffff81964120 T drm_noop +ffffffff81964170 T drm_invalid_op +ffffffff819641a0 T drm_version +ffffffff819643c0 T pledge_ioctl_drm +ffffffff81964480 T drm_ioctl_kernel +ffffffff819644d0 T drm_ioctl +ffffffff81964520 T drm_ioctl_flags +ffffffff81964580 T drm_do_ioctl +ffffffff819648d0 T drmioctl +ffffffff81964a20 t drm_getstats +ffffffff81964a70 t drm_setversion +ffffffff81964bd0 t drm_getcap +ffffffff81964dc0 t drm_setclientcap +ffffffff81965000 T tasklet_unlock_wait +ffffffff81965080 T tasklet_unlock_spin_wait +ffffffff81965100 T tasklet_run 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dmi_first_match +ffffffff81966080 T dmi_get_system_info +ffffffff819660f0 T dmi_check_system +ffffffff819661f0 T alloc_pages +ffffffff819662c0 T __free_pages +ffffffff819663c0 T __pagevec_release +ffffffff81966470 T kmap +ffffffff819664b0 T kunmap_va +ffffffff819664d0 T kmap_atomic_prot +ffffffff81966560 T kunmap_atomic +ffffffff819665e0 T vmap +ffffffff819666c0 T vunmap +ffffffff81966710 T is_vmalloc_addr +ffffffff81966750 T print_hex_dump +ffffffff81966820 T memchr_inv +ffffffff81966870 T panic_cmp +ffffffff81966890 T linux_root_RB_INSERT_COLOR +ffffffff81966a90 T linux_root_RB_REMOVE_COLOR +ffffffff81966dd0 T linux_root_RB_REMOVE +ffffffff81966f00 T linux_root_RB_INSERT +ffffffff81966f70 T linux_root_RB_FIND +ffffffff81966fc0 T linux_root_RB_NFIND +ffffffff81967010 T linux_root_RB_NEXT +ffffffff81967080 T linux_root_RB_PREV +ffffffff819670f0 T linux_root_RB_MINMAX +ffffffff81967140 T idr_init +ffffffff81967170 T idr_destroy +ffffffff819672b0 T idr_tree_SPLAY_REMOVE +ffffffff81967330 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__xa_store +ffffffff81968700 T xa_get_next +ffffffff81968820 T sg_alloc_table +ffffffff819688a0 T sg_free_table +ffffffff81968900 T sg_copy_from_buffer +ffffffff81968930 T i2c_master_xfer +ffffffff81968a60 T __i2c_transfer +ffffffff81968b10 T i2c_transfer +ffffffff81968be0 T i2c_bb_master_xfer +ffffffff81968c80 T i2c_bb_functionality +ffffffff81968cb0 T i2c_bit_add_bus +ffffffff81968cf0 T vga_disable_bridge +ffffffff81968da0 T vga_get_uninterruptible +ffffffff81968df0 T vga_put +ffffffff81968e70 T acpi_get_table +ffffffff81968f40 T acpi_put_table +ffffffff81968f70 T acpi_get_handle +ffffffff81968fc0 T acpi_get_name +ffffffff81969060 T acpi_evaluate_object +ffffffff819692c0 T drm_linux_acpi_notify +ffffffff81969340 T register_acpi_notifier +ffffffff81969380 T unregister_acpi_notifier +ffffffff81969410 T acpi_format_exception +ffffffff81969460 T backlight_do_update_status +ffffffff81969480 T backlight_device_register +ffffffff81969510 T backlight_device_unregister +ffffffff81969530 T devm_backlight_device_register +ffffffff81969580 T backlight_schedule_update_status +ffffffff819695a0 T backlight_enable +ffffffff819695e0 T backlight_disable +ffffffff81969620 T drm_sysfs_hotplug_event +ffffffff81969640 T drm_sysfs_connector_hotplug_event +ffffffff81969660 T drm_sysfs_connector_status_event +ffffffff81969680 T dma_fence_get +ffffffff819696c0 T dma_fence_get_rcu +ffffffff81969700 T dma_fence_get_rcu_safe +ffffffff81969740 T dma_fence_release +ffffffff81969770 T dma_fence_put +ffffffff819697e0 T dma_fence_signal_timestamp_locked +ffffffff819698b0 T dma_fence_signal +ffffffff819699f0 T dma_fence_signal_locked +ffffffff81969b20 T dma_fence_signal_timestamp +ffffffff81969c10 T dma_fence_is_signaled +ffffffff81969c80 T dma_fence_is_signaled_locked +ffffffff81969dd0 T dma_fence_wait_timeout +ffffffff81969e30 T dma_fence_default_wait +ffffffff8196a0e0 T dma_fence_wait +ffffffff8196a140 T dma_fence_enable_sw_signaling +ffffffff8196a2c0 T dma_fence_init +ffffffff8196a320 T dma_fence_add_callback +ffffffff8196a520 T dma_fence_remove_callback +ffffffff8196a5a0 T dma_fence_context_alloc +ffffffff8196a5e0 t dma_fence_default_wait_cb +ffffffff8196a610 T dma_fence_wait_any_timeout +ffffffff8196a950 T dma_fence_get_stub +ffffffff8196ab00 T dma_fence_allocate_private_stub +ffffffff8196aba0 T dma_fence_array_create +ffffffff8196acc0 t irq_dma_fence_array_work +ffffffff8196ad50 T dma_fence_array_first +ffffffff8196adb0 T dma_fence_array_next +ffffffff8196ae10 t dma_fence_array_get_driver_name +ffffffff8196ae40 t dma_fence_array_get_timeline_name +ffffffff8196ae70 t dma_fence_array_enable_signaling +ffffffff8196af70 t dma_fence_array_signaled +ffffffff8196afc0 t dma_fence_array_release +ffffffff8196b080 T dma_fence_chain_find_seqno +ffffffff8196b1a0 T dma_fence_chain_walk +ffffffff8196b3e0 T dma_fence_chain_init +ffffffff8196b4f0 t dma_fence_chain_get_driver_name +ffffffff8196b520 t dma_fence_chain_get_timeline_name +ffffffff8196b550 t dma_fence_chain_enable_signaling +ffffffff8196b700 t dma_fence_chain_signaled +ffffffff8196b7f0 t dma_fence_chain_release +ffffffff8196b930 T dma_fence_is_container +ffffffff8196b980 T dmabuf_read +ffffffff8196b9b0 T dmabuf_write +ffffffff8196b9e0 T dmabuf_ioctl +ffffffff8196ba10 T dmabuf_kqfilter +ffffffff8196ba40 T dmabuf_stat +ffffffff8196bb00 T dmabuf_close +ffffffff8196bb70 T dmabuf_seek +ffffffff8196bc00 T dma_buf_export +ffffffff8196bcb0 T dma_buf_get +ffffffff8196bd40 T dma_buf_put +ffffffff8196bdf0 T dma_buf_fd +ffffffff8196bf10 T get_dma_buf +ffffffff8196bf50 T pcie_get_speed_cap +ffffffff8196c0f0 T printk +ffffffff8196c180 T pcie_get_width_cap +ffffffff8196c270 T pcie_aspm_enabled +ffffffff8196c300 T autoremove_wake_function +ffffffff8196c380 T wait_on_bit +ffffffff8196c450 T wait_on_bit_timeout +ffffffff8196c520 T wake_up_bit +ffffffff8196c560 T clear_and_wake_up_bit +ffffffff8196c5b0 T bit_waitqueue +ffffffff8196c5e0 T __var_waitqueue +ffffffff8196c610 T drm_linux_init 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dma_fence_array_cb_func +ffffffff8196d420 t dma_fence_chain_cb +ffffffff8196d4e0 t dma_fence_chain_timo +ffffffff8196e000 T drmm_kzalloc +ffffffff8196e100 T drmm_kcalloc +ffffffff8196e210 T drmm_kstrdup +ffffffff8196e350 T drmm_kfree +ffffffff8196e450 T drmm_add_action +ffffffff8196e510 T drmm_add_action_or_reset +ffffffff8196e5e0 T drm_managed_release +ffffffff8196e6a0 T drmm_add_final_kfree +ffffffff8196f000 T mipi_dsi_attach +ffffffff8196f050 T mipi_dsi_detach +ffffffff8196f0a0 T devm_mipi_dsi_attach +ffffffff8196f110 T mipi_dsi_packet_format_is_short +ffffffff8196f160 T mipi_dsi_packet_format_is_long +ffffffff8196f1b0 T mipi_dsi_create_packet +ffffffff8196f2c0 T mipi_dsi_shutdown_peripheral +ffffffff8196f370 T mipi_dsi_turn_on_peripheral +ffffffff8196f420 T mipi_dsi_set_maximum_return_packet_size +ffffffff8196f4d0 T mipi_dsi_compression_mode +ffffffff8196f580 T mipi_dsi_picture_parameter_set +ffffffff8196f630 T mipi_dsi_generic_write +ffffffff8196f6f0 T mipi_dsi_generic_read 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drm_mm_scan_init_with_range +ffffffff81971e50 T drm_mm_scan_add_block +ffffffff81971fc0 T drm_mm_scan_remove_block +ffffffff81972040 T drm_mm_scan_color_evict +ffffffff81972120 T drm_mm_init +ffffffff819721d0 T drm_mm_takedown +ffffffff81972210 T drm_mm_print +ffffffff81973000 T drm_modeset_register_all +ffffffff819730a0 T drm_modeset_unregister_all +ffffffff819730e0 T drm_mode_getresources +ffffffff81973390 T drm_mode_config_reset +ffffffff819734f0 T drmm_mode_config_init +ffffffff81973b70 T drm_mode_config_cleanup +ffffffff81973eb0 t drm_mode_config_init_release +ffffffff81973ec0 T drm_mode_config_validate +ffffffff81975000 T __drm_mode_object_add +ffffffff81975100 T drm_mode_object_add +ffffffff819751e0 T drm_mode_object_register +ffffffff81975230 T drm_mode_object_unregister +ffffffff819752d0 T drm_mode_object_lease_required +ffffffff81975320 T __drm_mode_object_find +ffffffff819753d0 T drm_mode_object_find +ffffffff81975480 T drm_mode_object_put +ffffffff81975500 T drm_mode_object_get +ffffffff81975560 T drm_object_attach_property +ffffffff81975670 T drm_object_property_set_value +ffffffff81975750 T drm_object_property_get_value +ffffffff819757e0 t __drm_object_property_get_value +ffffffff819758c0 T drm_object_property_get_default_value +ffffffff81975990 T drm_mode_object_get_properties +ffffffff81975ae0 T drm_mode_obj_get_properties_ioctl +ffffffff81975d30 T drm_mode_obj_find_prop_id +ffffffff81975d90 T drm_mode_obj_set_property_ioctl +ffffffff81977000 T drm_mode_debug_printmodeline +ffffffff81977140 T drm_mode_vrefresh +ffffffff819771e0 T drm_mode_create +ffffffff81977200 T drm_mode_destroy +ffffffff81977240 T drm_mode_probed_add +ffffffff819772e0 T drm_cvt_mode +ffffffff81977790 T drm_mode_set_name +ffffffff819777e0 T drm_gtf_mode_complex +ffffffff81977ae0 T drm_gtf_mode +ffffffff81977b30 T drm_mode_get_hv_timing +ffffffff81977b80 T drm_mode_init +ffffffff81977c50 T drm_mode_set_crtcinfo +ffffffff81977e00 T drm_mode_copy +ffffffff81977e60 T drm_mode_duplicate +ffffffff81977ee0 T drm_mode_match +ffffffff81978080 T drm_mode_equal +ffffffff819780a0 T drm_mode_equal_no_clocks +ffffffff819780c0 T drm_mode_equal_no_clocks_no_stereo +ffffffff81978180 T drm_mode_validate_driver +ffffffff81978270 T drm_mode_validate_size +ffffffff819782c0 T drm_mode_validate_ycbcr420 +ffffffff81978330 T drm_mode_is_420_only +ffffffff81978380 T drm_get_mode_status_name +ffffffff81978400 T drm_mode_prune_invalid +ffffffff819786a0 T drm_mode_sort +ffffffff819786d0 t drm_mode_compare +ffffffff81978860 T drm_connector_list_update +ffffffff81978a30 T drm_mode_parse_command_line_for_connector +ffffffff81978a60 T drm_mode_create_from_cmdline_mode +ffffffff81978b50 T drm_mode_convert_to_umode +ffffffff81978ce0 T drm_mode_convert_umode +ffffffff81978f00 T drm_mode_is_420_also +ffffffff81978f50 T drm_mode_is_420 +ffffffff81979000 T drm_helper_move_panel_connectors_to_head +ffffffff819790f0 T drm_helper_mode_fill_fb_struct +ffffffff819791b0 T drm_crtc_init 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__drm_printfn_seq_file +ffffffff81984270 T __drm_printfn_info +ffffffff819842a0 T __drm_printfn_debug +ffffffff819842d0 T __drm_printfn_err +ffffffff81984310 T drm_puts +ffffffff81984340 T drm_printf +ffffffff819843c0 T drm_print_bits +ffffffff819845e0 T drm_dev_printk +ffffffff81984680 T __drm_dev_dbg +ffffffff81984710 T ___drm_dbg +ffffffff819847a0 T __drm_err +ffffffff81984830 T drm_print_regset32 +ffffffff81985000 T drm_crtc_mode_valid +ffffffff81985050 T drm_encoder_mode_valid +ffffffff81985090 T drm_connector_mode_valid +ffffffff81985110 T drm_kms_helper_poll_enable +ffffffff81985200 T drm_helper_probe_detect +ffffffff819853f0 T drm_helper_probe_single_connector_modes +ffffffff819859b0 t __drm_helper_update_and_validate +ffffffff81985d60 T drm_kms_helper_hotplug_event +ffffffff81985da0 T drm_kms_helper_connector_hotplug_event +ffffffff81985de0 T drm_kms_helper_is_poll_worker +ffffffff81985e10 T drm_kms_helper_poll_disable +ffffffff81985e90 T drm_kms_helper_poll_init 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drm_self_refresh_helper_init +ffffffff8198a480 t drm_self_refresh_helper_entry_work +ffffffff8198a5e0 T drm_self_refresh_helper_cleanup +ffffffff8198a660 t __delayed_work_tick +ffffffff8198b000 T drm_syncobj_find +ffffffff8198b070 T drm_syncobj_add_point +ffffffff8198b160 t syncobj_wait_syncobj_func +ffffffff8198b210 T drm_syncobj_replace_fence +ffffffff8198b2a0 T drm_syncobj_find_fence +ffffffff8198b600 t drm_syncobj_fence_add_wait +ffffffff8198b6d0 T drm_syncobj_free +ffffffff8198b760 T drm_syncobj_create +ffffffff8198b970 T drm_syncobj_get_handle +ffffffff8198ba90 T drm_syncobj_get_fd +ffffffff8198bae0 T drm_syncobj_open +ffffffff8198bb10 T drm_syncobj_release +ffffffff8198bb50 t drm_syncobj_release_handle +ffffffff8198bc00 T drm_syncobj_create_ioctl +ffffffff8198bd30 T drm_syncobj_destroy_ioctl +ffffffff8198be50 T drm_syncobj_handle_to_fd_ioctl +ffffffff8198c040 T drm_syncobj_fd_to_handle_ioctl +ffffffff8198c230 T drm_syncobj_transfer_ioctl +ffffffff8198c650 T drm_timeout_abs_to_jiffies +ffffffff8198c730 T drm_syncobj_wait_ioctl +ffffffff8198c8c0 t drm_syncobj_array_find +ffffffff8198caf0 t drm_syncobj_array_free +ffffffff8198cbd0 T drm_syncobj_timeline_wait_ioctl +ffffffff8198cd60 T drm_syncobj_reset_ioctl +ffffffff8198cec0 T drm_syncobj_signal_ioctl +ffffffff8198d050 T drm_syncobj_timeline_signal_ioctl +ffffffff8198d280 T drm_syncobj_query_ioctl +ffffffff8198d480 t drm_syncobj_array_wait_timeout +ffffffff8198d8f0 t syncobj_wait_fence_func +ffffffff8198e000 T drm_vblank_count +ffffffff8198e090 T drm_crtc_accurate_vblank_count +ffffffff8198e1a0 t drm_update_vblank_count +ffffffff8198e5f0 T drm_vblank_disable_and_save +ffffffff8198e740 T drm_vblank_init +ffffffff8198e8c0 t vblank_disable_fn +ffffffff8198e940 t drm_vblank_init_release +ffffffff8198e9d0 T drm_dev_has_vblank +ffffffff8198ea00 T drm_crtc_vblank_waitqueue +ffffffff8198ea50 T drm_calc_timestamping_constants +ffffffff8198ec80 T drm_crtc_vblank_helper_get_vblank_timestamp_internal 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drm_crtc_handle_vblank +ffffffff81991e90 T drm_crtc_get_sequence_ioctl +ffffffff81992080 T drm_crtc_queue_sequence_ioctl +ffffffff81992450 t __get_vblank_counter +ffffffff81993000 T drm_handle_vblank_works +ffffffff819931b0 T drm_vblank_cancel_pending_works +ffffffff819932f0 T drm_vblank_work_schedule +ffffffff81993570 T drm_vblank_work_cancel_sync +ffffffff819936d0 T drm_vblank_work_flush +ffffffff819937a0 T drm_vblank_work_init +ffffffff81993810 T drm_vblank_worker_init +ffffffff81994000 T drm_vma_offset_manager_init +ffffffff81994040 T drm_vma_offset_manager_destroy +ffffffff81994060 T drm_vma_offset_lookup_locked +ffffffff819940f0 T drm_vma_offset_add +ffffffff81994180 T drm_vma_offset_remove +ffffffff819941d0 T drm_vma_node_allow +ffffffff819941f0 t vma_node_allow +ffffffff81994320 T drm_vma_node_allow_once +ffffffff81994340 T drm_vma_node_revoke +ffffffff819943c0 T drm_vma_node_is_allowed +ffffffff81995000 T hdmi_avi_infoframe_init +ffffffff81995080 T hdmi_avi_infoframe_check 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hdmi_infoframe_pack +ffffffff81996530 T hdmi_infoframe_log +ffffffff819974d0 T hdmi_drm_infoframe_unpack_only +ffffffff819975b0 T hdmi_infoframe_unpack +ffffffff81998000 T list_sort +ffffffff81999000 T radix_tree_lookup +ffffffff819990b0 T radix_tree_iter_find +ffffffff819991a0 T radix_tree_delete +ffffffff81999340 T radix_tree_iter_delete +ffffffff81999360 T radix_tree_insert +ffffffff8199a000 T sort +ffffffff8199a040 t qsort +ffffffff8199c000 T drm_dp_dual_mode_read +ffffffff8199c110 T drm_dp_dual_mode_write +ffffffff8199c1f0 T drm_dp_dual_mode_detect +ffffffff8199c4a0 T drm_dp_dual_mode_max_tmds_clock +ffffffff8199c5d0 T drm_dp_dual_mode_get_tmds_output +ffffffff8199c700 T drm_dp_dual_mode_set_tmds_output +ffffffff8199c990 T drm_dp_get_dual_mode_type_name +ffffffff8199ca00 T drm_lspcon_get_mode +ffffffff8199cbb0 T drm_lspcon_set_mode +ffffffff8199d000 T drm_dp_channel_eq_ok +ffffffff8199d080 T drm_dp_clock_recovery_ok +ffffffff8199d100 T drm_dp_get_adjust_request_voltage +ffffffff8199d140 T drm_dp_get_adjust_request_pre_emphasis +ffffffff8199d190 T drm_dp_get_adjust_tx_ffe_preset +ffffffff8199d1d0 T drm_dp_128b132b_lane_channel_eq_done +ffffffff8199d250 T drm_dp_128b132b_lane_symbol_locked +ffffffff8199d2c0 T drm_dp_128b132b_eq_interlane_align_done +ffffffff8199d2f0 T drm_dp_128b132b_cds_interlane_align_done +ffffffff8199d320 T drm_dp_128b132b_link_training_failed +ffffffff8199d350 T drm_dp_read_clock_recovery_delay +ffffffff8199d450 T drm_dp_read_channel_eq_delay +ffffffff8199d550 T drm_dp_128b132b_read_aux_rd_interval +ffffffff8199d600 T drm_dp_link_train_clock_recovery_delay +ffffffff8199d690 t __8b10b_clock_recovery_delay_us +ffffffff8199d710 T drm_dp_link_train_channel_eq_delay +ffffffff8199d790 T drm_dp_phy_name +ffffffff8199d7d0 T drm_dp_lttpr_link_train_clock_recovery_delay +ffffffff8199d7f0 T drm_dp_lttpr_link_train_channel_eq_delay +ffffffff8199d860 T drm_dp_link_rate_to_bw_code +ffffffff8199d8d0 T drm_dp_bw_code_to_link_rate +ffffffff8199d930 T drm_dp_dpcd_probe +ffffffff8199da70 t drm_dp_dpcd_access +ffffffff8199dba0 T drm_dp_dpcd_read +ffffffff8199dcd0 T drm_dp_dpcd_write +ffffffff8199dde0 T drm_dp_dpcd_read_link_status +ffffffff8199de00 T drm_dp_dpcd_read_phy_link_status +ffffffff8199df00 T drm_dp_downstream_is_type +ffffffff8199df40 T drm_dp_downstream_is_tmds +ffffffff8199dfb0 T drm_dp_send_real_edid_checksum +ffffffff8199e210 T drm_dp_read_dpcd_caps +ffffffff8199e3a0 T drm_dp_read_downstream_info +ffffffff8199e4a0 T drm_dp_downstream_max_dotclock +ffffffff8199e4f0 T drm_dp_downstream_max_tmds_clock +ffffffff8199e590 T drm_dp_downstream_min_tmds_clock +ffffffff8199e610 T drm_dp_downstream_max_bpc +ffffffff8199e6b0 T drm_dp_downstream_420_passthrough +ffffffff8199e710 T drm_dp_downstream_444_to_420_conversion +ffffffff8199e770 T drm_dp_downstream_rgb_to_ycbcr_conversion +ffffffff8199e7d0 T drm_dp_downstream_mode +ffffffff8199e860 T drm_dp_downstream_id +ffffffff8199e880 T drm_dp_downstream_debug +ffffffff8199e920 T drm_dp_subconnector_type +ffffffff8199e990 T drm_dp_set_subconnector_property +ffffffff8199ea00 T drm_dp_read_sink_count_cap +ffffffff8199ea50 T drm_dp_read_sink_count +ffffffff8199eab0 T drm_dp_remote_aux_init +ffffffff8199eae0 t drm_dp_aux_crc_work +ffffffff8199ec60 T drm_dp_aux_init +ffffffff8199ed10 T drm_dp_aux_register +ffffffff8199ee30 T drm_dp_aux_unregister +ffffffff8199ee60 T drm_dp_psr_setup_time +ffffffff8199eeb0 T drm_dp_start_crc +ffffffff8199ef60 T drm_dp_stop_crc +ffffffff8199eff0 T drm_dp_read_desc +ffffffff8199f1b0 T drm_dp_dsc_sink_max_slice_count +ffffffff8199f240 T drm_dp_dsc_sink_line_buf_depth +ffffffff8199f280 T drm_dp_dsc_sink_supported_input_bpcs +ffffffff8199f2f0 T drm_dp_read_lttpr_common_caps +ffffffff8199f3b0 T drm_dp_read_lttpr_phy_caps +ffffffff8199f470 T drm_dp_lttpr_count +ffffffff8199f500 T drm_dp_lttpr_max_link_rate +ffffffff8199f560 T drm_dp_lttpr_max_lane_count +ffffffff8199f590 T drm_dp_lttpr_voltage_swing_level_3_supported +ffffffff8199f5c0 T drm_dp_lttpr_pre_emphasis_level_3_supported +ffffffff8199f5f0 T drm_dp_get_phy_test_pattern +ffffffff8199f710 T drm_dp_set_phy_test_pattern +ffffffff8199f7e0 T drm_dp_vsc_sdp_log +ffffffff8199fb10 T drm_dp_get_pcon_max_frl_bw +ffffffff8199fb60 T drm_dp_pcon_frl_prepare +ffffffff8199fbb0 T drm_dp_pcon_is_frl_ready +ffffffff8199fc00 T drm_dp_pcon_frl_configure_1 +ffffffff8199fd00 T drm_dp_pcon_frl_configure_2 +ffffffff8199fd60 T drm_dp_pcon_reset_frl_config +ffffffff8199fdb0 T drm_dp_pcon_frl_enable +ffffffff8199fe70 T drm_dp_pcon_hdmi_link_active +ffffffff8199fec0 T drm_dp_pcon_hdmi_link_mode +ffffffff8199ff30 T drm_dp_pcon_hdmi_frl_link_error_count +ffffffff819a0030 T drm_dp_pcon_enc_is_dsc_1_2 +ffffffff819a0060 T drm_dp_pcon_dsc_max_slices +ffffffff819a00f0 T drm_dp_pcon_dsc_max_slice_width +ffffffff819a0120 T drm_dp_pcon_dsc_bpp_incr +ffffffff819a0160 T drm_dp_pcon_pps_default +ffffffff819a01f0 T drm_dp_pcon_pps_override_buf +ffffffff819a02a0 T drm_dp_pcon_pps_override_param +ffffffff819a0380 T drm_dp_pcon_convert_rgb_to_ycbcr +ffffffff819a0420 T drm_edp_backlight_set_level +ffffffff819a0500 T drm_edp_backlight_enable +ffffffff819a0710 t drm_edp_backlight_set_enable +ffffffff819a0850 T drm_edp_backlight_disable +ffffffff819a0890 T drm_edp_backlight_init +ffffffff819a0de0 T drm_panel_dp_aux_backlight +ffffffff819a0f70 t __128b132b_channel_eq_delay_us +ffffffff819a0ff0 t __8b10b_channel_eq_delay_us +ffffffff819a1070 t drm_dp_aux_get_crc +ffffffff819a1140 t drm_dp_i2c_xfer +ffffffff819a1390 t drm_dp_i2c_functionality +ffffffff819a13c0 t drm_dp_i2c_do_msg +ffffffff819a17a0 t lock_bus +ffffffff819a17c0 t trylock_bus +ffffffff819a1810 t unlock_bus +ffffffff819a1830 t dp_aux_backlight_update_status +ffffffff819a2000 T drm_dp_encode_sideband_req +ffffffff819a2420 T drm_dp_decode_sideband_req +ffffffff819a2970 T drm_dp_dump_sideband_msg_req_body +ffffffff819a2d30 T drm_dp_mst_get_port_malloc +ffffffff819a2d80 T drm_dp_mst_put_port_malloc +ffffffff819a2e80 t kref_put +ffffffff819a2ec0 T drm_atomic_get_mst_payload_state +ffffffff819a2f20 T drm_dp_mst_dpcd_read +ffffffff819a31e0 T drm_dp_mst_dpcd_write +ffffffff819a3230 t drm_dp_send_dpcd_write +ffffffff819a3470 T drm_dp_mst_connector_late_register +ffffffff819a34f0 T drm_dp_mst_connector_early_unregister +ffffffff819a3530 T drm_dp_send_power_updown_phy +ffffffff819a3770 t drm_dp_mst_topology_put_port +ffffffff819a38a0 t drm_dp_mst_wait_tx_reply +ffffffff819a3bf0 T drm_dp_send_query_stream_enc_status +ffffffff819a3eb0 T drm_dp_add_payload_part1 +ffffffff819a4060 T drm_dp_remove_payload +ffffffff819a4200 T drm_dp_add_payload_part2 +ffffffff819a43c0 T drm_dp_get_vc_payload_bw +ffffffff819a4460 T drm_dp_read_mst_cap +ffffffff819a44c0 T drm_dp_mst_topology_mgr_set_mst +ffffffff819a4780 t drm_dp_dpcd_write_payload +ffffffff819a4910 t drm_dp_mst_topology_put_mstb +ffffffff819a4a10 T drm_dp_mst_topology_mgr_suspend +ffffffff819a4ad0 t drm_dp_mst_topology_mgr_invalidate_mstb +ffffffff819a4b40 T drm_dp_mst_topology_mgr_resume +ffffffff819a4d80 T drm_dp_mst_hpd_irq +ffffffff819a5bf0 T drm_dp_mst_detect_port +ffffffff819a5d70 T drm_dp_mst_get_edid +ffffffff819a5e80 T drm_dp_atomic_find_time_slots +ffffffff819a6150 T drm_atomic_get_mst_topology_state +ffffffff819a6160 T drm_dp_atomic_release_time_slots +ffffffff819a6380 T drm_dp_mst_atomic_setup_commit +ffffffff819a6510 T drm_dp_mst_atomic_wait_for_dependencies +ffffffff819a6690 T drm_dp_mst_root_conn_atomic_check +ffffffff819a67b0 T drm_dp_mst_update_slots +ffffffff819a6810 T drm_dp_check_act_status +ffffffff819a69c0 T drm_dp_calc_pbn_mode +ffffffff819a6a30 T drm_dp_mst_dump_topology +ffffffff819a6c80 t drm_dp_mst_dump_mstb +ffffffff819a6cf0 T drm_dp_mst_add_affected_dsc_crtcs +ffffffff819a6e20 T drm_dp_mst_dsc_aux_for_port +ffffffff819a7050 T drm_dp_mst_atomic_enable_dsc +ffffffff819a71f0 T drm_dp_mst_atomic_check +ffffffff819a74e0 t drm_dp_mst_atomic_check_mstb_bw_limit +ffffffff819a77b0 t drm_dp_mst_duplicate_state +ffffffff819a7980 t drm_dp_mst_destroy_state +ffffffff819a7a40 T drm_atomic_get_old_mst_topology_state +ffffffff819a7a50 T drm_atomic_get_new_mst_topology_state +ffffffff819a7a60 T drm_dp_mst_topology_mgr_init +ffffffff819a7cd0 t drm_dp_mst_link_probe_work +ffffffff819a7f70 t drm_dp_tx_work +ffffffff819a7fc0 t drm_dp_delayed_destroy_work +ffffffff819a83e0 t drm_dp_mst_up_req_work +ffffffff819a88f0 T drm_dp_mst_topology_mgr_destroy +ffffffff819a8980 t drm_dp_mst_is_virtual_dpcd +ffffffff819a8a60 t drm_dp_free_mst_branch_device +ffffffff819a8aa0 t drm_dp_mst_topology_get_port_validated_locked +ffffffff819a8b20 t drm_dp_mst_dump_sideband_msg_tx +ffffffff819a8d30 t process_single_down_tx_qlock +ffffffff819a8ea0 t process_single_tx_qlock +ffffffff819a9380 t drm_dp_msg_data_crc4 +ffffffff819a94a0 t drm_dp_payload_send_msg +ffffffff819a98f0 t drm_dp_mst_topology_get_mstb_validated_locked +ffffffff819a9970 t drm_dp_get_one_sb_msg +ffffffff819aa090 t drm_dp_get_mst_branch_device +ffffffff819aa200 t drm_dp_check_and_send_link_address +ffffffff819aa2d0 t drm_dp_send_link_address +ffffffff819aaf80 t drm_dp_send_enum_path_resources +ffffffff819ab1e0 t drm_dp_port_set_pdt +ffffffff819ab4c0 t drm_dp_mst_port_add_connector +ffffffff819ab6a0 t drm_dp_mst_i2c_xfer +ffffffff819abda0 t drm_dp_mst_i2c_functionality +ffffffff819abdd0 t get_mst_branch_device_by_guid_helper +ffffffff819ac000 T drm_dsc_dp_pps_header_init +ffffffff819ac030 T drm_dsc_dp_rc_buffer_size +ffffffff819ac090 T drm_dsc_pps_payload_pack +ffffffff819ac330 T drm_dsc_compute_rc_parameters +ffffffff819ad000 T drm_connector_attach_content_protection_property +ffffffff819ad030 T drm_hdcp_check_ksvs_revoked +ffffffff819ad080 T drm_hdcp_update_content_protection +ffffffff819ae000 T drm_hdmi_infoframe_set_hdr_metadata +ffffffff819ae120 T drm_hdmi_avi_infoframe_colorimetry +ffffffff819ae170 T drm_hdmi_avi_infoframe_bars +ffffffff819ae1c0 T drm_hdmi_avi_infoframe_content_type +ffffffff819af000 T drm_scdc_read +ffffffff819af090 T drm_scdc_write +ffffffff819af170 T drm_scdc_get_scrambling_status +ffffffff819af230 T drm_scdc_set_scrambling +ffffffff819af380 T drm_scdc_set_high_tmds_clock_ratio +ffffffff819b0000 T drm_gem_ttm_mmap +ffffffff819b0070 T drm_gem_ttm_vmap +ffffffff819b0080 T drm_gem_ttm_vunmap +ffffffff819b1000 T ttm_agp_bind +ffffffff819b1050 T ttm_agp_unbind +ffffffff819b1070 T ttm_agp_is_bound +ffffffff819b10c0 T ttm_agp_destroy +ffffffff819b10e0 T ttm_agp_tt_create +ffffffff819b2000 T ttm_bo_move_to_lru_tail +ffffffff819b2040 T ttm_bo_set_bulk_move +ffffffff819b2100 T ttm_bo_delayed_delete +ffffffff819b23f0 t ttm_bo_cleanup_refs +ffffffff819b27a0 T ttm_bo_put +ffffffff819b2ce0 T ttm_bo_lock_delayed_workqueue +ffffffff819b2d60 T ttm_bo_unlock_delayed_workqueue +ffffffff819b2dd0 T ttm_bo_eviction_valuable +ffffffff819b2e20 T ttm_mem_evict_first +ffffffff819b36e0 T ttm_bo_pin +ffffffff819b3780 T ttm_bo_unpin +ffffffff819b3890 T ttm_bo_mem_space +ffffffff819b3ae0 t ttm_bo_add_move_fence +ffffffff819b3ba0 T ttm_bo_validate +ffffffff819b3d20 T ttm_bo_init_reserved +ffffffff819b3fc0 T ttm_bo_init_validate +ffffffff819b4130 T ttm_bo_unmap_virtual +ffffffff819b4250 T ttm_bo_wait +ffffffff819b42d0 T ttm_bo_swapout +ffffffff819b46f0 t ttm_bo_handle_move_mem +ffffffff819b4860 T ttm_bo_tt_destroy +ffffffff819b5000 T ttm_mem_io_reserve +ffffffff819b5060 T ttm_mem_io_free +ffffffff819b50d0 T ttm_move_memcpy +ffffffff819b5290 T ttm_bo_move_memcpy +ffffffff819b54c0 T ttm_bo_move_sync_cleanup +ffffffff819b55b0 T ttm_io_prot +ffffffff819b55f0 T ttm_bo_kmap +ffffffff819b58a0 T ttm_bo_kunmap +ffffffff819b59e0 T ttm_bo_vmap +ffffffff819b5bd0 T ttm_bo_vunmap +ffffffff819b5cc0 T ttm_bo_move_accel_cleanup +ffffffff819b5f80 T ttm_bo_pipeline_gutting +ffffffff819b6220 t ttm_buffer_object_transfer +ffffffff819b6470 t ttm_transfered_destroy +ffffffff819b7000 T ttm_bo_vm_reserve +ffffffff819b7250 T ttm_bo_vm_fault_reserved +ffffffff819b7570 T ttm_bo_vm_fault +ffffffff819b76d0 T ttm_bo_vm_reference +ffffffff819b7700 T ttm_bo_vm_detach +ffffffff819b7710 T ttm_bo_mmap_obj +ffffffff819b8000 T ttm_global_swapout +ffffffff819b8100 T ttm_device_swapout +ffffffff819b8220 T ttm_device_init +ffffffff819b8470 t ttm_device_delayed_workqueue +ffffffff819b8510 T ttm_device_fini +ffffffff819b86f0 T ttm_device_clear_dma_mappings +ffffffff819b87a0 t ttm_device_clear_lru_dma_mappings +ffffffff819b8850 t __delayed_work_tick +ffffffff819b9000 T ttm_eu_backoff_reservation +ffffffff819b9130 T ttm_eu_reserve_buffers +ffffffff819b9530 T ttm_eu_fence_buffer_objects +ffffffff819b9680 t __ww_mutex_lock +ffffffff819ba000 T ttm_prot_from_caching +ffffffff819bb000 T ttm_pool_alloc +ffffffff819bb7c0 T ttm_pool_free +ffffffff819bbbe0 T ttm_pool_init +ffffffff819bbe90 T ttm_pool_fini +ffffffff819bc060 t ttm_pool_type_fini +ffffffff819bc2a0 T ttm_pool_mgr_init +ffffffff819bc580 t ttm_pool_shrinker_count +ffffffff819bc5d0 t ttm_pool_shrinker_scan +ffffffff819bc7e0 T ttm_pool_mgr_fini +ffffffff819bd000 T ttm_range_man_init_nocheck +ffffffff819bd180 T ttm_range_man_fini_nocheck +ffffffff819bd310 t ttm_range_man_alloc +ffffffff819bd450 t ttm_range_man_free +ffffffff819bd4b0 t ttm_range_man_intersects +ffffffff819bd510 t ttm_range_man_compatible +ffffffff819bd570 t ttm_range_man_debug +ffffffff819be000 T ttm_lru_bulk_move_init +ffffffff819be020 T ttm_lru_bulk_move_tail +ffffffff819be1e0 T ttm_resource_add_bulk_move +ffffffff819be2a0 T ttm_resource_del_bulk_move +ffffffff819be390 T ttm_resource_move_to_lru_tail +ffffffff819be4e0 T ttm_resource_init +ffffffff819be5e0 T ttm_resource_fini +ffffffff819be650 T ttm_resource_alloc +ffffffff819be790 T ttm_resource_free +ffffffff819be900 T ttm_resource_intersects +ffffffff819be960 T ttm_resource_compatible +ffffffff819be9c0 T ttm_resource_compat +ffffffff819beb50 T ttm_resource_set_bo +ffffffff819beba0 T ttm_resource_manager_init +ffffffff819bec50 T ttm_resource_manager_evict_all +ffffffff819bee20 T ttm_resource_manager_usage +ffffffff819bee80 T ttm_resource_manager_debug +ffffffff819bef70 T ttm_resource_manager_first +ffffffff819bf000 T ttm_resource_manager_next +ffffffff819bf140 T ttm_kmap_iter_iomap_init +ffffffff819bf1a0 T ttm_kmap_iter_linear_io_init +ffffffff819bf370 T ttm_kmap_iter_linear_io_fini +ffffffff819bf3c0 T ttm_resource_manager_create_debugfs +ffffffff819bf3f0 t ttm_kmap_iter_iomap_map_local +ffffffff819bf530 t ttm_kmap_iter_iomap_unmap_local +ffffffff819bf550 t ttm_kmap_iter_linear_io_map_local +ffffffff819c0000 T ttm_sys_man_init +ffffffff819c0130 t ttm_sys_man_alloc +ffffffff819c01b0 t ttm_sys_man_free +ffffffff819c1000 T ttm_tt_create +ffffffff819c1100 T ttm_tt_destroy +ffffffff819c1120 T ttm_tt_init +ffffffff819c11f0 T ttm_tt_fini +ffffffff819c12d0 T ttm_sg_tt_init +ffffffff819c14f0 T ttm_tt_swapin +ffffffff819c1600 T ttm_tt_swapout +ffffffff819c1650 T ttm_tt_populate +ffffffff819c1820 T ttm_tt_unpopulate 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icl_ddi_combo_get_pll +ffffffff81a08600 T hsw_ddi_enable_clock +ffffffff81a086c0 T hsw_ddi_disable_clock +ffffffff81a08700 T hsw_ddi_is_clock_enabled +ffffffff81a08760 T intel_ddi_enable_clock +ffffffff81a087a0 T intel_ddi_disable_clock +ffffffff81a087e0 T intel_ddi_sanitize_encoder_pll_mapping +ffffffff81a089c0 T dp_tp_ctl_reg +ffffffff81a08a40 T dp_tp_status_reg +ffffffff81a08ac0 T intel_ddi_update_pipe +ffffffff81a08b50 T intel_ddi_compute_min_voltage_level +ffffffff81a08bc0 T intel_ddi_get_clock +ffffffff81a08cd0 T hsw_ddi_get_config +ffffffff81a08dc0 t intel_ddi_get_config +ffffffff81a09630 T intel_ddi_init +ffffffff81a0a1d0 t intel_ddi_hotplug +ffffffff81a0a600 t intel_ddi_compute_output_type +ffffffff81a0a680 t intel_ddi_compute_config +ffffffff81a0a7c0 t intel_ddi_compute_config_late +ffffffff81a0aa70 t intel_enable_ddi +ffffffff81a0b250 t intel_ddi_pre_pll_enable +ffffffff81a0b3c0 t intel_ddi_pre_enable +ffffffff81a0c090 t intel_disable_ddi +ffffffff81a0c210 t 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t intel_ddi_encoder_destroy +ffffffff81a103a0 t icl_program_mg_dp_mode +ffffffff81a10630 t intel_ddi_init_dp_buf_reg +ffffffff81a107f0 t intel_disable_ddi_buf +ffffffff81a10b10 t intel_ddi_prepare_link_retrain +ffffffff81a11180 t intel_ddi_set_link_train +ffffffff81a112e0 t intel_ddi_set_idle_link_train +ffffffff81a11500 t intel_ddi_dp_voltage_max +ffffffff81a115c0 t intel_ddi_dp_preemph_max +ffffffff81a12000 T is_hobl_buf_trans +ffffffff81a12040 T intel_ddi_buf_trans_init +ffffffff81a12300 t dg2_get_snps_buf_trans +ffffffff81a12370 t adlp_get_combo_buf_trans +ffffffff81a124a0 t adlp_get_dkl_buf_trans +ffffffff81a12500 t adls_get_combo_buf_trans +ffffffff81a12630 t rkl_get_combo_buf_trans +ffffffff81a12760 t dg1_get_combo_buf_trans +ffffffff81a12890 t tgl_get_combo_buf_trans +ffffffff81a129e0 t tgl_get_dkl_buf_trans +ffffffff81a12a40 t jsl_get_combo_buf_trans +ffffffff81a12af0 t ehl_get_combo_buf_trans +ffffffff81a12ba0 t icl_get_combo_buf_trans +ffffffff81a12c50 t icl_get_mg_buf_trans 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intel_remapped_info_size +ffffffff81a14eb0 T intel_plane_uses_fence +ffffffff81a14f00 T intel_fb_xy_to_linear +ffffffff81a14f50 T intel_add_fb_offsets +ffffffff81a14fa0 T intel_plane_fb_max_stride +ffffffff81a15020 T intel_set_plane_visible +ffffffff81a15070 T intel_plane_fixup_bitmasks +ffffffff81a15120 T intel_plane_disable_noatomic +ffffffff81a15310 T intel_plane_fence_y_offset +ffffffff81a15370 T intel_display_prepare_reset +ffffffff81a15550 T intel_display_finish_reset +ffffffff81a15750 t __intel_display_resume +ffffffff81a15860 T intel_modeset_init_hw +ffffffff81a15900 T intel_has_pending_fb_unpin +ffffffff81a15a00 T intel_get_crtc_new_encoder +ffffffff81a15ba0 T ilk_pfit_disable +ffffffff81a15c60 T intel_phy_is_combo +ffffffff81a15ce0 T intel_phy_is_tc +ffffffff81a15d50 T intel_phy_is_snps +ffffffff81a15d90 T intel_port_to_phy +ffffffff81a15e20 T intel_port_to_tc +ffffffff81a15f20 T intel_aux_power_domain +ffffffff81a15f60 T intel_modeset_get_crtc_power_domains +ffffffff81a16180 T intel_modeset_put_crtc_power_domains +ffffffff81a161b0 T intel_display_suspend +ffffffff81a16250 T intel_encoder_destroy +ffffffff81a16280 T intel_encoder_get_config +ffffffff81a162b0 t intel_crtc_readout_derived_state +ffffffff81a166e0 T intel_link_compute_m_n +ffffffff81a16810 T intel_zero_m_n +ffffffff81a16850 T intel_set_m_n +ffffffff81a16910 T intel_cpu_transcoder_has_m2_n2 +ffffffff81a16970 T intel_cpu_transcoder_set_m1_n1 +ffffffff81a16b30 T intel_cpu_transcoder_set_m2_n2 +ffffffff81a16c90 T i9xx_set_pipeconf +ffffffff81a16e40 T ilk_set_pipeconf +ffffffff81a17020 T bdw_get_pipemisc_bpp +ffffffff81a17110 T ilk_get_lanes_required +ffffffff81a17170 T intel_get_m_n +ffffffff81a17280 T intel_cpu_transcoder_get_m1_n1 +ffffffff81a17420 T intel_cpu_transcoder_get_m2_n2 +ffffffff81a17590 T intel_crtc_get_pipe_config +ffffffff81a17600 T intel_get_load_detect_pipe +ffffffff81a17a20 T intel_release_load_detect_pipe +ffffffff81a17af0 T i9xx_crtc_clock_get +ffffffff81a17d80 T intel_dotclock_calculate +ffffffff81a17de0 T intel_crtc_dotclock +ffffffff81a17eb0 T intel_encoder_current_mode +ffffffff81a18060 T intel_fuzzy_clock_check +ffffffff81a180b0 T intel_pipe_config_compare +ffffffff81a1aba0 t pipe_config_mismatch +ffffffff81a1ac90 t pipe_config_infoframe_mismatch +ffffffff81a1ae40 T intel_modeset_all_pipes +ffffffff81a1afe0 T intel_atomic_add_affected_planes +ffffffff81a1b0b0 T intel_crtc_update_active_timings +ffffffff81a1b1b0 T intel_calc_active_pipes +ffffffff81a1b240 T intel_crtc_arm_fifo_underrun +ffffffff81a1b2e0 T intel_plane_destroy +ffffffff81a1b310 T intel_get_pipe_from_crtc_id_ioctl +ffffffff81a1b380 T intel_mode_valid_max_plane_size +ffffffff81a1b400 T intel_init_display_hooks +ffffffff81a1b4e0 T intel_modeset_init_noirq +ffffffff81a1b7a0 t intel_atomic_helper_free_state_worker +ffffffff81a1b810 T intel_modeset_init_nogem +ffffffff81a1c940 T intel_modeset_init +ffffffff81a1cb60 T i830_enable_pipe +ffffffff81a1d190 T i830_disable_pipe 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t __intel_display_power_get_domain +ffffffff81a295c0 T intel_display_power_get_if_enabled +ffffffff81a296f0 T __intel_display_power_put_async +ffffffff81a298c0 t __intel_display_power_put_domain +ffffffff81a29a40 T intel_display_power_flush_work +ffffffff81a29b60 t release_async_put_domains +ffffffff81a29c40 T intel_display_power_put_unchecked +ffffffff81a29ca0 T intel_display_power_get_in_set +ffffffff81a29d80 T intel_display_power_get_in_set_if_enabled +ffffffff81a29e30 T intel_display_power_put_mask_in_set +ffffffff81a29f00 T intel_power_domains_init +ffffffff81a2a150 t intel_display_power_put_async_work +ffffffff81a2a3c0 T intel_power_domains_cleanup +ffffffff81a2a3e0 T gen9_dbuf_slices_update +ffffffff81a2a600 T intel_power_domains_init_hw +ffffffff81a2ada0 t icl_display_core_init +ffffffff81a2b690 t bxt_display_core_init +ffffffff81a2b7c0 T intel_power_domains_driver_remove +ffffffff81a2b8b0 T intel_power_domains_sanitize_state +ffffffff81a2b9a0 T intel_power_domains_enable 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bxt_dpio_cmn_power_well_enable +ffffffff81a31b20 t bxt_dpio_cmn_power_well_disable +ffffffff81a31b50 t bxt_dpio_cmn_power_well_enabled +ffffffff81a31b80 t vlv_display_power_well_enable +ffffffff81a31bb0 t vlv_display_power_well_disable +ffffffff81a31c20 t vlv_dpio_cmn_power_well_enable +ffffffff81a31ca0 t vlv_dpio_cmn_power_well_disable +ffffffff81a31da0 t vlv_power_well_enable +ffffffff81a31dc0 t vlv_power_well_disable +ffffffff81a31de0 t icl_aux_power_well_enable +ffffffff81a32460 t icl_aux_power_well_disable +ffffffff81a32700 t tgl_tc_cold_off_power_well_sync_hw +ffffffff81a32720 t tgl_tc_cold_off_power_well_enable +ffffffff81a32740 t tgl_tc_cold_off_power_well_disable +ffffffff81a32760 t tgl_tc_cold_off_power_well_is_enabled +ffffffff81a32790 t xelpdp_aux_power_well_enable +ffffffff81a32870 t xelpdp_aux_power_well_disable +ffffffff81a32950 t xelpdp_aux_power_well_enabled +ffffffff81a32a00 t chv_set_pipe_power_well +ffffffff81a32c00 t vlv_display_power_well_init +ffffffff81a32e90 t vlv_set_power_well +ffffffff81a330a0 t hsw_wait_for_power_well_enable +ffffffff81a331e0 t hsw_wait_for_power_well_disable +ffffffff81a33470 t tgl_tc_cold_request +ffffffff81a34000 T intel_dkl_phy_read +ffffffff81a34100 T intel_dkl_phy_write +ffffffff81a341f0 T intel_dkl_phy_rmw +ffffffff81a34310 T intel_dkl_phy_posting_read +ffffffff81a35000 T intel_dmc_has_payload +ffffffff81a35040 T intel_dmc_load_program +ffffffff81a35820 t pipedmc_clock_gating_wa +ffffffff81a35a10 T intel_dmc_disable_program +ffffffff81a35c30 T assert_dmc_loaded +ffffffff81a35d80 T intel_dmc_ucode_init +ffffffff81a36050 t dmc_load_work_fn +ffffffff81a368b0 T intel_dmc_ucode_suspend +ffffffff81a36920 T intel_dmc_ucode_resume +ffffffff81a369c0 T intel_dmc_ucode_fini +ffffffff81a36af0 T intel_dmc_print_error_state +ffffffff81a36ba0 T intel_dmc_debugfs_register +ffffffff81a37000 T intel_dp_is_edp +ffffffff81a37030 T intel_dp_is_uhbr +ffffffff81a37070 T intel_dp_max_lane_count +ffffffff81a370e0 T intel_dp_link_required +ffffffff81a37120 T intel_dp_max_data_rate +ffffffff81a37190 T intel_dp_can_bigjoiner +ffffffff81a371e0 T intel_dp_get_link_train_fallback_values +ffffffff81a375c0 T intel_dp_mode_to_fec_clock +ffffffff81a37610 T intel_dp_min_bpp +ffffffff81a37650 T intel_dp_source_supports_tps3 +ffffffff81a376a0 T intel_dp_source_supports_tps4 +ffffffff81a376d0 T intel_dp_max_link_rate +ffffffff81a37790 T intel_dp_rate_select +ffffffff81a37830 T intel_dp_compute_rate +ffffffff81a37900 T intel_dp_adjust_compliance_config +ffffffff81a37a40 T intel_dp_limited_color_range +ffffffff81a37ab0 T intel_dp_compute_psr_vsc_sdp +ffffffff81a37b30 T intel_dp_needs_vsc_sdp +ffffffff81a37b80 t intel_dp_compute_vsc_colorimetry +ffffffff81a37d00 T intel_dp_compute_config +ffffffff81a38390 t intel_dp_compute_output_format +ffffffff81a385c0 T intel_dp_set_link_params +ffffffff81a38600 T intel_edp_backlight_on +ffffffff81a386b0 T intel_edp_backlight_off +ffffffff81a38760 T intel_dp_sink_set_decompression_state +ffffffff81a38800 T intel_dp_wait_source_oui +ffffffff81a388d0 T intel_dp_set_power +ffffffff81a38ae0 T intel_dp_sync_state +ffffffff81a38b60 t intel_dp_get_dpcd +ffffffff81a38cc0 t intel_dp_reset_max_link_params +ffffffff81a38dd0 T intel_dp_initial_fastset_check +ffffffff81a38ed0 T intel_dp_check_frl_training +ffffffff81a39460 T intel_dp_pcon_dsc_configure +ffffffff81a39630 T intel_dp_configure_protocol_converter +ffffffff81a397a0 T intel_dp_get_colorimetry_status +ffffffff81a39800 T intel_edp_fixup_vbt_bpp +ffffffff81a398a0 T intel_write_dp_vsc_sdp +ffffffff81a39a30 T intel_dp_set_infoframes +ffffffff81a39b60 t intel_write_dp_sdp +ffffffff81a39e50 T intel_read_dp_sdp +ffffffff81a3a180 T intel_dp_retrain_link +ffffffff81a3a840 T intel_dp_phy_test +ffffffff81a3af20 T intel_digital_port_connected +ffffffff81a3afc0 T intel_dp_encoder_flush_work +ffffffff81a3b010 T intel_dp_encoder_suspend +ffffffff81a3b050 T intel_dp_encoder_shutdown +ffffffff81a3b090 T intel_dp_hpd_pulse +ffffffff81a3b7e0 T intel_dp_is_port_edp +ffffffff81a3b830 T intel_dp_init_connector +ffffffff81a3c990 t intel_dp_modeset_retry_work_fn +ffffffff81a3ca10 t intel_dp_set_common_rates +ffffffff81a3cbb0 T intel_dp_mst_suspend +ffffffff81a3cc50 T intel_dp_mst_resume +ffffffff81a3cd00 t intel_dp_compute_link_config +ffffffff81a3da20 t intel_dp_dsc_get_slice_count +ffffffff81a3db90 t intel_dp_set_sink_rates +ffffffff81a3ddc0 t intel_dp_check_device_service_irq +ffffffff81a3e390 t intel_dp_force +ffffffff81a3e4d0 t intel_dp_connector_register +ffffffff81a3e5b0 t intel_dp_connector_unregister +ffffffff81a3e610 t intel_dp_oob_hotplug_event +ffffffff81a3e690 t intel_dp_set_edid +ffffffff81a3eac0 t intel_dp_get_modes +ffffffff81a3ebc0 t intel_dp_detect +ffffffff81a3f4b0 t intel_dp_mode_valid +ffffffff81a3fc40 t intel_dp_connector_atomic_check +ffffffff81a3ff80 t intel_dp_get_dsc_sink_cap +ffffffff81a41000 T intel_dp_aux_fini +ffffffff81a41020 T intel_dp_aux_init +ffffffff81a41200 t xelpdp_aux_ctl_reg +ffffffff81a412c0 t xelpdp_aux_data_reg +ffffffff81a41390 t tgl_aux_ctl_reg +ffffffff81a41410 t tgl_aux_data_reg +ffffffff81a414a0 t skl_aux_ctl_reg +ffffffff81a41520 t skl_aux_data_reg +ffffffff81a415b0 t ilk_aux_ctl_reg +ffffffff81a41630 t ilk_aux_data_reg +ffffffff81a416c0 t g4x_aux_ctl_reg +ffffffff81a41740 t g4x_aux_data_reg +ffffffff81a417d0 t skl_get_aux_clock_divider +ffffffff81a41800 t hsw_get_aux_clock_divider +ffffffff81a418a0 t ilk_get_aux_clock_divider +ffffffff81a41900 t g4x_get_aux_clock_divider +ffffffff81a41950 t skl_get_aux_send_ctl +ffffffff81a419d0 t g4x_get_aux_send_ctl +ffffffff81a41a20 t kasprintf +ffffffff81a41af0 t intel_dp_aux_transfer +ffffffff81a41d40 t intel_dp_aux_xfer +ffffffff81a43000 T intel_dp_aux_init_backlight_funcs +ffffffff81a43270 t intel_dp_aux_hdr_setup_backlight +ffffffff81a433c0 t intel_dp_aux_hdr_get_backlight +ffffffff81a43530 t intel_dp_aux_hdr_set_backlight +ffffffff81a43620 t intel_dp_aux_hdr_disable_backlight +ffffffff81a436a0 t intel_dp_aux_hdr_enable_backlight +ffffffff81a438f0 t intel_dp_aux_vesa_setup_backlight +ffffffff81a43ab0 t intel_dp_aux_vesa_get_backlight +ffffffff81a43ae0 t intel_dp_aux_vesa_set_backlight +ffffffff81a43b80 t intel_dp_aux_vesa_disable_backlight +ffffffff81a43c30 t intel_dp_aux_vesa_enable_backlight +ffffffff81a44000 T intel_dp_hdcp_init +ffffffff81a440b0 t intel_dp_hdcp_write_an_aksv +ffffffff81a441a0 t intel_dp_hdcp_read_bksv +ffffffff81a44230 t intel_dp_hdcp_read_bstatus +ffffffff81a442c0 t intel_dp_hdcp_repeater_present +ffffffff81a44370 t intel_dp_hdcp_read_ri_prime +ffffffff81a44400 t intel_dp_hdcp_read_ksv_ready +ffffffff81a444a0 t intel_dp_hdcp_read_ksv_fifo +ffffffff81a44590 t intel_dp_hdcp_read_v_prime_part +ffffffff81a44630 t intel_dp_hdcp_toggle_signalling +ffffffff81a44660 t intel_dp_mst_hdcp_stream_encryption +ffffffff81a44870 t intel_dp_hdcp_check_link +ffffffff81a44900 t intel_dp_hdcp_capable +ffffffff81a449b0 t intel_dp_hdcp2_capable +ffffffff81a44a30 t intel_dp_hdcp2_write_msg +ffffffff81a44af0 t intel_dp_hdcp2_read_msg +ffffffff81a451c0 t intel_dp_hdcp2_config_stream_type +ffffffff81a45270 t intel_dp_mst_hdcp2_stream_encryption +ffffffff81a45500 t intel_dp_mst_hdcp2_check_link +ffffffff81a455c0 t get_hdcp2_dp_msg_data +ffffffff81a45700 t intel_dp_hdcp2_check_link +ffffffff81a46000 T intel_dp_init_lttpr_and_dprx_caps +ffffffff81a462c0 T intel_dp_get_adjust_train +ffffffff81a46980 T intel_dp_program_link_training_pattern +ffffffff81a46a80 T intel_dp_set_signal_levels +ffffffff81a46de0 T intel_dp_dump_link_status +ffffffff81a46eb0 T intel_dp_stop_link_train +ffffffff81a470e0 T intel_dp_start_link_train +ffffffff81a48220 t intel_dp_link_train_phy +ffffffff81a4a000 T intel_dp_mst_encoder_active_links +ffffffff81a4a030 T intel_dp_mst_encoder_init +ffffffff81a4a270 T intel_dp_mst_source_support +ffffffff81a4a2b0 T intel_dp_mst_encoder_cleanup +ffffffff81a4a310 T intel_dp_mst_is_master_trans +ffffffff81a4a350 T intel_dp_mst_is_slave_trans +ffffffff81a4a390 T intel_dp_mst_add_topology_state_for_crtc +ffffffff81a4a460 t intel_dp_add_mst_connector +ffffffff81a4a670 t intel_dp_mst_poll_hpd_irq +ffffffff81a4a690 t intel_dp_mst_get_hw_state +ffffffff81a4a6f0 t intel_dp_mst_connector_late_register +ffffffff81a4a760 t intel_dp_mst_connector_early_unregister +ffffffff81a4a790 t intel_dp_mst_get_modes +ffffffff81a4a830 t intel_dp_mst_detect +ffffffff81a4a930 t intel_dp_mst_mode_valid_ctx +ffffffff81a4aa90 t intel_mst_atomic_best_encoder +ffffffff81a4aaf0 t intel_dp_mst_atomic_check +ffffffff81a4ac70 t intel_dp_mst_compute_config +ffffffff81a4af80 t intel_dp_mst_compute_config_late +ffffffff81a4b080 t intel_mst_disable_dp +ffffffff81a4b170 t intel_mst_post_disable_dp +ffffffff81a4b430 t intel_mst_pre_pll_enable_dp +ffffffff81a4b480 t intel_mst_pre_enable_dp +ffffffff81a4b6a0 t intel_mst_enable_dp +ffffffff81a4ba90 t intel_dp_mst_enc_get_hw_state +ffffffff81a4bad0 t intel_dp_mst_enc_get_config +ffffffff81a4baf0 t intel_dp_mst_initial_fastset_check +ffffffff81a4bb10 t intel_dp_mst_encoder_destroy +ffffffff81a4c000 T bxt_port_to_phy_channel +ffffffff81a4c130 T bxt_ddi_phy_set_signal_levels +ffffffff81a4c650 T bxt_ddi_phy_is_enabled +ffffffff81a4c7a0 T bxt_ddi_phy_uninit +ffffffff81a4c8a0 T bxt_ddi_phy_init +ffffffff81a4cad0 t _bxt_ddi_phy_init +ffffffff81a4d0f0 T bxt_ddi_phy_verify_state +ffffffff81a4d430 t __phy_reg_verify_state +ffffffff81a4d530 T bxt_ddi_phy_calc_lane_lat_optim_mask +ffffffff81a4d5a0 T bxt_ddi_phy_set_lane_optim_mask +ffffffff81a4d8d0 T bxt_ddi_phy_get_lane_lat_optim_mask +ffffffff81a4db20 T chv_set_phy_signal_level +ffffffff81a4de80 T chv_data_lane_soft_reset +ffffffff81a4e060 T chv_phy_pre_pll_enable +ffffffff81a4e300 T chv_phy_pre_encoder_enable +ffffffff81a4e590 T chv_phy_release_cl2_override +ffffffff81a4e620 T chv_phy_post_pll_disable +ffffffff81a4e6d0 T vlv_set_phy_signal_level +ffffffff81a4e850 T vlv_phy_pre_pll_enable +ffffffff81a4e970 T vlv_phy_pre_encoder_enable +ffffffff81a4ea90 T vlv_phy_reset_lanes +ffffffff81a4f000 T pnv_calc_dpll_params +ffffffff81a4f0c0 T i9xx_calc_dpll_params +ffffffff81a4f190 T vlv_calc_dpll_params +ffffffff81a4f250 T chv_calc_dpll_params +ffffffff81a4f320 T bxt_find_best_dpll +ffffffff81a4f340 t chv_find_best_dpll +ffffffff81a4f680 T i9xx_dpll_compute_fp +ffffffff81a4f6c0 T vlv_compute_dpll +ffffffff81a4f740 T chv_compute_dpll +ffffffff81a4f7c0 T intel_dpll_crtc_compute_clock +ffffffff81a4f8c0 T intel_dpll_crtc_get_shared_dpll +ffffffff81a4fa10 T intel_dpll_init_clock_hook +ffffffff81a4fb00 T i9xx_enable_pll +ffffffff81a4feb0 T vlv_enable_pll +ffffffff81a50410 T chv_enable_pll +ffffffff81a50a90 T vlv_force_pll_on +ffffffff81a50be0 T vlv_disable_pll +ffffffff81a50ca0 T chv_disable_pll +ffffffff81a50dd0 T i9xx_disable_pll +ffffffff81a50ed0 T vlv_force_pll_off +ffffffff81a50fc0 T assert_pll_enabled +ffffffff81a510a0 T assert_pll_disabled +ffffffff81a51180 t intel_pll_is_valid +ffffffff81a51250 t dg2_crtc_compute_clock +ffffffff81a512d0 t hsw_crtc_compute_clock +ffffffff81a51390 t hsw_crtc_get_shared_dpll +ffffffff81a51430 t ilk_crtc_compute_clock +ffffffff81a51730 t ilk_crtc_get_shared_dpll +ffffffff81a51780 t g4x_find_best_dpll +ffffffff81a51ac0 t chv_crtc_compute_clock +ffffffff81a51bd0 t vlv_crtc_compute_clock +ffffffff81a52090 t g4x_crtc_compute_clock +ffffffff81a521e0 t i9xx_compute_dpll +ffffffff81a52460 t pnv_crtc_compute_clock +ffffffff81a52820 t i9xx_crtc_compute_clock +ffffffff81a52940 t i9xx_find_best_dpll +ffffffff81a52c70 t i8xx_crtc_compute_clock +ffffffff81a53000 T intel_get_shared_dpll_by_id +ffffffff81a53040 T intel_get_shared_dpll_id +ffffffff81a530d0 T assert_shared_dpll +ffffffff81a531f0 T intel_dpll_get_hw_state +ffffffff81a53220 T icl_tc_port_to_pll_id +ffffffff81a53250 T intel_enable_shared_dpll +ffffffff81a53540 T intel_disable_shared_dpll +ffffffff81a53780 T intel_shared_dpll_swap_state +ffffffff81a53860 T icl_set_active_port_dpll +ffffffff81a538a0 T intel_shared_dpll_init +ffffffff81a53ab0 T intel_compute_shared_dplls +ffffffff81a53b40 T intel_reserve_shared_dplls +ffffffff81a53bd0 T intel_release_shared_dplls +ffffffff81a53c10 T intel_update_active_dpll +ffffffff81a53c70 T intel_dpll_get_freq +ffffffff81a53d00 T intel_dpll_update_ref_clks +ffffffff81a53d50 T intel_dpll_readout_hw_state +ffffffff81a53ed0 T intel_dpll_sanitize_state +ffffffff81a53fb0 T intel_dpll_dump_hw_state +ffffffff81a54030 T intel_shared_dpll_state_verify +ffffffff81a54150 t verify_single_dpll_state +ffffffff81a54470 T intel_shared_dpll_verify_disabled +ffffffff81a544f0 t icl_compute_dplls +ffffffff81a552d0 t icl_get_dplls +ffffffff81a55a50 t icl_put_dplls +ffffffff81a55b10 t icl_update_active_dpll +ffffffff81a55bc0 t icl_update_dpll_ref_clks +ffffffff81a55c00 t icl_dump_hw_state +ffffffff81a55cc0 t combo_pll_enable +ffffffff81a55ef0 t combo_pll_disable +ffffffff81a55fe0 t combo_pll_get_hw_state +ffffffff81a56070 t icl_ddi_combo_pll_get_freq +ffffffff81a56240 t icl_dpll_write +ffffffff81a564e0 t adlp_cmtg_clock_gating_wa +ffffffff81a56640 t icl_pll_disable +ffffffff81a567e0 t icl_pll_get_hw_state +ffffffff81a56b20 t tbt_pll_enable +ffffffff81a56ce0 t tbt_pll_disable +ffffffff81a56d00 t tbt_pll_get_hw_state +ffffffff81a56d20 t icl_ddi_tbt_pll_get_freq +ffffffff81a56d90 t mg_pll_enable +ffffffff81a57340 t mg_pll_disable +ffffffff81a57380 t dkl_pll_get_hw_state +ffffffff81a57550 t icl_ddi_mg_pll_get_freq +ffffffff81a57630 t intel_find_shared_dpll +ffffffff81a57960 t intel_unreference_shared_dpll +ffffffff81a57ac0 t mg_pll_get_hw_state +ffffffff81a57d10 t bxt_compute_dpll +ffffffff81a58030 t bxt_get_dpll +ffffffff81a58290 t intel_put_dpll +ffffffff81a582f0 t bxt_update_dpll_ref_clks +ffffffff81a58330 t bxt_dump_hw_state +ffffffff81a583e0 t bxt_ddi_pll_enable +ffffffff81a58ef0 t bxt_ddi_pll_disable +ffffffff81a59100 t bxt_ddi_pll_get_hw_state +ffffffff81a59590 t bxt_ddi_pll_get_freq +ffffffff81a59620 t bxt_ddi_set_dpll_hw_state +ffffffff81a597e0 t skl_compute_dpll +ffffffff81a59f60 t skl_get_dpll +ffffffff81a5a190 t skl_update_dpll_ref_clks +ffffffff81a5a1d0 t skl_dump_hw_state +ffffffff81a5a230 t skl_ddi_dpll0_enable +ffffffff81a5a2f0 t skl_ddi_dpll0_disable +ffffffff81a5a320 t skl_ddi_dpll0_get_hw_state +ffffffff81a5a420 t skl_ddi_pll_get_freq +ffffffff81a5a4b0 t skl_ddi_wrpll_get_freq +ffffffff81a5a610 t skl_ddi_pll_enable +ffffffff81a5a830 t skl_ddi_pll_disable +ffffffff81a5a8c0 t skl_ddi_pll_get_hw_state +ffffffff81a5a9e0 t hsw_compute_dpll +ffffffff81a5b230 t hsw_get_dpll +ffffffff81a5b4f0 t hsw_update_dpll_ref_clks +ffffffff81a5b560 t hsw_dump_hw_state +ffffffff81a5b590 t hsw_ddi_wrpll_enable +ffffffff81a5b610 t hsw_ddi_wrpll_disable +ffffffff81a5b6f0 t hsw_ddi_wrpll_get_hw_state +ffffffff81a5b790 t hsw_ddi_wrpll_get_freq +ffffffff81a5b880 t hsw_ddi_spll_enable +ffffffff81a5b8e0 t hsw_ddi_spll_disable +ffffffff81a5b9b0 t hsw_ddi_spll_get_hw_state +ffffffff81a5ba40 t hsw_ddi_spll_get_freq +ffffffff81a5bae0 t hsw_ddi_lcpll_enable +ffffffff81a5bb10 t hsw_ddi_lcpll_disable +ffffffff81a5bb40 t hsw_ddi_lcpll_get_hw_state +ffffffff81a5bb70 t hsw_ddi_lcpll_get_freq +ffffffff81a5bbf0 t ibx_compute_dpll +ffffffff81a5bc20 t ibx_get_dpll +ffffffff81a5bea0 t ibx_dump_hw_state +ffffffff81a5bf00 t ibx_pch_dpll_enable +ffffffff81a5c0b0 t ibx_pch_dpll_disable +ffffffff81a5c130 t ibx_pch_dpll_get_hw_state +ffffffff81a5d000 T intel_dpt_pin +ffffffff81a5d1d0 T intel_dpt_unpin +ffffffff81a5d240 T intel_dpt_resume +ffffffff81a5d310 T intel_dpt_suspend +ffffffff81a5d3e0 T intel_dpt_create +ffffffff81a5d710 t dpt_insert_page +ffffffff81a5d780 t dpt_clear_range +ffffffff81a5d7b0 t dpt_insert_entries +ffffffff81a5d8b0 t dpt_cleanup +ffffffff81a5d900 t dpt_bind_vma +ffffffff81a5d990 t dpt_unbind_vma +ffffffff81a5d9c0 T intel_dpt_destroy +ffffffff81a5da10 t __ww_mutex_lock +ffffffff81a5e000 T intel_drrs_type_str +ffffffff81a5e040 T intel_drrs_is_active +ffffffff81a5e070 T intel_drrs_activate +ffffffff81a5e270 T intel_drrs_deactivate +ffffffff81a5e350 t intel_drrs_set_state +ffffffff81a5e4a0 T intel_drrs_invalidate +ffffffff81a5e4c0 t intel_drrs_frontbuffer_update +ffffffff81a5e620 T intel_drrs_flush +ffffffff81a5e640 T intel_crtc_drrs_init +ffffffff81a5e6e0 t intel_drrs_downclock_work +ffffffff81a5e740 t __delayed_work_tick +ffffffff81a5f000 T intel_dsb_indexed_reg_write +ffffffff81a5f140 T intel_dsb_reg_write +ffffffff81a5f230 T intel_dsb_commit +ffffffff81a5f680 T intel_dsb_prepare +ffffffff81a5f810 T intel_dsb_cleanup +ffffffff81a60000 T intel_dsi_bitrate +ffffffff81a600a0 T intel_dsi_tlpx_ns +ffffffff81a600f0 T intel_dsi_get_modes +ffffffff81a60100 T intel_dsi_mode_valid +ffffffff81a601c0 T intel_dsi_host_init +ffffffff81a60270 T intel_dsi_get_panel_orientation +ffffffff81a61000 T intel_dsi_dcs_init_backlight_funcs +ffffffff81a610a0 t dcs_setup_backlight +ffffffff81a61100 t dcs_get_backlight +ffffffff81a61200 t dcs_set_backlight +ffffffff81a612f0 t dcs_disable_backlight +ffffffff81a61670 t dcs_enable_backlight +ffffffff81a62000 T intel_dsi_vbt_exec_sequence +ffffffff81a62020 T intel_dsi_msleep +ffffffff81a62090 T intel_dsi_log_params +ffffffff81a62410 T intel_dsi_vbt_init +ffffffff81a628a0 T intel_dsi_vbt_gpio_init +ffffffff81a628c0 T intel_dsi_vbt_gpio_cleanup +ffffffff81a63000 T intel_dvo_init +ffffffff81a634f0 t intel_disable_dvo +ffffffff81a635a0 t intel_enable_dvo +ffffffff81a63690 t intel_dvo_get_hw_state +ffffffff81a63700 t intel_dvo_get_config +ffffffff81a637b0 t intel_dvo_compute_config +ffffffff81a63840 t intel_dvo_pre_enable +ffffffff81a63930 t intel_dvo_connector_get_hw_state +ffffffff81a639b0 t intel_dvo_enc_destroy +ffffffff81a639f0 t intel_dvo_detect +ffffffff81a63af0 t intel_dvo_get_modes +ffffffff81a63b60 t intel_dvo_mode_valid +ffffffff81a64000 T intel_fb_get_format_info +ffffffff81a64240 T intel_fb_is_ccs_modifier +ffffffff81a64410 T intel_fb_is_rc_ccs_cc_modifier +ffffffff81a645e0 T intel_fb_is_mc_ccs_modifier +ffffffff81a647b0 T intel_fb_plane_get_modifiers +ffffffff81a648f0 T intel_fb_plane_supports_modifier +ffffffff81a64960 T intel_format_info_is_yuv_semiplanar +ffffffff81a64c00 T intel_fb_is_ccs_aux_plane +ffffffff81a64e40 T intel_fb_rc_ccs_cc_plane +ffffffff81a650a0 T is_surface_linear +ffffffff81a653d0 T main_to_ccs_plane +ffffffff81a656b0 T skl_ccs_to_main_plane +ffffffff81a659a0 T skl_main_to_aux_plane +ffffffff81a65c00 T intel_tile_size +ffffffff81a65c40 T intel_tile_width_bytes +ffffffff81a65e90 T intel_tile_height +ffffffff81a65ef0 T intel_tile_row_size +ffffffff81a65f70 T intel_fb_align_height +ffffffff81a65ff0 T intel_fb_uses_dpt +ffffffff81a66040 T intel_cursor_alignment +ffffffff81a660a0 T intel_surf_alignment +ffffffff81a662c0 T intel_fb_plane_get_subsampling +ffffffff81a66690 T intel_plane_adjust_aligned_offset +ffffffff81a66700 t intel_adjust_aligned_offset +ffffffff81a668b0 T intel_plane_compute_aligned_offset +ffffffff81a669b0 t intel_compute_aligned_offset +ffffffff81a66b70 T intel_fb_needs_pot_stride_remap +ffffffff81a66bc0 T intel_fb_supports_90_270_rotation +ffffffff81a66c10 T intel_fill_fb_info +ffffffff81a67850 t calc_plane_remap_info +ffffffff81a682b0 T intel_fb_fill_view +ffffffff81a68300 T intel_plane_compute_gtt +ffffffff81a68bd0 t intel_plane_check_stride +ffffffff81a68f40 T intel_framebuffer_init +ffffffff81a6a350 T intel_user_framebuffer_create +ffffffff81a6a490 T intel_framebuffer_create +ffffffff81a6a520 t intel_adjust_tile_offset +ffffffff81a6a660 t intel_user_framebuffer_destroy +ffffffff81a6a6c0 t intel_user_framebuffer_create_handle +ffffffff81a6a6e0 t intel_user_framebuffer_dirty +ffffffff81a6b000 T intel_pin_and_fence_fb_obj +ffffffff81a6b320 t i915_gem_object_lock +ffffffff81a6b530 T intel_unpin_fb_vma +ffffffff81a6b5a0 T intel_plane_pin_fb +ffffffff81a6b8d0 T intel_plane_unpin_fb +ffffffff81a6c000 T intel_fbc_cleanup +ffffffff81a6c1c0 T intel_fbc_pre_update +ffffffff81a6c810 T intel_fbc_post_update +ffffffff81a6ca60 T intel_fbc_invalidate +ffffffff81a6cc80 T intel_fbc_flush +ffffffff81a6cf10 T intel_fbc_atomic_check +ffffffff81a6d480 T intel_fbc_disable +ffffffff81a6d540 t __intel_fbc_disable +ffffffff81a6d6d0 T intel_fbc_update +ffffffff81a6dd90 T intel_fbc_reset_underrun +ffffffff81a6def0 T intel_fbc_handle_fifo_underrun_irq +ffffffff81a6dfa0 T intel_fbc_add_plane +ffffffff81a6dfd0 T intel_fbc_init +ffffffff81a6e260 T intel_fbc_sanitize +ffffffff81a6e330 T intel_fbc_crtc_debugfs_add +ffffffff81a6e360 T intel_fbc_debugfs_register +ffffffff81a6e390 t intel_fbc_is_ok +ffffffff81a6e4b0 t intel_fbc_update_state +ffffffff81a6e820 t intel_fbc_underrun_work_fn +ffffffff81a6e940 t ivb_fbc_activate +ffffffff81a6eba0 t ilk_fbc_deactivate +ffffffff81a6ec50 t ilk_fbc_is_active +ffffffff81a6ecb0 t ivb_fbc_is_compressing +ffffffff81a6ed20 t snb_fbc_nuke +ffffffff81a6eda0 t ilk_fbc_program_cfb +ffffffff81a6ede0 t ivb_fbc_set_false_color +ffffffff81a6eea0 t snb_fbc_activate +ffffffff81a6ef30 t ilk_fbc_is_compressing +ffffffff81a6efa0 t ilk_fbc_activate +ffffffff81a6f0d0 t i965_fbc_nuke +ffffffff81a6f170 t g4x_fbc_activate +ffffffff81a6f280 t g4x_fbc_deactivate +ffffffff81a6f310 t g4x_fbc_is_active +ffffffff81a6f370 t g4x_fbc_is_compressing +ffffffff81a6f3d0 t g4x_fbc_program_cfb +ffffffff81a6f400 t i8xx_fbc_activate +ffffffff81a6f570 t i8xx_fbc_deactivate +ffffffff81a6f640 t i8xx_fbc_is_active +ffffffff81a6f6a0 t i8xx_fbc_is_compressing +ffffffff81a6f700 t i8xx_fbc_program_cfb +ffffffff81a6f780 t i8xx_fbc_nuke +ffffffff81a70000 T intel_fbdev_init +ffffffff81a704d0 t intel_fbdev_suspend_worker +ffffffff81a70500 T intel_fbdev_initial_config_async +ffffffff81a70570 T intel_fbdev_unregister +ffffffff81a705b0 T intel_fbdev_set_suspend +ffffffff81a705e0 T intel_fbdev_fini +ffffffff81a70670 T intel_fbdev_output_poll_changed +ffffffff81a70710 T intel_fbdev_restore_mode +ffffffff81a70790 T intel_fbdev_framebuffer +ffffffff81a707d0 t intelfb_create +ffffffff81a70dd0 t intel_fbdev_set_par +ffffffff81a71000 T assert_fdi_tx_enabled +ffffffff81a710e0 T assert_fdi_tx_disabled +ffffffff81a711c0 T assert_fdi_rx_enabled +ffffffff81a71280 T assert_fdi_rx_disabled +ffffffff81a71340 T assert_fdi_tx_pll_enabled +ffffffff81a713f0 T assert_fdi_rx_pll_enabled +ffffffff81a714b0 T assert_fdi_rx_pll_disabled +ffffffff81a71570 T intel_fdi_link_train +ffffffff81a71590 T intel_fdi_pll_freq_update +ffffffff81a71640 T intel_fdi_link_freq +ffffffff81a71690 T ilk_fdi_compute_config +ffffffff81a719d0 T intel_fdi_normal_train +ffffffff81a71b60 T hsw_fdi_link_train +ffffffff81a72060 T hsw_fdi_disable +ffffffff81a721c0 T ilk_fdi_pll_enable +ffffffff81a723d0 T ilk_fdi_pll_disable +ffffffff81a72500 T ilk_fdi_disable +ffffffff81a72770 T intel_fdi_init_hook +ffffffff81a727d0 t ilk_fdi_link_train +ffffffff81a72e40 t gen6_fdi_link_train +ffffffff81a73670 t ivb_manual_fdi_link_train +ffffffff81a73f10 t cpt_set_fdi_bc_bifurcation +ffffffff81a75000 T intel_set_cpu_fifo_underrun_reporting +ffffffff81a753f0 T intel_set_pch_fifo_underrun_reporting +ffffffff81a75620 T intel_cpu_fifo_underrun_irq_handler +ffffffff81a75810 T intel_pch_fifo_underrun_irq_handler +ffffffff81a75890 T intel_check_cpu_fifo_underruns +ffffffff81a75ab0 T intel_check_pch_fifo_underruns +ffffffff81a76000 T intel_frontbuffer_flip_prepare +ffffffff81a76050 T intel_frontbuffer_flip_complete +ffffffff81a76130 T intel_frontbuffer_flip +ffffffff81a76200 T __intel_fb_invalidate +ffffffff81a76290 T __intel_fb_flush +ffffffff81a76380 T intel_frontbuffer_get +ffffffff81a764c0 t frontbuffer_active +ffffffff81a764f0 t frontbuffer_retire +ffffffff81a76530 T intel_frontbuffer_put +ffffffff81a766c0 T intel_frontbuffer_track +ffffffff81a77000 T intel_atomic_global_obj_init +ffffffff81a77070 T intel_atomic_global_obj_cleanup +ffffffff81a77170 T intel_atomic_get_global_obj_state +ffffffff81a773e0 T intel_atomic_get_old_global_obj_state +ffffffff81a77440 T intel_atomic_get_new_global_obj_state +ffffffff81a774a0 T intel_atomic_swap_global_state +ffffffff81a775f0 T intel_atomic_clear_global_state +ffffffff81a77720 T intel_atomic_lock_global_state +ffffffff81a777a0 T intel_atomic_serialize_global_state +ffffffff81a78000 T intel_gmbus_is_valid_pin +ffffffff81a78110 T intel_gmbus_reset +ffffffff81a78170 T intel_bb_set_bits +ffffffff81a782a0 T intel_bb_set_dir +ffffffff81a782d0 T intel_bb_read_bits +ffffffff81a78450 T intel_acquire_bus +ffffffff81a78650 T intel_release_bus +ffffffff81a787f0 T intel_send_start +ffffffff81a78810 T intel_send_stop +ffffffff81a78830 T intel_initiate_xfer +ffffffff81a78850 T intel_read_byte +ffffffff81a78870 T intel_write_byte +ffffffff81a78890 T intel_gmbus_output_aksv +ffffffff81a78960 t do_gmbus_xfer +ffffffff81a78f60 T intel_gmbus_setup +ffffffff81a792f0 T intel_gmbus_teardown +ffffffff81a79370 T intel_gmbus_get_adapter +ffffffff81a793f0 T intel_gmbus_force_bit +ffffffff81a79490 T intel_gmbus_is_forced_bit +ffffffff81a794c0 t gmbus_xfer_read +ffffffff81a79790 t gmbus_xfer_write +ffffffff81a799e0 t gmbus_wait +ffffffff81a79dc0 t gmbus_wait_idle +ffffffff81a79f60 t gmbus_xfer +ffffffff81a7a040 t gmbus_func +ffffffff81a7a080 t gmbus_lock_bus +ffffffff81a7a0a0 t gmbus_trylock_bus +ffffffff81a7a100 t gmbus_unlock_bus +ffffffff81a7b000 T intel_hdcp_capable +ffffffff81a7b0a0 t intel_hdcp_read_valid_bksv +ffffffff81a7b320 T intel_hdcp2_capable +ffffffff81a7b400 T is_hdcp_supported +ffffffff81a7b450 T intel_hdcp_component_init +ffffffff81a7b480 T intel_hdcp_init +ffffffff81a7b5c0 t intel_hdcp_check_work +ffffffff81a7f4c0 t intel_hdcp_prop_work +ffffffff81a7f540 T intel_hdcp_enable +ffffffff81a7f590 T intel_hdcp_disable +ffffffff81a7f6c0 t intel_hdcp_update_value +ffffffff81a7f880 t _intel_hdcp2_disable +ffffffff81a7fc80 t _intel_hdcp_disable +ffffffff81a7ff80 T intel_hdcp_update_pipe +ffffffff81a800f0 T intel_hdcp_component_fini +ffffffff81a80130 T intel_hdcp_cleanup +ffffffff81a80270 T intel_hdcp_atomic_check +ffffffff81a80300 T intel_hdcp_handle_cp_irq +ffffffff81a80400 t __delayed_work_tick +ffffffff81a80420 t hdcp2_authenticate_repeater_topology +ffffffff81a80700 t intel_hdcp_get_repeater_ctl +ffffffff81a81000 T hsw_write_infoframe +ffffffff81a81410 t hsw_dip_data_reg +ffffffff81a815d0 T hsw_read_infoframe +ffffffff81a81690 T intel_hdmi_infoframe_enable +ffffffff81a81730 T intel_hdmi_infoframes_enabled +ffffffff81a81850 T intel_read_infoframe +ffffffff81a819e0 T intel_hdmi_read_gcp_infoframe +ffffffff81a81ad0 T intel_dp_dual_mode_set_tmds_output +ffffffff81a81ba0 T intel_hdmi_tmds_clock +ffffffff81a81bf0 T intel_hdmi_bpc_possible +ffffffff81a81d20 T intel_hdmi_limited_color_range +ffffffff81a81d90 T intel_hdmi_compute_config +ffffffff81a824e0 t intel_hdmi_compute_output_format +ffffffff81a82610 T intel_hdmi_encoder_shutdown +ffffffff81a826e0 T intel_hdmi_handle_sink_scrambling +ffffffff81a82800 T intel_infoframe_init +ffffffff81a82980 t vlv_write_infoframe +ffffffff81a82ce0 t vlv_read_infoframe +ffffffff81a82eb0 t vlv_set_infoframes +ffffffff81a83250 t vlv_infoframes_enabled +ffffffff81a832f0 t g4x_write_infoframe +ffffffff81a835b0 t g4x_read_infoframe +ffffffff81a83700 t g4x_set_infoframes +ffffffff81a839a0 t g4x_infoframes_enabled +ffffffff81a83a20 t hsw_set_infoframes +ffffffff81a83cc0 t hsw_infoframes_enabled +ffffffff81a83d50 t ibx_write_infoframe +ffffffff81a84070 t ibx_read_infoframe +ffffffff81a841f0 t ibx_set_infoframes +ffffffff81a84560 t ibx_infoframes_enabled +ffffffff81a845f0 t cpt_write_infoframe +ffffffff81a848f0 t cpt_read_infoframe +ffffffff81a84a70 t cpt_set_infoframes +ffffffff81a84d80 t cpt_infoframes_enabled +ffffffff81a84df0 T intel_hdmi_init_connector +ffffffff81a85480 T intel_hdmi_dsc_get_slice_height +ffffffff81a854e0 T intel_hdmi_dsc_get_num_slices +ffffffff81a85660 T intel_hdmi_dsc_get_bpp +ffffffff81a85750 t intel_hdmi_compute_clock +ffffffff81a85a10 t hdmi_port_clock_valid +ffffffff81a85c40 t intel_write_infoframe +ffffffff81a85e10 t intel_hdmi_detect +ffffffff81a85fd0 t intel_hdmi_force +ffffffff81a860b0 t intel_hdmi_connector_register +ffffffff81a860c0 t intel_hdmi_connector_unregister +ffffffff81a860d0 t intel_hdmi_set_edid +ffffffff81a86370 t intel_hdmi_get_modes +ffffffff81a863b0 t intel_hdmi_mode_valid +ffffffff81a86550 t intel_hdmi_mode_clock_valid +ffffffff81a866e0 t intel_hdmi_hdcp_write_an_aksv +ffffffff81a86830 t intel_hdmi_hdcp_read_bksv +ffffffff81a86900 t intel_hdmi_hdcp_read_bstatus +ffffffff81a869d0 t intel_hdmi_hdcp_repeater_present +ffffffff81a86ab0 t intel_hdmi_hdcp_read_ri_prime +ffffffff81a86b80 t intel_hdmi_hdcp_read_ksv_ready +ffffffff81a86c60 t intel_hdmi_hdcp_read_ksv_fifo +ffffffff81a86d30 t intel_hdmi_hdcp_read_v_prime_part +ffffffff81a86e20 t intel_hdmi_hdcp_toggle_signalling +ffffffff81a870b0 t intel_hdmi_hdcp_check_link +ffffffff81a87400 t intel_hdmi_hdcp2_capable +ffffffff81a874c0 t intel_hdmi_hdcp2_write_msg +ffffffff81a875b0 t intel_hdmi_hdcp2_read_msg +ffffffff81a87a50 t intel_hdmi_hdcp2_check_link +ffffffff81a88000 T intel_hpd_pin_default +ffffffff81a88030 T intel_encoder_hotplug +ffffffff81a88160 T intel_hpd_trigger_irq +ffffffff81a881d0 T intel_hpd_irq_handler +ffffffff81a885b0 T intel_hpd_init +ffffffff81a886c0 T intel_hpd_poll_enable +ffffffff81a88740 T intel_hpd_poll_disable +ffffffff81a887a0 T intel_hpd_init_work +ffffffff81a88870 t i915_hotplug_work_func +ffffffff81a88bc0 t i915_digport_work_func +ffffffff81a88d50 t i915_hpd_poll_init_work +ffffffff81a88e60 t intel_hpd_irq_storm_reenable_work +ffffffff81a891b0 T intel_hpd_cancel_work +ffffffff81a892d0 T intel_hpd_disable +ffffffff81a89360 T intel_hpd_enable +ffffffff81a893d0 t __delayed_work_tick +ffffffff81a8a000 T intel_lpe_audio_irq_handler +ffffffff81a8a020 T intel_lpe_audio_init +ffffffff81a8a050 T intel_lpe_audio_teardown +ffffffff81a8a070 T intel_lpe_audio_notify +ffffffff81a8b000 T lspcon_detect_hdr_capability +ffffffff81a8b0b0 T lspcon_write_infoframe +ffffffff81a8b830 T lspcon_read_infoframe +ffffffff81a8b870 T lspcon_set_infoframes +ffffffff81a8bae0 T lspcon_infoframes_enabled +ffffffff81a8bcd0 T lspcon_wait_pcon_mode +ffffffff81a8bcf0 t lspcon_wait_mode +ffffffff81a8bfb0 T lspcon_init +ffffffff81a8c3c0 T intel_lspcon_infoframes_enabled +ffffffff81a8c400 T lspcon_resume +ffffffff81a8c6b0 t lspcon_change_mode +ffffffff81a8d000 T intel_lvds_port_enabled +ffffffff81a8d080 T intel_get_lvds_encoder +ffffffff81a8d0e0 T intel_is_dual_link_lvds +ffffffff81a8d150 T intel_lvds_init +ffffffff81a8d8c0 t intel_enable_lvds +ffffffff81a8da10 t intel_pre_enable_lvds +ffffffff81a8dce0 t intel_lvds_compute_config +ffffffff81a8de40 t pch_disable_lvds +ffffffff81a8de60 t pch_post_disable_lvds +ffffffff81a8de80 t gmch_disable_lvds +ffffffff81a8deb0 t intel_lvds_get_hw_state +ffffffff81a8df70 t intel_lvds_get_config +ffffffff81a8e070 t intel_lvds_shutdown +ffffffff81a8e110 t intel_no_lvds_dmi_callback +ffffffff81a8e160 t intel_disable_lvds +ffffffff81a8e290 t intel_lvds_get_modes +ffffffff81a8e2c0 t intel_lvds_mode_valid +ffffffff81a8e340 t intel_dual_link_lvds_callback +ffffffff81a8f000 T intel_modeset_setup_hw_state +ffffffff81a91000 T intel_modeset_verify_crtc +ffffffff81a913b0 t verify_connector_state +ffffffff81a91660 T intel_modeset_verify_disabled +ffffffff81a92000 T intel_opregion_notify_encoder +ffffffff81a92170 t swsci +ffffffff81a924a0 T intel_opregion_notify_adapter +ffffffff81a92500 T intel_opregion_asle_intr +ffffffff81a92550 T intel_opregion_setup +ffffffff81a92d60 t asle_work +ffffffff81a931e0 T intel_opregion_get_panel_type +ffffffff81a932d0 T intel_opregion_get_edid +ffffffff81a933b0 T intel_opregion_headless_sku +ffffffff81a93400 T intel_opregion_register +ffffffff81a93490 T intel_opregion_resume +ffffffff81a93520 T intel_opregion_suspend +ffffffff81a935c0 T intel_opregion_unregister +ffffffff81a93740 t intel_no_opregion_vbt_callback +ffffffff81a937a0 t intel_use_opregion_panel_type_callback +ffffffff81a94000 T intel_overlay_reset +ffffffff81a94050 T intel_overlay_switch_off +ffffffff81a94250 t intel_overlay_release_old_vid +ffffffff81a943f0 T intel_overlay_put_image_ioctl +ffffffff81a955c0 T intel_overlay_attrs_ioctl +ffffffff81a95a70 T intel_overlay_setup +ffffffff81a95cd0 t intel_overlay_last_flip_retire +ffffffff81a95d10 T intel_overlay_cleanup +ffffffff81a95dd0 T intel_overlay_capture_error_state +ffffffff81a95ec0 T intel_overlay_print_error_state +ffffffff81a96290 t intel_overlay_release_old_vid_tail +ffffffff81a96360 t intel_overlay_off_tail +ffffffff81a96510 t intel_overlay_flip_prepare +ffffffff81a97000 T intel_panel_use_ssc +ffffffff81a97060 T intel_panel_preferred_fixed_mode +ffffffff81a970b0 T intel_panel_fixed_mode +ffffffff81a97170 T intel_panel_downclock_mode +ffffffff81a97260 T intel_panel_highest_mode +ffffffff81a972c0 T intel_panel_get_modes +ffffffff81a97350 T intel_panel_drrs_type +ffffffff81a973a0 T intel_panel_compute_config +ffffffff81a97520 T intel_panel_add_edid_fixed_modes +ffffffff81a97a50 T intel_panel_add_vbt_lfp_fixed_mode +ffffffff81a97ab0 t intel_panel_add_fixed_mode +ffffffff81a97c30 T intel_panel_add_vbt_sdvo_fixed_mode +ffffffff81a97ca0 T intel_panel_add_encoder_fixed_mode +ffffffff81a97ce0 T intel_panel_fitting +ffffffff81a98330 T intel_panel_detect +ffffffff81a983c0 T intel_panel_mode_valid +ffffffff81a984d0 T intel_panel_init_alloc +ffffffff81a98520 T intel_panel_init +ffffffff81a985e0 T intel_panel_fini +ffffffff81a99000 T intel_has_pch_trancoder +ffffffff81a99060 T intel_crtc_pch_transcoder +ffffffff81a990a0 T intel_pch_transcoder_get_m1_n1 +ffffffff81a990f0 T intel_pch_transcoder_get_m2_n2 +ffffffff81a99140 T ilk_pch_pre_enable +ffffffff81a99170 T ilk_pch_enable +ffffffff81a99720 t ilk_pch_transcoder_set_timings +ffffffff81a999a0 T ilk_pch_disable +ffffffff81a999c0 T ilk_pch_post_disable +ffffffff81a99d00 T ilk_pch_get_config +ffffffff81a99ec0 T lpt_pch_enable +ffffffff81a9a0f0 T lpt_pch_disable +ffffffff81a9a200 T lpt_pch_get_config +ffffffff81a9a2d0 T intel_pch_sanitize +ffffffff81a9a5b0 t assert_pch_dp_disabled +ffffffff81a9a6a0 t assert_pch_hdmi_disabled +ffffffff81a9b000 T lpt_disable_iclkip +ffffffff81a9b070 T lpt_iclkip +ffffffff81a9b100 T lpt_program_iclkip +ffffffff81a9b380 T lpt_get_iclkip +ffffffff81a9b490 T lpt_disable_clkout_dp +ffffffff81a9b570 T intel_init_pch_refclk +ffffffff81a9d000 T intel_crtc_initial_plane_config +ffffffff81a9e000 T intel_pps_lock +ffffffff81a9e060 T intel_pps_unlock +ffffffff81a9e0c0 T intel_pps_reset_all +ffffffff81a9e210 T intel_pps_check_power_unlocked +ffffffff81a9e3d0 T intel_pps_wait_power_cycle +ffffffff81a9e590 T intel_pps_vdd_on_unlocked +ffffffff81a9eac0 T intel_pps_vdd_on +ffffffff81a9ebc0 T intel_pps_vdd_off_sync +ffffffff81a9ec90 t intel_pps_vdd_off_sync_unlocked +ffffffff81a9ef70 T intel_pps_vdd_off_unlocked +ffffffff81a9f080 T intel_pps_on_unlocked +ffffffff81a9f480 T intel_pps_on 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intel_tc_port_init +ffffffff81ab78c0 t intel_tc_port_disconnect_phy_work +ffffffff81ab7910 t tc_phy_status_complete +ffffffff81ab7a20 t tc_phy_take_ownership +ffffffff81ab7bc0 t intel_tc_port_update_mode +ffffffff81ab80e0 t __delayed_work_tick +ffffffff81ab9000 T intel_tv_init +ffffffff81ab9420 t intel_tv_compute_config +ffffffff81ab98c0 t intel_tv_get_config +ffffffff81ab9e70 t intel_tv_pre_enable +ffffffff81aba7a0 t intel_enable_tv +ffffffff81aba800 t intel_disable_tv +ffffffff81aba860 t intel_tv_get_hw_state +ffffffff81aba8c0 t intel_tv_connector_duplicate_state +ffffffff81aba940 t intel_tv_mode_to_mode +ffffffff81abaa90 t intel_tv_get_modes +ffffffff81abadf0 t intel_tv_detect +ffffffff81abb250 t intel_tv_mode_valid +ffffffff81abb2e0 t intel_tv_atomic_check +ffffffff81abc000 T intel_dsc_source_support +ffffffff81abc060 T intel_dsc_compute_params +ffffffff81abc520 T intel_dsc_power_domain +ffffffff81abc5d0 T intel_dsc_dsi_pps_write +ffffffff81abc870 T intel_dsc_dp_pps_write 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skl_pfit_enable +ffffffff81ac1c40 T skl_program_plane_scaler +ffffffff81ac2300 T skl_detach_scalers +ffffffff81ac2440 T skl_scaler_disable +ffffffff81ac3000 T skl_format_to_fourcc +ffffffff81ac3180 T icl_is_nv12_y_plane +ffffffff81ac31f0 T icl_is_hdr_plane +ffffffff81ac3230 T skl_calc_main_surface_offset +ffffffff81ac3470 T skl_universal_plane_create +ffffffff81ac3b60 t icl_plane_min_width +ffffffff81ac3cf0 t icl_hdr_plane_max_width +ffffffff81ac3d40 t icl_sdr_plane_max_width +ffffffff81ac3d70 t icl_plane_max_height +ffffffff81ac3da0 t icl_plane_min_cdclk +ffffffff81ac3de0 t glk_plane_max_width +ffffffff81ac3e90 t skl_plane_max_height +ffffffff81ac3ec0 t glk_plane_min_cdclk +ffffffff81ac3f40 t skl_plane_max_width +ffffffff81ac4010 t skl_plane_min_cdclk +ffffffff81ac4080 t skl_plane_max_stride +ffffffff81ac4120 t icl_plane_update_noarm +ffffffff81ac4af0 t icl_plane_update_arm +ffffffff81ac4c60 t icl_plane_disable_arm +ffffffff81ac4d70 t skl_plane_update_noarm +ffffffff81ac4f10 t skl_plane_update_arm +ffffffff81ac5310 t skl_plane_disable_arm +ffffffff81ac53c0 t skl_plane_get_hw_state +ffffffff81ac5480 t skl_plane_check +ffffffff81ac68b0 t skl_plane_async_flip +ffffffff81ac69e0 t skl_plane_enable_flip_done +ffffffff81ac6a40 t skl_plane_disable_flip_done +ffffffff81ac6aa0 T skl_get_initial_plane_config +ffffffff81ac7140 t skl_surf_address +ffffffff81ac7260 t skl_check_main_ccs_coordinates +ffffffff81ac7400 t gen12_plane_format_mod_supported +ffffffff81ac7650 t skl_plane_format_mod_supported +ffffffff81ac8000 T intel_enabled_dbuf_slices_mask +ffffffff81ac8130 T intel_sagv_pre_plane_update +ffffffff81ac82a0 T intel_sagv_post_plane_update +ffffffff81ac84f0 T intel_can_enable_sagv +ffffffff81ac8560 T skl_ddb_dbuf_slice_mask +ffffffff81ac8610 T skl_write_plane_wm +ffffffff81ac89f0 T skl_write_cursor_wm +ffffffff81ac8d50 T skl_ddb_allocation_overlaps +ffffffff81ac8df0 T skl_wm_get_hw_state +ffffffff81ac93e0 t skl_pipe_wm_get_hw_state +ffffffff81ac9770 t skl_compute_dbuf_slices +ffffffff81ac9ca0 T skl_wm_sanitize +ffffffff81ac9ef0 T intel_wm_state_verify +ffffffff81aca820 T skl_watermark_ipc_enabled +ffffffff81aca850 T skl_watermark_ipc_update +ffffffff81aca900 T skl_watermark_ipc_init +ffffffff81acaa00 T skl_wm_init +ffffffff81acb030 T intel_atomic_get_dbuf_state +ffffffff81acb050 T intel_dbuf_init +ffffffff81acb0c0 T intel_dbuf_pre_plane_update +ffffffff81acb3a0 T intel_dbuf_post_plane_update +ffffffff81acb470 T intel_mbus_dbox_update +ffffffff81acb6e0 T skl_watermark_ipc_debugfs_register +ffffffff81acb710 t skl_sagv_disable +ffffffff81acb830 t skl_ddb_entry_for_slices +ffffffff81acb970 t skl_compute_wm +ffffffff81ace7b0 t skl_build_plane_wm_single +ffffffff81aceae0 t skl_compute_wm_params +ffffffff81aceed0 t skl_compute_plane_wm +ffffffff81acf3b0 t intel_dbuf_duplicate_state +ffffffff81acf440 t intel_dbuf_destroy_state +ffffffff81ad0000 T pixel_format_from_register_bits +ffffffff81ad0060 T vlv_dsi_wait_for_fifo_empty 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i915_gem_context_destroy_ioctl +ffffffff81adbf00 T i915_gem_context_getparam_ioctl +ffffffff81adc320 T i915_gem_context_setparam_ioctl +ffffffff81adc870 t set_proto_ctx_param +ffffffff81adcf50 T i915_gem_context_reset_stats_ioctl +ffffffff81add050 T i915_gem_engines_iter_next +ffffffff81add0a0 T i915_gem_context_module_exit +ffffffff81add0c0 T i915_gem_context_module_init +ffffffff81add120 t i915_gem_context_release_work +ffffffff81add1f0 t intel_context_set_gem +ffffffff81add300 t engines_notify +ffffffff81add480 t kill_engines +ffffffff81add620 t create_setparam +ffffffff81add690 t invalid_ext +ffffffff81add6c0 t set_proto_ctx_engines_balance +ffffffff81add9a0 t set_proto_ctx_engines_bond +ffffffff81addd30 t set_proto_ctx_engines_parallel_submit +ffffffff81adf000 T __i915_gem_object_create_user +ffffffff81adf020 t __i915_gem_object_create_user_ext +ffffffff81adf4a0 T i915_gem_dumb_create +ffffffff81adf610 T i915_gem_create_ioctl +ffffffff81adf6e0 T i915_gem_create_ext_ioctl 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eb_release_vmas +ffffffff81ae5540 t parse_timeline_fences +ffffffff81ae5940 t eb_pin_engine +ffffffff81ae5c00 t eb_validate_vmas +ffffffff81ae6500 t eb_relocate_vma +ffffffff81ae6740 t eb_parse +ffffffff81ae6b20 t eb_relocate_parse_slow +ffffffff81ae7220 t eb_pin_timeline +ffffffff81ae7400 t i915_gem_object_lock +ffffffff81ae7610 t eb_relocate_entry +ffffffff81ae7dd0 t reloc_cache_reset +ffffffff81ae8000 T __i915_gem_object_create_internal +ffffffff81ae80c0 T i915_gem_object_create_internal +ffffffff81ae8180 t i915_gem_object_get_pages_internal +ffffffff81ae8470 t i915_gem_object_put_pages_internal +ffffffff81ae9000 T i915_gem_object_lmem_io_map +ffffffff81ae9050 T i915_gem_object_is_lmem +ffffffff81ae90a0 T __i915_gem_object_is_lmem +ffffffff81ae90f0 T __i915_gem_object_create_lmem_with_ps +ffffffff81ae9110 T i915_gem_object_create_lmem_from_data +ffffffff81ae91f0 T i915_gem_object_create_lmem +ffffffff81aea000 T i915_gem_mmap_ioctl +ffffffff81aea210 T i915_gem_mmap_gtt_version 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__i915_gem_object_flush_frontbuffer +ffffffff81aec6f0 T __i915_gem_object_invalidate_frontbuffer +ffffffff81aec7a0 T i915_gem_object_read_from_page +ffffffff81aec880 T i915_gem_object_has_struct_page +ffffffff81aec8b0 T i915_gem_object_has_iomem +ffffffff81aec8e0 T i915_gem_object_evictable +ffffffff81aec990 T i915_gem_object_migratable +ffffffff81aec9d0 T i915_gem_object_can_migrate +ffffffff81aecb50 T i915_gem_object_migrate +ffffffff81aecbf0 T __i915_gem_object_migrate +ffffffff81aecc90 T i915_gem_object_placement_possible +ffffffff81aecd20 T i915_gem_object_needs_ccs_pages +ffffffff81aecdc0 T i915_gem_init__objects +ffffffff81aecdf0 t __i915_gem_free_work +ffffffff81aece10 T i915_objects_module_exit +ffffffff81aece30 T i915_objects_module_init +ffffffff81aece90 T i915_gem_object_get_moving_fence +ffffffff81aeceb0 T i915_gem_object_wait_moving_fence +ffffffff81aecf20 T i915_gem_object_has_unknown_state +ffffffff81aecf50 t i915_gem_free_object +ffffffff81aecfe0 t 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intel_gt_release_all +ffffffff81b23ba0 T intel_gt_tiles_init +ffffffff81b23e90 T intel_gt_info_print +ffffffff81b23ed0 T intel_gt_invalidate_tlb +ffffffff81b25000 T intel_gt_buffer_pool_mark_used +ffffffff81b25060 T intel_gt_get_buffer_pool +ffffffff81b25270 T intel_gt_init_buffer_pool +ffffffff81b25330 t pool_free_work +ffffffff81b253d0 T intel_gt_flush_buffer_pool +ffffffff81b25470 t pool_free_older_than +ffffffff81b25600 T intel_gt_fini_buffer_pool +ffffffff81b25630 t pool_retire +ffffffff81b25760 t __delayed_work_tick +ffffffff81b26000 T intel_gt_init_clock_frequency +ffffffff81b261d0 T intel_gt_clock_interval_to_ns +ffffffff81b26230 T intel_gt_pm_interval_to_ns +ffffffff81b26290 T intel_gt_ns_to_clock_interval +ffffffff81b26300 T intel_gt_ns_to_pm_interval +ffffffff81b27000 T intel_gt_debugfs_reset_show +ffffffff81b27050 T intel_gt_debugfs_reset_store +ffffffff81b27160 T intel_gt_debugfs_register +ffffffff81b27190 T intel_gt_debugfs_register_files +ffffffff81b28000 T intel_gt_engines_debugfs_register +ffffffff81b29000 T gen11_gt_irq_handler +ffffffff81b292e0 T gen11_gt_reset_one_iir +ffffffff81b29360 t gen11_gt_engine_identity +ffffffff81b29460 T gen11_gt_irq_reset +ffffffff81b29800 T gen11_gt_irq_postinstall +ffffffff81b29b90 T gen5_gt_irq_handler +ffffffff81b29c20 T gen6_gt_irq_handler +ffffffff81b29dd0 T gen8_gt_irq_handler +ffffffff81b29f60 T gen8_gt_irq_reset +ffffffff81b29fe0 T gen8_gt_irq_postinstall +ffffffff81b2a0a0 T gen5_gt_enable_irq +ffffffff81b2a100 T gen5_gt_disable_irq +ffffffff81b2a140 T gen5_gt_irq_reset +ffffffff81b2a1d0 T gen5_gt_irq_postinstall +ffffffff81b2b000 T intel_gt_mcr_init +ffffffff81b2b200 T intel_gt_mcr_read +ffffffff81b2b360 T intel_gt_mcr_unicast_write +ffffffff81b2b4a0 T intel_gt_mcr_multicast_write +ffffffff81b2b4d0 T intel_gt_mcr_multicast_write_fw +ffffffff81b2b520 T intel_gt_mcr_get_nonterminated_steering +ffffffff81b2b640 T intel_gt_mcr_read_any_fw +ffffffff81b2b810 T intel_gt_mcr_read_any +ffffffff81b2ba60 T intel_gt_mcr_report_steering +ffffffff81b2bcc0 T intel_gt_mcr_get_ss_steering +ffffffff81b2c000 T intel_gt_pm_init_early +ffffffff81b2c070 T intel_gt_pm_init +ffffffff81b2c0b0 T intel_gt_pm_fini +ffffffff81b2c0d0 T intel_gt_resume +ffffffff81b2c3e0 t gt_sanitize +ffffffff81b2c580 T intel_gt_suspend_prepare +ffffffff81b2c680 T intel_gt_suspend_late +ffffffff81b2c740 T intel_gt_runtime_suspend +ffffffff81b2c760 T intel_gt_runtime_resume +ffffffff81b2c7a0 T intel_gt_get_awake_time +ffffffff81b2c8c0 t __gt_unpark +ffffffff81b2c9c0 t __gt_park +ffffffff81b2d000 T intel_gt_pm_debugfs_register +ffffffff81b2e000 T gen6_gt_pm_unmask_irq +ffffffff81b2e090 T gen6_gt_pm_mask_irq +ffffffff81b2e120 T gen6_gt_pm_reset_iir +ffffffff81b2e1b0 T gen6_gt_pm_enable_irq +ffffffff81b2e2b0 T gen6_gt_pm_disable_irq +ffffffff81b2f000 T intel_engine_add_retire +ffffffff81b2f0a0 T intel_engine_init_retire +ffffffff81b2f0d0 t engine_retire +ffffffff81b2f1a0 T intel_engine_fini_retire +ffffffff81b2f1c0 T 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gen8_reset_engines +ffffffff81b42270 t gen6_reset_engines +ffffffff81b422e0 t ilk_do_reset +ffffffff81b423b0 t g4x_do_reset +ffffffff81b42640 t g33_do_reset +ffffffff81b42780 t i915_do_reset +ffffffff81b42a00 t __gen11_reset_engines +ffffffff81b42e70 t __gen6_reset_engines +ffffffff81b42fa0 t nop_submit_request +ffffffff81b43010 t __delayed_work_tick +ffffffff81b44000 T intel_ring_update_space +ffffffff81b44040 T __intel_ring_pin +ffffffff81b44070 T intel_ring_pin +ffffffff81b441d0 T intel_ring_reset +ffffffff81b44210 T intel_ring_unpin +ffffffff81b442b0 T intel_engine_create_ring +ffffffff81b44450 T intel_ring_free +ffffffff81b444a0 T intel_ring_begin +ffffffff81b44620 t wait_for_space +ffffffff81b44720 T intel_ring_cacheline_align +ffffffff81b45000 T intel_ring_submission_setup +ffffffff81b45700 t i915_gem_object_lock +ffffffff81b45910 t ring_release +ffffffff81b45a60 t xcs_resume +ffffffff81b46020 t xcs_sanitize +ffffffff81b46090 t reset_prepare +ffffffff81b461d0 t reset_rewind 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intel_rps_set +ffffffff81b485f0 T intel_rps_park +ffffffff81b487a0 t rps_disable_interrupts +ffffffff81b48880 t rps_set +ffffffff81b48bc0 T intel_rps_get_boost_frequency +ffffffff81b48cb0 T intel_gpu_freq +ffffffff81b48d80 T intel_rps_set_boost_frequency +ffffffff81b48f10 T intel_rps_dec_waiters +ffffffff81b48f70 T intel_rps_boost +ffffffff81b49090 T gen6_rps_get_freq_caps +ffffffff81b491e0 T intel_rps_enable +ffffffff81b4a2e0 T intel_rps_disable +ffffffff81b4a570 T intel_freq_opcode +ffffffff81b4a630 T gen11_rps_irq_handler +ffffffff81b4a6c0 T gen6_rps_irq_handler +ffffffff81b4a7d0 T gen5_rps_irq_handler +ffffffff81b4a9f0 T intel_rps_init_early +ffffffff81b4aa90 t rps_work +ffffffff81b4ae30 t rps_timer +ffffffff81b4b050 T intel_rps_init +ffffffff81b4bd30 T intel_rps_sanitize +ffffffff81b4bd90 T intel_rps_get_cagf +ffffffff81b4be20 T intel_rps_read_actual_frequency +ffffffff81b4c050 T intel_rps_read_punit_req +ffffffff81b4c0d0 T intel_rps_read_punit_req_frequency +ffffffff81b4c1f0 T intel_rps_get_requested_frequency +ffffffff81b4c3b0 T intel_rps_get_max_frequency +ffffffff81b4c4a0 T intel_rps_get_max_raw_freq +ffffffff81b4c520 T intel_rps_get_rp0_frequency +ffffffff81b4c610 T intel_rps_get_rp1_frequency +ffffffff81b4c700 T intel_rps_get_rpn_frequency +ffffffff81b4c7f0 T intel_rps_set_max_frequency +ffffffff81b4ca60 T intel_rps_get_min_frequency +ffffffff81b4cb50 T intel_rps_get_min_raw_freq +ffffffff81b4cbd0 T intel_rps_set_min_frequency +ffffffff81b4cd50 T intel_rps_raise_unslice +ffffffff81b4ce30 T intel_rps_lower_unslice +ffffffff81b4cf10 T rps_read_mask_mmio +ffffffff81b4cfa0 T intel_rps_driver_register +ffffffff81b4cfe0 T intel_rps_driver_unregister +ffffffff81b4d030 T i915_read_mch_val +ffffffff81b4d4b0 T i915_gpu_raise +ffffffff81b4d540 T i915_gpu_lower +ffffffff81b4d5d0 T i915_gpu_busy +ffffffff81b4d640 T i915_gpu_turbo_disable +ffffffff81b4e000 T intel_sa_mediagt_setup +ffffffff81b4f000 T intel_sseu_set_info +ffffffff81b4f040 T intel_sseu_subslice_total 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uao_create_from_data +ffffffff81b5a090 T uao_write +ffffffff81b5a0b0 T uao_create_from_object +ffffffff81b5a1a0 T uao_read +ffffffff81b5a1c0 t __uao_rw +ffffffff81b5b000 T intel_engines_add_sysfs +ffffffff81b5c000 T intel_guc_notify +ffffffff81b5c030 T intel_guc_init_send_regs +ffffffff81b5c0d0 T intel_guc_init_early +ffffffff81b5c210 t gen11_reset_guc_interrupts +ffffffff81b5c260 t gen11_enable_guc_interrupts +ffffffff81b5c320 t gen11_disable_guc_interrupts +ffffffff81b5c3c0 t gen9_reset_guc_interrupts +ffffffff81b5c480 t gen9_enable_guc_interrupts +ffffffff81b5c5a0 t gen9_disable_guc_interrupts +ffffffff81b5c680 T intel_guc_init_late +ffffffff81b5c690 T intel_guc_write_params +ffffffff81b5c8a0 T intel_guc_dump_time_info +ffffffff81b5c9d0 T intel_guc_init +ffffffff81b5d0d0 T intel_guc_fini +ffffffff81b5d190 T intel_guc_send_mmio +ffffffff81b5d660 T intel_guc_to_host_process_recv_msg +ffffffff81b5d740 T intel_guc_auth_huc +ffffffff81b5d7a0 T intel_guc_suspend +ffffffff81b5d860 T intel_guc_resume +ffffffff81b5d890 T intel_guc_allocate_vma +ffffffff81b5d980 T intel_guc_allocate_and_map_vma +ffffffff81b5da20 T intel_guc_self_cfg32 +ffffffff81b5db00 T intel_guc_self_cfg64 +ffffffff81b5dbe0 T intel_guc_load_status +ffffffff81b5dd70 T intel_guc_write_barrier +ffffffff81b5e000 T intel_guc_ads_print_policy_info +ffffffff81b5e020 T intel_guc_global_policies_update +ffffffff81b5e070 T intel_guc_ads_create +ffffffff81b5e630 T intel_guc_ads_init_late +ffffffff81b5e680 T intel_guc_ads_destroy +ffffffff81b5e6e0 T intel_guc_ads_reset +ffffffff81b5e750 T intel_guc_engine_usage_offset +ffffffff81b5e790 T intel_guc_engine_usage_record_map +ffffffff81b5f000 T intel_guc_capture_getlistsize +ffffffff81b5f020 t guc_capture_getlistsize +ffffffff81b5f300 T intel_guc_capture_getlist +ffffffff81b5fbb0 T intel_guc_capture_getnullheader +ffffffff81b5fc60 T intel_guc_capture_print_engine_node +ffffffff81b60160 T intel_guc_capture_free_node +ffffffff81b601e0 T intel_guc_capture_get_matching_node +ffffffff81b60360 T intel_guc_capture_process +ffffffff81b61390 T intel_guc_capture_destroy +ffffffff81b616f0 T intel_guc_capture_init +ffffffff81b61d10 t guc_capture_log_get_register +ffffffff81b620a0 t guc_capture_alloc_steered_lists_xe_hpg +ffffffff81b63000 T intel_guc_ct_init_early +ffffffff81b63120 t ct_incoming_request_worker_func +ffffffff81b634a0 t ct_receive_tasklet_func +ffffffff81b634c0 T intel_guc_ct_init +ffffffff81b63660 T intel_guc_ct_fini +ffffffff81b636c0 T intel_guc_ct_enable +ffffffff81b639d0 T intel_guc_ct_disable +ffffffff81b63a80 T intel_guc_ct_send +ffffffff81b64450 T intel_guc_ct_event_handler +ffffffff81b64480 t ct_try_receive_message +ffffffff81b64c70 T intel_guc_ct_print_info +ffffffff81b64d80 t ct_write +ffffffff81b64f20 t ct_deadlocked +ffffffff81b66000 T intel_guc_debugfs_register +ffffffff81b67000 T intel_guc_fw_upload +ffffffff81b68000 T intel_gt_init_hwconfig +ffffffff81b681d0 T intel_gt_fini_hwconfig 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i915_perf_add_config_ioctl +ffffffff81baa810 T i915_perf_remove_config_ioctl +ffffffff81baa890 T i915_perf_init +ffffffff81baac10 t gen7_is_valid_b_counter_addr +ffffffff81baac60 t hsw_is_valid_mux_addr +ffffffff81baace0 t hsw_enable_metric_set +ffffffff81baadc0 t hsw_disable_metric_set +ffffffff81baaed0 t gen7_oa_enable +ffffffff81bab030 t gen7_oa_disable +ffffffff81bab0f0 t gen7_oa_read +ffffffff81bab650 t gen7_oa_hw_tail_read +ffffffff81bab6a0 t gen8_oa_read +ffffffff81babcd0 t gen8_is_valid_mux_addr +ffffffff81babd50 t gen8_is_valid_flex_addr +ffffffff81babdd0 t chv_is_valid_mux_addr +ffffffff81babe50 t gen8_oa_enable +ffffffff81babf90 t gen8_oa_disable +ffffffff81bac050 t gen8_enable_metric_set +ffffffff81bac110 t gen8_disable_metric_set +ffffffff81bac1a0 t gen8_oa_hw_tail_read +ffffffff81bac1f0 t gen11_is_valid_mux_addr +ffffffff81bac2b0 t gen11_disable_metric_set +ffffffff81bac340 t gen12_is_valid_b_counter_addr +ffffffff81bac390 t gen12_is_valid_mux_addr +ffffffff81bac3e0 t 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fill_topology_info +ffffffff81baebd0 t query_perf_config_data +ffffffff81bb0000 T i915_request_slab_cache +ffffffff81bb0030 t i915_fence_get_driver_name +ffffffff81bb0060 t i915_fence_get_timeline_name +ffffffff81bb00c0 t i915_fence_enable_signaling +ffffffff81bb00d0 t i915_fence_signaled +ffffffff81bb0120 t i915_fence_wait +ffffffff81bb0140 t i915_fence_release +ffffffff81bb0230 T i915_request_notify_execute_cb_imm +ffffffff81bb02a0 T i915_request_active_engine +ffffffff81bb0380 T i915_request_free_capture_list +ffffffff81bb03f0 T i915_request_retire +ffffffff81bb05b0 T i915_request_retire_upto +ffffffff81bb0620 T __i915_request_skip +ffffffff81bb06c0 T i915_request_set_error_once +ffffffff81bb0730 T i915_request_mark_eio +ffffffff81bb07c0 T __i915_request_submit +ffffffff81bb0a10 T i915_request_submit +ffffffff81bb0a60 T __i915_request_unsubmit +ffffffff81bb0ad0 T i915_request_unsubmit +ffffffff81bb0b50 T i915_request_cancel +ffffffff81bb0bd0 T __i915_request_create +ffffffff81bb0ef0 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T add_taint_for_CI +ffffffff81bbd0f0 T cancel_timer +ffffffff81bbd140 T set_timer_ms +ffffffff81bbd1f0 T i915_vtd_active +ffffffff81bbe000 T intel_vgpu_detect +ffffffff81bbe030 T intel_vgpu_register +ffffffff81bbe090 T intel_vgpu_active +ffffffff81bbe0c0 T intel_vgpu_has_full_ppgtt +ffffffff81bbe100 T intel_vgpu_has_hwsp_emulation +ffffffff81bbe140 T intel_vgpu_has_huge_gtt +ffffffff81bbe180 T intel_vgt_deballoon +ffffffff81bbe3c0 T intel_vgt_balloon +ffffffff81bbf000 T i915_vma_instance +ffffffff81bbf5b0 T i915_vma_work +ffffffff81bbf620 T i915_vma_wait_for_bind +ffffffff81bbf6a0 T i915_vma_bind +ffffffff81bbf9f0 T i915_vma_pin_iomap +ffffffff81bbfbc0 T i915_vma_flush_writes +ffffffff81bbfc30 T i915_vma_unpin_iomap +ffffffff81bbfcc0 T i915_vma_unpin_and_release +ffffffff81bbfd30 T i915_vma_misplaced +ffffffff81bbfdd0 T __i915_vma_set_map_and_fenceable +ffffffff81bbfe50 T i915_gem_valid_gtt_space +ffffffff81bbfee0 T vma_invalidate_tlb +ffffffff81bbff20 T i915_vma_pin_ww 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intel_rotate_pages +ffffffff81bc26b0 t intel_remap_pages +ffffffff81bc2a70 t intel_partial_pages +ffffffff81bc3000 T i915_vma_resource_alloc +ffffffff81bc3050 T i915_vma_resource_free +ffffffff81bc3090 T i915_vma_resource_unhold +ffffffff81bc30a0 t __i915_vma_resource_unhold +ffffffff81bc3190 T i915_vma_resource_hold +ffffffff81bc31e0 T i915_vma_resource_unbind +ffffffff81bc3310 T __i915_vma_resource_init +ffffffff81bc3370 t i915_vma_resource_fence_notify +ffffffff81bc3440 T i915_vma_resource_bind_dep_sync +ffffffff81bc35c0 T i915_vma_resource_bind_dep_sync_all +ffffffff81bc3660 T i915_vma_resource_bind_dep_await +ffffffff81bc3800 T i915_vma_resource_module_exit +ffffffff81bc3820 T i915_vma_resource_module_init +ffffffff81bc3880 t get_driver_name +ffffffff81bc38b0 t get_timeline_name +ffffffff81bc38e0 t unbind_fence_release +ffffffff81bc3920 t i915_vma_resource_unbind_work +ffffffff81bc4000 T intel_platform_name +ffffffff81bc40a0 T intel_device_info_print +ffffffff81bc4d30 T intel_device_info_subplatform_init +ffffffff81bc5090 T intel_device_info_runtime_init +ffffffff81bc5770 T intel_driver_caps_print +ffffffff81bc6000 T intel_dram_detect +ffffffff81bc6480 t skl_get_dram_info +ffffffff81bc6660 T intel_dram_edram_detect +ffffffff81bc66f0 t icl_pcode_read_mem_global_info +ffffffff81bc67d0 t skl_dram_get_channel_info +ffffffff81bc69a0 t skl_dram_get_dimm_info +ffffffff81bc7000 T intel_memory_region_lookup +ffffffff81bc70e0 T intel_memory_region_by_type +ffffffff81bc71a0 T intel_memory_region_reserve +ffffffff81bc71c0 T intel_memory_region_debug +ffffffff81bc7220 T intel_memory_region_create +ffffffff81bc7390 T intel_memory_region_set_name +ffffffff81bc7410 T intel_memory_region_avail +ffffffff81bc7490 T intel_memory_region_destroy +ffffffff81bc7500 T intel_memory_regions_hw_probe +ffffffff81bc7650 T intel_memory_regions_driver_release +ffffffff81bc8000 T intel_detect_pch +ffffffff81bc8310 t intel_pch_match +ffffffff81bc8360 t intel_pch_type +ffffffff81bc9000 T snb_pcode_read +ffffffff81bc90d0 t __snb_pcode_rw +ffffffff81bc9260 T snb_pcode_write_timeout +ffffffff81bc9330 T skl_pcode_request +ffffffff81bc9670 T intel_pcode_init +ffffffff81bc96d0 T snb_pcode_read_p +ffffffff81bc97e0 T snb_pcode_write_p +ffffffff81bca000 T intel_set_memory_cxsr +ffffffff81bca0a0 t _intel_set_memory_cxsr +ffffffff81bca350 T intel_wm_plane_visible +ffffffff81bca3b0 T ilk_wm_max_level +ffffffff81bca420 T intel_print_wm_latency +ffffffff81bca580 T ilk_disable_lp_wm +ffffffff81bca660 T g4x_wm_get_hw_state +ffffffff81bcae30 T g4x_wm_sanitize +ffffffff81bcafd0 t g4x_program_watermarks +ffffffff81bcb370 T vlv_wm_get_hw_state +ffffffff81bcc040 t vlv_invalidate_wms +ffffffff81bcc1a0 T vlv_wm_sanitize +ffffffff81bcc2f0 t vlv_program_watermarks +ffffffff81bcca40 T ilk_wm_get_hw_state +ffffffff81bcceb0 T intel_init_clock_gating +ffffffff81bcced0 T intel_suspend_hw +ffffffff81bccf80 T intel_init_clock_gating_hooks +ffffffff81bcd1d0 T intel_init_pm +ffffffff81bcdcc0 T intel_pm_setup +ffffffff81bcdd00 t chv_set_memory_dvfs +ffffffff81bcdec0 t pvc_init_clock_gating +ffffffff81bce060 t dg2_init_clock_gating +ffffffff81bce1b0 t xehpsdv_init_clock_gating +ffffffff81bce2b0 t adlp_init_clock_gating +ffffffff81bce3a0 t gen12lp_init_clock_gating +ffffffff81bce510 t dg1_init_clock_gating +ffffffff81bce600 t icl_init_clock_gating +ffffffff81bce6c0 t cfl_init_clock_gating +ffffffff81bce7e0 t gen9_init_clock_gating +ffffffff81bce8f0 t skl_init_clock_gating +ffffffff81bcea30 t kbl_init_clock_gating +ffffffff81bcec40 t bxt_init_clock_gating +ffffffff81bceda0 t glk_init_clock_gating +ffffffff81bcee00 t bdw_init_clock_gating +ffffffff81bcf250 t chv_init_clock_gating +ffffffff81bcf400 t hsw_init_clock_gating +ffffffff81bcf550 t ivb_init_clock_gating +ffffffff81bcf760 t g4x_disable_trickle_feed +ffffffff81bcf8c0 t cpt_init_clock_gating +ffffffff81bcfbf0 t vlv_init_clock_gating +ffffffff81bcfd00 t gen6_init_clock_gating +ffffffff81bcff00 t ilk_init_clock_gating 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atom_execute_table_scratch_unlocked +ffffffff81be80a0 t atom_execute_table_locked +ffffffff81be83d0 T atom_execute_table +ffffffff81be8480 T atom_parse +ffffffff81be8660 T atom_destroy +ffffffff81be86a0 T atom_asic_init +ffffffff81be88b0 T atom_parse_data_header +ffffffff81be8950 T atom_parse_cmd_header +ffffffff81be89d0 T atom_allocate_fb_scratch +ffffffff81be8aa0 t atom_op_move +ffffffff81be8c80 t atom_op_and +ffffffff81be8e60 t atom_op_or +ffffffff81be9040 t atom_op_shift_left +ffffffff81be9230 t atom_op_shift_right +ffffffff81be9420 t atom_op_mul +ffffffff81be9570 t atom_op_div +ffffffff81be96e0 t atom_op_add +ffffffff81be98c0 t atom_op_sub +ffffffff81be9aa0 t atom_op_setport +ffffffff81be9c20 t atom_op_setregblock +ffffffff81be9ce0 t atom_op_setfbbase +ffffffff81be9db0 t atom_op_compare +ffffffff81be9fa0 t atom_op_switch +ffffffff81bea1f0 t atom_op_jump +ffffffff81bea470 t atom_op_test +ffffffff81bea630 t atom_op_delay +ffffffff81bea710 t atom_op_calltable +ffffffff81bea860 t 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radeon_atombios_init_crtc +ffffffff81bef6b0 t radeon_bo_reserve +ffffffff81bef830 t radeon_bo_unreserve +ffffffff81bef910 t atombios_crtc_program_pll +ffffffff81befbc0 t atombios_crtc_prepare +ffffffff81befc70 t atombios_crtc_commit +ffffffff81befce0 t atombios_crtc_mode_fixup +ffffffff81bf0a60 t atombios_crtc_disable +ffffffff81bf0cc0 t radeon_get_shared_nondp_ppll +ffffffff81bf1000 T radeon_atom_copy_swap +ffffffff81bf1020 T radeon_dp_aux_init +ffffffff81bf1110 t radeon_dp_aux_transfer_atom +ffffffff81bf12e0 T radeon_dp_getsinktype +ffffffff81bf1350 T radeon_dp_getdpcd +ffffffff81bf14c0 T radeon_dp_get_panel_mode +ffffffff81bf15d0 T radeon_dp_set_link_config +ffffffff81bf1650 t radeon_dp_get_dp_link_config +ffffffff81bf17d0 T radeon_dp_mode_valid_helper +ffffffff81bf1880 T radeon_dp_needs_link_train +ffffffff81bf18f0 T radeon_dp_set_rx_power_state +ffffffff81bf1970 T radeon_dp_link_train +ffffffff81bf20f0 t radeon_process_aux_ch +ffffffff81bf2290 t dp_get_adjust_train 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radeon_atom_encoder_dpms +ffffffff81bf58e0 t radeon_atom_mode_fixup +ffffffff81bf5a20 t radeon_atom_encoder_prepare +ffffffff81bf5f00 t radeon_atom_encoder_commit +ffffffff81bf5f30 t radeon_atom_encoder_mode_set +ffffffff81bf64e0 t radeon_atom_dig_detect +ffffffff81bf65f0 t radeon_atom_encoder_disable +ffffffff81bf6890 t radeon_atom_encoder_dpms_avivo +ffffffff81bf6ac0 t radeon_atom_encoder_dpms_dig +ffffffff81bf6fc0 t radeon_atom_dac_detect +ffffffff81bf71b0 t radeon_atom_ext_dpms +ffffffff81bf71e0 t radeon_atom_ext_prepare +ffffffff81bf7210 t radeon_atom_ext_commit +ffffffff81bf7240 t radeon_atom_ext_mode_set +ffffffff81bf7270 t radeon_atom_ext_disable +ffffffff81bf8000 T radeon_atom_hw_i2c_xfer +ffffffff81bf8160 t radeon_process_i2c_ch +ffffffff81bf8330 T radeon_atom_hw_i2c_func +ffffffff81bf9000 T btc_get_max_clock_from_voltage_dependency_table +ffffffff81bf90d0 T btc_apply_voltage_dependency_rules +ffffffff81bf9140 T btc_skip_blacklist_clocks +ffffffff81bf9240 T btc_adjust_clock_combinations +ffffffff81bf9350 T btc_apply_voltage_delta_rules +ffffffff81bf9480 T btc_program_mgcg_hw_sequence +ffffffff81bf9580 T btc_dpm_enabled +ffffffff81bf9590 T btc_notify_uvd_to_smc +ffffffff81bf9600 T btc_reset_to_default +ffffffff81bf9650 T btc_read_arb_registers +ffffffff81bf96e0 T btc_dpm_vblank_too_short +ffffffff81bf9750 T btc_dpm_pre_set_power_state +ffffffff81bfa630 T btc_dpm_set_power_state +ffffffff81bfaa40 T btc_dpm_post_set_power_state +ffffffff81bfab60 T btc_dpm_enable +ffffffff81bfbd70 T btc_dpm_disable +ffffffff81bfc2a0 T btc_dpm_setup_asic +ffffffff81bfc380 T btc_dpm_init +ffffffff81bfc780 T btc_dpm_fini +ffffffff81bfc830 T btc_dpm_debugfs_print_current_performance_level +ffffffff81bfc880 T btc_dpm_get_current_sclk +ffffffff81bfc900 T btc_dpm_get_current_mclk +ffffffff81bfc980 T btc_dpm_get_sclk +ffffffff81bfc9d0 T btc_dpm_get_mclk +ffffffff81bfd000 T ci_dpm_powergate_uvd +ffffffff81bfd380 T ci_dpm_vblank_too_short +ffffffff81bfd410 T ci_fan_ctrl_get_fan_speed_percent +ffffffff81bfd4b0 T ci_fan_ctrl_set_fan_speed_percent +ffffffff81bfd580 T ci_fan_ctrl_set_mode +ffffffff81bfd710 t ci_fan_ctrl_set_static_mode +ffffffff81bfd7d0 t ci_thermal_start_smc_fan_control +ffffffff81bfda10 T ci_fan_ctrl_get_mode +ffffffff81bfda70 T ci_dpm_force_performance_level +ffffffff81bfe330 t ci_upload_dpm_level_enable_mask +ffffffff81bfe660 T ci_dpm_pre_set_power_state +ffffffff81bfe960 T ci_dpm_post_set_power_state +ffffffff81bfea30 T ci_dpm_setup_asic +ffffffff81bfec30 T ci_dpm_enable +ffffffff81c02a60 t ci_enable_didt +ffffffff81c02d00 t ci_enable_power_containment +ffffffff81c031a0 T ci_dpm_late_enable +ffffffff81c03390 T ci_dpm_disable +ffffffff81c03a90 T ci_dpm_set_power_state +ffffffff81c04c10 T ci_dpm_display_configuration_changed +ffffffff81c04db0 T ci_dpm_fini +ffffffff81c04e60 T ci_dpm_init +ffffffff81c06530 T ci_dpm_debugfs_print_current_performance_level +ffffffff81c06670 T ci_dpm_print_power_state +ffffffff81c06730 T ci_dpm_get_current_sclk +ffffffff81c06800 T ci_dpm_get_current_mclk +ffffffff81c068d0 T ci_dpm_get_sclk +ffffffff81c06920 T ci_dpm_get_mclk +ffffffff81c06970 t ci_populate_all_graphic_levels +ffffffff81c06ef0 t ci_populate_all_memory_levels +ffffffff81c07800 t ci_do_program_memory_timing_parameters +ffffffff81c07a20 t ci_populate_smc_voltage_table +ffffffff81c07b80 t ci_enable_sclk_mclk_dpm +ffffffff81c08000 T ci_copy_bytes_to_smc +ffffffff81c08250 T ci_start_smc +ffffffff81c08290 T ci_reset_smc +ffffffff81c082d0 T ci_program_jump_on_start +ffffffff81c08300 T ci_stop_smc_clock +ffffffff81c08340 T ci_start_smc_clock +ffffffff81c08380 T ci_is_smc_running +ffffffff81c083f0 T ci_load_smc_ucode +ffffffff81c08580 T ci_read_smc_sram_dword +ffffffff81c08650 T ci_write_smc_sram_dword +ffffffff81c09000 T cik_get_allowed_info_register +ffffffff81c090a0 T cik_didt_rreg +ffffffff81c09140 T cik_didt_wreg +ffffffff81c091c0 T ci_get_temp +ffffffff81c09210 T kv_get_temp +ffffffff81c09260 T cik_pciep_rreg +ffffffff81c092e0 T cik_pciep_wreg +ffffffff81c09350 T cik_get_xclk +ffffffff81c093c0 T cik_mm_rdoorbell +ffffffff81c09420 T cik_mm_wdoorbell +ffffffff81c09470 T ci_mc_load_microcode +ffffffff81c097c0 T cik_ring_test +ffffffff81c09a70 T cik_fence_gfx_ring_emit +ffffffff81c09e70 T cik_fence_compute_ring_emit +ffffffff81c0a100 T cik_semaphore_ring_emit +ffffffff81c0a2d0 T cik_copy_cpdma +ffffffff81c0a6d0 T cik_ring_ib_execute +ffffffff81c0acb0 T cik_ib_test +ffffffff81c0af90 T cik_gfx_get_rptr +ffffffff81c0aff0 T cik_gfx_get_wptr +ffffffff81c0b030 T cik_gfx_set_wptr +ffffffff81c0b070 T cik_compute_get_rptr +ffffffff81c0b150 T cik_compute_get_wptr +ffffffff81c0b230 T cik_compute_set_wptr +ffffffff81c0b2b0 T cik_gpu_check_soft_reset +ffffffff81c0b420 T cik_asic_reset +ffffffff81c0b830 t cik_gpu_pci_config_reset +ffffffff81c0c050 T cik_gfx_is_lockup +ffffffff81c0c0c0 T cik_pcie_gart_tlb_flush +ffffffff81c0c110 T cik_ib_parse +ffffffff81c0c140 T cik_vm_init +ffffffff81c0c1a0 T cik_vm_fini +ffffffff81c0c1d0 T cik_vm_flush +ffffffff81c0cf20 T cik_enter_rlc_safe_mode +ffffffff81c0d010 T cik_exit_rlc_safe_mode +ffffffff81c0d050 T cik_update_cg +ffffffff81c0d520 t cik_enable_mgcg +ffffffff81c0da40 t cik_enable_cgcg +ffffffff81c0ddb0 T cik_init_cp_pg_table +ffffffff81c0e070 T cik_get_csb_size +ffffffff81c0e100 T cik_get_csb_buffer +ffffffff81c0e2a0 T cik_irq_set +ffffffff81c0f040 t cik_disable_interrupt_state +ffffffff81c0f500 T cik_irq_process +ffffffff81c10cb0 t cik_irq_ack +ffffffff81c11630 T cik_resume +ffffffff81c116c0 t cik_init_golden_registers +ffffffff81c11880 t cik_startup +ffffffff81c175d0 T cik_suspend +ffffffff81c179c0 T cik_init +ffffffff81c181b0 t cik_init_microcode +ffffffff81c191c0 t cik_pcie_gart_fini +ffffffff81c192c0 T cik_fini +ffffffff81c19660 T dce8_program_fmt +ffffffff81c19790 T dce8_bandwidth_update +ffffffff81c1a3b0 T cik_get_gpu_clock_counter +ffffffff81c1a480 T cik_set_uvd_clocks +ffffffff81c1a500 t cik_set_uvd_clock +ffffffff81c1a670 T cik_set_vce_clocks +ffffffff81c1a8b0 t cik_wait_for_rlc_serdes +ffffffff81c1aa80 t radeon_bo_reserve +ffffffff81c1ac00 t radeon_bo_unreserve +ffffffff81c1ace0 t cik_update_gfx_pg +ffffffff81c1ae80 t cik_compute_stop +ffffffff81c1aff0 t cik_cp_compute_fini +ffffffff81c1b190 t dce8_latency_watermark +ffffffff81c1c000 T cik_sdma_get_rptr +ffffffff81c1c070 T cik_sdma_get_wptr +ffffffff81c1c0c0 T cik_sdma_set_wptr +ffffffff81c1c110 T cik_sdma_ring_ib_execute +ffffffff81c1c4f0 T cik_sdma_fence_ring_emit +ffffffff81c1c6d0 t cik_sdma_hdp_flush_ring_emit +ffffffff81c1c910 T cik_sdma_semaphore_ring_emit +ffffffff81c1ca30 T cik_sdma_enable +ffffffff81c1cc10 T cik_sdma_resume +ffffffff81c1d0f0 T cik_sdma_fini +ffffffff81c1d130 T cik_copy_dma +ffffffff81c1d500 T cik_sdma_ring_test +ffffffff81c1d7a0 T cik_sdma_ib_test +ffffffff81c1d9f0 T cik_sdma_is_lockup +ffffffff81c1da70 T cik_sdma_vm_copy_pages +ffffffff81c1db80 T cik_sdma_vm_write_pages +ffffffff81c1dcf0 T cik_sdma_vm_set_pages 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cypress_calculate_burst_time +ffffffff81c20530 T cypress_program_memory_timing_parameters +ffffffff81c206e0 T cypress_populate_smc_initial_state +ffffffff81c20a80 T cypress_populate_smc_acpi_state +ffffffff81c20e10 T cypress_construct_voltage_tables +ffffffff81c20ec0 t cypress_trim_voltage_table_to_fit_state_table +ffffffff81c210b0 T cypress_populate_smc_voltage_tables +ffffffff81c21200 T cypress_get_mvdd_configuration +ffffffff81c212c0 T cypress_populate_mc_reg_table +ffffffff81c21520 T cypress_get_table_locations +ffffffff81c21600 T cypress_enable_display_gap +ffffffff81c21660 T cypress_dpm_setup_asic +ffffffff81c21750 T cypress_dpm_enable +ffffffff81c22230 t cypress_force_mc_use_s1 +ffffffff81c224b0 t cypress_gfx_clock_gating_enable +ffffffff81c227c0 t cypress_mg_clock_gating_enable +ffffffff81c22a40 T cypress_dpm_disable +ffffffff81c22c70 T cypress_dpm_set_power_state +ffffffff81c22f20 T cypress_dpm_display_configuration_changed +ffffffff81c23000 T cypress_dpm_init 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evergreen_hpd_set_polarity +ffffffff81c27c80 T evergreen_hpd_init +ffffffff81c27d50 T evergreen_hpd_fini +ffffffff81c27df0 T evergreen_get_number_of_dram_channels +ffffffff81c27e40 T evergreen_bandwidth_update +ffffffff81c28000 t evergreen_line_buffer_adjust +ffffffff81c28200 t evergreen_program_watermarks +ffffffff81c28cb0 T evergreen_mc_wait_for_idle +ffffffff81c28d50 T evergreen_pcie_gart_tlb_flush +ffffffff81c28e30 T evergreen_mc_stop +ffffffff81c29920 T evergreen_mc_resume +ffffffff81c2a030 T evergreen_mc_program +ffffffff81c2a440 T evergreen_ring_ib_execute +ffffffff81c2a8e0 T evergreen_mc_init +ffffffff81c2aa20 T evergreen_print_gpu_status_regs +ffffffff81c2aa50 T evergreen_is_display_hung +ffffffff81c2ac60 T evergreen_gpu_check_soft_reset +ffffffff81c2adc0 T evergreen_gpu_pci_config_reset +ffffffff81c2af40 T evergreen_asic_reset +ffffffff81c2b260 T evergreen_gfx_is_lockup +ffffffff81c2b2d0 T sumo_rlc_fini +ffffffff81c2b490 t radeon_bo_reserve +ffffffff81c2b610 t radeon_bo_unreserve +ffffffff81c2b6f0 T sumo_rlc_init +ffffffff81c2bee0 T evergreen_rlc_resume +ffffffff81c2c250 T evergreen_get_vblank_counter +ffffffff81c2c2c0 T evergreen_disable_interrupt_state +ffffffff81c2c590 T evergreen_irq_set +ffffffff81c2cb50 T evergreen_irq_suspend +ffffffff81c2cba0 T evergreen_irq_process +ffffffff81c2d6a0 t evergreen_irq_ack +ffffffff81c2dda0 T evergreen_resume +ffffffff81c2de80 t evergreen_init_golden_registers +ffffffff81c2e090 t evergreen_startup +ffffffff81c30720 T evergreen_suspend +ffffffff81c308c0 T evergreen_init +ffffffff81c30de0 T evergreen_fini +ffffffff81c30fd0 T evergreen_pcie_gen2_enable +ffffffff81c31200 T evergreen_program_aspm +ffffffff81c318a0 t evergreen_latency_watermark +ffffffff81c32000 T evergreen_cs_parse +ffffffff81c348c0 T evergreen_dma_cs_parse +ffffffff81c35b00 T evergreen_ib_parse +ffffffff81c35fb0 T evergreen_dma_ib_parse +ffffffff81c36170 t evergreen_cs_track_check +ffffffff81c37190 t evergreen_cs_handle_reg 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evergreen_hdmi_enable +ffffffff81c3c090 T evergreen_dp_enable +ffffffff81c3d000 T kv_dpm_enable_bapm +ffffffff81c3d070 T kv_dpm_enable +ffffffff81c3e5c0 t kv_enable_didt +ffffffff81c3e860 T kv_dpm_late_enable +ffffffff81c3ea50 T kv_dpm_powergate_uvd +ffffffff81c3ebc0 T kv_dpm_disable +ffffffff81c3ef30 T kv_dpm_force_performance_level +ffffffff81c3f0c0 t kv_force_dpm_lowest +ffffffff81c3f190 T kv_dpm_pre_set_power_state +ffffffff81c3f720 T kv_dpm_set_power_state +ffffffff81c3fed0 t kv_set_valid_clock_range +ffffffff81c40090 t kv_calculate_ds_divider +ffffffff81c40200 t kv_calculate_nbps_level_settings +ffffffff81c40390 t kv_update_vce_dpm +ffffffff81c40570 T kv_dpm_post_set_power_state +ffffffff81c40610 T kv_dpm_setup_asic +ffffffff81c40670 T kv_dpm_init +ffffffff81c40f10 T kv_dpm_debugfs_print_current_performance_level +ffffffff81c40f80 T kv_dpm_get_current_sclk +ffffffff81c40ff0 T kv_dpm_get_current_mclk +ffffffff81c41020 T kv_dpm_print_power_state +ffffffff81c410c0 T kv_dpm_fini +ffffffff81c41160 T kv_dpm_display_configuration_changed +ffffffff81c41190 T kv_dpm_get_sclk +ffffffff81c411e0 T kv_dpm_get_mclk +ffffffff81c42000 T kv_notify_message_to_smu +ffffffff81c420c0 T kv_dpm_get_enable_mask +ffffffff81c421a0 T kv_send_msg_to_smc_with_parameter +ffffffff81c42270 T kv_read_smc_sram_dword +ffffffff81c42300 T kv_smc_dpm_enable +ffffffff81c42430 T kv_smc_bapm_enable +ffffffff81c42560 T kv_copy_bytes_to_smc +ffffffff81c43000 T tn_smc_rreg +ffffffff81c43080 T tn_smc_wreg +ffffffff81c430f0 T ni_mc_load_microcode +ffffffff81c432e0 T ni_init_microcode +ffffffff81c43820 T cayman_get_allowed_info_register +ffffffff81c438b0 T tn_get_temp +ffffffff81c43940 T cayman_pcie_gart_tlb_flush +ffffffff81c43990 T cayman_cp_int_cntl_setup +ffffffff81c439e0 T cayman_fence_ring_emit +ffffffff81c43d90 T cayman_ring_ib_execute +ffffffff81c44210 T cayman_gfx_get_rptr +ffffffff81c442a0 T cayman_gfx_get_wptr +ffffffff81c44310 T cayman_gfx_set_wptr +ffffffff81c44390 T cayman_gpu_check_soft_reset +ffffffff81c44510 T cayman_asic_reset +ffffffff81c44810 T cayman_gfx_is_lockup +ffffffff81c44880 T cayman_resume +ffffffff81c44910 t ni_init_golden_registers +ffffffff81c449f0 t cayman_startup +ffffffff81c47120 T cayman_suspend +ffffffff81c47310 T cayman_init +ffffffff81c47910 T cayman_fini +ffffffff81c47b90 T cayman_vm_init +ffffffff81c47bf0 T cayman_vm_fini +ffffffff81c47c20 T cayman_vm_decode_fault +ffffffff81c47cb0 T cayman_vm_flush +ffffffff81c48130 T tn_set_vce_clocks +ffffffff81c49000 T cayman_dma_get_rptr +ffffffff81c49070 T cayman_dma_get_wptr +ffffffff81c490c0 T cayman_dma_set_wptr +ffffffff81c49110 T cayman_dma_ring_ib_execute +ffffffff81c494a0 T cayman_dma_stop +ffffffff81c49550 T cayman_dma_resume +ffffffff81c497a0 T cayman_dma_fini +ffffffff81c49860 T cayman_dma_is_lockup +ffffffff81c498e0 T cayman_dma_vm_copy_pages +ffffffff81c499d0 T cayman_dma_vm_write_pages +ffffffff81c49b30 T cayman_dma_vm_set_pages +ffffffff81c49c90 T cayman_dma_vm_pad_ib +ffffffff81c49ce0 T cayman_dma_vm_flush +ffffffff81c4b000 T ni_get_pi +ffffffff81c4b030 T ni_get_ps +ffffffff81c4b060 T ni_dpm_vblank_too_short +ffffffff81c4b0d0 T ni_dpm_force_performance_level +ffffffff81c4b220 T ni_copy_and_switch_arb_sets +ffffffff81c4b500 T ni_set_uvd_clock_before_set_eng_clock +ffffffff81c4b580 T ni_set_uvd_clock_after_set_eng_clock +ffffffff81c4b600 T ni_dpm_setup_asic +ffffffff81c4b810 T ni_update_current_ps +ffffffff81c4b8d0 T ni_update_requested_ps +ffffffff81c4b990 T ni_dpm_enable +ffffffff81c4ebd0 t ni_populate_smc_tdp_limits +ffffffff81c4ed90 T ni_dpm_disable +ffffffff81c4f150 T ni_dpm_pre_set_power_state +ffffffff81c4f730 T ni_dpm_set_power_state +ffffffff81c50850 T ni_dpm_post_set_power_state +ffffffff81c50920 T ni_dpm_init +ffffffff81c512f0 T ni_dpm_fini +ffffffff81c513a0 T ni_dpm_print_power_state +ffffffff81c51470 T ni_dpm_debugfs_print_current_performance_level +ffffffff81c514b0 T ni_dpm_get_current_sclk +ffffffff81c51520 T ni_dpm_get_current_mclk +ffffffff81c51590 T ni_dpm_get_sclk +ffffffff81c515f0 T ni_dpm_get_mclk +ffffffff81c51650 t ni_do_program_memory_timing_parameters +ffffffff81c51780 t ni_calculate_sclk_params +ffffffff81c519a0 t ni_calculate_power_boost_limit +ffffffff81c51b50 t ni_populate_mclk_value +ffffffff81c52000 T r100_wait_for_vblank +ffffffff81c521a0 T r100_page_flip +ffffffff81c52450 T r100_page_flip_pending +ffffffff81c52500 T r100_pm_get_dynpm_state +ffffffff81c52720 T r100_pm_init_profile +ffffffff81c52800 T r100_pm_misc +ffffffff81c52c40 T r100_pm_prepare +ffffffff81c52d00 T r100_pm_finish +ffffffff81c52dc0 T r100_gui_idle +ffffffff81c52e00 T r100_hpd_sense +ffffffff81c52e60 T r100_hpd_set_polarity +ffffffff81c52f20 T r100_hpd_init +ffffffff81c52fc0 T r100_hpd_fini +ffffffff81c53020 T r100_pci_gart_tlb_flush +ffffffff81c53050 T r100_pci_gart_init +ffffffff81c53120 T r100_pci_gart_get_page_entry +ffffffff81c53150 T r100_pci_gart_set_page +ffffffff81c53190 T r100_pci_gart_enable +ffffffff81c53280 T r100_pci_gart_disable +ffffffff81c53300 T r100_pci_gart_fini +ffffffff81c53380 T r100_irq_set +ffffffff81c53460 T r100_irq_disable +ffffffff81c534d0 T r100_irq_process +ffffffff81c537d0 T r100_get_vblank_counter +ffffffff81c53820 T r100_fence_ring_emit +ffffffff81c53c90 T r100_semaphore_ring_emit +ffffffff81c53cc0 T r100_copy_blit +ffffffff81c54360 T r100_ring_start +ffffffff81c54450 T r100_gfx_get_rptr +ffffffff81c544b0 T r100_gfx_get_wptr +ffffffff81c544f0 T r100_gfx_set_wptr +ffffffff81c54530 T r100_cp_init +ffffffff81c54a60 T r100_debugfs_cp_init +ffffffff81c54a90 T r100_cp_fini +ffffffff81c54b30 T r100_cp_disable +ffffffff81c54c70 T r100_gui_wait_for_idle +ffffffff81c54d60 T r100_reloc_pitch_offset +ffffffff81c54e90 T r100_packet3_load_vbpntr +ffffffff81c55130 T r100_cs_parse_packet0 +ffffffff81c55240 T r100_cs_packet_parse_vline +ffffffff81c55430 T r100_cs_track_check_pkt3_indx_buffer +ffffffff81c554b0 T r100_cs_parse +ffffffff81c56970 T r100_cs_track_clear +ffffffff81c56d00 T r100_cs_track_check +ffffffff81c576f0 T r100_mc_wait_for_idle +ffffffff81c57790 T r100_gpu_is_lockup +ffffffff81c577f0 T r100_enable_bm +ffffffff81c57840 T r100_bm_disable +ffffffff81c578f0 T r100_asic_reset +ffffffff81c57c20 T r100_mc_stop +ffffffff81c57de0 T r100_mc_resume +ffffffff81c57ea0 T r100_set_common_regs +ffffffff81c58050 T r100_vram_init_sizes +ffffffff81c58240 T r100_vga_set_state +ffffffff81c582a0 T r100_pll_errata_after_index +ffffffff81c582e0 T r100_pll_rreg +ffffffff81c58410 T r100_pll_wreg +ffffffff81c58520 T r100_debugfs_rbbm_init +ffffffff81c58550 T r100_debugfs_mc_info_init +ffffffff81c58580 T r100_set_surface_reg +ffffffff81c58790 T r100_clear_surface_reg +ffffffff81c58840 T r100_bandwidth_update +ffffffff81c592f0 T r100_ring_test +ffffffff81c595b0 T r100_ring_ib_execute +ffffffff81c59810 T r100_ib_test +ffffffff81c59b50 T r100_vga_render_disable +ffffffff81c59bb0 T r100_resume +ffffffff81c59db0 t r100_startup +ffffffff81c5a2e0 T r100_suspend +ffffffff81c5a3c0 T r100_fini +ffffffff81c5a4d0 T r100_restore_sanity +ffffffff81c5a570 T r100_init +ffffffff81c5aaf0 T r100_mm_rreg_slow +ffffffff81c5ab70 T r100_mm_wreg_slow +ffffffff81c5abd0 T r100_io_rreg +ffffffff81c5ac70 T r100_io_wreg +ffffffff81c5ace0 t r100_cs_track_texture_print +ffffffff81c5b000 T r200_copy_dma +ffffffff81c5b470 T r200_packet0_check +ffffffff81c5c490 T r200_set_safe_registers +ffffffff81c5d000 T rv370_pcie_rreg +ffffffff81c5d080 T rv370_pcie_wreg +ffffffff81c5d0f0 T rv370_pcie_gart_tlb_flush +ffffffff81c5d2f0 T rv370_pcie_gart_get_page_entry +ffffffff81c5d350 T rv370_pcie_gart_set_page +ffffffff81c5d390 T rv370_pcie_gart_init +ffffffff81c5d460 T rv370_pcie_gart_enable +ffffffff81c5d7c0 T rv370_pcie_gart_disable +ffffffff81c5d940 T rv370_pcie_gart_fini +ffffffff81c5d970 T r300_fence_ring_emit +ffffffff81c5df00 T r300_ring_start +ffffffff81c5e910 T r300_mc_wait_for_idle +ffffffff81c5e9b0 T r300_asic_reset +ffffffff81c5ebd0 T r300_mc_init +ffffffff81c5ec80 T rv370_set_pcie_lanes +ffffffff81c5ee40 T rv370_get_pcie_lanes +ffffffff81c5eef0 T r300_cs_parse +ffffffff81c5f260 t r300_packet0_check +ffffffff81c600c0 T r300_set_reg_safe +ffffffff81c60100 T r300_mc_program +ffffffff81c60280 T r300_clock_startup +ffffffff81c60310 T r300_resume +ffffffff81c604e0 t r300_startup +ffffffff81c60840 T r300_suspend +ffffffff81c608c0 T r300_fini +ffffffff81c609a0 T r300_init +ffffffff81c61000 T r420_pm_init_profile +ffffffff81c610f0 T r420_pipes_init +ffffffff81c612d0 T r420_mc_rreg +ffffffff81c61350 T r420_mc_wreg +ffffffff81c613c0 T r420_resume +ffffffff81c615a0 t r420_startup +ffffffff81c61940 T r420_suspend +ffffffff81c61ae0 T r420_fini +ffffffff81c61bc0 T r420_init +ffffffff81c61e40 T r420_debugfs_pipes_info_init +ffffffff81c62000 T r520_mc_wait_for_idle +ffffffff81c620a0 T r520_resume +ffffffff81c621a0 t r520_startup +ffffffff81c62590 T r520_init +ffffffff81c63000 T r600_rcu_rreg +ffffffff81c63080 T r600_rcu_wreg +ffffffff81c630f0 T r600_uvd_ctx_rreg +ffffffff81c63170 T r600_uvd_ctx_wreg +ffffffff81c631e0 T r600_get_allowed_info_register +ffffffff81c63260 T r600_get_xclk +ffffffff81c63290 T r600_set_uvd_clocks +ffffffff81c637f0 T dce3_program_fmt +ffffffff81c63910 T rv6xx_get_temp +ffffffff81c63960 T r600_pm_get_dynpm_state +ffffffff81c63d60 T rs780_pm_init_profile +ffffffff81c63e70 T r600_pm_init_profile +ffffffff81c64110 T r600_pm_misc +ffffffff81c641f0 T r600_gui_idle +ffffffff81c64230 T r600_hpd_sense +ffffffff81c64350 T r600_hpd_set_polarity +ffffffff81c645c0 T r600_hpd_init +ffffffff81c647d0 T r600_hpd_fini +ffffffff81c64980 T r600_pcie_gart_tlb_flush +ffffffff81c64ac0 T r600_pcie_gart_init +ffffffff81c64b60 T r600_mc_wait_for_idle +ffffffff81c64c00 T rs780_mc_rreg +ffffffff81c64ca0 T rs780_mc_wreg +ffffffff81c64d30 T r600_vram_scratch_init +ffffffff81c64e30 t radeon_bo_reserve +ffffffff81c64fb0 t radeon_bo_unreserve +ffffffff81c65090 T r600_vram_scratch_fini +ffffffff81c65110 T r600_set_bios_scratch_engine_hung +ffffffff81c65160 T r600_gpu_check_soft_reset +ffffffff81c654e0 T r600_asic_reset +ffffffff81c65870 t r600_gpu_pci_config_reset +ffffffff81c65a90 T r600_gfx_is_lockup +ffffffff81c65b00 T r6xx_remap_render_backend +ffffffff81c65cf0 T r600_count_pipe_bits +ffffffff81c65d60 T r600_pciep_rreg +ffffffff81c65de0 T r600_pciep_wreg +ffffffff81c65e50 T r600_cp_stop +ffffffff81c65ed0 T r600_init_microcode +ffffffff81c663a0 T r600_gfx_get_rptr +ffffffff81c66400 T r600_gfx_get_wptr +ffffffff81c66440 T r600_gfx_set_wptr +ffffffff81c66480 T r600_cp_start +ffffffff81c66800 T r600_cp_resume +ffffffff81c66b60 T r600_ring_init +ffffffff81c66c00 T r600_cp_fini +ffffffff81c66c90 T r600_scratch_init +ffffffff81c66d00 T r600_ring_test +ffffffff81c66fb0 T r600_fence_ring_emit +ffffffff81c67870 T r600_semaphore_ring_emit +ffffffff81c67a60 T r600_copy_cpdma +ffffffff81c68020 T r600_set_surface_reg +ffffffff81c68050 T r600_clear_surface_reg +ffffffff81c68080 T r600_vga_set_state +ffffffff81c680e0 T r600_resume +ffffffff81c68170 t r600_startup +ffffffff81c6a180 T r600_suspend +ffffffff81c6a2f0 T r600_irq_suspend +ffffffff81c6a3b0 t r600_pcie_gart_disable +ffffffff81c6a5b0 T r600_init +ffffffff81c6ada0 T r600_ih_ring_init +ffffffff81c6ae10 T r600_irq_fini +ffffffff81c6af50 T r600_fini +ffffffff81c6b0e0 T r600_ring_ib_execute +ffffffff81c6b560 T r600_ib_test +ffffffff81c6b810 T r600_ih_ring_alloc +ffffffff81c6b930 T r600_ih_ring_fini +ffffffff81c6b9c0 T r600_rlc_stop +ffffffff81c6bb50 T r600_disable_interrupts +ffffffff81c6bc00 T r600_irq_init +ffffffff81c6c070 t r600_disable_interrupt_state +ffffffff81c6c360 T r600_irq_disable +ffffffff81c6c420 T r600_irq_set +ffffffff81c6cba0 t r600_irq_ack +ffffffff81c6d090 T r600_irq_process +ffffffff81c6dc90 T r600_mmio_hdp_flush +ffffffff81c6dd10 T r600_set_pcie_lanes +ffffffff81c6de40 T r600_get_pcie_lanes +ffffffff81c6df20 T r600_get_gpu_clock_counter +ffffffff81c6e000 T r600_fmt_is_valid_color +ffffffff81c6e040 T r600_fmt_is_valid_texture +ffffffff81c6e090 T r600_fmt_get_blocksize +ffffffff81c6e0d0 T r600_fmt_get_nblocksx +ffffffff81c6e130 T r600_fmt_get_nblocksy +ffffffff81c6e190 T r600_cs_common_vline_parse +ffffffff81c6e460 T r600_mip_minify +ffffffff81c6e4c0 T r600_cs_parse +ffffffff81c70450 T r600_dma_cs_next_reloc +ffffffff81c704d0 T r600_dma_cs_parse +ffffffff81c70c00 t r600_cs_track_check +ffffffff81c71d40 t r600_cs_check_reg +ffffffff81c73000 T r600_dma_get_rptr +ffffffff81c73060 T r600_dma_get_wptr +ffffffff81c730a0 T r600_dma_set_wptr +ffffffff81c730e0 T r600_dma_stop +ffffffff81c73170 T r600_dma_resume +ffffffff81c73380 T r600_dma_fini +ffffffff81c73400 T r600_dma_is_lockup +ffffffff81c73470 T r600_dma_ring_test +ffffffff81c736d0 T r600_dma_fence_ring_emit +ffffffff81c738c0 T r600_dma_semaphore_ring_emit +ffffffff81c739e0 T r600_dma_ib_test +ffffffff81c73bf0 T r600_dma_ring_ib_execute +ffffffff81c73f30 T r600_copy_dma +ffffffff81c75000 T r600_dpm_print_class_info +ffffffff81c752b0 T r600_dpm_print_cap_info +ffffffff81c75340 T r600_dpm_print_ps_status +ffffffff81c753d0 T r600_dpm_get_vblank_time +ffffffff81c75490 T r600_dpm_get_vrefresh +ffffffff81c75520 T r600_calculate_u_and_p +ffffffff81c755a0 T r600_calculate_at +ffffffff81c75650 T r600_gfx_clockgating_enable +ffffffff81c75760 T r600_dynamicpm_enable +ffffffff81c757c0 T r600_enable_thermal_protection +ffffffff81c75820 T r600_enable_acpi_pm +ffffffff81c75870 T r600_enable_dynamic_pcie_gen2 +ffffffff81c758d0 T r600_dynamicpm_enabled +ffffffff81c75910 T r600_enable_sclk_control +ffffffff81c75970 T r600_enable_mclk_control +ffffffff81c759d0 T r600_enable_spll_bypass +ffffffff81c75a30 T r600_wait_for_spll_change +ffffffff81c75ab0 T r600_set_bsp +ffffffff81c75af0 T r600_set_at +ffffffff81c75b50 T r600_set_tc +ffffffff81c75bb0 T r600_select_td +ffffffff81c75c70 T r600_set_vrc +ffffffff81c75cb0 T r600_set_tpu +ffffffff81c75d10 T r600_set_tpc +ffffffff81c75d70 T r600_set_sstu +ffffffff81c75dd0 T r600_set_sst +ffffffff81c75e20 T r600_set_git +ffffffff81c75e70 T r600_set_fctu +ffffffff81c75ed0 T r600_set_fct +ffffffff81c75f20 T r600_set_ctxcgtt3d_rphc +ffffffff81c75f80 T r600_set_ctxcgtt3d_rsdc +ffffffff81c75fe0 T r600_set_vddc3d_oorsu +ffffffff81c76040 T r600_set_vddc3d_oorphc +ffffffff81c760a0 T r600_set_vddc3d_oorsdc +ffffffff81c76100 T r600_set_mpll_lock_time +ffffffff81c76150 T r600_set_mpll_reset_time +ffffffff81c761a0 T r600_engine_clock_entry_enable +ffffffff81c762a0 T r600_engine_clock_entry_enable_pulse_skipping +ffffffff81c763a0 T r600_engine_clock_entry_enable_post_divider +ffffffff81c764a0 T r600_engine_clock_entry_set_post_divider +ffffffff81c76560 T r600_engine_clock_entry_set_reference_divider +ffffffff81c76620 T r600_engine_clock_entry_set_feedback_divider +ffffffff81c766e0 T r600_engine_clock_entry_set_step_time +ffffffff81c767a0 T r600_vid_rt_set_ssu +ffffffff81c76800 T r600_vid_rt_set_vru +ffffffff81c76860 T r600_vid_rt_set_vrt +ffffffff81c768c0 T r600_voltage_control_enable_pins +ffffffff81c76910 T r600_voltage_control_program_voltages +ffffffff81c769a0 T r600_voltage_control_deactivate_static_control +ffffffff81c76a30 T r600_power_level_enable +ffffffff81c76aa0 T r600_power_level_set_voltage_index +ffffffff81c76b10 T r600_power_level_set_mem_clock_index +ffffffff81c76b70 T r600_power_level_set_eng_clock_index +ffffffff81c76be0 T r600_power_level_set_watermark_id +ffffffff81c76c50 T r600_power_level_set_pcie_gen2 +ffffffff81c76cb0 T r600_power_level_get_current_index +ffffffff81c76cf0 T r600_power_level_get_target_index +ffffffff81c76d30 T r600_power_level_set_enter_index +ffffffff81c76d90 T r600_wait_for_power_level_unequal +ffffffff81c76e80 T r600_wait_for_power_level +ffffffff81c76f70 T r600_start_dpm +ffffffff81c77250 T r600_stop_dpm +ffffffff81c772a0 T r600_dpm_pre_set_power_state +ffffffff81c772d0 T r600_dpm_post_set_power_state +ffffffff81c77300 T r600_is_uvd_state +ffffffff81c77340 T r600_is_internal_thermal_sensor +ffffffff81c77380 T r600_dpm_late_enable +ffffffff81c77490 T r600_get_platform_caps +ffffffff81c77530 T r600_parse_extended_power_table +ffffffff81c784a0 T r600_free_extended_power_table +ffffffff81c785a0 T r600_get_pcie_gen_support +ffffffff81c785f0 T r600_get_pcie_lane_support +ffffffff81c78650 T r600_encode_pci_lane_width +ffffffff81c79000 T r600_audio_update_hdmi +ffffffff81c79180 t r600_audio_status +ffffffff81c792a0 T r600_hdmi_buffer_status_changed +ffffffff81c79340 T r600_hdmi_update_audio_settings +ffffffff81c79710 T r600_audio_enable +ffffffff81c79790 T r600_audio_get_pin +ffffffff81c797c0 T r600_hdmi_update_acr +ffffffff81c79b60 T r600_set_avi_packet +ffffffff81c79d60 T r600_hdmi_audio_workaround +ffffffff81c79e30 T r600_hdmi_audio_set_dto +ffffffff81c79ef0 T r600_set_vbi_packet +ffffffff81c79fb0 T r600_set_audio_packet +ffffffff81c7a280 T r600_set_mute +ffffffff81c7a390 T r600_hdmi_enable +ffffffff81c7b000 T radeon_acpi_is_pcie_performance_request_supported +ffffffff81c7b050 T radeon_acpi_pcie_notify_device_ready +ffffffff81c7b180 T radeon_acpi_pcie_performance_request +ffffffff81c7b3a0 T radeon_acpi_init +ffffffff81c7baf0 t radeon_acpi_event +ffffffff81c7be40 T radeon_acpi_fini +ffffffff81c7c000 T radeon_agp_head_init +ffffffff81c7c050 T radeon_agp_init +ffffffff81c7c0a0 T radeon_agp_resume +ffffffff81c7c140 T radeon_agp_fini +ffffffff81c7c190 T radeon_agp_suspend +ffffffff81c7d000 T radeon_agp_disable +ffffffff81c7d120 T radeon_asic_init +ffffffff81c7d9b0 t radeon_invalid_rreg +ffffffff81c7d9f0 t radeon_invalid_wreg +ffffffff81c7da30 t radeon_invalid_get_allowed_info_register +ffffffff81c7e000 T radeon_atombios_i2c_init +ffffffff81c7e3b0 T radeon_atombios_lookup_gpio +ffffffff81c7e4b0 T radeon_get_atom_connector_info_from_object_table +ffffffff81c7ee10 t radeon_lookup_i2c_gpio +ffffffff81c7f110 t radeon_atom_apply_quirks +ffffffff81c7f540 T radeon_get_atom_connector_info_from_supported_devices_table +ffffffff81c7fa40 T radeon_atom_get_clock_info +ffffffff81c7fdc0 T radeon_atombios_sideport_present +ffffffff81c7fe70 T radeon_atombios_get_tmds_info +ffffffff81c7ffb0 T radeon_atombios_get_ppll_ss_info +ffffffff81c800d0 T radeon_atombios_get_asic_ss_info +ffffffff81c80440 T radeon_atombios_get_lvds_info +ffffffff81c807b0 T radeon_atombios_get_primary_dac_info +ffffffff81c80860 T radeon_atom_get_tv_timings +ffffffff81c80ab0 T radeon_atombios_get_tv_info +ffffffff81c80b60 T radeon_atombios_get_tv_dac_info +ffffffff81c80c60 T radeon_atombios_get_default_voltages +ffffffff81c80d20 T radeon_atombios_get_power_modes +ffffffff81c81df0 T radeon_atom_get_clock_dividers +ffffffff81c820f0 T radeon_atom_get_memory_pll_dividers +ffffffff81c82230 T radeon_atom_set_clock_gating +ffffffff81c82280 T radeon_atom_get_engine_clock +ffffffff81c822d0 T radeon_atom_get_memory_clock +ffffffff81c82320 T radeon_atom_set_engine_clock +ffffffff81c82370 T radeon_atom_set_memory_clock +ffffffff81c823d0 T radeon_atom_set_engine_dram_timings +ffffffff81c82440 T radeon_atom_update_memory_dll +ffffffff81c82490 T radeon_atom_set_ac_timing +ffffffff81c824e0 T radeon_atom_set_voltage +ffffffff81c825b0 T radeon_atom_get_max_vddc +ffffffff81c82690 T radeon_atom_get_leakage_vddc_based_on_leakage_idx +ffffffff81c82760 T radeon_atom_get_leakage_id_from_vbios +ffffffff81c82820 T radeon_atom_get_leakage_vddc_based_on_leakage_params +ffffffff81c82a30 T radeon_atom_get_voltage_evv +ffffffff81c82ae0 T radeon_atom_get_voltage_gpio_settings +ffffffff81c82be0 T radeon_atom_is_voltage_gpio +ffffffff81c82d70 T radeon_atom_get_svi2_info +ffffffff81c82e60 T radeon_atom_get_max_voltage +ffffffff81c83000 T radeon_atom_get_min_voltage +ffffffff81c83140 T radeon_atom_get_voltage_step +ffffffff81c83240 T radeon_atom_round_to_true_voltage +ffffffff81c833b0 T radeon_atom_get_voltage_table +ffffffff81c83620 T radeon_atom_get_memory_info +ffffffff81c837d0 T radeon_atom_get_mclk_range_table +ffffffff81c83a20 T radeon_atom_init_mc_reg_table +ffffffff81c83ca0 T radeon_atom_initialize_bios_scratch_regs +ffffffff81c83d70 T radeon_save_bios_scratch_regs +ffffffff81c83e50 T radeon_restore_bios_scratch_regs +ffffffff81c83f30 T radeon_atom_output_lock +ffffffff81c83fc0 T radeon_atombios_connected_scratch_regs +ffffffff81c84740 T radeon_atombios_encoder_crtc_scratch_regs +ffffffff81c84880 T radeon_atombios_encoder_dpms_scratch_regs +ffffffff81c84aa0 t radeon_atombios_parse_misc_flags_1_3 +ffffffff81c84c90 t radeon_atombios_add_pplib_thermal_controller +ffffffff81c85090 t radeon_atombios_parse_pplib_clock_info +ffffffff81c853a0 t radeon_atombios_parse_pplib_non_clock_info +ffffffff81c86000 T radeon_audio_init +ffffffff81c86290 T radeon_audio_endpoint_rreg +ffffffff81c862d0 T radeon_audio_endpoint_wreg +ffffffff81c86310 T radeon_audio_get_pin +ffffffff81c86360 T radeon_audio_detect +ffffffff81c86690 T radeon_audio_fini +ffffffff81c867d0 T radeon_audio_mode_set +ffffffff81c86820 T radeon_audio_dpms +ffffffff81c86870 T radeon_audio_decode_dfs_div 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combios_parse_pll_table +ffffffff81c94e40 T radeon_combios_initialize_bios_scratch_regs +ffffffff81c94ed0 T radeon_combios_output_lock +ffffffff81c94f30 T radeon_combios_connected_scratch_regs +ffffffff81c95290 T radeon_combios_encoder_crtc_scratch_regs +ffffffff81c95370 T radeon_combios_encoder_dpms_scratch_regs +ffffffff81c96000 T radeon_connector_hotplug +ffffffff81c96100 T radeon_get_monitor_bpc +ffffffff81c96530 T radeon_connector_edid +ffffffff81c965e0 T radeon_connector_encoder_get_dp_bridge_encoder_id +ffffffff81c96660 T radeon_connector_is_dp12_capable +ffffffff81c96700 T radeon_add_atom_connector +ffffffff81c97550 T radeon_add_legacy_connector +ffffffff81c97a90 t radeon_dp_detect +ffffffff81c97e50 t radeon_dvi_force +ffffffff81c97ea0 t radeon_connector_set_property +ffffffff81c986e0 t radeon_connector_unregister +ffffffff81c98740 t radeon_connector_destroy +ffffffff81c987b0 t radeon_best_single_encoder +ffffffff81c98830 t radeon_connector_get_edid +ffffffff81c98990 t radeon_dp_get_modes +ffffffff81c98cc0 t radeon_dp_mode_valid +ffffffff81c98e90 t radeon_dvi_encoder +ffffffff81c98f70 t radeon_fixup_lvds_native_mode +ffffffff81c990a0 t radeon_add_common_modes +ffffffff81c99190 t radeon_fp_native_mode +ffffffff81c99260 t radeon_lvds_set_property +ffffffff81c99350 t radeon_vga_detect +ffffffff81c99600 t radeon_connector_analog_encoder_conflict_solve +ffffffff81c99820 t radeon_vga_get_modes +ffffffff81c99910 t radeon_vga_mode_valid +ffffffff81c99970 t radeon_dvi_detect +ffffffff81c9a010 t radeon_dvi_mode_valid +ffffffff81c9a1a0 t radeon_tv_detect +ffffffff81c9a3e0 t radeon_tv_get_modes +ffffffff81c9a4b0 t radeon_tv_mode_valid +ffffffff81c9a500 t radeon_lvds_detect +ffffffff81c9a6a0 t radeon_lvds_get_modes +ffffffff81c9a810 t radeon_lvds_mode_valid +ffffffff81c9b000 T radeon_cs_parser_init +ffffffff81c9b480 T radeon_cs_ioctl +ffffffff81c9bfb0 t radeon_cs_parser_fini +ffffffff81c9c140 T radeon_cs_packet_parse +ffffffff81c9c2f0 T radeon_cs_packet_next_is_pkt3_nop +ffffffff81c9c350 T radeon_cs_dump_packet +ffffffff81c9c3d0 T radeon_cs_packet_next_reloc +ffffffff81c9c5a0 t cmp_size_smaller_first +ffffffff81c9d000 T radeon_crtc_cursor_move +ffffffff81c9d070 t radeon_lock_cursor +ffffffff81c9d230 t radeon_cursor_move_locked +ffffffff81c9d780 T radeon_crtc_cursor_set2 +ffffffff81c9da00 t radeon_hide_cursor +ffffffff81c9dac0 t radeon_bo_reserve +ffffffff81c9dc40 t radeon_bo_unreserve +ffffffff81c9dd20 t radeon_show_cursor +ffffffff81c9df70 T radeon_cursor_reset +ffffffff81c9e000 T radeon_is_px +ffffffff81c9e040 T radeon_program_register_sequence +ffffffff81c9e170 T radeon_pci_config_reset +ffffffff81c9e1a0 T radeon_surface_init +ffffffff81c9e360 T radeon_scratch_init +ffffffff81c9e3e0 T radeon_scratch_get +ffffffff81c9e460 T radeon_scratch_free +ffffffff81c9e4c0 T radeon_doorbell_get +ffffffff81c9e570 T radeon_doorbell_free +ffffffff81c9e5c0 T radeon_wb_disable +ffffffff81c9e5f0 T radeon_wb_fini +ffffffff81c9e690 t radeon_bo_reserve +ffffffff81c9e810 t radeon_bo_unreserve +ffffffff81c9e8f0 T radeon_wb_init +ffffffff81c9ebe0 T radeon_vram_location +ffffffff81c9ed10 T radeon_gtt_location +ffffffff81c9ee40 T radeon_device_is_virtual +ffffffff81c9ee70 T radeon_card_posted +ffffffff81c9f090 T radeon_update_bandwidth_info +ffffffff81c9f110 T radeon_boot_test_post_card +ffffffff81c9f1d0 T radeon_dummy_page_init +ffffffff81c9f290 T radeon_dummy_page_fini +ffffffff81c9f2f0 T radeon_atombios_init +ffffffff81c9f480 t cail_reg_read +ffffffff81c9f4e0 t cail_reg_write +ffffffff81c9f540 t cail_ioreg_read +ffffffff81c9f560 t cail_ioreg_write +ffffffff81c9f580 t cail_mc_read +ffffffff81c9f5b0 t cail_mc_write +ffffffff81c9f5e0 t cail_pll_read +ffffffff81c9f610 t cail_pll_write +ffffffff81c9f640 T radeon_atombios_fini +ffffffff81c9f6e0 T radeon_combios_init +ffffffff81c9f720 T radeon_combios_fini +ffffffff81c9f750 T radeon_device_init +ffffffff81ca0230 T radeon_device_fini +ffffffff81ca0330 T radeon_suspend_kms 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radeon_bo_unreserve +ffffffff81ca5000 T radeon_dp_aux_transfer_native +ffffffff81ca6000 T radeondrm_probe +ffffffff81ca6060 T radeondrm_attach_kms +ffffffff81ca67a0 T radeondrm_detach_kms +ffffffff81ca6830 T radeondrm_activate_kms +ffffffff81ca68f0 T radeondrm_wsioctl +ffffffff81ca69a0 T radeondrm_wsmmap +ffffffff81ca69d0 T radeondrm_alloc_screen +ffffffff81ca6a00 T radeondrm_free_screen +ffffffff81ca6a10 T radeondrm_show_screen +ffffffff81ca6af0 T radeondrm_enter_ddb +ffffffff81ca6b50 T radeondrm_doswitch +ffffffff81ca6be0 T radeondrm_setpal +ffffffff81ca6de0 T radeondrm_attachhook +ffffffff81ca7110 T radeondrm_forcedetach +ffffffff81ca8000 T radeon_setup_encoder_clones +ffffffff81ca80b0 T radeon_get_encoder_enum +ffffffff81ca8230 T radeon_link_encoder_connector +ffffffff81ca8370 T radeon_encoder_set_active_device +ffffffff81ca8430 T radeon_get_connector_for_encoder +ffffffff81ca84b0 T radeon_get_connector_for_encoder_init +ffffffff81ca8530 T radeon_get_external_encoder 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radeon_fence_wait_empty +ffffffff81caadf0 T radeon_fence_ref +ffffffff81caae30 T radeon_fence_unref +ffffffff81caae70 T radeon_fence_count_emitted +ffffffff81caaef0 T radeon_fence_need_sync +ffffffff81caaf50 T radeon_fence_note_sync +ffffffff81cab120 T radeon_fence_driver_start_ring +ffffffff81cab310 T radeon_fence_driver_init +ffffffff81cab450 T radeon_debugfs_fence_init +ffffffff81cab480 T radeon_fence_driver_fini +ffffffff81cab6d0 T radeon_fence_driver_force_completion +ffffffff81cab7d0 t radeon_fence_get_driver_name +ffffffff81cab800 t radeon_fence_get_timeline_name +ffffffff81cab8a0 t radeon_fence_enable_signaling +ffffffff81cabac0 t radeon_fence_is_signaled +ffffffff81cabb80 t radeon_fence_default_wait +ffffffff81cabd30 t radeon_fence_any_seq_signaled +ffffffff81cabf30 t radeon_fence_check_lockup +ffffffff81cac180 t __delayed_work_tick +ffffffff81cac1a0 t radeon_fence_check_signaled +ffffffff81cac230 t radeon_fence_wait_cb +ffffffff81cad000 T radeon_gart_table_ram_alloc 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radeon_gem_pwrite_ioctl +ffffffff81cae760 T radeon_gem_create_ioctl +ffffffff81cae880 T radeon_gem_userptr_ioctl +ffffffff81cae8b0 T radeon_gem_set_domain_ioctl +ffffffff81caea10 T radeon_mode_dumb_mmap +ffffffff81caeac0 T radeon_gem_mmap_ioctl +ffffffff81caeb80 T radeon_gem_busy_ioctl +ffffffff81caec30 T radeon_gem_wait_idle_ioctl +ffffffff81caed40 T radeon_gem_set_tiling_ioctl +ffffffff81caedf0 T radeon_gem_get_tiling_ioctl +ffffffff81caeec0 t radeon_bo_reserve +ffffffff81caf0d0 t radeon_bo_unreserve +ffffffff81caf1b0 T radeon_gem_va_ioctl +ffffffff81caf580 T radeon_gem_op_ioctl +ffffffff81caf680 T radeon_mode_dumb_create +ffffffff81caf780 T radeon_gem_debugfs_init +ffffffff81cb0000 T radeon_ddc_probe +ffffffff81cb00c0 T radeon_router_select_ddc_port +ffffffff81cb0320 T radeon_bb_set_bits +ffffffff81cb0490 T radeon_bb_set_dir +ffffffff81cb04c0 T radeon_bb_read_bits +ffffffff81cb05a0 T radeon_acquire_bus +ffffffff81cb09f0 T radeon_release_bus +ffffffff81cb0b60 T radeon_send_start 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radeon_irq_kms_init +ffffffff81cb43e0 t radeon_hotplug_work_func +ffffffff81cb4490 t radeon_dp_work_func +ffffffff81cb44c0 T radeon_irq_kms_fini +ffffffff81cb4660 T radeon_irq_kms_sw_irq_get +ffffffff81cb4700 T radeon_irq_kms_sw_irq_get_delayed +ffffffff81cb4740 T radeon_irq_kms_sw_irq_put +ffffffff81cb47d0 T radeon_irq_kms_pflip_irq_get +ffffffff81cb4880 T radeon_irq_kms_pflip_irq_put +ffffffff81cb4920 T radeon_irq_kms_enable_afmt +ffffffff81cb49b0 T radeon_irq_kms_disable_afmt +ffffffff81cb4a40 T radeon_irq_kms_enable_hpd +ffffffff81cb4b30 T radeon_irq_kms_disable_hpd +ffffffff81cb4c10 T radeon_irq_kms_set_irq_n_enabled +ffffffff81cb4d80 t __delayed_work_tick +ffffffff81cb5000 T radeon_info_ioctl +ffffffff81cb5bf0 T radeon_driver_lastclose_kms +ffffffff81cb5c00 T radeon_driver_open_kms +ffffffff81cb5d30 t radeon_bo_reserve +ffffffff81cb5eb0 T radeon_driver_postclose_kms +ffffffff81cb60d0 T radeon_get_vblank_counter_kms +ffffffff81cb6270 T radeon_enable_vblank_kms +ffffffff81cb6320 T radeon_disable_vblank_kms +ffffffff81cb7000 T radeon_crtc_set_base +ffffffff81cb7020 T radeon_crtc_do_set_base +ffffffff81cb75c0 T radeon_crtc_set_base_atomic +ffffffff81cb75e0 t radeon_bo_reserve +ffffffff81cb7760 t radeon_bo_unreserve +ffffffff81cb7840 T radeon_legacy_init_crtc +ffffffff81cb7890 t radeon_crtc_dpms +ffffffff81cb7a90 t radeon_crtc_prepare +ffffffff81cb7b10 t radeon_crtc_commit +ffffffff81cb7b80 t radeon_crtc_mode_fixup +ffffffff81cb7ba0 t radeon_crtc_mode_set +ffffffff81cb8ff0 t radeon_crtc_disable +ffffffff81cba000 T radeon_legacy_get_backlight_level +ffffffff81cba040 T radeon_legacy_set_backlight_level +ffffffff81cba080 t radeon_legacy_lvds_update +ffffffff81cba3e0 T radeon_legacy_backlight_init +ffffffff81cba5b0 t radeon_legacy_backlight_get_brightness +ffffffff81cba610 T radeon_add_legacy_encoder +ffffffff81cba990 t radeon_legacy_backlight_update_status +ffffffff81cbaa20 t radeon_lvds_enc_destroy +ffffffff81cbaab0 t radeon_legacy_lvds_dpms +ffffffff81cbab00 t radeon_legacy_mode_fixup +ffffffff81cbab70 t radeon_legacy_lvds_prepare +ffffffff81cbac00 t radeon_legacy_lvds_commit +ffffffff81cbac80 t radeon_legacy_lvds_mode_set +ffffffff81cbae90 t radeon_legacy_encoder_disable +ffffffff81cbaee0 t radeon_legacy_tmds_int_dpms +ffffffff81cbafa0 t radeon_legacy_tmds_int_prepare +ffffffff81cbb070 t radeon_legacy_tmds_int_commit +ffffffff81cbb140 t radeon_legacy_tmds_int_mode_set +ffffffff81cbb3b0 t radeon_legacy_primary_dac_dpms +ffffffff81cbb4f0 t radeon_legacy_primary_dac_prepare +ffffffff81cbb550 t radeon_legacy_primary_dac_commit +ffffffff81cbb5a0 t radeon_legacy_primary_dac_mode_set +ffffffff81cbb750 t radeon_legacy_primary_dac_detect +ffffffff81cbb940 t radeon_legacy_tv_dac_dpms +ffffffff81cbbb40 t radeon_legacy_tv_dac_prepare +ffffffff81cbbba0 t radeon_legacy_tv_dac_commit +ffffffff81cbbbf0 t radeon_legacy_tv_dac_mode_set +ffffffff81cbbf90 t radeon_legacy_tv_dac_detect +ffffffff81cbcbc0 t radeon_ext_tmds_enc_destroy +ffffffff81cbcc10 t radeon_legacy_tmds_ext_dpms +ffffffff81cbcce0 t radeon_legacy_tmds_ext_prepare +ffffffff81cbcdb0 t radeon_legacy_tmds_ext_commit +ffffffff81cbce80 t radeon_legacy_tmds_ext_mode_set +ffffffff81cbe000 T radeon_legacy_tv_mode_set +ffffffff81cbf0b0 T radeon_legacy_tv_adjust_crtc_reg +ffffffff81cbf1c0 T radeon_legacy_tv_adjust_pll1 +ffffffff81cbf2b0 T radeon_legacy_tv_adjust_pll2 +ffffffff81cc0000 T radeon_ttm_bo_is_radeon_bo +ffffffff81cc0040 t radeon_ttm_bo_destroy +ffffffff81cc0170 T radeon_ttm_placement_from_domain +ffffffff81cc02e0 T radeon_bo_create +ffffffff81cc04a0 T radeon_bo_kmap +ffffffff81cc0580 T radeon_bo_check_tiling +ffffffff81cc0660 T radeon_bo_kunmap +ffffffff81cc06f0 T radeon_bo_ref +ffffffff81cc0730 T radeon_bo_unref +ffffffff81cc0780 T radeon_bo_pin_restricted +ffffffff81cc0ab0 T radeon_bo_pin +ffffffff81cc0ad0 T radeon_bo_unpin +ffffffff81cc0b40 T radeon_bo_evict_vram +ffffffff81cc0ba0 T radeon_bo_force_delete +ffffffff81cc0d10 T radeon_bo_init +ffffffff81cc0df0 T radeon_bo_fini +ffffffff81cc0e30 T radeon_bo_list_validate +ffffffff81cc1120 T radeon_bo_get_surface_reg +ffffffff81cc13c0 T radeon_bo_set_tiling_flags +ffffffff81cc16e0 T radeon_bo_get_tiling_flags +ffffffff81cc1730 T radeon_bo_move_notify +ffffffff81cc17f0 T radeon_bo_fault_reserve_notify +ffffffff81cc1af0 T radeon_bo_fence +ffffffff81cc2000 T radeon_pm_get_type_index +ffffffff81cc2080 T radeon_pm_acpi_event_handler +ffffffff81cc2160 t radeon_pm_update_profile +ffffffff81cc2280 t radeon_pm_set_clocks +ffffffff81cc2c20 T radeon_dpm_enable_uvd +ffffffff81cc2ce0 T radeon_pm_compute_clocks +ffffffff81cc3720 T radeon_dpm_enable_vce +ffffffff81cc3790 T radeon_pm_suspend +ffffffff81cc3890 T radeon_pm_resume +ffffffff81cc3b80 T radeon_pm_init +ffffffff81cc4280 T radeon_pm_late_init +ffffffff81cc4340 T radeon_pm_fini +ffffffff81cc4450 t radeon_dpm_thermal_work_handler +ffffffff81cc4530 t radeon_dynpm_idle_work_handler +ffffffff81cc4820 t __delayed_work_tick +ffffffff81cc5000 T radeon_gem_prime_get_sg_table +ffffffff81cc5030 T radeon_gem_prime_pin +ffffffff81cc50c0 t radeon_bo_reserve +ffffffff81cc5240 t radeon_bo_unreserve +ffffffff81cc5320 T radeon_gem_prime_unpin +ffffffff81cc5390 T radeon_gem_prime_export +ffffffff81cc6000 T radeon_ring_supports_scratch_reg +ffffffff81cc6030 T radeon_ring_free_size +ffffffff81cc60e0 T radeon_ring_lockup_update +ffffffff81cc6140 T radeon_ring_alloc +ffffffff81cc62c0 T radeon_ring_lock +ffffffff81cc6340 T radeon_ring_commit +ffffffff81cc6440 T radeon_ring_unlock_commit +ffffffff81cc6470 T radeon_ring_undo +ffffffff81cc64a0 T radeon_ring_unlock_undo +ffffffff81cc64c0 T radeon_ring_test_lockup +ffffffff81cc65e0 T radeon_ring_backup +ffffffff81cc67a0 T radeon_ring_restore +ffffffff81cc6960 T radeon_ring_init +ffffffff81cc6b50 t radeon_bo_reserve +ffffffff81cc6cd0 t radeon_bo_unreserve +ffffffff81cc6db0 T radeon_ring_fini +ffffffff81cc7000 T radeon_sa_bo_manager_init +ffffffff81cc7190 T radeon_sa_bo_manager_fini +ffffffff81cc7380 T radeon_sa_bo_manager_start +ffffffff81cc74c0 t radeon_bo_reserve +ffffffff81cc7640 t radeon_bo_unreserve +ffffffff81cc7720 T radeon_sa_bo_manager_suspend +ffffffff81cc77c0 T radeon_sa_bo_new +ffffffff81cc7ff0 T radeon_sa_bo_free +ffffffff81cc9000 T radeon_semaphore_create +ffffffff81cc90f0 T radeon_semaphore_emit_signal +ffffffff81cc9180 T radeon_semaphore_emit_wait +ffffffff81cc9210 T radeon_semaphore_free +ffffffff81cca000 T radeon_sync_create +ffffffff81cca090 T radeon_sync_fence +ffffffff81cca140 T radeon_sync_resv +ffffffff81cca270 T radeon_sync_rings +ffffffff81cca430 T radeon_sync_free +ffffffff81ccb000 T radeon_test_moves +ffffffff81ccb070 t radeon_do_test_moves +ffffffff81ccb660 T radeon_test_ring_sync +ffffffff81ccb930 t radeon_test_create_and_emit_fence +ffffffff81ccbaa0 T radeon_test_syncing +ffffffff81ccbd60 t radeon_test_ring_sync2 +ffffffff81ccc0d0 t radeon_bo_reserve +ffffffff81ccc250 t radeon_bo_unreserve +ffffffff81ccd000 T radeon_get_rdev +ffffffff81ccd030 T radeon_ttm_tt_set_userptr +ffffffff81ccd080 T radeon_ttm_tt_is_bound +ffffffff81ccd0d0 T radeon_ttm_tt_has_userptr +ffffffff81ccd110 T radeon_ttm_tt_is_readonly +ffffffff81ccd150 T radeon_ttm_init +ffffffff81ccd370 T radeon_ttm_set_active_vram_size +ffffffff81ccd3b0 t radeon_bo_reserve +ffffffff81ccd530 t radeon_bo_unreserve +ffffffff81ccd610 T radeon_ttm_fini +ffffffff81ccd6e0 t radeon_ttm_tt_create +ffffffff81ccd7d0 t radeon_ttm_tt_populate +ffffffff81ccd880 t radeon_ttm_tt_unpopulate +ffffffff81ccd980 t radeon_ttm_tt_destroy +ffffffff81ccd9d0 t radeon_evict_flags +ffffffff81ccdb20 t radeon_bo_move +ffffffff81ccdfa0 t radeon_ttm_io_mem_reserve +ffffffff81ccf000 T radeon_ucode_print_mc_hdr +ffffffff81ccf0b0 t radeon_ucode_print_common_hdr +ffffffff81ccf1e0 T radeon_ucode_print_smc_hdr +ffffffff81ccf270 T radeon_ucode_print_gfx_hdr +ffffffff81ccf340 T radeon_ucode_print_rlc_hdr +ffffffff81ccf440 T radeon_ucode_print_sdma_hdr +ffffffff81ccf520 T radeon_ucode_validate +ffffffff81cd0000 T radeon_uvd_init +ffffffff81cd04f0 t radeon_uvd_idle_work_handler +ffffffff81cd0660 t radeon_bo_reserve +ffffffff81cd0870 t radeon_bo_unreserve +ffffffff81cd0950 T radeon_uvd_fini +ffffffff81cd0a20 T radeon_uvd_suspend +ffffffff81cd0be0 T radeon_uvd_note_usage +ffffffff81cd0e20 T radeon_uvd_get_destroy_msg +ffffffff81cd0f30 T radeon_uvd_resume +ffffffff81cd0fc0 T radeon_uvd_force_into_uvd_segment +ffffffff81cd1060 T radeon_uvd_free_handles +ffffffff81cd1220 T radeon_uvd_cs_parse +ffffffff81cd1940 T radeon_uvd_get_create_msg +ffffffff81cd1ac0 t radeon_uvd_send_msg +ffffffff81cd1c60 T radeon_uvd_calc_upll_dividers +ffffffff81cd1e00 T radeon_uvd_send_upll_ctlreq +ffffffff81cd2140 t __delayed_work_tick +ffffffff81cd3000 T radeon_vce_init +ffffffff81cd3610 t radeon_vce_idle_work_handler +ffffffff81cd36e0 t radeon_bo_reserve +ffffffff81cd3860 t radeon_bo_unreserve +ffffffff81cd3940 T radeon_vce_fini +ffffffff81cd39c0 T radeon_vce_suspend +ffffffff81cd3aa0 T radeon_vce_resume +ffffffff81cd3bf0 T radeon_vce_note_usage +ffffffff81cd3d10 T radeon_vce_free_handles +ffffffff81cd3dd0 T radeon_vce_get_destroy_msg +ffffffff81cd4070 T radeon_vce_get_create_msg +ffffffff81cd4430 T radeon_vce_cs_reloc +ffffffff81cd4530 T radeon_vce_cs_parse +ffffffff81cd4d60 T radeon_vce_semaphore_emit +ffffffff81cd4f30 T radeon_vce_ib_execute +ffffffff81cd50d0 T radeon_vce_fence_emit +ffffffff81cd5310 T radeon_vce_ring_test +ffffffff81cd5460 T radeon_vce_ib_test +ffffffff81cd5580 t __delayed_work_tick +ffffffff81cd6000 T radeon_vm_manager_init +ffffffff81cd6060 T radeon_vm_manager_fini +ffffffff81cd6180 T radeon_vm_get_bos +ffffffff81cd62b0 T radeon_vm_grab_id +ffffffff81cd6440 T radeon_vm_flush +ffffffff81cd65d0 T radeon_vm_fence +ffffffff81cd6680 T radeon_vm_bo_find +ffffffff81cd66e0 T radeon_vm_bo_add +ffffffff81cd67c0 T radeon_vm_bo_set_addr +ffffffff81cd6c20 t radeon_bo_unreserve +ffffffff81cd6d00 t radeon_vm_clear_bo +ffffffff81cd6ef0 T radeon_vm_map_gart +ffffffff81cd6f30 T radeon_vm_update_page_directory +ffffffff81cd72e0 T radeon_vm_bo_update +ffffffff81cd79c0 T radeon_vm_clear_freed +ffffffff81cd7aa0 T radeon_vm_clear_invalids +ffffffff81cd7b40 T radeon_vm_bo_rmv +ffffffff81cd7c30 T radeon_vm_bo_invalidate +ffffffff81cd7ce0 T radeon_vm_init +ffffffff81cd7f40 T radeon_vm_fini +ffffffff81cd8210 t radeon_bo_reserve +ffffffff81cd8390 t radeon_vm_frag_ptes +ffffffff81cd9000 T rs400_gart_adjust_size +ffffffff81cd90c0 T rs400_gart_tlb_flush +ffffffff81cd9140 T rs400_gart_init +ffffffff81cd9240 T rs400_gart_enable +ffffffff81cd95a0 T rs400_gart_disable +ffffffff81cd9600 T rs400_gart_fini +ffffffff81cd9670 T rs400_gart_get_page_entry +ffffffff81cd96d0 T rs400_gart_set_page +ffffffff81cd9710 T rs400_mc_wait_for_idle +ffffffff81cd97b0 T rs400_mc_rreg +ffffffff81cd9840 T rs400_mc_wreg +ffffffff81cd98c0 T rs400_resume +ffffffff81cd99f0 t rs400_mc_program +ffffffff81cd9af0 t rs400_startup +ffffffff81cd9ce0 T rs400_suspend +ffffffff81cd9d80 T rs400_fini +ffffffff81cd9e70 T rs400_init +ffffffff81cdb000 T avivo_wait_for_vblank +ffffffff81cdb280 T rs600_page_flip +ffffffff81cdb540 T rs600_page_flip_pending +ffffffff81cdb5b0 T avivo_program_fmt +ffffffff81cdb6d0 T rs600_pm_misc +ffffffff81cdba10 T rs600_pm_prepare +ffffffff81cdbb10 T rs600_pm_finish +ffffffff81cdbc10 T rs600_hpd_sense +ffffffff81cdbc70 T rs600_hpd_set_polarity +ffffffff81cdbd30 T rs600_hpd_init +ffffffff81cdbe10 T rs600_hpd_fini +ffffffff81cdbeb0 T rs600_asic_reset +ffffffff81cdc120 T rs600_gart_tlb_flush +ffffffff81cdc1e0 T rs600_gart_get_page_entry +ffffffff81cdc240 T rs600_gart_set_page +ffffffff81cdc280 T rs600_irq_set +ffffffff81cdc450 T rs600_irq_disable +ffffffff81cdc4d0 t rs600_irq_ack +ffffffff81cdc680 T rs600_irq_process +ffffffff81cdc9f0 T rs600_get_vblank_counter +ffffffff81cdca40 T rs600_mc_wait_for_idle +ffffffff81cdcae0 T rs600_bandwidth_update +ffffffff81cdcbd0 T rs600_mc_rreg +ffffffff81cdcc50 T rs600_mc_wreg +ffffffff81cdccc0 T rs600_set_safe_registers +ffffffff81cdcd00 T rs600_resume +ffffffff81cdce30 t rs600_startup +ffffffff81cdd670 T rs600_suspend +ffffffff81cdd770 T rs600_fini +ffffffff81cdd870 T rs600_init +ffffffff81cde000 T rs690_mc_wait_for_idle +ffffffff81cde0a0 T rs690_pm_info +ffffffff81cde330 T rs690_line_buffer_adjust +ffffffff81cde430 T rs690_bandwidth_update +ffffffff81cde750 t rs690_crtc_bandwidth_compute +ffffffff81cdeb80 t rs690_compute_mode_priority +ffffffff81cdf000 T rs690_mc_rreg +ffffffff81cdf090 T rs690_mc_wreg +ffffffff81cdf110 T rs690_resume +ffffffff81cdf200 t rs690_startup +ffffffff81cdf4f0 T rs690_suspend +ffffffff81cdf550 T rs690_fini +ffffffff81cdf600 T rs690_init +ffffffff81ce0000 T rs780_dpm_enable +ffffffff81ce0be0 T rs780_dpm_disable +ffffffff81ce0cc0 T rs780_dpm_set_power_state +ffffffff81ce10a0 t rs780_force_voltage +ffffffff81ce11e0 t rs780_enable_voltage_scaling +ffffffff81ce1390 T rs780_dpm_setup_asic +ffffffff81ce13c0 T rs780_dpm_display_configuration_changed +ffffffff81ce1510 T rs780_dpm_init +ffffffff81ce1a80 T rs780_dpm_print_power_state +ffffffff81ce1b10 T rs780_dpm_fini +ffffffff81ce1ba0 T rs780_dpm_get_sclk +ffffffff81ce1be0 T rs780_dpm_get_mclk +ffffffff81ce1c10 T rs780_dpm_debugfs_print_current_performance_level +ffffffff81ce1c40 T rs780_dpm_get_current_sclk +ffffffff81ce1cd0 T rs780_dpm_get_current_mclk +ffffffff81ce1d00 T rs780_dpm_force_performance_level +ffffffff81ce1ef0 t rs780_force_fbdiv +ffffffff81ce3000 T rv515_ring_start +ffffffff81ce3b30 T rv515_mc_wait_for_idle +ffffffff81ce3bd0 T rv515_vga_render_disable +ffffffff81ce3c20 T rv515_mc_rreg +ffffffff81ce3cb0 T rv515_mc_wreg +ffffffff81ce3d30 T rv515_debugfs +ffffffff81ce3d40 T rv515_mc_stop +ffffffff81ce42d0 T rv515_mc_resume +ffffffff81ce48e0 T rv515_clock_startup +ffffffff81ce49b0 T rv515_resume +ffffffff81ce4bf0 t rv515_startup +ffffffff81ce50d0 T rv515_suspend +ffffffff81ce5140 T rv515_set_safe_registers +ffffffff81ce5180 T rv515_fini +ffffffff81ce5230 T rv515_init +ffffffff81ce5520 T atom_rv515_force_tv_scaler +ffffffff81ce8bc0 T rv515_bandwidth_avivo_update +ffffffff81ce8d60 t rv515_crtc_bandwidth_compute +ffffffff81ce90a0 t rv515_compute_mode_priority +ffffffff81ce9550 T rv515_bandwidth_update +ffffffff81cea000 T rv6xx_dpm_enable +ffffffff81cea7f0 t rv6xx_calculate_stepping_parameters +ffffffff81cea9c0 t rv6xx_program_stepping_parameters_except_lowest_entry +ffffffff81ceafb0 t rv6xx_program_stepping_parameters_lowest_entry +ffffffff81ceb090 T rv6xx_dpm_disable +ffffffff81ceb410 T rv6xx_dpm_set_power_state +ffffffff81cebe10 T rv6xx_setup_asic +ffffffff81cebf50 T rv6xx_dpm_display_configuration_changed +ffffffff81cebfd0 T rv6xx_dpm_init +ffffffff81cec520 T rv6xx_dpm_print_power_state +ffffffff81cec5e0 T rv6xx_dpm_debugfs_print_current_performance_level +ffffffff81cec610 T rv6xx_dpm_get_current_sclk +ffffffff81cec680 T rv6xx_dpm_get_current_mclk +ffffffff81cec6f0 T rv6xx_dpm_fini +ffffffff81cec780 T rv6xx_dpm_get_sclk +ffffffff81cec7c0 T rv6xx_dpm_get_mclk +ffffffff81cec800 T rv6xx_dpm_force_performance_level +ffffffff81cec990 t rv6xx_generate_steps +ffffffff81cecca0 t rv6xx_output_stepping +ffffffff81cecdc0 t rv6xx_program_mclk_stepping_entry +ffffffff81ced030 t rv6xx_program_engine_spread_spectrum +ffffffff81ced310 t rv6xx_step_sw_voltage +ffffffff81cee000 T rv730_populate_sclk_value +ffffffff81cee240 T rv730_populate_mclk_value +ffffffff81cee460 T rv730_read_clock_registers +ffffffff81cee580 T rv730_populate_smc_acpi_state +ffffffff81cee730 T rv730_populate_smc_initial_state +ffffffff81cee8f0 T rv730_program_memory_timing_parameters +ffffffff81ceead0 T rv730_start_dpm +ffffffff81ceeb60 T rv730_stop_dpm +ffffffff81ceec20 T rv730_program_dcodt +ffffffff81ceecf0 T rv730_get_odt_values +ffffffff81cef000 T rv740_get_decoded_reference_divider +ffffffff81cef0a0 T rv740_get_dll_speed +ffffffff81cef1d0 T rv740_populate_sclk_value +ffffffff81cef3e0 T rv740_populate_mclk_value +ffffffff81cef820 T rv740_read_clock_registers +ffffffff81cef950 T rv740_populate_smc_acpi_state +ffffffff81cefb80 T rv740_enable_mclk_spread_spectrum +ffffffff81cefbe0 T rv740_get_mclk_frequency_ratio +ffffffff81cf0000 T rv770_set_uvd_clocks +ffffffff81cf0570 T rv770_get_xclk +ffffffff81cf05d0 T rv770_page_flip +ffffffff81cf08e0 T rv770_page_flip_pending +ffffffff81cf0950 T rv770_get_temp +ffffffff81cf09b0 T rv770_pm_misc +ffffffff81cf0a90 T r700_cp_stop +ffffffff81cf0b10 T r700_cp_fini +ffffffff81cf0ba0 T rv770_set_clk_bypass_mode +ffffffff81cf0cc0 T r700_vram_gtt_location +ffffffff81cf0e50 T rv770_resume +ffffffff81cf0ee0 t rv770_init_golden_registers +ffffffff81cf1070 t rv770_startup +ffffffff81cf3060 T rv770_suspend +ffffffff81cf3280 T rv770_init +ffffffff81cf3850 T rv770_fini +ffffffff81cf4000 T rv770_copy_dma +ffffffff81cf5000 T rv770_get_ps +ffffffff81cf5030 T rv770_get_pi +ffffffff81cf5060 T evergreen_get_pi +ffffffff81cf5090 T rv770_restore_cgcg +ffffffff81cf5110 T rv770_stop_dpm +ffffffff81cf51d0 T rv770_dpm_enabled +ffffffff81cf5210 T rv770_enable_thermal_protection +ffffffff81cf5270 T rv770_enable_acpi_pm +ffffffff81cf52c0 T rv770_get_seq_value +ffffffff81cf5300 T rv770_write_smc_soft_register +ffffffff81cf5330 T rv770_populate_smc_t +ffffffff81cf54d0 T rv770_populate_smc_sp +ffffffff81cf5530 T rv770_map_clkf_to_ibias +ffffffff81cf5590 T rv770_populate_vddc_value +ffffffff81cf5640 T rv770_populate_mvdd_value +ffffffff81cf5690 T rv770_calculate_memory_refresh_rate +ffffffff81cf5700 T rv770_enable_backbias +ffffffff81cf5760 T rv770_setup_bsp +ffffffff81cf5850 T rv770_program_git +ffffffff81cf58a0 T rv770_program_tp +ffffffff81cf5920 T rv770_program_tpp +ffffffff81cf5960 T rv770_program_sstp +ffffffff81cf59a0 T rv770_program_engine_speed_parameters +ffffffff81cf59f0 T rv770_program_vc +ffffffff81cf5a40 T rv770_clear_vc +ffffffff81cf5a80 T rv770_upload_firmware +ffffffff81cf5ac0 T rv770_populate_initial_mvdd_value +ffffffff81cf5b10 T rv770_get_memory_module_index +ffffffff81cf5b50 T rv770_enable_voltage_control +ffffffff81cf5bb0 T rv770_halt_smc +ffffffff81cf5c10 T rv770_resume_smc +ffffffff81cf5c60 T rv770_set_sw_state +ffffffff81cf5cc0 T rv770_set_boot_state +ffffffff81cf5d10 T rv770_set_uvd_clock_before_set_eng_clock +ffffffff81cf5d80 T rv770_set_uvd_clock_after_set_eng_clock +ffffffff81cf5df0 T rv770_restrict_performance_levels_before_switch +ffffffff81cf5e50 T rv770_dpm_force_performance_level +ffffffff81cf5f10 T r7xx_start_smc +ffffffff81cf5f40 T r7xx_stop_smc +ffffffff81cf5f70 T rv770_read_voltage_smio_registers +ffffffff81cf5fb0 T rv770_reset_smio_status +ffffffff81cf6070 T rv770_get_memory_type +ffffffff81cf60c0 T rv770_get_pcie_gen2_status +ffffffff81cf6130 T rv770_get_max_vddc +ffffffff81cf6190 T rv770_program_response_times +ffffffff81cf62e0 T rv770_enable_auto_throttle_source +ffffffff81cf6460 T rv770_dpm_enable +ffffffff81cf74e0 T rv770_dpm_late_enable +ffffffff81cf7610 T rv770_dpm_disable +ffffffff81cf7970 T rv770_dpm_set_power_state +ffffffff81cf7f70 T rv770_dpm_setup_asic +ffffffff81cf82d0 T rv770_dpm_display_configuration_changed +ffffffff81cf8350 T rv7xx_parse_power_table +ffffffff81cf8890 T rv770_get_engine_memory_ss +ffffffff81cf8920 T rv770_dpm_init +ffffffff81cf8b60 T rv770_dpm_print_power_state +ffffffff81cf8c80 T rv770_dpm_debugfs_print_current_performance_level +ffffffff81cf8cb0 T rv770_dpm_get_current_sclk +ffffffff81cf8d20 T rv770_dpm_get_current_mclk +ffffffff81cf8d90 T rv770_dpm_fini +ffffffff81cf8e20 T rv770_dpm_get_sclk +ffffffff81cf8e60 T rv770_dpm_get_mclk +ffffffff81cf8eb0 T rv770_dpm_vblank_too_short +ffffffff81cf8f20 t rv770_convert_power_level_to_smc +ffffffff81cfa000 T rv770_copy_bytes_to_smc +ffffffff81cfa240 T rv770_start_smc +ffffffff81cfa290 T rv770_reset_smc +ffffffff81cfa2e0 T rv770_stop_smc_clock +ffffffff81cfa330 T rv770_start_smc_clock +ffffffff81cfa380 T rv770_is_smc_running +ffffffff81cfa3c0 T rv770_send_msg_to_smc +ffffffff81cfa4a0 T rv770_wait_for_smc_inactive +ffffffff81cfa540 T rv770_load_smc_ucode +ffffffff81cfa6d0 T rv770_read_smc_sram_dword +ffffffff81cfa790 T rv770_write_smc_sram_dword +ffffffff81cfb000 T si_get_allowed_info_register +ffffffff81cfb090 T si_get_xclk +ffffffff81cfb100 T si_get_temp +ffffffff81cfb150 T si_mc_load_microcode +ffffffff81cfb420 T dce6_bandwidth_update +ffffffff81cfb820 t dce6_program_watermarks +ffffffff81cfc2d0 T si_fence_ring_emit +ffffffff81cfc750 T si_ring_ib_execute +ffffffff81cfcf30 T si_gpu_check_soft_reset +ffffffff81cfd0d0 T si_asic_reset +ffffffff81cfd4f0 t si_gpu_pci_config_reset +ffffffff81cfd8a0 T si_gfx_is_lockup +ffffffff81cfd910 T si_vram_gtt_location +ffffffff81cfd9b0 T si_pcie_gart_tlb_flush +ffffffff81cfda00 T si_ib_parse +ffffffff81cfe0b0 T si_vm_init +ffffffff81cfe0f0 T si_vm_fini +ffffffff81cfe120 T si_vm_flush +ffffffff81cfe800 T si_init_uvd_internal_cg +ffffffff81cfe850 T si_get_csb_size +ffffffff81cfe8e0 T si_get_csb_buffer +ffffffff81cfea70 T si_rlc_reset +ffffffff81cfeaf0 T si_irq_set +ffffffff81cff000 t si_disable_interrupt_state +ffffffff81cff280 T si_irq_process +ffffffff81d00480 t si_irq_ack +ffffffff81d00a80 T si_resume +ffffffff81d00b10 t si_init_golden_registers +ffffffff81d00cd0 t si_startup +ffffffff81d05500 T si_suspend +ffffffff81d05880 T si_init +ffffffff81d06d50 t si_cp_fini +ffffffff81d06e40 t si_pcie_gart_fini +ffffffff81d06f40 T si_fini +ffffffff81d071f0 T si_get_gpu_clock_counter +ffffffff81d072c0 T si_set_uvd_clocks +ffffffff81d07830 T si_set_vce_clocks +ffffffff81d07d70 t si_vce_send_vcepll_ctlreq +ffffffff81d07fb0 t dce6_latency_watermark +ffffffff81d081e0 t si_rlc_stop +ffffffff81d08390 t si_vm_reg_valid +ffffffff81d084f0 t si_vm_packet3_cp_dma_check +ffffffff81d08670 t si_update_cg +ffffffff81d08bc0 t si_enable_mgcg +ffffffff81d08fe0 t si_enable_cgcg +ffffffff81d0a000 T si_dma_is_lockup +ffffffff81d0a080 T si_dma_vm_copy_pages +ffffffff81d0a160 T si_dma_vm_write_pages +ffffffff81d0a2c0 T si_dma_vm_set_pages +ffffffff81d0a420 T si_dma_vm_flush +ffffffff81d0a8b0 T si_copy_dma +ffffffff81d0b000 T si_dpm_force_performance_level +ffffffff81d0b160 T si_get_ddr3_mclk_frequency_ratio +ffffffff81d0b1c0 T si_get_mclk_frequency_ratio +ffffffff81d0b240 T si_trim_voltage_table_to_fit_state_table +ffffffff81d0b340 T si_dpm_setup_asic +ffffffff81d0b510 T si_fan_ctrl_get_fan_speed_percent +ffffffff81d0b5a0 T si_fan_ctrl_set_fan_speed_percent +ffffffff81d0b660 T si_fan_ctrl_set_mode +ffffffff81d0b8b0 T si_fan_ctrl_get_mode +ffffffff81d0b900 T si_dpm_enable +ffffffff81d10c00 t si_populate_smc_tdp_limits +ffffffff81d10e10 T si_dpm_late_enable +ffffffff81d10f60 T si_dpm_disable +ffffffff81d112e0 T si_dpm_pre_set_power_state +ffffffff81d11ee0 T si_dpm_set_power_state +ffffffff81d13460 T si_dpm_post_set_power_state +ffffffff81d13490 T si_dpm_display_configuration_changed +ffffffff81d13570 T si_dpm_init +ffffffff81d15020 T si_dpm_fini +ffffffff81d150d0 T si_dpm_debugfs_print_current_performance_level +ffffffff81d15120 T si_dpm_get_current_sclk +ffffffff81d15190 T si_dpm_get_current_mclk +ffffffff81d15200 t si_get_std_voltage_value +ffffffff81d15330 t si_convert_power_level_to_smc +ffffffff81d15bd0 t si_calculate_sclk_params +ffffffff81d15df0 t si_convert_mc_reg_table_to_smc +ffffffff81d15f50 t si_program_cac_config_registers +ffffffff81d17000 T si_copy_bytes_to_smc +ffffffff81d17250 T si_start_smc +ffffffff81d17290 T si_reset_smc +ffffffff81d172d0 T si_program_jump_on_start +ffffffff81d17300 T si_stop_smc_clock +ffffffff81d17340 T si_start_smc_clock +ffffffff81d17380 T si_is_smc_running +ffffffff81d173e0 T si_send_msg_to_smc +ffffffff81d174b0 T si_wait_for_smc_inactive +ffffffff81d17550 T si_load_smc_ucode +ffffffff81d176f0 T si_read_smc_sram_dword +ffffffff81d177c0 T si_write_smc_sram_dword +ffffffff81d18000 T sumo_get_pi +ffffffff81d18030 T sumo_gfx_clockgating_initialize +ffffffff81d18110 T sumo_program_vc +ffffffff81d18150 T sumo_clear_vc +ffffffff81d18190 T sumo_program_sstp +ffffffff81d18210 T sumo_take_smu_control +ffffffff81d18240 T sumo_get_sleep_divider_from_id +ffffffff81d18270 T sumo_get_sleep_divider_id_from_clock +ffffffff81d18320 T sumo_dpm_enable +ffffffff81d189c0 T sumo_dpm_late_enable +ffffffff81d18f80 T sumo_dpm_disable +ffffffff81d192d0 T sumo_dpm_pre_set_power_state +ffffffff81d19790 T sumo_dpm_set_power_state +ffffffff81d1a2d0 T sumo_dpm_post_set_power_state +ffffffff81d1a370 T sumo_dpm_setup_asic +ffffffff81d1a470 T sumo_dpm_display_configuration_changed +ffffffff81d1a4a0 T sumo_convert_vid2_to_vid7 +ffffffff81d1a500 T sumo_construct_sclk_voltage_mapping_table +ffffffff81d1a5c0 T sumo_construct_vid_mapping_table +ffffffff81d1a740 T sumo_dpm_init +ffffffff81d1b000 T sumo_dpm_print_power_state +ffffffff81d1b120 T sumo_dpm_debugfs_print_current_performance_level +ffffffff81d1b150 T sumo_dpm_get_current_sclk +ffffffff81d1b1c0 T sumo_dpm_get_current_mclk +ffffffff81d1b1f0 T sumo_dpm_get_current_vddc +ffffffff81d1b2c0 T sumo_dpm_fini +ffffffff81d1b350 T sumo_dpm_get_sclk +ffffffff81d1b3a0 T sumo_dpm_get_mclk +ffffffff81d1b3d0 T sumo_dpm_force_performance_level +ffffffff81d1b7f0 t sumo_power_level_enable +ffffffff81d1ba20 t sumo_program_power_level +ffffffff81d1c000 T sumo_initialize_m3_arb +ffffffff81d1c2c0 T sumo_smu_notify_alt_vddnb_change +ffffffff81d1c360 t sumo_send_msg_to_smu +ffffffff81d1c500 T sumo_smu_pg_init +ffffffff81d1c520 T sumo_enable_boost_timer +ffffffff81d1c660 T sumo_set_tdp_limit +ffffffff81d1c6e0 T sumo_boost_state_enable +ffffffff81d1c730 T sumo_get_running_fw_version +ffffffff81d1d000 T trinity_dpm_enable_bapm +ffffffff81d1d080 T trinity_dpm_enable +ffffffff81d1d520 T trinity_dpm_late_enable +ffffffff81d1da80 T trinity_dpm_disable +ffffffff81d1de90 T trinity_dpm_force_performance_level +ffffffff81d1df50 T trinity_dpm_pre_set_power_state +ffffffff81d1e520 T trinity_dpm_set_power_state +ffffffff81d1eab0 T trinity_dpm_post_set_power_state +ffffffff81d1eb50 T trinity_dpm_setup_asic +ffffffff81d1ebb0 T trinity_dpm_display_configuration_changed +ffffffff81d1ec40 T trinity_dpm_init +ffffffff81d1f540 T trinity_dpm_print_power_state +ffffffff81d1f650 T trinity_dpm_debugfs_print_current_performance_level +ffffffff81d1f6e0 T trinity_dpm_get_current_sclk +ffffffff81d1f740 T trinity_dpm_get_current_mclk +ffffffff81d1f770 T trinity_dpm_fini +ffffffff81d1f810 T trinity_dpm_get_sclk +ffffffff81d1f860 T trinity_dpm_get_mclk +ffffffff81d1f890 t trinity_program_power_level +ffffffff81d20000 T trinity_dpm_bapm_enable +ffffffff81d20150 T trinity_dpm_config +ffffffff81d20230 T trinity_dpm_force_state +ffffffff81d20310 T trinity_dpm_n_levels_disabled +ffffffff81d203f0 T trinity_uvd_dpm_config +ffffffff81d204c0 T trinity_dpm_no_forced_level +ffffffff81d20590 T trinity_dce_enable_voltage_adjustment +ffffffff81d206e0 T trinity_gfx_dynamic_mgpg_config +ffffffff81d207b0 T trinity_acquire_mutex +ffffffff81d20840 T trinity_release_mutex +ffffffff81d21000 T uvd_v1_0_get_rptr +ffffffff81d21040 T uvd_v1_0_get_wptr +ffffffff81d21080 T uvd_v1_0_set_wptr +ffffffff81d210c0 T uvd_v1_0_fence_emit +ffffffff81d214b0 T uvd_v1_0_resume +ffffffff81d21610 T uvd_v1_0_init +ffffffff81d21ba0 T uvd_v1_0_start +ffffffff81d22320 T uvd_v1_0_fini +ffffffff81d22490 T uvd_v1_0_stop +ffffffff81d22600 T uvd_v1_0_ring_test +ffffffff81d227d0 T uvd_v1_0_semaphore_emit +ffffffff81d22800 T uvd_v1_0_ib_execute +ffffffff81d229a0 T uvd_v1_0_ib_test +ffffffff81d23000 T uvd_v2_2_fence_emit +ffffffff81d23470 T uvd_v2_2_semaphore_emit +ffffffff81d23680 T uvd_v2_2_resume +ffffffff81d24000 T uvd_v3_1_semaphore_emit +ffffffff81d25000 T uvd_v4_2_resume +ffffffff81d26000 T vce_v1_0_get_rptr +ffffffff81d26090 T vce_v1_0_get_wptr +ffffffff81d26120 T vce_v1_0_set_wptr +ffffffff81d261b0 T vce_v1_0_enable_mgcg +ffffffff81d26470 T vce_v1_0_load_fw +ffffffff81d26640 T vce_v1_0_bo_size +ffffffff81d266b0 T vce_v1_0_resume +ffffffff81d27020 T vce_v1_0_start +ffffffff81d277e0 T vce_v1_0_init +ffffffff81d28000 T vce_v2_0_enable_mgcg +ffffffff81d28070 t vce_v2_0_set_dyn_cg +ffffffff81d28260 T vce_v2_0_bo_size +ffffffff81d282d0 T vce_v2_0_resume +ffffffff81d29000 T aldebaran_reset_init +ffffffff81d290c0 t aldebaran_async_reset +ffffffff81d29120 t aldebaran_get_reset_handler +ffffffff81d291d0 T aldebaran_reset_fini +ffffffff81d29230 t aldebaran_mode2_prepare_hwcontext +ffffffff81d29350 t aldebaran_mode2_perform_reset +ffffffff81d29530 t aldebaran_mode2_restore_hwcontext +ffffffff81d29a10 t aldebaran_mode2_reset +ffffffff81d2a000 T aldebaran_reg_base_init +ffffffff81d2b000 T amdgpu_acpi_is_pcie_performance_request_supported +ffffffff81d2b040 T amdgpu_acpi_is_power_shift_control_supported +ffffffff81d2b070 T amdgpu_acpi_pcie_notify_device_ready +ffffffff81d2b190 t amdgpu_atcs_call +ffffffff81d2b280 T amdgpu_acpi_pcie_performance_request +ffffffff81d2b4d0 T amdgpu_acpi_power_shift_control +ffffffff81d2b580 T amdgpu_acpi_smart_shift_update +ffffffff81d2b6d0 T amdgpu_acpi_init +ffffffff81d2b790 t amdgpu_acpi_event +ffffffff81d2bad0 T amdgpu_acpi_get_backlight_caps +ffffffff81d2bb20 T amdgpu_acpi_fini +ffffffff81d2bb40 T amdgpu_acpi_should_gpu_reset +ffffffff81d2bb90 T amdgpu_acpi_detect +ffffffff81d2d000 T amdgpu_afmt_acr +ffffffff81d2e000 T amdgpu_amdkfd_init +ffffffff81d2e040 T amdgpu_amdkfd_fini +ffffffff81d2e070 T amdgpu_amdkfd_device_probe +ffffffff81d2e0a0 T amdgpu_amdkfd_device_init +ffffffff81d2e270 t amdgpu_amdkfd_reset_work +ffffffff81d2e2f0 T amdgpu_amdkfd_device_fini_sw +ffffffff81d2e340 T amdgpu_amdkfd_interrupt +ffffffff81d2e370 T amdgpu_amdkfd_suspend +ffffffff81d2e3a0 T amdgpu_amdkfd_resume_iommu +ffffffff81d2e3d0 T amdgpu_amdkfd_resume +ffffffff81d2e400 T amdgpu_amdkfd_pre_reset +ffffffff81d2e430 T amdgpu_amdkfd_post_reset +ffffffff81d2e460 T amdgpu_amdkfd_gpu_reset +ffffffff81d2e4c0 T amdgpu_amdkfd_alloc_gtt_mem +ffffffff81d2e770 t amdgpu_bo_reserve +ffffffff81d2e8d0 t amdgpu_bo_unreserve +ffffffff81d2e9b0 T amdgpu_amdkfd_free_gtt_mem +ffffffff81d2ea20 T amdgpu_amdkfd_alloc_gws +ffffffff81d2eb00 T amdgpu_amdkfd_free_gws +ffffffff81d2eb40 T amdgpu_amdkfd_get_fw_version +ffffffff81d2ebf0 T amdgpu_amdkfd_get_local_mem_info +ffffffff81d2ecc0 T amdgpu_amdkfd_get_gpu_clock_counter +ffffffff81d2ed00 T amdgpu_amdkfd_get_max_engine_clock_in_mhz +ffffffff81d2ed80 T amdgpu_amdkfd_get_cu_info +ffffffff81d2eed0 T amdgpu_amdkfd_get_dmabuf_info +ffffffff81d2f010 T amdgpu_amdkfd_get_xgmi_hops_count +ffffffff81d2f080 T amdgpu_amdkfd_get_xgmi_bandwidth_mbytes +ffffffff81d2f110 T amdgpu_amdkfd_get_pcie_bandwidth_mbytes +ffffffff81d2f280 T amdgpu_amdkfd_submit_ib +ffffffff81d2f3e0 T amdgpu_amdkfd_set_compute_idle +ffffffff81d2f430 T amdgpu_amdkfd_is_kfd_vmid +ffffffff81d2f470 T amdgpu_amdkfd_flush_gpu_tlb_vmid +ffffffff81d2f510 T amdgpu_amdkfd_flush_gpu_tlb_pasid +ffffffff81d2f540 T amdgpu_amdkfd_have_atomics_support +ffffffff81d2f570 T amdgpu_amdkfd_ras_poison_consumption_handler +ffffffff81d2f5d0 T amdgpu_amdkfd_ras_query_utcl2_poison_status +ffffffff81d30000 T amdgpu_atom_execute_table +ffffffff81d300a0 t amdgpu_atom_execute_table_locked +ffffffff81d303f0 T amdgpu_atom_parse +ffffffff81d30940 T amdgpu_atom_destroy +ffffffff81d30980 T amdgpu_atom_asic_init +ffffffff81d30aa0 T amdgpu_atom_parse_data_header +ffffffff81d30b40 T amdgpu_atom_parse_cmd_header +ffffffff81d30bc0 t atom_op_move +ffffffff81d30da0 t atom_op_and +ffffffff81d30f80 t atom_op_or +ffffffff81d31160 t atom_op_shift_left +ffffffff81d31350 t atom_op_shift_right +ffffffff81d31540 t atom_op_mul +ffffffff81d31690 t atom_op_div +ffffffff81d31800 t atom_op_add +ffffffff81d319e0 t atom_op_sub +ffffffff81d31bc0 t atom_op_setport +ffffffff81d31d40 t atom_op_setregblock +ffffffff81d31e00 t atom_op_setfbbase +ffffffff81d31ed0 t atom_op_compare +ffffffff81d320c0 t atom_op_switch +ffffffff81d32310 t atom_op_jump +ffffffff81d32590 t atom_op_test +ffffffff81d32750 t atom_op_delay +ffffffff81d32830 t atom_op_calltable +ffffffff81d32980 t atom_op_repeat +ffffffff81d329b0 t atom_op_clear +ffffffff81d32ac0 t atom_op_nop +ffffffff81d32af0 t atom_op_eot +ffffffff81d32b20 t atom_op_mask +ffffffff81d32df0 t atom_op_postcard +ffffffff81d32ea0 t atom_op_beep +ffffffff81d32ec0 t atom_op_savereg +ffffffff81d32ef0 t atom_op_restorereg +ffffffff81d32f20 t atom_op_setdatablock +ffffffff81d33060 t atom_op_xor +ffffffff81d33240 t atom_op_shl +ffffffff81d33460 t atom_op_shr +ffffffff81d33680 t atom_op_debug +ffffffff81d33730 t atom_op_processds +ffffffff81d337f0 t atom_op_mul32 +ffffffff81d33950 t atom_op_div32 +ffffffff81d33ae0 t atom_put_dst +ffffffff81d33fb0 t atom_get_src_int +ffffffff81d34660 t atom_iio_execute +ffffffff81d35000 T amdgpu_atombios_lookup_i2c_gpio +ffffffff81d35260 T amdgpu_atombios_i2c_init +ffffffff81d35540 T amdgpu_atombios_lookup_gpio +ffffffff81d35640 T amdgpu_atombios_has_dce_engine_info +ffffffff81d356c0 T amdgpu_atombios_get_connector_info_from_object_table +ffffffff81d35f10 T amdgpu_atombios_get_clock_info +ffffffff81d36250 T amdgpu_atombios_get_gfx_info +ffffffff81d36310 T amdgpu_atombios_get_vram_width +ffffffff81d363a0 T amdgpu_atombios_get_asic_ss_info +ffffffff81d36710 T amdgpu_atombios_get_clock_dividers +ffffffff81d36930 T amdgpu_atombios_has_gpu_virtualization_table +ffffffff81d36980 T amdgpu_atombios_scratch_regs_lock +ffffffff81d369e0 T amdgpu_atombios_scratch_regs_engine_hung +ffffffff81d36a30 T amdgpu_atombios_scratch_regs_set_backlight_level +ffffffff81d36a90 T amdgpu_atombios_scratch_need_asic_init +ffffffff81d36ae0 T amdgpu_atombios_copy_swap +ffffffff81d36b00 T amdgpu_atombios_fini +ffffffff81d36ba0 T amdgpu_atombios_init +ffffffff81d36e40 t cail_reg_read +ffffffff81d36e60 t cail_reg_write +ffffffff81d36e80 t cail_mc_read +ffffffff81d36eb0 t cail_mc_write +ffffffff81d36ee0 t cail_pll_read +ffffffff81d36f10 t cail_pll_write +ffffffff81d36f40 T amdgpu_atombios_get_data_table +ffffffff81d37000 T amdgpu_atombios_crtc_overscan_setup +ffffffff81d37150 T amdgpu_atombios_crtc_scaler_setup +ffffffff81d371d0 T amdgpu_atombios_crtc_lock +ffffffff81d37230 T amdgpu_atombios_crtc_enable +ffffffff81d37290 T amdgpu_atombios_crtc_blank +ffffffff81d372f0 T amdgpu_atombios_crtc_powergate +ffffffff81d37360 T amdgpu_atombios_crtc_powergate_init +ffffffff81d373d0 T amdgpu_atombios_crtc_set_dtd_timing +ffffffff81d374e0 T amdgpu_atombios_crtc_set_disp_eng_pll +ffffffff81d375d0 T amdgpu_atombios_crtc_set_dce_clock +ffffffff81d376c0 T amdgpu_atombios_crtc_program_pll +ffffffff81d379d0 T amdgpu_atombios_crtc_prepare_pll +ffffffff81d37ed0 T amdgpu_atombios_crtc_set_pll +ffffffff81d39000 T amdgpu_atombios_dp_aux_init +ffffffff81d39090 t amdgpu_atombios_dp_aux_transfer +ffffffff81d39200 T amdgpu_atombios_dp_get_sinktype +ffffffff81d39270 T amdgpu_atombios_dp_get_dpcd +ffffffff81d39420 T amdgpu_atombios_dp_get_panel_mode +ffffffff81d39510 T amdgpu_atombios_dp_set_link_config +ffffffff81d39590 t amdgpu_atombios_dp_get_dp_link_config +ffffffff81d39710 T amdgpu_atombios_dp_mode_valid_helper +ffffffff81d39790 T amdgpu_atombios_dp_needs_link_train +ffffffff81d39800 T amdgpu_atombios_dp_set_rx_power_state +ffffffff81d39880 T amdgpu_atombios_dp_link_train +ffffffff81d39dd0 t amdgpu_atombios_dp_process_aux_ch +ffffffff81d39f40 t amdgpu_atombios_dp_get_adjust_train +ffffffff81d3b000 T amdgpu_atombios_encoder_get_backlight_level_from_reg +ffffffff81d3b050 T amdgpu_atombios_encoder_set_backlight_level_to_reg +ffffffff81d3b0a0 T amdgpu_atombios_encoder_get_backlight_level +ffffffff81d3b100 T amdgpu_atombios_encoder_set_backlight_level +ffffffff81d3b210 T amdgpu_atombios_encoder_setup_dig_transmitter +ffffffff81d3bbe0 T amdgpu_atombios_encoder_init_backlight +ffffffff81d3bd80 t amdgpu_atombios_encoder_get_backlight_brightness +ffffffff81d3bde0 T amdgpu_atombios_encoder_fini_backlight +ffffffff81d3be70 T amdgpu_atombios_encoder_is_digital +ffffffff81d3bec0 T amdgpu_atombios_encoder_mode_fixup +ffffffff81d3bfa0 T amdgpu_atombios_encoder_get_encoder_mode +ffffffff81d3c140 T amdgpu_atombios_encoder_setup_dig_encoder +ffffffff81d3c600 T amdgpu_atombios_encoder_set_edp_panel_power +ffffffff81d3c700 T amdgpu_atombios_encoder_dpms +ffffffff81d3c870 t amdgpu_atombios_encoder_setup_dig +ffffffff81d3cbe0 t amdgpu_atombios_encoder_setup_dvo +ffffffff81d3cd80 T amdgpu_atombios_encoder_set_crtc_source +ffffffff81d3d160 T amdgpu_atombios_encoder_init_dig +ffffffff81d3d230 t amdgpu_atombios_encoder_setup_external_encoder +ffffffff81d3d490 T amdgpu_atombios_encoder_dac_detect +ffffffff81d3d670 T amdgpu_atombios_encoder_dig_detect +ffffffff81d3d770 T amdgpu_atombios_encoder_setup_ext_encoder_ddc +ffffffff81d3d7c0 T amdgpu_atombios_encoder_set_bios_scratch_regs +ffffffff81d3dd60 T amdgpu_atombios_encoder_get_lcd_info +ffffffff81d3e0c0 T amdgpu_atombios_encoder_get_dig_info +ffffffff81d3e130 t amdgpu_atombios_encoder_update_backlight_status +ffffffff81d3f000 T amdgpu_atombios_i2c_xfer +ffffffff81d3f3b0 T amdgpu_atombios_i2c_func +ffffffff81d3f3e0 T amdgpu_atombios_i2c_channel_trans +ffffffff81d40000 T amdgpu_atomfirmware_query_firmware_capability +ffffffff81d40090 T amdgpu_atomfirmware_gpu_virtualization_supported +ffffffff81d400c0 T amdgpu_atomfirmware_scratch_regs_init +ffffffff81d40140 T amdgpu_atomfirmware_allocate_fb_scratch +ffffffff81d40270 T amdgpu_atomfirmware_get_vram_info +ffffffff81d409d0 T amdgpu_atomfirmware_mem_ecc_supported +ffffffff81d40a80 T amdgpu_atomfirmware_sram_ecc_supported +ffffffff81d40ab0 T amdgpu_atomfirmware_dynamic_boot_config_supported +ffffffff81d40ae0 T amdgpu_atomfirmware_ras_rom_addr +ffffffff81d40b80 T amdgpu_atomfirmware_get_clock_info +ffffffff81d40da0 T amdgpu_atomfirmware_get_gfx_info +ffffffff81d40f40 T amdgpu_atomfirmware_mem_training_supported +ffffffff81d40f80 T amdgpu_atomfirmware_get_fw_reserved_fb_size +ffffffff81d41010 T amdgpu_atomfirmware_asic_init +ffffffff81d42000 T amdgpu_benchmark +ffffffff81d427a0 t amdgpu_benchmark_move +ffffffff81d43000 T amdgpu_read_bios +ffffffff81d43190 t check_atom_bios +ffffffff81d432a0 T amdgpu_get_bios +ffffffff81d43850 t igp_read_bios_from_vram +ffffffff81d43990 T amdgpu_soc15_read_bios_from_rom +ffffffff81d44000 T amdgpu_bo_list_create +ffffffff81d44290 T amdgpu_bo_list_get +ffffffff81d442f0 T amdgpu_bo_list_get_list +ffffffff81d44450 T amdgpu_bo_list_put +ffffffff81d44500 T amdgpu_bo_create_list_entry_array +ffffffff81d44650 T amdgpu_bo_list_ioctl +ffffffff81d45000 T amdgpu_cgs_create_device +ffffffff81d45080 T amdgpu_cgs_destroy_device +ffffffff81d450a0 t amdgpu_cgs_read_register +ffffffff81d450c0 t amdgpu_cgs_write_register +ffffffff81d450e0 t amdgpu_cgs_read_ind_register +ffffffff81d451c0 t amdgpu_cgs_write_ind_register +ffffffff81d45270 t amdgpu_cgs_get_firmware_info +ffffffff81d46000 T amdgpu_connector_hotplug +ffffffff81d460f0 T amdgpu_connector_get_monitor_bpc +ffffffff81d46380 T amdgpu_connector_edid +ffffffff81d46430 T amdgpu_connector_encoder_get_dp_bridge_encoder_id +ffffffff81d464b0 T amdgpu_connector_is_dp12_capable +ffffffff81d46540 T amdgpu_connector_add +ffffffff81d47150 t amdgpu_connector_dp_detect +ffffffff81d474c0 t amdgpu_connector_dvi_force +ffffffff81d47510 t amdgpu_connector_set_property +ffffffff81d47a80 t amdgpu_connector_late_register +ffffffff81d47ae0 t amdgpu_connector_unregister +ffffffff81d47b40 t amdgpu_connector_destroy +ffffffff81d47bb0 t amdgpu_connector_best_single_encoder +ffffffff81d47c30 t amdgpu_connector_dp_get_modes +ffffffff81d47f60 t amdgpu_connector_dp_mode_valid +ffffffff81d48080 t amdgpu_connector_dvi_encoder +ffffffff81d48160 t amdgpu_connector_get_edid +ffffffff81d482e0 t amdgpu_connector_fixup_lcd_native_mode +ffffffff81d48410 t amdgpu_connector_add_common_modes +ffffffff81d48500 t amdgpu_connector_lcd_native_mode +ffffffff81d485d0 t amdgpu_connector_set_lcd_property +ffffffff81d486c0 t amdgpu_connector_vga_detect +ffffffff81d48910 t amdgpu_connector_vga_get_modes +ffffffff81d48a00 t amdgpu_connector_vga_mode_valid +ffffffff81d48a50 t amdgpu_connector_dvi_detect +ffffffff81d48e50 t amdgpu_connector_dvi_mode_valid +ffffffff81d48f00 t amdgpu_connector_lvds_detect +ffffffff81d49070 t amdgpu_connector_lvds_get_modes +ffffffff81d491e0 t amdgpu_connector_lvds_mode_valid +ffffffff81d4a000 T amdgpu_cs_report_moved_bytes +ffffffff81d4a070 T amdgpu_cs_ioctl +ffffffff81d4be40 t amdgpu_cs_parser_fini +ffffffff81d4bfd0 T amdgpu_cs_wait_ioctl +ffffffff81d4c110 T amdgpu_cs_fence_to_handle_ioctl +ffffffff81d4c2b0 t amdgpu_cs_get_fence +ffffffff81d4c360 T amdgpu_cs_wait_fences_ioctl +ffffffff81d4c650 T amdgpu_cs_find_mapping +ffffffff81d4c750 t amdgpu_cs_bo_validate +ffffffff81d4ca60 t amdgpu_cs_list_validate +ffffffff81d4d000 T amdgpu_csa_vaddr +ffffffff81d4d060 T amdgpu_allocate_static_csa +ffffffff81d4d100 T amdgpu_free_static_csa +ffffffff81d4d120 T amdgpu_map_static_csa +ffffffff81d4e000 T amdgpu_ctx_priority_is_valid +ffffffff81d4e060 T amdgpu_ctx_get_entity +ffffffff81d4e370 T amdgpu_ctx_ioctl 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amdgpu_vm_bo_clear_mappings +ffffffff81db4d30 T amdgpu_vm_bo_unmap +ffffffff81db4e60 T amdgpu_vm_bo_lookup_mapping +ffffffff81db4ed0 T amdgpu_vm_bo_trace_cs +ffffffff81db4f00 T amdgpu_vm_bo_del +ffffffff81db50f0 T amdgpu_vm_evictable +ffffffff81db51a0 T amdgpu_vm_bo_invalidate +ffffffff81db5460 T amdgpu_vm_adjust_size +ffffffff81db56d0 T amdgpu_vm_wait_idle +ffffffff81db5740 T amdgpu_vm_init +ffffffff81db5b00 t amdgpu_bo_reserve +ffffffff81db5c60 t amdgpu_bo_unreserve +ffffffff81db5d40 T amdgpu_vm_make_compute +ffffffff81db5f40 T amdgpu_vm_release_compute +ffffffff81db5ff0 T amdgpu_vm_fini +ffffffff81db6450 T amdgpu_vm_manager_init +ffffffff81db65f0 T amdgpu_vm_manager_fini +ffffffff81db6650 T amdgpu_vm_ioctl +ffffffff81db6770 T amdgpu_vm_get_task_info +ffffffff81db6810 T amdgpu_vm_set_task_info +ffffffff81db6900 T amdgpu_vm_handle_fault +ffffffff81db6ad0 t amdgpu_vm_add_prt_cb +ffffffff81db6c20 t amdgpu_vm_prt_cb +ffffffff81db7000 t amdgpu_vm_cpu_map_table +ffffffff81db7020 t amdgpu_vm_cpu_prepare +ffffffff81db7070 t amdgpu_vm_cpu_update +ffffffff81db7170 t amdgpu_vm_cpu_commit +ffffffff81db8000 T amdgpu_vm_pt_clear +ffffffff81db8430 T amdgpu_vm_pt_create +ffffffff81db8950 T amdgpu_vm_pt_free_work +ffffffff81db8c20 t amdgpu_vm_pt_free +ffffffff81db8d00 T amdgpu_vm_pt_free_root +ffffffff81db8d20 t amdgpu_vm_pt_free_dfs +ffffffff81db9a90 T amdgpu_vm_pt_is_root_clean +ffffffff81db9b60 T amdgpu_vm_pde_update +ffffffff81db9c50 T amdgpu_vm_ptes_update +ffffffff81dba620 t amdgpu_vm_pt_next +ffffffff81dbb000 t amdgpu_vm_sdma_map_table +ffffffff81dbb060 t amdgpu_vm_sdma_prepare +ffffffff81dbb100 t amdgpu_vm_sdma_update +ffffffff81dbb5e0 t amdgpu_vm_sdma_commit +ffffffff81dbc000 T amdgpu_vram_mgr_bo_visible_size +ffffffff81dbc110 T amdgpu_vram_mgr_reserve_range +ffffffff81dbc1f0 t amdgpu_vram_mgr_do_reserve +ffffffff81dbc370 T amdgpu_vram_mgr_query_page_status +ffffffff81dbc450 T amdgpu_vram_mgr_alloc_sgt +ffffffff81dbc4a0 T amdgpu_vram_mgr_free_sgt +ffffffff81dbc4d0 T amdgpu_vram_mgr_vis_usage +ffffffff81dbc500 T amdgpu_vram_mgr_init +ffffffff81dbc6d0 T amdgpu_vram_mgr_fini +ffffffff81dbc8e0 t amdgpu_vram_mgr_new +ffffffff81dbce70 t amdgpu_vram_mgr_del +ffffffff81dbcf50 t amdgpu_vram_mgr_intersects +ffffffff81dbcfd0 t amdgpu_vram_mgr_compatible +ffffffff81dbd050 t amdgpu_vram_mgr_debug +ffffffff81dbe000 t amdgpu_xgmi_hive_release +ffffffff81dbe050 T amdgpu_get_xgmi_hive +ffffffff81dbe0a0 T amdgpu_put_xgmi_hive +ffffffff81dbe0f0 T amdgpu_xgmi_set_pstate +ffffffff81dbe140 T amdgpu_xgmi_update_topology +ffffffff81dbe200 T amdgpu_xgmi_get_hops_count +ffffffff81dbe270 T amdgpu_xgmi_get_num_links +ffffffff81dbe2e0 T amdgpu_xgmi_add_device +ffffffff81dbe500 T amdgpu_xgmi_remove_device +ffffffff81dbe650 T amdgpu_xgmi_get_relative_phy_addr +ffffffff81dbe690 t amdgpu_ras_error_inject_xgmi +ffffffff81dbe800 t amdgpu_xgmi_query_ras_error_count +ffffffff81dbf020 t amdgpu_xgmi_reset_ras_error_count +ffffffff81dbf340 t amdgpu_xgmi_ras_late_init +ffffffff81dc0000 T arct_reg_base_init +ffffffff81dc1000 T athub_v1_0_set_clockgating +ffffffff81dc1210 T athub_v1_0_get_clockgating +ffffffff81dc2000 T athub_v2_0_set_clockgating +ffffffff81dc21e0 T athub_v2_0_get_clockgating +ffffffff81dc3000 T athub_v2_1_set_clockgating +ffffffff81dc31f0 T athub_v2_1_get_clockgating +ffffffff81dc4000 T athub_v3_0_set_clockgating +ffffffff81dc40d0 T athub_v3_0_get_clockgating +ffffffff81dc4120 t athub_v3_0_get_cg_cntl +ffffffff81dc41c0 t athub_v3_0_set_cg_cntl +ffffffff81dc5000 t cz_ih_early_init +ffffffff81dc5050 t cz_ih_sw_init +ffffffff81dc50b0 t cz_ih_sw_fini +ffffffff81dc50f0 t cz_ih_hw_init +ffffffff81dc5320 t cz_ih_hw_fini +ffffffff81dc53f0 t cz_ih_suspend +ffffffff81dc54c0 t cz_ih_resume +ffffffff81dc5500 t cz_ih_is_idle +ffffffff81dc5550 t cz_ih_wait_for_idle +ffffffff81dc55f0 t cz_ih_soft_reset +ffffffff81dc56d0 t cz_ih_set_clockgating_state +ffffffff81dc5700 t cz_ih_set_powergating_state +ffffffff81dc5730 t cz_ih_get_wptr +ffffffff81dc5820 t cz_ih_decode_iv +ffffffff81dc58a0 t cz_ih_set_rptr +ffffffff81dc6000 T dce_v10_0_disable_dce +ffffffff81dc6170 t dce_v10_0_early_init +ffffffff81dc6230 t dce_v10_0_sw_init +ffffffff81dc66a0 t dce_v10_0_sw_fini +ffffffff81dc67d0 t dce_v10_0_hw_init +ffffffff81dc6b40 t dce_v10_0_hw_fini +ffffffff81dc6cd0 t dce_v10_0_suspend +ffffffff81dc6d30 t dce_v10_0_resume +ffffffff81dc6da0 t dce_v10_0_is_idle +ffffffff81dc6dd0 t dce_v10_0_wait_for_idle +ffffffff81dc6e00 t dce_v10_0_check_soft_reset +ffffffff81dc6e10 t dce_v10_0_soft_reset +ffffffff81dc6ee0 t dce_v10_0_set_clockgating_state +ffffffff81dc6f10 t dce_v10_0_set_powergating_state +ffffffff81dc6f40 t dce_v10_0_audio_endpt_rreg +ffffffff81dc6fd0 t dce_v10_0_audio_endpt_wreg +ffffffff81dc7050 t dce_v10_0_bandwidth_update +ffffffff81dc7ac0 t dce_v10_0_vblank_get_counter +ffffffff81dc7b10 t dce_v10_0_hpd_sense +ffffffff81dc7b70 t dce_v10_0_hpd_set_polarity +ffffffff81dc7c40 t dce_v10_0_hpd_get_gpio_reg +ffffffff81dc7c70 t dce_v10_0_page_flip +ffffffff81dc7d60 t dce_v10_0_crtc_get_scanoutpos +ffffffff81dc7e00 t dce_v10_0_encoder_add +ffffffff81dc8030 t dce_v10_0_latency_watermark +ffffffff81dc8250 t dce_v10_0_encoder_destroy +ffffffff81dc82b0 t dce_v10_0_encoder_prepare +ffffffff81dc84b0 t dce_v10_0_encoder_commit +ffffffff81dc84e0 t dce_v10_0_encoder_mode_set +ffffffff81dc9380 t dce_v10_0_encoder_disable +ffffffff81dc9490 t dce_v10_0_ext_dpms +ffffffff81dc94c0 t dce_v10_0_ext_prepare +ffffffff81dc94f0 t dce_v10_0_ext_commit +ffffffff81dc9520 t dce_v10_0_ext_mode_set +ffffffff81dc9550 t dce_v10_0_ext_disable +ffffffff81dc9580 t dce_v10_0_set_crtc_irq_state +ffffffff81dc9660 t dce_v10_0_crtc_irq +ffffffff81dc9890 t dce_v10_0_set_crtc_vblank_interrupt_state +ffffffff81dc9960 t dce_v10_0_set_crtc_vline_interrupt_state +ffffffff81dc9a30 t dce_v10_0_set_pageflip_irq_state +ffffffff81dc9ae0 t dce_v10_0_pageflip_irq +ffffffff81dc9c40 t dce_v10_0_set_hpd_irq_state +ffffffff81dc9d10 t dce_v10_0_hpd_irq +ffffffff81dc9e30 t dce_v10_0_crtc_cursor_set2 +ffffffff81dca1a0 t dce_v10_0_crtc_cursor_move +ffffffff81dca280 t dce_v10_0_crtc_gamma_set +ffffffff81dca2c0 t dce_v10_0_crtc_destroy +ffffffff81dca2f0 t amdgpu_bo_reserve +ffffffff81dca500 t amdgpu_bo_unreserve +ffffffff81dca5e0 t dce_v10_0_cursor_move_locked +ffffffff81dca730 t dce_v10_0_crtc_load_lut +ffffffff81dcaac0 t dce_v10_0_crtc_dpms +ffffffff81dcac90 t dce_v10_0_crtc_prepare +ffffffff81dcacd0 t dce_v10_0_crtc_commit +ffffffff81dcad00 t dce_v10_0_crtc_mode_fixup +ffffffff81dcaec0 t dce_v10_0_crtc_mode_set +ffffffff81dcb0b0 t dce_v10_0_crtc_set_base +ffffffff81dcb0d0 t dce_v10_0_crtc_set_base_atomic +ffffffff81dcb0f0 t dce_v10_0_crtc_disable +ffffffff81dcb290 t dce_v10_0_crtc_do_set_base +ffffffff81dcb940 t dce_v10_0_is_display_hung +ffffffff81dcc000 T dce_v11_0_disable_dce +ffffffff81dcc160 t dce_v11_0_early_init +ffffffff81dcc2b0 t dce_v11_0_sw_init +ffffffff81dcc730 t dce_v11_0_sw_fini +ffffffff81dcc860 t dce_v11_0_hw_init +ffffffff81dccc30 t dce_v11_0_hw_fini +ffffffff81dccdc0 t dce_v11_0_suspend +ffffffff81dcce20 t dce_v11_0_resume +ffffffff81dcce90 t dce_v11_0_is_idle +ffffffff81dccec0 t dce_v11_0_wait_for_idle +ffffffff81dccef0 t dce_v11_0_soft_reset +ffffffff81dcd110 t dce_v11_0_set_clockgating_state +ffffffff81dcd140 t dce_v11_0_set_powergating_state +ffffffff81dcd170 t dce_v11_0_audio_endpt_rreg +ffffffff81dcd200 t dce_v11_0_audio_endpt_wreg +ffffffff81dcd280 t dce_v11_0_bandwidth_update +ffffffff81dcdcf0 t dce_v11_0_vblank_get_counter +ffffffff81dcdd40 t dce_v11_0_hpd_sense +ffffffff81dcdda0 t dce_v11_0_hpd_set_polarity +ffffffff81dcde70 t dce_v11_0_hpd_get_gpio_reg +ffffffff81dcdea0 t dce_v11_0_page_flip +ffffffff81dcdfa0 t dce_v11_0_crtc_get_scanoutpos +ffffffff81dce040 t dce_v11_0_encoder_add +ffffffff81dce270 t dce_v11_0_latency_watermark +ffffffff81dce490 t dce_v11_0_encoder_destroy +ffffffff81dce4f0 t dce_v11_0_encoder_prepare +ffffffff81dce6f0 t dce_v11_0_encoder_commit +ffffffff81dce720 t dce_v11_0_encoder_mode_set +ffffffff81dcf5c0 t dce_v11_0_encoder_disable +ffffffff81dcf6d0 t dce_v11_0_ext_dpms +ffffffff81dcf700 t dce_v11_0_ext_prepare +ffffffff81dcf730 t dce_v11_0_ext_commit +ffffffff81dcf760 t dce_v11_0_ext_mode_set +ffffffff81dcf790 t dce_v11_0_ext_disable +ffffffff81dcf7c0 t dce_v11_0_set_crtc_irq_state +ffffffff81dcf8a0 t dce_v11_0_crtc_irq +ffffffff81dcfac0 t dce_v11_0_set_crtc_vblank_interrupt_state +ffffffff81dcfb90 t dce_v11_0_set_crtc_vline_interrupt_state +ffffffff81dcfc60 t dce_v11_0_set_pageflip_irq_state +ffffffff81dcfd10 t dce_v11_0_pageflip_irq +ffffffff81dcfe70 t dce_v11_0_set_hpd_irq_state +ffffffff81dcff40 t dce_v11_0_hpd_irq +ffffffff81dd0060 t dce_v11_0_crtc_cursor_set2 +ffffffff81dd03d0 t dce_v11_0_crtc_cursor_move +ffffffff81dd04b0 t dce_v11_0_crtc_gamma_set +ffffffff81dd04f0 t dce_v11_0_crtc_destroy +ffffffff81dd0520 t amdgpu_bo_reserve +ffffffff81dd0730 t amdgpu_bo_unreserve +ffffffff81dd0810 t dce_v11_0_cursor_move_locked +ffffffff81dd0960 t dce_v11_0_crtc_load_lut +ffffffff81dd0cd0 t dce_v11_0_crtc_dpms +ffffffff81dd0ea0 t dce_v11_0_crtc_prepare +ffffffff81dd0ee0 t dce_v11_0_crtc_commit +ffffffff81dd0f10 t dce_v11_0_crtc_mode_fixup +ffffffff81dd1180 t dce_v11_0_crtc_mode_set +ffffffff81dd13e0 t dce_v11_0_crtc_set_base +ffffffff81dd1400 t dce_v11_0_crtc_set_base_atomic +ffffffff81dd1420 t dce_v11_0_crtc_disable +ffffffff81dd15c0 t dce_v11_0_crtc_do_set_base +ffffffff81dd2000 t df_v1_7_sw_init +ffffffff81dd2040 t df_v1_7_sw_fini +ffffffff81dd2070 t df_v1_7_enable_broadcast_mode +ffffffff81dd2190 t df_v1_7_get_fb_channel_number +ffffffff81dd2210 t df_v1_7_get_hbm_channel_number +ffffffff81dd2260 t df_v1_7_update_medium_grain_clock_gating +ffffffff81dd23d0 t df_v1_7_get_clockgating_state +ffffffff81dd2460 t df_v1_7_enable_ecc_force_par_wr_rmw +ffffffff81dd3000 t df_v3_6_sw_init +ffffffff81dd3160 t df_v3_6_sw_fini +ffffffff81dd3190 t df_v3_6_enable_broadcast_mode +ffffffff81dd32b0 t df_v3_6_get_fb_channel_number +ffffffff81dd3390 t df_v3_6_get_hbm_channel_number +ffffffff81dd33e0 t df_v3_6_update_medium_grain_clock_gating +ffffffff81dd3580 t df_v3_6_get_clockgating_state +ffffffff81dd3610 t df_v3_6_pmc_start +ffffffff81dd3990 t df_v3_6_pmc_stop +ffffffff81dd3c30 t df_v3_6_pmc_get_count +ffffffff81dd3dc0 t df_v3_6_get_fica +ffffffff81dd3ed0 t df_v3_6_set_fica +ffffffff81dd3fb0 t df_v3_6_query_ras_poison_mode +ffffffff81dd4120 t df_v3_6_perfmon_arm_with_status +ffffffff81dd5000 T dimgrey_cavefish_reg_base_init +ffffffff81dd6000 T emu_soc_asic_init +ffffffff81dd7000 t gfx_v10_0_early_init +ffffffff81dd7420 t gfx_v10_0_late_init +ffffffff81dd7490 t gfx_v10_0_sw_init +ffffffff81dd8840 t gfx_v10_0_sw_fini +ffffffff81dd8b80 t gfx_v10_0_hw_init +ffffffff81ddb730 t gfx_v10_0_hw_fini +ffffffff81ddba20 t gfx_v10_0_suspend +ffffffff81ddba60 t gfx_v10_0_resume +ffffffff81ddba70 t gfx_v10_0_is_idle +ffffffff81ddbb00 t gfx_v10_0_wait_for_idle +ffffffff81ddbbe0 t gfx_v10_0_soft_reset +ffffffff81ddbf30 t gfx_v10_0_set_clockgating_state +ffffffff81ddc1d0 t gfx_v10_0_set_powergating_state +ffffffff81ddc3f0 t gfx_v10_0_get_clockgating_state +ffffffff81ddc500 t gfx10_kiq_set_resources +ffffffff81ddc830 t gfx10_kiq_map_queues +ffffffff81ddcbc0 t gfx10_kiq_unmap_queues +ffffffff81ddcfc0 t gfx10_kiq_query_status +ffffffff81ddd2c0 t gfx10_kiq_invalidate_tlbs +ffffffff81ddd3e0 t gfx_v10_0_ring_get_rptr_compute +ffffffff81ddd410 t gfx_v10_0_ring_get_wptr_compute +ffffffff81ddd480 t gfx_v10_0_ring_set_wptr_compute +ffffffff81ddd5c0 t gfx_v10_0_ring_emit_ib_compute +ffffffff81ddd910 t gfx_v10_0_ring_emit_fence_kiq +ffffffff81dddd50 t gfx_v10_0_ring_test_ring +ffffffff81dddfc0 t gfx_v10_0_ring_test_ib +ffffffff81dde270 t gfx_v10_0_ring_emit_rreg +ffffffff81dde510 t gfx_v10_0_ring_emit_wreg +ffffffff81dde750 t gfx_v10_0_ring_emit_reg_wait +ffffffff81dde7a0 t gfx_v10_0_ring_emit_reg_write_reg_wait +ffffffff81dde830 t gfx_v10_0_wait_reg_mem +ffffffff81ddeb60 t gfx_v10_0_ring_get_rptr_gfx +ffffffff81ddeb90 t gfx_v10_0_ring_get_wptr_gfx +ffffffff81ddeca0 t gfx_v10_0_ring_set_wptr_gfx +ffffffff81ddeeb0 t gfx_v10_0_ring_emit_ib_gfx +ffffffff81ddf560 t gfx_v10_0_ring_emit_fence +ffffffff81ddf930 t gfx_v10_0_ring_emit_pipeline_sync +ffffffff81ddf990 t gfx_v10_0_ring_emit_vm_flush +ffffffff81ddfb60 t gfx_v10_0_ring_emit_hdp_flush +ffffffff81ddfc30 t gfx_v10_0_ring_emit_gds_switch +ffffffff81ddfd10 t gfx_v10_0_ring_emit_init_cond_exec +ffffffff81ddff40 t gfx_v10_0_ring_emit_patch_cond_exec +ffffffff81de0000 t gfx_v10_0_ring_emit_sb +ffffffff81de00f0 t gfx_v10_0_ring_emit_cntxcntl +ffffffff81de05e0 t gfx_v10_0_ring_emit_frame_cntl +ffffffff81de06f0 t gfx_v10_0_ring_soft_recovery +ffffffff81de0760 t gfx_v10_0_ring_preempt_ib +ffffffff81de08d0 t gfx_v10_0_emit_mem_sync +ffffffff81de0c10 t gfx_v10_0_write_data_to_reg +ffffffff81de0e20 t gfx_v10_0_set_eop_interrupt_state +ffffffff81de0f00 t gfx_v10_0_eop_irq +ffffffff81de10d0 t gfx_v10_0_set_gfx_eop_interrupt_state +ffffffff81de1260 t gfx_v10_0_set_compute_eop_interrupt_state +ffffffff81de1410 t gfx_v10_0_kiq_set_interrupt_state +ffffffff81de16f0 t gfx_v10_0_kiq_irq +ffffffff81de1770 t gfx_v10_0_set_priv_reg_fault_state +ffffffff81de1890 t gfx_v10_0_priv_reg_irq +ffffffff81de18f0 t gfx_v10_0_handle_priv_fault +ffffffff81de1a80 t gfx_v10_0_set_priv_inst_fault_state +ffffffff81de1ba0 t gfx_v10_0_priv_inst_irq +ffffffff81de1c00 t gfx_v10_0_is_rlc_enabled +ffffffff81de1c80 t gfx_v10_0_set_safe_mode +ffffffff81de1f20 t gfx_v10_0_unset_safe_mode +ffffffff81de1fd0 t gfx_v10_0_rlc_init +ffffffff81de2050 t gfx_v10_0_get_csb_size +ffffffff81de20b0 t gfx_v10_0_get_csb_buffer +ffffffff81de2230 t gfx_v10_0_rlc_resume +ffffffff81de2d30 t gfx_v10_0_rlc_stop +ffffffff81de2e10 t gfx_v10_0_rlc_reset +ffffffff81de2fb0 t gfx_v10_0_rlc_start +ffffffff81de3150 t gfx_v10_0_update_spm_vmid +ffffffff81de3280 t gfx_v10_0_wait_for_rlc_autoload_complete +ffffffff81de3e10 t gfx_v10_0_init_csb +ffffffff81de40e0 t gfx_v10_0_is_rlcg_access_range +ffffffff81de4110 t gfx_v10_0_gfx_mqd_init +ffffffff81de44f0 t gfx_v10_0_compute_mqd_init +ffffffff81de4990 t amdgpu_bo_unreserve +ffffffff81de4a70 t gfx_v10_0_get_gpu_clock_counter +ffffffff81de4f70 t gfx_v10_0_select_se_sh +ffffffff81de5010 t gfx_v10_0_read_wave_data +ffffffff81de5270 t gfx_v10_0_read_wave_vgprs +ffffffff81de52a0 t gfx_v10_0_read_wave_sgprs +ffffffff81de5320 t gfx_v10_0_select_me_pipe_q +ffffffff81de5340 t gfx_v10_0_init_spm_golden_registers +ffffffff81de53b0 t gfx_v10_0_update_perfmon_mgcg +ffffffff81de54d0 t wave_read_ind +ffffffff81de55b0 t wave_read_regs +ffffffff81de5710 t gfx_v10_0_cp_resume +ffffffff81de8350 t gfx_v10_3_get_disabled_sa +ffffffff81de8460 t gfx_v10_0_get_rb_active_bitmap +ffffffff81de8580 t gfx_v10_0_get_wgp_active_bitmap_per_sh +ffffffff81de8690 t gfx_v10_0_enable_gui_idle_interrupt +ffffffff81de87a0 t gfx_v10_0_cp_gfx_enable +ffffffff81de89e0 t gfx_v10_0_cp_compute_enable +ffffffff81de8b70 t amdgpu_bo_reserve +ffffffff81de8cf0 t gfx_v10_0_kiq_init_register +ffffffff81de9b60 t gfx_v10_0_cp_gfx_switch_pipe +ffffffff81de9c60 t gfx_v10_0_cp_gfx_set_doorbell +ffffffff81de9f30 t gfx_v10_0_cp_gfx_start +ffffffff81dea910 t gfx_v10_0_update_fine_grain_clock_gating +ffffffff81deac30 t gfx_v10_0_update_medium_grain_clock_gating +ffffffff81deb350 t gfx_v10_0_update_3d_clock_gating +ffffffff81deb710 t gfx_v10_0_update_coarse_grain_clock_gating +ffffffff81dec000 t gfx_v11_0_early_init +ffffffff81dec3a0 t gfx_v11_0_late_init +ffffffff81dec410 t gfx_v11_0_sw_init +ffffffff81ded360 t gfx_v11_0_sw_fini +ffffffff81ded640 t gfx_v11_0_hw_init +ffffffff81df1ac0 t gfx_v11_0_hw_fini +ffffffff81df1d40 t gfx_v11_0_suspend +ffffffff81df1d80 t gfx_v11_0_resume +ffffffff81df1d90 t gfx_v11_0_is_idle +ffffffff81df1e20 t gfx_v11_0_wait_for_idle +ffffffff81df1f00 t gfx_v11_0_check_soft_reset +ffffffff81df2030 t gfx_v11_0_soft_reset +ffffffff81df2d10 t gfx_v11_0_post_soft_reset +ffffffff81df2d20 t gfx_v11_0_set_clockgating_state +ffffffff81df3900 t gfx_v11_0_set_powergating_state +ffffffff81df3af0 t gfx_v11_0_get_clockgating_state +ffffffff81df3cc0 t gfx11_kiq_set_resources +ffffffff81df3ff0 t gfx11_kiq_map_queues +ffffffff81df4380 t gfx11_kiq_unmap_queues +ffffffff81df4780 t gfx11_kiq_query_status +ffffffff81df4a80 t gfx11_kiq_invalidate_tlbs +ffffffff81df4ba0 t gfx_v11_0_ring_get_rptr_compute +ffffffff81df4bd0 t gfx_v11_0_ring_get_wptr_compute +ffffffff81df4c40 t gfx_v11_0_ring_set_wptr_compute +ffffffff81df4d80 t gfx_v11_0_ring_emit_ib_compute +ffffffff81df50d0 t gfx_v11_0_ring_emit_fence_kiq +ffffffff81df5510 t gfx_v11_0_ring_test_ring +ffffffff81df57a0 t gfx_v11_0_ring_test_ib +ffffffff81df5a60 t gfx_v11_0_ring_emit_rreg +ffffffff81df5d00 t gfx_v11_0_ring_emit_wreg +ffffffff81df5f40 t gfx_v11_0_ring_emit_reg_wait +ffffffff81df5f90 t gfx_v11_0_ring_emit_reg_write_reg_wait +ffffffff81df6000 t gfx_v11_0_wait_reg_mem +ffffffff81df6330 t gfx_v11_0_ring_get_rptr_gfx +ffffffff81df6360 t gfx_v11_0_ring_get_wptr_gfx +ffffffff81df6470 t gfx_v11_0_ring_set_wptr_gfx +ffffffff81df6680 t gfx_v11_0_ring_emit_ib_gfx +ffffffff81df6d20 t gfx_v11_0_ring_emit_fence +ffffffff81df70f0 t gfx_v11_0_ring_emit_pipeline_sync +ffffffff81df7150 t gfx_v11_0_ring_emit_vm_flush +ffffffff81df7320 t gfx_v11_0_ring_emit_hdp_flush +ffffffff81df73f0 t gfx_v11_0_ring_emit_gds_switch +ffffffff81df74d0 t gfx_v11_0_ring_emit_init_cond_exec +ffffffff81df7700 t gfx_v11_0_ring_emit_patch_cond_exec +ffffffff81df77c0 t gfx_v11_0_ring_emit_cntxcntl +ffffffff81df7920 t gfx_v11_0_ring_emit_frame_cntl +ffffffff81df7a30 t gfx_v11_0_ring_soft_recovery +ffffffff81df7aa0 t gfx_v11_0_ring_preempt_ib +ffffffff81df7c10 t gfx_v11_0_emit_mem_sync +ffffffff81df7f50 t gfx_v11_0_write_data_to_reg +ffffffff81df8160 t gfx_v11_0_set_eop_interrupt_state +ffffffff81df81f0 t gfx_v11_0_eop_irq +ffffffff81df83c0 t gfx_v11_0_set_gfx_eop_interrupt_state +ffffffff81df8550 t gfx_v11_0_set_compute_eop_interrupt_state +ffffffff81df86e0 t gfx_v11_0_set_priv_reg_fault_state +ffffffff81df8800 t gfx_v11_0_priv_reg_irq +ffffffff81df8860 t gfx_v11_0_handle_priv_fault +ffffffff81df89f0 t gfx_v11_0_set_priv_inst_fault_state +ffffffff81df8b10 t gfx_v11_0_priv_inst_irq +ffffffff81df8b70 t gfx_v11_0_is_rlc_enabled +ffffffff81df8bf0 t gfx_v11_0_set_safe_mode +ffffffff81df8d40 t gfx_v11_0_unset_safe_mode +ffffffff81df8db0 t gfx_v11_0_rlc_init +ffffffff81df8e30 t gfx_v11_0_get_csb_size +ffffffff81df8e90 t gfx_v11_0_get_csb_buffer +ffffffff81df9010 t gfx_v11_0_rlc_resume +ffffffff81df9d30 t gfx_v11_0_rlc_stop +ffffffff81df9e10 t gfx_v11_0_rlc_reset +ffffffff81df9fb0 t gfx_v11_0_rlc_start +ffffffff81dfa150 t gfx_v11_0_update_spm_vmid +ffffffff81dfa250 t gfx_v11_0_init_csb +ffffffff81dfa3d0 t gfx_v11_0_gfx_mqd_init +ffffffff81dfa7a0 t gfx_v11_0_compute_mqd_init +ffffffff81dfacc0 t amdgpu_bo_unreserve +ffffffff81dfada0 t gfx_v11_0_get_gpu_clock_counter +ffffffff81dfaed0 t gfx_v11_0_select_se_sh +ffffffff81dfaf70 t gfx_v11_0_read_wave_data +ffffffff81dfb1b0 t gfx_v11_0_read_wave_vgprs +ffffffff81dfb1e0 t gfx_v11_0_read_wave_sgprs +ffffffff81dfb260 t gfx_v11_0_select_me_pipe_q +ffffffff81dfb280 t gfx_v11_0_update_perf_clk +ffffffff81dfb3b0 t wave_read_ind +ffffffff81dfb490 t wave_read_regs +ffffffff81dfb5f0 t gfx_v11_0_disable_gpa_mode +ffffffff81dfb780 t gfx_v11_0_cp_resume +ffffffff81dff820 t gfx_v11_0_config_me_cache +ffffffff81dffbc0 t gfx_v11_0_config_pfp_cache +ffffffff81dfff60 t gfx_v11_0_config_mec_cache +ffffffff81e00300 t gfx_v11_0_enable_gui_idle_interrupt +ffffffff81e00410 t gfx_v11_0_cp_compute_enable +ffffffff81e005e0 t gfx_v11_0_cp_gfx_enable +ffffffff81e007d0 t amdgpu_bo_reserve +ffffffff81e00950 t gfx_v11_0_kiq_init_register +ffffffff81e017c0 t gfx_v11_0_cp_gfx_switch_pipe +ffffffff81e018a0 t gfx_v11_0_cp_gfx_set_doorbell +ffffffff81e01a80 t gfx_v11_0_cp_gfx_start +ffffffff81e03000 t gfx_v8_0_early_init +ffffffff81e03320 t gfx_v8_0_late_init +ffffffff81e03a20 t gfx_v8_0_sw_init +ffffffff81e050f0 t gfx_v8_0_sw_fini +ffffffff81e053b0 t gfx_v8_0_hw_init +ffffffff81e075e0 t gfx_v8_0_hw_fini +ffffffff81e07ad0 t gfx_v8_0_suspend +ffffffff81e07b10 t gfx_v8_0_resume +ffffffff81e07b20 t gfx_v8_0_is_idle +ffffffff81e07b90 t gfx_v8_0_wait_for_idle +ffffffff81e07c40 t gfx_v8_0_check_soft_reset +ffffffff81e07d20 t gfx_v8_0_pre_soft_reset +ffffffff81e07ea0 t gfx_v8_0_soft_reset +ffffffff81e08060 t gfx_v8_0_post_soft_reset +ffffffff81e08220 t gfx_v8_0_set_clockgating_state +ffffffff81e084e0 t gfx_v8_0_set_powergating_state +ffffffff81e088a0 t gfx_v8_0_get_clockgating_state +ffffffff81e08980 t gfx_v8_0_get_gpu_clock_counter +ffffffff81e08a20 t gfx_v8_0_select_se_sh +ffffffff81e08a80 t gfx_v8_0_read_wave_data +ffffffff81e08f20 t gfx_v8_0_read_wave_sgprs +ffffffff81e08fd0 t gfx_v8_0_select_me_pipe_q +ffffffff81e08ff0 t gfx_v8_0_ring_get_rptr +ffffffff81e09020 t gfx_v8_0_ring_get_wptr_compute +ffffffff81e09050 t gfx_v8_0_ring_set_wptr_compute +ffffffff81e09090 t gfx_v8_0_ring_emit_fence_kiq +ffffffff81e094c0 t gfx_v8_0_ring_test_ring +ffffffff81e096c0 t gfx_v8_0_ring_emit_rreg +ffffffff81e09960 t gfx_v8_0_ring_emit_wreg +ffffffff81e09ba0 t gfx_v8_0_ring_get_wptr_gfx +ffffffff81e09c00 t gfx_v8_0_ring_set_wptr_gfx +ffffffff81e09c70 t gfx_v8_0_ring_emit_ib_gfx +ffffffff81e0a1d0 t gfx_v8_0_ring_emit_fence_gfx +ffffffff81e0a6d0 t gfx_v8_0_ring_emit_pipeline_sync +ffffffff81e0a9c0 t gfx_v8_0_ring_emit_vm_flush +ffffffff81e0ad70 t gfx_v8_0_ring_emit_hdp_flush +ffffffff81e0b090 t gfx_v8_0_ring_emit_gds_switch +ffffffff81e0b860 t gfx_v8_0_ring_test_ib +ffffffff81e0ba10 t gfx_v8_0_ring_emit_init_cond_exec +ffffffff81e0bc40 t gfx_v8_0_ring_emit_patch_cond_exec +ffffffff81e0bcf0 t gfx_v8_ring_emit_sb +ffffffff81e0bde0 t gfx_v8_ring_emit_cntxcntl +ffffffff81e0c380 t gfx_v8_0_ring_soft_recovery +ffffffff81e0c3b0 t gfx_v8_0_emit_mem_sync +ffffffff81e0c5c0 t gfx_v8_0_ring_emit_ib_compute +ffffffff81e0c8d0 t gfx_v8_0_ring_emit_fence_compute +ffffffff81e0cbd0 t gfx_v8_0_emit_mem_sync_compute +ffffffff81e0ce90 t gfx_v8_0_emit_wave_limit +ffffffff81e0d040 t gfx_v8_0_set_eop_interrupt_state +ffffffff81e0d250 t gfx_v8_0_eop_irq +ffffffff81e0d380 t gfx_v8_0_set_priv_reg_fault_state +ffffffff81e0d400 t gfx_v8_0_priv_reg_irq +ffffffff81e0d520 t gfx_v8_0_set_priv_inst_fault_state +ffffffff81e0d5a0 t gfx_v8_0_priv_inst_irq +ffffffff81e0d6c0 t gfx_v8_0_set_cp_ecc_int_state +ffffffff81e0d930 t gfx_v8_0_cp_ecc_error_irq +ffffffff81e0d980 t gfx_v8_0_set_sq_int_state +ffffffff81e0da10 t gfx_v8_0_sq_irq +ffffffff81e0dab0 t gfx_v8_0_parse_sq_irq +ffffffff81e0dd00 t gfx_v8_0_is_rlc_enabled +ffffffff81e0dd40 t gfx_v8_0_set_safe_mode +ffffffff81e0de40 t gfx_v8_0_unset_safe_mode +ffffffff81e0dee0 t gfx_v8_0_rlc_init +ffffffff81e0df90 t gfx_v8_0_get_csb_size +ffffffff81e0dff0 t gfx_v8_0_get_csb_buffer +ffffffff81e0e170 t gfx_v8_0_cp_jump_table_num +ffffffff81e0e1b0 t gfx_v8_0_rlc_resume +ffffffff81e0e540 t gfx_v8_0_rlc_stop +ffffffff81e0e5b0 t gfx_v8_0_rlc_reset +ffffffff81e0e630 t gfx_v8_0_rlc_start +ffffffff81e0e6b0 t gfx_v8_0_update_spm_vmid +ffffffff81e0e720 t gfx_v8_0_init_save_restore_list +ffffffff81e0eb40 t gfx_v8_0_wait_for_rlc_serdes +ffffffff81e0ed60 t gfx_v8_0_sq_irq_work_func +ffffffff81e0ed80 t amdgpu_bo_unreserve +ffffffff81e0ee60 t gfx_v8_0_kiq_resume +ffffffff81e0f0c0 t gfx_v8_0_cp_gfx_resume +ffffffff81e0fbe0 t gfx_v8_0_kcq_resume +ffffffff81e10610 t amdgpu_bo_reserve +ffffffff81e10790 t gfx_v8_0_mqd_commit +ffffffff81e10970 t gfx_v8_0_mqd_init +ffffffff81e10d90 t gfx_v8_0_deactivate_hqd +ffffffff81e10e50 t gfx_v8_0_update_medium_grain_clock_gating +ffffffff81e11180 t gfx_v8_0_update_coarse_grain_clock_gating +ffffffff81e12000 t gfx_v9_0_ras_error_inject +ffffffff81e121a0 t gfx_v9_0_query_ras_error_count +ffffffff81e12d40 t gfx_v9_0_reset_ras_error_count +ffffffff81e13780 T gfx_v9_0_select_se_sh +ffffffff81e13820 t gfx_v9_0_early_init +ffffffff81e13c80 t gfx_v9_0_late_init +ffffffff81e14990 t gfx_v9_0_sw_init +ffffffff81e16000 t gfx_v9_0_sw_fini +ffffffff81e162b0 t gfx_v9_0_hw_init +ffffffff81e19360 t gfx_v9_0_hw_fini +ffffffff81e19ac0 t gfx_v9_0_suspend +ffffffff81e19b00 t gfx_v9_0_resume +ffffffff81e19b10 t gfx_v9_0_is_idle +ffffffff81e19b90 t gfx_v9_0_wait_for_idle +ffffffff81e19c70 t gfx_v9_0_soft_reset +ffffffff81e1a000 t gfx_v9_0_set_clockgating_state +ffffffff81e1a0d0 t gfx_v9_0_set_powergating_state +ffffffff81e1a4d0 t gfx_v9_0_get_clockgating_state +ffffffff81e1a5e0 t gfx_v9_0_kiq_set_resources +ffffffff81e1a910 t gfx_v9_0_kiq_map_queues +ffffffff81e1ac50 t gfx_v9_0_kiq_unmap_queues +ffffffff81e1afd0 t gfx_v9_0_kiq_query_status +ffffffff81e1b2d0 t gfx_v9_0_kiq_invalidate_tlbs +ffffffff81e1b3f0 t gfx_v9_0_ring_get_rptr_compute +ffffffff81e1b420 t gfx_v9_0_ring_get_wptr_compute +ffffffff81e1b490 t gfx_v9_0_ring_set_wptr_compute +ffffffff81e1b4f0 t gfx_v9_0_ring_emit_fence_kiq +ffffffff81e1b930 t gfx_v9_0_ring_test_ring +ffffffff81e1bb60 t gfx_v9_0_ring_emit_rreg +ffffffff81e1be00 t gfx_v9_0_ring_emit_wreg +ffffffff81e1c040 t gfx_v9_0_ring_emit_reg_wait +ffffffff81e1c090 t gfx_v9_0_ring_emit_reg_write_reg_wait +ffffffff81e1c130 t gfx_v9_0_wait_reg_mem +ffffffff81e1c460 t gfx_v9_0_ring_get_rptr_gfx +ffffffff81e1c490 t gfx_v9_0_ring_get_wptr_gfx +ffffffff81e1c5a0 t gfx_v9_0_ring_set_wptr_gfx +ffffffff81e1c6d0 t gfx_v9_0_ring_emit_ib_gfx +ffffffff81e1cbf0 t gfx_v9_0_ring_emit_fence +ffffffff81e1cfb0 t gfx_v9_0_ring_emit_pipeline_sync +ffffffff81e1d010 t gfx_v9_0_ring_emit_vm_flush +ffffffff81e1d120 t gfx_v9_0_ring_emit_hdp_flush +ffffffff81e1d1f0 t gfx_v9_0_ring_emit_gds_switch +ffffffff81e1d2d0 t gfx_v9_0_ring_test_ib +ffffffff81e1d480 t gfx_v9_0_ring_emit_init_cond_exec +ffffffff81e1d6b0 t gfx_v9_0_ring_emit_patch_cond_exec +ffffffff81e1d780 t gfx_v9_ring_emit_sb +ffffffff81e1d870 t gfx_v9_ring_emit_cntxcntl +ffffffff81e1dc70 t gfx_v9_0_ring_emit_frame_cntl +ffffffff81e1dd80 t gfx_v9_0_ring_soft_recovery +ffffffff81e1ddf0 t gfx_v9_0_emit_mem_sync +ffffffff81e1e0b0 t gfx_v9_0_write_data_to_reg +ffffffff81e1e2c0 t gfx_v9_0_ring_emit_ib_compute +ffffffff81e1e5f0 t gfx_v9_0_emit_wave_limit +ffffffff81e1e7c0 t gfx_v9_0_set_eop_interrupt_state +ffffffff81e1e990 t gfx_v9_0_eop_irq +ffffffff81e1eac0 t gfx_v9_0_set_compute_eop_interrupt_state +ffffffff81e1ec70 t gfx_v9_0_set_priv_reg_fault_state +ffffffff81e1ed90 t gfx_v9_0_priv_reg_irq +ffffffff81e1eeb0 t gfx_v9_0_set_priv_inst_fault_state +ffffffff81e1efd0 t gfx_v9_0_priv_inst_irq +ffffffff81e1f0f0 t gfx_v9_0_set_cp_ecc_error_state +ffffffff81e1f920 t gfx_v9_0_is_rlc_enabled +ffffffff81e1f9a0 t gfx_v9_0_set_safe_mode +ffffffff81e1faf0 t gfx_v9_0_unset_safe_mode +ffffffff81e1fb60 t gfx_v9_0_rlc_init +ffffffff81e20370 t gfx_v9_0_get_csb_size +ffffffff81e203d0 t gfx_v9_0_get_csb_buffer +ffffffff81e20520 t gfx_v9_0_cp_jump_table_num +ffffffff81e20570 t gfx_v9_0_rlc_resume +ffffffff81e21310 t gfx_v9_0_rlc_stop +ffffffff81e217b0 t gfx_v9_0_rlc_reset +ffffffff81e21940 t gfx_v9_0_rlc_start +ffffffff81e21a80 t gfx_v9_0_update_spm_vmid +ffffffff81e21bb0 t gfx_v9_0_is_rlcg_access_range +ffffffff81e21c00 t gfx_v9_0_init_always_on_cu_mask +ffffffff81e21f60 t gfx_v9_0_init_csb +ffffffff81e220f0 t gfx_v9_0_enable_lbpw +ffffffff81e221e0 t gfx_v9_0_enable_gui_idle_interrupt +ffffffff81e222e0 t amdgpu_bo_unreserve +ffffffff81e223c0 t gfx_v9_0_get_gpu_clock_counter +ffffffff81e22b40 t gfx_v9_0_read_wave_data +ffffffff81e22d80 t gfx_v9_0_read_wave_vgprs +ffffffff81e22da0 t gfx_v9_0_read_wave_sgprs +ffffffff81e22df0 t gfx_v9_0_select_me_pipe_q +ffffffff81e22e10 t wave_read_ind +ffffffff81e22f20 t wave_read_regs +ffffffff81e23090 t gfx_v9_0_cp_gfx_enable +ffffffff81e23170 t amdgpu_bo_reserve +ffffffff81e232f0 t gfx_v9_0_kiq_init_register +ffffffff81e23f70 t gfx_v9_0_mqd_init +ffffffff81e244b0 t gfx_v9_0_update_medium_grain_clock_gating +ffffffff81e249c0 t gfx_v9_0_update_3d_clock_gating +ffffffff81e24da0 t gfx_v9_0_update_coarse_grain_clock_gating +ffffffff81e26000 t gfx_v9_4_ras_error_inject +ffffffff81e26130 t gfx_v9_4_query_ras_error_count +ffffffff81e26ef0 t gfx_v9_4_query_ras_error_status +ffffffff81e270c0 t gfx_v9_4_reset_ras_error_count +ffffffff81e28000 T gfx_v9_4_2_do_edc_gpr_workarounds +ffffffff81e28790 T gfx_v9_4_2_init_golden_registers +ffffffff81e28830 T gfx_v9_4_2_debug_trap_config_init +ffffffff81e288d0 T gfx_v9_4_2_set_power_brake_sequence +ffffffff81e28aa0 t gfx_v9_4_2_ras_error_inject +ffffffff81e28bd0 t gfx_v9_4_2_query_ras_error_count +ffffffff81e28c80 t gfx_v9_4_2_query_ras_error_status +ffffffff81e294d0 t gfx_v9_4_2_reset_ras_error_count +ffffffff81e29530 t gfx_v9_4_2_reset_ras_error_status +ffffffff81e299f0 t gfx_v9_4_2_enable_watchdog_timer +ffffffff81e29c10 t gfx_v9_4_2_query_uctl2_poison_status +ffffffff81e29c90 t gfx_v9_4_2_run_shader +ffffffff81e2a010 t gfx_v9_4_2_wait_for_waves_assigned +ffffffff81e2a650 t gfx_v9_4_2_query_sram_edc_count +ffffffff81e2a9a0 t gfx_v9_4_2_query_utc_edc_count +ffffffff81e2ab80 t wave_read_ind +ffffffff81e2b000 t gfxhub_v1_0_get_mc_fb_offset +ffffffff81e2b090 t gfxhub_v1_0_setup_vm_pt_regs +ffffffff81e2b1d0 t gfxhub_v1_0_gart_enable +ffffffff81e2c6c0 t gfxhub_v1_0_gart_disable +ffffffff81e2c950 t gfxhub_v1_0_set_fault_enable_default +ffffffff81e2ca40 t gfxhub_v1_0_init +ffffffff81e2d000 T gfxhub_v1_1_get_xgmi_info +ffffffff81e2e000 t gfxhub_v2_0_get_fb_location +ffffffff81e2e090 t gfxhub_v2_0_get_mc_fb_offset +ffffffff81e2e120 t gfxhub_v2_0_setup_vm_pt_regs +ffffffff81e2e260 t gfxhub_v2_0_gart_enable +ffffffff81e2f460 t gfxhub_v2_0_gart_disable +ffffffff81e2f6a0 t gfxhub_v2_0_set_fault_enable_default +ffffffff81e2f790 t gfxhub_v2_0_init +ffffffff81e2f860 t gfxhub_v2_0_print_l2_protection_fault_status +ffffffff81e2fa40 t gfxhub_v2_0_get_invalidate_req +ffffffff81e30000 t gfxhub_v2_1_get_fb_location +ffffffff81e30090 t gfxhub_v2_1_get_mc_fb_offset +ffffffff81e30120 t gfxhub_v2_1_setup_vm_pt_regs +ffffffff81e30260 t gfxhub_v2_1_gart_enable +ffffffff81e31540 t gfxhub_v2_1_gart_disable +ffffffff81e317c0 t gfxhub_v2_1_set_fault_enable_default +ffffffff81e318d0 t gfxhub_v2_1_init +ffffffff81e319a0 t gfxhub_v2_1_get_xgmi_info +ffffffff81e31ad0 t gfxhub_v2_1_utcl2_harvest +ffffffff81e31cb0 t gfxhub_v2_1_save_regs +ffffffff81e326e0 t gfxhub_v2_1_restore_regs +ffffffff81e332c0 t gfxhub_v2_1_halt +ffffffff81e33680 t gfxhub_v2_1_print_l2_protection_fault_status +ffffffff81e33860 t gfxhub_v2_1_get_invalidate_req +ffffffff81e34000 t gfxhub_v3_0_get_fb_location +ffffffff81e34090 t gfxhub_v3_0_get_mc_fb_offset +ffffffff81e34120 t gfxhub_v3_0_setup_vm_pt_regs +ffffffff81e34260 t gfxhub_v3_0_gart_enable +ffffffff81e354e0 t gfxhub_v3_0_gart_disable +ffffffff81e35760 t gfxhub_v3_0_set_fault_enable_default +ffffffff81e35b00 t gfxhub_v3_0_init +ffffffff81e35bd0 t gfxhub_v3_0_print_l2_protection_fault_status +ffffffff81e35db0 t gfxhub_v3_0_get_invalidate_req +ffffffff81e36000 t gfxhub_v3_0_3_get_fb_location +ffffffff81e36090 t gfxhub_v3_0_3_get_mc_fb_offset +ffffffff81e36120 t gfxhub_v3_0_3_setup_vm_pt_regs +ffffffff81e36260 t gfxhub_v3_0_3_gart_enable +ffffffff81e374f0 t gfxhub_v3_0_3_gart_disable +ffffffff81e37790 t gfxhub_v3_0_3_set_fault_enable_default +ffffffff81e378a0 t gfxhub_v3_0_3_init +ffffffff81e37970 t gfxhub_v3_0_3_print_l2_protection_fault_status +ffffffff81e37b50 t gfxhub_v3_0_3_get_invalidate_req +ffffffff81e38000 t gmc_v10_0_early_init +ffffffff81e381f0 t gmc_v10_0_late_init +ffffffff81e38260 t gmc_v10_0_sw_init +ffffffff81e38680 t gmc_v10_0_sw_fini +ffffffff81e386d0 t gmc_v10_0_hw_init +ffffffff81e388a0 t gmc_v10_0_hw_fini +ffffffff81e38940 t gmc_v10_0_suspend +ffffffff81e389e0 t gmc_v10_0_resume +ffffffff81e38a40 t gmc_v10_0_is_idle +ffffffff81e38a70 t gmc_v10_0_wait_for_idle +ffffffff81e38aa0 t gmc_v10_0_soft_reset +ffffffff81e38ad0 t gmc_v10_0_set_clockgating_state +ffffffff81e38b80 t gmc_v10_0_set_powergating_state +ffffffff81e38bb0 t gmc_v10_0_get_clockgating_state +ffffffff81e38c50 t gmc_v10_0_flush_gpu_tlb +ffffffff81e38f00 t gmc_v10_0_flush_gpu_tlb_pasid +ffffffff81e39120 t gmc_v10_0_emit_flush_gpu_tlb +ffffffff81e392d0 t gmc_v10_0_emit_pasid_mapping +ffffffff81e39340 t gmc_v10_0_map_mtype +ffffffff81e39390 t gmc_v10_0_get_vm_pde +ffffffff81e39480 t gmc_v10_0_get_vm_pte +ffffffff81e39530 t gmc_v10_0_get_vbios_fb_size +ffffffff81e396a0 t gmc_v10_0_flush_vm_hub +ffffffff81e39b00 t gmc_v10_0_vm_fault_interrupt_state +ffffffff81e39b70 t gmc_v10_0_process_interrupt +ffffffff81e39e30 t gmc_v10_0_ecc_interrupt_state +ffffffff81e3a000 t gmc_v11_0_early_init +ffffffff81e3a230 t gmc_v11_0_late_init +ffffffff81e3a2a0 t gmc_v11_0_sw_init +ffffffff81e3a5c0 t gmc_v11_0_sw_fini +ffffffff81e3a610 t gmc_v11_0_hw_init +ffffffff81e3a750 t gmc_v11_0_hw_fini +ffffffff81e3a7e0 t gmc_v11_0_suspend +ffffffff81e3a870 t gmc_v11_0_resume +ffffffff81e3a8d0 t gmc_v11_0_is_idle +ffffffff81e3a900 t gmc_v11_0_wait_for_idle +ffffffff81e3a930 t gmc_v11_0_soft_reset +ffffffff81e3a960 t gmc_v11_0_set_clockgating_state +ffffffff81e3a9e0 t gmc_v11_0_set_powergating_state +ffffffff81e3aa10 t gmc_v11_0_get_clockgating_state +ffffffff81e3aa50 t gmc_v11_0_flush_gpu_tlb +ffffffff81e3af20 t gmc_v11_0_flush_gpu_tlb_pasid +ffffffff81e3b110 t gmc_v11_0_emit_flush_gpu_tlb +ffffffff81e3b2c0 t gmc_v11_0_emit_pasid_mapping +ffffffff81e3b330 t gmc_v11_0_map_mtype +ffffffff81e3b380 t gmc_v11_0_get_vm_pde +ffffffff81e3b480 t gmc_v11_0_get_vm_pte +ffffffff81e3b530 t gmc_v11_0_get_vbios_fb_size +ffffffff81e3b560 t gmc_v11_0_vm_fault_interrupt_state +ffffffff81e3b5d0 t gmc_v11_0_process_interrupt +ffffffff81e3b7f0 t gmc_v11_0_ecc_interrupt_state +ffffffff81e3c000 t gmc_v7_0_early_init +ffffffff81e3c090 t gmc_v7_0_late_init +ffffffff81e3c0e0 t gmc_v7_0_sw_init +ffffffff81e3c5e0 t gmc_v7_0_sw_fini +ffffffff81e3c690 t gmc_v7_0_hw_init +ffffffff81e3d040 t gmc_v7_0_hw_fini +ffffffff81e3d100 t gmc_v7_0_suspend +ffffffff81e3d140 t gmc_v7_0_resume +ffffffff81e3d1a0 t gmc_v7_0_is_idle +ffffffff81e3d1f0 t gmc_v7_0_wait_for_idle +ffffffff81e3d290 t gmc_v7_0_soft_reset +ffffffff81e3d4f0 t gmc_v7_0_set_clockgating_state +ffffffff81e3d750 t gmc_v7_0_set_powergating_state +ffffffff81e3d780 t gmc_v7_0_flush_gpu_tlb +ffffffff81e3d7b0 t gmc_v7_0_flush_gpu_tlb_pasid +ffffffff81e3d870 t gmc_v7_0_emit_flush_gpu_tlb +ffffffff81e3d900 t gmc_v7_0_emit_pasid_mapping +ffffffff81e3d930 t gmc_v7_0_set_prt +ffffffff81e3daf0 t gmc_v7_0_get_vm_pde +ffffffff81e3db50 t gmc_v7_0_get_vm_pte +ffffffff81e3db90 t gmc_v7_0_get_vbios_fb_size +ffffffff81e3dc00 t gmc_v7_0_vm_fault_interrupt_state +ffffffff81e3dcd0 t gmc_v7_0_process_interrupt +ffffffff81e3e000 t gmc_v8_0_early_init +ffffffff81e3e090 t gmc_v8_0_late_init +ffffffff81e3e0e0 t gmc_v8_0_sw_init +ffffffff81e3e760 t gmc_v8_0_sw_fini +ffffffff81e3e810 t gmc_v8_0_hw_init +ffffffff81e3f4c0 t gmc_v8_0_hw_fini +ffffffff81e3f580 t gmc_v8_0_suspend +ffffffff81e3f5c0 t gmc_v8_0_resume +ffffffff81e3f620 t gmc_v8_0_is_idle +ffffffff81e3f670 t gmc_v8_0_wait_for_idle +ffffffff81e3f710 t gmc_v8_0_check_soft_reset +ffffffff81e3f780 t gmc_v8_0_pre_soft_reset +ffffffff81e3f8f0 t gmc_v8_0_soft_reset +ffffffff81e3f9c0 t gmc_v8_0_post_soft_reset +ffffffff81e3fa30 t gmc_v8_0_set_clockgating_state +ffffffff81e3fff0 t gmc_v8_0_set_powergating_state +ffffffff81e40020 t gmc_v8_0_get_clockgating_state +ffffffff81e40090 t gmc_v8_0_flush_gpu_tlb +ffffffff81e400c0 t gmc_v8_0_flush_gpu_tlb_pasid +ffffffff81e40180 t gmc_v8_0_emit_flush_gpu_tlb +ffffffff81e40210 t gmc_v8_0_emit_pasid_mapping +ffffffff81e40240 t gmc_v8_0_set_prt +ffffffff81e40400 t gmc_v8_0_get_vm_pde +ffffffff81e40460 t gmc_v8_0_get_vm_pte +ffffffff81e404b0 t gmc_v8_0_get_vbios_fb_size +ffffffff81e40520 t gmc_v8_0_vm_fault_interrupt_state +ffffffff81e405f0 t gmc_v8_0_process_interrupt +ffffffff81e41000 T gmc_v9_0_restore_registers +ffffffff81e41150 t gmc_v9_0_early_init +ffffffff81e41500 t gmc_v9_0_late_init +ffffffff81e41610 t gmc_v9_0_sw_init +ffffffff81e41cc0 t gmc_v9_0_sw_fini +ffffffff81e41d30 t gmc_v9_0_hw_init +ffffffff81e42130 t gmc_v9_0_hw_fini +ffffffff81e421f0 t gmc_v9_0_suspend +ffffffff81e422b0 t gmc_v9_0_resume +ffffffff81e42310 t gmc_v9_0_is_idle +ffffffff81e42340 t gmc_v9_0_wait_for_idle +ffffffff81e42370 t gmc_v9_0_soft_reset +ffffffff81e423a0 t gmc_v9_0_set_clockgating_state +ffffffff81e42400 t gmc_v9_0_set_powergating_state +ffffffff81e42430 t gmc_v9_0_get_clockgating_state +ffffffff81e42470 t gmc_v9_0_flush_gpu_tlb +ffffffff81e42ab0 t gmc_v9_0_flush_gpu_tlb_pasid +ffffffff81e42d80 t gmc_v9_0_emit_flush_gpu_tlb +ffffffff81e42f50 t gmc_v9_0_emit_pasid_mapping +ffffffff81e42fc0 t gmc_v9_0_map_mtype +ffffffff81e43000 t gmc_v9_0_get_vm_pde +ffffffff81e43100 t gmc_v9_0_get_vm_pte +ffffffff81e431d0 t gmc_v9_0_get_vbios_fb_size +ffffffff81e43360 t gmc_v9_0_vm_fault_interrupt_state +ffffffff81e436e0 t gmc_v9_0_process_interrupt +ffffffff81e43d20 t gmc_v9_0_ecc_interrupt_state +ffffffff81e44000 t hdp_v4_0_query_ras_error_count +ffffffff81e440c0 t hdp_v4_0_reset_ras_error_count +ffffffff81e441e0 t hdp_v4_0_flush_hdp +ffffffff81e44230 t hdp_v4_0_invalidate_hdp +ffffffff81e44300 t hdp_v4_0_update_clock_gating +ffffffff81e44400 t hdp_v4_0_get_clockgating_state +ffffffff81e44450 t hdp_v4_0_init_registers +ffffffff81e45000 t hdp_v5_0_flush_hdp +ffffffff81e45050 t hdp_v5_0_invalidate_hdp +ffffffff81e450f0 t hdp_v5_0_update_clock_gating +ffffffff81e454e0 t hdp_v5_0_get_clockgating_state +ffffffff81e45600 t hdp_v5_0_init_registers +ffffffff81e46000 t hdp_v5_2_flush_hdp +ffffffff81e46050 t hdp_v5_2_update_clock_gating +ffffffff81e46440 t hdp_v5_2_get_clockgating_state +ffffffff81e47000 t hdp_v6_0_flush_hdp +ffffffff81e47050 t hdp_v6_0_update_clock_gating +ffffffff81e47360 t hdp_v6_0_get_clockgating_state +ffffffff81e48000 t iceland_ih_early_init +ffffffff81e48050 t iceland_ih_sw_init +ffffffff81e480b0 t iceland_ih_sw_fini +ffffffff81e480f0 t iceland_ih_hw_init +ffffffff81e48320 t iceland_ih_hw_fini +ffffffff81e483f0 t iceland_ih_suspend +ffffffff81e484c0 t iceland_ih_resume +ffffffff81e48500 t iceland_ih_is_idle +ffffffff81e48550 t iceland_ih_wait_for_idle +ffffffff81e485f0 t iceland_ih_soft_reset +ffffffff81e486d0 t iceland_ih_set_clockgating_state +ffffffff81e48700 t iceland_ih_set_powergating_state +ffffffff81e48730 t iceland_ih_get_wptr +ffffffff81e48820 t iceland_ih_decode_iv +ffffffff81e488a0 t iceland_ih_set_rptr +ffffffff81e49000 t ih_v6_0_early_init +ffffffff81e49050 t ih_v6_0_sw_init +ffffffff81e491b0 t ih_v6_0_sw_fini +ffffffff81e491f0 t ih_v6_0_hw_init +ffffffff81e497a0 t ih_v6_0_hw_fini +ffffffff81e49800 t ih_v6_0_suspend +ffffffff81e49860 t ih_v6_0_resume +ffffffff81e49870 t ih_v6_0_is_idle +ffffffff81e498a0 t ih_v6_0_wait_for_idle +ffffffff81e498d0 t ih_v6_0_soft_reset +ffffffff81e49900 t ih_v6_0_set_clockgating_state +ffffffff81e49a20 t ih_v6_0_set_powergating_state +ffffffff81e49b90 t ih_v6_0_get_clockgating_state +ffffffff81e49c20 t ih_v6_0_get_wptr +ffffffff81e49d10 t ih_v6_0_set_rptr +ffffffff81e49de0 t ih_v6_0_self_irq +ffffffff81e49e50 t ih_v6_0_toggle_interrupts +ffffffff81e4a030 t force_update_wptr_for_self_int +ffffffff81e4b000 t imu_v11_0_init_microcode +ffffffff81e4b1f0 t imu_v11_0_load_microcode +ffffffff81e4b550 t imu_v11_0_setup +ffffffff81e4b7d0 t imu_v11_0_start +ffffffff81e4b8c0 t imu_v11_0_program_rlc_ram +ffffffff81e4ba70 t imu_v11_0_wait_for_reset_status +ffffffff81e4bbc0 t program_imu_rlc_ram +ffffffff81e4c000 T imu_v11_0_3_program_rlc_ram +ffffffff81e4d000 T jpeg_v1_0_early_init +ffffffff81e4d060 T jpeg_v1_0_sw_init +ffffffff81e4d130 T jpeg_v1_0_sw_fini +ffffffff81e4d150 T jpeg_v1_0_start +ffffffff81e4dbc0 t jpeg_v1_0_decode_ring_get_rptr +ffffffff81e4dc50 t jpeg_v1_0_decode_ring_get_wptr +ffffffff81e4dce0 t jpeg_v1_0_decode_ring_set_wptr +ffffffff81e4dd50 t jpeg_v1_0_decode_ring_emit_ib +ffffffff81e4e660 t jpeg_v1_0_decode_ring_emit_fence +ffffffff81e4efc0 t jpeg_v1_0_decode_ring_emit_vm_flush +ffffffff81e4f030 t jpeg_v1_0_decode_ring_nop +ffffffff81e4f190 t jpeg_v1_0_decode_ring_insert_start +ffffffff81e4f360 t jpeg_v1_0_decode_ring_insert_end +ffffffff81e4f530 t jpeg_v1_0_ring_begin_use +ffffffff81e4f630 t jpeg_v1_0_decode_ring_emit_wreg +ffffffff81e4f890 t jpeg_v1_0_decode_ring_emit_reg_wait +ffffffff81e4fcb0 t jpeg_v1_0_set_interrupt_state +ffffffff81e4fce0 t jpeg_v1_0_process_interrupt +ffffffff81e50000 T jpeg_v2_0_dec_ring_insert_start +ffffffff81e501b0 T jpeg_v2_0_dec_ring_insert_end +ffffffff81e50360 T jpeg_v2_0_dec_ring_emit_fence +ffffffff81e50a50 T jpeg_v2_0_dec_ring_emit_ib +ffffffff81e51240 T jpeg_v2_0_dec_ring_emit_reg_wait +ffffffff81e51600 T jpeg_v2_0_dec_ring_emit_vm_flush +ffffffff81e51670 T jpeg_v2_0_dec_ring_emit_wreg +ffffffff81e518b0 T jpeg_v2_0_dec_ring_nop +ffffffff81e51a10 t jpeg_v2_0_early_init +ffffffff81e51a80 t jpeg_v2_0_sw_init +ffffffff81e51b90 t jpeg_v2_0_sw_fini +ffffffff81e51be0 t jpeg_v2_0_hw_init +ffffffff81e51c60 t jpeg_v2_0_hw_fini +ffffffff81e51d40 t jpeg_v2_0_suspend +ffffffff81e51d70 t jpeg_v2_0_resume +ffffffff81e51e00 t jpeg_v2_0_is_idle +ffffffff81e51e80 t jpeg_v2_0_wait_for_idle +ffffffff81e51f70 t jpeg_v2_0_set_clockgating_state +ffffffff81e52020 t jpeg_v2_0_set_powergating_state +ffffffff81e52820 t jpeg_v2_0_dec_ring_get_rptr +ffffffff81e528b0 t jpeg_v2_0_dec_ring_get_wptr +ffffffff81e52950 t jpeg_v2_0_dec_ring_set_wptr +ffffffff81e529f0 t jpeg_v2_0_set_interrupt_state +ffffffff81e52a20 t jpeg_v2_0_process_interrupt +ffffffff81e52ab0 t jpeg_v2_0_enable_clock_gating +ffffffff81e52c50 t jpeg_v2_0_disable_clock_gating +ffffffff81e53000 t jpeg_v2_6_query_ras_poison_status +ffffffff81e53140 t jpeg_v2_5_early_init +ffffffff81e53410 t jpeg_v2_5_sw_init +ffffffff81e53630 t jpeg_v2_5_sw_fini +ffffffff81e53680 t jpeg_v2_5_hw_init +ffffffff81e53770 t jpeg_v2_5_hw_fini +ffffffff81e538b0 t jpeg_v2_5_suspend +ffffffff81e538e0 t jpeg_v2_5_resume +ffffffff81e539e0 t jpeg_v2_5_is_idle +ffffffff81e53ae0 t jpeg_v2_5_wait_for_idle +ffffffff81e53c10 t jpeg_v2_5_set_clockgating_state +ffffffff81e53d80 t jpeg_v2_5_set_powergating_state +ffffffff81e54470 t jpeg_v2_5_dec_ring_get_rptr +ffffffff81e54510 t jpeg_v2_5_dec_ring_get_wptr +ffffffff81e545c0 t jpeg_v2_5_dec_ring_set_wptr +ffffffff81e54670 t jpeg_v2_6_dec_ring_insert_start +ffffffff81e54830 t jpeg_v2_6_dec_ring_insert_end +ffffffff81e549f0 t jpeg_v2_5_set_interrupt_state +ffffffff81e54a20 t jpeg_v2_5_process_interrupt +ffffffff81e54b00 t jpeg_v2_5_enable_clock_gating +ffffffff81e54bd0 t jpeg_v2_5_disable_clock_gating +ffffffff81e55000 t jpeg_v3_0_early_init +ffffffff81e550e0 t jpeg_v3_0_sw_init +ffffffff81e551f0 t jpeg_v3_0_sw_fini +ffffffff81e55240 t jpeg_v3_0_hw_init +ffffffff81e552c0 t jpeg_v3_0_hw_fini +ffffffff81e553a0 t jpeg_v3_0_suspend +ffffffff81e553d0 t jpeg_v3_0_resume +ffffffff81e55460 t jpeg_v3_0_is_idle +ffffffff81e554e0 t jpeg_v3_0_wait_for_idle +ffffffff81e555d0 t jpeg_v3_0_set_clockgating_state +ffffffff81e55680 t jpeg_v3_0_set_powergating_state +ffffffff81e55f30 t jpeg_v3_0_dec_ring_get_rptr +ffffffff81e55fc0 t jpeg_v3_0_dec_ring_get_wptr +ffffffff81e56060 t jpeg_v3_0_dec_ring_set_wptr +ffffffff81e56100 t jpeg_v3_0_set_interrupt_state +ffffffff81e56130 t jpeg_v3_0_process_interrupt +ffffffff81e561c0 t jpeg_v3_0_enable_clock_gating +ffffffff81e56290 t jpeg_v3_0_disable_clock_gating +ffffffff81e57000 t jpeg_v4_0_early_init +ffffffff81e57080 t jpeg_v4_0_sw_init +ffffffff81e57190 t jpeg_v4_0_sw_fini +ffffffff81e571e0 t jpeg_v4_0_hw_init +ffffffff81e57300 t jpeg_v4_0_hw_fini +ffffffff81e573e0 t jpeg_v4_0_suspend +ffffffff81e57410 t jpeg_v4_0_resume +ffffffff81e57460 t jpeg_v4_0_is_idle +ffffffff81e574e0 t jpeg_v4_0_wait_for_idle +ffffffff81e575d0 t jpeg_v4_0_set_clockgating_state +ffffffff81e57680 t jpeg_v4_0_set_powergating_state +ffffffff81e57e90 t jpeg_v4_0_dec_ring_get_rptr +ffffffff81e57f20 t jpeg_v4_0_dec_ring_get_wptr +ffffffff81e57fc0 t jpeg_v4_0_dec_ring_set_wptr +ffffffff81e58060 t jpeg_v4_0_set_interrupt_state +ffffffff81e58090 t jpeg_v4_0_process_interrupt +ffffffff81e58130 t jpeg_v4_0_enable_clock_gating +ffffffff81e582e0 t jpeg_v4_0_disable_clock_gating +ffffffff81e59000 t lsdma_v6_0_copy_mem +ffffffff81e59360 t lsdma_v6_0_fill_mem +ffffffff81e59640 t lsdma_v6_0_update_memory_power_gating +ffffffff81e5a000 t mca_v3_0_mp0_query_ras_error_count +ffffffff81e5a020 t mca_v3_0_ras_block_match +ffffffff81e5a070 t mca_v3_0_mp1_query_ras_error_count +ffffffff81e5a090 t mca_v3_0_mpio_query_ras_error_count +ffffffff81e5a0b0 t mca_v3_0_init +ffffffff81e5b000 t mes_v10_0_late_init +ffffffff81e5b050 t mes_v10_1_sw_init +ffffffff81e5b660 t mes_v10_1_sw_fini +ffffffff81e5b7e0 t mes_v10_1_hw_init +ffffffff81e5c080 t mes_v10_1_hw_fini +ffffffff81e5c140 t mes_v10_1_suspend +ffffffff81e5c220 t mes_v10_1_resume +ffffffff81e5c270 t mes_v10_1_kiq_hw_init +ffffffff81e5c680 t mes_v10_1_add_hw_queue +ffffffff81e5c800 t mes_v10_1_remove_hw_queue +ffffffff81e5c890 t mes_v10_1_unmap_legacy_queue +ffffffff81e5c980 t mes_v10_1_suspend_gang +ffffffff81e5c9b0 t mes_v10_1_resume_gang +ffffffff81e5c9e0 t mes_v10_1_submit_pkt_and_poll_completion +ffffffff81e5cbe0 t mes_v10_1_load_microcode +ffffffff81e5d3d0 t mes_v10_1_enable +ffffffff81e5d840 t mes_v10_1_queue_init +ffffffff81e5dae0 t amdgpu_bo_unreserve +ffffffff81e5dbc0 t mes_v10_1_ring_get_rptr +ffffffff81e5dbf0 t mes_v10_1_ring_get_wptr +ffffffff81e5dc60 t mes_v10_1_ring_set_wptr +ffffffff81e5e000 t mes_v11_0_late_init +ffffffff81e5e070 t mes_v11_0_sw_init +ffffffff81e5e650 t mes_v11_0_sw_fini +ffffffff81e5e840 t mes_v11_0_hw_init +ffffffff81e5f050 t mes_v11_0_hw_fini +ffffffff81e5f080 t mes_v11_0_suspend +ffffffff81e5f090 t mes_v11_0_resume +ffffffff81e5f0e0 t mes_v11_0_kiq_hw_init +ffffffff81e5f2e0 t mes_v11_0_kiq_hw_fini +ffffffff81e5f720 t mes_v11_0_add_hw_queue +ffffffff81e5f920 t mes_v11_0_remove_hw_queue +ffffffff81e5f9b0 t mes_v11_0_unmap_legacy_queue +ffffffff81e5fab0 t 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mmhub_v1_0_update_power_gating +ffffffff81e65000 t mmhub_v1_7_query_ras_error_count +ffffffff81e65150 t mmhub_v1_7_query_ras_error_status +ffffffff81e65230 t mmhub_v1_7_reset_ras_error_count +ffffffff81e652d0 t mmhub_v1_7_reset_ras_error_status +ffffffff81e653c0 t mmhub_v1_7_get_fb_location +ffffffff81e654d0 t mmhub_v1_7_init +ffffffff81e65570 t mmhub_v1_7_gart_enable +ffffffff81e66a50 t mmhub_v1_7_set_fault_enable_default +ffffffff81e66b60 t mmhub_v1_7_gart_disable +ffffffff81e66df0 t mmhub_v1_7_set_clockgating +ffffffff81e67170 t mmhub_v1_7_get_clockgating +ffffffff81e67290 t mmhub_v1_7_setup_vm_pt_regs +ffffffff81e68000 t mmhub_v2_0_init +ffffffff81e680d0 t mmhub_v2_0_gart_enable +ffffffff81e69250 t mmhub_v2_0_set_fault_enable_default +ffffffff81e69360 t mmhub_v2_0_gart_disable +ffffffff81e695e0 t mmhub_v2_0_set_clockgating +ffffffff81e69920 t mmhub_v2_0_get_clockgating +ffffffff81e69ab0 t mmhub_v2_0_setup_vm_pt_regs +ffffffff81e69bf0 t mmhub_v2_0_print_l2_protection_fault_status +ffffffff81e69e50 t mmhub_v2_0_get_invalidate_req +ffffffff81e6a000 t mmhub_v2_3_init +ffffffff81e6a0e0 t mmhub_v2_3_gart_enable +ffffffff81e6b470 t mmhub_v2_3_set_fault_enable_default +ffffffff81e6b570 t mmhub_v2_3_gart_disable +ffffffff81e6b800 t mmhub_v2_3_set_clockgating +ffffffff81e6bc80 t mmhub_v2_3_get_clockgating +ffffffff81e6be70 t mmhub_v2_3_setup_vm_pt_regs +ffffffff81e6bfb0 t mmhub_v2_3_print_l2_protection_fault_status +ffffffff81e6c1d0 t mmhub_v2_3_get_invalidate_req +ffffffff81e6d000 t mmhub_v3_0_get_fb_location +ffffffff81e6d090 t mmhub_v3_0_get_mc_fb_offset +ffffffff81e6d120 t mmhub_v3_0_init +ffffffff81e6d1f0 t mmhub_v3_0_gart_enable +ffffffff81e6e380 t mmhub_v3_0_set_fault_enable_default +ffffffff81e6e490 t mmhub_v3_0_gart_disable +ffffffff81e6e710 t mmhub_v3_0_set_clockgating +ffffffff81e6e8e0 t mmhub_v3_0_get_clockgating +ffffffff81e6e990 t mmhub_v3_0_setup_vm_pt_regs +ffffffff81e6ead0 t mmhub_v3_0_print_l2_protection_fault_status +ffffffff81e6ecf0 t mmhub_v3_0_get_invalidate_req +ffffffff81e6f000 t mmhub_v3_0_1_get_fb_location +ffffffff81e6f090 t mmhub_v3_0_1_get_mc_fb_offset +ffffffff81e6f120 t mmhub_v3_0_1_init +ffffffff81e6f1f0 t mmhub_v3_0_1_gart_enable +ffffffff81e70470 t mmhub_v3_0_1_set_fault_enable_default +ffffffff81e70570 t mmhub_v3_0_1_gart_disable +ffffffff81e70800 t mmhub_v3_0_1_set_clockgating +ffffffff81e709c0 t mmhub_v3_0_1_get_clockgating +ffffffff81e70a70 t mmhub_v3_0_1_setup_vm_pt_regs +ffffffff81e70bb0 t mmhub_v3_0_1_print_l2_protection_fault_status +ffffffff81e70dc0 t mmhub_v3_0_1_get_invalidate_req +ffffffff81e71000 t mmhub_v3_0_2_get_fb_location +ffffffff81e71090 t mmhub_v3_0_2_get_mc_fb_offset +ffffffff81e71120 t mmhub_v3_0_2_init +ffffffff81e711f0 t mmhub_v3_0_2_gart_enable +ffffffff81e72370 t mmhub_v3_0_2_set_fault_enable_default +ffffffff81e72480 t mmhub_v3_0_2_gart_disable +ffffffff81e72700 t mmhub_v3_0_2_set_clockgating +ffffffff81e72730 t mmhub_v3_0_2_get_clockgating +ffffffff81e72760 t mmhub_v3_0_2_setup_vm_pt_regs +ffffffff81e728a0 t mmhub_v3_0_2_print_l2_protection_fault_status +ffffffff81e72aa0 t mmhub_v3_0_2_get_invalidate_req +ffffffff81e73000 t mmhub_v9_4_query_ras_error_count +ffffffff81e73150 t mmhub_v9_4_query_ras_error_status +ffffffff81e73230 t mmhub_v9_4_reset_ras_error_count +ffffffff81e73300 t mmhub_v9_4_get_fb_location +ffffffff81e73410 t mmhub_v9_4_init +ffffffff81e73560 t mmhub_v9_4_gart_enable +ffffffff81e749f0 t mmhub_v9_4_set_fault_enable_default +ffffffff81e74bd0 t mmhub_v9_4_gart_disable +ffffffff81e74f30 t mmhub_v9_4_set_clockgating +ffffffff81e753f0 t mmhub_v9_4_get_clockgating +ffffffff81e75520 t mmhub_v9_4_setup_vm_pt_regs +ffffffff81e75570 t mmhub_v9_4_setup_hubid_vm_pt_regs +ffffffff81e76000 T xgpu_ai_mailbox_set_irq_funcs +ffffffff81e76050 T xgpu_ai_mailbox_add_irq_id +ffffffff81e760e0 T xgpu_ai_mailbox_get_irq +ffffffff81e76190 t xgpu_ai_mailbox_flr_work +ffffffff81e763a0 T xgpu_ai_mailbox_put_irq +ffffffff81e763e0 t xgpu_ai_request_full_gpu_access +ffffffff81e76400 t xgpu_ai_release_full_gpu_access +ffffffff81e76420 t xgpu_ai_request_init_data +ffffffff81e76480 t xgpu_ai_request_reset +ffffffff81e76530 t xgpu_ai_mailbox_trans_msg +ffffffff81e76760 t xgpu_ai_set_mailbox_ack_irq +ffffffff81e767f0 t xgpu_ai_mailbox_ack_irq +ffffffff81e76840 t xgpu_ai_set_mailbox_rcv_irq +ffffffff81e768d0 t xgpu_ai_mailbox_rcv_irq +ffffffff81e769b0 t xgpu_ai_send_access_requests +ffffffff81e76aa0 t xgpu_ai_poll_msg +ffffffff81e77000 T xgpu_nv_mailbox_set_irq_funcs +ffffffff81e77050 T xgpu_nv_mailbox_add_irq_id +ffffffff81e770e0 T xgpu_nv_mailbox_get_irq +ffffffff81e77190 t xgpu_nv_mailbox_flr_work +ffffffff81e773b0 T xgpu_nv_mailbox_put_irq +ffffffff81e773f0 t xgpu_nv_request_full_gpu_access +ffffffff81e77410 t xgpu_nv_release_full_gpu_access +ffffffff81e77430 t xgpu_nv_request_init_data +ffffffff81e77450 t xgpu_nv_request_reset +ffffffff81e77550 t xgpu_nv_mailbox_trans_msg +ffffffff81e776f0 t xgpu_nv_set_mailbox_ack_irq +ffffffff81e77770 t xgpu_nv_mailbox_ack_irq +ffffffff81e777c0 t xgpu_nv_set_mailbox_rcv_irq +ffffffff81e77840 t xgpu_nv_mailbox_rcv_irq +ffffffff81e778f0 t xgpu_nv_send_access_requests +ffffffff81e78000 T xgpu_vi_init_golden_registers +ffffffff81e780c0 T xgpu_vi_mailbox_set_irq_funcs +ffffffff81e78110 T xgpu_vi_mailbox_add_irq_id +ffffffff81e781a0 T xgpu_vi_mailbox_get_irq +ffffffff81e78250 t xgpu_vi_mailbox_flr_work +ffffffff81e783a0 T xgpu_vi_mailbox_put_irq +ffffffff81e783e0 t xgpu_vi_request_full_gpu_access +ffffffff81e78400 t xgpu_vi_release_full_gpu_access +ffffffff81e78420 t xgpu_vi_request_reset +ffffffff81e78440 t xgpu_vi_wait_reset_cmpl +ffffffff81e78520 t xgpu_vi_set_mailbox_ack_irq +ffffffff81e785a0 t xgpu_vi_mailbox_ack_irq +ffffffff81e785f0 t xgpu_vi_set_mailbox_rcv_irq +ffffffff81e78670 t xgpu_vi_mailbox_rcv_irq +ffffffff81e78720 t xgpu_vi_mailbox_rcv_msg +ffffffff81e78840 t xgpu_vi_send_access_requests +ffffffff81e79000 t navi10_ih_early_init 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nbio_v2_3_mc_access_enable +ffffffff81e7b210 t nbio_v2_3_get_memsize +ffffffff81e7b280 t nbio_v2_3_sdma_doorbell_range +ffffffff81e7b320 t nbio_v2_3_vcn_doorbell_range +ffffffff81e7b3a0 t nbio_v2_3_enable_doorbell_aperture +ffffffff81e7b490 t nbio_v2_3_enable_doorbell_selfring_aperture +ffffffff81e7b5f0 t nbio_v2_3_ih_doorbell_range +ffffffff81e7b700 t nbio_v2_3_update_medium_grain_clock_gating +ffffffff81e7b7a0 t nbio_v2_3_update_medium_grain_light_sleep +ffffffff81e7b840 t nbio_v2_3_get_clockgating_state +ffffffff81e7b8c0 t nbio_v2_3_ih_control +ffffffff81e7ba10 t nbio_v2_3_init_registers +ffffffff81e7baa0 t nbio_v2_3_remap_hdp_registers +ffffffff81e7bbb0 t nbio_v2_3_enable_aspm +ffffffff81e7bc50 t nbio_v2_3_program_aspm +ffffffff81e7c2e0 t nbio_v2_3_apply_lc_spc_mode_wa +ffffffff81e7c370 t nbio_v2_3_apply_l1_link_width_reconfig_wa +ffffffff81e7c3e0 t nbio_v2_3_clear_doorbell_interrupt +ffffffff81e7d000 t nbio_v4_3_get_hdp_flush_req_offset +ffffffff81e7d040 t nbio_v4_3_get_hdp_flush_done_offset +ffffffff81e7d080 t nbio_v4_3_get_pcie_index_offset +ffffffff81e7d0b0 t nbio_v4_3_get_pcie_data_offset +ffffffff81e7d0f0 t nbio_v4_3_get_rev_id +ffffffff81e7d170 t nbio_v4_3_mc_access_enable +ffffffff81e7d220 t nbio_v4_3_get_memsize +ffffffff81e7d290 t nbio_v4_3_sdma_doorbell_range +ffffffff81e7d400 t nbio_v4_3_vcn_doorbell_range +ffffffff81e7d5b0 t nbio_v4_3_gc_doorbell_init +ffffffff81e7d6a0 t nbio_v4_3_enable_doorbell_aperture +ffffffff81e7d790 t nbio_v4_3_enable_doorbell_selfring_aperture +ffffffff81e7d8f0 t nbio_v4_3_ih_doorbell_range +ffffffff81e7da10 t nbio_v4_3_update_medium_grain_clock_gating +ffffffff81e7db50 t nbio_v4_3_update_medium_grain_light_sleep +ffffffff81e7dc80 t nbio_v4_3_get_clockgating_state +ffffffff81e7dd90 t nbio_v4_3_ih_control +ffffffff81e7dee0 t nbio_v4_3_init_registers +ffffffff81e7dff0 t nbio_v4_3_remap_hdp_registers +ffffffff81e7e100 t nbio_v4_3_program_aspm +ffffffff81e7eda0 t nbio_v4_3_get_rom_offset +ffffffff81e7ee30 t nbio_v4_3_sriov_sdma_doorbell_range +ffffffff81e7ee60 t nbio_v4_3_sriov_vcn_doorbell_range +ffffffff81e7ee90 t nbio_v4_3_sriov_gc_doorbell_init +ffffffff81e7eec0 t nbio_v4_3_sriov_ih_doorbell_range +ffffffff81e7f000 t nbio_v6_1_get_hdp_flush_req_offset +ffffffff81e7f040 t nbio_v6_1_get_hdp_flush_done_offset +ffffffff81e7f080 t nbio_v6_1_get_pcie_index_offset +ffffffff81e7f0c0 t nbio_v6_1_get_pcie_data_offset +ffffffff81e7f100 t nbio_v6_1_get_rev_id +ffffffff81e7f180 t nbio_v6_1_mc_access_enable +ffffffff81e7f230 t nbio_v6_1_get_memsize +ffffffff81e7f2a0 t nbio_v6_1_sdma_doorbell_range +ffffffff81e7f330 t nbio_v6_1_enable_doorbell_aperture +ffffffff81e7f420 t nbio_v6_1_enable_doorbell_selfring_aperture +ffffffff81e7f580 t nbio_v6_1_ih_doorbell_range +ffffffff81e7f690 t nbio_v6_1_update_medium_grain_clock_gating +ffffffff81e7f730 t nbio_v6_1_update_medium_grain_light_sleep +ffffffff81e7f7d0 t nbio_v6_1_get_clockgating_state +ffffffff81e7f850 t nbio_v6_1_ih_control +ffffffff81e7f9a0 t nbio_v6_1_init_registers +ffffffff81e7fa70 t nbio_v6_1_remap_hdp_registers +ffffffff81e7fb80 t nbio_v6_1_program_aspm +ffffffff81e80000 t nbio_v7_0_get_hdp_flush_req_offset +ffffffff81e80040 t nbio_v7_0_get_hdp_flush_done_offset +ffffffff81e80080 t nbio_v7_0_get_pcie_index_offset +ffffffff81e800c0 t nbio_v7_0_get_pcie_data_offset +ffffffff81e80100 t nbio_v7_0_get_rev_id +ffffffff81e80180 t nbio_v7_0_mc_access_enable +ffffffff81e80230 t nbio_v7_0_get_memsize +ffffffff81e802a0 t nbio_v7_0_sdma_doorbell_range +ffffffff81e80330 t nbio_v7_0_vcn_doorbell_range +ffffffff81e803b0 t nbio_v7_0_enable_doorbell_aperture +ffffffff81e804a0 t nbio_v7_0_enable_doorbell_selfring_aperture +ffffffff81e804d0 t nbio_v7_0_ih_doorbell_range +ffffffff81e805e0 t nbio_v7_0_update_medium_grain_clock_gating +ffffffff81e80710 t nbio_v7_0_update_medium_grain_light_sleep +ffffffff81e807b0 t nbio_v7_0_get_clockgating_state +ffffffff81e80830 t nbio_v7_0_ih_control +ffffffff81e80980 t nbio_v7_0_init_registers +ffffffff81e809d0 t nbio_v7_0_remap_hdp_registers +ffffffff81e80ae0 t nbio_7_0_read_syshub_ind_mmr +ffffffff81e80bb0 t nbio_7_0_write_syshub_ind_mmr +ffffffff81e81000 t nbio_v7_2_get_hdp_flush_req_offset +ffffffff81e81040 t nbio_v7_2_get_hdp_flush_done_offset +ffffffff81e81080 t nbio_v7_2_get_pcie_index_offset +ffffffff81e810c0 t nbio_v7_2_get_pcie_data_offset +ffffffff81e81100 t nbio_v7_2_get_pcie_port_index_offset +ffffffff81e81130 t nbio_v7_2_get_pcie_port_data_offset +ffffffff81e81170 t nbio_v7_2_get_rev_id +ffffffff81e81250 t nbio_v7_2_mc_access_enable +ffffffff81e81390 t nbio_v7_2_get_memsize +ffffffff81e81400 t nbio_v7_2_sdma_doorbell_range +ffffffff81e814a0 t nbio_v7_2_vcn_doorbell_range +ffffffff81e81520 t nbio_v7_2_enable_doorbell_aperture +ffffffff81e81600 t nbio_v7_2_enable_doorbell_selfring_aperture +ffffffff81e81760 t nbio_v7_2_ih_doorbell_range +ffffffff81e817f0 t nbio_v7_2_update_medium_grain_clock_gating +ffffffff81e818b0 t nbio_v7_2_update_medium_grain_light_sleep +ffffffff81e81a40 t nbio_v7_2_get_clockgating_state +ffffffff81e81ad0 t nbio_v7_2_ih_control +ffffffff81e81c20 t nbio_v7_2_init_registers +ffffffff81e81de0 t nbio_v7_2_remap_hdp_registers +ffffffff81e82000 t nbio_v7_4_query_ras_error_count +ffffffff81e821a0 t nbio_v7_4_handle_ras_controller_intr_no_bifring +ffffffff81e823e0 t nbio_v7_4_handle_ras_err_event_athub_intr_no_bifring +ffffffff81e82590 t nbio_v7_4_init_ras_controller_interrupt +ffffffff81e825d0 t nbio_v7_4_init_ras_err_event_athub_interrupt +ffffffff81e82610 t nbio_v7_4_get_hdp_flush_req_offset +ffffffff81e82650 t nbio_v7_4_get_hdp_flush_done_offset +ffffffff81e82690 t nbio_v7_4_get_pcie_index_offset +ffffffff81e826d0 t nbio_v7_4_get_pcie_data_offset +ffffffff81e82710 t nbio_v7_4_get_rev_id +ffffffff81e827d0 t nbio_v7_4_mc_access_enable +ffffffff81e82880 t nbio_v7_4_get_memsize +ffffffff81e828f0 t nbio_v7_4_sdma_doorbell_range +ffffffff81e829c0 t nbio_v7_4_vcn_doorbell_range +ffffffff81e82a60 t nbio_v7_4_enable_doorbell_aperture +ffffffff81e82b50 t nbio_v7_4_enable_doorbell_selfring_aperture +ffffffff81e82cb0 t nbio_v7_4_ih_doorbell_range +ffffffff81e82dc0 t nbio_v7_4_enable_doorbell_interrupt +ffffffff81e82f00 t nbio_v7_4_update_medium_grain_clock_gating +ffffffff81e82f30 t nbio_v7_4_update_medium_grain_light_sleep +ffffffff81e82fd0 t nbio_v7_4_get_clockgating_state +ffffffff81e83050 t nbio_v7_4_ih_control +ffffffff81e831a0 t nbio_v7_4_init_registers +ffffffff81e83290 t nbio_v7_4_remap_hdp_registers +ffffffff81e833a0 t nbio_v7_4_program_aspm +ffffffff81e837b0 t nbio_v7_4_set_ras_controller_irq_state +ffffffff81e83940 t nbio_v7_4_process_ras_controller_irq +ffffffff81e83970 t nbio_v7_4_set_ras_err_event_athub_irq_state +ffffffff81e83b00 t nbio_v7_4_process_err_event_athub_irq +ffffffff81e84000 t nbio_v7_7_get_hdp_flush_req_offset +ffffffff81e84040 t nbio_v7_7_get_hdp_flush_done_offset +ffffffff81e84080 t nbio_v7_7_get_pcie_index_offset +ffffffff81e840c0 t nbio_v7_7_get_pcie_data_offset +ffffffff81e84100 t nbio_v7_7_get_pcie_port_index_offset +ffffffff81e84130 t nbio_v7_7_get_pcie_port_data_offset +ffffffff81e84170 t nbio_v7_7_get_rev_id +ffffffff81e841f0 t nbio_v7_7_mc_access_enable +ffffffff81e842a0 t nbio_v7_7_get_memsize +ffffffff81e84310 t nbio_v7_7_sdma_doorbell_range +ffffffff81e843a0 t nbio_v7_7_vcn_doorbell_range +ffffffff81e84420 t nbio_v7_7_enable_doorbell_aperture +ffffffff81e84500 t nbio_v7_7_enable_doorbell_selfring_aperture +ffffffff81e84660 t nbio_v7_7_ih_doorbell_range +ffffffff81e84770 t nbio_v7_7_update_medium_grain_clock_gating +ffffffff81e848b0 t nbio_v7_7_update_medium_grain_light_sleep +ffffffff81e84ac0 t nbio_v7_7_get_clockgating_state +ffffffff81e84bd0 t nbio_v7_7_ih_control +ffffffff81e84d20 t nbio_v7_7_init_registers +ffffffff81e84e20 t nbio_v7_7_remap_hdp_registers +ffffffff81e85000 T nv_grbm_select +ffffffff81e850a0 T nv_set_virt_ops +ffffffff81e850e0 t nv_common_early_init +ffffffff81e854d0 t nv_common_late_init +ffffffff81e85540 t nv_common_sw_init +ffffffff81e85580 t nv_common_sw_fini +ffffffff81e855b0 t nv_common_hw_init +ffffffff81e856c0 t nv_common_hw_fini +ffffffff81e85720 t nv_common_suspend +ffffffff81e85780 t nv_common_resume +ffffffff81e857c0 t nv_common_is_idle +ffffffff81e857f0 t nv_common_wait_for_idle +ffffffff81e85820 t nv_common_soft_reset +ffffffff81e85850 t nv_common_set_clockgating_state +ffffffff81e85920 t nv_common_set_powergating_state +ffffffff81e85950 t nv_common_get_clockgating_state +ffffffff81e859c0 t nv_pcie_rreg +ffffffff81e85a20 t nv_pcie_wreg +ffffffff81e85a80 t nv_pcie_rreg64 +ffffffff81e85ae0 t nv_pcie_wreg64 +ffffffff81e85b40 t nv_didt_rreg +ffffffff81e85be0 t nv_didt_wreg +ffffffff81e85c60 t nv_read_disabled_bios +ffffffff81e85c90 t nv_read_register +ffffffff81e85d70 t nv_vga_set_state +ffffffff81e85da0 t nv_asic_reset +ffffffff81e85ee0 t nv_asic_reset_method +ffffffff81e85fd0 t nv_get_xclk +ffffffff81e86000 t nv_set_uvd_clocks +ffffffff81e86030 t nv_set_vce_clocks +ffffffff81e86060 t nv_get_config_memsize +ffffffff81e86080 t nv_need_full_reset +ffffffff81e860b0 t nv_init_doorbell_index +ffffffff81e861e0 t nv_need_reset_on_init +ffffffff81e86270 t nv_get_pcie_replay_count +ffffffff81e862a0 t nv_pre_asic_init +ffffffff81e862d0 t nv_update_umd_stable_pstate +ffffffff81e86390 t nv_query_video_codecs +ffffffff81e87000 T psp_v10_0_set_psp_funcs +ffffffff81e87030 t psp_v10_0_init_microcode +ffffffff81e872a0 t psp_v10_0_ring_init +ffffffff81e87320 t psp_v10_0_ring_create +ffffffff81e87630 t psp_v10_0_ring_stop +ffffffff81e87820 t psp_v10_0_ring_destroy +ffffffff81e878a0 t psp_v10_0_mode1_reset +ffffffff81e878f0 t psp_v10_0_ring_get_wptr +ffffffff81e87950 t psp_v10_0_ring_set_wptr +ffffffff81e88000 T psp_v11_0_set_psp_funcs +ffffffff81e88030 t psp_v11_0_init_microcode +ffffffff81e88450 t psp_v11_0_bootloader_load_kdb +ffffffff81e88470 t psp_v11_0_bootloader_load_spl +ffffffff81e88490 t psp_v11_0_bootloader_load_sysdrv +ffffffff81e884b0 t psp_v11_0_bootloader_load_sos +ffffffff81e88800 t psp_v11_0_ring_init +ffffffff81e88880 t psp_v11_0_ring_create +ffffffff81e88f10 t psp_v11_0_ring_stop +ffffffff81e89130 t psp_v11_0_ring_destroy +ffffffff81e891b0 t psp_v11_0_mode1_reset +ffffffff81e892b0 t psp_v11_0_memory_training +ffffffff81e89730 t psp_v11_0_ring_get_wptr +ffffffff81e89780 t psp_v11_0_ring_set_wptr +ffffffff81e898c0 t psp_v11_0_load_usbc_pd_fw +ffffffff81e89ab0 t psp_v11_0_read_usbc_pd_fw +ffffffff81e89bd0 t psp_v11_0_bootloader_load_component +ffffffff81e89d90 t psp_v11_0_wait_for_bootloader +ffffffff81e89f60 t psp_v11_0_memory_training_send_msg +ffffffff81e8b000 T psp_v11_0_8_set_psp_funcs +ffffffff81e8b030 t psp_v11_0_8_ring_init +ffffffff81e8b0b0 t psp_v11_0_8_ring_create +ffffffff81e8b740 t psp_v11_0_8_ring_stop +ffffffff81e8bad0 t psp_v11_0_8_ring_destroy +ffffffff81e8bb50 t psp_v11_0_8_ring_get_wptr +ffffffff81e8bbc0 t psp_v11_0_8_ring_set_wptr +ffffffff81e8c000 T psp_v12_0_set_psp_funcs +ffffffff81e8c030 t psp_v12_0_init_microcode +ffffffff81e8c2a0 t psp_v12_0_bootloader_load_sysdrv +ffffffff81e8c5c0 t psp_v12_0_bootloader_load_sos +ffffffff81e8c920 t psp_v12_0_ring_init +ffffffff81e8cf00 t psp_v12_0_ring_create +ffffffff81e8d460 t psp_v12_0_ring_stop +ffffffff81e8d680 t psp_v12_0_ring_destroy +ffffffff81e8d700 t psp_v12_0_mode1_reset +ffffffff81e8d800 t psp_v12_0_ring_get_wptr +ffffffff81e8d870 t psp_v12_0_ring_set_wptr +ffffffff81e8e000 T psp_v13_0_set_psp_funcs +ffffffff81e8e030 t psp_v13_0_init_microcode +ffffffff81e8e160 t psp_v13_0_bootloader_load_kdb +ffffffff81e8e180 t psp_v13_0_bootloader_load_spl +ffffffff81e8e1a0 t psp_v13_0_bootloader_load_sysdrv +ffffffff81e8e1c0 t psp_v13_0_bootloader_load_soc_drv +ffffffff81e8e1e0 t psp_v13_0_bootloader_load_intf_drv +ffffffff81e8e200 t psp_v13_0_bootloader_load_dbg_drv +ffffffff81e8e220 t psp_v13_0_bootloader_load_ras_drv +ffffffff81e8e240 t psp_v13_0_bootloader_load_sos +ffffffff81e8e5a0 t psp_v13_0_ring_init +ffffffff81e8e620 t psp_v13_0_ring_create +ffffffff81e8ecb0 t psp_v13_0_ring_stop +ffffffff81e8f040 t psp_v13_0_ring_destroy +ffffffff81e8f0c0 t psp_v13_0_memory_training +ffffffff81e8f500 t psp_v13_0_ring_get_wptr +ffffffff81e8f570 t psp_v13_0_ring_set_wptr +ffffffff81e8f670 t psp_v13_0_load_usbc_pd_fw +ffffffff81e8f860 t psp_v13_0_read_usbc_pd_fw +ffffffff81e8f980 t psp_v13_0_update_spirom +ffffffff81e8fb60 t psp_v13_0_vbflash_status +ffffffff81e8fbc0 t psp_v13_0_bootloader_load_component +ffffffff81e8fd90 t psp_v13_0_wait_for_bootloader +ffffffff81e8ff60 t psp_v13_0_memory_training_send_msg +ffffffff81e900c0 t psp_v13_0_exec_spi_cmd +ffffffff81e91000 T psp_v13_0_4_set_psp_funcs +ffffffff81e91030 t psp_v13_0_4_init_microcode +ffffffff81e91100 t psp_v13_0_4_bootloader_load_kdb +ffffffff81e91120 t psp_v13_0_4_bootloader_load_spl +ffffffff81e91140 t psp_v13_0_4_bootloader_load_sysdrv +ffffffff81e91160 t psp_v13_0_4_bootloader_load_soc_drv +ffffffff81e91180 t psp_v13_0_4_bootloader_load_intf_drv +ffffffff81e911a0 t psp_v13_0_4_bootloader_load_dbg_drv +ffffffff81e911c0 t psp_v13_0_4_bootloader_load_sos +ffffffff81e91530 t psp_v13_0_4_ring_init +ffffffff81e915b0 t psp_v13_0_4_ring_create +ffffffff81e91c50 t psp_v13_0_4_ring_stop +ffffffff81e91fe0 t psp_v13_0_4_ring_destroy +ffffffff81e92060 t psp_v13_0_4_ring_get_wptr +ffffffff81e920d0 t psp_v13_0_4_ring_set_wptr +ffffffff81e921d0 t psp_v13_0_4_bootloader_load_component +ffffffff81e923a0 t psp_v13_0_4_wait_for_bootloader +ffffffff81e93000 T psp_v3_1_set_psp_funcs +ffffffff81e93030 t psp_v3_1_init_microcode +ffffffff81e930f0 t psp_v3_1_bootloader_load_sysdrv +ffffffff81e93410 t psp_v3_1_bootloader_load_sos +ffffffff81e93770 t psp_v3_1_ring_init +ffffffff81e937f0 t psp_v3_1_ring_create +ffffffff81e942f0 t psp_v3_1_ring_stop +ffffffff81e94510 t psp_v3_1_ring_destroy +ffffffff81e94590 t psp_v3_1_smu_reload_quirk +ffffffff81e945e0 t psp_v3_1_mode1_reset +ffffffff81e946e0 t psp_v3_1_ring_get_wptr +ffffffff81e94730 t psp_v3_1_ring_set_wptr +ffffffff81e95000 t sdma_v2_4_early_init +ffffffff81e950e0 t sdma_v2_4_sw_init +ffffffff81e95470 t sdma_v2_4_sw_fini +ffffffff81e95550 t sdma_v2_4_hw_init +ffffffff81e95910 t sdma_v2_4_hw_fini +ffffffff81e95950 t sdma_v2_4_suspend +ffffffff81e95990 t sdma_v2_4_resume +ffffffff81e959a0 t sdma_v2_4_is_idle +ffffffff81e959e0 t sdma_v2_4_wait_for_idle +ffffffff81e95a80 t sdma_v2_4_soft_reset +ffffffff81e95bc0 t sdma_v2_4_set_clockgating_state +ffffffff81e95bf0 t sdma_v2_4_set_powergating_state +ffffffff81e95c20 t sdma_v2_4_ring_get_rptr +ffffffff81e95c60 t sdma_v2_4_ring_get_wptr +ffffffff81e95cc0 t sdma_v2_4_ring_set_wptr +ffffffff81e95d00 t sdma_v2_4_ring_emit_ib +ffffffff81e95fb0 t sdma_v2_4_ring_emit_fence +ffffffff81e963b0 t sdma_v2_4_ring_emit_pipeline_sync +ffffffff81e96630 t sdma_v2_4_ring_emit_vm_flush +ffffffff81e968b0 t sdma_v2_4_ring_emit_hdp_flush +ffffffff81e96b30 t sdma_v2_4_ring_test_ring +ffffffff81e96e10 t sdma_v2_4_ring_test_ib +ffffffff81e96ff0 t sdma_v2_4_ring_insert_nop +ffffffff81e97120 t sdma_v2_4_ring_pad_ib +ffffffff81e97250 t sdma_v2_4_ring_emit_wreg +ffffffff81e973a0 t sdma_v2_4_emit_copy_buffer +ffffffff81e97460 t sdma_v2_4_emit_fill_buffer +ffffffff81e974f0 t sdma_v2_4_vm_copy_pte +ffffffff81e975b0 t sdma_v2_4_vm_write_pte +ffffffff81e97680 t sdma_v2_4_vm_set_pte_pde +ffffffff81e97780 t sdma_v2_4_set_trap_irq_state +ffffffff81e97840 t sdma_v2_4_process_trap_irq +ffffffff81e978e0 t sdma_v2_4_process_illegal_inst_irq +ffffffff81e97960 t sdma_v2_4_enable +ffffffff81e98000 t sdma_v3_0_early_init +ffffffff81e98150 t sdma_v3_0_sw_init +ffffffff81e98500 t sdma_v3_0_sw_fini +ffffffff81e985e0 t sdma_v3_0_hw_init +ffffffff81e98710 t sdma_v3_0_hw_fini +ffffffff81e98760 t sdma_v3_0_suspend +ffffffff81e987b0 t sdma_v3_0_resume +ffffffff81e987c0 t sdma_v3_0_is_idle +ffffffff81e98800 t sdma_v3_0_wait_for_idle +ffffffff81e988a0 t sdma_v3_0_check_soft_reset +ffffffff81e98900 t sdma_v3_0_pre_soft_reset +ffffffff81e98950 t sdma_v3_0_soft_reset +ffffffff81e98a20 t sdma_v3_0_post_soft_reset +ffffffff81e98a70 t sdma_v3_0_set_clockgating_state +ffffffff81e98cd0 t sdma_v3_0_set_powergating_state +ffffffff81e98d00 t sdma_v3_0_get_clockgating_state +ffffffff81e98d80 t sdma_v3_0_ring_get_rptr +ffffffff81e98dc0 t sdma_v3_0_ring_get_wptr +ffffffff81e98e40 t sdma_v3_0_ring_set_wptr +ffffffff81e98ef0 t sdma_v3_0_ring_emit_ib +ffffffff81e991a0 t sdma_v3_0_ring_emit_fence +ffffffff81e995a0 t sdma_v3_0_ring_emit_pipeline_sync +ffffffff81e99820 t sdma_v3_0_ring_emit_vm_flush +ffffffff81e99aa0 t sdma_v3_0_ring_emit_hdp_flush +ffffffff81e99d20 t sdma_v3_0_ring_test_ring +ffffffff81e9a000 t sdma_v3_0_ring_test_ib +ffffffff81e9a1e0 t sdma_v3_0_ring_insert_nop +ffffffff81e9a310 t sdma_v3_0_ring_pad_ib +ffffffff81e9a440 t sdma_v3_0_ring_emit_wreg +ffffffff81e9a590 t sdma_v3_0_emit_copy_buffer +ffffffff81e9a650 t sdma_v3_0_emit_fill_buffer +ffffffff81e9a6e0 t sdma_v3_0_vm_copy_pte +ffffffff81e9a7a0 t sdma_v3_0_vm_write_pte +ffffffff81e9a870 t sdma_v3_0_vm_set_pte_pde +ffffffff81e9a970 t sdma_v3_0_set_trap_irq_state +ffffffff81e9aa30 t sdma_v3_0_process_trap_irq +ffffffff81e9aad0 t sdma_v3_0_process_illegal_inst_irq +ffffffff81e9ab50 t sdma_v3_0_ctx_switch_enable +ffffffff81e9ace0 t sdma_v3_0_enable +ffffffff81e9ae50 t sdma_v3_0_gfx_resume +ffffffff81e9c000 t sdma_v4_0_early_init +ffffffff81e9c580 t sdma_v4_0_late_init +ffffffff81e9c820 t sdma_v4_0_sw_init +ffffffff81e9cba0 t sdma_v4_0_sw_fini +ffffffff81e9cc60 t sdma_v4_0_hw_init +ffffffff81e9fc00 t sdma_v4_0_hw_fini +ffffffff81e9fcb0 t sdma_v4_0_suspend +ffffffff81e9fd00 t sdma_v4_0_resume +ffffffff81e9fd80 t sdma_v4_0_is_idle +ffffffff81e9feb0 t sdma_v4_0_wait_for_idle +ffffffff81ea0050 t sdma_v4_0_soft_reset +ffffffff81ea0080 t sdma_v4_0_set_clockgating_state +ffffffff81ea0580 t sdma_v4_0_set_powergating_state +ffffffff81ea0640 t sdma_v4_0_get_clockgating_state +ffffffff81ea06e0 t sdma_v4_0_query_ras_error_count +ffffffff81ea08b0 t sdma_v4_0_reset_ras_error_count +ffffffff81ea0a00 t sdma_v4_0_ring_get_rptr +ffffffff81ea0a60 t sdma_v4_0_ring_get_wptr +ffffffff81ea0c50 t sdma_v4_0_ring_set_wptr +ffffffff81ea0ed0 t sdma_v4_0_ring_emit_ib +ffffffff81ea1180 t sdma_v4_0_ring_emit_fence +ffffffff81ea15b0 t sdma_v4_0_ring_emit_pipeline_sync +ffffffff81ea1610 t sdma_v4_0_ring_emit_vm_flush +ffffffff81ea1630 t sdma_v4_0_ring_emit_hdp_flush +ffffffff81ea16d0 t sdma_v4_0_ring_test_ring +ffffffff81ea19b0 t sdma_v4_0_ring_test_ib +ffffffff81ea1b90 t sdma_v4_0_ring_insert_nop +ffffffff81ea1cc0 t sdma_v4_0_ring_pad_ib +ffffffff81ea1df0 t sdma_v4_0_ring_emit_wreg +ffffffff81ea1f40 t sdma_v4_0_ring_emit_reg_wait +ffffffff81ea1f90 t sdma_v4_0_wait_reg_mem +ffffffff81ea22c0 t sdma_v4_0_page_ring_get_wptr +ffffffff81ea2470 t sdma_v4_0_page_ring_set_wptr +ffffffff81ea2630 t sdma_v4_0_emit_copy_buffer +ffffffff81ea26f0 t sdma_v4_0_emit_fill_buffer +ffffffff81ea2780 t sdma_v4_0_vm_copy_pte +ffffffff81ea2840 t sdma_v4_0_vm_write_pte +ffffffff81ea2910 t sdma_v4_0_vm_set_pte_pde +ffffffff81ea2a10 t sdma_v4_0_set_trap_irq_state +ffffffff81ea2bb0 t sdma_v4_0_process_trap_irq +ffffffff81ea2cf0 t sdma_v4_0_process_illegal_inst_irq +ffffffff81ea2e10 t sdma_v4_0_set_ecc_irq_state +ffffffff81ea2fb0 t sdma_v4_0_process_vm_hole_irq +ffffffff81ea30f0 t sdma_v4_0_process_doorbell_invalid_irq +ffffffff81ea3230 t sdma_v4_0_process_pool_timeout_irq +ffffffff81ea3370 t sdma_v4_0_process_srbm_write_irq +ffffffff81ea34b0 t sdma_v4_0_process_ras_data_cb +ffffffff81ea3530 t sdma_v4_0_ctx_switch_enable +ffffffff81ea3be0 t sdma_v4_0_enable +ffffffff81ea4180 t sdma_v4_0_gfx_enable +ffffffff81ea5000 t sdma_v4_4_query_ras_error_count +ffffffff81ea5270 t sdma_v4_4_reset_ras_error_count +ffffffff81ea6000 t sdma_v5_0_early_init +ffffffff81ea6170 t sdma_v5_0_sw_init +ffffffff81ea6410 t sdma_v5_0_sw_fini +ffffffff81ea64a0 t sdma_v5_0_hw_init +ffffffff81ea7750 t sdma_v5_0_hw_fini +ffffffff81ea77b0 t sdma_v5_0_suspend +ffffffff81ea7810 t sdma_v5_0_resume +ffffffff81ea7820 t sdma_v5_0_is_idle +ffffffff81ea78b0 t sdma_v5_0_wait_for_idle +ffffffff81ea7970 t sdma_v5_0_soft_reset +ffffffff81ea79a0 t sdma_v5_0_set_clockgating_state +ffffffff81ea7ba0 t sdma_v5_0_set_powergating_state +ffffffff81ea7bd0 t sdma_v5_0_get_clockgating_state +ffffffff81ea7c70 t sdma_v5_0_ring_get_rptr +ffffffff81ea7cd0 t sdma_v5_0_ring_get_wptr +ffffffff81ea7e70 t sdma_v5_0_ring_set_wptr +ffffffff81ea81d0 t sdma_v5_0_ring_emit_ib +ffffffff81ea8490 t sdma_v5_0_ring_emit_fence +ffffffff81ea8900 t sdma_v5_0_ring_emit_pipeline_sync +ffffffff81ea8b80 t sdma_v5_0_ring_emit_vm_flush +ffffffff81ea8ba0 t sdma_v5_0_ring_emit_hdp_flush +ffffffff81ea8e40 t sdma_v5_0_ring_test_ring +ffffffff81ea9210 t sdma_v5_0_ring_test_ib +ffffffff81ea9540 t sdma_v5_0_ring_insert_nop +ffffffff81ea9670 t sdma_v5_0_ring_pad_ib +ffffffff81ea97a0 t sdma_v5_0_ring_init_cond_exec +ffffffff81ea99d0 t sdma_v5_0_ring_patch_cond_exec +ffffffff81ea9a90 t sdma_v5_0_ring_emit_wreg +ffffffff81ea9be0 t sdma_v5_0_ring_emit_reg_wait +ffffffff81ea9e60 t sdma_v5_0_ring_emit_reg_write_reg_wait +ffffffff81ea9ee0 t sdma_v5_0_ring_preempt_ib +ffffffff81eaa020 t sdma_v5_0_ring_emit_mem_sync +ffffffff81eaa230 t sdma_v5_0_emit_copy_buffer +ffffffff81eaa2f0 t sdma_v5_0_emit_fill_buffer +ffffffff81eaa380 t sdma_v5_0_vm_copy_pte +ffffffff81eaa440 t sdma_v5_0_vm_write_pte +ffffffff81eaa510 t sdma_v5_0_vm_set_pte_pde +ffffffff81eaa610 t sdma_v5_0_set_trap_irq_state +ffffffff81eaa6a0 t sdma_v5_0_process_trap_irq +ffffffff81eaa7b0 t sdma_v5_0_process_illegal_inst_irq +ffffffff81eaa7e0 t sdma_v5_0_mqd_init +ffffffff81eaa8c0 t sdma_v5_0_ctx_switch_enable +ffffffff81eaabc0 t sdma_v5_0_enable +ffffffff81eab000 t sdma_v5_2_early_init +ffffffff81eab170 t sdma_v5_2_sw_init +ffffffff81eab3a0 t sdma_v5_2_sw_fini +ffffffff81eab430 t sdma_v5_2_hw_init +ffffffff81eab770 t sdma_v5_2_hw_fini +ffffffff81eab7d0 t sdma_v5_2_suspend +ffffffff81eab830 t sdma_v5_2_resume +ffffffff81eab840 t sdma_v5_2_is_idle +ffffffff81eab900 t sdma_v5_2_wait_for_idle +ffffffff81eaba00 t sdma_v5_2_soft_reset +ffffffff81eabca0 t sdma_v5_2_set_clockgating_state +ffffffff81eabfc0 t sdma_v5_2_set_powergating_state +ffffffff81eabff0 t sdma_v5_2_get_clockgating_state +ffffffff81eac080 t sdma_v5_2_ring_get_rptr +ffffffff81eac0e0 t sdma_v5_2_ring_get_wptr +ffffffff81eac220 t sdma_v5_2_ring_set_wptr +ffffffff81eac3e0 t sdma_v5_2_ring_emit_ib +ffffffff81eac6a0 t sdma_v5_2_ring_emit_fence +ffffffff81eacb10 t sdma_v5_2_ring_emit_pipeline_sync +ffffffff81eacd90 t sdma_v5_2_ring_emit_vm_flush +ffffffff81eacdb0 t sdma_v5_2_ring_emit_hdp_flush +ffffffff81ead050 t sdma_v5_2_ring_test_ring +ffffffff81ead420 t sdma_v5_2_ring_test_ib +ffffffff81ead750 t sdma_v5_2_ring_insert_nop +ffffffff81ead880 t sdma_v5_2_ring_pad_ib +ffffffff81ead9b0 t sdma_v5_2_ring_init_cond_exec +ffffffff81eadbe0 t sdma_v5_2_ring_patch_cond_exec +ffffffff81eadca0 t sdma_v5_2_ring_emit_wreg +ffffffff81eaddf0 t sdma_v5_2_ring_emit_reg_wait +ffffffff81eae070 t sdma_v5_2_ring_emit_reg_write_reg_wait +ffffffff81eae0f0 t sdma_v5_2_ring_preempt_ib +ffffffff81eae260 t sdma_v5_2_ring_emit_mem_sync +ffffffff81eae470 t sdma_v5_2_emit_copy_buffer +ffffffff81eae530 t sdma_v5_2_emit_fill_buffer +ffffffff81eae5c0 t sdma_v5_2_vm_copy_pte +ffffffff81eae680 t sdma_v5_2_vm_write_pte +ffffffff81eae750 t sdma_v5_2_vm_set_pte_pde +ffffffff81eae850 t sdma_v5_2_set_trap_irq_state +ffffffff81eae910 t sdma_v5_2_process_trap_irq +ffffffff81eaea50 t sdma_v5_2_process_illegal_inst_irq +ffffffff81eaea80 t sdma_v5_2_mqd_init +ffffffff81eaeb60 t sdma_v5_2_ctx_switch_enable +ffffffff81eaef60 t sdma_v5_2_enable +ffffffff81eaf370 t sdma_v5_2_gfx_resume +ffffffff81eb1000 t sdma_v6_0_early_init +ffffffff81eb1140 t sdma_v6_0_sw_init +ffffffff81eb1320 t sdma_v6_0_sw_fini +ffffffff81eb13b0 t sdma_v6_0_hw_init +ffffffff81eb13c0 t sdma_v6_0_hw_fini +ffffffff81eb1410 t sdma_v6_0_suspend +ffffffff81eb1460 t sdma_v6_0_resume +ffffffff81eb1470 t sdma_v6_0_is_idle +ffffffff81eb1500 t sdma_v6_0_wait_for_idle +ffffffff81eb15c0 t sdma_v6_0_check_soft_reset +ffffffff81eb1680 t sdma_v6_0_soft_reset +ffffffff81eb1b20 t sdma_v6_0_set_clockgating_state +ffffffff81eb1b50 t sdma_v6_0_set_powergating_state +ffffffff81eb1b80 t sdma_v6_0_get_clockgating_state +ffffffff81eb1bb0 t sdma_v6_0_ring_get_rptr +ffffffff81eb1c10 t sdma_v6_0_ring_get_wptr +ffffffff81eb1c80 t sdma_v6_0_ring_set_wptr +ffffffff81eb1fe0 t sdma_v6_0_ring_emit_ib +ffffffff81eb22a0 t sdma_v6_0_ring_emit_fence +ffffffff81eb2710 t sdma_v6_0_ring_emit_pipeline_sync +ffffffff81eb2990 t sdma_v6_0_ring_emit_vm_flush +ffffffff81eb29b0 t sdma_v6_0_ring_emit_hdp_flush +ffffffff81eb2c50 t sdma_v6_0_ring_test_ring +ffffffff81eb3020 t sdma_v6_0_ring_test_ib +ffffffff81eb3350 t sdma_v6_0_ring_insert_nop +ffffffff81eb3480 t sdma_v6_0_ring_pad_ib +ffffffff81eb35b0 t sdma_v6_0_ring_init_cond_exec +ffffffff81eb37e0 t sdma_v6_0_ring_patch_cond_exec +ffffffff81eb38a0 t sdma_v6_0_ring_emit_wreg +ffffffff81eb39f0 t sdma_v6_0_ring_emit_reg_wait +ffffffff81eb3c70 t sdma_v6_0_ring_emit_reg_write_reg_wait +ffffffff81eb3cf0 t sdma_v6_0_ring_preempt_ib +ffffffff81eb3e40 t sdma_v6_0_ring_emit_mem_sync +ffffffff81eb4050 t sdma_v6_0_emit_copy_buffer +ffffffff81eb4110 t sdma_v6_0_emit_fill_buffer +ffffffff81eb41a0 t sdma_v6_0_vm_copy_pte +ffffffff81eb4260 t sdma_v6_0_vm_write_pte +ffffffff81eb4330 t sdma_v6_0_vm_set_pte_pde +ffffffff81eb4430 t sdma_v6_0_set_trap_irq_state +ffffffff81eb44c0 t sdma_v6_0_process_trap_irq +ffffffff81eb45f0 t sdma_v6_0_process_illegal_inst_irq +ffffffff81eb4620 t sdma_v6_0_mqd_init +ffffffff81eb4740 t sdma_v6_0_start +ffffffff81eb49c0 t sdma_v6_0_enable +ffffffff81eb4b40 t sdma_v6_0_gfx_resume +ffffffff81eb5bc0 t sdma_v6_0_gfx_stop +ffffffff81eb6000 T sienna_cichlid_reset_init +ffffffff81eb60c0 t sienna_cichlid_async_reset +ffffffff81eb6120 t sienna_cichlid_get_reset_handler +ffffffff81eb6180 T sienna_cichlid_reset_fini +ffffffff81eb61e0 t sienna_cichlid_mode2_prepare_hwcontext +ffffffff81eb6330 t sienna_cichlid_mode2_perform_reset +ffffffff81eb63b0 t sienna_cichlid_mode2_restore_hwcontext +ffffffff81eb66b0 t sienna_cichlid_mode2_reset +ffffffff81eb7000 T smu_v11_0_i2c_control_init +ffffffff81eb70d0 T smu_v11_0_i2c_control_fini +ffffffff81eb7110 t smu_v11_0_i2c_xfer +ffffffff81eb81f0 t smu_v11_0_i2c_func +ffffffff81eb8220 t smu_v11_0_i2c_enable +ffffffff81eb8360 t smu_v11_0_i2c_abort +ffffffff81eb8460 t lock_bus +ffffffff81eb8500 t trylock_bus +ffffffff81eb8550 t unlock_bus +ffffffff81eb9000 t smuio_v11_0_get_rom_index_offset +ffffffff81eb9040 t smuio_v11_0_get_rom_data_offset +ffffffff81eb9080 t smuio_v11_0_update_rom_clock_gating +ffffffff81eb91c0 t smuio_v11_0_get_clock_gating_state +ffffffff81eba000 t smuio_v11_0_6_get_rom_index_offset +ffffffff81eba040 t smuio_v11_0_6_get_rom_data_offset +ffffffff81eba080 t smuio_v11_0_6_update_rom_clock_gating +ffffffff81eba1c0 t smuio_v11_0_6_get_clock_gating_state +ffffffff81ebb000 t smuio_v13_0_get_rom_index_offset +ffffffff81ebb040 t smuio_v13_0_get_rom_data_offset +ffffffff81ebb080 t smuio_v13_0_update_rom_clock_gating +ffffffff81ebb1c0 t smuio_v13_0_get_clock_gating_state +ffffffff81ebb260 t smuio_v13_0_get_die_id +ffffffff81ebb2e0 t smuio_v13_0_get_socket_id +ffffffff81ebb360 t smuio_v13_0_is_host_gpu_xgmi_supported +ffffffff81ebc000 t smuio_v13_0_6_get_rom_index_offset +ffffffff81ebc040 t smuio_v13_0_6_get_rom_data_offset +ffffffff81ebd000 t smuio_v9_0_get_rom_index_offset +ffffffff81ebd040 t smuio_v9_0_get_rom_data_offset +ffffffff81ebd080 t smuio_v9_0_update_rom_clock_gating +ffffffff81ebd1c0 t smuio_v9_0_get_clock_gating_state +ffffffff81ebe000 T soc15_grbm_select +ffffffff81ebe080 T soc15_program_register_sequence +ffffffff81ebe280 T soc15_set_virt_ops +ffffffff81ebe2f0 t soc15_common_early_init +ffffffff81ebe680 t soc15_common_late_init +ffffffff81ebe6c0 t soc15_common_sw_init +ffffffff81ebe720 t soc15_common_sw_fini +ffffffff81ebe770 t soc15_common_hw_init +ffffffff81ebe8a0 t soc15_common_hw_fini +ffffffff81ebe970 t soc15_common_suspend +ffffffff81ebe9b0 t soc15_common_resume +ffffffff81ebe9f0 t soc15_common_is_idle +ffffffff81ebea20 t soc15_common_wait_for_idle +ffffffff81ebea50 t soc15_common_soft_reset +ffffffff81ebea80 t soc15_common_set_clockgating_state +ffffffff81ebedc0 t soc15_common_set_powergating_state +ffffffff81ebedf0 t soc15_common_get_clockgating_state +ffffffff81ebeed0 t soc15_pcie_rreg +ffffffff81ebef30 t soc15_pcie_wreg +ffffffff81ebef90 t soc15_pcie_rreg64 +ffffffff81ebeff0 t soc15_pcie_wreg64 +ffffffff81ebf050 t soc15_uvd_ctx_rreg +ffffffff81ebf0f0 t soc15_uvd_ctx_wreg +ffffffff81ebf180 t soc15_didt_rreg +ffffffff81ebf220 t soc15_didt_wreg +ffffffff81ebf2a0 t soc15_gc_cac_rreg +ffffffff81ebf3c0 t soc15_gc_cac_wreg +ffffffff81ebf4d0 t soc15_se_cac_rreg +ffffffff81ebf5f0 t soc15_se_cac_wreg +ffffffff81ebf700 t soc15_read_disabled_bios +ffffffff81ebf730 t soc15_read_register +ffffffff81ebf830 t soc15_vga_set_state +ffffffff81ebf860 t soc15_asic_reset +ffffffff81ebf960 t soc15_asic_reset_method +ffffffff81ebfae0 t soc15_get_xclk +ffffffff81ebfb30 t soc15_set_uvd_clocks +ffffffff81ebfb60 t soc15_set_vce_clocks +ffffffff81ebfb90 t soc15_get_config_memsize +ffffffff81ebfbb0 t soc15_need_full_reset +ffffffff81ebfbe0 t soc15_get_pcie_usage +ffffffff81ebfd10 t soc15_need_reset_on_init +ffffffff81ebfdb0 t soc15_get_pcie_replay_count +ffffffff81ebfe20 t soc15_supports_baco +ffffffff81ebfe80 t soc15_pre_asic_init +ffffffff81ebfe90 t soc15_query_video_codecs +ffffffff81ebff40 t vega20_get_pcie_usage +ffffffff81ec1000 T soc21_grbm_select +ffffffff81ec1080 t soc21_common_early_init +ffffffff81ec12a0 t soc21_common_late_init +ffffffff81ec12d0 t soc21_common_sw_init +ffffffff81ec1300 t soc21_common_sw_fini +ffffffff81ec1330 t soc21_common_hw_init +ffffffff81ec1400 t soc21_common_hw_fini +ffffffff81ec1460 t soc21_common_suspend +ffffffff81ec14c0 t soc21_common_resume +ffffffff81ec1590 t soc21_common_is_idle +ffffffff81ec15c0 t soc21_common_wait_for_idle +ffffffff81ec15f0 t soc21_common_soft_reset +ffffffff81ec1620 t soc21_common_set_clockgating_state +ffffffff81ec16d0 t soc21_common_set_powergating_state +ffffffff81ec1730 t soc21_common_get_clockgating_state +ffffffff81ec1780 t soc21_pcie_rreg +ffffffff81ec17e0 t soc21_pcie_wreg +ffffffff81ec1840 t soc21_pcie_rreg64 +ffffffff81ec18a0 t soc21_pcie_wreg64 +ffffffff81ec1900 t soc21_didt_rreg +ffffffff81ec19a0 t soc21_didt_wreg +ffffffff81ec1a20 t soc21_read_disabled_bios +ffffffff81ec1a50 t soc21_read_register +ffffffff81ec1b40 t soc21_vga_set_state +ffffffff81ec1b70 t soc21_asic_reset +ffffffff81ec1c50 t soc21_asic_reset_method +ffffffff81ec1d10 t soc21_get_xclk +ffffffff81ec1d40 t soc21_set_uvd_clocks +ffffffff81ec1d70 t soc21_set_vce_clocks +ffffffff81ec1da0 t soc21_get_config_memsize +ffffffff81ec1dc0 t soc21_need_full_reset +ffffffff81ec1e20 t soc21_init_doorbell_index +ffffffff81ec1f40 t soc21_need_reset_on_init +ffffffff81ec1fd0 t soc21_get_pcie_replay_count +ffffffff81ec2000 t soc21_pre_asic_init +ffffffff81ec2030 t soc21_update_umd_stable_pstate +ffffffff81ec20a0 t soc21_query_video_codecs +ffffffff81ec3000 t tonga_ih_early_init +ffffffff81ec3050 t tonga_ih_sw_init +ffffffff81ec30d0 t tonga_ih_sw_fini +ffffffff81ec3110 t tonga_ih_hw_init +ffffffff81ec3300 t tonga_ih_hw_fini +ffffffff81ec33a0 t tonga_ih_suspend +ffffffff81ec3440 t tonga_ih_resume +ffffffff81ec3480 t tonga_ih_is_idle +ffffffff81ec34d0 t tonga_ih_wait_for_idle +ffffffff81ec3570 t tonga_ih_check_soft_reset +ffffffff81ec35d0 t tonga_ih_pre_soft_reset +ffffffff81ec3680 t tonga_ih_soft_reset +ffffffff81ec3750 t tonga_ih_post_soft_reset +ffffffff81ec3790 t tonga_ih_set_clockgating_state +ffffffff81ec37c0 t tonga_ih_set_powergating_state +ffffffff81ec37f0 t tonga_ih_get_wptr +ffffffff81ec38e0 t tonga_ih_decode_iv +ffffffff81ec3960 t tonga_ih_set_rptr +ffffffff81ec4000 t umc_v6_0_init_registers +ffffffff81ec5000 t umc_v6_1_query_ras_error_count +ffffffff81ec54e0 t umc_v6_1_query_ras_error_address +ffffffff81ec57c0 t umc_v6_1_err_cnt_init +ffffffff81ec6000 t umc_v6_7_query_ras_error_count +ffffffff81ec6410 t umc_v6_7_query_ras_error_address +ffffffff81ec6590 t umc_v6_7_query_ras_poison_mode +ffffffff81ec65f0 t umc_v6_7_convert_error_address +ffffffff81ec68f0 t umc_v6_7_ecc_info_query_ras_error_count +ffffffff81ec6b30 t umc_v6_7_ecc_info_query_ras_error_address +ffffffff81ec7000 t umc_v8_10_query_ras_error_count +ffffffff81ec7280 t umc_v8_10_query_ras_error_address +ffffffff81ec75b0 t umc_v8_10_err_cnt_init +ffffffff81ec7730 t umc_v8_10_query_ras_poison_mode +ffffffff81ec8000 t umc_v8_7_query_ras_error_count +ffffffff81ec8310 t umc_v8_7_query_ras_error_address +ffffffff81ec84c0 t umc_v8_7_err_cnt_init +ffffffff81ec8610 t umc_v8_7_ecc_info_query_ras_error_count +ffffffff81ec8740 t umc_v8_7_ecc_info_query_ras_error_address +ffffffff81ec9000 t uvd_v5_0_early_init +ffffffff81ec9050 t uvd_v5_0_sw_init +ffffffff81ec9140 t uvd_v5_0_sw_fini +ffffffff81ec9190 t uvd_v5_0_hw_init +ffffffff81ec96a0 t uvd_v5_0_hw_fini +ffffffff81ec9720 t uvd_v5_0_suspend +ffffffff81ec9820 t uvd_v5_0_resume +ffffffff81ec9870 t uvd_v5_0_is_idle +ffffffff81ec98c0 t uvd_v5_0_wait_for_idle +ffffffff81ec9950 t uvd_v5_0_soft_reset +ffffffff81ec99f0 t uvd_v5_0_set_clockgating_state +ffffffff81ec9b90 t uvd_v5_0_set_powergating_state +ffffffff81ec9bd0 t uvd_v5_0_get_clockgating_state +ffffffff81ec9c50 t uvd_v5_0_ring_get_rptr +ffffffff81ec9c90 t uvd_v5_0_ring_get_wptr +ffffffff81ec9cd0 t uvd_v5_0_ring_set_wptr +ffffffff81ec9d00 t uvd_v5_0_ring_emit_ib +ffffffff81ec9f70 t uvd_v5_0_ring_emit_fence +ffffffff81eca520 t uvd_v5_0_ring_test_ring +ffffffff81eca6c0 t uvd_v5_0_ring_insert_nop +ffffffff81eca820 t uvd_v5_0_set_interrupt_state +ffffffff81eca850 t uvd_v5_0_process_interrupt +ffffffff81eca8b0 t uvd_v5_0_stop +ffffffff81eca9c0 t uvd_v5_0_start +ffffffff81ecc000 t uvd_v6_0_early_init +ffffffff81ecc140 t uvd_v6_0_sw_init +ffffffff81ecc460 t uvd_v6_0_sw_fini +ffffffff81ecc520 t uvd_v6_0_hw_init +ffffffff81eccae0 t uvd_v6_0_hw_fini +ffffffff81eccb60 t uvd_v6_0_suspend +ffffffff81eccc60 t uvd_v6_0_resume +ffffffff81ecccb0 t uvd_v6_0_is_idle +ffffffff81eccd00 t uvd_v6_0_wait_for_idle +ffffffff81eccd90 t uvd_v6_0_check_soft_reset +ffffffff81ecce10 t uvd_v6_0_pre_soft_reset +ffffffff81ecce50 t uvd_v6_0_soft_reset +ffffffff81eccf20 t uvd_v6_0_post_soft_reset +ffffffff81eccfc0 t uvd_v6_0_set_clockgating_state +ffffffff81ecd150 t uvd_v6_0_set_powergating_state +ffffffff81ecd1c0 t uvd_v6_0_get_clockgating_state +ffffffff81ecd250 t uvd_v6_0_ring_get_rptr +ffffffff81ecd290 t uvd_v6_0_ring_get_wptr +ffffffff81ecd2d0 t uvd_v6_0_ring_set_wptr +ffffffff81ecd300 t uvd_v6_0_ring_emit_ib +ffffffff81ecd660 t uvd_v6_0_ring_emit_fence +ffffffff81ecdc10 t uvd_v6_0_ring_emit_pipeline_sync +ffffffff81ece010 t uvd_v6_0_ring_emit_vm_flush +ffffffff81ece370 t uvd_v6_0_ring_emit_hdp_flush +ffffffff81ece3a0 t uvd_v6_0_ring_test_ring +ffffffff81ece540 t uvd_v6_0_ring_insert_nop +ffffffff81ece6a0 t uvd_v6_0_ring_emit_wreg +ffffffff81ece920 t uvd_v6_0_enc_ring_get_rptr +ffffffff81ece980 t uvd_v6_0_enc_ring_get_wptr +ffffffff81ece9e0 t uvd_v6_0_enc_ring_set_wptr +ffffffff81ecea20 t uvd_v6_0_enc_ring_emit_ib +ffffffff81ecec60 t uvd_v6_0_enc_ring_emit_fence +ffffffff81eceea0 t uvd_v6_0_enc_ring_emit_pipeline_sync +ffffffff81ecf050 t uvd_v6_0_enc_ring_emit_vm_flush +ffffffff81ecf260 t uvd_v6_0_enc_ring_test_ring +ffffffff81ecf3b0 t uvd_v6_0_enc_ring_test_ib +ffffffff81ecf970 t uvd_v6_0_enc_ring_insert_end +ffffffff81ecfa00 t uvd_v6_0_set_interrupt_state +ffffffff81ecfa30 t uvd_v6_0_process_interrupt +ffffffff81ecfb20 t uvd_v6_0_stop +ffffffff81ecfc30 t uvd_v6_0_start +ffffffff81ed1000 t uvd_v7_0_early_init +ffffffff81ed1270 t uvd_v7_0_sw_init +ffffffff81ed15f0 t uvd_v7_0_sw_fini +ffffffff81ed1700 t uvd_v7_0_hw_init +ffffffff81ed4620 t uvd_v7_0_hw_fini +ffffffff81ed4930 t uvd_v7_0_suspend +ffffffff81ed49e0 t uvd_v7_0_resume +ffffffff81ed4a30 t uvd_v7_0_set_clockgating_state +ffffffff81ed4a60 t uvd_v7_0_ring_get_rptr +ffffffff81ed4b00 t uvd_v7_0_ring_get_wptr +ffffffff81ed4ba0 t uvd_v7_0_ring_set_wptr +ffffffff81ed4c20 t uvd_v7_0_ring_patch_cs_in_place +ffffffff81ed4ca0 t uvd_v7_0_ring_emit_ib +ffffffff81ed5050 t uvd_v7_0_ring_emit_fence +ffffffff81ed56b0 t uvd_v7_0_ring_emit_vm_flush +ffffffff81ed5720 t uvd_v7_0_ring_emit_hdp_flush +ffffffff81ed5750 t uvd_v7_0_ring_test_ring +ffffffff81ed59e0 t uvd_v7_0_ring_insert_nop +ffffffff81ed5b80 t uvd_v7_0_ring_emit_wreg +ffffffff81ed5e50 t uvd_v7_0_ring_emit_reg_wait +ffffffff81ed61f0 t uvd_v7_0_enc_ring_get_rptr +ffffffff81ed62e0 t uvd_v7_0_enc_ring_get_wptr +ffffffff81ed63e0 t uvd_v7_0_enc_ring_set_wptr +ffffffff81ed64e0 t uvd_v7_0_enc_ring_emit_ib +ffffffff81ed6720 t uvd_v7_0_enc_ring_emit_fence +ffffffff81ed6960 t uvd_v7_0_enc_ring_emit_vm_flush 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vce_v3_0_get_clockgating_state +ffffffff81ed9700 t vce_v3_0_ring_get_rptr +ffffffff81ed97d0 t vce_v3_0_ring_get_wptr +ffffffff81ed98a0 t vce_v3_0_ring_set_wptr +ffffffff81ed9960 t vce_v3_0_ring_emit_ib +ffffffff81ed9ba0 t vce_v3_0_emit_pipeline_sync +ffffffff81ed9d50 t vce_v3_0_emit_vm_flush +ffffffff81ed9fc0 t vce_v3_0_set_interrupt_state +ffffffff81eda030 t vce_v3_0_process_interrupt +ffffffff81eda0f0 t vce_v3_0_stop +ffffffff81edb000 t vce_v4_0_early_init +ffffffff81edb0b0 t vce_v4_0_sw_init +ffffffff81edb2e0 t vce_v4_0_sw_fini +ffffffff81edb360 t vce_v4_0_hw_init +ffffffff81edbb40 t vce_v4_0_hw_fini +ffffffff81edbbe0 t vce_v4_0_suspend +ffffffff81edbe00 t vce_v4_0_resume +ffffffff81edbeb0 t vce_v4_0_set_clockgating_state +ffffffff81edbee0 t vce_v4_0_set_powergating_state +ffffffff81edbfc0 t vce_v4_0_ring_get_rptr +ffffffff81edc030 t vce_v4_0_ring_get_wptr +ffffffff81edc0c0 t vce_v4_0_ring_set_wptr +ffffffff81edc150 t vce_v4_0_ring_emit_ib +ffffffff81edc390 t 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vcn_v1_0_enc_ring_emit_ib +ffffffff81ee2360 t vcn_v1_0_enc_ring_emit_fence +ffffffff81ee25a0 t vcn_v1_0_enc_ring_emit_vm_flush +ffffffff81ee2610 t vcn_v1_0_enc_ring_insert_end +ffffffff81ee26a0 t vcn_v1_0_enc_ring_emit_wreg +ffffffff81ee2800 t vcn_v1_0_enc_ring_emit_reg_wait +ffffffff81ee29c0 t vcn_v1_0_set_interrupt_state +ffffffff81ee29f0 t vcn_v1_0_process_interrupt +ffffffff81ee2aa0 t vcn_v1_0_idle_work_handler +ffffffff81ee2c30 t vcn_v1_0_pause_dpg_mode +ffffffff81ee3d50 t vcn_v1_0_enable_clock_gating +ffffffff81ee4160 t vcn_v1_0_disable_clock_gating +ffffffff81ee46f0 t vcn_1_0_enable_static_power_gating +ffffffff81ee4910 t vcn_v1_0_start_dpg_mode +ffffffff81ee8540 t vcn_v1_0_start_spg_mode +ffffffff81eea760 t vcn_v1_0_clock_gating_dpg_mode +ffffffff81eeb000 T vcn_v2_0_dec_ring_insert_start +ffffffff81eeb1c0 T vcn_v2_0_dec_ring_insert_end +ffffffff81eeb2c0 T vcn_v2_0_dec_ring_insert_nop +ffffffff81eeb430 T vcn_v2_0_dec_ring_emit_fence +ffffffff81eeb9f0 T vcn_v2_0_dec_ring_emit_ib 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pp_rv_set_hard_min_fclk_by_freq +ffffffff81f3bd80 t pp_nv_set_display_count +ffffffff81f3bde0 t pp_nv_set_hard_min_dcefclk_by_freq +ffffffff81f3be50 t pp_nv_set_min_deep_sleep_dcfclk +ffffffff81f3beb0 t pp_nv_set_voltage_by_freq +ffffffff81f3bf40 t pp_nv_set_wm_ranges +ffffffff81f3bf90 t pp_nv_set_hard_min_uclk_by_freq +ffffffff81f3c000 t pp_nv_get_maximum_sustainable_clocks +ffffffff81f3c060 t pp_nv_get_uclk_dpm_states +ffffffff81f3c0c0 t pp_nv_set_pstate_handshake_support +ffffffff81f3c110 t pp_rn_set_wm_ranges +ffffffff81f3c160 t pp_rn_get_dpm_clock_table +ffffffff81f3d000 T amdgpu_dm_set_psr_caps +ffffffff81f3d110 T amdgpu_dm_link_setup_psr +ffffffff81f3d290 T amdgpu_dm_psr_enable +ffffffff81f3d390 T amdgpu_dm_psr_disable +ffffffff81f3d410 T amdgpu_dm_psr_disable_all +ffffffff81f3e000 T dm_get_elapse_time_in_ns +ffffffff81f3e030 T dm_perf_trace_timestamp +ffffffff81f3f000 T dc_assert_fp_enabled +ffffffff81f3f070 T dc_fpu_begin +ffffffff81f3f0c0 T dc_fpu_end +ffffffff81f40000 T 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bios_parser_get_embedded_panel_info +ffffffff81f47530 t bios_parser_get_gpio_pin_info +ffffffff81f47650 t bios_parser_get_encoder_cap_info +ffffffff81f47750 t bios_parser_set_scratch_critical_state +ffffffff81f47760 t bios_parser_is_device_id_supported +ffffffff81f47820 t bios_parser_encoder_control +ffffffff81f47860 t bios_parser_transmitter_control +ffffffff81f478a0 t bios_parser_enable_crtc +ffffffff81f478f0 t bios_parser_adjust_pixel_clock +ffffffff81f47930 t bios_parser_set_pixel_clock +ffffffff81f47970 t bios_parser_set_dce_clock +ffffffff81f479b0 t bios_parser_enable_spread_spectrum_on_ppll +ffffffff81f47a00 t bios_parser_program_crtc_timing +ffffffff81f47a40 t bios_parser_program_display_engine_pll +ffffffff81f47a80 t bios_parser_enable_disp_power_gating +ffffffff81f47ac0 t bios_parser_destroy +ffffffff81f47b80 t bios_get_board_layout_info +ffffffff81f47e10 t get_bios_object +ffffffff81f47fe0 t get_ss_info_from_ss_info_table +ffffffff81f481a0 t get_ss_entry_number_from_ss_info_tbl +ffffffff81f49000 T firmware_parser_create +ffffffff81f4ade0 t bios_parser_get_connectors_number +ffffffff81f4af70 t bios_parser_get_connector_id +ffffffff81f4b000 t bios_parser_get_src_obj +ffffffff81f4b2a0 t bios_parser_get_i2c_info +ffffffff81f4b510 t bios_parser_get_hpd_info +ffffffff81f4b680 t bios_parser_get_device_tag +ffffffff81f4b950 t bios_parser_get_spread_spectrum_info +ffffffff81f4bd10 t bios_parser_get_ss_entry_number +ffffffff81f4bd40 t bios_parser_get_embedded_panel_info +ffffffff81f4bf40 t bios_parser_get_gpio_pin_info +ffffffff81f4c060 t bios_parser_get_encoder_cap_info +ffffffff81f4c1d0 t bios_parser_is_accelerated_mode +ffffffff81f4c1e0 t bios_parser_set_scratch_critical_state +ffffffff81f4c1f0 t bios_parser_is_device_id_supported +ffffffff81f4c270 t bios_parser_encoder_control +ffffffff81f4c2b0 t bios_parser_transmitter_control +ffffffff81f4c2f0 t bios_parser_enable_crtc +ffffffff81f4c340 t bios_parser_set_pixel_clock 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t dce_update_clocks +ffffffff81f5e000 T dce110_get_min_vblank_time_us +ffffffff81f5e080 T dce110_fill_display_configs +ffffffff81f5e2e0 T dce11_pplib_apply_display_requirements +ffffffff81f5e5d0 T dce110_clk_mgr_construct +ffffffff81f5e680 t dce11_update_clocks +ffffffff81f5f000 T dce112_set_clock +ffffffff81f5f1a0 T dce112_set_dispclk +ffffffff81f5f2d0 T dce112_set_dprefclk +ffffffff81f5f340 T dce112_clk_mgr_construct +ffffffff81f5f3f0 t dce112_update_clocks +ffffffff81f60000 T dce120_clk_mgr_construct +ffffffff81f60090 T dce121_clk_mgr_construct +ffffffff81f601c0 t dce12_update_clocks +ffffffff81f61000 T rv1_clk_mgr_construct +ffffffff81f610c0 t rv1_update_clocks +ffffffff81f615b0 t rv1_init_clocks +ffffffff81f61640 t rv1_enable_pme_wa +ffffffff81f62000 T rv1_vbios_smu_set_dispclk +ffffffff81f620f0 t rv1_vbios_smu_send_msg_with_param +ffffffff81f62200 T rv1_vbios_smu_set_dprefclk +ffffffff81f63000 T rv2_clk_mgr_construct +ffffffff81f64000 T dentist_get_did_from_divider +ffffffff81f64090 T dcn20_update_clocks_update_dpp_dto +ffffffff81f64160 T dcn20_update_clocks_update_dentist +ffffffff81f64680 T dcn2_update_clocks +ffffffff81f64bf0 T dcn2_read_clocks_from_hw_dentist +ffffffff81f64cc0 T dcn2_update_clocks_fpga +ffffffff81f64e40 T dcn2_init_clocks +ffffffff81f64ee0 T dcn2_get_clock +ffffffff81f64f50 T dcn20_clk_mgr_construct +ffffffff81f650a0 t dcn2_enable_pme_wa +ffffffff81f650f0 t dcn2_are_clock_states_equal +ffffffff81f65160 t dcn2_notify_link_rate_change +ffffffff81f66000 t dcn201_update_clocks +ffffffff81f66240 t dcn201_init_clocks +ffffffff81f662e0 T dcn201_clk_mgr_construct +ffffffff81f67000 T rn_clk_mgr_construct +ffffffff81f678e0 t rn_update_clocks +ffffffff81f67e80 t rn_set_low_power_state +ffffffff81f68050 t rn_init_clocks +ffffffff81f680f0 t rn_enable_pme_wa +ffffffff81f68100 t rn_are_clock_states_equal +ffffffff81f68150 t rn_notify_wm_ranges +ffffffff81f684e0 t rn_notify_link_rate_change +ffffffff81f69000 T rn_vbios_smu_get_smu_version +ffffffff81f69020 t rn_vbios_smu_send_msg_with_param +ffffffff81f691b0 T rn_vbios_smu_set_dispclk +ffffffff81f692f0 T rn_vbios_smu_set_dprefclk +ffffffff81f69360 T rn_vbios_smu_set_hard_min_dcfclk +ffffffff81f693e0 T rn_vbios_smu_set_min_deep_sleep_dcfclk +ffffffff81f69460 T rn_vbios_smu_set_phyclk +ffffffff81f694a0 T rn_vbios_smu_set_dppclk +ffffffff81f69560 T rn_vbios_smu_set_dcn_low_power_state +ffffffff81f69580 T rn_vbios_smu_enable_48mhz_tmdp_refclk_pwrdwn +ffffffff81f695a0 T rn_vbios_smu_enable_pme_wa +ffffffff81f695c0 T rn_vbios_smu_is_periodic_retraining_disabled +ffffffff81f6a000 T dcn3_init_clocks +ffffffff81f6a3d0 t dcn3_init_clocks_fpga +ffffffff81f6a3e0 T dcn3_clk_mgr_construct +ffffffff81f6a540 T dcn3_clk_mgr_destroy +ffffffff81f6a5b0 t dcn3_update_clocks +ffffffff81f6aa10 t dcn3_enable_pme_wa +ffffffff81f6aa50 t dcn3_are_clock_states_equal +ffffffff81f6aab0 t dcn3_notify_wm_ranges +ffffffff81f6ad40 t dcn30_notify_link_rate_change +ffffffff81f6ae60 t dcn3_set_hard_min_memclk +ffffffff81f6af00 t dcn3_set_hard_max_memclk +ffffffff81f6af60 t dcn3_set_max_memclk +ffffffff81f6afa0 t dcn3_set_min_memclk +ffffffff81f6afe0 t dcn3_get_memclk_states_from_smu +ffffffff81f6b120 t dcn3_is_smu_present +ffffffff81f6c000 T dcn30_smu_test_message +ffffffff81f6c070 t dcn30_smu_send_msg_with_param +ffffffff81f6c1d0 T dcn30_smu_get_smu_version +ffffffff81f6c1f0 T dcn30_smu_check_driver_if_version +ffffffff81f6c240 T dcn30_smu_check_msg_header_version +ffffffff81f6c290 T dcn30_smu_set_dram_addr_high +ffffffff81f6c2b0 T dcn30_smu_set_dram_addr_low +ffffffff81f6c2d0 T dcn30_smu_transfer_wm_table_smu_2_dram +ffffffff81f6c2f0 T dcn30_smu_transfer_wm_table_dram_2_smu +ffffffff81f6c310 T dcn30_smu_set_hard_min_by_freq +ffffffff81f6c360 T dcn30_smu_set_hard_max_by_freq +ffffffff81f6c3b0 T dcn30_smu_get_dpm_freq_by_index +ffffffff81f6c400 T dcn30_smu_get_dc_mode_max_dpm_freq +ffffffff81f6c450 T dcn30_smu_set_min_deep_sleep_dcef_clk +ffffffff81f6c470 T dcn30_smu_set_num_of_displays +ffffffff81f6c490 T dcn30_smu_set_display_refresh_from_mall +ffffffff81f6c4c0 T dcn30_smu_set_external_client_df_cstate_allow +ffffffff81f6c4e0 T dcn30_smu_set_pme_workaround +ffffffff81f6d000 T dcn301_smu_get_smu_version +ffffffff81f6d070 t dcn301_smu_send_msg_with_param +ffffffff81f6d1f0 T dcn301_smu_set_dispclk +ffffffff81f6d290 T dcn301_smu_set_dprefclk +ffffffff81f6d340 T dcn301_smu_set_hard_min_dcfclk +ffffffff81f6d3e0 T dcn301_smu_set_min_deep_sleep_dcfclk +ffffffff81f6d480 T dcn301_smu_set_dppclk +ffffffff81f6d520 T dcn301_smu_set_display_idle_optimization +ffffffff81f6d570 T dcn301_smu_enable_phy_refclk_pwrdwn +ffffffff81f6d5c0 T dcn301_smu_enable_pme_wa +ffffffff81f6d5e0 T dcn301_smu_set_dram_addr_high +ffffffff81f6d630 T dcn301_smu_set_dram_addr_low +ffffffff81f6d680 T dcn301_smu_transfer_dpm_table_smu_2_dram +ffffffff81f6d6a0 T dcn301_smu_transfer_wm_table_dram_2_smu +ffffffff81f6e000 T vg_clk_mgr_construct +ffffffff81f6e7f0 T vg_clk_mgr_destroy +ffffffff81f6e840 t vg_update_clocks +ffffffff81f6ebd0 t vg_init_clocks +ffffffff81f6ec70 t vg_enable_pme_wa +ffffffff81f6ec80 t vg_are_clock_states_equal +ffffffff81f6ecd0 t vg_notify_wm_ranges +ffffffff81f70000 T dcn31_update_clocks +ffffffff81f70620 T dcn31_init_clocks +ffffffff81f706d0 T dcn31_are_clock_states_equal +ffffffff81f70730 T dcn31_get_dtb_ref_freq_khz +ffffffff81f70760 T dcn31_clk_mgr_construct +ffffffff81f70dd0 T dcn31_clk_mgr_destroy +ffffffff81f70e20 t dcn31_set_low_power_state +ffffffff81f71000 t dcn31_enable_pme_wa +ffffffff81f71010 t dcn31_notify_wm_ranges +ffffffff81f713b0 t find_clk_for_voltage +ffffffff81f72000 T dcn31_smu_get_smu_version +ffffffff81f72020 t dcn31_smu_send_msg_with_param +ffffffff81f72220 T dcn31_smu_set_dispclk +ffffffff81f72290 T dcn31_smu_set_dprefclk +ffffffff81f72300 T dcn31_smu_set_hard_min_dcfclk +ffffffff81f72380 T dcn31_smu_set_min_deep_sleep_dcfclk +ffffffff81f72400 T dcn31_smu_set_dppclk +ffffffff81f72470 T dcn31_smu_set_display_idle_optimization +ffffffff81f724c0 T dcn31_smu_enable_phy_refclk_pwrdwn +ffffffff81f72510 T dcn31_smu_enable_pme_wa +ffffffff81f72550 T dcn31_smu_set_dram_addr_high +ffffffff81f72590 T dcn31_smu_set_dram_addr_low +ffffffff81f725d0 T dcn31_smu_transfer_dpm_table_smu_2_dram +ffffffff81f72610 T dcn31_smu_transfer_wm_table_dram_2_smu +ffffffff81f72650 T dcn31_smu_set_zstate_support +ffffffff81f726c0 T dcn31_smu_set_dtbclk +ffffffff81f73000 T dcn314_update_clocks +ffffffff81f736d0 T dcn314_are_clock_states_equal +ffffffff81f73730 T dcn314_clk_mgr_construct +ffffffff81f74440 T dcn314_clk_mgr_destroy +ffffffff81f74490 t dcn314_enable_pme_wa +ffffffff81f744a0 t dcn314_notify_wm_ranges +ffffffff81f75000 T dcn314_smu_get_smu_version +ffffffff81f75020 t dcn314_smu_send_msg_with_param +ffffffff81f75240 T dcn314_smu_set_dispclk +ffffffff81f752b0 T dcn314_smu_set_dprefclk +ffffffff81f75320 T dcn314_smu_set_hard_min_dcfclk +ffffffff81f753a0 T dcn314_smu_set_min_deep_sleep_dcfclk +ffffffff81f75420 T dcn314_smu_set_dppclk +ffffffff81f75490 T dcn314_smu_set_display_idle_optimization +ffffffff81f754e0 T dcn314_smu_enable_phy_refclk_pwrdwn +ffffffff81f75530 T dcn314_smu_enable_pme_wa +ffffffff81f75570 T dcn314_smu_set_dram_addr_high +ffffffff81f755b0 T dcn314_smu_set_dram_addr_low +ffffffff81f755f0 T dcn314_smu_transfer_dpm_table_smu_2_dram +ffffffff81f75630 T dcn314_smu_transfer_wm_table_dram_2_smu +ffffffff81f75670 T dcn314_smu_set_zstate_support +ffffffff81f756c0 T dcn314_smu_set_dtbclk +ffffffff81f76000 T dcn315_clk_mgr_construct +ffffffff81f769c0 T dcn315_clk_mgr_destroy +ffffffff81f76a10 t dcn315_update_clocks +ffffffff81f77000 t dcn315_enable_pme_wa +ffffffff81f77010 t dcn315_notify_wm_ranges +ffffffff81f78000 T dcn315_smu_get_smu_version +ffffffff81f78020 t dcn315_smu_send_msg_with_param +ffffffff81f781b0 T dcn315_smu_set_dispclk +ffffffff81f78220 T dcn315_smu_set_hard_min_dcfclk +ffffffff81f782a0 T dcn315_smu_set_min_deep_sleep_dcfclk +ffffffff81f78320 T dcn315_smu_set_dppclk +ffffffff81f78390 T dcn315_smu_set_display_idle_optimization +ffffffff81f783e0 T dcn315_smu_enable_phy_refclk_pwrdwn +ffffffff81f78430 T dcn315_smu_enable_pme_wa +ffffffff81f78470 T dcn315_smu_set_dram_addr_high +ffffffff81f784b0 T dcn315_smu_set_dram_addr_low +ffffffff81f784f0 T dcn315_smu_transfer_dpm_table_smu_2_dram +ffffffff81f78530 T dcn315_smu_transfer_wm_table_dram_2_smu +ffffffff81f78570 T dcn315_smu_get_dpref_clk +ffffffff81f785d0 T dcn315_smu_get_dtbclk +ffffffff81f78630 T dcn315_smu_set_dtbclk +ffffffff81f79000 T dcn316_clk_mgr_construct +ffffffff81f796a0 T dcn316_clk_mgr_destroy +ffffffff81f796f0 t dcn316_update_clocks +ffffffff81f79d20 t dcn316_enable_pme_wa +ffffffff81f79d30 t dcn316_notify_wm_ranges +ffffffff81f7a0c0 t find_clk_for_voltage +ffffffff81f7b000 T dcn316_smu_get_smu_version +ffffffff81f7b020 t dcn316_smu_send_msg_with_param +ffffffff81f7b1b0 T dcn316_smu_set_dispclk +ffffffff81f7b220 T dcn316_smu_set_hard_min_dcfclk +ffffffff81f7b2a0 T dcn316_smu_set_min_deep_sleep_dcfclk +ffffffff81f7b320 T dcn316_smu_set_dppclk +ffffffff81f7b390 T dcn316_smu_set_display_idle_optimization +ffffffff81f7b3e0 T dcn316_smu_enable_phy_refclk_pwrdwn +ffffffff81f7b430 T dcn316_smu_set_dram_addr_high +ffffffff81f7b470 T dcn316_smu_set_dram_addr_low +ffffffff81f7b4b0 T dcn316_smu_transfer_dpm_table_smu_2_dram +ffffffff81f7b4f0 T dcn316_smu_transfer_wm_table_dram_2_smu +ffffffff81f7b530 T dcn316_smu_enable_pme_wa +ffffffff81f7b570 T dcn316_smu_set_dtbclk +ffffffff81f7b5b0 T dcn316_smu_get_dpref_clk +ffffffff81f7b610 T dcn316_smu_get_smu_fclk +ffffffff81f7c000 T dcn32_init_clocks +ffffffff81f7c4e0 T dcn32_clk_mgr_construct +ffffffff81f7c770 T dcn32_clk_mgr_destroy +ffffffff81f7c7e0 t dcn32_update_clocks +ffffffff81f7cf30 t dcn32_dump_clk_registers +ffffffff81f7d150 t dcn32_enable_pme_wa +ffffffff81f7d190 t dcn32_are_clock_states_equal +ffffffff81f7d200 t dcn32_notify_wm_ranges +ffffffff81f7d380 t dcn32_set_hard_min_memclk +ffffffff81f7d420 t dcn32_set_hard_max_memclk +ffffffff81f7d480 t dcn32_get_memclk_states_from_smu +ffffffff81f7d670 t dcn32_is_smu_present +ffffffff81f7e000 T dcn32_smu_send_fclk_pstate_message +ffffffff81f7e020 t dcn32_smu_send_msg_with_param +ffffffff81f7e160 T dcn32_smu_send_cab_for_uclk_message +ffffffff81f7e190 T dcn32_smu_transfer_wm_table_dram_2_smu +ffffffff81f7e1b0 T dcn32_smu_set_pme_workaround +ffffffff81f7e1d0 T dcn32_smu_set_hard_min_by_freq +ffffffff81f7f000 T dc_stream_adjust_vmin_vmax +ffffffff81f7f180 T dc_stream_get_last_used_drr_vtotal +ffffffff81f7f2e0 T dc_stream_get_crtc_position +ffffffff81f7f510 T dc_stream_configure_crc +ffffffff81f7f760 T dc_stream_get_crc +ffffffff81f7f840 T dc_stream_set_dyn_expansion +ffffffff81f7fab0 T dc_stream_set_dither_option +ffffffff81f7fc20 T dc_stream_set_gamut_remap +ffffffff81f7fda0 T dc_stream_program_csc_matrix +ffffffff81f7ffc0 T dc_stream_set_static_screen_params +ffffffff81f80150 T dc_create +ffffffff81f80af0 t dc_construct_ctx +ffffffff81f80c50 t dc_destruct +ffffffff81f80f20 T dc_hardware_init +ffffffff81f81030 T dc_init_callbacks +ffffffff81f81060 T dc_deinit_callbacks +ffffffff81f81090 T dc_destroy +ffffffff81f810e0 T dc_validate_boot_timing +ffffffff81f81470 T dc_enable_stereo +ffffffff81f81570 T dc_trigger_sync +ffffffff81f81b90 T dc_z10_restore +ffffffff81f81bd0 T dc_z10_save_init +ffffffff81f81c10 T dc_commit_state +ffffffff81f81d40 t dc_commit_state_no_check +ffffffff81f831c0 T dc_acquire_release_mpc_3dlut +ffffffff81f832b0 T dc_post_update_surfaces_to_stream +ffffffff81f836c0 T dc_create_state +ffffffff81f83750 T dc_copy_state +ffffffff81f83940 T dc_retain_state +ffffffff81f83970 T dc_release_state +ffffffff81f839e0 T dc_set_generic_gpio_for_stereo +ffffffff81f83af0 T dc_check_update_surfaces_for_stream +ffffffff81f84760 T dc_dmub_update_dirty_rect +ffffffff81f849f0 T dc_update_planes_and_stream +ffffffff81f85140 t commit_minimal_transition_state +ffffffff81f854d0 t commit_planes_for_stream +ffffffff81f86bc0 T dc_commit_updates_for_stream +ffffffff81f86fc0 t copy_surface_update_to_plane +ffffffff81f873c0 t copy_stream_update_to_stream +ffffffff81f879f0 T dc_get_current_stream_count +ffffffff81f87a30 T dc_get_stream_at_index +ffffffff81f87a80 T dc_interrupt_to_irq_source +ffffffff81f87aa0 T dc_interrupt_set +ffffffff81f87af0 T dc_interrupt_ack +ffffffff81f87b10 T dc_power_down_on_boot +ffffffff81f87b60 T dc_set_power_state +ffffffff81f87d50 T dc_resume +ffffffff81f87dc0 T dc_is_dmcu_initialized +ffffffff81f87e10 T dc_is_oem_i2c_device_present +ffffffff81f87e60 T dc_submit_i2c +ffffffff81f87e90 T dc_submit_i2c_oem +ffffffff81f87ee0 T dc_link_add_remote_sink +ffffffff81f88070 T dc_link_remove_remote_sink +ffffffff81f88160 T get_clock_requirements_for_state +ffffffff81f881e0 T dc_set_clock +ffffffff81f88220 T dc_get_clock +ffffffff81f88260 T dc_set_psr_allow_active +ffffffff81f88360 T dc_allow_idle_optimizations +ffffffff81f88400 T dc_unlock_memory_clock_frequency +ffffffff81f88470 T dc_lock_memory_clock_frequency +ffffffff81f88500 T dc_enable_dcmode_clk_limit +ffffffff81f88610 t blank_and_force_memclk +ffffffff81f887f0 T dc_is_plane_eligible_for_idle_optimizations +ffffffff81f88840 T dc_hardware_release +ffffffff81f88890 T dc_mclk_switch_using_fw_based_vblank_stretch_shut_down +ffffffff81f888d0 T dc_is_dmub_outbox_supported +ffffffff81f88930 T dc_enable_dmub_notifications +ffffffff81f88990 T dc_enable_dmub_outbox +ffffffff81f889d0 T dc_process_dmub_aux_transfer_async +ffffffff81f88b70 T get_link_index_from_dpia_port_index +ffffffff81f88c20 T dc_process_dmub_set_config_async +ffffffff81f88d10 T dc_process_dmub_set_mst_slots +ffffffff81f88e00 T dc_process_dmub_dpia_hpd_int_enable +ffffffff81f88ed0 T dc_disable_accelerated_mode +ffffffff81f88ef0 T dc_notify_vsync_int_state +ffffffff81f89120 T dc_extended_blank_supported +ffffffff81f8a000 T pre_surface_trace +ffffffff81f8a030 T update_surface_trace +ffffffff81f8a060 T post_surface_trace +ffffffff81f8a090 T context_timing_trace +ffffffff81f8a240 T context_clock_trace +ffffffff81f8a270 T dc_status_to_str +ffffffff81f8b000 T find_color_matrix +ffffffff81f8b0b0 T color_space_to_black_color +ffffffff81f8b140 T hwss_wait_for_blank_complete +ffffffff81f8b1f0 T get_mpctree_visual_confirm_color +ffffffff81f8b250 T get_surface_visual_confirm_color +ffffffff81f8b300 T get_hdr_visual_confirm_color +ffffffff81f8b3b0 T get_subvp_visual_confirm_color +ffffffff81f8b4a0 T get_surface_tile_visual_confirm_color +ffffffff81f8c000 T get_hpd_gpio +ffffffff81f8c0e0 T dc_link_wait_for_t12 +ffffffff81f8c140 T dc_link_detect_sink +ffffffff81f8c2f0 T dc_link_is_dp_sink_present +ffffffff81f8c570 T reset_cur_dp_mst_topology +ffffffff81f8c5d0 T dc_link_detect +ffffffff81f8d940 T dc_link_get_hpd_state +ffffffff81f8d9b0 T link_create +ffffffff81f8ead0 T link_destroy +ffffffff81f8ec30 T dc_link_blank_all_dp_displays +ffffffff81f8ed00 T dc_link_blank_dp_stream +ffffffff81f8ee10 T dc_link_blank_all_edp_displays +ffffffff81f8eed0 T dc_power_alpm_dpcd_enable +ffffffff81f8ef40 T dc_link_validate_mode_timing +ffffffff81f8f460 T dc_link_get_backlight_level +ffffffff81f8f5d0 T dc_link_get_target_backlight_pwm +ffffffff81f8f6e0 T dc_link_set_backlight_level +ffffffff81f8f850 T dc_link_set_psr_allow_active +ffffffff81f8fad0 T dc_link_get_psr_state +ffffffff81f8fc00 T dc_link_setup_psr +ffffffff81f90060 T dc_link_get_psr_residency +ffffffff81f90160 T dc_link_set_sink_vtotal_in_psr_active +ffffffff81f901e0 T dc_link_get_status +ffffffff81f90210 T core_link_resume +ffffffff81f90250 t program_hpd_filter +ffffffff81f903e0 T dc_link_allocate_mst_payload +ffffffff81f908c0 t update_mst_stream_alloc_table +ffffffff81f90b40 t dc_log_vcp_x_y +ffffffff81f90cd0 T dc_link_reduce_mst_payload +ffffffff81f91150 T dc_link_increase_mst_payload +ffffffff81f915d0 T core_link_enable_stream +ffffffff81f922b0 t disable_link +ffffffff81f923d0 t dc_link_update_sst_payload +ffffffff81f92610 T core_link_set_avmute +ffffffff81f92660 T core_link_disable_stream +ffffffff81f92cd0 t get_ext_hdmi_settings +ffffffff81f92f10 t write_i2c_retimer_setting +ffffffff81f935c0 t write_i2c_default_retimer_setting +ffffffff81f93c60 t write_i2c_redriver_setting +ffffffff81f93da0 T dc_link_enable_hpd_filter +ffffffff81f93f10 T dc_link_set_drive_settings +ffffffff81f93fe0 T dc_link_get_cur_link_res +ffffffff81f94130 T dc_link_set_preferred_link_settings +ffffffff81f94280 T dc_link_set_preferred_training_settings +ffffffff81f943c0 T dc_link_enable_hpd +ffffffff81f943d0 T dc_link_disable_hpd +ffffffff81f943e0 T dc_link_set_test_pattern +ffffffff81f94420 T dc_link_bandwidth_kbps +ffffffff81f944c0 T dc_link_should_enable_fec +ffffffff81f945e0 T dc_link_get_link_cap +ffffffff81f94630 T dc_link_overwrite_extended_receiver_cap +ffffffff81f94640 T dc_link_is_fec_supported +ffffffff81f94700 T dc_bandwidth_in_kbps_from_timing +ffffffff81f94860 T dc_get_cur_link_res_map +ffffffff81f94940 T dc_restore_link_res_map +ffffffff81f94a70 t read_current_link_settings_on_detect +ffffffff81f94c80 t enable_link_dp +ffffffff81f95000 T dal_ddc_i2c_payloads_add +ffffffff81f950c0 T dal_ddc_service_create +ffffffff81f95230 T dal_ddc_service_destroy +ffffffff81f952c0 T dal_ddc_service_get_type +ffffffff81f952f0 T dal_ddc_service_set_transaction_type +ffffffff81f95320 T dal_ddc_service_is_in_aux_transaction_mode +ffffffff81f95360 T ddc_service_set_dongle_type +ffffffff81f95390 T get_defer_delay +ffffffff81f954c0 T dal_ddc_service_i2c_query_dp_dual_mode_adaptor +ffffffff81f958d0 T dal_ddc_service_query_ddc_data +ffffffff81f95c90 T dal_ddc_submit_aux_command +ffffffff81f95d80 T dc_link_aux_transfer_with_retries +ffffffff81f95d90 T dc_link_aux_transfer_raw +ffffffff81f95dc0 T dc_link_aux_try_to_configure_timeout +ffffffff81f95ea0 T dal_ddc_service_set_ddc_pin +ffffffff81f95ed0 T dal_ddc_service_get_ddc_pin +ffffffff81f95f00 T dal_ddc_service_write_scdc_data +ffffffff81f95ff0 T dal_ddc_service_read_scdc_data +ffffffff81f97000 T dp_wait_for_training_aux_rd_interval +ffffffff81f97080 T dc_dp_training_pattern_to_dpcd_training_pattern +ffffffff81f97100 T dpcd_set_link_settings +ffffffff81f97280 T dc_dp_initialize_scrambling_data_symbols +ffffffff81f97320 T dp_is_cr_done +ffffffff81f97380 T dp_is_ch_eq_done +ffffffff81f97440 T dp_is_symbol_locked +ffffffff81f97500 T dp_is_interlane_aligned +ffffffff81f97530 T dp_hw_to_dpcd_lane_settings +ffffffff81f975f0 T dp_get_link_encoding_format +ffffffff81f97640 T dp_decide_lane_settings +ffffffff81f97a80 T dp_get_lane_status_and_lane_adjust +ffffffff81f97bc0 T dpcd_set_lane_settings +ffffffff81f97c00 T dp_is_max_vs_reached +ffffffff81f97c90 T dp_translate_training_aux_read_interval +ffffffff81f97cd0 T dp_get_cr_failure +ffffffff81f97d40 T dp_check_link_loss_status +ffffffff81f97de0 T dp_decide_training_settings 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+ffffffff82015b80 T hubp1_clk_cntl +ffffffff82015bd0 T hubp1_vtg_sel +ffffffff82015c10 T hubp1_in_blank +ffffffff82015c80 T hubp1_soft_reset +ffffffff82015cc0 T hubp1_set_flip_int +ffffffff82015d10 T hubp1_init +ffffffff82015d40 T dcn10_hubp_construct +ffffffff82015db0 t hubp1_setup +ffffffff82015e70 t hubp1_setup_interdependent +ffffffff820161e0 t hubp1_set_vm_system_aperture_settings +ffffffff82016400 t hubp1_set_vm_context0_settings +ffffffff820166e0 t hubp1_set_hubp_blank_en +ffffffff82016720 t hubp1_disconnect +ffffffff820167b0 t hubp1_disable_control +ffffffff820167f0 t hubp1_get_underflow_status +ffffffff82016860 t hubp1_wait_pipe_read_start +ffffffff82017000 T dcn10_lock_all_pipes +ffffffff82017100 T dcn10_log_hw_state +ffffffff82018d10 T dcn10_did_underflow_occur +ffffffff82018db0 T dcn10_enable_power_gating_plane +ffffffff82018f50 T dcn10_disable_vga +ffffffff82019140 T dcn10_dpp_pg_control +ffffffff82019390 T dcn10_hubp_pg_control +ffffffff820195e0 T dcn10_bios_golden_init +ffffffff82019740 T dcn10_enable_stream_timing +ffffffff82019b30 T dcn10_verify_allow_pstate_change_high +ffffffff82019e90 T dcn10_plane_atomic_disconnect +ffffffff82019fc0 T dcn10_plane_atomic_power_down +ffffffff8201a100 T dcn10_plane_atomic_disable +ffffffff8201a260 T dcn10_disable_plane +ffffffff8201a420 T dcn10_init_pipes +ffffffff8201ab20 T dcn10_init_hw +ffffffff8201b110 T dcn10_power_down_on_boot +ffffffff8201b2b0 T dcn10_reset_hw_ctx_wrap +ffffffff8201b5d0 T dcn10_update_plane_addr +ffffffff8201b6f0 T dcn10_set_input_transfer_func +ffffffff8201b860 T dcn10_set_output_transfer_func +ffffffff8201b920 T dcn10_pipe_control_lock +ffffffff8201b9f0 T dcn10_cursor_lock +ffffffff8201bbb0 T dcn10_enable_vblanks_synchronization +ffffffff8201c330 T dcn10_enable_timing_synchronization +ffffffff8201c6f0 T dcn10_enable_per_frame_crtc_position_reset +ffffffff8201c8d0 T dcn10_program_gamut_remap +ffffffff8201cad0 T dcn10_program_output_csc +ffffffff8201cc00 T dcn10_update_visual_confirm_color +ffffffff8201cd00 T dcn10_update_mpcc +ffffffff8201cf80 T dcn10_blank_pixel_data +ffffffff8201d0c0 T dcn10_set_hdr_multiplier +ffffffff8201d150 T dcn10_program_pipe +ffffffff8201dd10 T dcn10_wait_for_pending_cleared +ffffffff8201de10 T dcn10_post_unlock_program_front_end +ffffffff8201e0c0 T dcn10_prepare_bandwidth +ffffffff8201e270 T dcn10_optimize_bandwidth +ffffffff8201e420 T dcn10_set_drr +ffffffff8201e520 T dcn10_get_position +ffffffff8201e5b0 T dcn10_set_static_screen_control +ffffffff8201e650 T dcn10_setup_stereo +ffffffff8201e7b0 T dcn10_wait_for_mpcc_disconnect +ffffffff8201e960 T dcn10_dummy_display_power_gating +ffffffff8201e990 T dcn10_update_pending_status +ffffffff8201ead0 T dcn10_update_dchub +ffffffff8201eb00 T dcn10_set_cursor_position +ffffffff8201f040 T dcn10_set_cursor_attribute +ffffffff8201f090 T dcn10_set_cursor_sdr_white_level +ffffffff8201f160 T dcn10_get_vupdate_offset_from_vsync +ffffffff8201f1f0 T dcn10_calc_vupdate_position +ffffffff8201f280 T dcn10_setup_periodic_interrupt +ffffffff8201f390 T dcn10_setup_vupdate_interrupt +ffffffff8201f450 T dcn10_unblank_stream +ffffffff8201f560 T dcn10_send_immediate_sdp_message +ffffffff8201f5c0 T dcn10_set_clock +ffffffff8201f6d0 T dcn10_get_clock +ffffffff8201f730 T dcn10_get_dcc_en_bits +ffffffff82020000 T snprintf_count +ffffffff82020090 T dcn10_clear_status_bits +ffffffff82020240 T dcn10_get_hw_state +ffffffff82022000 T dcn10_hw_sequencer_construct +ffffffff82023000 T dcn10_ipp_construct +ffffffff82023050 T dcn20_ipp_construct +ffffffff820230a0 t dcn10_ipp_destroy +ffffffff82024000 T dcn10_link_encoder_set_dp_phy_pattern_training_pattern +ffffffff820240b0 T dcn10_get_dig_frontend +ffffffff82024170 T enc1_configure_encoder +ffffffff820241f0 T dcn10_psr_program_dp_dphy_fast_training +ffffffff82024270 T dcn10_psr_program_secondary_packet +ffffffff820242f0 T dcn10_is_dig_enabled +ffffffff82024350 T dcn10_link_encoder_validate_dvi_output +ffffffff82024400 T dcn10_link_encoder_validate_dp_output +ffffffff82024440 T dcn10_link_encoder_construct +ffffffff82024630 T dcn10_link_encoder_validate_output_with_stream +ffffffff82024820 T dcn10_link_encoder_hw_init +ffffffff82024a20 T dcn10_aux_initialize +ffffffff82024ab0 T dcn10_link_encoder_destroy +ffffffff82024b00 T dcn10_link_encoder_setup +ffffffff82024c50 T dcn10_link_encoder_enable_tmds_output +ffffffff82024d40 T dcn10_link_encoder_enable_tmds_output_with_clk_pattern_wa +ffffffff82024e60 T dcn10_link_encoder_enable_dp_output +ffffffff82024fe0 T dcn10_link_encoder_enable_dp_mst_output +ffffffff82025160 T dcn10_link_encoder_disable_output +ffffffff82025340 T dcn10_link_encoder_dp_set_lane_settings +ffffffff820254e0 T dcn10_link_encoder_dp_set_phy_pattern +ffffffff82025c00 t set_dp_phy_pattern_hbr2_compliance_cp2520_2 +ffffffff82025e00 T dcn10_link_encoder_update_mst_stream_allocation_table +ffffffff820260e0 T dcn10_link_encoder_connect_dig_be_to_fe +ffffffff82026220 T dcn10_link_encoder_enable_hpd +ffffffff82026260 T dcn10_link_encoder_disable_hpd +ffffffff820262a0 T dcn10_get_dig_mode +ffffffff82026310 T dcn10_link_encoder_get_max_link_cap +ffffffff82026390 t program_pattern_symbols +ffffffff82027000 T mpc1_set_bg_color +ffffffff820271e0 T mpc1_get_mpcc +ffffffff82027270 T mpc1_update_stereo_mix +ffffffff820273a0 T mpc1_assert_idle_mpcc +ffffffff82027470 T mpc1_get_mpcc_for_dpp +ffffffff82027520 T mpc1_is_mpcc_idle +ffffffff82027610 T mpc1_assert_mpcc_idle_before_connect +ffffffff82027750 T mpc1_insert_plane +ffffffff82027ca0 T mpc1_remove_mpcc +ffffffff82028060 T mpc1_mpc_init +ffffffff82028380 T mpc1_mpc_init_single_inst +ffffffff82028570 T mpc1_init_mpcc_list_from_hw +ffffffff82028840 T mpc1_read_mpcc_state +ffffffff820289d0 T mpc1_cursor_lock +ffffffff82028a50 T mpc1_get_mpc_out_mux +ffffffff82028ad0 T dcn10_mpc_construct +ffffffff82028c50 t mpc1_update_blending +ffffffff82029000 T opp1_program_bit_depth_reduction +ffffffff82029400 T opp1_set_dyn_expansion +ffffffff82029570 T opp1_program_fmt +ffffffff82029870 T opp1_program_stereo +ffffffff820299a0 T opp1_pipe_clock_control +ffffffff820299e0 T opp1_destroy +ffffffff82029a30 T dcn10_opp_construct +ffffffff8202a000 T optc1_program_global_sync +ffffffff8202a150 T optc1_setup_vertical_interrupt0 +ffffffff8202a1e0 T optc1_setup_vertical_interrupt1 +ffffffff8202a250 T optc1_setup_vertical_interrupt2 +ffffffff8202a2c0 T optc1_program_timing +ffffffff8202a970 T optc1_is_two_pixels_per_containter +ffffffff8202a9c0 T optc1_set_vtg_params +ffffffff8202ab00 T optc1_set_blank_data_double_buffer +ffffffff8202ab40 T optc1_set_timing_double_buffer +ffffffff8202ab80 T optc1_set_blank +ffffffff8202ac60 T optc1_is_blanked +ffffffff8202ace0 T optc1_enable_optc_clock +ffffffff8202af00 T optc1_disable_crtc +ffffffff8202aff0 T optc1_program_blank_color +ffffffff8202b0a0 T optc1_validate_timing +ffffffff8202b1a0 T optc1_get_vblank_counter +ffffffff8202b200 T optc1_lock +ffffffff8202b2f0 T optc1_unlock +ffffffff8202b360 T optc1_get_position +ffffffff8202b3e0 T optc1_is_counter_moving +ffffffff8202b460 T optc1_did_triggered_reset_occur +ffffffff8202b500 T optc1_disable_reset_trigger +ffffffff8202b5c0 T optc1_enable_reset_trigger +ffffffff8202b6d0 T optc1_enable_crtc_reset +ffffffff8202b830 T optc1_wait_for_state +ffffffff8202b900 T optc1_set_early_control +ffffffff8202b930 T optc1_set_static_screen_control +ffffffff8202b9d0 T optc1_set_drr +ffffffff8202bc00 T optc1_set_vtotal_min_max +ffffffff8202bca0 T optc1_get_crtc_scanoutpos +ffffffff8202bdb0 T optc1_program_stereo +ffffffff8202bfb0 T optc1_is_stereo_left_eye +ffffffff8202c020 T optc1_get_hw_timing +ffffffff8202c140 T optc1_read_otg_state +ffffffff8202c450 T optc1_get_otg_active_size +ffffffff8202c560 T optc1_clear_optc_underflow +ffffffff8202c5b0 T optc1_tg_init +ffffffff8202c660 T optc1_is_tg_enabled +ffffffff8202c6d0 T optc1_is_optc_underflow_occurred +ffffffff8202c740 T optc1_configure_crc +ffffffff8202c9d0 T optc1_get_crc +ffffffff8202cae0 T dcn10_timing_generator_init +ffffffff8202cb50 t optc1_enable_crtc +ffffffff8202cc50 t optc1_set_test_pattern +ffffffff8202d330 t optc1_program_manual_trigger +ffffffff8202d3e0 t optc1_setup_manual_trigger +ffffffff8202e000 T dcn10_find_first_free_match_stream_enc_for_link +ffffffff8202e0b0 T dcn10_create_resource_pool +ffffffff8202f260 t dcn10_resource_construct_fp +ffffffff8202f3e0 t dcn10_resource_destruct +ffffffff8202f6f0 t dcn10_destroy_resource_pool +ffffffff8202f750 t dcn10_panel_cntl_create +ffffffff8202f7e0 t dcn10_link_encoder_create +ffffffff8202f8e0 t dcn10_validate_bandwidth +ffffffff8202f960 t dcn10_validate_global +ffffffff8202fb40 t dcn10_acquire_idle_pipe_for_layer +ffffffff8202fc80 t dcn10_validate_plane +ffffffff8202fcd0 t dcn10_add_stream_to_ctx +ffffffff8202fe90 t dcn10_patch_unknown_plane_state +ffffffff8202fef0 t read_dce_straps +ffffffff8202ff20 t create_audio +ffffffff8202ff50 t dcn10_stream_encoder_create +ffffffff8202fff0 t dcn10_hwseq_create +ffffffff820300a0 t dcn10_get_dcc_compression_cap +ffffffff82031000 T enc1_update_generic_info_packet +ffffffff82031430 T enc1_stream_encoder_dp_set_stream_attribute +ffffffff82031900 T enc1_stream_encoder_set_stream_attribute_helper +ffffffff82031980 T enc1_stream_encoder_hdmi_set_stream_attribute +ffffffff82031f70 T enc1_stream_encoder_dvi_set_stream_attribute +ffffffff82032100 T enc1_stream_encoder_set_throttled_vcp_size +ffffffff82032320 T enc1_stream_encoder_update_dp_info_packets +ffffffff820324c0 T enc1_stream_encoder_send_immediate_sdp_message +ffffffff820328d0 T enc1_stream_encoder_stop_dp_info_packets +ffffffff82032aa0 T enc1_stream_encoder_dp_blank +ffffffff82032c10 T enc1_stream_encoder_dp_unblank +ffffffff82032e20 T enc1_stream_encoder_set_avmute +ffffffff82032e60 T enc1_reset_hdmi_stream_attribute +ffffffff82032f30 T get_audio_clock_info +ffffffff82033020 T enc1_se_enable_audio_clock +ffffffff82033080 T enc1_se_enable_dp_audio +ffffffff82033150 T enc1_se_audio_mute_control +ffffffff820331a0 T enc1_se_dp_audio_setup +ffffffff820331b0 t enc1_se_audio_setup +ffffffff82033340 T enc1_se_dp_audio_enable +ffffffff82033590 T enc1_se_dp_audio_disable +ffffffff82033700 T enc1_se_hdmi_audio_setup +ffffffff82033bd0 T enc1_se_hdmi_audio_disable +ffffffff82033c60 T enc1_setup_stereo_sync +ffffffff82033ce0 T enc1_dig_connect_to_otg +ffffffff82033d20 T enc1_dig_source_otg +ffffffff82033d90 T enc1_stream_encoder_dp_get_pixel_format +ffffffff82033e80 T dcn10_stream_encoder_construct +ffffffff82033ee0 t enc1_stream_encoder_update_hdmi_info_packets +ffffffff82034290 t enc1_stream_encoder_stop_hdmi_info_packets +ffffffff82035000 T dccg2_update_dpp_dto +ffffffff82035160 T dccg2_get_dccg_ref_freq +ffffffff82035220 T dccg2_set_fifo_errdet_ovr_en +ffffffff82035260 T dccg2_otg_add_pixel +ffffffff82035300 T dccg2_otg_drop_pixel +ffffffff820353a0 T dccg2_init +ffffffff820353d0 T dccg2_create +ffffffff82035480 T dcn_dccg_destroy +ffffffff82036000 T dpp20_read_state +ffffffff820361d0 T dpp2_power_on_obuf +ffffffff820362a0 T dpp2_dummy_program_input_lut +ffffffff820362d0 T dscl2_calc_lb_num_partitions +ffffffff820363f0 T dpp2_cnv_set_alpha_keyer +ffffffff82036670 T dpp2_set_cursor_attributes +ffffffff820367d0 T oppn20_dummy_program_regamma_pwl +ffffffff82036800 T dpp2_construct +ffffffff82036880 t dpp2_cnv_setup +ffffffff82038000 T dpp2_set_degamma_pwl +ffffffff820383b0 T dpp2_set_degamma +ffffffff82038560 T dpp2_cm_set_gamut_remap +ffffffff82038790 T dpp2_program_input_csc +ffffffff820389c0 T dpp20_program_blnd_lut +ffffffff82039110 T dpp20_program_shaper +ffffffff8203b0a0 T dpp20_program_3dlut +ffffffff8203b7a0 t dpp20_set3dlut_ram12 +ffffffff8203b970 T dpp2_set_hdr_multiplier +ffffffff8203c000 t dsc2_get_enc_caps +ffffffff8203c080 t dsc2_read_state +ffffffff8203c230 t dsc2_validate_stream +ffffffff8203c290 t dsc2_set_config +ffffffff8203d620 t dsc2_get_packed_pps +ffffffff8203d7c0 t dsc2_enable +ffffffff8203d970 t dsc2_disable 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hubp2_is_triplebuffer_enabled +ffffffff82046c10 T hubp2_set_flip_control_surface_gsl +ffffffff82046c60 T hubp2_is_flip_pending +ffffffff82046d70 T hubp2_set_blank +ffffffff82046dd0 T hubp2_set_blank_regs +ffffffff82046ed0 T hubp2_cursor_set_position +ffffffff820472f0 T hubp2_clk_cntl +ffffffff82047340 T hubp2_vtg_sel +ffffffff82047380 T hubp2_clear_underflow +ffffffff820473d0 T hubp2_read_state_common +ffffffff82047fd0 T hubp2_read_state +ffffffff820482a0 T hubp2_construct +ffffffff82048310 t hubp2_setup +ffffffff820487c0 t hubp2_validate_dml_output +ffffffff8204a000 T dcn20_set_flip_control_gsl +ffffffff8204a050 T dcn20_enable_power_gating_plane +ffffffff8204a410 T dcn20_dccg_init +ffffffff8204a490 T dcn20_disable_vga +ffffffff8204a550 T dcn20_program_triple_buffer +ffffffff8204a5a0 T dcn20_init_blank +ffffffff8204a790 T dcn20_dsc_pg_control +ffffffff8204aba0 T dcn20_dpp_pg_control +ffffffff8204ae50 T dcn20_hubp_pg_control +ffffffff8204b100 T dcn20_plane_atomic_disable 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+ffffffff8204ea80 T dcn20_disable_stream_gating +ffffffff8204eb30 T dcn20_enable_stream_gating +ffffffff8204ebd0 T dcn20_set_dmdata_attributes +ffffffff8204ec90 T dcn20_init_vm_ctx +ffffffff8204ed50 T dcn20_init_sys_ctx +ffffffff8204ee00 T dcn20_update_plane_addr +ffffffff8204ef40 T dcn20_unblank_stream +ffffffff8204f0c0 T dcn20_setup_vupdate_interrupt +ffffffff8204f130 T dcn20_reset_hw_ctx_wrap +ffffffff8204f4d0 T dcn20_update_visual_confirm_color +ffffffff8204f5e0 T dcn20_update_mpcc +ffffffff8204f860 T dcn20_enable_stream +ffffffff8204fa30 T dcn20_program_dmdata_engine +ffffffff8204fad0 T dcn20_fpga_init_hw +ffffffff820500d0 T dcn20_optimize_timing_for_fsft +ffffffff82050110 T dcn20_set_disp_pattern_generator +ffffffff82051000 T dcn20_hw_sequencer_construct +ffffffff82052000 T enc2_fec_set_enable +ffffffff82052090 T enc2_fec_set_ready +ffffffff820520d0 T enc2_fec_is_active +ffffffff82052140 T link_enc2_read_state +ffffffff820521f0 T dcn20_link_encoder_enable_dp_output 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opp2_set_disp_pattern_generator +ffffffff82056810 T opp2_dpg_set_blank_color +ffffffff82056990 T opp2_program_dpg_dimensions +ffffffff82056a20 T opp2_dpg_is_blanked +ffffffff82056ae0 T opp2_program_left_edge_extra_pixel +ffffffff82056b30 T dcn20_opp_construct +ffffffff82057000 T optc2_enable_crtc +ffffffff82057100 T optc2_set_gsl +ffffffff820571f0 T optc2_set_gsl_source_select +ffffffff820572b0 T optc2_set_dsc_config +ffffffff82057380 T optc2_get_dsc_status +ffffffff820573c0 T optc2_is_two_pixels_per_containter +ffffffff820573d0 T optc2_set_odm_bypass +ffffffff82057510 T optc2_set_odm_combine +ffffffff82057700 T optc2_get_optc_source +ffffffff820577d0 T optc2_triplebuffer_lock +ffffffff820578f0 T optc2_triplebuffer_unlock +ffffffff820579a0 T optc2_lock_doublebuffer_enable +ffffffff82057b80 T optc2_lock_doublebuffer_disable +ffffffff82057c60 T optc2_setup_manual_trigger +ffffffff82057d80 T optc2_program_manual_trigger +ffffffff82057df0 T optc2_configure_crc +ffffffff82057e80 T optc2_get_last_used_drr_vtotal +ffffffff82057ec0 T dcn20_timing_generator_init +ffffffff82057f30 t optc2_set_dwb_source +ffffffff82057fc0 t optc2_align_vblanks +ffffffff82059000 T dcn20_dpp_destroy +ffffffff82059050 T dcn20_dpp_create +ffffffff82059120 T dcn20_ipp_create +ffffffff820591e0 T dcn20_opp_create +ffffffff820592a0 T dcn20_aux_engine_create +ffffffff82059340 T dcn20_i2c_hw_create +ffffffff820593d0 T dcn20_mpc_create +ffffffff82059460 T dcn20_hubbub_create +ffffffff82059530 T dcn20_timing_generator_create +ffffffff820595d0 T dcn20_link_encoder_create +ffffffff820596d0 T dcn20_stream_encoder_create +ffffffff82059790 T dcn20_hwseq_create +ffffffff82059800 T dcn20_clock_source_destroy +ffffffff82059850 T dcn20_dsc_create +ffffffff82059910 T dcn20_dsc_destroy +ffffffff82059960 T dcn20_hubp_create +ffffffff82059a30 T dcn20_build_mapped_resource +ffffffff82059c50 T dcn20_acquire_dsc +ffffffff82059d90 T dcn20_release_dsc +ffffffff82059e00 T dcn20_add_dsc_to_stream_resource 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read_dce_straps +ffffffff8205dfc0 t dcn20_create_audio +ffffffff8205e000 T enc2_set_dynamic_metadata +ffffffff8205e280 T enc2_stream_encoder_dp_unblank +ffffffff8205e5b0 T enc2_stream_encoder_dp_set_stream_attribute +ffffffff8205e610 T enc2_get_fifo_cal_average_level +ffffffff8205e670 T dcn20_stream_encoder_construct +ffffffff8205e6d0 t enc2_stream_encoder_update_hdmi_info_packets +ffffffff8205e7a0 t enc2_stream_encoder_stop_hdmi_info_packets +ffffffff8205eaa0 t enc2_stream_encoder_update_dp_info_packets +ffffffff8205eb50 t enc2_read_state +ffffffff8205ecd0 t enc2_dp_set_dsc_config +ffffffff8205eda0 t enc2_dp_set_dsc_pps_info_packet +ffffffff8205f270 t enc2_dp_set_odm_combine +ffffffff8205f2b0 t enc2_update_hdmi_info_packet +ffffffff82060000 T dcn20_vmid_setup +ffffffff82061000 T dccg201_create +ffffffff820610b0 t dccg201_update_dpp_dto +ffffffff82062000 T dpp201_construct +ffffffff82062080 t dpp201_get_optimal_number_of_taps +ffffffff82062460 t dpp201_cnv_setup +ffffffff82063000 T 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dcn21_set_abm_immediate_disable +ffffffff82074340 T dcn21_set_pipe +ffffffff82074450 T dcn21_set_backlight_level +ffffffff82074620 T dcn21_is_abm_supported +ffffffff82075000 T dcn21_hw_sequencer_construct +ffffffff82076000 T dcn21_link_encoder_enable_dp_output +ffffffff82076140 t dcn21_link_encoder_acquire_phy +ffffffff82076320 T dcn21_link_encoder_construct +ffffffff82076510 t dcn21_link_encoder_enable_dp_mst_output +ffffffff82076580 t dcn21_link_encoder_disable_output +ffffffff82077000 T dcn21_fast_validate_bw +ffffffff82077660 T dcn21_create_resource_pool +ffffffff820789c0 t dcn21_resource_destruct +ffffffff82078e60 t dcn21_destroy_resource_pool +ffffffff82078ec0 t dcn21_panel_cntl_create +ffffffff82078f50 t dcn21_link_encoder_create +ffffffff82079050 t dcn21_validate_bandwidth +ffffffff820790e0 t dcn21_patch_unknown_plane_state +ffffffff82079130 t dcn21_get_panel_config_defaults +ffffffff820791a0 t read_dce_straps +ffffffff820791d0 t dcn21_create_audio +ffffffff82079200 t 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dcn30_set_writeback +ffffffff8208d730 T dcn30_mmhubbub_warmup +ffffffff8208d9e0 T dcn30_enable_writeback +ffffffff8208dab0 T dcn30_disable_writeback +ffffffff8208db90 T dcn30_program_all_writeback_pipes_in_tree +ffffffff8208de80 T dcn30_init_hw +ffffffff8208e770 T dcn30_set_avmute +ffffffff8208e7d0 T dcn30_update_info_frame +ffffffff8208e8a0 T dcn30_program_dmdata_engine +ffffffff8208e940 T dcn30_apply_idle_power_optimizations +ffffffff8208eec0 T dcn30_does_plane_fit_in_mall +ffffffff8208ef70 T dcn30_hardware_release +ffffffff8208f080 T dcn30_set_disp_pattern_generator +ffffffff8208f0f0 T dcn30_prepare_bandwidth +ffffffff82090000 T dcn30_hw_sequencer_construct +ffffffff82091000 t mmhubbub3_warmup_mcif +ffffffff82091210 t mmhubbub3_config_mcif_buf +ffffffff820916c0 t mmhubbub3_config_mcif_arb +ffffffff82091b10 T dcn30_mmhubbub_construct +ffffffff82092000 T mpc3_is_dwb_idle +ffffffff82092070 T mpc3_set_dwb_mux +ffffffff820920f0 T mpc3_disable_dwb_mux +ffffffff82092170 T mpc3_set_out_rate_control +ffffffff82092280 T mpc3_get_ogam_current +ffffffff82092320 T mpc3_power_on_ogam_lut +ffffffff820923f0 T mpc3_set_output_gamma +ffffffff82092f90 T mpc3_set_denorm +ffffffff82093000 T mpc3_set_denorm_clamp +ffffffff82093150 T mpc3_program_shaper +ffffffff820953c0 t mpc3_power_on_shaper_3dlut +ffffffff82095740 T mpc3_init_mpcc +ffffffff820957c0 T mpc3_set_gamut_remap +ffffffff82095a10 T mpc3_program_3dlut +ffffffff820961a0 t mpc3_set3dlut_ram12 +ffffffff82096380 T mpc3_set_output_csc +ffffffff820964f0 T mpc3_set_ocsc_default +ffffffff82096660 T mpc3_set_rmu_mux +ffffffff82096700 T mpc3_get_rmu_mux_status +ffffffff820967b0 T mpcc3_acquire_rmu +ffffffff82096910 t mpcc3_release_rmu +ffffffff82096a80 t mpc3_set_mpc_mem_lp_mode +ffffffff82096c10 T dcn30_mpc_construct +ffffffff82097000 T optc3_triplebuffer_lock +ffffffff82097120 T optc3_lock_doublebuffer_enable +ffffffff820973b0 T optc3_lock_doublebuffer_disable +ffffffff820974c0 T optc3_lock +ffffffff82097590 T optc3_set_out_mux +ffffffff820975d0 T optc3_program_blank_color +ffffffff82097710 T optc3_set_drr_trigger_window +ffffffff820977a0 T optc3_set_vtotal_change_limit +ffffffff82097810 T optc3_set_dsc_config +ffffffff82097860 T optc3_set_odm_bypass +ffffffff820979e0 T optc3_wait_drr_doublebuffer_pending_clear +ffffffff82097a60 T optc3_set_vtotal_min_max +ffffffff82097a80 T optc3_tg_init +ffffffff82097ae0 T dcn30_timing_generator_init +ffffffff82097b50 t optc3_set_odm_combine +ffffffff82098000 T dcn30_add_stream_to_ctx +ffffffff82098020 T dcn30_populate_dml_pipes_from_context +ffffffff82098110 T dcn30_populate_dml_writeback_from_context +ffffffff82098170 T dcn30_calc_max_scaled_time +ffffffff820981d0 T dcn30_set_mcif_arb_params +ffffffff82098340 T dcn30_acquire_post_bldn_3dlut +ffffffff820984c0 T dcn30_release_post_bldn_3dlut +ffffffff82098570 T dcn30_internal_validate_bw +ffffffff82099350 t dcn30_split_stream_for_mpc_or_odm +ffffffff82099670 T dcn30_can_support_mclk_switch_using_fw_based_vblank_stretch +ffffffff82099790 T dcn30_setup_mclk_switch_using_fw_based_vblank_stretch +ffffffff82099830 T dcn30_update_soc_for_wm_a +ffffffff82099880 T dcn30_calculate_wm_and_dlg +ffffffff820998f0 T dcn30_validate_bandwidth +ffffffff82099d20 T dcn30_update_bw_bounding_box +ffffffff8209a500 T dcn30_create_resource_pool +ffffffff8209bac0 t dcn30_resource_destruct +ffffffff8209c030 t dcn30_destroy_resource_pool +ffffffff8209c090 t dcn30_panel_cntl_create +ffffffff8209c120 t dcn30_link_encoder_create +ffffffff8209c1e0 t read_dce_straps +ffffffff8209c210 t dcn30_create_audio +ffffffff8209c240 t dcn30_stream_encoder_create +ffffffff8209c3c0 t dcn30_hwseq_create +ffffffff8209d000 T vpg3_update_generic_info_packet +ffffffff8209d9a0 T vpg3_construct +ffffffff8209e000 T dccg301_create +ffffffff8209f000 T dcn301_link_encoder_construct +ffffffff820a0000 T hubbub301_construct +ffffffff820a1000 T dcn301_hw_sequencer_construct +ffffffff820a2000 T dcn301_panel_cntl_construct +ffffffff820a2050 t dcn301_panel_cntl_destroy +ffffffff820a20a0 t dcn301_panel_cntl_hw_init +ffffffff820a22b0 t dcn301_is_panel_backlight_on +ffffffff820a2310 t dcn301_is_panel_powered_on +ffffffff820a23c0 t dcn301_store_backlight_level +ffffffff820a2460 t dcn301_get_16_bit_backlight_from_pwm +ffffffff820a3000 T dcn301_create_resource_pool +ffffffff820a45a0 t dcn301_destruct +ffffffff820a4ae0 t dcn301_destroy_resource_pool +ffffffff820a4b40 t dcn301_panel_cntl_create +ffffffff820a4bd0 t dcn301_link_encoder_create +ffffffff820a4c90 t dcn301_calculate_wm_and_dlg +ffffffff820a4d00 t read_dce_straps +ffffffff820a4d30 t dcn301_create_audio +ffffffff820a4d60 t dcn301_stream_encoder_create +ffffffff820a4ee0 t dcn301_hwseq_create +ffffffff820a5000 T dcn302_dpp_pg_control +ffffffff820a52a0 T dcn302_hubp_pg_control +ffffffff820a5550 T dcn302_dsc_pg_control +ffffffff820a6000 T dcn302_hw_sequencer_construct +ffffffff820a7000 T dcn302_update_bw_bounding_box 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dccg31_set_dispclk_change_mode +ffffffff820b0ac0 T dccg31_init +ffffffff820b1020 T dccg31_otg_add_pixel +ffffffff820b1060 T dccg31_otg_drop_pixel +ffffffff820b10a0 T dccg31_create +ffffffff820b2000 T dcn31_link_encoder_set_dio_phy_mux +ffffffff820b2390 T dcn31_link_encoder_construct +ffffffff820b2590 T dcn31_link_encoder_construct_minimal +ffffffff820b2610 T dcn31_link_encoder_enable_dp_output +ffffffff820b2850 T dcn31_link_encoder_enable_dp_mst_output +ffffffff820b2a90 T dcn31_link_encoder_disable_output +ffffffff820b2d20 T dcn31_link_encoder_is_in_alt_mode +ffffffff820b2e60 T dcn31_link_encoder_get_max_link_cap +ffffffff820b2fd0 t enc31_hw_init +ffffffff820b4000 T dcn31_hpo_dp_link_enc_enable +ffffffff820b4160 T dcn31_hpo_dp_link_enc_disable +ffffffff820b41d0 T dcn31_hpo_dp_link_enc_set_link_test_pattern +ffffffff820b4b00 T dcn31_hpo_dp_link_enc_update_stream_allocation_table +ffffffff820b4d90 T dcn31_hpo_dp_link_enc_set_throttled_vcp_size +ffffffff820b5030 T dcn31_hpo_dp_link_enc_read_state +ffffffff820b52e0 T dcn31_hpo_dp_link_enc_enable_dp_output +ffffffff820b53e0 T dcn31_hpo_dp_link_enc_disable_output +ffffffff820b5520 T dcn31_hpo_dp_link_enc_set_ffe +ffffffff820b5610 T hpo_dp_link_encoder31_construct +ffffffff820b5670 t dcn31_hpo_dp_link_enc_is_in_alt_mode +ffffffff820b6000 T dcn31_hpo_dp_stream_encoder_construct +ffffffff820b6070 t dcn31_hpo_dp_stream_enc_enable_stream +ffffffff820b61b0 t dcn31_hpo_dp_stream_enc_dp_unblank +ffffffff820b6460 t dcn31_hpo_dp_stream_enc_dp_blank +ffffffff820b6560 t dcn31_hpo_dp_stream_enc_disable +ffffffff820b65d0 t dcn31_hpo_dp_stream_enc_set_stream_attribute +ffffffff820b6e80 t dcn31_hpo_dp_stream_enc_update_dp_info_packets +ffffffff820b7040 t dcn31_hpo_dp_stream_enc_stop_dp_info_packets +ffffffff820b71d0 t dcn31_hpo_dp_stream_enc_set_dsc_pps_info_packet +ffffffff820b7470 t dcn31_hpo_dp_stream_enc_map_stream_to_link +ffffffff820b7570 t dcn31_hpo_dp_stream_enc_mute_control +ffffffff820b75e0 t dcn31_hpo_dp_stream_enc_audio_setup +ffffffff820b7690 t dcn31_hpo_dp_stream_enc_audio_enable +ffffffff820b7760 t dcn31_hpo_dp_stream_enc_audio_disable +ffffffff820b7910 t dcn31_hpo_dp_stream_enc_read_state +ffffffff820b7aa0 t dcn31_set_hblank_min_symbol_width +ffffffff820b8000 T hubbub31_init_dchub_sys_ctx +ffffffff820b81f0 T hubbub31_construct +ffffffff820b8290 t hubbub31_get_dcc_compression_cap +ffffffff820b8480 t hubbub31_get_dchub_ref_freq +ffffffff820b8560 t hubbub31_program_watermarks +ffffffff820b9e20 t hubbub31_verify_allow_pstate_change_high +ffffffff820b9fe0 t dcn31_program_det_size +ffffffff820ba1a0 t dcn31_program_compbuf_size +ffffffff820ba420 t dcn31_init_crb +ffffffff820bb000 T hubp31_set_unbounded_requesting +ffffffff820bb090 T hubp31_soft_reset +ffffffff820bb0e0 T hubp31_construct +ffffffff820bb150 t hubp31_program_extended_blank +ffffffff820bc000 T dcn31_init_hw +ffffffff820bc960 T dcn31_dsc_pg_control +ffffffff820bccb0 T dcn31_enable_power_gating_plane +ffffffff820bcf10 T dcn31_update_info_frame +ffffffff820bcfe0 T dcn31_z10_save_init +ffffffff820bd0a0 T dcn31_z10_restore +ffffffff820bd180 T dcn31_hubp_pg_control +ffffffff820bd4a0 T dcn31_init_sys_ctx +ffffffff820bd550 T dcn31_reset_hw_ctx_wrap +ffffffff820bd8c0 T dcn31_setup_hpo_hw_control +ffffffff820be000 T dcn31_hw_sequencer_construct +ffffffff820bf000 T optc31_immediate_disable_crtc +ffffffff820bf100 T optc31_set_drr +ffffffff820bf320 T optc3_init_odm +ffffffff820bf490 T dcn31_timing_generator_init +ffffffff820bf500 t optc31_enable_crtc +ffffffff820bf600 t optc31_disable_crtc +ffffffff820bf6e0 t optc31_set_odm_combine +ffffffff820c0000 T dcn31_panel_cntl_construct +ffffffff820c0040 t dcn31_panel_cntl_destroy +ffffffff820c0090 t dcn31_panel_cntl_hw_init +ffffffff820c0180 t dcn31_is_panel_backlight_on +ffffffff820c0220 t dcn31_is_panel_powered_on +ffffffff820c02d0 t dcn31_store_backlight_level +ffffffff820c0390 t dcn31_get_16_bit_backlight_from_pwm +ffffffff820c1000 T dcn31_populate_dml_pipes_from_context +ffffffff820c1350 T dcn31_calculate_wm_and_dlg +ffffffff820c13d0 T dcn31_populate_dml_writeback_from_context +ffffffff820c1430 T dcn31_set_mcif_arb_params +ffffffff820c1490 T dcn31_validate_bandwidth +ffffffff820c1870 T dcn31_create_resource_pool +ffffffff820c2c10 t dcn31_resource_destruct +ffffffff820c3270 t dcn31_destroy_resource_pool +ffffffff820c32d0 t dcn31_panel_cntl_create +ffffffff820c3340 t dcn31_link_encoder_create +ffffffff820c3400 t dcn31_link_enc_create_minimal +ffffffff820c34a0 t dcn31_get_panel_config_defaults +ffffffff820c3510 t read_dce_straps +ffffffff820c3540 t dcn31_create_audio +ffffffff820c3570 t dcn31_stream_encoder_create +ffffffff820c36f0 t dcn31_hpo_dp_stream_encoder_create +ffffffff820c38b0 t dcn31_hpo_dp_link_encoder_create +ffffffff820c3940 t dcn31_hwseq_create +ffffffff820c4000 T vpg31_powerdown +ffffffff820c4090 T vpg31_poweron +ffffffff820c4120 T vpg31_construct +ffffffff820c5000 T dccg314_create +ffffffff820c50b0 t dccg314_set_dpstreamclk +ffffffff820c5480 t dccg314_set_dtbclk_dto +ffffffff820c5670 t dccg314_set_pixel_rate_div +ffffffff820c59e0 t dccg314_set_valid_pixel_rate +ffffffff820c6000 T dcn314_dio_stream_encoder_construct +ffffffff820c6070 t enc314_stream_encoder_hdmi_set_stream_attribute +ffffffff820c6660 t enc314_stream_encoder_dvi_set_stream_attribute +ffffffff820c6870 t enc314_stream_encoder_dp_blank +ffffffff820c68c0 t enc314_stream_encoder_dp_unblank +ffffffff820c6c00 t enc314_read_state +ffffffff820c6d60 t enc314_dp_set_dsc_config +ffffffff820c6db0 t enc314_dp_set_odm_combine +ffffffff820c6df0 t enc314_set_dig_input_mode +ffffffff820c6e40 t enc314_enable_fifo +ffffffff820c6ee0 t enc314_disable_fifo +ffffffff820c6f30 t enc314_reset_fifo +ffffffff820c8000 T dcn314_update_odm +ffffffff820c8610 T dcn314_dsc_pg_control +ffffffff820c89e0 T dcn314_enable_power_gating_plane +ffffffff820c8c70 T dcn314_calculate_dccg_k1_k2_values +ffffffff820c8e00 T dcn314_set_pixels_per_cycle +ffffffff820c8ef0 T dcn314_hubp_pg_control +ffffffff820ca000 T dcn314_hw_sequencer_construct +ffffffff820cb000 T dcn314_timing_generator_init +ffffffff820cb070 t optc314_enable_crtc +ffffffff820cb170 t optc314_disable_crtc +ffffffff820cb250 t optc314_phantom_crtc_post_enable +ffffffff820cb310 t optc314_set_odm_bypass +ffffffff820cb480 t optc314_set_odm_combine +ffffffff820cb780 t optc314_set_h_timing_div_manual_mode +ffffffff820cc000 T dcn314_create_resource_pool +ffffffff820cd2d0 t dcn314_resource_destruct +ffffffff820cd930 t dcn314_destroy_resource_pool +ffffffff820cd990 t dcn31_panel_cntl_create +ffffffff820cda00 t dcn31_link_encoder_create +ffffffff820cdac0 t dcn31_link_enc_create_minimal +ffffffff820cdb60 t dcn314_populate_dml_pipes_from_context +ffffffff820cdbf0 t dcn314_update_bw_bounding_box +ffffffff820cdc40 t dcn314_get_panel_config_defaults +ffffffff820cdcb0 t read_dce_straps +ffffffff820cdce0 t dcn31_create_audio +ffffffff820cdd10 t dcn314_stream_encoder_create +ffffffff820cde90 t dcn31_hpo_dp_stream_encoder_create +ffffffff820ce050 t dcn31_hpo_dp_link_encoder_create +ffffffff820ce0e0 t dcn314_hwseq_create +ffffffff820cf000 T dcn315_create_resource_pool +ffffffff820d0270 t dcn315_resource_destruct +ffffffff820d08d0 t dcn315_destroy_resource_pool +ffffffff820d0930 t dcn31_panel_cntl_create +ffffffff820d09a0 t dcn31_link_encoder_create +ffffffff820d0a60 t dcn31_link_enc_create_minimal +ffffffff820d0b00 t dcn315_populate_dml_pipes_from_context +ffffffff820d0e50 t dcn315_get_panel_config_defaults +ffffffff820d0ec0 t read_dce_straps +ffffffff820d0ef0 t dcn31_create_audio +ffffffff820d0f20 t dcn315_stream_encoder_create +ffffffff820d10a0 t dcn31_hpo_dp_stream_encoder_create +ffffffff820d1260 t dcn31_hpo_dp_link_encoder_create +ffffffff820d12f0 t dcn31_hwseq_create +ffffffff820d2000 T dcn316_create_resource_pool +ffffffff820d32b0 t dcn316_resource_destruct +ffffffff820d3910 t dcn316_destroy_resource_pool +ffffffff820d3970 t dcn31_panel_cntl_create +ffffffff820d39e0 t dcn31_link_encoder_create +ffffffff820d3aa0 t dcn31_link_enc_create_minimal +ffffffff820d3b40 t dcn316_populate_dml_pipes_from_context +ffffffff820d3e70 t dcn316_get_panel_config_defaults +ffffffff820d3ee0 t read_dce_straps +ffffffff820d3f10 t dcn31_create_audio +ffffffff820d3f40 t dcn316_stream_encoder_create +ffffffff820d40c0 t dcn31_hpo_dp_stream_encoder_create +ffffffff820d4280 t dcn31_hpo_dp_link_encoder_create +ffffffff820d4310 t dcn31_hwseq_create +ffffffff820d5000 T dccg32_create +ffffffff820d50b0 t dccg32_get_dccg_ref_freq +ffffffff820d50e0 t dccg32_otg_add_pixel +ffffffff820d5120 t dccg32_otg_drop_pixel +ffffffff820d5160 t dccg32_set_dpstreamclk +ffffffff820d5530 t dccg32_set_dtbclk_dto +ffffffff820d5730 t dccg32_set_pixel_rate_div +ffffffff820d5aa0 t dccg32_set_valid_pixel_rate +ffffffff820d6000 T enc32_hw_init +ffffffff820d6090 T dcn32_link_encoder_enable_dp_output +ffffffff820d60e0 T dcn32_link_encoder_construct +ffffffff820d62c0 t dcn32_link_encoder_is_in_alt_mode +ffffffff820d6340 t dcn32_link_encoder_get_max_link_cap +ffffffff820d7000 T dcn32_dio_stream_encoder_construct +ffffffff820d7070 t enc32_stream_encoder_hdmi_set_stream_attribute +ffffffff820d75a0 t enc32_stream_encoder_dvi_set_stream_attribute +ffffffff820d7720 t enc32_stream_encoder_dp_unblank +ffffffff820d7be0 t enc32_read_state +ffffffff820d7d40 t enc32_dp_set_dsc_config +ffffffff820d7d90 t enc32_dp_set_odm_combine +ffffffff820d7dd0 t enc32_set_dig_input_mode +ffffffff820d8000 T dpp32_construct +ffffffff820d8060 t dscl32_calc_lb_num_partitions +ffffffff820d9000 T hpo_dp_link_encoder32_construct +ffffffff820d9060 t dcn32_hpo_dp_link_enc_is_in_alt_mode +ffffffff820da000 T dcn32_program_det_size +ffffffff820da1a0 T hubbub32_program_urgent_watermarks +ffffffff820da910 T hubbub32_program_stutter_watermarks +ffffffff820dad60 T hubbub32_program_pstate_watermarks +ffffffff820db1f0 T hubbub32_program_usr_watermarks +ffffffff820db440 T hubbub32_force_usr_retraining_allow +ffffffff820db4c0 T hubbub32_force_wm_propagate_to_pipes +ffffffff820db560 T hubbub32_construct +ffffffff820db5e0 t hubbub32_wm_read_state +ffffffff820dba60 t hubbub32_program_watermarks +ffffffff820dbb70 t hubbub32_init_watermarks +ffffffff820dbfb0 t dcn32_program_compbuf_size +ffffffff820dc230 t dcn32_init_crb +ffffffff820dd000 T hubp32_update_force_pstate_disallow +ffffffff820dd090 T hubp32_update_mall_sel +ffffffff820dd120 T hubp32_prepare_subvp_buffering +ffffffff820dd1c0 T hubp32_phantom_hubp_post_enable +ffffffff820dd2d0 T hubp32_cursor_set_attributes +ffffffff820dd590 T hubp32_construct +ffffffff820de000 T dcn32_dsc_pg_control +ffffffff820de310 T dcn32_enable_power_gating_plane +ffffffff820de4b0 T dcn32_hubp_pg_control +ffffffff820de720 T dcn32_apply_idle_power_optimizations +ffffffff820de990 t dcn32_calculate_cab_allocation +ffffffff820ded40 T dcn32_commit_subvp_config +ffffffff820dedf0 T dcn32_subvp_pipe_control_lock +ffffffff820defc0 T dcn32_set_mcm_luts +ffffffff820df150 T dcn32_set_input_transfer_func +ffffffff820df290 T dcn32_set_output_transfer_func +ffffffff820df4a0 T dcn32_subvp_update_force_pstate +ffffffff820df610 T dcn32_update_mall_sel +ffffffff820df790 T dcn32_program_mall_pipe_config +ffffffff820df870 T dcn32_init_hw +ffffffff820e0060 T dcn32_update_odm +ffffffff820e0670 T dcn32_calculate_dccg_k1_k2_values +ffffffff820e0870 T dcn32_is_dp_dig_pixel_rate_div_policy +ffffffff820e0900 T dcn32_set_pixels_per_cycle +ffffffff820e0a40 T dcn32_unblank_stream +ffffffff820e0c10 T dcn32_disable_link_output +ffffffff820e0ea0 T dcn32_update_phantom_vp_position +ffffffff820e0fc0 T dcn32_dsc_pg_status +ffffffff820e10a0 T dcn32_update_dsc_pg +ffffffff820e2000 T dcn32_hw_sequencer_init_functions +ffffffff820e3000 t mmhubbub32_warmup_mcif +ffffffff820e3210 t mmhubbub32_config_mcif_buf +ffffffff820e36c0 t mmhubbub32_config_mcif_arb +ffffffff820e3ad0 T dcn32_mmhubbub_construct +ffffffff820e4000 t mpc32_mpc_init +ffffffff820e4220 t mpc32_program_post1dlut +ffffffff820e4d00 t mpc32_program_shaper +ffffffff820e6fb0 t mpc32_program_3dlut +ffffffff820e78a0 T dcn32_mpc_construct +ffffffff820e7960 t mpc32_power_on_shaper_3dlut +ffffffff820e7b90 t mpc32_set3dlut_ram12 +ffffffff820e8000 T dcn32_timing_generator_init +ffffffff820e8070 t optc32_enable_crtc +ffffffff820e8170 t optc32_disable_crtc +ffffffff820e8250 t optc32_phantom_crtc_post_enable +ffffffff820e8310 t optc32_set_drr +ffffffff820e8560 t optc32_set_odm_bypass +ffffffff820e86d0 t optc32_set_odm_combine +ffffffff820e89d0 t optc32_set_h_timing_div_manual_mode +ffffffff820e9000 T dcn32_panel_cntl_create +ffffffff820e9070 T dcn32_acquire_post_bldn_3dlut +ffffffff820e9160 T dcn32_release_post_bldn_3dlut +ffffffff820e9210 T dcn32_remove_phantom_pipes +ffffffff820e9380 T dcn32_add_phantom_pipes +ffffffff820e97c0 T dcn32_validate_bandwidth +ffffffff820e9c80 T dcn32_populate_dml_pipes_from_context +ffffffff820ea040 T dcn32_calculate_wm_and_dlg +ffffffff820ea0b0 T dcn32_create_resource_pool +ffffffff820ea160 t dcn32_resource_construct +ffffffff820f65d0 T dcn32_acquire_idle_pipe_for_head_pipe_in_layer +ffffffff820f6810 T dcn32_calc_num_avail_chans_for_mall +ffffffff820f6880 t dcn32_mpc_create +ffffffff820fb240 t dcn32_resource_destruct +ffffffff820fb8b0 t dcn32_destroy_resource_pool +ffffffff820fb910 t dcn32_link_encoder_create +ffffffff820fc870 t dcn32_update_bw_bounding_box +ffffffff820fc8c0 t read_dce_straps +ffffffff820fc8f0 t dcn32_create_audio +ffffffff820fcc30 t dcn32_stream_encoder_create +ffffffff820feab0 t dcn32_hpo_dp_stream_encoder_create +ffffffff820ff790 t dcn32_hpo_dp_link_encoder_create +ffffffff820ffc10 t dcn32_hwseq_create +ffffffff821000b0 t dcn32_vpg_create +ffffffff82101000 T dcn32_helper_calculate_num_ways_for_subvp +ffffffff821011e0 T dcn32_merge_pipes_for_subvp +ffffffff821013b0 T dcn32_all_pipes_have_stream_and_plane +ffffffff82101440 T dcn32_subvp_in_use +ffffffff821014d0 T dcn32_mpo_in_use +ffffffff82101540 T dcn32_any_surfaces_rotated +ffffffff821015d0 T dcn32_determine_det_override +ffffffff82101910 T dcn32_set_det_allocations +ffffffff82101a90 T dcn32_save_mall_state +ffffffff82101b40 T dcn32_restore_mall_state +ffffffff82102000 T dcn321_link_encoder_construct +ffffffff82103000 T dcn321_create_resource_pool +ffffffff821030b0 t dcn321_resource_construct +ffffffff8210f4c0 t dcn321_mpc_create +ffffffff82113e80 t dcn321_resource_destruct +ffffffff821144f0 t dcn321_destroy_resource_pool +ffffffff82114550 t dcn321_link_encoder_create +ffffffff821154b0 t dcn321_update_bw_bounding_box +ffffffff82115500 t read_dce_straps +ffffffff82115530 t dcn321_create_audio +ffffffff82115870 t dcn321_stream_encoder_create +ffffffff821176f0 t dcn321_hpo_dp_stream_encoder_create +ffffffff821183d0 t dcn321_hpo_dp_link_encoder_create +ffffffff82118850 t dcn321_hwseq_create +ffffffff82118cf0 t dcn321_vpg_create +ffffffff8211a000 T bw_int_to_fixed_nonconst +ffffffff8211a090 T bw_frc_to_fixed +ffffffff8211a260 T bw_floor2 +ffffffff8211a310 T bw_ceil2 +ffffffff8211a390 T bw_mul +ffffffff8211b000 T convert_to_custom_float_format +ffffffff8211c000 T bw_calcs_init +ffffffff8211ce30 T bw_calcs +ffffffff8211e760 t calculate_bandwidth +ffffffff82126000 T scaler_settings_calculation +ffffffff82126380 T mode_support_and_system_configuration +ffffffff8212c160 T display_pipe_configuration +ffffffff8212c9a0 T dispclkdppclkdcfclk_deep_sleep_prefetch_parameters_watermarks_and_performance_calculation +ffffffff82132000 T dcn_bw_mod +ffffffff82132060 T dcn_bw_min2 +ffffffff821320a0 T dcn_bw_max +ffffffff821320d0 T dcn_bw_max2 +ffffffff82132110 T dcn_bw_floor2 +ffffffff821321b0 T dcn_bw_floor +ffffffff821321e0 T dcn_bw_ceil +ffffffff82132220 T dcn_bw_ceil2 +ffffffff821322d0 T dcn_bw_max3 +ffffffff82132370 T dcn_bw_max5 +ffffffff821324e0 T dcn_bw_pow +ffffffff82132570 T dcn_bw_fabs +ffffffff821325d0 T dcn_bw_log +ffffffff82133000 T swizzle_mode_to_macro_tile_size +ffffffff82133090 T dcn_validate_bandwidth +ffffffff82135330 T dcn_bw_sync_calcs_and_dml +ffffffff82135580 t dcn_bw_calc_rq_dlg_ttu +ffffffff82135f00 T dcn_find_dcfclk_suits_all +ffffffff82136360 T dcn_bw_update_from_pplib_fclks +ffffffff821364f0 T dcn_bw_update_from_pplib_dcfclks +ffffffff821365c0 T dcn_get_soc_clks +ffffffff82136640 T dcn_bw_notify_pplib_of_wm_ranges +ffffffff82137000 T dcn20_populate_dml_writeback_from_context +ffffffff82137180 T dcn20_fpu_set_wb_arb_params +ffffffff82137330 T dcn20_calculate_dlg_params +ffffffff82137b10 T dcn20_populate_dml_pipes_from_context +ffffffff82138a10 T dcn20_calculate_wm +ffffffff821391b0 T dcn20_update_bounding_box +ffffffff82139430 T dcn20_cap_soc_clocks +ffffffff821397b0 T dcn20_patch_bounding_box +ffffffff82139920 T dcn20_validate_bandwidth_fp +ffffffff82139ab0 t dcn20_validate_bandwidth_internal +ffffffff82139e90 T dcn20_fpu_set_wm_ranges +ffffffff82139f30 T dcn20_fpu_adjust_dppclk +ffffffff82139fd0 T dcn21_populate_dml_pipes_from_context +ffffffff8213a0d0 T dcn21_validate_bandwidth_fp +ffffffff8213ab50 T dcn21_update_bw_bounding_box +ffffffff8213b040 T dcn21_clk_mgr_set_bw_params_wm_table +ffffffff8213b0a0 T dcn201_populate_dml_writeback_from_context_fpu +ffffffff8213b3b0 t calculate_wm_set_for_vlevel +ffffffff8213c000 T dml20_recalculate +ffffffff8213c740 t dml20_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation +ffffffff82141da0 T dml20_ModeSupportAndSystemConfigurationFull +ffffffff82148d30 t TruncToValidBPP +ffffffff82148f10 t CalculateVMAndRowBytes +ffffffff821495a0 t CalculatePrefetchSourceLines +ffffffff82149760 t CalculateWriteBackDelay +ffffffff82149a30 t CalculatePrefetchSchedule +ffffffff8214a8f0 t CalculateFlipSchedule +ffffffff8214aca0 t adjust_ReturnBW +ffffffff8214b000 T dml20v2_recalculate +ffffffff8214b740 t dml20v2_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation +ffffffff82150e50 T dml20v2_ModeSupportAndSystemConfigurationFull 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dml31_CalculateWriteBackDISPCLK +ffffffff8219e1e0 T dml31_ModeSupportAndSystemConfigurationFull +ffffffff821a64a0 t CalculateSwathAndDETConfiguration +ffffffff821a6aa0 t TruncToValidBPP +ffffffff821a6d20 t dscceComputeDelay +ffffffff821a6e60 t CalculateDCFCLKDeepSleep +ffffffff821a71a0 t CalculateVMAndRowBytes +ffffffff821a77f0 t CalculatePrefetchSourceLines +ffffffff821a79b0 t CalculateUrgentBurstFactor +ffffffff821a7c40 t CalculatePrefetchSchedulePerPlane +ffffffff821a8370 t CalculateFlipSchedule +ffffffff821a88f0 t CalculateWatermarksAndDRAMSpeedChangeSupport +ffffffff821a9550 t CalculateSwathWidth +ffffffff821a9a60 t CalculatePrefetchSchedule +ffffffff821aaef0 t CalculateVupdateAndDynamicMetadataParameters +ffffffff821ac000 T dml31_rq_dlg_get_rq_reg +ffffffff821ac4b0 t dml_rq_dlg_get_rq_params +ffffffff821ac720 T dml31_rq_dlg_get_dlg_reg +ffffffff821af1f0 t get_surf_rq_param +ffffffff821b0000 T dcn314_update_bw_bounding_box_fpu +ffffffff821b0480 T dcn314_populate_dml_pipes_from_context_fpu +ffffffff821b1000 T dml314_recalculate +ffffffff821b1280 t DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation +ffffffff821b7f60 T dml314_CalculateWriteBackDISPCLK +ffffffff821b80e0 T dml314_ModeSupportAndSystemConfigurationFull +ffffffff821c0280 t CalculateBytePerPixelAnd256BBlockSizes +ffffffff821c04f0 t CalculateSwathAndDETConfiguration +ffffffff821c0af0 t TruncToValidBPP +ffffffff821c0d70 t dscceComputeDelay +ffffffff821c0eb0 t CalculateDCFCLKDeepSleep +ffffffff821c11f0 t CalculateVMAndRowBytes +ffffffff821c1840 t CalculatePrefetchSourceLines +ffffffff821c1a00 t CalculateUrgentBurstFactor +ffffffff821c1c90 t CalculateMaxVStartup +ffffffff821c1dd0 t CalculatePrefetchSchedulePerPlane +ffffffff821c2500 t CalculateFlipSchedule +ffffffff821c2a80 t CalculateWatermarksAndDRAMSpeedChangeSupport +ffffffff821c36e0 t CalculateSwathWidth +ffffffff821c3bf0 t CalculatePrefetchSchedule +ffffffff821c5080 t CalculateVupdateAndDynamicMetadataParameters +ffffffff821c6000 T dml314_rq_dlg_get_rq_reg +ffffffff821c64b0 t dml_rq_dlg_get_rq_params +ffffffff821c6720 T dml314_rq_dlg_get_dlg_reg +ffffffff821c9270 t get_surf_rq_param +ffffffff821ca000 T dcn32_build_wm_range_table_fpu +ffffffff821ca390 T dcn32_find_dummy_latency_index_for_fw_based_mclk_switch +ffffffff821ca5c0 T dcn32_internal_validate_bw +ffffffff821cc2f0 T dcn32_helper_populate_phantom_dlg_params +ffffffff821cc490 T dcn32_predict_pipe_split +ffffffff821cc6c0 T insert_entry_into_table_sorted +ffffffff821ccaf0 T dcn32_set_phantom_stream_timing +ffffffff821ccd90 t dcn32_split_stream_for_mpc_or_odm +ffffffff821cd120 T dcn32_calculate_wm_and_dlg_fpu +ffffffff821ce640 T dcn32_patch_dpm_table +ffffffff821ce850 T dcn32_update_bw_bounding_box_fpu +ffffffff821d0250 T dcn32_zero_pipe_dcc_fraction +ffffffff821d02b0 T dcn32_allow_subvp_with_active_margin +ffffffff821d0380 t subvp_drr_schedulable +ffffffff821d1000 T dml32_recalculate +ffffffff821d5320 T dml32_ModeSupportAndSystemConfigurationFull +ffffffff821dd000 T dml32_dscceComputeDelay +ffffffff821dd140 T dml32_dscComputeDelay +ffffffff821dd180 T IsVertical +ffffffff821dd1b0 T dml32_CalculateSinglePipeDPPCLKAndSCLThroughput +ffffffff821dd4d0 T dml32_CalculateBytePerPixelAndBlockSizes +ffffffff821dd800 T dml32_CalculateSwathAndDETConfiguration +ffffffff821de020 T dml32_CalculateSwathWidth +ffffffff821de8c0 T dml32_UnboundedRequest +ffffffff821de930 T dml32_CalculateDETBufferSize +ffffffff821def70 T dml32_CalculateODMMode +ffffffff821df6d0 T dml32_CalculateRequiredDispclk +ffffffff821df890 T dml32_RoundToDFSGranularity +ffffffff821df920 T dml32_CalculateOutputLink +ffffffff821e0450 T dml32_TruncToValidBPP +ffffffff821e07a0 T dml32_CalculateDPPCLK +ffffffff821e0950 T dml32_RequiredDTBCLK +ffffffff821e0ba0 T dml32_DSCDelayRequirement +ffffffff821e1070 T dml32_CalculateSurfaceSizeInMall +ffffffff821e1b80 T dml32_CalculateVMRowAndSwath +ffffffff821e29b0 T dml32_CalculateVMAndRowBytes +ffffffff821e35f0 T dml32_CalculatePrefetchSourceLines +ffffffff821e3840 T dml32_CalculateMALLUseForStaticScreen +ffffffff821e3990 T dml32_CalculateRowBandwidth +ffffffff821e3af0 T dml32_CalculateUrgentLatency +ffffffff821e3b90 T dml32_CalculateUrgentBurstFactor +ffffffff821e3e40 T dml32_CalculateDCFCLKDeepSleep +ffffffff821e4190 T dml32_CalculateWriteBackDelay +ffffffff821e42f0 T dml32_UseMinimumDCFCLK +ffffffff821e51b0 T dml32_CalculateExtraLatencyBytes +ffffffff821e5380 T dml32_CalculateTWait +ffffffff821e5460 T dml32_CalculateVUpdateAndDynamicMetadataParameters +ffffffff821e56c0 T dml32_get_return_bw_mbps +ffffffff821e5880 T dml32_get_return_bw_mbps_vm_only +ffffffff821e5960 T dml32_CalculateExtraLatency +ffffffff821e5b90 T dml32_CalculatePrefetchSchedule +ffffffff821e7140 T dml32_CalculateFlipSchedule +ffffffff821e76c0 T dml32_CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport +ffffffff821e8820 T dml32_CalculateWriteBackDISPCLK +ffffffff821e89e0 T dml32_CalculateMinAndMaxPrefetchMode +ffffffff821e8a20 T dml32_CalculatePixelDeliveryTimes +ffffffff821e8e90 T dml32_CalculateMetaAndPTETimes +ffffffff821e95d0 T dml32_CalculateVMGroupAndRequestTimes +ffffffff821e9ac0 T dml32_CalculateDCCConfiguration +ffffffff821ea0e0 T dml32_CalculateStutterEfficiency +ffffffff821eb030 T dml32_CalculateMaxDETAndMinCompressedBufferSize +ffffffff821eb120 T dml32_CalculateVActiveBandwithSupport +ffffffff821eb2b0 T dml32_CalculatePrefetchBandwithSupport +ffffffff821eb550 T dml32_CalculateBandwidthAvailableForImmediateFlip +ffffffff821eb6a0 T dml32_CalculateImmediateFlipBandwithSupport +ffffffff821eb8f0 T dml32_CalculateDETSwathFillLatencyHiding +ffffffff821ec000 T dml32_rq_dlg_get_rq_reg +ffffffff821ec6a0 T dml32_rq_dlg_get_dlg_reg +ffffffff821ef000 T dcn321_insert_entry_into_table_sorted +ffffffff821ef430 T dcn321_update_bw_bounding_box_fpu +ffffffff821f1000 T dml_init_instance +ffffffff821f1310 T dml_get_status_message +ffffffff821f1350 T dml_log_pipe_params +ffffffff821f1380 T dml_log_mode_support_params +ffffffff821f2000 T dml_get_voltage_level +ffffffff821f21f0 t fetch_socbb_params +ffffffff821f2700 t fetch_ip_params +ffffffff821f2ba0 t fetch_pipe_params +ffffffff821f3ca0 T PixelClockAdjustmentForProgressiveToInterlaceUnit +ffffffff821f3d20 T get_clk_dcf_deepsleep +ffffffff821f3e30 T get_wm_urgent +ffffffff821f3f40 T get_wm_memory_trip +ffffffff821f4050 T get_wm_writeback_urgent +ffffffff821f4160 T get_wm_stutter_exit +ffffffff821f4270 T get_wm_stutter_enter_exit +ffffffff821f4380 T get_wm_z8_stutter_exit +ffffffff821f4490 T get_wm_z8_stutter_enter_exit +ffffffff821f45a0 T get_stutter_efficiency_z8 +ffffffff821f46b0 T get_stutter_num_bursts_z8 +ffffffff821f47c0 T get_wm_dram_clock_change +ffffffff821f48d0 T get_wm_writeback_dram_clock_change +ffffffff821f49e0 T get_stutter_efficiency +ffffffff821f4af0 T get_stutter_efficiency_no_vblank +ffffffff821f4c00 T get_stutter_period +ffffffff821f4d10 T get_urgent_latency +ffffffff821f4e20 T get_urgent_extra_latency +ffffffff821f4f30 T get_nonurgent_latency +ffffffff821f5040 T get_dram_clock_change_latency +ffffffff821f5150 T get_dispclk_calculated +ffffffff821f5260 T get_total_data_read_bw +ffffffff821f5370 T get_return_bw +ffffffff821f5480 T get_tcalc +ffffffff821f5590 T get_fraction_of_urgent_bandwidth +ffffffff821f56a0 T get_fraction_of_urgent_bandwidth_imm_flip +ffffffff821f57b0 T get_cstate_max_cap_mode +ffffffff821f58d0 T get_comp_buffer_size_kbytes +ffffffff821f59e0 T get_pixel_chunk_size_in_kbyte +ffffffff821f5b00 T get_alpha_pixel_chunk_size_in_kbyte +ffffffff821f5c20 T get_meta_chunk_size_in_kbyte +ffffffff821f5d40 T get_min_pixel_chunk_size_in_byte +ffffffff821f5e50 T get_min_meta_chunk_size_in_byte +ffffffff821f5f70 T get_fclk_watermark +ffffffff821f6080 T get_usr_retraining_watermark +ffffffff821f6190 T get_comp_buffer_reserved_space_kbytes +ffffffff821f62b0 T get_comp_buffer_reserved_space_64bytes +ffffffff821f63d0 T get_comp_buffer_reserved_space_zs +ffffffff821f64f0 T get_unbounded_request_enabled +ffffffff821f6610 T get_dsc_delay +ffffffff821f6740 T get_dppclk_calculated +ffffffff821f6860 T get_dscclk_calculated +ffffffff821f6980 T get_min_ttu_vblank +ffffffff821f6aa0 T get_min_ttu_vblank_in_us +ffffffff821f6bc0 T get_vratio_prefetch_l +ffffffff821f6ce0 T get_vratio_prefetch_c +ffffffff821f6e00 T get_dst_x_after_scaler +ffffffff821f6f20 T get_dst_y_after_scaler +ffffffff821f7040 T get_dst_y_per_vm_vblank +ffffffff821f7160 T get_dst_y_per_row_vblank +ffffffff821f7280 T get_dst_y_prefetch +ffffffff821f73a0 T get_dst_y_per_vm_flip +ffffffff821f74c0 T get_dst_y_per_row_flip +ffffffff821f75e0 T get_refcyc_per_vm_group_vblank +ffffffff821f7700 T get_refcyc_per_vm_group_flip +ffffffff821f7820 T get_refcyc_per_vm_req_vblank +ffffffff821f7940 T get_refcyc_per_vm_req_flip +ffffffff821f7a60 T get_refcyc_per_vm_group_vblank_in_us +ffffffff821f7b80 T get_refcyc_per_vm_group_flip_in_us +ffffffff821f7ca0 T get_refcyc_per_vm_req_vblank_in_us +ffffffff821f7dc0 T get_refcyc_per_vm_req_flip_in_us +ffffffff821f7ee0 T get_refcyc_per_vm_dmdata_in_us +ffffffff821f8000 T get_dmdata_dl_delta_in_us +ffffffff821f8120 T get_refcyc_per_line_delivery_l_in_us +ffffffff821f8240 T get_refcyc_per_line_delivery_c_in_us +ffffffff821f8360 T get_refcyc_per_line_delivery_pre_l_in_us +ffffffff821f8480 T get_refcyc_per_line_delivery_pre_c_in_us +ffffffff821f85a0 T get_refcyc_per_req_delivery_l_in_us +ffffffff821f86c0 T get_refcyc_per_req_delivery_c_in_us +ffffffff821f87e0 T get_refcyc_per_req_delivery_pre_l_in_us +ffffffff821f8900 T get_refcyc_per_req_delivery_pre_c_in_us +ffffffff821f8a20 T get_refcyc_per_cursor_req_delivery_in_us +ffffffff821f8b40 T get_refcyc_per_cursor_req_delivery_pre_in_us +ffffffff821f8c60 T get_refcyc_per_meta_chunk_nom_l_in_us +ffffffff821f8d80 T get_refcyc_per_meta_chunk_nom_c_in_us +ffffffff821f8ea0 T get_refcyc_per_meta_chunk_vblank_l_in_us +ffffffff821f8fc0 T get_refcyc_per_meta_chunk_vblank_c_in_us +ffffffff821f90e0 T get_refcyc_per_meta_chunk_flip_l_in_us +ffffffff821f9200 T get_refcyc_per_meta_chunk_flip_c_in_us +ffffffff821f9320 T get_vstartup +ffffffff821f9450 T get_vupdate_offset +ffffffff821f9580 T get_vupdate_width +ffffffff821f96a0 T get_vready_offset +ffffffff821f97c0 T get_vready_at_or_after_vsync +ffffffff821f98f0 T get_min_dst_y_next_start +ffffffff821f9a20 T get_dst_y_per_pte_row_nom_l +ffffffff821f9b40 T get_dst_y_per_pte_row_nom_c +ffffffff821f9c60 T get_dst_y_per_meta_row_nom_l +ffffffff821f9d80 T get_dst_y_per_meta_row_nom_c +ffffffff821f9ea0 T get_refcyc_per_pte_group_nom_l_in_us +ffffffff821f9fc0 T get_refcyc_per_pte_group_nom_c_in_us +ffffffff821fa0e0 T get_refcyc_per_pte_group_vblank_l_in_us +ffffffff821fa200 T get_refcyc_per_pte_group_vblank_c_in_us +ffffffff821fa320 T get_refcyc_per_pte_group_flip_l_in_us +ffffffff821fa440 T get_refcyc_per_pte_group_flip_c_in_us +ffffffff821fa560 T get_vstartup_calculated +ffffffff821fa690 T get_dpte_row_height_linear_c +ffffffff821fa7c0 T get_swath_height_l +ffffffff821fa8f0 T get_swath_height_c +ffffffff821faa20 T get_det_stored_buffer_size_l_bytes +ffffffff821fab50 T get_det_stored_buffer_size_c_bytes +ffffffff821fac80 T get_dpte_group_size_in_bytes +ffffffff821fadb0 T get_vm_group_size_in_bytes +ffffffff821faee0 T get_dpte_row_height_linear_l +ffffffff821fb010 T get_pte_buffer_mode +ffffffff821fb140 T get_subviewport_lines_needed_in_mall +ffffffff821fb270 T get_total_immediate_flip_bytes +ffffffff821fb390 T get_total_immediate_flip_bw +ffffffff821fb570 T get_total_prefetch_bw +ffffffff821fb750 T get_total_surface_size_in_mall_bytes +ffffffff821fb900 T get_det_buffer_size_kbytes +ffffffff821fba30 T get_is_phantom_pipe +ffffffff821fbb60 T Calculate256BBlockSizes +ffffffff821fbc50 T CalculateMinAndMaxPrefetchMode +ffffffff821fbcd0 T ModeSupportAndSystemConfiguration +ffffffff821fbff0 T CalculateWriteBackDISPCLK +ffffffff821fd000 T print__rq_params_st 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dc_dsc_stream_bandwidth_overhead_in_kbps +ffffffff82205580 T dc_dsc_get_policy_for_timing +ffffffff82205620 T dc_dsc_policy_set_max_target_bpp_limit +ffffffff82205650 T dc_dsc_policy_set_enable_dsc_when_not_needed +ffffffff82205680 T dc_dsc_policy_set_disable_dsc_stream_overhead +ffffffff82206000 T calc_rc_params +ffffffff82207000 T dscc_compute_dsc_parameters +ffffffff82208000 T dal_hw_factory_dce110_init ffffffff82208060 t define_hpd_registers ffffffff822080b0 t define_ddc_registers -ffffffff82209000 T dal_hw_translate_dce80_init +ffffffff82209000 T dal_hw_translate_dce110_init ffffffff82209030 t offset_to_id -ffffffff822097b0 t id_to_offset -ffffffff8220a000 T dal_hw_factory_dcn10_init +ffffffff82209390 t id_to_offset +ffffffff8220a000 T dal_hw_factory_dce120_init ffffffff8220a060 t define_hpd_registers ffffffff8220a0b0 t define_ddc_registers -ffffffff8220a150 t define_generic_registers -ffffffff8220b000 T dal_hw_translate_dcn10_init +ffffffff8220b000 T dal_hw_translate_dce120_init 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dal_hw_translate_dcn32_init +ffffffff82215000 T dal_hw_translate_dcn30_init ffffffff82215030 t offset_to_id -ffffffff82215290 t id_to_offset -ffffffff82216000 T dal_gpio_open -ffffffff822160c0 T dal_gpio_open_ex -ffffffff82216180 T dal_gpio_get_value -ffffffff82216200 T dal_gpio_set_value -ffffffff82216280 T dal_gpio_get_mode -ffffffff822162b0 T dal_gpio_lock_pin -ffffffff822162d0 T dal_gpio_unlock_pin -ffffffff822162f0 T dal_gpio_change_mode -ffffffff82216370 T dal_gpio_get_id -ffffffff822163a0 T dal_gpio_get_enum -ffffffff822163d0 T dal_gpio_set_config -ffffffff82216450 T dal_gpio_get_pin_info -ffffffff822164b0 T dal_gpio_get_sync_source -ffffffff82216540 T dal_gpio_get_output_state -ffffffff82216570 T dal_gpio_get_ddc -ffffffff822165a0 T dal_gpio_get_hpd -ffffffff822165d0 T dal_gpio_get_generic -ffffffff82216600 T dal_gpio_close -ffffffff82216650 T dal_gpio_create -ffffffff822167e0 T dal_gpio_destroy -ffffffff82217000 T dal_gpio_service_create -ffffffff82217260 T dal_gpio_service_create_irq -ffffffff82217320 T dal_gpio_create_irq -ffffffff822173a0 T dal_gpio_service_create_generic_mux -ffffffff82217440 T dal_gpio_destroy_generic_mux -ffffffff822174d0 T dal_gpio_get_generic_pin_info -ffffffff82217530 T dal_gpio_service_destroy -ffffffff82217660 T dal_mux_setup_config -ffffffff822176c0 T dal_gpio_service_lock -ffffffff82217740 T dal_gpio_service_unlock -ffffffff822177c0 T dal_gpio_service_open -ffffffff82217a00 T dal_gpio_service_close -ffffffff82217aa0 T dal_irq_get_source -ffffffff82217b10 T dal_irq_get_rx_source -ffffffff82217b60 T dal_irq_setup_hpd_filter -ffffffff82217bc0 T dal_gpio_destroy_irq -ffffffff82217c50 T dal_gpio_create_ddc -ffffffff82217dc0 T dal_gpio_destroy_ddc -ffffffff82217e90 T dal_ddc_close -ffffffff82217ee0 T dal_ddc_open -ffffffff82218040 T dal_ddc_change_mode -ffffffff822180e0 T dal_ddc_get_line -ffffffff82218100 T dal_ddc_set_config -ffffffff82219000 T dal_hw_ddc_init -ffffffff82219100 T dal_hw_ddc_get_pin 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dal_hw_factory_dcn32_init +ffffffff82218060 t define_hpd_registers +ffffffff822180b0 t define_ddc_registers +ffffffff82218160 t define_generic_registers +ffffffff82219000 T dal_hw_translate_dcn32_init +ffffffff82219030 t offset_to_id +ffffffff82219290 t id_to_offset +ffffffff8221a000 T dal_gpio_open +ffffffff8221a0c0 T dal_gpio_open_ex +ffffffff8221a180 T dal_gpio_get_value +ffffffff8221a200 T dal_gpio_set_value +ffffffff8221a280 T dal_gpio_get_mode +ffffffff8221a2b0 T dal_gpio_lock_pin +ffffffff8221a2d0 T dal_gpio_unlock_pin +ffffffff8221a2f0 T dal_gpio_change_mode +ffffffff8221a370 T dal_gpio_get_id +ffffffff8221a3a0 T dal_gpio_get_enum +ffffffff8221a3d0 T dal_gpio_set_config +ffffffff8221a450 T dal_gpio_get_pin_info +ffffffff8221a4b0 T dal_gpio_get_sync_source +ffffffff8221a540 T dal_gpio_get_output_state +ffffffff8221a570 T dal_gpio_get_ddc +ffffffff8221a5a0 T dal_gpio_get_hpd +ffffffff8221a5d0 T dal_gpio_get_generic +ffffffff8221a600 T dal_gpio_close +ffffffff8221a650 T dal_gpio_create +ffffffff8221a7e0 T dal_gpio_destroy +ffffffff8221b000 T dal_gpio_service_create +ffffffff8221b260 T dal_gpio_service_create_irq +ffffffff8221b320 T dal_gpio_create_irq +ffffffff8221b3a0 T dal_gpio_service_create_generic_mux +ffffffff8221b440 T dal_gpio_destroy_generic_mux +ffffffff8221b4d0 T dal_gpio_get_generic_pin_info +ffffffff8221b530 T dal_gpio_service_destroy +ffffffff8221b660 T dal_mux_setup_config +ffffffff8221b6c0 T dal_gpio_service_lock +ffffffff8221b740 T dal_gpio_service_unlock +ffffffff8221b7c0 T dal_gpio_service_open +ffffffff8221ba00 T dal_gpio_service_close +ffffffff8221baa0 T dal_irq_get_source +ffffffff8221bb10 T dal_irq_get_rx_source +ffffffff8221bb60 T dal_irq_setup_hpd_filter +ffffffff8221bbc0 T dal_gpio_destroy_irq +ffffffff8221bc50 T dal_gpio_create_ddc +ffffffff8221bdc0 T dal_gpio_destroy_ddc +ffffffff8221be90 T dal_ddc_close +ffffffff8221bee0 T dal_ddc_open +ffffffff8221c040 T dal_ddc_change_mode +ffffffff8221c0e0 T dal_ddc_get_line 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hdmi_14_process_transaction +ffffffff822232e0 t dp_11_process_transaction +ffffffff82224000 T dal_irq_service_dummy_set +ffffffff82224050 T dal_irq_service_dummy_ack +ffffffff822240a0 T dce110_vblank_set +ffffffff82224170 T to_dal_irq_source_dce110 +ffffffff822242f0 T dal_irq_service_dce110_create +ffffffff82224370 t hpd_ack +ffffffff82225000 T dal_irq_service_dce120_create ffffffff82225080 t hpd_ack -ffffffff82225130 t to_dal_irq_source_dcn201 -ffffffff82226000 T dal_irq_service_dcn21_create +ffffffff82226000 T dal_irq_service_dce80_create ffffffff82226080 t hpd_ack -ffffffff82226130 t to_dal_irq_source_dcn21 -ffffffff82227000 T dal_irq_service_dcn30_create +ffffffff82227000 T dal_irq_service_dcn10_create ffffffff82227080 t hpd_ack -ffffffff82227130 t to_dal_irq_source_dcn30 -ffffffff82228000 T dal_irq_service_dcn302_create +ffffffff82227130 t to_dal_irq_source_dcn10 +ffffffff82228000 T dal_irq_service_dcn20_create ffffffff82228080 t hpd_ack -ffffffff82228130 t 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suspend_finish -ffffffff82522000 T acpipci_match -ffffffff82522030 T acpipci_attach -ffffffff825222f0 T acpipci_osc -ffffffff82522430 T acpipci_parse_resources -ffffffff82522540 T acpipci_attach_bus -ffffffff82522710 T acpipci_print -ffffffff82522780 T acpipci_attach_busses -ffffffff82523000 T efiopen -ffffffff82523040 T eficlose -ffffffff82523070 T efiioctl -ffffffff82523110 T efiioc_get_table -ffffffff82523270 T efiioc_var_get -ffffffff825234f0 T efiioc_var_next -ffffffff82523710 T efiioc_var_set -ffffffff825239c0 T efi_adapt_error -ffffffff82524000 T efi_match -ffffffff82524060 T efi_attach -ffffffff82524420 T efi_map_runtime -ffffffff825245a0 T efi_enter -ffffffff82524630 T efi_leave -ffffffff82524690 T efi_gettime -ffffffff82524860 T efi_settime -ffffffff825249c0 T efi_fault -ffffffff82525000 T vmm_probe -ffffffff82525050 T vmm_attach -ffffffff825253e0 T vmm_activate -ffffffff82525600 T vmm_enabled -ffffffff82525690 T vmm_quiesce_vmx -ffffffff82525860 T vmm_stop -ffffffff825259b0 T vmm_start -ffffffff82525aa0 T vmmopen -ffffffff82525af0 T vmmioctl -ffffffff82525f00 T vm_create -ffffffff82526330 T vm_run -ffffffff82526520 T vm_get_info -ffffffff82526770 T vm_terminate -ffffffff825268e0 T vm_resetcpu -ffffffff82526a40 T vm_intr_pending -ffffffff82526b10 T vm_rwregs -ffffffff82526c60 T vm_mprotect_ept -ffffffff82526f10 T vm_rwvmparams -ffffffff825270d0 T pledge_ioctl_vmm -ffffffff825271b0 T vmmclose -ffffffff825271e0 T vm_find -ffffffff82527300 T vcpu_reset_regs -ffffffff82527350 T vmm_init_pvclock -ffffffff82527430 T vcpu_readregs_vmx -ffffffff82527860 T vcpu_writeregs_vmx -ffffffff82527cd0 T vcpu_readregs_svm -ffffffff82528180 T vcpu_writeregs_svm -ffffffff82528650 T vmm_get_guest_memtype -ffffffff825286d0 T vmx_mprotect_ept -ffffffff82528950 T vmx_pmap_find_pte_ept -ffffffff82528a20 T start_vmm_on_cpu -ffffffff82528b00 T stop_vmm_on_cpu -ffffffff82528ba0 T vmclear_on_cpu -ffffffff82528c20 T vm_create_check_mem_ranges -ffffffff82528d80 T vm_impl_init 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-ffffffff8252bf20 T vcpu_run_svm -ffffffff8252c510 T vcpu_must_stop -ffffffff8252c580 T vmm_fpurestore -ffffffff8252c650 T vmm_fpusave -ffffffff8252c6d0 T vmm_translate_gva -ffffffff8252ca00 T vmm_update_pvclock -ffffffff8252cb00 T vmx_get_exit_info -ffffffff8252cb60 T vmx_handle_exit -ffffffff8252cf50 T vmx_instruction_error_decode -ffffffff8252d120 T vmm_get_guest_cpu_cpl -ffffffff8252d1d0 T vmx_handle_intr -ffffffff8252d260 T svm_handle_hlt -ffffffff8252d2b0 T vmx_handle_hlt -ffffffff8252d360 T svm_handle_exit -ffffffff8252d640 T svm_handle_np_fault -ffffffff8252d7f0 T vmm_handle_cpuid -ffffffff8252de70 T svm_handle_msr -ffffffff8252e130 T svm_handle_xsetbv -ffffffff8252e180 T svm_handle_inout -ffffffff8252e2a0 T vmm_inject_ud -ffffffff8252e2d0 T vmm_inject_db -ffffffff8252e300 T vmx_handle_np_fault -ffffffff8252e480 T vmx_handle_inout -ffffffff8252e620 T vmx_handle_cr -ffffffff8252e890 T vmx_handle_rdmsr -ffffffff8252e960 T vmx_handle_wrmsr -ffffffff8252ebc0 T vmx_handle_xsetbv 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vmx_enter_guest -ffffffff825311fb t skip_init -ffffffff825312c8 t no_l1df_msr -ffffffff825312cb t l1df_tlb_loop -ffffffff825312e4 t l1df_tlb_done -ffffffff825312ec t l1df_load_cache -ffffffff82531303 t done_flush -ffffffff82531396 t do_resume -ffffffff8253141b t fail_launch_or_resume -ffffffff8253145d t fail_launch_unknown -ffffffff8253146a t fail_launch_invalid_vmcs -ffffffff82531477 t fail_launch_valid_vmcs -ffffffff82531494 t vmx_exit_handler_asm -ffffffff82531559 t restore_host -ffffffff825315f0 T svm_enter_guest -ffffffff82531780 t restore_host_svm -ffffffff82532000 T sdmmc_match -ffffffff82532050 T sdmmc_attach -ffffffff82532390 T sdmmc_detach -ffffffff82532440 T sdmmc_activate -ffffffff82532510 T sdmmc_discover_task -ffffffff825325d0 T sdmmc_create_thread -ffffffff82532640 T sdmmc_holds_root_device -ffffffff825326a0 T sdmmc_task_thread -ffffffff82532890 T sdmmc_needs_discover -ffffffff82532940 T sdmmc_del_task -ffffffff825329f0 T sdmmc_card_detach -ffffffff82532ad0 T sdmmc_add_task -ffffffff82532b50 T sdmmc_card_attach -ffffffff82532c60 T sdmmc_enable -ffffffff82532db0 T sdmmc_scan -ffffffff82532e40 T sdmmc_init -ffffffff82532f40 T sdmmc_disable -ffffffff825330a0 T sdmmc_function_free -ffffffff825330c0 T sdmmc_delay -ffffffff82533110 T sdmmc_select_card -ffffffff82533290 T sdmmc_set_bus_power -ffffffff82533450 T sdmmc_function_alloc -ffffffff825334e0 T sdmmc_app_command -ffffffff82533670 T sdmmc_mmc_command -ffffffff825336f0 T sdmmc_go_idle_state -ffffffff82533810 T sdmmc_send_if_cond -ffffffff82533960 T sdmmc_set_relative_addr -ffffffff82534000 T sdmmc_cisptr -ffffffff825340a0 T sdmmc_read_cis -ffffffff825343b0 T sdmmc_print_cis -ffffffff82534520 T sdmmc_check_cis_quirks -ffffffff82535000 T sdmmc_io_enable -ffffffff825352a0 T sdmmc_io_reset -ffffffff825353d0 T sdmmc_io_send_op_cond -ffffffff82535540 T sdmmc_io_scan -ffffffff82535690 T sdmmc_io_init -ffffffff825357c0 T sdmmc_io_set_highspeed -ffffffff82535a70 T sdmmc_io_set_bus_width -ffffffff82535d00 T sdmmc_io_function_ready -ffffffff82535e80 T sdmmc_io_read_1 -ffffffff82535fd0 T sdmmc_io_function_enable -ffffffff825363a0 T sdmmc_io_write_1 -ffffffff82536520 T sdmmc_io_function_disable -ffffffff825367a0 T sdmmc_io_attach -ffffffff82536890 T sdmmc_print -ffffffff82536ae0 T sdmmc_submatch -ffffffff82536b60 T sdmmc_io_detach -ffffffff82536c10 T sdmmc_io_rw_direct -ffffffff82536db0 T sdmmc_io_rw_extended_subr -ffffffff82536f50 T sdmmc_io_rw_extended -ffffffff82537340 T sdmmc_io_read_2 -ffffffff825374a0 T sdmmc_io_write_2 -ffffffff82537600 T sdmmc_io_read_4 -ffffffff82537760 T sdmmc_io_write_4 -ffffffff825378c0 T sdmmc_io_read_multi_1 -ffffffff825379b0 T sdmmc_io_write_multi_1 -ffffffff82537aa0 T sdmmc_io_read_region_1 -ffffffff82537b90 T sdmmc_io_write_region_1 -ffffffff82537c80 T sdmmc_io_xchg -ffffffff82537e10 T sdmmc_intr_enable -ffffffff82538080 T sdmmc_intr_disable -ffffffff825382f0 T sdmmc_intr_establish -ffffffff825383f0 T sdmmc_intr_disestablish -ffffffff825384e0 T sdmmc_card_intr -ffffffff82538530 T sdmmc_intr_task -ffffffff825385c0 T sdmmc_io_set_blocklen -ffffffff82539000 T sdmmc_mem_enable -ffffffff825394e0 T sdmmc_mem_send_op_cond -ffffffff82539690 T sdmmc_mem_signal_voltage -ffffffff82539750 T sdmmc_mem_scan -ffffffff82539a60 T sdmmc_decode_csd -ffffffff82539e70 T sdmmc_decode_cid -ffffffff8253a2b0 T sdmmc_mem_send_scr -ffffffff8253a3f0 T sdmmc_mem_decode_scr -ffffffff8253a470 T sdmmc_mem_send_cxd_data -ffffffff8253a5e0 T sdmmc_mem_set_bus_width -ffffffff8253a700 T sdmmc_mem_sd_switch -ffffffff8253a9b0 T sdmmc_be512_to_bitfield512 -ffffffff8253aa60 T sdmmc_mem_mmc_switch -ffffffff8253ab50 T sdmmc_mem_init -ffffffff8253aca0 T sdmmc_mem_set_blocklen -ffffffff8253ada0 T sdmmc_mem_sd_init -ffffffff8253b350 T sdmmc_mem_mmc_init -ffffffff8253bc70 T sdmmc_mem_select_transfer_mode -ffffffff8253bcf0 T sdmmc_mem_execute_tuning -ffffffff8253bd80 T sdmmc_mem_read_block_subr -ffffffff8253c0e0 T sdmmc_mem_single_read_block -ffffffff8253c1b0 T sdmmc_mem_read_block -ffffffff8253c370 T sdmmc_mem_write_block_subr -ffffffff8253c6c0 T sdmmc_mem_single_write_block -ffffffff8253c790 T sdmmc_mem_write_block -ffffffff8253c950 T sdmmc_mem_hibernate_write -ffffffff8253d000 T sdmmc_scsi_cmd -ffffffff8253d1f0 T sdmmc_minphys -ffffffff8253d270 T sdmmc_scsi_attach -ffffffff8253d460 T sdmmc_alloc_ccbs -ffffffff8253d5a0 T sdmmc_free_ccbs -ffffffff8253d600 T sdmmc_scsi_detach -ffffffff8253d760 T sdmmc_stimeout -ffffffff8253d7e0 T sdmmc_ccb_alloc -ffffffff8253d890 T sdmmc_ccb_free -ffffffff8253d970 T sdmmc_inquiry -ffffffff8253dbe0 T sdmmc_start_xs -ffffffff8253dcd0 T sdmmc_complete_xs -ffffffff8253dda0 T sdmmc_done_xs -ffffffff8253ddf0 T sdmmc_scsi_hibernate_io -ffffffff8253e000 T bwfm_sdio_preinit -ffffffff8253e4f0 T bwfm_sdio_txcheck -ffffffff8253e530 T bwfm_sdio_txdata -ffffffff8253e5a0 T bwfm_sdio_txctl -ffffffff8253e6f0 T bwfm_sdio_buscore_read -ffffffff8253e700 T bwfm_sdio_buscore_write -ffffffff8253e720 T bwfm_sdio_buscore_prepare -ffffffff8253e860 T bwfm_sdio_buscore_activate -ffffffff8253e8e0 T bwfm_sdio_match -ffffffff8253e9b0 T bwfm_sdio_attach -ffffffff8253ec70 T bwfm_sdio_detach -ffffffff8253ecd0 T bwfm_sdio_task -ffffffff8253ee30 T bwfm_sdio_write_1 -ffffffff8253ee60 T bwfm_sdio_read_1 -ffffffff8253ee90 T bwfm_sdio_write_4 -ffffffff8253ef40 T bwfm_sdio_read_4 -ffffffff8253eff0 T bwfm_sdio_load_microcode -ffffffff8253f250 T bwfm_sdio_clkctl -ffffffff8253f380 T bwfm_sdio_dev_write -ffffffff8253f3d0 T bwfm_sdio_intr -ffffffff8253f410 T bwfm_sdio_ram_read_write -ffffffff8253f640 T bwfm_sdio_htclk -ffffffff8253f8a0 T bwfm_sdio_readshared -ffffffff8253f970 T bwfm_sdio_dev_read -ffffffff8253f9b0 T bwfm_sdio_rx_frames -ffffffff8253fd40 T bwfm_sdio_tx_frames -ffffffff8253fe20 T bwfm_sdio_backplane -ffffffff8253fed0 T bwfm_sdio_buf_read -ffffffff8253ffb0 T bwfm_sdio_buf_write -ffffffff82540060 T bwfm_sdio_frame_read_write -ffffffff825401e0 T bwfm_sdio_newbuf -ffffffff82540260 T bwfm_sdio_tx_ok -ffffffff825402b0 T bwfm_sdio_tx_ctrlframe -ffffffff825403b0 T bwfm_sdio_tx_dataframe -ffffffff82540500 T bwfm_sdio_rx_glom -ffffffff82541000 T onewire_match -ffffffff82541050 T onewire_attach -ffffffff825410f0 T onewire_detach -ffffffff82541160 T onewire_activate -ffffffff82541180 T onewire_scan -ffffffff82541390 T onewire_createthread -ffffffff82541400 T onewire_print -ffffffff825414d0 T onewirebus_print -ffffffff82541520 T onewire_lock -ffffffff82541540 T onewire_unlock -ffffffff82541560 T onewire_reset -ffffffff82541580 T onewire_bit -ffffffff825415a0 T onewire_read_byte -ffffffff825416e0 T onewire_write_byte -ffffffff825417c0 T onewire_read_block -ffffffff82541860 T onewire_write_block -ffffffff82541900 T onewire_triplet -ffffffff825419e0 T onewire_matchrom -ffffffff82541b30 T onewire_search -ffffffff82541ec0 T onewire_thread -ffffffff82542000 T onewire_crc -ffffffff825420e0 T onewire_crc16 -ffffffff825421c0 T onewire_famname -ffffffff82542200 T onewire_matchbyfam -ffffffff82543000 T owid_match -ffffffff82543030 T owid_attach -ffffffff82543100 T owid_detach -ffffffff82543140 T owid_activate -ffffffff82544000 T owsbm_match -ffffffff82544030 T owsbm_attach -ffffffff825441d0 T owsbm_detach -ffffffff82544240 T owsbm_activate -ffffffff82544270 T owsbm_update -ffffffff82545000 T owtemp_match -ffffffff82545030 T owtemp_attach -ffffffff82545130 T owtemp_detach -ffffffff825451a0 T owtemp_activate -ffffffff825451d0 T owtemp_update -ffffffff82546000 T owctr_match -ffffffff82546030 T owctr_attach -ffffffff82546180 T owctr_detach -ffffffff825461f0 T owctr_activate -ffffffff82546220 T owctr_update -ffffffff82546250 T owctr_update_counter -ffffffff82547000 A __text_page_start -ffffffff82547000 T Xsyscall_meltdown -ffffffff8254700c T Xsyscall -ffffffff8254726e t Xsyscall_trampback -ffffffff82547280 T intr_user_exit -ffffffff825472c2 t intr_user_exit_post_ast -ffffffff825473ee t Xiretq_trampback -ffffffff825473fa T doreti_iret -ffffffff82548000 T alltraps -ffffffff82548138 T recall_trap -ffffffff82548150 T alltraps_kern -ffffffff82548153 T alltraps_kern_meltdown -ffffffff82549000 ? Xsyscall32 -ffffffff82549000 A __kutext_start -ffffffff82549000 A __text_page_end -ffffffff8254a000 ? Xtrap00 -ffffffff8254a010 ? Xtrap01 -ffffffff8254a020 ? Xtrap02 -ffffffff8254a028 c calltrap_specstk -ffffffff8254a0f0 ? calltrap_specstk_tramp -ffffffff8254a110 ? Xtrap03 -ffffffff8254a120 ? Xtrap04 -ffffffff8254a130 ? Xtrap05 -ffffffff8254a140 ? Xtrap06 -ffffffff8254a150 ? Xtrap07 -ffffffff8254a160 ? Xtrap08 -ffffffff8254a170 ? Xtrap09 -ffffffff8254a180 ? Xtrap0a -ffffffff8254a190 ? Xtrap0b -ffffffff8254a1a0 ? Xtrap0c -ffffffff8254a1b0 ? Xtrap0d -ffffffff8254a240 ? Xtrap0e -ffffffff8254a250 ? Xintrspurious -ffffffff8254a250 ? Xtrap0f -ffffffff8254a260 ? Xtrap10 -ffffffff8254a270 ? Xtrap11 -ffffffff8254a280 ? Xtrap12 -ffffffff8254a290 ? Xtrap13 -ffffffff8254a2a0 ? Xtrap14 -ffffffff8254a2b0 ? Xtrap15 -ffffffff8254a2c0 ? Xtrap16 -ffffffff8254a2c0 ? Xtrap17 -ffffffff8254a2c0 ? Xtrap18 -ffffffff8254a2c0 ? Xtrap19 -ffffffff8254a2c0 ? Xtrap1a -ffffffff8254a2c0 ? Xtrap1b -ffffffff8254a2c0 ? Xtrap1c -ffffffff8254a2c0 ? Xtrap1d -ffffffff8254a2c0 ? Xtrap1e -ffffffff8254a2c0 ? Xtrap1f -ffffffff8254a2d0 ? x2apic_eoi -ffffffff8254a2f0 ? Xintr_lapic_ipi -ffffffff8254a330 ? Xipi_invltlb -ffffffff8254a360 ? Xipi_invlpg -ffffffff8254a390 ? Xipi_invlrange -ffffffff8254a3d0 ? Xipi_invltlb_pcid -ffffffff8254a410 ? Xipi_invlpg_pcid -ffffffff8254a460 ? Xipi_invlrange_pcid -ffffffff8254a4d0 ? Xintr_lapic_ltimer -ffffffff8254a510 ? Xintr_xen_upcall -ffffffff8254a550 ? Xintr_hyperv_upcall -ffffffff8254a590 ? Xintr_legacy0 -ffffffff8254a5d0 ? Xintr_legacy1 -ffffffff8254a610 ? Xintr_legacy2 -ffffffff8254a650 ? Xintr_legacy3 -ffffffff8254a690 ? Xintr_legacy4 -ffffffff8254a6d0 ? Xintr_legacy5 -ffffffff8254a710 ? Xintr_legacy6 -ffffffff8254a750 ? Xintr_legacy7 -ffffffff8254a790 ? Xintr_legacy8 -ffffffff8254a7d0 ? Xintr_legacy9 -ffffffff8254a810 ? Xintr_legacy10 -ffffffff8254a850 ? Xintr_legacy11 -ffffffff8254a890 ? Xintr_legacy12 -ffffffff8254a8d0 ? Xintr_legacy13 -ffffffff8254a910 ? Xintr_legacy14 -ffffffff8254a950 ? Xintr_legacy15 -ffffffff8254a990 ? Xintr_ioapic_edge0 -ffffffff8254a9d0 ? Xintr_ioapic_edge1 -ffffffff8254aa10 ? Xintr_ioapic_edge2 -ffffffff8254aa50 ? Xintr_ioapic_edge3 -ffffffff8254aa90 ? Xintr_ioapic_edge4 -ffffffff8254aad0 ? Xintr_ioapic_edge5 -ffffffff8254ab10 ? Xintr_ioapic_edge6 -ffffffff8254ab50 ? Xintr_ioapic_edge7 -ffffffff8254ab90 ? Xintr_ioapic_edge8 -ffffffff8254abd0 ? Xintr_ioapic_edge9 -ffffffff8254ac10 ? Xintr_ioapic_edge10 -ffffffff8254ac50 ? Xintr_ioapic_edge11 -ffffffff8254ac90 ? Xintr_ioapic_edge12 -ffffffff8254acd0 ? Xintr_ioapic_edge13 -ffffffff8254ad10 ? Xintr_ioapic_edge14 -ffffffff8254ad50 ? Xintr_ioapic_edge15 -ffffffff8254ad90 ? Xintr_ioapic_edge16 -ffffffff8254add0 ? Xintr_ioapic_edge17 -ffffffff8254ae10 ? Xintr_ioapic_edge18 -ffffffff8254ae50 ? Xintr_ioapic_edge19 -ffffffff8254ae90 ? Xintr_ioapic_edge20 -ffffffff8254aed0 ? Xintr_ioapic_edge21 -ffffffff8254af10 ? Xintr_ioapic_edge22 -ffffffff8254af50 ? Xintr_ioapic_edge23 -ffffffff8254af90 ? Xintr_ioapic_edge24 -ffffffff8254afd0 ? Xintr_ioapic_edge25 -ffffffff8254b010 ? Xintr_ioapic_edge26 -ffffffff8254b050 ? Xintr_ioapic_edge27 -ffffffff8254b090 ? Xintr_ioapic_edge28 -ffffffff8254b0d0 ? Xintr_ioapic_edge29 -ffffffff8254b110 ? Xintr_ioapic_edge30 -ffffffff8254b150 ? Xintr_ioapic_edge31 -ffffffff8254b190 ? Xintr_ioapic_edge32 -ffffffff8254b1d0 ? Xintr_ioapic_edge33 -ffffffff8254b210 ? Xintr_ioapic_edge34 -ffffffff8254b250 ? Xintr_ioapic_edge35 -ffffffff8254b290 ? Xintr_ioapic_edge36 -ffffffff8254b2d0 ? Xintr_ioapic_edge37 -ffffffff8254b310 ? Xintr_ioapic_edge38 -ffffffff8254b350 ? Xintr_ioapic_edge39 -ffffffff8254b390 ? Xintr_ioapic_edge40 -ffffffff8254b3d0 ? Xintr_ioapic_edge41 -ffffffff8254b410 ? Xintr_ioapic_edge42 -ffffffff8254b450 ? Xintr_ioapic_edge43 -ffffffff8254b490 ? Xintr_ioapic_edge44 -ffffffff8254b4d0 ? Xintr_ioapic_edge45 -ffffffff8254b510 ? Xintr_ioapic_edge46 -ffffffff8254b550 ? Xintr_ioapic_edge47 -ffffffff8254b590 ? Xintr_ioapic_edge48 -ffffffff8254b5d0 ? Xintr_ioapic_edge49 -ffffffff8254b610 ? Xintr_ioapic_edge50 -ffffffff8254b650 ? Xintr_ioapic_edge51 -ffffffff8254b690 ? Xintr_ioapic_edge52 -ffffffff8254b6d0 ? Xintr_ioapic_edge53 -ffffffff8254b710 ? Xintr_ioapic_edge54 -ffffffff8254b750 ? Xintr_ioapic_edge55 -ffffffff8254b790 ? Xintr_ioapic_edge56 -ffffffff8254b7d0 ? Xintr_ioapic_edge57 -ffffffff8254b810 ? Xintr_ioapic_edge58 -ffffffff8254b850 ? Xintr_ioapic_edge59 -ffffffff8254b890 ? Xintr_ioapic_edge60 -ffffffff8254b8d0 ? Xintr_ioapic_edge61 -ffffffff8254b910 ? Xintr_ioapic_edge62 -ffffffff8254b950 ? Xintr_ioapic_edge63 -ffffffff8254b990 ? Xintr_ioapic_level0 -ffffffff8254b9d0 ? Xintr_ioapic_level1 -ffffffff8254ba10 ? Xintr_ioapic_level2 -ffffffff8254ba50 ? Xintr_ioapic_level3 -ffffffff8254ba90 ? Xintr_ioapic_level4 -ffffffff8254bad0 ? Xintr_ioapic_level5 -ffffffff8254bb10 ? Xintr_ioapic_level6 -ffffffff8254bb50 ? Xintr_ioapic_level7 -ffffffff8254bb90 ? Xintr_ioapic_level8 -ffffffff8254bbd0 ? Xintr_ioapic_level9 -ffffffff8254bc10 ? Xintr_ioapic_level10 -ffffffff8254bc50 ? Xintr_ioapic_level11 -ffffffff8254bc90 ? Xintr_ioapic_level12 -ffffffff8254bcd0 ? Xintr_ioapic_level13 -ffffffff8254bd10 ? Xintr_ioapic_level14 -ffffffff8254bd50 ? Xintr_ioapic_level15 -ffffffff8254bd90 ? Xintr_ioapic_level16 -ffffffff8254bdd0 ? Xintr_ioapic_level17 -ffffffff8254be10 ? Xintr_ioapic_level18 -ffffffff8254be50 ? Xintr_ioapic_level19 -ffffffff8254be90 ? Xintr_ioapic_level20 -ffffffff8254bed0 ? Xintr_ioapic_level21 -ffffffff8254bf10 ? Xintr_ioapic_level22 -ffffffff8254bf50 ? Xintr_ioapic_level23 -ffffffff8254bf90 ? Xintr_ioapic_level24 -ffffffff8254bfd0 ? Xintr_ioapic_level25 -ffffffff8254c010 ? Xintr_ioapic_level26 -ffffffff8254c050 ? Xintr_ioapic_level27 -ffffffff8254c090 ? Xintr_ioapic_level28 -ffffffff8254c0d0 ? Xintr_ioapic_level29 -ffffffff8254c110 ? Xintr_ioapic_level30 -ffffffff8254c150 ? Xintr_ioapic_level31 -ffffffff8254c190 ? Xintr_ioapic_level32 -ffffffff8254c1d0 ? Xintr_ioapic_level33 -ffffffff8254c210 ? Xintr_ioapic_level34 -ffffffff8254c250 ? Xintr_ioapic_level35 -ffffffff8254c290 ? Xintr_ioapic_level36 -ffffffff8254c2d0 ? Xintr_ioapic_level37 -ffffffff8254c310 ? Xintr_ioapic_level38 -ffffffff8254c350 ? Xintr_ioapic_level39 -ffffffff8254c390 ? Xintr_ioapic_level40 -ffffffff8254c3d0 ? Xintr_ioapic_level41 -ffffffff8254c410 ? Xintr_ioapic_level42 -ffffffff8254c450 ? Xintr_ioapic_level43 -ffffffff8254c490 ? Xintr_ioapic_level44 -ffffffff8254c4d0 ? Xintr_ioapic_level45 -ffffffff8254c510 ? Xintr_ioapic_level46 -ffffffff8254c550 ? Xintr_ioapic_level47 -ffffffff8254c590 ? Xintr_ioapic_level48 -ffffffff8254c5d0 ? Xintr_ioapic_level49 -ffffffff8254c610 ? Xintr_ioapic_level50 -ffffffff8254c650 ? Xintr_ioapic_level51 -ffffffff8254c690 ? Xintr_ioapic_level52 -ffffffff8254c6d0 ? Xintr_ioapic_level53 -ffffffff8254c710 ? Xintr_ioapic_level54 -ffffffff8254c750 ? Xintr_ioapic_level55 -ffffffff8254c790 ? Xintr_ioapic_level56 -ffffffff8254c7d0 ? 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amdgpu_dpm_switch_power_profile +ffffffff82253860 T amdgpu_dpm_set_xgmi_pstate +ffffffff82253900 T amdgpu_dpm_set_df_cstate +ffffffff822539a0 T amdgpu_dpm_allow_xgmi_power_down +ffffffff82253a20 T amdgpu_dpm_enable_mgpu_fan_boost +ffffffff82253ab0 T amdgpu_dpm_set_clockgating_by_smu +ffffffff82253b50 T amdgpu_dpm_smu_i2c_bus_access +ffffffff82253bf0 T amdgpu_pm_acpi_event_handler +ffffffff82253cb0 T amdgpu_dpm_read_sensor +ffffffff82253d70 T amdgpu_dpm_compute_clocks +ffffffff82253e50 T amdgpu_dpm_enable_uvd +ffffffff82254040 T amdgpu_dpm_enable_vce +ffffffff82254230 T amdgpu_dpm_enable_jpeg +ffffffff82254330 T amdgpu_pm_load_smu_firmware +ffffffff822543e0 T amdgpu_dpm_handle_passthrough_sbr +ffffffff82254460 T amdgpu_dpm_send_hbm_bad_pages_num +ffffffff822544e0 T amdgpu_dpm_send_hbm_bad_channel_flag +ffffffff82254560 T amdgpu_dpm_get_dpm_freq_range +ffffffff82254600 T amdgpu_dpm_set_soft_freq_range +ffffffff822546a0 T amdgpu_dpm_write_watermarks_table +ffffffff82254720 T amdgpu_dpm_wait_for_event +ffffffff822547b0 T amdgpu_dpm_set_residency_gfxoff +ffffffff82254830 T amdgpu_dpm_get_residency_gfxoff +ffffffff822548b0 T amdgpu_dpm_get_entrycount_gfxoff +ffffffff82254930 T amdgpu_dpm_get_status_gfxoff +ffffffff822549b0 T amdgpu_dpm_get_thermal_throttling_counter +ffffffff82254a00 T amdgpu_dpm_gfx_state_change +ffffffff82254a70 T amdgpu_dpm_get_ecc_info +ffffffff82254af0 T amdgpu_dpm_get_vce_clock_state +ffffffff82254b80 T amdgpu_dpm_get_current_power_state +ffffffff82254bf0 T amdgpu_dpm_set_power_state +ffffffff82254d50 T amdgpu_dpm_dispatch_task +ffffffff82254df0 T amdgpu_dpm_get_performance_level +ffffffff82254e80 T amdgpu_dpm_force_performance_level +ffffffff82255060 T amdgpu_dpm_get_pp_num_states +ffffffff822550f0 T amdgpu_dpm_get_pp_table +ffffffff82255180 T amdgpu_dpm_set_fine_grain_clk_vol +ffffffff82255220 T amdgpu_dpm_odn_edit_dpm_table +ffffffff822552c0 T amdgpu_dpm_print_clock_levels +ffffffff82255350 T amdgpu_dpm_emit_clock_levels +ffffffff822553f0 T amdgpu_dpm_set_ppfeature_status +ffffffff82255480 T amdgpu_dpm_get_ppfeature_status +ffffffff82255510 T amdgpu_dpm_force_clock_level +ffffffff822555a0 T amdgpu_dpm_get_sclk_od +ffffffff82255620 T amdgpu_dpm_set_sclk_od +ffffffff822557a0 T amdgpu_dpm_get_mclk_od +ffffffff82255820 T amdgpu_dpm_set_mclk_od +ffffffff822559a0 T amdgpu_dpm_get_power_profile_mode +ffffffff82255a30 T amdgpu_dpm_set_power_profile_mode +ffffffff82255ad0 T amdgpu_dpm_get_gpu_metrics +ffffffff82255b60 T amdgpu_dpm_get_fan_control_mode +ffffffff82255bf0 T amdgpu_dpm_set_fan_speed_pwm +ffffffff82255c80 T amdgpu_dpm_get_fan_speed_pwm +ffffffff82255d10 T amdgpu_dpm_get_fan_speed_rpm +ffffffff82255da0 T amdgpu_dpm_set_fan_speed_rpm +ffffffff82255e30 T amdgpu_dpm_set_fan_control_mode +ffffffff82255ec0 T amdgpu_dpm_get_power_limit +ffffffff82255f70 T amdgpu_dpm_set_power_limit +ffffffff82256000 T amdgpu_dpm_is_cclk_dpm_supported +ffffffff82256070 T amdgpu_dpm_debugfs_print_current_performance_level +ffffffff82256100 T amdgpu_dpm_get_smu_prv_buf_details +ffffffff822561a0 T amdgpu_dpm_is_overdrive_supported +ffffffff82256240 T amdgpu_dpm_set_pp_table +ffffffff822562e0 T amdgpu_dpm_get_num_cpu_cores +ffffffff82256330 T amdgpu_dpm_stb_debug_fs_init +ffffffff82256380 T amdgpu_dpm_display_configuration_change +ffffffff82256410 T amdgpu_dpm_get_clock_by_type +ffffffff822564b0 T amdgpu_dpm_get_display_mode_validation_clks +ffffffff82256540 T amdgpu_dpm_get_clock_by_type_with_latency +ffffffff822565e0 T amdgpu_dpm_get_clock_by_type_with_voltage +ffffffff82256680 T amdgpu_dpm_set_watermarks_for_clocks_ranges +ffffffff82256710 T amdgpu_dpm_display_clock_voltage_request +ffffffff822567a0 T amdgpu_dpm_get_current_clocks +ffffffff82256830 T amdgpu_dpm_notify_smu_enable_pwe +ffffffff822568b0 T amdgpu_dpm_set_active_display_count +ffffffff82256940 T amdgpu_dpm_set_min_deep_sleep_dcefclk +ffffffff822569d0 T amdgpu_dpm_set_hard_min_dcefclk_by_freq +ffffffff82256a70 T amdgpu_dpm_set_hard_min_fclk_by_freq +ffffffff82256b10 T amdgpu_dpm_display_disable_memory_clock_switch +ffffffff82256ba0 T amdgpu_dpm_get_max_sustainable_clocks_by_dc +ffffffff82256c30 T amdgpu_dpm_get_uclk_dpm_states +ffffffff82256cd0 T amdgpu_dpm_get_dpm_clock_table +ffffffff82257000 T amdgpu_dpm_get_active_displays +ffffffff822570a0 T amdgpu_dpm_get_vblank_time +ffffffff82257150 T amdgpu_dpm_get_vrefresh +ffffffff82258000 T amdgpu_pm_sysfs_init +ffffffff82258030 T amdgpu_pm_sysfs_fini +ffffffff82258060 T amdgpu_debugfs_pm_init +ffffffff82259000 T amdgpu_dpm_print_class_info +ffffffff822592b0 T amdgpu_dpm_print_cap_info +ffffffff82259340 T amdgpu_dpm_print_ps_status +ffffffff822593d0 T amdgpu_pm_print_power_states +ffffffff82259490 T amdgpu_get_platform_caps +ffffffff82259530 T amdgpu_parse_extended_power_table +ffffffff8225a540 T amdgpu_free_extended_power_table +ffffffff8225a650 T amdgpu_add_thermal_controller +ffffffff8225aa80 T amdgpu_get_vce_clock_state +ffffffff8225aac0 T amdgpu_legacy_dpm_compute_clocks +ffffffff8225af30 T amdgpu_dpm_thermal_work_handler +ffffffff8225c000 t pp_early_init +ffffffff8225c100 t pp_late_init +ffffffff8225c220 t pp_sw_init +ffffffff8225c240 t pp_sw_fini +ffffffff8225c2d0 t pp_hw_init +ffffffff8225c330 t pp_hw_fini +ffffffff8225c370 t pp_late_fini +ffffffff8225c3d0 t pp_suspend +ffffffff8225c3f0 t pp_resume +ffffffff8225c410 t pp_is_idle +ffffffff8225c440 t pp_wait_for_idle +ffffffff8225c470 t pp_sw_reset +ffffffff8225c4a0 t pp_set_clockgating_state +ffffffff8225c4d0 t pp_set_powergating_state +ffffffff8225c500 t pp_dpm_set_fan_control_mode +ffffffff8225c570 t pp_dpm_get_fan_control_mode +ffffffff8225c5e0 t pp_dpm_set_fan_speed_pwm +ffffffff8225c640 t pp_dpm_get_fan_speed_pwm +ffffffff8225c6a0 t pp_dpm_force_clock_level +ffffffff8225c700 t pp_dpm_print_clock_levels +ffffffff8225c760 t pp_dpm_emit_clock_levels +ffffffff8225c7c0 t pp_dpm_force_performance_level +ffffffff8225c860 t pp_dpm_get_sclk_od +ffffffff8225c8c0 t pp_dpm_set_sclk_od +ffffffff8225c920 t pp_dpm_get_mclk_od +ffffffff8225c980 t pp_dpm_set_mclk_od +ffffffff8225c9e0 t pp_dpm_read_sensor +ffffffff8225ca80 t pp_dpm_get_performance_level +ffffffff8225cac0 t pp_dpm_get_current_power_state +ffffffff8225cb40 t pp_dpm_get_fan_speed_rpm +ffffffff8225cba0 t pp_dpm_set_fan_speed_rpm +ffffffff8225cc00 t pp_dpm_get_pp_num_states +ffffffff8225cd40 t pp_dpm_get_pp_table +ffffffff8225cd90 t pp_dpm_set_pp_table +ffffffff8225cec0 t pp_dpm_switch_power_profile +ffffffff8225d000 t pp_dpm_get_vce_clock_state +ffffffff8225d050 t pp_dpm_dispatch_tasks +ffffffff8225d090 t pp_dpm_load_fw +ffffffff8225d100 t pp_dpm_fw_loading_complete +ffffffff8225d130 t pp_set_powergating_by_smu +ffffffff8225d2b0 t pp_set_clockgating_by_smu +ffffffff8225d320 t pp_set_power_limit +ffffffff8225d3e0 t pp_get_power_limit +ffffffff8225d480 t pp_get_power_profile_mode +ffffffff8225d4e0 t pp_set_power_profile_mode +ffffffff8225d540 t pp_set_fine_grain_clk_vol +ffffffff8225d5a0 t pp_odn_edit_dpm_table +ffffffff8225d600 t pp_dpm_set_mp1_state +ffffffff8225d660 t pp_smu_i2c_bus_access +ffffffff8225d6c0 t pp_gfx_state_change_set +ffffffff8225d720 t pp_dpm_get_sclk +ffffffff8225d770 t pp_dpm_get_mclk +ffffffff8225d7c0 t pp_display_configuration_change +ffffffff8225d810 t pp_get_display_power_level +ffffffff8225d850 t pp_get_current_clocks +ffffffff8225d970 t pp_get_clock_by_type +ffffffff8225d9c0 t pp_get_clock_by_type_with_latency +ffffffff8225da10 t pp_get_clock_by_type_with_voltage +ffffffff8225da60 t pp_set_watermarks_for_clocks_ranges +ffffffff8225daa0 t pp_display_clock_voltage_request +ffffffff8225dae0 t pp_get_display_mode_validation_clocks +ffffffff8225db40 t pp_notify_smu_enable_pwe +ffffffff8225dba0 t pp_enable_mgpu_fan_boost +ffffffff8225dc00 t pp_set_active_display_count +ffffffff8225dc40 t pp_set_hard_min_dcefclk_by_freq +ffffffff8225dca0 t pp_set_hard_min_fclk_by_freq +ffffffff8225dd00 t pp_set_min_deep_sleep_dcefclk +ffffffff8225dd60 t pp_get_asic_baco_capability +ffffffff8225ddd0 t pp_get_asic_baco_state +ffffffff8225de30 t pp_set_asic_baco_state +ffffffff8225dea0 t pp_get_ppfeature_status +ffffffff8225df00 t pp_set_ppfeature_status +ffffffff8225df50 t pp_asic_reset_mode_2 +ffffffff8225dfb0 t pp_set_df_cstate +ffffffff8225e010 t pp_set_xgmi_pstate +ffffffff8225e070 t pp_get_gpu_metrics +ffffffff8225e0d0 t pp_get_prv_buffer_details +ffffffff8225e150 t pp_pm_compute_clocks +ffffffff8225f000 T ci_baco_set_state +ffffffff82260000 T baco_program_registers +ffffffff822600d0 t baco_cmd_handler +ffffffff82260250 T soc15_baco_program_registers +ffffffff82261000 T fiji_baco_set_state +ffffffff82262000 T phm_setup_asic +ffffffff82262050 T phm_power_down_asic +ffffffff822620a0 T phm_set_power_state +ffffffff82262110 T phm_enable_dynamic_state_management +ffffffff822621c0 T phm_disable_dynamic_state_management +ffffffff82262260 T phm_force_dpm_levels +ffffffff822622b0 T phm_apply_state_adjust_rules +ffffffff82262300 T phm_apply_clock_adjust_rules +ffffffff82262350 T phm_powerdown_uvd +ffffffff822623a0 T phm_disable_clock_power_gatings +ffffffff822623f0 T phm_pre_display_configuration_changed +ffffffff82262450 T phm_display_configuration_changed +ffffffff822624b0 T phm_notify_smc_display_config_after_ps_adjustment +ffffffff82262510 T phm_stop_thermal_controller +ffffffff82262570 T phm_register_irq_handlers +ffffffff822625c0 T phm_start_thermal_controller +ffffffff82262700 T phm_check_smc_update_required_for_display_configuration +ffffffff82262760 T phm_check_states_equal +ffffffff822627b0 T phm_store_dal_configuration_data +ffffffff82262900 T phm_get_dal_power_level +ffffffff82262960 T phm_set_cpu_power_state +ffffffff822629b0 T phm_get_performance_level +ffffffff82262a10 T phm_get_clock_info +ffffffff82262b90 T phm_get_current_shallow_sleep_clocks +ffffffff82262be0 T phm_get_clock_by_type +ffffffff82262c30 T phm_get_clock_by_type_with_latency +ffffffff82262c80 T phm_get_clock_by_type_with_voltage +ffffffff82262cd0 T phm_set_watermarks_for_clocks_ranges +ffffffff82262d20 T phm_display_clock_voltage_request +ffffffff82262d70 T phm_get_max_high_clocks +ffffffff82262dc0 T phm_disable_smc_firmware_ctf +ffffffff82262e20 T phm_set_active_display_count +ffffffff82263000 T hwmgr_early_init +ffffffff82263470 T hwmgr_sw_init +ffffffff822634e0 T hwmgr_sw_fini +ffffffff82263530 T hwmgr_hw_init +ffffffff822636f0 T hwmgr_hw_fini +ffffffff822637b0 T hwmgr_suspend +ffffffff82263830 T hwmgr_resume +ffffffff822638d0 T hwmgr_handle_task +ffffffff82264000 T polaris_baco_set_state +ffffffff82265000 T pp_override_get_default_fuse_value +ffffffff82266000 T psm_init_power_state_table +ffffffff822662a0 T psm_fini_power_state_table +ffffffff82266360 T psm_set_boot_states +ffffffff82266420 T psm_set_performance_states +ffffffff822664e0 T psm_set_user_performance_state +ffffffff82266580 T psm_adjust_power_state_dynamic +ffffffff82267000 T atomctrl_initialize_mc_reg_table +ffffffff82267210 T atomctrl_initialize_mc_reg_table_v2_2 +ffffffff82267420 T atomctrl_set_engine_dram_timings_rv770 +ffffffff82267490 T atomctrl_get_memory_pll_dividers_si +ffffffff82267570 T atomctrl_get_memory_pll_dividers_vi +ffffffff822675f0 T atomctrl_get_memory_pll_dividers_ai +ffffffff822676a0 T atomctrl_get_engine_pll_dividers_kong +ffffffff82267720 T atomctrl_get_engine_pll_dividers_vi +ffffffff822677e0 T atomctrl_get_engine_pll_dividers_ai +ffffffff822678c0 T atomctrl_get_dfs_pll_dividers_vi +ffffffff82267980 T atomctrl_get_reference_clock +ffffffff822679e0 T atomctrl_is_voltage_controlled_by_gpio_v3 +ffffffff82267aa0 T atomctrl_get_voltage_table_v3 +ffffffff82267c00 T atomctrl_get_pp_assign_pin +ffffffff82267cf0 T atomctrl_calculate_voltage_evv_on_sclk +ffffffff82268070 T atomctrl_get_voltage_evv_on_sclk +ffffffff822680f0 T atomctrl_get_voltage_evv +ffffffff822681a0 T atomctrl_get_mpll_reference_clock +ffffffff82268210 T atomctrl_is_asic_internal_ss_supported +ffffffff82268260 T atomctrl_get_memory_clock_spread_spectrum +ffffffff82268360 T atomctrl_get_engine_clock_spread_spectrum +ffffffff82268460 T atomctrl_read_efuse +ffffffff82268510 T atomctrl_set_ac_timing_ai +ffffffff82268570 T atomctrl_get_voltage_evv_on_sclk_ai +ffffffff822685f0 T atomctrl_get_smc_sclk_range_table +ffffffff822686b0 T atomctrl_get_vddc_shared_railinfo +ffffffff82268720 T atomctrl_get_avfs_information +ffffffff822688a0 T atomctrl_get_svi2_info +ffffffff82268980 T atomctrl_get_leakage_id_from_efuse +ffffffff822689e0 T atomctrl_get_leakage_vddc_base_on_leakage +ffffffff82268b80 T atomctrl_get_voltage_range +ffffffff82268c40 T atomctrl_get_edc_hilo_leakage_offset_table +ffffffff82268cc0 T atomctrl_get_edc_leakage_table +ffffffff82269000 T pp_atomfwctrl_is_voltage_controlled_by_gpio_v4 +ffffffff822690d0 T pp_atomfwctrl_get_voltage_table_v4 +ffffffff82269290 T pp_atomfwctrl_get_pp_assign_pin +ffffffff82269370 T pp_atomfwctrl_enter_self_refresh +ffffffff822693a0 T pp_atomfwctrl_get_gpu_pll_dividers_vega10 +ffffffff82269450 T pp_atomfwctrl_get_avfs_information +ffffffff82269780 T pp_atomfwctrl_get_gpio_information +ffffffff82269820 T pp_atomfwctrl_get_clk_information_by_clkid +ffffffff822698a0 T pp_atomfwctrl_get_vbios_bootup_values +ffffffff82269c20 T pp_atomfwctrl_get_smc_dpm_information +ffffffff8226a000 T encode_pcie_lane_width +ffffffff8226a030 T decode_pcie_lane_width +ffffffff8226b000 t pp_tables_v1_0_initialize +ffffffff8226c430 t pp_tables_v1_0_uninitialize +ffffffff8226c5e0 T get_number_of_powerplay_table_entries_v1_0 +ffffffff8226c690 T get_powerplay_table_entry_v1_0 +ffffffff8226d000 T pp_tables_get_response_times +ffffffff8226d0d0 T pp_tables_get_num_of_entries +ffffffff8226d190 T pp_tables_get_entry +ffffffff8226d4f0 t init_non_clock_fields +ffffffff8226d670 t pp_tables_initialize +ffffffff8226ead0 t pp_tables_uninitialize +ffffffff8226ecd0 t get_number_of_vce_state_table_entries +ffffffff8226edd0 t get_vce_state_table_entry +ffffffff8226f000 T smu10_init_function_pointers +ffffffff8226f040 t smu10_hwmgr_backend_init +ffffffff8226f710 t smu10_hwmgr_backend_fini +ffffffff8226f850 t smu10_setup_asic_task +ffffffff8226f8c0 t smu10_get_power_state_size +ffffffff8226f8f0 t smu10_apply_state_adjust_rules +ffffffff8226f920 t smu10_dpm_force_dpm_level +ffffffff8226fea0 t smu10_enable_dpm_tasks +ffffffff8226ff20 t smu10_disable_dpm_tasks +ffffffff8226ff50 t smu10_dpm_patch_boot_state +ffffffff8226ff80 t smu10_dpm_get_pp_table_entry +ffffffff8226ffe0 t smu10_dpm_get_num_of_pp_table_entries +ffffffff82270030 t smu10_powergate_vcn +ffffffff822700d0 t smu10_dpm_get_mclk +ffffffff82270130 t smu10_dpm_get_sclk +ffffffff82270180 t smu10_set_power_state_tasks +ffffffff822701f0 t smu10_set_cpu_power_state +ffffffff82270220 t smu10_store_cc6_data +ffffffff82270290 t smu10_get_dal_power_level +ffffffff822702c0 t smu10_get_performance_level +ffffffff82270350 t smu10_get_current_shallow_sleep_clocks +ffffffff822703b0 t smu10_get_clock_by_type_with_latency +ffffffff82270500 t smu10_get_clock_by_type_with_voltage +ffffffff82270610 t smu10_set_watermarks_for_clocks_ranges +ffffffff822706e0 t smu10_display_clock_voltage_request +ffffffff82270780 t smu10_get_max_high_clocks +ffffffff822707b0 t smu10_power_off_asic +ffffffff82270800 t smu10_force_clock_level +ffffffff822709c0 t smu10_print_clock_levels +ffffffff82270d60 t smu10_gfx_off_control +ffffffff82270e70 t smu10_read_sensor +ffffffff82270ff0 t smu10_set_active_display_count +ffffffff82271050 t smu10_set_min_deep_sleep_dcefclk +ffffffff822710b0 t smu10_get_power_profile_mode +ffffffff822710f0 t smu10_set_power_profile_mode +ffffffff82271240 t smu10_set_fine_grain_clk_vol +ffffffff82271450 t smu10_powergate_mmhub +ffffffff82271470 t smu10_smus_notify_pwe +ffffffff82271490 t smu10_powergate_sdma +ffffffff822714b0 t smu10_set_hard_min_dcefclk_by_freq +ffffffff82271510 t smu10_set_hard_min_fclk_by_freq +ffffffff82271570 t smu10_set_hard_min_gfxclk_by_freq +ffffffff822715d0 t smu10_set_soft_max_gfxclk_by_freq +ffffffff82271630 t smu10_asic_reset +ffffffff82271650 t smu10_gfx_state_change +ffffffff82271690 t smu10_dpm_get_pp_table_entry_callback +ffffffff82272000 T smu7_baco_get_capability +ffffffff82272060 T smu7_baco_get_state +ffffffff822720b0 T smu7_baco_set_state +ffffffff82273000 T smu7_powerdown_uvd +ffffffff82273050 T smu7_disable_clock_power_gating +ffffffff822730e0 T smu7_powergate_uvd +ffffffff822731d0 T smu7_powergate_vce +ffffffff822732c0 T smu7_update_clock_gatings +ffffffff82273670 T smu7_powergate_gfx +ffffffff82274000 T smu7_get_sleep_divider_id_from_clock +ffffffff822740a0 T smu7_init_function_pointers +ffffffff82274100 t smu7_hwmgr_backend_init +ffffffff82275f50 t smu7_hwmgr_backend_fini +ffffffff82275fc0 t smu7_setup_asic_task +ffffffff82276330 t smu7_get_power_state_size +ffffffff82276360 t smu7_apply_state_adjust_rules +ffffffff822767e0 t smu7_force_dpm_level +ffffffff82276c10 t smu7_enable_dpm_tasks +ffffffff82279380 t smu7_disable_dpm_tasks +ffffffff82279ac0 t smu7_dpm_patch_boot_state +ffffffff82279c00 t smu7_get_pp_table_entry +ffffffff8227a000 t smu7_get_number_of_powerplay_table_entries +ffffffff8227a070 t smu7_dpm_get_mclk +ffffffff8227a110 t smu7_dpm_get_sclk +ffffffff8227a1b0 t smu7_set_power_state_tasks +ffffffff8227af40 t smu7_notify_smc_display_config_after_ps_adjustment +ffffffff8227af70 t smu7_display_configuration_changed_task +ffffffff8227b130 t smu7_set_max_fan_rpm_output +ffffffff8227b160 t smu7_set_max_fan_pwm_output +ffffffff8227b180 t smu7_set_fan_control_mode +ffffffff8227b210 t smu7_get_fan_control_mode +ffffffff8227b250 t smu7_register_irq_handlers +ffffffff8227b300 t smu7_check_smc_update_required_for_display_configuration +ffffffff8227b3c0 t smu7_check_states_equal +ffffffff8227b560 t smu7_get_performance_level +ffffffff8227b600 t smu7_get_clock_by_type +ffffffff8227b7c0 t smu7_get_clock_by_type_with_latency +ffffffff8227b960 t smu7_set_watermarks_for_clocks_ranges +ffffffff8227bba0 t smu7_get_max_high_clocks +ffffffff8227bc20 t smu7_power_off_asic +ffffffff8227bc80 t smu7_force_clock_level +ffffffff8227bd90 t smu7_print_clock_levels +ffffffff8227c370 t smu7_get_sclk_od +ffffffff8227c3e0 t smu7_set_sclk_od +ffffffff8227c4a0 t smu7_get_mclk_od +ffffffff8227c510 t smu7_set_mclk_od +ffffffff8227c5d0 t smu7_read_sensor +ffffffff8227c8a0 t smu7_avfs_control +ffffffff8227c970 t smu7_notify_cac_buffer_info +ffffffff8227cb10 t smu7_get_thermal_temperature_range +ffffffff8227cba0 t smu7_get_power_profile_mode +ffffffff8227cbe0 t smu7_set_power_profile_mode +ffffffff8227ce40 t smu7_odn_edit_dpm_table +ffffffff8227cff0 t phm_add_voltage +ffffffff8227d100 t smu7_get_profiling_clk +ffffffff8227d2c0 t smu7_check_dpm_table_updated +ffffffff8227d410 t smu7_odn_initial_default_setting +ffffffff8227d540 t smu7_set_dpm_event_sources +ffffffff8227d660 t smu7_get_pp_table_entry_callback_func_v0 +ffffffff8227db60 t smu7_get_pp_table_entry_callback_func_v1 +ffffffff8227f000 T smu7_enable_didt_config +ffffffff8227f3c0 t smu7_program_pt_config_registers +ffffffff8227f5b0 t smu7_enable_didt +ffffffff8227f7a0 T smu7_disable_didt_config +ffffffff8227f860 T smu7_enable_smc_cac +ffffffff8227f8f0 T smu7_disable_smc_cac +ffffffff8227f980 T smu7_set_power_limit +ffffffff8227f9e0 T smu7_enable_power_containment +ffffffff8227fb70 T smu7_disable_power_containment +ffffffff8227fc90 T smu7_power_control_set_level +ffffffff82280000 T smu7_fan_ctrl_get_fan_speed_info +ffffffff82280080 T smu7_fan_ctrl_get_fan_speed_pwm +ffffffff82280140 T smu7_fan_ctrl_get_fan_speed_rpm +ffffffff822801f0 T smu7_fan_ctrl_set_static_mode +ffffffff82280320 T smu7_fan_ctrl_set_default_mode +ffffffff82280400 T smu7_fan_ctrl_start_smc_fan_control +ffffffff82280530 T smu7_fan_ctrl_stop_smc_fan_control +ffffffff82280550 T smu7_fan_ctrl_set_fan_speed_pwm +ffffffff82280740 T smu7_fan_ctrl_reset_fan_speed_to_default +ffffffff82280930 T smu7_fan_ctrl_set_fan_speed_rpm +ffffffff82280b10 T smu7_thermal_get_temperature +ffffffff82280b70 T smu7_thermal_disable_alert +ffffffff82280c10 T smu7_thermal_stop_thermal_controller +ffffffff82280d90 T smu7_start_thermal_controller +ffffffff82281140 T smu7_thermal_ctrl_uninitialize_thermal_controller +ffffffff82282000 T smu8_init_function_pointers +ffffffff82282040 t smu8_hwmgr_backend_init +ffffffff82282520 t smu8_hwmgr_backend_fini +ffffffff822825a0 t smu8_setup_asic_task +ffffffff82282ac0 t smu8_get_power_state_size +ffffffff82282af0 t smu8_apply_state_adjust_rules +ffffffff82282c40 t smu8_dpm_force_dpm_level +ffffffff82282f40 t smu8_enable_dpm_tasks +ffffffff82283090 t smu8_disable_dpm_tasks +ffffffff82283170 t smu8_dpm_patch_boot_state +ffffffff822831d0 t smu8_dpm_get_pp_table_entry +ffffffff82283230 t smu8_dpm_get_num_of_pp_table_entries +ffffffff82283280 t smu8_dpm_powerdown_uvd +ffffffff822832d0 t smu8_dpm_powergate_vce +ffffffff822834a0 t smu8_dpm_powergate_uvd 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phm_find_boot_level +ffffffff82287180 T phm_get_sclk_for_voltage_evv +ffffffff82287230 T phm_initializa_dynamic_state_adjustment_rule_settings +ffffffff82287340 T phm_get_lowest_enabled_level +ffffffff82287380 T phm_apply_dal_min_voltage_request +ffffffff82287450 T phm_get_voltage_evv_on_sclk +ffffffff82287500 T phm_irq_process +ffffffff82287700 t orderly_poweroff +ffffffff82287710 T smu9_register_irq_handlers +ffffffff822877c0 T smu_atom_get_data_table +ffffffff82287830 T smu_get_voltage_dependency_table_ppt_v1 +ffffffff82287910 T smu_set_watermarks_for_clocks_ranges +ffffffff82288000 T tonga_baco_set_state +ffffffff82289000 T vega10_baco_set_state +ffffffff8228a000 T vega10_enable_disable_vce_dpm +ffffffff8228a090 T vega10_hwmgr_init +ffffffff8228a0f0 t vega10_hwmgr_backend_init +ffffffff8228aef0 t vega10_hwmgr_backend_fini +ffffffff8228af60 t vega10_setup_asic_task +ffffffff8228b090 t vega10_get_power_state_size +ffffffff8228b0c0 t vega10_apply_state_adjust_rules +ffffffff8228b450 t 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sienna_cichlid_get_throttler_status_locked +ffffffff822e84e0 t sienna_cichlid_get_smartshift_power_percentage +ffffffff822e8610 t sienna_cichlid_i2c_xfer +ffffffff822e88c0 t sienna_cichlid_i2c_func +ffffffff822e9000 T smu_v11_0_init_microcode +ffffffff822e92b0 T smu_v11_0_fini_microcode +ffffffff822e9330 T smu_v11_0_load_microcode +ffffffff822e9480 T smu_v11_0_check_fw_status +ffffffff822e94d0 T smu_v11_0_check_fw_version +ffffffff822e9680 T smu_v11_0_setup_pptable +ffffffff822e97b0 T smu_v11_0_init_smc_tables +ffffffff822e9910 T smu_v11_0_fini_smc_tables +ffffffff822e9b40 T smu_v11_0_init_power +ffffffff822e9bd0 T smu_v11_0_fini_power +ffffffff822e9c30 T smu_v11_0_get_vbios_bootup_values +ffffffff822e9f90 T smu_v11_0_notify_memory_pool_location +ffffffff822ea080 T smu_v11_0_set_min_deep_sleep_dcefclk +ffffffff822ea100 T smu_v11_0_set_driver_table_location +ffffffff822ea170 T smu_v11_0_set_tool_table_location +ffffffff822ea1e0 T smu_v11_0_init_display_count +ffffffff822ea240 T smu_v11_0_set_allowed_mask +ffffffff822ea310 T smu_v11_0_system_features_control +ffffffff822ea330 T smu_v11_0_notify_display_change +ffffffff822ea3a0 T smu_v11_0_init_max_sustainable_clocks +ffffffff822ea610 t smu_v11_0_get_max_sustainable_clock +ffffffff822ea730 T smu_v11_0_get_current_power_limit +ffffffff822ea800 T smu_v11_0_set_power_limit +ffffffff822ea940 T smu_v11_0_interrupt_work +ffffffff822ea9c0 T smu_v11_0_enable_thermal_alert +ffffffff822eaa60 T smu_v11_0_disable_thermal_alert +ffffffff822eaa80 T smu_v11_0_get_gfx_vdd +ffffffff822eab40 T smu_v11_0_display_clock_voltage_request +ffffffff822eac80 T smu_v11_0_set_hard_freq_limited_range +ffffffff822ead60 T smu_v11_0_gfx_off_control +ffffffff822eadd0 T smu_v11_0_get_fan_control_mode +ffffffff822eae20 T smu_v11_0_set_fan_speed_pwm +ffffffff822eafc0 t smu_v11_0_set_fan_static_mode +ffffffff822eb170 T smu_v11_0_set_fan_speed_rpm +ffffffff822eb290 T smu_v11_0_get_fan_speed_pwm +ffffffff822eb3d0 T smu_v11_0_get_fan_speed_rpm +ffffffff822eb4d0 T smu_v11_0_set_fan_control_mode +ffffffff822eb670 T smu_v11_0_set_xgmi_pstate +ffffffff822eb690 T smu_v11_0_register_irq_handler +ffffffff822eb750 T smu_v11_0_get_max_sustainable_clocks_by_dc +ffffffff822eb7e0 T smu_v11_0_set_azalia_d3_pme +ffffffff822eb800 T smu_v11_0_baco_set_armd3_sequence +ffffffff822eb820 T smu_v11_0_baco_is_support +ffffffff822eb8b0 T smu_v11_0_baco_get_state +ffffffff822eb8e0 T smu_v11_0_baco_set_state +ffffffff822ebb90 T smu_v11_0_baco_enter +ffffffff822ebc80 T smu_v11_0_baco_exit +ffffffff822ebd20 T smu_v11_0_mode1_reset +ffffffff822ebda0 T smu_v11_0_handle_passthrough_sbr +ffffffff822ebdc0 T smu_v11_0_get_dpm_ultimate_freq +ffffffff822ebf00 T smu_v11_0_set_soft_freq_limited_range +ffffffff822ebfe0 T smu_v11_0_set_performance_level +ffffffff822ec330 T smu_v11_0_set_power_source +ffffffff822ec390 T smu_v11_0_get_dpm_freq_by_index +ffffffff822ec440 T smu_v11_0_get_dpm_level_count +ffffffff822ec4e0 T smu_v11_0_set_single_dpm_table +ffffffff822ec6c0 T smu_v11_0_get_dpm_level_range +ffffffff822ec820 T smu_v11_0_get_current_pcie_link_width_level +ffffffff822ec870 T smu_v11_0_get_current_pcie_link_width +ffffffff822ec8d0 T smu_v11_0_get_current_pcie_link_speed_level +ffffffff822ec920 T smu_v11_0_get_current_pcie_link_speed +ffffffff822ec980 T smu_v11_0_gfx_ulv_control +ffffffff822ec9f0 T smu_v11_0_deep_sleep_control +ffffffff822ecba0 T smu_v11_0_restore_user_od_settings +ffffffff822ecc30 T smu_v11_0_set_smu_mailbox_registers +ffffffff822ecca0 t smu_v11_0_set_irq_state +ffffffff822ed220 t smu_v11_0_irq_process +ffffffff822ed520 t orderly_poweroff +ffffffff822ee000 T vangogh_set_ppt_funcs +ffffffff822ee040 t vangogh_set_default_dpm_tables +ffffffff822ee070 t vangogh_common_print_clk_levels +ffffffff822ee4c0 t vangogh_force_clk_levels +ffffffff822ee6f0 t vangogh_od_edit_dpm_table +ffffffff822eec50 t vangogh_get_power_profile_mode +ffffffff822eed20 t vangogh_set_power_profile_mode +ffffffff822eee50 t vangogh_dpm_set_vcn_enable +ffffffff822eeea0 t vangogh_dpm_set_jpeg_enable +ffffffff822eeef0 t vangogh_read_sensor +ffffffff822ef020 t vangogh_is_dpm_running +ffffffff822ef080 t vangogh_set_watermarks_table +ffffffff822ef210 t vangogh_set_performance_level +ffffffff822efb40 t vangogh_get_power_limit +ffffffff822efcc0 t vangogh_get_ppt_limit +ffffffff822efd30 t vangogh_get_dpm_clock_table +ffffffff822efea0 t vangogh_init_smc_tables +ffffffff822f00f0 t vangogh_system_features_control +ffffffff822f0140 t vangogh_set_power_limit +ffffffff822f02a0 t vangogh_get_gfxoff_status +ffffffff822f0330 t vangogh_get_gfxoff_entrycount +ffffffff822f03a0 t vangogh_set_gfxoff_residency +ffffffff822f0410 t vangogh_get_gfxoff_residency +ffffffff822f0450 t vangogh_mode2_reset +ffffffff822f0590 t vangogh_common_get_gpu_metrics +ffffffff822f0be0 t vangogh_post_smu_init +ffffffff822f0d90 t vangogh_set_fine_grain_gfx_freq_parameters +ffffffff822f0e00 t vangogh_common_get_smu_metrics_data +ffffffff822f1150 t vangogh_force_dpm_limit_value +ffffffff822f1290 t vangogh_get_dpm_ultimate_freq +ffffffff822f1650 t vangogh_set_soft_freq_limited_range +ffffffff822f2000 T renoir_set_ppt_funcs +ffffffff822f20a0 t renoir_get_current_power_state +ffffffff822f2120 t renoir_print_clk_levels +ffffffff822f2390 t renoir_force_clk_levels +ffffffff822f25c0 t renoir_od_edit_dpm_table +ffffffff822f28c0 t renoir_get_power_profile_mode +ffffffff822f2990 t renoir_set_power_profile_mode +ffffffff822f2ac0 t renoir_dpm_set_vcn_enable +ffffffff822f2b40 t renoir_dpm_set_jpeg_enable +ffffffff822f2bc0 t renoir_read_sensor +ffffffff822f2fb0 t renoir_is_dpm_running +ffffffff822f2ff0 t renoir_set_watermarks_table +ffffffff822f31a0 t renoir_set_performance_level +ffffffff822f36e0 t renoir_get_dpm_clock_table +ffffffff822f3a30 t renoir_init_smc_tables +ffffffff822f3ba0 t renoir_get_enabled_mask +ffffffff822f3be0 t renoir_get_dpm_ultimate_freq +ffffffff822f3e80 t renoir_get_gpu_metrics +ffffffff822f40a0 t renoir_gfx_state_change_set +ffffffff822f40d0 t renoir_set_fine_grain_gfx_freq_parameters +ffffffff822f4170 t renoir_force_dpm_limit_value +ffffffff822f5000 T smu_v12_0_check_fw_status +ffffffff822f5050 T smu_v12_0_check_fw_version +ffffffff822f5110 T smu_v12_0_powergate_sdma +ffffffff822f5150 T smu_v12_0_set_gfx_cgpg +ffffffff822f51b0 T smu_v12_0_get_gfxoff_status +ffffffff822f5240 T smu_v12_0_gfx_off_control +ffffffff822f5360 T smu_v12_0_fini_smc_tables +ffffffff822f5410 T smu_v12_0_set_default_dpm_tables +ffffffff822f5440 T smu_v12_0_mode2_reset +ffffffff822f5460 T smu_v12_0_set_soft_freq_limited_range +ffffffff822f55a0 T smu_v12_0_set_driver_table_location +ffffffff822f5610 T smu_v12_0_get_vbios_bootup_values +ffffffff822f6000 T aldebaran_set_ppt_funcs +ffffffff822f6040 t aldebaran_get_allowed_feature_mask +ffffffff822f6090 t aldebaran_set_default_dpm_table +ffffffff822f6290 t aldebaran_populate_umd_state_clk +ffffffff822f6390 t aldebaran_print_clk_levels +ffffffff822f6550 t aldebaran_force_clk_levels +ffffffff822f6700 t aldebaran_usr_edit_dpm_table +ffffffff822f6920 t aldebaran_read_sensor +ffffffff822f6bc0 t aldebaran_is_dpm_running +ffffffff822f6c10 t aldebaran_get_thermal_temperature_range +ffffffff822f6ce0 t aldebaran_set_performance_level +ffffffff822f6d90 t aldebaran_get_power_limit +ffffffff822f6f20 t aldebaran_set_df_cstate +ffffffff822f6fa0 t aldebaran_allow_xgmi_power_down +ffffffff822f7040 t aldebaran_i2c_control_init +ffffffff822f7100 t aldebaran_i2c_control_fini +ffffffff822f7140 t aldebaran_get_unique_id +ffffffff822f7220 t aldebaran_init_smc_tables +ffffffff822f73b0 t aldebaran_set_mp1_state +ffffffff822f73f0 t aldebaran_setup_pptable +ffffffff822f74c0 t aldebaran_system_features_control +ffffffff822f7620 t aldebaran_set_power_limit +ffffffff822f76b0 t aldebaran_is_baco_supported +ffffffff822f76e0 t aldebaran_is_mode1_reset_supported +ffffffff822f7710 t aldebaran_is_mode2_reset_supported +ffffffff822f7740 t aldebaran_mode1_reset +ffffffff822f7820 t aldebaran_mode2_reset +ffffffff822f79e0 t aldebaran_set_soft_freq_limited_range +ffffffff822f7bf0 t aldebaran_log_thermal_throttling_event +ffffffff822f7f00 t aldebaran_get_gpu_metrics +ffffffff822f8190 t aldebaran_smu_handle_passthrough_sbr +ffffffff822f81b0 t aldebaran_smu_send_hbm_bad_page_num +ffffffff822f8240 t aldebaran_get_ecc_info +ffffffff822f83a0 t aldebaran_send_hbm_bad_channel_flag +ffffffff822f8480 t aldebaran_get_current_clk_freq_by_table +ffffffff822f85c0 t aldebaran_get_smu_metrics_data +ffffffff822f8810 t aldebaran_upload_dpm_level +ffffffff822f8900 t aldebaran_i2c_xfer +ffffffff822f8bb0 t aldebaran_i2c_func +ffffffff822f9000 T smu_v13_0_init_microcode +ffffffff822f91d0 T smu_v13_0_fini_microcode +ffffffff822f9250 T smu_v13_0_load_microcode +ffffffff822f9280 T smu_v13_0_init_pptable_microcode +ffffffff822f9430 T smu_v13_0_get_pptable_from_firmware +ffffffff822f9560 T smu_v13_0_check_fw_status +ffffffff822f95d0 T smu_v13_0_check_fw_version +ffffffff822f9700 T smu_v13_0_setup_pptable +ffffffff822f98a0 T smu_v13_0_init_smc_tables +ffffffff822f99f0 T smu_v13_0_fini_smc_tables +ffffffff822f9be0 T smu_v13_0_init_power +ffffffff822f9c60 T smu_v13_0_fini_power +ffffffff822f9ce0 T smu_v13_0_get_vbios_bootup_values +ffffffff822f9f90 T smu_v13_0_notify_memory_pool_location +ffffffff822fa050 T smu_v13_0_set_min_deep_sleep_dcefclk +ffffffff822fa0d0 T smu_v13_0_set_driver_table_location +ffffffff822fa140 T smu_v13_0_set_tool_table_location +ffffffff822fa1b0 T smu_v13_0_init_display_count +ffffffff822fa1f0 T smu_v13_0_set_allowed_mask +ffffffff822fa2c0 T smu_v13_0_gfx_off_control +ffffffff822fa330 T smu_v13_0_system_features_control +ffffffff822fa350 T smu_v13_0_notify_display_change +ffffffff822fa3c0 T smu_v13_0_init_max_sustainable_clocks +ffffffff822fa630 t smu_v13_0_get_max_sustainable_clock +ffffffff822fa750 T smu_v13_0_get_current_power_limit +ffffffff822fa820 T smu_v13_0_set_power_limit +ffffffff822fa940 T smu_v13_0_enable_thermal_alert +ffffffff822fa9d0 T smu_v13_0_disable_thermal_alert +ffffffff822faa10 T smu_v13_0_get_gfx_vdd +ffffffff822faad0 T smu_v13_0_display_clock_voltage_request +ffffffff822fac10 T smu_v13_0_set_hard_freq_limited_range +ffffffff822facf0 T smu_v13_0_get_fan_control_mode +ffffffff822fad40 T smu_v13_0_set_fan_speed_pwm +ffffffff822faf50 t smu_v13_0_set_fan_static_mode +ffffffff822fb110 T smu_v13_0_set_fan_control_mode +ffffffff822fb270 T smu_v13_0_set_fan_speed_rpm +ffffffff822fb410 T smu_v13_0_set_xgmi_pstate +ffffffff822fb430 T smu_v13_0_register_irq_handler +ffffffff822fb500 T smu_v13_0_get_max_sustainable_clocks_by_dc +ffffffff822fb590 T smu_v13_0_set_azalia_d3_pme +ffffffff822fb5b0 T smu_v13_0_wait_for_event +ffffffff822fb610 T smu_v13_0_get_dpm_ultimate_freq +ffffffff822fb770 T smu_v13_0_set_soft_freq_limited_range +ffffffff822fb850 T smu_v13_0_set_performance_level +ffffffff822fbfe0 T smu_v13_0_set_power_source +ffffffff822fc040 T smu_v13_0_set_single_dpm_table +ffffffff822fc2d0 T smu_v13_0_get_dpm_level_range +ffffffff822fc450 T smu_v13_0_get_current_pcie_link_width_level +ffffffff822fc4a0 T smu_v13_0_get_current_pcie_link_width +ffffffff822fc500 T smu_v13_0_get_current_pcie_link_speed_level +ffffffff822fc550 T smu_v13_0_get_current_pcie_link_speed +ffffffff822fc5a0 T smu_v13_0_set_vcn_enable +ffffffff822fc650 T smu_v13_0_set_jpeg_enable +ffffffff822fc670 T smu_v13_0_run_btc +ffffffff822fc6f0 T smu_v13_0_gpo_control +ffffffff822fc780 T smu_v13_0_deep_sleep_control +ffffffff822fc9f0 T smu_v13_0_gfx_ulv_control +ffffffff822fca60 T smu_v13_0_baco_set_armd3_sequence +ffffffff822fca80 T smu_v13_0_baco_is_support +ffffffff822fcb10 T smu_v13_0_baco_get_state +ffffffff822fcb40 T smu_v13_0_baco_set_state +ffffffff822fcc00 T smu_v13_0_baco_enter +ffffffff822fcd10 T smu_v13_0_baco_exit +ffffffff822fcdb0 T smu_v13_0_set_gfx_power_up_by_imu +ffffffff822fcdf0 T smu_v13_0_od_edit_dpm_table +ffffffff822fd0b0 T smu_v13_0_set_default_dpm_tables +ffffffff822fd0e0 T smu_v13_0_set_smu_mailbox_registers +ffffffff822fd150 T smu_v13_0_mode1_reset +ffffffff822fd1d0 t smu_v13_0_set_irq_state +ffffffff822fd750 t smu_v13_0_irq_process +ffffffff822fda50 t orderly_poweroff +ffffffff822fe000 T smu_v13_0_0_set_ppt_funcs +ffffffff822fe0e0 t smu_v13_0_0_get_allowed_feature_mask +ffffffff822fe220 t smu_v13_0_0_set_default_dpm_table +ffffffff822fe650 t smu_v13_0_0_populate_umd_state_clk +ffffffff822fe780 t smu_v13_0_0_print_clk_levels +ffffffff822fe8a0 t smu_v13_0_0_force_clk_levels +ffffffff822fea20 t smu_v13_0_0_get_power_profile_mode +ffffffff822fec70 t smu_v13_0_0_set_power_profile_mode +ffffffff822feec0 t smu_v13_0_0_read_sensor +ffffffff822ff0e0 t smu_v13_0_0_is_dpm_running +ffffffff822ff130 t smu_v13_0_0_get_fan_speed_pwm +ffffffff822ff210 t smu_v13_0_0_get_fan_speed_rpm +ffffffff822ff280 t smu_v13_0_0_get_thermal_temperature_range +ffffffff822ff380 t smu_v13_0_0_dump_pptable +ffffffff822ff3b0 t smu_v13_0_0_get_power_limit +ffffffff822ff490 t smu_v13_0_0_set_df_cstate +ffffffff822ff4b0 t smu_v13_0_0_update_pcie_parameters +ffffffff822ff5a0 t smu_v13_0_0_i2c_control_init +ffffffff822ff6d0 t smu_v13_0_0_i2c_control_fini +ffffffff822ff710 t smu_v13_0_0_get_unique_id +ffffffff822ff7c0 t smu_v13_0_0_init_smc_tables +ffffffff822ff9b0 t smu_v13_0_0_set_mp1_state +ffffffff822ff9f0 t smu_v13_0_0_setup_pptable +ffffffff822ffb30 t smu_v13_0_0_system_features_control +ffffffff822ffb40 t smu_v13_0_0_baco_enter +ffffffff822ffb90 t smu_v13_0_0_baco_exit +ffffffff822ffbf0 t smu_v13_0_0_is_mode1_reset_supported +ffffffff822ffc50 t smu_v13_0_0_mode1_reset +ffffffff822ffce0 t smu_v13_0_0_get_dpm_ultimate_freq +ffffffff822ffe00 t smu_v13_0_0_get_gpu_metrics +ffffffff82300230 t smu_v13_0_0_enable_mgpu_fan_boost +ffffffff82300280 t smu_v13_0_0_smu_send_bad_mem_page_num +ffffffff82300310 t smu_v13_0_0_send_bad_mem_channel_flag +ffffffff823003a0 t smu_v13_0_0_get_smu_metrics_data +ffffffff82300710 t smu_v13_0_get_throttler_status +ffffffff823008d0 t smu_v13_0_0_i2c_xfer +ffffffff82300b80 t smu_v13_0_0_i2c_func +ffffffff82301000 T smu_v13_0_4_set_ppt_funcs +ffffffff823010b0 t smu_v13_0_4_print_clk_levels +ffffffff82301170 t smu_v13_0_4_force_clk_levels +ffffffff82301410 t smu_v13_0_4_read_sensor +ffffffff823016c0 t smu_v13_0_4_is_dpm_running +ffffffff82301710 t smu_v13_0_4_set_watermarks_table +ffffffff823018a0 t smu_v13_0_4_set_performance_level +ffffffff82301de0 t smu_v13_0_4_init_smc_tables +ffffffff82301f50 t smu_v13_0_4_fini_smc_tables +ffffffff82302000 t smu_v13_0_4_system_features_control +ffffffff82302050 t smu_v13_0_4_mode2_reset +ffffffff82302070 t smu_v13_0_4_get_dpm_ultimate_freq +ffffffff82302490 t smu_v13_0_4_get_gpu_metrics +ffffffff82302660 t smu_v13_0_4_set_fine_grain_gfx_freq_parameters +ffffffff823026c0 t smu_v13_0_4_get_smu_metrics_data +ffffffff82303000 T smu_v13_0_5_set_ppt_funcs +ffffffff82303090 t smu_v13_0_5_set_default_dpm_tables +ffffffff823030c0 t smu_v13_0_5_print_clk_levels +ffffffff82303170 t smu_v13_0_5_force_clk_levels +ffffffff823032d0 t smu_v13_0_5_od_edit_dpm_table +ffffffff82303590 t smu_v13_0_5_dpm_set_vcn_enable +ffffffff823035b0 t smu_v13_0_5_dpm_set_jpeg_enable +ffffffff823035d0 t smu_v13_0_5_read_sensor +ffffffff823037f0 t smu_v13_0_5_is_dpm_running +ffffffff82303840 t smu_v13_0_5_set_watermarks_table +ffffffff823039d0 t smu_v13_0_5_set_performance_level +ffffffff82303bb0 t smu_v13_0_5_init_smc_tables +ffffffff82303d20 t smu_v13_0_5_fini_smc_tables +ffffffff82303dd0 t smu_v13_0_5_system_features_control +ffffffff82303e20 t smu_v13_0_5_mode2_reset +ffffffff82303ea0 t smu_v13_0_5_get_dpm_ultimate_freq +ffffffff823042e0 t smu_v13_0_5_get_gpu_metrics +ffffffff82304420 t smu_v13_0_5_set_fine_grain_gfx_freq_parameters +ffffffff82304480 t smu_v13_0_5_get_smu_metrics_data +ffffffff82305000 T smu_v13_0_7_set_ppt_funcs +ffffffff82305050 t smu_v13_0_7_get_allowed_feature_mask +ffffffff823051c0 t smu_v13_0_7_set_default_dpm_table +ffffffff823055f0 t smu_v13_0_7_populate_umd_state_clk +ffffffff82305720 t smu_v13_0_7_print_clk_levels +ffffffff82305840 t smu_v13_0_7_force_clk_levels +ffffffff823059c0 t smu_v13_0_7_get_power_profile_mode +ffffffff82305ca0 t smu_v13_0_7_set_power_profile_mode +ffffffff82305ee0 t smu_v13_0_7_read_sensor +ffffffff823060f0 t smu_v13_0_7_is_dpm_running +ffffffff82306140 t smu_v13_0_7_get_fan_speed_pwm +ffffffff82306220 t smu_v13_0_7_get_fan_speed_rpm +ffffffff82306290 t smu_v13_0_7_get_thermal_temperature_range +ffffffff82306380 t smu_v13_0_7_dump_pptable +ffffffff823063b0 t smu_v13_0_7_get_power_limit +ffffffff82306490 t smu_v13_0_7_set_df_cstate +ffffffff823064b0 t smu_v13_0_7_update_pcie_parameters +ffffffff823065a0 t smu_v13_0_7_init_smc_tables +ffffffff82306790 t smu_v13_0_7_check_fw_status +ffffffff823067e0 t smu_v13_0_7_set_mp1_state +ffffffff82306820 t smu_v13_0_7_setup_pptable +ffffffff82306980 t smu_v13_0_7_baco_enter +ffffffff823069d0 t smu_v13_0_7_baco_exit +ffffffff82306a30 t smu_v13_0_7_is_mode1_reset_supported +ffffffff82306a70 t smu_v13_0_7_get_dpm_ultimate_freq +ffffffff82306b90 t smu_v13_0_7_get_gpu_metrics +ffffffff82306fa0 t smu_v13_0_7_enable_mgpu_fan_boost +ffffffff82306ff0 t smu_v13_0_7_get_smu_metrics_data +ffffffff82307340 t smu_v13_0_7_get_throttler_status +ffffffff82308000 T yellow_carp_set_ppt_funcs +ffffffff82308040 t yellow_carp_set_default_dpm_tables +ffffffff82308070 t yellow_carp_print_clk_levels +ffffffff82308130 t yellow_carp_force_clk_levels +ffffffff823083d0 t yellow_carp_od_edit_dpm_table +ffffffff82308690 t yellow_carp_dpm_set_vcn_enable +ffffffff823086b0 t yellow_carp_dpm_set_jpeg_enable +ffffffff823086d0 t yellow_carp_read_sensor +ffffffff82308a70 t yellow_carp_is_dpm_running +ffffffff82308ac0 t yellow_carp_set_watermarks_table +ffffffff82308c50 t yellow_carp_set_performance_level +ffffffff82309190 t yellow_carp_init_smc_tables +ffffffff82309300 t yellow_carp_fini_smc_tables +ffffffff823093b0 t yellow_carp_system_features_control +ffffffff82309400 t yellow_carp_get_gfxoff_status +ffffffff82309490 t yellow_carp_mode2_reset +ffffffff82309510 t yellow_carp_get_dpm_ultimate_freq +ffffffff82309960 t yellow_carp_get_gpu_metrics +ffffffff82309b20 t yellow_carp_post_smu_init +ffffffff82309ba0 t yellow_carp_set_fine_grain_gfx_freq_parameters +ffffffff82309c00 t yellow_carp_get_smu_metrics_data +ffffffff8230a000 T smu_cmn_send_msg_without_waiting +ffffffff8230a170 T smu_cmn_wait_for_response +ffffffff8230a2b0 T smu_cmn_send_smc_msg_with_param +ffffffff8230a5d0 T smu_cmn_to_asic_specific_index +ffffffff8230a6e0 t __smu_cmn_reg_print_error +ffffffff8230a930 T smu_cmn_send_smc_msg +ffffffff8230a950 T smu_cmn_send_debug_smc_msg +ffffffff8230a9d0 T smu_cmn_feature_is_supported +ffffffff8230aa80 T smu_cmn_feature_is_enabled +ffffffff8230ab80 T smu_cmn_clk_dpm_is_enabled +ffffffff8230ac80 T smu_cmn_get_enabled_mask +ffffffff8230ad70 T smu_cmn_get_indep_throttler_status +ffffffff8230ae20 T smu_cmn_feature_update_enable_state +ffffffff8230aec0 T smu_cmn_feature_set_enabled +ffffffff8230af90 T smu_cmn_get_pp_feature_mask +ffffffff8230b140 T smu_cmn_set_pp_feature_mask +ffffffff8230b240 T smu_cmn_disable_all_features_with_exception +ffffffff8230b2f0 T smu_cmn_get_smc_version +ffffffff8230b3c0 T smu_cmn_update_table +ffffffff8230b520 T smu_cmn_write_watermarks_table +ffffffff8230b5f0 T smu_cmn_write_pptable +ffffffff8230b6b0 T smu_cmn_get_metrics_table +ffffffff8230b810 T smu_cmn_get_combo_pptable +ffffffff8230b8e0 T smu_cmn_init_soft_gpu_metrics +ffffffff8230b9c0 T smu_cmn_set_mp1_state +ffffffff8230ba60 T smu_cmn_is_audio_func_enabled +ffffffff8230c000 T pci_mcfg_init +ffffffff8230c050 T pci_lookup_segment +ffffffff8230c0b0 T pci_attach_hook +ffffffff8230c0e0 T pci_bus_maxdevs +ffffffff8230c110 T pci_make_tag +ffffffff8230c180 T pci_decompose_tag +ffffffff8230c1e0 T pci_conf_size +ffffffff8230c240 T pci_mcfg_map_bus +ffffffff8230c2c0 T pci_conf_read +ffffffff8230c410 T pci_conf_write +ffffffff8230c550 T pci_msix_table_map +ffffffff8230c670 T pci_msix_table_unmap +ffffffff8230c710 T msi_hwmask +ffffffff8230c740 T msi_hwunmask +ffffffff8230c770 T msi_addroute +ffffffff8230c870 T msi_delroute +ffffffff8230c8e0 T pci_intr_map_msi +ffffffff8230c960 T msix_hwmask +ffffffff8230c990 T msix_hwunmask +ffffffff8230c9c0 T msix_addroute +ffffffff8230cbc0 T msix_delroute +ffffffff8230cd20 T pci_intr_map_msix +ffffffff8230cdf0 T pci_intr_map +ffffffff8230d010 T pci_intr_string +ffffffff8230d0f0 T pci_intr_establish +ffffffff8230d140 T pci_intr_establish_cpu +ffffffff8230d2a0 T pci_intr_disestablish +ffffffff8230d2c0 T pci_init_extents +ffffffff8230d4a0 T pci_probe_device_hook +ffffffff8230d4e0 T pci_dev_postattach +ffffffff8230d4f0 T pci_min_powerstate +ffffffff8230d500 T pci_set_powerstate_md +ffffffff8230e000 T pciide_machdep_compat_intr_establish +ffffffff8230e060 T pciide_machdep_compat_intr_disestablish +ffffffff8230f000 T vga_post_init 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fxp_cardbus_detach +ffffffff8231c2d0 T fxp_cardbus_setup +ffffffff8231d000 t rl_cardbus_match +ffffffff8231d030 t rl_cardbus_attach +ffffffff8231d1d0 t rl_cardbus_detach +ffffffff8231d290 T rl_cardbus_setup +ffffffff8231e000 T re_cardbus_probe +ffffffff8231e030 T re_cardbus_attach +ffffffff8231e230 T re_cardbus_detach +ffffffff8231e310 T re_cardbus_setup +ffffffff8231f000 T ath_cardbus_match +ffffffff8231f050 T ath_cardbus_attach +ffffffff8231f180 T ath_cardbus_detach +ffffffff8231f250 T ath_cardbus_enable +ffffffff8231f320 T ath_cardbus_disable +ffffffff8231f370 T ath_cardbus_power +ffffffff8231f3b0 T ath_cardbus_setup +ffffffff82320000 T athn_cardbus_match +ffffffff82320030 T athn_cardbus_attach +ffffffff82320170 T athn_cardbus_detach +ffffffff82320210 T athn_cardbus_enable +ffffffff823202e0 T athn_cardbus_disable +ffffffff82320330 T athn_cardbus_power +ffffffff82320370 T athn_cardbus_read +ffffffff823203a0 T athn_cardbus_write +ffffffff823203d0 T athn_cardbus_write_barrier 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acx_cardbus_match +ffffffff82324030 T acx_cardbus_attach +ffffffff82324260 T acx_cardbus_detach +ffffffff82324380 T acx_cardbus_enable +ffffffff82324450 T acx_cardbus_disable +ffffffff823244a0 T acx_cardbus_power +ffffffff823244e0 T acx_cardbus_setup +ffffffff82325000 T pgt_cardbus_match +ffffffff82325030 T pgt_cardbus_attach +ffffffff82325230 T pgt_cardbus_detach +ffffffff823252e0 T pgt_cardbus_enable +ffffffff82325440 T pgt_cardbus_disable +ffffffff82325490 T pgt_cardbus_power +ffffffff823254f0 T pgt_cardbus_setup +ffffffff82326000 T ehci_cardbus_match +ffffffff82326040 T ehci_cardbus_attach +ffffffff823262e0 T ehci_cardbus_detach +ffffffff82327000 T ohci_cardbus_match +ffffffff82327040 T ohci_cardbus_attach +ffffffff823272d0 T ohci_cardbus_detach +ffffffff82328000 T uhci_cardbus_match +ffffffff82328040 T uhci_cardbus_attach +ffffffff82328350 T uhci_cardbus_detach +ffffffff82329000 T malo_cardbus_match +ffffffff82329030 T malo_cardbus_attach +ffffffff82329270 T malo_cardbus_detach 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pcmcia_function_init +ffffffff8232c8d0 T pcmcia_function_enable +ffffffff8232cd00 T pcmcia_function_disable +ffffffff8232ce20 T pcmcia_io_map +ffffffff8232d060 T pcmcia_intr_establish +ffffffff8232d2d0 T pcmcia_card_intr +ffffffff8232d3f0 T pcmcia_intr_disestablish +ffffffff8232d610 T pcmcia_intr_string +ffffffff8232e000 T pcmcia_cis_read_1 +ffffffff8232e0f0 T pcmcia_read_cis +ffffffff8232e1e0 T pcmcia_scan_cis +ffffffff8232fcc0 T pcmcia_parse_cis_tuple +ffffffff82330e60 T pcmcia_print_cis +ffffffff82332000 T pcmcia_check_cis_quirks +ffffffff82333000 T ep_pcmcia_match +ffffffff82333110 T ep_pcmcia_attach +ffffffff82333560 T ep_pcmcia_detach +ffffffff82333600 T ep_pcmcia_activate +ffffffff823336e0 T ep_pcmcia_lookup +ffffffff823337f0 T ep_pcmcia_enable1 +ffffffff823338a0 T ep_pcmcia_get_enaddr +ffffffff82334000 T ne_pcmcia_match +ffffffff82334140 T ne_pcmcia_attach +ffffffff82334760 T ne_pcmcia_detach +ffffffff82334820 T ne_pcmcia_activate +ffffffff82334910 T ne_pcmcia_get_enaddr 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sm_pcmcia_funce_enaddr +ffffffff82338470 T sm_pcmcia_ascii_enaddr +ffffffff82338570 T sm_pcmcia_lannid_ciscallback +ffffffff82338680 T sm_pcmcia_enable +ffffffff82338720 T sm_pcmcia_disable +ffffffff82339000 T xe_pcmcia_match +ffffffff82339050 T xe_pcmcia_attach +ffffffff823397a0 T xe_pcmcia_detach +ffffffff82339860 T xe_pcmcia_activate +ffffffff82339b50 T xe_pcmcia_interpret_manfid +ffffffff82339bf0 T xe_pcmcia_funce_enaddr +ffffffff82339c10 T xe_ioctl +ffffffff82339f70 T xe_start +ffffffff8233a210 T xe_watchdog +ffffffff8233a250 T xe_intr +ffffffff8233a620 T xe_full_reset +ffffffff8233abf0 T xe_mdi_read +ffffffff8233b580 T xe_mdi_write +ffffffff8233be90 T xe_statchg +ffffffff8233bec0 T xe_mediachange +ffffffff8233bf50 T xe_mediastatus +ffffffff8233bfb0 T xe_init +ffffffff8233c010 T xe_stop +ffffffff8233c140 T xe_reset +ffffffff8233c2b0 T xe_pcmcia_lan_nid_ciscallback +ffffffff8233c400 T xe_pcmcia_manfid_ciscallback +ffffffff8233c520 T xe_get +ffffffff8233c7f0 T xe_set_address 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cmalo_fw_free +ffffffff82340590 T cmalo_cmd_set_macctrl +ffffffff823406f0 T cmalo_cmd_set_txpower +ffffffff82340850 T cmalo_cmd_set_antenna +ffffffff823409c0 T cmalo_cmd_set_radio +ffffffff82340b20 T cmalo_cmd_set_channel +ffffffff82340c80 T cmalo_cmd_set_rate +ffffffff82340e00 T cmalo_cmd_set_snmp +ffffffff82340f90 T cmalo_cmd_set_macaddr +ffffffff823410f0 T cmalo_wep +ffffffff823411a0 T cmalo_cmd_set_reset +ffffffff823412a0 T cmalo_select_network +ffffffff823413a0 T cmalo_cmd_set_auth +ffffffff82341460 T cmalo_cmd_set_assoc +ffffffff823417c0 T cmalo_reflect_network +ffffffff823418b0 T cmalo_tx_done +ffffffff82341970 T cmalo_rx +ffffffff82341b70 T cmalo_cmd_response +ffffffff82341d90 T cmalo_event +ffffffff82341e00 T cmalo_tx +ffffffff82341fe0 T cmalo_cmd_set_wep +ffffffff82342230 T cmalo_rate2bitmap +ffffffff82342270 T cmalo_hexdump +ffffffff823422a0 T cmalo_cmd_request +ffffffff82342400 T cmalo_cmd_rsp_hwspec +ffffffff82342470 T cmalo_cmd_rsp_scan +ffffffff82342680 T cmalo_parse_elements +ffffffff82342780 T cmalo_cmd_rsp_assoc +ffffffff823427c0 T cmalo_cmd_set_80211d +ffffffff823428c0 T cmalo_cmd_set_bgscan_config +ffffffff82342a20 T cmalo_cmd_set_bgscan_query +ffffffff82343000 T an_pcmcia_match +ffffffff82343060 T an_pcmcia_attach +ffffffff82343250 T an_pcmcia_detach +ffffffff823432e0 T an_pcmcia_activate +ffffffff82344000 T pcibmatch +ffffffff823440d0 T pcibattach +ffffffff82344110 T pcib_callback +ffffffff82344190 T pcib_print +ffffffff82345000 T amdpcib_match +ffffffff82345050 T amdpcib_attach +ffffffff82345180 T amdpcib_get_timecount +ffffffff82346000 T tcpcib_match +ffffffff82346050 T tcpcib_attach +ffffffff82346310 T tcpcib_activate +ffffffff823465c0 T tcpcib_wdt_init +ffffffff823466f0 T tcpcib_wdt_start +ffffffff82346720 T tcpcib_wdt_stop +ffffffff823467a0 T tcpcib_hpet_get_timecount +ffffffff823467d0 T tcpcib_wdt_cb +ffffffff82347000 T aapic_match +ffffffff82347040 T aapic_attach +ffffffff82347120 t __llvm_retpoline_r11 +ffffffff82348000 T hme_config +ffffffff82348580 T hme_stop +ffffffff82348790 T hme_start +ffffffff82348aa0 T hme_ioctl +ffffffff82348c50 T hme_watchdog +ffffffff82348cb0 t hme_mii_readreg +ffffffff82348e30 t hme_mii_writereg +ffffffff82348fb0 t hme_mii_statchg +ffffffff82349030 T hme_mediachange +ffffffff82349120 T hme_mediastatus +ffffffff82349190 T hme_mifinit +ffffffff82349250 T hme_tick +ffffffff82349380 T hme_unconfig +ffffffff82349470 T hme_fill_rx_ring +ffffffff82349610 T hme_reset +ffffffff82349650 T hme_init +ffffffff82349b90 T hme_meminit +ffffffff82349d10 T hme_iff +ffffffff82349ec0 T hme_tint +ffffffff8234a010 T hme_rint +ffffffff8234a1e0 T hme_eint +ffffffff8234a290 T hme_intr +ffffffff8234a390 T hme_newbuf +ffffffff8234b000 T hmematch_pci +ffffffff8234b040 T hmeattach_pci +ffffffff8234b310 T hmedetach_pci +ffffffff8234b390 T hme_pci_enaddr +ffffffff8234c000 T isamatch +ffffffff8234c050 T isaattach +ffffffff8234c180 T isascan +ffffffff8234c5a0 T isaprint +ffffffff8234c760 T isa_intr_typename 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uguru_refresh_temp +ffffffff823610d0 T uguru_refresh_volt +ffffffff82361180 T uguru_refresh_fan +ffffffff82361250 T uguru_match +ffffffff823613e0 T uguru_attach +ffffffff82361970 T uguru_read_multi +ffffffff82361a50 T uguru_ac5_read +ffffffff82361cc0 T uguru_read_sensor +ffffffff82361fe0 T uguru_ac5_read_sensor +ffffffff82362070 T uguru_refresh +ffffffff82362100 T uguru_write_multi +ffffffff82363000 T aps_match +ffffffff82363100 T aps_attach +ffffffff82363380 T aps_activate +ffffffff82363420 T aps_do_io +ffffffff823635f0 T aps_init +ffffffff82363750 T aps_refresh +ffffffff82363780 T aps_read_data +ffffffff82363860 T aps_refresh_sensor_data +ffffffff82364000 T _isa_bus_dmamap_create +ffffffff82364160 T _isa_bus_dmamap_destroy +ffffffff82364220 T _isa_bus_dmamap_load +ffffffff823644c0 T _isa_bus_dmamap_load_mbuf +ffffffff823644e0 T _isa_bus_dmamap_load_uio +ffffffff82364500 T _isa_bus_dmamap_load_raw +ffffffff82364520 T _isa_bus_dmamap_unload +ffffffff823645e0 T _isa_bus_dmamap_sync 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wstpad_mt_masks +ffffffff8237a1b0 T wstpad_touch_inputs +ffffffff8237a3b0 T wstpad_process_input +ffffffff8237a670 T wstpad_track_interval +ffffffff8237a910 T wstpad_init_deceleration +ffffffff8237a9e0 T wstpad_decelerate +ffffffff8237ab50 T wstpad_filter +ffffffff8237ae20 T wstpad_compat_convert +ffffffff8237aec0 T wstpad_init +ffffffff8237b030 T wstpad_configure +ffffffff8237b770 T wstpad_reset +ffffffff8237b7f0 T wstpad_cleanup +ffffffff8237b880 T wstpad_set_param +ffffffff8237bb60 T wstpad_get_param +ffffffff8237c000 T wsmux_mux_open +ffffffff8237c120 T wsmux_mux_close +ffffffff8237c1e0 T wsmux_do_ioctl +ffffffff8237c810 T wsmux_do_displayioctl +ffffffff8237c930 T wsmux_evsrc_set_display +ffffffff8237c980 T wsmuxattach +ffffffff8237c9b0 T wsmux_getmux +ffffffff8237cbf0 T wsmux_create +ffffffff8237ccc0 T wsmuxopen +ffffffff8237ce20 T wsmux_detach_sc +ffffffff8237cf30 T wsmux_do_open +ffffffff8237d020 T wsmuxclose +ffffffff8237d120 T wsmux_do_close +ffffffff8237d1c0 T wsmuxread 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T acpiprt_getpcibus +ffffffff824f61e0 T acpiprt_prt_add +ffffffff824f6650 T acpiprt_getirq +ffffffff824f6750 T acpiprt_chooseirq +ffffffff824f6900 T acpiprt_route_interrupt +ffffffff824f7000 T acpidmar_match +ffffffff824f7080 T acpidmar_attach +ffffffff824f7140 T acpidmar_activate +ffffffff824f7380 T dmar_bdf +ffffffff824f7400 T domain_map_check +ffffffff824f7580 T acpidmar_pci_attach +ffffffff824f7650 T dmar_ptmap +ffffffff824f76d0 T domain_map_pthru +ffffffff824f7750 T domain_map_page_intel +ffffffff824f78d0 T iommu_flush_cache +ffffffff824f7920 T iommu_alloc_page +ffffffff824f79c0 T pte_lvl +ffffffff824f7ae0 T domain_map_page_amd +ffffffff824f7bb0 T domain_unload_map +ffffffff824f7dc0 T dom_bdf +ffffffff824f7e90 T domain_load_map +ffffffff824f80f0 T iommu_enable_translation +ffffffff824f8380 T iommu_flush_tlb +ffffffff824f8510 T iommu_flush_write_buffer +ffffffff824f8680 T iommu_set_rtaddr +ffffffff824f87b0 T iommu_write_8 +ffffffff824f87e0 T iommu_write_4 +ffffffff824f8810 T iommu_read_4 +ffffffff824f8830 T iommu_alloc_hwdte +ffffffff824f8980 T iommu_issue_qi +ffffffff824f89b0 T iommu_flush_tlb_qi +ffffffff824f89e0 T iommu_flush_ctx_qi +ffffffff824f8a10 T ivhd_invalidate_domain +ffffffff824f8a70 T iommu_read_8 +ffffffff824f8a90 T iommu_flush_ctx +ffffffff824f8bb0 T iommu_enable_qi +ffffffff824f8cd0 T iommu_showcfg +ffffffff824f8ef0 T iommu_init +ffffffff824f9230 T acpidmar_intr_establish +ffffffff824f9340 T acpidmar_intr +ffffffff824f94e0 T acpidmar_match_devscope +ffffffff824f9620 T domain_create +ffffffff824f9860 t dmar_dmamap_create +ffffffff824f9880 t dmar_dmamap_destroy +ffffffff824f9890 t dmar_dmamap_load +ffffffff824f9900 t dmar_dmamap_load_mbuf +ffffffff824f9960 t dmar_dmamap_load_uio +ffffffff824f99c0 t dmar_dmamap_load_raw +ffffffff824f9a30 t dmar_dmamap_unload +ffffffff824f9a60 t dmar_dmamap_sync +ffffffff824f9a80 t dmar_dmamem_alloc +ffffffff824f9aa0 t dmar_dmamem_free +ffffffff824f9ac0 t dmar_dmamem_map +ffffffff824f9ae0 t dmar_dmamem_unmap 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asmc_activate +ffffffff82500650 T asmc_try +ffffffff82500a30 T asmc_get_backlight +ffffffff82500ab0 T asmc_set_backlight +ffffffff82500b40 T asmc_backlight +ffffffff82500bd0 T asmc_init +ffffffff82500dd0 T asmc_update +ffffffff82500f80 T asmc_detach +ffffffff82501150 t asmc_temp +ffffffff825012d0 t asmc_fan +ffffffff825014a0 t asmc_light +ffffffff82502000 T acpiasus_match +ffffffff82502030 T acpiasus_attach +ffffffff82502150 T acpiasus_activate +ffffffff825022e0 T acpiasus_init +ffffffff825023c0 T acpiasus_notify +ffffffff82503000 T thinkpad_match +ffffffff825030b0 T thinkpad_attach +ffffffff825032d0 T thinkpad_activate +ffffffff82503450 T thinkpad_sensor_attach +ffffffff825035c0 T thinkpad_get_temp +ffffffff82503650 T thinkpad_sensor_refresh +ffffffff825037d0 T thinkpad_get_volume_mute +ffffffff82503840 T thinkpad_attach_deferred +ffffffff82503860 T thinkpad_enable_events +ffffffff82503a30 T thinkpad_get_kbd_backlight +ffffffff82503ac0 T thinkpad_set_kbd_backlight +ffffffff82503ba0 T thinkpad_get_param +ffffffff82503c00 T thinkpad_set_param +ffffffff82503cc0 T thinkpad_hotkey +ffffffff825042f0 T thinkpad_brightness_up +ffffffff82504490 T thinkpad_brightness_down +ffffffff82504640 T thinkpad_toggle_bluetooth +ffffffff82504760 T thinkpad_volume_mute +ffffffff82504810 T thinkpad_volume_down +ffffffff825048c0 T thinkpad_volume_up +ffffffff82504970 T thinkpad_get_thinklight +ffffffff825049c0 T thinkpad_adaptive_change +ffffffff82504ae0 T thinkpad_get_brightness +ffffffff82504b20 T thinkpad_toggle_wan +ffffffff82504c40 T thinkpad_cmos +ffffffff82504cf0 T thinkpad_set_brightness +ffffffff82504de0 T thinkpad_set_thinklight +ffffffff82505000 T toshiba_match +ffffffff825050a0 T toshiba_attach +ffffffff82505180 T get_param_brightness +ffffffff825051e0 T acpitoshiba_get_param +ffffffff82505240 T set_param_brightness +ffffffff825052d0 T toshiba_update_brightness +ffffffff825053d0 T acpitoshiba_set_param +ffffffff82505470 T toshiba_set_brightness +ffffffff82505590 T toshiba_enable_events +ffffffff82505620 T toshiba_read_events +ffffffff82505780 T toshiba_hotkey +ffffffff825059b0 T toshiba_get_brightness +ffffffff82505b20 T toshiba_fn_key_brightness_up +ffffffff82505c70 T toshiba_fn_key_brightness_down +ffffffff82505dc0 T toshiba_fn_key_video_output +ffffffff82505f10 T toshiba_get_video_output +ffffffff82506080 T toshiba_set_video_output +ffffffff82507000 T acpisony_match +ffffffff82507070 T acpisony_attach +ffffffff825070e0 T acpisony_activate +ffffffff82507120 T acpisony_notify_setup +ffffffff82507310 T acpisony_notify +ffffffff825076c0 T acpisony_find_offset +ffffffff825077d0 T acpisony_set_hotkey +ffffffff825079c0 T acpisony_brightness_down +ffffffff82507ad0 T acpisony_get_brightness +ffffffff82507b50 T acpisony_set_brightness +ffffffff82508000 T acpivideo_match +ffffffff82508070 T acpivideo_attach +ffffffff825081d0 T acpivideo_getpcibus +ffffffff82508210 T acpivideo_notify +ffffffff82508270 T acpivideo_set_policy +ffffffff82508340 T acpi_foundvout +ffffffff82508410 T acpivideo_print +ffffffff82509000 T acpivout_match +ffffffff82509070 T acpivout_attach +ffffffff825091c0 T acpivout_notify +ffffffff82509270 T acpivout_get_bcl +ffffffff82509390 T acpivout_get_brightness +ffffffff82509430 T acpivout_get_param +ffffffff825094e0 T acpivout_set_param +ffffffff82509650 T acpivout_select_brightness +ffffffff82509720 T acpivout_find_brightness +ffffffff825097b0 T acpivout_set_brightness +ffffffff8250a000 T acpipwrres_match +ffffffff8250a070 T acpipwrres_attach +ffffffff8250a2b0 T acpipwrres_foundcons +ffffffff8250a440 T acpipwrres_ref_incr +ffffffff8250a4d0 T acpipwrres_hascons +ffffffff8250a520 T acpipwrres_ref_decr +ffffffff8250a5b0 T acpipwrres_addcons +ffffffff8250b000 T aibs_match +ffffffff8250b030 T aibs_attach +ffffffff8250b140 T aibs_probe +ffffffff8250b2a0 T aibs_attach_new +ffffffff8250b3c0 T aibs_attach_sif +ffffffff8250b590 T aibs_notify +ffffffff8250b600 T aibs_add_sensor +ffffffff8250b850 T aibs_getpack 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+ffffffff8250e7e0 T chvgpio_intr_disable +ffffffff8250e8b0 T chvgpio_opreg_handler +ffffffff8250e940 T chvgpio_check_pin +ffffffff8250f000 T glkgpio_match +ffffffff8250f060 T glkgpio_attach +ffffffff8250f300 T glkgpio_intr +ffffffff8250f440 T glkgpio_read_pin +ffffffff8250f4a0 T glkgpio_write_pin +ffffffff8250f510 T glkgpio_intr_establish +ffffffff8250f630 T glkgpio_intr_enable +ffffffff8250f6c0 T glkgpio_intr_disable +ffffffff82510000 T pchgpio_match +ffffffff82510060 T pchgpio_attach +ffffffff825104b0 T pchgpio_activate +ffffffff82510560 T pchgpio_intr +ffffffff82510780 T pchgpio_read_pin +ffffffff82510870 T pchgpio_write_pin +ffffffff82510980 T pchgpio_intr_establish +ffffffff82510bb0 T pchgpio_intr_enable +ffffffff82510cf0 T pchgpio_intr_disable +ffffffff82510e30 T pchgpio_save +ffffffff82510ea0 T pchgpio_restore +ffffffff82510f10 T pchgpio_find_group +ffffffff82510f90 T pchgpio_intr_handle +ffffffff82511070 T pchgpio_save_pin +ffffffff82511240 T pchgpio_restore_pin +ffffffff82512000 T tipmic_match +ffffffff82512050 T tipmic_attach +ffffffff82512250 T tipmic_write_1 +ffffffff82512310 T tipmic_intr +ffffffff82512470 T tipmic_get_lpat +ffffffff825125a0 T tipmic_read_pin +ffffffff825125d0 T tipmic_write_pin +ffffffff82512600 T tipmic_thermal_opreg_handler +ffffffff82512e70 T tipmic_power_opreg_handler +ffffffff82513110 T tipmic_read_1 +ffffffff825131d0 T tipmic_raw_to_temp +ffffffff82514000 T ccpmic_match +ffffffff82514050 T ccpmic_attach +ffffffff82514130 T ccpmic_get_lpat +ffffffff82514250 T ccpmic_read_pin +ffffffff825143d0 T ccpmic_write_pin +ffffffff82514530 T ccpmic_thermal_opreg_handler +ffffffff82514770 T ccpmic_power_opreg_handler +ffffffff82514960 T ccpmic_read_1 +ffffffff82514a20 T ccpmic_write_1 +ffffffff82514ae0 T ccpmic_raw_to_temp +ffffffff82515000 T com_acpi_match +ffffffff82515120 T com_acpi_attach +ffffffff825153a0 T com_acpi_is_designware +ffffffff82515400 T com_acpi_intr_designware +ffffffff82515430 T com_acpi_is_console +ffffffff82516000 T sdhc_acpi_match +ffffffff82516060 T sdhc_acpi_attach +ffffffff82516360 T sdhc_acpi_parse_resources +ffffffff82516420 T sdhc_acpi_card_detect_gpio +ffffffff82516480 T sdhc_acpi_card_detect_intr +ffffffff825164c0 T sdhc_acpi_power_on +ffffffff82516540 T sdhc_acpi_explore +ffffffff82516570 T sdhc_acpi_card_detect_nonremovable +ffffffff825165a0 T sdhc_acpi_do_explore +ffffffff82517000 T dwiic_acpi_match +ffffffff82517050 T dwiic_acpi_attach +ffffffff82517410 T dwiic_acpi_parse_crs +ffffffff82517540 T dwiic_acpi_power +ffffffff82517650 T dwiic_acpi_get_params +ffffffff82517790 T dwiic_i2c_intr_establish +ffffffff82517810 T dwiic_i2c_intr_disestablish +ffffffff82517830 T dwiic_i2c_intr_string +ffffffff825178c0 T dwiic_acpi_acquire_bus +ffffffff82517910 T dwiic_acpi_release_bus +ffffffff82517940 T dwiic_acpi_bus_scan +ffffffff82517980 T dwiic_acpi_found_hid +ffffffff82517cb0 T dwiic_matchhids +ffffffff82517d40 T dwiic_acpi_found_ihidev +ffffffff82517fc0 T dwiic_acpi_found_iatp +ffffffff82519000 T acpicbkbd_match +ffffffff82519030 T acpicbkbd_attach +ffffffff825190d0 T acpicbkbd_activate +ffffffff82519120 T acpicbkbd_get_backlight +ffffffff825191a0 T acpicbkbd_set_backlight +ffffffff82519240 T acpicbkbd_write_backlight +ffffffff8251a000 T acpials_match +ffffffff8251a090 T acpials_attach +ffffffff8251a230 T acpials_read +ffffffff8251a2b0 T acpials_addtask +ffffffff8251a2f0 T acpials_notify +ffffffff8251a380 T acpials_update +ffffffff8251b000 T tpm_match +ffffffff8251b050 T tpm_attach +ffffffff8251b320 T tpm_activate +ffffffff8251b430 T tpm2_start_method +ffffffff8251b4b0 T tpm_probe +ffffffff8251b560 T tpm_init_tis +ffffffff8251b7d0 T tpm_init_crb +ffffffff8251bb10 T tpm_suspend +ffffffff8251bc00 T tpm_resume +ffffffff8251bc30 T tpm_write_tis +ffffffff8251bfb0 T tpm_read_tis +ffffffff8251c190 T tpm_write_crb +ffffffff8251c5a0 T tpm_read_crb +ffffffff8251c8a0 T tpm_request_locality_tis +ffffffff8251c990 T tpm_request_locality_crb +ffffffff8251ca90 T tpm_release_locality_crb +ffffffff8251cae0 T tpm_release_locality_tis +ffffffff8251cb50 T tpm_getburst +ffffffff8251cc00 T tpm_status +ffffffff8251cc20 T tpm_waitfor +ffffffff8251cd00 T tpm_waitfor_status +ffffffff8251d000 T acpihve_match +ffffffff8251d0b0 T acpihve_attach +ffffffff8251e000 T acpisbs_match +ffffffff8251e030 T acpisbs_attach +ffffffff8251e2a0 T acpisbs_activate +ffffffff8251e380 T acpisbs_read +ffffffff8251e440 T acpisbs_setup_sensors +ffffffff8251e560 T acpisbs_refresh_sensors +ffffffff8251e6d0 T acpisbs_notify +ffffffff8251e810 T acpi_smbus_read +ffffffff8251f000 T surface_match +ffffffff8251f060 T surface_attach +ffffffff8251f0c0 T surface_hotkey +ffffffff82520000 T ipmi_acpi_match +ffffffff82520030 T ipmi_acpi_attach +ffffffff82520260 T ipmi_acpi_parse_crs +ffffffff82521000 T amdgpio_match +ffffffff82521060 T amdgpio_attach +ffffffff825212a0 T amdgpio_activate +ffffffff82521390 T amdgpio_intr +ffffffff82521530 T amdgpio_read_pin +ffffffff82521580 T amdgpio_write_pin +ffffffff825215f0 T amdgpio_intr_establish +ffffffff825216e0 T amdgpio_intr_enable +ffffffff82521760 T amdgpio_intr_disable +ffffffff825217e0 T amdgpio_save +ffffffff82521860 T amdgpio_restore +ffffffff825218f0 T amdgpio_save_pin +ffffffff82521960 T amdgpio_restore_pin +ffffffff825219d0 T amdgpio_pin_intr +ffffffff82522000 T acpihid_match +ffffffff82522030 T acpihid_attach +ffffffff82522210 T acpihid_init_dsm +ffffffff82522370 T acpihid_eval +ffffffff82522590 T acpihid_notify +ffffffff825225f0 T acpihid_button_array_enable +ffffffff82523000 t iosf_acpi_match +ffffffff82523050 t iosf_acpi_attach +ffffffff82523140 t iosf_acpi_mbi_mdr_rd +ffffffff825231b0 t iosf_acpi_mbi_mdr_wr +ffffffff82524000 T acpi_match +ffffffff82524060 T acpi_attach +ffffffff825240a0 T acpi_probe +ffffffff82524240 T acpi_map +ffffffff82524330 T acpi_unmap +ffffffff82524380 T acpi_bus_space_map +ffffffff825243a0 T acpi_bus_space_unmap +ffffffff825243c0 T acpi_intr_establish +ffffffff82524510 T acpi_intr_disestablish +ffffffff82524520 T acpi_scan +ffffffff825246d0 T acpi_acquire_glk +ffffffff82524730 T acpi_release_glk +ffffffff82524780 T acpi_attach_machdep +ffffffff82524910 T acpi_sleep_cpu +ffffffff82524ad0 T acpi_resume_cpu +ffffffff82524bd0 T sleep_mp +ffffffff82524cd0 T resume_mp +ffffffff82524dc0 T acpi_iommu_device_map +ffffffff82525000 T hibernate_resume_machdep +ffffffff82525050 T hibernate_drop_to_real_mode +ffffffff82525060 T hibernate_activate_resume_pt_machdep +ffffffff825250a0 T hibernate_switch_stack_machdep +ffffffff825250e0 T hibernate_flush +ffffffff82525110 T acpi_savecpu +ffffffff82526000 T sleep_showstate +ffffffff82526100 T sleep_setstate +ffffffff82526160 T gosleep +ffffffff82526220 T sleep_abort +ffffffff82526250 T sleep_resume +ffffffff825262c0 T suspend_finish +ffffffff82527000 T acpipci_match +ffffffff82527030 T acpipci_attach +ffffffff825272f0 T acpipci_osc +ffffffff82527430 T acpipci_parse_resources +ffffffff82527540 T acpipci_attach_bus +ffffffff82527710 T acpipci_print +ffffffff82527780 T acpipci_attach_busses +ffffffff82528000 T efiopen +ffffffff82528040 T eficlose +ffffffff82528070 T efiioctl +ffffffff82528110 T efiioc_get_table +ffffffff82528270 T efiioc_var_get +ffffffff825284f0 T efiioc_var_next +ffffffff82528710 T efiioc_var_set +ffffffff825289c0 T efi_adapt_error +ffffffff82529000 T efi_match +ffffffff82529060 T efi_attach +ffffffff82529420 T efi_map_runtime +ffffffff825295a0 T efi_enter +ffffffff82529630 T efi_leave +ffffffff82529690 T efi_gettime +ffffffff82529860 T efi_settime +ffffffff825299c0 T efi_fault +ffffffff8252a000 T vmm_probe +ffffffff8252a050 T vmm_attach +ffffffff8252a170 T vmm_activate +ffffffff8252a2b0 T vmmopen +ffffffff8252a300 T vmmclose +ffffffff8252a330 T vm_find +ffffffff8252a450 T vmmioctl +ffffffff8252a6b0 T vm_create +ffffffff8252aa60 T vm_get_info +ffffffff8252acb0 T vm_terminate +ffffffff8252ae20 T vm_resetcpu +ffffffff8252af40 T pledge_ioctl_vmm +ffffffff8252b010 T vm_find_vcpu +ffffffff8252b070 T vm_create_check_mem_ranges +ffffffff8252b1d0 T vm_teardown +ffffffff8252b300 T vcpu_must_stop +ffffffff8252c000 T vmm_enabled +ffffffff8252c090 T vmm_attach_machdep +ffffffff8252c250 T vmm_quiesce_vmx +ffffffff8252c420 T vmm_activate_machdep +ffffffff8252c550 T vmm_stop +ffffffff8252c6a0 T vmm_start +ffffffff8252c790 T vmmioctl_machdep +ffffffff8252c860 T vm_intr_pending +ffffffff8252c900 T vm_mprotect_ept +ffffffff8252cba0 T pledge_ioctl_vmm_machdep +ffffffff8252cbf0 T vm_rwvmparams +ffffffff8252cd80 T vmm_init_pvclock +ffffffff8252ce60 T vm_rwregs +ffffffff8252cf70 T vcpu_readregs_vmx +ffffffff8252d3a0 T vcpu_writeregs_vmx +ffffffff8252d810 T vcpu_readregs_svm +ffffffff8252dcc0 T vcpu_writeregs_svm +ffffffff8252e190 T vmm_get_guest_memtype +ffffffff8252e210 T vmx_mprotect_ept +ffffffff8252e490 T vmx_pmap_find_pte_ept +ffffffff8252e560 T start_vmm_on_cpu +ffffffff8252e640 T stop_vmm_on_cpu +ffffffff8252e6e0 T vmclear_on_cpu +ffffffff8252e760 T vm_impl_init_vmx +ffffffff8252e880 T vm_impl_init_svm +ffffffff8252e9a0 T vm_impl_init +ffffffff8252ea40 T vm_impl_deinit +ffffffff8252ea70 T vcpu_reload_vmcs_vmx +ffffffff8252ebb0 T vcpu_reset_regs_svm +ffffffff8252ef40 T svm_setmsrbrw +ffffffff8252f0b0 T svm_setmsrbr +ffffffff8252f180 T vmm_alloc_vpid +ffffffff8252f290 T svm_setmsrbw +ffffffff8252f370 T vmx_setmsrbr +ffffffff8252f420 T vmx_setmsrbw +ffffffff8252f4d0 T vmx_setmsrbrw +ffffffff8252f5e0 T svm_set_clean +ffffffff8252f630 T svm_set_dirty +ffffffff8252f680 T vcpu_reset_regs_vmx +ffffffff82530230 T vcpu_vmx_check_cap +ffffffff82530330 T vcpu_vmx_compute_ctrl +ffffffff82530510 T vcpu_init_vmx +ffffffff825308b0 T vcpu_deinit_vmx +ffffffff82530a30 T vcpu_reset_regs +ffffffff82530a70 T vcpu_init_svm +ffffffff82530c00 T vcpu_deinit_svm +ffffffff82530d40 T vcpu_init +ffffffff82530e00 T vmm_free_vpid +ffffffff82530e70 T vcpu_deinit +ffffffff82530eb0 T vm_run +ffffffff82531060 T vcpu_run_vmx +ffffffff825317e0 T vcpu_run_svm +ffffffff82531d90 T vmm_fpurestore +ffffffff82531e60 T vmm_fpusave +ffffffff82531ee0 T vmm_translate_gva +ffffffff82532200 T vmm_update_pvclock +ffffffff82532300 T vmx_get_exit_info +ffffffff82532360 T vmx_handle_exit +ffffffff825327a0 T vmx_instruction_error_decode +ffffffff82532970 T vmm_get_guest_cpu_cpl +ffffffff82532a60 T vmx_handle_intr +ffffffff82532af0 T svm_handle_hlt +ffffffff82532b40 T vmx_handle_hlt +ffffffff82532bf0 T svm_handle_exit +ffffffff82532f10 T svm_handle_np_fault +ffffffff825330c0 T vmm_handle_cpuid +ffffffff82533750 T svm_handle_msr +ffffffff82533a10 T svm_handle_xsetbv +ffffffff82533ab0 T svm_handle_inout +ffffffff82533bd0 T vmm_inject_ud +ffffffff82533c00 T vmm_inject_db +ffffffff82533c30 T vmx_handle_np_fault +ffffffff82533db0 T vmx_handle_inout +ffffffff82533f50 T vmx_handle_cr +ffffffff825341c0 T vmx_handle_rdmsr +ffffffff82534290 T vmx_handle_wrmsr +ffffffff825344f0 T vmx_handle_xsetbv +ffffffff825345c0 T vmm_inject_gp +ffffffff825345f0 T vmx_get_exit_qualification +ffffffff82534650 T vmx_get_guest_faulttype +ffffffff825346f0 T svm_get_guest_faulttype +ffffffff82534720 T svm_fault_page +ffffffff825347b0 T vmx_fault_page +ffffffff82534910 T vmm_get_guest_cpu_mode +ffffffff82534a10 T vmx_load_pdptes +ffffffff82534c90 T vmx_handle_cr0_write +ffffffff82534ea0 T vmx_handle_cr4_write +ffffffff82534f40 T vmm_handle_xsetbv +ffffffff82534fd0 T vmx_handle_misc_enable_msr +ffffffff82535030 T vmm_pat_is_valid +ffffffff82535110 T vmm_gpa_is_valid +ffffffff82535180 T vmx_exit_reason_decode +ffffffff825351c0 T svm_exit_reason_decode +ffffffff82535fd0 T vcpu_state_decode +ffffffff82537000 T vmm_dispatch_intr +ffffffff82537020 T vmxon +ffffffff82537050 T vmxoff +ffffffff82537080 T vmclear +ffffffff825370b0 T vmptrld +ffffffff825370e0 T vmptrst +ffffffff82537110 T vmwrite +ffffffff82537140 T vmread +ffffffff82537170 T invvpid +ffffffff825371a0 T invept +ffffffff825371d0 T vmx_enter_guest +ffffffff825371fb t skip_init +ffffffff825372c8 t no_l1df_msr +ffffffff825372cb t l1df_tlb_loop +ffffffff825372e4 t l1df_tlb_done +ffffffff825372ec t l1df_load_cache +ffffffff82537303 t done_flush +ffffffff82537396 t do_resume +ffffffff8253741b t fail_launch_or_resume +ffffffff8253745d t fail_launch_unknown +ffffffff8253746a t fail_launch_invalid_vmcs +ffffffff82537477 t fail_launch_valid_vmcs +ffffffff82537494 t vmx_exit_handler_asm +ffffffff82537559 t restore_host +ffffffff825375f0 T svm_enter_guest +ffffffff82537780 t restore_host_svm +ffffffff82538000 T sdmmc_match +ffffffff82538050 T sdmmc_attach +ffffffff82538390 T sdmmc_detach +ffffffff82538440 T sdmmc_activate +ffffffff82538510 T sdmmc_discover_task +ffffffff825385d0 T sdmmc_create_thread +ffffffff82538640 T sdmmc_holds_root_device +ffffffff825386a0 T sdmmc_task_thread +ffffffff82538890 T sdmmc_needs_discover +ffffffff82538940 T sdmmc_del_task +ffffffff825389f0 T sdmmc_card_detach +ffffffff82538ad0 T sdmmc_add_task +ffffffff82538b50 T sdmmc_card_attach +ffffffff82538c60 T sdmmc_enable +ffffffff82538db0 T sdmmc_scan +ffffffff82538e40 T sdmmc_init +ffffffff82538f40 T sdmmc_disable +ffffffff825390a0 T sdmmc_function_free +ffffffff825390c0 T sdmmc_delay +ffffffff82539110 T sdmmc_select_card +ffffffff82539290 T sdmmc_set_bus_power +ffffffff82539450 T sdmmc_function_alloc +ffffffff825394e0 T sdmmc_app_command +ffffffff82539670 T sdmmc_mmc_command +ffffffff825396f0 T sdmmc_go_idle_state +ffffffff82539810 T sdmmc_send_if_cond +ffffffff82539960 T sdmmc_set_relative_addr +ffffffff8253a000 T sdmmc_cisptr +ffffffff8253a0a0 T sdmmc_read_cis +ffffffff8253a3b0 T sdmmc_print_cis +ffffffff8253a520 T sdmmc_check_cis_quirks +ffffffff8253b000 T sdmmc_io_enable +ffffffff8253b2a0 T sdmmc_io_reset +ffffffff8253b3d0 T sdmmc_io_send_op_cond +ffffffff8253b540 T sdmmc_io_scan +ffffffff8253b690 T sdmmc_io_init +ffffffff8253b7c0 T sdmmc_io_set_highspeed +ffffffff8253ba70 T sdmmc_io_set_bus_width +ffffffff8253bd00 T sdmmc_io_function_ready +ffffffff8253be80 T sdmmc_io_read_1 +ffffffff8253bfd0 T sdmmc_io_function_enable +ffffffff8253c3a0 T sdmmc_io_write_1 +ffffffff8253c520 T sdmmc_io_function_disable +ffffffff8253c7a0 T sdmmc_io_attach +ffffffff8253c890 T sdmmc_print +ffffffff8253cae0 T sdmmc_submatch +ffffffff8253cb60 T sdmmc_io_detach +ffffffff8253cc10 T sdmmc_io_rw_direct +ffffffff8253cdb0 T sdmmc_io_rw_extended_subr +ffffffff8253cf50 T sdmmc_io_rw_extended +ffffffff8253d340 T sdmmc_io_read_2 +ffffffff8253d4a0 T sdmmc_io_write_2 +ffffffff8253d600 T sdmmc_io_read_4 +ffffffff8253d760 T sdmmc_io_write_4 +ffffffff8253d8c0 T sdmmc_io_read_multi_1 +ffffffff8253d9b0 T sdmmc_io_write_multi_1 +ffffffff8253daa0 T sdmmc_io_read_region_1 +ffffffff8253db90 T sdmmc_io_write_region_1 +ffffffff8253dc80 T sdmmc_io_xchg +ffffffff8253de10 T sdmmc_intr_enable +ffffffff8253e080 T sdmmc_intr_disable +ffffffff8253e2f0 T sdmmc_intr_establish +ffffffff8253e3f0 T sdmmc_intr_disestablish +ffffffff8253e4e0 T sdmmc_card_intr +ffffffff8253e530 T sdmmc_intr_task +ffffffff8253e5c0 T sdmmc_io_set_blocklen +ffffffff8253f000 T sdmmc_mem_enable +ffffffff8253f4e0 T sdmmc_mem_send_op_cond +ffffffff8253f690 T sdmmc_mem_signal_voltage +ffffffff8253f750 T sdmmc_mem_scan +ffffffff8253fa60 T sdmmc_decode_csd +ffffffff8253fe70 T sdmmc_decode_cid +ffffffff825402b0 T sdmmc_mem_send_scr +ffffffff825403f0 T sdmmc_mem_decode_scr +ffffffff82540470 T sdmmc_mem_send_cxd_data +ffffffff825405e0 T sdmmc_mem_set_bus_width +ffffffff82540700 T sdmmc_mem_sd_switch +ffffffff825409b0 T sdmmc_be512_to_bitfield512 +ffffffff82540a60 T sdmmc_mem_mmc_switch +ffffffff82540b50 T sdmmc_mem_init +ffffffff82540ca0 T sdmmc_mem_set_blocklen +ffffffff82540da0 T sdmmc_mem_sd_init +ffffffff82541350 T sdmmc_mem_mmc_init +ffffffff82541c70 T sdmmc_mem_select_transfer_mode +ffffffff82541cf0 T sdmmc_mem_execute_tuning +ffffffff82541d80 T sdmmc_mem_read_block_subr +ffffffff825420e0 T sdmmc_mem_single_read_block +ffffffff825421b0 T sdmmc_mem_read_block +ffffffff82542370 T sdmmc_mem_write_block_subr +ffffffff825426c0 T sdmmc_mem_single_write_block +ffffffff82542790 T sdmmc_mem_write_block +ffffffff82542950 T sdmmc_mem_hibernate_write +ffffffff82543000 T sdmmc_scsi_cmd +ffffffff825431f0 T sdmmc_minphys +ffffffff82543270 T sdmmc_scsi_attach +ffffffff82543460 T sdmmc_alloc_ccbs +ffffffff825435a0 T sdmmc_free_ccbs +ffffffff82543600 T sdmmc_scsi_detach +ffffffff82543760 T sdmmc_stimeout +ffffffff825437e0 T sdmmc_ccb_alloc +ffffffff82543890 T sdmmc_ccb_free +ffffffff82543970 T sdmmc_inquiry +ffffffff82543be0 T sdmmc_start_xs +ffffffff82543cd0 T sdmmc_complete_xs +ffffffff82543da0 T sdmmc_done_xs +ffffffff82543df0 T sdmmc_scsi_hibernate_io +ffffffff82544000 T bwfm_sdio_preinit +ffffffff825444f0 T bwfm_sdio_txcheck +ffffffff82544530 T bwfm_sdio_txdata +ffffffff825445a0 T bwfm_sdio_txctl +ffffffff825446f0 T bwfm_sdio_buscore_read +ffffffff82544700 T bwfm_sdio_buscore_write +ffffffff82544720 T bwfm_sdio_buscore_prepare +ffffffff82544860 T bwfm_sdio_buscore_activate +ffffffff825448e0 T bwfm_sdio_match +ffffffff825449b0 T bwfm_sdio_attach +ffffffff82544c70 T bwfm_sdio_detach +ffffffff82544cd0 T bwfm_sdio_task +ffffffff82544e30 T bwfm_sdio_write_1 +ffffffff82544e60 T bwfm_sdio_read_1 +ffffffff82544e90 T bwfm_sdio_write_4 +ffffffff82544f40 T bwfm_sdio_read_4 +ffffffff82544ff0 T bwfm_sdio_load_microcode +ffffffff82545250 T bwfm_sdio_clkctl +ffffffff82545380 T bwfm_sdio_dev_write +ffffffff825453d0 T bwfm_sdio_intr +ffffffff82545410 T bwfm_sdio_ram_read_write +ffffffff82545640 T bwfm_sdio_htclk +ffffffff825458a0 T bwfm_sdio_readshared +ffffffff82545970 T bwfm_sdio_dev_read +ffffffff825459b0 T bwfm_sdio_rx_frames +ffffffff82545d40 T bwfm_sdio_tx_frames +ffffffff82545e20 T bwfm_sdio_backplane +ffffffff82545ed0 T bwfm_sdio_buf_read +ffffffff82545fb0 T bwfm_sdio_buf_write +ffffffff82546060 T bwfm_sdio_frame_read_write +ffffffff825461e0 T bwfm_sdio_newbuf +ffffffff82546260 T bwfm_sdio_tx_ok +ffffffff825462b0 T bwfm_sdio_tx_ctrlframe +ffffffff825463b0 T bwfm_sdio_tx_dataframe +ffffffff82546500 T bwfm_sdio_rx_glom +ffffffff82547000 T onewire_match +ffffffff82547050 T onewire_attach +ffffffff825470f0 T onewire_detach +ffffffff82547160 T onewire_activate +ffffffff82547180 T onewire_scan +ffffffff82547390 T onewire_createthread +ffffffff82547400 T onewire_print +ffffffff825474d0 T onewirebus_print +ffffffff82547520 T onewire_lock +ffffffff82547540 T onewire_unlock +ffffffff82547560 T onewire_reset +ffffffff82547580 T onewire_bit +ffffffff825475a0 T onewire_read_byte +ffffffff825476e0 T onewire_write_byte +ffffffff825477c0 T onewire_read_block +ffffffff82547860 T onewire_write_block +ffffffff82547900 T onewire_triplet +ffffffff825479e0 T onewire_matchrom +ffffffff82547b30 T onewire_search +ffffffff82547ec0 T onewire_thread +ffffffff82548000 T onewire_crc +ffffffff825480e0 T onewire_crc16 +ffffffff825481c0 T onewire_famname +ffffffff82548200 T onewire_matchbyfam +ffffffff82549000 T owid_match +ffffffff82549030 T owid_attach +ffffffff82549100 T owid_detach +ffffffff82549140 T owid_activate +ffffffff8254a000 T owsbm_match +ffffffff8254a030 T owsbm_attach +ffffffff8254a1d0 T owsbm_detach +ffffffff8254a240 T owsbm_activate +ffffffff8254a270 T owsbm_update +ffffffff8254b000 T owtemp_match +ffffffff8254b030 T owtemp_attach +ffffffff8254b130 T owtemp_detach +ffffffff8254b1a0 T owtemp_activate +ffffffff8254b1d0 T owtemp_update +ffffffff8254c000 T owctr_match +ffffffff8254c030 T owctr_attach +ffffffff8254c180 T owctr_detach +ffffffff8254c1f0 T owctr_activate +ffffffff8254c220 T owctr_update +ffffffff8254c250 T owctr_update_counter +ffffffff8254d000 A __text_page_start +ffffffff8254d000 T Xsyscall_meltdown +ffffffff8254d00c T Xsyscall +ffffffff8254d26e t Xsyscall_trampback +ffffffff8254d280 T intr_user_exit +ffffffff8254d2c2 t intr_user_exit_post_ast +ffffffff8254d3ee t Xiretq_trampback +ffffffff8254d3fa T doreti_iret +ffffffff8254e000 T alltraps +ffffffff8254e138 T recall_trap +ffffffff8254e150 T alltraps_kern +ffffffff8254e153 T alltraps_kern_meltdown +ffffffff8254f000 ? Xsyscall32 +ffffffff8254f000 A __kutext_start +ffffffff8254f000 A __text_page_end +ffffffff82550000 ? Xtrap00 +ffffffff82550010 ? Xtrap01 +ffffffff82550020 ? Xtrap02 +ffffffff82550028 c calltrap_specstk +ffffffff825500f0 ? calltrap_specstk_tramp +ffffffff82550110 ? Xtrap03 +ffffffff82550120 ? Xtrap04 +ffffffff82550130 ? Xtrap05 +ffffffff82550140 ? Xtrap06 +ffffffff82550150 ? Xtrap07 +ffffffff82550160 ? Xtrap08 +ffffffff82550170 ? Xtrap09 +ffffffff82550180 ? Xtrap0a +ffffffff82550190 ? Xtrap0b +ffffffff825501a0 ? Xtrap0c +ffffffff825501b0 ? Xtrap0d +ffffffff82550240 ? Xtrap0e +ffffffff82550250 ? Xintrspurious +ffffffff82550250 ? Xtrap0f +ffffffff82550260 ? Xtrap10 +ffffffff82550270 ? Xtrap11 +ffffffff82550280 ? Xtrap12 +ffffffff82550290 ? Xtrap13 +ffffffff825502a0 ? Xtrap14 +ffffffff825502b0 ? Xtrap15 +ffffffff825502c0 ? Xtrap16 +ffffffff825502c0 ? Xtrap17 +ffffffff825502c0 ? Xtrap18 +ffffffff825502c0 ? Xtrap19 +ffffffff825502c0 ? Xtrap1a +ffffffff825502c0 ? Xtrap1b +ffffffff825502c0 ? Xtrap1c +ffffffff825502c0 ? Xtrap1d +ffffffff825502c0 ? Xtrap1e +ffffffff825502c0 ? Xtrap1f +ffffffff825502d0 ? x2apic_eoi +ffffffff825502f0 ? Xintr_lapic_ipi +ffffffff82550330 ? Xipi_invltlb +ffffffff82550360 ? Xipi_invlpg +ffffffff82550390 ? Xipi_invlrange +ffffffff825503d0 ? Xipi_invltlb_pcid +ffffffff82550410 ? Xipi_invlpg_pcid +ffffffff82550460 ? Xipi_invlrange_pcid +ffffffff825504d0 ? Xintr_lapic_ltimer +ffffffff82550510 ? Xintr_xen_upcall +ffffffff82550550 ? Xintr_hyperv_upcall +ffffffff82550590 ? Xintr_legacy0 +ffffffff825505d0 ? Xintr_legacy1 +ffffffff82550610 ? Xintr_legacy2 +ffffffff82550650 ? Xintr_legacy3 +ffffffff82550690 ? Xintr_legacy4 +ffffffff825506d0 ? Xintr_legacy5 +ffffffff82550710 ? Xintr_legacy6 +ffffffff82550750 ? Xintr_legacy7 +ffffffff82550790 ? Xintr_legacy8 +ffffffff825507d0 ? Xintr_legacy9 +ffffffff82550810 ? Xintr_legacy10 +ffffffff82550850 ? Xintr_legacy11 +ffffffff82550890 ? Xintr_legacy12 +ffffffff825508d0 ? Xintr_legacy13 +ffffffff82550910 ? Xintr_legacy14 +ffffffff82550950 ? Xintr_legacy15 +ffffffff82550990 ? Xintr_ioapic_edge0 +ffffffff825509d0 ? Xintr_ioapic_edge1 +ffffffff82550a10 ? Xintr_ioapic_edge2 +ffffffff82550a50 ? Xintr_ioapic_edge3 +ffffffff82550a90 ? Xintr_ioapic_edge4 +ffffffff82550ad0 ? Xintr_ioapic_edge5 +ffffffff82550b10 ? Xintr_ioapic_edge6 +ffffffff82550b50 ? Xintr_ioapic_edge7 +ffffffff82550b90 ? Xintr_ioapic_edge8 +ffffffff82550bd0 ? Xintr_ioapic_edge9 +ffffffff82550c10 ? Xintr_ioapic_edge10 +ffffffff82550c50 ? Xintr_ioapic_edge11 +ffffffff82550c90 ? Xintr_ioapic_edge12 +ffffffff82550cd0 ? Xintr_ioapic_edge13 +ffffffff82550d10 ? Xintr_ioapic_edge14 +ffffffff82550d50 ? Xintr_ioapic_edge15 +ffffffff82550d90 ? Xintr_ioapic_edge16 +ffffffff82550dd0 ? Xintr_ioapic_edge17 +ffffffff82550e10 ? Xintr_ioapic_edge18 +ffffffff82550e50 ? Xintr_ioapic_edge19 +ffffffff82550e90 ? Xintr_ioapic_edge20 +ffffffff82550ed0 ? Xintr_ioapic_edge21 +ffffffff82550f10 ? Xintr_ioapic_edge22 +ffffffff82550f50 ? Xintr_ioapic_edge23 +ffffffff82550f90 ? Xintr_ioapic_edge24 +ffffffff82550fd0 ? Xintr_ioapic_edge25 +ffffffff82551010 ? Xintr_ioapic_edge26 +ffffffff82551050 ? Xintr_ioapic_edge27 +ffffffff82551090 ? Xintr_ioapic_edge28 +ffffffff825510d0 ? Xintr_ioapic_edge29 +ffffffff82551110 ? Xintr_ioapic_edge30 +ffffffff82551150 ? Xintr_ioapic_edge31 +ffffffff82551190 ? Xintr_ioapic_edge32 +ffffffff825511d0 ? Xintr_ioapic_edge33 +ffffffff82551210 ? Xintr_ioapic_edge34 +ffffffff82551250 ? Xintr_ioapic_edge35 +ffffffff82551290 ? Xintr_ioapic_edge36 +ffffffff825512d0 ? Xintr_ioapic_edge37 +ffffffff82551310 ? Xintr_ioapic_edge38 +ffffffff82551350 ? Xintr_ioapic_edge39 +ffffffff82551390 ? Xintr_ioapic_edge40 +ffffffff825513d0 ? Xintr_ioapic_edge41 +ffffffff82551410 ? Xintr_ioapic_edge42 +ffffffff82551450 ? Xintr_ioapic_edge43 +ffffffff82551490 ? Xintr_ioapic_edge44 +ffffffff825514d0 ? Xintr_ioapic_edge45 +ffffffff82551510 ? Xintr_ioapic_edge46 +ffffffff82551550 ? Xintr_ioapic_edge47 +ffffffff82551590 ? Xintr_ioapic_edge48 +ffffffff825515d0 ? Xintr_ioapic_edge49 +ffffffff82551610 ? Xintr_ioapic_edge50 +ffffffff82551650 ? Xintr_ioapic_edge51 +ffffffff82551690 ? Xintr_ioapic_edge52 +ffffffff825516d0 ? Xintr_ioapic_edge53 +ffffffff82551710 ? Xintr_ioapic_edge54 +ffffffff82551750 ? Xintr_ioapic_edge55 +ffffffff82551790 ? Xintr_ioapic_edge56 +ffffffff825517d0 ? Xintr_ioapic_edge57 +ffffffff82551810 ? Xintr_ioapic_edge58 +ffffffff82551850 ? Xintr_ioapic_edge59 +ffffffff82551890 ? Xintr_ioapic_edge60 +ffffffff825518d0 ? Xintr_ioapic_edge61 +ffffffff82551910 ? Xintr_ioapic_edge62 +ffffffff82551950 ? Xintr_ioapic_edge63 +ffffffff82551990 ? Xintr_ioapic_level0 +ffffffff825519d0 ? Xintr_ioapic_level1 +ffffffff82551a10 ? Xintr_ioapic_level2 +ffffffff82551a50 ? Xintr_ioapic_level3 +ffffffff82551a90 ? Xintr_ioapic_level4 +ffffffff82551ad0 ? Xintr_ioapic_level5 +ffffffff82551b10 ? Xintr_ioapic_level6 +ffffffff82551b50 ? Xintr_ioapic_level7 +ffffffff82551b90 ? Xintr_ioapic_level8 +ffffffff82551bd0 ? Xintr_ioapic_level9 +ffffffff82551c10 ? Xintr_ioapic_level10 +ffffffff82551c50 ? Xintr_ioapic_level11 +ffffffff82551c90 ? Xintr_ioapic_level12 +ffffffff82551cd0 ? Xintr_ioapic_level13 +ffffffff82551d10 ? Xintr_ioapic_level14 +ffffffff82551d50 ? Xintr_ioapic_level15 +ffffffff82551d90 ? Xintr_ioapic_level16 +ffffffff82551dd0 ? Xintr_ioapic_level17 +ffffffff82551e10 ? Xintr_ioapic_level18 +ffffffff82551e50 ? Xintr_ioapic_level19 +ffffffff82551e90 ? Xintr_ioapic_level20 +ffffffff82551ed0 ? Xintr_ioapic_level21 +ffffffff82551f10 ? Xintr_ioapic_level22 +ffffffff82551f50 ? Xintr_ioapic_level23 +ffffffff82551f90 ? Xintr_ioapic_level24 +ffffffff82551fd0 ? Xintr_ioapic_level25 +ffffffff82552010 ? Xintr_ioapic_level26 +ffffffff82552050 ? Xintr_ioapic_level27 +ffffffff82552090 ? Xintr_ioapic_level28 +ffffffff825520d0 ? Xintr_ioapic_level29 +ffffffff82552110 ? Xintr_ioapic_level30 +ffffffff82552150 ? Xintr_ioapic_level31 +ffffffff82552190 ? Xintr_ioapic_level32 +ffffffff825521d0 ? Xintr_ioapic_level33 +ffffffff82552210 ? Xintr_ioapic_level34 +ffffffff82552250 ? Xintr_ioapic_level35 +ffffffff82552290 ? Xintr_ioapic_level36 +ffffffff825522d0 ? Xintr_ioapic_level37 +ffffffff82552310 ? Xintr_ioapic_level38 +ffffffff82552350 ? Xintr_ioapic_level39 +ffffffff82552390 ? Xintr_ioapic_level40 +ffffffff825523d0 ? Xintr_ioapic_level41 +ffffffff82552410 ? Xintr_ioapic_level42 +ffffffff82552450 ? Xintr_ioapic_level43 +ffffffff82552490 ? Xintr_ioapic_level44 +ffffffff825524d0 ? Xintr_ioapic_level45 +ffffffff82552510 ? Xintr_ioapic_level46 +ffffffff82552550 ? Xintr_ioapic_level47 +ffffffff82552590 ? Xintr_ioapic_level48 +ffffffff825525d0 ? Xintr_ioapic_level49 +ffffffff82552610 ? Xintr_ioapic_level50 +ffffffff82552650 ? Xintr_ioapic_level51 +ffffffff82552690 ? Xintr_ioapic_level52 +ffffffff825526d0 ? Xintr_ioapic_level53 +ffffffff82552710 ? Xintr_ioapic_level54 +ffffffff82552750 ? Xintr_ioapic_level55 +ffffffff82552790 ? Xintr_ioapic_level56 +ffffffff825527d0 ? Xintr_ioapic_level57 +ffffffff82552810 ? Xintr_ioapic_level58 +ffffffff82552850 ? Xintr_ioapic_level59 +ffffffff82552890 ? Xintr_ioapic_level60 +ffffffff825528d0 ? Xintr_ioapic_level61 +ffffffff82552910 ? Xintr_ioapic_level62 +ffffffff82552950 ? Xintr_ioapic_level63 +ffffffff82553000 ? codepatch_fill_nop +ffffffff82553000 A __cptext_start +ffffffff82553000 A __kutext_end +ffffffff825530b0 ? codepatch_maprw +ffffffff82553190 ? codepatch_unmaprw +ffffffff82553200 ? codepatch_nop +ffffffff82553360 ? codepatch_replace +ffffffff82553510 ? codepatch_call +ffffffff82553530 ? codepatch_jmp +ffffffff82554000 A __cptext_end +ffffffff82554000 A __rodata_start +ffffffff82554000 C _etext +ffffffff82554000 C etext +ffffffff82555000 r seeprom_read +ffffffff82555004 r icl_mg_pll_find_divisors.div1_vals +ffffffff82555028 r gen9bc_tgp_ddc_pin_map +ffffffff82555038 r athn_ac2qid +ffffffff82555038 r athn_ac2qid +ffffffff82555038 r athn_ac2qid +ffffffff82555044 r rtwn_get_rssi.cckoff +ffffffff8255506c r rsu_ac2qid +ffffffff8255507c r pckbc_portcmd +ffffffff82555080 r tht_fifo_write_pad.pad +ffffffff82555088 r rsu_get_rssi.cckoff +ffffffff8255509c r adlp_n_revids +ffffffff825550ec r apple_iso_trans +ffffffff825550f0 r dg2_g12_revid_step_tbl +ffffffff825550f8 r wihap_check_tx.txratetable +ffffffff825550fc r dmamode +ffffffff82555124 r gen9_edram_size_mb.sets +ffffffff82556000 r isomappings +ffffffff82556080 r unimappings +ffffffff82556230 r replacements +ffffffff82559b1f r cmd0646_9_tim_udma +ffffffff825ad6a2 r pp_r600_decoded_lanes +ffffffff825c8a32 r cmd680_setup_channel.udma_tbl +ffffffff825d06d0 r apollo_udma33_tim +ffffffff825d67bd r substchar +ffffffff825d88a4 r apollo_udma100_tim +ffffffff826001a5 r apollo_udma66_tim +ffffffff82607651 r apollo_pio_rec +ffffffff82616a2b r cy_pio_rec +ffffffff82645f9d r apollo_udma133_tim +ffffffff82652b78 R drm_ca +ffffffff82652ba0 R drm_filtops +ffffffff82652bd0 R drmread_filtops +ffffffff82653000 r vga_emulops +ffffffff82653048 R vga_stdscreen +ffffffff82653078 R vga_stdscreen_mono +ffffffff826530a8 R vga_stdscreen_bf +ffffffff826530d8 R vga_40lscreen +ffffffff82653108 R vga_40lscreen_mono +ffffffff82653138 R vga_40lscreen_bf +ffffffff82653168 R vga_50lscreen +ffffffff82653198 R vga_50lscreen_mono +ffffffff826531c8 R vga_50lscreen_bf +ffffffff826531f8 R vga_screenlist +ffffffff82653208 R vga_screenlist_mono +ffffffff82653218 R vga_accessops +ffffffff82653278 r i945_wm_info +ffffffff826532b0 r bgansitopc +ffffffff826532b8 r pctoansi +ffffffff826532f8 r sdma_offsets +ffffffff826532f8 r sdma_offsets +ffffffff82653328 r iha_rate_tbl +ffffffff82653360 r i830_a_wm_info +ffffffff82653398 r gen9_edram_size_mb.ways +ffffffff82653400 r aggr_periodic_times +ffffffff82653480 r jsl_ehl_revids +ffffffff826534f8 r michael_final.pad +ffffffff82653520 r rt_copysa.maskarray +ffffffff82653528 r i915_wm_info +ffffffff82653530 r amdgpu_ih_clientid_jpeg +ffffffff82653530 r amdgpu_ih_clientid_uvds +ffffffff82653530 r amdgpu_ih_clientid_vcns +ffffffff82653530 r amdgpu_ih_clientid_vcns +ffffffff82653530 r amdgpu_ih_clientid_vcns +ffffffff82653568 r vga_setfontset.cmaptabb +ffffffff82653580 r tgl_revids +ffffffff826535d8 r i830_bc_wm_info +ffffffff82653648 r hsw_activate_psr2.map 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adw_switch +ffffffff8265f000 R gdt_switch +ffffffff82660000 R twe_switch +ffffffff82661000 R ciss_switch +ffffffff82661030 R ciss_level +ffffffff82661050 R ciss_stat +ffffffff82662000 R ami_switch +ffffffff82662028 R ami_raw_switch +ffffffff82663000 R mfi_switch +ffffffff82663028 R mfi_pd_switch +ffffffff82663050 r mfi_iop_xscale +ffffffff82663080 r mfi_iop_ppc +ffffffff826630b0 r mfi_iop_gen2 +ffffffff826630e0 r mfi_iop_skinny +ffffffff82663110 r mfi_bbu_indicators +ffffffff826631c0 r bwi_rf_calc_nrssi_slope_11b.save_phy_regs +ffffffff826631f0 r chv_oa_mux_regs +ffffffff82663210 r fiji_clock_stretcher_lookup_table +ffffffff82663210 r tonga_clock_stretcher_lookup_table +ffffffff82663230 r iosf_pci_devices +ffffffff82663250 r link_speed +ffffffff82663250 r link_speed +ffffffff82663250 r link_speed +ffffffff82663290 r drm_fb_xfrm.default_dst_pitch +ffffffff82663290 r non_supported_protection +ffffffff82663390 r tgl_uy_revids +ffffffff826633e0 r bwi_phy_noise_11g_rev1 +ffffffff82663460 r cardslot_process_event.antonym_ev +ffffffff826634f0 r gen11_oa_mux_regs +ffffffff826635e0 r ddr2_cycle_tenths +ffffffff82663650 r rtw_intr_rx.ratetbl +ffffffff826636d0 r abm_config +ffffffff82663740 r getbootinfo.ports.30 +ffffffff82663790 r reg_offsets +ffffffff826637a0 r bwi_rf_lo_measure_11g.rf_lo_adjust +ffffffff826637b0 r init_non_clock_fields.look_up +ffffffff826637c0 r uftdi_8u232am_getrate.roundoff +ffffffff82663810 r zyd_rx_data.rates +ffffffff82663820 r ieee80211_ra_valid_tx_mcs.max_mcs +ffffffff82663860 r mmio_invalidate_full.gen8_regs +ffffffff82663890 r bwi_phy_noise_11g +ffffffff826638a0 r hpt366_pio +ffffffff826638d0 r glk_revids +ffffffff82663920 r bwi_rf_calc_nrssi_slope_11g.save_phy3_regs +ffffffff82663940 r ether_crc32_be_update.rev +ffffffff82663940 r rtw_grf5101_mac_crypt.caesar +ffffffff82663990 r snb_b_fdi_train_param +ffffffff82664000 R qlw_switch +ffffffff82665000 R isp_2100_risc_code +ffffffff82677bf0 R isp_2200_risc_code +ffffffff8268a990 R isp_2300_risc_code +ffffffff826a4408 R qla_switch +ffffffff826a4430 r qla_regs_2100 +ffffffff826a4460 r qla_regs_2200 +ffffffff826a4490 r qla_regs_23XX +ffffffff826a5000 R ahci_atascsi_methods +ffffffff826a6000 R nvme_switch +ffffffff826a6028 r nvme_ops +ffffffff826a7000 R mpi_switch +ffffffff826a7100 r intel_hpll_vco.elk_vco +ffffffff826a7160 r pin_offsets +ffffffff826a71c0 r firmware_list +ffffffff826a7220 r atom_arg_shift +ffffffff826a7220 r atom_arg_shift +ffffffff826a7260 r pf_syncookie_wstab +ffffffff826a7280 r ieee80211_media_init.mopts +ffffffff826a72e0 r add_entropy_words.twist_table +ffffffff826a7380 r urtw_8225v2_txpwr_cck +ffffffff826a73a0 r bwfm_pci_prio2fifo +ffffffff826a73a0 r ieee80211_up_to_ac.up_to_ac +ffffffff826a7460 r paritytab +ffffffff826a7460 r x86emu_parity_tab +ffffffff826a7480 r legacy_connector_convert +ffffffff826a74c0 r gen7_oa_mux_regs +ffffffff826a74e0 r hsw_oa_mux_regs +ffffffff826a7500 r notetab +ffffffff826a7520 r urtw_8225v2_txpwr_cck_ch14 +ffffffff826a7540 r bwi_rf_calibval.rf_calibvals +ffffffff826a75e0 r pf_syncookie_msstab +ffffffff826a7640 r xgmi3x16_pcs_err_status_reg_aldebaran +ffffffff826a76a0 r uath_wme_init.uath_wme_11g +ffffffff826a76c0 r gen7_oa_b_counters +ffffffff826a7820 r icl_revids +ffffffff826a78e0 r rtwn_iq_calib_run.reg_adda +ffffffff826a7920 r atom_def_dst +ffffffff826a7920 r atom_def_dst +ffffffff826a7960 r sha256_initial_hash_value +ffffffff826a79c0 r otus_edca_def +ffffffff826a79e0 r intel_hpll_vco.blb_vco +ffffffff826a7aa0 r epic_pci_subsys_info +ffffffff826a7ac0 r atom_arg_mask +ffffffff826a7ac0 r atom_arg_mask +ffffffff826a7b20 r butmap +ffffffff826a7b60 r GFX_RLC_SRM_INDEX_CNTL_DATA_OFFSETS +ffffffff826a7ba0 r comsoft.lsrmap +ffffffff826a7be0 r tulip_mii_phy_readspecific.table +ffffffff826a7c00 r kbl_revids +ffffffff826a7ca0 r intel_hpll_vco.pnv_vco +ffffffff826a7d00 r dmapageport +ffffffff826a7dc0 r intel_hpll_vco.ctg_vco +ffffffff826a7e80 r drm_calculate_luminance_range.pre_computed_values +ffffffff826a8000 R sili_atascsi_methods +ffffffff826a9000 R ncr53c9x_switch +ffffffff826aa000 r scf_period +ffffffff826ab000 R siop_script +ffffffff826ab5a0 R lun_switch +ffffffff826ab5d0 R tag_switch +ffffffff826ab660 R load_dsa +ffffffff826ab6c4 R siop_led_on +ffffffff826ab6cc R siop_led_off +ffffffff826ab6d8 R siop_switch +ffffffff826ac000 R ep_vortex_media +ffffffff826ac100 R ep_default_to_media +ffffffff826ad000 R wi_card_ident +ffffffff826af000 R ucode_table +ffffffff826b0000 r re_revisions +ffffffff826b0290 r re_kstats_tpl +ffffffff826b2000 R smc91cxx_media +ffffffff826b2010 R smc91cxx_mii_bitbang_ops +ffffffff826b3000 R dl10019_mii_bitbang_ops +ffffffff826b3028 R dl10022_mii_bitbang_ops +ffffffff826b4000 R ax88190_mii_bitbang_ops +ffffffff826b6000 R ac97_audio_default +ffffffff826b6020 R ac97_on_off +ffffffff826b6324 R ac97_mic_select +ffffffff826b6628 R ac97_mono_select +ffffffff826b692c R ac97_source +ffffffff826b6c30 R ac97_volume_stereo +ffffffff826b6c4c R ac97_volume_mono +ffffffff826b6c70 R source_info +ffffffff826b7470 R ac97_ad +ffffffff826b7580 R ac97_ak +ffffffff826b7610 R ac97_av +ffffffff826b7750 R ac97_rl +ffffffff826b77a0 R ac97_cm +ffffffff826b7820 R ac97_cr +ffffffff826b7840 R ac97_cs +ffffffff826b7920 R ac97_cx +ffffffff826b7980 R ac97_dt +ffffffff826b79a0 R ac97_em +ffffffff826b79d0 R ac97_es +ffffffff826b79f0 R ac97_is +ffffffff826b7a10 R ac97_ic +ffffffff826b7a90 R ac97_it +ffffffff826b7ac0 R ac97_ns +ffffffff826b7b80 R ac97_ps +ffffffff826b7bb0 R ac97_sl +ffffffff826b7bd0 R ac97_st +ffffffff826b7d20 R ac97_vi +ffffffff826b7d50 R ac97_tt +ffffffff826b7dd0 R ac97_ti +ffffffff826b7df0 R ac97_wb +ffffffff826b7e10 R ac97_wo +ffffffff826b7ea0 R ac97_ym +ffffffff826b7ef0 R ac97_vendors +ffffffff826b81f0 R ac97enhancement +ffffffff826b82f0 R ac97feature +ffffffff826b9000 R lm_chips +ffffffff826b9020 R lm78_sensors +ffffffff826b91a0 R w83627hf_sensors +ffffffff826b93a0 R w83627ehf_sensors +ffffffff826b95c0 R w83627dhg_sensors +ffffffff826b97c0 R nct6776f_sensors +ffffffff826b9a00 R nct6779d_sensors +ffffffff826b9d60 R w83637hf_sensors +ffffffff826b9f20 R w83697hf_sensors +ffffffff826ba0c0 R w83781d_sensors +ffffffff826ba280 R w83782d_sensors +ffffffff826ba480 R w83783s_sensors +ffffffff826ba600 R w83791d_sensors +ffffffff826ba860 R w83792d_sensors +ffffffff826baae0 R as99127f_sensors +ffffffff826bb000 r ar5k_known_products +ffffffff826bb110 r ar5111_gain_opt +ffffffff826bb1e0 r ar5112_gain_opt +ffffffff826bb2b0 r ar5k_5ghz_channels +ffffffff826bba00 r ar5k_2ghz_channels +ffffffff826bbf10 r ar5111_rf +ffffffff826bc350 r ar5112a_rf +ffffffff826bc890 r ar5112_rf +ffffffff826bcda0 r ar5413_rf +ffffffff826bd1b0 r ar2413_rf +ffffffff826bd4d0 r ar2425_rf +ffffffff826bd830 r ar5111_rfg +ffffffff826bdb30 r ar5112_rfg +ffffffff826bde30 r ar5413_rfg +ffffffff826be130 r ar2413_rfg +ffffffff826be430 r ar5k_rt_11a +ffffffff826be552 r ar5k_rt_11b +ffffffff826be674 r ar5k_rt_11g +ffffffff826be796 r ar5k_rt_xr +ffffffff826bf000 r ar5210_ini +ffffffff826c0000 r ar5211_mode +ffffffff826c02c0 r ar5211_ini +ffffffff826c0ad0 r ar5211_rf +ffffffff826c1000 r ar5212_pcie +ffffffff826c1080 r ar5212_mode +ffffffff826c1310 r ar5212_ini +ffffffff826c1c80 r ar5212_ar5111_mode +ffffffff826c1f20 r ar5212_ar5112_mode +ffffffff826c21b0 r ar5413_mode +ffffffff826c2b10 r ar2413_mode +ffffffff826c3430 r ar2425_mode +ffffffff826c3d90 r ar5111_bbgain +ffffffff826c4090 r ar5112_bbgain +ffffffff826c5000 r athn_5ghz_chans +ffffffff826c5020 r athn_rates +ffffffff826c6000 r athn_rates +ffffffff826c7000 r ar9160_ini +ffffffff826c7068 r ar5416_ini +ffffffff826c70d0 r ar5416_serdes +ffffffff826c70e8 r ar9160_1_1_addac +ffffffff826c70f8 r ar9160_1_0_addac +ffffffff826c7108 r ar5416_2_2_addac +ffffffff826c7118 r ar5416_2_1_addac +ffffffff826c7128 r ar5416_set_power_calib.chainoffset +ffffffff826c7140 r ar9160_bank6tpc_vals +ffffffff826c71c0 r ar5416_bank6tpc_vals +ffffffff826c7240 r ar5416_bb_rfgain_vals_2g +ffffffff826c7340 r ar5416_bb_rfgain_vals_5g +ffffffff826c7440 r ar5416_bank6_vals +ffffffff826c74c0 r ar9160_regs +ffffffff826c7540 r ar9160_vals_5g20 +ffffffff826c7640 r ar9160_vals_5g40 +ffffffff826c7740 r ar9160_vals_2g40 +ffffffff826c7840 r ar9160_vals_2g20 +ffffffff826c7940 r ar9160_cm_regs +ffffffff826c7c30 r ar9160_cm_vals +ffffffff826c8210 r ar5416_regs +ffffffff826c8290 r ar5416_vals_5g20 +ffffffff826c8390 r ar5416_vals_5g40 +ffffffff826c8490 r ar5416_vals_2g40 +ffffffff826c8590 r ar5416_vals_2g20 +ffffffff826c8690 r ar5416_cm_regs +ffffffff826c8980 r ar5416_cm_vals +ffffffff826c8f60 r ar5416_serdes_regs +ffffffff826c8f90 r ar5416_serdes_vals +ffffffff826c8fc0 r ar9160_1_1_addac_vals +ffffffff826c9040 r ar9160_1_0_addac_vals +ffffffff826c90c0 r ar5416_2_2_addac_vals +ffffffff826c9150 r ar5416_2_1_addac_vals +ffffffff826ca000 r ar9280_2_0_ini +ffffffff826ca068 r ar9280_2_0_serdes +ffffffff826ca080 r ar9280_2_0_rx_gain_23db_backoff +ffffffff826ca0a0 r ar9280_2_0_rx_gain_13db_backoff +ffffffff826ca0c0 r ar9280_2_0_rx_gain +ffffffff826ca0e0 r ar9280_2_0_tx_gain_high_power +ffffffff826ca100 r ar9280_2_0_tx_gain +ffffffff826ca120 r ar9280_init_from_rom.chainoffset +ffffffff826ca130 r ar9280_2_0_regs +ffffffff826ca190 r ar9280_2_0_vals_5g20 +ffffffff826ca250 r ar9280_2_0_vals_5g40 +ffffffff826ca310 r ar9280_2_0_vals_2g40 +ffffffff826ca3d0 r ar9280_2_0_vals_2g20 +ffffffff826ca490 r ar9280_2_0_cm_regs +ffffffff826ca740 r ar9280_2_0_cm_vals +ffffffff826cac90 r ar9280_2_0_fast_clock_regs +ffffffff826cacb0 r ar9280_2_0_fast_clock_vals_5g20 +ffffffff826cacf0 r ar9280_2_0_fast_clock_vals_5g40 +ffffffff826cad30 r ar9280_2_0_serdes_regs +ffffffff826cad60 r ar9280_2_0_serdes_vals +ffffffff826cad90 r ar9280_2_0_rx_gain_regs +ffffffff826caea0 r ar9280_2_0_rx_gain_23db_backoff_vals_5g +ffffffff826cb0b0 r ar9280_2_0_rx_gain_23db_backoff_vals_2g +ffffffff826cb2c0 r ar9280_2_0_rx_gain_13db_backoff_vals_5g +ffffffff826cb4d0 r ar9280_2_0_rx_gain_13db_backoff_vals_2g +ffffffff826cb6e0 r ar9280_2_0_rx_gain_vals_5g +ffffffff826cb8f0 r ar9280_2_0_rx_gain_vals_2g +ffffffff826cbb00 r ar9280_2_0_tx_gain_regs +ffffffff826cbb40 r ar9280_2_0_tx_gain_high_power_vals_5g +ffffffff826cbbc0 r ar9280_2_0_tx_gain_high_power_vals_2g +ffffffff826cbc40 r ar9280_2_0_tx_gain_vals_5g +ffffffff826cbcc0 r ar9280_2_0_tx_gain_vals_2g +ffffffff826cc000 r ar9271_ini +ffffffff826cc068 r ar9285_1_2_ini +ffffffff826cc0d0 r ar9280_2_0_serdes +ffffffff826cc0e8 r ar9271_tx_gain_high_power +ffffffff826cc108 r ar9271_tx_gain +ffffffff826cc128 r ar9285_2_0_tx_gain_high_power +ffffffff826cc148 r ar9285_2_0_tx_gain +ffffffff826cc168 r ar9285_1_2_tx_gain_high_power +ffffffff826cc188 r ar9285_1_2_tx_gain +ffffffff826cc1b0 r ar9271_regs +ffffffff826cc410 r ar9271_vals_2g40 +ffffffff826cc8d0 r ar9271_vals_2g20 +ffffffff826ccd90 r ar9271_cm_regs +ffffffff826cd020 r ar9271_cm_vals +ffffffff826cd540 r ar9285_1_2_regs +ffffffff826cd7a0 r ar9285_1_2_vals_2g40 +ffffffff826cdc60 r ar9285_1_2_vals_2g20 +ffffffff826ce120 r ar9285_1_2_cm_regs +ffffffff826ce3a0 r ar9285_1_2_cm_vals +ffffffff826ce890 r ar9280_2_0_serdes_regs +ffffffff826ce8c0 r ar9280_2_0_serdes_vals +ffffffff826ce8f0 r ar9271_tx_gain_regs +ffffffff826ce940 r ar9271_tx_gain_high_power_vals_2g +ffffffff826ce9d0 r ar9271_tx_gain_vals_2g +ffffffff826cea60 r ar9285_1_2_tx_gain_regs +ffffffff826ceab0 r ar9285_2_0_tx_gain_high_power_vals_2g +ffffffff826ceb50 r ar9285_2_0_tx_gain_vals_2g +ffffffff826cebf0 r ar9285_1_2_tx_gain_high_power_vals_2g +ffffffff826cec90 r ar9285_1_2_tx_gain_vals_2g +ffffffff826cf000 r ar9287_1_1_ini +ffffffff826cf068 r ar9280_2_0_serdes +ffffffff826cf080 r ar9287_1_1_rx_gain +ffffffff826cf0a0 r ar9287_1_1_tx_gain +ffffffff826cf0c0 r ar9287_1_1_regs +ffffffff826cf120 r ar9287_1_1_vals_2g40 +ffffffff826cf1d0 r ar9287_1_1_vals_2g20 +ffffffff826cf280 r ar9287_1_1_cm_regs +ffffffff826cf560 r ar9287_1_1_cm_vals +ffffffff826cfb20 r ar9280_2_0_serdes_regs +ffffffff826cfb50 r ar9280_2_0_serdes_vals +ffffffff826cfb80 r ar9287_1_1_rx_gain_regs +ffffffff826cfd90 r ar9287_1_1_rx_gain_vals_2g +ffffffff826d01a0 r ar9287_1_1_tx_gain_regs +ffffffff826d0200 r ar9287_1_1_tx_gain_vals_2g +ffffffff826d1000 r athn_rates +ffffffff826d2000 r ar9485_1_1_ini +ffffffff826d2068 r ar9485_1_1_serdes +ffffffff826d2080 r ar9380_2_2_ini +ffffffff826d20e8 r ar9380_2_2_serdes +ffffffff826d2100 r ar9380_2_2_rx_gain_wo_xlna +ffffffff826d2120 r ar9380_2_2_rx_gain +ffffffff826d2140 r ar9485_1_1_rx_gain +ffffffff826d2160 r ar9380_2_2_tx_gain_high_ob_db +ffffffff826d2180 r ar9380_2_2_tx_gain_low_ob_db +ffffffff826d21a0 r ar9380_2_2_tx_gain_high_power +ffffffff826d21c0 r ar9380_2_2_tx_gain +ffffffff826d21e0 r ar9485_1_1_tx_gain +ffffffff826d2200 r ar9485_1_1_regs +ffffffff826d2270 r ar9485_1_1_vals_2g40 +ffffffff826d2350 r ar9485_1_1_vals_2g20 +ffffffff826d2430 r ar9485_1_1_cm_regs +ffffffff826d2720 r ar9485_1_1_cm_vals +ffffffff826d2d00 r ar9485_1_1_serdes_regs +ffffffff826d2d0c r ar9485_1_1_serdes_vals +ffffffff826d2d20 r ar9380_2_2_regs +ffffffff826d2db0 r ar9380_2_2_vals_5g20 +ffffffff826d2ed0 r ar9380_2_2_vals_5g40 +ffffffff826d2ff0 r ar9380_2_2_vals_2g40 +ffffffff826d3110 r ar9380_2_2_vals_2g20 +ffffffff826d3230 r ar9380_2_2_cm_regs +ffffffff826d35d0 r ar9380_2_2_cm_vals +ffffffff826d3d00 r ar9380_2_2_fast_clock_regs +ffffffff826d3d20 r ar9380_2_2_fast_clock_vals_5g20 +ffffffff826d3d50 r ar9380_2_2_fast_clock_vals_5g40 +ffffffff826d3d74 r ar9380_2_2_serdes_regs +ffffffff826d3d80 r ar9380_2_2_serdes_vals +ffffffff826d3d90 r ar9380_2_2_rx_gain_regs +ffffffff826d3f90 r ar9380_2_2_rx_gain_wo_xlna_vals +ffffffff826d4390 r ar9380_2_2_rx_gain_vals +ffffffff826d4790 r ar9485_1_1_rx_gain_regs +ffffffff826d4890 r ar9485_1_1_rx_gain_vals +ffffffff826d4a90 r ar9380_2_2_tx_gain_regs +ffffffff826d4b60 r ar9380_2_2_tx_gain_high_ob_db_vals_5g +ffffffff826d4d00 r ar9380_2_2_tx_gain_high_ob_db_vals_2g +ffffffff826d4ea0 r ar9380_2_2_tx_gain_low_ob_db_vals_5g +ffffffff826d5040 r ar9380_2_2_tx_gain_low_ob_db_vals_2g +ffffffff826d51e0 r ar9380_2_2_tx_gain_high_power_vals_5g +ffffffff826d5380 r ar9380_2_2_tx_gain_high_power_vals_2g +ffffffff826d5520 r ar9380_2_2_tx_gain_vals_5g +ffffffff826d56c0 r ar9380_2_2_tx_gain_vals_2g +ffffffff826d5860 r ar9485_1_1_tx_gain_regs +ffffffff826d58f0 r ar9485_1_1_tx_gain_vals_2g +ffffffff826d5a10 r ar9380_def_rom +ffffffff826d5e50 r ar9380_def_rom_h112 +ffffffff826d6290 r ar9380_def_rom_h116 +ffffffff826d66d0 r ar9380_def_rom_x112 +ffffffff826d6b10 r ar9380_def_rom_x113 +ffffffff826d7000 R atw_txthresh_tab_lo +ffffffff826d7050 R atw_txthresh_tab_hi +ffffffff826d70a0 r atw_attach.empty_macaddr +ffffffff826d70b0 r atw_attach.type_strings +ffffffff826d70d0 r atw_rfmd2958_ifn +ffffffff826d7110 r atw_rfmd2958_rf1r +ffffffff826d7150 r atw_rxintr.rate_tbl +ffffffff826d8000 r rtw_identify_sta.empty_macaddr +ffffffff826d9000 r rtwn_set_key.etherzeroaddr +ffffffff826d9010 r rtl8188eu_rf_prog +ffffffff826d9030 r rtl8188ftv_rf_prog +ffffffff826d9050 r rtl8192e_rf_prog +ffffffff826d9080 r rtl8188ce_rf_prog +ffffffff826d90a0 r rtl8188ru_rf_prog +ffffffff826d90c0 r rtl8188cu_rf_prog +ffffffff826d90e0 r rtl8192ce_rf_prog +ffffffff826d9110 r rtl8188ru_txagc +ffffffff826d9170 r rtl8188eu_rf_regs +ffffffff826d9230 r rtl8188eu_rf_vals +ffffffff826d93b0 r rtl8188ftv_rf_regs +ffffffff826d9490 r rtl8188ftv_rf_vals +ffffffff826d9640 r rtl8192e_rf_regs +ffffffff826d9710 r rtl8192e_rf_vals +ffffffff826d98b0 r rtl8192e_rf2_regs +ffffffff826d9950 r rtl8192e_rf2_vals +ffffffff826d9a90 r rtl8192ce_rf1_regs +ffffffff826d9bb0 r rtl8188ce_rf_vals +ffffffff826d9df0 r rtl8188ru_rf_vals +ffffffff826da030 r rtl8188cu_rf_vals +ffffffff826da270 r rtl8192ce_rf1_vals +ffffffff826da4b0 r rtl8192ce_rf2_regs +ffffffff826da500 r rtl8192ce_rf2_vals +ffffffff826da5a0 r rtl8192cu_txagc +ffffffff826db000 r rt2560_rf2522_r2 +ffffffff826db040 r rt2560_rf2524_r2 +ffffffff826db080 r rt2560_rf2525_hi_r2 +ffffffff826db0c0 r rt2560_rf2525_r2 +ffffffff826db100 r rt2560_rf2525e_r2 +ffffffff826db140 r rt2560_rf2526_hi_r2 +ffffffff826db180 r rt2560_rf2526_r2 +ffffffff826db1c0 r rt2560_def_bbp +ffffffff826db200 r rt2560_def_mac +ffffffff826dc000 r rt2661_rf5225_1 +ffffffff826dc300 r rt2661_rf5225_2 +ffffffff826dc600 r rt2661_def_bbp +ffffffff826dc640 r rt2661_def_mac +ffffffff826dd000 r rt2860_rf2850 +ffffffff826dd430 r rt2860_rates +ffffffff826dd4f0 r rt3572_def_rf +ffffffff826dd530 r rt3090_def_rf +ffffffff826dd560 r rt5392_def_rf +ffffffff826dd5e0 r rt3290_def_rf +ffffffff826dd640 r rt5390_def_rf +ffffffff826dd6c0 r rt5390_def_bbp +ffffffff826dd6f0 r rt2860_def_mac +ffffffff826df000 r acx111_reg +ffffffff826df040 r acx111_rate_map +ffffffff826e0000 r acx100_reg +ffffffff826e0040 r acx100_txpower_rfmd +ffffffff826e0060 r acx100_txpower_maxim +ffffffff826e0080 r xehp_rcs_offsets +ffffffff826e00b0 r gen8_rcs_offsets +ffffffff826e00e0 r hangpic +ffffffff826e0120 r digits +ffffffff826e0120 r pppdumpb.digits +ffffffff826e0120 r pppdumpm.digits +ffffffff826e0140 r dg2_xcs_offsets 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xhci_root_ctrl_methods +ffffffff826e7060 R xhci_root_intr_methods +ffffffff826e7090 R xhci_device_ctrl_methods +ffffffff826e70c0 R xhci_device_intr_methods +ffffffff826e70f0 R xhci_device_bulk_methods +ffffffff826e7120 R xhci_device_isoc_methods +ffffffff826e7150 R xhci_devd +ffffffff826e7162 R xhci_confd +ffffffff826e716b R xhci_ifcd +ffffffff826e7174 R xhci_endpd +ffffffff826e717b R xhci_endpcd +ffffffff826e7181 R xhci_hubd +ffffffff826ea000 R radio_ca +ffffffff826eb000 R ipmi_ca +ffffffff826ec000 R vscsi_ca +ffffffff826ec028 R vscsi_switch +ffffffff826ec050 R vscsi_filtops +ffffffff826ed000 R mpath_ca +ffffffff826ed028 R mpath_switch +ffffffff826ee000 R softraid_ca +ffffffff826ee028 R sr_switch +ffffffff826ef000 r spdmem_basic_types +ffffffff826ef0a0 r spdmem_parity_types +ffffffff826ef0e0 r spdmem_ddr4_decode.ddr4_chipsize +ffffffff826f0000 R kstat_rlock_ops +ffffffff826f0010 R kstat_wlock_ops +ffffffff826f0020 R kstat_mutex_ops +ffffffff826f0030 R kstat_cpu_ops +ffffffff826f0040 r kstat_id_tree_RBT_INFO +ffffffff826f0058 R kstat_id_tree_RBT_TYPE +ffffffff826f0060 r kstat_pv_tree_RBT_INFO +ffffffff826f0078 R kstat_pv_tree_RBT_TYPE +ffffffff826f0080 r kstat_nm_tree_RBT_INFO +ffffffff826f0098 R kstat_nm_tree_RBT_TYPE +ffffffff826f1000 r fuse_rd_filtops +ffffffff826f2000 R fusefs_vfsops +ffffffff826f2070 R fusefs_vars +ffffffff826f3000 R fusefs_vops +ffffffff826f3110 R fusefsread_filtops +ffffffff826f3140 R fusefswrite_filtops +ffffffff826f3170 R fusefsvnode_filtops +ffffffff826f4000 r pf_state_tree_RBT_INFO +ffffffff826f4018 R pf_state_tree_RBT_TYPE +ffffffff826f4020 r pf_state_tree_id_RBT_INFO +ffffffff826f4038 R pf_state_tree_id_RBT_TYPE +ffffffff826f4040 r pf_translate_af.zero +ffffffff826f5000 R hfsc_ops +ffffffff826f5038 R ifq_hfsc_ops +ffffffff826f5040 R hfsc_pf_ops +ffffffff826f5088 R pfq_hfsc_ops +ffffffff826f6000 r fqcodel_ops +ffffffff826f6038 R ifq_fqcodel_ops +ffffffff826f6040 r fqcodel_pf_ops +ffffffff826f6088 R pfq_fqcodel_ops +ffffffff826f6090 r codel_intervals +ffffffff826f7000 R pfsync_acts +ffffffff826f8000 R hotplugread_filtops +ffffffff826f9000 R dtps_static +ffffffff826fa000 R db_show_all_cmds +ffffffff826fa180 R db_show_cmds +ffffffff826fa4c0 R db_boot_cmds +ffffffff826fa5a0 R db_command_table +ffffffff826fb000 R ddb_vars +ffffffff826fc000 R audio_ca +ffffffff826fc028 R audioctlread_filtops +ffffffff826fc058 R audiowrite_filtops +ffffffff826fc088 R audioread_filtops +ffffffff826fd000 R midi_ca +ffffffff826fd028 R midiwrite_filtops +ffffffff826fd058 R midiread_filtops +ffffffff826fe000 r mulawtolin16 +ffffffff826fe200 r lintomulaw +ffffffff826ff000 R randomread_filtops +ffffffff826ff030 R randomwrite_filtops +ffffffff82700000 R video_ca +ffffffff82700028 R video_filtops +ffffffff82701000 R cd9660_vfsops +ffffffff82702000 R cd9660_vops +ffffffff82702110 R cd9660_specvops +ffffffff82702220 R cd9660_fifovops +ffffffff82702330 R cd9660read_filtops +ffffffff82702360 R cd9660write_filtops +ffffffff82702390 R cd9660vnode_filtops +ffffffff82703000 R udf_vfsops +ffffffff82704000 R udf_vops +ffffffff82704110 r mon_lens +ffffffff82705000 r month_days +ffffffff82706000 R execsw +ffffffff82707000 r shstrtab +ffffffff82708000 R copyright +ffffffff827080c0 r initpaths +ffffffff82709000 R sysent +ffffffff8270b000 R bufq_impls +ffffffff8270c000 R kqueueops +ffffffff8270c038 R kqread_filtops +ffffffff8270c068 R proc_filtops +ffffffff8270c098 R file_filtops +ffffffff8270c0c8 R timer_filtops +ffffffff8270c100 R sysfilt_ops +ffffffff8270c148 R seltrue_filtops +ffffffff8270c178 R dead_filtops +ffffffff8270c1a8 R badfd_filtops +ffffffff8270c1d8 r mutex_klistops +ffffffff8270c1f0 r rwlock_klistops +ffffffff8270d000 R kv_exec +ffffffff8270e000 R addrmask +ffffffff8270f000 r rw_ops +ffffffff82710000 r proc_printit.pstat +ffffffff82711000 R pledge_syscalls +ffffffff82711a60 r pledgenames +ffffffff82711cb0 r pledgereq +ffffffff82712000 r unvname_rbt_RBT_INFO +ffffffff82712018 R unvname_rbt_RBT_TYPE +ffffffff82713000 R sig_filtops +ffffffff82713030 R sigprop +ffffffff82714000 R kern_vars +ffffffff827142f0 R hw_vars +ffffffff82715000 R tc_vars +ffffffff82716000 r sys_gettimeofday.zerotz +ffffffff82717000 r taskq_sys_name +ffffffff82717006 r taskq_sys_mp_name +ffffffff82717010 R systq +ffffffff82717018 R systqmp +ffffffff82719000 r gpt_get_fstype.gpt_uuid_openbsd +ffffffff82719010 r gpt_get_fstype.gpt_uuid_msdos +ffffffff82719020 r gpt_get_fstype.gpt_uuid_chromerootfs +ffffffff82719030 r gpt_get_fstype.gpt_uuid_linux +ffffffff82719040 r gpt_get_fstype.gpt_uuid_hfs +ffffffff82719050 r gpt_get_fstype.gpt_uuid_unused +ffffffff82719060 r gpt_get_fstype.gpt_uuid_efi_system +ffffffff82719070 r gpt_get_fstype.gpt_uuid_bios_boot +ffffffff8271a000 r hiballoc_addr_RBT_INFO +ffffffff8271a018 R hiballoc_addr_RBT_TYPE +ffffffff8271b000 R logread_filtops +ffffffff8271c000 r phtree_RBT_INFO +ffffffff8271c018 R phtree_RBT_TYPE +ffffffff8271c020 r pool_lock_ops_rw +ffffffff8271c058 r pool_lock_ops_mtx +ffffffff8271d000 r pselregister.evf +ffffffff8271d00c r pselregister.evff +ffffffff8271e000 R pipe_rfiltops +ffffffff8271e030 R pipe_wfiltops +ffffffff8271e060 R pipe_efiltops +ffffffff8271e090 r pipeops +ffffffff8271f000 R socketops +ffffffff82720000 R sysvsem_vars +ffffffff82721000 R char_type +ffffffff82721100 R ttyread_filtops +ffffffff82721130 R ttywrite_filtops +ffffffff82721160 R ttyexcept_filtops +ffffffff82722000 R ptcread_filtops +ffffffff82722030 R ptcwrite_filtops +ffffffff82722060 R ptcexcept_filtops +ffffffff82724000 R domains +ffffffff82725000 R unixdomain +ffffffff82725050 R unixsw +ffffffff82726000 R solisten_filtops +ffffffff82726030 R soread_filtops +ffffffff82726060 R sowrite_filtops +ffffffff82726090 R soexcept_filtops +ffffffff827260c0 R socket_klistops +ffffffff82727000 R sun_noname +ffffffff82727010 R uipc_usrreqs +ffffffff827270b0 R uipc_dgram_usrreqs +ffffffff82727150 R unpstctl_vars +ffffffff82727180 R unpsqctl_vars +ffffffff827271b0 R unpdgctl_vars +ffffffff82728000 r namecache_rb_cache_RBT_INFO +ffffffff82728018 R namecache_rb_cache_RBT_TYPE +ffffffff82729000 R generic_filtops +ffffffff8272a000 r buf_rb_bufs_RBT_INFO +ffffffff8272a018 R buf_rb_bufs_RBT_TYPE +ffffffff8272a020 r typename +ffffffff8272b000 R sync_vops +ffffffff8272c000 R vnops +ffffffff8272d000 R spec_vops +ffffffff8272e000 R dead_vops +ffffffff8272f000 R fifo_vops +ffffffff8272f110 R fiforead_filtops +ffffffff8272f140 R fifowrite_filtops +ffffffff8272f170 R fifoexcept_filtops +ffffffff82730000 R regyear +ffffffff82730020 R leapyear +ffffffff82730040 r dos2unix +ffffffff82730140 r u2l +ffffffff82730240 r unix2dos +ffffffff82731008 R msdosfs_vfsops +ffffffff82732000 R msdosfs_vops +ffffffff82732110 R msdosfsread_filtops +ffffffff82732140 R msdosfswrite_filtops +ffffffff82732170 R msdosfsvnode_filtops +ffffffff82733000 r _utf_count +ffffffff82734000 R ntfs_vfsops +ffffffff82735000 R ntfs_vops +ffffffff82736000 R bpfread_filtops +ffffffff82736030 R bpf_mbuf_ops +ffffffff82737000 r bpf_mem_ops +ffffffff82738000 R priq_ops +ffffffff82738038 R ifq_priq_ops +ffffffff82738040 r ifq_kstat_tpl +ffffffff82738158 r ifiq_kstat_tpl +ffffffff82739000 r ether_crc32_le_update.crctab +ffffffff82739040 r ether_crc32_be_update.crctab +ffffffff8273a000 r lcp +ffffffff8273a078 r ipcp +ffffffff8273a0f0 r ipv6cp +ffffffff8273a168 r chap +ffffffff8273a1e0 r pap +ffffffff8273b000 R ifmedia_baudrate_descriptions +ffffffff8273c000 r fcstab +ffffffff8273e000 R tunread_filtops +ffffffff8273e030 R tunwrite_filtops +ffffffff8273f000 R bridge_brport +ffffffff82740000 R bstp_etheraddr +ffffffff82741000 r eb_tree_RBT_INFO +ffffffff82741018 R eb_tree_RBT_TYPE +ffffffff82742000 r veb_etherbridge_ops +ffffffff82742028 r veb_pf_ipv4 +ffffffff82742040 r veb_pf_ipv6 +ffffffff82743000 r pipex_pppoe_padding +ffffffff82744000 r rn_addmask.normal_chars +ffffffff82745000 R route_src +ffffffff82745010 R route_usrreqs +ffffffff827450b0 R routedomain +ffffffff82745100 R routesw +ffffffff82746000 R gre_vars +ffffffff82746030 r mgre_tree_RBT_INFO +ffffffff82746048 R mgre_tree_RBT_TYPE +ffffffff82746050 r egre_tree_RBT_INFO +ffffffff82746068 R egre_tree_RBT_TYPE +ffffffff82746070 r nvgre_ucast_tree_RBT_INFO +ffffffff82746088 R nvgre_ucast_tree_RBT_TYPE +ffffffff82746090 r nvgre_mcast_tree_RBT_INFO +ffffffff827460a8 R nvgre_mcast_tree_RBT_TYPE +ffffffff827460b0 r eoip_tree_RBT_INFO +ffffffff827460c8 R eoip_tree_RBT_TYPE +ffffffff827460d0 r nvgre_etherbridge_ops +ffffffff82747000 r trunk_protos +ffffffff82748000 R ethermulticastaddr_slowprotocols +ffffffff82748006 R lacp_info_tlv_template +ffffffff8274800e R marker_info_tlv_template +ffffffff82748012 R marker_response_tlv_template +ffffffff82748020 R lacp_timer_funcs +ffffffff82749000 r lacp_rxm_state_names +ffffffff82749040 r lacp_rxm_event_names +ffffffff82749090 r aggr_port_selected_names +ffffffff827490b0 r lacp_mux_state_names +ffffffff827490e0 r lacp_mux_event_names +ffffffff82749128 r lacp_address_slow +ffffffff8274a000 r tpmr_pf_ipv4 +ffffffff8274a018 r tpmr_pf_ipv6 +ffffffff8274b000 r bpe_tree_RBT_INFO +ffffffff8274b018 R bpe_tree_RBT_TYPE +ffffffff8274b020 r bpe_etherbridge_ops +ffffffff8274c000 R pppx_rd_filtops +ffffffff8274c030 R pppx_wr_filtops +ffffffff8274c060 r pppx_ifs_RBT_INFO +ffffffff8274c078 R pppx_ifs_RBT_TYPE +ffffffff8274c080 r pppac_rd_filtops +ffffffff8274c0b0 r pppac_wr_filtops +ffffffff8274d000 r vxlan_peers_RBT_INFO +ffffffff8274d018 R vxlan_peers_RBT_TYPE +ffffffff8274d020 r vxlan_etherbridge_ops +ffffffff8274e000 R stoeplitz_cache +ffffffff8274f000 R ieee80211_std_rateset_11a +ffffffff8274f010 R ieee80211_std_rateset_11b +ffffffff8274f020 R ieee80211_std_rateset_11g +ffffffff8274f030 R ieee80211_std_ratesets_11n +ffffffff8274f3b0 R ieee80211_std_ratesets_11ac +ffffffff8274f6b0 r ieee80211_setbasicrates.basic +ffffffff8274f710 r ieee80211_setmode.chanflags +ffffffff8274f730 r ieee80211_rate2media.rates +ffffffff8274f8c0 r ieee80211_media2rate.ieeerates +ffffffff82750000 r Sbox +ffffffff82752000 r ieee80211_ioctl.empty_macaddr +ffffffff82753000 r ieee80211_find_rxnode.zero +ffffffff82753008 r ieee80211_tree_RBT_INFO +ffffffff82753020 R ieee80211_tree_RBT_TYPE +ffffffff82753028 r ieee80211_ess_tree_RBT_INFO +ffffffff82753040 R ieee80211_ess_tree_RBT_TYPE +ffffffff82753048 r ieee80211_do_slow_print.merge_print_intvl +ffffffff82754020 R ieee80211_edca_table +ffffffff827540e0 R ieee80211_qap_edca_table +ffffffff82755000 R ieee80211_mgt_subtype_name +ffffffff82755080 R ieee80211_state_name +ffffffff827550b0 R ieee80211_phymode_name +ffffffff82756000 r ieee80211_r_ctry +ffffffff82756ae0 r ieee80211_r_names +ffffffff82756f80 r ieee80211_r_map +ffffffff82758000 R zeroin_addr +ffffffff82759000 R inetdomain +ffffffff82759050 R inetsw +ffffffff8275a000 R divertctl_vars +ffffffff8275a030 R divert_usrreqs +ffffffff8275b000 R icmpctl_vars +ffffffff8275c000 R ipctl_vars +ffffffff8275c150 R inetctlerrmap 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enc_xform_null +ffffffff82773280 R auth_hash_hmac_md5_96 +ffffffff827732c8 R auth_hash_hmac_sha1_96 +ffffffff82773310 R auth_hash_hmac_ripemd_160_96 +ffffffff82773358 R auth_hash_hmac_sha2_256_128 +ffffffff827733a0 R auth_hash_hmac_sha2_384_192 +ffffffff827733e8 R auth_hash_hmac_sha2_512_256 +ffffffff82773430 R auth_hash_gmac_aes_128 +ffffffff82773478 R auth_hash_gmac_aes_192 +ffffffff827734c0 R auth_hash_gmac_aes_256 +ffffffff82773508 R auth_hash_chacha20_poly1305 +ffffffff82773550 R comp_algo_deflate +ffffffff82774000 r IV +ffffffff82775000 r idgen32_ftable +ffffffff82776000 r Chacha20_Poly1305_Update.zeroes +ffffffff82776010 r pad0 +ffffffff82777000 r null_point +ffffffff82777020 r base_point +ffffffff82778000 R mplsdomain +ffffffff82779000 R mplsctl_vars +ffffffff8277a000 r nfs_nodetree_RBT_INFO +ffffffff8277a018 R nfs_nodetree_RBT_TYPE +ffffffff8277b000 r nfsread_filtops +ffffffff8277b030 r nfswrite_filtops +ffffffff8277b060 r nfsvnode_filtops +ffffffff8277c000 r nfsrv_v3errmap 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uvm_pmr_addr_RBT_TYPE +ffffffff82792020 r uvm_pmr_size_RBT_INFO +ffffffff82792038 R uvm_pmr_size_RBT_TYPE +ffffffff82792040 r uvm_pmemrange_addr_RBT_INFO +ffffffff82792058 R uvm_pmemrange_addr_RBT_TYPE +ffffffff82793000 R uvm_vnodeops +ffffffff82793048 r uvn_flush.interval +ffffffff82794000 R zeroin6_addr +ffffffff82795000 R in6addr_any +ffffffff82795010 R in6addr_loopback +ffffffff82795020 R in6addr_intfacelocal_allnodes +ffffffff82795030 R in6addr_linklocal_allnodes +ffffffff82795040 R in6addr_linklocal_allrouters +ffffffff82795050 R in6mask0 +ffffffff82795060 R in6mask32 +ffffffff82795070 R in6mask64 +ffffffff82795080 R in6mask96 +ffffffff82795090 R in6mask128 +ffffffff827950a0 R sa6_any +ffffffff82796000 R divert6ctl_vars +ffffffff82796030 R divert6_usrreqs +ffffffff82797000 R inet6domain +ffffffff82797050 R inet6sw +ffffffff82798000 R icmpv6ctl_vars +ffffffff82799000 R inet6ctlerrmap +ffffffff82799020 R ipv6ctl_vars +ffffffff8279a000 R rip6_usrreqs +ffffffff8279b000 R pfkey_addr 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normal_pdes +ffffffff827b1000 R trap_type +ffffffff827b10b0 R trap_types +ffffffff827b2000 r x86fpflags_to_siginfo.x86fp_siginfo_table +ffffffff827b3000 R x86_soft_intr_to_ssir +ffffffff827b5000 R Xexceptions +ffffffff827b5100 r spl_lowered +ffffffff827b512d R i8259_stubs +ffffffff827b52ad R ioapic_edge_stubs +ffffffff827b58ad R ioapic_level_stubs +ffffffff827b6000 R _stac +ffffffff827b6003 R _clac +ffffffff827b7000 R x86_bus_space_io_ops +ffffffff827b7130 R x86_bus_space_mem_ops +ffffffff827b8000 ? cpu_spinup_trampoline +ffffffff827b80b6 R cpu_spinup_trampoline_end +ffffffff827b80b6 R mp_tramp_data_start +ffffffff827b80fc R mp_tramp_data_end +ffffffff827ba000 R db_acpi_cmds +ffffffff827ba0a0 R db_machine_command_table +ffffffff827bb000 r i8254_delay.delaytab +ffffffff827bc000 R rasops_cmap +ffffffff827bd000 r reverse +ffffffff827bd100 r ibm437_level1 +ffffffff827bd230 r ibm437_level2_0 +ffffffff827bd248 r ibm437_level2_1 +ffffffff827bd260 r ibm437_level2_3 +ffffffff827bd278 r ibm437_level2_32 +ffffffff827bd290 r ibm437_level2_34 +ffffffff827bd2a8 r ibm437_level2_35 +ffffffff827bd2c0 r ibm437_level2_37 +ffffffff827bd2e0 r ibm437_chars_0 +ffffffff827bd3e0 r ibm437_chars_1 +ffffffff827bd3f0 r ibm437_chars_3 +ffffffff827bd430 r ibm437_chars_32 +ffffffff827bd460 r ibm437_chars_34 +ffffffff827bd4d0 r ibm437_chars_35 +ffffffff827bd4f0 r ibm437_chars_37 +ffffffff827be000 R mii_media_table +ffffffff827bf000 R nsphy_ca +ffffffff827bf028 R nsphy_funcs +ffffffff827bf040 r nsphys +ffffffff827c0000 R nsphyter_ca +ffffffff827c0028 R nsphyter_funcs +ffffffff827c0040 r nsphyterphys +ffffffff827c1000 R gentbi_ca +ffffffff827c1028 R gentbi_funcs +ffffffff827c2000 R qsphy_ca +ffffffff827c2028 R qsphy_funcs +ffffffff827c2040 r qsphys +ffffffff827c3000 R inphy_ca +ffffffff827c3028 R inphy_funcs +ffffffff827c3040 r inphys +ffffffff827c4000 R iophy_ca +ffffffff827c4028 R iophy_funcs +ffffffff827c4040 r iophys +ffffffff827c5000 R eephy_ca +ffffffff827c5028 R eephy_funcs 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R hds_ca +ffffffff827ec028 R hds_mpath_ops +ffffffff827ed000 R atapiscsi_ca +ffffffff827ed028 r atapiscsi_switch +ffffffff827ee000 R wd_ca +ffffffff827ef000 R atascsi_switch +ffffffff827f0000 R mainbus_ca +ffffffff827f1000 R bios_ca +ffffffff827f2000 R mpbios_ca +ffffffff827f2030 r loc_where +ffffffff827f3000 R mpbios_icu_table +ffffffff827f4000 R cpu_ca +ffffffff827f5000 R lapic_timer_intrclock +ffffffff827f6000 R ioapic_ca +ffffffff827f7000 R efifb_ca +ffffffff827f7028 R efifb_screen_list +ffffffff827f8000 R pvbus_ca +ffffffff827f9000 R pvclock_ca +ffffffff827fa000 R vmt_ca +ffffffff827fb000 R xen_ca +ffffffff827fc000 R xs_errors +ffffffff827fd000 R xnf_ca +ffffffff827fe000 R xbf_ca +ffffffff827fe028 R xbf_switch +ffffffff827ff000 R hyperv_ca +ffffffff827ff028 R hv_guid_network +ffffffff827ff038 R hv_guid_ide +ffffffff827ff048 R hv_guid_scsi +ffffffff827ff058 R hv_guid_shutdown +ffffffff827ff068 R hv_guid_timesync +ffffffff827ff078 R hv_guid_heartbeat +ffffffff827ff088 R hv_guid_kvp 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pci_subclass_input +ffffffff8280c770 R pci_subclass_dock +ffffffff8280c7c0 R pci_subclass_processor +ffffffff8280c880 R pci_subclass_serialbus +ffffffff8280c990 R pci_subclass_wireless +ffffffff8280ca70 R pci_subclass_i2o +ffffffff8280caa0 R pci_subclass_satcom +ffffffff8280cb20 R pci_subclass_crypto +ffffffff8280cb80 R pci_subclass_dasp +ffffffff8280cc10 R pci_class +ffffffff8280ce20 r pci_known_vendors +ffffffff8280e3c0 r pci_known_products +ffffffff82831000 R vga_pci_ca +ffffffff82831030 r vga_devs +ffffffff82832000 R ahc_pci_ident_table +ffffffff828325d0 R ahc_pci_ca +ffffffff82833000 R ahd_pci_ident_table +ffffffff82833198 R ahd_num_pci_devs +ffffffff828331a0 R ahd_pci_ca +ffffffff828331d0 r pci_bus_modes +ffffffff82833210 r pci_status_strings +ffffffff82833250 r pci_status_source +ffffffff82833290 r split_status_strings +ffffffff82834000 R adw_pci_ca +ffffffff82834028 R adw_pci_devices +ffffffff82835000 r adw_3550_Default_EEPROM +ffffffff82835080 r adw_38C0800_Default_EEPROM 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mfii_ca +ffffffff82842028 R mfii_switch +ffffffff82842050 R mfii_pd_switch +ffffffff82842078 R mfii_iop_thunderbolt +ffffffff82842088 R mfii_iop_25 +ffffffff82842098 R mfii_iop_35 +ffffffff828420b0 R mfii_devices +ffffffff82842140 r mfi_bbu_indicators +ffffffff82843000 R ips_ca +ffffffff82843028 r ips_ids +ffffffff82843040 r ips_chips +ffffffff82843090 r ips_names +ffffffff82843128 r ips_switch +ffffffff82843150 r ips_pt_switch +ffffffff82844000 R eap_ca +ffffffff82844028 R eap1370_hw_if +ffffffff828440e0 R eap1371_hw_if +ffffffff82844198 R eap_midi_hw_if +ffffffff828441d0 R eap_devices +ffffffff82845000 R auacer_pci_devices +ffffffff82845008 R auacer_ca +ffffffff82845030 R auacer_hw_if +ffffffff82846000 R auich_ca +ffffffff82846028 R auich_hw_if +ffffffff828460e0 r auich_devices +ffffffff82847000 R azalia_ca +ffffffff82847028 R azalia_hw_if +ffffffff828470e0 R azalia_pci_devices +ffffffff82847110 r pin_devices +ffffffff82847190 r line_colors +ffffffff82847210 r wtypes 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auvia_devices +ffffffff8284e0f0 r auvia_set_params_sub.slottab +ffffffff8284f000 R gdt_pci_ca +ffffffff82850000 R ciss_pci_ca +ffffffff82850030 R ciss_pci_devices +ffffffff82851000 R qlw_pci_ca +ffffffff82851030 r qlw_devices +ffffffff82851050 r isp_1040_risc_code +ffffffff828569f0 r isp_1080_risc_code +ffffffff8285e470 r isp_12160_risc_code +ffffffff82866000 R qla_pci_ca +ffffffff82866030 r qla_devices +ffffffff82867000 R qle_ca +ffffffff82867028 R qle_switch +ffffffff82867050 r qle_devices +ffffffff82867070 r isp_2400_risc_code +ffffffff82896a50 r isp_2500_risc_code +ffffffff828c9000 R mpi_pci_ca +ffffffff828c9030 r mpi_devices +ffffffff828ca000 R mpii_ca +ffffffff828ca028 R mpii_switch +ffffffff828ca050 r mpii_devices +ffffffff828cb000 R sili_pci_ca +ffffffff828cb030 r sili_devices +ffffffff828cc000 R aq_devices +ffffffff828cc060 R aq_products +ffffffff828cc1d0 R aq_fw1x_ops +ffffffff828cc1f8 R aq_fw2x_ops +ffffffff828cc220 R aq2_fw_ops +ffffffff828cc248 R aq_ca +ffffffff828cd000 R de_ca +ffffffff828cd030 r tulip_srom_conninfo +ffffffff828cd120 r tulip_mii_phy_attrlist +ffffffff828cd1e0 r tulip_21140_znyx_zx34x_boardsw +ffffffff828cd208 r tulip_21040_10baset_only_boardsw +ffffffff828cd230 r tulip_21040_boardsw +ffffffff828cd258 r tulip_2114x_isv_boardsw +ffffffff828cd280 r tulip_21140_smc9332_boardsw +ffffffff828cd2a8 r tulip_21040_auibnc_only_boardsw +ffffffff828cd2d0 r tulip_21140_cogent_em100_boardsw +ffffffff828cd2f8 r tulip_21140_accton_boardsw +ffffffff828cd320 r tulip_21140_eb_boardsw +ffffffff828cd348 r tulip_21041_boardsw +ffffffff828cd370 r tulip_srom_mediums +ffffffff828cd3c0 r tulip_read_macaddr.testpat +ffffffff828cd3d0 r tulip_vendors +ffffffff828cd480 r tulip_media_to_ifmedia +ffffffff828cd4e0 r tulip_chipdescs +ffffffff828ce000 R ep_pci_ca +ffffffff828ce030 R ep_pci_devices +ffffffff828cf000 R pcn_ca +ffffffff828cf028 R pcn_devices +ffffffff828cf030 r pcn_79c970_rcvfw +ffffffff828cf050 r pcn_79c970_xmtsp +ffffffff828cf070 r pcn_79c970_xmtfw +ffffffff828cf090 r pcn_79c971_rcvfw +ffffffff828cf0b0 r pcn_79c971_xmtsp_sram +ffffffff828cf0d0 r pcn_79c971_xmtsp +ffffffff828cf0f0 r pcn_79c971_xmtfw +ffffffff828cf110 r pcn_variants +ffffffff828d0000 R siop_products +ffffffff828d1000 R siop_pci_ca +ffffffff828d2000 R rdcide_setup +ffffffff828d2005 R rdcide_hold +ffffffff828d200a R rdcide_udmatim +ffffffff828d2010 R rdcide_udmaclk +ffffffff828d2028 R default_product_desc +ffffffff828d2040 R pciide_intel_products +ffffffff828d2630 R pciide_amd_products +ffffffff828d2690 R pciide_cmd_products +ffffffff828d2730 R pciide_via_products +ffffffff828d2810 R pciide_cypress_products +ffffffff828d2820 R pciide_sis_products +ffffffff828d2870 R pciide_natsemi_products +ffffffff828d2890 R pciide_acer_products +ffffffff828d28a0 R pciide_triones_products +ffffffff828d28f0 R pciide_promise_products +ffffffff828d2ac0 R pciide_acard_products +ffffffff828d2b10 R pciide_serverworks_products +ffffffff828d2bb0 R pciide_nvidia_products +ffffffff828d2e80 R pciide_ite_products +ffffffff828d2ea0 R pciide_ati_products +ffffffff828d2f20 R pciide_jmicron_products +ffffffff828d2f70 R pciide_phison_products +ffffffff828d2f80 R pciide_rdc_products +ffffffff828d2f90 R pciide_vendors +ffffffff828d3140 R pciide_pci_ca +ffffffff828d3168 R pciide_jmb_ca +ffffffff828d3190 r piix_isp_dma +ffffffff828d3193 r piix_rtc_dma +ffffffff828d3196 r apollo_pio_set +ffffffff828d319b r cmd0643_9_data_tim_pio +ffffffff828d31a0 r cmd0643_9_data_tim_dma +ffffffff828d31a3 r cmd680_channel_map.init_val +ffffffff828d31b1 r cmd680_setup_channel.udma2_tbl +ffffffff828d31b8 r cmd680_setup_channel.dma_tbl +ffffffff828d31be r cmd680_setup_channel.pio_tbl +ffffffff828d31d0 r satalink_ba5_regmap +ffffffff828d3690 r sii3114_chansetup.channel_names +ffffffff828d36b0 r cy_pio_pulse +ffffffff828d36c0 r sis_udma133new_tim +ffffffff828d36e0 r sis_pio133new_tim +ffffffff828d36f4 r sis_dma133new_tim +ffffffff828d3700 r sis_udma66_tim +ffffffff828d3706 r sis_udma100new_tim +ffffffff828d370c r sis_udma133old_tim +ffffffff828d3713 r sis_pio_act +ffffffff828d3718 r sis_pio_rec +ffffffff828d371d r natsemi_pio_pulse +ffffffff828d3722 r natsemi_pio_recover +ffffffff828d3727 r natsemi_dma_pulse +ffffffff828d372a r natsemi_dma_recover +ffffffff828d3730 r scx200_udma33 +ffffffff828d373c r scx200_dma33 +ffffffff828d3750 r scx200_pio33 +ffffffff828d3778 r acer_udma +ffffffff828d377e r acer_pio +ffffffff828d3790 r hpt370_pio +ffffffff828d37a4 r hpt370_dma +ffffffff828d37b0 r hpt370_udma +ffffffff828d37d0 r hpt372_pio +ffffffff828d37e4 r hpt372_dma +ffffffff828d37f0 r hpt372_udma +ffffffff828d380c r hpt366_dma +ffffffff828d3820 r hpt366_udma +ffffffff828d3840 r hpt374_pio +ffffffff828d3854 r hpt374_dma +ffffffff828d3860 r hpt374_udma +ffffffff828d387c r pdc2xx_pa +ffffffff828d3881 r pdc2xx_pb +ffffffff828d3886 r pdc2xx_dma_mb +ffffffff828d3889 r pdc2xx_dma_mc +ffffffff828d388c r pdc2xx_udma_mc +ffffffff828d3892 r acard_act_udma +ffffffff828d3899 r acard_rec_udma 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jpnbcst +ffffffff828dd460 r jpncable +ffffffff828dd4c0 r xussr +ffffffff828dd530 r australia +ffffffff828dd590 r france +ffffffff828de000 R xl_pci_ca +ffffffff828de030 R xl_pci_devices +ffffffff828df000 R fxp_pci_ca +ffffffff828df030 R fxp_pci_devices +ffffffff828e0000 R em_devices +ffffffff828e02e0 R em_ca +ffffffff828e0310 r em_counters +ffffffff828e1000 r em_igp_cable_length_table +ffffffff828e1100 r em_igp_2_cable_length_table +ffffffff828e2000 R ixgb_devices +ffffffff828e2010 R ixgb_ca +ffffffff828e3000 R ixgbe_devices +ffffffff828e30b8 R ix_ca +ffffffff828e30e0 r ix_counters +ffffffff828e33e0 r ix_rxq_kstats_tpl +ffffffff828e3458 r ix_txq_kstats_tpl +ffffffff828e4000 r ixgbe_mvals_base +ffffffff828e4060 r ixgbe_mvals_X540 +ffffffff828e40c0 r ixgbe_mvals_X550 +ffffffff828e4120 r ixgbe_mvals_X550EM_x +ffffffff828e4180 r ixgbe_mvals_X550EM_a +ffffffff828e7000 R ixl_ca +ffffffff828e7030 R ixl_port_counters +ffffffff828e72c0 R ixl_vsi_counters +ffffffff828e7380 r ixl_devices +ffffffff828e74c0 r ixl_710 +ffffffff828e74e8 r ixl_722 +ffffffff828e7510 r ixl_pf_aq_regs +ffffffff828e7578 r ixl_710_decrepit +ffffffff828e75a0 r ixl_phy_type_map +ffffffff828e7770 r ixl_speed_type_map +ffffffff828e77b0 r ixl_hmc_pack_rxq +ffffffff828e7830 r ixl_hmc_pack_txq +ffffffff828e78a0 r ixl_sfp_ops +ffffffff828e78b8 r ixl_qsfp_ops +ffffffff828e8000 R xge_ca +ffffffff828e8028 R xge_devices +ffffffff828e8030 r xge_fix_mac +ffffffff828e8110 r xge_xena_dtx_cfg +ffffffff828e8170 r xge_herc_dtx_cfg +ffffffff828e9000 R thtc_ca +ffffffff828e9028 R tht_ca +ffffffff828e9050 r thtc_devices +ffffffff828e9068 r tht_link_state.interval +ffffffff828ea000 R myx_ca +ffffffff828ea028 R myx_devices +ffffffff828eb000 R oce_ca +ffffffff828eb030 R oce_devices +ffffffff828ec000 R dc_pci_ca +ffffffff828ed000 R epic_pci_ca +ffffffff828ed028 R epic_pci_devices +ffffffff828ee000 R ti_pci_ca +ffffffff828ee030 R ti_devices +ffffffff828ef000 R ne_pci_ca +ffffffff828ef030 R ne_pci_prod +ffffffff828f0000 R gem_pci_ca +ffffffff828f0030 R gem_pci_devices +ffffffff828f0050 r gem_promhdr +ffffffff828f0052 r gem_promdat +ffffffff828f005a r gem_promdat2 +ffffffff828f1000 R cas_ca +ffffffff828f1028 R cas_pci_devices +ffffffff828f1030 r cas_promhdr +ffffffff828f1032 r cas_promdat_sun +ffffffff828f103a r cas_promdat_ns +ffffffff828f1042 r cas_promdat2 +ffffffff828f2000 R sf_pci_ca +ffffffff828f2028 R sf_pci_products +ffffffff828f3000 R sis_ca +ffffffff828f3028 R sis_devices +ffffffff828f4000 R se_devices +ffffffff828f4008 R se_ca +ffffffff828f5000 R uhci_pci_ca +ffffffff828f6000 R ohci_pci_ca +ffffffff828f7000 R ehci_pci_ca +ffffffff828f8000 R xhci_pci_ca +ffffffff828f9000 R cbb_pci_ca +ffffffff828f9028 r pccbb_pcmcia_do_io_map.pcic_iowidth +ffffffff828fa000 R skc_devices +ffffffff828fa030 R skc_ca +ffffffff828fa058 R sk_ca +ffffffff828fb000 R mskc_devices +ffffffff828fb0a8 R mskc_ca +ffffffff828fb0d0 R msk_ca +ffffffff828fb100 r msk_mib +ffffffff828fc000 R puc_pci_ca +ffffffff828fd000 R puc_devs +ffffffff82902000 R com_puc_ca +ffffffff82902030 r puc_port_types +ffffffff82903000 R lpt_puc_ca +ffffffff82904000 R wi_pci_ca +ffffffff82904030 r wi_pci_products +ffffffff82905000 R an_pci_ca +ffffffff82905030 R an_pci_devices +ffffffff82906000 R iwi_devices +ffffffff82906010 R iwi_ca +ffffffff82907000 R wpi_ca +ffffffff82907028 r wpi_devices +ffffffff82907030 r wpi_rates +ffffffff82907050 r wpi_rf_gain_5ghz +ffffffff829070a0 r wpi_dsp_gain_5ghz +ffffffff829070f0 r wpi_rf_gain_2ghz +ffffffff82907140 r wpi_dsp_gain_2ghz +ffffffff82907190 r wpi_pmgt +ffffffff82907310 r wpi_bands +ffffffff82908000 R iwn_mcs2ridx +ffffffff82908020 R iwn_ca +ffffffff82908050 r iwn_devices +ffffffff829080e8 r iwn4965_sensitivity_limits +ffffffff82908124 r iwn5000_sensitivity_limits +ffffffff82908160 r iwn5150_sensitivity_limits +ffffffff8290819c r iwn1000_sensitivity_limits +ffffffff829081d8 r iwn6000_sensitivity_limits +ffffffff82908214 r iwn2000_sensitivity_limits +ffffffff82908250 r iwn_fw_errmsg +ffffffff82908340 r iwn4965_set_txpower.tdiv +ffffffff82908360 r iwn4965_rf_gain_5ghz +ffffffff829083d0 r iwn4965_dsp_gain_5ghz +ffffffff82908440 r iwn4965_dsp_gain_2ghz +ffffffff829084b0 r iwn_pmgt +ffffffff829086f0 r iwn4965_post_alive.qid2fifo +ffffffff82908700 r iwn_bands +ffffffff82908770 r iwn_rates +ffffffff82908820 r iwn4965_rf_gain_2ghz +ffffffff82909000 R iwm_nvm_channels +ffffffff82909030 R iwm_nvm_channels_8000 +ffffffff82909070 R iwm_rates +ffffffff829090d0 R iwm_ht_mcs2ridx +ffffffff82909110 R iwm_tid_to_ac +ffffffff82909118 R iwm_ac_to_tx_fifo +ffffffff82909120 R iwm_nvm_to_read +ffffffff82909144 r iwm_set_hw_address_8000.reserved_mac +ffffffff82909180 r iwm_sf_full_timeout +ffffffff829091b0 r iwm_sf_full_timeout_def +ffffffff829091e0 r advanced_lookup +ffffffff82909320 r iwm_devices +ffffffff82909360 R iwm_ca +ffffffff8290a000 R iwx_9560_quz_a0_jf_b0_cfg +ffffffff8290a020 R iwx_9560_qu_c0_jf_b0_cfg +ffffffff8290a040 R iwx_qu_b0_hr1_b0 +ffffffff8290a060 R iwx_qu_b0_hr_b0 +ffffffff8290a080 R iwx_ax201_cfg_qu_hr +ffffffff8290a0a0 R iwx_qu_c0_hr1_b0 +ffffffff8290a0c0 R iwx_qu_c0_hr_b0 +ffffffff8290a0e0 R iwx_ax201_cfg_qu_c0_hr_b0 +ffffffff8290a100 R iwx_quz_a0_hr1_b0 +ffffffff8290a120 R iwx_ax201_cfg_quz_hr +ffffffff8290a140 R iwx_cfg_so_a0_hr_b0 +ffffffff8290a160 R iwx_cfg_quz_a0_hr_b0 +ffffffff8290a180 R iwx_2ax_cfg_so_gf_a0 +ffffffff8290a1a0 R iwx_2ax_cfg_so_gf_a0_long +ffffffff8290a1c0 R iwx_2ax_cfg_so_gf4_a0 +ffffffff8290a1e0 R iwx_2ax_cfg_so_gf4_a0_long +ffffffff8290a200 R iwx_2ax_cfg_ty_gf_a0 +ffffffff8290a220 R iwx_2ax_cfg_so_jf_b0 +ffffffff8290a240 R iwx_nvm_channels_8000 +ffffffff8290a280 R iwx_rates +ffffffff8290a2e0 R iwx_mcs2ridx +ffffffff8290a320 R iwx_tid_to_ac +ffffffff8290a328 R iwx_ac_to_tx_fifo +ffffffff8290a330 r iwx_nvm_channels_uhb +ffffffff8290a39e r iwx_is_valid_mac_addr.reserved_mac +ffffffff8290a3b0 r iwx_sf_full_timeout +ffffffff8290a3e0 r iwx_sf_full_timeout_def +ffffffff8290a410 r advanced_lookup +ffffffff8290a550 r iwx_devices +ffffffff8290a590 r iwx_dev_info_table +ffffffff8290ade8 R iwx_ca +ffffffff8290b000 R cmpci_ca +ffffffff8290b028 R cmpci_hw_if +ffffffff8290b0e0 r cmpci_rate_table +ffffffff8290b120 R cmpci_devices +ffffffff8290b130 r cmpci_query_devinfo.mixer_port_names +ffffffff8290b160 r cmpci_query_devinfo.mixer_classes +ffffffff8290c000 R iha_pci_ca +ffffffff8290c028 R iha_switch +ffffffff8290d000 R pcscp_ca +ffffffff8290e000 R bge_ca +ffffffff8290e030 R bge_devices +ffffffff8290e1b0 r bge_revisions +ffffffff8290e610 r bge_majorrevs +ffffffff8290f000 R bnx_devices +ffffffff8290f020 R bnx_ca +ffffffff82910000 R vge_ca +ffffffff82910028 R vge_devices +ffffffff82911000 R stge_ca +ffffffff82911028 R stge_mii_bitbang_ops +ffffffff82911050 R stge_devices +ffffffff82912000 R nfe_ca +ffffffff82912030 R nfe_devices +ffffffff82913000 R et_devices +ffffffff82913008 R et_ca +ffffffff82914000 R jme_devices +ffffffff82914008 R jme_ca +ffffffff82915000 R age_devices +ffffffff82915008 R age_ca +ffffffff82916000 R alc_devices +ffffffff82916038 R alc_ca +ffffffff82917000 R ale_devices +ffffffff82917008 R ale_ca +ffffffff82918000 R amdpm_ca +ffffffff82918030 R amdpm_ids +ffffffff82919000 R bce_ca +ffffffff82919028 R bce_devices +ffffffff8291a000 R ath_pci_ca +ffffffff8291b000 R athn_pci_ca +ffffffff8291b030 r athn_pci_devices +ffffffff8291c000 R atw_pci_ca +ffffffff8291c028 R atw_pci_devices +ffffffff8291d000 R rtw_pci_ca +ffffffff8291d030 R rtw_pci_products +ffffffff8291e000 R rtwn_pci_ca +ffffffff8291e030 r rtwn_pci_devices +ffffffff8291e040 r rtl8188eu_mac +ffffffff8291e1b0 r rtl8192cu_mac +ffffffff8291e310 r rtl8192ce_mac +ffffffff8291e458 r rtl8188eu_bb_prog +ffffffff8291e480 r rtl8723a_bb_prog +ffffffff8291e4a8 r rtl8192ce_bb_prog_1t +ffffffff8291e4d0 r rtl8192ce_bb_prog_2t +ffffffff8291e500 r rtl8188eu_bb_regs +ffffffff8291e680 r rtl8188eu_bb_vals +ffffffff8291e980 r rtl8188eu_agc_vals +ffffffff8291eb80 r rtl8723a_bb_regs +ffffffff8291ed00 r rtl8723a_bb_vals +ffffffff8291eff0 r rtl8192ce_agc_vals +ffffffff8291f270 r rtl8192ce_bb_regs +ffffffff8291f3f0 r rtl8192ce_bb_vals_1t +ffffffff8291f6e0 r rtl8192ce_bb_vals_2t +ffffffff82920000 R ral_pci_ca +ffffffff82920030 R ral_pci_devices +ffffffff82921000 R acx_pci_ca +ffffffff82921028 R acx_pci_devices +ffffffff82922000 R pgt_pci_ca +ffffffff82922028 R pgt_pci_devices +ffffffff82923000 R malo_pci_ca +ffffffff82923028 R malo_pci_devices +ffffffff82924000 R bwi_pci_ca +ffffffff82924030 R bwi_pci_devices +ffffffff82925000 R piixpm_ca +ffffffff82925030 R piixpm_ids +ffffffff82926000 R vic_ca +ffffffff82926028 R vic_devices +ffffffff82927000 R vmx_devices +ffffffff82927008 R vmx_ca +ffffffff82927030 r vmx_tx_kstat_tpl +ffffffff829270d0 r vmx_kstat_rate +ffffffff829270e0 r vmx_rx_kstat_tpl +ffffffff82928000 R vmwpvs_ca +ffffffff82928028 R vmwpvs_switch +ffffffff82929000 R lii_ca +ffffffff82929028 R lii_devices +ffffffff8292a000 R ichiic_ca +ffffffff8292a030 R ichiic_ids +ffffffff8292b000 R viapm_ca +ffffffff8292b030 R viapm_ids +ffffffff8292b070 r val_to_temp +ffffffff8292b870 r val_to_uV.mult +ffffffff8292c000 R amdiic_ca +ffffffff8292c028 R amdiic_ids +ffffffff8292d000 R nviic_ca +ffffffff8292d030 R nviic_ids +ffffffff8292e000 R sdhc_pci_ca +ffffffff8292f000 R kate_ca +ffffffff8292f030 r kate_proc +ffffffff82930000 R km_ca +ffffffff82930030 r km_devices +ffffffff82931000 R ksmn_ca +ffffffff82931030 r ksmn_devices +ffffffff82932000 R iosf_pci_ca +ffffffff82933000 R itherm_devices +ffffffff82933008 R itherm_ca +ffffffff82934000 R pchtemp_ca +ffffffff82934030 R pchtemp_devices +ffffffff82935000 R rtsx_pci_ca +ffffffff82936000 R xspd_ca +ffffffff82936028 R xspd_devices +ffffffff82937000 R virtio_pci_ca +ffffffff82938000 R dwiic_pci_ca +ffffffff82938030 R dwiic_pci_ids +ffffffff82939000 R bwfm_pci_ca +ffffffff82939030 r bwfm_pci_devices +ffffffff8293a000 R ccp_pci_ca +ffffffff8293a030 r ccp_pci_devices +ffffffff8293b000 R bnxt_devices +ffffffff8293b040 R bnxt_ca +ffffffff8293c000 R mcx_ca +ffffffff8293c030 r mcx_devices +ffffffff8293c060 r mcx_rss_config +ffffffff8293c0d0 r mcx_eth_cap_map +ffffffff8293c2d0 r mcx_kstat_ppcnt_ieee8023 +ffffffff8293c2e8 r mcx_kstat_ppcnt_rfc2863 +ffffffff8293c300 r mcx_kstat_ppcnt_rfc2819 +ffffffff8293c318 r mcx_kstat_ppcnt_rfc3635 +ffffffff8293c330 r mcx_ppcnt_ieee8023_tpl +ffffffff8293c4b0 r mcx_ppcnt_rfc2863_tpl +ffffffff8293c5c0 r mcx_ppcnt_rfc2819_tpl +ffffffff8293c770 r mcx_ppcnt_rfc3635_tpl +ffffffff8293c8b0 r mcx_kstat_mtmp_tpl +ffffffff8293c950 r mcx_kstat_mtmp_rate +ffffffff8293c960 r mcx_queue_kstat_tpl +ffffffff8293d000 R iavf_ca +ffffffff8293d030 r iavf_devices +ffffffff8293d040 r iavf_aq_regs +ffffffff8293d0b0 r iavf_link_speeds +ffffffff8293e000 R rge_ca +ffffffff8293e028 R rge_devices +ffffffff8293e030 r rtl8125_mac_cfg2_ephy +ffffffff8293e090 r rge_phy_config_mac_cfg3.mac_cfg3_a438_value +ffffffff8293e0b0 r rge_phy_config_mac_cfg3.mac_cfg3_b88e_value +ffffffff8293e110 r rge_phy_config_mac_cfg4.mac_cfg4_b87c_value +ffffffff8293e170 r rtl8125_mac_cfg4_ephy +ffffffff8293e1e0 r rtl8125_mac_cfg2_mcu +ffffffff8293ee80 r rtl8125_mac_cfg3_mcu +ffffffff8293f720 r rtl8125_mac_cfg4_mcu +ffffffff82941d10 r rtl8125_mac_cfg5_mcu +ffffffff82942c10 r rtl8125_mac_bps +ffffffff82942f80 r rtl8125b_mac_bps +ffffffff82943120 r rge_kstats_tpl +ffffffff82944000 R igc_devices +ffffffff82944040 R igc_ca +ffffffff82945000 R ngbe_devices +ffffffff82945008 R ngbe_ca +ffffffff82946000 R com_pci_ca +ffffffff82946030 R com_pci_ids +ffffffff82947000 r agp_attach.agp_max +ffffffff82947048 R agp_ca +ffffffff82948000 R intagp_ca +ffffffff82949000 r drm_plane_create_rotation_property.props +ffffffff8294a000 r drm_bridge_priv_state_funcs +ffffffff8294c000 r color_encoding_name +ffffffff8294c020 r color_range_name +ffffffff8294d000 r drm_subpixel_enum_list +ffffffff8294d060 r drm_dpms_enum_list +ffffffff8294d0a0 r drm_dvi_i_select_enum_list +ffffffff8294d0d0 r drm_dvi_i_subconnector_enum_list +ffffffff8294d100 r drm_tv_select_enum_list +ffffffff8294d150 r drm_tv_subconnector_enum_list +ffffffff8294d1a0 r drm_dp_subconnector_enum_list +ffffffff8294d210 r drm_link_status_enum_list +ffffffff8294d230 r drm_scaling_mode_enum_list +ffffffff8294d270 r drm_aspect_ratio_enum_list +ffffffff8294d2a0 r hdmi_colorspaces +ffffffff8294d370 r dp_colorspaces +ffffffff8294d450 r drm_content_type_enum_list +ffffffff8294d4a0 r drm_panel_orientation_enum_list +ffffffff8294d4e0 r privacy_screen_enum +ffffffff8294e000 r drm_crtc_fence_ops +ffffffff8294f000 r drm_dmt_modes +ffffffff82951940 r edid_cea_modes_1 +ffffffff829554d0 r edid_cea_modes_193 +ffffffff82956180 r edid_quirk_list +ffffffff82956350 r edid_4k_modes +ffffffff829565b0 r edid_est_modes +ffffffff82956db0 r est3_modes +ffffffff82956f10 r stereo_mandatory_modes +ffffffff82956f90 r extra_modes +ffffffff82957000 r drm_encoder_enum_list +ffffffff82958000 r drm_fbdev_client_funcs +ffffffff82958020 r drm_fb_helper_generic_funcs +ffffffff82958028 r drm_fbdev_fb_ops +ffffffff82959000 r drm_fb_xrgb8888_to_rgb332.dst_pixsize +ffffffff82959004 r drm_fb_xrgb8888_to_rgb565.dst_pixsize +ffffffff82959008 r drm_fb_xrgb8888_to_rgb888.dst_pixsize +ffffffff8295900c r drm_fb_xrgb8888_to_xrgb2101010.dst_pixsize +ffffffff82959010 r drm_fb_xrgb8888_to_gray8.dst_pixsize +ffffffff82959014 r drm_fb_rgb888_to_xrgb8888.dst_pixsize +ffffffff82959018 r drm_fb_rgb565_to_xrgb8888.dst_pixsize +ffffffff8295a000 r __drm_format_info.formats +ffffffff8295b000 R drm_pgops +ffffffff8295c000 r drm_ioctls +ffffffff8295e000 r dma_fence_stub_ops +ffffffff8295e038 R dma_fence_array_ops +ffffffff8295e070 R dma_fence_chain_ops +ffffffff8295e0a8 R dmabufops +ffffffff8295e0e0 R syncfileops +ffffffff8295f000 r drm_plane_type_enum_list +ffffffff82960000 r drm_mode_status_names +ffffffff82961000 r primary_plane_funcs +ffffffff82961068 r safe_modeset_formats +ffffffff82962000 r orientation_data +ffffffff829655c0 r lcd800x1280_rightside_up +ffffffff829655d8 r lcd720x1280_rightside_up +ffffffff829655f0 r lcd800x1280_leftside_up +ffffffff82965608 r lcd1080x1920_leftside_up +ffffffff82965620 r lcd1200x1920_rightside_up +ffffffff82965638 r gpd_micropc +ffffffff82965650 r gpd_pocket +ffffffff82965668 r gpd_pocket2 +ffffffff82965680 r gpd_win +ffffffff82965698 r gpd_win2 +ffffffff829656b0 r itworks_tw891 +ffffffff829656c8 r lcd1600x2560_rightside_up +ffffffff829656e0 r onegx1_pro +ffffffff829656f8 r lcd1600x2560_leftside_up +ffffffff82965710 r lcd1280x1920_rightside_up +ffffffff82965728 r .compoundliteral +ffffffff82965738 r .compoundliteral.5 +ffffffff82965760 r .compoundliteral.9 +ffffffff82965780 r .compoundliteral.17 +ffffffff829657c0 r .compoundliteral.21 +ffffffff829657e0 r .compoundliteral.23 +ffffffff829657f0 r .compoundliteral.25 +ffffffff82966000 r drm_gem_prime_dmabuf_ops +ffffffff82968000 r is_hdmi_adaptor.dp_dual_mode_hdmi_id +ffffffff82969000 r drm_dp_phy_name.phy_names +ffffffff82969048 r drm_dp_i2c_algo +ffffffff82969058 r drm_dp_i2c_lock_ops +ffffffff82969070 r dp_aux_bl_ops +ffffffff82969090 r dpcd_quirk_list +ffffffff82969320 r drm_dp_psr_setup_time.psr_setup_time_us +ffffffff8296a000 R drm_dp_mst_topology_state_funcs +ffffffff8296a020 r drm_dp_mst_req_type_str.req_type_str +ffffffff8296a1f0 r drm_dp_mst_sideband_tx_state_str.sideband_reason_str +ffffffff8296a220 r drm_dp_mst_nak_reason_str.nak_reason_str +ffffffff8296a278 r drm_dp_mst_i2c_algo +ffffffff8296b000 r hdmi_colorimetry_val +ffffffff8296c000 r ttm_bo_init_reserved.sys_mem +ffffffff8296d000 r ttm_bo_pipeline_gutting.sys_mem +ffffffff8296e018 R ttm_bo_vm_ops +ffffffff8296f000 r ttm_range_manager_func +ffffffff82970018 r ttm_kmap_iter_io_ops +ffffffff82970030 r ttm_kmap_iter_linear_io_ops +ffffffff82971000 r ttm_sys_manager_func +ffffffff82972000 r ttm_kmap_iter_tt_ops +ffffffff82973000 r drm_sched_fence_ops_scheduled +ffffffff82973038 r drm_sched_fence_ops_finished +ffffffff82974000 R ch7017_ops +ffffffff82975000 R ch7xxx_ops +ffffffff82975060 r ch7xxx_ids +ffffffff82976000 R ivch_ops +ffffffff82976060 r backup_addresses +ffffffff82977000 R ns2501_ops +ffffffff82977060 r mode_agnostic_values +ffffffff829770e0 r ns2501_modes +ffffffff82978000 R sil164_ops +ffffffff82979000 R tfp410_ops +ffffffff8297a000 r chv_dpll +ffffffff8297a050 r vlv_dpll +ffffffff8297a0a0 r g4x_dpll +ffffffff8297a0f0 r pch_dpll +ffffffff8297a138 r intel_dp_enc_funcs +ffffffff8297b000 r intel_hdmi_enc_funcs +ffffffff8297c000 r vlv_primary_formats +ffffffff8297c030 r ivb_primary_formats +ffffffff8297c050 r i965_primary_formats +ffffffff8297c070 r i8xx_primary_formats +ffffffff8297c080 r i965_plane_funcs +ffffffff8297c0e8 r i8xx_plane_funcs +ffffffff8297d000 r gen11_dsi_encoder_funcs +ffffffff8297d020 r gen11_dsi_connector_funcs +ffffffff8297d098 r gen11_dsi_connector_helper_funcs +ffffffff8297d0e8 r gen11_dsi_host_ops +ffffffff8297e000 r intel_plane_helper_funcs +ffffffff8297f000 r g4x_audio_funcs +ffffffff8297f010 r ilk_audio_funcs +ffffffff8297f020 r hsw_audio_funcs +ffffffff8297f030 r hdmi_audio_clock +ffffffff8297f0a0 r dp_aud_n_m +ffffffff8297f250 r hdmi_aud_ncts_36bpp +ffffffff8297f330 r hdmi_aud_ncts_30bpp +ffffffff8297f410 r hdmi_aud_ncts_24bpp +ffffffff82980000 r intel_backlight_device_ops +ffffffff82980018 r bxt_pwm_funcs +ffffffff82980048 r cnp_pwm_funcs +ffffffff82980078 r lpt_pwm_funcs +ffffffff829800a8 r spt_pwm_funcs +ffffffff829800d8 r pch_pwm_funcs +ffffffff82980108 r ext_pwm_funcs +ffffffff82980138 r vlv_pwm_funcs +ffffffff82980168 r i965_pwm_funcs +ffffffff82980198 r i9xx_pwm_funcs +ffffffff829801c8 r pwm_bl_funcs +ffffffff82981000 r bdb_blocks +ffffffff82981160 r translate_iboost.mapping +ffffffff82981163 r adlp_ddc_pin_map +ffffffff8298116a r adls_ddc_pin_map +ffffffff82981170 r rkl_pch_tgp_ddc_pin_map +ffffffff82981175 r icp_ddc_pin_map +ffffffff8298117f r cnp_ddc_pin_map +ffffffff82982000 r mtl_sa_info +ffffffff82982006 r adlp_sa_info +ffffffff8298200c r adls_sa_info +ffffffff82982012 r rkl_sa_info +ffffffff82982018 r tgl_sa_info +ffffffff82982020 r intel_bw_funcs +ffffffff82983000 r intel_cdclk_funcs +ffffffff82983010 r dg2_cdclk_table +ffffffff829830c0 r adlp_a_step_cdclk_table +ffffffff82983140 r adlp_cdclk_table +ffffffff82983200 r rkl_cdclk_table +ffffffff829832f0 r icl_cdclk_table +ffffffff829833e0 r glk_cdclk_table +ffffffff82983410 r bxt_cdclk_table +ffffffff82983458 r tgl_cdclk_funcs +ffffffff82983478 r ehl_cdclk_funcs +ffffffff82983498 r icl_cdclk_funcs +ffffffff829834b8 r bxt_cdclk_funcs +ffffffff829834d8 r skl_cdclk_funcs +ffffffff829834f8 r bdw_cdclk_funcs +ffffffff82983518 r hsw_cdclk_funcs +ffffffff82983538 r chv_cdclk_funcs +ffffffff82983558 r vlv_cdclk_funcs +ffffffff82983578 r fixed_400mhz_cdclk_funcs +ffffffff82983598 r ilk_cdclk_funcs +ffffffff829835b8 r gm45_cdclk_funcs +ffffffff829835d8 r g33_cdclk_funcs +ffffffff829835f8 r g33_get_cdclk.div_3200 +ffffffff829835fe r g33_get_cdclk.div_4000 +ffffffff82983604 r g33_get_cdclk.div_4800 +ffffffff8298360a r g33_get_cdclk.div_5333 +ffffffff82983610 r i965gm_cdclk_funcs +ffffffff82983630 r i965gm_get_cdclk.div_3200 +ffffffff82983633 r i965gm_get_cdclk.div_4000 +ffffffff82983636 r i965gm_get_cdclk.div_5333 +ffffffff82983640 r pnv_cdclk_funcs +ffffffff82983660 r i945gm_cdclk_funcs +ffffffff82983680 r i915gm_cdclk_funcs +ffffffff829836a0 r i915g_cdclk_funcs +ffffffff829836c0 r i865g_cdclk_funcs +ffffffff829836e0 r i85x_cdclk_funcs +ffffffff82983700 r i845g_cdclk_funcs +ffffffff82983720 r i830_cdclk_funcs +ffffffff82984000 r chv_color_funcs +ffffffff82984028 r i965_color_funcs +ffffffff82984050 r i9xx_color_funcs +ffffffff82984078 r icl_color_funcs +ffffffff829840a0 r glk_color_funcs +ffffffff829840c8 r skl_color_funcs +ffffffff829840f0 r bdw_color_funcs +ffffffff82984118 r hsw_color_funcs +ffffffff82984140 r ivb_color_funcs +ffffffff82984168 r ilk_color_funcs +ffffffff82984190 r ilk_csc_off_zero +ffffffff829841a0 r ilk_csc_coeff_rgb_to_ycbcr +ffffffff829841b2 r ilk_csc_postoff_rgb_to_ycbcr +ffffffff829841c0 r ilk_csc_coeff_limited_range +ffffffff829841d2 r ilk_csc_postoff_limited_range +ffffffff829841e0 r ilk_csc_coeff_identity +ffffffff82985000 r icl_procmon_values +ffffffff82986000 r force_audio_names +ffffffff82986040 r broadcast_rgb_names +ffffffff82987000 r intel_crt_connector_funcs +ffffffff82987078 r intel_crt_enc_funcs +ffffffff82987098 r intel_crt_connector_helper_funcs +ffffffff829870f0 r intel_spurious_crt_detect +ffffffff82988000 r g4x_crtc_funcs +ffffffff829880c0 r i965_crtc_funcs +ffffffff82988180 r i915gm_crtc_funcs +ffffffff82988240 r i915_crtc_funcs +ffffffff82988300 r i8xx_crtc_funcs +ffffffff829883c0 r bdw_crtc_funcs +ffffffff82988480 r ilk_crtc_funcs +ffffffff82989000 r output_type_str +ffffffff82989060 r output_format_str +ffffffff8298a000 r intel_cursor_plane_funcs +ffffffff8298a068 r intel_cursor_formats +ffffffff8298b000 r intel_ddi_funcs +ffffffff8298b020 r index_to_dp_signal_levels +ffffffff8298b030 r gen9_chicken_trans_reg_by_port.trans +ffffffff8298c000 r tgl_combo_phy_trans_edp_hbr2_hobl +ffffffff8298c010 r _tgl_combo_phy_trans_edp_hbr2_hobl +ffffffff8298c080 r dg2_snps_trans_uhbr +ffffffff8298c090 r dg2_snps_trans +ffffffff8298c0a0 r _dg2_snps_trans_uhbr +ffffffff8298c160 r _dg2_snps_trans +ffffffff8298c1d8 r icl_combo_phy_trans_hdmi +ffffffff8298c1f0 r _icl_combo_phy_trans_hdmi +ffffffff8298c248 r adlp_combo_phy_trans_edp_hbr3 +ffffffff8298c258 r adlp_combo_phy_trans_edp_up_to_hbr2 +ffffffff8298c270 r _adlp_combo_phy_trans_dp_hbr2_edp_hbr3 +ffffffff8298c2f0 r _adlp_combo_phy_trans_edp_hbr2 +ffffffff8298c368 r adlp_combo_phy_trans_dp_hbr2_hbr3 +ffffffff8298c378 r adlp_combo_phy_trans_dp_hbr +ffffffff8298c390 r _adlp_combo_phy_trans_dp_hbr2_hbr3 +ffffffff8298c410 r _adlp_combo_phy_trans_dp_hbr +ffffffff8298c488 r tgl_dkl_phy_trans_hdmi +ffffffff8298c4a0 r _tgl_dkl_phy_trans_hdmi +ffffffff8298c518 r adlp_dkl_phy_trans_dp_hbr2_hbr3 +ffffffff8298c528 r adlp_dkl_phy_trans_dp_hbr +ffffffff8298c540 r _adlp_dkl_phy_trans_dp_hbr2_hbr3 +ffffffff8298c5c0 r _adlp_dkl_phy_trans_dp_hbr +ffffffff8298c638 r adls_combo_phy_trans_edp_hbr3 +ffffffff8298c648 r adls_combo_phy_trans_edp_hbr2 +ffffffff8298c660 r _adls_combo_phy_trans_edp_hbr3 +ffffffff8298c6e0 r _adls_combo_phy_trans_edp_hbr2 +ffffffff8298c758 r adls_combo_phy_trans_dp_hbr2_hbr3 +ffffffff8298c768 r tgl_combo_phy_trans_dp_hbr +ffffffff8298c780 r _adls_combo_phy_trans_dp_hbr2_hbr3 +ffffffff8298c800 r _tgl_combo_phy_trans_dp_hbr +ffffffff8298c878 r icl_combo_phy_trans_dp_hbr2_edp_hbr3 +ffffffff8298c888 r icl_combo_phy_trans_edp_hbr2 +ffffffff8298c8a0 r _icl_combo_phy_trans_dp_hbr2_edp_hbr3 +ffffffff8298c920 r _icl_combo_phy_trans_edp_hbr2 +ffffffff8298c998 r rkl_combo_phy_trans_dp_hbr2_hbr3 +ffffffff8298c9a8 r rkl_combo_phy_trans_dp_hbr +ffffffff8298c9c0 r _rkl_combo_phy_trans_dp_hbr2_hbr3 +ffffffff8298ca40 r _rkl_combo_phy_trans_dp_hbr +ffffffff8298cab8 r dg1_combo_phy_trans_dp_hbr2_hbr3 +ffffffff8298cac8 r dg1_combo_phy_trans_dp_rbr_hbr +ffffffff8298cae0 r _dg1_combo_phy_trans_dp_hbr2_hbr3 +ffffffff8298cb60 r _dg1_combo_phy_trans_dp_rbr_hbr +ffffffff8298cbd8 r tgl_uy_combo_phy_trans_dp_hbr2 +ffffffff8298cbe8 r tgl_combo_phy_trans_dp_hbr2 +ffffffff8298cc00 r _tgl_uy_combo_phy_trans_dp_hbr2 +ffffffff8298cc80 r _tgl_combo_phy_trans_dp_hbr2 +ffffffff8298ccf8 r tgl_dkl_phy_trans_dp_hbr2 +ffffffff8298cd08 r tgl_dkl_phy_trans_dp_hbr +ffffffff8298cd20 r _tgl_dkl_phy_trans_dp_hbr2 +ffffffff8298cda0 r _tgl_dkl_phy_trans_dp_hbr +ffffffff8298ce18 r jsl_combo_phy_trans_edp_hbr2 +ffffffff8298ce28 r jsl_combo_phy_trans_edp_hbr +ffffffff8298ce40 r _jsl_combo_phy_trans_edp_hbr2 +ffffffff8298cec0 r _jsl_combo_phy_trans_edp_hbr +ffffffff8298cf38 r ehl_combo_phy_trans_dp +ffffffff8298cf48 r ehl_combo_phy_trans_edp_hbr2 +ffffffff8298cf60 r _ehl_combo_phy_trans_edp_hbr2 +ffffffff8298cfe0 r _ehl_combo_phy_trans_dp +ffffffff8298d058 r icl_mg_phy_trans_hdmi +ffffffff8298d070 r _icl_mg_phy_trans_hdmi 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dg2_edp_r216 +ffffffff829b2240 r dg2_edp_r243 +ffffffff829b2264 r dg2_dp_hbr1_100 +ffffffff829b2288 r dg2_edp_r324 +ffffffff829b22ac r dg2_edp_r432 +ffffffff829b22d0 r dg2_dp_hbr2_100 +ffffffff829b22f4 r dg2_dp_hbr3_100 +ffffffff829b2318 r dg2_dp_uhbr10_100 +ffffffff829b233c r dg2_dp_uhbr13_100 +ffffffff829b2360 r dg2_hdmi_25_175 +ffffffff829b2384 r dg2_hdmi_27_0 +ffffffff829b23a8 r dg2_hdmi_74_25 +ffffffff829b23cc r dg2_hdmi_148_5 +ffffffff829b23f0 r dg2_hdmi_297 +ffffffff829b2414 r dg2_hdmi_594 +ffffffff829b2438 r dg2_hdmi_25200 +ffffffff829b245c r dg2_hdmi_27027 +ffffffff829b2480 r dg2_hdmi_28320 +ffffffff829b24a4 r dg2_hdmi_30240 +ffffffff829b24c8 r dg2_hdmi_31500 +ffffffff829b24ec r dg2_hdmi_36000 +ffffffff829b2510 r dg2_hdmi_40000 +ffffffff829b2534 r dg2_hdmi_49500 +ffffffff829b2558 r dg2_hdmi_50000 +ffffffff829b257c r dg2_hdmi_57284 +ffffffff829b25a0 r dg2_hdmi_58000 +ffffffff829b25c4 r dg2_hdmi_65000 +ffffffff829b25e8 r dg2_hdmi_71000 +ffffffff829b260c r dg2_hdmi_74176 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r snb_sprite_formats +ffffffff829b3108 r snb_sprite_funcs +ffffffff829b3170 r g4x_sprite_formats +ffffffff829b3188 r g4x_sprite_funcs +ffffffff829b31f0 r chv_sprite_update_csc.csc_matrix +ffffffff829b4000 r tc_port_mode_name.names +ffffffff829b5000 r intel_tv_connector_funcs +ffffffff829b5078 r intel_tv_enc_funcs +ffffffff829b5098 r intel_tv_connector_helper_funcs +ffffffff829b50f0 r tv_modes +ffffffff829b5780 r component_levels +ffffffff829b5786 r sdtv_csc_yprpb +ffffffff829b579e r hdtv_csc_yprpb +ffffffff829b57c0 r input_res_table +ffffffff829b57dc r ntsc_m_levels_composite +ffffffff829b57e2 r ntsc_m_levels_svideo +ffffffff829b57e8 r ntsc_m_csc_composite +ffffffff829b5800 r ntsc_m_csc_svideo +ffffffff829b5820 r filter_table +ffffffff829b5b58 r ntsc_j_levels_composite +ffffffff829b5b5e r ntsc_j_levels_svideo +ffffffff829b5b64 r ntsc_j_csc_composite +ffffffff829b5b7c r ntsc_j_csc_svideo +ffffffff829b5b94 r pal_m_levels_composite +ffffffff829b5b9a r pal_m_levels_svideo +ffffffff829b5ba0 r pal_m_csc_composite +ffffffff829b5bb8 r pal_m_csc_svideo +ffffffff829b5bd0 r pal_n_levels_composite +ffffffff829b5bd6 r pal_n_levels_svideo +ffffffff829b5bdc r pal_n_csc_composite +ffffffff829b5bf4 r pal_n_csc_svideo +ffffffff829b5c0c r pal_levels_composite +ffffffff829b5c12 r pal_levels_svideo +ffffffff829b5c18 r pal_csc_composite +ffffffff829b5c30 r pal_csc_svideo +ffffffff829b6000 r calculate_rc_params.ofs_und6 +ffffffff829b600f r calculate_rc_params.ofs_und12 +ffffffff829b601e r calculate_rc_params.ofs_und15 +ffffffff829b6030 r rc_parameters +ffffffff829b7000 r gen12_plane_funcs +ffffffff829b7068 r skl_plane_funcs +ffffffff829b70d0 r icl_program_input_csc.input_csc_matrix +ffffffff829b7110 r icl_hdr_plane_formats +ffffffff829b7190 r icl_sdr_y_plane_formats +ffffffff829b71f0 r icl_sdr_uv_plane_formats +ffffffff829b7260 r glk_planar_formats +ffffffff829b72b0 r skl_plane_formats +ffffffff829b72f0 r skl_planar_formats +ffffffff829b8000 r skl_wm_funcs +ffffffff829b8038 r intel_dbuf_funcs +ffffffff829b8050 r dg2_allowed_dbufs +ffffffff829b80b0 r adlp_allowed_dbufs +ffffffff829b8120 r tgl_allowed_dbufs +ffffffff829b8180 r icl_allowed_dbufs +ffffffff829b9000 r intel_dsi_funcs +ffffffff829b9020 r intel_dsi_host_ops +ffffffff829b9038 r intel_dsi_connector_funcs +ffffffff829b90b0 r intel_dsi_connector_helper_funcs +ffffffff829ba000 r lfsr_converts +ffffffff829bb000 r clflush_ops +ffffffff829bc000 r create_extensions +ffffffff829bc010 r set_proto_ctx_engines_extensions +ffffffff829bd000 r create_extensions +ffffffff829be000 r i915_dmabuf_ops +ffffffff829c0000 r execbuf_extensions +ffffffff829c0010 r user_ring_map +ffffffff829c1000 r i915_gem_object_internal_ops +ffffffff829c2000 r i915_gem_object_funcs +ffffffff829c3000 R i915_gem_shmem_ops +ffffffff829c3080 r shmem_region_ops +ffffffff829c4000 r i915_region_stolen_lmem_ops +ffffffff829c4020 r i915_region_stolen_smem_ops +ffffffff829c4040 r i915_gem_object_stolen_ops +ffffffff829c5000 r ttm_system_region_ops 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get_reset_domain.engine_reset_domains +ffffffff829ce210 r get_reset_domain.engine_reset_domains.39 +ffffffff829ce25c r engine_class_guc_class_map +ffffffff829ce270 r __cs_pending_mi_force_wakes._reg +ffffffff829cf000 r wf_ops +ffffffff829d0000 r intel_engine_class_repr.uabi_names +ffffffff829d0030 r uabi_classes +ffffffff829d0036 r legacy_ring_idx.map +ffffffff829d1000 r execlists_context_ops +ffffffff829d1080 r virtual_context_ops +ffffffff829d2000 r mmio_invalidate_full.gen12_regs +ffffffff829d3000 r pvc_instance0_steering_table +ffffffff829d3070 r xehpsdv_mslice_steering_table +ffffffff829d30a0 r dg2_lncf_steering_table +ffffffff829d30c0 r xehpsdv_lncf_steering_table +ffffffff829d30e0 r icl_l3bank_steering_table +ffffffff829d4000 r wf_ops +ffffffff829d5000 r gen12_rcs_offsets +ffffffff829d5090 r gen9_rcs_offsets +ffffffff829d5110 r gen9_xcs_offsets +ffffffff829d5190 r gen8_xcs_offsets +ffffffff829d6000 r pvc_mocs_table +ffffffff829d6020 r dg2_mocs_table_g10_ax +ffffffff829d6040 r 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r ivb_blt_reg_tables +ffffffff829e4130 r hsw_vebox_cmd_table +ffffffff829e4150 r noop_desc +ffffffff829e41b0 r gen7_common_cmds +ffffffff829e45d0 r gen7_render_cmds +ffffffff829e4cb0 r hsw_render_cmds +ffffffff829e52e0 r gen7_render_regs +ffffffff829e5600 r hsw_render_regs +ffffffff829e57a0 r gen7_video_cmds +ffffffff829e5a10 r gen9_blt_cmds +ffffffff829e6040 r gen7_blt_cmds +ffffffff829e6250 r hsw_blt_cmds +ffffffff829e6300 r gen9_blt_regs +ffffffff829e64e0 r gen7_blt_regs +ffffffff829e6540 r gen7_vecs_cmds +ffffffff829e7000 R inteldrm_backlight_ops +ffffffff829e7018 R inteldrm_ca +ffffffff829e7040 r i915_drm_driver +ffffffff829e7130 r i915_ioctls +ffffffff829e8000 r i915_hpd_funcs +ffffffff829e8008 r icp_hpd_funcs +ffffffff829e8010 r dg1_hpd_funcs +ffffffff829e8018 r gen11_hpd_funcs +ffffffff829e8020 r bxt_hpd_funcs +ffffffff829e8028 r spt_hpd_funcs +ffffffff829e8030 r ilk_hpd_funcs +ffffffff829e8040 r hpd_status_g4x +ffffffff829e8080 r hpd_status_i915 +ffffffff829e80c0 r hpd_gen11 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r ci_SECT_CONTEXT_defs +ffffffff82a09720 r ci_SECT_CONTEXT_def_1 +ffffffff82a09a70 r ci_SECT_CONTEXT_def_3 +ffffffff82a09a90 r ci_SECT_CONTEXT_def_4 +ffffffff82a09d04 r ci_SECT_CONTEXT_def_5 +ffffffff82a09d0c r ci_SECT_CONTEXT_def_6 +ffffffff82a09d10 r ci_SECT_CONTEXT_def_2 +ffffffff82a0a160 r ci_SECT_CONTEXT_def_7 +ffffffff82a0a510 r cik_default_state +ffffffff82a0c000 r dce3_2_afmt_write_sad_regs.eld_reg_to_type +ffffffff82a0d000 r dce6_afmt_write_sad_regs.eld_reg_to_type +ffffffff82a0e000 r ni_tx_offsets +ffffffff82a0e020 r evergreen_dp_offsets +ffffffff82a0e040 r evergreen_disp_int_status +ffffffff82a0e060 r evergreen_golden_registers +ffffffff82a0e260 r evergreen_golden_registers2 +ffffffff82a0e310 r cypress_mgcg_init +ffffffff82a0ea10 r juniper_mgcg_init +ffffffff82a0ee80 r redwood_mgcg_init +ffffffff82a0f1b0 r cedar_golden_registers +ffffffff82a0f390 r cedar_mgcg_init +ffffffff82a0f5f0 r wrestler_golden_registers +ffffffff82a0f840 r supersumo_golden_registers +ffffffff82a0fba0 r sumo_golden_registers +ffffffff82a0fbe0 r barts_golden_registers +ffffffff82a0fe00 r turks_golden_registers +ffffffff82a10040 r caicos_golden_registers +ffffffff82a10280 r sumo_rlc_save_restore_register_list +ffffffff82a103d0 r evergreen_cs_data +ffffffff82a10410 r SECT_CONTEXT_defs +ffffffff82a10490 r SECT_CLEAR_defs +ffffffff82a104b0 r SECT_CTRLCONST_defs +ffffffff82a104d0 r SECT_CONTEXT_def_2 +ffffffff82a104f0 r SECT_CONTEXT_def_4 +ffffffff82a10680 r SECT_CONTEXT_def_5 +ffffffff82a106a0 r SECT_CONTEXT_def_6 +ffffffff82a10780 r SECT_CONTEXT_def_1 +ffffffff82a10f20 r SECT_CONTEXT_def_3 +ffffffff82a11000 r SECT_CONTEXT_def_7 +ffffffff82a11488 r SECT_CLEAR_def_1 +ffffffff82a11494 r SECT_CTRLCONST_def_1 +ffffffff82a114a0 r evergreen_default_state +ffffffff82a12000 r cayman_reg_safe_bm +ffffffff82a14000 r evergreen_reg_safe_bm +ffffffff82a17000 r evergreen_hdmi_write_sad_regs.eld_reg_to_type +ffffffff82a18000 r didt_config_kv +ffffffff82a19000 r barts_io_mc_regs +ffffffff82a190f0 r turks_io_mc_regs +ffffffff82a191e0 r caicos_io_mc_regs +ffffffff82a192d0 r cayman_io_mc_regs +ffffffff82a193c0 r cayman_golden_registers +ffffffff82a19580 r cayman_golden_registers2 +ffffffff82a195d0 r dvst_golden_registers +ffffffff82a19860 r dvst_golden_registers2 +ffffffff82a19890 r scrapper_golden_registers +ffffffff82a19d70 r tn_rlc_save_restore_register_list +ffffffff82a19f60 r cayman_cs_data +ffffffff82a19fa0 r SECT_CONTEXT_defs +ffffffff82a1a020 r SECT_CLEAR_defs +ffffffff82a1a040 r SECT_CTRLCONST_defs +ffffffff82a1a060 r SECT_CONTEXT_def_2 +ffffffff82a1a080 r SECT_CONTEXT_def_4 +ffffffff82a1a210 r SECT_CONTEXT_def_5 +ffffffff82a1a230 r SECT_CONTEXT_def_1 +ffffffff82a1a9d0 r SECT_CONTEXT_def_3 +ffffffff82a1aab0 r SECT_CONTEXT_def_6 +ffffffff82a1ab90 r SECT_CONTEXT_def_7 +ffffffff82a1b018 r SECT_CLEAR_def_1 +ffffffff82a1b024 r SECT_CTRLCONST_def_1 +ffffffff82a1b030 r cayman_default_state +ffffffff82a1c000 r cac_weights_cayman_xt +ffffffff82a1c128 r cac_weights_cayman_pro +ffffffff82a1c250 r cac_weights_cayman_le +ffffffff82a1c380 r cayman_cgcg_cgls_default +ffffffff82a1c5c0 r cayman_mgcg_default +ffffffff82a1cf20 r cayman_sysls_default +ffffffff82a1cff0 r cayman_cgcg_cgls_enable +ffffffff82a1d240 r cayman_cgcg_cgls_disable +ffffffff82a1d4a0 r cayman_mgcg_enable +ffffffff82a1d520 r cayman_mgcg_disable +ffffffff82a1d5a0 r cayman_sysls_enable +ffffffff82a1d670 r cayman_sysls_disable +ffffffff82a1e000 r rn50_reg_safe_bm +ffffffff82a1e1a0 r r100_reg_safe_bm +ffffffff82a1f000 r r200_reg_safe_bm +ffffffff82a20000 r r300_reg_safe_bm +ffffffff82a21000 r r420_reg_safe_bm +ffffffff82a23000 r color_formats_table +ffffffff82a23480 r r600_reg_safe_bm +ffffffff82a26000 R r600_utc +ffffffff82a26040 R r600_dtc +ffffffff82a26080 r r600_encode_pci_lane_width.encoded_lanes +ffffffff82a28000 r r100_gfx_ring +ffffffff82a28070 r r300_gfx_ring +ffffffff82a280e0 r rv515_gfx_ring +ffffffff82a28150 r r600_gfx_ring +ffffffff82a281c0 r r600_dma_ring +ffffffff82a28230 r rv6xx_uvd_ring +ffffffff82a282a0 r rv770_uvd_ring +ffffffff82a28310 r evergreen_gfx_ring +ffffffff82a28380 r evergreen_dma_ring +ffffffff82a283f0 r cayman_gfx_ring +ffffffff82a28460 r cayman_dma_ring +ffffffff82a284d0 r cayman_uvd_ring +ffffffff82a28540 r trinity_vce_ring +ffffffff82a285b0 r si_gfx_ring +ffffffff82a28620 r si_dma_ring +ffffffff82a28690 r ci_gfx_ring +ffffffff82a28700 r ci_cp_ring +ffffffff82a28770 r ci_dma_ring +ffffffff82a287e0 r ci_vce_ring +ffffffff82a29000 r object_connector_convert +ffffffff82a29060 r supported_devices_connector_convert +ffffffff82a290a0 r supported_devices_connector_object_id_convert +ffffffff82a290c0 r thermal_controller_names +ffffffff82a29100 r pp_lib_thermal_controller_names +ffffffff82a2a000 r pin_offsets +ffffffff82a2a020 r radeon_audio_acr.hdmi_predefined_acr +ffffffff82a2c000 r thermal_controller_names +ffffffff82a2c020 r default_primarydac_adj +ffffffff82a2c120 r default_tvdac_adj +ffffffff82a2c220 r default_tmds_pll +ffffffff82a2d000 r radeon_dp_connector_helper_funcs +ffffffff82a2d050 r radeon_vga_connector_helper_funcs +ffffffff82a2d0a0 r radeon_dvi_connector_helper_funcs +ffffffff82a2d0f0 r radeon_tv_connector_helper_funcs +ffffffff82a2d140 r radeon_lvds_connector_helper_funcs +ffffffff82a2d190 r radeon_dp_connector_funcs +ffffffff82a2d298 r radeon_lvds_bridge_connector_funcs +ffffffff82a2d310 r radeon_vga_connector_funcs +ffffffff82a2d388 r radeon_dvi_connector_funcs +ffffffff82a2d400 r radeon_edp_connector_funcs +ffffffff82a2d478 r radeon_tv_connector_funcs +ffffffff82a2d4f0 r radeon_lvds_connector_funcs +ffffffff82a2e000 r radeon_family_name +ffffffff82a2e3f0 r radeon_px_quirk_list +ffffffff82a2f000 r radeon_fb_funcs +ffffffff82a2f018 r radeon_mode_funcs +ffffffff82a2f060 r radeon_tmds_pll_enum_list +ffffffff82a2f080 r radeon_tv_std_enum_list +ffffffff82a2f100 r radeon_underscan_enum_list +ffffffff82a2f130 r radeon_audio_enum_list +ffffffff82a2f160 r radeon_dither_enum_list +ffffffff82a2f180 r radeon_output_csc_enum_list +ffffffff82a2f1c0 r radeon_crtc_funcs +ffffffff82a2f280 r hpd_names +ffffffff82a2f2b0 r encoder_names +ffffffff82a2f3e0 r radeon_afmt_init.eg_offsets +ffffffff82a30000 r aux_offset +ffffffff82a31000 R radeondrm_ca +ffffffff82a31030 r pciidlist +ffffffff82a351d0 r kms_driver +ffffffff82a352c0 r radeon_ioctls_kms +ffffffff82a36000 r radeon_fb_helper_funcs +ffffffff82a36008 r radeonfb_ops +ffffffff82a37000 R radeon_fence_ops +ffffffff82a39000 R radeon_gem_object_funcs +ffffffff82a39060 r radeon_gem_vm_ops +ffffffff82a3a000 r radeon_i2c_algo +ffffffff82a3a010 r radeon_atom_i2c_algo +ffffffff82a3b000 r legacy_helper_funcs +ffffffff82a3c000 r radeon_backlight_ops +ffffffff82a3c018 r radeon_legacy_lvds_enc_funcs +ffffffff82a3c038 r radeon_legacy_lvds_helper_funcs +ffffffff82a3c0a0 r radeon_legacy_tmds_int_enc_funcs +ffffffff82a3c0c0 r radeon_legacy_tmds_int_helper_funcs +ffffffff82a3c128 r radeon_legacy_primary_dac_enc_funcs +ffffffff82a3c148 r radeon_legacy_primary_dac_helper_funcs +ffffffff82a3c1b0 r radeon_legacy_tv_dac_enc_funcs +ffffffff82a3c1d0 r radeon_legacy_tv_dac_helper_funcs +ffffffff82a3c238 r radeon_legacy_tmds_ext_enc_funcs +ffffffff82a3c258 r radeon_legacy_tmds_ext_helper_funcs +ffffffff82a3d000 r SLOPE_value +ffffffff82a3d030 r YCOEF_EN_value +ffffffff82a3d060 r YCOEF_value +ffffffff82a3d090 r available_tv_modes +ffffffff82a3d110 r hor_timing_NTSC +ffffffff82a3d150 r vert_timing_NTSC +ffffffff82a3d190 r hor_timing_PAL +ffffffff82a3d1d0 r vert_timing_PAL +ffffffff82a3f000 r radeon_pm_state_type_name +ffffffff82a40000 r radeon_evict_flags.placements +ffffffff82a43000 r rs600_reg_safe_bm +ffffffff82a45000 r rv515_reg_safe_bm +ffffffff82a46000 r dll_speed_table +ffffffff82a47000 r r7xx_golden_registers +ffffffff82a47090 r r7xx_golden_dyn_gpr_registers +ffffffff82a47100 r rv770ce_golden_registers +ffffffff82a47160 r rv770_golden_registers +ffffffff82a471b0 r rv770_mgcg_init +ffffffff82a478f0 r rv730_golden_registers +ffffffff82a47950 r rv730_mgcg_init +ffffffff82a47ee0 r rv710_golden_registers +ffffffff82a47f30 r rv710_mgcg_init +ffffffff82a481d0 r rv740_golden_registers +ffffffff82a48360 r rv740_mgcg_init +ffffffff82a4a000 r rv730_smc_int_vectors +ffffffff82a4a040 r rv710_smc_int_vectors +ffffffff82a4a080 r rv740_smc_int_vectors +ffffffff82a4a0c0 r cypress_smc_int_vectors +ffffffff82a4a100 r caicos_smc_int_vectors +ffffffff82a4a140 r cayman_smc_int_vectors +ffffffff82a4b000 r tahiti_io_mc_regs +ffffffff82a4b120 r pitcairn_io_mc_regs +ffffffff82a4b240 r verde_io_mc_regs +ffffffff82a4b360 r oland_io_mc_regs +ffffffff82a4b480 r hainan_io_mc_regs +ffffffff82a4b5a0 r crtc_offsets +ffffffff82a4b5c0 r si_disp_int_status +ffffffff82a4b5e0 r tahiti_golden_registers +ffffffff82a4b760 r tahiti_golden_rlc_registers +ffffffff82a4b7b0 r tahiti_mgcg_cgcg_init +ffffffff82a4bd98 r tahiti_golden_registers2 +ffffffff82a4bdb0 r pitcairn_golden_registers +ffffffff82a4bf00 r pitcairn_golden_rlc_registers +ffffffff82a4bf40 r pitcairn_mgcg_cgcg_init +ffffffff82a4c3b0 r verde_golden_registers +ffffffff82a4c620 r verde_golden_rlc_registers +ffffffff82a4c660 r verde_mgcg_cgcg_init +ffffffff82a4cae0 r oland_golden_registers +ffffffff82a4cc30 r oland_golden_rlc_registers +ffffffff82a4cc70 r oland_mgcg_cgcg_init +ffffffff82a4d000 r hainan_golden_registers +ffffffff82a4d12c r hainan_golden_registers2 +ffffffff82a4d140 r hainan_mgcg_cgcg_init +ffffffff82a4d4b0 r verde_rlc_save_restore_register_list +ffffffff82a4d820 r si_cs_data +ffffffff82a4d840 r si_SECT_CONTEXT_defs +ffffffff82a4d8c0 r si_SECT_CONTEXT_def_1 +ffffffff82a4dc10 r si_SECT_CONTEXT_def_3 +ffffffff82a4dc30 r si_SECT_CONTEXT_def_4 +ffffffff82a4dea4 r si_SECT_CONTEXT_def_5 +ffffffff82a4dea8 r si_SECT_CONTEXT_def_6 +ffffffff82a4deb0 r si_SECT_CONTEXT_def_2 +ffffffff82a4e2f0 r si_SECT_CONTEXT_def_7 +ffffffff82a4e6a0 r mc_cg_registers +ffffffff82a4e6d0 r si_default_state +ffffffff82a4f000 r cac_weights_tahiti +ffffffff82a4f4d0 r lcac_tahiti +ffffffff82a4fba0 r cac_override_tahiti +ffffffff82a4fbb4 r powertune_data_tahiti +ffffffff82a4fbf0 r dte_data_tahiti +ffffffff82a4fcc0 r dte_data_new_zealand +ffffffff82a4fd90 r dte_data_malta +ffffffff82a4fe60 r lcac_pitcairn +ffffffff82a50530 r cac_override_pitcairn +ffffffff82a50544 r powertune_data_pitcairn +ffffffff82a50580 r lcac_cape_verde +ffffffff82a509d0 r cac_override_cape_verde +ffffffff82a509e4 r powertune_data_cape_verde +ffffffff82a50a20 r cac_weights_cape_verde_pro +ffffffff82a50ef0 r cac_weights_heathrow +ffffffff82a513c0 r cac_weights_chelsea_xt +ffffffff82a51890 r cac_weights_chelsea_pro +ffffffff82a51d60 r cac_weights_cape_verde +ffffffff82a52230 r cac_weights_mars_pro +ffffffff82a52700 r lcac_mars_pro +ffffffff82a52a60 r cac_override_oland +ffffffff82a52a74 r powertune_data_mars_pro +ffffffff82a52ab0 r cac_weights_mars_xt +ffffffff82a52f80 r cac_weights_oland_pro +ffffffff82a53450 r cac_weights_oland_xt +ffffffff82a53920 r lcac_oland +ffffffff82a53c7c r powertune_data_oland +ffffffff82a53cb8 r dte_data_oland +ffffffff82a53d90 r cac_weights_hainan +ffffffff82a54254 r powertune_data_hainan +ffffffff82a54290 r dte_data_aruba_pro +ffffffff82a54360 r dte_data_tahiti_pro +ffffffff82a54430 r dte_data_curacao_pro +ffffffff82a54500 r dte_data_neptune_xt +ffffffff82a545d0 r dte_data_sun_xt +ffffffff82a546a0 r dte_data_venus_xtx +ffffffff82a54770 r dte_data_venus_xt +ffffffff82a54840 r dte_data_venus_pro +ffffffff82a54910 r dte_data_mars_pro +ffffffff82a55000 r si_program_jump_on_start.data +ffffffff82a56000 r sumo_dtc +ffffffff82a57000 r trinity_mgcg_shls_default +ffffffff82a57380 r trinity_sysls_enable +ffffffff82a57450 r trinity_sysls_disable +ffffffff82a59000 r GC_BASE +ffffffff82a590a8 r HDP_BASE +ffffffff82a59150 r MMHUB_BASE +ffffffff82a591f8 r ATHUB_BASE +ffffffff82a592a0 r NBIO_BASE +ffffffff82a59348 r MP0_BASE +ffffffff82a593f0 r MP1_BASE +ffffffff82a59498 r DF_BASE +ffffffff82a59540 r OSSSYS_BASE +ffffffff82a595e8 r SDMA0_BASE +ffffffff82a59690 r SDMA1_BASE +ffffffff82a59738 r SDMA2_BASE +ffffffff82a597e0 r SDMA3_BASE +ffffffff82a59888 r SDMA4_BASE +ffffffff82a59930 r SMUIO_BASE +ffffffff82a599d8 r THM_BASE +ffffffff82a59a80 r UMC_BASE +ffffffff82a59b28 r VCN_BASE +ffffffff82a5a000 r amdgpu_afmt_predefined_acr +ffffffff82a5b000 r atom_op_names +ffffffff82a5b3e0 r opcode_table +ffffffff82a5bbd0 r atom_dst_to_src +ffffffff82a5bc50 r atom_io_names +ffffffff82a5bc80 r atom_table_names +ffffffff82a5bed0 r atom_iio_len +ffffffff82a5c000 r object_connector_convert +ffffffff82a5c058 R amdgpu_vbios_version_attr_group +ffffffff82a5d000 r voltage_names +ffffffff82a5d020 r pre_emph_names +ffffffff82a5e000 r amdgpu_atombios_encoder_backlight_ops +ffffffff82a60000 r amdgpu_benchmark.common_modes +ffffffff82a61000 r amdgpu_cgs_ops +ffffffff82a62000 r amdgpu_connector_dp_helper_funcs +ffffffff82a62050 r amdgpu_connector_vga_helper_funcs +ffffffff82a620a0 r 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amdgpu_ioctls_kms +ffffffff82a69210 R amdgpu_ca +ffffffff82a69240 r pciidlist +ffffffff82a6a110 r amdgpu_unsupported_pciidlist +ffffffff82a6a690 r amdgpu_kms_driver +ffffffff82a6b000 r amdgpu_job_fence_ops +ffffffff82a6b038 r amdgpu_fence_ops +ffffffff82a6c000 r amdgpu_gem_object_funcs +ffffffff82a6c060 r amdgpu_gem_vm_ops +ffffffff82a6e000 R amdgpu_gtt_mgr_attr_group +ffffffff82a6e018 r amdgpu_gtt_mgr_func +ffffffff82a6f000 r amdgpu_atombios_i2c_algo +ffffffff82a70000 R amdgpu_sched_ops +ffffffff82a73000 r amdgpu_vram_names +ffffffff82a74000 r amdgpu_preempt_mgr_func +ffffffff82a75000 R psp_ip_funcs +ffffffff82a750a0 R psp_v3_1_ip_block +ffffffff82a750b8 R psp_v10_0_ip_block +ffffffff82a750d0 R psp_v11_0_ip_block +ffffffff82a750e8 R psp_v11_0_8_ip_block +ffffffff82a75100 R psp_v12_0_ip_block +ffffffff82a75118 R psp_v13_0_ip_block +ffffffff82a75130 R psp_v13_0_4_ip_block +ffffffff82a77000 r amdgpu_evict_flags.placements +ffffffff82a7b000 R amdgpu_vkms_ip_block +ffffffff82a7d000 R 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qp_table_422_12bpc_min -ffffffff82c32140 R qp_table_422_12bpc_max -ffffffff82c32a80 R qp_table_444_12bpc_max -ffffffff82c339c0 R qp_table_420_8bpc_min -ffffffff82c33e00 R qp_table_422_8bpc_min -ffffffff82c34340 R qp_table_422_10bpc_max -ffffffff82c34a80 R qp_table_420_10bpc_max -ffffffff82c35040 R qp_table_420_10bpc_min -ffffffff82c35600 R qp_table_444_10bpc_max -ffffffff82c36240 R qp_table_422_8bpc_max -ffffffff82c38000 r funcs -ffffffff82c38050 r hpd_regs -ffffffff82c381a0 r hpd_shift -ffffffff82c381b0 r hpd_mask -ffffffff82c381c0 r ddc_data_regs -ffffffff82c383a0 r ddc_clk_regs -ffffffff82c38580 r ddc_shift -ffffffff82c385a8 r ddc_mask -ffffffff82c39000 r funcs -ffffffff82c3a000 r funcs -ffffffff82c3a050 r hpd_regs -ffffffff82c3a1a0 r hpd_shift -ffffffff82c3a1b0 r hpd_mask -ffffffff82c3a1c0 r ddc_data_regs -ffffffff82c3a3a0 r ddc_clk_regs -ffffffff82c3a580 r ddc_shift -ffffffff82c3a5a8 r ddc_mask -ffffffff82c3b000 r funcs -ffffffff82c3c000 r funcs -ffffffff82c3c050 r hpd_regs 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SDMA5_BASE +ffffffff82a82c00 r SDMA6_BASE +ffffffff82a82cc0 r SDMA7_BASE +ffffffff82a82d80 r SMUIO_BASE +ffffffff82a82e40 r THM_BASE +ffffffff82a82f00 r UMC_BASE +ffffffff82a82fc0 r RSMU_BASE +ffffffff82a84000 r cz_ih_ip_funcs +ffffffff82a840a0 R cz_ih_ip_block +ffffffff82a840b8 r cz_ih_funcs +ffffffff82a85000 r crtc_offsets +ffffffff82a85020 r dce_v10_0_ip_funcs +ffffffff82a850c0 R dce_v10_0_ip_block +ffffffff82a850d8 R dce_v10_1_ip_block +ffffffff82a850f0 r dce_v10_0_display_funcs +ffffffff82a85150 r hpd_offsets +ffffffff82a85168 r dce_v10_0_encoder_funcs +ffffffff82a85188 r dce_v10_0_dac_helper_funcs +ffffffff82a851f0 r dce_v10_0_dig_helper_funcs +ffffffff82a85258 r dce_v10_0_ext_helper_funcs +ffffffff82a852c0 r dce_v10_0_audio_write_sad_regs.eld_reg_to_type +ffffffff82a852f0 r dce_v10_0_crtc_irq_funcs +ffffffff82a85300 r dce_v10_0_pageflip_irq_funcs +ffffffff82a85310 r dce_v10_0_hpd_irq_funcs +ffffffff82a85320 r interrupt_status_offsets +ffffffff82a85380 r dce_v10_0_crtc_funcs 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r dce_v11_0_crtc_funcs +ffffffff82a86440 r dce_v11_0_crtc_helper_funcs +ffffffff82a864c0 r vga_control_regs +ffffffff82a864e0 r dig_offsets +ffffffff82a86510 r cz_mgcg_cgcg_init +ffffffff82a86530 r cz_golden_settings_a11 +ffffffff82a86550 r stoney_golden_settings_a11 +ffffffff82a86570 r polaris11_golden_settings_a11 +ffffffff82a865b0 r polaris10_golden_settings_a11 +ffffffff82a87000 R df_v1_7_funcs +ffffffff82a87070 r df_v1_7_channel_number +ffffffff82a88000 R df_v3_6_funcs +ffffffff82a88070 r df_v3_6_channel_number +ffffffff82a89000 r GC_BASE +ffffffff82a890a8 r HDP_BASE +ffffffff82a89150 r MMHUB_BASE +ffffffff82a891f8 r ATHUB_BASE +ffffffff82a892a0 r NBIO_BASE +ffffffff82a89348 r MP0_BASE +ffffffff82a893f0 r MP1_BASE +ffffffff82a89498 r VCN0_BASE +ffffffff82a89540 r DF_BASE +ffffffff82a895e8 r DCN_BASE +ffffffff82a89690 r OSSSYS_BASE +ffffffff82a89738 r SMUIO_BASE +ffffffff82a897e0 r THM_BASE +ffffffff82a8a000 r gfx_v10_0_ip_funcs +ffffffff82a8a0a0 R gfx_v10_0_ip_block +ffffffff82a8a0b8 r gfx_v10_0_kiq_pm4_funcs +ffffffff82a8a0f8 r gfx_v10_0_ring_funcs_kiq +ffffffff82a8a218 r gfx_v10_0_ring_funcs_gfx +ffffffff82a8a338 r gfx_v10_0_ring_funcs_compute +ffffffff82a8a458 r gfx_v10_0_eop_irq_funcs +ffffffff82a8a468 r gfx_v10_0_kiq_irq_funcs +ffffffff82a8a478 r gfx_v10_0_priv_reg_irq_funcs +ffffffff82a8a488 r gfx_v10_0_priv_inst_irq_funcs +ffffffff82a8a498 r gfx_v10_0_rlc_funcs +ffffffff82a8a500 r gfx_v10_0_rlc_funcs_sriov +ffffffff82a8a570 r gfx10_cs_data +ffffffff82a8a590 r gfx10_SECT_CONTEXT_defs +ffffffff82a8a620 r gfx10_SECT_CONTEXT_def_1 +ffffffff82a8a980 r gfx10_SECT_CONTEXT_def_3 +ffffffff82a8a990 r gfx10_SECT_CONTEXT_def_4 +ffffffff82a8ac08 r gfx10_SECT_CONTEXT_def_5 +ffffffff82a8ac10 r gfx10_SECT_CONTEXT_def_6 +ffffffff82a8ac20 r gfx10_SECT_CONTEXT_def_2 +ffffffff82a8b060 r gfx10_SECT_CONTEXT_def_7 +ffffffff82a8b170 r gfx10_SECT_CONTEXT_def_8 +ffffffff82a8b4a0 r gfx_v10_0_gfx_funcs +ffffffff82a8b4e0 r golden_settings_gc_rlc_spm_10_0_nv10 +ffffffff82a91780 r golden_settings_gc_rlc_spm_10_1_nv14 +ffffffff82a951a0 r golden_settings_gc_rlc_spm_10_1_2_nv12 +ffffffff82a9b440 r golden_settings_gc_10_1 +ffffffff82a9b800 r golden_settings_gc_10_0_nv10 +ffffffff82a9b800 r golden_settings_gc_10_1_1 +ffffffff82a9bb90 r golden_settings_gc_10_1_2 +ffffffff82a9bb90 r golden_settings_gc_10_1_nv14 +ffffffff82a9bf80 r golden_settings_gc_10_1_2_nv12 +ffffffff82a9bf80 r golden_settings_gc_10_3 +ffffffff82a9c388 r golden_settings_gc_10_3_sienna_cichlid +ffffffff82a9c390 r golden_settings_gc_10_3_2 +ffffffff82a9c780 r golden_settings_gc_10_3_vangogh +ffffffff82a9c9e0 r golden_settings_gc_10_3_3 +ffffffff82a9cbc0 r golden_settings_gc_10_3_4 +ffffffff82a9cf20 r golden_settings_gc_10_3_5 +ffffffff82a9d220 r golden_settings_gc_10_0_cyan_skillfish +ffffffff82a9d550 r golden_settings_gc_10_3_6 +ffffffff82a9d760 r golden_settings_gc_10_3_7 +ffffffff82a9e000 r gfx_v11_0_ip_funcs +ffffffff82a9e0a0 R gfx_v11_0_ip_block +ffffffff82a9e0b8 r gfx_v11_0_kiq_pm4_funcs +ffffffff82a9e0f8 r gfx_v11_0_ring_funcs_kiq +ffffffff82a9e218 r gfx_v11_0_ring_funcs_gfx +ffffffff82a9e338 r gfx_v11_0_ring_funcs_compute +ffffffff82a9e458 r gfx_v11_0_eop_irq_funcs +ffffffff82a9e468 r gfx_v11_0_priv_reg_irq_funcs +ffffffff82a9e478 r gfx_v11_0_priv_inst_irq_funcs +ffffffff82a9e488 r gfx_v11_0_rlc_funcs +ffffffff82a9e4f0 r gfx11_cs_data +ffffffff82a9e510 r gfx11_SECT_CONTEXT_defs +ffffffff82a9e590 r gfx11_SECT_CONTEXT_def_1 +ffffffff82a9e8f0 r gfx11_SECT_CONTEXT_def_3 +ffffffff82a9e900 r gfx11_SECT_CONTEXT_def_5 +ffffffff82a9e908 r gfx11_SECT_CONTEXT_def_6 +ffffffff82a9e910 r gfx11_SECT_CONTEXT_def_2 +ffffffff82a9ed50 r gfx11_SECT_CONTEXT_def_4 +ffffffff82a9efd0 r gfx11_SECT_CONTEXT_def_7 +ffffffff82a9f438 r gfx_v11_0_gfx_funcs +ffffffff82a9f480 r golden_settings_gc_11_0_1 +ffffffff82aa0000 r gfx_v8_0_ip_funcs +ffffffff82aa00a0 R gfx_v8_0_ip_block +ffffffff82aa00b8 R gfx_v8_1_ip_block +ffffffff82aa00d0 r gfx_v8_0_gfx_funcs +ffffffff82aa0110 r gfx_v8_0_ring_funcs_kiq +ffffffff82aa0230 r gfx_v8_0_ring_funcs_gfx +ffffffff82aa0350 r gfx_v8_0_ring_funcs_compute +ffffffff82aa0470 r amdgpu_gds_reg_offset +ffffffff82aa0570 r gfx_v8_0_eop_irq_funcs +ffffffff82aa0580 r gfx_v8_0_priv_reg_irq_funcs +ffffffff82aa0590 r gfx_v8_0_priv_inst_irq_funcs +ffffffff82aa05a0 r gfx_v8_0_cp_ecc_error_irq_funcs +ffffffff82aa05b0 r gfx_v8_0_sq_irq_funcs +ffffffff82aa05c0 r sq_edc_source_names +ffffffff82aa05f8 r iceland_rlc_funcs +ffffffff82aa0660 r vi_cs_data +ffffffff82aa0680 r vi_SECT_CONTEXT_defs +ffffffff82aa0700 r vi_SECT_CONTEXT_def_1 +ffffffff82aa0a50 r vi_SECT_CONTEXT_def_3 +ffffffff82aa0a70 r vi_SECT_CONTEXT_def_4 +ffffffff82aa0ce4 r vi_SECT_CONTEXT_def_5 +ffffffff82aa0cec r vi_SECT_CONTEXT_def_6 +ffffffff82aa0cf0 r vi_SECT_CONTEXT_def_2 +ffffffff82aa1140 r vi_SECT_CONTEXT_def_7 +ffffffff82aa14f0 r vgpr_init_compute_shader +ffffffff82aa1600 r vgpr_init_regs +ffffffff82aa1690 r sgpr1_init_regs +ffffffff82aa1720 r sgpr2_init_regs +ffffffff82aa17b0 r sec_ded_counter_registers +ffffffff82aa1820 r iceland_mgcg_cgcg_init +ffffffff82aa1b20 r golden_settings_iceland_a11 +ffffffff82aa1be0 r iceland_golden_common_all +ffffffff82aa1c40 r fiji_mgcg_cgcg_init +ffffffff82aa1df0 r golden_settings_fiji_a10 +ffffffff82aa1e80 r fiji_golden_common_all +ffffffff82aa1f00 r tonga_mgcg_cgcg_init +ffffffff82aa2290 r golden_settings_tonga_a11 +ffffffff82aa2350 r tonga_golden_common_all +ffffffff82aa23b0 r golden_settings_vegam_a11 +ffffffff82aa2480 r vegam_golden_common_all +ffffffff82aa24d0 r golden_settings_polaris11_a11 +ffffffff82aa25a0 r polaris11_golden_common_all +ffffffff82aa25f0 r golden_settings_polaris10_a11 +ffffffff82aa26c0 r polaris10_golden_common_all +ffffffff82aa2720 r cz_mgcg_cgcg_init +ffffffff82aa2ab0 r cz_golden_settings_a11 +ffffffff82aa2b40 r cz_golden_common_all +ffffffff82aa2ba0 r stoney_mgcg_cgcg_init +ffffffff82aa2be0 r stoney_golden_settings_a11 +ffffffff82aa2c60 r stoney_golden_common_all +ffffffff82aa3000 R gfx_v9_0_ras_ops +ffffffff82aa3040 r gfx_v9_0_ip_funcs +ffffffff82aa30e0 R gfx_v9_0_ip_block +ffffffff82aa3100 r ras_gfx_subblocks +ffffffff82aa3b80 r gfx_v9_0_edc_counter_regs +ffffffff82aa3f20 r gfx_v9_0_ras_fields +ffffffff82aa5000 r gfx_v9_0_kiq_pm4_funcs +ffffffff82aa5040 r gfx_v9_0_ring_funcs_kiq +ffffffff82aa5160 r gfx_v9_0_ring_funcs_gfx +ffffffff82aa5280 r gfx_v9_0_ring_funcs_compute +ffffffff82aa53a0 r gfx_v9_0_eop_irq_funcs +ffffffff82aa53b0 r gfx_v9_0_priv_reg_irq_funcs +ffffffff82aa53c0 r gfx_v9_0_priv_inst_irq_funcs +ffffffff82aa53d0 r gfx_v9_0_cp_ecc_error_irq_funcs +ffffffff82aa53e0 r gfx_v9_0_rlc_funcs +ffffffff82aa5450 r gfx9_cs_data +ffffffff82aa5470 r gfx9_SECT_CONTEXT_defs +ffffffff82aa5500 r gfx9_SECT_CONTEXT_def_1 +ffffffff82aa5850 r gfx9_SECT_CONTEXT_def_3 +ffffffff82aa5860 r gfx9_SECT_CONTEXT_def_4 +ffffffff82aa5ad4 r gfx9_SECT_CONTEXT_def_5 +ffffffff82aa5adc r gfx9_SECT_CONTEXT_def_6 +ffffffff82aa5ae0 r gfx9_SECT_CONTEXT_def_7 +ffffffff82aa5bf0 r gfx9_SECT_CONTEXT_def_2 +ffffffff82aa6060 r gfx9_SECT_CONTEXT_def_8 +ffffffff82aa62d0 r vgpr_init_compute_shader_arcturus +ffffffff82aa6b60 r vgpr_init_regs_arcturus +ffffffff82aa6cf0 r vgpr_init_regs +ffffffff82aa6e80 r sgpr1_init_regs +ffffffff82aa7010 r sgpr2_init_regs +ffffffff82aa7198 r gfx_v9_0_gfx_funcs +ffffffff82aa71e0 r golden_settings_gc_9_0 +ffffffff82aa73c0 r golden_settings_gc_9_0_vg10 +ffffffff82aa7570 r golden_settings_gc_9_2_1 +ffffffff82aa76f0 r golden_settings_gc_9_2_1_vg12 +ffffffff82aa7830 r golden_settings_gc_9_0_vg20 +ffffffff82aa7940 r golden_settings_gc_9_4_1_arct +ffffffff82aa7a50 r golden_settings_gc_9_1 +ffffffff82aa7c90 r golden_settings_gc_9_1_rv2 +ffffffff82aa7e60 r golden_settings_gc_9_1_rv1 +ffffffff82aa7f10 r golden_settings_gc_9_1_rn +ffffffff82aa8030 r golden_settings_gc_9_x_common +ffffffff82aa9000 R gfx_v9_4_ras_ops +ffffffff82aa9040 r gfx_v9_4_edc_counter_regs +ffffffff82aa9420 r gfx_v9_4_ras_fields +ffffffff82aab000 R vgpr_init_regs_aldebaran +ffffffff82aab1b0 R sgpr112_init_regs_aldebaran +ffffffff82aab360 R sgpr96_init_regs_aldebaran +ffffffff82aab510 R sgpr64_init_regs_aldebaran +ffffffff82aab6c0 r golden_settings_gc_9_4_2_alde +ffffffff82aab720 r golden_settings_gc_9_4_2_alde_die_0 +ffffffff82aab7b0 r golden_settings_gc_9_4_2_alde_die_1 +ffffffff82aab840 r sgpr112_init_compute_shader_aldebaran +ffffffff82aaba60 r sgpr96_init_compute_shader_aldebaran +ffffffff82aabc50 r sgpr64_init_compute_shader_aldebaran +ffffffff82aabdc0 r vgpr_init_compute_shader_aldebaran +ffffffff82aac6a0 r gfx_v9_4_2_edc_counter_regs +ffffffff82aaca20 r gfx_v9_4_2_ras_fields +ffffffff82aae3c0 r gfx_v9_4_2_utc_blocks +ffffffff82aaf000 R gfxhub_v1_0_funcs +ffffffff82ab0000 R gfxhub_v2_0_funcs +ffffffff82ab0060 r gfxhub_v2_0_vmhub_funcs +ffffffff82ab0070 r gfxhub_client_ids +ffffffff82ab1000 R gfxhub_v2_1_funcs +ffffffff82ab1060 r gfxhub_v2_1_vmhub_funcs +ffffffff82ab1070 r gfxhub_client_ids +ffffffff82ab2000 R gfxhub_v3_0_funcs +ffffffff82ab2060 r gfxhub_v3_0_vmhub_funcs +ffffffff82ab2070 r gfxhub_client_ids +ffffffff82ab3000 R gfxhub_v3_0_3_funcs +ffffffff82ab3060 r gfxhub_v3_0_3_vmhub_funcs +ffffffff82ab3070 r gfxhub_client_ids +ffffffff82ab4000 R gmc_v10_0_ip_funcs +ffffffff82ab40a0 R gmc_v10_0_ip_block +ffffffff82ab40b8 r gmc_v10_0_gmc_funcs +ffffffff82ab4100 r gmc_v10_0_irq_funcs +ffffffff82ab4110 r gmc_v10_0_ecc_funcs +ffffffff82ab5000 R gmc_v11_0_ip_funcs +ffffffff82ab50a0 R gmc_v11_0_ip_block +ffffffff82ab50b8 r gmc_v11_0_gmc_funcs +ffffffff82ab5100 r gmc_v11_0_irq_funcs +ffffffff82ab5110 r gmc_v11_0_ecc_funcs +ffffffff82ab6000 r gmc_v7_0_ip_funcs +ffffffff82ab60a0 R gmc_v7_0_ip_block +ffffffff82ab60b8 R gmc_v7_4_ip_block +ffffffff82ab60d0 r gmc_v7_0_gmc_funcs +ffffffff82ab6118 r gmc_v7_0_irq_funcs +ffffffff82ab6128 r iceland_mgcg_cgcg_init +ffffffff82ab6140 r golden_settings_iceland_a11 +ffffffff82ab6170 r mc_cg_registers +ffffffff82ab61a0 r mc_cg_en +ffffffff82ab61d0 r mc_cg_ls_en +ffffffff82ab7000 r gmc_v8_0_ip_funcs +ffffffff82ab70a0 R gmc_v8_0_ip_block +ffffffff82ab70b8 R gmc_v8_1_ip_block +ffffffff82ab70d0 R gmc_v8_5_ip_block +ffffffff82ab70e8 r gmc_v8_0_gmc_funcs +ffffffff82ab7130 r gmc_v8_0_irq_funcs +ffffffff82ab7140 r fiji_mgcg_cgcg_init +ffffffff82ab7150 r golden_settings_fiji_a10 +ffffffff82ab7180 r tonga_mgcg_cgcg_init +ffffffff82ab7190 r golden_settings_tonga_a11 +ffffffff82ab71f0 r golden_settings_polaris11_a11 +ffffffff82ab7220 r golden_settings_polaris10_a11 +ffffffff82ab725c r cz_mgcg_cgcg_init +ffffffff82ab7270 r stoney_mgcg_cgcg_init +ffffffff82ab7290 r golden_settings_stoney_common +ffffffff82ab8000 R gmc_v9_0_ip_funcs +ffffffff82ab80a0 R gmc_v9_0_ip_block +ffffffff82ab80b8 r gmc_v9_0_gmc_funcs +ffffffff82ab8100 r gmc_v9_0_irq_funcs +ffffffff82ab8110 r gmc_v9_0_ecc_funcs +ffffffff82ab8120 r gfxhub_client_ids +ffffffff82ab8190 r mmhub_client_ids_vega10 +ffffffff82ab8480 r mmhub_client_ids_vega12 +ffffffff82ab8780 r mmhub_client_ids_vega20 +ffffffff82ab8a70 r mmhub_client_ids_arcturus +ffffffff82aba280 r mmhub_client_ids_raven +ffffffff82aba440 r mmhub_client_ids_renoir +ffffffff82aba630 r mmhub_client_ids_aldebaran +ffffffff82abbe40 r ecc_umc_mcumc_ctrl_addrs +ffffffff82abbec0 r ecc_umc_mcumc_ctrl_mask_addrs +ffffffff82abbf40 r golden_settings_mmhub_1_0_0 +ffffffff82abbf70 r golden_settings_athub_1_0_0 +ffffffff82abc000 R hdp_v4_0_funcs +ffffffff82abd000 R hdp_v5_0_funcs +ffffffff82abe000 R hdp_v5_2_funcs +ffffffff82abf000 R hdp_v6_0_funcs +ffffffff82ac0000 r iceland_ih_ip_funcs +ffffffff82ac00a0 R iceland_ih_ip_block +ffffffff82ac00b8 r iceland_ih_funcs +ffffffff82ac1000 r ih_v6_0_ip_funcs +ffffffff82ac10a0 R ih_v6_0_ip_block +ffffffff82ac10b8 r ih_v6_0_funcs +ffffffff82ac10d8 r ih_v6_0_self_irq_funcs +ffffffff82ac2000 R gfx_v11_0_imu_funcs +ffffffff82ac2030 r imu_rlc_ram_golden_11 +ffffffff82ac2680 r imu_rlc_ram_golden_11_0_2 +ffffffff82ac3000 r imu_rlc_ram_golden_11_0_3 +ffffffff82ac4000 r jpeg_v1_0_decode_ring_vm_funcs +ffffffff82ac4120 r jpeg_v1_0_irq_funcs +ffffffff82ac5000 r jpeg_v2_0_ip_funcs +ffffffff82ac50a0 R jpeg_v2_0_ip_block +ffffffff82ac50b8 r jpeg_v2_0_dec_ring_vm_funcs +ffffffff82ac51d8 r jpeg_v2_0_irq_funcs +ffffffff82ac6000 r jpeg_v2_5_ip_funcs +ffffffff82ac60a0 R jpeg_v2_5_ip_block +ffffffff82ac60b8 r jpeg_v2_6_ip_funcs +ffffffff82ac6158 R jpeg_v2_6_ip_block +ffffffff82ac6170 R jpeg_v2_6_ras_hw_ops +ffffffff82ac61b0 r jpeg_v2_5_dec_ring_vm_funcs +ffffffff82ac62d0 r jpeg_v2_6_dec_ring_vm_funcs +ffffffff82ac63f0 r jpeg_v2_5_irq_funcs +ffffffff82ac7000 r jpeg_v3_0_ip_funcs +ffffffff82ac70a0 R jpeg_v3_0_ip_block +ffffffff82ac70b8 r jpeg_v3_0_dec_ring_vm_funcs +ffffffff82ac71d8 r jpeg_v3_0_irq_funcs +ffffffff82ac8000 r jpeg_v4_0_ip_funcs +ffffffff82ac80a0 R jpeg_v4_0_ip_block +ffffffff82ac80b8 r jpeg_v4_0_dec_ring_vm_funcs +ffffffff82ac81d8 r jpeg_v4_0_irq_funcs +ffffffff82ac9000 R lsdma_v6_0_funcs +ffffffff82aca000 R mca_v3_0_mp0_hw_ops +ffffffff82aca040 R mca_v3_0_mp1_hw_ops +ffffffff82aca080 R mca_v3_0_mpio_hw_ops +ffffffff82aca0c0 R mca_v3_0_funcs +ffffffff82acb000 r mes_v10_1_ip_funcs +ffffffff82acb0a0 R mes_v10_1_ip_block +ffffffff82acb0b8 r mes_v10_1_funcs +ffffffff82acb0e8 r mes_v10_1_ring_funcs +ffffffff82acc000 r mes_v11_0_ip_funcs +ffffffff82acc0a0 R mes_v11_0_ip_block +ffffffff82acc0b8 r mes_v11_0_funcs +ffffffff82acc0e8 r mes_v11_0_ring_funcs +ffffffff82acd000 R mmhub_v1_0_funcs +ffffffff82acd050 r mmhub_v1_0_edc_cnt_regs +ffffffff82acd0c0 r mmhub_v1_0_ras_fields +ffffffff82ace000 R mmhub_v1_7_funcs +ffffffff82ace050 r mmhub_v1_7_edc_cnt_regs +ffffffff82ace250 r mmhub_v1_7_ras_fields +ffffffff82acf9c0 r mmhub_v1_7_ea_err_status_regs +ffffffff82ad0000 R mmhub_v2_0_funcs +ffffffff82ad0050 r mmhub_v2_0_vmhub_funcs +ffffffff82ad0060 r mmhub_client_ids_navi1x +ffffffff82ad0190 r mmhub_client_ids_sienna_cichlid +ffffffff82ad0450 r mmhub_client_ids_beige_goby +ffffffff82ad1000 R mmhub_v2_3_funcs +ffffffff82ad1050 r mmhub_v2_3_vmhub_funcs +ffffffff82ad1060 r mmhub_client_ids_vangogh +ffffffff82ad2000 R mmhub_v3_0_funcs +ffffffff82ad2050 r mmhub_v3_0_vmhub_funcs +ffffffff82ad2060 r mmhub_client_ids_v3_0_0 +ffffffff82ad3000 R mmhub_v3_0_1_funcs +ffffffff82ad3050 r mmhub_v3_0_1_vmhub_funcs +ffffffff82ad3060 r mmhub_client_ids_v3_0_1 +ffffffff82ad4000 R mmhub_v3_0_2_funcs +ffffffff82ad4050 r mmhub_v3_0_2_vmhub_funcs +ffffffff82ad4060 r mmhub_client_ids_v3_0_2 +ffffffff82ad5000 R mmhub_v9_4_ras_hw_ops +ffffffff82ad5040 R mmhub_v9_4_funcs +ffffffff82ad5090 r mmhub_v9_4_edc_cnt_regs +ffffffff82ad5330 r mmhub_v9_4_ras_fields +ffffffff82ad73b0 r mmhub_v9_4_err_status_regs +ffffffff82ad8000 r xgpu_ai_mailbox_ack_irq_funcs +ffffffff82ad8010 r xgpu_ai_mailbox_rcv_irq_funcs +ffffffff82ad8020 R xgpu_ai_virt_ops +ffffffff82ad9000 r xgpu_nv_mailbox_ack_irq_funcs +ffffffff82ad9010 r xgpu_nv_mailbox_rcv_irq_funcs +ffffffff82ad9020 R xgpu_nv_virt_ops +ffffffff82ada000 r xgpu_fiji_mgcg_cgcg_init +ffffffff82ada240 r xgpu_fiji_golden_settings_a10 +ffffffff82ada370 r xgpu_fiji_golden_common_all +ffffffff82ada3f0 r xgpu_tonga_mgcg_cgcg_init +ffffffff82ada810 r xgpu_tonga_golden_settings_a11 +ffffffff82ada9d0 r xgpu_tonga_golden_common_all +ffffffff82adaa28 r xgpu_vi_mailbox_ack_irq_funcs +ffffffff82adaa38 r xgpu_vi_mailbox_rcv_irq_funcs +ffffffff82adaa48 R xgpu_vi_virt_ops +ffffffff82adb000 r navi10_ih_ip_funcs +ffffffff82adb0a0 R navi10_ih_ip_block +ffffffff82adb0b8 r navi10_ih_funcs +ffffffff82adb0d8 r navi10_ih_self_irq_funcs +ffffffff82adc000 R nbio_v2_3_hdp_flush_reg +ffffffff82adc048 R nbio_v2_3_funcs +ffffffff82add000 R nbio_v4_3_hdp_flush_reg +ffffffff82add048 R nbio_v4_3_funcs +ffffffff82add130 R nbio_v4_3_sriov_funcs +ffffffff82ade000 R nbio_v6_1_hdp_flush_reg +ffffffff82ade048 R nbio_v6_1_funcs +ffffffff82adf000 R nbio_v7_0_hdp_flush_reg +ffffffff82adf048 R nbio_v7_0_funcs +ffffffff82ae0000 R nbio_v7_2_hdp_flush_reg +ffffffff82ae0048 R nbio_v7_2_funcs +ffffffff82ae1000 R nbio_v7_4_hdp_flush_reg +ffffffff82ae1048 R nbio_v7_4_ras_hw_ops +ffffffff82ae1088 R nbio_v7_4_funcs +ffffffff82ae1170 r nbio_v7_4_ras_controller_irq_funcs +ffffffff82ae1180 r nbio_v7_4_ras_err_event_athub_irq_funcs +ffffffff82ae2000 R nbio_v7_7_hdp_flush_reg +ffffffff82ae2048 R nbio_v7_7_funcs +ffffffff82ae3000 r nv_common_ip_funcs +ffffffff82ae30a0 R nv_common_ip_block +ffffffff82ae30b8 r nv_asic_funcs +ffffffff82ae3170 r nv_allowed_read_registers +ffffffff82ae32f0 r nv_video_codecs_encode +ffffffff82ae3300 r sc_video_codecs_decode +ffffffff82ae3310 r yc_video_codecs_decode +ffffffff82ae3320 r bg_video_codecs_encode +ffffffff82ae3330 r bg_video_codecs_decode +ffffffff82ae3340 r nv_video_codecs_decode +ffffffff82ae3350 r nv_video_codecs_encode_array +ffffffff82ae3380 r sc_video_codecs_decode_array +ffffffff82ae3420 r yc_video_codecs_decode_array +ffffffff82ae3490 r bg_video_codecs_decode_array +ffffffff82ae34d0 r nv_video_codecs_decode_array +ffffffff82ae4000 r psp_v10_0_funcs +ffffffff82ae5000 r psp_v11_0_funcs +ffffffff82ae6000 r psp_v11_0_8_funcs +ffffffff82ae7000 r psp_v12_0_funcs +ffffffff82ae8000 r psp_v13_0_funcs +ffffffff82ae9000 r psp_v13_0_4_funcs +ffffffff82aea000 r psp_v3_1_funcs +ffffffff82aeb000 r sdma_v2_4_ip_funcs +ffffffff82aeb0a0 R sdma_v2_4_ip_block +ffffffff82aeb0b8 r sdma_v2_4_ring_funcs +ffffffff82aeb1d8 r sdma_v2_4_buffer_funcs +ffffffff82aeb1f8 r sdma_v2_4_vm_pte_funcs +ffffffff82aeb218 r sdma_v2_4_trap_irq_funcs +ffffffff82aeb228 r sdma_v2_4_illegal_inst_irq_funcs +ffffffff82aeb240 r iceland_mgcg_cgcg_init +ffffffff82aeb260 r golden_settings_iceland_a11 +ffffffff82aec000 r sdma_v3_0_ip_funcs +ffffffff82aec0a0 R sdma_v3_0_ip_block +ffffffff82aec0b8 R sdma_v3_1_ip_block +ffffffff82aec0d0 r sdma_v3_0_ring_funcs +ffffffff82aec1f0 r sdma_v3_0_buffer_funcs +ffffffff82aec210 r sdma_v3_0_vm_pte_funcs +ffffffff82aec230 r sdma_v3_0_trap_irq_funcs +ffffffff82aec240 r sdma_v3_0_illegal_inst_irq_funcs +ffffffff82aec250 r fiji_mgcg_cgcg_init +ffffffff82aec270 r golden_settings_fiji_a10 +ffffffff82aec2d0 r tonga_mgcg_cgcg_init +ffffffff82aec2f0 r golden_settings_tonga_a11 +ffffffff82aec370 r golden_settings_polaris11_a11 +ffffffff82aec3f0 r golden_settings_polaris10_a11 +ffffffff82aec470 r cz_mgcg_cgcg_init +ffffffff82aec490 r cz_golden_settings_a11 +ffffffff82aec520 r stoney_mgcg_cgcg_init +ffffffff82aec530 r stoney_golden_settings_a11 +ffffffff82aed000 R sdma_v4_0_ip_funcs +ffffffff82aed0a0 R sdma_v4_0_ras_hw_ops +ffffffff82aed0e0 R sdma_v4_0_ip_block +ffffffff82aed0f8 r sdma_v4_0_ring_funcs_2nd_mmhub +ffffffff82aed218 r sdma_v4_0_ring_funcs +ffffffff82aed338 r sdma_v4_0_page_ring_funcs_2nd_mmhub +ffffffff82aed458 r sdma_v4_0_page_ring_funcs +ffffffff82aed578 r sdma_v4_0_buffer_funcs +ffffffff82aed598 r sdma_v4_0_vm_pte_funcs +ffffffff82aed5b8 r sdma_v4_0_trap_irq_funcs +ffffffff82aed5c8 r sdma_v4_0_illegal_inst_irq_funcs +ffffffff82aed5d8 r sdma_v4_0_ecc_irq_funcs +ffffffff82aed5e8 r sdma_v4_0_vm_hole_irq_funcs +ffffffff82aed5f8 r sdma_v4_0_doorbell_invalid_irq_funcs +ffffffff82aed608 r sdma_v4_0_pool_timeout_irq_funcs +ffffffff82aed618 r sdma_v4_0_srbm_write_irq_funcs +ffffffff82aed630 r golden_settings_sdma_4 +ffffffff82aed890 r golden_settings_sdma_vg10 +ffffffff82aed940 r golden_settings_sdma_vg12 +ffffffff82aed9f0 r golden_settings_sdma0_4_2_init +ffffffff82aeda10 r golden_settings_sdma0_4_2 +ffffffff82aedca0 r golden_settings_sdma1_4_2 +ffffffff82aedf30 r golden_settings_sdma_arct +ffffffff82aee230 r golden_settings_sdma_aldebaran +ffffffff82aee3a0 r golden_settings_sdma_4_1 +ffffffff82aee4b0 r golden_settings_sdma_rv2 +ffffffff82aee4e0 r golden_settings_sdma_rv1 +ffffffff82aee510 r golden_settings_sdma_4_3 +ffffffff82aee600 r sdma_v4_0_ras_fields +ffffffff82aef000 R sdma_v4_4_ras_hw_ops +ffffffff82aef040 r sdma_v4_4_ras_fields +ffffffff82af0000 R sdma_v5_0_ip_funcs +ffffffff82af00a0 R sdma_v5_0_ip_block +ffffffff82af00b8 r sdma_v5_0_ring_funcs +ffffffff82af01d8 r sdma_v5_0_buffer_funcs +ffffffff82af01f8 r sdma_v5_0_vm_pte_funcs +ffffffff82af0218 r sdma_v5_0_trap_irq_funcs +ffffffff82af0228 r sdma_v5_0_illegal_inst_irq_funcs +ffffffff82af0240 r golden_settings_sdma_5 +ffffffff82af0480 r golden_settings_sdma_nv10 +ffffffff82af04b0 r golden_settings_sdma_nv14 +ffffffff82af04e0 r golden_settings_sdma_5_sriov +ffffffff82af06c0 r golden_settings_sdma_nv12 +ffffffff82af0750 r golden_settings_sdma_cyan_skillfish +ffffffff82af1000 R sdma_v5_2_ip_funcs +ffffffff82af10a0 R sdma_v5_2_ip_block +ffffffff82af10b8 r sdma_v5_2_ring_funcs +ffffffff82af11d8 r sdma_v5_2_buffer_funcs +ffffffff82af11f8 r sdma_v5_2_vm_pte_funcs +ffffffff82af1218 r sdma_v5_2_trap_irq_funcs +ffffffff82af1228 r sdma_v5_2_illegal_inst_irq_funcs +ffffffff82af2000 R sdma_v6_0_ip_funcs +ffffffff82af20a0 R sdma_v6_0_ip_block +ffffffff82af20b8 r sdma_v6_0_ring_funcs +ffffffff82af21d8 r sdma_v6_0_buffer_funcs +ffffffff82af21f8 r sdma_v6_0_vm_pte_funcs +ffffffff82af2218 r sdma_v6_0_trap_irq_funcs +ffffffff82af2228 r sdma_v6_0_illegal_inst_irq_funcs +ffffffff82af3000 r smu_v11_0_i2c_algo +ffffffff82af3010 r smu_v11_0_i2c_i2c_lock_ops +ffffffff82af3028 r smu_v11_0_i2c_control_quirks +ffffffff82af4000 R smuio_v11_0_funcs +ffffffff82af5000 R smuio_v11_0_6_funcs +ffffffff82af6000 R smuio_v13_0_funcs +ffffffff82af7000 R smuio_v13_0_6_funcs +ffffffff82af8000 R smuio_v9_0_funcs +ffffffff82af9000 r soc15_common_ip_funcs +ffffffff82af90a0 R vega10_common_ip_block +ffffffff82af90b8 r soc15_asic_funcs +ffffffff82af9170 r vega20_asic_funcs +ffffffff82af9230 r soc15_allowed_read_registers +ffffffff82af93c0 r vega_video_codecs_encode +ffffffff82af93d0 r vega_video_codecs_decode +ffffffff82af93e0 r rv_video_codecs_decode +ffffffff82af93f0 r rn_video_codecs_decode +ffffffff82af9400 r vega_video_codecs_encode_array +ffffffff82af9430 r vega_video_codecs_decode_array +ffffffff82af94b0 r rv_video_codecs_decode_array +ffffffff82af9540 r rn_video_codecs_decode_array +ffffffff82afa000 r soc21_common_ip_funcs +ffffffff82afa0a0 R soc21_common_ip_block +ffffffff82afa0b8 r soc21_asic_funcs +ffffffff82afa170 r soc21_allowed_read_registers +ffffffff82afa2f0 r vcn_4_0_0_video_codecs_encode_vcn1 +ffffffff82afa300 r vcn_4_0_0_video_codecs_decode_vcn1 +ffffffff82afa310 r vcn_4_0_0_video_codecs_encode_vcn0 +ffffffff82afa320 r vcn_4_0_0_video_codecs_decode_vcn0 +ffffffff82afa330 r vcn_4_0_0_video_codecs_encode_array_vcn1 +ffffffff82afa360 r vcn_4_0_0_video_codecs_decode_array_vcn1 +ffffffff82afa3b0 r vcn_4_0_0_video_codecs_encode_array_vcn0 +ffffffff82afa3e0 r vcn_4_0_0_video_codecs_decode_array_vcn0 +ffffffff82afb000 r tonga_ih_ip_funcs +ffffffff82afb0a0 R tonga_ih_ip_block +ffffffff82afb0b8 r tonga_ih_funcs +ffffffff82afc000 R umc_v6_0_funcs +ffffffff82afd000 R umc_v6_1_channel_idx_tbl +ffffffff82afd080 R umc_v6_1_ras_hw_ops +ffffffff82afe000 R umc_v6_7_channel_idx_tbl_second +ffffffff82afe080 R umc_v6_7_channel_idx_tbl_first +ffffffff82afe100 R umc_v6_7_ras_hw_ops +ffffffff82aff000 R umc_v8_10_channelnum_map_colbit_table +ffffffff82aff040 R umc_v8_10_channel_idx_tbl +ffffffff82aff0a0 R umc_v8_10_ras_hw_ops +ffffffff82b00000 R umc_v8_7_channel_idx_tbl +ffffffff82b00040 R umc_v8_7_ras_hw_ops +ffffffff82b01000 r uvd_v5_0_ip_funcs +ffffffff82b010a0 R uvd_v5_0_ip_block +ffffffff82b010b8 r uvd_v5_0_ring_funcs +ffffffff82b011d8 r uvd_v5_0_irq_funcs +ffffffff82b02000 r uvd_v6_0_ip_funcs +ffffffff82b020a0 R uvd_v6_0_ip_block +ffffffff82b020b8 R uvd_v6_2_ip_block +ffffffff82b020d0 R uvd_v6_3_ip_block +ffffffff82b020e8 r uvd_v6_0_ring_vm_funcs +ffffffff82b02208 r uvd_v6_0_ring_phys_funcs +ffffffff82b02328 r uvd_v6_0_enc_ring_vm_funcs +ffffffff82b02448 r uvd_v6_0_irq_funcs +ffffffff82b03000 R uvd_v7_0_ip_funcs +ffffffff82b030a0 R uvd_v7_0_ip_block +ffffffff82b030b8 r uvd_v7_0_ring_vm_funcs +ffffffff82b031d8 r uvd_v7_0_enc_ring_vm_funcs +ffffffff82b032f8 r uvd_v7_0_irq_funcs +ffffffff82b04000 r vce_v3_0_ip_funcs +ffffffff82b040a0 R vce_v3_0_ip_block +ffffffff82b040b8 R vce_v3_1_ip_block +ffffffff82b040d0 R vce_v3_4_ip_block +ffffffff82b040e8 r vce_v3_0_ring_vm_funcs +ffffffff82b04208 r vce_v3_0_ring_phys_funcs +ffffffff82b04328 r vce_v3_0_irq_funcs +ffffffff82b05000 R vce_v4_0_ip_funcs +ffffffff82b050a0 R vce_v4_0_ip_block +ffffffff82b050b8 r vce_v4_0_ring_vm_funcs +ffffffff82b051d8 r vce_v4_0_irq_funcs +ffffffff82b06000 r vcn_v1_0_ip_funcs +ffffffff82b060a0 R vcn_v1_0_ip_block +ffffffff82b060b8 r vcn_v1_0_dec_ring_vm_funcs +ffffffff82b061d8 r vcn_v1_0_enc_ring_vm_funcs +ffffffff82b062f8 r vcn_v1_0_irq_funcs +ffffffff82b07000 r vcn_v2_0_ip_funcs +ffffffff82b070a0 R vcn_v2_0_ip_block +ffffffff82b070b8 r vcn_v2_0_dec_ring_vm_funcs +ffffffff82b071d8 r vcn_v2_0_enc_ring_vm_funcs +ffffffff82b072f8 r vcn_v2_0_irq_funcs +ffffffff82b08000 r vcn_v2_5_ip_funcs +ffffffff82b080a0 R vcn_v2_5_ip_block +ffffffff82b080b8 r vcn_v2_6_ip_funcs +ffffffff82b08158 R vcn_v2_6_ip_block +ffffffff82b08170 R vcn_v2_6_ras_hw_ops +ffffffff82b081b0 r vcn_v2_5_dec_ring_vm_funcs +ffffffff82b082d0 r vcn_v2_6_dec_ring_vm_funcs +ffffffff82b083f0 r vcn_v2_5_enc_ring_vm_funcs +ffffffff82b08510 r vcn_v2_6_enc_ring_vm_funcs +ffffffff82b08630 r vcn_v2_5_irq_funcs +ffffffff82b09000 r vcn_v3_0_ip_funcs +ffffffff82b090a0 R vcn_v3_0_ip_block +ffffffff82b090b8 r vcn_v3_0_dec_ring_vm_funcs +ffffffff82b091d8 r vcn_v3_0_enc_ring_vm_funcs +ffffffff82b092f8 r vcn_v3_0_irq_funcs +ffffffff82b0a000 r vcn_v4_0_ip_funcs +ffffffff82b0a0a0 R vcn_v4_0_ip_block +ffffffff82b0a0b8 r vcn_v4_0_unified_ring_vm_funcs +ffffffff82b0a1d8 r vcn_v4_0_irq_funcs +ffffffff82b0b000 R vega10_ih_ip_funcs +ffffffff82b0b0a0 R vega10_ih_ip_block +ffffffff82b0b0b8 r vega10_ih_funcs +ffffffff82b0b0d8 r vega10_ih_self_irq_funcs +ffffffff82b0c000 r GC_BASE +ffffffff82b0c064 r HDP_BASE +ffffffff82b0c0c8 r MMHUB_BASE +ffffffff82b0c12c r ATHUB_BASE +ffffffff82b0c190 r NBIO_BASE +ffffffff82b0c1f4 r MP0_BASE +ffffffff82b0c258 r MP1_BASE +ffffffff82b0c2bc r VCE_BASE +ffffffff82b0c320 r VCN_BASE +ffffffff82b0c384 r DF_BASE +ffffffff82b0c3e8 r DCE_BASE +ffffffff82b0c44c r OSSSYS_BASE +ffffffff82b0c4b0 r SDMA0_BASE +ffffffff82b0c514 r SDMA1_BASE +ffffffff82b0c578 r SMUIO_BASE +ffffffff82b0c5dc r PWR_BASE +ffffffff82b0c640 r NBIF_BASE +ffffffff82b0c6a4 r THM_BASE +ffffffff82b0c708 r CLK_BASE +ffffffff82b0d000 R vega20_ih_ip_funcs +ffffffff82b0d0a0 R vega20_ih_ip_block +ffffffff82b0d0b8 r vega20_ih_funcs +ffffffff82b0d0d8 r vega20_ih_self_irq_funcs +ffffffff82b0e000 r GC_BASE +ffffffff82b0e090 r HDP_BASE +ffffffff82b0e120 r MMHUB_BASE +ffffffff82b0e1b0 r ATHUB_BASE +ffffffff82b0e240 r NBIO_BASE +ffffffff82b0e2d0 r MP0_BASE +ffffffff82b0e360 r MP1_BASE +ffffffff82b0e3f0 r UVD_BASE +ffffffff82b0e480 r VCE_BASE +ffffffff82b0e510 r DF_BASE +ffffffff82b0e5a0 r DCE_BASE +ffffffff82b0e630 r OSSSYS_BASE +ffffffff82b0e6c0 r SDMA0_BASE +ffffffff82b0e750 r SDMA1_BASE +ffffffff82b0e7e0 r SMUIO_BASE +ffffffff82b0e870 r THM_BASE +ffffffff82b0e900 r CLK_BASE +ffffffff82b0e990 r UMC_BASE +ffffffff82b0ea20 r RSMU_BASE +ffffffff82b0f000 r vi_common_ip_block +ffffffff82b0f018 r vi_common_ip_funcs +ffffffff82b0f0b8 r vi_asic_funcs +ffffffff82b0f170 r vi_allowed_read_registers +ffffffff82b0f3d0 r topaz_video_codecs_encode +ffffffff82b0f3e0 r topaz_video_codecs_decode +ffffffff82b0f3f0 r tonga_video_codecs_encode +ffffffff82b0f400 r tonga_video_codecs_decode +ffffffff82b0f410 r polaris_video_codecs_encode +ffffffff82b0f420 r cz_video_codecs_decode +ffffffff82b0f430 r tonga_video_codecs_encode_array +ffffffff82b0f450 r tonga_video_codecs_decode_array +ffffffff82b0f4a0 r polaris_video_codecs_encode_array +ffffffff82b0f4d0 r cz_video_codecs_decode_array +ffffffff82b0f550 r iceland_mgcg_cgcg_init +ffffffff82b0f590 r fiji_mgcg_cgcg_init +ffffffff82b0f5f0 r tonga_mgcg_cgcg_init +ffffffff82b0f650 r cz_mgcg_cgcg_init +ffffffff82b0f690 r stoney_mgcg_cgcg_init +ffffffff82b10000 r amdgpu_dm_funcs +ffffffff82b100a0 R dm_ip_block +ffffffff82b100b8 R amdgpu_dm_encoder_helper_funcs +ffffffff82b10120 r dm_display_funcs +ffffffff82b10180 r hpd_disconnect_quirk_table +ffffffff82b10ef0 r amdgpu_dm_mode_funcs +ffffffff82b10f38 r amdgpu_dm_encoder_funcs +ffffffff82b10f58 r amdgpu_dm_connector_funcs +ffffffff82b10fd0 r amdgpu_dm_connector_helper_funcs +ffffffff82b11020 r amdgpu_dm_i2c_algo +ffffffff82b111f0 r add_fs_modes.common_rates +ffffffff82b11220 r amdgpu_dm_backlight_ops +ffffffff82b12000 r amdgpu_dm_crtc_funcs +ffffffff82b120c0 r amdgpu_dm_crtc_helper_funcs +ffffffff82b13000 r dm_dtn_log_begin.msg +ffffffff82b1300d r dm_dtn_log_end.msg +ffffffff82b13018 r SYNAPTICS_DEVICE_ID +ffffffff82b14000 r dm_crtc_irq_funcs +ffffffff82b14010 r dm_vline0_irq_funcs +ffffffff82b14020 r dm_dmub_outbox_irq_funcs +ffffffff82b14030 r dm_vupdate_irq_funcs +ffffffff82b14040 r dm_dmub_trace_irq_funcs +ffffffff82b14050 r dm_pageflip_irq_funcs +ffffffff82b14060 r dm_hpd_irq_funcs +ffffffff82b15000 r amdgpu_dm_encoder_funcs +ffffffff82b15020 r dm_mst_cbs +ffffffff82b15030 r dm_dp_mst_connector_funcs +ffffffff82b150a8 r dm_dp_mst_connector_helper_funcs +ffffffff82b16000 r dm_plane_funcs +ffffffff82b16068 r dm_plane_helper_funcs +ffffffff82b18000 r vbios_funcs +ffffffff82b19000 r vbios_funcs +ffffffff82b1e000 r command_table_helper_funcs +ffffffff82b1f000 r command_table_helper_funcs +ffffffff82b20000 r command_table_helper_funcs +ffffffff82b21000 r command_table_helper_funcs +ffffffff82b22000 r dce80_max_clks_by_state +ffffffff82b22028 r disp_clk_regs +ffffffff82b2207c r disp_clk_shift +ffffffff82b22088 r disp_clk_mask +ffffffff82b23000 r dce110_max_clks_by_state +ffffffff82b23028 r disp_clk_regs +ffffffff82b2307c r disp_clk_shift +ffffffff82b23088 r disp_clk_mask +ffffffff82b24000 r dce112_max_clks_by_state +ffffffff82b24028 r disp_clk_regs +ffffffff82b2407c r disp_clk_shift +ffffffff82b24088 r disp_clk_mask +ffffffff82b25000 r dce120_max_clks_by_state +ffffffff82b26000 r clk_mgr_regs +ffffffff82b26054 r clk_mgr_shift +ffffffff82b26060 r clk_mgr_mask +ffffffff82b27000 r clk_mgr_regs +ffffffff82b27054 r clk_mgr_shift +ffffffff82b27060 r clk_mgr_mask +ffffffff82b28000 r clk_mgr_regs +ffffffff82b28054 r clk_mgr_shift +ffffffff82b28060 r clk_mgr_mask +ffffffff82b29000 r lpddr5_wm_table +ffffffff82b290c0 r ddr5_wm_table +ffffffff82b2a000 r lpddr5_wm_table +ffffffff82b2a0c0 r ddr5_wm_table +ffffffff82b2b000 r lpddr5_wm_table +ffffffff82b2b0c0 r ddr5_wm_table +ffffffff82b2c000 r lpddr5_wm_table +ffffffff82b2c0c0 r ddr4_wm_table +ffffffff82b2d000 r clk_mgr_regs_dcn321 +ffffffff82b2d054 r clk_mgr_shift_dcn321 +ffffffff82b2d060 r clk_mgr_mask_dcn321 +ffffffff82b2d084 r clk_mgr_regs_dcn32 +ffffffff82b2d0d8 r clk_mgr_shift_dcn32 +ffffffff82b2d0e4 r clk_mgr_mask_dcn32 +ffffffff82b2e000 r DC_BUILD_ID +ffffffff82b30000 r output_csc_matrix +ffffffff82b300e0 r black_color_format +ffffffff82b31000 r DP_SINK_BRANCH_DEV_NAME_7580 +ffffffff82b32000 r DP_VGA_DONGLE_BRANCH_DEV_NAME +ffffffff82b32006 r DP_DVI_CONVERTER_ID_4 +ffffffff82b3200d r DP_DVI_CONVERTER_ID_5 +ffffffff82b33000 r DP_VGA_LVDS_CONVERTER_ID_2 +ffffffff82b33007 r DP_VGA_LVDS_CONVERTER_ID_3 +ffffffff82b33010 r dp_lt_fallbacks +ffffffff82b34000 r mandatory_dpcd_partitions +ffffffff82b36000 r dce_funcs +ffffffff82b37000 r funcs +ffffffff82b38000 R video_optimized_pixel_rates +ffffffff82b381b0 r dce110_clk_src_funcs +ffffffff82b381d8 r dce112_clk_src_funcs +ffffffff82b38200 r dcn20_clk_src_funcs +ffffffff82b38228 r dcn3_clk_src_funcs +ffffffff82b38250 r dcn31_clk_src_funcs +ffffffff82b39000 r dce_funcs +ffffffff82b39068 r dcn10_funcs +ffffffff82b390d0 r dcn20_funcs +ffffffff82b39138 r dcn21_funcs +ffffffff82b3a000 r dce_ipp_funcs +ffffffff82b3b000 r dce110_lnk_enc_funcs +ffffffff82b3c000 r dce_mi_funcs +ffffffff82b3c090 r dce112_mi_funcs +ffffffff82b3c120 r dce120_mi_funcs +ffffffff82b3c1b0 r pte_settings +ffffffff82b3d000 r funcs +ffffffff82b3e000 r dce_link_panel_cntl_funcs +ffffffff82b3f000 r filter_3tap_16p_upscale +ffffffff82b3f040 r filter_3tap_16p_116 +ffffffff82b3f080 r filter_3tap_16p_149 +ffffffff82b3f0c0 r filter_3tap_16p_183 +ffffffff82b3f100 r filter_3tap_64p_upscale +ffffffff82b3f1d0 r filter_3tap_64p_116 +ffffffff82b3f2a0 r filter_3tap_64p_149 +ffffffff82b3f370 r filter_3tap_64p_183 +ffffffff82b3f440 r filter_4tap_16p_upscale +ffffffff82b3f490 r filter_4tap_16p_116 +ffffffff82b3f4e0 r filter_4tap_16p_149 +ffffffff82b3f530 r filter_4tap_16p_183 +ffffffff82b3f580 r filter_4tap_64p_upscale +ffffffff82b3f690 r filter_4tap_64p_116 +ffffffff82b3f7a0 r filter_4tap_64p_149 +ffffffff82b3f8b0 r filter_4tap_64p_183 +ffffffff82b3f9c0 r filter_5tap_64p_upscale +ffffffff82b3fb10 r filter_5tap_64p_116 +ffffffff82b3fc60 r filter_5tap_64p_149 +ffffffff82b3fdb0 r filter_5tap_64p_183 +ffffffff82b3ff00 r filter_6tap_64p_upscale +ffffffff82b40090 r filter_6tap_64p_116 +ffffffff82b40220 r filter_6tap_64p_149 +ffffffff82b403b0 r filter_6tap_64p_183 +ffffffff82b40540 r filter_7tap_64p_upscale +ffffffff82b40710 r filter_7tap_64p_116 +ffffffff82b408e0 r filter_7tap_64p_149 +ffffffff82b40ab0 r filter_7tap_64p_183 +ffffffff82b40c80 r filter_8tap_64p_upscale +ffffffff82b40e90 r filter_8tap_64p_116 +ffffffff82b410a0 r filter_8tap_64p_149 +ffffffff82b412b0 r filter_8tap_64p_183 +ffffffff82b414c0 r filter_2tap_16p +ffffffff82b414f0 r filter_2tap_64p +ffffffff82b42000 r audio_clock_info_table_48bpc +ffffffff82b42190 r audio_clock_info_table_36bpc +ffffffff82b42320 r audio_clock_info_table +ffffffff82b424e0 r dce110_str_enc_funcs +ffffffff82b43000 r global_color_matrix +ffffffff82b430a8 r dce_transform_funcs +ffffffff82b44000 r abm_funcs +ffffffff82b45000 r psr_funcs +ffffffff82b45040 r DP_SINK_DEVICE_STR_ID_1 +ffffffff82b45045 r DP_SINK_DEVICE_STR_ID_2 +ffffffff82b46000 r reg_offsets +ffffffff82b47000 r bios_regs +ffffffff82b47008 r res_cap +ffffffff82b47050 r clk_src_regs +ffffffff82b4714c r dmcu_regs +ffffffff82b471a8 r dmcu_shift +ffffffff82b471bc r dmcu_mask +ffffffff82b47208 r abm_regs +ffffffff82b47248 r abm_shift +ffffffff82b4725c r abm_mask +ffffffff82b472b0 r dce100_tg_offsets +ffffffff82b472f8 r plane_cap +ffffffff82b47328 r res_create_funcs +ffffffff82b47358 r dce100_res_pool_funcs +ffffffff82b47440 r panel_cntl_regs +ffffffff82b47460 r panel_cntl_shift +ffffffff82b47470 r panel_cntl_mask +ffffffff82b474b0 r link_enc_regs +ffffffff82b47870 r link_enc_aux_regs +ffffffff82b478c0 r link_enc_hpd_regs +ffffffff82b478d8 r link_enc_feature +ffffffff82b478e8 r cs_shift +ffffffff82b478f4 r cs_mask +ffffffff82b47920 r mi_regs +ffffffff82b47c38 r mi_shifts +ffffffff82b47c80 r mi_masks +ffffffff82b47da0 r ipp_regs +ffffffff82b47f98 r ipp_shift +ffffffff82b47fc0 r ipp_mask +ffffffff82b48060 r xfm_regs +ffffffff82b48600 r xfm_shift +ffffffff82b48660 r xfm_mask +ffffffff82b487e0 r opp_regs +ffffffff82b48930 r opp_shift +ffffffff82b4895c r opp_mask +ffffffff82b48a10 r aux_engine_regs +ffffffff82b48b00 r aux_mask +ffffffff82b48b60 r aux_shift +ffffffff82b48b80 r i2c_hw_regs +ffffffff82b48cd0 r i2c_shifts +ffffffff82b48cfc r i2c_masks +ffffffff82b48da0 r audio_regs +ffffffff82b48ed4 r audio_shift +ffffffff82b48eec r audio_mask +ffffffff82b48f30 r stream_enc_regs +ffffffff82b495dc r se_shift +ffffffff82b49660 r se_mask +ffffffff82b49864 r hwseq_reg +ffffffff82b49a80 r hwseq_shift +ffffffff82b49b00 r hwseq_mask +ffffffff82b4a000 r reg_offsets +ffffffff82b4a018 r dce110_compressor_funcs +ffffffff82b4b000 r dce110_funcs +ffffffff82b4b2c0 r dce110_private_funcs +ffffffff82b4c000 r dce110_mem_input_v_funcs +ffffffff82b4c090 r dvmm_Hw_Setting_1DTiling +ffffffff82b4c120 r dvmm_Hw_Setting_2DTiling +ffffffff82b4c1b0 r dvmm_Hw_Setting_Linear +ffffffff82b4d000 r global_color_matrix +ffffffff82b4d0b0 r input_csc_matrix +ffffffff82b4e000 r funcs +ffffffff82b4f000 r bios_regs +ffffffff82b4f008 r dce110_res_pool_funcs +ffffffff82b4f0f0 r clk_src_regs +ffffffff82b4f1ec r dmcu_regs +ffffffff82b4f248 r dmcu_shift +ffffffff82b4f25c r dmcu_mask +ffffffff82b4f2a8 r abm_regs +ffffffff82b4f2e8 r abm_shift +ffffffff82b4f2fc r abm_mask +ffffffff82b4f350 r dce110_tg_offsets +ffffffff82b4f398 r res_create_funcs +ffffffff82b4f3c8 r plane_cap +ffffffff82b4f3f4 r underlay_plane_cap +ffffffff82b4f420 r stoney_resource_cap +ffffffff82b4f45c r carrizo_resource_cap +ffffffff82b4f4a0 r panel_cntl_regs +ffffffff82b4f4c0 r panel_cntl_shift +ffffffff82b4f4d0 r panel_cntl_mask +ffffffff82b4f510 r link_enc_regs +ffffffff82b4f8d0 r link_enc_aux_regs +ffffffff82b4f920 r link_enc_hpd_regs +ffffffff82b4f938 r link_enc_feature +ffffffff82b4f948 r cs_shift +ffffffff82b4f954 r cs_mask +ffffffff82b4f980 r mi_regs +ffffffff82b4fb0c r mi_shifts +ffffffff82b4fb54 r mi_masks +ffffffff82b4fc70 r ipp_regs +ffffffff82b4fd6c r ipp_shift +ffffffff82b4fd94 r ipp_mask +ffffffff82b4fe30 r xfm_regs +ffffffff82b50100 r xfm_shift +ffffffff82b50160 r xfm_mask +ffffffff82b502e0 r opp_regs +ffffffff82b50430 r opp_shift +ffffffff82b5045c r opp_mask +ffffffff82b50510 r aux_engine_regs +ffffffff82b50600 r aux_mask +ffffffff82b50660 r aux_shift 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polaris_10_resource_cap +ffffffff82b57480 r dce112_res_pool_funcs +ffffffff82b57560 r panel_cntl_regs +ffffffff82b57580 r panel_cntl_shift +ffffffff82b57590 r panel_cntl_mask +ffffffff82b575d0 r link_enc_regs +ffffffff82b57990 r link_enc_aux_regs +ffffffff82b579e0 r link_enc_hpd_regs +ffffffff82b579f8 r link_enc_feature +ffffffff82b57a08 r cs_shift +ffffffff82b57a14 r cs_mask +ffffffff82b57a40 r mi_regs +ffffffff82b57d58 r mi_shifts +ffffffff82b57da0 r mi_masks +ffffffff82b57ec0 r ipp_regs +ffffffff82b580b8 r ipp_shift +ffffffff82b580e0 r ipp_mask +ffffffff82b58180 r xfm_regs +ffffffff82b58720 r xfm_shift +ffffffff82b58780 r xfm_mask +ffffffff82b58900 r opp_regs +ffffffff82b58a50 r opp_shift +ffffffff82b58a7c r opp_mask +ffffffff82b58b30 r aux_engine_regs +ffffffff82b58c20 r aux_mask +ffffffff82b58c80 r aux_shift +ffffffff82b58ca0 r i2c_hw_regs +ffffffff82b58df0 r i2c_shifts +ffffffff82b58e1c r i2c_masks +ffffffff82b58ec0 r audio_regs +ffffffff82b58fc8 r audio_shift +ffffffff82b58fe0 r audio_mask +ffffffff82b59020 r stream_enc_regs +ffffffff82b595d8 r se_shift +ffffffff82b5965c r se_mask +ffffffff82b59860 r hwseq_reg +ffffffff82b59a7c r hwseq_shift +ffffffff82b59afc r hwseq_mask +ffffffff82b5a000 r bios_regs +ffffffff82b5a008 r res_cap +ffffffff82b5a048 r dce120_res_pool_funcs +ffffffff82b5a128 r debug_defaults +ffffffff82b5a2a0 r clk_src_regs +ffffffff82b5a498 r dmcu_regs +ffffffff82b5a4f4 r dmcu_shift +ffffffff82b5a508 r dmcu_mask +ffffffff82b5a554 r abm_regs +ffffffff82b5a594 r abm_shift +ffffffff82b5a5a8 r abm_mask +ffffffff82b5a5f0 r dce120_tg_offsets +ffffffff82b5a638 r dce121_res_create_funcs +ffffffff82b5a668 r res_create_funcs +ffffffff82b5a698 r plane_cap +ffffffff82b5a6d0 r panel_cntl_regs +ffffffff82b5a6f0 r panel_cntl_shift +ffffffff82b5a700 r panel_cntl_mask +ffffffff82b5a740 r link_enc_regs +ffffffff82b5ab00 r link_enc_aux_regs +ffffffff82b5ab50 r link_enc_hpd_regs +ffffffff82b5ab68 r link_enc_feature +ffffffff82b5ab78 r cs_shift +ffffffff82b5ab84 r cs_mask +ffffffff82b5abb0 r mi_regs +ffffffff82b5aec8 r mi_shifts +ffffffff82b5af10 r mi_masks +ffffffff82b5b030 r ipp_regs +ffffffff82b5b228 r ipp_shift +ffffffff82b5b250 r ipp_mask +ffffffff82b5b2f0 r xfm_regs +ffffffff82b5b890 r xfm_shift +ffffffff82b5b8f0 r xfm_mask +ffffffff82b5ba70 r opp_regs +ffffffff82b5bbc0 r opp_shift +ffffffff82b5bbec r opp_mask +ffffffff82b5bca0 r aux_engine_regs +ffffffff82b5bd90 r aux_mask +ffffffff82b5bdf0 r aux_shift +ffffffff82b5be10 r i2c_hw_regs +ffffffff82b5bf60 r i2c_shifts +ffffffff82b5bf8c r i2c_masks +ffffffff82b5c030 r audio_regs +ffffffff82b5c164 r audio_shift +ffffffff82b5c17c r audio_mask +ffffffff82b5c1c0 r stream_enc_regs +ffffffff82b5c778 r se_shift +ffffffff82b5c7fc r se_mask +ffffffff82b5ca00 r dce121_hwseq_reg +ffffffff82b5cc1c r dce121_hwseq_shift +ffffffff82b5cc9c r dce121_hwseq_mask +ffffffff82b5ce90 r hwseq_reg +ffffffff82b5d0ac r hwseq_shift +ffffffff82b5d12c r hwseq_mask +ffffffff82b5e000 r dce120_tg_funcs +ffffffff82b5f000 r bios_regs +ffffffff82b5f008 r res_cap +ffffffff82b5f048 r dce80_res_pool_funcs +ffffffff82b5f130 r clk_src_regs +ffffffff82b5f22c r dmcu_regs +ffffffff82b5f288 r dmcu_shift +ffffffff82b5f29c r dmcu_mask +ffffffff82b5f2e8 r abm_regs +ffffffff82b5f328 r abm_shift +ffffffff82b5f33c r abm_mask +ffffffff82b5f390 r dce80_tg_offsets +ffffffff82b5f3d8 r plane_cap +ffffffff82b5f408 r res_create_funcs +ffffffff82b5f440 r panel_cntl_regs +ffffffff82b5f460 r panel_cntl_shift +ffffffff82b5f470 r panel_cntl_mask +ffffffff82b5f4b0 r link_enc_regs +ffffffff82b5f870 r link_enc_aux_regs +ffffffff82b5f8c0 r link_enc_hpd_regs +ffffffff82b5f8d8 r link_enc_feature +ffffffff82b5f8e8 r cs_shift +ffffffff82b5f8f4 r cs_mask +ffffffff82b5f920 r mi_regs +ffffffff82b5fc38 r mi_shifts +ffffffff82b5fc80 r mi_masks +ffffffff82b5fda0 r ipp_regs +ffffffff82b5ff98 r ipp_shift +ffffffff82b5ffc0 r ipp_mask +ffffffff82b60060 r xfm_regs +ffffffff82b60600 r xfm_shift +ffffffff82b60660 r xfm_mask +ffffffff82b607e0 r opp_regs +ffffffff82b60930 r opp_shift +ffffffff82b6095c r opp_mask +ffffffff82b60a10 r aux_engine_regs +ffffffff82b60b00 r aux_mask +ffffffff82b60b60 r aux_shift +ffffffff82b60b80 r i2c_hw_regs +ffffffff82b60cd0 r i2c_shifts +ffffffff82b60cfc r i2c_masks +ffffffff82b60da0 r audio_regs +ffffffff82b60ed4 r audio_shift +ffffffff82b60eec r audio_mask +ffffffff82b60f30 r stream_enc_regs +ffffffff82b615dc r se_shift +ffffffff82b61660 r se_mask +ffffffff82b61864 r hwseq_reg +ffffffff82b61a80 r hwseq_shift +ffffffff82b61b00 r hwseq_mask +ffffffff82b61cf4 r res_cap_81 +ffffffff82b61d30 r res_cap_83 +ffffffff82b62000 r reg_offsets +ffffffff82b62048 r dce80_tg_funcs +ffffffff82b63000 r dcn10_dpp_funcs +ffffffff82b64000 r dpp_input_csc_matrix +ffffffff82b66000 r hubbub1_funcs +ffffffff82b67000 r dcn10_hubp_funcs +ffffffff82b68000 r reduceSizeAndFraction.prime_numbers +ffffffff82b6a000 r dcn10_funcs +ffffffff82b6a2c0 r dcn10_private_funcs +ffffffff82b6b000 r dcn10_ipp_funcs +ffffffff82b6b048 r dcn20_ipp_funcs +ffffffff82b6c000 r dcn10_lnk_enc_funcs +ffffffff82b6d000 r dcn10_mpc_funcs +ffffffff82b6e000 r dcn10_opp_funcs +ffffffff82b6f000 r dcn10_tg_funcs +ffffffff82b70000 r bios_regs +ffffffff82b70008 r rv2_res_cap +ffffffff82b70044 r res_cap +ffffffff82b70080 r debug_defaults_drv +ffffffff82b701f8 r debug_defaults_diags +ffffffff82b70370 r clk_src_regs +ffffffff82b704c0 r dmcu_regs +ffffffff82b7051c r dmcu_shift +ffffffff82b70530 r dmcu_mask +ffffffff82b7057c r abm_regs +ffffffff82b705bc r abm_shift +ffffffff82b705d0 r abm_mask +ffffffff82b70618 r res_create_funcs +ffffffff82b70648 r res_create_maximus_funcs +ffffffff82b70678 r plane_cap +ffffffff82b706a8 r dcn10_res_pool_funcs +ffffffff82b70790 r panel_cntl_regs +ffffffff82b707b0 r panel_cntl_shift +ffffffff82b707c0 r panel_cntl_mask +ffffffff82b70800 r link_enc_regs +ffffffff82b70d10 r link_enc_aux_regs +ffffffff82b70d50 r link_enc_hpd_regs +ffffffff82b70d60 r le_shift +ffffffff82b70e50 r le_mask +ffffffff82b71208 r link_enc_feature +ffffffff82b71218 r cs_shift +ffffffff82b71224 r cs_mask +ffffffff82b71250 r hubp_regs +ffffffff82b71900 r hubp_shift +ffffffff82b719c4 r hubp_mask +ffffffff82b71cd0 r ipp_regs +ffffffff82b71db0 r ipp_shift +ffffffff82b71dcc r ipp_mask +ffffffff82b71e40 r tf_regs +ffffffff82b72da0 r tf_shift +ffffffff82b73008 r tf_mask +ffffffff82b739a0 r opp_regs +ffffffff82b73a70 r opp_shift +ffffffff82b73a90 r opp_mask +ffffffff82b73b10 r tg_regs +ffffffff82b74010 r tg_shift +ffffffff82b740d0 r tg_mask +ffffffff82b743d0 r aux_engine_regs +ffffffff82b744c0 r aux_mask +ffffffff82b74520 r aux_shift +ffffffff82b74540 r i2c_hw_regs +ffffffff82b74690 r i2c_shifts +ffffffff82b746bc r i2c_masks +ffffffff82b74760 r mpc_regs +ffffffff82b74880 r mpc_shift +ffffffff82b74898 r mpc_mask +ffffffff82b748f4 r hubbub_reg +ffffffff82b74a68 r hubbub_shift +ffffffff82b74af0 r hubbub_mask +ffffffff82b74d10 r audio_regs +ffffffff82b74dc0 r audio_shift +ffffffff82b74dd8 r audio_mask +ffffffff82b74e20 r stream_enc_regs +ffffffff82b75370 r se_shift +ffffffff82b7544c r se_mask +ffffffff82b757b8 r hwseq_reg +ffffffff82b759d4 r hwseq_shift +ffffffff82b75a54 r hwseq_mask +ffffffff82b76000 r audio_clock_info_table_48bpc +ffffffff82b76190 r audio_clock_info_table_36bpc +ffffffff82b76320 r audio_clock_info_table +ffffffff82b764e0 r dcn10_str_enc_funcs +ffffffff82b77000 r dccg2_funcs +ffffffff82b79000 r dpp_input_csc_matrix +ffffffff82b7a000 R dcn20_dsc_funcs +ffffffff82b7b000 R dcn20_dwbc_funcs +ffffffff82b7c000 r filter_12tap_16p_upscale +ffffffff82b7c0e0 r filter_12tap_16p_117 +ffffffff82b7c1c0 r filter_12tap_16p_150 +ffffffff82b7c2a0 r filter_12tap_16p_183 +ffffffff82b7c380 r filter_11tap_16p_upscale +ffffffff82b7c450 r filter_11tap_16p_117 +ffffffff82b7c520 r filter_11tap_16p_150 +ffffffff82b7c5f0 r filter_11tap_16p_183 +ffffffff82b7c6c0 r filter_10tap_16p_upscale +ffffffff82b7c780 r filter_10tap_16p_117 +ffffffff82b7c840 r filter_10tap_16p_150 +ffffffff82b7c900 r filter_10tap_16p_183 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mcif_wb20_mask +ffffffff82b8b4b0 r link_enc_feature +ffffffff82b8b4c0 r bios_regs +ffffffff82b8b4c8 r dcn20_res_pool_funcs +ffffffff82b8b5a8 r res_cap_nv14 +ffffffff82b8b5e8 r debug_defaults_drv +ffffffff82b8b760 r debug_defaults_diags +ffffffff82b8b8e0 r clk_src_regs +ffffffff82b8bad8 r dccg_regs +ffffffff82b8bbc4 r dccg_shift +ffffffff82b8bc5c r dccg_mask +ffffffff82b8beb8 r dmcu_regs +ffffffff82b8bf14 r dmcu_shift +ffffffff82b8bf28 r dmcu_mask +ffffffff82b8bf74 r abm_regs +ffffffff82b8bfb4 r abm_shift +ffffffff82b8bfc8 r abm_mask +ffffffff82b8c010 r res_create_funcs +ffffffff82b8c040 r res_create_maximus_funcs +ffffffff82b8c070 r plane_cap +ffffffff82b8c0a0 r panel_cntl_regs +ffffffff82b8c0c0 r panel_cntl_shift +ffffffff82b8c0d0 r panel_cntl_mask +ffffffff82b8c10c r cs_shift +ffffffff82b8c118 r cs_mask +ffffffff82b8c140 r audio_regs +ffffffff82b8c274 r audio_shift +ffffffff82b8c28c r audio_mask +ffffffff82b8d000 r dcn20_str_enc_funcs +ffffffff82b8e000 r dccg201_funcs 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r dcn21_private_funcs +ffffffff82b9c000 r dcn21_mpll_cfg_ref +ffffffff82b9c190 r dcn21_link_enc_funcs +ffffffff82b9d000 r bios_regs +ffffffff82b9d008 r res_cap_rn +ffffffff82b9d048 r dcn21_res_pool_funcs +ffffffff82b9d128 r debug_defaults_drv +ffffffff82b9d2a0 r debug_defaults_diags +ffffffff82b9d420 r clk_src_regs +ffffffff82b9d5c4 r dccg_regs +ffffffff82b9d6b0 r dccg_shift +ffffffff82b9d748 r dccg_mask +ffffffff82b9d9a4 r dmcu_regs +ffffffff82b9da00 r dmcu_shift +ffffffff82b9da14 r dmcu_mask +ffffffff82b9da60 r abm_regs +ffffffff82b9daa0 r abm_shift +ffffffff82b9dab4 r abm_mask +ffffffff82b9db00 r res_create_funcs +ffffffff82b9db30 r res_create_maximus_funcs +ffffffff82b9db60 r plane_cap +ffffffff82b9db90 r panel_cntl_regs +ffffffff82b9dbb0 r panel_cntl_shift +ffffffff82b9dbc0 r panel_cntl_mask +ffffffff82b9dc00 r link_enc_regs +ffffffff82b9e260 r link_enc_aux_regs +ffffffff82b9e2b0 r link_enc_hpd_regs +ffffffff82b9e2c4 r le_shift +ffffffff82b9e3b4 r le_mask +ffffffff82b9e76c r link_enc_feature +ffffffff82b9e77c r panel_config_defaults +ffffffff82b9e7b0 r cs_shift +ffffffff82b9e7bc r cs_mask +ffffffff82b9e7f0 r hubp_regs +ffffffff82b9f020 r hubp_shift +ffffffff82b9f11c r hubp_mask +ffffffff82b9f510 r ipp_regs +ffffffff82b9f5f0 r ipp_shift +ffffffff82b9f60c r ipp_mask +ffffffff82b9f680 r tf_regs +ffffffff82ba0740 r tf_shift +ffffffff82ba09c4 r tf_mask +ffffffff82ba13e0 r opp_regs +ffffffff82ba15f0 r opp_shift +ffffffff82ba1628 r opp_mask +ffffffff82ba1700 r tg_regs +ffffffff82ba1c00 r tg_shift +ffffffff82ba1cc0 r tg_mask +ffffffff82ba1fc0 r aux_engine_regs +ffffffff82ba2088 r aux_mask +ffffffff82ba20e8 r aux_shift +ffffffff82ba2100 r i2c_hw_regs +ffffffff82ba2218 r i2c_shifts +ffffffff82ba2244 r i2c_masks +ffffffff82ba22e8 r mpc_regs +ffffffff82ba2830 r mpc_shift +ffffffff82ba2878 r mpc_mask +ffffffff82ba298c r hubbub_reg +ffffffff82ba2b00 r hubbub_shift +ffffffff82ba2b88 r hubbub_mask +ffffffff82ba2db0 r vmid_regs +ffffffff82ba2f70 r vmid_shifts +ffffffff82ba2f78 r vmid_masks +ffffffff82ba2fa0 r dsc_regs +ffffffff82ba3438 r dsc_shift +ffffffff82ba34f0 r dsc_mask +ffffffff82ba37d0 r audio_regs +ffffffff82ba38d8 r audio_shift +ffffffff82ba38f0 r audio_mask +ffffffff82ba3930 r stream_enc_regs +ffffffff82ba3fd4 r se_shift +ffffffff82ba40b0 r se_mask +ffffffff82ba441c r hwseq_reg +ffffffff82ba4638 r hwseq_shift +ffffffff82ba46b8 r hwseq_mask +ffffffff82ba5000 r dccg3_funcs +ffffffff82ba6000 r dcn30_link_enc_funcs +ffffffff82ba7000 r dcn30_str_enc_funcs +ffffffff82ba8000 r dpp_input_csc_matrix +ffffffff82ba9000 R dcn30_dwbc_funcs +ffffffff82baa000 r hubbub30_funcs +ffffffff82bac000 r dcn30_funcs +ffffffff82bac2c0 r dcn30_private_funcs +ffffffff82bad000 R dcn30_mmhubbub_funcs +ffffffff82bae000 R dcn30_mpc_funcs +ffffffff82baf000 r bios_regs +ffffffff82baf008 r res_cap_dcn3 +ffffffff82baf048 r debug_defaults_drv +ffffffff82baf1c0 r debug_defaults_diags +ffffffff82baf340 r clk_src_regs +ffffffff82baf538 r dccg_regs +ffffffff82baf624 r dccg_shift +ffffffff82baf6bc r dccg_mask +ffffffff82baf920 r abm_regs +ffffffff82bafaa0 r abm_shift +ffffffff82bafab4 r abm_mask +ffffffff82bafb00 r res_create_funcs +ffffffff82bafb30 r res_create_maximus_funcs +ffffffff82bafb60 r plane_cap +ffffffff82bafb90 r dcn30_res_pool_funcs +ffffffff82bafc70 r panel_cntl_regs +ffffffff82bafc90 r panel_cntl_shift +ffffffff82bafca0 r panel_cntl_mask +ffffffff82bafce0 r link_enc_regs +ffffffff82bb0480 r link_enc_aux_regs +ffffffff82bb04e0 r link_enc_hpd_regs +ffffffff82bb04f8 r le_shift +ffffffff82bb05e8 r le_mask +ffffffff82bb09a0 r link_enc_feature +ffffffff82bb09b0 r cs_shift +ffffffff82bb09bc r cs_mask +ffffffff82bb09e4 r hubbub_reg +ffffffff82bb0b58 r hubbub_shift +ffffffff82bb0be0 r hubbub_mask +ffffffff82bb0e00 r vmid_regs +ffffffff82bb0fc0 r vmid_shifts +ffffffff82bb0fc8 r vmid_masks +ffffffff82bb0ff0 r hubp_regs +ffffffff82bb1c38 r hubp_shift +ffffffff82bb1d34 r hubp_mask +ffffffff82bb2130 r dpp_regs +ffffffff82bb40b0 r tf_shift +ffffffff82bb4380 r tf_mask +ffffffff82bb4ec0 r opp_regs +ffffffff82bb50d0 r opp_shift +ffffffff82bb5108 r opp_mask +ffffffff82bb51e0 r optc_regs +ffffffff82bb5960 r optc_shift +ffffffff82bb5a20 r optc_mask +ffffffff82bb5d20 r mpc_regs +ffffffff82bb750c r mpc_shift +ffffffff82bb75e8 r mpc_mask +ffffffff82bb7960 r dsc_regs +ffffffff82bb7df8 r dsc_shift +ffffffff82bb7eb0 r dsc_mask +ffffffff82bb8190 r dwbc30_regs +ffffffff82bb836c r dwbc30_shift +ffffffff82bb84a0 r dwbc30_mask +ffffffff82bb8970 r mcif_wb30_regs +ffffffff82bb8a6c r mcif_wb30_shift +ffffffff82bb8b18 r mcif_wb30_mask +ffffffff82bb8dd0 r aux_engine_regs +ffffffff82bb8ec0 r aux_mask +ffffffff82bb8f20 r aux_shift +ffffffff82bb8f40 r i2c_hw_regs +ffffffff82bb9090 r i2c_shifts +ffffffff82bb90bc r i2c_masks +ffffffff82bb9160 r audio_regs +ffffffff82bb9294 r audio_shift +ffffffff82bb92ac r audio_mask +ffffffff82bb92f0 r stream_enc_regs +ffffffff82bb9ae8 r se_shift +ffffffff82bb9bc4 r se_mask +ffffffff82bb9f30 r vpg_regs +ffffffff82bb9fbc r vpg_shift +ffffffff82bb9fe4 r vpg_mask +ffffffff82bba080 r afmt_regs +ffffffff82bba17c r afmt_shift +ffffffff82bba190 r afmt_mask +ffffffff82bba1d4 r hwseq_reg +ffffffff82bba3f0 r hwseq_shift +ffffffff82bba470 r hwseq_mask +ffffffff82bbb000 r dccg301_funcs +ffffffff82bbc000 r dcn301_link_enc_funcs +ffffffff82bbd000 r hubbub301_funcs +ffffffff82bbe000 r dcn301_funcs +ffffffff82bbe2c0 r dcn301_private_funcs +ffffffff82bbf000 r dcn301_link_panel_cntl_funcs +ffffffff82bc0000 r bios_regs +ffffffff82bc0008 r debug_defaults_drv +ffffffff82bc0180 r debug_defaults_diags +ffffffff82bc0300 r clk_src_regs +ffffffff82bc0450 r dccg_regs +ffffffff82bc053c r dccg_shift +ffffffff82bc05d4 r dccg_mask +ffffffff82bc0830 r abm_regs +ffffffff82bc0930 r abm_shift +ffffffff82bc0944 r abm_mask +ffffffff82bc0990 r res_create_funcs +ffffffff82bc09c0 r res_create_maximus_funcs +ffffffff82bc09f0 r plane_cap +ffffffff82bc0a20 r panel_cntl_regs +ffffffff82bc0a60 r panel_cntl_shift +ffffffff82bc0a70 r panel_cntl_mask +ffffffff82bc0ab0 r link_enc_regs +ffffffff82bc0fc0 r link_enc_aux_regs +ffffffff82bc1000 r link_enc_hpd_regs +ffffffff82bc1010 r le_shift +ffffffff82bc1100 r le_mask +ffffffff82bc14b8 r link_enc_feature +ffffffff82bc14c8 r cs_shift +ffffffff82bc14d4 r cs_mask +ffffffff82bc14fc r hubbub_reg +ffffffff82bc1670 r hubbub_shift +ffffffff82bc16f8 r hubbub_mask +ffffffff82bc1920 r vmid_regs +ffffffff82bc1ae0 r vmid_shifts +ffffffff82bc1ae8 r vmid_masks +ffffffff82bc1b10 r hubp_regs +ffffffff82bc2340 r hubp_shift +ffffffff82bc243c r hubp_mask +ffffffff82bc2830 r dpp_regs +ffffffff82bc3d30 r tf_shift +ffffffff82bc4000 r tf_mask +ffffffff82bc4b40 r opp_regs +ffffffff82bc4ca0 r opp_shift +ffffffff82bc4cd8 r opp_mask +ffffffff82bc4db0 r optc_regs +ffffffff82bc52b0 r optc_shift +ffffffff82bc5370 r optc_mask +ffffffff82bc5670 r mpc_regs +ffffffff82bc6e5c r mpc_shift +ffffffff82bc6f38 r mpc_mask +ffffffff82bc72b0 r dsc_regs +ffffffff82bc74fc r dsc_shift +ffffffff82bc75b4 r dsc_mask +ffffffff82bc7890 r dwbc30_regs +ffffffff82bc7a6c r dwbc30_shift +ffffffff82bc7ba0 r dwbc30_mask +ffffffff82bc8070 r mcif_wb30_regs +ffffffff82bc816c r mcif_wb30_shift +ffffffff82bc8218 r mcif_wb30_mask +ffffffff82bc84d0 r aux_engine_regs +ffffffff82bc8570 r aux_mask +ffffffff82bc85d0 r aux_shift +ffffffff82bc85f0 r i2c_hw_regs +ffffffff82bc86d0 r i2c_shifts +ffffffff82bc86fc r i2c_masks +ffffffff82bc87a0 r audio_regs +ffffffff82bc88d4 r audio_shift +ffffffff82bc88ec r audio_mask +ffffffff82bc8930 r stream_enc_regs +ffffffff82bc8e80 r se_shift +ffffffff82bc8f5c r se_mask +ffffffff82bc92d0 r vpg_regs +ffffffff82bc9320 r vpg_shift +ffffffff82bc9348 r vpg_mask +ffffffff82bc93e0 r afmt_regs +ffffffff82bc9470 r afmt_shift +ffffffff82bc9484 r afmt_mask +ffffffff82bc94c8 r hwseq_reg +ffffffff82bc96e4 r hwseq_shift +ffffffff82bc9764 r hwseq_mask +ffffffff82bca000 r bios_regs +ffffffff82bca008 r res_cap_dcn302 +ffffffff82bca048 r debug_defaults_drv +ffffffff82bca1c0 r debug_defaults_diags +ffffffff82bca340 r clk_src_regs +ffffffff82bca4e4 r dccg_regs +ffffffff82bca5d0 r dccg_shift +ffffffff82bca668 r dccg_mask +ffffffff82bca8d0 r abm_regs +ffffffff82bcaa10 r abm_shift +ffffffff82bcaa24 r abm_mask +ffffffff82bcaa70 r res_create_funcs +ffffffff82bcaaa0 r res_create_maximus_funcs +ffffffff82bcaad0 r plane_cap +ffffffff82bcab00 r panel_cntl_regs +ffffffff82bcab20 r panel_cntl_shift +ffffffff82bcab30 r panel_cntl_mask +ffffffff82bcab70 r link_enc_regs +ffffffff82bcb1d0 r link_enc_aux_regs +ffffffff82bcb220 r link_enc_hpd_regs +ffffffff82bcb234 r le_shift +ffffffff82bcb324 r le_mask +ffffffff82bcb6dc r link_enc_feature +ffffffff82bcb6ec r cs_shift +ffffffff82bcb6f8 r cs_mask +ffffffff82bcb720 r hubbub_reg +ffffffff82bcb894 r hubbub_shift +ffffffff82bcb91c r hubbub_mask +ffffffff82bcbb40 r vmid_regs +ffffffff82bcbd00 r vmid_shifts +ffffffff82bcbd08 r vmid_masks +ffffffff82bcbd30 r hubp_regs +ffffffff82bcc76c r hubp_shift +ffffffff82bcc868 r hubp_mask +ffffffff82bccc60 r dpp_regs +ffffffff82bce6a0 r tf_shift +ffffffff82bce970 r tf_mask +ffffffff82bcf4b0 r opp_regs +ffffffff82bcf668 r opp_shift +ffffffff82bcf6a0 r opp_mask +ffffffff82bcf780 r optc_regs +ffffffff82bcfdc0 r optc_shift +ffffffff82bcfe80 r optc_mask +ffffffff82bd0180 r mpc_regs +ffffffff82bd196c r mpc_shift +ffffffff82bd1a48 r mpc_mask +ffffffff82bd1dc0 r dsc_regs +ffffffff82bd2194 r dsc_shift +ffffffff82bd224c r dsc_mask +ffffffff82bd2530 r dwbc30_regs +ffffffff82bd270c r dwbc30_shift +ffffffff82bd2840 r dwbc30_mask +ffffffff82bd2d10 r mcif_wb30_regs +ffffffff82bd2e0c r mcif_wb30_shift +ffffffff82bd2eb8 r mcif_wb30_mask +ffffffff82bd3170 r aux_engine_regs +ffffffff82bd3238 r aux_mask +ffffffff82bd3298 r aux_shift +ffffffff82bd32b0 r i2c_hw_regs +ffffffff82bd33c8 r i2c_shifts +ffffffff82bd33f4 r i2c_masks +ffffffff82bd34a0 r audio_regs +ffffffff82bd35d4 r audio_shift +ffffffff82bd35ec r audio_mask +ffffffff82bd3630 r stream_enc_regs +ffffffff82bd3cd4 r se_shift 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+ffffffff82bd5c68 r le_shift +ffffffff82bd5d58 r le_mask +ffffffff82bd6110 r link_enc_feature +ffffffff82bd6120 r cs_shift +ffffffff82bd612c r cs_mask +ffffffff82bd6154 r hubbub_reg +ffffffff82bd62c8 r hubbub_shift +ffffffff82bd6350 r hubbub_mask +ffffffff82bd6570 r vmid_regs +ffffffff82bd6730 r vmid_shifts +ffffffff82bd6738 r vmid_masks +ffffffff82bd6760 r hubp_regs +ffffffff82bd6b78 r hubp_shift +ffffffff82bd6c74 r hubp_mask +ffffffff82bd7070 r dpp_regs +ffffffff82bd7af0 r tf_shift +ffffffff82bd7dc0 r tf_mask +ffffffff82bd8900 r opp_regs +ffffffff82bd89b0 r opp_shift +ffffffff82bd89e8 r opp_mask +ffffffff82bd8ac0 r optc_regs +ffffffff82bd8d40 r optc_shift +ffffffff82bd8e00 r optc_mask +ffffffff82bd9100 r mpc_regs +ffffffff82bda8ec r mpc_shift +ffffffff82bda9c8 r mpc_mask +ffffffff82bdad40 r dsc_regs +ffffffff82bdaec8 r dsc_shift +ffffffff82bdaf80 r dsc_mask +ffffffff82bdb260 r dwbc30_regs +ffffffff82bdb43c r dwbc30_shift +ffffffff82bdb570 r dwbc30_mask +ffffffff82bdba40 r mcif_wb30_regs +ffffffff82bdbb3c r mcif_wb30_shift +ffffffff82bdbbe8 r mcif_wb30_mask +ffffffff82bdbea0 r aux_engine_regs +ffffffff82bdbef0 r aux_mask +ffffffff82bdbf50 r aux_shift +ffffffff82bdbf70 r i2c_hw_regs +ffffffff82bdbfe0 r i2c_shifts +ffffffff82bdc00c r i2c_masks +ffffffff82bdc0b0 r audio_regs +ffffffff82bdc1e4 r audio_shift +ffffffff82bdc1fc r audio_mask +ffffffff82bdc240 r stream_enc_regs +ffffffff82bdc4e8 r se_shift +ffffffff82bdc5c4 r se_mask +ffffffff82bdc930 r vpg_regs +ffffffff82bdc96c r vpg_shift +ffffffff82bdc994 r vpg_mask +ffffffff82bdca30 r afmt_regs +ffffffff82bdca9c r afmt_shift +ffffffff82bdcab0 r afmt_mask +ffffffff82bdcaf4 r hwseq_reg +ffffffff82bdcd10 r hwseq_shift +ffffffff82bdcd90 r hwseq_mask +ffffffff82bdd000 r dccg31_funcs +ffffffff82bde000 r dcn31_link_enc_funcs +ffffffff82bdf000 r dcn30_str_enc_funcs +ffffffff82be0000 r hubbub31_funcs +ffffffff82be1000 r dcn31_funcs +ffffffff82be12c0 r dcn31_private_funcs +ffffffff82be2000 r dcn31_link_panel_cntl_funcs +ffffffff82be3000 r bios_regs +ffffffff82be3008 r res_cap_dcn31 +ffffffff82be3048 r debug_defaults_diags +ffffffff82be31c0 r clk_src_regs +ffffffff82be3370 r clk_src_regs_b0 +ffffffff82be3514 r dccg_regs +ffffffff82be3600 r dccg_shift +ffffffff82be3698 r dccg_mask +ffffffff82be3900 r abm_regs +ffffffff82be3a00 r abm_shift +ffffffff82be3a14 r abm_mask +ffffffff82be3a60 r res_create_funcs +ffffffff82be3a90 r res_create_maximus_funcs +ffffffff82be3ac0 r plane_cap +ffffffff82be3af0 r link_enc_regs +ffffffff82be4150 r link_enc_aux_regs +ffffffff82be41a0 r link_enc_hpd_regs +ffffffff82be41b4 r le_shift +ffffffff82be42a4 r le_mask +ffffffff82be465c r link_enc_feature +ffffffff82be466c r panel_config_defaults +ffffffff82be46a0 r debug_defaults_drv +ffffffff82be4818 r cs_shift +ffffffff82be4824 r cs_mask +ffffffff82be484c r hubbub_reg +ffffffff82be49c0 r hubbub_shift +ffffffff82be4a48 r hubbub_mask +ffffffff82be4c70 r vmid_regs +ffffffff82be4e30 r vmid_shifts +ffffffff82be4e38 r vmid_masks +ffffffff82be4e60 r hubp_regs +ffffffff82be5690 r hubp_shift +ffffffff82be578c r hubp_mask +ffffffff82be5b80 r dpp_regs +ffffffff82be7080 r tf_shift +ffffffff82be7350 r tf_mask +ffffffff82be7e90 r opp_regs +ffffffff82be7ff0 r opp_shift +ffffffff82be8028 r opp_mask +ffffffff82be8100 r optc_regs +ffffffff82be8600 r optc_shift +ffffffff82be86c0 r optc_mask +ffffffff82be89c0 r mpc_regs +ffffffff82bea1ac r mpc_shift +ffffffff82bea288 r mpc_mask +ffffffff82bea600 r dsc_regs +ffffffff82bea84c r dsc_shift +ffffffff82bea904 r dsc_mask +ffffffff82beabe0 r dwbc30_regs +ffffffff82beadbc r dwbc30_shift +ffffffff82beaef0 r dwbc30_mask +ffffffff82beb3c0 r mcif_wb30_regs +ffffffff82beb4bc r mcif_wb30_shift +ffffffff82beb568 r mcif_wb30_mask +ffffffff82beb820 r aux_engine_regs +ffffffff82beb8e8 r aux_mask +ffffffff82beb948 r aux_shift +ffffffff82beb960 r i2c_hw_regs +ffffffff82beba78 r i2c_shifts +ffffffff82bebaa4 r i2c_masks +ffffffff82bebb50 r audio_regs +ffffffff82bebc84 r audio_shift +ffffffff82bebc9c r audio_mask +ffffffff82bebcd8 r se_shift +ffffffff82bebdb4 r se_mask +ffffffff82bec120 r vpg_regs +ffffffff82bec210 r vpg_shift +ffffffff82bec238 r vpg_mask +ffffffff82bec2e0 r afmt_regs +ffffffff82bec3b8 r afmt_shift +ffffffff82bec3cc r afmt_mask +ffffffff82bec420 r stream_enc_regs +ffffffff82bedac0 r hpo_dp_stream_enc_regs +ffffffff82bedcf0 r hpo_dp_se_shift +ffffffff82bedd18 r hpo_dp_se_mask +ffffffff82beddc0 r apg_regs +ffffffff82bede00 r apg_shift +ffffffff82bede08 r apg_mask +ffffffff82bede20 r hpo_dp_link_enc_regs +ffffffff82bedf30 r hpo_dp_le_shift +ffffffff82bedf4c r hpo_dp_le_mask +ffffffff82bedfb0 r hwseq_reg +ffffffff82bee1cc r hwseq_shift +ffffffff82bee24c r hwseq_mask +ffffffff82bef000 r dccg314_funcs +ffffffff82bf0000 r dcn314_str_enc_funcs +ffffffff82bf1000 r dcn314_funcs +ffffffff82bf12c0 r dcn314_private_funcs +ffffffff82bf2000 r bios_regs +ffffffff82bf2008 r res_cap_dcn314 +ffffffff82bf2048 r debug_defaults_diags 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tf_shift +ffffffff82bf61a0 r tf_mask +ffffffff82bf6ce0 r opp_regs +ffffffff82bf6e40 r opp_shift +ffffffff82bf6e78 r opp_mask +ffffffff82bf6f50 r optc_regs +ffffffff82bf7450 r optc_shift +ffffffff82bf7510 r optc_mask +ffffffff82bf7810 r mpc_regs +ffffffff82bf8ffc r mpc_shift +ffffffff82bf90d8 r mpc_mask +ffffffff82bf9450 r dsc_regs +ffffffff82bf9760 r dsc_shift +ffffffff82bf9818 r dsc_mask +ffffffff82bf9af0 r dwbc30_regs +ffffffff82bf9ccc r dwbc30_shift +ffffffff82bf9e00 r dwbc30_mask +ffffffff82bfa2d0 r mcif_wb30_regs +ffffffff82bfa3cc r mcif_wb30_shift +ffffffff82bfa478 r mcif_wb30_mask +ffffffff82bfa730 r aux_engine_regs +ffffffff82bfa7f8 r aux_mask +ffffffff82bfa858 r aux_shift +ffffffff82bfa870 r i2c_hw_regs +ffffffff82bfa988 r i2c_shifts +ffffffff82bfa9b4 r i2c_masks +ffffffff82bfaa60 r audio_regs +ffffffff82bfab94 r audio_shift +ffffffff82bfabac r audio_mask +ffffffff82bfabf0 r stream_enc_regs +ffffffff82bfb294 r se_shift +ffffffff82bfb370 r se_mask +ffffffff82bfb6e0 r vpg_regs +ffffffff82bfb7d0 r vpg_shift +ffffffff82bfb7f8 r vpg_mask +ffffffff82bfb8a0 r afmt_regs +ffffffff82bfb978 r afmt_shift +ffffffff82bfb98c r afmt_mask +ffffffff82bfb9e0 r hpo_dp_stream_enc_regs +ffffffff82bfbc10 r hpo_dp_se_shift +ffffffff82bfbc38 r hpo_dp_se_mask +ffffffff82bfbce0 r apg_regs +ffffffff82bfbd20 r apg_shift +ffffffff82bfbd28 r apg_mask +ffffffff82bfbd40 r hpo_dp_link_enc_regs +ffffffff82bfbe50 r hpo_dp_le_shift +ffffffff82bfbe6c r hpo_dp_le_mask +ffffffff82bfbed0 r hwseq_reg +ffffffff82bfc0ec r hwseq_shift +ffffffff82bfc16c r hwseq_mask +ffffffff82bfd000 r bios_regs +ffffffff82bfd008 r res_cap_dcn31 +ffffffff82bfd048 r debug_defaults_diags +ffffffff82bfd1c0 r clk_src_regs +ffffffff82bfd364 r dccg_regs +ffffffff82bfd450 r dccg_shift +ffffffff82bfd4e8 r dccg_mask +ffffffff82bfd750 r abm_regs +ffffffff82bfd850 r abm_shift +ffffffff82bfd864 r abm_mask +ffffffff82bfd8b0 r res_create_funcs +ffffffff82bfd8e0 r res_create_maximus_funcs +ffffffff82bfd910 r plane_cap +ffffffff82bfd940 r link_enc_regs +ffffffff82bfdfa0 r link_enc_aux_regs +ffffffff82bfdff0 r link_enc_hpd_regs +ffffffff82bfe004 r le_shift +ffffffff82bfe0f4 r le_mask +ffffffff82bfe4ac r link_enc_feature +ffffffff82bfe4bc r panel_config_defaults +ffffffff82bfe4f0 r debug_defaults_drv +ffffffff82bfe668 r cs_shift +ffffffff82bfe674 r cs_mask +ffffffff82bfe69c r hubbub_reg +ffffffff82bfe810 r hubbub_shift +ffffffff82bfe898 r hubbub_mask +ffffffff82bfeac0 r vmid_regs +ffffffff82bfec80 r vmid_shifts +ffffffff82bfec88 r vmid_masks +ffffffff82bfecb0 r hubp_regs +ffffffff82bff4e0 r hubp_shift +ffffffff82bff5dc r hubp_mask +ffffffff82bff9d0 r dpp_regs +ffffffff82c00ed0 r tf_shift +ffffffff82c011a0 r tf_mask +ffffffff82c01ce0 r opp_regs +ffffffff82c01e40 r opp_shift +ffffffff82c01e78 r opp_mask +ffffffff82c01f50 r optc_regs +ffffffff82c02450 r optc_shift +ffffffff82c02510 r optc_mask +ffffffff82c02810 r mpc_regs +ffffffff82c03ffc r mpc_shift +ffffffff82c040d8 r mpc_mask +ffffffff82c04450 r dsc_regs +ffffffff82c0469c r dsc_shift +ffffffff82c04754 r dsc_mask +ffffffff82c04a30 r dwbc30_regs +ffffffff82c04c0c r dwbc30_shift +ffffffff82c04d40 r dwbc30_mask +ffffffff82c05210 r mcif_wb30_regs +ffffffff82c0530c r mcif_wb30_shift +ffffffff82c053b8 r mcif_wb30_mask +ffffffff82c05670 r aux_engine_regs +ffffffff82c05738 r aux_mask +ffffffff82c05798 r aux_shift +ffffffff82c057b0 r i2c_hw_regs +ffffffff82c058c8 r i2c_shifts +ffffffff82c058f4 r i2c_masks +ffffffff82c059a0 r audio_regs +ffffffff82c05ad4 r audio_shift +ffffffff82c05aec r audio_mask +ffffffff82c05b30 r stream_enc_regs +ffffffff82c061d4 r se_shift +ffffffff82c062b0 r se_mask +ffffffff82c06620 r vpg_regs +ffffffff82c06710 r vpg_shift +ffffffff82c06738 r vpg_mask +ffffffff82c067e0 r afmt_regs +ffffffff82c068b8 r afmt_shift +ffffffff82c068cc r afmt_mask +ffffffff82c06920 r hpo_dp_stream_enc_regs +ffffffff82c06b50 r hpo_dp_se_shift +ffffffff82c06b78 r hpo_dp_se_mask +ffffffff82c06c20 r apg_regs +ffffffff82c06c60 r apg_shift +ffffffff82c06c68 r apg_mask +ffffffff82c06c80 r hpo_dp_link_enc_regs +ffffffff82c06d90 r hpo_dp_le_shift +ffffffff82c06dac r hpo_dp_le_mask +ffffffff82c06e10 r hwseq_reg +ffffffff82c0702c r hwseq_shift +ffffffff82c070ac r hwseq_mask +ffffffff82c08000 r bios_regs +ffffffff82c08008 r res_cap_dcn31 +ffffffff82c08048 r debug_defaults_diags +ffffffff82c081c0 r clk_src_regs +ffffffff82c08364 r dccg_regs +ffffffff82c08450 r dccg_shift +ffffffff82c084e8 r dccg_mask +ffffffff82c08750 r abm_regs +ffffffff82c08850 r abm_shift +ffffffff82c08864 r abm_mask +ffffffff82c088b0 r res_create_funcs +ffffffff82c088e0 r res_create_maximus_funcs +ffffffff82c08910 r plane_cap +ffffffff82c08940 r link_enc_regs +ffffffff82c08fa0 r link_enc_aux_regs +ffffffff82c08ff0 r link_enc_hpd_regs +ffffffff82c09004 r le_shift +ffffffff82c090f4 r le_mask +ffffffff82c094ac r link_enc_feature +ffffffff82c094bc r panel_config_defaults +ffffffff82c094f0 r debug_defaults_drv +ffffffff82c09668 r cs_shift +ffffffff82c09674 r cs_mask +ffffffff82c0969c r hubbub_reg +ffffffff82c09810 r hubbub_shift +ffffffff82c09898 r hubbub_mask +ffffffff82c09ac0 r vmid_regs +ffffffff82c09c80 r vmid_shifts +ffffffff82c09c88 r vmid_masks +ffffffff82c09cb0 r hubp_regs +ffffffff82c0a4e0 r hubp_shift +ffffffff82c0a5dc r hubp_mask +ffffffff82c0a9d0 r dpp_regs +ffffffff82c0bed0 r tf_shift +ffffffff82c0c1a0 r tf_mask +ffffffff82c0cce0 r opp_regs +ffffffff82c0ce40 r opp_shift +ffffffff82c0ce78 r opp_mask +ffffffff82c0cf50 r optc_regs +ffffffff82c0d450 r optc_shift +ffffffff82c0d510 r optc_mask +ffffffff82c0d810 r mpc_regs +ffffffff82c0effc r mpc_shift +ffffffff82c0f0d8 r mpc_mask +ffffffff82c0f450 r dsc_regs +ffffffff82c0f69c r dsc_shift +ffffffff82c0f754 r dsc_mask +ffffffff82c0fa30 r dwbc30_regs +ffffffff82c0fc0c r dwbc30_shift +ffffffff82c0fd40 r dwbc30_mask +ffffffff82c10210 r mcif_wb30_regs +ffffffff82c1030c r mcif_wb30_shift +ffffffff82c103b8 r mcif_wb30_mask +ffffffff82c10670 r aux_engine_regs +ffffffff82c10738 r aux_mask +ffffffff82c10798 r aux_shift +ffffffff82c107b0 r i2c_hw_regs +ffffffff82c108c8 r i2c_shifts +ffffffff82c108f4 r i2c_masks +ffffffff82c109a0 r audio_regs +ffffffff82c10ad4 r audio_shift +ffffffff82c10aec r audio_mask +ffffffff82c10b30 r stream_enc_regs +ffffffff82c111d4 r se_shift +ffffffff82c112b0 r se_mask +ffffffff82c11620 r vpg_regs +ffffffff82c11710 r vpg_shift +ffffffff82c11738 r vpg_mask +ffffffff82c117e0 r afmt_regs +ffffffff82c118b8 r afmt_shift +ffffffff82c118cc r afmt_mask +ffffffff82c11920 r hpo_dp_stream_enc_regs +ffffffff82c11b50 r hpo_dp_se_shift +ffffffff82c11b78 r hpo_dp_se_mask +ffffffff82c11c20 r apg_regs +ffffffff82c11c60 r apg_shift +ffffffff82c11c68 r apg_mask +ffffffff82c11c80 r hpo_dp_link_enc_regs +ffffffff82c11d90 r hpo_dp_le_shift +ffffffff82c11dac r hpo_dp_le_mask +ffffffff82c11e10 r hwseq_reg +ffffffff82c1202c r hwseq_shift +ffffffff82c120ac r hwseq_mask +ffffffff82c13000 r dccg32_funcs +ffffffff82c14000 r dcn32_link_enc_funcs +ffffffff82c15000 r dcn32_str_enc_funcs +ffffffff82c16000 r hubbub32_funcs +ffffffff82c17000 r dcn32_funcs +ffffffff82c172c0 r dcn32_private_funcs +ffffffff82c18000 R dcn32_mmhubbub_funcs +ffffffff82c19000 R dcn32_mpc_funcs +ffffffff82c1a000 r res_cap_dcn32 +ffffffff82c1a040 r debug_defaults_diags +ffffffff82c1a1b8 r dccg_shift +ffffffff82c1a250 r dccg_mask +ffffffff82c1a4ac r abm_shift +ffffffff82c1a4c0 r abm_mask +ffffffff82c1a508 r res_create_funcs +ffffffff82c1a538 r res_create_maximus_funcs +ffffffff82c1a568 r plane_cap +ffffffff82c1a594 r le_shift +ffffffff82c1a684 r le_mask +ffffffff82c1aa3c r link_enc_feature +ffffffff82c1aa50 r debug_defaults_drv +ffffffff82c1abc8 r cs_shift +ffffffff82c1abd4 r cs_mask +ffffffff82c1abfc r hubbub_shift +ffffffff82c1ac84 r hubbub_mask +ffffffff82c1aea0 r vmid_shifts +ffffffff82c1aea8 r vmid_masks +ffffffff82c1aec8 r hubp_shift +ffffffff82c1afc4 r hubp_mask +ffffffff82c1b3b4 r tf_shift +ffffffff82c1b684 r tf_mask +ffffffff82c1c1c4 r opp_shift +ffffffff82c1c1fc r opp_mask +ffffffff82c1c2d0 r optc_shift +ffffffff82c1c390 r optc_mask +ffffffff82c1c690 r mpc_shift +ffffffff82c1c76c r mpc_mask +ffffffff82c1cad8 r dsc_shift +ffffffff82c1cb90 r dsc_mask +ffffffff82c1ce68 r dwbc30_shift +ffffffff82c1cf9c r dwbc30_mask +ffffffff82c1d464 r mcif_wb30_shift +ffffffff82c1d510 r mcif_wb30_mask +ffffffff82c1d7bc r aux_mask +ffffffff82c1d81c r aux_shift +ffffffff82c1d834 r i2c_shifts +ffffffff82c1d860 r i2c_masks +ffffffff82c1d904 r audio_shift +ffffffff82c1d91c r audio_mask +ffffffff82c1d958 r se_shift +ffffffff82c1da34 r se_mask +ffffffff82c1dda0 r vpg_shift +ffffffff82c1ddc8 r vpg_mask +ffffffff82c1de5c r afmt_shift +ffffffff82c1de70 r afmt_mask +ffffffff82c1deb4 r hpo_dp_se_shift +ffffffff82c1dedc r hpo_dp_se_mask +ffffffff82c1df7c r apg_shift +ffffffff82c1df84 r apg_mask +ffffffff82c1df9c r hpo_dp_le_shift +ffffffff82c1dfb8 r hpo_dp_le_mask +ffffffff82c1e01c r hwseq_shift +ffffffff82c1e09c r hwseq_mask +ffffffff82c1f000 r dcn321_link_enc_funcs +ffffffff82c20000 r res_cap_dcn321 +ffffffff82c20040 r debug_defaults_diags +ffffffff82c201b8 r dccg_shift +ffffffff82c20250 r dccg_mask +ffffffff82c204ac r abm_shift +ffffffff82c204c0 r abm_mask +ffffffff82c20508 r res_create_funcs +ffffffff82c20538 r res_create_maximus_funcs +ffffffff82c20568 r plane_cap +ffffffff82c20594 r le_shift +ffffffff82c20684 r le_mask +ffffffff82c20a3c r link_enc_feature +ffffffff82c20a50 r debug_defaults_drv +ffffffff82c20bc8 r cs_shift +ffffffff82c20bd4 r cs_mask +ffffffff82c20bfc r hubbub_shift +ffffffff82c20c84 r hubbub_mask +ffffffff82c20ea0 r vmid_shifts +ffffffff82c20ea8 r vmid_masks +ffffffff82c20ec8 r hubp_shift +ffffffff82c20fc4 r hubp_mask +ffffffff82c213b4 r tf_shift +ffffffff82c21684 r tf_mask +ffffffff82c221c4 r opp_shift +ffffffff82c221fc r opp_mask +ffffffff82c222d0 r optc_shift +ffffffff82c22390 r optc_mask +ffffffff82c22690 r mpc_shift +ffffffff82c2276c r mpc_mask +ffffffff82c22ad8 r dsc_shift +ffffffff82c22b90 r dsc_mask +ffffffff82c22e68 r dwbc30_shift +ffffffff82c22f9c r dwbc30_mask +ffffffff82c23464 r mcif_wb30_shift +ffffffff82c23510 r mcif_wb30_mask +ffffffff82c237bc r aux_mask +ffffffff82c2381c r aux_shift +ffffffff82c23834 r i2c_shifts +ffffffff82c23860 r i2c_masks +ffffffff82c23904 r audio_shift +ffffffff82c2391c r audio_mask +ffffffff82c23958 r se_shift +ffffffff82c23a34 r se_mask +ffffffff82c23da0 r vpg_shift +ffffffff82c23dc8 r vpg_mask +ffffffff82c23e5c r afmt_shift +ffffffff82c23e70 r afmt_mask +ffffffff82c23eb4 r hpo_dp_se_shift +ffffffff82c23edc r hpo_dp_se_mask +ffffffff82c23f7c r apg_shift +ffffffff82c23f84 r apg_mask +ffffffff82c23f9c r hpo_dp_le_shift +ffffffff82c23fb8 r hpo_dp_le_mask +ffffffff82c2401c r hwseq_shift +ffffffff82c2409c r hwseq_mask +ffffffff82c26000 R dcn10_soc_defaults +ffffffff82c2608c R dcn10_ip_defaults +ffffffff82c31000 R dml20_funcs +ffffffff82c31030 R dml20v2_funcs +ffffffff82c31060 R dml21_funcs +ffffffff82c31090 R dml30_funcs +ffffffff82c310c0 R dml31_funcs +ffffffff82c310f0 R dml314_funcs +ffffffff82c31120 R dml32_funcs +ffffffff82c34000 R qp_table_422_10bpc_min +ffffffff82c34740 R qp_table_444_8bpc_max +ffffffff82c35080 R qp_table_420_12bpc_max +ffffffff82c357c0 R qp_table_444_10bpc_min +ffffffff82c36400 R qp_table_420_8bpc_max +ffffffff82c36840 R qp_table_444_8bpc_min +ffffffff82c37180 R qp_table_444_12bpc_min +ffffffff82c380c0 R qp_table_420_12bpc_min +ffffffff82c38800 R qp_table_422_12bpc_min +ffffffff82c39140 R qp_table_422_12bpc_max +ffffffff82c39a80 R qp_table_444_12bpc_max +ffffffff82c3a9c0 R qp_table_420_8bpc_min +ffffffff82c3ae00 R qp_table_422_8bpc_min +ffffffff82c3b340 R qp_table_422_10bpc_max +ffffffff82c3ba80 R qp_table_420_10bpc_max +ffffffff82c3c040 R qp_table_420_10bpc_min +ffffffff82c3c600 R qp_table_444_10bpc_max +ffffffff82c3d240 R qp_table_422_8bpc_max ffffffff82c3f000 r funcs +ffffffff82c3f050 r hpd_regs +ffffffff82c3f1a0 r hpd_shift +ffffffff82c3f1b0 r hpd_mask +ffffffff82c3f1c0 r ddc_data_regs +ffffffff82c3f3a0 r ddc_clk_regs +ffffffff82c3f580 r ddc_shift +ffffffff82c3f5a8 r ddc_mask ffffffff82c40000 r funcs -ffffffff82c40050 r hpd_regs -ffffffff82c401a0 r hpd_shift -ffffffff82c401b0 r hpd_mask -ffffffff82c401c0 r ddc_data_regs_dcn -ffffffff82c40370 r ddc_clk_regs_dcn -ffffffff82c40520 r ddc_shift -ffffffff82c40640 r ddc_mask -ffffffff82c40760 r generic_regs -ffffffff82c407d0 r generic_shift -ffffffff82c407e0 r generic_mask ffffffff82c41000 r funcs +ffffffff82c41050 r hpd_regs +ffffffff82c411a0 r hpd_shift +ffffffff82c411b0 r hpd_mask +ffffffff82c411c0 r ddc_data_regs +ffffffff82c413a0 r ddc_clk_regs +ffffffff82c41580 r ddc_shift +ffffffff82c415a8 r ddc_mask ffffffff82c42000 r funcs -ffffffff82c42050 r hpd_regs -ffffffff82c42168 r hpd_shift -ffffffff82c42178 r hpd_mask -ffffffff82c42190 r ddc_data_regs_dcn -ffffffff82c422c0 r ddc_clk_regs_dcn -ffffffff82c423f0 r ddc_shift -ffffffff82c424e0 r ddc_mask -ffffffff82c425d0 r generic_regs -ffffffff82c42604 r generic_shift -ffffffff82c4260c r generic_mask ffffffff82c43000 r funcs +ffffffff82c43050 r hpd_regs +ffffffff82c431a0 r hpd_shift +ffffffff82c431b0 r hpd_mask +ffffffff82c431c0 r ddc_data_regs +ffffffff82c433a0 r ddc_clk_regs +ffffffff82c43580 r ddc_shift +ffffffff82c435a8 r ddc_mask ffffffff82c44000 r funcs -ffffffff82c44050 r hpd_regs -ffffffff82c441a0 r hpd_shift -ffffffff82c441b0 r hpd_mask -ffffffff82c441c0 r ddc_data_regs_dcn -ffffffff82c44370 r ddc_clk_regs_dcn -ffffffff82c44520 r ddc_shift -ffffffff82c44640 r ddc_mask -ffffffff82c44760 r generic_regs -ffffffff82c447d0 r generic_shift -ffffffff82c447e0 r generic_mask ffffffff82c45000 r funcs +ffffffff82c45050 r hpd_regs +ffffffff82c451a0 r hpd_shift +ffffffff82c451b0 r hpd_mask +ffffffff82c451c0 r ddc_data_regs +ffffffff82c453a0 r ddc_clk_regs +ffffffff82c45580 r ddc_shift +ffffffff82c455a8 r ddc_mask +ffffffff82c455d0 r generic_regs +ffffffff82c45640 r generic_shift +ffffffff82c45650 r generic_mask ffffffff82c46000 r funcs -ffffffff82c46050 r hpd_regs -ffffffff82c46168 r hpd_shift -ffffffff82c46178 r hpd_mask -ffffffff82c46190 r ddc_data_regs_dcn -ffffffff82c46300 r ddc_clk_regs_dcn -ffffffff82c46470 r ddc_shift -ffffffff82c46560 r ddc_mask -ffffffff82c46650 r generic_regs -ffffffff82c466c0 r generic_shift -ffffffff82c466d0 r generic_mask ffffffff82c47000 r funcs +ffffffff82c47050 r hpd_regs +ffffffff82c471a0 r hpd_shift +ffffffff82c471b0 r hpd_mask +ffffffff82c471c0 r ddc_data_regs_dcn +ffffffff82c47370 r ddc_clk_regs_dcn +ffffffff82c47520 r ddc_shift +ffffffff82c47640 r ddc_mask +ffffffff82c47760 r generic_regs +ffffffff82c477d0 r generic_shift +ffffffff82c477e0 r generic_mask ffffffff82c48000 r funcs -ffffffff82c48050 r hpd_regs -ffffffff82c48168 r hpd_shift -ffffffff82c48178 r hpd_mask -ffffffff82c48190 r ddc_data_regs_dcn -ffffffff82c48340 r ddc_clk_regs_dcn -ffffffff82c484f0 r ddc_shift -ffffffff82c48610 r ddc_mask -ffffffff82c48730 r generic_regs -ffffffff82c487a0 r generic_shift -ffffffff82c487b0 r generic_mask ffffffff82c49000 r funcs +ffffffff82c49050 r hpd_regs +ffffffff82c49168 r hpd_shift +ffffffff82c49178 r hpd_mask +ffffffff82c49190 r ddc_data_regs_dcn +ffffffff82c492c0 r ddc_clk_regs_dcn +ffffffff82c493f0 r ddc_shift +ffffffff82c494e0 r ddc_mask +ffffffff82c495d0 r generic_regs +ffffffff82c49604 r generic_shift +ffffffff82c4960c r generic_mask ffffffff82c4a000 r funcs ffffffff82c4b000 r funcs +ffffffff82c4b050 r hpd_regs +ffffffff82c4b1a0 r hpd_shift +ffffffff82c4b1b0 r hpd_mask +ffffffff82c4b1c0 r ddc_data_regs_dcn +ffffffff82c4b370 r ddc_clk_regs_dcn +ffffffff82c4b520 r ddc_shift +ffffffff82c4b640 r ddc_mask +ffffffff82c4b760 r generic_regs +ffffffff82c4b7d0 r generic_shift +ffffffff82c4b7e0 r generic_mask ffffffff82c4c000 r funcs -ffffffff82c4d000 r hdmi_14_protection -ffffffff82c4d010 r dp_11_protection -ffffffff82c4d020 r hdcp_i2c_offsets -ffffffff82c4d050 r hdcp_dpcd_addrs -ffffffff82c4e000 r irq_service_funcs_dce110 -ffffffff82c4e010 r irq_source_info_dce110 -ffffffff82c4f2a0 r dummy_irq_info_funcs -ffffffff82c4f2b0 r hpd_irq_info_funcs -ffffffff82c4f2c0 r hpd_rx_irq_info_funcs -ffffffff82c4f2d0 r pflip_irq_info_funcs -ffffffff82c4f2e0 r vupdate_irq_info_funcs -ffffffff82c4f2f0 r vblank_irq_info_funcs -ffffffff82c50000 r irq_service_funcs_dce120 -ffffffff82c50008 r dummy_irq_info_funcs -ffffffff82c50018 r hpd_irq_info_funcs -ffffffff82c50028 r hpd_rx_irq_info_funcs -ffffffff82c50038 r pflip_irq_info_funcs -ffffffff82c50048 r vupdate_irq_info_funcs -ffffffff82c50058 r vblank_irq_info_funcs -ffffffff82c50070 r irq_source_info_dce120 -ffffffff82c52000 r irq_service_funcs_dce80 -ffffffff82c52008 r dummy_irq_info_funcs -ffffffff82c52018 r hpd_irq_info_funcs -ffffffff82c52028 r hpd_rx_irq_info_funcs -ffffffff82c52038 r pflip_irq_info_funcs -ffffffff82c52048 r vupdate_irq_info_funcs -ffffffff82c52058 r vblank_irq_info_funcs -ffffffff82c52070 r irq_source_info_dce80 -ffffffff82c54000 r irq_service_funcs_dcn10 -ffffffff82c54008 r dummy_irq_info_funcs -ffffffff82c54018 r hpd_irq_info_funcs -ffffffff82c54028 r hpd_rx_irq_info_funcs -ffffffff82c54038 r pflip_irq_info_funcs -ffffffff82c54048 r vupdate_no_lock_irq_info_funcs -ffffffff82c54058 r vblank_irq_info_funcs -ffffffff82c54068 r vline0_irq_info_funcs -ffffffff82c54080 r irq_source_info_dcn10 -ffffffff82c56000 r irq_service_funcs_dcn20 -ffffffff82c56008 r dummy_irq_info_funcs -ffffffff82c56018 r hpd_irq_info_funcs -ffffffff82c56028 r hpd_rx_irq_info_funcs -ffffffff82c56038 r pflip_irq_info_funcs -ffffffff82c56048 r vupdate_no_lock_irq_info_funcs -ffffffff82c56058 r vblank_irq_info_funcs -ffffffff82c56068 r vline0_irq_info_funcs -ffffffff82c56080 r irq_source_info_dcn20 -ffffffff82c58000 r irq_service_funcs_dcn201 -ffffffff82c58008 r dummy_irq_info_funcs -ffffffff82c58018 r hpd_irq_info_funcs -ffffffff82c58028 r hpd_rx_irq_info_funcs -ffffffff82c58038 r pflip_irq_info_funcs -ffffffff82c58048 r vupdate_no_lock_irq_info_funcs -ffffffff82c58058 r vblank_irq_info_funcs -ffffffff82c58068 r vline0_irq_info_funcs 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ipsendredirects -ffffffff8317a004 D ip_defttl -ffffffff8317a008 D ip_mtudisc -ffffffff8317a00c D ip_mtudisc_timeout -ffffffff8317a010 D ipq_mutex -ffffffff8317a020 D ip_maxqueue -ffffffff8317a028 D ipintrq -ffffffff8317a060 d ipsend_task -ffffffff8317a090 d ipsendraw_task -ffffffff8317b000 D ip_mrtproto -ffffffff8317b004 d sin -ffffffff8317c000 D rip_sendspace -ffffffff8317c008 D rip_recvspace -ffffffff8317d000 D tcprexmtthresh -ffffffff8317d004 D tcptv_keep_init -ffffffff8317d008 D tcp_rst_ppslim -ffffffff8317d00c D tcp_ackdrop_ppslim -ffffffff8317d010 D tcp_syn_hash_size -ffffffff8317d014 D tcp_syn_cache_limit -ffffffff8317d018 D tcp_syn_bucket_limit -ffffffff8317d01c D tcp_syn_use_limit -ffffffff8317e000 D tcp_outflags -ffffffff8317f000 D tcp_timer_mtx -ffffffff8317f010 D tcp_mssdflt -ffffffff8317f014 D tcp_rttdflt -ffffffff8317f018 D tcp_do_rfc1323 -ffffffff8317f01c D tcp_do_sack -ffffffff8317f020 D tcp_do_rfc3390 -ffffffff8317f024 D tcp_reass_limit -ffffffff8317f028 D tcp_sackhole_limit -ffffffff83180000 D tcp_backoff -ffffffff83180034 D tcp_totbackoff -ffffffff83181000 D tcp_sendspace -ffffffff83181004 D tcp_recvspace -ffffffff83181008 D tcp_autorcvbuf_inc -ffffffff83182000 D udpcksum -ffffffff83182004 D udp_sendspace -ffffffff83182008 D udp_recvspace -ffffffff83183000 D ipsec_flows_mtx -ffffffff83183010 D ipsec_ids_idle -ffffffff83183014 D ipsec_ids_next_flow -ffffffff83183018 D ipsec_policy_head -ffffffff83183028 D ipsp_ids_gc_timeout -ffffffff83183070 D tdb_sadb_mtx -ffffffff83183080 d tdb_hashmask -ffffffff83184000 D ipo_tdb_mtx -ffffffff83184010 D ipsec_acquire_mtx -ffffffff83184020 D ipsec_acquire_head -ffffffff83185000 D ipsec_keep_invalid -ffffffff83185004 D ipsec_require_pfs -ffffffff83185008 D ipsec_soft_timeout -ffffffff8318500c D ipsec_exp_timeout -ffffffff83185010 D ipsec_soft_first_use -ffffffff83185014 D ipsec_exp_first_use -ffffffff83185018 D ipsec_expire_acquire -ffffffff8318501c D esp_enable -ffffffff83185020 D ah_enable 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uao_list_lock -ffffffff8319b000 d uvmexp_countersboot_boot_cpumem -ffffffff8319b0c0 D uvmexp_counters -ffffffff8319b0c8 D vm_min_kernel_address -ffffffff8319c000 D no_constraint -ffffffff8319d000 d uvm_kmapent_warn_rate -ffffffff8319e000 D maxslp -ffffffff8319f000 D uvmpagerops -ffffffff831a0000 D uvm_swap_data_lock -ffffffff831a0010 D swap_syscall_lock -ffffffff831a0020 D oommtx -ffffffff831a1000 D uvm_doswapencrypt -ffffffff831a2000 D gif_list -ffffffff831a2010 D gif_cloner -ffffffff831a3000 D divert6_sendspace -ffffffff831a3004 D divert6_recvspace -ffffffff831a3008 D divb6hashsize -ffffffff831a4000 d in6_get_hw_ifid.allone -ffffffff831a5000 D ip6_sendredirects -ffffffff831a5004 D ip6_defhlim -ffffffff831a5008 D ip6_defmcasthlim -ffffffff831a500c D ip6_maxfragpackets -ffffffff831a5010 D ip6_maxfrags -ffffffff831a5014 D ip6_log_interval -ffffffff831a5018 D ip6_hdrnestlimit -ffffffff831a501c D ip6_dad_count -ffffffff831a5020 D ip6_auto_flowlabel -ffffffff831a5024 D ip6_use_deprecated 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vega10_smu_funcs +ffffffff82cc3000 R vega12_smu_funcs +ffffffff82cc4000 R vega20_smu_funcs +ffffffff82cc5000 R vegam_smu_funcs +ffffffff82cc50e0 r vegam_power_tune_data_set_array +ffffffff82cc5130 r Range_Table +ffffffff82cc6000 R smu_ip_funcs +ffffffff82cc60a0 R smu_v11_0_ip_block +ffffffff82cc60b8 R smu_v12_0_ip_block +ffffffff82cc60d0 R smu_v13_0_ip_block +ffffffff82cc60e8 r swsmu_pm_funcs +ffffffff82cc7000 r arcturus_table_map +ffffffff82cc7080 r arcturus_pwr_src_map +ffffffff82cc7090 r arcturus_workload_map +ffffffff82cc70d0 r arcturus_ppt_funcs +ffffffff82cc74a0 r smu11_thermal_policy +ffffffff82cc74f0 r arcturus_i2c_algo +ffffffff82cc7500 r arcturus_i2c_control_quirks +ffffffff82cc7510 r arcturus_throttler_map +ffffffff82cc7530 r arcturus_message_map +ffffffff82cc7f80 r arcturus_clk_map +ffffffff82cc8040 r arcturus_feature_mask_map +ffffffff82cc9000 r cyan_skillfish_ppt_funcs +ffffffff82cca000 r navi10_ppt_funcs +ffffffff82cca3d0 r smu11_thermal_policy +ffffffff82cca420 r navi10_i2c_algo +ffffffff82cca430 r navi10_i2c_control_quirks +ffffffff82cca440 r navi1x_throttler_map +ffffffff82cca460 r NoDbiPrbs7 +ffffffff82ccb460 r DbiPrbs7 +ffffffff82ccd000 r sienna_cichlid_ppt_funcs +ffffffff82ccd3d0 r smu11_thermal_policy +ffffffff82ccd420 r sienna_cichlid_i2c_algo +ffffffff82ccd430 r sienna_cichlid_i2c_control_quirks +ffffffff82ccd440 r sienna_cichlid_throttler_map +ffffffff82cce000 r smu_v11_0_irq_funcs +ffffffff82cce010 r link_width +ffffffff82ccf000 r vangogh_ppt_funcs +ffffffff82ccf3d0 r vangogh_throttler_map +ffffffff82cd0000 r renoir_ppt_funcs +ffffffff82cd03d0 r renoir_throttler_map +ffffffff82cd1000 r aldebaran_clk_map +ffffffff82cd10c0 r aldebaran_table_map +ffffffff82cd1140 r aldebaran_ppt_funcs +ffffffff82cd1510 r smu13_thermal_policy +ffffffff82cd1560 r aldebaran_i2c_algo +ffffffff82cd1570 r aldebaran_i2c_control_quirks +ffffffff82cd1580 r aldebaran_throttler_map +ffffffff82cd15a0 r aldebaran_message_map +ffffffff82cd1ff0 r aldebaran_feature_mask_map +ffffffff82cd3000 r smu_v13_0_irq_funcs +ffffffff82cd3010 r link_width +ffffffff82cd4000 r smu_v13_0_0_ppt_funcs +ffffffff82cd43d0 r smu13_thermal_policy +ffffffff82cd4420 r smu_v13_0_0_i2c_algo +ffffffff82cd4430 r smu_v13_0_0_i2c_control_quirks +ffffffff82cd4440 r smu_v13_0_0_throttler_map +ffffffff82cd5000 r smu_v13_0_4_ppt_funcs +ffffffff82cd6000 r smu_v13_0_5_ppt_funcs +ffffffff82cd7000 r smu_v13_0_7_ppt_funcs +ffffffff82cd73d0 r smu13_thermal_policy +ffffffff82cd7420 r smu_v13_0_7_throttler_map +ffffffff82cd8000 r yellow_carp_ppt_funcs +ffffffff82cd9000 r __smu_message_names +ffffffff82cda000 R pchb_ca +ffffffff82cdb000 R amas_ca +ffffffff82cdb028 R amas_devices +ffffffff82cdb040 r amas_feature +ffffffff82cdc000 R cardslot_ca +ffffffff82cdd000 R cardbus_ca +ffffffff82cde000 R com_cardbus_ca +ffffffff82cdf000 R xl_cardbus_ca +ffffffff82cdf030 R xl_cardbus_products +ffffffff82ce0000 R dc_cardbus_ca +ffffffff82ce0030 R dc_cardbus_devices +ffffffff82ce1000 R fxp_cardbus_ca +ffffffff82ce1028 R fxp_cardbus_devices +ffffffff82ce2000 R rl_cardbus_devices +ffffffff82ce2028 R rl_cardbus_ca +ffffffff82ce3000 R re_cardbus_ca +ffffffff82ce3028 R re_cardbus_devices +ffffffff82ce4000 R ath_cardbus_ca +ffffffff82ce5000 R athn_cardbus_ca +ffffffff82ce5030 r athn_cardbus_devices +ffffffff82ce6000 R atw_cardbus_ca +ffffffff82ce6028 R atw_cardbus_devices +ffffffff82ce7000 R rtw_cardbus_ca +ffffffff82ce7028 R rtw_cardbus_devices +ffffffff82ce8000 R ral_cardbus_ca +ffffffff82ce8030 r ral_cardbus_devices +ffffffff82ce9000 R acx_cardbus_ca +ffffffff82ce9028 r acx_cardbus_devices +ffffffff82cea000 R pgt_cardbus_ca +ffffffff82cea028 R pgt_cardbus_devices +ffffffff82ceb000 R ehci_cardbus_ca +ffffffff82cec000 R ohci_cardbus_ca +ffffffff82ced000 R uhci_cardbus_ca +ffffffff82cee000 R malo_cardbus_ca +ffffffff82cee028 r malo_cardbus_devices +ffffffff82cef000 R bwi_cardbus_ca +ffffffff82cef030 r bwi_cardbus_devices +ffffffff82cf0000 R pcmcia_ca +ffffffff82cf1000 r pcmcia_parse_cis_tuple.init_cfe +ffffffff82cf2000 r pcmcia_cis_quirks +ffffffff82cf3000 R ep_pcmcia_ca +ffffffff82cf4000 R ne_pcmcia_ca +ffffffff82cf4030 R ne2000devs +ffffffff82cf6000 R aic_pcmcia_ca +ffffffff82cf7000 R com_pcmcia_ca +ffffffff82cf8000 R wdc_pcmcia_ca +ffffffff82cf9000 R sm_pcmcia_ca +ffffffff82cfa000 R xe_pcmcia_ca +ffffffff82cfb000 R wi_pcmcia_ca +ffffffff82cfb030 r wi_pcmcia_products +ffffffff82cfc000 R malo_pcmcia_ca +ffffffff82cfd000 R an_pcmcia_ca +ffffffff82cfe000 R pcib_ca +ffffffff82cff000 R amdpcib_ca +ffffffff82cff028 R amdpcib_devices +ffffffff82d00000 R tcpcib_ca +ffffffff82d00028 R tcpcib_devices +ffffffff82d01000 R aapic_ca +ffffffff82d02000 R hme_pci_ca +ffffffff82d02028 r hme_promhdr +ffffffff82d0202a r hme_promdat +ffffffff82d03000 R isa_ca +ffffffff82d04000 R isadma_ca +ffffffff82d05000 R fdc_ca +ffffffff82d06000 R fd_ca +ffffffff82d07000 R com_isa_ca +ffffffff82d08000 R pckbc_isa_ca +ffffffff82d09000 R vga_isa_ca +ffffffff82d0a000 R wdc_isa_ca +ffffffff82d0b000 R mpu_midi_hw_if +ffffffff82d0c000 R mpu_isa_ca +ffffffff82d0d000 R pcppi_ca +ffffffff82d0e000 R spkr_ca +ffffffff82d0e030 r pitchtab +ffffffff82d0f000 R lpt_isa_ca +ffffffff82d10000 R wbsio_ca +ffffffff82d11000 R schsio_ca +ffffffff82d12000 R lm_isa_ca +ffffffff82d12028 R lm_wbsio_ca +ffffffff82d13000 R it_sensors +ffffffff82d13110 R it_vrfact +ffffffff82d13140 R it_fan_regs +ffffffff82d13160 R it_fan_ext_regs +ffffffff82d13178 R it_ca +ffffffff82d14000 R abitkv_sensors +ffffffff82d14200 R abitaa_sensors +ffffffff82d14480 R abitav_sensors +ffffffff82d14700 R abitas_sensors +ffffffff82d14980 R abitax_sensors +ffffffff82d14bc0 R abitm4_sensors +ffffffff82d14e80 R abitan_sensors +ffffffff82d15120 R abital_sensors +ffffffff82d153a0 R abitaw_sensors +ffffffff82d15700 R abitni_sensors +ffffffff82d159a0 R abitat_sensors +ffffffff82d15cc0 R abitan2_sensors +ffffffff82d15f60 R abitab_sensors +ffffffff82d16220 R abitan3_sensors +ffffffff82d16500 R abitaw2_sensors +ffffffff82d16860 R abitat2_sensors +ffffffff82d16b60 R abitab2_sensors +ffffffff82d16ea0 R abitin_sensors +ffffffff82d171e0 R uguru_ca +ffffffff82d18000 R aps_ca +ffffffff82d19000 R wsdisplay_emul_ca +ffffffff82d19030 r charClass +ffffffff82d1a000 r usl_syncops +ffffffff82d1b000 R wsevent_filtops +ffffffff82d1c000 R wskbd_ca +ffffffff82d1d000 r latin1_to_upper +ffffffff82d1e000 R wsmouse_ca +ffffffff82d1f000 R cyrillic_to_koi8 +ffffffff82d1f060 R unicode_to_latin2 +ffffffff82d1f0e0 R unicode_to_latin7 +ffffffff82d20000 R wsemul_vt100_ops +ffffffff82d21000 r decspcgr2uni +ffffffff82d21100 r dectech2uni +ffffffff82d21200 r nrctable +ffffffff82d21320 r nrcovlpos +ffffffff82d22000 r vt100_fkeys +ffffffff82d220c0 r vt100_pfkeys +ffffffff82d220e0 r vt100_numpad +ffffffff82d23000 R pckbd_ca +ffffffff82d23028 R pckbd_accessops +ffffffff82d23040 R pckbd_consops +ffffffff82d23060 R pckbd_keymapdata +ffffffff82d23070 R pckbd_xtbl +ffffffff82d23100 R pckbd_xtbl_ext +ffffffff82d24000 r pckbd_keydesc_us +ffffffff82d24250 r pckbd_keydesc_de +ffffffff82d242f0 r pckbd_keydesc_de_nodead +ffffffff82d24310 r pckbd_keydesc_fr +ffffffff82d243d0 r pckbd_keydesc_fr_dvorak_bepo +ffffffff82d24510 r pckbd_keydesc_dk +ffffffff82d245a0 r pckbd_keydesc_dk_nodead +ffffffff82d245b0 r pckbd_keydesc_it +ffffffff82d24640 r pckbd_keydesc_uk +ffffffff82d246e0 r pckbd_keydesc_jp +ffffffff82d24750 r pckbd_keydesc_sv +ffffffff82d24780 r pckbd_keydesc_sv_nodead +ffffffff82d24790 r pckbd_keydesc_no +ffffffff82d247c0 r pckbd_keydesc_no_nodead +ffffffff82d247d0 r pckbd_keydesc_us_declk +ffffffff82d24860 r pckbd_keydesc_us_dvorak +ffffffff82d24900 r pckbd_keydesc_us_colemak +ffffffff82d24948 r pckbd_keydesc_swapctrlcaps +ffffffff82d24960 r pckbd_keydesc_iopener +ffffffff82d249b0 r pckbd_keydesc_es +ffffffff82d24a50 r pckbd_keydesc_be +ffffffff82d24b10 r pckbd_keydesc_ru +ffffffff82d24c80 r pckbd_keydesc_ua +ffffffff82d24e10 r pckbd_keydesc_sg +ffffffff82d24ec0 r pckbd_keydesc_sg_nodead +ffffffff82d24ee0 r pckbd_keydesc_sf +ffffffff82d24f00 r pckbd_keydesc_pt +ffffffff82d24f90 r pckbd_keydesc_lt +ffffffff82d25070 r pckbd_keydesc_la +ffffffff82d25100 r pckbd_keydesc_br +ffffffff82d25180 r pckbd_keydesc_tr +ffffffff82d25230 r pckbd_keydesc_tr_nodead +ffffffff82d25250 r pckbd_keydesc_pl +ffffffff82d252b0 r pckbd_keydesc_hu +ffffffff82d253c0 r pckbd_keydesc_si +ffffffff82d254d0 r pckbd_keydesc_cf +ffffffff82d255a0 r pckbd_keydesc_cf_nodead +ffffffff82d255c0 r pckbd_keydesc_lv +ffffffff82d25640 r pckbd_keydesc_nl +ffffffff82d25720 r pckbd_keydesc_nl_nodead +ffffffff82d25740 r pckbd_keydesc_is +ffffffff82d257cc r pckbd_keydesc_is_nodead +ffffffff82d257e0 r pckbd_keydesc_ee +ffffffff82d25890 r pckbd_keydesc_ee_nodead +ffffffff82d258b0 R pckbd_keydesctab +ffffffff82d26000 R pms_ca +ffffffff82d26028 R pms_accessops +ffffffff82d26040 R pms_sec_accessops +ffffffff82d26060 R pms_protocols +ffffffff82d261e0 r alps_models +ffffffff82d27000 R skgpio_led_offset +ffffffff82d27008 R skgpio_ca +ffffffff82d28000 R hidkbd_trtab +ffffffff82d28100 r apple_fn_trans +ffffffff82d28120 r apple_tb_trans +ffffffff82d28140 r apple_mba_trans +ffffffff82d29000 r hidcc_attach_wskbd.accessops +ffffffff82d29020 r hidcc_keysyms +ffffffff82d2a000 R usb_ca +ffffffff82d2b000 R usb_known_products +ffffffff82d36f50 R usb_known_vendors +ffffffff82d39750 R usbd_error_strs +ffffffff82d3a000 R usb_quirks +ffffffff82d3a390 R usb_dev_quirks +ffffffff82d3a398 R usbd_no_quirk +ffffffff82d3b000 R uhub_ca +ffffffff82d3b028 R uhub_uhub_ca +ffffffff82d3c000 R uaudio_ca +ffffffff82d3c028 R uaudio_hw_if +ffffffff82d3c0e0 R uaudio_rates +ffffffff82d3c120 r uaudio_clkname.names +ffffffff82d3c140 r uaudio_feature_addent.features +ffffffff82d3d000 R uvideo_ca +ffffffff82d3d028 R uvideo_hw_if +ffffffff82d3d100 R uvideo_devs +ffffffff82d3e000 r utvfu_select_norm.pal +ffffffff82d3e040 r utvfu_select_norm.ntsc +ffffffff82d3e080 r utvfu_setup_capture.setup +ffffffff82d3e180 r utvfu_audio_start_chip.setup +ffffffff82d3e1c8 r utvfu_audio_stop_chip.setup +ffffffff82d3e1d8 R utvfu_ca +ffffffff82d3e200 R utvfu_vid_hw_if +ffffffff82d3e2d0 R utvfu_au_hw_if +ffffffff82d3f000 R udl_ca +ffffffff82d3f030 r udl_devs +ffffffff82d3f0b0 r udl_modes +ffffffff82d40000 R umidi_hw_if +ffffffff82d40030 R umidi_ca +ffffffff82d40060 r umidi_evlen +ffffffff82d40080 r packet_length +ffffffff82d41000 r quirk_name +ffffffff82d42000 R ucom_ca +ffffffff82d43000 R ugen_ca +ffffffff82d43028 R ugenread_intr_filtops +ffffffff82d43058 R ugenread_isoc_filtops +ffffffff82d44000 R uhidev_ca +ffffffff82d44030 r uhid_graphire_report_descr +ffffffff82d440b0 r uhid_graphire3_4x5_report_descr +ffffffff82d44160 r uhid_xb360gp_report_descr +ffffffff82d44210 r uhid_xbonegp_report_descr +ffffffff82d45000 R uhid_ca +ffffffff82d45028 R uhidread_filtops +ffffffff82d46000 R fido_ca +ffffffff82d47000 R ujoy_ca +ffffffff82d48000 r ukbd_keydesc_us +ffffffff82d48290 r ukbd_keydesc_de +ffffffff82d48340 r ukbd_keydesc_de_nodead +ffffffff82d48360 r ukbd_keydesc_fr +ffffffff82d48420 r ukbd_keydesc_fr_apple +ffffffff82d48560 r ukbd_keydesc_fr_dvorak_bepo +ffffffff82d486a0 r ukbd_keydesc_dk +ffffffff82d48740 r ukbd_keydesc_dk_nodead +ffffffff82d48750 r ukbd_keydesc_it +ffffffff82d487f0 r ukbd_keydesc_uk +ffffffff82d488a0 r ukbd_keydesc_jp +ffffffff82d48910 r ukbd_keydesc_sv +ffffffff82d48940 r ukbd_keydesc_sv_nodead +ffffffff82d48950 r ukbd_keydesc_no +ffffffff82d48980 r ukbd_keydesc_no_nodead +ffffffff82d48990 r ukbd_keydesc_us_dvorak +ffffffff82d48a30 r ukbd_keydesc_us_colemak +ffffffff82d48a78 r ukbd_keydesc_swapctrlcaps +ffffffff82d48a90 r ukbd_keydesc_iopener +ffffffff82d48ae0 r ukbd_keydesc_es +ffffffff82d48b80 r ukbd_keydesc_be +ffffffff82d48c40 r ukbd_keydesc_ru +ffffffff82d48db0 r ukbd_keydesc_ua +ffffffff82d48f50 r ukbd_keydesc_sg +ffffffff82d49010 r ukbd_keydesc_sg_nodead +ffffffff82d49030 r ukbd_keydesc_sf +ffffffff82d49050 r ukbd_keydesc_pt +ffffffff82d490e0 r ukbd_keydesc_pt_apple +ffffffff82d49100 r ukbd_keydesc_lt +ffffffff82d491e0 r ukbd_keydesc_la +ffffffff82d49280 r ukbd_keydesc_br +ffffffff82d49310 r ukbd_keydesc_tr +ffffffff82d493d0 r ukbd_keydesc_tr_nodead +ffffffff82d493f0 r ukbd_keydesc_pl +ffffffff82d49450 r ukbd_keydesc_hu +ffffffff82d49560 r ukbd_keydesc_si +ffffffff82d49680 r ukbd_keydesc_cf +ffffffff82d49760 r ukbd_keydesc_cf_nodead +ffffffff82d49780 r ukbd_keydesc_lv +ffffffff82d49800 r ukbd_keydesc_nl +ffffffff82d498e0 r ukbd_keydesc_nl_nodead +ffffffff82d49900 r ukbd_keydesc_is +ffffffff82d49994 r ukbd_keydesc_is_nodead +ffffffff82d499a0 r ukbd_keydesc_ee +ffffffff82d49a50 r ukbd_keydesc_ee_nodead +ffffffff82d49a70 R ukbd_keydesctab +ffffffff82d4a000 R ukbd_countrylayout +ffffffff82d4a090 R ukbd_consops +ffffffff82d4a0b0 R ukbd_accessops +ffffffff82d4a0c8 R ukbd_ca +ffffffff82d4b000 R ums_accessops +ffffffff82d4b018 R ums_ca +ffffffff82d4c000 R umt_accessops +ffffffff82d4c018 R umt_ca +ffffffff82d4d000 R uts_devs +ffffffff82d4d010 R uts_accessops +ffffffff82d4d028 R uts_ca +ffffffff82d4e000 R ubcmtp_accessops +ffffffff82d4e018 R ubcmtp_ca +ffffffff82d4e040 r ubcmtp_devices +ffffffff82d4f000 R ucycom_methods +ffffffff82d4f040 R ucycom_devs +ffffffff82d4f050 R ucycom_ca +ffffffff82d50000 R uslhcom_methods +ffffffff82d50040 R uslhcom_ca +ffffffff82d50068 r uslhcom_devs +ffffffff82d51000 R ulpt_ca +ffffffff82d52000 R umass_ca +ffffffff82d52028 R umass_bbb_methods +ffffffff82d52040 R umass_cbi_methods +ffffffff82d53000 R umass_quirks +ffffffff82d54000 R umass_scsi_switch +ffffffff82d55000 R uthum_devs +ffffffff82d55008 R uthum_ca +ffffffff82d55030 r uthum_sensor_type_s +ffffffff82d56000 R ugold_devs +ffffffff82d56010 R ugold_ca +ffffffff82d57000 R utrh_devs +ffffffff82d57008 R utrh_ca +ffffffff82d58000 R uoakrh_devs +ffffffff82d58008 R uoakrh_ca +ffffffff82d58030 R uoakrh_methods +ffffffff82d59000 R uoaklux_devs +ffffffff82d59008 R uoaklux_ca +ffffffff82d59030 R uoaklux_methods +ffffffff82d5a000 R uoakv_devs +ffffffff82d5a008 R uoakv_ca +ffffffff82d5a030 R uoakv_methods +ffffffff82d5b000 R uonerng_ca +ffffffff82d5c000 R urng_ca +ffffffff82d5c030 r urng_devs +ffffffff82d5d000 R udcf_ca +ffffffff82d5d028 r udcf_devs +ffffffff82d5e000 R umbg_ca +ffffffff82d5f000 R uvisor_methods +ffffffff82d5f040 R uvisor_ca +ffffffff82d5f070 r uvisor_devs +ffffffff82d60000 R udsbr_hw_if +ffffffff82d60028 R udsbr_ca +ffffffff82d61000 R utwitch_devs +ffffffff82d61008 R utwitch_ca +ffffffff82d62000 R aue_devs +ffffffff82d621b0 R aue_ca +ffffffff82d63000 R axe_devs +ffffffff82d630d0 R axe_ca +ffffffff82d64000 R axen_devs +ffffffff82d64020 R axen_ca +ffffffff82d65000 R smsc_ca +ffffffff82d65030 r smsc_devs +ffffffff82d66000 R cue_ca +ffffffff82d67000 R kue_devs +ffffffff82d67088 R kue_ca +ffffffff82d68000 R cdce_devs +ffffffff82d680a0 R cdce_ca +ffffffff82d69000 R urndis_ca +ffffffff82d69030 R urndis_class +ffffffff82d6a000 R mos_devs +ffffffff82d6a018 R mos_ca +ffffffff82d6b000 R mue_devs +ffffffff82d6b020 R mue_ca +ffffffff82d6c000 R udav_ca +ffffffff82d6c030 r udav_devs +ffffffff82d6d000 R upl_ca +ffffffff82d6e000 R ugl_ca +ffffffff82d6f000 R url_ca +ffffffff82d6f030 r url_devs +ffffffff82d70000 R ure_devs +ffffffff82d700f0 R ure_ca +ffffffff82d71000 R uaq_devs +ffffffff82d71018 R uaq_ca +ffffffff82d72000 R umodem_methods +ffffffff82d72040 R umodem_ca +ffffffff82d73000 R uftdi_methods +ffffffff82d73040 R uftdi_ca +ffffffff82d73070 r uftdi_devs +ffffffff82d74000 R uplcom_methods +ffffffff82d74040 R uplcom_ca +ffffffff82d74070 r uplcom_devs +ffffffff82d75000 R umct_methods +ffffffff82d75040 R umct_ca +ffffffff82d75070 r umct_devs +ffffffff82d76000 R uvscom_methods +ffffffff82d76040 R uvscom_ca +ffffffff82d76070 r uvscom_devs +ffffffff82d77000 R ubsa_methods +ffffffff82d77040 R ubsa_devs +ffffffff82d77060 R ubsa_ca +ffffffff82d78000 R ukspan_ca +ffffffff82d78028 r ukspan_devs +ffffffff82d78030 r ukspan_methods +ffffffff82d79000 R uslcom_methods +ffffffff82d79040 R uslcom_ca +ffffffff82d79070 r uslcom_devs +ffffffff82d7a000 R uark_methods +ffffffff82d7a040 R uark_ca +ffffffff82d7a068 r uark_devs +ffffffff82d7b000 R moscom_methods +ffffffff82d7b040 R moscom_ca +ffffffff82d7b068 r moscom_devs +ffffffff82d7c000 R umcs_methods +ffffffff82d7c040 R umcs_devs +ffffffff82d7c050 R umcs_ca +ffffffff82d7d000 R uscom_methods +ffffffff82d7d040 R uscom_ca +ffffffff82d7d068 r uscom_devs +ffffffff82d7e000 R ucrcom_methods +ffffffff82d7e040 R ucrcom_ca +ffffffff82d7f000 R uxrcom_methods +ffffffff82d7f040 R uxrcom_ca +ffffffff82d7f068 r uxrcom_devs +ffffffff82d80000 R uipaq_methods +ffffffff82d80040 R uipaq_ca +ffffffff82d80070 r uipaq_devs +ffffffff82d81000 R umsm_methods +ffffffff82d81040 R umsm_ca +ffffffff82d81070 r umsm_devs +ffffffff82d82000 R uchcom_methods +ffffffff82d82040 R uchcom_ca +ffffffff82d82068 r uchcom_devs +ffffffff82d82080 r dividers +ffffffff82d83000 R uticom_methods +ffffffff82d83040 R uticom_ca +ffffffff82d83070 r uticom_devs +ffffffff82d84000 R wi_usb_devs +ffffffff82d840f0 R wi_usb_ca +ffffffff82d85000 R atu_ca +ffffffff82d86000 R ural_ca +ffffffff82d86030 r ural_devs +ffffffff82d860a0 r ural_rf2522_r2 +ffffffff82d860e0 r ural_rf2524_r2 +ffffffff82d86120 r ural_rf2525_hi_r2 +ffffffff82d86160 r ural_rf2525_r2 +ffffffff82d861a0 r ural_rf2525e_r2 +ffffffff82d861e0 r ural_rf2526_hi_r2 +ffffffff82d86220 r ural_rf2526_r2 +ffffffff82d86260 r ural_def_bbp +ffffffff82d862a0 r ural_def_mac +ffffffff82d87000 R rum_ca +ffffffff82d87030 r rum_devs +ffffffff82d87110 r rum_rf5225 +ffffffff82d87460 r rum_rf5226 +ffffffff82d877b0 r rum_def_bbp +ffffffff82d877f0 r rum_def_mac +ffffffff82d88000 R run_ca +ffffffff82d88030 r run_devs +ffffffff82d88430 r rt2860_rf2850 +ffffffff82d88860 r rt2860_rates +ffffffff82d88920 r rt5592_freqs_40mhz +ffffffff82d88a60 r rt5592_freqs_20mhz +ffffffff82d88ba0 r rt5592_2ghz_def_rf +ffffffff82d88be0 r rt5592_chan_5ghz +ffffffff82d88e30 r rt5592_def_bbp +ffffffff82d88e70 r rt5592_bbp_r196 +ffffffff82d88ed0 r rt5390_def_bbp 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+ffffffff83111020 D smd +ffffffff83112000 D spdmem_cd +ffffffff83113000 D dwiic_cd +ffffffff83114000 D kstat_lock +ffffffff83114010 D kstat_next_id +ffffffff83114018 D kstat_default_lock +ffffffff83115000 D pf_hdr_limit +ffffffff83115008 D pf_purge_task +ffffffff83115038 D pf_purge_to +ffffffff83115080 D pf_pool_limits +ffffffff831150f0 D pf_state_list +ffffffff83116000 D pf_tags +ffffffff83116010 D pf_qids +ffffffff83116020 D pf_lock +ffffffff83116030 D pf_state_lock +ffffffff83116040 D pfioctl_rw +ffffffff83116050 D trans_ticket +ffffffff83116058 d pf_open_trans.ticket +ffffffff83117000 D pfi_update +ffffffff83118000 D pflog_cloner +ffffffff83119000 D pfsync_qs +ffffffff83119078 D pfsync_cloner +ffffffff831190a8 d pfsync_task +ffffffff8311a000 D pflow_cloner +ffffffff8311b000 D pppoe_cloner +ffffffff8311b030 D pppoediscinq +ffffffff8311b060 D pppoeinq +ffffffff8311c000 D dt_lock +ffffffff8311d000 D dt_prov_profile +ffffffff8311d030 D dt_prov_interval +ffffffff8311e000 D dtps_nsysent +ffffffff8311e008 D dt_prov_syscall +ffffffff8311f000 D dt_prov_static +ffffffff8311f030 D dt_static_sched_dequeue +ffffffff8311f0a0 D dt_static_sched_enqueue +ffffffff8311f110 D dt_static_sched_off__cpu +ffffffff8311f180 D dt_static_sched_on__cpu +ffffffff8311f1f0 D dt_static_sched_remain__cpu +ffffffff8311f260 D dt_static_sched_sleep +ffffffff8311f2d0 D dt_static_sched_wakeup +ffffffff8311f340 D dt_static_raw_syscalls_sys_enter +ffffffff8311f3b0 D dt_static_raw_syscalls_sys_exit +ffffffff8311f420 D dt_static_uvm_fault +ffffffff8311f490 D dt_static_uvm_map_insert +ffffffff8311f500 D dt_static_uvm_map_remove +ffffffff8311f570 D dt_static_uvm_malloc +ffffffff8311f5e0 D dt_static_uvm_free +ffffffff8311f650 D dt_static_uvm_pool_get +ffffffff8311f6c0 D dt_static_uvm_pool_put +ffffffff8311f730 D dt_static_vfs_bufcache_rel +ffffffff8311f7a0 D dt_static_vfs_bufcache_take +ffffffff8311f810 D dt_static_vfs_cleaner +ffffffff8311f880 D dt_static_vmm_guest_enter +ffffffff8311f8f0 D dt_static_vmm_guest_exit +ffffffff8311f960 D dt_static_vmm_inout +ffffffff8311f9d0 D dt_static_smr_call +ffffffff8311fa40 D dt_static_smr_called +ffffffff8311fab0 D dt_static_smr_barrier_enter +ffffffff8311fb20 D dt_static_smr_barrier_exit +ffffffff8311fb90 D dt_static_smr_wakeup +ffffffff8311fc00 D dt_static_smr_thread +ffffffff8311fc70 D dt_static_refcnt_none +ffffffff8311fce0 D dt_static_refcnt_ifaddr +ffffffff8311fd50 D dt_static_refcnt_inpcb +ffffffff8311fdc0 D dt_static_refcnt_rtentry +ffffffff8311fe30 D dt_static_refcnt_tdb +ffffffff83120000 D db_next_free_breakpoint +ffffffff83120008 D db_breakpoints_inserted +ffffffff83121000 D db_ed_style +ffffffff83122000 D db_examine_format +ffffffff83122078 D db_print_format +ffffffff83123000 D db_history_size +ffffffff83123008 D db_history_curr +ffffffff83123010 D db_history_last +ffffffff83124000 D db_tab_stop_width +ffffffff83124004 D db_max_line +ffffffff83124008 D db_max_width +ffffffff8312400c D db_radix +ffffffff83125000 D db_lastsym +ffffffff83125008 D db_maxoff +ffffffff83126000 D db_vars +ffffffff83126090 D db_evars +ffffffff83127000 D db_watchpoints_inserted +ffffffff83127008 D db_next_free_watchpoint +ffffffff83128000 D db_log +ffffffff83129000 D audio_cd +ffffffff83129020 D audio_lock +ffffffff8312a000 D midi_cd +ffffffff8312b000 D rnd_cold +ffffffff8312b004 D rnd_slowextract +ffffffff8312b008 D rnd_timeout +ffffffff8312b050 D rndlock +ffffffff8312b060 D rndreinit_timeout +ffffffff8312b0a8 D rnd_task +ffffffff8312c000 D video_cd +ffffffff8312d000 d rrip_table_analyze +ffffffff8312d0e0 d rrip_table_getname +ffffffff8312d1e0 d rrip_table_getsymname +ffffffff8312d280 d rrip_table_extref +ffffffff8312e000 D nexecs +ffffffff8312f000 D elf_note_names +ffffffff83130000 D ncpus +ffffffff83130004 D ncpusfound +ffffffff83131000 D acct_lock +ffffffff83131010 D acctsuspend +ffffffff83131014 D acctresume +ffffffff83131018 D acctrate +ffffffff83132000 D ticks +ffffffff83132008 D jiffies +ffffffff83133000 D clockintr_mtx +ffffffff83133010 D statclock_gen +ffffffff83134000 D fhdlk +ffffffff83135000 D kqueue_klist_lock +ffffffff83135010 D kq_timeoutmax +ffffffff83136000 D stackgap_random +ffffffff83137000 D nprocesses +ffffffff83137004 D nthreads +ffffffff83137008 D fork_tfmrate +ffffffff83138000 D kthread_q +ffffffff83139000 D malloc_mtx +ffffffff83139010 D memname +ffffffff831394a0 D sysctl_kmemlock +ffffffff831394b0 D malloc_errintvl +ffffffff8313a000 D maxdmap +ffffffff8313a008 D maxsmap +ffffffff8313a010 D rlimit_lock +ffffffff8313b000 D sched_cost_load +ffffffff8313b004 D sched_cost_priority +ffffffff8313b008 D sched_cost_runnable +ffffffff8313b00c D sched_cost_resident +ffffffff8313c000 D intrmap_lock +ffffffff8313d000 D nosuidcoredump +ffffffff8313d008 D sigio_lock +ffffffff8313e000 D smr_lock +ffffffff8313e010 D smr_logintvl +ffffffff8313f000 D startuphook_list +ffffffff83140000 D sysctl_lock +ffffffff83140010 D sysctl_disklock +ffffffff83140020 d openbsd +ffffffff83140024 d arg_max +ffffffff83140028 d posix_version +ffffffff8314002c d ngroups_max +ffffffff83140030 d int_one +ffffffff83140034 d maxpartitions +ffffffff83140038 d raw_part +ffffffff8314003c D allowpowerdown +ffffffff83140040 D hw_power +ffffffff83140044 d byte_order +ffffffff83140048 d page_size +ffffffff83141000 d thrsleep_queue +ffffffff83141010 d thrsleep_lock +ffffffff83142000 D tc_lock +ffffffff83142010 D windup_mtx +ffffffff83142020 D timecounter +ffffffff83142028 D time_second +ffffffff83142030 d timehands +ffffffff83142038 d dummy_timecounter +ffffffff83142088 d th0 +ffffffff83142120 d th1 +ffffffff83143000 D itimer_mtx +ffffffff83143010 D ratecheck_mtx +ffffffff83143020 D ppsratecheck_mtx +ffffffff83143030 D resettodr_to +ffffffff83143078 D resettodr_task +ffffffff83144000 D timeout_mutex +ffffffff83145000 D wdog_auto +ffffffff83146000 D taskq_sys +ffffffff83146050 D taskq_sys_mp +ffffffff83147000 D ccpu +ffffffff83147004 D perflevel +ffffffff83147008 D perfpolicy +ffffffff83147010 D setperf_to +ffffffff83148000 D autoconf_attdet_mtx +ffffffff83148010 D msgs +ffffffff83149000 d evcount_list +ffffffff83149010 d evcount_percpu_init_list +ffffffff8314a000 D syslogf_rwlock +ffffffff8314a010 D log_mtx +ffffffff8314a020 D logstash_in +ffffffff8314a028 D logstash_out +ffffffff8314a030 D logstash_rwlock +ffffffff8314b000 D pool_head +ffffffff8314b010 D pool_lock +ffffffff8314b020 D pool_debug +ffffffff8314b028 D pool_allocator_single +ffffffff8314b040 D pool_allocator_multi +ffffffff8314b058 D pool_allocator_multi_ni +ffffffff8314b070 D pool_gc_tick +ffffffff8314b0b8 D pool_gc_task +ffffffff8314c000 D kprintf_mutex +ffffffff8314c010 D db_panic +ffffffff8314c014 D splassert_ctl +ffffffff8314c018 D v_putc +ffffffff8314c020 D printf_flags +ffffffff8314d000 D userconf_base +ffffffff8314d004 D userconf_maxdev +ffffffff8314d008 D userconf_totdev +ffffffff8314d00c D userconf_maxlocnames +ffffffff8314d010 D userconf_cnt +ffffffff8314d014 D userconf_lines +ffffffff8314d018 D userconf_histsz +ffffffff8314d020 D userconf_cmds +ffffffff8314e000 D ftlock +ffffffff8314f000 d ppollcollect.poll_errintvl +ffffffff83150000 D ttydefchars +ffffffff83150014 D ttclos +ffffffff8315001b D ttopen +ffffffff83150022 D ttybg +ffffffff83150028 D ttyin +ffffffff8315002e D ttyout +ffffffff83150038 D ttylist_lock +ffffffff83151000 D linesw +ffffffff83151280 D nlinesw +ffffffff83152000 D pt_softc_lock +ffffffff83153000 d mbstat_boot_boot_cpumem +ffffffff83153080 D mbstat +ffffffff83153090 D mclsizes +ffffffff831530b0 D m_extref_mtx +ffffffff831530c0 D m_pool_allocator +ffffffff83154000 D somaxconn +ffffffff83154004 D sominconn +ffffffff83154008 D sosplice_lock +ffffffff83155000 D sb_max +ffffffff83156000 D unp_df_lock +ffffffff83156010 D unp_gc_lock +ffffffff83156020 D unp_rights_mtx +ffffffff83156030 D unp_ino_mtx +ffffffff83156040 D unp_gc_task +ffffffff83156070 D unpst_sendspace +ffffffff83156074 D unpst_recvspace +ffffffff83156078 D unpsq_sendspace +ffffffff8315607c D unpsq_recvspace +ffffffff83156080 D unpdg_sendspace +ffffffff83156084 D unpdg_recvspace +ffffffff83157000 D doingcache +ffffffff83158000 D maxvfsconf +ffffffff83158010 d vfsconflist +ffffffff83159000 D lockf_lock +ffffffff83159010 D maxlocksperuid +ffffffff8315a000 D iftovt_tab +ffffffff8315a040 D vttoif_tab +ffffffff8315a064 D suid_clear +ffffffff8315a068 D vnode_mtx +ffffffff8315a078 D vfs_stall_lock +ffffffff8315a090 D vtypes +ffffffff8315a0e0 D vtags +ffffffff8315b000 D syncer_maxdelay +ffffffff8315b004 D syncdelay +ffffffff8315c000 D dosdirtemplate +ffffffff8315d000 D ntfs_hashlock +ffffffff8315e000 D ntfs_toupper_lock +ffffffff8315f000 D art_table_gc_mtx +ffffffff8315f010 D art_table_gc_task +ffffffff8315f040 D art_node_gc_mtx +ffffffff8315f050 D art_node_gc_task +ffffffff83160000 D bpf_bufsize +ffffffff83160004 D bpf_maxbufsize +ffffffff83160008 D bpf_sysctl_lk +ffffffff83161000 D ifg_head +ffffffff83161010 D if_cloners_lock +ffffffff83161020 D if_input_task_locked +ffffffff83161050 D netlock +ffffffff83161060 D ifnetlist +ffffffff83162000 D ifiq_maxlen_drop +ffffffff83162004 D ifiq_maxlen_return +ffffffff83163000 D etherbroadcastaddr +ffffffff83163006 D ether_ipmulticast_min +ffffffff8316300c D ether_ipmulticast_max +ffffffff83163012 D ether_ip6multicast_min +ffffffff83163018 D ether_ip6multicast_max +ffffffff83164000 D etherip_cloner +ffffffff83164030 D etherip_list +ffffffff83165000 D loop_cloner +ffffffff83166000 D ifmedia_mtx +ffffffff83167000 D ppp_compressors +ffffffff83167020 D ppp_cloner +ffffffff83168000 D ppp_pkt_init +ffffffff83169000 D ppp_bsd_compress +ffffffff8316a000 D ppp_deflate +ffffffff8316a070 D ppp_deflate_draft +ffffffff8316b000 D tun_cloner +ffffffff8316b030 D tap_cloner +ffffffff8316c000 D bridgeintrq +ffffffff8316c038 D bridge_cloner +ffffffff8316d000 d veb_cloner +ffffffff8316d030 d vport_cloner +ffffffff8316e000 D vlan_tagh_lk +ffffffff8316e010 D vlan_cloner +ffffffff8316e040 D svlan_cloner +ffffffff8316f000 D pipex_list_mtx +ffffffff8316f010 D pipex_prune +ffffffff8316f018 D pipexoutq +ffffffff8316f050 d SHAPad2 +ffffffff83170000 D rtmap_gc +ffffffff83170018 D rt_rc +ffffffff83171000 D rt_labels +ffffffff83171010 D rtlabel_mtx +ffffffff83172000 D enc_cloner +ffffffff83173000 D gre_cloner +ffffffff83173030 D gre_list +ffffffff83173040 D mgre_cloner +ffffffff83173070 D egre_cloner +ffffffff831730a0 D nvgre_cloner +ffffffff831730d0 D eoip_cloner +ffffffff83174000 D trunk_cloner +ffffffff83175000 d aggr_cloner +ffffffff83176000 d tpmr_cloner +ffffffff83177000 D mpe_cloner +ffffffff83178000 D mpw_cloner +ffffffff83179000 D mpip_cloner +ffffffff8317a000 d bpe_cloner +ffffffff8317a030 d bpe_lock +ffffffff8317b000 D vether_cloner +ffffffff8317c000 D pair_cloner +ffffffff8317d000 d vxlan_cloner +ffffffff8317d030 d vxlan_lock +ffffffff8317d040 d vxlan_teps +ffffffff8317e000 D underload_interval +ffffffff8317e010 D wg_cloner +ffffffff8317f000 d stoeplitz_keyseed +ffffffff83180000 D ieee80211_cache_size +ffffffff83181000 D arpt_prune +ffffffff83181004 D arpt_keep +ffffffff83181008 D arpt_down +ffffffff83181010 D arpinq +ffffffff83181048 D arp_mtx +ffffffff83181058 D arp_maxtries +ffffffff83182000 D ipport_firstauto +ffffffff83182004 D ipport_lastauto +ffffffff83182008 D ipport_hifirstauto +ffffffff8318200c D ipport_hilastauto +ffffffff83183000 D divert_sendspace +ffffffff83183004 D divert_recvspace +ffffffff83183008 D divbhashsize +ffffffff83184000 D icmptstamprepl +ffffffff83184004 D icmperrppslim +ffffffff83184008 D icmp_redirtimeout +ffffffff83185000 D ipsendredirects +ffffffff83185004 D ip_defttl +ffffffff83185008 D ip_mtudisc +ffffffff8318500c D ip_mtudisc_timeout +ffffffff83185010 D ipq_mutex +ffffffff83185020 D ip_maxqueue +ffffffff83185028 D ipintrq +ffffffff83185060 d ipsend_task +ffffffff83185090 d ipsendraw_task +ffffffff83186000 D ip_mrtproto +ffffffff83186004 d sin +ffffffff83187000 D rip_sendspace +ffffffff83187008 D rip_recvspace +ffffffff83188000 D tcprexmtthresh +ffffffff83188004 D tcptv_keep_init +ffffffff83188008 D tcp_rst_ppslim +ffffffff8318800c D tcp_ackdrop_ppslim +ffffffff83188010 D tcp_syn_hash_size +ffffffff83188014 D tcp_syn_cache_limit +ffffffff83188018 D tcp_syn_bucket_limit +ffffffff8318801c D tcp_syn_use_limit +ffffffff83189000 D tcp_outflags +ffffffff8318a000 D tcp_timer_mtx +ffffffff8318a010 D tcp_mssdflt +ffffffff8318a014 D tcp_rttdflt +ffffffff8318a018 D tcp_do_rfc1323 +ffffffff8318a01c D tcp_do_sack +ffffffff8318a020 D tcp_do_rfc3390 +ffffffff8318a024 D tcp_reass_limit +ffffffff8318a028 D tcp_sackhole_limit +ffffffff8318b000 D tcp_backoff +ffffffff8318b034 D tcp_totbackoff +ffffffff8318c000 D tcp_sendspace +ffffffff8318c004 D tcp_recvspace +ffffffff8318c008 D tcp_autorcvbuf_inc +ffffffff8318d000 D udpcksum +ffffffff8318d004 D udp_sendspace +ffffffff8318d008 D udp_recvspace +ffffffff8318e000 D ipsec_flows_mtx +ffffffff8318e010 D ipsec_ids_idle +ffffffff8318e014 D ipsec_ids_next_flow +ffffffff8318e018 D ipsec_policy_head +ffffffff8318e028 D ipsp_ids_gc_timeout +ffffffff8318e070 D tdb_sadb_mtx +ffffffff8318e080 d tdb_hashmask +ffffffff8318f000 D ipo_tdb_mtx +ffffffff8318f010 D ipsec_acquire_mtx +ffffffff8318f020 D ipsec_acquire_head +ffffffff83190000 D ipsec_keep_invalid +ffffffff83190004 D ipsec_require_pfs +ffffffff83190008 D ipsec_soft_timeout +ffffffff8319000c D ipsec_exp_timeout +ffffffff83190010 D ipsec_soft_first_use +ffffffff83190014 D ipsec_exp_first_use +ffffffff83190018 D ipsec_expire_acquire +ffffffff8319001c D esp_enable +ffffffff83190020 D ah_enable +ffffffff83191000 D udpencap_enable +ffffffff83191004 D udpencap_port +ffffffff83192000 D carp_vh_rc +ffffffff83192020 D carp_sc_rc +ffffffff83192040 D carp_opts +ffffffff83192058 D carp_cloner +ffffffff83192088 d carp_send_na.mcast +ffffffff83193000 d PADDING +ffffffff83194000 d PADDING +ffffffff83195000 d weak_keys +ffffffff83196000 D swcr_id +ffffffff83197000 D window_inflate +ffffffff83197004 D window_deflate +ffffffff83198000 D ghash_update +ffffffff83199000 D mpls_defttl +ffffffff83199004 D mpls_mapttl_ip +ffffffff8319a000 D nfskevq_lock +ffffffff8319b000 D nfs_backoff +ffffffff8319b020 D nfs_ptimers +ffffffff8319c000 D desirednfsrvcache +ffffffff8319c010 D nonidempotent +ffffffff8319c070 D nfsv2_repstat +ffffffff8319d000 D nfsv2_type +ffffffff8319d030 D nfsv3_type +ffffffff8319d060 D nv2tov_type +ffffffff8319d080 D nv3tov_type +ffffffff8319d0a0 D nfsv3_procid +ffffffff8319d100 D nfsv2_procid +ffffffff8319d15c d nfsv3err_getattr +ffffffff8319d170 d nfsv3err_setattr +ffffffff8319d190 d nfsv3err_lookup +ffffffff8319d1a4 d nfsv3err_access +ffffffff8319d1b0 d nfsv3err_readlink +ffffffff8319d1d0 d nfsv3err_read +ffffffff8319d1f0 d nfsv3err_write +ffffffff8319d210 d nfsv3err_create +ffffffff8319d230 d nfsv3err_mkdir +ffffffff8319d250 d nfsv3err_symlink +ffffffff8319d270 d nfsv3err_mknod +ffffffff8319d290 d nfsv3err_remove +ffffffff8319d2b0 d nfsv3err_rmdir +ffffffff8319d2d0 d nfsv3err_rename +ffffffff8319d300 d nfsv3err_link +ffffffff8319d330 d nfsv3err_readdir +ffffffff8319d350 d nfsv3err_readdirplus +ffffffff8319d366 d nfsv3err_fsstat +ffffffff8319d372 d nfsv3err_fsinfo +ffffffff8319d37c d nfsv3err_pathconf +ffffffff8319d386 d nfsv3err_commit +ffffffff8319e000 D nfsrv3_procs +ffffffff8319e0b8 D nfs_niothreads +ffffffff8319f000 D fragtbl +ffffffff831a0000 D ffs_vtbl +ffffffff831a1000 D softdep_typenames +ffffffff831a1070 D tickdelay +ffffffff831a2000 D dirchk +ffffffff831a3000 D desireddquot +ffffffff831a4000 D amap_list_lock +ffffffff831a5000 d uao_list_lock +ffffffff831a6000 d uvmexp_countersboot_boot_cpumem +ffffffff831a60c0 D uvmexp_counters +ffffffff831a60c8 D vm_min_kernel_address +ffffffff831a7000 D no_constraint +ffffffff831a8000 d uvm_kmapent_warn_rate +ffffffff831a9000 D maxslp +ffffffff831aa000 D uvmpagerops +ffffffff831ab000 D uvm_swap_data_lock +ffffffff831ab010 D swap_syscall_lock +ffffffff831ab020 D oommtx +ffffffff831ac000 D uvm_doswapencrypt +ffffffff831ad000 D gif_list +ffffffff831ad010 D gif_cloner +ffffffff831ae000 D divert6_sendspace +ffffffff831ae004 D divert6_recvspace +ffffffff831ae008 D divb6hashsize +ffffffff831af000 d in6_get_hw_ifid.allone +ffffffff831b0000 D ip6_sendredirects +ffffffff831b0004 D ip6_defhlim +ffffffff831b0008 D ip6_defmcasthlim +ffffffff831b000c D ip6_maxfragpackets +ffffffff831b0010 D ip6_maxfrags +ffffffff831b0014 D ip6_log_interval +ffffffff831b0018 D ip6_hdrnestlimit +ffffffff831b001c D ip6_dad_count +ffffffff831b0020 D ip6_auto_flowlabel +ffffffff831b0024 D ip6_use_deprecated +ffffffff831b0028 D ip6_neighborgcthresh +ffffffff831b002c D ip6_maxdynroutes +ffffffff831b0030 D rip6_sendspace +ffffffff831b0038 D rip6_recvspace +ffffffff831b0040 D icmp6_redirtimeout +ffffffff831b0044 D icmp6errppslim +ffffffff831b0048 D ip6_mtudisc_timeout +ffffffff831b1000 D frag6_mutex +ffffffff831b2000 d icmp6_mtudisc_hiwat +ffffffff831b2004 d icmp6_mtudisc_lowat +ffffffff831b3000 d randomtab_20 +ffffffff831b4000 D ip6intrq +ffffffff831b4038 d ip6send_task +ffffffff831b5000 D nd6_timer_next +ffffffff831b5008 D nd6_expire_next +ffffffff831b5010 D nd6_delay +ffffffff831b5014 D nd6_umaxtries +ffffffff831b5018 D nd6_mmaxtries +ffffffff831b501c D nd6_gctimer +ffffffff831b5020 D nd6_maxndopt +ffffffff831b6000 d dadq +ffffffff831b7000 D pfkeyv2_mtx +ffffffff831b7010 d pfkeyv2_seq +ffffffff831b8000 D sadb_exts_allowed_in +ffffffff831b8090 D sadb_exts_required_in +ffffffff831b9000 D cold +ffffffff831ba000 D bdevsw +ffffffff831ba460 D nblkdev +ffffffff831ba470 D cdevsw +ffffffff831bc400 D nchrdev +ffffffff831bc404 D mem_no +ffffffff831bc408 D swapdev +ffffffff831bc410 D constab +ffffffff831bd000 D machine +ffffffff831bd008 D lid_action +ffffffff831bd00c D pwr_action +ffffffff831bd010 D isa_constraint +ffffffff831bd020 D dma_constraint +ffffffff831bd030 D uvm_md_constraints +ffffffff831bd048 D delay_func +ffffffff831bd050 D initclock_func +ffffffff831bd058 D bootinfo_size +ffffffff831bd05c D waittime +ffffffff831bd060 D dumpmag +ffffffff831be000 D tsc_rdtsc +ffffffff831be008 D tsc_timecounter +ffffffff831be058 D tsc_is_synchronized +ffffffff831bf000 D local_apic +ffffffff831bf020 D lapic_id +ffffffff831bf080 D lapic_tpr +ffffffff831bf0a0 d lapic_ppr +ffffffff831bf100 d lapic_isr +ffffffff831c0000 D warn_once +ffffffff831c1000 d errata +ffffffff831c2000 D cpu_ucode_intel_mtx +ffffffff831c3000 D mem_owner_bios +ffffffff831c3008 D mrops +ffffffff831c3028 D mtrrmask +ffffffff831c3030 D mtrrtomrt +ffffffff831c4000 D pmap_pg_wc +ffffffff831c4008 D pmaps_lock +ffffffff831c4018 d pmap_maxkvaddr +ffffffff831c5000 D kv_physwait +ffffffff831c6000 D fpu_save_len +ffffffff831c7000 D i8259_pic +ffffffff831c8000 D softintr_pic +ffffffff831c9000 D ipifunc +ffffffff831ca000 D setperf_mp_mutex +ffffffff831cb000 D db_Grp6 +ffffffff831cb040 D db_Grp7 +ffffffff831cb100 D db_Grp8 +ffffffff831cb140 D db_Grp9 +ffffffff831cb200 D db_GrpA +ffffffff831cb240 D db_GrpB +ffffffff831cb280 D db_GrpC +ffffffff831cb2c0 D db_inst_0f0x +ffffffff831cb440 D db_inst_0f2x +ffffffff831cb5c0 D db_inst_0f3x +ffffffff831cb740 D db_inst_0f8x +ffffffff831cb8c0 D db_inst_0f9x +ffffffff831cba40 D db_inst_0fax +ffffffff831cbbc0 D db_inst_0fbx +ffffffff831cbd40 D db_inst_0fcx +ffffffff831cbec0 D db_inst_0f +ffffffff831cbf40 D db_Esc92 +ffffffff831cbf80 D db_Esc94 +ffffffff831cbfc0 D db_Esc95 +ffffffff831cc000 D db_Esc96 +ffffffff831cc040 D db_Esc97 +ffffffff831cc080 D db_Esca5 +ffffffff831cc0c0 D db_Escb4 +ffffffff831cc100 D db_Esce3 +ffffffff831cc140 D db_Escf4 +ffffffff831cc180 D db_Esc8 +ffffffff831cc240 D db_Esc9 +ffffffff831cc300 D db_Esca +ffffffff831cc3c0 D db_Escb +ffffffff831cc480 D db_Escc +ffffffff831cc540 D db_Escd +ffffffff831cc600 D db_Esce +ffffffff831cc6c0 D db_Escf +ffffffff831cc780 D db_Esc_inst +ffffffff831cc7c0 D db_Grp1 +ffffffff831cc800 D db_Grp2 +ffffffff831cc840 D db_Grp3 +ffffffff831cc900 D db_Grp4 +ffffffff831cc9c0 D db_Grp5 +ffffffff831cca80 D db_inst_table +ffffffff831ce280 D db_bad_inst +ffffffff831ce2a0 D db_index_reg_16 +ffffffff831ce2e0 D db_reg +ffffffff831ce4e0 D db_seg_reg +ffffffff831ce520 D db_lengths +ffffffff831cf000 D db_regs +ffffffff831cf1e0 D db_eregs +ffffffff831cf1f0 D db_reg_args +ffffffff831d0000 D timer_mutex +ffffffff831d0010 d i8254_timecounter +ffffffff831d1000 D spleen8x16 +ffffffff831d1058 D spleen12x24 +ffffffff831d10b0 D spleen16x32 +ffffffff831d1108 D spleen32x64 +ffffffff831d1160 d builtin_fonts +ffffffff831d11e0 d wsfont_add.cookiegen +ffffffff831d11f0 d spleen8x16_data +ffffffff831d1ff0 d spleen12x24_data +ffffffff831d49f0 d spleen16x32_data +ffffffff831d81f0 d spleen32x64_data +ffffffff831e7000 D nsphy_cd +ffffffff831e8000 D nsphyter_cd +ffffffff831e9000 D gentbi_cd +ffffffff831ea000 D qsphy_cd +ffffffff831eb000 D inphy_cd +ffffffff831ec000 D iophy_cd +ffffffff831ed000 D eephy_cd +ffffffff831ee000 D exphy_cd +ffffffff831ef000 D rlphy_cd +ffffffff831f0000 D lxtphy_cd +ffffffff831f1000 D luphy_cd +ffffffff831f2000 D mtdphy_cd +ffffffff831f3000 D icsphy_cd +ffffffff831f4000 D sqphy_cd +ffffffff831f5000 D tqphy_cd +ffffffff831f6000 D ukphy_cd +ffffffff831f7000 D dcphy_cd +ffffffff831f8000 D bmtphy_cd +ffffffff831f9000 D brgphy_cd +ffffffff831fa000 D xmphy_cd +ffffffff831fb000 D amphy_cd +ffffffff831fc000 D acphy_cd +ffffffff831fd000 D nsgphy_cd +ffffffff831fe000 D urlphy_cd +ffffffff831ff000 D rgephy_cd +ffffffff83200000 D ciphy_cd +ffffffff83201000 D ipgphy_cd +ffffffff83202000 D etphy_cd +ffffffff83203000 D jmphy_cd +ffffffff83204000 D atphy_cd +ffffffff83205000 D scsi_autoconf +ffffffff83205008 D scsibus_cd +ffffffff83206000 D cd_cd +ffffffff83207000 D ch_cd +ffffffff83207020 D chquirks +ffffffff83208000 D sd_cd +ffffffff83209000 D st_cd +ffffffff8320a000 D uk_cd +ffffffff8320b000 D safte_cd +ffffffff8320c000 D ses_cd +ffffffff8320d000 D sym_cd +ffffffff8320d020 D sym_devices +ffffffff8320d070 D asym_devices +ffffffff8320e000 D rdac_cd +ffffffff8320e020 D rdac_devices +ffffffff8320f000 D emc_cd +ffffffff8320f020 D emc_devices +ffffffff83210000 D hds_cd +ffffffff83210020 D hds_devices +ffffffff83211000 D atapiscsi_cd +ffffffff83212000 D wd_cd +ffffffff83212020 d wddumpmulti +ffffffff83213000 D mainbus_cd +ffffffff83213020 D mba_iba +ffffffff83214000 D bios_cd +ffffffff83214020 D smbios_uninfo +ffffffff83215000 D mpbios_cd +ffffffff83215020 d mp_conf +ffffffff83215070 d extint_bus +ffffffff832150a0 d smi_bus +ffffffff832150d0 d nmi_bus +ffffffff83216000 D cpu_info_full_primary +ffffffff83219000 D cpu_info_list +ffffffff83219008 D mp_cpu_funcs +ffffffff83219020 D cpu_cd +ffffffff83219040 D cpu_info +ffffffff8321a000 D local_pic +ffffffff8321a090 D lapic_readreg +ffffffff8321a098 D lapic_writereg +ffffffff8321a0a0 D x86_ipi +ffffffff8321b000 D ioapic_cold +ffffffff8321b008 D ioapic_cd +ffffffff8321c000 D efifb_std_descr +ffffffff8321c030 D efifb_descrs +ffffffff8321c038 D efifb_accessops +ffffffff8321c098 D efifb_cd +ffffffff8321d000 D pvbus_cd +ffffffff8321d020 D pvbus_types +ffffffff8321d0e0 D pvbus_dma_tag +ffffffff8321e000 D pvclock_cd +ffffffff8321e020 D pvclock_timecounter +ffffffff8321f000 D vmt_tclo_rpc +ffffffff8321f0d0 D vmt_cd +ffffffff83220000 D xen_cd +ffffffff83220020 D xen_bus_dma_tag +ffffffff83221000 D xnf_cd +ffffffff83222000 D xbf_cd +ffffffff83223000 D hv_msg_dispatch +ffffffff83223110 D hv_timecounter +ffffffff83223160 D hyperv_cd +ffffffff83224000 d hv_ic_devs +ffffffff83225000 D hvn_cd +ffffffff83226000 D hvs_cd +ffffffff83227000 D virtio_cd +ffffffff83228000 D vio_cd +ffffffff83229000 D vioblk_cd +ffffffff8322a000 D viomb_cd +ffffffff8322b000 D viornd_cd +ffffffff8322c000 D vioscsi_cd +ffffffff8322d000 D vmmci_cd +ffffffff8322e000 D pci_cd +ffffffff8322f000 D arc_fw_hdr +ffffffff8322f008 D arc_cd +ffffffff83230000 D jmb_cd +ffffffff83231000 D mfii_cd +ffffffff83232000 D ips_cd +ffffffff83233000 D eap_cd +ffffffff83234000 D auacer_cd +ffffffff83235000 D auich_cd +ffffffff83236000 D azalia_cd +ffffffff83237000 D envy_cd +ffffffff83237020 D envy_matchids +ffffffff83237030 D envy_rates +ffffffff832370b0 D ak4524_dac +ffffffff832370d8 D ak4524_adc +ffffffff83237100 D ak4358_dac +ffffffff83237128 D ak5365_adc +ffffffff83237150 D unkenvy_codec +ffffffff83237180 D envy_cards +ffffffff832373f0 D envy_cards_ht +ffffffff83237600 d julia_eeprom +ffffffff83238000 D emu_cd +ffffffff83239000 D auixp_cd +ffffffff8323a000 D clcs_cd +ffffffff8323b000 D yds_cd +ffffffff8323c000 D auvia_cd +ffffffff8323d000 D qle_cd +ffffffff8323e000 D mpii_cd +ffffffff8323f000 D aq_cd +ffffffff83240000 D de_cd +ffffffff83241000 D pcn_cd +ffffffff83242000 D wdc_sii3114_vtbl +ffffffff83242038 D wdc_pdc203xx_vtbl +ffffffff83242070 D wdc_svwsata_vtbl +ffffffff832420a8 D pciide_cd +ffffffff832420d0 d sis_hostbr_type +ffffffff83243000 D ppb_cd +ffffffff83244000 D vr_cd +ffffffff83244020 D vr_devices +ffffffff83245000 D txp_cd +ffffffff83246000 D bt848_card_signature +ffffffff83247000 D bktr_cd +ffffffff83248000 D em_cd +ffffffff83249000 D ixgb_cd +ffffffff8324a000 D ix_cd +ffffffff8324a020 D ixgbe_smart_speed +ffffffff8324a024 D ixgbe_enable_msix +ffffffff8324b000 D ixl_cd +ffffffff8324b020 d ixl_sff_lock +ffffffff8324c000 D xge_cd +ffffffff8324d000 D thtc_cd +ffffffff8324d020 D tht_cd +ffffffff8324d040 D tht_txt_desc +ffffffff8324d068 D tht_rxf_desc +ffffffff8324d090 D tht_rxd_desc +ffffffff8324d0b8 D tht_txf_desc +ffffffff8324e000 D myx_cd +ffffffff8324f000 D oce_cd +ffffffff83250000 D dc_devs +ffffffff83251000 D cas_cd +ffffffff83252000 D sis_cd +ffffffff83253000 D se_cd +ffffffff83254000 D cbb_cd +ffffffff83254020 D yc_chipsets +ffffffff832541b0 d pccbb_funcs +ffffffff832541e0 d pccbb_pcmcia_funcs +ffffffff83255000 D skc_cd +ffffffff83255020 D sk_cd +ffffffff83256000 D mskc_cd +ffffffff83256020 D msk_cd +ffffffff83257000 D puc_cd +ffffffff83258000 D puc_ndevs +ffffffff83259000 D iwi_cd +ffffffff8325a000 D wpi_cd +ffffffff8325b000 D iwn_cd +ffffffff8325c000 D iwm_cd +ffffffff8325d000 D iwx_cd +ffffffff8325e000 D cmpci_cd +ffffffff8325f000 D iha_cd +ffffffff83260000 D pcscp_cd +ffffffff83260020 D pcscp_glue +ffffffff83261000 D bge_cd +ffffffff83262000 D bnx_firmwares +ffffffff83262160 D bnx_rv2ps +ffffffff832621c0 D bnx_cd +ffffffff832621e0 d flash_5709 +ffffffff83262210 d flash_table +ffffffff83263000 D vge_cd +ffffffff83264000 D stge_cd +ffffffff83265000 D nfe_cd +ffffffff83266000 D et_cd +ffffffff83267000 D jme_cd +ffffffff83268000 D age_cd +ffffffff83269000 D alc_dma_burst +ffffffff83269020 D alc_cd +ffffffff8326a000 D ale_cd +ffffffff8326b000 D amdpm_cd +ffffffff8326b020 d amdpm_timecounter +ffffffff8326c000 D bce_cd +ffffffff8326d000 D rtwn_cd +ffffffff8326e000 d ral_rt2560_opns +ffffffff8326e028 d ral_rt2661_opns +ffffffff8326e050 d ral_rt2860_opns +ffffffff8326f000 D piixpm_cd +ffffffff83270000 D vic_cd +ffffffff83271000 D vmx_cd +ffffffff83272000 D vmwpvs_cd +ffffffff83273000 D lii_cd +ffffffff83274000 D ichiic_cd +ffffffff83275000 D viapm_cd +ffffffff83275020 d viapm_timecounter +ffffffff83276000 D amdiic_cd +ffffffff83277000 D nviic_cd +ffffffff83278000 D kate_cd +ffffffff83279000 D km_cd +ffffffff8327a000 D cpu_model_offsets +ffffffff8327a070 D ksmn_cd +ffffffff8327b000 D itherm_cd +ffffffff8327c000 D pchtemp_cd +ffffffff8327d000 D xspd_cd +ffffffff8327e000 D virtio_pci_ops +ffffffff8327f000 D bwfm_pci_buscore_ops +ffffffff8327f030 D bwfm_pci_bus_ops +ffffffff8327f058 D bwfm_pci_msgbuf_ops +ffffffff83280000 D bnxt_cd +ffffffff83281000 D mcx_cd +ffffffff83282000 D iavf_cd +ffffffff83283000 D rge_cd +ffffffff83284000 D igc_cd +ffffffff83285000 D ngbe_cd +ffffffff83286000 D agp_cd +ffffffff83287000 D intagp_cd +ffffffff83287020 D agp_i810_methods +ffffffff83288000 D reservation_ww_class +ffffffff83289000 d bridge_lock +ffffffff83289010 d bridge_list +ffffffff8328a000 d drm_connector_enum_list +ffffffff8328a1f8 d connector_list_lock +ffffffff8328a208 d connector_list +ffffffff8328b000 d kernel_fb_helper_list +ffffffff8328b010 d kernel_fb_helper_lock +ffffffff8328c000 D drm_global_mutex +ffffffff8328d000 D sch_mtx +ffffffff8328d010 D i2c_bit_algo +ffffffff8328d020 d drm_fence_context_count +ffffffff8328d028 d dma_fence_stub_mtx +ffffffff8328d038 D wait_bit_mtx +ffffffff8328d048 D shrinkers +ffffffff8328e000 d crtc_ww_class +ffffffff8328f000 d panel_lock +ffffffff8328f010 d panel_list +ffffffff83290000 d ttm_global_mutex +ffffffff83291000 D intel_bbops +ffffffff83292000 d i915_sys_placement +ffffffff83292020 d i915_ttm_bo_driver +ffffffff83293000 d mchdev_lock +ffffffff83294000 D inteldrm_stdscreen +ffffffff83294030 D inteldrm_scrlist +ffffffff83294038 D inteldrm_screenlist +ffffffff83294048 D inteldrm_accessops +ffffffff832940a8 D inteldrm_cd +ffffffff83295000 d capture_mutex +ffffffff83296000 d mitigations +ffffffff83297000 D i915_modparams +ffffffff83298000 d schedule_lock +ffffffff83299000 d unbind_fence_ops +ffffffff8329a000 D intel_graphics_stolen_res +ffffffff8329b000 D btc_valid_sclk +ffffffff8329c000 d evergreen_cs_packet_parse_vline.vline_start_end +ffffffff8329c020 d evergreen_cs_packet_parse_vline.vline_status +ffffffff8329d000 d r600_cs_packet_parse_vline.vline_start_end +ffffffff8329d008 d r600_cs_packet_parse_vline.vline_status +ffffffff8329e000 d r100_asic +ffffffff8329e2e0 d r200_asic +ffffffff8329e5c0 d r300_asic_pcie +ffffffff8329e8a0 d r300_asic +ffffffff8329eb80 d r420_asic +ffffffff8329ee60 d rs400_asic +ffffffff8329f140 d rs600_asic +ffffffff8329f420 d rs690_asic +ffffffff8329f700 d rv515_asic +ffffffff8329f9e0 d r520_asic +ffffffff8329fcc0 d r600_asic +ffffffff8329ffa0 d rv6xx_asic +ffffffff832a0280 d rs780_asic +ffffffff832a0560 d rv770_asic +ffffffff832a0840 d evergreen_asic +ffffffff832a0b20 d sumo_asic +ffffffff832a0e00 d btc_asic +ffffffff832a10e0 d cayman_asic +ffffffff832a13c0 d trinity_asic +ffffffff832a16a0 d si_asic +ffffffff832a1980 d ci_asic +ffffffff832a1c60 d kv_asic +ffffffff832a2000 d dce6_funcs +ffffffff832a2018 d dce6_hdmi_funcs +ffffffff832a2088 d dce6_dp_funcs +ffffffff832a20f8 d dce4_funcs +ffffffff832a2110 d dce4_hdmi_funcs +ffffffff832a2180 d dce4_dp_funcs +ffffffff832a21f0 d dce32_funcs +ffffffff832a2208 d dce32_hdmi_funcs +ffffffff832a2278 d dce32_dp_funcs +ffffffff832a22e8 d r600_funcs +ffffffff832a2300 d r600_hdmi_funcs +ffffffff832a3000 D radeon_modeset +ffffffff832a3004 D radeon_dynclks +ffffffff832a3008 D radeon_agpmode +ffffffff832a300c D radeon_gart_size +ffffffff832a3010 D radeon_tv +ffffffff832a3014 D radeon_audio +ffffffff832a3018 D radeon_pcie_gen2 +ffffffff832a301c D radeon_msi +ffffffff832a3020 D radeon_lockup_timeout +ffffffff832a3024 D radeon_dpm +ffffffff832a3028 D radeon_aspm +ffffffff832a302c D radeon_runtime_pm +ffffffff832a3030 D radeon_vm_size +ffffffff832a3034 D radeon_vm_block_size +ffffffff832a3038 D radeon_use_pflipirq +ffffffff832a303c D radeon_bapm +ffffffff832a3040 D radeon_backlight +ffffffff832a3044 D radeon_auxch +ffffffff832a3048 D radeon_uvd +ffffffff832a304c D radeon_vce +ffffffff832a3050 D radeon_si_support +ffffffff832a3054 D radeon_cik_support +ffffffff832a3058 D radeondrm_cd +ffffffff832a3078 D radeondrm_stdscreen +ffffffff832a30a8 D radeondrm_scrlist +ffffffff832a30b0 D radeondrm_screenlist +ffffffff832a30c0 D radeondrm_accessops +ffffffff832a4000 D radeon_bbops +ffffffff832a5000 d radeon_bo_driver +ffffffff832a6000 d verde_pg_init +ffffffff832a7000 d cac_weights_pitcairn +ffffffff832a74d0 d cac_weights_oland +ffffffff832a8000 d aldebaran_mode2_handler +ffffffff832a9000 d amdgpu_vbios_version_attrs +ffffffff832aa000 D amdgpu_asic_name +ffffffff832ab000 D amdgpu_gart_size +ffffffff832ab004 D amdgpu_gtt_size +ffffffff832ab008 D amdgpu_moverate +ffffffff832ab00c D amdgpu_audio +ffffffff832ab010 D amdgpu_pcie_gen2 +ffffffff832ab014 D amdgpu_msi +ffffffff832ab018 D amdgpu_dpm +ffffffff832ab01c D amdgpu_fw_load_type +ffffffff832ab020 D amdgpu_aspm +ffffffff832ab024 D amdgpu_runtime_pm +ffffffff832ab028 D amdgpu_ip_block_mask +ffffffff832ab02c D amdgpu_bapm +ffffffff832ab030 D amdgpu_vm_size +ffffffff832ab034 D amdgpu_vm_fragment_size +ffffffff832ab038 D amdgpu_vm_block_size +ffffffff832ab03c D amdgpu_vm_update_mode +ffffffff832ab040 D amdgpu_dc +ffffffff832ab044 D amdgpu_sched_jobs +ffffffff832ab048 D amdgpu_sched_hw_submission +ffffffff832ab050 D amdgpu_cg_mask +ffffffff832ab058 D amdgpu_pg_mask +ffffffff832ab05c D amdgpu_sdma_phase_quantum +ffffffff832ab060 D amdgpu_pp_feature_mask +ffffffff832ab064 D amdgpu_lbpw +ffffffff832ab068 D amdgpu_compute_multipipe +ffffffff832ab06c D amdgpu_gpu_recovery +ffffffff832ab070 D amdgpu_smu_pptable_id +ffffffff832ab074 D amdgpu_dc_feature_mask +ffffffff832ab078 D amdgpu_async_gfx_ring +ffffffff832ab07c D amdgpu_discovery +ffffffff832ab080 D amdgpu_noretry +ffffffff832ab084 D amdgpu_force_asic_type +ffffffff832ab088 D amdgpu_tmz +ffffffff832ab08c D amdgpu_reset_method +ffffffff832ab090 D amdgpu_num_kcq +ffffffff832ab094 D amdgpu_use_xgmi_p2p +ffffffff832ab098 D mgpu_info +ffffffff832ab248 D amdgpu_ras_enable +ffffffff832ab24c D amdgpu_ras_mask +ffffffff832ab250 D amdgpu_bad_page_threshold +ffffffff832ab254 D amdgpu_backlight +ffffffff832ab258 D amdgpu_cd +ffffffff832ab278 D amdgpu_stdscreen +ffffffff832ab2a8 D amdgpu_scrlist +ffffffff832ab2b0 D amdgpu_screenlist +ffffffff832ab2c0 D amdgpu_accessops +ffffffff832ac000 d amdgpu_gtt_mgr_attributes +ffffffff832ad000 D amdgpu_bbops +ffffffff832ae000 D soc15_ih_clientid_name +ffffffff832af000 D ras_error_string +ffffffff832af030 D ras_block_string +ffffffff832af0c0 D ras_mca_block_string +ffffffff832b0000 d amdgpu_bo_driver +ffffffff832b1000 d amdgpu_vram_mgr_attributes +ffffffff832b2000 D amdgpu_xgmi_hive_type +ffffffff832b2008 d xgmi_mutex +ffffffff832b2018 D xgmi_ras_hw_ops +ffffffff832b2058 D xgmi_ras +ffffffff832b3000 d gfx_v9_0_ras +ffffffff832b4000 D gfx_v9_4_ras +ffffffff832b5000 D gfx_v9_4_2_ras_ops +ffffffff832b5040 D gfx_v9_4_2_ras +ffffffff832b6000 D hdp_v4_0_ras_hw_ops +ffffffff832b6040 D hdp_v4_0_ras +ffffffff832b7000 d jpeg_v2_6_ras +ffffffff832b8000 D mca_v3_0_mp0_ras +ffffffff832b8058 D mca_v3_0_mp1_ras +ffffffff832b80b0 D mca_v3_0_mpio_ras +ffffffff832b9000 D mmhub_v1_0_ras_hw_ops +ffffffff832b9040 D mmhub_v1_0_ras +ffffffff832ba000 D mmhub_v1_7_ras_hw_ops +ffffffff832ba040 D mmhub_v1_7_ras +ffffffff832bb000 D mmhub_v9_4_ras +ffffffff832bc000 D nbio_v7_4_ras +ffffffff832bd000 d sriov_sc_video_codecs_encode +ffffffff832bd010 d sriov_sc_video_codecs_decode +ffffffff832bd020 d sriov_sc_video_codecs_encode_array +ffffffff832bd050 d sriov_sc_video_codecs_decode_array +ffffffff832be000 d sdma_v4_0_ras +ffffffff832bf000 D sdma_v4_4_ras +ffffffff832c0000 d sienna_cichlid_mode2_handler +ffffffff832c1000 D umc_v6_1_ras +ffffffff832c2000 D umc_v6_7_ras +ffffffff832c3000 D umc_v8_10_ras +ffffffff832c4000 D umc_v8_7_ras +ffffffff832c5000 d vcn_v2_6_ras +ffffffff832c6000 d amdgpu_dm_mode_config_helperfuncs +ffffffff832c6010 d dm_atomic_state_funcs +ffffffff832c7000 d construct_integrated_info.result +ffffffff832c7004 d bios_parser_get_firmware_info.result +ffffffff832c8000 d dce_funcs +ffffffff832c9000 d dce110_funcs +ffffffff832ca000 d dce112_funcs +ffffffff832cb000 d dce120_funcs +ffffffff832cc000 d rv1_clk_funcs +ffffffff832cc088 d rv1_clk_internal_funcs +ffffffff832cd000 d rv2_clk_internal_funcs +ffffffff832ce000 d dcn2_funcs +ffffffff832cf000 D dcn201_funcs +ffffffff832d0000 d dcn21_funcs +ffffffff832d0088 d rn_bw_params +ffffffff832d1000 D dcn3_fpga_funcs +ffffffff832d1088 d dcn3_funcs +ffffffff832d2000 d vg_funcs +ffffffff832d2088 d dummy_clocks +ffffffff832d21b8 d vg_bw_params +ffffffff832d3000 d dcn31_bw_params +ffffffff832d32a0 d dcn31_funcs +ffffffff832d4000 d dcn314_bw_params +ffffffff832d42a0 d dcn314_funcs +ffffffff832d5000 d dcn315_funcs +ffffffff832d5088 d dcn315_bw_params +ffffffff832d6000 d dcn316_funcs +ffffffff832d6088 d dcn316_bw_params +ffffffff832d7000 d dcn32_funcs +ffffffff832d8000 d dcn10_dpp_cap +ffffffff832d9000 D aperture_default_system +ffffffff832da000 d dcn20_dpp_cap +ffffffff832da010 d dcn20_dpp_funcs +ffffffff832db000 d dcn20_hubp_funcs +ffffffff832dc000 d dcn20_opp_funcs +ffffffff832dd000 d dcn20_tg_funcs +ffffffff832de000 d dcn201_dpp_funcs +ffffffff832de110 d dcn201_dpp_cap +ffffffff832df000 d dcn201_hubp_funcs +ffffffff832e0000 d dcn201_opp_funcs +ffffffff832e1000 d dcn201_tg_funcs +ffffffff832e2000 D dcn201_ip +ffffffff832e21b8 D dcn201_soc +ffffffff832e2b88 d dcn201_res_pool_funcs +ffffffff832e3000 d dcn21_hubp_funcs +ffffffff832e4000 d dcn30_afmt_funcs +ffffffff832e5000 d dcn30_dpp_cap +ffffffff832e5010 d dcn30_dpp_funcs +ffffffff832e6000 d dcn30_hubp_funcs +ffffffff832e7000 d dcn30_tg_funcs +ffffffff832e8000 d dcn30_vpg_funcs +ffffffff832e9000 d res_cap_dcn301 +ffffffff832e9040 d dcn301_res_pool_funcs +ffffffff832ea000 d dcn302_res_pool_funcs +ffffffff832eb000 d dcn303_res_pool_funcs +ffffffff832ec000 d dcn31_afmt_funcs +ffffffff832ed000 d dcn31_apg_funcs +ffffffff832ee000 d dcn31_hpo_dp_link_encoder_funcs +ffffffff832ef000 d dcn31_hubp_funcs +ffffffff832f0000 d dcn31_tg_funcs +ffffffff832f1000 d dcn31_res_pool_funcs +ffffffff832f2000 d dcn31_vpg_funcs +ffffffff832f3000 d dcn314_tg_funcs +ffffffff832f4000 d dcn314_res_pool_funcs +ffffffff832f5000 d dcn315_res_pool_funcs +ffffffff832f6000 d dcn316_res_pool_funcs +ffffffff832f7000 d dcn32_dpp_funcs +ffffffff832f7110 d dcn32_dpp_cap +ffffffff832f8000 d dcn32_hpo_dp_link_encoder_funcs +ffffffff832f9000 d dcn32_hubp_funcs +ffffffff832fa000 d dcn32_tg_funcs +ffffffff832fb000 d dcn32_res_pool_funcs +ffffffff832fc000 d dcn321_res_pool_funcs +ffffffff832fd000 D dcn1_0_ip +ffffffff832fd1b8 D dcn1_0_soc +ffffffff832fe000 D dcn2_0_ip +ffffffff832fe1b8 D dcn2_0_nv14_ip +ffffffff832fe370 D dcn2_0_soc +ffffffff832fed40 D dcn2_0_nv14_soc +ffffffff832ff710 D dcn2_1_ip +ffffffff832ff8c8 D dcn2_1_soc +ffffffff83300298 D ddr4_wm_table_gs +ffffffff83300358 D lpddr4_wm_table_gs +ffffffff83300418 D lpddr4_wm_table_with_disabled_ppt +ffffffff833004d8 D ddr4_wm_table_rn +ffffffff83300598 D ddr4_1R_wm_table_rn +ffffffff83300658 D lpddr4_wm_table_rn +ffffffff83301000 D dcn3_0_ip +ffffffff833011b8 D dcn3_0_soc +ffffffff83302000 D dcn3_01_ip +ffffffff833021b8 D dcn3_01_soc +ffffffff83302b88 D ddr4_wm_table +ffffffff83302c48 D lpddr5_wm_table +ffffffff83303000 D dcn3_02_ip +ffffffff833031b8 D dcn3_02_soc +ffffffff83304000 D dcn3_03_ip +ffffffff833041b8 D dcn3_03_soc +ffffffff83305000 D dcn3_1_ip +ffffffff833051b8 D dcn3_15_ip +ffffffff83305370 D dcn3_16_ip +ffffffff83305528 d dcn3_15_soc +ffffffff83305ef8 d dcn3_1_soc +ffffffff833068c8 d dcn3_16_soc +ffffffff83308000 D dcn3_14_ip +ffffffff833081b8 D dcn3_14_soc +ffffffff83309000 D dcn3_2_ip +ffffffff833091b8 D dcn3_2_soc +ffffffff8330a000 D dcn3_21_ip +ffffffff8330a1b8 D dcn3_21_soc +ffffffff8330b000 d dsc_policy_max_target_bpp_limit +ffffffff8330c000 D DIDTEDCConfig_P12 +ffffffff8330c070 d smu7_profiling +ffffffff8330d000 d cyan_skillfish_table_map +ffffffff8330d080 d cyan_skillfish_message_map +ffffffff8330e000 d navi10_table_map +ffffffff8330e080 d navi10_pwr_src_map +ffffffff8330e090 d navi10_workload_map +ffffffff8330e0d0 d navi10_message_map +ffffffff8330eb20 d navi10_clk_map +ffffffff8330ebe0 d navi10_feature_mask_map +ffffffff8330f000 d sienna_cichlid_message_map +ffffffff8330fa50 d sienna_cichlid_table_map +ffffffff8330fad0 d sienna_cichlid_pwr_src_map +ffffffff8330fae0 d sienna_cichlid_workload_map +ffffffff8330fb20 d sienna_cichlid_clk_map +ffffffff8330fbe0 d sienna_cichlid_feature_mask_map +ffffffff83310000 d vangogh_message_map +ffffffff83310a50 d vangogh_table_map +ffffffff83310ad0 d vangogh_workload_map +ffffffff83310b10 d vangogh_feature_mask_map +ffffffff83311000 d renoir_table_map +ffffffff83311080 d renoir_workload_map +ffffffff833110c0 d renoir_message_map +ffffffff83311b10 d renoir_clk_map +ffffffff83312000 d smu_v13_0_0_message_map +ffffffff83312a50 d smu_v13_0_0_feature_mask_map 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+ffffffff83319000 D amas_cd +ffffffff8331a000 D cardslot_cd +ffffffff8331b000 D cardbus_cd +ffffffff8331c000 d csdevs +ffffffff8331d000 d ral_rt2560_opns +ffffffff8331d028 d ral_rt2661_opns +ffffffff8331d050 d ral_rt2860_opns +ffffffff8331e000 D pcmcia_cd +ffffffff8331f000 D pcmcia_3cxem556_func0 +ffffffff8331f0b8 D pcmcia_3cxem556_func0_cfe0 +ffffffff8331f158 D pcmcia_megahertz_xjem1144_func0 +ffffffff8331f210 D pcmcia_megahertz_xjem1144_func0_cfe0 +ffffffff8331f2b0 d pcmcia_3cxem556_func1 +ffffffff8331f368 d pcmcia_3cxem556_func1_cfe0 +ffffffff8331f408 d pcmcia_megahertz_xjem1144_func1 +ffffffff8331f4c0 d pcmcia_megahertz_xjem1144_func1_cfe0 +ffffffff8331f560 d pcmcia_sierra_a555_func1 +ffffffff8331f618 d pcmcia_sierra_a555_func1_cfe0 +ffffffff8331f6b8 d pcmcia_sveclancard_func0 +ffffffff8331f770 d pcmcia_sveclancard_func0_cfe0 +ffffffff83320000 D ep_pcmcia_prod +ffffffff83321000 D aic_pcmcia_prod +ffffffff83322000 D com_pcmcia_prod +ffffffff83323000 D wdc_pcmcia_pr +ffffffff83324000 D sm_pcmcia_prod +ffffffff83325000 D xe_cd +ffffffff83326000 D pcib_cd +ffffffff83327000 D amdpcib_cd +ffffffff83328000 D tcpcib_cd +ffffffff83329000 D aapic_cd +ffffffff8332a000 D hme_cd +ffffffff8332b000 D isa_cd +ffffffff8332c000 D isadma_cd +ffffffff8332d000 D fdc_cd +ffffffff8332e000 D fd_types +ffffffff8332e1f8 D fd_cd +ffffffff8332f000 D mpu_cd +ffffffff83330000 D pcppi_cd +ffffffff83331000 D spkr_cd +ffffffff83332000 D wbsio_cd +ffffffff83333000 D schsio_cd +ffffffff83334000 D it_cd +ffffffff83335000 D uguru_cd +ffffffff83336000 D aps_cd +ffffffff83337000 D isa_bus_dma_tag +ffffffff83338000 D wsdisplay_cd +ffffffff83338020 D wsdisplay_cons +ffffffff83338058 D wsdisplay_defaultscreens +ffffffff83339000 D wskbd_cd +ffffffff83339020 D wskbd_default_bell_data +ffffffff83339030 D wskbd_default_keyrepeat_data +ffffffff83339040 D wskbd_srcops +ffffffff8333a000 d compose_tab +ffffffff8333b000 D wsmouse_cd +ffffffff8333b020 D wsmouse_srcops +ffffffff8333c000 D wsmux_srcops +ffffffff8333c030 D wsmux_tree_lock +ffffffff8333d000 D vt100_output +ffffffff8333e000 D pckbd_cd +ffffffff8333f000 D pms_cd +ffffffff8333f020 d synaptics_params +ffffffff8333f030 d alps_params +ffffffff83340000 D skgpio_cd +ffffffff83341000 D pctr_conf_lock +ffffffff83342000 D ukbd_keymapdata +ffffffff83343000 D usbrev_str +ffffffff83343030 D usb_cd +ffffffff83344000 d usbd_ratecheck.errinterval +ffffffff83345000 D uhub_cd +ffffffff83346000 D uaudio_cd +ffffffff83347000 D uvideo_ctrls +ffffffff833472d8 D uvideo_cd +ffffffff83348000 D utvfu_norm_params +ffffffff83348030 D utvfu_cd +ffffffff83349000 D udl_reg_vals_640x480_60 +ffffffff83349020 D udl_reg_vals_640x480_67 +ffffffff83349040 D udl_reg_vals_640x480_72 +ffffffff83349060 D udl_reg_vals_640x480_75 +ffffffff83349080 D udl_reg_vals_800x480_61 +ffffffff833490a0 D udl_reg_vals_800x600_56 +ffffffff833490c0 D udl_reg_vals_800x600_60 +ffffffff833490e0 D udl_reg_vals_800x600_72 +ffffffff83349100 D udl_reg_vals_800x600_74 +ffffffff83349120 D udl_reg_vals_800x600_75 +ffffffff83349140 D udl_reg_vals_1024x768_60 +ffffffff83349160 D udl_reg_vals_1024x768_70 +ffffffff83349180 D udl_reg_vals_1024x768_75 +ffffffff833491a0 D udl_reg_vals_1280x800_60 +ffffffff833491c0 D udl_reg_vals_1280x960_60 +ffffffff833491e0 D udl_reg_vals_1280x1024_60 +ffffffff83349200 D udl_reg_vals_1280x1024_75 +ffffffff83349220 D udl_reg_vals_1366x768_60 +ffffffff83349240 D udl_reg_vals_1440x900_60 +ffffffff83349260 D udl_reg_vals_1440x900_59 +ffffffff83349280 D udl_reg_vals_1440x900_75 +ffffffff833492a0 D udl_reg_vals_1680x1050_60 +ffffffff833492c0 D udl_reg_vals_1600x1200_60 +ffffffff833492e0 D udl_reg_vals_1920x1080_60 +ffffffff83349300 D udl_null_key_1 +ffffffff83349310 D udl_decomp_table +ffffffff8334a510 D udl_cd +ffffffff8334a530 D udl_stdscreen +ffffffff8334a560 D udl_scrlist +ffffffff8334a568 D udl_screenlist +ffffffff8334a578 D udl_accessops +ffffffff8334b000 D umidi_cd +ffffffff8334c000 d umq_YAMAHA_YAMAHA_UX256_ANYIFACE +ffffffff8334c020 d umq_ROLAND_ROLAND_UM1_2 +ffffffff8334c040 d umq_ROLAND_ROLAND_SC8850_2 +ffffffff8334c060 d umq_ROLAND_ROLAND_SD90_2 +ffffffff8334c080 d umq_ROLAND_ROLAND_UM880N_0 +ffffffff8334c0a0 d umq_ROLAND_ROLAND_UA100_2 +ffffffff8334c0c0 d umq_ROLAND_ROLAND_UM4_2 +ffffffff8334c0e0 d umq_ROLAND_ROLAND_U8_2 +ffffffff8334c100 d umq_ROLAND_ROLAND_UM2_2 +ffffffff8334c120 d umq_ROLAND_ROLAND_SC8820_2 +ffffffff8334c140 d umq_ROLAND_ROLAND_PC300_2 +ffffffff8334c160 d umq_ROLAND_ROLAND_SK500_2 +ffffffff8334c180 d umq_ROLAND_ROLAND_SCD70_2 +ffffffff8334c1a0 d umq_ROLAND_ROLAND_UM550_0 +ffffffff8334c1c0 d umq_ROLAND_ROLAND_SD20_0 +ffffffff8334c1e0 d umq_ROLAND_ROLAND_SD80_0 +ffffffff8334c200 d umq_ROLAND_ROLAND_UA700_3 +ffffffff8334c220 d umq_ROLAND_ROLAND_UMONE_ANYIFACE +ffffffff8334c240 D umidi_quirklist +ffffffff8334c4a0 d umq_YAMAHA_YAMAHA_UX256_ANYIFACE_fixed_ep_desc +ffffffff8334c4c0 d umq_YAMAHA_YAMAHA_UX256_ANYIFACE_fixed_ep_endpoints +ffffffff8334c4d0 d umq_ROLAND_ROLAND_UM1_2_fixed_ep_desc +ffffffff8334c4f0 d umq_ROLAND_ROLAND_UM1_2_fixed_ep_endpoints +ffffffff8334c500 d umq_ROLAND_ROLAND_SC8850_2_fixed_ep_desc +ffffffff8334c520 d umq_ROLAND_ROLAND_SC8850_2_fixed_ep_endpoints +ffffffff8334c530 d umq_ROLAND_ROLAND_SD90_2_fixed_ep_desc +ffffffff8334c550 d umq_ROLAND_ROLAND_SD90_2_fixed_ep_endpoints +ffffffff8334c560 d umq_ROLAND_ROLAND_UM880N_0_fixed_ep_desc +ffffffff8334c580 d umq_ROLAND_ROLAND_UM880N_0_fixed_ep_endpoints +ffffffff8334c590 d umq_ROLAND_ROLAND_UA100_2_fixed_ep_desc +ffffffff8334c5b0 d umq_ROLAND_ROLAND_UA100_2_fixed_ep_endpoints +ffffffff8334c5c0 d umq_ROLAND_ROLAND_UM4_2_fixed_ep_desc +ffffffff8334c5e0 d umq_ROLAND_ROLAND_UM4_2_fixed_ep_endpoints +ffffffff8334c5f0 d umq_ROLAND_ROLAND_U8_2_fixed_ep_desc +ffffffff8334c610 d umq_ROLAND_ROLAND_U8_2_fixed_ep_endpoints +ffffffff8334c620 d umq_ROLAND_ROLAND_UM2_2_fixed_ep_desc +ffffffff8334c640 d umq_ROLAND_ROLAND_UM2_2_fixed_ep_endpoints +ffffffff8334c650 d umq_ROLAND_ROLAND_SC8820_2_fixed_ep_desc +ffffffff8334c670 d umq_ROLAND_ROLAND_SC8820_2_fixed_ep_endpoints +ffffffff8334c680 d umq_ROLAND_ROLAND_PC300_2_fixed_ep_desc +ffffffff8334c6a0 d umq_ROLAND_ROLAND_PC300_2_fixed_ep_endpoints +ffffffff8334c6b0 d umq_ROLAND_ROLAND_SK500_2_fixed_ep_desc +ffffffff8334c6d0 d umq_ROLAND_ROLAND_SK500_2_fixed_ep_endpoints +ffffffff8334c6e0 d umq_ROLAND_ROLAND_SCD70_2_fixed_ep_desc +ffffffff8334c700 d umq_ROLAND_ROLAND_SCD70_2_fixed_ep_endpoints +ffffffff8334c710 d umq_ROLAND_ROLAND_UM550_0_fixed_ep_desc +ffffffff8334c730 d umq_ROLAND_ROLAND_UM550_0_fixed_ep_endpoints +ffffffff8334c740 d umq_ROLAND_ROLAND_SD20_0_fixed_ep_desc +ffffffff8334c760 d umq_ROLAND_ROLAND_SD20_0_fixed_ep_endpoints +ffffffff8334c770 d umq_ROLAND_ROLAND_SD80_0_fixed_ep_desc +ffffffff8334c790 d umq_ROLAND_ROLAND_SD80_0_fixed_ep_endpoints +ffffffff8334c7a0 d umq_ROLAND_ROLAND_UA700_3_fixed_ep_desc +ffffffff8334c7c0 d umq_ROLAND_ROLAND_UA700_3_fixed_ep_endpoints +ffffffff8334c7d0 d umq_ROLAND_ROLAND_UMONE_ANYIFACE_fixed_ep_desc +ffffffff8334c7f0 d umq_ROLAND_ROLAND_UMONE_ANYIFACE_fixed_ep_endpoints +ffffffff8334d000 D ucom_cd +ffffffff8334e000 D ugen_cd +ffffffff8334f000 D uhidev_cd +ffffffff8334f020 d uhidev_use_rdesc.reportbuf +ffffffff83350000 D uhid_cd +ffffffff83351000 D fido_cd +ffffffff83352000 D ujoy_cd +ffffffff83353000 D ukbd_cd +ffffffff83354000 D ums_cd +ffffffff83354020 d ums_fix_elecom_descriptor.match +ffffffff83355000 D umt_cd +ffffffff83356000 D def_scale +ffffffff83356020 D uts_cd +ffffffff83357000 D ubcmtp_cd +ffffffff83358000 D ucycom_cd +ffffffff83359000 D uslhcom_cd +ffffffff8335a000 D ulpt_fwdevs +ffffffff8335a060 D ulpt_cd +ffffffff8335a080 D ulptusein +ffffffff8335b000 D umass_cd +ffffffff8335b020 d umass_bbb_transfer.dCBWtag +ffffffff8335c000 D uthum_cd +ffffffff8335d000 D ugold_cd +ffffffff8335d020 d cmd_init +ffffffff8335d028 d cmd_type +ffffffff8335d030 d cmd_data +ffffffff8335e000 D utrh_cd +ffffffff8335f000 D uoakrh_cd +ffffffff83360000 D uoaklux_cd +ffffffff83361000 D uoakv_cd +ffffffff83362000 D uonerng_cd +ffffffff83363000 D urng_cd +ffffffff83364000 D udcf_cd +ffffffff83365000 D umbg_cd +ffffffff83366000 D uvisor_cd +ffffffff83367000 D udsbr_cd +ffffffff83368000 D utwitch_cd +ffffffff83369000 D aue_cd +ffffffff8336a000 D axe_cd +ffffffff8336b000 D axen_cd +ffffffff8336c000 D smsc_cd +ffffffff8336d000 D cue_devs +ffffffff8336d010 D cue_cd +ffffffff8336e000 D kue_cd +ffffffff8336f000 D cdce_cd +ffffffff83370000 D urndis_cd +ffffffff83371000 D mos_cd +ffffffff83372000 D mue_cd +ffffffff83373000 D udav_cd +ffffffff83374000 D upl_devs +ffffffff83374008 D upl_cd +ffffffff83375000 D ugl_devs +ffffffff83375008 D ugl_cd +ffffffff83376000 D url_cd +ffffffff83377000 D ure_cd +ffffffff83378000 D uaq_cd +ffffffff83379000 D umodem_cd +ffffffff8337a000 D uftdi_cd +ffffffff8337b000 D uplcom_cd +ffffffff8337c000 D umct_cd +ffffffff8337d000 D uvscom_cd +ffffffff8337e000 D ubsa_cd +ffffffff8337f000 D ukspan_cd +ffffffff83380000 D uslcom_cd +ffffffff83381000 D uark_cd +ffffffff83382000 D moscom_cd +ffffffff83383000 D umcs_cd +ffffffff83384000 D uscom_cd +ffffffff83385000 D ucrcom_cd +ffffffff83386000 D uxrcom_cd +ffffffff83387000 D uipaq_cd +ffffffff83388000 D umsm_cd +ffffffff83389000 D uchcom_cd +ffffffff8338a000 D uticom_cd +ffffffff8338b000 D wi_func_usb +ffffffff8338b060 D wi_usb_cd +ffffffff8338c000 D atu_cd +ffffffff8338c020 D atu_devs +ffffffff8338c270 D atu_radfirm +ffffffff8338d000 D ural_cd +ffffffff8338e000 D rum_cd +ffffffff8338f000 D run_cd +ffffffff8338f020 D rt3070_freqs +ffffffff83390000 D mtw_cd +ffffffff83391000 D zyd_cd +ffffffff83392000 D upgt_cd +ffffffff83393000 D urtw_cd +ffffffff83394000 D urtwn_cd +ffffffff83395000 D rsu_cd +ffffffff83396000 D otus_cd +ffffffff83396020 d AR_PLCP_HDR_INTR +ffffffff83397000 D umb_xfer_tout +ffffffff83397010 D umb_uuid_basic_connect +ffffffff83397020 D umb_uuid_context_internet +ffffffff83397030 D umb_uuid_qmi_mbim +ffffffff83397040 D umb_cd +ffffffff83397060 D umb_delay +ffffffff83397070 D umb_qmi_alloc_cid +ffffffff83397080 D umb_qmi_fcc_auth +ffffffff83398000 D uath_cd +ffffffff83399000 D uow_cd +ffffffff8339a000 D uberry_cd +ffffffff8339b000 D upd_cd +ffffffff8339b020 d upd_usage_roots +ffffffff8339b0a0 d upd_usage_batdep +ffffffff8339c000 D uwacom_cd +ffffffff8339c020 d uwacom_attach.reportbuf +ffffffff8339d000 D bwfm_usb_bus_ops +ffffffff8339e000 D umstc_cd +ffffffff8339f000 D uhidpp_cd +ffffffff833a0000 D ucc_cd +ffffffff833a1000 D iic_cd +ffffffff833a2000 D probe_addrs_sensor +ffffffff833a2008 D probe_addrs_eeprom +ffffffff833a3000 D lmtemp_cd +ffffffff833a4000 D lmn_worklist +ffffffff833a4240 D lmn_cd +ffffffff833a5000 D lmenv_cd +ffffffff833a6000 D maxtmp_cd +ffffffff833a7000 D adc_cd +ffffffff833a8000 D admtemp_cd +ffffffff833a9000 D admlc_cd +ffffffff833aa000 D admtm_cd +ffffffff833ab000 D admtmp_cd +ffffffff833ac000 D admtt_cd +ffffffff833ad000 D maxds_cd +ffffffff833ae000 D adt_chips +ffffffff833ae160 D worklist +ffffffff833ae1a0 D adt_cd +ffffffff833af000 D admcts_cd +ffffffff833b0000 D wbng_cd +ffffffff833b1000 D nvt_cd +ffffffff833b2000 D adl_worklist +ffffffff833b2138 D adl_cd +ffffffff833b3000 D andl_cd +ffffffff833b4000 D sdtemp_cd +ffffffff833b5000 D lisa_cd +ffffffff833b6000 D ihidev_cd +ffffffff833b7000 D ikbd_cd +ffffffff833b8000 D ims_cd +ffffffff833b9000 D imt_cd +ffffffff833ba000 D iatp_cd +ffffffff833bb000 D bgw_cd +ffffffff833bc000 D icc_cd +ffffffff833bd000 D gpio_cd +ffffffff833be000 D acpi_cd +ffffffff833be020 D acpi_pcidevs +ffffffff833be030 D acpi_pcirootdevs +ffffffff833be040 D acpi_taskq +ffffffff833be050 d acpi_indicator.save_led_state +ffffffff833be060 d acpi_getprop.prop_guid +ffffffff833be070 d acpi_getpropint.prop_guid +ffffffff833be080 D acpi_skip_hids +ffffffff833be0f0 D acpi_isa_hids +ffffffff833bf000 D aml_intlen +ffffffff833bf010 D aml_table +ffffffff833bfaf0 d osstring +ffffffff833bfb10 D aml_defobj +ffffffff833bfca0 D aml_valid_osi +ffffffff833bfd78 D acpi_max_osi +ffffffff833bfd80 D aml_regionspace +ffffffff833c1000 D acpitimer_cd +ffffffff833c1020 d acpi_timecounter +ffffffff833c2000 D acpiac_cd +ffffffff833c2020 D acpiac_hids +ffffffff833c3000 D acpibat_cd +ffffffff833c3020 D acpibat_hids +ffffffff833c4000 D acpibtn_cd +ffffffff833c4020 D acpibtn_hids +ffffffff833c5000 D acpicmos_cd +ffffffff833c5020 D acpicmos_hids +ffffffff833c6000 D acpicpu_cd +ffffffff833c6020 D acpicpu_hids +ffffffff833c6030 d acpicpu_set_pdc.cpu_oscuuid +ffffffff833c7000 D acpihpet_cd +ffffffff833c7020 d hpet_timecounter +ffffffff833c8000 D acpiec_cd +ffffffff833c8020 D acpiec_hids +ffffffff833c9000 D acpitz_cd +ffffffff833c9020 D acpitz_perflevel +ffffffff833ca000 D acpimadt_cd +ffffffff833cb000 D acpimcfg_cd +ffffffff833cc000 D acpiprt_map_list +ffffffff833cc010 D acpiprt_cd +ffffffff833cc030 D acpiprt_pri +ffffffff833cd000 D acpidmar_force_cm +ffffffff833cd008 D acpidmar_cd +ffffffff833cd030 D vtd_faults +ffffffff833ce000 D acpidock_cd +ffffffff833cf000 D abl_cd +ffffffff833cf020 D abl_hids +ffffffff833d0000 D asmc_cd +ffffffff833d0020 D asmc_hids +ffffffff833d1000 D acpiasus_cd +ffffffff833d1020 D acpiasus_hids +ffffffff833d2000 D acpithinkpad_cd +ffffffff833d2020 D acpithinkpad_hids +ffffffff833d3000 D acpitoshiba_cd +ffffffff833d3020 D acpitoshiba_hids +ffffffff833d4000 D acpisony_cd +ffffffff833d5000 D acpivideo_cd +ffffffff833d6000 D acpivout_cd +ffffffff833d7000 D acpipwrres_cd +ffffffff833d8000 D aibs_cd +ffffffff833d8020 d aibs_hids +ffffffff833d9000 D aplgpio_cd +ffffffff833d9020 D aplgpio_hids +ffffffff833da000 D bytgpio_cd +ffffffff833da020 D bytgpio_hids +ffffffff833db000 D chvgpio_cd +ffffffff833db020 D chvgpio_hids +ffffffff833dc000 D glkgpio_cd +ffffffff833dc020 D glkgpio_hids +ffffffff833dd000 D pchgpio_cd +ffffffff833dd020 D pchgpio_hids +ffffffff833dd070 D pchgpio_devices +ffffffff833de000 D tipmic_cd +ffffffff833de020 D tipmic_thermal_regmap +ffffffff833de030 D tipmic_power_regmap +ffffffff833df000 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aml_getname.namebuf +ffffffff837241b0 b aml_getname.p +ffffffff837241b8 b global_lock_count +ffffffff837241c0 b aml_eisaid.id +ffffffff837241c8 B aml_global_lock +ffffffff837241d0 b aml_mapresource.map +ffffffff83724210 b aml_val_to_string.buffer +ffffffff83724310 B aml_error +ffffffff83724314 B odp +ffffffff83724318 B maxdp +ffffffff8372431c B aml_busy +ffffffff83725000 B scope +ffffffff83726000 B acpibtn_lids +ffffffff83727000 B cst_stats +ffffffff83728000 B acpihpet_attached +ffffffff83729000 b acpiec_wait.acpiecnowait +ffffffff8372a000 B acpitz_cpu_setperf +ffffffff8372b000 B acpimadt_busses +ffffffff8372e000 B acpimadt_isa_bus +ffffffff8372e030 b lapic_map +ffffffff8372f000 B acpidmar_ddb +ffffffff8372f010 b dmar_bdf.bdf +ffffffff8372f030 B acpidmar_sc +ffffffff8372f038 B domain_map_page +ffffffff8372f040 b dom_bdf.mmm +ffffffff8372f070 b iommu_init.niommu +ffffffff8372f078 b acpidmar_pci_attach.dom +ffffffff8372f080 b sid_flag +ffffffff8376f080 b ivhd_showpage.show +ffffffff8376f084 b ivhd_iommu_init.niommu +ffffffff8376f088 b acpidmar_intr.ofe.0 +ffffffff8376f090 b acpidmar_intr.ofe.1 +ffffffff83770000 b dwiic_i2c_intr_string.irqstr +ffffffff83771000 B acpihve_attached +ffffffff83772000 B efi_jmpbuf +ffffffff83773000 B vm_pool +ffffffff837731a8 B vcpu_pool +ffffffff83773350 B vmm_softc +ffffffff83774000 B l1tf_flush_region +ffffffff83775000 B sdmmc_verbose +ffffffff83776000 B utc_offset +ffffffff83776008 B bufpages +ffffffff83776010 B utsname +ffffffff83777000 B mountroot +ffffffff83778000 B __kernel_bss_end ffffffff83800000 B _end ffffffff83800000 B end