--- 7.3/2023-05-26T22:12:41Z/2023-05-06T00:00:00Z/nm-bsd-ot31.txt Sat May 27 02:02:38 2023 +++ 7.3/2023-05-26T22:12:41Z/2023-05-13T00:00:00Z/nm-bsd-ot31.txt Sat May 27 03:20:26 2023 @@ -2,14 +2,14 @@ 00011006 A mp_pdirpa 0001419d A acpi_pdirpa 01000000 A __kernel_phys_base -02550000 T __kernel_kutext_phys -02554000 C __kernel_cptext_phys -02555000 C __kernel_rodata_phys -02e0c000 R __kernel_kutext_page_phys -02e0e000 C __kernel_randomdata_phys -030d0000 R __kernel_data_phys -03404000 D __kernel_kudata_phys -03405000 C __kernel_bss_phys +02553000 T __kernel_kutext_phys +02557000 C __kernel_cptext_phys +02558000 C __kernel_rodata_phys +02e0f000 R __kernel_kutext_page_phys +02e11000 C __kernel_randomdata_phys +030d3000 R __kernel_data_phys +03407000 D __kernel_kudata_phys +03408000 C __kernel_bss_phys 03800000 B __kernel_phys_end 80000000 A __kernel_virt_to_phys ffffffff80000000 A __kernel_base @@ -4389,24 +4389,24 @@ ffffffff8120fa70 T pf_test_state_icmp ffffffff81212730 T pf_walk_header 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drm_dp_dual_mode_detect -ffffffff8199d4a0 T drm_dp_dual_mode_max_tmds_clock -ffffffff8199d5d0 T drm_dp_dual_mode_get_tmds_output -ffffffff8199d700 T drm_dp_dual_mode_set_tmds_output -ffffffff8199d990 T drm_dp_get_dual_mode_type_name -ffffffff8199da00 T drm_lspcon_get_mode -ffffffff8199dbb0 T drm_lspcon_set_mode -ffffffff8199e000 T drm_dp_channel_eq_ok -ffffffff8199e080 T drm_dp_clock_recovery_ok -ffffffff8199e100 T drm_dp_get_adjust_request_voltage -ffffffff8199e140 T drm_dp_get_adjust_request_pre_emphasis -ffffffff8199e190 T drm_dp_get_adjust_tx_ffe_preset -ffffffff8199e1d0 T drm_dp_128b132b_lane_channel_eq_done -ffffffff8199e250 T drm_dp_128b132b_lane_symbol_locked -ffffffff8199e2c0 T drm_dp_128b132b_eq_interlane_align_done -ffffffff8199e2f0 T drm_dp_128b132b_cds_interlane_align_done -ffffffff8199e320 T drm_dp_128b132b_link_training_failed -ffffffff8199e350 T drm_dp_read_clock_recovery_delay -ffffffff8199e450 T drm_dp_read_channel_eq_delay -ffffffff8199e550 T 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psp_v3_1_ring_create -ffffffff81e952f0 t psp_v3_1_ring_stop -ffffffff81e95510 t psp_v3_1_ring_destroy -ffffffff81e95590 t psp_v3_1_smu_reload_quirk -ffffffff81e955e0 t psp_v3_1_mode1_reset -ffffffff81e956e0 t psp_v3_1_ring_get_wptr -ffffffff81e95730 t psp_v3_1_ring_set_wptr -ffffffff81e96000 t sdma_v2_4_early_init -ffffffff81e960e0 t sdma_v2_4_sw_init -ffffffff81e96470 t sdma_v2_4_sw_fini -ffffffff81e96550 t sdma_v2_4_hw_init -ffffffff81e96910 t sdma_v2_4_hw_fini -ffffffff81e96950 t sdma_v2_4_suspend -ffffffff81e96990 t sdma_v2_4_resume -ffffffff81e969a0 t sdma_v2_4_is_idle -ffffffff81e969e0 t sdma_v2_4_wait_for_idle -ffffffff81e96a80 t sdma_v2_4_soft_reset -ffffffff81e96bc0 t sdma_v2_4_set_clockgating_state -ffffffff81e96bf0 t sdma_v2_4_set_powergating_state -ffffffff81e96c20 t sdma_v2_4_ring_get_rptr -ffffffff81e96c60 t sdma_v2_4_ring_get_wptr -ffffffff81e96cc0 t sdma_v2_4_ring_set_wptr -ffffffff81e96d00 t sdma_v2_4_ring_emit_ib -ffffffff81e96fb0 t sdma_v2_4_ring_emit_fence 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sdma_v3_0_suspend -ffffffff81e997b0 t sdma_v3_0_resume -ffffffff81e997c0 t sdma_v3_0_is_idle -ffffffff81e99800 t sdma_v3_0_wait_for_idle -ffffffff81e998a0 t sdma_v3_0_check_soft_reset -ffffffff81e99900 t sdma_v3_0_pre_soft_reset -ffffffff81e99950 t sdma_v3_0_soft_reset -ffffffff81e99a20 t sdma_v3_0_post_soft_reset -ffffffff81e99a70 t sdma_v3_0_set_clockgating_state -ffffffff81e99cd0 t sdma_v3_0_set_powergating_state -ffffffff81e99d00 t sdma_v3_0_get_clockgating_state -ffffffff81e99d80 t sdma_v3_0_ring_get_rptr -ffffffff81e99dc0 t sdma_v3_0_ring_get_wptr -ffffffff81e99e40 t sdma_v3_0_ring_set_wptr -ffffffff81e99ef0 t sdma_v3_0_ring_emit_ib -ffffffff81e9a1a0 t sdma_v3_0_ring_emit_fence -ffffffff81e9a5a0 t sdma_v3_0_ring_emit_pipeline_sync -ffffffff81e9a820 t sdma_v3_0_ring_emit_vm_flush -ffffffff81e9aaa0 t sdma_v3_0_ring_emit_hdp_flush -ffffffff81e9ad20 t sdma_v3_0_ring_test_ring -ffffffff81e9b000 t sdma_v3_0_ring_test_ib -ffffffff81e9b1e0 t sdma_v3_0_ring_insert_nop -ffffffff81e9b310 t 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T ieee80211_parse_rsn_cipher +ffffffff8140a260 T ieee80211_parse_rsn_akm +ffffffff8140a310 T ieee80211_parse_rsn_body +ffffffff8140a590 T ieee80211_parse_rsn +ffffffff8140a5e0 T ieee80211_parse_wpa +ffffffff8140a640 T ieee80211_save_ie +ffffffff8140a6f0 T ieee80211_recv_probe_resp +ffffffff8140b490 T ieee80211_recv_probe_req +ffffffff8140b750 T ieee80211_recv_auth +ffffffff8140b7f0 T ieee80211_recv_assoc_req +ffffffff8140c1a0 T ieee80211_recv_assoc_resp +ffffffff8140c700 T ieee80211_recv_deauth +ffffffff8140c870 T ieee80211_recv_disassoc +ffffffff8140c980 T ieee80211_recv_addba_req +ffffffff8140cda0 T ieee80211_addba_req_refuse +ffffffff8140ce40 T ieee80211_addba_req_accept +ffffffff8140ced0 T ieee80211_recv_addba_resp +ffffffff8140d070 T ieee80211_addba_resp_refuse +ffffffff8140d0b0 T ieee80211_addba_resp_accept +ffffffff8140d130 T ieee80211_recv_delba +ffffffff8140d2b0 T ieee80211_recv_sa_query_req +ffffffff8140d320 T ieee80211_recv_sa_query_resp +ffffffff8140d390 T ieee80211_recv_action +ffffffff8140d4b0 T ieee80211_recv_mgmt +ffffffff8140d610 T ieee80211_bar_tid +ffffffff8140e000 T ieee80211_node2req +ffffffff8140e370 T ieee80211_req2node +ffffffff8140e480 T ieee80211_disable_wep +ffffffff8140e590 T ieee80211_disable_rsn +ffffffff8140e5f0 T ieee80211_ioctl +ffffffff81410000 T ieee80211_inact_timeout +ffffffff814100a0 T ieee80211_node_cache_timeout +ffffffff814100e0 T ieee80211_clean_nodes +ffffffff81410400 T ieee80211_print_ess +ffffffff814105f0 T ieee80211_print_ess_list +ffffffff81410660 T ieee80211_get_ess +ffffffff814106f0 T ieee80211_del_ess +ffffffff81410850 T ieee80211_add_ess +ffffffff81410ed0 T ieee80211_ess_adjust_rssi +ffffffff81410f40 T ieee80211_ess_calculate_score +ffffffff814110a0 T ieee80211_ess_is_better +ffffffff814111f0 T ieee80211_match_ess +ffffffff814112e0 T ieee80211_switch_ess +ffffffff81411550 T ieee80211_set_ess +ffffffff81411820 T ieee80211_deselect_ess +ffffffff81411880 T ieee80211_node_attach +ffffffff81411a60 T ieee80211_node_alloc +ffffffff81411a80 T ieee80211_node_free +ffffffff81411b30 T ieee80211_node_copy +ffffffff81411ce0 T ieee80211_node_getrssi +ffffffff81411d10 T ieee80211_node_checkrssi +ffffffff81411da0 T ieee80211_set_tim +ffffffff81411e10 T ieee80211_alloc_node_helper +ffffffff81411e90 T ieee80211_node_lateattach +ffffffff81411f50 T ieee80211_node_detach +ffffffff814120d0 T ieee80211_free_allnodes +ffffffff814121f0 T ieee80211_reset_scan +ffffffff81412280 T ieee80211_node_raise_inact +ffffffff814122c0 T ieee80211_begin_scan +ffffffff81412470 T ieee80211_node_cleanup +ffffffff81412520 T ieee80211_iterate_nodes +ffffffff814125b0 T ieee80211_next_scan +ffffffff814126e0 T ieee80211_end_scan +ffffffff81412c40 T ieee80211_create_ibss +ffffffff81413110 T ieee80211_match_bss +ffffffff81413580 T ieee80211_node_free_unref_cb +ffffffff814135f0 T ieee80211_node_tx_stopped +ffffffff81413700 T ieee80211_node_switch_bss +ffffffff814139d0 T ieee80211_node_tx_flushed +ffffffff81413b50 T ieee80211_find_node +ffffffff81413bf0 T ieee80211_node_join_bss +ffffffff81413dd0 T ieee80211_choose_rsnparams +ffffffff81413f00 T ieee80211_node_choose_bss +ffffffff814140f0 T ieee80211_free_node +ffffffff814141f0 T ieee80211_node_cmp +ffffffff81414210 T ieee80211_clean_inactive_nodes +ffffffff814142d0 T ieee80211_get_rate +ffffffff81414330 T ieee80211_ba_del +ffffffff81414420 T ieee80211_node_set_timeouts +ffffffff81414520 T ieee80211_node_addba_request_ac_be_to +ffffffff81414540 T ieee80211_node_addba_request_ac_bk_to +ffffffff81414570 T ieee80211_node_addba_request_ac_vi_to +ffffffff814145a0 T ieee80211_node_addba_request_ac_vo_to +ffffffff814145d0 T ieee80211_setup_node +ffffffff81414760 T ieee80211_alloc_node +ffffffff81414800 T ieee80211_dup_bss +ffffffff814148d0 T ieee80211_find_txnode +ffffffff81414ae0 T ieee80211_find_rxnode +ffffffff81414df0 T ieee80211_node_tx_ba_clear +ffffffff81414e60 T ieee80211_release_node +ffffffff81414ef0 T ieee80211_clean_cached +ffffffff81414f80 T ieee80211_node_leave +ffffffff814151f0 T ieee80211_setup_htcaps +ffffffff814152a0 T ieee80211_clear_htcaps +ffffffff81415320 T ieee80211_setup_htop +ffffffff814153a0 T ieee80211_setup_vhtcaps +ffffffff81415420 T ieee80211_setup_vhtop +ffffffff81415480 T ieee80211_clear_vhtcaps +ffffffff814154d0 T ieee80211_setup_rates +ffffffff81415590 T ieee80211_node_trigger_addba_req +ffffffff814155f0 T ieee80211_node_addba_request +ffffffff81415620 T ieee80211_iserp_sta +ffffffff814157d0 T ieee80211_needs_auth +ffffffff81415800 T ieee80211_node_join_ht +ffffffff81415850 T ieee80211_node_join_rsn +ffffffff81415960 T ieee80211_count_longslotsta +ffffffff814159b0 T ieee80211_count_nonerpsta +ffffffff81415a10 T ieee80211_count_pssta +ffffffff81415a60 T ieee80211_count_rekeysta +ffffffff81415ab0 T ieee80211_node_join_11g +ffffffff81415c40 T ieee80211_node_join +ffffffff81415f40 T ieee80211_node_leave_ht +ffffffff81416070 T ieee80211_node_leave_vht +ffffffff814160c0 T ieee80211_node_leave_rsn +ffffffff81416200 T ieee80211_node_leave_11g +ffffffff81416520 T ieee80211_node_leave_pwrsave +ffffffff814166e0 T ieee80211_ibss_merge +ffffffff814169e0 T ieee80211_notify_dtim +ffffffff81416ac0 T ieee80211_ess_cmp +ffffffff81416ae0 t ieee80211_tree_RBT_COMPARE +ffffffff81416b00 t ieee80211_ess_tree_RBT_COMPARE +ffffffff81417000 T ieee80211_output +ffffffff814170f0 T ieee80211_action_name +ffffffff81417140 T ieee80211_mgmt_output +ffffffff814173a0 T ieee80211_pwrsave +ffffffff814174d0 T ieee80211_up_to_ac +ffffffff81417590 T ieee80211_classify +ffffffff81417680 T ieee80211_can_use_ampdu +ffffffff814176e0 T ieee80211_tx_compressed_bar +ffffffff81417820 T ieee80211_get_compressed_bar +ffffffff814178f0 T ieee80211_encap +ffffffff81417d70 T ieee80211_add_capinfo +ffffffff81417e00 T ieee80211_add_ssid +ffffffff81417e60 T ieee80211_add_rates +ffffffff81417ed0 T ieee80211_add_ds_params +ffffffff81417f30 T ieee80211_add_tim +ffffffff81418090 T ieee80211_add_ibss_params +ffffffff814180c0 T ieee80211_add_edca_params +ffffffff81418240 T ieee80211_add_erp +ffffffff814182e0 T ieee80211_add_qos_capability +ffffffff81418320 T ieee80211_add_wme_info +ffffffff81418360 T ieee80211_add_wme_param +ffffffff814184f0 T ieee80211_add_rsn_body +ffffffff814187d0 T ieee80211_add_rsn +ffffffff81418830 T ieee80211_add_wpa +ffffffff814188a0 T ieee80211_add_xrates +ffffffff81418930 T ieee80211_add_htcaps +ffffffff81418a00 T ieee80211_add_htop +ffffffff81418ad0 T ieee80211_add_vhtcaps +ffffffff81418b70 T ieee80211_add_tie +ffffffff81418bc0 T ieee80211_getmgmt +ffffffff81418c80 T ieee80211_get_probe_req +ffffffff81419030 T ieee80211_get_probe_resp +ffffffff81419590 T ieee80211_get_auth +ffffffff81419620 T ieee80211_get_deauth +ffffffff814196a0 T ieee80211_get_assoc_req +ffffffff81419ba0 T ieee80211_get_assoc_resp +ffffffff81419f60 T ieee80211_get_disassoc +ffffffff81419fe0 T ieee80211_get_addba_req +ffffffff8141a0d0 T ieee80211_output_ba_move_window +ffffffff8141a1c0 T ieee80211_output_ba_move_window_to_first_unacked +ffffffff8141a350 T ieee80211_output_ba_record_ack +ffffffff8141a4a0 T ieee80211_get_addba_resp +ffffffff8141a5a0 T ieee80211_get_delba +ffffffff8141a640 T ieee80211_get_sa_query +ffffffff8141a6d0 T ieee80211_get_action +ffffffff8141a960 T ieee80211_send_mgmt +ffffffff8141ad00 T ieee80211_get_rts +ffffffff8141ad90 T ieee80211_get_cts_to_self +ffffffff8141ae20 T ieee80211_beacon_alloc +ffffffff8141c000 T ieee80211_eapol_key_input +ffffffff8141c210 T ieee80211_recv_eapol_key_req +ffffffff8141c370 T ieee80211_recv_4way_msg3 +ffffffff8141cd10 T ieee80211_recv_4way_msg2or4 +ffffffff8141ce50 T ieee80211_recv_4way_msg1 +ffffffff8141d130 T ieee80211_recv_wpa_group_msg1 +ffffffff8141d460 T ieee80211_recv_rsn_group_msg1 +ffffffff8141d990 T ieee80211_recv_group_msg2 +ffffffff8141dae0 T ieee80211_recv_4way_msg2 +ffffffff8141dcf0 T ieee80211_must_update_group_key +ffffffff8141dd50 T ieee80211_recv_4way_msg4 +ffffffff8141e000 T ieee80211_send_eapol_key +ffffffff8141e220 T ieee80211_eapol_timeout +ffffffff8141e2a0 T ieee80211_send_4way_msg1 +ffffffff8141e560 T ieee80211_send_4way_msg3 +ffffffff8141eab0 T ieee80211_send_group_msg1 +ffffffff8141efd0 T ieee80211_add_gtk_kde +ffffffff8141f090 T ieee80211_add_pmkid_kde +ffffffff8141f0e0 T ieee80211_add_igtk_kde +ffffffff8141f1b0 T ieee80211_get_eapol_key +ffffffff8141f270 T ieee80211_send_4way_msg2 +ffffffff8141f490 T ieee80211_send_4way_msg4 +ffffffff8141f670 T ieee80211_send_group_msg2 +ffffffff8141f850 T ieee80211_send_eapol_key_req +ffffffff81420000 T ieee80211_proto_attach +ffffffff814200b0 T ieee80211_newstate +ffffffff81420d80 T ieee80211_proto_detach +ffffffff81420dc0 T ieee80211_print_essid +ffffffff81420f40 T ieee80211_fix_rate +ffffffff81421380 T ieee80211_reset_erp +ffffffff814214a0 T ieee80211_set_shortslottime +ffffffff81421500 T ieee80211_keyrun +ffffffff81421670 T ieee80211_setkeys +ffffffff814218b0 t ieee80211_node_gtk_rekey +ffffffff81421910 T ieee80211_setkeysdone +ffffffff81421a10 T ieee80211_gtk_rekey_timeout +ffffffff81421a60 T ieee80211_sa_query_timeout +ffffffff81421b30 T ieee80211_sa_query_request +ffffffff81421bb0 T ieee80211_ht_negotiate +ffffffff81421d80 T ieee80211_vht_negotiate +ffffffff81421f90 T ieee80211_tx_ba_timeout +ffffffff814220b0 T ieee80211_delba_request +ffffffff81422230 T ieee80211_rx_ba_timeout +ffffffff814222c0 T ieee80211_addba_request +ffffffff81422490 T ieee80211_auth_open_confirm +ffffffff81422540 T ieee80211_try_another_bss +ffffffff81422650 T ieee80211_auth_open +ffffffff81422950 T ieee80211_set_beacon_miss_threshold +ffffffff814229e0 T ieee80211_stop_ampdu_tx +ffffffff81422af0 T ieee80211_check_wpa_supplicant_failure +ffffffff81422b70 T ieee80211_set_link_state +ffffffff81422c00 T ieee80211_rtm_80211info_task +ffffffff81423000 T ieee80211_ra_get_ht_rateset +ffffffff81423080 T ieee80211_ra_use_ht_sgi +ffffffff81423100 T ieee80211_ra_get_txrate +ffffffff81423190 T ieee80211_ra_next_lower_intra_rate +ffffffff81423330 T ieee80211_ra_next_intra_rate +ffffffff814234c0 T ieee80211_ra_next_rateset +ffffffff814236e0 T ieee80211_ra_best_mcs_in_rateset +ffffffff81423760 T ieee80211_ra_probe_next_rateset +ffffffff81423a20 T ieee80211_ra_next_mcs +ffffffff81423a70 T ieee80211_ra_probe_clear +ffffffff81423ab0 T ieee80211_ra_probe_done +ffffffff81423af0 T ieee80211_ra_intra_mode_ra_finished +ffffffff81423e60 T ieee80211_ra_trigger_next_rateset +ffffffff81423ed0 T ieee80211_ra_inter_mode_ra_finished +ffffffff81423f00 T ieee80211_ra_best_rate +ffffffff81423fa0 T ieee80211_ra_probe_next_rate +ffffffff81424040 T ieee80211_ra_valid_tx_mcs +ffffffff814240c0 T ieee80211_ra_valid_rates +ffffffff81424190 T ieee80211_ra_probe_valid +ffffffff814241e0 T ieee80211_ra_add_stats_ht +ffffffff81424480 T ieee80211_ra_choose +ffffffff814248c0 T ieee80211_ra_node_init +ffffffff81425000 T ieee80211_ra_vht_get_rateset +ffffffff814250a0 T ieee80211_ra_vht_use_sgi +ffffffff814251b0 T ieee80211_ra_vht_get_txrate +ffffffff81425250 T ieee80211_ra_vht_next_lower_intra_rate +ffffffff81425290 T ieee80211_ra_vht_get_max_mcs +ffffffff81425310 T ieee80211_ra_vht_next_intra_rate +ffffffff81425400 T ieee80211_ra_vht_next_rateset +ffffffff81425550 T ieee80211_ra_vht_best_mcs_in_rateset +ffffffff814255f0 T ieee80211_ra_vht_probe_next_rateset +ffffffff814258e0 T ieee80211_ra_vht_next_mcs +ffffffff81425970 T ieee80211_ra_vht_probe_clear +ffffffff814259a0 T ieee80211_ra_vht_probe_done +ffffffff814259f0 T ieee80211_ra_vht_intra_mode_ra_finished +ffffffff81425dc0 T ieee80211_ra_vht_trigger_next_rateset +ffffffff81425e30 T ieee80211_ra_vht_inter_mode_ra_finished +ffffffff81425e60 T ieee80211_ra_vht_best_rate +ffffffff81426120 T ieee80211_ra_vht_probe_next_rate +ffffffff814261d0 T ieee80211_ra_vht_init_valid_rates +ffffffff814263d0 T ieee80211_ra_vht_probe_valid +ffffffff81426420 T ieee80211_ra_vht_add_stats +ffffffff81426710 T ieee80211_ra_vht_choose +ffffffff81426b40 T ieee80211_ra_vht_node_init +ffffffff81427000 T ieee80211_rssadapt_choose +ffffffff814270d0 T ieee80211_rssadapt_updatestats +ffffffff81427150 T ieee80211_rssadapt_input +ffffffff81427190 T ieee80211_rssadapt_lower_rate +ffffffff81427210 T ieee80211_rssadapt_raise_rate +ffffffff81428000 T bsearch +ffffffff814280b0 T ieee80211_regdomain_compare_cn +ffffffff814280d0 T ieee80211_regdomain_compare_rn +ffffffff814280f0 T ieee80211_name2countrycode +ffffffff81428190 T ieee80211_name2regdomain +ffffffff81428230 T ieee80211_countrycode2name +ffffffff814282c0 T ieee80211_regdomain2name +ffffffff81428340 T ieee80211_regdomain2flag +ffffffff81428400 T ieee80211_countrycode2regdomain +ffffffff81429000 T arptimer +ffffffff81429080 T arptfree +ffffffff81429160 T arpinit +ffffffff814291d0 T arp_rtrequest +ffffffff81429610 T arprequest +ffffffff81429750 T arpinvalidate +ffffffff814297b0 T arpreply +ffffffff81429890 T arpresolve +ffffffff81429e90 T arppullup +ffffffff81429f50 T arpinput +ffffffff81429fb0 T arpintr +ffffffff8142a060 T in_arpinput +ffffffff8142a480 T arplookup +ffffffff8142a570 T arpcache +ffffffff8142a8f0 T arpproxy +ffffffff8142a9d0 T revarpinput +ffffffff8142aa20 T in_revarpinput +ffffffff8142aae0 T revarprequest +ffffffff8142ac20 T revarpwhoarewe +ffffffff8142ae10 T revarpwhoami +ffffffff8142b000 T igmp_init +ffffffff8142b090 T rti_fill +ffffffff8142b160 T rti_find +ffffffff8142b240 T rti_delete +ffffffff8142b2d0 T igmp_input +ffffffff8142b3b0 T igmp_input_if +ffffffff8142bc10 T igmp_joingroup +ffffffff8142bd50 T igmp_sendpkt +ffffffff8142bed0 T igmp_leavegroup +ffffffff8142bf50 T igmp_fasttimo +ffffffff8142bfe0 T igmp_checktimer +ffffffff8142c0d0 T igmp_slowtimo +ffffffff8142c130 T igmp_sysctl +ffffffff8142c290 T igmp_sysctl_igmpstat +ffffffff8142d000 T in_canforward +ffffffff8142d060 T in_socktrim +ffffffff8142d0c0 T in_mask2len +ffffffff8142d1a0 T in_len2mask +ffffffff8142d260 T in_nam2sin +ffffffff8142d2c0 T in_sa2sin +ffffffff8142d300 T in_control +ffffffff8142d340 T in_ioctl +ffffffff8142d6b0 T in_ioctl_get +ffffffff8142d820 T in_ioctl_set_ifaddr +ffffffff8142da10 T in_ioctl_change_ifaddr +ffffffff8142de20 T in_scrubhost +ffffffff8142de50 T in_addhost +ffffffff8142de80 T in_ifscrub +ffffffff8142df20 T in_ifinit +ffffffff8142e1c0 T in_purgeaddr +ffffffff8142e2c0 T in_remove_prefix +ffffffff8142e330 T in_insert_prefix +ffffffff8142e3b0 T in_addmulti +ffffffff8142e550 T in_delmulti +ffffffff8142e6a0 T in_broadcast +ffffffff8142e730 T in_hasmulti +ffffffff8142e7d0 T in_ifdetach +ffffffff8142e860 T in_prefixlen2mask +ffffffff8142f000 T in_init +ffffffff8142f060 T in_pcbhash +ffffffff8142f180 T in_pcblhash +ffffffff8142f240 T in_pcbinit +ffffffff8142f2f0 T in_baddynamic +ffffffff8142f360 T in_rootonly +ffffffff8142f3e0 T in_pcballoc +ffffffff8142f560 T in_pcbresize +ffffffff8142f740 T in_pcbhash_insert +ffffffff8142f920 T in_pcbbind +ffffffff8142fc20 T in_pcbaddrisavail +ffffffff8142fe10 T in_pcbpickport +ffffffff81430000 T in_pcbrehash +ffffffff81430090 T in_pcblookup_local +ffffffff81430340 T in_pcbunref +ffffffff81430430 T in_pcbconnect +ffffffff814306a0 T in_pcbselsrc +ffffffff814308d0 T in_pcblookup +ffffffff814309d0 T in_pcbdisconnect +ffffffff81430b10 T in_pcbdetach +ffffffff81430c60 T in_pcbref +ffffffff81430cb0 T in_setsockaddr +ffffffff81430d10 T in_setpeeraddr +ffffffff81430d80 T in_sockaddr +ffffffff81430de0 T in_peeraddr +ffffffff81430e60 T in_pcbnotifyall +ffffffff81430fd0 T in_losing +ffffffff81431060 T in_rtchange +ffffffff814310b0 T in_pcbrtentry +ffffffff81431200 T in_pcbhash_lookup +ffffffff814313b0 T in_pcblookup_listen +ffffffff81432000 T inet_nat64_mask +ffffffff81432060 T inet_nat64 +ffffffff814321f0 T inet_nat64_inet +ffffffff814322b0 T inet_nat64_inet6 +ffffffff81432380 T inet_nat46 +ffffffff81432430 T inet_nat46_inet +ffffffff81432490 T inet_nat46_inet6 +ffffffff81433000 T inet_ntop +ffffffff814330d0 t inet_ntop6 +ffffffff814335c0 T sockaddr_ntop +ffffffff81434000 T divert_attach +ffffffff81434090 T divert_detach +ffffffff814340e0 T divert_lock +ffffffff81434140 T divert_unlock +ffffffff814341a0 T divert_bind +ffffffff814341e0 T divert_shutdown +ffffffff81434220 T divert_send +ffffffff81434260 T divert_init +ffffffff814342b0 T divert_output +ffffffff81434570 T divert_packet +ffffffff81434820 T divert_sysctl_divstat +ffffffff814348f0 T divert_sysctl +ffffffff81435000 T icmp_init +ffffffff81435080 T icmp_mtudisc_timeout +ffffffff81435180 T icmp_do_error +ffffffff81435500 T icmp_ratelimit +ffffffff81435560 T icmp_error +ffffffff814355e0 T icmp_reflect +ffffffff81435930 T icmp_send +ffffffff81435a10 T icmp_input +ffffffff81435ab0 T icmp_input_if +ffffffff81436420 T iptime +ffffffff814364c0 T icmp_sysctl +ffffffff81436670 T icmp_sysctl_icmpstat +ffffffff81436760 T icmp_mtudisc_clone +ffffffff81436910 T icmp_mtudisc +ffffffff81436ae0 T icmp_do_exthdr +ffffffff81437000 T ip_randomid +ffffffff81438000 T ip_init +ffffffff81438280 T ip_ours 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+ffffffff8143c9f0 T del_mfc +ffffffff8143cb70 T set_api_config +ffffffff8143cc10 T ip_mrouter_get +ffffffff8143ccc0 T get_version +ffffffff8143cd00 T get_api_support +ffffffff8143cd50 T get_api_config +ffffffff8143cda0 T mrt_ioctl +ffffffff8143cef0 T get_vif_cnt +ffffffff8143cf80 T get_sg_cnt +ffffffff8143d0a0 T if_lookupbyvif +ffffffff8143d100 T mrt_sysctl_vif +ffffffff8143d270 T mrt_rtwalk_mfcsysctl +ffffffff8143d3b0 T mrt_sysctl_mfc +ffffffff8143d4d0 T mrouter_rtwalk_delete +ffffffff8143d510 T mrt_mcast_del +ffffffff8143d5a0 T vif_delete +ffffffff8143d660 T mfc_expire_route +ffffffff8143d740 T mfc_add_route +ffffffff8143d8c0 T rt_mcast_add +ffffffff8143d9f0 T update_mfc_params +ffffffff8143dd20 T mfc_add +ffffffff8143de30 T socket_send +ffffffff8143deb0 T ip_mforward +ffffffff8143e1e0 T ip_mdq +ffffffff8143f000 T ip_output +ffffffff8143fc20 T ip_insertoptions +ffffffff8143fdd0 T ip_output_ipsec_lookup +ffffffff8143ff30 T in_proto_cksum_out +ffffffff81440160 T ip_mloopback +ffffffff81440210 T ip_output_ipsec_send +ffffffff81440530 T in_ifcap_cksum +ffffffff81440590 T ip_fragment +ffffffff81440b20 T ip_output_ipsec_pmtu_update +ffffffff81440c20 T ip_optcopy +ffffffff81440d50 T ip_ctloutput +ffffffff81441600 T ip_pcbopts +ffffffff81441840 T ip_setmoptions +ffffffff81441dc0 T ip_getmoptions +ffffffff81441f20 T ip_multicast_if +ffffffff81442000 T ip_freemoptions +ffffffff81442090 T in_delayed_cksum +ffffffff81443000 T rip_attach +ffffffff814430f0 T rip_detach +ffffffff81443170 T rip_lock +ffffffff814431d0 T rip_unlock +ffffffff81443230 T rip_bind +ffffffff814432f0 T rip_connect +ffffffff81443370 T rip_disconnect +ffffffff814433e0 T rip_shutdown +ffffffff81443420 T rip_send +ffffffff81443500 T rip_init +ffffffff81443520 T rip_input +ffffffff814438a0 T rip_output +ffffffff81443a90 T rip_chkhdr +ffffffff81443b90 T rip_ctloutput +ffffffff81444000 T tcp_trace +ffffffff81445000 T tcp_reass +ffffffff814453b0 T tcp_flush_queue +ffffffff81445550 T tcp_input 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tcp_sack_output +ffffffff8144d080 T tcp_sack_adjust +ffffffff8144d100 T tcp_output +ffffffff8144eca0 T tcp_setpersist +ffffffff8144ed80 T tcp_chopper +ffffffff81450000 T tcp_init +ffffffff81450170 T tcp6_mtudisc_callback +ffffffff814501d0 T tcp_template +ffffffff81450350 T tcp_respond +ffffffff81450760 T tcp_newtcpcb +ffffffff81450960 T tcp_drop +ffffffff81450a60 T tcp_close +ffffffff81450b90 T tcp_freeq +ffffffff81450c30 T tcp_rscale +ffffffff81450d00 T tcp_notify +ffffffff81450dc0 T tcp6_ctlinput +ffffffff81451090 T tcp_ctlinput +ffffffff81451440 T tcp_mtudisc +ffffffff81451540 T tcp_mtudisc_increase +ffffffff814515c0 T tcp_set_iss_tsm +ffffffff81451740 T tcp_signature_tdb_attach +ffffffff81451770 T tcp_signature_tdb_init +ffffffff81451810 T tcp_signature_tdb_zeroize +ffffffff81451880 T tcp_signature_tdb_input +ffffffff814518d0 T tcp_signature_tdb_output +ffffffff81451910 T tcp_signature_apply +ffffffff81451950 T tcp_signature +ffffffff81452000 T tcp_timer_rexmt +ffffffff81452510 T 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qle_get_port_db +ffffffff81712410 T qle_get_port_name_list +ffffffff81712670 T qle_add_loop_port +ffffffff817128f0 T qle_add_fabric_port +ffffffff81712ab0 T qle_add_logged_in_port +ffffffff81712d00 T qle_handle_resp +ffffffff817130c0 T qle_dump_iocb +ffffffff817130f0 T qle_async +ffffffff81713310 T qle_read +ffffffff81713360 T qle_write +ffffffff817133b0 T qle_clear_isr +ffffffff81713400 T qle_put_marker +ffffffff81713440 T qle_put_cmd +ffffffff817137a0 T qle_write_mbox +ffffffff817137f0 T qle_set_ints +ffffffff81713850 T qle_update_done +ffffffff81713880 T qle_update_cancel +ffffffff817138c0 T qle_update_start +ffffffff81713910 T qle_update_defer +ffffffff81713960 T qle_clear_port_lists +ffffffff81713ac0 T qle_update_topology +ffffffff81713bb0 T qle_update_fabric +ffffffff81713cc0 T qle_ct_pass_through +ffffffff81713fb0 T qle_sge +ffffffff81713ff0 T qle_next_fabric_port +ffffffff81714160 T qle_fabric_plogx +ffffffff817143f0 T qle_fabric_plogi +ffffffff81714560 T qle_fabric_plogo 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mpii_portfacts +ffffffff817184c0 T mpii_target_map +ffffffff817185b0 T mpii_cfg_coalescing +ffffffff81718680 T mpii_eventnotify +ffffffff81718850 T mpii_portenable +ffffffff81718940 T mpii_intr +ffffffff81718c70 T mpii_ioctl +ffffffff81718d80 T mpii_create_sensors +ffffffff81718f10 T mpii_dmamem_free +ffffffff81718fa0 T mpii_get_ccb +ffffffff81719030 T mpii_reply +ffffffff81719100 T mpii_event_process +ffffffff817193f0 T mpii_load_xs_sas3 +ffffffff817195a0 T mpii_load_xs +ffffffff817197a0 T mpii_req_cfg_header +ffffffff81719960 T mpii_req_cfg_page +ffffffff81719b90 T mpii_wait_ne +ffffffff81719c40 T mpii_reset_soft +ffffffff81719d70 T mpii_reset_hard +ffffffff81719fa0 T mpii_handshake_send +ffffffff8171a200 T mpii_handshake_recv_dword +ffffffff8171a370 T mpii_handshake_recv +ffffffff8171a540 T mpii_empty_done +ffffffff8171a570 T mpii_push_reply +ffffffff8171a5f0 T mpii_poll +ffffffff8171a770 T mpii_eventack +ffffffff8171a960 T mpii_eventack_done +ffffffff8171a9e0 T mpii_start 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aq_txring_reset +ffffffff81723ea0 T aq_rxring_reset +ffffffff817243b0 T aq_rx_fill +ffffffff817245b0 T aq_rxeof +ffffffff81724930 T aq_txeof +ffffffff81724b00 T aq_update_link_status +ffffffff81724ba0 T aq_free_slots +ffffffff81724c50 T aq_queue_up +ffffffff817250c0 T aq_dmamem_alloc +ffffffff81725210 T aq_dmamem_free +ffffffff81725280 T aq_queue_down +ffffffff81725560 T aq_invalidate_rx_desc_cache +ffffffff817255e0 T aq_up +ffffffff81725a20 T aq_down +ffffffff81725b70 T aq_rxrinfo +ffffffff81725c60 T aq_iff +ffffffff81726000 T tulip_probe +ffffffff81726060 T tulip_attach +ffffffff81726ab0 T tulip_timeout_callback +ffffffff81726b00 T tulip_timeout +ffffffff81726b70 T tulip_txprobe +ffffffff81726cb0 T tulip_txput +ffffffff81727230 T tulip_media_set +ffffffff81727820 T tulip_reset +ffffffff81727be0 T tulip_mii_autonegotiate +ffffffff81727ee0 T tulip_mii_readreg +ffffffff81728090 T tulip_mii_writereg +ffffffff81728250 T tulip_linkup +ffffffff81728320 T tulip_init +ffffffff817284a0 T tulip_media_print +ffffffff817284f0 T tulip_media_link_monitor +ffffffff81728760 T tulip_mii_map_abilities +ffffffff817287f0 T tulip_media_poll +ffffffff81728ce0 T tulip_mii_phy_readspecific +ffffffff81728ea0 T tulip_media_select +ffffffff81728fb0 T tulip_21040_mediainfo_init +ffffffff817290b0 T tulip_21040_media_probe +ffffffff817291a0 T tulip_21040_10baset_only_media_probe +ffffffff81729260 T tulip_21040_10baset_only_media_select +ffffffff817292c0 T tulip_21040_auibnc_only_media_probe +ffffffff81729350 T tulip_21040_auibnc_only_media_select +ffffffff817293a0 T tulip_21041_mediainfo_init +ffffffff81729460 T tulip_21041_media_probe +ffffffff81729540 T tulip_21041_media_poll +ffffffff81729850 T tulip_mii_get_phyaddr +ffffffff81729910 T tulip_2114x_media_preset +ffffffff81729b30 T tulip_null_media_poll +ffffffff81729b60 T tulip_21140_mediainit +ffffffff81729bb0 T tulip_21140_evalboard_media_probe +ffffffff81729d90 T tulip_21140_accton_media_probe +ffffffff81729fb0 T tulip_21140_smc9332_media_probe +ffffffff8172a1e0 T tulip_21140_cogent_em100_media_probe +ffffffff8172a350 T tulip_21140_znyx_zx34x_media_probe +ffffffff8172a590 T tulip_2114x_media_probe +ffffffff8172a5c0 T tulip_delay_300ns +ffffffff8172a6d0 T tulip_srom_idle +ffffffff8172b070 T tulip_srom_read +ffffffff8172be10 T tulip_mii_writebits +ffffffff8172c3a0 T tulip_mii_turnaround +ffffffff8172cb70 T tulip_mii_readbits +ffffffff8172cf50 T tulip_identify_dec_nic +ffffffff8172d000 T tulip_identify_znyx_nic +ffffffff8172d2d0 T tulip_identify_smc_nic +ffffffff8172d4b0 T tulip_identify_cogent_nic +ffffffff8172d5a0 T tulip_identify_accton_nic +ffffffff8172d6d0 T tulip_identify_asante_nic +ffffffff8172d9a0 T tulip_identify_compex_nic +ffffffff8172daf0 T tulip_srom_decode +ffffffff8172e740 T tulip_read_macaddr +ffffffff8172f100 T tulip_ifmedia_add +ffffffff8172f1f0 T tulip_ifmedia_change +ffffffff8172f3d0 T tulip_ifmedia_status +ffffffff8172f440 T tulip_alloc_rxmap +ffffffff8172f480 T tulip_free_rxmap +ffffffff8172f4c0 T tulip_alloc_txmap +ffffffff8172f500 T tulip_free_txmap +ffffffff8172f540 T tulip_addr_filter +ffffffff8172f850 T tulip_rx_intr +ffffffff8172fe60 T tulip_txput_setup +ffffffff817300f0 T tulip_tx_intr +ffffffff81730510 T tulip_print_abnormal_interrupt +ffffffff81730540 T tulip_intr_handler +ffffffff817308f0 T tulip_ifstart +ffffffff817309c0 T tulip_intr_shared +ffffffff81730a30 T tulip_intr_normal +ffffffff81730a80 T tulip_ifioctl +ffffffff81730b70 T tulip_ifwatchdog +ffffffff81730c70 T tulip_busdma_allocmem +ffffffff81730e00 T tulip_busdma_init +ffffffff81731020 T tulip_initcsrs +ffffffff81731120 T tulip_initring +ffffffff81732000 T ep_pci_match +ffffffff81732030 T ep_pci_attach +ffffffff81733000 T pcn_match +ffffffff81733070 T pcn_attach +ffffffff817337e0 T pcn_tick +ffffffff81733830 T pcn_reset +ffffffff817338a0 T pcn_intr +ffffffff81733ae0 T pcn_ioctl +ffffffff81733c40 T pcn_start +ffffffff81734090 T pcn_watchdog +ffffffff81734100 T pcn_txintr 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+ffffffff81739240 T svwsata_lba48_write_reg +ffffffff81739280 T pciide_pci_read +ffffffff817392d0 T pciide_pci_write +ffffffff81739340 T default_chip_map +ffffffff81739990 T artisea_chip_map +ffffffff81739bf0 T piix_chip_map +ffffffff8173a1e0 T piixsata_chip_map +ffffffff8173a700 T sch_chip_map +ffffffff8173aa20 T amd756_chip_map +ffffffff8173ae30 T ixp_chip_map +ffffffff8173b1a0 T cmd_chip_map +ffffffff8173b300 T cmd0643_9_chip_map +ffffffff8173b600 T cmd680_chip_map +ffffffff8173b7e0 T sii3112_chip_map +ffffffff8173bb60 T sii3114_chip_map +ffffffff8173bf60 T apollo_chip_map +ffffffff8173c5c0 T sata_chip_map +ffffffff8173c7e0 T cy693_chip_map +ffffffff8173cba0 T sis_chip_map +ffffffff8173d2e0 T natsemi_chip_map +ffffffff8173d740 T ns_scx200_chip_map +ffffffff8173dad0 T acer_chip_map +ffffffff8173e150 T hpt_chip_map +ffffffff8173e630 T pdc202xx_chip_map +ffffffff8173eff0 T pdcsata_chip_map +ffffffff8173f770 T acard_chip_map +ffffffff8173f9e0 T serverworks_chip_map +ffffffff8173fcf0 T svwsata_chip_map +ffffffff817400d0 T nforce_chip_map +ffffffff817404f0 T ite_chip_map +ffffffff817407b0 T jmicron_chip_map +ffffffff81740bc0 T phison_chip_map +ffffffff81740ee0 T rdc_chip_map +ffffffff81741330 T pciide_match +ffffffff817413d0 T pciide_attach +ffffffff817414b0 T pciide_detach +ffffffff81741510 T pciide_activate +ffffffff81741c40 T pciide_lookup_product +ffffffff81741ea0 T pciide_dmacmd_read +ffffffff81741ed0 T pciide_dmacmd_write +ffffffff81741f00 T pciide_dmactl_read +ffffffff81741f30 T pciide_dmactl_write +ffffffff81741f60 T pciide_dmatbl_write +ffffffff81741f90 T pciide_mapregs_compat +ffffffff81742110 T pciide_unmapregs_compat +ffffffff817421a0 T pciide_mapregs_native +ffffffff81742490 T pciide_unmapregs_native +ffffffff81742520 T pciide_mapreg_dma +ffffffff817426b0 T pciide_dma_init +ffffffff81742980 T pciide_dma_start +ffffffff81742a00 T pciide_dma_finish +ffffffff81742bd0 T pciide_unmapreg_dma +ffffffff81742c00 T pciide_intr_flag +ffffffff81742e10 T pciide_compat_intr +ffffffff81742e90 T pciide_pci_intr +ffffffff81742f50 T pciide_channel_dma_setup +ffffffff81743020 T pciide_dma_table_setup +ffffffff81743260 T pciide_irqack +ffffffff817432b0 T pciide_chansetup +ffffffff81743390 T pciide_chanfree +ffffffff817433e0 T pciide_mapchan +ffffffff81743470 T pciide_unmap_chan +ffffffff81743540 T pciide_chan_candisable +ffffffff817435b0 T pciide_map_compat_intr +ffffffff81743650 T pciide_unmap_compat_intr +ffffffff817436b0 T pciide_print_channels +ffffffff81743780 T pciide_print_modes +ffffffff81743790 T default_chip_unmap +ffffffff81743870 T sata_setup_channel +ffffffff81743990 T piix_timing_debug +ffffffff817439c0 T piix_setup_channel +ffffffff81743e50 T piix3_4_setup_channel +ffffffff817445f0 T piix_setup_idetim_timings +ffffffff81744660 T piix_setup_idetim_drvs +ffffffff81744780 T piix_setup_sidetim_timings +ffffffff817447f0 T amd756_setup_channel +ffffffff81744ba0 T apollo_setup_channel +ffffffff81744f20 T cmd_channel_map +ffffffff81745290 T cmd_pci_intr +ffffffff81745390 T cmd646_9_irqack +ffffffff81745490 T cmd0643_9_setup_channel +ffffffff817458b0 T cmd680_setup_channel +ffffffff81745db0 T cmd680_channel_map +ffffffff817460e0 T sii_fixup_cacheline +ffffffff817463b0 T sii3112_setup_channel +ffffffff81746570 T sii3112_drv_probe +ffffffff81746990 T sii3114_mapreg_dma +ffffffff81746c70 T sii3114_chansetup +ffffffff81746d40 T sii3114_mapchan +ffffffff81747060 T sii3114_dmacmd_read +ffffffff817470a0 T sii3114_dmacmd_write +ffffffff817470e0 T sii3114_dmactl_read +ffffffff81747120 T sii3114_dmactl_write +ffffffff81747160 T sii3114_dmatbl_write +ffffffff817471a0 T cy693_setup_channel +ffffffff817473c0 T sis_hostbr_match +ffffffff81747490 T sis_south_match +ffffffff817474d0 T sis_setup_channel +ffffffff81747810 T sis96x_setup_channel +ffffffff81747af0 T natsemi_irqack +ffffffff81747b90 T natsemi_setup_channel +ffffffff81747f80 T natsemi_pci_intr +ffffffff81748080 T ns_scx200_setup_channel +ffffffff81748380 T acer_dma_init +ffffffff817483c0 T acer_setup_channel +ffffffff817487c0 T acer_pci_intr +ffffffff817488b0 T hpt_setup_channel +ffffffff81748c00 T hpt_pci_intr +ffffffff81748d10 T pdc268_config_read +ffffffff81748d80 T pdc20268_setup_channel +ffffffff81748f50 T pdc202xx_setup_channel +ffffffff817493a0 T pdc20262_dma_start +ffffffff81749510 T pdc20262_dma_finish +ffffffff817495e0 T pdc20265_pci_intr +ffffffff81749790 T pdc202xx_pci_intr +ffffffff817498a0 T pdc203xx_pci_intr +ffffffff81749990 T pdc205xx_pci_intr +ffffffff81749ac0 T pdc203xx_irqack +ffffffff81749b50 T pdc203xx_setup_channel +ffffffff81749c50 T pdc205xx_do_reset +ffffffff81749cf0 T pdc205xx_drv_probe +ffffffff81749f70 T pdc203xx_dma_start +ffffffff8174a030 T pdc203xx_dma_finish +ffffffff8174a120 T serverworks_setup_channel +ffffffff8174a550 T serverworks_pci_intr +ffffffff8174a660 T svwsata_mapreg_dma +ffffffff8174a710 T svwsata_drv_probe +ffffffff8174a9f0 T svwsata_mapchan +ffffffff8174aae0 T svwsata_dmacmd_read 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cy_pci_attach +ffffffff81750000 T rl_pci_match +ffffffff81750060 T rl_pci_attach +ffffffff81750220 T rl_pci_detach +ffffffff81751000 T re_pci_probe +ffffffff817510a0 T re_pci_attach +ffffffff817513d0 T re_pci_detach +ffffffff81751490 T re_pci_activate +ffffffff81752000 T vr_probe +ffffffff817520f0 T vr_attach +ffffffff81752880 T vr_activate +ffffffff81752900 T vr_mii_readreg +ffffffff81752a70 T vr_mii_writereg +ffffffff81752bd0 T vr_miibus_readreg +ffffffff81752c40 T vr_miibus_writereg +ffffffff81752ca0 T vr_miibus_statchg +ffffffff81752cc0 T vr_setcfg +ffffffff81752ee0 T vr_iff +ffffffff81753060 T vr_reset +ffffffff81753170 T vr_quirks +ffffffff81753270 T vr_dmamem_alloc +ffffffff817533d0 T vr_dmamem_free +ffffffff81753440 T vr_intr +ffffffff81753670 T vr_chipinit +ffffffff81753750 T vr_ioctl +ffffffff817538f0 T vr_start +ffffffff81753ac0 T vr_watchdog +ffffffff81753b50 T vr_wol +ffffffff81753d00 T vr_ifmedia_upd +ffffffff81753d50 T vr_ifmedia_sts +ffffffff81753db0 T vr_tick +ffffffff81753e30 T vr_rxtick +ffffffff81753f10 T vr_stop +ffffffff817541a0 T vr_init +ffffffff81754740 T vr_list_tx_init +ffffffff81754840 T vr_list_rx_init +ffffffff81754a00 T vr_fill_rx_ring +ffffffff81754ad0 T vr_alloc_mbuf +ffffffff81754c40 T vr_rxeof +ffffffff81754ec0 T vr_rxeoc +ffffffff81755050 T vr_txeof +ffffffff81755210 T vr_encap +ffffffff81756000 T txp_probe +ffffffff81756030 T txp_attach +ffffffff817561a0 T txp_attachhook +ffffffff817564c0 T txp_chip_init +ffffffff81756680 T txp_download_fw +ffffffff81756b20 T txp_alloc_rings +ffffffff81757960 T txp_command +ffffffff81757a30 T txp_ifmedia_upd +ffffffff81757b40 T txp_ifmedia_sts +ffffffff81757e30 T txp_ioctl +ffffffff81757f50 T txp_start +ffffffff81758310 T txp_watchdog +ffffffff81758340 T txp_capabilities +ffffffff817584f0 T txp_tick +ffffffff81758640 T txp_intr +ffffffff817588b0 T txp_reset_adapter +ffffffff817589b0 T txp_download_fw_wait +ffffffff81758aa0 T txp_download_fw_section +ffffffff81758e10 T txp_dma_malloc +ffffffff81758fb0 T txp_dma_free +ffffffff81759030 T txp_rx_reclaim +ffffffff81759310 T txp_rxbuf_reclaim +ffffffff81759590 T txp_tx_reclaim +ffffffff81759740 T txp_init +ffffffff81759880 T txp_stop +ffffffff81759980 T txp_set_filter +ffffffff81759b10 T txp_command2 +ffffffff81759df0 T txp_cmd_desc_numfree +ffffffff81759e50 T txp_response +ffffffff8175a120 T txp_rsp_fixup +ffffffff8175a210 T txp_show_descriptor +ffffffff8175b000 T init_audio_devices +ffffffff8175b120 T init_BTSC +ffffffff8175b1e0 T set_audio +ffffffff8175b570 T set_bctv_audio +ffffffff8175b8b0 T msp_autodetect +ffffffff8175bce0 T temp_mute +ffffffff8175bd80 T set_BTSC +ffffffff8175bda0 T bctv_gpio_write +ffffffff8175bf10 T msp_read_id +ffffffff8175bfd0 T dpl_read_id +ffffffff8175c090 T dpl_autodetect +ffffffff8175d000 T writeEEProm +ffffffff8175d030 T readEEProm +ffffffff8175d100 T signCard +ffffffff8175d1b0 T probeCard +ffffffff8175f000 T bktr_name +ffffffff8175f030 T common_bktr_attach +ffffffff8175f330 T common_bktr_intr +ffffffff8175f950 T video_open +ffffffff8175fe10 t set_fps +ffffffff8175ff50 T vbi_open +ffffffff8175fff0 T tuner_open +ffffffff81760040 T video_close +ffffffff81760130 T tuner_close +ffffffff81760160 T vbi_close +ffffffff81760190 T video_read +ffffffff81760350 t start_capture +ffffffff81763290 T vbi_read +ffffffff817633b0 T video_ioctl +ffffffff81764850 T bktr_common_ioctl +ffffffff81765020 T tuner_ioctl +ffffffff81765f70 T i2cWrite +ffffffff81766090 T i2cRead +ffffffff817661b0 T msp_dpl_read +ffffffff81766480 T msp_dpl_write +ffffffff81766640 T msp_dpl_reset +ffffffff81766940 t i2c_write_byte +ffffffff81766b20 t i2c_read_byte +ffffffff81766d40 t split +ffffffff81766f40 t getline +ffffffff81768000 t bktr_probe +ffffffff81768060 t bktr_attach +ffffffff817682e0 T bktr_get_info +ffffffff817683c0 T bktr_set_info +ffffffff81768520 T get_bktr_mem +ffffffff81768750 T free_bktr_mem +ffffffff817687b0 T bktropen +ffffffff81768870 T bktrclose +ffffffff81768900 T bktrread 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em_identify_hardware +ffffffff8176d070 T em_allocate_pci_resources +ffffffff8176d470 T em_allocate_desc_rings +ffffffff8176d580 T em_hardware_init +ffffffff8176d820 T em_kstat_attach +ffffffff8176d970 T em_start +ffffffff8176dc60 T em_encap +ffffffff8176e140 T em_82547_move_tail_locked +ffffffff8176e370 T em_82547_update_fifo_head +ffffffff8176e3c0 T em_ioctl +ffffffff8176e6b0 T em_init +ffffffff8176ea10 T em_get_sffpage +ffffffff8176ead0 T em_disable_intr +ffffffff8176ebd0 T em_iff +ffffffff8176eee0 T em_initialize_receive_unit +ffffffff8176f670 T em_enable_intr +ffffffff8176f7d0 T em_watchdog +ffffffff8176f980 T em_enable_hw_vlans +ffffffff8176fa20 T em_setup_transmit_structures +ffffffff8176fc20 T em_initialize_transmit_unit +ffffffff81770240 T em_setup_receive_structures +ffffffff81770380 T em_setup_queues_msix +ffffffff81770a40 T em_intr +ffffffff81770b40 T em_txeof +ffffffff81770d10 T em_rxeof +ffffffff817711d0 T em_rxrefill +ffffffff817712e0 T em_media_status +ffffffff81771520 T em_flowstatus +ffffffff81771630 T em_media_change +ffffffff81771790 T em_tx_ctx_setup +ffffffff81771920 T em_transmit_checksum_setup +ffffffff81771a00 T em_fill_descriptors +ffffffff81771a80 T em_82547_fifo_workaround +ffffffff81771af0 T em_82547_tx_fifo_reset +ffffffff81771f60 T em_pci_clear_mwi +ffffffff81771f90 T em_pci_set_mwi +ffffffff81771fc0 T em_smartspeed +ffffffff817721c0 T em_kstat_read +ffffffff817725e0 T em_flush_desc_rings +ffffffff81772710 T em_free_transmit_structures +ffffffff817728e0 T em_free_receive_structures +ffffffff81772af0 T em_legacy_irq_quirk_spt +ffffffff81772bd0 T em_allocate_msix +ffffffff81772de0 T em_allocate_legacy +ffffffff81772f00 T em_dma_free +ffffffff81772f70 T em_disable_aspm +ffffffff81773040 T em_dma_malloc +ffffffff817731d0 T em_allocate_transmit_structures +ffffffff817732c0 T em_get_buf +ffffffff81773420 T em_allocate_receive_structures +ffffffff817735f0 T em_rxfill +ffffffff81773740 T em_tbi_adjust_stats +ffffffff81773910 T em_receive_checksum +ffffffff81773980 T em_write_pci_cfg +ffffffff81773a00 T em_read_pci_cfg +ffffffff81773a70 T em_read_pcie_cap_reg +ffffffff81773aa0 T em_flush_tx_ring +ffffffff81773c10 T em_flush_rx_ring +ffffffff81773dd0 T em_queue_intr_msix +ffffffff81773e80 T em_link_intr_msix +ffffffff81773fb0 T em_enable_queue_intr_msix +ffffffff81775000 T em_set_mac_type +ffffffff81775a00 T em_set_sfp_media_type_82575 +ffffffff81775d50 T em_translate_82542_register +ffffffff81775f80 T em_read_sfp_data_byte +ffffffff81776070 T em_set_media_type +ffffffff817762e0 T em_reset_hw +ffffffff81776eb0 T em_disable_pciex_master +ffffffff81776f80 T em_check_phy_reset_block +ffffffff81777040 T em_gate_hw_phy_config_ich8lan +ffffffff817770e0 t em_get_software_flag +ffffffff81777260 T em_hv_phy_workarounds_ich8lan +ffffffff817775f0 T em_lv_phy_workarounds_ich8lan +ffffffff817776f0 t em_phy_init_script +ffffffff81777960 T em_read_eeprom +ffffffff81778040 T em_set_eee_i350 +ffffffff81778160 T em_init_hw +ffffffff81779e00 T em_phy_reset +ffffffff8177a040 T em_clear_vfta_i350 +ffffffff8177a220 T em_read_phy_reg +ffffffff8177a3c0 T em_setup_link +ffffffff8177cc60 T em_enable_tx_pkt_filtering +ffffffff8177d030 T em_clear_hw_cntrs +ffffffff8177d920 T em_write_phy_reg +ffffffff8177dab0 T em_power_up_serdes_link_82575 +ffffffff8177dba0 T em_copper_link_autoneg +ffffffff8177dcd0 T em_phy_setup_autoneg +ffffffff8177de40 T em_copper_link_postconfig +ffffffff8177df10 T em_config_collision_dist +ffffffff8177dfa0 t em_config_mac_to_phy +ffffffff8177e110 t em_config_fc_after_link_up +ffffffff8177e410 t em_config_dsp_after_link_change +ffffffff8177ed00 T em_force_mac_fc +ffffffff8177edd0 T em_check_for_link +ffffffff8177f5c0 T em_get_pcs_speed_and_duplex_82575 +ffffffff8177f680 T em_k1_gig_workaround_hv +ffffffff8177f7b0 T em_link_stall_workaround_hv +ffffffff8177f890 T em_k1_workaround_lv +ffffffff8177f950 T em_k1_workaround_lpt_lp +ffffffff8177fc10 T em_set_eee_pchlan +ffffffff8177fcb0 t em_polarity_reversal_workaround +ffffffff8177fef0 T em_get_speed_and_duplex +ffffffff817803b0 T em_access_phy_wakeup_reg_bm +ffffffff81780510 t em_write_phy_reg_ex +ffffffff81780780 t em_read_phy_reg_ex +ffffffff81780c30 T em_access_phy_debug_regs_hv +ffffffff81780d00 T em_access_phy_reg_hv +ffffffff81780ec0 t em_swfw_sync_acquire +ffffffff81781070 t em_swfw_sync_release +ffffffff817811f0 T em_sgmii_uses_mdio_82575 +ffffffff81781250 T em_read_phy_reg_i2c +ffffffff81781330 T em_write_phy_reg_i2c +ffffffff81781410 T em_phy_hw_reset +ffffffff81781a50 T em_oem_bits_config_pchlan +ffffffff81781c30 T em_initialize_M88E1512_phy +ffffffff81781df0 T em_init_eeprom_params +ffffffff81782330 T em_get_flash_presence_i210 +ffffffff81782390 t em_acquire_eeprom +ffffffff81782580 t em_read_eeprom_ich8 +ffffffff81782750 t em_release_eeprom +ffffffff817828c0 t em_standby_eeprom +ffffffff81782ab0 t em_shift_out_ee_bits +ffffffff81782c50 t em_shift_in_ee_bits +ffffffff81782d90 T em_validate_eeprom_checksum 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ixgb_initialize_transmit_unit +ffffffff81789800 T ixgb_setup_receive_structures +ffffffff81789880 T ixgb_initialize_receive_unit +ffffffff81789b10 T ixgb_intr +ffffffff81789d10 T ixgb_rxeof +ffffffff8178a160 T ixgb_txeof +ffffffff8178a350 T ixgb_media_status +ffffffff8178a440 T ixgb_media_change +ffffffff8178a490 T ixgb_free_transmit_structures +ffffffff8178a5c0 T ixgb_free_receive_structures +ffffffff8178a6f0 T ixgb_allocate_transmit_structures +ffffffff8178a770 T ixgb_transmit_checksum_setup +ffffffff8178a870 T ixgb_get_buf +ffffffff8178aa20 T ixgb_allocate_receive_structures +ffffffff8178abe0 T ixgb_receive_checksum +ffffffff8178ac40 T ixgb_write_pci_cfg +ffffffff8178b000 T ixgb_validate_eeprom_checksum +ffffffff8178b080 T ixgb_read_eeprom +ffffffff8178b2f0 T ixgb_update_eeprom_checksum +ffffffff8178b360 T ixgb_write_eeprom +ffffffff8178b820 t ixgb_shift_out_bits +ffffffff8178b960 T ixgb_get_eeprom_data +ffffffff8178ba00 T ixgb_get_eeprom_word +ffffffff8178bae0 T ixgb_get_ee_mac_addr +ffffffff8178bbd0 T ixgb_get_ee_pba_number +ffffffff8178bc90 T ixgb_get_ee_device_id +ffffffff8178c000 T ixgb_mac_reset +ffffffff8178c1e0 T ixgb_adapter_stop +ffffffff8178c320 T ixgb_init_hw +ffffffff8178c630 T ixgb_init_rx_addrs +ffffffff8178c760 T mac_addr_valid +ffffffff8178c7c0 T ixgb_clear_vfta +ffffffff8178c840 T ixgb_clear_hw_cntrs +ffffffff8178cf20 T ixgb_setup_fc +ffffffff8178d0b0 T ixgb_check_for_link +ffffffff8178d2c0 T ixgb_rar_set +ffffffff8178d330 T ixgb_mc_addr_list_update +ffffffff8178d5b0 T ixgb_write_vfta +ffffffff8178d5e0 T ixgb_read_phy_reg +ffffffff8178dae0 T ixgb_write_phy_reg +ffffffff8178dfd0 T ixgb_check_for_bad_link +ffffffff8178e090 T ixgb_led_on +ffffffff8178e0e0 T ixgb_led_off +ffffffff8178f000 T ixgbe_probe +ffffffff8178f030 T ixgbe_attach +ffffffff8178f5a0 T ixgbe_detach +ffffffff8178f7c0 T ixgbe_activate +ffffffff8178f8d0 T ixgbe_identify_hardware +ffffffff8178f990 T ixgbe_allocate_pci_resources +ffffffff8178fae0 T ixgbe_allocate_queues +ffffffff8178ffe0 T ixgbe_allocate_msix +ffffffff81790220 T ixgbe_allocate_legacy +ffffffff81790340 T ixgbe_setup_interface +ffffffff81790680 T ixgbe_free_transmit_structures +ffffffff81790700 T ixgbe_free_receive_structures +ffffffff817907c0 T ixgbe_free_pci_resources +ffffffff817908a0 T ixgbe_stop +ffffffff81790bc0 T ixgbe_init +ffffffff81791800 T ixgbe_start +ffffffff817919e0 T ixgbe_encap +ffffffff81791ce0 T ixgbe_ioctl +ffffffff81792040 T ixgbe_rxrinfo +ffffffff817921a0 T ixgbe_get_sffpage +ffffffff81792350 T ixgbe_disable_intr +ffffffff81792420 T ixgbe_iff +ffffffff81792590 T ixgbe_enable_intr +ffffffff817926a0 T ixgbe_enable_queues +ffffffff817927b0 T ixgbe_watchdog +ffffffff817929c0 T ixgbe_setup_transmit_structures +ffffffff81792aa0 T ixgbe_initialize_transmit_units +ffffffff81792d60 T ixgbe_setup_receive_structures +ffffffff81792e90 T ixgbe_initialize_receive_units +ffffffff81793370 T ixgbe_config_gpie +ffffffff81793440 T ixgbe_setup_vlan_hw_support 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ixgbe_enable_mc_generic +ffffffff81799b50 T ixgbe_disable_mc_generic +ffffffff81799bb0 T ixgbe_enable_rx_generic +ffffffff81799c70 T ixgbe_disable_rx_generic +ffffffff81799d50 T ixgbe_fc_enable_generic +ffffffff8179a180 T ixgbe_setup_fc_generic +ffffffff8179a450 T ixgbe_fc_autoneg +ffffffff8179a620 T ixgbe_device_supports_autoneg_fc +ffffffff8179a720 T ixgbe_start_hw_gen2 +ffffffff8179a900 T ixgbe_identify_phy +ffffffff8179a960 T ixgbe_set_pci_config_data_generic +ffffffff8179a9e0 T ixgbe_disable_rx +ffffffff8179aa20 T ixgbe_disable_pcie_master +ffffffff8179ab70 T ixgbe_read_eerd_buffer_generic +ffffffff8179acb0 T ixgbe_poll_eerd_eewr_done +ffffffff8179ad50 T ixgbe_write_eewr_buffer_generic +ffffffff8179aed0 T ixgbe_write_eewr_generic +ffffffff8179af20 T ixgbe_acquire_eeprom +ffffffff8179b0a0 T ixgbe_get_eeprom_semaphore +ffffffff8179b2b0 T ixgbe_release_eeprom_semaphore +ffffffff8179b320 T ixgbe_ready_eeprom +ffffffff8179b490 T ixgbe_shift_out_eeprom_bits +ffffffff8179b650 T ixgbe_shift_in_eeprom_bits +ffffffff8179b7b0 T ixgbe_standby_eeprom +ffffffff8179b890 T ixgbe_raise_eeprom_clk +ffffffff8179b900 T ixgbe_lower_eeprom_clk +ffffffff8179b970 T ixgbe_release_eeprom +ffffffff8179ba50 T ixgbe_validate_mac_addr +ffffffff8179bab0 T ixgbe_init_uta_tables +ffffffff8179baf0 T ixgbe_add_uc_addr +ffffffff8179bb60 T ixgbe_mta_vector +ffffffff8179bc10 T ixgbe_set_mta +ffffffff8179bcd0 T ixgbe_negotiate_fc +ffffffff8179bd80 T ixgbe_fc_autoneg_fiber +ffffffff8179beb0 T ixgbe_fc_autoneg_backplane +ffffffff8179c010 T ixgbe_fc_autoneg_copper +ffffffff8179c140 T ixgbe_disable_sec_rx_path_generic +ffffffff8179c200 T ixgbe_enable_sec_rx_path_generic +ffffffff8179c290 T ixgbe_enable_rx +ffffffff8179c2d0 T ixgbe_get_pcie_msix_count_generic +ffffffff8179c350 T ixgbe_insert_mac_addr_generic +ffffffff8179c560 T ixgbe_set_vmdq +ffffffff8179c5a0 T ixgbe_set_rar +ffffffff8179c5f0 T ixgbe_clear_vmdq +ffffffff8179c630 T ixgbe_clear_vmdq_generic +ffffffff8179c7d0 T ixgbe_set_vmdq_generic +ffffffff8179c880 T ixgbe_init_uta_tables_generic +ffffffff8179c900 T ixgbe_find_vlvf_slot +ffffffff8179c9c0 T ixgbe_set_vfta_generic +ffffffff8179cad0 T ixgbe_set_vlvf_generic +ffffffff8179cd60 T ixgbe_clear_vfta_generic +ffffffff8179ce60 T ixgbe_need_crosstalk_fix +ffffffff8179ceb0 T ixgbe_check_mac_link_generic +ffffffff8179d0a0 T ixgbe_get_device_caps_generic +ffffffff8179d0f0 T ixgbe_calculate_checksum +ffffffff8179d1b0 T ixgbe_hic_unlocked +ffffffff8179d390 T ixgbe_host_interface_command +ffffffff8179d560 T ixgbe_clear_tx_pending +ffffffff8179d750 T ixgbe_mng_present +ffffffff8179d7c0 T ixgbe_mng_enabled +ffffffff8179d880 T ixgbe_setup_mac_link_multispeed_fiber +ffffffff8179dc40 T ixgbe_flap_tx_laser +ffffffff8179dc80 T ixgbe_check_link +ffffffff8179dcd0 T ixgbe_set_soft_rate_select_speed +ffffffff8179ddc0 T ixgbe_init_shared_code +ffffffff8179de70 T ixgbe_set_mac_type +ffffffff8179e030 T ixgbe_init_hw +ffffffff8179e070 T ixgbe_get_media_type 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ixgbe_reset_hw_82598 +ffffffff8179f950 T ixgbe_get_media_type_82598 +ffffffff8179fa20 T ixgbe_get_supported_physical_layer_82598 +ffffffff8179fbf0 T ixgbe_read_analog_reg8_82598 +ffffffff8179fcb0 T ixgbe_write_analog_reg8_82598 +ffffffff8179fd30 T ixgbe_set_lan_id_multi_port_pcie_82598 +ffffffff8179fdd0 T ixgbe_enable_rx_dma_82598 +ffffffff8179fe20 T ixgbe_set_vmdq_82598 +ffffffff8179fed0 T ixgbe_clear_vmdq_82598 +ffffffff8179ff80 T ixgbe_set_vfta_82598 +ffffffff817a00b0 T ixgbe_clear_vfta_82598 +ffffffff817a0260 T ixgbe_fc_enable_82598 +ffffffff817a06c0 T ixgbe_read_i2c_eeprom_82598 +ffffffff817a06e0 T ixgbe_check_mac_link_82598 +ffffffff817a0980 T ixgbe_setup_mac_link_82598 +ffffffff817a0b40 T ixgbe_get_link_capabilities_82598 +ffffffff817a0c10 T ixgbe_setup_copper_link_82598 +ffffffff817a0d20 T ixgbe_start_mac_link_82598 +ffffffff817a0e40 T ixgbe_validate_link_ready +ffffffff817a0ef0 T ixgbe_read_i2c_phy_82598 +ffffffff817a2000 T ixgbe_init_mac_link_ops_82599 +ffffffff817a2190 T ixgbe_disable_tx_laser_multispeed_fiber +ffffffff817a2260 T ixgbe_enable_tx_laser_multispeed_fiber +ffffffff817a22e0 T ixgbe_flap_tx_laser_multispeed_fiber +ffffffff817a2420 T ixgbe_setup_mac_link_82599 +ffffffff817a26b0 T ixgbe_set_hard_rate_select_speed +ffffffff817a2770 T ixgbe_verify_lesm_fw_enabled_82599 +ffffffff817a2830 T ixgbe_setup_mac_link_smartspeed +ffffffff817a2bb0 T ixgbe_init_phy_ops_82599 +ffffffff817a2d00 T ixgbe_read_i2c_byte_82599 +ffffffff817a2e80 T ixgbe_write_i2c_byte_82599 +ffffffff817a3000 T ixgbe_setup_copper_link_82599 +ffffffff817a3060 T ixgbe_setup_sfp_modules_82599 +ffffffff817a3220 T prot_autoc_read_82599 +ffffffff817a3330 T prot_autoc_write_82599 +ffffffff817a34a0 T ixgbe_reset_pipeline_82599 +ffffffff817a37e0 T ixgbe_init_ops_82599 +ffffffff817a39c0 T ixgbe_identify_phy_82599 +ffffffff817a3a50 T ixgbe_reset_hw_82599 +ffffffff817a3fa0 T ixgbe_get_media_type_82599 +ffffffff817a40d0 T ixgbe_get_supported_physical_layer_82599 +ffffffff817a42a0 T ixgbe_enable_rx_dma_82599 +ffffffff817a4310 T ixgbe_read_analog_reg8_82599 +ffffffff817a43d0 T ixgbe_write_analog_reg8_82599 +ffffffff817a4450 T ixgbe_start_hw_82599 +ffffffff817a4550 T ixgbe_get_link_capabilities_82599 +ffffffff817a4690 T ixgbe_stop_mac_link_on_d3_82599 +ffffffff817a4750 T ixgbe_read_eeprom_82599 +ffffffff817a4780 T ixgbe_start_mac_link_82599 +ffffffff817a4960 T ixgbe_verify_fw_version_82599 +ffffffff817a5000 T ixgbe_init_ops_X540 +ffffffff817a5220 T ixgbe_init_eeprom_params_X540 +ffffffff817a52b0 T ixgbe_read_eerd_X540 +ffffffff817a5340 T ixgbe_write_eewr_X540 +ffffffff817a53d0 T ixgbe_update_eeprom_checksum_X540 +ffffffff817a54a0 T ixgbe_validate_eeprom_checksum_X540 +ffffffff817a5590 T ixgbe_calc_eeprom_checksum_X540 +ffffffff817a5730 T ixgbe_reset_hw_X540 +ffffffff817a5ac0 T ixgbe_get_media_type_X540 +ffffffff817a5af0 T ixgbe_get_supported_physical_layer_X540 +ffffffff817a5b70 T ixgbe_start_hw_X540 +ffffffff817a5bc0 T ixgbe_acquire_swfw_sync_X540 +ffffffff817a6010 T ixgbe_release_swfw_sync_X540 +ffffffff817a6140 T ixgbe_init_swfw_sync_X540 +ffffffff817a6220 T ixgbe_setup_mac_link_X540 +ffffffff817a6240 T ixgbe_blink_led_start_X540 +ffffffff817a6360 T ixgbe_blink_led_stop_X540 +ffffffff817a6460 T ixgbe_get_link_capabilities_X540 +ffffffff817a64a0 T ixgbe_update_flash_X540 +ffffffff817a6680 T ixgbe_poll_flash_update_done_X540 +ffffffff817a6710 T ixgbe_get_swfw_sync_semaphore +ffffffff817a68a0 T ixgbe_release_swfw_sync_semaphore +ffffffff817a7000 T ixgbe_init_ops_X550 +ffffffff817a7110 T ixgbe_dmac_config_X550 +ffffffff817a71f0 T ixgbe_dmac_config_tcs_X550 +ffffffff817a7340 T ixgbe_dmac_update_tcs_X550 +ffffffff817a7400 T ixgbe_set_source_address_pruning_X550 +ffffffff817a74f0 T ixgbe_init_eeprom_params_X550 +ffffffff817a7570 T ixgbe_calc_eeprom_checksum_X550 +ffffffff817a7590 T ixgbe_read_ee_hostif_X550 +ffffffff817a7660 T ixgbe_write_ee_hostif_X550 +ffffffff817a7720 T ixgbe_update_eeprom_checksum_X550 +ffffffff817a78b0 T ixgbe_validate_eeprom_checksum_X550 +ffffffff817a7a00 T ixgbe_disable_rx_x550 +ffffffff817a7b20 T ixgbe_led_on_t_X550em +ffffffff817a7be0 T ixgbe_led_off_t_X550em +ffffffff817a7ca0 T ixgbe_read_cs4227 +ffffffff817a7cd0 T ixgbe_write_cs4227 +ffffffff817a7d00 T ixgbe_read_pe +ffffffff817a7d50 T ixgbe_write_pe +ffffffff817a7db0 T ixgbe_reset_cs4227 +ffffffff817a8040 T ixgbe_check_cs4227 +ffffffff817a81f0 T ixgbe_setup_mux_ctl +ffffffff817a8280 T ixgbe_identify_phy_x550em +ffffffff817a84a0 T ixgbe_read_mng_if_sel_x550em +ffffffff817a8520 T ixgbe_fw_phy_activity +ffffffff817a8640 T ixgbe_get_phy_id_fw +ffffffff817a8750 T ixgbe_identify_phy_fw +ffffffff817a87a0 T ixgbe_shutdown_fw_phy +ffffffff817a8800 T ixgbe_read_phy_reg_x550em +ffffffff817a8830 T ixgbe_write_phy_reg_x550em +ffffffff817a8860 T ixgbe_init_ops_X550EM +ffffffff817a8b10 T ixgbe_get_bus_info_X550em +ffffffff817a8b60 T ixgbe_get_media_type_X550em +ffffffff817a8c50 T ixgbe_setup_sfp_modules_X550em +ffffffff817a8de0 T ixgbe_get_link_capabilities_X550em +ffffffff817a8eb0 T ixgbe_reset_hw_X550em +ffffffff817a9530 T ixgbe_get_supported_physical_layer_X550em +ffffffff817a96b0 T ixgbe_setup_fc_X550em +ffffffff817a9810 T ixgbe_init_phy_ops_X550em +ffffffff817a9ce0 T ixgbe_setup_fw_link +ffffffff817a9e10 T ixgbe_fc_autoneg_fw +ffffffff817a9e40 T ixgbe_setup_eee_fw +ffffffff817a9ea0 T ixgbe_init_ops_X550EM_a +ffffffff817a9fd0 T ixgbe_read_iosf_sb_reg_x550 +ffffffff817aa150 T ixgbe_write_iosf_sb_reg_x550 +ffffffff817aa2d0 T ixgbe_read_iosf_sb_reg_x550a +ffffffff817aa370 T ixgbe_write_iosf_sb_reg_x550a +ffffffff817aa400 T ixgbe_acquire_swfw_sync_X550a +ffffffff817aa540 T ixgbe_release_swfw_sync_X550a +ffffffff817aa5e0 T ixgbe_fc_autoneg_fiber_x550em_a +ffffffff817aa620 T ixgbe_fc_autoneg_backplane_x550em_a +ffffffff817aa780 T ixgbe_setup_fc_backplane_x550em_a +ffffffff817aa970 T ixgbe_fc_autoneg_sgmii_x550em_a +ffffffff817aaa60 T ixgbe_init_ops_X550EM_x +ffffffff817aab20 T ixgbe_acquire_swfw_sync_X550em +ffffffff817aabe0 T ixgbe_release_swfw_sync_X550em +ffffffff817aac70 T ixgbe_iosf_wait +ffffffff817aad20 T ixgbe_get_phy_token +ffffffff817aada0 T ixgbe_put_phy_token +ffffffff817aae20 T ixgbe_supported_sfp_modules_X550em +ffffffff817aaea0 T ixgbe_identify_sfp_module_X550em +ffffffff817aaf20 T ixgbe_init_mac_link_ops_X550em +ffffffff817ab060 T ixgbe_restart_an_internal_phy_x550em +ffffffff817ab170 T ixgbe_setup_sgmii +ffffffff817ab410 T ixgbe_setup_sgmii_fw +ffffffff817ab6f0 T ixgbe_setup_mac_link_sfp_x550a +ffffffff817ab8e0 T ixgbe_setup_mac_link_sfp_x550em +ffffffff817ab9a0 T ixgbe_setup_mac_link_t_X550em +ffffffff817aba50 T ixgbe_check_link_t_X550em +ffffffff817abb30 T ixgbe_get_lasi_ext_t_x550em +ffffffff817abcb0 T ixgbe_enable_lasi_ext_t_x550em +ffffffff817abe40 T ixgbe_setup_kr_speed_x550em +ffffffff817ac050 T ixgbe_reset_phy_fw +ffffffff817ac120 T ixgbe_check_overtemp_fw +ffffffff817ac1b0 T ixgbe_read_phy_reg_x550a +ffffffff817ac250 T ixgbe_write_phy_reg_x550a +ffffffff817ac300 T ixgbe_setup_kr_x550em +ffffffff817ac370 T ixgbe_setup_internal_phy_t_x550em +ffffffff817ac500 T ixgbe_enter_lplu_t_x550em +ffffffff817ac7f0 T ixgbe_handle_lasi_ext_t_x550em +ffffffff817ac870 T ixgbe_reset_phy_t_X550em +ffffffff817ac8c0 T ixgbe_set_mdio_speed +ffffffff817ac9a0 T ixgbe_init_ext_t_x550em +ffffffff817aca50 T ixgbe_setup_sfi_x550a +ffffffff817acc00 T ixgbe_setup_ixfi_x550em_x +ffffffff817acde0 T ixgbe_setup_ixfi_x550em +ffffffff817acfc0 T ixgbe_ext_phy_t_x550em_get_link +ffffffff817ad050 T ixgbe_setup_phy_loopback_x550em +ffffffff817ad240 T ixgbe_read_ee_hostif_buffer_X550 +ffffffff817ad3d0 T ixgbe_write_ee_hostif_data_X550 +ffffffff817ad440 T ixgbe_checksum_ptr_x550 +ffffffff817ad5d0 T ixgbe_calc_checksum_X550 +ffffffff817ad760 T ixgbe_update_flash_X550 +ffffffff817ad7b0 T ixgbe_get_lcd_t_x550em +ffffffff817ad870 T ixgbe_set_mux +ffffffff817ae000 T ixgbe_read_i2c_combined_generic_int +ffffffff817ae260 T ixgbe_i2c_start +ffffffff817ae3c0 T ixgbe_clock_in_i2c_byte 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+ffffffff817afa00 T ixgbe_read_i2c_eeprom_generic +ffffffff817afa30 T ixgbe_write_i2c_eeprom_generic +ffffffff817afa50 T ixgbe_identify_module_generic +ffffffff817afac0 T ixgbe_read_i2c_byte_generic_unlocked +ffffffff817afae0 T ixgbe_write_i2c_byte_generic_unlocked +ffffffff817afb00 T ixgbe_tn_check_overtemp +ffffffff817afb70 T ixgbe_check_reset_blocked +ffffffff817afbd0 T ixgbe_validate_phy_addr +ffffffff817afc40 T ixgbe_get_phy_id +ffffffff817afcf0 T ixgbe_get_phy_type_from_id +ffffffff817afdb0 T ixgbe_get_copper_link_capabilities_generic +ffffffff817afea0 T ixgbe_get_copper_speeds_supported +ffffffff817aff60 T ixgbe_check_phy_link_tnx +ffffffff817b0220 T ixgbe_setup_phy_link_tnx +ffffffff817b04d0 T ixgbe_get_phy_firmware_version_tnx +ffffffff817b0500 T ixgbe_reset_phy_nl +ffffffff817b07a0 T ixgbe_get_sfp_init_sequence_offsets +ffffffff817b0980 T ixgbe_is_sfp +ffffffff817b09d0 T ixgbe_identify_sfp_module_generic +ffffffff817b0dc0 T ixgbe_identify_qsfp_module_generic +ffffffff817b10b0 T ixgbe_get_supported_phy_sfp_layer_generic +ffffffff817b1250 T ixgbe_is_sfp_probe +ffffffff817b12a0 T ixgbe_read_i2c_byte_generic_int +ffffffff817b14a0 T ixgbe_clock_out_i2c_byte +ffffffff817b1600 T ixgbe_get_i2c_ack +ffffffff817b1800 T ixgbe_write_i2c_byte_generic_int +ffffffff817b1930 T ixgbe_set_i2c_data +ffffffff817b1ae0 T ixgbe_raise_i2c_clk +ffffffff817b1c00 T ixgbe_lower_i2c_clk +ffffffff817b1c90 T ixgbe_clock_in_i2c_bit +ffffffff817b1e60 T ixgbe_get_i2c_data +ffffffff817b1f10 T ixgbe_set_copper_phy_power +ffffffff817b2000 t ixl_match +ffffffff817b20a0 t ixl_attach +ffffffff817b4c40 t ixl_710_rd_ctl +ffffffff817b4dd0 t ixl_710_wr_ctl +ffffffff817b4f80 t ixl_710_set_rss_key +ffffffff817b5100 t ixl_710_set_rss_lut +ffffffff817b5180 t ixl_wakeup +ffffffff817b51a0 t ixl_722_rd_ctl +ffffffff817b51d0 t ixl_722_wr_ctl +ffffffff817b5200 t ixl_722_set_rss_key +ffffffff817b5230 t ixl_722_set_rss_lut +ffffffff817b5260 t ixl_dmamem_alloc +ffffffff817b53c0 t ixl_arq +ffffffff817b55d0 t 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xge_setup_xgxs_herc +ffffffff817bbec0 T xge_alloc_txmem +ffffffff817bc0d0 T xge_alloc_rxmem +ffffffff817bc3b0 T xge_add_rxbuf +ffffffff817bc5a0 T xge_xgmii_mediachange +ffffffff817bc5d0 T xge_ifmedia_status +ffffffff817bc650 T xge_ioctl +ffffffff817bc8e0 T xge_start +ffffffff817bcc50 T xge_intr +ffffffff817bd210 T xge_enable +ffffffff817bd2c0 T xge_init +ffffffff817bd750 T xge_stop +ffffffff817bd820 T xge_setpromisc +ffffffff817bd8a0 T xge_setmulti +ffffffff817be000 T thtc_match +ffffffff817be060 T thtc_attach +ffffffff817be280 T tht_match +ffffffff817be2b0 T tht_attach +ffffffff817be4d0 T thtc_lookup +ffffffff817be550 T tht_intr +ffffffff817be720 T thtc_print +ffffffff817be790 T tht_sw_reset +ffffffff817bec80 T tht_lladdr_read +ffffffff817bed30 T tht_ioctl +ffffffff817beec0 T tht_start +ffffffff817bf490 T tht_watchdog +ffffffff817bf4c0 T tht_media_change +ffffffff817bf4f0 T tht_media_status +ffffffff817bf5e0 T tht_mountroot +ffffffff817bf7b0 T tht_fifo_alloc +ffffffff817bf8c0 T tht_fw_load +ffffffff817bfc20 T tht_fifo_free +ffffffff817bfcd0 T tht_link_state +ffffffff817bfd80 T tht_write +ffffffff817bfdd0 T tht_read +ffffffff817bfe00 T tht_rxd +ffffffff817c0200 T tht_rxf_fill +ffffffff817c07a0 T tht_txf +ffffffff817c0aa0 T tht_up +ffffffff817c1170 T tht_down +ffffffff817c17a0 T tht_iff +ffffffff817c1970 T tht_pkt_alloc +ffffffff817c1bc0 T tht_lladdr_write +ffffffff817c1c80 T tht_pkt_free +ffffffff817c1d50 T tht_write_region +ffffffff817c1da0 T tht_fifo_writable +ffffffff817c1e10 T tht_fifo_readable +ffffffff817c1e80 T tht_rxf_drain +ffffffff817c1f90 T tht_fifo_pre +ffffffff817c1fe0 T tht_pkt_get +ffffffff817c2060 T tht_load_pkt +ffffffff817c21a0 T tht_pkt_put +ffffffff817c2210 T tht_fifo_write +ffffffff817c22c0 T tht_fifo_write_dmap +ffffffff817c23f0 T tht_fifo_write_pad +ffffffff817c24d0 T tht_fifo_post +ffffffff817c2590 T tht_fifo_read +ffffffff817c2630 T tht_pkt_used +ffffffff817c2660 T tht_dmamem_alloc +ffffffff817c27e0 T tht_dmamem_free +ffffffff817c2860 T tht_wait_eq +ffffffff817c2930 T tht_wait_ne +ffffffff817c3000 T myx_match +ffffffff817c3030 T myx_attach +ffffffff817c32a0 T myx_mcl_small +ffffffff817c3300 T myx_refill +ffffffff817c3360 T myx_mcl_big +ffffffff817c3410 T myx_query +ffffffff817c3710 T myx_pcie_dc +ffffffff817c37f0 T myx_attachhook +ffffffff817c3b00 T myx_ether_aton +ffffffff817c3bc0 T myx_read +ffffffff817c3bf0 T myx_loadfirmware +ffffffff817c3e00 T myx_write +ffffffff817c3e60 T myx_boot +ffffffff817c4000 T myx_dmamem_alloc +ffffffff817c4160 T myx_cmd +ffffffff817c42b0 T myx_probe_firmware +ffffffff817c46a0 T myx_intr +ffffffff817c4930 T myx_kstat_attach +ffffffff817c4bc0 T myx_ioctl +ffffffff817c4e80 T myx_start +ffffffff817c5350 T myx_watchdog +ffffffff817c5380 T myx_media_change +ffffffff817c53b0 T myx_media_status +ffffffff817c54f0 T myx_dmamem_free +ffffffff817c5560 T myx_rdma +ffffffff817c56d0 T myx_link_state +ffffffff817c5750 T myx_up +ffffffff817c67c0 T myx_down +ffffffff817c6f00 T myx_rxrinfo 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oce_init_stats +ffffffff817ca510 T oce_init_queues +ffffffff817ca690 T oce_attach_ifp +ffffffff817ca780 T oce_tick +ffffffff817ca7d0 T oce_refill_rx +ffffffff817ca860 T oce_attachhook +ffffffff817caa00 T oce_dma_free +ffffffff817caab0 T oce_get_link_status +ffffffff817cac30 T oce_first_mcc +ffffffff817cad20 T oce_media_change +ffffffff817cad50 T oce_media_status +ffffffff817cae80 T oce_ioctl +ffffffff817cb020 T oce_start +ffffffff817cb120 T oce_watchdog +ffffffff817cb180 T oce_init +ffffffff817cb660 T oce_stop +ffffffff817cb9a0 T oce_rxrinfo +ffffffff817cbae0 T oce_iff +ffffffff817cbc20 T oce_update_mcast +ffffffff817cbd90 T oce_set_promisc +ffffffff817cbe30 T oce_link_status +ffffffff817cbed0 T oce_update_stats +ffffffff817cbfb0 T oce_macaddr_set +ffffffff817cc210 T oce_config_vlan +ffffffff817cc430 T oce_set_flow_control +ffffffff817cc650 T oce_new_rq +ffffffff817cc9c0 T oce_alloc_rx_bufs +ffffffff817ccb10 T oce_drain_eq +ffffffff817ccc30 T oce_cmd +ffffffff817cce80 T oce_drain_rq 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cas_intr +ffffffff817d7650 T cas_config +ffffffff817d7d60 T cas_reset +ffffffff817d7e20 T cas_start +ffffffff817d7f70 T cas_ioctl +ffffffff817d80c0 T cas_watchdog +ffffffff817d8110 T cas_mii_readreg +ffffffff817d81e0 T cas_mii_writereg +ffffffff817d82d0 T cas_mii_statchg +ffffffff817d8390 T cas_mediachange +ffffffff817d83f0 T cas_mediastatus +ffffffff817d8450 T cas_mifinit +ffffffff817d84b0 T cas_pcs_readreg +ffffffff817d8540 T cas_pcs_writereg +ffffffff817d8690 T cas_tick +ffffffff817d8860 T cas_bitwait +ffffffff817d8910 T cas_reset_rx +ffffffff817d8ab0 T cas_reset_tx +ffffffff817d8c50 T cas_rxdrain +ffffffff817d8c80 T cas_stop +ffffffff817d8dd0 T cas_disable_rx +ffffffff817d8e90 T cas_disable_tx +ffffffff817d8f50 T cas_meminit +ffffffff817d9110 T cas_ringsize +ffffffff817d91f0 T cas_cringsize +ffffffff817d92e0 T cas_init +ffffffff817d9760 T cas_init_regs +ffffffff817d9c00 T cas_iff +ffffffff817d9f90 T cas_rint +ffffffff817da4c0 T cas_add_rxbuf +ffffffff817da5c0 T cas_eint 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ehci_sb700_match +ffffffff817e75d0 T ehci_pci_takecontroller +ffffffff817e8000 T xhci_pci_match +ffffffff817e8040 T xhci_pci_attach +ffffffff817e83a0 T xhci_pci_detach +ffffffff817e8440 T xhci_pci_activate +ffffffff817e8520 T xhci_pci_takecontroller +ffffffff817e9000 T pcicbbmatch +ffffffff817e9040 T pccbbattach +ffffffff817e9390 T pccbbactivate +ffffffff817e97e0 T cb_chipset +ffffffff817e9a60 T pccbb_shutdown +ffffffff817e9b60 T pccbb_power +ffffffff817e9d00 T pccbbintr +ffffffff817e9ed0 T pccbb_legacy_disable +ffffffff817e9f30 T pci113x_insert +ffffffff817e9ff0 T pccbb_pci_callback +ffffffff817ea320 T pccbb_chipinit +ffffffff817ea790 T pccbb_pcmcia_attach_setup +ffffffff817ea8f0 T cbbprint +ffffffff817ea920 T pccbb_pcmcia_read +ffffffff817ea950 T pccbb_pcmcia_write +ffffffff817ea980 T pccbb_checksockstat +ffffffff817eaa50 T pccbbintr_function +ffffffff817eab10 T pccbb_ctrl +ffffffff817eac50 T pccbb_detect_card +ffffffff817eacc0 T cb_detect_voltage +ffffffff817ead10 T cb_reset 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iwm_init_reorder_buffer +ffffffff8182b0f0 T iwm_clear_reorder_buffer +ffffffff8182b1b0 T iwm_rx_ba_session_expired +ffffffff8182b2b0 T iwm_reorder_timer_expired +ffffffff8182b470 T iwm_release_frames +ffffffff8182b660 T iwm_sta_rx_agg +ffffffff8182bb60 T iwm_send_cmd_pdu_status +ffffffff8182bbf0 T iwm_mac_ctxt_task +ffffffff8182bd50 T iwm_mac_ctxt_cmd +ffffffff8182bf50 T iwm_updateprot +ffffffff8182c010 T iwm_add_task +ffffffff8182c080 T iwm_updateslot +ffffffff8182c140 T iwm_updateedca +ffffffff8182c200 T iwm_phy_ctxt_task +ffffffff8182c3d0 T iwm_phy_ctxt_update +ffffffff8182c540 T iwm_setrates +ffffffff8182c6d0 T iwm_updatechan +ffffffff8182c790 T iwm_updatedtim +ffffffff8182c850 T iwm_sta_tx_agg +ffffffff8182cd60 T iwm_flush_sta +ffffffff8182cf00 T iwm_txq_advance +ffffffff8182d0f0 T iwm_clear_oactive +ffffffff8182d170 T iwm_ba_task +ffffffff8182d3c0 T iwm_ampdu_rx_start +ffffffff8182d4a0 T iwm_ampdu_rx_stop +ffffffff8182d580 T iwm_ampdu_tx_start +ffffffff8182d6a0 T iwm_ampdu_tx_stop +ffffffff8182d780 T iwm_set_hw_address_8000 +ffffffff8182da00 T iwm_parse_nvm_data +ffffffff8182dc50 T iwm_parse_nvm_sections +ffffffff8182dd50 T iwm_nvm_init +ffffffff8182e010 T iwm_firmware_load_sect +ffffffff8182e0c0 T iwm_firmware_load_chunk +ffffffff8182e370 T iwm_load_firmware_7000 +ffffffff8182e5c0 T iwm_load_cpu_sections_8000 +ffffffff8182e960 T iwm_load_firmware_8000 +ffffffff8182eb70 T iwm_load_firmware +ffffffff8182ec50 T iwm_start_fw +ffffffff8182ee20 T iwm_send_tx_ant_cfg +ffffffff8182eeb0 T iwm_send_phy_cfg_cmd +ffffffff8182ef60 T iwm_send_dqa_cmd +ffffffff8182eff0 T iwm_load_ucode_wait_alive +ffffffff8182f230 T iwm_save_fw_paging +ffffffff8182f2a0 T iwm_send_paging_cmd +ffffffff8182f3f0 T iwm_free_fw_paging +ffffffff8182f560 T iwm_run_init_mvm_ucode +ffffffff8182f9b0 T iwm_send_bt_init_conf +ffffffff8182fa50 T iwm_sf_config +ffffffff8182fca0 T iwm_config_ltr +ffffffff8182fd60 T iwm_get_signal_strength +ffffffff8182fdc0 T iwm_rxmq_get_signal_strength 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iwm_get_vht_ctrl_pos +ffffffff818328e0 T iwm_phy_ctxt_cmd_uhb +ffffffff81832b10 T iwm_phy_ctxt_cmd +ffffffff81832c60 T iwm_update_sched +ffffffff81832d30 T iwm_send_cmd_status +ffffffff81832e50 T iwm_cmd_done +ffffffff81832ff0 T iwm_tx_fill_cmd +ffffffff81833420 T iwm_rval2ridx +ffffffff818334b0 T iwm_tx +ffffffff81833ed0 T iwm_flush_tx_path +ffffffff81833fa0 T iwm_wait_tx_queues_empty +ffffffff81834060 T iwm_led_enable +ffffffff81834090 T iwm_led_disable +ffffffff818340c0 T iwm_led_is_enabled +ffffffff81834120 T iwm_led_blink_timeout +ffffffff818341a0 T iwm_led_blink_start +ffffffff818341f0 T iwm_led_blink_stop +ffffffff81834240 T iwm_beacon_filter_send_cmd +ffffffff818342d0 T iwm_beacon_filter_set_cqm_params +ffffffff81834310 T iwm_update_beacon_abort +ffffffff81834400 T iwm_power_build_cmd +ffffffff81834490 T iwm_power_mac_update_mode +ffffffff818346a0 T iwm_power_update_device +ffffffff81834740 T iwm_enable_beacon_filter +ffffffff81834830 T iwm_disable_beacon_filter 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iwm_bgscan +ffffffff818373d0 T iwm_bgscan_done +ffffffff81837470 T iwm_bgscan_done_task +ffffffff818376d0 T iwm_umac_scan_abort +ffffffff81837760 T iwm_lmac_scan_abort +ffffffff81837800 T iwm_auth +ffffffff81837c00 T iwm_deauth +ffffffff81837f60 T iwm_run +ffffffff81838640 T iwm_allow_mcast +ffffffff81838740 T iwm_run_stop +ffffffff81838db0 T iwm_node_alloc +ffffffff81838dd0 T iwm_set_key_v1 +ffffffff81838f10 T iwm_set_key +ffffffff81839180 T iwm_delete_key_v1 +ffffffff818392b0 T iwm_delete_key +ffffffff81839520 T iwm_calib_timeout +ffffffff818395e0 T iwm_set_rate_table_vht +ffffffff81839900 T iwm_set_rate_table +ffffffff81839d00 T iwm_media_change +ffffffff81839ef0 T iwm_stop +ffffffff8183a390 T iwm_init +ffffffff8183a650 T iwm_newstate_task +ffffffff8183a7d0 T iwm_newstate +ffffffff8183a930 T iwm_endscan +ffffffff8183a980 T iwm_fill_sf_command +ffffffff8183aa80 T iwm_send_soc_conf +ffffffff8183abc0 T iwm_send_update_mcc_cmd +ffffffff8183ad80 T iwm_send_temp_report_ths_cmd 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T iwx_store_cscheme +ffffffff81840170 T iwx_ctxt_info_alloc_dma +ffffffff81840210 T iwx_dma_contig_alloc +ffffffff818403f0 T iwx_ctxt_info_free_paging +ffffffff81840550 T iwx_dma_contig_free +ffffffff81840610 T iwx_get_num_sections +ffffffff81840690 T iwx_init_fw_sec +ffffffff81840b40 T iwx_fw_version_str +ffffffff81840b80 T iwx_alloc_fw_monitor_block +ffffffff81840c30 T iwx_alloc_fw_monitor +ffffffff81840cf0 T iwx_apply_debug_destination +ffffffff81841230 T iwx_nic_lock +ffffffff81841380 T iwx_write_prph +ffffffff81841420 T iwx_set_bits_prph +ffffffff81841440 T iwx_clear_bits_prph +ffffffff81841460 T iwx_read_prph +ffffffff81841500 T iwx_nic_unlock +ffffffff818415b0 T iwx_set_ltr +ffffffff81841700 T iwx_ctxt_info_init +ffffffff818419c0 T iwx_ctxt_info_free_fw_img +ffffffff81841b40 T iwx_ctxt_info_gen3_init +ffffffff81842130 T iwx_write_umac_prph +ffffffff818421e0 T iwx_firmware_store_section +ffffffff81842280 T iwx_set_default_calib +ffffffff818422d0 T iwx_fw_info_free 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iwx_enable_fwload_interrupt +ffffffff81844d20 T iwx_restore_interrupts +ffffffff81844d50 T iwx_disable_interrupts +ffffffff81844e10 T iwx_ict_reset +ffffffff81844fd0 T iwx_set_hw_ready +ffffffff818451b0 T iwx_prepare_card_hw +ffffffff818452f0 T iwx_force_power_gating +ffffffff818453a0 T iwx_apm_config +ffffffff81845470 T iwx_apm_init +ffffffff818456d0 T iwx_apm_stop +ffffffff81845a90 T iwx_init_msix_hw +ffffffff81845b30 T iwx_conf_msix_hw +ffffffff818460d0 T iwx_clear_persistence_bit +ffffffff81846250 T iwx_start_hw +ffffffff81846650 T iwx_stop_device +ffffffff81846bc0 T iwx_nic_config +ffffffff81846c50 T iwx_nic_rx_init +ffffffff81846cb0 T iwx_nic_init +ffffffff81846dd0 T iwx_enable_txq +ffffffff818470a0 T iwx_send_cmd +ffffffff81847680 T iwx_free_resp +ffffffff81847700 T iwx_disable_txq +ffffffff81847960 T iwx_post_alive +ffffffff818479f0 T iwx_schedule_session_protection +ffffffff81847ac0 T iwx_send_cmd_pdu +ffffffff81847b40 T iwx_unprotect_session +ffffffff81847c10 T iwx_fw_valid_tx_ant +ffffffff81847c50 T iwx_fw_valid_rx_ant +ffffffff81847ca0 T iwx_init_channel_map +ffffffff81847ea0 T iwx_mimo_enabled +ffffffff81847ee0 T iwx_setup_ht_rates +ffffffff81847f90 T iwx_setup_vht_rates +ffffffff81848020 T iwx_init_reorder_buffer +ffffffff81848080 T iwx_clear_reorder_buffer +ffffffff81848140 T iwx_rx_ba_session_expired +ffffffff81848240 T iwx_rx_bar_frame_release +ffffffff818482f0 T iwx_release_frames +ffffffff818484e0 T iwx_reorder_timer_expired +ffffffff818486a0 T iwx_find_rxba_data +ffffffff81848730 T iwx_sta_rx_agg_baid_cfg_cmd +ffffffff81848980 T iwx_send_cmd_pdu_status +ffffffff81848a10 T iwx_sta_rx_agg_sta_cmd +ffffffff81848c60 T iwx_sta_rx_agg +ffffffff81848f30 T iwx_mac_ctxt_task +ffffffff818490c0 T iwx_mac_ctxt_cmd +ffffffff818492a0 T iwx_phy_ctxt_task +ffffffff81849460 T iwx_phy_ctxt_update +ffffffff818498c0 T iwx_updatechan +ffffffff81849980 T iwx_add_task +ffffffff818499f0 T iwx_updateprot +ffffffff81849ab0 T iwx_updateslot +ffffffff81849b70 T iwx_updateedca +ffffffff81849c30 T iwx_updatedtim +ffffffff81849cf0 T iwx_sta_tx_agg_start +ffffffff81849ee0 T iwx_ba_task +ffffffff8184a030 T iwx_ampdu_rx_start +ffffffff8184a110 T iwx_ampdu_rx_stop +ffffffff8184a1f0 T iwx_ampdu_tx_start +ffffffff8184a300 T iwx_set_mac_addr_from_csr +ffffffff8184a520 T iwx_flip_hw_address +ffffffff8184a570 T iwx_is_valid_mac_addr +ffffffff8184a610 T iwx_nvm_get +ffffffff8184a8e0 T iwx_load_firmware +ffffffff8184aac0 T iwx_start_fw +ffffffff8184aca0 T iwx_pnvm_handle_section +ffffffff8184af90 T iwx_ctxt_info_gen3_set_pnvm +ffffffff8184afe0 T iwx_pnvm_parse +ffffffff8184b0d0 T iwx_load_pnvm +ffffffff8184b470 T iwx_send_tx_ant_cfg +ffffffff8184b500 T iwx_send_phy_cfg_cmd +ffffffff8184b5b0 T iwx_send_dqa_cmd +ffffffff8184b640 T iwx_load_ucode_wait_alive +ffffffff8184b700 T iwx_run_init_mvm_ucode +ffffffff8184b950 T iwx_config_ltr +ffffffff8184ba10 T iwx_update_rx_desc +ffffffff8184bab0 T iwx_rxmq_get_signal_strength +ffffffff8184bb00 T iwx_rx_rx_phy_cmd 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iwx_tx_fill_cmd +ffffffff8184e3f0 T iwx_rval2ridx +ffffffff8184e480 T iwx_tx +ffffffff8184eb80 T iwx_flush_sta_tids +ffffffff8184ed30 T iwx_wait_tx_queues_empty +ffffffff8184edf0 T iwx_drain_sta +ffffffff8184ef90 T iwx_flush_sta +ffffffff8184f2f0 T iwx_beacon_filter_send_cmd +ffffffff8184f380 T iwx_update_beacon_abort +ffffffff8184f490 T iwx_power_build_cmd +ffffffff8184f520 T iwx_power_mac_update_mode +ffffffff8184f740 T iwx_power_update_device +ffffffff8184f7e0 T iwx_enable_beacon_filter +ffffffff8184f8f0 T iwx_disable_beacon_filter +ffffffff8184f9e0 T iwx_add_sta_cmd +ffffffff8184fce0 T iwx_rm_sta_cmd +ffffffff8184fda0 T iwx_rm_sta +ffffffff81850210 T iwx_disable_mgmt_queue +ffffffff818502f0 T iwx_umac_scan_fill_channels +ffffffff81850430 T iwx_fill_probe_req +ffffffff81850670 T iwx_config_umac_scan_reduced +ffffffff818507d0 T iwx_scan_umac_flags_v2 +ffffffff81850810 T iwx_scan_umac_dwell_v10 +ffffffff81850880 T iwx_scan_umac_fill_general_p_v10 +ffffffff81850910 T iwx_scan_umac_fill_ch_p_v6 +ffffffff81850a50 T iwx_umac_scan_v14 +ffffffff81850d40 T iwx_mcc_update +ffffffff81850dd0 T iwx_ridx2rate +ffffffff81850e40 T iwx_ack_rates +ffffffff81851100 T iwx_mac_ctxt_cmd_common +ffffffff81851410 T iwx_mac_ctxt_cmd_fill_sta +ffffffff818514a0 T iwx_clear_statistics +ffffffff81851580 T iwx_del_task +ffffffff818515e0 T iwx_scan +ffffffff81851780 T iwx_scan_abort +ffffffff81851830 T iwx_bgscan +ffffffff818518b0 T iwx_bgscan_done +ffffffff81851950 T iwx_bgscan_done_task +ffffffff81851ac0 T iwx_umac_scan_abort +ffffffff81851b50 T iwx_enable_mgmt_queue +ffffffff81851be0 T iwx_rs_rval2idx +ffffffff81851c50 T iwx_rs_ht_rates +ffffffff81851d20 T iwx_rs_vht_rates +ffffffff81851de0 T iwx_rs_init_v3 +ffffffff81852210 T iwx_rs_init_v4 +ffffffff81852650 T iwx_rs_init +ffffffff818526b0 T iwx_rs_update +ffffffff81852950 T iwx_phy_send_rlc +ffffffff81852a40 T iwx_auth +ffffffff81853030 T iwx_deauth +ffffffff818532d0 T iwx_run +ffffffff81853960 T iwx_sf_config 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vmxnet3_stop +ffffffff818b7270 T vmxnet3_reset +ffffffff818b72b0 t vmx_kstat_create +ffffffff818b7490 t vmx_kstat_read +ffffffff818b8000 T vmwpvs_match +ffffffff818b8040 T vmwpvs_attach +ffffffff818b8df0 T vmwpvs_scsi_cmd +ffffffff818b9260 T vmwpvs_intx +ffffffff818b92e0 T vmwpvs_msg_task +ffffffff818b9560 T vmwpvs_intr +ffffffff818b9740 T vmwpvs_get_config +ffffffff818b9940 T vmwpvs_dmamem_zalloc +ffffffff818b99a0 T vmwpvs_dmamem_alloc +ffffffff818b9b20 T vmwpvs_ccb_put +ffffffff818b9b80 T vmwpvs_setup_rings +ffffffff818b9cb0 T vmwpvs_setup_msg_ring +ffffffff818b9da0 T vmwpvs_ccb_get +ffffffff818b9e20 T vmwpvs_dmamem_free +ffffffff818b9ea0 T vmwpvs_cmd +ffffffff818b9f50 T vmwpvs_scsi_cmd_done +ffffffff818ba130 T vmwpvs_scsi_cmd_poll +ffffffff818bb000 T lii_match +ffffffff818bb030 T lii_attach +ffffffff818bb440 T lii_activate +ffffffff818bb540 T lii_reset +ffffffff818bb810 T lii_spi_configure +ffffffff818bb900 T lii_eeprom_present +ffffffff818bb990 T lii_eeprom_read +ffffffff818bb9c0 T lii_spi_read +ffffffff818bbc80 T lii_read_macaddr +ffffffff818bbdf0 T lii_intr +ffffffff818bbf00 T lii_alloc_rings +ffffffff818bc110 T lii_tick +ffffffff818bc160 T lii_mii_readreg +ffffffff818bc400 T lii_mii_writereg +ffffffff818bc6a0 T lii_mii_statchg +ffffffff818bc710 T lii_media_change +ffffffff818bc760 T lii_media_status +ffffffff818bc7c0 T lii_ioctl +ffffffff818bc950 T lii_start +ffffffff818bcb00 T lii_watchdog +ffffffff818bcb40 T lii_stop +ffffffff818bcbb0 T lii_init +ffffffff818bd0b0 T lii_iff +ffffffff818bd1f0 T lii_tx_put +ffffffff818bd300 T lii_free_tx_space +ffffffff818bd340 T lii_rxintr +ffffffff818bd4f0 T lii_txintr +ffffffff818be000 T ichiic_match +ffffffff818be030 T ichiic_attach +ffffffff818be220 T ichiic_intr +ffffffff818be330 T ichiic_i2c_acquire_bus +ffffffff818be380 T ichiic_i2c_release_bus +ffffffff818be3d0 T ichiic_i2c_exec +ffffffff818bf000 T viapm_match +ffffffff818bf030 T viapm_attach +ffffffff818bf650 T viapm_intr +ffffffff818bf760 T viapm_i2c_acquire_bus +ffffffff818bf7b0 T viapm_i2c_release_bus +ffffffff818bf800 T viapm_i2c_exec +ffffffff818bfb20 T viapm_refresh_sensor_data +ffffffff818bfe50 T viapm_refresh +ffffffff818bfe80 T val_to_uK +ffffffff818bff20 T val_to_rpm +ffffffff818bff60 T val_to_uV +ffffffff818c0000 T viapm_get_timecount +ffffffff818c1000 T amdiic_match +ffffffff818c1030 T amdiic_attach +ffffffff818c1200 T amdiic_intr +ffffffff818c12d0 T amdiic_i2c_acquire_bus +ffffffff818c1320 T amdiic_i2c_release_bus +ffffffff818c1370 T amdiic_i2c_exec +ffffffff818c15d0 T amdiic_read +ffffffff818c1740 T amdiic_wait +ffffffff818c17e0 T amdiic_write +ffffffff818c2000 T nviic_match +ffffffff818c2030 T nviic_attach +ffffffff818c2280 T nviic_i2c_acquire_bus +ffffffff818c22d0 T nviic_i2c_release_bus +ffffffff818c2310 T nviic_i2c_exec +ffffffff818c2530 T nviic_write +ffffffff818c2580 T nviic_read +ffffffff818c3000 T sdhc_pci_match +ffffffff818c3060 T sdhc_pci_attach +ffffffff818c33a0 T sdhc_pci_activate +ffffffff818c3400 T sdhc_takecontroller +ffffffff818c34a0 T sdhc_ricohfix +ffffffff818c3610 T sdhc_pci_conf_write +ffffffff818c4000 T kate_match +ffffffff818c4170 T kate_attach +ffffffff818c4420 T kate_refresh +ffffffff818c5000 T km_match +ffffffff818c5050 T km_attach +ffffffff818c50f0 T km_refresh +ffffffff818c6000 T ksmn_match +ffffffff818c6050 T ksmn_attach +ffffffff818c6230 T ksmn_ccd_attach +ffffffff818c6380 T ksmn_refresh +ffffffff818c64d0 T ksmn_read_reg +ffffffff818c7000 t iosf_pci_match +ffffffff818c7060 t iosf_pci_attach +ffffffff818c7100 t iosf_pci_mbi_mdr_rd +ffffffff818c7160 t iosf_pci_mbi_mdr_wr +ffffffff818c8000 T itherm_probe +ffffffff818c8030 T itherm_attach +ffffffff818c8380 T itherm_activate +ffffffff818c8400 T itherm_enable +ffffffff818c8460 T itherm_refresh +ffffffff818c8470 T itherm_refresh_sensor_data +ffffffff818c8860 T itherm_bias_temperature_sensor +ffffffff818c9000 T pchtemp_match +ffffffff818c9030 T pchtemp_attach +ffffffff818c9190 T pchtemp_refresh +ffffffff818ca000 T rtsx_pci_match +ffffffff818ca090 T rtsx_pci_attach +ffffffff818cb000 T xspd_match +ffffffff818cb030 T xspd_attach +ffffffff818cb1f0 T xspd_intr +ffffffff818cc000 T virtio_pci_match +ffffffff818cc080 T virtio_pci_attach +ffffffff818cc430 T virtio_pci_detach +ffffffff818cc510 T virtio_pci_kick +ffffffff818cc570 T virtio_pci_read_device_config_1 +ffffffff818cc5a0 T virtio_pci_read_device_config_2 +ffffffff818cc5d0 T virtio_pci_read_device_config_4 +ffffffff818cc600 T virtio_pci_read_device_config_8 +ffffffff818cc680 T virtio_pci_write_device_config_1 +ffffffff818cc6b0 T virtio_pci_write_device_config_2 +ffffffff818cc6e0 T virtio_pci_write_device_config_4 +ffffffff818cc710 T virtio_pci_write_device_config_8 +ffffffff818cc780 T virtio_pci_read_queue_size +ffffffff818cc7f0 T virtio_pci_setup_queue +ffffffff818ccae0 T virtio_pci_set_status +ffffffff818ccb60 T virtio_pci_negotiate_features +ffffffff818ccca0 T virtio_pci_poll_intr +ffffffff818ccd10 T virtio_pci_find_cap +ffffffff818cced0 T virtio_pci_attach_10 +ffffffff818cd310 T virtio_pci_attach_09 +ffffffff818cd450 T virtio_pci_adjust_config_region +ffffffff818cd4f0 T virtio_pci_setup_msix +ffffffff818cd850 T virtio_pci_legacy_intr +ffffffff818cd8f0 T virtio_pci_legacy_intr_mpsafe +ffffffff818cd980 T virtio_pci_free_irqs +ffffffff818cdbd0 T virtio_pci_negotiate_features_10 +ffffffff818cde10 T virtio_pci_msix_establish +ffffffff818cdee0 T virtio_pci_set_msix_queue_vector +ffffffff818cdf60 T virtio_pci_set_msix_config_vector +ffffffff818cdfa0 T virtio_pci_config_intr +ffffffff818cdfe0 T virtio_pci_shared_queue_intr +ffffffff818cdff0 T virtio_pci_queue_intr +ffffffff818cf000 T dwiic_pci_match +ffffffff818cf030 T dwiic_pci_attach +ffffffff818cf350 T dwiic_pci_activate +ffffffff818cf3c0 T dwiic_pci_bus_scan +ffffffff818d0000 T bwfm_pci_buscore_read +ffffffff818d0060 T bwfm_pci_buscore_write +ffffffff818d00d0 T bwfm_pci_buscore_prepare +ffffffff818d0100 T bwfm_pci_buscore_reset +ffffffff818d02f0 T bwfm_pci_buscore_activate +ffffffff818d0320 T bwfm_pci_preinit +ffffffff818d1440 T bwfm_pci_stop +ffffffff818d14d0 T bwfm_pci_txcheck +ffffffff818d1590 T bwfm_pci_txdata +ffffffff818d18f0 T bwfm_pci_msgbuf_query_dcmd +ffffffff818d1d30 T bwfm_pci_msgbuf_set_dcmd +ffffffff818d1d80 T bwfm_pci_match +ffffffff818d1db0 T bwfm_pci_attach +ffffffff818d2020 T bwfm_pci_detach +ffffffff818d2060 T bwfm_pci_activate +ffffffff818d2210 T bwfm_pci_intr +ffffffff818d2470 T bwfm_pci_select_core +ffffffff818d2550 T bwfm_pci_load_microcode +ffffffff818d29d0 T bwfm_pci_dmamem_alloc +ffffffff818d2b70 T bwfm_pci_setup_ring +ffffffff818d2d80 T bwfm_pci_intr_enable +ffffffff818d2dd0 T bwfm_pci_hostready +ffffffff818d2e40 T bwfm_pci_fill_rx_rings +ffffffff818d2e90 T bwfm_pci_dmamem_free +ffffffff818d2f00 T bwfm_pci_cleanup +ffffffff818d3570 T bwfm_pci_send_mb_data +ffffffff818d3690 T bwfm_pci_intmask +ffffffff818d36d0 T bwfm_pci_pktid_avail +ffffffff818d3740 T bwfm_pci_pktid_new +ffffffff818d38a0 T bwfm_pci_pktid_free +ffffffff818d3950 T bwfm_pci_fill_rx_buf_ring +ffffffff818d3cb0 T bwfm_pci_fill_rx_ioctl_ring +ffffffff818d4030 T bwfm_pci_ring_write_reserve +ffffffff818d4120 T bwfm_pci_ring_write_cancel +ffffffff818d4160 T bwfm_pci_ring_write_commit +ffffffff818d4240 T bwfm_pci_ring_write_rptr +ffffffff818d42c0 T bwfm_pci_ring_write_wptr +ffffffff818d4340 T bwfm_pci_setup_flowring +ffffffff818d44a0 T bwfm_pci_ring_bell +ffffffff818d44e0 T bwfm_pci_ring_update_rptr +ffffffff818d4590 T bwfm_pci_ring_update_wptr +ffffffff818d4640 T bwfm_pci_ring_write_reserve_multi +ffffffff818d4760 T bwfm_pci_ring_read_avail +ffffffff818d4860 T bwfm_pci_ring_read_commit +ffffffff818d48f0 T bwfm_pci_ring_rx +ffffffff818d4b00 T bwfm_pci_msg_rx +ffffffff818d50e0 T bwfm_pci_flowring_delete_cb +ffffffff818d5190 T bwfm_pci_msgbuf_rxioctl +ffffffff818d5280 T bwfm_pci_intr_status +ffffffff818d52c0 T bwfm_pci_intr_ack +ffffffff818d5300 T bwfm_pci_flowring_lookup +ffffffff818d5470 T bwfm_pci_flowring_create +ffffffff818d55a0 T bwfm_pci_flowring_create_cb +ffffffff818d58f0 T bwfm_pci_flowring_delete +ffffffff818d5bc0 T bwfm_pci_msgbuf_h2d_mb_write +ffffffff818d5de0 T bwfm_pci_handle_mb_data +ffffffff818d5eb0 T bwfm_pci_intr_disable +ffffffff818d6000 T ccp_pci_match +ffffffff818d6030 T ccp_pci_attach +ffffffff818d7000 T bnxt_match +ffffffff818d7030 T bnxt_attach +ffffffff818d82a0 T bnxt_dmamem_alloc +ffffffff818d8430 T bnxt_dmamem_free +ffffffff818d84c0 T bnxt_hwrm_ver_get +ffffffff818d8610 T bnxt_hwrm_nvm_get_dev_info +ffffffff818d8760 T bnxt_hwrm_func_drv_rgtr +ffffffff818d8880 T bnxt_hwrm_func_rgtr_async_events +ffffffff818d89a0 T bnxt_hwrm_func_qcaps +ffffffff818d8a80 T bnxt_admin_intr +ffffffff818d8c80 T bnxt_intr +ffffffff818d9150 T bnxt_hwrm_func_qcfg +ffffffff818d9200 T bnxt_hwrm_queue_qportcfg +ffffffff818d92d0 T bnxt_hwrm_func_reset +ffffffff818d9380 T bnxt_mark_cpr_invalid +ffffffff818d93e0 T bnxt_hwrm_ring_alloc +ffffffff818d9590 T bnxt_cfg_async_cr +ffffffff818d9690 T bnxt_write_cp_doorbell +ffffffff818d96d0 T bnxt_set_cp_ring_aggint +ffffffff818d97b0 T bnxt_ioctl +ffffffff818d9940 T bnxt_start +ffffffff818d9d60 T bnxt_watchdog +ffffffff818d9d90 T bnxt_media_change +ffffffff818d9ee0 T bnxt_media_status +ffffffff818d9f00 T bnxt_refill +ffffffff818d9f60 T bnxt_media_autonegotiate +ffffffff818da050 T bnxt_hwrm_port_phy_qcfg +ffffffff818da4f0 T bnxt_free_slots +ffffffff818da580 T bnxt_hwrm_cmd_hdr_init +ffffffff818da5d0 T hwrm_send_message +ffffffff818da650 T bnxt_queue_up +ffffffff818db580 T bnxt_hwrm_stat_ctx_alloc +ffffffff818db680 T bnxt_write_tx_doorbell +ffffffff818db6f0 T bnxt_write_rx_doorbell +ffffffff818db770 T bnxt_hwrm_ring_grp_alloc +ffffffff818db870 T bnxt_rx_fill +ffffffff818db980 T bnxt_hwrm_ring_grp_free +ffffffff818dba60 T bnxt_hwrm_ring_free +ffffffff818dbb50 T bnxt_hwrm_stat_ctx_free +ffffffff818dbc40 T bnxt_queue_down +ffffffff818dc320 T bnxt_up +ffffffff818dc9f0 T bnxt_hwrm_vnic_ctx_alloc +ffffffff818dcad0 T bnxt_hwrm_vnic_alloc +ffffffff818dcbd0 T bnxt_hwrm_vnic_cfg +ffffffff818dcd10 T bnxt_hwrm_vnic_cfg_placement +ffffffff818dcde0 T bnxt_hwrm_set_filter +ffffffff818dcf70 T bnxt_hwrm_vnic_rss_cfg +ffffffff818dd050 T bnxt_iff +ffffffff818dd1c0 T bnxt_hwrm_vnic_free +ffffffff818dd2b0 T bnxt_hwrm_vnic_ctx_free +ffffffff818dd3a0 T bnxt_down +ffffffff818dd740 T bnxt_hwrm_free_filter +ffffffff818dd820 T bnxt_hwrm_cfa_l2_set_rx_mask +ffffffff818dd900 T bnxt_rxrinfo +ffffffff818dda50 T bnxt_get_sffpage +ffffffff818ddd60 T bnxt_load_mbuf +ffffffff818dde10 T bnxt_handle_async_event +ffffffff818dde60 T bnxt_cpr_next_cmpl +ffffffff818dded0 T bnxt_cpr_commit +ffffffff818ddf00 T bnxt_cpr_rollback +ffffffff818ddf30 T bnxt_write_cp_doorbell_index +ffffffff818ddfb0 T bnxt_rx +ffffffff818de290 T bnxt_txeof +ffffffff818de3c0 T bnxt_get_media_type +ffffffff818de920 T bnxt_add_media_type +ffffffff818deaf0 T _hwrm_send_message +ffffffff818e19a0 T bnxt_rx_fill_slots +ffffffff818e1b60 T bnxt_hwrm_err_map +ffffffff818e1ba0 T _bnxt_hwrm_set_async_event_bit +ffffffff818e2000 t mcx_match +ffffffff818e2030 t mcx_attach +ffffffff818e5110 T mcx_rx_fill +ffffffff818e5360 T mcx_load_mbuf +ffffffff818e5410 t mcx_dmamem_alloc +ffffffff818e5570 t mcx_pages +ffffffff818e5e50 t mcx_iff +ffffffff818e6290 t mcx_alloc_uar +ffffffff818e6480 t mcx_admin_intr +ffffffff818e6630 t mcx_create_eq +ffffffff818e6bc0 t mcx_ioctl +ffffffff818e76a0 t mcx_start +ffffffff818e7ba0 t mcx_watchdog +ffffffff818e7bd0 t mcx_media_change +ffffffff818e7e90 t mcx_media_status +ffffffff818e7fd0 t mcx_refill +ffffffff818e8040 t mcx_cq_intr +ffffffff818e8560 t mcx_calibrate +ffffffff818e8720 t mcx_port_change +ffffffff818e8860 t mcx_cmdq_post +ffffffff818e8940 t mcx_set_flow_table_entry_mac +ffffffff818e8e10 t mcx_delete_flow_table_entry +ffffffff818e9290 t mcx_access_hca_reg +ffffffff818e96c0 t mcx_cmdq_exec +ffffffff818e98c0 t mcx_up +ffffffff818ecbc0 t mcx_down +ffffffff818edc20 t mcx_create_flow_table +ffffffff818edfd0 t mcx_create_flow_group +ffffffff818ee4b0 t mcx_destroy_sq +ffffffff818ee760 t mcx_destroy_cq +ffffffff818eea20 t mcx_arm_cq +ffffffff818eeb40 t mcx_destroy_flow_table +ffffffff818eeea0 t mcx_kstat_attach_ppcnt +ffffffff818eefd0 t mcx_kstat_ppcnt_read +ffffffff818ef0f0 t mcx_kstat_mtmp_read +ffffffff818ef280 t mcx_kstat_queue_read +ffffffff818f0710 t mcx_timecounter_read +ffffffff818f1000 t iavf_match +ffffffff818f1030 t iavf_attach +ffffffff818f1900 t iavf_reset +ffffffff818f1bd0 t iavf_dmamem_alloc +ffffffff818f1d30 t iavf_arq_fill +ffffffff818f1fe0 t iavf_arq_timeout +ffffffff818f2010 t iavf_init_admin_queue +ffffffff818f21c0 t iavf_get_version +ffffffff818f23e0 t iavf_get_vf_resources +ffffffff818f25b0 t iavf_config_irq_map +ffffffff818f27a0 t iavf_intr +ffffffff818f2e20 t iavf_ioctl +ffffffff818f39d0 t iavf_start +ffffffff818f3d20 t iavf_watchdog +ffffffff818f3d50 t iavf_media_change +ffffffff818f3d80 t iavf_media_status +ffffffff818f3e10 t iavf_arq_unfill +ffffffff818f3f10 t iavf_down +ffffffff818f4470 t iavf_up +ffffffff818f50e0 t iavf_queue_select +ffffffff818f52e0 t iavf_rxfill +ffffffff818f54e0 t iavf_rxrefill +ffffffff818f5500 t iavf_process_arq +ffffffff818f6000 T rge_match +ffffffff818f6030 T rge_attach +ffffffff818f6520 T rge_activate +ffffffff818f6660 T rge_intr +ffffffff818f6950 T rge_config_imtype +ffffffff818f69c0 T rge_exit_oob +ffffffff818f71e0 T rge_hw_init +ffffffff818f75d0 T rge_get_macaddr +ffffffff818f7650 T rge_set_phy_power +ffffffff818f78b0 T rge_phy_config +ffffffff818f81f0 T rge_allocmem +ffffffff818f8600 T rge_ioctl +ffffffff818f87b0 T rge_start +ffffffff818f8980 T rge_watchdog +ffffffff818f89c0 T rge_wol +ffffffff818f8bf0 T rge_tick +ffffffff818f8c70 T rge_txstart +ffffffff818f8ca0 T rge_ifmedia_upd +ffffffff818f9260 T rge_ifmedia_sts +ffffffff818f9350 T rge_add_media_types +ffffffff818f9400 T rge_kstat_attach +ffffffff818f96e0 T rge_wol_power +ffffffff818f97c0 T rge_rxeof +ffffffff818f9bc0 T rge_txeof +ffffffff818f9dc0 T rge_init +ffffffff818faf80 T rge_setup_intr +ffffffff818fb0f0 T rge_encap +ffffffff818fb390 T rge_stop +ffffffff818fb5f0 T rge_iff +ffffffff818fb770 T rge_set_macaddr +ffffffff818fb840 T rge_rx_list_init +ffffffff818fb900 T rge_tx_list_init +ffffffff818fb9c0 T rge_read_csi +ffffffff818fbc30 T rge_write_csi +ffffffff818fbeb0 T rge_write_mac_ocp +ffffffff818fbf00 T rge_read_mac_ocp +ffffffff818fbf80 T rge_reset +ffffffff818fc140 T rge_write_phy_ocp +ffffffff818fc200 T rge_read_phy_ocp +ffffffff818fc2b0 T rge_read_phy +ffffffff818fc380 T rge_write_phy +ffffffff818fc460 T rge_get_link_status +ffffffff818fc4c0 T rge_newbuf +ffffffff818fc640 T rge_discard_rxbuf +ffffffff818fc6b0 T rge_fill_rx_ring +ffffffff818fc730 T rge_phy_config_mac_cfg2 +ffffffff818fe140 T rge_phy_config_mac_cfg3 +ffffffff818ffdf0 T rge_phy_config_mac_cfg4 +ffffffff81903e60 T rge_phy_config_mac_cfg5 +ffffffff81904950 T rge_patch_phy_mcu +ffffffff81904bd0 T rge_write_ephy +ffffffff81904e30 T rge_phy_config_mcu +ffffffff819058f0 T rge_read_ephy +ffffffff81905b70 T rge_disable_phy_ocp_pwrsave +ffffffff81905d40 T rge_disable_hw_im +ffffffff81905d70 T rge_disable_sim_im +ffffffff81905dd0 T rge_setup_sim_im +ffffffff81905e50 T rge_link_state +ffffffff81905ed0 t rge_kstat_read +ffffffff81906070 t rge_kstat_copy +ffffffff81907000 T igc_match +ffffffff81907030 T igc_attach +ffffffff819074a0 T igc_detach +ffffffff819076a0 T igc_identify_hardware +ffffffff81907710 T igc_allocate_pci_resources +ffffffff81907830 T igc_allocate_queues +ffffffff81907d20 T igc_is_valid_ether_addr +ffffffff81907d80 T igc_allocate_msix +ffffffff81907fe0 T igc_setup_interface +ffffffff81908220 T igc_reset +ffffffff81908360 T igc_update_link_status +ffffffff81908470 T igc_get_hw_control +ffffffff819084d0 T igc_release_hw_control +ffffffff81908530 T igc_free_pci_resources +ffffffff81908610 T igc_stop +ffffffff81908920 T igc_free_transmit_structures +ffffffff819089a0 T igc_free_receive_structures +ffffffff81908a60 T igc_setup_msix +ffffffff81908af0 T igc_dma_malloc +ffffffff81908c60 T igc_rxrefill +ffffffff81908d30 T igc_dma_free +ffffffff81908de0 T igc_init_dmac +ffffffff81909080 T igc_intr_queue +ffffffff81909190 T igc_intr_link +ffffffff81909310 T igc_ioctl +ffffffff819095f0 T igc_start +ffffffff81909a20 T igc_watchdog +ffffffff81909a50 T igc_media_change +ffffffff81909b60 T igc_media_status +ffffffff81909d10 T igc_init +ffffffff8190a200 T igc_setup_transmit_structures +ffffffff8190a2c0 T igc_initialize_transmit_unit +ffffffff8190a4e0 T igc_setup_receive_structures +ffffffff8190a660 T igc_initialize_receive_unit +ffffffff8190aa30 T igc_iff +ffffffff8190ab80 T igc_configure_queues +ffffffff8190ad90 T igc_rxfill +ffffffff8190aec0 T igc_enable_intr +ffffffff8190af90 T igc_tx_ctx_setup +ffffffff8190b0a0 T igc_txeof +ffffffff8190b260 T igc_disable_intr +ffffffff8190b300 T igc_rxrinfo +ffffffff8190b430 T igc_get_buf +ffffffff8190b570 T igc_rxeof +ffffffff8190b910 T igc_rx_checksum +ffffffff8190b960 T igc_set_queues +ffffffff8190ba40 T igc_enable_queue +ffffffff8190ba70 T igc_allocate_transmit_buffers +ffffffff8190bbd0 T igc_setup_transmit_ring +ffffffff8190bd50 T igc_free_transmit_buffers +ffffffff8190be70 T igc_allocate_receive_buffers +ffffffff8190bfa0 T igc_setup_receive_ring +ffffffff8190c060 T igc_initialize_rss_mapping +ffffffff8190c280 T igc_free_receive_buffers +ffffffff8190d000 T igc_init_mac_params +ffffffff8190d040 T igc_init_nvm_params +ffffffff8190d080 T igc_init_phy_params +ffffffff8190d0c0 T igc_set_mac_type +ffffffff8190d170 T igc_setup_init_funcs +ffffffff8190d2d0 T igc_update_mc_addr_list +ffffffff8190d310 T igc_check_for_link +ffffffff8190d350 T igc_reset_hw +ffffffff8190d390 T igc_init_hw +ffffffff8190d3d0 T igc_get_speed_and_duplex +ffffffff8190d410 T igc_rar_set +ffffffff8190d450 T igc_check_reset_block +ffffffff8190d490 T igc_get_phy_info +ffffffff8190d4d0 T igc_phy_hw_reset +ffffffff8190d510 T igc_read_mac_addr +ffffffff8190d540 T igc_validate_nvm_checksum +ffffffff8190e000 T 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drm_bridge_chain_mode_valid +ffffffff81938520 T drm_bridge_chain_disable +ffffffff819385b0 T drm_bridge_chain_post_disable +ffffffff81938630 T drm_bridge_chain_mode_set +ffffffff819386c0 T drm_bridge_chain_pre_enable +ffffffff81938750 T drm_bridge_chain_enable +ffffffff819387d0 T drm_atomic_bridge_chain_disable +ffffffff819388d0 T drm_atomic_bridge_chain_post_disable +ffffffff819389e0 T drm_atomic_bridge_chain_pre_enable +ffffffff81938ae0 T drm_atomic_bridge_chain_enable +ffffffff81938bf0 T drm_atomic_bridge_chain_check +ffffffff81938f50 T drm_bridge_detect +ffffffff81938fb0 T drm_bridge_get_modes +ffffffff81939010 T drm_bridge_get_edid +ffffffff81939070 T drm_bridge_hpd_enable +ffffffff81939140 T drm_bridge_hpd_disable +ffffffff819391e0 T drm_bridge_hpd_notify +ffffffff81939240 t drm_bridge_atomic_duplicate_priv_state +ffffffff81939260 t drm_bridge_atomic_destroy_priv_state +ffffffff81939280 t select_bus_fmt_recursive +ffffffff8193a000 T drm_buddy_init +ffffffff8193a470 T drm_buddy_fini +ffffffff8193a570 T drm_get_buddy +ffffffff8193a5b0 T drm_buddy_free_block +ffffffff8193a750 T drm_buddy_free_list +ffffffff8193a7e0 T drm_buddy_block_trim +ffffffff8193aa30 t __alloc_range +ffffffff8193ae00 T drm_buddy_alloc_blocks +ffffffff8193b6a0 T drm_buddy_block_print +ffffffff8193b6e0 T drm_buddy_print +ffffffff8193b850 T drm_buddy_module_exit +ffffffff8193b870 T drm_buddy_module_init +ffffffff8193b8d0 t split_block +ffffffff8193c000 T drm_clflush_pages +ffffffff8193c120 T drm_clflush_sg +ffffffff8193c270 T drm_clflush_virt_range +ffffffff8193c340 T drm_need_swiotlb +ffffffff8193c370 T drm_memcpy_from_wc +ffffffff8193c710 T drm_memcpy_init_early +ffffffff8193d000 T drm_client_init +ffffffff8193d110 T drm_client_register +ffffffff8193d180 T drm_client_release +ffffffff8193d220 T drm_client_dev_unregister +ffffffff8193d310 T drm_client_dev_hotplug +ffffffff8193d3f0 T drm_client_dev_restore +ffffffff8193d4d0 T drm_client_buffer_vmap +ffffffff8193d540 T drm_client_buffer_vunmap +ffffffff8193d560 T drm_client_framebuffer_create +ffffffff8193d840 T drm_client_framebuffer_delete +ffffffff8193d950 T drm_client_framebuffer_flush +ffffffff8193e000 T drm_client_modeset_create +ffffffff8193e140 T drm_client_modeset_free +ffffffff8193e260 T drm_client_modeset_probe +ffffffff8193fa30 t drm_client_pick_crtcs +ffffffff8193fd20 T drm_client_rotation +ffffffff8193fec0 T drm_client_modeset_check +ffffffff8193ff60 t drm_client_modeset_commit_atomic +ffffffff81940160 T drm_client_modeset_commit_locked +ffffffff81940300 T drm_client_modeset_commit +ffffffff81940370 T drm_client_modeset_dpms +ffffffff819405c0 t drm_connector_pick_cmdline_mode +ffffffff81941000 T drm_color_ctm_s31_32_to_qm_n +ffffffff819410e0 T drm_crtc_enable_color_mgmt +ffffffff819411c0 T drm_mode_crtc_set_gamma_size +ffffffff819412e0 T drm_mode_gamma_set_ioctl +ffffffff819417d0 T drm_mode_gamma_get_ioctl +ffffffff81941910 T drm_get_color_encoding_name +ffffffff81941980 T drm_get_color_range_name +ffffffff819419f0 T drm_plane_create_color_properties +ffffffff81941c50 T drm_color_lut_check +ffffffff81942000 T drm_connector_ida_init +ffffffff81942110 T drm_connector_ida_destroy +ffffffff81942220 T drm_get_connector_type_name +ffffffff81942260 T drm_connector_free_work_fn +ffffffff81942320 T drm_connector_init +ffffffff819423a0 t __drm_connector_init +ffffffff819428b0 T drm_connector_init_with_ddc +ffffffff81942940 T drmm_connector_init +ffffffff81942a00 t drm_connector_cleanup_action +ffffffff81942a20 T drm_connector_attach_edid_property +ffffffff81942a40 T drm_connector_attach_encoder +ffffffff81942ac0 T drm_connector_has_possible_encoder +ffffffff81942b00 T drm_connector_cleanup +ffffffff81942e30 T drm_connector_unregister +ffffffff81942ed0 T drm_mode_put_tile_group +ffffffff81942f60 T drm_connector_register +ffffffff81943050 T drm_connector_unregister_all +ffffffff819431f0 T drm_connector_list_iter_begin +ffffffff81943230 T drm_connector_list_iter_next +ffffffff81943340 T drm_connector_list_iter_end +ffffffff81943410 T drm_connector_register_all +ffffffff819435a0 T drm_get_connector_status_name +ffffffff819435f0 T drm_get_connector_force_name +ffffffff81943630 T drm_get_subpixel_order_name +ffffffff81943670 T drm_get_dpms_name +ffffffff819436b0 T drm_display_info_set_bus_formats +ffffffff81943780 T drm_get_dvi_i_select_name +ffffffff819437e0 T drm_get_dvi_i_subconnector_name +ffffffff81943840 T drm_get_tv_select_name +ffffffff819438a0 T drm_get_tv_subconnector_name +ffffffff81943900 T drm_get_dp_subconnector_name +ffffffff81943990 T drm_connector_create_standard_properties +ffffffff81943b10 T drm_mode_create_dvi_i_properties +ffffffff81943bb0 T drm_connector_attach_dp_subconnector_property +ffffffff81943c20 T drm_connector_attach_content_type_property +ffffffff81943cc0 T drm_mode_create_content_type_property +ffffffff81943d40 T drm_connector_attach_tv_margin_properties +ffffffff81943db0 T drm_mode_create_tv_margin_properties +ffffffff81943ed0 T drm_mode_create_tv_properties +ffffffff81944130 T drm_mode_create_scaling_mode_property +ffffffff819441a0 T drm_connector_attach_vrr_capable_property +ffffffff81944230 T drm_connector_attach_scaling_mode_property +ffffffff81944400 T drm_mode_create_aspect_ratio_property +ffffffff81944480 T drm_mode_create_hdmi_colorspace_property +ffffffff81944500 T drm_mode_create_dp_colorspace_property +ffffffff81944580 T drm_mode_create_suggested_offset_properties +ffffffff81944650 T drm_connector_set_path_property +ffffffff819446b0 T drm_connector_set_tile_property +ffffffff81944800 T drm_connector_set_link_status_property +ffffffff81944850 T drm_connector_attach_max_bpc_property +ffffffff81944910 T drm_connector_attach_hdr_output_metadata_property +ffffffff81944960 T drm_connector_attach_colorspace_property +ffffffff819449b0 T drm_connector_atomic_hdr_metadata_equal +ffffffff81944a20 T drm_connector_set_vrr_capable_property +ffffffff81944a70 T drm_connector_set_panel_orientation +ffffffff81944b30 T drm_connector_set_panel_orientation_with_quirk +ffffffff81944c10 T drm_connector_set_orientation_from_panel +ffffffff81944d00 T drm_connector_create_privacy_screen_properties +ffffffff81944da0 T drm_connector_attach_privacy_screen_properties +ffffffff81944e10 T drm_connector_attach_privacy_screen_provider +ffffffff81944f20 t drm_connector_privacy_screen_notifier +ffffffff81944fc0 T drm_connector_update_privacy_screen +ffffffff81945030 T drm_connector_set_obj_prop +ffffffff81945110 T drm_connector_property_set_ioctl +ffffffff81945170 T drm_mode_getconnector +ffffffff819456b0 T drm_connector_find_by_fwnode +ffffffff81945760 T drm_connector_oob_hotplug_event +ffffffff81945850 T drm_mode_get_tile_group +ffffffff81945920 T drm_mode_create_tile_group +ffffffff819459f0 t drm_connector_free +ffffffff81945a30 t kasprintf +ffffffff81946000 T drm_crtc_from_index +ffffffff81946060 T drm_crtc_force_disable +ffffffff81946180 T drm_mode_set_config_internal +ffffffff81946200 T drm_crtc_register_all +ffffffff81946290 T drm_crtc_unregister_all +ffffffff81946300 T drm_crtc_create_fence +ffffffff81946390 T drm_crtc_init_with_planes +ffffffff81946460 t __drm_crtc_init_with_planes +ffffffff81946850 T drmm_crtc_init_with_planes +ffffffff81946950 T __drmm_crtc_alloc_with_planes +ffffffff81946ac0 T drm_crtc_cleanup +ffffffff81946be0 T drm_mode_getcrtc +ffffffff81946d80 t __drm_mode_set_config_internal +ffffffff81946f20 T drm_crtc_check_viewport +ffffffff81946fd0 T drm_mode_setcrtc +ffffffff81947730 T drm_mode_crtc_set_obj_prop +ffffffff819477b0 T drm_crtc_create_scaling_filter_property +ffffffff81947820 t drm_crtc_fence_get_driver_name +ffffffff819478a0 t drm_crtc_fence_get_timeline_name +ffffffff81947910 t kasprintf +ffffffff819479e0 t drmm_crtc_init_with_planes_cleanup +ffffffff81948000 T drm_helper_encoder_in_use +ffffffff81948180 T drm_helper_crtc_in_use +ffffffff819482b0 T drm_helper_disable_unused_functions +ffffffff81948330 t __drm_helper_disable_unused_functions +ffffffff81948430 T drm_crtc_helper_set_mode +ffffffff819488e0 T drm_connector_get_single_encoder +ffffffff819489e0 T drm_crtc_helper_set_config +ffffffff81949600 T drm_helper_connector_dpms +ffffffff819498f0 T drm_helper_resume_force_mode +ffffffff81949be0 T drm_helper_force_disable_all +ffffffff81949cb0 t drm_encoder_disable +ffffffff8194a000 T drm_atomic_helper_check_plane_damage +ffffffff8194a0a0 T drm_atomic_helper_dirtyfb +ffffffff8194a350 T drm_atomic_helper_damage_iter_init +ffffffff8194a4a0 T drm_atomic_helper_damage_iter_next +ffffffff8194a540 T drm_atomic_helper_damage_merged +ffffffff8194b000 T displayid_iter_edid_begin +ffffffff8194b050 T __displayid_iter_next +ffffffff8194b2e0 T displayid_iter_end +ffffffff8194c000 T drm_mode_create_dumb +ffffffff8194c0c0 T drm_mode_create_dumb_ioctl +ffffffff8194c180 T drm_mode_mmap_dumb_ioctl +ffffffff8194c1f0 T drm_mode_destroy_dumb +ffffffff8194c260 T drm_mode_destroy_dumb_ioctl +ffffffff8194d000 T drm_edid_header_is_valid +ffffffff8194d080 T drm_edid_are_equal +ffffffff8194d0f0 T drm_edid_block_valid +ffffffff8194d300 t edid_block_check +ffffffff8194d430 t edid_block_status_print +ffffffff8194d530 T drm_edid_is_valid +ffffffff8194d5b0 T drm_edid_override_set +ffffffff8194d620 T drm_connector_update_edid_property +ffffffff8194d7d0 T drm_edid_override_reset +ffffffff8194d900 T drm_add_override_edid_modes +ffffffff8194dae0 T drm_add_edid_modes +ffffffff8194dbd0 T drm_do_get_edid +ffffffff8194dbf0 t _drm_do_get_edid +ffffffff8194e100 T drm_edid_raw +ffffffff8194e190 T drm_edid_alloc +ffffffff8194e260 T drm_edid_dup +ffffffff8194e340 T drm_edid_free +ffffffff8194e3a0 T drm_probe_ddc +ffffffff8194e4a0 t drm_do_probe_ddc_edid +ffffffff8194e5f0 T drm_get_edid +ffffffff8194e730 T drm_edid_read_custom +ffffffff8194e820 T drm_edid_read_ddc +ffffffff8194e950 T drm_edid_read +ffffffff8194e9d0 T drm_edid_get_panel_id +ffffffff8194eab0 t edid_block_read +ffffffff8194ed20 T drm_get_edid_switcheroo +ffffffff8194ed70 T drm_edid_duplicate +ffffffff8194edf0 T drm_mode_find_dmt +ffffffff8194ef10 T drm_mode_fixup_1366x768 +ffffffff8194ef70 T drm_find_edid_extension +ffffffff8194f180 T drm_match_cea_mode +ffffffff8194f3d0 T drm_display_mode_from_cea_vic +ffffffff8194f440 T drm_edid_get_monitor_name +ffffffff8194f4f0 t get_monitor_name +ffffffff8194f850 T drm_edid_to_sad +ffffffff8194fa60 T drm_edid_to_speaker_allocation +ffffffff8194fc10 T drm_av_sync_delay +ffffffff8194fcc0 T drm_detect_hdmi_monitor +ffffffff8194fde0 T drm_detect_monitor_audio +ffffffff8194fff0 T drm_default_rgb_quant_range +ffffffff81950030 T drm_edid_connector_update +ffffffff81950090 t _drm_edid_connector_update +ffffffff81951f40 t _drm_update_tile_info +ffffffff819521d0 t _drm_edid_connector_property_update +ffffffff81952380 T drm_add_modes_noedid +ffffffff81952470 T drm_set_preferred_mode +ffffffff819524d0 T drm_hdmi_avi_infoframe_from_display_mode +ffffffff81952750 T drm_hdmi_avi_infoframe_quant_range +ffffffff819527f0 T drm_hdmi_vendor_infoframe_from_display_mode +ffffffff819528b0 t connector_bad_edid +ffffffff81952a70 t drm_for_each_detailed_block +ffffffff81952cc0 t __cea_db_iter_next +ffffffff81952f60 t update_display_info +ffffffff81953de0 t get_monitor_range +ffffffff81953e80 t do_detailed_mode +ffffffff819547a0 t hdmi_mode_alternate_clock +ffffffff81954850 t do_cvt_mode +ffffffff81954aa0 t drm_mode_std +ffffffff819557b0 t do_standard_modes +ffffffff81955900 t drm_monitor_supports_rb +ffffffff81955bf0 t drm_gtf2_hbreak +ffffffff81955e80 t do_established_modes +ffffffff81956080 t drm_match_hdmi_mode +ffffffff819562c0 t do_inferred_modes +ffffffff81956830 t mode_in_range +ffffffff81957000 T drm_encoder_register_all +ffffffff81957090 T drm_encoder_unregister_all +ffffffff81957100 T drm_encoder_init +ffffffff819571d0 t __drm_encoder_init +ffffffff81957390 T drm_encoder_cleanup +ffffffff819574c0 T __drmm_encoder_alloc +ffffffff819575e0 T drmm_encoder_init +ffffffff819576c0 T drm_mode_getencoder +ffffffff81957820 t kasprintf +ffffffff819578f0 t drmm_encoder_alloc_release +ffffffff81958000 T drm_i2c_encoder_dpms +ffffffff81958020 T drm_i2c_encoder_mode_fixup +ffffffff81958060 T drm_i2c_encoder_prepare +ffffffff81958080 T drm_i2c_encoder_commit +ffffffff819580a0 T drm_i2c_encoder_mode_set +ffffffff819580c0 T drm_i2c_encoder_detect +ffffffff819580e0 T drm_i2c_encoder_save +ffffffff81958100 T drm_i2c_encoder_restore +ffffffff81959000 T drm_fb_helper_debug_enter +ffffffff81959100 T drm_fb_helper_debug_leave +ffffffff81959270 T drm_fb_helper_restore_fbdev_mode_unlocked +ffffffff81959310 T drm_fb_helper_blank +ffffffff819593a0 T drm_fb_helper_prepare +ffffffff81959480 t drm_fb_helper_resume_worker +ffffffff819594b0 t drm_fb_helper_damage_work +ffffffff81959830 T drm_fb_helper_init +ffffffff819598a0 T drm_fb_helper_alloc_fbi +ffffffff81959900 T drm_fb_helper_unregister_fbi +ffffffff81959930 T drm_fb_helper_fini +ffffffff81959a30 T drm_fb_helper_set_suspend +ffffffff81959a60 T drm_fb_helper_set_suspend_unlocked +ffffffff81959a90 T drm_fb_helper_set_par +ffffffff81959b80 T drm_fb_helper_pan_display +ffffffff81959c50 T drm_fb_helper_fill_info +ffffffff81959d10 T drm_fb_helper_initial_config +ffffffff81959d40 t __drm_fb_helper_initial_config_and_unlock +ffffffff8195a290 T drm_fb_helper_hotplug_event +ffffffff8195a490 t drm_setup_crtcs_fb +ffffffff8195a5d0 T drm_fb_helper_lastclose +ffffffff8195a680 T drm_fb_helper_output_poll_changed +ffffffff8195a6a0 T drm_fbdev_generic_setup +ffffffff8195a850 t drm_fbdev_client_hotplug +ffffffff8195aa80 t drm_fbdev_client_unregister +ffffffff8195aaf0 t drm_fbdev_client_restore +ffffffff8195ab90 t drm_fbdev_cleanup +ffffffff8195ac30 t drm_fbdev_use_shadow_fb +ffffffff8195ac80 t drm_fb_helper_generic_probe +ffffffff8195b000 T drm_dev_needs_global_mutex +ffffffff8195b060 T drm_file_alloc +ffffffff8195b2d0 T drm_file_free +ffffffff8195b500 T drm_lastclose +ffffffff8195b570 T drm_release +ffffffff8195b5c0 T drm_release_noglobal +ffffffff8195b610 T drm_read +ffffffff8195b660 T drm_event_reserve_init_locked +ffffffff8195b6e0 T drm_event_reserve_init +ffffffff8195b7a0 T drm_event_cancel_free +ffffffff8195b820 T drm_send_event_timestamp_locked +ffffffff8195b830 t drm_send_event_helper +ffffffff8195ba10 T drm_send_event_locked +ffffffff8195ba30 T drm_send_event +ffffffff8195ba80 T mock_drm_getfile +ffffffff8195c000 T drm_flip_work_allocate_task +ffffffff8195c060 T drm_flip_work_queue_task +ffffffff8195c0b0 T drm_flip_work_queue +ffffffff8195c150 T drm_flip_work_commit +ffffffff8195c1d0 T drm_flip_work_init +ffffffff8195c240 t flip_worker +ffffffff8195c320 T drm_flip_work_cleanup +ffffffff8195d000 T drm_fb_clip_offset +ffffffff8195d040 T drm_fb_memcpy +ffffffff8195d2c0 T drm_fb_swab +ffffffff8195d3c0 t drm_fb_swab32_line +ffffffff8195d420 t drm_fb_swab16_line +ffffffff8195d480 t drm_fb_xfrm +ffffffff8195d740 T drm_fb_xrgb8888_to_rgb332 +ffffffff8195d7a0 t drm_fb_xrgb8888_to_rgb332_line +ffffffff8195d890 T drm_fb_xrgb8888_to_rgb565 +ffffffff8195d910 t drm_fb_xrgb8888_to_rgb565_swab_line +ffffffff8195d990 t drm_fb_xrgb8888_to_rgb565_line +ffffffff8195da80 T drm_fb_xrgb8888_to_rgb888 +ffffffff8195dae0 t drm_fb_xrgb8888_to_rgb888_line +ffffffff8195db70 T drm_fb_xrgb8888_to_xrgb2101010 +ffffffff8195dbd0 t drm_fb_xrgb8888_to_xrgb2101010_line +ffffffff8195dc50 T drm_fb_xrgb8888_to_gray8 +ffffffff8195dcb0 t drm_fb_xrgb8888_to_gray8_line +ffffffff8195dd30 T drm_fb_blit +ffffffff8195e180 T drm_fb_xrgb8888_to_mono +ffffffff8195e510 T drm_fb_build_fourcc_list +ffffffff8195e840 t drm_fb_rgb888_to_xrgb8888_line +ffffffff8195e910 t drm_fb_rgb565_to_xrgb8888_line +ffffffff8195f000 T drm_mode_legacy_fb_format +ffffffff8195f0f0 T drm_driver_legacy_fb_format +ffffffff8195f1f0 T __drm_format_info +ffffffff8195f270 T drm_format_info +ffffffff8195f330 T drm_get_format_info +ffffffff8195f410 T drm_format_info_block_width +ffffffff8195f460 T drm_format_info_block_height +ffffffff8195f4b0 T drm_format_info_bpp +ffffffff8195f530 T drm_format_info_min_pitch +ffffffff81960000 T drm_framebuffer_check_src_coords +ffffffff81960120 T drm_mode_addfb +ffffffff81960330 T drm_mode_addfb2 +ffffffff81960420 T drm_mode_addfb_ioctl +ffffffff81960440 T drm_internal_framebuffer_create +ffffffff81960960 T drm_mode_addfb2_ioctl +ffffffff81960a50 T drm_mode_rmfb +ffffffff81960c20 T drm_framebuffer_lookup +ffffffff81960c70 t drm_mode_rmfb_work_fn +ffffffff81960d30 T drm_mode_rmfb_ioctl +ffffffff81960d50 T drm_mode_getfb +ffffffff81960eb0 T drm_mode_getfb2_ioctl +ffffffff81961260 T drm_mode_dirtyfb_ioctl +ffffffff81961400 T drm_fb_release +ffffffff81961510 T drm_framebuffer_free +ffffffff81961550 T drm_framebuffer_init +ffffffff819616b0 T drm_framebuffer_unregister_private +ffffffff819616f0 T drm_framebuffer_cleanup +ffffffff81961750 T drm_framebuffer_remove +ffffffff81961c00 T drm_framebuffer_plane_width +ffffffff81961c50 T drm_framebuffer_plane_height +ffffffff81961ca0 T drm_framebuffer_print_info +ffffffff81962000 T drm_ref +ffffffff81962030 T drm_unref +ffffffff819620b0 T drm_fault +ffffffff81962270 T drm_flush +ffffffff819622a0 T udv_attach_drm +ffffffff819624c0 T drm_gem_init +ffffffff81962570 t drm_gem_init_release +ffffffff81962590 T drm_gem_object_init +ffffffff819626f0 T drm_gem_private_object_init +ffffffff819627f0 T drm_gem_handle_delete +ffffffff819628e0 t drm_gem_object_release_handle +ffffffff81962970 T drm_gem_dumb_map_offset +ffffffff81962aa0 T drm_gem_object_lookup +ffffffff81962b20 T drm_gem_create_mmap_offset +ffffffff81962b50 T drm_gem_dumb_destroy +ffffffff81962b70 T drm_gem_handle_create_tail +ffffffff81962ce0 t drm_gem_object_handle_put_unlocked +ffffffff81962e30 T drm_gem_handle_create +ffffffff81962e80 T drm_gem_free_mmap_offset +ffffffff81962eb0 T drm_gem_create_mmap_offset_size +ffffffff81962ee0 T drm_gem_get_pages +ffffffff81962f30 T drm_gem_put_pages +ffffffff81962f60 T drm_gem_objects_lookup +ffffffff819630d0 T drm_gem_dma_resv_wait +ffffffff81963210 T drm_gem_close_ioctl +ffffffff81963260 T drm_gem_flink_ioctl +ffffffff819633d0 T drm_gem_open_ioctl +ffffffff81963500 T drm_gem_open +ffffffff81963530 T drm_gem_release +ffffffff81963570 T drm_gem_object_release +ffffffff819636c0 T drm_gem_lru_remove +ffffffff819637a0 T drm_gem_object_free +ffffffff819637f0 T drm_gem_mmap_obj +ffffffff81963900 T drm_gem_mmap +ffffffff81963b80 T drm_gem_print_info +ffffffff81963ca0 T drm_gem_pin +ffffffff81963ce0 T drm_gem_unpin +ffffffff81963d20 T drm_gem_vmap +ffffffff81963d80 T drm_gem_vunmap +ffffffff81963df0 T drm_gem_lock_reservations +ffffffff81964060 T drm_gem_unlock_reservations +ffffffff81964160 T drm_gem_lru_init +ffffffff819641a0 T drm_gem_lru_move_tail +ffffffff81964290 T drm_gem_lru_scan +ffffffff81964680 t __ww_mutex_lock +ffffffff81965000 T drm_gem_plane_helper_prepare_fb +ffffffff81966000 T drm_gem_fb_destroy +ffffffff819660c0 T drm_gem_fb_create_handle +ffffffff81967000 T drm_ht_create +ffffffff81967080 T drm_ht_verbose_list +ffffffff81967140 T drm_ht_insert_item +ffffffff81967190 T drm_ht_just_insert_please +ffffffff81967260 T drm_ht_find_item +ffffffff819672b0 T drm_ht_remove_key +ffffffff81967300 T drm_ht_remove_item +ffffffff81967350 T drm_ht_remove +ffffffff81968000 T drm_getunique +ffffffff819680a0 T drm_getclient +ffffffff81968120 T drm_noop +ffffffff81968170 T drm_invalid_op +ffffffff819681a0 T drm_version +ffffffff819683c0 T pledge_ioctl_drm +ffffffff81968480 T drm_ioctl_kernel +ffffffff819684d0 T drm_ioctl +ffffffff81968520 T drm_ioctl_flags +ffffffff81968580 T drm_do_ioctl +ffffffff819688d0 T drmioctl +ffffffff81968a20 t drm_getstats +ffffffff81968a70 t drm_setversion +ffffffff81968bd0 t drm_getcap +ffffffff81968dc0 t drm_setclientcap +ffffffff81969000 T tasklet_unlock_wait +ffffffff81969080 T tasklet_unlock_spin_wait +ffffffff81969100 T tasklet_run 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dmi_first_match +ffffffff8196a080 T dmi_get_system_info +ffffffff8196a0f0 T dmi_check_system +ffffffff8196a1f0 T alloc_pages +ffffffff8196a2c0 T __free_pages +ffffffff8196a3c0 T __pagevec_release +ffffffff8196a470 T kmap +ffffffff8196a4b0 T kunmap_va +ffffffff8196a4d0 T kmap_atomic_prot +ffffffff8196a560 T kunmap_atomic +ffffffff8196a5e0 T vmap +ffffffff8196a6c0 T vunmap +ffffffff8196a710 T is_vmalloc_addr +ffffffff8196a750 T print_hex_dump +ffffffff8196a820 T memchr_inv +ffffffff8196a870 T panic_cmp +ffffffff8196a890 T linux_root_RB_INSERT_COLOR +ffffffff8196aa90 T linux_root_RB_REMOVE_COLOR +ffffffff8196add0 T linux_root_RB_REMOVE +ffffffff8196af00 T linux_root_RB_INSERT +ffffffff8196af70 T linux_root_RB_FIND +ffffffff8196afc0 T linux_root_RB_NFIND +ffffffff8196b010 T linux_root_RB_NEXT +ffffffff8196b080 T linux_root_RB_PREV +ffffffff8196b0f0 T linux_root_RB_MINMAX +ffffffff8196b140 T idr_init +ffffffff8196b170 T idr_destroy +ffffffff8196b2b0 T idr_tree_SPLAY_REMOVE +ffffffff8196b330 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dma_fence_array_cb_func +ffffffff81971420 t dma_fence_chain_cb +ffffffff819714e0 t dma_fence_chain_timo +ffffffff81972000 T drmm_kzalloc +ffffffff81972100 T drmm_kcalloc +ffffffff81972210 T drmm_kstrdup +ffffffff81972350 T drmm_kfree +ffffffff81972450 T drmm_add_action +ffffffff81972510 T drmm_add_action_or_reset +ffffffff819725e0 T drm_managed_release +ffffffff819726a0 T drmm_add_final_kfree +ffffffff81973000 T mipi_dsi_attach +ffffffff81973050 T mipi_dsi_detach +ffffffff819730a0 T devm_mipi_dsi_attach +ffffffff81973110 T mipi_dsi_packet_format_is_short +ffffffff81973160 T mipi_dsi_packet_format_is_long +ffffffff819731b0 T mipi_dsi_create_packet +ffffffff819732c0 T mipi_dsi_shutdown_peripheral +ffffffff81973370 T mipi_dsi_turn_on_peripheral +ffffffff81973420 T mipi_dsi_set_maximum_return_packet_size +ffffffff819734d0 T mipi_dsi_compression_mode +ffffffff81973580 T mipi_dsi_picture_parameter_set +ffffffff81973630 T mipi_dsi_generic_write +ffffffff819736f0 T mipi_dsi_generic_read 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drm_mm_scan_init_with_range +ffffffff81975e50 T drm_mm_scan_add_block +ffffffff81975fc0 T drm_mm_scan_remove_block +ffffffff81976040 T drm_mm_scan_color_evict +ffffffff81976120 T drm_mm_init +ffffffff819761d0 T drm_mm_takedown +ffffffff81976210 T drm_mm_print +ffffffff81977000 T drm_modeset_register_all +ffffffff819770a0 T drm_modeset_unregister_all +ffffffff819770e0 T drm_mode_getresources +ffffffff81977390 T drm_mode_config_reset +ffffffff819774f0 T drmm_mode_config_init +ffffffff81977b70 T drm_mode_config_cleanup +ffffffff81977eb0 t drm_mode_config_init_release +ffffffff81977ec0 T drm_mode_config_validate +ffffffff81979000 T __drm_mode_object_add +ffffffff81979100 T drm_mode_object_add +ffffffff819791e0 T drm_mode_object_register +ffffffff81979230 T drm_mode_object_unregister +ffffffff819792d0 T drm_mode_object_lease_required +ffffffff81979320 T __drm_mode_object_find +ffffffff819793d0 T drm_mode_object_find +ffffffff81979480 T drm_mode_object_put +ffffffff81979500 T drm_mode_object_get +ffffffff81979560 T drm_object_attach_property +ffffffff81979670 T drm_object_property_set_value +ffffffff81979750 T drm_object_property_get_value +ffffffff819797e0 t __drm_object_property_get_value +ffffffff819798c0 T drm_object_property_get_default_value +ffffffff81979990 T drm_mode_object_get_properties +ffffffff81979ae0 T drm_mode_obj_get_properties_ioctl +ffffffff81979d30 T drm_mode_obj_find_prop_id +ffffffff81979d90 T drm_mode_obj_set_property_ioctl +ffffffff8197b000 T drm_mode_debug_printmodeline +ffffffff8197b140 T drm_mode_vrefresh +ffffffff8197b1e0 T drm_mode_create +ffffffff8197b200 T drm_mode_destroy +ffffffff8197b240 T drm_mode_probed_add +ffffffff8197b2e0 T drm_cvt_mode +ffffffff8197b790 T drm_mode_set_name +ffffffff8197b7e0 T drm_gtf_mode_complex +ffffffff8197bae0 T drm_gtf_mode +ffffffff8197bb30 T drm_mode_get_hv_timing +ffffffff8197bb80 T drm_mode_init +ffffffff8197bc50 T drm_mode_set_crtcinfo +ffffffff8197be00 T drm_mode_copy +ffffffff8197be60 T drm_mode_duplicate +ffffffff8197bee0 T drm_mode_match +ffffffff8197c080 T drm_mode_equal +ffffffff8197c0a0 T drm_mode_equal_no_clocks +ffffffff8197c0c0 T drm_mode_equal_no_clocks_no_stereo +ffffffff8197c180 T drm_mode_validate_driver +ffffffff8197c270 T drm_mode_validate_size +ffffffff8197c2c0 T drm_mode_validate_ycbcr420 +ffffffff8197c330 T drm_mode_is_420_only +ffffffff8197c380 T drm_get_mode_status_name +ffffffff8197c400 T drm_mode_prune_invalid +ffffffff8197c6a0 T drm_mode_sort +ffffffff8197c6d0 t drm_mode_compare +ffffffff8197c860 T drm_connector_list_update +ffffffff8197ca30 T drm_mode_parse_command_line_for_connector +ffffffff8197ca60 T drm_mode_create_from_cmdline_mode +ffffffff8197cb50 T drm_mode_convert_to_umode +ffffffff8197cce0 T drm_mode_convert_umode +ffffffff8197cf00 T drm_mode_is_420_also +ffffffff8197cf50 T drm_mode_is_420 +ffffffff8197d000 T drm_helper_move_panel_connectors_to_head +ffffffff8197d0f0 T drm_helper_mode_fill_fb_struct +ffffffff8197d1b0 T drm_crtc_init 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__drm_printfn_seq_file +ffffffff81988270 T __drm_printfn_info +ffffffff819882a0 T __drm_printfn_debug +ffffffff819882d0 T __drm_printfn_err +ffffffff81988310 T drm_puts +ffffffff81988340 T drm_printf +ffffffff819883c0 T drm_print_bits +ffffffff819885e0 T drm_dev_printk +ffffffff81988680 T __drm_dev_dbg +ffffffff81988710 T ___drm_dbg +ffffffff819887a0 T __drm_err +ffffffff81988830 T drm_print_regset32 +ffffffff81989000 T drm_crtc_mode_valid +ffffffff81989050 T drm_encoder_mode_valid +ffffffff81989090 T drm_connector_mode_valid +ffffffff81989110 T drm_kms_helper_poll_enable +ffffffff81989200 T drm_helper_probe_detect +ffffffff819893f0 T drm_helper_probe_single_connector_modes +ffffffff819899b0 t __drm_helper_update_and_validate +ffffffff81989d60 T drm_kms_helper_hotplug_event +ffffffff81989da0 T drm_kms_helper_connector_hotplug_event +ffffffff81989de0 T drm_kms_helper_is_poll_worker +ffffffff81989e10 T drm_kms_helper_poll_disable +ffffffff81989e90 T drm_kms_helper_poll_init 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drm_self_refresh_helper_init +ffffffff8198e480 t drm_self_refresh_helper_entry_work +ffffffff8198e5e0 T drm_self_refresh_helper_cleanup +ffffffff8198e660 t __delayed_work_tick +ffffffff8198f000 T drm_syncobj_find +ffffffff8198f070 T drm_syncobj_add_point +ffffffff8198f160 t syncobj_wait_syncobj_func +ffffffff8198f210 T drm_syncobj_replace_fence +ffffffff8198f2a0 T drm_syncobj_find_fence +ffffffff8198f600 t drm_syncobj_fence_add_wait +ffffffff8198f6d0 T drm_syncobj_free +ffffffff8198f760 T drm_syncobj_create +ffffffff8198f970 T drm_syncobj_get_handle +ffffffff8198fa90 T drm_syncobj_get_fd +ffffffff8198fae0 T drm_syncobj_open +ffffffff8198fb10 T drm_syncobj_release +ffffffff8198fb50 t drm_syncobj_release_handle +ffffffff8198fc00 T drm_syncobj_create_ioctl +ffffffff8198fd30 T drm_syncobj_destroy_ioctl +ffffffff8198fe50 T drm_syncobj_handle_to_fd_ioctl +ffffffff81990040 T drm_syncobj_fd_to_handle_ioctl +ffffffff81990230 T drm_syncobj_transfer_ioctl +ffffffff81990650 T drm_timeout_abs_to_jiffies +ffffffff81990730 T drm_syncobj_wait_ioctl +ffffffff819908c0 t drm_syncobj_array_find +ffffffff81990af0 t drm_syncobj_array_free +ffffffff81990bd0 T drm_syncobj_timeline_wait_ioctl +ffffffff81990d60 T drm_syncobj_reset_ioctl +ffffffff81990ec0 T drm_syncobj_signal_ioctl +ffffffff81991050 T drm_syncobj_timeline_signal_ioctl +ffffffff81991280 T drm_syncobj_query_ioctl +ffffffff81991480 t drm_syncobj_array_wait_timeout +ffffffff819918f0 t syncobj_wait_fence_func +ffffffff81992000 T drm_vblank_count +ffffffff81992090 T drm_crtc_accurate_vblank_count +ffffffff819921a0 t drm_update_vblank_count +ffffffff819925f0 T drm_vblank_disable_and_save +ffffffff81992740 T drm_vblank_init +ffffffff819928c0 t vblank_disable_fn +ffffffff81992940 t drm_vblank_init_release +ffffffff819929d0 T drm_dev_has_vblank +ffffffff81992a00 T drm_crtc_vblank_waitqueue +ffffffff81992a50 T drm_calc_timestamping_constants +ffffffff81992c80 T drm_crtc_vblank_helper_get_vblank_timestamp_internal +ffffffff819931b0 T drm_crtc_vblank_helper_get_vblank_timestamp +ffffffff819931d0 T drm_crtc_vblank_count +ffffffff81993260 T drm_crtc_vblank_count_and_time +ffffffff81993320 T drm_crtc_arm_vblank_event +ffffffff81993400 T drm_crtc_send_vblank_event +ffffffff819935b0 T drm_vblank_get +ffffffff819936d0 t drm_vblank_enable +ffffffff81993890 T drm_crtc_vblank_get +ffffffff819939a0 T drm_vblank_put +ffffffff81993ad0 T drm_crtc_vblank_put +ffffffff81993af0 T drm_wait_one_vblank +ffffffff81993f40 T drm_crtc_wait_one_vblank +ffffffff81993f60 T drm_crtc_vblank_off +ffffffff81994350 T drm_crtc_vblank_reset +ffffffff81994480 T drm_crtc_set_max_vblank_count +ffffffff81994560 T drm_crtc_vblank_on +ffffffff819946b0 t drm_reset_vblank_timestamp +ffffffff819948b0 T drm_crtc_vblank_restore +ffffffff81994c90 T drm_legacy_modeset_ctl_ioctl +ffffffff81994eb0 T drm_wait_vblank_ioctl +ffffffff819958f0 T drm_handle_vblank +ffffffff81995be0 t drm_handle_vblank_events +ffffffff81995e70 T drm_crtc_handle_vblank +ffffffff81995e90 T drm_crtc_get_sequence_ioctl +ffffffff81996080 T drm_crtc_queue_sequence_ioctl +ffffffff81996450 t __get_vblank_counter +ffffffff81997000 T drm_handle_vblank_works +ffffffff819971b0 T drm_vblank_cancel_pending_works +ffffffff819972f0 T drm_vblank_work_schedule +ffffffff81997570 T drm_vblank_work_cancel_sync +ffffffff819976d0 T drm_vblank_work_flush +ffffffff819977a0 T drm_vblank_work_init +ffffffff81997810 T drm_vblank_worker_init +ffffffff81998000 T drm_vma_offset_manager_init +ffffffff81998040 T drm_vma_offset_manager_destroy +ffffffff81998060 T drm_vma_offset_lookup_locked +ffffffff819980f0 T drm_vma_offset_add +ffffffff81998180 T drm_vma_offset_remove +ffffffff819981d0 T drm_vma_node_allow +ffffffff819981f0 t vma_node_allow +ffffffff81998320 T drm_vma_node_allow_once +ffffffff81998340 T drm_vma_node_revoke +ffffffff819983c0 T drm_vma_node_is_allowed +ffffffff81999000 T hdmi_avi_infoframe_init +ffffffff81999080 T hdmi_avi_infoframe_check +ffffffff819990d0 T hdmi_avi_infoframe_pack_only +ffffffff819992d0 T hdmi_avi_infoframe_pack +ffffffff81999330 T hdmi_spd_infoframe_init +ffffffff819993f0 T hdmi_spd_infoframe_check +ffffffff81999440 T hdmi_spd_infoframe_pack_only +ffffffff81999570 T hdmi_spd_infoframe_pack +ffffffff819996d0 T hdmi_audio_infoframe_init +ffffffff81999720 T hdmi_audio_infoframe_check +ffffffff81999770 T hdmi_audio_infoframe_pack_only +ffffffff819998c0 T hdmi_audio_infoframe_pack +ffffffff81999910 T hdmi_audio_infoframe_pack_for_dp +ffffffff81999a00 T hdmi_vendor_infoframe_init +ffffffff81999a60 T hdmi_vendor_infoframe_check +ffffffff81999b00 T hdmi_vendor_infoframe_pack_only +ffffffff81999cd0 T hdmi_vendor_infoframe_pack +ffffffff81999d70 T hdmi_drm_infoframe_init +ffffffff81999dd0 T hdmi_drm_infoframe_check +ffffffff81999e20 T hdmi_drm_infoframe_pack_only +ffffffff81999ff0 T hdmi_drm_infoframe_pack +ffffffff8199a040 T hdmi_infoframe_check +ffffffff8199a1a0 T hdmi_infoframe_pack_only +ffffffff8199a3c0 T hdmi_infoframe_pack +ffffffff8199a530 T hdmi_infoframe_log +ffffffff8199b4d0 T hdmi_drm_infoframe_unpack_only +ffffffff8199b5b0 T hdmi_infoframe_unpack +ffffffff8199c000 T list_sort +ffffffff8199d000 T radix_tree_lookup +ffffffff8199d0b0 T radix_tree_iter_find +ffffffff8199d1a0 T radix_tree_delete +ffffffff8199d340 T radix_tree_iter_delete +ffffffff8199d360 T radix_tree_insert +ffffffff8199e000 T sort +ffffffff8199e040 t qsort +ffffffff819a0000 T drm_dp_dual_mode_read +ffffffff819a0110 T drm_dp_dual_mode_write +ffffffff819a01f0 T drm_dp_dual_mode_detect +ffffffff819a04a0 T drm_dp_dual_mode_max_tmds_clock +ffffffff819a05d0 T drm_dp_dual_mode_get_tmds_output +ffffffff819a0700 T drm_dp_dual_mode_set_tmds_output +ffffffff819a0990 T drm_dp_get_dual_mode_type_name +ffffffff819a0a00 T drm_lspcon_get_mode +ffffffff819a0bb0 T drm_lspcon_set_mode +ffffffff819a1000 T drm_dp_channel_eq_ok +ffffffff819a1080 T drm_dp_clock_recovery_ok +ffffffff819a1100 T drm_dp_get_adjust_request_voltage +ffffffff819a1140 T drm_dp_get_adjust_request_pre_emphasis +ffffffff819a1190 T drm_dp_get_adjust_tx_ffe_preset +ffffffff819a11d0 T drm_dp_128b132b_lane_channel_eq_done +ffffffff819a1250 T drm_dp_128b132b_lane_symbol_locked +ffffffff819a12c0 T drm_dp_128b132b_eq_interlane_align_done +ffffffff819a12f0 T drm_dp_128b132b_cds_interlane_align_done +ffffffff819a1320 T drm_dp_128b132b_link_training_failed +ffffffff819a1350 T drm_dp_read_clock_recovery_delay +ffffffff819a1450 T drm_dp_read_channel_eq_delay +ffffffff819a1550 T drm_dp_128b132b_read_aux_rd_interval +ffffffff819a1600 T drm_dp_link_train_clock_recovery_delay +ffffffff819a1690 t __8b10b_clock_recovery_delay_us +ffffffff819a1710 T drm_dp_link_train_channel_eq_delay +ffffffff819a1790 T drm_dp_phy_name +ffffffff819a17d0 T drm_dp_lttpr_link_train_clock_recovery_delay +ffffffff819a17f0 T drm_dp_lttpr_link_train_channel_eq_delay +ffffffff819a1860 T drm_dp_link_rate_to_bw_code +ffffffff819a18d0 T drm_dp_bw_code_to_link_rate +ffffffff819a1930 T drm_dp_dpcd_probe +ffffffff819a1a70 t drm_dp_dpcd_access +ffffffff819a1ba0 T drm_dp_dpcd_read +ffffffff819a1cd0 T drm_dp_dpcd_write +ffffffff819a1de0 T drm_dp_dpcd_read_link_status +ffffffff819a1e00 T drm_dp_dpcd_read_phy_link_status +ffffffff819a1f00 T drm_dp_downstream_is_type +ffffffff819a1f40 T drm_dp_downstream_is_tmds +ffffffff819a1fb0 T drm_dp_send_real_edid_checksum +ffffffff819a2210 T drm_dp_read_dpcd_caps +ffffffff819a23a0 T drm_dp_read_downstream_info +ffffffff819a24a0 T drm_dp_downstream_max_dotclock +ffffffff819a24f0 T drm_dp_downstream_max_tmds_clock +ffffffff819a2590 T drm_dp_downstream_min_tmds_clock +ffffffff819a2610 T drm_dp_downstream_max_bpc +ffffffff819a26b0 T drm_dp_downstream_420_passthrough +ffffffff819a2710 T drm_dp_downstream_444_to_420_conversion +ffffffff819a2770 T drm_dp_downstream_rgb_to_ycbcr_conversion +ffffffff819a27d0 T drm_dp_downstream_mode +ffffffff819a2860 T drm_dp_downstream_id +ffffffff819a2880 T drm_dp_downstream_debug +ffffffff819a2920 T drm_dp_subconnector_type +ffffffff819a2990 T drm_dp_set_subconnector_property +ffffffff819a2a00 T drm_dp_read_sink_count_cap +ffffffff819a2a50 T drm_dp_read_sink_count +ffffffff819a2ab0 T drm_dp_remote_aux_init +ffffffff819a2ae0 t drm_dp_aux_crc_work +ffffffff819a2c60 T drm_dp_aux_init +ffffffff819a2d10 T drm_dp_aux_register +ffffffff819a2e30 T drm_dp_aux_unregister +ffffffff819a2e60 T drm_dp_psr_setup_time +ffffffff819a2eb0 T drm_dp_start_crc +ffffffff819a2f60 T drm_dp_stop_crc +ffffffff819a2ff0 T drm_dp_read_desc +ffffffff819a31b0 T drm_dp_dsc_sink_max_slice_count +ffffffff819a3240 T drm_dp_dsc_sink_line_buf_depth +ffffffff819a3280 T drm_dp_dsc_sink_supported_input_bpcs +ffffffff819a32f0 T drm_dp_read_lttpr_common_caps +ffffffff819a33b0 T drm_dp_read_lttpr_phy_caps +ffffffff819a3470 T drm_dp_lttpr_count +ffffffff819a3500 T drm_dp_lttpr_max_link_rate +ffffffff819a3560 T drm_dp_lttpr_max_lane_count +ffffffff819a3590 T drm_dp_lttpr_voltage_swing_level_3_supported +ffffffff819a35c0 T drm_dp_lttpr_pre_emphasis_level_3_supported +ffffffff819a35f0 T drm_dp_get_phy_test_pattern +ffffffff819a3710 T drm_dp_set_phy_test_pattern +ffffffff819a37e0 T drm_dp_vsc_sdp_log +ffffffff819a3b10 T drm_dp_get_pcon_max_frl_bw +ffffffff819a3b60 T drm_dp_pcon_frl_prepare +ffffffff819a3bb0 T drm_dp_pcon_is_frl_ready +ffffffff819a3c00 T drm_dp_pcon_frl_configure_1 +ffffffff819a3d00 T drm_dp_pcon_frl_configure_2 +ffffffff819a3d60 T drm_dp_pcon_reset_frl_config +ffffffff819a3db0 T drm_dp_pcon_frl_enable +ffffffff819a3e70 T drm_dp_pcon_hdmi_link_active +ffffffff819a3ec0 T drm_dp_pcon_hdmi_link_mode +ffffffff819a3f30 T drm_dp_pcon_hdmi_frl_link_error_count +ffffffff819a4030 T drm_dp_pcon_enc_is_dsc_1_2 +ffffffff819a4060 T drm_dp_pcon_dsc_max_slices +ffffffff819a40f0 T drm_dp_pcon_dsc_max_slice_width +ffffffff819a4120 T drm_dp_pcon_dsc_bpp_incr +ffffffff819a4160 T drm_dp_pcon_pps_default +ffffffff819a41f0 T drm_dp_pcon_pps_override_buf +ffffffff819a42a0 T drm_dp_pcon_pps_override_param +ffffffff819a4380 T drm_dp_pcon_convert_rgb_to_ycbcr +ffffffff819a4420 T drm_edp_backlight_set_level +ffffffff819a4500 T drm_edp_backlight_enable +ffffffff819a4710 t drm_edp_backlight_set_enable +ffffffff819a4850 T drm_edp_backlight_disable +ffffffff819a4890 T drm_edp_backlight_init +ffffffff819a4de0 T drm_panel_dp_aux_backlight +ffffffff819a4f70 t __128b132b_channel_eq_delay_us +ffffffff819a4ff0 t __8b10b_channel_eq_delay_us +ffffffff819a5070 t drm_dp_aux_get_crc +ffffffff819a5140 t drm_dp_i2c_xfer +ffffffff819a5390 t drm_dp_i2c_functionality +ffffffff819a53c0 t drm_dp_i2c_do_msg +ffffffff819a57a0 t lock_bus +ffffffff819a57c0 t trylock_bus +ffffffff819a5810 t unlock_bus +ffffffff819a5830 t dp_aux_backlight_update_status +ffffffff819a6000 T drm_dp_encode_sideband_req +ffffffff819a6420 T drm_dp_decode_sideband_req +ffffffff819a6970 T drm_dp_dump_sideband_msg_req_body +ffffffff819a6d30 T drm_dp_mst_get_port_malloc +ffffffff819a6d80 T drm_dp_mst_put_port_malloc +ffffffff819a6e80 t kref_put +ffffffff819a6ec0 T drm_atomic_get_mst_payload_state +ffffffff819a6f20 T drm_dp_mst_dpcd_read +ffffffff819a71e0 T drm_dp_mst_dpcd_write +ffffffff819a7230 t drm_dp_send_dpcd_write +ffffffff819a7470 T drm_dp_mst_connector_late_register +ffffffff819a74f0 T drm_dp_mst_connector_early_unregister +ffffffff819a7530 T drm_dp_send_power_updown_phy +ffffffff819a7770 t drm_dp_mst_topology_put_port +ffffffff819a78a0 t drm_dp_mst_wait_tx_reply +ffffffff819a7bf0 T drm_dp_send_query_stream_enc_status +ffffffff819a7eb0 T drm_dp_add_payload_part1 +ffffffff819a8060 T drm_dp_remove_payload +ffffffff819a8200 T drm_dp_add_payload_part2 +ffffffff819a83c0 T drm_dp_get_vc_payload_bw +ffffffff819a8460 T drm_dp_read_mst_cap +ffffffff819a84c0 T drm_dp_mst_topology_mgr_set_mst +ffffffff819a8780 t drm_dp_dpcd_write_payload +ffffffff819a8910 t drm_dp_mst_topology_put_mstb +ffffffff819a8a10 T drm_dp_mst_topology_mgr_suspend +ffffffff819a8ad0 t drm_dp_mst_topology_mgr_invalidate_mstb +ffffffff819a8b40 T drm_dp_mst_topology_mgr_resume +ffffffff819a8d80 T drm_dp_mst_hpd_irq +ffffffff819a9bf0 T drm_dp_mst_detect_port +ffffffff819a9d70 T drm_dp_mst_get_edid +ffffffff819a9e80 T drm_dp_atomic_find_time_slots +ffffffff819aa150 T drm_atomic_get_mst_topology_state +ffffffff819aa160 T drm_dp_atomic_release_time_slots +ffffffff819aa380 T drm_dp_mst_atomic_setup_commit +ffffffff819aa510 T drm_dp_mst_atomic_wait_for_dependencies +ffffffff819aa690 T drm_dp_mst_root_conn_atomic_check +ffffffff819aa7b0 T drm_dp_mst_update_slots +ffffffff819aa810 T drm_dp_check_act_status +ffffffff819aa9c0 T drm_dp_calc_pbn_mode +ffffffff819aaa30 T drm_dp_mst_dump_topology +ffffffff819aac80 t drm_dp_mst_dump_mstb +ffffffff819aacf0 T drm_dp_mst_add_affected_dsc_crtcs +ffffffff819aae20 T drm_dp_mst_dsc_aux_for_port +ffffffff819ab050 T drm_dp_mst_atomic_enable_dsc +ffffffff819ab1f0 T drm_dp_mst_atomic_check +ffffffff819ab4e0 t drm_dp_mst_atomic_check_mstb_bw_limit +ffffffff819ab7b0 t drm_dp_mst_duplicate_state +ffffffff819ab980 t drm_dp_mst_destroy_state +ffffffff819aba40 T drm_atomic_get_old_mst_topology_state +ffffffff819aba50 T drm_atomic_get_new_mst_topology_state +ffffffff819aba60 T drm_dp_mst_topology_mgr_init +ffffffff819abcd0 t drm_dp_mst_link_probe_work +ffffffff819abf70 t drm_dp_tx_work +ffffffff819abfc0 t drm_dp_delayed_destroy_work +ffffffff819ac3e0 t drm_dp_mst_up_req_work +ffffffff819ac8f0 T drm_dp_mst_topology_mgr_destroy +ffffffff819ac980 t drm_dp_mst_is_virtual_dpcd +ffffffff819aca60 t drm_dp_free_mst_branch_device +ffffffff819acaa0 t drm_dp_mst_topology_get_port_validated_locked +ffffffff819acb20 t drm_dp_mst_dump_sideband_msg_tx +ffffffff819acd30 t process_single_down_tx_qlock +ffffffff819acea0 t process_single_tx_qlock +ffffffff819ad380 t drm_dp_msg_data_crc4 +ffffffff819ad4a0 t drm_dp_payload_send_msg +ffffffff819ad8f0 t drm_dp_mst_topology_get_mstb_validated_locked +ffffffff819ad970 t drm_dp_get_one_sb_msg +ffffffff819ae090 t drm_dp_get_mst_branch_device +ffffffff819ae200 t drm_dp_check_and_send_link_address +ffffffff819ae2d0 t drm_dp_send_link_address +ffffffff819aef80 t drm_dp_send_enum_path_resources +ffffffff819af1e0 t drm_dp_port_set_pdt +ffffffff819af4c0 t drm_dp_mst_port_add_connector +ffffffff819af6a0 t drm_dp_mst_i2c_xfer +ffffffff819afda0 t drm_dp_mst_i2c_functionality +ffffffff819afdd0 t get_mst_branch_device_by_guid_helper +ffffffff819b0000 T drm_dsc_dp_pps_header_init +ffffffff819b0030 T drm_dsc_dp_rc_buffer_size +ffffffff819b0090 T drm_dsc_pps_payload_pack +ffffffff819b0330 T drm_dsc_compute_rc_parameters +ffffffff819b1000 T drm_connector_attach_content_protection_property +ffffffff819b1030 T drm_hdcp_check_ksvs_revoked +ffffffff819b1080 T drm_hdcp_update_content_protection +ffffffff819b2000 T drm_hdmi_infoframe_set_hdr_metadata +ffffffff819b2120 T drm_hdmi_avi_infoframe_colorimetry +ffffffff819b2170 T drm_hdmi_avi_infoframe_bars +ffffffff819b21c0 T drm_hdmi_avi_infoframe_content_type +ffffffff819b3000 T drm_scdc_read +ffffffff819b3090 T drm_scdc_write +ffffffff819b3170 T drm_scdc_get_scrambling_status +ffffffff819b3230 T drm_scdc_set_scrambling +ffffffff819b3380 T drm_scdc_set_high_tmds_clock_ratio +ffffffff819b4000 T drm_gem_ttm_mmap +ffffffff819b4070 T drm_gem_ttm_vmap +ffffffff819b4080 T drm_gem_ttm_vunmap +ffffffff819b5000 T ttm_agp_bind +ffffffff819b5050 T ttm_agp_unbind +ffffffff819b5070 T ttm_agp_is_bound +ffffffff819b50c0 T ttm_agp_destroy +ffffffff819b50e0 T ttm_agp_tt_create +ffffffff819b6000 T ttm_bo_move_to_lru_tail +ffffffff819b6040 T ttm_bo_set_bulk_move +ffffffff819b6100 T ttm_bo_delayed_delete +ffffffff819b63f0 t ttm_bo_cleanup_refs +ffffffff819b67a0 T ttm_bo_put +ffffffff819b6ce0 T ttm_bo_lock_delayed_workqueue +ffffffff819b6d60 T ttm_bo_unlock_delayed_workqueue +ffffffff819b6dd0 T ttm_bo_eviction_valuable +ffffffff819b6e20 T ttm_mem_evict_first +ffffffff819b76e0 T ttm_bo_pin +ffffffff819b7780 T ttm_bo_unpin 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ttm_bo_vm_fault_reserved +ffffffff819bb570 T ttm_bo_vm_fault +ffffffff819bb6d0 T ttm_bo_vm_reference +ffffffff819bb700 T ttm_bo_vm_detach +ffffffff819bb710 T ttm_bo_mmap_obj +ffffffff819bc000 T ttm_global_swapout +ffffffff819bc100 T ttm_device_swapout +ffffffff819bc220 T ttm_device_init +ffffffff819bc470 t ttm_device_delayed_workqueue +ffffffff819bc510 T ttm_device_fini +ffffffff819bc6f0 T ttm_device_clear_dma_mappings +ffffffff819bc7a0 t ttm_device_clear_lru_dma_mappings +ffffffff819bc850 t __delayed_work_tick +ffffffff819bd000 T ttm_eu_backoff_reservation +ffffffff819bd130 T ttm_eu_reserve_buffers +ffffffff819bd530 T ttm_eu_fence_buffer_objects +ffffffff819bd680 t __ww_mutex_lock +ffffffff819be000 T ttm_prot_from_caching +ffffffff819bf000 T ttm_pool_alloc +ffffffff819bfae0 t ttm_pool_free_range +ffffffff819bfd90 T ttm_pool_free +ffffffff819bffa0 T ttm_pool_init +ffffffff819c0250 T ttm_pool_fini +ffffffff819c0420 t ttm_pool_type_fini +ffffffff819c0660 T ttm_pool_mgr_init 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intel_combo_phy_power_up_lanes +ffffffff81a01120 T intel_combo_phy_init +ffffffff81a015c0 T intel_combo_phy_uninit +ffffffff81a01780 t icl_combo_phy_verify_state +ffffffff81a02000 T intel_connector_init +ffffffff81a02070 T intel_connector_alloc +ffffffff81a02100 T intel_connector_free +ffffffff81a02140 T intel_connector_destroy +ffffffff81a021c0 T intel_connector_register +ffffffff81a021d0 T intel_connector_unregister +ffffffff81a021e0 T intel_connector_attach_encoder +ffffffff81a02200 T intel_connector_get_hw_state +ffffffff81a02250 T intel_connector_get_pipe +ffffffff81a02310 T intel_connector_update_modes +ffffffff81a02340 T intel_ddc_get_modes +ffffffff81a023c0 T intel_attach_force_audio_property +ffffffff81a02460 T intel_attach_broadcast_rgb_property +ffffffff81a02500 T intel_attach_aspect_ratio_property +ffffffff81a02560 T intel_attach_hdmi_colorspace_property +ffffffff81a025b0 T intel_attach_dp_colorspace_property +ffffffff81a03000 T intel_crt_port_enabled +ffffffff81a03080 T intel_crt_reset +ffffffff81a03170 T intel_crt_init +ffffffff81a035a0 t hsw_crt_get_config +ffffffff81a03650 t hsw_crt_compute_config +ffffffff81a03740 t hsw_pre_pll_enable_crt +ffffffff81a037b0 t hsw_pre_enable_crt +ffffffff81a03850 t hsw_enable_crt +ffffffff81a03a20 t hsw_disable_crt +ffffffff81a03a90 t hsw_post_disable_crt +ffffffff81a03c30 t pch_crt_compute_config +ffffffff81a03c80 t pch_disable_crt +ffffffff81a03cb0 t pch_post_disable_crt +ffffffff81a03da0 t intel_crt_compute_config +ffffffff81a03df0 t intel_disable_crt +ffffffff81a03ee0 t intel_crt_get_config +ffffffff81a03f90 t intel_crt_get_hw_state +ffffffff81a04050 t intel_enable_crt +ffffffff81a04140 t intel_spurious_crt_detect_dmi_callback +ffffffff81a041a0 t intel_crt_get_modes +ffffffff81a042b0 t intel_crt_detect +ffffffff81a04da0 t intel_crt_mode_valid +ffffffff81a04e90 t intel_crt_get_edid +ffffffff81a04f30 t intel_crt_detect_ddc +ffffffff81a05000 T intel_first_crtc +ffffffff81a05020 T intel_crtc_for_pipe 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i845_check_cursor +ffffffff81a096d0 t i9xx_cursor_max_stride +ffffffff81a09710 t i9xx_cursor_update_arm +ffffffff81a09ad0 t i9xx_cursor_disable_arm +ffffffff81a09af0 t i9xx_cursor_get_hw_state +ffffffff81a09bd0 t i9xx_check_cursor +ffffffff81a09e50 t intel_check_cursor +ffffffff81a0a060 t intel_legacy_cursor_update +ffffffff81a0a430 t intel_cursor_format_mod_supported +ffffffff81a0b000 T hsw_prepare_dp_ddi_buffers +ffffffff81a0b1b0 T intel_wait_ddi_buf_idle +ffffffff81a0b3d0 T intel_ddi_set_dp_msa +ffffffff81a0b5c0 T intel_ddi_enable_transcoder_func +ffffffff81a0b6b0 t intel_ddi_transcoder_func_reg_val_get +ffffffff81a0b930 T intel_ddi_disable_transcoder_func +ffffffff81a0bb20 T intel_ddi_toggle_hdcp_bits +ffffffff81a0bc60 T intel_ddi_connector_get_hw_state +ffffffff81a0bdb0 T intel_ddi_get_hw_state +ffffffff81a0be20 t intel_ddi_get_encoder_pipes +ffffffff81a0c280 T intel_ddi_enable_pipe_clock +ffffffff81a0c340 T intel_ddi_disable_pipe_clock +ffffffff81a0c3b0 T intel_ddi_level +ffffffff81a0c580 T icl_ddi_combo_get_pll +ffffffff81a0c600 T hsw_ddi_enable_clock +ffffffff81a0c6c0 T hsw_ddi_disable_clock +ffffffff81a0c700 T hsw_ddi_is_clock_enabled +ffffffff81a0c760 T intel_ddi_enable_clock +ffffffff81a0c7a0 T intel_ddi_disable_clock +ffffffff81a0c7e0 T intel_ddi_sanitize_encoder_pll_mapping +ffffffff81a0c9c0 T dp_tp_ctl_reg +ffffffff81a0ca40 T dp_tp_status_reg +ffffffff81a0cac0 T intel_ddi_update_pipe +ffffffff81a0cb50 T intel_ddi_compute_min_voltage_level +ffffffff81a0cbc0 T intel_ddi_get_clock +ffffffff81a0ccd0 T hsw_ddi_get_config +ffffffff81a0cdc0 t intel_ddi_get_config +ffffffff81a0d630 T intel_ddi_init +ffffffff81a0e1d0 t intel_ddi_hotplug +ffffffff81a0e600 t intel_ddi_compute_output_type +ffffffff81a0e680 t intel_ddi_compute_config +ffffffff81a0e7c0 t intel_ddi_compute_config_late +ffffffff81a0ea70 t intel_enable_ddi +ffffffff81a0f250 t intel_ddi_pre_pll_enable +ffffffff81a0f3c0 t intel_ddi_pre_enable +ffffffff81a10090 t intel_disable_ddi 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icl_ddi_combo_get_config +ffffffff81a119e0 t icl_ddi_combo_enable_clock +ffffffff81a11b40 t icl_ddi_combo_disable_clock +ffffffff81a11be0 t icl_ddi_combo_is_clock_enabled +ffffffff81a11c60 t icl_ddi_tc_enable_clock +ffffffff81a11e40 t icl_ddi_tc_disable_clock +ffffffff81a11f20 t icl_ddi_tc_is_clock_enabled +ffffffff81a11fe0 t icl_ddi_tc_get_config +ffffffff81a12220 t bxt_ddi_get_config +ffffffff81a12290 t skl_ddi_enable_clock +ffffffff81a123a0 t skl_ddi_disable_clock +ffffffff81a12430 t skl_ddi_is_clock_enabled +ffffffff81a124a0 t skl_ddi_get_config +ffffffff81a12530 t icl_combo_phy_set_signal_levels +ffffffff81a13000 t tgl_dkl_phy_set_signal_levels +ffffffff81a13300 t icl_mg_phy_set_signal_levels +ffffffff81a13c30 t hsw_set_signal_levels +ffffffff81a13fa0 t intel_ddi_update_prepare +ffffffff81a14120 t intel_ddi_update_complete +ffffffff81a14160 t lpt_digital_port_connected +ffffffff81a141d0 t bdw_digital_port_connected +ffffffff81a14240 t hsw_digital_port_connected +ffffffff81a142b0 t intel_ddi_encoder_reset +ffffffff81a142f0 t intel_ddi_encoder_destroy +ffffffff81a143a0 t icl_program_mg_dp_mode +ffffffff81a14630 t intel_ddi_init_dp_buf_reg +ffffffff81a147f0 t intel_disable_ddi_buf +ffffffff81a14b10 t intel_ddi_prepare_link_retrain +ffffffff81a15180 t intel_ddi_set_link_train +ffffffff81a152e0 t intel_ddi_set_idle_link_train +ffffffff81a15500 t intel_ddi_dp_voltage_max +ffffffff81a155c0 t intel_ddi_dp_preemph_max +ffffffff81a16000 T is_hobl_buf_trans +ffffffff81a16040 T intel_ddi_buf_trans_init +ffffffff81a16300 t dg2_get_snps_buf_trans +ffffffff81a16370 t adlp_get_combo_buf_trans +ffffffff81a164a0 t adlp_get_dkl_buf_trans +ffffffff81a16500 t adls_get_combo_buf_trans +ffffffff81a16630 t rkl_get_combo_buf_trans +ffffffff81a16760 t dg1_get_combo_buf_trans +ffffffff81a16890 t tgl_get_combo_buf_trans +ffffffff81a169e0 t tgl_get_dkl_buf_trans +ffffffff81a16a40 t jsl_get_combo_buf_trans +ffffffff81a16af0 t ehl_get_combo_buf_trans +ffffffff81a16ba0 t icl_get_combo_buf_trans +ffffffff81a16c50 t icl_get_mg_buf_trans +ffffffff81a16cb0 t bxt_get_buf_trans +ffffffff81a16d40 t kbl_y_get_buf_trans +ffffffff81a16df0 t kbl_u_get_buf_trans +ffffffff81a16ea0 t kbl_get_buf_trans +ffffffff81a16f50 t skl_y_get_buf_trans +ffffffff81a17000 t skl_u_get_buf_trans +ffffffff81a170b0 t skl_get_buf_trans +ffffffff81a17160 t bdw_get_buf_trans +ffffffff81a17200 t hsw_get_buf_trans +ffffffff81a18000 T intel_update_watermarks +ffffffff81a18040 T vlv_get_hpll_vco +ffffffff81a18090 T vlv_get_cck_clock +ffffffff81a18140 T vlv_get_cck_clock_hpll +ffffffff81a18240 T is_trans_port_sync_mode +ffffffff81a18280 T intel_crtc_bigjoiner_slave_pipes +ffffffff81a182e0 T intel_crtc_is_bigjoiner_slave +ffffffff81a18340 T intel_crtc_is_bigjoiner_master +ffffffff81a183a0 T intel_master_crtc +ffffffff81a18440 T assert_transcoder +ffffffff81a185f0 T vlv_wait_port_ready +ffffffff81a18740 T intel_enable_transcoder +ffffffff81a18a30 T intel_disable_transcoder +ffffffff81a18d30 T intel_rotation_info_size +ffffffff81a18d80 T intel_remapped_info_size +ffffffff81a18eb0 T intel_plane_uses_fence +ffffffff81a18f00 T intel_fb_xy_to_linear +ffffffff81a18f50 T intel_add_fb_offsets +ffffffff81a18fa0 T intel_plane_fb_max_stride +ffffffff81a19020 T intel_set_plane_visible +ffffffff81a19070 T intel_plane_fixup_bitmasks +ffffffff81a19120 T intel_plane_disable_noatomic +ffffffff81a19310 T intel_plane_fence_y_offset +ffffffff81a19370 T intel_display_prepare_reset +ffffffff81a19550 T intel_display_finish_reset +ffffffff81a19750 t __intel_display_resume +ffffffff81a19860 T intel_modeset_init_hw +ffffffff81a19900 T intel_has_pending_fb_unpin +ffffffff81a19a00 T intel_get_crtc_new_encoder +ffffffff81a19ba0 T ilk_pfit_disable +ffffffff81a19c60 T intel_phy_is_combo +ffffffff81a19ce0 T intel_phy_is_tc +ffffffff81a19d50 T intel_phy_is_snps +ffffffff81a19d90 T intel_port_to_phy +ffffffff81a19e20 T intel_port_to_tc +ffffffff81a19f20 T intel_aux_power_domain +ffffffff81a19f60 T intel_modeset_get_crtc_power_domains +ffffffff81a1a180 T intel_modeset_put_crtc_power_domains +ffffffff81a1a1b0 T intel_display_suspend +ffffffff81a1a250 T intel_encoder_destroy +ffffffff81a1a280 T intel_encoder_get_config +ffffffff81a1a2b0 t intel_crtc_readout_derived_state +ffffffff81a1a6e0 T intel_link_compute_m_n +ffffffff81a1a810 T intel_zero_m_n +ffffffff81a1a850 T intel_set_m_n +ffffffff81a1a910 T intel_cpu_transcoder_has_m2_n2 +ffffffff81a1a970 T intel_cpu_transcoder_set_m1_n1 +ffffffff81a1ab30 T intel_cpu_transcoder_set_m2_n2 +ffffffff81a1ac90 T i9xx_set_pipeconf +ffffffff81a1ae40 T ilk_set_pipeconf +ffffffff81a1b020 T bdw_get_pipemisc_bpp +ffffffff81a1b110 T ilk_get_lanes_required +ffffffff81a1b170 T intel_get_m_n +ffffffff81a1b280 T intel_cpu_transcoder_get_m1_n1 +ffffffff81a1b420 T intel_cpu_transcoder_get_m2_n2 +ffffffff81a1b590 T intel_crtc_get_pipe_config +ffffffff81a1b600 T intel_get_load_detect_pipe +ffffffff81a1ba20 T intel_release_load_detect_pipe +ffffffff81a1baf0 T i9xx_crtc_clock_get +ffffffff81a1bd80 T intel_dotclock_calculate +ffffffff81a1bde0 T intel_crtc_dotclock +ffffffff81a1beb0 T intel_encoder_current_mode +ffffffff81a1c060 T intel_fuzzy_clock_check +ffffffff81a1c0b0 T intel_pipe_config_compare +ffffffff81a1eba0 t pipe_config_mismatch +ffffffff81a1ec90 t pipe_config_infoframe_mismatch +ffffffff81a1ee40 T intel_modeset_all_pipes +ffffffff81a1efe0 T intel_atomic_add_affected_planes +ffffffff81a1f0b0 T intel_crtc_update_active_timings +ffffffff81a1f1b0 T intel_calc_active_pipes +ffffffff81a1f240 T intel_crtc_arm_fifo_underrun +ffffffff81a1f2e0 T intel_plane_destroy +ffffffff81a1f310 T intel_get_pipe_from_crtc_id_ioctl +ffffffff81a1f380 T intel_mode_valid_max_plane_size +ffffffff81a1f400 T intel_init_display_hooks +ffffffff81a1f4e0 T intel_modeset_init_noirq +ffffffff81a1f7a0 t intel_atomic_helper_free_state_worker +ffffffff81a1f810 T intel_modeset_init_nogem +ffffffff81a20940 T intel_modeset_init +ffffffff81a20b60 T i830_enable_pipe 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intel_commit_modeset_enables +ffffffff81a25450 t ilk_get_pipe_config +ffffffff81a257a0 t ilk_crtc_enable +ffffffff81a25e50 t ilk_crtc_disable +ffffffff81a260e0 t i9xx_get_pipe_config +ffffffff81a26a10 t valleyview_crtc_enable +ffffffff81a26e20 t i9xx_crtc_disable +ffffffff81a271b0 t i9xx_pfit_enable +ffffffff81a27310 t i9xx_crtc_enable +ffffffff81a27690 t intel_mode_valid +ffffffff81a27840 t intel_atomic_check +ffffffff81a2ab50 t intel_atomic_commit +ffffffff81a2aec0 t copy_bigjoiner_crtc_state_nomodeset +ffffffff81a2afc0 t intel_crtc_copy_uapi_to_hw_state_modeset +ffffffff81a2b120 t intel_atomic_commit_ready +ffffffff81a2b1c0 t intel_atomic_commit_work +ffffffff81a2b1e0 t intel_atomic_commit_tail +ffffffff81a2c5c0 t intel_atomic_cleanup_work +ffffffff81a2d000 T intel_display_power_domain_str +ffffffff81a2d060 T __intel_display_power_is_enabled +ffffffff81a2d130 T intel_display_power_is_enabled +ffffffff81a2d240 T intel_display_power_set_target_dc_state +ffffffff81a2d360 T intel_display_power_get +ffffffff81a2d3e0 t __intel_display_power_get_domain +ffffffff81a2d5c0 T intel_display_power_get_if_enabled +ffffffff81a2d6f0 T __intel_display_power_put_async +ffffffff81a2d8c0 t __intel_display_power_put_domain +ffffffff81a2da40 T intel_display_power_flush_work +ffffffff81a2db60 t release_async_put_domains +ffffffff81a2dc40 T intel_display_power_put_unchecked +ffffffff81a2dca0 T intel_display_power_get_in_set +ffffffff81a2dd80 T intel_display_power_get_in_set_if_enabled +ffffffff81a2de30 T intel_display_power_put_mask_in_set +ffffffff81a2df00 T intel_power_domains_init +ffffffff81a2e150 t intel_display_power_put_async_work +ffffffff81a2e3c0 T intel_power_domains_cleanup +ffffffff81a2e3e0 T gen9_dbuf_slices_update +ffffffff81a2e600 T intel_power_domains_init_hw +ffffffff81a2eda0 t icl_display_core_init +ffffffff81a2f690 t bxt_display_core_init +ffffffff81a2f7c0 T intel_power_domains_driver_remove +ffffffff81a2f8b0 T intel_power_domains_sanitize_state +ffffffff81a2f9a0 T intel_power_domains_enable +ffffffff81a2fa00 T intel_power_domains_disable +ffffffff81a2fab0 T intel_power_domains_suspend +ffffffff81a2fc40 t icl_display_core_uninit +ffffffff81a2fce0 t bxt_display_core_uninit +ffffffff81a2fd90 T intel_power_domains_resume +ffffffff81a2fe60 T intel_display_power_suspend_late +ffffffff81a2ff50 t hsw_enable_pc8 +ffffffff81a308f0 T intel_display_power_resume_early +ffffffff81a309e0 t hsw_disable_pc8 +ffffffff81a30e60 T intel_display_power_suspend +ffffffff81a30ee0 T intel_display_power_resume +ffffffff81a30fc0 T intel_display_power_debug +ffffffff81a31090 T intel_display_power_ddi_io_domain +ffffffff81a31170 T intel_display_power_ddi_lanes_domain +ffffffff81a31250 T intel_display_power_legacy_aux_domain +ffffffff81a31360 T intel_display_power_tbt_aux_domain +ffffffff81a31470 t __delayed_work_tick +ffffffff81a32000 T intel_display_power_map_init +ffffffff81a32170 t __set_power_wells +ffffffff81a32550 T intel_display_power_map_cleanup +ffffffff81a33000 T lookup_power_well +ffffffff81a330c0 T intel_power_well_enable +ffffffff81a33150 T intel_power_well_name +ffffffff81a33190 T intel_power_well_disable +ffffffff81a33200 T intel_power_well_sync_hw +ffffffff81a33270 T intel_power_well_get +ffffffff81a33310 T intel_power_well_put +ffffffff81a33410 T intel_power_well_is_enabled +ffffffff81a33430 T intel_power_well_is_enabled_cached +ffffffff81a33460 T intel_display_power_well_is_enabled +ffffffff81a33520 T intel_power_well_is_always_on +ffffffff81a33560 T intel_power_well_domains +ffffffff81a33590 T intel_power_well_refcount +ffffffff81a335c0 T gen9_sanitize_dc_state +ffffffff81a336a0 T gen9_set_dc_state +ffffffff81a33a00 T gen9_enable_dc5 +ffffffff81a33c60 T skl_enable_dc6 +ffffffff81a33db0 T bxt_enable_dc9 +ffffffff81a33f60 T bxt_disable_dc9 +ffffffff81a34050 T gen9_disable_dc_states +ffffffff81a34420 T chv_phy_powergate_ch +ffffffff81a34530 t assert_chv_phy_status +ffffffff81a348d0 T chv_phy_powergate_lanes +ffffffff81a34b90 t i9xx_power_well_sync_hw_noop +ffffffff81a34bc0 t i9xx_always_on_power_well_noop +ffffffff81a34bf0 t i9xx_always_on_power_well_enabled +ffffffff81a34c20 t chv_pipe_power_well_sync_hw +ffffffff81a34c50 t chv_pipe_power_well_enable +ffffffff81a34c80 t chv_pipe_power_well_disable +ffffffff81a34ce0 t chv_pipe_power_well_enabled +ffffffff81a34de0 t chv_dpio_cmn_power_well_enable +ffffffff81a34ff0 t chv_dpio_cmn_power_well_disable +ffffffff81a35120 t vlv_power_well_enabled +ffffffff81a35230 t i830_pipes_power_well_sync_hw +ffffffff81a35320 t i830_pipes_power_well_enable +ffffffff81a353e0 t i830_pipes_power_well_disable +ffffffff81a35410 t i830_pipes_power_well_enabled +ffffffff81a354b0 t hsw_power_well_sync_hw +ffffffff81a355a0 t hsw_power_well_enable +ffffffff81a35820 t hsw_power_well_disable +ffffffff81a358d0 t hsw_power_well_enabled +ffffffff81a359b0 t gen9_dc_off_power_well_enable +ffffffff81a359c0 t gen9_dc_off_power_well_disable +ffffffff81a35a60 t gen9_dc_off_power_well_enabled +ffffffff81a35af0 t bxt_dpio_cmn_power_well_enable +ffffffff81a35b20 t bxt_dpio_cmn_power_well_disable +ffffffff81a35b50 t bxt_dpio_cmn_power_well_enabled +ffffffff81a35b80 t vlv_display_power_well_enable +ffffffff81a35bb0 t vlv_display_power_well_disable +ffffffff81a35c20 t vlv_dpio_cmn_power_well_enable +ffffffff81a35ca0 t vlv_dpio_cmn_power_well_disable +ffffffff81a35da0 t vlv_power_well_enable +ffffffff81a35dc0 t vlv_power_well_disable +ffffffff81a35de0 t icl_aux_power_well_enable +ffffffff81a36460 t icl_aux_power_well_disable +ffffffff81a36700 t tgl_tc_cold_off_power_well_sync_hw +ffffffff81a36720 t tgl_tc_cold_off_power_well_enable +ffffffff81a36740 t tgl_tc_cold_off_power_well_disable +ffffffff81a36760 t tgl_tc_cold_off_power_well_is_enabled +ffffffff81a36790 t xelpdp_aux_power_well_enable +ffffffff81a36870 t xelpdp_aux_power_well_disable +ffffffff81a36950 t xelpdp_aux_power_well_enabled +ffffffff81a36a00 t chv_set_pipe_power_well +ffffffff81a36c00 t vlv_display_power_well_init +ffffffff81a36e90 t vlv_set_power_well +ffffffff81a370a0 t hsw_wait_for_power_well_enable +ffffffff81a371e0 t hsw_wait_for_power_well_disable +ffffffff81a37470 t tgl_tc_cold_request +ffffffff81a38000 T intel_dkl_phy_read +ffffffff81a38100 T intel_dkl_phy_write +ffffffff81a381f0 T intel_dkl_phy_rmw +ffffffff81a38310 T intel_dkl_phy_posting_read +ffffffff81a39000 T intel_dmc_has_payload +ffffffff81a39040 T intel_dmc_load_program +ffffffff81a39820 t pipedmc_clock_gating_wa +ffffffff81a39a10 T intel_dmc_disable_program +ffffffff81a39c30 T assert_dmc_loaded +ffffffff81a39d80 T intel_dmc_ucode_init +ffffffff81a3a050 t dmc_load_work_fn +ffffffff81a3a8b0 T intel_dmc_ucode_suspend +ffffffff81a3a920 T intel_dmc_ucode_resume +ffffffff81a3a9c0 T intel_dmc_ucode_fini +ffffffff81a3aaf0 T intel_dmc_print_error_state +ffffffff81a3aba0 T intel_dmc_debugfs_register +ffffffff81a3b000 T intel_dp_is_edp +ffffffff81a3b030 T intel_dp_is_uhbr +ffffffff81a3b070 T intel_dp_max_lane_count +ffffffff81a3b0e0 T intel_dp_link_required +ffffffff81a3b120 T intel_dp_max_data_rate +ffffffff81a3b190 T intel_dp_can_bigjoiner +ffffffff81a3b1e0 T intel_dp_get_link_train_fallback_values +ffffffff81a3b5c0 T intel_dp_mode_to_fec_clock +ffffffff81a3b610 T intel_dp_min_bpp +ffffffff81a3b650 T intel_dp_source_supports_tps3 +ffffffff81a3b6a0 T intel_dp_source_supports_tps4 +ffffffff81a3b6d0 T intel_dp_max_link_rate +ffffffff81a3b790 T intel_dp_rate_select +ffffffff81a3b830 T intel_dp_compute_rate +ffffffff81a3b900 T intel_dp_adjust_compliance_config +ffffffff81a3ba40 T intel_dp_limited_color_range +ffffffff81a3bab0 T intel_dp_compute_psr_vsc_sdp +ffffffff81a3bb30 T intel_dp_needs_vsc_sdp +ffffffff81a3bb80 t intel_dp_compute_vsc_colorimetry +ffffffff81a3bd00 T intel_dp_compute_config +ffffffff81a3c390 t intel_dp_compute_output_format +ffffffff81a3c5c0 T intel_dp_set_link_params +ffffffff81a3c600 T intel_edp_backlight_on +ffffffff81a3c6b0 T intel_edp_backlight_off +ffffffff81a3c760 T intel_dp_sink_set_decompression_state +ffffffff81a3c800 T intel_dp_wait_source_oui +ffffffff81a3c8d0 T intel_dp_set_power +ffffffff81a3cae0 T intel_dp_sync_state +ffffffff81a3cb60 t intel_dp_get_dpcd +ffffffff81a3ccc0 t intel_dp_reset_max_link_params +ffffffff81a3cdd0 T intel_dp_initial_fastset_check +ffffffff81a3ced0 T intel_dp_check_frl_training +ffffffff81a3d460 T intel_dp_pcon_dsc_configure +ffffffff81a3d630 T intel_dp_configure_protocol_converter +ffffffff81a3d7a0 T intel_dp_get_colorimetry_status +ffffffff81a3d800 T intel_edp_fixup_vbt_bpp +ffffffff81a3d8a0 T intel_write_dp_vsc_sdp +ffffffff81a3da30 T intel_dp_set_infoframes +ffffffff81a3db60 t intel_write_dp_sdp +ffffffff81a3de50 T intel_read_dp_sdp +ffffffff81a3e180 T intel_dp_retrain_link +ffffffff81a3e840 T intel_dp_phy_test +ffffffff81a3ef20 T intel_digital_port_connected +ffffffff81a3efc0 T intel_dp_encoder_flush_work +ffffffff81a3f010 T intel_dp_encoder_suspend +ffffffff81a3f050 T intel_dp_encoder_shutdown +ffffffff81a3f090 T intel_dp_hpd_pulse +ffffffff81a3f7e0 T intel_dp_is_port_edp +ffffffff81a3f830 T intel_dp_init_connector +ffffffff81a40990 t intel_dp_modeset_retry_work_fn +ffffffff81a40a10 t intel_dp_set_common_rates +ffffffff81a40bb0 T intel_dp_mst_suspend +ffffffff81a40c50 T intel_dp_mst_resume +ffffffff81a40d00 t intel_dp_compute_link_config +ffffffff81a41a20 t intel_dp_dsc_get_slice_count +ffffffff81a41b90 t intel_dp_set_sink_rates +ffffffff81a41dc0 t intel_dp_check_device_service_irq +ffffffff81a42390 t intel_dp_force +ffffffff81a424d0 t intel_dp_connector_register +ffffffff81a425b0 t intel_dp_connector_unregister +ffffffff81a42610 t intel_dp_oob_hotplug_event +ffffffff81a42690 t intel_dp_set_edid +ffffffff81a42ac0 t intel_dp_get_modes +ffffffff81a42bc0 t intel_dp_detect +ffffffff81a434b0 t intel_dp_mode_valid +ffffffff81a43c40 t intel_dp_connector_atomic_check +ffffffff81a43f80 t intel_dp_get_dsc_sink_cap +ffffffff81a45000 T intel_dp_aux_fini +ffffffff81a45020 T intel_dp_aux_init +ffffffff81a45200 t xelpdp_aux_ctl_reg +ffffffff81a452c0 t xelpdp_aux_data_reg +ffffffff81a45390 t tgl_aux_ctl_reg +ffffffff81a45410 t tgl_aux_data_reg +ffffffff81a454a0 t skl_aux_ctl_reg +ffffffff81a45520 t skl_aux_data_reg +ffffffff81a455b0 t ilk_aux_ctl_reg +ffffffff81a45630 t ilk_aux_data_reg +ffffffff81a456c0 t g4x_aux_ctl_reg +ffffffff81a45740 t g4x_aux_data_reg +ffffffff81a457d0 t skl_get_aux_clock_divider +ffffffff81a45800 t hsw_get_aux_clock_divider +ffffffff81a458a0 t ilk_get_aux_clock_divider +ffffffff81a45900 t g4x_get_aux_clock_divider +ffffffff81a45950 t skl_get_aux_send_ctl +ffffffff81a459d0 t g4x_get_aux_send_ctl +ffffffff81a45a20 t kasprintf +ffffffff81a45af0 t intel_dp_aux_transfer +ffffffff81a45d40 t intel_dp_aux_xfer +ffffffff81a47000 T intel_dp_aux_init_backlight_funcs +ffffffff81a47270 t intel_dp_aux_hdr_setup_backlight +ffffffff81a473c0 t intel_dp_aux_hdr_get_backlight +ffffffff81a47530 t intel_dp_aux_hdr_set_backlight +ffffffff81a47620 t intel_dp_aux_hdr_disable_backlight +ffffffff81a476a0 t intel_dp_aux_hdr_enable_backlight +ffffffff81a478f0 t intel_dp_aux_vesa_setup_backlight +ffffffff81a47ab0 t intel_dp_aux_vesa_get_backlight +ffffffff81a47ae0 t intel_dp_aux_vesa_set_backlight +ffffffff81a47b80 t intel_dp_aux_vesa_disable_backlight +ffffffff81a47c30 t intel_dp_aux_vesa_enable_backlight +ffffffff81a48000 T intel_dp_hdcp_init +ffffffff81a480b0 t intel_dp_hdcp_write_an_aksv +ffffffff81a481a0 t intel_dp_hdcp_read_bksv +ffffffff81a48230 t intel_dp_hdcp_read_bstatus +ffffffff81a482c0 t intel_dp_hdcp_repeater_present +ffffffff81a48370 t intel_dp_hdcp_read_ri_prime +ffffffff81a48400 t intel_dp_hdcp_read_ksv_ready +ffffffff81a484a0 t intel_dp_hdcp_read_ksv_fifo +ffffffff81a48590 t intel_dp_hdcp_read_v_prime_part +ffffffff81a48630 t intel_dp_hdcp_toggle_signalling +ffffffff81a48660 t intel_dp_mst_hdcp_stream_encryption +ffffffff81a48870 t intel_dp_hdcp_check_link +ffffffff81a48900 t intel_dp_hdcp_capable +ffffffff81a489b0 t intel_dp_hdcp2_capable +ffffffff81a48a30 t intel_dp_hdcp2_write_msg +ffffffff81a48af0 t intel_dp_hdcp2_read_msg +ffffffff81a491c0 t intel_dp_hdcp2_config_stream_type +ffffffff81a49270 t intel_dp_mst_hdcp2_stream_encryption +ffffffff81a49500 t intel_dp_mst_hdcp2_check_link +ffffffff81a495c0 t get_hdcp2_dp_msg_data +ffffffff81a49700 t intel_dp_hdcp2_check_link +ffffffff81a4a000 T intel_dp_init_lttpr_and_dprx_caps +ffffffff81a4a2c0 T intel_dp_get_adjust_train +ffffffff81a4a980 T intel_dp_program_link_training_pattern +ffffffff81a4aa80 T intel_dp_set_signal_levels +ffffffff81a4ade0 T intel_dp_dump_link_status +ffffffff81a4aeb0 T intel_dp_stop_link_train +ffffffff81a4b0e0 T intel_dp_start_link_train +ffffffff81a4c220 t intel_dp_link_train_phy +ffffffff81a4e000 T intel_dp_mst_encoder_active_links +ffffffff81a4e030 T intel_dp_mst_encoder_init +ffffffff81a4e270 T intel_dp_mst_source_support +ffffffff81a4e2b0 T intel_dp_mst_encoder_cleanup +ffffffff81a4e310 T intel_dp_mst_is_master_trans +ffffffff81a4e350 T intel_dp_mst_is_slave_trans +ffffffff81a4e390 T intel_dp_mst_add_topology_state_for_crtc +ffffffff81a4e460 t intel_dp_add_mst_connector +ffffffff81a4e670 t intel_dp_mst_poll_hpd_irq +ffffffff81a4e690 t intel_dp_mst_get_hw_state +ffffffff81a4e6f0 t intel_dp_mst_connector_late_register +ffffffff81a4e760 t intel_dp_mst_connector_early_unregister +ffffffff81a4e790 t intel_dp_mst_get_modes +ffffffff81a4e830 t intel_dp_mst_detect +ffffffff81a4e930 t intel_dp_mst_mode_valid_ctx +ffffffff81a4ea90 t intel_mst_atomic_best_encoder +ffffffff81a4eaf0 t intel_dp_mst_atomic_check +ffffffff81a4ec70 t intel_dp_mst_compute_config +ffffffff81a4ef80 t intel_dp_mst_compute_config_late +ffffffff81a4f080 t intel_mst_disable_dp +ffffffff81a4f170 t intel_mst_post_disable_dp +ffffffff81a4f430 t intel_mst_pre_pll_enable_dp +ffffffff81a4f480 t intel_mst_pre_enable_dp +ffffffff81a4f6a0 t intel_mst_enable_dp +ffffffff81a4fa90 t intel_dp_mst_enc_get_hw_state +ffffffff81a4fad0 t intel_dp_mst_enc_get_config +ffffffff81a4faf0 t intel_dp_mst_initial_fastset_check +ffffffff81a4fb10 t intel_dp_mst_encoder_destroy +ffffffff81a50000 T bxt_port_to_phy_channel +ffffffff81a50130 T bxt_ddi_phy_set_signal_levels +ffffffff81a50650 T bxt_ddi_phy_is_enabled +ffffffff81a507a0 T bxt_ddi_phy_uninit +ffffffff81a508a0 T bxt_ddi_phy_init +ffffffff81a50ad0 t _bxt_ddi_phy_init +ffffffff81a510f0 T bxt_ddi_phy_verify_state +ffffffff81a51430 t __phy_reg_verify_state +ffffffff81a51530 T bxt_ddi_phy_calc_lane_lat_optim_mask +ffffffff81a515a0 T bxt_ddi_phy_set_lane_optim_mask +ffffffff81a518d0 T bxt_ddi_phy_get_lane_lat_optim_mask +ffffffff81a51b20 T chv_set_phy_signal_level +ffffffff81a51e80 T chv_data_lane_soft_reset +ffffffff81a52060 T chv_phy_pre_pll_enable +ffffffff81a52300 T chv_phy_pre_encoder_enable +ffffffff81a52590 T chv_phy_release_cl2_override +ffffffff81a52620 T chv_phy_post_pll_disable +ffffffff81a526d0 T vlv_set_phy_signal_level +ffffffff81a52850 T vlv_phy_pre_pll_enable +ffffffff81a52970 T vlv_phy_pre_encoder_enable +ffffffff81a52a90 T vlv_phy_reset_lanes +ffffffff81a53000 T pnv_calc_dpll_params +ffffffff81a530c0 T i9xx_calc_dpll_params +ffffffff81a53190 T vlv_calc_dpll_params +ffffffff81a53250 T chv_calc_dpll_params +ffffffff81a53320 T bxt_find_best_dpll +ffffffff81a53340 t chv_find_best_dpll +ffffffff81a53680 T i9xx_dpll_compute_fp +ffffffff81a536c0 T vlv_compute_dpll +ffffffff81a53740 T chv_compute_dpll +ffffffff81a537c0 T intel_dpll_crtc_compute_clock +ffffffff81a538c0 T intel_dpll_crtc_get_shared_dpll +ffffffff81a53a10 T intel_dpll_init_clock_hook +ffffffff81a53b00 T i9xx_enable_pll +ffffffff81a53eb0 T vlv_enable_pll +ffffffff81a54410 T chv_enable_pll +ffffffff81a54a90 T vlv_force_pll_on +ffffffff81a54be0 T vlv_disable_pll +ffffffff81a54ca0 T chv_disable_pll +ffffffff81a54dd0 T i9xx_disable_pll +ffffffff81a54ed0 T vlv_force_pll_off +ffffffff81a54fc0 T assert_pll_enabled +ffffffff81a550a0 T assert_pll_disabled +ffffffff81a55180 t intel_pll_is_valid +ffffffff81a55250 t dg2_crtc_compute_clock +ffffffff81a552d0 t hsw_crtc_compute_clock +ffffffff81a55390 t hsw_crtc_get_shared_dpll +ffffffff81a55430 t ilk_crtc_compute_clock +ffffffff81a55730 t ilk_crtc_get_shared_dpll +ffffffff81a55780 t g4x_find_best_dpll +ffffffff81a55ac0 t chv_crtc_compute_clock +ffffffff81a55bd0 t vlv_crtc_compute_clock +ffffffff81a56090 t g4x_crtc_compute_clock +ffffffff81a561e0 t i9xx_compute_dpll +ffffffff81a56460 t pnv_crtc_compute_clock +ffffffff81a56820 t i9xx_crtc_compute_clock +ffffffff81a56940 t i9xx_find_best_dpll +ffffffff81a56c70 t i8xx_crtc_compute_clock +ffffffff81a57000 T intel_get_shared_dpll_by_id +ffffffff81a57040 T intel_get_shared_dpll_id +ffffffff81a570d0 T assert_shared_dpll +ffffffff81a571f0 T intel_dpll_get_hw_state +ffffffff81a57220 T icl_tc_port_to_pll_id +ffffffff81a57250 T intel_enable_shared_dpll +ffffffff81a57540 T intel_disable_shared_dpll +ffffffff81a57780 T intel_shared_dpll_swap_state +ffffffff81a57860 T icl_set_active_port_dpll +ffffffff81a578a0 T intel_shared_dpll_init +ffffffff81a57ab0 T intel_compute_shared_dplls +ffffffff81a57b40 T intel_reserve_shared_dplls +ffffffff81a57bd0 T intel_release_shared_dplls +ffffffff81a57c10 T intel_update_active_dpll +ffffffff81a57c70 T intel_dpll_get_freq +ffffffff81a57d00 T intel_dpll_update_ref_clks +ffffffff81a57d50 T intel_dpll_readout_hw_state +ffffffff81a57ed0 T intel_dpll_sanitize_state +ffffffff81a57fb0 T intel_dpll_dump_hw_state +ffffffff81a58030 T intel_shared_dpll_state_verify +ffffffff81a58150 t verify_single_dpll_state +ffffffff81a58470 T intel_shared_dpll_verify_disabled +ffffffff81a584f0 t icl_compute_dplls +ffffffff81a592d0 t icl_get_dplls +ffffffff81a59a50 t icl_put_dplls +ffffffff81a59b10 t icl_update_active_dpll +ffffffff81a59bc0 t icl_update_dpll_ref_clks +ffffffff81a59c00 t icl_dump_hw_state +ffffffff81a59cc0 t combo_pll_enable +ffffffff81a59ef0 t combo_pll_disable +ffffffff81a59fe0 t combo_pll_get_hw_state +ffffffff81a5a070 t icl_ddi_combo_pll_get_freq +ffffffff81a5a240 t icl_dpll_write +ffffffff81a5a4e0 t adlp_cmtg_clock_gating_wa +ffffffff81a5a640 t icl_pll_disable +ffffffff81a5a7e0 t icl_pll_get_hw_state +ffffffff81a5ab20 t tbt_pll_enable +ffffffff81a5ace0 t tbt_pll_disable +ffffffff81a5ad00 t tbt_pll_get_hw_state +ffffffff81a5ad20 t icl_ddi_tbt_pll_get_freq +ffffffff81a5ad90 t mg_pll_enable +ffffffff81a5b340 t mg_pll_disable +ffffffff81a5b380 t dkl_pll_get_hw_state +ffffffff81a5b550 t icl_ddi_mg_pll_get_freq +ffffffff81a5b630 t intel_find_shared_dpll +ffffffff81a5b960 t intel_unreference_shared_dpll +ffffffff81a5bac0 t mg_pll_get_hw_state +ffffffff81a5bd10 t bxt_compute_dpll +ffffffff81a5c030 t bxt_get_dpll +ffffffff81a5c290 t intel_put_dpll +ffffffff81a5c2f0 t bxt_update_dpll_ref_clks +ffffffff81a5c330 t bxt_dump_hw_state +ffffffff81a5c3e0 t bxt_ddi_pll_enable +ffffffff81a5cef0 t bxt_ddi_pll_disable +ffffffff81a5d100 t bxt_ddi_pll_get_hw_state +ffffffff81a5d590 t bxt_ddi_pll_get_freq +ffffffff81a5d620 t bxt_ddi_set_dpll_hw_state +ffffffff81a5d7e0 t skl_compute_dpll +ffffffff81a5df60 t skl_get_dpll +ffffffff81a5e190 t skl_update_dpll_ref_clks +ffffffff81a5e1d0 t skl_dump_hw_state +ffffffff81a5e230 t skl_ddi_dpll0_enable +ffffffff81a5e2f0 t skl_ddi_dpll0_disable +ffffffff81a5e320 t skl_ddi_dpll0_get_hw_state +ffffffff81a5e420 t skl_ddi_pll_get_freq +ffffffff81a5e4b0 t skl_ddi_wrpll_get_freq +ffffffff81a5e610 t skl_ddi_pll_enable +ffffffff81a5e830 t skl_ddi_pll_disable +ffffffff81a5e8c0 t skl_ddi_pll_get_hw_state +ffffffff81a5e9e0 t hsw_compute_dpll +ffffffff81a5f230 t hsw_get_dpll +ffffffff81a5f4f0 t hsw_update_dpll_ref_clks +ffffffff81a5f560 t hsw_dump_hw_state +ffffffff81a5f590 t hsw_ddi_wrpll_enable +ffffffff81a5f610 t hsw_ddi_wrpll_disable +ffffffff81a5f6f0 t hsw_ddi_wrpll_get_hw_state +ffffffff81a5f790 t hsw_ddi_wrpll_get_freq +ffffffff81a5f880 t hsw_ddi_spll_enable +ffffffff81a5f8e0 t hsw_ddi_spll_disable +ffffffff81a5f9b0 t hsw_ddi_spll_get_hw_state +ffffffff81a5fa40 t hsw_ddi_spll_get_freq +ffffffff81a5fae0 t hsw_ddi_lcpll_enable +ffffffff81a5fb10 t hsw_ddi_lcpll_disable +ffffffff81a5fb40 t hsw_ddi_lcpll_get_hw_state +ffffffff81a5fb70 t hsw_ddi_lcpll_get_freq +ffffffff81a5fbf0 t ibx_compute_dpll +ffffffff81a5fc20 t ibx_get_dpll +ffffffff81a5fea0 t ibx_dump_hw_state +ffffffff81a5ff00 t ibx_pch_dpll_enable +ffffffff81a600b0 t ibx_pch_dpll_disable +ffffffff81a60130 t ibx_pch_dpll_get_hw_state +ffffffff81a61000 T intel_dpt_pin +ffffffff81a611d0 T intel_dpt_unpin +ffffffff81a61240 T intel_dpt_resume +ffffffff81a61310 T intel_dpt_suspend +ffffffff81a613e0 T intel_dpt_create +ffffffff81a61710 t dpt_insert_page +ffffffff81a61780 t dpt_clear_range +ffffffff81a617b0 t dpt_insert_entries +ffffffff81a618b0 t dpt_cleanup +ffffffff81a61900 t dpt_bind_vma +ffffffff81a61990 t dpt_unbind_vma +ffffffff81a619c0 T intel_dpt_destroy +ffffffff81a61a10 t __ww_mutex_lock +ffffffff81a62000 T intel_drrs_type_str +ffffffff81a62040 T intel_drrs_is_active +ffffffff81a62070 T intel_drrs_activate +ffffffff81a62270 T intel_drrs_deactivate +ffffffff81a62350 t intel_drrs_set_state +ffffffff81a624a0 T intel_drrs_invalidate +ffffffff81a624c0 t intel_drrs_frontbuffer_update +ffffffff81a62620 T intel_drrs_flush +ffffffff81a62640 T intel_crtc_drrs_init +ffffffff81a626e0 t intel_drrs_downclock_work +ffffffff81a62740 t __delayed_work_tick +ffffffff81a63000 T intel_dsb_indexed_reg_write +ffffffff81a63140 T intel_dsb_reg_write +ffffffff81a63230 T intel_dsb_commit +ffffffff81a63680 T intel_dsb_prepare +ffffffff81a63810 T intel_dsb_cleanup +ffffffff81a64000 T intel_dsi_bitrate +ffffffff81a640a0 T intel_dsi_tlpx_ns +ffffffff81a640f0 T intel_dsi_get_modes +ffffffff81a64100 T intel_dsi_mode_valid +ffffffff81a641c0 T intel_dsi_host_init +ffffffff81a64270 T intel_dsi_get_panel_orientation +ffffffff81a65000 T intel_dsi_dcs_init_backlight_funcs +ffffffff81a650a0 t dcs_setup_backlight +ffffffff81a65100 t dcs_get_backlight +ffffffff81a65200 t dcs_set_backlight +ffffffff81a652f0 t dcs_disable_backlight +ffffffff81a65670 t dcs_enable_backlight +ffffffff81a66000 T intel_dsi_vbt_exec_sequence +ffffffff81a66020 T intel_dsi_msleep +ffffffff81a66090 T intel_dsi_log_params +ffffffff81a66410 T intel_dsi_vbt_init +ffffffff81a668a0 T intel_dsi_vbt_gpio_init +ffffffff81a668c0 T intel_dsi_vbt_gpio_cleanup +ffffffff81a67000 T intel_dvo_init +ffffffff81a674f0 t intel_disable_dvo +ffffffff81a675a0 t intel_enable_dvo +ffffffff81a67690 t intel_dvo_get_hw_state +ffffffff81a67700 t intel_dvo_get_config +ffffffff81a677b0 t intel_dvo_compute_config +ffffffff81a67840 t intel_dvo_pre_enable +ffffffff81a67930 t intel_dvo_connector_get_hw_state +ffffffff81a679b0 t intel_dvo_enc_destroy +ffffffff81a679f0 t intel_dvo_detect +ffffffff81a67af0 t intel_dvo_get_modes +ffffffff81a67b60 t intel_dvo_mode_valid +ffffffff81a68000 T intel_fb_get_format_info +ffffffff81a68240 T intel_fb_is_ccs_modifier +ffffffff81a68410 T intel_fb_is_rc_ccs_cc_modifier +ffffffff81a685e0 T intel_fb_is_mc_ccs_modifier +ffffffff81a687b0 T intel_fb_plane_get_modifiers +ffffffff81a688f0 T intel_fb_plane_supports_modifier +ffffffff81a68960 T intel_format_info_is_yuv_semiplanar +ffffffff81a68c00 T intel_fb_is_ccs_aux_plane +ffffffff81a68e40 T intel_fb_rc_ccs_cc_plane +ffffffff81a690a0 T is_surface_linear +ffffffff81a693d0 T main_to_ccs_plane +ffffffff81a696b0 T skl_ccs_to_main_plane +ffffffff81a699a0 T skl_main_to_aux_plane +ffffffff81a69c00 T intel_tile_size +ffffffff81a69c40 T intel_tile_width_bytes +ffffffff81a69e90 T intel_tile_height +ffffffff81a69ef0 T intel_tile_row_size +ffffffff81a69f70 T intel_fb_align_height +ffffffff81a69ff0 T intel_fb_uses_dpt +ffffffff81a6a040 T intel_cursor_alignment +ffffffff81a6a0a0 T intel_surf_alignment +ffffffff81a6a2c0 T intel_fb_plane_get_subsampling +ffffffff81a6a690 T intel_plane_adjust_aligned_offset +ffffffff81a6a700 t intel_adjust_aligned_offset +ffffffff81a6a8b0 T intel_plane_compute_aligned_offset +ffffffff81a6a9b0 t intel_compute_aligned_offset +ffffffff81a6ab70 T intel_fb_needs_pot_stride_remap +ffffffff81a6abc0 T intel_fb_supports_90_270_rotation +ffffffff81a6ac10 T intel_fill_fb_info +ffffffff81a6b850 t calc_plane_remap_info +ffffffff81a6c2b0 T intel_fb_fill_view +ffffffff81a6c300 T intel_plane_compute_gtt +ffffffff81a6cbd0 t intel_plane_check_stride +ffffffff81a6cf40 T intel_framebuffer_init +ffffffff81a6e350 T intel_user_framebuffer_create +ffffffff81a6e490 T intel_framebuffer_create +ffffffff81a6e520 t intel_adjust_tile_offset +ffffffff81a6e660 t intel_user_framebuffer_destroy +ffffffff81a6e6c0 t intel_user_framebuffer_create_handle +ffffffff81a6e6e0 t intel_user_framebuffer_dirty +ffffffff81a6f000 T intel_pin_and_fence_fb_obj +ffffffff81a6f320 t i915_gem_object_lock +ffffffff81a6f530 T intel_unpin_fb_vma +ffffffff81a6f5a0 T intel_plane_pin_fb +ffffffff81a6f8d0 T intel_plane_unpin_fb +ffffffff81a70000 T intel_fbc_cleanup +ffffffff81a701c0 T intel_fbc_pre_update +ffffffff81a70810 T intel_fbc_post_update +ffffffff81a70a60 T intel_fbc_invalidate +ffffffff81a70c80 T intel_fbc_flush +ffffffff81a70f10 T intel_fbc_atomic_check +ffffffff81a71480 T intel_fbc_disable +ffffffff81a71540 t __intel_fbc_disable +ffffffff81a716d0 T intel_fbc_update +ffffffff81a71d90 T intel_fbc_reset_underrun +ffffffff81a71ef0 T intel_fbc_handle_fifo_underrun_irq +ffffffff81a71fa0 T intel_fbc_add_plane +ffffffff81a71fd0 T intel_fbc_init +ffffffff81a72260 T intel_fbc_sanitize +ffffffff81a72330 T intel_fbc_crtc_debugfs_add +ffffffff81a72360 T intel_fbc_debugfs_register +ffffffff81a72390 t intel_fbc_is_ok +ffffffff81a724b0 t intel_fbc_update_state +ffffffff81a72820 t intel_fbc_underrun_work_fn +ffffffff81a72940 t ivb_fbc_activate +ffffffff81a72ba0 t ilk_fbc_deactivate +ffffffff81a72c50 t ilk_fbc_is_active +ffffffff81a72cb0 t ivb_fbc_is_compressing +ffffffff81a72d20 t snb_fbc_nuke +ffffffff81a72da0 t ilk_fbc_program_cfb +ffffffff81a72de0 t ivb_fbc_set_false_color +ffffffff81a72ea0 t snb_fbc_activate +ffffffff81a72f30 t ilk_fbc_is_compressing +ffffffff81a72fa0 t ilk_fbc_activate +ffffffff81a730d0 t i965_fbc_nuke +ffffffff81a73170 t g4x_fbc_activate +ffffffff81a73280 t g4x_fbc_deactivate +ffffffff81a73310 t g4x_fbc_is_active +ffffffff81a73370 t g4x_fbc_is_compressing +ffffffff81a733d0 t g4x_fbc_program_cfb +ffffffff81a73400 t i8xx_fbc_activate +ffffffff81a73570 t i8xx_fbc_deactivate +ffffffff81a73640 t i8xx_fbc_is_active +ffffffff81a736a0 t i8xx_fbc_is_compressing +ffffffff81a73700 t i8xx_fbc_program_cfb +ffffffff81a73780 t i8xx_fbc_nuke +ffffffff81a74000 T intel_fbdev_init +ffffffff81a744d0 t intel_fbdev_suspend_worker +ffffffff81a74500 T intel_fbdev_initial_config_async +ffffffff81a74570 T intel_fbdev_unregister +ffffffff81a745b0 T intel_fbdev_set_suspend +ffffffff81a745e0 T intel_fbdev_fini +ffffffff81a74670 T intel_fbdev_output_poll_changed +ffffffff81a74710 T intel_fbdev_restore_mode +ffffffff81a74790 T intel_fbdev_framebuffer +ffffffff81a747d0 t intelfb_create +ffffffff81a74dd0 t intel_fbdev_set_par +ffffffff81a75000 T assert_fdi_tx_enabled +ffffffff81a750e0 T assert_fdi_tx_disabled +ffffffff81a751c0 T assert_fdi_rx_enabled +ffffffff81a75280 T assert_fdi_rx_disabled +ffffffff81a75340 T assert_fdi_tx_pll_enabled +ffffffff81a753f0 T assert_fdi_rx_pll_enabled +ffffffff81a754b0 T assert_fdi_rx_pll_disabled +ffffffff81a75570 T intel_fdi_link_train +ffffffff81a75590 T intel_fdi_pll_freq_update +ffffffff81a75640 T intel_fdi_link_freq +ffffffff81a75690 T ilk_fdi_compute_config +ffffffff81a759d0 T intel_fdi_normal_train +ffffffff81a75b60 T hsw_fdi_link_train +ffffffff81a76060 T hsw_fdi_disable +ffffffff81a761c0 T ilk_fdi_pll_enable +ffffffff81a763d0 T ilk_fdi_pll_disable +ffffffff81a76500 T ilk_fdi_disable +ffffffff81a76770 T intel_fdi_init_hook +ffffffff81a767d0 t ilk_fdi_link_train +ffffffff81a76e40 t gen6_fdi_link_train +ffffffff81a77670 t ivb_manual_fdi_link_train +ffffffff81a77f10 t cpt_set_fdi_bc_bifurcation +ffffffff81a79000 T intel_set_cpu_fifo_underrun_reporting +ffffffff81a793f0 T intel_set_pch_fifo_underrun_reporting +ffffffff81a79620 T intel_cpu_fifo_underrun_irq_handler +ffffffff81a79810 T intel_pch_fifo_underrun_irq_handler +ffffffff81a79890 T intel_check_cpu_fifo_underruns +ffffffff81a79ab0 T intel_check_pch_fifo_underruns +ffffffff81a7a000 T intel_frontbuffer_flip_prepare +ffffffff81a7a050 T intel_frontbuffer_flip_complete +ffffffff81a7a130 T intel_frontbuffer_flip +ffffffff81a7a200 T __intel_fb_invalidate +ffffffff81a7a290 T __intel_fb_flush +ffffffff81a7a380 T intel_frontbuffer_get +ffffffff81a7a4c0 t frontbuffer_active +ffffffff81a7a4f0 t frontbuffer_retire +ffffffff81a7a530 T intel_frontbuffer_put +ffffffff81a7a6c0 T intel_frontbuffer_track +ffffffff81a7b000 T intel_atomic_global_obj_init +ffffffff81a7b070 T intel_atomic_global_obj_cleanup +ffffffff81a7b170 T intel_atomic_get_global_obj_state +ffffffff81a7b3e0 T intel_atomic_get_old_global_obj_state +ffffffff81a7b440 T intel_atomic_get_new_global_obj_state +ffffffff81a7b4a0 T intel_atomic_swap_global_state +ffffffff81a7b5f0 T intel_atomic_clear_global_state +ffffffff81a7b720 T intel_atomic_lock_global_state +ffffffff81a7b7a0 T intel_atomic_serialize_global_state +ffffffff81a7c000 T intel_gmbus_is_valid_pin +ffffffff81a7c110 T intel_gmbus_reset +ffffffff81a7c170 T intel_bb_set_bits +ffffffff81a7c2a0 T intel_bb_set_dir +ffffffff81a7c2d0 T intel_bb_read_bits +ffffffff81a7c450 T intel_acquire_bus +ffffffff81a7c650 T intel_release_bus +ffffffff81a7c7f0 T intel_send_start +ffffffff81a7c810 T intel_send_stop +ffffffff81a7c830 T intel_initiate_xfer +ffffffff81a7c850 T intel_read_byte +ffffffff81a7c870 T intel_write_byte +ffffffff81a7c890 T intel_gmbus_output_aksv +ffffffff81a7c960 t do_gmbus_xfer +ffffffff81a7cf60 T intel_gmbus_setup +ffffffff81a7d2f0 T intel_gmbus_teardown +ffffffff81a7d370 T intel_gmbus_get_adapter +ffffffff81a7d3f0 T intel_gmbus_force_bit +ffffffff81a7d490 T intel_gmbus_is_forced_bit +ffffffff81a7d4c0 t gmbus_xfer_read +ffffffff81a7d790 t gmbus_xfer_write +ffffffff81a7d9e0 t gmbus_wait +ffffffff81a7ddc0 t gmbus_wait_idle +ffffffff81a7df60 t gmbus_xfer +ffffffff81a7e040 t gmbus_func +ffffffff81a7e080 t gmbus_lock_bus +ffffffff81a7e0a0 t gmbus_trylock_bus +ffffffff81a7e100 t gmbus_unlock_bus +ffffffff81a7f000 T intel_hdcp_capable +ffffffff81a7f0a0 t intel_hdcp_read_valid_bksv +ffffffff81a7f320 T intel_hdcp2_capable +ffffffff81a7f400 T is_hdcp_supported +ffffffff81a7f450 T intel_hdcp_component_init +ffffffff81a7f480 T intel_hdcp_init +ffffffff81a7f5c0 t intel_hdcp_check_work +ffffffff81a834c0 t intel_hdcp_prop_work +ffffffff81a83540 T intel_hdcp_enable +ffffffff81a83590 T intel_hdcp_disable +ffffffff81a836c0 t intel_hdcp_update_value +ffffffff81a83880 t _intel_hdcp2_disable +ffffffff81a83c80 t _intel_hdcp_disable +ffffffff81a83f80 T intel_hdcp_update_pipe +ffffffff81a840f0 T intel_hdcp_component_fini +ffffffff81a84130 T intel_hdcp_cleanup +ffffffff81a84270 T intel_hdcp_atomic_check +ffffffff81a84300 T intel_hdcp_handle_cp_irq +ffffffff81a84400 t __delayed_work_tick +ffffffff81a84420 t hdcp2_authenticate_repeater_topology +ffffffff81a84700 t intel_hdcp_get_repeater_ctl +ffffffff81a85000 T hsw_write_infoframe +ffffffff81a85410 t hsw_dip_data_reg +ffffffff81a855d0 T hsw_read_infoframe +ffffffff81a85690 T intel_hdmi_infoframe_enable +ffffffff81a85730 T intel_hdmi_infoframes_enabled +ffffffff81a85850 T intel_read_infoframe +ffffffff81a859e0 T intel_hdmi_read_gcp_infoframe +ffffffff81a85ad0 T intel_dp_dual_mode_set_tmds_output +ffffffff81a85ba0 T intel_hdmi_tmds_clock +ffffffff81a85bf0 T intel_hdmi_bpc_possible +ffffffff81a85d20 T intel_hdmi_limited_color_range +ffffffff81a85d90 T intel_hdmi_compute_config +ffffffff81a864e0 t intel_hdmi_compute_output_format +ffffffff81a86610 T intel_hdmi_encoder_shutdown +ffffffff81a866e0 T intel_hdmi_handle_sink_scrambling +ffffffff81a86800 T intel_infoframe_init +ffffffff81a86980 t vlv_write_infoframe +ffffffff81a86ce0 t vlv_read_infoframe +ffffffff81a86eb0 t vlv_set_infoframes +ffffffff81a87250 t vlv_infoframes_enabled +ffffffff81a872f0 t g4x_write_infoframe +ffffffff81a875b0 t g4x_read_infoframe +ffffffff81a87700 t g4x_set_infoframes +ffffffff81a879a0 t g4x_infoframes_enabled +ffffffff81a87a20 t hsw_set_infoframes +ffffffff81a87cc0 t hsw_infoframes_enabled +ffffffff81a87d50 t ibx_write_infoframe +ffffffff81a88070 t ibx_read_infoframe +ffffffff81a881f0 t ibx_set_infoframes +ffffffff81a88560 t ibx_infoframes_enabled +ffffffff81a885f0 t cpt_write_infoframe +ffffffff81a888f0 t cpt_read_infoframe +ffffffff81a88a70 t cpt_set_infoframes +ffffffff81a88d80 t cpt_infoframes_enabled +ffffffff81a88df0 T intel_hdmi_init_connector +ffffffff81a89480 T intel_hdmi_dsc_get_slice_height +ffffffff81a894e0 T intel_hdmi_dsc_get_num_slices +ffffffff81a89660 T intel_hdmi_dsc_get_bpp +ffffffff81a89750 t intel_hdmi_compute_clock +ffffffff81a89a10 t hdmi_port_clock_valid +ffffffff81a89c40 t intel_write_infoframe +ffffffff81a89e10 t intel_hdmi_detect +ffffffff81a89fd0 t intel_hdmi_force +ffffffff81a8a0b0 t intel_hdmi_connector_register +ffffffff81a8a0c0 t intel_hdmi_connector_unregister +ffffffff81a8a0d0 t intel_hdmi_set_edid +ffffffff81a8a370 t intel_hdmi_get_modes +ffffffff81a8a3b0 t intel_hdmi_mode_valid +ffffffff81a8a550 t intel_hdmi_mode_clock_valid +ffffffff81a8a6e0 t intel_hdmi_hdcp_write_an_aksv +ffffffff81a8a830 t intel_hdmi_hdcp_read_bksv +ffffffff81a8a900 t intel_hdmi_hdcp_read_bstatus +ffffffff81a8a9d0 t intel_hdmi_hdcp_repeater_present +ffffffff81a8aab0 t intel_hdmi_hdcp_read_ri_prime +ffffffff81a8ab80 t intel_hdmi_hdcp_read_ksv_ready +ffffffff81a8ac60 t intel_hdmi_hdcp_read_ksv_fifo +ffffffff81a8ad30 t intel_hdmi_hdcp_read_v_prime_part +ffffffff81a8ae20 t intel_hdmi_hdcp_toggle_signalling +ffffffff81a8b0b0 t intel_hdmi_hdcp_check_link +ffffffff81a8b400 t intel_hdmi_hdcp2_capable +ffffffff81a8b4c0 t intel_hdmi_hdcp2_write_msg +ffffffff81a8b5b0 t intel_hdmi_hdcp2_read_msg +ffffffff81a8ba50 t intel_hdmi_hdcp2_check_link +ffffffff81a8c000 T intel_hpd_pin_default +ffffffff81a8c030 T intel_encoder_hotplug +ffffffff81a8c160 T intel_hpd_trigger_irq +ffffffff81a8c1d0 T intel_hpd_irq_handler +ffffffff81a8c5b0 T intel_hpd_init +ffffffff81a8c6c0 T intel_hpd_poll_enable +ffffffff81a8c740 T intel_hpd_poll_disable +ffffffff81a8c7a0 T intel_hpd_init_work +ffffffff81a8c870 t i915_hotplug_work_func +ffffffff81a8cbc0 t i915_digport_work_func +ffffffff81a8cd50 t i915_hpd_poll_init_work +ffffffff81a8ce60 t intel_hpd_irq_storm_reenable_work +ffffffff81a8d1b0 T intel_hpd_cancel_work +ffffffff81a8d2d0 T intel_hpd_disable +ffffffff81a8d360 T intel_hpd_enable +ffffffff81a8d3d0 t __delayed_work_tick +ffffffff81a8e000 T intel_lpe_audio_irq_handler +ffffffff81a8e020 T intel_lpe_audio_init +ffffffff81a8e050 T intel_lpe_audio_teardown +ffffffff81a8e070 T intel_lpe_audio_notify +ffffffff81a8f000 T lspcon_detect_hdr_capability +ffffffff81a8f0b0 T lspcon_write_infoframe +ffffffff81a8f830 T lspcon_read_infoframe +ffffffff81a8f870 T lspcon_set_infoframes +ffffffff81a8fae0 T lspcon_infoframes_enabled +ffffffff81a8fcd0 T lspcon_wait_pcon_mode +ffffffff81a8fcf0 t lspcon_wait_mode +ffffffff81a8ffb0 T lspcon_init +ffffffff81a903c0 T intel_lspcon_infoframes_enabled +ffffffff81a90400 T lspcon_resume +ffffffff81a906b0 t lspcon_change_mode +ffffffff81a91000 T intel_lvds_port_enabled +ffffffff81a91080 T intel_get_lvds_encoder +ffffffff81a910e0 T intel_is_dual_link_lvds +ffffffff81a91150 T intel_lvds_init +ffffffff81a918c0 t intel_enable_lvds +ffffffff81a91a10 t intel_pre_enable_lvds +ffffffff81a91ce0 t intel_lvds_compute_config +ffffffff81a91e40 t pch_disable_lvds +ffffffff81a91e60 t pch_post_disable_lvds +ffffffff81a91e80 t gmch_disable_lvds +ffffffff81a91eb0 t intel_lvds_get_hw_state +ffffffff81a91f70 t intel_lvds_get_config +ffffffff81a92070 t intel_lvds_shutdown +ffffffff81a92110 t intel_no_lvds_dmi_callback +ffffffff81a92160 t intel_disable_lvds +ffffffff81a92290 t intel_lvds_get_modes +ffffffff81a922c0 t intel_lvds_mode_valid +ffffffff81a92340 t intel_dual_link_lvds_callback +ffffffff81a93000 T intel_modeset_setup_hw_state +ffffffff81a95000 T intel_modeset_verify_crtc +ffffffff81a953b0 t verify_connector_state +ffffffff81a95660 T intel_modeset_verify_disabled +ffffffff81a96000 T intel_opregion_notify_encoder +ffffffff81a96170 t swsci +ffffffff81a964a0 T intel_opregion_notify_adapter +ffffffff81a96500 T intel_opregion_asle_intr +ffffffff81a96550 T intel_opregion_setup +ffffffff81a96d60 t asle_work +ffffffff81a971e0 T intel_opregion_get_panel_type +ffffffff81a972d0 T intel_opregion_get_edid +ffffffff81a973b0 T intel_opregion_headless_sku +ffffffff81a97400 T intel_opregion_register +ffffffff81a97490 T intel_opregion_resume +ffffffff81a97520 T intel_opregion_suspend +ffffffff81a975c0 T intel_opregion_unregister +ffffffff81a97740 t intel_no_opregion_vbt_callback +ffffffff81a977a0 t intel_use_opregion_panel_type_callback +ffffffff81a98000 T intel_overlay_reset +ffffffff81a98050 T intel_overlay_switch_off +ffffffff81a98250 t intel_overlay_release_old_vid +ffffffff81a983f0 T intel_overlay_put_image_ioctl +ffffffff81a995c0 T intel_overlay_attrs_ioctl +ffffffff81a99a70 T intel_overlay_setup +ffffffff81a99cd0 t intel_overlay_last_flip_retire +ffffffff81a99d10 T intel_overlay_cleanup +ffffffff81a99dd0 T intel_overlay_capture_error_state +ffffffff81a99ec0 T intel_overlay_print_error_state +ffffffff81a9a290 t intel_overlay_release_old_vid_tail +ffffffff81a9a360 t intel_overlay_off_tail +ffffffff81a9a510 t intel_overlay_flip_prepare +ffffffff81a9b000 T intel_panel_use_ssc +ffffffff81a9b060 T intel_panel_preferred_fixed_mode +ffffffff81a9b0b0 T intel_panel_fixed_mode +ffffffff81a9b170 T intel_panel_downclock_mode +ffffffff81a9b260 T intel_panel_highest_mode +ffffffff81a9b2c0 T intel_panel_get_modes +ffffffff81a9b350 T intel_panel_drrs_type +ffffffff81a9b3a0 T intel_panel_compute_config +ffffffff81a9b520 T intel_panel_add_edid_fixed_modes +ffffffff81a9ba50 T intel_panel_add_vbt_lfp_fixed_mode +ffffffff81a9bab0 t intel_panel_add_fixed_mode +ffffffff81a9bc30 T intel_panel_add_vbt_sdvo_fixed_mode +ffffffff81a9bca0 T intel_panel_add_encoder_fixed_mode +ffffffff81a9bce0 T intel_panel_fitting +ffffffff81a9c330 T intel_panel_detect +ffffffff81a9c3c0 T intel_panel_mode_valid +ffffffff81a9c4d0 T intel_panel_init_alloc +ffffffff81a9c520 T intel_panel_init +ffffffff81a9c5e0 T intel_panel_fini +ffffffff81a9d000 T intel_has_pch_trancoder +ffffffff81a9d060 T intel_crtc_pch_transcoder +ffffffff81a9d0a0 T intel_pch_transcoder_get_m1_n1 +ffffffff81a9d0f0 T intel_pch_transcoder_get_m2_n2 +ffffffff81a9d140 T ilk_pch_pre_enable +ffffffff81a9d170 T ilk_pch_enable +ffffffff81a9d720 t ilk_pch_transcoder_set_timings +ffffffff81a9d9a0 T ilk_pch_disable +ffffffff81a9d9c0 T ilk_pch_post_disable +ffffffff81a9dd00 T ilk_pch_get_config +ffffffff81a9dec0 T lpt_pch_enable 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intel_tc_port_init +ffffffff81abb8c0 t intel_tc_port_disconnect_phy_work +ffffffff81abb910 t tc_phy_status_complete +ffffffff81abba20 t tc_phy_take_ownership +ffffffff81abbbc0 t intel_tc_port_update_mode +ffffffff81abc0e0 t __delayed_work_tick +ffffffff81abd000 T intel_tv_init +ffffffff81abd420 t intel_tv_compute_config +ffffffff81abd8c0 t intel_tv_get_config +ffffffff81abde70 t intel_tv_pre_enable +ffffffff81abe7a0 t intel_enable_tv +ffffffff81abe800 t intel_disable_tv +ffffffff81abe860 t intel_tv_get_hw_state +ffffffff81abe8c0 t intel_tv_connector_duplicate_state +ffffffff81abe940 t intel_tv_mode_to_mode +ffffffff81abea90 t intel_tv_get_modes +ffffffff81abedf0 t intel_tv_detect +ffffffff81abf250 t intel_tv_mode_valid +ffffffff81abf2e0 t intel_tv_atomic_check +ffffffff81ac0000 T intel_dsc_source_support +ffffffff81ac0060 T intel_dsc_compute_params +ffffffff81ac0520 T intel_dsc_power_domain +ffffffff81ac05d0 T intel_dsc_dsi_pps_write +ffffffff81ac0870 T intel_dsc_dp_pps_write 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skl_pfit_enable +ffffffff81ac5c40 T skl_program_plane_scaler +ffffffff81ac6300 T skl_detach_scalers +ffffffff81ac6440 T skl_scaler_disable +ffffffff81ac7000 T skl_format_to_fourcc +ffffffff81ac7180 T icl_is_nv12_y_plane +ffffffff81ac71f0 T icl_is_hdr_plane +ffffffff81ac7230 T skl_calc_main_surface_offset +ffffffff81ac7470 T skl_universal_plane_create +ffffffff81ac7b60 t icl_plane_min_width +ffffffff81ac7cf0 t icl_hdr_plane_max_width +ffffffff81ac7d40 t icl_sdr_plane_max_width +ffffffff81ac7d70 t icl_plane_max_height +ffffffff81ac7da0 t icl_plane_min_cdclk +ffffffff81ac7de0 t glk_plane_max_width +ffffffff81ac7e90 t skl_plane_max_height +ffffffff81ac7ec0 t glk_plane_min_cdclk +ffffffff81ac7f40 t skl_plane_max_width +ffffffff81ac8010 t skl_plane_min_cdclk +ffffffff81ac8080 t skl_plane_max_stride +ffffffff81ac8120 t icl_plane_update_noarm +ffffffff81ac8af0 t icl_plane_update_arm +ffffffff81ac8c60 t icl_plane_disable_arm +ffffffff81ac8d70 t skl_plane_update_noarm +ffffffff81ac8f10 t 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skl_compute_dbuf_slices +ffffffff81acdca0 T skl_wm_sanitize +ffffffff81acdef0 T intel_wm_state_verify +ffffffff81ace820 T skl_watermark_ipc_enabled +ffffffff81ace850 T skl_watermark_ipc_update +ffffffff81ace900 T skl_watermark_ipc_init +ffffffff81acea00 T skl_wm_init +ffffffff81acf030 T intel_atomic_get_dbuf_state +ffffffff81acf050 T intel_dbuf_init +ffffffff81acf0c0 T intel_dbuf_pre_plane_update +ffffffff81acf3a0 T intel_dbuf_post_plane_update +ffffffff81acf470 T intel_mbus_dbox_update +ffffffff81acf6e0 T skl_watermark_ipc_debugfs_register +ffffffff81acf710 t skl_sagv_disable +ffffffff81acf830 t skl_ddb_entry_for_slices +ffffffff81acf970 t skl_compute_wm +ffffffff81ad27b0 t skl_build_plane_wm_single +ffffffff81ad2ae0 t skl_compute_wm_params +ffffffff81ad2ed0 t skl_compute_plane_wm +ffffffff81ad33b0 t intel_dbuf_duplicate_state +ffffffff81ad3440 t intel_dbuf_destroy_state +ffffffff81ad4000 T pixel_format_from_register_bits +ffffffff81ad4060 T vlv_dsi_wait_for_fifo_empty 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intel_ggtt_gmch_enable_hw +ffffffff81b242d0 T intel_ggtt_gmch_flush +ffffffff81b25000 T intel_gsc_irq_handler +ffffffff81b25080 T intel_gsc_init +ffffffff81b250f0 T intel_gsc_fini +ffffffff81b26000 T intel_gt_common_init_early +ffffffff81b260e0 T intel_root_gt_init_early +ffffffff81b26160 T intel_gt_assign_ggtt +ffffffff81b261c0 T intel_gt_init_mmio +ffffffff81b26200 T intel_gt_init_hw +ffffffff81b267f0 T intel_gt_clear_error_registers +ffffffff81b26b00 T intel_gt_check_and_clear_faults +ffffffff81b26d50 T intel_gt_flush_ggtt_writes +ffffffff81b26df0 T intel_gt_chipset_flush +ffffffff81b26e30 T intel_gt_driver_register +ffffffff81b26e80 T intel_gt_wait_for_idle +ffffffff81b26f90 T intel_gt_init +ffffffff81b274a0 T intel_gt_driver_remove +ffffffff81b27500 T intel_gt_driver_unregister +ffffffff81b27590 T intel_gt_driver_release +ffffffff81b27640 T intel_gt_driver_late_release_all +ffffffff81b27760 T intel_gt_probe_all +ffffffff81b27a50 t intel_gt_tile_setup +ffffffff81b27b20 T intel_gt_release_all +ffffffff81b27ba0 T intel_gt_tiles_init +ffffffff81b27e90 T intel_gt_info_print +ffffffff81b27ed0 T intel_gt_invalidate_tlb +ffffffff81b29000 T intel_gt_buffer_pool_mark_used +ffffffff81b29060 T intel_gt_get_buffer_pool +ffffffff81b29270 T intel_gt_init_buffer_pool +ffffffff81b29330 t pool_free_work +ffffffff81b293d0 T intel_gt_flush_buffer_pool +ffffffff81b29470 t pool_free_older_than +ffffffff81b29600 T intel_gt_fini_buffer_pool +ffffffff81b29630 t pool_retire +ffffffff81b29760 t __delayed_work_tick +ffffffff81b2a000 T intel_gt_init_clock_frequency +ffffffff81b2a1d0 T intel_gt_clock_interval_to_ns +ffffffff81b2a230 T intel_gt_pm_interval_to_ns +ffffffff81b2a290 T intel_gt_ns_to_clock_interval +ffffffff81b2a300 T intel_gt_ns_to_pm_interval +ffffffff81b2b000 T intel_gt_debugfs_reset_show +ffffffff81b2b050 T intel_gt_debugfs_reset_store +ffffffff81b2b160 T intel_gt_debugfs_register +ffffffff81b2b190 T intel_gt_debugfs_register_files +ffffffff81b2c000 T intel_gt_engines_debugfs_register +ffffffff81b2d000 T gen11_gt_irq_handler +ffffffff81b2d2e0 T gen11_gt_reset_one_iir +ffffffff81b2d360 t gen11_gt_engine_identity +ffffffff81b2d460 T gen11_gt_irq_reset +ffffffff81b2d800 T gen11_gt_irq_postinstall +ffffffff81b2db90 T gen5_gt_irq_handler +ffffffff81b2dc20 T gen6_gt_irq_handler +ffffffff81b2ddd0 T gen8_gt_irq_handler +ffffffff81b2df60 T gen8_gt_irq_reset +ffffffff81b2dfe0 T gen8_gt_irq_postinstall +ffffffff81b2e0a0 T gen5_gt_enable_irq +ffffffff81b2e100 T gen5_gt_disable_irq +ffffffff81b2e140 T gen5_gt_irq_reset +ffffffff81b2e1d0 T gen5_gt_irq_postinstall +ffffffff81b2f000 T intel_gt_mcr_init +ffffffff81b2f200 T intel_gt_mcr_read +ffffffff81b2f360 T intel_gt_mcr_unicast_write +ffffffff81b2f4a0 T intel_gt_mcr_multicast_write +ffffffff81b2f4d0 T intel_gt_mcr_multicast_write_fw +ffffffff81b2f520 T intel_gt_mcr_get_nonterminated_steering +ffffffff81b2f640 T intel_gt_mcr_read_any_fw +ffffffff81b2f810 T intel_gt_mcr_read_any +ffffffff81b2fa60 T intel_gt_mcr_report_steering +ffffffff81b2fcc0 T intel_gt_mcr_get_ss_steering +ffffffff81b30000 T intel_gt_pm_init_early +ffffffff81b30070 T intel_gt_pm_init +ffffffff81b300b0 T intel_gt_pm_fini +ffffffff81b300d0 T intel_gt_resume +ffffffff81b303e0 t gt_sanitize +ffffffff81b30580 T intel_gt_suspend_prepare +ffffffff81b30680 T intel_gt_suspend_late +ffffffff81b30740 T intel_gt_runtime_suspend +ffffffff81b30760 T intel_gt_runtime_resume +ffffffff81b307a0 T intel_gt_get_awake_time +ffffffff81b308c0 t __gt_unpark +ffffffff81b309c0 t __gt_park +ffffffff81b31000 T intel_gt_pm_debugfs_register +ffffffff81b32000 T gen6_gt_pm_unmask_irq +ffffffff81b32090 T gen6_gt_pm_mask_irq +ffffffff81b32120 T gen6_gt_pm_reset_iir +ffffffff81b321b0 T gen6_gt_pm_enable_irq +ffffffff81b322b0 T gen6_gt_pm_disable_irq +ffffffff81b33000 T intel_engine_add_retire +ffffffff81b330a0 T intel_engine_init_retire +ffffffff81b330d0 t engine_retire +ffffffff81b331a0 T intel_engine_fini_retire +ffffffff81b331c0 T intel_gt_retire_requests_timeout +ffffffff81b33510 T intel_gt_init_requests +ffffffff81b33570 t retire_work_handler +ffffffff81b335f0 T intel_gt_park_requests +ffffffff81b33660 T intel_gt_unpark_requests +ffffffff81b336c0 T intel_gt_fini_requests +ffffffff81b33720 T intel_gt_watchdog_work +ffffffff81b33820 t __delayed_work_tick +ffffffff81b34000 T intel_gt_sysfs_register +ffffffff81b34030 T intel_gt_sysfs_unregister +ffffffff81b35000 T intel_gt_sysfs_pm_init +ffffffff81b36000 T intel_vm_no_concurrent_access_wa +ffffffff81b36050 T alloc_pt_lmem +ffffffff81b360c0 T alloc_pt_dma +ffffffff81b36130 T map_pt_dma +ffffffff81b36190 T map_pt_dma_locked +ffffffff81b361f0 T i915_vm_lock_objects +ffffffff81b36230 t i915_gem_object_lock +ffffffff81b36440 T i915_address_space_fini +ffffffff81b36460 T i915_vm_resv_release +ffffffff81b364a0 T i915_vm_release +ffffffff81b364d0 T i915_address_space_init +ffffffff81b36670 t __i915_vm_release +ffffffff81b36740 T __px_vaddr +ffffffff81b36780 T __px_dma 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gen8_reset_engines +ffffffff81b46270 t gen6_reset_engines +ffffffff81b462e0 t ilk_do_reset +ffffffff81b463b0 t g4x_do_reset +ffffffff81b46640 t g33_do_reset +ffffffff81b46780 t i915_do_reset +ffffffff81b46a00 t __gen11_reset_engines +ffffffff81b46e70 t __gen6_reset_engines +ffffffff81b46fa0 t nop_submit_request +ffffffff81b47010 t __delayed_work_tick +ffffffff81b48000 T intel_ring_update_space +ffffffff81b48040 T __intel_ring_pin +ffffffff81b48070 T intel_ring_pin +ffffffff81b481d0 T intel_ring_reset +ffffffff81b48210 T intel_ring_unpin +ffffffff81b482b0 T intel_engine_create_ring +ffffffff81b48450 T intel_ring_free +ffffffff81b484a0 T intel_ring_begin +ffffffff81b48620 t wait_for_space +ffffffff81b48720 T intel_ring_cacheline_align +ffffffff81b49000 T intel_ring_submission_setup +ffffffff81b49700 t i915_gem_object_lock +ffffffff81b49910 t ring_release +ffffffff81b49a60 t xcs_resume +ffffffff81b4a020 t xcs_sanitize +ffffffff81b4a090 t reset_prepare +ffffffff81b4a1d0 t reset_rewind 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intel_rps_set +ffffffff81b4c5f0 T intel_rps_park +ffffffff81b4c7a0 t rps_disable_interrupts +ffffffff81b4c880 t rps_set +ffffffff81b4cbc0 T intel_rps_get_boost_frequency +ffffffff81b4ccb0 T intel_gpu_freq +ffffffff81b4cd80 T intel_rps_set_boost_frequency +ffffffff81b4cf10 T intel_rps_dec_waiters +ffffffff81b4cf70 T intel_rps_boost +ffffffff81b4d090 T gen6_rps_get_freq_caps +ffffffff81b4d1e0 T intel_rps_enable +ffffffff81b4e2e0 T intel_rps_disable +ffffffff81b4e570 T intel_freq_opcode +ffffffff81b4e630 T gen11_rps_irq_handler +ffffffff81b4e6c0 T gen6_rps_irq_handler +ffffffff81b4e7d0 T gen5_rps_irq_handler +ffffffff81b4e9f0 T intel_rps_init_early +ffffffff81b4ea90 t rps_work +ffffffff81b4ee30 t rps_timer +ffffffff81b4f050 T intel_rps_init +ffffffff81b4fd30 T intel_rps_sanitize +ffffffff81b4fd90 T intel_rps_get_cagf +ffffffff81b4fe20 T intel_rps_read_actual_frequency +ffffffff81b50050 T intel_rps_read_punit_req +ffffffff81b500d0 T intel_rps_read_punit_req_frequency +ffffffff81b501f0 T intel_rps_get_requested_frequency +ffffffff81b503b0 T intel_rps_get_max_frequency +ffffffff81b504a0 T intel_rps_get_max_raw_freq +ffffffff81b50520 T intel_rps_get_rp0_frequency +ffffffff81b50610 T intel_rps_get_rp1_frequency +ffffffff81b50700 T intel_rps_get_rpn_frequency +ffffffff81b507f0 T intel_rps_set_max_frequency +ffffffff81b50a60 T intel_rps_get_min_frequency +ffffffff81b50b50 T intel_rps_get_min_raw_freq +ffffffff81b50bd0 T intel_rps_set_min_frequency +ffffffff81b50d50 T intel_rps_raise_unslice +ffffffff81b50e30 T intel_rps_lower_unslice +ffffffff81b50f10 T rps_read_mask_mmio +ffffffff81b50fa0 T intel_rps_driver_register +ffffffff81b50fe0 T intel_rps_driver_unregister +ffffffff81b51030 T i915_read_mch_val +ffffffff81b514b0 T i915_gpu_raise +ffffffff81b51540 T i915_gpu_lower +ffffffff81b515d0 T i915_gpu_busy +ffffffff81b51640 T i915_gpu_turbo_disable +ffffffff81b52000 T intel_sa_mediagt_setup +ffffffff81b53000 T intel_sseu_set_info +ffffffff81b53040 T intel_sseu_subslice_total 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uao_create_from_data +ffffffff81b5e090 T uao_write +ffffffff81b5e0b0 T uao_create_from_object +ffffffff81b5e1a0 T uao_read +ffffffff81b5e1c0 t __uao_rw +ffffffff81b5f000 T intel_engines_add_sysfs +ffffffff81b60000 T intel_guc_notify +ffffffff81b60030 T intel_guc_init_send_regs +ffffffff81b600d0 T intel_guc_init_early +ffffffff81b60210 t gen11_reset_guc_interrupts +ffffffff81b60260 t gen11_enable_guc_interrupts +ffffffff81b60320 t gen11_disable_guc_interrupts +ffffffff81b603c0 t gen9_reset_guc_interrupts +ffffffff81b60480 t gen9_enable_guc_interrupts +ffffffff81b605a0 t gen9_disable_guc_interrupts +ffffffff81b60680 T intel_guc_init_late +ffffffff81b60690 T intel_guc_write_params +ffffffff81b608a0 T intel_guc_dump_time_info +ffffffff81b609d0 T intel_guc_init +ffffffff81b610d0 T intel_guc_fini +ffffffff81b61190 T intel_guc_send_mmio +ffffffff81b61660 T intel_guc_to_host_process_recv_msg +ffffffff81b61740 T intel_guc_auth_huc +ffffffff81b617a0 T intel_guc_suspend +ffffffff81b61860 T intel_guc_resume +ffffffff81b61890 T intel_guc_allocate_vma +ffffffff81b61980 T intel_guc_allocate_and_map_vma +ffffffff81b61a20 T intel_guc_self_cfg32 +ffffffff81b61b00 T intel_guc_self_cfg64 +ffffffff81b61be0 T intel_guc_load_status +ffffffff81b61d70 T intel_guc_write_barrier +ffffffff81b62000 T intel_guc_ads_print_policy_info +ffffffff81b62020 T intel_guc_global_policies_update +ffffffff81b62070 T intel_guc_ads_create +ffffffff81b62630 T intel_guc_ads_init_late +ffffffff81b62680 T intel_guc_ads_destroy +ffffffff81b626e0 T intel_guc_ads_reset +ffffffff81b62750 T intel_guc_engine_usage_offset +ffffffff81b62790 T intel_guc_engine_usage_record_map +ffffffff81b63000 T intel_guc_capture_getlistsize +ffffffff81b63020 t guc_capture_getlistsize +ffffffff81b63300 T intel_guc_capture_getlist +ffffffff81b63bb0 T intel_guc_capture_getnullheader +ffffffff81b63c60 T intel_guc_capture_print_engine_node +ffffffff81b64160 T intel_guc_capture_free_node +ffffffff81b641e0 T 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i915_perf_add_config_ioctl +ffffffff81bae810 T i915_perf_remove_config_ioctl +ffffffff81bae890 T i915_perf_init +ffffffff81baec10 t gen7_is_valid_b_counter_addr +ffffffff81baec60 t hsw_is_valid_mux_addr +ffffffff81baece0 t hsw_enable_metric_set +ffffffff81baedc0 t hsw_disable_metric_set +ffffffff81baeed0 t gen7_oa_enable +ffffffff81baf030 t gen7_oa_disable +ffffffff81baf0f0 t gen7_oa_read +ffffffff81baf650 t gen7_oa_hw_tail_read +ffffffff81baf6a0 t gen8_oa_read +ffffffff81bafcd0 t gen8_is_valid_mux_addr +ffffffff81bafd50 t gen8_is_valid_flex_addr +ffffffff81bafdd0 t chv_is_valid_mux_addr +ffffffff81bafe50 t gen8_oa_enable +ffffffff81baff90 t gen8_oa_disable +ffffffff81bb0050 t gen8_enable_metric_set +ffffffff81bb0110 t gen8_disable_metric_set +ffffffff81bb01a0 t gen8_oa_hw_tail_read +ffffffff81bb01f0 t gen11_is_valid_mux_addr +ffffffff81bb02b0 t gen11_disable_metric_set +ffffffff81bb0340 t gen12_is_valid_b_counter_addr +ffffffff81bb0390 t gen12_is_valid_mux_addr +ffffffff81bb03e0 t gen12_oa_enable +ffffffff81bb0560 t gen12_oa_disable +ffffffff81bb06a0 t gen12_enable_metric_set +ffffffff81bb07d0 t gen12_disable_metric_set +ffffffff81bb08b0 t gen12_oa_hw_tail_read +ffffffff81bb0900 T i915_perf_sysctl_register +ffffffff81bb0930 T i915_perf_sysctl_unregister +ffffffff81bb0960 T i915_perf_fini +ffffffff81bb0a40 t destroy_config +ffffffff81bb0ad0 T i915_perf_ioctl_version +ffffffff81bb0b00 t emit_oa_config +ffffffff81bb11e0 t i915_gem_object_lock +ffffffff81bb13f0 t lrc_configure_all_contexts +ffffffff81bb15b0 t oa_configure_all_contexts +ffffffff81bb18d0 t gen8_modify_self +ffffffff81bb1aa0 t gen8_modify_context +ffffffff81bb1c40 t gen12_configure_oar_context +ffffffff81bb2000 T i915_query_ioctl +ffffffff81bb2110 t query_topology_info +ffffffff81bb2160 t query_engine_info +ffffffff81bb23a0 t query_perf_config +ffffffff81bb26a0 t query_memregion_info +ffffffff81bb2920 t query_hwconfig_blob +ffffffff81bb29a0 t query_geometry_subslices +ffffffff81bb2a30 t fill_topology_info +ffffffff81bb2bd0 t query_perf_config_data +ffffffff81bb4000 T i915_request_slab_cache +ffffffff81bb4030 t i915_fence_get_driver_name +ffffffff81bb4060 t i915_fence_get_timeline_name +ffffffff81bb40c0 t i915_fence_enable_signaling +ffffffff81bb40d0 t i915_fence_signaled +ffffffff81bb4120 t i915_fence_wait +ffffffff81bb4140 t i915_fence_release +ffffffff81bb4230 T i915_request_notify_execute_cb_imm +ffffffff81bb42a0 T i915_request_active_engine +ffffffff81bb4380 T i915_request_free_capture_list +ffffffff81bb43f0 T i915_request_retire +ffffffff81bb45b0 T i915_request_retire_upto +ffffffff81bb4620 T __i915_request_skip +ffffffff81bb46c0 T i915_request_set_error_once +ffffffff81bb4730 T i915_request_mark_eio +ffffffff81bb47c0 T __i915_request_submit +ffffffff81bb4a10 T i915_request_submit +ffffffff81bb4a60 T __i915_request_unsubmit +ffffffff81bb4ad0 T i915_request_unsubmit +ffffffff81bb4b50 T i915_request_cancel +ffffffff81bb4bd0 T __i915_request_create +ffffffff81bb4ef0 t request_alloc_slow +ffffffff81bb5040 T i915_request_create +ffffffff81bb5140 T i915_request_await_execution +ffffffff81bb5250 t __i915_request_await_execution +ffffffff81bb53e0 t i915_request_await_external +ffffffff81bb5520 T i915_request_await_dma_fence +ffffffff81bb58a0 T i915_request_await_deps +ffffffff81bb5910 T i915_request_await_object +ffffffff81bb59c0 T __i915_request_commit +ffffffff81bb5c20 T __i915_request_queue_bh +ffffffff81bb5c60 T __i915_request_queue +ffffffff81bb5cc0 T i915_request_add +ffffffff81bb5d70 T i915_request_wait_timeout +ffffffff81bb60b0 t request_wait_wake +ffffffff81bb60d0 T i915_request_wait +ffffffff81bb6130 T i915_request_show +ffffffff81bb6360 T i915_test_request_state +ffffffff81bb64d0 T i915_request_module_exit +ffffffff81bb6500 T i915_request_module_init +ffffffff81bb6590 t submit_notify +ffffffff81bb6670 t semaphore_notify +ffffffff81bb66c0 t __rq_watchdog_expired +ffffffff81bb6770 t __await_execution +ffffffff81bb68f0 t i915_request_await_start +ffffffff81bb6a20 t irq_execute_cb +ffffffff81bb7000 T i915_sg_trim +ffffffff81bb7100 T i915_refct_sgt_init +ffffffff81bb7140 T i915_rsgt_from_mm_node +ffffffff81bb73b0 T i915_rsgt_from_buddy_resource +ffffffff81bb7640 t i915_refct_sgt_release +ffffffff81bb8000 T i915_sched_lookup_priolist +ffffffff81bb8120 T __i915_priolist_free +ffffffff81bb8140 T i915_schedule +ffffffff81bb8620 T i915_sched_node_init +ffffffff81bb8680 T i915_sched_node_reinit +ffffffff81bb86c0 T __i915_sched_node_add_dependency +ffffffff81bb87d0 T i915_sched_node_add_dependency +ffffffff81bb8910 T i915_sched_node_fini +ffffffff81bb89f0 T i915_request_show_with_schedule +ffffffff81bb8ad0 T i915_sched_engine_create +ffffffff81bb8b80 t default_destroy +ffffffff81bb8bd0 t default_disabled +ffffffff81bb8c00 T i915_scheduler_module_exit +ffffffff81bb8c30 T i915_scheduler_module_init +ffffffff81bb9000 T i915_save_display +ffffffff81bb9360 T i915_restore_display +ffffffff81bba000 T i915_sw_fence_complete +ffffffff81bba040 t __i915_sw_fence_complete +ffffffff81bba1c0 T i915_sw_fence_await +ffffffff81bba240 T __i915_sw_fence_init +ffffffff81bba2b0 T i915_sw_fence_reinit +ffffffff81bba2f0 T i915_sw_fence_commit +ffffffff81bba330 T i915_sw_fence_await_sw_fence +ffffffff81bba350 t __i915_sw_fence_await_sw_fence +ffffffff81bba5f0 T i915_sw_fence_await_sw_fence_gfp +ffffffff81bba610 T i915_sw_fence_await_dma_fence +ffffffff81bba840 t dma_i915_sw_fence_wake +ffffffff81bba8c0 t irq_i915_sw_fence_work +ffffffff81bba900 t timer_i915_sw_fence_wake +ffffffff81bba9e0 t dma_i915_sw_fence_wake_timer +ffffffff81bbaa70 T __i915_sw_fence_await_dma_fence +ffffffff81bbabc0 t __dma_i915_sw_fence_wake +ffffffff81bbac20 T i915_sw_fence_await_reservation +ffffffff81bbad00 t i915_sw_fence_wake +ffffffff81bbb000 T dma_fence_work_init +ffffffff81bbb080 t fence_notify +ffffffff81bbb170 t fence_work +ffffffff81bbb1d0 T dma_fence_work_chain +ffffffff81bbb220 t get_driver_name +ffffffff81bbb250 t get_timeline_name +ffffffff81bbb290 t fence_release +ffffffff81bbc000 T i915_switcheroo_register +ffffffff81bbc030 T i915_switcheroo_unregister +ffffffff81bbd000 T i915_syncmap_init +ffffffff81bbd030 T i915_syncmap_is_later +ffffffff81bbd130 T i915_syncmap_set +ffffffff81bbd1e0 t __sync_set +ffffffff81bbd4d0 T i915_syncmap_free +ffffffff81bbd530 t __sync_free +ffffffff81bbe000 T i915_setup_sysfs +ffffffff81bbe030 T i915_teardown_sysfs +ffffffff81bbf000 T i915_ttm_buddy_man_init +ffffffff81bbf210 T i915_ttm_buddy_man_fini +ffffffff81bbf400 T i915_ttm_buddy_man_reserve +ffffffff81bbf4d0 T i915_ttm_buddy_man_visible_size +ffffffff81bbf500 T i915_ttm_buddy_man_avail +ffffffff81bbf560 t i915_ttm_buddy_man_alloc +ffffffff81bbf890 t i915_ttm_buddy_man_free +ffffffff81bbf900 t i915_ttm_buddy_man_intersects +ffffffff81bbf9b0 t i915_ttm_buddy_man_compatible +ffffffff81bbfa60 t i915_ttm_buddy_man_debug +ffffffff81bc0000 T i915_user_extensions +ffffffff81bc1000 T __i915_printk +ffffffff81bc10c0 T add_taint_for_CI +ffffffff81bc10f0 T cancel_timer +ffffffff81bc1140 T set_timer_ms +ffffffff81bc11f0 T i915_vtd_active +ffffffff81bc2000 T intel_vgpu_detect +ffffffff81bc2030 T intel_vgpu_register +ffffffff81bc2090 T intel_vgpu_active +ffffffff81bc20c0 T intel_vgpu_has_full_ppgtt +ffffffff81bc2100 T intel_vgpu_has_hwsp_emulation +ffffffff81bc2140 T intel_vgpu_has_huge_gtt +ffffffff81bc2180 T intel_vgt_deballoon +ffffffff81bc23c0 T intel_vgt_balloon +ffffffff81bc3000 T i915_vma_instance +ffffffff81bc35b0 T i915_vma_work +ffffffff81bc3620 T i915_vma_wait_for_bind +ffffffff81bc36a0 T i915_vma_bind +ffffffff81bc39f0 T i915_vma_pin_iomap +ffffffff81bc3bc0 T i915_vma_flush_writes +ffffffff81bc3c30 T i915_vma_unpin_iomap +ffffffff81bc3cc0 T i915_vma_unpin_and_release +ffffffff81bc3d30 T i915_vma_misplaced +ffffffff81bc3dd0 T __i915_vma_set_map_and_fenceable +ffffffff81bc3e50 T i915_gem_valid_gtt_space +ffffffff81bc3ee0 T vma_invalidate_tlb +ffffffff81bc3f20 T i915_vma_pin_ww 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intel_rotate_pages +ffffffff81bc66b0 t intel_remap_pages +ffffffff81bc6a70 t intel_partial_pages +ffffffff81bc7000 T i915_vma_resource_alloc +ffffffff81bc7050 T i915_vma_resource_free +ffffffff81bc7090 T i915_vma_resource_unhold +ffffffff81bc70a0 t __i915_vma_resource_unhold +ffffffff81bc7190 T i915_vma_resource_hold +ffffffff81bc71e0 T i915_vma_resource_unbind +ffffffff81bc7310 T __i915_vma_resource_init +ffffffff81bc7370 t i915_vma_resource_fence_notify +ffffffff81bc7440 T i915_vma_resource_bind_dep_sync +ffffffff81bc75c0 T i915_vma_resource_bind_dep_sync_all +ffffffff81bc7660 T i915_vma_resource_bind_dep_await +ffffffff81bc7800 T i915_vma_resource_module_exit +ffffffff81bc7820 T i915_vma_resource_module_init +ffffffff81bc7880 t get_driver_name +ffffffff81bc78b0 t get_timeline_name +ffffffff81bc78e0 t unbind_fence_release +ffffffff81bc7920 t i915_vma_resource_unbind_work +ffffffff81bc8000 T intel_platform_name +ffffffff81bc80a0 T intel_device_info_print +ffffffff81bc8d30 T intel_device_info_subplatform_init +ffffffff81bc9090 T intel_device_info_runtime_init +ffffffff81bc9770 T intel_driver_caps_print +ffffffff81bca000 T intel_dram_detect +ffffffff81bca480 t skl_get_dram_info +ffffffff81bca660 T intel_dram_edram_detect +ffffffff81bca6f0 t icl_pcode_read_mem_global_info +ffffffff81bca7d0 t skl_dram_get_channel_info +ffffffff81bca9a0 t skl_dram_get_dimm_info +ffffffff81bcb000 T intel_memory_region_lookup +ffffffff81bcb0e0 T intel_memory_region_by_type +ffffffff81bcb1a0 T intel_memory_region_reserve +ffffffff81bcb1c0 T intel_memory_region_debug +ffffffff81bcb220 T intel_memory_region_create +ffffffff81bcb390 T intel_memory_region_set_name +ffffffff81bcb410 T intel_memory_region_avail +ffffffff81bcb490 T intel_memory_region_destroy +ffffffff81bcb500 T intel_memory_regions_hw_probe +ffffffff81bcb650 T intel_memory_regions_driver_release +ffffffff81bcc000 T intel_detect_pch +ffffffff81bcc310 t intel_pch_match +ffffffff81bcc360 t intel_pch_type +ffffffff81bcd000 T snb_pcode_read +ffffffff81bcd0d0 t __snb_pcode_rw +ffffffff81bcd260 T snb_pcode_write_timeout +ffffffff81bcd330 T skl_pcode_request +ffffffff81bcd670 T intel_pcode_init +ffffffff81bcd6d0 T snb_pcode_read_p +ffffffff81bcd7e0 T snb_pcode_write_p +ffffffff81bce000 T intel_set_memory_cxsr +ffffffff81bce0a0 t _intel_set_memory_cxsr +ffffffff81bce350 T intel_wm_plane_visible +ffffffff81bce3b0 T ilk_wm_max_level +ffffffff81bce420 T intel_print_wm_latency +ffffffff81bce580 T ilk_disable_lp_wm +ffffffff81bce660 T g4x_wm_get_hw_state +ffffffff81bcee30 T g4x_wm_sanitize +ffffffff81bcefd0 t g4x_program_watermarks +ffffffff81bcf370 T vlv_wm_get_hw_state +ffffffff81bd0040 t vlv_invalidate_wms +ffffffff81bd01a0 T vlv_wm_sanitize +ffffffff81bd02f0 t vlv_program_watermarks +ffffffff81bd0a40 T ilk_wm_get_hw_state +ffffffff81bd0eb0 T intel_init_clock_gating +ffffffff81bd0ed0 T intel_suspend_hw +ffffffff81bd0f80 T intel_init_clock_gating_hooks +ffffffff81bd11d0 T intel_init_pm +ffffffff81bd1cc0 T intel_pm_setup +ffffffff81bd1d00 t chv_set_memory_dvfs +ffffffff81bd1ec0 t pvc_init_clock_gating +ffffffff81bd2060 t dg2_init_clock_gating +ffffffff81bd21b0 t xehpsdv_init_clock_gating +ffffffff81bd22b0 t adlp_init_clock_gating +ffffffff81bd23a0 t gen12lp_init_clock_gating +ffffffff81bd2510 t dg1_init_clock_gating +ffffffff81bd2600 t icl_init_clock_gating +ffffffff81bd26c0 t cfl_init_clock_gating +ffffffff81bd27e0 t gen9_init_clock_gating +ffffffff81bd28f0 t skl_init_clock_gating +ffffffff81bd2a30 t kbl_init_clock_gating +ffffffff81bd2c40 t bxt_init_clock_gating +ffffffff81bd2da0 t glk_init_clock_gating +ffffffff81bd2e00 t bdw_init_clock_gating +ffffffff81bd3250 t chv_init_clock_gating +ffffffff81bd3400 t hsw_init_clock_gating +ffffffff81bd3550 t ivb_init_clock_gating +ffffffff81bd3760 t g4x_disable_trickle_feed +ffffffff81bd38c0 t cpt_init_clock_gating +ffffffff81bd3bf0 t vlv_init_clock_gating +ffffffff81bd3d00 t gen6_init_clock_gating +ffffffff81bd3f00 t ilk_init_clock_gating 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atom_execute_table_scratch_unlocked +ffffffff81bec0a0 t atom_execute_table_locked +ffffffff81bec3d0 T atom_execute_table +ffffffff81bec480 T atom_parse +ffffffff81bec660 T atom_destroy +ffffffff81bec6a0 T atom_asic_init +ffffffff81bec8b0 T atom_parse_data_header +ffffffff81bec950 T atom_parse_cmd_header +ffffffff81bec9d0 T atom_allocate_fb_scratch +ffffffff81becaa0 t atom_op_move +ffffffff81becc80 t atom_op_and +ffffffff81bece60 t atom_op_or +ffffffff81bed040 t atom_op_shift_left +ffffffff81bed230 t atom_op_shift_right +ffffffff81bed420 t atom_op_mul +ffffffff81bed570 t atom_op_div +ffffffff81bed6e0 t atom_op_add +ffffffff81bed8c0 t atom_op_sub +ffffffff81bedaa0 t atom_op_setport +ffffffff81bedc20 t atom_op_setregblock +ffffffff81bedce0 t atom_op_setfbbase +ffffffff81beddb0 t atom_op_compare +ffffffff81bedfa0 t atom_op_switch +ffffffff81bee1f0 t atom_op_jump +ffffffff81bee470 t atom_op_test +ffffffff81bee630 t atom_op_delay +ffffffff81bee710 t atom_op_calltable +ffffffff81bee860 t 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btc_adjust_clock_combinations +ffffffff81bfd350 T btc_apply_voltage_delta_rules +ffffffff81bfd480 T btc_program_mgcg_hw_sequence +ffffffff81bfd580 T btc_dpm_enabled +ffffffff81bfd590 T btc_notify_uvd_to_smc +ffffffff81bfd600 T btc_reset_to_default +ffffffff81bfd650 T btc_read_arb_registers +ffffffff81bfd6e0 T btc_dpm_vblank_too_short +ffffffff81bfd750 T btc_dpm_pre_set_power_state +ffffffff81bfe630 T btc_dpm_set_power_state +ffffffff81bfea40 T btc_dpm_post_set_power_state +ffffffff81bfeb60 T btc_dpm_enable +ffffffff81bffd70 T btc_dpm_disable +ffffffff81c002a0 T btc_dpm_setup_asic +ffffffff81c00380 T btc_dpm_init +ffffffff81c00780 T btc_dpm_fini +ffffffff81c00830 T btc_dpm_debugfs_print_current_performance_level +ffffffff81c00880 T btc_dpm_get_current_sclk +ffffffff81c00900 T btc_dpm_get_current_mclk +ffffffff81c00980 T btc_dpm_get_sclk +ffffffff81c009d0 T btc_dpm_get_mclk +ffffffff81c01000 T ci_dpm_powergate_uvd +ffffffff81c01380 T ci_dpm_vblank_too_short +ffffffff81c01410 T ci_fan_ctrl_get_fan_speed_percent +ffffffff81c014b0 T ci_fan_ctrl_set_fan_speed_percent +ffffffff81c01580 T ci_fan_ctrl_set_mode +ffffffff81c01710 t ci_fan_ctrl_set_static_mode +ffffffff81c017d0 t ci_thermal_start_smc_fan_control +ffffffff81c01a10 T ci_fan_ctrl_get_mode +ffffffff81c01a70 T ci_dpm_force_performance_level +ffffffff81c02330 t ci_upload_dpm_level_enable_mask +ffffffff81c02660 T ci_dpm_pre_set_power_state +ffffffff81c02960 T ci_dpm_post_set_power_state +ffffffff81c02a30 T ci_dpm_setup_asic +ffffffff81c02c30 T ci_dpm_enable +ffffffff81c06a60 t ci_enable_didt +ffffffff81c06d00 t ci_enable_power_containment +ffffffff81c071a0 T ci_dpm_late_enable +ffffffff81c07390 T ci_dpm_disable +ffffffff81c07a90 T ci_dpm_set_power_state +ffffffff81c08c10 T ci_dpm_display_configuration_changed +ffffffff81c08db0 T ci_dpm_fini +ffffffff81c08e60 T ci_dpm_init +ffffffff81c0a530 T ci_dpm_debugfs_print_current_performance_level +ffffffff81c0a670 T ci_dpm_print_power_state +ffffffff81c0a730 T ci_dpm_get_current_sclk +ffffffff81c0a800 T ci_dpm_get_current_mclk +ffffffff81c0a8d0 T ci_dpm_get_sclk +ffffffff81c0a920 T ci_dpm_get_mclk +ffffffff81c0a970 t ci_populate_all_graphic_levels +ffffffff81c0aef0 t ci_populate_all_memory_levels +ffffffff81c0b800 t ci_do_program_memory_timing_parameters +ffffffff81c0ba20 t ci_populate_smc_voltage_table +ffffffff81c0bb80 t ci_enable_sclk_mclk_dpm +ffffffff81c0c000 T ci_copy_bytes_to_smc +ffffffff81c0c250 T ci_start_smc +ffffffff81c0c290 T ci_reset_smc +ffffffff81c0c2d0 T ci_program_jump_on_start +ffffffff81c0c300 T ci_stop_smc_clock +ffffffff81c0c340 T ci_start_smc_clock +ffffffff81c0c380 T ci_is_smc_running +ffffffff81c0c3f0 T ci_load_smc_ucode +ffffffff81c0c580 T ci_read_smc_sram_dword +ffffffff81c0c650 T ci_write_smc_sram_dword +ffffffff81c0d000 T cik_get_allowed_info_register +ffffffff81c0d0a0 T cik_didt_rreg +ffffffff81c0d140 T cik_didt_wreg +ffffffff81c0d1c0 T ci_get_temp +ffffffff81c0d210 T kv_get_temp +ffffffff81c0d260 T cik_pciep_rreg +ffffffff81c0d2e0 T cik_pciep_wreg +ffffffff81c0d350 T cik_get_xclk +ffffffff81c0d3c0 T cik_mm_rdoorbell +ffffffff81c0d420 T cik_mm_wdoorbell +ffffffff81c0d470 T ci_mc_load_microcode +ffffffff81c0d7c0 T cik_ring_test +ffffffff81c0da70 T cik_fence_gfx_ring_emit +ffffffff81c0de70 T cik_fence_compute_ring_emit +ffffffff81c0e100 T cik_semaphore_ring_emit +ffffffff81c0e2d0 T cik_copy_cpdma +ffffffff81c0e6d0 T cik_ring_ib_execute +ffffffff81c0ecb0 T cik_ib_test +ffffffff81c0ef90 T cik_gfx_get_rptr +ffffffff81c0eff0 T cik_gfx_get_wptr +ffffffff81c0f030 T cik_gfx_set_wptr +ffffffff81c0f070 T cik_compute_get_rptr +ffffffff81c0f150 T cik_compute_get_wptr +ffffffff81c0f230 T cik_compute_set_wptr +ffffffff81c0f2b0 T cik_gpu_check_soft_reset +ffffffff81c0f420 T cik_asic_reset +ffffffff81c0f830 t cik_gpu_pci_config_reset +ffffffff81c10050 T cik_gfx_is_lockup +ffffffff81c100c0 T cik_pcie_gart_tlb_flush +ffffffff81c10110 T cik_ib_parse +ffffffff81c10140 T cik_vm_init +ffffffff81c101a0 T cik_vm_fini +ffffffff81c101d0 T cik_vm_flush +ffffffff81c10f20 T cik_enter_rlc_safe_mode +ffffffff81c11010 T cik_exit_rlc_safe_mode +ffffffff81c11050 T cik_update_cg +ffffffff81c11520 t cik_enable_mgcg +ffffffff81c11a40 t cik_enable_cgcg +ffffffff81c11db0 T cik_init_cp_pg_table +ffffffff81c12070 T cik_get_csb_size +ffffffff81c12100 T cik_get_csb_buffer +ffffffff81c122a0 T cik_irq_set +ffffffff81c13040 t cik_disable_interrupt_state +ffffffff81c13500 T cik_irq_process +ffffffff81c14cb0 t cik_irq_ack +ffffffff81c15630 T cik_resume +ffffffff81c156c0 t cik_init_golden_registers +ffffffff81c15880 t cik_startup +ffffffff81c1b5d0 T cik_suspend +ffffffff81c1b9c0 T cik_init +ffffffff81c1c1b0 t cik_init_microcode +ffffffff81c1d1c0 t cik_pcie_gart_fini +ffffffff81c1d2c0 T cik_fini +ffffffff81c1d660 T dce8_program_fmt +ffffffff81c1d790 T dce8_bandwidth_update +ffffffff81c1e3b0 T cik_get_gpu_clock_counter +ffffffff81c1e480 T cik_set_uvd_clocks +ffffffff81c1e500 t cik_set_uvd_clock +ffffffff81c1e670 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cypress_calculate_burst_time +ffffffff81c24530 T cypress_program_memory_timing_parameters +ffffffff81c246e0 T cypress_populate_smc_initial_state +ffffffff81c24a80 T cypress_populate_smc_acpi_state +ffffffff81c24e10 T cypress_construct_voltage_tables +ffffffff81c24ec0 t cypress_trim_voltage_table_to_fit_state_table +ffffffff81c250b0 T cypress_populate_smc_voltage_tables +ffffffff81c25200 T cypress_get_mvdd_configuration +ffffffff81c252c0 T cypress_populate_mc_reg_table +ffffffff81c25520 T cypress_get_table_locations +ffffffff81c25600 T cypress_enable_display_gap +ffffffff81c25660 T cypress_dpm_setup_asic +ffffffff81c25750 T cypress_dpm_enable +ffffffff81c26230 t cypress_force_mc_use_s1 +ffffffff81c264b0 t cypress_gfx_clock_gating_enable +ffffffff81c267c0 t cypress_mg_clock_gating_enable +ffffffff81c26a40 T cypress_dpm_disable +ffffffff81c26c70 T cypress_dpm_set_power_state +ffffffff81c26f20 T cypress_dpm_display_configuration_changed +ffffffff81c27000 T cypress_dpm_init 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evergreen_hpd_set_polarity +ffffffff81c2bc80 T evergreen_hpd_init +ffffffff81c2bd50 T evergreen_hpd_fini +ffffffff81c2bdf0 T evergreen_get_number_of_dram_channels +ffffffff81c2be40 T evergreen_bandwidth_update +ffffffff81c2c000 t evergreen_line_buffer_adjust +ffffffff81c2c200 t evergreen_program_watermarks +ffffffff81c2ccb0 T evergreen_mc_wait_for_idle +ffffffff81c2cd50 T evergreen_pcie_gart_tlb_flush +ffffffff81c2ce30 T evergreen_mc_stop +ffffffff81c2d920 T evergreen_mc_resume +ffffffff81c2e030 T evergreen_mc_program +ffffffff81c2e440 T evergreen_ring_ib_execute +ffffffff81c2e8e0 T evergreen_mc_init +ffffffff81c2ea20 T evergreen_print_gpu_status_regs +ffffffff81c2ea50 T evergreen_is_display_hung +ffffffff81c2ec60 T evergreen_gpu_check_soft_reset +ffffffff81c2edc0 T evergreen_gpu_pci_config_reset +ffffffff81c2ef40 T evergreen_asic_reset +ffffffff81c2f260 T evergreen_gfx_is_lockup +ffffffff81c2f2d0 T sumo_rlc_fini +ffffffff81c2f490 t radeon_bo_reserve +ffffffff81c2f610 t radeon_bo_unreserve +ffffffff81c2f6f0 T sumo_rlc_init +ffffffff81c2fee0 T evergreen_rlc_resume +ffffffff81c30250 T evergreen_get_vblank_counter +ffffffff81c302c0 T evergreen_disable_interrupt_state +ffffffff81c30590 T evergreen_irq_set +ffffffff81c30b50 T evergreen_irq_suspend +ffffffff81c30ba0 T evergreen_irq_process +ffffffff81c316a0 t evergreen_irq_ack +ffffffff81c31da0 T evergreen_resume +ffffffff81c31e80 t evergreen_init_golden_registers +ffffffff81c32090 t evergreen_startup +ffffffff81c34720 T evergreen_suspend +ffffffff81c348c0 T evergreen_init +ffffffff81c34de0 T evergreen_fini +ffffffff81c34fd0 T evergreen_pcie_gen2_enable +ffffffff81c35200 T evergreen_program_aspm +ffffffff81c358a0 t evergreen_latency_watermark +ffffffff81c36000 T evergreen_cs_parse +ffffffff81c388c0 T evergreen_dma_cs_parse +ffffffff81c39b00 T evergreen_ib_parse +ffffffff81c39fb0 T evergreen_dma_ib_parse +ffffffff81c3a170 t evergreen_cs_track_check +ffffffff81c3b190 t evergreen_cs_handle_reg +ffffffff81c3d0d0 t evergreen_surface_value_conv_check +ffffffff81c3d3b0 t evergreen_surface_check +ffffffff81c3d850 t evergreen_cs_track_validate_htile +ffffffff81c3daf0 t evergreen_vm_reg_valid +ffffffff81c3e000 T evergreen_dma_fence_ring_emit +ffffffff81c3e2c0 T evergreen_dma_ring_ib_execute +ffffffff81c3e600 T evergreen_copy_dma +ffffffff81c3e9b0 T evergreen_dma_is_lockup +ffffffff81c3f000 T dce4_audio_enable +ffffffff81c3f080 T evergreen_hdmi_update_acr +ffffffff81c3f2a0 T dce4_afmt_write_latency_fields +ffffffff81c3f310 T dce4_afmt_hdmi_write_speaker_allocation +ffffffff81c3f380 T dce4_afmt_dp_write_speaker_allocation +ffffffff81c3f3f0 T evergreen_hdmi_write_sad_regs +ffffffff81c3f510 T evergreen_set_avi_packet +ffffffff81c3f6b0 T dce4_hdmi_audio_set_dto +ffffffff81c3f790 T dce4_dp_audio_set_dto +ffffffff81c3f880 T dce4_set_vbi_packet +ffffffff81c3f8f0 T dce4_hdmi_set_color_depth +ffffffff81c3fa40 T dce4_set_audio_packet +ffffffff81c3fc50 T dce4_set_mute +ffffffff81c3fd60 T evergreen_hdmi_enable +ffffffff81c40090 T evergreen_dp_enable +ffffffff81c41000 T kv_dpm_enable_bapm +ffffffff81c41070 T kv_dpm_enable +ffffffff81c425c0 t kv_enable_didt +ffffffff81c42860 T kv_dpm_late_enable +ffffffff81c42a50 T kv_dpm_powergate_uvd +ffffffff81c42bc0 T kv_dpm_disable +ffffffff81c42f30 T kv_dpm_force_performance_level +ffffffff81c430c0 t kv_force_dpm_lowest +ffffffff81c43190 T kv_dpm_pre_set_power_state +ffffffff81c43720 T kv_dpm_set_power_state +ffffffff81c43ed0 t kv_set_valid_clock_range +ffffffff81c44090 t kv_calculate_ds_divider +ffffffff81c44200 t kv_calculate_nbps_level_settings +ffffffff81c44390 t kv_update_vce_dpm +ffffffff81c44570 T kv_dpm_post_set_power_state +ffffffff81c44610 T kv_dpm_setup_asic +ffffffff81c44670 T kv_dpm_init +ffffffff81c44f10 T kv_dpm_debugfs_print_current_performance_level +ffffffff81c44f80 T kv_dpm_get_current_sclk +ffffffff81c44ff0 T kv_dpm_get_current_mclk +ffffffff81c45020 T kv_dpm_print_power_state +ffffffff81c450c0 T kv_dpm_fini +ffffffff81c45160 T kv_dpm_display_configuration_changed +ffffffff81c45190 T kv_dpm_get_sclk +ffffffff81c451e0 T kv_dpm_get_mclk +ffffffff81c46000 T kv_notify_message_to_smu +ffffffff81c460c0 T kv_dpm_get_enable_mask +ffffffff81c461a0 T kv_send_msg_to_smc_with_parameter +ffffffff81c46270 T kv_read_smc_sram_dword +ffffffff81c46300 T kv_smc_dpm_enable +ffffffff81c46430 T kv_smc_bapm_enable +ffffffff81c46560 T kv_copy_bytes_to_smc +ffffffff81c47000 T tn_smc_rreg +ffffffff81c47080 T tn_smc_wreg +ffffffff81c470f0 T ni_mc_load_microcode +ffffffff81c472e0 T ni_init_microcode +ffffffff81c47820 T cayman_get_allowed_info_register +ffffffff81c478b0 T tn_get_temp +ffffffff81c47940 T cayman_pcie_gart_tlb_flush +ffffffff81c47990 T cayman_cp_int_cntl_setup +ffffffff81c479e0 T cayman_fence_ring_emit +ffffffff81c47d90 T cayman_ring_ib_execute +ffffffff81c48210 T cayman_gfx_get_rptr +ffffffff81c482a0 T cayman_gfx_get_wptr +ffffffff81c48310 T cayman_gfx_set_wptr +ffffffff81c48390 T cayman_gpu_check_soft_reset +ffffffff81c48510 T cayman_asic_reset +ffffffff81c48810 T cayman_gfx_is_lockup +ffffffff81c48880 T cayman_resume +ffffffff81c48910 t ni_init_golden_registers +ffffffff81c489f0 t cayman_startup +ffffffff81c4b120 T cayman_suspend +ffffffff81c4b310 T cayman_init +ffffffff81c4b910 T cayman_fini +ffffffff81c4bb90 T cayman_vm_init +ffffffff81c4bbf0 T cayman_vm_fini +ffffffff81c4bc20 T cayman_vm_decode_fault +ffffffff81c4bcb0 T cayman_vm_flush +ffffffff81c4c130 T tn_set_vce_clocks +ffffffff81c4d000 T cayman_dma_get_rptr +ffffffff81c4d070 T cayman_dma_get_wptr +ffffffff81c4d0c0 T cayman_dma_set_wptr +ffffffff81c4d110 T cayman_dma_ring_ib_execute +ffffffff81c4d4a0 T cayman_dma_stop +ffffffff81c4d550 T cayman_dma_resume +ffffffff81c4d7a0 T cayman_dma_fini +ffffffff81c4d860 T cayman_dma_is_lockup +ffffffff81c4d8e0 T cayman_dma_vm_copy_pages +ffffffff81c4d9d0 T cayman_dma_vm_write_pages +ffffffff81c4db30 T cayman_dma_vm_set_pages +ffffffff81c4dc90 T cayman_dma_vm_pad_ib +ffffffff81c4dce0 T cayman_dma_vm_flush +ffffffff81c4f000 T ni_get_pi +ffffffff81c4f030 T ni_get_ps +ffffffff81c4f060 T ni_dpm_vblank_too_short +ffffffff81c4f0d0 T ni_dpm_force_performance_level +ffffffff81c4f220 T ni_copy_and_switch_arb_sets +ffffffff81c4f500 T ni_set_uvd_clock_before_set_eng_clock +ffffffff81c4f580 T ni_set_uvd_clock_after_set_eng_clock +ffffffff81c4f600 T ni_dpm_setup_asic +ffffffff81c4f810 T ni_update_current_ps +ffffffff81c4f8d0 T ni_update_requested_ps +ffffffff81c4f990 T ni_dpm_enable +ffffffff81c52bd0 t ni_populate_smc_tdp_limits +ffffffff81c52d90 T ni_dpm_disable +ffffffff81c53150 T ni_dpm_pre_set_power_state +ffffffff81c53730 T ni_dpm_set_power_state +ffffffff81c54850 T ni_dpm_post_set_power_state +ffffffff81c54920 T ni_dpm_init +ffffffff81c552f0 T ni_dpm_fini +ffffffff81c553a0 T ni_dpm_print_power_state +ffffffff81c55470 T ni_dpm_debugfs_print_current_performance_level +ffffffff81c554b0 T ni_dpm_get_current_sclk +ffffffff81c55520 T ni_dpm_get_current_mclk +ffffffff81c55590 T ni_dpm_get_sclk +ffffffff81c555f0 T ni_dpm_get_mclk +ffffffff81c55650 t ni_do_program_memory_timing_parameters +ffffffff81c55780 t ni_calculate_sclk_params +ffffffff81c559a0 t ni_calculate_power_boost_limit +ffffffff81c55b50 t ni_populate_mclk_value +ffffffff81c56000 T r100_wait_for_vblank +ffffffff81c561a0 T r100_page_flip +ffffffff81c56450 T r100_page_flip_pending +ffffffff81c56500 T r100_pm_get_dynpm_state +ffffffff81c56720 T r100_pm_init_profile +ffffffff81c56800 T r100_pm_misc +ffffffff81c56c40 T r100_pm_prepare +ffffffff81c56d00 T r100_pm_finish +ffffffff81c56dc0 T r100_gui_idle +ffffffff81c56e00 T r100_hpd_sense +ffffffff81c56e60 T r100_hpd_set_polarity +ffffffff81c56f20 T r100_hpd_init +ffffffff81c56fc0 T r100_hpd_fini +ffffffff81c57020 T r100_pci_gart_tlb_flush +ffffffff81c57050 T r100_pci_gart_init +ffffffff81c57120 T r100_pci_gart_get_page_entry +ffffffff81c57150 T r100_pci_gart_set_page +ffffffff81c57190 T r100_pci_gart_enable +ffffffff81c57280 T r100_pci_gart_disable +ffffffff81c57300 T r100_pci_gart_fini +ffffffff81c57380 T r100_irq_set +ffffffff81c57460 T r100_irq_disable +ffffffff81c574d0 T r100_irq_process +ffffffff81c577d0 T r100_get_vblank_counter +ffffffff81c57820 T r100_fence_ring_emit +ffffffff81c57c90 T r100_semaphore_ring_emit +ffffffff81c57cc0 T r100_copy_blit +ffffffff81c58360 T r100_ring_start +ffffffff81c58450 T r100_gfx_get_rptr +ffffffff81c584b0 T r100_gfx_get_wptr +ffffffff81c584f0 T r100_gfx_set_wptr +ffffffff81c58530 T r100_cp_init +ffffffff81c58a60 T r100_debugfs_cp_init +ffffffff81c58a90 T r100_cp_fini +ffffffff81c58b30 T r100_cp_disable +ffffffff81c58c70 T r100_gui_wait_for_idle +ffffffff81c58d60 T r100_reloc_pitch_offset +ffffffff81c58e90 T r100_packet3_load_vbpntr +ffffffff81c59130 T r100_cs_parse_packet0 +ffffffff81c59240 T r100_cs_packet_parse_vline +ffffffff81c59430 T r100_cs_track_check_pkt3_indx_buffer +ffffffff81c594b0 T r100_cs_parse +ffffffff81c5a970 T r100_cs_track_clear +ffffffff81c5ad00 T r100_cs_track_check +ffffffff81c5b6f0 T r100_mc_wait_for_idle +ffffffff81c5b790 T r100_gpu_is_lockup +ffffffff81c5b7f0 T r100_enable_bm +ffffffff81c5b840 T r100_bm_disable +ffffffff81c5b8f0 T r100_asic_reset +ffffffff81c5bc20 T r100_mc_stop +ffffffff81c5bde0 T r100_mc_resume +ffffffff81c5bea0 T r100_set_common_regs +ffffffff81c5c050 T r100_vram_init_sizes +ffffffff81c5c240 T r100_vga_set_state +ffffffff81c5c2a0 T r100_pll_errata_after_index +ffffffff81c5c2e0 T r100_pll_rreg +ffffffff81c5c410 T r100_pll_wreg +ffffffff81c5c520 T r100_debugfs_rbbm_init +ffffffff81c5c550 T r100_debugfs_mc_info_init +ffffffff81c5c580 T r100_set_surface_reg +ffffffff81c5c790 T r100_clear_surface_reg +ffffffff81c5c840 T r100_bandwidth_update +ffffffff81c5d2f0 T r100_ring_test +ffffffff81c5d5b0 T r100_ring_ib_execute +ffffffff81c5d810 T r100_ib_test +ffffffff81c5db50 T r100_vga_render_disable +ffffffff81c5dbb0 T r100_resume +ffffffff81c5ddb0 t r100_startup +ffffffff81c5e2e0 T r100_suspend +ffffffff81c5e3c0 T r100_fini +ffffffff81c5e4d0 T r100_restore_sanity +ffffffff81c5e570 T r100_init +ffffffff81c5eaf0 T r100_mm_rreg_slow +ffffffff81c5eb70 T r100_mm_wreg_slow +ffffffff81c5ebd0 T r100_io_rreg +ffffffff81c5ec70 T r100_io_wreg +ffffffff81c5ece0 t r100_cs_track_texture_print +ffffffff81c5f000 T r200_copy_dma +ffffffff81c5f470 T r200_packet0_check +ffffffff81c60490 T r200_set_safe_registers +ffffffff81c61000 T rv370_pcie_rreg +ffffffff81c61080 T rv370_pcie_wreg +ffffffff81c610f0 T rv370_pcie_gart_tlb_flush +ffffffff81c612f0 T rv370_pcie_gart_get_page_entry +ffffffff81c61350 T rv370_pcie_gart_set_page +ffffffff81c61390 T rv370_pcie_gart_init +ffffffff81c61460 T rv370_pcie_gart_enable +ffffffff81c617c0 T rv370_pcie_gart_disable +ffffffff81c61940 T rv370_pcie_gart_fini +ffffffff81c61970 T r300_fence_ring_emit +ffffffff81c61f00 T r300_ring_start +ffffffff81c62910 T r300_mc_wait_for_idle +ffffffff81c629b0 T r300_asic_reset +ffffffff81c62bd0 T r300_mc_init +ffffffff81c62c80 T rv370_set_pcie_lanes +ffffffff81c62e40 T rv370_get_pcie_lanes +ffffffff81c62ef0 T r300_cs_parse +ffffffff81c63260 t r300_packet0_check +ffffffff81c640c0 T r300_set_reg_safe +ffffffff81c64100 T r300_mc_program +ffffffff81c64280 T r300_clock_startup +ffffffff81c64310 T r300_resume +ffffffff81c644e0 t r300_startup +ffffffff81c64840 T r300_suspend +ffffffff81c648c0 T r300_fini +ffffffff81c649a0 T r300_init +ffffffff81c65000 T r420_pm_init_profile +ffffffff81c650f0 T r420_pipes_init +ffffffff81c652d0 T r420_mc_rreg +ffffffff81c65350 T r420_mc_wreg +ffffffff81c653c0 T r420_resume +ffffffff81c655a0 t r420_startup +ffffffff81c65940 T r420_suspend +ffffffff81c65ae0 T r420_fini +ffffffff81c65bc0 T r420_init +ffffffff81c65e40 T r420_debugfs_pipes_info_init +ffffffff81c66000 T r520_mc_wait_for_idle +ffffffff81c660a0 T r520_resume +ffffffff81c661a0 t r520_startup +ffffffff81c66590 T r520_init +ffffffff81c67000 T r600_rcu_rreg +ffffffff81c67080 T r600_rcu_wreg +ffffffff81c670f0 T r600_uvd_ctx_rreg +ffffffff81c67170 T r600_uvd_ctx_wreg +ffffffff81c671e0 T r600_get_allowed_info_register +ffffffff81c67260 T r600_get_xclk +ffffffff81c67290 T r600_set_uvd_clocks +ffffffff81c677f0 T dce3_program_fmt +ffffffff81c67910 T rv6xx_get_temp +ffffffff81c67960 T r600_pm_get_dynpm_state +ffffffff81c67d60 T rs780_pm_init_profile +ffffffff81c67e70 T r600_pm_init_profile +ffffffff81c68110 T r600_pm_misc +ffffffff81c681f0 T r600_gui_idle +ffffffff81c68230 T r600_hpd_sense +ffffffff81c68350 T r600_hpd_set_polarity +ffffffff81c685c0 T r600_hpd_init +ffffffff81c687d0 T r600_hpd_fini +ffffffff81c68980 T r600_pcie_gart_tlb_flush +ffffffff81c68ac0 T r600_pcie_gart_init +ffffffff81c68b60 T r600_mc_wait_for_idle +ffffffff81c68c00 T rs780_mc_rreg +ffffffff81c68ca0 T rs780_mc_wreg +ffffffff81c68d30 T r600_vram_scratch_init +ffffffff81c68e30 t radeon_bo_reserve +ffffffff81c68fb0 t radeon_bo_unreserve +ffffffff81c69090 T r600_vram_scratch_fini +ffffffff81c69110 T r600_set_bios_scratch_engine_hung +ffffffff81c69160 T r600_gpu_check_soft_reset +ffffffff81c694e0 T r600_asic_reset +ffffffff81c69870 t r600_gpu_pci_config_reset +ffffffff81c69a90 T r600_gfx_is_lockup +ffffffff81c69b00 T r6xx_remap_render_backend +ffffffff81c69cf0 T r600_count_pipe_bits +ffffffff81c69d60 T r600_pciep_rreg +ffffffff81c69de0 T r600_pciep_wreg +ffffffff81c69e50 T r600_cp_stop +ffffffff81c69ed0 T r600_init_microcode +ffffffff81c6a3a0 T r600_gfx_get_rptr +ffffffff81c6a400 T r600_gfx_get_wptr +ffffffff81c6a440 T r600_gfx_set_wptr +ffffffff81c6a480 T r600_cp_start +ffffffff81c6a800 T r600_cp_resume +ffffffff81c6ab60 T r600_ring_init +ffffffff81c6ac00 T r600_cp_fini +ffffffff81c6ac90 T r600_scratch_init +ffffffff81c6ad00 T r600_ring_test +ffffffff81c6afb0 T r600_fence_ring_emit +ffffffff81c6b870 T r600_semaphore_ring_emit +ffffffff81c6ba60 T r600_copy_cpdma +ffffffff81c6c020 T r600_set_surface_reg +ffffffff81c6c050 T r600_clear_surface_reg +ffffffff81c6c080 T r600_vga_set_state +ffffffff81c6c0e0 T r600_resume +ffffffff81c6c170 t r600_startup +ffffffff81c6e180 T r600_suspend +ffffffff81c6e2f0 T r600_irq_suspend +ffffffff81c6e3b0 t r600_pcie_gart_disable +ffffffff81c6e5b0 T r600_init +ffffffff81c6eda0 T r600_ih_ring_init +ffffffff81c6ee10 T r600_irq_fini +ffffffff81c6ef50 T r600_fini +ffffffff81c6f0e0 T r600_ring_ib_execute +ffffffff81c6f560 T r600_ib_test +ffffffff81c6f810 T r600_ih_ring_alloc +ffffffff81c6f930 T r600_ih_ring_fini +ffffffff81c6f9c0 T r600_rlc_stop +ffffffff81c6fb50 T r600_disable_interrupts +ffffffff81c6fc00 T r600_irq_init +ffffffff81c70070 t r600_disable_interrupt_state +ffffffff81c70360 T r600_irq_disable +ffffffff81c70420 T r600_irq_set +ffffffff81c70ba0 t r600_irq_ack +ffffffff81c71090 T r600_irq_process +ffffffff81c71c90 T r600_mmio_hdp_flush +ffffffff81c71d10 T r600_set_pcie_lanes +ffffffff81c71e40 T r600_get_pcie_lanes +ffffffff81c71f20 T r600_get_gpu_clock_counter +ffffffff81c72000 T r600_fmt_is_valid_color +ffffffff81c72040 T r600_fmt_is_valid_texture +ffffffff81c72090 T r600_fmt_get_blocksize +ffffffff81c720d0 T r600_fmt_get_nblocksx +ffffffff81c72130 T r600_fmt_get_nblocksy +ffffffff81c72190 T r600_cs_common_vline_parse +ffffffff81c72460 T r600_mip_minify +ffffffff81c724c0 T r600_cs_parse +ffffffff81c74450 T r600_dma_cs_next_reloc +ffffffff81c744d0 T r600_dma_cs_parse +ffffffff81c74c00 t r600_cs_track_check +ffffffff81c75d40 t r600_cs_check_reg +ffffffff81c77000 T r600_dma_get_rptr +ffffffff81c77060 T r600_dma_get_wptr +ffffffff81c770a0 T r600_dma_set_wptr +ffffffff81c770e0 T r600_dma_stop +ffffffff81c77170 T r600_dma_resume +ffffffff81c77380 T r600_dma_fini +ffffffff81c77400 T r600_dma_is_lockup +ffffffff81c77470 T r600_dma_ring_test +ffffffff81c776d0 T r600_dma_fence_ring_emit +ffffffff81c778c0 T r600_dma_semaphore_ring_emit +ffffffff81c779e0 T r600_dma_ib_test +ffffffff81c77bf0 T r600_dma_ring_ib_execute +ffffffff81c77f30 T r600_copy_dma +ffffffff81c79000 T r600_dpm_print_class_info +ffffffff81c792b0 T r600_dpm_print_cap_info +ffffffff81c79340 T r600_dpm_print_ps_status +ffffffff81c793d0 T r600_dpm_get_vblank_time +ffffffff81c79490 T r600_dpm_get_vrefresh +ffffffff81c79520 T r600_calculate_u_and_p +ffffffff81c795a0 T r600_calculate_at +ffffffff81c79650 T r600_gfx_clockgating_enable +ffffffff81c79760 T r600_dynamicpm_enable +ffffffff81c797c0 T r600_enable_thermal_protection +ffffffff81c79820 T r600_enable_acpi_pm +ffffffff81c79870 T r600_enable_dynamic_pcie_gen2 +ffffffff81c798d0 T r600_dynamicpm_enabled +ffffffff81c79910 T r600_enable_sclk_control +ffffffff81c79970 T r600_enable_mclk_control +ffffffff81c799d0 T r600_enable_spll_bypass +ffffffff81c79a30 T r600_wait_for_spll_change +ffffffff81c79ab0 T r600_set_bsp +ffffffff81c79af0 T r600_set_at +ffffffff81c79b50 T r600_set_tc +ffffffff81c79bb0 T r600_select_td +ffffffff81c79c70 T r600_set_vrc +ffffffff81c79cb0 T r600_set_tpu +ffffffff81c79d10 T r600_set_tpc +ffffffff81c79d70 T r600_set_sstu +ffffffff81c79dd0 T r600_set_sst +ffffffff81c79e20 T r600_set_git +ffffffff81c79e70 T r600_set_fctu +ffffffff81c79ed0 T r600_set_fct +ffffffff81c79f20 T r600_set_ctxcgtt3d_rphc +ffffffff81c79f80 T r600_set_ctxcgtt3d_rsdc +ffffffff81c79fe0 T r600_set_vddc3d_oorsu +ffffffff81c7a040 T r600_set_vddc3d_oorphc +ffffffff81c7a0a0 T r600_set_vddc3d_oorsdc +ffffffff81c7a100 T r600_set_mpll_lock_time +ffffffff81c7a150 T r600_set_mpll_reset_time +ffffffff81c7a1a0 T r600_engine_clock_entry_enable +ffffffff81c7a2a0 T r600_engine_clock_entry_enable_pulse_skipping +ffffffff81c7a3a0 T r600_engine_clock_entry_enable_post_divider +ffffffff81c7a4a0 T r600_engine_clock_entry_set_post_divider +ffffffff81c7a560 T r600_engine_clock_entry_set_reference_divider +ffffffff81c7a620 T r600_engine_clock_entry_set_feedback_divider +ffffffff81c7a6e0 T r600_engine_clock_entry_set_step_time +ffffffff81c7a7a0 T r600_vid_rt_set_ssu +ffffffff81c7a800 T r600_vid_rt_set_vru +ffffffff81c7a860 T r600_vid_rt_set_vrt +ffffffff81c7a8c0 T r600_voltage_control_enable_pins +ffffffff81c7a910 T r600_voltage_control_program_voltages +ffffffff81c7a9a0 T r600_voltage_control_deactivate_static_control +ffffffff81c7aa30 T r600_power_level_enable +ffffffff81c7aaa0 T r600_power_level_set_voltage_index +ffffffff81c7ab10 T r600_power_level_set_mem_clock_index +ffffffff81c7ab70 T r600_power_level_set_eng_clock_index +ffffffff81c7abe0 T r600_power_level_set_watermark_id +ffffffff81c7ac50 T r600_power_level_set_pcie_gen2 +ffffffff81c7acb0 T r600_power_level_get_current_index +ffffffff81c7acf0 T r600_power_level_get_target_index +ffffffff81c7ad30 T r600_power_level_set_enter_index +ffffffff81c7ad90 T r600_wait_for_power_level_unequal +ffffffff81c7ae80 T r600_wait_for_power_level +ffffffff81c7af70 T r600_start_dpm +ffffffff81c7b250 T r600_stop_dpm +ffffffff81c7b2a0 T r600_dpm_pre_set_power_state +ffffffff81c7b2d0 T r600_dpm_post_set_power_state +ffffffff81c7b300 T r600_is_uvd_state +ffffffff81c7b340 T r600_is_internal_thermal_sensor +ffffffff81c7b380 T r600_dpm_late_enable +ffffffff81c7b490 T r600_get_platform_caps +ffffffff81c7b530 T r600_parse_extended_power_table +ffffffff81c7c4a0 T r600_free_extended_power_table +ffffffff81c7c5a0 T r600_get_pcie_gen_support +ffffffff81c7c5f0 T r600_get_pcie_lane_support +ffffffff81c7c650 T r600_encode_pci_lane_width +ffffffff81c7d000 T r600_audio_update_hdmi +ffffffff81c7d180 t r600_audio_status +ffffffff81c7d2a0 T r600_hdmi_buffer_status_changed +ffffffff81c7d340 T r600_hdmi_update_audio_settings +ffffffff81c7d710 T r600_audio_enable +ffffffff81c7d790 T r600_audio_get_pin +ffffffff81c7d7c0 T r600_hdmi_update_acr +ffffffff81c7db60 T r600_set_avi_packet +ffffffff81c7dd60 T r600_hdmi_audio_workaround +ffffffff81c7de30 T r600_hdmi_audio_set_dto +ffffffff81c7def0 T r600_set_vbi_packet +ffffffff81c7dfb0 T r600_set_audio_packet +ffffffff81c7e280 T r600_set_mute +ffffffff81c7e390 T r600_hdmi_enable +ffffffff81c7f000 T radeon_acpi_is_pcie_performance_request_supported +ffffffff81c7f050 T radeon_acpi_pcie_notify_device_ready +ffffffff81c7f180 T radeon_acpi_pcie_performance_request +ffffffff81c7f3a0 T radeon_acpi_init +ffffffff81c7faf0 t radeon_acpi_event +ffffffff81c7fe40 T radeon_acpi_fini +ffffffff81c80000 T radeon_agp_head_init +ffffffff81c80050 T radeon_agp_init +ffffffff81c800a0 T radeon_agp_resume +ffffffff81c80140 T radeon_agp_fini +ffffffff81c80190 T radeon_agp_suspend +ffffffff81c81000 T radeon_agp_disable +ffffffff81c81120 T radeon_asic_init +ffffffff81c819b0 t radeon_invalid_rreg +ffffffff81c819f0 t radeon_invalid_wreg +ffffffff81c81a30 t radeon_invalid_get_allowed_info_register +ffffffff81c82000 T radeon_atombios_i2c_init +ffffffff81c823b0 T radeon_atombios_lookup_gpio +ffffffff81c824b0 T radeon_get_atom_connector_info_from_object_table +ffffffff81c82e10 t radeon_lookup_i2c_gpio +ffffffff81c83110 t radeon_atom_apply_quirks +ffffffff81c83540 T radeon_get_atom_connector_info_from_supported_devices_table +ffffffff81c83a40 T radeon_atom_get_clock_info +ffffffff81c83dc0 T radeon_atombios_sideport_present +ffffffff81c83e70 T radeon_atombios_get_tmds_info +ffffffff81c83fb0 T radeon_atombios_get_ppll_ss_info +ffffffff81c840d0 T radeon_atombios_get_asic_ss_info +ffffffff81c84440 T radeon_atombios_get_lvds_info +ffffffff81c847b0 T radeon_atombios_get_primary_dac_info +ffffffff81c84860 T radeon_atom_get_tv_timings +ffffffff81c84ab0 T radeon_atombios_get_tv_info +ffffffff81c84b60 T radeon_atombios_get_tv_dac_info +ffffffff81c84c60 T radeon_atombios_get_default_voltages +ffffffff81c84d20 T radeon_atombios_get_power_modes +ffffffff81c85df0 T radeon_atom_get_clock_dividers +ffffffff81c860f0 T radeon_atom_get_memory_pll_dividers +ffffffff81c86230 T radeon_atom_set_clock_gating +ffffffff81c86280 T radeon_atom_get_engine_clock +ffffffff81c862d0 T radeon_atom_get_memory_clock +ffffffff81c86320 T radeon_atom_set_engine_clock +ffffffff81c86370 T radeon_atom_set_memory_clock +ffffffff81c863d0 T radeon_atom_set_engine_dram_timings +ffffffff81c86440 T radeon_atom_update_memory_dll +ffffffff81c86490 T radeon_atom_set_ac_timing +ffffffff81c864e0 T radeon_atom_set_voltage +ffffffff81c865b0 T radeon_atom_get_max_vddc +ffffffff81c86690 T radeon_atom_get_leakage_vddc_based_on_leakage_idx +ffffffff81c86760 T radeon_atom_get_leakage_id_from_vbios +ffffffff81c86820 T radeon_atom_get_leakage_vddc_based_on_leakage_params +ffffffff81c86a30 T radeon_atom_get_voltage_evv +ffffffff81c86ae0 T radeon_atom_get_voltage_gpio_settings +ffffffff81c86be0 T radeon_atom_is_voltage_gpio +ffffffff81c86d70 T radeon_atom_get_svi2_info +ffffffff81c86e60 T radeon_atom_get_max_voltage +ffffffff81c87000 T radeon_atom_get_min_voltage +ffffffff81c87140 T radeon_atom_get_voltage_step +ffffffff81c87240 T radeon_atom_round_to_true_voltage +ffffffff81c873b0 T radeon_atom_get_voltage_table +ffffffff81c87620 T radeon_atom_get_memory_info +ffffffff81c877d0 T radeon_atom_get_mclk_range_table +ffffffff81c87a20 T radeon_atom_init_mc_reg_table +ffffffff81c87ca0 T radeon_atom_initialize_bios_scratch_regs +ffffffff81c87d70 T radeon_save_bios_scratch_regs +ffffffff81c87e50 T radeon_restore_bios_scratch_regs +ffffffff81c87f30 T radeon_atom_output_lock +ffffffff81c87fc0 T radeon_atombios_connected_scratch_regs +ffffffff81c88740 T radeon_atombios_encoder_crtc_scratch_regs +ffffffff81c88880 T radeon_atombios_encoder_dpms_scratch_regs +ffffffff81c88aa0 t radeon_atombios_parse_misc_flags_1_3 +ffffffff81c88c90 t radeon_atombios_add_pplib_thermal_controller +ffffffff81c89090 t radeon_atombios_parse_pplib_clock_info +ffffffff81c893a0 t radeon_atombios_parse_pplib_non_clock_info +ffffffff81c8a000 T radeon_audio_init +ffffffff81c8a290 T radeon_audio_endpoint_rreg +ffffffff81c8a2d0 T radeon_audio_endpoint_wreg +ffffffff81c8a310 T radeon_audio_get_pin +ffffffff81c8a360 T radeon_audio_detect +ffffffff81c8a690 T radeon_audio_fini +ffffffff81c8a7d0 T radeon_audio_mode_set +ffffffff81c8a820 T radeon_audio_dpms +ffffffff81c8a870 T radeon_audio_decode_dfs_div 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combios_parse_pll_table +ffffffff81c98e40 T radeon_combios_initialize_bios_scratch_regs +ffffffff81c98ed0 T radeon_combios_output_lock +ffffffff81c98f30 T radeon_combios_connected_scratch_regs +ffffffff81c99290 T radeon_combios_encoder_crtc_scratch_regs +ffffffff81c99370 T radeon_combios_encoder_dpms_scratch_regs +ffffffff81c9a000 T radeon_connector_hotplug +ffffffff81c9a100 T radeon_get_monitor_bpc +ffffffff81c9a530 T radeon_connector_edid +ffffffff81c9a5e0 T radeon_connector_encoder_get_dp_bridge_encoder_id +ffffffff81c9a660 T radeon_connector_is_dp12_capable +ffffffff81c9a700 T radeon_add_atom_connector +ffffffff81c9b550 T radeon_add_legacy_connector +ffffffff81c9ba90 t radeon_dp_detect +ffffffff81c9be50 t radeon_dvi_force +ffffffff81c9bea0 t radeon_connector_set_property +ffffffff81c9c6e0 t radeon_connector_unregister +ffffffff81c9c740 t radeon_connector_destroy +ffffffff81c9c7b0 t radeon_best_single_encoder +ffffffff81c9c830 t radeon_connector_get_edid +ffffffff81c9c990 t radeon_dp_get_modes +ffffffff81c9ccc0 t radeon_dp_mode_valid +ffffffff81c9ce90 t radeon_dvi_encoder +ffffffff81c9cf70 t radeon_fixup_lvds_native_mode +ffffffff81c9d0a0 t radeon_add_common_modes +ffffffff81c9d190 t radeon_fp_native_mode +ffffffff81c9d260 t radeon_lvds_set_property +ffffffff81c9d350 t radeon_vga_detect +ffffffff81c9d600 t radeon_connector_analog_encoder_conflict_solve +ffffffff81c9d820 t radeon_vga_get_modes +ffffffff81c9d910 t radeon_vga_mode_valid +ffffffff81c9d970 t radeon_dvi_detect +ffffffff81c9e010 t radeon_dvi_mode_valid +ffffffff81c9e1a0 t radeon_tv_detect +ffffffff81c9e3e0 t radeon_tv_get_modes +ffffffff81c9e4b0 t radeon_tv_mode_valid +ffffffff81c9e500 t radeon_lvds_detect +ffffffff81c9e6a0 t radeon_lvds_get_modes +ffffffff81c9e810 t radeon_lvds_mode_valid +ffffffff81c9f000 T radeon_cs_parser_init +ffffffff81c9f480 T radeon_cs_ioctl +ffffffff81c9ffb0 t radeon_cs_parser_fini +ffffffff81ca0140 T radeon_cs_packet_parse +ffffffff81ca02f0 T radeon_cs_packet_next_is_pkt3_nop +ffffffff81ca0350 T radeon_cs_dump_packet +ffffffff81ca03d0 T radeon_cs_packet_next_reloc +ffffffff81ca05a0 t cmp_size_smaller_first +ffffffff81ca1000 T radeon_crtc_cursor_move +ffffffff81ca1070 t radeon_lock_cursor +ffffffff81ca1230 t radeon_cursor_move_locked +ffffffff81ca1780 T radeon_crtc_cursor_set2 +ffffffff81ca1a00 t radeon_hide_cursor +ffffffff81ca1ac0 t radeon_bo_reserve +ffffffff81ca1c40 t radeon_bo_unreserve +ffffffff81ca1d20 t radeon_show_cursor +ffffffff81ca1f70 T radeon_cursor_reset +ffffffff81ca2000 T radeon_is_px +ffffffff81ca2040 T radeon_program_register_sequence +ffffffff81ca2170 T radeon_pci_config_reset +ffffffff81ca21a0 T radeon_surface_init +ffffffff81ca2360 T radeon_scratch_init +ffffffff81ca23e0 T radeon_scratch_get +ffffffff81ca2460 T radeon_scratch_free +ffffffff81ca24c0 T radeon_doorbell_get +ffffffff81ca2570 T radeon_doorbell_free +ffffffff81ca25c0 T radeon_wb_disable +ffffffff81ca25f0 T radeon_wb_fini +ffffffff81ca2690 t radeon_bo_reserve +ffffffff81ca2810 t radeon_bo_unreserve +ffffffff81ca28f0 T radeon_wb_init +ffffffff81ca2be0 T radeon_vram_location +ffffffff81ca2d10 T radeon_gtt_location +ffffffff81ca2e40 T radeon_device_is_virtual +ffffffff81ca2e70 T radeon_card_posted +ffffffff81ca3090 T radeon_update_bandwidth_info +ffffffff81ca3110 T radeon_boot_test_post_card +ffffffff81ca31d0 T radeon_dummy_page_init +ffffffff81ca3290 T radeon_dummy_page_fini +ffffffff81ca32f0 T radeon_atombios_init +ffffffff81ca3480 t cail_reg_read +ffffffff81ca34e0 t cail_reg_write +ffffffff81ca3540 t cail_ioreg_read +ffffffff81ca3560 t cail_ioreg_write +ffffffff81ca3580 t cail_mc_read +ffffffff81ca35b0 t cail_mc_write +ffffffff81ca35e0 t cail_pll_read +ffffffff81ca3610 t cail_pll_write +ffffffff81ca3640 T radeon_atombios_fini +ffffffff81ca36e0 T radeon_combios_init +ffffffff81ca3720 T radeon_combios_fini +ffffffff81ca3750 T radeon_device_init +ffffffff81ca4230 T radeon_device_fini +ffffffff81ca4330 T radeon_suspend_kms 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radeon_bo_unreserve +ffffffff81ca9000 T radeon_dp_aux_transfer_native +ffffffff81caa000 T radeondrm_probe +ffffffff81caa060 T radeondrm_attach_kms +ffffffff81caa7a0 T radeondrm_detach_kms +ffffffff81caa830 T radeondrm_activate_kms +ffffffff81caa8f0 T radeondrm_wsioctl +ffffffff81caa9a0 T radeondrm_wsmmap +ffffffff81caa9d0 T radeondrm_alloc_screen +ffffffff81caaa00 T radeondrm_free_screen +ffffffff81caaa10 T radeondrm_show_screen +ffffffff81caaaf0 T radeondrm_enter_ddb +ffffffff81caab50 T radeondrm_doswitch +ffffffff81caabe0 T radeondrm_setpal +ffffffff81caade0 T radeondrm_attachhook +ffffffff81cab110 T radeondrm_forcedetach +ffffffff81cac000 T radeon_setup_encoder_clones +ffffffff81cac0b0 T radeon_get_encoder_enum +ffffffff81cac230 T radeon_link_encoder_connector +ffffffff81cac370 T radeon_encoder_set_active_device +ffffffff81cac430 T radeon_get_connector_for_encoder +ffffffff81cac4b0 T radeon_get_connector_for_encoder_init +ffffffff81cac530 T radeon_get_external_encoder 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radeon_fence_wait_empty +ffffffff81caedf0 T radeon_fence_ref +ffffffff81caee30 T radeon_fence_unref +ffffffff81caee70 T radeon_fence_count_emitted +ffffffff81caeef0 T radeon_fence_need_sync +ffffffff81caef50 T radeon_fence_note_sync +ffffffff81caf120 T radeon_fence_driver_start_ring +ffffffff81caf310 T radeon_fence_driver_init +ffffffff81caf450 T radeon_debugfs_fence_init +ffffffff81caf480 T radeon_fence_driver_fini +ffffffff81caf6d0 T radeon_fence_driver_force_completion +ffffffff81caf7d0 t radeon_fence_get_driver_name +ffffffff81caf800 t radeon_fence_get_timeline_name +ffffffff81caf8a0 t radeon_fence_enable_signaling +ffffffff81cafac0 t radeon_fence_is_signaled +ffffffff81cafb80 t radeon_fence_default_wait +ffffffff81cafd30 t radeon_fence_any_seq_signaled +ffffffff81caff30 t radeon_fence_check_lockup +ffffffff81cb0180 t __delayed_work_tick +ffffffff81cb01a0 t radeon_fence_check_signaled +ffffffff81cb0230 t radeon_fence_wait_cb +ffffffff81cb1000 T radeon_gart_table_ram_alloc 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radeon_gem_pwrite_ioctl +ffffffff81cb2760 T radeon_gem_create_ioctl +ffffffff81cb2880 T radeon_gem_userptr_ioctl +ffffffff81cb28b0 T radeon_gem_set_domain_ioctl +ffffffff81cb2a10 T radeon_mode_dumb_mmap +ffffffff81cb2ac0 T radeon_gem_mmap_ioctl +ffffffff81cb2b80 T radeon_gem_busy_ioctl +ffffffff81cb2c30 T radeon_gem_wait_idle_ioctl +ffffffff81cb2d40 T radeon_gem_set_tiling_ioctl +ffffffff81cb2df0 T radeon_gem_get_tiling_ioctl +ffffffff81cb2ec0 t radeon_bo_reserve +ffffffff81cb30d0 t radeon_bo_unreserve +ffffffff81cb31b0 T radeon_gem_va_ioctl +ffffffff81cb3580 T radeon_gem_op_ioctl +ffffffff81cb3680 T radeon_mode_dumb_create +ffffffff81cb3780 T radeon_gem_debugfs_init +ffffffff81cb4000 T radeon_ddc_probe +ffffffff81cb40c0 T radeon_router_select_ddc_port +ffffffff81cb4320 T radeon_bb_set_bits +ffffffff81cb4490 T radeon_bb_set_dir +ffffffff81cb44c0 T radeon_bb_read_bits +ffffffff81cb45a0 T radeon_acquire_bus +ffffffff81cb49f0 T radeon_release_bus +ffffffff81cb4b60 T radeon_send_start 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radeon_irq_kms_init +ffffffff81cb83e0 t radeon_hotplug_work_func +ffffffff81cb8490 t radeon_dp_work_func +ffffffff81cb84c0 T radeon_irq_kms_fini +ffffffff81cb8660 T radeon_irq_kms_sw_irq_get +ffffffff81cb8700 T radeon_irq_kms_sw_irq_get_delayed +ffffffff81cb8740 T radeon_irq_kms_sw_irq_put +ffffffff81cb87d0 T radeon_irq_kms_pflip_irq_get +ffffffff81cb8880 T radeon_irq_kms_pflip_irq_put +ffffffff81cb8920 T radeon_irq_kms_enable_afmt +ffffffff81cb89b0 T radeon_irq_kms_disable_afmt +ffffffff81cb8a40 T radeon_irq_kms_enable_hpd +ffffffff81cb8b30 T radeon_irq_kms_disable_hpd +ffffffff81cb8c10 T radeon_irq_kms_set_irq_n_enabled +ffffffff81cb8d80 t __delayed_work_tick +ffffffff81cb9000 T radeon_info_ioctl +ffffffff81cb9bf0 T radeon_driver_lastclose_kms +ffffffff81cb9c00 T radeon_driver_open_kms +ffffffff81cb9d30 t radeon_bo_reserve +ffffffff81cb9eb0 T radeon_driver_postclose_kms +ffffffff81cba0d0 T radeon_get_vblank_counter_kms +ffffffff81cba270 T radeon_enable_vblank_kms +ffffffff81cba320 T radeon_disable_vblank_kms +ffffffff81cbb000 T radeon_crtc_set_base +ffffffff81cbb020 T radeon_crtc_do_set_base +ffffffff81cbb5c0 T radeon_crtc_set_base_atomic +ffffffff81cbb5e0 t radeon_bo_reserve +ffffffff81cbb760 t radeon_bo_unreserve +ffffffff81cbb840 T radeon_legacy_init_crtc +ffffffff81cbb890 t radeon_crtc_dpms +ffffffff81cbba90 t radeon_crtc_prepare +ffffffff81cbbb10 t radeon_crtc_commit +ffffffff81cbbb80 t radeon_crtc_mode_fixup +ffffffff81cbbba0 t radeon_crtc_mode_set +ffffffff81cbcff0 t radeon_crtc_disable +ffffffff81cbe000 T radeon_legacy_get_backlight_level +ffffffff81cbe040 T radeon_legacy_set_backlight_level +ffffffff81cbe080 t radeon_legacy_lvds_update +ffffffff81cbe3e0 T radeon_legacy_backlight_init +ffffffff81cbe5b0 t radeon_legacy_backlight_get_brightness +ffffffff81cbe610 T radeon_add_legacy_encoder +ffffffff81cbe990 t radeon_legacy_backlight_update_status +ffffffff81cbea20 t radeon_lvds_enc_destroy +ffffffff81cbeab0 t radeon_legacy_lvds_dpms +ffffffff81cbeb00 t radeon_legacy_mode_fixup +ffffffff81cbeb70 t radeon_legacy_lvds_prepare +ffffffff81cbec00 t radeon_legacy_lvds_commit +ffffffff81cbec80 t radeon_legacy_lvds_mode_set +ffffffff81cbee90 t radeon_legacy_encoder_disable +ffffffff81cbeee0 t radeon_legacy_tmds_int_dpms +ffffffff81cbefa0 t radeon_legacy_tmds_int_prepare +ffffffff81cbf070 t radeon_legacy_tmds_int_commit +ffffffff81cbf140 t radeon_legacy_tmds_int_mode_set +ffffffff81cbf3b0 t radeon_legacy_primary_dac_dpms +ffffffff81cbf4f0 t radeon_legacy_primary_dac_prepare +ffffffff81cbf550 t radeon_legacy_primary_dac_commit +ffffffff81cbf5a0 t radeon_legacy_primary_dac_mode_set +ffffffff81cbf750 t radeon_legacy_primary_dac_detect +ffffffff81cbf940 t radeon_legacy_tv_dac_dpms +ffffffff81cbfb40 t radeon_legacy_tv_dac_prepare +ffffffff81cbfba0 t radeon_legacy_tv_dac_commit +ffffffff81cbfbf0 t radeon_legacy_tv_dac_mode_set +ffffffff81cbff90 t radeon_legacy_tv_dac_detect +ffffffff81cc0bc0 t radeon_ext_tmds_enc_destroy +ffffffff81cc0c10 t radeon_legacy_tmds_ext_dpms +ffffffff81cc0ce0 t radeon_legacy_tmds_ext_prepare +ffffffff81cc0db0 t radeon_legacy_tmds_ext_commit +ffffffff81cc0e80 t radeon_legacy_tmds_ext_mode_set +ffffffff81cc2000 T radeon_legacy_tv_mode_set +ffffffff81cc30b0 T radeon_legacy_tv_adjust_crtc_reg +ffffffff81cc31c0 T radeon_legacy_tv_adjust_pll1 +ffffffff81cc32b0 T radeon_legacy_tv_adjust_pll2 +ffffffff81cc4000 T radeon_ttm_bo_is_radeon_bo +ffffffff81cc4040 t radeon_ttm_bo_destroy +ffffffff81cc4170 T radeon_ttm_placement_from_domain +ffffffff81cc42e0 T radeon_bo_create +ffffffff81cc44a0 T radeon_bo_kmap +ffffffff81cc4580 T radeon_bo_check_tiling +ffffffff81cc4660 T radeon_bo_kunmap +ffffffff81cc46f0 T radeon_bo_ref +ffffffff81cc4730 T radeon_bo_unref +ffffffff81cc4780 T radeon_bo_pin_restricted +ffffffff81cc4ab0 T radeon_bo_pin +ffffffff81cc4ad0 T radeon_bo_unpin +ffffffff81cc4b40 T radeon_bo_evict_vram +ffffffff81cc4ba0 T radeon_bo_force_delete +ffffffff81cc4d10 T radeon_bo_init +ffffffff81cc4df0 T radeon_bo_fini +ffffffff81cc4e30 T radeon_bo_list_validate +ffffffff81cc5120 T radeon_bo_get_surface_reg +ffffffff81cc53c0 T radeon_bo_set_tiling_flags +ffffffff81cc56e0 T radeon_bo_get_tiling_flags +ffffffff81cc5730 T radeon_bo_move_notify +ffffffff81cc57f0 T radeon_bo_fault_reserve_notify +ffffffff81cc5af0 T radeon_bo_fence +ffffffff81cc6000 T radeon_pm_get_type_index +ffffffff81cc6080 T radeon_pm_acpi_event_handler +ffffffff81cc6160 t radeon_pm_update_profile +ffffffff81cc6280 t radeon_pm_set_clocks +ffffffff81cc6c20 T radeon_dpm_enable_uvd +ffffffff81cc6ce0 T radeon_pm_compute_clocks +ffffffff81cc7720 T radeon_dpm_enable_vce +ffffffff81cc7790 T radeon_pm_suspend +ffffffff81cc7890 T radeon_pm_resume +ffffffff81cc7b80 T radeon_pm_init +ffffffff81cc8280 T radeon_pm_late_init +ffffffff81cc8340 T radeon_pm_fini +ffffffff81cc8450 t radeon_dpm_thermal_work_handler +ffffffff81cc8530 t radeon_dynpm_idle_work_handler +ffffffff81cc8820 t __delayed_work_tick +ffffffff81cc9000 T radeon_gem_prime_get_sg_table +ffffffff81cc9030 T radeon_gem_prime_pin +ffffffff81cc90c0 t radeon_bo_reserve +ffffffff81cc9240 t radeon_bo_unreserve +ffffffff81cc9320 T radeon_gem_prime_unpin +ffffffff81cc9390 T radeon_gem_prime_export +ffffffff81cca000 T radeon_ring_supports_scratch_reg +ffffffff81cca030 T radeon_ring_free_size +ffffffff81cca0e0 T radeon_ring_lockup_update +ffffffff81cca140 T radeon_ring_alloc +ffffffff81cca2c0 T radeon_ring_lock +ffffffff81cca340 T radeon_ring_commit +ffffffff81cca440 T radeon_ring_unlock_commit +ffffffff81cca470 T radeon_ring_undo +ffffffff81cca4a0 T radeon_ring_unlock_undo +ffffffff81cca4c0 T radeon_ring_test_lockup +ffffffff81cca5e0 T radeon_ring_backup +ffffffff81cca7a0 T radeon_ring_restore +ffffffff81cca960 T radeon_ring_init +ffffffff81ccab50 t radeon_bo_reserve +ffffffff81ccacd0 t radeon_bo_unreserve +ffffffff81ccadb0 T radeon_ring_fini +ffffffff81ccb000 T radeon_sa_bo_manager_init +ffffffff81ccb190 T radeon_sa_bo_manager_fini +ffffffff81ccb380 T radeon_sa_bo_manager_start +ffffffff81ccb4c0 t radeon_bo_reserve +ffffffff81ccb640 t radeon_bo_unreserve +ffffffff81ccb720 T radeon_sa_bo_manager_suspend +ffffffff81ccb7c0 T radeon_sa_bo_new +ffffffff81ccbff0 T radeon_sa_bo_free +ffffffff81ccd000 T radeon_semaphore_create +ffffffff81ccd0f0 T radeon_semaphore_emit_signal +ffffffff81ccd180 T radeon_semaphore_emit_wait +ffffffff81ccd210 T radeon_semaphore_free +ffffffff81cce000 T radeon_sync_create +ffffffff81cce090 T radeon_sync_fence +ffffffff81cce140 T radeon_sync_resv +ffffffff81cce270 T radeon_sync_rings +ffffffff81cce430 T radeon_sync_free +ffffffff81ccf000 T radeon_test_moves +ffffffff81ccf070 t radeon_do_test_moves +ffffffff81ccf660 T radeon_test_ring_sync +ffffffff81ccf930 t radeon_test_create_and_emit_fence +ffffffff81ccfaa0 T radeon_test_syncing +ffffffff81ccfd60 t radeon_test_ring_sync2 +ffffffff81cd00d0 t radeon_bo_reserve +ffffffff81cd0250 t radeon_bo_unreserve +ffffffff81cd1000 T radeon_get_rdev +ffffffff81cd1030 T radeon_ttm_tt_set_userptr +ffffffff81cd1080 T radeon_ttm_tt_is_bound +ffffffff81cd10d0 T radeon_ttm_tt_has_userptr +ffffffff81cd1110 T radeon_ttm_tt_is_readonly +ffffffff81cd1150 T radeon_ttm_init +ffffffff81cd1370 T radeon_ttm_set_active_vram_size +ffffffff81cd13b0 t radeon_bo_reserve +ffffffff81cd1530 t radeon_bo_unreserve +ffffffff81cd1610 T radeon_ttm_fini +ffffffff81cd16e0 t radeon_ttm_tt_create +ffffffff81cd17d0 t radeon_ttm_tt_populate +ffffffff81cd1880 t radeon_ttm_tt_unpopulate +ffffffff81cd1980 t radeon_ttm_tt_destroy +ffffffff81cd19d0 t radeon_evict_flags +ffffffff81cd1b20 t radeon_bo_move +ffffffff81cd1fa0 t radeon_ttm_io_mem_reserve +ffffffff81cd3000 T radeon_ucode_print_mc_hdr +ffffffff81cd30b0 t radeon_ucode_print_common_hdr +ffffffff81cd31e0 T radeon_ucode_print_smc_hdr +ffffffff81cd3270 T radeon_ucode_print_gfx_hdr +ffffffff81cd3340 T radeon_ucode_print_rlc_hdr +ffffffff81cd3440 T radeon_ucode_print_sdma_hdr +ffffffff81cd3520 T radeon_ucode_validate +ffffffff81cd4000 T radeon_uvd_init +ffffffff81cd44f0 t radeon_uvd_idle_work_handler +ffffffff81cd4660 t radeon_bo_reserve +ffffffff81cd4870 t radeon_bo_unreserve +ffffffff81cd4950 T radeon_uvd_fini +ffffffff81cd4a20 T radeon_uvd_suspend +ffffffff81cd4be0 T radeon_uvd_note_usage +ffffffff81cd4e20 T radeon_uvd_get_destroy_msg +ffffffff81cd4f30 T radeon_uvd_resume +ffffffff81cd4fc0 T radeon_uvd_force_into_uvd_segment +ffffffff81cd5060 T radeon_uvd_free_handles +ffffffff81cd5220 T radeon_uvd_cs_parse +ffffffff81cd5940 T radeon_uvd_get_create_msg +ffffffff81cd5ac0 t radeon_uvd_send_msg +ffffffff81cd5c60 T radeon_uvd_calc_upll_dividers +ffffffff81cd5e00 T radeon_uvd_send_upll_ctlreq +ffffffff81cd6140 t __delayed_work_tick +ffffffff81cd7000 T radeon_vce_init +ffffffff81cd7610 t radeon_vce_idle_work_handler +ffffffff81cd76e0 t radeon_bo_reserve +ffffffff81cd7860 t radeon_bo_unreserve +ffffffff81cd7940 T radeon_vce_fini +ffffffff81cd79c0 T radeon_vce_suspend +ffffffff81cd7aa0 T radeon_vce_resume +ffffffff81cd7bf0 T radeon_vce_note_usage +ffffffff81cd7d10 T radeon_vce_free_handles +ffffffff81cd7dd0 T radeon_vce_get_destroy_msg +ffffffff81cd8070 T radeon_vce_get_create_msg +ffffffff81cd8430 T radeon_vce_cs_reloc +ffffffff81cd8530 T radeon_vce_cs_parse +ffffffff81cd8d60 T radeon_vce_semaphore_emit +ffffffff81cd8f30 T radeon_vce_ib_execute +ffffffff81cd90d0 T radeon_vce_fence_emit +ffffffff81cd9310 T radeon_vce_ring_test +ffffffff81cd9460 T radeon_vce_ib_test +ffffffff81cd9580 t __delayed_work_tick +ffffffff81cda000 T radeon_vm_manager_init +ffffffff81cda060 T radeon_vm_manager_fini +ffffffff81cda180 T radeon_vm_get_bos +ffffffff81cda2b0 T radeon_vm_grab_id +ffffffff81cda440 T radeon_vm_flush +ffffffff81cda5d0 T radeon_vm_fence +ffffffff81cda680 T radeon_vm_bo_find +ffffffff81cda6e0 T radeon_vm_bo_add +ffffffff81cda7c0 T radeon_vm_bo_set_addr +ffffffff81cdac20 t radeon_bo_unreserve +ffffffff81cdad00 t radeon_vm_clear_bo +ffffffff81cdaef0 T radeon_vm_map_gart +ffffffff81cdaf30 T radeon_vm_update_page_directory +ffffffff81cdb2e0 T radeon_vm_bo_update +ffffffff81cdb9c0 T radeon_vm_clear_freed +ffffffff81cdbaa0 T radeon_vm_clear_invalids +ffffffff81cdbb40 T radeon_vm_bo_rmv +ffffffff81cdbc30 T radeon_vm_bo_invalidate +ffffffff81cdbce0 T radeon_vm_init +ffffffff81cdbf40 T radeon_vm_fini +ffffffff81cdc210 t radeon_bo_reserve +ffffffff81cdc390 t radeon_vm_frag_ptes +ffffffff81cdd000 T rs400_gart_adjust_size +ffffffff81cdd0c0 T rs400_gart_tlb_flush +ffffffff81cdd140 T rs400_gart_init +ffffffff81cdd240 T rs400_gart_enable +ffffffff81cdd5a0 T rs400_gart_disable +ffffffff81cdd600 T rs400_gart_fini +ffffffff81cdd670 T rs400_gart_get_page_entry +ffffffff81cdd6d0 T rs400_gart_set_page +ffffffff81cdd710 T rs400_mc_wait_for_idle +ffffffff81cdd7b0 T rs400_mc_rreg +ffffffff81cdd840 T rs400_mc_wreg +ffffffff81cdd8c0 T rs400_resume +ffffffff81cdd9f0 t rs400_mc_program +ffffffff81cddaf0 t rs400_startup +ffffffff81cddce0 T rs400_suspend +ffffffff81cddd80 T rs400_fini +ffffffff81cdde70 T rs400_init +ffffffff81cdf000 T avivo_wait_for_vblank +ffffffff81cdf280 T rs600_page_flip +ffffffff81cdf540 T rs600_page_flip_pending +ffffffff81cdf5b0 T avivo_program_fmt +ffffffff81cdf6d0 T rs600_pm_misc +ffffffff81cdfa10 T rs600_pm_prepare +ffffffff81cdfb10 T rs600_pm_finish +ffffffff81cdfc10 T rs600_hpd_sense +ffffffff81cdfc70 T rs600_hpd_set_polarity +ffffffff81cdfd30 T rs600_hpd_init +ffffffff81cdfe10 T rs600_hpd_fini +ffffffff81cdfeb0 T rs600_asic_reset +ffffffff81ce0120 T rs600_gart_tlb_flush +ffffffff81ce01e0 T rs600_gart_get_page_entry +ffffffff81ce0240 T rs600_gart_set_page +ffffffff81ce0280 T rs600_irq_set +ffffffff81ce0450 T rs600_irq_disable +ffffffff81ce04d0 t rs600_irq_ack +ffffffff81ce0680 T rs600_irq_process +ffffffff81ce09f0 T rs600_get_vblank_counter +ffffffff81ce0a40 T rs600_mc_wait_for_idle +ffffffff81ce0ae0 T rs600_bandwidth_update +ffffffff81ce0bd0 T rs600_mc_rreg +ffffffff81ce0c50 T rs600_mc_wreg +ffffffff81ce0cc0 T rs600_set_safe_registers +ffffffff81ce0d00 T rs600_resume +ffffffff81ce0e30 t rs600_startup +ffffffff81ce1670 T rs600_suspend +ffffffff81ce1770 T rs600_fini +ffffffff81ce1870 T rs600_init +ffffffff81ce2000 T rs690_mc_wait_for_idle +ffffffff81ce20a0 T rs690_pm_info +ffffffff81ce2330 T rs690_line_buffer_adjust +ffffffff81ce2430 T rs690_bandwidth_update +ffffffff81ce2750 t rs690_crtc_bandwidth_compute +ffffffff81ce2b80 t rs690_compute_mode_priority +ffffffff81ce3000 T rs690_mc_rreg +ffffffff81ce3090 T rs690_mc_wreg +ffffffff81ce3110 T rs690_resume +ffffffff81ce3200 t rs690_startup +ffffffff81ce34f0 T rs690_suspend +ffffffff81ce3550 T rs690_fini +ffffffff81ce3600 T rs690_init +ffffffff81ce4000 T rs780_dpm_enable +ffffffff81ce4be0 T rs780_dpm_disable +ffffffff81ce4cc0 T rs780_dpm_set_power_state +ffffffff81ce50a0 t rs780_force_voltage +ffffffff81ce51e0 t rs780_enable_voltage_scaling +ffffffff81ce5390 T rs780_dpm_setup_asic +ffffffff81ce53c0 T rs780_dpm_display_configuration_changed +ffffffff81ce5510 T rs780_dpm_init +ffffffff81ce5a80 T rs780_dpm_print_power_state +ffffffff81ce5b10 T rs780_dpm_fini +ffffffff81ce5ba0 T rs780_dpm_get_sclk +ffffffff81ce5be0 T rs780_dpm_get_mclk +ffffffff81ce5c10 T rs780_dpm_debugfs_print_current_performance_level +ffffffff81ce5c40 T rs780_dpm_get_current_sclk +ffffffff81ce5cd0 T rs780_dpm_get_current_mclk +ffffffff81ce5d00 T rs780_dpm_force_performance_level +ffffffff81ce5ef0 t rs780_force_fbdiv +ffffffff81ce7000 T rv515_ring_start +ffffffff81ce7b30 T rv515_mc_wait_for_idle +ffffffff81ce7bd0 T rv515_vga_render_disable +ffffffff81ce7c20 T rv515_mc_rreg +ffffffff81ce7cb0 T rv515_mc_wreg +ffffffff81ce7d30 T rv515_debugfs +ffffffff81ce7d40 T rv515_mc_stop +ffffffff81ce82d0 T rv515_mc_resume +ffffffff81ce88e0 T rv515_clock_startup +ffffffff81ce89b0 T rv515_resume +ffffffff81ce8bf0 t rv515_startup +ffffffff81ce90d0 T rv515_suspend +ffffffff81ce9140 T rv515_set_safe_registers +ffffffff81ce9180 T rv515_fini +ffffffff81ce9230 T rv515_init +ffffffff81ce9520 T atom_rv515_force_tv_scaler +ffffffff81cecbc0 T rv515_bandwidth_avivo_update +ffffffff81cecd60 t rv515_crtc_bandwidth_compute +ffffffff81ced0a0 t rv515_compute_mode_priority +ffffffff81ced550 T rv515_bandwidth_update +ffffffff81cee000 T rv6xx_dpm_enable +ffffffff81cee7f0 t rv6xx_calculate_stepping_parameters +ffffffff81cee9c0 t rv6xx_program_stepping_parameters_except_lowest_entry +ffffffff81ceefb0 t rv6xx_program_stepping_parameters_lowest_entry +ffffffff81cef090 T rv6xx_dpm_disable +ffffffff81cef410 T rv6xx_dpm_set_power_state +ffffffff81cefe10 T rv6xx_setup_asic +ffffffff81ceff50 T rv6xx_dpm_display_configuration_changed +ffffffff81ceffd0 T rv6xx_dpm_init +ffffffff81cf0520 T rv6xx_dpm_print_power_state +ffffffff81cf05e0 T rv6xx_dpm_debugfs_print_current_performance_level +ffffffff81cf0610 T rv6xx_dpm_get_current_sclk +ffffffff81cf0680 T rv6xx_dpm_get_current_mclk +ffffffff81cf06f0 T rv6xx_dpm_fini +ffffffff81cf0780 T rv6xx_dpm_get_sclk +ffffffff81cf07c0 T rv6xx_dpm_get_mclk +ffffffff81cf0800 T rv6xx_dpm_force_performance_level +ffffffff81cf0990 t rv6xx_generate_steps +ffffffff81cf0ca0 t rv6xx_output_stepping +ffffffff81cf0dc0 t rv6xx_program_mclk_stepping_entry +ffffffff81cf1030 t rv6xx_program_engine_spread_spectrum +ffffffff81cf1310 t rv6xx_step_sw_voltage +ffffffff81cf2000 T rv730_populate_sclk_value +ffffffff81cf2240 T rv730_populate_mclk_value +ffffffff81cf2460 T rv730_read_clock_registers +ffffffff81cf2580 T rv730_populate_smc_acpi_state +ffffffff81cf2730 T rv730_populate_smc_initial_state +ffffffff81cf28f0 T rv730_program_memory_timing_parameters +ffffffff81cf2ad0 T rv730_start_dpm +ffffffff81cf2b60 T rv730_stop_dpm +ffffffff81cf2c20 T rv730_program_dcodt +ffffffff81cf2cf0 T rv730_get_odt_values +ffffffff81cf3000 T rv740_get_decoded_reference_divider +ffffffff81cf30a0 T rv740_get_dll_speed +ffffffff81cf31d0 T rv740_populate_sclk_value +ffffffff81cf33e0 T rv740_populate_mclk_value +ffffffff81cf3820 T rv740_read_clock_registers +ffffffff81cf3950 T rv740_populate_smc_acpi_state +ffffffff81cf3b80 T rv740_enable_mclk_spread_spectrum +ffffffff81cf3be0 T rv740_get_mclk_frequency_ratio +ffffffff81cf4000 T rv770_set_uvd_clocks +ffffffff81cf4570 T rv770_get_xclk +ffffffff81cf45d0 T rv770_page_flip +ffffffff81cf48e0 T rv770_page_flip_pending +ffffffff81cf4950 T rv770_get_temp +ffffffff81cf49b0 T rv770_pm_misc +ffffffff81cf4a90 T r700_cp_stop +ffffffff81cf4b10 T r700_cp_fini +ffffffff81cf4ba0 T rv770_set_clk_bypass_mode +ffffffff81cf4cc0 T r700_vram_gtt_location +ffffffff81cf4e50 T rv770_resume +ffffffff81cf4ee0 t rv770_init_golden_registers +ffffffff81cf5070 t rv770_startup +ffffffff81cf7060 T rv770_suspend +ffffffff81cf7280 T rv770_init +ffffffff81cf7850 T rv770_fini +ffffffff81cf8000 T rv770_copy_dma +ffffffff81cf9000 T rv770_get_ps +ffffffff81cf9030 T rv770_get_pi +ffffffff81cf9060 T evergreen_get_pi +ffffffff81cf9090 T rv770_restore_cgcg +ffffffff81cf9110 T rv770_stop_dpm +ffffffff81cf91d0 T rv770_dpm_enabled +ffffffff81cf9210 T rv770_enable_thermal_protection +ffffffff81cf9270 T rv770_enable_acpi_pm +ffffffff81cf92c0 T rv770_get_seq_value +ffffffff81cf9300 T rv770_write_smc_soft_register +ffffffff81cf9330 T rv770_populate_smc_t +ffffffff81cf94d0 T rv770_populate_smc_sp +ffffffff81cf9530 T rv770_map_clkf_to_ibias +ffffffff81cf9590 T rv770_populate_vddc_value +ffffffff81cf9640 T rv770_populate_mvdd_value +ffffffff81cf9690 T rv770_calculate_memory_refresh_rate +ffffffff81cf9700 T rv770_enable_backbias +ffffffff81cf9760 T rv770_setup_bsp +ffffffff81cf9850 T rv770_program_git +ffffffff81cf98a0 T rv770_program_tp +ffffffff81cf9920 T rv770_program_tpp +ffffffff81cf9960 T rv770_program_sstp +ffffffff81cf99a0 T rv770_program_engine_speed_parameters +ffffffff81cf99f0 T rv770_program_vc +ffffffff81cf9a40 T rv770_clear_vc +ffffffff81cf9a80 T rv770_upload_firmware +ffffffff81cf9ac0 T rv770_populate_initial_mvdd_value +ffffffff81cf9b10 T rv770_get_memory_module_index +ffffffff81cf9b50 T rv770_enable_voltage_control +ffffffff81cf9bb0 T rv770_halt_smc +ffffffff81cf9c10 T rv770_resume_smc +ffffffff81cf9c60 T rv770_set_sw_state +ffffffff81cf9cc0 T rv770_set_boot_state +ffffffff81cf9d10 T rv770_set_uvd_clock_before_set_eng_clock +ffffffff81cf9d80 T rv770_set_uvd_clock_after_set_eng_clock +ffffffff81cf9df0 T rv770_restrict_performance_levels_before_switch +ffffffff81cf9e50 T rv770_dpm_force_performance_level +ffffffff81cf9f10 T r7xx_start_smc +ffffffff81cf9f40 T r7xx_stop_smc +ffffffff81cf9f70 T rv770_read_voltage_smio_registers +ffffffff81cf9fb0 T rv770_reset_smio_status +ffffffff81cfa070 T rv770_get_memory_type +ffffffff81cfa0c0 T rv770_get_pcie_gen2_status +ffffffff81cfa130 T rv770_get_max_vddc +ffffffff81cfa190 T rv770_program_response_times +ffffffff81cfa2e0 T rv770_enable_auto_throttle_source +ffffffff81cfa460 T rv770_dpm_enable +ffffffff81cfb4e0 T rv770_dpm_late_enable +ffffffff81cfb610 T rv770_dpm_disable +ffffffff81cfb970 T rv770_dpm_set_power_state +ffffffff81cfbf70 T rv770_dpm_setup_asic +ffffffff81cfc2d0 T rv770_dpm_display_configuration_changed +ffffffff81cfc350 T rv7xx_parse_power_table +ffffffff81cfc890 T rv770_get_engine_memory_ss +ffffffff81cfc920 T rv770_dpm_init +ffffffff81cfcb60 T rv770_dpm_print_power_state +ffffffff81cfcc80 T rv770_dpm_debugfs_print_current_performance_level +ffffffff81cfccb0 T rv770_dpm_get_current_sclk +ffffffff81cfcd20 T rv770_dpm_get_current_mclk +ffffffff81cfcd90 T rv770_dpm_fini +ffffffff81cfce20 T rv770_dpm_get_sclk +ffffffff81cfce60 T rv770_dpm_get_mclk +ffffffff81cfceb0 T rv770_dpm_vblank_too_short +ffffffff81cfcf20 t rv770_convert_power_level_to_smc +ffffffff81cfe000 T rv770_copy_bytes_to_smc +ffffffff81cfe240 T rv770_start_smc +ffffffff81cfe290 T rv770_reset_smc +ffffffff81cfe2e0 T rv770_stop_smc_clock +ffffffff81cfe330 T rv770_start_smc_clock +ffffffff81cfe380 T rv770_is_smc_running +ffffffff81cfe3c0 T rv770_send_msg_to_smc +ffffffff81cfe4a0 T rv770_wait_for_smc_inactive +ffffffff81cfe540 T rv770_load_smc_ucode +ffffffff81cfe6d0 T rv770_read_smc_sram_dword +ffffffff81cfe790 T rv770_write_smc_sram_dword +ffffffff81cff000 T si_get_allowed_info_register +ffffffff81cff090 T si_get_xclk +ffffffff81cff100 T si_get_temp +ffffffff81cff150 T si_mc_load_microcode +ffffffff81cff420 T dce6_bandwidth_update +ffffffff81cff820 t dce6_program_watermarks +ffffffff81d002d0 T si_fence_ring_emit +ffffffff81d00750 T si_ring_ib_execute +ffffffff81d00f30 T si_gpu_check_soft_reset +ffffffff81d010d0 T si_asic_reset +ffffffff81d014f0 t si_gpu_pci_config_reset +ffffffff81d018a0 T si_gfx_is_lockup +ffffffff81d01910 T si_vram_gtt_location +ffffffff81d019b0 T si_pcie_gart_tlb_flush +ffffffff81d01a00 T si_ib_parse +ffffffff81d020b0 T si_vm_init +ffffffff81d020f0 T si_vm_fini +ffffffff81d02120 T si_vm_flush +ffffffff81d02800 T si_init_uvd_internal_cg +ffffffff81d02850 T si_get_csb_size +ffffffff81d028e0 T si_get_csb_buffer +ffffffff81d02a70 T si_rlc_reset +ffffffff81d02af0 T si_irq_set +ffffffff81d03000 t si_disable_interrupt_state +ffffffff81d03280 T si_irq_process +ffffffff81d04480 t si_irq_ack +ffffffff81d04a80 T si_resume +ffffffff81d04b10 t si_init_golden_registers +ffffffff81d04cd0 t si_startup +ffffffff81d09500 T si_suspend +ffffffff81d09880 T si_init +ffffffff81d0ad50 t si_cp_fini +ffffffff81d0ae40 t si_pcie_gart_fini +ffffffff81d0af40 T si_fini +ffffffff81d0b1f0 T si_get_gpu_clock_counter +ffffffff81d0b2c0 T si_set_uvd_clocks +ffffffff81d0b830 T si_set_vce_clocks +ffffffff81d0bd70 t si_vce_send_vcepll_ctlreq +ffffffff81d0bfb0 t dce6_latency_watermark +ffffffff81d0c1e0 t si_rlc_stop +ffffffff81d0c390 t si_vm_reg_valid +ffffffff81d0c4f0 t si_vm_packet3_cp_dma_check +ffffffff81d0c670 t si_update_cg +ffffffff81d0cbc0 t si_enable_mgcg +ffffffff81d0cfe0 t si_enable_cgcg +ffffffff81d0e000 T si_dma_is_lockup +ffffffff81d0e080 T si_dma_vm_copy_pages +ffffffff81d0e160 T si_dma_vm_write_pages +ffffffff81d0e2c0 T si_dma_vm_set_pages +ffffffff81d0e420 T si_dma_vm_flush +ffffffff81d0e8b0 T si_copy_dma +ffffffff81d0f000 T si_dpm_force_performance_level +ffffffff81d0f160 T si_get_ddr3_mclk_frequency_ratio +ffffffff81d0f1c0 T si_get_mclk_frequency_ratio +ffffffff81d0f240 T si_trim_voltage_table_to_fit_state_table +ffffffff81d0f340 T si_dpm_setup_asic +ffffffff81d0f510 T si_fan_ctrl_get_fan_speed_percent +ffffffff81d0f5a0 T si_fan_ctrl_set_fan_speed_percent +ffffffff81d0f660 T si_fan_ctrl_set_mode +ffffffff81d0f8b0 T si_fan_ctrl_get_mode +ffffffff81d0f900 T si_dpm_enable +ffffffff81d14c00 t si_populate_smc_tdp_limits +ffffffff81d14e10 T si_dpm_late_enable +ffffffff81d14f60 T si_dpm_disable +ffffffff81d152e0 T si_dpm_pre_set_power_state +ffffffff81d15ee0 T si_dpm_set_power_state +ffffffff81d17460 T si_dpm_post_set_power_state +ffffffff81d17490 T si_dpm_display_configuration_changed +ffffffff81d17570 T si_dpm_init +ffffffff81d19020 T si_dpm_fini +ffffffff81d190d0 T si_dpm_debugfs_print_current_performance_level +ffffffff81d19120 T si_dpm_get_current_sclk +ffffffff81d19190 T si_dpm_get_current_mclk +ffffffff81d19200 t si_get_std_voltage_value +ffffffff81d19330 t si_convert_power_level_to_smc +ffffffff81d19bd0 t si_calculate_sclk_params +ffffffff81d19df0 t si_convert_mc_reg_table_to_smc +ffffffff81d19f50 t si_program_cac_config_registers +ffffffff81d1b000 T si_copy_bytes_to_smc +ffffffff81d1b250 T si_start_smc +ffffffff81d1b290 T si_reset_smc +ffffffff81d1b2d0 T si_program_jump_on_start +ffffffff81d1b300 T si_stop_smc_clock +ffffffff81d1b340 T si_start_smc_clock +ffffffff81d1b380 T si_is_smc_running +ffffffff81d1b3e0 T si_send_msg_to_smc +ffffffff81d1b4b0 T si_wait_for_smc_inactive +ffffffff81d1b550 T si_load_smc_ucode +ffffffff81d1b6f0 T si_read_smc_sram_dword +ffffffff81d1b7c0 T si_write_smc_sram_dword +ffffffff81d1c000 T sumo_get_pi +ffffffff81d1c030 T sumo_gfx_clockgating_initialize +ffffffff81d1c110 T sumo_program_vc +ffffffff81d1c150 T sumo_clear_vc +ffffffff81d1c190 T sumo_program_sstp +ffffffff81d1c210 T sumo_take_smu_control +ffffffff81d1c240 T sumo_get_sleep_divider_from_id +ffffffff81d1c270 T sumo_get_sleep_divider_id_from_clock +ffffffff81d1c320 T sumo_dpm_enable +ffffffff81d1c9c0 T sumo_dpm_late_enable +ffffffff81d1cf80 T sumo_dpm_disable +ffffffff81d1d2d0 T sumo_dpm_pre_set_power_state +ffffffff81d1d790 T sumo_dpm_set_power_state +ffffffff81d1e2d0 T sumo_dpm_post_set_power_state +ffffffff81d1e370 T sumo_dpm_setup_asic +ffffffff81d1e470 T sumo_dpm_display_configuration_changed +ffffffff81d1e4a0 T sumo_convert_vid2_to_vid7 +ffffffff81d1e500 T sumo_construct_sclk_voltage_mapping_table +ffffffff81d1e5c0 T sumo_construct_vid_mapping_table +ffffffff81d1e740 T sumo_dpm_init +ffffffff81d1f000 T sumo_dpm_print_power_state +ffffffff81d1f120 T sumo_dpm_debugfs_print_current_performance_level +ffffffff81d1f150 T sumo_dpm_get_current_sclk +ffffffff81d1f1c0 T sumo_dpm_get_current_mclk +ffffffff81d1f1f0 T sumo_dpm_get_current_vddc +ffffffff81d1f2c0 T sumo_dpm_fini +ffffffff81d1f350 T sumo_dpm_get_sclk +ffffffff81d1f3a0 T sumo_dpm_get_mclk +ffffffff81d1f3d0 T sumo_dpm_force_performance_level +ffffffff81d1f7f0 t sumo_power_level_enable +ffffffff81d1fa20 t sumo_program_power_level +ffffffff81d20000 T sumo_initialize_m3_arb +ffffffff81d202c0 T sumo_smu_notify_alt_vddnb_change +ffffffff81d20360 t sumo_send_msg_to_smu +ffffffff81d20500 T sumo_smu_pg_init +ffffffff81d20520 T sumo_enable_boost_timer +ffffffff81d20660 T sumo_set_tdp_limit +ffffffff81d206e0 T sumo_boost_state_enable +ffffffff81d20730 T sumo_get_running_fw_version +ffffffff81d21000 T trinity_dpm_enable_bapm +ffffffff81d21080 T trinity_dpm_enable +ffffffff81d21520 T trinity_dpm_late_enable +ffffffff81d21a80 T trinity_dpm_disable +ffffffff81d21e90 T trinity_dpm_force_performance_level +ffffffff81d21f50 T trinity_dpm_pre_set_power_state +ffffffff81d22520 T trinity_dpm_set_power_state +ffffffff81d22ab0 T trinity_dpm_post_set_power_state +ffffffff81d22b50 T trinity_dpm_setup_asic +ffffffff81d22bb0 T trinity_dpm_display_configuration_changed +ffffffff81d22c40 T trinity_dpm_init +ffffffff81d23540 T trinity_dpm_print_power_state +ffffffff81d23650 T trinity_dpm_debugfs_print_current_performance_level +ffffffff81d236e0 T trinity_dpm_get_current_sclk +ffffffff81d23740 T trinity_dpm_get_current_mclk +ffffffff81d23770 T trinity_dpm_fini +ffffffff81d23810 T trinity_dpm_get_sclk +ffffffff81d23860 T trinity_dpm_get_mclk +ffffffff81d23890 t trinity_program_power_level +ffffffff81d24000 T trinity_dpm_bapm_enable +ffffffff81d24150 T trinity_dpm_config +ffffffff81d24230 T trinity_dpm_force_state +ffffffff81d24310 T trinity_dpm_n_levels_disabled +ffffffff81d243f0 T trinity_uvd_dpm_config +ffffffff81d244c0 T trinity_dpm_no_forced_level +ffffffff81d24590 T trinity_dce_enable_voltage_adjustment +ffffffff81d246e0 T trinity_gfx_dynamic_mgpg_config +ffffffff81d247b0 T trinity_acquire_mutex +ffffffff81d24840 T trinity_release_mutex +ffffffff81d25000 T uvd_v1_0_get_rptr +ffffffff81d25040 T uvd_v1_0_get_wptr +ffffffff81d25080 T uvd_v1_0_set_wptr +ffffffff81d250c0 T uvd_v1_0_fence_emit +ffffffff81d254b0 T uvd_v1_0_resume +ffffffff81d25610 T uvd_v1_0_init +ffffffff81d25ba0 T uvd_v1_0_start +ffffffff81d26320 T uvd_v1_0_fini +ffffffff81d26490 T uvd_v1_0_stop +ffffffff81d26600 T uvd_v1_0_ring_test +ffffffff81d267d0 T uvd_v1_0_semaphore_emit +ffffffff81d26800 T uvd_v1_0_ib_execute +ffffffff81d269a0 T uvd_v1_0_ib_test +ffffffff81d27000 T uvd_v2_2_fence_emit +ffffffff81d27470 T uvd_v2_2_semaphore_emit +ffffffff81d27680 T uvd_v2_2_resume +ffffffff81d28000 T uvd_v3_1_semaphore_emit +ffffffff81d29000 T uvd_v4_2_resume +ffffffff81d2a000 T vce_v1_0_get_rptr +ffffffff81d2a090 T vce_v1_0_get_wptr +ffffffff81d2a120 T vce_v1_0_set_wptr +ffffffff81d2a1b0 T vce_v1_0_enable_mgcg +ffffffff81d2a470 T vce_v1_0_load_fw +ffffffff81d2a640 T vce_v1_0_bo_size +ffffffff81d2a6b0 T vce_v1_0_resume +ffffffff81d2b020 T vce_v1_0_start +ffffffff81d2b7e0 T vce_v1_0_init +ffffffff81d2c000 T vce_v2_0_enable_mgcg +ffffffff81d2c070 t vce_v2_0_set_dyn_cg +ffffffff81d2c260 T vce_v2_0_bo_size +ffffffff81d2c2d0 T vce_v2_0_resume +ffffffff81d2d000 T aldebaran_reset_init +ffffffff81d2d0c0 t aldebaran_async_reset +ffffffff81d2d120 t aldebaran_get_reset_handler +ffffffff81d2d1d0 T aldebaran_reset_fini +ffffffff81d2d230 t aldebaran_mode2_prepare_hwcontext +ffffffff81d2d350 t aldebaran_mode2_perform_reset +ffffffff81d2d530 t aldebaran_mode2_restore_hwcontext +ffffffff81d2da10 t aldebaran_mode2_reset +ffffffff81d2e000 T aldebaran_reg_base_init +ffffffff81d2f000 T amdgpu_acpi_is_pcie_performance_request_supported +ffffffff81d2f040 T amdgpu_acpi_is_power_shift_control_supported +ffffffff81d2f070 T amdgpu_acpi_pcie_notify_device_ready +ffffffff81d2f190 t amdgpu_atcs_call +ffffffff81d2f280 T amdgpu_acpi_pcie_performance_request +ffffffff81d2f4d0 T amdgpu_acpi_power_shift_control +ffffffff81d2f580 T amdgpu_acpi_smart_shift_update +ffffffff81d2f6d0 T amdgpu_acpi_init +ffffffff81d2f790 t amdgpu_acpi_event +ffffffff81d2fad0 T amdgpu_acpi_get_backlight_caps +ffffffff81d2fb20 T amdgpu_acpi_fini +ffffffff81d2fb40 T amdgpu_acpi_should_gpu_reset +ffffffff81d2fb90 T amdgpu_acpi_detect +ffffffff81d31000 T amdgpu_afmt_acr +ffffffff81d32000 T amdgpu_amdkfd_init +ffffffff81d32040 T amdgpu_amdkfd_fini +ffffffff81d32070 T amdgpu_amdkfd_device_probe +ffffffff81d320a0 T amdgpu_amdkfd_device_init +ffffffff81d32270 t amdgpu_amdkfd_reset_work +ffffffff81d322f0 T amdgpu_amdkfd_device_fini_sw +ffffffff81d32340 T amdgpu_amdkfd_interrupt +ffffffff81d32370 T amdgpu_amdkfd_suspend +ffffffff81d323a0 T amdgpu_amdkfd_resume_iommu +ffffffff81d323d0 T amdgpu_amdkfd_resume +ffffffff81d32400 T amdgpu_amdkfd_pre_reset +ffffffff81d32430 T amdgpu_amdkfd_post_reset +ffffffff81d32460 T amdgpu_amdkfd_gpu_reset +ffffffff81d324c0 T amdgpu_amdkfd_alloc_gtt_mem +ffffffff81d32770 t amdgpu_bo_reserve +ffffffff81d328d0 t amdgpu_bo_unreserve +ffffffff81d329b0 T amdgpu_amdkfd_free_gtt_mem +ffffffff81d32a20 T amdgpu_amdkfd_alloc_gws +ffffffff81d32b00 T amdgpu_amdkfd_free_gws +ffffffff81d32b40 T amdgpu_amdkfd_get_fw_version +ffffffff81d32bf0 T amdgpu_amdkfd_get_local_mem_info +ffffffff81d32cc0 T amdgpu_amdkfd_get_gpu_clock_counter +ffffffff81d32d00 T amdgpu_amdkfd_get_max_engine_clock_in_mhz +ffffffff81d32d80 T amdgpu_amdkfd_get_cu_info +ffffffff81d32ed0 T amdgpu_amdkfd_get_dmabuf_info +ffffffff81d33010 T amdgpu_amdkfd_get_xgmi_hops_count +ffffffff81d33080 T amdgpu_amdkfd_get_xgmi_bandwidth_mbytes +ffffffff81d33110 T amdgpu_amdkfd_get_pcie_bandwidth_mbytes +ffffffff81d33280 T amdgpu_amdkfd_submit_ib +ffffffff81d333e0 T amdgpu_amdkfd_set_compute_idle +ffffffff81d33430 T amdgpu_amdkfd_is_kfd_vmid +ffffffff81d33470 T amdgpu_amdkfd_flush_gpu_tlb_vmid +ffffffff81d33510 T amdgpu_amdkfd_flush_gpu_tlb_pasid +ffffffff81d33540 T amdgpu_amdkfd_have_atomics_support +ffffffff81d33570 T amdgpu_amdkfd_ras_poison_consumption_handler +ffffffff81d335d0 T amdgpu_amdkfd_ras_query_utcl2_poison_status +ffffffff81d34000 T amdgpu_atom_execute_table +ffffffff81d340a0 t amdgpu_atom_execute_table_locked +ffffffff81d343f0 T amdgpu_atom_parse +ffffffff81d34940 T amdgpu_atom_destroy +ffffffff81d34980 T amdgpu_atom_asic_init +ffffffff81d34aa0 T amdgpu_atom_parse_data_header +ffffffff81d34b40 T amdgpu_atom_parse_cmd_header +ffffffff81d34bc0 t atom_op_move +ffffffff81d34da0 t atom_op_and +ffffffff81d34f80 t atom_op_or +ffffffff81d35160 t atom_op_shift_left +ffffffff81d35350 t atom_op_shift_right +ffffffff81d35540 t atom_op_mul +ffffffff81d35690 t atom_op_div +ffffffff81d35800 t atom_op_add +ffffffff81d359e0 t atom_op_sub +ffffffff81d35bc0 t atom_op_setport +ffffffff81d35d40 t atom_op_setregblock +ffffffff81d35e00 t atom_op_setfbbase +ffffffff81d35ed0 t atom_op_compare +ffffffff81d360c0 t atom_op_switch +ffffffff81d36310 t atom_op_jump +ffffffff81d36590 t atom_op_test +ffffffff81d36750 t atom_op_delay +ffffffff81d36830 t atom_op_calltable +ffffffff81d36980 t atom_op_repeat +ffffffff81d369b0 t atom_op_clear +ffffffff81d36ac0 t atom_op_nop +ffffffff81d36af0 t atom_op_eot +ffffffff81d36b20 t atom_op_mask +ffffffff81d36df0 t atom_op_postcard +ffffffff81d36ea0 t atom_op_beep +ffffffff81d36ec0 t atom_op_savereg +ffffffff81d36ef0 t atom_op_restorereg +ffffffff81d36f20 t atom_op_setdatablock +ffffffff81d37060 t atom_op_xor +ffffffff81d37240 t atom_op_shl +ffffffff81d37460 t atom_op_shr +ffffffff81d37680 t atom_op_debug +ffffffff81d37730 t atom_op_processds +ffffffff81d377f0 t atom_op_mul32 +ffffffff81d37950 t atom_op_div32 +ffffffff81d37ae0 t atom_put_dst +ffffffff81d37fb0 t atom_get_src_int +ffffffff81d38660 t atom_iio_execute +ffffffff81d39000 T amdgpu_atombios_lookup_i2c_gpio +ffffffff81d39260 T amdgpu_atombios_i2c_init +ffffffff81d39540 T amdgpu_atombios_lookup_gpio +ffffffff81d39640 T amdgpu_atombios_has_dce_engine_info +ffffffff81d396c0 T amdgpu_atombios_get_connector_info_from_object_table +ffffffff81d39f10 T amdgpu_atombios_get_clock_info +ffffffff81d3a250 T amdgpu_atombios_get_gfx_info +ffffffff81d3a310 T amdgpu_atombios_get_vram_width +ffffffff81d3a3a0 T amdgpu_atombios_get_asic_ss_info +ffffffff81d3a710 T amdgpu_atombios_get_clock_dividers +ffffffff81d3a930 T amdgpu_atombios_has_gpu_virtualization_table +ffffffff81d3a980 T amdgpu_atombios_scratch_regs_lock +ffffffff81d3a9e0 T amdgpu_atombios_scratch_regs_engine_hung +ffffffff81d3aa30 T amdgpu_atombios_scratch_regs_set_backlight_level +ffffffff81d3aa90 T amdgpu_atombios_scratch_need_asic_init +ffffffff81d3aae0 T amdgpu_atombios_copy_swap +ffffffff81d3ab00 T amdgpu_atombios_fini +ffffffff81d3aba0 T amdgpu_atombios_init +ffffffff81d3ae40 t cail_reg_read +ffffffff81d3ae60 t cail_reg_write +ffffffff81d3ae80 t cail_mc_read +ffffffff81d3aeb0 t cail_mc_write +ffffffff81d3aee0 t cail_pll_read +ffffffff81d3af10 t cail_pll_write +ffffffff81d3af40 T amdgpu_atombios_get_data_table +ffffffff81d3b000 T amdgpu_atombios_crtc_overscan_setup +ffffffff81d3b150 T amdgpu_atombios_crtc_scaler_setup +ffffffff81d3b1d0 T amdgpu_atombios_crtc_lock +ffffffff81d3b230 T amdgpu_atombios_crtc_enable +ffffffff81d3b290 T amdgpu_atombios_crtc_blank +ffffffff81d3b2f0 T amdgpu_atombios_crtc_powergate +ffffffff81d3b360 T amdgpu_atombios_crtc_powergate_init +ffffffff81d3b3d0 T amdgpu_atombios_crtc_set_dtd_timing +ffffffff81d3b4e0 T amdgpu_atombios_crtc_set_disp_eng_pll +ffffffff81d3b5d0 T amdgpu_atombios_crtc_set_dce_clock +ffffffff81d3b6c0 T amdgpu_atombios_crtc_program_pll +ffffffff81d3b9d0 T amdgpu_atombios_crtc_prepare_pll +ffffffff81d3bed0 T amdgpu_atombios_crtc_set_pll +ffffffff81d3d000 T amdgpu_atombios_dp_aux_init +ffffffff81d3d090 t amdgpu_atombios_dp_aux_transfer +ffffffff81d3d200 T amdgpu_atombios_dp_get_sinktype +ffffffff81d3d270 T amdgpu_atombios_dp_get_dpcd +ffffffff81d3d420 T amdgpu_atombios_dp_get_panel_mode +ffffffff81d3d510 T amdgpu_atombios_dp_set_link_config +ffffffff81d3d590 t amdgpu_atombios_dp_get_dp_link_config +ffffffff81d3d710 T amdgpu_atombios_dp_mode_valid_helper +ffffffff81d3d790 T amdgpu_atombios_dp_needs_link_train +ffffffff81d3d800 T amdgpu_atombios_dp_set_rx_power_state +ffffffff81d3d880 T amdgpu_atombios_dp_link_train +ffffffff81d3ddd0 t amdgpu_atombios_dp_process_aux_ch +ffffffff81d3df40 t amdgpu_atombios_dp_get_adjust_train +ffffffff81d3f000 T amdgpu_atombios_encoder_get_backlight_level_from_reg +ffffffff81d3f050 T amdgpu_atombios_encoder_set_backlight_level_to_reg +ffffffff81d3f0a0 T amdgpu_atombios_encoder_get_backlight_level +ffffffff81d3f100 T amdgpu_atombios_encoder_set_backlight_level +ffffffff81d3f210 T amdgpu_atombios_encoder_setup_dig_transmitter +ffffffff81d3fbe0 T amdgpu_atombios_encoder_init_backlight +ffffffff81d3fd80 t amdgpu_atombios_encoder_get_backlight_brightness +ffffffff81d3fde0 T amdgpu_atombios_encoder_fini_backlight +ffffffff81d3fe70 T amdgpu_atombios_encoder_is_digital +ffffffff81d3fec0 T amdgpu_atombios_encoder_mode_fixup +ffffffff81d3ffa0 T amdgpu_atombios_encoder_get_encoder_mode +ffffffff81d40140 T amdgpu_atombios_encoder_setup_dig_encoder +ffffffff81d40600 T amdgpu_atombios_encoder_set_edp_panel_power +ffffffff81d40700 T amdgpu_atombios_encoder_dpms +ffffffff81d40870 t amdgpu_atombios_encoder_setup_dig +ffffffff81d40be0 t amdgpu_atombios_encoder_setup_dvo +ffffffff81d40d80 T amdgpu_atombios_encoder_set_crtc_source +ffffffff81d41160 T amdgpu_atombios_encoder_init_dig +ffffffff81d41230 t amdgpu_atombios_encoder_setup_external_encoder +ffffffff81d41490 T amdgpu_atombios_encoder_dac_detect +ffffffff81d41670 T amdgpu_atombios_encoder_dig_detect +ffffffff81d41770 T amdgpu_atombios_encoder_setup_ext_encoder_ddc +ffffffff81d417c0 T amdgpu_atombios_encoder_set_bios_scratch_regs +ffffffff81d41d60 T amdgpu_atombios_encoder_get_lcd_info +ffffffff81d420c0 T amdgpu_atombios_encoder_get_dig_info +ffffffff81d42130 t amdgpu_atombios_encoder_update_backlight_status +ffffffff81d43000 T amdgpu_atombios_i2c_xfer +ffffffff81d433b0 T amdgpu_atombios_i2c_func +ffffffff81d433e0 T amdgpu_atombios_i2c_channel_trans +ffffffff81d44000 T amdgpu_atomfirmware_query_firmware_capability +ffffffff81d44090 T amdgpu_atomfirmware_gpu_virtualization_supported +ffffffff81d440c0 T amdgpu_atomfirmware_scratch_regs_init +ffffffff81d44140 T amdgpu_atomfirmware_allocate_fb_scratch +ffffffff81d44270 T amdgpu_atomfirmware_get_vram_info +ffffffff81d449d0 T amdgpu_atomfirmware_mem_ecc_supported +ffffffff81d44a80 T amdgpu_atomfirmware_sram_ecc_supported +ffffffff81d44ab0 T amdgpu_atomfirmware_dynamic_boot_config_supported +ffffffff81d44ae0 T amdgpu_atomfirmware_ras_rom_addr +ffffffff81d44b80 T amdgpu_atomfirmware_get_clock_info +ffffffff81d44da0 T amdgpu_atomfirmware_get_gfx_info +ffffffff81d44f40 T amdgpu_atomfirmware_mem_training_supported +ffffffff81d44f80 T amdgpu_atomfirmware_get_fw_reserved_fb_size +ffffffff81d45010 T amdgpu_atomfirmware_asic_init +ffffffff81d46000 T amdgpu_benchmark +ffffffff81d467a0 t amdgpu_benchmark_move +ffffffff81d47000 T amdgpu_read_bios +ffffffff81d47190 t check_atom_bios +ffffffff81d472a0 T amdgpu_get_bios +ffffffff81d47850 t igp_read_bios_from_vram +ffffffff81d47990 T amdgpu_soc15_read_bios_from_rom +ffffffff81d48000 T amdgpu_bo_list_create +ffffffff81d48290 T amdgpu_bo_list_get +ffffffff81d482f0 T amdgpu_bo_list_get_list +ffffffff81d48450 T amdgpu_bo_list_put +ffffffff81d48500 T amdgpu_bo_create_list_entry_array +ffffffff81d48650 T amdgpu_bo_list_ioctl +ffffffff81d49000 T amdgpu_cgs_create_device +ffffffff81d49080 T amdgpu_cgs_destroy_device +ffffffff81d490a0 t amdgpu_cgs_read_register +ffffffff81d490c0 t amdgpu_cgs_write_register +ffffffff81d490e0 t amdgpu_cgs_read_ind_register +ffffffff81d491c0 t amdgpu_cgs_write_ind_register +ffffffff81d49270 t amdgpu_cgs_get_firmware_info +ffffffff81d4a000 T amdgpu_connector_hotplug +ffffffff81d4a0f0 T amdgpu_connector_get_monitor_bpc +ffffffff81d4a380 T amdgpu_connector_edid +ffffffff81d4a430 T amdgpu_connector_encoder_get_dp_bridge_encoder_id +ffffffff81d4a4b0 T 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amdgpu_virt_reset_gpu +ffffffff81db43e0 T amdgpu_virt_request_init_data +ffffffff81db4440 T amdgpu_virt_wait_reset +ffffffff81db4490 T amdgpu_virt_alloc_mm_table +ffffffff81db4560 T amdgpu_virt_free_mm_table +ffffffff81db45d0 T amd_sriov_msg_checksum +ffffffff81db46c0 T amdgpu_virt_release_ras_err_handler_data +ffffffff81db47a0 T amdgpu_virt_fini_data_exchange +ffffffff81db4820 T amdgpu_virt_init_data_exchange +ffffffff81db4940 T amdgpu_virt_exchange_data +ffffffff81db4c50 t amdgpu_virt_update_vf2pf_work_item +ffffffff81db4cb0 t amdgpu_virt_read_pf2vf_data +ffffffff81db50d0 t amdgpu_virt_write_vf2pf_data +ffffffff81db5490 T amdgpu_detect_virtualization +ffffffff81db5640 T amdgpu_virt_enable_access_debugfs +ffffffff81db56d0 T amdgpu_virt_disable_access_debugfs +ffffffff81db5710 T amdgpu_virt_get_sriov_vf_mode +ffffffff81db5760 T amdgpu_virt_fw_load_skip_check +ffffffff81db57e0 T amdgpu_virt_update_sriov_video_codec +ffffffff81db58e0 T amdgpu_sriov_wreg +ffffffff81db5960 t amdgpu_virt_rlcg_reg_rw +ffffffff81db5c10 T amdgpu_sriov_rreg +ffffffff81db5c70 t __delayed_work_tick +ffffffff81db6000 T amdgpu_vm_set_pasid +ffffffff81db6130 T amdgpu_vm_bo_base_init +ffffffff81db6390 T amdgpu_vm_get_pd_bo +ffffffff81db6400 T amdgpu_vm_move_to_lru_tail +ffffffff81db6440 T amdgpu_vm_validate_pt_bos +ffffffff81db6670 T amdgpu_vm_ready +ffffffff81db6700 T amdgpu_vm_check_compute_bug +ffffffff81db67d0 T amdgpu_vm_need_pipeline_sync +ffffffff81db68e0 T amdgpu_vm_flush +ffffffff81db6dc0 T amdgpu_vm_bo_find +ffffffff81db6e20 T amdgpu_vm_map_gart +ffffffff81db6e60 T amdgpu_vm_update_pdes +ffffffff81db7090 T amdgpu_vm_update_range +ffffffff81db7730 t amdgpu_vm_tlb_seq_cb +ffffffff81db7760 T amdgpu_vm_get_memory +ffffffff81db78e0 T amdgpu_vm_bo_update +ffffffff81db7d60 T amdgpu_vm_clear_freed +ffffffff81db7ee0 T amdgpu_vm_handle_moved +ffffffff81db8100 T amdgpu_vm_bo_add +ffffffff81db81d0 T amdgpu_vm_bo_map +ffffffff81db8520 T amdgpu_vm_bo_replace_map +ffffffff81db8800 T amdgpu_vm_bo_clear_mappings +ffffffff81db8d30 T amdgpu_vm_bo_unmap +ffffffff81db8e60 T amdgpu_vm_bo_lookup_mapping +ffffffff81db8ed0 T amdgpu_vm_bo_trace_cs +ffffffff81db8f00 T amdgpu_vm_bo_del +ffffffff81db90f0 T amdgpu_vm_evictable +ffffffff81db91a0 T amdgpu_vm_bo_invalidate +ffffffff81db9460 T amdgpu_vm_adjust_size +ffffffff81db96d0 T amdgpu_vm_wait_idle +ffffffff81db9740 T amdgpu_vm_init +ffffffff81db9b00 t amdgpu_bo_reserve +ffffffff81db9c60 t amdgpu_bo_unreserve +ffffffff81db9d40 T amdgpu_vm_make_compute +ffffffff81db9f40 T amdgpu_vm_release_compute +ffffffff81db9ff0 T amdgpu_vm_fini +ffffffff81dba450 T amdgpu_vm_manager_init +ffffffff81dba5f0 T amdgpu_vm_manager_fini +ffffffff81dba650 T amdgpu_vm_ioctl +ffffffff81dba770 T amdgpu_vm_get_task_info +ffffffff81dba810 T amdgpu_vm_set_task_info +ffffffff81dba900 T amdgpu_vm_handle_fault +ffffffff81dbaad0 t amdgpu_vm_add_prt_cb +ffffffff81dbac20 t amdgpu_vm_prt_cb +ffffffff81dbb000 t amdgpu_vm_cpu_map_table +ffffffff81dbb020 t amdgpu_vm_cpu_prepare +ffffffff81dbb070 t amdgpu_vm_cpu_update +ffffffff81dbb170 t amdgpu_vm_cpu_commit +ffffffff81dbc000 T amdgpu_vm_pt_clear +ffffffff81dbc430 T amdgpu_vm_pt_create +ffffffff81dbc950 T amdgpu_vm_pt_free_work +ffffffff81dbcc20 t amdgpu_vm_pt_free +ffffffff81dbcd00 T amdgpu_vm_pt_free_root +ffffffff81dbcd20 t amdgpu_vm_pt_free_dfs +ffffffff81dbda90 T amdgpu_vm_pt_is_root_clean +ffffffff81dbdb60 T amdgpu_vm_pde_update +ffffffff81dbdc50 T amdgpu_vm_ptes_update +ffffffff81dbe620 t amdgpu_vm_pt_next +ffffffff81dbf000 t amdgpu_vm_sdma_map_table +ffffffff81dbf060 t amdgpu_vm_sdma_prepare +ffffffff81dbf100 t amdgpu_vm_sdma_update +ffffffff81dbf5e0 t amdgpu_vm_sdma_commit +ffffffff81dc0000 T amdgpu_vram_mgr_bo_visible_size +ffffffff81dc0110 T amdgpu_vram_mgr_reserve_range +ffffffff81dc01f0 t amdgpu_vram_mgr_do_reserve +ffffffff81dc0370 T amdgpu_vram_mgr_query_page_status +ffffffff81dc0450 T amdgpu_vram_mgr_alloc_sgt +ffffffff81dc04a0 T amdgpu_vram_mgr_free_sgt +ffffffff81dc04d0 T amdgpu_vram_mgr_vis_usage +ffffffff81dc0500 T amdgpu_vram_mgr_init +ffffffff81dc06d0 T amdgpu_vram_mgr_fini +ffffffff81dc08e0 t amdgpu_vram_mgr_new +ffffffff81dc0e70 t amdgpu_vram_mgr_del +ffffffff81dc0f50 t amdgpu_vram_mgr_intersects +ffffffff81dc0fd0 t amdgpu_vram_mgr_compatible +ffffffff81dc1050 t amdgpu_vram_mgr_debug +ffffffff81dc2000 t amdgpu_xgmi_hive_release +ffffffff81dc2050 T amdgpu_get_xgmi_hive +ffffffff81dc20a0 T amdgpu_put_xgmi_hive +ffffffff81dc20f0 T amdgpu_xgmi_set_pstate +ffffffff81dc2140 T amdgpu_xgmi_update_topology +ffffffff81dc2200 T amdgpu_xgmi_get_hops_count +ffffffff81dc2270 T amdgpu_xgmi_get_num_links +ffffffff81dc22e0 T amdgpu_xgmi_add_device +ffffffff81dc2500 T amdgpu_xgmi_remove_device +ffffffff81dc2650 T amdgpu_xgmi_get_relative_phy_addr +ffffffff81dc2690 t amdgpu_ras_error_inject_xgmi +ffffffff81dc2800 t amdgpu_xgmi_query_ras_error_count +ffffffff81dc3020 t amdgpu_xgmi_reset_ras_error_count +ffffffff81dc3340 t amdgpu_xgmi_ras_late_init +ffffffff81dc4000 T arct_reg_base_init +ffffffff81dc5000 T athub_v1_0_set_clockgating +ffffffff81dc5210 T athub_v1_0_get_clockgating +ffffffff81dc6000 T athub_v2_0_set_clockgating +ffffffff81dc61e0 T athub_v2_0_get_clockgating +ffffffff81dc7000 T athub_v2_1_set_clockgating +ffffffff81dc71f0 T athub_v2_1_get_clockgating +ffffffff81dc8000 T athub_v3_0_set_clockgating +ffffffff81dc80d0 T athub_v3_0_get_clockgating +ffffffff81dc8120 t athub_v3_0_get_cg_cntl +ffffffff81dc81c0 t athub_v3_0_set_cg_cntl +ffffffff81dc9000 t cz_ih_early_init +ffffffff81dc9050 t cz_ih_sw_init +ffffffff81dc90b0 t cz_ih_sw_fini +ffffffff81dc90f0 t cz_ih_hw_init +ffffffff81dc9320 t cz_ih_hw_fini +ffffffff81dc93f0 t cz_ih_suspend +ffffffff81dc94c0 t cz_ih_resume +ffffffff81dc9500 t cz_ih_is_idle +ffffffff81dc9550 t cz_ih_wait_for_idle +ffffffff81dc95f0 t cz_ih_soft_reset +ffffffff81dc96d0 t cz_ih_set_clockgating_state +ffffffff81dc9700 t cz_ih_set_powergating_state +ffffffff81dc9730 t cz_ih_get_wptr +ffffffff81dc9820 t cz_ih_decode_iv +ffffffff81dc98a0 t cz_ih_set_rptr +ffffffff81dca000 T dce_v10_0_disable_dce +ffffffff81dca170 t dce_v10_0_early_init +ffffffff81dca230 t dce_v10_0_sw_init +ffffffff81dca6a0 t dce_v10_0_sw_fini +ffffffff81dca7d0 t dce_v10_0_hw_init +ffffffff81dcab40 t dce_v10_0_hw_fini +ffffffff81dcacd0 t dce_v10_0_suspend +ffffffff81dcad30 t dce_v10_0_resume +ffffffff81dcada0 t dce_v10_0_is_idle +ffffffff81dcadd0 t dce_v10_0_wait_for_idle +ffffffff81dcae00 t dce_v10_0_check_soft_reset +ffffffff81dcae10 t dce_v10_0_soft_reset +ffffffff81dcaee0 t dce_v10_0_set_clockgating_state +ffffffff81dcaf10 t dce_v10_0_set_powergating_state +ffffffff81dcaf40 t dce_v10_0_audio_endpt_rreg +ffffffff81dcafd0 t dce_v10_0_audio_endpt_wreg +ffffffff81dcb050 t dce_v10_0_bandwidth_update +ffffffff81dcbac0 t dce_v10_0_vblank_get_counter +ffffffff81dcbb10 t dce_v10_0_hpd_sense +ffffffff81dcbb70 t dce_v10_0_hpd_set_polarity +ffffffff81dcbc40 t dce_v10_0_hpd_get_gpio_reg +ffffffff81dcbc70 t dce_v10_0_page_flip +ffffffff81dcbd60 t dce_v10_0_crtc_get_scanoutpos +ffffffff81dcbe00 t dce_v10_0_encoder_add +ffffffff81dcc030 t dce_v10_0_latency_watermark +ffffffff81dcc250 t dce_v10_0_encoder_destroy +ffffffff81dcc2b0 t dce_v10_0_encoder_prepare +ffffffff81dcc4b0 t dce_v10_0_encoder_commit +ffffffff81dcc4e0 t dce_v10_0_encoder_mode_set +ffffffff81dcd380 t dce_v10_0_encoder_disable +ffffffff81dcd490 t dce_v10_0_ext_dpms +ffffffff81dcd4c0 t dce_v10_0_ext_prepare +ffffffff81dcd4f0 t dce_v10_0_ext_commit +ffffffff81dcd520 t dce_v10_0_ext_mode_set +ffffffff81dcd550 t dce_v10_0_ext_disable +ffffffff81dcd580 t dce_v10_0_set_crtc_irq_state +ffffffff81dcd660 t dce_v10_0_crtc_irq +ffffffff81dcd890 t dce_v10_0_set_crtc_vblank_interrupt_state +ffffffff81dcd960 t dce_v10_0_set_crtc_vline_interrupt_state +ffffffff81dcda30 t dce_v10_0_set_pageflip_irq_state +ffffffff81dcdae0 t dce_v10_0_pageflip_irq +ffffffff81dcdc40 t dce_v10_0_set_hpd_irq_state +ffffffff81dcdd10 t dce_v10_0_hpd_irq +ffffffff81dcde30 t dce_v10_0_crtc_cursor_set2 +ffffffff81dce1a0 t dce_v10_0_crtc_cursor_move +ffffffff81dce280 t dce_v10_0_crtc_gamma_set +ffffffff81dce2c0 t dce_v10_0_crtc_destroy +ffffffff81dce2f0 t amdgpu_bo_reserve +ffffffff81dce500 t amdgpu_bo_unreserve +ffffffff81dce5e0 t dce_v10_0_cursor_move_locked +ffffffff81dce730 t dce_v10_0_crtc_load_lut +ffffffff81dceac0 t dce_v10_0_crtc_dpms +ffffffff81dcec90 t dce_v10_0_crtc_prepare +ffffffff81dcecd0 t dce_v10_0_crtc_commit +ffffffff81dced00 t dce_v10_0_crtc_mode_fixup +ffffffff81dceec0 t dce_v10_0_crtc_mode_set +ffffffff81dcf0b0 t dce_v10_0_crtc_set_base +ffffffff81dcf0d0 t dce_v10_0_crtc_set_base_atomic +ffffffff81dcf0f0 t dce_v10_0_crtc_disable +ffffffff81dcf290 t dce_v10_0_crtc_do_set_base +ffffffff81dcf940 t dce_v10_0_is_display_hung +ffffffff81dd0000 T dce_v11_0_disable_dce +ffffffff81dd0160 t dce_v11_0_early_init +ffffffff81dd02b0 t dce_v11_0_sw_init +ffffffff81dd0730 t dce_v11_0_sw_fini +ffffffff81dd0860 t dce_v11_0_hw_init +ffffffff81dd0c30 t dce_v11_0_hw_fini +ffffffff81dd0dc0 t dce_v11_0_suspend +ffffffff81dd0e20 t dce_v11_0_resume +ffffffff81dd0e90 t dce_v11_0_is_idle +ffffffff81dd0ec0 t dce_v11_0_wait_for_idle +ffffffff81dd0ef0 t dce_v11_0_soft_reset +ffffffff81dd1110 t dce_v11_0_set_clockgating_state +ffffffff81dd1140 t dce_v11_0_set_powergating_state +ffffffff81dd1170 t dce_v11_0_audio_endpt_rreg +ffffffff81dd1200 t dce_v11_0_audio_endpt_wreg +ffffffff81dd1280 t dce_v11_0_bandwidth_update +ffffffff81dd1cf0 t dce_v11_0_vblank_get_counter +ffffffff81dd1d40 t dce_v11_0_hpd_sense +ffffffff81dd1da0 t dce_v11_0_hpd_set_polarity +ffffffff81dd1e70 t dce_v11_0_hpd_get_gpio_reg +ffffffff81dd1ea0 t dce_v11_0_page_flip +ffffffff81dd1fa0 t dce_v11_0_crtc_get_scanoutpos +ffffffff81dd2040 t dce_v11_0_encoder_add +ffffffff81dd2270 t dce_v11_0_latency_watermark +ffffffff81dd2490 t dce_v11_0_encoder_destroy +ffffffff81dd24f0 t dce_v11_0_encoder_prepare +ffffffff81dd26f0 t dce_v11_0_encoder_commit +ffffffff81dd2720 t dce_v11_0_encoder_mode_set +ffffffff81dd35c0 t dce_v11_0_encoder_disable +ffffffff81dd36d0 t dce_v11_0_ext_dpms +ffffffff81dd3700 t dce_v11_0_ext_prepare +ffffffff81dd3730 t dce_v11_0_ext_commit +ffffffff81dd3760 t dce_v11_0_ext_mode_set +ffffffff81dd3790 t dce_v11_0_ext_disable +ffffffff81dd37c0 t dce_v11_0_set_crtc_irq_state +ffffffff81dd38a0 t dce_v11_0_crtc_irq +ffffffff81dd3ac0 t dce_v11_0_set_crtc_vblank_interrupt_state +ffffffff81dd3b90 t dce_v11_0_set_crtc_vline_interrupt_state +ffffffff81dd3c60 t dce_v11_0_set_pageflip_irq_state +ffffffff81dd3d10 t dce_v11_0_pageflip_irq +ffffffff81dd3e70 t dce_v11_0_set_hpd_irq_state +ffffffff81dd3f40 t dce_v11_0_hpd_irq +ffffffff81dd4060 t dce_v11_0_crtc_cursor_set2 +ffffffff81dd43d0 t dce_v11_0_crtc_cursor_move +ffffffff81dd44b0 t dce_v11_0_crtc_gamma_set +ffffffff81dd44f0 t dce_v11_0_crtc_destroy +ffffffff81dd4520 t amdgpu_bo_reserve +ffffffff81dd4730 t amdgpu_bo_unreserve +ffffffff81dd4810 t dce_v11_0_cursor_move_locked +ffffffff81dd4960 t dce_v11_0_crtc_load_lut +ffffffff81dd4cd0 t dce_v11_0_crtc_dpms +ffffffff81dd4ea0 t dce_v11_0_crtc_prepare +ffffffff81dd4ee0 t dce_v11_0_crtc_commit +ffffffff81dd4f10 t dce_v11_0_crtc_mode_fixup +ffffffff81dd5180 t dce_v11_0_crtc_mode_set +ffffffff81dd53e0 t dce_v11_0_crtc_set_base +ffffffff81dd5400 t dce_v11_0_crtc_set_base_atomic +ffffffff81dd5420 t dce_v11_0_crtc_disable +ffffffff81dd55c0 t dce_v11_0_crtc_do_set_base +ffffffff81dd6000 t df_v1_7_sw_init +ffffffff81dd6040 t df_v1_7_sw_fini +ffffffff81dd6070 t df_v1_7_enable_broadcast_mode +ffffffff81dd6190 t df_v1_7_get_fb_channel_number +ffffffff81dd6210 t df_v1_7_get_hbm_channel_number +ffffffff81dd6260 t df_v1_7_update_medium_grain_clock_gating +ffffffff81dd63d0 t df_v1_7_get_clockgating_state +ffffffff81dd6460 t df_v1_7_enable_ecc_force_par_wr_rmw +ffffffff81dd7000 t df_v3_6_sw_init +ffffffff81dd7160 t df_v3_6_sw_fini +ffffffff81dd7190 t df_v3_6_enable_broadcast_mode +ffffffff81dd72b0 t df_v3_6_get_fb_channel_number +ffffffff81dd7390 t df_v3_6_get_hbm_channel_number +ffffffff81dd73e0 t df_v3_6_update_medium_grain_clock_gating +ffffffff81dd7580 t df_v3_6_get_clockgating_state +ffffffff81dd7610 t df_v3_6_pmc_start +ffffffff81dd7990 t df_v3_6_pmc_stop +ffffffff81dd7c30 t df_v3_6_pmc_get_count +ffffffff81dd7dc0 t df_v3_6_get_fica +ffffffff81dd7ed0 t df_v3_6_set_fica +ffffffff81dd7fb0 t df_v3_6_query_ras_poison_mode +ffffffff81dd8120 t df_v3_6_perfmon_arm_with_status +ffffffff81dd9000 T dimgrey_cavefish_reg_base_init +ffffffff81dda000 T emu_soc_asic_init +ffffffff81ddb000 t gfx_v10_0_early_init +ffffffff81ddb420 t gfx_v10_0_late_init +ffffffff81ddb490 t gfx_v10_0_sw_init +ffffffff81ddc840 t gfx_v10_0_sw_fini +ffffffff81ddcb80 t gfx_v10_0_hw_init +ffffffff81ddf730 t gfx_v10_0_hw_fini +ffffffff81ddfa20 t gfx_v10_0_suspend +ffffffff81ddfa60 t gfx_v10_0_resume +ffffffff81ddfa70 t gfx_v10_0_is_idle +ffffffff81ddfb00 t gfx_v10_0_wait_for_idle +ffffffff81ddfbe0 t gfx_v10_0_soft_reset +ffffffff81ddff30 t gfx_v10_0_set_clockgating_state +ffffffff81de01d0 t gfx_v10_0_set_powergating_state +ffffffff81de03f0 t gfx_v10_0_get_clockgating_state +ffffffff81de0500 t gfx10_kiq_set_resources +ffffffff81de0830 t gfx10_kiq_map_queues +ffffffff81de0bc0 t gfx10_kiq_unmap_queues +ffffffff81de0fc0 t gfx10_kiq_query_status +ffffffff81de12c0 t gfx10_kiq_invalidate_tlbs +ffffffff81de13e0 t gfx_v10_0_ring_get_rptr_compute +ffffffff81de1410 t gfx_v10_0_ring_get_wptr_compute +ffffffff81de1480 t gfx_v10_0_ring_set_wptr_compute +ffffffff81de15c0 t gfx_v10_0_ring_emit_ib_compute +ffffffff81de1910 t gfx_v10_0_ring_emit_fence_kiq +ffffffff81de1d50 t gfx_v10_0_ring_test_ring +ffffffff81de1fc0 t gfx_v10_0_ring_test_ib +ffffffff81de2270 t gfx_v10_0_ring_emit_rreg +ffffffff81de2510 t gfx_v10_0_ring_emit_wreg +ffffffff81de2750 t gfx_v10_0_ring_emit_reg_wait +ffffffff81de27a0 t gfx_v10_0_ring_emit_reg_write_reg_wait +ffffffff81de2830 t gfx_v10_0_wait_reg_mem +ffffffff81de2b60 t gfx_v10_0_ring_get_rptr_gfx +ffffffff81de2b90 t gfx_v10_0_ring_get_wptr_gfx +ffffffff81de2ca0 t gfx_v10_0_ring_set_wptr_gfx +ffffffff81de2eb0 t gfx_v10_0_ring_emit_ib_gfx +ffffffff81de3560 t gfx_v10_0_ring_emit_fence +ffffffff81de3930 t gfx_v10_0_ring_emit_pipeline_sync +ffffffff81de3990 t gfx_v10_0_ring_emit_vm_flush +ffffffff81de3b60 t gfx_v10_0_ring_emit_hdp_flush +ffffffff81de3c30 t gfx_v10_0_ring_emit_gds_switch +ffffffff81de3d10 t gfx_v10_0_ring_emit_init_cond_exec +ffffffff81de3f40 t gfx_v10_0_ring_emit_patch_cond_exec +ffffffff81de4000 t gfx_v10_0_ring_emit_sb +ffffffff81de40f0 t gfx_v10_0_ring_emit_cntxcntl +ffffffff81de45e0 t gfx_v10_0_ring_emit_frame_cntl +ffffffff81de46f0 t gfx_v10_0_ring_soft_recovery +ffffffff81de4760 t gfx_v10_0_ring_preempt_ib +ffffffff81de48d0 t gfx_v10_0_emit_mem_sync +ffffffff81de4c10 t gfx_v10_0_write_data_to_reg +ffffffff81de4e20 t gfx_v10_0_set_eop_interrupt_state +ffffffff81de4f00 t gfx_v10_0_eop_irq +ffffffff81de50d0 t gfx_v10_0_set_gfx_eop_interrupt_state +ffffffff81de5260 t gfx_v10_0_set_compute_eop_interrupt_state +ffffffff81de5410 t gfx_v10_0_kiq_set_interrupt_state +ffffffff81de56f0 t gfx_v10_0_kiq_irq +ffffffff81de5770 t gfx_v10_0_set_priv_reg_fault_state +ffffffff81de5890 t gfx_v10_0_priv_reg_irq +ffffffff81de58f0 t gfx_v10_0_handle_priv_fault +ffffffff81de5a80 t gfx_v10_0_set_priv_inst_fault_state +ffffffff81de5ba0 t gfx_v10_0_priv_inst_irq +ffffffff81de5c00 t gfx_v10_0_is_rlc_enabled +ffffffff81de5c80 t gfx_v10_0_set_safe_mode +ffffffff81de5f20 t gfx_v10_0_unset_safe_mode +ffffffff81de5fd0 t gfx_v10_0_rlc_init +ffffffff81de6050 t gfx_v10_0_get_csb_size +ffffffff81de60b0 t gfx_v10_0_get_csb_buffer +ffffffff81de6230 t gfx_v10_0_rlc_resume +ffffffff81de6d30 t gfx_v10_0_rlc_stop +ffffffff81de6e10 t gfx_v10_0_rlc_reset +ffffffff81de6fb0 t gfx_v10_0_rlc_start +ffffffff81de7150 t gfx_v10_0_update_spm_vmid +ffffffff81de7280 t gfx_v10_0_wait_for_rlc_autoload_complete +ffffffff81de7e10 t gfx_v10_0_init_csb +ffffffff81de80e0 t gfx_v10_0_is_rlcg_access_range +ffffffff81de8110 t gfx_v10_0_gfx_mqd_init +ffffffff81de84f0 t gfx_v10_0_compute_mqd_init +ffffffff81de8990 t amdgpu_bo_unreserve +ffffffff81de8a70 t gfx_v10_0_get_gpu_clock_counter +ffffffff81de8f70 t gfx_v10_0_select_se_sh +ffffffff81de9010 t gfx_v10_0_read_wave_data +ffffffff81de9270 t gfx_v10_0_read_wave_vgprs +ffffffff81de92a0 t gfx_v10_0_read_wave_sgprs +ffffffff81de9320 t gfx_v10_0_select_me_pipe_q +ffffffff81de9340 t gfx_v10_0_init_spm_golden_registers +ffffffff81de93b0 t gfx_v10_0_update_perfmon_mgcg +ffffffff81de94d0 t wave_read_ind +ffffffff81de95b0 t wave_read_regs +ffffffff81de9710 t gfx_v10_0_cp_resume +ffffffff81dec350 t gfx_v10_3_get_disabled_sa +ffffffff81dec460 t gfx_v10_0_get_rb_active_bitmap +ffffffff81dec580 t gfx_v10_0_get_wgp_active_bitmap_per_sh +ffffffff81dec690 t gfx_v10_0_enable_gui_idle_interrupt +ffffffff81dec7a0 t gfx_v10_0_cp_gfx_enable +ffffffff81dec9e0 t gfx_v10_0_cp_compute_enable +ffffffff81decb70 t amdgpu_bo_reserve +ffffffff81deccf0 t gfx_v10_0_kiq_init_register +ffffffff81dedb60 t gfx_v10_0_cp_gfx_switch_pipe +ffffffff81dedc60 t gfx_v10_0_cp_gfx_set_doorbell +ffffffff81dedf30 t gfx_v10_0_cp_gfx_start +ffffffff81dee910 t gfx_v10_0_update_fine_grain_clock_gating +ffffffff81deec30 t gfx_v10_0_update_medium_grain_clock_gating +ffffffff81def350 t gfx_v10_0_update_3d_clock_gating +ffffffff81def710 t gfx_v10_0_update_coarse_grain_clock_gating +ffffffff81df0000 t gfx_v11_0_early_init +ffffffff81df03a0 t gfx_v11_0_late_init +ffffffff81df0410 t gfx_v11_0_sw_init +ffffffff81df1360 t gfx_v11_0_sw_fini +ffffffff81df1640 t gfx_v11_0_hw_init +ffffffff81df5ac0 t gfx_v11_0_hw_fini +ffffffff81df5d40 t gfx_v11_0_suspend +ffffffff81df5d80 t gfx_v11_0_resume +ffffffff81df5d90 t gfx_v11_0_is_idle +ffffffff81df5e20 t gfx_v11_0_wait_for_idle +ffffffff81df5f00 t gfx_v11_0_check_soft_reset +ffffffff81df6030 t gfx_v11_0_soft_reset +ffffffff81df6d10 t gfx_v11_0_post_soft_reset +ffffffff81df6d20 t gfx_v11_0_set_clockgating_state +ffffffff81df7900 t gfx_v11_0_set_powergating_state +ffffffff81df7af0 t gfx_v11_0_get_clockgating_state +ffffffff81df7cc0 t gfx11_kiq_set_resources +ffffffff81df7ff0 t gfx11_kiq_map_queues +ffffffff81df8380 t gfx11_kiq_unmap_queues +ffffffff81df8780 t gfx11_kiq_query_status +ffffffff81df8a80 t gfx11_kiq_invalidate_tlbs +ffffffff81df8ba0 t gfx_v11_0_ring_get_rptr_compute +ffffffff81df8bd0 t gfx_v11_0_ring_get_wptr_compute +ffffffff81df8c40 t gfx_v11_0_ring_set_wptr_compute +ffffffff81df8d80 t gfx_v11_0_ring_emit_ib_compute +ffffffff81df90d0 t gfx_v11_0_ring_emit_fence_kiq +ffffffff81df9510 t gfx_v11_0_ring_test_ring +ffffffff81df97a0 t gfx_v11_0_ring_test_ib +ffffffff81df9a60 t gfx_v11_0_ring_emit_rreg +ffffffff81df9d00 t gfx_v11_0_ring_emit_wreg +ffffffff81df9f40 t gfx_v11_0_ring_emit_reg_wait +ffffffff81df9f90 t gfx_v11_0_ring_emit_reg_write_reg_wait +ffffffff81dfa000 t gfx_v11_0_wait_reg_mem +ffffffff81dfa330 t gfx_v11_0_ring_get_rptr_gfx +ffffffff81dfa360 t gfx_v11_0_ring_get_wptr_gfx +ffffffff81dfa470 t gfx_v11_0_ring_set_wptr_gfx +ffffffff81dfa680 t gfx_v11_0_ring_emit_ib_gfx +ffffffff81dfad20 t gfx_v11_0_ring_emit_fence +ffffffff81dfb0f0 t gfx_v11_0_ring_emit_pipeline_sync +ffffffff81dfb150 t gfx_v11_0_ring_emit_vm_flush +ffffffff81dfb320 t gfx_v11_0_ring_emit_hdp_flush +ffffffff81dfb3f0 t gfx_v11_0_ring_emit_gds_switch +ffffffff81dfb4d0 t gfx_v11_0_ring_emit_init_cond_exec +ffffffff81dfb700 t gfx_v11_0_ring_emit_patch_cond_exec +ffffffff81dfb7c0 t gfx_v11_0_ring_emit_cntxcntl +ffffffff81dfb920 t gfx_v11_0_ring_emit_frame_cntl +ffffffff81dfba30 t gfx_v11_0_ring_soft_recovery +ffffffff81dfbaa0 t gfx_v11_0_ring_preempt_ib +ffffffff81dfbc10 t gfx_v11_0_emit_mem_sync +ffffffff81dfbf50 t gfx_v11_0_write_data_to_reg +ffffffff81dfc160 t gfx_v11_0_set_eop_interrupt_state +ffffffff81dfc1f0 t gfx_v11_0_eop_irq +ffffffff81dfc3c0 t gfx_v11_0_set_gfx_eop_interrupt_state +ffffffff81dfc550 t gfx_v11_0_set_compute_eop_interrupt_state +ffffffff81dfc6e0 t gfx_v11_0_set_priv_reg_fault_state +ffffffff81dfc800 t gfx_v11_0_priv_reg_irq +ffffffff81dfc860 t gfx_v11_0_handle_priv_fault +ffffffff81dfc9f0 t gfx_v11_0_set_priv_inst_fault_state +ffffffff81dfcb10 t gfx_v11_0_priv_inst_irq +ffffffff81dfcb70 t gfx_v11_0_is_rlc_enabled +ffffffff81dfcbf0 t gfx_v11_0_set_safe_mode +ffffffff81dfcd40 t gfx_v11_0_unset_safe_mode +ffffffff81dfcdb0 t gfx_v11_0_rlc_init +ffffffff81dfce30 t gfx_v11_0_get_csb_size +ffffffff81dfce90 t gfx_v11_0_get_csb_buffer +ffffffff81dfd010 t gfx_v11_0_rlc_resume +ffffffff81dfdd30 t gfx_v11_0_rlc_stop +ffffffff81dfde10 t gfx_v11_0_rlc_reset +ffffffff81dfdfb0 t gfx_v11_0_rlc_start +ffffffff81dfe150 t gfx_v11_0_update_spm_vmid +ffffffff81dfe250 t gfx_v11_0_init_csb +ffffffff81dfe3d0 t gfx_v11_0_gfx_mqd_init +ffffffff81dfe7a0 t gfx_v11_0_compute_mqd_init +ffffffff81dfecc0 t amdgpu_bo_unreserve +ffffffff81dfeda0 t gfx_v11_0_get_gpu_clock_counter +ffffffff81dfeed0 t gfx_v11_0_select_se_sh +ffffffff81dfef70 t gfx_v11_0_read_wave_data +ffffffff81dff1b0 t gfx_v11_0_read_wave_vgprs +ffffffff81dff1e0 t gfx_v11_0_read_wave_sgprs +ffffffff81dff260 t gfx_v11_0_select_me_pipe_q +ffffffff81dff280 t gfx_v11_0_update_perf_clk +ffffffff81dff3b0 t wave_read_ind +ffffffff81dff490 t wave_read_regs +ffffffff81dff5f0 t gfx_v11_0_disable_gpa_mode +ffffffff81dff780 t gfx_v11_0_cp_resume +ffffffff81e03820 t gfx_v11_0_config_me_cache +ffffffff81e03bc0 t gfx_v11_0_config_pfp_cache +ffffffff81e03f60 t gfx_v11_0_config_mec_cache +ffffffff81e04300 t gfx_v11_0_enable_gui_idle_interrupt +ffffffff81e04410 t gfx_v11_0_cp_compute_enable +ffffffff81e045e0 t gfx_v11_0_cp_gfx_enable +ffffffff81e047d0 t amdgpu_bo_reserve +ffffffff81e04950 t gfx_v11_0_kiq_init_register +ffffffff81e057c0 t gfx_v11_0_cp_gfx_switch_pipe +ffffffff81e058a0 t gfx_v11_0_cp_gfx_set_doorbell +ffffffff81e05a80 t gfx_v11_0_cp_gfx_start +ffffffff81e07000 t gfx_v8_0_early_init +ffffffff81e07320 t gfx_v8_0_late_init +ffffffff81e07a20 t gfx_v8_0_sw_init +ffffffff81e090f0 t gfx_v8_0_sw_fini +ffffffff81e093b0 t gfx_v8_0_hw_init +ffffffff81e0b5e0 t gfx_v8_0_hw_fini +ffffffff81e0bad0 t gfx_v8_0_suspend +ffffffff81e0bb10 t gfx_v8_0_resume +ffffffff81e0bb20 t gfx_v8_0_is_idle +ffffffff81e0bb90 t gfx_v8_0_wait_for_idle +ffffffff81e0bc40 t gfx_v8_0_check_soft_reset +ffffffff81e0bd20 t gfx_v8_0_pre_soft_reset +ffffffff81e0bea0 t gfx_v8_0_soft_reset +ffffffff81e0c060 t gfx_v8_0_post_soft_reset +ffffffff81e0c220 t gfx_v8_0_set_clockgating_state +ffffffff81e0c4e0 t gfx_v8_0_set_powergating_state +ffffffff81e0c8a0 t gfx_v8_0_get_clockgating_state +ffffffff81e0c980 t gfx_v8_0_get_gpu_clock_counter +ffffffff81e0ca20 t gfx_v8_0_select_se_sh +ffffffff81e0ca80 t gfx_v8_0_read_wave_data +ffffffff81e0cf20 t gfx_v8_0_read_wave_sgprs +ffffffff81e0cfd0 t gfx_v8_0_select_me_pipe_q +ffffffff81e0cff0 t gfx_v8_0_ring_get_rptr +ffffffff81e0d020 t gfx_v8_0_ring_get_wptr_compute +ffffffff81e0d050 t gfx_v8_0_ring_set_wptr_compute +ffffffff81e0d090 t gfx_v8_0_ring_emit_fence_kiq +ffffffff81e0d4c0 t gfx_v8_0_ring_test_ring +ffffffff81e0d6c0 t gfx_v8_0_ring_emit_rreg +ffffffff81e0d960 t gfx_v8_0_ring_emit_wreg +ffffffff81e0dba0 t gfx_v8_0_ring_get_wptr_gfx +ffffffff81e0dc00 t gfx_v8_0_ring_set_wptr_gfx +ffffffff81e0dc70 t gfx_v8_0_ring_emit_ib_gfx +ffffffff81e0e1d0 t gfx_v8_0_ring_emit_fence_gfx +ffffffff81e0e6d0 t gfx_v8_0_ring_emit_pipeline_sync +ffffffff81e0e9c0 t gfx_v8_0_ring_emit_vm_flush +ffffffff81e0ed70 t gfx_v8_0_ring_emit_hdp_flush +ffffffff81e0f090 t gfx_v8_0_ring_emit_gds_switch +ffffffff81e0f860 t gfx_v8_0_ring_test_ib +ffffffff81e0fa10 t gfx_v8_0_ring_emit_init_cond_exec +ffffffff81e0fc40 t gfx_v8_0_ring_emit_patch_cond_exec +ffffffff81e0fcf0 t gfx_v8_ring_emit_sb +ffffffff81e0fde0 t gfx_v8_ring_emit_cntxcntl +ffffffff81e10380 t gfx_v8_0_ring_soft_recovery +ffffffff81e103b0 t gfx_v8_0_emit_mem_sync +ffffffff81e105c0 t gfx_v8_0_ring_emit_ib_compute +ffffffff81e108d0 t gfx_v8_0_ring_emit_fence_compute +ffffffff81e10bd0 t gfx_v8_0_emit_mem_sync_compute +ffffffff81e10e90 t gfx_v8_0_emit_wave_limit +ffffffff81e11040 t gfx_v8_0_set_eop_interrupt_state +ffffffff81e11250 t gfx_v8_0_eop_irq +ffffffff81e11380 t gfx_v8_0_set_priv_reg_fault_state +ffffffff81e11400 t gfx_v8_0_priv_reg_irq +ffffffff81e11520 t gfx_v8_0_set_priv_inst_fault_state +ffffffff81e115a0 t gfx_v8_0_priv_inst_irq +ffffffff81e116c0 t gfx_v8_0_set_cp_ecc_int_state +ffffffff81e11930 t gfx_v8_0_cp_ecc_error_irq +ffffffff81e11980 t gfx_v8_0_set_sq_int_state +ffffffff81e11a10 t gfx_v8_0_sq_irq +ffffffff81e11ab0 t gfx_v8_0_parse_sq_irq +ffffffff81e11d00 t gfx_v8_0_is_rlc_enabled +ffffffff81e11d40 t gfx_v8_0_set_safe_mode +ffffffff81e11e40 t gfx_v8_0_unset_safe_mode +ffffffff81e11ee0 t gfx_v8_0_rlc_init +ffffffff81e11f90 t gfx_v8_0_get_csb_size +ffffffff81e11ff0 t gfx_v8_0_get_csb_buffer +ffffffff81e12170 t gfx_v8_0_cp_jump_table_num +ffffffff81e121b0 t gfx_v8_0_rlc_resume +ffffffff81e12540 t gfx_v8_0_rlc_stop +ffffffff81e125b0 t gfx_v8_0_rlc_reset +ffffffff81e12630 t gfx_v8_0_rlc_start +ffffffff81e126b0 t gfx_v8_0_update_spm_vmid +ffffffff81e12720 t gfx_v8_0_init_save_restore_list +ffffffff81e12b40 t gfx_v8_0_wait_for_rlc_serdes +ffffffff81e12d60 t gfx_v8_0_sq_irq_work_func +ffffffff81e12d80 t amdgpu_bo_unreserve +ffffffff81e12e60 t gfx_v8_0_kiq_resume +ffffffff81e130c0 t gfx_v8_0_cp_gfx_resume +ffffffff81e13be0 t gfx_v8_0_kcq_resume +ffffffff81e14610 t amdgpu_bo_reserve +ffffffff81e14790 t gfx_v8_0_mqd_commit +ffffffff81e14970 t gfx_v8_0_mqd_init +ffffffff81e14d90 t gfx_v8_0_deactivate_hqd +ffffffff81e14e50 t gfx_v8_0_update_medium_grain_clock_gating +ffffffff81e15180 t gfx_v8_0_update_coarse_grain_clock_gating +ffffffff81e16000 t gfx_v9_0_ras_error_inject +ffffffff81e161a0 t gfx_v9_0_query_ras_error_count +ffffffff81e16d40 t gfx_v9_0_reset_ras_error_count +ffffffff81e17780 T gfx_v9_0_select_se_sh +ffffffff81e17820 t gfx_v9_0_early_init +ffffffff81e17c80 t gfx_v9_0_late_init +ffffffff81e18990 t gfx_v9_0_sw_init +ffffffff81e1a000 t gfx_v9_0_sw_fini +ffffffff81e1a2b0 t gfx_v9_0_hw_init +ffffffff81e1d360 t gfx_v9_0_hw_fini +ffffffff81e1dac0 t gfx_v9_0_suspend +ffffffff81e1db00 t gfx_v9_0_resume +ffffffff81e1db10 t gfx_v9_0_is_idle +ffffffff81e1db90 t gfx_v9_0_wait_for_idle +ffffffff81e1dc70 t gfx_v9_0_soft_reset +ffffffff81e1e000 t gfx_v9_0_set_clockgating_state +ffffffff81e1e0d0 t gfx_v9_0_set_powergating_state +ffffffff81e1e4d0 t gfx_v9_0_get_clockgating_state +ffffffff81e1e5e0 t gfx_v9_0_kiq_set_resources +ffffffff81e1e910 t gfx_v9_0_kiq_map_queues +ffffffff81e1ec50 t gfx_v9_0_kiq_unmap_queues +ffffffff81e1efd0 t gfx_v9_0_kiq_query_status +ffffffff81e1f2d0 t gfx_v9_0_kiq_invalidate_tlbs +ffffffff81e1f3f0 t gfx_v9_0_ring_get_rptr_compute +ffffffff81e1f420 t gfx_v9_0_ring_get_wptr_compute +ffffffff81e1f490 t gfx_v9_0_ring_set_wptr_compute +ffffffff81e1f4f0 t gfx_v9_0_ring_emit_fence_kiq +ffffffff81e1f930 t gfx_v9_0_ring_test_ring +ffffffff81e1fb60 t gfx_v9_0_ring_emit_rreg +ffffffff81e1fe00 t gfx_v9_0_ring_emit_wreg +ffffffff81e20040 t gfx_v9_0_ring_emit_reg_wait +ffffffff81e20090 t gfx_v9_0_ring_emit_reg_write_reg_wait +ffffffff81e20130 t gfx_v9_0_wait_reg_mem +ffffffff81e20460 t gfx_v9_0_ring_get_rptr_gfx +ffffffff81e20490 t gfx_v9_0_ring_get_wptr_gfx +ffffffff81e205a0 t gfx_v9_0_ring_set_wptr_gfx +ffffffff81e206d0 t gfx_v9_0_ring_emit_ib_gfx +ffffffff81e20bf0 t gfx_v9_0_ring_emit_fence +ffffffff81e20fb0 t gfx_v9_0_ring_emit_pipeline_sync +ffffffff81e21010 t gfx_v9_0_ring_emit_vm_flush +ffffffff81e21120 t gfx_v9_0_ring_emit_hdp_flush +ffffffff81e211f0 t gfx_v9_0_ring_emit_gds_switch +ffffffff81e212d0 t gfx_v9_0_ring_test_ib +ffffffff81e21480 t gfx_v9_0_ring_emit_init_cond_exec +ffffffff81e216b0 t gfx_v9_0_ring_emit_patch_cond_exec +ffffffff81e21780 t gfx_v9_ring_emit_sb +ffffffff81e21870 t gfx_v9_ring_emit_cntxcntl +ffffffff81e21c70 t gfx_v9_0_ring_emit_frame_cntl +ffffffff81e21d80 t gfx_v9_0_ring_soft_recovery +ffffffff81e21df0 t gfx_v9_0_emit_mem_sync +ffffffff81e220b0 t gfx_v9_0_write_data_to_reg +ffffffff81e222c0 t gfx_v9_0_ring_emit_ib_compute +ffffffff81e225f0 t gfx_v9_0_emit_wave_limit +ffffffff81e227c0 t gfx_v9_0_set_eop_interrupt_state +ffffffff81e22990 t gfx_v9_0_eop_irq +ffffffff81e22ac0 t gfx_v9_0_set_compute_eop_interrupt_state +ffffffff81e22c70 t gfx_v9_0_set_priv_reg_fault_state +ffffffff81e22d90 t gfx_v9_0_priv_reg_irq +ffffffff81e22eb0 t gfx_v9_0_set_priv_inst_fault_state +ffffffff81e22fd0 t gfx_v9_0_priv_inst_irq +ffffffff81e230f0 t gfx_v9_0_set_cp_ecc_error_state +ffffffff81e23920 t gfx_v9_0_is_rlc_enabled +ffffffff81e239a0 t gfx_v9_0_set_safe_mode +ffffffff81e23af0 t gfx_v9_0_unset_safe_mode +ffffffff81e23b60 t gfx_v9_0_rlc_init +ffffffff81e24370 t gfx_v9_0_get_csb_size +ffffffff81e243d0 t gfx_v9_0_get_csb_buffer +ffffffff81e24520 t gfx_v9_0_cp_jump_table_num +ffffffff81e24570 t gfx_v9_0_rlc_resume +ffffffff81e25310 t gfx_v9_0_rlc_stop +ffffffff81e257b0 t gfx_v9_0_rlc_reset +ffffffff81e25940 t gfx_v9_0_rlc_start +ffffffff81e25a80 t gfx_v9_0_update_spm_vmid +ffffffff81e25bb0 t gfx_v9_0_is_rlcg_access_range +ffffffff81e25c00 t gfx_v9_0_init_always_on_cu_mask +ffffffff81e25f60 t gfx_v9_0_init_csb +ffffffff81e260f0 t gfx_v9_0_enable_lbpw +ffffffff81e261e0 t gfx_v9_0_enable_gui_idle_interrupt +ffffffff81e262e0 t amdgpu_bo_unreserve +ffffffff81e263c0 t gfx_v9_0_get_gpu_clock_counter +ffffffff81e26b40 t gfx_v9_0_read_wave_data +ffffffff81e26d80 t gfx_v9_0_read_wave_vgprs +ffffffff81e26da0 t gfx_v9_0_read_wave_sgprs +ffffffff81e26df0 t gfx_v9_0_select_me_pipe_q +ffffffff81e26e10 t wave_read_ind +ffffffff81e26f20 t wave_read_regs +ffffffff81e27090 t gfx_v9_0_cp_gfx_enable +ffffffff81e27170 t amdgpu_bo_reserve +ffffffff81e272f0 t gfx_v9_0_kiq_init_register +ffffffff81e27f70 t gfx_v9_0_mqd_init +ffffffff81e284b0 t gfx_v9_0_update_medium_grain_clock_gating +ffffffff81e289c0 t gfx_v9_0_update_3d_clock_gating +ffffffff81e28da0 t gfx_v9_0_update_coarse_grain_clock_gating +ffffffff81e2a000 t gfx_v9_4_ras_error_inject +ffffffff81e2a130 t gfx_v9_4_query_ras_error_count +ffffffff81e2aef0 t gfx_v9_4_query_ras_error_status +ffffffff81e2b0c0 t gfx_v9_4_reset_ras_error_count +ffffffff81e2c000 T gfx_v9_4_2_do_edc_gpr_workarounds +ffffffff81e2c790 T gfx_v9_4_2_init_golden_registers +ffffffff81e2c830 T gfx_v9_4_2_debug_trap_config_init +ffffffff81e2c8d0 T gfx_v9_4_2_set_power_brake_sequence +ffffffff81e2caa0 t gfx_v9_4_2_ras_error_inject +ffffffff81e2cbd0 t gfx_v9_4_2_query_ras_error_count +ffffffff81e2cc80 t gfx_v9_4_2_query_ras_error_status +ffffffff81e2d4d0 t gfx_v9_4_2_reset_ras_error_count +ffffffff81e2d530 t gfx_v9_4_2_reset_ras_error_status +ffffffff81e2d9f0 t gfx_v9_4_2_enable_watchdog_timer +ffffffff81e2dc10 t gfx_v9_4_2_query_uctl2_poison_status +ffffffff81e2dc90 t gfx_v9_4_2_run_shader +ffffffff81e2e010 t gfx_v9_4_2_wait_for_waves_assigned +ffffffff81e2e650 t gfx_v9_4_2_query_sram_edc_count +ffffffff81e2e9a0 t gfx_v9_4_2_query_utc_edc_count +ffffffff81e2eb80 t wave_read_ind +ffffffff81e2f000 t gfxhub_v1_0_get_mc_fb_offset +ffffffff81e2f090 t gfxhub_v1_0_setup_vm_pt_regs +ffffffff81e2f1d0 t gfxhub_v1_0_gart_enable +ffffffff81e306c0 t gfxhub_v1_0_gart_disable +ffffffff81e30950 t gfxhub_v1_0_set_fault_enable_default +ffffffff81e30a40 t gfxhub_v1_0_init +ffffffff81e31000 T gfxhub_v1_1_get_xgmi_info +ffffffff81e32000 t gfxhub_v2_0_get_fb_location +ffffffff81e32090 t gfxhub_v2_0_get_mc_fb_offset +ffffffff81e32120 t gfxhub_v2_0_setup_vm_pt_regs +ffffffff81e32260 t gfxhub_v2_0_gart_enable +ffffffff81e33460 t gfxhub_v2_0_gart_disable +ffffffff81e336a0 t gfxhub_v2_0_set_fault_enable_default +ffffffff81e33790 t gfxhub_v2_0_init +ffffffff81e33860 t gfxhub_v2_0_print_l2_protection_fault_status +ffffffff81e33a40 t gfxhub_v2_0_get_invalidate_req +ffffffff81e34000 t gfxhub_v2_1_get_fb_location +ffffffff81e34090 t gfxhub_v2_1_get_mc_fb_offset +ffffffff81e34120 t gfxhub_v2_1_setup_vm_pt_regs +ffffffff81e34260 t gfxhub_v2_1_gart_enable +ffffffff81e35540 t gfxhub_v2_1_gart_disable +ffffffff81e357c0 t gfxhub_v2_1_set_fault_enable_default +ffffffff81e358d0 t gfxhub_v2_1_init +ffffffff81e359a0 t gfxhub_v2_1_get_xgmi_info +ffffffff81e35ad0 t gfxhub_v2_1_utcl2_harvest +ffffffff81e35cb0 t gfxhub_v2_1_save_regs +ffffffff81e366e0 t gfxhub_v2_1_restore_regs +ffffffff81e372c0 t gfxhub_v2_1_halt +ffffffff81e37680 t gfxhub_v2_1_print_l2_protection_fault_status +ffffffff81e37860 t gfxhub_v2_1_get_invalidate_req +ffffffff81e38000 t gfxhub_v3_0_get_fb_location +ffffffff81e38090 t gfxhub_v3_0_get_mc_fb_offset +ffffffff81e38120 t gfxhub_v3_0_setup_vm_pt_regs +ffffffff81e38260 t gfxhub_v3_0_gart_enable +ffffffff81e394e0 t gfxhub_v3_0_gart_disable +ffffffff81e39760 t gfxhub_v3_0_set_fault_enable_default +ffffffff81e39b00 t gfxhub_v3_0_init +ffffffff81e39bd0 t gfxhub_v3_0_print_l2_protection_fault_status +ffffffff81e39db0 t gfxhub_v3_0_get_invalidate_req +ffffffff81e3a000 t gfxhub_v3_0_3_get_fb_location +ffffffff81e3a090 t gfxhub_v3_0_3_get_mc_fb_offset +ffffffff81e3a120 t gfxhub_v3_0_3_setup_vm_pt_regs +ffffffff81e3a260 t gfxhub_v3_0_3_gart_enable +ffffffff81e3b4f0 t gfxhub_v3_0_3_gart_disable +ffffffff81e3b790 t gfxhub_v3_0_3_set_fault_enable_default +ffffffff81e3b8a0 t gfxhub_v3_0_3_init +ffffffff81e3b970 t gfxhub_v3_0_3_print_l2_protection_fault_status +ffffffff81e3bb50 t gfxhub_v3_0_3_get_invalidate_req +ffffffff81e3c000 t gmc_v10_0_early_init +ffffffff81e3c1f0 t gmc_v10_0_late_init +ffffffff81e3c260 t gmc_v10_0_sw_init +ffffffff81e3c680 t gmc_v10_0_sw_fini +ffffffff81e3c6d0 t gmc_v10_0_hw_init +ffffffff81e3c8a0 t gmc_v10_0_hw_fini +ffffffff81e3c940 t gmc_v10_0_suspend +ffffffff81e3c9e0 t gmc_v10_0_resume +ffffffff81e3ca40 t gmc_v10_0_is_idle +ffffffff81e3ca70 t gmc_v10_0_wait_for_idle +ffffffff81e3caa0 t gmc_v10_0_soft_reset +ffffffff81e3cad0 t gmc_v10_0_set_clockgating_state +ffffffff81e3cb80 t gmc_v10_0_set_powergating_state +ffffffff81e3cbb0 t gmc_v10_0_get_clockgating_state +ffffffff81e3cc50 t gmc_v10_0_flush_gpu_tlb +ffffffff81e3cf00 t gmc_v10_0_flush_gpu_tlb_pasid +ffffffff81e3d120 t gmc_v10_0_emit_flush_gpu_tlb +ffffffff81e3d2d0 t gmc_v10_0_emit_pasid_mapping +ffffffff81e3d340 t gmc_v10_0_map_mtype +ffffffff81e3d390 t gmc_v10_0_get_vm_pde +ffffffff81e3d480 t gmc_v10_0_get_vm_pte +ffffffff81e3d530 t gmc_v10_0_get_vbios_fb_size +ffffffff81e3d6a0 t gmc_v10_0_flush_vm_hub +ffffffff81e3db00 t gmc_v10_0_vm_fault_interrupt_state +ffffffff81e3db70 t gmc_v10_0_process_interrupt +ffffffff81e3de30 t gmc_v10_0_ecc_interrupt_state +ffffffff81e3e000 t gmc_v11_0_early_init +ffffffff81e3e230 t gmc_v11_0_late_init +ffffffff81e3e2a0 t gmc_v11_0_sw_init +ffffffff81e3e5c0 t gmc_v11_0_sw_fini +ffffffff81e3e610 t gmc_v11_0_hw_init +ffffffff81e3e750 t gmc_v11_0_hw_fini +ffffffff81e3e7e0 t gmc_v11_0_suspend +ffffffff81e3e870 t gmc_v11_0_resume +ffffffff81e3e8d0 t gmc_v11_0_is_idle +ffffffff81e3e900 t gmc_v11_0_wait_for_idle +ffffffff81e3e930 t gmc_v11_0_soft_reset +ffffffff81e3e960 t gmc_v11_0_set_clockgating_state +ffffffff81e3e9e0 t gmc_v11_0_set_powergating_state +ffffffff81e3ea10 t gmc_v11_0_get_clockgating_state +ffffffff81e3ea50 t gmc_v11_0_flush_gpu_tlb +ffffffff81e3ef20 t gmc_v11_0_flush_gpu_tlb_pasid +ffffffff81e3f110 t gmc_v11_0_emit_flush_gpu_tlb +ffffffff81e3f2c0 t gmc_v11_0_emit_pasid_mapping +ffffffff81e3f330 t gmc_v11_0_map_mtype +ffffffff81e3f380 t gmc_v11_0_get_vm_pde +ffffffff81e3f480 t gmc_v11_0_get_vm_pte +ffffffff81e3f530 t gmc_v11_0_get_vbios_fb_size +ffffffff81e3f560 t gmc_v11_0_vm_fault_interrupt_state +ffffffff81e3f5d0 t gmc_v11_0_process_interrupt +ffffffff81e3f7f0 t gmc_v11_0_ecc_interrupt_state +ffffffff81e40000 t gmc_v7_0_early_init +ffffffff81e40090 t gmc_v7_0_late_init +ffffffff81e400e0 t gmc_v7_0_sw_init +ffffffff81e405e0 t gmc_v7_0_sw_fini +ffffffff81e40690 t gmc_v7_0_hw_init +ffffffff81e41040 t gmc_v7_0_hw_fini +ffffffff81e41100 t gmc_v7_0_suspend +ffffffff81e41140 t gmc_v7_0_resume +ffffffff81e411a0 t gmc_v7_0_is_idle +ffffffff81e411f0 t gmc_v7_0_wait_for_idle +ffffffff81e41290 t gmc_v7_0_soft_reset +ffffffff81e414f0 t gmc_v7_0_set_clockgating_state +ffffffff81e41750 t gmc_v7_0_set_powergating_state +ffffffff81e41780 t gmc_v7_0_flush_gpu_tlb +ffffffff81e417b0 t gmc_v7_0_flush_gpu_tlb_pasid +ffffffff81e41870 t gmc_v7_0_emit_flush_gpu_tlb +ffffffff81e41900 t gmc_v7_0_emit_pasid_mapping +ffffffff81e41930 t gmc_v7_0_set_prt +ffffffff81e41af0 t gmc_v7_0_get_vm_pde +ffffffff81e41b50 t gmc_v7_0_get_vm_pte +ffffffff81e41b90 t gmc_v7_0_get_vbios_fb_size +ffffffff81e41c00 t gmc_v7_0_vm_fault_interrupt_state +ffffffff81e41cd0 t gmc_v7_0_process_interrupt +ffffffff81e42000 t gmc_v8_0_early_init +ffffffff81e42090 t gmc_v8_0_late_init +ffffffff81e420e0 t gmc_v8_0_sw_init +ffffffff81e42760 t gmc_v8_0_sw_fini +ffffffff81e42810 t gmc_v8_0_hw_init +ffffffff81e434c0 t gmc_v8_0_hw_fini +ffffffff81e43580 t gmc_v8_0_suspend +ffffffff81e435c0 t gmc_v8_0_resume +ffffffff81e43620 t gmc_v8_0_is_idle +ffffffff81e43670 t gmc_v8_0_wait_for_idle +ffffffff81e43710 t gmc_v8_0_check_soft_reset +ffffffff81e43780 t gmc_v8_0_pre_soft_reset +ffffffff81e438f0 t gmc_v8_0_soft_reset +ffffffff81e439c0 t gmc_v8_0_post_soft_reset +ffffffff81e43a30 t gmc_v8_0_set_clockgating_state +ffffffff81e43ff0 t gmc_v8_0_set_powergating_state +ffffffff81e44020 t gmc_v8_0_get_clockgating_state +ffffffff81e44090 t gmc_v8_0_flush_gpu_tlb +ffffffff81e440c0 t gmc_v8_0_flush_gpu_tlb_pasid +ffffffff81e44180 t gmc_v8_0_emit_flush_gpu_tlb +ffffffff81e44210 t gmc_v8_0_emit_pasid_mapping +ffffffff81e44240 t gmc_v8_0_set_prt +ffffffff81e44400 t gmc_v8_0_get_vm_pde +ffffffff81e44460 t gmc_v8_0_get_vm_pte +ffffffff81e444b0 t gmc_v8_0_get_vbios_fb_size +ffffffff81e44520 t gmc_v8_0_vm_fault_interrupt_state +ffffffff81e445f0 t gmc_v8_0_process_interrupt +ffffffff81e45000 T gmc_v9_0_restore_registers +ffffffff81e45150 t gmc_v9_0_early_init +ffffffff81e45500 t gmc_v9_0_late_init +ffffffff81e45610 t gmc_v9_0_sw_init +ffffffff81e45cc0 t gmc_v9_0_sw_fini +ffffffff81e45d30 t gmc_v9_0_hw_init +ffffffff81e46130 t gmc_v9_0_hw_fini +ffffffff81e461f0 t gmc_v9_0_suspend +ffffffff81e462b0 t gmc_v9_0_resume +ffffffff81e46310 t gmc_v9_0_is_idle +ffffffff81e46340 t gmc_v9_0_wait_for_idle +ffffffff81e46370 t gmc_v9_0_soft_reset +ffffffff81e463a0 t gmc_v9_0_set_clockgating_state +ffffffff81e46400 t gmc_v9_0_set_powergating_state +ffffffff81e46430 t gmc_v9_0_get_clockgating_state +ffffffff81e46470 t gmc_v9_0_flush_gpu_tlb +ffffffff81e46ab0 t gmc_v9_0_flush_gpu_tlb_pasid +ffffffff81e46d80 t gmc_v9_0_emit_flush_gpu_tlb +ffffffff81e46f50 t gmc_v9_0_emit_pasid_mapping +ffffffff81e46fc0 t gmc_v9_0_map_mtype +ffffffff81e47000 t gmc_v9_0_get_vm_pde +ffffffff81e47100 t gmc_v9_0_get_vm_pte +ffffffff81e471d0 t gmc_v9_0_get_vbios_fb_size +ffffffff81e47360 t gmc_v9_0_vm_fault_interrupt_state +ffffffff81e476e0 t gmc_v9_0_process_interrupt +ffffffff81e47d20 t gmc_v9_0_ecc_interrupt_state +ffffffff81e48000 t hdp_v4_0_query_ras_error_count +ffffffff81e480c0 t hdp_v4_0_reset_ras_error_count +ffffffff81e481e0 t hdp_v4_0_flush_hdp +ffffffff81e48230 t hdp_v4_0_invalidate_hdp +ffffffff81e48300 t hdp_v4_0_update_clock_gating +ffffffff81e48400 t hdp_v4_0_get_clockgating_state +ffffffff81e48450 t hdp_v4_0_init_registers +ffffffff81e49000 t hdp_v5_0_flush_hdp +ffffffff81e49050 t hdp_v5_0_invalidate_hdp +ffffffff81e490f0 t hdp_v5_0_update_clock_gating +ffffffff81e494e0 t hdp_v5_0_get_clockgating_state +ffffffff81e49600 t hdp_v5_0_init_registers +ffffffff81e4a000 t hdp_v5_2_flush_hdp +ffffffff81e4a050 t hdp_v5_2_update_clock_gating +ffffffff81e4a440 t hdp_v5_2_get_clockgating_state +ffffffff81e4b000 t hdp_v6_0_flush_hdp +ffffffff81e4b050 t hdp_v6_0_update_clock_gating +ffffffff81e4b360 t hdp_v6_0_get_clockgating_state +ffffffff81e4c000 t iceland_ih_early_init +ffffffff81e4c050 t iceland_ih_sw_init +ffffffff81e4c0b0 t iceland_ih_sw_fini +ffffffff81e4c0f0 t iceland_ih_hw_init +ffffffff81e4c320 t iceland_ih_hw_fini +ffffffff81e4c3f0 t iceland_ih_suspend +ffffffff81e4c4c0 t iceland_ih_resume +ffffffff81e4c500 t iceland_ih_is_idle +ffffffff81e4c550 t iceland_ih_wait_for_idle +ffffffff81e4c5f0 t iceland_ih_soft_reset +ffffffff81e4c6d0 t iceland_ih_set_clockgating_state +ffffffff81e4c700 t iceland_ih_set_powergating_state +ffffffff81e4c730 t iceland_ih_get_wptr +ffffffff81e4c820 t iceland_ih_decode_iv +ffffffff81e4c8a0 t iceland_ih_set_rptr +ffffffff81e4d000 t ih_v6_0_early_init +ffffffff81e4d050 t ih_v6_0_sw_init +ffffffff81e4d1b0 t ih_v6_0_sw_fini +ffffffff81e4d1f0 t ih_v6_0_hw_init +ffffffff81e4d7a0 t ih_v6_0_hw_fini +ffffffff81e4d800 t ih_v6_0_suspend +ffffffff81e4d860 t ih_v6_0_resume +ffffffff81e4d870 t ih_v6_0_is_idle +ffffffff81e4d8a0 t ih_v6_0_wait_for_idle +ffffffff81e4d8d0 t ih_v6_0_soft_reset +ffffffff81e4d900 t ih_v6_0_set_clockgating_state +ffffffff81e4da20 t ih_v6_0_set_powergating_state +ffffffff81e4db90 t ih_v6_0_get_clockgating_state +ffffffff81e4dc20 t ih_v6_0_get_wptr +ffffffff81e4dd10 t ih_v6_0_set_rptr +ffffffff81e4dde0 t ih_v6_0_self_irq +ffffffff81e4de50 t ih_v6_0_toggle_interrupts +ffffffff81e4e030 t force_update_wptr_for_self_int +ffffffff81e4f000 t imu_v11_0_init_microcode +ffffffff81e4f1f0 t imu_v11_0_load_microcode +ffffffff81e4f550 t imu_v11_0_setup +ffffffff81e4f7d0 t imu_v11_0_start +ffffffff81e4f8c0 t imu_v11_0_program_rlc_ram +ffffffff81e4fa70 t imu_v11_0_wait_for_reset_status +ffffffff81e4fbc0 t program_imu_rlc_ram +ffffffff81e50000 T imu_v11_0_3_program_rlc_ram +ffffffff81e51000 T jpeg_v1_0_early_init +ffffffff81e51060 T jpeg_v1_0_sw_init +ffffffff81e51130 T jpeg_v1_0_sw_fini +ffffffff81e51150 T jpeg_v1_0_start +ffffffff81e51bc0 t jpeg_v1_0_decode_ring_get_rptr +ffffffff81e51c50 t jpeg_v1_0_decode_ring_get_wptr +ffffffff81e51ce0 t jpeg_v1_0_decode_ring_set_wptr +ffffffff81e51d50 t jpeg_v1_0_decode_ring_emit_ib +ffffffff81e52660 t jpeg_v1_0_decode_ring_emit_fence +ffffffff81e52fc0 t jpeg_v1_0_decode_ring_emit_vm_flush +ffffffff81e53030 t jpeg_v1_0_decode_ring_nop +ffffffff81e53190 t jpeg_v1_0_decode_ring_insert_start +ffffffff81e53360 t jpeg_v1_0_decode_ring_insert_end +ffffffff81e53530 t jpeg_v1_0_ring_begin_use +ffffffff81e53630 t jpeg_v1_0_decode_ring_emit_wreg +ffffffff81e53890 t jpeg_v1_0_decode_ring_emit_reg_wait +ffffffff81e53cb0 t jpeg_v1_0_set_interrupt_state +ffffffff81e53ce0 t jpeg_v1_0_process_interrupt +ffffffff81e54000 T jpeg_v2_0_dec_ring_insert_start +ffffffff81e541b0 T jpeg_v2_0_dec_ring_insert_end +ffffffff81e54360 T jpeg_v2_0_dec_ring_emit_fence +ffffffff81e54a50 T jpeg_v2_0_dec_ring_emit_ib +ffffffff81e55240 T jpeg_v2_0_dec_ring_emit_reg_wait +ffffffff81e55600 T jpeg_v2_0_dec_ring_emit_vm_flush +ffffffff81e55670 T jpeg_v2_0_dec_ring_emit_wreg +ffffffff81e558b0 T jpeg_v2_0_dec_ring_nop +ffffffff81e55a10 t jpeg_v2_0_early_init +ffffffff81e55a80 t jpeg_v2_0_sw_init +ffffffff81e55b90 t jpeg_v2_0_sw_fini +ffffffff81e55be0 t jpeg_v2_0_hw_init +ffffffff81e55c60 t jpeg_v2_0_hw_fini +ffffffff81e55d40 t jpeg_v2_0_suspend +ffffffff81e55d70 t jpeg_v2_0_resume +ffffffff81e55e00 t jpeg_v2_0_is_idle +ffffffff81e55e80 t jpeg_v2_0_wait_for_idle +ffffffff81e55f70 t jpeg_v2_0_set_clockgating_state +ffffffff81e56020 t jpeg_v2_0_set_powergating_state +ffffffff81e56820 t jpeg_v2_0_dec_ring_get_rptr +ffffffff81e568b0 t jpeg_v2_0_dec_ring_get_wptr +ffffffff81e56950 t jpeg_v2_0_dec_ring_set_wptr +ffffffff81e569f0 t jpeg_v2_0_set_interrupt_state +ffffffff81e56a20 t jpeg_v2_0_process_interrupt +ffffffff81e56ab0 t jpeg_v2_0_enable_clock_gating +ffffffff81e56c50 t jpeg_v2_0_disable_clock_gating +ffffffff81e57000 t jpeg_v2_6_query_ras_poison_status +ffffffff81e57140 t jpeg_v2_5_early_init +ffffffff81e57410 t jpeg_v2_5_sw_init +ffffffff81e57630 t jpeg_v2_5_sw_fini +ffffffff81e57680 t jpeg_v2_5_hw_init +ffffffff81e57770 t jpeg_v2_5_hw_fini +ffffffff81e578b0 t jpeg_v2_5_suspend +ffffffff81e578e0 t jpeg_v2_5_resume +ffffffff81e579e0 t jpeg_v2_5_is_idle +ffffffff81e57ae0 t jpeg_v2_5_wait_for_idle +ffffffff81e57c10 t jpeg_v2_5_set_clockgating_state +ffffffff81e57d80 t jpeg_v2_5_set_powergating_state +ffffffff81e58470 t jpeg_v2_5_dec_ring_get_rptr +ffffffff81e58510 t jpeg_v2_5_dec_ring_get_wptr +ffffffff81e585c0 t jpeg_v2_5_dec_ring_set_wptr +ffffffff81e58670 t jpeg_v2_6_dec_ring_insert_start +ffffffff81e58830 t jpeg_v2_6_dec_ring_insert_end +ffffffff81e589f0 t jpeg_v2_5_set_interrupt_state +ffffffff81e58a20 t jpeg_v2_5_process_interrupt +ffffffff81e58b00 t jpeg_v2_5_enable_clock_gating +ffffffff81e58bd0 t jpeg_v2_5_disable_clock_gating +ffffffff81e59000 t jpeg_v3_0_early_init +ffffffff81e590e0 t jpeg_v3_0_sw_init +ffffffff81e591f0 t jpeg_v3_0_sw_fini +ffffffff81e59240 t jpeg_v3_0_hw_init +ffffffff81e592c0 t jpeg_v3_0_hw_fini +ffffffff81e593a0 t jpeg_v3_0_suspend +ffffffff81e593d0 t jpeg_v3_0_resume +ffffffff81e59460 t jpeg_v3_0_is_idle +ffffffff81e594e0 t jpeg_v3_0_wait_for_idle +ffffffff81e595d0 t jpeg_v3_0_set_clockgating_state +ffffffff81e59680 t jpeg_v3_0_set_powergating_state +ffffffff81e59f30 t jpeg_v3_0_dec_ring_get_rptr +ffffffff81e59fc0 t jpeg_v3_0_dec_ring_get_wptr +ffffffff81e5a060 t jpeg_v3_0_dec_ring_set_wptr +ffffffff81e5a100 t jpeg_v3_0_set_interrupt_state +ffffffff81e5a130 t jpeg_v3_0_process_interrupt +ffffffff81e5a1c0 t jpeg_v3_0_enable_clock_gating +ffffffff81e5a290 t jpeg_v3_0_disable_clock_gating +ffffffff81e5b000 t jpeg_v4_0_early_init +ffffffff81e5b080 t jpeg_v4_0_sw_init +ffffffff81e5b190 t jpeg_v4_0_sw_fini +ffffffff81e5b1e0 t jpeg_v4_0_hw_init +ffffffff81e5b300 t jpeg_v4_0_hw_fini +ffffffff81e5b3e0 t jpeg_v4_0_suspend +ffffffff81e5b410 t jpeg_v4_0_resume +ffffffff81e5b460 t jpeg_v4_0_is_idle +ffffffff81e5b4e0 t jpeg_v4_0_wait_for_idle +ffffffff81e5b5d0 t jpeg_v4_0_set_clockgating_state +ffffffff81e5b680 t jpeg_v4_0_set_powergating_state +ffffffff81e5be90 t jpeg_v4_0_dec_ring_get_rptr +ffffffff81e5bf20 t jpeg_v4_0_dec_ring_get_wptr +ffffffff81e5bfc0 t jpeg_v4_0_dec_ring_set_wptr +ffffffff81e5c060 t jpeg_v4_0_set_interrupt_state +ffffffff81e5c090 t jpeg_v4_0_process_interrupt +ffffffff81e5c130 t jpeg_v4_0_enable_clock_gating +ffffffff81e5c2e0 t jpeg_v4_0_disable_clock_gating +ffffffff81e5d000 t lsdma_v6_0_copy_mem +ffffffff81e5d360 t lsdma_v6_0_fill_mem +ffffffff81e5d640 t lsdma_v6_0_update_memory_power_gating +ffffffff81e5e000 t mca_v3_0_mp0_query_ras_error_count +ffffffff81e5e020 t mca_v3_0_ras_block_match +ffffffff81e5e070 t mca_v3_0_mp1_query_ras_error_count +ffffffff81e5e090 t mca_v3_0_mpio_query_ras_error_count +ffffffff81e5e0b0 t mca_v3_0_init +ffffffff81e5f000 t mes_v10_0_late_init +ffffffff81e5f050 t mes_v10_1_sw_init +ffffffff81e5f660 t mes_v10_1_sw_fini +ffffffff81e5f7e0 t mes_v10_1_hw_init +ffffffff81e60080 t mes_v10_1_hw_fini +ffffffff81e60140 t mes_v10_1_suspend +ffffffff81e60220 t mes_v10_1_resume +ffffffff81e60270 t mes_v10_1_kiq_hw_init +ffffffff81e60680 t mes_v10_1_add_hw_queue +ffffffff81e60800 t mes_v10_1_remove_hw_queue +ffffffff81e60890 t mes_v10_1_unmap_legacy_queue +ffffffff81e60980 t mes_v10_1_suspend_gang +ffffffff81e609b0 t mes_v10_1_resume_gang +ffffffff81e609e0 t mes_v10_1_submit_pkt_and_poll_completion +ffffffff81e60be0 t mes_v10_1_load_microcode +ffffffff81e613d0 t mes_v10_1_enable +ffffffff81e61840 t mes_v10_1_queue_init +ffffffff81e61ae0 t amdgpu_bo_unreserve +ffffffff81e61bc0 t mes_v10_1_ring_get_rptr +ffffffff81e61bf0 t mes_v10_1_ring_get_wptr +ffffffff81e61c60 t mes_v10_1_ring_set_wptr +ffffffff81e62000 t mes_v11_0_late_init +ffffffff81e62070 t mes_v11_0_sw_init +ffffffff81e62650 t mes_v11_0_sw_fini +ffffffff81e62840 t mes_v11_0_hw_init +ffffffff81e63050 t mes_v11_0_hw_fini +ffffffff81e63080 t mes_v11_0_suspend +ffffffff81e63090 t mes_v11_0_resume +ffffffff81e630e0 t mes_v11_0_kiq_hw_init +ffffffff81e632e0 t mes_v11_0_kiq_hw_fini +ffffffff81e63720 t mes_v11_0_add_hw_queue +ffffffff81e63920 t mes_v11_0_remove_hw_queue +ffffffff81e639b0 t mes_v11_0_unmap_legacy_queue +ffffffff81e63ab0 t mes_v11_0_suspend_gang +ffffffff81e63ae0 t mes_v11_0_resume_gang +ffffffff81e63b10 t mes_v11_0_misc_op +ffffffff81e63c80 t mes_v11_0_submit_pkt_and_poll_completion +ffffffff81e63ea0 t mes_v11_0_load_microcode +ffffffff81e64600 t mes_v11_0_enable +ffffffff81e64af0 t mes_v11_0_queue_init +ffffffff81e65580 t amdgpu_bo_unreserve +ffffffff81e65660 t mes_v11_0_mqd_init +ffffffff81e65860 t mes_v11_0_ring_get_rptr +ffffffff81e65890 t mes_v11_0_ring_get_wptr +ffffffff81e65900 t mes_v11_0_ring_set_wptr +ffffffff81e66000 t mmhub_v1_0_query_ras_error_count +ffffffff81e66150 t mmhub_v1_0_reset_ras_error_count +ffffffff81e66200 t mmhub_v1_0_get_fb_location +ffffffff81e66310 t mmhub_v1_0_init +ffffffff81e663c0 t mmhub_v1_0_gart_enable +ffffffff81e676f0 t mmhub_v1_0_set_fault_enable_default +ffffffff81e67800 t mmhub_v1_0_gart_disable +ffffffff81e67a90 t mmhub_v1_0_set_clockgating +ffffffff81e67f10 t mmhub_v1_0_get_clockgating +ffffffff81e68030 t mmhub_v1_0_setup_vm_pt_regs +ffffffff81e68170 t mmhub_v1_0_update_power_gating +ffffffff81e69000 t mmhub_v1_7_query_ras_error_count +ffffffff81e69150 t mmhub_v1_7_query_ras_error_status +ffffffff81e69230 t mmhub_v1_7_reset_ras_error_count +ffffffff81e692d0 t mmhub_v1_7_reset_ras_error_status +ffffffff81e693c0 t mmhub_v1_7_get_fb_location +ffffffff81e694d0 t mmhub_v1_7_init +ffffffff81e69570 t mmhub_v1_7_gart_enable +ffffffff81e6aa50 t mmhub_v1_7_set_fault_enable_default +ffffffff81e6ab60 t mmhub_v1_7_gart_disable +ffffffff81e6adf0 t mmhub_v1_7_set_clockgating +ffffffff81e6b170 t mmhub_v1_7_get_clockgating +ffffffff81e6b290 t mmhub_v1_7_setup_vm_pt_regs +ffffffff81e6c000 t mmhub_v2_0_init +ffffffff81e6c0d0 t mmhub_v2_0_gart_enable +ffffffff81e6d250 t mmhub_v2_0_set_fault_enable_default +ffffffff81e6d360 t mmhub_v2_0_gart_disable +ffffffff81e6d5e0 t mmhub_v2_0_set_clockgating +ffffffff81e6d920 t mmhub_v2_0_get_clockgating +ffffffff81e6dab0 t mmhub_v2_0_setup_vm_pt_regs +ffffffff81e6dbf0 t mmhub_v2_0_print_l2_protection_fault_status +ffffffff81e6de50 t mmhub_v2_0_get_invalidate_req +ffffffff81e6e000 t mmhub_v2_3_init +ffffffff81e6e0e0 t mmhub_v2_3_gart_enable +ffffffff81e6f470 t mmhub_v2_3_set_fault_enable_default +ffffffff81e6f570 t mmhub_v2_3_gart_disable +ffffffff81e6f800 t mmhub_v2_3_set_clockgating +ffffffff81e6fc80 t mmhub_v2_3_get_clockgating +ffffffff81e6fe70 t mmhub_v2_3_setup_vm_pt_regs +ffffffff81e6ffb0 t mmhub_v2_3_print_l2_protection_fault_status +ffffffff81e701d0 t mmhub_v2_3_get_invalidate_req +ffffffff81e71000 t mmhub_v3_0_get_fb_location +ffffffff81e71090 t mmhub_v3_0_get_mc_fb_offset +ffffffff81e71120 t mmhub_v3_0_init +ffffffff81e711f0 t mmhub_v3_0_gart_enable +ffffffff81e72380 t mmhub_v3_0_set_fault_enable_default +ffffffff81e72490 t mmhub_v3_0_gart_disable +ffffffff81e72710 t mmhub_v3_0_set_clockgating +ffffffff81e728e0 t mmhub_v3_0_get_clockgating +ffffffff81e72990 t mmhub_v3_0_setup_vm_pt_regs +ffffffff81e72ad0 t mmhub_v3_0_print_l2_protection_fault_status +ffffffff81e72cf0 t mmhub_v3_0_get_invalidate_req +ffffffff81e73000 t mmhub_v3_0_1_get_fb_location +ffffffff81e73090 t mmhub_v3_0_1_get_mc_fb_offset +ffffffff81e73120 t mmhub_v3_0_1_init +ffffffff81e731f0 t mmhub_v3_0_1_gart_enable +ffffffff81e74470 t mmhub_v3_0_1_set_fault_enable_default +ffffffff81e74570 t mmhub_v3_0_1_gart_disable +ffffffff81e74800 t mmhub_v3_0_1_set_clockgating +ffffffff81e749c0 t mmhub_v3_0_1_get_clockgating +ffffffff81e74a70 t mmhub_v3_0_1_setup_vm_pt_regs +ffffffff81e74bb0 t mmhub_v3_0_1_print_l2_protection_fault_status +ffffffff81e74dc0 t mmhub_v3_0_1_get_invalidate_req +ffffffff81e75000 t mmhub_v3_0_2_get_fb_location +ffffffff81e75090 t mmhub_v3_0_2_get_mc_fb_offset +ffffffff81e75120 t mmhub_v3_0_2_init +ffffffff81e751f0 t mmhub_v3_0_2_gart_enable +ffffffff81e76370 t mmhub_v3_0_2_set_fault_enable_default +ffffffff81e76480 t mmhub_v3_0_2_gart_disable +ffffffff81e76700 t mmhub_v3_0_2_set_clockgating +ffffffff81e76730 t mmhub_v3_0_2_get_clockgating +ffffffff81e76760 t mmhub_v3_0_2_setup_vm_pt_regs +ffffffff81e768a0 t mmhub_v3_0_2_print_l2_protection_fault_status +ffffffff81e76aa0 t mmhub_v3_0_2_get_invalidate_req +ffffffff81e77000 t mmhub_v9_4_query_ras_error_count +ffffffff81e77150 t mmhub_v9_4_query_ras_error_status +ffffffff81e77230 t mmhub_v9_4_reset_ras_error_count +ffffffff81e77300 t mmhub_v9_4_get_fb_location +ffffffff81e77410 t mmhub_v9_4_init +ffffffff81e77560 t mmhub_v9_4_gart_enable +ffffffff81e789f0 t mmhub_v9_4_set_fault_enable_default +ffffffff81e78bd0 t mmhub_v9_4_gart_disable +ffffffff81e78f30 t mmhub_v9_4_set_clockgating +ffffffff81e793f0 t mmhub_v9_4_get_clockgating +ffffffff81e79520 t mmhub_v9_4_setup_vm_pt_regs +ffffffff81e79570 t mmhub_v9_4_setup_hubid_vm_pt_regs +ffffffff81e7a000 T xgpu_ai_mailbox_set_irq_funcs +ffffffff81e7a050 T xgpu_ai_mailbox_add_irq_id +ffffffff81e7a0e0 T xgpu_ai_mailbox_get_irq +ffffffff81e7a190 t xgpu_ai_mailbox_flr_work +ffffffff81e7a3a0 T xgpu_ai_mailbox_put_irq +ffffffff81e7a3e0 t xgpu_ai_request_full_gpu_access +ffffffff81e7a400 t xgpu_ai_release_full_gpu_access +ffffffff81e7a420 t xgpu_ai_request_init_data +ffffffff81e7a480 t xgpu_ai_request_reset +ffffffff81e7a530 t xgpu_ai_mailbox_trans_msg +ffffffff81e7a760 t xgpu_ai_set_mailbox_ack_irq +ffffffff81e7a7f0 t xgpu_ai_mailbox_ack_irq +ffffffff81e7a840 t xgpu_ai_set_mailbox_rcv_irq +ffffffff81e7a8d0 t xgpu_ai_mailbox_rcv_irq +ffffffff81e7a9b0 t xgpu_ai_send_access_requests +ffffffff81e7aaa0 t xgpu_ai_poll_msg +ffffffff81e7b000 T xgpu_nv_mailbox_set_irq_funcs +ffffffff81e7b050 T xgpu_nv_mailbox_add_irq_id +ffffffff81e7b0e0 T xgpu_nv_mailbox_get_irq +ffffffff81e7b190 t xgpu_nv_mailbox_flr_work +ffffffff81e7b3b0 T xgpu_nv_mailbox_put_irq +ffffffff81e7b3f0 t xgpu_nv_request_full_gpu_access +ffffffff81e7b410 t xgpu_nv_release_full_gpu_access +ffffffff81e7b430 t xgpu_nv_request_init_data +ffffffff81e7b450 t xgpu_nv_request_reset +ffffffff81e7b550 t xgpu_nv_mailbox_trans_msg +ffffffff81e7b6f0 t xgpu_nv_set_mailbox_ack_irq +ffffffff81e7b770 t xgpu_nv_mailbox_ack_irq +ffffffff81e7b7c0 t xgpu_nv_set_mailbox_rcv_irq +ffffffff81e7b840 t xgpu_nv_mailbox_rcv_irq +ffffffff81e7b8f0 t xgpu_nv_send_access_requests +ffffffff81e7c000 T xgpu_vi_init_golden_registers +ffffffff81e7c0c0 T xgpu_vi_mailbox_set_irq_funcs +ffffffff81e7c110 T xgpu_vi_mailbox_add_irq_id +ffffffff81e7c1a0 T xgpu_vi_mailbox_get_irq +ffffffff81e7c250 t xgpu_vi_mailbox_flr_work +ffffffff81e7c3a0 T xgpu_vi_mailbox_put_irq +ffffffff81e7c3e0 t xgpu_vi_request_full_gpu_access +ffffffff81e7c400 t xgpu_vi_release_full_gpu_access +ffffffff81e7c420 t xgpu_vi_request_reset +ffffffff81e7c440 t xgpu_vi_wait_reset_cmpl +ffffffff81e7c520 t xgpu_vi_set_mailbox_ack_irq +ffffffff81e7c5a0 t xgpu_vi_mailbox_ack_irq +ffffffff81e7c5f0 t xgpu_vi_set_mailbox_rcv_irq +ffffffff81e7c670 t xgpu_vi_mailbox_rcv_irq +ffffffff81e7c720 t xgpu_vi_mailbox_rcv_msg +ffffffff81e7c840 t xgpu_vi_send_access_requests +ffffffff81e7d000 t navi10_ih_early_init +ffffffff81e7d060 t navi10_ih_sw_init +ffffffff81e7d1d0 t navi10_ih_sw_fini +ffffffff81e7d210 t navi10_ih_hw_init +ffffffff81e7d640 t navi10_ih_hw_fini +ffffffff81e7d6a0 t navi10_ih_suspend +ffffffff81e7d700 t navi10_ih_resume +ffffffff81e7d710 t navi10_ih_is_idle +ffffffff81e7d740 t navi10_ih_wait_for_idle +ffffffff81e7d770 t navi10_ih_soft_reset +ffffffff81e7d7a0 t navi10_ih_set_clockgating_state +ffffffff81e7d8c0 t navi10_ih_set_powergating_state +ffffffff81e7d8f0 t navi10_ih_get_clockgating_state +ffffffff81e7d980 t navi10_ih_get_wptr +ffffffff81e7da90 t navi10_ih_set_rptr +ffffffff81e7db60 t navi10_ih_self_irq +ffffffff81e7dbe0 t navi10_ih_toggle_interrupts +ffffffff81e7dd70 t force_update_wptr_for_self_int +ffffffff81e7f000 t nbio_v2_3_get_hdp_flush_req_offset +ffffffff81e7f040 t nbio_v2_3_get_hdp_flush_done_offset +ffffffff81e7f080 t nbio_v2_3_get_pcie_index_offset +ffffffff81e7f0c0 t nbio_v2_3_get_pcie_data_offset +ffffffff81e7f100 t nbio_v2_3_get_rev_id +ffffffff81e7f160 t nbio_v2_3_mc_access_enable +ffffffff81e7f210 t nbio_v2_3_get_memsize +ffffffff81e7f280 t nbio_v2_3_sdma_doorbell_range +ffffffff81e7f320 t nbio_v2_3_vcn_doorbell_range +ffffffff81e7f3a0 t nbio_v2_3_enable_doorbell_aperture +ffffffff81e7f490 t nbio_v2_3_enable_doorbell_selfring_aperture +ffffffff81e7f5f0 t nbio_v2_3_ih_doorbell_range +ffffffff81e7f700 t nbio_v2_3_update_medium_grain_clock_gating +ffffffff81e7f7a0 t nbio_v2_3_update_medium_grain_light_sleep +ffffffff81e7f840 t nbio_v2_3_get_clockgating_state +ffffffff81e7f8c0 t nbio_v2_3_ih_control +ffffffff81e7fa10 t nbio_v2_3_init_registers +ffffffff81e7faa0 t nbio_v2_3_remap_hdp_registers +ffffffff81e7fbb0 t nbio_v2_3_enable_aspm +ffffffff81e7fc50 t nbio_v2_3_program_aspm +ffffffff81e802e0 t nbio_v2_3_apply_lc_spc_mode_wa +ffffffff81e80370 t nbio_v2_3_apply_l1_link_width_reconfig_wa +ffffffff81e803e0 t nbio_v2_3_clear_doorbell_interrupt +ffffffff81e81000 t nbio_v4_3_get_hdp_flush_req_offset +ffffffff81e81040 t nbio_v4_3_get_hdp_flush_done_offset +ffffffff81e81080 t nbio_v4_3_get_pcie_index_offset +ffffffff81e810b0 t nbio_v4_3_get_pcie_data_offset +ffffffff81e810f0 t nbio_v4_3_get_rev_id +ffffffff81e81170 t nbio_v4_3_mc_access_enable +ffffffff81e81220 t nbio_v4_3_get_memsize +ffffffff81e81290 t nbio_v4_3_sdma_doorbell_range +ffffffff81e81400 t nbio_v4_3_vcn_doorbell_range +ffffffff81e815b0 t nbio_v4_3_gc_doorbell_init +ffffffff81e816a0 t nbio_v4_3_enable_doorbell_aperture +ffffffff81e81790 t nbio_v4_3_enable_doorbell_selfring_aperture +ffffffff81e818f0 t nbio_v4_3_ih_doorbell_range +ffffffff81e81a10 t nbio_v4_3_update_medium_grain_clock_gating +ffffffff81e81b50 t nbio_v4_3_update_medium_grain_light_sleep +ffffffff81e81c80 t nbio_v4_3_get_clockgating_state +ffffffff81e81d90 t nbio_v4_3_ih_control +ffffffff81e81ee0 t nbio_v4_3_init_registers +ffffffff81e81ff0 t nbio_v4_3_remap_hdp_registers +ffffffff81e82100 t nbio_v4_3_program_aspm +ffffffff81e82da0 t nbio_v4_3_get_rom_offset +ffffffff81e82e30 t nbio_v4_3_sriov_sdma_doorbell_range +ffffffff81e82e60 t nbio_v4_3_sriov_vcn_doorbell_range +ffffffff81e82e90 t nbio_v4_3_sriov_gc_doorbell_init +ffffffff81e82ec0 t nbio_v4_3_sriov_ih_doorbell_range +ffffffff81e83000 t nbio_v6_1_get_hdp_flush_req_offset +ffffffff81e83040 t nbio_v6_1_get_hdp_flush_done_offset +ffffffff81e83080 t nbio_v6_1_get_pcie_index_offset +ffffffff81e830c0 t nbio_v6_1_get_pcie_data_offset +ffffffff81e83100 t nbio_v6_1_get_rev_id +ffffffff81e83180 t nbio_v6_1_mc_access_enable +ffffffff81e83230 t nbio_v6_1_get_memsize +ffffffff81e832a0 t nbio_v6_1_sdma_doorbell_range +ffffffff81e83330 t nbio_v6_1_enable_doorbell_aperture +ffffffff81e83420 t nbio_v6_1_enable_doorbell_selfring_aperture +ffffffff81e83580 t nbio_v6_1_ih_doorbell_range +ffffffff81e83690 t nbio_v6_1_update_medium_grain_clock_gating +ffffffff81e83730 t nbio_v6_1_update_medium_grain_light_sleep +ffffffff81e837d0 t nbio_v6_1_get_clockgating_state +ffffffff81e83850 t nbio_v6_1_ih_control +ffffffff81e839a0 t nbio_v6_1_init_registers +ffffffff81e83a70 t nbio_v6_1_remap_hdp_registers +ffffffff81e83b80 t nbio_v6_1_program_aspm +ffffffff81e84000 t nbio_v7_0_get_hdp_flush_req_offset +ffffffff81e84040 t nbio_v7_0_get_hdp_flush_done_offset +ffffffff81e84080 t nbio_v7_0_get_pcie_index_offset +ffffffff81e840c0 t nbio_v7_0_get_pcie_data_offset +ffffffff81e84100 t nbio_v7_0_get_rev_id +ffffffff81e84180 t nbio_v7_0_mc_access_enable +ffffffff81e84230 t nbio_v7_0_get_memsize +ffffffff81e842a0 t nbio_v7_0_sdma_doorbell_range +ffffffff81e84330 t nbio_v7_0_vcn_doorbell_range +ffffffff81e843b0 t nbio_v7_0_enable_doorbell_aperture +ffffffff81e844a0 t nbio_v7_0_enable_doorbell_selfring_aperture +ffffffff81e844d0 t nbio_v7_0_ih_doorbell_range +ffffffff81e845e0 t nbio_v7_0_update_medium_grain_clock_gating +ffffffff81e84710 t nbio_v7_0_update_medium_grain_light_sleep +ffffffff81e847b0 t nbio_v7_0_get_clockgating_state +ffffffff81e84830 t nbio_v7_0_ih_control +ffffffff81e84980 t nbio_v7_0_init_registers +ffffffff81e849d0 t nbio_v7_0_remap_hdp_registers +ffffffff81e84ae0 t nbio_7_0_read_syshub_ind_mmr +ffffffff81e84bb0 t nbio_7_0_write_syshub_ind_mmr +ffffffff81e85000 t nbio_v7_2_get_hdp_flush_req_offset +ffffffff81e85040 t nbio_v7_2_get_hdp_flush_done_offset +ffffffff81e85080 t nbio_v7_2_get_pcie_index_offset +ffffffff81e850c0 t nbio_v7_2_get_pcie_data_offset +ffffffff81e85100 t nbio_v7_2_get_pcie_port_index_offset +ffffffff81e85130 t nbio_v7_2_get_pcie_port_data_offset +ffffffff81e85170 t nbio_v7_2_get_rev_id +ffffffff81e85250 t nbio_v7_2_mc_access_enable +ffffffff81e85390 t nbio_v7_2_get_memsize +ffffffff81e85400 t nbio_v7_2_sdma_doorbell_range +ffffffff81e854a0 t nbio_v7_2_vcn_doorbell_range +ffffffff81e85520 t nbio_v7_2_enable_doorbell_aperture +ffffffff81e85600 t nbio_v7_2_enable_doorbell_selfring_aperture +ffffffff81e85760 t nbio_v7_2_ih_doorbell_range +ffffffff81e857f0 t nbio_v7_2_update_medium_grain_clock_gating +ffffffff81e858b0 t nbio_v7_2_update_medium_grain_light_sleep +ffffffff81e85a40 t nbio_v7_2_get_clockgating_state +ffffffff81e85ad0 t nbio_v7_2_ih_control +ffffffff81e85c20 t nbio_v7_2_init_registers +ffffffff81e85de0 t nbio_v7_2_remap_hdp_registers +ffffffff81e86000 t nbio_v7_4_query_ras_error_count +ffffffff81e861a0 t nbio_v7_4_handle_ras_controller_intr_no_bifring +ffffffff81e863e0 t nbio_v7_4_handle_ras_err_event_athub_intr_no_bifring +ffffffff81e86590 t nbio_v7_4_init_ras_controller_interrupt +ffffffff81e865d0 t nbio_v7_4_init_ras_err_event_athub_interrupt +ffffffff81e86610 t nbio_v7_4_get_hdp_flush_req_offset +ffffffff81e86650 t nbio_v7_4_get_hdp_flush_done_offset +ffffffff81e86690 t nbio_v7_4_get_pcie_index_offset +ffffffff81e866d0 t nbio_v7_4_get_pcie_data_offset +ffffffff81e86710 t nbio_v7_4_get_rev_id +ffffffff81e867d0 t nbio_v7_4_mc_access_enable +ffffffff81e86880 t nbio_v7_4_get_memsize +ffffffff81e868f0 t nbio_v7_4_sdma_doorbell_range +ffffffff81e869c0 t nbio_v7_4_vcn_doorbell_range +ffffffff81e86a60 t nbio_v7_4_enable_doorbell_aperture +ffffffff81e86b50 t nbio_v7_4_enable_doorbell_selfring_aperture +ffffffff81e86cb0 t nbio_v7_4_ih_doorbell_range +ffffffff81e86dc0 t nbio_v7_4_enable_doorbell_interrupt +ffffffff81e86f00 t nbio_v7_4_update_medium_grain_clock_gating +ffffffff81e86f30 t nbio_v7_4_update_medium_grain_light_sleep +ffffffff81e86fd0 t nbio_v7_4_get_clockgating_state +ffffffff81e87050 t nbio_v7_4_ih_control +ffffffff81e871a0 t nbio_v7_4_init_registers +ffffffff81e87290 t nbio_v7_4_remap_hdp_registers +ffffffff81e873a0 t nbio_v7_4_program_aspm +ffffffff81e877b0 t nbio_v7_4_set_ras_controller_irq_state +ffffffff81e87940 t nbio_v7_4_process_ras_controller_irq +ffffffff81e87970 t nbio_v7_4_set_ras_err_event_athub_irq_state +ffffffff81e87b00 t nbio_v7_4_process_err_event_athub_irq +ffffffff81e88000 t nbio_v7_7_get_hdp_flush_req_offset +ffffffff81e88040 t nbio_v7_7_get_hdp_flush_done_offset +ffffffff81e88080 t nbio_v7_7_get_pcie_index_offset +ffffffff81e880c0 t nbio_v7_7_get_pcie_data_offset +ffffffff81e88100 t nbio_v7_7_get_pcie_port_index_offset +ffffffff81e88130 t nbio_v7_7_get_pcie_port_data_offset +ffffffff81e88170 t nbio_v7_7_get_rev_id +ffffffff81e881f0 t nbio_v7_7_mc_access_enable +ffffffff81e882a0 t nbio_v7_7_get_memsize +ffffffff81e88310 t nbio_v7_7_sdma_doorbell_range +ffffffff81e883a0 t nbio_v7_7_vcn_doorbell_range +ffffffff81e88420 t nbio_v7_7_enable_doorbell_aperture +ffffffff81e88500 t nbio_v7_7_enable_doorbell_selfring_aperture +ffffffff81e88660 t nbio_v7_7_ih_doorbell_range +ffffffff81e88770 t nbio_v7_7_update_medium_grain_clock_gating +ffffffff81e888b0 t nbio_v7_7_update_medium_grain_light_sleep +ffffffff81e88ac0 t nbio_v7_7_get_clockgating_state +ffffffff81e88bd0 t nbio_v7_7_ih_control +ffffffff81e88d20 t nbio_v7_7_init_registers +ffffffff81e88e20 t nbio_v7_7_remap_hdp_registers +ffffffff81e89000 T nv_grbm_select +ffffffff81e890a0 T nv_set_virt_ops +ffffffff81e890e0 t nv_common_early_init +ffffffff81e894d0 t nv_common_late_init +ffffffff81e89540 t nv_common_sw_init +ffffffff81e89580 t nv_common_sw_fini +ffffffff81e895b0 t nv_common_hw_init +ffffffff81e896c0 t nv_common_hw_fini +ffffffff81e89720 t nv_common_suspend +ffffffff81e89780 t nv_common_resume +ffffffff81e897c0 t nv_common_is_idle +ffffffff81e897f0 t nv_common_wait_for_idle +ffffffff81e89820 t nv_common_soft_reset +ffffffff81e89850 t nv_common_set_clockgating_state +ffffffff81e89920 t nv_common_set_powergating_state +ffffffff81e89950 t nv_common_get_clockgating_state +ffffffff81e899c0 t nv_pcie_rreg +ffffffff81e89a20 t nv_pcie_wreg +ffffffff81e89a80 t nv_pcie_rreg64 +ffffffff81e89ae0 t nv_pcie_wreg64 +ffffffff81e89b40 t nv_didt_rreg +ffffffff81e89be0 t nv_didt_wreg +ffffffff81e89c60 t nv_read_disabled_bios +ffffffff81e89c90 t nv_read_register +ffffffff81e89d70 t nv_vga_set_state +ffffffff81e89da0 t nv_asic_reset +ffffffff81e89ee0 t nv_asic_reset_method +ffffffff81e89fd0 t nv_get_xclk +ffffffff81e8a000 t nv_set_uvd_clocks +ffffffff81e8a030 t nv_set_vce_clocks +ffffffff81e8a060 t nv_get_config_memsize +ffffffff81e8a080 t nv_need_full_reset +ffffffff81e8a0b0 t nv_init_doorbell_index +ffffffff81e8a1e0 t nv_need_reset_on_init +ffffffff81e8a270 t nv_get_pcie_replay_count +ffffffff81e8a2a0 t nv_pre_asic_init +ffffffff81e8a2d0 t nv_update_umd_stable_pstate +ffffffff81e8a390 t nv_query_video_codecs +ffffffff81e8b000 T psp_v10_0_set_psp_funcs +ffffffff81e8b030 t psp_v10_0_init_microcode +ffffffff81e8b2a0 t psp_v10_0_ring_init +ffffffff81e8b320 t psp_v10_0_ring_create +ffffffff81e8b630 t psp_v10_0_ring_stop +ffffffff81e8b820 t psp_v10_0_ring_destroy +ffffffff81e8b8a0 t psp_v10_0_mode1_reset +ffffffff81e8b8f0 t psp_v10_0_ring_get_wptr +ffffffff81e8b950 t psp_v10_0_ring_set_wptr +ffffffff81e8c000 T psp_v11_0_set_psp_funcs +ffffffff81e8c030 t psp_v11_0_init_microcode +ffffffff81e8c450 t psp_v11_0_bootloader_load_kdb +ffffffff81e8c470 t psp_v11_0_bootloader_load_spl +ffffffff81e8c490 t psp_v11_0_bootloader_load_sysdrv +ffffffff81e8c4b0 t psp_v11_0_bootloader_load_sos +ffffffff81e8c800 t psp_v11_0_ring_init +ffffffff81e8c880 t psp_v11_0_ring_create +ffffffff81e8cf10 t psp_v11_0_ring_stop +ffffffff81e8d130 t psp_v11_0_ring_destroy +ffffffff81e8d1b0 t psp_v11_0_mode1_reset +ffffffff81e8d2b0 t psp_v11_0_memory_training +ffffffff81e8d730 t psp_v11_0_ring_get_wptr +ffffffff81e8d780 t psp_v11_0_ring_set_wptr +ffffffff81e8d8c0 t psp_v11_0_load_usbc_pd_fw +ffffffff81e8dab0 t psp_v11_0_read_usbc_pd_fw +ffffffff81e8dbd0 t psp_v11_0_bootloader_load_component +ffffffff81e8dd90 t psp_v11_0_wait_for_bootloader +ffffffff81e8df60 t psp_v11_0_memory_training_send_msg +ffffffff81e8f000 T psp_v11_0_8_set_psp_funcs +ffffffff81e8f030 t psp_v11_0_8_ring_init +ffffffff81e8f0b0 t psp_v11_0_8_ring_create +ffffffff81e8f740 t psp_v11_0_8_ring_stop +ffffffff81e8fad0 t psp_v11_0_8_ring_destroy +ffffffff81e8fb50 t psp_v11_0_8_ring_get_wptr +ffffffff81e8fbc0 t psp_v11_0_8_ring_set_wptr +ffffffff81e90000 T psp_v12_0_set_psp_funcs +ffffffff81e90030 t psp_v12_0_init_microcode +ffffffff81e902a0 t psp_v12_0_bootloader_load_sysdrv +ffffffff81e905c0 t psp_v12_0_bootloader_load_sos +ffffffff81e90920 t psp_v12_0_ring_init +ffffffff81e90f00 t psp_v12_0_ring_create +ffffffff81e91460 t psp_v12_0_ring_stop +ffffffff81e91680 t psp_v12_0_ring_destroy +ffffffff81e91700 t psp_v12_0_mode1_reset +ffffffff81e91800 t psp_v12_0_ring_get_wptr +ffffffff81e91870 t psp_v12_0_ring_set_wptr +ffffffff81e92000 T psp_v13_0_set_psp_funcs +ffffffff81e92030 t psp_v13_0_init_microcode +ffffffff81e92160 t psp_v13_0_bootloader_load_kdb +ffffffff81e92180 t psp_v13_0_bootloader_load_spl +ffffffff81e921a0 t psp_v13_0_bootloader_load_sysdrv +ffffffff81e921c0 t psp_v13_0_bootloader_load_soc_drv +ffffffff81e921e0 t psp_v13_0_bootloader_load_intf_drv +ffffffff81e92200 t psp_v13_0_bootloader_load_dbg_drv +ffffffff81e92220 t psp_v13_0_bootloader_load_ras_drv +ffffffff81e92240 t psp_v13_0_bootloader_load_sos +ffffffff81e925a0 t psp_v13_0_ring_init +ffffffff81e92620 t psp_v13_0_ring_create +ffffffff81e92cb0 t psp_v13_0_ring_stop +ffffffff81e93040 t psp_v13_0_ring_destroy +ffffffff81e930c0 t psp_v13_0_memory_training +ffffffff81e93500 t psp_v13_0_ring_get_wptr +ffffffff81e93570 t psp_v13_0_ring_set_wptr +ffffffff81e93670 t psp_v13_0_load_usbc_pd_fw +ffffffff81e93860 t psp_v13_0_read_usbc_pd_fw +ffffffff81e93980 t psp_v13_0_update_spirom +ffffffff81e93b60 t psp_v13_0_vbflash_status +ffffffff81e93bc0 t psp_v13_0_bootloader_load_component +ffffffff81e93d90 t psp_v13_0_wait_for_bootloader +ffffffff81e93f60 t psp_v13_0_memory_training_send_msg +ffffffff81e940c0 t psp_v13_0_exec_spi_cmd +ffffffff81e95000 T psp_v13_0_4_set_psp_funcs +ffffffff81e95030 t psp_v13_0_4_init_microcode +ffffffff81e95100 t psp_v13_0_4_bootloader_load_kdb +ffffffff81e95120 t psp_v13_0_4_bootloader_load_spl +ffffffff81e95140 t psp_v13_0_4_bootloader_load_sysdrv +ffffffff81e95160 t psp_v13_0_4_bootloader_load_soc_drv +ffffffff81e95180 t psp_v13_0_4_bootloader_load_intf_drv +ffffffff81e951a0 t psp_v13_0_4_bootloader_load_dbg_drv +ffffffff81e951c0 t psp_v13_0_4_bootloader_load_sos +ffffffff81e95530 t psp_v13_0_4_ring_init +ffffffff81e955b0 t psp_v13_0_4_ring_create +ffffffff81e95c50 t psp_v13_0_4_ring_stop +ffffffff81e95fe0 t psp_v13_0_4_ring_destroy +ffffffff81e96060 t psp_v13_0_4_ring_get_wptr +ffffffff81e960d0 t psp_v13_0_4_ring_set_wptr +ffffffff81e961d0 t psp_v13_0_4_bootloader_load_component +ffffffff81e963a0 t psp_v13_0_4_wait_for_bootloader +ffffffff81e97000 T psp_v3_1_set_psp_funcs +ffffffff81e97030 t psp_v3_1_init_microcode +ffffffff81e970f0 t psp_v3_1_bootloader_load_sysdrv +ffffffff81e97410 t psp_v3_1_bootloader_load_sos +ffffffff81e97770 t psp_v3_1_ring_init +ffffffff81e977f0 t psp_v3_1_ring_create +ffffffff81e982f0 t psp_v3_1_ring_stop +ffffffff81e98510 t psp_v3_1_ring_destroy +ffffffff81e98590 t psp_v3_1_smu_reload_quirk +ffffffff81e985e0 t psp_v3_1_mode1_reset +ffffffff81e986e0 t psp_v3_1_ring_get_wptr +ffffffff81e98730 t psp_v3_1_ring_set_wptr +ffffffff81e99000 t sdma_v2_4_early_init +ffffffff81e990e0 t sdma_v2_4_sw_init +ffffffff81e99470 t sdma_v2_4_sw_fini +ffffffff81e99550 t sdma_v2_4_hw_init +ffffffff81e99910 t sdma_v2_4_hw_fini +ffffffff81e99950 t sdma_v2_4_suspend +ffffffff81e99990 t sdma_v2_4_resume +ffffffff81e999a0 t sdma_v2_4_is_idle +ffffffff81e999e0 t sdma_v2_4_wait_for_idle +ffffffff81e99a80 t sdma_v2_4_soft_reset +ffffffff81e99bc0 t sdma_v2_4_set_clockgating_state +ffffffff81e99bf0 t sdma_v2_4_set_powergating_state +ffffffff81e99c20 t sdma_v2_4_ring_get_rptr +ffffffff81e99c60 t sdma_v2_4_ring_get_wptr +ffffffff81e99cc0 t sdma_v2_4_ring_set_wptr +ffffffff81e99d00 t sdma_v2_4_ring_emit_ib +ffffffff81e99fb0 t sdma_v2_4_ring_emit_fence +ffffffff81e9a3b0 t sdma_v2_4_ring_emit_pipeline_sync +ffffffff81e9a630 t sdma_v2_4_ring_emit_vm_flush +ffffffff81e9a8b0 t sdma_v2_4_ring_emit_hdp_flush +ffffffff81e9ab30 t sdma_v2_4_ring_test_ring +ffffffff81e9ae10 t sdma_v2_4_ring_test_ib +ffffffff81e9aff0 t sdma_v2_4_ring_insert_nop +ffffffff81e9b120 t sdma_v2_4_ring_pad_ib +ffffffff81e9b250 t sdma_v2_4_ring_emit_wreg +ffffffff81e9b3a0 t sdma_v2_4_emit_copy_buffer +ffffffff81e9b460 t sdma_v2_4_emit_fill_buffer +ffffffff81e9b4f0 t sdma_v2_4_vm_copy_pte +ffffffff81e9b5b0 t sdma_v2_4_vm_write_pte +ffffffff81e9b680 t sdma_v2_4_vm_set_pte_pde +ffffffff81e9b780 t sdma_v2_4_set_trap_irq_state +ffffffff81e9b840 t sdma_v2_4_process_trap_irq +ffffffff81e9b8e0 t sdma_v2_4_process_illegal_inst_irq +ffffffff81e9b960 t sdma_v2_4_enable +ffffffff81e9c000 t sdma_v3_0_early_init +ffffffff81e9c150 t sdma_v3_0_sw_init +ffffffff81e9c500 t sdma_v3_0_sw_fini +ffffffff81e9c5e0 t sdma_v3_0_hw_init +ffffffff81e9c710 t sdma_v3_0_hw_fini +ffffffff81e9c760 t sdma_v3_0_suspend +ffffffff81e9c7b0 t sdma_v3_0_resume +ffffffff81e9c7c0 t sdma_v3_0_is_idle +ffffffff81e9c800 t sdma_v3_0_wait_for_idle +ffffffff81e9c8a0 t sdma_v3_0_check_soft_reset +ffffffff81e9c900 t sdma_v3_0_pre_soft_reset +ffffffff81e9c950 t sdma_v3_0_soft_reset +ffffffff81e9ca20 t sdma_v3_0_post_soft_reset +ffffffff81e9ca70 t sdma_v3_0_set_clockgating_state +ffffffff81e9ccd0 t sdma_v3_0_set_powergating_state +ffffffff81e9cd00 t sdma_v3_0_get_clockgating_state +ffffffff81e9cd80 t sdma_v3_0_ring_get_rptr +ffffffff81e9cdc0 t sdma_v3_0_ring_get_wptr +ffffffff81e9ce40 t sdma_v3_0_ring_set_wptr +ffffffff81e9cef0 t sdma_v3_0_ring_emit_ib +ffffffff81e9d1a0 t sdma_v3_0_ring_emit_fence +ffffffff81e9d5a0 t sdma_v3_0_ring_emit_pipeline_sync +ffffffff81e9d820 t sdma_v3_0_ring_emit_vm_flush +ffffffff81e9daa0 t sdma_v3_0_ring_emit_hdp_flush +ffffffff81e9dd20 t sdma_v3_0_ring_test_ring +ffffffff81e9e000 t sdma_v3_0_ring_test_ib +ffffffff81e9e1e0 t sdma_v3_0_ring_insert_nop +ffffffff81e9e310 t sdma_v3_0_ring_pad_ib +ffffffff81e9e440 t sdma_v3_0_ring_emit_wreg +ffffffff81e9e590 t sdma_v3_0_emit_copy_buffer +ffffffff81e9e650 t sdma_v3_0_emit_fill_buffer +ffffffff81e9e6e0 t sdma_v3_0_vm_copy_pte +ffffffff81e9e7a0 t sdma_v3_0_vm_write_pte +ffffffff81e9e870 t sdma_v3_0_vm_set_pte_pde +ffffffff81e9e970 t sdma_v3_0_set_trap_irq_state +ffffffff81e9ea30 t sdma_v3_0_process_trap_irq +ffffffff81e9ead0 t sdma_v3_0_process_illegal_inst_irq +ffffffff81e9eb50 t sdma_v3_0_ctx_switch_enable +ffffffff81e9ece0 t sdma_v3_0_enable +ffffffff81e9ee50 t sdma_v3_0_gfx_resume +ffffffff81ea0000 t sdma_v4_0_early_init +ffffffff81ea0580 t sdma_v4_0_late_init +ffffffff81ea0820 t sdma_v4_0_sw_init +ffffffff81ea0ba0 t sdma_v4_0_sw_fini +ffffffff81ea0c60 t sdma_v4_0_hw_init +ffffffff81ea3c00 t sdma_v4_0_hw_fini +ffffffff81ea3cb0 t sdma_v4_0_suspend +ffffffff81ea3d00 t sdma_v4_0_resume +ffffffff81ea3d80 t sdma_v4_0_is_idle +ffffffff81ea3eb0 t sdma_v4_0_wait_for_idle +ffffffff81ea4050 t sdma_v4_0_soft_reset +ffffffff81ea4080 t sdma_v4_0_set_clockgating_state +ffffffff81ea4580 t sdma_v4_0_set_powergating_state +ffffffff81ea4640 t sdma_v4_0_get_clockgating_state +ffffffff81ea46e0 t sdma_v4_0_query_ras_error_count +ffffffff81ea48b0 t sdma_v4_0_reset_ras_error_count +ffffffff81ea4a00 t sdma_v4_0_ring_get_rptr +ffffffff81ea4a60 t sdma_v4_0_ring_get_wptr +ffffffff81ea4c50 t sdma_v4_0_ring_set_wptr +ffffffff81ea4ed0 t sdma_v4_0_ring_emit_ib +ffffffff81ea5180 t sdma_v4_0_ring_emit_fence +ffffffff81ea55b0 t sdma_v4_0_ring_emit_pipeline_sync +ffffffff81ea5610 t sdma_v4_0_ring_emit_vm_flush +ffffffff81ea5630 t sdma_v4_0_ring_emit_hdp_flush +ffffffff81ea56d0 t sdma_v4_0_ring_test_ring +ffffffff81ea59b0 t sdma_v4_0_ring_test_ib +ffffffff81ea5b90 t sdma_v4_0_ring_insert_nop +ffffffff81ea5cc0 t sdma_v4_0_ring_pad_ib +ffffffff81ea5df0 t sdma_v4_0_ring_emit_wreg +ffffffff81ea5f40 t sdma_v4_0_ring_emit_reg_wait +ffffffff81ea5f90 t sdma_v4_0_wait_reg_mem +ffffffff81ea62c0 t sdma_v4_0_page_ring_get_wptr +ffffffff81ea6470 t sdma_v4_0_page_ring_set_wptr +ffffffff81ea6630 t sdma_v4_0_emit_copy_buffer +ffffffff81ea66f0 t sdma_v4_0_emit_fill_buffer +ffffffff81ea6780 t sdma_v4_0_vm_copy_pte +ffffffff81ea6840 t sdma_v4_0_vm_write_pte +ffffffff81ea6910 t sdma_v4_0_vm_set_pte_pde +ffffffff81ea6a10 t sdma_v4_0_set_trap_irq_state +ffffffff81ea6bb0 t sdma_v4_0_process_trap_irq +ffffffff81ea6cf0 t sdma_v4_0_process_illegal_inst_irq +ffffffff81ea6e10 t sdma_v4_0_set_ecc_irq_state +ffffffff81ea6fb0 t sdma_v4_0_process_vm_hole_irq +ffffffff81ea70f0 t sdma_v4_0_process_doorbell_invalid_irq +ffffffff81ea7230 t sdma_v4_0_process_pool_timeout_irq +ffffffff81ea7370 t sdma_v4_0_process_srbm_write_irq +ffffffff81ea74b0 t sdma_v4_0_process_ras_data_cb +ffffffff81ea7530 t sdma_v4_0_ctx_switch_enable +ffffffff81ea7be0 t sdma_v4_0_enable +ffffffff81ea8180 t sdma_v4_0_gfx_enable +ffffffff81ea9000 t sdma_v4_4_query_ras_error_count +ffffffff81ea9270 t sdma_v4_4_reset_ras_error_count +ffffffff81eaa000 t sdma_v5_0_early_init +ffffffff81eaa170 t sdma_v5_0_sw_init +ffffffff81eaa410 t sdma_v5_0_sw_fini +ffffffff81eaa4a0 t sdma_v5_0_hw_init +ffffffff81eab750 t sdma_v5_0_hw_fini +ffffffff81eab7b0 t sdma_v5_0_suspend +ffffffff81eab810 t sdma_v5_0_resume +ffffffff81eab820 t sdma_v5_0_is_idle +ffffffff81eab8b0 t sdma_v5_0_wait_for_idle +ffffffff81eab970 t sdma_v5_0_soft_reset +ffffffff81eab9a0 t sdma_v5_0_set_clockgating_state +ffffffff81eabba0 t sdma_v5_0_set_powergating_state +ffffffff81eabbd0 t sdma_v5_0_get_clockgating_state +ffffffff81eabc70 t sdma_v5_0_ring_get_rptr +ffffffff81eabcd0 t sdma_v5_0_ring_get_wptr +ffffffff81eabe70 t sdma_v5_0_ring_set_wptr +ffffffff81eac1d0 t sdma_v5_0_ring_emit_ib +ffffffff81eac490 t sdma_v5_0_ring_emit_fence +ffffffff81eac900 t sdma_v5_0_ring_emit_pipeline_sync +ffffffff81eacb80 t sdma_v5_0_ring_emit_vm_flush +ffffffff81eacba0 t sdma_v5_0_ring_emit_hdp_flush +ffffffff81eace40 t sdma_v5_0_ring_test_ring +ffffffff81ead210 t sdma_v5_0_ring_test_ib +ffffffff81ead540 t sdma_v5_0_ring_insert_nop +ffffffff81ead670 t sdma_v5_0_ring_pad_ib +ffffffff81ead7a0 t sdma_v5_0_ring_init_cond_exec +ffffffff81ead9d0 t sdma_v5_0_ring_patch_cond_exec +ffffffff81eada90 t sdma_v5_0_ring_emit_wreg +ffffffff81eadbe0 t sdma_v5_0_ring_emit_reg_wait +ffffffff81eade60 t sdma_v5_0_ring_emit_reg_write_reg_wait +ffffffff81eadee0 t sdma_v5_0_ring_preempt_ib +ffffffff81eae020 t sdma_v5_0_ring_emit_mem_sync +ffffffff81eae230 t sdma_v5_0_emit_copy_buffer +ffffffff81eae2f0 t sdma_v5_0_emit_fill_buffer +ffffffff81eae380 t sdma_v5_0_vm_copy_pte +ffffffff81eae440 t sdma_v5_0_vm_write_pte +ffffffff81eae510 t sdma_v5_0_vm_set_pte_pde +ffffffff81eae610 t sdma_v5_0_set_trap_irq_state +ffffffff81eae6a0 t sdma_v5_0_process_trap_irq +ffffffff81eae7b0 t sdma_v5_0_process_illegal_inst_irq +ffffffff81eae7e0 t sdma_v5_0_mqd_init +ffffffff81eae8c0 t sdma_v5_0_ctx_switch_enable +ffffffff81eaebc0 t sdma_v5_0_enable +ffffffff81eaf000 t sdma_v5_2_early_init +ffffffff81eaf170 t sdma_v5_2_sw_init +ffffffff81eaf3a0 t sdma_v5_2_sw_fini +ffffffff81eaf430 t sdma_v5_2_hw_init +ffffffff81eaf770 t sdma_v5_2_hw_fini +ffffffff81eaf7d0 t sdma_v5_2_suspend +ffffffff81eaf830 t sdma_v5_2_resume +ffffffff81eaf840 t sdma_v5_2_is_idle +ffffffff81eaf900 t sdma_v5_2_wait_for_idle +ffffffff81eafa00 t sdma_v5_2_soft_reset +ffffffff81eafca0 t sdma_v5_2_set_clockgating_state +ffffffff81eaffc0 t sdma_v5_2_set_powergating_state +ffffffff81eafff0 t sdma_v5_2_get_clockgating_state +ffffffff81eb0080 t sdma_v5_2_ring_get_rptr +ffffffff81eb00e0 t sdma_v5_2_ring_get_wptr +ffffffff81eb0220 t sdma_v5_2_ring_set_wptr +ffffffff81eb03e0 t sdma_v5_2_ring_emit_ib +ffffffff81eb06a0 t sdma_v5_2_ring_emit_fence +ffffffff81eb0b10 t sdma_v5_2_ring_emit_pipeline_sync +ffffffff81eb0d90 t sdma_v5_2_ring_emit_vm_flush +ffffffff81eb0db0 t sdma_v5_2_ring_emit_hdp_flush +ffffffff81eb1050 t sdma_v5_2_ring_test_ring +ffffffff81eb1420 t sdma_v5_2_ring_test_ib +ffffffff81eb1750 t sdma_v5_2_ring_insert_nop +ffffffff81eb1880 t sdma_v5_2_ring_pad_ib +ffffffff81eb19b0 t sdma_v5_2_ring_init_cond_exec +ffffffff81eb1be0 t sdma_v5_2_ring_patch_cond_exec +ffffffff81eb1ca0 t sdma_v5_2_ring_emit_wreg +ffffffff81eb1df0 t sdma_v5_2_ring_emit_reg_wait +ffffffff81eb2070 t sdma_v5_2_ring_emit_reg_write_reg_wait +ffffffff81eb20f0 t sdma_v5_2_ring_preempt_ib +ffffffff81eb2260 t sdma_v5_2_ring_emit_mem_sync +ffffffff81eb2470 t sdma_v5_2_emit_copy_buffer +ffffffff81eb2530 t sdma_v5_2_emit_fill_buffer +ffffffff81eb25c0 t sdma_v5_2_vm_copy_pte +ffffffff81eb2680 t sdma_v5_2_vm_write_pte +ffffffff81eb2750 t sdma_v5_2_vm_set_pte_pde +ffffffff81eb2850 t sdma_v5_2_set_trap_irq_state +ffffffff81eb2910 t sdma_v5_2_process_trap_irq +ffffffff81eb2a50 t sdma_v5_2_process_illegal_inst_irq +ffffffff81eb2a80 t sdma_v5_2_mqd_init +ffffffff81eb2b60 t sdma_v5_2_ctx_switch_enable +ffffffff81eb2f60 t sdma_v5_2_enable +ffffffff81eb3370 t sdma_v5_2_gfx_resume +ffffffff81eb5000 t sdma_v6_0_early_init +ffffffff81eb5140 t sdma_v6_0_sw_init +ffffffff81eb5320 t sdma_v6_0_sw_fini +ffffffff81eb53b0 t sdma_v6_0_hw_init +ffffffff81eb53c0 t sdma_v6_0_hw_fini +ffffffff81eb5410 t sdma_v6_0_suspend +ffffffff81eb5460 t sdma_v6_0_resume +ffffffff81eb5470 t sdma_v6_0_is_idle +ffffffff81eb5500 t sdma_v6_0_wait_for_idle +ffffffff81eb55c0 t sdma_v6_0_check_soft_reset +ffffffff81eb5680 t sdma_v6_0_soft_reset +ffffffff81eb5b20 t sdma_v6_0_set_clockgating_state +ffffffff81eb5b50 t sdma_v6_0_set_powergating_state +ffffffff81eb5b80 t sdma_v6_0_get_clockgating_state +ffffffff81eb5bb0 t sdma_v6_0_ring_get_rptr +ffffffff81eb5c10 t sdma_v6_0_ring_get_wptr +ffffffff81eb5c80 t sdma_v6_0_ring_set_wptr +ffffffff81eb5fe0 t sdma_v6_0_ring_emit_ib +ffffffff81eb62a0 t sdma_v6_0_ring_emit_fence +ffffffff81eb6710 t sdma_v6_0_ring_emit_pipeline_sync +ffffffff81eb6990 t sdma_v6_0_ring_emit_vm_flush +ffffffff81eb69b0 t sdma_v6_0_ring_emit_hdp_flush +ffffffff81eb6c50 t sdma_v6_0_ring_test_ring +ffffffff81eb7020 t sdma_v6_0_ring_test_ib +ffffffff81eb7350 t sdma_v6_0_ring_insert_nop +ffffffff81eb7480 t sdma_v6_0_ring_pad_ib +ffffffff81eb75b0 t sdma_v6_0_ring_init_cond_exec +ffffffff81eb77e0 t sdma_v6_0_ring_patch_cond_exec +ffffffff81eb78a0 t sdma_v6_0_ring_emit_wreg +ffffffff81eb79f0 t sdma_v6_0_ring_emit_reg_wait +ffffffff81eb7c70 t sdma_v6_0_ring_emit_reg_write_reg_wait +ffffffff81eb7cf0 t sdma_v6_0_ring_preempt_ib +ffffffff81eb7e40 t sdma_v6_0_ring_emit_mem_sync +ffffffff81eb8050 t sdma_v6_0_emit_copy_buffer +ffffffff81eb8110 t sdma_v6_0_emit_fill_buffer +ffffffff81eb81a0 t sdma_v6_0_vm_copy_pte +ffffffff81eb8260 t sdma_v6_0_vm_write_pte +ffffffff81eb8330 t sdma_v6_0_vm_set_pte_pde +ffffffff81eb8430 t sdma_v6_0_set_trap_irq_state +ffffffff81eb84c0 t sdma_v6_0_process_trap_irq +ffffffff81eb85f0 t sdma_v6_0_process_illegal_inst_irq +ffffffff81eb8620 t sdma_v6_0_mqd_init +ffffffff81eb8740 t sdma_v6_0_start +ffffffff81eb89c0 t sdma_v6_0_enable +ffffffff81eb8b40 t sdma_v6_0_gfx_resume +ffffffff81eb9bc0 t sdma_v6_0_gfx_stop +ffffffff81eba000 T sienna_cichlid_reset_init +ffffffff81eba0c0 t sienna_cichlid_async_reset +ffffffff81eba120 t sienna_cichlid_get_reset_handler +ffffffff81eba180 T sienna_cichlid_reset_fini +ffffffff81eba1e0 t sienna_cichlid_mode2_prepare_hwcontext +ffffffff81eba330 t sienna_cichlid_mode2_perform_reset +ffffffff81eba3b0 t sienna_cichlid_mode2_restore_hwcontext +ffffffff81eba6b0 t sienna_cichlid_mode2_reset +ffffffff81ebb000 T smu_v11_0_i2c_control_init +ffffffff81ebb0d0 T smu_v11_0_i2c_control_fini +ffffffff81ebb110 t smu_v11_0_i2c_xfer +ffffffff81ebc1f0 t smu_v11_0_i2c_func +ffffffff81ebc220 t smu_v11_0_i2c_enable +ffffffff81ebc360 t smu_v11_0_i2c_abort +ffffffff81ebc460 t lock_bus +ffffffff81ebc500 t trylock_bus +ffffffff81ebc550 t unlock_bus +ffffffff81ebd000 t smuio_v11_0_get_rom_index_offset +ffffffff81ebd040 t smuio_v11_0_get_rom_data_offset +ffffffff81ebd080 t smuio_v11_0_update_rom_clock_gating +ffffffff81ebd1c0 t smuio_v11_0_get_clock_gating_state +ffffffff81ebe000 t smuio_v11_0_6_get_rom_index_offset +ffffffff81ebe040 t smuio_v11_0_6_get_rom_data_offset +ffffffff81ebe080 t smuio_v11_0_6_update_rom_clock_gating +ffffffff81ebe1c0 t smuio_v11_0_6_get_clock_gating_state +ffffffff81ebf000 t smuio_v13_0_get_rom_index_offset +ffffffff81ebf040 t smuio_v13_0_get_rom_data_offset +ffffffff81ebf080 t smuio_v13_0_update_rom_clock_gating +ffffffff81ebf1c0 t smuio_v13_0_get_clock_gating_state +ffffffff81ebf260 t smuio_v13_0_get_die_id +ffffffff81ebf2e0 t smuio_v13_0_get_socket_id +ffffffff81ebf360 t smuio_v13_0_is_host_gpu_xgmi_supported +ffffffff81ec0000 t smuio_v13_0_6_get_rom_index_offset +ffffffff81ec0040 t smuio_v13_0_6_get_rom_data_offset +ffffffff81ec1000 t smuio_v9_0_get_rom_index_offset +ffffffff81ec1040 t smuio_v9_0_get_rom_data_offset +ffffffff81ec1080 t smuio_v9_0_update_rom_clock_gating +ffffffff81ec11c0 t smuio_v9_0_get_clock_gating_state +ffffffff81ec2000 T soc15_grbm_select +ffffffff81ec2080 T soc15_program_register_sequence +ffffffff81ec2280 T soc15_set_virt_ops +ffffffff81ec22f0 t soc15_common_early_init +ffffffff81ec2680 t soc15_common_late_init +ffffffff81ec26c0 t soc15_common_sw_init +ffffffff81ec2720 t soc15_common_sw_fini +ffffffff81ec2770 t soc15_common_hw_init +ffffffff81ec28a0 t soc15_common_hw_fini +ffffffff81ec2970 t soc15_common_suspend +ffffffff81ec29b0 t soc15_common_resume +ffffffff81ec29f0 t soc15_common_is_idle +ffffffff81ec2a20 t soc15_common_wait_for_idle +ffffffff81ec2a50 t soc15_common_soft_reset +ffffffff81ec2a80 t soc15_common_set_clockgating_state +ffffffff81ec2dc0 t soc15_common_set_powergating_state +ffffffff81ec2df0 t soc15_common_get_clockgating_state +ffffffff81ec2ed0 t soc15_pcie_rreg +ffffffff81ec2f30 t soc15_pcie_wreg +ffffffff81ec2f90 t soc15_pcie_rreg64 +ffffffff81ec2ff0 t soc15_pcie_wreg64 +ffffffff81ec3050 t soc15_uvd_ctx_rreg +ffffffff81ec30f0 t soc15_uvd_ctx_wreg +ffffffff81ec3180 t soc15_didt_rreg +ffffffff81ec3220 t soc15_didt_wreg +ffffffff81ec32a0 t soc15_gc_cac_rreg +ffffffff81ec33c0 t soc15_gc_cac_wreg +ffffffff81ec34d0 t soc15_se_cac_rreg +ffffffff81ec35f0 t soc15_se_cac_wreg +ffffffff81ec3700 t soc15_read_disabled_bios +ffffffff81ec3730 t soc15_read_register +ffffffff81ec3830 t soc15_vga_set_state +ffffffff81ec3860 t soc15_asic_reset +ffffffff81ec3960 t soc15_asic_reset_method +ffffffff81ec3ae0 t soc15_get_xclk +ffffffff81ec3b30 t soc15_set_uvd_clocks +ffffffff81ec3b60 t soc15_set_vce_clocks +ffffffff81ec3b90 t soc15_get_config_memsize +ffffffff81ec3bb0 t soc15_need_full_reset +ffffffff81ec3be0 t soc15_get_pcie_usage +ffffffff81ec3d10 t soc15_need_reset_on_init +ffffffff81ec3db0 t soc15_get_pcie_replay_count +ffffffff81ec3e20 t soc15_supports_baco +ffffffff81ec3e80 t soc15_pre_asic_init +ffffffff81ec3e90 t soc15_query_video_codecs +ffffffff81ec3f40 t vega20_get_pcie_usage +ffffffff81ec5000 T soc21_grbm_select +ffffffff81ec5080 t soc21_common_early_init +ffffffff81ec52a0 t soc21_common_late_init +ffffffff81ec52d0 t soc21_common_sw_init +ffffffff81ec5300 t soc21_common_sw_fini +ffffffff81ec5330 t soc21_common_hw_init +ffffffff81ec5400 t soc21_common_hw_fini +ffffffff81ec5460 t soc21_common_suspend +ffffffff81ec54c0 t soc21_common_resume +ffffffff81ec5590 t soc21_common_is_idle +ffffffff81ec55c0 t soc21_common_wait_for_idle +ffffffff81ec55f0 t soc21_common_soft_reset +ffffffff81ec5620 t soc21_common_set_clockgating_state +ffffffff81ec56d0 t soc21_common_set_powergating_state +ffffffff81ec5730 t soc21_common_get_clockgating_state +ffffffff81ec5780 t soc21_pcie_rreg +ffffffff81ec57e0 t soc21_pcie_wreg +ffffffff81ec5840 t soc21_pcie_rreg64 +ffffffff81ec58a0 t soc21_pcie_wreg64 +ffffffff81ec5900 t soc21_didt_rreg +ffffffff81ec59a0 t soc21_didt_wreg +ffffffff81ec5a20 t soc21_read_disabled_bios +ffffffff81ec5a50 t soc21_read_register +ffffffff81ec5b40 t soc21_vga_set_state +ffffffff81ec5b70 t soc21_asic_reset +ffffffff81ec5c50 t soc21_asic_reset_method +ffffffff81ec5d10 t soc21_get_xclk +ffffffff81ec5d40 t soc21_set_uvd_clocks +ffffffff81ec5d70 t soc21_set_vce_clocks +ffffffff81ec5da0 t soc21_get_config_memsize +ffffffff81ec5dc0 t soc21_need_full_reset +ffffffff81ec5e20 t soc21_init_doorbell_index +ffffffff81ec5f40 t soc21_need_reset_on_init +ffffffff81ec5fd0 t soc21_get_pcie_replay_count +ffffffff81ec6000 t soc21_pre_asic_init +ffffffff81ec6030 t soc21_update_umd_stable_pstate +ffffffff81ec60a0 t soc21_query_video_codecs +ffffffff81ec7000 t tonga_ih_early_init +ffffffff81ec7050 t tonga_ih_sw_init +ffffffff81ec70d0 t tonga_ih_sw_fini +ffffffff81ec7110 t tonga_ih_hw_init +ffffffff81ec7300 t tonga_ih_hw_fini +ffffffff81ec73a0 t tonga_ih_suspend +ffffffff81ec7440 t tonga_ih_resume +ffffffff81ec7480 t tonga_ih_is_idle +ffffffff81ec74d0 t tonga_ih_wait_for_idle +ffffffff81ec7570 t tonga_ih_check_soft_reset +ffffffff81ec75d0 t tonga_ih_pre_soft_reset +ffffffff81ec7680 t tonga_ih_soft_reset +ffffffff81ec7750 t tonga_ih_post_soft_reset +ffffffff81ec7790 t tonga_ih_set_clockgating_state +ffffffff81ec77c0 t tonga_ih_set_powergating_state +ffffffff81ec77f0 t tonga_ih_get_wptr +ffffffff81ec78e0 t tonga_ih_decode_iv +ffffffff81ec7960 t tonga_ih_set_rptr +ffffffff81ec8000 t umc_v6_0_init_registers +ffffffff81ec9000 t umc_v6_1_query_ras_error_count +ffffffff81ec94e0 t umc_v6_1_query_ras_error_address +ffffffff81ec97c0 t umc_v6_1_err_cnt_init +ffffffff81eca000 t umc_v6_7_query_ras_error_count +ffffffff81eca410 t umc_v6_7_query_ras_error_address +ffffffff81eca590 t umc_v6_7_query_ras_poison_mode +ffffffff81eca5f0 t umc_v6_7_convert_error_address +ffffffff81eca8f0 t umc_v6_7_ecc_info_query_ras_error_count +ffffffff81ecab30 t umc_v6_7_ecc_info_query_ras_error_address +ffffffff81ecb000 t umc_v8_10_query_ras_error_count +ffffffff81ecb280 t umc_v8_10_query_ras_error_address +ffffffff81ecb5b0 t umc_v8_10_err_cnt_init +ffffffff81ecb730 t umc_v8_10_query_ras_poison_mode +ffffffff81ecc000 t umc_v8_7_query_ras_error_count +ffffffff81ecc310 t umc_v8_7_query_ras_error_address +ffffffff81ecc4c0 t umc_v8_7_err_cnt_init +ffffffff81ecc610 t umc_v8_7_ecc_info_query_ras_error_count +ffffffff81ecc740 t umc_v8_7_ecc_info_query_ras_error_address +ffffffff81ecd000 t uvd_v5_0_early_init +ffffffff81ecd050 t uvd_v5_0_sw_init +ffffffff81ecd140 t uvd_v5_0_sw_fini +ffffffff81ecd190 t uvd_v5_0_hw_init +ffffffff81ecd6a0 t uvd_v5_0_hw_fini +ffffffff81ecd720 t uvd_v5_0_suspend +ffffffff81ecd820 t uvd_v5_0_resume +ffffffff81ecd870 t uvd_v5_0_is_idle +ffffffff81ecd8c0 t uvd_v5_0_wait_for_idle +ffffffff81ecd950 t uvd_v5_0_soft_reset +ffffffff81ecd9f0 t uvd_v5_0_set_clockgating_state +ffffffff81ecdb90 t uvd_v5_0_set_powergating_state +ffffffff81ecdbd0 t uvd_v5_0_get_clockgating_state +ffffffff81ecdc50 t uvd_v5_0_ring_get_rptr +ffffffff81ecdc90 t uvd_v5_0_ring_get_wptr +ffffffff81ecdcd0 t uvd_v5_0_ring_set_wptr +ffffffff81ecdd00 t uvd_v5_0_ring_emit_ib +ffffffff81ecdf70 t uvd_v5_0_ring_emit_fence +ffffffff81ece520 t uvd_v5_0_ring_test_ring +ffffffff81ece6c0 t uvd_v5_0_ring_insert_nop +ffffffff81ece820 t uvd_v5_0_set_interrupt_state +ffffffff81ece850 t uvd_v5_0_process_interrupt +ffffffff81ece8b0 t uvd_v5_0_stop +ffffffff81ece9c0 t uvd_v5_0_start +ffffffff81ed0000 t uvd_v6_0_early_init +ffffffff81ed0140 t uvd_v6_0_sw_init +ffffffff81ed0460 t uvd_v6_0_sw_fini +ffffffff81ed0520 t uvd_v6_0_hw_init +ffffffff81ed0ae0 t uvd_v6_0_hw_fini +ffffffff81ed0b60 t uvd_v6_0_suspend +ffffffff81ed0c60 t uvd_v6_0_resume +ffffffff81ed0cb0 t uvd_v6_0_is_idle +ffffffff81ed0d00 t uvd_v6_0_wait_for_idle +ffffffff81ed0d90 t uvd_v6_0_check_soft_reset +ffffffff81ed0e10 t uvd_v6_0_pre_soft_reset +ffffffff81ed0e50 t uvd_v6_0_soft_reset +ffffffff81ed0f20 t uvd_v6_0_post_soft_reset +ffffffff81ed0fc0 t uvd_v6_0_set_clockgating_state +ffffffff81ed1150 t uvd_v6_0_set_powergating_state +ffffffff81ed11c0 t uvd_v6_0_get_clockgating_state +ffffffff81ed1250 t uvd_v6_0_ring_get_rptr +ffffffff81ed1290 t uvd_v6_0_ring_get_wptr +ffffffff81ed12d0 t uvd_v6_0_ring_set_wptr +ffffffff81ed1300 t uvd_v6_0_ring_emit_ib +ffffffff81ed1660 t uvd_v6_0_ring_emit_fence +ffffffff81ed1c10 t uvd_v6_0_ring_emit_pipeline_sync +ffffffff81ed2010 t uvd_v6_0_ring_emit_vm_flush +ffffffff81ed2370 t uvd_v6_0_ring_emit_hdp_flush +ffffffff81ed23a0 t uvd_v6_0_ring_test_ring +ffffffff81ed2540 t uvd_v6_0_ring_insert_nop +ffffffff81ed26a0 t uvd_v6_0_ring_emit_wreg +ffffffff81ed2920 t uvd_v6_0_enc_ring_get_rptr +ffffffff81ed2980 t uvd_v6_0_enc_ring_get_wptr +ffffffff81ed29e0 t uvd_v6_0_enc_ring_set_wptr +ffffffff81ed2a20 t uvd_v6_0_enc_ring_emit_ib +ffffffff81ed2c60 t uvd_v6_0_enc_ring_emit_fence +ffffffff81ed2ea0 t uvd_v6_0_enc_ring_emit_pipeline_sync +ffffffff81ed3050 t uvd_v6_0_enc_ring_emit_vm_flush +ffffffff81ed3260 t uvd_v6_0_enc_ring_test_ring +ffffffff81ed33b0 t uvd_v6_0_enc_ring_test_ib +ffffffff81ed3970 t uvd_v6_0_enc_ring_insert_end +ffffffff81ed3a00 t uvd_v6_0_set_interrupt_state +ffffffff81ed3a30 t uvd_v6_0_process_interrupt +ffffffff81ed3b20 t uvd_v6_0_stop +ffffffff81ed3c30 t uvd_v6_0_start +ffffffff81ed5000 t uvd_v7_0_early_init +ffffffff81ed5270 t uvd_v7_0_sw_init +ffffffff81ed55f0 t uvd_v7_0_sw_fini +ffffffff81ed5700 t uvd_v7_0_hw_init +ffffffff81ed8620 t uvd_v7_0_hw_fini +ffffffff81ed8930 t uvd_v7_0_suspend +ffffffff81ed89e0 t uvd_v7_0_resume +ffffffff81ed8a30 t uvd_v7_0_set_clockgating_state +ffffffff81ed8a60 t uvd_v7_0_ring_get_rptr +ffffffff81ed8b00 t uvd_v7_0_ring_get_wptr +ffffffff81ed8ba0 t uvd_v7_0_ring_set_wptr +ffffffff81ed8c20 t uvd_v7_0_ring_patch_cs_in_place +ffffffff81ed8ca0 t uvd_v7_0_ring_emit_ib +ffffffff81ed9050 t uvd_v7_0_ring_emit_fence +ffffffff81ed96b0 t uvd_v7_0_ring_emit_vm_flush +ffffffff81ed9720 t uvd_v7_0_ring_emit_hdp_flush +ffffffff81ed9750 t uvd_v7_0_ring_test_ring +ffffffff81ed99e0 t uvd_v7_0_ring_insert_nop +ffffffff81ed9b80 t uvd_v7_0_ring_emit_wreg +ffffffff81ed9e50 t uvd_v7_0_ring_emit_reg_wait +ffffffff81eda1f0 t uvd_v7_0_enc_ring_get_rptr +ffffffff81eda2e0 t uvd_v7_0_enc_ring_get_wptr +ffffffff81eda3e0 t uvd_v7_0_enc_ring_set_wptr +ffffffff81eda4e0 t uvd_v7_0_enc_ring_emit_ib +ffffffff81eda720 t uvd_v7_0_enc_ring_emit_fence +ffffffff81eda960 t uvd_v7_0_enc_ring_emit_vm_flush +ffffffff81eda9d0 t uvd_v7_0_enc_ring_test_ring +ffffffff81edab30 t uvd_v7_0_enc_ring_test_ib +ffffffff81edb0f0 t uvd_v7_0_enc_ring_insert_end +ffffffff81edb180 t uvd_v7_0_enc_ring_emit_wreg +ffffffff81edb2e0 t uvd_v7_0_enc_ring_emit_reg_wait +ffffffff81edb4a0 t uvd_v7_0_set_interrupt_state +ffffffff81edb4d0 t uvd_v7_0_process_interrupt +ffffffff81edc000 t vce_v3_0_early_init +ffffffff81edc180 t vce_v3_0_sw_init +ffffffff81edc2d0 t vce_v3_0_sw_fini +ffffffff81edc320 t vce_v3_0_hw_init +ffffffff81edc400 t vce_v3_0_hw_fini +ffffffff81edc4f0 t vce_v3_0_suspend +ffffffff81edc5c0 t vce_v3_0_resume +ffffffff81edc610 t vce_v3_0_is_idle +ffffffff81edc680 t vce_v3_0_wait_for_idle +ffffffff81edc730 t vce_v3_0_check_soft_reset +ffffffff81edc830 t vce_v3_0_pre_soft_reset +ffffffff81edc8d0 t vce_v3_0_soft_reset +ffffffff81edc9a0 t vce_v3_0_post_soft_reset +ffffffff81edcb00 t vce_v3_0_set_clockgating_state +ffffffff81edcdf0 t vce_v3_0_set_powergating_state +ffffffff81edd640 t vce_v3_0_get_clockgating_state +ffffffff81edd700 t vce_v3_0_ring_get_rptr +ffffffff81edd7d0 t vce_v3_0_ring_get_wptr +ffffffff81edd8a0 t vce_v3_0_ring_set_wptr +ffffffff81edd960 t vce_v3_0_ring_emit_ib +ffffffff81eddba0 t vce_v3_0_emit_pipeline_sync +ffffffff81eddd50 t vce_v3_0_emit_vm_flush +ffffffff81eddfc0 t vce_v3_0_set_interrupt_state +ffffffff81ede030 t vce_v3_0_process_interrupt +ffffffff81ede0f0 t vce_v3_0_stop +ffffffff81edf000 t vce_v4_0_early_init +ffffffff81edf0b0 t vce_v4_0_sw_init +ffffffff81edf2e0 t vce_v4_0_sw_fini +ffffffff81edf360 t vce_v4_0_hw_init +ffffffff81edfb40 t vce_v4_0_hw_fini +ffffffff81edfbe0 t vce_v4_0_suspend +ffffffff81edfe00 t vce_v4_0_resume +ffffffff81edfeb0 t vce_v4_0_set_clockgating_state +ffffffff81edfee0 t vce_v4_0_set_powergating_state +ffffffff81edffc0 t vce_v4_0_ring_get_rptr +ffffffff81ee0030 t vce_v4_0_ring_get_wptr +ffffffff81ee00c0 t vce_v4_0_ring_set_wptr +ffffffff81ee0150 t vce_v4_0_ring_emit_ib +ffffffff81ee0390 t vce_v4_0_ring_emit_fence +ffffffff81ee05d0 t vce_v4_0_emit_vm_flush +ffffffff81ee0640 t vce_v4_0_ring_insert_end +ffffffff81ee06d0 t vce_v4_0_emit_wreg +ffffffff81ee0830 t vce_v4_0_emit_reg_wait +ffffffff81ee09f0 t vce_v4_0_set_interrupt_state +ffffffff81ee0a80 t vce_v4_0_process_interrupt +ffffffff81ee0b20 t vce_v4_0_start +ffffffff81ee1500 t vce_v4_0_stop +ffffffff81ee2000 T vcn_dec_sw_ring_emit_fence +ffffffff81ee2240 T vcn_dec_sw_ring_insert_end +ffffffff81ee22d0 T vcn_dec_sw_ring_emit_ib +ffffffff81ee2510 T vcn_dec_sw_ring_emit_reg_wait +ffffffff81ee26d0 T vcn_dec_sw_ring_emit_vm_flush +ffffffff81ee2740 T vcn_dec_sw_ring_emit_wreg +ffffffff81ee3000 T vcn_v1_0_set_pg_for_begin_use +ffffffff81ee3150 T vcn_v1_0_ring_end_use +ffffffff81ee31c0 t vcn_v1_0_early_init +ffffffff81ee3340 t vcn_v1_0_sw_init +ffffffff81ee35e0 t vcn_v1_0_sw_fini +ffffffff81ee3640 t vcn_v1_0_hw_init +ffffffff81ee3720 t vcn_v1_0_hw_fini +ffffffff81ee3820 t vcn_v1_0_suspend +ffffffff81ee3890 t vcn_v1_0_resume +ffffffff81ee3980 t vcn_v1_0_is_idle +ffffffff81ee3a10 t vcn_v1_0_wait_for_idle +ffffffff81ee3b00 t vcn_v1_0_set_clockgating_state +ffffffff81ee3bb0 t vcn_v1_0_set_powergating_state +ffffffff81ee4540 t vcn_v1_0_dec_ring_get_rptr +ffffffff81ee45d0 t vcn_v1_0_dec_ring_get_wptr +ffffffff81ee4660 t vcn_v1_0_dec_ring_set_wptr +ffffffff81ee4770 t vcn_v1_0_ring_patch_cs_in_place +ffffffff81ee4940 t vcn_v1_0_dec_ring_emit_ib +ffffffff81ee4cd0 t vcn_v1_0_dec_ring_emit_fence +ffffffff81ee5300 t vcn_v1_0_dec_ring_emit_vm_flush +ffffffff81ee5370 t vcn_v1_0_dec_ring_insert_nop +ffffffff81ee5500 t vcn_v1_0_dec_ring_insert_start +ffffffff81ee56e0 t vcn_v1_0_dec_ring_insert_end +ffffffff81ee57f0 t vcn_v1_0_ring_begin_use +ffffffff81ee5890 t vcn_v1_0_dec_ring_emit_wreg +ffffffff81ee5b40 t vcn_v1_0_dec_ring_emit_reg_wait +ffffffff81ee5ec0 t vcn_v1_0_enc_ring_get_rptr +ffffffff81ee5f90 t vcn_v1_0_enc_ring_get_wptr +ffffffff81ee6060 t vcn_v1_0_enc_ring_set_wptr +ffffffff81ee6120 t vcn_v1_0_enc_ring_emit_ib +ffffffff81ee6360 t vcn_v1_0_enc_ring_emit_fence +ffffffff81ee65a0 t vcn_v1_0_enc_ring_emit_vm_flush +ffffffff81ee6610 t vcn_v1_0_enc_ring_insert_end +ffffffff81ee66a0 t vcn_v1_0_enc_ring_emit_wreg +ffffffff81ee6800 t vcn_v1_0_enc_ring_emit_reg_wait +ffffffff81ee69c0 t vcn_v1_0_set_interrupt_state +ffffffff81ee69f0 t vcn_v1_0_process_interrupt +ffffffff81ee6aa0 t vcn_v1_0_idle_work_handler +ffffffff81ee6c30 t vcn_v1_0_pause_dpg_mode +ffffffff81ee7d50 t vcn_v1_0_enable_clock_gating +ffffffff81ee8160 t vcn_v1_0_disable_clock_gating +ffffffff81ee86f0 t vcn_1_0_enable_static_power_gating +ffffffff81ee8910 t vcn_v1_0_start_dpg_mode +ffffffff81eec540 t vcn_v1_0_start_spg_mode +ffffffff81eee760 t vcn_v1_0_clock_gating_dpg_mode +ffffffff81eef000 T vcn_v2_0_dec_ring_insert_start +ffffffff81eef1c0 T vcn_v2_0_dec_ring_insert_end +ffffffff81eef2c0 T vcn_v2_0_dec_ring_insert_nop +ffffffff81eef430 T vcn_v2_0_dec_ring_emit_fence +ffffffff81eef9f0 T vcn_v2_0_dec_ring_emit_ib +ffffffff81eefd50 T vcn_v2_0_dec_ring_emit_reg_wait +ffffffff81ef00a0 T vcn_v2_0_dec_ring_emit_vm_flush +ffffffff81ef0110 T vcn_v2_0_dec_ring_emit_wreg +ffffffff81ef03a0 T vcn_v2_0_enc_ring_emit_fence +ffffffff81ef05e0 T vcn_v2_0_enc_ring_insert_end +ffffffff81ef0670 T vcn_v2_0_enc_ring_emit_ib +ffffffff81ef08b0 T vcn_v2_0_enc_ring_emit_reg_wait +ffffffff81ef0a70 T vcn_v2_0_enc_ring_emit_vm_flush +ffffffff81ef0ae0 T vcn_v2_0_enc_ring_emit_wreg +ffffffff81ef0c40 T vcn_v2_0_dec_ring_test_ring +ffffffff81ef0ee0 t vcn_v2_0_early_init +ffffffff81ef1060 t vcn_v2_0_sw_init +ffffffff81ef1370 t vcn_v2_0_sw_fini +ffffffff81ef13f0 t vcn_v2_0_hw_init +ffffffff81ef1da0 t vcn_v2_0_hw_fini +ffffffff81ef1ea0 t vcn_v2_0_suspend +ffffffff81ef1ed0 t vcn_v2_0_resume +ffffffff81ef1f20 t vcn_v2_0_is_idle +ffffffff81ef1fb0 t vcn_v2_0_wait_for_idle +ffffffff81ef20a0 t vcn_v2_0_set_clockgating_state +ffffffff81ef2130 t vcn_v2_0_set_powergating_state +ffffffff81ef43f0 t vcn_v2_0_dec_ring_get_rptr +ffffffff81ef4480 t vcn_v2_0_dec_ring_get_wptr +ffffffff81ef4520 t vcn_v2_0_dec_ring_set_wptr +ffffffff81ef4650 t vcn_v2_0_enc_ring_get_rptr +ffffffff81ef4720 t vcn_v2_0_enc_ring_get_wptr +ffffffff81ef4810 t vcn_v2_0_enc_ring_set_wptr +ffffffff81ef4900 t vcn_v2_0_set_interrupt_state +ffffffff81ef4930 t vcn_v2_0_process_interrupt +ffffffff81ef49e0 t vcn_v2_0_pause_dpg_mode +ffffffff81ef5340 t vcn_v2_0_enable_clock_gating +ffffffff81ef55c0 t vcn_v2_0_disable_clock_gating +ffffffff81ef59c0 t vcn_v2_0_enable_static_power_gating +ffffffff81ef5ba0 t vcn_v2_0_start_dpg_mode +ffffffff81efa660 t vcn_v2_0_clock_gating_dpg_mode +ffffffff81efb000 t vcn_v2_6_query_poison_status +ffffffff81efb0d0 t vcn_v2_5_early_init +ffffffff81efb410 t vcn_v2_5_sw_init +ffffffff81efb890 t vcn_v2_5_sw_fini +ffffffff81efb960 t vcn_v2_5_hw_init +ffffffff81efc420 t vcn_v2_5_hw_fini +ffffffff81efc560 t vcn_v2_5_suspend +ffffffff81efc590 t vcn_v2_5_resume +ffffffff81efc5e0 t vcn_v2_5_is_idle +ffffffff81efc6d0 t vcn_v2_5_wait_for_idle +ffffffff81efc800 t vcn_v2_5_set_clockgating_state +ffffffff81efc880 t vcn_v2_5_set_powergating_state +ffffffff81efd160 t vcn_v2_5_dec_ring_get_rptr +ffffffff81efd200 t vcn_v2_5_dec_ring_get_wptr +ffffffff81efd2b0 t vcn_v2_5_dec_ring_set_wptr +ffffffff81efd360 t vcn_v2_5_enc_ring_get_rptr +ffffffff81efd450 t vcn_v2_5_enc_ring_get_wptr +ffffffff81efd550 t vcn_v2_5_enc_ring_set_wptr +ffffffff81efd650 t vcn_v2_5_set_interrupt_state +ffffffff81efd680 t vcn_v2_5_process_interrupt +ffffffff81efd7a0 t vcn_v2_5_pause_dpg_mode +ffffffff81efe110 t vcn_v2_5_enable_clock_gating +ffffffff81efe410 t vcn_v2_5_disable_clock_gating +ffffffff81efe930 t vcn_v2_5_start +ffffffff81f02530 t vcn_v2_5_clock_gating_dpg_mode +ffffffff81f02ed0 t vcn_v2_5_mc_resume_dpg_mode +ffffffff81f06000 t vcn_v3_0_early_init +ffffffff81f06220 t vcn_v3_0_sw_init +ffffffff81f066d0 t vcn_v3_0_sw_fini +ffffffff81f067b0 t vcn_v3_0_hw_init +ffffffff81f07350 t vcn_v3_0_hw_fini +ffffffff81f07450 t vcn_v3_0_suspend +ffffffff81f07480 t vcn_v3_0_resume +ffffffff81f074d0 t vcn_v3_0_is_idle +ffffffff81f075c0 t vcn_v3_0_wait_for_idle +ffffffff81f076f0 t vcn_v3_0_set_clockgating_state +ffffffff81f07800 t vcn_v3_0_set_powergating_state +ffffffff81f0a080 t vcn_v3_0_dec_ring_get_rptr +ffffffff81f0a120 t vcn_v3_0_dec_ring_get_wptr +ffffffff81f0a1d0 t vcn_v3_0_dec_ring_set_wptr +ffffffff81f0a340 t vcn_v3_0_ring_patch_cs_in_place +ffffffff81f0a640 t vcn_v3_0_enc_ring_get_rptr +ffffffff81f0a730 t vcn_v3_0_enc_ring_get_wptr +ffffffff81f0a830 t vcn_v3_0_enc_ring_set_wptr +ffffffff81f0a930 t vcn_v3_0_set_interrupt_state +ffffffff81f0a960 t vcn_v3_0_process_interrupt +ffffffff81f0aa50 t vcn_v3_0_pause_dpg_mode +ffffffff81f0b3c0 t vcn_v3_0_enable_clock_gating +ffffffff81f0b640 t vcn_v3_0_disable_clock_gating +ffffffff81f0bbe0 t vcn_v3_0_start_dpg_mode +ffffffff81f10980 t vcn_v3_0_clock_gating_dpg_mode +ffffffff81f12000 t vcn_v4_0_early_init +ffffffff81f12120 t vcn_v4_0_sw_init +ffffffff81f12360 t vcn_v4_0_sw_fini +ffffffff81f12440 t vcn_v4_0_hw_init +ffffffff81f12e80 t vcn_v4_0_hw_fini +ffffffff81f12f90 t vcn_v4_0_suspend +ffffffff81f12fc0 t vcn_v4_0_resume +ffffffff81f13010 t vcn_v4_0_is_idle +ffffffff81f13110 t vcn_v4_0_wait_for_idle +ffffffff81f13240 t vcn_v4_0_set_clockgating_state +ffffffff81f13350 t vcn_v4_0_set_powergating_state +ffffffff81f15900 t vcn_v4_0_unified_ring_get_rptr +ffffffff81f159e0 t vcn_v4_0_unified_ring_get_wptr +ffffffff81f15ad0 t vcn_v4_0_unified_ring_set_wptr +ffffffff81f15bd0 t vcn_v4_0_ring_patch_cs_in_place +ffffffff81f15e50 t vcn_v4_0_set_interrupt_state +ffffffff81f15e80 t vcn_v4_0_process_interrupt +ffffffff81f15f40 t vcn_v4_0_pause_dpg_mode +ffffffff81f16300 t vcn_v4_0_enable_clock_gating +ffffffff81f165f0 t vcn_v4_0_disable_clock_gating +ffffffff81f16b40 t vcn_v4_0_start_dpg_mode +ffffffff81f1b1d0 t vcn_v4_0_disable_clock_gating_dpg_mode +ffffffff81f1c000 t vega10_ih_early_init +ffffffff81f1c050 t vega10_ih_sw_init +ffffffff81f1c300 t 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dal_gpio_get_sync_source -ffffffff8221b540 T dal_gpio_get_output_state -ffffffff8221b570 T dal_gpio_get_ddc -ffffffff8221b5a0 T dal_gpio_get_hpd -ffffffff8221b5d0 T dal_gpio_get_generic -ffffffff8221b600 T dal_gpio_close -ffffffff8221b650 T dal_gpio_create -ffffffff8221b7e0 T dal_gpio_destroy -ffffffff8221c000 T dal_gpio_service_create -ffffffff8221c260 T dal_gpio_service_create_irq -ffffffff8221c320 T dal_gpio_create_irq -ffffffff8221c3a0 T dal_gpio_service_create_generic_mux -ffffffff8221c440 T dal_gpio_destroy_generic_mux -ffffffff8221c4d0 T dal_gpio_get_generic_pin_info -ffffffff8221c530 T dal_gpio_service_destroy -ffffffff8221c660 T dal_mux_setup_config -ffffffff8221c6c0 T dal_gpio_service_lock -ffffffff8221c740 T dal_gpio_service_unlock -ffffffff8221c7c0 T dal_gpio_service_open -ffffffff8221ca00 T dal_gpio_service_close -ffffffff8221caa0 T dal_irq_get_source -ffffffff8221cb10 T dal_irq_get_rx_source -ffffffff8221cb60 T dal_irq_setup_hpd_filter -ffffffff8221cbc0 T dal_gpio_destroy_irq -ffffffff8221cc50 T dal_gpio_create_ddc -ffffffff8221cdc0 T dal_gpio_destroy_ddc -ffffffff8221ce90 T dal_ddc_close -ffffffff8221cee0 T dal_ddc_open -ffffffff8221d040 T dal_ddc_change_mode -ffffffff8221d0e0 T dal_ddc_get_line -ffffffff8221d100 T dal_ddc_set_config -ffffffff8221e000 T dal_hw_ddc_init -ffffffff8221e100 T dal_hw_ddc_get_pin -ffffffff8221e110 t dal_hw_ddc_destroy -ffffffff8221e170 t set_config -ffffffff8221f000 T dal_hw_factory_init -ffffffff82220000 T dal_hw_generic_init -ffffffff82220100 T dal_hw_generic_get_pin -ffffffff82220110 t dal_hw_generic_destroy -ffffffff82220170 t set_config -ffffffff82221000 T dal_hw_gpio_open -ffffffff822210b0 T dal_hw_gpio_config_mode -ffffffff822211a0 T dal_hw_gpio_get_value -ffffffff82221200 T dal_hw_gpio_set_value -ffffffff82221290 T dal_hw_gpio_change_mode -ffffffff822212a0 T dal_hw_gpio_close -ffffffff82221350 T dal_hw_gpio_construct -ffffffff822213b0 T dal_hw_gpio_destruct -ffffffff82222000 T dal_hw_hpd_init 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+ffffffff81f5c250 t hpd_sel_to_atom +ffffffff81f5c290 t dig_encoder_sel_to_atom +ffffffff81f5c2c0 t phy_id_to_atom +ffffffff81f5c300 t disp_power_gating_action_to_atom +ffffffff81f5d000 T dal_cmd_tbl_helper_dce112_get_table2 +ffffffff81f5d030 t encoder_action_to_atom +ffffffff81f5d0b0 t engine_bp_to_atom +ffffffff81f5d100 t clock_source_id_to_atom +ffffffff81f5d1d0 t clock_source_id_to_atom_phy_clk_src_id +ffffffff81f5d220 t signal_type_to_atom_dig_mode +ffffffff81f5d280 t hpd_sel_to_atom +ffffffff81f5d2c0 t dig_encoder_sel_to_atom +ffffffff81f5d2f0 t phy_id_to_atom +ffffffff81f5d330 t disp_power_gating_action_to_atom +ffffffff81f5d3a0 t dc_clock_type_to_atom +ffffffff81f5d420 t transmitter_color_depth_to_atom +ffffffff81f5e000 T dal_cmd_tbl_helper_dce112_get_table +ffffffff81f5e030 t encoder_action_to_atom +ffffffff81f5e0b0 t engine_bp_to_atom +ffffffff81f5e100 t clock_source_id_to_atom +ffffffff81f5e1d0 t clock_source_id_to_atom_phy_clk_src_id +ffffffff81f5e220 t signal_type_to_atom_dig_mode +ffffffff81f5e280 t hpd_sel_to_atom +ffffffff81f5e2c0 t dig_encoder_sel_to_atom +ffffffff81f5e2f0 t phy_id_to_atom +ffffffff81f5e330 t disp_power_gating_action_to_atom +ffffffff81f5e3a0 t dc_clock_type_to_atom +ffffffff81f5e420 t transmitter_color_depth_to_atom +ffffffff81f5f000 T dal_cmd_tbl_helper_dce80_get_table +ffffffff81f5f030 t encoder_action_to_atom +ffffffff81f5f0b0 t engine_bp_to_atom +ffffffff81f5f100 t clock_source_id_to_atom +ffffffff81f5f1d0 t clock_source_id_to_atom_phy_clk_src_id +ffffffff81f5f220 t signal_type_to_atom_dig_mode +ffffffff81f5f280 t hpd_sel_to_atom +ffffffff81f5f2c0 t dig_encoder_sel_to_atom +ffffffff81f5f310 t phy_id_to_atom +ffffffff81f5f350 t disp_power_gating_action_to_atom +ffffffff81f60000 T clk_mgr_helper_get_active_display_cnt +ffffffff81f600e0 T clk_mgr_helper_get_active_plane_cnt +ffffffff81f60190 T clk_mgr_exit_optimized_pwr_state +ffffffff81f60290 T clk_mgr_optimize_pwr_state +ffffffff81f603a0 T dc_clk_mgr_create +ffffffff81f60a80 T dc_destroy_clk_mgr +ffffffff81f61000 T dentist_get_divider_from_did +ffffffff81f61070 T dce_adjust_dp_ref_freq_for_ss +ffffffff81f61180 T dce_get_dp_ref_freq_khz +ffffffff81f612b0 T dce12_get_dp_ref_freq_khz +ffffffff81f612d0 T dce_get_max_pixel_clock_for_all_paths +ffffffff81f614e0 T dce_get_required_clocks_state +ffffffff81f61590 T dce_set_clock +ffffffff81f616f0 T dce_clock_read_ss_info +ffffffff81f61830 T dce_clk_mgr_construct +ffffffff81f61a20 t dce_update_clocks +ffffffff81f62000 T dce110_get_min_vblank_time_us +ffffffff81f62080 T dce110_fill_display_configs +ffffffff81f622e0 T dce11_pplib_apply_display_requirements +ffffffff81f625d0 T dce110_clk_mgr_construct +ffffffff81f62680 t dce11_update_clocks +ffffffff81f63000 T dce112_set_clock +ffffffff81f631a0 T dce112_set_dispclk +ffffffff81f632d0 T dce112_set_dprefclk +ffffffff81f63340 T dce112_clk_mgr_construct +ffffffff81f633f0 t dce112_update_clocks +ffffffff81f64000 T dce120_clk_mgr_construct +ffffffff81f64090 T dce121_clk_mgr_construct +ffffffff81f641c0 t dce12_update_clocks +ffffffff81f65000 T rv1_clk_mgr_construct +ffffffff81f650c0 t rv1_update_clocks +ffffffff81f655b0 t rv1_init_clocks +ffffffff81f65640 t rv1_enable_pme_wa +ffffffff81f66000 T rv1_vbios_smu_set_dispclk +ffffffff81f660f0 t rv1_vbios_smu_send_msg_with_param +ffffffff81f66200 T rv1_vbios_smu_set_dprefclk +ffffffff81f67000 T rv2_clk_mgr_construct +ffffffff81f68000 T dentist_get_did_from_divider +ffffffff81f68090 T dcn20_update_clocks_update_dpp_dto +ffffffff81f68160 T dcn20_update_clocks_update_dentist +ffffffff81f68680 T dcn2_update_clocks +ffffffff81f68bf0 T dcn2_read_clocks_from_hw_dentist +ffffffff81f68cc0 T dcn2_update_clocks_fpga +ffffffff81f68e40 T dcn2_init_clocks +ffffffff81f68ee0 T dcn2_get_clock +ffffffff81f68f50 T dcn20_clk_mgr_construct +ffffffff81f690a0 t dcn2_enable_pme_wa +ffffffff81f690f0 t dcn2_are_clock_states_equal +ffffffff81f69160 t dcn2_notify_link_rate_change +ffffffff81f6a000 t dcn201_update_clocks +ffffffff81f6a240 t dcn201_init_clocks +ffffffff81f6a2e0 T dcn201_clk_mgr_construct +ffffffff81f6b000 T rn_clk_mgr_construct +ffffffff81f6b8e0 t rn_update_clocks +ffffffff81f6be80 t rn_set_low_power_state +ffffffff81f6c050 t rn_init_clocks +ffffffff81f6c0f0 t rn_enable_pme_wa +ffffffff81f6c100 t rn_are_clock_states_equal +ffffffff81f6c150 t rn_notify_wm_ranges +ffffffff81f6c4e0 t rn_notify_link_rate_change +ffffffff81f6d000 T rn_vbios_smu_get_smu_version +ffffffff81f6d020 t rn_vbios_smu_send_msg_with_param +ffffffff81f6d1b0 T rn_vbios_smu_set_dispclk +ffffffff81f6d2f0 T rn_vbios_smu_set_dprefclk +ffffffff81f6d360 T rn_vbios_smu_set_hard_min_dcfclk +ffffffff81f6d3e0 T rn_vbios_smu_set_min_deep_sleep_dcfclk +ffffffff81f6d460 T rn_vbios_smu_set_phyclk +ffffffff81f6d4a0 T rn_vbios_smu_set_dppclk +ffffffff81f6d560 T rn_vbios_smu_set_dcn_low_power_state +ffffffff81f6d580 T rn_vbios_smu_enable_48mhz_tmdp_refclk_pwrdwn +ffffffff81f6d5a0 T rn_vbios_smu_enable_pme_wa +ffffffff81f6d5c0 T rn_vbios_smu_is_periodic_retraining_disabled +ffffffff81f6e000 T dcn3_init_clocks +ffffffff81f6e3d0 t dcn3_init_clocks_fpga +ffffffff81f6e3e0 T dcn3_clk_mgr_construct +ffffffff81f6e540 T dcn3_clk_mgr_destroy +ffffffff81f6e5b0 t dcn3_update_clocks +ffffffff81f6ea10 t dcn3_enable_pme_wa +ffffffff81f6ea50 t dcn3_are_clock_states_equal +ffffffff81f6eab0 t dcn3_notify_wm_ranges +ffffffff81f6ed40 t dcn30_notify_link_rate_change +ffffffff81f6ee60 t dcn3_set_hard_min_memclk +ffffffff81f6ef00 t dcn3_set_hard_max_memclk +ffffffff81f6ef60 t dcn3_set_max_memclk +ffffffff81f6efa0 t dcn3_set_min_memclk +ffffffff81f6efe0 t dcn3_get_memclk_states_from_smu +ffffffff81f6f120 t dcn3_is_smu_present +ffffffff81f70000 T dcn30_smu_test_message +ffffffff81f70070 t dcn30_smu_send_msg_with_param +ffffffff81f701d0 T dcn30_smu_get_smu_version +ffffffff81f701f0 T dcn30_smu_check_driver_if_version +ffffffff81f70240 T dcn30_smu_check_msg_header_version +ffffffff81f70290 T dcn30_smu_set_dram_addr_high +ffffffff81f702b0 T dcn30_smu_set_dram_addr_low +ffffffff81f702d0 T dcn30_smu_transfer_wm_table_smu_2_dram +ffffffff81f702f0 T dcn30_smu_transfer_wm_table_dram_2_smu +ffffffff81f70310 T dcn30_smu_set_hard_min_by_freq +ffffffff81f70360 T dcn30_smu_set_hard_max_by_freq +ffffffff81f703b0 T dcn30_smu_get_dpm_freq_by_index +ffffffff81f70400 T dcn30_smu_get_dc_mode_max_dpm_freq +ffffffff81f70450 T dcn30_smu_set_min_deep_sleep_dcef_clk +ffffffff81f70470 T dcn30_smu_set_num_of_displays +ffffffff81f70490 T dcn30_smu_set_display_refresh_from_mall +ffffffff81f704c0 T dcn30_smu_set_external_client_df_cstate_allow +ffffffff81f704e0 T dcn30_smu_set_pme_workaround +ffffffff81f71000 T dcn301_smu_get_smu_version +ffffffff81f71070 t dcn301_smu_send_msg_with_param +ffffffff81f711f0 T dcn301_smu_set_dispclk +ffffffff81f71290 T dcn301_smu_set_dprefclk +ffffffff81f71340 T dcn301_smu_set_hard_min_dcfclk +ffffffff81f713e0 T dcn301_smu_set_min_deep_sleep_dcfclk +ffffffff81f71480 T dcn301_smu_set_dppclk +ffffffff81f71520 T dcn301_smu_set_display_idle_optimization +ffffffff81f71570 T dcn301_smu_enable_phy_refclk_pwrdwn +ffffffff81f715c0 T dcn301_smu_enable_pme_wa +ffffffff81f715e0 T dcn301_smu_set_dram_addr_high +ffffffff81f71630 T dcn301_smu_set_dram_addr_low +ffffffff81f71680 T dcn301_smu_transfer_dpm_table_smu_2_dram +ffffffff81f716a0 T dcn301_smu_transfer_wm_table_dram_2_smu +ffffffff81f72000 T vg_clk_mgr_construct +ffffffff81f727f0 T vg_clk_mgr_destroy +ffffffff81f72840 t vg_update_clocks +ffffffff81f72bd0 t vg_init_clocks +ffffffff81f72c70 t vg_enable_pme_wa +ffffffff81f72c80 t vg_are_clock_states_equal +ffffffff81f72cd0 t vg_notify_wm_ranges +ffffffff81f74000 T dcn31_update_clocks +ffffffff81f74620 T dcn31_init_clocks +ffffffff81f746d0 T dcn31_are_clock_states_equal +ffffffff81f74730 T dcn31_get_dtb_ref_freq_khz +ffffffff81f74760 T dcn31_clk_mgr_construct +ffffffff81f74dd0 T dcn31_clk_mgr_destroy +ffffffff81f74e20 t dcn31_set_low_power_state +ffffffff81f75000 t dcn31_enable_pme_wa +ffffffff81f75010 t dcn31_notify_wm_ranges +ffffffff81f753b0 t find_clk_for_voltage +ffffffff81f76000 T dcn31_smu_get_smu_version +ffffffff81f76020 t dcn31_smu_send_msg_with_param +ffffffff81f76220 T dcn31_smu_set_dispclk +ffffffff81f76290 T dcn31_smu_set_dprefclk +ffffffff81f76300 T dcn31_smu_set_hard_min_dcfclk +ffffffff81f76380 T dcn31_smu_set_min_deep_sleep_dcfclk +ffffffff81f76400 T dcn31_smu_set_dppclk +ffffffff81f76470 T dcn31_smu_set_display_idle_optimization +ffffffff81f764c0 T dcn31_smu_enable_phy_refclk_pwrdwn +ffffffff81f76510 T dcn31_smu_enable_pme_wa +ffffffff81f76550 T dcn31_smu_set_dram_addr_high +ffffffff81f76590 T dcn31_smu_set_dram_addr_low +ffffffff81f765d0 T dcn31_smu_transfer_dpm_table_smu_2_dram +ffffffff81f76610 T dcn31_smu_transfer_wm_table_dram_2_smu +ffffffff81f76650 T dcn31_smu_set_zstate_support +ffffffff81f766c0 T dcn31_smu_set_dtbclk +ffffffff81f77000 T dcn314_update_clocks +ffffffff81f776d0 T dcn314_are_clock_states_equal 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T dcn315_clk_mgr_construct +ffffffff81f7a9c0 T dcn315_clk_mgr_destroy +ffffffff81f7aa10 t dcn315_update_clocks +ffffffff81f7b000 t dcn315_enable_pme_wa +ffffffff81f7b010 t dcn315_notify_wm_ranges +ffffffff81f7c000 T dcn315_smu_get_smu_version +ffffffff81f7c020 t dcn315_smu_send_msg_with_param +ffffffff81f7c1b0 T dcn315_smu_set_dispclk +ffffffff81f7c220 T dcn315_smu_set_hard_min_dcfclk +ffffffff81f7c2a0 T dcn315_smu_set_min_deep_sleep_dcfclk +ffffffff81f7c320 T dcn315_smu_set_dppclk +ffffffff81f7c390 T dcn315_smu_set_display_idle_optimization +ffffffff81f7c3e0 T dcn315_smu_enable_phy_refclk_pwrdwn +ffffffff81f7c430 T dcn315_smu_enable_pme_wa +ffffffff81f7c470 T dcn315_smu_set_dram_addr_high +ffffffff81f7c4b0 T dcn315_smu_set_dram_addr_low +ffffffff81f7c4f0 T dcn315_smu_transfer_dpm_table_smu_2_dram +ffffffff81f7c530 T dcn315_smu_transfer_wm_table_dram_2_smu +ffffffff81f7c570 T dcn315_smu_get_dpref_clk +ffffffff81f7c5d0 T dcn315_smu_get_dtbclk +ffffffff81f7c630 T dcn315_smu_set_dtbclk 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dc_link_enable_hpd +ffffffff81f983d0 T dc_link_disable_hpd +ffffffff81f983e0 T dc_link_set_test_pattern +ffffffff81f98420 T dc_link_bandwidth_kbps +ffffffff81f984c0 T dc_link_should_enable_fec +ffffffff81f985e0 T dc_link_get_link_cap +ffffffff81f98630 T dc_link_overwrite_extended_receiver_cap +ffffffff81f98640 T dc_link_is_fec_supported +ffffffff81f98700 T dc_bandwidth_in_kbps_from_timing +ffffffff81f98860 T dc_get_cur_link_res_map +ffffffff81f98940 T dc_restore_link_res_map +ffffffff81f98a70 t read_current_link_settings_on_detect +ffffffff81f98c80 t enable_link_dp +ffffffff81f99000 T dal_ddc_i2c_payloads_add +ffffffff81f990c0 T dal_ddc_service_create +ffffffff81f99230 T dal_ddc_service_destroy +ffffffff81f992c0 T dal_ddc_service_get_type +ffffffff81f992f0 T dal_ddc_service_set_transaction_type +ffffffff81f99320 T dal_ddc_service_is_in_aux_transaction_mode +ffffffff81f99360 T ddc_service_set_dongle_type +ffffffff81f99390 T get_defer_delay +ffffffff81f994c0 T dal_ddc_service_i2c_query_dp_dual_mode_adaptor +ffffffff81f998d0 T dal_ddc_service_query_ddc_data +ffffffff81f99c90 T dal_ddc_submit_aux_command +ffffffff81f99d80 T dc_link_aux_transfer_with_retries +ffffffff81f99d90 T dc_link_aux_transfer_raw +ffffffff81f99dc0 T dc_link_aux_try_to_configure_timeout +ffffffff81f99ea0 T dal_ddc_service_set_ddc_pin +ffffffff81f99ed0 T dal_ddc_service_get_ddc_pin +ffffffff81f99f00 T dal_ddc_service_write_scdc_data +ffffffff81f99ff0 T dal_ddc_service_read_scdc_data +ffffffff81f9b000 T dp_wait_for_training_aux_rd_interval +ffffffff81f9b080 T dc_dp_training_pattern_to_dpcd_training_pattern +ffffffff81f9b100 T dpcd_set_link_settings +ffffffff81f9b280 T dc_dp_initialize_scrambling_data_symbols +ffffffff81f9b320 T dp_is_cr_done +ffffffff81f9b380 T dp_is_ch_eq_done +ffffffff81f9b440 T dp_is_symbol_locked +ffffffff81f9b500 T dp_is_interlane_aligned +ffffffff81f9b530 T dp_hw_to_dpcd_lane_settings +ffffffff81f9b5f0 T dp_get_link_encoding_format +ffffffff81f9b640 T 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dc_3dlut_func_retain +ffffffff81fbb680 t dc_plane_destruct +ffffffff81fbc000 T vm_helper_mark_vmid_used +ffffffff81fbc030 T dc_setup_system_context +ffffffff81fbc0c0 T dc_setup_vm_context +ffffffff81fbc0f0 T dc_get_vmid_use_vector +ffffffff81fbc150 T vm_helper_init +ffffffff81fbd000 T dc_dmub_srv_create +ffffffff81fbd0a0 T dc_dmub_srv_destroy +ffffffff81fbd0f0 T dc_dmub_srv_cmd_queue +ffffffff81fbd1d0 T dc_dmub_srv_cmd_execute +ffffffff81fbd230 T dc_dmub_srv_wait_idle +ffffffff81fbd290 T dc_dmub_srv_log_diagnostic_data +ffffffff81fbd5e0 T dc_dmub_srv_clear_inbox0_ack +ffffffff81fbd640 T dc_dmub_srv_wait_for_inbox0_ack +ffffffff81fbd6a0 T dc_dmub_srv_send_inbox0_cmd +ffffffff81fbd700 T dc_dmub_srv_cmd_with_reply_data +ffffffff81fbd780 T dc_dmub_srv_wait_phy_init +ffffffff81fbd840 T dc_dmub_srv_notify_stream_mask +ffffffff81fbd8a0 T dc_dmub_srv_is_restore_required +ffffffff81fbd920 T dc_dmub_srv_get_dmub_outbox0_msg +ffffffff81fbd950 T dc_dmub_trace_event_control +ffffffff81fbd970 T dc_dmub_srv_drr_update_cmd +ffffffff81fbda70 T dc_dmub_srv_set_drr_manual_trigger_cmd +ffffffff81fbdb80 T dc_dmub_srv_p_state_delegate +ffffffff81fbded0 T dc_dmub_srv_query_caps_cmd +ffffffff81fbdfc0 T dc_dmub_srv_get_visual_confirm_color_cmd +ffffffff81fbe190 T dc_dmub_setup_subvp_dmub_command +ffffffff81fbeaf0 T dc_dmub_srv_get_diagnostic_data +ffffffff81fbeb30 T dc_send_update_cursor_info_to_dmu +ffffffff81fbf000 T dc_edid_parser_send_cea +ffffffff81fbf0b0 T dc_edid_parser_recv_cea_ack +ffffffff81fbf140 T dc_edid_parser_recv_amd_vsdb +ffffffff81fc0000 T generic_reg_update_ex +ffffffff81fc0370 t set_reg_field_values +ffffffff81fc0530 T generic_reg_set_ex +ffffffff81fc0780 T generic_reg_get +ffffffff81fc07f0 T generic_reg_get2 +ffffffff81fc0880 T generic_reg_get3 +ffffffff81fc0920 T generic_reg_get4 +ffffffff81fc09d0 T generic_reg_get5 +ffffffff81fc0aa0 T generic_reg_get6 +ffffffff81fc0b80 T generic_reg_get7 +ffffffff81fc0c80 T generic_reg_get8 +ffffffff81fc0d90 T generic_reg_wait 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dce_aud_wall_dto_setup +ffffffff81fc4310 T dce_aud_hw_init +ffffffff81fc44e0 T dce_aud_destroy +ffffffff81fc4530 T dce_audio_create +ffffffff81fc4600 t dce_aud_endpoint_valid +ffffffff81fc5000 T dce110_engine_destroy +ffffffff81fc5050 T dce110_aux_engine_construct +ffffffff81fc50d0 t dce_aux_configure_timeout +ffffffff81fc52b0 T dce_aux_transfer_raw +ffffffff81fc5ad0 t acquire +ffffffff81fc5d40 T dce_aux_transfer_dmub_raw +ffffffff81fc5e40 T dce_aux_transfer_with_retries +ffffffff81fc7000 T look_up_in_video_optimized_rate_tlb +ffffffff81fc7070 T dce110_clk_src_construct +ffffffff81fc7280 t calc_pll_max_vco_construct +ffffffff81fc7420 T dce112_clk_src_construct +ffffffff81fc74b0 T dcn20_clk_src_construct +ffffffff81fc7550 T dcn3_clk_src_construct +ffffffff81fc75f0 T dcn31_clk_src_construct +ffffffff81fc7690 T dcn301_clk_src_construct +ffffffff81fc7730 t dce110_clock_source_power_down +ffffffff81fc77c0 t dce110_program_pix_clk +ffffffff81fc7e50 t dce110_get_pix_clk_dividers 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+ffffffff81fcfec0 T dce_i2c_hw_construct +ffffffff81fcff30 T dce100_i2c_hw_construct +ffffffff81fcffa0 T dce112_i2c_hw_construct +ffffffff81fd0010 T dcn1_i2c_hw_construct +ffffffff81fd0080 T dcn2_i2c_hw_construct +ffffffff81fd0110 t is_hw_busy +ffffffff81fd1000 T dce_i2c_sw_construct +ffffffff81fd1030 T dce_i2c_engine_acquire_sw +ffffffff81fd10d0 T dce_i2c_submit_command_sw +ffffffff81fd18d0 t write_byte_sw +ffffffff81fd2000 T dce_ipp_construct +ffffffff81fd2050 T dce_ipp_destroy +ffffffff81fd20a0 t dce_ipp_cursor_set_position +ffffffff81fd21d0 t dce_ipp_cursor_set_attributes +ffffffff81fd2460 t dce_ipp_program_prescale +ffffffff81fd2620 t dce_ipp_program_input_lut +ffffffff81fd2ab0 t dce_ipp_set_degamma +ffffffff81fd3000 T dce110_get_dig_frontend +ffffffff81fd30c0 T dce110_link_encoder_set_dp_phy_pattern_training_pattern +ffffffff81fd3160 T dce110_psr_program_dp_dphy_fast_training +ffffffff81fd31d0 T dce110_psr_program_secondary_packet +ffffffff81fd3240 T dce110_is_dig_enabled +ffffffff81fd32a0 T dce110_link_encoder_validate_dvi_output +ffffffff81fd3350 T dce110_link_encoder_validate_dp_output +ffffffff81fd3380 T dce110_link_encoder_construct +ffffffff81fd3550 T dce110_link_encoder_validate_output_with_stream +ffffffff81fd3700 T dce110_link_encoder_hw_init +ffffffff81fd3920 T dce110_link_encoder_destroy +ffffffff81fd3970 T dce110_link_encoder_setup +ffffffff81fd3aa0 T dce110_link_encoder_enable_tmds_output +ffffffff81fd3b90 T dce110_link_encoder_enable_lvds_output +ffffffff81fd3c80 T dce110_link_encoder_enable_dp_output +ffffffff81fd3e00 T dce110_link_encoder_enable_dp_mst_output +ffffffff81fd3f80 T dce110_link_encoder_disable_output +ffffffff81fd41a0 T dce110_link_encoder_dp_set_lane_settings +ffffffff81fd4340 T dce110_link_encoder_dp_set_phy_pattern +ffffffff81fd4b40 t set_dp_phy_pattern_hbr2_compliance_cp2520_2 +ffffffff81fd4d50 T dce110_link_encoder_update_mst_stream_allocation_table +ffffffff81fd4fd0 T dce110_link_encoder_connect_dig_be_to_fe +ffffffff81fd5100 T dce110_link_encoder_enable_hpd +ffffffff81fd5130 T dce110_link_encoder_disable_hpd +ffffffff81fd5160 T dce110_link_encoder_get_max_link_cap +ffffffff81fd6000 T dce_mem_input_construct +ffffffff81fd6060 T dce112_mem_input_construct +ffffffff81fd60c0 T dce120_mem_input_construct +ffffffff81fd6120 t dce_mi_program_display_marks +ffffffff81fd63f0 t dce_mi_allocate_dmif +ffffffff81fd6630 t dce_mi_free_dmif +ffffffff81fd6790 t dce_mi_program_surface_flip_and_addr +ffffffff81fd6ab0 t dce_mi_program_pte_vm +ffffffff81fd6c70 t dce_mi_program_surface_config +ffffffff81fd74f0 t dce_mi_is_flip_pending +ffffffff81fd7580 t program_nbp_watermark +ffffffff81fd7780 t dce112_mi_program_display_marks +ffffffff81fd7c90 t dce120_mi_program_display_marks +ffffffff81fd8150 t dce120_program_stutter_watermark +ffffffff81fd9000 T dce110_opp_set_clamping +ffffffff81fd92b0 T dce110_opp_program_bit_depth_reduction +ffffffff81fd9a80 T dce110_opp_program_clamping_and_pixel_encoding +ffffffff81fd9c20 T dce110_opp_set_dyn_expansion +ffffffff81fd9d70 T dce110_opp_program_fmt +ffffffff81fd9ef0 T dce110_opp_construct +ffffffff81fd9f50 T dce110_opp_destroy +ffffffff81fda000 T dce_panel_cntl_construct +ffffffff81fda060 t dce_panel_cntl_destroy +ffffffff81fda0b0 t dce_panel_cntl_hw_init +ffffffff81fda2f0 t dce_is_panel_backlight_on +ffffffff81fda3a0 t dce_is_panel_powered_on +ffffffff81fda450 t dce_store_backlight_level +ffffffff81fda4f0 t dce_driver_set_backlight +ffffffff81fda680 t dce_get_16_bit_backlight_from_pwm +ffffffff81fdb000 T get_filter_3tap_16p +ffffffff81fdb090 T get_filter_3tap_64p +ffffffff81fdb120 T get_filter_4tap_16p +ffffffff81fdb1b0 T get_filter_4tap_64p +ffffffff81fdb240 T get_filter_5tap_64p +ffffffff81fdb2d0 T get_filter_6tap_64p +ffffffff81fdb360 T get_filter_7tap_64p +ffffffff81fdb3f0 T get_filter_8tap_64p +ffffffff81fdb480 T get_filter_2tap_16p +ffffffff81fdb4b0 T get_filter_2tap_64p +ffffffff81fdc000 T dce110_se_audio_mute_control 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dce110_stream_encoder_dp_unblank +ffffffff81fdea60 t setup_stereo_sync +ffffffff81fdeae0 t dce110_stream_encoder_set_avmute +ffffffff81fdeb20 t dig_connect_to_otg +ffffffff81fdeb60 t dce110_reset_hdmi_stream_attribute +ffffffff81fdec60 t dig_source_otg +ffffffff81fdecd0 t dce110_stream_encoder_set_stream_attribute_helper +ffffffff81fdedc0 t dce110_update_generic_info_packet +ffffffff81fe0000 T dce_transform_get_optimal_number_of_taps +ffffffff81fe0300 T dce110_opp_set_csc_adjustment +ffffffff81fe03c0 t program_color_matrix +ffffffff81fe05f0 T dce110_opp_set_csc_default +ffffffff81fe0730 T dce110_opp_program_regamma_pwl +ffffffff81fe0ff0 T dce110_opp_power_on_regamma_lut +ffffffff81fe10b0 T dce110_opp_set_regamma_mode +ffffffff81fe1120 T dce_transform_construct +ffffffff81fe11a0 t dce_transform_reset +ffffffff81fe11e0 t dce_transform_set_scaler +ffffffff81fe1c80 t dce_transform_set_pixel_storage_depth +ffffffff81fe2140 t dce_transform_set_gamut_remap +ffffffff81fe2480 t program_multi_taps_filter +ffffffff81fe3000 T dmub_abm_create +ffffffff81fe30c0 T dmub_abm_destroy +ffffffff81fe3110 t dmub_abm_init +ffffffff81fe34f0 t dmub_abm_set_level +ffffffff81fe36b0 t dmub_abm_get_current_backlight +ffffffff81fe36e0 t dmub_abm_get_target_backlight +ffffffff81fe3710 t dmub_abm_init_config +ffffffff81fe3840 t dmub_abm_set_pause +ffffffff81fe4000 T dmub_hw_lock_mgr_cmd +ffffffff81fe40b0 T dmub_hw_lock_mgr_inbox0_cmd +ffffffff81fe40f0 T should_use_dmub_lock +ffffffff81fe5000 T dmub_enable_outbox_notification +ffffffff81fe6000 T dmub_psr_create +ffffffff81fe60a0 T dmub_psr_destroy +ffffffff81fe60f0 t dmub_psr_copy_settings +ffffffff81fe65a0 t dmub_psr_enable +ffffffff81fe6730 t dmub_psr_get_state +ffffffff81fe6a20 t dmub_psr_set_level +ffffffff81fe6b10 t dmub_psr_force_static +ffffffff81fe6bc0 t dmub_psr_get_residency +ffffffff81fe6c10 t dmub_psr_set_sink_vtotal_in_psr_active +ffffffff81fe6cd0 t dmub_psr_set_power_opt +ffffffff81fe7000 T dce100_enable_display_power_gating +ffffffff81fe70a0 T dce100_prepare_bandwidth +ffffffff81fe70f0 T dce100_optimize_bandwidth +ffffffff81fe7140 T dce100_hw_sequencer_construct +ffffffff81fe8000 T dce100_add_stream_to_ctx +ffffffff81fe80a0 T dce100_validate_plane +ffffffff81fe80e0 T dce100_find_first_free_match_stream_enc_for_link +ffffffff81fe8190 T dce100_create_resource_pool +ffffffff81fe8f40 t dce100_resource_destruct +ffffffff81fe9210 t dce100_destroy_resource_pool +ffffffff81fe9270 t dce100_panel_cntl_create +ffffffff81fe9300 t dce100_link_encoder_create +ffffffff81fe9410 t dce100_validate_bandwidth +ffffffff81fe9570 t dce100_validate_global +ffffffff81fe9600 t read_dce_straps +ffffffff81fe9660 t create_audio +ffffffff81fe9690 t dce100_stream_encoder_create +ffffffff81fe9730 t dce100_hwseq_create +ffffffff81fea000 T dce110_compressor_power_up_fbc +ffffffff81fea130 T dce110_compressor_enable_fbc +ffffffff81fea340 T dce110_compressor_is_fbc_enabled_in_hw +ffffffff81fea3f0 T dce110_compressor_disable_fbc +ffffffff81fea6d0 T dce110_compressor_program_compressed_surface_address_and_pitch +ffffffff81fea7f0 T dce110_compressor_set_fbc_invalidation_triggers +ffffffff81fea870 T dce110_compressor_create +ffffffff81fea920 T dce110_compressor_construct +ffffffff81fea9a0 T dce110_compressor_destroy +ffffffff81fea9f0 T get_max_support_fbc_buffersize +ffffffff81feb000 T dce110_update_info_frame +ffffffff81feb0d0 T dce110_enable_stream +ffffffff81feb1d0 T dce110_edp_wait_for_hpd_ready +ffffffff81feb410 T dce110_edp_power_control +ffffffff81feb8d0 T dce110_edp_wait_for_T12 +ffffffff81feba60 T dce110_edp_backlight_control +ffffffff81febd90 T dce110_enable_audio_stream +ffffffff81febea0 T dce110_disable_audio_stream +ffffffff81fec010 T dce110_disable_stream +ffffffff81fec150 T dce110_unblank_stream +ffffffff81fec250 T dce110_blank_stream +ffffffff81fec3a0 T dce110_set_avmute +ffffffff81fec3f0 T dce110_enable_accelerated_mode +ffffffff81fec7b0 t power_down_all_hw_blocks +ffffffff81fec970 T dce110_set_safe_displaymarks +ffffffff81fecac0 T dce110_apply_ctx_to_hw +ffffffff81fed390 t enable_fbc +ffffffff81fed540 T dce110_power_down +ffffffff81fed640 T dce110_prepare_bandwidth +ffffffff81fed780 T dce110_optimize_bandwidth +ffffffff81fed950 T dce110_set_backlight_level +ffffffff81feda60 T dce110_set_abm_immediate_disable +ffffffff81fedae0 T dce110_set_pipe +ffffffff81fedb50 T dce110_enable_lvds_link_output +ffffffff81fedbb0 T dce110_enable_tmds_link_output +ffffffff81fedc20 T dce110_enable_dp_link_output +ffffffff81fede30 T dce110_disable_link_output +ffffffff81fedf40 T dce110_hw_sequencer_construct +ffffffff81fedf90 t enable_display_pipe_clock_gating +ffffffff81fedfc0 t build_audio_output +ffffffff81fee120 t init_hw +ffffffff81fee3e0 t dce110_power_down_fe +ffffffff81fee4b0 t dce110_apply_ctx_for_surface +ffffffff81feebd0 t dce110_post_unlock_program_front_end +ffffffff81feec00 t update_plane_addr +ffffffff81feec70 t dce110_wait_for_mpcc_disconnect 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dce110_resource_destruct +ffffffff81ff64e0 t dce110_destroy_resource_pool +ffffffff81ff6540 t dce110_panel_cntl_create +ffffffff81ff65d0 t dce110_link_encoder_create +ffffffff81ff66e0 t dce110_validate_bandwidth +ffffffff81ff67d0 t dce110_validate_global +ffffffff81ff6890 t dce110_acquire_underlay +ffffffff81ff6a70 t dce110_validate_plane +ffffffff81ff6ad0 t dce110_add_stream_to_ctx +ffffffff81ff6ba0 t read_dce_straps +ffffffff81ff6c00 t create_audio +ffffffff81ff6c30 t dce110_stream_encoder_create +ffffffff81ff6cd0 t dce110_hwseq_create +ffffffff81ff7000 T dce110_timing_generator_set_early_control +ffffffff81ff7070 T dce110_timing_generator_enable_crtc +ffffffff81ff7100 T dce110_timing_generator_program_blank_color +ffffffff81ff7190 T dce110_timing_generator_disable_crtc +ffffffff81ff71e0 T dce110_timing_generator_program_timing_generator +ffffffff81ff73d0 T dce110_timing_generator_set_drr +ffffffff81ff7510 T dce110_timing_generator_set_static_screen_control +ffffffff81ff75a0 T dce110_timing_generator_get_vblank_counter +ffffffff81ff7600 T dce110_timing_generator_get_position +ffffffff81ff76a0 T dce110_timing_generator_get_crtc_scanoutpos +ffffffff81ff7790 T dce110_timing_generator_program_blanking +ffffffff81ff7a10 T dce110_timing_generator_set_test_pattern +ffffffff81ff7d00 T dce110_timing_generator_validate_timing +ffffffff81ff7de0 T dce110_timing_generator_wait_for_vblank +ffffffff81ff7f50 T dce110_timing_generator_is_counter_moving +ffffffff81ff7fd0 T dce110_timing_generator_wait_for_vactive +ffffffff81ff80b0 T dce110_timing_generator_setup_global_swap_lock +ffffffff81ff8210 T dce110_timing_generator_tear_down_global_swap_lock +ffffffff81ff8290 T dce110_timing_generator_enable_advanced_request +ffffffff81ff8330 T dce110_timing_generator_set_lock_master +ffffffff81ff8390 T dce110_timing_generator_enable_reset_trigger +ffffffff81ff8470 T dce110_timing_generator_enable_crtc_reset +ffffffff81ff8660 T dce110_timing_generator_disable_reset_trigger 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dce112_compressor_create +ffffffff81ffcfe0 T dce112_compressor_destroy +ffffffff81ffe000 T dce112_hw_sequencer_construct +ffffffff81ffe050 t dce112_enable_display_power_gating +ffffffff81fff000 T dce112_validate_bandwidth +ffffffff81fff0c0 T resource_map_phy_clock_resources +ffffffff81fff210 T dce112_add_stream_to_ctx +ffffffff81fff2b0 T dce112_create_resource_pool +ffffffff82000650 t dce112_resource_destruct +ffffffff82000920 t dce112_destroy_resource_pool +ffffffff82000980 t dce112_panel_cntl_create +ffffffff82000a10 t dce112_link_encoder_create +ffffffff82000b20 t dce112_validate_global +ffffffff82000bb0 t read_dce_straps +ffffffff82000c10 t create_audio +ffffffff82000c40 t dce112_stream_encoder_create +ffffffff82000ce0 t dce112_hwseq_create +ffffffff82001000 T dce121_xgmi_enabled +ffffffff82001060 T dce120_hw_sequencer_construct +ffffffff820010c0 t dce120_enable_display_power_gating +ffffffff820010f0 t dce120_update_dchub +ffffffff82002000 T dce120_create_resource_pool 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dpp1_program_bias_and_scale +ffffffff8200fe60 T dpp1_program_degamma_lutb_settings +ffffffff82010010 T dpp1_program_degamma_luta_settings +ffffffff820101c0 T dpp1_power_on_degamma_lut +ffffffff82010240 T dpp1_set_degamma +ffffffff82010430 T dpp1_degamma_ram_select +ffffffff82010490 T dpp1_program_degamma_lut +ffffffff820107b0 T dpp1_set_degamma_pwl +ffffffff82010980 T dpp1_full_bypass +ffffffff82010b20 T dpp1_program_input_lut +ffffffff820111f0 T dpp1_set_hdr_multiplier +ffffffff82012000 T dpp1_dscl_calc_lb_num_partitions +ffffffff820121e0 T dpp1_dscl_is_lb_conf_valid +ffffffff82012220 T dpp1_dscl_set_scaler_manual_scale +ffffffff820135e0 t dpp1_dscl_get_filter_coeffs_64p +ffffffff820136b0 t dpp1_dscl_set_scaler_filter +ffffffff82014000 T hubbub1_wm_read_state +ffffffff82014380 T hubbub1_allow_self_refresh_control +ffffffff82014400 T hubbub1_is_allow_self_refresh_enabled +ffffffff82014470 T hubbub1_verify_allow_pstate_change_high +ffffffff82014630 T hubbub1_wm_change_req_wa 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dcn10_dummy_display_power_gating +ffffffff82022990 T dcn10_update_pending_status +ffffffff82022ad0 T dcn10_update_dchub +ffffffff82022b00 T dcn10_set_cursor_position +ffffffff82023040 T dcn10_set_cursor_attribute +ffffffff82023090 T dcn10_set_cursor_sdr_white_level +ffffffff82023160 T dcn10_get_vupdate_offset_from_vsync +ffffffff820231f0 T dcn10_calc_vupdate_position +ffffffff82023280 T dcn10_setup_periodic_interrupt +ffffffff82023390 T dcn10_setup_vupdate_interrupt +ffffffff82023450 T dcn10_unblank_stream +ffffffff82023560 T dcn10_send_immediate_sdp_message +ffffffff820235c0 T dcn10_set_clock +ffffffff820236d0 T dcn10_get_clock +ffffffff82023730 T dcn10_get_dcc_en_bits +ffffffff82024000 T snprintf_count +ffffffff82024090 T dcn10_clear_status_bits +ffffffff82024240 T dcn10_get_hw_state +ffffffff82026000 T dcn10_hw_sequencer_construct +ffffffff82027000 T dcn10_ipp_construct +ffffffff82027050 T dcn20_ipp_construct +ffffffff820270a0 t dcn10_ipp_destroy +ffffffff82028000 T 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optc1_is_stereo_left_eye +ffffffff82030020 T optc1_get_hw_timing +ffffffff82030140 T optc1_read_otg_state +ffffffff82030450 T optc1_get_otg_active_size +ffffffff82030560 T optc1_clear_optc_underflow +ffffffff820305b0 T optc1_tg_init +ffffffff82030660 T optc1_is_tg_enabled +ffffffff820306d0 T optc1_is_optc_underflow_occurred +ffffffff82030740 T optc1_configure_crc +ffffffff820309d0 T optc1_get_crc +ffffffff82030ae0 T dcn10_timing_generator_init +ffffffff82030b50 t optc1_enable_crtc +ffffffff82030c50 t optc1_set_test_pattern +ffffffff82031330 t optc1_program_manual_trigger +ffffffff820313e0 t optc1_setup_manual_trigger +ffffffff82032000 T dcn10_find_first_free_match_stream_enc_for_link +ffffffff820320b0 T dcn10_create_resource_pool +ffffffff82033260 t dcn10_resource_construct_fp +ffffffff820333e0 t dcn10_resource_destruct +ffffffff820336f0 t dcn10_destroy_resource_pool +ffffffff82033750 t dcn10_panel_cntl_create +ffffffff820337e0 t dcn10_link_encoder_create +ffffffff820338e0 t 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dcn20_acquire_idle_pipe_for_layer +ffffffff8205fea0 T dcn20_get_dcc_compression_cap +ffffffff8205fed0 T dcn20_patch_unknown_plane_state +ffffffff8205ff30 T dcn20_dwbc_create +ffffffff82060050 T dcn20_mmhubbub_create +ffffffff820601b0 T dcn20_create_resource_pool +ffffffff82061a00 t dcn20_resource_destruct +ffffffff82061ea0 t dcn20_destroy_resource_pool +ffffffff82061f00 t dcn20_panel_cntl_create +ffffffff82061f90 t read_dce_straps +ffffffff82061fc0 t dcn20_create_audio +ffffffff82062000 T enc2_set_dynamic_metadata +ffffffff82062280 T enc2_stream_encoder_dp_unblank +ffffffff820625b0 T enc2_stream_encoder_dp_set_stream_attribute +ffffffff82062610 T enc2_get_fifo_cal_average_level +ffffffff82062670 T dcn20_stream_encoder_construct +ffffffff820626d0 t enc2_stream_encoder_update_hdmi_info_packets +ffffffff820627a0 t enc2_stream_encoder_stop_hdmi_info_packets +ffffffff82062aa0 t enc2_stream_encoder_update_dp_info_packets +ffffffff82062b50 t enc2_read_state +ffffffff82062cd0 t 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enc3_dp_set_odm_combine +ffffffff82085000 T dpp30_read_state +ffffffff82085050 T dpp3_program_post_csc +ffffffff82085230 T dpp3_set_pre_degam +ffffffff820852e0 T dpp3_cnv_setup +ffffffff82085ba0 T dpp3_set_cursor_attributes +ffffffff82085d20 T dpp3_get_optimal_number_of_taps +ffffffff82086790 T dpp3_construct +ffffffff820867f0 t dpp3_deferred_update +ffffffff82086bc0 t dpp3_program_blnd_lut +ffffffff82087630 t dpp3_program_shaper +ffffffff82089680 t dpp3_program_3dlut +ffffffff82089e50 t dpp3_set3dlut_ram12 +ffffffff8208b000 T dpp3_program_cm_dealpha +ffffffff8208b0a0 T dpp3_program_cm_bias +ffffffff8208b190 T dpp3_program_gamcor_lut +ffffffff8208bbd0 t dpp3_power_on_gamcor_lut +ffffffff8208bd00 T dpp3_set_hdr_multiplier +ffffffff8208bd50 T dpp3_cm_set_gamut_remap +ffffffff8208c000 T dwb3_config_fc +ffffffff8208c1b0 T dwb3_set_stereo +ffffffff8208c270 T dwb3_enable +ffffffff8208c3a0 T dwb3_set_denorm +ffffffff8208c4c0 T dwb3_disable +ffffffff8208c570 T dwb3_update +ffffffff8208c6a0 T dwb3_is_enabled +ffffffff8208c740 T dwb3_set_new_content +ffffffff8208c780 t dwb3_get_caps +ffffffff8208c820 T dcn30_dwbc_construct +ffffffff8208c870 T dwb3_set_host_read_rate_control +ffffffff8208d000 T dwb3_ogam_set_input_transfer_func +ffffffff8208d9d0 T dwb3_set_gamut_remap +ffffffff8208db30 t dwb3_program_gamut_remap +ffffffff8208dcc0 T dwb3_program_hdr_mult +ffffffff8208e000 T hubbub3_init_dchub_sys_ctx +ffffffff8208e1e0 T hubbub3_program_watermarks +ffffffff8208e2f0 T hubbub3_dcc_support_swizzle +ffffffff8208e3c0 T hubbub3_get_dcc_compression_cap +ffffffff8208e5b0 T hubbub3_force_wm_propagate_to_pipes +ffffffff8208e660 T hubbub3_force_pstate_change_control +ffffffff8208e6e0 T hubbub3_init_watermarks +ffffffff8208ea20 T hubbub3_construct +ffffffff8208f000 T hubp3_set_vm_system_aperture_settings +ffffffff8208f130 T hubp3_program_surface_flip_and_addr +ffffffff8208fb60 T hubp3_dcc_control +ffffffff8208fc20 T hubp3_dcc_control_sienna_cichlid +ffffffff8208fd30 T hubp3_dmdata_set_attributes +ffffffff8208ff30 T hubp3_program_surface_config +ffffffff82090230 T hubp3_read_state +ffffffff820904a0 T hubp3_setup +ffffffff82090530 T hubp3_init +ffffffff82090560 T hubp3_construct +ffffffff82091000 T dcn30_set_blend_lut +ffffffff82091070 T dcn30_set_input_transfer_func +ffffffff820911d0 T dcn30_set_output_transfer_func +ffffffff820914f0 T dcn30_update_writeback +ffffffff82091580 t dcn30_set_writeback +ffffffff82091730 T dcn30_mmhubbub_warmup +ffffffff820919e0 T dcn30_enable_writeback +ffffffff82091ab0 T dcn30_disable_writeback +ffffffff82091b90 T dcn30_program_all_writeback_pipes_in_tree +ffffffff82091e80 T dcn30_init_hw +ffffffff82092770 T dcn30_set_avmute +ffffffff820927d0 T dcn30_update_info_frame +ffffffff820928a0 T dcn30_program_dmdata_engine +ffffffff82092940 T dcn30_apply_idle_power_optimizations +ffffffff82092ec0 T dcn30_does_plane_fit_in_mall +ffffffff82092f70 T dcn30_hardware_release +ffffffff82093080 T dcn30_set_disp_pattern_generator +ffffffff820930f0 T dcn30_prepare_bandwidth +ffffffff82094000 T dcn30_hw_sequencer_construct +ffffffff82095000 t mmhubbub3_warmup_mcif +ffffffff82095210 t mmhubbub3_config_mcif_buf +ffffffff820956c0 t mmhubbub3_config_mcif_arb +ffffffff82095b10 T dcn30_mmhubbub_construct +ffffffff82096000 T mpc3_is_dwb_idle +ffffffff82096070 T mpc3_set_dwb_mux +ffffffff820960f0 T mpc3_disable_dwb_mux +ffffffff82096170 T mpc3_set_out_rate_control +ffffffff82096280 T mpc3_get_ogam_current +ffffffff82096320 T mpc3_power_on_ogam_lut +ffffffff820963f0 T mpc3_set_output_gamma +ffffffff82096f90 T mpc3_set_denorm +ffffffff82097000 T mpc3_set_denorm_clamp +ffffffff82097150 T mpc3_program_shaper +ffffffff820993c0 t mpc3_power_on_shaper_3dlut +ffffffff82099740 T mpc3_init_mpcc +ffffffff820997c0 T mpc3_set_gamut_remap +ffffffff82099a10 T mpc3_program_3dlut +ffffffff8209a1a0 t mpc3_set3dlut_ram12 +ffffffff8209a380 T mpc3_set_output_csc +ffffffff8209a4f0 T mpc3_set_ocsc_default +ffffffff8209a660 T mpc3_set_rmu_mux +ffffffff8209a700 T mpc3_get_rmu_mux_status +ffffffff8209a7b0 T mpcc3_acquire_rmu +ffffffff8209a910 t mpcc3_release_rmu +ffffffff8209aa80 t mpc3_set_mpc_mem_lp_mode +ffffffff8209ac10 T dcn30_mpc_construct +ffffffff8209b000 T optc3_triplebuffer_lock +ffffffff8209b120 T optc3_lock_doublebuffer_enable +ffffffff8209b3b0 T optc3_lock_doublebuffer_disable +ffffffff8209b4c0 T optc3_lock +ffffffff8209b590 T optc3_set_out_mux +ffffffff8209b5d0 T optc3_program_blank_color +ffffffff8209b710 T optc3_set_drr_trigger_window +ffffffff8209b7a0 T optc3_set_vtotal_change_limit +ffffffff8209b810 T optc3_set_dsc_config +ffffffff8209b860 T optc3_set_odm_bypass +ffffffff8209b9e0 T optc3_wait_drr_doublebuffer_pending_clear +ffffffff8209ba60 T optc3_set_vtotal_min_max +ffffffff8209ba80 T optc3_tg_init +ffffffff8209bae0 T dcn30_timing_generator_init +ffffffff8209bb50 t optc3_set_odm_combine +ffffffff8209c000 T dcn30_add_stream_to_ctx +ffffffff8209c020 T dcn30_populate_dml_pipes_from_context +ffffffff8209c110 T dcn30_populate_dml_writeback_from_context +ffffffff8209c170 T dcn30_calc_max_scaled_time +ffffffff8209c1d0 T dcn30_set_mcif_arb_params +ffffffff8209c340 T dcn30_acquire_post_bldn_3dlut +ffffffff8209c4c0 T dcn30_release_post_bldn_3dlut +ffffffff8209c570 T dcn30_internal_validate_bw +ffffffff8209d340 t dcn30_split_stream_for_mpc_or_odm +ffffffff8209d660 T dcn30_can_support_mclk_switch_using_fw_based_vblank_stretch +ffffffff8209d780 T dcn30_setup_mclk_switch_using_fw_based_vblank_stretch +ffffffff8209d820 T dcn30_update_soc_for_wm_a +ffffffff8209d870 T dcn30_calculate_wm_and_dlg +ffffffff8209d8e0 T dcn30_validate_bandwidth +ffffffff8209dd20 T dcn30_update_bw_bounding_box +ffffffff8209e500 T dcn30_create_resource_pool +ffffffff8209fad0 t dcn30_resource_destruct +ffffffff820a0040 t dcn30_destroy_resource_pool +ffffffff820a00a0 t dcn30_panel_cntl_create +ffffffff820a0130 t dcn30_link_encoder_create +ffffffff820a01f0 t read_dce_straps +ffffffff820a0220 t dcn30_create_audio +ffffffff820a0250 t dcn30_stream_encoder_create +ffffffff820a03d0 t dcn30_hwseq_create +ffffffff820a1000 T vpg3_update_generic_info_packet +ffffffff820a19a0 T vpg3_construct +ffffffff820a2000 T dccg301_create +ffffffff820a3000 T dcn301_link_encoder_construct +ffffffff820a4000 T hubbub301_construct +ffffffff820a5000 T dcn301_hw_sequencer_construct +ffffffff820a6000 T dcn301_panel_cntl_construct +ffffffff820a6050 t dcn301_panel_cntl_destroy +ffffffff820a60a0 t dcn301_panel_cntl_hw_init +ffffffff820a62b0 t dcn301_is_panel_backlight_on +ffffffff820a6310 t dcn301_is_panel_powered_on +ffffffff820a63c0 t dcn301_store_backlight_level +ffffffff820a6460 t dcn301_get_16_bit_backlight_from_pwm +ffffffff820a7000 T dcn301_create_resource_pool +ffffffff820a85a0 t dcn301_destruct +ffffffff820a8ae0 t dcn301_destroy_resource_pool +ffffffff820a8b40 t dcn301_panel_cntl_create +ffffffff820a8bd0 t dcn301_link_encoder_create +ffffffff820a8c90 t dcn301_calculate_wm_and_dlg +ffffffff820a8d00 t read_dce_straps +ffffffff820a8d30 t dcn301_create_audio +ffffffff820a8d60 t dcn301_stream_encoder_create +ffffffff820a8ee0 t dcn301_hwseq_create +ffffffff820a9000 T dcn302_dpp_pg_control +ffffffff820a92a0 T dcn302_hubp_pg_control +ffffffff820a9550 T dcn302_dsc_pg_control +ffffffff820aa000 T dcn302_hw_sequencer_construct +ffffffff820ab000 T dcn302_update_bw_bounding_box +ffffffff820ab050 T dcn302_create_resource_pool +ffffffff820ac3e0 t dcn302_resource_destruct +ffffffff820ac8f0 t dcn302_destroy_resource_pool +ffffffff820ac940 t dcn302_panel_cntl_create +ffffffff820ac9d0 t dcn302_link_encoder_create +ffffffff820aca90 t read_dce_straps +ffffffff820acac0 t dcn302_create_audio +ffffffff820acaf0 t dcn302_stream_encoder_create +ffffffff820acc70 t dcn302_hwseq_create +ffffffff820ad000 T dcn303_dpp_pg_control +ffffffff820ad030 T dcn303_hubp_pg_control +ffffffff820ad060 T dcn303_dsc_pg_control +ffffffff820ad090 T dcn303_enable_power_gating_plane +ffffffff820ae000 T dcn303_hw_sequencer_construct +ffffffff820af000 T dcn303_update_bw_bounding_box +ffffffff820af050 T dcn303_create_resource_pool +ffffffff820b0290 t dcn303_resource_destruct +ffffffff820b07b0 t dcn303_destroy_resource_pool +ffffffff820b0800 t dcn303_panel_cntl_create +ffffffff820b0890 t dcn303_link_encoder_create +ffffffff820b0950 t read_dce_straps +ffffffff820b0980 t dcn303_create_audio +ffffffff820b09b0 t dcn303_stream_encoder_create +ffffffff820b0b30 t dcn303_hwseq_create +ffffffff820b1000 T afmt31_powerdown +ffffffff820b1090 T afmt31_poweron +ffffffff820b1120 T afmt31_construct +ffffffff820b2000 T apg31_construct +ffffffff820b2050 t apg31_se_audio_setup +ffffffff820b2160 t apg31_audio_mute_control +ffffffff820b21a0 t apg31_enable +ffffffff820b22b0 t apg31_disable +ffffffff820b3000 T dccg31_update_dpp_dto +ffffffff820b31c0 T dccg31_set_dpstreamclk +ffffffff820b3350 t dccg31_disable_dpstreamclk +ffffffff820b34a0 T dccg31_enable_symclk32_se +ffffffff820b3790 T dccg31_disable_symclk32_se +ffffffff820b3a60 T dccg31_enable_symclk32_le +ffffffff820b3c30 T dccg31_disable_symclk32_le +ffffffff820b3dd0 T dccg31_disable_dscclk +ffffffff820b3f90 T dccg31_enable_dscclk +ffffffff820b4160 T dccg31_set_physymclk +ffffffff820b4680 T dccg31_set_dtbclk_dto +ffffffff820b4930 T dccg31_set_audio_dtbclk_dto +ffffffff820b4a40 T dccg31_get_dccg_ref_freq +ffffffff820b4a70 T dccg31_set_dispclk_change_mode +ffffffff820b4ac0 T dccg31_init +ffffffff820b5020 T dccg31_otg_add_pixel +ffffffff820b5060 T dccg31_otg_drop_pixel +ffffffff820b50a0 T dccg31_create +ffffffff820b6000 T dcn31_link_encoder_set_dio_phy_mux +ffffffff820b6390 T dcn31_link_encoder_construct +ffffffff820b6590 T dcn31_link_encoder_construct_minimal +ffffffff820b6610 T dcn31_link_encoder_enable_dp_output +ffffffff820b6850 T dcn31_link_encoder_enable_dp_mst_output +ffffffff820b6a90 T dcn31_link_encoder_disable_output +ffffffff820b6d20 T dcn31_link_encoder_is_in_alt_mode +ffffffff820b6e60 T dcn31_link_encoder_get_max_link_cap +ffffffff820b6fd0 t enc31_hw_init +ffffffff820b8000 T dcn31_hpo_dp_link_enc_enable +ffffffff820b8160 T dcn31_hpo_dp_link_enc_disable +ffffffff820b81d0 T dcn31_hpo_dp_link_enc_set_link_test_pattern +ffffffff820b8b00 T dcn31_hpo_dp_link_enc_update_stream_allocation_table +ffffffff820b8d90 T dcn31_hpo_dp_link_enc_set_throttled_vcp_size +ffffffff820b9030 T dcn31_hpo_dp_link_enc_read_state +ffffffff820b92e0 T dcn31_hpo_dp_link_enc_enable_dp_output +ffffffff820b93e0 T dcn31_hpo_dp_link_enc_disable_output +ffffffff820b9520 T dcn31_hpo_dp_link_enc_set_ffe +ffffffff820b9610 T hpo_dp_link_encoder31_construct +ffffffff820b9670 t dcn31_hpo_dp_link_enc_is_in_alt_mode +ffffffff820ba000 T dcn31_hpo_dp_stream_encoder_construct +ffffffff820ba070 t dcn31_hpo_dp_stream_enc_enable_stream +ffffffff820ba1b0 t dcn31_hpo_dp_stream_enc_dp_unblank +ffffffff820ba460 t dcn31_hpo_dp_stream_enc_dp_blank +ffffffff820ba560 t dcn31_hpo_dp_stream_enc_disable +ffffffff820ba5d0 t dcn31_hpo_dp_stream_enc_set_stream_attribute +ffffffff820bae80 t dcn31_hpo_dp_stream_enc_update_dp_info_packets +ffffffff820bb040 t dcn31_hpo_dp_stream_enc_stop_dp_info_packets +ffffffff820bb1d0 t dcn31_hpo_dp_stream_enc_set_dsc_pps_info_packet +ffffffff820bb470 t dcn31_hpo_dp_stream_enc_map_stream_to_link +ffffffff820bb570 t dcn31_hpo_dp_stream_enc_mute_control +ffffffff820bb5e0 t dcn31_hpo_dp_stream_enc_audio_setup +ffffffff820bb690 t dcn31_hpo_dp_stream_enc_audio_enable +ffffffff820bb760 t dcn31_hpo_dp_stream_enc_audio_disable +ffffffff820bb910 t dcn31_hpo_dp_stream_enc_read_state +ffffffff820bbaa0 t dcn31_set_hblank_min_symbol_width +ffffffff820bc000 T hubbub31_init_dchub_sys_ctx +ffffffff820bc1f0 T hubbub31_construct +ffffffff820bc290 t hubbub31_get_dcc_compression_cap +ffffffff820bc480 t hubbub31_get_dchub_ref_freq +ffffffff820bc560 t hubbub31_program_watermarks +ffffffff820bde20 t hubbub31_verify_allow_pstate_change_high +ffffffff820bdfe0 t dcn31_program_det_size +ffffffff820be1a0 t dcn31_program_compbuf_size +ffffffff820be420 t dcn31_init_crb +ffffffff820bf000 T hubp31_set_unbounded_requesting +ffffffff820bf090 T hubp31_soft_reset +ffffffff820bf0e0 T hubp31_construct +ffffffff820bf150 t hubp31_program_extended_blank +ffffffff820c0000 T dcn31_init_hw +ffffffff820c0960 T dcn31_dsc_pg_control +ffffffff820c0cb0 T dcn31_enable_power_gating_plane +ffffffff820c0f10 T dcn31_update_info_frame +ffffffff820c0fe0 T dcn31_z10_save_init +ffffffff820c10a0 T dcn31_z10_restore +ffffffff820c1180 T dcn31_hubp_pg_control +ffffffff820c14a0 T dcn31_init_sys_ctx +ffffffff820c1550 T dcn31_reset_hw_ctx_wrap +ffffffff820c18c0 T dcn31_setup_hpo_hw_control +ffffffff820c2000 T dcn31_hw_sequencer_construct +ffffffff820c3000 T optc31_immediate_disable_crtc +ffffffff820c3100 T optc31_set_drr +ffffffff820c3320 T optc3_init_odm +ffffffff820c3490 T dcn31_timing_generator_init +ffffffff820c3500 t optc31_enable_crtc +ffffffff820c3600 t optc31_disable_crtc +ffffffff820c36e0 t optc31_set_odm_combine +ffffffff820c4000 T dcn31_panel_cntl_construct +ffffffff820c4040 t dcn31_panel_cntl_destroy +ffffffff820c4090 t dcn31_panel_cntl_hw_init +ffffffff820c4180 t dcn31_is_panel_backlight_on +ffffffff820c4220 t dcn31_is_panel_powered_on +ffffffff820c42d0 t dcn31_store_backlight_level +ffffffff820c4390 t dcn31_get_16_bit_backlight_from_pwm +ffffffff820c5000 T dcn31_populate_dml_pipes_from_context +ffffffff820c5350 T dcn31_calculate_wm_and_dlg +ffffffff820c53d0 T dcn31_populate_dml_writeback_from_context +ffffffff820c5430 T dcn31_set_mcif_arb_params +ffffffff820c5490 T dcn31_validate_bandwidth +ffffffff820c5880 T dcn31_create_resource_pool +ffffffff820c6c20 t dcn31_resource_destruct +ffffffff820c7280 t dcn31_destroy_resource_pool +ffffffff820c72e0 t dcn31_panel_cntl_create +ffffffff820c7350 t dcn31_link_encoder_create +ffffffff820c7410 t dcn31_link_enc_create_minimal +ffffffff820c74b0 t dcn31_get_panel_config_defaults +ffffffff820c7520 t read_dce_straps +ffffffff820c7550 t dcn31_create_audio +ffffffff820c7580 t dcn31_stream_encoder_create +ffffffff820c7700 t dcn31_hpo_dp_stream_encoder_create +ffffffff820c78c0 t dcn31_hpo_dp_link_encoder_create +ffffffff820c7950 t dcn31_hwseq_create +ffffffff820c8000 T vpg31_powerdown +ffffffff820c8090 T vpg31_poweron +ffffffff820c8120 T vpg31_construct +ffffffff820c9000 T dccg314_create +ffffffff820c90b0 t dccg314_set_dpstreamclk +ffffffff820c9480 t dccg314_set_dtbclk_dto +ffffffff820c9670 t dccg314_set_pixel_rate_div +ffffffff820c99e0 t dccg314_set_valid_pixel_rate +ffffffff820ca000 T dcn314_dio_stream_encoder_construct +ffffffff820ca070 t enc314_stream_encoder_hdmi_set_stream_attribute +ffffffff820ca660 t enc314_stream_encoder_dvi_set_stream_attribute +ffffffff820ca870 t enc314_stream_encoder_dp_blank +ffffffff820ca8c0 t enc314_stream_encoder_dp_unblank +ffffffff820cac00 t enc314_read_state +ffffffff820cad60 t enc314_dp_set_dsc_config +ffffffff820cadb0 t enc314_dp_set_odm_combine +ffffffff820cadf0 t enc314_set_dig_input_mode +ffffffff820cae40 t enc314_enable_fifo +ffffffff820caee0 t enc314_disable_fifo +ffffffff820caf30 t enc314_reset_fifo +ffffffff820cc000 T dcn314_update_odm +ffffffff820cc610 T dcn314_dsc_pg_control +ffffffff820cc9e0 T dcn314_enable_power_gating_plane +ffffffff820ccc70 T dcn314_calculate_dccg_k1_k2_values +ffffffff820cce00 T dcn314_set_pixels_per_cycle +ffffffff820ccef0 T dcn314_hubp_pg_control +ffffffff820ce000 T dcn314_hw_sequencer_construct +ffffffff820cf000 T dcn314_timing_generator_init +ffffffff820cf070 t optc314_enable_crtc +ffffffff820cf170 t optc314_disable_crtc +ffffffff820cf250 t optc314_phantom_crtc_post_enable +ffffffff820cf310 t optc314_set_odm_bypass +ffffffff820cf480 t optc314_set_odm_combine +ffffffff820cf780 t optc314_set_h_timing_div_manual_mode +ffffffff820d0000 T dcn314_validate_bandwidth +ffffffff820d04a0 T dcn314_create_resource_pool +ffffffff820d1770 t dcn314_resource_destruct +ffffffff820d1dd0 t dcn314_destroy_resource_pool +ffffffff820d1e30 t dcn31_panel_cntl_create +ffffffff820d1ea0 t dcn31_link_encoder_create +ffffffff820d1f60 t dcn31_link_enc_create_minimal +ffffffff820d2000 t dcn314_populate_dml_pipes_from_context +ffffffff820d2090 t dcn314_update_bw_bounding_box +ffffffff820d20e0 t dcn314_get_panel_config_defaults +ffffffff820d2150 t read_dce_straps +ffffffff820d2180 t dcn31_create_audio +ffffffff820d21b0 t dcn314_stream_encoder_create +ffffffff820d2330 t dcn31_hpo_dp_stream_encoder_create +ffffffff820d24f0 t dcn31_hpo_dp_link_encoder_create +ffffffff820d2580 t dcn314_hwseq_create +ffffffff820d3000 T dcn315_create_resource_pool +ffffffff820d4270 t dcn315_resource_destruct +ffffffff820d48d0 t dcn315_destroy_resource_pool +ffffffff820d4930 t dcn31_panel_cntl_create +ffffffff820d49a0 t dcn31_link_encoder_create +ffffffff820d4a60 t dcn31_link_enc_create_minimal +ffffffff820d4b00 t dcn315_populate_dml_pipes_from_context +ffffffff820d4e50 t dcn315_get_panel_config_defaults +ffffffff820d4ec0 t read_dce_straps +ffffffff820d4ef0 t dcn31_create_audio +ffffffff820d4f20 t dcn315_stream_encoder_create +ffffffff820d50a0 t dcn31_hpo_dp_stream_encoder_create +ffffffff820d5260 t dcn31_hpo_dp_link_encoder_create +ffffffff820d52f0 t dcn31_hwseq_create +ffffffff820d6000 T dcn316_create_resource_pool +ffffffff820d72b0 t dcn316_resource_destruct +ffffffff820d7910 t dcn316_destroy_resource_pool +ffffffff820d7970 t dcn31_panel_cntl_create +ffffffff820d79e0 t dcn31_link_encoder_create +ffffffff820d7aa0 t dcn31_link_enc_create_minimal +ffffffff820d7b40 t dcn316_populate_dml_pipes_from_context +ffffffff820d7e70 t dcn316_get_panel_config_defaults +ffffffff820d7ee0 t read_dce_straps +ffffffff820d7f10 t dcn31_create_audio +ffffffff820d7f40 t dcn316_stream_encoder_create +ffffffff820d80c0 t dcn31_hpo_dp_stream_encoder_create +ffffffff820d8280 t dcn31_hpo_dp_link_encoder_create +ffffffff820d8310 t dcn31_hwseq_create +ffffffff820d9000 T dccg32_create +ffffffff820d90b0 t dccg32_get_dccg_ref_freq +ffffffff820d90e0 t dccg32_otg_add_pixel +ffffffff820d9120 t dccg32_otg_drop_pixel +ffffffff820d9160 t dccg32_set_dpstreamclk +ffffffff820d9530 t dccg32_set_dtbclk_dto +ffffffff820d9730 t dccg32_set_pixel_rate_div +ffffffff820d9aa0 t dccg32_set_valid_pixel_rate +ffffffff820da000 T enc32_hw_init +ffffffff820da090 T dcn32_link_encoder_enable_dp_output +ffffffff820da0e0 T dcn32_link_encoder_construct +ffffffff820da2c0 t dcn32_link_encoder_is_in_alt_mode +ffffffff820da340 t dcn32_link_encoder_get_max_link_cap +ffffffff820db000 T dcn32_dio_stream_encoder_construct +ffffffff820db070 t enc32_stream_encoder_hdmi_set_stream_attribute +ffffffff820db5a0 t enc32_stream_encoder_dvi_set_stream_attribute +ffffffff820db720 t enc32_stream_encoder_dp_unblank +ffffffff820dbbe0 t enc32_read_state +ffffffff820dbd40 t enc32_dp_set_dsc_config +ffffffff820dbd90 t enc32_dp_set_odm_combine +ffffffff820dbdd0 t enc32_set_dig_input_mode +ffffffff820dc000 T dpp32_construct +ffffffff820dc060 t dscl32_calc_lb_num_partitions +ffffffff820dd000 T hpo_dp_link_encoder32_construct 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dcn32_dsc_pg_control +ffffffff820e2310 T dcn32_enable_power_gating_plane +ffffffff820e24b0 T dcn32_hubp_pg_control +ffffffff820e2720 T dcn32_apply_idle_power_optimizations +ffffffff820e2990 t dcn32_calculate_cab_allocation +ffffffff820e2d40 T dcn32_commit_subvp_config +ffffffff820e2df0 T dcn32_subvp_pipe_control_lock +ffffffff820e2fc0 T dcn32_set_mcm_luts +ffffffff820e3150 T dcn32_set_input_transfer_func +ffffffff820e3290 T dcn32_set_output_transfer_func +ffffffff820e34a0 T dcn32_subvp_update_force_pstate +ffffffff820e3610 T dcn32_update_mall_sel +ffffffff820e3790 T dcn32_program_mall_pipe_config +ffffffff820e3870 T dcn32_init_hw +ffffffff820e4060 T dcn32_update_odm +ffffffff820e4670 T dcn32_calculate_dccg_k1_k2_values +ffffffff820e4870 T dcn32_is_dp_dig_pixel_rate_div_policy +ffffffff820e4900 T dcn32_set_pixels_per_cycle +ffffffff820e4a40 T dcn32_unblank_stream +ffffffff820e4c10 T dcn32_disable_link_output +ffffffff820e4ea0 T dcn32_update_phantom_vp_position +ffffffff820e4fc0 T dcn32_dsc_pg_status +ffffffff820e50a0 T dcn32_update_dsc_pg +ffffffff820e6000 T dcn32_hw_sequencer_init_functions +ffffffff820e7000 t mmhubbub32_warmup_mcif +ffffffff820e7210 t mmhubbub32_config_mcif_buf +ffffffff820e76c0 t mmhubbub32_config_mcif_arb +ffffffff820e7ad0 T dcn32_mmhubbub_construct +ffffffff820e8000 t mpc32_mpc_init +ffffffff820e8220 t mpc32_program_post1dlut +ffffffff820e8d00 t mpc32_program_shaper +ffffffff820eafb0 t mpc32_program_3dlut +ffffffff820eb8a0 T dcn32_mpc_construct +ffffffff820eb960 t mpc32_power_on_shaper_3dlut +ffffffff820ebb90 t mpc32_set3dlut_ram12 +ffffffff820ec000 T dcn32_timing_generator_init +ffffffff820ec070 t optc32_enable_crtc +ffffffff820ec170 t optc32_disable_crtc +ffffffff820ec250 t optc32_phantom_crtc_post_enable +ffffffff820ec310 t optc32_set_drr +ffffffff820ec560 t optc32_set_odm_bypass +ffffffff820ec6d0 t optc32_set_odm_combine +ffffffff820ec9d0 t optc32_set_h_timing_div_manual_mode +ffffffff820ed000 T dcn32_panel_cntl_create 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dcn32_hpo_dp_link_encoder_create +ffffffff82103c10 t dcn32_hwseq_create +ffffffff821040b0 t dcn32_vpg_create +ffffffff82105000 T dcn32_helper_calculate_num_ways_for_subvp +ffffffff821051e0 T dcn32_merge_pipes_for_subvp +ffffffff821053b0 T dcn32_all_pipes_have_stream_and_plane +ffffffff82105440 T dcn32_subvp_in_use +ffffffff821054d0 T dcn32_mpo_in_use +ffffffff82105540 T dcn32_any_surfaces_rotated +ffffffff821055d0 T dcn32_determine_det_override +ffffffff82105910 T dcn32_set_det_allocations +ffffffff82105a90 T dcn32_save_mall_state +ffffffff82105b40 T dcn32_restore_mall_state +ffffffff82106000 T dcn321_link_encoder_construct +ffffffff82107000 T dcn321_create_resource_pool +ffffffff821070b0 t dcn321_resource_construct +ffffffff821134c0 t dcn321_mpc_create +ffffffff82117e80 t dcn321_resource_destruct +ffffffff821184f0 t dcn321_destroy_resource_pool +ffffffff82118550 t dcn321_link_encoder_create +ffffffff821194b0 t dcn321_update_bw_bounding_box +ffffffff82119500 t read_dce_straps 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dcn20_update_bounding_box +ffffffff8213d430 T dcn20_cap_soc_clocks +ffffffff8213d7b0 T dcn20_patch_bounding_box +ffffffff8213d920 T dcn20_validate_bandwidth_fp +ffffffff8213dab0 t dcn20_validate_bandwidth_internal +ffffffff8213de90 T dcn20_fpu_set_wm_ranges +ffffffff8213df30 T dcn20_fpu_adjust_dppclk +ffffffff8213dfd0 T dcn21_populate_dml_pipes_from_context +ffffffff8213e0d0 T dcn21_validate_bandwidth_fp +ffffffff8213eb50 T dcn21_update_bw_bounding_box +ffffffff8213f040 T dcn21_clk_mgr_set_bw_params_wm_table +ffffffff8213f0a0 T dcn201_populate_dml_writeback_from_context_fpu +ffffffff8213f3b0 t calculate_wm_set_for_vlevel +ffffffff82140000 T dml20_recalculate +ffffffff82140740 t dml20_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation +ffffffff82145da0 T dml20_ModeSupportAndSystemConfigurationFull +ffffffff8214cd30 t TruncToValidBPP +ffffffff8214cf10 t CalculateVMAndRowBytes +ffffffff8214d5a0 t CalculatePrefetchSourceLines +ffffffff8214d760 t CalculateWriteBackDelay +ffffffff8214da30 t CalculatePrefetchSchedule +ffffffff8214e8f0 t CalculateFlipSchedule +ffffffff8214eca0 t adjust_ReturnBW +ffffffff8214f000 T dml20v2_recalculate +ffffffff8214f740 t dml20v2_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation +ffffffff82154e50 T dml20v2_ModeSupportAndSystemConfigurationFull +ffffffff8215bcd0 t TruncToValidBPP +ffffffff8215c260 t CalculateVMAndRowBytes +ffffffff8215c8f0 t CalculatePrefetchSourceLines +ffffffff8215cab0 t CalculateWriteBackDelay +ffffffff8215cd80 t CalculateDelayAfterScaler +ffffffff8215d0d0 t CalculatePrefetchSchedule +ffffffff8215de40 t CalculateFlipSchedule +ffffffff8215e1f0 t adjust_ReturnBW +ffffffff8215f000 T dml20_rq_dlg_get_rq_reg +ffffffff8215f490 t dml20_rq_dlg_get_rq_params +ffffffff8215f660 T dml20_rq_dlg_get_dlg_reg +ffffffff821615b0 t get_surf_rq_param +ffffffff82161e30 t calculate_ttu_cursor +ffffffff82163000 T dml20v2_rq_dlg_get_rq_reg +ffffffff82163490 t dml20v2_rq_dlg_get_rq_params +ffffffff82163660 T dml20v2_rq_dlg_get_dlg_reg +ffffffff821655b0 t get_surf_rq_param +ffffffff82165e30 t calculate_ttu_cursor +ffffffff82167000 T dml21_recalculate +ffffffff82167700 t DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation +ffffffff8216d0b0 T dml21_ModeSupportAndSystemConfigurationFull +ffffffff82173190 t TruncToValidBPP +ffffffff82173720 t CalculateDCFCLKDeepSleep +ffffffff82173a60 t CalculateVMAndRowBytes +ffffffff821742d0 t CalculatePrefetchSourceLines +ffffffff82174490 t CalculateWriteBackDelay +ffffffff82174760 t CalculatePrefetchSchedulePerPlane +ffffffff82174f70 t CalculateUrgentBurstFactor +ffffffff82175380 t CalculateFlipSchedule +ffffffff82175870 t CalculateWatermarksAndDRAMSpeedChangeSupport +ffffffff821768d0 t CalculatePrefetchSchedule +ffffffff82178000 T dml21_rq_dlg_get_rq_reg +ffffffff82178490 t dml_rq_dlg_get_rq_params +ffffffff82178660 T dml21_rq_dlg_get_dlg_reg +ffffffff8217a9c0 t get_surf_rq_param +ffffffff8217b300 t calculate_ttu_cursor +ffffffff8217c000 T optc3_fpu_set_vrr_m_const +ffffffff8217c4a0 T dcn30_fpu_populate_dml_writeback_from_context +ffffffff8217c7f0 T dcn30_fpu_set_mcif_arb_params +ffffffff8217c960 T dcn30_fpu_update_soc_for_wm_a +ffffffff8217ca10 T dcn30_fpu_calculate_wm_and_dlg +ffffffff8217d2f0 T dcn30_fpu_update_dram_channel_width_bytes +ffffffff8217d350 T dcn30_fpu_update_max_clk +ffffffff8217d400 T dcn30_fpu_get_optimal_dcfclk_fclk_for_uclk +ffffffff8217d500 T dcn30_fpu_update_bw_bounding_box +ffffffff8217d6e0 T dcn30_find_dummy_latency_index_for_fw_based_mclk_switch +ffffffff8217d8c0 T dcn3_fpu_build_wm_range_table +ffffffff8217dba0 T patch_dcn30_soc_bounding_box +ffffffff8217e000 T dml30_recalculate +ffffffff8217e600 t DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation +ffffffff82184c50 T dml30_CalculateBytePerPixelAnd256BBlockSizes +ffffffff82184ec0 T dml30_CalculateWriteBackDISPCLK +ffffffff82185040 T dml30_ModeSupportAndSystemConfigurationFull +ffffffff8218c440 t CalculateSwathAndDETConfiguration +ffffffff8218cab0 t TruncToValidBPP +ffffffff8218cd30 t dscceComputeDelay +ffffffff8218ce70 t CalculateVMAndRowBytes +ffffffff8218d520 t CalculatePrefetchSourceLines +ffffffff8218d6e0 t CalculateUrgentBurstFactor +ffffffff8218d970 t CalculateDCFCLKDeepSleep +ffffffff8218dc90 t UseMinimumDCFCLK +ffffffff8218ee90 t CalculatePrefetchSchedule +ffffffff821903f0 t CalculateFlipSchedule +ffffffff821908e0 t CalculateWatermarksAndDRAMSpeedChangeSupport +ffffffff82191700 t CalculateSwathWidth +ffffffff82192000 T dml30_rq_dlg_get_rq_reg +ffffffff821924b0 t dml_rq_dlg_get_rq_params +ffffffff82192720 T dml30_rq_dlg_get_dlg_reg +ffffffff82194ed0 t get_surf_rq_param +ffffffff82195870 t calculate_ttu_cursor +ffffffff82196000 T dcn301_update_bw_bounding_box +ffffffff82196320 T dcn301_fpu_set_wm_ranges +ffffffff821963c0 T dcn301_fpu_init_soc_bounding_box +ffffffff82196460 T dcn301_calculate_wm_and_dlg_fp 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dml314_ModeSupportAndSystemConfigurationFull +ffffffff821c4280 t CalculateBytePerPixelAnd256BBlockSizes +ffffffff821c44f0 t CalculateSwathAndDETConfiguration +ffffffff821c4af0 t TruncToValidBPP +ffffffff821c4d70 t dscceComputeDelay +ffffffff821c4eb0 t CalculateDCFCLKDeepSleep +ffffffff821c51f0 t CalculateVMAndRowBytes +ffffffff821c5840 t CalculatePrefetchSourceLines +ffffffff821c5a00 t CalculateUrgentBurstFactor +ffffffff821c5c90 t CalculateMaxVStartup +ffffffff821c5dd0 t CalculatePrefetchSchedulePerPlane +ffffffff821c6500 t CalculateFlipSchedule +ffffffff821c6a80 t CalculateWatermarksAndDRAMSpeedChangeSupport +ffffffff821c76e0 t CalculateSwathWidth +ffffffff821c7bf0 t CalculatePrefetchSchedule +ffffffff821c9080 t CalculateVupdateAndDynamicMetadataParameters +ffffffff821ca000 T dml314_rq_dlg_get_rq_reg +ffffffff821ca4b0 t dml_rq_dlg_get_rq_params +ffffffff821ca720 T dml314_rq_dlg_get_dlg_reg +ffffffff821cd270 t get_surf_rq_param +ffffffff821ce000 T dcn32_build_wm_range_table_fpu +ffffffff821ce390 T dcn32_find_dummy_latency_index_for_fw_based_mclk_switch +ffffffff821ce5c0 T dcn32_internal_validate_bw +ffffffff821d02f0 T dcn32_helper_populate_phantom_dlg_params +ffffffff821d0490 T dcn32_predict_pipe_split +ffffffff821d06c0 T insert_entry_into_table_sorted +ffffffff821d0af0 T dcn32_set_phantom_stream_timing +ffffffff821d0d90 t dcn32_split_stream_for_mpc_or_odm +ffffffff821d1120 T dcn32_calculate_wm_and_dlg_fpu +ffffffff821d2640 T dcn32_patch_dpm_table +ffffffff821d2850 T dcn32_update_bw_bounding_box_fpu +ffffffff821d4250 T dcn32_zero_pipe_dcc_fraction +ffffffff821d42b0 T dcn32_allow_subvp_with_active_margin +ffffffff821d4380 t subvp_drr_schedulable +ffffffff821d5000 T dml32_recalculate +ffffffff821d9320 T dml32_ModeSupportAndSystemConfigurationFull +ffffffff821e1000 T dml32_dscceComputeDelay +ffffffff821e1140 T dml32_dscComputeDelay +ffffffff821e1180 T IsVertical +ffffffff821e11b0 T dml32_CalculateSinglePipeDPPCLKAndSCLThroughput +ffffffff821e14d0 T dml32_CalculateBytePerPixelAndBlockSizes +ffffffff821e1800 T dml32_CalculateSwathAndDETConfiguration +ffffffff821e2020 T dml32_CalculateSwathWidth +ffffffff821e28c0 T dml32_UnboundedRequest +ffffffff821e2930 T dml32_CalculateDETBufferSize +ffffffff821e2f70 T dml32_CalculateODMMode +ffffffff821e36d0 T dml32_CalculateRequiredDispclk +ffffffff821e3890 T dml32_RoundToDFSGranularity +ffffffff821e3920 T dml32_CalculateOutputLink +ffffffff821e4450 T dml32_TruncToValidBPP +ffffffff821e47a0 T dml32_CalculateDPPCLK +ffffffff821e4950 T dml32_RequiredDTBCLK +ffffffff821e4ba0 T dml32_DSCDelayRequirement +ffffffff821e5070 T dml32_CalculateSurfaceSizeInMall +ffffffff821e5b80 T dml32_CalculateVMRowAndSwath +ffffffff821e69b0 T dml32_CalculateVMAndRowBytes +ffffffff821e75f0 T dml32_CalculatePrefetchSourceLines +ffffffff821e7840 T dml32_CalculateMALLUseForStaticScreen +ffffffff821e7990 T dml32_CalculateRowBandwidth +ffffffff821e7af0 T dml32_CalculateUrgentLatency +ffffffff821e7b90 T dml32_CalculateUrgentBurstFactor +ffffffff821e7e40 T dml32_CalculateDCFCLKDeepSleep +ffffffff821e8190 T dml32_CalculateWriteBackDelay +ffffffff821e82f0 T dml32_UseMinimumDCFCLK +ffffffff821e91b0 T dml32_CalculateExtraLatencyBytes +ffffffff821e9380 T dml32_CalculateTWait +ffffffff821e9460 T dml32_CalculateVUpdateAndDynamicMetadataParameters +ffffffff821e96c0 T dml32_get_return_bw_mbps +ffffffff821e9880 T dml32_get_return_bw_mbps_vm_only +ffffffff821e9960 T dml32_CalculateExtraLatency +ffffffff821e9b90 T dml32_CalculatePrefetchSchedule +ffffffff821eb140 T dml32_CalculateFlipSchedule +ffffffff821eb6c0 T dml32_CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport +ffffffff821ec820 T dml32_CalculateWriteBackDISPCLK +ffffffff821ec9e0 T dml32_CalculateMinAndMaxPrefetchMode +ffffffff821eca20 T dml32_CalculatePixelDeliveryTimes +ffffffff821ece90 T dml32_CalculateMetaAndPTETimes +ffffffff821ed5d0 T dml32_CalculateVMGroupAndRequestTimes +ffffffff821edac0 T dml32_CalculateDCCConfiguration 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PixelClockAdjustmentForProgressiveToInterlaceUnit +ffffffff821f7d20 T get_clk_dcf_deepsleep +ffffffff821f7e30 T get_wm_urgent +ffffffff821f7f40 T get_wm_memory_trip +ffffffff821f8050 T get_wm_writeback_urgent +ffffffff821f8160 T get_wm_stutter_exit +ffffffff821f8270 T get_wm_stutter_enter_exit +ffffffff821f8380 T get_wm_z8_stutter_exit +ffffffff821f8490 T get_wm_z8_stutter_enter_exit +ffffffff821f85a0 T get_stutter_efficiency_z8 +ffffffff821f86b0 T get_stutter_num_bursts_z8 +ffffffff821f87c0 T get_wm_dram_clock_change +ffffffff821f88d0 T get_wm_writeback_dram_clock_change +ffffffff821f89e0 T get_stutter_efficiency +ffffffff821f8af0 T get_stutter_efficiency_no_vblank +ffffffff821f8c00 T get_stutter_period +ffffffff821f8d10 T get_urgent_latency +ffffffff821f8e20 T get_urgent_extra_latency +ffffffff821f8f30 T get_nonurgent_latency +ffffffff821f9040 T get_dram_clock_change_latency +ffffffff821f9150 T get_dispclk_calculated +ffffffff821f9260 T get_total_data_read_bw +ffffffff821f9370 T get_return_bw +ffffffff821f9480 T get_tcalc +ffffffff821f9590 T get_fraction_of_urgent_bandwidth +ffffffff821f96a0 T get_fraction_of_urgent_bandwidth_imm_flip +ffffffff821f97b0 T get_cstate_max_cap_mode +ffffffff821f98d0 T get_comp_buffer_size_kbytes +ffffffff821f99e0 T get_pixel_chunk_size_in_kbyte +ffffffff821f9b00 T get_alpha_pixel_chunk_size_in_kbyte +ffffffff821f9c20 T get_meta_chunk_size_in_kbyte +ffffffff821f9d40 T get_min_pixel_chunk_size_in_byte +ffffffff821f9e50 T get_min_meta_chunk_size_in_byte +ffffffff821f9f70 T get_fclk_watermark +ffffffff821fa080 T get_usr_retraining_watermark +ffffffff821fa190 T get_comp_buffer_reserved_space_kbytes +ffffffff821fa2b0 T get_comp_buffer_reserved_space_64bytes +ffffffff821fa3d0 T get_comp_buffer_reserved_space_zs +ffffffff821fa4f0 T get_unbounded_request_enabled +ffffffff821fa610 T get_dsc_delay +ffffffff821fa740 T get_dppclk_calculated +ffffffff821fa860 T get_dscclk_calculated +ffffffff821fa980 T get_min_ttu_vblank +ffffffff821faaa0 T get_min_ttu_vblank_in_us +ffffffff821fabc0 T get_vratio_prefetch_l +ffffffff821face0 T get_vratio_prefetch_c +ffffffff821fae00 T get_dst_x_after_scaler +ffffffff821faf20 T get_dst_y_after_scaler +ffffffff821fb040 T get_dst_y_per_vm_vblank +ffffffff821fb160 T get_dst_y_per_row_vblank +ffffffff821fb280 T get_dst_y_prefetch +ffffffff821fb3a0 T get_dst_y_per_vm_flip +ffffffff821fb4c0 T get_dst_y_per_row_flip +ffffffff821fb5e0 T get_refcyc_per_vm_group_vblank +ffffffff821fb700 T get_refcyc_per_vm_group_flip +ffffffff821fb820 T get_refcyc_per_vm_req_vblank +ffffffff821fb940 T get_refcyc_per_vm_req_flip +ffffffff821fba60 T get_refcyc_per_vm_group_vblank_in_us +ffffffff821fbb80 T get_refcyc_per_vm_group_flip_in_us +ffffffff821fbca0 T get_refcyc_per_vm_req_vblank_in_us +ffffffff821fbdc0 T get_refcyc_per_vm_req_flip_in_us +ffffffff821fbee0 T get_refcyc_per_vm_dmdata_in_us +ffffffff821fc000 T get_dmdata_dl_delta_in_us +ffffffff821fc120 T get_refcyc_per_line_delivery_l_in_us +ffffffff821fc240 T get_refcyc_per_line_delivery_c_in_us +ffffffff821fc360 T get_refcyc_per_line_delivery_pre_l_in_us +ffffffff821fc480 T get_refcyc_per_line_delivery_pre_c_in_us +ffffffff821fc5a0 T get_refcyc_per_req_delivery_l_in_us +ffffffff821fc6c0 T get_refcyc_per_req_delivery_c_in_us +ffffffff821fc7e0 T get_refcyc_per_req_delivery_pre_l_in_us +ffffffff821fc900 T get_refcyc_per_req_delivery_pre_c_in_us +ffffffff821fca20 T get_refcyc_per_cursor_req_delivery_in_us +ffffffff821fcb40 T get_refcyc_per_cursor_req_delivery_pre_in_us +ffffffff821fcc60 T get_refcyc_per_meta_chunk_nom_l_in_us +ffffffff821fcd80 T get_refcyc_per_meta_chunk_nom_c_in_us +ffffffff821fcea0 T get_refcyc_per_meta_chunk_vblank_l_in_us +ffffffff821fcfc0 T get_refcyc_per_meta_chunk_vblank_c_in_us +ffffffff821fd0e0 T get_refcyc_per_meta_chunk_flip_l_in_us +ffffffff821fd200 T get_refcyc_per_meta_chunk_flip_c_in_us +ffffffff821fd320 T get_vstartup +ffffffff821fd450 T get_vupdate_offset +ffffffff821fd580 T get_vupdate_width +ffffffff821fd6a0 T get_vready_offset +ffffffff821fd7c0 T get_vready_at_or_after_vsync +ffffffff821fd8f0 T get_min_dst_y_next_start +ffffffff821fda20 T get_dst_y_per_pte_row_nom_l +ffffffff821fdb40 T get_dst_y_per_pte_row_nom_c +ffffffff821fdc60 T get_dst_y_per_meta_row_nom_l +ffffffff821fdd80 T get_dst_y_per_meta_row_nom_c +ffffffff821fdea0 T get_refcyc_per_pte_group_nom_l_in_us +ffffffff821fdfc0 T get_refcyc_per_pte_group_nom_c_in_us +ffffffff821fe0e0 T get_refcyc_per_pte_group_vblank_l_in_us +ffffffff821fe200 T get_refcyc_per_pte_group_vblank_c_in_us +ffffffff821fe320 T get_refcyc_per_pte_group_flip_l_in_us +ffffffff821fe440 T get_refcyc_per_pte_group_flip_c_in_us +ffffffff821fe560 T get_vstartup_calculated +ffffffff821fe690 T get_dpte_row_height_linear_c +ffffffff821fe7c0 T get_swath_height_l +ffffffff821fe8f0 T get_swath_height_c +ffffffff821fea20 T get_det_stored_buffer_size_l_bytes +ffffffff821feb50 T get_det_stored_buffer_size_c_bytes +ffffffff821fec80 T get_dpte_group_size_in_bytes +ffffffff821fedb0 T get_vm_group_size_in_bytes +ffffffff821feee0 T get_dpte_row_height_linear_l +ffffffff821ff010 T get_pte_buffer_mode +ffffffff821ff140 T get_subviewport_lines_needed_in_mall +ffffffff821ff270 T get_total_immediate_flip_bytes +ffffffff821ff390 T get_total_immediate_flip_bw +ffffffff821ff570 T get_total_prefetch_bw +ffffffff821ff750 T get_total_surface_size_in_mall_bytes +ffffffff821ff900 T get_det_buffer_size_kbytes +ffffffff821ffa30 T get_is_phantom_pipe +ffffffff821ffb60 T Calculate256BBlockSizes +ffffffff821ffc50 T CalculateMinAndMaxPrefetchMode +ffffffff821ffcd0 T ModeSupportAndSystemConfiguration +ffffffff821ffff0 T CalculateWriteBackDISPCLK +ffffffff82201000 T print__rq_params_st +ffffffff82201030 T print__data_rq_sizing_params_st +ffffffff82201060 T print__data_rq_dlg_params_st +ffffffff82201090 T print__data_rq_misc_params_st +ffffffff822010c0 T print__rq_dlg_params_st +ffffffff822010f0 T print__dlg_sys_params_st +ffffffff82201120 T print__data_rq_regs_st +ffffffff82201150 T print__rq_regs_st +ffffffff82201180 T print__dlg_regs_st +ffffffff822011b0 T print__ttu_regs_st +ffffffff82202000 T dml1_extract_rq_regs +ffffffff82202330 T dml1_rq_dlg_get_rq_params +ffffffff82202500 t get_surf_rq_param +ffffffff82203200 T dml1_rq_dlg_get_dlg_params +ffffffff82206000 T _do_calc_rc_params +ffffffff82207040 t get_qp_set +ffffffff82208000 T dc_dsc_parse_dsc_dpcd +ffffffff822082a0 t dsc_throughput_from_dpcd +ffffffff82208460 T dc_dsc_compute_bandwidth_range +ffffffff82208640 t intersect_dsc_caps +ffffffff82208800 t setup_dsc_config +ffffffff822091d0 T dc_dsc_compute_config +ffffffff822092d0 T dc_dsc_stream_bandwidth_in_kbps +ffffffff82209430 T dc_dsc_stream_bandwidth_overhead_in_kbps +ffffffff82209580 T dc_dsc_get_policy_for_timing +ffffffff82209620 T dc_dsc_policy_set_max_target_bpp_limit +ffffffff82209650 T dc_dsc_policy_set_enable_dsc_when_not_needed +ffffffff82209680 T dc_dsc_policy_set_disable_dsc_stream_overhead +ffffffff8220a000 T calc_rc_params +ffffffff8220b000 T dscc_compute_dsc_parameters +ffffffff8220c000 T dal_hw_factory_dce110_init +ffffffff8220c060 t define_hpd_registers +ffffffff8220c0b0 t define_ddc_registers +ffffffff8220d000 T dal_hw_translate_dce110_init +ffffffff8220d030 t offset_to_id +ffffffff8220d390 t id_to_offset +ffffffff8220e000 T dal_hw_factory_dce120_init +ffffffff8220e060 t define_hpd_registers +ffffffff8220e0b0 t define_ddc_registers +ffffffff8220f000 T dal_hw_translate_dce120_init +ffffffff8220f030 t offset_to_id +ffffffff8220f3a0 t id_to_offset +ffffffff82210000 T dal_hw_factory_dce80_init +ffffffff82210060 t define_hpd_registers +ffffffff822100b0 t define_ddc_registers +ffffffff82211000 T dal_hw_translate_dce80_init +ffffffff82211030 t offset_to_id +ffffffff822117b0 t id_to_offset +ffffffff82212000 T dal_hw_factory_dcn10_init +ffffffff82212060 t define_hpd_registers +ffffffff822120b0 t define_ddc_registers +ffffffff82212150 t define_generic_registers +ffffffff82213000 T dal_hw_translate_dcn10_init +ffffffff82213030 t offset_to_id +ffffffff82213390 t id_to_offset +ffffffff82214000 T dal_hw_factory_dcn20_init +ffffffff82214060 t define_hpd_registers +ffffffff822140b0 t define_ddc_registers +ffffffff82214160 t define_generic_registers +ffffffff82215000 T dal_hw_translate_dcn20_init +ffffffff82215030 t offset_to_id +ffffffff822152b0 t id_to_offset +ffffffff82216000 T dal_hw_factory_dcn21_init +ffffffff82216060 t define_hpd_registers +ffffffff822160b0 t define_ddc_registers +ffffffff82216160 t define_generic_registers +ffffffff82217000 T dal_hw_translate_dcn21_init +ffffffff82217030 t offset_to_id +ffffffff822172b0 t id_to_offset +ffffffff82218000 T dal_hw_factory_dcn30_init +ffffffff82218060 t define_hpd_registers +ffffffff822180b0 t define_ddc_registers +ffffffff82218160 t define_generic_registers +ffffffff82219000 T dal_hw_translate_dcn30_init +ffffffff82219030 t offset_to_id +ffffffff822192c0 t id_to_offset +ffffffff8221a000 T dal_hw_factory_dcn315_init +ffffffff8221a060 t define_hpd_registers +ffffffff8221a0b0 t define_ddc_registers +ffffffff8221a160 t define_generic_registers +ffffffff8221b000 T dal_hw_translate_dcn315_init +ffffffff8221b030 t offset_to_id +ffffffff8221b2b0 t id_to_offset +ffffffff8221c000 T dal_hw_factory_dcn32_init +ffffffff8221c060 t define_hpd_registers +ffffffff8221c0b0 t define_ddc_registers +ffffffff8221c160 t define_generic_registers +ffffffff8221d000 T dal_hw_translate_dcn32_init +ffffffff8221d030 t offset_to_id +ffffffff8221d290 t id_to_offset +ffffffff8221e000 T dal_gpio_open +ffffffff8221e0c0 T dal_gpio_open_ex +ffffffff8221e180 T dal_gpio_get_value +ffffffff8221e200 T dal_gpio_set_value +ffffffff8221e280 T dal_gpio_get_mode +ffffffff8221e2b0 T dal_gpio_lock_pin +ffffffff8221e2d0 T dal_gpio_unlock_pin +ffffffff8221e2f0 T dal_gpio_change_mode +ffffffff8221e370 T dal_gpio_get_id +ffffffff8221e3a0 T dal_gpio_get_enum +ffffffff8221e3d0 T dal_gpio_set_config +ffffffff8221e450 T dal_gpio_get_pin_info +ffffffff8221e4b0 T dal_gpio_get_sync_source +ffffffff8221e540 T dal_gpio_get_output_state +ffffffff8221e570 T dal_gpio_get_ddc +ffffffff8221e5a0 T dal_gpio_get_hpd +ffffffff8221e5d0 T dal_gpio_get_generic +ffffffff8221e600 T dal_gpio_close +ffffffff8221e650 T dal_gpio_create +ffffffff8221e7e0 T dal_gpio_destroy +ffffffff8221f000 T dal_gpio_service_create +ffffffff8221f260 T dal_gpio_service_create_irq +ffffffff8221f320 T dal_gpio_create_irq +ffffffff8221f3a0 T dal_gpio_service_create_generic_mux +ffffffff8221f440 T dal_gpio_destroy_generic_mux +ffffffff8221f4d0 T dal_gpio_get_generic_pin_info +ffffffff8221f530 T dal_gpio_service_destroy +ffffffff8221f660 T dal_mux_setup_config +ffffffff8221f6c0 T dal_gpio_service_lock +ffffffff8221f740 T dal_gpio_service_unlock +ffffffff8221f7c0 T dal_gpio_service_open +ffffffff8221fa00 T dal_gpio_service_close +ffffffff8221faa0 T dal_irq_get_source +ffffffff8221fb10 T dal_irq_get_rx_source +ffffffff8221fb60 T dal_irq_setup_hpd_filter +ffffffff8221fbc0 T dal_gpio_destroy_irq +ffffffff8221fc50 T dal_gpio_create_ddc +ffffffff8221fdc0 T dal_gpio_destroy_ddc +ffffffff8221fe90 T dal_ddc_close +ffffffff8221fee0 T dal_ddc_open +ffffffff82220040 T dal_ddc_change_mode +ffffffff822200e0 T dal_ddc_get_line +ffffffff82220100 T dal_ddc_set_config +ffffffff82221000 T dal_hw_ddc_init +ffffffff82221100 T dal_hw_ddc_get_pin +ffffffff82221110 t dal_hw_ddc_destroy +ffffffff82221170 t set_config +ffffffff82222000 T dal_hw_factory_init +ffffffff82223000 T dal_hw_generic_init +ffffffff82223100 T dal_hw_generic_get_pin +ffffffff82223110 t dal_hw_generic_destroy +ffffffff82223170 t set_config +ffffffff82224000 T dal_hw_gpio_open +ffffffff822240b0 T dal_hw_gpio_config_mode +ffffffff822241a0 T dal_hw_gpio_get_value +ffffffff82224200 T dal_hw_gpio_set_value +ffffffff82224290 T dal_hw_gpio_change_mode +ffffffff822242a0 T dal_hw_gpio_close +ffffffff82224350 T dal_hw_gpio_construct +ffffffff822243b0 T dal_hw_gpio_destruct +ffffffff82225000 T dal_hw_hpd_init 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enable_dio_dp_link_output -ffffffff82235390 T disable_dio_link_output -ffffffff822353d0 T set_dio_dp_link_test_pattern -ffffffff82235410 T set_dio_dp_lane_settings -ffffffff82235450 T can_use_dio_link_hwss -ffffffff82235490 T get_dio_link_hwss -ffffffff822354c0 t update_dio_stream_allocation_table -ffffffff82236000 T can_use_dpia_link_hwss -ffffffff82236050 T get_dpia_link_hwss -ffffffff82236080 t update_dpia_stream_allocation_table -ffffffff82237000 T can_use_hpo_dp_link_hwss -ffffffff82237030 T get_hpo_dp_link_hwss -ffffffff82237060 t set_hpo_dp_hblank_min_symbol_width -ffffffff82237130 t set_hpo_dp_throttled_vcp_size -ffffffff82237160 t enable_hpo_dp_link_output -ffffffff82237290 t set_hpo_dp_link_test_pattern -ffffffff822372d0 t set_hpo_dp_lane_settings -ffffffff82237300 t update_hpo_dp_stream_allocation_table -ffffffff82237320 t setup_hpo_dp_stream_encoder -ffffffff822374a0 t reset_hpo_dp_stream_encoder -ffffffff82237590 t setup_hpo_dp_stream_attribute -ffffffff822375f0 t disable_hpo_dp_link_output -ffffffff82238000 T virtual_link_encoder_construct -ffffffff82238060 t virtual_link_encoder_validate_output_with_stream -ffffffff82238090 t virtual_link_encoder_hw_init -ffffffff822380c0 t virtual_link_encoder_setup -ffffffff822380f0 t virtual_link_encoder_enable_tmds_output -ffffffff82238120 t virtual_link_encoder_enable_dp_output -ffffffff82238150 t virtual_link_encoder_enable_dp_mst_output -ffffffff82238180 t virtual_link_encoder_disable_output -ffffffff822381b0 t virtual_link_encoder_dp_set_lane_settings -ffffffff822381e0 t virtual_link_encoder_dp_set_phy_pattern -ffffffff82238210 t virtual_link_encoder_update_mst_stream_allocation_table -ffffffff82238240 t virtual_link_encoder_connect_dig_be_to_fe -ffffffff82238270 t virtual_link_encoder_destroy -ffffffff822382c0 t virtual_link_encoder_get_max_link_cap -ffffffff82239000 T virtual_setup_stream_encoder -ffffffff82239030 T virtual_setup_stream_attribute -ffffffff82239060 T virtual_reset_stream_encoder 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sdmmc_mem_send_op_cond -ffffffff82540690 T sdmmc_mem_signal_voltage -ffffffff82540750 T sdmmc_mem_scan -ffffffff82540a60 T sdmmc_decode_csd -ffffffff82540e70 T sdmmc_decode_cid -ffffffff825412b0 T sdmmc_mem_send_scr -ffffffff825413f0 T sdmmc_mem_decode_scr -ffffffff82541470 T sdmmc_mem_send_cxd_data -ffffffff825415e0 T sdmmc_mem_set_bus_width -ffffffff82541700 T sdmmc_mem_sd_switch -ffffffff825419b0 T sdmmc_be512_to_bitfield512 -ffffffff82541a60 T sdmmc_mem_mmc_switch -ffffffff82541b50 T sdmmc_mem_init -ffffffff82541ca0 T sdmmc_mem_set_blocklen -ffffffff82541da0 T sdmmc_mem_sd_init -ffffffff82542350 T sdmmc_mem_mmc_init -ffffffff82542c70 T sdmmc_mem_select_transfer_mode -ffffffff82542cf0 T sdmmc_mem_execute_tuning -ffffffff82542d80 T sdmmc_mem_read_block_subr -ffffffff825430e0 T sdmmc_mem_single_read_block -ffffffff825431b0 T sdmmc_mem_read_block -ffffffff82543370 T sdmmc_mem_write_block_subr -ffffffff825436c0 T sdmmc_mem_single_write_block -ffffffff82543790 T sdmmc_mem_write_block -ffffffff82543950 T sdmmc_mem_hibernate_write -ffffffff82544000 T sdmmc_scsi_cmd -ffffffff825441f0 T sdmmc_minphys -ffffffff82544270 T sdmmc_scsi_attach -ffffffff82544460 T sdmmc_alloc_ccbs -ffffffff825445a0 T sdmmc_free_ccbs -ffffffff82544600 T sdmmc_scsi_detach -ffffffff82544760 T sdmmc_stimeout -ffffffff825447e0 T sdmmc_ccb_alloc -ffffffff82544890 T sdmmc_ccb_free -ffffffff82544970 T sdmmc_inquiry -ffffffff82544be0 T sdmmc_start_xs -ffffffff82544cd0 T sdmmc_complete_xs -ffffffff82544da0 T sdmmc_done_xs -ffffffff82544df0 T sdmmc_scsi_hibernate_io -ffffffff82545000 T bwfm_sdio_preinit -ffffffff825454f0 T bwfm_sdio_txcheck -ffffffff82545530 T bwfm_sdio_txdata -ffffffff825455a0 T bwfm_sdio_txctl -ffffffff825456f0 T bwfm_sdio_buscore_read -ffffffff82545700 T bwfm_sdio_buscore_write -ffffffff82545720 T bwfm_sdio_buscore_prepare -ffffffff82545860 T bwfm_sdio_buscore_activate -ffffffff825458e0 T bwfm_sdio_match -ffffffff825459b0 T bwfm_sdio_attach -ffffffff82545c70 T bwfm_sdio_detach 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onewire_attach -ffffffff825480f0 T onewire_detach -ffffffff82548160 T onewire_activate -ffffffff82548180 T onewire_scan -ffffffff82548390 T onewire_createthread -ffffffff82548400 T onewire_print -ffffffff825484d0 T onewirebus_print -ffffffff82548520 T onewire_lock -ffffffff82548540 T onewire_unlock -ffffffff82548560 T onewire_reset -ffffffff82548580 T onewire_bit -ffffffff825485a0 T onewire_read_byte -ffffffff825486e0 T onewire_write_byte -ffffffff825487c0 T onewire_read_block -ffffffff82548860 T onewire_write_block -ffffffff82548900 T onewire_triplet -ffffffff825489e0 T onewire_matchrom -ffffffff82548b30 T onewire_search -ffffffff82548ec0 T onewire_thread -ffffffff82549000 T onewire_crc -ffffffff825490e0 T onewire_crc16 -ffffffff825491c0 T onewire_famname -ffffffff82549200 T onewire_matchbyfam -ffffffff8254a000 T owid_match -ffffffff8254a030 T owid_attach -ffffffff8254a100 T owid_detach -ffffffff8254a140 T owid_activate -ffffffff8254b000 T owsbm_match -ffffffff8254b030 T owsbm_attach -ffffffff8254b1d0 T owsbm_detach -ffffffff8254b240 T owsbm_activate -ffffffff8254b270 T owsbm_update -ffffffff8254c000 T owtemp_match -ffffffff8254c030 T owtemp_attach -ffffffff8254c130 T owtemp_detach -ffffffff8254c1a0 T owtemp_activate -ffffffff8254c1d0 T owtemp_update -ffffffff8254d000 T owctr_match -ffffffff8254d030 T owctr_attach -ffffffff8254d180 T owctr_detach -ffffffff8254d1f0 T owctr_activate -ffffffff8254d220 T owctr_update -ffffffff8254d250 T owctr_update_counter -ffffffff8254e000 A __text_page_start -ffffffff8254e000 T Xsyscall_meltdown -ffffffff8254e00c T Xsyscall -ffffffff8254e26e t Xsyscall_trampback -ffffffff8254e280 T intr_user_exit -ffffffff8254e2c2 t intr_user_exit_post_ast -ffffffff8254e3ee t Xiretq_trampback -ffffffff8254e3fa T doreti_iret -ffffffff8254f000 T alltraps -ffffffff8254f138 T recall_trap -ffffffff8254f150 T alltraps_kern -ffffffff8254f153 T alltraps_kern_meltdown -ffffffff82550000 ? Xsyscall32 -ffffffff82550000 A __kutext_start -ffffffff82550000 A __text_page_end -ffffffff82551000 ? Xtrap00 -ffffffff82551010 ? Xtrap01 -ffffffff82551020 ? Xtrap02 -ffffffff82551028 c calltrap_specstk -ffffffff825510f0 ? calltrap_specstk_tramp -ffffffff82551110 ? Xtrap03 -ffffffff82551120 ? Xtrap04 -ffffffff82551130 ? Xtrap05 -ffffffff82551140 ? Xtrap06 -ffffffff82551150 ? Xtrap07 -ffffffff82551160 ? Xtrap08 -ffffffff82551170 ? Xtrap09 -ffffffff82551180 ? Xtrap0a -ffffffff82551190 ? Xtrap0b -ffffffff825511a0 ? Xtrap0c -ffffffff825511b0 ? Xtrap0d -ffffffff82551240 ? Xtrap0e -ffffffff82551250 ? Xintrspurious -ffffffff82551250 ? Xtrap0f -ffffffff82551260 ? Xtrap10 -ffffffff82551270 ? Xtrap11 -ffffffff82551280 ? Xtrap12 -ffffffff82551290 ? Xtrap13 -ffffffff825512a0 ? Xtrap14 -ffffffff825512b0 ? Xtrap15 -ffffffff825512c0 ? Xtrap16 -ffffffff825512c0 ? Xtrap17 -ffffffff825512c0 ? Xtrap18 -ffffffff825512c0 ? Xtrap19 -ffffffff825512c0 ? Xtrap1a -ffffffff825512c0 ? Xtrap1b -ffffffff825512c0 ? Xtrap1c -ffffffff825512c0 ? Xtrap1d -ffffffff825512c0 ? Xtrap1e -ffffffff825512c0 ? Xtrap1f -ffffffff825512d0 ? x2apic_eoi -ffffffff825512f0 ? Xintr_lapic_ipi -ffffffff82551330 ? Xipi_invltlb -ffffffff82551360 ? Xipi_invlpg -ffffffff82551390 ? Xipi_invlrange -ffffffff825513d0 ? Xipi_invltlb_pcid -ffffffff82551410 ? Xipi_invlpg_pcid -ffffffff82551460 ? Xipi_invlrange_pcid -ffffffff825514d0 ? Xintr_lapic_ltimer -ffffffff82551510 ? Xintr_xen_upcall -ffffffff82551550 ? Xintr_hyperv_upcall -ffffffff82551590 ? Xintr_legacy0 -ffffffff825515d0 ? Xintr_legacy1 -ffffffff82551610 ? Xintr_legacy2 -ffffffff82551650 ? Xintr_legacy3 -ffffffff82551690 ? Xintr_legacy4 -ffffffff825516d0 ? Xintr_legacy5 -ffffffff82551710 ? Xintr_legacy6 -ffffffff82551750 ? Xintr_legacy7 -ffffffff82551790 ? Xintr_legacy8 -ffffffff825517d0 ? Xintr_legacy9 -ffffffff82551810 ? Xintr_legacy10 -ffffffff82551850 ? Xintr_legacy11 -ffffffff82551890 ? Xintr_legacy12 -ffffffff825518d0 ? Xintr_legacy13 -ffffffff82551910 ? Xintr_legacy14 -ffffffff82551950 ? Xintr_legacy15 -ffffffff82551990 ? Xintr_ioapic_edge0 -ffffffff825519d0 ? Xintr_ioapic_edge1 -ffffffff82551a10 ? Xintr_ioapic_edge2 -ffffffff82551a50 ? Xintr_ioapic_edge3 -ffffffff82551a90 ? Xintr_ioapic_edge4 -ffffffff82551ad0 ? Xintr_ioapic_edge5 -ffffffff82551b10 ? Xintr_ioapic_edge6 -ffffffff82551b50 ? Xintr_ioapic_edge7 -ffffffff82551b90 ? Xintr_ioapic_edge8 -ffffffff82551bd0 ? Xintr_ioapic_edge9 -ffffffff82551c10 ? Xintr_ioapic_edge10 -ffffffff82551c50 ? Xintr_ioapic_edge11 -ffffffff82551c90 ? Xintr_ioapic_edge12 -ffffffff82551cd0 ? Xintr_ioapic_edge13 -ffffffff82551d10 ? Xintr_ioapic_edge14 -ffffffff82551d50 ? Xintr_ioapic_edge15 -ffffffff82551d90 ? Xintr_ioapic_edge16 -ffffffff82551dd0 ? Xintr_ioapic_edge17 -ffffffff82551e10 ? Xintr_ioapic_edge18 -ffffffff82551e50 ? Xintr_ioapic_edge19 -ffffffff82551e90 ? Xintr_ioapic_edge20 -ffffffff82551ed0 ? Xintr_ioapic_edge21 -ffffffff82551f10 ? Xintr_ioapic_edge22 -ffffffff82551f50 ? Xintr_ioapic_edge23 -ffffffff82551f90 ? Xintr_ioapic_edge24 -ffffffff82551fd0 ? Xintr_ioapic_edge25 -ffffffff82552010 ? Xintr_ioapic_edge26 -ffffffff82552050 ? Xintr_ioapic_edge27 -ffffffff82552090 ? Xintr_ioapic_edge28 -ffffffff825520d0 ? Xintr_ioapic_edge29 -ffffffff82552110 ? Xintr_ioapic_edge30 -ffffffff82552150 ? Xintr_ioapic_edge31 -ffffffff82552190 ? Xintr_ioapic_edge32 -ffffffff825521d0 ? Xintr_ioapic_edge33 -ffffffff82552210 ? Xintr_ioapic_edge34 -ffffffff82552250 ? Xintr_ioapic_edge35 -ffffffff82552290 ? Xintr_ioapic_edge36 -ffffffff825522d0 ? Xintr_ioapic_edge37 -ffffffff82552310 ? Xintr_ioapic_edge38 -ffffffff82552350 ? Xintr_ioapic_edge39 -ffffffff82552390 ? Xintr_ioapic_edge40 -ffffffff825523d0 ? Xintr_ioapic_edge41 -ffffffff82552410 ? Xintr_ioapic_edge42 -ffffffff82552450 ? Xintr_ioapic_edge43 -ffffffff82552490 ? Xintr_ioapic_edge44 -ffffffff825524d0 ? Xintr_ioapic_edge45 -ffffffff82552510 ? Xintr_ioapic_edge46 -ffffffff82552550 ? Xintr_ioapic_edge47 -ffffffff82552590 ? Xintr_ioapic_edge48 -ffffffff825525d0 ? Xintr_ioapic_edge49 -ffffffff82552610 ? Xintr_ioapic_edge50 -ffffffff82552650 ? Xintr_ioapic_edge51 -ffffffff82552690 ? Xintr_ioapic_edge52 -ffffffff825526d0 ? Xintr_ioapic_edge53 -ffffffff82552710 ? Xintr_ioapic_edge54 -ffffffff82552750 ? Xintr_ioapic_edge55 -ffffffff82552790 ? Xintr_ioapic_edge56 -ffffffff825527d0 ? Xintr_ioapic_edge57 -ffffffff82552810 ? Xintr_ioapic_edge58 -ffffffff82552850 ? Xintr_ioapic_edge59 -ffffffff82552890 ? Xintr_ioapic_edge60 -ffffffff825528d0 ? Xintr_ioapic_edge61 -ffffffff82552910 ? Xintr_ioapic_edge62 -ffffffff82552950 ? Xintr_ioapic_edge63 -ffffffff82552990 ? Xintr_ioapic_level0 -ffffffff825529d0 ? Xintr_ioapic_level1 -ffffffff82552a10 ? Xintr_ioapic_level2 -ffffffff82552a50 ? Xintr_ioapic_level3 -ffffffff82552a90 ? Xintr_ioapic_level4 -ffffffff82552ad0 ? Xintr_ioapic_level5 -ffffffff82552b10 ? Xintr_ioapic_level6 -ffffffff82552b50 ? Xintr_ioapic_level7 -ffffffff82552b90 ? Xintr_ioapic_level8 -ffffffff82552bd0 ? Xintr_ioapic_level9 -ffffffff82552c10 ? Xintr_ioapic_level10 -ffffffff82552c50 ? Xintr_ioapic_level11 -ffffffff82552c90 ? Xintr_ioapic_level12 -ffffffff82552cd0 ? Xintr_ioapic_level13 -ffffffff82552d10 ? Xintr_ioapic_level14 -ffffffff82552d50 ? Xintr_ioapic_level15 -ffffffff82552d90 ? Xintr_ioapic_level16 -ffffffff82552dd0 ? Xintr_ioapic_level17 -ffffffff82552e10 ? Xintr_ioapic_level18 -ffffffff82552e50 ? Xintr_ioapic_level19 -ffffffff82552e90 ? Xintr_ioapic_level20 -ffffffff82552ed0 ? Xintr_ioapic_level21 -ffffffff82552f10 ? Xintr_ioapic_level22 -ffffffff82552f50 ? Xintr_ioapic_level23 -ffffffff82552f90 ? Xintr_ioapic_level24 -ffffffff82552fd0 ? Xintr_ioapic_level25 -ffffffff82553010 ? Xintr_ioapic_level26 -ffffffff82553050 ? Xintr_ioapic_level27 -ffffffff82553090 ? Xintr_ioapic_level28 -ffffffff825530d0 ? Xintr_ioapic_level29 -ffffffff82553110 ? Xintr_ioapic_level30 -ffffffff82553150 ? Xintr_ioapic_level31 -ffffffff82553190 ? Xintr_ioapic_level32 -ffffffff825531d0 ? Xintr_ioapic_level33 -ffffffff82553210 ? Xintr_ioapic_level34 -ffffffff82553250 ? Xintr_ioapic_level35 -ffffffff82553290 ? Xintr_ioapic_level36 -ffffffff825532d0 ? Xintr_ioapic_level37 -ffffffff82553310 ? Xintr_ioapic_level38 -ffffffff82553350 ? Xintr_ioapic_level39 -ffffffff82553390 ? Xintr_ioapic_level40 -ffffffff825533d0 ? Xintr_ioapic_level41 -ffffffff82553410 ? Xintr_ioapic_level42 -ffffffff82553450 ? Xintr_ioapic_level43 -ffffffff82553490 ? Xintr_ioapic_level44 -ffffffff825534d0 ? Xintr_ioapic_level45 -ffffffff82553510 ? Xintr_ioapic_level46 -ffffffff82553550 ? Xintr_ioapic_level47 -ffffffff82553590 ? Xintr_ioapic_level48 -ffffffff825535d0 ? Xintr_ioapic_level49 -ffffffff82553610 ? Xintr_ioapic_level50 -ffffffff82553650 ? Xintr_ioapic_level51 -ffffffff82553690 ? Xintr_ioapic_level52 -ffffffff825536d0 ? Xintr_ioapic_level53 -ffffffff82553710 ? Xintr_ioapic_level54 -ffffffff82553750 ? Xintr_ioapic_level55 -ffffffff82553790 ? Xintr_ioapic_level56 -ffffffff825537d0 ? Xintr_ioapic_level57 -ffffffff82553810 ? Xintr_ioapic_level58 -ffffffff82553850 ? Xintr_ioapic_level59 -ffffffff82553890 ? Xintr_ioapic_level60 -ffffffff825538d0 ? Xintr_ioapic_level61 -ffffffff82553910 ? Xintr_ioapic_level62 -ffffffff82553950 ? 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vga_50lscreen_mono -ffffffff826541c8 R vga_50lscreen_bf -ffffffff826541f8 R vga_screenlist -ffffffff82654208 R vga_screenlist_mono -ffffffff82654218 R vga_accessops -ffffffff82654278 r i945_wm_info -ffffffff826542b0 r bgansitopc -ffffffff826542b8 r pctoansi -ffffffff826542f8 r sdma_offsets -ffffffff826542f8 r sdma_offsets -ffffffff82654328 r iha_rate_tbl -ffffffff82654360 r i830_a_wm_info -ffffffff82654398 r gen9_edram_size_mb.ways -ffffffff82654400 r aggr_periodic_times -ffffffff82654480 r jsl_ehl_revids -ffffffff826544f8 r michael_final.pad -ffffffff82654520 r rt_copysa.maskarray -ffffffff82654528 r i915_wm_info -ffffffff82654530 r amdgpu_ih_clientid_jpeg -ffffffff82654530 r amdgpu_ih_clientid_uvds -ffffffff82654530 r amdgpu_ih_clientid_vcns -ffffffff82654530 r amdgpu_ih_clientid_vcns -ffffffff82654530 r amdgpu_ih_clientid_vcns -ffffffff82654568 r vga_setfontset.cmaptabb -ffffffff82654580 r tgl_revids -ffffffff826545d8 r i830_bc_wm_info -ffffffff82654648 r hsw_activate_psr2.map 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sgpr112_init_compute_shader_aldebaran -ffffffff82aaca60 r sgpr96_init_compute_shader_aldebaran -ffffffff82aacc50 r sgpr64_init_compute_shader_aldebaran -ffffffff82aacdc0 r vgpr_init_compute_shader_aldebaran -ffffffff82aad6a0 r gfx_v9_4_2_edc_counter_regs -ffffffff82aada20 r gfx_v9_4_2_ras_fields -ffffffff82aaf3c0 r gfx_v9_4_2_utc_blocks -ffffffff82ab0000 R gfxhub_v1_0_funcs -ffffffff82ab1000 R gfxhub_v2_0_funcs -ffffffff82ab1060 r gfxhub_v2_0_vmhub_funcs -ffffffff82ab1070 r gfxhub_client_ids -ffffffff82ab2000 R gfxhub_v2_1_funcs -ffffffff82ab2060 r gfxhub_v2_1_vmhub_funcs -ffffffff82ab2070 r gfxhub_client_ids -ffffffff82ab3000 R gfxhub_v3_0_funcs -ffffffff82ab3060 r gfxhub_v3_0_vmhub_funcs -ffffffff82ab3070 r gfxhub_client_ids -ffffffff82ab4000 R gfxhub_v3_0_3_funcs -ffffffff82ab4060 r gfxhub_v3_0_3_vmhub_funcs +ffffffff82232130 t to_dal_irq_source_dcn31 +ffffffff82233000 T dal_irq_service_dcn314_create +ffffffff82233080 t hpd_ack +ffffffff82233130 t to_dal_irq_source_dcn314 +ffffffff82234000 T dal_irq_service_dcn315_create +ffffffff82234080 t hpd_ack +ffffffff82234130 t to_dal_irq_source_dcn315 +ffffffff82235000 T dal_irq_service_dcn32_create +ffffffff82235080 t hpd_ack +ffffffff82235130 t to_dal_irq_source_dcn32 +ffffffff82236000 T dal_irq_service_construct +ffffffff82236070 T dal_irq_service_destroy +ffffffff82236100 T dal_irq_service_set_generic +ffffffff82236180 T dal_irq_service_set +ffffffff822362a0 T dal_irq_service_ack +ffffffff82236390 T dal_irq_service_ack_generic +ffffffff82236400 T dal_irq_service_to_irq_source +ffffffff82237000 T dp_trace_init +ffffffff822370a0 T dp_trace_reset +ffffffff82237130 T dc_dp_trace_is_initialized +ffffffff82237160 T dp_trace_detect_lt_init +ffffffff822371b0 T dp_trace_commit_lt_init +ffffffff82237200 T dp_trace_link_loss_increment +ffffffff82237230 T dp_trace_lt_fail_count_update +ffffffff82237270 T dp_trace_lt_total_count_increment +ffffffff822372b0 T dc_dp_trace_set_is_logged_flag +ffffffff822372f0 T dc_dp_trace_is_logged +ffffffff82237330 T dp_trace_lt_result_update +ffffffff82237370 T dp_trace_set_lt_start_timestamp +ffffffff82237450 T dp_trace_set_lt_end_timestamp +ffffffff82237530 T dc_dp_trace_get_lt_end_timestamp +ffffffff82237570 T dc_dp_trace_get_lt_counts +ffffffff822375b0 T dc_dp_trace_get_link_loss_count +ffffffff822375e0 T dp_trace_set_edp_power_timestamp +ffffffff822376c0 T dp_trace_get_edp_poweron_timestamp +ffffffff822376f0 T dp_trace_get_edp_poweroff_timestamp +ffffffff82238000 T set_dio_throttled_vcp_size +ffffffff82238020 T setup_dio_stream_encoder +ffffffff822380e0 T reset_dio_stream_encoder +ffffffff822381a0 T setup_dio_stream_attribute +ffffffff82238320 T enable_dio_dp_link_output +ffffffff82238390 T disable_dio_link_output +ffffffff822383d0 T set_dio_dp_link_test_pattern +ffffffff82238410 T set_dio_dp_lane_settings +ffffffff82238450 T can_use_dio_link_hwss +ffffffff82238490 T get_dio_link_hwss +ffffffff822384c0 t update_dio_stream_allocation_table +ffffffff82239000 T can_use_dpia_link_hwss +ffffffff82239050 T get_dpia_link_hwss +ffffffff82239080 t update_dpia_stream_allocation_table +ffffffff8223a000 T can_use_hpo_dp_link_hwss +ffffffff8223a030 T get_hpo_dp_link_hwss +ffffffff8223a060 t set_hpo_dp_hblank_min_symbol_width +ffffffff8223a130 t set_hpo_dp_throttled_vcp_size +ffffffff8223a160 t enable_hpo_dp_link_output +ffffffff8223a290 t set_hpo_dp_link_test_pattern +ffffffff8223a2d0 t set_hpo_dp_lane_settings +ffffffff8223a300 t update_hpo_dp_stream_allocation_table +ffffffff8223a320 t setup_hpo_dp_stream_encoder +ffffffff8223a4a0 t reset_hpo_dp_stream_encoder +ffffffff8223a590 t setup_hpo_dp_stream_attribute +ffffffff8223a5f0 t disable_hpo_dp_link_output +ffffffff8223b000 T virtual_link_encoder_construct +ffffffff8223b060 t virtual_link_encoder_validate_output_with_stream +ffffffff8223b090 t virtual_link_encoder_hw_init +ffffffff8223b0c0 t virtual_link_encoder_setup +ffffffff8223b0f0 t virtual_link_encoder_enable_tmds_output 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virtual_stream_encoder_hdmi_set_stream_attribute +ffffffff8223d170 t virtual_stream_encoder_dvi_set_stream_attribute +ffffffff8223d1a0 t virtual_stream_encoder_set_throttled_vcp_size +ffffffff8223d1d0 t virtual_stream_encoder_update_hdmi_info_packets +ffffffff8223d200 t virtual_stream_encoder_stop_hdmi_info_packets +ffffffff8223d230 t virtual_stream_encoder_update_dp_info_packets +ffffffff8223d260 t virtual_stream_encoder_stop_dp_info_packets +ffffffff8223d290 t virtual_stream_encoder_dp_blank +ffffffff8223d2c0 t virtual_stream_encoder_dp_unblank +ffffffff8223d2f0 t virtual_audio_mute_control +ffffffff8223d320 t virtual_setup_stereo_sync +ffffffff8223d350 t virtual_stream_encoder_set_avmute +ffffffff8223d380 t virtual_dig_connect_to_otg +ffffffff8223d3b0 t virtual_stream_encoder_reset_hdmi_stream_attribute +ffffffff8223d3e0 t virtual_stream_encoder_set_dsc_pps_info_packet +ffffffff8223d410 t virtual_enc_dp_set_odm_combine +ffffffff8223e000 T dmub_dcn20_use_cached_inbox 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+ffffffff8223ef70 T dmub_dcn20_get_current_time +ffffffff8223efa0 T dmub_dcn20_get_diagnostic_data +ffffffff82240000 T dmub_dcn21_is_phy_init +ffffffff82241000 T dmub_dcn30_backdoor_load +ffffffff82241260 T dmub_dcn30_setup_windows +ffffffff82242000 T dmub_dcn31_reset +ffffffff82242280 T dmub_dcn31_reset_release +ffffffff82242350 T dmub_dcn31_backdoor_load +ffffffff822425b0 T dmub_dcn31_setup_windows +ffffffff822428f0 T dmub_dcn31_setup_mailbox +ffffffff82242940 T dmub_dcn31_get_inbox1_rptr +ffffffff82242970 T dmub_dcn31_set_inbox1_wptr +ffffffff822429a0 T dmub_dcn31_setup_out_mailbox +ffffffff822429f0 T dmub_dcn31_get_outbox1_wptr +ffffffff82242a20 T dmub_dcn31_set_outbox1_rptr +ffffffff82242a50 T dmub_dcn31_is_hw_init +ffffffff82242ad0 T dmub_dcn31_is_supported +ffffffff82242b30 T dmub_dcn31_set_gpint +ffffffff82242b60 T dmub_dcn31_is_gpint_acked +ffffffff82242bc0 T dmub_dcn31_get_gpint_response +ffffffff82242bf0 T dmub_dcn31_get_gpint_dataout +ffffffff82242d10 T dmub_dcn31_get_fw_boot_status +ffffffff82242d40 T dmub_dcn31_enable_dmub_boot_options +ffffffff82242dc0 T dmub_dcn31_skip_dmub_panel_power_sequence +ffffffff82242e20 T dmub_dcn31_setup_outbox0 +ffffffff82242e70 T dmub_dcn31_get_outbox0_wptr +ffffffff82242ea0 T dmub_dcn31_set_outbox0_rptr +ffffffff82242ed0 T dmub_dcn31_get_current_time +ffffffff82242f00 T dmub_dcn31_get_diagnostic_data +ffffffff822433a0 T dmub_dcn31_should_detect +ffffffff82244000 T dmub_dcn32_reset +ffffffff822441d0 T dmub_dcn32_reset_release +ffffffff822442c0 T dmub_dcn32_backdoor_load +ffffffff82244520 T dmub_dcn32_backdoor_load_zfb_mode +ffffffff82244710 T dmub_dcn32_setup_windows +ffffffff82244a50 T dmub_dcn32_setup_mailbox +ffffffff82244aa0 T dmub_dcn32_get_inbox1_rptr +ffffffff82244ad0 T dmub_dcn32_set_inbox1_wptr +ffffffff82244b00 T dmub_dcn32_setup_out_mailbox +ffffffff82244b50 T dmub_dcn32_get_outbox1_wptr +ffffffff82244b80 T dmub_dcn32_set_outbox1_rptr +ffffffff82244bb0 T dmub_dcn32_is_hw_init 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dmub_flush_buffer_mem +ffffffff82247030 T dmub_srv_create +ffffffff82247560 T dmub_srv_destroy +ffffffff82247580 T dmub_srv_calc_region_info +ffffffff822477f0 T dmub_srv_calc_fb_info +ffffffff82247990 T dmub_srv_has_hw_support +ffffffff82247a00 T dmub_srv_is_hw_init +ffffffff82247a80 T dmub_srv_hw_init +ffffffff82247ed0 T dmub_srv_hw_reset +ffffffff82247f60 T dmub_srv_cmd_queue +ffffffff82248070 T dmub_srv_cmd_execute +ffffffff82248130 T dmub_srv_wait_for_auto_load +ffffffff822481d0 T dmub_srv_wait_for_phy_init +ffffffff82248280 T dmub_srv_wait_for_idle +ffffffff82248330 T dmub_srv_send_gpint_command +ffffffff82248420 T dmub_srv_get_gpint_response +ffffffff82248480 T dmub_srv_get_gpint_dataout +ffffffff822484e0 T dmub_srv_get_fw_boot_status +ffffffff82248550 T dmub_srv_cmd_with_reply_data +ffffffff822487c0 T dmub_srv_get_outbox0_msg +ffffffff82248860 T dmub_srv_get_diagnostic_data +ffffffff822488c0 T dmub_srv_should_detect +ffffffff82248910 T dmub_srv_clear_inbox0_ack +ffffffff82248960 T dmub_srv_wait_for_inbox0_ack +ffffffff822489f0 T dmub_srv_send_inbox0_cmd +ffffffff82249000 T dmub_srv_stat_get_notification +ffffffff8224a000 T setup_x_points_distribution +ffffffff8224a170 T log_x_points_distribution +ffffffff8224a1a0 T precompute_pq +ffffffff8224a370 t compute_pq +ffffffff8224a580 T precompute_de_pq +ffffffff8224a6e0 t compute_de_pq +ffffffff8224a9a0 T calculate_user_regamma_coeff +ffffffff8224ad70 t apply_lut_1d +ffffffff8224b0a0 T calculate_user_regamma_ramp +ffffffff8224b9e0 T mod_color_calculate_degamma_params +ffffffff8224bfb0 t build_evenly_distributed_points +ffffffff8224c130 t scale_gamma +ffffffff8224c2e0 t build_degamma +ffffffff8224c6b0 t build_hlg_degamma +ffffffff8224c8d0 t map_regamma_hw_to_x_user +ffffffff8224d030 T mod_color_calculate_regamma_params +ffffffff8224f1a0 T mod_color_calculate_degamma_curve +ffffffff8224f660 t translate_from_linear_space +ffffffff8224f9a0 t build_coefficients +ffffffff8224fb20 t calculate_mapped_value +ffffffff82250000 T mod_color_is_table_init +ffffffff82250050 T mod_color_get_table +ffffffff822500a0 T mod_color_set_table_init_state +ffffffff82251000 T mod_freesync_create +ffffffff82251070 T mod_freesync_destroy +ffffffff822510b0 T mod_freesync_calc_v_total_from_refresh +ffffffff82251140 T mod_freesync_get_vmin_vmax +ffffffff82251180 T mod_freesync_get_v_position +ffffffff82251200 T mod_freesync_build_vrr_infopacket +ffffffff82251950 T mod_freesync_build_vrr_params +ffffffff82251cd0 T mod_freesync_calc_nominal_field_rate +ffffffff82251d30 T mod_freesync_handle_preflip +ffffffff82252150 T mod_freesync_handle_v_update +ffffffff82252610 T mod_freesync_get_settings +ffffffff82252680 T mod_freesync_calc_field_rate_from_timing +ffffffff822526d0 T mod_freesync_get_freesync_enabled +ffffffff82252700 T mod_freesync_is_valid_range +ffffffff82253000 T mod_build_vsc_infopacket +ffffffff82253200 T mod_build_hf_vsif_infopacket +ffffffff82254000 T dmub_init_abm_config +ffffffff82254540 t fill_iram_v_2_3 +ffffffff822549a0 T dmcu_load_iram +ffffffff82255180 T is_psr_su_specific_panel +ffffffff82255210 T mod_power_calc_psr_configs +ffffffff82255310 T mod_power_only_edp +ffffffff82255360 T psr_su_set_y_granularity +ffffffff82256000 T mod_vmid_get_for_ptb +ffffffff82256230 T mod_vmid_reset +ffffffff822562f0 T mod_vmid_create +ffffffff82256430 T mod_vmid_destroy +ffffffff82257000 T amdgpu_dpm_get_sclk +ffffffff82257090 T amdgpu_dpm_get_mclk +ffffffff82257120 T amdgpu_dpm_set_powergating_by_smu +ffffffff82257200 T amdgpu_dpm_set_gfx_power_up_by_imu +ffffffff82257310 T amdgpu_dpm_baco_enter +ffffffff822573a0 T amdgpu_dpm_baco_exit +ffffffff82257430 T amdgpu_dpm_set_mp1_state +ffffffff822574d0 T amdgpu_dpm_is_baco_supported +ffffffff82257580 T amdgpu_dpm_mode2_reset +ffffffff82257610 T amdgpu_dpm_baco_reset +ffffffff822576c0 T amdgpu_dpm_is_mode1_reset_supported +ffffffff82257730 T amdgpu_dpm_mode1_reset +ffffffff822577b0 T amdgpu_dpm_switch_power_profile +ffffffff82257860 T amdgpu_dpm_set_xgmi_pstate +ffffffff82257900 T amdgpu_dpm_set_df_cstate +ffffffff822579a0 T amdgpu_dpm_allow_xgmi_power_down +ffffffff82257a20 T amdgpu_dpm_enable_mgpu_fan_boost +ffffffff82257ab0 T amdgpu_dpm_set_clockgating_by_smu +ffffffff82257b50 T amdgpu_dpm_smu_i2c_bus_access +ffffffff82257bf0 T amdgpu_pm_acpi_event_handler +ffffffff82257cb0 T amdgpu_dpm_read_sensor +ffffffff82257d70 T amdgpu_dpm_compute_clocks +ffffffff82257e50 T amdgpu_dpm_enable_uvd +ffffffff82258040 T amdgpu_dpm_enable_vce +ffffffff82258230 T amdgpu_dpm_enable_jpeg +ffffffff82258330 T amdgpu_pm_load_smu_firmware +ffffffff822583e0 T amdgpu_dpm_handle_passthrough_sbr +ffffffff82258460 T amdgpu_dpm_send_hbm_bad_pages_num +ffffffff822584e0 T amdgpu_dpm_send_hbm_bad_channel_flag +ffffffff82258560 T amdgpu_dpm_get_dpm_freq_range +ffffffff82258600 T amdgpu_dpm_set_soft_freq_range +ffffffff822586a0 T amdgpu_dpm_write_watermarks_table +ffffffff82258720 T amdgpu_dpm_wait_for_event +ffffffff822587b0 T amdgpu_dpm_set_residency_gfxoff +ffffffff82258830 T amdgpu_dpm_get_residency_gfxoff +ffffffff822588b0 T amdgpu_dpm_get_entrycount_gfxoff +ffffffff82258930 T amdgpu_dpm_get_status_gfxoff +ffffffff822589b0 T amdgpu_dpm_get_thermal_throttling_counter +ffffffff82258a00 T amdgpu_dpm_gfx_state_change +ffffffff82258a70 T amdgpu_dpm_get_ecc_info +ffffffff82258af0 T amdgpu_dpm_get_vce_clock_state +ffffffff82258b80 T amdgpu_dpm_get_current_power_state +ffffffff82258bf0 T amdgpu_dpm_set_power_state +ffffffff82258d50 T amdgpu_dpm_dispatch_task +ffffffff82258df0 T amdgpu_dpm_get_performance_level +ffffffff82258e80 T amdgpu_dpm_force_performance_level +ffffffff82259060 T amdgpu_dpm_get_pp_num_states +ffffffff822590f0 T amdgpu_dpm_get_pp_table +ffffffff82259180 T amdgpu_dpm_set_fine_grain_clk_vol +ffffffff82259220 T amdgpu_dpm_odn_edit_dpm_table +ffffffff822592c0 T amdgpu_dpm_print_clock_levels +ffffffff82259350 T amdgpu_dpm_emit_clock_levels +ffffffff822593f0 T amdgpu_dpm_set_ppfeature_status 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+ffffffff8225a1a0 T amdgpu_dpm_is_overdrive_supported +ffffffff8225a240 T amdgpu_dpm_set_pp_table +ffffffff8225a2e0 T amdgpu_dpm_get_num_cpu_cores +ffffffff8225a330 T amdgpu_dpm_stb_debug_fs_init +ffffffff8225a380 T amdgpu_dpm_display_configuration_change +ffffffff8225a410 T amdgpu_dpm_get_clock_by_type +ffffffff8225a4b0 T amdgpu_dpm_get_display_mode_validation_clks +ffffffff8225a540 T amdgpu_dpm_get_clock_by_type_with_latency +ffffffff8225a5e0 T amdgpu_dpm_get_clock_by_type_with_voltage +ffffffff8225a680 T amdgpu_dpm_set_watermarks_for_clocks_ranges +ffffffff8225a710 T amdgpu_dpm_display_clock_voltage_request +ffffffff8225a7a0 T amdgpu_dpm_get_current_clocks +ffffffff8225a830 T amdgpu_dpm_notify_smu_enable_pwe +ffffffff8225a8b0 T amdgpu_dpm_set_active_display_count +ffffffff8225a940 T amdgpu_dpm_set_min_deep_sleep_dcefclk +ffffffff8225a9d0 T amdgpu_dpm_set_hard_min_dcefclk_by_freq +ffffffff8225aa70 T amdgpu_dpm_set_hard_min_fclk_by_freq +ffffffff8225ab10 T amdgpu_dpm_display_disable_memory_clock_switch +ffffffff8225aba0 T amdgpu_dpm_get_max_sustainable_clocks_by_dc +ffffffff8225ac30 T amdgpu_dpm_get_uclk_dpm_states +ffffffff8225acd0 T amdgpu_dpm_get_dpm_clock_table +ffffffff8225b000 T amdgpu_dpm_get_active_displays +ffffffff8225b0a0 T amdgpu_dpm_get_vblank_time +ffffffff8225b150 T amdgpu_dpm_get_vrefresh +ffffffff8225c000 T amdgpu_pm_sysfs_init +ffffffff8225c030 T amdgpu_pm_sysfs_fini +ffffffff8225c060 T amdgpu_debugfs_pm_init +ffffffff8225d000 T amdgpu_dpm_print_class_info +ffffffff8225d2b0 T amdgpu_dpm_print_cap_info +ffffffff8225d340 T amdgpu_dpm_print_ps_status +ffffffff8225d3d0 T amdgpu_pm_print_power_states +ffffffff8225d490 T amdgpu_get_platform_caps +ffffffff8225d530 T amdgpu_parse_extended_power_table +ffffffff8225e540 T amdgpu_free_extended_power_table +ffffffff8225e650 T amdgpu_add_thermal_controller +ffffffff8225ea80 T amdgpu_get_vce_clock_state +ffffffff8225eac0 T amdgpu_legacy_dpm_compute_clocks +ffffffff8225ef30 T amdgpu_dpm_thermal_work_handler +ffffffff82260000 t pp_early_init +ffffffff82260100 t pp_late_init +ffffffff82260220 t pp_sw_init +ffffffff82260240 t pp_sw_fini +ffffffff822602d0 t pp_hw_init +ffffffff82260330 t pp_hw_fini +ffffffff82260370 t pp_late_fini +ffffffff822603d0 t pp_suspend +ffffffff822603f0 t pp_resume +ffffffff82260410 t pp_is_idle +ffffffff82260440 t pp_wait_for_idle +ffffffff82260470 t pp_sw_reset +ffffffff822604a0 t pp_set_clockgating_state +ffffffff822604d0 t pp_set_powergating_state +ffffffff82260500 t pp_dpm_set_fan_control_mode +ffffffff82260570 t pp_dpm_get_fan_control_mode +ffffffff822605e0 t pp_dpm_set_fan_speed_pwm +ffffffff82260640 t pp_dpm_get_fan_speed_pwm +ffffffff822606a0 t pp_dpm_force_clock_level +ffffffff82260700 t pp_dpm_print_clock_levels +ffffffff82260760 t pp_dpm_emit_clock_levels +ffffffff822607c0 t pp_dpm_force_performance_level +ffffffff82260860 t pp_dpm_get_sclk_od +ffffffff822608c0 t pp_dpm_set_sclk_od +ffffffff82260920 t pp_dpm_get_mclk_od +ffffffff82260980 t pp_dpm_set_mclk_od +ffffffff822609e0 t pp_dpm_read_sensor +ffffffff82260a80 t pp_dpm_get_performance_level +ffffffff82260ac0 t pp_dpm_get_current_power_state +ffffffff82260b40 t pp_dpm_get_fan_speed_rpm +ffffffff82260ba0 t pp_dpm_set_fan_speed_rpm +ffffffff82260c00 t pp_dpm_get_pp_num_states +ffffffff82260d40 t pp_dpm_get_pp_table +ffffffff82260d90 t pp_dpm_set_pp_table +ffffffff82260ec0 t pp_dpm_switch_power_profile +ffffffff82261000 t pp_dpm_get_vce_clock_state +ffffffff82261050 t pp_dpm_dispatch_tasks +ffffffff82261090 t pp_dpm_load_fw +ffffffff82261100 t pp_dpm_fw_loading_complete +ffffffff82261130 t pp_set_powergating_by_smu +ffffffff822612b0 t pp_set_clockgating_by_smu +ffffffff82261320 t pp_set_power_limit +ffffffff822613e0 t pp_get_power_limit +ffffffff82261480 t pp_get_power_profile_mode +ffffffff822614e0 t pp_set_power_profile_mode +ffffffff82261540 t pp_set_fine_grain_clk_vol +ffffffff822615a0 t pp_odn_edit_dpm_table +ffffffff82261600 t pp_dpm_set_mp1_state +ffffffff82261660 t pp_smu_i2c_bus_access +ffffffff822616c0 t pp_gfx_state_change_set +ffffffff82261720 t pp_dpm_get_sclk +ffffffff82261770 t pp_dpm_get_mclk +ffffffff822617c0 t pp_display_configuration_change +ffffffff82261810 t pp_get_display_power_level +ffffffff82261850 t pp_get_current_clocks +ffffffff82261970 t pp_get_clock_by_type +ffffffff822619c0 t pp_get_clock_by_type_with_latency +ffffffff82261a10 t pp_get_clock_by_type_with_voltage +ffffffff82261a60 t pp_set_watermarks_for_clocks_ranges +ffffffff82261aa0 t pp_display_clock_voltage_request +ffffffff82261ae0 t pp_get_display_mode_validation_clocks +ffffffff82261b40 t pp_notify_smu_enable_pwe +ffffffff82261ba0 t pp_enable_mgpu_fan_boost +ffffffff82261c00 t pp_set_active_display_count +ffffffff82261c40 t pp_set_hard_min_dcefclk_by_freq +ffffffff82261ca0 t pp_set_hard_min_fclk_by_freq +ffffffff82261d00 t pp_set_min_deep_sleep_dcefclk +ffffffff82261d60 t pp_get_asic_baco_capability +ffffffff82261dd0 t pp_get_asic_baco_state +ffffffff82261e30 t pp_set_asic_baco_state +ffffffff82261ea0 t pp_get_ppfeature_status +ffffffff82261f00 t pp_set_ppfeature_status +ffffffff82261f50 t pp_asic_reset_mode_2 +ffffffff82261fb0 t pp_set_df_cstate +ffffffff82262010 t pp_set_xgmi_pstate +ffffffff82262070 t pp_get_gpu_metrics +ffffffff822620d0 t pp_get_prv_buffer_details +ffffffff82262150 t pp_pm_compute_clocks +ffffffff82263000 T ci_baco_set_state +ffffffff82264000 T baco_program_registers +ffffffff822640d0 t baco_cmd_handler +ffffffff82264250 T soc15_baco_program_registers +ffffffff82265000 T fiji_baco_set_state +ffffffff82266000 T phm_setup_asic +ffffffff82266050 T phm_power_down_asic +ffffffff822660a0 T phm_set_power_state +ffffffff82266110 T phm_enable_dynamic_state_management +ffffffff822661c0 T phm_disable_dynamic_state_management +ffffffff82266260 T phm_force_dpm_levels +ffffffff822662b0 T phm_apply_state_adjust_rules +ffffffff82266300 T phm_apply_clock_adjust_rules +ffffffff82266350 T phm_powerdown_uvd +ffffffff822663a0 T phm_disable_clock_power_gatings +ffffffff822663f0 T phm_pre_display_configuration_changed +ffffffff82266450 T phm_display_configuration_changed +ffffffff822664b0 T phm_notify_smc_display_config_after_ps_adjustment +ffffffff82266510 T phm_stop_thermal_controller +ffffffff82266570 T phm_register_irq_handlers +ffffffff822665c0 T phm_start_thermal_controller +ffffffff82266700 T phm_check_smc_update_required_for_display_configuration +ffffffff82266760 T phm_check_states_equal +ffffffff822667b0 T phm_store_dal_configuration_data +ffffffff82266900 T phm_get_dal_power_level +ffffffff82266960 T phm_set_cpu_power_state +ffffffff822669b0 T phm_get_performance_level +ffffffff82266a10 T phm_get_clock_info +ffffffff82266b90 T phm_get_current_shallow_sleep_clocks +ffffffff82266be0 T phm_get_clock_by_type +ffffffff82266c30 T phm_get_clock_by_type_with_latency +ffffffff82266c80 T phm_get_clock_by_type_with_voltage +ffffffff82266cd0 T phm_set_watermarks_for_clocks_ranges +ffffffff82266d20 T phm_display_clock_voltage_request +ffffffff82266d70 T phm_get_max_high_clocks +ffffffff82266dc0 T phm_disable_smc_firmware_ctf +ffffffff82266e20 T phm_set_active_display_count +ffffffff82267000 T hwmgr_early_init +ffffffff82267470 T hwmgr_sw_init +ffffffff822674e0 T hwmgr_sw_fini +ffffffff82267530 T hwmgr_hw_init +ffffffff822676f0 T hwmgr_hw_fini +ffffffff822677b0 T hwmgr_suspend +ffffffff82267830 T hwmgr_resume +ffffffff822678d0 T hwmgr_handle_task +ffffffff82268000 T polaris_baco_set_state +ffffffff82269000 T pp_override_get_default_fuse_value +ffffffff8226a000 T psm_init_power_state_table +ffffffff8226a2a0 T psm_fini_power_state_table +ffffffff8226a360 T psm_set_boot_states +ffffffff8226a420 T psm_set_performance_states +ffffffff8226a4e0 T psm_set_user_performance_state +ffffffff8226a580 T psm_adjust_power_state_dynamic +ffffffff8226b000 T atomctrl_initialize_mc_reg_table +ffffffff8226b210 T atomctrl_initialize_mc_reg_table_v2_2 +ffffffff8226b420 T atomctrl_set_engine_dram_timings_rv770 +ffffffff8226b490 T atomctrl_get_memory_pll_dividers_si +ffffffff8226b570 T atomctrl_get_memory_pll_dividers_vi +ffffffff8226b5f0 T atomctrl_get_memory_pll_dividers_ai +ffffffff8226b6a0 T atomctrl_get_engine_pll_dividers_kong +ffffffff8226b720 T atomctrl_get_engine_pll_dividers_vi +ffffffff8226b7e0 T atomctrl_get_engine_pll_dividers_ai +ffffffff8226b8c0 T atomctrl_get_dfs_pll_dividers_vi +ffffffff8226b980 T atomctrl_get_reference_clock +ffffffff8226b9e0 T atomctrl_is_voltage_controlled_by_gpio_v3 +ffffffff8226baa0 T atomctrl_get_voltage_table_v3 +ffffffff8226bc00 T atomctrl_get_pp_assign_pin +ffffffff8226bcf0 T atomctrl_calculate_voltage_evv_on_sclk +ffffffff8226c070 T atomctrl_get_voltage_evv_on_sclk +ffffffff8226c0f0 T atomctrl_get_voltage_evv +ffffffff8226c1a0 T atomctrl_get_mpll_reference_clock +ffffffff8226c210 T atomctrl_is_asic_internal_ss_supported +ffffffff8226c260 T atomctrl_get_memory_clock_spread_spectrum +ffffffff8226c360 T atomctrl_get_engine_clock_spread_spectrum +ffffffff8226c460 T atomctrl_read_efuse +ffffffff8226c510 T atomctrl_set_ac_timing_ai +ffffffff8226c570 T atomctrl_get_voltage_evv_on_sclk_ai +ffffffff8226c5f0 T atomctrl_get_smc_sclk_range_table +ffffffff8226c6b0 T atomctrl_get_vddc_shared_railinfo +ffffffff8226c720 T atomctrl_get_avfs_information +ffffffff8226c8a0 T atomctrl_get_svi2_info +ffffffff8226c980 T atomctrl_get_leakage_id_from_efuse +ffffffff8226c9e0 T atomctrl_get_leakage_vddc_base_on_leakage +ffffffff8226cb80 T atomctrl_get_voltage_range +ffffffff8226cc40 T atomctrl_get_edc_hilo_leakage_offset_table +ffffffff8226ccc0 T atomctrl_get_edc_leakage_table +ffffffff8226d000 T pp_atomfwctrl_is_voltage_controlled_by_gpio_v4 +ffffffff8226d0d0 T pp_atomfwctrl_get_voltage_table_v4 +ffffffff8226d290 T pp_atomfwctrl_get_pp_assign_pin +ffffffff8226d370 T pp_atomfwctrl_enter_self_refresh +ffffffff8226d3a0 T pp_atomfwctrl_get_gpu_pll_dividers_vega10 +ffffffff8226d450 T pp_atomfwctrl_get_avfs_information +ffffffff8226d780 T pp_atomfwctrl_get_gpio_information +ffffffff8226d820 T pp_atomfwctrl_get_clk_information_by_clkid +ffffffff8226d8a0 T pp_atomfwctrl_get_vbios_bootup_values +ffffffff8226dc20 T pp_atomfwctrl_get_smc_dpm_information +ffffffff8226e000 T encode_pcie_lane_width +ffffffff8226e030 T decode_pcie_lane_width +ffffffff8226f000 t pp_tables_v1_0_initialize +ffffffff82270430 t pp_tables_v1_0_uninitialize +ffffffff822705e0 T get_number_of_powerplay_table_entries_v1_0 +ffffffff82270690 T get_powerplay_table_entry_v1_0 +ffffffff82271000 T pp_tables_get_response_times +ffffffff822710d0 T pp_tables_get_num_of_entries +ffffffff82271190 T pp_tables_get_entry +ffffffff822714f0 t init_non_clock_fields +ffffffff82271670 t pp_tables_initialize +ffffffff82272ad0 t pp_tables_uninitialize +ffffffff82272cd0 t get_number_of_vce_state_table_entries +ffffffff82272dd0 t get_vce_state_table_entry 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smu10_get_clock_by_type_with_latency +ffffffff82274500 t smu10_get_clock_by_type_with_voltage +ffffffff82274610 t smu10_set_watermarks_for_clocks_ranges +ffffffff822746e0 t smu10_display_clock_voltage_request +ffffffff82274780 t smu10_get_max_high_clocks +ffffffff822747b0 t smu10_power_off_asic +ffffffff82274800 t smu10_force_clock_level +ffffffff822749c0 t smu10_print_clock_levels +ffffffff82274d60 t smu10_gfx_off_control +ffffffff82274e70 t smu10_read_sensor +ffffffff82274ff0 t smu10_set_active_display_count +ffffffff82275050 t smu10_set_min_deep_sleep_dcefclk +ffffffff822750b0 t smu10_get_power_profile_mode +ffffffff822750f0 t smu10_set_power_profile_mode +ffffffff82275240 t smu10_set_fine_grain_clk_vol +ffffffff82275450 t smu10_powergate_mmhub +ffffffff82275470 t smu10_smus_notify_pwe +ffffffff82275490 t smu10_powergate_sdma +ffffffff822754b0 t smu10_set_hard_min_dcefclk_by_freq +ffffffff82275510 t smu10_set_hard_min_fclk_by_freq +ffffffff82275570 t smu10_set_hard_min_gfxclk_by_freq +ffffffff822755d0 t smu10_set_soft_max_gfxclk_by_freq +ffffffff82275630 t smu10_asic_reset +ffffffff82275650 t smu10_gfx_state_change +ffffffff82275690 t smu10_dpm_get_pp_table_entry_callback +ffffffff82276000 T smu7_baco_get_capability +ffffffff82276060 T smu7_baco_get_state +ffffffff822760b0 T smu7_baco_set_state +ffffffff82277000 T smu7_powerdown_uvd +ffffffff82277050 T smu7_disable_clock_power_gating +ffffffff822770e0 T smu7_powergate_uvd +ffffffff822771d0 T smu7_powergate_vce +ffffffff822772c0 T smu7_update_clock_gatings +ffffffff82277670 T smu7_powergate_gfx +ffffffff82278000 T smu7_get_sleep_divider_id_from_clock +ffffffff822780a0 T smu7_init_function_pointers +ffffffff82278100 t smu7_hwmgr_backend_init +ffffffff82279f50 t smu7_hwmgr_backend_fini +ffffffff82279fc0 t smu7_setup_asic_task +ffffffff8227a330 t smu7_get_power_state_size +ffffffff8227a360 t smu7_apply_state_adjust_rules +ffffffff8227a7e0 t smu7_force_dpm_level +ffffffff8227ac10 t smu7_enable_dpm_tasks +ffffffff8227d380 t smu7_disable_dpm_tasks +ffffffff8227dac0 t smu7_dpm_patch_boot_state +ffffffff8227dc00 t smu7_get_pp_table_entry +ffffffff8227e000 t smu7_get_number_of_powerplay_table_entries +ffffffff8227e070 t smu7_dpm_get_mclk +ffffffff8227e110 t smu7_dpm_get_sclk +ffffffff8227e1b0 t smu7_set_power_state_tasks +ffffffff8227ef40 t smu7_notify_smc_display_config_after_ps_adjustment +ffffffff8227ef70 t smu7_display_configuration_changed_task +ffffffff8227f130 t smu7_set_max_fan_rpm_output +ffffffff8227f160 t smu7_set_max_fan_pwm_output +ffffffff8227f180 t smu7_set_fan_control_mode +ffffffff8227f210 t smu7_get_fan_control_mode +ffffffff8227f250 t smu7_register_irq_handlers +ffffffff8227f300 t smu7_check_smc_update_required_for_display_configuration +ffffffff8227f3c0 t smu7_check_states_equal +ffffffff8227f560 t smu7_get_performance_level +ffffffff8227f600 t smu7_get_clock_by_type +ffffffff8227f7c0 t smu7_get_clock_by_type_with_latency +ffffffff8227f960 t smu7_set_watermarks_for_clocks_ranges +ffffffff8227fba0 t smu7_get_max_high_clocks +ffffffff8227fc20 t smu7_power_off_asic +ffffffff8227fc80 t smu7_force_clock_level +ffffffff8227fd90 t smu7_print_clock_levels +ffffffff82280370 t smu7_get_sclk_od +ffffffff822803e0 t smu7_set_sclk_od +ffffffff822804a0 t smu7_get_mclk_od +ffffffff82280510 t smu7_set_mclk_od +ffffffff822805d0 t smu7_read_sensor +ffffffff822808a0 t smu7_avfs_control +ffffffff82280970 t smu7_notify_cac_buffer_info +ffffffff82280b10 t smu7_get_thermal_temperature_range +ffffffff82280ba0 t smu7_get_power_profile_mode +ffffffff82280be0 t smu7_set_power_profile_mode +ffffffff82280e40 t smu7_odn_edit_dpm_table +ffffffff82280ff0 t phm_add_voltage +ffffffff82281100 t smu7_get_profiling_clk +ffffffff822812c0 t smu7_check_dpm_table_updated +ffffffff82281410 t smu7_odn_initial_default_setting +ffffffff82281540 t smu7_set_dpm_event_sources +ffffffff82281660 t smu7_get_pp_table_entry_callback_func_v0 +ffffffff82281b60 t smu7_get_pp_table_entry_callback_func_v1 +ffffffff82283000 T smu7_enable_didt_config +ffffffff822833c0 t smu7_program_pt_config_registers +ffffffff822835b0 t smu7_enable_didt +ffffffff822837a0 T smu7_disable_didt_config +ffffffff82283860 T smu7_enable_smc_cac +ffffffff822838f0 T smu7_disable_smc_cac +ffffffff82283980 T smu7_set_power_limit +ffffffff822839e0 T smu7_enable_power_containment +ffffffff82283b70 T smu7_disable_power_containment +ffffffff82283c90 T smu7_power_control_set_level +ffffffff82284000 T smu7_fan_ctrl_get_fan_speed_info +ffffffff82284080 T smu7_fan_ctrl_get_fan_speed_pwm +ffffffff82284140 T smu7_fan_ctrl_get_fan_speed_rpm +ffffffff822841f0 T smu7_fan_ctrl_set_static_mode +ffffffff82284320 T smu7_fan_ctrl_set_default_mode +ffffffff82284400 T smu7_fan_ctrl_start_smc_fan_control +ffffffff82284530 T smu7_fan_ctrl_stop_smc_fan_control +ffffffff82284550 T smu7_fan_ctrl_set_fan_speed_pwm +ffffffff82284740 T smu7_fan_ctrl_reset_fan_speed_to_default +ffffffff82284930 T smu7_fan_ctrl_set_fan_speed_rpm +ffffffff82284b10 T smu7_thermal_get_temperature +ffffffff82284b70 T smu7_thermal_disable_alert +ffffffff82284c10 T smu7_thermal_stop_thermal_controller +ffffffff82284d90 T smu7_start_thermal_controller +ffffffff82285140 T smu7_thermal_ctrl_uninitialize_thermal_controller +ffffffff82286000 T smu8_init_function_pointers +ffffffff82286040 t smu8_hwmgr_backend_init +ffffffff82286520 t smu8_hwmgr_backend_fini +ffffffff822865a0 t smu8_setup_asic_task +ffffffff82286ac0 t smu8_get_power_state_size +ffffffff82286af0 t smu8_apply_state_adjust_rules +ffffffff82286c40 t smu8_dpm_force_dpm_level +ffffffff82286f40 t smu8_enable_dpm_tasks +ffffffff82287090 t smu8_disable_dpm_tasks +ffffffff82287170 t smu8_dpm_patch_boot_state +ffffffff822871d0 t smu8_dpm_get_pp_table_entry +ffffffff82287230 t smu8_dpm_get_num_of_pp_table_entries +ffffffff82287280 t smu8_dpm_powerdown_uvd +ffffffff822872d0 t smu8_dpm_powergate_vce +ffffffff822874a0 t smu8_dpm_powergate_uvd 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smu_v11_0_set_allowed_mask +ffffffff822ee310 T smu_v11_0_system_features_control +ffffffff822ee330 T smu_v11_0_notify_display_change +ffffffff822ee3a0 T smu_v11_0_init_max_sustainable_clocks +ffffffff822ee610 t smu_v11_0_get_max_sustainable_clock +ffffffff822ee730 T smu_v11_0_get_current_power_limit +ffffffff822ee800 T smu_v11_0_set_power_limit +ffffffff822ee940 T smu_v11_0_interrupt_work +ffffffff822ee9c0 T smu_v11_0_enable_thermal_alert +ffffffff822eea60 T smu_v11_0_disable_thermal_alert +ffffffff822eea80 T smu_v11_0_get_gfx_vdd +ffffffff822eeb40 T smu_v11_0_display_clock_voltage_request +ffffffff822eec80 T smu_v11_0_set_hard_freq_limited_range +ffffffff822eed60 T smu_v11_0_gfx_off_control +ffffffff822eedd0 T smu_v11_0_get_fan_control_mode +ffffffff822eee20 T smu_v11_0_set_fan_speed_pwm +ffffffff822eefc0 t smu_v11_0_set_fan_static_mode +ffffffff822ef170 T smu_v11_0_set_fan_speed_rpm +ffffffff822ef290 T smu_v11_0_get_fan_speed_pwm +ffffffff822ef3d0 T smu_v11_0_get_fan_speed_rpm +ffffffff822ef4d0 T smu_v11_0_set_fan_control_mode +ffffffff822ef670 T smu_v11_0_set_xgmi_pstate +ffffffff822ef690 T smu_v11_0_register_irq_handler +ffffffff822ef750 T smu_v11_0_get_max_sustainable_clocks_by_dc +ffffffff822ef7e0 T smu_v11_0_set_azalia_d3_pme +ffffffff822ef800 T smu_v11_0_baco_set_armd3_sequence +ffffffff822ef820 T smu_v11_0_baco_is_support +ffffffff822ef8b0 T smu_v11_0_baco_get_state +ffffffff822ef8e0 T smu_v11_0_baco_set_state +ffffffff822efb90 T smu_v11_0_baco_enter +ffffffff822efc80 T smu_v11_0_baco_exit +ffffffff822efd20 T smu_v11_0_mode1_reset +ffffffff822efda0 T smu_v11_0_handle_passthrough_sbr +ffffffff822efdc0 T smu_v11_0_get_dpm_ultimate_freq +ffffffff822eff00 T smu_v11_0_set_soft_freq_limited_range +ffffffff822effe0 T smu_v11_0_set_performance_level +ffffffff822f0330 T smu_v11_0_set_power_source +ffffffff822f0390 T smu_v11_0_get_dpm_freq_by_index +ffffffff822f0440 T smu_v11_0_get_dpm_level_count +ffffffff822f04e0 T smu_v11_0_set_single_dpm_table +ffffffff822f06c0 T smu_v11_0_get_dpm_level_range +ffffffff822f0820 T smu_v11_0_get_current_pcie_link_width_level +ffffffff822f0870 T smu_v11_0_get_current_pcie_link_width +ffffffff822f08d0 T smu_v11_0_get_current_pcie_link_speed_level +ffffffff822f0920 T smu_v11_0_get_current_pcie_link_speed +ffffffff822f0980 T smu_v11_0_gfx_ulv_control +ffffffff822f09f0 T smu_v11_0_deep_sleep_control +ffffffff822f0ba0 T smu_v11_0_restore_user_od_settings +ffffffff822f0c30 T smu_v11_0_set_smu_mailbox_registers +ffffffff822f0ca0 t smu_v11_0_set_irq_state +ffffffff822f1220 t smu_v11_0_irq_process +ffffffff822f1520 t orderly_poweroff +ffffffff822f2000 T vangogh_set_ppt_funcs +ffffffff822f2040 t vangogh_set_default_dpm_tables +ffffffff822f2070 t vangogh_common_print_clk_levels +ffffffff822f24c0 t vangogh_force_clk_levels +ffffffff822f26f0 t vangogh_od_edit_dpm_table +ffffffff822f2c50 t vangogh_get_power_profile_mode +ffffffff822f2d20 t vangogh_set_power_profile_mode +ffffffff822f2e50 t vangogh_dpm_set_vcn_enable +ffffffff822f2ea0 t vangogh_dpm_set_jpeg_enable +ffffffff822f2ef0 t vangogh_read_sensor +ffffffff822f3020 t vangogh_is_dpm_running +ffffffff822f3080 t vangogh_set_watermarks_table +ffffffff822f3210 t vangogh_set_performance_level +ffffffff822f3b40 t vangogh_get_power_limit +ffffffff822f3cc0 t vangogh_get_ppt_limit +ffffffff822f3d30 t vangogh_get_dpm_clock_table +ffffffff822f3ea0 t vangogh_init_smc_tables +ffffffff822f40f0 t vangogh_system_features_control +ffffffff822f4140 t vangogh_set_power_limit +ffffffff822f42a0 t vangogh_get_gfxoff_status +ffffffff822f4330 t vangogh_get_gfxoff_entrycount +ffffffff822f43a0 t vangogh_set_gfxoff_residency +ffffffff822f4410 t vangogh_get_gfxoff_residency +ffffffff822f4450 t vangogh_mode2_reset +ffffffff822f4590 t vangogh_common_get_gpu_metrics +ffffffff822f4be0 t vangogh_post_smu_init +ffffffff822f4d90 t vangogh_set_fine_grain_gfx_freq_parameters +ffffffff822f4e00 t vangogh_common_get_smu_metrics_data +ffffffff822f5150 t vangogh_force_dpm_limit_value +ffffffff822f5290 t vangogh_get_dpm_ultimate_freq +ffffffff822f5650 t vangogh_set_soft_freq_limited_range +ffffffff822f6000 T renoir_set_ppt_funcs +ffffffff822f60a0 t renoir_get_current_power_state +ffffffff822f6120 t renoir_print_clk_levels +ffffffff822f6390 t renoir_force_clk_levels +ffffffff822f65c0 t renoir_od_edit_dpm_table +ffffffff822f68c0 t renoir_get_power_profile_mode +ffffffff822f6990 t renoir_set_power_profile_mode +ffffffff822f6ac0 t renoir_dpm_set_vcn_enable +ffffffff822f6b40 t renoir_dpm_set_jpeg_enable +ffffffff822f6bc0 t renoir_read_sensor +ffffffff822f6fb0 t renoir_is_dpm_running +ffffffff822f6ff0 t renoir_set_watermarks_table +ffffffff822f71a0 t renoir_set_performance_level +ffffffff822f76e0 t renoir_get_dpm_clock_table +ffffffff822f7a30 t renoir_init_smc_tables +ffffffff822f7ba0 t renoir_get_enabled_mask +ffffffff822f7be0 t renoir_get_dpm_ultimate_freq +ffffffff822f7e80 t renoir_get_gpu_metrics +ffffffff822f80a0 t renoir_gfx_state_change_set +ffffffff822f80d0 t renoir_set_fine_grain_gfx_freq_parameters +ffffffff822f8170 t renoir_force_dpm_limit_value +ffffffff822f9000 T smu_v12_0_check_fw_status +ffffffff822f9050 T smu_v12_0_check_fw_version +ffffffff822f9110 T smu_v12_0_powergate_sdma +ffffffff822f9150 T smu_v12_0_set_gfx_cgpg +ffffffff822f91b0 T smu_v12_0_get_gfxoff_status +ffffffff822f9240 T smu_v12_0_gfx_off_control +ffffffff822f9360 T smu_v12_0_fini_smc_tables +ffffffff822f9410 T smu_v12_0_set_default_dpm_tables +ffffffff822f9440 T smu_v12_0_mode2_reset +ffffffff822f9460 T smu_v12_0_set_soft_freq_limited_range +ffffffff822f95a0 T smu_v12_0_set_driver_table_location +ffffffff822f9610 T smu_v12_0_get_vbios_bootup_values +ffffffff822fa000 T aldebaran_set_ppt_funcs +ffffffff822fa040 t aldebaran_get_allowed_feature_mask +ffffffff822fa090 t aldebaran_set_default_dpm_table +ffffffff822fa290 t aldebaran_populate_umd_state_clk +ffffffff822fa390 t aldebaran_print_clk_levels +ffffffff822fa550 t aldebaran_force_clk_levels +ffffffff822fa700 t aldebaran_usr_edit_dpm_table +ffffffff822fa920 t aldebaran_read_sensor +ffffffff822fabc0 t aldebaran_is_dpm_running +ffffffff822fac10 t aldebaran_get_thermal_temperature_range +ffffffff822face0 t aldebaran_set_performance_level +ffffffff822fad90 t aldebaran_get_power_limit +ffffffff822faf20 t aldebaran_set_df_cstate +ffffffff822fafa0 t aldebaran_allow_xgmi_power_down +ffffffff822fb040 t aldebaran_i2c_control_init +ffffffff822fb100 t aldebaran_i2c_control_fini +ffffffff822fb140 t aldebaran_get_unique_id +ffffffff822fb220 t aldebaran_init_smc_tables +ffffffff822fb3b0 t aldebaran_set_mp1_state +ffffffff822fb3f0 t aldebaran_setup_pptable +ffffffff822fb4c0 t aldebaran_system_features_control +ffffffff822fb620 t aldebaran_set_power_limit +ffffffff822fb6b0 t aldebaran_is_baco_supported +ffffffff822fb6e0 t aldebaran_is_mode1_reset_supported +ffffffff822fb710 t aldebaran_is_mode2_reset_supported +ffffffff822fb740 t aldebaran_mode1_reset +ffffffff822fb820 t aldebaran_mode2_reset +ffffffff822fb9e0 t aldebaran_set_soft_freq_limited_range +ffffffff822fbbf0 t aldebaran_log_thermal_throttling_event +ffffffff822fbf00 t aldebaran_get_gpu_metrics +ffffffff822fc190 t aldebaran_smu_handle_passthrough_sbr +ffffffff822fc1b0 t aldebaran_smu_send_hbm_bad_page_num +ffffffff822fc240 t aldebaran_get_ecc_info +ffffffff822fc3a0 t aldebaran_send_hbm_bad_channel_flag +ffffffff822fc480 t aldebaran_get_current_clk_freq_by_table +ffffffff822fc5c0 t aldebaran_get_smu_metrics_data +ffffffff822fc810 t aldebaran_upload_dpm_level +ffffffff822fc900 t aldebaran_i2c_xfer +ffffffff822fcbb0 t aldebaran_i2c_func +ffffffff822fd000 T smu_v13_0_init_microcode +ffffffff822fd1d0 T smu_v13_0_fini_microcode +ffffffff822fd250 T smu_v13_0_load_microcode +ffffffff822fd280 T smu_v13_0_init_pptable_microcode +ffffffff822fd430 T smu_v13_0_get_pptable_from_firmware +ffffffff822fd560 T smu_v13_0_check_fw_status +ffffffff822fd5d0 T smu_v13_0_check_fw_version +ffffffff822fd700 T smu_v13_0_setup_pptable +ffffffff822fd8a0 T smu_v13_0_init_smc_tables +ffffffff822fd9f0 T smu_v13_0_fini_smc_tables +ffffffff822fdbe0 T smu_v13_0_init_power +ffffffff822fdc60 T smu_v13_0_fini_power +ffffffff822fdce0 T smu_v13_0_get_vbios_bootup_values +ffffffff822fdf90 T smu_v13_0_notify_memory_pool_location +ffffffff822fe050 T smu_v13_0_set_min_deep_sleep_dcefclk +ffffffff822fe0d0 T smu_v13_0_set_driver_table_location +ffffffff822fe140 T smu_v13_0_set_tool_table_location +ffffffff822fe1b0 T smu_v13_0_init_display_count +ffffffff822fe1f0 T smu_v13_0_set_allowed_mask +ffffffff822fe2c0 T smu_v13_0_gfx_off_control +ffffffff822fe330 T smu_v13_0_system_features_control +ffffffff822fe350 T smu_v13_0_notify_display_change +ffffffff822fe3c0 T smu_v13_0_init_max_sustainable_clocks +ffffffff822fe630 t smu_v13_0_get_max_sustainable_clock +ffffffff822fe750 T smu_v13_0_get_current_power_limit +ffffffff822fe820 T smu_v13_0_set_power_limit +ffffffff822fe940 T smu_v13_0_enable_thermal_alert +ffffffff822fe9d0 T smu_v13_0_disable_thermal_alert +ffffffff822fea10 T smu_v13_0_get_gfx_vdd +ffffffff822fead0 T smu_v13_0_display_clock_voltage_request +ffffffff822fec10 T smu_v13_0_set_hard_freq_limited_range +ffffffff822fecf0 T smu_v13_0_get_fan_control_mode +ffffffff822fed40 T smu_v13_0_set_fan_speed_pwm +ffffffff822fef50 t smu_v13_0_set_fan_static_mode +ffffffff822ff110 T smu_v13_0_set_fan_control_mode +ffffffff822ff270 T smu_v13_0_set_fan_speed_rpm +ffffffff822ff410 T smu_v13_0_set_xgmi_pstate +ffffffff822ff430 T smu_v13_0_register_irq_handler +ffffffff822ff500 T smu_v13_0_get_max_sustainable_clocks_by_dc +ffffffff822ff590 T smu_v13_0_set_azalia_d3_pme +ffffffff822ff5b0 T smu_v13_0_wait_for_event +ffffffff822ff610 T smu_v13_0_get_dpm_ultimate_freq +ffffffff822ff770 T smu_v13_0_set_soft_freq_limited_range +ffffffff822ff850 T smu_v13_0_set_performance_level +ffffffff822fffe0 T smu_v13_0_set_power_source +ffffffff82300040 T smu_v13_0_set_single_dpm_table +ffffffff823002d0 T smu_v13_0_get_dpm_level_range +ffffffff82300450 T smu_v13_0_get_current_pcie_link_width_level +ffffffff823004a0 T smu_v13_0_get_current_pcie_link_width +ffffffff82300500 T smu_v13_0_get_current_pcie_link_speed_level +ffffffff82300550 T smu_v13_0_get_current_pcie_link_speed +ffffffff823005a0 T smu_v13_0_set_vcn_enable +ffffffff82300650 T smu_v13_0_set_jpeg_enable +ffffffff82300670 T smu_v13_0_run_btc +ffffffff823006f0 T smu_v13_0_gpo_control +ffffffff82300780 T smu_v13_0_deep_sleep_control +ffffffff823009f0 T smu_v13_0_gfx_ulv_control +ffffffff82300a60 T smu_v13_0_baco_set_armd3_sequence +ffffffff82300a80 T smu_v13_0_baco_is_support +ffffffff82300b10 T smu_v13_0_baco_get_state +ffffffff82300b40 T smu_v13_0_baco_set_state +ffffffff82300c00 T smu_v13_0_baco_enter +ffffffff82300d10 T smu_v13_0_baco_exit +ffffffff82300db0 T smu_v13_0_set_gfx_power_up_by_imu +ffffffff82300df0 T smu_v13_0_od_edit_dpm_table +ffffffff823010b0 T smu_v13_0_set_default_dpm_tables +ffffffff823010e0 T smu_v13_0_set_smu_mailbox_registers +ffffffff82301150 T smu_v13_0_mode1_reset +ffffffff823011d0 t smu_v13_0_set_irq_state +ffffffff82301750 t smu_v13_0_irq_process +ffffffff82301a50 t orderly_poweroff +ffffffff82302000 T smu_v13_0_0_set_ppt_funcs +ffffffff823020e0 t smu_v13_0_0_get_allowed_feature_mask +ffffffff82302220 t smu_v13_0_0_set_default_dpm_table +ffffffff82302650 t smu_v13_0_0_populate_umd_state_clk +ffffffff82302780 t smu_v13_0_0_print_clk_levels +ffffffff823028a0 t smu_v13_0_0_force_clk_levels +ffffffff82302a20 t smu_v13_0_0_get_power_profile_mode +ffffffff82302c70 t smu_v13_0_0_set_power_profile_mode +ffffffff82302ec0 t smu_v13_0_0_read_sensor +ffffffff823030e0 t smu_v13_0_0_is_dpm_running +ffffffff82303130 t smu_v13_0_0_get_fan_speed_pwm +ffffffff82303210 t smu_v13_0_0_get_fan_speed_rpm +ffffffff82303280 t smu_v13_0_0_get_thermal_temperature_range +ffffffff82303380 t smu_v13_0_0_dump_pptable +ffffffff823033b0 t smu_v13_0_0_get_power_limit +ffffffff82303490 t smu_v13_0_0_set_df_cstate +ffffffff823034b0 t smu_v13_0_0_update_pcie_parameters +ffffffff823035a0 t smu_v13_0_0_i2c_control_init +ffffffff823036d0 t smu_v13_0_0_i2c_control_fini +ffffffff82303710 t smu_v13_0_0_get_unique_id +ffffffff823037c0 t smu_v13_0_0_init_smc_tables +ffffffff823039b0 t smu_v13_0_0_set_mp1_state +ffffffff823039f0 t smu_v13_0_0_setup_pptable +ffffffff82303b30 t smu_v13_0_0_system_features_control +ffffffff82303b40 t smu_v13_0_0_baco_enter +ffffffff82303b90 t smu_v13_0_0_baco_exit +ffffffff82303bf0 t smu_v13_0_0_is_mode1_reset_supported +ffffffff82303c50 t smu_v13_0_0_mode1_reset +ffffffff82303ce0 t smu_v13_0_0_get_dpm_ultimate_freq +ffffffff82303e00 t smu_v13_0_0_get_gpu_metrics +ffffffff82304230 t smu_v13_0_0_enable_mgpu_fan_boost +ffffffff82304280 t smu_v13_0_0_smu_send_bad_mem_page_num +ffffffff82304310 t smu_v13_0_0_send_bad_mem_channel_flag +ffffffff823043a0 t smu_v13_0_0_get_smu_metrics_data +ffffffff82304710 t smu_v13_0_get_throttler_status +ffffffff823048d0 t smu_v13_0_0_i2c_xfer +ffffffff82304b80 t smu_v13_0_0_i2c_func +ffffffff82305000 T smu_v13_0_4_set_ppt_funcs +ffffffff823050b0 t smu_v13_0_4_print_clk_levels +ffffffff82305170 t smu_v13_0_4_force_clk_levels +ffffffff82305410 t smu_v13_0_4_read_sensor +ffffffff823056c0 t smu_v13_0_4_is_dpm_running +ffffffff82305710 t smu_v13_0_4_set_watermarks_table +ffffffff823058a0 t smu_v13_0_4_set_performance_level +ffffffff82305de0 t smu_v13_0_4_init_smc_tables +ffffffff82305f50 t smu_v13_0_4_fini_smc_tables +ffffffff82306000 t smu_v13_0_4_system_features_control +ffffffff82306050 t smu_v13_0_4_mode2_reset +ffffffff82306070 t smu_v13_0_4_get_dpm_ultimate_freq +ffffffff82306490 t smu_v13_0_4_get_gpu_metrics +ffffffff82306660 t smu_v13_0_4_set_fine_grain_gfx_freq_parameters +ffffffff823066c0 t smu_v13_0_4_get_smu_metrics_data +ffffffff82307000 T smu_v13_0_5_set_ppt_funcs +ffffffff82307090 t smu_v13_0_5_set_default_dpm_tables +ffffffff823070c0 t smu_v13_0_5_print_clk_levels +ffffffff82307170 t smu_v13_0_5_force_clk_levels +ffffffff823072d0 t smu_v13_0_5_od_edit_dpm_table +ffffffff82307590 t smu_v13_0_5_dpm_set_vcn_enable +ffffffff823075b0 t smu_v13_0_5_dpm_set_jpeg_enable +ffffffff823075d0 t smu_v13_0_5_read_sensor +ffffffff823077f0 t smu_v13_0_5_is_dpm_running +ffffffff82307840 t smu_v13_0_5_set_watermarks_table +ffffffff823079d0 t smu_v13_0_5_set_performance_level +ffffffff82307bb0 t smu_v13_0_5_init_smc_tables +ffffffff82307d20 t smu_v13_0_5_fini_smc_tables +ffffffff82307dd0 t smu_v13_0_5_system_features_control +ffffffff82307e20 t smu_v13_0_5_mode2_reset +ffffffff82307ea0 t smu_v13_0_5_get_dpm_ultimate_freq +ffffffff823082e0 t smu_v13_0_5_get_gpu_metrics +ffffffff82308420 t smu_v13_0_5_set_fine_grain_gfx_freq_parameters +ffffffff82308480 t smu_v13_0_5_get_smu_metrics_data +ffffffff82309000 T smu_v13_0_7_set_ppt_funcs +ffffffff82309050 t smu_v13_0_7_get_allowed_feature_mask +ffffffff823091c0 t smu_v13_0_7_set_default_dpm_table +ffffffff823095f0 t smu_v13_0_7_populate_umd_state_clk +ffffffff82309720 t smu_v13_0_7_print_clk_levels +ffffffff82309840 t smu_v13_0_7_force_clk_levels +ffffffff823099c0 t smu_v13_0_7_get_power_profile_mode +ffffffff82309ca0 t smu_v13_0_7_set_power_profile_mode +ffffffff82309ee0 t smu_v13_0_7_read_sensor +ffffffff8230a0f0 t smu_v13_0_7_is_dpm_running +ffffffff8230a140 t smu_v13_0_7_get_fan_speed_pwm +ffffffff8230a220 t smu_v13_0_7_get_fan_speed_rpm +ffffffff8230a290 t smu_v13_0_7_get_thermal_temperature_range +ffffffff8230a380 t smu_v13_0_7_dump_pptable +ffffffff8230a3b0 t smu_v13_0_7_get_power_limit +ffffffff8230a490 t smu_v13_0_7_set_df_cstate +ffffffff8230a4b0 t smu_v13_0_7_update_pcie_parameters +ffffffff8230a5a0 t smu_v13_0_7_init_smc_tables +ffffffff8230a790 t smu_v13_0_7_check_fw_status +ffffffff8230a7e0 t smu_v13_0_7_set_mp1_state +ffffffff8230a820 t smu_v13_0_7_setup_pptable +ffffffff8230a980 t smu_v13_0_7_baco_enter +ffffffff8230a9d0 t smu_v13_0_7_baco_exit +ffffffff8230aa30 t smu_v13_0_7_is_mode1_reset_supported +ffffffff8230aa70 t smu_v13_0_7_get_dpm_ultimate_freq +ffffffff8230ab90 t smu_v13_0_7_get_gpu_metrics +ffffffff8230afa0 t smu_v13_0_7_enable_mgpu_fan_boost +ffffffff8230aff0 t smu_v13_0_7_get_smu_metrics_data +ffffffff8230b340 t smu_v13_0_7_get_throttler_status +ffffffff8230c000 T yellow_carp_set_ppt_funcs +ffffffff8230c040 t yellow_carp_set_default_dpm_tables +ffffffff8230c070 t yellow_carp_print_clk_levels +ffffffff8230c130 t yellow_carp_force_clk_levels +ffffffff8230c3d0 t yellow_carp_od_edit_dpm_table +ffffffff8230c690 t yellow_carp_dpm_set_vcn_enable +ffffffff8230c6b0 t yellow_carp_dpm_set_jpeg_enable +ffffffff8230c6d0 t yellow_carp_read_sensor +ffffffff8230ca70 t yellow_carp_is_dpm_running +ffffffff8230cac0 t yellow_carp_set_watermarks_table +ffffffff8230cc50 t yellow_carp_set_performance_level +ffffffff8230d190 t yellow_carp_init_smc_tables +ffffffff8230d300 t yellow_carp_fini_smc_tables +ffffffff8230d3b0 t yellow_carp_system_features_control +ffffffff8230d400 t yellow_carp_get_gfxoff_status +ffffffff8230d490 t yellow_carp_mode2_reset +ffffffff8230d510 t yellow_carp_get_dpm_ultimate_freq +ffffffff8230d960 t yellow_carp_get_gpu_metrics +ffffffff8230db20 t yellow_carp_post_smu_init +ffffffff8230dba0 t yellow_carp_set_fine_grain_gfx_freq_parameters +ffffffff8230dc00 t yellow_carp_get_smu_metrics_data +ffffffff8230e000 T smu_cmn_send_msg_without_waiting +ffffffff8230e170 T smu_cmn_wait_for_response +ffffffff8230e2b0 T smu_cmn_send_smc_msg_with_param +ffffffff8230e5d0 T smu_cmn_to_asic_specific_index +ffffffff8230e6e0 t __smu_cmn_reg_print_error +ffffffff8230e930 T smu_cmn_send_smc_msg +ffffffff8230e950 T smu_cmn_send_debug_smc_msg +ffffffff8230e9d0 T smu_cmn_feature_is_supported +ffffffff8230ea80 T smu_cmn_feature_is_enabled +ffffffff8230eb80 T smu_cmn_clk_dpm_is_enabled +ffffffff8230ec80 T smu_cmn_get_enabled_mask +ffffffff8230ed70 T smu_cmn_get_indep_throttler_status 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fxp_cardbus_detach +ffffffff823202d0 T fxp_cardbus_setup +ffffffff82321000 t rl_cardbus_match +ffffffff82321030 t rl_cardbus_attach +ffffffff823211d0 t rl_cardbus_detach +ffffffff82321290 T rl_cardbus_setup +ffffffff82322000 T re_cardbus_probe +ffffffff82322030 T re_cardbus_attach +ffffffff82322230 T re_cardbus_detach +ffffffff82322310 T re_cardbus_setup +ffffffff82323000 T ath_cardbus_match +ffffffff82323050 T ath_cardbus_attach +ffffffff82323180 T ath_cardbus_detach +ffffffff82323250 T ath_cardbus_enable +ffffffff82323320 T ath_cardbus_disable +ffffffff82323370 T ath_cardbus_power +ffffffff823233b0 T ath_cardbus_setup +ffffffff82324000 T athn_cardbus_match +ffffffff82324030 T athn_cardbus_attach +ffffffff82324170 T athn_cardbus_detach +ffffffff82324210 T athn_cardbus_enable +ffffffff823242e0 T athn_cardbus_disable +ffffffff82324330 T athn_cardbus_power +ffffffff82324370 T athn_cardbus_read +ffffffff823243a0 T athn_cardbus_write +ffffffff823243d0 T athn_cardbus_write_barrier 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acx_cardbus_match +ffffffff82328030 T acx_cardbus_attach +ffffffff82328260 T acx_cardbus_detach +ffffffff82328380 T acx_cardbus_enable +ffffffff82328450 T acx_cardbus_disable +ffffffff823284a0 T acx_cardbus_power +ffffffff823284e0 T acx_cardbus_setup +ffffffff82329000 T pgt_cardbus_match +ffffffff82329030 T pgt_cardbus_attach +ffffffff82329230 T pgt_cardbus_detach +ffffffff823292e0 T pgt_cardbus_enable +ffffffff82329440 T pgt_cardbus_disable +ffffffff82329490 T pgt_cardbus_power +ffffffff823294f0 T pgt_cardbus_setup +ffffffff8232a000 T ehci_cardbus_match +ffffffff8232a040 T ehci_cardbus_attach +ffffffff8232a2e0 T ehci_cardbus_detach +ffffffff8232b000 T ohci_cardbus_match +ffffffff8232b040 T ohci_cardbus_attach +ffffffff8232b2d0 T ohci_cardbus_detach +ffffffff8232c000 T uhci_cardbus_match +ffffffff8232c040 T uhci_cardbus_attach +ffffffff8232c350 T uhci_cardbus_detach +ffffffff8232d000 T malo_cardbus_match +ffffffff8232d030 T malo_cardbus_attach +ffffffff8232d270 T malo_cardbus_detach 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pcmcia_function_init +ffffffff823308d0 T pcmcia_function_enable +ffffffff82330d00 T pcmcia_function_disable +ffffffff82330e20 T pcmcia_io_map +ffffffff82331060 T pcmcia_intr_establish +ffffffff823312d0 T pcmcia_card_intr +ffffffff823313f0 T pcmcia_intr_disestablish +ffffffff82331610 T pcmcia_intr_string +ffffffff82332000 T pcmcia_cis_read_1 +ffffffff823320f0 T pcmcia_read_cis +ffffffff823321e0 T pcmcia_scan_cis +ffffffff82333cc0 T pcmcia_parse_cis_tuple +ffffffff82334e60 T pcmcia_print_cis +ffffffff82336000 T pcmcia_check_cis_quirks +ffffffff82337000 T ep_pcmcia_match +ffffffff82337110 T ep_pcmcia_attach +ffffffff82337560 T ep_pcmcia_detach +ffffffff82337600 T ep_pcmcia_activate +ffffffff823376e0 T ep_pcmcia_lookup +ffffffff823377f0 T ep_pcmcia_enable1 +ffffffff823378a0 T ep_pcmcia_get_enaddr +ffffffff82338000 T ne_pcmcia_match +ffffffff82338140 T ne_pcmcia_attach +ffffffff82338760 T ne_pcmcia_detach +ffffffff82338820 T ne_pcmcia_activate +ffffffff82338910 T ne_pcmcia_get_enaddr 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sm_pcmcia_funce_enaddr +ffffffff8233c470 T sm_pcmcia_ascii_enaddr +ffffffff8233c570 T sm_pcmcia_lannid_ciscallback +ffffffff8233c680 T sm_pcmcia_enable +ffffffff8233c720 T sm_pcmcia_disable +ffffffff8233d000 T xe_pcmcia_match +ffffffff8233d050 T xe_pcmcia_attach +ffffffff8233d7a0 T xe_pcmcia_detach +ffffffff8233d860 T xe_pcmcia_activate +ffffffff8233db50 T xe_pcmcia_interpret_manfid +ffffffff8233dbf0 T xe_pcmcia_funce_enaddr +ffffffff8233dc10 T xe_ioctl +ffffffff8233df70 T xe_start +ffffffff8233e210 T xe_watchdog +ffffffff8233e250 T xe_intr +ffffffff8233e620 T xe_full_reset +ffffffff8233ebf0 T xe_mdi_read +ffffffff8233f580 T xe_mdi_write +ffffffff8233fe90 T xe_statchg +ffffffff8233fec0 T xe_mediachange +ffffffff8233ff50 T xe_mediastatus +ffffffff8233ffb0 T xe_init +ffffffff82340010 T xe_stop +ffffffff82340140 T xe_reset +ffffffff823402b0 T xe_pcmcia_lan_nid_ciscallback +ffffffff82340400 T xe_pcmcia_manfid_ciscallback +ffffffff82340520 T xe_get +ffffffff823407f0 T xe_set_address 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cmalo_fw_free +ffffffff82344590 T cmalo_cmd_set_macctrl +ffffffff823446f0 T cmalo_cmd_set_txpower +ffffffff82344850 T cmalo_cmd_set_antenna +ffffffff823449c0 T cmalo_cmd_set_radio +ffffffff82344b20 T cmalo_cmd_set_channel +ffffffff82344c80 T cmalo_cmd_set_rate +ffffffff82344e00 T cmalo_cmd_set_snmp +ffffffff82344f90 T cmalo_cmd_set_macaddr +ffffffff823450f0 T cmalo_wep +ffffffff823451a0 T cmalo_cmd_set_reset +ffffffff823452a0 T cmalo_select_network +ffffffff823453a0 T cmalo_cmd_set_auth +ffffffff82345460 T cmalo_cmd_set_assoc +ffffffff823457c0 T cmalo_reflect_network +ffffffff823458b0 T cmalo_tx_done +ffffffff82345970 T cmalo_rx +ffffffff82345b70 T cmalo_cmd_response +ffffffff82345d90 T cmalo_event +ffffffff82345e00 T cmalo_tx +ffffffff82345fe0 T cmalo_cmd_set_wep +ffffffff82346230 T cmalo_rate2bitmap +ffffffff82346270 T cmalo_hexdump +ffffffff823462a0 T cmalo_cmd_request +ffffffff82346400 T cmalo_cmd_rsp_hwspec +ffffffff82346470 T cmalo_cmd_rsp_scan +ffffffff82346680 T cmalo_parse_elements +ffffffff82346780 T cmalo_cmd_rsp_assoc +ffffffff823467c0 T cmalo_cmd_set_80211d +ffffffff823468c0 T cmalo_cmd_set_bgscan_config +ffffffff82346a20 T cmalo_cmd_set_bgscan_query +ffffffff82347000 T an_pcmcia_match +ffffffff82347060 T an_pcmcia_attach +ffffffff82347250 T an_pcmcia_detach +ffffffff823472e0 T an_pcmcia_activate +ffffffff82348000 T pcibmatch +ffffffff823480d0 T pcibattach +ffffffff82348110 T pcib_callback +ffffffff82348190 T pcib_print +ffffffff82349000 T amdpcib_match +ffffffff82349050 T amdpcib_attach +ffffffff82349180 T amdpcib_get_timecount +ffffffff8234a000 T tcpcib_match +ffffffff8234a050 T tcpcib_attach +ffffffff8234a310 T tcpcib_activate +ffffffff8234a5c0 T tcpcib_wdt_init +ffffffff8234a6f0 T tcpcib_wdt_start +ffffffff8234a720 T tcpcib_wdt_stop +ffffffff8234a7a0 T tcpcib_hpet_get_timecount +ffffffff8234a7d0 T tcpcib_wdt_cb +ffffffff8234b000 T aapic_match +ffffffff8234b040 T aapic_attach +ffffffff8234b120 t __llvm_retpoline_r11 +ffffffff8234c000 T hme_config +ffffffff8234c580 T hme_stop +ffffffff8234c790 T hme_start +ffffffff8234caa0 T hme_ioctl +ffffffff8234cc50 T hme_watchdog +ffffffff8234ccb0 t hme_mii_readreg +ffffffff8234ce30 t hme_mii_writereg +ffffffff8234cfb0 t hme_mii_statchg +ffffffff8234d030 T hme_mediachange +ffffffff8234d120 T hme_mediastatus +ffffffff8234d190 T hme_mifinit +ffffffff8234d250 T hme_tick +ffffffff8234d380 T hme_unconfig +ffffffff8234d470 T hme_fill_rx_ring +ffffffff8234d610 T hme_reset +ffffffff8234d650 T hme_init +ffffffff8234db90 T hme_meminit +ffffffff8234dd10 T hme_iff +ffffffff8234dec0 T hme_tint +ffffffff8234e010 T hme_rint +ffffffff8234e1e0 T hme_eint +ffffffff8234e290 T hme_intr +ffffffff8234e390 T hme_newbuf +ffffffff8234f000 T hmematch_pci +ffffffff8234f040 T hmeattach_pci +ffffffff8234f310 T hmedetach_pci +ffffffff8234f390 T hme_pci_enaddr +ffffffff82350000 T isamatch +ffffffff82350050 T isaattach +ffffffff82350180 T isascan +ffffffff823505a0 T isaprint +ffffffff82350760 T isa_intr_typename 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acpiec_burst_disable +ffffffff824f4de0 T acpiec_read +ffffffff824f4e80 T acpiec_write +ffffffff824f4f20 T acpiec_getcrs +ffffffff824f50f0 T acpiec_reg +ffffffff824f51b0 T acpiec_get_events +ffffffff824f5250 T acpiec_gpehandler +ffffffff824f5360 T acpiec_parse_resources +ffffffff824f6000 T acpitz_match +ffffffff824f6080 T acpitz_attach +ffffffff824f6600 T acpitz_activate +ffffffff824f6640 T acpitz_init_perf +ffffffff824f66a0 T acpitz_setperf +ffffffff824f6700 T acpitz_init +ffffffff824f6910 T acpitz_getreading +ffffffff824f6980 T acpitz_gettempreading +ffffffff824f6ac0 T acpitz_notify +ffffffff824f6b30 T acpitz_setfan +ffffffff824f6e20 T acpitz_refresh +ffffffff824f8000 T acpimadt_match +ffffffff824f8060 T acpimadt_attach +ffffffff824f8810 T acpimadt_validate +ffffffff824f8940 T acpimadt_cfg_intr +ffffffff824f89e0 T acpimadt_print +ffffffff824f9000 T acpimcfg_match +ffffffff824f9060 T acpimcfg_attach +ffffffff824fa000 T acpiprt_match +ffffffff824fa070 T acpiprt_attach +ffffffff824fa1a0 T acpiprt_getpcibus +ffffffff824fa1e0 T acpiprt_prt_add +ffffffff824fa650 T acpiprt_getirq +ffffffff824fa750 T acpiprt_chooseirq +ffffffff824fa900 T acpiprt_route_interrupt +ffffffff824fb000 T acpidmar_match +ffffffff824fb080 T acpidmar_attach +ffffffff824fb140 T acpidmar_activate +ffffffff824fb380 T dmar_bdf +ffffffff824fb400 T domain_map_check +ffffffff824fb580 T acpidmar_pci_attach +ffffffff824fb650 T dmar_ptmap +ffffffff824fb6d0 T domain_map_pthru +ffffffff824fb750 T domain_map_page_intel +ffffffff824fb8d0 T iommu_flush_cache +ffffffff824fb920 T iommu_alloc_page +ffffffff824fb9c0 T pte_lvl +ffffffff824fbae0 T domain_map_page_amd +ffffffff824fbbb0 T domain_unload_map +ffffffff824fbdc0 T dom_bdf +ffffffff824fbe90 T domain_load_map +ffffffff824fc0f0 T iommu_enable_translation +ffffffff824fc380 T iommu_flush_tlb +ffffffff824fc510 T iommu_flush_write_buffer +ffffffff824fc680 T iommu_set_rtaddr +ffffffff824fc7b0 T iommu_write_8 +ffffffff824fc7e0 T iommu_write_4 +ffffffff824fc810 T iommu_read_4 +ffffffff824fc830 T iommu_alloc_hwdte +ffffffff824fc980 T iommu_issue_qi +ffffffff824fc9b0 T iommu_flush_tlb_qi +ffffffff824fc9e0 T iommu_flush_ctx_qi +ffffffff824fca10 T ivhd_invalidate_domain +ffffffff824fca70 T iommu_read_8 +ffffffff824fca90 T iommu_flush_ctx +ffffffff824fcbb0 T iommu_enable_qi +ffffffff824fccd0 T iommu_showcfg +ffffffff824fcef0 T iommu_init +ffffffff824fd230 T acpidmar_intr_establish +ffffffff824fd340 T acpidmar_intr +ffffffff824fd4e0 T acpidmar_match_devscope +ffffffff824fd620 T domain_create +ffffffff824fd860 t dmar_dmamap_create +ffffffff824fd880 t dmar_dmamap_destroy +ffffffff824fd890 t dmar_dmamap_load +ffffffff824fd900 t dmar_dmamap_load_mbuf +ffffffff824fd960 t dmar_dmamap_load_uio +ffffffff824fd9c0 t dmar_dmamap_load_raw +ffffffff824fda30 t dmar_dmamap_unload +ffffffff824fda60 t dmar_dmamap_sync +ffffffff824fda80 t dmar_dmamem_alloc +ffffffff824fdaa0 t dmar_dmamem_free +ffffffff824fdac0 t dmar_dmamem_map +ffffffff824fdae0 t dmar_dmamem_unmap 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+ffffffff82500670 T ivhd_checkerr +ffffffff825008c0 T ivhd_iommu_init +ffffffff82500d90 T acpiivrs_ivhd +ffffffff82500e00 T acpiivrs_init +ffffffff82500f30 T acpidmar_msi_hwmask +ffffffff82500fa0 T acpidmar_msi_hwunmask +ffffffff82501010 T acpidmar_msi_addroute +ffffffff825010d0 T acpidmar_msi_delroute +ffffffff825010f0 T iommu_showfault +ffffffff825012b0 T iommu_showpte +ffffffff82502000 T acpidock_match +ffffffff82502070 T acpidock_attach +ffffffff82502390 T acpidock_status +ffffffff82502420 T acpidock_docklock +ffffffff82502500 T acpidock_dockctl +ffffffff825025e0 T acpidock_foundejd +ffffffff82502690 T acpidock_notify +ffffffff82502b80 T acpidock_eject +ffffffff82502c70 T acpidock_walkchildren +ffffffff82503000 T abl_match +ffffffff82503030 T abl_attach +ffffffff82503220 T abl_get_brightness +ffffffff825032a0 T abl_get_param +ffffffff82503300 T abl_set_param +ffffffff825033c0 T abl_set_brightness +ffffffff82504000 T asmc_match +ffffffff82504050 T asmc_attach +ffffffff825045c0 T asmc_activate +ffffffff82504650 T asmc_try +ffffffff82504a30 T asmc_get_backlight +ffffffff82504ab0 T asmc_set_backlight +ffffffff82504b40 T asmc_backlight +ffffffff82504bd0 T asmc_init +ffffffff82504dd0 T asmc_update +ffffffff82504f80 T asmc_detach +ffffffff82505150 t asmc_temp +ffffffff825052d0 t asmc_fan +ffffffff825054a0 t asmc_light +ffffffff82506000 T acpiasus_match +ffffffff82506030 T acpiasus_attach +ffffffff82506150 T acpiasus_activate +ffffffff825062e0 T acpiasus_init +ffffffff825063c0 T acpiasus_notify +ffffffff82507000 T thinkpad_match +ffffffff825070b0 T thinkpad_attach +ffffffff825072d0 T thinkpad_activate +ffffffff82507450 T thinkpad_sensor_attach +ffffffff825075c0 T thinkpad_get_temp +ffffffff82507650 T thinkpad_sensor_refresh +ffffffff825077d0 T thinkpad_get_volume_mute +ffffffff82507840 T thinkpad_attach_deferred +ffffffff82507860 T thinkpad_enable_events +ffffffff82507a30 T thinkpad_get_kbd_backlight +ffffffff82507ac0 T thinkpad_set_kbd_backlight +ffffffff82507ba0 T thinkpad_get_param +ffffffff82507c00 T thinkpad_set_param +ffffffff82507cc0 T thinkpad_hotkey +ffffffff825082f0 T thinkpad_brightness_up +ffffffff82508490 T thinkpad_brightness_down +ffffffff82508640 T thinkpad_toggle_bluetooth +ffffffff82508760 T thinkpad_volume_mute +ffffffff82508810 T thinkpad_volume_down +ffffffff825088c0 T thinkpad_volume_up +ffffffff82508970 T thinkpad_get_thinklight +ffffffff825089c0 T thinkpad_adaptive_change +ffffffff82508ae0 T thinkpad_get_brightness +ffffffff82508b20 T thinkpad_toggle_wan +ffffffff82508c40 T thinkpad_cmos +ffffffff82508cf0 T thinkpad_set_brightness +ffffffff82508de0 T thinkpad_set_thinklight +ffffffff82509000 T toshiba_match +ffffffff825090a0 T toshiba_attach +ffffffff82509180 T get_param_brightness +ffffffff825091e0 T acpitoshiba_get_param +ffffffff82509240 T set_param_brightness +ffffffff825092d0 T toshiba_update_brightness +ffffffff825093d0 T acpitoshiba_set_param +ffffffff82509470 T toshiba_set_brightness +ffffffff82509590 T toshiba_enable_events +ffffffff82509620 T toshiba_read_events +ffffffff82509780 T toshiba_hotkey +ffffffff825099b0 T toshiba_get_brightness +ffffffff82509b20 T toshiba_fn_key_brightness_up +ffffffff82509c70 T toshiba_fn_key_brightness_down +ffffffff82509dc0 T toshiba_fn_key_video_output +ffffffff82509f10 T toshiba_get_video_output +ffffffff8250a080 T toshiba_set_video_output +ffffffff8250b000 T acpisony_match +ffffffff8250b070 T acpisony_attach +ffffffff8250b0e0 T acpisony_activate +ffffffff8250b120 T acpisony_notify_setup +ffffffff8250b310 T acpisony_notify +ffffffff8250b6c0 T acpisony_find_offset +ffffffff8250b7d0 T acpisony_set_hotkey +ffffffff8250b9c0 T acpisony_brightness_down +ffffffff8250bad0 T acpisony_get_brightness +ffffffff8250bb50 T acpisony_set_brightness +ffffffff8250c000 T acpivideo_match +ffffffff8250c070 T acpivideo_attach +ffffffff8250c1d0 T acpivideo_getpcibus +ffffffff8250c210 T acpivideo_notify +ffffffff8250c270 T acpivideo_set_policy +ffffffff8250c340 T acpi_foundvout +ffffffff8250c410 T acpivideo_print +ffffffff8250d000 T acpivout_match +ffffffff8250d070 T acpivout_attach +ffffffff8250d1c0 T acpivout_notify +ffffffff8250d270 T acpivout_get_bcl +ffffffff8250d390 T acpivout_get_brightness +ffffffff8250d430 T acpivout_get_param +ffffffff8250d4e0 T acpivout_set_param +ffffffff8250d650 T acpivout_select_brightness +ffffffff8250d720 T acpivout_find_brightness +ffffffff8250d7b0 T acpivout_set_brightness +ffffffff8250e000 T acpipwrres_match +ffffffff8250e070 T acpipwrres_attach +ffffffff8250e2b0 T acpipwrres_foundcons +ffffffff8250e440 T acpipwrres_ref_incr +ffffffff8250e4d0 T acpipwrres_hascons +ffffffff8250e520 T acpipwrres_ref_decr +ffffffff8250e5b0 T acpipwrres_addcons +ffffffff8250f000 T aibs_match +ffffffff8250f030 T aibs_attach +ffffffff8250f140 T aibs_probe +ffffffff8250f2a0 T aibs_attach_new +ffffffff8250f3c0 T aibs_attach_sif +ffffffff8250f590 T aibs_notify +ffffffff8250f600 T aibs_add_sensor +ffffffff8250f850 T aibs_getpack +ffffffff8250f8d0 T aibs_refresh +ffffffff8250f930 T aibs_refresh_r +ffffffff8250fa70 T aibs_getvalue +ffffffff8250fbc0 T aibs_find_cb +ffffffff82510000 T aplgpio_match +ffffffff82510060 T aplgpio_attach +ffffffff82510300 T aplgpio_intr +ffffffff82510440 T aplgpio_read_pin +ffffffff82510490 T aplgpio_write_pin +ffffffff82510500 T aplgpio_intr_establish +ffffffff82510620 T aplgpio_intr_enable +ffffffff825106b0 T aplgpio_intr_disable +ffffffff82511000 T bytgpio_match +ffffffff82511060 T bytgpio_attach +ffffffff82511320 T bytgpio_intr +ffffffff82511450 T bytgpio_read_pin +ffffffff825114b0 T bytgpio_write_pin +ffffffff82511530 T bytgpio_intr_establish +ffffffff825115a0 T bytgpio_intr_enable +ffffffff82511690 T bytgpio_intr_disable +ffffffff82512000 T chvgpio_match +ffffffff82512060 T chvgpio_attach +ffffffff82512300 T chvgpio_intr +ffffffff825123d0 T chvgpio_read_pin +ffffffff82512480 T chvgpio_write_pin +ffffffff82512540 T chvgpio_intr_establish +ffffffff82512710 T chvgpio_intr_enable +ffffffff825127e0 T chvgpio_intr_disable +ffffffff825128b0 T chvgpio_opreg_handler +ffffffff82512940 T chvgpio_check_pin +ffffffff82513000 T glkgpio_match +ffffffff82513060 T glkgpio_attach +ffffffff82513300 T glkgpio_intr +ffffffff82513440 T glkgpio_read_pin +ffffffff825134a0 T glkgpio_write_pin +ffffffff82513510 T glkgpio_intr_establish +ffffffff82513630 T glkgpio_intr_enable +ffffffff825136c0 T glkgpio_intr_disable +ffffffff82514000 T pchgpio_match +ffffffff82514060 T pchgpio_attach +ffffffff825144b0 T pchgpio_activate +ffffffff82514560 T pchgpio_intr +ffffffff82514780 T pchgpio_read_pin +ffffffff82514870 T pchgpio_write_pin +ffffffff82514980 T pchgpio_intr_establish +ffffffff82514bb0 T pchgpio_intr_enable +ffffffff82514cf0 T pchgpio_intr_disable +ffffffff82514e30 T pchgpio_save +ffffffff82514ea0 T pchgpio_restore +ffffffff82514f10 T pchgpio_find_group +ffffffff82514f90 T pchgpio_intr_handle +ffffffff82515070 T pchgpio_save_pin +ffffffff82515240 T pchgpio_restore_pin +ffffffff82516000 T tipmic_match +ffffffff82516050 T tipmic_attach +ffffffff82516250 T tipmic_write_1 +ffffffff82516310 T tipmic_intr +ffffffff82516470 T tipmic_get_lpat +ffffffff825165a0 T tipmic_read_pin +ffffffff825165d0 T tipmic_write_pin +ffffffff82516600 T tipmic_thermal_opreg_handler +ffffffff82516e70 T tipmic_power_opreg_handler +ffffffff82517110 T tipmic_read_1 +ffffffff825171d0 T tipmic_raw_to_temp +ffffffff82518000 T ccpmic_match +ffffffff82518050 T ccpmic_attach +ffffffff82518130 T ccpmic_get_lpat +ffffffff82518250 T ccpmic_read_pin +ffffffff825183d0 T ccpmic_write_pin +ffffffff82518530 T ccpmic_thermal_opreg_handler +ffffffff82518770 T ccpmic_power_opreg_handler +ffffffff82518960 T ccpmic_read_1 +ffffffff82518a20 T ccpmic_write_1 +ffffffff82518ae0 T ccpmic_raw_to_temp +ffffffff82519000 T com_acpi_match +ffffffff82519120 T com_acpi_attach +ffffffff825193a0 T com_acpi_is_designware +ffffffff82519400 T com_acpi_intr_designware +ffffffff82519430 T com_acpi_is_console +ffffffff8251a000 T sdhc_acpi_match +ffffffff8251a060 T sdhc_acpi_attach +ffffffff8251a360 T sdhc_acpi_parse_resources +ffffffff8251a420 T sdhc_acpi_card_detect_gpio +ffffffff8251a480 T sdhc_acpi_card_detect_intr +ffffffff8251a4c0 T sdhc_acpi_power_on +ffffffff8251a540 T sdhc_acpi_explore +ffffffff8251a570 T sdhc_acpi_card_detect_nonremovable +ffffffff8251a5a0 T sdhc_acpi_do_explore +ffffffff8251b000 T dwiic_acpi_match +ffffffff8251b050 T dwiic_acpi_attach +ffffffff8251b410 T dwiic_acpi_parse_crs +ffffffff8251b540 T dwiic_acpi_power +ffffffff8251b650 T dwiic_acpi_get_params +ffffffff8251b790 T dwiic_i2c_intr_establish +ffffffff8251b810 T dwiic_i2c_intr_disestablish +ffffffff8251b830 T dwiic_i2c_intr_string +ffffffff8251b8c0 T dwiic_acpi_acquire_bus +ffffffff8251b910 T dwiic_acpi_release_bus +ffffffff8251b940 T dwiic_acpi_bus_scan +ffffffff8251b980 T dwiic_acpi_found_hid +ffffffff8251bcb0 T dwiic_matchhids +ffffffff8251bd40 T dwiic_acpi_found_ihidev +ffffffff8251bfc0 T dwiic_acpi_found_iatp +ffffffff8251d000 T acpicbkbd_match +ffffffff8251d030 T acpicbkbd_attach +ffffffff8251d0d0 T acpicbkbd_activate +ffffffff8251d120 T acpicbkbd_get_backlight +ffffffff8251d1a0 T acpicbkbd_set_backlight +ffffffff8251d240 T acpicbkbd_write_backlight +ffffffff8251e000 T acpials_match +ffffffff8251e090 T acpials_attach +ffffffff8251e230 T acpials_read +ffffffff8251e2b0 T acpials_addtask +ffffffff8251e2f0 T acpials_notify +ffffffff8251e380 T acpials_update +ffffffff8251f000 T tpm_match +ffffffff8251f050 T tpm_attach +ffffffff8251f320 T tpm_activate +ffffffff8251f430 T tpm2_start_method +ffffffff8251f4b0 T tpm_probe +ffffffff8251f560 T tpm_init_tis +ffffffff8251f7d0 T tpm_init_crb +ffffffff8251fb10 T tpm_suspend +ffffffff8251fc00 T tpm_resume +ffffffff8251fc30 T tpm_write_tis +ffffffff8251ffb0 T tpm_read_tis +ffffffff82520190 T tpm_write_crb +ffffffff825205a0 T tpm_read_crb +ffffffff825208a0 T tpm_request_locality_tis +ffffffff82520990 T tpm_request_locality_crb +ffffffff82520a90 T tpm_release_locality_crb +ffffffff82520ae0 T tpm_release_locality_tis +ffffffff82520b50 T tpm_getburst +ffffffff82520c00 T tpm_status +ffffffff82520c20 T tpm_waitfor +ffffffff82520d00 T tpm_waitfor_status +ffffffff82521000 T acpihve_match +ffffffff825210b0 T acpihve_attach +ffffffff82522000 T acpisbs_match +ffffffff82522030 T acpisbs_attach +ffffffff825222a0 T acpisbs_activate +ffffffff82522380 T acpisbs_read +ffffffff82522440 T acpisbs_setup_sensors +ffffffff82522560 T acpisbs_refresh_sensors +ffffffff825226d0 T acpisbs_notify +ffffffff82522810 T acpi_smbus_read +ffffffff82523000 T surface_match +ffffffff82523060 T surface_attach +ffffffff825230c0 T surface_hotkey +ffffffff82524000 T ipmi_acpi_match +ffffffff82524030 T ipmi_acpi_attach +ffffffff82524260 T ipmi_acpi_parse_crs +ffffffff82525000 T amdgpio_match +ffffffff82525060 T amdgpio_attach +ffffffff825252a0 T amdgpio_activate +ffffffff82525390 T amdgpio_intr +ffffffff82525530 T amdgpio_read_pin +ffffffff82525580 T amdgpio_write_pin +ffffffff825255f0 T amdgpio_intr_establish +ffffffff825256e0 T amdgpio_intr_enable +ffffffff82525760 T amdgpio_intr_disable +ffffffff825257e0 T amdgpio_save +ffffffff82525860 T amdgpio_restore +ffffffff825258f0 T amdgpio_save_pin +ffffffff82525960 T amdgpio_restore_pin +ffffffff825259d0 T amdgpio_pin_intr +ffffffff82526000 T acpihid_match +ffffffff82526030 T acpihid_attach +ffffffff82526210 T acpihid_init_dsm +ffffffff82526370 T acpihid_eval +ffffffff82526590 T acpihid_notify +ffffffff825265f0 T acpihid_button_array_enable +ffffffff82527000 t iosf_acpi_match +ffffffff82527050 t iosf_acpi_attach +ffffffff82527140 t iosf_acpi_mbi_mdr_rd +ffffffff825271b0 t iosf_acpi_mbi_mdr_wr +ffffffff82528000 T acpi_match +ffffffff82528060 T acpi_attach +ffffffff825280a0 T acpi_probe +ffffffff82528240 T acpi_map +ffffffff82528330 T acpi_unmap +ffffffff82528380 T acpi_bus_space_map +ffffffff825283a0 T acpi_bus_space_unmap +ffffffff825283c0 T acpi_intr_establish +ffffffff82528510 T acpi_intr_disestablish +ffffffff82528520 T acpi_scan +ffffffff825286d0 T acpi_acquire_glk +ffffffff82528730 T acpi_release_glk +ffffffff82528780 T acpi_attach_machdep +ffffffff82528910 T acpi_sleep_cpu +ffffffff82528ad0 T acpi_resume_cpu +ffffffff82528bd0 T sleep_mp +ffffffff82528cd0 T resume_mp +ffffffff82528dc0 T acpi_iommu_device_map +ffffffff82529000 T hibernate_resume_machdep +ffffffff82529050 T hibernate_drop_to_real_mode +ffffffff82529060 T hibernate_activate_resume_pt_machdep +ffffffff825290a0 T hibernate_switch_stack_machdep +ffffffff825290e0 T hibernate_flush +ffffffff82529110 T acpi_savecpu +ffffffff8252a000 T sleep_showstate +ffffffff8252a100 T sleep_setstate +ffffffff8252a160 T gosleep +ffffffff8252a220 T sleep_abort +ffffffff8252a250 T sleep_resume +ffffffff8252a2c0 T suspend_finish +ffffffff8252b000 T acpipci_match +ffffffff8252b030 T acpipci_attach +ffffffff8252b2f0 T acpipci_osc +ffffffff8252b430 T acpipci_parse_resources +ffffffff8252b540 T acpipci_attach_bus +ffffffff8252b710 T acpipci_print +ffffffff8252b780 T acpipci_attach_busses +ffffffff8252c000 T efiopen +ffffffff8252c040 T eficlose +ffffffff8252c070 T efiioctl +ffffffff8252c110 T efiioc_get_table +ffffffff8252c270 T efiioc_var_get +ffffffff8252c4f0 T efiioc_var_next +ffffffff8252c710 T efiioc_var_set +ffffffff8252c9c0 T efi_adapt_error +ffffffff8252d000 T efi_match +ffffffff8252d060 T efi_attach +ffffffff8252d2f0 T efi_map_runtime +ffffffff8252d470 T efi_enter +ffffffff8252d500 T efi_leave +ffffffff8252d560 T efi_fault +ffffffff8252e000 T vmm_probe +ffffffff8252e050 T vmm_attach +ffffffff8252e170 T vmm_activate +ffffffff8252e2b0 T vmmopen +ffffffff8252e300 T vmmclose +ffffffff8252e330 T vm_find +ffffffff8252e450 T vmmioctl +ffffffff8252e6b0 T vm_create +ffffffff8252ea60 T vm_get_info +ffffffff8252ecb0 T vm_terminate +ffffffff8252ee20 T vm_resetcpu +ffffffff8252ef40 T pledge_ioctl_vmm +ffffffff8252f010 T vm_find_vcpu +ffffffff8252f070 T vm_create_check_mem_ranges +ffffffff8252f1d0 T vm_teardown +ffffffff8252f300 T vcpu_must_stop +ffffffff82530000 T vmm_enabled +ffffffff82530090 T vmm_attach_machdep +ffffffff82530250 T vmm_quiesce_vmx +ffffffff82530420 T vmm_activate_machdep +ffffffff82530550 T vmm_stop +ffffffff825306a0 T vmm_start +ffffffff82530790 T vmmioctl_machdep +ffffffff82530860 T vm_intr_pending +ffffffff82530900 T vm_mprotect_ept +ffffffff82530ba0 T pledge_ioctl_vmm_machdep +ffffffff82530bf0 T vm_rwvmparams +ffffffff82530d80 T vmm_init_pvclock +ffffffff82530e60 T vm_rwregs +ffffffff82530f70 T vcpu_readregs_vmx +ffffffff825313a0 T vcpu_writeregs_vmx +ffffffff82531810 T vcpu_readregs_svm +ffffffff82531cc0 T vcpu_writeregs_svm +ffffffff82532190 T vmm_get_guest_memtype +ffffffff82532210 T vmx_mprotect_ept +ffffffff82532490 T vmx_pmap_find_pte_ept +ffffffff82532560 T start_vmm_on_cpu +ffffffff82532640 T stop_vmm_on_cpu +ffffffff825326e0 T vmclear_on_cpu +ffffffff82532760 T vm_impl_init_vmx +ffffffff82532880 T vm_impl_init_svm +ffffffff825329a0 T vm_impl_init +ffffffff82532a40 T vm_impl_deinit +ffffffff82532a70 T vcpu_reload_vmcs_vmx +ffffffff82532bb0 T vcpu_reset_regs_svm +ffffffff82532f40 T svm_setmsrbrw +ffffffff825330b0 T svm_setmsrbr +ffffffff82533180 T vmm_alloc_vpid +ffffffff82533290 T svm_setmsrbw +ffffffff82533370 T vmx_setmsrbr +ffffffff82533420 T vmx_setmsrbw +ffffffff825334d0 T vmx_setmsrbrw +ffffffff825335e0 T svm_set_clean +ffffffff82533630 T svm_set_dirty +ffffffff82533680 T vcpu_reset_regs_vmx +ffffffff82534230 T vcpu_vmx_check_cap +ffffffff82534330 T vcpu_vmx_compute_ctrl +ffffffff82534510 T vcpu_init_vmx +ffffffff825348b0 T vcpu_deinit_vmx +ffffffff82534a30 T vcpu_reset_regs +ffffffff82534a70 T vcpu_init_svm +ffffffff82534c00 T vcpu_deinit_svm +ffffffff82534d40 T vcpu_init +ffffffff82534e00 T vmm_free_vpid +ffffffff82534e70 T vcpu_deinit +ffffffff82534eb0 T vm_run +ffffffff82535060 T vcpu_run_vmx +ffffffff825357e0 T vcpu_run_svm +ffffffff82535d90 T vmm_fpurestore +ffffffff82535e60 T vmm_fpusave +ffffffff82535ee0 T vmm_translate_gva +ffffffff82536200 T vmm_update_pvclock +ffffffff82536300 T vmx_get_exit_info +ffffffff82536360 T vmx_handle_exit +ffffffff825367a0 T vmx_instruction_error_decode +ffffffff82536970 T vmm_get_guest_cpu_cpl +ffffffff82536a60 T vmx_handle_intr +ffffffff82536af0 T svm_handle_hlt +ffffffff82536b40 T vmx_handle_hlt +ffffffff82536bf0 T svm_handle_exit +ffffffff82536f10 T svm_handle_np_fault +ffffffff825370c0 T vmm_handle_cpuid +ffffffff82537750 T svm_handle_msr +ffffffff82537a10 T svm_handle_xsetbv +ffffffff82537ab0 T svm_handle_inout +ffffffff82537bd0 T vmm_inject_ud +ffffffff82537c00 T vmm_inject_db +ffffffff82537c30 T vmx_handle_np_fault +ffffffff82537db0 T vmx_handle_inout +ffffffff82537f50 T vmx_handle_cr +ffffffff825381c0 T vmx_handle_rdmsr +ffffffff82538290 T vmx_handle_wrmsr +ffffffff825384f0 T vmx_handle_xsetbv +ffffffff825385c0 T vmm_inject_gp +ffffffff825385f0 T vmx_get_exit_qualification +ffffffff82538650 T vmx_get_guest_faulttype +ffffffff825386f0 T svm_get_guest_faulttype +ffffffff82538720 T svm_fault_page +ffffffff825387b0 T vmx_fault_page +ffffffff82538910 T vmm_get_guest_cpu_mode +ffffffff82538a10 T vmx_load_pdptes +ffffffff82538c90 T vmx_handle_cr0_write +ffffffff82538ea0 T vmx_handle_cr4_write +ffffffff82538f40 T vmm_handle_xsetbv +ffffffff82538fd0 T vmx_handle_misc_enable_msr +ffffffff82539030 T vmm_pat_is_valid +ffffffff82539110 T vmm_gpa_is_valid +ffffffff82539180 T vmx_exit_reason_decode +ffffffff825391c0 T svm_exit_reason_decode +ffffffff82539fd0 T vcpu_state_decode +ffffffff8253b000 T vmm_dispatch_intr +ffffffff8253b020 T vmxon +ffffffff8253b050 T vmxoff +ffffffff8253b080 T vmclear +ffffffff8253b0b0 T vmptrld +ffffffff8253b0e0 T vmptrst +ffffffff8253b110 T vmwrite +ffffffff8253b140 T vmread +ffffffff8253b170 T invvpid +ffffffff8253b1a0 T invept +ffffffff8253b1d0 T vmx_enter_guest +ffffffff8253b1fb t skip_init +ffffffff8253b2c8 t no_l1df_msr +ffffffff8253b2cb t l1df_tlb_loop +ffffffff8253b2e4 t l1df_tlb_done +ffffffff8253b2ec t l1df_load_cache +ffffffff8253b303 t done_flush +ffffffff8253b396 t do_resume +ffffffff8253b41b t fail_launch_or_resume +ffffffff8253b45d t fail_launch_unknown +ffffffff8253b46a t fail_launch_invalid_vmcs +ffffffff8253b477 t fail_launch_valid_vmcs +ffffffff8253b494 t vmx_exit_handler_asm +ffffffff8253b559 t restore_host +ffffffff8253b5f0 T svm_enter_guest +ffffffff8253b780 t restore_host_svm +ffffffff8253c000 T sdmmc_match +ffffffff8253c050 T sdmmc_attach +ffffffff8253c390 T sdmmc_detach +ffffffff8253c440 T sdmmc_activate +ffffffff8253c510 T sdmmc_discover_task +ffffffff8253c5d0 T sdmmc_create_thread +ffffffff8253c640 T sdmmc_holds_root_device +ffffffff8253c6a0 T sdmmc_task_thread +ffffffff8253c890 T sdmmc_needs_discover +ffffffff8253c940 T sdmmc_del_task +ffffffff8253c9f0 T sdmmc_card_detach +ffffffff8253cad0 T sdmmc_add_task +ffffffff8253cb50 T sdmmc_card_attach +ffffffff8253cc60 T sdmmc_enable +ffffffff8253cdb0 T sdmmc_scan +ffffffff8253ce40 T sdmmc_init +ffffffff8253cf40 T sdmmc_disable +ffffffff8253d0a0 T sdmmc_function_free +ffffffff8253d0c0 T sdmmc_delay +ffffffff8253d110 T sdmmc_select_card +ffffffff8253d290 T sdmmc_set_bus_power +ffffffff8253d450 T sdmmc_function_alloc +ffffffff8253d4e0 T sdmmc_app_command +ffffffff8253d670 T sdmmc_mmc_command +ffffffff8253d6f0 T sdmmc_go_idle_state +ffffffff8253d810 T sdmmc_send_if_cond +ffffffff8253d960 T sdmmc_set_relative_addr +ffffffff8253e000 T sdmmc_cisptr +ffffffff8253e0a0 T sdmmc_read_cis +ffffffff8253e3b0 T sdmmc_print_cis +ffffffff8253e520 T sdmmc_check_cis_quirks +ffffffff8253f000 T sdmmc_io_enable +ffffffff8253f2a0 T sdmmc_io_reset +ffffffff8253f3d0 T sdmmc_io_send_op_cond +ffffffff8253f540 T sdmmc_io_scan +ffffffff8253f690 T sdmmc_io_init +ffffffff8253f7c0 T sdmmc_io_set_highspeed +ffffffff8253fa70 T sdmmc_io_set_bus_width +ffffffff8253fd00 T sdmmc_io_function_ready +ffffffff8253fe80 T sdmmc_io_read_1 +ffffffff8253ffd0 T sdmmc_io_function_enable +ffffffff825403a0 T sdmmc_io_write_1 +ffffffff82540520 T sdmmc_io_function_disable +ffffffff825407a0 T sdmmc_io_attach +ffffffff82540890 T sdmmc_print +ffffffff82540ae0 T sdmmc_submatch +ffffffff82540b60 T sdmmc_io_detach +ffffffff82540c10 T sdmmc_io_rw_direct +ffffffff82540db0 T sdmmc_io_rw_extended_subr +ffffffff82540f50 T sdmmc_io_rw_extended +ffffffff82541340 T sdmmc_io_read_2 +ffffffff825414a0 T sdmmc_io_write_2 +ffffffff82541600 T sdmmc_io_read_4 +ffffffff82541760 T sdmmc_io_write_4 +ffffffff825418c0 T sdmmc_io_read_multi_1 +ffffffff825419b0 T sdmmc_io_write_multi_1 +ffffffff82541aa0 T sdmmc_io_read_region_1 +ffffffff82541b90 T sdmmc_io_write_region_1 +ffffffff82541c80 T sdmmc_io_xchg +ffffffff82541e10 T sdmmc_intr_enable +ffffffff82542080 T sdmmc_intr_disable +ffffffff825422f0 T sdmmc_intr_establish +ffffffff825423f0 T sdmmc_intr_disestablish +ffffffff825424e0 T sdmmc_card_intr +ffffffff82542530 T sdmmc_intr_task +ffffffff825425c0 T sdmmc_io_set_blocklen +ffffffff82543000 T sdmmc_mem_enable +ffffffff825434e0 T sdmmc_mem_send_op_cond +ffffffff82543690 T sdmmc_mem_signal_voltage +ffffffff82543750 T sdmmc_mem_scan +ffffffff82543a60 T sdmmc_decode_csd +ffffffff82543e70 T sdmmc_decode_cid +ffffffff825442b0 T sdmmc_mem_send_scr +ffffffff825443f0 T sdmmc_mem_decode_scr +ffffffff82544470 T sdmmc_mem_send_cxd_data +ffffffff825445e0 T sdmmc_mem_set_bus_width +ffffffff82544700 T sdmmc_mem_sd_switch +ffffffff825449b0 T sdmmc_be512_to_bitfield512 +ffffffff82544a60 T sdmmc_mem_mmc_switch +ffffffff82544b50 T sdmmc_mem_init +ffffffff82544ca0 T sdmmc_mem_set_blocklen +ffffffff82544da0 T sdmmc_mem_sd_init +ffffffff82545350 T sdmmc_mem_mmc_init +ffffffff82545c70 T sdmmc_mem_select_transfer_mode +ffffffff82545cf0 T sdmmc_mem_execute_tuning +ffffffff82545d80 T sdmmc_mem_read_block_subr +ffffffff825460e0 T sdmmc_mem_single_read_block +ffffffff825461b0 T sdmmc_mem_read_block +ffffffff82546370 T sdmmc_mem_write_block_subr +ffffffff825466c0 T sdmmc_mem_single_write_block +ffffffff82546790 T sdmmc_mem_write_block +ffffffff82546950 T sdmmc_mem_hibernate_write +ffffffff82547000 T sdmmc_scsi_cmd +ffffffff825471f0 T sdmmc_minphys +ffffffff82547270 T sdmmc_scsi_attach +ffffffff82547460 T sdmmc_alloc_ccbs +ffffffff825475a0 T sdmmc_free_ccbs +ffffffff82547600 T sdmmc_scsi_detach +ffffffff82547760 T sdmmc_stimeout +ffffffff825477e0 T sdmmc_ccb_alloc +ffffffff82547890 T sdmmc_ccb_free +ffffffff82547970 T sdmmc_inquiry +ffffffff82547be0 T sdmmc_start_xs +ffffffff82547cd0 T sdmmc_complete_xs +ffffffff82547da0 T sdmmc_done_xs +ffffffff82547df0 T sdmmc_scsi_hibernate_io +ffffffff82548000 T bwfm_sdio_preinit +ffffffff825484f0 T bwfm_sdio_txcheck +ffffffff82548530 T bwfm_sdio_txdata +ffffffff825485a0 T bwfm_sdio_txctl +ffffffff825486f0 T bwfm_sdio_buscore_read +ffffffff82548700 T bwfm_sdio_buscore_write +ffffffff82548720 T bwfm_sdio_buscore_prepare +ffffffff82548860 T bwfm_sdio_buscore_activate +ffffffff825488e0 T bwfm_sdio_match +ffffffff825489b0 T bwfm_sdio_attach +ffffffff82548c70 T bwfm_sdio_detach +ffffffff82548cd0 T bwfm_sdio_task +ffffffff82548e30 T bwfm_sdio_write_1 +ffffffff82548e60 T bwfm_sdio_read_1 +ffffffff82548e90 T bwfm_sdio_write_4 +ffffffff82548f40 T bwfm_sdio_read_4 +ffffffff82548ff0 T bwfm_sdio_load_microcode +ffffffff82549250 T bwfm_sdio_clkctl +ffffffff82549380 T bwfm_sdio_dev_write +ffffffff825493d0 T bwfm_sdio_intr +ffffffff82549410 T bwfm_sdio_ram_read_write +ffffffff82549640 T bwfm_sdio_htclk +ffffffff825498a0 T bwfm_sdio_readshared +ffffffff82549970 T bwfm_sdio_dev_read +ffffffff825499b0 T bwfm_sdio_rx_frames +ffffffff82549d40 T bwfm_sdio_tx_frames +ffffffff82549e20 T bwfm_sdio_backplane +ffffffff82549ed0 T bwfm_sdio_buf_read +ffffffff82549fb0 T bwfm_sdio_buf_write +ffffffff8254a060 T bwfm_sdio_frame_read_write +ffffffff8254a1e0 T bwfm_sdio_newbuf +ffffffff8254a260 T bwfm_sdio_tx_ok +ffffffff8254a2b0 T bwfm_sdio_tx_ctrlframe +ffffffff8254a3b0 T bwfm_sdio_tx_dataframe +ffffffff8254a500 T bwfm_sdio_rx_glom +ffffffff8254b000 T onewire_match +ffffffff8254b050 T onewire_attach +ffffffff8254b0f0 T onewire_detach +ffffffff8254b160 T onewire_activate +ffffffff8254b180 T onewire_scan +ffffffff8254b390 T onewire_createthread +ffffffff8254b400 T onewire_print +ffffffff8254b4d0 T onewirebus_print +ffffffff8254b520 T onewire_lock +ffffffff8254b540 T onewire_unlock +ffffffff8254b560 T onewire_reset +ffffffff8254b580 T onewire_bit +ffffffff8254b5a0 T onewire_read_byte +ffffffff8254b6e0 T onewire_write_byte +ffffffff8254b7c0 T onewire_read_block +ffffffff8254b860 T onewire_write_block +ffffffff8254b900 T onewire_triplet +ffffffff8254b9e0 T onewire_matchrom +ffffffff8254bb30 T onewire_search +ffffffff8254bec0 T onewire_thread +ffffffff8254c000 T onewire_crc +ffffffff8254c0e0 T onewire_crc16 +ffffffff8254c1c0 T onewire_famname +ffffffff8254c200 T onewire_matchbyfam +ffffffff8254d000 T owid_match +ffffffff8254d030 T owid_attach +ffffffff8254d100 T owid_detach +ffffffff8254d140 T owid_activate +ffffffff8254e000 T owsbm_match +ffffffff8254e030 T owsbm_attach +ffffffff8254e1d0 T owsbm_detach +ffffffff8254e240 T owsbm_activate +ffffffff8254e270 T owsbm_update +ffffffff8254f000 T owtemp_match +ffffffff8254f030 T owtemp_attach +ffffffff8254f130 T owtemp_detach +ffffffff8254f1a0 T owtemp_activate +ffffffff8254f1d0 T owtemp_update +ffffffff82550000 T owctr_match +ffffffff82550030 T owctr_attach +ffffffff82550180 T owctr_detach +ffffffff825501f0 T owctr_activate +ffffffff82550220 T owctr_update +ffffffff82550250 T owctr_update_counter +ffffffff82551000 A __text_page_start +ffffffff82551000 T Xsyscall_meltdown +ffffffff8255100c T Xsyscall +ffffffff8255126e t Xsyscall_trampback +ffffffff82551280 T intr_user_exit +ffffffff825512c2 t intr_user_exit_post_ast +ffffffff825513ee t Xiretq_trampback +ffffffff825513fa T doreti_iret +ffffffff82552000 T alltraps +ffffffff82552138 T recall_trap +ffffffff82552150 T alltraps_kern +ffffffff82552153 T alltraps_kern_meltdown +ffffffff82553000 ? Xsyscall32 +ffffffff82553000 A __kutext_start +ffffffff82553000 A __text_page_end +ffffffff82554000 ? Xtrap00 +ffffffff82554010 ? Xtrap01 +ffffffff82554020 ? Xtrap02 +ffffffff82554028 c calltrap_specstk +ffffffff825540f0 ? calltrap_specstk_tramp +ffffffff82554110 ? Xtrap03 +ffffffff82554120 ? Xtrap04 +ffffffff82554130 ? Xtrap05 +ffffffff82554140 ? Xtrap06 +ffffffff82554150 ? Xtrap07 +ffffffff82554160 ? Xtrap08 +ffffffff82554170 ? Xtrap09 +ffffffff82554180 ? Xtrap0a +ffffffff82554190 ? Xtrap0b +ffffffff825541a0 ? Xtrap0c +ffffffff825541b0 ? Xtrap0d +ffffffff82554240 ? Xtrap0e +ffffffff82554250 ? Xintrspurious +ffffffff82554250 ? Xtrap0f +ffffffff82554260 ? Xtrap10 +ffffffff82554270 ? Xtrap11 +ffffffff82554280 ? Xtrap12 +ffffffff82554290 ? Xtrap13 +ffffffff825542a0 ? Xtrap14 +ffffffff825542b0 ? Xtrap15 +ffffffff825542c0 ? Xtrap16 +ffffffff825542c0 ? Xtrap17 +ffffffff825542c0 ? Xtrap18 +ffffffff825542c0 ? Xtrap19 +ffffffff825542c0 ? Xtrap1a +ffffffff825542c0 ? Xtrap1b +ffffffff825542c0 ? Xtrap1c +ffffffff825542c0 ? Xtrap1d +ffffffff825542c0 ? Xtrap1e +ffffffff825542c0 ? Xtrap1f +ffffffff825542d0 ? x2apic_eoi +ffffffff825542f0 ? Xintr_lapic_ipi +ffffffff82554330 ? Xipi_invltlb +ffffffff82554360 ? Xipi_invlpg +ffffffff82554390 ? Xipi_invlrange +ffffffff825543d0 ? Xipi_invltlb_pcid +ffffffff82554410 ? Xipi_invlpg_pcid +ffffffff82554460 ? Xipi_invlrange_pcid +ffffffff825544d0 ? Xintr_lapic_ltimer +ffffffff82554510 ? Xintr_xen_upcall +ffffffff82554550 ? Xintr_hyperv_upcall +ffffffff82554590 ? Xintr_legacy0 +ffffffff825545d0 ? Xintr_legacy1 +ffffffff82554610 ? Xintr_legacy2 +ffffffff82554650 ? Xintr_legacy3 +ffffffff82554690 ? Xintr_legacy4 +ffffffff825546d0 ? Xintr_legacy5 +ffffffff82554710 ? Xintr_legacy6 +ffffffff82554750 ? Xintr_legacy7 +ffffffff82554790 ? Xintr_legacy8 +ffffffff825547d0 ? Xintr_legacy9 +ffffffff82554810 ? Xintr_legacy10 +ffffffff82554850 ? Xintr_legacy11 +ffffffff82554890 ? Xintr_legacy12 +ffffffff825548d0 ? Xintr_legacy13 +ffffffff82554910 ? Xintr_legacy14 +ffffffff82554950 ? Xintr_legacy15 +ffffffff82554990 ? Xintr_ioapic_edge0 +ffffffff825549d0 ? Xintr_ioapic_edge1 +ffffffff82554a10 ? Xintr_ioapic_edge2 +ffffffff82554a50 ? Xintr_ioapic_edge3 +ffffffff82554a90 ? Xintr_ioapic_edge4 +ffffffff82554ad0 ? Xintr_ioapic_edge5 +ffffffff82554b10 ? Xintr_ioapic_edge6 +ffffffff82554b50 ? Xintr_ioapic_edge7 +ffffffff82554b90 ? Xintr_ioapic_edge8 +ffffffff82554bd0 ? Xintr_ioapic_edge9 +ffffffff82554c10 ? Xintr_ioapic_edge10 +ffffffff82554c50 ? Xintr_ioapic_edge11 +ffffffff82554c90 ? Xintr_ioapic_edge12 +ffffffff82554cd0 ? Xintr_ioapic_edge13 +ffffffff82554d10 ? Xintr_ioapic_edge14 +ffffffff82554d50 ? Xintr_ioapic_edge15 +ffffffff82554d90 ? Xintr_ioapic_edge16 +ffffffff82554dd0 ? Xintr_ioapic_edge17 +ffffffff82554e10 ? Xintr_ioapic_edge18 +ffffffff82554e50 ? Xintr_ioapic_edge19 +ffffffff82554e90 ? Xintr_ioapic_edge20 +ffffffff82554ed0 ? Xintr_ioapic_edge21 +ffffffff82554f10 ? Xintr_ioapic_edge22 +ffffffff82554f50 ? Xintr_ioapic_edge23 +ffffffff82554f90 ? Xintr_ioapic_edge24 +ffffffff82554fd0 ? Xintr_ioapic_edge25 +ffffffff82555010 ? Xintr_ioapic_edge26 +ffffffff82555050 ? Xintr_ioapic_edge27 +ffffffff82555090 ? Xintr_ioapic_edge28 +ffffffff825550d0 ? Xintr_ioapic_edge29 +ffffffff82555110 ? Xintr_ioapic_edge30 +ffffffff82555150 ? Xintr_ioapic_edge31 +ffffffff82555190 ? Xintr_ioapic_edge32 +ffffffff825551d0 ? Xintr_ioapic_edge33 +ffffffff82555210 ? Xintr_ioapic_edge34 +ffffffff82555250 ? Xintr_ioapic_edge35 +ffffffff82555290 ? Xintr_ioapic_edge36 +ffffffff825552d0 ? Xintr_ioapic_edge37 +ffffffff82555310 ? Xintr_ioapic_edge38 +ffffffff82555350 ? Xintr_ioapic_edge39 +ffffffff82555390 ? Xintr_ioapic_edge40 +ffffffff825553d0 ? Xintr_ioapic_edge41 +ffffffff82555410 ? Xintr_ioapic_edge42 +ffffffff82555450 ? Xintr_ioapic_edge43 +ffffffff82555490 ? Xintr_ioapic_edge44 +ffffffff825554d0 ? Xintr_ioapic_edge45 +ffffffff82555510 ? Xintr_ioapic_edge46 +ffffffff82555550 ? Xintr_ioapic_edge47 +ffffffff82555590 ? Xintr_ioapic_edge48 +ffffffff825555d0 ? Xintr_ioapic_edge49 +ffffffff82555610 ? Xintr_ioapic_edge50 +ffffffff82555650 ? Xintr_ioapic_edge51 +ffffffff82555690 ? Xintr_ioapic_edge52 +ffffffff825556d0 ? Xintr_ioapic_edge53 +ffffffff82555710 ? Xintr_ioapic_edge54 +ffffffff82555750 ? Xintr_ioapic_edge55 +ffffffff82555790 ? Xintr_ioapic_edge56 +ffffffff825557d0 ? Xintr_ioapic_edge57 +ffffffff82555810 ? Xintr_ioapic_edge58 +ffffffff82555850 ? Xintr_ioapic_edge59 +ffffffff82555890 ? Xintr_ioapic_edge60 +ffffffff825558d0 ? Xintr_ioapic_edge61 +ffffffff82555910 ? Xintr_ioapic_edge62 +ffffffff82555950 ? Xintr_ioapic_edge63 +ffffffff82555990 ? Xintr_ioapic_level0 +ffffffff825559d0 ? Xintr_ioapic_level1 +ffffffff82555a10 ? Xintr_ioapic_level2 +ffffffff82555a50 ? Xintr_ioapic_level3 +ffffffff82555a90 ? Xintr_ioapic_level4 +ffffffff82555ad0 ? Xintr_ioapic_level5 +ffffffff82555b10 ? Xintr_ioapic_level6 +ffffffff82555b50 ? Xintr_ioapic_level7 +ffffffff82555b90 ? Xintr_ioapic_level8 +ffffffff82555bd0 ? Xintr_ioapic_level9 +ffffffff82555c10 ? Xintr_ioapic_level10 +ffffffff82555c50 ? Xintr_ioapic_level11 +ffffffff82555c90 ? Xintr_ioapic_level12 +ffffffff82555cd0 ? Xintr_ioapic_level13 +ffffffff82555d10 ? Xintr_ioapic_level14 +ffffffff82555d50 ? Xintr_ioapic_level15 +ffffffff82555d90 ? Xintr_ioapic_level16 +ffffffff82555dd0 ? Xintr_ioapic_level17 +ffffffff82555e10 ? Xintr_ioapic_level18 +ffffffff82555e50 ? Xintr_ioapic_level19 +ffffffff82555e90 ? Xintr_ioapic_level20 +ffffffff82555ed0 ? Xintr_ioapic_level21 +ffffffff82555f10 ? Xintr_ioapic_level22 +ffffffff82555f50 ? Xintr_ioapic_level23 +ffffffff82555f90 ? Xintr_ioapic_level24 +ffffffff82555fd0 ? Xintr_ioapic_level25 +ffffffff82556010 ? Xintr_ioapic_level26 +ffffffff82556050 ? Xintr_ioapic_level27 +ffffffff82556090 ? Xintr_ioapic_level28 +ffffffff825560d0 ? Xintr_ioapic_level29 +ffffffff82556110 ? Xintr_ioapic_level30 +ffffffff82556150 ? Xintr_ioapic_level31 +ffffffff82556190 ? Xintr_ioapic_level32 +ffffffff825561d0 ? Xintr_ioapic_level33 +ffffffff82556210 ? Xintr_ioapic_level34 +ffffffff82556250 ? Xintr_ioapic_level35 +ffffffff82556290 ? Xintr_ioapic_level36 +ffffffff825562d0 ? Xintr_ioapic_level37 +ffffffff82556310 ? Xintr_ioapic_level38 +ffffffff82556350 ? Xintr_ioapic_level39 +ffffffff82556390 ? Xintr_ioapic_level40 +ffffffff825563d0 ? Xintr_ioapic_level41 +ffffffff82556410 ? Xintr_ioapic_level42 +ffffffff82556450 ? Xintr_ioapic_level43 +ffffffff82556490 ? Xintr_ioapic_level44 +ffffffff825564d0 ? Xintr_ioapic_level45 +ffffffff82556510 ? Xintr_ioapic_level46 +ffffffff82556550 ? Xintr_ioapic_level47 +ffffffff82556590 ? Xintr_ioapic_level48 +ffffffff825565d0 ? Xintr_ioapic_level49 +ffffffff82556610 ? Xintr_ioapic_level50 +ffffffff82556650 ? Xintr_ioapic_level51 +ffffffff82556690 ? Xintr_ioapic_level52 +ffffffff825566d0 ? Xintr_ioapic_level53 +ffffffff82556710 ? Xintr_ioapic_level54 +ffffffff82556750 ? Xintr_ioapic_level55 +ffffffff82556790 ? Xintr_ioapic_level56 +ffffffff825567d0 ? Xintr_ioapic_level57 +ffffffff82556810 ? Xintr_ioapic_level58 +ffffffff82556850 ? Xintr_ioapic_level59 +ffffffff82556890 ? Xintr_ioapic_level60 +ffffffff825568d0 ? Xintr_ioapic_level61 +ffffffff82556910 ? Xintr_ioapic_level62 +ffffffff82556950 ? Xintr_ioapic_level63 +ffffffff82557000 ? codepatch_fill_nop +ffffffff82557000 A __cptext_start +ffffffff82557000 A __kutext_end +ffffffff825570b0 ? codepatch_maprw +ffffffff82557190 ? codepatch_unmaprw +ffffffff82557200 ? codepatch_nop +ffffffff82557360 ? codepatch_replace +ffffffff82557510 ? codepatch_call +ffffffff82557530 ? codepatch_jmp +ffffffff82558000 A __cptext_end +ffffffff82558000 A __rodata_start +ffffffff82558000 C _etext +ffffffff82558000 C etext +ffffffff82559000 r seeprom_read +ffffffff82559004 r icl_mg_pll_find_divisors.div1_vals +ffffffff82559028 r gen9bc_tgp_ddc_pin_map +ffffffff82559038 r athn_ac2qid +ffffffff82559038 r athn_ac2qid +ffffffff82559038 r athn_ac2qid +ffffffff82559044 r rtwn_get_rssi.cckoff +ffffffff8255906c r rsu_ac2qid +ffffffff8255907c r pckbc_portcmd +ffffffff82559080 r tht_fifo_write_pad.pad +ffffffff82559088 r rsu_get_rssi.cckoff +ffffffff8255909c r adlp_n_revids +ffffffff825590ec r apple_iso_trans +ffffffff825590f0 r dg2_g12_revid_step_tbl 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vga_50lscreen_mono +ffffffff826571c8 R vga_50lscreen_bf +ffffffff826571f8 R vga_screenlist +ffffffff82657208 R vga_screenlist_mono +ffffffff82657218 R vga_accessops +ffffffff82657278 r i945_wm_info +ffffffff826572b0 r bgansitopc +ffffffff826572b8 r pctoansi +ffffffff826572f8 r sdma_offsets +ffffffff826572f8 r sdma_offsets +ffffffff82657328 r iha_rate_tbl +ffffffff82657360 r i830_a_wm_info +ffffffff82657398 r gen9_edram_size_mb.ways +ffffffff82657400 r aggr_periodic_times +ffffffff82657480 r jsl_ehl_revids +ffffffff826574f8 r michael_final.pad +ffffffff82657520 r rt_copysa.maskarray +ffffffff82657528 r i915_wm_info +ffffffff82657530 r amdgpu_ih_clientid_jpeg +ffffffff82657530 r amdgpu_ih_clientid_uvds +ffffffff82657530 r amdgpu_ih_clientid_vcns +ffffffff82657530 r amdgpu_ih_clientid_vcns +ffffffff82657530 r amdgpu_ih_clientid_vcns +ffffffff82657568 r vga_setfontset.cmaptabb +ffffffff82657580 r tgl_revids +ffffffff826575d8 r i830_bc_wm_info +ffffffff82657648 r hsw_activate_psr2.map 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adw_switch +ffffffff82663000 R gdt_switch +ffffffff82664000 R twe_switch +ffffffff82665000 R ciss_switch +ffffffff82665030 R ciss_level +ffffffff82665050 R ciss_stat +ffffffff82666000 R ami_switch +ffffffff82666028 R ami_raw_switch +ffffffff82667000 R mfi_switch +ffffffff82667028 R mfi_pd_switch +ffffffff82667050 r mfi_iop_xscale +ffffffff82667080 r mfi_iop_ppc +ffffffff826670b0 r mfi_iop_gen2 +ffffffff826670e0 r mfi_iop_skinny +ffffffff82667110 r mfi_bbu_indicators +ffffffff826671c0 r bwi_rf_calc_nrssi_slope_11b.save_phy_regs +ffffffff826671f0 r chv_oa_mux_regs +ffffffff82667210 r fiji_clock_stretcher_lookup_table +ffffffff82667210 r tonga_clock_stretcher_lookup_table +ffffffff82667230 r iosf_pci_devices +ffffffff82667250 r link_speed +ffffffff82667250 r link_speed +ffffffff82667250 r link_speed +ffffffff82667290 r drm_fb_xfrm.default_dst_pitch +ffffffff82667290 r non_supported_protection +ffffffff82667390 r tgl_uy_revids +ffffffff826673e0 r bwi_phy_noise_11g_rev1 +ffffffff82667460 r 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bwi_rf_calibval.rf_calibvals +ffffffff826ab5e0 r pf_syncookie_msstab +ffffffff826ab640 r xgmi3x16_pcs_err_status_reg_aldebaran +ffffffff826ab6a0 r uath_wme_init.uath_wme_11g +ffffffff826ab6c0 r gen7_oa_b_counters +ffffffff826ab820 r icl_revids +ffffffff826ab8e0 r rtwn_iq_calib_run.reg_adda +ffffffff826ab920 r atom_def_dst +ffffffff826ab920 r atom_def_dst +ffffffff826ab960 r sha256_initial_hash_value +ffffffff826ab9c0 r otus_edca_def +ffffffff826ab9e0 r intel_hpll_vco.blb_vco +ffffffff826abaa0 r epic_pci_subsys_info +ffffffff826abac0 r atom_arg_mask +ffffffff826abac0 r atom_arg_mask +ffffffff826abb20 r butmap +ffffffff826abb60 r GFX_RLC_SRM_INDEX_CNTL_DATA_OFFSETS +ffffffff826abba0 r comsoft.lsrmap +ffffffff826abbe0 r tulip_mii_phy_readspecific.table +ffffffff826abc00 r kbl_revids +ffffffff826abca0 r intel_hpll_vco.pnv_vco +ffffffff826abd00 r dmapageport +ffffffff826abdc0 r intel_hpll_vco.ctg_vco +ffffffff826abe80 r drm_calculate_luminance_range.pre_computed_values +ffffffff826ac000 R sili_atascsi_methods +ffffffff826ad000 R ncr53c9x_switch +ffffffff826ae000 r scf_period +ffffffff826af000 R siop_script +ffffffff826af5a0 R lun_switch +ffffffff826af5d0 R tag_switch +ffffffff826af660 R load_dsa +ffffffff826af6c4 R siop_led_on +ffffffff826af6cc R siop_led_off +ffffffff826af6d8 R siop_switch +ffffffff826b0000 R ep_vortex_media +ffffffff826b0100 R ep_default_to_media +ffffffff826b1000 R wi_card_ident +ffffffff826b3000 R ucode_table +ffffffff826b4000 r re_revisions +ffffffff826b4290 r re_kstats_tpl +ffffffff826b6000 R smc91cxx_media +ffffffff826b6010 R smc91cxx_mii_bitbang_ops +ffffffff826b7000 R dl10019_mii_bitbang_ops +ffffffff826b7028 R dl10022_mii_bitbang_ops +ffffffff826b8000 R ax88190_mii_bitbang_ops +ffffffff826ba000 R ac97_audio_default +ffffffff826ba020 R ac97_on_off +ffffffff826ba324 R ac97_mic_select +ffffffff826ba628 R ac97_mono_select +ffffffff826ba92c R ac97_source +ffffffff826bac30 R ac97_volume_stereo +ffffffff826bac4c R ac97_volume_mono +ffffffff826bac70 R source_info +ffffffff826bb470 R ac97_ad +ffffffff826bb580 R ac97_ak +ffffffff826bb610 R ac97_av +ffffffff826bb750 R ac97_rl +ffffffff826bb7a0 R ac97_cm +ffffffff826bb820 R ac97_cr +ffffffff826bb840 R ac97_cs +ffffffff826bb920 R ac97_cx +ffffffff826bb980 R ac97_dt +ffffffff826bb9a0 R ac97_em +ffffffff826bb9d0 R ac97_es +ffffffff826bb9f0 R ac97_is +ffffffff826bba10 R ac97_ic +ffffffff826bba90 R ac97_it +ffffffff826bbac0 R ac97_ns +ffffffff826bbb80 R ac97_ps +ffffffff826bbbb0 R ac97_sl +ffffffff826bbbd0 R ac97_st +ffffffff826bbd20 R ac97_vi +ffffffff826bbd50 R ac97_tt +ffffffff826bbdd0 R ac97_ti +ffffffff826bbdf0 R ac97_wb +ffffffff826bbe10 R ac97_wo +ffffffff826bbea0 R ac97_ym +ffffffff826bbef0 R ac97_vendors +ffffffff826bc1f0 R ac97enhancement +ffffffff826bc2f0 R ac97feature +ffffffff826bd000 R lm_chips +ffffffff826bd020 R lm78_sensors +ffffffff826bd1a0 R w83627hf_sensors +ffffffff826bd3a0 R w83627ehf_sensors +ffffffff826bd5c0 R w83627dhg_sensors +ffffffff826bd7c0 R nct6776f_sensors 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ar5211_mode +ffffffff826c42c0 r ar5211_ini +ffffffff826c4ad0 r ar5211_rf +ffffffff826c5000 r ar5212_pcie +ffffffff826c5080 r ar5212_mode +ffffffff826c5310 r ar5212_ini +ffffffff826c5c80 r ar5212_ar5111_mode +ffffffff826c5f20 r ar5212_ar5112_mode +ffffffff826c61b0 r ar5413_mode +ffffffff826c6b10 r ar2413_mode +ffffffff826c7430 r ar2425_mode +ffffffff826c7d90 r ar5111_bbgain +ffffffff826c8090 r ar5112_bbgain +ffffffff826c9000 r athn_5ghz_chans +ffffffff826c9020 r athn_rates +ffffffff826ca000 r athn_rates +ffffffff826cb000 r ar9160_ini +ffffffff826cb068 r ar5416_ini +ffffffff826cb0d0 r ar5416_serdes +ffffffff826cb0e8 r ar9160_1_1_addac +ffffffff826cb0f8 r ar9160_1_0_addac +ffffffff826cb108 r ar5416_2_2_addac +ffffffff826cb118 r ar5416_2_1_addac +ffffffff826cb128 r ar5416_set_power_calib.chainoffset +ffffffff826cb140 r ar9160_bank6tpc_vals +ffffffff826cb1c0 r ar5416_bank6tpc_vals +ffffffff826cb240 r ar5416_bb_rfgain_vals_2g +ffffffff826cb340 r ar5416_bb_rfgain_vals_5g +ffffffff826cb440 r ar5416_bank6_vals +ffffffff826cb4c0 r ar9160_regs +ffffffff826cb540 r ar9160_vals_5g20 +ffffffff826cb640 r ar9160_vals_5g40 +ffffffff826cb740 r ar9160_vals_2g40 +ffffffff826cb840 r ar9160_vals_2g20 +ffffffff826cb940 r ar9160_cm_regs +ffffffff826cbc30 r ar9160_cm_vals +ffffffff826cc210 r ar5416_regs +ffffffff826cc290 r ar5416_vals_5g20 +ffffffff826cc390 r ar5416_vals_5g40 +ffffffff826cc490 r ar5416_vals_2g40 +ffffffff826cc590 r ar5416_vals_2g20 +ffffffff826cc690 r ar5416_cm_regs +ffffffff826cc980 r ar5416_cm_vals +ffffffff826ccf60 r ar5416_serdes_regs +ffffffff826ccf90 r ar5416_serdes_vals +ffffffff826ccfc0 r ar9160_1_1_addac_vals +ffffffff826cd040 r ar9160_1_0_addac_vals +ffffffff826cd0c0 r ar5416_2_2_addac_vals +ffffffff826cd150 r ar5416_2_1_addac_vals +ffffffff826ce000 r ar9280_2_0_ini +ffffffff826ce068 r ar9280_2_0_serdes +ffffffff826ce080 r ar9280_2_0_rx_gain_23db_backoff +ffffffff826ce0a0 r ar9280_2_0_rx_gain_13db_backoff +ffffffff826ce0c0 r ar9280_2_0_rx_gain +ffffffff826ce0e0 r ar9280_2_0_tx_gain_high_power +ffffffff826ce100 r ar9280_2_0_tx_gain +ffffffff826ce120 r ar9280_init_from_rom.chainoffset +ffffffff826ce130 r ar9280_2_0_regs +ffffffff826ce190 r ar9280_2_0_vals_5g20 +ffffffff826ce250 r ar9280_2_0_vals_5g40 +ffffffff826ce310 r ar9280_2_0_vals_2g40 +ffffffff826ce3d0 r ar9280_2_0_vals_2g20 +ffffffff826ce490 r ar9280_2_0_cm_regs +ffffffff826ce740 r ar9280_2_0_cm_vals +ffffffff826cec90 r ar9280_2_0_fast_clock_regs +ffffffff826cecb0 r ar9280_2_0_fast_clock_vals_5g20 +ffffffff826cecf0 r ar9280_2_0_fast_clock_vals_5g40 +ffffffff826ced30 r ar9280_2_0_serdes_regs +ffffffff826ced60 r ar9280_2_0_serdes_vals +ffffffff826ced90 r ar9280_2_0_rx_gain_regs +ffffffff826ceea0 r ar9280_2_0_rx_gain_23db_backoff_vals_5g +ffffffff826cf0b0 r ar9280_2_0_rx_gain_23db_backoff_vals_2g +ffffffff826cf2c0 r ar9280_2_0_rx_gain_13db_backoff_vals_5g +ffffffff826cf4d0 r ar9280_2_0_rx_gain_13db_backoff_vals_2g +ffffffff826cf6e0 r ar9280_2_0_rx_gain_vals_5g +ffffffff826cf8f0 r ar9280_2_0_rx_gain_vals_2g +ffffffff826cfb00 r ar9280_2_0_tx_gain_regs +ffffffff826cfb40 r ar9280_2_0_tx_gain_high_power_vals_5g +ffffffff826cfbc0 r ar9280_2_0_tx_gain_high_power_vals_2g +ffffffff826cfc40 r ar9280_2_0_tx_gain_vals_5g +ffffffff826cfcc0 r ar9280_2_0_tx_gain_vals_2g +ffffffff826d0000 r ar9271_ini +ffffffff826d0068 r ar9285_1_2_ini +ffffffff826d00d0 r ar9280_2_0_serdes +ffffffff826d00e8 r ar9271_tx_gain_high_power +ffffffff826d0108 r ar9271_tx_gain +ffffffff826d0128 r ar9285_2_0_tx_gain_high_power +ffffffff826d0148 r ar9285_2_0_tx_gain +ffffffff826d0168 r ar9285_1_2_tx_gain_high_power +ffffffff826d0188 r ar9285_1_2_tx_gain +ffffffff826d01b0 r ar9271_regs +ffffffff826d0410 r ar9271_vals_2g40 +ffffffff826d08d0 r ar9271_vals_2g20 +ffffffff826d0d90 r ar9271_cm_regs +ffffffff826d1020 r ar9271_cm_vals +ffffffff826d1540 r ar9285_1_2_regs +ffffffff826d17a0 r ar9285_1_2_vals_2g40 +ffffffff826d1c60 r ar9285_1_2_vals_2g20 +ffffffff826d2120 r ar9285_1_2_cm_regs +ffffffff826d23a0 r ar9285_1_2_cm_vals +ffffffff826d2890 r ar9280_2_0_serdes_regs +ffffffff826d28c0 r ar9280_2_0_serdes_vals +ffffffff826d28f0 r ar9271_tx_gain_regs +ffffffff826d2940 r ar9271_tx_gain_high_power_vals_2g +ffffffff826d29d0 r ar9271_tx_gain_vals_2g +ffffffff826d2a60 r ar9285_1_2_tx_gain_regs +ffffffff826d2ab0 r ar9285_2_0_tx_gain_high_power_vals_2g +ffffffff826d2b50 r ar9285_2_0_tx_gain_vals_2g +ffffffff826d2bf0 r ar9285_1_2_tx_gain_high_power_vals_2g +ffffffff826d2c90 r ar9285_1_2_tx_gain_vals_2g +ffffffff826d3000 r ar9287_1_1_ini +ffffffff826d3068 r ar9280_2_0_serdes +ffffffff826d3080 r ar9287_1_1_rx_gain +ffffffff826d30a0 r ar9287_1_1_tx_gain +ffffffff826d30c0 r ar9287_1_1_regs +ffffffff826d3120 r ar9287_1_1_vals_2g40 +ffffffff826d31d0 r ar9287_1_1_vals_2g20 +ffffffff826d3280 r ar9287_1_1_cm_regs +ffffffff826d3560 r ar9287_1_1_cm_vals +ffffffff826d3b20 r ar9280_2_0_serdes_regs +ffffffff826d3b50 r ar9280_2_0_serdes_vals +ffffffff826d3b80 r ar9287_1_1_rx_gain_regs +ffffffff826d3d90 r ar9287_1_1_rx_gain_vals_2g +ffffffff826d41a0 r ar9287_1_1_tx_gain_regs +ffffffff826d4200 r ar9287_1_1_tx_gain_vals_2g +ffffffff826d5000 r athn_rates +ffffffff826d6000 r ar9485_1_1_ini +ffffffff826d6068 r ar9485_1_1_serdes +ffffffff826d6080 r ar9380_2_2_ini +ffffffff826d60e8 r ar9380_2_2_serdes +ffffffff826d6100 r ar9380_2_2_rx_gain_wo_xlna +ffffffff826d6120 r ar9380_2_2_rx_gain +ffffffff826d6140 r ar9485_1_1_rx_gain +ffffffff826d6160 r ar9380_2_2_tx_gain_high_ob_db +ffffffff826d6180 r ar9380_2_2_tx_gain_low_ob_db +ffffffff826d61a0 r ar9380_2_2_tx_gain_high_power +ffffffff826d61c0 r ar9380_2_2_tx_gain +ffffffff826d61e0 r ar9485_1_1_tx_gain +ffffffff826d6200 r ar9485_1_1_regs +ffffffff826d6270 r ar9485_1_1_vals_2g40 +ffffffff826d6350 r ar9485_1_1_vals_2g20 +ffffffff826d6430 r ar9485_1_1_cm_regs +ffffffff826d6720 r ar9485_1_1_cm_vals +ffffffff826d6d00 r ar9485_1_1_serdes_regs +ffffffff826d6d0c r ar9485_1_1_serdes_vals +ffffffff826d6d20 r ar9380_2_2_regs +ffffffff826d6db0 r ar9380_2_2_vals_5g20 +ffffffff826d6ed0 r ar9380_2_2_vals_5g40 +ffffffff826d6ff0 r ar9380_2_2_vals_2g40 +ffffffff826d7110 r ar9380_2_2_vals_2g20 +ffffffff826d7230 r ar9380_2_2_cm_regs +ffffffff826d75d0 r ar9380_2_2_cm_vals +ffffffff826d7d00 r ar9380_2_2_fast_clock_regs +ffffffff826d7d20 r ar9380_2_2_fast_clock_vals_5g20 +ffffffff826d7d50 r ar9380_2_2_fast_clock_vals_5g40 +ffffffff826d7d74 r ar9380_2_2_serdes_regs +ffffffff826d7d80 r ar9380_2_2_serdes_vals +ffffffff826d7d90 r ar9380_2_2_rx_gain_regs +ffffffff826d7f90 r ar9380_2_2_rx_gain_wo_xlna_vals +ffffffff826d8390 r ar9380_2_2_rx_gain_vals +ffffffff826d8790 r ar9485_1_1_rx_gain_regs +ffffffff826d8890 r ar9485_1_1_rx_gain_vals +ffffffff826d8a90 r ar9380_2_2_tx_gain_regs +ffffffff826d8b60 r ar9380_2_2_tx_gain_high_ob_db_vals_5g +ffffffff826d8d00 r ar9380_2_2_tx_gain_high_ob_db_vals_2g +ffffffff826d8ea0 r ar9380_2_2_tx_gain_low_ob_db_vals_5g +ffffffff826d9040 r ar9380_2_2_tx_gain_low_ob_db_vals_2g +ffffffff826d91e0 r ar9380_2_2_tx_gain_high_power_vals_5g +ffffffff826d9380 r ar9380_2_2_tx_gain_high_power_vals_2g +ffffffff826d9520 r ar9380_2_2_tx_gain_vals_5g +ffffffff826d96c0 r ar9380_2_2_tx_gain_vals_2g +ffffffff826d9860 r ar9485_1_1_tx_gain_regs +ffffffff826d98f0 r ar9485_1_1_tx_gain_vals_2g +ffffffff826d9a10 r ar9380_def_rom +ffffffff826d9e50 r ar9380_def_rom_h112 +ffffffff826da290 r ar9380_def_rom_h116 +ffffffff826da6d0 r ar9380_def_rom_x112 +ffffffff826dab10 r ar9380_def_rom_x113 +ffffffff826db000 R atw_txthresh_tab_lo +ffffffff826db050 R atw_txthresh_tab_hi +ffffffff826db0a0 r atw_attach.empty_macaddr +ffffffff826db0b0 r atw_attach.type_strings +ffffffff826db0d0 r atw_rfmd2958_ifn +ffffffff826db110 r atw_rfmd2958_rf1r +ffffffff826db150 r atw_rxintr.rate_tbl +ffffffff826dc000 r rtw_identify_sta.empty_macaddr +ffffffff826dd000 r rtwn_set_key.etherzeroaddr +ffffffff826dd010 r rtl8188eu_rf_prog +ffffffff826dd030 r rtl8188ftv_rf_prog +ffffffff826dd050 r rtl8192e_rf_prog +ffffffff826dd080 r rtl8188ce_rf_prog +ffffffff826dd0a0 r rtl8188ru_rf_prog +ffffffff826dd0c0 r rtl8188cu_rf_prog +ffffffff826dd0e0 r rtl8192ce_rf_prog +ffffffff826dd110 r rtl8188ru_txagc +ffffffff826dd170 r rtl8188eu_rf_regs +ffffffff826dd230 r rtl8188eu_rf_vals +ffffffff826dd3b0 r rtl8188ftv_rf_regs +ffffffff826dd490 r rtl8188ftv_rf_vals +ffffffff826dd640 r rtl8192e_rf_regs +ffffffff826dd710 r rtl8192e_rf_vals +ffffffff826dd8b0 r rtl8192e_rf2_regs +ffffffff826dd950 r rtl8192e_rf2_vals +ffffffff826dda90 r rtl8192ce_rf1_regs +ffffffff826ddbb0 r rtl8188ce_rf_vals +ffffffff826dddf0 r rtl8188ru_rf_vals +ffffffff826de030 r rtl8188cu_rf_vals +ffffffff826de270 r rtl8192ce_rf1_vals +ffffffff826de4b0 r rtl8192ce_rf2_regs +ffffffff826de500 r rtl8192ce_rf2_vals +ffffffff826de5a0 r rtl8192cu_txagc +ffffffff826df000 r rt2560_rf2522_r2 +ffffffff826df040 r rt2560_rf2524_r2 +ffffffff826df080 r rt2560_rf2525_hi_r2 +ffffffff826df0c0 r rt2560_rf2525_r2 +ffffffff826df100 r rt2560_rf2525e_r2 +ffffffff826df140 r rt2560_rf2526_hi_r2 +ffffffff826df180 r rt2560_rf2526_r2 +ffffffff826df1c0 r rt2560_def_bbp +ffffffff826df200 r rt2560_def_mac +ffffffff826e0000 r rt2661_rf5225_1 +ffffffff826e0300 r rt2661_rf5225_2 +ffffffff826e0600 r rt2661_def_bbp +ffffffff826e0640 r rt2661_def_mac +ffffffff826e1000 r rt2860_rf2850 +ffffffff826e1430 r rt2860_rates +ffffffff826e14f0 r rt3572_def_rf +ffffffff826e1530 r rt3090_def_rf +ffffffff826e1560 r rt5392_def_rf +ffffffff826e15e0 r rt3290_def_rf +ffffffff826e1640 r rt5390_def_rf +ffffffff826e16c0 r rt5390_def_bbp +ffffffff826e16f0 r rt2860_def_mac +ffffffff826e3000 r acx111_reg +ffffffff826e3040 r acx111_rate_map +ffffffff826e4000 r acx100_reg +ffffffff826e4040 r acx100_txpower_rfmd +ffffffff826e4060 r acx100_txpower_maxim +ffffffff826e4080 r xehp_rcs_offsets +ffffffff826e40b0 r gen8_rcs_offsets +ffffffff826e40e0 r hangpic +ffffffff826e4120 r digits +ffffffff826e4120 r pppdumpb.digits +ffffffff826e4120 r pppdumpm.digits +ffffffff826e4140 r dg2_xcs_offsets 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xhci_root_ctrl_methods +ffffffff826eb060 R xhci_root_intr_methods +ffffffff826eb090 R xhci_device_ctrl_methods +ffffffff826eb0c0 R xhci_device_intr_methods +ffffffff826eb0f0 R xhci_device_bulk_methods +ffffffff826eb120 R xhci_device_isoc_methods +ffffffff826eb150 R xhci_devd +ffffffff826eb162 R xhci_confd +ffffffff826eb16b R xhci_ifcd +ffffffff826eb174 R xhci_endpd +ffffffff826eb17b R xhci_endpcd +ffffffff826eb181 R xhci_hubd +ffffffff826ee000 R radio_ca +ffffffff826ef000 R ipmi_ca +ffffffff826f0000 R vscsi_ca +ffffffff826f0028 R vscsi_switch +ffffffff826f0050 R vscsi_filtops +ffffffff826f1000 R mpath_ca +ffffffff826f1028 R mpath_switch +ffffffff826f2000 R softraid_ca +ffffffff826f2028 R sr_switch +ffffffff826f3000 r spdmem_basic_types +ffffffff826f30a0 r spdmem_parity_types +ffffffff826f30e0 r spdmem_ddr4_decode.ddr4_chipsize +ffffffff826f4000 R kstat_rlock_ops +ffffffff826f4010 R kstat_wlock_ops +ffffffff826f4020 R kstat_mutex_ops +ffffffff826f4030 R kstat_cpu_ops +ffffffff826f4040 r kstat_id_tree_RBT_INFO +ffffffff826f4058 R kstat_id_tree_RBT_TYPE +ffffffff826f4060 r kstat_pv_tree_RBT_INFO +ffffffff826f4078 R kstat_pv_tree_RBT_TYPE +ffffffff826f4080 r kstat_nm_tree_RBT_INFO +ffffffff826f4098 R kstat_nm_tree_RBT_TYPE +ffffffff826f5000 r fuse_rd_filtops +ffffffff826f6000 R fusefs_vfsops +ffffffff826f6070 R fusefs_vars +ffffffff826f7000 R fusefs_vops +ffffffff826f7110 R fusefsread_filtops +ffffffff826f7140 R fusefswrite_filtops +ffffffff826f7170 R fusefsvnode_filtops +ffffffff826f8000 r pf_state_tree_RBT_INFO +ffffffff826f8018 R pf_state_tree_RBT_TYPE +ffffffff826f8020 r pf_state_tree_id_RBT_INFO +ffffffff826f8038 R pf_state_tree_id_RBT_TYPE +ffffffff826f8040 r pf_translate_af.zero +ffffffff826f9000 R hfsc_ops +ffffffff826f9038 R ifq_hfsc_ops +ffffffff826f9040 R hfsc_pf_ops +ffffffff826f9088 R pfq_hfsc_ops +ffffffff826fa000 r fqcodel_ops +ffffffff826fa038 R ifq_fqcodel_ops +ffffffff826fa040 r fqcodel_pf_ops +ffffffff826fa088 R pfq_fqcodel_ops +ffffffff826fa090 r codel_intervals +ffffffff826fb000 R pfsync_acts +ffffffff826fc000 R hotplugread_filtops +ffffffff826fd000 R dtps_static +ffffffff826fe000 R db_show_all_cmds +ffffffff826fe180 R db_show_cmds +ffffffff826fe4c0 R db_boot_cmds +ffffffff826fe5a0 R db_command_table +ffffffff826ff000 R ddb_vars +ffffffff82700000 R audio_ca +ffffffff82700028 R audioctlread_filtops +ffffffff82700058 R audiowrite_filtops +ffffffff82700088 R audioread_filtops +ffffffff82701000 R midi_ca +ffffffff82701028 R midiwrite_filtops +ffffffff82701058 R midiread_filtops +ffffffff82702000 r mulawtolin16 +ffffffff82702200 r lintomulaw +ffffffff82703000 R randomread_filtops +ffffffff82703030 R randomwrite_filtops +ffffffff82704000 R video_ca +ffffffff82704028 R video_filtops +ffffffff82705000 R cd9660_vfsops +ffffffff82706000 R cd9660_vops +ffffffff82706110 R cd9660_specvops +ffffffff82706220 R cd9660_fifovops +ffffffff82706330 R cd9660read_filtops +ffffffff82706360 R cd9660write_filtops +ffffffff82706390 R cd9660vnode_filtops +ffffffff82707000 R udf_vfsops +ffffffff82708000 R udf_vops +ffffffff82708110 r mon_lens +ffffffff82709000 r month_days +ffffffff8270a000 R execsw +ffffffff8270b000 r shstrtab +ffffffff8270c000 R copyright +ffffffff8270c0c0 r initpaths +ffffffff8270d000 R sysent +ffffffff8270f000 R bufq_impls +ffffffff82710000 R kqueueops +ffffffff82710038 R kqread_filtops +ffffffff82710068 R proc_filtops +ffffffff82710098 R file_filtops +ffffffff827100c8 R timer_filtops +ffffffff82710100 R sysfilt_ops +ffffffff82710148 R seltrue_filtops +ffffffff82710178 R dead_filtops +ffffffff827101a8 R badfd_filtops +ffffffff827101d8 r mutex_klistops +ffffffff827101f0 r rwlock_klistops +ffffffff82711000 R kv_exec +ffffffff82712000 R addrmask +ffffffff82713000 r rw_ops +ffffffff82714000 r proc_printit.pstat +ffffffff82715000 R pledge_syscalls +ffffffff82715a60 r pledgenames +ffffffff82715cb0 r pledgereq +ffffffff82716000 r unvname_rbt_RBT_INFO +ffffffff82716018 R unvname_rbt_RBT_TYPE +ffffffff82717000 R sig_filtops +ffffffff82717030 R sigprop +ffffffff82718000 R kern_vars +ffffffff827182f0 R hw_vars +ffffffff82719000 R tc_vars +ffffffff8271a000 r sys_gettimeofday.zerotz +ffffffff8271b000 r taskq_sys_name +ffffffff8271b006 r taskq_sys_mp_name +ffffffff8271b010 R systq +ffffffff8271b018 R systqmp +ffffffff8271d000 r gpt_get_fstype.gpt_uuid_openbsd +ffffffff8271d010 r gpt_get_fstype.gpt_uuid_msdos +ffffffff8271d020 r gpt_get_fstype.gpt_uuid_chromerootfs +ffffffff8271d030 r gpt_get_fstype.gpt_uuid_linux +ffffffff8271d040 r gpt_get_fstype.gpt_uuid_hfs +ffffffff8271d050 r gpt_get_fstype.gpt_uuid_unused +ffffffff8271d060 r gpt_get_fstype.gpt_uuid_efi_system +ffffffff8271d070 r gpt_get_fstype.gpt_uuid_bios_boot +ffffffff8271e000 r hiballoc_addr_RBT_INFO +ffffffff8271e018 R hiballoc_addr_RBT_TYPE +ffffffff8271f000 R logread_filtops +ffffffff82720000 r phtree_RBT_INFO +ffffffff82720018 R phtree_RBT_TYPE +ffffffff82720020 r pool_lock_ops_rw +ffffffff82720058 r pool_lock_ops_mtx +ffffffff82721000 r pselregister.evf +ffffffff8272100c r pselregister.evff +ffffffff82722000 R pipe_rfiltops +ffffffff82722030 R pipe_wfiltops +ffffffff82722060 R pipe_efiltops +ffffffff82722090 r pipeops +ffffffff82723000 R socketops +ffffffff82724000 R sysvsem_vars +ffffffff82725000 R char_type +ffffffff82725100 R ttyread_filtops +ffffffff82725130 R ttywrite_filtops +ffffffff82725160 R ttyexcept_filtops +ffffffff82726000 R ptcread_filtops +ffffffff82726030 R ptcwrite_filtops +ffffffff82726060 R ptcexcept_filtops +ffffffff82728000 R domains +ffffffff82729000 R unixdomain +ffffffff82729050 R unixsw +ffffffff8272a000 R solisten_filtops +ffffffff8272a030 R soread_filtops +ffffffff8272a060 R sowrite_filtops +ffffffff8272a090 R soexcept_filtops +ffffffff8272a0c0 R socket_klistops +ffffffff8272b000 R sun_noname +ffffffff8272b010 R uipc_usrreqs +ffffffff8272b0b0 R uipc_dgram_usrreqs +ffffffff8272b150 R unpstctl_vars +ffffffff8272b180 R unpsqctl_vars +ffffffff8272b1b0 R unpdgctl_vars +ffffffff8272c000 r namecache_rb_cache_RBT_INFO +ffffffff8272c018 R namecache_rb_cache_RBT_TYPE +ffffffff8272d000 R generic_filtops +ffffffff8272e000 r buf_rb_bufs_RBT_INFO +ffffffff8272e018 R buf_rb_bufs_RBT_TYPE +ffffffff8272e020 r typename +ffffffff8272f000 R sync_vops +ffffffff82730000 R vnops +ffffffff82731000 R spec_vops +ffffffff82732000 R dead_vops +ffffffff82733000 R fifo_vops +ffffffff82733110 R fiforead_filtops +ffffffff82733140 R fifowrite_filtops +ffffffff82733170 R fifoexcept_filtops +ffffffff82734000 R regyear +ffffffff82734020 R leapyear +ffffffff82734040 r dos2unix +ffffffff82734140 r u2l +ffffffff82734240 r unix2dos +ffffffff82735008 R msdosfs_vfsops +ffffffff82736000 R msdosfs_vops +ffffffff82736110 R msdosfsread_filtops +ffffffff82736140 R msdosfswrite_filtops +ffffffff82736170 R msdosfsvnode_filtops +ffffffff82737000 r _utf_count +ffffffff82738000 R ntfs_vfsops +ffffffff82739000 R ntfs_vops +ffffffff8273a000 R bpfread_filtops +ffffffff8273a030 R bpf_mbuf_ops +ffffffff8273b000 r bpf_mem_ops +ffffffff8273c000 R priq_ops +ffffffff8273c038 R ifq_priq_ops +ffffffff8273c040 r ifq_kstat_tpl +ffffffff8273c158 r ifiq_kstat_tpl +ffffffff8273d000 r ether_crc32_le_update.crctab +ffffffff8273d040 r ether_crc32_be_update.crctab +ffffffff8273e000 r lcp +ffffffff8273e078 r ipcp +ffffffff8273e0f0 r ipv6cp +ffffffff8273e168 r chap +ffffffff8273e1e0 r pap +ffffffff8273f000 R ifmedia_baudrate_descriptions +ffffffff82740000 r fcstab +ffffffff82742000 R tunread_filtops +ffffffff82742030 R tunwrite_filtops +ffffffff82743000 R bridge_brport +ffffffff82744000 R bstp_etheraddr +ffffffff82745000 r eb_tree_RBT_INFO +ffffffff82745018 R eb_tree_RBT_TYPE +ffffffff82746000 r veb_etherbridge_ops +ffffffff82746028 r veb_pf_ipv4 +ffffffff82746040 r veb_pf_ipv6 +ffffffff82747000 r pipex_pppoe_padding +ffffffff82748000 r rn_addmask.normal_chars +ffffffff82749000 R route_src +ffffffff82749010 R route_usrreqs +ffffffff827490b0 R routedomain +ffffffff82749100 R routesw +ffffffff8274a000 R gre_vars +ffffffff8274a030 r mgre_tree_RBT_INFO +ffffffff8274a048 R mgre_tree_RBT_TYPE +ffffffff8274a050 r egre_tree_RBT_INFO +ffffffff8274a068 R egre_tree_RBT_TYPE +ffffffff8274a070 r nvgre_ucast_tree_RBT_INFO +ffffffff8274a088 R nvgre_ucast_tree_RBT_TYPE +ffffffff8274a090 r nvgre_mcast_tree_RBT_INFO +ffffffff8274a0a8 R nvgre_mcast_tree_RBT_TYPE +ffffffff8274a0b0 r eoip_tree_RBT_INFO +ffffffff8274a0c8 R eoip_tree_RBT_TYPE +ffffffff8274a0d0 r nvgre_etherbridge_ops +ffffffff8274b000 r trunk_protos +ffffffff8274c000 R ethermulticastaddr_slowprotocols +ffffffff8274c006 R lacp_info_tlv_template +ffffffff8274c00e R marker_info_tlv_template +ffffffff8274c012 R marker_response_tlv_template +ffffffff8274c020 R lacp_timer_funcs +ffffffff8274d000 r lacp_rxm_state_names +ffffffff8274d040 r lacp_rxm_event_names +ffffffff8274d090 r aggr_port_selected_names +ffffffff8274d0b0 r lacp_mux_state_names +ffffffff8274d0e0 r lacp_mux_event_names +ffffffff8274d128 r lacp_address_slow +ffffffff8274e000 r tpmr_pf_ipv4 +ffffffff8274e018 r tpmr_pf_ipv6 +ffffffff8274f000 r bpe_tree_RBT_INFO +ffffffff8274f018 R bpe_tree_RBT_TYPE +ffffffff8274f020 r bpe_etherbridge_ops +ffffffff82750000 R pppx_rd_filtops +ffffffff82750030 R pppx_wr_filtops +ffffffff82750060 r pppx_ifs_RBT_INFO +ffffffff82750078 R pppx_ifs_RBT_TYPE +ffffffff82750080 r pppac_rd_filtops +ffffffff827500b0 r pppac_wr_filtops +ffffffff82751000 r vxlan_peers_RBT_INFO +ffffffff82751018 R vxlan_peers_RBT_TYPE +ffffffff82751020 r vxlan_etherbridge_ops +ffffffff82752000 R stoeplitz_cache +ffffffff82753000 R ieee80211_std_rateset_11a +ffffffff82753010 R ieee80211_std_rateset_11b +ffffffff82753020 R ieee80211_std_rateset_11g +ffffffff82753030 R ieee80211_std_ratesets_11n +ffffffff827533b0 R ieee80211_std_ratesets_11ac +ffffffff827536b0 r ieee80211_setbasicrates.basic +ffffffff82753710 r ieee80211_setmode.chanflags +ffffffff82753730 r ieee80211_rate2media.rates +ffffffff827538c0 r ieee80211_media2rate.ieeerates +ffffffff82754000 r Sbox +ffffffff82756000 r ieee80211_ioctl.empty_macaddr +ffffffff82757000 r ieee80211_find_rxnode.zero +ffffffff82757008 r ieee80211_tree_RBT_INFO +ffffffff82757020 R ieee80211_tree_RBT_TYPE +ffffffff82757028 r ieee80211_ess_tree_RBT_INFO +ffffffff82757040 R ieee80211_ess_tree_RBT_TYPE +ffffffff82757048 r ieee80211_do_slow_print.merge_print_intvl +ffffffff82758020 R ieee80211_edca_table +ffffffff827580e0 R ieee80211_qap_edca_table +ffffffff82759000 R ieee80211_mgt_subtype_name +ffffffff82759080 R ieee80211_state_name +ffffffff827590b0 R ieee80211_phymode_name +ffffffff8275a000 r ieee80211_r_ctry +ffffffff8275aae0 r ieee80211_r_names +ffffffff8275af80 r ieee80211_r_map +ffffffff8275c000 R zeroin_addr +ffffffff8275d000 R inetdomain +ffffffff8275d050 R inetsw +ffffffff8275e000 R divertctl_vars +ffffffff8275e030 R divert_usrreqs +ffffffff8275f000 R icmpctl_vars +ffffffff82760000 R ipctl_vars +ffffffff82760150 R inetctlerrmap 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enc_xform_null +ffffffff82777280 R auth_hash_hmac_md5_96 +ffffffff827772c8 R auth_hash_hmac_sha1_96 +ffffffff82777310 R auth_hash_hmac_ripemd_160_96 +ffffffff82777358 R auth_hash_hmac_sha2_256_128 +ffffffff827773a0 R auth_hash_hmac_sha2_384_192 +ffffffff827773e8 R auth_hash_hmac_sha2_512_256 +ffffffff82777430 R auth_hash_gmac_aes_128 +ffffffff82777478 R auth_hash_gmac_aes_192 +ffffffff827774c0 R auth_hash_gmac_aes_256 +ffffffff82777508 R auth_hash_chacha20_poly1305 +ffffffff82777550 R comp_algo_deflate +ffffffff82778000 r IV +ffffffff82779000 r idgen32_ftable +ffffffff8277a000 r Chacha20_Poly1305_Update.zeroes +ffffffff8277a010 r pad0 +ffffffff8277b000 r null_point +ffffffff8277b020 r base_point +ffffffff8277c000 R mplsdomain +ffffffff8277d000 R mplsctl_vars +ffffffff8277e000 r nfs_nodetree_RBT_INFO +ffffffff8277e018 R nfs_nodetree_RBT_TYPE +ffffffff8277f000 r nfsread_filtops +ffffffff8277f030 r nfswrite_filtops +ffffffff8277f060 r nfsvnode_filtops +ffffffff82780000 r nfsrv_v3errmap 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uvm_pmr_addr_RBT_TYPE +ffffffff82796020 r uvm_pmr_size_RBT_INFO +ffffffff82796038 R uvm_pmr_size_RBT_TYPE +ffffffff82796040 r uvm_pmemrange_addr_RBT_INFO +ffffffff82796058 R uvm_pmemrange_addr_RBT_TYPE +ffffffff82797000 R uvm_vnodeops +ffffffff82797048 r uvn_flush.interval +ffffffff82798000 R zeroin6_addr +ffffffff82799000 R in6addr_any +ffffffff82799010 R in6addr_loopback +ffffffff82799020 R in6addr_intfacelocal_allnodes +ffffffff82799030 R in6addr_linklocal_allnodes +ffffffff82799040 R in6addr_linklocal_allrouters +ffffffff82799050 R in6mask0 +ffffffff82799060 R in6mask32 +ffffffff82799070 R in6mask64 +ffffffff82799080 R in6mask96 +ffffffff82799090 R in6mask128 +ffffffff827990a0 R sa6_any +ffffffff8279a000 R divert6ctl_vars +ffffffff8279a030 R divert6_usrreqs +ffffffff8279b000 R inet6domain +ffffffff8279b050 R inet6sw +ffffffff8279c000 R icmpv6ctl_vars +ffffffff8279d000 R inet6ctlerrmap +ffffffff8279d020 R ipv6ctl_vars +ffffffff8279e000 R rip6_usrreqs +ffffffff8279f000 R pfkey_addr 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normal_pdes +ffffffff827b5000 R trap_type +ffffffff827b50b0 R trap_types +ffffffff827b6000 r x86fpflags_to_siginfo.x86fp_siginfo_table +ffffffff827b7000 R x86_soft_intr_to_ssir +ffffffff827b9000 R Xexceptions +ffffffff827b9100 r spl_lowered +ffffffff827b912d R i8259_stubs +ffffffff827b92ad R ioapic_edge_stubs +ffffffff827b98ad R ioapic_level_stubs +ffffffff827ba000 R _stac +ffffffff827ba003 R _clac +ffffffff827bb000 R x86_bus_space_io_ops +ffffffff827bb130 R x86_bus_space_mem_ops +ffffffff827bc000 ? cpu_spinup_trampoline +ffffffff827bc0b6 R cpu_spinup_trampoline_end +ffffffff827bc0b6 R mp_tramp_data_start +ffffffff827bc0fc R mp_tramp_data_end +ffffffff827be000 R db_acpi_cmds +ffffffff827be0a0 R db_machine_command_table +ffffffff827bf000 r i8254_delay.delaytab +ffffffff827c0000 R rasops_cmap +ffffffff827c1000 r reverse +ffffffff827c1100 r ibm437_level1 +ffffffff827c1230 r ibm437_level2_0 +ffffffff827c1248 r ibm437_level2_1 +ffffffff827c1260 r ibm437_level2_3 +ffffffff827c1278 r ibm437_level2_32 +ffffffff827c1290 r ibm437_level2_34 +ffffffff827c12a8 r ibm437_level2_35 +ffffffff827c12c0 r ibm437_level2_37 +ffffffff827c12e0 r ibm437_chars_0 +ffffffff827c13e0 r ibm437_chars_1 +ffffffff827c13f0 r ibm437_chars_3 +ffffffff827c1430 r ibm437_chars_32 +ffffffff827c1460 r ibm437_chars_34 +ffffffff827c14d0 r ibm437_chars_35 +ffffffff827c14f0 r ibm437_chars_37 +ffffffff827c2000 R mii_media_table +ffffffff827c3000 R nsphy_ca +ffffffff827c3028 R nsphy_funcs +ffffffff827c3040 r nsphys +ffffffff827c4000 R nsphyter_ca +ffffffff827c4028 R nsphyter_funcs +ffffffff827c4040 r nsphyterphys +ffffffff827c5000 R gentbi_ca +ffffffff827c5028 R gentbi_funcs +ffffffff827c6000 R qsphy_ca +ffffffff827c6028 R qsphy_funcs +ffffffff827c6040 r qsphys +ffffffff827c7000 R inphy_ca +ffffffff827c7028 R inphy_funcs +ffffffff827c7040 r inphys +ffffffff827c8000 R iophy_ca +ffffffff827c8028 R iophy_funcs +ffffffff827c8040 r iophys +ffffffff827c9000 R eephy_ca +ffffffff827c9028 R eephy_funcs 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R hds_ca +ffffffff827f0028 R hds_mpath_ops +ffffffff827f1000 R atapiscsi_ca +ffffffff827f1028 r atapiscsi_switch +ffffffff827f2000 R wd_ca +ffffffff827f3000 R atascsi_switch +ffffffff827f4000 R mainbus_ca +ffffffff827f5000 R bios_ca +ffffffff827f6000 R mpbios_ca +ffffffff827f6030 r loc_where +ffffffff827f7000 R mpbios_icu_table +ffffffff827f8000 R cpu_ca +ffffffff827f9000 R lapic_timer_intrclock +ffffffff827fa000 R ioapic_ca +ffffffff827fb000 R efifb_ca +ffffffff827fb028 R efifb_screen_list +ffffffff827fc000 R pvbus_ca +ffffffff827fd000 R pvclock_ca +ffffffff827fe000 R vmt_ca +ffffffff827ff000 R xen_ca +ffffffff82800000 R xs_errors +ffffffff82801000 R xnf_ca +ffffffff82802000 R xbf_ca +ffffffff82802028 R xbf_switch +ffffffff82803000 R hyperv_ca +ffffffff82803028 R hv_guid_network +ffffffff82803038 R hv_guid_ide +ffffffff82803048 R hv_guid_scsi +ffffffff82803058 R hv_guid_shutdown +ffffffff82803068 R hv_guid_timesync +ffffffff82803078 R hv_guid_heartbeat +ffffffff82803088 R hv_guid_kvp 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pci_subclass_input +ffffffff82810770 R pci_subclass_dock +ffffffff828107c0 R pci_subclass_processor +ffffffff82810880 R pci_subclass_serialbus +ffffffff82810990 R pci_subclass_wireless +ffffffff82810a70 R pci_subclass_i2o +ffffffff82810aa0 R pci_subclass_satcom +ffffffff82810b20 R pci_subclass_crypto +ffffffff82810b80 R pci_subclass_dasp +ffffffff82810c10 R pci_class +ffffffff82810e20 r pci_known_vendors +ffffffff828123c0 r pci_known_products +ffffffff82835000 R vga_pci_ca +ffffffff82835030 r vga_devs +ffffffff82836000 R ahc_pci_ident_table +ffffffff828365d0 R ahc_pci_ca +ffffffff82837000 R ahd_pci_ident_table +ffffffff82837198 R ahd_num_pci_devs +ffffffff828371a0 R ahd_pci_ca +ffffffff828371d0 r pci_bus_modes +ffffffff82837210 r pci_status_strings +ffffffff82837250 r pci_status_source +ffffffff82837290 r split_status_strings +ffffffff82838000 R adw_pci_ca +ffffffff82838028 R adw_pci_devices +ffffffff82839000 r adw_3550_Default_EEPROM +ffffffff82839080 r adw_38C0800_Default_EEPROM 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mfii_ca +ffffffff82846028 R mfii_switch +ffffffff82846050 R mfii_pd_switch +ffffffff82846078 R mfii_iop_thunderbolt +ffffffff82846088 R mfii_iop_25 +ffffffff82846098 R mfii_iop_35 +ffffffff828460b0 R mfii_devices +ffffffff82846140 r mfi_bbu_indicators +ffffffff82847000 R ips_ca +ffffffff82847028 r ips_ids +ffffffff82847040 r ips_chips +ffffffff82847090 r ips_names +ffffffff82847128 r ips_switch +ffffffff82847150 r ips_pt_switch +ffffffff82848000 R eap_ca +ffffffff82848028 R eap1370_hw_if +ffffffff828480e0 R eap1371_hw_if +ffffffff82848198 R eap_midi_hw_if +ffffffff828481d0 R eap_devices +ffffffff82849000 R auacer_pci_devices +ffffffff82849008 R auacer_ca +ffffffff82849030 R auacer_hw_if +ffffffff8284a000 R auich_ca +ffffffff8284a028 R auich_hw_if +ffffffff8284a0e0 r auich_devices +ffffffff8284b000 R azalia_ca +ffffffff8284b028 R azalia_hw_if +ffffffff8284b0e0 R azalia_pci_devices +ffffffff8284b110 r pin_devices +ffffffff8284b190 r line_colors +ffffffff8284b210 r wtypes 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auvia_devices +ffffffff828520f0 r auvia_set_params_sub.slottab +ffffffff82853000 R gdt_pci_ca +ffffffff82854000 R ciss_pci_ca +ffffffff82854030 R ciss_pci_devices +ffffffff82855000 R qlw_pci_ca +ffffffff82855030 r qlw_devices +ffffffff82855050 r isp_1040_risc_code +ffffffff8285a9f0 r isp_1080_risc_code +ffffffff82862470 r isp_12160_risc_code +ffffffff8286a000 R qla_pci_ca +ffffffff8286a030 r qla_devices +ffffffff8286b000 R qle_ca +ffffffff8286b028 R qle_switch +ffffffff8286b050 r qle_devices +ffffffff8286b070 r isp_2400_risc_code +ffffffff8289aa50 r isp_2500_risc_code +ffffffff828cd000 R mpi_pci_ca +ffffffff828cd030 r mpi_devices +ffffffff828ce000 R mpii_ca +ffffffff828ce028 R mpii_switch +ffffffff828ce050 r mpii_devices +ffffffff828cf000 R sili_pci_ca +ffffffff828cf030 r sili_devices +ffffffff828d0000 R aq_devices +ffffffff828d0060 R aq_products +ffffffff828d01d0 R aq_fw1x_ops +ffffffff828d01f8 R aq_fw2x_ops +ffffffff828d0220 R aq2_fw_ops +ffffffff828d0248 R aq_ca +ffffffff828d1000 R de_ca +ffffffff828d1030 r tulip_srom_conninfo +ffffffff828d1120 r tulip_mii_phy_attrlist +ffffffff828d11e0 r tulip_21140_znyx_zx34x_boardsw +ffffffff828d1208 r tulip_21040_10baset_only_boardsw +ffffffff828d1230 r tulip_21040_boardsw +ffffffff828d1258 r tulip_2114x_isv_boardsw +ffffffff828d1280 r tulip_21140_smc9332_boardsw +ffffffff828d12a8 r tulip_21040_auibnc_only_boardsw +ffffffff828d12d0 r tulip_21140_cogent_em100_boardsw +ffffffff828d12f8 r tulip_21140_accton_boardsw +ffffffff828d1320 r tulip_21140_eb_boardsw +ffffffff828d1348 r tulip_21041_boardsw +ffffffff828d1370 r tulip_srom_mediums +ffffffff828d13c0 r tulip_read_macaddr.testpat +ffffffff828d13d0 r tulip_vendors +ffffffff828d1480 r tulip_media_to_ifmedia +ffffffff828d14e0 r tulip_chipdescs +ffffffff828d2000 R ep_pci_ca +ffffffff828d2030 R ep_pci_devices +ffffffff828d3000 R pcn_ca +ffffffff828d3028 R pcn_devices +ffffffff828d3030 r pcn_79c970_rcvfw +ffffffff828d3050 r pcn_79c970_xmtsp +ffffffff828d3070 r pcn_79c970_xmtfw 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pciide_ite_products +ffffffff828d6ea0 R pciide_ati_products +ffffffff828d6f20 R pciide_jmicron_products +ffffffff828d6f70 R pciide_phison_products +ffffffff828d6f80 R pciide_rdc_products +ffffffff828d6f90 R pciide_vendors +ffffffff828d7140 R pciide_pci_ca +ffffffff828d7168 R pciide_jmb_ca +ffffffff828d7190 r piix_isp_dma +ffffffff828d7193 r piix_rtc_dma +ffffffff828d7196 r apollo_pio_set +ffffffff828d719b r cmd0643_9_data_tim_pio +ffffffff828d71a0 r cmd0643_9_data_tim_dma +ffffffff828d71a3 r cmd680_channel_map.init_val +ffffffff828d71b1 r cmd680_setup_channel.udma2_tbl +ffffffff828d71b8 r cmd680_setup_channel.dma_tbl +ffffffff828d71be r cmd680_setup_channel.pio_tbl +ffffffff828d71d0 r satalink_ba5_regmap +ffffffff828d7690 r sii3114_chansetup.channel_names +ffffffff828d76b0 r cy_pio_pulse +ffffffff828d76c0 r sis_udma133new_tim +ffffffff828d76e0 r sis_pio133new_tim +ffffffff828d76f4 r sis_dma133new_tim +ffffffff828d7700 r sis_udma66_tim +ffffffff828d7706 r sis_udma100new_tim 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jpnbcst +ffffffff828e1460 r jpncable +ffffffff828e14c0 r xussr +ffffffff828e1530 r australia +ffffffff828e1590 r france +ffffffff828e2000 R xl_pci_ca +ffffffff828e2030 R xl_pci_devices +ffffffff828e3000 R fxp_pci_ca +ffffffff828e3030 R fxp_pci_devices +ffffffff828e4000 R em_devices +ffffffff828e42e0 R em_ca +ffffffff828e4310 r em_counters +ffffffff828e5000 r em_igp_cable_length_table +ffffffff828e5100 r em_igp_2_cable_length_table +ffffffff828e6000 R ixgb_devices +ffffffff828e6010 R ixgb_ca +ffffffff828e7000 R ixgbe_devices +ffffffff828e70b8 R ix_ca +ffffffff828e70e0 r ix_counters +ffffffff828e73e0 r ix_rxq_kstats_tpl +ffffffff828e7458 r ix_txq_kstats_tpl +ffffffff828e8000 r ixgbe_mvals_base +ffffffff828e8060 r ixgbe_mvals_X540 +ffffffff828e80c0 r ixgbe_mvals_X550 +ffffffff828e8120 r ixgbe_mvals_X550EM_x +ffffffff828e8180 r ixgbe_mvals_X550EM_a +ffffffff828eb000 R ixl_ca +ffffffff828eb030 R ixl_port_counters +ffffffff828eb2c0 R ixl_vsi_counters +ffffffff828eb380 r ixl_devices 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gem_pci_ca +ffffffff828f4030 R gem_pci_devices +ffffffff828f4050 r gem_promhdr +ffffffff828f4052 r gem_promdat +ffffffff828f405a r gem_promdat2 +ffffffff828f5000 R cas_ca +ffffffff828f5028 R cas_pci_devices +ffffffff828f5030 r cas_promhdr +ffffffff828f5032 r cas_promdat_sun +ffffffff828f503a r cas_promdat_ns +ffffffff828f5042 r cas_promdat2 +ffffffff828f6000 R sf_pci_ca +ffffffff828f6028 R sf_pci_products +ffffffff828f7000 R sis_ca +ffffffff828f7028 R sis_devices +ffffffff828f8000 R se_devices +ffffffff828f8008 R se_ca +ffffffff828f9000 R uhci_pci_ca +ffffffff828fa000 R ohci_pci_ca +ffffffff828fb000 R ehci_pci_ca +ffffffff828fc000 R xhci_pci_ca +ffffffff828fd000 R cbb_pci_ca +ffffffff828fd028 r pccbb_pcmcia_do_io_map.pcic_iowidth +ffffffff828fe000 R skc_devices +ffffffff828fe030 R skc_ca +ffffffff828fe058 R sk_ca +ffffffff828ff000 R mskc_devices +ffffffff828ff0a8 R mskc_ca +ffffffff828ff0d0 R msk_ca +ffffffff828ff100 r msk_mib +ffffffff82900000 R puc_pci_ca +ffffffff82901000 R puc_devs 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+ffffffff8290e080 R iwx_ax201_cfg_qu_hr +ffffffff8290e0a0 R iwx_qu_c0_hr1_b0 +ffffffff8290e0c0 R iwx_qu_c0_hr_b0 +ffffffff8290e0e0 R iwx_ax201_cfg_qu_c0_hr_b0 +ffffffff8290e100 R iwx_quz_a0_hr1_b0 +ffffffff8290e120 R iwx_ax201_cfg_quz_hr +ffffffff8290e140 R iwx_cfg_so_a0_hr_b0 +ffffffff8290e160 R iwx_cfg_quz_a0_hr_b0 +ffffffff8290e180 R iwx_2ax_cfg_so_gf_a0 +ffffffff8290e1a0 R iwx_2ax_cfg_so_gf_a0_long +ffffffff8290e1c0 R iwx_2ax_cfg_so_gf4_a0 +ffffffff8290e1e0 R iwx_2ax_cfg_so_gf4_a0_long +ffffffff8290e200 R iwx_2ax_cfg_ty_gf_a0 +ffffffff8290e220 R iwx_2ax_cfg_so_jf_b0 +ffffffff8290e240 R iwx_nvm_channels_8000 +ffffffff8290e280 R iwx_rates +ffffffff8290e2e0 R iwx_mcs2ridx +ffffffff8290e320 R iwx_tid_to_ac +ffffffff8290e328 R iwx_ac_to_tx_fifo +ffffffff8290e330 r iwx_nvm_channels_uhb +ffffffff8290e39e r iwx_is_valid_mac_addr.reserved_mac +ffffffff8290e3b0 r iwx_sf_full_timeout +ffffffff8290e3e0 r iwx_sf_full_timeout_def +ffffffff8290e410 r advanced_lookup +ffffffff8290e550 r iwx_devices +ffffffff8290e590 r iwx_dev_info_table +ffffffff8290ede8 R iwx_ca +ffffffff8290f000 R cmpci_ca +ffffffff8290f028 R cmpci_hw_if +ffffffff8290f0e0 r cmpci_rate_table +ffffffff8290f120 R cmpci_devices +ffffffff8290f130 r cmpci_query_devinfo.mixer_port_names +ffffffff8290f160 r cmpci_query_devinfo.mixer_classes +ffffffff82910000 R iha_pci_ca +ffffffff82910028 R iha_switch +ffffffff82911000 R pcscp_ca +ffffffff82912000 R bge_ca +ffffffff82912030 R bge_devices +ffffffff829121b0 r bge_revisions +ffffffff82912610 r bge_majorrevs +ffffffff82913000 R bnx_devices +ffffffff82913020 R bnx_ca +ffffffff82914000 R vge_ca +ffffffff82914028 R vge_devices +ffffffff82915000 R stge_ca +ffffffff82915028 R stge_mii_bitbang_ops +ffffffff82915050 R stge_devices +ffffffff82916000 R nfe_ca +ffffffff82916030 R nfe_devices +ffffffff82917000 R et_devices +ffffffff82917008 R et_ca +ffffffff82918000 R jme_devices +ffffffff82918008 R jme_ca +ffffffff82919000 R age_devices +ffffffff82919008 R age_ca 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+ffffffff8292f030 R viapm_ids +ffffffff8292f070 r val_to_temp +ffffffff8292f870 r val_to_uV.mult +ffffffff82930000 R amdiic_ca +ffffffff82930028 R amdiic_ids +ffffffff82931000 R nviic_ca +ffffffff82931030 R nviic_ids +ffffffff82932000 R sdhc_pci_ca +ffffffff82933000 R kate_ca +ffffffff82933030 r kate_proc +ffffffff82934000 R km_ca +ffffffff82934030 r km_devices +ffffffff82935000 R ksmn_ca +ffffffff82935030 r ksmn_devices +ffffffff82936000 R iosf_pci_ca +ffffffff82937000 R itherm_devices +ffffffff82937008 R itherm_ca +ffffffff82938000 R pchtemp_ca +ffffffff82938030 R pchtemp_devices +ffffffff82939000 R rtsx_pci_ca +ffffffff8293a000 R xspd_ca +ffffffff8293a028 R xspd_devices +ffffffff8293b000 R virtio_pci_ca +ffffffff8293c000 R dwiic_pci_ca +ffffffff8293c030 R dwiic_pci_ids +ffffffff8293d000 R bwfm_pci_ca +ffffffff8293d030 r bwfm_pci_devices +ffffffff8293e000 R ccp_pci_ca +ffffffff8293e030 r ccp_pci_devices +ffffffff8293f000 R bnxt_devices +ffffffff8293f040 R bnxt_ca +ffffffff82940000 R mcx_ca +ffffffff82940030 r mcx_devices +ffffffff82940060 r mcx_rss_config +ffffffff829400d0 r mcx_eth_cap_map +ffffffff829402d0 r mcx_kstat_ppcnt_ieee8023 +ffffffff829402e8 r mcx_kstat_ppcnt_rfc2863 +ffffffff82940300 r mcx_kstat_ppcnt_rfc2819 +ffffffff82940318 r mcx_kstat_ppcnt_rfc3635 +ffffffff82940330 r mcx_ppcnt_ieee8023_tpl +ffffffff829404b0 r mcx_ppcnt_rfc2863_tpl +ffffffff829405c0 r mcx_ppcnt_rfc2819_tpl +ffffffff82940770 r mcx_ppcnt_rfc3635_tpl +ffffffff829408b0 r mcx_kstat_mtmp_tpl +ffffffff82940950 r mcx_kstat_mtmp_rate +ffffffff82940960 r mcx_queue_kstat_tpl +ffffffff82941000 R iavf_ca +ffffffff82941030 r iavf_devices +ffffffff82941040 r iavf_aq_regs +ffffffff829410b0 r iavf_link_speeds +ffffffff82942000 R rge_ca +ffffffff82942028 R rge_devices +ffffffff82942030 r rtl8125_mac_cfg2_ephy +ffffffff82942090 r rge_phy_config_mac_cfg3.mac_cfg3_a438_value +ffffffff829420b0 r rge_phy_config_mac_cfg3.mac_cfg3_b88e_value +ffffffff82942110 r rge_phy_config_mac_cfg4.mac_cfg4_b87c_value +ffffffff82942170 r rtl8125_mac_cfg4_ephy +ffffffff829421e0 r rtl8125_mac_cfg2_mcu +ffffffff82942e80 r rtl8125_mac_cfg3_mcu +ffffffff82943720 r rtl8125_mac_cfg4_mcu +ffffffff82945d10 r rtl8125_mac_cfg5_mcu +ffffffff82946c10 r rtl8125_mac_bps +ffffffff82946f80 r rtl8125b_mac_bps +ffffffff82947120 r rge_kstats_tpl +ffffffff82948000 R igc_devices +ffffffff82948040 R igc_ca +ffffffff82949000 R ngbe_devices +ffffffff82949008 R ngbe_ca +ffffffff8294a000 R com_pci_ca +ffffffff8294a030 R com_pci_ids +ffffffff8294b000 r agp_attach.agp_max +ffffffff8294b048 R agp_ca +ffffffff8294c000 R intagp_ca +ffffffff8294d000 r drm_plane_create_rotation_property.props +ffffffff8294e000 r drm_bridge_priv_state_funcs +ffffffff82950000 r color_encoding_name +ffffffff82950020 r color_range_name +ffffffff82951000 r drm_subpixel_enum_list +ffffffff82951060 r drm_dpms_enum_list +ffffffff829510a0 r drm_dvi_i_select_enum_list +ffffffff829510d0 r drm_dvi_i_subconnector_enum_list +ffffffff82951100 r drm_tv_select_enum_list +ffffffff82951150 r drm_tv_subconnector_enum_list +ffffffff829511a0 r drm_dp_subconnector_enum_list +ffffffff82951210 r drm_link_status_enum_list +ffffffff82951230 r drm_scaling_mode_enum_list +ffffffff82951270 r drm_aspect_ratio_enum_list +ffffffff829512a0 r hdmi_colorspaces +ffffffff82951370 r dp_colorspaces +ffffffff82951450 r drm_content_type_enum_list +ffffffff829514a0 r drm_panel_orientation_enum_list +ffffffff829514e0 r privacy_screen_enum +ffffffff82952000 r drm_crtc_fence_ops +ffffffff82953000 r drm_dmt_modes +ffffffff82955940 r edid_cea_modes_1 +ffffffff829594d0 r edid_cea_modes_193 +ffffffff8295a180 r edid_quirk_list +ffffffff8295a350 r edid_4k_modes +ffffffff8295a5b0 r edid_est_modes +ffffffff8295adb0 r est3_modes +ffffffff8295af10 r stereo_mandatory_modes +ffffffff8295af90 r extra_modes +ffffffff8295b000 r drm_encoder_enum_list +ffffffff8295c000 r drm_fbdev_client_funcs +ffffffff8295c020 r drm_fb_helper_generic_funcs +ffffffff8295c028 r drm_fbdev_fb_ops +ffffffff8295d000 r drm_fb_xrgb8888_to_rgb332.dst_pixsize +ffffffff8295d004 r drm_fb_xrgb8888_to_rgb565.dst_pixsize +ffffffff8295d008 r drm_fb_xrgb8888_to_rgb888.dst_pixsize +ffffffff8295d00c r drm_fb_xrgb8888_to_xrgb2101010.dst_pixsize +ffffffff8295d010 r drm_fb_xrgb8888_to_gray8.dst_pixsize +ffffffff8295d014 r drm_fb_rgb888_to_xrgb8888.dst_pixsize +ffffffff8295d018 r drm_fb_rgb565_to_xrgb8888.dst_pixsize +ffffffff8295e000 r __drm_format_info.formats +ffffffff8295f000 R drm_pgops +ffffffff82960000 r drm_ioctls +ffffffff82962000 r dma_fence_stub_ops +ffffffff82962038 R dma_fence_array_ops +ffffffff82962070 R dma_fence_chain_ops +ffffffff829620a8 R dmabufops +ffffffff829620e0 R syncfileops +ffffffff82963000 r drm_plane_type_enum_list +ffffffff82964000 r drm_mode_status_names +ffffffff82965000 r primary_plane_funcs +ffffffff82965068 r safe_modeset_formats +ffffffff82966000 r orientation_data +ffffffff829695c0 r lcd800x1280_rightside_up +ffffffff829695d8 r lcd720x1280_rightside_up +ffffffff829695f0 r lcd800x1280_leftside_up +ffffffff82969608 r lcd1080x1920_leftside_up +ffffffff82969620 r lcd1200x1920_rightside_up +ffffffff82969638 r gpd_micropc +ffffffff82969650 r gpd_pocket +ffffffff82969668 r gpd_pocket2 +ffffffff82969680 r gpd_win +ffffffff82969698 r gpd_win2 +ffffffff829696b0 r itworks_tw891 +ffffffff829696c8 r lcd1600x2560_rightside_up +ffffffff829696e0 r onegx1_pro +ffffffff829696f8 r lcd1600x2560_leftside_up +ffffffff82969710 r lcd1280x1920_rightside_up +ffffffff82969728 r .compoundliteral +ffffffff82969738 r .compoundliteral.5 +ffffffff82969760 r .compoundliteral.9 +ffffffff82969780 r .compoundliteral.17 +ffffffff829697c0 r .compoundliteral.21 +ffffffff829697e0 r .compoundliteral.23 +ffffffff829697f0 r .compoundliteral.25 +ffffffff8296a000 r drm_gem_prime_dmabuf_ops +ffffffff8296c000 r is_hdmi_adaptor.dp_dual_mode_hdmi_id +ffffffff8296d000 r drm_dp_phy_name.phy_names +ffffffff8296d048 r drm_dp_i2c_algo +ffffffff8296d058 r drm_dp_i2c_lock_ops +ffffffff8296d070 r dp_aux_bl_ops +ffffffff8296d090 r dpcd_quirk_list +ffffffff8296d320 r drm_dp_psr_setup_time.psr_setup_time_us +ffffffff8296e000 R drm_dp_mst_topology_state_funcs +ffffffff8296e020 r drm_dp_mst_req_type_str.req_type_str +ffffffff8296e1f0 r drm_dp_mst_sideband_tx_state_str.sideband_reason_str +ffffffff8296e220 r drm_dp_mst_nak_reason_str.nak_reason_str +ffffffff8296e278 r drm_dp_mst_i2c_algo +ffffffff8296f000 r hdmi_colorimetry_val +ffffffff82970000 r ttm_bo_init_reserved.sys_mem +ffffffff82971000 r ttm_bo_pipeline_gutting.sys_mem +ffffffff82972018 R ttm_bo_vm_ops +ffffffff82973000 r ttm_range_manager_func +ffffffff82974018 r ttm_kmap_iter_io_ops +ffffffff82974030 r ttm_kmap_iter_linear_io_ops +ffffffff82975000 r ttm_sys_manager_func +ffffffff82976000 r ttm_kmap_iter_tt_ops +ffffffff82977000 r drm_sched_fence_ops_scheduled +ffffffff82977038 r drm_sched_fence_ops_finished +ffffffff82978000 R ch7017_ops +ffffffff82979000 R ch7xxx_ops +ffffffff82979060 r ch7xxx_ids +ffffffff8297a000 R ivch_ops +ffffffff8297a060 r backup_addresses +ffffffff8297b000 R ns2501_ops +ffffffff8297b060 r mode_agnostic_values +ffffffff8297b0e0 r ns2501_modes +ffffffff8297c000 R sil164_ops +ffffffff8297d000 R tfp410_ops +ffffffff8297e000 r chv_dpll +ffffffff8297e050 r vlv_dpll +ffffffff8297e0a0 r g4x_dpll +ffffffff8297e0f0 r pch_dpll +ffffffff8297e138 r intel_dp_enc_funcs +ffffffff8297f000 r intel_hdmi_enc_funcs +ffffffff82980000 r vlv_primary_formats +ffffffff82980030 r ivb_primary_formats +ffffffff82980050 r i965_primary_formats +ffffffff82980070 r i8xx_primary_formats +ffffffff82980080 r i965_plane_funcs +ffffffff829800e8 r i8xx_plane_funcs +ffffffff82981000 r gen11_dsi_encoder_funcs +ffffffff82981020 r gen11_dsi_connector_funcs +ffffffff82981098 r gen11_dsi_connector_helper_funcs +ffffffff829810e8 r gen11_dsi_host_ops +ffffffff82982000 r intel_plane_helper_funcs +ffffffff82983000 r g4x_audio_funcs +ffffffff82983010 r ilk_audio_funcs +ffffffff82983020 r hsw_audio_funcs +ffffffff82983030 r hdmi_audio_clock +ffffffff829830a0 r dp_aud_n_m +ffffffff82983250 r hdmi_aud_ncts_36bpp +ffffffff82983330 r hdmi_aud_ncts_30bpp +ffffffff82983410 r hdmi_aud_ncts_24bpp +ffffffff82984000 r intel_backlight_device_ops +ffffffff82984018 r bxt_pwm_funcs +ffffffff82984048 r cnp_pwm_funcs +ffffffff82984078 r lpt_pwm_funcs +ffffffff829840a8 r spt_pwm_funcs +ffffffff829840d8 r pch_pwm_funcs +ffffffff82984108 r ext_pwm_funcs +ffffffff82984138 r vlv_pwm_funcs +ffffffff82984168 r i965_pwm_funcs +ffffffff82984198 r i9xx_pwm_funcs +ffffffff829841c8 r pwm_bl_funcs +ffffffff82985000 r bdb_blocks +ffffffff82985160 r translate_iboost.mapping +ffffffff82985163 r adlp_ddc_pin_map +ffffffff8298516a r adls_ddc_pin_map +ffffffff82985170 r rkl_pch_tgp_ddc_pin_map +ffffffff82985175 r icp_ddc_pin_map +ffffffff8298517f r cnp_ddc_pin_map +ffffffff82986000 r mtl_sa_info +ffffffff82986006 r adlp_sa_info +ffffffff8298600c r adls_sa_info +ffffffff82986012 r rkl_sa_info +ffffffff82986018 r tgl_sa_info +ffffffff82986020 r intel_bw_funcs +ffffffff82987000 r intel_cdclk_funcs +ffffffff82987010 r dg2_cdclk_table +ffffffff829870c0 r adlp_a_step_cdclk_table +ffffffff82987140 r adlp_cdclk_table +ffffffff82987200 r rkl_cdclk_table +ffffffff829872f0 r icl_cdclk_table +ffffffff829873e0 r glk_cdclk_table +ffffffff82987410 r bxt_cdclk_table +ffffffff82987458 r tgl_cdclk_funcs +ffffffff82987478 r ehl_cdclk_funcs +ffffffff82987498 r icl_cdclk_funcs +ffffffff829874b8 r bxt_cdclk_funcs +ffffffff829874d8 r skl_cdclk_funcs +ffffffff829874f8 r bdw_cdclk_funcs +ffffffff82987518 r hsw_cdclk_funcs +ffffffff82987538 r chv_cdclk_funcs +ffffffff82987558 r vlv_cdclk_funcs +ffffffff82987578 r fixed_400mhz_cdclk_funcs +ffffffff82987598 r ilk_cdclk_funcs +ffffffff829875b8 r gm45_cdclk_funcs +ffffffff829875d8 r g33_cdclk_funcs +ffffffff829875f8 r g33_get_cdclk.div_3200 +ffffffff829875fe r g33_get_cdclk.div_4000 +ffffffff82987604 r g33_get_cdclk.div_4800 +ffffffff8298760a r g33_get_cdclk.div_5333 +ffffffff82987610 r i965gm_cdclk_funcs +ffffffff82987630 r i965gm_get_cdclk.div_3200 +ffffffff82987633 r i965gm_get_cdclk.div_4000 +ffffffff82987636 r i965gm_get_cdclk.div_5333 +ffffffff82987640 r pnv_cdclk_funcs +ffffffff82987660 r i945gm_cdclk_funcs +ffffffff82987680 r i915gm_cdclk_funcs +ffffffff829876a0 r i915g_cdclk_funcs +ffffffff829876c0 r i865g_cdclk_funcs +ffffffff829876e0 r i85x_cdclk_funcs +ffffffff82987700 r i845g_cdclk_funcs +ffffffff82987720 r i830_cdclk_funcs +ffffffff82988000 r chv_color_funcs +ffffffff82988028 r i965_color_funcs +ffffffff82988050 r i9xx_color_funcs +ffffffff82988078 r icl_color_funcs +ffffffff829880a0 r glk_color_funcs +ffffffff829880c8 r skl_color_funcs +ffffffff829880f0 r bdw_color_funcs +ffffffff82988118 r hsw_color_funcs +ffffffff82988140 r ivb_color_funcs +ffffffff82988168 r ilk_color_funcs +ffffffff82988190 r ilk_csc_off_zero +ffffffff829881a0 r ilk_csc_coeff_rgb_to_ycbcr +ffffffff829881b2 r ilk_csc_postoff_rgb_to_ycbcr +ffffffff829881c0 r ilk_csc_coeff_limited_range +ffffffff829881d2 r ilk_csc_postoff_limited_range +ffffffff829881e0 r ilk_csc_coeff_identity +ffffffff82989000 r icl_procmon_values +ffffffff8298a000 r force_audio_names +ffffffff8298a040 r broadcast_rgb_names +ffffffff8298b000 r intel_crt_connector_funcs +ffffffff8298b078 r intel_crt_enc_funcs +ffffffff8298b098 r intel_crt_connector_helper_funcs +ffffffff8298b0f0 r intel_spurious_crt_detect +ffffffff8298c000 r g4x_crtc_funcs +ffffffff8298c0c0 r i965_crtc_funcs +ffffffff8298c180 r i915gm_crtc_funcs +ffffffff8298c240 r i915_crtc_funcs +ffffffff8298c300 r i8xx_crtc_funcs +ffffffff8298c3c0 r bdw_crtc_funcs +ffffffff8298c480 r ilk_crtc_funcs +ffffffff8298d000 r output_type_str +ffffffff8298d060 r output_format_str +ffffffff8298e000 r intel_cursor_plane_funcs +ffffffff8298e068 r intel_cursor_formats +ffffffff8298f000 r intel_ddi_funcs +ffffffff8298f020 r index_to_dp_signal_levels +ffffffff8298f030 r gen9_chicken_trans_reg_by_port.trans +ffffffff82990000 r tgl_combo_phy_trans_edp_hbr2_hobl +ffffffff82990010 r _tgl_combo_phy_trans_edp_hbr2_hobl +ffffffff82990080 r dg2_snps_trans_uhbr +ffffffff82990090 r dg2_snps_trans +ffffffff829900a0 r _dg2_snps_trans_uhbr +ffffffff82990160 r _dg2_snps_trans +ffffffff829901d8 r icl_combo_phy_trans_hdmi +ffffffff829901f0 r _icl_combo_phy_trans_hdmi +ffffffff82990248 r adlp_combo_phy_trans_edp_hbr3 +ffffffff82990258 r adlp_combo_phy_trans_edp_up_to_hbr2 +ffffffff82990270 r _adlp_combo_phy_trans_dp_hbr2_edp_hbr3 +ffffffff829902f0 r _adlp_combo_phy_trans_edp_hbr2 +ffffffff82990368 r adlp_combo_phy_trans_dp_hbr2_hbr3 +ffffffff82990378 r adlp_combo_phy_trans_dp_hbr +ffffffff82990390 r _adlp_combo_phy_trans_dp_hbr2_hbr3 +ffffffff82990410 r _adlp_combo_phy_trans_dp_hbr +ffffffff82990488 r tgl_dkl_phy_trans_hdmi +ffffffff829904a0 r _tgl_dkl_phy_trans_hdmi +ffffffff82990518 r adlp_dkl_phy_trans_dp_hbr2_hbr3 +ffffffff82990528 r adlp_dkl_phy_trans_dp_hbr +ffffffff82990540 r _adlp_dkl_phy_trans_dp_hbr2_hbr3 +ffffffff829905c0 r _adlp_dkl_phy_trans_dp_hbr +ffffffff82990638 r adls_combo_phy_trans_edp_hbr3 +ffffffff82990648 r adls_combo_phy_trans_edp_hbr2 +ffffffff82990660 r _adls_combo_phy_trans_edp_hbr3 +ffffffff829906e0 r _adls_combo_phy_trans_edp_hbr2 +ffffffff82990758 r adls_combo_phy_trans_dp_hbr2_hbr3 +ffffffff82990768 r tgl_combo_phy_trans_dp_hbr +ffffffff82990780 r _adls_combo_phy_trans_dp_hbr2_hbr3 +ffffffff82990800 r _tgl_combo_phy_trans_dp_hbr +ffffffff82990878 r icl_combo_phy_trans_dp_hbr2_edp_hbr3 +ffffffff82990888 r icl_combo_phy_trans_edp_hbr2 +ffffffff829908a0 r _icl_combo_phy_trans_dp_hbr2_edp_hbr3 +ffffffff82990920 r _icl_combo_phy_trans_edp_hbr2 +ffffffff82990998 r rkl_combo_phy_trans_dp_hbr2_hbr3 +ffffffff829909a8 r rkl_combo_phy_trans_dp_hbr +ffffffff829909c0 r _rkl_combo_phy_trans_dp_hbr2_hbr3 +ffffffff82990a40 r _rkl_combo_phy_trans_dp_hbr +ffffffff82990ab8 r dg1_combo_phy_trans_dp_hbr2_hbr3 +ffffffff82990ac8 r dg1_combo_phy_trans_dp_rbr_hbr +ffffffff82990ae0 r _dg1_combo_phy_trans_dp_hbr2_hbr3 +ffffffff82990b60 r _dg1_combo_phy_trans_dp_rbr_hbr +ffffffff82990bd8 r tgl_uy_combo_phy_trans_dp_hbr2 +ffffffff82990be8 r tgl_combo_phy_trans_dp_hbr2 +ffffffff82990c00 r _tgl_uy_combo_phy_trans_dp_hbr2 +ffffffff82990c80 r _tgl_combo_phy_trans_dp_hbr2 +ffffffff82990cf8 r tgl_dkl_phy_trans_dp_hbr2 +ffffffff82990d08 r tgl_dkl_phy_trans_dp_hbr +ffffffff82990d20 r _tgl_dkl_phy_trans_dp_hbr2 +ffffffff82990da0 r _tgl_dkl_phy_trans_dp_hbr +ffffffff82990e18 r jsl_combo_phy_trans_edp_hbr2 +ffffffff82990e28 r jsl_combo_phy_trans_edp_hbr +ffffffff82990e40 r _jsl_combo_phy_trans_edp_hbr2 +ffffffff82990ec0 r _jsl_combo_phy_trans_edp_hbr +ffffffff82990f38 r ehl_combo_phy_trans_dp +ffffffff82990f48 r ehl_combo_phy_trans_edp_hbr2 +ffffffff82990f60 r _ehl_combo_phy_trans_edp_hbr2 +ffffffff82990fe0 r _ehl_combo_phy_trans_dp +ffffffff82991058 r icl_mg_phy_trans_hdmi +ffffffff82991070 r _icl_mg_phy_trans_hdmi +ffffffff829910e8 r icl_mg_phy_trans_hbr2_hbr3 +ffffffff829910f8 r icl_mg_phy_trans_rbr_hbr +ffffffff82991110 r _icl_mg_phy_trans_hbr2_hbr3 +ffffffff82991190 r _icl_mg_phy_trans_rbr_hbr +ffffffff82991208 r bxt_trans_hdmi +ffffffff82991218 r bxt_trans_edp +ffffffff82991228 r bxt_trans_dp +ffffffff82991240 r _bxt_trans_hdmi +ffffffff829912c0 r _bxt_trans_edp +ffffffff82991340 r _bxt_trans_dp +ffffffff829913b8 r skl_y_trans_hdmi +ffffffff829913c8 r skl_y_trans_edp +ffffffff829913d8 r kbl_y_trans_dp +ffffffff829913f0 r _skl_y_trans_hdmi +ffffffff82991480 r _skl_y_trans_edp +ffffffff82991500 r _kbl_y_trans_dp +ffffffff82991570 r skl_trans_hdmi +ffffffff82991580 r skl_u_trans_edp +ffffffff82991590 r kbl_u_trans_dp +ffffffff829915a0 r _skl_trans_hdmi +ffffffff82991630 r _skl_u_trans_edp +ffffffff829916b0 r _kbl_u_trans_dp +ffffffff82991720 r skl_trans_edp +ffffffff82991730 r kbl_trans_dp +ffffffff82991740 r _skl_trans_edp +ffffffff829917c0 r _kbl_trans_dp +ffffffff82991830 r skl_y_trans_dp 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r snb_sprite_formats +ffffffff829b7108 r snb_sprite_funcs +ffffffff829b7170 r g4x_sprite_formats +ffffffff829b7188 r g4x_sprite_funcs +ffffffff829b71f0 r chv_sprite_update_csc.csc_matrix +ffffffff829b8000 r tc_port_mode_name.names +ffffffff829b9000 r intel_tv_connector_funcs +ffffffff829b9078 r intel_tv_enc_funcs +ffffffff829b9098 r intel_tv_connector_helper_funcs +ffffffff829b90f0 r tv_modes +ffffffff829b9780 r component_levels +ffffffff829b9786 r sdtv_csc_yprpb +ffffffff829b979e r hdtv_csc_yprpb +ffffffff829b97c0 r input_res_table +ffffffff829b97dc r ntsc_m_levels_composite +ffffffff829b97e2 r ntsc_m_levels_svideo +ffffffff829b97e8 r ntsc_m_csc_composite +ffffffff829b9800 r ntsc_m_csc_svideo +ffffffff829b9820 r filter_table +ffffffff829b9b58 r ntsc_j_levels_composite +ffffffff829b9b5e r ntsc_j_levels_svideo +ffffffff829b9b64 r ntsc_j_csc_composite +ffffffff829b9b7c r ntsc_j_csc_svideo +ffffffff829b9b94 r pal_m_levels_composite +ffffffff829b9b9a r pal_m_levels_svideo +ffffffff829b9ba0 r pal_m_csc_composite +ffffffff829b9bb8 r pal_m_csc_svideo +ffffffff829b9bd0 r pal_n_levels_composite +ffffffff829b9bd6 r pal_n_levels_svideo +ffffffff829b9bdc r pal_n_csc_composite +ffffffff829b9bf4 r pal_n_csc_svideo +ffffffff829b9c0c r pal_levels_composite +ffffffff829b9c12 r pal_levels_svideo +ffffffff829b9c18 r pal_csc_composite +ffffffff829b9c30 r pal_csc_svideo +ffffffff829ba000 r calculate_rc_params.ofs_und6 +ffffffff829ba00f r calculate_rc_params.ofs_und12 +ffffffff829ba01e r calculate_rc_params.ofs_und15 +ffffffff829ba030 r rc_parameters +ffffffff829bb000 r gen12_plane_funcs +ffffffff829bb068 r skl_plane_funcs +ffffffff829bb0d0 r icl_program_input_csc.input_csc_matrix +ffffffff829bb110 r icl_hdr_plane_formats +ffffffff829bb190 r icl_sdr_y_plane_formats +ffffffff829bb1f0 r icl_sdr_uv_plane_formats +ffffffff829bb260 r glk_planar_formats +ffffffff829bb2b0 r skl_plane_formats +ffffffff829bb2f0 r skl_planar_formats +ffffffff829bc000 r skl_wm_funcs +ffffffff829bc038 r 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r ivb_blt_reg_tables +ffffffff829e8130 r hsw_vebox_cmd_table +ffffffff829e8150 r noop_desc +ffffffff829e81b0 r gen7_common_cmds +ffffffff829e85d0 r gen7_render_cmds +ffffffff829e8cb0 r hsw_render_cmds +ffffffff829e92e0 r gen7_render_regs +ffffffff829e9600 r hsw_render_regs +ffffffff829e97a0 r gen7_video_cmds +ffffffff829e9a10 r gen9_blt_cmds +ffffffff829ea040 r gen7_blt_cmds +ffffffff829ea250 r hsw_blt_cmds +ffffffff829ea300 r gen9_blt_regs +ffffffff829ea4e0 r gen7_blt_regs +ffffffff829ea540 r gen7_vecs_cmds +ffffffff829eb000 R inteldrm_backlight_ops +ffffffff829eb018 R inteldrm_ca +ffffffff829eb040 r i915_drm_driver +ffffffff829eb130 r i915_ioctls +ffffffff829ec000 r i915_hpd_funcs +ffffffff829ec008 r icp_hpd_funcs +ffffffff829ec010 r dg1_hpd_funcs +ffffffff829ec018 r gen11_hpd_funcs +ffffffff829ec020 r bxt_hpd_funcs +ffffffff829ec028 r spt_hpd_funcs +ffffffff829ec030 r ilk_hpd_funcs +ffffffff829ec040 r hpd_status_g4x +ffffffff829ec080 r hpd_status_i915 +ffffffff829ec0c0 r hpd_gen11 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r ci_SECT_CONTEXT_defs +ffffffff82a0d720 r ci_SECT_CONTEXT_def_1 +ffffffff82a0da70 r ci_SECT_CONTEXT_def_3 +ffffffff82a0da90 r ci_SECT_CONTEXT_def_4 +ffffffff82a0dd04 r ci_SECT_CONTEXT_def_5 +ffffffff82a0dd0c r ci_SECT_CONTEXT_def_6 +ffffffff82a0dd10 r ci_SECT_CONTEXT_def_2 +ffffffff82a0e160 r ci_SECT_CONTEXT_def_7 +ffffffff82a0e510 r cik_default_state +ffffffff82a10000 r dce3_2_afmt_write_sad_regs.eld_reg_to_type +ffffffff82a11000 r dce6_afmt_write_sad_regs.eld_reg_to_type +ffffffff82a12000 r ni_tx_offsets +ffffffff82a12020 r evergreen_dp_offsets +ffffffff82a12040 r evergreen_disp_int_status +ffffffff82a12060 r evergreen_golden_registers +ffffffff82a12260 r evergreen_golden_registers2 +ffffffff82a12310 r cypress_mgcg_init +ffffffff82a12a10 r juniper_mgcg_init +ffffffff82a12e80 r redwood_mgcg_init +ffffffff82a131b0 r cedar_golden_registers +ffffffff82a13390 r cedar_mgcg_init +ffffffff82a135f0 r wrestler_golden_registers +ffffffff82a13840 r supersumo_golden_registers +ffffffff82a13ba0 r sumo_golden_registers +ffffffff82a13be0 r barts_golden_registers +ffffffff82a13e00 r turks_golden_registers +ffffffff82a14040 r caicos_golden_registers +ffffffff82a14280 r sumo_rlc_save_restore_register_list +ffffffff82a143d0 r evergreen_cs_data +ffffffff82a14410 r SECT_CONTEXT_defs +ffffffff82a14490 r SECT_CLEAR_defs +ffffffff82a144b0 r SECT_CTRLCONST_defs +ffffffff82a144d0 r SECT_CONTEXT_def_2 +ffffffff82a144f0 r SECT_CONTEXT_def_4 +ffffffff82a14680 r SECT_CONTEXT_def_5 +ffffffff82a146a0 r SECT_CONTEXT_def_6 +ffffffff82a14780 r SECT_CONTEXT_def_1 +ffffffff82a14f20 r SECT_CONTEXT_def_3 +ffffffff82a15000 r SECT_CONTEXT_def_7 +ffffffff82a15488 r SECT_CLEAR_def_1 +ffffffff82a15494 r SECT_CTRLCONST_def_1 +ffffffff82a154a0 r evergreen_default_state +ffffffff82a16000 r cayman_reg_safe_bm +ffffffff82a18000 r evergreen_reg_safe_bm +ffffffff82a1b000 r evergreen_hdmi_write_sad_regs.eld_reg_to_type +ffffffff82a1c000 r didt_config_kv +ffffffff82a1d000 r barts_io_mc_regs +ffffffff82a1d0f0 r turks_io_mc_regs +ffffffff82a1d1e0 r caicos_io_mc_regs +ffffffff82a1d2d0 r cayman_io_mc_regs +ffffffff82a1d3c0 r cayman_golden_registers +ffffffff82a1d580 r cayman_golden_registers2 +ffffffff82a1d5d0 r dvst_golden_registers +ffffffff82a1d860 r dvst_golden_registers2 +ffffffff82a1d890 r scrapper_golden_registers +ffffffff82a1dd70 r tn_rlc_save_restore_register_list +ffffffff82a1df60 r cayman_cs_data +ffffffff82a1dfa0 r SECT_CONTEXT_defs +ffffffff82a1e020 r SECT_CLEAR_defs +ffffffff82a1e040 r SECT_CTRLCONST_defs +ffffffff82a1e060 r SECT_CONTEXT_def_2 +ffffffff82a1e080 r SECT_CONTEXT_def_4 +ffffffff82a1e210 r SECT_CONTEXT_def_5 +ffffffff82a1e230 r SECT_CONTEXT_def_1 +ffffffff82a1e9d0 r SECT_CONTEXT_def_3 +ffffffff82a1eab0 r SECT_CONTEXT_def_6 +ffffffff82a1eb90 r SECT_CONTEXT_def_7 +ffffffff82a1f018 r SECT_CLEAR_def_1 +ffffffff82a1f024 r SECT_CTRLCONST_def_1 +ffffffff82a1f030 r cayman_default_state +ffffffff82a20000 r cac_weights_cayman_xt +ffffffff82a20128 r cac_weights_cayman_pro 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rv6xx_uvd_ring +ffffffff82a2c2a0 r rv770_uvd_ring +ffffffff82a2c310 r evergreen_gfx_ring +ffffffff82a2c380 r evergreen_dma_ring +ffffffff82a2c3f0 r cayman_gfx_ring +ffffffff82a2c460 r cayman_dma_ring +ffffffff82a2c4d0 r cayman_uvd_ring +ffffffff82a2c540 r trinity_vce_ring +ffffffff82a2c5b0 r si_gfx_ring +ffffffff82a2c620 r si_dma_ring +ffffffff82a2c690 r ci_gfx_ring +ffffffff82a2c700 r ci_cp_ring +ffffffff82a2c770 r ci_dma_ring +ffffffff82a2c7e0 r ci_vce_ring +ffffffff82a2d000 r object_connector_convert +ffffffff82a2d060 r supported_devices_connector_convert +ffffffff82a2d0a0 r supported_devices_connector_object_id_convert +ffffffff82a2d0c0 r thermal_controller_names +ffffffff82a2d100 r pp_lib_thermal_controller_names +ffffffff82a2e000 r pin_offsets +ffffffff82a2e020 r radeon_audio_acr.hdmi_predefined_acr +ffffffff82a30000 r thermal_controller_names +ffffffff82a30020 r default_primarydac_adj +ffffffff82a30120 r default_tvdac_adj +ffffffff82a30220 r default_tmds_pll +ffffffff82a31000 r radeon_dp_connector_helper_funcs +ffffffff82a31050 r radeon_vga_connector_helper_funcs +ffffffff82a310a0 r radeon_dvi_connector_helper_funcs +ffffffff82a310f0 r radeon_tv_connector_helper_funcs +ffffffff82a31140 r radeon_lvds_connector_helper_funcs +ffffffff82a31190 r radeon_dp_connector_funcs +ffffffff82a31298 r radeon_lvds_bridge_connector_funcs +ffffffff82a31310 r radeon_vga_connector_funcs +ffffffff82a31388 r radeon_dvi_connector_funcs +ffffffff82a31400 r radeon_edp_connector_funcs +ffffffff82a31478 r radeon_tv_connector_funcs +ffffffff82a314f0 r radeon_lvds_connector_funcs +ffffffff82a32000 r radeon_family_name +ffffffff82a323f0 r radeon_px_quirk_list +ffffffff82a33000 r radeon_fb_funcs +ffffffff82a33018 r radeon_mode_funcs +ffffffff82a33060 r radeon_tmds_pll_enum_list +ffffffff82a33080 r radeon_tv_std_enum_list +ffffffff82a33100 r radeon_underscan_enum_list +ffffffff82a33130 r radeon_audio_enum_list +ffffffff82a33160 r radeon_dither_enum_list +ffffffff82a33180 r radeon_output_csc_enum_list +ffffffff82a331c0 r radeon_crtc_funcs +ffffffff82a33280 r hpd_names +ffffffff82a332b0 r encoder_names +ffffffff82a333e0 r radeon_afmt_init.eg_offsets +ffffffff82a34000 r aux_offset +ffffffff82a35000 R radeondrm_ca +ffffffff82a35030 r pciidlist +ffffffff82a391d0 r kms_driver +ffffffff82a392c0 r radeon_ioctls_kms +ffffffff82a3a000 r radeon_fb_helper_funcs +ffffffff82a3a008 r radeonfb_ops +ffffffff82a3b000 R radeon_fence_ops +ffffffff82a3d000 R radeon_gem_object_funcs +ffffffff82a3d060 r radeon_gem_vm_ops +ffffffff82a3e000 r radeon_i2c_algo +ffffffff82a3e010 r radeon_atom_i2c_algo +ffffffff82a3f000 r legacy_helper_funcs +ffffffff82a40000 r radeon_backlight_ops +ffffffff82a40018 r radeon_legacy_lvds_enc_funcs +ffffffff82a40038 r radeon_legacy_lvds_helper_funcs +ffffffff82a400a0 r radeon_legacy_tmds_int_enc_funcs +ffffffff82a400c0 r radeon_legacy_tmds_int_helper_funcs +ffffffff82a40128 r radeon_legacy_primary_dac_enc_funcs +ffffffff82a40148 r radeon_legacy_primary_dac_helper_funcs +ffffffff82a401b0 r radeon_legacy_tv_dac_enc_funcs +ffffffff82a401d0 r radeon_legacy_tv_dac_helper_funcs +ffffffff82a40238 r radeon_legacy_tmds_ext_enc_funcs +ffffffff82a40258 r radeon_legacy_tmds_ext_helper_funcs +ffffffff82a41000 r SLOPE_value +ffffffff82a41030 r YCOEF_EN_value +ffffffff82a41060 r YCOEF_value +ffffffff82a41090 r available_tv_modes +ffffffff82a41110 r hor_timing_NTSC +ffffffff82a41150 r vert_timing_NTSC +ffffffff82a41190 r hor_timing_PAL +ffffffff82a411d0 r vert_timing_PAL +ffffffff82a43000 r radeon_pm_state_type_name +ffffffff82a44000 r radeon_evict_flags.placements +ffffffff82a47000 r rs600_reg_safe_bm +ffffffff82a49000 r rv515_reg_safe_bm +ffffffff82a4a000 r dll_speed_table +ffffffff82a4b000 r r7xx_golden_registers +ffffffff82a4b090 r r7xx_golden_dyn_gpr_registers +ffffffff82a4b100 r rv770ce_golden_registers +ffffffff82a4b160 r rv770_golden_registers +ffffffff82a4b1b0 r rv770_mgcg_init +ffffffff82a4b8f0 r rv730_golden_registers +ffffffff82a4b950 r rv730_mgcg_init +ffffffff82a4bee0 r rv710_golden_registers +ffffffff82a4bf30 r rv710_mgcg_init +ffffffff82a4c1d0 r rv740_golden_registers +ffffffff82a4c360 r rv740_mgcg_init +ffffffff82a4e000 r rv730_smc_int_vectors +ffffffff82a4e040 r rv710_smc_int_vectors +ffffffff82a4e080 r rv740_smc_int_vectors +ffffffff82a4e0c0 r cypress_smc_int_vectors +ffffffff82a4e100 r caicos_smc_int_vectors +ffffffff82a4e140 r cayman_smc_int_vectors +ffffffff82a4f000 r tahiti_io_mc_regs +ffffffff82a4f120 r pitcairn_io_mc_regs +ffffffff82a4f240 r verde_io_mc_regs +ffffffff82a4f360 r oland_io_mc_regs +ffffffff82a4f480 r hainan_io_mc_regs +ffffffff82a4f5a0 r crtc_offsets +ffffffff82a4f5c0 r si_disp_int_status +ffffffff82a4f5e0 r tahiti_golden_registers +ffffffff82a4f760 r tahiti_golden_rlc_registers +ffffffff82a4f7b0 r tahiti_mgcg_cgcg_init +ffffffff82a4fd98 r tahiti_golden_registers2 +ffffffff82a4fdb0 r pitcairn_golden_registers +ffffffff82a4ff00 r pitcairn_golden_rlc_registers +ffffffff82a4ff40 r pitcairn_mgcg_cgcg_init +ffffffff82a503b0 r verde_golden_registers +ffffffff82a50620 r verde_golden_rlc_registers +ffffffff82a50660 r verde_mgcg_cgcg_init +ffffffff82a50ae0 r oland_golden_registers +ffffffff82a50c30 r oland_golden_rlc_registers +ffffffff82a50c70 r oland_mgcg_cgcg_init +ffffffff82a51000 r hainan_golden_registers +ffffffff82a5112c r hainan_golden_registers2 +ffffffff82a51140 r hainan_mgcg_cgcg_init +ffffffff82a514b0 r verde_rlc_save_restore_register_list +ffffffff82a51820 r si_cs_data +ffffffff82a51840 r si_SECT_CONTEXT_defs +ffffffff82a518c0 r si_SECT_CONTEXT_def_1 +ffffffff82a51c10 r si_SECT_CONTEXT_def_3 +ffffffff82a51c30 r si_SECT_CONTEXT_def_4 +ffffffff82a51ea4 r si_SECT_CONTEXT_def_5 +ffffffff82a51ea8 r si_SECT_CONTEXT_def_6 +ffffffff82a51eb0 r si_SECT_CONTEXT_def_2 +ffffffff82a522f0 r si_SECT_CONTEXT_def_7 +ffffffff82a526a0 r mc_cg_registers +ffffffff82a526d0 r si_default_state +ffffffff82a53000 r cac_weights_tahiti +ffffffff82a534d0 r lcac_tahiti +ffffffff82a53ba0 r cac_override_tahiti +ffffffff82a53bb4 r powertune_data_tahiti +ffffffff82a53bf0 r dte_data_tahiti +ffffffff82a53cc0 r dte_data_new_zealand +ffffffff82a53d90 r dte_data_malta +ffffffff82a53e60 r lcac_pitcairn +ffffffff82a54530 r cac_override_pitcairn +ffffffff82a54544 r powertune_data_pitcairn +ffffffff82a54580 r lcac_cape_verde +ffffffff82a549d0 r cac_override_cape_verde +ffffffff82a549e4 r powertune_data_cape_verde +ffffffff82a54a20 r cac_weights_cape_verde_pro +ffffffff82a54ef0 r cac_weights_heathrow +ffffffff82a553c0 r cac_weights_chelsea_xt +ffffffff82a55890 r cac_weights_chelsea_pro +ffffffff82a55d60 r cac_weights_cape_verde +ffffffff82a56230 r cac_weights_mars_pro +ffffffff82a56700 r lcac_mars_pro +ffffffff82a56a60 r cac_override_oland +ffffffff82a56a74 r powertune_data_mars_pro +ffffffff82a56ab0 r cac_weights_mars_xt +ffffffff82a56f80 r cac_weights_oland_pro +ffffffff82a57450 r cac_weights_oland_xt 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OSSSYS_BASE +ffffffff82a5d5e8 r SDMA0_BASE +ffffffff82a5d690 r SDMA1_BASE +ffffffff82a5d738 r SDMA2_BASE +ffffffff82a5d7e0 r SDMA3_BASE +ffffffff82a5d888 r SDMA4_BASE +ffffffff82a5d930 r SMUIO_BASE +ffffffff82a5d9d8 r THM_BASE +ffffffff82a5da80 r UMC_BASE +ffffffff82a5db28 r VCN_BASE +ffffffff82a5e000 r amdgpu_afmt_predefined_acr +ffffffff82a5f000 r atom_op_names +ffffffff82a5f3e0 r opcode_table +ffffffff82a5fbd0 r atom_dst_to_src +ffffffff82a5fc50 r atom_io_names +ffffffff82a5fc80 r atom_table_names +ffffffff82a5fed0 r atom_iio_len +ffffffff82a60000 r object_connector_convert +ffffffff82a60058 R amdgpu_vbios_version_attr_group +ffffffff82a61000 r voltage_names +ffffffff82a61020 r pre_emph_names +ffffffff82a62000 r amdgpu_atombios_encoder_backlight_ops +ffffffff82a64000 r amdgpu_benchmark.common_modes +ffffffff82a65000 r amdgpu_cgs_ops +ffffffff82a66000 r amdgpu_connector_dp_helper_funcs +ffffffff82a66050 r amdgpu_connector_vga_helper_funcs +ffffffff82a660a0 r amdgpu_connector_dvi_helper_funcs +ffffffff82a660f0 r amdgpu_connector_lvds_helper_funcs +ffffffff82a66140 r amdgpu_connector_dp_funcs +ffffffff82a661c0 r amdgpu_connector_add_common_modes.common_modes +ffffffff82a66248 r amdgpu_connector_edp_funcs +ffffffff82a662c0 r amdgpu_connector_vga_funcs +ffffffff82a66338 r amdgpu_connector_dvi_funcs +ffffffff82a663b0 r amdgpu_connector_lvds_funcs +ffffffff82a68000 R amdgpu_ctx_num_entities +ffffffff82a69000 r amdgpu_kms_driver +ffffffff82a690f0 r amdgpu_device_ip_reinit_late_sriov.ip_order +ffffffff82a6a000 r hw_id_map +ffffffff82a6a090 r hw_id_names +ffffffff82a6b000 r hpd_names +ffffffff82a6b030 r encoder_names +ffffffff82a6b180 r dcc_retile_formats +ffffffff82a6b270 r dcc_formats +ffffffff82a6b360 R amdgpu_mode_funcs +ffffffff82a6b3b0 r amdgpu_underscan_enum_list +ffffffff82a6b3e0 r amdgpu_audio_enum_list +ffffffff82a6b410 r amdgpu_dither_enum_list +ffffffff82a6b430 r amdgpu_fb_funcs +ffffffff82a6c000 R amdgpu_dmabuf_ops +ffffffff82a6d000 R amdgpu_ioctls_kms +ffffffff82a6d210 R amdgpu_ca +ffffffff82a6d240 r pciidlist +ffffffff82a6e110 r amdgpu_unsupported_pciidlist +ffffffff82a6e690 r amdgpu_kms_driver +ffffffff82a6f000 r amdgpu_job_fence_ops +ffffffff82a6f038 r amdgpu_fence_ops +ffffffff82a70000 r amdgpu_gem_object_funcs +ffffffff82a70060 r amdgpu_gem_vm_ops +ffffffff82a72000 R amdgpu_gtt_mgr_attr_group +ffffffff82a72018 r amdgpu_gtt_mgr_func +ffffffff82a73000 r amdgpu_atombios_i2c_algo +ffffffff82a74000 R amdgpu_sched_ops +ffffffff82a77000 r amdgpu_vram_names +ffffffff82a78000 r amdgpu_preempt_mgr_func +ffffffff82a79000 R psp_ip_funcs +ffffffff82a790a0 R psp_v3_1_ip_block +ffffffff82a790b8 R psp_v10_0_ip_block +ffffffff82a790d0 R psp_v11_0_ip_block +ffffffff82a790e8 R psp_v11_0_8_ip_block +ffffffff82a79100 R psp_v12_0_ip_block +ffffffff82a79118 R psp_v13_0_ip_block +ffffffff82a79130 R psp_v13_0_4_ip_block +ffffffff82a7b000 r amdgpu_evict_flags.placements +ffffffff82a7f000 R amdgpu_vkms_ip_block +ffffffff82a81000 R amdgpu_vm_cpu_funcs +ffffffff82a83000 R amdgpu_vm_sdma_funcs +ffffffff82a84000 R amdgpu_vram_mgr_attr_group +ffffffff82a84018 r amdgpu_vram_mgr_func +ffffffff82a85000 r xgmi_pcs_err_status_reg_arct +ffffffff82a86000 r GC_BASE +ffffffff82a860c0 r HDP_BASE +ffffffff82a86180 r MMHUB_BASE +ffffffff82a86240 r ATHUB_BASE +ffffffff82a86300 r NBIF0_BASE +ffffffff82a863c0 r MP0_BASE +ffffffff82a86480 r MP1_BASE +ffffffff82a86540 r UVD_BASE +ffffffff82a86600 r DF_BASE +ffffffff82a866c0 r OSSSYS_BASE +ffffffff82a86780 r SDMA0_BASE +ffffffff82a86840 r SDMA1_BASE +ffffffff82a86900 r SDMA2_BASE +ffffffff82a869c0 r SDMA3_BASE +ffffffff82a86a80 r SDMA4_BASE +ffffffff82a86b40 r SDMA5_BASE +ffffffff82a86c00 r SDMA6_BASE +ffffffff82a86cc0 r SDMA7_BASE +ffffffff82a86d80 r SMUIO_BASE +ffffffff82a86e40 r THM_BASE +ffffffff82a86f00 r UMC_BASE +ffffffff82a86fc0 r RSMU_BASE +ffffffff82a88000 r cz_ih_ip_funcs +ffffffff82a880a0 R cz_ih_ip_block +ffffffff82a880b8 r cz_ih_funcs +ffffffff82a89000 r crtc_offsets +ffffffff82a89020 r dce_v10_0_ip_funcs +ffffffff82a890c0 R dce_v10_0_ip_block +ffffffff82a890d8 R dce_v10_1_ip_block +ffffffff82a890f0 r dce_v10_0_display_funcs +ffffffff82a89150 r hpd_offsets +ffffffff82a89168 r dce_v10_0_encoder_funcs +ffffffff82a89188 r dce_v10_0_dac_helper_funcs +ffffffff82a891f0 r dce_v10_0_dig_helper_funcs +ffffffff82a89258 r dce_v10_0_ext_helper_funcs +ffffffff82a892c0 r dce_v10_0_audio_write_sad_regs.eld_reg_to_type +ffffffff82a892f0 r dce_v10_0_crtc_irq_funcs +ffffffff82a89300 r dce_v10_0_pageflip_irq_funcs +ffffffff82a89310 r dce_v10_0_hpd_irq_funcs +ffffffff82a89320 r interrupt_status_offsets +ffffffff82a89380 r dce_v10_0_crtc_funcs +ffffffff82a89440 r dce_v10_0_crtc_helper_funcs +ffffffff82a894c0 r vga_control_regs +ffffffff82a894e0 r dig_offsets +ffffffff82a89500 r pin_offsets +ffffffff82a89520 r fiji_mgcg_cgcg_init +ffffffff82a89540 r golden_settings_fiji_a10 +ffffffff82a89570 r tonga_mgcg_cgcg_init +ffffffff82a89590 r golden_settings_tonga_a11 +ffffffff82a8a000 r crtc_offsets +ffffffff82a8a020 r dce_v11_0_ip_funcs +ffffffff82a8a0c0 R dce_v11_0_ip_block +ffffffff82a8a0d8 R dce_v11_2_ip_block +ffffffff82a8a0f0 r dce_v11_0_display_funcs +ffffffff82a8a150 r hpd_offsets +ffffffff82a8a168 r dce_v11_0_encoder_funcs +ffffffff82a8a188 r dce_v11_0_dac_helper_funcs +ffffffff82a8a1f0 r dce_v11_0_dig_helper_funcs +ffffffff82a8a258 r dce_v11_0_ext_helper_funcs +ffffffff82a8a2c0 r dce_v11_0_audio_write_sad_regs.eld_reg_to_type +ffffffff82a8a2f0 r dce_v11_0_crtc_irq_funcs +ffffffff82a8a300 r dce_v11_0_pageflip_irq_funcs +ffffffff82a8a310 r dce_v11_0_hpd_irq_funcs +ffffffff82a8a320 r interrupt_status_offsets +ffffffff82a8a380 r dce_v11_0_crtc_funcs +ffffffff82a8a440 r dce_v11_0_crtc_helper_funcs +ffffffff82a8a4c0 r vga_control_regs +ffffffff82a8a4e0 r dig_offsets +ffffffff82a8a510 r cz_mgcg_cgcg_init +ffffffff82a8a530 r cz_golden_settings_a11 +ffffffff82a8a550 r stoney_golden_settings_a11 +ffffffff82a8a570 r polaris11_golden_settings_a11 +ffffffff82a8a5b0 r polaris10_golden_settings_a11 +ffffffff82a8b000 R df_v1_7_funcs +ffffffff82a8b070 r df_v1_7_channel_number +ffffffff82a8c000 R df_v3_6_funcs +ffffffff82a8c070 r df_v3_6_channel_number +ffffffff82a8d000 r GC_BASE +ffffffff82a8d0a8 r HDP_BASE +ffffffff82a8d150 r MMHUB_BASE +ffffffff82a8d1f8 r ATHUB_BASE +ffffffff82a8d2a0 r NBIO_BASE +ffffffff82a8d348 r MP0_BASE +ffffffff82a8d3f0 r MP1_BASE +ffffffff82a8d498 r VCN0_BASE +ffffffff82a8d540 r DF_BASE +ffffffff82a8d5e8 r DCN_BASE +ffffffff82a8d690 r OSSSYS_BASE +ffffffff82a8d738 r SMUIO_BASE +ffffffff82a8d7e0 r THM_BASE +ffffffff82a8e000 r gfx_v10_0_ip_funcs +ffffffff82a8e0a0 R gfx_v10_0_ip_block +ffffffff82a8e0b8 r gfx_v10_0_kiq_pm4_funcs +ffffffff82a8e0f8 r gfx_v10_0_ring_funcs_kiq +ffffffff82a8e218 r gfx_v10_0_ring_funcs_gfx +ffffffff82a8e338 r gfx_v10_0_ring_funcs_compute +ffffffff82a8e458 r gfx_v10_0_eop_irq_funcs +ffffffff82a8e468 r gfx_v10_0_kiq_irq_funcs +ffffffff82a8e478 r gfx_v10_0_priv_reg_irq_funcs +ffffffff82a8e488 r gfx_v10_0_priv_inst_irq_funcs +ffffffff82a8e498 r gfx_v10_0_rlc_funcs +ffffffff82a8e500 r gfx_v10_0_rlc_funcs_sriov +ffffffff82a8e570 r gfx10_cs_data +ffffffff82a8e590 r gfx10_SECT_CONTEXT_defs +ffffffff82a8e620 r gfx10_SECT_CONTEXT_def_1 +ffffffff82a8e980 r gfx10_SECT_CONTEXT_def_3 +ffffffff82a8e990 r gfx10_SECT_CONTEXT_def_4 +ffffffff82a8ec08 r gfx10_SECT_CONTEXT_def_5 +ffffffff82a8ec10 r gfx10_SECT_CONTEXT_def_6 +ffffffff82a8ec20 r gfx10_SECT_CONTEXT_def_2 +ffffffff82a8f060 r gfx10_SECT_CONTEXT_def_7 +ffffffff82a8f170 r gfx10_SECT_CONTEXT_def_8 +ffffffff82a8f4a0 r gfx_v10_0_gfx_funcs +ffffffff82a8f4e0 r golden_settings_gc_rlc_spm_10_0_nv10 +ffffffff82a95780 r golden_settings_gc_rlc_spm_10_1_nv14 +ffffffff82a991a0 r golden_settings_gc_rlc_spm_10_1_2_nv12 +ffffffff82a9f440 r golden_settings_gc_10_1 +ffffffff82a9f800 r golden_settings_gc_10_0_nv10 +ffffffff82a9f800 r golden_settings_gc_10_1_1 +ffffffff82a9fb90 r golden_settings_gc_10_1_2 +ffffffff82a9fb90 r golden_settings_gc_10_1_nv14 +ffffffff82a9ff80 r golden_settings_gc_10_1_2_nv12 +ffffffff82a9ff80 r golden_settings_gc_10_3 +ffffffff82aa0388 r golden_settings_gc_10_3_sienna_cichlid +ffffffff82aa0390 r golden_settings_gc_10_3_2 +ffffffff82aa0780 r golden_settings_gc_10_3_vangogh +ffffffff82aa09e0 r golden_settings_gc_10_3_3 +ffffffff82aa0bc0 r golden_settings_gc_10_3_4 +ffffffff82aa0f20 r golden_settings_gc_10_3_5 +ffffffff82aa1220 r golden_settings_gc_10_0_cyan_skillfish +ffffffff82aa1550 r golden_settings_gc_10_3_6 +ffffffff82aa1760 r golden_settings_gc_10_3_7 +ffffffff82aa2000 r gfx_v11_0_ip_funcs +ffffffff82aa20a0 R gfx_v11_0_ip_block +ffffffff82aa20b8 r gfx_v11_0_kiq_pm4_funcs +ffffffff82aa20f8 r gfx_v11_0_ring_funcs_kiq +ffffffff82aa2218 r gfx_v11_0_ring_funcs_gfx +ffffffff82aa2338 r gfx_v11_0_ring_funcs_compute +ffffffff82aa2458 r gfx_v11_0_eop_irq_funcs +ffffffff82aa2468 r gfx_v11_0_priv_reg_irq_funcs +ffffffff82aa2478 r gfx_v11_0_priv_inst_irq_funcs +ffffffff82aa2488 r gfx_v11_0_rlc_funcs +ffffffff82aa24f0 r gfx11_cs_data +ffffffff82aa2510 r gfx11_SECT_CONTEXT_defs +ffffffff82aa2590 r gfx11_SECT_CONTEXT_def_1 +ffffffff82aa28f0 r gfx11_SECT_CONTEXT_def_3 +ffffffff82aa2900 r gfx11_SECT_CONTEXT_def_5 +ffffffff82aa2908 r gfx11_SECT_CONTEXT_def_6 +ffffffff82aa2910 r gfx11_SECT_CONTEXT_def_2 +ffffffff82aa2d50 r gfx11_SECT_CONTEXT_def_4 +ffffffff82aa2fd0 r gfx11_SECT_CONTEXT_def_7 +ffffffff82aa3438 r gfx_v11_0_gfx_funcs +ffffffff82aa3480 r golden_settings_gc_11_0_1 +ffffffff82aa4000 r gfx_v8_0_ip_funcs +ffffffff82aa40a0 R gfx_v8_0_ip_block +ffffffff82aa40b8 R gfx_v8_1_ip_block +ffffffff82aa40d0 r gfx_v8_0_gfx_funcs +ffffffff82aa4110 r gfx_v8_0_ring_funcs_kiq +ffffffff82aa4230 r gfx_v8_0_ring_funcs_gfx +ffffffff82aa4350 r gfx_v8_0_ring_funcs_compute +ffffffff82aa4470 r amdgpu_gds_reg_offset +ffffffff82aa4570 r gfx_v8_0_eop_irq_funcs +ffffffff82aa4580 r gfx_v8_0_priv_reg_irq_funcs +ffffffff82aa4590 r gfx_v8_0_priv_inst_irq_funcs +ffffffff82aa45a0 r gfx_v8_0_cp_ecc_error_irq_funcs +ffffffff82aa45b0 r gfx_v8_0_sq_irq_funcs +ffffffff82aa45c0 r sq_edc_source_names +ffffffff82aa45f8 r iceland_rlc_funcs +ffffffff82aa4660 r vi_cs_data +ffffffff82aa4680 r vi_SECT_CONTEXT_defs +ffffffff82aa4700 r vi_SECT_CONTEXT_def_1 +ffffffff82aa4a50 r vi_SECT_CONTEXT_def_3 +ffffffff82aa4a70 r vi_SECT_CONTEXT_def_4 +ffffffff82aa4ce4 r vi_SECT_CONTEXT_def_5 +ffffffff82aa4cec r vi_SECT_CONTEXT_def_6 +ffffffff82aa4cf0 r vi_SECT_CONTEXT_def_2 +ffffffff82aa5140 r vi_SECT_CONTEXT_def_7 +ffffffff82aa54f0 r vgpr_init_compute_shader +ffffffff82aa5600 r vgpr_init_regs +ffffffff82aa5690 r sgpr1_init_regs +ffffffff82aa5720 r sgpr2_init_regs +ffffffff82aa57b0 r sec_ded_counter_registers +ffffffff82aa5820 r iceland_mgcg_cgcg_init +ffffffff82aa5b20 r golden_settings_iceland_a11 +ffffffff82aa5be0 r iceland_golden_common_all +ffffffff82aa5c40 r fiji_mgcg_cgcg_init +ffffffff82aa5df0 r golden_settings_fiji_a10 +ffffffff82aa5e80 r fiji_golden_common_all +ffffffff82aa5f00 r tonga_mgcg_cgcg_init +ffffffff82aa6290 r golden_settings_tonga_a11 +ffffffff82aa6350 r tonga_golden_common_all +ffffffff82aa63b0 r golden_settings_vegam_a11 +ffffffff82aa6480 r vegam_golden_common_all +ffffffff82aa64d0 r golden_settings_polaris11_a11 +ffffffff82aa65a0 r polaris11_golden_common_all +ffffffff82aa65f0 r golden_settings_polaris10_a11 +ffffffff82aa66c0 r polaris10_golden_common_all +ffffffff82aa6720 r cz_mgcg_cgcg_init +ffffffff82aa6ab0 r cz_golden_settings_a11 +ffffffff82aa6b40 r cz_golden_common_all +ffffffff82aa6ba0 r stoney_mgcg_cgcg_init +ffffffff82aa6be0 r stoney_golden_settings_a11 +ffffffff82aa6c60 r stoney_golden_common_all +ffffffff82aa7000 R gfx_v9_0_ras_ops +ffffffff82aa7040 r gfx_v9_0_ip_funcs +ffffffff82aa70e0 R gfx_v9_0_ip_block +ffffffff82aa7100 r ras_gfx_subblocks +ffffffff82aa7b80 r gfx_v9_0_edc_counter_regs +ffffffff82aa7f20 r gfx_v9_0_ras_fields +ffffffff82aa9000 r gfx_v9_0_kiq_pm4_funcs +ffffffff82aa9040 r gfx_v9_0_ring_funcs_kiq +ffffffff82aa9160 r gfx_v9_0_ring_funcs_gfx +ffffffff82aa9280 r gfx_v9_0_ring_funcs_compute +ffffffff82aa93a0 r gfx_v9_0_eop_irq_funcs +ffffffff82aa93b0 r gfx_v9_0_priv_reg_irq_funcs +ffffffff82aa93c0 r gfx_v9_0_priv_inst_irq_funcs +ffffffff82aa93d0 r gfx_v9_0_cp_ecc_error_irq_funcs +ffffffff82aa93e0 r gfx_v9_0_rlc_funcs +ffffffff82aa9450 r gfx9_cs_data +ffffffff82aa9470 r gfx9_SECT_CONTEXT_defs +ffffffff82aa9500 r gfx9_SECT_CONTEXT_def_1 +ffffffff82aa9850 r gfx9_SECT_CONTEXT_def_3 +ffffffff82aa9860 r gfx9_SECT_CONTEXT_def_4 +ffffffff82aa9ad4 r gfx9_SECT_CONTEXT_def_5 +ffffffff82aa9adc r gfx9_SECT_CONTEXT_def_6 +ffffffff82aa9ae0 r gfx9_SECT_CONTEXT_def_7 +ffffffff82aa9bf0 r gfx9_SECT_CONTEXT_def_2 +ffffffff82aaa060 r gfx9_SECT_CONTEXT_def_8 +ffffffff82aaa2d0 r vgpr_init_compute_shader_arcturus +ffffffff82aaab60 r vgpr_init_regs_arcturus +ffffffff82aaacf0 r vgpr_init_regs +ffffffff82aaae80 r sgpr1_init_regs +ffffffff82aab010 r sgpr2_init_regs +ffffffff82aab198 r gfx_v9_0_gfx_funcs +ffffffff82aab1e0 r golden_settings_gc_9_0 +ffffffff82aab3c0 r golden_settings_gc_9_0_vg10 +ffffffff82aab570 r golden_settings_gc_9_2_1 +ffffffff82aab6f0 r golden_settings_gc_9_2_1_vg12 +ffffffff82aab830 r golden_settings_gc_9_0_vg20 +ffffffff82aab940 r golden_settings_gc_9_4_1_arct +ffffffff82aaba50 r golden_settings_gc_9_1 +ffffffff82aabc90 r golden_settings_gc_9_1_rv2 +ffffffff82aabe60 r golden_settings_gc_9_1_rv1 +ffffffff82aabf10 r golden_settings_gc_9_1_rn +ffffffff82aac030 r golden_settings_gc_9_x_common +ffffffff82aad000 R gfx_v9_4_ras_ops +ffffffff82aad040 r gfx_v9_4_edc_counter_regs +ffffffff82aad420 r gfx_v9_4_ras_fields +ffffffff82aaf000 R vgpr_init_regs_aldebaran +ffffffff82aaf1b0 R sgpr112_init_regs_aldebaran +ffffffff82aaf360 R sgpr96_init_regs_aldebaran +ffffffff82aaf510 R sgpr64_init_regs_aldebaran +ffffffff82aaf6c0 r golden_settings_gc_9_4_2_alde +ffffffff82aaf720 r golden_settings_gc_9_4_2_alde_die_0 +ffffffff82aaf7b0 r golden_settings_gc_9_4_2_alde_die_1 +ffffffff82aaf840 r sgpr112_init_compute_shader_aldebaran +ffffffff82aafa60 r sgpr96_init_compute_shader_aldebaran +ffffffff82aafc50 r sgpr64_init_compute_shader_aldebaran +ffffffff82aafdc0 r vgpr_init_compute_shader_aldebaran +ffffffff82ab06a0 r gfx_v9_4_2_edc_counter_regs +ffffffff82ab0a20 r gfx_v9_4_2_ras_fields +ffffffff82ab23c0 r gfx_v9_4_2_utc_blocks +ffffffff82ab3000 R gfxhub_v1_0_funcs +ffffffff82ab4000 R gfxhub_v2_0_funcs +ffffffff82ab4060 r gfxhub_v2_0_vmhub_funcs ffffffff82ab4070 r gfxhub_client_ids -ffffffff82ab5000 R gmc_v10_0_ip_funcs -ffffffff82ab50a0 R gmc_v10_0_ip_block -ffffffff82ab50b8 r gmc_v10_0_gmc_funcs -ffffffff82ab5100 r gmc_v10_0_irq_funcs -ffffffff82ab5110 r gmc_v10_0_ecc_funcs -ffffffff82ab6000 R gmc_v11_0_ip_funcs -ffffffff82ab60a0 R gmc_v11_0_ip_block -ffffffff82ab60b8 r gmc_v11_0_gmc_funcs -ffffffff82ab6100 r gmc_v11_0_irq_funcs -ffffffff82ab6110 r gmc_v11_0_ecc_funcs -ffffffff82ab7000 r gmc_v7_0_ip_funcs -ffffffff82ab70a0 R gmc_v7_0_ip_block -ffffffff82ab70b8 R gmc_v7_4_ip_block -ffffffff82ab70d0 r gmc_v7_0_gmc_funcs -ffffffff82ab7118 r gmc_v7_0_irq_funcs -ffffffff82ab7128 r iceland_mgcg_cgcg_init -ffffffff82ab7140 r golden_settings_iceland_a11 -ffffffff82ab7170 r mc_cg_registers -ffffffff82ab71a0 r mc_cg_en -ffffffff82ab71d0 r mc_cg_ls_en -ffffffff82ab8000 r gmc_v8_0_ip_funcs -ffffffff82ab80a0 R gmc_v8_0_ip_block -ffffffff82ab80b8 R gmc_v8_1_ip_block -ffffffff82ab80d0 R gmc_v8_5_ip_block -ffffffff82ab80e8 r gmc_v8_0_gmc_funcs -ffffffff82ab8130 r gmc_v8_0_irq_funcs -ffffffff82ab8140 r fiji_mgcg_cgcg_init -ffffffff82ab8150 r golden_settings_fiji_a10 -ffffffff82ab8180 r tonga_mgcg_cgcg_init -ffffffff82ab8190 r golden_settings_tonga_a11 -ffffffff82ab81f0 r golden_settings_polaris11_a11 -ffffffff82ab8220 r golden_settings_polaris10_a11 -ffffffff82ab825c r cz_mgcg_cgcg_init -ffffffff82ab8270 r stoney_mgcg_cgcg_init -ffffffff82ab8290 r golden_settings_stoney_common -ffffffff82ab9000 R gmc_v9_0_ip_funcs -ffffffff82ab90a0 R gmc_v9_0_ip_block -ffffffff82ab90b8 r gmc_v9_0_gmc_funcs -ffffffff82ab9100 r gmc_v9_0_irq_funcs -ffffffff82ab9110 r gmc_v9_0_ecc_funcs -ffffffff82ab9120 r gfxhub_client_ids -ffffffff82ab9190 r mmhub_client_ids_vega10 -ffffffff82ab9480 r mmhub_client_ids_vega12 -ffffffff82ab9780 r mmhub_client_ids_vega20 -ffffffff82ab9a70 r mmhub_client_ids_arcturus -ffffffff82abb280 r mmhub_client_ids_raven -ffffffff82abb440 r mmhub_client_ids_renoir -ffffffff82abb630 r mmhub_client_ids_aldebaran -ffffffff82abce40 r ecc_umc_mcumc_ctrl_addrs -ffffffff82abcec0 r ecc_umc_mcumc_ctrl_mask_addrs -ffffffff82abcf40 r golden_settings_mmhub_1_0_0 -ffffffff82abcf70 r golden_settings_athub_1_0_0 -ffffffff82abd000 R hdp_v4_0_funcs -ffffffff82abe000 R hdp_v5_0_funcs -ffffffff82abf000 R hdp_v5_2_funcs -ffffffff82ac0000 R hdp_v6_0_funcs -ffffffff82ac1000 r iceland_ih_ip_funcs -ffffffff82ac10a0 R iceland_ih_ip_block -ffffffff82ac10b8 r iceland_ih_funcs -ffffffff82ac2000 r ih_v6_0_ip_funcs -ffffffff82ac20a0 R ih_v6_0_ip_block -ffffffff82ac20b8 r ih_v6_0_funcs -ffffffff82ac20d8 r ih_v6_0_self_irq_funcs -ffffffff82ac3000 R gfx_v11_0_imu_funcs -ffffffff82ac3030 r imu_rlc_ram_golden_11 -ffffffff82ac3680 r imu_rlc_ram_golden_11_0_2 -ffffffff82ac4000 r imu_rlc_ram_golden_11_0_3 -ffffffff82ac5000 r jpeg_v1_0_decode_ring_vm_funcs -ffffffff82ac5120 r jpeg_v1_0_irq_funcs -ffffffff82ac6000 r jpeg_v2_0_ip_funcs -ffffffff82ac60a0 R jpeg_v2_0_ip_block -ffffffff82ac60b8 r jpeg_v2_0_dec_ring_vm_funcs -ffffffff82ac61d8 r jpeg_v2_0_irq_funcs -ffffffff82ac7000 r jpeg_v2_5_ip_funcs -ffffffff82ac70a0 R jpeg_v2_5_ip_block -ffffffff82ac70b8 r jpeg_v2_6_ip_funcs -ffffffff82ac7158 R jpeg_v2_6_ip_block -ffffffff82ac7170 R jpeg_v2_6_ras_hw_ops -ffffffff82ac71b0 r jpeg_v2_5_dec_ring_vm_funcs -ffffffff82ac72d0 r jpeg_v2_6_dec_ring_vm_funcs -ffffffff82ac73f0 r jpeg_v2_5_irq_funcs -ffffffff82ac8000 r jpeg_v3_0_ip_funcs -ffffffff82ac80a0 R jpeg_v3_0_ip_block -ffffffff82ac80b8 r jpeg_v3_0_dec_ring_vm_funcs -ffffffff82ac81d8 r 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gmc_v8_0_gmc_funcs +ffffffff82abb130 r gmc_v8_0_irq_funcs +ffffffff82abb140 r fiji_mgcg_cgcg_init +ffffffff82abb150 r golden_settings_fiji_a10 +ffffffff82abb180 r tonga_mgcg_cgcg_init +ffffffff82abb190 r golden_settings_tonga_a11 +ffffffff82abb1f0 r golden_settings_polaris11_a11 +ffffffff82abb220 r golden_settings_polaris10_a11 +ffffffff82abb25c r cz_mgcg_cgcg_init +ffffffff82abb270 r stoney_mgcg_cgcg_init +ffffffff82abb290 r golden_settings_stoney_common +ffffffff82abc000 R gmc_v9_0_ip_funcs +ffffffff82abc0a0 R gmc_v9_0_ip_block +ffffffff82abc0b8 r gmc_v9_0_gmc_funcs +ffffffff82abc100 r gmc_v9_0_irq_funcs +ffffffff82abc110 r gmc_v9_0_ecc_funcs +ffffffff82abc120 r gfxhub_client_ids +ffffffff82abc190 r mmhub_client_ids_vega10 +ffffffff82abc480 r mmhub_client_ids_vega12 +ffffffff82abc780 r mmhub_client_ids_vega20 +ffffffff82abca70 r mmhub_client_ids_arcturus +ffffffff82abe280 r mmhub_client_ids_raven +ffffffff82abe440 r mmhub_client_ids_renoir +ffffffff82abe630 r mmhub_client_ids_aldebaran +ffffffff82abfe40 r ecc_umc_mcumc_ctrl_addrs +ffffffff82abfec0 r ecc_umc_mcumc_ctrl_mask_addrs +ffffffff82abff40 r golden_settings_mmhub_1_0_0 +ffffffff82abff70 r golden_settings_athub_1_0_0 +ffffffff82ac0000 R hdp_v4_0_funcs +ffffffff82ac1000 R hdp_v5_0_funcs +ffffffff82ac2000 R hdp_v5_2_funcs +ffffffff82ac3000 R hdp_v6_0_funcs +ffffffff82ac4000 r iceland_ih_ip_funcs +ffffffff82ac40a0 R iceland_ih_ip_block +ffffffff82ac40b8 r iceland_ih_funcs +ffffffff82ac5000 r ih_v6_0_ip_funcs +ffffffff82ac50a0 R ih_v6_0_ip_block +ffffffff82ac50b8 r ih_v6_0_funcs +ffffffff82ac50d8 r ih_v6_0_self_irq_funcs +ffffffff82ac6000 R gfx_v11_0_imu_funcs +ffffffff82ac6030 r imu_rlc_ram_golden_11 +ffffffff82ac6680 r imu_rlc_ram_golden_11_0_2 +ffffffff82ac7000 r imu_rlc_ram_golden_11_0_3 +ffffffff82ac8000 r jpeg_v1_0_decode_ring_vm_funcs +ffffffff82ac8120 r jpeg_v1_0_irq_funcs +ffffffff82ac9000 r jpeg_v2_0_ip_funcs +ffffffff82ac90a0 R jpeg_v2_0_ip_block +ffffffff82ac90b8 r jpeg_v2_0_dec_ring_vm_funcs +ffffffff82ac91d8 r jpeg_v2_0_irq_funcs +ffffffff82aca000 r jpeg_v2_5_ip_funcs +ffffffff82aca0a0 R jpeg_v2_5_ip_block +ffffffff82aca0b8 r jpeg_v2_6_ip_funcs +ffffffff82aca158 R jpeg_v2_6_ip_block +ffffffff82aca170 R jpeg_v2_6_ras_hw_ops +ffffffff82aca1b0 r jpeg_v2_5_dec_ring_vm_funcs +ffffffff82aca2d0 r jpeg_v2_6_dec_ring_vm_funcs +ffffffff82aca3f0 r jpeg_v2_5_irq_funcs +ffffffff82acb000 r jpeg_v3_0_ip_funcs +ffffffff82acb0a0 R jpeg_v3_0_ip_block +ffffffff82acb0b8 r jpeg_v3_0_dec_ring_vm_funcs +ffffffff82acb1d8 r jpeg_v3_0_irq_funcs +ffffffff82acc000 r jpeg_v4_0_ip_funcs +ffffffff82acc0a0 R jpeg_v4_0_ip_block +ffffffff82acc0b8 r jpeg_v4_0_dec_ring_vm_funcs +ffffffff82acc1d8 r jpeg_v4_0_irq_funcs +ffffffff82acd000 R lsdma_v6_0_funcs +ffffffff82ace000 R mca_v3_0_mp0_hw_ops +ffffffff82ace040 R mca_v3_0_mp1_hw_ops +ffffffff82ace080 R mca_v3_0_mpio_hw_ops +ffffffff82ace0c0 R mca_v3_0_funcs +ffffffff82acf000 r mes_v10_1_ip_funcs +ffffffff82acf0a0 R mes_v10_1_ip_block +ffffffff82acf0b8 r mes_v10_1_funcs +ffffffff82acf0e8 r mes_v10_1_ring_funcs +ffffffff82ad0000 r mes_v11_0_ip_funcs +ffffffff82ad00a0 R mes_v11_0_ip_block +ffffffff82ad00b8 r mes_v11_0_funcs +ffffffff82ad00e8 r mes_v11_0_ring_funcs +ffffffff82ad1000 R mmhub_v1_0_funcs +ffffffff82ad1050 r mmhub_v1_0_edc_cnt_regs +ffffffff82ad10c0 r mmhub_v1_0_ras_fields +ffffffff82ad2000 R mmhub_v1_7_funcs +ffffffff82ad2050 r mmhub_v1_7_edc_cnt_regs +ffffffff82ad2250 r mmhub_v1_7_ras_fields +ffffffff82ad39c0 r mmhub_v1_7_ea_err_status_regs +ffffffff82ad4000 R mmhub_v2_0_funcs +ffffffff82ad4050 r mmhub_v2_0_vmhub_funcs +ffffffff82ad4060 r mmhub_client_ids_navi1x +ffffffff82ad4190 r mmhub_client_ids_sienna_cichlid +ffffffff82ad4450 r mmhub_client_ids_beige_goby +ffffffff82ad5000 R mmhub_v2_3_funcs +ffffffff82ad5050 r mmhub_v2_3_vmhub_funcs +ffffffff82ad5060 r mmhub_client_ids_vangogh +ffffffff82ad6000 R mmhub_v3_0_funcs +ffffffff82ad6050 r mmhub_v3_0_vmhub_funcs +ffffffff82ad6060 r mmhub_client_ids_v3_0_0 +ffffffff82ad7000 R mmhub_v3_0_1_funcs +ffffffff82ad7050 r mmhub_v3_0_1_vmhub_funcs +ffffffff82ad7060 r mmhub_client_ids_v3_0_1 +ffffffff82ad8000 R mmhub_v3_0_2_funcs +ffffffff82ad8050 r mmhub_v3_0_2_vmhub_funcs +ffffffff82ad8060 r mmhub_client_ids_v3_0_2 +ffffffff82ad9000 R mmhub_v9_4_ras_hw_ops +ffffffff82ad9040 R mmhub_v9_4_funcs +ffffffff82ad9090 r mmhub_v9_4_edc_cnt_regs +ffffffff82ad9330 r mmhub_v9_4_ras_fields +ffffffff82adb3b0 r mmhub_v9_4_err_status_regs +ffffffff82adc000 r xgpu_ai_mailbox_ack_irq_funcs +ffffffff82adc010 r xgpu_ai_mailbox_rcv_irq_funcs +ffffffff82adc020 R xgpu_ai_virt_ops +ffffffff82add000 r xgpu_nv_mailbox_ack_irq_funcs +ffffffff82add010 r xgpu_nv_mailbox_rcv_irq_funcs +ffffffff82add020 R xgpu_nv_virt_ops +ffffffff82ade000 r xgpu_fiji_mgcg_cgcg_init +ffffffff82ade240 r xgpu_fiji_golden_settings_a10 +ffffffff82ade370 r xgpu_fiji_golden_common_all +ffffffff82ade3f0 r xgpu_tonga_mgcg_cgcg_init +ffffffff82ade810 r xgpu_tonga_golden_settings_a11 +ffffffff82ade9d0 r xgpu_tonga_golden_common_all +ffffffff82adea28 r xgpu_vi_mailbox_ack_irq_funcs +ffffffff82adea38 r xgpu_vi_mailbox_rcv_irq_funcs +ffffffff82adea48 R xgpu_vi_virt_ops +ffffffff82adf000 r navi10_ih_ip_funcs +ffffffff82adf0a0 R navi10_ih_ip_block +ffffffff82adf0b8 r navi10_ih_funcs +ffffffff82adf0d8 r navi10_ih_self_irq_funcs +ffffffff82ae0000 R nbio_v2_3_hdp_flush_reg +ffffffff82ae0048 R nbio_v2_3_funcs +ffffffff82ae1000 R nbio_v4_3_hdp_flush_reg +ffffffff82ae1048 R nbio_v4_3_funcs +ffffffff82ae1130 R nbio_v4_3_sriov_funcs +ffffffff82ae2000 R nbio_v6_1_hdp_flush_reg +ffffffff82ae2048 R nbio_v6_1_funcs +ffffffff82ae3000 R nbio_v7_0_hdp_flush_reg +ffffffff82ae3048 R nbio_v7_0_funcs +ffffffff82ae4000 R nbio_v7_2_hdp_flush_reg +ffffffff82ae4048 R nbio_v7_2_funcs +ffffffff82ae5000 R nbio_v7_4_hdp_flush_reg +ffffffff82ae5048 R nbio_v7_4_ras_hw_ops +ffffffff82ae5088 R nbio_v7_4_funcs +ffffffff82ae5170 r nbio_v7_4_ras_controller_irq_funcs +ffffffff82ae5180 r nbio_v7_4_ras_err_event_athub_irq_funcs +ffffffff82ae6000 R nbio_v7_7_hdp_flush_reg +ffffffff82ae6048 R nbio_v7_7_funcs +ffffffff82ae7000 r nv_common_ip_funcs +ffffffff82ae70a0 R nv_common_ip_block +ffffffff82ae70b8 r nv_asic_funcs +ffffffff82ae7170 r nv_allowed_read_registers +ffffffff82ae72f0 r nv_video_codecs_encode +ffffffff82ae7300 r sc_video_codecs_decode +ffffffff82ae7310 r yc_video_codecs_decode +ffffffff82ae7320 r bg_video_codecs_encode +ffffffff82ae7330 r bg_video_codecs_decode +ffffffff82ae7340 r nv_video_codecs_decode +ffffffff82ae7350 r nv_video_codecs_encode_array +ffffffff82ae7380 r sc_video_codecs_decode_array +ffffffff82ae7420 r yc_video_codecs_decode_array +ffffffff82ae7490 r bg_video_codecs_decode_array +ffffffff82ae74d0 r nv_video_codecs_decode_array +ffffffff82ae8000 r psp_v10_0_funcs +ffffffff82ae9000 r psp_v11_0_funcs +ffffffff82aea000 r psp_v11_0_8_funcs +ffffffff82aeb000 r psp_v12_0_funcs +ffffffff82aec000 r psp_v13_0_funcs +ffffffff82aed000 r psp_v13_0_4_funcs +ffffffff82aee000 r psp_v3_1_funcs +ffffffff82aef000 r sdma_v2_4_ip_funcs +ffffffff82aef0a0 R sdma_v2_4_ip_block +ffffffff82aef0b8 r sdma_v2_4_ring_funcs +ffffffff82aef1d8 r sdma_v2_4_buffer_funcs +ffffffff82aef1f8 r sdma_v2_4_vm_pte_funcs +ffffffff82aef218 r sdma_v2_4_trap_irq_funcs +ffffffff82aef228 r sdma_v2_4_illegal_inst_irq_funcs +ffffffff82aef240 r iceland_mgcg_cgcg_init +ffffffff82aef260 r golden_settings_iceland_a11 +ffffffff82af0000 r sdma_v3_0_ip_funcs +ffffffff82af00a0 R sdma_v3_0_ip_block +ffffffff82af00b8 R sdma_v3_1_ip_block +ffffffff82af00d0 r sdma_v3_0_ring_funcs +ffffffff82af01f0 r sdma_v3_0_buffer_funcs +ffffffff82af0210 r sdma_v3_0_vm_pte_funcs +ffffffff82af0230 r sdma_v3_0_trap_irq_funcs +ffffffff82af0240 r sdma_v3_0_illegal_inst_irq_funcs +ffffffff82af0250 r fiji_mgcg_cgcg_init +ffffffff82af0270 r golden_settings_fiji_a10 +ffffffff82af02d0 r tonga_mgcg_cgcg_init +ffffffff82af02f0 r golden_settings_tonga_a11 +ffffffff82af0370 r golden_settings_polaris11_a11 +ffffffff82af03f0 r golden_settings_polaris10_a11 +ffffffff82af0470 r cz_mgcg_cgcg_init +ffffffff82af0490 r cz_golden_settings_a11 +ffffffff82af0520 r stoney_mgcg_cgcg_init +ffffffff82af0530 r stoney_golden_settings_a11 +ffffffff82af1000 R sdma_v4_0_ip_funcs +ffffffff82af10a0 R sdma_v4_0_ras_hw_ops +ffffffff82af10e0 R sdma_v4_0_ip_block +ffffffff82af10f8 r sdma_v4_0_ring_funcs_2nd_mmhub +ffffffff82af1218 r sdma_v4_0_ring_funcs +ffffffff82af1338 r sdma_v4_0_page_ring_funcs_2nd_mmhub +ffffffff82af1458 r sdma_v4_0_page_ring_funcs +ffffffff82af1578 r sdma_v4_0_buffer_funcs +ffffffff82af1598 r sdma_v4_0_vm_pte_funcs +ffffffff82af15b8 r sdma_v4_0_trap_irq_funcs +ffffffff82af15c8 r sdma_v4_0_illegal_inst_irq_funcs +ffffffff82af15d8 r sdma_v4_0_ecc_irq_funcs +ffffffff82af15e8 r sdma_v4_0_vm_hole_irq_funcs +ffffffff82af15f8 r sdma_v4_0_doorbell_invalid_irq_funcs +ffffffff82af1608 r sdma_v4_0_pool_timeout_irq_funcs +ffffffff82af1618 r sdma_v4_0_srbm_write_irq_funcs +ffffffff82af1630 r golden_settings_sdma_4 +ffffffff82af1890 r golden_settings_sdma_vg10 +ffffffff82af1940 r golden_settings_sdma_vg12 +ffffffff82af19f0 r golden_settings_sdma0_4_2_init +ffffffff82af1a10 r golden_settings_sdma0_4_2 +ffffffff82af1ca0 r golden_settings_sdma1_4_2 +ffffffff82af1f30 r golden_settings_sdma_arct +ffffffff82af2230 r golden_settings_sdma_aldebaran +ffffffff82af23a0 r golden_settings_sdma_4_1 +ffffffff82af24b0 r golden_settings_sdma_rv2 +ffffffff82af24e0 r golden_settings_sdma_rv1 +ffffffff82af2510 r golden_settings_sdma_4_3 +ffffffff82af2600 r sdma_v4_0_ras_fields +ffffffff82af3000 R sdma_v4_4_ras_hw_ops +ffffffff82af3040 r sdma_v4_4_ras_fields +ffffffff82af4000 R sdma_v5_0_ip_funcs +ffffffff82af40a0 R sdma_v5_0_ip_block +ffffffff82af40b8 r sdma_v5_0_ring_funcs +ffffffff82af41d8 r sdma_v5_0_buffer_funcs +ffffffff82af41f8 r sdma_v5_0_vm_pte_funcs +ffffffff82af4218 r sdma_v5_0_trap_irq_funcs +ffffffff82af4228 r sdma_v5_0_illegal_inst_irq_funcs +ffffffff82af4240 r golden_settings_sdma_5 +ffffffff82af4480 r golden_settings_sdma_nv10 +ffffffff82af44b0 r golden_settings_sdma_nv14 +ffffffff82af44e0 r golden_settings_sdma_5_sriov +ffffffff82af46c0 r golden_settings_sdma_nv12 +ffffffff82af4750 r golden_settings_sdma_cyan_skillfish +ffffffff82af5000 R sdma_v5_2_ip_funcs +ffffffff82af50a0 R sdma_v5_2_ip_block +ffffffff82af50b8 r sdma_v5_2_ring_funcs +ffffffff82af51d8 r sdma_v5_2_buffer_funcs +ffffffff82af51f8 r sdma_v5_2_vm_pte_funcs +ffffffff82af5218 r sdma_v5_2_trap_irq_funcs +ffffffff82af5228 r sdma_v5_2_illegal_inst_irq_funcs +ffffffff82af6000 R sdma_v6_0_ip_funcs +ffffffff82af60a0 R sdma_v6_0_ip_block +ffffffff82af60b8 r sdma_v6_0_ring_funcs +ffffffff82af61d8 r sdma_v6_0_buffer_funcs +ffffffff82af61f8 r sdma_v6_0_vm_pte_funcs +ffffffff82af6218 r sdma_v6_0_trap_irq_funcs +ffffffff82af6228 r sdma_v6_0_illegal_inst_irq_funcs +ffffffff82af7000 r smu_v11_0_i2c_algo +ffffffff82af7010 r smu_v11_0_i2c_i2c_lock_ops +ffffffff82af7028 r smu_v11_0_i2c_control_quirks +ffffffff82af8000 R smuio_v11_0_funcs +ffffffff82af9000 R smuio_v11_0_6_funcs +ffffffff82afa000 R smuio_v13_0_funcs +ffffffff82afb000 R smuio_v13_0_6_funcs +ffffffff82afc000 R smuio_v9_0_funcs +ffffffff82afd000 r soc15_common_ip_funcs +ffffffff82afd0a0 R vega10_common_ip_block +ffffffff82afd0b8 r soc15_asic_funcs +ffffffff82afd170 r vega20_asic_funcs +ffffffff82afd230 r soc15_allowed_read_registers +ffffffff82afd3c0 r vega_video_codecs_encode +ffffffff82afd3d0 r vega_video_codecs_decode +ffffffff82afd3e0 r rv_video_codecs_decode +ffffffff82afd3f0 r rn_video_codecs_decode +ffffffff82afd400 r vega_video_codecs_encode_array +ffffffff82afd430 r vega_video_codecs_decode_array +ffffffff82afd4b0 r rv_video_codecs_decode_array +ffffffff82afd540 r rn_video_codecs_decode_array +ffffffff82afe000 r soc21_common_ip_funcs +ffffffff82afe0a0 R soc21_common_ip_block +ffffffff82afe0b8 r soc21_asic_funcs +ffffffff82afe170 r soc21_allowed_read_registers +ffffffff82afe2f0 r vcn_4_0_0_video_codecs_encode_vcn1 +ffffffff82afe300 r vcn_4_0_0_video_codecs_decode_vcn1 +ffffffff82afe310 r vcn_4_0_0_video_codecs_encode_vcn0 +ffffffff82afe320 r vcn_4_0_0_video_codecs_decode_vcn0 +ffffffff82afe330 r vcn_4_0_0_video_codecs_encode_array_vcn1 +ffffffff82afe360 r vcn_4_0_0_video_codecs_decode_array_vcn1 +ffffffff82afe3b0 r vcn_4_0_0_video_codecs_encode_array_vcn0 +ffffffff82afe3e0 r vcn_4_0_0_video_codecs_decode_array_vcn0 +ffffffff82aff000 r tonga_ih_ip_funcs +ffffffff82aff0a0 R tonga_ih_ip_block +ffffffff82aff0b8 r tonga_ih_funcs +ffffffff82b00000 R umc_v6_0_funcs +ffffffff82b01000 R umc_v6_1_channel_idx_tbl +ffffffff82b01080 R umc_v6_1_ras_hw_ops +ffffffff82b02000 R umc_v6_7_channel_idx_tbl_second +ffffffff82b02080 R umc_v6_7_channel_idx_tbl_first +ffffffff82b02100 R umc_v6_7_ras_hw_ops +ffffffff82b03000 R umc_v8_10_channelnum_map_colbit_table +ffffffff82b03040 R umc_v8_10_channel_idx_tbl +ffffffff82b030a0 R umc_v8_10_ras_hw_ops +ffffffff82b04000 R umc_v8_7_channel_idx_tbl +ffffffff82b04040 R umc_v8_7_ras_hw_ops +ffffffff82b05000 r uvd_v5_0_ip_funcs +ffffffff82b050a0 R uvd_v5_0_ip_block +ffffffff82b050b8 r uvd_v5_0_ring_funcs +ffffffff82b051d8 r uvd_v5_0_irq_funcs +ffffffff82b06000 r uvd_v6_0_ip_funcs +ffffffff82b060a0 R uvd_v6_0_ip_block +ffffffff82b060b8 R uvd_v6_2_ip_block +ffffffff82b060d0 R uvd_v6_3_ip_block +ffffffff82b060e8 r uvd_v6_0_ring_vm_funcs +ffffffff82b06208 r uvd_v6_0_ring_phys_funcs +ffffffff82b06328 r uvd_v6_0_enc_ring_vm_funcs +ffffffff82b06448 r uvd_v6_0_irq_funcs +ffffffff82b07000 R uvd_v7_0_ip_funcs +ffffffff82b070a0 R uvd_v7_0_ip_block +ffffffff82b070b8 r uvd_v7_0_ring_vm_funcs +ffffffff82b071d8 r uvd_v7_0_enc_ring_vm_funcs +ffffffff82b072f8 r uvd_v7_0_irq_funcs +ffffffff82b08000 r vce_v3_0_ip_funcs +ffffffff82b080a0 R vce_v3_0_ip_block +ffffffff82b080b8 R vce_v3_1_ip_block +ffffffff82b080d0 R vce_v3_4_ip_block +ffffffff82b080e8 r vce_v3_0_ring_vm_funcs +ffffffff82b08208 r vce_v3_0_ring_phys_funcs +ffffffff82b08328 r vce_v3_0_irq_funcs +ffffffff82b09000 R vce_v4_0_ip_funcs +ffffffff82b090a0 R vce_v4_0_ip_block +ffffffff82b090b8 r vce_v4_0_ring_vm_funcs +ffffffff82b091d8 r vce_v4_0_irq_funcs +ffffffff82b0a000 r vcn_v1_0_ip_funcs +ffffffff82b0a0a0 R vcn_v1_0_ip_block +ffffffff82b0a0b8 r vcn_v1_0_dec_ring_vm_funcs +ffffffff82b0a1d8 r vcn_v1_0_enc_ring_vm_funcs +ffffffff82b0a2f8 r vcn_v1_0_irq_funcs +ffffffff82b0b000 r vcn_v2_0_ip_funcs +ffffffff82b0b0a0 R vcn_v2_0_ip_block +ffffffff82b0b0b8 r vcn_v2_0_dec_ring_vm_funcs +ffffffff82b0b1d8 r vcn_v2_0_enc_ring_vm_funcs +ffffffff82b0b2f8 r vcn_v2_0_irq_funcs +ffffffff82b0c000 r vcn_v2_5_ip_funcs +ffffffff82b0c0a0 R vcn_v2_5_ip_block +ffffffff82b0c0b8 r vcn_v2_6_ip_funcs +ffffffff82b0c158 R vcn_v2_6_ip_block +ffffffff82b0c170 R vcn_v2_6_ras_hw_ops +ffffffff82b0c1b0 r vcn_v2_5_dec_ring_vm_funcs +ffffffff82b0c2d0 r vcn_v2_6_dec_ring_vm_funcs +ffffffff82b0c3f0 r vcn_v2_5_enc_ring_vm_funcs +ffffffff82b0c510 r vcn_v2_6_enc_ring_vm_funcs +ffffffff82b0c630 r vcn_v2_5_irq_funcs +ffffffff82b0d000 r vcn_v3_0_ip_funcs +ffffffff82b0d0a0 R vcn_v3_0_ip_block +ffffffff82b0d0b8 r vcn_v3_0_dec_ring_vm_funcs +ffffffff82b0d1d8 r vcn_v3_0_enc_ring_vm_funcs +ffffffff82b0d2f8 r vcn_v3_0_irq_funcs +ffffffff82b0e000 r vcn_v4_0_ip_funcs +ffffffff82b0e0a0 R vcn_v4_0_ip_block +ffffffff82b0e0b8 r vcn_v4_0_unified_ring_vm_funcs +ffffffff82b0e1d8 r vcn_v4_0_irq_funcs +ffffffff82b0f000 R vega10_ih_ip_funcs +ffffffff82b0f0a0 R vega10_ih_ip_block +ffffffff82b0f0b8 r vega10_ih_funcs +ffffffff82b0f0d8 r vega10_ih_self_irq_funcs +ffffffff82b10000 r GC_BASE +ffffffff82b10064 r HDP_BASE +ffffffff82b100c8 r MMHUB_BASE +ffffffff82b1012c r ATHUB_BASE +ffffffff82b10190 r NBIO_BASE +ffffffff82b101f4 r MP0_BASE +ffffffff82b10258 r MP1_BASE +ffffffff82b102bc r VCE_BASE +ffffffff82b10320 r VCN_BASE +ffffffff82b10384 r DF_BASE +ffffffff82b103e8 r DCE_BASE +ffffffff82b1044c r OSSSYS_BASE +ffffffff82b104b0 r SDMA0_BASE +ffffffff82b10514 r SDMA1_BASE +ffffffff82b10578 r SMUIO_BASE +ffffffff82b105dc r PWR_BASE +ffffffff82b10640 r NBIF_BASE +ffffffff82b106a4 r THM_BASE +ffffffff82b10708 r CLK_BASE +ffffffff82b11000 R vega20_ih_ip_funcs +ffffffff82b110a0 R vega20_ih_ip_block +ffffffff82b110b8 r vega20_ih_funcs +ffffffff82b110d8 r vega20_ih_self_irq_funcs +ffffffff82b12000 r GC_BASE +ffffffff82b12090 r HDP_BASE +ffffffff82b12120 r MMHUB_BASE +ffffffff82b121b0 r ATHUB_BASE +ffffffff82b12240 r NBIO_BASE +ffffffff82b122d0 r MP0_BASE +ffffffff82b12360 r MP1_BASE +ffffffff82b123f0 r UVD_BASE +ffffffff82b12480 r VCE_BASE +ffffffff82b12510 r DF_BASE +ffffffff82b125a0 r DCE_BASE +ffffffff82b12630 r OSSSYS_BASE +ffffffff82b126c0 r SDMA0_BASE +ffffffff82b12750 r SDMA1_BASE +ffffffff82b127e0 r SMUIO_BASE +ffffffff82b12870 r THM_BASE +ffffffff82b12900 r CLK_BASE +ffffffff82b12990 r UMC_BASE +ffffffff82b12a20 r RSMU_BASE +ffffffff82b13000 r vi_common_ip_block +ffffffff82b13018 r vi_common_ip_funcs +ffffffff82b130b8 r vi_asic_funcs +ffffffff82b13170 r vi_allowed_read_registers +ffffffff82b133d0 r topaz_video_codecs_encode +ffffffff82b133e0 r topaz_video_codecs_decode +ffffffff82b133f0 r tonga_video_codecs_encode +ffffffff82b13400 r tonga_video_codecs_decode +ffffffff82b13410 r polaris_video_codecs_encode +ffffffff82b13420 r cz_video_codecs_decode +ffffffff82b13430 r tonga_video_codecs_encode_array +ffffffff82b13450 r tonga_video_codecs_decode_array +ffffffff82b134a0 r polaris_video_codecs_encode_array +ffffffff82b134d0 r cz_video_codecs_decode_array +ffffffff82b13550 r iceland_mgcg_cgcg_init +ffffffff82b13590 r fiji_mgcg_cgcg_init +ffffffff82b135f0 r tonga_mgcg_cgcg_init +ffffffff82b13650 r cz_mgcg_cgcg_init +ffffffff82b13690 r stoney_mgcg_cgcg_init +ffffffff82b14000 r amdgpu_dm_funcs +ffffffff82b140a0 R dm_ip_block +ffffffff82b140b8 R amdgpu_dm_encoder_helper_funcs +ffffffff82b14120 r dm_display_funcs +ffffffff82b14180 r hpd_disconnect_quirk_table +ffffffff82b14ef0 r amdgpu_dm_mode_funcs +ffffffff82b14f38 r amdgpu_dm_encoder_funcs +ffffffff82b14f58 r amdgpu_dm_connector_funcs +ffffffff82b14fd0 r amdgpu_dm_connector_helper_funcs +ffffffff82b15020 r amdgpu_dm_i2c_algo +ffffffff82b151f0 r add_fs_modes.common_rates +ffffffff82b15220 r amdgpu_dm_backlight_ops +ffffffff82b16000 r amdgpu_dm_crtc_funcs +ffffffff82b160c0 r amdgpu_dm_crtc_helper_funcs +ffffffff82b17000 r dm_dtn_log_begin.msg +ffffffff82b1700d r dm_dtn_log_end.msg +ffffffff82b17018 r SYNAPTICS_DEVICE_ID +ffffffff82b18000 r dm_crtc_irq_funcs +ffffffff82b18010 r dm_vline0_irq_funcs +ffffffff82b18020 r dm_dmub_outbox_irq_funcs +ffffffff82b18030 r dm_vupdate_irq_funcs +ffffffff82b18040 r dm_dmub_trace_irq_funcs +ffffffff82b18050 r dm_pageflip_irq_funcs +ffffffff82b18060 r dm_hpd_irq_funcs +ffffffff82b19000 r amdgpu_dm_encoder_funcs +ffffffff82b19020 r dm_mst_cbs +ffffffff82b19030 r dm_dp_mst_connector_funcs +ffffffff82b190a8 r dm_dp_mst_connector_helper_funcs +ffffffff82b1a000 r dm_plane_funcs +ffffffff82b1a068 r dm_plane_helper_funcs +ffffffff82b1c000 r vbios_funcs +ffffffff82b1d000 r vbios_funcs ffffffff82b22000 r command_table_helper_funcs -ffffffff82b23000 r dce80_max_clks_by_state -ffffffff82b23028 r disp_clk_regs -ffffffff82b2307c r disp_clk_shift -ffffffff82b23088 r disp_clk_mask -ffffffff82b24000 r dce110_max_clks_by_state -ffffffff82b24028 r disp_clk_regs -ffffffff82b2407c r disp_clk_shift -ffffffff82b24088 r disp_clk_mask -ffffffff82b25000 r dce112_max_clks_by_state -ffffffff82b25028 r disp_clk_regs -ffffffff82b2507c r disp_clk_shift -ffffffff82b25088 r disp_clk_mask -ffffffff82b26000 r dce120_max_clks_by_state -ffffffff82b27000 r clk_mgr_regs -ffffffff82b27054 r clk_mgr_shift -ffffffff82b27060 r clk_mgr_mask -ffffffff82b28000 r clk_mgr_regs -ffffffff82b28054 r clk_mgr_shift -ffffffff82b28060 r clk_mgr_mask -ffffffff82b29000 r clk_mgr_regs -ffffffff82b29054 r clk_mgr_shift -ffffffff82b29060 r clk_mgr_mask -ffffffff82b2a000 r lpddr5_wm_table -ffffffff82b2a0c0 r ddr5_wm_table -ffffffff82b2b000 r lpddr5_wm_table -ffffffff82b2b0c0 r ddr5_wm_table -ffffffff82b2c000 r lpddr5_wm_table -ffffffff82b2c0c0 r ddr5_wm_table +ffffffff82b23000 r command_table_helper_funcs +ffffffff82b24000 r command_table_helper_funcs +ffffffff82b25000 r command_table_helper_funcs +ffffffff82b26000 r dce80_max_clks_by_state +ffffffff82b26028 r disp_clk_regs +ffffffff82b2607c r disp_clk_shift +ffffffff82b26088 r disp_clk_mask +ffffffff82b27000 r dce110_max_clks_by_state +ffffffff82b27028 r disp_clk_regs +ffffffff82b2707c r disp_clk_shift +ffffffff82b27088 r disp_clk_mask +ffffffff82b28000 r dce112_max_clks_by_state +ffffffff82b28028 r disp_clk_regs +ffffffff82b2807c r disp_clk_shift +ffffffff82b28088 r disp_clk_mask +ffffffff82b29000 r dce120_max_clks_by_state +ffffffff82b2a000 r clk_mgr_regs +ffffffff82b2a054 r clk_mgr_shift +ffffffff82b2a060 r clk_mgr_mask +ffffffff82b2b000 r clk_mgr_regs +ffffffff82b2b054 r clk_mgr_shift +ffffffff82b2b060 r clk_mgr_mask +ffffffff82b2c000 r clk_mgr_regs +ffffffff82b2c054 r clk_mgr_shift +ffffffff82b2c060 r clk_mgr_mask ffffffff82b2d000 r lpddr5_wm_table -ffffffff82b2d0c0 r ddr4_wm_table -ffffffff82b2e000 r clk_mgr_regs_dcn321 -ffffffff82b2e054 r clk_mgr_shift_dcn321 -ffffffff82b2e060 r clk_mgr_mask_dcn321 -ffffffff82b2e084 r clk_mgr_regs_dcn32 -ffffffff82b2e0d8 r clk_mgr_shift_dcn32 -ffffffff82b2e0e4 r clk_mgr_mask_dcn32 -ffffffff82b2f000 r DC_BUILD_ID -ffffffff82b31000 r output_csc_matrix -ffffffff82b310e0 r black_color_format -ffffffff82b32000 r DP_SINK_BRANCH_DEV_NAME_7580 -ffffffff82b33000 r DP_VGA_DONGLE_BRANCH_DEV_NAME -ffffffff82b33006 r DP_DVI_CONVERTER_ID_4 -ffffffff82b3300d r DP_DVI_CONVERTER_ID_5 -ffffffff82b34000 r DP_VGA_LVDS_CONVERTER_ID_2 -ffffffff82b34007 r DP_VGA_LVDS_CONVERTER_ID_3 -ffffffff82b34010 r dp_lt_fallbacks -ffffffff82b35000 r mandatory_dpcd_partitions -ffffffff82b37000 r dce_funcs -ffffffff82b38000 r funcs -ffffffff82b39000 R video_optimized_pixel_rates -ffffffff82b391b0 r dce110_clk_src_funcs -ffffffff82b391d8 r dce112_clk_src_funcs -ffffffff82b39200 r dcn20_clk_src_funcs -ffffffff82b39228 r dcn3_clk_src_funcs -ffffffff82b39250 r dcn31_clk_src_funcs +ffffffff82b2d0c0 r ddr5_wm_table +ffffffff82b2e000 r lpddr5_wm_table +ffffffff82b2e0c0 r ddr5_wm_table +ffffffff82b2f000 r lpddr5_wm_table +ffffffff82b2f0c0 r ddr5_wm_table +ffffffff82b30000 r lpddr5_wm_table +ffffffff82b300c0 r ddr4_wm_table +ffffffff82b31000 r clk_mgr_regs_dcn321 +ffffffff82b31054 r clk_mgr_shift_dcn321 +ffffffff82b31060 r clk_mgr_mask_dcn321 +ffffffff82b31084 r clk_mgr_regs_dcn32 +ffffffff82b310d8 r clk_mgr_shift_dcn32 +ffffffff82b310e4 r clk_mgr_mask_dcn32 +ffffffff82b32000 r DC_BUILD_ID +ffffffff82b34000 r output_csc_matrix +ffffffff82b340e0 r black_color_format +ffffffff82b35000 r DP_SINK_BRANCH_DEV_NAME_7580 +ffffffff82b36000 r DP_VGA_DONGLE_BRANCH_DEV_NAME +ffffffff82b36006 r DP_DVI_CONVERTER_ID_4 +ffffffff82b3600d r DP_DVI_CONVERTER_ID_5 +ffffffff82b37000 r DP_VGA_LVDS_CONVERTER_ID_2 +ffffffff82b37007 r DP_VGA_LVDS_CONVERTER_ID_3 +ffffffff82b37010 r dp_lt_fallbacks +ffffffff82b38000 r mandatory_dpcd_partitions ffffffff82b3a000 r dce_funcs -ffffffff82b3a068 r dcn10_funcs -ffffffff82b3a0d0 r dcn20_funcs -ffffffff82b3a138 r dcn21_funcs -ffffffff82b3b000 r dce_ipp_funcs -ffffffff82b3c000 r dce110_lnk_enc_funcs -ffffffff82b3d000 r dce_mi_funcs -ffffffff82b3d090 r dce112_mi_funcs -ffffffff82b3d120 r dce120_mi_funcs -ffffffff82b3d1b0 r pte_settings -ffffffff82b3e000 r funcs -ffffffff82b3f000 r dce_link_panel_cntl_funcs -ffffffff82b40000 r filter_3tap_16p_upscale -ffffffff82b40040 r filter_3tap_16p_116 -ffffffff82b40080 r filter_3tap_16p_149 -ffffffff82b400c0 r filter_3tap_16p_183 -ffffffff82b40100 r filter_3tap_64p_upscale -ffffffff82b401d0 r filter_3tap_64p_116 -ffffffff82b402a0 r filter_3tap_64p_149 -ffffffff82b40370 r filter_3tap_64p_183 -ffffffff82b40440 r filter_4tap_16p_upscale -ffffffff82b40490 r filter_4tap_16p_116 -ffffffff82b404e0 r filter_4tap_16p_149 -ffffffff82b40530 r filter_4tap_16p_183 -ffffffff82b40580 r filter_4tap_64p_upscale -ffffffff82b40690 r filter_4tap_64p_116 -ffffffff82b407a0 r filter_4tap_64p_149 -ffffffff82b408b0 r filter_4tap_64p_183 -ffffffff82b409c0 r filter_5tap_64p_upscale -ffffffff82b40b10 r filter_5tap_64p_116 -ffffffff82b40c60 r filter_5tap_64p_149 -ffffffff82b40db0 r filter_5tap_64p_183 -ffffffff82b40f00 r filter_6tap_64p_upscale -ffffffff82b41090 r filter_6tap_64p_116 -ffffffff82b41220 r filter_6tap_64p_149 -ffffffff82b413b0 r filter_6tap_64p_183 -ffffffff82b41540 r filter_7tap_64p_upscale -ffffffff82b41710 r filter_7tap_64p_116 -ffffffff82b418e0 r filter_7tap_64p_149 -ffffffff82b41ab0 r filter_7tap_64p_183 -ffffffff82b41c80 r filter_8tap_64p_upscale -ffffffff82b41e90 r filter_8tap_64p_116 -ffffffff82b420a0 r filter_8tap_64p_149 -ffffffff82b422b0 r filter_8tap_64p_183 -ffffffff82b424c0 r filter_2tap_16p -ffffffff82b424f0 r filter_2tap_64p -ffffffff82b43000 r audio_clock_info_table_48bpc -ffffffff82b43190 r audio_clock_info_table_36bpc -ffffffff82b43320 r audio_clock_info_table -ffffffff82b434e0 r dce110_str_enc_funcs -ffffffff82b44000 r global_color_matrix -ffffffff82b440a8 r dce_transform_funcs -ffffffff82b45000 r abm_funcs -ffffffff82b46000 r psr_funcs -ffffffff82b46040 r DP_SINK_DEVICE_STR_ID_1 -ffffffff82b46045 r DP_SINK_DEVICE_STR_ID_2 -ffffffff82b47000 r reg_offsets -ffffffff82b48000 r bios_regs -ffffffff82b48008 r res_cap -ffffffff82b48050 r clk_src_regs -ffffffff82b4814c r dmcu_regs -ffffffff82b481a8 r dmcu_shift -ffffffff82b481bc r dmcu_mask -ffffffff82b48208 r abm_regs -ffffffff82b48248 r abm_shift -ffffffff82b4825c r abm_mask -ffffffff82b482b0 r dce100_tg_offsets -ffffffff82b482f8 r plane_cap -ffffffff82b48328 r res_create_funcs -ffffffff82b48358 r dce100_res_pool_funcs -ffffffff82b48440 r panel_cntl_regs -ffffffff82b48460 r panel_cntl_shift -ffffffff82b48470 r panel_cntl_mask -ffffffff82b484b0 r link_enc_regs -ffffffff82b48870 r link_enc_aux_regs -ffffffff82b488c0 r link_enc_hpd_regs -ffffffff82b488d8 r link_enc_feature -ffffffff82b488e8 r cs_shift -ffffffff82b488f4 r cs_mask -ffffffff82b48920 r mi_regs -ffffffff82b48c38 r mi_shifts -ffffffff82b48c80 r mi_masks -ffffffff82b48da0 r ipp_regs -ffffffff82b48f98 r ipp_shift -ffffffff82b48fc0 r ipp_mask -ffffffff82b49060 r xfm_regs -ffffffff82b49600 r xfm_shift -ffffffff82b49660 r xfm_mask -ffffffff82b497e0 r opp_regs -ffffffff82b49930 r opp_shift -ffffffff82b4995c r opp_mask -ffffffff82b49a10 r aux_engine_regs -ffffffff82b49b00 r aux_mask -ffffffff82b49b60 r aux_shift -ffffffff82b49b80 r i2c_hw_regs -ffffffff82b49cd0 r i2c_shifts -ffffffff82b49cfc r i2c_masks -ffffffff82b49da0 r audio_regs -ffffffff82b49ed4 r audio_shift -ffffffff82b49eec r audio_mask -ffffffff82b49f30 r stream_enc_regs -ffffffff82b4a5dc r se_shift -ffffffff82b4a660 r se_mask -ffffffff82b4a864 r hwseq_reg -ffffffff82b4aa80 r hwseq_shift -ffffffff82b4ab00 r hwseq_mask -ffffffff82b4b000 r reg_offsets -ffffffff82b4b018 r dce110_compressor_funcs -ffffffff82b4c000 r dce110_funcs -ffffffff82b4c2c0 r dce110_private_funcs -ffffffff82b4d000 r dce110_mem_input_v_funcs -ffffffff82b4d090 r dvmm_Hw_Setting_1DTiling -ffffffff82b4d120 r dvmm_Hw_Setting_2DTiling -ffffffff82b4d1b0 r dvmm_Hw_Setting_Linear -ffffffff82b4e000 r global_color_matrix -ffffffff82b4e0b0 r input_csc_matrix -ffffffff82b4f000 r funcs -ffffffff82b50000 r bios_regs -ffffffff82b50008 r dce110_res_pool_funcs -ffffffff82b500f0 r clk_src_regs -ffffffff82b501ec r dmcu_regs -ffffffff82b50248 r dmcu_shift -ffffffff82b5025c r dmcu_mask -ffffffff82b502a8 r abm_regs -ffffffff82b502e8 r abm_shift -ffffffff82b502fc r abm_mask -ffffffff82b50350 r dce110_tg_offsets -ffffffff82b50398 r res_create_funcs -ffffffff82b503c8 r plane_cap -ffffffff82b503f4 r underlay_plane_cap -ffffffff82b50420 r stoney_resource_cap -ffffffff82b5045c r carrizo_resource_cap -ffffffff82b504a0 r panel_cntl_regs -ffffffff82b504c0 r panel_cntl_shift -ffffffff82b504d0 r panel_cntl_mask -ffffffff82b50510 r link_enc_regs -ffffffff82b508d0 r link_enc_aux_regs -ffffffff82b50920 r link_enc_hpd_regs -ffffffff82b50938 r link_enc_feature -ffffffff82b50948 r cs_shift -ffffffff82b50954 r cs_mask -ffffffff82b50980 r mi_regs -ffffffff82b50b0c r mi_shifts -ffffffff82b50b54 r mi_masks -ffffffff82b50c70 r ipp_regs -ffffffff82b50d6c r ipp_shift -ffffffff82b50d94 r ipp_mask -ffffffff82b50e30 r xfm_regs -ffffffff82b51100 r xfm_shift -ffffffff82b51160 r xfm_mask -ffffffff82b512e0 r opp_regs -ffffffff82b51430 r opp_shift -ffffffff82b5145c r opp_mask -ffffffff82b51510 r aux_engine_regs -ffffffff82b51600 r aux_mask -ffffffff82b51660 r aux_shift -ffffffff82b51680 r i2c_hw_regs -ffffffff82b517d0 r i2c_shifts -ffffffff82b517fc r i2c_masks -ffffffff82b518a0 r audio_regs -ffffffff82b519d4 r audio_shift -ffffffff82b519ec r audio_mask -ffffffff82b51a30 r stream_enc_regs -ffffffff82b51d0c r se_shift -ffffffff82b51d90 r se_mask -ffffffff82b51f94 r hwseq_stoney_reg -ffffffff82b521b0 r hwseq_cz_reg -ffffffff82b523cc r hwseq_shift -ffffffff82b5244c r hwseq_mask -ffffffff82b53000 r dce110_tg_funcs -ffffffff82b54000 r dce110_tg_v_funcs -ffffffff82b55000 r dce110_xfmv_funcs -ffffffff82b56000 r reg_offsets -ffffffff82b57000 r reg_offsets -ffffffff82b58000 r bios_regs -ffffffff82b58010 r clk_src_regs -ffffffff82b58208 r dmcu_regs -ffffffff82b58264 r dmcu_shift -ffffffff82b58278 r dmcu_mask -ffffffff82b582c4 r abm_regs -ffffffff82b58304 r abm_shift -ffffffff82b58318 r abm_mask -ffffffff82b58360 r dce112_tg_offsets -ffffffff82b583a8 r res_create_funcs -ffffffff82b583d8 r plane_cap -ffffffff82b58404 r polaris_11_resource_cap -ffffffff82b58440 r polaris_10_resource_cap -ffffffff82b58480 r dce112_res_pool_funcs -ffffffff82b58560 r panel_cntl_regs -ffffffff82b58580 r panel_cntl_shift -ffffffff82b58590 r panel_cntl_mask -ffffffff82b585d0 r link_enc_regs -ffffffff82b58990 r link_enc_aux_regs -ffffffff82b589e0 r link_enc_hpd_regs -ffffffff82b589f8 r link_enc_feature -ffffffff82b58a08 r cs_shift -ffffffff82b58a14 r cs_mask -ffffffff82b58a40 r mi_regs -ffffffff82b58d58 r mi_shifts -ffffffff82b58da0 r mi_masks -ffffffff82b58ec0 r ipp_regs -ffffffff82b590b8 r ipp_shift -ffffffff82b590e0 r ipp_mask -ffffffff82b59180 r xfm_regs -ffffffff82b59720 r xfm_shift -ffffffff82b59780 r xfm_mask -ffffffff82b59900 r opp_regs -ffffffff82b59a50 r opp_shift -ffffffff82b59a7c r opp_mask -ffffffff82b59b30 r aux_engine_regs -ffffffff82b59c20 r aux_mask -ffffffff82b59c80 r aux_shift -ffffffff82b59ca0 r i2c_hw_regs -ffffffff82b59df0 r i2c_shifts -ffffffff82b59e1c r i2c_masks -ffffffff82b59ec0 r audio_regs -ffffffff82b59fc8 r audio_shift -ffffffff82b59fe0 r audio_mask -ffffffff82b5a020 r stream_enc_regs -ffffffff82b5a5d8 r se_shift -ffffffff82b5a65c r se_mask -ffffffff82b5a860 r hwseq_reg -ffffffff82b5aa7c r hwseq_shift -ffffffff82b5aafc r hwseq_mask +ffffffff82b3b000 r funcs +ffffffff82b3c000 R video_optimized_pixel_rates +ffffffff82b3c1b0 r dce110_clk_src_funcs +ffffffff82b3c1d8 r dce112_clk_src_funcs +ffffffff82b3c200 r dcn20_clk_src_funcs +ffffffff82b3c228 r dcn3_clk_src_funcs +ffffffff82b3c250 r dcn31_clk_src_funcs +ffffffff82b3d000 r dce_funcs +ffffffff82b3d068 r dcn10_funcs +ffffffff82b3d0d0 r dcn20_funcs +ffffffff82b3d138 r dcn21_funcs +ffffffff82b3e000 r dce_ipp_funcs +ffffffff82b3f000 r dce110_lnk_enc_funcs +ffffffff82b40000 r dce_mi_funcs +ffffffff82b40090 r dce112_mi_funcs +ffffffff82b40120 r dce120_mi_funcs +ffffffff82b401b0 r pte_settings +ffffffff82b41000 r funcs +ffffffff82b42000 r dce_link_panel_cntl_funcs +ffffffff82b43000 r filter_3tap_16p_upscale +ffffffff82b43040 r filter_3tap_16p_116 +ffffffff82b43080 r filter_3tap_16p_149 +ffffffff82b430c0 r filter_3tap_16p_183 +ffffffff82b43100 r filter_3tap_64p_upscale +ffffffff82b431d0 r filter_3tap_64p_116 +ffffffff82b432a0 r filter_3tap_64p_149 +ffffffff82b43370 r filter_3tap_64p_183 +ffffffff82b43440 r filter_4tap_16p_upscale +ffffffff82b43490 r filter_4tap_16p_116 +ffffffff82b434e0 r filter_4tap_16p_149 +ffffffff82b43530 r filter_4tap_16p_183 +ffffffff82b43580 r filter_4tap_64p_upscale +ffffffff82b43690 r filter_4tap_64p_116 +ffffffff82b437a0 r filter_4tap_64p_149 +ffffffff82b438b0 r filter_4tap_64p_183 +ffffffff82b439c0 r filter_5tap_64p_upscale +ffffffff82b43b10 r filter_5tap_64p_116 +ffffffff82b43c60 r filter_5tap_64p_149 +ffffffff82b43db0 r filter_5tap_64p_183 +ffffffff82b43f00 r filter_6tap_64p_upscale +ffffffff82b44090 r filter_6tap_64p_116 +ffffffff82b44220 r filter_6tap_64p_149 +ffffffff82b443b0 r filter_6tap_64p_183 +ffffffff82b44540 r filter_7tap_64p_upscale +ffffffff82b44710 r filter_7tap_64p_116 +ffffffff82b448e0 r filter_7tap_64p_149 +ffffffff82b44ab0 r filter_7tap_64p_183 +ffffffff82b44c80 r filter_8tap_64p_upscale +ffffffff82b44e90 r filter_8tap_64p_116 +ffffffff82b450a0 r filter_8tap_64p_149 +ffffffff82b452b0 r filter_8tap_64p_183 +ffffffff82b454c0 r filter_2tap_16p +ffffffff82b454f0 r filter_2tap_64p +ffffffff82b46000 r audio_clock_info_table_48bpc +ffffffff82b46190 r audio_clock_info_table_36bpc +ffffffff82b46320 r audio_clock_info_table +ffffffff82b464e0 r dce110_str_enc_funcs +ffffffff82b47000 r global_color_matrix +ffffffff82b470a8 r dce_transform_funcs +ffffffff82b48000 r abm_funcs +ffffffff82b49000 r psr_funcs +ffffffff82b49040 r DP_SINK_DEVICE_STR_ID_1 +ffffffff82b49045 r DP_SINK_DEVICE_STR_ID_2 +ffffffff82b4a000 r reg_offsets +ffffffff82b4b000 r bios_regs +ffffffff82b4b008 r res_cap +ffffffff82b4b050 r clk_src_regs +ffffffff82b4b14c r dmcu_regs +ffffffff82b4b1a8 r dmcu_shift +ffffffff82b4b1bc r dmcu_mask +ffffffff82b4b208 r abm_regs +ffffffff82b4b248 r abm_shift +ffffffff82b4b25c r abm_mask +ffffffff82b4b2b0 r dce100_tg_offsets +ffffffff82b4b2f8 r plane_cap +ffffffff82b4b328 r res_create_funcs +ffffffff82b4b358 r dce100_res_pool_funcs +ffffffff82b4b440 r panel_cntl_regs +ffffffff82b4b460 r panel_cntl_shift +ffffffff82b4b470 r panel_cntl_mask +ffffffff82b4b4b0 r link_enc_regs +ffffffff82b4b870 r link_enc_aux_regs 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r dce110_compressor_funcs +ffffffff82b4f000 r dce110_funcs +ffffffff82b4f2c0 r dce110_private_funcs +ffffffff82b50000 r dce110_mem_input_v_funcs +ffffffff82b50090 r dvmm_Hw_Setting_1DTiling +ffffffff82b50120 r dvmm_Hw_Setting_2DTiling +ffffffff82b501b0 r dvmm_Hw_Setting_Linear +ffffffff82b51000 r global_color_matrix +ffffffff82b510b0 r input_csc_matrix +ffffffff82b52000 r funcs +ffffffff82b53000 r bios_regs +ffffffff82b53008 r dce110_res_pool_funcs +ffffffff82b530f0 r clk_src_regs +ffffffff82b531ec r dmcu_regs +ffffffff82b53248 r dmcu_shift +ffffffff82b5325c r dmcu_mask +ffffffff82b532a8 r abm_regs +ffffffff82b532e8 r abm_shift +ffffffff82b532fc r abm_mask +ffffffff82b53350 r dce110_tg_offsets +ffffffff82b53398 r res_create_funcs +ffffffff82b533c8 r plane_cap +ffffffff82b533f4 r underlay_plane_cap +ffffffff82b53420 r stoney_resource_cap +ffffffff82b5345c r carrizo_resource_cap +ffffffff82b534a0 r panel_cntl_regs +ffffffff82b534c0 r panel_cntl_shift +ffffffff82b534d0 r panel_cntl_mask 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+ffffffff82b553cc r hwseq_shift +ffffffff82b5544c r hwseq_mask +ffffffff82b56000 r dce110_tg_funcs +ffffffff82b57000 r dce110_tg_v_funcs +ffffffff82b58000 r dce110_xfmv_funcs +ffffffff82b59000 r reg_offsets +ffffffff82b5a000 r reg_offsets ffffffff82b5b000 r bios_regs -ffffffff82b5b008 r res_cap -ffffffff82b5b048 r dce120_res_pool_funcs -ffffffff82b5b128 r debug_defaults -ffffffff82b5b2a0 r clk_src_regs -ffffffff82b5b498 r dmcu_regs -ffffffff82b5b4f4 r dmcu_shift -ffffffff82b5b508 r dmcu_mask -ffffffff82b5b554 r abm_regs -ffffffff82b5b594 r abm_shift -ffffffff82b5b5a8 r abm_mask -ffffffff82b5b5f0 r dce120_tg_offsets -ffffffff82b5b638 r dce121_res_create_funcs -ffffffff82b5b668 r res_create_funcs -ffffffff82b5b698 r plane_cap -ffffffff82b5b6d0 r panel_cntl_regs -ffffffff82b5b6f0 r panel_cntl_shift -ffffffff82b5b700 r panel_cntl_mask -ffffffff82b5b740 r link_enc_regs -ffffffff82b5bb00 r link_enc_aux_regs -ffffffff82b5bb50 r link_enc_hpd_regs -ffffffff82b5bb68 r link_enc_feature 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le_shift -ffffffff82b71e50 r le_mask -ffffffff82b72208 r link_enc_feature -ffffffff82b72218 r cs_shift -ffffffff82b72224 r cs_mask -ffffffff82b72250 r hubp_regs -ffffffff82b72900 r hubp_shift -ffffffff82b729c4 r hubp_mask -ffffffff82b72cd0 r ipp_regs -ffffffff82b72db0 r ipp_shift -ffffffff82b72dcc r ipp_mask -ffffffff82b72e40 r tf_regs -ffffffff82b73da0 r tf_shift -ffffffff82b74008 r tf_mask -ffffffff82b749a0 r opp_regs -ffffffff82b74a70 r opp_shift -ffffffff82b74a90 r opp_mask -ffffffff82b74b10 r tg_regs -ffffffff82b75010 r tg_shift -ffffffff82b750d0 r tg_mask -ffffffff82b753d0 r aux_engine_regs -ffffffff82b754c0 r aux_mask -ffffffff82b75520 r aux_shift -ffffffff82b75540 r i2c_hw_regs -ffffffff82b75690 r i2c_shifts -ffffffff82b756bc r i2c_masks -ffffffff82b75760 r mpc_regs -ffffffff82b75880 r mpc_shift -ffffffff82b75898 r mpc_mask -ffffffff82b758f4 r hubbub_reg -ffffffff82b75a68 r hubbub_shift -ffffffff82b75af0 r hubbub_mask -ffffffff82b75d10 r audio_regs -ffffffff82b75dc0 r audio_shift -ffffffff82b75dd8 r audio_mask -ffffffff82b75e20 r stream_enc_regs -ffffffff82b76370 r se_shift -ffffffff82b7644c r se_mask -ffffffff82b767b8 r hwseq_reg -ffffffff82b769d4 r hwseq_shift -ffffffff82b76a54 r hwseq_mask -ffffffff82b77000 r audio_clock_info_table_48bpc -ffffffff82b77190 r audio_clock_info_table_36bpc -ffffffff82b77320 r audio_clock_info_table -ffffffff82b774e0 r dcn10_str_enc_funcs -ffffffff82b78000 r dccg2_funcs -ffffffff82b7a000 r dpp_input_csc_matrix -ffffffff82b7b000 R dcn20_dsc_funcs -ffffffff82b7c000 R dcn20_dwbc_funcs -ffffffff82b7d000 r filter_12tap_16p_upscale -ffffffff82b7d0e0 r filter_12tap_16p_117 -ffffffff82b7d1c0 r filter_12tap_16p_150 -ffffffff82b7d2a0 r filter_12tap_16p_183 -ffffffff82b7d380 r filter_11tap_16p_upscale -ffffffff82b7d450 r filter_11tap_16p_117 -ffffffff82b7d520 r filter_11tap_16p_150 -ffffffff82b7d5f0 r filter_11tap_16p_183 -ffffffff82b7d6c0 r filter_10tap_16p_upscale -ffffffff82b7d780 r filter_10tap_16p_117 -ffffffff82b7d840 r filter_10tap_16p_150 -ffffffff82b7d900 r filter_10tap_16p_183 -ffffffff82b7d9c0 r filter_9tap_16p_upscale -ffffffff82b7da70 r filter_9tap_16p_117 -ffffffff82b7db20 r filter_9tap_16p_150 -ffffffff82b7dbd0 r filter_9tap_16p_183 -ffffffff82b7dc80 r filter_8tap_16p_upscale -ffffffff82b7dd10 r filter_8tap_16p_117 -ffffffff82b7dda0 r filter_8tap_16p_150 -ffffffff82b7de30 r filter_8tap_16p_183 -ffffffff82b7dec0 r filter_7tap_16p_upscale -ffffffff82b7df40 r filter_7tap_16p_117 -ffffffff82b7dfc0 r filter_7tap_16p_150 -ffffffff82b7e040 r filter_7tap_16p_183 -ffffffff82b7e0c0 r filter_6tap_16p_upscale -ffffffff82b7e130 r filter_6tap_16p_117 -ffffffff82b7e1a0 r filter_6tap_16p_150 -ffffffff82b7e210 r filter_6tap_16p_183 -ffffffff82b7e280 r filter_5tap_16p_upscale -ffffffff82b7e2e0 r filter_5tap_16p_117 -ffffffff82b7e340 r filter_5tap_16p_150 -ffffffff82b7e3a0 r filter_5tap_16p_183 -ffffffff82b7e400 r filter_4tap_16p_upscale -ffffffff82b7e450 r filter_4tap_16p_117 -ffffffff82b7e4a0 r filter_4tap_16p_150 -ffffffff82b7e4f0 r filter_4tap_16p_183 -ffffffff82b7e540 r filter_3tap_16p_upscale -ffffffff82b7e580 r filter_3tap_16p_117 -ffffffff82b7e5c0 r filter_3tap_16p_150 -ffffffff82b7e600 r filter_3tap_16p_183 -ffffffff82b7f000 r hubbub2_funcs -ffffffff82b80000 r dcn20_funcs -ffffffff82b802c0 r dcn20_private_funcs -ffffffff82b81000 r dcn2_mpll_cfg -ffffffff82b81190 r dcn20_link_enc_funcs -ffffffff82b82000 R dcn20_mmhubbub_funcs -ffffffff82b83000 R dcn20_mpc_funcs -ffffffff82b84000 r tf_regs -ffffffff82b85920 r tf_shift -ffffffff82b85ba4 r tf_mask -ffffffff82b865c0 r ipp_regs -ffffffff82b86710 r ipp_shift -ffffffff82b8672c r ipp_mask -ffffffff82b867a0 r opp_regs -ffffffff82b869b0 r opp_shift -ffffffff82b869e8 r opp_mask -ffffffff82b86ac0 r aux_engine_regs -ffffffff82b86bb0 r aux_mask -ffffffff82b86c10 r aux_shift -ffffffff82b86c30 r i2c_hw_regs -ffffffff82b86d80 r i2c_shifts -ffffffff82b86dac r i2c_masks -ffffffff82b86e50 r mpc_regs -ffffffff82b87398 r mpc_shift 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-ffffffff82b8c190 r mcif_wb20_shift -ffffffff82b8c230 r mcif_wb20_mask -ffffffff82b8c4b0 r link_enc_feature -ffffffff82b8c4c0 r bios_regs -ffffffff82b8c4c8 r dcn20_res_pool_funcs -ffffffff82b8c5a8 r res_cap_nv14 -ffffffff82b8c5e8 r debug_defaults_drv -ffffffff82b8c760 r debug_defaults_diags -ffffffff82b8c8e0 r clk_src_regs -ffffffff82b8cad8 r dccg_regs -ffffffff82b8cbc4 r dccg_shift -ffffffff82b8cc5c r dccg_mask -ffffffff82b8ceb8 r dmcu_regs -ffffffff82b8cf14 r dmcu_shift -ffffffff82b8cf28 r dmcu_mask -ffffffff82b8cf74 r abm_regs -ffffffff82b8cfb4 r abm_shift -ffffffff82b8cfc8 r abm_mask -ffffffff82b8d010 r res_create_funcs -ffffffff82b8d040 r res_create_maximus_funcs -ffffffff82b8d070 r plane_cap -ffffffff82b8d0a0 r panel_cntl_regs -ffffffff82b8d0c0 r panel_cntl_shift -ffffffff82b8d0d0 r panel_cntl_mask -ffffffff82b8d10c r cs_shift -ffffffff82b8d118 r cs_mask -ffffffff82b8d140 r audio_regs -ffffffff82b8d274 r audio_shift -ffffffff82b8d28c r audio_mask -ffffffff82b8e000 r dcn20_str_enc_funcs -ffffffff82b8f000 r dccg201_funcs -ffffffff82b90000 r hubbub201_funcs -ffffffff82b91000 r dcn201_funcs -ffffffff82b912c0 r dcn201_private_funcs -ffffffff82b92000 r dcn201_link_enc_funcs -ffffffff82b93000 R dcn201_mpc_funcs -ffffffff82b94000 r bios_regs -ffffffff82b94008 r res_cap_dnc201 -ffffffff82b94048 r debug_defaults_drv -ffffffff82b941c0 r clk_src_regs -ffffffff82b94268 r dccg_regs -ffffffff82b94354 r dccg_shift -ffffffff82b943ec r dccg_mask -ffffffff82b94648 r res_create_funcs -ffffffff82b94678 r res_create_maximus_funcs -ffffffff82b946a8 r plane_cap -ffffffff82b946e0 r link_enc_regs -ffffffff82b94970 r link_enc_aux_regs -ffffffff82b94990 r link_enc_hpd_regs -ffffffff82b94998 r le_shift -ffffffff82b94a88 r le_mask -ffffffff82b94e40 r link_enc_feature -ffffffff82b94e50 r cs_shift -ffffffff82b94e5c r cs_mask -ffffffff82b94e90 r hubp_regs -ffffffff82b95620 r hubp_shift -ffffffff82b956f8 r hubp_mask -ffffffff82b95a60 r ipp_regs -ffffffff82b95b40 r ipp_shift -ffffffff82b95b5c r ipp_mask -ffffffff82b95bd0 r tf_regs -ffffffff82b96c10 r tf_shift -ffffffff82b96e94 r tf_mask -ffffffff82b978b0 r opp_regs -ffffffff82b97960 r opp_shift -ffffffff82b97998 r opp_mask -ffffffff82b97a70 r aux_engine_regs -ffffffff82b97ac0 r aux_mask -ffffffff82b97b20 r aux_shift -ffffffff82b97b40 r i2c_hw_regs -ffffffff82b97bb0 r i2c_shifts -ffffffff82b97bdc r i2c_masks -ffffffff82b97c80 r tg_regs -ffffffff82b97f00 r tg_shift -ffffffff82b97fc0 r tg_mask -ffffffff82b982c0 r mpc_regs -ffffffff82b98808 r mpc_shift -ffffffff82b98854 r mpc_mask -ffffffff82b9897c r hubbub_reg -ffffffff82b98af0 r hubbub_shift -ffffffff82b98b78 r hubbub_mask -ffffffff82b98da0 r audio_regs -ffffffff82b98df8 r audio_shift -ffffffff82b98e10 r audio_mask -ffffffff82b98e50 r stream_enc_regs -ffffffff82b990f8 r se_shift -ffffffff82b991d4 r se_mask -ffffffff82b99540 r hwseq_reg -ffffffff82b9975c r hwseq_shift -ffffffff82b997dc r hwseq_mask -ffffffff82b9a000 r dccg21_funcs -ffffffff82b9b000 r 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debug_defaults_drv -ffffffff82c0a668 r cs_shift -ffffffff82c0a674 r cs_mask -ffffffff82c0a69c r hubbub_reg -ffffffff82c0a810 r hubbub_shift -ffffffff82c0a898 r hubbub_mask -ffffffff82c0aac0 r vmid_regs -ffffffff82c0ac80 r vmid_shifts -ffffffff82c0ac88 r vmid_masks -ffffffff82c0acb0 r hubp_regs -ffffffff82c0b4e0 r hubp_shift -ffffffff82c0b5dc r hubp_mask -ffffffff82c0b9d0 r dpp_regs -ffffffff82c0ced0 r tf_shift -ffffffff82c0d1a0 r tf_mask -ffffffff82c0dce0 r opp_regs -ffffffff82c0de40 r opp_shift -ffffffff82c0de78 r opp_mask -ffffffff82c0df50 r optc_regs -ffffffff82c0e450 r optc_shift -ffffffff82c0e510 r optc_mask -ffffffff82c0e810 r mpc_regs -ffffffff82c0fffc r mpc_shift -ffffffff82c100d8 r mpc_mask -ffffffff82c10450 r dsc_regs -ffffffff82c1069c r dsc_shift -ffffffff82c10754 r dsc_mask -ffffffff82c10a30 r dwbc30_regs -ffffffff82c10c0c r dwbc30_shift -ffffffff82c10d40 r dwbc30_mask -ffffffff82c11210 r mcif_wb30_regs -ffffffff82c1130c r mcif_wb30_shift -ffffffff82c113b8 r mcif_wb30_mask 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tf_mask -ffffffff82c1d1c4 r opp_shift -ffffffff82c1d1fc r opp_mask -ffffffff82c1d2d0 r optc_shift -ffffffff82c1d390 r optc_mask -ffffffff82c1d690 r mpc_shift -ffffffff82c1d76c r mpc_mask -ffffffff82c1dad8 r dsc_shift -ffffffff82c1db90 r dsc_mask -ffffffff82c1de68 r dwbc30_shift -ffffffff82c1df9c r dwbc30_mask -ffffffff82c1e464 r mcif_wb30_shift -ffffffff82c1e510 r mcif_wb30_mask -ffffffff82c1e7bc r aux_mask -ffffffff82c1e81c r aux_shift -ffffffff82c1e834 r i2c_shifts -ffffffff82c1e860 r i2c_masks -ffffffff82c1e904 r audio_shift -ffffffff82c1e91c r audio_mask -ffffffff82c1e958 r se_shift -ffffffff82c1ea34 r se_mask -ffffffff82c1eda0 r vpg_shift -ffffffff82c1edc8 r vpg_mask -ffffffff82c1ee5c r afmt_shift -ffffffff82c1ee70 r afmt_mask -ffffffff82c1eeb4 r hpo_dp_se_shift -ffffffff82c1eedc r hpo_dp_se_mask -ffffffff82c1ef7c r apg_shift -ffffffff82c1ef84 r apg_mask -ffffffff82c1ef9c r hpo_dp_le_shift -ffffffff82c1efb8 r hpo_dp_le_mask -ffffffff82c1f01c r hwseq_shift -ffffffff82c1f09c r hwseq_mask -ffffffff82c20000 r dcn321_link_enc_funcs -ffffffff82c21000 r res_cap_dcn321 -ffffffff82c21040 r debug_defaults_diags -ffffffff82c211b8 r dccg_shift -ffffffff82c21250 r dccg_mask -ffffffff82c214ac r abm_shift -ffffffff82c214c0 r abm_mask -ffffffff82c21508 r res_create_funcs -ffffffff82c21538 r res_create_maximus_funcs -ffffffff82c21568 r plane_cap -ffffffff82c21594 r le_shift -ffffffff82c21684 r le_mask -ffffffff82c21a3c r link_enc_feature -ffffffff82c21a50 r debug_defaults_drv -ffffffff82c21bc8 r cs_shift -ffffffff82c21bd4 r cs_mask -ffffffff82c21bfc r hubbub_shift -ffffffff82c21c84 r hubbub_mask -ffffffff82c21ea0 r vmid_shifts -ffffffff82c21ea8 r vmid_masks -ffffffff82c21ec8 r hubp_shift -ffffffff82c21fc4 r hubp_mask -ffffffff82c223b4 r tf_shift -ffffffff82c22684 r tf_mask -ffffffff82c231c4 r opp_shift -ffffffff82c231fc r opp_mask -ffffffff82c232d0 r optc_shift -ffffffff82c23390 r optc_mask -ffffffff82c23690 r mpc_shift -ffffffff82c2376c r mpc_mask -ffffffff82c23ad8 r dsc_shift -ffffffff82c23b90 r dsc_mask -ffffffff82c23e68 r dwbc30_shift -ffffffff82c23f9c r dwbc30_mask -ffffffff82c24464 r mcif_wb30_shift -ffffffff82c24510 r mcif_wb30_mask -ffffffff82c247bc r aux_mask -ffffffff82c2481c r aux_shift -ffffffff82c24834 r i2c_shifts -ffffffff82c24860 r i2c_masks -ffffffff82c24904 r audio_shift -ffffffff82c2491c r audio_mask -ffffffff82c24958 r se_shift -ffffffff82c24a34 r se_mask -ffffffff82c24da0 r vpg_shift -ffffffff82c24dc8 r vpg_mask -ffffffff82c24e5c r afmt_shift -ffffffff82c24e70 r afmt_mask -ffffffff82c24eb4 r hpo_dp_se_shift -ffffffff82c24edc r hpo_dp_se_mask -ffffffff82c24f7c r apg_shift -ffffffff82c24f84 r apg_mask -ffffffff82c24f9c r hpo_dp_le_shift -ffffffff82c24fb8 r hpo_dp_le_mask -ffffffff82c2501c r hwseq_shift -ffffffff82c2509c r hwseq_mask -ffffffff82c27000 R dcn10_soc_defaults -ffffffff82c2708c R dcn10_ip_defaults -ffffffff82c32000 R dml20_funcs -ffffffff82c32030 R dml20v2_funcs -ffffffff82c32060 R dml21_funcs -ffffffff82c32090 R dml30_funcs -ffffffff82c320c0 R dml31_funcs -ffffffff82c320f0 R dml314_funcs -ffffffff82c32120 R dml32_funcs -ffffffff82c35000 R qp_table_422_10bpc_min -ffffffff82c35740 R qp_table_444_8bpc_max -ffffffff82c36080 R qp_table_420_12bpc_max -ffffffff82c367c0 R qp_table_444_10bpc_min -ffffffff82c37400 R qp_table_420_8bpc_max -ffffffff82c37840 R qp_table_444_8bpc_min -ffffffff82c38180 R qp_table_444_12bpc_min -ffffffff82c390c0 R qp_table_420_12bpc_min -ffffffff82c39800 R qp_table_422_12bpc_min -ffffffff82c3a140 R qp_table_422_12bpc_max -ffffffff82c3aa80 R qp_table_444_12bpc_max -ffffffff82c3b9c0 R qp_table_420_8bpc_min -ffffffff82c3be00 R qp_table_422_8bpc_min -ffffffff82c3c340 R qp_table_422_10bpc_max -ffffffff82c3ca80 R qp_table_420_10bpc_max -ffffffff82c3d040 R qp_table_420_10bpc_min -ffffffff82c3d600 R qp_table_444_10bpc_max -ffffffff82c3e240 R qp_table_422_8bpc_max -ffffffff82c40000 r funcs -ffffffff82c40050 r hpd_regs -ffffffff82c401a0 r hpd_shift -ffffffff82c401b0 r hpd_mask -ffffffff82c401c0 r ddc_data_regs -ffffffff82c403a0 r ddc_clk_regs -ffffffff82c40580 r ddc_shift -ffffffff82c405a8 r ddc_mask -ffffffff82c41000 r funcs -ffffffff82c42000 r funcs -ffffffff82c42050 r hpd_regs -ffffffff82c421a0 r hpd_shift -ffffffff82c421b0 r hpd_mask -ffffffff82c421c0 r ddc_data_regs -ffffffff82c423a0 r ddc_clk_regs -ffffffff82c42580 r ddc_shift -ffffffff82c425a8 r ddc_mask +ffffffff82b5b010 r clk_src_regs +ffffffff82b5b208 r dmcu_regs +ffffffff82b5b264 r dmcu_shift +ffffffff82b5b278 r dmcu_mask +ffffffff82b5b2c4 r abm_regs +ffffffff82b5b304 r abm_shift +ffffffff82b5b318 r abm_mask +ffffffff82b5b360 r dce112_tg_offsets +ffffffff82b5b3a8 r res_create_funcs +ffffffff82b5b3d8 r plane_cap +ffffffff82b5b404 r polaris_11_resource_cap +ffffffff82b5b440 r polaris_10_resource_cap +ffffffff82b5b480 r dce112_res_pool_funcs +ffffffff82b5b560 r panel_cntl_regs +ffffffff82b5b580 r panel_cntl_shift +ffffffff82b5b590 r panel_cntl_mask +ffffffff82b5b5d0 r link_enc_regs +ffffffff82b5b990 r link_enc_aux_regs +ffffffff82b5b9e0 r link_enc_hpd_regs +ffffffff82b5b9f8 r link_enc_feature +ffffffff82b5ba08 r cs_shift +ffffffff82b5ba14 r cs_mask +ffffffff82b5ba40 r mi_regs +ffffffff82b5bd58 r mi_shifts +ffffffff82b5bda0 r mi_masks +ffffffff82b5bec0 r ipp_regs +ffffffff82b5c0b8 r ipp_shift +ffffffff82b5c0e0 r ipp_mask +ffffffff82b5c180 r xfm_regs +ffffffff82b5c720 r xfm_shift +ffffffff82b5c780 r xfm_mask +ffffffff82b5c900 r opp_regs +ffffffff82b5ca50 r opp_shift +ffffffff82b5ca7c r opp_mask +ffffffff82b5cb30 r aux_engine_regs +ffffffff82b5cc20 r aux_mask +ffffffff82b5cc80 r aux_shift +ffffffff82b5cca0 r i2c_hw_regs +ffffffff82b5cdf0 r i2c_shifts +ffffffff82b5ce1c r i2c_masks +ffffffff82b5cec0 r audio_regs +ffffffff82b5cfc8 r audio_shift +ffffffff82b5cfe0 r audio_mask +ffffffff82b5d020 r stream_enc_regs +ffffffff82b5d5d8 r se_shift +ffffffff82b5d65c r se_mask +ffffffff82b5d860 r hwseq_reg +ffffffff82b5da7c r hwseq_shift +ffffffff82b5dafc r hwseq_mask +ffffffff82b5e000 r bios_regs +ffffffff82b5e008 r res_cap +ffffffff82b5e048 r dce120_res_pool_funcs +ffffffff82b5e128 r debug_defaults +ffffffff82b5e2a0 r clk_src_regs +ffffffff82b5e498 r dmcu_regs +ffffffff82b5e4f4 r dmcu_shift +ffffffff82b5e508 r dmcu_mask +ffffffff82b5e554 r abm_regs +ffffffff82b5e594 r abm_shift +ffffffff82b5e5a8 r abm_mask +ffffffff82b5e5f0 r dce120_tg_offsets +ffffffff82b5e638 r dce121_res_create_funcs +ffffffff82b5e668 r res_create_funcs +ffffffff82b5e698 r plane_cap +ffffffff82b5e6d0 r panel_cntl_regs +ffffffff82b5e6f0 r panel_cntl_shift +ffffffff82b5e700 r panel_cntl_mask +ffffffff82b5e740 r link_enc_regs +ffffffff82b5eb00 r link_enc_aux_regs +ffffffff82b5eb50 r link_enc_hpd_regs +ffffffff82b5eb68 r link_enc_feature +ffffffff82b5eb78 r cs_shift +ffffffff82b5eb84 r cs_mask +ffffffff82b5ebb0 r mi_regs +ffffffff82b5eec8 r mi_shifts +ffffffff82b5ef10 r mi_masks +ffffffff82b5f030 r ipp_regs +ffffffff82b5f228 r ipp_shift +ffffffff82b5f250 r ipp_mask +ffffffff82b5f2f0 r xfm_regs +ffffffff82b5f890 r xfm_shift +ffffffff82b5f8f0 r xfm_mask +ffffffff82b5fa70 r opp_regs +ffffffff82b5fbc0 r opp_shift +ffffffff82b5fbec r opp_mask +ffffffff82b5fca0 r aux_engine_regs +ffffffff82b5fd90 r aux_mask +ffffffff82b5fdf0 r aux_shift +ffffffff82b5fe10 r i2c_hw_regs +ffffffff82b5ff60 r i2c_shifts +ffffffff82b5ff8c r i2c_masks +ffffffff82b60030 r audio_regs +ffffffff82b60164 r audio_shift +ffffffff82b6017c r audio_mask +ffffffff82b601c0 r stream_enc_regs +ffffffff82b60778 r se_shift +ffffffff82b607fc r se_mask +ffffffff82b60a00 r dce121_hwseq_reg +ffffffff82b60c1c r dce121_hwseq_shift +ffffffff82b60c9c r dce121_hwseq_mask +ffffffff82b60e90 r hwseq_reg +ffffffff82b610ac r hwseq_shift +ffffffff82b6112c r hwseq_mask +ffffffff82b62000 r dce120_tg_funcs +ffffffff82b63000 r bios_regs +ffffffff82b63008 r res_cap +ffffffff82b63048 r dce80_res_pool_funcs +ffffffff82b63130 r clk_src_regs +ffffffff82b6322c r dmcu_regs +ffffffff82b63288 r dmcu_shift +ffffffff82b6329c r dmcu_mask +ffffffff82b632e8 r abm_regs +ffffffff82b63328 r abm_shift +ffffffff82b6333c r abm_mask +ffffffff82b63390 r dce80_tg_offsets +ffffffff82b633d8 r plane_cap +ffffffff82b63408 r res_create_funcs +ffffffff82b63440 r panel_cntl_regs +ffffffff82b63460 r panel_cntl_shift +ffffffff82b63470 r panel_cntl_mask +ffffffff82b634b0 r link_enc_regs +ffffffff82b63870 r link_enc_aux_regs +ffffffff82b638c0 r link_enc_hpd_regs +ffffffff82b638d8 r link_enc_feature +ffffffff82b638e8 r cs_shift +ffffffff82b638f4 r cs_mask +ffffffff82b63920 r mi_regs +ffffffff82b63c38 r mi_shifts +ffffffff82b63c80 r mi_masks +ffffffff82b63da0 r ipp_regs +ffffffff82b63f98 r ipp_shift +ffffffff82b63fc0 r ipp_mask +ffffffff82b64060 r xfm_regs +ffffffff82b64600 r xfm_shift +ffffffff82b64660 r xfm_mask +ffffffff82b647e0 r opp_regs +ffffffff82b64930 r opp_shift +ffffffff82b6495c r opp_mask +ffffffff82b64a10 r aux_engine_regs +ffffffff82b64b00 r aux_mask +ffffffff82b64b60 r aux_shift +ffffffff82b64b80 r i2c_hw_regs +ffffffff82b64cd0 r i2c_shifts +ffffffff82b64cfc r i2c_masks +ffffffff82b64da0 r audio_regs +ffffffff82b64ed4 r audio_shift +ffffffff82b64eec r audio_mask +ffffffff82b64f30 r stream_enc_regs +ffffffff82b655dc r se_shift +ffffffff82b65660 r se_mask +ffffffff82b65864 r hwseq_reg +ffffffff82b65a80 r hwseq_shift +ffffffff82b65b00 r hwseq_mask +ffffffff82b65cf4 r res_cap_81 +ffffffff82b65d30 r res_cap_83 +ffffffff82b66000 r reg_offsets +ffffffff82b66048 r dce80_tg_funcs +ffffffff82b67000 r dcn10_dpp_funcs +ffffffff82b68000 r dpp_input_csc_matrix +ffffffff82b6a000 r hubbub1_funcs +ffffffff82b6b000 r dcn10_hubp_funcs +ffffffff82b6c000 r reduceSizeAndFraction.prime_numbers +ffffffff82b6e000 r dcn10_funcs +ffffffff82b6e2c0 r dcn10_private_funcs +ffffffff82b6f000 r dcn10_ipp_funcs +ffffffff82b6f048 r dcn20_ipp_funcs +ffffffff82b70000 r dcn10_lnk_enc_funcs +ffffffff82b71000 r dcn10_mpc_funcs +ffffffff82b72000 r dcn10_opp_funcs +ffffffff82b73000 r dcn10_tg_funcs +ffffffff82b74000 r bios_regs +ffffffff82b74008 r rv2_res_cap +ffffffff82b74044 r res_cap +ffffffff82b74080 r debug_defaults_drv +ffffffff82b741f8 r debug_defaults_diags +ffffffff82b74370 r clk_src_regs +ffffffff82b744c0 r dmcu_regs +ffffffff82b7451c r dmcu_shift +ffffffff82b74530 r dmcu_mask +ffffffff82b7457c r abm_regs +ffffffff82b745bc r abm_shift +ffffffff82b745d0 r abm_mask +ffffffff82b74618 r res_create_funcs +ffffffff82b74648 r res_create_maximus_funcs +ffffffff82b74678 r plane_cap +ffffffff82b746a8 r dcn10_res_pool_funcs +ffffffff82b74790 r panel_cntl_regs +ffffffff82b747b0 r panel_cntl_shift +ffffffff82b747c0 r panel_cntl_mask +ffffffff82b74800 r link_enc_regs +ffffffff82b74d10 r link_enc_aux_regs +ffffffff82b74d50 r link_enc_hpd_regs +ffffffff82b74d60 r le_shift +ffffffff82b74e50 r le_mask +ffffffff82b75208 r link_enc_feature +ffffffff82b75218 r cs_shift +ffffffff82b75224 r cs_mask +ffffffff82b75250 r hubp_regs +ffffffff82b75900 r hubp_shift +ffffffff82b759c4 r hubp_mask +ffffffff82b75cd0 r ipp_regs +ffffffff82b75db0 r ipp_shift +ffffffff82b75dcc r ipp_mask +ffffffff82b75e40 r tf_regs +ffffffff82b76da0 r tf_shift +ffffffff82b77008 r tf_mask +ffffffff82b779a0 r opp_regs +ffffffff82b77a70 r opp_shift +ffffffff82b77a90 r opp_mask +ffffffff82b77b10 r tg_regs +ffffffff82b78010 r tg_shift +ffffffff82b780d0 r tg_mask +ffffffff82b783d0 r aux_engine_regs +ffffffff82b784c0 r aux_mask +ffffffff82b78520 r aux_shift +ffffffff82b78540 r i2c_hw_regs +ffffffff82b78690 r i2c_shifts +ffffffff82b786bc r i2c_masks +ffffffff82b78760 r mpc_regs +ffffffff82b78880 r mpc_shift +ffffffff82b78898 r mpc_mask +ffffffff82b788f4 r hubbub_reg +ffffffff82b78a68 r hubbub_shift +ffffffff82b78af0 r hubbub_mask +ffffffff82b78d10 r audio_regs +ffffffff82b78dc0 r audio_shift +ffffffff82b78dd8 r audio_mask +ffffffff82b78e20 r stream_enc_regs +ffffffff82b79370 r se_shift +ffffffff82b7944c r se_mask +ffffffff82b797b8 r hwseq_reg +ffffffff82b799d4 r hwseq_shift +ffffffff82b79a54 r hwseq_mask +ffffffff82b7a000 r audio_clock_info_table_48bpc +ffffffff82b7a190 r audio_clock_info_table_36bpc +ffffffff82b7a320 r audio_clock_info_table +ffffffff82b7a4e0 r dcn10_str_enc_funcs +ffffffff82b7b000 r dccg2_funcs +ffffffff82b7d000 r dpp_input_csc_matrix +ffffffff82b7e000 R dcn20_dsc_funcs +ffffffff82b7f000 R dcn20_dwbc_funcs +ffffffff82b80000 r filter_12tap_16p_upscale +ffffffff82b800e0 r filter_12tap_16p_117 +ffffffff82b801c0 r filter_12tap_16p_150 +ffffffff82b802a0 r filter_12tap_16p_183 +ffffffff82b80380 r filter_11tap_16p_upscale +ffffffff82b80450 r filter_11tap_16p_117 +ffffffff82b80520 r filter_11tap_16p_150 +ffffffff82b805f0 r filter_11tap_16p_183 +ffffffff82b806c0 r filter_10tap_16p_upscale +ffffffff82b80780 r filter_10tap_16p_117 +ffffffff82b80840 r filter_10tap_16p_150 +ffffffff82b80900 r filter_10tap_16p_183 +ffffffff82b809c0 r filter_9tap_16p_upscale +ffffffff82b80a70 r filter_9tap_16p_117 +ffffffff82b80b20 r filter_9tap_16p_150 +ffffffff82b80bd0 r filter_9tap_16p_183 +ffffffff82b80c80 r filter_8tap_16p_upscale +ffffffff82b80d10 r filter_8tap_16p_117 +ffffffff82b80da0 r filter_8tap_16p_150 +ffffffff82b80e30 r filter_8tap_16p_183 +ffffffff82b80ec0 r filter_7tap_16p_upscale +ffffffff82b80f40 r filter_7tap_16p_117 +ffffffff82b80fc0 r filter_7tap_16p_150 +ffffffff82b81040 r filter_7tap_16p_183 +ffffffff82b810c0 r filter_6tap_16p_upscale +ffffffff82b81130 r filter_6tap_16p_117 +ffffffff82b811a0 r filter_6tap_16p_150 +ffffffff82b81210 r filter_6tap_16p_183 +ffffffff82b81280 r filter_5tap_16p_upscale +ffffffff82b812e0 r filter_5tap_16p_117 +ffffffff82b81340 r filter_5tap_16p_150 +ffffffff82b813a0 r filter_5tap_16p_183 +ffffffff82b81400 r filter_4tap_16p_upscale +ffffffff82b81450 r filter_4tap_16p_117 +ffffffff82b814a0 r filter_4tap_16p_150 +ffffffff82b814f0 r filter_4tap_16p_183 +ffffffff82b81540 r filter_3tap_16p_upscale +ffffffff82b81580 r filter_3tap_16p_117 +ffffffff82b815c0 r filter_3tap_16p_150 +ffffffff82b81600 r filter_3tap_16p_183 +ffffffff82b82000 r hubbub2_funcs +ffffffff82b83000 r dcn20_funcs +ffffffff82b832c0 r dcn20_private_funcs +ffffffff82b84000 r dcn2_mpll_cfg +ffffffff82b84190 r dcn20_link_enc_funcs +ffffffff82b85000 R dcn20_mmhubbub_funcs +ffffffff82b86000 R dcn20_mpc_funcs +ffffffff82b87000 r tf_regs +ffffffff82b88920 r tf_shift +ffffffff82b88ba4 r tf_mask +ffffffff82b895c0 r ipp_regs +ffffffff82b89710 r ipp_shift +ffffffff82b8972c r ipp_mask +ffffffff82b897a0 r opp_regs +ffffffff82b899b0 r opp_shift +ffffffff82b899e8 r opp_mask +ffffffff82b89ac0 r aux_engine_regs +ffffffff82b89bb0 r aux_mask +ffffffff82b89c10 r aux_shift +ffffffff82b89c30 r i2c_hw_regs +ffffffff82b89d80 r i2c_shifts +ffffffff82b89dac r i2c_masks +ffffffff82b89e50 r mpc_regs +ffffffff82b8a398 r mpc_shift +ffffffff82b8a3e0 r mpc_mask +ffffffff82b8a4f4 r hubbub_reg +ffffffff82b8a668 r hubbub_shift +ffffffff82b8a6f0 r hubbub_mask +ffffffff82b8a90c r res_cap_nv10 +ffffffff82b8a950 r vmid_regs +ffffffff82b8ab10 r vmid_shifts +ffffffff82b8ab18 r vmid_masks +ffffffff82b8ab40 r tg_regs +ffffffff82b8b2c0 r tg_shift +ffffffff82b8b380 r tg_mask +ffffffff82b8b680 r link_enc_regs +ffffffff82b8be20 r link_enc_aux_regs +ffffffff82b8be80 r link_enc_hpd_regs +ffffffff82b8be98 r le_shift +ffffffff82b8bf88 r le_mask +ffffffff82b8c340 r stream_enc_regs +ffffffff82b8cb38 r se_shift +ffffffff82b8cc14 r se_mask +ffffffff82b8cf80 r hwseq_reg +ffffffff82b8d19c r hwseq_shift +ffffffff82b8d21c r hwseq_mask +ffffffff82b8d410 r dsc_regs +ffffffff82b8d8a8 r dsc_shift +ffffffff82b8d960 r dsc_mask +ffffffff82b8dc40 r hubp_regs +ffffffff82b8e888 r hubp_shift +ffffffff82b8e984 r hubp_mask +ffffffff82b8ed80 r dwbc20_regs +ffffffff82b8ee38 r dwbc20_shift +ffffffff82b8eeb8 r dwbc20_mask +ffffffff82b8f0b0 r mcif_wb20_regs +ffffffff82b8f190 r mcif_wb20_shift +ffffffff82b8f230 r mcif_wb20_mask +ffffffff82b8f4b0 r link_enc_feature +ffffffff82b8f4c0 r bios_regs +ffffffff82b8f4c8 r dcn20_res_pool_funcs +ffffffff82b8f5a8 r res_cap_nv14 +ffffffff82b8f5e8 r debug_defaults_drv +ffffffff82b8f760 r debug_defaults_diags +ffffffff82b8f8e0 r clk_src_regs +ffffffff82b8fad8 r dccg_regs +ffffffff82b8fbc4 r dccg_shift +ffffffff82b8fc5c r dccg_mask +ffffffff82b8feb8 r dmcu_regs +ffffffff82b8ff14 r dmcu_shift +ffffffff82b8ff28 r dmcu_mask +ffffffff82b8ff74 r abm_regs +ffffffff82b8ffb4 r abm_shift +ffffffff82b8ffc8 r abm_mask +ffffffff82b90010 r res_create_funcs +ffffffff82b90040 r res_create_maximus_funcs +ffffffff82b90070 r plane_cap +ffffffff82b900a0 r panel_cntl_regs +ffffffff82b900c0 r panel_cntl_shift +ffffffff82b900d0 r panel_cntl_mask +ffffffff82b9010c r cs_shift +ffffffff82b90118 r cs_mask +ffffffff82b90140 r audio_regs +ffffffff82b90274 r audio_shift +ffffffff82b9028c r audio_mask +ffffffff82b91000 r dcn20_str_enc_funcs +ffffffff82b92000 r dccg201_funcs +ffffffff82b93000 r hubbub201_funcs +ffffffff82b94000 r dcn201_funcs +ffffffff82b942c0 r dcn201_private_funcs +ffffffff82b95000 r dcn201_link_enc_funcs +ffffffff82b96000 R dcn201_mpc_funcs +ffffffff82b97000 r bios_regs +ffffffff82b97008 r res_cap_dnc201 +ffffffff82b97048 r debug_defaults_drv +ffffffff82b971c0 r clk_src_regs +ffffffff82b97268 r dccg_regs +ffffffff82b97354 r dccg_shift +ffffffff82b973ec r dccg_mask +ffffffff82b97648 r res_create_funcs +ffffffff82b97678 r res_create_maximus_funcs +ffffffff82b976a8 r plane_cap +ffffffff82b976e0 r link_enc_regs +ffffffff82b97970 r link_enc_aux_regs +ffffffff82b97990 r link_enc_hpd_regs +ffffffff82b97998 r le_shift +ffffffff82b97a88 r le_mask +ffffffff82b97e40 r link_enc_feature +ffffffff82b97e50 r cs_shift +ffffffff82b97e5c r cs_mask +ffffffff82b97e90 r hubp_regs +ffffffff82b98620 r hubp_shift +ffffffff82b986f8 r hubp_mask +ffffffff82b98a60 r ipp_regs +ffffffff82b98b40 r ipp_shift +ffffffff82b98b5c r ipp_mask +ffffffff82b98bd0 r tf_regs +ffffffff82b99c10 r tf_shift +ffffffff82b99e94 r tf_mask +ffffffff82b9a8b0 r opp_regs +ffffffff82b9a960 r opp_shift +ffffffff82b9a998 r opp_mask +ffffffff82b9aa70 r aux_engine_regs +ffffffff82b9aac0 r aux_mask +ffffffff82b9ab20 r aux_shift +ffffffff82b9ab40 r i2c_hw_regs +ffffffff82b9abb0 r i2c_shifts +ffffffff82b9abdc r i2c_masks +ffffffff82b9ac80 r tg_regs +ffffffff82b9af00 r tg_shift +ffffffff82b9afc0 r tg_mask +ffffffff82b9b2c0 r mpc_regs +ffffffff82b9b808 r mpc_shift +ffffffff82b9b854 r mpc_mask +ffffffff82b9b97c r hubbub_reg +ffffffff82b9baf0 r hubbub_shift +ffffffff82b9bb78 r hubbub_mask +ffffffff82b9bda0 r audio_regs +ffffffff82b9bdf8 r audio_shift +ffffffff82b9be10 r audio_mask +ffffffff82b9be50 r stream_enc_regs +ffffffff82b9c0f8 r se_shift +ffffffff82b9c1d4 r se_mask +ffffffff82b9c540 r hwseq_reg +ffffffff82b9c75c r hwseq_shift +ffffffff82b9c7dc r hwseq_mask +ffffffff82b9d000 r dccg21_funcs +ffffffff82b9e000 r hubbub21_funcs +ffffffff82b9f000 r dcn21_funcs +ffffffff82b9f2c0 r dcn21_private_funcs +ffffffff82ba0000 r dcn21_mpll_cfg_ref +ffffffff82ba0190 r dcn21_link_enc_funcs +ffffffff82ba1000 r bios_regs +ffffffff82ba1008 r res_cap_rn +ffffffff82ba1048 r dcn21_res_pool_funcs +ffffffff82ba1128 r debug_defaults_drv +ffffffff82ba12a0 r debug_defaults_diags +ffffffff82ba1420 r clk_src_regs +ffffffff82ba15c4 r dccg_regs +ffffffff82ba16b0 r dccg_shift +ffffffff82ba1748 r dccg_mask +ffffffff82ba19a4 r dmcu_regs +ffffffff82ba1a00 r dmcu_shift +ffffffff82ba1a14 r dmcu_mask +ffffffff82ba1a60 r abm_regs +ffffffff82ba1aa0 r abm_shift +ffffffff82ba1ab4 r abm_mask +ffffffff82ba1b00 r res_create_funcs +ffffffff82ba1b30 r res_create_maximus_funcs +ffffffff82ba1b60 r plane_cap +ffffffff82ba1b90 r panel_cntl_regs +ffffffff82ba1bb0 r panel_cntl_shift +ffffffff82ba1bc0 r panel_cntl_mask +ffffffff82ba1c00 r link_enc_regs +ffffffff82ba2260 r link_enc_aux_regs +ffffffff82ba22b0 r link_enc_hpd_regs +ffffffff82ba22c4 r le_shift +ffffffff82ba23b4 r le_mask +ffffffff82ba276c r link_enc_feature +ffffffff82ba277c r panel_config_defaults +ffffffff82ba27b0 r cs_shift +ffffffff82ba27bc r cs_mask +ffffffff82ba27f0 r hubp_regs +ffffffff82ba3020 r hubp_shift +ffffffff82ba311c r hubp_mask +ffffffff82ba3510 r ipp_regs +ffffffff82ba35f0 r ipp_shift +ffffffff82ba360c r ipp_mask +ffffffff82ba3680 r tf_regs +ffffffff82ba4740 r tf_shift +ffffffff82ba49c4 r tf_mask +ffffffff82ba53e0 r opp_regs +ffffffff82ba55f0 r opp_shift +ffffffff82ba5628 r opp_mask +ffffffff82ba5700 r tg_regs +ffffffff82ba5c00 r tg_shift +ffffffff82ba5cc0 r tg_mask +ffffffff82ba5fc0 r aux_engine_regs +ffffffff82ba6088 r aux_mask +ffffffff82ba60e8 r aux_shift +ffffffff82ba6100 r i2c_hw_regs +ffffffff82ba6218 r i2c_shifts +ffffffff82ba6244 r i2c_masks +ffffffff82ba62e8 r mpc_regs +ffffffff82ba6830 r mpc_shift +ffffffff82ba6878 r mpc_mask +ffffffff82ba698c r hubbub_reg +ffffffff82ba6b00 r hubbub_shift +ffffffff82ba6b88 r hubbub_mask +ffffffff82ba6db0 r vmid_regs +ffffffff82ba6f70 r vmid_shifts +ffffffff82ba6f78 r vmid_masks +ffffffff82ba6fa0 r dsc_regs +ffffffff82ba7438 r dsc_shift +ffffffff82ba74f0 r dsc_mask +ffffffff82ba77d0 r audio_regs +ffffffff82ba78d8 r audio_shift +ffffffff82ba78f0 r audio_mask +ffffffff82ba7930 r stream_enc_regs +ffffffff82ba7fd4 r se_shift +ffffffff82ba80b0 r se_mask +ffffffff82ba841c r hwseq_reg +ffffffff82ba8638 r hwseq_shift +ffffffff82ba86b8 r hwseq_mask +ffffffff82ba9000 r dccg3_funcs +ffffffff82baa000 r dcn30_link_enc_funcs +ffffffff82bab000 r dcn30_str_enc_funcs +ffffffff82bac000 r dpp_input_csc_matrix +ffffffff82bad000 R dcn30_dwbc_funcs +ffffffff82bae000 r hubbub30_funcs +ffffffff82bb0000 r dcn30_funcs +ffffffff82bb02c0 r dcn30_private_funcs +ffffffff82bb1000 R dcn30_mmhubbub_funcs +ffffffff82bb2000 R dcn30_mpc_funcs +ffffffff82bb3000 r bios_regs +ffffffff82bb3008 r res_cap_dcn3 +ffffffff82bb3048 r debug_defaults_drv +ffffffff82bb31c0 r debug_defaults_diags +ffffffff82bb3340 r clk_src_regs +ffffffff82bb3538 r dccg_regs +ffffffff82bb3624 r dccg_shift +ffffffff82bb36bc r dccg_mask +ffffffff82bb3920 r abm_regs +ffffffff82bb3aa0 r abm_shift +ffffffff82bb3ab4 r abm_mask +ffffffff82bb3b00 r res_create_funcs +ffffffff82bb3b30 r res_create_maximus_funcs +ffffffff82bb3b60 r plane_cap +ffffffff82bb3b90 r dcn30_res_pool_funcs +ffffffff82bb3c70 r panel_cntl_regs +ffffffff82bb3c90 r panel_cntl_shift +ffffffff82bb3ca0 r panel_cntl_mask +ffffffff82bb3ce0 r link_enc_regs +ffffffff82bb4480 r link_enc_aux_regs +ffffffff82bb44e0 r link_enc_hpd_regs +ffffffff82bb44f8 r le_shift +ffffffff82bb45e8 r le_mask +ffffffff82bb49a0 r link_enc_feature +ffffffff82bb49b0 r cs_shift +ffffffff82bb49bc r cs_mask +ffffffff82bb49e4 r hubbub_reg +ffffffff82bb4b58 r hubbub_shift +ffffffff82bb4be0 r hubbub_mask +ffffffff82bb4e00 r vmid_regs +ffffffff82bb4fc0 r vmid_shifts +ffffffff82bb4fc8 r vmid_masks +ffffffff82bb4ff0 r hubp_regs +ffffffff82bb5c38 r hubp_shift +ffffffff82bb5d34 r hubp_mask +ffffffff82bb6130 r dpp_regs +ffffffff82bb80b0 r tf_shift +ffffffff82bb8380 r tf_mask +ffffffff82bb8ec0 r opp_regs +ffffffff82bb90d0 r opp_shift +ffffffff82bb9108 r opp_mask +ffffffff82bb91e0 r optc_regs +ffffffff82bb9960 r optc_shift +ffffffff82bb9a20 r optc_mask +ffffffff82bb9d20 r mpc_regs +ffffffff82bbb50c r mpc_shift +ffffffff82bbb5e8 r mpc_mask +ffffffff82bbb960 r dsc_regs +ffffffff82bbbdf8 r dsc_shift +ffffffff82bbbeb0 r dsc_mask +ffffffff82bbc190 r dwbc30_regs +ffffffff82bbc36c r dwbc30_shift +ffffffff82bbc4a0 r dwbc30_mask +ffffffff82bbc970 r mcif_wb30_regs +ffffffff82bbca6c r mcif_wb30_shift +ffffffff82bbcb18 r mcif_wb30_mask +ffffffff82bbcdd0 r aux_engine_regs +ffffffff82bbcec0 r aux_mask +ffffffff82bbcf20 r aux_shift +ffffffff82bbcf40 r i2c_hw_regs +ffffffff82bbd090 r i2c_shifts +ffffffff82bbd0bc r i2c_masks +ffffffff82bbd160 r audio_regs +ffffffff82bbd294 r audio_shift +ffffffff82bbd2ac r audio_mask +ffffffff82bbd2f0 r stream_enc_regs +ffffffff82bbdae8 r se_shift +ffffffff82bbdbc4 r se_mask +ffffffff82bbdf30 r vpg_regs +ffffffff82bbdfbc r vpg_shift +ffffffff82bbdfe4 r vpg_mask +ffffffff82bbe080 r afmt_regs +ffffffff82bbe17c r afmt_shift +ffffffff82bbe190 r afmt_mask +ffffffff82bbe1d4 r hwseq_reg +ffffffff82bbe3f0 r hwseq_shift +ffffffff82bbe470 r hwseq_mask +ffffffff82bbf000 r dccg301_funcs +ffffffff82bc0000 r dcn301_link_enc_funcs +ffffffff82bc1000 r hubbub301_funcs +ffffffff82bc2000 r dcn301_funcs +ffffffff82bc22c0 r dcn301_private_funcs +ffffffff82bc3000 r dcn301_link_panel_cntl_funcs +ffffffff82bc4000 r bios_regs +ffffffff82bc4008 r debug_defaults_drv +ffffffff82bc4180 r debug_defaults_diags +ffffffff82bc4300 r clk_src_regs +ffffffff82bc4450 r dccg_regs +ffffffff82bc453c r dccg_shift +ffffffff82bc45d4 r dccg_mask +ffffffff82bc4830 r abm_regs +ffffffff82bc4930 r abm_shift +ffffffff82bc4944 r abm_mask +ffffffff82bc4990 r res_create_funcs +ffffffff82bc49c0 r res_create_maximus_funcs +ffffffff82bc49f0 r plane_cap +ffffffff82bc4a20 r panel_cntl_regs +ffffffff82bc4a60 r panel_cntl_shift +ffffffff82bc4a70 r panel_cntl_mask +ffffffff82bc4ab0 r link_enc_regs +ffffffff82bc4fc0 r link_enc_aux_regs +ffffffff82bc5000 r link_enc_hpd_regs +ffffffff82bc5010 r le_shift +ffffffff82bc5100 r le_mask +ffffffff82bc54b8 r link_enc_feature +ffffffff82bc54c8 r cs_shift +ffffffff82bc54d4 r cs_mask +ffffffff82bc54fc r hubbub_reg +ffffffff82bc5670 r hubbub_shift +ffffffff82bc56f8 r hubbub_mask +ffffffff82bc5920 r vmid_regs +ffffffff82bc5ae0 r vmid_shifts +ffffffff82bc5ae8 r vmid_masks +ffffffff82bc5b10 r hubp_regs +ffffffff82bc6340 r hubp_shift +ffffffff82bc643c r hubp_mask +ffffffff82bc6830 r dpp_regs +ffffffff82bc7d30 r tf_shift +ffffffff82bc8000 r tf_mask +ffffffff82bc8b40 r opp_regs +ffffffff82bc8ca0 r opp_shift +ffffffff82bc8cd8 r opp_mask +ffffffff82bc8db0 r optc_regs +ffffffff82bc92b0 r optc_shift +ffffffff82bc9370 r optc_mask +ffffffff82bc9670 r mpc_regs +ffffffff82bcae5c r mpc_shift +ffffffff82bcaf38 r mpc_mask +ffffffff82bcb2b0 r dsc_regs +ffffffff82bcb4fc r dsc_shift +ffffffff82bcb5b4 r dsc_mask +ffffffff82bcb890 r dwbc30_regs +ffffffff82bcba6c r dwbc30_shift +ffffffff82bcbba0 r dwbc30_mask +ffffffff82bcc070 r mcif_wb30_regs +ffffffff82bcc16c r mcif_wb30_shift +ffffffff82bcc218 r mcif_wb30_mask +ffffffff82bcc4d0 r aux_engine_regs +ffffffff82bcc570 r aux_mask +ffffffff82bcc5d0 r aux_shift +ffffffff82bcc5f0 r i2c_hw_regs +ffffffff82bcc6d0 r i2c_shifts +ffffffff82bcc6fc r i2c_masks +ffffffff82bcc7a0 r audio_regs +ffffffff82bcc8d4 r audio_shift +ffffffff82bcc8ec r audio_mask +ffffffff82bcc930 r stream_enc_regs +ffffffff82bcce80 r se_shift +ffffffff82bccf5c r se_mask +ffffffff82bcd2d0 r vpg_regs +ffffffff82bcd320 r vpg_shift +ffffffff82bcd348 r vpg_mask +ffffffff82bcd3e0 r afmt_regs +ffffffff82bcd470 r afmt_shift +ffffffff82bcd484 r afmt_mask +ffffffff82bcd4c8 r hwseq_reg +ffffffff82bcd6e4 r hwseq_shift +ffffffff82bcd764 r hwseq_mask +ffffffff82bce000 r bios_regs +ffffffff82bce008 r res_cap_dcn302 +ffffffff82bce048 r debug_defaults_drv +ffffffff82bce1c0 r debug_defaults_diags +ffffffff82bce340 r clk_src_regs +ffffffff82bce4e4 r dccg_regs +ffffffff82bce5d0 r dccg_shift +ffffffff82bce668 r dccg_mask +ffffffff82bce8d0 r abm_regs +ffffffff82bcea10 r abm_shift +ffffffff82bcea24 r abm_mask +ffffffff82bcea70 r res_create_funcs +ffffffff82bceaa0 r res_create_maximus_funcs +ffffffff82bcead0 r plane_cap +ffffffff82bceb00 r panel_cntl_regs +ffffffff82bceb20 r panel_cntl_shift +ffffffff82bceb30 r panel_cntl_mask +ffffffff82bceb70 r link_enc_regs +ffffffff82bcf1d0 r link_enc_aux_regs +ffffffff82bcf220 r link_enc_hpd_regs +ffffffff82bcf234 r le_shift +ffffffff82bcf324 r le_mask +ffffffff82bcf6dc r link_enc_feature +ffffffff82bcf6ec r cs_shift +ffffffff82bcf6f8 r cs_mask +ffffffff82bcf720 r hubbub_reg +ffffffff82bcf894 r hubbub_shift +ffffffff82bcf91c r hubbub_mask +ffffffff82bcfb40 r vmid_regs +ffffffff82bcfd00 r vmid_shifts +ffffffff82bcfd08 r vmid_masks +ffffffff82bcfd30 r hubp_regs +ffffffff82bd076c r hubp_shift +ffffffff82bd0868 r hubp_mask +ffffffff82bd0c60 r dpp_regs +ffffffff82bd26a0 r tf_shift +ffffffff82bd2970 r tf_mask +ffffffff82bd34b0 r opp_regs +ffffffff82bd3668 r opp_shift +ffffffff82bd36a0 r opp_mask +ffffffff82bd3780 r optc_regs +ffffffff82bd3dc0 r optc_shift +ffffffff82bd3e80 r optc_mask +ffffffff82bd4180 r mpc_regs +ffffffff82bd596c r mpc_shift +ffffffff82bd5a48 r mpc_mask +ffffffff82bd5dc0 r dsc_regs +ffffffff82bd6194 r dsc_shift +ffffffff82bd624c r dsc_mask +ffffffff82bd6530 r dwbc30_regs +ffffffff82bd670c r dwbc30_shift +ffffffff82bd6840 r dwbc30_mask +ffffffff82bd6d10 r mcif_wb30_regs +ffffffff82bd6e0c r mcif_wb30_shift +ffffffff82bd6eb8 r mcif_wb30_mask +ffffffff82bd7170 r aux_engine_regs +ffffffff82bd7238 r aux_mask +ffffffff82bd7298 r aux_shift +ffffffff82bd72b0 r i2c_hw_regs +ffffffff82bd73c8 r i2c_shifts +ffffffff82bd73f4 r i2c_masks +ffffffff82bd74a0 r audio_regs +ffffffff82bd75d4 r audio_shift +ffffffff82bd75ec r audio_mask +ffffffff82bd7630 r stream_enc_regs +ffffffff82bd7cd4 r se_shift +ffffffff82bd7db0 r se_mask +ffffffff82bd8120 r vpg_regs +ffffffff82bd8198 r vpg_shift +ffffffff82bd81c0 r vpg_mask +ffffffff82bd8260 r afmt_regs +ffffffff82bd8338 r afmt_shift +ffffffff82bd834c r afmt_mask +ffffffff82bd8390 r hwseq_reg +ffffffff82bd85ac r hwseq_shift +ffffffff82bd862c r hwseq_mask +ffffffff82bd9000 r bios_regs +ffffffff82bd9008 r res_cap_dcn303 +ffffffff82bd9048 r debug_defaults_drv +ffffffff82bd91c0 r debug_defaults_diags +ffffffff82bd9340 r clk_src_regs +ffffffff82bd93e8 r dccg_regs +ffffffff82bd94d4 r dccg_shift +ffffffff82bd956c r dccg_mask +ffffffff82bd97d0 r abm_regs +ffffffff82bd9850 r abm_shift +ffffffff82bd9864 r abm_mask +ffffffff82bd98b0 r res_create_funcs +ffffffff82bd98e0 r res_create_maximus_funcs +ffffffff82bd9910 r plane_cap +ffffffff82bd9940 r panel_cntl_regs +ffffffff82bd9960 r panel_cntl_shift +ffffffff82bd9970 r panel_cntl_mask +ffffffff82bd99b0 r link_enc_regs +ffffffff82bd9c40 r link_enc_aux_regs +ffffffff82bd9c60 r link_enc_hpd_regs +ffffffff82bd9c68 r le_shift +ffffffff82bd9d58 r le_mask +ffffffff82bda110 r link_enc_feature +ffffffff82bda120 r cs_shift +ffffffff82bda12c r cs_mask +ffffffff82bda154 r hubbub_reg +ffffffff82bda2c8 r hubbub_shift +ffffffff82bda350 r hubbub_mask +ffffffff82bda570 r vmid_regs +ffffffff82bda730 r vmid_shifts +ffffffff82bda738 r vmid_masks +ffffffff82bda760 r hubp_regs +ffffffff82bdab78 r hubp_shift +ffffffff82bdac74 r hubp_mask +ffffffff82bdb070 r dpp_regs +ffffffff82bdbaf0 r tf_shift +ffffffff82bdbdc0 r tf_mask +ffffffff82bdc900 r opp_regs +ffffffff82bdc9b0 r opp_shift +ffffffff82bdc9e8 r opp_mask +ffffffff82bdcac0 r optc_regs +ffffffff82bdcd40 r optc_shift +ffffffff82bdce00 r optc_mask +ffffffff82bdd100 r mpc_regs +ffffffff82bde8ec r mpc_shift +ffffffff82bde9c8 r mpc_mask +ffffffff82bded40 r dsc_regs +ffffffff82bdeec8 r dsc_shift +ffffffff82bdef80 r dsc_mask +ffffffff82bdf260 r dwbc30_regs +ffffffff82bdf43c r dwbc30_shift +ffffffff82bdf570 r dwbc30_mask +ffffffff82bdfa40 r mcif_wb30_regs +ffffffff82bdfb3c r mcif_wb30_shift +ffffffff82bdfbe8 r mcif_wb30_mask +ffffffff82bdfea0 r aux_engine_regs +ffffffff82bdfef0 r aux_mask +ffffffff82bdff50 r aux_shift +ffffffff82bdff70 r i2c_hw_regs +ffffffff82bdffe0 r i2c_shifts +ffffffff82be000c r i2c_masks +ffffffff82be00b0 r audio_regs +ffffffff82be01e4 r audio_shift +ffffffff82be01fc r audio_mask +ffffffff82be0240 r stream_enc_regs +ffffffff82be04e8 r se_shift +ffffffff82be05c4 r se_mask +ffffffff82be0930 r vpg_regs +ffffffff82be096c r vpg_shift +ffffffff82be0994 r vpg_mask +ffffffff82be0a30 r afmt_regs +ffffffff82be0a9c r afmt_shift +ffffffff82be0ab0 r afmt_mask +ffffffff82be0af4 r hwseq_reg +ffffffff82be0d10 r hwseq_shift +ffffffff82be0d90 r hwseq_mask +ffffffff82be1000 r dccg31_funcs +ffffffff82be2000 r dcn31_link_enc_funcs +ffffffff82be3000 r dcn30_str_enc_funcs +ffffffff82be4000 r hubbub31_funcs +ffffffff82be5000 r dcn31_funcs +ffffffff82be52c0 r dcn31_private_funcs +ffffffff82be6000 r dcn31_link_panel_cntl_funcs +ffffffff82be7000 r bios_regs +ffffffff82be7008 r res_cap_dcn31 +ffffffff82be7048 r debug_defaults_diags +ffffffff82be71c0 r clk_src_regs +ffffffff82be7370 r clk_src_regs_b0 +ffffffff82be7514 r dccg_regs +ffffffff82be7600 r dccg_shift +ffffffff82be7698 r dccg_mask +ffffffff82be7900 r abm_regs +ffffffff82be7a00 r abm_shift +ffffffff82be7a14 r abm_mask +ffffffff82be7a60 r res_create_funcs +ffffffff82be7a90 r res_create_maximus_funcs +ffffffff82be7ac0 r plane_cap +ffffffff82be7af0 r link_enc_regs +ffffffff82be8150 r link_enc_aux_regs +ffffffff82be81a0 r link_enc_hpd_regs +ffffffff82be81b4 r le_shift +ffffffff82be82a4 r le_mask +ffffffff82be865c r link_enc_feature +ffffffff82be866c r panel_config_defaults +ffffffff82be86a0 r debug_defaults_drv +ffffffff82be8818 r cs_shift +ffffffff82be8824 r cs_mask +ffffffff82be884c r hubbub_reg +ffffffff82be89c0 r hubbub_shift +ffffffff82be8a48 r hubbub_mask +ffffffff82be8c70 r vmid_regs +ffffffff82be8e30 r vmid_shifts +ffffffff82be8e38 r vmid_masks +ffffffff82be8e60 r hubp_regs +ffffffff82be9690 r hubp_shift +ffffffff82be978c r hubp_mask +ffffffff82be9b80 r dpp_regs +ffffffff82beb080 r tf_shift +ffffffff82beb350 r tf_mask +ffffffff82bebe90 r opp_regs +ffffffff82bebff0 r opp_shift +ffffffff82bec028 r opp_mask +ffffffff82bec100 r optc_regs +ffffffff82bec600 r optc_shift +ffffffff82bec6c0 r optc_mask +ffffffff82bec9c0 r mpc_regs +ffffffff82bee1ac r mpc_shift +ffffffff82bee288 r mpc_mask +ffffffff82bee600 r dsc_regs +ffffffff82bee84c r dsc_shift +ffffffff82bee904 r dsc_mask +ffffffff82beebe0 r dwbc30_regs +ffffffff82beedbc r dwbc30_shift +ffffffff82beeef0 r dwbc30_mask +ffffffff82bef3c0 r mcif_wb30_regs +ffffffff82bef4bc r mcif_wb30_shift +ffffffff82bef568 r mcif_wb30_mask +ffffffff82bef820 r aux_engine_regs +ffffffff82bef8e8 r aux_mask +ffffffff82bef948 r aux_shift +ffffffff82bef960 r i2c_hw_regs +ffffffff82befa78 r i2c_shifts +ffffffff82befaa4 r i2c_masks +ffffffff82befb50 r audio_regs +ffffffff82befc84 r audio_shift +ffffffff82befc9c r audio_mask +ffffffff82befcd8 r se_shift +ffffffff82befdb4 r se_mask +ffffffff82bf0120 r vpg_regs +ffffffff82bf0210 r vpg_shift +ffffffff82bf0238 r vpg_mask +ffffffff82bf02e0 r afmt_regs +ffffffff82bf03b8 r afmt_shift +ffffffff82bf03cc r afmt_mask +ffffffff82bf0420 r stream_enc_regs +ffffffff82bf1ac0 r hpo_dp_stream_enc_regs +ffffffff82bf1cf0 r hpo_dp_se_shift +ffffffff82bf1d18 r hpo_dp_se_mask +ffffffff82bf1dc0 r apg_regs +ffffffff82bf1e00 r apg_shift +ffffffff82bf1e08 r apg_mask +ffffffff82bf1e20 r hpo_dp_link_enc_regs +ffffffff82bf1f30 r hpo_dp_le_shift +ffffffff82bf1f4c r hpo_dp_le_mask +ffffffff82bf1fb0 r hwseq_reg +ffffffff82bf21cc r hwseq_shift +ffffffff82bf224c r hwseq_mask +ffffffff82bf3000 r dccg314_funcs +ffffffff82bf4000 r dcn314_str_enc_funcs +ffffffff82bf5000 r dcn314_funcs +ffffffff82bf52c0 r dcn314_private_funcs +ffffffff82bf6000 r bios_regs +ffffffff82bf6008 r res_cap_dcn314 +ffffffff82bf6048 r debug_defaults_diags +ffffffff82bf61c0 r clk_src_regs +ffffffff82bf6364 r dccg_regs +ffffffff82bf6450 r dccg_shift +ffffffff82bf64e8 r dccg_mask +ffffffff82bf6750 r abm_regs +ffffffff82bf6850 r abm_shift +ffffffff82bf6864 r abm_mask +ffffffff82bf68b0 r res_create_funcs +ffffffff82bf68e0 r res_create_maximus_funcs +ffffffff82bf6910 r plane_cap +ffffffff82bf6940 r link_enc_regs +ffffffff82bf6fa0 r link_enc_aux_regs +ffffffff82bf6ff0 r link_enc_hpd_regs +ffffffff82bf7004 r le_shift +ffffffff82bf70f4 r le_mask +ffffffff82bf74ac r link_enc_feature +ffffffff82bf74bc r panel_config_defaults +ffffffff82bf74f0 r debug_defaults_drv +ffffffff82bf7668 r cs_shift +ffffffff82bf7674 r cs_mask +ffffffff82bf769c r hubbub_reg +ffffffff82bf7810 r hubbub_shift +ffffffff82bf7898 r hubbub_mask +ffffffff82bf7ac0 r vmid_regs +ffffffff82bf7c80 r vmid_shifts +ffffffff82bf7c88 r vmid_masks +ffffffff82bf7cb0 r hubp_regs +ffffffff82bf84e0 r hubp_shift +ffffffff82bf85dc r hubp_mask +ffffffff82bf89d0 r dpp_regs +ffffffff82bf9ed0 r tf_shift +ffffffff82bfa1a0 r tf_mask +ffffffff82bface0 r opp_regs +ffffffff82bfae40 r opp_shift +ffffffff82bfae78 r opp_mask +ffffffff82bfaf50 r optc_regs +ffffffff82bfb450 r optc_shift +ffffffff82bfb510 r optc_mask +ffffffff82bfb810 r mpc_regs +ffffffff82bfcffc r mpc_shift +ffffffff82bfd0d8 r mpc_mask +ffffffff82bfd450 r dsc_regs +ffffffff82bfd760 r dsc_shift +ffffffff82bfd818 r dsc_mask +ffffffff82bfdaf0 r dwbc30_regs +ffffffff82bfdccc r dwbc30_shift +ffffffff82bfde00 r dwbc30_mask +ffffffff82bfe2d0 r mcif_wb30_regs +ffffffff82bfe3cc r mcif_wb30_shift +ffffffff82bfe478 r mcif_wb30_mask +ffffffff82bfe730 r aux_engine_regs +ffffffff82bfe7f8 r aux_mask +ffffffff82bfe858 r aux_shift +ffffffff82bfe870 r i2c_hw_regs +ffffffff82bfe988 r i2c_shifts +ffffffff82bfe9b4 r i2c_masks +ffffffff82bfea60 r audio_regs +ffffffff82bfeb94 r audio_shift +ffffffff82bfebac r audio_mask +ffffffff82bfebf0 r stream_enc_regs +ffffffff82bff294 r se_shift +ffffffff82bff370 r se_mask +ffffffff82bff6e0 r vpg_regs +ffffffff82bff7d0 r vpg_shift +ffffffff82bff7f8 r vpg_mask +ffffffff82bff8a0 r afmt_regs +ffffffff82bff978 r afmt_shift +ffffffff82bff98c r afmt_mask +ffffffff82bff9e0 r hpo_dp_stream_enc_regs +ffffffff82bffc10 r hpo_dp_se_shift +ffffffff82bffc38 r hpo_dp_se_mask +ffffffff82bffce0 r apg_regs +ffffffff82bffd20 r apg_shift +ffffffff82bffd28 r apg_mask +ffffffff82bffd40 r hpo_dp_link_enc_regs +ffffffff82bffe50 r hpo_dp_le_shift +ffffffff82bffe6c r hpo_dp_le_mask +ffffffff82bffed0 r hwseq_reg +ffffffff82c000ec r hwseq_shift +ffffffff82c0016c r hwseq_mask +ffffffff82c01000 r bios_regs +ffffffff82c01008 r res_cap_dcn31 +ffffffff82c01048 r debug_defaults_diags +ffffffff82c011c0 r clk_src_regs +ffffffff82c01364 r dccg_regs +ffffffff82c01450 r dccg_shift +ffffffff82c014e8 r dccg_mask +ffffffff82c01750 r abm_regs +ffffffff82c01850 r abm_shift +ffffffff82c01864 r abm_mask +ffffffff82c018b0 r res_create_funcs +ffffffff82c018e0 r res_create_maximus_funcs +ffffffff82c01910 r plane_cap +ffffffff82c01940 r link_enc_regs +ffffffff82c01fa0 r link_enc_aux_regs +ffffffff82c01ff0 r link_enc_hpd_regs +ffffffff82c02004 r le_shift +ffffffff82c020f4 r le_mask +ffffffff82c024ac r link_enc_feature +ffffffff82c024bc r panel_config_defaults +ffffffff82c024f0 r debug_defaults_drv +ffffffff82c02668 r cs_shift +ffffffff82c02674 r cs_mask +ffffffff82c0269c r hubbub_reg +ffffffff82c02810 r hubbub_shift +ffffffff82c02898 r hubbub_mask +ffffffff82c02ac0 r vmid_regs +ffffffff82c02c80 r vmid_shifts +ffffffff82c02c88 r vmid_masks +ffffffff82c02cb0 r hubp_regs +ffffffff82c034e0 r hubp_shift +ffffffff82c035dc r hubp_mask +ffffffff82c039d0 r dpp_regs +ffffffff82c04ed0 r tf_shift +ffffffff82c051a0 r tf_mask +ffffffff82c05ce0 r opp_regs +ffffffff82c05e40 r opp_shift +ffffffff82c05e78 r opp_mask +ffffffff82c05f50 r optc_regs +ffffffff82c06450 r optc_shift +ffffffff82c06510 r optc_mask +ffffffff82c06810 r mpc_regs +ffffffff82c07ffc r mpc_shift +ffffffff82c080d8 r mpc_mask +ffffffff82c08450 r dsc_regs +ffffffff82c0869c r dsc_shift +ffffffff82c08754 r dsc_mask +ffffffff82c08a30 r dwbc30_regs +ffffffff82c08c0c r dwbc30_shift +ffffffff82c08d40 r dwbc30_mask +ffffffff82c09210 r mcif_wb30_regs +ffffffff82c0930c r mcif_wb30_shift +ffffffff82c093b8 r mcif_wb30_mask +ffffffff82c09670 r aux_engine_regs +ffffffff82c09738 r aux_mask +ffffffff82c09798 r aux_shift +ffffffff82c097b0 r i2c_hw_regs +ffffffff82c098c8 r i2c_shifts +ffffffff82c098f4 r i2c_masks +ffffffff82c099a0 r audio_regs +ffffffff82c09ad4 r audio_shift +ffffffff82c09aec r audio_mask +ffffffff82c09b30 r stream_enc_regs +ffffffff82c0a1d4 r se_shift +ffffffff82c0a2b0 r se_mask +ffffffff82c0a620 r vpg_regs +ffffffff82c0a710 r vpg_shift +ffffffff82c0a738 r vpg_mask +ffffffff82c0a7e0 r afmt_regs +ffffffff82c0a8b8 r afmt_shift +ffffffff82c0a8cc r afmt_mask +ffffffff82c0a920 r hpo_dp_stream_enc_regs +ffffffff82c0ab50 r hpo_dp_se_shift +ffffffff82c0ab78 r hpo_dp_se_mask +ffffffff82c0ac20 r apg_regs +ffffffff82c0ac60 r apg_shift +ffffffff82c0ac68 r apg_mask +ffffffff82c0ac80 r hpo_dp_link_enc_regs +ffffffff82c0ad90 r hpo_dp_le_shift +ffffffff82c0adac r hpo_dp_le_mask +ffffffff82c0ae10 r hwseq_reg +ffffffff82c0b02c r hwseq_shift +ffffffff82c0b0ac r hwseq_mask +ffffffff82c0c000 r bios_regs +ffffffff82c0c008 r res_cap_dcn31 +ffffffff82c0c048 r debug_defaults_diags +ffffffff82c0c1c0 r clk_src_regs +ffffffff82c0c364 r dccg_regs +ffffffff82c0c450 r dccg_shift +ffffffff82c0c4e8 r dccg_mask +ffffffff82c0c750 r abm_regs +ffffffff82c0c850 r abm_shift +ffffffff82c0c864 r abm_mask +ffffffff82c0c8b0 r res_create_funcs +ffffffff82c0c8e0 r res_create_maximus_funcs +ffffffff82c0c910 r plane_cap +ffffffff82c0c940 r link_enc_regs +ffffffff82c0cfa0 r link_enc_aux_regs +ffffffff82c0cff0 r link_enc_hpd_regs +ffffffff82c0d004 r le_shift +ffffffff82c0d0f4 r le_mask +ffffffff82c0d4ac r link_enc_feature +ffffffff82c0d4bc r panel_config_defaults +ffffffff82c0d4f0 r debug_defaults_drv +ffffffff82c0d668 r cs_shift +ffffffff82c0d674 r cs_mask +ffffffff82c0d69c r hubbub_reg +ffffffff82c0d810 r hubbub_shift +ffffffff82c0d898 r hubbub_mask +ffffffff82c0dac0 r vmid_regs +ffffffff82c0dc80 r vmid_shifts +ffffffff82c0dc88 r vmid_masks +ffffffff82c0dcb0 r hubp_regs +ffffffff82c0e4e0 r hubp_shift +ffffffff82c0e5dc r hubp_mask +ffffffff82c0e9d0 r dpp_regs +ffffffff82c0fed0 r tf_shift +ffffffff82c101a0 r tf_mask +ffffffff82c10ce0 r opp_regs +ffffffff82c10e40 r opp_shift +ffffffff82c10e78 r opp_mask +ffffffff82c10f50 r optc_regs +ffffffff82c11450 r optc_shift +ffffffff82c11510 r optc_mask +ffffffff82c11810 r mpc_regs +ffffffff82c12ffc r mpc_shift +ffffffff82c130d8 r mpc_mask +ffffffff82c13450 r dsc_regs +ffffffff82c1369c r dsc_shift +ffffffff82c13754 r dsc_mask +ffffffff82c13a30 r dwbc30_regs +ffffffff82c13c0c r dwbc30_shift +ffffffff82c13d40 r dwbc30_mask +ffffffff82c14210 r mcif_wb30_regs +ffffffff82c1430c r mcif_wb30_shift +ffffffff82c143b8 r mcif_wb30_mask +ffffffff82c14670 r aux_engine_regs +ffffffff82c14738 r aux_mask +ffffffff82c14798 r aux_shift +ffffffff82c147b0 r i2c_hw_regs +ffffffff82c148c8 r i2c_shifts +ffffffff82c148f4 r i2c_masks +ffffffff82c149a0 r audio_regs +ffffffff82c14ad4 r audio_shift +ffffffff82c14aec r audio_mask +ffffffff82c14b30 r stream_enc_regs +ffffffff82c151d4 r se_shift +ffffffff82c152b0 r se_mask +ffffffff82c15620 r vpg_regs +ffffffff82c15710 r vpg_shift +ffffffff82c15738 r vpg_mask +ffffffff82c157e0 r afmt_regs +ffffffff82c158b8 r afmt_shift +ffffffff82c158cc r afmt_mask +ffffffff82c15920 r hpo_dp_stream_enc_regs +ffffffff82c15b50 r hpo_dp_se_shift +ffffffff82c15b78 r hpo_dp_se_mask +ffffffff82c15c20 r apg_regs +ffffffff82c15c60 r apg_shift +ffffffff82c15c68 r apg_mask +ffffffff82c15c80 r hpo_dp_link_enc_regs +ffffffff82c15d90 r hpo_dp_le_shift +ffffffff82c15dac r hpo_dp_le_mask +ffffffff82c15e10 r hwseq_reg +ffffffff82c1602c r hwseq_shift +ffffffff82c160ac r hwseq_mask +ffffffff82c17000 r dccg32_funcs +ffffffff82c18000 r dcn32_link_enc_funcs +ffffffff82c19000 r dcn32_str_enc_funcs +ffffffff82c1a000 r hubbub32_funcs +ffffffff82c1b000 r dcn32_funcs +ffffffff82c1b2c0 r dcn32_private_funcs +ffffffff82c1c000 R dcn32_mmhubbub_funcs +ffffffff82c1d000 R dcn32_mpc_funcs +ffffffff82c1e000 r res_cap_dcn32 +ffffffff82c1e040 r debug_defaults_diags +ffffffff82c1e1b8 r dccg_shift +ffffffff82c1e250 r dccg_mask +ffffffff82c1e4ac r abm_shift +ffffffff82c1e4c0 r abm_mask +ffffffff82c1e508 r res_create_funcs +ffffffff82c1e538 r res_create_maximus_funcs +ffffffff82c1e568 r plane_cap +ffffffff82c1e594 r le_shift +ffffffff82c1e684 r le_mask +ffffffff82c1ea3c r link_enc_feature +ffffffff82c1ea50 r debug_defaults_drv +ffffffff82c1ebc8 r cs_shift +ffffffff82c1ebd4 r cs_mask +ffffffff82c1ebfc r hubbub_shift +ffffffff82c1ec84 r hubbub_mask +ffffffff82c1eea0 r vmid_shifts +ffffffff82c1eea8 r vmid_masks +ffffffff82c1eec8 r hubp_shift +ffffffff82c1efc4 r hubp_mask +ffffffff82c1f3b4 r tf_shift +ffffffff82c1f684 r tf_mask +ffffffff82c201c4 r opp_shift +ffffffff82c201fc r opp_mask +ffffffff82c202d0 r optc_shift +ffffffff82c20390 r optc_mask +ffffffff82c20690 r mpc_shift +ffffffff82c2076c r mpc_mask +ffffffff82c20ad8 r dsc_shift +ffffffff82c20b90 r dsc_mask +ffffffff82c20e68 r dwbc30_shift +ffffffff82c20f9c r dwbc30_mask +ffffffff82c21464 r mcif_wb30_shift +ffffffff82c21510 r mcif_wb30_mask +ffffffff82c217bc r aux_mask +ffffffff82c2181c r aux_shift +ffffffff82c21834 r i2c_shifts +ffffffff82c21860 r i2c_masks +ffffffff82c21904 r audio_shift +ffffffff82c2191c r audio_mask +ffffffff82c21958 r se_shift +ffffffff82c21a34 r se_mask +ffffffff82c21da0 r vpg_shift +ffffffff82c21dc8 r vpg_mask +ffffffff82c21e5c r afmt_shift +ffffffff82c21e70 r afmt_mask +ffffffff82c21eb4 r hpo_dp_se_shift +ffffffff82c21edc r hpo_dp_se_mask +ffffffff82c21f7c r apg_shift +ffffffff82c21f84 r apg_mask +ffffffff82c21f9c r hpo_dp_le_shift +ffffffff82c21fb8 r hpo_dp_le_mask +ffffffff82c2201c r hwseq_shift +ffffffff82c2209c r hwseq_mask +ffffffff82c23000 r dcn321_link_enc_funcs +ffffffff82c24000 r res_cap_dcn321 +ffffffff82c24040 r debug_defaults_diags +ffffffff82c241b8 r dccg_shift +ffffffff82c24250 r dccg_mask +ffffffff82c244ac r abm_shift +ffffffff82c244c0 r abm_mask +ffffffff82c24508 r res_create_funcs +ffffffff82c24538 r res_create_maximus_funcs +ffffffff82c24568 r plane_cap +ffffffff82c24594 r le_shift +ffffffff82c24684 r le_mask +ffffffff82c24a3c r link_enc_feature +ffffffff82c24a50 r debug_defaults_drv +ffffffff82c24bc8 r cs_shift +ffffffff82c24bd4 r cs_mask +ffffffff82c24bfc r hubbub_shift +ffffffff82c24c84 r hubbub_mask +ffffffff82c24ea0 r vmid_shifts +ffffffff82c24ea8 r vmid_masks +ffffffff82c24ec8 r hubp_shift +ffffffff82c24fc4 r hubp_mask +ffffffff82c253b4 r tf_shift +ffffffff82c25684 r tf_mask +ffffffff82c261c4 r opp_shift +ffffffff82c261fc r opp_mask +ffffffff82c262d0 r optc_shift +ffffffff82c26390 r optc_mask +ffffffff82c26690 r mpc_shift +ffffffff82c2676c r mpc_mask +ffffffff82c26ad8 r dsc_shift +ffffffff82c26b90 r dsc_mask +ffffffff82c26e68 r dwbc30_shift +ffffffff82c26f9c r dwbc30_mask +ffffffff82c27464 r mcif_wb30_shift +ffffffff82c27510 r mcif_wb30_mask +ffffffff82c277bc r aux_mask +ffffffff82c2781c r aux_shift +ffffffff82c27834 r i2c_shifts +ffffffff82c27860 r i2c_masks +ffffffff82c27904 r audio_shift +ffffffff82c2791c r audio_mask +ffffffff82c27958 r se_shift +ffffffff82c27a34 r se_mask +ffffffff82c27da0 r vpg_shift +ffffffff82c27dc8 r vpg_mask +ffffffff82c27e5c r afmt_shift +ffffffff82c27e70 r afmt_mask +ffffffff82c27eb4 r hpo_dp_se_shift +ffffffff82c27edc r hpo_dp_se_mask +ffffffff82c27f7c r apg_shift +ffffffff82c27f84 r apg_mask +ffffffff82c27f9c r hpo_dp_le_shift +ffffffff82c27fb8 r hpo_dp_le_mask +ffffffff82c2801c r hwseq_shift +ffffffff82c2809c r hwseq_mask +ffffffff82c2a000 R dcn10_soc_defaults +ffffffff82c2a08c R dcn10_ip_defaults +ffffffff82c35000 R dml20_funcs +ffffffff82c35030 R dml20v2_funcs +ffffffff82c35060 R dml21_funcs +ffffffff82c35090 R dml30_funcs +ffffffff82c350c0 R dml31_funcs +ffffffff82c350f0 R dml314_funcs +ffffffff82c35120 R dml32_funcs +ffffffff82c38000 R qp_table_422_10bpc_min +ffffffff82c38740 R qp_table_444_8bpc_max +ffffffff82c39080 R qp_table_420_12bpc_max +ffffffff82c397c0 R qp_table_444_10bpc_min +ffffffff82c3a400 R qp_table_420_8bpc_max +ffffffff82c3a840 R qp_table_444_8bpc_min +ffffffff82c3b180 R qp_table_444_12bpc_min +ffffffff82c3c0c0 R qp_table_420_12bpc_min +ffffffff82c3c800 R qp_table_422_12bpc_min +ffffffff82c3d140 R qp_table_422_12bpc_max +ffffffff82c3da80 R qp_table_444_12bpc_max +ffffffff82c3e9c0 R qp_table_420_8bpc_min +ffffffff82c3ee00 R qp_table_422_8bpc_min +ffffffff82c3f340 R qp_table_422_10bpc_max +ffffffff82c3fa80 R qp_table_420_10bpc_max +ffffffff82c40040 R qp_table_420_10bpc_min +ffffffff82c40600 R qp_table_444_10bpc_max +ffffffff82c41240 R qp_table_422_8bpc_max ffffffff82c43000 r funcs +ffffffff82c43050 r hpd_regs +ffffffff82c431a0 r hpd_shift +ffffffff82c431b0 r hpd_mask +ffffffff82c431c0 r ddc_data_regs +ffffffff82c433a0 r ddc_clk_regs +ffffffff82c43580 r ddc_shift +ffffffff82c435a8 r ddc_mask ffffffff82c44000 r funcs -ffffffff82c44050 r hpd_regs -ffffffff82c441a0 r hpd_shift -ffffffff82c441b0 r hpd_mask -ffffffff82c441c0 r ddc_data_regs -ffffffff82c443a0 r ddc_clk_regs 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vblank_irq_info_funcs -ffffffff82c60068 r vline0_irq_info_funcs -ffffffff82c60080 r irq_source_info_dcn201 -ffffffff82c62000 r irq_source_info_dcn21 -ffffffff82c63290 r irq_service_funcs_dcn21 -ffffffff82c63298 r dummy_irq_info_funcs -ffffffff82c632a8 r hpd_irq_info_funcs -ffffffff82c632b8 r hpd_rx_irq_info_funcs -ffffffff82c632c8 r pflip_irq_info_funcs -ffffffff82c632d8 r vupdate_no_lock_irq_info_funcs -ffffffff82c632e8 r vblank_irq_info_funcs -ffffffff82c632f8 r vline0_irq_info_funcs -ffffffff82c63308 r dmub_outbox_irq_info_funcs -ffffffff82c64000 r irq_source_info_dcn30 -ffffffff82c65290 r irq_service_funcs_dcn30 -ffffffff82c65298 r dummy_irq_info_funcs -ffffffff82c652a8 r hpd_irq_info_funcs -ffffffff82c652b8 r hpd_rx_irq_info_funcs -ffffffff82c652c8 r pflip_irq_info_funcs -ffffffff82c652d8 r vupdate_no_lock_irq_info_funcs -ffffffff82c652e8 r vblank_irq_info_funcs -ffffffff82c652f8 r vline0_irq_info_funcs -ffffffff82c65308 r dmub_trace_irq_info_funcs -ffffffff82c66000 r irq_source_info_dcn302 -ffffffff82c67290 r irq_service_funcs_dcn302 -ffffffff82c67298 r dummy_irq_info_funcs -ffffffff82c672a8 r hpd_irq_info_funcs -ffffffff82c672b8 r hpd_rx_irq_info_funcs -ffffffff82c672c8 r pflip_irq_info_funcs -ffffffff82c672d8 r vupdate_no_lock_irq_info_funcs -ffffffff82c672e8 r vblank_irq_info_funcs -ffffffff82c672f8 r vline0_irq_info_funcs -ffffffff82c67308 r dmub_trace_irq_info_funcs -ffffffff82c68000 r irq_service_funcs_dcn303 -ffffffff82c68008 r dummy_irq_info_funcs -ffffffff82c68018 r hpd_irq_info_funcs -ffffffff82c68028 r hpd_rx_irq_info_funcs -ffffffff82c68038 r pflip_irq_info_funcs -ffffffff82c68048 r vupdate_no_lock_irq_info_funcs -ffffffff82c68058 r vblank_irq_info_funcs -ffffffff82c68068 r vline0_irq_info_funcs -ffffffff82c68080 r irq_source_info_dcn303 -ffffffff82c6a000 r irq_source_info_dcn31 -ffffffff82c6b290 r irq_service_funcs_dcn31 -ffffffff82c6b298 r dummy_irq_info_funcs -ffffffff82c6b2a8 r hpd_irq_info_funcs -ffffffff82c6b2b8 r hpd_rx_irq_info_funcs -ffffffff82c6b2c8 r pflip_irq_info_funcs -ffffffff82c6b2d8 r vupdate_no_lock_irq_info_funcs -ffffffff82c6b2e8 r vblank_irq_info_funcs -ffffffff82c6b2f8 r vline0_irq_info_funcs -ffffffff82c6b308 r outbox_irq_info_funcs -ffffffff82c6c000 r irq_source_info_dcn314 -ffffffff82c6d290 r irq_service_funcs_dcn314 -ffffffff82c6d298 r dummy_irq_info_funcs -ffffffff82c6d2a8 r hpd_irq_info_funcs -ffffffff82c6d2b8 r hpd_rx_irq_info_funcs -ffffffff82c6d2c8 r pflip_irq_info_funcs -ffffffff82c6d2d8 r vupdate_no_lock_irq_info_funcs -ffffffff82c6d2e8 r vblank_irq_info_funcs -ffffffff82c6d2f8 r vline0_irq_info_funcs -ffffffff82c6d308 r outbox_irq_info_funcs -ffffffff82c6e000 r irq_source_info_dcn315 -ffffffff82c6f290 r irq_service_funcs_dcn315 -ffffffff82c6f298 r dummy_irq_info_funcs -ffffffff82c6f2a8 r hpd_irq_info_funcs -ffffffff82c6f2b8 r hpd_rx_irq_info_funcs -ffffffff82c6f2c8 r pflip_irq_info_funcs -ffffffff82c6f2d8 r vupdate_no_lock_irq_info_funcs -ffffffff82c6f2e8 r vblank_irq_info_funcs -ffffffff82c6f2f8 r vline0_irq_info_funcs -ffffffff82c6f308 r outbox_irq_info_funcs -ffffffff82c70000 r irq_source_info_dcn32 -ffffffff82c71290 r irq_service_funcs_dcn32 -ffffffff82c71298 r dummy_irq_info_funcs -ffffffff82c712a8 r hpd_irq_info_funcs -ffffffff82c712b8 r hpd_rx_irq_info_funcs -ffffffff82c712c8 r pflip_irq_info_funcs -ffffffff82c712d8 r vupdate_no_lock_irq_info_funcs -ffffffff82c712e8 r vblank_irq_info_funcs -ffffffff82c712f8 r vline0_irq_info_funcs -ffffffff82c71308 r outbox_irq_info_funcs -ffffffff82c72000 r dio_link_hwss -ffffffff82c73000 r dpia_link_hwss -ffffffff82c74000 r hpo_dp_link_hwss -ffffffff82c75000 r virtual_lnk_enc_funcs -ffffffff82c76000 r virtual_link_hwss -ffffffff82c77000 r virtual_str_enc_funcs -ffffffff82c78000 R dmub_srv_dcn20_regs -ffffffff82c79000 R dmub_srv_dcn21_regs -ffffffff82c7a000 R dmub_srv_dcn30_regs -ffffffff82c7b000 R dmub_srv_dcn301_regs -ffffffff82c7c000 R dmub_srv_dcn302_regs -ffffffff82c7d000 R dmub_srv_dcn303_regs -ffffffff82c7e000 R dmub_srv_dcn31_regs -ffffffff82c7f000 R dmub_srv_dcn315_regs -ffffffff82c80000 R dmub_srv_dcn316_regs -ffffffff82c81000 R dmub_srv_dcn32_regs -ffffffff82c82000 r numerator01 -ffffffff82c82020 r numerator02 -ffffffff82c82040 r numerator04 -ffffffff82c82060 r numerator05 -ffffffff82c84000 r abm_settings -ffffffff82c84010 r abm_settings_config0 -ffffffff82c84050 r abm_settings_config1 -ffffffff82c84088 r min_reduction_table_v_2_2 -ffffffff82c84095 r max_reduction_table_v_2_2 -ffffffff82c840a2 r min_reduction_table -ffffffff82c840af r max_reduction_table -ffffffff82c85000 R amdgpu_pp_profile_name -ffffffff82c86000 r pp_lib_thermal_controller_names -ffffffff82c87000 r pp_ip_funcs -ffffffff82c870a0 R pp_smu_ip_block -ffffffff82c870b8 r pp_dpm_funcs -ffffffff82c88000 r gpio_tbl -ffffffff82c880f0 r enable_fb_req_rej_tbl -ffffffff82c88140 r use_bclk_tbl -ffffffff82c88310 r turn_off_plls_tbl -ffffffff82c88640 r enter_baco_tbl -ffffffff82c88730 r exit_baco_tbl -ffffffff82c88850 r clean_baco_tbl -ffffffff82c89000 r gpio_tbl -ffffffff82c890f0 r enable_fb_req_rej_tbl -ffffffff82c89140 r use_bclk_tbl -ffffffff82c892e0 r turn_off_plls_tbl -ffffffff82c89370 r clk_req_b_tbl -ffffffff82c89490 r enter_baco_tbl -ffffffff82c895b0 r exit_baco_tbl -ffffffff82c896d0 r clean_baco_tbl -ffffffff82c8a000 r gpio_tbl -ffffffff82c8a0f0 r enable_fb_req_rej_tbl -ffffffff82c8a140 r use_bclk_tbl_vg -ffffffff82c8a200 r turn_off_plls_tbl_vg -ffffffff82c8a350 r use_bclk_tbl -ffffffff82c8a440 r turn_off_plls_tbl -ffffffff82c8a5f0 r clk_req_b_tbl -ffffffff82c8a710 r enter_baco_tbl -ffffffff82c8a830 r exit_baco_tbl -ffffffff82c8a950 r clean_baco_tbl -ffffffff82c8b000 r vega10_fuses_default -ffffffff82c9a000 r pp_r600_encode_lanes -ffffffff82c9b000 R pptable_v1_0_funcs -ffffffff82c9c000 R pptable_funcs -ffffffff82c9c020 r soft_dummy_pp_table -ffffffff82c9d000 r smu10_hwmgr_funcs -ffffffff82c9e000 r smu7_hwmgr_funcs -ffffffff82c9e2f8 r smu7_irq_funcs -ffffffff82c9e310 r SMU7ThermalPolicy -ffffffff82c9f000 r GCCACConfig_Polaris10 -ffffffff82c9f1b0 r DIDTConfig_Polaris10 -ffffffff82c9fa50 r GCCACConfig_Polaris11 -ffffffff82c9fc00 r DIDTConfig_Polaris11_Kicker -ffffffff82ca04a0 r DIDTConfig_Polaris11 -ffffffff82ca0d40 r DIDTConfig_Polaris12 -ffffffff82ca15e0 r GCCACConfig_VegaM -ffffffff82ca1790 r DIDTConfig_VegaM -ffffffff82ca3000 r smu8_hwmgr_funcs -ffffffff82ca32f0 r SMU7ThermalPolicy -ffffffff82ca4000 r smu9_irq_funcs -ffffffff82ca5000 r gpio_tbl_iceland -ffffffff82ca5060 r gpio_tbl -ffffffff82ca5150 r enable_fb_req_rej_tbl -ffffffff82ca51a0 r use_bclk_tbl -ffffffff82ca5370 r turn_off_plls_tbl -ffffffff82ca5610 r enter_baco_tbl -ffffffff82ca5730 r exit_baco_tbl_iceland -ffffffff82ca5870 r clean_baco_tbl_iceland -ffffffff82ca5890 r exit_baco_tbl -ffffffff82ca59b0 r clean_baco_tbl -ffffffff82ca6000 r pre_baco_tbl -ffffffff82ca6090 r enter_baco_tbl -ffffffff82ca62b0 r exit_baco_tbl -ffffffff82ca6520 r clean_baco_tbl -ffffffff82ca7000 r vega10_hwmgr_funcs -ffffffff82ca72f0 r channel_number -ffffffff82ca7320 r SMU7ThermalWithDelayPolicy -ffffffff82ca8000 r SEDiDtStallCtrlConfig_vega10 -ffffffff82ca8110 r SEDiDtStallPatternConfig_vega10 -ffffffff82ca82e0 r SEDiDtWeightConfig_Vega10 -ffffffff82ca83b0 r SEDiDtCtrl1Config_Vega10 -ffffffff82ca8440 r SEDiDtCtrl2Config_Vega10 -ffffffff82ca8510 r SEDiDtCtrl3Config_vega10 -ffffffff82ca8820 r SEDiDtTuningCtrlConfig_Vega10 -ffffffff82ca88b0 r SELCacConfig_Vega10 -ffffffff82ca8a40 r SEDiDtCtrl0Config_Vega10 -ffffffff82ca8d10 r AvfsPSMInitConfig_vega10 -ffffffff82ca8d90 r SEEDCStallPatternConfig_Vega10 -ffffffff82ca8ea0 r SEEDCStallDelayConfig_Vega10 -ffffffff82ca8f80 r SEEDCCtrlConfig_Vega10 -ffffffff82ca9040 r PSMSEEDCStallPatternConfig_Vega10 -ffffffff82ca90c0 r PSMSEEDCStallDelayConfig_Vega10 -ffffffff82ca91d0 r PSMSEEDCCtrlResetConfig_Vega10 -ffffffff82ca9290 r PSMSEEDCCtrlConfig_Vega10 -ffffffff82ca9350 r SEEDCForceStallPatternConfig_Vega10 -ffffffff82ca93e0 r SEEDCCtrlForceStallConfig_Vega10 -ffffffff82caa000 R vega10_pptable_funcs -ffffffff82cab000 r pre_baco_tbl -ffffffff82cab090 r enter_baco_tbl -ffffffff82cab2b0 r exit_baco_tbl -ffffffff82cab520 r clean_baco_tbl -ffffffff82cac000 r vega12_hwmgr_funcs -ffffffff82cac2f0 r SMU7ThermalWithDelayPolicy -ffffffff82cac340 r link_width -ffffffff82cad000 R vega12_pptable_funcs -ffffffff82cae000 r clean_baco_tbl -ffffffff82caf000 r vega20_hwmgr_funcs +ffffffff82c55000 r funcs +ffffffff82c56000 r funcs +ffffffff82c57000 r funcs +ffffffff82c58000 r hdmi_14_protection +ffffffff82c58010 r dp_11_protection +ffffffff82c58020 r hdcp_i2c_offsets +ffffffff82c58050 r hdcp_dpcd_addrs +ffffffff82c59000 r irq_service_funcs_dce110 +ffffffff82c59010 r irq_source_info_dce110 +ffffffff82c5a2a0 r dummy_irq_info_funcs +ffffffff82c5a2b0 r hpd_irq_info_funcs +ffffffff82c5a2c0 r hpd_rx_irq_info_funcs +ffffffff82c5a2d0 r pflip_irq_info_funcs +ffffffff82c5a2e0 r vupdate_irq_info_funcs +ffffffff82c5a2f0 r vblank_irq_info_funcs +ffffffff82c5b000 r irq_service_funcs_dce120 +ffffffff82c5b008 r dummy_irq_info_funcs +ffffffff82c5b018 r hpd_irq_info_funcs +ffffffff82c5b028 r hpd_rx_irq_info_funcs +ffffffff82c5b038 r pflip_irq_info_funcs +ffffffff82c5b048 r vupdate_irq_info_funcs +ffffffff82c5b058 r vblank_irq_info_funcs +ffffffff82c5b070 r irq_source_info_dce120 +ffffffff82c5d000 r irq_service_funcs_dce80 +ffffffff82c5d008 r dummy_irq_info_funcs +ffffffff82c5d018 r hpd_irq_info_funcs +ffffffff82c5d028 r hpd_rx_irq_info_funcs +ffffffff82c5d038 r pflip_irq_info_funcs +ffffffff82c5d048 r vupdate_irq_info_funcs +ffffffff82c5d058 r vblank_irq_info_funcs +ffffffff82c5d070 r irq_source_info_dce80 +ffffffff82c5f000 r irq_service_funcs_dcn10 +ffffffff82c5f008 r dummy_irq_info_funcs +ffffffff82c5f018 r hpd_irq_info_funcs +ffffffff82c5f028 r hpd_rx_irq_info_funcs +ffffffff82c5f038 r pflip_irq_info_funcs +ffffffff82c5f048 r vupdate_no_lock_irq_info_funcs +ffffffff82c5f058 r vblank_irq_info_funcs +ffffffff82c5f068 r vline0_irq_info_funcs +ffffffff82c5f080 r irq_source_info_dcn10 +ffffffff82c61000 r irq_service_funcs_dcn20 +ffffffff82c61008 r dummy_irq_info_funcs +ffffffff82c61018 r hpd_irq_info_funcs +ffffffff82c61028 r hpd_rx_irq_info_funcs +ffffffff82c61038 r pflip_irq_info_funcs +ffffffff82c61048 r vupdate_no_lock_irq_info_funcs +ffffffff82c61058 r vblank_irq_info_funcs +ffffffff82c61068 r vline0_irq_info_funcs +ffffffff82c61080 r irq_source_info_dcn20 +ffffffff82c63000 r irq_service_funcs_dcn201 +ffffffff82c63008 r dummy_irq_info_funcs +ffffffff82c63018 r hpd_irq_info_funcs +ffffffff82c63028 r hpd_rx_irq_info_funcs +ffffffff82c63038 r pflip_irq_info_funcs +ffffffff82c63048 r vupdate_no_lock_irq_info_funcs +ffffffff82c63058 r vblank_irq_info_funcs +ffffffff82c63068 r vline0_irq_info_funcs +ffffffff82c63080 r irq_source_info_dcn201 +ffffffff82c65000 r irq_source_info_dcn21 +ffffffff82c66290 r irq_service_funcs_dcn21 +ffffffff82c66298 r dummy_irq_info_funcs +ffffffff82c662a8 r hpd_irq_info_funcs +ffffffff82c662b8 r hpd_rx_irq_info_funcs +ffffffff82c662c8 r pflip_irq_info_funcs +ffffffff82c662d8 r vupdate_no_lock_irq_info_funcs +ffffffff82c662e8 r vblank_irq_info_funcs +ffffffff82c662f8 r vline0_irq_info_funcs +ffffffff82c66308 r dmub_outbox_irq_info_funcs +ffffffff82c67000 r irq_source_info_dcn30 +ffffffff82c68290 r irq_service_funcs_dcn30 +ffffffff82c68298 r dummy_irq_info_funcs +ffffffff82c682a8 r hpd_irq_info_funcs +ffffffff82c682b8 r hpd_rx_irq_info_funcs +ffffffff82c682c8 r pflip_irq_info_funcs +ffffffff82c682d8 r vupdate_no_lock_irq_info_funcs +ffffffff82c682e8 r vblank_irq_info_funcs +ffffffff82c682f8 r vline0_irq_info_funcs +ffffffff82c68308 r dmub_trace_irq_info_funcs +ffffffff82c69000 r irq_source_info_dcn302 +ffffffff82c6a290 r irq_service_funcs_dcn302 +ffffffff82c6a298 r dummy_irq_info_funcs +ffffffff82c6a2a8 r hpd_irq_info_funcs +ffffffff82c6a2b8 r hpd_rx_irq_info_funcs +ffffffff82c6a2c8 r pflip_irq_info_funcs +ffffffff82c6a2d8 r vupdate_no_lock_irq_info_funcs +ffffffff82c6a2e8 r vblank_irq_info_funcs +ffffffff82c6a2f8 r vline0_irq_info_funcs +ffffffff82c6a308 r dmub_trace_irq_info_funcs +ffffffff82c6b000 r irq_service_funcs_dcn303 +ffffffff82c6b008 r dummy_irq_info_funcs +ffffffff82c6b018 r hpd_irq_info_funcs +ffffffff82c6b028 r hpd_rx_irq_info_funcs +ffffffff82c6b038 r pflip_irq_info_funcs +ffffffff82c6b048 r vupdate_no_lock_irq_info_funcs +ffffffff82c6b058 r vblank_irq_info_funcs +ffffffff82c6b068 r vline0_irq_info_funcs +ffffffff82c6b080 r irq_source_info_dcn303 +ffffffff82c6d000 r irq_source_info_dcn31 +ffffffff82c6e290 r irq_service_funcs_dcn31 +ffffffff82c6e298 r dummy_irq_info_funcs +ffffffff82c6e2a8 r hpd_irq_info_funcs +ffffffff82c6e2b8 r hpd_rx_irq_info_funcs +ffffffff82c6e2c8 r pflip_irq_info_funcs +ffffffff82c6e2d8 r vupdate_no_lock_irq_info_funcs +ffffffff82c6e2e8 r vblank_irq_info_funcs +ffffffff82c6e2f8 r vline0_irq_info_funcs +ffffffff82c6e308 r outbox_irq_info_funcs +ffffffff82c6f000 r irq_source_info_dcn314 +ffffffff82c70290 r irq_service_funcs_dcn314 +ffffffff82c70298 r dummy_irq_info_funcs +ffffffff82c702a8 r hpd_irq_info_funcs +ffffffff82c702b8 r hpd_rx_irq_info_funcs +ffffffff82c702c8 r pflip_irq_info_funcs +ffffffff82c702d8 r vupdate_no_lock_irq_info_funcs +ffffffff82c702e8 r vblank_irq_info_funcs +ffffffff82c702f8 r vline0_irq_info_funcs +ffffffff82c70308 r outbox_irq_info_funcs +ffffffff82c71000 r irq_source_info_dcn315 +ffffffff82c72290 r irq_service_funcs_dcn315 +ffffffff82c72298 r dummy_irq_info_funcs +ffffffff82c722a8 r hpd_irq_info_funcs +ffffffff82c722b8 r hpd_rx_irq_info_funcs +ffffffff82c722c8 r pflip_irq_info_funcs +ffffffff82c722d8 r vupdate_no_lock_irq_info_funcs +ffffffff82c722e8 r vblank_irq_info_funcs +ffffffff82c722f8 r vline0_irq_info_funcs +ffffffff82c72308 r outbox_irq_info_funcs +ffffffff82c73000 r irq_source_info_dcn32 +ffffffff82c74290 r irq_service_funcs_dcn32 +ffffffff82c74298 r dummy_irq_info_funcs +ffffffff82c742a8 r hpd_irq_info_funcs +ffffffff82c742b8 r hpd_rx_irq_info_funcs +ffffffff82c742c8 r pflip_irq_info_funcs +ffffffff82c742d8 r vupdate_no_lock_irq_info_funcs +ffffffff82c742e8 r vblank_irq_info_funcs +ffffffff82c742f8 r vline0_irq_info_funcs +ffffffff82c74308 r outbox_irq_info_funcs +ffffffff82c75000 r dio_link_hwss +ffffffff82c76000 r dpia_link_hwss +ffffffff82c77000 r hpo_dp_link_hwss +ffffffff82c78000 r virtual_lnk_enc_funcs +ffffffff82c79000 r virtual_link_hwss +ffffffff82c7a000 r virtual_str_enc_funcs +ffffffff82c7b000 R dmub_srv_dcn20_regs +ffffffff82c7c000 R dmub_srv_dcn21_regs +ffffffff82c7d000 R dmub_srv_dcn30_regs +ffffffff82c7e000 R dmub_srv_dcn301_regs +ffffffff82c7f000 R dmub_srv_dcn302_regs +ffffffff82c80000 R dmub_srv_dcn303_regs +ffffffff82c81000 R dmub_srv_dcn31_regs +ffffffff82c82000 R dmub_srv_dcn315_regs +ffffffff82c83000 R dmub_srv_dcn316_regs +ffffffff82c84000 R dmub_srv_dcn32_regs +ffffffff82c85000 r numerator01 +ffffffff82c85020 r numerator02 +ffffffff82c85040 r numerator04 +ffffffff82c85060 r numerator05 +ffffffff82c87000 r abm_settings +ffffffff82c87010 r abm_settings_config0 +ffffffff82c87050 r abm_settings_config1 +ffffffff82c87088 r min_reduction_table_v_2_2 +ffffffff82c87095 r max_reduction_table_v_2_2 +ffffffff82c870a2 r min_reduction_table +ffffffff82c870af r max_reduction_table +ffffffff82c88000 R amdgpu_pp_profile_name +ffffffff82c89000 r pp_lib_thermal_controller_names +ffffffff82c8a000 r pp_ip_funcs +ffffffff82c8a0a0 R pp_smu_ip_block +ffffffff82c8a0b8 r pp_dpm_funcs +ffffffff82c8b000 r gpio_tbl +ffffffff82c8b0f0 r enable_fb_req_rej_tbl +ffffffff82c8b140 r use_bclk_tbl +ffffffff82c8b310 r turn_off_plls_tbl +ffffffff82c8b640 r enter_baco_tbl +ffffffff82c8b730 r exit_baco_tbl +ffffffff82c8b850 r clean_baco_tbl +ffffffff82c8c000 r gpio_tbl +ffffffff82c8c0f0 r enable_fb_req_rej_tbl +ffffffff82c8c140 r use_bclk_tbl +ffffffff82c8c2e0 r turn_off_plls_tbl +ffffffff82c8c370 r clk_req_b_tbl +ffffffff82c8c490 r enter_baco_tbl +ffffffff82c8c5b0 r exit_baco_tbl +ffffffff82c8c6d0 r clean_baco_tbl +ffffffff82c8d000 r gpio_tbl +ffffffff82c8d0f0 r enable_fb_req_rej_tbl +ffffffff82c8d140 r use_bclk_tbl_vg +ffffffff82c8d200 r turn_off_plls_tbl_vg +ffffffff82c8d350 r use_bclk_tbl +ffffffff82c8d440 r turn_off_plls_tbl +ffffffff82c8d5f0 r clk_req_b_tbl +ffffffff82c8d710 r enter_baco_tbl +ffffffff82c8d830 r exit_baco_tbl +ffffffff82c8d950 r clean_baco_tbl +ffffffff82c8e000 r vega10_fuses_default +ffffffff82c9d000 r pp_r600_encode_lanes +ffffffff82c9e000 R pptable_v1_0_funcs +ffffffff82c9f000 R pptable_funcs +ffffffff82c9f020 r soft_dummy_pp_table +ffffffff82ca0000 r smu10_hwmgr_funcs +ffffffff82ca1000 r smu7_hwmgr_funcs +ffffffff82ca12f8 r smu7_irq_funcs +ffffffff82ca1310 r SMU7ThermalPolicy +ffffffff82ca2000 r GCCACConfig_Polaris10 +ffffffff82ca21b0 r DIDTConfig_Polaris10 +ffffffff82ca2a50 r GCCACConfig_Polaris11 +ffffffff82ca2c00 r DIDTConfig_Polaris11_Kicker +ffffffff82ca34a0 r DIDTConfig_Polaris11 +ffffffff82ca3d40 r DIDTConfig_Polaris12 +ffffffff82ca45e0 r GCCACConfig_VegaM +ffffffff82ca4790 r DIDTConfig_VegaM +ffffffff82ca6000 r smu8_hwmgr_funcs +ffffffff82ca62f0 r SMU7ThermalPolicy +ffffffff82ca7000 r smu9_irq_funcs +ffffffff82ca8000 r gpio_tbl_iceland +ffffffff82ca8060 r gpio_tbl +ffffffff82ca8150 r enable_fb_req_rej_tbl +ffffffff82ca81a0 r use_bclk_tbl +ffffffff82ca8370 r turn_off_plls_tbl +ffffffff82ca8610 r enter_baco_tbl +ffffffff82ca8730 r exit_baco_tbl_iceland +ffffffff82ca8870 r clean_baco_tbl_iceland +ffffffff82ca8890 r exit_baco_tbl +ffffffff82ca89b0 r clean_baco_tbl +ffffffff82ca9000 r pre_baco_tbl +ffffffff82ca9090 r enter_baco_tbl +ffffffff82ca92b0 r exit_baco_tbl +ffffffff82ca9520 r clean_baco_tbl +ffffffff82caa000 r vega10_hwmgr_funcs +ffffffff82caa2f0 r channel_number +ffffffff82caa320 r SMU7ThermalWithDelayPolicy +ffffffff82cab000 r SEDiDtStallCtrlConfig_vega10 +ffffffff82cab110 r SEDiDtStallPatternConfig_vega10 +ffffffff82cab2e0 r SEDiDtWeightConfig_Vega10 +ffffffff82cab3b0 r SEDiDtCtrl1Config_Vega10 +ffffffff82cab440 r SEDiDtCtrl2Config_Vega10 +ffffffff82cab510 r SEDiDtCtrl3Config_vega10 +ffffffff82cab820 r SEDiDtTuningCtrlConfig_Vega10 +ffffffff82cab8b0 r SELCacConfig_Vega10 +ffffffff82caba40 r SEDiDtCtrl0Config_Vega10 +ffffffff82cabd10 r AvfsPSMInitConfig_vega10 +ffffffff82cabd90 r SEEDCStallPatternConfig_Vega10 +ffffffff82cabea0 r SEEDCStallDelayConfig_Vega10 +ffffffff82cabf80 r SEEDCCtrlConfig_Vega10 +ffffffff82cac040 r PSMSEEDCStallPatternConfig_Vega10 +ffffffff82cac0c0 r PSMSEEDCStallDelayConfig_Vega10 +ffffffff82cac1d0 r PSMSEEDCCtrlResetConfig_Vega10 +ffffffff82cac290 r PSMSEEDCCtrlConfig_Vega10 +ffffffff82cac350 r SEEDCForceStallPatternConfig_Vega10 +ffffffff82cac3e0 r SEEDCCtrlForceStallConfig_Vega10 +ffffffff82cad000 R vega10_pptable_funcs +ffffffff82cae000 r pre_baco_tbl +ffffffff82cae090 r enter_baco_tbl +ffffffff82cae2b0 r exit_baco_tbl +ffffffff82cae520 r clean_baco_tbl +ffffffff82caf000 r vega12_hwmgr_funcs ffffffff82caf2f0 r SMU7ThermalWithDelayPolicy ffffffff82caf340 r link_width -ffffffff82cb0000 R vega20_pptable_funcs -ffffffff82cb1000 R ci_smu_funcs -ffffffff82cb10e0 r defaults_hawaii_pro -ffffffff82cb112c r defaults_hawaii_xt -ffffffff82cb1178 r defaults_saturn_xt -ffffffff82cb11c4 r defaults_bonaire_xt -ffffffff82cb1210 r ci_program_jump_on_start.data -ffffffff82cb2000 R fiji_smu_funcs -ffffffff82cb20e0 r avfs_graphics_level -ffffffff82cb2240 r fiji_power_tune_data_set_array -ffffffff82cb2246 r fiji_clock_stretch_amount_conversion -ffffffff82cb2260 r fiji_clock_stretcher_ddt_table -ffffffff82cb3000 R iceland_smu_funcs -ffffffff82cb30e0 r defaults_icelandxt -ffffffff82cb312c r defaults_icelandpro -ffffffff82cb3178 r defaults_iceland -ffffffff82cb4000 R polaris10_smu_funcs -ffffffff82cb40e0 r avfs_graphics_level_polaris10 -ffffffff82cb42a0 r avfs_memory_level_polaris10 -ffffffff82cb42c0 r polaris10_power_tune_data_set_array -ffffffff82cb4310 r Range_Table -ffffffff82cb5000 R smu10_smu_funcs -ffffffff82cb6000 r smu7_program_jump_on_start.data -ffffffff82cb6010 r pwr_virus_table_pre -ffffffff82cb6680 r pwr_virus_table_post -ffffffff82cb6f80 r pwr_virus_section1 -ffffffff82cb7610 r pwr_virus_section2 -ffffffff82cb7660 r pwr_virus_section3 -ffffffff82cbeab0 r pwr_virus_section4 -ffffffff82cbee80 r pwr_virus_section5 -ffffffff82cbf490 r pwr_virus_section6 -ffffffff82cc1000 R smu8_smu_funcs -ffffffff82cc2000 R tonga_smu_funcs -ffffffff82cc20e0 r tonga_power_tune_data_set_array -ffffffff82cc212c r tonga_clock_stretch_amount_conversion -ffffffff82cc2140 r tonga_clock_stretcher_ddt_table -ffffffff82cc3000 R vega10_smu_funcs -ffffffff82cc4000 R vega12_smu_funcs -ffffffff82cc5000 R vega20_smu_funcs -ffffffff82cc6000 R vegam_smu_funcs -ffffffff82cc60e0 r vegam_power_tune_data_set_array -ffffffff82cc6130 r Range_Table -ffffffff82cc7000 R smu_ip_funcs -ffffffff82cc70a0 R smu_v11_0_ip_block -ffffffff82cc70b8 R smu_v12_0_ip_block -ffffffff82cc70d0 R smu_v13_0_ip_block -ffffffff82cc70e8 r swsmu_pm_funcs -ffffffff82cc8000 r arcturus_table_map -ffffffff82cc8080 r arcturus_pwr_src_map -ffffffff82cc8090 r arcturus_workload_map -ffffffff82cc80d0 r arcturus_ppt_funcs -ffffffff82cc84a0 r smu11_thermal_policy -ffffffff82cc84f0 r arcturus_i2c_algo -ffffffff82cc8500 r arcturus_i2c_control_quirks -ffffffff82cc8510 r arcturus_throttler_map -ffffffff82cc8530 r arcturus_message_map -ffffffff82cc8f80 r arcturus_clk_map -ffffffff82cc9040 r arcturus_feature_mask_map -ffffffff82cca000 r cyan_skillfish_ppt_funcs -ffffffff82ccb000 r navi10_ppt_funcs -ffffffff82ccb3d0 r smu11_thermal_policy -ffffffff82ccb420 r navi10_i2c_algo -ffffffff82ccb430 r navi10_i2c_control_quirks -ffffffff82ccb440 r navi1x_throttler_map -ffffffff82ccb460 r NoDbiPrbs7 -ffffffff82ccc460 r DbiPrbs7 -ffffffff82cce000 r sienna_cichlid_ppt_funcs +ffffffff82cb0000 R vega12_pptable_funcs +ffffffff82cb1000 r clean_baco_tbl +ffffffff82cb2000 r vega20_hwmgr_funcs +ffffffff82cb22f0 r SMU7ThermalWithDelayPolicy +ffffffff82cb2340 r link_width +ffffffff82cb3000 R vega20_pptable_funcs +ffffffff82cb4000 R ci_smu_funcs +ffffffff82cb40e0 r defaults_hawaii_pro +ffffffff82cb412c r defaults_hawaii_xt +ffffffff82cb4178 r defaults_saturn_xt +ffffffff82cb41c4 r defaults_bonaire_xt +ffffffff82cb4210 r ci_program_jump_on_start.data +ffffffff82cb5000 R fiji_smu_funcs +ffffffff82cb50e0 r avfs_graphics_level +ffffffff82cb5240 r fiji_power_tune_data_set_array +ffffffff82cb5246 r fiji_clock_stretch_amount_conversion +ffffffff82cb5260 r fiji_clock_stretcher_ddt_table +ffffffff82cb6000 R iceland_smu_funcs +ffffffff82cb60e0 r defaults_icelandxt +ffffffff82cb612c r defaults_icelandpro +ffffffff82cb6178 r defaults_iceland +ffffffff82cb7000 R polaris10_smu_funcs +ffffffff82cb70e0 r avfs_graphics_level_polaris10 +ffffffff82cb72a0 r avfs_memory_level_polaris10 +ffffffff82cb72c0 r polaris10_power_tune_data_set_array +ffffffff82cb7310 r Range_Table +ffffffff82cb8000 R smu10_smu_funcs +ffffffff82cb9000 r smu7_program_jump_on_start.data +ffffffff82cb9010 r pwr_virus_table_pre +ffffffff82cb9680 r pwr_virus_table_post +ffffffff82cb9f80 r pwr_virus_section1 +ffffffff82cba610 r pwr_virus_section2 +ffffffff82cba660 r pwr_virus_section3 +ffffffff82cc1ab0 r pwr_virus_section4 +ffffffff82cc1e80 r pwr_virus_section5 +ffffffff82cc2490 r pwr_virus_section6 +ffffffff82cc4000 R smu8_smu_funcs +ffffffff82cc5000 R tonga_smu_funcs +ffffffff82cc50e0 r tonga_power_tune_data_set_array +ffffffff82cc512c r tonga_clock_stretch_amount_conversion +ffffffff82cc5140 r tonga_clock_stretcher_ddt_table +ffffffff82cc6000 R vega10_smu_funcs +ffffffff82cc7000 R vega12_smu_funcs +ffffffff82cc8000 R vega20_smu_funcs +ffffffff82cc9000 R vegam_smu_funcs +ffffffff82cc90e0 r vegam_power_tune_data_set_array +ffffffff82cc9130 r Range_Table +ffffffff82cca000 R smu_ip_funcs +ffffffff82cca0a0 R smu_v11_0_ip_block +ffffffff82cca0b8 R smu_v12_0_ip_block +ffffffff82cca0d0 R smu_v13_0_ip_block +ffffffff82cca0e8 r swsmu_pm_funcs +ffffffff82ccb000 r arcturus_table_map +ffffffff82ccb080 r arcturus_pwr_src_map +ffffffff82ccb090 r arcturus_workload_map +ffffffff82ccb0d0 r arcturus_ppt_funcs +ffffffff82ccb4a0 r smu11_thermal_policy +ffffffff82ccb4f0 r arcturus_i2c_algo +ffffffff82ccb500 r arcturus_i2c_control_quirks +ffffffff82ccb510 r arcturus_throttler_map +ffffffff82ccb530 r arcturus_message_map +ffffffff82ccbf80 r arcturus_clk_map +ffffffff82ccc040 r arcturus_feature_mask_map +ffffffff82ccd000 r cyan_skillfish_ppt_funcs +ffffffff82cce000 r navi10_ppt_funcs ffffffff82cce3d0 r smu11_thermal_policy -ffffffff82cce420 r sienna_cichlid_i2c_algo -ffffffff82cce430 r sienna_cichlid_i2c_control_quirks -ffffffff82cce440 r sienna_cichlid_throttler_map -ffffffff82ccf000 r smu_v11_0_irq_funcs -ffffffff82ccf010 r link_width -ffffffff82cd0000 r vangogh_ppt_funcs -ffffffff82cd03d0 r vangogh_throttler_map -ffffffff82cd1000 r renoir_ppt_funcs -ffffffff82cd13d0 r renoir_throttler_map -ffffffff82cd2000 r aldebaran_clk_map -ffffffff82cd20c0 r aldebaran_table_map -ffffffff82cd2140 r aldebaran_ppt_funcs -ffffffff82cd2510 r smu13_thermal_policy -ffffffff82cd2560 r aldebaran_i2c_algo -ffffffff82cd2570 r aldebaran_i2c_control_quirks -ffffffff82cd2580 r aldebaran_throttler_map -ffffffff82cd25a0 r aldebaran_message_map -ffffffff82cd2ff0 r aldebaran_feature_mask_map -ffffffff82cd4000 r smu_v13_0_irq_funcs -ffffffff82cd4010 r link_width -ffffffff82cd5000 r smu_v13_0_0_ppt_funcs -ffffffff82cd53d0 r smu13_thermal_policy -ffffffff82cd5420 r smu_v13_0_0_i2c_algo -ffffffff82cd5430 r smu_v13_0_0_i2c_control_quirks -ffffffff82cd5440 r smu_v13_0_0_throttler_map -ffffffff82cd6000 r smu_v13_0_4_ppt_funcs -ffffffff82cd7000 r smu_v13_0_5_ppt_funcs -ffffffff82cd8000 r smu_v13_0_7_ppt_funcs +ffffffff82cce420 r navi10_i2c_algo +ffffffff82cce430 r navi10_i2c_control_quirks +ffffffff82cce440 r navi1x_throttler_map +ffffffff82cce460 r NoDbiPrbs7 +ffffffff82ccf460 r DbiPrbs7 +ffffffff82cd1000 r sienna_cichlid_ppt_funcs +ffffffff82cd13d0 r smu11_thermal_policy +ffffffff82cd1420 r sienna_cichlid_i2c_algo +ffffffff82cd1430 r sienna_cichlid_i2c_control_quirks +ffffffff82cd1440 r sienna_cichlid_throttler_map +ffffffff82cd2000 r smu_v11_0_irq_funcs +ffffffff82cd2010 r link_width +ffffffff82cd3000 r vangogh_ppt_funcs +ffffffff82cd33d0 r vangogh_throttler_map +ffffffff82cd4000 r renoir_ppt_funcs +ffffffff82cd43d0 r renoir_throttler_map +ffffffff82cd5000 r aldebaran_clk_map +ffffffff82cd50c0 r aldebaran_table_map +ffffffff82cd5140 r aldebaran_ppt_funcs +ffffffff82cd5510 r smu13_thermal_policy +ffffffff82cd5560 r aldebaran_i2c_algo +ffffffff82cd5570 r aldebaran_i2c_control_quirks +ffffffff82cd5580 r aldebaran_throttler_map +ffffffff82cd55a0 r aldebaran_message_map +ffffffff82cd5ff0 r aldebaran_feature_mask_map +ffffffff82cd7000 r smu_v13_0_irq_funcs +ffffffff82cd7010 r link_width +ffffffff82cd8000 r smu_v13_0_0_ppt_funcs ffffffff82cd83d0 r smu13_thermal_policy -ffffffff82cd8420 r smu_v13_0_7_throttler_map -ffffffff82cd9000 r yellow_carp_ppt_funcs -ffffffff82cda000 r __smu_message_names -ffffffff82cdb000 R pchb_ca -ffffffff82cdc000 R amas_ca -ffffffff82cdc028 R amas_devices -ffffffff82cdc040 r amas_feature -ffffffff82cdd000 R cardslot_ca -ffffffff82cde000 R cardbus_ca -ffffffff82cdf000 R com_cardbus_ca -ffffffff82ce0000 R xl_cardbus_ca -ffffffff82ce0030 R xl_cardbus_products -ffffffff82ce1000 R dc_cardbus_ca -ffffffff82ce1030 R dc_cardbus_devices -ffffffff82ce2000 R fxp_cardbus_ca -ffffffff82ce2028 R fxp_cardbus_devices -ffffffff82ce3000 R rl_cardbus_devices -ffffffff82ce3028 R rl_cardbus_ca -ffffffff82ce4000 R re_cardbus_ca -ffffffff82ce4028 R re_cardbus_devices -ffffffff82ce5000 R ath_cardbus_ca -ffffffff82ce6000 R athn_cardbus_ca -ffffffff82ce6030 r athn_cardbus_devices -ffffffff82ce7000 R atw_cardbus_ca -ffffffff82ce7028 R atw_cardbus_devices -ffffffff82ce8000 R rtw_cardbus_ca -ffffffff82ce8028 R rtw_cardbus_devices -ffffffff82ce9000 R ral_cardbus_ca -ffffffff82ce9030 r ral_cardbus_devices -ffffffff82cea000 R acx_cardbus_ca -ffffffff82cea028 r acx_cardbus_devices -ffffffff82ceb000 R pgt_cardbus_ca -ffffffff82ceb028 R pgt_cardbus_devices -ffffffff82cec000 R ehci_cardbus_ca -ffffffff82ced000 R ohci_cardbus_ca -ffffffff82cee000 R uhci_cardbus_ca -ffffffff82cef000 R malo_cardbus_ca -ffffffff82cef028 r malo_cardbus_devices -ffffffff82cf0000 R bwi_cardbus_ca -ffffffff82cf0030 r bwi_cardbus_devices -ffffffff82cf1000 R pcmcia_ca -ffffffff82cf2000 r pcmcia_parse_cis_tuple.init_cfe -ffffffff82cf3000 r pcmcia_cis_quirks -ffffffff82cf4000 R ep_pcmcia_ca -ffffffff82cf5000 R ne_pcmcia_ca -ffffffff82cf5030 R ne2000devs -ffffffff82cf7000 R aic_pcmcia_ca -ffffffff82cf8000 R com_pcmcia_ca -ffffffff82cf9000 R wdc_pcmcia_ca -ffffffff82cfa000 R sm_pcmcia_ca -ffffffff82cfb000 R xe_pcmcia_ca -ffffffff82cfc000 R wi_pcmcia_ca -ffffffff82cfc030 r wi_pcmcia_products -ffffffff82cfd000 R malo_pcmcia_ca -ffffffff82cfe000 R an_pcmcia_ca -ffffffff82cff000 R pcib_ca -ffffffff82d00000 R amdpcib_ca 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-ffffffff82d15480 R abitav_sensors -ffffffff82d15700 R abitas_sensors -ffffffff82d15980 R abitax_sensors -ffffffff82d15bc0 R abitm4_sensors -ffffffff82d15e80 R abitan_sensors -ffffffff82d16120 R abital_sensors -ffffffff82d163a0 R abitaw_sensors -ffffffff82d16700 R abitni_sensors -ffffffff82d169a0 R abitat_sensors -ffffffff82d16cc0 R abitan2_sensors -ffffffff82d16f60 R abitab_sensors -ffffffff82d17220 R abitan3_sensors -ffffffff82d17500 R abitaw2_sensors -ffffffff82d17860 R abitat2_sensors -ffffffff82d17b60 R abitab2_sensors -ffffffff82d17ea0 R abitin_sensors -ffffffff82d181e0 R uguru_ca -ffffffff82d19000 R aps_ca -ffffffff82d1a000 R wsdisplay_emul_ca -ffffffff82d1a030 r charClass -ffffffff82d1b000 r usl_syncops -ffffffff82d1c000 R wsevent_filtops -ffffffff82d1d000 R wskbd_ca -ffffffff82d1e000 r latin1_to_upper -ffffffff82d1f000 R wsmouse_ca -ffffffff82d20000 R cyrillic_to_koi8 -ffffffff82d20060 R unicode_to_latin2 -ffffffff82d200e0 R unicode_to_latin7 -ffffffff82d21000 R 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-ffffffff8314d070 D pool_gc_tick -ffffffff8314d0b8 D pool_gc_task -ffffffff8314e000 D kprintf_mutex -ffffffff8314e010 D db_panic -ffffffff8314e014 D splassert_ctl -ffffffff8314e018 D v_putc -ffffffff8314e020 D printf_flags -ffffffff8314f000 D userconf_base -ffffffff8314f004 D userconf_maxdev -ffffffff8314f008 D userconf_totdev -ffffffff8314f00c D userconf_maxlocnames -ffffffff8314f010 D userconf_cnt -ffffffff8314f014 D userconf_lines -ffffffff8314f018 D userconf_histsz -ffffffff8314f020 D userconf_cmds -ffffffff83150000 D ftlock -ffffffff83151000 d ppollcollect.poll_errintvl -ffffffff83152000 D ttydefchars -ffffffff83152014 D ttclos -ffffffff8315201b D ttopen -ffffffff83152022 D ttybg -ffffffff83152028 D ttyin -ffffffff8315202e D ttyout -ffffffff83152038 D ttylist_lock -ffffffff83153000 D linesw -ffffffff83153280 D nlinesw -ffffffff83154000 D pt_softc_lock -ffffffff83155000 d mbstat_boot_boot_cpumem -ffffffff83155080 D mbstat -ffffffff83155090 D mclsizes -ffffffff831550b0 D m_extref_mtx -ffffffff831550c0 D m_pool_allocator -ffffffff83156000 D somaxconn -ffffffff83156004 D sominconn -ffffffff83156008 D sosplice_lock -ffffffff83157000 D sb_max -ffffffff83158000 D unp_df_lock -ffffffff83158010 D unp_gc_lock -ffffffff83158020 D unp_rights_mtx -ffffffff83158030 D unp_ino_mtx -ffffffff83158040 D unp_gc_task -ffffffff83158070 D unpst_sendspace -ffffffff83158074 D unpst_recvspace -ffffffff83158078 D unpsq_sendspace -ffffffff8315807c D unpsq_recvspace -ffffffff83158080 D unpdg_sendspace -ffffffff83158084 D unpdg_recvspace -ffffffff83159000 D doingcache -ffffffff8315a000 D maxvfsconf -ffffffff8315a010 d vfsconflist -ffffffff8315b000 D lockf_lock -ffffffff8315b010 D maxlocksperuid -ffffffff8315c000 D iftovt_tab -ffffffff8315c040 D vttoif_tab -ffffffff8315c064 D suid_clear -ffffffff8315c068 D vnode_mtx -ffffffff8315c078 D vfs_stall_lock -ffffffff8315c090 D vtypes -ffffffff8315c0e0 D vtags -ffffffff8315d000 D syncer_maxdelay -ffffffff8315d004 D syncdelay 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ppp_cloner -ffffffff8316a000 D ppp_pkt_init -ffffffff8316b000 D ppp_bsd_compress -ffffffff8316c000 D ppp_deflate -ffffffff8316c070 D ppp_deflate_draft -ffffffff8316d000 D tun_cloner -ffffffff8316d030 D tap_cloner -ffffffff8316e000 D bridgeintrq -ffffffff8316e038 D bridge_cloner -ffffffff8316f000 d veb_cloner -ffffffff8316f030 d vport_cloner -ffffffff83170000 D vlan_tagh_lk -ffffffff83170010 D vlan_cloner -ffffffff83170040 D svlan_cloner -ffffffff83171000 D pipex_list_mtx -ffffffff83171010 D pipex_prune -ffffffff83171018 D pipexoutq -ffffffff83171050 d SHAPad2 -ffffffff83172000 D rtmap_gc -ffffffff83172018 D rt_rc -ffffffff83173000 D rt_labels -ffffffff83173010 D rtlabel_mtx -ffffffff83174000 D enc_cloner -ffffffff83175000 D gre_cloner -ffffffff83175030 D gre_list -ffffffff83175040 D mgre_cloner -ffffffff83175070 D egre_cloner -ffffffff831750a0 D nvgre_cloner -ffffffff831750d0 D eoip_cloner -ffffffff83176000 D trunk_cloner -ffffffff83177000 d aggr_cloner -ffffffff83178000 d tpmr_cloner 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icmp_redirtimeout -ffffffff83187000 D ipsendredirects -ffffffff83187004 D ip_defttl -ffffffff83187008 D ip_mtudisc -ffffffff8318700c D ip_mtudisc_timeout -ffffffff83187010 D ipq_mutex -ffffffff83187020 D ip_maxqueue -ffffffff83187028 D ipintrq -ffffffff83187060 d ipsend_task -ffffffff83187090 d ipsendraw_task -ffffffff83188000 D ip_mrtproto -ffffffff83188004 d sin -ffffffff83189000 D rip_sendspace -ffffffff83189008 D rip_recvspace -ffffffff8318a000 D tcprexmtthresh -ffffffff8318a004 D tcptv_keep_init -ffffffff8318a008 D tcp_rst_ppslim -ffffffff8318a00c D tcp_ackdrop_ppslim -ffffffff8318a010 D tcp_syn_hash_size -ffffffff8318a014 D tcp_syn_cache_limit -ffffffff8318a018 D tcp_syn_bucket_limit -ffffffff8318a01c D tcp_syn_use_limit -ffffffff8318b000 D tcp_outflags -ffffffff8318c000 D tcp_timer_mtx -ffffffff8318c010 D tcp_mssdflt -ffffffff8318c014 D tcp_rttdflt -ffffffff8318c018 D tcp_do_rfc1323 -ffffffff8318c01c D tcp_do_sack -ffffffff8318c020 D tcp_do_rfc3390 -ffffffff8318c024 D tcp_reass_limit -ffffffff8318c028 D tcp_sackhole_limit -ffffffff8318d000 D tcp_backoff -ffffffff8318d034 D tcp_totbackoff -ffffffff8318e000 D tcp_sendspace -ffffffff8318e004 D tcp_recvspace -ffffffff8318e008 D tcp_autorcvbuf_inc -ffffffff8318f000 D udpcksum -ffffffff8318f004 D udp_sendspace -ffffffff8318f008 D udp_recvspace -ffffffff83190000 D ipsec_flows_mtx -ffffffff83190010 D ipsec_ids_idle -ffffffff83190014 D ipsec_ids_next_flow -ffffffff83190018 D ipsec_policy_head -ffffffff83190028 D ipsp_ids_gc_timeout -ffffffff83190070 D tdb_sadb_mtx -ffffffff83190080 d tdb_hashmask -ffffffff83191000 D ipo_tdb_mtx -ffffffff83191010 D ipsec_acquire_mtx -ffffffff83191020 D ipsec_acquire_head -ffffffff83192000 D ipsec_keep_invalid -ffffffff83192004 D ipsec_require_pfs -ffffffff83192008 D ipsec_soft_timeout -ffffffff8319200c D ipsec_exp_timeout -ffffffff83192010 D ipsec_soft_first_use -ffffffff83192014 D ipsec_exp_first_use -ffffffff83192018 D ipsec_expire_acquire -ffffffff8319201c D esp_enable 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nfsv3err_setattr -ffffffff8319f190 d nfsv3err_lookup -ffffffff8319f1a4 d nfsv3err_access -ffffffff8319f1b0 d nfsv3err_readlink -ffffffff8319f1d0 d nfsv3err_read -ffffffff8319f1f0 d nfsv3err_write -ffffffff8319f210 d nfsv3err_create -ffffffff8319f230 d nfsv3err_mkdir -ffffffff8319f250 d nfsv3err_symlink -ffffffff8319f270 d nfsv3err_mknod -ffffffff8319f290 d nfsv3err_remove -ffffffff8319f2b0 d nfsv3err_rmdir -ffffffff8319f2d0 d nfsv3err_rename -ffffffff8319f300 d nfsv3err_link -ffffffff8319f330 d nfsv3err_readdir -ffffffff8319f350 d nfsv3err_readdirplus -ffffffff8319f366 d nfsv3err_fsstat -ffffffff8319f372 d nfsv3err_fsinfo -ffffffff8319f37c d nfsv3err_pathconf -ffffffff8319f386 d nfsv3err_commit -ffffffff831a0000 D nfsrv3_procs -ffffffff831a00b8 D nfs_niothreads -ffffffff831a1000 D fragtbl -ffffffff831a2000 D ffs_vtbl -ffffffff831a3000 D softdep_typenames -ffffffff831a3070 D tickdelay -ffffffff831a4000 D dirchk -ffffffff831a5000 D desireddquot -ffffffff831a6000 D amap_list_lock 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ip6_use_deprecated -ffffffff831b2028 D ip6_neighborgcthresh -ffffffff831b202c D ip6_maxdynroutes -ffffffff831b2030 D rip6_sendspace -ffffffff831b2038 D rip6_recvspace -ffffffff831b2040 D icmp6_redirtimeout -ffffffff831b2044 D icmp6errppslim -ffffffff831b2048 D ip6_mtudisc_timeout -ffffffff831b3000 D frag6_mutex -ffffffff831b4000 d icmp6_mtudisc_hiwat -ffffffff831b4004 d icmp6_mtudisc_lowat -ffffffff831b5000 d randomtab_20 -ffffffff831b6000 D ip6intrq -ffffffff831b6038 d ip6send_task -ffffffff831b7000 D nd6_timer_next -ffffffff831b7008 D nd6_expire_next -ffffffff831b7010 D nd6_delay -ffffffff831b7014 D nd6_umaxtries -ffffffff831b7018 D nd6_mmaxtries -ffffffff831b701c D nd6_gctimer -ffffffff831b7020 D nd6_maxndopt -ffffffff831b7028 D nd6_mtx -ffffffff831b7038 D nd6_list -ffffffff831b8000 d dadq -ffffffff831b9000 D pfkeyv2_mtx -ffffffff831b9010 d pfkeyv2_seq -ffffffff831ba000 D sadb_exts_allowed_in -ffffffff831ba090 D sadb_exts_required_in -ffffffff831bb000 D cold -ffffffff831bc000 D bdevsw -ffffffff831bc460 D nblkdev -ffffffff831bc470 D cdevsw -ffffffff831be400 D nchrdev -ffffffff831be404 D mem_no -ffffffff831be408 D swapdev -ffffffff831be410 D constab -ffffffff831bf000 D machine -ffffffff831bf008 D lid_action -ffffffff831bf00c D pwr_action -ffffffff831bf010 D isa_constraint -ffffffff831bf020 D dma_constraint -ffffffff831bf030 D uvm_md_constraints -ffffffff831bf048 D delay_func -ffffffff831bf050 D initclock_func -ffffffff831bf058 D bootinfo_size -ffffffff831bf05c D waittime -ffffffff831bf060 D dumpmag -ffffffff831c0000 D tsc_rdtsc -ffffffff831c0008 D tsc_timecounter -ffffffff831c0058 D tsc_is_synchronized -ffffffff831c1000 D local_apic -ffffffff831c1020 D lapic_id -ffffffff831c1080 D lapic_tpr -ffffffff831c10a0 d lapic_ppr -ffffffff831c1100 d lapic_isr -ffffffff831c2000 D warn_once -ffffffff831c3000 d errata -ffffffff831c4000 D cpu_ucode_intel_mtx -ffffffff831c5000 D mem_owner_bios -ffffffff831c5008 D mrops -ffffffff831c5028 D mtrrmask -ffffffff831c5030 D mtrrtomrt -ffffffff831c6000 D pmap_pg_wc -ffffffff831c6008 D pmaps_lock -ffffffff831c6018 d pmap_maxkvaddr -ffffffff831c7000 D kv_physwait -ffffffff831c8000 D fpu_save_len -ffffffff831c9000 D i8259_pic -ffffffff831ca000 D softintr_pic -ffffffff831cb000 D ipifunc -ffffffff831cc000 D setperf_mp_mutex -ffffffff831cd000 D db_Grp6 -ffffffff831cd040 D db_Grp7 -ffffffff831cd100 D db_Grp8 -ffffffff831cd140 D db_Grp9 -ffffffff831cd200 D db_GrpA -ffffffff831cd240 D db_GrpB -ffffffff831cd280 D db_GrpC -ffffffff831cd2c0 D db_inst_0f0x -ffffffff831cd440 D db_inst_0f2x -ffffffff831cd5c0 D db_inst_0f3x -ffffffff831cd740 D db_inst_0f8x -ffffffff831cd8c0 D db_inst_0f9x -ffffffff831cda40 D db_inst_0fax -ffffffff831cdbc0 D db_inst_0fbx -ffffffff831cdd40 D db_inst_0fcx -ffffffff831cdec0 D db_inst_0f -ffffffff831cdf40 D db_Esc92 -ffffffff831cdf80 D db_Esc94 -ffffffff831cdfc0 D db_Esc95 -ffffffff831ce000 D db_Esc96 -ffffffff831ce040 D db_Esc97 -ffffffff831ce080 D db_Esca5 -ffffffff831ce0c0 D db_Escb4 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cpu_info_full_primary -ffffffff8321b000 D cpu_info_list -ffffffff8321b008 D mp_cpu_funcs -ffffffff8321b020 D cpu_cd -ffffffff8321b040 D cpu_info -ffffffff8321c000 D local_pic -ffffffff8321c090 D lapic_readreg -ffffffff8321c098 D lapic_writereg -ffffffff8321c0a0 D x86_ipi -ffffffff8321d000 D ioapic_cold -ffffffff8321d008 D ioapic_cd -ffffffff8321e000 D efifb_std_descr -ffffffff8321e030 D efifb_descrs -ffffffff8321e038 D efifb_accessops -ffffffff8321e098 D efifb_cd -ffffffff8321f000 D pvbus_cd -ffffffff8321f020 D pvbus_types -ffffffff8321f0e0 D pvbus_dma_tag -ffffffff83220000 D pvclock_cd -ffffffff83220020 D pvclock_timecounter -ffffffff83221000 D vmt_tclo_rpc -ffffffff832210d0 D vmt_cd -ffffffff83222000 D xen_cd -ffffffff83222020 D xen_bus_dma_tag -ffffffff83223000 D xnf_cd -ffffffff83224000 D xbf_cd -ffffffff83225000 D hv_msg_dispatch -ffffffff83225110 D hv_timecounter -ffffffff83225160 D hyperv_cd -ffffffff83226000 d hv_ic_devs -ffffffff83227000 D hvn_cd -ffffffff83228000 D hvs_cd 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rv1_update_clocks.__warned -ffffffff83674000 b rv1_vbios_smu_send_msg_with_param.__warned -ffffffff83675000 b build_watermark_ranges.__warned -ffffffff83675004 b rn_clk_mgr_helper_populate_bw_params.__warned.25 -ffffffff83675008 b find_dcfclk_for_voltage.__warned -ffffffff8367500c b find_socclk_for_voltage.__warned -ffffffff83676000 b rn_vbios_smu_set_dispclk.__warned -ffffffff83676004 b rn_vbios_smu_set_dppclk.__warned -ffffffff83676008 b rn_vbios_smu_send_msg_with_param.__warned -ffffffff83677000 b dcn301_smu_send_msg_with_param.__warned -ffffffff83678000 b dummy_wms -ffffffff8367807c b vg_build_watermark_ranges.__warned -ffffffff83678080 b vg_clk_mgr_helper_populate_bw_params.__warned.28 -ffffffff83678084 b find_dcfclk_for_voltage.__warned -ffffffff83679000 b dummy_wms -ffffffff8367907c b dummy_clocks -ffffffff836791ac b dcn31_build_watermark_ranges.__warned -ffffffff836791b0 b dcn31_clk_mgr_helper_populate_bw_params.__warned.10 -ffffffff836791b4 b dcn31_clk_mgr_helper_populate_bw_params.__warned.12 -ffffffff836791b8 b find_clk_for_voltage.__warned -ffffffff8367a000 b dcn31_smu_send_msg_with_param.__warned -ffffffff8367a004 b dcn31_smu_send_msg_with_param.__warned.4 +ffffffff82cd8420 r smu_v13_0_0_i2c_algo +ffffffff82cd8430 r smu_v13_0_0_i2c_control_quirks +ffffffff82cd8440 r smu_v13_0_0_throttler_map +ffffffff82cd9000 r smu_v13_0_4_ppt_funcs +ffffffff82cda000 r smu_v13_0_5_ppt_funcs +ffffffff82cdb000 r smu_v13_0_7_ppt_funcs +ffffffff82cdb3d0 r smu13_thermal_policy +ffffffff82cdb420 r smu_v13_0_7_throttler_map +ffffffff82cdc000 r yellow_carp_ppt_funcs +ffffffff82cdd000 r __smu_message_names +ffffffff82cde000 R pchb_ca +ffffffff82cdf000 R amas_ca +ffffffff82cdf028 R amas_devices +ffffffff82cdf040 r amas_feature +ffffffff82ce0000 R cardslot_ca +ffffffff82ce1000 R cardbus_ca +ffffffff82ce2000 R com_cardbus_ca +ffffffff82ce3000 R xl_cardbus_ca +ffffffff82ce3030 R xl_cardbus_products +ffffffff82ce4000 R dc_cardbus_ca +ffffffff82ce4030 R dc_cardbus_devices +ffffffff82ce5000 R fxp_cardbus_ca +ffffffff82ce5028 R fxp_cardbus_devices +ffffffff82ce6000 R rl_cardbus_devices +ffffffff82ce6028 R rl_cardbus_ca +ffffffff82ce7000 R re_cardbus_ca +ffffffff82ce7028 R re_cardbus_devices +ffffffff82ce8000 R ath_cardbus_ca +ffffffff82ce9000 R athn_cardbus_ca +ffffffff82ce9030 r athn_cardbus_devices +ffffffff82cea000 R atw_cardbus_ca +ffffffff82cea028 R atw_cardbus_devices +ffffffff82ceb000 R rtw_cardbus_ca +ffffffff82ceb028 R rtw_cardbus_devices +ffffffff82cec000 R ral_cardbus_ca +ffffffff82cec030 r ral_cardbus_devices +ffffffff82ced000 R acx_cardbus_ca +ffffffff82ced028 r acx_cardbus_devices +ffffffff82cee000 R pgt_cardbus_ca +ffffffff82cee028 R pgt_cardbus_devices +ffffffff82cef000 R ehci_cardbus_ca +ffffffff82cf0000 R ohci_cardbus_ca +ffffffff82cf1000 R uhci_cardbus_ca +ffffffff82cf2000 R malo_cardbus_ca +ffffffff82cf2028 r malo_cardbus_devices +ffffffff82cf3000 R bwi_cardbus_ca +ffffffff82cf3030 r bwi_cardbus_devices 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R vga_isa_ca +ffffffff82d0e000 R wdc_isa_ca +ffffffff82d0f000 R mpu_midi_hw_if +ffffffff82d10000 R mpu_isa_ca +ffffffff82d11000 R pcppi_ca +ffffffff82d12000 R spkr_ca +ffffffff82d12030 r pitchtab +ffffffff82d13000 R lpt_isa_ca +ffffffff82d14000 R wbsio_ca +ffffffff82d15000 R schsio_ca +ffffffff82d16000 R lm_isa_ca +ffffffff82d16028 R lm_wbsio_ca +ffffffff82d17000 R it_sensors +ffffffff82d17110 R it_vrfact +ffffffff82d17140 R it_fan_regs +ffffffff82d17160 R it_fan_ext_regs +ffffffff82d17178 R it_ca +ffffffff82d18000 R abitkv_sensors +ffffffff82d18200 R abitaa_sensors +ffffffff82d18480 R abitav_sensors +ffffffff82d18700 R abitas_sensors +ffffffff82d18980 R abitax_sensors +ffffffff82d18bc0 R abitm4_sensors +ffffffff82d18e80 R abitan_sensors +ffffffff82d19120 R abital_sensors +ffffffff82d193a0 R abitaw_sensors +ffffffff82d19700 R abitni_sensors +ffffffff82d199a0 R abitat_sensors +ffffffff82d19cc0 R abitan2_sensors +ffffffff82d19f60 R abitab_sensors +ffffffff82d1a220 R abitan3_sensors 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pckbd_xtbl_ext +ffffffff82d28000 r pckbd_keydesc_us +ffffffff82d28250 r pckbd_keydesc_de +ffffffff82d282f0 r pckbd_keydesc_de_nodead +ffffffff82d28310 r pckbd_keydesc_fr +ffffffff82d283d0 r pckbd_keydesc_fr_dvorak_bepo +ffffffff82d28510 r pckbd_keydesc_dk +ffffffff82d285a0 r pckbd_keydesc_dk_nodead +ffffffff82d285b0 r pckbd_keydesc_it +ffffffff82d28640 r pckbd_keydesc_uk +ffffffff82d286e0 r pckbd_keydesc_jp +ffffffff82d28750 r pckbd_keydesc_sv +ffffffff82d28780 r pckbd_keydesc_sv_nodead +ffffffff82d28790 r pckbd_keydesc_no +ffffffff82d287c0 r pckbd_keydesc_no_nodead +ffffffff82d287d0 r pckbd_keydesc_us_declk +ffffffff82d28860 r pckbd_keydesc_us_dvorak +ffffffff82d28900 r pckbd_keydesc_us_colemak +ffffffff82d28948 r pckbd_keydesc_swapctrlcaps +ffffffff82d28960 r pckbd_keydesc_iopener +ffffffff82d289b0 r pckbd_keydesc_es +ffffffff82d28a50 r pckbd_keydesc_be +ffffffff82d28b10 r pckbd_keydesc_ru +ffffffff82d28c80 r pckbd_keydesc_ua +ffffffff82d28e10 r pckbd_keydesc_sg +ffffffff82d28ec0 r pckbd_keydesc_sg_nodead +ffffffff82d28ee0 r pckbd_keydesc_sf +ffffffff82d28f00 r pckbd_keydesc_pt +ffffffff82d28f90 r pckbd_keydesc_lt +ffffffff82d29070 r pckbd_keydesc_la +ffffffff82d29100 r pckbd_keydesc_br +ffffffff82d29180 r pckbd_keydesc_tr +ffffffff82d29230 r pckbd_keydesc_tr_nodead +ffffffff82d29250 r pckbd_keydesc_pl +ffffffff82d292b0 r pckbd_keydesc_hu +ffffffff82d293c0 r pckbd_keydesc_si +ffffffff82d294d0 r pckbd_keydesc_cf +ffffffff82d295a0 r pckbd_keydesc_cf_nodead +ffffffff82d295c0 r pckbd_keydesc_lv +ffffffff82d29640 r pckbd_keydesc_nl +ffffffff82d29720 r pckbd_keydesc_nl_nodead +ffffffff82d29740 r pckbd_keydesc_is +ffffffff82d297cc r pckbd_keydesc_is_nodead +ffffffff82d297e0 r pckbd_keydesc_ee +ffffffff82d29890 r pckbd_keydesc_ee_nodead +ffffffff82d298b0 R pckbd_keydesctab +ffffffff82d2a000 R pms_ca +ffffffff82d2a028 R pms_accessops +ffffffff82d2a040 R pms_sec_accessops +ffffffff82d2a060 R pms_protocols +ffffffff82d2a1e0 r alps_models +ffffffff82d2b000 R skgpio_led_offset +ffffffff82d2b008 R skgpio_ca +ffffffff82d2c000 R hidkbd_trtab +ffffffff82d2c100 r apple_fn_trans +ffffffff82d2c120 r apple_tb_trans +ffffffff82d2c140 r apple_mba_trans +ffffffff82d2d000 r hidcc_attach_wskbd.accessops +ffffffff82d2d020 r hidcc_keysyms +ffffffff82d2e000 R usb_ca +ffffffff82d2f000 R usb_known_products +ffffffff82d3af60 R usb_known_vendors +ffffffff82d3d760 R usbd_error_strs +ffffffff82d3e000 R usb_quirks +ffffffff82d3e390 R usb_dev_quirks +ffffffff82d3e398 R usbd_no_quirk +ffffffff82d3f000 R uhub_ca +ffffffff82d3f028 R uhub_uhub_ca +ffffffff82d40000 R uaudio_ca +ffffffff82d40028 R uaudio_hw_if +ffffffff82d400e0 R uaudio_rates +ffffffff82d40120 r uaudio_clkname.names +ffffffff82d40140 r uaudio_feature_addent.features +ffffffff82d41000 R uvideo_ca +ffffffff82d41028 R uvideo_hw_if +ffffffff82d41100 R uvideo_devs +ffffffff82d42000 r utvfu_select_norm.pal +ffffffff82d42040 r utvfu_select_norm.ntsc +ffffffff82d42080 r utvfu_setup_capture.setup +ffffffff82d42180 r utvfu_audio_start_chip.setup +ffffffff82d421c8 r utvfu_audio_stop_chip.setup +ffffffff82d421d8 R utvfu_ca +ffffffff82d42200 R utvfu_vid_hw_if +ffffffff82d422d0 R utvfu_au_hw_if +ffffffff82d43000 R udl_ca +ffffffff82d43030 r udl_devs +ffffffff82d430b0 r udl_modes +ffffffff82d44000 R umidi_hw_if +ffffffff82d44030 R umidi_ca +ffffffff82d44060 r umidi_evlen +ffffffff82d44080 r packet_length +ffffffff82d45000 r quirk_name +ffffffff82d46000 R ucom_ca +ffffffff82d47000 R ugen_ca +ffffffff82d47028 R ugenread_intr_filtops +ffffffff82d47058 R ugenread_isoc_filtops +ffffffff82d48000 R uhidev_ca +ffffffff82d48030 r uhid_graphire_report_descr +ffffffff82d480b0 r uhid_graphire3_4x5_report_descr +ffffffff82d48160 r uhid_xb360gp_report_descr +ffffffff82d48210 r uhid_xbonegp_report_descr +ffffffff82d49000 R uhid_ca +ffffffff82d49028 R uhidread_filtops +ffffffff82d4a000 R fido_ca +ffffffff82d4b000 R ujoy_ca +ffffffff82d4c000 r ukbd_keydesc_us +ffffffff82d4c290 r ukbd_keydesc_de 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r ukbd_keydesc_pt_apple +ffffffff82d4d100 r ukbd_keydesc_lt +ffffffff82d4d1e0 r ukbd_keydesc_la +ffffffff82d4d280 r ukbd_keydesc_br +ffffffff82d4d310 r ukbd_keydesc_tr +ffffffff82d4d3d0 r ukbd_keydesc_tr_nodead +ffffffff82d4d3f0 r ukbd_keydesc_pl +ffffffff82d4d450 r ukbd_keydesc_hu +ffffffff82d4d560 r ukbd_keydesc_si +ffffffff82d4d680 r ukbd_keydesc_cf +ffffffff82d4d760 r ukbd_keydesc_cf_nodead +ffffffff82d4d780 r ukbd_keydesc_lv +ffffffff82d4d800 r ukbd_keydesc_nl +ffffffff82d4d8e0 r ukbd_keydesc_nl_nodead +ffffffff82d4d900 r ukbd_keydesc_is +ffffffff82d4d994 r ukbd_keydesc_is_nodead +ffffffff82d4d9a0 r ukbd_keydesc_ee +ffffffff82d4da50 r ukbd_keydesc_ee_nodead +ffffffff82d4da70 R ukbd_keydesctab +ffffffff82d4e000 R ukbd_countrylayout +ffffffff82d4e090 R ukbd_consops +ffffffff82d4e0b0 R ukbd_accessops +ffffffff82d4e0c8 R ukbd_ca +ffffffff82d4f000 R ums_accessops +ffffffff82d4f018 R ums_ca +ffffffff82d50000 R umt_accessops +ffffffff82d50018 R umt_ca +ffffffff82d51000 R uts_devs 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uoakv_devs +ffffffff82d5e008 R uoakv_ca +ffffffff82d5e030 R uoakv_methods +ffffffff82d5f000 R uonerng_ca +ffffffff82d60000 R urng_ca +ffffffff82d60030 r urng_devs +ffffffff82d61000 R udcf_ca +ffffffff82d61028 r udcf_devs +ffffffff82d62000 R umbg_ca +ffffffff82d63000 R uvisor_methods +ffffffff82d63040 R uvisor_ca +ffffffff82d63070 r uvisor_devs +ffffffff82d64000 R udsbr_hw_if +ffffffff82d64028 R udsbr_ca +ffffffff82d65000 R utwitch_devs +ffffffff82d65008 R utwitch_ca +ffffffff82d66000 R aue_devs +ffffffff82d661b0 R aue_ca +ffffffff82d67000 R axe_devs +ffffffff82d670d0 R axe_ca +ffffffff82d68000 R axen_devs +ffffffff82d68020 R axen_ca +ffffffff82d69000 R smsc_ca +ffffffff82d69030 r smsc_devs +ffffffff82d6a000 R cue_ca +ffffffff82d6b000 R kue_devs +ffffffff82d6b088 R kue_ca +ffffffff82d6c000 R cdce_devs +ffffffff82d6c0a0 R cdce_ca +ffffffff82d6d000 R urndis_ca +ffffffff82d6d030 R urndis_class +ffffffff82d6e000 R mos_devs +ffffffff82d6e018 R mos_ca +ffffffff82d6f000 R mue_devs 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uslcom_ca +ffffffff82d7d070 r uslcom_devs +ffffffff82d7e000 R uark_methods +ffffffff82d7e040 R uark_ca +ffffffff82d7e068 r uark_devs +ffffffff82d7f000 R moscom_methods +ffffffff82d7f040 R moscom_ca +ffffffff82d7f068 r moscom_devs +ffffffff82d80000 R umcs_methods +ffffffff82d80040 R umcs_devs +ffffffff82d80050 R umcs_ca +ffffffff82d81000 R uscom_methods +ffffffff82d81040 R uscom_ca +ffffffff82d81068 r uscom_devs +ffffffff82d82000 R ucrcom_methods +ffffffff82d82040 R ucrcom_ca +ffffffff82d83000 R uxrcom_methods +ffffffff82d83040 R uxrcom_ca +ffffffff82d83068 r uxrcom_devs +ffffffff82d84000 R uipaq_methods +ffffffff82d84040 R uipaq_ca +ffffffff82d84070 r uipaq_devs +ffffffff82d85000 R umsm_methods +ffffffff82d85040 R umsm_ca +ffffffff82d85070 r umsm_devs +ffffffff82d86000 R uchcom_methods +ffffffff82d86040 R uchcom_ca +ffffffff82d86068 r uchcom_devs +ffffffff82d86080 r dividers +ffffffff82d87000 R uticom_methods +ffffffff82d87040 R uticom_ca +ffffffff82d87070 r uticom_devs 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+ffffffff830f8000 D com_cd +ffffffff830f8020 D comdefaultrate +ffffffff830f8024 D comconsrate +ffffffff830f8028 D comconscflag +ffffffff830f8030 d comcnattach.comcons +ffffffff830f9000 D pckbc_slot_names +ffffffff830f9010 D pckbc_cd +ffffffff830fa000 D ac97civ +ffffffff830fb000 D cy_cd +ffffffff830fc000 D lpt_cd +ffffffff830fd000 D lm_cd +ffffffff830fe000 D ath_dwelltime +ffffffff830fe004 D ath_calinterval +ffffffff830fe008 D ath_outdoor +ffffffff830fe00c D ath_xchanmode +ffffffff830fe010 D ath_softcrypto +ffffffff830fe018 D ath_cd +ffffffff830ff000 D athn_cd +ffffffff83100000 D bwfm_2ghz_channels +ffffffff83100010 D bwfm_5ghz_channels +ffffffff83100030 D bwfm_proto_bcdc_ops +ffffffff83100050 D bwfm_cd +ffffffff83101000 D atw_bbp_io_enable_delay +ffffffff83101004 D atw_bbp_io_disable_delay +ffffffff83101008 D atw_writewep_delay +ffffffff8310100c D atw_beacon_len_adjust +ffffffff83101010 D atw_dwelltime +ffffffff83101018 D atw_cd +ffffffff83102000 D rtw_dwelltime +ffffffff83102004 D rtw_macbangbits_timeout +ffffffff83102008 D rtw_cd +ffffffff83103000 D ral_cd +ffffffff83104000 D rt3090_freqs +ffffffff83105000 D acx_beacon_intvl +ffffffff83105008 D acx_cd +ffffffff83106000 D pgt_cd +ffffffff83107000 D sf_cd +ffffffff83108000 D malo_cd +ffffffff83109000 D bwi_cd +ffffffff83109020 D bwi_constraint +ffffffff83109030 D bwi_pa_mode +ffffffff8310a000 D iosf_cd +ffffffff8310a020 d iosf_lock +ffffffff8310a030 d iosf_mbi_mtx +ffffffff8310b000 D uhci_cd +ffffffff8310c000 D ohci_cd +ffffffff8310d000 D ehci_cd +ffffffff8310e000 D xhci_cd +ffffffff8310f000 D ccp_cd +ffffffff83110000 D sdhc_functions +ffffffff83110068 D sdhc_cd +ffffffff83111000 D rtsx_functions +ffffffff83111068 D rtsx_cd +ffffffff83112000 D radio_cd +ffffffff83113000 D kcs_if +ffffffff83113040 D smic_if +ffffffff83113080 D bt_if +ffffffff831130c0 D ipmi_cd +ffffffff831130e0 D maxsdrlen +ffffffff83114000 D vscsi_cd +ffffffff83115000 D mpath_cd +ffffffff83116000 D softraid_cd +ffffffff83116020 D smd +ffffffff83117000 D spdmem_cd +ffffffff83118000 D dwiic_cd +ffffffff83119000 D kstat_lock +ffffffff83119010 D kstat_next_id +ffffffff83119018 D kstat_default_lock +ffffffff8311a000 D pf_hdr_limit +ffffffff8311a008 D pf_purge_task +ffffffff8311a038 D pf_purge_to +ffffffff8311a080 D pf_pool_limits +ffffffff8311a0f0 D pf_state_list +ffffffff8311b000 D pf_tags +ffffffff8311b010 D pf_qids +ffffffff8311b020 D pf_lock +ffffffff8311b030 D pf_state_lock +ffffffff8311b040 D pfioctl_rw +ffffffff8311b050 D trans_ticket +ffffffff8311b058 d pf_open_trans.ticket +ffffffff8311c000 D pfi_update +ffffffff8311d000 D pflog_cloner +ffffffff8311e000 D pfsync_qs +ffffffff8311e078 D pfsync_cloner +ffffffff8311e0a8 d pfsync_task +ffffffff8311f000 D pflow_cloner +ffffffff83120000 D pppoe_cloner +ffffffff83120030 D pppoediscinq +ffffffff83120060 D pppoeinq +ffffffff83121000 D dt_lock +ffffffff83122000 D dt_prov_profile +ffffffff83122030 D dt_prov_interval +ffffffff83123000 D dtps_nsysent +ffffffff83123008 D dt_prov_syscall +ffffffff83124000 D dt_prov_static +ffffffff83124030 D dt_static_sched_dequeue +ffffffff831240a0 D dt_static_sched_enqueue +ffffffff83124110 D dt_static_sched_off__cpu +ffffffff83124180 D dt_static_sched_on__cpu +ffffffff831241f0 D dt_static_sched_remain__cpu +ffffffff83124260 D dt_static_sched_sleep +ffffffff831242d0 D dt_static_sched_wakeup +ffffffff83124340 D dt_static_raw_syscalls_sys_enter +ffffffff831243b0 D dt_static_raw_syscalls_sys_exit +ffffffff83124420 D dt_static_uvm_fault +ffffffff83124490 D dt_static_uvm_map_insert +ffffffff83124500 D dt_static_uvm_map_remove +ffffffff83124570 D dt_static_uvm_malloc +ffffffff831245e0 D dt_static_uvm_free +ffffffff83124650 D dt_static_uvm_pool_get +ffffffff831246c0 D dt_static_uvm_pool_put +ffffffff83124730 D dt_static_vfs_bufcache_rel +ffffffff831247a0 D dt_static_vfs_bufcache_take +ffffffff83124810 D dt_static_vfs_cleaner +ffffffff83124880 D dt_static_vmm_guest_enter +ffffffff831248f0 D dt_static_vmm_guest_exit +ffffffff83124960 D dt_static_vmm_inout +ffffffff831249d0 D dt_static_smr_call +ffffffff83124a40 D dt_static_smr_called +ffffffff83124ab0 D dt_static_smr_barrier_enter +ffffffff83124b20 D dt_static_smr_barrier_exit +ffffffff83124b90 D dt_static_smr_wakeup +ffffffff83124c00 D dt_static_smr_thread +ffffffff83124c70 D dt_static_refcnt_none +ffffffff83124ce0 D dt_static_refcnt_ifaddr +ffffffff83124d50 D dt_static_refcnt_inpcb +ffffffff83124dc0 D dt_static_refcnt_rtentry +ffffffff83124e30 D dt_static_refcnt_tdb +ffffffff83125000 D db_next_free_breakpoint +ffffffff83125008 D db_breakpoints_inserted +ffffffff83126000 D db_ed_style +ffffffff83127000 D db_examine_format +ffffffff83127078 D db_print_format +ffffffff83128000 D db_history_size +ffffffff83128008 D db_history_curr +ffffffff83128010 D db_history_last +ffffffff83129000 D db_tab_stop_width +ffffffff83129004 D db_max_line +ffffffff83129008 D db_max_width +ffffffff8312900c D db_radix +ffffffff8312a000 D db_lastsym +ffffffff8312a008 D db_maxoff +ffffffff8312b000 D db_vars +ffffffff8312b090 D db_evars +ffffffff8312c000 D db_watchpoints_inserted +ffffffff8312c008 D db_next_free_watchpoint +ffffffff8312d000 D db_log +ffffffff8312e000 D audio_cd +ffffffff8312e020 D audio_lock +ffffffff8312f000 D midi_cd +ffffffff83130000 D rnd_cold +ffffffff83130004 D rnd_slowextract +ffffffff83130008 D rnd_timeout +ffffffff83130050 D rndlock +ffffffff83130060 D rndreinit_timeout +ffffffff831300a8 D rnd_task +ffffffff83131000 D video_cd +ffffffff83132000 d rrip_table_analyze +ffffffff831320e0 d rrip_table_getname +ffffffff831321e0 d rrip_table_getsymname +ffffffff83132280 d rrip_table_extref +ffffffff83133000 D nexecs +ffffffff83134000 D elf_note_names +ffffffff83135000 D ncpus +ffffffff83135004 D ncpusfound +ffffffff83136000 D acct_lock +ffffffff83136010 D acctsuspend +ffffffff83136014 D acctresume +ffffffff83136018 D acctrate +ffffffff83137000 D ticks +ffffffff83137008 D jiffies +ffffffff83138000 D clockintr_mtx +ffffffff83138010 D statclock_gen +ffffffff83139000 D fhdlk +ffffffff8313a000 D kqueue_klist_lock +ffffffff8313a010 D kq_timeoutmax +ffffffff8313b000 D stackgap_random +ffffffff8313c000 D nprocesses +ffffffff8313c004 D nthreads +ffffffff8313c008 D fork_tfmrate +ffffffff8313d000 D kthread_q +ffffffff8313e000 D malloc_mtx +ffffffff8313e010 D memname +ffffffff8313e4a0 D sysctl_kmemlock +ffffffff8313e4b0 D malloc_errintvl +ffffffff8313f000 D maxdmap +ffffffff8313f008 D maxsmap +ffffffff8313f010 D rlimit_lock +ffffffff83140000 D sched_cost_load +ffffffff83140004 D sched_cost_priority +ffffffff83140008 D sched_cost_runnable +ffffffff8314000c D sched_cost_resident +ffffffff83141000 D intrmap_lock +ffffffff83142000 D nosuidcoredump +ffffffff83142008 D sigio_lock +ffffffff83143000 D smr_lock +ffffffff83143010 D smr_logintvl +ffffffff83144000 D startuphook_list +ffffffff83145000 D sysctl_lock +ffffffff83145010 D sysctl_disklock +ffffffff83145020 d openbsd +ffffffff83145024 d arg_max +ffffffff83145028 d posix_version +ffffffff8314502c d ngroups_max +ffffffff83145030 d int_one +ffffffff83145034 d maxpartitions +ffffffff83145038 d raw_part +ffffffff8314503c D allowpowerdown +ffffffff83145040 D hw_power +ffffffff83145044 d byte_order +ffffffff83145048 d page_size +ffffffff83146000 d thrsleep_queue +ffffffff83146010 d thrsleep_lock +ffffffff83147000 D tc_lock +ffffffff83147010 D windup_mtx +ffffffff83147020 D timecounter +ffffffff83147028 D time_second +ffffffff83147030 d timehands +ffffffff83147038 d dummy_timecounter +ffffffff83147088 d th0 +ffffffff83147120 d th1 +ffffffff83148000 D itimer_mtx +ffffffff83148010 D ratecheck_mtx +ffffffff83148020 D ppsratecheck_mtx +ffffffff83148030 D resettodr_to +ffffffff83148078 D resettodr_task +ffffffff83149000 D timeout_mutex +ffffffff8314a000 D wdog_auto +ffffffff8314b000 D taskq_sys +ffffffff8314b050 D taskq_sys_mp +ffffffff8314c000 D ccpu +ffffffff8314c004 D perflevel +ffffffff8314c008 D perfpolicy +ffffffff8314c010 D setperf_to +ffffffff8314d000 D autoconf_attdet_mtx +ffffffff8314d010 D msgs +ffffffff8314e000 d evcount_list +ffffffff8314e010 d evcount_percpu_init_list +ffffffff8314f000 D syslogf_rwlock +ffffffff8314f010 D log_mtx +ffffffff8314f020 D logstash_in +ffffffff8314f028 D logstash_out +ffffffff8314f030 D logstash_rwlock +ffffffff83150000 D pool_head +ffffffff83150010 D pool_lock +ffffffff83150020 D pool_debug +ffffffff83150028 D pool_allocator_single +ffffffff83150040 D pool_allocator_multi +ffffffff83150058 D pool_allocator_multi_ni +ffffffff83150070 D pool_gc_tick +ffffffff831500b8 D pool_gc_task +ffffffff83151000 D kprintf_mutex +ffffffff83151010 D db_panic +ffffffff83151014 D splassert_ctl +ffffffff83151018 D v_putc +ffffffff83151020 D printf_flags +ffffffff83152000 D userconf_base +ffffffff83152004 D userconf_maxdev +ffffffff83152008 D userconf_totdev +ffffffff8315200c D userconf_maxlocnames +ffffffff83152010 D userconf_cnt +ffffffff83152014 D userconf_lines +ffffffff83152018 D userconf_histsz +ffffffff83152020 D userconf_cmds +ffffffff83153000 D ftlock +ffffffff83154000 d ppollcollect.poll_errintvl +ffffffff83155000 D ttydefchars +ffffffff83155014 D ttclos +ffffffff8315501b D ttopen +ffffffff83155022 D ttybg +ffffffff83155028 D ttyin +ffffffff8315502e D ttyout +ffffffff83155038 D ttylist_lock +ffffffff83156000 D linesw +ffffffff83156280 D nlinesw +ffffffff83157000 D pt_softc_lock +ffffffff83158000 d mbstat_boot_boot_cpumem +ffffffff83158080 D mbstat +ffffffff83158090 D mclsizes +ffffffff831580b0 D m_extref_mtx +ffffffff831580c0 D m_pool_allocator +ffffffff83159000 D somaxconn +ffffffff83159004 D sominconn +ffffffff83159008 D sosplice_lock +ffffffff8315a000 D sb_max +ffffffff8315b000 D unp_df_lock +ffffffff8315b010 D unp_gc_lock +ffffffff8315b020 D unp_rights_mtx +ffffffff8315b030 D unp_ino_mtx +ffffffff8315b040 D unp_gc_task +ffffffff8315b070 D unpst_sendspace +ffffffff8315b074 D unpst_recvspace +ffffffff8315b078 D unpsq_sendspace +ffffffff8315b07c D unpsq_recvspace +ffffffff8315b080 D unpdg_sendspace +ffffffff8315b084 D unpdg_recvspace +ffffffff8315c000 D doingcache +ffffffff8315d000 D maxvfsconf +ffffffff8315d010 d vfsconflist +ffffffff8315e000 D lockf_lock +ffffffff8315e010 D maxlocksperuid +ffffffff8315f000 D iftovt_tab +ffffffff8315f040 D vttoif_tab +ffffffff8315f064 D suid_clear +ffffffff8315f068 D vnode_mtx +ffffffff8315f078 D vfs_stall_lock +ffffffff8315f090 D vtypes +ffffffff8315f0e0 D vtags +ffffffff83160000 D syncer_maxdelay +ffffffff83160004 D syncdelay +ffffffff83161000 D dosdirtemplate +ffffffff83162000 D ntfs_hashlock +ffffffff83163000 D ntfs_toupper_lock +ffffffff83164000 D art_table_gc_mtx +ffffffff83164010 D art_table_gc_task +ffffffff83164040 D art_node_gc_mtx +ffffffff83164050 D art_node_gc_task +ffffffff83165000 D bpf_bufsize +ffffffff83165004 D bpf_maxbufsize +ffffffff83165008 D bpf_sysctl_lk +ffffffff83166000 D ifg_head +ffffffff83166010 D if_cloners_lock +ffffffff83166020 D if_input_task_locked +ffffffff83166050 D netlock +ffffffff83166060 D ifnetlist +ffffffff83167000 D ifiq_maxlen_drop +ffffffff83167004 D ifiq_maxlen_return +ffffffff83168000 D etherbroadcastaddr +ffffffff83168006 D ether_ipmulticast_min +ffffffff8316800c D ether_ipmulticast_max +ffffffff83168012 D ether_ip6multicast_min +ffffffff83168018 D ether_ip6multicast_max +ffffffff83169000 D etherip_cloner +ffffffff83169030 D etherip_list +ffffffff8316a000 D loop_cloner +ffffffff8316b000 D ifmedia_mtx +ffffffff8316c000 D ppp_compressors +ffffffff8316c020 D ppp_cloner +ffffffff8316d000 D ppp_pkt_init +ffffffff8316e000 D ppp_bsd_compress +ffffffff8316f000 D ppp_deflate +ffffffff8316f070 D ppp_deflate_draft +ffffffff83170000 D tun_cloner +ffffffff83170030 D tap_cloner +ffffffff83171000 D bridgeintrq +ffffffff83171038 D bridge_cloner +ffffffff83172000 d veb_cloner +ffffffff83172030 d vport_cloner +ffffffff83173000 D vlan_tagh_lk +ffffffff83173010 D vlan_cloner +ffffffff83173040 D svlan_cloner +ffffffff83174000 D pipex_list_mtx +ffffffff83174010 D pipex_prune +ffffffff83174018 D pipexoutq +ffffffff83174050 d SHAPad2 +ffffffff83175000 D rtmap_gc +ffffffff83175018 D rt_rc +ffffffff83176000 D rt_labels +ffffffff83176010 D rtlabel_mtx +ffffffff83177000 D enc_cloner +ffffffff83178000 D gre_cloner +ffffffff83178030 D gre_list +ffffffff83178040 D mgre_cloner +ffffffff83178070 D egre_cloner +ffffffff831780a0 D nvgre_cloner +ffffffff831780d0 D eoip_cloner +ffffffff83179000 D trunk_cloner +ffffffff8317a000 d aggr_cloner +ffffffff8317b000 d tpmr_cloner +ffffffff8317c000 D mpe_cloner +ffffffff8317d000 D mpw_cloner +ffffffff8317e000 D mpip_cloner +ffffffff8317f000 d bpe_cloner +ffffffff8317f030 d bpe_lock +ffffffff83180000 D vether_cloner +ffffffff83181000 D pair_cloner +ffffffff83182000 d vxlan_cloner +ffffffff83182030 d vxlan_lock +ffffffff83182040 d vxlan_teps +ffffffff83183000 D underload_interval +ffffffff83183010 D wg_cloner +ffffffff83184000 d stoeplitz_keyseed +ffffffff83185000 D ieee80211_cache_size +ffffffff83186000 D arpt_prune +ffffffff83186004 D arpt_keep +ffffffff83186008 D arpt_down +ffffffff83186010 D arpinq +ffffffff83186048 D arp_mtx +ffffffff83186058 D arp_maxtries +ffffffff83187000 D ipport_firstauto +ffffffff83187004 D ipport_lastauto +ffffffff83187008 D ipport_hifirstauto +ffffffff8318700c D ipport_hilastauto +ffffffff83188000 D divert_sendspace +ffffffff83188004 D divert_recvspace +ffffffff83188008 D divbhashsize +ffffffff83189000 D icmptstamprepl +ffffffff83189004 D icmperrppslim +ffffffff83189008 D icmp_redirtimeout +ffffffff8318a000 D ipsendredirects +ffffffff8318a004 D ip_defttl +ffffffff8318a008 D ip_mtudisc +ffffffff8318a00c D ip_mtudisc_timeout +ffffffff8318a010 D ipq_mutex +ffffffff8318a020 D ip_maxqueue +ffffffff8318a028 D ipintrq +ffffffff8318a060 d ipsend_task +ffffffff8318a090 d ipsendraw_task +ffffffff8318b000 D ip_mrtproto +ffffffff8318b004 d sin +ffffffff8318c000 D rip_sendspace +ffffffff8318c008 D rip_recvspace +ffffffff8318d000 D tcprexmtthresh +ffffffff8318d004 D tcptv_keep_init +ffffffff8318d008 D tcp_rst_ppslim +ffffffff8318d00c D tcp_ackdrop_ppslim +ffffffff8318d010 D tcp_syn_hash_size +ffffffff8318d014 D tcp_syn_cache_limit +ffffffff8318d018 D tcp_syn_bucket_limit +ffffffff8318d01c D tcp_syn_use_limit +ffffffff8318e000 D tcp_outflags +ffffffff8318f000 D tcp_timer_mtx +ffffffff8318f010 D tcp_mssdflt +ffffffff8318f014 D tcp_rttdflt +ffffffff8318f018 D tcp_do_rfc1323 +ffffffff8318f01c D tcp_do_sack +ffffffff8318f020 D tcp_do_rfc3390 +ffffffff8318f024 D tcp_do_tso +ffffffff8318f028 D tcp_reass_limit +ffffffff8318f02c D tcp_sackhole_limit +ffffffff83190000 D tcp_backoff +ffffffff83190034 D tcp_totbackoff +ffffffff83191000 D tcp_sendspace +ffffffff83191004 D tcp_recvspace +ffffffff83191008 D tcp_autorcvbuf_inc +ffffffff83192000 D udpcksum +ffffffff83192004 D udp_sendspace +ffffffff83192008 D udp_recvspace +ffffffff83193000 D ipsec_flows_mtx +ffffffff83193010 D ipsec_ids_idle +ffffffff83193014 D ipsec_ids_next_flow +ffffffff83193018 D ipsec_policy_head +ffffffff83193028 D ipsp_ids_gc_timeout +ffffffff83193070 D tdb_sadb_mtx +ffffffff83193080 d tdb_hashmask +ffffffff83194000 D ipo_tdb_mtx +ffffffff83194010 D ipsec_acquire_mtx +ffffffff83194020 D ipsec_acquire_head +ffffffff83195000 D ipsec_keep_invalid +ffffffff83195004 D ipsec_require_pfs +ffffffff83195008 D ipsec_soft_timeout +ffffffff8319500c D ipsec_exp_timeout +ffffffff83195010 D ipsec_soft_first_use +ffffffff83195014 D ipsec_exp_first_use +ffffffff83195018 D ipsec_expire_acquire +ffffffff8319501c D esp_enable +ffffffff83195020 D ah_enable +ffffffff83196000 D udpencap_enable +ffffffff83196004 D udpencap_port +ffffffff83197000 D carp_vh_rc +ffffffff83197020 D carp_sc_rc +ffffffff83197040 D carp_opts +ffffffff83197058 D carp_cloner +ffffffff83197088 d carp_send_na.mcast +ffffffff83198000 d PADDING +ffffffff83199000 d PADDING +ffffffff8319a000 d weak_keys +ffffffff8319b000 D swcr_id +ffffffff8319c000 D window_inflate +ffffffff8319c004 D window_deflate +ffffffff8319d000 D ghash_update +ffffffff8319e000 D mpls_defttl +ffffffff8319e004 D mpls_mapttl_ip +ffffffff8319f000 D nfskevq_lock +ffffffff831a0000 D nfs_backoff +ffffffff831a0020 D nfs_ptimers +ffffffff831a1000 D desirednfsrvcache +ffffffff831a1010 D nonidempotent +ffffffff831a1070 D nfsv2_repstat +ffffffff831a2000 D nfsv2_type +ffffffff831a2030 D nfsv3_type +ffffffff831a2060 D nv2tov_type +ffffffff831a2080 D nv3tov_type +ffffffff831a20a0 D nfsv3_procid +ffffffff831a2100 D nfsv2_procid +ffffffff831a215c d nfsv3err_getattr +ffffffff831a2170 d nfsv3err_setattr +ffffffff831a2190 d nfsv3err_lookup +ffffffff831a21a4 d nfsv3err_access +ffffffff831a21b0 d nfsv3err_readlink +ffffffff831a21d0 d nfsv3err_read +ffffffff831a21f0 d nfsv3err_write +ffffffff831a2210 d nfsv3err_create +ffffffff831a2230 d nfsv3err_mkdir +ffffffff831a2250 d nfsv3err_symlink +ffffffff831a2270 d nfsv3err_mknod +ffffffff831a2290 d nfsv3err_remove +ffffffff831a22b0 d nfsv3err_rmdir +ffffffff831a22d0 d nfsv3err_rename +ffffffff831a2300 d nfsv3err_link +ffffffff831a2330 d nfsv3err_readdir +ffffffff831a2350 d nfsv3err_readdirplus +ffffffff831a2366 d nfsv3err_fsstat +ffffffff831a2372 d nfsv3err_fsinfo +ffffffff831a237c d nfsv3err_pathconf +ffffffff831a2386 d nfsv3err_commit +ffffffff831a3000 D nfsrv3_procs +ffffffff831a30b8 D nfs_niothreads +ffffffff831a4000 D fragtbl +ffffffff831a5000 D ffs_vtbl +ffffffff831a6000 D softdep_typenames +ffffffff831a6070 D tickdelay +ffffffff831a7000 D dirchk +ffffffff831a8000 D desireddquot +ffffffff831a9000 D amap_list_lock +ffffffff831aa000 d uao_list_lock +ffffffff831ab000 d uvmexp_countersboot_boot_cpumem +ffffffff831ab0c0 D uvmexp_counters +ffffffff831ab0c8 D vm_min_kernel_address +ffffffff831ac000 D no_constraint +ffffffff831ad000 d uvm_kmapent_warn_rate +ffffffff831ae000 D maxslp +ffffffff831af000 D uvmpagerops +ffffffff831b0000 D uvm_swap_data_lock +ffffffff831b0010 D swap_syscall_lock +ffffffff831b0020 D oommtx +ffffffff831b1000 D uvm_doswapencrypt +ffffffff831b2000 D gif_list +ffffffff831b2010 D gif_cloner +ffffffff831b3000 D divert6_sendspace +ffffffff831b3004 D divert6_recvspace +ffffffff831b3008 D divb6hashsize +ffffffff831b4000 d in6_get_hw_ifid.allone +ffffffff831b5000 D ip6_sendredirects +ffffffff831b5004 D ip6_defhlim +ffffffff831b5008 D ip6_defmcasthlim +ffffffff831b500c D ip6_maxfragpackets +ffffffff831b5010 D ip6_maxfrags +ffffffff831b5014 D ip6_log_interval +ffffffff831b5018 D ip6_hdrnestlimit +ffffffff831b501c D ip6_dad_count +ffffffff831b5020 D ip6_auto_flowlabel +ffffffff831b5024 D ip6_use_deprecated +ffffffff831b5028 D ip6_neighborgcthresh +ffffffff831b502c D ip6_maxdynroutes +ffffffff831b5030 D rip6_sendspace +ffffffff831b5038 D rip6_recvspace +ffffffff831b5040 D icmp6_redirtimeout +ffffffff831b5044 D icmp6errppslim +ffffffff831b5048 D ip6_mtudisc_timeout +ffffffff831b6000 D frag6_mutex +ffffffff831b7000 d icmp6_mtudisc_hiwat +ffffffff831b7004 d icmp6_mtudisc_lowat +ffffffff831b8000 d randomtab_20 +ffffffff831b9000 D ip6intrq +ffffffff831b9038 d ip6send_task +ffffffff831ba000 D nd6_timer_next +ffffffff831ba008 D nd6_expire_next +ffffffff831ba010 D nd6_delay +ffffffff831ba014 D nd6_umaxtries +ffffffff831ba018 D nd6_mmaxtries +ffffffff831ba01c D nd6_gctimer +ffffffff831ba020 D nd6_maxndopt +ffffffff831ba028 D nd6_mtx +ffffffff831ba038 D nd6_list +ffffffff831bb000 d dadq +ffffffff831bc000 D pfkeyv2_mtx +ffffffff831bc010 d pfkeyv2_seq +ffffffff831bd000 D sadb_exts_allowed_in +ffffffff831bd090 D sadb_exts_required_in +ffffffff831be000 D cold +ffffffff831bf000 D bdevsw +ffffffff831bf460 D nblkdev +ffffffff831bf470 D cdevsw +ffffffff831c1400 D nchrdev +ffffffff831c1404 D mem_no +ffffffff831c1408 D swapdev +ffffffff831c1410 D constab +ffffffff831c2000 D machine +ffffffff831c2008 D lid_action +ffffffff831c200c D pwr_action +ffffffff831c2010 D isa_constraint +ffffffff831c2020 D dma_constraint +ffffffff831c2030 D uvm_md_constraints +ffffffff831c2048 D delay_func +ffffffff831c2050 D initclock_func +ffffffff831c2058 D bootinfo_size +ffffffff831c205c D waittime +ffffffff831c2060 D dumpmag +ffffffff831c3000 D tsc_rdtsc +ffffffff831c3008 D tsc_timecounter +ffffffff831c3058 D tsc_is_synchronized +ffffffff831c4000 D local_apic +ffffffff831c4020 D lapic_id +ffffffff831c4080 D lapic_tpr +ffffffff831c40a0 d lapic_ppr +ffffffff831c4100 d lapic_isr +ffffffff831c5000 D warn_once +ffffffff831c6000 d errata +ffffffff831c7000 D cpu_ucode_intel_mtx +ffffffff831c8000 D mem_owner_bios +ffffffff831c8008 D mrops +ffffffff831c8028 D mtrrmask +ffffffff831c8030 D mtrrtomrt +ffffffff831c9000 D pmap_pg_wc +ffffffff831c9008 D pmaps_lock +ffffffff831c9018 d pmap_maxkvaddr +ffffffff831ca000 D kv_physwait +ffffffff831cb000 D fpu_save_len +ffffffff831cc000 D i8259_pic +ffffffff831cd000 D softintr_pic +ffffffff831ce000 D ipifunc +ffffffff831cf000 D setperf_mp_mutex +ffffffff831d0000 D db_Grp6 +ffffffff831d0040 D db_Grp7 +ffffffff831d0100 D db_Grp8 +ffffffff831d0140 D db_Grp9 +ffffffff831d0200 D db_GrpA +ffffffff831d0240 D db_GrpB +ffffffff831d0280 D db_GrpC +ffffffff831d02c0 D db_inst_0f0x +ffffffff831d0440 D db_inst_0f2x +ffffffff831d05c0 D db_inst_0f3x +ffffffff831d0740 D db_inst_0f8x +ffffffff831d08c0 D db_inst_0f9x +ffffffff831d0a40 D db_inst_0fax +ffffffff831d0bc0 D db_inst_0fbx +ffffffff831d0d40 D db_inst_0fcx +ffffffff831d0ec0 D db_inst_0f +ffffffff831d0f40 D db_Esc92 +ffffffff831d0f80 D db_Esc94 +ffffffff831d0fc0 D db_Esc95 +ffffffff831d1000 D db_Esc96 +ffffffff831d1040 D db_Esc97 +ffffffff831d1080 D db_Esca5 +ffffffff831d10c0 D db_Escb4 +ffffffff831d1100 D db_Esce3 +ffffffff831d1140 D db_Escf4 +ffffffff831d1180 D db_Esc8 +ffffffff831d1240 D db_Esc9 +ffffffff831d1300 D db_Esca +ffffffff831d13c0 D db_Escb +ffffffff831d1480 D db_Escc +ffffffff831d1540 D db_Escd +ffffffff831d1600 D db_Esce +ffffffff831d16c0 D db_Escf +ffffffff831d1780 D db_Esc_inst +ffffffff831d17c0 D db_Grp1 +ffffffff831d1800 D db_Grp2 +ffffffff831d1840 D db_Grp3 +ffffffff831d1900 D db_Grp4 +ffffffff831d19c0 D db_Grp5 +ffffffff831d1a80 D db_inst_table +ffffffff831d3280 D db_bad_inst +ffffffff831d32a0 D db_index_reg_16 +ffffffff831d32e0 D db_reg +ffffffff831d34e0 D db_seg_reg +ffffffff831d3520 D db_lengths +ffffffff831d4000 D db_regs +ffffffff831d41e0 D db_eregs +ffffffff831d41f0 D db_reg_args +ffffffff831d5000 D timer_mutex +ffffffff831d5010 d i8254_timecounter +ffffffff831d6000 D spleen8x16 +ffffffff831d6058 D spleen12x24 +ffffffff831d60b0 D spleen16x32 +ffffffff831d6108 D spleen32x64 +ffffffff831d6160 d builtin_fonts +ffffffff831d61e0 d wsfont_add.cookiegen +ffffffff831d61f0 d spleen8x16_data +ffffffff831d6ff0 d spleen12x24_data +ffffffff831d99f0 d spleen16x32_data +ffffffff831dd1f0 d spleen32x64_data +ffffffff831ec000 D nsphy_cd +ffffffff831ed000 D nsphyter_cd +ffffffff831ee000 D gentbi_cd +ffffffff831ef000 D qsphy_cd +ffffffff831f0000 D inphy_cd +ffffffff831f1000 D iophy_cd +ffffffff831f2000 D eephy_cd +ffffffff831f3000 D exphy_cd +ffffffff831f4000 D rlphy_cd +ffffffff831f5000 D lxtphy_cd +ffffffff831f6000 D luphy_cd +ffffffff831f7000 D mtdphy_cd +ffffffff831f8000 D icsphy_cd +ffffffff831f9000 D sqphy_cd +ffffffff831fa000 D tqphy_cd +ffffffff831fb000 D ukphy_cd +ffffffff831fc000 D dcphy_cd +ffffffff831fd000 D bmtphy_cd +ffffffff831fe000 D brgphy_cd +ffffffff831ff000 D xmphy_cd +ffffffff83200000 D amphy_cd +ffffffff83201000 D acphy_cd +ffffffff83202000 D nsgphy_cd +ffffffff83203000 D urlphy_cd +ffffffff83204000 D rgephy_cd +ffffffff83205000 D ciphy_cd +ffffffff83206000 D ipgphy_cd +ffffffff83207000 D etphy_cd +ffffffff83208000 D jmphy_cd +ffffffff83209000 D atphy_cd +ffffffff8320a000 D scsi_autoconf +ffffffff8320a008 D scsibus_cd +ffffffff8320b000 D cd_cd +ffffffff8320c000 D ch_cd +ffffffff8320c020 D chquirks +ffffffff8320d000 D sd_cd +ffffffff8320e000 D st_cd +ffffffff8320f000 D uk_cd +ffffffff83210000 D safte_cd +ffffffff83211000 D ses_cd +ffffffff83212000 D sym_cd +ffffffff83212020 D sym_devices +ffffffff83212070 D asym_devices +ffffffff83213000 D rdac_cd +ffffffff83213020 D rdac_devices +ffffffff83214000 D emc_cd +ffffffff83214020 D emc_devices +ffffffff83215000 D hds_cd +ffffffff83215020 D hds_devices +ffffffff83216000 D atapiscsi_cd +ffffffff83217000 D wd_cd +ffffffff83217020 d wddumpmulti +ffffffff83218000 D mainbus_cd +ffffffff83218020 D mba_iba +ffffffff83219000 D bios_cd +ffffffff83219020 D smbios_uninfo +ffffffff8321a000 D mpbios_cd +ffffffff8321a020 d mp_conf +ffffffff8321a070 d extint_bus +ffffffff8321a0a0 d smi_bus +ffffffff8321a0d0 d nmi_bus +ffffffff8321b000 D cpu_info_full_primary +ffffffff8321e000 D cpu_info_list +ffffffff8321e008 D mp_cpu_funcs +ffffffff8321e020 D cpu_cd +ffffffff8321e040 D cpu_info +ffffffff8321f000 D local_pic +ffffffff8321f090 D lapic_readreg +ffffffff8321f098 D lapic_writereg +ffffffff8321f0a0 D x86_ipi +ffffffff83220000 D ioapic_cold +ffffffff83220008 D ioapic_cd +ffffffff83221000 D efifb_std_descr +ffffffff83221030 D efifb_descrs +ffffffff83221038 D efifb_accessops +ffffffff83221098 D efifb_cd +ffffffff83222000 D pvbus_cd +ffffffff83222020 D pvbus_types +ffffffff832220e0 D pvbus_dma_tag +ffffffff83223000 D pvclock_cd +ffffffff83223020 D pvclock_timecounter +ffffffff83224000 D vmt_tclo_rpc +ffffffff832240d0 D vmt_cd +ffffffff83225000 D xen_cd +ffffffff83225020 D xen_bus_dma_tag +ffffffff83226000 D xnf_cd +ffffffff83227000 D xbf_cd +ffffffff83228000 D hv_msg_dispatch +ffffffff83228110 D hv_timecounter +ffffffff83228160 D hyperv_cd +ffffffff83229000 d hv_ic_devs +ffffffff8322a000 D hvn_cd +ffffffff8322b000 D hvs_cd +ffffffff8322c000 D virtio_cd +ffffffff8322d000 D vio_cd +ffffffff8322e000 D vioblk_cd +ffffffff8322f000 D viomb_cd +ffffffff83230000 D viornd_cd +ffffffff83231000 D vioscsi_cd +ffffffff83232000 D vmmci_cd +ffffffff83233000 D pci_cd +ffffffff83234000 D arc_fw_hdr +ffffffff83234008 D arc_cd +ffffffff83235000 D jmb_cd +ffffffff83236000 D mfii_cd +ffffffff83237000 D ips_cd +ffffffff83238000 D eap_cd +ffffffff83239000 D auacer_cd +ffffffff8323a000 D auich_cd +ffffffff8323b000 D azalia_cd +ffffffff8323c000 D envy_cd +ffffffff8323c020 D envy_matchids +ffffffff8323c030 D envy_rates +ffffffff8323c0b0 D ak4524_dac +ffffffff8323c0d8 D ak4524_adc +ffffffff8323c100 D ak4358_dac +ffffffff8323c128 D ak5365_adc +ffffffff8323c150 D unkenvy_codec +ffffffff8323c180 D envy_cards +ffffffff8323c3f0 D envy_cards_ht +ffffffff8323c600 d julia_eeprom +ffffffff8323d000 D emu_cd +ffffffff8323e000 D auixp_cd +ffffffff8323f000 D clcs_cd +ffffffff83240000 D yds_cd +ffffffff83241000 D auvia_cd +ffffffff83242000 D qle_cd +ffffffff83243000 D mpii_cd +ffffffff83244000 D aq_cd +ffffffff83245000 D de_cd +ffffffff83246000 D pcn_cd +ffffffff83247000 D wdc_sii3114_vtbl +ffffffff83247038 D wdc_pdc203xx_vtbl +ffffffff83247070 D wdc_svwsata_vtbl +ffffffff832470a8 D pciide_cd +ffffffff832470d0 d sis_hostbr_type +ffffffff83248000 D ppb_cd +ffffffff83249000 D vr_cd +ffffffff83249020 D vr_devices +ffffffff8324a000 D txp_cd +ffffffff8324b000 D bt848_card_signature +ffffffff8324c000 D bktr_cd +ffffffff8324d000 D em_cd +ffffffff8324e000 D ixgb_cd +ffffffff8324f000 D ix_cd +ffffffff8324f020 D ixgbe_smart_speed +ffffffff8324f024 D ixgbe_enable_msix +ffffffff83250000 D ixl_cd +ffffffff83250020 d ixl_sff_lock +ffffffff83251000 D xge_cd +ffffffff83252000 D thtc_cd +ffffffff83252020 D tht_cd +ffffffff83252040 D tht_txt_desc +ffffffff83252068 D tht_rxf_desc +ffffffff83252090 D tht_rxd_desc +ffffffff832520b8 D tht_txf_desc +ffffffff83253000 D myx_cd +ffffffff83254000 D oce_cd +ffffffff83255000 D dc_devs +ffffffff83256000 D cas_cd +ffffffff83257000 D sis_cd +ffffffff83258000 D se_cd +ffffffff83259000 D cbb_cd +ffffffff83259020 D yc_chipsets +ffffffff832591b0 d pccbb_funcs +ffffffff832591e0 d pccbb_pcmcia_funcs +ffffffff8325a000 D skc_cd +ffffffff8325a020 D sk_cd +ffffffff8325b000 D mskc_cd +ffffffff8325b020 D msk_cd +ffffffff8325c000 D puc_cd +ffffffff8325d000 D puc_ndevs +ffffffff8325e000 D iwi_cd +ffffffff8325f000 D wpi_cd +ffffffff83260000 D iwn_cd +ffffffff83261000 D iwm_cd +ffffffff83262000 D iwx_cd +ffffffff83263000 D cmpci_cd +ffffffff83264000 D iha_cd +ffffffff83265000 D pcscp_cd +ffffffff83265020 D pcscp_glue +ffffffff83266000 D bge_cd +ffffffff83267000 D bnx_firmwares +ffffffff83267160 D bnx_rv2ps +ffffffff832671c0 D bnx_cd +ffffffff832671e0 d flash_5709 +ffffffff83267210 d flash_table +ffffffff83268000 D vge_cd +ffffffff83269000 D stge_cd +ffffffff8326a000 D nfe_cd +ffffffff8326b000 D et_cd +ffffffff8326c000 D jme_cd +ffffffff8326d000 D age_cd +ffffffff8326e000 D alc_dma_burst +ffffffff8326e020 D alc_cd +ffffffff8326f000 D ale_cd +ffffffff83270000 D amdpm_cd +ffffffff83270020 d amdpm_timecounter +ffffffff83271000 D bce_cd +ffffffff83272000 D rtwn_cd +ffffffff83273000 d ral_rt2560_opns +ffffffff83273028 d ral_rt2661_opns +ffffffff83273050 d ral_rt2860_opns +ffffffff83274000 D piixpm_cd +ffffffff83275000 D vic_cd +ffffffff83276000 D vmx_cd +ffffffff83277000 D vmwpvs_cd +ffffffff83278000 D lii_cd +ffffffff83279000 D ichiic_cd +ffffffff8327a000 D viapm_cd +ffffffff8327a020 d viapm_timecounter +ffffffff8327b000 D amdiic_cd +ffffffff8327c000 D nviic_cd +ffffffff8327d000 D kate_cd +ffffffff8327e000 D km_cd +ffffffff8327f000 D cpu_model_offsets +ffffffff8327f070 D ksmn_cd +ffffffff83280000 D itherm_cd +ffffffff83281000 D pchtemp_cd +ffffffff83282000 D xspd_cd +ffffffff83283000 D virtio_pci_ops +ffffffff83284000 D bwfm_pci_buscore_ops +ffffffff83284030 D bwfm_pci_bus_ops +ffffffff83284058 D bwfm_pci_msgbuf_ops +ffffffff83285000 D bnxt_cd +ffffffff83286000 D mcx_cd +ffffffff83287000 D iavf_cd +ffffffff83288000 D rge_cd +ffffffff83289000 D igc_cd +ffffffff8328a000 D ngbe_cd +ffffffff8328b000 D agp_cd +ffffffff8328c000 D intagp_cd +ffffffff8328c020 D agp_i810_methods +ffffffff8328d000 D reservation_ww_class +ffffffff8328e000 d bridge_lock +ffffffff8328e010 d bridge_list +ffffffff8328f000 d drm_connector_enum_list +ffffffff8328f1f8 d connector_list_lock +ffffffff8328f208 d connector_list +ffffffff83290000 d kernel_fb_helper_list +ffffffff83290010 d kernel_fb_helper_lock +ffffffff83291000 D drm_global_mutex +ffffffff83292000 D sch_mtx +ffffffff83292010 D i2c_bit_algo +ffffffff83292020 d drm_fence_context_count +ffffffff83292028 d dma_fence_stub_mtx +ffffffff83292038 D wait_bit_mtx +ffffffff83292048 D shrinkers +ffffffff83293000 d crtc_ww_class +ffffffff83294000 d panel_lock +ffffffff83294010 d panel_list +ffffffff83295000 d ttm_global_mutex +ffffffff83296000 D intel_bbops +ffffffff83297000 d i915_sys_placement +ffffffff83297020 d i915_ttm_bo_driver +ffffffff83298000 d mchdev_lock +ffffffff83299000 D inteldrm_stdscreen +ffffffff83299030 D inteldrm_scrlist +ffffffff83299038 D inteldrm_screenlist +ffffffff83299048 D inteldrm_accessops +ffffffff832990a8 D inteldrm_cd +ffffffff8329a000 d capture_mutex +ffffffff8329b000 d mitigations +ffffffff8329c000 D i915_modparams +ffffffff8329d000 d schedule_lock +ffffffff8329e000 d unbind_fence_ops +ffffffff8329f000 D intel_graphics_stolen_res +ffffffff832a0000 D btc_valid_sclk +ffffffff832a1000 d evergreen_cs_packet_parse_vline.vline_start_end +ffffffff832a1020 d evergreen_cs_packet_parse_vline.vline_status +ffffffff832a2000 d r600_cs_packet_parse_vline.vline_start_end +ffffffff832a2008 d r600_cs_packet_parse_vline.vline_status +ffffffff832a3000 d r100_asic +ffffffff832a32e0 d r200_asic +ffffffff832a35c0 d r300_asic_pcie +ffffffff832a38a0 d r300_asic +ffffffff832a3b80 d r420_asic +ffffffff832a3e60 d rs400_asic +ffffffff832a4140 d rs600_asic +ffffffff832a4420 d rs690_asic +ffffffff832a4700 d rv515_asic +ffffffff832a49e0 d r520_asic +ffffffff832a4cc0 d r600_asic +ffffffff832a4fa0 d rv6xx_asic +ffffffff832a5280 d rs780_asic +ffffffff832a5560 d rv770_asic +ffffffff832a5840 d evergreen_asic +ffffffff832a5b20 d sumo_asic +ffffffff832a5e00 d btc_asic +ffffffff832a60e0 d cayman_asic +ffffffff832a63c0 d trinity_asic +ffffffff832a66a0 d si_asic +ffffffff832a6980 d ci_asic +ffffffff832a6c60 d kv_asic +ffffffff832a7000 d dce6_funcs +ffffffff832a7018 d dce6_hdmi_funcs +ffffffff832a7088 d dce6_dp_funcs +ffffffff832a70f8 d dce4_funcs +ffffffff832a7110 d dce4_hdmi_funcs +ffffffff832a7180 d dce4_dp_funcs +ffffffff832a71f0 d dce32_funcs +ffffffff832a7208 d dce32_hdmi_funcs +ffffffff832a7278 d dce32_dp_funcs +ffffffff832a72e8 d r600_funcs +ffffffff832a7300 d r600_hdmi_funcs +ffffffff832a8000 D radeon_modeset +ffffffff832a8004 D radeon_dynclks +ffffffff832a8008 D radeon_agpmode +ffffffff832a800c D radeon_gart_size +ffffffff832a8010 D radeon_tv +ffffffff832a8014 D radeon_audio +ffffffff832a8018 D radeon_pcie_gen2 +ffffffff832a801c D radeon_msi +ffffffff832a8020 D radeon_lockup_timeout +ffffffff832a8024 D radeon_dpm +ffffffff832a8028 D radeon_aspm +ffffffff832a802c D radeon_runtime_pm +ffffffff832a8030 D radeon_vm_size +ffffffff832a8034 D radeon_vm_block_size +ffffffff832a8038 D radeon_use_pflipirq +ffffffff832a803c D radeon_bapm +ffffffff832a8040 D radeon_backlight +ffffffff832a8044 D radeon_auxch +ffffffff832a8048 D radeon_uvd +ffffffff832a804c D radeon_vce +ffffffff832a8050 D radeon_si_support +ffffffff832a8054 D radeon_cik_support +ffffffff832a8058 D radeondrm_cd +ffffffff832a8078 D radeondrm_stdscreen +ffffffff832a80a8 D radeondrm_scrlist +ffffffff832a80b0 D radeondrm_screenlist +ffffffff832a80c0 D radeondrm_accessops +ffffffff832a9000 D radeon_bbops +ffffffff832aa000 d radeon_bo_driver +ffffffff832ab000 d verde_pg_init +ffffffff832ac000 d cac_weights_pitcairn +ffffffff832ac4d0 d cac_weights_oland +ffffffff832ad000 d aldebaran_mode2_handler +ffffffff832ae000 d amdgpu_vbios_version_attrs +ffffffff832af000 D amdgpu_asic_name +ffffffff832b0000 D amdgpu_gart_size +ffffffff832b0004 D amdgpu_gtt_size +ffffffff832b0008 D amdgpu_moverate +ffffffff832b000c D amdgpu_audio +ffffffff832b0010 D amdgpu_pcie_gen2 +ffffffff832b0014 D amdgpu_msi +ffffffff832b0018 D amdgpu_dpm +ffffffff832b001c D amdgpu_fw_load_type +ffffffff832b0020 D amdgpu_aspm +ffffffff832b0024 D amdgpu_runtime_pm +ffffffff832b0028 D amdgpu_ip_block_mask +ffffffff832b002c D amdgpu_bapm +ffffffff832b0030 D amdgpu_vm_size +ffffffff832b0034 D amdgpu_vm_fragment_size +ffffffff832b0038 D amdgpu_vm_block_size +ffffffff832b003c D amdgpu_vm_update_mode +ffffffff832b0040 D amdgpu_dc +ffffffff832b0044 D amdgpu_sched_jobs +ffffffff832b0048 D amdgpu_sched_hw_submission +ffffffff832b0050 D amdgpu_cg_mask +ffffffff832b0058 D amdgpu_pg_mask +ffffffff832b005c D amdgpu_sdma_phase_quantum +ffffffff832b0060 D amdgpu_pp_feature_mask +ffffffff832b0064 D amdgpu_lbpw +ffffffff832b0068 D amdgpu_compute_multipipe +ffffffff832b006c D amdgpu_gpu_recovery +ffffffff832b0070 D amdgpu_smu_pptable_id +ffffffff832b0074 D amdgpu_dc_feature_mask +ffffffff832b0078 D amdgpu_async_gfx_ring +ffffffff832b007c D amdgpu_discovery +ffffffff832b0080 D amdgpu_noretry +ffffffff832b0084 D amdgpu_force_asic_type +ffffffff832b0088 D amdgpu_tmz +ffffffff832b008c D amdgpu_reset_method +ffffffff832b0090 D amdgpu_num_kcq +ffffffff832b0094 D amdgpu_use_xgmi_p2p +ffffffff832b0098 D mgpu_info +ffffffff832b0248 D amdgpu_ras_enable +ffffffff832b024c D amdgpu_ras_mask +ffffffff832b0250 D amdgpu_bad_page_threshold +ffffffff832b0254 D amdgpu_backlight +ffffffff832b0258 D amdgpu_cd +ffffffff832b0278 D amdgpu_stdscreen +ffffffff832b02a8 D amdgpu_scrlist +ffffffff832b02b0 D amdgpu_screenlist +ffffffff832b02c0 D amdgpu_accessops +ffffffff832b1000 d amdgpu_gtt_mgr_attributes +ffffffff832b2000 D amdgpu_bbops +ffffffff832b3000 D soc15_ih_clientid_name +ffffffff832b4000 D ras_error_string +ffffffff832b4030 D ras_block_string +ffffffff832b40c0 D ras_mca_block_string +ffffffff832b5000 d amdgpu_bo_driver +ffffffff832b6000 d amdgpu_vram_mgr_attributes +ffffffff832b7000 D amdgpu_xgmi_hive_type +ffffffff832b7008 d xgmi_mutex +ffffffff832b7018 D xgmi_ras_hw_ops +ffffffff832b7058 D xgmi_ras +ffffffff832b8000 d gfx_v9_0_ras +ffffffff832b9000 D gfx_v9_4_ras +ffffffff832ba000 D gfx_v9_4_2_ras_ops +ffffffff832ba040 D gfx_v9_4_2_ras +ffffffff832bb000 D hdp_v4_0_ras_hw_ops +ffffffff832bb040 D hdp_v4_0_ras +ffffffff832bc000 d jpeg_v2_6_ras +ffffffff832bd000 D mca_v3_0_mp0_ras +ffffffff832bd058 D mca_v3_0_mp1_ras +ffffffff832bd0b0 D mca_v3_0_mpio_ras +ffffffff832be000 D mmhub_v1_0_ras_hw_ops +ffffffff832be040 D mmhub_v1_0_ras +ffffffff832bf000 D mmhub_v1_7_ras_hw_ops +ffffffff832bf040 D mmhub_v1_7_ras +ffffffff832c0000 D mmhub_v9_4_ras +ffffffff832c1000 D nbio_v7_4_ras +ffffffff832c2000 d sriov_sc_video_codecs_encode +ffffffff832c2010 d sriov_sc_video_codecs_decode +ffffffff832c2020 d sriov_sc_video_codecs_encode_array +ffffffff832c2050 d sriov_sc_video_codecs_decode_array +ffffffff832c3000 d sdma_v4_0_ras +ffffffff832c4000 D sdma_v4_4_ras +ffffffff832c5000 d sienna_cichlid_mode2_handler +ffffffff832c6000 D umc_v6_1_ras +ffffffff832c7000 D umc_v6_7_ras +ffffffff832c8000 D umc_v8_10_ras +ffffffff832c9000 D umc_v8_7_ras +ffffffff832ca000 d vcn_v2_6_ras +ffffffff832cb000 d amdgpu_dm_mode_config_helperfuncs +ffffffff832cb010 d dm_atomic_state_funcs +ffffffff832cc000 d construct_integrated_info.result +ffffffff832cc004 d bios_parser_get_firmware_info.result +ffffffff832cd000 d dce_funcs +ffffffff832ce000 d dce110_funcs +ffffffff832cf000 d dce112_funcs +ffffffff832d0000 d dce120_funcs +ffffffff832d1000 d rv1_clk_funcs +ffffffff832d1088 d rv1_clk_internal_funcs +ffffffff832d2000 d rv2_clk_internal_funcs +ffffffff832d3000 d dcn2_funcs +ffffffff832d4000 D dcn201_funcs +ffffffff832d5000 d dcn21_funcs +ffffffff832d5088 d rn_bw_params +ffffffff832d6000 D dcn3_fpga_funcs +ffffffff832d6088 d dcn3_funcs +ffffffff832d7000 d vg_funcs +ffffffff832d7088 d dummy_clocks +ffffffff832d71b8 d vg_bw_params +ffffffff832d8000 d dcn31_bw_params +ffffffff832d82a0 d dcn31_funcs +ffffffff832d9000 d dcn314_bw_params +ffffffff832d92a0 d dcn314_funcs +ffffffff832da000 d dcn315_funcs +ffffffff832da088 d dcn315_bw_params +ffffffff832db000 d dcn316_funcs +ffffffff832db088 d dcn316_bw_params +ffffffff832dc000 d dcn32_funcs +ffffffff832dd000 d dcn10_dpp_cap +ffffffff832de000 D aperture_default_system +ffffffff832df000 d dcn20_dpp_cap +ffffffff832df010 d dcn20_dpp_funcs +ffffffff832e0000 d dcn20_hubp_funcs +ffffffff832e1000 d dcn20_opp_funcs +ffffffff832e2000 d dcn20_tg_funcs +ffffffff832e3000 d dcn201_dpp_funcs +ffffffff832e3110 d dcn201_dpp_cap +ffffffff832e4000 d dcn201_hubp_funcs +ffffffff832e5000 d dcn201_opp_funcs +ffffffff832e6000 d dcn201_tg_funcs +ffffffff832e7000 D dcn201_ip +ffffffff832e71b8 D dcn201_soc +ffffffff832e7b88 d dcn201_res_pool_funcs +ffffffff832e8000 d dcn21_hubp_funcs +ffffffff832e9000 d dcn30_afmt_funcs +ffffffff832ea000 d dcn30_dpp_cap +ffffffff832ea010 d dcn30_dpp_funcs +ffffffff832eb000 d dcn30_hubp_funcs +ffffffff832ec000 d dcn30_tg_funcs +ffffffff832ed000 d dcn30_vpg_funcs +ffffffff832ee000 d res_cap_dcn301 +ffffffff832ee040 d dcn301_res_pool_funcs +ffffffff832ef000 d dcn302_res_pool_funcs +ffffffff832f0000 d dcn303_res_pool_funcs +ffffffff832f1000 d dcn31_afmt_funcs +ffffffff832f2000 d dcn31_apg_funcs +ffffffff832f3000 d dcn31_hpo_dp_link_encoder_funcs +ffffffff832f4000 d dcn31_hubp_funcs +ffffffff832f5000 d dcn31_tg_funcs +ffffffff832f6000 d dcn31_res_pool_funcs +ffffffff832f7000 d dcn31_vpg_funcs +ffffffff832f8000 d dcn314_tg_funcs +ffffffff832f9000 d dcn314_res_pool_funcs +ffffffff832fa000 d dcn315_res_pool_funcs +ffffffff832fb000 d dcn316_res_pool_funcs +ffffffff832fc000 d dcn32_dpp_funcs +ffffffff832fc110 d dcn32_dpp_cap +ffffffff832fd000 d dcn32_hpo_dp_link_encoder_funcs +ffffffff832fe000 d dcn32_hubp_funcs +ffffffff832ff000 d dcn32_tg_funcs +ffffffff83300000 d dcn32_res_pool_funcs +ffffffff83301000 d dcn321_res_pool_funcs +ffffffff83302000 D dcn1_0_ip +ffffffff833021b8 D dcn1_0_soc +ffffffff83303000 D dcn2_0_ip +ffffffff833031b8 D dcn2_0_nv14_ip +ffffffff83303370 D dcn2_0_soc +ffffffff83303d40 D dcn2_0_nv14_soc +ffffffff83304710 D dcn2_1_ip +ffffffff833048c8 D dcn2_1_soc +ffffffff83305298 D ddr4_wm_table_gs +ffffffff83305358 D lpddr4_wm_table_gs +ffffffff83305418 D lpddr4_wm_table_with_disabled_ppt +ffffffff833054d8 D ddr4_wm_table_rn +ffffffff83305598 D ddr4_1R_wm_table_rn +ffffffff83305658 D lpddr4_wm_table_rn +ffffffff83306000 D dcn3_0_ip +ffffffff833061b8 D dcn3_0_soc +ffffffff83307000 D dcn3_01_ip +ffffffff833071b8 D dcn3_01_soc +ffffffff83307b88 D ddr4_wm_table +ffffffff83307c48 D lpddr5_wm_table +ffffffff83308000 D dcn3_02_ip +ffffffff833081b8 D dcn3_02_soc +ffffffff83309000 D dcn3_03_ip +ffffffff833091b8 D dcn3_03_soc +ffffffff8330a000 D dcn3_1_ip +ffffffff8330a1b8 D dcn3_15_ip +ffffffff8330a370 D dcn3_16_ip +ffffffff8330a528 d dcn3_15_soc +ffffffff8330aef8 d dcn3_1_soc +ffffffff8330b8c8 d dcn3_16_soc +ffffffff8330d000 D dcn3_14_ip +ffffffff8330d1b8 D dcn3_14_soc +ffffffff8330e000 D dcn3_2_ip +ffffffff8330e1b8 D dcn3_2_soc +ffffffff8330f000 D dcn3_21_ip +ffffffff8330f1b8 D dcn3_21_soc +ffffffff83310000 d dsc_policy_max_target_bpp_limit +ffffffff83311000 D DIDTEDCConfig_P12 +ffffffff83311070 d smu7_profiling +ffffffff83312000 d cyan_skillfish_table_map +ffffffff83312080 d cyan_skillfish_message_map +ffffffff83313000 d navi10_table_map +ffffffff83313080 d navi10_pwr_src_map +ffffffff83313090 d navi10_workload_map +ffffffff833130d0 d navi10_message_map +ffffffff83313b20 d navi10_clk_map +ffffffff83313be0 d navi10_feature_mask_map +ffffffff83314000 d sienna_cichlid_message_map +ffffffff83314a50 d sienna_cichlid_table_map +ffffffff83314ad0 d sienna_cichlid_pwr_src_map +ffffffff83314ae0 d sienna_cichlid_workload_map +ffffffff83314b20 d sienna_cichlid_clk_map +ffffffff83314be0 d sienna_cichlid_feature_mask_map +ffffffff83315000 d vangogh_message_map +ffffffff83315a50 d vangogh_table_map +ffffffff83315ad0 d vangogh_workload_map +ffffffff83315b10 d vangogh_feature_mask_map +ffffffff83316000 d renoir_table_map +ffffffff83316080 d renoir_workload_map +ffffffff833160c0 d renoir_message_map +ffffffff83316b10 d renoir_clk_map +ffffffff83317000 d smu_v13_0_0_message_map +ffffffff83317a50 d smu_v13_0_0_feature_mask_map +ffffffff83317e20 d smu_v13_0_0_table_map +ffffffff83317ea0 d smu_v13_0_0_pwr_src_map +ffffffff83317eb0 d smu_v13_0_0_workload_map +ffffffff83317ef0 d smu_v13_0_0_clk_map +ffffffff83318000 d smu_v13_0_4_message_map +ffffffff83318a50 d smu_v13_0_4_table_map +ffffffff83318ad0 d smu_v13_0_4_feature_mask_map +ffffffff83319000 d smu_v13_0_5_table_map +ffffffff83319080 d smu_v13_0_5_message_map +ffffffff83319ad0 d smu_v13_0_5_feature_mask_map +ffffffff8331a000 d smu_v13_0_7_message_map +ffffffff8331aa50 d smu_v13_0_7_feature_mask_map +ffffffff8331ae20 d smu_v13_0_7_table_map +ffffffff8331aea0 d smu_v13_0_7_pwr_src_map +ffffffff8331aeb0 d smu_v13_0_7_workload_map +ffffffff8331aef0 d smu_v13_0_7_clk_map +ffffffff8331b000 d yellow_carp_table_map +ffffffff8331b080 d yellow_carp_message_map +ffffffff8331bad0 d yellow_carp_feature_mask_map +ffffffff8331c000 D pci_conf_lock +ffffffff8331c010 D pci_bus_dma_tag +ffffffff8331c088 D msi_pic +ffffffff8331c118 D msix_pic +ffffffff8331d000 D pchb_cd +ffffffff8331e000 D amas_cd +ffffffff8331f000 D cardslot_cd +ffffffff83320000 D cardbus_cd +ffffffff83321000 d csdevs +ffffffff83322000 d ral_rt2560_opns +ffffffff83322028 d ral_rt2661_opns +ffffffff83322050 d ral_rt2860_opns +ffffffff83323000 D pcmcia_cd +ffffffff83324000 D pcmcia_3cxem556_func0 +ffffffff833240b8 D pcmcia_3cxem556_func0_cfe0 +ffffffff83324158 D pcmcia_megahertz_xjem1144_func0 +ffffffff83324210 D pcmcia_megahertz_xjem1144_func0_cfe0 +ffffffff833242b0 d pcmcia_3cxem556_func1 +ffffffff83324368 d pcmcia_3cxem556_func1_cfe0 +ffffffff83324408 d pcmcia_megahertz_xjem1144_func1 +ffffffff833244c0 d pcmcia_megahertz_xjem1144_func1_cfe0 +ffffffff83324560 d pcmcia_sierra_a555_func1 +ffffffff83324618 d pcmcia_sierra_a555_func1_cfe0 +ffffffff833246b8 d pcmcia_sveclancard_func0 +ffffffff83324770 d pcmcia_sveclancard_func0_cfe0 +ffffffff83325000 D ep_pcmcia_prod +ffffffff83326000 D aic_pcmcia_prod +ffffffff83327000 D com_pcmcia_prod +ffffffff83328000 D wdc_pcmcia_pr +ffffffff83329000 D sm_pcmcia_prod +ffffffff8332a000 D xe_cd +ffffffff8332b000 D pcib_cd +ffffffff8332c000 D amdpcib_cd +ffffffff8332d000 D tcpcib_cd +ffffffff8332e000 D aapic_cd +ffffffff8332f000 D hme_cd +ffffffff83330000 D isa_cd +ffffffff83331000 D isadma_cd +ffffffff83332000 D fdc_cd +ffffffff83333000 D fd_types +ffffffff833331f8 D fd_cd +ffffffff83334000 D mpu_cd +ffffffff83335000 D pcppi_cd +ffffffff83336000 D spkr_cd +ffffffff83337000 D wbsio_cd +ffffffff83338000 D schsio_cd +ffffffff83339000 D it_cd +ffffffff8333a000 D uguru_cd +ffffffff8333b000 D aps_cd +ffffffff8333c000 D isa_bus_dma_tag +ffffffff8333d000 D wsdisplay_cd +ffffffff8333d020 D wsdisplay_cons +ffffffff8333d058 D wsdisplay_defaultscreens +ffffffff8333e000 D wskbd_cd +ffffffff8333e020 D wskbd_default_bell_data +ffffffff8333e030 D wskbd_default_keyrepeat_data +ffffffff8333e040 D wskbd_srcops +ffffffff8333f000 d compose_tab +ffffffff83340000 D wsmouse_cd +ffffffff83340020 D wsmouse_srcops +ffffffff83341000 D wsmux_srcops +ffffffff83341030 D wsmux_tree_lock +ffffffff83342000 D vt100_output +ffffffff83343000 D pckbd_cd +ffffffff83344000 D pms_cd +ffffffff83344020 d synaptics_params +ffffffff83344030 d alps_params +ffffffff83345000 D skgpio_cd +ffffffff83346000 D pctr_conf_lock +ffffffff83347000 D ukbd_keymapdata +ffffffff83348000 D usbrev_str +ffffffff83348030 D usb_cd +ffffffff83349000 d usbd_ratecheck.errinterval +ffffffff8334a000 D uhub_cd +ffffffff8334b000 D uaudio_cd +ffffffff8334c000 D uvideo_ctrls +ffffffff8334c2d8 D uvideo_cd +ffffffff8334d000 D utvfu_norm_params +ffffffff8334d030 D utvfu_cd +ffffffff8334e000 D udl_reg_vals_640x480_60 +ffffffff8334e020 D udl_reg_vals_640x480_67 +ffffffff8334e040 D udl_reg_vals_640x480_72 +ffffffff8334e060 D udl_reg_vals_640x480_75 +ffffffff8334e080 D udl_reg_vals_800x480_61 +ffffffff8334e0a0 D udl_reg_vals_800x600_56 +ffffffff8334e0c0 D udl_reg_vals_800x600_60 +ffffffff8334e0e0 D udl_reg_vals_800x600_72 +ffffffff8334e100 D udl_reg_vals_800x600_74 +ffffffff8334e120 D udl_reg_vals_800x600_75 +ffffffff8334e140 D udl_reg_vals_1024x768_60 +ffffffff8334e160 D udl_reg_vals_1024x768_70 +ffffffff8334e180 D udl_reg_vals_1024x768_75 +ffffffff8334e1a0 D udl_reg_vals_1280x800_60 +ffffffff8334e1c0 D udl_reg_vals_1280x960_60 +ffffffff8334e1e0 D udl_reg_vals_1280x1024_60 +ffffffff8334e200 D udl_reg_vals_1280x1024_75 +ffffffff8334e220 D udl_reg_vals_1366x768_60 +ffffffff8334e240 D udl_reg_vals_1440x900_60 +ffffffff8334e260 D udl_reg_vals_1440x900_59 +ffffffff8334e280 D udl_reg_vals_1440x900_75 +ffffffff8334e2a0 D udl_reg_vals_1680x1050_60 +ffffffff8334e2c0 D udl_reg_vals_1600x1200_60 +ffffffff8334e2e0 D udl_reg_vals_1920x1080_60 +ffffffff8334e300 D udl_null_key_1 +ffffffff8334e310 D udl_decomp_table +ffffffff8334f510 D udl_cd +ffffffff8334f530 D udl_stdscreen +ffffffff8334f560 D udl_scrlist +ffffffff8334f568 D udl_screenlist +ffffffff8334f578 D udl_accessops +ffffffff83350000 D umidi_cd +ffffffff83351000 d umq_YAMAHA_YAMAHA_UX256_ANYIFACE +ffffffff83351020 d umq_ROLAND_ROLAND_UM1_2 +ffffffff83351040 d umq_ROLAND_ROLAND_SC8850_2 +ffffffff83351060 d umq_ROLAND_ROLAND_SD90_2 +ffffffff83351080 d umq_ROLAND_ROLAND_UM880N_0 +ffffffff833510a0 d umq_ROLAND_ROLAND_UA100_2 +ffffffff833510c0 d umq_ROLAND_ROLAND_UM4_2 +ffffffff833510e0 d umq_ROLAND_ROLAND_U8_2 +ffffffff83351100 d umq_ROLAND_ROLAND_UM2_2 +ffffffff83351120 d umq_ROLAND_ROLAND_SC8820_2 +ffffffff83351140 d umq_ROLAND_ROLAND_PC300_2 +ffffffff83351160 d umq_ROLAND_ROLAND_SK500_2 +ffffffff83351180 d umq_ROLAND_ROLAND_SCD70_2 +ffffffff833511a0 d umq_ROLAND_ROLAND_UM550_0 +ffffffff833511c0 d umq_ROLAND_ROLAND_SD20_0 +ffffffff833511e0 d umq_ROLAND_ROLAND_SD80_0 +ffffffff83351200 d umq_ROLAND_ROLAND_UA700_3 +ffffffff83351220 d umq_ROLAND_ROLAND_UMONE_ANYIFACE +ffffffff83351240 D umidi_quirklist +ffffffff833514a0 d umq_YAMAHA_YAMAHA_UX256_ANYIFACE_fixed_ep_desc +ffffffff833514c0 d umq_YAMAHA_YAMAHA_UX256_ANYIFACE_fixed_ep_endpoints +ffffffff833514d0 d umq_ROLAND_ROLAND_UM1_2_fixed_ep_desc +ffffffff833514f0 d umq_ROLAND_ROLAND_UM1_2_fixed_ep_endpoints +ffffffff83351500 d umq_ROLAND_ROLAND_SC8850_2_fixed_ep_desc +ffffffff83351520 d umq_ROLAND_ROLAND_SC8850_2_fixed_ep_endpoints +ffffffff83351530 d umq_ROLAND_ROLAND_SD90_2_fixed_ep_desc +ffffffff83351550 d umq_ROLAND_ROLAND_SD90_2_fixed_ep_endpoints +ffffffff83351560 d umq_ROLAND_ROLAND_UM880N_0_fixed_ep_desc +ffffffff83351580 d umq_ROLAND_ROLAND_UM880N_0_fixed_ep_endpoints +ffffffff83351590 d umq_ROLAND_ROLAND_UA100_2_fixed_ep_desc +ffffffff833515b0 d umq_ROLAND_ROLAND_UA100_2_fixed_ep_endpoints +ffffffff833515c0 d umq_ROLAND_ROLAND_UM4_2_fixed_ep_desc +ffffffff833515e0 d umq_ROLAND_ROLAND_UM4_2_fixed_ep_endpoints +ffffffff833515f0 d umq_ROLAND_ROLAND_U8_2_fixed_ep_desc +ffffffff83351610 d umq_ROLAND_ROLAND_U8_2_fixed_ep_endpoints +ffffffff83351620 d umq_ROLAND_ROLAND_UM2_2_fixed_ep_desc +ffffffff83351640 d umq_ROLAND_ROLAND_UM2_2_fixed_ep_endpoints +ffffffff83351650 d umq_ROLAND_ROLAND_SC8820_2_fixed_ep_desc +ffffffff83351670 d umq_ROLAND_ROLAND_SC8820_2_fixed_ep_endpoints +ffffffff83351680 d umq_ROLAND_ROLAND_PC300_2_fixed_ep_desc +ffffffff833516a0 d umq_ROLAND_ROLAND_PC300_2_fixed_ep_endpoints +ffffffff833516b0 d umq_ROLAND_ROLAND_SK500_2_fixed_ep_desc +ffffffff833516d0 d umq_ROLAND_ROLAND_SK500_2_fixed_ep_endpoints +ffffffff833516e0 d umq_ROLAND_ROLAND_SCD70_2_fixed_ep_desc +ffffffff83351700 d umq_ROLAND_ROLAND_SCD70_2_fixed_ep_endpoints +ffffffff83351710 d umq_ROLAND_ROLAND_UM550_0_fixed_ep_desc +ffffffff83351730 d umq_ROLAND_ROLAND_UM550_0_fixed_ep_endpoints +ffffffff83351740 d umq_ROLAND_ROLAND_SD20_0_fixed_ep_desc +ffffffff83351760 d umq_ROLAND_ROLAND_SD20_0_fixed_ep_endpoints +ffffffff83351770 d umq_ROLAND_ROLAND_SD80_0_fixed_ep_desc +ffffffff83351790 d umq_ROLAND_ROLAND_SD80_0_fixed_ep_endpoints +ffffffff833517a0 d umq_ROLAND_ROLAND_UA700_3_fixed_ep_desc +ffffffff833517c0 d umq_ROLAND_ROLAND_UA700_3_fixed_ep_endpoints +ffffffff833517d0 d umq_ROLAND_ROLAND_UMONE_ANYIFACE_fixed_ep_desc +ffffffff833517f0 d umq_ROLAND_ROLAND_UMONE_ANYIFACE_fixed_ep_endpoints +ffffffff83352000 D ucom_cd +ffffffff83353000 D ugen_cd +ffffffff83354000 D uhidev_cd +ffffffff83354020 d uhidev_use_rdesc.reportbuf +ffffffff83355000 D uhid_cd +ffffffff83356000 D fido_cd +ffffffff83357000 D ujoy_cd +ffffffff83358000 D ukbd_cd +ffffffff83359000 D ums_cd +ffffffff83359020 d ums_fix_elecom_descriptor.match +ffffffff8335a000 D umt_cd +ffffffff8335b000 D def_scale +ffffffff8335b020 D uts_cd +ffffffff8335c000 D ubcmtp_cd +ffffffff8335d000 D ucycom_cd +ffffffff8335e000 D uslhcom_cd +ffffffff8335f000 D ulpt_fwdevs +ffffffff8335f060 D ulpt_cd +ffffffff8335f080 D ulptusein +ffffffff83360000 D umass_cd +ffffffff83360020 d umass_bbb_transfer.dCBWtag +ffffffff83361000 D uthum_cd +ffffffff83362000 D ugold_cd +ffffffff83362020 d cmd_init +ffffffff83362028 d cmd_type +ffffffff83362030 d cmd_data +ffffffff83363000 D utrh_cd +ffffffff83364000 D uoakrh_cd +ffffffff83365000 D uoaklux_cd +ffffffff83366000 D uoakv_cd +ffffffff83367000 D uonerng_cd +ffffffff83368000 D urng_cd +ffffffff83369000 D udcf_cd +ffffffff8336a000 D umbg_cd +ffffffff8336b000 D uvisor_cd +ffffffff8336c000 D udsbr_cd +ffffffff8336d000 D utwitch_cd +ffffffff8336e000 D aue_cd +ffffffff8336f000 D axe_cd +ffffffff83370000 D axen_cd +ffffffff83371000 D smsc_cd +ffffffff83372000 D cue_devs +ffffffff83372010 D cue_cd +ffffffff83373000 D kue_cd +ffffffff83374000 D cdce_cd +ffffffff83375000 D urndis_cd +ffffffff83376000 D mos_cd +ffffffff83377000 D mue_cd +ffffffff83378000 D udav_cd +ffffffff83379000 D upl_devs +ffffffff83379008 D upl_cd +ffffffff8337a000 D ugl_devs +ffffffff8337a008 D ugl_cd +ffffffff8337b000 D url_cd +ffffffff8337c000 D ure_cd +ffffffff8337d000 D uaq_cd +ffffffff8337e000 D umodem_cd +ffffffff8337f000 D uftdi_cd +ffffffff83380000 D uplcom_cd +ffffffff83381000 D umct_cd +ffffffff83382000 D uvscom_cd +ffffffff83383000 D ubsa_cd +ffffffff83384000 D ukspan_cd +ffffffff83385000 D uslcom_cd +ffffffff83386000 D uark_cd +ffffffff83387000 D moscom_cd +ffffffff83388000 D umcs_cd +ffffffff83389000 D uscom_cd +ffffffff8338a000 D ucrcom_cd +ffffffff8338b000 D uxrcom_cd +ffffffff8338c000 D uipaq_cd +ffffffff8338d000 D umsm_cd +ffffffff8338e000 D uchcom_cd +ffffffff8338f000 D uticom_cd +ffffffff83390000 D wi_func_usb +ffffffff83390060 D wi_usb_cd +ffffffff83391000 D atu_cd +ffffffff83391020 D atu_devs +ffffffff83391270 D atu_radfirm +ffffffff83392000 D ural_cd +ffffffff83393000 D rum_cd +ffffffff83394000 D run_cd +ffffffff83394020 D rt3070_freqs +ffffffff83395000 D mtw_cd +ffffffff83396000 D zyd_cd +ffffffff83397000 D upgt_cd +ffffffff83398000 D urtw_cd +ffffffff83399000 D urtwn_cd +ffffffff8339a000 D rsu_cd +ffffffff8339b000 D otus_cd +ffffffff8339b020 d AR_PLCP_HDR_INTR +ffffffff8339c000 D umb_xfer_tout +ffffffff8339c010 D umb_uuid_basic_connect +ffffffff8339c020 D umb_uuid_context_internet +ffffffff8339c030 D umb_uuid_qmi_mbim +ffffffff8339c040 D umb_cd +ffffffff8339c060 D umb_delay +ffffffff8339c070 D umb_qmi_alloc_cid +ffffffff8339c080 D umb_qmi_fcc_auth +ffffffff8339d000 D uath_cd +ffffffff8339e000 D uow_cd +ffffffff8339f000 D uberry_cd +ffffffff833a0000 D upd_cd +ffffffff833a0020 d upd_usage_roots +ffffffff833a00a0 d upd_usage_batdep +ffffffff833a1000 D uwacom_cd +ffffffff833a1020 d uwacom_attach.reportbuf +ffffffff833a2000 D bwfm_usb_bus_ops +ffffffff833a3000 D umstc_cd +ffffffff833a4000 D uhidpp_cd +ffffffff833a5000 D ucc_cd +ffffffff833a6000 D iic_cd +ffffffff833a7000 D probe_addrs_sensor +ffffffff833a7008 D probe_addrs_eeprom +ffffffff833a8000 D lmtemp_cd +ffffffff833a9000 D lmn_worklist +ffffffff833a9240 D lmn_cd +ffffffff833aa000 D lmenv_cd +ffffffff833ab000 D maxtmp_cd +ffffffff833ac000 D adc_cd +ffffffff833ad000 D admtemp_cd +ffffffff833ae000 D admlc_cd +ffffffff833af000 D admtm_cd +ffffffff833b0000 D admtmp_cd +ffffffff833b1000 D admtt_cd +ffffffff833b2000 D maxds_cd +ffffffff833b3000 D adt_chips +ffffffff833b3160 D worklist +ffffffff833b31a0 D adt_cd +ffffffff833b4000 D admcts_cd +ffffffff833b5000 D wbng_cd +ffffffff833b6000 D nvt_cd +ffffffff833b7000 D adl_worklist +ffffffff833b7138 D adl_cd +ffffffff833b8000 D andl_cd +ffffffff833b9000 D sdtemp_cd +ffffffff833ba000 D lisa_cd +ffffffff833bb000 D ihidev_cd +ffffffff833bc000 D ikbd_cd +ffffffff833bd000 D ims_cd +ffffffff833be000 D imt_cd +ffffffff833bf000 D iatp_cd +ffffffff833c0000 D bgw_cd +ffffffff833c1000 D icc_cd +ffffffff833c2000 D gpio_cd +ffffffff833c3000 D acpi_cd +ffffffff833c3020 D acpi_pcidevs +ffffffff833c3030 D acpi_pcirootdevs +ffffffff833c3040 D acpi_taskq +ffffffff833c3050 d acpi_indicator.save_led_state +ffffffff833c3060 d acpi_getprop.prop_guid +ffffffff833c3070 d acpi_getpropint.prop_guid +ffffffff833c3080 D acpi_skip_hids +ffffffff833c30f0 D acpi_isa_hids +ffffffff833c4000 D aml_intlen +ffffffff833c4010 D aml_table +ffffffff833c4af0 d osstring +ffffffff833c4b10 D aml_defobj +ffffffff833c4ca0 D aml_valid_osi +ffffffff833c4d78 D acpi_max_osi +ffffffff833c4d80 D aml_regionspace +ffffffff833c6000 D acpitimer_cd +ffffffff833c6020 d acpi_timecounter +ffffffff833c7000 D acpiac_cd +ffffffff833c7020 D acpiac_hids +ffffffff833c8000 D acpibat_cd +ffffffff833c8020 D acpibat_hids +ffffffff833c9000 D acpibtn_cd +ffffffff833c9020 D acpibtn_hids +ffffffff833ca000 D acpicmos_cd +ffffffff833ca020 D acpicmos_hids +ffffffff833cb000 D acpicpu_cd +ffffffff833cb020 D acpicpu_hids +ffffffff833cb030 d acpicpu_set_pdc.cpu_oscuuid +ffffffff833cc000 D acpihpet_cd +ffffffff833cc020 d hpet_timecounter +ffffffff833cd000 D acpiec_cd +ffffffff833cd020 D acpiec_hids +ffffffff833ce000 D acpitz_cd +ffffffff833ce020 D acpitz_perflevel +ffffffff833cf000 D acpimadt_cd +ffffffff833d0000 D acpimcfg_cd +ffffffff833d1000 D acpiprt_map_list +ffffffff833d1010 D acpiprt_cd +ffffffff833d1030 D acpiprt_pri +ffffffff833d2000 D acpidmar_force_cm +ffffffff833d2008 D acpidmar_cd +ffffffff833d2030 D vtd_faults +ffffffff833d3000 D acpidock_cd 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pci_mcfg_max_bus +ffffffff8370e020 B pci_mcfgh +ffffffff8370e820 b pci_intr_string.irqstr +ffffffff8370e860 B pciio_ex +ffffffff8370e868 B pcimem_ex +ffffffff8370e870 B pcibus_ex +ffffffff8370f000 b ddb_vgapostp +ffffffff83710000 B cardsloteventpool +ffffffff83711000 B rbus_null +ffffffff83712000 B pcmcia_verbose +ffffffff83713000 B isa_mem_head +ffffffff83713008 B isa_dev +ffffffff83713010 B isadma_dmam +ffffffff83714000 b spkr_attached +ffffffff83714008 b ppicookie +ffffffff83714010 b spkr_active +ffffffff83714018 b spkr_inbuf +ffffffff83714020 b octave +ffffffff83714024 b whole +ffffffff83714028 b fill +ffffffff8371402c b value +ffffffff83714030 b octtrack +ffffffff83714034 b octprefix +ffffffff83715000 B it_softc_list +ffffffff83716000 B aps_timeout +ffffffff83717000 B intrtype +ffffffff83717040 B intrhand +ffffffff837170c0 B isa_dma_stats_loads +ffffffff837170c8 B isa_dma_stats_bounces +ffffffff837170d0 B isa_dma_stats_nbouncebufs +ffffffff837170e0 B intrlevel +ffffffff83718000 B wsdisplay_console_conf +ffffffff83718028 B wsdisplay_console_initted +ffffffff83718030 B wsdisplay_console_device +ffffffff83718038 B wsdisplay_clearonclose +ffffffff8371803c B wsdisplay_cons_pollmode +ffffffff83718040 B wsdisplay_cons_kbd_pollc +ffffffff83718048 B ws_get_param +ffffffff83718050 B ws_set_param +ffffffff83719000 b wskbd_console_data +ffffffff83719040 b wskbd_console_initted +ffffffff83719048 b wskbd_console_device +ffffffff83719050 B wskbd_get_backlight +ffffffff83719058 B wskbd_set_backlight +ffffffff83719060 b wskbd_cngetc.num +ffffffff83719064 b wskbd_cngetc.pos +ffffffff8371a000 b compose_tab_inorder +ffffffff8371b000 B nwsmux +ffffffff8371b008 B wsmuxdevs +ffffffff8371c000 B wsemul_vt100_console_emuldata +ffffffff8371d000 B pckbd_consdata +ffffffff8371d038 B pckbd_bell_fn +ffffffff8371d040 B pckbd_bell_fn_arg +ffffffff8371e000 b wscninit.initted +ffffffff8371f000 B pctr_isamd +ffffffff8371f004 B pctr_isintel +ffffffff8371f008 B pctr_intel_cap +ffffffff8371f010 B pctr_fn +ffffffff83720000 b nvram_initialized +ffffffff83721000 B hidkbd_is_console +ffffffff83721008 B hidkbd_bell_fn +ffffffff83721010 B hidkbd_bell_fn_arg +ffffffff83722000 B usb_task_thread_proc +ffffffff83722008 B usb_abort_task_thread_proc +ffffffff83722010 b usb_nbuses +ffffffff83722018 B usbpalock +ffffffff83722028 B usb_abort_tasks +ffffffff83722038 B usb_explore_tasks +ffffffff83722048 B usb_generic_tasks +ffffffff83722058 b usb_run_abort_tasks +ffffffff8372205c b usb_run_tasks +ffffffff83722060 B explore_pending +ffffffff83723000 B usb_blk_freelist +ffffffff83723008 B usb_blk_nfree +ffffffff83723010 B usb_frag_freelist +ffffffff83724000 b usbd_errstr.buffer +ffffffff83724008 b usb_delay_ms.usb_delay_wchan +ffffffff83724010 b usbd_probe_and_attach.cookie +ffffffff83725000 b t_wait +ffffffff83725004 b t_trust +ffffffff83726000 B umb_session_id +ffffffff83726010 b umb_val2descr.sval +ffffffff83727000 b probe_ic +ffffffff83727008 b probe_addr +ffffffff83727010 b probe_val +ffffffff83727110 B skip_fc +ffffffff83727118 B ignore_addrs +ffffffff83727120 b iic_dump.iicvalcnt +ffffffff83728000 B acpi_softc +ffffffff83728008 B acpiwqpool +ffffffff837281b0 B acpi_enabled +ffffffff837281b4 b acpi_maptable.tblid +ffffffff837281b8 b acpi_add_device.nacpicpus +ffffffff837281bc B acpi_force_bm +ffffffff837281c0 B mouse_has_softbtn +ffffffff837281c4 B acpi_evindex +ffffffff837281c8 B acpi_poll_enabled +ffffffff837281cc B acpi_hasprocfvs +ffffffff837281d0 B acpi_haspci +ffffffff83729000 B aml_root +ffffffff83729060 B aml_lastscope +ffffffff83729068 B aml_ophash +ffffffff83729070 b aml_mnem.mnemstr +ffffffff83729090 B aml_notify_list +ffffffff83729098 B acpi_nalloc +ffffffff837290a0 b acpi_sleep.acpinowait +ffffffff837290b0 b aml_nodename.namebuf +ffffffff83729130 b aml_getname.namebuf +ffffffff837291b0 b aml_getname.p +ffffffff837291b8 b global_lock_count +ffffffff837291c0 b aml_eisaid.id +ffffffff837291c8 B aml_global_lock +ffffffff837291d0 b aml_mapresource.map +ffffffff83729210 b aml_val_to_string.buffer +ffffffff83729310 B aml_error +ffffffff83729314 B odp +ffffffff83729318 B maxdp +ffffffff8372931c B aml_busy +ffffffff8372a000 B scope +ffffffff8372b000 B acpibtn_lids +ffffffff8372c000 B cst_stats +ffffffff8372d000 B acpihpet_attached +ffffffff8372e000 b acpiec_wait.acpiecnowait +ffffffff8372f000 B acpitz_cpu_setperf +ffffffff83730000 B acpimadt_busses +ffffffff83733000 B acpimadt_isa_bus +ffffffff83733030 b lapic_map +ffffffff83734000 B acpidmar_ddb +ffffffff83734010 b dmar_bdf.bdf +ffffffff83734030 B acpidmar_sc +ffffffff83734038 B domain_map_page +ffffffff83734040 b dom_bdf.mmm +ffffffff83734070 b iommu_init.niommu +ffffffff83734078 b acpidmar_pci_attach.dom +ffffffff83734080 b sid_flag +ffffffff83774080 b ivhd_showpage.show +ffffffff83774084 b ivhd_iommu_init.niommu +ffffffff83774088 b acpidmar_intr.ofe.0 +ffffffff83774090 b acpidmar_intr.ofe.1 +ffffffff83775000 b dwiic_i2c_intr_string.irqstr +ffffffff83776000 B acpihve_attached +ffffffff83777000 B efi_jmpbuf +ffffffff83778000 B vm_pool +ffffffff837781a8 B vcpu_pool +ffffffff83778350 B vmm_softc +ffffffff83779000 B l1tf_flush_region +ffffffff8377a000 B sdmmc_verbose +ffffffff8377b000 B utc_offset +ffffffff8377b008 B bufpages +ffffffff8377b010 B utsname +ffffffff8377c000 B mountroot +ffffffff8377d000 B __kernel_bss_end ffffffff83800000 B _end ffffffff83800000 B end