--- 7.3/2023-05-26T22:12:41Z/2023-04-29T00:00:00Z/nm-bsd-ot31.txt Sat May 27 01:13:43 2023 +++ 7.3/2023-05-26T22:12:41Z/2023-05-06T00:00:00Z/nm-bsd-ot31.txt Sat May 27 02:02:38 2023 @@ -2,14 +2,14 @@ 00011006 A mp_pdirpa 0001419d A acpi_pdirpa 01000000 A __kernel_phys_base -0254f000 T __kernel_kutext_phys -02553000 C __kernel_cptext_phys -02554000 C __kernel_rodata_phys -02e0b000 R __kernel_kutext_page_phys -02e0d000 C __kernel_randomdata_phys -030ce000 R __kernel_data_phys -03402000 D __kernel_kudata_phys -03403000 C __kernel_bss_phys +02550000 T __kernel_kutext_phys +02554000 C __kernel_cptext_phys +02555000 C __kernel_rodata_phys +02e0c000 R __kernel_kutext_page_phys +02e0e000 C __kernel_randomdata_phys +030d0000 R __kernel_data_phys +03404000 D __kernel_kudata_phys +03405000 C __kernel_bss_phys 03800000 B __kernel_phys_end 80000000 A __kernel_virt_to_phys ffffffff80000000 A __kernel_base @@ -4319,94 +4319,94 @@ ffffffff81205140 T pf_state_export ffffffff81205570 T pf_state_expires ffffffff81205650 T pf_state_alloc_scrub_memory ffffffff812056a0 T pf_state_import -ffffffff81205f20 T pf_purge_expired_states -ffffffff81206280 T pf_purge_expired_src_nodes -ffffffff81206410 T pf_src_tree_remove_state -ffffffff812064d0 T pf_send_tcp -ffffffff812065b0 T pf_remove_divert_state -ffffffff81206770 T pf_free_state -ffffffff81206960 T pf_tbladdr_setup -ffffffff812069b0 T pf_tbladdr_remove -ffffffff81206a00 T pf_tbladdr_copyout -ffffffff81206a70 T pf_print_state -ffffffff81206a90 T pf_print_flags -ffffffff81206bc0 T pf_calc_skip_steps -ffffffff81207040 T pf_addr_wrap_neq -ffffffff81207140 T pf_cksum_fixup -ffffffff812071a0 T pf_cksum_fixup_a -ffffffff81207300 T pf_patch_8 -ffffffff812073a0 T pf_patch_16 -ffffffff81207420 T pf_patch_16_unaligned -ffffffff812075a0 T pf_patch_32 -ffffffff81207640 T pf_patch_32_unaligned -ffffffff812078c0 T pf_icmp_mapping -ffffffff81207bf0 T pf_translate_icmp -ffffffff81207d30 T pf_translate_a -ffffffff81207e40 T pf_translate_af -ffffffff812081d0 T pf_change_icmp_af -ffffffff81208550 T pf_translate_icmp_af -ffffffff81208bb0 T pf_modulate_sack -ffffffff81208e30 T pf_pull_hdr -ffffffff81208f20 T pf_find_tcpopt -ffffffff81208fd0 T pf_build_tcp -ffffffff81209270 T pf_send_icmp -ffffffff81209380 T pf_match_addr -ffffffff81209400 T pf_match_addr_range -ffffffff81209510 T pf_match -ffffffff812095f0 T pf_match_port -ffffffff812096e0 T pf_match_uid -ffffffff812097d0 T pf_match_gid -ffffffff812098c0 T pf_match_tag -ffffffff81209920 T pf_match_rcvif -ffffffff81209a20 T pf_tag_packet -ffffffff81209a60 T pf_anchor_stack_init -ffffffff81209ab0 T pf_anchor_stack_is_full -ffffffff81209b00 T pf_anchor_stack_is_empty -ffffffff81209b50 T pf_anchor_stack_top -ffffffff81209ba0 T pf_anchor_stack_push -ffffffff81209c90 T pf_anchor_stack_pop -ffffffff81209d90 T pf_poolmask -ffffffff81209e50 T pf_addr_inc -ffffffff81209f00 T pf_socket_lookup -ffffffff8120a170 T pf_get_wscale -ffffffff8120a2e0 T pf_get_mss -ffffffff8120a440 T pf_calc_mss -ffffffff8120a580 T pf_tcp_iss -ffffffff8120a6e0 T pf_rule_to_actions -ffffffff8120a7b0 T pf_match_rule -ffffffff8120bd30 T pf_routable -ffffffff8120bf10 T pf_rtlabel_match -ffffffff8120c000 T pf_log_matches -ffffffff8120c0a0 T pf_test_rule -ffffffff8120d370 T pf_check_tcp_cksum -ffffffff8120d4b0 T pf_translate -ffffffff8120d7b0 T pf_tcp_track_full -ffffffff8120e6e0 T pf_tcp_track_sloppy -ffffffff8120eaf0 T pf_test_state -ffffffff8120f730 T pf_mbuf_link_inpcb -ffffffff8120f7a0 T pf_icmp_state_lookup -ffffffff8120f9b0 T pf_test_state_icmp -ffffffff81212670 T pf_walk_header -ffffffff812129a0 T pf_walk_header6 -ffffffff81213220 T pf_route -ffffffff81213910 T pf_test -ffffffff81214b70 T pf_route6 -ffffffff812151a0 T pf_find_divert -ffffffff812151f0 T pf_get_divert -ffffffff812152a0 T pf_walk_option -ffffffff812154d0 T pf_walk_option6 -ffffffff812158d0 T pf_setup_pdesc -ffffffff81215f20 T pf_counters_inc -ffffffff81216210 T pf_mbuf_link_state_key -ffffffff81216290 T pf_ouraddr -ffffffff812162e0 T pf_mbuf_unlink_inpcb -ffffffff81216320 T pf_inp_lookup -ffffffff812163c0 T pf_inp_link -ffffffff81216490 T pf_inp_unlink -ffffffff81216520 T pf_delay_pkt -ffffffff812165c0 T pf_pktenqueue_delayed -ffffffff81216620 t pf_state_tree_RBT_COMPARE -ffffffff81216730 t pf_state_tree_id_RBT_COMPARE +ffffffff81205fa0 T pf_purge_expired_states +ffffffff81206300 T pf_purge_expired_src_nodes +ffffffff81206490 T pf_src_tree_remove_state +ffffffff81206550 T pf_send_tcp +ffffffff81206630 T pf_remove_divert_state +ffffffff812067f0 T pf_free_state +ffffffff812069e0 T pf_tbladdr_setup +ffffffff81206a30 T pf_tbladdr_remove +ffffffff81206a80 T pf_tbladdr_copyout +ffffffff81206af0 T pf_print_state +ffffffff81206b10 T pf_print_flags +ffffffff81206c40 T pf_calc_skip_steps +ffffffff812070c0 T pf_addr_wrap_neq +ffffffff812071c0 T pf_cksum_fixup +ffffffff81207220 T pf_cksum_fixup_a +ffffffff81207380 T pf_patch_8 +ffffffff81207420 T pf_patch_16 +ffffffff812074a0 T pf_patch_16_unaligned +ffffffff81207620 T pf_patch_32 +ffffffff812076c0 T pf_patch_32_unaligned +ffffffff81207940 T pf_icmp_mapping +ffffffff81207c70 T pf_translate_icmp +ffffffff81207db0 T pf_translate_a +ffffffff81207ec0 T pf_translate_af +ffffffff81208250 T pf_change_icmp_af +ffffffff812085d0 T pf_translate_icmp_af +ffffffff81208c30 T pf_modulate_sack +ffffffff81208eb0 T pf_pull_hdr +ffffffff81208fa0 T pf_find_tcpopt +ffffffff81209050 T pf_build_tcp +ffffffff812092f0 T pf_send_icmp +ffffffff81209400 T pf_match_addr +ffffffff81209480 T pf_match_addr_range +ffffffff81209590 T pf_match +ffffffff81209670 T pf_match_port +ffffffff81209760 T pf_match_uid +ffffffff81209850 T pf_match_gid +ffffffff81209940 T pf_match_tag +ffffffff812099a0 T pf_match_rcvif +ffffffff81209aa0 T pf_tag_packet +ffffffff81209ae0 T pf_anchor_stack_init +ffffffff81209b30 T pf_anchor_stack_is_full +ffffffff81209b80 T pf_anchor_stack_is_empty +ffffffff81209bd0 T pf_anchor_stack_top +ffffffff81209c20 T pf_anchor_stack_push +ffffffff81209d10 T pf_anchor_stack_pop +ffffffff81209e10 T pf_poolmask +ffffffff81209ed0 T pf_addr_inc +ffffffff81209f80 T pf_socket_lookup +ffffffff8120a1f0 T pf_get_wscale +ffffffff8120a360 T pf_get_mss +ffffffff8120a4c0 T pf_calc_mss +ffffffff8120a600 T pf_tcp_iss +ffffffff8120a760 T pf_rule_to_actions +ffffffff8120a830 T pf_match_rule +ffffffff8120bdb0 T pf_routable +ffffffff8120bf90 T pf_rtlabel_match +ffffffff8120c080 T pf_log_matches +ffffffff8120c120 T pf_test_rule +ffffffff8120d430 T pf_check_tcp_cksum +ffffffff8120d570 T pf_translate +ffffffff8120d870 T pf_tcp_track_full +ffffffff8120e7a0 T pf_tcp_track_sloppy +ffffffff8120ebb0 T pf_test_state +ffffffff8120f7f0 T pf_mbuf_link_inpcb +ffffffff8120f860 T pf_icmp_state_lookup +ffffffff8120fa70 T pf_test_state_icmp +ffffffff81212730 T pf_walk_header +ffffffff81212a60 T pf_walk_header6 +ffffffff812132e0 T pf_route +ffffffff812139d0 T pf_test +ffffffff81214c30 T pf_route6 +ffffffff81215260 T pf_find_divert +ffffffff812152b0 T pf_get_divert +ffffffff81215360 T pf_walk_option +ffffffff81215590 T pf_walk_option6 +ffffffff81215990 T pf_setup_pdesc +ffffffff81215fe0 T pf_counters_inc +ffffffff812162d0 T pf_mbuf_link_state_key +ffffffff81216350 T pf_ouraddr +ffffffff812163a0 T pf_mbuf_unlink_inpcb +ffffffff812163e0 T pf_inp_lookup +ffffffff81216480 T pf_inp_link +ffffffff81216550 T pf_inp_unlink +ffffffff812165e0 T pf_delay_pkt +ffffffff81216680 T pf_pktenqueue_delayed +ffffffff812166e0 t pf_state_tree_RBT_COMPARE +ffffffff812167f0 t pf_state_tree_id_RBT_COMPARE ffffffff81217000 T pf_frnode_tree_RB_INSERT_COLOR ffffffff81217220 T pf_frnode_tree_RB_REMOVE_COLOR ffffffff812175a0 T pf_frnode_tree_RB_REMOVE @@ -4508,24 +4508,24 @@ ffffffff812206a0 T pf_queue_manager ffffffff812206e0 T pf_hash_rule_addr ffffffff812207e0 T pf_hash_rule ffffffff81220b10 T pf_commit_rules -ffffffff81220d20 T pf_calc_chksum -ffffffff81220dd0 T pf_addr_setup -ffffffff81220e60 T pf_kif_setup -ffffffff81220f00 T pf_addr_copyout -ffffffff81220f90 T pf_states_clr -ffffffff81221170 T pf_states_get -ffffffff812212e0 T pfioctl -ffffffff81226070 T pf_rule_copyin -ffffffff812269d0 T pf_rule_checkaf -ffffffff81226a70 T pf_open_trans -ffffffff81226b10 T pf_init_tgetrule -ffffffff81226b60 T pf_find_trans -ffffffff81226bd0 T pf_trans_set_commit -ffffffff81226c70 T pf_pool_copyin -ffffffff81226cd0 T pf_validate_range -ffffffff81226d40 T pf_sysctl -ffffffff81226e40 T pf_cleanup_tgetrule -ffffffff81226e80 T pf_rollback_trans +ffffffff81220d60 T pf_calc_chksum +ffffffff81220e10 T pf_addr_setup +ffffffff81220ea0 T pf_kif_setup +ffffffff81220f40 T pf_addr_copyout +ffffffff81220fd0 T pf_states_clr +ffffffff812211b0 T pf_states_get +ffffffff81221320 T pfioctl +ffffffff812260f0 T pf_rule_copyin +ffffffff81226a50 T pf_rule_checkaf +ffffffff81226af0 T pf_open_trans +ffffffff81226b90 T pf_init_tgetrule +ffffffff81226be0 T pf_find_trans +ffffffff81226c50 T pf_trans_set_commit +ffffffff81226cf0 T pf_pool_copyin +ffffffff81226d50 T pf_validate_range +ffffffff81226dc0 T pf_sysctl +ffffffff81226ec0 T pf_cleanup_tgetrule +ffffffff81226f00 T pf_rollback_trans ffffffff81227000 T pfr_ktablehead_RB_INSERT_COLOR ffffffff81227300 T pfr_ktablehead_RB_REMOVE_COLOR ffffffff81227800 T pfr_ktablehead_RB_REMOVE @@ -5986,40 +5986,40 @@ ffffffff812c9650 T hook_establish ffffffff812c9710 T hook_disestablish ffffffff812c97a0 T dohooks ffffffff812ca000 T sys_sysctl -ffffffff812ca230 T kern_sysctl -ffffffff812cb490 T hw_sysctl -ffffffff812cba70 T kern_sysctl_dirs -ffffffff812cc100 T sysctl_doproc -ffffffff812cc4f0 T sysctl_proc_args -ffffffff812cca30 T sysctl_proc_cwd -ffffffff812ccbd0 T sysctl_proc_nobroadcastkill -ffffffff812ccd50 T sysctl_proc_vmmap -ffffffff812ccf80 T sysctl_file -ffffffff812cde40 T sysctl_sysvipc -ffffffff812ce0b0 T sysctl_intrcnt -ffffffff812ce0d0 T sysctl_cptime2 -ffffffff812ce1b0 T sysctl_audio -ffffffff812ce290 T sysctl_video -ffffffff812ce370 T sysctl_cpustats -ffffffff812ce4d0 T sysctl_rdstring -ffffffff812ce580 T sysctl_rdint -ffffffff812ce600 T sysctl_int -ffffffff812ce6c0 T sysctl_securelevel_int -ffffffff812ce800 T sysctl_tstring -ffffffff812ce850 T sysctl_rdstruct -ffffffff812ce8c0 T sysctl_utc_offset -ffffffff812ce990 T sysctl_bounded_arr -ffffffff812cea30 T sysctl_diskinit -ffffffff812cee20 T sysctl_sensors -ffffffff812cf050 T sysctl_rdquad -ffffffff812cf0d0 T sysctl_int_lower -ffffffff812cf1e0 T sysctl_int_bounded -ffffffff812cf320 T sysctl_quad -ffffffff812cf3e0 T sysctl_string -ffffffff812cf4d0 T sysctl__string -ffffffff812cf620 T sysctl_struct -ffffffff812cf6e0 T fill_file -ffffffff812cfe90 T fill_kproc +ffffffff812ca280 T kern_sysctl +ffffffff812cb4e0 T hw_sysctl +ffffffff812cbac0 T kern_sysctl_dirs +ffffffff812cc150 T sysctl_doproc +ffffffff812cc540 T sysctl_proc_args +ffffffff812cca80 T sysctl_proc_cwd +ffffffff812ccc20 T sysctl_proc_nobroadcastkill +ffffffff812ccda0 T sysctl_proc_vmmap +ffffffff812ccfd0 T sysctl_file +ffffffff812cde90 T sysctl_sysvipc +ffffffff812ce100 T sysctl_intrcnt +ffffffff812ce120 T sysctl_cptime2 +ffffffff812ce200 T sysctl_audio +ffffffff812ce2e0 T sysctl_video +ffffffff812ce3c0 T sysctl_cpustats +ffffffff812ce520 T sysctl_rdstring +ffffffff812ce5d0 T sysctl_rdint +ffffffff812ce650 T sysctl_int +ffffffff812ce710 T sysctl_securelevel_int +ffffffff812ce850 T sysctl_tstring +ffffffff812ce8a0 T sysctl_rdstruct +ffffffff812ce910 T sysctl_utc_offset +ffffffff812ce9e0 T sysctl_bounded_arr +ffffffff812cea80 T sysctl_diskinit +ffffffff812cee70 T sysctl_sensors +ffffffff812cf0a0 T sysctl_rdquad +ffffffff812cf120 T sysctl_int_lower +ffffffff812cf230 T sysctl_int_bounded +ffffffff812cf370 T sysctl_quad +ffffffff812cf430 T sysctl_string +ffffffff812cf520 T sysctl__string +ffffffff812cf670 T sysctl_struct +ffffffff812cf730 T fill_file +ffffffff812cfee0 T fill_kproc ffffffff812d1000 T sleep_queue_init ffffffff812d1060 T tsleep ffffffff812d11e0 T sleep_setup @@ -6772,7 +6772,7 @@ ffffffff813284e0 T pffinddomain ffffffff81328570 T pffindtype ffffffff81328620 T pffindproto ffffffff81328710 T net_sysctl -ffffffff81328930 T pfctlinput +ffffffff81328a30 T pfctlinput ffffffff81329000 T m_pool_alloc ffffffff81329080 T m_pool_free ffffffff813290d0 T mbinit @@ -6833,7 +6833,8 @@ ffffffff8132cd40 T mq_delist ffffffff8132cda0 T mq_dechain ffffffff8132ce10 T mq_purge ffffffff8132cea0 T mq_hdatalen -ffffffff8132cf30 T sysctl_mq +ffffffff8132cf30 T mq_set_maxlen +ffffffff8132cf60 T sysctl_mq ffffffff8132e000 T m_pulldown ffffffff8132e350 T m_tag_get ffffffff8132e3f0 T m_tag_prepend @@ -7367,13 +7368,13 @@ ffffffff81362430 T fc_lookup ffffffff813624e0 T fc_purge ffffffff81362560 T updatefats ffffffff813626d0 T clusterfree -ffffffff81362780 T fatentry -ffffffff813629b0 T chainlength -ffffffff81362aa0 T chainalloc -ffffffff81362d90 T clusteralloc -ffffffff81363290 T freeclusterchain -ffffffff813634b0 T fillinusemap -ffffffff81363670 T extendfile +ffffffff813627d0 T fatentry +ffffffff81362a00 T chainlength +ffffffff81362b40 T chainalloc +ffffffff81362e00 T clusteralloc +ffffffff813633f0 T freeclusterchain +ffffffff81363630 T fillinusemap +ffffffff81363820 T extendfile ffffffff81364000 T msdosfs_lookup ffffffff81364900 T createde ffffffff81364c80 T dosdirempty @@ -11043,18336 +11044,18324 @@ ffffffff81554470 T mld6_input ffffffff815547d0 T mld6_fasttimeo ffffffff815548e0 T mld6_checktimer ffffffff81555000 T nd6_init -ffffffff815550c0 T nd6_expire -ffffffff81555220 T nd6_timer -ffffffff815552f0 T nd6_slowtimo -ffffffff815553b0 T nd6_expire_timer -ffffffff815553e0 T nd6_ifattach -ffffffff81555460 T nd6_ifdetach -ffffffff81555490 T nd6_options -ffffffff815556b0 T nd6_llinfo_settimer -ffffffff815557a0 T nd6_llinfo_timer -ffffffff815559e0 T nd6_free +ffffffff815550a0 T nd6_expire +ffffffff81555200 T nd6_timer +ffffffff815552d0 T nd6_slowtimo +ffffffff81555390 T nd6_expire_timer +ffffffff815553c0 T nd6_ifattach +ffffffff81555440 T nd6_ifdetach +ffffffff81555470 T nd6_options +ffffffff81555690 T nd6_llinfo_settimer +ffffffff81555780 T nd6_llinfo_timer +ffffffff815559c0 T nd6_free ffffffff81555b20 T nd6_expire_timer_update ffffffff81555bd0 T nd6_purge ffffffff81555c80 T nd6_lookup ffffffff81555ea0 T nd6_is_addr_neighbor ffffffff81556010 T nd6_invalidate -ffffffff81556080 T nd6_nud_hint -ffffffff81556140 T nd6_rtrequest -ffffffff815566e0 T nd6_need_cache -ffffffff81556730 T nd6_ioctl -ffffffff81556910 T nd6_cache_lladdr -ffffffff81556ca0 T nd6_resolve -ffffffff81557000 T nd6_ns_input -ffffffff815578d0 T nd6_isneighbor -ffffffff81557990 T nd6_dad_ns_input -ffffffff81557a50 T nd6_na_output -ffffffff81557f00 T nd6_ns_output -ffffffff81558440 T nd6_ifptomac -ffffffff815584b0 T nd6_na_input -ffffffff81558d70 T nd6_dad_find -ffffffff81558dd0 T nd6_dad_duplicated -ffffffff81558f40 T nd6_dad_destroy -ffffffff81558fd0 T nd6_dad_starttimer -ffffffff81559010 T nd6_dad_timer -ffffffff81559340 T nd6_dad_stoptimer -ffffffff81559360 T nd6_dad_start -ffffffff815595d0 T nd6_dad_ns_output -ffffffff81559630 T nd6_dad_stop -ffffffff8155a000 T nd6_rtr_cache -ffffffff8155a450 T rt6_flush -ffffffff8155a600 T rt6_deleteroute -ffffffff8155b000 T rip6_attach -ffffffff8155b180 T rip6_detach -ffffffff8155b230 T rip6_lock -ffffffff8155b290 T rip6_unlock -ffffffff8155b2f0 T rip6_bind -ffffffff8155b390 T rip6_connect -ffffffff8155b450 T rip6_disconnect -ffffffff8155b4c0 T rip6_shutdown -ffffffff8155b500 T rip6_send -ffffffff8155b620 T rip6_init -ffffffff8155b670 T rip6_input -ffffffff8155bcc0 T rip6_ctlinput -ffffffff8155be20 T rip6_output -ffffffff8155c1f0 T rip6_ctloutput -ffffffff8155c2a0 T rip6_sysctl_rip6stat -ffffffff8155c320 T rip6_sysctl -ffffffff8155d000 T udp6_output -ffffffff8155e000 T pfdatatopacket -ffffffff8155e060 T pfkeyv2_attach -ffffffff8155e1f0 T pfkeyv2_detach -ffffffff8155e380 T pfkeyv2_disconnect -ffffffff8155e3c0 T pfkeyv2_shutdown -ffffffff8155e400 T pfkeyv2_send -ffffffff8155e490 T pfkeyv2_sockaddr -ffffffff8155e4c0 T pfkeyv2_peeraddr -ffffffff8155e510 T pfkeyv2_sysctl -ffffffff8155e690 T pfkey_init -ffffffff8155e790 T keycb_ref -ffffffff8155e7b0 T keycb_unref -ffffffff8155e7d0 T pfkeyv2_output -ffffffff8155e890 T pfkeyv2_dosend -ffffffff815607e0 T pfkey_sendup -ffffffff815608a0 T pfkeyv2_sendmessage -ffffffff81560f00 T pfkeyv2_policy -ffffffff81561180 T pfkeyv2_get -ffffffff81561710 T pfkeyv2_dump_walker -ffffffff81561820 T pfkeyv2_sa_flush -ffffffff81561870 T pfkeyv2_get_proto_alg -ffffffff81561940 T pfkeyv2_policy_flush -ffffffff81561980 T pfkeyv2_acquire -ffffffff81561f00 T pfkeyv2_expire -ffffffff81562180 T pfkeyv2_sysctl_walker -ffffffff81562380 T pfkeyv2_dump_policy -ffffffff81562540 T pfkeyv2_sysctl_policydumper -ffffffff81563000 T pfkeyv2_parsemessage -ffffffff81564000 T import_sa -ffffffff81564110 T export_sa -ffffffff81564230 T import_lifetime -ffffffff81564440 T export_lifetime -ffffffff815645e0 T import_flow -ffffffff815648f0 T export_flow -ffffffff81564b80 T import_address -ffffffff81564c00 T export_address -ffffffff81564c80 T import_identities -ffffffff81564d90 t import_identity -ffffffff81564e60 T export_identities -ffffffff81564f70 T import_key -ffffffff81564fd0 T export_key -ffffffff815650b0 T import_udpencap -ffffffff815650f0 T export_udpencap -ffffffff81565140 T export_replay -ffffffff81565180 T export_mtu -ffffffff815651c0 T import_rdomain -ffffffff81565200 T export_rdomain -ffffffff81565250 T import_tag -ffffffff815652a0 T export_tag -ffffffff81565330 T import_tap -ffffffff81565370 T export_tap -ffffffff815653b0 T export_satype -ffffffff815653f0 T export_counter -ffffffff81566000 T x86emu_exec -ffffffff815660c0 t x86emu_exec_one_byte -ffffffff815723e0 T x86emu_exec_call -ffffffff81572470 T x86emu_exec_intr -ffffffff81572560 T x86emu_halt_sys -ffffffff81572580 t x86emu_intr_dispatch -ffffffff815726b0 t common_binop_byte_rm_r -ffffffff81572850 t add_byte -ffffffff81572930 t common_binop_word_long_rm_r -ffffffff81572c20 t add_word -ffffffff81572cf0 t add_long -ffffffff81572de0 t common_binop_word_long_r_rm -ffffffff81573060 t or_byte -ffffffff815730e0 t or_word -ffffffff81573160 t or_long -ffffffff815731e0 t x86emu_exec_two_byte -ffffffff815755e0 t adc_byte -ffffffff815756c0 t adc_word -ffffffff815757b0 t adc_long -ffffffff815758d0 t sbb_byte -ffffffff815759a0 t sbb_word -ffffffff81575a60 t sbb_long -ffffffff81575b20 t and_byte -ffffffff81575ba0 t and_word -ffffffff81575c20 t and_long -ffffffff81575ca0 t sub_byte -ffffffff81575d60 t sub_word -ffffffff81575e10 t sub_long -ffffffff81575ec0 t xor_byte -ffffffff81575f50 t xor_word -ffffffff81575fe0 t xor_long -ffffffff81576070 t common_binop_ns_word_long_rm_r -ffffffff815762e0 t cmp_word_no_return -ffffffff81576390 t cmp_long_no_return -ffffffff81576440 t common_imul_imm -ffffffff815767b0 t ins -ffffffff81576a40 t outs -ffffffff81576cd0 t test_word -ffffffff81576d50 t test_long -ffffffff81576dd0 t decode_rl_address -ffffffff815771a0 t fetch_data_byte -ffffffff81577250 t store_data_byte -ffffffff81577300 t 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pci_probe_device +ffffffff816abcd0 T pci_get_ht_capability +ffffffff816abdc0 T pci_alloc_msix_table +ffffffff816abe40 T pci_free_msix_table +ffffffff816abec0 T pci_get_ext_capability +ffffffff816abfa0 T pci_requester_id +ffffffff816ac000 T pci_find_device +ffffffff816ac0a0 T pci_vpd_read +ffffffff816ac210 T pci_vpd_write +ffffffff816ac3a0 T pci_matchbyid +ffffffff816ac410 T pci_disable_legacy_vga +ffffffff816ac480 T pciopen +ffffffff816ac4f0 T pciclose +ffffffff816ac530 T pciioctl +ffffffff816ace40 T pci_disable_vga +ffffffff816ace80 T pci_unroute_vga +ffffffff816acf10 T pci_route_vga +ffffffff816acfa0 T pci_enable_vga +ffffffff816acfe0 T pci_intr_msix_count +ffffffff816ae000 T obsd_pci_io_find +ffffffff816ae180 T obsd_pci_mem_find +ffffffff816ae3f0 T pci_mapreg_type +ffffffff816ae470 T pci_mapreg_probe +ffffffff816ae5a0 T pci_mapreg_info +ffffffff816ae600 T pci_mapreg_assign +ffffffff816ae7f0 T pci_mapreg_map +ffffffff816af000 T pci_lookup_quirkdata +ffffffff816b0000 T pci_findvendor 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ahci_ati_sb600_attach +ffffffff816c4520 T ahci_ati_sb700_attach +ffffffff816c4560 T ahci_amd_hudson2_attach +ffffffff816c45a0 T ahci_intel_attach +ffffffff816c45d0 T ahci_samsung_attach +ffffffff816c4600 T ahci_map_regs +ffffffff816c46a0 T ahci_map_intr +ffffffff816c4730 T ahci_unmap_regs +ffffffff816c4780 T ahci_unmap_intr +ffffffff816c5000 T nvme_pci_match +ffffffff816c5060 T nvme_pci_attach +ffffffff816c5240 T nvme_pci_detach +ffffffff816c5270 T nvme_pci_activate +ffffffff816c6000 T ami_pci_match +ffffffff816c6100 T ami_pci_attach +ffffffff816c6810 T ami_pci_find_device +ffffffff816c7000 T mfi_pci_match +ffffffff816c7080 T mfi_pci_attach +ffffffff816c7320 T mfi_pci_find_device +ffffffff816c8000 T mfii_match +ffffffff816c8070 T mfii_attach +ffffffff816c8bb0 T mfii_detach +ffffffff816c8e80 T mfii_activate +ffffffff816c8f20 T mfii_scsi_cmd +ffffffff816c9210 T mfii_scsi_ioctl +ffffffff816c9270 T mfii_pd_scsi_cmd +ffffffff816c94f0 T mfii_pd_scsi_probe +ffffffff816c96a0 T mfii_find_iop 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+ffffffff81708b80 T gdt_pcinew_test_busy +ffffffff81708bb0 T gdt_mpr_copy_cmd +ffffffff81708c90 T gdt_mpr_get_status +ffffffff81708cb0 T gdt_mpr_intr +ffffffff81708db0 T gdt_mpr_release_event +ffffffff81708df0 T gdt_mpr_set_sema0 +ffffffff81708e20 T gdt_mpr_test_busy +ffffffff81708e70 T gdt_pci_enable_intr +ffffffff81709000 T ciss_pci_match +ffffffff81709030 T ciss_pci_attach +ffffffff817093e0 T ciss_activate +ffffffff8170a000 T qlw_pci_match +ffffffff8170a080 T qlw_pci_attach +ffffffff8170a4d0 T qlw_pci_detach +ffffffff8170b000 T qla_pci_match +ffffffff8170b050 T qla_pci_attach +ffffffff8170b3d0 T qla_pci_detach +ffffffff8170c000 T qle_match +ffffffff8170c030 T qle_attach +ffffffff8170cb70 T qle_detach +ffffffff8170cbe0 T qle_scsi_cmd +ffffffff8170d0b0 T qle_scsi_probe +ffffffff8170d140 T qle_intr +ffffffff8170d210 T qle_read_mbox +ffffffff8170d260 T qle_host_cmd +ffffffff8170d2b0 T qle_softreset +ffffffff8170d620 T qle_read_nvram +ffffffff8170d7a0 T qle_load_firmware_chunks +ffffffff8170d8a0 T qle_mbox +ffffffff8170db30 T qle_alloc_ccbs +ffffffff8170e130 T qle_dmamem_alloc +ffffffff8170e2a0 T qle_mbox_putaddr +ffffffff8170e300 T qle_do_update +ffffffff8170ecd0 T qle_deferred_update +ffffffff8170ed00 T qle_read_isr +ffffffff8170ede0 T qle_handle_intr +ffffffff8170ef60 T qle_dmamem_free +ffffffff8170efe0 T qle_free_ccbs +ffffffff8170f1d0 T qle_classify_port +ffffffff8170f2c0 T qle_get_loop_id +ffffffff8170f330 T qle_get_port_db +ffffffff8170f410 T qle_get_port_name_list +ffffffff8170f670 T qle_add_loop_port +ffffffff8170f8f0 T qle_add_fabric_port +ffffffff8170fab0 T qle_add_logged_in_port +ffffffff8170fd00 T qle_handle_resp +ffffffff817100c0 T qle_dump_iocb +ffffffff817100f0 T qle_async +ffffffff81710310 T qle_read +ffffffff81710360 T qle_write +ffffffff817103b0 T qle_clear_isr +ffffffff81710400 T qle_put_marker +ffffffff81710440 T qle_put_cmd +ffffffff817107a0 T qle_write_mbox +ffffffff817107f0 T qle_set_ints +ffffffff81710850 T qle_update_done +ffffffff81710880 T qle_update_cancel +ffffffff817108c0 T qle_update_start +ffffffff81710910 T qle_update_defer +ffffffff81710960 T qle_clear_port_lists +ffffffff81710ac0 T qle_update_topology +ffffffff81710bb0 T qle_update_fabric +ffffffff81710cc0 T qle_ct_pass_through +ffffffff81710fb0 T qle_sge +ffffffff81710ff0 T qle_next_fabric_port +ffffffff81711160 T qle_fabric_plogx +ffffffff817113f0 T qle_fabric_plogi +ffffffff81711560 T qle_fabric_plogo +ffffffff817115a0 T qle_dump_stuff +ffffffff817115d0 T qle_dump_iocb_segs +ffffffff81711600 T qle_load_fwchunk +ffffffff81711870 T qle_verify_firmware +ffffffff81711970 T qle_read_ram_word +ffffffff817119e0 T qle_put_ccb +ffffffff81711a50 T qle_get_ccb +ffffffff81712000 T mpi_pci_match +ffffffff81712030 T mpi_pci_attach +ffffffff81712350 T mpi_pci_detach +ffffffff81713000 T mpii_match +ffffffff81713030 T mpii_attach +ffffffff81713b70 T mpii_detach +ffffffff81713bf0 T mpii_scsi_cmd +ffffffff81713ec0 T mpii_scsi_probe +ffffffff817140c0 T mpii_scsi_ioctl +ffffffff81714140 T mpii_write +ffffffff81714190 T mpii_iocfacts +ffffffff81714460 T mpii_init +ffffffff81714700 T mpii_alloc_ccbs +ffffffff81714b30 T mpii_alloc_replies +ffffffff81714bf0 T mpii_alloc_queues +ffffffff81714d50 T mpii_iocinit +ffffffff81714ed0 T mpii_wait_eq +ffffffff81714f80 T mpii_read +ffffffff81714fb0 T mpii_push_replies +ffffffff81715110 T mpii_init_queues +ffffffff81715190 T mpii_board_info +ffffffff81715390 T mpii_portfacts +ffffffff817154c0 T mpii_target_map +ffffffff817155b0 T mpii_cfg_coalescing +ffffffff81715680 T mpii_eventnotify +ffffffff81715850 T mpii_portenable +ffffffff81715940 T mpii_intr +ffffffff81715c70 T mpii_ioctl +ffffffff81715d80 T mpii_create_sensors +ffffffff81715f10 T mpii_dmamem_free +ffffffff81715fa0 T mpii_get_ccb +ffffffff81716030 T mpii_reply +ffffffff81716100 T mpii_event_process +ffffffff817163f0 T mpii_load_xs_sas3 +ffffffff817165a0 T mpii_load_xs +ffffffff817167a0 T mpii_req_cfg_header +ffffffff81716960 T mpii_req_cfg_page +ffffffff81716b90 T mpii_wait_ne +ffffffff81716c40 T mpii_reset_soft +ffffffff81716d70 T mpii_reset_hard +ffffffff81716fa0 T mpii_handshake_send +ffffffff81717200 T mpii_handshake_recv_dword +ffffffff81717370 T mpii_handshake_recv +ffffffff81717540 T mpii_empty_done +ffffffff81717570 T mpii_push_reply +ffffffff817175f0 T mpii_poll +ffffffff81717770 T mpii_eventack +ffffffff81717960 T mpii_eventack_done +ffffffff817179e0 T mpii_start +ffffffff81717ab0 T mpii_event_sas +ffffffff81717ee0 T mpii_eventnotify_done +ffffffff81717f20 T mpii_event_raid +ffffffff81718250 T mpii_find_dev +ffffffff817182b0 T mpii_insert_dev +ffffffff81718330 T mpii_remove_dev +ffffffff817183b0 T mpii_event_discovery +ffffffff81718410 T mpii_sas_remove_device +ffffffff817185d0 T mpii_event_done +ffffffff81718690 T mpii_wait +ffffffff81718810 T mpii_dmamem_alloc +ffffffff817189b0 T mpii_scsi_cmd_tmo_handler +ffffffff81718b10 T mpii_put_ccb +ffffffff81718bb0 T mpii_poll_done +ffffffff81718be0 T mpii_wait_done +ffffffff81718c20 T mpii_scsi_cmd_done +ffffffff81718e80 T mpii_scsi_cmd_tmo +ffffffff81718f30 T mpii_scsi_cmd_tmo_done +ffffffff81718f50 T mpii_ioctl_cache +ffffffff817191f0 T mpii_ioctl_inq +ffffffff817192a0 T mpii_ioctl_vol +ffffffff81719520 T mpii_ioctl_disk +ffffffff81719700 T mpii_find_vol +ffffffff81719750 T mpii_bio_hs +ffffffff81719940 T mpii_bio_disk +ffffffff81719b90 T mpii_bio_volstate +ffffffff81719d30 T mpii_refresh_sensors +ffffffff8171a000 T sili_pci_match +ffffffff8171a0b0 T sili_pci_attach +ffffffff8171a3c0 T sili_pci_detach +ffffffff8171a470 T sili_pci_activate +ffffffff8171a4b0 T sili_lookup +ffffffff8171b000 T aq_fw1x_reset +ffffffff8171b050 T aq1_get_mac_addr +ffffffff8171b130 T aq_fw1x_set_mode +ffffffff8171b160 T aq_fw1x_get_mode +ffffffff8171b190 T aq_fw1x_get_stats +ffffffff8171b1c0 T aq_fw2x_reset +ffffffff8171b250 T aq_fw2x_set_mode +ffffffff8171b3f0 T aq_fw2x_get_mode +ffffffff8171b580 T aq_fw2x_get_stats +ffffffff8171b5b0 T aq2_fw_reset +ffffffff8171b740 T aq2_get_mac_addr +ffffffff8171b7f0 T aq2_fw_set_mode +ffffffff8171ba10 T aq2_fw_get_mode +ffffffff8171bae0 T aq2_fw_get_stats +ffffffff8171bb10 T aq_match +ffffffff8171bb40 T aq_attach +ffffffff8171c7b0 T aq_activate +ffffffff8171c7e0 T aq_lookup +ffffffff8171c860 T aq_intr +ffffffff8171c9f0 T aq_intr_link +ffffffff8171caf0 T aq1_fw_reboot +ffffffff8171cd40 T aq2_fw_reboot +ffffffff8171d250 T aq_hw_reset +ffffffff8171d3b0 T aq_init_rss +ffffffff8171d720 T aq_hw_init +ffffffff8171da30 T aq_ifmedia_change +ffffffff8171db10 T aq_ifmedia_status +ffffffff8171dc10 T aq_ioctl +ffffffff8171de50 T aq_start +ffffffff8171e190 T aq_watchdog +ffffffff8171e1c0 T aq_set_linkmode +ffffffff8171e1f0 T aq_refill +ffffffff8171e260 T aq_intr_queue +ffffffff8171e340 T aq_enable_intr +ffffffff8171e450 T aq1_fw_read_version +ffffffff8171e4f0 T aq1_mac_soft_reset +ffffffff8171e520 T aq1_fw_version_init +ffffffff8171e6a0 T aq1_hw_init_ucp +ffffffff8171e830 T aq1_mac_soft_reset_rbl +ffffffff8171ead0 T aq1_global_software_reset +ffffffff8171ebf0 T aq1_mac_soft_reset_flb +ffffffff8171efb0 T aq2_interface_buffer_read +ffffffff8171f0f0 T aq1_fw_downld_dwords +ffffffff8171f410 T aq_hw_l3_filter_set +ffffffff8171f620 T aq_hw_init_tx_path +ffffffff8171f890 T aq_hw_init_rx_path +ffffffff81720090 T aq_set_mac_addr +ffffffff817202b0 T aq_hw_qos_set +ffffffff817208d0 T aq2_filter_art_set +ffffffff81720a80 T aq_get_linkmode +ffffffff81720af0 T aq_txring_reset +ffffffff81720ea0 T aq_rxring_reset +ffffffff817213b0 T aq_rx_fill +ffffffff817215b0 T aq_rxeof +ffffffff81721930 T aq_txeof +ffffffff81721b00 T aq_update_link_status +ffffffff81721ba0 T aq_free_slots +ffffffff81721c50 T aq_queue_up +ffffffff817220c0 T aq_dmamem_alloc +ffffffff81722210 T aq_dmamem_free +ffffffff81722280 T aq_queue_down +ffffffff81722560 T aq_invalidate_rx_desc_cache +ffffffff817225e0 T aq_up +ffffffff81722a20 T aq_down +ffffffff81722b70 T aq_rxrinfo +ffffffff81722c60 T aq_iff +ffffffff81723000 T tulip_probe +ffffffff81723060 T tulip_attach +ffffffff81723ab0 T tulip_timeout_callback +ffffffff81723b00 T tulip_timeout +ffffffff81723b70 T tulip_txprobe +ffffffff81723cb0 T tulip_txput +ffffffff81724230 T tulip_media_set +ffffffff81724820 T tulip_reset +ffffffff81724be0 T tulip_mii_autonegotiate +ffffffff81724ee0 T tulip_mii_readreg +ffffffff81725090 T tulip_mii_writereg +ffffffff81725250 T tulip_linkup +ffffffff81725320 T tulip_init +ffffffff817254a0 T tulip_media_print +ffffffff817254f0 T tulip_media_link_monitor +ffffffff81725760 T tulip_mii_map_abilities +ffffffff817257f0 T tulip_media_poll +ffffffff81725ce0 T tulip_mii_phy_readspecific +ffffffff81725ea0 T tulip_media_select +ffffffff81725fb0 T tulip_21040_mediainfo_init +ffffffff817260b0 T tulip_21040_media_probe +ffffffff817261a0 T tulip_21040_10baset_only_media_probe +ffffffff81726260 T tulip_21040_10baset_only_media_select +ffffffff817262c0 T tulip_21040_auibnc_only_media_probe +ffffffff81726350 T tulip_21040_auibnc_only_media_select +ffffffff817263a0 T tulip_21041_mediainfo_init +ffffffff81726460 T tulip_21041_media_probe +ffffffff81726540 T tulip_21041_media_poll +ffffffff81726850 T tulip_mii_get_phyaddr +ffffffff81726910 T tulip_2114x_media_preset +ffffffff81726b30 T tulip_null_media_poll +ffffffff81726b60 T tulip_21140_mediainit +ffffffff81726bb0 T tulip_21140_evalboard_media_probe +ffffffff81726d90 T tulip_21140_accton_media_probe +ffffffff81726fb0 T tulip_21140_smc9332_media_probe +ffffffff817271e0 T tulip_21140_cogent_em100_media_probe +ffffffff81727350 T tulip_21140_znyx_zx34x_media_probe +ffffffff81727590 T tulip_2114x_media_probe +ffffffff817275c0 T tulip_delay_300ns +ffffffff817276d0 T tulip_srom_idle +ffffffff81728070 T tulip_srom_read +ffffffff81728e10 T tulip_mii_writebits +ffffffff817293a0 T tulip_mii_turnaround +ffffffff81729b70 T tulip_mii_readbits +ffffffff81729f50 T tulip_identify_dec_nic +ffffffff8172a000 T tulip_identify_znyx_nic +ffffffff8172a2d0 T tulip_identify_smc_nic +ffffffff8172a4b0 T tulip_identify_cogent_nic +ffffffff8172a5a0 T tulip_identify_accton_nic +ffffffff8172a6d0 T tulip_identify_asante_nic +ffffffff8172a9a0 T tulip_identify_compex_nic +ffffffff8172aaf0 T tulip_srom_decode +ffffffff8172b740 T tulip_read_macaddr +ffffffff8172c100 T tulip_ifmedia_add +ffffffff8172c1f0 T tulip_ifmedia_change +ffffffff8172c3d0 T tulip_ifmedia_status +ffffffff8172c440 T tulip_alloc_rxmap +ffffffff8172c480 T tulip_free_rxmap +ffffffff8172c4c0 T tulip_alloc_txmap +ffffffff8172c500 T tulip_free_txmap +ffffffff8172c540 T tulip_addr_filter +ffffffff8172c850 T tulip_rx_intr +ffffffff8172ce60 T tulip_txput_setup +ffffffff8172d0f0 T tulip_tx_intr +ffffffff8172d510 T tulip_print_abnormal_interrupt +ffffffff8172d540 T tulip_intr_handler +ffffffff8172d8f0 T tulip_ifstart +ffffffff8172d9c0 T tulip_intr_shared +ffffffff8172da30 T tulip_intr_normal +ffffffff8172da80 T tulip_ifioctl +ffffffff8172db70 T tulip_ifwatchdog +ffffffff8172dc70 T tulip_busdma_allocmem +ffffffff8172de00 T tulip_busdma_init +ffffffff8172e020 T tulip_initcsrs +ffffffff8172e120 T tulip_initring +ffffffff8172f000 T ep_pci_match +ffffffff8172f030 T ep_pci_attach +ffffffff81730000 T pcn_match +ffffffff81730070 T pcn_attach +ffffffff817307e0 T pcn_tick +ffffffff81730830 T pcn_reset +ffffffff817308a0 T pcn_intr +ffffffff81730ae0 T pcn_ioctl +ffffffff81730c40 T pcn_start +ffffffff81731090 T pcn_watchdog +ffffffff81731100 T pcn_txintr +ffffffff817315c0 T pcn_init +ffffffff81731e80 T pcn_stop +ffffffff81732000 T pcn_rxintr +ffffffff81732520 T pcn_spnd +ffffffff81732620 T pcn_add_rxbuf +ffffffff81732810 T pcn_rxdrain +ffffffff817328b0 T pcn_set_filter +ffffffff81732a10 T pcn_79c970_mediainit +ffffffff81732b20 T pcn_79c970_mediachange +ffffffff81732ce0 T pcn_79c970_mediastatus +ffffffff81732d20 T pcn_79c971_mediainit +ffffffff81732df0 T pcn_mii_readreg +ffffffff81732eb0 T pcn_mii_writereg +ffffffff81732f50 T pcn_mii_statchg +ffffffff81732fb0 T pcn_79c971_mediachange +ffffffff81733000 T pcn_79c971_mediastatus +ffffffff81734000 T siop_lookup_product +ffffffff817340a0 T siop_pci_attach_common +ffffffff81734530 T siop_pci_reset +ffffffff81735000 T siop_pci_match +ffffffff81735050 T siop_pci_attach +ffffffff81736000 T sii3114_read_reg +ffffffff81736060 T sii3114_write_reg +ffffffff817360d0 T pdc203xx_read_reg +ffffffff81736130 T pdc203xx_write_reg +ffffffff817361a0 T svwsata_read_reg +ffffffff81736200 T svwsata_write_reg +ffffffff81736240 T svwsata_lba48_write_reg +ffffffff81736280 T pciide_pci_read +ffffffff817362d0 T pciide_pci_write +ffffffff81736340 T default_chip_map +ffffffff81736990 T artisea_chip_map +ffffffff81736bf0 T piix_chip_map +ffffffff817371e0 T piixsata_chip_map +ffffffff81737700 T sch_chip_map +ffffffff81737a20 T amd756_chip_map +ffffffff81737e30 T ixp_chip_map +ffffffff817381a0 T cmd_chip_map +ffffffff81738300 T cmd0643_9_chip_map +ffffffff81738600 T cmd680_chip_map +ffffffff817387e0 T sii3112_chip_map +ffffffff81738b60 T sii3114_chip_map +ffffffff81738f60 T apollo_chip_map +ffffffff817395c0 T sata_chip_map +ffffffff817397e0 T cy693_chip_map +ffffffff81739ba0 T sis_chip_map +ffffffff8173a2e0 T natsemi_chip_map +ffffffff8173a740 T ns_scx200_chip_map +ffffffff8173aad0 T acer_chip_map +ffffffff8173b150 T hpt_chip_map +ffffffff8173b630 T pdc202xx_chip_map +ffffffff8173bff0 T pdcsata_chip_map +ffffffff8173c770 T acard_chip_map +ffffffff8173c9e0 T serverworks_chip_map +ffffffff8173ccf0 T svwsata_chip_map +ffffffff8173d0d0 T nforce_chip_map +ffffffff8173d4f0 T ite_chip_map +ffffffff8173d7b0 T jmicron_chip_map +ffffffff8173dbc0 T phison_chip_map +ffffffff8173dee0 T rdc_chip_map +ffffffff8173e330 T pciide_match +ffffffff8173e3d0 T pciide_attach +ffffffff8173e4b0 T pciide_detach +ffffffff8173e510 T pciide_activate +ffffffff8173ec40 T pciide_lookup_product +ffffffff8173eea0 T pciide_dmacmd_read +ffffffff8173eed0 T pciide_dmacmd_write +ffffffff8173ef00 T pciide_dmactl_read +ffffffff8173ef30 T pciide_dmactl_write +ffffffff8173ef60 T pciide_dmatbl_write +ffffffff8173ef90 T pciide_mapregs_compat +ffffffff8173f110 T pciide_unmapregs_compat +ffffffff8173f1a0 T pciide_mapregs_native +ffffffff8173f490 T pciide_unmapregs_native +ffffffff8173f520 T pciide_mapreg_dma +ffffffff8173f6b0 T pciide_dma_init +ffffffff8173f980 T pciide_dma_start +ffffffff8173fa00 T pciide_dma_finish +ffffffff8173fbd0 T pciide_unmapreg_dma +ffffffff8173fc00 T pciide_intr_flag +ffffffff8173fe10 T pciide_compat_intr +ffffffff8173fe90 T pciide_pci_intr +ffffffff8173ff50 T pciide_channel_dma_setup +ffffffff81740020 T pciide_dma_table_setup +ffffffff81740260 T pciide_irqack +ffffffff817402b0 T pciide_chansetup +ffffffff81740390 T pciide_chanfree +ffffffff817403e0 T pciide_mapchan +ffffffff81740470 T pciide_unmap_chan +ffffffff81740540 T pciide_chan_candisable +ffffffff817405b0 T pciide_map_compat_intr +ffffffff81740650 T pciide_unmap_compat_intr +ffffffff817406b0 T pciide_print_channels +ffffffff81740780 T pciide_print_modes +ffffffff81740790 T default_chip_unmap +ffffffff81740870 T sata_setup_channel +ffffffff81740990 T piix_timing_debug +ffffffff817409c0 T piix_setup_channel +ffffffff81740e50 T piix3_4_setup_channel +ffffffff817415f0 T piix_setup_idetim_timings +ffffffff81741660 T piix_setup_idetim_drvs +ffffffff81741780 T piix_setup_sidetim_timings +ffffffff817417f0 T amd756_setup_channel +ffffffff81741ba0 T apollo_setup_channel +ffffffff81741f20 T cmd_channel_map +ffffffff81742290 T cmd_pci_intr +ffffffff81742390 T cmd646_9_irqack +ffffffff81742490 T cmd0643_9_setup_channel +ffffffff817428b0 T cmd680_setup_channel +ffffffff81742db0 T cmd680_channel_map +ffffffff817430e0 T sii_fixup_cacheline +ffffffff817433b0 T sii3112_setup_channel +ffffffff81743570 T sii3112_drv_probe +ffffffff81743990 T sii3114_mapreg_dma +ffffffff81743c70 T sii3114_chansetup +ffffffff81743d40 T sii3114_mapchan +ffffffff81744060 T sii3114_dmacmd_read +ffffffff817440a0 T sii3114_dmacmd_write +ffffffff817440e0 T sii3114_dmactl_read +ffffffff81744120 T sii3114_dmactl_write +ffffffff81744160 T sii3114_dmatbl_write +ffffffff817441a0 T cy693_setup_channel +ffffffff817443c0 T sis_hostbr_match +ffffffff81744490 T sis_south_match +ffffffff817444d0 T sis_setup_channel +ffffffff81744810 T sis96x_setup_channel +ffffffff81744af0 T natsemi_irqack +ffffffff81744b90 T natsemi_setup_channel +ffffffff81744f80 T natsemi_pci_intr +ffffffff81745080 T ns_scx200_setup_channel +ffffffff81745380 T acer_dma_init +ffffffff817453c0 T acer_setup_channel +ffffffff817457c0 T acer_pci_intr +ffffffff817458b0 T hpt_setup_channel +ffffffff81745c00 T hpt_pci_intr +ffffffff81745d10 T pdc268_config_read +ffffffff81745d80 T pdc20268_setup_channel +ffffffff81745f50 T pdc202xx_setup_channel +ffffffff817463a0 T pdc20262_dma_start +ffffffff81746510 T pdc20262_dma_finish +ffffffff817465e0 T pdc20265_pci_intr +ffffffff81746790 T pdc202xx_pci_intr +ffffffff817468a0 T pdc203xx_pci_intr +ffffffff81746990 T pdc205xx_pci_intr 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vr_miibus_statchg +ffffffff8174fcc0 T vr_setcfg +ffffffff8174fee0 T vr_iff +ffffffff81750060 T vr_reset +ffffffff81750170 T vr_quirks +ffffffff81750270 T vr_dmamem_alloc +ffffffff817503d0 T vr_dmamem_free +ffffffff81750440 T vr_intr +ffffffff81750670 T vr_chipinit +ffffffff81750750 T vr_ioctl +ffffffff817508f0 T vr_start +ffffffff81750ac0 T vr_watchdog +ffffffff81750b50 T vr_wol +ffffffff81750d00 T vr_ifmedia_upd +ffffffff81750d50 T vr_ifmedia_sts +ffffffff81750db0 T vr_tick +ffffffff81750e30 T vr_rxtick +ffffffff81750f10 T vr_stop +ffffffff817511a0 T vr_init +ffffffff81751740 T vr_list_tx_init +ffffffff81751840 T vr_list_rx_init +ffffffff81751a00 T vr_fill_rx_ring +ffffffff81751ad0 T vr_alloc_mbuf +ffffffff81751c40 T vr_rxeof +ffffffff81751ec0 T vr_rxeoc +ffffffff81752050 T vr_txeof +ffffffff81752210 T vr_encap +ffffffff81753000 T txp_probe +ffffffff81753030 T txp_attach +ffffffff817531a0 T txp_attachhook +ffffffff817534c0 T txp_chip_init +ffffffff81753680 T txp_download_fw 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em_initialize_receive_unit +ffffffff8176c670 T em_enable_intr +ffffffff8176c7d0 T em_watchdog +ffffffff8176c980 T em_enable_hw_vlans +ffffffff8176ca20 T em_setup_transmit_structures +ffffffff8176cc20 T em_initialize_transmit_unit +ffffffff8176d240 T em_setup_receive_structures +ffffffff8176d380 T em_setup_queues_msix +ffffffff8176da40 T em_intr +ffffffff8176db40 T em_txeof +ffffffff8176dd10 T em_rxeof +ffffffff8176e1d0 T em_rxrefill +ffffffff8176e2e0 T em_media_status +ffffffff8176e520 T em_flowstatus +ffffffff8176e630 T em_media_change +ffffffff8176e790 T em_tx_ctx_setup +ffffffff8176e920 T em_transmit_checksum_setup +ffffffff8176ea00 T em_fill_descriptors +ffffffff8176ea80 T em_82547_fifo_workaround +ffffffff8176eaf0 T em_82547_tx_fifo_reset +ffffffff8176ef60 T em_pci_clear_mwi +ffffffff8176ef90 T em_pci_set_mwi +ffffffff8176efc0 T em_smartspeed +ffffffff8176f1c0 T em_kstat_read +ffffffff8176f5e0 T em_flush_desc_rings +ffffffff8176f710 T em_free_transmit_structures +ffffffff8176f8e0 T em_free_receive_structures +ffffffff8176faf0 T em_legacy_irq_quirk_spt +ffffffff8176fbd0 T em_allocate_msix +ffffffff8176fde0 T em_allocate_legacy +ffffffff8176ff00 T em_dma_free +ffffffff8176ff70 T em_disable_aspm +ffffffff81770040 T em_dma_malloc +ffffffff817701d0 T em_allocate_transmit_structures +ffffffff817702c0 T em_get_buf +ffffffff81770420 T em_allocate_receive_structures +ffffffff817705f0 T em_rxfill +ffffffff81770740 T em_tbi_adjust_stats +ffffffff81770910 T em_receive_checksum +ffffffff81770980 T em_write_pci_cfg +ffffffff81770a00 T em_read_pci_cfg +ffffffff81770a70 T em_read_pcie_cap_reg +ffffffff81770aa0 T em_flush_tx_ring +ffffffff81770c10 T em_flush_rx_ring +ffffffff81770dd0 T em_queue_intr_msix +ffffffff81770e80 T em_link_intr_msix +ffffffff81770fb0 T em_enable_queue_intr_msix +ffffffff81772000 T em_set_mac_type +ffffffff81772a00 T em_set_sfp_media_type_82575 +ffffffff81772d50 T em_translate_82542_register +ffffffff81772f80 T em_read_sfp_data_byte +ffffffff81773070 T em_set_media_type +ffffffff817732e0 T em_reset_hw +ffffffff81773eb0 T em_disable_pciex_master +ffffffff81773f80 T em_check_phy_reset_block +ffffffff81774040 T em_gate_hw_phy_config_ich8lan +ffffffff817740e0 t em_get_software_flag +ffffffff81774260 T em_hv_phy_workarounds_ich8lan +ffffffff817745f0 T em_lv_phy_workarounds_ich8lan +ffffffff817746f0 t em_phy_init_script +ffffffff81774960 T em_read_eeprom +ffffffff81775040 T em_set_eee_i350 +ffffffff81775160 T em_init_hw +ffffffff81776e00 T em_phy_reset +ffffffff81777040 T em_clear_vfta_i350 +ffffffff81777220 T em_read_phy_reg +ffffffff817773c0 T em_setup_link +ffffffff81779c60 T em_enable_tx_pkt_filtering +ffffffff8177a030 T em_clear_hw_cntrs +ffffffff8177a920 T em_write_phy_reg +ffffffff8177aab0 T em_power_up_serdes_link_82575 +ffffffff8177aba0 T em_copper_link_autoneg +ffffffff8177acd0 T em_phy_setup_autoneg +ffffffff8177ae40 T em_copper_link_postconfig +ffffffff8177af10 T em_config_collision_dist +ffffffff8177afa0 t em_config_mac_to_phy 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em_read_ich8_data32 +ffffffff81781b40 t em_ich8_cycle_init +ffffffff81781cf0 t em_ich8_flash_cycle +ffffffff81781e60 T em_configure_k1_ich8lan +ffffffff81782070 t em_get_hw_eeprom_semaphore +ffffffff817821e0 t em_shift_out_mdi_bits +ffffffff81782360 t em_erase_ich8_4k_segment +ffffffff817825a0 t em_write_ich8_byte +ffffffff81782710 t em_read_ich8_data +ffffffff81783000 T em_lookup_gcu +ffffffff81783030 T em_attach_miibus +ffffffff81783060 T gcu_miibus_readreg +ffffffff817831d0 T gcu_miibus_writereg +ffffffff81783320 T gcu_miibus_statchg +ffffffff81784000 T ixgb_probe +ffffffff81784030 T ixgb_attach +ffffffff81784450 T ixgb_local_timer +ffffffff817844f0 T ixgb_identify_hardware +ffffffff817845f0 T ixgb_allocate_pci_resources +ffffffff81784780 T ixgb_dma_malloc +ffffffff81784980 T ixgb_hardware_init +ffffffff81784a40 T ixgb_setup_interface +ffffffff81784b70 T ixgb_update_stats_counters +ffffffff81785470 T ixgb_update_link_status +ffffffff817854f0 T ixgb_dma_free +ffffffff817855a0 T ixgb_free_pci_resources +ffffffff81785630 T ixgb_start +ffffffff81785820 T ixgb_encap +ffffffff81785a10 T ixgb_ioctl +ffffffff81785cb0 T ixgb_init +ffffffff81786150 T ixgb_set_promisc +ffffffff817861d0 T ixgb_stop +ffffffff81786250 T ixgb_disable_intr +ffffffff81786280 T ixgb_set_multi +ffffffff81786390 T ixgb_enable_intr +ffffffff817863e0 T ixgb_watchdog +ffffffff81786470 T ixgb_enable_hw_vlans +ffffffff817864c0 T ixgb_setup_transmit_structures +ffffffff81786690 T ixgb_initialize_transmit_unit +ffffffff81786800 T ixgb_setup_receive_structures +ffffffff81786880 T ixgb_initialize_receive_unit +ffffffff81786b10 T ixgb_intr +ffffffff81786d10 T ixgb_rxeof +ffffffff81787160 T ixgb_txeof +ffffffff81787350 T ixgb_media_status +ffffffff81787440 T ixgb_media_change +ffffffff81787490 T ixgb_free_transmit_structures +ffffffff817875c0 T ixgb_free_receive_structures +ffffffff817876f0 T ixgb_allocate_transmit_structures +ffffffff81787770 T ixgb_transmit_checksum_setup +ffffffff81787870 T ixgb_get_buf +ffffffff81787a20 T ixgb_allocate_receive_structures +ffffffff81787be0 T ixgb_receive_checksum +ffffffff81787c40 T ixgb_write_pci_cfg +ffffffff81788000 T ixgb_validate_eeprom_checksum +ffffffff81788080 T ixgb_read_eeprom +ffffffff817882f0 T ixgb_update_eeprom_checksum +ffffffff81788360 T ixgb_write_eeprom +ffffffff81788820 t ixgb_shift_out_bits +ffffffff81788960 T ixgb_get_eeprom_data +ffffffff81788a00 T ixgb_get_eeprom_word +ffffffff81788ae0 T ixgb_get_ee_mac_addr +ffffffff81788bd0 T ixgb_get_ee_pba_number +ffffffff81788c90 T ixgb_get_ee_device_id +ffffffff81789000 T ixgb_mac_reset +ffffffff817891e0 T ixgb_adapter_stop +ffffffff81789320 T ixgb_init_hw +ffffffff81789630 T ixgb_init_rx_addrs +ffffffff81789760 T mac_addr_valid +ffffffff817897c0 T ixgb_clear_vfta +ffffffff81789840 T ixgb_clear_hw_cntrs +ffffffff81789f20 T ixgb_setup_fc +ffffffff8178a0b0 T ixgb_check_for_link +ffffffff8178a2c0 T ixgb_rar_set +ffffffff8178a330 T ixgb_mc_addr_list_update +ffffffff8178a5b0 T ixgb_write_vfta +ffffffff8178a5e0 T ixgb_read_phy_reg +ffffffff8178aae0 T ixgb_write_phy_reg +ffffffff8178afd0 T ixgb_check_for_bad_link +ffffffff8178b090 T ixgb_led_on +ffffffff8178b0e0 T ixgb_led_off +ffffffff8178c000 T ixgbe_probe +ffffffff8178c030 T ixgbe_attach +ffffffff8178c5a0 T ixgbe_detach +ffffffff8178c7c0 T ixgbe_activate +ffffffff8178c8d0 T ixgbe_identify_hardware +ffffffff8178c990 T ixgbe_allocate_pci_resources +ffffffff8178cae0 T ixgbe_allocate_queues +ffffffff8178cfe0 T ixgbe_allocate_msix +ffffffff8178d220 T ixgbe_allocate_legacy +ffffffff8178d340 T ixgbe_setup_interface +ffffffff8178d680 T ixgbe_free_transmit_structures +ffffffff8178d700 T ixgbe_free_receive_structures +ffffffff8178d7c0 T ixgbe_free_pci_resources +ffffffff8178d8a0 T ixgbe_stop +ffffffff8178dbc0 T ixgbe_init +ffffffff8178e800 T ixgbe_start +ffffffff8178e9e0 T ixgbe_encap +ffffffff8178ece0 T ixgbe_ioctl +ffffffff8178f040 T ixgbe_rxrinfo +ffffffff8178f1a0 T ixgbe_get_sffpage +ffffffff8178f350 T ixgbe_disable_intr +ffffffff8178f420 T ixgbe_iff +ffffffff8178f590 T ixgbe_enable_intr +ffffffff8178f6a0 T ixgbe_enable_queues +ffffffff8178f7b0 T ixgbe_watchdog +ffffffff8178f9c0 T ixgbe_setup_transmit_structures +ffffffff8178faa0 T ixgbe_initialize_transmit_units +ffffffff8178fd60 T ixgbe_setup_receive_structures +ffffffff8178fe90 T ixgbe_initialize_receive_units +ffffffff81790370 T ixgbe_config_gpie +ffffffff81790440 T ixgbe_setup_vlan_hw_support +ffffffff817905d0 T ixgbe_configure_ivars +ffffffff81790780 T ixgbe_set_ivar +ffffffff81790950 T ixgbe_config_link +ffffffff81790af0 T ixgbe_config_delay_values +ffffffff81790c10 t ix_kstats_tick +ffffffff81790ce0 T ixgbe_enable_queue +ffffffff81790db0 T ixgbe_disable_queue +ffffffff81790e80 T ixgbe_link_intr +ffffffff81790e90 T ixgbe_intr +ffffffff81791360 T ixgbe_queue_intr +ffffffff817914b0 T ixgbe_rxeof +ffffffff81791880 T ixgbe_txeof +ffffffff81791a20 T ixgbe_rxrefill +ffffffff81791ae0 T ixgbe_legacy_intr +ffffffff81791ca0 T ixgbe_update_link_status +ffffffff81791df0 T ixgbe_handle_mod +ffffffff81791f10 T ixgbe_handle_msf +ffffffff81791fe0 T ixgbe_handle_phy +ffffffff81792070 T ixgbe_media_status +ffffffff81792280 T ixgbe_media_change +ffffffff81792330 T ixgbe_mc_array_itr +ffffffff81792370 T ixgbe_setup_msix +ffffffff81792400 T ixgbe_add_media_types +ffffffff817926a0 T ixgbe_dma_malloc +ffffffff81792890 T ixgbe_dma_free +ffffffff81792940 T ixgbe_allocate_transmit_buffers +ffffffff81792ab0 T ixgbe_setup_transmit_ring +ffffffff81792c50 T ixgbe_free_transmit_buffers +ffffffff81792d80 T ixgbe_get_buf +ffffffff81792ec0 T ixgbe_allocate_receive_buffers +ffffffff81793000 T ixgbe_setup_receive_ring +ffffffff817930e0 T ixgbe_rxfill +ffffffff81793210 T ixgbe_initialize_rss_mapping +ffffffff81793480 T ixgbe_map_queue_statistics +ffffffff81793580 T ixgbe_free_receive_buffers +ffffffff817936c0 T ixgbe_rx_checksum +ffffffff81793710 T ixgbe_read_pci_cfg +ffffffff81793770 T ixgbe_write_pci_cfg +ffffffff817937f0 t ix_kstats_read +ffffffff817939b0 t ix_rxq_kstats_read +ffffffff81793b10 t ix_txq_kstats_read +ffffffff81794000 T ixgbe_init_ops_generic +ffffffff81794270 T ixgbe_init_eeprom_params_generic +ffffffff81794320 T ixgbe_read_eerd_generic +ffffffff81794420 T ixgbe_read_eeprom_bit_bang_generic +ffffffff817946c0 T ixgbe_write_eeprom_generic +ffffffff81794b10 T ixgbe_validate_eeprom_checksum_generic +ffffffff81794bc0 T ixgbe_update_eeprom_checksum_generic +ffffffff81794c40 T ixgbe_calc_eeprom_checksum_generic +ffffffff81794de0 T ixgbe_init_hw_generic +ffffffff81794e40 T ixgbe_start_hw_generic +ffffffff81794f60 T ixgbe_clear_hw_cntrs_generic +ffffffff81795940 T ixgbe_enable_rx_dma_generic +ffffffff817959a0 T ixgbe_get_mac_addr_generic +ffffffff81795a30 T ixgbe_stop_adapter_generic +ffffffff81795bb0 T ixgbe_get_bus_info_generic +ffffffff81795c60 T ixgbe_set_lan_id_multi_port_pcie +ffffffff81795d30 T ixgbe_acquire_swfw_sync +ffffffff81795f60 T ixgbe_release_swfw_sync +ffffffff81796010 T prot_autoc_read_generic +ffffffff81796070 T prot_autoc_write_generic +ffffffff817960c0 T ixgbe_led_on_generic +ffffffff81796180 T ixgbe_led_off_generic +ffffffff81796230 T ixgbe_blink_led_start_generic +ffffffff817963a0 T ixgbe_blink_led_stop_generic +ffffffff817964c0 T ixgbe_set_rar_generic +ffffffff817965e0 T ixgbe_clear_rar_generic +ffffffff817966e0 T ixgbe_init_rx_addrs_generic +ffffffff817968e0 T ixgbe_update_mc_addr_list_generic +ffffffff81796ae0 T ixgbe_enable_mc_generic +ffffffff81796b50 T ixgbe_disable_mc_generic +ffffffff81796bb0 T ixgbe_enable_rx_generic +ffffffff81796c70 T ixgbe_disable_rx_generic +ffffffff81796d50 T ixgbe_fc_enable_generic +ffffffff81797180 T ixgbe_setup_fc_generic +ffffffff81797450 T ixgbe_fc_autoneg +ffffffff81797620 T ixgbe_device_supports_autoneg_fc +ffffffff81797720 T ixgbe_start_hw_gen2 +ffffffff81797900 T ixgbe_identify_phy +ffffffff81797960 T ixgbe_set_pci_config_data_generic +ffffffff817979e0 T ixgbe_disable_rx +ffffffff81797a20 T ixgbe_disable_pcie_master +ffffffff81797b70 T ixgbe_read_eerd_buffer_generic +ffffffff81797cb0 T ixgbe_poll_eerd_eewr_done +ffffffff81797d50 T ixgbe_write_eewr_buffer_generic +ffffffff81797ed0 T ixgbe_write_eewr_generic +ffffffff81797f20 T ixgbe_acquire_eeprom +ffffffff817980a0 T ixgbe_get_eeprom_semaphore +ffffffff817982b0 T ixgbe_release_eeprom_semaphore +ffffffff81798320 T ixgbe_ready_eeprom +ffffffff81798490 T ixgbe_shift_out_eeprom_bits +ffffffff81798650 T ixgbe_shift_in_eeprom_bits +ffffffff817987b0 T ixgbe_standby_eeprom +ffffffff81798890 T ixgbe_raise_eeprom_clk +ffffffff81798900 T ixgbe_lower_eeprom_clk +ffffffff81798970 T ixgbe_release_eeprom +ffffffff81798a50 T ixgbe_validate_mac_addr +ffffffff81798ab0 T ixgbe_init_uta_tables +ffffffff81798af0 T ixgbe_add_uc_addr +ffffffff81798b60 T ixgbe_mta_vector +ffffffff81798c10 T ixgbe_set_mta +ffffffff81798cd0 T ixgbe_negotiate_fc +ffffffff81798d80 T ixgbe_fc_autoneg_fiber +ffffffff81798eb0 T ixgbe_fc_autoneg_backplane +ffffffff81799010 T ixgbe_fc_autoneg_copper +ffffffff81799140 T ixgbe_disable_sec_rx_path_generic +ffffffff81799200 T ixgbe_enable_sec_rx_path_generic +ffffffff81799290 T ixgbe_enable_rx +ffffffff817992d0 T ixgbe_get_pcie_msix_count_generic +ffffffff81799350 T ixgbe_insert_mac_addr_generic +ffffffff81799560 T ixgbe_set_vmdq +ffffffff817995a0 T ixgbe_set_rar +ffffffff817995f0 T ixgbe_clear_vmdq +ffffffff81799630 T ixgbe_clear_vmdq_generic +ffffffff817997d0 T ixgbe_set_vmdq_generic +ffffffff81799880 T ixgbe_init_uta_tables_generic +ffffffff81799900 T ixgbe_find_vlvf_slot +ffffffff817999c0 T ixgbe_set_vfta_generic +ffffffff81799ad0 T ixgbe_set_vlvf_generic +ffffffff81799d60 T ixgbe_clear_vfta_generic +ffffffff81799e60 T ixgbe_need_crosstalk_fix +ffffffff81799eb0 T ixgbe_check_mac_link_generic +ffffffff8179a0a0 T ixgbe_get_device_caps_generic +ffffffff8179a0f0 T ixgbe_calculate_checksum +ffffffff8179a1b0 T ixgbe_hic_unlocked +ffffffff8179a390 T ixgbe_host_interface_command +ffffffff8179a560 T ixgbe_clear_tx_pending +ffffffff8179a750 T ixgbe_mng_present +ffffffff8179a7c0 T ixgbe_mng_enabled +ffffffff8179a880 T ixgbe_setup_mac_link_multispeed_fiber +ffffffff8179ac40 T ixgbe_flap_tx_laser +ffffffff8179ac80 T ixgbe_check_link +ffffffff8179acd0 T ixgbe_set_soft_rate_select_speed +ffffffff8179adc0 T ixgbe_init_shared_code +ffffffff8179ae70 T ixgbe_set_mac_type +ffffffff8179b030 T ixgbe_init_hw +ffffffff8179b070 T ixgbe_get_media_type +ffffffff8179b0b0 T ixgbe_read_mbx +ffffffff8179b110 T ixgbe_write_mbx +ffffffff8179b160 T ixgbe_check_for_msg +ffffffff8179b1a0 T ixgbe_check_for_ack +ffffffff8179b1e0 T ixgbe_check_for_rst +ffffffff8179b220 T ixgbe_poll_for_msg +ffffffff8179b2e0 T ixgbe_poll_for_ack +ffffffff8179b3a0 T ixgbe_read_posted_mbx +ffffffff8179b480 T ixgbe_write_posted_mbx +ffffffff8179b550 T ixgbe_init_mbx_ops_generic +ffffffff8179b590 T ixgbe_read_v2p_mailbox +ffffffff8179b600 T ixgbe_check_for_bit_pf +ffffffff8179b690 T ixgbe_check_for_msg_pf +ffffffff8179b740 T ixgbe_check_for_ack_pf +ffffffff8179b7e0 T ixgbe_check_for_rst_pf +ffffffff8179b8e0 T ixgbe_obtain_mbx_lock_pf +ffffffff8179b970 T ixgbe_write_mbx_pf +ffffffff8179bb40 T ixgbe_read_mbx_pf +ffffffff8179bc50 T ixgbe_init_mbx_params_pf +ffffffff8179c000 T ixgbe_set_pcie_completion_timeout +ffffffff8179c090 T ixgbe_init_ops_82598 +ffffffff8179c1e0 T ixgbe_init_phy_ops_82598 +ffffffff8179c2d0 T ixgbe_start_hw_82598 +ffffffff8179c480 T ixgbe_reset_hw_82598 +ffffffff8179c950 T ixgbe_get_media_type_82598 +ffffffff8179ca20 T ixgbe_get_supported_physical_layer_82598 +ffffffff8179cbf0 T ixgbe_read_analog_reg8_82598 +ffffffff8179ccb0 T ixgbe_write_analog_reg8_82598 +ffffffff8179cd30 T ixgbe_set_lan_id_multi_port_pcie_82598 +ffffffff8179cdd0 T ixgbe_enable_rx_dma_82598 +ffffffff8179ce20 T ixgbe_set_vmdq_82598 +ffffffff8179ced0 T ixgbe_clear_vmdq_82598 +ffffffff8179cf80 T ixgbe_set_vfta_82598 +ffffffff8179d0b0 T ixgbe_clear_vfta_82598 +ffffffff8179d260 T ixgbe_fc_enable_82598 +ffffffff8179d6c0 T ixgbe_read_i2c_eeprom_82598 +ffffffff8179d6e0 T ixgbe_check_mac_link_82598 +ffffffff8179d980 T ixgbe_setup_mac_link_82598 +ffffffff8179db40 T ixgbe_get_link_capabilities_82598 +ffffffff8179dc10 T ixgbe_setup_copper_link_82598 +ffffffff8179dd20 T ixgbe_start_mac_link_82598 +ffffffff8179de40 T ixgbe_validate_link_ready +ffffffff8179def0 T ixgbe_read_i2c_phy_82598 +ffffffff8179f000 T ixgbe_init_mac_link_ops_82599 +ffffffff8179f190 T ixgbe_disable_tx_laser_multispeed_fiber +ffffffff8179f260 T ixgbe_enable_tx_laser_multispeed_fiber +ffffffff8179f2e0 T ixgbe_flap_tx_laser_multispeed_fiber +ffffffff8179f420 T ixgbe_setup_mac_link_82599 +ffffffff8179f6b0 T ixgbe_set_hard_rate_select_speed +ffffffff8179f770 T ixgbe_verify_lesm_fw_enabled_82599 +ffffffff8179f830 T ixgbe_setup_mac_link_smartspeed +ffffffff8179fbb0 T ixgbe_init_phy_ops_82599 +ffffffff8179fd00 T ixgbe_read_i2c_byte_82599 +ffffffff8179fe80 T ixgbe_write_i2c_byte_82599 +ffffffff817a0000 T ixgbe_setup_copper_link_82599 +ffffffff817a0060 T ixgbe_setup_sfp_modules_82599 +ffffffff817a0220 T prot_autoc_read_82599 +ffffffff817a0330 T prot_autoc_write_82599 +ffffffff817a04a0 T ixgbe_reset_pipeline_82599 +ffffffff817a07e0 T ixgbe_init_ops_82599 +ffffffff817a09c0 T ixgbe_identify_phy_82599 +ffffffff817a0a50 T ixgbe_reset_hw_82599 +ffffffff817a0fa0 T ixgbe_get_media_type_82599 +ffffffff817a10d0 T ixgbe_get_supported_physical_layer_82599 +ffffffff817a12a0 T ixgbe_enable_rx_dma_82599 +ffffffff817a1310 T ixgbe_read_analog_reg8_82599 +ffffffff817a13d0 T ixgbe_write_analog_reg8_82599 +ffffffff817a1450 T ixgbe_start_hw_82599 +ffffffff817a1550 T ixgbe_get_link_capabilities_82599 +ffffffff817a1690 T ixgbe_stop_mac_link_on_d3_82599 +ffffffff817a1750 T ixgbe_read_eeprom_82599 +ffffffff817a1780 T ixgbe_start_mac_link_82599 +ffffffff817a1960 T ixgbe_verify_fw_version_82599 +ffffffff817a2000 T ixgbe_init_ops_X540 +ffffffff817a2220 T ixgbe_init_eeprom_params_X540 +ffffffff817a22b0 T ixgbe_read_eerd_X540 +ffffffff817a2340 T ixgbe_write_eewr_X540 +ffffffff817a23d0 T ixgbe_update_eeprom_checksum_X540 +ffffffff817a24a0 T ixgbe_validate_eeprom_checksum_X540 +ffffffff817a2590 T ixgbe_calc_eeprom_checksum_X540 +ffffffff817a2730 T ixgbe_reset_hw_X540 +ffffffff817a2ac0 T ixgbe_get_media_type_X540 +ffffffff817a2af0 T ixgbe_get_supported_physical_layer_X540 +ffffffff817a2b70 T ixgbe_start_hw_X540 +ffffffff817a2bc0 T ixgbe_acquire_swfw_sync_X540 +ffffffff817a3010 T ixgbe_release_swfw_sync_X540 +ffffffff817a3140 T ixgbe_init_swfw_sync_X540 +ffffffff817a3220 T ixgbe_setup_mac_link_X540 +ffffffff817a3240 T ixgbe_blink_led_start_X540 +ffffffff817a3360 T ixgbe_blink_led_stop_X540 +ffffffff817a3460 T ixgbe_get_link_capabilities_X540 +ffffffff817a34a0 T ixgbe_update_flash_X540 +ffffffff817a3680 T ixgbe_poll_flash_update_done_X540 +ffffffff817a3710 T ixgbe_get_swfw_sync_semaphore +ffffffff817a38a0 T ixgbe_release_swfw_sync_semaphore +ffffffff817a4000 T ixgbe_init_ops_X550 +ffffffff817a4110 T ixgbe_dmac_config_X550 +ffffffff817a41f0 T ixgbe_dmac_config_tcs_X550 +ffffffff817a4340 T ixgbe_dmac_update_tcs_X550 +ffffffff817a4400 T ixgbe_set_source_address_pruning_X550 +ffffffff817a44f0 T ixgbe_init_eeprom_params_X550 +ffffffff817a4570 T ixgbe_calc_eeprom_checksum_X550 +ffffffff817a4590 T ixgbe_read_ee_hostif_X550 +ffffffff817a4660 T ixgbe_write_ee_hostif_X550 +ffffffff817a4720 T ixgbe_update_eeprom_checksum_X550 +ffffffff817a48b0 T ixgbe_validate_eeprom_checksum_X550 +ffffffff817a4a00 T ixgbe_disable_rx_x550 +ffffffff817a4b20 T ixgbe_led_on_t_X550em +ffffffff817a4be0 T ixgbe_led_off_t_X550em +ffffffff817a4ca0 T ixgbe_read_cs4227 +ffffffff817a4cd0 T ixgbe_write_cs4227 +ffffffff817a4d00 T ixgbe_read_pe +ffffffff817a4d50 T ixgbe_write_pe +ffffffff817a4db0 T ixgbe_reset_cs4227 +ffffffff817a5040 T ixgbe_check_cs4227 +ffffffff817a51f0 T ixgbe_setup_mux_ctl +ffffffff817a5280 T ixgbe_identify_phy_x550em +ffffffff817a54a0 T ixgbe_read_mng_if_sel_x550em +ffffffff817a5520 T ixgbe_fw_phy_activity +ffffffff817a5640 T ixgbe_get_phy_id_fw +ffffffff817a5750 T ixgbe_identify_phy_fw +ffffffff817a57a0 T ixgbe_shutdown_fw_phy +ffffffff817a5800 T ixgbe_read_phy_reg_x550em +ffffffff817a5830 T ixgbe_write_phy_reg_x550em +ffffffff817a5860 T ixgbe_init_ops_X550EM +ffffffff817a5b10 T ixgbe_get_bus_info_X550em +ffffffff817a5b60 T ixgbe_get_media_type_X550em +ffffffff817a5c50 T ixgbe_setup_sfp_modules_X550em +ffffffff817a5de0 T ixgbe_get_link_capabilities_X550em +ffffffff817a5eb0 T ixgbe_reset_hw_X550em +ffffffff817a6530 T ixgbe_get_supported_physical_layer_X550em +ffffffff817a66b0 T ixgbe_setup_fc_X550em +ffffffff817a6810 T ixgbe_init_phy_ops_X550em +ffffffff817a6ce0 T ixgbe_setup_fw_link +ffffffff817a6e10 T ixgbe_fc_autoneg_fw +ffffffff817a6e40 T ixgbe_setup_eee_fw +ffffffff817a6ea0 T ixgbe_init_ops_X550EM_a +ffffffff817a6fd0 T ixgbe_read_iosf_sb_reg_x550 +ffffffff817a7150 T ixgbe_write_iosf_sb_reg_x550 +ffffffff817a72d0 T ixgbe_read_iosf_sb_reg_x550a +ffffffff817a7370 T ixgbe_write_iosf_sb_reg_x550a +ffffffff817a7400 T ixgbe_acquire_swfw_sync_X550a +ffffffff817a7540 T ixgbe_release_swfw_sync_X550a +ffffffff817a75e0 T ixgbe_fc_autoneg_fiber_x550em_a +ffffffff817a7620 T ixgbe_fc_autoneg_backplane_x550em_a +ffffffff817a7780 T ixgbe_setup_fc_backplane_x550em_a +ffffffff817a7970 T ixgbe_fc_autoneg_sgmii_x550em_a +ffffffff817a7a60 T ixgbe_init_ops_X550EM_x +ffffffff817a7b20 T ixgbe_acquire_swfw_sync_X550em +ffffffff817a7be0 T ixgbe_release_swfw_sync_X550em +ffffffff817a7c70 T ixgbe_iosf_wait +ffffffff817a7d20 T ixgbe_get_phy_token +ffffffff817a7da0 T ixgbe_put_phy_token +ffffffff817a7e20 T ixgbe_supported_sfp_modules_X550em +ffffffff817a7ea0 T ixgbe_identify_sfp_module_X550em +ffffffff817a7f20 T ixgbe_init_mac_link_ops_X550em +ffffffff817a8060 T ixgbe_restart_an_internal_phy_x550em +ffffffff817a8170 T ixgbe_setup_sgmii +ffffffff817a8410 T ixgbe_setup_sgmii_fw +ffffffff817a86f0 T ixgbe_setup_mac_link_sfp_x550a +ffffffff817a88e0 T ixgbe_setup_mac_link_sfp_x550em +ffffffff817a89a0 T ixgbe_setup_mac_link_t_X550em +ffffffff817a8a50 T ixgbe_check_link_t_X550em +ffffffff817a8b30 T ixgbe_get_lasi_ext_t_x550em +ffffffff817a8cb0 T ixgbe_enable_lasi_ext_t_x550em +ffffffff817a8e40 T ixgbe_setup_kr_speed_x550em +ffffffff817a9050 T ixgbe_reset_phy_fw +ffffffff817a9120 T ixgbe_check_overtemp_fw +ffffffff817a91b0 T ixgbe_read_phy_reg_x550a +ffffffff817a9250 T ixgbe_write_phy_reg_x550a +ffffffff817a9300 T ixgbe_setup_kr_x550em +ffffffff817a9370 T ixgbe_setup_internal_phy_t_x550em +ffffffff817a9500 T ixgbe_enter_lplu_t_x550em +ffffffff817a97f0 T ixgbe_handle_lasi_ext_t_x550em +ffffffff817a9870 T ixgbe_reset_phy_t_X550em +ffffffff817a98c0 T ixgbe_set_mdio_speed +ffffffff817a99a0 T ixgbe_init_ext_t_x550em +ffffffff817a9a50 T ixgbe_setup_sfi_x550a +ffffffff817a9c00 T ixgbe_setup_ixfi_x550em_x +ffffffff817a9de0 T ixgbe_setup_ixfi_x550em +ffffffff817a9fc0 T ixgbe_ext_phy_t_x550em_get_link +ffffffff817aa050 T ixgbe_setup_phy_loopback_x550em +ffffffff817aa240 T ixgbe_read_ee_hostif_buffer_X550 +ffffffff817aa3d0 T ixgbe_write_ee_hostif_data_X550 +ffffffff817aa440 T ixgbe_checksum_ptr_x550 +ffffffff817aa5d0 T ixgbe_calc_checksum_X550 +ffffffff817aa760 T ixgbe_update_flash_X550 +ffffffff817aa7b0 T ixgbe_get_lcd_t_x550em +ffffffff817aa870 T ixgbe_set_mux +ffffffff817ab000 T ixgbe_read_i2c_combined_generic_int +ffffffff817ab260 T ixgbe_i2c_start +ffffffff817ab3c0 T ixgbe_clock_in_i2c_byte +ffffffff817ab4b0 T ixgbe_clock_out_i2c_bit +ffffffff817ab5c0 T ixgbe_i2c_stop +ffffffff817ab750 T ixgbe_i2c_bus_clear +ffffffff817ab870 T ixgbe_read_i2c_combined_generic +ffffffff817ab890 T ixgbe_read_i2c_combined_generic_unlocked +ffffffff817ab8b0 T ixgbe_write_i2c_combined_generic_int +ffffffff817aba90 T ixgbe_write_i2c_combined_generic +ffffffff817abab0 T ixgbe_write_i2c_combined_generic_unlocked +ffffffff817abad0 T ixgbe_init_phy_ops_generic +ffffffff817abc00 T ixgbe_identify_phy_generic +ffffffff817ac0d0 T ixgbe_reset_phy_generic +ffffffff817ac260 T ixgbe_read_phy_reg_generic +ffffffff817ac300 T ixgbe_write_phy_reg_generic +ffffffff817ac3a0 T ixgbe_read_phy_reg_mdi +ffffffff817ac520 T ixgbe_write_phy_reg_mdi +ffffffff817ac690 T ixgbe_setup_phy_link_generic +ffffffff817ac940 T ixgbe_setup_phy_link_speed_generic +ffffffff817ac990 T ixgbe_get_phy_firmware_version_generic +ffffffff817ac9c0 T ixgbe_read_i2c_byte_generic +ffffffff817ac9e0 T ixgbe_write_i2c_byte_generic +ffffffff817aca00 T ixgbe_read_i2c_eeprom_generic +ffffffff817aca30 T ixgbe_write_i2c_eeprom_generic +ffffffff817aca50 T ixgbe_identify_module_generic +ffffffff817acac0 T ixgbe_read_i2c_byte_generic_unlocked +ffffffff817acae0 T ixgbe_write_i2c_byte_generic_unlocked +ffffffff817acb00 T ixgbe_tn_check_overtemp +ffffffff817acb70 T ixgbe_check_reset_blocked +ffffffff817acbd0 T ixgbe_validate_phy_addr +ffffffff817acc40 T ixgbe_get_phy_id +ffffffff817accf0 T ixgbe_get_phy_type_from_id +ffffffff817acdb0 T ixgbe_get_copper_link_capabilities_generic +ffffffff817acea0 T ixgbe_get_copper_speeds_supported +ffffffff817acf60 T ixgbe_check_phy_link_tnx +ffffffff817ad220 T ixgbe_setup_phy_link_tnx +ffffffff817ad4d0 T ixgbe_get_phy_firmware_version_tnx +ffffffff817ad500 T ixgbe_reset_phy_nl +ffffffff817ad7a0 T ixgbe_get_sfp_init_sequence_offsets +ffffffff817ad980 T ixgbe_is_sfp +ffffffff817ad9d0 T ixgbe_identify_sfp_module_generic +ffffffff817addc0 T ixgbe_identify_qsfp_module_generic +ffffffff817ae0b0 T ixgbe_get_supported_phy_sfp_layer_generic +ffffffff817ae250 T ixgbe_is_sfp_probe +ffffffff817ae2a0 T ixgbe_read_i2c_byte_generic_int +ffffffff817ae4a0 T ixgbe_clock_out_i2c_byte +ffffffff817ae600 T ixgbe_get_i2c_ack +ffffffff817ae800 T ixgbe_write_i2c_byte_generic_int +ffffffff817ae930 T ixgbe_set_i2c_data +ffffffff817aeae0 T ixgbe_raise_i2c_clk +ffffffff817aec00 T ixgbe_lower_i2c_clk +ffffffff817aec90 T ixgbe_clock_in_i2c_bit +ffffffff817aee60 T ixgbe_get_i2c_data +ffffffff817aef10 T ixgbe_set_copper_phy_power +ffffffff817af000 t ixl_match +ffffffff817af0a0 t ixl_attach +ffffffff817b1c40 t ixl_710_rd_ctl +ffffffff817b1dd0 t ixl_710_wr_ctl +ffffffff817b1f80 t ixl_710_set_rss_key +ffffffff817b2100 t ixl_710_set_rss_lut +ffffffff817b2180 t ixl_wakeup +ffffffff817b21a0 t ixl_722_rd_ctl +ffffffff817b21d0 t ixl_722_wr_ctl +ffffffff817b2200 t ixl_722_set_rss_key +ffffffff817b2230 t ixl_722_set_rss_lut +ffffffff817b2260 t ixl_dmamem_alloc +ffffffff817b23c0 t ixl_arq +ffffffff817b25d0 t ixl_arq_fill +ffffffff817b2840 t ixl_intr0 +ffffffff817b2a60 t ixl_intr_vector +ffffffff817b2b00 t ixl_ioctl +ffffffff817b49d0 t ixl_start +ffffffff817b4e20 t ixl_watchdog +ffffffff817b4e50 t ixl_media_change +ffffffff817b4e80 t ixl_media_status +ffffffff817b4f00 t ixl_link_state_update +ffffffff817b5040 t ixl_link_state_update_iaq +ffffffff817b50f0 t ixl_set_link_status +ffffffff817b52a0 t ixl_atq_poll +ffffffff817b5490 t ixl_rxeof +ffffffff817b5770 t ixl_txeof +ffffffff817b5950 t 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iwi_media_change +ffffffff817fe0c0 T iwi_media_status +ffffffff817fe230 T iwi_init_task +ffffffff817fe2a0 T iwi_free_tx_ring +ffffffff817fe3a0 T iwi_free_cmd_ring +ffffffff817fe450 T iwi_stop +ffffffff817fe6e0 T iwi_wakeup +ffffffff817fe780 T iwi_init +ffffffff817feca0 T iwi_reset_cmd_ring +ffffffff817fece0 T iwi_reset_tx_ring +ffffffff817fed80 T iwi_free_rx_ring +ffffffff817fee30 T iwi_reset_rx_ring +ffffffff817fee60 T iwi_rate +ffffffff817fef10 T iwi_find_txnode +ffffffff817ff030 T iwi_scan +ffffffff817ff2f0 T iwi_auth_and_assoc +ffffffff817ffb80 T iwi_set_chan +ffffffff817ffd30 T iwi_frame_intr +ffffffff81800050 T iwi_notification_intr +ffffffff81800140 T iwi_rx_intr +ffffffff818002e0 T iwi_tx_intr +ffffffff818003e0 T iwi_cmd +ffffffff81800540 T iwi_tx_start +ffffffff81800a20 T iwi_stop_master +ffffffff81800be0 T iwi_load_ucode +ffffffff81801210 T iwi_load_firmware +ffffffff81801830 T iwi_config +ffffffff81801c00 T iwi_update_edca +ffffffff81802000 T wpi_match +ffffffff81802030 T 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iwx_write_prph +ffffffff8183e420 T iwx_set_bits_prph +ffffffff8183e440 T iwx_clear_bits_prph +ffffffff8183e460 T iwx_read_prph +ffffffff8183e500 T iwx_nic_unlock +ffffffff8183e5b0 T iwx_set_ltr +ffffffff8183e700 T iwx_ctxt_info_init +ffffffff8183e9c0 T iwx_ctxt_info_free_fw_img +ffffffff8183eb40 T iwx_ctxt_info_gen3_init +ffffffff8183f130 T iwx_write_umac_prph +ffffffff8183f1e0 T iwx_firmware_store_section +ffffffff8183f280 T iwx_set_default_calib +ffffffff8183f2d0 T iwx_fw_info_free +ffffffff8183f360 T iwx_read_firmware +ffffffff8183fef0 T iwx_prph_addr_mask +ffffffff8183ff30 T iwx_read_prph_unlocked +ffffffff8183ffb0 T iwx_nic_assert_locked +ffffffff81840010 T iwx_write_prph_unlocked +ffffffff81840090 T iwx_write_prph64 +ffffffff818401c0 T iwx_read_umac_prph_unlocked +ffffffff81840240 T iwx_read_umac_prph +ffffffff818402e0 T iwx_write_umac_prph_unlocked +ffffffff81840360 T iwx_read_mem +ffffffff81840490 T iwx_write_mem +ffffffff818405d0 T iwx_write_mem32 +ffffffff818406e0 T iwx_poll_bit +ffffffff818407b0 T iwx_set_bits_mask_prph +ffffffff81840990 T iwx_alloc_rx_ring +ffffffff81840b70 T iwx_rx_addbuf +ffffffff81840d80 T iwx_free_rx_ring +ffffffff81841030 T iwx_disable_rx_dma +ffffffff81841290 T iwx_reset_rx_ring +ffffffff81841330 T iwx_alloc_tx_ring +ffffffff81841540 T iwx_free_tx_ring +ffffffff818417d0 T iwx_reset_tx_ring +ffffffff81841a30 T iwx_enable_rfkill_int +ffffffff81841b10 T iwx_check_rfkill +ffffffff81841b90 T iwx_enable_interrupts +ffffffff81841c40 T iwx_enable_fwload_interrupt +ffffffff81841d20 T iwx_restore_interrupts +ffffffff81841d50 T iwx_disable_interrupts +ffffffff81841e10 T iwx_ict_reset +ffffffff81841fd0 T iwx_set_hw_ready +ffffffff818421b0 T iwx_prepare_card_hw +ffffffff818422f0 T iwx_force_power_gating +ffffffff818423a0 T iwx_apm_config +ffffffff81842470 T iwx_apm_init +ffffffff818426d0 T iwx_apm_stop +ffffffff81842a90 T iwx_init_msix_hw +ffffffff81842b30 T iwx_conf_msix_hw +ffffffff818430d0 T iwx_clear_persistence_bit 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iwx_find_rxba_data +ffffffff81845730 T iwx_sta_rx_agg_baid_cfg_cmd +ffffffff81845980 T iwx_send_cmd_pdu_status +ffffffff81845a10 T iwx_sta_rx_agg_sta_cmd +ffffffff81845c60 T iwx_sta_rx_agg +ffffffff81845f30 T iwx_mac_ctxt_task +ffffffff818460c0 T iwx_mac_ctxt_cmd +ffffffff818462a0 T iwx_phy_ctxt_task +ffffffff81846460 T iwx_phy_ctxt_update +ffffffff818468c0 T iwx_updatechan +ffffffff81846980 T iwx_add_task +ffffffff818469f0 T iwx_updateprot +ffffffff81846ab0 T iwx_updateslot +ffffffff81846b70 T iwx_updateedca +ffffffff81846c30 T iwx_updatedtim +ffffffff81846cf0 T iwx_sta_tx_agg_start +ffffffff81846ee0 T iwx_ba_task +ffffffff81847030 T iwx_ampdu_rx_start +ffffffff81847110 T iwx_ampdu_rx_stop +ffffffff818471f0 T iwx_ampdu_tx_start +ffffffff81847300 T iwx_set_mac_addr_from_csr +ffffffff81847520 T iwx_flip_hw_address +ffffffff81847570 T iwx_is_valid_mac_addr +ffffffff81847610 T iwx_nvm_get +ffffffff818478e0 T iwx_load_firmware +ffffffff81847ac0 T iwx_start_fw +ffffffff81847ca0 T iwx_pnvm_handle_section +ffffffff81847f90 T iwx_ctxt_info_gen3_set_pnvm +ffffffff81847fe0 T iwx_pnvm_parse +ffffffff818480d0 T iwx_load_pnvm +ffffffff81848470 T iwx_send_tx_ant_cfg +ffffffff81848500 T iwx_send_phy_cfg_cmd +ffffffff818485b0 T iwx_send_dqa_cmd +ffffffff81848640 T iwx_load_ucode_wait_alive +ffffffff81848700 T iwx_run_init_mvm_ucode +ffffffff81848950 T iwx_config_ltr +ffffffff81848a10 T iwx_update_rx_desc +ffffffff81848ab0 T iwx_rxmq_get_signal_strength +ffffffff81848b00 T iwx_rx_rx_phy_cmd +ffffffff81848b60 T iwx_get_noise +ffffffff81848bd0 T iwx_ccmp_decap +ffffffff81848d10 T iwx_rx_hwdecrypt +ffffffff81848e10 T iwx_rx_frame +ffffffff818490d0 T iwx_detect_duplicate +ffffffff818491d0 T iwx_is_sn_less +ffffffff81849230 T iwx_oldsn_workaround +ffffffff818492f0 T iwx_rx_reorder +ffffffff81849920 T iwx_rx_mpdu_mq +ffffffff81849c70 T iwx_clear_tx_desc +ffffffff81849df0 T iwx_txd_done +ffffffff81849eb0 T iwx_txq_advance +ffffffff8184a1f0 T iwx_tx_update_byte_tbl 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iwx_enable_beacon_filter +ffffffff8184c8f0 T iwx_disable_beacon_filter +ffffffff8184c9e0 T iwx_add_sta_cmd +ffffffff8184cce0 T iwx_rm_sta_cmd +ffffffff8184cda0 T iwx_rm_sta +ffffffff8184d210 T iwx_disable_mgmt_queue +ffffffff8184d2f0 T iwx_umac_scan_fill_channels +ffffffff8184d430 T iwx_fill_probe_req +ffffffff8184d670 T iwx_config_umac_scan_reduced +ffffffff8184d7d0 T iwx_scan_umac_flags_v2 +ffffffff8184d810 T iwx_scan_umac_dwell_v10 +ffffffff8184d880 T iwx_scan_umac_fill_general_p_v10 +ffffffff8184d910 T iwx_scan_umac_fill_ch_p_v6 +ffffffff8184da50 T iwx_umac_scan_v14 +ffffffff8184dd40 T iwx_mcc_update +ffffffff8184ddd0 T iwx_ridx2rate +ffffffff8184de40 T iwx_ack_rates +ffffffff8184e100 T iwx_mac_ctxt_cmd_common +ffffffff8184e410 T iwx_mac_ctxt_cmd_fill_sta +ffffffff8184e4a0 T iwx_clear_statistics +ffffffff8184e580 T iwx_del_task +ffffffff8184e5e0 T iwx_scan +ffffffff8184e780 T iwx_scan_abort +ffffffff8184e830 T iwx_bgscan +ffffffff8184e8b0 T iwx_bgscan_done +ffffffff8184e950 T iwx_bgscan_done_task +ffffffff8184eac0 T iwx_umac_scan_abort +ffffffff8184eb50 T iwx_enable_mgmt_queue +ffffffff8184ebe0 T iwx_rs_rval2idx +ffffffff8184ec50 T iwx_rs_ht_rates +ffffffff8184ed20 T iwx_rs_vht_rates +ffffffff8184ede0 T iwx_rs_init_v3 +ffffffff8184f210 T iwx_rs_init_v4 +ffffffff8184f650 T iwx_rs_init +ffffffff8184f6b0 T iwx_rs_update +ffffffff8184f950 T iwx_phy_send_rlc +ffffffff8184fa40 T iwx_auth +ffffffff81850030 T iwx_deauth +ffffffff818502d0 T iwx_run +ffffffff81850960 T iwx_sf_config +ffffffff81850bb0 T iwx_allow_mcast +ffffffff81850cb0 T iwx_run_stop +ffffffff81851010 T iwx_node_alloc +ffffffff81851030 T iwx_set_key +ffffffff81851160 T iwx_add_sta_key +ffffffff818513d0 T iwx_setkey_task +ffffffff818514b0 T iwx_delete_key +ffffffff81851640 T iwx_media_change +ffffffff818516b0 T iwx_stop +ffffffff81851b60 T iwx_init +ffffffff81851e20 T iwx_newstate_task +ffffffff81851f60 T iwx_newstate +ffffffff81852130 T iwx_endscan +ffffffff81852180 T iwx_fill_sf_command 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et_ifmedia_sts +ffffffff81880380 T et_tick +ffffffff818803d0 T et_txtick +ffffffff81880410 T et_stop +ffffffff81880640 T et_dma_free +ffffffff81880800 T et_stop_rxdma +ffffffff818808b0 T et_stop_txdma +ffffffff81880910 T et_free_tx_ring +ffffffff818809c0 T et_free_rx_ring +ffffffff81880b00 T et_enable_intrs +ffffffff81880b30 T et_dma_mem_create +ffffffff81880ce0 T et_dma_mbuf_create +ffffffff81881050 T et_dma_mem_destroy +ffffffff818810c0 T et_dma_mbuf_destroy +ffffffff81881220 T et_rxeof +ffffffff818815c0 T et_txeof +ffffffff818817f0 T et_init +ffffffff81881a50 T et_init_tx_ring +ffffffff81881b00 T et_init_rx_ring +ffffffff81881c50 T et_chip_init +ffffffff81881f30 T et_enable_txrx +ffffffff81882050 T et_start_rxdma +ffffffff81882120 T et_start_txdma +ffffffff81882180 T et_setmulti +ffffffff818823c0 T et_encap +ffffffff818827c0 T et_init_mac +ffffffff81882930 T et_init_rxmac +ffffffff81882be0 T et_init_txmac +ffffffff81882c60 T et_init_rxdma +ffffffff81882fd0 T et_init_txdma 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T age_stop_txmac +ffffffff8188ab20 T age_mac_config +ffffffff8188abc0 T age_rxintr +ffffffff8188ad90 T age_txintr +ffffffff8188af70 T age_init +ffffffff8188b950 T age_stats_update +ffffffff8188bc70 T age_encap +ffffffff8188bee0 T age_iff +ffffffff8188c040 T age_rxeof +ffffffff8188c3d0 T age_newbuf +ffffffff8188c560 T age_init_rx_ring +ffffffff8188c630 T age_init_rr_ring +ffffffff8188c6b0 T age_init_tx_ring +ffffffff8188c770 T age_init_cmb_block +ffffffff8188c7c0 T age_init_smb_block +ffffffff8188c810 T age_rxvlan +ffffffff8188d000 T alc_match +ffffffff8188d030 T alc_attach +ffffffff8188d880 T alc_detach +ffffffff8188d950 T alc_activate +ffffffff8188d9d0 T alc_miibus_readreg +ffffffff8188db90 T alc_mii_readreg_816x +ffffffff8188dc90 T alc_mii_readreg_813x +ffffffff8188dda0 T alc_miibus_writereg +ffffffff8188df70 T alc_mii_writereg_816x +ffffffff8188e080 T alc_mii_writereg_813x +ffffffff8188e180 T alc_miibus_statchg +ffffffff8188e530 T alc_stop_mac +ffffffff8188e620 T alc_start_queue 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ale_mediachange +ffffffff81895cb0 T ale_get_macaddr +ffffffff81895e90 T ale_phy_reset +ffffffff818964d0 T ale_intr +ffffffff81896620 T ale_reset +ffffffff81896790 T ale_dma_alloc +ffffffff81896f00 T ale_ioctl +ffffffff81897050 T ale_start +ffffffff818971c0 T ale_watchdog +ffffffff81897240 T ale_tick +ffffffff818972a0 T ale_dma_free +ffffffff81897560 T ale_detach +ffffffff81897620 T ale_stop +ffffffff818978e0 T ale_init +ffffffff818982f0 T ale_encap +ffffffff81898550 T ale_txeof +ffffffff81898710 T ale_iff +ffffffff81898870 T ale_stats_clear +ffffffff81898940 T ale_stats_update +ffffffff81898cb0 T ale_rxeof +ffffffff81898f50 T ale_rx_update_page +ffffffff81899090 T ale_rxcsum +ffffffff81899140 T ale_init_rx_pages +ffffffff81899270 T ale_init_tx_ring +ffffffff81899360 T ale_rxvlan +ffffffff8189a000 T amdpm_match +ffffffff8189a030 T amdpm_attach +ffffffff8189a3a0 T amdpm_activate +ffffffff8189a410 T amdpm_rnd_callout +ffffffff8189a470 T amdpm_i2c_acquire_bus +ffffffff8189a4c0 T amdpm_i2c_release_bus +ffffffff8189a510 T amdpm_i2c_exec +ffffffff8189a870 T amdpm_get_timecount +ffffffff8189a8a0 T amdpm_intr +ffffffff8189b000 T bce_probe +ffffffff8189b030 T bce_attach +ffffffff8189bae0 T bce_activate +ffffffff8189bb50 T bce_intr +ffffffff8189be50 T bce_reset +ffffffff8189c410 T bce_ioctl +ffffffff8189c570 T bce_start +ffffffff8189c7c0 T bce_watchdog +ffffffff8189c810 T bce_mii_read +ffffffff8189c950 T bce_mii_write +ffffffff8189ca80 T bce_statchg +ffffffff8189ce10 T bce_mediachange +ffffffff8189ce60 T bce_mediastatus +ffffffff8189cec0 T bce_tick +ffffffff8189cf10 T bce_stop +ffffffff8189d030 T bce_init +ffffffff8189d440 T bce_iff +ffffffff8189d540 T bce_rxintr +ffffffff8189d6d0 T bce_txintr +ffffffff8189d7c0 T bce_add_rxbuf +ffffffff8189d880 T bce_add_mac +ffffffff8189e000 T ath_pci_match +ffffffff8189e060 T ath_pci_attach +ffffffff8189e290 T ath_pci_detach +ffffffff8189f000 T athn_pci_match +ffffffff8189f030 T athn_pci_attach +ffffffff8189f2b0 T athn_pci_detach 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rtwn_pci_write_2 +ffffffff818a3130 T rtwn_pci_write_4 +ffffffff818a3160 T rtwn_pci_read_1 +ffffffff818a3190 T rtwn_pci_read_2 +ffffffff818a31c0 T rtwn_pci_read_4 +ffffffff818a31f0 T rtwn_tx +ffffffff818a37c0 T rtwn_power_on +ffffffff818a37f0 T rtwn_dma_init +ffffffff818a3ba0 T rtwn_pci_load_firmware +ffffffff818a3c50 T rtwn_fw_loadpage +ffffffff818a3d90 T rtwn_mac_init +ffffffff818a3f10 T rtwn_bb_init +ffffffff818a43b0 T rtwn_alloc_buffers +ffffffff818a43e0 T rtwn_pci_init +ffffffff818a44b0 T rtwn_pci_stop +ffffffff818a4600 T rtwn_is_oactive +ffffffff818a4640 T rtwn_next_calib +ffffffff818a4660 T rtwn_cancel_calib +ffffffff818a46a0 T rtwn_pci_next_scan +ffffffff818a46c0 T rtwn_cancel_scan +ffffffff818a4700 T rtwn_wait_async +ffffffff818a4730 T rtwn_free_tx_list +ffffffff818a48a0 T rtwn_setup_rx_desc +ffffffff818a4910 T rtwn_reset_rx_list +ffffffff818a49b0 T rtwn_reset_tx_list +ffffffff818a4b00 T rtwn_rx_frame +ffffffff818a4f60 T rtwn_tx_done +ffffffff818a50f0 T rtwn_poll_c2h_events +ffffffff818a52b0 T rtwn_pci_92c_stop +ffffffff818a5490 T rtwn_pci_88e_stop +ffffffff818a5870 T rtwn_pci_23a_stop +ffffffff818a5c10 T rtwn_88e_intr +ffffffff818a5f60 T rtwn_llt_write +ffffffff818a6020 T rtwn_llt_init +ffffffff818a62f0 T rtwn_92c_power_on +ffffffff818a6770 T rtwn_88e_power_on +ffffffff818a6b70 T rtwn_23a_power_on +ffffffff818a6fe0 T rtwn_tx_report +ffffffff818a8000 T ral_pci_match +ffffffff818a8030 T ral_pci_attach +ffffffff818a8210 T ral_pci_detach +ffffffff818a82b0 T ral_pci_activate +ffffffff818a8340 T ral_pci_wakeup +ffffffff818a9000 T acx_pci_match +ffffffff818a9030 T acx_pci_attach +ffffffff818a9260 T acx_pci_detach +ffffffff818aa000 T pgt_pci_match +ffffffff818aa030 T pgt_pci_attach +ffffffff818aa200 T pgt_pci_detach +ffffffff818ab000 T malo_pci_match +ffffffff818ab030 T malo_pci_attach +ffffffff818ab1e0 T malo_pci_detach +ffffffff818ab230 T malo_pci_activate +ffffffff818ab290 T malo_pci_wakeup +ffffffff818ac000 T bwi_pci_match +ffffffff818ac070 T bwi_pci_attach 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T vmxnet3_alloc_rxring +ffffffff818b2c40 T vmxnet3_rxfill_tick +ffffffff818b2cb0 T vmxnet3_txinit +ffffffff818b2d20 T vmxnet3_rxfill +ffffffff818b2f70 T vmxnet3_rxinit +ffffffff818b3040 T vmxnet3_txstop +ffffffff818b30d0 T vmxnet3_rxstop +ffffffff818b31d0 T vmxnet3_enable_all_intrs +ffffffff818b32a0 T vmxnet3_disable_all_intrs +ffffffff818b3370 T vmxnet3_evintr +ffffffff818b3540 T vmxnet3_rxintr +ffffffff818b38d0 T vmxnet3_txintr +ffffffff818b3a70 T vmxnet3_init +ffffffff818b3e80 T vmxnet3_rx_csum +ffffffff818b3ee0 T vmxnet3_iff +ffffffff818b4020 T vmxnet3_stop +ffffffff818b4270 T vmxnet3_reset +ffffffff818b42b0 t vmx_kstat_create +ffffffff818b4490 t vmx_kstat_read +ffffffff818b5000 T vmwpvs_match +ffffffff818b5040 T vmwpvs_attach +ffffffff818b5df0 T vmwpvs_scsi_cmd +ffffffff818b6260 T vmwpvs_intx +ffffffff818b62e0 T vmwpvs_msg_task +ffffffff818b6560 T vmwpvs_intr +ffffffff818b6740 T vmwpvs_get_config +ffffffff818b6940 T vmwpvs_dmamem_zalloc +ffffffff818b69a0 T vmwpvs_dmamem_alloc +ffffffff818b6b20 T vmwpvs_ccb_put +ffffffff818b6b80 T vmwpvs_setup_rings +ffffffff818b6cb0 T vmwpvs_setup_msg_ring +ffffffff818b6da0 T vmwpvs_ccb_get +ffffffff818b6e20 T vmwpvs_dmamem_free +ffffffff818b6ea0 T vmwpvs_cmd +ffffffff818b6f50 T vmwpvs_scsi_cmd_done +ffffffff818b7130 T vmwpvs_scsi_cmd_poll +ffffffff818b8000 T lii_match +ffffffff818b8030 T lii_attach +ffffffff818b8440 T lii_activate +ffffffff818b8540 T lii_reset +ffffffff818b8810 T lii_spi_configure +ffffffff818b8900 T lii_eeprom_present +ffffffff818b8990 T lii_eeprom_read +ffffffff818b89c0 T lii_spi_read +ffffffff818b8c80 T lii_read_macaddr +ffffffff818b8df0 T lii_intr +ffffffff818b8f00 T lii_alloc_rings +ffffffff818b9110 T lii_tick +ffffffff818b9160 T lii_mii_readreg +ffffffff818b9400 T lii_mii_writereg +ffffffff818b96a0 T lii_mii_statchg +ffffffff818b9710 T lii_media_change +ffffffff818b9760 T lii_media_status +ffffffff818b97c0 T lii_ioctl +ffffffff818b9950 T lii_start +ffffffff818b9b00 T lii_watchdog +ffffffff818b9b40 T lii_stop +ffffffff818b9bb0 T lii_init +ffffffff818ba0b0 T lii_iff +ffffffff818ba1f0 T lii_tx_put +ffffffff818ba300 T lii_free_tx_space +ffffffff818ba340 T lii_rxintr +ffffffff818ba4f0 T lii_txintr +ffffffff818bb000 T ichiic_match +ffffffff818bb030 T ichiic_attach +ffffffff818bb220 T ichiic_intr +ffffffff818bb330 T ichiic_i2c_acquire_bus +ffffffff818bb380 T ichiic_i2c_release_bus +ffffffff818bb3d0 T ichiic_i2c_exec +ffffffff818bc000 T viapm_match +ffffffff818bc030 T viapm_attach +ffffffff818bc650 T viapm_intr +ffffffff818bc760 T viapm_i2c_acquire_bus +ffffffff818bc7b0 T viapm_i2c_release_bus +ffffffff818bc800 T viapm_i2c_exec +ffffffff818bcb20 T viapm_refresh_sensor_data +ffffffff818bce50 T viapm_refresh +ffffffff818bce80 T val_to_uK +ffffffff818bcf20 T val_to_rpm +ffffffff818bcf60 T val_to_uV +ffffffff818bd000 T viapm_get_timecount +ffffffff818be000 T amdiic_match +ffffffff818be030 T amdiic_attach +ffffffff818be200 T amdiic_intr +ffffffff818be2d0 T amdiic_i2c_acquire_bus +ffffffff818be320 T amdiic_i2c_release_bus +ffffffff818be370 T amdiic_i2c_exec +ffffffff818be5d0 T amdiic_read +ffffffff818be740 T amdiic_wait +ffffffff818be7e0 T amdiic_write +ffffffff818bf000 T nviic_match +ffffffff818bf030 T nviic_attach +ffffffff818bf280 T nviic_i2c_acquire_bus +ffffffff818bf2d0 T nviic_i2c_release_bus +ffffffff818bf310 T nviic_i2c_exec +ffffffff818bf530 T nviic_write +ffffffff818bf580 T nviic_read +ffffffff818c0000 T sdhc_pci_match +ffffffff818c0060 T sdhc_pci_attach +ffffffff818c03a0 T sdhc_pci_activate +ffffffff818c0400 T sdhc_takecontroller +ffffffff818c04a0 T sdhc_ricohfix +ffffffff818c0610 T sdhc_pci_conf_write +ffffffff818c1000 T kate_match +ffffffff818c1170 T kate_attach +ffffffff818c1420 T kate_refresh +ffffffff818c2000 T km_match +ffffffff818c2050 T km_attach +ffffffff818c20f0 T km_refresh +ffffffff818c3000 T ksmn_match +ffffffff818c3050 T ksmn_attach +ffffffff818c3230 T ksmn_ccd_attach +ffffffff818c3380 T ksmn_refresh +ffffffff818c34d0 T ksmn_read_reg +ffffffff818c4000 t iosf_pci_match +ffffffff818c4060 t iosf_pci_attach +ffffffff818c4100 t iosf_pci_mbi_mdr_rd +ffffffff818c4160 t iosf_pci_mbi_mdr_wr +ffffffff818c5000 T itherm_probe +ffffffff818c5030 T itherm_attach +ffffffff818c5380 T itherm_activate +ffffffff818c5400 T itherm_enable +ffffffff818c5460 T itherm_refresh +ffffffff818c5470 T itherm_refresh_sensor_data +ffffffff818c5860 T itherm_bias_temperature_sensor +ffffffff818c6000 T pchtemp_match +ffffffff818c6030 T pchtemp_attach +ffffffff818c6190 T pchtemp_refresh +ffffffff818c7000 T rtsx_pci_match +ffffffff818c7090 T rtsx_pci_attach +ffffffff818c8000 T xspd_match +ffffffff818c8030 T xspd_attach +ffffffff818c81f0 T xspd_intr +ffffffff818c9000 T virtio_pci_match +ffffffff818c9080 T virtio_pci_attach +ffffffff818c9430 T virtio_pci_detach +ffffffff818c9510 T virtio_pci_kick +ffffffff818c9570 T virtio_pci_read_device_config_1 +ffffffff818c95a0 T virtio_pci_read_device_config_2 +ffffffff818c95d0 T virtio_pci_read_device_config_4 +ffffffff818c9600 T virtio_pci_read_device_config_8 +ffffffff818c9680 T virtio_pci_write_device_config_1 +ffffffff818c96b0 T virtio_pci_write_device_config_2 +ffffffff818c96e0 T virtio_pci_write_device_config_4 +ffffffff818c9710 T virtio_pci_write_device_config_8 +ffffffff818c9780 T virtio_pci_read_queue_size +ffffffff818c97f0 T virtio_pci_setup_queue +ffffffff818c9ae0 T virtio_pci_set_status +ffffffff818c9b60 T virtio_pci_negotiate_features +ffffffff818c9ca0 T virtio_pci_poll_intr +ffffffff818c9d10 T virtio_pci_find_cap +ffffffff818c9ed0 T virtio_pci_attach_10 +ffffffff818ca310 T virtio_pci_attach_09 +ffffffff818ca450 T virtio_pci_adjust_config_region +ffffffff818ca4f0 T virtio_pci_setup_msix +ffffffff818ca850 T virtio_pci_legacy_intr +ffffffff818ca8f0 T virtio_pci_legacy_intr_mpsafe +ffffffff818ca980 T virtio_pci_free_irqs +ffffffff818cabd0 T virtio_pci_negotiate_features_10 +ffffffff818cae10 T virtio_pci_msix_establish +ffffffff818caee0 T virtio_pci_set_msix_queue_vector +ffffffff818caf60 T virtio_pci_set_msix_config_vector +ffffffff818cafa0 T virtio_pci_config_intr +ffffffff818cafe0 T virtio_pci_shared_queue_intr +ffffffff818caff0 T virtio_pci_queue_intr +ffffffff818cc000 T dwiic_pci_match +ffffffff818cc030 T dwiic_pci_attach +ffffffff818cc350 T dwiic_pci_activate +ffffffff818cc3c0 T dwiic_pci_bus_scan +ffffffff818cd000 T bwfm_pci_buscore_read +ffffffff818cd060 T bwfm_pci_buscore_write +ffffffff818cd0d0 T bwfm_pci_buscore_prepare +ffffffff818cd100 T bwfm_pci_buscore_reset +ffffffff818cd2f0 T bwfm_pci_buscore_activate +ffffffff818cd320 T bwfm_pci_preinit +ffffffff818ce440 T bwfm_pci_stop +ffffffff818ce4d0 T bwfm_pci_txcheck +ffffffff818ce590 T bwfm_pci_txdata +ffffffff818ce8f0 T bwfm_pci_msgbuf_query_dcmd +ffffffff818ced30 T bwfm_pci_msgbuf_set_dcmd +ffffffff818ced80 T bwfm_pci_match +ffffffff818cedb0 T bwfm_pci_attach +ffffffff818cf020 T bwfm_pci_detach +ffffffff818cf060 T bwfm_pci_activate +ffffffff818cf210 T bwfm_pci_intr +ffffffff818cf470 T bwfm_pci_select_core +ffffffff818cf550 T bwfm_pci_load_microcode +ffffffff818cf9d0 T bwfm_pci_dmamem_alloc +ffffffff818cfb70 T bwfm_pci_setup_ring +ffffffff818cfd80 T bwfm_pci_intr_enable +ffffffff818cfdd0 T bwfm_pci_hostready +ffffffff818cfe40 T bwfm_pci_fill_rx_rings +ffffffff818cfe90 T bwfm_pci_dmamem_free +ffffffff818cff00 T bwfm_pci_cleanup +ffffffff818d0570 T bwfm_pci_send_mb_data +ffffffff818d0690 T bwfm_pci_intmask +ffffffff818d06d0 T bwfm_pci_pktid_avail +ffffffff818d0740 T bwfm_pci_pktid_new +ffffffff818d08a0 T bwfm_pci_pktid_free +ffffffff818d0950 T bwfm_pci_fill_rx_buf_ring +ffffffff818d0cb0 T bwfm_pci_fill_rx_ioctl_ring +ffffffff818d1030 T bwfm_pci_ring_write_reserve +ffffffff818d1120 T bwfm_pci_ring_write_cancel +ffffffff818d1160 T bwfm_pci_ring_write_commit +ffffffff818d1240 T bwfm_pci_ring_write_rptr +ffffffff818d12c0 T bwfm_pci_ring_write_wptr +ffffffff818d1340 T bwfm_pci_setup_flowring +ffffffff818d14a0 T bwfm_pci_ring_bell +ffffffff818d14e0 T bwfm_pci_ring_update_rptr +ffffffff818d1590 T bwfm_pci_ring_update_wptr +ffffffff818d1640 T bwfm_pci_ring_write_reserve_multi +ffffffff818d1760 T bwfm_pci_ring_read_avail +ffffffff818d1860 T bwfm_pci_ring_read_commit +ffffffff818d18f0 T bwfm_pci_ring_rx +ffffffff818d1b00 T bwfm_pci_msg_rx +ffffffff818d20e0 T bwfm_pci_flowring_delete_cb +ffffffff818d2190 T bwfm_pci_msgbuf_rxioctl +ffffffff818d2280 T bwfm_pci_intr_status +ffffffff818d22c0 T bwfm_pci_intr_ack +ffffffff818d2300 T bwfm_pci_flowring_lookup +ffffffff818d2470 T bwfm_pci_flowring_create +ffffffff818d25a0 T bwfm_pci_flowring_create_cb +ffffffff818d28f0 T bwfm_pci_flowring_delete +ffffffff818d2bc0 T bwfm_pci_msgbuf_h2d_mb_write +ffffffff818d2de0 T bwfm_pci_handle_mb_data +ffffffff818d2eb0 T bwfm_pci_intr_disable +ffffffff818d3000 T ccp_pci_match +ffffffff818d3030 T ccp_pci_attach +ffffffff818d4000 T bnxt_match +ffffffff818d4030 T bnxt_attach +ffffffff818d52a0 T bnxt_dmamem_alloc +ffffffff818d5430 T bnxt_dmamem_free +ffffffff818d54c0 T bnxt_hwrm_ver_get +ffffffff818d5610 T bnxt_hwrm_nvm_get_dev_info +ffffffff818d5760 T bnxt_hwrm_func_drv_rgtr +ffffffff818d5880 T bnxt_hwrm_func_rgtr_async_events +ffffffff818d59a0 T bnxt_hwrm_func_qcaps +ffffffff818d5a80 T bnxt_admin_intr +ffffffff818d5c80 T bnxt_intr +ffffffff818d6150 T bnxt_hwrm_func_qcfg +ffffffff818d6200 T bnxt_hwrm_queue_qportcfg +ffffffff818d62d0 T bnxt_hwrm_func_reset +ffffffff818d6380 T bnxt_mark_cpr_invalid +ffffffff818d63e0 T bnxt_hwrm_ring_alloc +ffffffff818d6590 T bnxt_cfg_async_cr +ffffffff818d6690 T bnxt_write_cp_doorbell +ffffffff818d66d0 T bnxt_set_cp_ring_aggint +ffffffff818d67b0 T bnxt_ioctl +ffffffff818d6940 T bnxt_start +ffffffff818d6d60 T bnxt_watchdog +ffffffff818d6d90 T bnxt_media_change +ffffffff818d6ee0 T bnxt_media_status +ffffffff818d6f00 T bnxt_refill +ffffffff818d6f60 T bnxt_media_autonegotiate +ffffffff818d7050 T bnxt_hwrm_port_phy_qcfg +ffffffff818d74f0 T bnxt_free_slots +ffffffff818d7580 T bnxt_hwrm_cmd_hdr_init +ffffffff818d75d0 T hwrm_send_message +ffffffff818d7650 T bnxt_queue_up +ffffffff818d8580 T bnxt_hwrm_stat_ctx_alloc +ffffffff818d8680 T bnxt_write_tx_doorbell +ffffffff818d86f0 T bnxt_write_rx_doorbell +ffffffff818d8770 T bnxt_hwrm_ring_grp_alloc +ffffffff818d8870 T bnxt_rx_fill +ffffffff818d8980 T bnxt_hwrm_ring_grp_free +ffffffff818d8a60 T bnxt_hwrm_ring_free +ffffffff818d8b50 T bnxt_hwrm_stat_ctx_free +ffffffff818d8c40 T bnxt_queue_down +ffffffff818d9320 T bnxt_up +ffffffff818d99f0 T bnxt_hwrm_vnic_ctx_alloc +ffffffff818d9ad0 T bnxt_hwrm_vnic_alloc +ffffffff818d9bd0 T bnxt_hwrm_vnic_cfg +ffffffff818d9d10 T bnxt_hwrm_vnic_cfg_placement +ffffffff818d9de0 T bnxt_hwrm_set_filter +ffffffff818d9f70 T bnxt_hwrm_vnic_rss_cfg +ffffffff818da050 T bnxt_iff +ffffffff818da1c0 T bnxt_hwrm_vnic_free +ffffffff818da2b0 T bnxt_hwrm_vnic_ctx_free +ffffffff818da3a0 T bnxt_down +ffffffff818da740 T bnxt_hwrm_free_filter +ffffffff818da820 T bnxt_hwrm_cfa_l2_set_rx_mask +ffffffff818da900 T bnxt_rxrinfo +ffffffff818daa50 T bnxt_get_sffpage +ffffffff818dad60 T bnxt_load_mbuf +ffffffff818dae10 T bnxt_handle_async_event +ffffffff818dae60 T bnxt_cpr_next_cmpl +ffffffff818daed0 T bnxt_cpr_commit +ffffffff818daf00 T bnxt_cpr_rollback +ffffffff818daf30 T bnxt_write_cp_doorbell_index +ffffffff818dafb0 T bnxt_rx +ffffffff818db290 T bnxt_txeof +ffffffff818db3c0 T bnxt_get_media_type +ffffffff818db920 T bnxt_add_media_type +ffffffff818dbaf0 T _hwrm_send_message +ffffffff818de9a0 T bnxt_rx_fill_slots +ffffffff818deb60 T bnxt_hwrm_err_map +ffffffff818deba0 T _bnxt_hwrm_set_async_event_bit +ffffffff818df000 t mcx_match +ffffffff818df030 t mcx_attach +ffffffff818e2110 T mcx_rx_fill +ffffffff818e2360 T mcx_load_mbuf +ffffffff818e2410 t mcx_dmamem_alloc +ffffffff818e2570 t mcx_pages +ffffffff818e2e50 t mcx_iff +ffffffff818e3290 t mcx_alloc_uar +ffffffff818e3480 t mcx_admin_intr +ffffffff818e3630 t mcx_create_eq +ffffffff818e3bc0 t mcx_ioctl +ffffffff818e46a0 t mcx_start +ffffffff818e4ba0 t mcx_watchdog +ffffffff818e4bd0 t mcx_media_change +ffffffff818e4e90 t mcx_media_status +ffffffff818e4fd0 t mcx_refill +ffffffff818e5040 t mcx_cq_intr +ffffffff818e5560 t mcx_calibrate +ffffffff818e5720 t mcx_port_change +ffffffff818e5860 t mcx_cmdq_post +ffffffff818e5940 t mcx_set_flow_table_entry_mac +ffffffff818e5e10 t mcx_delete_flow_table_entry +ffffffff818e6290 t mcx_access_hca_reg +ffffffff818e66c0 t mcx_cmdq_exec +ffffffff818e68c0 t mcx_up +ffffffff818e9bc0 t mcx_down +ffffffff818eac20 t mcx_create_flow_table +ffffffff818eafd0 t mcx_create_flow_group +ffffffff818eb4b0 t mcx_destroy_sq +ffffffff818eb760 t mcx_destroy_cq +ffffffff818eba20 t mcx_arm_cq +ffffffff818ebb40 t mcx_destroy_flow_table +ffffffff818ebea0 t mcx_kstat_attach_ppcnt +ffffffff818ebfd0 t mcx_kstat_ppcnt_read +ffffffff818ec0f0 t mcx_kstat_mtmp_read +ffffffff818ec280 t mcx_kstat_queue_read +ffffffff818ed710 t mcx_timecounter_read +ffffffff818ee000 t iavf_match +ffffffff818ee030 t iavf_attach +ffffffff818ee900 t iavf_reset +ffffffff818eebd0 t iavf_dmamem_alloc +ffffffff818eed30 t iavf_arq_fill +ffffffff818eefe0 t iavf_arq_timeout +ffffffff818ef010 t iavf_init_admin_queue +ffffffff818ef1c0 t iavf_get_version +ffffffff818ef3e0 t iavf_get_vf_resources +ffffffff818ef5b0 t iavf_config_irq_map +ffffffff818ef7a0 t iavf_intr +ffffffff818efe20 t iavf_ioctl +ffffffff818f09d0 t iavf_start +ffffffff818f0d20 t iavf_watchdog +ffffffff818f0d50 t iavf_media_change +ffffffff818f0d80 t iavf_media_status +ffffffff818f0e10 t iavf_arq_unfill +ffffffff818f0f10 t iavf_down +ffffffff818f1470 t iavf_up +ffffffff818f20e0 t iavf_queue_select +ffffffff818f22e0 t iavf_rxfill +ffffffff818f24e0 t iavf_rxrefill +ffffffff818f2500 t iavf_process_arq +ffffffff818f3000 T rge_match +ffffffff818f3030 T rge_attach +ffffffff818f3520 T rge_activate +ffffffff818f3660 T rge_intr +ffffffff818f3950 T rge_config_imtype +ffffffff818f39c0 T rge_exit_oob +ffffffff818f41e0 T rge_hw_init +ffffffff818f45d0 T rge_get_macaddr +ffffffff818f4650 T rge_set_phy_power +ffffffff818f48b0 T rge_phy_config +ffffffff818f51f0 T rge_allocmem +ffffffff818f5600 T rge_ioctl +ffffffff818f57b0 T rge_start +ffffffff818f5980 T rge_watchdog +ffffffff818f59c0 T rge_wol +ffffffff818f5bf0 T rge_tick +ffffffff818f5c70 T rge_txstart +ffffffff818f5ca0 T rge_ifmedia_upd +ffffffff818f6260 T rge_ifmedia_sts +ffffffff818f6350 T rge_add_media_types +ffffffff818f6400 T rge_kstat_attach +ffffffff818f66e0 T rge_wol_power +ffffffff818f67c0 T rge_rxeof +ffffffff818f6bc0 T rge_txeof +ffffffff818f6dc0 T rge_init +ffffffff818f7f80 T rge_setup_intr +ffffffff818f80f0 T rge_encap +ffffffff818f8390 T rge_stop +ffffffff818f85f0 T rge_iff +ffffffff818f8770 T rge_set_macaddr +ffffffff818f8840 T rge_rx_list_init +ffffffff818f8900 T rge_tx_list_init +ffffffff818f89c0 T rge_read_csi +ffffffff818f8c30 T rge_write_csi +ffffffff818f8eb0 T rge_write_mac_ocp +ffffffff818f8f00 T rge_read_mac_ocp +ffffffff818f8f80 T rge_reset +ffffffff818f9140 T rge_write_phy_ocp +ffffffff818f9200 T rge_read_phy_ocp +ffffffff818f92b0 T rge_read_phy +ffffffff818f9380 T rge_write_phy +ffffffff818f9460 T rge_get_link_status +ffffffff818f94c0 T rge_newbuf +ffffffff818f9640 T rge_discard_rxbuf +ffffffff818f96b0 T rge_fill_rx_ring +ffffffff818f9730 T rge_phy_config_mac_cfg2 +ffffffff818fb140 T rge_phy_config_mac_cfg3 +ffffffff818fcdf0 T rge_phy_config_mac_cfg4 +ffffffff81900e60 T rge_phy_config_mac_cfg5 +ffffffff81901950 T rge_patch_phy_mcu +ffffffff81901bd0 T rge_write_ephy +ffffffff81901e30 T rge_phy_config_mcu +ffffffff819028f0 T rge_read_ephy +ffffffff81902b70 T rge_disable_phy_ocp_pwrsave +ffffffff81902d40 T rge_disable_hw_im +ffffffff81902d70 T rge_disable_sim_im +ffffffff81902dd0 T rge_setup_sim_im +ffffffff81902e50 T rge_link_state +ffffffff81902ed0 t rge_kstat_read +ffffffff81903070 t rge_kstat_copy +ffffffff81904000 T igc_match +ffffffff81904030 T igc_attach +ffffffff819044a0 T igc_detach +ffffffff819046a0 T igc_identify_hardware +ffffffff81904710 T igc_allocate_pci_resources +ffffffff81904830 T igc_allocate_queues +ffffffff81904d20 T igc_is_valid_ether_addr +ffffffff81904d80 T igc_allocate_msix +ffffffff81904fe0 T igc_setup_interface +ffffffff81905220 T igc_reset +ffffffff81905360 T igc_update_link_status +ffffffff81905470 T igc_get_hw_control +ffffffff819054d0 T igc_release_hw_control +ffffffff81905530 T igc_free_pci_resources +ffffffff81905610 T igc_stop +ffffffff81905920 T igc_free_transmit_structures +ffffffff819059a0 T igc_free_receive_structures +ffffffff81905a60 T igc_setup_msix +ffffffff81905af0 T igc_dma_malloc +ffffffff81905c60 T igc_rxrefill +ffffffff81905d30 T igc_dma_free +ffffffff81905de0 T igc_init_dmac +ffffffff81906080 T igc_intr_queue +ffffffff81906190 T igc_intr_link +ffffffff81906310 T igc_ioctl +ffffffff819065f0 T igc_start +ffffffff81906a20 T igc_watchdog +ffffffff81906a50 T igc_media_change +ffffffff81906b60 T igc_media_status +ffffffff81906d10 T igc_init +ffffffff81907200 T igc_setup_transmit_structures +ffffffff819072c0 T igc_initialize_transmit_unit +ffffffff819074e0 T igc_setup_receive_structures +ffffffff81907660 T igc_initialize_receive_unit +ffffffff81907a30 T igc_iff +ffffffff81907b80 T igc_configure_queues +ffffffff81907d90 T igc_rxfill +ffffffff81907ec0 T igc_enable_intr +ffffffff81907f90 T igc_tx_ctx_setup +ffffffff819080a0 T igc_txeof +ffffffff81908260 T igc_disable_intr +ffffffff81908300 T igc_rxrinfo +ffffffff81908430 T igc_get_buf +ffffffff81908570 T igc_rxeof +ffffffff81908910 T igc_rx_checksum +ffffffff81908960 T igc_set_queues +ffffffff81908a40 T igc_enable_queue +ffffffff81908a70 T igc_allocate_transmit_buffers +ffffffff81908bd0 T igc_setup_transmit_ring +ffffffff81908d50 T igc_free_transmit_buffers +ffffffff81908e70 T igc_allocate_receive_buffers +ffffffff81908fa0 T igc_setup_receive_ring +ffffffff81909060 T igc_initialize_rss_mapping +ffffffff81909280 T igc_free_receive_buffers +ffffffff8190a000 T igc_init_mac_params +ffffffff8190a040 T igc_init_nvm_params +ffffffff8190a080 T igc_init_phy_params +ffffffff8190a0c0 T igc_set_mac_type +ffffffff8190a170 T igc_setup_init_funcs +ffffffff8190a2d0 T igc_update_mc_addr_list +ffffffff8190a310 T igc_check_for_link +ffffffff8190a350 T igc_reset_hw +ffffffff8190a390 T igc_init_hw +ffffffff8190a3d0 T igc_get_speed_and_duplex +ffffffff8190a410 T igc_rar_set +ffffffff8190a450 T igc_check_reset_block +ffffffff8190a490 T igc_get_phy_info +ffffffff8190a4d0 T igc_phy_hw_reset +ffffffff8190a510 T igc_read_mac_addr +ffffffff8190a540 T igc_validate_nvm_checksum +ffffffff8190b000 T igc_acquire_phy_base +ffffffff8190b030 T igc_release_phy_base +ffffffff8190b060 T igc_init_hw_base +ffffffff8190b160 T igc_power_down_phy_copper_base +ffffffff8190c000 T igc_init_nvm_params_i225 +ffffffff8190c180 T igc_acquire_nvm_i225 +ffffffff8190c250 T igc_release_nvm_i225 +ffffffff8190c2c0 T igc_get_flash_presence_i225 +ffffffff8190c310 T igc_read_nvm_srrd_i225 +ffffffff8190c3f0 T igc_write_nvm_srwr_i225 +ffffffff8190c5c0 T igc_validate_nvm_checksum_i225 +ffffffff8190c650 T igc_update_nvm_checksum_i225 +ffffffff8190c7f0 T igc_init_mac_params_i225 +ffffffff8190c8b0 T igc_reset_hw_i225 +ffffffff8190c9d0 T igc_init_hw_i225 +ffffffff8190c9e0 T igc_check_for_link_i225 +ffffffff8190caa0 T igc_acquire_swfw_sync_i225 +ffffffff8190cb80 T igc_release_swfw_sync_i225 +ffffffff8190cc00 T igc_setup_copper_link_i225 +ffffffff8190cc90 T igc_init_phy_params_i225 +ffffffff8190cd70 T igc_get_hw_semaphore_i225 +ffffffff8190cf20 T __igc_write_nvm_srwr +ffffffff8190d050 T igc_update_flash_i225 +ffffffff8190d420 T igc_set_flsw_flash_burst_counter_i225 +ffffffff8190d480 T igc_write_erase_flash_command_i225 +ffffffff8190d580 T igc_pool_flash_update_done_i225 +ffffffff8190d610 T igc_set_ltr_i225 +ffffffff8190d880 T igc_init_function_pointers_i225 +ffffffff8190d8f0 T igc_set_eee_i225 +ffffffff8190e000 T igc_init_mac_ops_generic +ffffffff8190e050 T igc_null_ops_generic +ffffffff8190e080 T igc_config_collision_dist_generic +ffffffff8190e0f0 T igc_rar_set_generic +ffffffff8190e1d0 T igc_write_vfta_generic +ffffffff8190e220 T igc_init_rx_addrs_generic +ffffffff8190e2c0 T igc_check_alt_mac_addr_generic +ffffffff8190e440 T igc_hash_mc_addr_generic +ffffffff8190e4e0 T igc_update_mc_addr_list_generic +ffffffff8190e650 T igc_clear_hw_cntrs_base_generic +ffffffff8190ea40 T igc_setup_link_generic +ffffffff8190ebd0 T igc_set_fc_watermarks_generic +ffffffff8190ec80 T igc_force_mac_fc_generic +ffffffff8190ed40 T igc_config_fc_after_link_up_generic +ffffffff8190ef60 T igc_get_speed_and_duplex_copper_generic +ffffffff8190f000 T igc_put_hw_semaphore_generic +ffffffff8190f050 T igc_get_auto_rd_done_generic +ffffffff8190f2a0 T igc_disable_pcie_master_generic +ffffffff81910000 T igc_init_nvm_ops_generic +ffffffff81910080 T igc_null_read_nvm +ffffffff819100b0 T igc_null_nvm_generic +ffffffff819100e0 T igc_reload_nvm_generic +ffffffff81910160 T igc_null_write_nvm +ffffffff81910190 T igc_poll_eerd_eewr_done +ffffffff81910230 T igc_read_nvm_eerd +ffffffff81910360 T igc_read_mac_addr_generic +ffffffff81910440 T igc_validate_nvm_checksum_generic +ffffffff81911000 T igc_init_phy_ops_generic +ffffffff819110f0 T igc_null_set_page +ffffffff81911120 T igc_null_read_reg +ffffffff81911150 T igc_null_phy_generic +ffffffff81911180 T igc_null_lplu_state +ffffffff819111b0 T igc_null_write_reg +ffffffff819111e0 T igc_check_reset_block_generic +ffffffff81911240 T igc_get_phy_id +ffffffff819112f0 T igc_read_phy_reg_mdic +ffffffff81911400 T igc_write_phy_reg_mdic +ffffffff81911500 T igc_phy_setup_autoneg +ffffffff81911700 T igc_copper_link_autoneg +ffffffff81911850 T igc_wait_autoneg +ffffffff81911920 T igc_setup_copper_link_generic +ffffffff81911a30 T igc_phy_has_link_generic +ffffffff81911b50 T igc_check_downshift_generic +ffffffff81911b80 T igc_phy_hw_reset_generic +ffffffff81911d20 T igc_power_up_phy_copper +ffffffff81911db0 T igc_power_down_phy_copper +ffffffff81911e40 T igc_write_phy_reg_gpy +ffffffff81912030 T igc_write_xmdio_reg +ffffffff81912130 T igc_read_phy_reg_gpy +ffffffff81912330 T igc_read_xmdio_reg +ffffffff81912420 T __igc_access_xmdio_reg +ffffffff81913000 T ngbe_match +ffffffff81913030 T ngbe_attach +ffffffff81913560 T ngbe_detach +ffffffff819137c0 T ngbe_allocate_pci_resources +ffffffff819138c0 T ngbe_allocate_queues +ffffffff81913dc0 T ngbe_allocate_isb +ffffffff81913e50 T ngbe_init_shared_code +ffffffff81914120 T ngbe_check_flash_load +ffffffff819143c0 T ngbe_allocate_msix +ffffffff81914600 T ngbe_setup_interface +ffffffff81914800 T ngbe_free_isb +ffffffff819148e0 T ngbe_free_transmit_structures +ffffffff81914960 T ngbe_free_receive_structures +ffffffff81914a20 T ngbe_free_pci_resources +ffffffff81914ab0 T ngbe_stop +ffffffff81915070 T ngbe_release_hw_control +ffffffff819150f0 T ngbe_init +ffffffff81915760 T ngbe_setup_isb +ffffffff819157d0 T ngbe_configure_pb +ffffffff819158b0 T ngbe_iff +ffffffff81915aa0 T ngbe_setup_vlan_hw_support +ffffffff81915b60 T ngbe_setup_transmit_structures +ffffffff81915c20 T ngbe_initialize_transmit_unit +ffffffff81915fb0 T ngbe_setup_receive_structures +ffffffff819160d0 T ngbe_initialize_receive_unit +ffffffff81916590 T ngbe_get_hw_control +ffffffff81916610 T ngbe_setup_gpie +ffffffff81916640 T ngbe_configure_ivars +ffffffff81916870 T ngbe_non_sfp_link_config +ffffffff81916920 T ngbe_enable_intr +ffffffff81916ad0 T ngbe_ioctl +ffffffff81916d30 T ngbe_rxrinfo +ffffffff81916e80 T ngbe_disable_intr +ffffffff81916f40 T ngbe_media_change +ffffffff81916fe0 T ngbe_media_status +ffffffff819170e0 T ngbe_update_link_status +ffffffff81917300 T ngbe_rxfill +ffffffff81917430 T ngbe_get_buf +ffffffff81917570 T ngbe_start +ffffffff81917710 T ngbe_encap +ffffffff81917920 T ngbe_disable_pcie_master +ffffffff819179e0 T ngbe_reset +ffffffff81917a40 T ngbe_set_rx_drop_en +ffffffff81917b50 T ngbe_watchdog +ffffffff81917c20 T ngbe_setup_msix +ffffffff81917cb0 T ngbe_intr_queue +ffffffff81917da0 T ngbe_intr_link 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drm_atomic_helper_prepare_planes +ffffffff8192bf60 T drm_atomic_helper_setup_commit +ffffffff8192c7f0 t commit_work +ffffffff8192c810 T drm_atomic_helper_swap_state +ffffffff8192ce80 t commit_tail +ffffffff8192d160 t release_crtc_commit +ffffffff8192d1a0 T drm_atomic_helper_wait_for_dependencies +ffffffff8192d3a0 T drm_atomic_helper_commit_cleanup_done +ffffffff8192d610 T drm_atomic_helper_commit_planes_on_crtc +ffffffff8192d840 T drm_atomic_helper_disable_planes_on_crtc +ffffffff8192d9a0 T drm_atomic_helper_update_plane +ffffffff8192dad0 T drm_atomic_helper_disable_plane +ffffffff8192db90 T drm_atomic_helper_set_config +ffffffff8192dc40 T drm_atomic_helper_disable_all +ffffffff8192ddf0 T drm_atomic_helper_shutdown +ffffffff8192df40 T drm_atomic_helper_duplicate_state +ffffffff8192e0b0 T drm_atomic_helper_suspend +ffffffff8192e200 T drm_atomic_helper_commit_duplicated_state +ffffffff8192e340 T drm_atomic_helper_resume +ffffffff8192e470 T drm_atomic_helper_page_flip +ffffffff8192e530 t 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__drm_atomic_helper_connector_state_reset +ffffffff8192f810 T __drm_atomic_helper_connector_reset +ffffffff8192f850 T drm_atomic_helper_connector_reset +ffffffff8192f920 T __drm_atomic_helper_connector_destroy_state +ffffffff8192f980 T drm_atomic_helper_connector_tv_reset +ffffffff8192f9e0 T __drm_atomic_helper_connector_duplicate_state +ffffffff8192fa70 T drm_atomic_helper_connector_duplicate_state +ffffffff8192fb50 T drm_atomic_helper_connector_destroy_state +ffffffff8192fbc0 T __drm_atomic_helper_private_obj_duplicate_state +ffffffff8192fc00 T __drm_atomic_helper_bridge_duplicate_state +ffffffff8192fc40 T drm_atomic_helper_bridge_duplicate_state +ffffffff8192fcf0 T drm_atomic_helper_bridge_destroy_state +ffffffff8192fd10 T __drm_atomic_helper_bridge_reset +ffffffff8192fd60 T drm_atomic_helper_bridge_reset +ffffffff81930000 T drm_atomic_set_mode_for_crtc +ffffffff81930200 T drm_atomic_set_mode_prop_for_crtc +ffffffff81930490 T drm_atomic_set_crtc_for_plane +ffffffff81930600 T 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drm_atomic_bridge_chain_check +ffffffff81935f50 T drm_bridge_detect +ffffffff81935fb0 T drm_bridge_get_modes +ffffffff81936010 T drm_bridge_get_edid +ffffffff81936070 T drm_bridge_hpd_enable +ffffffff81936140 T drm_bridge_hpd_disable +ffffffff819361e0 T drm_bridge_hpd_notify +ffffffff81936240 t drm_bridge_atomic_duplicate_priv_state +ffffffff81936260 t drm_bridge_atomic_destroy_priv_state +ffffffff81936280 t select_bus_fmt_recursive +ffffffff81937000 T drm_buddy_init +ffffffff81937470 T drm_buddy_fini +ffffffff81937570 T drm_get_buddy +ffffffff819375b0 T drm_buddy_free_block +ffffffff81937750 T drm_buddy_free_list +ffffffff819377e0 T drm_buddy_block_trim +ffffffff81937a30 t __alloc_range +ffffffff81937e00 T drm_buddy_alloc_blocks +ffffffff819386a0 T drm_buddy_block_print +ffffffff819386e0 T drm_buddy_print +ffffffff81938850 T drm_buddy_module_exit +ffffffff81938870 T drm_buddy_module_init +ffffffff819388d0 t split_block +ffffffff81939000 T drm_clflush_pages +ffffffff81939120 T drm_clflush_sg +ffffffff81939270 T drm_clflush_virt_range +ffffffff81939340 T drm_need_swiotlb +ffffffff81939370 T drm_memcpy_from_wc +ffffffff81939710 T drm_memcpy_init_early +ffffffff8193a000 T drm_client_init +ffffffff8193a110 T drm_client_register +ffffffff8193a180 T drm_client_release +ffffffff8193a220 T drm_client_dev_unregister +ffffffff8193a310 T drm_client_dev_hotplug +ffffffff8193a3f0 T drm_client_dev_restore +ffffffff8193a4d0 T drm_client_buffer_vmap +ffffffff8193a540 T drm_client_buffer_vunmap +ffffffff8193a560 T drm_client_framebuffer_create +ffffffff8193a840 T drm_client_framebuffer_delete +ffffffff8193a950 T drm_client_framebuffer_flush +ffffffff8193b000 T drm_client_modeset_create +ffffffff8193b140 T drm_client_modeset_free +ffffffff8193b260 T drm_client_modeset_probe +ffffffff8193ca30 t drm_client_pick_crtcs +ffffffff8193cd20 T drm_client_rotation +ffffffff8193cec0 T drm_client_modeset_check +ffffffff8193cf60 t drm_client_modeset_commit_atomic +ffffffff8193d160 T drm_client_modeset_commit_locked +ffffffff8193d300 T drm_client_modeset_commit +ffffffff8193d370 T drm_client_modeset_dpms +ffffffff8193d5c0 t drm_connector_pick_cmdline_mode +ffffffff8193e000 T drm_color_ctm_s31_32_to_qm_n +ffffffff8193e0e0 T drm_crtc_enable_color_mgmt +ffffffff8193e1c0 T drm_mode_crtc_set_gamma_size +ffffffff8193e2e0 T drm_mode_gamma_set_ioctl +ffffffff8193e7d0 T drm_mode_gamma_get_ioctl +ffffffff8193e910 T drm_get_color_encoding_name +ffffffff8193e980 T drm_get_color_range_name +ffffffff8193e9f0 T drm_plane_create_color_properties +ffffffff8193ec50 T drm_color_lut_check +ffffffff8193f000 T drm_connector_ida_init +ffffffff8193f110 T drm_connector_ida_destroy +ffffffff8193f220 T drm_get_connector_type_name +ffffffff8193f260 T drm_connector_free_work_fn +ffffffff8193f320 T drm_connector_init +ffffffff8193f3a0 t __drm_connector_init +ffffffff8193f8b0 T drm_connector_init_with_ddc +ffffffff8193f940 T drmm_connector_init +ffffffff8193fa00 t drm_connector_cleanup_action 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drm_get_tv_subconnector_name +ffffffff81940900 T drm_get_dp_subconnector_name +ffffffff81940990 T drm_connector_create_standard_properties +ffffffff81940b10 T drm_mode_create_dvi_i_properties +ffffffff81940bb0 T drm_connector_attach_dp_subconnector_property +ffffffff81940c20 T drm_connector_attach_content_type_property +ffffffff81940cc0 T drm_mode_create_content_type_property +ffffffff81940d40 T drm_connector_attach_tv_margin_properties +ffffffff81940db0 T drm_mode_create_tv_margin_properties +ffffffff81940ed0 T drm_mode_create_tv_properties +ffffffff81941130 T drm_mode_create_scaling_mode_property +ffffffff819411a0 T drm_connector_attach_vrr_capable_property +ffffffff81941230 T drm_connector_attach_scaling_mode_property +ffffffff81941400 T drm_mode_create_aspect_ratio_property +ffffffff81941480 T drm_mode_create_hdmi_colorspace_property +ffffffff81941500 T drm_mode_create_dp_colorspace_property +ffffffff81941580 T drm_mode_create_suggested_offset_properties +ffffffff81941650 T drm_connector_set_path_property +ffffffff819416b0 T drm_connector_set_tile_property +ffffffff81941800 T drm_connector_set_link_status_property +ffffffff81941850 T drm_connector_attach_max_bpc_property +ffffffff81941910 T drm_connector_attach_hdr_output_metadata_property +ffffffff81941960 T drm_connector_attach_colorspace_property +ffffffff819419b0 T drm_connector_atomic_hdr_metadata_equal +ffffffff81941a20 T drm_connector_set_vrr_capable_property +ffffffff81941a70 T drm_connector_set_panel_orientation +ffffffff81941b30 T drm_connector_set_panel_orientation_with_quirk +ffffffff81941c10 T drm_connector_set_orientation_from_panel +ffffffff81941d00 T drm_connector_create_privacy_screen_properties +ffffffff81941da0 T drm_connector_attach_privacy_screen_properties +ffffffff81941e10 T drm_connector_attach_privacy_screen_provider +ffffffff81941f20 t drm_connector_privacy_screen_notifier +ffffffff81941fc0 T drm_connector_update_privacy_screen +ffffffff81942030 T drm_connector_set_obj_prop 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drm_mode_setcrtc +ffffffff81944730 T drm_mode_crtc_set_obj_prop +ffffffff819447b0 T drm_crtc_create_scaling_filter_property +ffffffff81944820 t drm_crtc_fence_get_driver_name +ffffffff819448a0 t drm_crtc_fence_get_timeline_name +ffffffff81944910 t kasprintf +ffffffff819449e0 t drmm_crtc_init_with_planes_cleanup +ffffffff81945000 T drm_helper_encoder_in_use +ffffffff81945180 T drm_helper_crtc_in_use +ffffffff819452b0 T drm_helper_disable_unused_functions +ffffffff81945330 t __drm_helper_disable_unused_functions +ffffffff81945430 T drm_crtc_helper_set_mode +ffffffff819458e0 T drm_connector_get_single_encoder +ffffffff819459e0 T drm_crtc_helper_set_config +ffffffff81946600 T drm_helper_connector_dpms +ffffffff819468f0 T drm_helper_resume_force_mode +ffffffff81946be0 T drm_helper_force_disable_all +ffffffff81946cb0 t drm_encoder_disable +ffffffff81947000 T drm_atomic_helper_check_plane_damage +ffffffff819470a0 T drm_atomic_helper_dirtyfb +ffffffff81947350 T drm_atomic_helper_damage_iter_init +ffffffff819474a0 T drm_atomic_helper_damage_iter_next +ffffffff81947540 T drm_atomic_helper_damage_merged +ffffffff81948000 T displayid_iter_edid_begin +ffffffff81948050 T __displayid_iter_next +ffffffff819482e0 T displayid_iter_end +ffffffff81949000 T drm_mode_create_dumb +ffffffff819490c0 T drm_mode_create_dumb_ioctl +ffffffff81949180 T drm_mode_mmap_dumb_ioctl +ffffffff819491f0 T drm_mode_destroy_dumb +ffffffff81949260 T drm_mode_destroy_dumb_ioctl +ffffffff8194a000 T drm_edid_header_is_valid +ffffffff8194a080 T drm_edid_are_equal +ffffffff8194a0f0 T drm_edid_block_valid +ffffffff8194a300 t edid_block_check +ffffffff8194a430 t edid_block_status_print +ffffffff8194a530 T drm_edid_is_valid +ffffffff8194a5b0 T drm_edid_override_set +ffffffff8194a620 T drm_connector_update_edid_property +ffffffff8194a7d0 T drm_edid_override_reset +ffffffff8194a900 T drm_add_override_edid_modes +ffffffff8194aae0 T drm_add_edid_modes +ffffffff8194abd0 T drm_do_get_edid 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drm_detect_hdmi_monitor +ffffffff8194cde0 T drm_detect_monitor_audio +ffffffff8194cff0 T drm_default_rgb_quant_range +ffffffff8194d030 T drm_edid_connector_update +ffffffff8194d090 t _drm_edid_connector_update +ffffffff8194ef40 t _drm_update_tile_info +ffffffff8194f1d0 t _drm_edid_connector_property_update +ffffffff8194f380 T drm_add_modes_noedid +ffffffff8194f470 T drm_set_preferred_mode +ffffffff8194f4d0 T drm_hdmi_avi_infoframe_from_display_mode +ffffffff8194f750 T drm_hdmi_avi_infoframe_quant_range +ffffffff8194f7f0 T drm_hdmi_vendor_infoframe_from_display_mode +ffffffff8194f8b0 t connector_bad_edid +ffffffff8194fa70 t drm_for_each_detailed_block +ffffffff8194fcc0 t __cea_db_iter_next +ffffffff8194ff60 t update_display_info +ffffffff81950de0 t get_monitor_range +ffffffff81950e80 t do_detailed_mode +ffffffff819517a0 t hdmi_mode_alternate_clock +ffffffff81951850 t do_cvt_mode +ffffffff81951aa0 t drm_mode_std +ffffffff819527b0 t do_standard_modes +ffffffff81952900 t drm_monitor_supports_rb +ffffffff81952bf0 t drm_gtf2_hbreak +ffffffff81952e80 t do_established_modes +ffffffff81953080 t drm_match_hdmi_mode +ffffffff819532c0 t do_inferred_modes +ffffffff81953830 t mode_in_range +ffffffff81954000 T drm_encoder_register_all +ffffffff81954090 T drm_encoder_unregister_all +ffffffff81954100 T drm_encoder_init +ffffffff819541d0 t __drm_encoder_init +ffffffff81954390 T drm_encoder_cleanup +ffffffff819544c0 T __drmm_encoder_alloc +ffffffff819545e0 T drmm_encoder_init +ffffffff819546c0 T drm_mode_getencoder +ffffffff81954820 t kasprintf +ffffffff819548f0 t drmm_encoder_alloc_release +ffffffff81955000 T drm_i2c_encoder_dpms +ffffffff81955020 T drm_i2c_encoder_mode_fixup +ffffffff81955060 T drm_i2c_encoder_prepare +ffffffff81955080 T drm_i2c_encoder_commit +ffffffff819550a0 T drm_i2c_encoder_mode_set +ffffffff819550c0 T drm_i2c_encoder_detect +ffffffff819550e0 T drm_i2c_encoder_save +ffffffff81955100 T drm_i2c_encoder_restore +ffffffff81956000 T drm_fb_helper_debug_enter +ffffffff81956100 T drm_fb_helper_debug_leave +ffffffff81956270 T drm_fb_helper_restore_fbdev_mode_unlocked +ffffffff81956310 T drm_fb_helper_blank +ffffffff819563a0 T drm_fb_helper_prepare +ffffffff81956480 t drm_fb_helper_resume_worker +ffffffff819564b0 t drm_fb_helper_damage_work +ffffffff81956830 T drm_fb_helper_init +ffffffff819568a0 T drm_fb_helper_alloc_fbi +ffffffff81956900 T drm_fb_helper_unregister_fbi +ffffffff81956930 T drm_fb_helper_fini +ffffffff81956a30 T drm_fb_helper_set_suspend +ffffffff81956a60 T drm_fb_helper_set_suspend_unlocked +ffffffff81956a90 T drm_fb_helper_set_par +ffffffff81956b80 T drm_fb_helper_pan_display +ffffffff81956c50 T drm_fb_helper_fill_info +ffffffff81956d10 T drm_fb_helper_initial_config +ffffffff81956d40 t __drm_fb_helper_initial_config_and_unlock +ffffffff81957290 T drm_fb_helper_hotplug_event +ffffffff81957490 t drm_setup_crtcs_fb +ffffffff819575d0 T drm_fb_helper_lastclose +ffffffff81957680 T drm_fb_helper_output_poll_changed +ffffffff819576a0 T drm_fbdev_generic_setup +ffffffff81957850 t drm_fbdev_client_hotplug +ffffffff81957a80 t drm_fbdev_client_unregister +ffffffff81957af0 t drm_fbdev_client_restore +ffffffff81957b90 t drm_fbdev_cleanup +ffffffff81957c30 t drm_fbdev_use_shadow_fb +ffffffff81957c80 t drm_fb_helper_generic_probe +ffffffff81958000 T drm_dev_needs_global_mutex +ffffffff81958060 T drm_file_alloc +ffffffff819582d0 T drm_file_free +ffffffff81958500 T drm_lastclose +ffffffff81958570 T drm_release +ffffffff819585c0 T drm_release_noglobal +ffffffff81958610 T drm_read +ffffffff81958660 T drm_event_reserve_init_locked +ffffffff819586e0 T drm_event_reserve_init +ffffffff819587a0 T drm_event_cancel_free +ffffffff81958820 T drm_send_event_timestamp_locked +ffffffff81958830 t drm_send_event_helper +ffffffff81958a10 T drm_send_event_locked +ffffffff81958a30 T drm_send_event +ffffffff81958a80 T mock_drm_getfile +ffffffff81959000 T drm_flip_work_allocate_task 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drm_fb_xrgb8888_to_gray8_line +ffffffff8195ad30 T drm_fb_blit +ffffffff8195b180 T drm_fb_xrgb8888_to_mono +ffffffff8195b510 T drm_fb_build_fourcc_list +ffffffff8195b840 t drm_fb_rgb888_to_xrgb8888_line +ffffffff8195b910 t drm_fb_rgb565_to_xrgb8888_line +ffffffff8195c000 T drm_mode_legacy_fb_format +ffffffff8195c0f0 T drm_driver_legacy_fb_format +ffffffff8195c1f0 T __drm_format_info +ffffffff8195c270 T drm_format_info +ffffffff8195c330 T drm_get_format_info +ffffffff8195c410 T drm_format_info_block_width +ffffffff8195c460 T drm_format_info_block_height +ffffffff8195c4b0 T drm_format_info_bpp +ffffffff8195c530 T drm_format_info_min_pitch +ffffffff8195d000 T drm_framebuffer_check_src_coords +ffffffff8195d120 T drm_mode_addfb +ffffffff8195d330 T drm_mode_addfb2 +ffffffff8195d420 T drm_mode_addfb_ioctl +ffffffff8195d440 T drm_internal_framebuffer_create +ffffffff8195d960 T drm_mode_addfb2_ioctl +ffffffff8195da50 T drm_mode_rmfb +ffffffff8195dc20 T drm_framebuffer_lookup +ffffffff8195dc70 t drm_mode_rmfb_work_fn +ffffffff8195dd30 T drm_mode_rmfb_ioctl +ffffffff8195dd50 T drm_mode_getfb +ffffffff8195deb0 T drm_mode_getfb2_ioctl +ffffffff8195e260 T drm_mode_dirtyfb_ioctl +ffffffff8195e400 T drm_fb_release +ffffffff8195e510 T drm_framebuffer_free +ffffffff8195e550 T drm_framebuffer_init +ffffffff8195e6b0 T drm_framebuffer_unregister_private +ffffffff8195e6f0 T drm_framebuffer_cleanup +ffffffff8195e750 T drm_framebuffer_remove +ffffffff8195ec00 T drm_framebuffer_plane_width +ffffffff8195ec50 T drm_framebuffer_plane_height +ffffffff8195eca0 T drm_framebuffer_print_info +ffffffff8195f000 T drm_ref +ffffffff8195f030 T drm_unref +ffffffff8195f0b0 T drm_fault +ffffffff8195f270 T drm_flush +ffffffff8195f2a0 T udv_attach_drm +ffffffff8195f4c0 T drm_gem_init +ffffffff8195f570 t drm_gem_init_release +ffffffff8195f590 T drm_gem_object_init +ffffffff8195f6f0 T drm_gem_private_object_init +ffffffff8195f7f0 T drm_gem_handle_delete +ffffffff8195f8e0 t drm_gem_object_release_handle +ffffffff8195f970 T drm_gem_dumb_map_offset +ffffffff8195faa0 T drm_gem_object_lookup +ffffffff8195fb20 T drm_gem_create_mmap_offset +ffffffff8195fb50 T drm_gem_dumb_destroy +ffffffff8195fb70 T drm_gem_handle_create_tail +ffffffff8195fce0 t drm_gem_object_handle_put_unlocked +ffffffff8195fe30 T drm_gem_handle_create +ffffffff8195fe80 T drm_gem_free_mmap_offset +ffffffff8195feb0 T drm_gem_create_mmap_offset_size +ffffffff8195fee0 T drm_gem_get_pages +ffffffff8195ff30 T drm_gem_put_pages +ffffffff8195ff60 T drm_gem_objects_lookup +ffffffff819600d0 T drm_gem_dma_resv_wait +ffffffff81960210 T drm_gem_close_ioctl +ffffffff81960260 T drm_gem_flink_ioctl +ffffffff819603d0 T drm_gem_open_ioctl +ffffffff81960500 T drm_gem_open +ffffffff81960530 T drm_gem_release +ffffffff81960570 T drm_gem_object_release +ffffffff819606c0 T drm_gem_lru_remove +ffffffff819607a0 T drm_gem_object_free +ffffffff819607f0 T drm_gem_mmap_obj +ffffffff81960900 T drm_gem_mmap +ffffffff81960b80 T drm_gem_print_info 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T kthread_queue_work +ffffffff81966940 T kthread_cancel_work_sync +ffffffff81966980 T kthread_flush_work +ffffffff819669c0 T kthread_flush_worker +ffffffff81966a00 T kthread_lookup +ffffffff81966a80 T kthread_should_park +ffffffff81966b10 T kthread_parkme +ffffffff81966be0 T kthread_park +ffffffff81966cc0 T kthread_unpark +ffffffff81966d20 T kthread_should_stop +ffffffff81966db0 T kthread_stop +ffffffff81966ef0 T dmi_match +ffffffff81966fa0 T dmi_first_match +ffffffff81967080 T dmi_get_system_info +ffffffff819670f0 T dmi_check_system +ffffffff819671f0 T alloc_pages +ffffffff819672c0 T __free_pages +ffffffff819673c0 T __pagevec_release +ffffffff81967470 T kmap +ffffffff819674b0 T kunmap_va +ffffffff819674d0 T kmap_atomic_prot +ffffffff81967560 T kunmap_atomic +ffffffff819675e0 T vmap +ffffffff819676c0 T vunmap +ffffffff81967710 T is_vmalloc_addr +ffffffff81967750 T print_hex_dump +ffffffff81967820 T memchr_inv +ffffffff81967870 T panic_cmp +ffffffff81967890 T linux_root_RB_INSERT_COLOR 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dma_fence_array_get_timeline_name +ffffffff8196be70 t dma_fence_array_enable_signaling +ffffffff8196bf70 t dma_fence_array_signaled +ffffffff8196bfc0 t dma_fence_array_release +ffffffff8196c080 T dma_fence_chain_find_seqno +ffffffff8196c1a0 T dma_fence_chain_walk +ffffffff8196c3e0 T dma_fence_chain_init +ffffffff8196c4f0 t dma_fence_chain_get_driver_name +ffffffff8196c520 t dma_fence_chain_get_timeline_name +ffffffff8196c550 t dma_fence_chain_enable_signaling +ffffffff8196c700 t dma_fence_chain_signaled +ffffffff8196c7f0 t dma_fence_chain_release +ffffffff8196c930 T dma_fence_is_container +ffffffff8196c980 T dmabuf_read +ffffffff8196c9b0 T dmabuf_write +ffffffff8196c9e0 T dmabuf_ioctl +ffffffff8196ca10 T dmabuf_kqfilter +ffffffff8196ca40 T dmabuf_stat +ffffffff8196cb00 T dmabuf_close +ffffffff8196cb70 T dmabuf_seek +ffffffff8196cc00 T dma_buf_export +ffffffff8196ccb0 T dma_buf_get +ffffffff8196cd40 T dma_buf_put +ffffffff8196cdf0 T dma_buf_fd +ffffffff8196cf10 T get_dma_buf +ffffffff8196cf50 T pcie_get_speed_cap +ffffffff8196d0f0 T printk +ffffffff8196d180 T pcie_get_width_cap +ffffffff8196d270 T pcie_aspm_enabled +ffffffff8196d300 T autoremove_wake_function +ffffffff8196d380 T wait_on_bit +ffffffff8196d450 T wait_on_bit_timeout +ffffffff8196d520 T wake_up_bit +ffffffff8196d560 T clear_and_wake_up_bit +ffffffff8196d5b0 T bit_waitqueue +ffffffff8196d5e0 T __var_waitqueue +ffffffff8196d610 T drm_linux_init +ffffffff8196d780 T drm_linux_exit +ffffffff8196d7e0 T pci_resize_resource +ffffffff8196d940 T register_shrinker +ffffffff8196d990 T unregister_shrinker +ffffffff8196d9f0 T drmbackoff +ffffffff8196da80 T bitmap_zalloc +ffffffff8196dab0 T bitmap_free +ffffffff8196dad0 T atomic_dec_and_mutex_lock +ffffffff8196db50 T interval_tree_iter_first +ffffffff8196dc00 T interval_tree_remove +ffffffff8196dc20 T interval_tree_insert +ffffffff8196dc90 T syncfile_read +ffffffff8196dcc0 T syncfile_write +ffffffff8196dcf0 T syncfile_ioctl +ffffffff8196dd20 T syncfile_kqfilter +ffffffff8196dd50 T syncfile_stat +ffffffff8196de00 T syncfile_close +ffffffff8196dea0 T syncfile_seek +ffffffff8196df20 T fd_install +ffffffff8196dff0 T fput +ffffffff8196e050 T get_unused_fd_flags +ffffffff8196e160 T put_unused_fd +ffffffff8196e1f0 T sync_file_get_fence +ffffffff8196e2a0 T sync_file_create +ffffffff8196e340 T drm_firmware_drivers_only +ffffffff8196e370 t dma_fence_stub_get_name +ffffffff8196e3a0 t dma_fence_array_cb_func +ffffffff8196e420 t dma_fence_chain_cb +ffffffff8196e4e0 t dma_fence_chain_timo +ffffffff8196f000 T drmm_kzalloc +ffffffff8196f100 T drmm_kcalloc +ffffffff8196f210 T drmm_kstrdup +ffffffff8196f350 T drmm_kfree +ffffffff8196f450 T drmm_add_action +ffffffff8196f510 T drmm_add_action_or_reset +ffffffff8196f5e0 T drm_managed_release +ffffffff8196f6a0 T drmm_add_final_kfree +ffffffff81970000 T mipi_dsi_attach +ffffffff81970050 T mipi_dsi_detach +ffffffff819700a0 T devm_mipi_dsi_attach +ffffffff81970110 T mipi_dsi_packet_format_is_short +ffffffff81970160 T mipi_dsi_packet_format_is_long +ffffffff819701b0 T mipi_dsi_create_packet +ffffffff819702c0 T mipi_dsi_shutdown_peripheral +ffffffff81970370 T mipi_dsi_turn_on_peripheral +ffffffff81970420 T mipi_dsi_set_maximum_return_packet_size +ffffffff819704d0 T mipi_dsi_compression_mode +ffffffff81970580 T mipi_dsi_picture_parameter_set +ffffffff81970630 T mipi_dsi_generic_write +ffffffff819706f0 T mipi_dsi_generic_read +ffffffff819707a0 T mipi_dsi_dcs_write_buffer +ffffffff81970860 T mipi_dsi_dcs_write +ffffffff819709b0 T mipi_dsi_dcs_read +ffffffff81970a50 T mipi_dsi_dcs_nop +ffffffff81970b00 T mipi_dsi_dcs_soft_reset +ffffffff81970bb0 T mipi_dsi_dcs_get_power_mode +ffffffff81970c70 T mipi_dsi_dcs_get_pixel_format +ffffffff81970d30 T mipi_dsi_dcs_enter_sleep_mode +ffffffff81970de0 T mipi_dsi_dcs_exit_sleep_mode +ffffffff81970e90 T mipi_dsi_dcs_set_display_off +ffffffff81970f40 T mipi_dsi_dcs_set_display_on +ffffffff81970ff0 T mipi_dsi_dcs_set_column_address +ffffffff819710b0 T mipi_dsi_dcs_set_page_address +ffffffff81971170 T mipi_dsi_dcs_set_tear_off +ffffffff81971220 T mipi_dsi_dcs_set_tear_on +ffffffff819712d0 T mipi_dsi_dcs_set_pixel_format +ffffffff81972000 T __drm_mm_interval_first +ffffffff819720c0 T drm_mm_reserve_node +ffffffff81972370 t add_hole +ffffffff819724d0 T drm_mm_insert_node_in_range +ffffffff81972ac0 T drm_mm_remove_node +ffffffff81972bf0 T drm_mm_replace_node +ffffffff81972dd0 T drm_mm_scan_init_with_range +ffffffff81972e50 T drm_mm_scan_add_block +ffffffff81972fc0 T drm_mm_scan_remove_block +ffffffff81973040 T drm_mm_scan_color_evict +ffffffff81973120 T drm_mm_init +ffffffff819731d0 T drm_mm_takedown +ffffffff81973210 T drm_mm_print +ffffffff81974000 T drm_modeset_register_all +ffffffff819740a0 T drm_modeset_unregister_all +ffffffff819740e0 T drm_mode_getresources +ffffffff81974390 T drm_mode_config_reset +ffffffff819744f0 T drmm_mode_config_init +ffffffff81974b70 T drm_mode_config_cleanup +ffffffff81974eb0 t drm_mode_config_init_release +ffffffff81974ec0 T drm_mode_config_validate +ffffffff81976000 T __drm_mode_object_add +ffffffff81976100 T drm_mode_object_add +ffffffff819761e0 T drm_mode_object_register +ffffffff81976230 T drm_mode_object_unregister +ffffffff819762d0 T drm_mode_object_lease_required +ffffffff81976320 T __drm_mode_object_find +ffffffff819763d0 T drm_mode_object_find +ffffffff81976480 T drm_mode_object_put +ffffffff81976500 T drm_mode_object_get +ffffffff81976560 T drm_object_attach_property +ffffffff81976670 T drm_object_property_set_value +ffffffff81976750 T drm_object_property_get_value +ffffffff819767e0 t __drm_object_property_get_value +ffffffff819768c0 T drm_object_property_get_default_value +ffffffff81976990 T drm_mode_object_get_properties +ffffffff81976ae0 T drm_mode_obj_get_properties_ioctl +ffffffff81976d30 T drm_mode_obj_find_prop_id +ffffffff81976d90 T drm_mode_obj_set_property_ioctl +ffffffff81978000 T drm_mode_debug_printmodeline +ffffffff81978140 T drm_mode_vrefresh +ffffffff819781e0 T drm_mode_create +ffffffff81978200 T drm_mode_destroy +ffffffff81978240 T drm_mode_probed_add +ffffffff819782e0 T drm_cvt_mode +ffffffff81978790 T drm_mode_set_name +ffffffff819787e0 T drm_gtf_mode_complex +ffffffff81978ae0 T drm_gtf_mode +ffffffff81978b30 T drm_mode_get_hv_timing +ffffffff81978b80 T drm_mode_init +ffffffff81978c50 T drm_mode_set_crtcinfo +ffffffff81978e00 T drm_mode_copy +ffffffff81978e60 T drm_mode_duplicate +ffffffff81978ee0 T drm_mode_match +ffffffff81979080 T drm_mode_equal +ffffffff819790a0 T drm_mode_equal_no_clocks +ffffffff819790c0 T drm_mode_equal_no_clocks_no_stereo +ffffffff81979180 T drm_mode_validate_driver +ffffffff81979270 T drm_mode_validate_size +ffffffff819792c0 T drm_mode_validate_ycbcr420 +ffffffff81979330 T drm_mode_is_420_only +ffffffff81979380 T drm_get_mode_status_name +ffffffff81979400 T drm_mode_prune_invalid +ffffffff819796a0 T drm_mode_sort +ffffffff819796d0 t drm_mode_compare +ffffffff81979860 T drm_connector_list_update +ffffffff81979a30 T drm_mode_parse_command_line_for_connector +ffffffff81979a60 T drm_mode_create_from_cmdline_mode +ffffffff81979b50 T drm_mode_convert_to_umode +ffffffff81979ce0 T drm_mode_convert_umode +ffffffff81979f00 T drm_mode_is_420_also +ffffffff81979f50 T drm_mode_is_420 +ffffffff8197a000 T drm_helper_move_panel_connectors_to_head +ffffffff8197a0f0 T drm_helper_mode_fill_fb_struct +ffffffff8197a1b0 T drm_crtc_init +ffffffff8197a280 T drm_mode_config_helper_suspend +ffffffff8197a310 T drm_mode_config_helper_resume +ffffffff8197b000 T drm_modeset_lock_all +ffffffff8197b1e0 T drm_modeset_acquire_init +ffffffff8197b270 T drm_modeset_lock_all_ctx +ffffffff8197b3e0 T drm_modeset_backoff +ffffffff8197b4b0 T drm_modeset_acquire_fini +ffffffff8197b4e0 T drm_warn_on_modeset_not_all_locked +ffffffff8197b630 T drm_modeset_unlock_all +ffffffff8197b710 T drm_modeset_drop_locks +ffffffff8197b7a0 T drm_modeset_unlock +ffffffff8197b870 t modeset_lock +ffffffff8197bb00 T drm_modeset_lock_init +ffffffff8197bb60 T drm_modeset_lock +ffffffff8197bbc0 T drm_modeset_lock_single_interruptible +ffffffff8197bbe0 t __ww_mutex_lock +ffffffff8197c000 T drm_mtrr_add +ffffffff8197c070 T drm_mtrr_del +ffffffff8197d000 T drm_panel_init +ffffffff8197d040 T drm_panel_add +ffffffff8197d090 T drm_panel_remove +ffffffff8197d0f0 T drm_panel_prepare +ffffffff8197d140 T drm_panel_unprepare +ffffffff8197d190 T drm_panel_enable +ffffffff8197d230 T drm_panel_disable +ffffffff8197d2c0 T drm_panel_get_modes +ffffffff8197d310 T drm_panel_of_backlight +ffffffff8197e000 T drm_get_panel_orientation_quirk +ffffffff8197f000 T drm_pci_set_busid +ffffffff8197f090 t kasprintf +ffffffff81980000 T drm_universal_plane_init +ffffffff819800f0 t __drm_universal_plane_init +ffffffff819807e0 T __drmm_universal_plane_alloc +ffffffff81980920 t drmm_universal_plane_alloc_release +ffffffff81980970 T __drm_universal_plane_alloc +ffffffff81980ab0 T drm_plane_register_all +ffffffff81980ba0 T drm_plane_unregister_all +ffffffff81980c10 T drm_plane_cleanup +ffffffff81980d60 T drm_plane_from_index +ffffffff81980dc0 T drm_plane_force_disable +ffffffff81980ed0 T drm_mode_plane_set_obj_prop +ffffffff81980f50 T drm_mode_getplane_res +ffffffff81981050 T drm_mode_getplane +ffffffff819811b0 T drm_plane_check_pixel_format +ffffffff81981270 T drm_any_plane_has_format +ffffffff819813b0 T drm_mode_setplane +ffffffff81981710 T drm_mode_cursor_ioctl +ffffffff81981780 t drm_mode_cursor_common +ffffffff81981e00 T drm_mode_cursor2_ioctl +ffffffff81981e20 T drm_mode_page_flip_ioctl +ffffffff81982390 T drm_plane_enable_fb_damage_clips +ffffffff819823b0 T drm_plane_get_damage_clips_count +ffffffff819823f0 T __drm_plane_get_damage_clips +ffffffff81982430 T drm_plane_get_damage_clips +ffffffff819824d0 T drm_create_scaling_filter_prop +ffffffff81982620 T drm_plane_create_scaling_filter_property +ffffffff81982690 t kasprintf +ffffffff81982760 t __setplane_internal +ffffffff81982950 t __setplane_check +ffffffff81983000 T drm_plane_helper_update_primary +ffffffff819834b0 t get_connectors_for_crtc +ffffffff819835c0 T drm_plane_helper_disable_primary +ffffffff81983670 T drm_plane_helper_destroy +ffffffff819836a0 T drm_plane_helper_atomic_check +ffffffff81984000 T drm_prime_remove_buf_handle +ffffffff81984090 T drm_prime_init_file_private +ffffffff819840f0 T drm_prime_destroy_file_private +ffffffff81984150 T drm_gem_dmabuf_export +ffffffff819841b0 T drm_gem_dmabuf_release +ffffffff819841f0 T drm_gem_prime_fd_to_handle +ffffffff81984400 T drm_gem_prime_import +ffffffff81984460 t drm_prime_add_buf_handle +ffffffff819845b0 T drm_prime_fd_to_handle_ioctl +ffffffff81984600 T drm_gem_prime_handle_to_fd +ffffffff81984830 T drm_prime_handle_to_fd_ioctl +ffffffff81984890 T drm_gem_map_attach +ffffffff819848b0 T drm_gem_map_detach +ffffffff819848d0 T drm_gem_dmabuf_vmap +ffffffff819848f0 T drm_gem_dmabuf_vunmap +ffffffff81984910 T drm_gem_prime_mmap +ffffffff81984960 T drm_prime_pages_to_sg +ffffffff819849b0 T drm_prime_get_contiguous_size +ffffffff81984a00 T drm_gem_prime_export +ffffffff81984a90 T drm_gem_prime_import_dev +ffffffff81984af0 T drm_prime_sg_to_page_array +ffffffff81984b40 T drm_prime_sg_to_dma_addr_array +ffffffff81984b90 T drm_prime_gem_destroy +ffffffff81985000 T __drm_puts_coredump +ffffffff819850f0 T __drm_printfn_coredump +ffffffff81985210 T __drm_puts_seq_file +ffffffff81985240 T __drm_printfn_seq_file +ffffffff81985270 T __drm_printfn_info +ffffffff819852a0 T __drm_printfn_debug +ffffffff819852d0 T __drm_printfn_err +ffffffff81985310 T drm_puts +ffffffff81985340 T drm_printf +ffffffff819853c0 T drm_print_bits +ffffffff819855e0 T drm_dev_printk +ffffffff81985680 T __drm_dev_dbg +ffffffff81985710 T ___drm_dbg +ffffffff819857a0 T __drm_err +ffffffff81985830 T drm_print_regset32 +ffffffff81986000 T drm_crtc_mode_valid +ffffffff81986050 T drm_encoder_mode_valid +ffffffff81986090 T drm_connector_mode_valid +ffffffff81986110 T drm_kms_helper_poll_enable +ffffffff81986200 T drm_helper_probe_detect +ffffffff819863f0 T drm_helper_probe_single_connector_modes +ffffffff819869b0 t __drm_helper_update_and_validate +ffffffff81986d60 T drm_kms_helper_hotplug_event +ffffffff81986da0 T drm_kms_helper_connector_hotplug_event +ffffffff81986de0 T drm_kms_helper_is_poll_worker +ffffffff81986e10 T drm_kms_helper_poll_disable +ffffffff81986e90 T drm_kms_helper_poll_init +ffffffff81986ef0 t output_poll_execute +ffffffff81987180 T drm_kms_helper_poll_fini +ffffffff81987200 T drm_connector_helper_hpd_irq_event +ffffffff819872d0 t check_connector_changed +ffffffff819874b0 T drm_helper_hpd_irq_event +ffffffff81987600 T drm_crtc_helper_mode_valid_fixed +ffffffff81987650 T drm_connector_helper_get_modes_from_ddc +ffffffff819876e0 T drm_connector_helper_get_modes_fixed +ffffffff81987850 T drm_connector_helper_get_modes +ffffffff819878b0 t __delayed_work_tick +ffffffff81988000 T drm_property_create +ffffffff81988200 T drm_property_create_enum +ffffffff819882b0 T drm_property_add_enum +ffffffff819884d0 T drm_property_destroy +ffffffff81988580 T drm_property_create_bitmask +ffffffff819886b0 T drm_property_create_range +ffffffff81988720 T drm_property_create_signed_range +ffffffff81988790 T drm_property_create_object +ffffffff81988830 T drm_property_create_bool +ffffffff81988890 T drm_mode_getproperty_ioctl +ffffffff81988aa0 T drm_property_create_blob +ffffffff81988be0 t drm_property_free_blob +ffffffff81988c60 T drm_property_blob_put +ffffffff81988ca0 T drm_property_destroy_user_blobs +ffffffff81988d20 T drm_property_blob_get +ffffffff81988d60 T drm_property_lookup_blob +ffffffff81988d80 T drm_property_replace_global_blob +ffffffff81988ed0 T drm_property_replace_blob +ffffffff81988f40 T drm_mode_getblob_ioctl +ffffffff81989000 T drm_mode_createblob_ioctl +ffffffff81989100 T drm_mode_destroyblob_ioctl +ffffffff81989210 T drm_property_change_valid_get +ffffffff81989460 T drm_property_change_valid_put +ffffffff8198a000 T drm_rect_intersect +ffffffff8198a080 T drm_rect_clip_scaled +ffffffff8198a2f0 T drm_rect_calc_hscale +ffffffff8198a3c0 T drm_rect_calc_vscale +ffffffff8198a490 T drm_rect_debug_print +ffffffff8198a5b0 T drm_rect_rotate +ffffffff8198a670 T drm_rect_rotate_inv +ffffffff8198b000 T drm_self_refresh_helper_update_avg_times +ffffffff8198b140 T drm_self_refresh_helper_alter_state +ffffffff8198b2d0 T drm_self_refresh_helper_init +ffffffff8198b480 t drm_self_refresh_helper_entry_work +ffffffff8198b5e0 T drm_self_refresh_helper_cleanup +ffffffff8198b660 t __delayed_work_tick +ffffffff8198c000 T drm_syncobj_find +ffffffff8198c070 T drm_syncobj_add_point +ffffffff8198c160 t syncobj_wait_syncobj_func +ffffffff8198c210 T drm_syncobj_replace_fence +ffffffff8198c2a0 T drm_syncobj_find_fence +ffffffff8198c600 t drm_syncobj_fence_add_wait +ffffffff8198c6d0 T drm_syncobj_free +ffffffff8198c760 T drm_syncobj_create +ffffffff8198c970 T drm_syncobj_get_handle +ffffffff8198ca90 T drm_syncobj_get_fd +ffffffff8198cae0 T drm_syncobj_open +ffffffff8198cb10 T drm_syncobj_release +ffffffff8198cb50 t drm_syncobj_release_handle +ffffffff8198cc00 T drm_syncobj_create_ioctl +ffffffff8198cd30 T drm_syncobj_destroy_ioctl +ffffffff8198ce50 T drm_syncobj_handle_to_fd_ioctl +ffffffff8198d040 T drm_syncobj_fd_to_handle_ioctl +ffffffff8198d230 T drm_syncobj_transfer_ioctl +ffffffff8198d650 T drm_timeout_abs_to_jiffies +ffffffff8198d730 T drm_syncobj_wait_ioctl +ffffffff8198d8c0 t drm_syncobj_array_find +ffffffff8198daf0 t drm_syncobj_array_free +ffffffff8198dbd0 T drm_syncobj_timeline_wait_ioctl +ffffffff8198dd60 T drm_syncobj_reset_ioctl +ffffffff8198dec0 T drm_syncobj_signal_ioctl +ffffffff8198e050 T drm_syncobj_timeline_signal_ioctl +ffffffff8198e280 T drm_syncobj_query_ioctl +ffffffff8198e480 t drm_syncobj_array_wait_timeout +ffffffff8198e8f0 t syncobj_wait_fence_func +ffffffff8198f000 T drm_vblank_count +ffffffff8198f090 T drm_crtc_accurate_vblank_count +ffffffff8198f1a0 t drm_update_vblank_count +ffffffff8198f5f0 T drm_vblank_disable_and_save +ffffffff8198f740 T drm_vblank_init +ffffffff8198f8c0 t vblank_disable_fn +ffffffff8198f940 t drm_vblank_init_release +ffffffff8198f9d0 T drm_dev_has_vblank +ffffffff8198fa00 T drm_crtc_vblank_waitqueue +ffffffff8198fa50 T drm_calc_timestamping_constants +ffffffff8198fc80 T drm_crtc_vblank_helper_get_vblank_timestamp_internal +ffffffff819901b0 T drm_crtc_vblank_helper_get_vblank_timestamp +ffffffff819901d0 T drm_crtc_vblank_count +ffffffff81990260 T drm_crtc_vblank_count_and_time +ffffffff81990320 T drm_crtc_arm_vblank_event +ffffffff81990400 T drm_crtc_send_vblank_event +ffffffff819905b0 T drm_vblank_get +ffffffff819906d0 t drm_vblank_enable +ffffffff81990890 T drm_crtc_vblank_get +ffffffff819909a0 T drm_vblank_put +ffffffff81990ad0 T drm_crtc_vblank_put +ffffffff81990af0 T drm_wait_one_vblank +ffffffff81990f40 T drm_crtc_wait_one_vblank +ffffffff81990f60 T drm_crtc_vblank_off +ffffffff81991350 T drm_crtc_vblank_reset +ffffffff81991480 T drm_crtc_set_max_vblank_count +ffffffff81991560 T drm_crtc_vblank_on +ffffffff819916b0 t drm_reset_vblank_timestamp +ffffffff819918b0 T drm_crtc_vblank_restore +ffffffff81991c90 T drm_legacy_modeset_ctl_ioctl +ffffffff81991eb0 T drm_wait_vblank_ioctl +ffffffff819928f0 T drm_handle_vblank +ffffffff81992be0 t drm_handle_vblank_events +ffffffff81992e70 T drm_crtc_handle_vblank +ffffffff81992e90 T drm_crtc_get_sequence_ioctl +ffffffff81993080 T drm_crtc_queue_sequence_ioctl +ffffffff81993450 t __get_vblank_counter +ffffffff81994000 T drm_handle_vblank_works +ffffffff819941b0 T drm_vblank_cancel_pending_works +ffffffff819942f0 T drm_vblank_work_schedule +ffffffff81994570 T drm_vblank_work_cancel_sync +ffffffff819946d0 T drm_vblank_work_flush +ffffffff819947a0 T drm_vblank_work_init +ffffffff81994810 T drm_vblank_worker_init +ffffffff81995000 T drm_vma_offset_manager_init +ffffffff81995040 T drm_vma_offset_manager_destroy +ffffffff81995060 T drm_vma_offset_lookup_locked +ffffffff819950f0 T drm_vma_offset_add +ffffffff81995180 T drm_vma_offset_remove +ffffffff819951d0 T drm_vma_node_allow +ffffffff819951f0 t vma_node_allow +ffffffff81995320 T drm_vma_node_allow_once +ffffffff81995340 T drm_vma_node_revoke +ffffffff819953c0 T drm_vma_node_is_allowed +ffffffff81996000 T hdmi_avi_infoframe_init +ffffffff81996080 T hdmi_avi_infoframe_check +ffffffff819960d0 T hdmi_avi_infoframe_pack_only +ffffffff819962d0 T hdmi_avi_infoframe_pack +ffffffff81996330 T hdmi_spd_infoframe_init +ffffffff819963f0 T hdmi_spd_infoframe_check +ffffffff81996440 T hdmi_spd_infoframe_pack_only +ffffffff81996570 T hdmi_spd_infoframe_pack +ffffffff819966d0 T hdmi_audio_infoframe_init +ffffffff81996720 T hdmi_audio_infoframe_check +ffffffff81996770 T hdmi_audio_infoframe_pack_only +ffffffff819968c0 T hdmi_audio_infoframe_pack +ffffffff81996910 T hdmi_audio_infoframe_pack_for_dp +ffffffff81996a00 T hdmi_vendor_infoframe_init +ffffffff81996a60 T hdmi_vendor_infoframe_check +ffffffff81996b00 T hdmi_vendor_infoframe_pack_only +ffffffff81996cd0 T hdmi_vendor_infoframe_pack +ffffffff81996d70 T hdmi_drm_infoframe_init +ffffffff81996dd0 T hdmi_drm_infoframe_check +ffffffff81996e20 T hdmi_drm_infoframe_pack_only +ffffffff81996ff0 T hdmi_drm_infoframe_pack +ffffffff81997040 T hdmi_infoframe_check +ffffffff819971a0 T hdmi_infoframe_pack_only +ffffffff819973c0 T hdmi_infoframe_pack +ffffffff81997530 T hdmi_infoframe_log +ffffffff819984d0 T hdmi_drm_infoframe_unpack_only +ffffffff819985b0 T hdmi_infoframe_unpack +ffffffff81999000 T list_sort +ffffffff8199a000 T radix_tree_lookup +ffffffff8199a0b0 T radix_tree_iter_find +ffffffff8199a1a0 T radix_tree_delete +ffffffff8199a340 T radix_tree_iter_delete +ffffffff8199a360 T radix_tree_insert +ffffffff8199b000 T sort +ffffffff8199b040 t qsort +ffffffff8199d000 T drm_dp_dual_mode_read +ffffffff8199d110 T drm_dp_dual_mode_write +ffffffff8199d1f0 T drm_dp_dual_mode_detect +ffffffff8199d4a0 T drm_dp_dual_mode_max_tmds_clock +ffffffff8199d5d0 T drm_dp_dual_mode_get_tmds_output +ffffffff8199d700 T drm_dp_dual_mode_set_tmds_output +ffffffff8199d990 T drm_dp_get_dual_mode_type_name +ffffffff8199da00 T drm_lspcon_get_mode +ffffffff8199dbb0 T drm_lspcon_set_mode +ffffffff8199e000 T drm_dp_channel_eq_ok +ffffffff8199e080 T drm_dp_clock_recovery_ok +ffffffff8199e100 T drm_dp_get_adjust_request_voltage +ffffffff8199e140 T drm_dp_get_adjust_request_pre_emphasis +ffffffff8199e190 T drm_dp_get_adjust_tx_ffe_preset +ffffffff8199e1d0 T drm_dp_128b132b_lane_channel_eq_done +ffffffff8199e250 T drm_dp_128b132b_lane_symbol_locked +ffffffff8199e2c0 T drm_dp_128b132b_eq_interlane_align_done +ffffffff8199e2f0 T drm_dp_128b132b_cds_interlane_align_done +ffffffff8199e320 T drm_dp_128b132b_link_training_failed +ffffffff8199e350 T drm_dp_read_clock_recovery_delay +ffffffff8199e450 T drm_dp_read_channel_eq_delay +ffffffff8199e550 T drm_dp_128b132b_read_aux_rd_interval +ffffffff8199e600 T drm_dp_link_train_clock_recovery_delay +ffffffff8199e690 t __8b10b_clock_recovery_delay_us +ffffffff8199e710 T drm_dp_link_train_channel_eq_delay +ffffffff8199e790 T drm_dp_phy_name +ffffffff8199e7d0 T drm_dp_lttpr_link_train_clock_recovery_delay +ffffffff8199e7f0 T drm_dp_lttpr_link_train_channel_eq_delay +ffffffff8199e860 T drm_dp_link_rate_to_bw_code +ffffffff8199e8d0 T drm_dp_bw_code_to_link_rate +ffffffff8199e930 T drm_dp_dpcd_probe +ffffffff8199ea70 t drm_dp_dpcd_access +ffffffff8199eba0 T drm_dp_dpcd_read +ffffffff8199ecd0 T drm_dp_dpcd_write +ffffffff8199ede0 T drm_dp_dpcd_read_link_status +ffffffff8199ee00 T drm_dp_dpcd_read_phy_link_status +ffffffff8199ef00 T drm_dp_downstream_is_type +ffffffff8199ef40 T drm_dp_downstream_is_tmds +ffffffff8199efb0 T drm_dp_send_real_edid_checksum +ffffffff8199f210 T drm_dp_read_dpcd_caps +ffffffff8199f3a0 T drm_dp_read_downstream_info +ffffffff8199f4a0 T drm_dp_downstream_max_dotclock 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drm_dp_pcon_hdmi_link_active +ffffffff819a0ec0 T drm_dp_pcon_hdmi_link_mode +ffffffff819a0f30 T drm_dp_pcon_hdmi_frl_link_error_count +ffffffff819a1030 T drm_dp_pcon_enc_is_dsc_1_2 +ffffffff819a1060 T drm_dp_pcon_dsc_max_slices +ffffffff819a10f0 T drm_dp_pcon_dsc_max_slice_width +ffffffff819a1120 T drm_dp_pcon_dsc_bpp_incr +ffffffff819a1160 T drm_dp_pcon_pps_default +ffffffff819a11f0 T drm_dp_pcon_pps_override_buf +ffffffff819a12a0 T drm_dp_pcon_pps_override_param +ffffffff819a1380 T drm_dp_pcon_convert_rgb_to_ycbcr +ffffffff819a1420 T drm_edp_backlight_set_level +ffffffff819a1500 T drm_edp_backlight_enable +ffffffff819a1710 t drm_edp_backlight_set_enable +ffffffff819a1850 T drm_edp_backlight_disable +ffffffff819a1890 T drm_edp_backlight_init +ffffffff819a1de0 T drm_panel_dp_aux_backlight +ffffffff819a1f70 t __128b132b_channel_eq_delay_us +ffffffff819a1ff0 t __8b10b_channel_eq_delay_us +ffffffff819a2070 t drm_dp_aux_get_crc +ffffffff819a2140 t drm_dp_i2c_xfer +ffffffff819a2390 t drm_dp_i2c_functionality +ffffffff819a23c0 t drm_dp_i2c_do_msg +ffffffff819a27a0 t lock_bus +ffffffff819a27c0 t trylock_bus +ffffffff819a2810 t unlock_bus +ffffffff819a2830 t dp_aux_backlight_update_status +ffffffff819a3000 T drm_dp_encode_sideband_req +ffffffff819a3420 T drm_dp_decode_sideband_req +ffffffff819a3970 T drm_dp_dump_sideband_msg_req_body +ffffffff819a3d30 T drm_dp_mst_get_port_malloc +ffffffff819a3d80 T drm_dp_mst_put_port_malloc +ffffffff819a3e80 t kref_put +ffffffff819a3ec0 T drm_atomic_get_mst_payload_state +ffffffff819a3f20 T drm_dp_mst_dpcd_read +ffffffff819a41e0 T drm_dp_mst_dpcd_write +ffffffff819a4230 t drm_dp_send_dpcd_write +ffffffff819a4470 T drm_dp_mst_connector_late_register +ffffffff819a44f0 T drm_dp_mst_connector_early_unregister +ffffffff819a4530 T drm_dp_send_power_updown_phy +ffffffff819a4770 t drm_dp_mst_topology_put_port +ffffffff819a48a0 t drm_dp_mst_wait_tx_reply +ffffffff819a4bf0 T drm_dp_send_query_stream_enc_status +ffffffff819a4eb0 T drm_dp_add_payload_part1 +ffffffff819a5060 T drm_dp_remove_payload +ffffffff819a5200 T drm_dp_add_payload_part2 +ffffffff819a53c0 T drm_dp_get_vc_payload_bw +ffffffff819a5460 T drm_dp_read_mst_cap +ffffffff819a54c0 T drm_dp_mst_topology_mgr_set_mst +ffffffff819a5780 t drm_dp_dpcd_write_payload +ffffffff819a5910 t drm_dp_mst_topology_put_mstb +ffffffff819a5a10 T drm_dp_mst_topology_mgr_suspend +ffffffff819a5ad0 t drm_dp_mst_topology_mgr_invalidate_mstb +ffffffff819a5b40 T drm_dp_mst_topology_mgr_resume +ffffffff819a5d80 T drm_dp_mst_hpd_irq +ffffffff819a6bf0 T drm_dp_mst_detect_port +ffffffff819a6d70 T drm_dp_mst_get_edid +ffffffff819a6e80 T drm_dp_atomic_find_time_slots +ffffffff819a7150 T drm_atomic_get_mst_topology_state +ffffffff819a7160 T drm_dp_atomic_release_time_slots +ffffffff819a7380 T drm_dp_mst_atomic_setup_commit +ffffffff819a7510 T drm_dp_mst_atomic_wait_for_dependencies +ffffffff819a7690 T drm_dp_mst_root_conn_atomic_check +ffffffff819a77b0 T drm_dp_mst_update_slots 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drm_dp_free_mst_branch_device +ffffffff819a9aa0 t drm_dp_mst_topology_get_port_validated_locked +ffffffff819a9b20 t drm_dp_mst_dump_sideband_msg_tx +ffffffff819a9d30 t process_single_down_tx_qlock +ffffffff819a9ea0 t process_single_tx_qlock +ffffffff819aa380 t drm_dp_msg_data_crc4 +ffffffff819aa4a0 t drm_dp_payload_send_msg +ffffffff819aa8f0 t drm_dp_mst_topology_get_mstb_validated_locked +ffffffff819aa970 t drm_dp_get_one_sb_msg +ffffffff819ab090 t drm_dp_get_mst_branch_device +ffffffff819ab200 t drm_dp_check_and_send_link_address +ffffffff819ab2d0 t drm_dp_send_link_address +ffffffff819abf80 t drm_dp_send_enum_path_resources +ffffffff819ac1e0 t drm_dp_port_set_pdt +ffffffff819ac4c0 t drm_dp_mst_port_add_connector +ffffffff819ac6a0 t drm_dp_mst_i2c_xfer +ffffffff819acda0 t drm_dp_mst_i2c_functionality +ffffffff819acdd0 t get_mst_branch_device_by_guid_helper +ffffffff819ad000 T drm_dsc_dp_pps_header_init +ffffffff819ad030 T drm_dsc_dp_rc_buffer_size +ffffffff819ad090 T drm_dsc_pps_payload_pack +ffffffff819ad330 T drm_dsc_compute_rc_parameters +ffffffff819ae000 T drm_connector_attach_content_protection_property +ffffffff819ae030 T drm_hdcp_check_ksvs_revoked +ffffffff819ae080 T drm_hdcp_update_content_protection +ffffffff819af000 T drm_hdmi_infoframe_set_hdr_metadata +ffffffff819af120 T drm_hdmi_avi_infoframe_colorimetry +ffffffff819af170 T drm_hdmi_avi_infoframe_bars +ffffffff819af1c0 T drm_hdmi_avi_infoframe_content_type +ffffffff819b0000 T drm_scdc_read +ffffffff819b0090 T drm_scdc_write +ffffffff819b0170 T drm_scdc_get_scrambling_status +ffffffff819b0230 T drm_scdc_set_scrambling +ffffffff819b0380 T drm_scdc_set_high_tmds_clock_ratio +ffffffff819b1000 T drm_gem_ttm_mmap +ffffffff819b1070 T drm_gem_ttm_vmap +ffffffff819b1080 T drm_gem_ttm_vunmap +ffffffff819b2000 T ttm_agp_bind +ffffffff819b2050 T ttm_agp_unbind +ffffffff819b2070 T ttm_agp_is_bound +ffffffff819b20c0 T ttm_agp_destroy +ffffffff819b20e0 T ttm_agp_tt_create +ffffffff819b3000 T ttm_bo_move_to_lru_tail +ffffffff819b3040 T ttm_bo_set_bulk_move +ffffffff819b3100 T ttm_bo_delayed_delete +ffffffff819b33f0 t ttm_bo_cleanup_refs +ffffffff819b37a0 T ttm_bo_put +ffffffff819b3ce0 T ttm_bo_lock_delayed_workqueue +ffffffff819b3d60 T ttm_bo_unlock_delayed_workqueue +ffffffff819b3dd0 T ttm_bo_eviction_valuable +ffffffff819b3e20 T ttm_mem_evict_first +ffffffff819b46e0 T ttm_bo_pin +ffffffff819b4780 T ttm_bo_unpin +ffffffff819b4890 T ttm_bo_mem_space +ffffffff819b4ae0 t ttm_bo_add_move_fence +ffffffff819b4ba0 T ttm_bo_validate +ffffffff819b4d20 T ttm_bo_init_reserved +ffffffff819b4fc0 T ttm_bo_init_validate +ffffffff819b5130 T ttm_bo_unmap_virtual +ffffffff819b5250 T ttm_bo_wait +ffffffff819b52d0 T ttm_bo_swapout +ffffffff819b56f0 t ttm_bo_handle_move_mem +ffffffff819b5860 T ttm_bo_tt_destroy +ffffffff819b6000 T ttm_mem_io_reserve +ffffffff819b6060 T ttm_mem_io_free +ffffffff819b60d0 T ttm_move_memcpy +ffffffff819b6290 T ttm_bo_move_memcpy +ffffffff819b64c0 T ttm_bo_move_sync_cleanup +ffffffff819b65b0 T ttm_io_prot +ffffffff819b65f0 T ttm_bo_kmap +ffffffff819b68a0 T ttm_bo_kunmap +ffffffff819b69e0 T ttm_bo_vmap +ffffffff819b6bd0 T ttm_bo_vunmap +ffffffff819b6cc0 T ttm_bo_move_accel_cleanup +ffffffff819b6f80 T ttm_bo_pipeline_gutting +ffffffff819b7220 t ttm_buffer_object_transfer +ffffffff819b7470 t ttm_transfered_destroy +ffffffff819b8000 T ttm_bo_vm_reserve +ffffffff819b8250 T ttm_bo_vm_fault_reserved +ffffffff819b8570 T ttm_bo_vm_fault +ffffffff819b86d0 T ttm_bo_vm_reference +ffffffff819b8700 T ttm_bo_vm_detach +ffffffff819b8710 T ttm_bo_mmap_obj +ffffffff819b9000 T ttm_global_swapout +ffffffff819b9100 T ttm_device_swapout +ffffffff819b9220 T ttm_device_init +ffffffff819b9470 t ttm_device_delayed_workqueue +ffffffff819b9510 T ttm_device_fini +ffffffff819b96f0 T ttm_device_clear_dma_mappings +ffffffff819b97a0 t ttm_device_clear_lru_dma_mappings +ffffffff819b9850 t __delayed_work_tick +ffffffff819ba000 T ttm_eu_backoff_reservation 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intel_pwm_enable_backlight +ffffffff819e9000 T intel_bios_encoder_supports_dvi +ffffffff819e9030 T intel_bios_encoder_supports_hdmi +ffffffff819e9070 T intel_bios_encoder_supports_dp +ffffffff819e90a0 T intel_bios_is_valid_vbt +ffffffff819e91b0 T intel_bios_init +ffffffff819eb7b0 T intel_bios_init_panel_early +ffffffff819eb7d0 t intel_bios_init_panel +ffffffff819ed880 T intel_bios_init_panel_late +ffffffff819ed8a0 T intel_bios_driver_remove +ffffffff819ed990 T intel_bios_fini_panel +ffffffff819eda70 T intel_bios_is_tv_present +ffffffff819edaf0 T intel_bios_is_lvds_present +ffffffff819edba0 T intel_bios_is_port_present +ffffffff819edc20 T intel_bios_is_port_edp +ffffffff819edc80 T intel_bios_encoder_data_lookup +ffffffff819edcc0 T intel_bios_is_port_dp_dual_mode +ffffffff819edd30 T intel_bios_is_dsi_present +ffffffff819ede00 T intel_bios_get_dsc_params +ffffffff819ee010 T intel_bios_is_port_hpd_inverted +ffffffff819ee0d0 T intel_bios_is_lspcon_present +ffffffff819ee120 T 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t intel_crt_get_hw_state +ffffffff81a01050 t intel_enable_crt +ffffffff81a01140 t intel_spurious_crt_detect_dmi_callback +ffffffff81a011a0 t intel_crt_get_modes +ffffffff81a012b0 t intel_crt_detect +ffffffff81a01da0 t intel_crt_mode_valid +ffffffff81a01e90 t intel_crt_get_edid +ffffffff81a01f30 t intel_crt_detect_ddc +ffffffff81a02000 T intel_first_crtc +ffffffff81a02020 T intel_crtc_for_pipe +ffffffff81a02080 T intel_crtc_wait_for_next_vblank +ffffffff81a02090 T intel_wait_for_vblank_if_active +ffffffff81a02100 T intel_crtc_get_vblank_counter +ffffffff81a02180 T intel_crtc_max_vblank_count +ffffffff81a02220 T intel_crtc_vblank_on +ffffffff81a02300 T intel_crtc_vblank_off +ffffffff81a023a0 T intel_crtc_state_alloc +ffffffff81a02440 T intel_crtc_state_reset +ffffffff81a024c0 T intel_crtc_init +ffffffff81a02800 T intel_wait_for_vblank_workers +ffffffff81a028c0 T intel_usecs_to_scanlines +ffffffff81a02910 T intel_pipe_update_start +ffffffff81a02e10 T intel_pipe_update_end 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intel_ddi_transcoder_func_reg_val_get +ffffffff81a08930 T intel_ddi_disable_transcoder_func +ffffffff81a08b20 T intel_ddi_toggle_hdcp_bits +ffffffff81a08c60 T intel_ddi_connector_get_hw_state +ffffffff81a08db0 T intel_ddi_get_hw_state +ffffffff81a08e20 t intel_ddi_get_encoder_pipes +ffffffff81a09280 T intel_ddi_enable_pipe_clock +ffffffff81a09340 T intel_ddi_disable_pipe_clock +ffffffff81a093b0 T intel_ddi_level +ffffffff81a09580 T icl_ddi_combo_get_pll +ffffffff81a09600 T hsw_ddi_enable_clock +ffffffff81a096c0 T hsw_ddi_disable_clock +ffffffff81a09700 T hsw_ddi_is_clock_enabled +ffffffff81a09760 T intel_ddi_enable_clock +ffffffff81a097a0 T intel_ddi_disable_clock +ffffffff81a097e0 T intel_ddi_sanitize_encoder_pll_mapping +ffffffff81a099c0 T dp_tp_ctl_reg +ffffffff81a09a40 T dp_tp_status_reg +ffffffff81a09ac0 T intel_ddi_update_pipe +ffffffff81a09b50 T intel_ddi_compute_min_voltage_level +ffffffff81a09bc0 T intel_ddi_get_clock +ffffffff81a09cd0 T hsw_ddi_get_config +ffffffff81a09dc0 t intel_ddi_get_config +ffffffff81a0a630 T intel_ddi_init +ffffffff81a0b1d0 t intel_ddi_hotplug +ffffffff81a0b600 t intel_ddi_compute_output_type +ffffffff81a0b680 t intel_ddi_compute_config +ffffffff81a0b7c0 t intel_ddi_compute_config_late +ffffffff81a0ba70 t intel_enable_ddi +ffffffff81a0c250 t intel_ddi_pre_pll_enable +ffffffff81a0c3c0 t intel_ddi_pre_enable +ffffffff81a0d090 t intel_disable_ddi +ffffffff81a0d210 t intel_ddi_post_disable +ffffffff81a0d730 t intel_ddi_sync_state +ffffffff81a0d7e0 t intel_ddi_initial_fastset_check +ffffffff81a0d8a0 t intel_ddi_encoder_suspend +ffffffff81a0d950 t intel_ddi_encoder_shutdown +ffffffff81a0da10 t intel_ddi_get_power_domains +ffffffff81a0dbc0 t dg2_ddi_get_config +ffffffff81a0dc10 t adls_ddi_enable_clock +ffffffff81a0dd90 t adls_ddi_disable_clock +ffffffff81a0de50 t adls_ddi_is_clock_enabled +ffffffff81a0def0 t adls_ddi_get_config +ffffffff81a0dfb0 t rkl_ddi_enable_clock +ffffffff81a0e140 t rkl_ddi_disable_clock +ffffffff81a0e1e0 t rkl_ddi_is_clock_enabled +ffffffff81a0e260 t rkl_ddi_get_config +ffffffff81a0e330 t dg1_ddi_enable_clock +ffffffff81a0e4f0 t dg1_ddi_disable_clock +ffffffff81a0e5b0 t dg1_ddi_is_clock_enabled +ffffffff81a0e650 t dg1_ddi_get_config +ffffffff81a0e720 t jsl_ddi_tc_enable_clock +ffffffff81a0e7c0 t jsl_ddi_tc_disable_clock +ffffffff81a0e880 t jsl_ddi_tc_is_clock_enabled +ffffffff81a0e930 t icl_ddi_combo_get_config +ffffffff81a0e9e0 t icl_ddi_combo_enable_clock +ffffffff81a0eb40 t icl_ddi_combo_disable_clock +ffffffff81a0ebe0 t icl_ddi_combo_is_clock_enabled +ffffffff81a0ec60 t icl_ddi_tc_enable_clock +ffffffff81a0ee40 t icl_ddi_tc_disable_clock +ffffffff81a0ef20 t icl_ddi_tc_is_clock_enabled +ffffffff81a0efe0 t icl_ddi_tc_get_config +ffffffff81a0f220 t bxt_ddi_get_config +ffffffff81a0f290 t skl_ddi_enable_clock +ffffffff81a0f3a0 t skl_ddi_disable_clock +ffffffff81a0f430 t skl_ddi_is_clock_enabled +ffffffff81a0f4a0 t skl_ddi_get_config +ffffffff81a0f530 t icl_combo_phy_set_signal_levels +ffffffff81a10000 t tgl_dkl_phy_set_signal_levels +ffffffff81a10300 t icl_mg_phy_set_signal_levels +ffffffff81a10c30 t hsw_set_signal_levels +ffffffff81a10fa0 t intel_ddi_update_prepare +ffffffff81a11120 t intel_ddi_update_complete +ffffffff81a11160 t lpt_digital_port_connected +ffffffff81a111d0 t bdw_digital_port_connected +ffffffff81a11240 t hsw_digital_port_connected +ffffffff81a112b0 t intel_ddi_encoder_reset +ffffffff81a112f0 t intel_ddi_encoder_destroy +ffffffff81a113a0 t icl_program_mg_dp_mode +ffffffff81a11630 t intel_ddi_init_dp_buf_reg +ffffffff81a117f0 t intel_disable_ddi_buf +ffffffff81a11b10 t intel_ddi_prepare_link_retrain +ffffffff81a12180 t intel_ddi_set_link_train +ffffffff81a122e0 t intel_ddi_set_idle_link_train +ffffffff81a12500 t intel_ddi_dp_voltage_max +ffffffff81a125c0 t intel_ddi_dp_preemph_max +ffffffff81a13000 T is_hobl_buf_trans +ffffffff81a13040 T intel_ddi_buf_trans_init +ffffffff81a13300 t dg2_get_snps_buf_trans +ffffffff81a13370 t adlp_get_combo_buf_trans +ffffffff81a134a0 t adlp_get_dkl_buf_trans +ffffffff81a13500 t adls_get_combo_buf_trans +ffffffff81a13630 t rkl_get_combo_buf_trans +ffffffff81a13760 t dg1_get_combo_buf_trans +ffffffff81a13890 t tgl_get_combo_buf_trans +ffffffff81a139e0 t tgl_get_dkl_buf_trans +ffffffff81a13a40 t jsl_get_combo_buf_trans +ffffffff81a13af0 t ehl_get_combo_buf_trans +ffffffff81a13ba0 t icl_get_combo_buf_trans +ffffffff81a13c50 t icl_get_mg_buf_trans +ffffffff81a13cb0 t bxt_get_buf_trans +ffffffff81a13d40 t kbl_y_get_buf_trans +ffffffff81a13df0 t kbl_u_get_buf_trans +ffffffff81a13ea0 t kbl_get_buf_trans +ffffffff81a13f50 t skl_y_get_buf_trans +ffffffff81a14000 t skl_u_get_buf_trans +ffffffff81a140b0 t skl_get_buf_trans +ffffffff81a14160 t bdw_get_buf_trans +ffffffff81a14200 t hsw_get_buf_trans +ffffffff81a15000 T intel_update_watermarks +ffffffff81a15040 T vlv_get_hpll_vco +ffffffff81a15090 T vlv_get_cck_clock +ffffffff81a15140 T vlv_get_cck_clock_hpll +ffffffff81a15240 T is_trans_port_sync_mode +ffffffff81a15280 T intel_crtc_bigjoiner_slave_pipes +ffffffff81a152e0 T intel_crtc_is_bigjoiner_slave +ffffffff81a15340 T intel_crtc_is_bigjoiner_master +ffffffff81a153a0 T intel_master_crtc +ffffffff81a15440 T assert_transcoder +ffffffff81a155f0 T vlv_wait_port_ready +ffffffff81a15740 T intel_enable_transcoder +ffffffff81a15a30 T intel_disable_transcoder +ffffffff81a15d30 T intel_rotation_info_size +ffffffff81a15d80 T intel_remapped_info_size +ffffffff81a15eb0 T intel_plane_uses_fence +ffffffff81a15f00 T intel_fb_xy_to_linear +ffffffff81a15f50 T intel_add_fb_offsets +ffffffff81a15fa0 T intel_plane_fb_max_stride +ffffffff81a16020 T intel_set_plane_visible +ffffffff81a16070 T intel_plane_fixup_bitmasks +ffffffff81a16120 T intel_plane_disable_noatomic +ffffffff81a16310 T intel_plane_fence_y_offset +ffffffff81a16370 T intel_display_prepare_reset +ffffffff81a16550 T intel_display_finish_reset +ffffffff81a16750 t __intel_display_resume +ffffffff81a16860 T intel_modeset_init_hw +ffffffff81a16900 T intel_has_pending_fb_unpin +ffffffff81a16a00 T intel_get_crtc_new_encoder +ffffffff81a16ba0 T ilk_pfit_disable +ffffffff81a16c60 T intel_phy_is_combo +ffffffff81a16ce0 T intel_phy_is_tc +ffffffff81a16d50 T intel_phy_is_snps +ffffffff81a16d90 T intel_port_to_phy +ffffffff81a16e20 T intel_port_to_tc +ffffffff81a16f20 T intel_aux_power_domain +ffffffff81a16f60 T intel_modeset_get_crtc_power_domains +ffffffff81a17180 T intel_modeset_put_crtc_power_domains +ffffffff81a171b0 T intel_display_suspend +ffffffff81a17250 T intel_encoder_destroy +ffffffff81a17280 T intel_encoder_get_config +ffffffff81a172b0 t intel_crtc_readout_derived_state +ffffffff81a176e0 T intel_link_compute_m_n +ffffffff81a17810 T intel_zero_m_n +ffffffff81a17850 T intel_set_m_n +ffffffff81a17910 T intel_cpu_transcoder_has_m2_n2 +ffffffff81a17970 T intel_cpu_transcoder_set_m1_n1 +ffffffff81a17b30 T intel_cpu_transcoder_set_m2_n2 +ffffffff81a17c90 T i9xx_set_pipeconf +ffffffff81a17e40 T ilk_set_pipeconf +ffffffff81a18020 T bdw_get_pipemisc_bpp +ffffffff81a18110 T ilk_get_lanes_required +ffffffff81a18170 T intel_get_m_n +ffffffff81a18280 T intel_cpu_transcoder_get_m1_n1 +ffffffff81a18420 T intel_cpu_transcoder_get_m2_n2 +ffffffff81a18590 T intel_crtc_get_pipe_config +ffffffff81a18600 T intel_get_load_detect_pipe +ffffffff81a18a20 T intel_release_load_detect_pipe +ffffffff81a18af0 T i9xx_crtc_clock_get +ffffffff81a18d80 T intel_dotclock_calculate +ffffffff81a18de0 T intel_crtc_dotclock +ffffffff81a18eb0 T intel_encoder_current_mode +ffffffff81a19060 T intel_fuzzy_clock_check +ffffffff81a190b0 T intel_pipe_config_compare +ffffffff81a1bba0 t pipe_config_mismatch +ffffffff81a1bc90 t pipe_config_infoframe_mismatch +ffffffff81a1be40 T intel_modeset_all_pipes +ffffffff81a1bfe0 T intel_atomic_add_affected_planes +ffffffff81a1c0b0 T intel_crtc_update_active_timings +ffffffff81a1c1b0 T intel_calc_active_pipes +ffffffff81a1c240 T intel_crtc_arm_fifo_underrun +ffffffff81a1c2e0 T intel_plane_destroy +ffffffff81a1c310 T intel_get_pipe_from_crtc_id_ioctl +ffffffff81a1c380 T intel_mode_valid_max_plane_size +ffffffff81a1c400 T intel_init_display_hooks +ffffffff81a1c4e0 T intel_modeset_init_noirq +ffffffff81a1c7a0 t intel_atomic_helper_free_state_worker +ffffffff81a1c810 T intel_modeset_init_nogem +ffffffff81a1d940 T intel_modeset_init +ffffffff81a1db60 T i830_enable_pipe +ffffffff81a1e190 T i830_disable_pipe +ffffffff81a1e4c0 T intel_display_resume +ffffffff81a1e600 T intel_modeset_driver_remove +ffffffff81a1e6b0 T intel_modeset_driver_remove_noirq +ffffffff81a1e820 T intel_modeset_driver_remove_nogem +ffffffff81a1e860 T intel_modeset_probe_defer +ffffffff81a1e890 T intel_display_driver_register +ffffffff81a1e8f0 T intel_display_driver_unregister +ffffffff81a1e970 T intel_scanout_needs_vtd_wa +ffffffff81a1e9b0 t wait_for_pipe_scanline_moving +ffffffff81a1ec10 t hsw_get_pipe_config +ffffffff81a1f9f0 t hsw_crtc_enable +ffffffff81a20420 t hsw_crtc_disable +ffffffff81a205d0 t skl_commit_modeset_enables +ffffffff81a20b90 t intel_get_transcoder_timings +ffffffff81a20e60 t ilk_get_pfit_config +ffffffff81a20fe0 t enabled_bigjoiner_pipes +ffffffff81a211f0 t bdw_set_pipemisc +ffffffff81a21330 t ilk_pfit_enable +ffffffff81a21440 t intel_set_transcoder_timings +ffffffff81a21800 t intel_update_crtc +ffffffff81a21e20 t intel_pre_plane_update +ffffffff81a22330 t intel_commit_modeset_enables +ffffffff81a22450 t ilk_get_pipe_config +ffffffff81a227a0 t ilk_crtc_enable +ffffffff81a22e50 t ilk_crtc_disable +ffffffff81a230e0 t i9xx_get_pipe_config +ffffffff81a23a10 t valleyview_crtc_enable +ffffffff81a23e20 t i9xx_crtc_disable +ffffffff81a241b0 t i9xx_pfit_enable +ffffffff81a24310 t i9xx_crtc_enable +ffffffff81a24690 t intel_mode_valid +ffffffff81a24840 t intel_atomic_check +ffffffff81a27b50 t intel_atomic_commit +ffffffff81a27ec0 t copy_bigjoiner_crtc_state_nomodeset +ffffffff81a27fc0 t intel_crtc_copy_uapi_to_hw_state_modeset +ffffffff81a28120 t intel_atomic_commit_ready +ffffffff81a281c0 t intel_atomic_commit_work +ffffffff81a281e0 t intel_atomic_commit_tail +ffffffff81a295c0 t intel_atomic_cleanup_work +ffffffff81a2a000 T intel_display_power_domain_str +ffffffff81a2a060 T __intel_display_power_is_enabled +ffffffff81a2a130 T intel_display_power_is_enabled +ffffffff81a2a240 T intel_display_power_set_target_dc_state +ffffffff81a2a360 T intel_display_power_get +ffffffff81a2a3e0 t __intel_display_power_get_domain +ffffffff81a2a5c0 T intel_display_power_get_if_enabled +ffffffff81a2a6f0 T __intel_display_power_put_async +ffffffff81a2a8c0 t __intel_display_power_put_domain +ffffffff81a2aa40 T intel_display_power_flush_work +ffffffff81a2ab60 t release_async_put_domains +ffffffff81a2ac40 T intel_display_power_put_unchecked +ffffffff81a2aca0 T intel_display_power_get_in_set +ffffffff81a2ad80 T intel_display_power_get_in_set_if_enabled +ffffffff81a2ae30 T intel_display_power_put_mask_in_set +ffffffff81a2af00 T intel_power_domains_init +ffffffff81a2b150 t intel_display_power_put_async_work +ffffffff81a2b3c0 T intel_power_domains_cleanup +ffffffff81a2b3e0 T gen9_dbuf_slices_update +ffffffff81a2b600 T intel_power_domains_init_hw +ffffffff81a2bda0 t icl_display_core_init +ffffffff81a2c690 t bxt_display_core_init +ffffffff81a2c7c0 T intel_power_domains_driver_remove +ffffffff81a2c8b0 T intel_power_domains_sanitize_state +ffffffff81a2c9a0 T intel_power_domains_enable +ffffffff81a2ca00 T intel_power_domains_disable +ffffffff81a2cab0 T intel_power_domains_suspend +ffffffff81a2cc40 t icl_display_core_uninit +ffffffff81a2cce0 t bxt_display_core_uninit +ffffffff81a2cd90 T intel_power_domains_resume +ffffffff81a2ce60 T intel_display_power_suspend_late +ffffffff81a2cf50 t hsw_enable_pc8 +ffffffff81a2d8f0 T intel_display_power_resume_early +ffffffff81a2d9e0 t hsw_disable_pc8 +ffffffff81a2de60 T intel_display_power_suspend +ffffffff81a2dee0 T intel_display_power_resume +ffffffff81a2dfc0 T intel_display_power_debug +ffffffff81a2e090 T intel_display_power_ddi_io_domain +ffffffff81a2e170 T intel_display_power_ddi_lanes_domain +ffffffff81a2e250 T intel_display_power_legacy_aux_domain +ffffffff81a2e360 T intel_display_power_tbt_aux_domain +ffffffff81a2e470 t __delayed_work_tick +ffffffff81a2f000 T intel_display_power_map_init +ffffffff81a2f170 t __set_power_wells +ffffffff81a2f550 T intel_display_power_map_cleanup +ffffffff81a30000 T lookup_power_well +ffffffff81a300c0 T intel_power_well_enable +ffffffff81a30150 T intel_power_well_name +ffffffff81a30190 T intel_power_well_disable +ffffffff81a30200 T intel_power_well_sync_hw +ffffffff81a30270 T intel_power_well_get +ffffffff81a30310 T intel_power_well_put +ffffffff81a30410 T intel_power_well_is_enabled +ffffffff81a30430 T intel_power_well_is_enabled_cached +ffffffff81a30460 T intel_display_power_well_is_enabled +ffffffff81a30520 T intel_power_well_is_always_on +ffffffff81a30560 T intel_power_well_domains +ffffffff81a30590 T intel_power_well_refcount +ffffffff81a305c0 T gen9_sanitize_dc_state +ffffffff81a306a0 T gen9_set_dc_state +ffffffff81a30a00 T gen9_enable_dc5 +ffffffff81a30c60 T skl_enable_dc6 +ffffffff81a30db0 T bxt_enable_dc9 +ffffffff81a30f60 T bxt_disable_dc9 +ffffffff81a31050 T gen9_disable_dc_states +ffffffff81a31420 T chv_phy_powergate_ch +ffffffff81a31530 t assert_chv_phy_status +ffffffff81a318d0 T chv_phy_powergate_lanes +ffffffff81a31b90 t i9xx_power_well_sync_hw_noop +ffffffff81a31bc0 t i9xx_always_on_power_well_noop +ffffffff81a31bf0 t i9xx_always_on_power_well_enabled +ffffffff81a31c20 t chv_pipe_power_well_sync_hw +ffffffff81a31c50 t chv_pipe_power_well_enable +ffffffff81a31c80 t chv_pipe_power_well_disable +ffffffff81a31ce0 t chv_pipe_power_well_enabled +ffffffff81a31de0 t chv_dpio_cmn_power_well_enable +ffffffff81a31ff0 t chv_dpio_cmn_power_well_disable +ffffffff81a32120 t vlv_power_well_enabled +ffffffff81a32230 t i830_pipes_power_well_sync_hw +ffffffff81a32320 t i830_pipes_power_well_enable +ffffffff81a323e0 t i830_pipes_power_well_disable +ffffffff81a32410 t i830_pipes_power_well_enabled +ffffffff81a324b0 t hsw_power_well_sync_hw +ffffffff81a325a0 t hsw_power_well_enable +ffffffff81a32820 t hsw_power_well_disable +ffffffff81a328d0 t hsw_power_well_enabled +ffffffff81a329b0 t gen9_dc_off_power_well_enable +ffffffff81a329c0 t gen9_dc_off_power_well_disable +ffffffff81a32a60 t gen9_dc_off_power_well_enabled +ffffffff81a32af0 t bxt_dpio_cmn_power_well_enable +ffffffff81a32b20 t bxt_dpio_cmn_power_well_disable +ffffffff81a32b50 t bxt_dpio_cmn_power_well_enabled +ffffffff81a32b80 t vlv_display_power_well_enable +ffffffff81a32bb0 t vlv_display_power_well_disable +ffffffff81a32c20 t vlv_dpio_cmn_power_well_enable +ffffffff81a32ca0 t vlv_dpio_cmn_power_well_disable +ffffffff81a32da0 t vlv_power_well_enable +ffffffff81a32dc0 t vlv_power_well_disable +ffffffff81a32de0 t icl_aux_power_well_enable +ffffffff81a33460 t icl_aux_power_well_disable +ffffffff81a33700 t tgl_tc_cold_off_power_well_sync_hw +ffffffff81a33720 t tgl_tc_cold_off_power_well_enable +ffffffff81a33740 t tgl_tc_cold_off_power_well_disable +ffffffff81a33760 t tgl_tc_cold_off_power_well_is_enabled +ffffffff81a33790 t xelpdp_aux_power_well_enable +ffffffff81a33870 t xelpdp_aux_power_well_disable +ffffffff81a33950 t xelpdp_aux_power_well_enabled +ffffffff81a33a00 t chv_set_pipe_power_well +ffffffff81a33c00 t vlv_display_power_well_init +ffffffff81a33e90 t vlv_set_power_well +ffffffff81a340a0 t hsw_wait_for_power_well_enable +ffffffff81a341e0 t hsw_wait_for_power_well_disable +ffffffff81a34470 t tgl_tc_cold_request +ffffffff81a35000 T intel_dkl_phy_read +ffffffff81a35100 T intel_dkl_phy_write +ffffffff81a351f0 T intel_dkl_phy_rmw +ffffffff81a35310 T intel_dkl_phy_posting_read +ffffffff81a36000 T intel_dmc_has_payload +ffffffff81a36040 T intel_dmc_load_program +ffffffff81a36820 t pipedmc_clock_gating_wa +ffffffff81a36a10 T intel_dmc_disable_program +ffffffff81a36c30 T assert_dmc_loaded +ffffffff81a36d80 T intel_dmc_ucode_init +ffffffff81a37050 t dmc_load_work_fn +ffffffff81a378b0 T intel_dmc_ucode_suspend +ffffffff81a37920 T intel_dmc_ucode_resume +ffffffff81a379c0 T intel_dmc_ucode_fini +ffffffff81a37af0 T intel_dmc_print_error_state +ffffffff81a37ba0 T intel_dmc_debugfs_register +ffffffff81a38000 T intel_dp_is_edp +ffffffff81a38030 T intel_dp_is_uhbr +ffffffff81a38070 T intel_dp_max_lane_count +ffffffff81a380e0 T intel_dp_link_required +ffffffff81a38120 T intel_dp_max_data_rate +ffffffff81a38190 T intel_dp_can_bigjoiner +ffffffff81a381e0 T intel_dp_get_link_train_fallback_values +ffffffff81a385c0 T intel_dp_mode_to_fec_clock +ffffffff81a38610 T intel_dp_min_bpp +ffffffff81a38650 T intel_dp_source_supports_tps3 +ffffffff81a386a0 T intel_dp_source_supports_tps4 +ffffffff81a386d0 T intel_dp_max_link_rate +ffffffff81a38790 T intel_dp_rate_select +ffffffff81a38830 T intel_dp_compute_rate +ffffffff81a38900 T intel_dp_adjust_compliance_config +ffffffff81a38a40 T intel_dp_limited_color_range +ffffffff81a38ab0 T intel_dp_compute_psr_vsc_sdp +ffffffff81a38b30 T intel_dp_needs_vsc_sdp +ffffffff81a38b80 t intel_dp_compute_vsc_colorimetry +ffffffff81a38d00 T intel_dp_compute_config +ffffffff81a39390 t intel_dp_compute_output_format +ffffffff81a395c0 T intel_dp_set_link_params +ffffffff81a39600 T intel_edp_backlight_on +ffffffff81a396b0 T intel_edp_backlight_off +ffffffff81a39760 T intel_dp_sink_set_decompression_state +ffffffff81a39800 T intel_dp_wait_source_oui +ffffffff81a398d0 T intel_dp_set_power +ffffffff81a39ae0 T intel_dp_sync_state +ffffffff81a39b60 t intel_dp_get_dpcd +ffffffff81a39cc0 t intel_dp_reset_max_link_params +ffffffff81a39dd0 T intel_dp_initial_fastset_check +ffffffff81a39ed0 T intel_dp_check_frl_training +ffffffff81a3a460 T intel_dp_pcon_dsc_configure +ffffffff81a3a630 T intel_dp_configure_protocol_converter +ffffffff81a3a7a0 T intel_dp_get_colorimetry_status +ffffffff81a3a800 T intel_edp_fixup_vbt_bpp +ffffffff81a3a8a0 T intel_write_dp_vsc_sdp +ffffffff81a3aa30 T intel_dp_set_infoframes +ffffffff81a3ab60 t intel_write_dp_sdp +ffffffff81a3ae50 T intel_read_dp_sdp +ffffffff81a3b180 T intel_dp_retrain_link +ffffffff81a3b840 T intel_dp_phy_test +ffffffff81a3bf20 T intel_digital_port_connected +ffffffff81a3bfc0 T intel_dp_encoder_flush_work +ffffffff81a3c010 T intel_dp_encoder_suspend +ffffffff81a3c050 T intel_dp_encoder_shutdown +ffffffff81a3c090 T intel_dp_hpd_pulse +ffffffff81a3c7e0 T intel_dp_is_port_edp +ffffffff81a3c830 T intel_dp_init_connector +ffffffff81a3d990 t intel_dp_modeset_retry_work_fn +ffffffff81a3da10 t intel_dp_set_common_rates +ffffffff81a3dbb0 T intel_dp_mst_suspend +ffffffff81a3dc50 T intel_dp_mst_resume +ffffffff81a3dd00 t intel_dp_compute_link_config +ffffffff81a3ea20 t intel_dp_dsc_get_slice_count +ffffffff81a3eb90 t intel_dp_set_sink_rates +ffffffff81a3edc0 t intel_dp_check_device_service_irq +ffffffff81a3f390 t intel_dp_force +ffffffff81a3f4d0 t intel_dp_connector_register +ffffffff81a3f5b0 t intel_dp_connector_unregister +ffffffff81a3f610 t intel_dp_oob_hotplug_event +ffffffff81a3f690 t intel_dp_set_edid +ffffffff81a3fac0 t intel_dp_get_modes +ffffffff81a3fbc0 t intel_dp_detect +ffffffff81a404b0 t intel_dp_mode_valid +ffffffff81a40c40 t intel_dp_connector_atomic_check +ffffffff81a40f80 t intel_dp_get_dsc_sink_cap +ffffffff81a42000 T intel_dp_aux_fini +ffffffff81a42020 T intel_dp_aux_init +ffffffff81a42200 t xelpdp_aux_ctl_reg +ffffffff81a422c0 t xelpdp_aux_data_reg +ffffffff81a42390 t tgl_aux_ctl_reg +ffffffff81a42410 t tgl_aux_data_reg +ffffffff81a424a0 t skl_aux_ctl_reg +ffffffff81a42520 t skl_aux_data_reg +ffffffff81a425b0 t ilk_aux_ctl_reg +ffffffff81a42630 t ilk_aux_data_reg +ffffffff81a426c0 t g4x_aux_ctl_reg +ffffffff81a42740 t g4x_aux_data_reg +ffffffff81a427d0 t skl_get_aux_clock_divider +ffffffff81a42800 t hsw_get_aux_clock_divider +ffffffff81a428a0 t ilk_get_aux_clock_divider +ffffffff81a42900 t g4x_get_aux_clock_divider +ffffffff81a42950 t skl_get_aux_send_ctl +ffffffff81a429d0 t g4x_get_aux_send_ctl +ffffffff81a42a20 t kasprintf +ffffffff81a42af0 t intel_dp_aux_transfer +ffffffff81a42d40 t intel_dp_aux_xfer +ffffffff81a44000 T intel_dp_aux_init_backlight_funcs +ffffffff81a44270 t intel_dp_aux_hdr_setup_backlight +ffffffff81a443c0 t intel_dp_aux_hdr_get_backlight +ffffffff81a44530 t intel_dp_aux_hdr_set_backlight +ffffffff81a44620 t intel_dp_aux_hdr_disable_backlight +ffffffff81a446a0 t intel_dp_aux_hdr_enable_backlight +ffffffff81a448f0 t intel_dp_aux_vesa_setup_backlight +ffffffff81a44ab0 t intel_dp_aux_vesa_get_backlight +ffffffff81a44ae0 t intel_dp_aux_vesa_set_backlight +ffffffff81a44b80 t intel_dp_aux_vesa_disable_backlight +ffffffff81a44c30 t intel_dp_aux_vesa_enable_backlight +ffffffff81a45000 T intel_dp_hdcp_init +ffffffff81a450b0 t intel_dp_hdcp_write_an_aksv +ffffffff81a451a0 t intel_dp_hdcp_read_bksv +ffffffff81a45230 t intel_dp_hdcp_read_bstatus +ffffffff81a452c0 t intel_dp_hdcp_repeater_present +ffffffff81a45370 t intel_dp_hdcp_read_ri_prime +ffffffff81a45400 t intel_dp_hdcp_read_ksv_ready +ffffffff81a454a0 t intel_dp_hdcp_read_ksv_fifo +ffffffff81a45590 t intel_dp_hdcp_read_v_prime_part +ffffffff81a45630 t intel_dp_hdcp_toggle_signalling +ffffffff81a45660 t intel_dp_mst_hdcp_stream_encryption +ffffffff81a45870 t intel_dp_hdcp_check_link +ffffffff81a45900 t intel_dp_hdcp_capable +ffffffff81a459b0 t intel_dp_hdcp2_capable +ffffffff81a45a30 t intel_dp_hdcp2_write_msg +ffffffff81a45af0 t intel_dp_hdcp2_read_msg +ffffffff81a461c0 t intel_dp_hdcp2_config_stream_type +ffffffff81a46270 t intel_dp_mst_hdcp2_stream_encryption +ffffffff81a46500 t intel_dp_mst_hdcp2_check_link +ffffffff81a465c0 t get_hdcp2_dp_msg_data +ffffffff81a46700 t intel_dp_hdcp2_check_link +ffffffff81a47000 T intel_dp_init_lttpr_and_dprx_caps +ffffffff81a472c0 T intel_dp_get_adjust_train +ffffffff81a47980 T intel_dp_program_link_training_pattern +ffffffff81a47a80 T intel_dp_set_signal_levels +ffffffff81a47de0 T intel_dp_dump_link_status +ffffffff81a47eb0 T intel_dp_stop_link_train +ffffffff81a480e0 T intel_dp_start_link_train +ffffffff81a49220 t intel_dp_link_train_phy +ffffffff81a4b000 T intel_dp_mst_encoder_active_links +ffffffff81a4b030 T intel_dp_mst_encoder_init +ffffffff81a4b270 T intel_dp_mst_source_support +ffffffff81a4b2b0 T intel_dp_mst_encoder_cleanup +ffffffff81a4b310 T intel_dp_mst_is_master_trans +ffffffff81a4b350 T intel_dp_mst_is_slave_trans +ffffffff81a4b390 T intel_dp_mst_add_topology_state_for_crtc +ffffffff81a4b460 t intel_dp_add_mst_connector +ffffffff81a4b670 t intel_dp_mst_poll_hpd_irq +ffffffff81a4b690 t intel_dp_mst_get_hw_state +ffffffff81a4b6f0 t intel_dp_mst_connector_late_register +ffffffff81a4b760 t intel_dp_mst_connector_early_unregister +ffffffff81a4b790 t intel_dp_mst_get_modes +ffffffff81a4b830 t intel_dp_mst_detect +ffffffff81a4b930 t intel_dp_mst_mode_valid_ctx +ffffffff81a4ba90 t intel_mst_atomic_best_encoder +ffffffff81a4baf0 t intel_dp_mst_atomic_check +ffffffff81a4bc70 t intel_dp_mst_compute_config +ffffffff81a4bf80 t intel_dp_mst_compute_config_late +ffffffff81a4c080 t intel_mst_disable_dp +ffffffff81a4c170 t intel_mst_post_disable_dp +ffffffff81a4c430 t intel_mst_pre_pll_enable_dp +ffffffff81a4c480 t intel_mst_pre_enable_dp +ffffffff81a4c6a0 t intel_mst_enable_dp +ffffffff81a4ca90 t intel_dp_mst_enc_get_hw_state +ffffffff81a4cad0 t intel_dp_mst_enc_get_config +ffffffff81a4caf0 t intel_dp_mst_initial_fastset_check +ffffffff81a4cb10 t intel_dp_mst_encoder_destroy +ffffffff81a4d000 T bxt_port_to_phy_channel +ffffffff81a4d130 T bxt_ddi_phy_set_signal_levels +ffffffff81a4d650 T bxt_ddi_phy_is_enabled +ffffffff81a4d7a0 T bxt_ddi_phy_uninit +ffffffff81a4d8a0 T bxt_ddi_phy_init +ffffffff81a4dad0 t _bxt_ddi_phy_init +ffffffff81a4e0f0 T bxt_ddi_phy_verify_state +ffffffff81a4e430 t __phy_reg_verify_state +ffffffff81a4e530 T bxt_ddi_phy_calc_lane_lat_optim_mask +ffffffff81a4e5a0 T bxt_ddi_phy_set_lane_optim_mask +ffffffff81a4e8d0 T bxt_ddi_phy_get_lane_lat_optim_mask +ffffffff81a4eb20 T chv_set_phy_signal_level +ffffffff81a4ee80 T chv_data_lane_soft_reset +ffffffff81a4f060 T chv_phy_pre_pll_enable +ffffffff81a4f300 T chv_phy_pre_encoder_enable +ffffffff81a4f590 T chv_phy_release_cl2_override +ffffffff81a4f620 T chv_phy_post_pll_disable +ffffffff81a4f6d0 T vlv_set_phy_signal_level +ffffffff81a4f850 T vlv_phy_pre_pll_enable +ffffffff81a4f970 T vlv_phy_pre_encoder_enable +ffffffff81a4fa90 T vlv_phy_reset_lanes +ffffffff81a50000 T pnv_calc_dpll_params +ffffffff81a500c0 T i9xx_calc_dpll_params +ffffffff81a50190 T vlv_calc_dpll_params +ffffffff81a50250 T chv_calc_dpll_params +ffffffff81a50320 T bxt_find_best_dpll +ffffffff81a50340 t chv_find_best_dpll +ffffffff81a50680 T i9xx_dpll_compute_fp +ffffffff81a506c0 T vlv_compute_dpll +ffffffff81a50740 T chv_compute_dpll +ffffffff81a507c0 T intel_dpll_crtc_compute_clock +ffffffff81a508c0 T intel_dpll_crtc_get_shared_dpll +ffffffff81a50a10 T intel_dpll_init_clock_hook +ffffffff81a50b00 T i9xx_enable_pll +ffffffff81a50eb0 T vlv_enable_pll +ffffffff81a51410 T chv_enable_pll +ffffffff81a51a90 T vlv_force_pll_on +ffffffff81a51be0 T vlv_disable_pll +ffffffff81a51ca0 T chv_disable_pll +ffffffff81a51dd0 T i9xx_disable_pll +ffffffff81a51ed0 T vlv_force_pll_off +ffffffff81a51fc0 T assert_pll_enabled +ffffffff81a520a0 T assert_pll_disabled +ffffffff81a52180 t intel_pll_is_valid +ffffffff81a52250 t dg2_crtc_compute_clock +ffffffff81a522d0 t hsw_crtc_compute_clock +ffffffff81a52390 t hsw_crtc_get_shared_dpll +ffffffff81a52430 t ilk_crtc_compute_clock +ffffffff81a52730 t ilk_crtc_get_shared_dpll +ffffffff81a52780 t g4x_find_best_dpll +ffffffff81a52ac0 t chv_crtc_compute_clock +ffffffff81a52bd0 t vlv_crtc_compute_clock +ffffffff81a53090 t g4x_crtc_compute_clock +ffffffff81a531e0 t i9xx_compute_dpll +ffffffff81a53460 t pnv_crtc_compute_clock +ffffffff81a53820 t i9xx_crtc_compute_clock +ffffffff81a53940 t i9xx_find_best_dpll +ffffffff81a53c70 t i8xx_crtc_compute_clock +ffffffff81a54000 T intel_get_shared_dpll_by_id +ffffffff81a54040 T intel_get_shared_dpll_id +ffffffff81a540d0 T assert_shared_dpll +ffffffff81a541f0 T intel_dpll_get_hw_state +ffffffff81a54220 T icl_tc_port_to_pll_id +ffffffff81a54250 T intel_enable_shared_dpll +ffffffff81a54540 T intel_disable_shared_dpll +ffffffff81a54780 T intel_shared_dpll_swap_state +ffffffff81a54860 T icl_set_active_port_dpll +ffffffff81a548a0 T intel_shared_dpll_init +ffffffff81a54ab0 T intel_compute_shared_dplls +ffffffff81a54b40 T intel_reserve_shared_dplls +ffffffff81a54bd0 T intel_release_shared_dplls +ffffffff81a54c10 T intel_update_active_dpll +ffffffff81a54c70 T intel_dpll_get_freq +ffffffff81a54d00 T intel_dpll_update_ref_clks +ffffffff81a54d50 T intel_dpll_readout_hw_state +ffffffff81a54ed0 T intel_dpll_sanitize_state +ffffffff81a54fb0 T intel_dpll_dump_hw_state +ffffffff81a55030 T intel_shared_dpll_state_verify +ffffffff81a55150 t verify_single_dpll_state +ffffffff81a55470 T intel_shared_dpll_verify_disabled +ffffffff81a554f0 t icl_compute_dplls +ffffffff81a562d0 t icl_get_dplls +ffffffff81a56a50 t icl_put_dplls +ffffffff81a56b10 t icl_update_active_dpll +ffffffff81a56bc0 t icl_update_dpll_ref_clks +ffffffff81a56c00 t icl_dump_hw_state +ffffffff81a56cc0 t combo_pll_enable +ffffffff81a56ef0 t combo_pll_disable +ffffffff81a56fe0 t combo_pll_get_hw_state +ffffffff81a57070 t icl_ddi_combo_pll_get_freq +ffffffff81a57240 t icl_dpll_write +ffffffff81a574e0 t adlp_cmtg_clock_gating_wa +ffffffff81a57640 t icl_pll_disable +ffffffff81a577e0 t icl_pll_get_hw_state +ffffffff81a57b20 t tbt_pll_enable +ffffffff81a57ce0 t tbt_pll_disable +ffffffff81a57d00 t tbt_pll_get_hw_state +ffffffff81a57d20 t icl_ddi_tbt_pll_get_freq +ffffffff81a57d90 t mg_pll_enable +ffffffff81a58340 t mg_pll_disable +ffffffff81a58380 t dkl_pll_get_hw_state +ffffffff81a58550 t icl_ddi_mg_pll_get_freq +ffffffff81a58630 t intel_find_shared_dpll +ffffffff81a58960 t intel_unreference_shared_dpll +ffffffff81a58ac0 t mg_pll_get_hw_state +ffffffff81a58d10 t bxt_compute_dpll +ffffffff81a59030 t bxt_get_dpll +ffffffff81a59290 t intel_put_dpll +ffffffff81a592f0 t bxt_update_dpll_ref_clks +ffffffff81a59330 t bxt_dump_hw_state +ffffffff81a593e0 t bxt_ddi_pll_enable +ffffffff81a59ef0 t bxt_ddi_pll_disable +ffffffff81a5a100 t bxt_ddi_pll_get_hw_state +ffffffff81a5a590 t bxt_ddi_pll_get_freq +ffffffff81a5a620 t bxt_ddi_set_dpll_hw_state +ffffffff81a5a7e0 t skl_compute_dpll +ffffffff81a5af60 t skl_get_dpll +ffffffff81a5b190 t skl_update_dpll_ref_clks +ffffffff81a5b1d0 t skl_dump_hw_state +ffffffff81a5b230 t skl_ddi_dpll0_enable +ffffffff81a5b2f0 t skl_ddi_dpll0_disable +ffffffff81a5b320 t skl_ddi_dpll0_get_hw_state +ffffffff81a5b420 t skl_ddi_pll_get_freq +ffffffff81a5b4b0 t skl_ddi_wrpll_get_freq +ffffffff81a5b610 t skl_ddi_pll_enable +ffffffff81a5b830 t skl_ddi_pll_disable +ffffffff81a5b8c0 t skl_ddi_pll_get_hw_state +ffffffff81a5b9e0 t hsw_compute_dpll +ffffffff81a5c230 t hsw_get_dpll +ffffffff81a5c4f0 t hsw_update_dpll_ref_clks +ffffffff81a5c560 t hsw_dump_hw_state +ffffffff81a5c590 t hsw_ddi_wrpll_enable +ffffffff81a5c610 t hsw_ddi_wrpll_disable +ffffffff81a5c6f0 t hsw_ddi_wrpll_get_hw_state +ffffffff81a5c790 t hsw_ddi_wrpll_get_freq +ffffffff81a5c880 t hsw_ddi_spll_enable +ffffffff81a5c8e0 t hsw_ddi_spll_disable +ffffffff81a5c9b0 t hsw_ddi_spll_get_hw_state +ffffffff81a5ca40 t hsw_ddi_spll_get_freq +ffffffff81a5cae0 t hsw_ddi_lcpll_enable +ffffffff81a5cb10 t hsw_ddi_lcpll_disable +ffffffff81a5cb40 t hsw_ddi_lcpll_get_hw_state +ffffffff81a5cb70 t hsw_ddi_lcpll_get_freq +ffffffff81a5cbf0 t ibx_compute_dpll +ffffffff81a5cc20 t ibx_get_dpll +ffffffff81a5cea0 t ibx_dump_hw_state +ffffffff81a5cf00 t ibx_pch_dpll_enable +ffffffff81a5d0b0 t ibx_pch_dpll_disable +ffffffff81a5d130 t ibx_pch_dpll_get_hw_state +ffffffff81a5e000 T intel_dpt_pin +ffffffff81a5e1d0 T intel_dpt_unpin +ffffffff81a5e240 T intel_dpt_resume +ffffffff81a5e310 T intel_dpt_suspend +ffffffff81a5e3e0 T intel_dpt_create +ffffffff81a5e710 t dpt_insert_page +ffffffff81a5e780 t dpt_clear_range +ffffffff81a5e7b0 t dpt_insert_entries +ffffffff81a5e8b0 t dpt_cleanup +ffffffff81a5e900 t dpt_bind_vma +ffffffff81a5e990 t dpt_unbind_vma +ffffffff81a5e9c0 T intel_dpt_destroy +ffffffff81a5ea10 t __ww_mutex_lock +ffffffff81a5f000 T intel_drrs_type_str +ffffffff81a5f040 T intel_drrs_is_active +ffffffff81a5f070 T intel_drrs_activate +ffffffff81a5f270 T intel_drrs_deactivate +ffffffff81a5f350 t intel_drrs_set_state +ffffffff81a5f4a0 T intel_drrs_invalidate +ffffffff81a5f4c0 t intel_drrs_frontbuffer_update +ffffffff81a5f620 T intel_drrs_flush +ffffffff81a5f640 T intel_crtc_drrs_init +ffffffff81a5f6e0 t intel_drrs_downclock_work +ffffffff81a5f740 t __delayed_work_tick +ffffffff81a60000 T intel_dsb_indexed_reg_write +ffffffff81a60140 T intel_dsb_reg_write +ffffffff81a60230 T intel_dsb_commit +ffffffff81a60680 T intel_dsb_prepare +ffffffff81a60810 T intel_dsb_cleanup +ffffffff81a61000 T intel_dsi_bitrate +ffffffff81a610a0 T intel_dsi_tlpx_ns +ffffffff81a610f0 T intel_dsi_get_modes +ffffffff81a61100 T intel_dsi_mode_valid +ffffffff81a611c0 T intel_dsi_host_init +ffffffff81a61270 T intel_dsi_get_panel_orientation +ffffffff81a62000 T intel_dsi_dcs_init_backlight_funcs +ffffffff81a620a0 t dcs_setup_backlight +ffffffff81a62100 t dcs_get_backlight +ffffffff81a62200 t dcs_set_backlight +ffffffff81a622f0 t dcs_disable_backlight +ffffffff81a62670 t dcs_enable_backlight +ffffffff81a63000 T intel_dsi_vbt_exec_sequence +ffffffff81a63020 T intel_dsi_msleep +ffffffff81a63090 T intel_dsi_log_params +ffffffff81a63410 T intel_dsi_vbt_init +ffffffff81a638a0 T intel_dsi_vbt_gpio_init +ffffffff81a638c0 T intel_dsi_vbt_gpio_cleanup +ffffffff81a64000 T intel_dvo_init +ffffffff81a644f0 t intel_disable_dvo +ffffffff81a645a0 t intel_enable_dvo +ffffffff81a64690 t intel_dvo_get_hw_state +ffffffff81a64700 t intel_dvo_get_config +ffffffff81a647b0 t intel_dvo_compute_config +ffffffff81a64840 t intel_dvo_pre_enable +ffffffff81a64930 t intel_dvo_connector_get_hw_state +ffffffff81a649b0 t intel_dvo_enc_destroy +ffffffff81a649f0 t intel_dvo_detect +ffffffff81a64af0 t intel_dvo_get_modes +ffffffff81a64b60 t intel_dvo_mode_valid +ffffffff81a65000 T intel_fb_get_format_info +ffffffff81a65240 T intel_fb_is_ccs_modifier +ffffffff81a65410 T intel_fb_is_rc_ccs_cc_modifier +ffffffff81a655e0 T intel_fb_is_mc_ccs_modifier +ffffffff81a657b0 T intel_fb_plane_get_modifiers +ffffffff81a658f0 T intel_fb_plane_supports_modifier +ffffffff81a65960 T intel_format_info_is_yuv_semiplanar +ffffffff81a65c00 T intel_fb_is_ccs_aux_plane +ffffffff81a65e40 T intel_fb_rc_ccs_cc_plane +ffffffff81a660a0 T is_surface_linear +ffffffff81a663d0 T main_to_ccs_plane +ffffffff81a666b0 T skl_ccs_to_main_plane +ffffffff81a669a0 T skl_main_to_aux_plane +ffffffff81a66c00 T intel_tile_size +ffffffff81a66c40 T intel_tile_width_bytes +ffffffff81a66e90 T intel_tile_height +ffffffff81a66ef0 T intel_tile_row_size +ffffffff81a66f70 T intel_fb_align_height +ffffffff81a66ff0 T intel_fb_uses_dpt +ffffffff81a67040 T intel_cursor_alignment +ffffffff81a670a0 T intel_surf_alignment +ffffffff81a672c0 T intel_fb_plane_get_subsampling +ffffffff81a67690 T intel_plane_adjust_aligned_offset +ffffffff81a67700 t intel_adjust_aligned_offset +ffffffff81a678b0 T intel_plane_compute_aligned_offset +ffffffff81a679b0 t intel_compute_aligned_offset +ffffffff81a67b70 T intel_fb_needs_pot_stride_remap +ffffffff81a67bc0 T intel_fb_supports_90_270_rotation +ffffffff81a67c10 T intel_fill_fb_info +ffffffff81a68850 t calc_plane_remap_info +ffffffff81a692b0 T intel_fb_fill_view +ffffffff81a69300 T intel_plane_compute_gtt +ffffffff81a69bd0 t intel_plane_check_stride +ffffffff81a69f40 T intel_framebuffer_init +ffffffff81a6b350 T intel_user_framebuffer_create +ffffffff81a6b490 T intel_framebuffer_create +ffffffff81a6b520 t intel_adjust_tile_offset +ffffffff81a6b660 t intel_user_framebuffer_destroy +ffffffff81a6b6c0 t intel_user_framebuffer_create_handle +ffffffff81a6b6e0 t intel_user_framebuffer_dirty +ffffffff81a6c000 T intel_pin_and_fence_fb_obj +ffffffff81a6c320 t i915_gem_object_lock +ffffffff81a6c530 T intel_unpin_fb_vma +ffffffff81a6c5a0 T intel_plane_pin_fb +ffffffff81a6c8d0 T intel_plane_unpin_fb +ffffffff81a6d000 T intel_fbc_cleanup +ffffffff81a6d1c0 T intel_fbc_pre_update +ffffffff81a6d810 T intel_fbc_post_update +ffffffff81a6da60 T intel_fbc_invalidate +ffffffff81a6dc80 T intel_fbc_flush +ffffffff81a6df10 T intel_fbc_atomic_check +ffffffff81a6e480 T intel_fbc_disable +ffffffff81a6e540 t __intel_fbc_disable +ffffffff81a6e6d0 T intel_fbc_update +ffffffff81a6ed90 T intel_fbc_reset_underrun +ffffffff81a6eef0 T intel_fbc_handle_fifo_underrun_irq +ffffffff81a6efa0 T intel_fbc_add_plane +ffffffff81a6efd0 T intel_fbc_init +ffffffff81a6f260 T intel_fbc_sanitize +ffffffff81a6f330 T intel_fbc_crtc_debugfs_add +ffffffff81a6f360 T intel_fbc_debugfs_register +ffffffff81a6f390 t intel_fbc_is_ok +ffffffff81a6f4b0 t intel_fbc_update_state +ffffffff81a6f820 t intel_fbc_underrun_work_fn +ffffffff81a6f940 t ivb_fbc_activate +ffffffff81a6fba0 t ilk_fbc_deactivate +ffffffff81a6fc50 t ilk_fbc_is_active +ffffffff81a6fcb0 t ivb_fbc_is_compressing +ffffffff81a6fd20 t snb_fbc_nuke +ffffffff81a6fda0 t ilk_fbc_program_cfb +ffffffff81a6fde0 t ivb_fbc_set_false_color +ffffffff81a6fea0 t snb_fbc_activate +ffffffff81a6ff30 t ilk_fbc_is_compressing +ffffffff81a6ffa0 t ilk_fbc_activate +ffffffff81a700d0 t i965_fbc_nuke +ffffffff81a70170 t g4x_fbc_activate +ffffffff81a70280 t g4x_fbc_deactivate +ffffffff81a70310 t g4x_fbc_is_active +ffffffff81a70370 t g4x_fbc_is_compressing +ffffffff81a703d0 t g4x_fbc_program_cfb +ffffffff81a70400 t i8xx_fbc_activate +ffffffff81a70570 t i8xx_fbc_deactivate +ffffffff81a70640 t i8xx_fbc_is_active +ffffffff81a706a0 t i8xx_fbc_is_compressing +ffffffff81a70700 t i8xx_fbc_program_cfb +ffffffff81a70780 t i8xx_fbc_nuke +ffffffff81a71000 T intel_fbdev_init +ffffffff81a714d0 t intel_fbdev_suspend_worker +ffffffff81a71500 T intel_fbdev_initial_config_async +ffffffff81a71570 T intel_fbdev_unregister +ffffffff81a715b0 T intel_fbdev_set_suspend +ffffffff81a715e0 T intel_fbdev_fini +ffffffff81a71670 T intel_fbdev_output_poll_changed +ffffffff81a71710 T intel_fbdev_restore_mode +ffffffff81a71790 T intel_fbdev_framebuffer +ffffffff81a717d0 t intelfb_create +ffffffff81a71dd0 t intel_fbdev_set_par +ffffffff81a72000 T assert_fdi_tx_enabled +ffffffff81a720e0 T assert_fdi_tx_disabled +ffffffff81a721c0 T assert_fdi_rx_enabled +ffffffff81a72280 T assert_fdi_rx_disabled +ffffffff81a72340 T assert_fdi_tx_pll_enabled +ffffffff81a723f0 T assert_fdi_rx_pll_enabled +ffffffff81a724b0 T assert_fdi_rx_pll_disabled +ffffffff81a72570 T intel_fdi_link_train +ffffffff81a72590 T intel_fdi_pll_freq_update +ffffffff81a72640 T intel_fdi_link_freq +ffffffff81a72690 T ilk_fdi_compute_config +ffffffff81a729d0 T intel_fdi_normal_train +ffffffff81a72b60 T hsw_fdi_link_train +ffffffff81a73060 T hsw_fdi_disable +ffffffff81a731c0 T ilk_fdi_pll_enable +ffffffff81a733d0 T ilk_fdi_pll_disable +ffffffff81a73500 T ilk_fdi_disable +ffffffff81a73770 T intel_fdi_init_hook +ffffffff81a737d0 t ilk_fdi_link_train +ffffffff81a73e40 t gen6_fdi_link_train +ffffffff81a74670 t ivb_manual_fdi_link_train +ffffffff81a74f10 t cpt_set_fdi_bc_bifurcation +ffffffff81a76000 T intel_set_cpu_fifo_underrun_reporting +ffffffff81a763f0 T intel_set_pch_fifo_underrun_reporting +ffffffff81a76620 T intel_cpu_fifo_underrun_irq_handler +ffffffff81a76810 T intel_pch_fifo_underrun_irq_handler +ffffffff81a76890 T intel_check_cpu_fifo_underruns +ffffffff81a76ab0 T intel_check_pch_fifo_underruns +ffffffff81a77000 T intel_frontbuffer_flip_prepare +ffffffff81a77050 T intel_frontbuffer_flip_complete +ffffffff81a77130 T intel_frontbuffer_flip +ffffffff81a77200 T __intel_fb_invalidate +ffffffff81a77290 T __intel_fb_flush +ffffffff81a77380 T intel_frontbuffer_get +ffffffff81a774c0 t frontbuffer_active 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intel_hdcp_prop_work +ffffffff81a80540 T intel_hdcp_enable +ffffffff81a80590 T intel_hdcp_disable +ffffffff81a806c0 t intel_hdcp_update_value +ffffffff81a80880 t _intel_hdcp2_disable +ffffffff81a80c80 t _intel_hdcp_disable +ffffffff81a80f80 T intel_hdcp_update_pipe +ffffffff81a810f0 T intel_hdcp_component_fini +ffffffff81a81130 T intel_hdcp_cleanup +ffffffff81a81270 T intel_hdcp_atomic_check +ffffffff81a81300 T intel_hdcp_handle_cp_irq +ffffffff81a81400 t __delayed_work_tick +ffffffff81a81420 t hdcp2_authenticate_repeater_topology +ffffffff81a81700 t intel_hdcp_get_repeater_ctl +ffffffff81a82000 T hsw_write_infoframe +ffffffff81a82410 t hsw_dip_data_reg +ffffffff81a825d0 T hsw_read_infoframe +ffffffff81a82690 T intel_hdmi_infoframe_enable +ffffffff81a82730 T intel_hdmi_infoframes_enabled +ffffffff81a82850 T intel_read_infoframe +ffffffff81a829e0 T intel_hdmi_read_gcp_infoframe +ffffffff81a82ad0 T intel_dp_dual_mode_set_tmds_output +ffffffff81a82ba0 T intel_hdmi_tmds_clock +ffffffff81a82bf0 T intel_hdmi_bpc_possible +ffffffff81a82d20 T intel_hdmi_limited_color_range +ffffffff81a82d90 T intel_hdmi_compute_config +ffffffff81a834e0 t intel_hdmi_compute_output_format +ffffffff81a83610 T intel_hdmi_encoder_shutdown +ffffffff81a836e0 T intel_hdmi_handle_sink_scrambling +ffffffff81a83800 T intel_infoframe_init +ffffffff81a83980 t vlv_write_infoframe +ffffffff81a83ce0 t vlv_read_infoframe +ffffffff81a83eb0 t vlv_set_infoframes +ffffffff81a84250 t vlv_infoframes_enabled +ffffffff81a842f0 t g4x_write_infoframe +ffffffff81a845b0 t g4x_read_infoframe +ffffffff81a84700 t g4x_set_infoframes +ffffffff81a849a0 t g4x_infoframes_enabled +ffffffff81a84a20 t hsw_set_infoframes +ffffffff81a84cc0 t hsw_infoframes_enabled +ffffffff81a84d50 t ibx_write_infoframe +ffffffff81a85070 t ibx_read_infoframe +ffffffff81a851f0 t ibx_set_infoframes +ffffffff81a85560 t ibx_infoframes_enabled +ffffffff81a855f0 t cpt_write_infoframe +ffffffff81a858f0 t cpt_read_infoframe +ffffffff81a85a70 t cpt_set_infoframes +ffffffff81a85d80 t cpt_infoframes_enabled +ffffffff81a85df0 T intel_hdmi_init_connector +ffffffff81a86480 T intel_hdmi_dsc_get_slice_height +ffffffff81a864e0 T intel_hdmi_dsc_get_num_slices +ffffffff81a86660 T intel_hdmi_dsc_get_bpp +ffffffff81a86750 t intel_hdmi_compute_clock +ffffffff81a86a10 t hdmi_port_clock_valid +ffffffff81a86c40 t intel_write_infoframe +ffffffff81a86e10 t intel_hdmi_detect +ffffffff81a86fd0 t intel_hdmi_force +ffffffff81a870b0 t intel_hdmi_connector_register +ffffffff81a870c0 t intel_hdmi_connector_unregister +ffffffff81a870d0 t intel_hdmi_set_edid +ffffffff81a87370 t intel_hdmi_get_modes +ffffffff81a873b0 t intel_hdmi_mode_valid +ffffffff81a87550 t intel_hdmi_mode_clock_valid +ffffffff81a876e0 t intel_hdmi_hdcp_write_an_aksv +ffffffff81a87830 t intel_hdmi_hdcp_read_bksv +ffffffff81a87900 t intel_hdmi_hdcp_read_bstatus +ffffffff81a879d0 t intel_hdmi_hdcp_repeater_present +ffffffff81a87ab0 t intel_hdmi_hdcp_read_ri_prime +ffffffff81a87b80 t intel_hdmi_hdcp_read_ksv_ready +ffffffff81a87c60 t intel_hdmi_hdcp_read_ksv_fifo +ffffffff81a87d30 t intel_hdmi_hdcp_read_v_prime_part +ffffffff81a87e20 t intel_hdmi_hdcp_toggle_signalling +ffffffff81a880b0 t intel_hdmi_hdcp_check_link +ffffffff81a88400 t intel_hdmi_hdcp2_capable +ffffffff81a884c0 t intel_hdmi_hdcp2_write_msg +ffffffff81a885b0 t intel_hdmi_hdcp2_read_msg +ffffffff81a88a50 t intel_hdmi_hdcp2_check_link +ffffffff81a89000 T intel_hpd_pin_default +ffffffff81a89030 T intel_encoder_hotplug +ffffffff81a89160 T intel_hpd_trigger_irq +ffffffff81a891d0 T intel_hpd_irq_handler +ffffffff81a895b0 T intel_hpd_init +ffffffff81a896c0 T intel_hpd_poll_enable +ffffffff81a89740 T intel_hpd_poll_disable +ffffffff81a897a0 T intel_hpd_init_work +ffffffff81a89870 t i915_hotplug_work_func +ffffffff81a89bc0 t i915_digport_work_func +ffffffff81a89d50 t i915_hpd_poll_init_work +ffffffff81a89e60 t intel_hpd_irq_storm_reenable_work +ffffffff81a8a1b0 T intel_hpd_cancel_work +ffffffff81a8a2d0 T intel_hpd_disable +ffffffff81a8a360 T intel_hpd_enable +ffffffff81a8a3d0 t __delayed_work_tick +ffffffff81a8b000 T intel_lpe_audio_irq_handler +ffffffff81a8b020 T intel_lpe_audio_init +ffffffff81a8b050 T intel_lpe_audio_teardown +ffffffff81a8b070 T intel_lpe_audio_notify +ffffffff81a8c000 T lspcon_detect_hdr_capability +ffffffff81a8c0b0 T lspcon_write_infoframe +ffffffff81a8c830 T lspcon_read_infoframe +ffffffff81a8c870 T lspcon_set_infoframes +ffffffff81a8cae0 T lspcon_infoframes_enabled +ffffffff81a8ccd0 T lspcon_wait_pcon_mode +ffffffff81a8ccf0 t lspcon_wait_mode +ffffffff81a8cfb0 T lspcon_init +ffffffff81a8d3c0 T intel_lspcon_infoframes_enabled +ffffffff81a8d400 T lspcon_resume +ffffffff81a8d6b0 t lspcon_change_mode +ffffffff81a8e000 T intel_lvds_port_enabled +ffffffff81a8e080 T intel_get_lvds_encoder +ffffffff81a8e0e0 T intel_is_dual_link_lvds +ffffffff81a8e150 T intel_lvds_init +ffffffff81a8e8c0 t intel_enable_lvds +ffffffff81a8ea10 t intel_pre_enable_lvds +ffffffff81a8ece0 t intel_lvds_compute_config +ffffffff81a8ee40 t pch_disable_lvds +ffffffff81a8ee60 t pch_post_disable_lvds +ffffffff81a8ee80 t gmch_disable_lvds +ffffffff81a8eeb0 t intel_lvds_get_hw_state +ffffffff81a8ef70 t intel_lvds_get_config +ffffffff81a8f070 t intel_lvds_shutdown +ffffffff81a8f110 t intel_no_lvds_dmi_callback +ffffffff81a8f160 t intel_disable_lvds +ffffffff81a8f290 t intel_lvds_get_modes +ffffffff81a8f2c0 t intel_lvds_mode_valid +ffffffff81a8f340 t intel_dual_link_lvds_callback +ffffffff81a90000 T intel_modeset_setup_hw_state +ffffffff81a92000 T intel_modeset_verify_crtc +ffffffff81a923b0 t verify_connector_state +ffffffff81a92660 T intel_modeset_verify_disabled +ffffffff81a93000 T intel_opregion_notify_encoder +ffffffff81a93170 t swsci +ffffffff81a934a0 T intel_opregion_notify_adapter +ffffffff81a93500 T intel_opregion_asle_intr +ffffffff81a93550 T intel_opregion_setup +ffffffff81a93d60 t asle_work +ffffffff81a941e0 T intel_opregion_get_panel_type +ffffffff81a942d0 T intel_opregion_get_edid +ffffffff81a943b0 T intel_opregion_headless_sku +ffffffff81a94400 T intel_opregion_register +ffffffff81a94490 T intel_opregion_resume +ffffffff81a94520 T intel_opregion_suspend +ffffffff81a945c0 T intel_opregion_unregister +ffffffff81a94740 t intel_no_opregion_vbt_callback +ffffffff81a947a0 t intel_use_opregion_panel_type_callback +ffffffff81a95000 T intel_overlay_reset +ffffffff81a95050 T intel_overlay_switch_off +ffffffff81a95250 t intel_overlay_release_old_vid +ffffffff81a953f0 T intel_overlay_put_image_ioctl +ffffffff81a965c0 T intel_overlay_attrs_ioctl +ffffffff81a96a70 T intel_overlay_setup +ffffffff81a96cd0 t intel_overlay_last_flip_retire +ffffffff81a96d10 T intel_overlay_cleanup +ffffffff81a96dd0 T intel_overlay_capture_error_state +ffffffff81a96ec0 T intel_overlay_print_error_state +ffffffff81a97290 t intel_overlay_release_old_vid_tail +ffffffff81a97360 t intel_overlay_off_tail +ffffffff81a97510 t intel_overlay_flip_prepare +ffffffff81a98000 T intel_panel_use_ssc +ffffffff81a98060 T intel_panel_preferred_fixed_mode +ffffffff81a980b0 T intel_panel_fixed_mode +ffffffff81a98170 T intel_panel_downclock_mode +ffffffff81a98260 T intel_panel_highest_mode +ffffffff81a982c0 T intel_panel_get_modes +ffffffff81a98350 T intel_panel_drrs_type +ffffffff81a983a0 T intel_panel_compute_config +ffffffff81a98520 T intel_panel_add_edid_fixed_modes +ffffffff81a98a50 T intel_panel_add_vbt_lfp_fixed_mode +ffffffff81a98ab0 t intel_panel_add_fixed_mode +ffffffff81a98c30 T intel_panel_add_vbt_sdvo_fixed_mode +ffffffff81a98ca0 T intel_panel_add_encoder_fixed_mode +ffffffff81a98ce0 T intel_panel_fitting +ffffffff81a99330 T intel_panel_detect +ffffffff81a993c0 T intel_panel_mode_valid +ffffffff81a994d0 T intel_panel_init_alloc +ffffffff81a99520 T intel_panel_init +ffffffff81a995e0 T intel_panel_fini +ffffffff81a9a000 T intel_has_pch_trancoder +ffffffff81a9a060 T intel_crtc_pch_transcoder +ffffffff81a9a0a0 T intel_pch_transcoder_get_m1_n1 +ffffffff81a9a0f0 T intel_pch_transcoder_get_m2_n2 +ffffffff81a9a140 T ilk_pch_pre_enable +ffffffff81a9a170 T ilk_pch_enable +ffffffff81a9a720 t ilk_pch_transcoder_set_timings +ffffffff81a9a9a0 T ilk_pch_disable +ffffffff81a9a9c0 T ilk_pch_post_disable +ffffffff81a9ad00 T ilk_pch_get_config +ffffffff81a9aec0 T lpt_pch_enable +ffffffff81a9b0f0 T lpt_pch_disable +ffffffff81a9b200 T lpt_pch_get_config +ffffffff81a9b2d0 T intel_pch_sanitize +ffffffff81a9b5b0 t assert_pch_dp_disabled +ffffffff81a9b6a0 t assert_pch_hdmi_disabled +ffffffff81a9c000 T lpt_disable_iclkip +ffffffff81a9c070 T lpt_iclkip +ffffffff81a9c100 T lpt_program_iclkip +ffffffff81a9c380 T lpt_get_iclkip +ffffffff81a9c490 T lpt_disable_clkout_dp +ffffffff81a9c570 T intel_init_pch_refclk +ffffffff81a9e000 T intel_crtc_initial_plane_config +ffffffff81a9f000 T intel_pps_lock +ffffffff81a9f060 T intel_pps_unlock +ffffffff81a9f0c0 T intel_pps_reset_all +ffffffff81a9f210 T intel_pps_check_power_unlocked +ffffffff81a9f3d0 T intel_pps_wait_power_cycle +ffffffff81a9f590 T intel_pps_vdd_on_unlocked +ffffffff81a9fac0 T intel_pps_vdd_on +ffffffff81a9fbc0 T intel_pps_vdd_off_sync +ffffffff81a9fc90 t intel_pps_vdd_off_sync_unlocked +ffffffff81a9ff70 T intel_pps_vdd_off_unlocked +ffffffff81aa0080 T intel_pps_on_unlocked +ffffffff81aa0480 T intel_pps_on +ffffffff81aa0520 T intel_pps_off_unlocked +ffffffff81aa0770 T intel_pps_off +ffffffff81aa0810 T intel_pps_backlight_on +ffffffff81aa0a20 T intel_pps_backlight_off +ffffffff81aa0c30 T intel_pps_backlight_power +ffffffff81aa0e00 T vlv_pps_init +ffffffff81aa0f60 t vlv_detach_power_sequencer +ffffffff81aa10e0 t vlv_steal_power_sequencer +ffffffff81aa1210 t pps_init_delays +ffffffff81aa1680 t pps_init_registers +ffffffff81aa1a20 T intel_pps_have_panel_power_or_vdd +ffffffff81aa1b80 T intel_pps_encoder_reset +ffffffff81aa1d10 t vlv_initial_power_sequencer_setup +ffffffff81aa1fc0 t pps_vdd_init +ffffffff81aa20d0 T intel_pps_init +ffffffff81aa2250 t edp_panel_vdd_work +ffffffff81aa2300 T intel_pps_init_late +ffffffff81aa2480 T intel_pps_unlock_regs_wa +ffffffff81aa2570 T intel_pps_setup +ffffffff81aa25e0 T assert_pps_unlocked +ffffffff81aa2830 t intel_pps_get_registers +ffffffff81aa2f00 t wait_panel_status +ffffffff81aa31d0 t intel_pps_readout_hw_state +ffffffff81aa3390 t __delayed_work_tick +ffffffff81aa4000 T intel_psr_irq_handler +ffffffff81aa4680 T intel_psr_init_dpcd +ffffffff81aa4910 T intel_psr_compute_config +ffffffff81aa51c0 T intel_psr_get_config +ffffffff81aa5370 T intel_psr_disable +ffffffff81aa5480 t intel_psr_disable_locked +ffffffff81aa58f0 T intel_psr_pause +ffffffff81aa5ae0 t intel_psr_exit +ffffffff81aa5dc0 T intel_psr_resume +ffffffff81aa5e50 t intel_psr_activate +ffffffff81aa65f0 T intel_psr2_disable_plane_sel_fetch +ffffffff81aa6660 T intel_psr2_program_plane_sel_fetch +ffffffff81aa6810 T intel_psr2_program_trans_man_trk_ctl +ffffffff81aa6960 T intel_psr2_sel_fetch_update +ffffffff81aa6ff0 T intel_psr_pre_plane_update +ffffffff81aa71c0 T intel_psr_post_plane_update +ffffffff81aa7c50 T intel_psr_wait_for_idle_locked +ffffffff81aa7e30 T intel_psr_debug_set +ffffffff81aa8060 t psr_irq_control +ffffffff81aa81b0 T intel_psr_invalidate +ffffffff81aa8470 T intel_psr_flush +ffffffff81aa8940 T intel_psr_init +ffffffff81aa8a70 t intel_psr_work +ffffffff81aa8c20 t tgl_dc3co_disable_work +ffffffff81aa8c70 T intel_psr_short_pulse +ffffffff81aa9030 T intel_psr_enabled +ffffffff81aa90b0 T intel_psr_lock +ffffffff81aa91a0 T intel_psr_unlock +ffffffff81aa9290 t tgl_psr2_disable_dc3co +ffffffff81aa93c0 t __delayed_work_tick +ffffffff81aaa000 T intel_lookup_range_min_qp +ffffffff81aaa0b0 T intel_lookup_range_max_qp +ffffffff81aab000 T intel_init_quirks +ffffffff81aab0f0 T intel_has_quirk +ffffffff81aab130 t quirk_ssc_force_disable +ffffffff81aab160 t quirk_invert_brightness +ffffffff81aab190 t quirk_backlight_present +ffffffff81aab1c0 t quirk_increase_t12_delay +ffffffff81aab1f0 t quirk_increase_ddi_disabled_time +ffffffff81aab220 t intel_dmi_reverse_brightness +ffffffff81aab270 t intel_dmi_no_pps_backlight +ffffffff81aac000 T intel_sdvo_port_enabled +ffffffff81aac0a0 T intel_sdvo_init +ffffffff81aacc70 t intel_sdvo_compute_config +ffffffff81aad1d0 t pch_disable_sdvo +ffffffff81aad200 t pch_post_disable_sdvo +ffffffff81aad210 t intel_disable_sdvo +ffffffff81aad380 t intel_sdvo_pre_enable +ffffffff81aadd00 t intel_enable_sdvo +ffffffff81aadf00 t intel_sdvo_get_hw_state +ffffffff81aadff0 t intel_sdvo_get_config +ffffffff81aae560 t intel_sdvo_ddc_proxy_xfer +ffffffff81aae610 t intel_sdvo_ddc_proxy_func +ffffffff81aae640 t __intel_sdvo_write_cmd +ffffffff81aaeb00 t proxy_lock_bus +ffffffff81aaeb30 t proxy_trylock_bus +ffffffff81aaeb60 t proxy_unlock_bus +ffffffff81aaeb90 t intel_sdvo_enc_destroy +ffffffff81aaeba0 t intel_sdvo_get_preferred_input_mode +ffffffff81aaef30 t intel_sdvo_get_dtd_from_mode +ffffffff81aaf0a0 t intel_sdvo_read_response +ffffffff81aaf540 t intel_sdvo_write_sdvox +ffffffff81aaf730 t intel_sdvo_write_infoframe +ffffffff81aaf900 t intel_sdvo_dvi_init +ffffffff81aafb90 t intel_sdvo_tv_init +ffffffff81aafeb0 t intel_sdvo_lvds_init +ffffffff81ab00a0 t intel_sdvo_hotplug +ffffffff81ab00e0 t intel_sdvo_connector_get_hw_state +ffffffff81ab0170 t intel_sdvo_detect +ffffffff81ab04f0 t intel_sdvo_connector_register +ffffffff81ab0500 t intel_sdvo_connector_unregister +ffffffff81ab0510 t intel_sdvo_connector_duplicate_state +ffffffff81ab0590 t intel_sdvo_connector_atomic_set_property +ffffffff81ab0760 t intel_sdvo_connector_atomic_get_property +ffffffff81ab0980 t intel_sdvo_get_modes +ffffffff81ab0c40 t intel_sdvo_mode_valid +ffffffff81ab0d10 t intel_sdvo_atomic_check +ffffffff81ab0dc0 t intel_sdvo_create_enhance_property +ffffffff81ab2000 T intel_snps_phy_wait_for_calibration +ffffffff81ab20d0 T intel_snps_phy_update_psr_power_state +ffffffff81ab21a0 T intel_snps_phy_set_signal_levels +ffffffff81ab23f0 T intel_mpllb_calc_state +ffffffff81ab2560 T intel_snps_phy_check_hdmi_link_rate +ffffffff81ab25c0 T intel_mpllb_enable +ffffffff81ab2820 T intel_mpllb_disable +ffffffff81ab29b0 T intel_mpllb_calc_port_clock +ffffffff81ab2a70 T intel_mpllb_readout_hw_state +ffffffff81ab2be0 T intel_mpllb_state_verify +ffffffff81ab4000 T intel_plane_check_src_coordinates +ffffffff81ab41d0 T vlv_plane_min_cdclk +ffffffff81ab42c0 T ivb_plane_min_cdclk +ffffffff81ab4380 T hsw_plane_min_cdclk +ffffffff81ab4420 T chv_plane_check_rotation +ffffffff81ab4490 T intel_sprite_set_colorkey_ioctl +ffffffff81ab4760 T intel_sprite_plane_create +ffffffff81ab4ab0 t vlv_sprite_update_noarm +ffffffff81ab4ba0 t vlv_sprite_update_arm +ffffffff81ab5260 t vlv_sprite_disable_arm +ffffffff81ab52f0 t vlv_sprite_get_hw_state +ffffffff81ab53b0 t vlv_sprite_check +ffffffff81ab5640 t ivb_sprite_update_noarm +ffffffff81ab57b0 t ivb_sprite_update_arm +ffffffff81ab5b90 t ivb_sprite_disable_arm +ffffffff81ab5c40 t ivb_sprite_get_hw_state +ffffffff81ab5cf0 t g4x_sprite_check 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inteldrm_init_backlight +ffffffff81b86f00 T i915_driver_remove +ffffffff81b87000 T i915_driver_shutdown +ffffffff81b87150 T i915_driver_resume_switcheroo +ffffffff81b871b0 t i915_drm_resume_early +ffffffff81b872e0 t i915_drm_resume +ffffffff81b874a0 T intagpsubmatch +ffffffff81b874f0 T intagp_print +ffffffff81b87540 T inteldrm_wsioctl +ffffffff81b876e0 T inteldrm_wsmmap +ffffffff81b87710 T inteldrm_alloc_screen +ffffffff81b87740 T inteldrm_free_screen +ffffffff81b87760 T inteldrm_show_screen +ffffffff81b87830 T inteldrm_load_font +ffffffff81b87850 T inteldrm_list_font +ffffffff81b87870 T inteldrm_scrollback +ffffffff81b87890 T inteldrm_getchar +ffffffff81b878b0 T inteldrm_burner +ffffffff81b87940 T inteldrm_enter_ddb +ffffffff81b879a0 T inteldrm_doswitch +ffffffff81b87a30 T inteldrm_burner_cb +ffffffff81b87a60 T inteldrm_backlight_update_status +ffffffff81b87ac0 T inteldrm_backlight_get_brightness +ffffffff81b87b10 T inteldrm_match +ffffffff81b87ba0 T inteldrm_attach +ffffffff81b88070 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i915_gem_object_ggtt_pin_ww +ffffffff81b8b650 T i915_gem_object_ggtt_pin +ffffffff81b8b7c0 T i915_gem_madvise_ioctl +ffffffff81b8baf0 T i915_gem_drain_freed_objects +ffffffff81b8bb70 T i915_gem_drain_workqueue +ffffffff81b8bc50 T i915_gem_init +ffffffff81b8bfd0 T i915_gem_driver_register +ffffffff81b8c000 T i915_gem_driver_unregister +ffffffff81b8c010 T i915_gem_driver_remove +ffffffff81b8c0f0 T i915_gem_driver_release +ffffffff81b8c240 T i915_gem_init_early +ffffffff81b8c2c0 T i915_gem_cleanup_early +ffffffff81b8c380 T i915_gem_open +ffffffff81b8c4a0 t i915_gem_gtt_prepare +ffffffff81b8c7a0 t __ww_mutex_lock +ffffffff81b8d000 T i915_gem_evict_something +ffffffff81b8d880 T i915_gem_evict_for_node +ffffffff81b8dc50 T i915_gem_evict_vm +ffffffff81b8f000 T i915_gem_gtt_prepare_pages +ffffffff81b8f030 T i915_gem_gtt_finish_pages +ffffffff81b8f090 T i915_gem_gtt_reserve +ffffffff81b8f140 T i915_gem_gtt_insert +ffffffff81b90000 T i915_gem_ww_ctx_init +ffffffff81b90060 T i915_gem_ww_unlock_single +ffffffff81b901a0 T i915_gem_ww_ctx_fini +ffffffff81b90210 t i915_gem_ww_ctx_unlock_all +ffffffff81b90370 T i915_gem_ww_ctx_backoff +ffffffff81b91000 T i915_getparam_ioctl +ffffffff81b92000 T intel_gpu_error_find_batch +ffffffff81b92070 T i915_error_printf +ffffffff81b92130 T intel_gpu_error_print_vma +ffffffff81b92160 T i915_gpu_coredump_copy_to_buffer +ffffffff81b921b0 T __i915_gpu_coredump_free +ffffffff81b92340 T intel_engine_coredump_alloc +ffffffff81b92ba0 T intel_engine_coredump_add_request +ffffffff81b92f10 T intel_engine_coredump_add_vma +ffffffff81b93030 T i915_gpu_coredump_alloc +ffffffff81b93290 T intel_gt_coredump_alloc +ffffffff81b93ad0 T i915_vma_capture_prepare +ffffffff81b93b80 T i915_vma_capture_finish +ffffffff81b93be0 T i915_gpu_coredump +ffffffff81b94360 T i915_error_state_store +ffffffff81b943c0 T i915_capture_error_state +ffffffff81b94480 T i915_first_error_state +ffffffff81b944f0 T i915_reset_error_state +ffffffff81b94590 T i915_disable_error_state +ffffffff81b95000 T i915_reg_read_ioctl +ffffffff81b96000 T gen3_irq_reset +ffffffff81b960d0 T gen2_irq_reset +ffffffff81b961a0 T gen3_irq_init +ffffffff81b962e0 T gen2_irq_init +ffffffff81b96420 T i915_hotplug_interrupt_update +ffffffff81b96500 T ilk_enable_display_irq +ffffffff81b96510 t ilk_update_display_irq +ffffffff81b96650 T ilk_disable_display_irq +ffffffff81b96750 T bdw_enable_pipe_irq +ffffffff81b96770 t bdw_update_pipe_irq +ffffffff81b968d0 T bdw_disable_pipe_irq +ffffffff81b969d0 T ibx_enable_display_interrupt +ffffffff81b969e0 t ibx_display_interrupt_update +ffffffff81b96b00 T ibx_disable_display_interrupt +ffffffff81b96bc0 T i915_pipestat_enable_mask +ffffffff81b96d60 T i915_enable_pipestat +ffffffff81b96ef0 T intel_irqs_enabled +ffffffff81b96f20 T i915_disable_pipestat +ffffffff81b970a0 T i915_get_vblank_counter +ffffffff81b97250 T g4x_get_vblank_counter +ffffffff81b972e0 T intel_crtc_get_vblank_timestamp +ffffffff81b97300 t i915_get_crtc_scanoutpos +ffffffff81b97750 T intel_get_crtc_scanline +ffffffff81b977c0 t __intel_get_crtc_scanline +ffffffff81b97a30 T gen8_de_pipe_underrun_mask +ffffffff81b97a70 T i8xx_enable_vblank +ffffffff81b97b90 T i915gm_enable_vblank +ffffffff81b97c10 T i965_enable_vblank +ffffffff81b97d30 T ilk_enable_vblank +ffffffff81b97de0 T bdw_enable_vblank +ffffffff81b97f90 T i8xx_disable_vblank +ffffffff81b98090 T i915gm_disable_vblank +ffffffff81b98100 T i965_disable_vblank +ffffffff81b98200 T ilk_disable_vblank +ffffffff81b98300 T bdw_disable_vblank +ffffffff81b98480 T gen8_irq_power_well_post_enable +ffffffff81b98600 T gen8_irq_power_well_pre_disable +ffffffff81b98790 T intel_synchronize_irq +ffffffff81b987b0 T valleyview_enable_display_irqs +ffffffff81b98820 t vlv_display_irq_reset +ffffffff81b989e0 t vlv_display_irq_postinstall +ffffffff81b98c30 T valleyview_disable_display_irqs +ffffffff81b98c80 T intel_hpd_irq_setup +ffffffff81b98cd0 T intel_irq_init +ffffffff81b98f80 t ivb_parity_work +ffffffff81b99320 T intel_irq_fini +ffffffff81b99360 T intel_irq_install +ffffffff81b99470 t intel_irq_reset +ffffffff81b99fd0 t intel_irq_postinstall +ffffffff81b9acd0 T intel_irq_uninstall +ffffffff81b9ad40 T intel_runtime_pm_disable_interrupts +ffffffff81b9ad70 T intel_runtime_pm_enable_interrupts +ffffffff81b9ada0 T intel_synchronize_hardirq +ffffffff81b9adc0 t i9xx_pipestat_irq_reset +ffffffff81b9af50 t kasprintf +ffffffff81b9b020 t i915_hpd_irq_setup +ffffffff81b9b130 t icp_hpd_irq_setup +ffffffff81b9b320 t dg1_hpd_irq_setup +ffffffff81b9b380 t gen11_hpd_irq_setup +ffffffff81b9b5d0 t bxt_hpd_irq_setup +ffffffff81b9b760 t bdw_update_port_irq +ffffffff81b9b8a0 t spt_hpd_irq_setup +ffffffff81b9bac0 t ilk_hpd_irq_setup +ffffffff81b9bd20 t gen11_display_irq_reset +ffffffff81b9c2a0 t ibx_irq_reset +ffffffff81b9c3e0 t cherryview_irq_handler +ffffffff81b9c6b0 t valleyview_irq_handler +ffffffff81b9ca20 t i965_irq_handler +ffffffff81b9cf90 t i915_irq_handler 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gen8_modify_context +ffffffff81baec40 t gen12_configure_oar_context +ffffffff81baf000 T i915_query_ioctl +ffffffff81baf110 t query_topology_info +ffffffff81baf160 t query_engine_info +ffffffff81baf3a0 t query_perf_config +ffffffff81baf6a0 t query_memregion_info +ffffffff81baf920 t query_hwconfig_blob +ffffffff81baf9a0 t query_geometry_subslices +ffffffff81bafa30 t fill_topology_info +ffffffff81bafbd0 t query_perf_config_data +ffffffff81bb1000 T i915_request_slab_cache +ffffffff81bb1030 t i915_fence_get_driver_name +ffffffff81bb1060 t i915_fence_get_timeline_name +ffffffff81bb10c0 t i915_fence_enable_signaling +ffffffff81bb10d0 t i915_fence_signaled +ffffffff81bb1120 t i915_fence_wait +ffffffff81bb1140 t i915_fence_release +ffffffff81bb1230 T i915_request_notify_execute_cb_imm +ffffffff81bb12a0 T i915_request_active_engine +ffffffff81bb1380 T i915_request_free_capture_list +ffffffff81bb13f0 T i915_request_retire +ffffffff81bb15b0 T i915_request_retire_upto +ffffffff81bb1620 T __i915_request_skip +ffffffff81bb16c0 T i915_request_set_error_once +ffffffff81bb1730 T i915_request_mark_eio +ffffffff81bb17c0 T __i915_request_submit +ffffffff81bb1a10 T i915_request_submit +ffffffff81bb1a60 T __i915_request_unsubmit +ffffffff81bb1ad0 T i915_request_unsubmit +ffffffff81bb1b50 T i915_request_cancel +ffffffff81bb1bd0 T __i915_request_create +ffffffff81bb1ef0 t request_alloc_slow +ffffffff81bb2040 T i915_request_create +ffffffff81bb2140 T i915_request_await_execution +ffffffff81bb2250 t __i915_request_await_execution +ffffffff81bb23e0 t i915_request_await_external +ffffffff81bb2520 T i915_request_await_dma_fence +ffffffff81bb28a0 T i915_request_await_deps +ffffffff81bb2910 T i915_request_await_object +ffffffff81bb29c0 T __i915_request_commit +ffffffff81bb2c20 T __i915_request_queue_bh +ffffffff81bb2c60 T __i915_request_queue +ffffffff81bb2cc0 T i915_request_add +ffffffff81bb2d70 T i915_request_wait_timeout +ffffffff81bb30b0 t request_wait_wake +ffffffff81bb30d0 T i915_request_wait +ffffffff81bb3130 T i915_request_show +ffffffff81bb3360 T i915_test_request_state +ffffffff81bb34d0 T i915_request_module_exit +ffffffff81bb3500 T i915_request_module_init +ffffffff81bb3590 t submit_notify +ffffffff81bb3670 t semaphore_notify +ffffffff81bb36c0 t __rq_watchdog_expired +ffffffff81bb3770 t __await_execution +ffffffff81bb38f0 t i915_request_await_start +ffffffff81bb3a20 t irq_execute_cb +ffffffff81bb4000 T i915_sg_trim +ffffffff81bb4100 T i915_refct_sgt_init +ffffffff81bb4140 T i915_rsgt_from_mm_node +ffffffff81bb43b0 T i915_rsgt_from_buddy_resource +ffffffff81bb4640 t i915_refct_sgt_release +ffffffff81bb5000 T i915_sched_lookup_priolist +ffffffff81bb5120 T __i915_priolist_free +ffffffff81bb5140 T i915_schedule +ffffffff81bb5620 T i915_sched_node_init +ffffffff81bb5680 T i915_sched_node_reinit +ffffffff81bb56c0 T __i915_sched_node_add_dependency +ffffffff81bb57d0 T i915_sched_node_add_dependency +ffffffff81bb5910 T i915_sched_node_fini +ffffffff81bb59f0 T i915_request_show_with_schedule +ffffffff81bb5ad0 T i915_sched_engine_create +ffffffff81bb5b80 t default_destroy +ffffffff81bb5bd0 t default_disabled +ffffffff81bb5c00 T i915_scheduler_module_exit +ffffffff81bb5c30 T i915_scheduler_module_init +ffffffff81bb6000 T i915_save_display +ffffffff81bb6360 T i915_restore_display +ffffffff81bb7000 T i915_sw_fence_complete +ffffffff81bb7040 t __i915_sw_fence_complete +ffffffff81bb71c0 T i915_sw_fence_await +ffffffff81bb7240 T __i915_sw_fence_init +ffffffff81bb72b0 T i915_sw_fence_reinit +ffffffff81bb72f0 T i915_sw_fence_commit +ffffffff81bb7330 T i915_sw_fence_await_sw_fence +ffffffff81bb7350 t __i915_sw_fence_await_sw_fence +ffffffff81bb75f0 T i915_sw_fence_await_sw_fence_gfp +ffffffff81bb7610 T i915_sw_fence_await_dma_fence +ffffffff81bb7840 t dma_i915_sw_fence_wake +ffffffff81bb78c0 t irq_i915_sw_fence_work +ffffffff81bb7900 t timer_i915_sw_fence_wake +ffffffff81bb79e0 t dma_i915_sw_fence_wake_timer +ffffffff81bb7a70 T __i915_sw_fence_await_dma_fence +ffffffff81bb7bc0 t __dma_i915_sw_fence_wake +ffffffff81bb7c20 T i915_sw_fence_await_reservation +ffffffff81bb7d00 t i915_sw_fence_wake +ffffffff81bb8000 T dma_fence_work_init +ffffffff81bb8080 t fence_notify +ffffffff81bb8170 t fence_work +ffffffff81bb81d0 T dma_fence_work_chain +ffffffff81bb8220 t get_driver_name +ffffffff81bb8250 t get_timeline_name +ffffffff81bb8290 t fence_release +ffffffff81bb9000 T i915_switcheroo_register +ffffffff81bb9030 T i915_switcheroo_unregister +ffffffff81bba000 T i915_syncmap_init +ffffffff81bba030 T i915_syncmap_is_later +ffffffff81bba130 T i915_syncmap_set +ffffffff81bba1e0 t __sync_set +ffffffff81bba4d0 T i915_syncmap_free +ffffffff81bba530 t __sync_free +ffffffff81bbb000 T i915_setup_sysfs +ffffffff81bbb030 T i915_teardown_sysfs +ffffffff81bbc000 T i915_ttm_buddy_man_init +ffffffff81bbc210 T i915_ttm_buddy_man_fini +ffffffff81bbc400 T i915_ttm_buddy_man_reserve +ffffffff81bbc4d0 T i915_ttm_buddy_man_visible_size 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i915_vma_pin_iomap +ffffffff81bc0bc0 T i915_vma_flush_writes +ffffffff81bc0c30 T i915_vma_unpin_iomap +ffffffff81bc0cc0 T i915_vma_unpin_and_release +ffffffff81bc0d30 T i915_vma_misplaced +ffffffff81bc0dd0 T __i915_vma_set_map_and_fenceable +ffffffff81bc0e50 T i915_gem_valid_gtt_space +ffffffff81bc0ee0 T vma_invalidate_tlb +ffffffff81bc0f20 T i915_vma_pin_ww +ffffffff81bc1940 T i915_ggtt_pin +ffffffff81bc1a20 t __i915_ggtt_pin +ffffffff81bc1b80 t i915_gem_object_lock +ffffffff81bc1d90 T i915_vma_close +ffffffff81bc1e60 T i915_vma_reopen +ffffffff81bc1ee0 T i915_vma_destroy_locked +ffffffff81bc1fd0 t release_references +ffffffff81bc2100 T i915_vma_destroy +ffffffff81bc2240 T i915_vma_parked +ffffffff81bc2520 T i915_vma_revoke_mmap +ffffffff81bc2620 T _i915_vma_move_to_active +ffffffff81bc2850 T __i915_vma_evict +ffffffff81bc2bc0 T __i915_vma_unbind +ffffffff81bc2c60 T i915_vma_unbind +ffffffff81bc2db0 T i915_vma_unbind_async +ffffffff81bc2fa0 T i915_vma_unbind_unlocked +ffffffff81bc30b0 T i915_vma_make_unshrinkable +ffffffff81bc30f0 T i915_vma_make_shrinkable +ffffffff81bc3110 T i915_vma_make_purgeable +ffffffff81bc3130 T i915_vma_module_exit +ffffffff81bc3150 T i915_vma_module_init +ffffffff81bc31b0 t __i915_vma_active +ffffffff81bc3200 t __i915_vma_retire +ffffffff81bc3250 t __vma_bind +ffffffff81bc32f0 t __vma_release +ffffffff81bc3370 t intel_rotate_pages +ffffffff81bc36b0 t intel_remap_pages +ffffffff81bc3a70 t intel_partial_pages +ffffffff81bc4000 T i915_vma_resource_alloc +ffffffff81bc4050 T i915_vma_resource_free +ffffffff81bc4090 T i915_vma_resource_unhold +ffffffff81bc40a0 t __i915_vma_resource_unhold +ffffffff81bc4190 T i915_vma_resource_hold +ffffffff81bc41e0 T i915_vma_resource_unbind +ffffffff81bc4310 T __i915_vma_resource_init +ffffffff81bc4370 t i915_vma_resource_fence_notify +ffffffff81bc4440 T i915_vma_resource_bind_dep_sync +ffffffff81bc45c0 T i915_vma_resource_bind_dep_sync_all +ffffffff81bc4660 T i915_vma_resource_bind_dep_await +ffffffff81bc4800 T i915_vma_resource_module_exit +ffffffff81bc4820 T i915_vma_resource_module_init +ffffffff81bc4880 t get_driver_name +ffffffff81bc48b0 t get_timeline_name +ffffffff81bc48e0 t unbind_fence_release +ffffffff81bc4920 t i915_vma_resource_unbind_work +ffffffff81bc5000 T intel_platform_name +ffffffff81bc50a0 T intel_device_info_print +ffffffff81bc5d30 T intel_device_info_subplatform_init +ffffffff81bc6090 T intel_device_info_runtime_init +ffffffff81bc6770 T intel_driver_caps_print +ffffffff81bc7000 T intel_dram_detect +ffffffff81bc7480 t skl_get_dram_info +ffffffff81bc7660 T intel_dram_edram_detect +ffffffff81bc76f0 t icl_pcode_read_mem_global_info +ffffffff81bc77d0 t skl_dram_get_channel_info +ffffffff81bc79a0 t skl_dram_get_dimm_info +ffffffff81bc8000 T intel_memory_region_lookup +ffffffff81bc80e0 T intel_memory_region_by_type +ffffffff81bc81a0 T intel_memory_region_reserve +ffffffff81bc81c0 T intel_memory_region_debug +ffffffff81bc8220 T intel_memory_region_create +ffffffff81bc8390 T intel_memory_region_set_name +ffffffff81bc8410 T intel_memory_region_avail +ffffffff81bc8490 T intel_memory_region_destroy +ffffffff81bc8500 T intel_memory_regions_hw_probe +ffffffff81bc8650 T intel_memory_regions_driver_release +ffffffff81bc9000 T intel_detect_pch +ffffffff81bc9310 t intel_pch_match +ffffffff81bc9360 t intel_pch_type +ffffffff81bca000 T snb_pcode_read +ffffffff81bca0d0 t __snb_pcode_rw +ffffffff81bca260 T snb_pcode_write_timeout +ffffffff81bca330 T skl_pcode_request +ffffffff81bca670 T intel_pcode_init +ffffffff81bca6d0 T snb_pcode_read_p +ffffffff81bca7e0 T snb_pcode_write_p +ffffffff81bcb000 T intel_set_memory_cxsr +ffffffff81bcb0a0 t _intel_set_memory_cxsr +ffffffff81bcb350 T intel_wm_plane_visible +ffffffff81bcb3b0 T ilk_wm_max_level +ffffffff81bcb420 T intel_print_wm_latency +ffffffff81bcb580 T ilk_disable_lp_wm +ffffffff81bcb660 T g4x_wm_get_hw_state +ffffffff81bcbe30 T g4x_wm_sanitize +ffffffff81bcbfd0 t g4x_program_watermarks +ffffffff81bcc370 T vlv_wm_get_hw_state +ffffffff81bcd040 t vlv_invalidate_wms +ffffffff81bcd1a0 T vlv_wm_sanitize +ffffffff81bcd2f0 t vlv_program_watermarks +ffffffff81bcda40 T ilk_wm_get_hw_state +ffffffff81bcdeb0 T intel_init_clock_gating +ffffffff81bcded0 T intel_suspend_hw +ffffffff81bcdf80 T intel_init_clock_gating_hooks +ffffffff81bce1d0 T intel_init_pm +ffffffff81bcecc0 T intel_pm_setup +ffffffff81bced00 t chv_set_memory_dvfs +ffffffff81bceec0 t pvc_init_clock_gating +ffffffff81bcf060 t dg2_init_clock_gating +ffffffff81bcf1b0 t xehpsdv_init_clock_gating +ffffffff81bcf2b0 t adlp_init_clock_gating +ffffffff81bcf3a0 t gen12lp_init_clock_gating +ffffffff81bcf510 t dg1_init_clock_gating +ffffffff81bcf600 t icl_init_clock_gating +ffffffff81bcf6c0 t cfl_init_clock_gating +ffffffff81bcf7e0 t gen9_init_clock_gating +ffffffff81bcf8f0 t skl_init_clock_gating +ffffffff81bcfa30 t kbl_init_clock_gating +ffffffff81bcfc40 t bxt_init_clock_gating +ffffffff81bcfda0 t glk_init_clock_gating +ffffffff81bcfe00 t bdw_init_clock_gating +ffffffff81bd0250 t chv_init_clock_gating +ffffffff81bd0400 t hsw_init_clock_gating +ffffffff81bd0550 t ivb_init_clock_gating +ffffffff81bd0760 t g4x_disable_trickle_feed +ffffffff81bd08c0 t cpt_init_clock_gating +ffffffff81bd0bf0 t vlv_init_clock_gating +ffffffff81bd0d00 t gen6_init_clock_gating +ffffffff81bd0f00 t ilk_init_clock_gating +ffffffff81bd10d0 t g4x_init_clock_gating +ffffffff81bd1190 t i965gm_init_clock_gating +ffffffff81bd1260 t i965g_init_clock_gating +ffffffff81bd12e0 t gen3_init_clock_gating +ffffffff81bd13e0 t i85x_init_clock_gating +ffffffff81bd1480 t i830_init_clock_gating +ffffffff81bd14b0 t nop_init_clock_gating +ffffffff81bd14e0 t ilk_compute_pipe_wm +ffffffff81bd1960 t ilk_compute_intermediate_wm +ffffffff81bd1c90 t ilk_initial_watermarks +ffffffff81bd1d00 t ilk_optimize_watermarks +ffffffff81bd1db0 t ilk_compute_wm_level +ffffffff81bd2320 t ilk_validate_wm_level +ffffffff81bd2460 t ilk_program_watermarks +ffffffff81bd3220 t ilk_wm_merge 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+ffffffff81bdd060 T intel_uncore_forcewake_domain_to_str +ffffffff81bdd0d0 T intel_uncore_fw_release_timer +ffffffff81bdd1f0 T intel_uncore_suspend +ffffffff81bdd240 t intel_uncore_forcewake_reset +ffffffff81bdd520 T intel_uncore_resume_early +ffffffff81bdd650 T intel_uncore_unclaimed_mmio +ffffffff81bdd6c0 T intel_uncore_runtime_resume +ffffffff81bdd6f0 T intel_uncore_forcewake_get +ffffffff81bdd860 T intel_uncore_forcewake_user_get +ffffffff81bdd980 T intel_uncore_forcewake_get__locked +ffffffff81bdda50 T intel_uncore_forcewake_user_put +ffffffff81bddb90 T intel_uncore_forcewake_put__locked +ffffffff81bddc90 T intel_uncore_forcewake_put +ffffffff81bdddb0 T intel_uncore_forcewake_put_delayed +ffffffff81bddf00 T intel_uncore_forcewake_flush +ffffffff81bddfb0 T assert_forcewakes_inactive +ffffffff81bde020 T assert_forcewakes_active +ffffffff81bde050 T intel_uncore_setup_mmio +ffffffff81bde080 t uncore_unmap_mmio +ffffffff81bde0b0 T intel_uncore_init_early +ffffffff81bde120 T intel_uncore_init_mmio +ffffffff81bdf390 T intel_uncore_prune_engine_fw_domains +ffffffff81bdf560 t fw_domain_fini +ffffffff81bdf660 T intel_uncore_fini_mmio +ffffffff81bdf700 T __intel_wait_for_register_fw +ffffffff81bdf9b0 T __intel_wait_for_register +ffffffff81bdfd30 T intel_uncore_forcewake_for_reg +ffffffff81bdfe40 t check_for_unclaimed_mmio +ffffffff81bdffa0 T intel_uncore_arm_unclaimed_mmio_detection +ffffffff81be00b0 t vgpu_write8 +ffffffff81be00f0 t vgpu_write16 +ffffffff81be0130 t vgpu_write32 +ffffffff81be0170 t vgpu_read8 +ffffffff81be01b0 t vgpu_read16 +ffffffff81be01f0 t vgpu_read32 +ffffffff81be0230 t vgpu_read64 +ffffffff81be0270 t gen5_write8 +ffffffff81be0370 t gen5_write16 +ffffffff81be0470 t gen5_write32 +ffffffff81be0570 t gen5_read8 +ffffffff81be0660 t gen5_read16 +ffffffff81be0750 t gen5_read32 +ffffffff81be0840 t gen5_read64 +ffffffff81be0930 t gen2_write8 +ffffffff81be0a10 t gen2_write16 +ffffffff81be0af0 t gen2_write32 +ffffffff81be0bd0 t gen2_read8 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__intel_wakeref_put_last +ffffffff81be4100 t ____intel_wakeref_put_last +ffffffff81be41e0 T __intel_wakeref_init +ffffffff81be4260 t __intel_wakeref_put_work +ffffffff81be42d0 T intel_wakeref_wait_for_idle +ffffffff81be4410 T intel_wakeref_auto_init +ffffffff81be4490 t wakeref_auto_timeout +ffffffff81be4540 T intel_wakeref_auto +ffffffff81be4740 T intel_wakeref_auto_fini +ffffffff81be4800 t __delayed_work_tick +ffffffff81be5000 T intel_wopcm_init_early +ffffffff81be5080 T intel_wopcm_init +ffffffff81be6000 T vlv_iosf_sb_get +ffffffff81be6020 T vlv_iosf_sb_put +ffffffff81be6040 T vlv_punit_read +ffffffff81be6090 t vlv_sideband_rw +ffffffff81be6240 T vlv_punit_write +ffffffff81be6290 T vlv_bunit_read +ffffffff81be62e0 T vlv_bunit_write +ffffffff81be6330 T vlv_nc_read +ffffffff81be6380 T vlv_iosf_sb_read +ffffffff81be63d0 T vlv_iosf_sb_write +ffffffff81be6420 T vlv_cck_read +ffffffff81be6470 T vlv_cck_write +ffffffff81be64c0 T vlv_ccu_read +ffffffff81be6510 T vlv_ccu_write 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T atombios_crtc_set_base +ffffffff81bee340 t dce4_crtc_do_set_base +ffffffff81beee30 t avivo_crtc_do_set_base +ffffffff81bef6a0 T atombios_crtc_set_base_atomic +ffffffff81bef6f0 T radeon_atom_disp_eng_pll_init +ffffffff81bef7d0 t atombios_crtc_set_disp_eng_pll +ffffffff81bef8e0 t atombios_crtc_program_ss +ffffffff81befb90 T atombios_crtc_mode_set +ffffffff81bf05c0 T radeon_atombios_init_crtc +ffffffff81bf06b0 t radeon_bo_reserve +ffffffff81bf0830 t radeon_bo_unreserve +ffffffff81bf0910 t atombios_crtc_program_pll +ffffffff81bf0bc0 t atombios_crtc_prepare +ffffffff81bf0c70 t atombios_crtc_commit +ffffffff81bf0ce0 t atombios_crtc_mode_fixup +ffffffff81bf1a60 t atombios_crtc_disable +ffffffff81bf1cc0 t radeon_get_shared_nondp_ppll +ffffffff81bf2000 T radeon_atom_copy_swap +ffffffff81bf2020 T radeon_dp_aux_init +ffffffff81bf2110 t radeon_dp_aux_transfer_atom +ffffffff81bf22e0 T radeon_dp_getsinktype +ffffffff81bf2350 T radeon_dp_getdpcd +ffffffff81bf24c0 T radeon_dp_get_panel_mode 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radeon_atom_ext_disable +ffffffff81bf9000 T radeon_atom_hw_i2c_xfer +ffffffff81bf9160 t radeon_process_i2c_ch +ffffffff81bf9330 T radeon_atom_hw_i2c_func +ffffffff81bfa000 T btc_get_max_clock_from_voltage_dependency_table +ffffffff81bfa0d0 T btc_apply_voltage_dependency_rules +ffffffff81bfa140 T btc_skip_blacklist_clocks +ffffffff81bfa240 T btc_adjust_clock_combinations +ffffffff81bfa350 T btc_apply_voltage_delta_rules +ffffffff81bfa480 T btc_program_mgcg_hw_sequence +ffffffff81bfa580 T btc_dpm_enabled +ffffffff81bfa590 T btc_notify_uvd_to_smc +ffffffff81bfa600 T btc_reset_to_default +ffffffff81bfa650 T btc_read_arb_registers +ffffffff81bfa6e0 T btc_dpm_vblank_too_short +ffffffff81bfa750 T btc_dpm_pre_set_power_state +ffffffff81bfb630 T btc_dpm_set_power_state +ffffffff81bfba40 T btc_dpm_post_set_power_state +ffffffff81bfbb60 T btc_dpm_enable +ffffffff81bfcd70 T btc_dpm_disable +ffffffff81bfd2a0 T btc_dpm_setup_asic +ffffffff81bfd380 T btc_dpm_init +ffffffff81bfd780 T btc_dpm_fini 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+ffffffff81c04390 T ci_dpm_disable +ffffffff81c04a90 T ci_dpm_set_power_state +ffffffff81c05c10 T ci_dpm_display_configuration_changed +ffffffff81c05db0 T ci_dpm_fini +ffffffff81c05e60 T ci_dpm_init +ffffffff81c07530 T ci_dpm_debugfs_print_current_performance_level +ffffffff81c07670 T ci_dpm_print_power_state +ffffffff81c07730 T ci_dpm_get_current_sclk +ffffffff81c07800 T ci_dpm_get_current_mclk +ffffffff81c078d0 T ci_dpm_get_sclk +ffffffff81c07920 T ci_dpm_get_mclk +ffffffff81c07970 t ci_populate_all_graphic_levels +ffffffff81c07ef0 t ci_populate_all_memory_levels +ffffffff81c08800 t ci_do_program_memory_timing_parameters +ffffffff81c08a20 t ci_populate_smc_voltage_table +ffffffff81c08b80 t ci_enable_sclk_mclk_dpm +ffffffff81c09000 T ci_copy_bytes_to_smc +ffffffff81c09250 T ci_start_smc +ffffffff81c09290 T ci_reset_smc +ffffffff81c092d0 T ci_program_jump_on_start +ffffffff81c09300 T ci_stop_smc_clock +ffffffff81c09340 T ci_start_smc_clock +ffffffff81c09380 T ci_is_smc_running +ffffffff81c093f0 T ci_load_smc_ucode +ffffffff81c09580 T ci_read_smc_sram_dword +ffffffff81c09650 T ci_write_smc_sram_dword +ffffffff81c0a000 T cik_get_allowed_info_register +ffffffff81c0a0a0 T cik_didt_rreg +ffffffff81c0a140 T cik_didt_wreg +ffffffff81c0a1c0 T ci_get_temp +ffffffff81c0a210 T kv_get_temp +ffffffff81c0a260 T cik_pciep_rreg +ffffffff81c0a2e0 T cik_pciep_wreg +ffffffff81c0a350 T cik_get_xclk +ffffffff81c0a3c0 T cik_mm_rdoorbell +ffffffff81c0a420 T cik_mm_wdoorbell +ffffffff81c0a470 T ci_mc_load_microcode +ffffffff81c0a7c0 T cik_ring_test +ffffffff81c0aa70 T cik_fence_gfx_ring_emit +ffffffff81c0ae70 T cik_fence_compute_ring_emit +ffffffff81c0b100 T cik_semaphore_ring_emit +ffffffff81c0b2d0 T cik_copy_cpdma +ffffffff81c0b6d0 T cik_ring_ib_execute +ffffffff81c0bcb0 T cik_ib_test +ffffffff81c0bf90 T cik_gfx_get_rptr +ffffffff81c0bff0 T cik_gfx_get_wptr +ffffffff81c0c030 T cik_gfx_set_wptr +ffffffff81c0c070 T cik_compute_get_rptr +ffffffff81c0c150 T cik_compute_get_wptr +ffffffff81c0c230 T cik_compute_set_wptr +ffffffff81c0c2b0 T cik_gpu_check_soft_reset +ffffffff81c0c420 T cik_asic_reset +ffffffff81c0c830 t cik_gpu_pci_config_reset +ffffffff81c0d050 T cik_gfx_is_lockup +ffffffff81c0d0c0 T cik_pcie_gart_tlb_flush +ffffffff81c0d110 T cik_ib_parse +ffffffff81c0d140 T cik_vm_init +ffffffff81c0d1a0 T cik_vm_fini +ffffffff81c0d1d0 T cik_vm_flush +ffffffff81c0df20 T cik_enter_rlc_safe_mode +ffffffff81c0e010 T cik_exit_rlc_safe_mode +ffffffff81c0e050 T cik_update_cg +ffffffff81c0e520 t cik_enable_mgcg +ffffffff81c0ea40 t cik_enable_cgcg +ffffffff81c0edb0 T cik_init_cp_pg_table +ffffffff81c0f070 T cik_get_csb_size +ffffffff81c0f100 T cik_get_csb_buffer +ffffffff81c0f2a0 T cik_irq_set +ffffffff81c10040 t cik_disable_interrupt_state +ffffffff81c10500 T cik_irq_process +ffffffff81c11cb0 t cik_irq_ack +ffffffff81c12630 T cik_resume +ffffffff81c126c0 t cik_init_golden_registers +ffffffff81c12880 t cik_startup +ffffffff81c185d0 T cik_suspend +ffffffff81c189c0 T cik_init +ffffffff81c191b0 t cik_init_microcode +ffffffff81c1a1c0 t cik_pcie_gart_fini +ffffffff81c1a2c0 T cik_fini +ffffffff81c1a660 T dce8_program_fmt +ffffffff81c1a790 T dce8_bandwidth_update +ffffffff81c1b3b0 T cik_get_gpu_clock_counter +ffffffff81c1b480 T cik_set_uvd_clocks +ffffffff81c1b500 t cik_set_uvd_clock +ffffffff81c1b670 T cik_set_vce_clocks +ffffffff81c1b8b0 t cik_wait_for_rlc_serdes +ffffffff81c1ba80 t radeon_bo_reserve +ffffffff81c1bc00 t radeon_bo_unreserve +ffffffff81c1bce0 t cik_update_gfx_pg +ffffffff81c1be80 t cik_compute_stop +ffffffff81c1bff0 t cik_cp_compute_fini +ffffffff81c1c190 t dce8_latency_watermark +ffffffff81c1d000 T cik_sdma_get_rptr +ffffffff81c1d070 T cik_sdma_get_wptr +ffffffff81c1d0c0 T cik_sdma_set_wptr +ffffffff81c1d110 T cik_sdma_ring_ib_execute +ffffffff81c1d4f0 T cik_sdma_fence_ring_emit +ffffffff81c1d6d0 t cik_sdma_hdp_flush_ring_emit +ffffffff81c1d910 T cik_sdma_semaphore_ring_emit +ffffffff81c1da30 T cik_sdma_enable +ffffffff81c1dc10 T cik_sdma_resume +ffffffff81c1e0f0 T cik_sdma_fini +ffffffff81c1e130 T cik_copy_dma +ffffffff81c1e500 T cik_sdma_ring_test +ffffffff81c1e7a0 T cik_sdma_ib_test +ffffffff81c1e9f0 T cik_sdma_is_lockup +ffffffff81c1ea70 T cik_sdma_vm_copy_pages +ffffffff81c1eb80 T cik_sdma_vm_write_pages +ffffffff81c1ecf0 T cik_sdma_vm_set_pages +ffffffff81c1ee60 T cik_sdma_vm_pad_ib +ffffffff81c1eeb0 T cik_dma_vm_flush +ffffffff81c20000 T cypress_enable_spread_spectrum +ffffffff81c20140 T cypress_start_dpm +ffffffff81c20190 T cypress_enable_sclk_control +ffffffff81c201f0 T cypress_enable_mclk_control +ffffffff81c20250 T cypress_notify_smc_display_change +ffffffff81c202a0 T cypress_program_response_times +ffffffff81c20370 T cypress_advertise_gen2_capability +ffffffff81c20440 T cypress_notify_link_speed_change_after_state_change +ffffffff81c20500 T cypress_notify_link_speed_change_before_state_change +ffffffff81c205c0 T cypress_get_strobe_mode_settings +ffffffff81c206c0 T cypress_get_mclk_frequency_ratio +ffffffff81c20770 T cypress_map_clkf_to_ibias +ffffffff81c20830 T cypress_convert_power_level_to_smc +ffffffff81c20bf0 t cypress_populate_mclk_value +ffffffff81c20fc0 T cypress_upload_sw_state +ffffffff81c21140 T cypress_upload_mc_reg_table +ffffffff81c21200 t cypress_convert_mc_reg_table_to_smc +ffffffff81c214a0 T cypress_calculate_burst_time +ffffffff81c21530 T cypress_program_memory_timing_parameters +ffffffff81c216e0 T cypress_populate_smc_initial_state +ffffffff81c21a80 T cypress_populate_smc_acpi_state +ffffffff81c21e10 T cypress_construct_voltage_tables +ffffffff81c21ec0 t cypress_trim_voltage_table_to_fit_state_table +ffffffff81c220b0 T cypress_populate_smc_voltage_tables +ffffffff81c22200 T cypress_get_mvdd_configuration +ffffffff81c222c0 T cypress_populate_mc_reg_table +ffffffff81c22520 T cypress_get_table_locations +ffffffff81c22600 T cypress_enable_display_gap +ffffffff81c22660 T cypress_dpm_setup_asic +ffffffff81c22750 T cypress_dpm_enable +ffffffff81c23230 t cypress_force_mc_use_s1 +ffffffff81c234b0 t cypress_gfx_clock_gating_enable +ffffffff81c237c0 t cypress_mg_clock_gating_enable +ffffffff81c23a40 T cypress_dpm_disable +ffffffff81c23c70 T cypress_dpm_set_power_state +ffffffff81c23f20 T cypress_dpm_display_configuration_changed +ffffffff81c24000 T cypress_dpm_init +ffffffff81c24270 T cypress_dpm_fini +ffffffff81c24300 T cypress_dpm_vblank_too_short +ffffffff81c24370 t cypress_wait_for_mc_sequencer +ffffffff81c25000 T dce3_2_afmt_hdmi_write_speaker_allocation +ffffffff81c25070 T dce3_2_afmt_dp_write_speaker_allocation +ffffffff81c250e0 T dce3_2_afmt_write_sad_regs +ffffffff81c25200 T dce3_2_audio_set_dto +ffffffff81c25340 T dce3_2_hdmi_update_acr +ffffffff81c256a0 T dce3_2_set_audio_packet +ffffffff81c25830 T dce3_2_set_mute +ffffffff81c26000 T dce6_endpoint_rreg +ffffffff81c260e0 T dce6_endpoint_wreg +ffffffff81c261d0 T dce6_audio_get_pin +ffffffff81c26340 T dce6_afmt_select_pin +ffffffff81c263d0 T dce6_afmt_write_latency_fields +ffffffff81c26490 T dce6_afmt_hdmi_write_speaker_allocation +ffffffff81c26560 T dce6_afmt_dp_write_speaker_allocation +ffffffff81c26630 T dce6_afmt_write_sad_regs +ffffffff81c26770 T dce6_audio_enable +ffffffff81c267c0 T dce6_hdmi_audio_set_dto +ffffffff81c26830 T dce6_dp_audio_set_dto +ffffffff81c27000 T eg_cg_rreg +ffffffff81c27080 t r100_mm_rreg +ffffffff81c270d0 T eg_cg_wreg +ffffffff81c27140 T eg_pif_phy0_rreg +ffffffff81c271c0 T eg_pif_phy0_wreg +ffffffff81c27220 T eg_pif_phy1_rreg +ffffffff81c272a0 T eg_pif_phy1_wreg +ffffffff81c27300 T evergreen_get_allowed_info_register +ffffffff81c27390 T evergreen_tiling_fields +ffffffff81c27430 T sumo_set_uvd_clocks +ffffffff81c27510 t sumo_set_uvd_clock +ffffffff81c276d0 T evergreen_set_uvd_clocks +ffffffff81c27c70 T evergreen_fix_pci_max_read_req_size +ffffffff81c27e20 T dce4_program_fmt +ffffffff81c27f40 T dce4_wait_for_vblank +ffffffff81c281c0 T evergreen_page_flip +ffffffff81c28350 T evergreen_page_flip_pending +ffffffff81c283c0 T evergreen_get_temp +ffffffff81c28490 T sumo_get_temp +ffffffff81c284e0 T sumo_pm_init_profile +ffffffff81c28620 T btc_pm_init_profile +ffffffff81c28730 T evergreen_pm_misc +ffffffff81c288d0 T evergreen_pm_prepare +ffffffff81c289d0 T evergreen_pm_finish +ffffffff81c28ad0 T evergreen_hpd_sense +ffffffff81c28b40 T evergreen_hpd_set_polarity +ffffffff81c28c80 T evergreen_hpd_init +ffffffff81c28d50 T evergreen_hpd_fini +ffffffff81c28df0 T evergreen_get_number_of_dram_channels +ffffffff81c28e40 T evergreen_bandwidth_update +ffffffff81c29000 t evergreen_line_buffer_adjust +ffffffff81c29200 t evergreen_program_watermarks +ffffffff81c29cb0 T evergreen_mc_wait_for_idle +ffffffff81c29d50 T evergreen_pcie_gart_tlb_flush +ffffffff81c29e30 T evergreen_mc_stop +ffffffff81c2a920 T evergreen_mc_resume +ffffffff81c2b030 T evergreen_mc_program +ffffffff81c2b440 T evergreen_ring_ib_execute +ffffffff81c2b8e0 T evergreen_mc_init +ffffffff81c2ba20 T evergreen_print_gpu_status_regs +ffffffff81c2ba50 T evergreen_is_display_hung +ffffffff81c2bc60 T evergreen_gpu_check_soft_reset +ffffffff81c2bdc0 T evergreen_gpu_pci_config_reset +ffffffff81c2bf40 T evergreen_asic_reset +ffffffff81c2c260 T evergreen_gfx_is_lockup +ffffffff81c2c2d0 T sumo_rlc_fini +ffffffff81c2c490 t radeon_bo_reserve +ffffffff81c2c610 t radeon_bo_unreserve +ffffffff81c2c6f0 T sumo_rlc_init +ffffffff81c2cee0 T evergreen_rlc_resume +ffffffff81c2d250 T evergreen_get_vblank_counter +ffffffff81c2d2c0 T evergreen_disable_interrupt_state +ffffffff81c2d590 T evergreen_irq_set +ffffffff81c2db50 T evergreen_irq_suspend +ffffffff81c2dba0 T evergreen_irq_process +ffffffff81c2e6a0 t evergreen_irq_ack +ffffffff81c2eda0 T evergreen_resume +ffffffff81c2ee80 t evergreen_init_golden_registers +ffffffff81c2f090 t evergreen_startup +ffffffff81c31720 T evergreen_suspend +ffffffff81c318c0 T evergreen_init +ffffffff81c31de0 T evergreen_fini +ffffffff81c31fd0 T evergreen_pcie_gen2_enable +ffffffff81c32200 T evergreen_program_aspm +ffffffff81c328a0 t evergreen_latency_watermark +ffffffff81c33000 T evergreen_cs_parse +ffffffff81c358c0 T evergreen_dma_cs_parse +ffffffff81c36b00 T evergreen_ib_parse +ffffffff81c36fb0 T evergreen_dma_ib_parse +ffffffff81c37170 t evergreen_cs_track_check +ffffffff81c38190 t evergreen_cs_handle_reg +ffffffff81c3a0d0 t evergreen_surface_value_conv_check +ffffffff81c3a3b0 t evergreen_surface_check +ffffffff81c3a850 t evergreen_cs_track_validate_htile +ffffffff81c3aaf0 t evergreen_vm_reg_valid +ffffffff81c3b000 T evergreen_dma_fence_ring_emit +ffffffff81c3b2c0 T evergreen_dma_ring_ib_execute +ffffffff81c3b600 T evergreen_copy_dma +ffffffff81c3b9b0 T evergreen_dma_is_lockup +ffffffff81c3c000 T dce4_audio_enable +ffffffff81c3c080 T evergreen_hdmi_update_acr +ffffffff81c3c2a0 T dce4_afmt_write_latency_fields +ffffffff81c3c310 T dce4_afmt_hdmi_write_speaker_allocation +ffffffff81c3c380 T dce4_afmt_dp_write_speaker_allocation +ffffffff81c3c3f0 T evergreen_hdmi_write_sad_regs +ffffffff81c3c510 T evergreen_set_avi_packet +ffffffff81c3c6b0 T dce4_hdmi_audio_set_dto +ffffffff81c3c790 T dce4_dp_audio_set_dto +ffffffff81c3c880 T dce4_set_vbi_packet +ffffffff81c3c8f0 T dce4_hdmi_set_color_depth +ffffffff81c3ca40 T dce4_set_audio_packet +ffffffff81c3cc50 T dce4_set_mute +ffffffff81c3cd60 T evergreen_hdmi_enable +ffffffff81c3d090 T evergreen_dp_enable +ffffffff81c3e000 T kv_dpm_enable_bapm +ffffffff81c3e070 T kv_dpm_enable +ffffffff81c3f5c0 t kv_enable_didt +ffffffff81c3f860 T kv_dpm_late_enable +ffffffff81c3fa50 T kv_dpm_powergate_uvd +ffffffff81c3fbc0 T kv_dpm_disable +ffffffff81c3ff30 T kv_dpm_force_performance_level +ffffffff81c400c0 t kv_force_dpm_lowest +ffffffff81c40190 T kv_dpm_pre_set_power_state +ffffffff81c40720 T kv_dpm_set_power_state +ffffffff81c40ed0 t kv_set_valid_clock_range +ffffffff81c41090 t kv_calculate_ds_divider +ffffffff81c41200 t kv_calculate_nbps_level_settings +ffffffff81c41390 t kv_update_vce_dpm +ffffffff81c41570 T kv_dpm_post_set_power_state +ffffffff81c41610 T kv_dpm_setup_asic +ffffffff81c41670 T kv_dpm_init +ffffffff81c41f10 T kv_dpm_debugfs_print_current_performance_level +ffffffff81c41f80 T kv_dpm_get_current_sclk +ffffffff81c41ff0 T kv_dpm_get_current_mclk +ffffffff81c42020 T kv_dpm_print_power_state +ffffffff81c420c0 T kv_dpm_fini +ffffffff81c42160 T kv_dpm_display_configuration_changed +ffffffff81c42190 T kv_dpm_get_sclk +ffffffff81c421e0 T kv_dpm_get_mclk +ffffffff81c43000 T kv_notify_message_to_smu +ffffffff81c430c0 T kv_dpm_get_enable_mask +ffffffff81c431a0 T kv_send_msg_to_smc_with_parameter +ffffffff81c43270 T kv_read_smc_sram_dword +ffffffff81c43300 T kv_smc_dpm_enable +ffffffff81c43430 T kv_smc_bapm_enable +ffffffff81c43560 T kv_copy_bytes_to_smc +ffffffff81c44000 T tn_smc_rreg +ffffffff81c44080 T tn_smc_wreg +ffffffff81c440f0 T ni_mc_load_microcode +ffffffff81c442e0 T ni_init_microcode +ffffffff81c44820 T cayman_get_allowed_info_register +ffffffff81c448b0 T tn_get_temp +ffffffff81c44940 T cayman_pcie_gart_tlb_flush +ffffffff81c44990 T cayman_cp_int_cntl_setup +ffffffff81c449e0 T cayman_fence_ring_emit +ffffffff81c44d90 T cayman_ring_ib_execute +ffffffff81c45210 T cayman_gfx_get_rptr +ffffffff81c452a0 T cayman_gfx_get_wptr +ffffffff81c45310 T cayman_gfx_set_wptr +ffffffff81c45390 T cayman_gpu_check_soft_reset +ffffffff81c45510 T cayman_asic_reset +ffffffff81c45810 T cayman_gfx_is_lockup +ffffffff81c45880 T cayman_resume +ffffffff81c45910 t ni_init_golden_registers +ffffffff81c459f0 t cayman_startup +ffffffff81c48120 T cayman_suspend +ffffffff81c48310 T cayman_init +ffffffff81c48910 T cayman_fini +ffffffff81c48b90 T cayman_vm_init +ffffffff81c48bf0 T cayman_vm_fini +ffffffff81c48c20 T cayman_vm_decode_fault +ffffffff81c48cb0 T cayman_vm_flush +ffffffff81c49130 T tn_set_vce_clocks +ffffffff81c4a000 T cayman_dma_get_rptr +ffffffff81c4a070 T cayman_dma_get_wptr +ffffffff81c4a0c0 T cayman_dma_set_wptr +ffffffff81c4a110 T cayman_dma_ring_ib_execute +ffffffff81c4a4a0 T cayman_dma_stop +ffffffff81c4a550 T cayman_dma_resume +ffffffff81c4a7a0 T cayman_dma_fini +ffffffff81c4a860 T cayman_dma_is_lockup +ffffffff81c4a8e0 T cayman_dma_vm_copy_pages +ffffffff81c4a9d0 T cayman_dma_vm_write_pages +ffffffff81c4ab30 T cayman_dma_vm_set_pages +ffffffff81c4ac90 T cayman_dma_vm_pad_ib +ffffffff81c4ace0 T cayman_dma_vm_flush +ffffffff81c4c000 T ni_get_pi +ffffffff81c4c030 T ni_get_ps +ffffffff81c4c060 T ni_dpm_vblank_too_short +ffffffff81c4c0d0 T ni_dpm_force_performance_level +ffffffff81c4c220 T ni_copy_and_switch_arb_sets +ffffffff81c4c500 T ni_set_uvd_clock_before_set_eng_clock +ffffffff81c4c580 T ni_set_uvd_clock_after_set_eng_clock +ffffffff81c4c600 T ni_dpm_setup_asic +ffffffff81c4c810 T ni_update_current_ps +ffffffff81c4c8d0 T ni_update_requested_ps +ffffffff81c4c990 T ni_dpm_enable +ffffffff81c4fbd0 t ni_populate_smc_tdp_limits +ffffffff81c4fd90 T ni_dpm_disable +ffffffff81c50150 T ni_dpm_pre_set_power_state +ffffffff81c50730 T ni_dpm_set_power_state +ffffffff81c51850 T ni_dpm_post_set_power_state +ffffffff81c51920 T ni_dpm_init +ffffffff81c522f0 T ni_dpm_fini +ffffffff81c523a0 T ni_dpm_print_power_state +ffffffff81c52470 T ni_dpm_debugfs_print_current_performance_level +ffffffff81c524b0 T ni_dpm_get_current_sclk +ffffffff81c52520 T ni_dpm_get_current_mclk +ffffffff81c52590 T ni_dpm_get_sclk +ffffffff81c525f0 T ni_dpm_get_mclk +ffffffff81c52650 t ni_do_program_memory_timing_parameters +ffffffff81c52780 t ni_calculate_sclk_params +ffffffff81c529a0 t ni_calculate_power_boost_limit +ffffffff81c52b50 t ni_populate_mclk_value +ffffffff81c53000 T r100_wait_for_vblank +ffffffff81c531a0 T r100_page_flip +ffffffff81c53450 T r100_page_flip_pending +ffffffff81c53500 T r100_pm_get_dynpm_state +ffffffff81c53720 T r100_pm_init_profile +ffffffff81c53800 T r100_pm_misc +ffffffff81c53c40 T r100_pm_prepare +ffffffff81c53d00 T r100_pm_finish +ffffffff81c53dc0 T r100_gui_idle +ffffffff81c53e00 T r100_hpd_sense +ffffffff81c53e60 T r100_hpd_set_polarity +ffffffff81c53f20 T r100_hpd_init +ffffffff81c53fc0 T r100_hpd_fini +ffffffff81c54020 T r100_pci_gart_tlb_flush +ffffffff81c54050 T r100_pci_gart_init +ffffffff81c54120 T r100_pci_gart_get_page_entry +ffffffff81c54150 T r100_pci_gart_set_page +ffffffff81c54190 T r100_pci_gart_enable +ffffffff81c54280 T r100_pci_gart_disable +ffffffff81c54300 T r100_pci_gart_fini +ffffffff81c54380 T r100_irq_set +ffffffff81c54460 T r100_irq_disable +ffffffff81c544d0 T r100_irq_process +ffffffff81c547d0 T r100_get_vblank_counter +ffffffff81c54820 T r100_fence_ring_emit +ffffffff81c54c90 T r100_semaphore_ring_emit +ffffffff81c54cc0 T r100_copy_blit +ffffffff81c55360 T r100_ring_start +ffffffff81c55450 T r100_gfx_get_rptr +ffffffff81c554b0 T r100_gfx_get_wptr +ffffffff81c554f0 T r100_gfx_set_wptr +ffffffff81c55530 T r100_cp_init +ffffffff81c55a60 T r100_debugfs_cp_init +ffffffff81c55a90 T r100_cp_fini +ffffffff81c55b30 T r100_cp_disable +ffffffff81c55c70 T r100_gui_wait_for_idle +ffffffff81c55d60 T r100_reloc_pitch_offset +ffffffff81c55e90 T r100_packet3_load_vbpntr +ffffffff81c56130 T r100_cs_parse_packet0 +ffffffff81c56240 T r100_cs_packet_parse_vline +ffffffff81c56430 T r100_cs_track_check_pkt3_indx_buffer +ffffffff81c564b0 T r100_cs_parse +ffffffff81c57970 T r100_cs_track_clear +ffffffff81c57d00 T r100_cs_track_check +ffffffff81c586f0 T r100_mc_wait_for_idle +ffffffff81c58790 T r100_gpu_is_lockup +ffffffff81c587f0 T r100_enable_bm +ffffffff81c58840 T r100_bm_disable +ffffffff81c588f0 T r100_asic_reset +ffffffff81c58c20 T r100_mc_stop +ffffffff81c58de0 T r100_mc_resume +ffffffff81c58ea0 T r100_set_common_regs +ffffffff81c59050 T r100_vram_init_sizes +ffffffff81c59240 T r100_vga_set_state +ffffffff81c592a0 T r100_pll_errata_after_index +ffffffff81c592e0 T r100_pll_rreg +ffffffff81c59410 T r100_pll_wreg +ffffffff81c59520 T r100_debugfs_rbbm_init +ffffffff81c59550 T r100_debugfs_mc_info_init +ffffffff81c59580 T r100_set_surface_reg +ffffffff81c59790 T r100_clear_surface_reg +ffffffff81c59840 T r100_bandwidth_update +ffffffff81c5a2f0 T r100_ring_test +ffffffff81c5a5b0 T r100_ring_ib_execute +ffffffff81c5a810 T r100_ib_test +ffffffff81c5ab50 T r100_vga_render_disable +ffffffff81c5abb0 T r100_resume +ffffffff81c5adb0 t r100_startup +ffffffff81c5b2e0 T r100_suspend +ffffffff81c5b3c0 T r100_fini +ffffffff81c5b4d0 T r100_restore_sanity +ffffffff81c5b570 T r100_init +ffffffff81c5baf0 T r100_mm_rreg_slow +ffffffff81c5bb70 T r100_mm_wreg_slow +ffffffff81c5bbd0 T r100_io_rreg +ffffffff81c5bc70 T r100_io_wreg +ffffffff81c5bce0 t r100_cs_track_texture_print +ffffffff81c5c000 T r200_copy_dma +ffffffff81c5c470 T r200_packet0_check +ffffffff81c5d490 T r200_set_safe_registers +ffffffff81c5e000 T rv370_pcie_rreg +ffffffff81c5e080 T rv370_pcie_wreg +ffffffff81c5e0f0 T rv370_pcie_gart_tlb_flush +ffffffff81c5e2f0 T rv370_pcie_gart_get_page_entry +ffffffff81c5e350 T rv370_pcie_gart_set_page +ffffffff81c5e390 T rv370_pcie_gart_init +ffffffff81c5e460 T rv370_pcie_gart_enable +ffffffff81c5e7c0 T rv370_pcie_gart_disable +ffffffff81c5e940 T rv370_pcie_gart_fini +ffffffff81c5e970 T r300_fence_ring_emit +ffffffff81c5ef00 T r300_ring_start +ffffffff81c5f910 T r300_mc_wait_for_idle +ffffffff81c5f9b0 T r300_asic_reset +ffffffff81c5fbd0 T r300_mc_init +ffffffff81c5fc80 T rv370_set_pcie_lanes +ffffffff81c5fe40 T rv370_get_pcie_lanes +ffffffff81c5fef0 T r300_cs_parse +ffffffff81c60260 t r300_packet0_check +ffffffff81c610c0 T r300_set_reg_safe +ffffffff81c61100 T r300_mc_program +ffffffff81c61280 T r300_clock_startup +ffffffff81c61310 T r300_resume +ffffffff81c614e0 t r300_startup +ffffffff81c61840 T r300_suspend +ffffffff81c618c0 T r300_fini +ffffffff81c619a0 T r300_init +ffffffff81c62000 T r420_pm_init_profile +ffffffff81c620f0 T r420_pipes_init +ffffffff81c622d0 T r420_mc_rreg +ffffffff81c62350 T r420_mc_wreg +ffffffff81c623c0 T r420_resume +ffffffff81c625a0 t r420_startup +ffffffff81c62940 T r420_suspend +ffffffff81c62ae0 T r420_fini +ffffffff81c62bc0 T r420_init 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+ffffffff81c65c00 T rs780_mc_rreg +ffffffff81c65ca0 T rs780_mc_wreg +ffffffff81c65d30 T r600_vram_scratch_init +ffffffff81c65e30 t radeon_bo_reserve +ffffffff81c65fb0 t radeon_bo_unreserve +ffffffff81c66090 T r600_vram_scratch_fini +ffffffff81c66110 T r600_set_bios_scratch_engine_hung +ffffffff81c66160 T r600_gpu_check_soft_reset +ffffffff81c664e0 T r600_asic_reset +ffffffff81c66870 t r600_gpu_pci_config_reset +ffffffff81c66a90 T r600_gfx_is_lockup +ffffffff81c66b00 T r6xx_remap_render_backend +ffffffff81c66cf0 T r600_count_pipe_bits +ffffffff81c66d60 T r600_pciep_rreg +ffffffff81c66de0 T r600_pciep_wreg +ffffffff81c66e50 T r600_cp_stop +ffffffff81c66ed0 T r600_init_microcode +ffffffff81c673a0 T r600_gfx_get_rptr +ffffffff81c67400 T r600_gfx_get_wptr +ffffffff81c67440 T r600_gfx_set_wptr +ffffffff81c67480 T r600_cp_start +ffffffff81c67800 T r600_cp_resume +ffffffff81c67b60 T r600_ring_init +ffffffff81c67c00 T r600_cp_fini +ffffffff81c67c90 T r600_scratch_init +ffffffff81c67d00 T r600_ring_test +ffffffff81c67fb0 T r600_fence_ring_emit +ffffffff81c68870 T r600_semaphore_ring_emit +ffffffff81c68a60 T r600_copy_cpdma +ffffffff81c69020 T r600_set_surface_reg +ffffffff81c69050 T r600_clear_surface_reg +ffffffff81c69080 T r600_vga_set_state +ffffffff81c690e0 T r600_resume +ffffffff81c69170 t r600_startup +ffffffff81c6b180 T r600_suspend +ffffffff81c6b2f0 T r600_irq_suspend +ffffffff81c6b3b0 t r600_pcie_gart_disable +ffffffff81c6b5b0 T r600_init +ffffffff81c6bda0 T r600_ih_ring_init +ffffffff81c6be10 T r600_irq_fini +ffffffff81c6bf50 T r600_fini +ffffffff81c6c0e0 T r600_ring_ib_execute +ffffffff81c6c560 T r600_ib_test +ffffffff81c6c810 T r600_ih_ring_alloc +ffffffff81c6c930 T r600_ih_ring_fini +ffffffff81c6c9c0 T r600_rlc_stop +ffffffff81c6cb50 T r600_disable_interrupts +ffffffff81c6cc00 T r600_irq_init +ffffffff81c6d070 t r600_disable_interrupt_state +ffffffff81c6d360 T r600_irq_disable +ffffffff81c6d420 T r600_irq_set +ffffffff81c6dba0 t r600_irq_ack +ffffffff81c6e090 T r600_irq_process +ffffffff81c6ec90 T r600_mmio_hdp_flush +ffffffff81c6ed10 T r600_set_pcie_lanes +ffffffff81c6ee40 T r600_get_pcie_lanes +ffffffff81c6ef20 T r600_get_gpu_clock_counter +ffffffff81c6f000 T r600_fmt_is_valid_color +ffffffff81c6f040 T r600_fmt_is_valid_texture +ffffffff81c6f090 T r600_fmt_get_blocksize +ffffffff81c6f0d0 T r600_fmt_get_nblocksx +ffffffff81c6f130 T r600_fmt_get_nblocksy +ffffffff81c6f190 T r600_cs_common_vline_parse +ffffffff81c6f460 T r600_mip_minify +ffffffff81c6f4c0 T r600_cs_parse +ffffffff81c71450 T r600_dma_cs_next_reloc +ffffffff81c714d0 T r600_dma_cs_parse +ffffffff81c71c00 t r600_cs_track_check +ffffffff81c72d40 t r600_cs_check_reg +ffffffff81c74000 T r600_dma_get_rptr +ffffffff81c74060 T r600_dma_get_wptr +ffffffff81c740a0 T r600_dma_set_wptr +ffffffff81c740e0 T r600_dma_stop +ffffffff81c74170 T r600_dma_resume +ffffffff81c74380 T r600_dma_fini +ffffffff81c74400 T r600_dma_is_lockup +ffffffff81c74470 T r600_dma_ring_test +ffffffff81c746d0 T r600_dma_fence_ring_emit +ffffffff81c748c0 T r600_dma_semaphore_ring_emit +ffffffff81c749e0 T r600_dma_ib_test +ffffffff81c74bf0 T r600_dma_ring_ib_execute +ffffffff81c74f30 T r600_copy_dma +ffffffff81c76000 T r600_dpm_print_class_info +ffffffff81c762b0 T r600_dpm_print_cap_info +ffffffff81c76340 T r600_dpm_print_ps_status +ffffffff81c763d0 T r600_dpm_get_vblank_time +ffffffff81c76490 T r600_dpm_get_vrefresh +ffffffff81c76520 T r600_calculate_u_and_p +ffffffff81c765a0 T r600_calculate_at +ffffffff81c76650 T r600_gfx_clockgating_enable +ffffffff81c76760 T r600_dynamicpm_enable +ffffffff81c767c0 T r600_enable_thermal_protection +ffffffff81c76820 T r600_enable_acpi_pm +ffffffff81c76870 T r600_enable_dynamic_pcie_gen2 +ffffffff81c768d0 T r600_dynamicpm_enabled +ffffffff81c76910 T r600_enable_sclk_control +ffffffff81c76970 T r600_enable_mclk_control +ffffffff81c769d0 T r600_enable_spll_bypass +ffffffff81c76a30 T r600_wait_for_spll_change +ffffffff81c76ab0 T r600_set_bsp +ffffffff81c76af0 T r600_set_at +ffffffff81c76b50 T r600_set_tc +ffffffff81c76bb0 T r600_select_td +ffffffff81c76c70 T r600_set_vrc +ffffffff81c76cb0 T r600_set_tpu +ffffffff81c76d10 T r600_set_tpc +ffffffff81c76d70 T r600_set_sstu +ffffffff81c76dd0 T r600_set_sst +ffffffff81c76e20 T r600_set_git +ffffffff81c76e70 T r600_set_fctu +ffffffff81c76ed0 T r600_set_fct +ffffffff81c76f20 T r600_set_ctxcgtt3d_rphc +ffffffff81c76f80 T r600_set_ctxcgtt3d_rsdc +ffffffff81c76fe0 T r600_set_vddc3d_oorsu +ffffffff81c77040 T r600_set_vddc3d_oorphc +ffffffff81c770a0 T r600_set_vddc3d_oorsdc +ffffffff81c77100 T r600_set_mpll_lock_time +ffffffff81c77150 T r600_set_mpll_reset_time +ffffffff81c771a0 T r600_engine_clock_entry_enable +ffffffff81c772a0 T r600_engine_clock_entry_enable_pulse_skipping +ffffffff81c773a0 T r600_engine_clock_entry_enable_post_divider +ffffffff81c774a0 T r600_engine_clock_entry_set_post_divider +ffffffff81c77560 T r600_engine_clock_entry_set_reference_divider +ffffffff81c77620 T r600_engine_clock_entry_set_feedback_divider +ffffffff81c776e0 T r600_engine_clock_entry_set_step_time +ffffffff81c777a0 T r600_vid_rt_set_ssu +ffffffff81c77800 T r600_vid_rt_set_vru +ffffffff81c77860 T r600_vid_rt_set_vrt +ffffffff81c778c0 T r600_voltage_control_enable_pins +ffffffff81c77910 T r600_voltage_control_program_voltages +ffffffff81c779a0 T r600_voltage_control_deactivate_static_control +ffffffff81c77a30 T r600_power_level_enable +ffffffff81c77aa0 T r600_power_level_set_voltage_index +ffffffff81c77b10 T r600_power_level_set_mem_clock_index +ffffffff81c77b70 T r600_power_level_set_eng_clock_index +ffffffff81c77be0 T r600_power_level_set_watermark_id +ffffffff81c77c50 T r600_power_level_set_pcie_gen2 +ffffffff81c77cb0 T r600_power_level_get_current_index +ffffffff81c77cf0 T r600_power_level_get_target_index +ffffffff81c77d30 T r600_power_level_set_enter_index +ffffffff81c77d90 T r600_wait_for_power_level_unequal +ffffffff81c77e80 T r600_wait_for_power_level +ffffffff81c77f70 T r600_start_dpm +ffffffff81c78250 T r600_stop_dpm +ffffffff81c782a0 T r600_dpm_pre_set_power_state +ffffffff81c782d0 T r600_dpm_post_set_power_state +ffffffff81c78300 T r600_is_uvd_state +ffffffff81c78340 T r600_is_internal_thermal_sensor +ffffffff81c78380 T r600_dpm_late_enable +ffffffff81c78490 T r600_get_platform_caps +ffffffff81c78530 T r600_parse_extended_power_table +ffffffff81c794a0 T r600_free_extended_power_table +ffffffff81c795a0 T r600_get_pcie_gen_support +ffffffff81c795f0 T r600_get_pcie_lane_support +ffffffff81c79650 T r600_encode_pci_lane_width +ffffffff81c7a000 T r600_audio_update_hdmi +ffffffff81c7a180 t r600_audio_status +ffffffff81c7a2a0 T r600_hdmi_buffer_status_changed +ffffffff81c7a340 T r600_hdmi_update_audio_settings +ffffffff81c7a710 T r600_audio_enable +ffffffff81c7a790 T r600_audio_get_pin +ffffffff81c7a7c0 T r600_hdmi_update_acr +ffffffff81c7ab60 T r600_set_avi_packet +ffffffff81c7ad60 T r600_hdmi_audio_workaround +ffffffff81c7ae30 T r600_hdmi_audio_set_dto +ffffffff81c7aef0 T r600_set_vbi_packet +ffffffff81c7afb0 T r600_set_audio_packet +ffffffff81c7b280 T r600_set_mute +ffffffff81c7b390 T r600_hdmi_enable +ffffffff81c7c000 T radeon_acpi_is_pcie_performance_request_supported +ffffffff81c7c050 T radeon_acpi_pcie_notify_device_ready +ffffffff81c7c180 T radeon_acpi_pcie_performance_request +ffffffff81c7c3a0 T radeon_acpi_init +ffffffff81c7caf0 t radeon_acpi_event +ffffffff81c7ce40 T radeon_acpi_fini +ffffffff81c7d000 T radeon_agp_head_init +ffffffff81c7d050 T radeon_agp_init +ffffffff81c7d0a0 T radeon_agp_resume +ffffffff81c7d140 T radeon_agp_fini +ffffffff81c7d190 T radeon_agp_suspend +ffffffff81c7e000 T radeon_agp_disable +ffffffff81c7e120 T radeon_asic_init +ffffffff81c7e9b0 t radeon_invalid_rreg +ffffffff81c7e9f0 t radeon_invalid_wreg +ffffffff81c7ea30 t radeon_invalid_get_allowed_info_register +ffffffff81c7f000 T radeon_atombios_i2c_init +ffffffff81c7f3b0 T radeon_atombios_lookup_gpio +ffffffff81c7f4b0 T radeon_get_atom_connector_info_from_object_table +ffffffff81c7fe10 t radeon_lookup_i2c_gpio +ffffffff81c80110 t radeon_atom_apply_quirks +ffffffff81c80540 T radeon_get_atom_connector_info_from_supported_devices_table +ffffffff81c80a40 T radeon_atom_get_clock_info +ffffffff81c80dc0 T radeon_atombios_sideport_present +ffffffff81c80e70 T radeon_atombios_get_tmds_info +ffffffff81c80fb0 T radeon_atombios_get_ppll_ss_info +ffffffff81c810d0 T radeon_atombios_get_asic_ss_info +ffffffff81c81440 T radeon_atombios_get_lvds_info +ffffffff81c817b0 T radeon_atombios_get_primary_dac_info +ffffffff81c81860 T radeon_atom_get_tv_timings +ffffffff81c81ab0 T radeon_atombios_get_tv_info +ffffffff81c81b60 T radeon_atombios_get_tv_dac_info +ffffffff81c81c60 T radeon_atombios_get_default_voltages +ffffffff81c81d20 T radeon_atombios_get_power_modes +ffffffff81c82df0 T radeon_atom_get_clock_dividers +ffffffff81c830f0 T radeon_atom_get_memory_pll_dividers +ffffffff81c83230 T radeon_atom_set_clock_gating +ffffffff81c83280 T radeon_atom_get_engine_clock +ffffffff81c832d0 T radeon_atom_get_memory_clock +ffffffff81c83320 T radeon_atom_set_engine_clock +ffffffff81c83370 T radeon_atom_set_memory_clock +ffffffff81c833d0 T radeon_atom_set_engine_dram_timings +ffffffff81c83440 T radeon_atom_update_memory_dll +ffffffff81c83490 T radeon_atom_set_ac_timing +ffffffff81c834e0 T radeon_atom_set_voltage +ffffffff81c835b0 T radeon_atom_get_max_vddc +ffffffff81c83690 T radeon_atom_get_leakage_vddc_based_on_leakage_idx +ffffffff81c83760 T radeon_atom_get_leakage_id_from_vbios +ffffffff81c83820 T radeon_atom_get_leakage_vddc_based_on_leakage_params +ffffffff81c83a30 T radeon_atom_get_voltage_evv +ffffffff81c83ae0 T radeon_atom_get_voltage_gpio_settings +ffffffff81c83be0 T radeon_atom_is_voltage_gpio +ffffffff81c83d70 T radeon_atom_get_svi2_info +ffffffff81c83e60 T radeon_atom_get_max_voltage +ffffffff81c84000 T radeon_atom_get_min_voltage +ffffffff81c84140 T radeon_atom_get_voltage_step +ffffffff81c84240 T radeon_atom_round_to_true_voltage +ffffffff81c843b0 T radeon_atom_get_voltage_table +ffffffff81c84620 T radeon_atom_get_memory_info +ffffffff81c847d0 T radeon_atom_get_mclk_range_table +ffffffff81c84a20 T radeon_atom_init_mc_reg_table +ffffffff81c84ca0 T radeon_atom_initialize_bios_scratch_regs +ffffffff81c84d70 T radeon_save_bios_scratch_regs +ffffffff81c84e50 T radeon_restore_bios_scratch_regs +ffffffff81c84f30 T radeon_atom_output_lock +ffffffff81c84fc0 T radeon_atombios_connected_scratch_regs +ffffffff81c85740 T radeon_atombios_encoder_crtc_scratch_regs +ffffffff81c85880 T radeon_atombios_encoder_dpms_scratch_regs +ffffffff81c85aa0 t radeon_atombios_parse_misc_flags_1_3 +ffffffff81c85c90 t radeon_atombios_add_pplib_thermal_controller +ffffffff81c86090 t radeon_atombios_parse_pplib_clock_info +ffffffff81c863a0 t radeon_atombios_parse_pplib_non_clock_info +ffffffff81c87000 T radeon_audio_init +ffffffff81c87290 T radeon_audio_endpoint_rreg +ffffffff81c872d0 T radeon_audio_endpoint_wreg +ffffffff81c87310 T radeon_audio_get_pin +ffffffff81c87360 T radeon_audio_detect +ffffffff81c87690 T radeon_audio_fini +ffffffff81c877d0 T radeon_audio_mode_set +ffffffff81c87820 T radeon_audio_dpms +ffffffff81c87870 T radeon_audio_decode_dfs_div +ffffffff81c878d0 t radeon_audio_hdmi_mode_set +ffffffff81c88000 t radeon_audio_write_speaker_allocation +ffffffff81c880b0 t radeon_audio_write_sad_regs +ffffffff81c88180 t radeon_audio_set_avi_packet +ffffffff81c882c0 t radeon_audio_dp_mode_set +ffffffff81c88440 t radeon_audio_rreg +ffffffff81c88490 t radeon_audio_wreg +ffffffff81c89000 T radeon_benchmark +ffffffff81c89940 t radeon_benchmark_move +ffffffff81c89e00 t radeon_bo_reserve +ffffffff81c89f80 t radeon_bo_unreserve +ffffffff81c8b000 T radeon_get_bios +ffffffff81c8c000 t igp_read_bios_from_vram +ffffffff81c8c110 t radeon_read_bios +ffffffff81c8d000 T radeon_legacy_get_engine_clock +ffffffff81c8d0d0 T radeon_legacy_get_memory_clock +ffffffff81c8d1a0 T radeon_get_clock_info +ffffffff81c8d730 T radeon_legacy_set_engine_clock +ffffffff81c8da80 T radeon_legacy_set_clock_gating +ffffffff81c8f000 T radeon_combios_check_hardcoded_edid +ffffffff81c8f100 T radeon_bios_get_hardcoded_edid +ffffffff81c8f180 T radeon_combios_i2c_init +ffffffff81c8f940 t combios_setup_i2c_bus +ffffffff81c8fc40 T radeon_combios_get_clock_info +ffffffff81c8fe30 T radeon_combios_sideport_present +ffffffff81c8feb0 T radeon_combios_get_primary_dac_info +ffffffff81c8fff0 T radeon_combios_get_tv_info +ffffffff81c900f0 T radeon_combios_get_tv_dac_info +ffffffff81c903a0 T radeon_combios_get_lvds_info +ffffffff81c909f0 T radeon_legacy_get_tmds_info_from_table +ffffffff81c90ac0 T radeon_legacy_get_tmds_info_from_combios +ffffffff81c90cd0 T radeon_legacy_get_ext_tmds_info_from_table +ffffffff81c90f10 T radeon_legacy_get_ext_tmds_info_from_combios +ffffffff81c912a0 T radeon_get_legacy_connector_info_from_table +ffffffff81c93660 T radeon_get_legacy_connector_info_from_bios +ffffffff81c943f0 T radeon_combios_get_power_modes +ffffffff81c94ca0 T radeon_external_tmds_setup +ffffffff81c94d70 T radeon_combios_external_tmds_setup +ffffffff81c95330 T radeon_combios_asic_init +ffffffff81c95950 t combios_parse_mmio_table +ffffffff81c95b70 t combios_parse_pll_table +ffffffff81c95e40 T radeon_combios_initialize_bios_scratch_regs +ffffffff81c95ed0 T radeon_combios_output_lock +ffffffff81c95f30 T radeon_combios_connected_scratch_regs +ffffffff81c96290 T radeon_combios_encoder_crtc_scratch_regs +ffffffff81c96370 T radeon_combios_encoder_dpms_scratch_regs +ffffffff81c97000 T radeon_connector_hotplug +ffffffff81c97100 T radeon_get_monitor_bpc +ffffffff81c97530 T radeon_connector_edid +ffffffff81c975e0 T radeon_connector_encoder_get_dp_bridge_encoder_id +ffffffff81c97660 T radeon_connector_is_dp12_capable +ffffffff81c97700 T radeon_add_atom_connector +ffffffff81c98550 T radeon_add_legacy_connector +ffffffff81c98a90 t radeon_dp_detect +ffffffff81c98e50 t radeon_dvi_force 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radeon_lvds_get_modes +ffffffff81c9b810 t radeon_lvds_mode_valid +ffffffff81c9c000 T radeon_cs_parser_init +ffffffff81c9c480 T radeon_cs_ioctl +ffffffff81c9cfb0 t radeon_cs_parser_fini +ffffffff81c9d140 T radeon_cs_packet_parse +ffffffff81c9d2f0 T radeon_cs_packet_next_is_pkt3_nop +ffffffff81c9d350 T radeon_cs_dump_packet +ffffffff81c9d3d0 T radeon_cs_packet_next_reloc +ffffffff81c9d5a0 t cmp_size_smaller_first +ffffffff81c9e000 T radeon_crtc_cursor_move +ffffffff81c9e070 t radeon_lock_cursor +ffffffff81c9e230 t radeon_cursor_move_locked +ffffffff81c9e780 T radeon_crtc_cursor_set2 +ffffffff81c9ea00 t radeon_hide_cursor +ffffffff81c9eac0 t radeon_bo_reserve +ffffffff81c9ec40 t radeon_bo_unreserve +ffffffff81c9ed20 t radeon_show_cursor +ffffffff81c9ef70 T radeon_cursor_reset +ffffffff81c9f000 T radeon_is_px +ffffffff81c9f040 T radeon_program_register_sequence +ffffffff81c9f170 T radeon_pci_config_reset +ffffffff81c9f1a0 T radeon_surface_init +ffffffff81c9f360 T radeon_scratch_init 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cail_pll_write +ffffffff81ca0640 T radeon_atombios_fini +ffffffff81ca06e0 T radeon_combios_init +ffffffff81ca0720 T radeon_combios_fini +ffffffff81ca0750 T radeon_device_init +ffffffff81ca1230 T radeon_device_fini +ffffffff81ca1330 T radeon_suspend_kms +ffffffff81ca16a0 T radeon_resume_kms +ffffffff81ca18f0 T radeon_gpu_reset +ffffffff81ca2000 T radeon_crtc_load_lut +ffffffff81ca2dc0 T radeon_crtc_handle_vblank +ffffffff81ca2f30 T radeon_get_crtc_scanoutpos +ffffffff81ca3560 T radeon_crtc_handle_flip +ffffffff81ca3690 T radeon_compute_pll_avivo +ffffffff81ca3bd0 T radeon_compute_pll_legacy +ffffffff81ca4250 T radeon_framebuffer_init +ffffffff81ca42d0 T radeon_update_display_priority +ffffffff81ca4330 T radeon_modeset_init +ffffffff81ca4e50 T radeon_modeset_fini +ffffffff81ca4fb0 T radeon_crtc_scaling_mode_fixup +ffffffff81ca5310 T radeon_get_crtc_scanout_position +ffffffff81ca5380 t radeon_user_framebuffer_create +ffffffff81ca5520 t radeon_crtc_gamma_set +ffffffff81ca5560 t radeon_crtc_destroy +ffffffff81ca55a0 t radeon_crtc_set_config +ffffffff81ca5660 t radeon_crtc_page_flip_target +ffffffff81ca5af0 t radeon_flip_work_func +ffffffff81ca5d10 t radeon_unpin_work_func +ffffffff81ca5d90 t radeon_bo_reserve +ffffffff81ca5f10 t radeon_bo_unreserve +ffffffff81ca6000 T radeon_dp_aux_transfer_native +ffffffff81ca7000 T radeondrm_probe +ffffffff81ca7060 T radeondrm_attach_kms +ffffffff81ca77a0 T radeondrm_detach_kms +ffffffff81ca7830 T radeondrm_activate_kms +ffffffff81ca78f0 T radeondrm_wsioctl +ffffffff81ca79a0 T radeondrm_wsmmap +ffffffff81ca79d0 T radeondrm_alloc_screen +ffffffff81ca7a00 T radeondrm_free_screen +ffffffff81ca7a10 T radeondrm_show_screen +ffffffff81ca7af0 T radeondrm_enter_ddb +ffffffff81ca7b50 T radeondrm_doswitch +ffffffff81ca7be0 T radeondrm_setpal +ffffffff81ca7de0 T radeondrm_attachhook +ffffffff81ca8110 T radeondrm_forcedetach +ffffffff81ca9000 T radeon_setup_encoder_clones +ffffffff81ca90b0 T radeon_get_encoder_enum +ffffffff81ca9230 T radeon_link_encoder_connector +ffffffff81ca9370 T radeon_encoder_set_active_device +ffffffff81ca9430 T radeon_get_connector_for_encoder +ffffffff81ca94b0 T radeon_get_connector_for_encoder_init +ffffffff81ca9530 T radeon_get_external_encoder +ffffffff81ca95c0 T radeon_encoder_get_dp_bridge_encoder_id +ffffffff81ca9660 T radeon_panel_mode_fixup +ffffffff81ca9830 T radeon_dig_monitor_is_duallink +ffffffff81ca9950 T radeon_encoder_is_digital +ffffffff81caa000 T radeon_align_pitch +ffffffff81caa090 T radeon_fbdev_init +ffffffff81caa1e0 T radeondrm_burner_cb +ffffffff81caa210 T radeon_fbdev_fini +ffffffff81caa280 T radeon_fbdev_set_suspend +ffffffff81caa2d0 T radeon_fbdev_robj_is_fb +ffffffff81caa320 T radeondrm_burner +ffffffff81caa3a0 t radeonfb_create +ffffffff81caa7b0 t radeon_bo_reserve +ffffffff81caa930 t radeon_bo_unreserve +ffffffff81cab000 T radeon_fence_emit +ffffffff81cab120 T radeon_fence_process +ffffffff81cab1f0 t radeon_fence_activity +ffffffff81cab390 T radeon_fence_signaled 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radeon_fence_any_seq_signaled +ffffffff81cacf30 t radeon_fence_check_lockup +ffffffff81cad180 t __delayed_work_tick +ffffffff81cad1a0 t radeon_fence_check_signaled +ffffffff81cad230 t radeon_fence_wait_cb +ffffffff81cae000 T radeon_gart_table_ram_alloc +ffffffff81cae0c0 T radeon_gart_table_ram_free +ffffffff81cae130 T radeon_gart_table_vram_alloc +ffffffff81cae1b0 T radeon_gart_table_vram_pin +ffffffff81cae2f0 t radeon_bo_reserve +ffffffff81cae470 t radeon_bo_unreserve +ffffffff81cae550 T radeon_gart_table_vram_unpin +ffffffff81cae5d0 T radeon_gart_table_vram_free +ffffffff81cae610 T radeon_gart_unbind +ffffffff81cae730 T radeon_gart_bind +ffffffff81cae880 T radeon_gart_init +ffffffff81cae9b0 T radeon_gart_fini +ffffffff81caf000 T radeon_gem_fault +ffffffff81caf180 T radeon_gem_vm_reference +ffffffff81caf1b0 T radeon_gem_vm_detach +ffffffff81caf1c0 T radeon_gem_object_create +ffffffff81caf380 T radeon_gem_init +ffffffff81caf3c0 T radeon_gem_fini +ffffffff81caf3d0 t radeon_gem_object_free +ffffffff81caf420 t radeon_gem_object_open +ffffffff81caf4c0 t radeon_gem_object_close +ffffffff81caf5b0 t radeon_gem_object_mmap +ffffffff81caf650 T radeon_gem_info_ioctl +ffffffff81caf6c0 T radeon_gem_pread_ioctl +ffffffff81caf710 T radeon_gem_pwrite_ioctl +ffffffff81caf760 T radeon_gem_create_ioctl +ffffffff81caf880 T radeon_gem_userptr_ioctl +ffffffff81caf8b0 T radeon_gem_set_domain_ioctl +ffffffff81cafa10 T radeon_mode_dumb_mmap +ffffffff81cafac0 T radeon_gem_mmap_ioctl +ffffffff81cafb80 T radeon_gem_busy_ioctl +ffffffff81cafc30 T radeon_gem_wait_idle_ioctl +ffffffff81cafd40 T radeon_gem_set_tiling_ioctl +ffffffff81cafdf0 T radeon_gem_get_tiling_ioctl +ffffffff81cafec0 t radeon_bo_reserve +ffffffff81cb00d0 t radeon_bo_unreserve +ffffffff81cb01b0 T radeon_gem_va_ioctl +ffffffff81cb0580 T radeon_gem_op_ioctl +ffffffff81cb0680 T radeon_mode_dumb_create +ffffffff81cb0780 T radeon_gem_debugfs_init +ffffffff81cb1000 T radeon_ddc_probe +ffffffff81cb10c0 T radeon_router_select_ddc_port +ffffffff81cb1320 T radeon_bb_set_bits +ffffffff81cb1490 T radeon_bb_set_dir +ffffffff81cb14c0 T radeon_bb_read_bits +ffffffff81cb15a0 T radeon_acquire_bus +ffffffff81cb19f0 T radeon_release_bus +ffffffff81cb1b60 T radeon_send_start +ffffffff81cb1b80 T radeon_send_stop +ffffffff81cb1ba0 T radeon_initiate_xfer +ffffffff81cb1bc0 T radeon_read_byte +ffffffff81cb1be0 T radeon_write_byte +ffffffff81cb1c00 T radeon_i2c_create +ffffffff81cb1e10 T radeon_i2c_destroy +ffffffff81cb1e90 T radeon_i2c_init +ffffffff81cb1ee0 T radeon_i2c_fini +ffffffff81cb1f90 T radeon_i2c_add +ffffffff81cb2140 T radeon_i2c_lookup +ffffffff81cb2300 T radeon_i2c_get_byte +ffffffff81cb23d0 T radeon_i2c_put_byte +ffffffff81cb2460 T radeon_router_select_cd_port +ffffffff81cb26c0 t radeon_hw_i2c_xfer +ffffffff81cb3280 t radeon_hw_i2c_func +ffffffff81cb32b0 t r100_hw_i2c_xfer +ffffffff81cb3990 t radeon_get_i2c_prescale +ffffffff81cb4000 T radeon_ib_get +ffffffff81cb4100 T radeon_ib_free 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radeon_driver_lastclose_kms +ffffffff81cb6c00 T radeon_driver_open_kms +ffffffff81cb6d30 t radeon_bo_reserve +ffffffff81cb6eb0 T radeon_driver_postclose_kms +ffffffff81cb70d0 T radeon_get_vblank_counter_kms +ffffffff81cb7270 T radeon_enable_vblank_kms +ffffffff81cb7320 T radeon_disable_vblank_kms +ffffffff81cb8000 T radeon_crtc_set_base +ffffffff81cb8020 T radeon_crtc_do_set_base +ffffffff81cb85c0 T radeon_crtc_set_base_atomic +ffffffff81cb85e0 t radeon_bo_reserve +ffffffff81cb8760 t radeon_bo_unreserve +ffffffff81cb8840 T radeon_legacy_init_crtc +ffffffff81cb8890 t radeon_crtc_dpms +ffffffff81cb8a90 t radeon_crtc_prepare +ffffffff81cb8b10 t radeon_crtc_commit +ffffffff81cb8b80 t radeon_crtc_mode_fixup +ffffffff81cb8ba0 t radeon_crtc_mode_set +ffffffff81cb9ff0 t radeon_crtc_disable +ffffffff81cbb000 T radeon_legacy_get_backlight_level +ffffffff81cbb040 T radeon_legacy_set_backlight_level +ffffffff81cbb080 t radeon_legacy_lvds_update +ffffffff81cbb3e0 T radeon_legacy_backlight_init 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radeon_bo_unref +ffffffff81cc1780 T radeon_bo_pin_restricted +ffffffff81cc1ab0 T radeon_bo_pin +ffffffff81cc1ad0 T radeon_bo_unpin +ffffffff81cc1b40 T radeon_bo_evict_vram +ffffffff81cc1ba0 T radeon_bo_force_delete +ffffffff81cc1d10 T radeon_bo_init +ffffffff81cc1df0 T radeon_bo_fini +ffffffff81cc1e30 T radeon_bo_list_validate +ffffffff81cc2120 T radeon_bo_get_surface_reg +ffffffff81cc23c0 T radeon_bo_set_tiling_flags +ffffffff81cc26e0 T radeon_bo_get_tiling_flags +ffffffff81cc2730 T radeon_bo_move_notify +ffffffff81cc27f0 T radeon_bo_fault_reserve_notify +ffffffff81cc2af0 T radeon_bo_fence +ffffffff81cc3000 T radeon_pm_get_type_index +ffffffff81cc3080 T radeon_pm_acpi_event_handler +ffffffff81cc3160 t radeon_pm_update_profile +ffffffff81cc3280 t radeon_pm_set_clocks +ffffffff81cc3c20 T radeon_dpm_enable_uvd +ffffffff81cc3ce0 T radeon_pm_compute_clocks +ffffffff81cc4720 T radeon_dpm_enable_vce +ffffffff81cc4790 T radeon_pm_suspend +ffffffff81cc4890 T radeon_pm_resume +ffffffff81cc4b80 T radeon_pm_init +ffffffff81cc5280 T radeon_pm_late_init +ffffffff81cc5340 T radeon_pm_fini +ffffffff81cc5450 t radeon_dpm_thermal_work_handler +ffffffff81cc5530 t radeon_dynpm_idle_work_handler +ffffffff81cc5820 t __delayed_work_tick +ffffffff81cc6000 T radeon_gem_prime_get_sg_table +ffffffff81cc6030 T radeon_gem_prime_pin +ffffffff81cc60c0 t radeon_bo_reserve +ffffffff81cc6240 t radeon_bo_unreserve +ffffffff81cc6320 T radeon_gem_prime_unpin +ffffffff81cc6390 T radeon_gem_prime_export +ffffffff81cc7000 T radeon_ring_supports_scratch_reg +ffffffff81cc7030 T radeon_ring_free_size +ffffffff81cc70e0 T radeon_ring_lockup_update +ffffffff81cc7140 T radeon_ring_alloc +ffffffff81cc72c0 T radeon_ring_lock +ffffffff81cc7340 T radeon_ring_commit +ffffffff81cc7440 T radeon_ring_unlock_commit +ffffffff81cc7470 T radeon_ring_undo +ffffffff81cc74a0 T radeon_ring_unlock_undo +ffffffff81cc74c0 T radeon_ring_test_lockup +ffffffff81cc75e0 T radeon_ring_backup +ffffffff81cc77a0 T radeon_ring_restore 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radeon_ucode_print_common_hdr +ffffffff81cd01e0 T radeon_ucode_print_smc_hdr +ffffffff81cd0270 T radeon_ucode_print_gfx_hdr +ffffffff81cd0340 T radeon_ucode_print_rlc_hdr +ffffffff81cd0440 T radeon_ucode_print_sdma_hdr +ffffffff81cd0520 T radeon_ucode_validate +ffffffff81cd1000 T radeon_uvd_init +ffffffff81cd14f0 t radeon_uvd_idle_work_handler +ffffffff81cd1660 t radeon_bo_reserve +ffffffff81cd1870 t radeon_bo_unreserve +ffffffff81cd1950 T radeon_uvd_fini +ffffffff81cd1a20 T radeon_uvd_suspend +ffffffff81cd1be0 T radeon_uvd_note_usage +ffffffff81cd1e20 T radeon_uvd_get_destroy_msg +ffffffff81cd1f30 T radeon_uvd_resume +ffffffff81cd1fc0 T radeon_uvd_force_into_uvd_segment +ffffffff81cd2060 T radeon_uvd_free_handles +ffffffff81cd2220 T radeon_uvd_cs_parse +ffffffff81cd2940 T radeon_uvd_get_create_msg +ffffffff81cd2ac0 t radeon_uvd_send_msg +ffffffff81cd2c60 T radeon_uvd_calc_upll_dividers +ffffffff81cd2e00 T radeon_uvd_send_upll_ctlreq +ffffffff81cd3140 t __delayed_work_tick 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T radeon_vm_fence +ffffffff81cd7680 T radeon_vm_bo_find +ffffffff81cd76e0 T radeon_vm_bo_add +ffffffff81cd77c0 T radeon_vm_bo_set_addr +ffffffff81cd7c20 t radeon_bo_unreserve +ffffffff81cd7d00 t radeon_vm_clear_bo +ffffffff81cd7ef0 T radeon_vm_map_gart +ffffffff81cd7f30 T radeon_vm_update_page_directory +ffffffff81cd82e0 T radeon_vm_bo_update +ffffffff81cd89c0 T radeon_vm_clear_freed +ffffffff81cd8aa0 T radeon_vm_clear_invalids +ffffffff81cd8b40 T radeon_vm_bo_rmv +ffffffff81cd8c30 T radeon_vm_bo_invalidate +ffffffff81cd8ce0 T radeon_vm_init +ffffffff81cd8f40 T radeon_vm_fini +ffffffff81cd9210 t radeon_bo_reserve +ffffffff81cd9390 t radeon_vm_frag_ptes +ffffffff81cda000 T rs400_gart_adjust_size +ffffffff81cda0c0 T rs400_gart_tlb_flush +ffffffff81cda140 T rs400_gart_init +ffffffff81cda240 T rs400_gart_enable +ffffffff81cda5a0 T rs400_gart_disable +ffffffff81cda600 T rs400_gart_fini +ffffffff81cda670 T rs400_gart_get_page_entry +ffffffff81cda6d0 T rs400_gart_set_page +ffffffff81cda710 T rs400_mc_wait_for_idle +ffffffff81cda7b0 T rs400_mc_rreg +ffffffff81cda840 T rs400_mc_wreg +ffffffff81cda8c0 T rs400_resume +ffffffff81cda9f0 t rs400_mc_program +ffffffff81cdaaf0 t rs400_startup +ffffffff81cdace0 T rs400_suspend +ffffffff81cdad80 T rs400_fini +ffffffff81cdae70 T rs400_init +ffffffff81cdc000 T avivo_wait_for_vblank +ffffffff81cdc280 T rs600_page_flip +ffffffff81cdc540 T rs600_page_flip_pending +ffffffff81cdc5b0 T avivo_program_fmt +ffffffff81cdc6d0 T rs600_pm_misc +ffffffff81cdca10 T rs600_pm_prepare +ffffffff81cdcb10 T rs600_pm_finish +ffffffff81cdcc10 T rs600_hpd_sense +ffffffff81cdcc70 T rs600_hpd_set_polarity +ffffffff81cdcd30 T rs600_hpd_init +ffffffff81cdce10 T rs600_hpd_fini +ffffffff81cdceb0 T rs600_asic_reset +ffffffff81cdd120 T rs600_gart_tlb_flush +ffffffff81cdd1e0 T rs600_gart_get_page_entry +ffffffff81cdd240 T rs600_gart_set_page +ffffffff81cdd280 T rs600_irq_set +ffffffff81cdd450 T rs600_irq_disable +ffffffff81cdd4d0 t rs600_irq_ack +ffffffff81cdd680 T rs600_irq_process +ffffffff81cdd9f0 T rs600_get_vblank_counter +ffffffff81cdda40 T rs600_mc_wait_for_idle +ffffffff81cddae0 T rs600_bandwidth_update +ffffffff81cddbd0 T rs600_mc_rreg +ffffffff81cddc50 T rs600_mc_wreg +ffffffff81cddcc0 T rs600_set_safe_registers +ffffffff81cddd00 T rs600_resume +ffffffff81cdde30 t rs600_startup +ffffffff81cde670 T rs600_suspend +ffffffff81cde770 T rs600_fini +ffffffff81cde870 T rs600_init +ffffffff81cdf000 T rs690_mc_wait_for_idle +ffffffff81cdf0a0 T rs690_pm_info +ffffffff81cdf330 T rs690_line_buffer_adjust +ffffffff81cdf430 T rs690_bandwidth_update +ffffffff81cdf750 t rs690_crtc_bandwidth_compute +ffffffff81cdfb80 t rs690_compute_mode_priority +ffffffff81ce0000 T rs690_mc_rreg +ffffffff81ce0090 T rs690_mc_wreg +ffffffff81ce0110 T rs690_resume +ffffffff81ce0200 t rs690_startup +ffffffff81ce04f0 T rs690_suspend +ffffffff81ce0550 T rs690_fini +ffffffff81ce0600 T rs690_init +ffffffff81ce1000 T rs780_dpm_enable +ffffffff81ce1be0 T rs780_dpm_disable +ffffffff81ce1cc0 T rs780_dpm_set_power_state +ffffffff81ce20a0 t rs780_force_voltage +ffffffff81ce21e0 t rs780_enable_voltage_scaling +ffffffff81ce2390 T rs780_dpm_setup_asic +ffffffff81ce23c0 T rs780_dpm_display_configuration_changed +ffffffff81ce2510 T rs780_dpm_init +ffffffff81ce2a80 T rs780_dpm_print_power_state +ffffffff81ce2b10 T rs780_dpm_fini +ffffffff81ce2ba0 T rs780_dpm_get_sclk +ffffffff81ce2be0 T rs780_dpm_get_mclk +ffffffff81ce2c10 T rs780_dpm_debugfs_print_current_performance_level +ffffffff81ce2c40 T rs780_dpm_get_current_sclk +ffffffff81ce2cd0 T rs780_dpm_get_current_mclk +ffffffff81ce2d00 T rs780_dpm_force_performance_level +ffffffff81ce2ef0 t rs780_force_fbdiv +ffffffff81ce4000 T rv515_ring_start +ffffffff81ce4b30 T rv515_mc_wait_for_idle +ffffffff81ce4bd0 T rv515_vga_render_disable +ffffffff81ce4c20 T rv515_mc_rreg +ffffffff81ce4cb0 T rv515_mc_wreg +ffffffff81ce4d30 T rv515_debugfs +ffffffff81ce4d40 T rv515_mc_stop +ffffffff81ce52d0 T rv515_mc_resume +ffffffff81ce58e0 T rv515_clock_startup +ffffffff81ce59b0 T rv515_resume +ffffffff81ce5bf0 t rv515_startup +ffffffff81ce60d0 T rv515_suspend +ffffffff81ce6140 T rv515_set_safe_registers +ffffffff81ce6180 T rv515_fini +ffffffff81ce6230 T rv515_init +ffffffff81ce6520 T atom_rv515_force_tv_scaler +ffffffff81ce9bc0 T rv515_bandwidth_avivo_update +ffffffff81ce9d60 t rv515_crtc_bandwidth_compute +ffffffff81cea0a0 t rv515_compute_mode_priority +ffffffff81cea550 T rv515_bandwidth_update +ffffffff81ceb000 T rv6xx_dpm_enable +ffffffff81ceb7f0 t rv6xx_calculate_stepping_parameters +ffffffff81ceb9c0 t rv6xx_program_stepping_parameters_except_lowest_entry +ffffffff81cebfb0 t rv6xx_program_stepping_parameters_lowest_entry +ffffffff81cec090 T rv6xx_dpm_disable +ffffffff81cec410 T rv6xx_dpm_set_power_state +ffffffff81cece10 T rv6xx_setup_asic +ffffffff81cecf50 T rv6xx_dpm_display_configuration_changed +ffffffff81cecfd0 T rv6xx_dpm_init +ffffffff81ced520 T rv6xx_dpm_print_power_state +ffffffff81ced5e0 T rv6xx_dpm_debugfs_print_current_performance_level +ffffffff81ced610 T rv6xx_dpm_get_current_sclk +ffffffff81ced680 T rv6xx_dpm_get_current_mclk +ffffffff81ced6f0 T rv6xx_dpm_fini +ffffffff81ced780 T rv6xx_dpm_get_sclk +ffffffff81ced7c0 T rv6xx_dpm_get_mclk +ffffffff81ced800 T rv6xx_dpm_force_performance_level +ffffffff81ced990 t rv6xx_generate_steps +ffffffff81cedca0 t rv6xx_output_stepping +ffffffff81ceddc0 t rv6xx_program_mclk_stepping_entry +ffffffff81cee030 t rv6xx_program_engine_spread_spectrum +ffffffff81cee310 t rv6xx_step_sw_voltage +ffffffff81cef000 T rv730_populate_sclk_value +ffffffff81cef240 T rv730_populate_mclk_value +ffffffff81cef460 T rv730_read_clock_registers +ffffffff81cef580 T rv730_populate_smc_acpi_state +ffffffff81cef730 T rv730_populate_smc_initial_state +ffffffff81cef8f0 T rv730_program_memory_timing_parameters +ffffffff81cefad0 T rv730_start_dpm +ffffffff81cefb60 T rv730_stop_dpm +ffffffff81cefc20 T rv730_program_dcodt +ffffffff81cefcf0 T rv730_get_odt_values +ffffffff81cf0000 T rv740_get_decoded_reference_divider +ffffffff81cf00a0 T rv740_get_dll_speed +ffffffff81cf01d0 T rv740_populate_sclk_value +ffffffff81cf03e0 T rv740_populate_mclk_value +ffffffff81cf0820 T rv740_read_clock_registers +ffffffff81cf0950 T rv740_populate_smc_acpi_state +ffffffff81cf0b80 T rv740_enable_mclk_spread_spectrum +ffffffff81cf0be0 T rv740_get_mclk_frequency_ratio +ffffffff81cf1000 T rv770_set_uvd_clocks +ffffffff81cf1570 T rv770_get_xclk +ffffffff81cf15d0 T rv770_page_flip +ffffffff81cf18e0 T rv770_page_flip_pending +ffffffff81cf1950 T rv770_get_temp +ffffffff81cf19b0 T rv770_pm_misc +ffffffff81cf1a90 T r700_cp_stop +ffffffff81cf1b10 T r700_cp_fini +ffffffff81cf1ba0 T rv770_set_clk_bypass_mode +ffffffff81cf1cc0 T r700_vram_gtt_location +ffffffff81cf1e50 T rv770_resume +ffffffff81cf1ee0 t rv770_init_golden_registers +ffffffff81cf2070 t rv770_startup +ffffffff81cf4060 T rv770_suspend +ffffffff81cf4280 T rv770_init +ffffffff81cf4850 T rv770_fini +ffffffff81cf5000 T rv770_copy_dma +ffffffff81cf6000 T rv770_get_ps +ffffffff81cf6030 T rv770_get_pi +ffffffff81cf6060 T evergreen_get_pi +ffffffff81cf6090 T rv770_restore_cgcg +ffffffff81cf6110 T rv770_stop_dpm +ffffffff81cf61d0 T rv770_dpm_enabled +ffffffff81cf6210 T rv770_enable_thermal_protection +ffffffff81cf6270 T rv770_enable_acpi_pm +ffffffff81cf62c0 T rv770_get_seq_value +ffffffff81cf6300 T rv770_write_smc_soft_register +ffffffff81cf6330 T rv770_populate_smc_t +ffffffff81cf64d0 T rv770_populate_smc_sp +ffffffff81cf6530 T rv770_map_clkf_to_ibias +ffffffff81cf6590 T rv770_populate_vddc_value +ffffffff81cf6640 T rv770_populate_mvdd_value +ffffffff81cf6690 T rv770_calculate_memory_refresh_rate +ffffffff81cf6700 T rv770_enable_backbias +ffffffff81cf6760 T rv770_setup_bsp +ffffffff81cf6850 T rv770_program_git +ffffffff81cf68a0 T rv770_program_tp +ffffffff81cf6920 T rv770_program_tpp +ffffffff81cf6960 T rv770_program_sstp +ffffffff81cf69a0 T rv770_program_engine_speed_parameters +ffffffff81cf69f0 T rv770_program_vc +ffffffff81cf6a40 T rv770_clear_vc +ffffffff81cf6a80 T rv770_upload_firmware +ffffffff81cf6ac0 T rv770_populate_initial_mvdd_value +ffffffff81cf6b10 T rv770_get_memory_module_index +ffffffff81cf6b50 T rv770_enable_voltage_control +ffffffff81cf6bb0 T rv770_halt_smc +ffffffff81cf6c10 T rv770_resume_smc +ffffffff81cf6c60 T rv770_set_sw_state +ffffffff81cf6cc0 T rv770_set_boot_state +ffffffff81cf6d10 T rv770_set_uvd_clock_before_set_eng_clock +ffffffff81cf6d80 T rv770_set_uvd_clock_after_set_eng_clock +ffffffff81cf6df0 T rv770_restrict_performance_levels_before_switch +ffffffff81cf6e50 T rv770_dpm_force_performance_level +ffffffff81cf6f10 T r7xx_start_smc +ffffffff81cf6f40 T r7xx_stop_smc +ffffffff81cf6f70 T rv770_read_voltage_smio_registers +ffffffff81cf6fb0 T rv770_reset_smio_status +ffffffff81cf7070 T rv770_get_memory_type +ffffffff81cf70c0 T rv770_get_pcie_gen2_status +ffffffff81cf7130 T rv770_get_max_vddc +ffffffff81cf7190 T rv770_program_response_times +ffffffff81cf72e0 T rv770_enable_auto_throttle_source +ffffffff81cf7460 T rv770_dpm_enable +ffffffff81cf84e0 T rv770_dpm_late_enable +ffffffff81cf8610 T rv770_dpm_disable +ffffffff81cf8970 T rv770_dpm_set_power_state +ffffffff81cf8f70 T rv770_dpm_setup_asic +ffffffff81cf92d0 T rv770_dpm_display_configuration_changed +ffffffff81cf9350 T rv7xx_parse_power_table +ffffffff81cf9890 T rv770_get_engine_memory_ss +ffffffff81cf9920 T rv770_dpm_init +ffffffff81cf9b60 T rv770_dpm_print_power_state +ffffffff81cf9c80 T rv770_dpm_debugfs_print_current_performance_level +ffffffff81cf9cb0 T rv770_dpm_get_current_sclk +ffffffff81cf9d20 T rv770_dpm_get_current_mclk +ffffffff81cf9d90 T rv770_dpm_fini +ffffffff81cf9e20 T rv770_dpm_get_sclk +ffffffff81cf9e60 T rv770_dpm_get_mclk +ffffffff81cf9eb0 T rv770_dpm_vblank_too_short +ffffffff81cf9f20 t rv770_convert_power_level_to_smc +ffffffff81cfb000 T rv770_copy_bytes_to_smc +ffffffff81cfb240 T rv770_start_smc +ffffffff81cfb290 T rv770_reset_smc +ffffffff81cfb2e0 T rv770_stop_smc_clock +ffffffff81cfb330 T rv770_start_smc_clock +ffffffff81cfb380 T rv770_is_smc_running +ffffffff81cfb3c0 T rv770_send_msg_to_smc +ffffffff81cfb4a0 T rv770_wait_for_smc_inactive +ffffffff81cfb540 T rv770_load_smc_ucode +ffffffff81cfb6d0 T rv770_read_smc_sram_dword +ffffffff81cfb790 T rv770_write_smc_sram_dword +ffffffff81cfc000 T si_get_allowed_info_register +ffffffff81cfc090 T si_get_xclk +ffffffff81cfc100 T si_get_temp +ffffffff81cfc150 T si_mc_load_microcode +ffffffff81cfc420 T dce6_bandwidth_update +ffffffff81cfc820 t dce6_program_watermarks +ffffffff81cfd2d0 T si_fence_ring_emit +ffffffff81cfd750 T si_ring_ib_execute +ffffffff81cfdf30 T si_gpu_check_soft_reset +ffffffff81cfe0d0 T si_asic_reset +ffffffff81cfe4f0 t si_gpu_pci_config_reset +ffffffff81cfe8a0 T si_gfx_is_lockup +ffffffff81cfe910 T si_vram_gtt_location +ffffffff81cfe9b0 T si_pcie_gart_tlb_flush +ffffffff81cfea00 T si_ib_parse +ffffffff81cff0b0 T si_vm_init +ffffffff81cff0f0 T si_vm_fini +ffffffff81cff120 T si_vm_flush +ffffffff81cff800 T si_init_uvd_internal_cg +ffffffff81cff850 T si_get_csb_size +ffffffff81cff8e0 T si_get_csb_buffer +ffffffff81cffa70 T si_rlc_reset +ffffffff81cffaf0 T si_irq_set +ffffffff81d00000 t si_disable_interrupt_state +ffffffff81d00280 T si_irq_process +ffffffff81d01480 t si_irq_ack +ffffffff81d01a80 T si_resume +ffffffff81d01b10 t si_init_golden_registers +ffffffff81d01cd0 t si_startup +ffffffff81d06500 T si_suspend +ffffffff81d06880 T si_init +ffffffff81d07d50 t si_cp_fini +ffffffff81d07e40 t si_pcie_gart_fini +ffffffff81d07f40 T si_fini +ffffffff81d081f0 T si_get_gpu_clock_counter +ffffffff81d082c0 T si_set_uvd_clocks +ffffffff81d08830 T si_set_vce_clocks +ffffffff81d08d70 t si_vce_send_vcepll_ctlreq +ffffffff81d08fb0 t dce6_latency_watermark +ffffffff81d091e0 t si_rlc_stop +ffffffff81d09390 t si_vm_reg_valid +ffffffff81d094f0 t si_vm_packet3_cp_dma_check +ffffffff81d09670 t si_update_cg +ffffffff81d09bc0 t si_enable_mgcg +ffffffff81d09fe0 t si_enable_cgcg +ffffffff81d0b000 T si_dma_is_lockup +ffffffff81d0b080 T si_dma_vm_copy_pages +ffffffff81d0b160 T si_dma_vm_write_pages +ffffffff81d0b2c0 T si_dma_vm_set_pages +ffffffff81d0b420 T si_dma_vm_flush +ffffffff81d0b8b0 T si_copy_dma +ffffffff81d0c000 T si_dpm_force_performance_level +ffffffff81d0c160 T si_get_ddr3_mclk_frequency_ratio +ffffffff81d0c1c0 T si_get_mclk_frequency_ratio +ffffffff81d0c240 T si_trim_voltage_table_to_fit_state_table +ffffffff81d0c340 T si_dpm_setup_asic +ffffffff81d0c510 T si_fan_ctrl_get_fan_speed_percent +ffffffff81d0c5a0 T si_fan_ctrl_set_fan_speed_percent +ffffffff81d0c660 T si_fan_ctrl_set_mode +ffffffff81d0c8b0 T si_fan_ctrl_get_mode +ffffffff81d0c900 T si_dpm_enable +ffffffff81d11c00 t si_populate_smc_tdp_limits +ffffffff81d11e10 T si_dpm_late_enable +ffffffff81d11f60 T si_dpm_disable +ffffffff81d122e0 T si_dpm_pre_set_power_state +ffffffff81d12ee0 T si_dpm_set_power_state +ffffffff81d14460 T si_dpm_post_set_power_state +ffffffff81d14490 T si_dpm_display_configuration_changed +ffffffff81d14570 T si_dpm_init +ffffffff81d16020 T si_dpm_fini +ffffffff81d160d0 T si_dpm_debugfs_print_current_performance_level +ffffffff81d16120 T si_dpm_get_current_sclk +ffffffff81d16190 T si_dpm_get_current_mclk +ffffffff81d16200 t si_get_std_voltage_value +ffffffff81d16330 t si_convert_power_level_to_smc +ffffffff81d16bd0 t si_calculate_sclk_params +ffffffff81d16df0 t si_convert_mc_reg_table_to_smc +ffffffff81d16f50 t si_program_cac_config_registers +ffffffff81d18000 T si_copy_bytes_to_smc +ffffffff81d18250 T si_start_smc +ffffffff81d18290 T si_reset_smc +ffffffff81d182d0 T si_program_jump_on_start +ffffffff81d18300 T si_stop_smc_clock +ffffffff81d18340 T si_start_smc_clock +ffffffff81d18380 T si_is_smc_running +ffffffff81d183e0 T si_send_msg_to_smc +ffffffff81d184b0 T si_wait_for_smc_inactive +ffffffff81d18550 T si_load_smc_ucode +ffffffff81d186f0 T si_read_smc_sram_dword +ffffffff81d187c0 T si_write_smc_sram_dword +ffffffff81d19000 T sumo_get_pi +ffffffff81d19030 T sumo_gfx_clockgating_initialize +ffffffff81d19110 T sumo_program_vc +ffffffff81d19150 T sumo_clear_vc +ffffffff81d19190 T sumo_program_sstp +ffffffff81d19210 T sumo_take_smu_control +ffffffff81d19240 T sumo_get_sleep_divider_from_id +ffffffff81d19270 T sumo_get_sleep_divider_id_from_clock +ffffffff81d19320 T sumo_dpm_enable +ffffffff81d199c0 T sumo_dpm_late_enable +ffffffff81d19f80 T sumo_dpm_disable +ffffffff81d1a2d0 T sumo_dpm_pre_set_power_state +ffffffff81d1a790 T sumo_dpm_set_power_state +ffffffff81d1b2d0 T sumo_dpm_post_set_power_state +ffffffff81d1b370 T sumo_dpm_setup_asic +ffffffff81d1b470 T sumo_dpm_display_configuration_changed +ffffffff81d1b4a0 T sumo_convert_vid2_to_vid7 +ffffffff81d1b500 T sumo_construct_sclk_voltage_mapping_table +ffffffff81d1b5c0 T sumo_construct_vid_mapping_table +ffffffff81d1b740 T sumo_dpm_init +ffffffff81d1c000 T sumo_dpm_print_power_state +ffffffff81d1c120 T sumo_dpm_debugfs_print_current_performance_level +ffffffff81d1c150 T sumo_dpm_get_current_sclk +ffffffff81d1c1c0 T sumo_dpm_get_current_mclk +ffffffff81d1c1f0 T sumo_dpm_get_current_vddc +ffffffff81d1c2c0 T sumo_dpm_fini +ffffffff81d1c350 T sumo_dpm_get_sclk +ffffffff81d1c3a0 T sumo_dpm_get_mclk +ffffffff81d1c3d0 T sumo_dpm_force_performance_level +ffffffff81d1c7f0 t sumo_power_level_enable +ffffffff81d1ca20 t sumo_program_power_level +ffffffff81d1d000 T sumo_initialize_m3_arb +ffffffff81d1d2c0 T sumo_smu_notify_alt_vddnb_change +ffffffff81d1d360 t sumo_send_msg_to_smu +ffffffff81d1d500 T sumo_smu_pg_init +ffffffff81d1d520 T sumo_enable_boost_timer +ffffffff81d1d660 T sumo_set_tdp_limit +ffffffff81d1d6e0 T sumo_boost_state_enable +ffffffff81d1d730 T sumo_get_running_fw_version +ffffffff81d1e000 T trinity_dpm_enable_bapm +ffffffff81d1e080 T trinity_dpm_enable +ffffffff81d1e520 T trinity_dpm_late_enable +ffffffff81d1ea80 T trinity_dpm_disable +ffffffff81d1ee90 T trinity_dpm_force_performance_level +ffffffff81d1ef50 T trinity_dpm_pre_set_power_state +ffffffff81d1f520 T trinity_dpm_set_power_state +ffffffff81d1fab0 T trinity_dpm_post_set_power_state +ffffffff81d1fb50 T trinity_dpm_setup_asic +ffffffff81d1fbb0 T trinity_dpm_display_configuration_changed +ffffffff81d1fc40 T trinity_dpm_init +ffffffff81d20540 T trinity_dpm_print_power_state +ffffffff81d20650 T trinity_dpm_debugfs_print_current_performance_level +ffffffff81d206e0 T trinity_dpm_get_current_sclk +ffffffff81d20740 T trinity_dpm_get_current_mclk +ffffffff81d20770 T trinity_dpm_fini +ffffffff81d20810 T trinity_dpm_get_sclk +ffffffff81d20860 T trinity_dpm_get_mclk +ffffffff81d20890 t trinity_program_power_level +ffffffff81d21000 T trinity_dpm_bapm_enable +ffffffff81d21150 T trinity_dpm_config +ffffffff81d21230 T trinity_dpm_force_state +ffffffff81d21310 T trinity_dpm_n_levels_disabled +ffffffff81d213f0 T trinity_uvd_dpm_config +ffffffff81d214c0 T trinity_dpm_no_forced_level +ffffffff81d21590 T trinity_dce_enable_voltage_adjustment +ffffffff81d216e0 T trinity_gfx_dynamic_mgpg_config +ffffffff81d217b0 T trinity_acquire_mutex +ffffffff81d21840 T trinity_release_mutex +ffffffff81d22000 T uvd_v1_0_get_rptr +ffffffff81d22040 T uvd_v1_0_get_wptr +ffffffff81d22080 T uvd_v1_0_set_wptr +ffffffff81d220c0 T uvd_v1_0_fence_emit +ffffffff81d224b0 T uvd_v1_0_resume +ffffffff81d22610 T uvd_v1_0_init +ffffffff81d22ba0 T uvd_v1_0_start +ffffffff81d23320 T uvd_v1_0_fini +ffffffff81d23490 T uvd_v1_0_stop +ffffffff81d23600 T uvd_v1_0_ring_test +ffffffff81d237d0 T uvd_v1_0_semaphore_emit +ffffffff81d23800 T uvd_v1_0_ib_execute +ffffffff81d239a0 T uvd_v1_0_ib_test +ffffffff81d24000 T uvd_v2_2_fence_emit +ffffffff81d24470 T uvd_v2_2_semaphore_emit +ffffffff81d24680 T uvd_v2_2_resume +ffffffff81d25000 T uvd_v3_1_semaphore_emit +ffffffff81d26000 T uvd_v4_2_resume +ffffffff81d27000 T vce_v1_0_get_rptr +ffffffff81d27090 T vce_v1_0_get_wptr +ffffffff81d27120 T vce_v1_0_set_wptr +ffffffff81d271b0 T vce_v1_0_enable_mgcg +ffffffff81d27470 T vce_v1_0_load_fw +ffffffff81d27640 T vce_v1_0_bo_size +ffffffff81d276b0 T vce_v1_0_resume +ffffffff81d28020 T vce_v1_0_start +ffffffff81d287e0 T vce_v1_0_init +ffffffff81d29000 T vce_v2_0_enable_mgcg +ffffffff81d29070 t vce_v2_0_set_dyn_cg +ffffffff81d29260 T vce_v2_0_bo_size +ffffffff81d292d0 T vce_v2_0_resume +ffffffff81d2a000 T aldebaran_reset_init +ffffffff81d2a0c0 t aldebaran_async_reset +ffffffff81d2a120 t aldebaran_get_reset_handler +ffffffff81d2a1d0 T aldebaran_reset_fini +ffffffff81d2a230 t aldebaran_mode2_prepare_hwcontext +ffffffff81d2a350 t aldebaran_mode2_perform_reset +ffffffff81d2a530 t aldebaran_mode2_restore_hwcontext +ffffffff81d2aa10 t aldebaran_mode2_reset +ffffffff81d2b000 T aldebaran_reg_base_init +ffffffff81d2c000 T amdgpu_acpi_is_pcie_performance_request_supported +ffffffff81d2c040 T amdgpu_acpi_is_power_shift_control_supported +ffffffff81d2c070 T amdgpu_acpi_pcie_notify_device_ready +ffffffff81d2c190 t amdgpu_atcs_call +ffffffff81d2c280 T amdgpu_acpi_pcie_performance_request +ffffffff81d2c4d0 T amdgpu_acpi_power_shift_control +ffffffff81d2c580 T amdgpu_acpi_smart_shift_update +ffffffff81d2c6d0 T amdgpu_acpi_init +ffffffff81d2c790 t amdgpu_acpi_event +ffffffff81d2cad0 T amdgpu_acpi_get_backlight_caps +ffffffff81d2cb20 T amdgpu_acpi_fini +ffffffff81d2cb40 T amdgpu_acpi_should_gpu_reset +ffffffff81d2cb90 T amdgpu_acpi_detect +ffffffff81d2e000 T amdgpu_afmt_acr +ffffffff81d2f000 T amdgpu_amdkfd_init +ffffffff81d2f040 T amdgpu_amdkfd_fini +ffffffff81d2f070 T amdgpu_amdkfd_device_probe +ffffffff81d2f0a0 T amdgpu_amdkfd_device_init +ffffffff81d2f270 t amdgpu_amdkfd_reset_work +ffffffff81d2f2f0 T amdgpu_amdkfd_device_fini_sw +ffffffff81d2f340 T amdgpu_amdkfd_interrupt +ffffffff81d2f370 T amdgpu_amdkfd_suspend +ffffffff81d2f3a0 T amdgpu_amdkfd_resume_iommu +ffffffff81d2f3d0 T amdgpu_amdkfd_resume +ffffffff81d2f400 T amdgpu_amdkfd_pre_reset +ffffffff81d2f430 T amdgpu_amdkfd_post_reset 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atom_op_compare +ffffffff81d330c0 t atom_op_switch +ffffffff81d33310 t atom_op_jump +ffffffff81d33590 t atom_op_test +ffffffff81d33750 t atom_op_delay +ffffffff81d33830 t atom_op_calltable +ffffffff81d33980 t atom_op_repeat +ffffffff81d339b0 t atom_op_clear +ffffffff81d33ac0 t atom_op_nop +ffffffff81d33af0 t atom_op_eot +ffffffff81d33b20 t atom_op_mask +ffffffff81d33df0 t atom_op_postcard +ffffffff81d33ea0 t atom_op_beep +ffffffff81d33ec0 t atom_op_savereg +ffffffff81d33ef0 t atom_op_restorereg +ffffffff81d33f20 t atom_op_setdatablock +ffffffff81d34060 t atom_op_xor +ffffffff81d34240 t atom_op_shl +ffffffff81d34460 t atom_op_shr +ffffffff81d34680 t atom_op_debug +ffffffff81d34730 t atom_op_processds +ffffffff81d347f0 t atom_op_mul32 +ffffffff81d34950 t atom_op_div32 +ffffffff81d34ae0 t atom_put_dst +ffffffff81d34fb0 t atom_get_src_int +ffffffff81d35660 t atom_iio_execute +ffffffff81d36000 T amdgpu_atombios_lookup_i2c_gpio +ffffffff81d36260 T amdgpu_atombios_i2c_init +ffffffff81d36540 T amdgpu_atombios_lookup_gpio +ffffffff81d36640 T amdgpu_atombios_has_dce_engine_info +ffffffff81d366c0 T amdgpu_atombios_get_connector_info_from_object_table +ffffffff81d36f10 T amdgpu_atombios_get_clock_info +ffffffff81d37250 T amdgpu_atombios_get_gfx_info +ffffffff81d37310 T amdgpu_atombios_get_vram_width +ffffffff81d373a0 T amdgpu_atombios_get_asic_ss_info +ffffffff81d37710 T amdgpu_atombios_get_clock_dividers +ffffffff81d37930 T amdgpu_atombios_has_gpu_virtualization_table +ffffffff81d37980 T amdgpu_atombios_scratch_regs_lock +ffffffff81d379e0 T amdgpu_atombios_scratch_regs_engine_hung +ffffffff81d37a30 T amdgpu_atombios_scratch_regs_set_backlight_level +ffffffff81d37a90 T amdgpu_atombios_scratch_need_asic_init +ffffffff81d37ae0 T amdgpu_atombios_copy_swap +ffffffff81d37b00 T amdgpu_atombios_fini +ffffffff81d37ba0 T amdgpu_atombios_init +ffffffff81d37e40 t cail_reg_read +ffffffff81d37e60 t cail_reg_write +ffffffff81d37e80 t cail_mc_read +ffffffff81d37eb0 t cail_mc_write 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amdgpu_atombios_dp_get_dpcd +ffffffff81d3a420 T amdgpu_atombios_dp_get_panel_mode +ffffffff81d3a510 T amdgpu_atombios_dp_set_link_config +ffffffff81d3a590 t amdgpu_atombios_dp_get_dp_link_config +ffffffff81d3a710 T amdgpu_atombios_dp_mode_valid_helper +ffffffff81d3a790 T amdgpu_atombios_dp_needs_link_train +ffffffff81d3a800 T amdgpu_atombios_dp_set_rx_power_state +ffffffff81d3a880 T amdgpu_atombios_dp_link_train +ffffffff81d3add0 t amdgpu_atombios_dp_process_aux_ch +ffffffff81d3af40 t amdgpu_atombios_dp_get_adjust_train +ffffffff81d3c000 T amdgpu_atombios_encoder_get_backlight_level_from_reg +ffffffff81d3c050 T amdgpu_atombios_encoder_set_backlight_level_to_reg +ffffffff81d3c0a0 T amdgpu_atombios_encoder_get_backlight_level +ffffffff81d3c100 T amdgpu_atombios_encoder_set_backlight_level +ffffffff81d3c210 T amdgpu_atombios_encoder_setup_dig_transmitter +ffffffff81d3cbe0 T amdgpu_atombios_encoder_init_backlight +ffffffff81d3cd80 t amdgpu_atombios_encoder_get_backlight_brightness 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amdgpu_allocate_static_csa +ffffffff81d4e100 T amdgpu_free_static_csa +ffffffff81d4e120 T amdgpu_map_static_csa +ffffffff81d4f000 T amdgpu_ctx_priority_is_valid +ffffffff81d4f060 T amdgpu_ctx_get_entity +ffffffff81d4f370 T amdgpu_ctx_ioctl +ffffffff81d4fa70 T amdgpu_ctx_get +ffffffff81d4faf0 T amdgpu_ctx_put +ffffffff81d4fd00 T amdgpu_ctx_add_fence +ffffffff81d4fe70 T amdgpu_ctx_get_fence +ffffffff81d4ff20 T amdgpu_ctx_priority_override +ffffffff81d50100 T amdgpu_ctx_wait_prev_fence +ffffffff81d501b0 T amdgpu_ctx_mgr_init +ffffffff81d50250 T amdgpu_ctx_mgr_entity_flush +ffffffff81d50360 T amdgpu_ctx_mgr_entity_fini +ffffffff81d50610 T amdgpu_ctx_mgr_fini +ffffffff81d506c0 t amdgpu_ctx_fini +ffffffff81d508a0 T amdgpu_ctx_mgr_usage +ffffffff81d50b00 t amdgpu_ctx_set_stable_pstate +ffffffff81d51000 T amdgpu_debugfs_init +ffffffff81d51030 T amdgpu_debugfs_regs_init +ffffffff81d52000 T amdgpu_device_supports_px +ffffffff81d52040 T amdgpu_device_supports_boco +ffffffff81d52070 T amdgpu_device_supports_baco +ffffffff81d520a0 T amdgpu_device_supports_smart_shift +ffffffff81d520e0 T amdgpu_device_mm_access +ffffffff81d52340 T amdgpu_device_wreg +ffffffff81d52440 T amdgpu_device_rreg +ffffffff81d52520 T amdgpu_device_aper_access +ffffffff81d52660 T amdgpu_device_flush_hdp +ffffffff81d52700 T amdgpu_device_invalidate_hdp +ffffffff81d52780 T amdgpu_device_vram_access +ffffffff81d52810 T amdgpu_device_skip_hw_access +ffffffff81d52840 T amdgpu_mm_rreg8 +ffffffff81d528c0 T amdgpu_mm_wreg8 +ffffffff81d52940 T amdgpu_mm_wreg_mmio_rlc +ffffffff81d52a30 T amdgpu_mm_rdoorbell +ffffffff81d52aa0 T amdgpu_mm_wdoorbell +ffffffff81d52b00 T amdgpu_mm_rdoorbell64 +ffffffff81d52b70 T amdgpu_mm_wdoorbell64 +ffffffff81d52bd0 T amdgpu_device_indirect_rreg +ffffffff81d52c60 T amdgpu_device_indirect_rreg64 +ffffffff81d52d10 T amdgpu_device_indirect_wreg +ffffffff81d52d90 T amdgpu_device_indirect_wreg64 +ffffffff81d52e20 T amdgpu_device_program_register_sequence +ffffffff81d53060 T amdgpu_device_pci_config_reset +ffffffff81d53090 T amdgpu_device_pci_reset +ffffffff81d530e0 T amdgpu_device_wb_get +ffffffff81d53190 T amdgpu_device_wb_free +ffffffff81d531e0 T amdgpu_device_resize_fb_bar +ffffffff81d53210 T amdgpu_device_need_post +ffffffff81d53340 T amdgpu_device_should_use_aspm +ffffffff81d53390 T amdgpu_device_aspm_support_quirk +ffffffff81d533e0 T amdgpu_device_ip_set_clockgating_state +ffffffff81d534d0 T amdgpu_device_ip_set_powergating_state +ffffffff81d535c0 T amdgpu_device_ip_get_clockgating_state +ffffffff81d53660 T amdgpu_device_ip_wait_for_idle +ffffffff81d536e0 T amdgpu_device_ip_is_idle +ffffffff81d53750 T amdgpu_device_ip_get_ip_block +ffffffff81d537b0 T amdgpu_device_ip_block_version_cmp +ffffffff81d53830 T amdgpu_device_ip_block_add +ffffffff81d538e0 T amdgpu_device_set_cg_state +ffffffff81d53a10 T amdgpu_device_set_pg_state +ffffffff81d53b40 T amdgpu_device_ip_suspend +ffffffff81d53bd0 t amdgpu_device_ip_suspend_phase1 +ffffffff81d53e80 t amdgpu_device_ip_suspend_phase2 +ffffffff81d54030 T amdgpu_device_asic_has_dc_support +ffffffff81d54090 T amdgpu_device_has_dc_support +ffffffff81d54120 T amdgpu_device_init +ffffffff81d56250 t amdgpu_invalid_rreg +ffffffff81d56290 t amdgpu_invalid_wreg +ffffffff81d562d0 t amdgpu_invalid_rreg64 +ffffffff81d56310 t amdgpu_invalid_wreg64 +ffffffff81d56350 t amdgpu_block_invalid_rreg +ffffffff81d56390 t amdgpu_block_invalid_wreg +ffffffff81d563d0 t amdgpu_device_delayed_init_work_handler +ffffffff81d56430 t amdgpu_device_delay_enable_gfx_off +ffffffff81d56510 t amdgpu_device_xgmi_reset_func +ffffffff81d56810 t amdgpu_device_ip_late_init +ffffffff81d56c40 T amdgpu_device_cache_pci_state +ffffffff81d56c70 T amdgpu_device_fini_hw +ffffffff81d57160 t amdgpu_device_unmap_mmio +ffffffff81d57260 T amdgpu_device_fini_sw +ffffffff81d57640 T amdgpu_device_suspend +ffffffff81d577e0 T amdgpu_device_resume +ffffffff81d57b10 T amdgpu_device_has_job_running +ffffffff81d57be0 T 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+ffffffff81dbf650 T amdgpu_xgmi_get_relative_phy_addr +ffffffff81dbf690 t amdgpu_ras_error_inject_xgmi +ffffffff81dbf800 t amdgpu_xgmi_query_ras_error_count +ffffffff81dc0020 t amdgpu_xgmi_reset_ras_error_count +ffffffff81dc0340 t amdgpu_xgmi_ras_late_init +ffffffff81dc1000 T arct_reg_base_init +ffffffff81dc2000 T athub_v1_0_set_clockgating +ffffffff81dc2210 T athub_v1_0_get_clockgating +ffffffff81dc3000 T athub_v2_0_set_clockgating +ffffffff81dc31e0 T athub_v2_0_get_clockgating +ffffffff81dc4000 T athub_v2_1_set_clockgating +ffffffff81dc41f0 T athub_v2_1_get_clockgating +ffffffff81dc5000 T athub_v3_0_set_clockgating +ffffffff81dc50d0 T athub_v3_0_get_clockgating +ffffffff81dc5120 t athub_v3_0_get_cg_cntl +ffffffff81dc51c0 t athub_v3_0_set_cg_cntl +ffffffff81dc6000 t cz_ih_early_init +ffffffff81dc6050 t cz_ih_sw_init +ffffffff81dc60b0 t cz_ih_sw_fini +ffffffff81dc60f0 t cz_ih_hw_init +ffffffff81dc6320 t cz_ih_hw_fini +ffffffff81dc63f0 t cz_ih_suspend +ffffffff81dc64c0 t cz_ih_resume +ffffffff81dc6500 t cz_ih_is_idle +ffffffff81dc6550 t cz_ih_wait_for_idle +ffffffff81dc65f0 t cz_ih_soft_reset +ffffffff81dc66d0 t cz_ih_set_clockgating_state +ffffffff81dc6700 t cz_ih_set_powergating_state +ffffffff81dc6730 t cz_ih_get_wptr +ffffffff81dc6820 t cz_ih_decode_iv +ffffffff81dc68a0 t cz_ih_set_rptr +ffffffff81dc7000 T dce_v10_0_disable_dce +ffffffff81dc7170 t dce_v10_0_early_init +ffffffff81dc7230 t dce_v10_0_sw_init +ffffffff81dc76a0 t dce_v10_0_sw_fini +ffffffff81dc77d0 t dce_v10_0_hw_init +ffffffff81dc7b40 t dce_v10_0_hw_fini +ffffffff81dc7cd0 t dce_v10_0_suspend +ffffffff81dc7d30 t dce_v10_0_resume +ffffffff81dc7da0 t dce_v10_0_is_idle +ffffffff81dc7dd0 t dce_v10_0_wait_for_idle +ffffffff81dc7e00 t dce_v10_0_check_soft_reset +ffffffff81dc7e10 t dce_v10_0_soft_reset +ffffffff81dc7ee0 t dce_v10_0_set_clockgating_state +ffffffff81dc7f10 t dce_v10_0_set_powergating_state +ffffffff81dc7f40 t dce_v10_0_audio_endpt_rreg +ffffffff81dc7fd0 t dce_v10_0_audio_endpt_wreg +ffffffff81dc8050 t dce_v10_0_bandwidth_update +ffffffff81dc8ac0 t dce_v10_0_vblank_get_counter +ffffffff81dc8b10 t dce_v10_0_hpd_sense +ffffffff81dc8b70 t dce_v10_0_hpd_set_polarity +ffffffff81dc8c40 t dce_v10_0_hpd_get_gpio_reg +ffffffff81dc8c70 t dce_v10_0_page_flip +ffffffff81dc8d60 t dce_v10_0_crtc_get_scanoutpos +ffffffff81dc8e00 t dce_v10_0_encoder_add +ffffffff81dc9030 t dce_v10_0_latency_watermark +ffffffff81dc9250 t dce_v10_0_encoder_destroy +ffffffff81dc92b0 t dce_v10_0_encoder_prepare +ffffffff81dc94b0 t dce_v10_0_encoder_commit +ffffffff81dc94e0 t dce_v10_0_encoder_mode_set +ffffffff81dca380 t dce_v10_0_encoder_disable +ffffffff81dca490 t dce_v10_0_ext_dpms +ffffffff81dca4c0 t dce_v10_0_ext_prepare +ffffffff81dca4f0 t dce_v10_0_ext_commit +ffffffff81dca520 t dce_v10_0_ext_mode_set +ffffffff81dca550 t dce_v10_0_ext_disable +ffffffff81dca580 t dce_v10_0_set_crtc_irq_state +ffffffff81dca660 t dce_v10_0_crtc_irq +ffffffff81dca890 t dce_v10_0_set_crtc_vblank_interrupt_state +ffffffff81dca960 t dce_v10_0_set_crtc_vline_interrupt_state +ffffffff81dcaa30 t dce_v10_0_set_pageflip_irq_state +ffffffff81dcaae0 t dce_v10_0_pageflip_irq +ffffffff81dcac40 t dce_v10_0_set_hpd_irq_state +ffffffff81dcad10 t dce_v10_0_hpd_irq +ffffffff81dcae30 t dce_v10_0_crtc_cursor_set2 +ffffffff81dcb1a0 t dce_v10_0_crtc_cursor_move +ffffffff81dcb280 t dce_v10_0_crtc_gamma_set +ffffffff81dcb2c0 t dce_v10_0_crtc_destroy +ffffffff81dcb2f0 t amdgpu_bo_reserve +ffffffff81dcb500 t amdgpu_bo_unreserve +ffffffff81dcb5e0 t dce_v10_0_cursor_move_locked +ffffffff81dcb730 t dce_v10_0_crtc_load_lut +ffffffff81dcbac0 t dce_v10_0_crtc_dpms +ffffffff81dcbc90 t dce_v10_0_crtc_prepare +ffffffff81dcbcd0 t dce_v10_0_crtc_commit +ffffffff81dcbd00 t dce_v10_0_crtc_mode_fixup +ffffffff81dcbec0 t dce_v10_0_crtc_mode_set +ffffffff81dcc0b0 t dce_v10_0_crtc_set_base +ffffffff81dcc0d0 t dce_v10_0_crtc_set_base_atomic +ffffffff81dcc0f0 t dce_v10_0_crtc_disable +ffffffff81dcc290 t dce_v10_0_crtc_do_set_base +ffffffff81dcc940 t dce_v10_0_is_display_hung +ffffffff81dcd000 T dce_v11_0_disable_dce +ffffffff81dcd160 t dce_v11_0_early_init +ffffffff81dcd2b0 t dce_v11_0_sw_init +ffffffff81dcd730 t dce_v11_0_sw_fini +ffffffff81dcd860 t dce_v11_0_hw_init +ffffffff81dcdc30 t dce_v11_0_hw_fini +ffffffff81dcddc0 t dce_v11_0_suspend +ffffffff81dcde20 t dce_v11_0_resume +ffffffff81dcde90 t dce_v11_0_is_idle +ffffffff81dcdec0 t dce_v11_0_wait_for_idle +ffffffff81dcdef0 t dce_v11_0_soft_reset +ffffffff81dce110 t dce_v11_0_set_clockgating_state +ffffffff81dce140 t dce_v11_0_set_powergating_state +ffffffff81dce170 t dce_v11_0_audio_endpt_rreg +ffffffff81dce200 t dce_v11_0_audio_endpt_wreg +ffffffff81dce280 t dce_v11_0_bandwidth_update +ffffffff81dcecf0 t dce_v11_0_vblank_get_counter +ffffffff81dced40 t dce_v11_0_hpd_sense +ffffffff81dceda0 t dce_v11_0_hpd_set_polarity +ffffffff81dcee70 t dce_v11_0_hpd_get_gpio_reg +ffffffff81dceea0 t dce_v11_0_page_flip +ffffffff81dcefa0 t dce_v11_0_crtc_get_scanoutpos +ffffffff81dcf040 t dce_v11_0_encoder_add +ffffffff81dcf270 t dce_v11_0_latency_watermark +ffffffff81dcf490 t dce_v11_0_encoder_destroy +ffffffff81dcf4f0 t dce_v11_0_encoder_prepare +ffffffff81dcf6f0 t dce_v11_0_encoder_commit +ffffffff81dcf720 t dce_v11_0_encoder_mode_set +ffffffff81dd05c0 t dce_v11_0_encoder_disable +ffffffff81dd06d0 t dce_v11_0_ext_dpms +ffffffff81dd0700 t dce_v11_0_ext_prepare +ffffffff81dd0730 t dce_v11_0_ext_commit +ffffffff81dd0760 t dce_v11_0_ext_mode_set +ffffffff81dd0790 t dce_v11_0_ext_disable +ffffffff81dd07c0 t dce_v11_0_set_crtc_irq_state +ffffffff81dd08a0 t dce_v11_0_crtc_irq +ffffffff81dd0ac0 t dce_v11_0_set_crtc_vblank_interrupt_state +ffffffff81dd0b90 t dce_v11_0_set_crtc_vline_interrupt_state +ffffffff81dd0c60 t dce_v11_0_set_pageflip_irq_state +ffffffff81dd0d10 t dce_v11_0_pageflip_irq +ffffffff81dd0e70 t dce_v11_0_set_hpd_irq_state +ffffffff81dd0f40 t dce_v11_0_hpd_irq +ffffffff81dd1060 t dce_v11_0_crtc_cursor_set2 +ffffffff81dd13d0 t dce_v11_0_crtc_cursor_move +ffffffff81dd14b0 t dce_v11_0_crtc_gamma_set +ffffffff81dd14f0 t dce_v11_0_crtc_destroy +ffffffff81dd1520 t amdgpu_bo_reserve +ffffffff81dd1730 t amdgpu_bo_unreserve +ffffffff81dd1810 t dce_v11_0_cursor_move_locked +ffffffff81dd1960 t dce_v11_0_crtc_load_lut +ffffffff81dd1cd0 t dce_v11_0_crtc_dpms +ffffffff81dd1ea0 t dce_v11_0_crtc_prepare +ffffffff81dd1ee0 t dce_v11_0_crtc_commit +ffffffff81dd1f10 t dce_v11_0_crtc_mode_fixup +ffffffff81dd2180 t dce_v11_0_crtc_mode_set +ffffffff81dd23e0 t dce_v11_0_crtc_set_base +ffffffff81dd2400 t dce_v11_0_crtc_set_base_atomic +ffffffff81dd2420 t dce_v11_0_crtc_disable +ffffffff81dd25c0 t dce_v11_0_crtc_do_set_base +ffffffff81dd3000 t df_v1_7_sw_init +ffffffff81dd3040 t df_v1_7_sw_fini +ffffffff81dd3070 t df_v1_7_enable_broadcast_mode +ffffffff81dd3190 t df_v1_7_get_fb_channel_number +ffffffff81dd3210 t df_v1_7_get_hbm_channel_number +ffffffff81dd3260 t df_v1_7_update_medium_grain_clock_gating +ffffffff81dd33d0 t df_v1_7_get_clockgating_state +ffffffff81dd3460 t df_v1_7_enable_ecc_force_par_wr_rmw +ffffffff81dd4000 t df_v3_6_sw_init +ffffffff81dd4160 t df_v3_6_sw_fini +ffffffff81dd4190 t df_v3_6_enable_broadcast_mode +ffffffff81dd42b0 t df_v3_6_get_fb_channel_number +ffffffff81dd4390 t df_v3_6_get_hbm_channel_number +ffffffff81dd43e0 t df_v3_6_update_medium_grain_clock_gating +ffffffff81dd4580 t df_v3_6_get_clockgating_state +ffffffff81dd4610 t df_v3_6_pmc_start +ffffffff81dd4990 t df_v3_6_pmc_stop +ffffffff81dd4c30 t df_v3_6_pmc_get_count +ffffffff81dd4dc0 t df_v3_6_get_fica +ffffffff81dd4ed0 t df_v3_6_set_fica +ffffffff81dd4fb0 t df_v3_6_query_ras_poison_mode +ffffffff81dd5120 t df_v3_6_perfmon_arm_with_status +ffffffff81dd6000 T dimgrey_cavefish_reg_base_init +ffffffff81dd7000 T emu_soc_asic_init +ffffffff81dd8000 t gfx_v10_0_early_init +ffffffff81dd8420 t gfx_v10_0_late_init +ffffffff81dd8490 t gfx_v10_0_sw_init +ffffffff81dd9840 t gfx_v10_0_sw_fini +ffffffff81dd9b80 t gfx_v10_0_hw_init +ffffffff81ddc730 t gfx_v10_0_hw_fini +ffffffff81ddca20 t gfx_v10_0_suspend +ffffffff81ddca60 t gfx_v10_0_resume +ffffffff81ddca70 t gfx_v10_0_is_idle +ffffffff81ddcb00 t gfx_v10_0_wait_for_idle +ffffffff81ddcbe0 t gfx_v10_0_soft_reset +ffffffff81ddcf30 t gfx_v10_0_set_clockgating_state +ffffffff81ddd1d0 t gfx_v10_0_set_powergating_state +ffffffff81ddd3f0 t gfx_v10_0_get_clockgating_state +ffffffff81ddd500 t gfx10_kiq_set_resources +ffffffff81ddd830 t gfx10_kiq_map_queues +ffffffff81dddbc0 t gfx10_kiq_unmap_queues +ffffffff81dddfc0 t gfx10_kiq_query_status +ffffffff81dde2c0 t gfx10_kiq_invalidate_tlbs +ffffffff81dde3e0 t gfx_v10_0_ring_get_rptr_compute +ffffffff81dde410 t gfx_v10_0_ring_get_wptr_compute +ffffffff81dde480 t gfx_v10_0_ring_set_wptr_compute +ffffffff81dde5c0 t gfx_v10_0_ring_emit_ib_compute +ffffffff81dde910 t gfx_v10_0_ring_emit_fence_kiq +ffffffff81dded50 t gfx_v10_0_ring_test_ring +ffffffff81ddefc0 t gfx_v10_0_ring_test_ib +ffffffff81ddf270 t gfx_v10_0_ring_emit_rreg +ffffffff81ddf510 t gfx_v10_0_ring_emit_wreg +ffffffff81ddf750 t gfx_v10_0_ring_emit_reg_wait +ffffffff81ddf7a0 t gfx_v10_0_ring_emit_reg_write_reg_wait +ffffffff81ddf830 t gfx_v10_0_wait_reg_mem +ffffffff81ddfb60 t gfx_v10_0_ring_get_rptr_gfx +ffffffff81ddfb90 t gfx_v10_0_ring_get_wptr_gfx +ffffffff81ddfca0 t gfx_v10_0_ring_set_wptr_gfx +ffffffff81ddfeb0 t gfx_v10_0_ring_emit_ib_gfx +ffffffff81de0560 t gfx_v10_0_ring_emit_fence +ffffffff81de0930 t gfx_v10_0_ring_emit_pipeline_sync +ffffffff81de0990 t gfx_v10_0_ring_emit_vm_flush +ffffffff81de0b60 t gfx_v10_0_ring_emit_hdp_flush +ffffffff81de0c30 t gfx_v10_0_ring_emit_gds_switch +ffffffff81de0d10 t gfx_v10_0_ring_emit_init_cond_exec +ffffffff81de0f40 t gfx_v10_0_ring_emit_patch_cond_exec +ffffffff81de1000 t gfx_v10_0_ring_emit_sb +ffffffff81de10f0 t gfx_v10_0_ring_emit_cntxcntl +ffffffff81de15e0 t gfx_v10_0_ring_emit_frame_cntl +ffffffff81de16f0 t gfx_v10_0_ring_soft_recovery +ffffffff81de1760 t gfx_v10_0_ring_preempt_ib +ffffffff81de18d0 t gfx_v10_0_emit_mem_sync +ffffffff81de1c10 t gfx_v10_0_write_data_to_reg +ffffffff81de1e20 t gfx_v10_0_set_eop_interrupt_state +ffffffff81de1f00 t gfx_v10_0_eop_irq +ffffffff81de20d0 t gfx_v10_0_set_gfx_eop_interrupt_state +ffffffff81de2260 t gfx_v10_0_set_compute_eop_interrupt_state +ffffffff81de2410 t gfx_v10_0_kiq_set_interrupt_state +ffffffff81de26f0 t gfx_v10_0_kiq_irq +ffffffff81de2770 t gfx_v10_0_set_priv_reg_fault_state +ffffffff81de2890 t gfx_v10_0_priv_reg_irq +ffffffff81de28f0 t gfx_v10_0_handle_priv_fault +ffffffff81de2a80 t gfx_v10_0_set_priv_inst_fault_state +ffffffff81de2ba0 t gfx_v10_0_priv_inst_irq +ffffffff81de2c00 t gfx_v10_0_is_rlc_enabled +ffffffff81de2c80 t gfx_v10_0_set_safe_mode +ffffffff81de2f20 t gfx_v10_0_unset_safe_mode +ffffffff81de2fd0 t gfx_v10_0_rlc_init +ffffffff81de3050 t gfx_v10_0_get_csb_size +ffffffff81de30b0 t gfx_v10_0_get_csb_buffer +ffffffff81de3230 t gfx_v10_0_rlc_resume +ffffffff81de3d30 t gfx_v10_0_rlc_stop +ffffffff81de3e10 t gfx_v10_0_rlc_reset +ffffffff81de3fb0 t gfx_v10_0_rlc_start +ffffffff81de4150 t gfx_v10_0_update_spm_vmid +ffffffff81de4280 t gfx_v10_0_wait_for_rlc_autoload_complete +ffffffff81de4e10 t gfx_v10_0_init_csb +ffffffff81de50e0 t gfx_v10_0_is_rlcg_access_range +ffffffff81de5110 t gfx_v10_0_gfx_mqd_init +ffffffff81de54f0 t gfx_v10_0_compute_mqd_init +ffffffff81de5990 t amdgpu_bo_unreserve +ffffffff81de5a70 t gfx_v10_0_get_gpu_clock_counter +ffffffff81de5f70 t gfx_v10_0_select_se_sh +ffffffff81de6010 t gfx_v10_0_read_wave_data +ffffffff81de6270 t gfx_v10_0_read_wave_vgprs +ffffffff81de62a0 t gfx_v10_0_read_wave_sgprs +ffffffff81de6320 t gfx_v10_0_select_me_pipe_q +ffffffff81de6340 t gfx_v10_0_init_spm_golden_registers +ffffffff81de63b0 t gfx_v10_0_update_perfmon_mgcg +ffffffff81de64d0 t wave_read_ind +ffffffff81de65b0 t wave_read_regs +ffffffff81de6710 t gfx_v10_0_cp_resume +ffffffff81de9350 t gfx_v10_3_get_disabled_sa +ffffffff81de9460 t gfx_v10_0_get_rb_active_bitmap +ffffffff81de9580 t gfx_v10_0_get_wgp_active_bitmap_per_sh +ffffffff81de9690 t gfx_v10_0_enable_gui_idle_interrupt +ffffffff81de97a0 t gfx_v10_0_cp_gfx_enable +ffffffff81de99e0 t gfx_v10_0_cp_compute_enable +ffffffff81de9b70 t amdgpu_bo_reserve +ffffffff81de9cf0 t gfx_v10_0_kiq_init_register +ffffffff81deab60 t gfx_v10_0_cp_gfx_switch_pipe +ffffffff81deac60 t gfx_v10_0_cp_gfx_set_doorbell +ffffffff81deaf30 t gfx_v10_0_cp_gfx_start +ffffffff81deb910 t gfx_v10_0_update_fine_grain_clock_gating +ffffffff81debc30 t gfx_v10_0_update_medium_grain_clock_gating +ffffffff81dec350 t gfx_v10_0_update_3d_clock_gating +ffffffff81dec710 t gfx_v10_0_update_coarse_grain_clock_gating +ffffffff81ded000 t gfx_v11_0_early_init +ffffffff81ded3a0 t gfx_v11_0_late_init +ffffffff81ded410 t gfx_v11_0_sw_init +ffffffff81dee360 t gfx_v11_0_sw_fini +ffffffff81dee640 t gfx_v11_0_hw_init +ffffffff81df2ac0 t gfx_v11_0_hw_fini +ffffffff81df2d40 t gfx_v11_0_suspend +ffffffff81df2d80 t gfx_v11_0_resume +ffffffff81df2d90 t gfx_v11_0_is_idle +ffffffff81df2e20 t gfx_v11_0_wait_for_idle +ffffffff81df2f00 t gfx_v11_0_check_soft_reset +ffffffff81df3030 t gfx_v11_0_soft_reset +ffffffff81df3d10 t gfx_v11_0_post_soft_reset +ffffffff81df3d20 t gfx_v11_0_set_clockgating_state +ffffffff81df4900 t gfx_v11_0_set_powergating_state +ffffffff81df4af0 t gfx_v11_0_get_clockgating_state +ffffffff81df4cc0 t gfx11_kiq_set_resources +ffffffff81df4ff0 t gfx11_kiq_map_queues +ffffffff81df5380 t gfx11_kiq_unmap_queues +ffffffff81df5780 t gfx11_kiq_query_status +ffffffff81df5a80 t gfx11_kiq_invalidate_tlbs +ffffffff81df5ba0 t gfx_v11_0_ring_get_rptr_compute +ffffffff81df5bd0 t gfx_v11_0_ring_get_wptr_compute +ffffffff81df5c40 t gfx_v11_0_ring_set_wptr_compute +ffffffff81df5d80 t gfx_v11_0_ring_emit_ib_compute +ffffffff81df60d0 t gfx_v11_0_ring_emit_fence_kiq +ffffffff81df6510 t gfx_v11_0_ring_test_ring +ffffffff81df67a0 t gfx_v11_0_ring_test_ib +ffffffff81df6a60 t gfx_v11_0_ring_emit_rreg +ffffffff81df6d00 t gfx_v11_0_ring_emit_wreg +ffffffff81df6f40 t gfx_v11_0_ring_emit_reg_wait +ffffffff81df6f90 t gfx_v11_0_ring_emit_reg_write_reg_wait +ffffffff81df7000 t gfx_v11_0_wait_reg_mem +ffffffff81df7330 t gfx_v11_0_ring_get_rptr_gfx +ffffffff81df7360 t gfx_v11_0_ring_get_wptr_gfx +ffffffff81df7470 t gfx_v11_0_ring_set_wptr_gfx +ffffffff81df7680 t gfx_v11_0_ring_emit_ib_gfx +ffffffff81df7d20 t gfx_v11_0_ring_emit_fence +ffffffff81df80f0 t gfx_v11_0_ring_emit_pipeline_sync +ffffffff81df8150 t gfx_v11_0_ring_emit_vm_flush +ffffffff81df8320 t gfx_v11_0_ring_emit_hdp_flush +ffffffff81df83f0 t gfx_v11_0_ring_emit_gds_switch +ffffffff81df84d0 t gfx_v11_0_ring_emit_init_cond_exec +ffffffff81df8700 t gfx_v11_0_ring_emit_patch_cond_exec +ffffffff81df87c0 t gfx_v11_0_ring_emit_cntxcntl +ffffffff81df8920 t gfx_v11_0_ring_emit_frame_cntl +ffffffff81df8a30 t gfx_v11_0_ring_soft_recovery +ffffffff81df8aa0 t gfx_v11_0_ring_preempt_ib +ffffffff81df8c10 t gfx_v11_0_emit_mem_sync +ffffffff81df8f50 t gfx_v11_0_write_data_to_reg +ffffffff81df9160 t gfx_v11_0_set_eop_interrupt_state +ffffffff81df91f0 t gfx_v11_0_eop_irq +ffffffff81df93c0 t gfx_v11_0_set_gfx_eop_interrupt_state +ffffffff81df9550 t gfx_v11_0_set_compute_eop_interrupt_state +ffffffff81df96e0 t gfx_v11_0_set_priv_reg_fault_state +ffffffff81df9800 t gfx_v11_0_priv_reg_irq +ffffffff81df9860 t gfx_v11_0_handle_priv_fault +ffffffff81df99f0 t gfx_v11_0_set_priv_inst_fault_state +ffffffff81df9b10 t gfx_v11_0_priv_inst_irq +ffffffff81df9b70 t gfx_v11_0_is_rlc_enabled +ffffffff81df9bf0 t gfx_v11_0_set_safe_mode +ffffffff81df9d40 t gfx_v11_0_unset_safe_mode +ffffffff81df9db0 t gfx_v11_0_rlc_init +ffffffff81df9e30 t gfx_v11_0_get_csb_size +ffffffff81df9e90 t gfx_v11_0_get_csb_buffer +ffffffff81dfa010 t gfx_v11_0_rlc_resume +ffffffff81dfad30 t gfx_v11_0_rlc_stop +ffffffff81dfae10 t gfx_v11_0_rlc_reset +ffffffff81dfafb0 t gfx_v11_0_rlc_start +ffffffff81dfb150 t gfx_v11_0_update_spm_vmid +ffffffff81dfb250 t gfx_v11_0_init_csb +ffffffff81dfb3d0 t gfx_v11_0_gfx_mqd_init +ffffffff81dfb7a0 t gfx_v11_0_compute_mqd_init +ffffffff81dfbcc0 t amdgpu_bo_unreserve +ffffffff81dfbda0 t gfx_v11_0_get_gpu_clock_counter +ffffffff81dfbed0 t gfx_v11_0_select_se_sh +ffffffff81dfbf70 t gfx_v11_0_read_wave_data +ffffffff81dfc1b0 t gfx_v11_0_read_wave_vgprs +ffffffff81dfc1e0 t gfx_v11_0_read_wave_sgprs +ffffffff81dfc260 t gfx_v11_0_select_me_pipe_q +ffffffff81dfc280 t gfx_v11_0_update_perf_clk +ffffffff81dfc3b0 t wave_read_ind +ffffffff81dfc490 t wave_read_regs +ffffffff81dfc5f0 t gfx_v11_0_disable_gpa_mode +ffffffff81dfc780 t gfx_v11_0_cp_resume +ffffffff81e00820 t gfx_v11_0_config_me_cache +ffffffff81e00bc0 t gfx_v11_0_config_pfp_cache +ffffffff81e00f60 t gfx_v11_0_config_mec_cache +ffffffff81e01300 t gfx_v11_0_enable_gui_idle_interrupt +ffffffff81e01410 t gfx_v11_0_cp_compute_enable +ffffffff81e015e0 t gfx_v11_0_cp_gfx_enable +ffffffff81e017d0 t amdgpu_bo_reserve +ffffffff81e01950 t gfx_v11_0_kiq_init_register +ffffffff81e027c0 t gfx_v11_0_cp_gfx_switch_pipe +ffffffff81e028a0 t gfx_v11_0_cp_gfx_set_doorbell +ffffffff81e02a80 t gfx_v11_0_cp_gfx_start +ffffffff81e04000 t gfx_v8_0_early_init +ffffffff81e04320 t gfx_v8_0_late_init +ffffffff81e04a20 t gfx_v8_0_sw_init +ffffffff81e060f0 t gfx_v8_0_sw_fini +ffffffff81e063b0 t gfx_v8_0_hw_init +ffffffff81e085e0 t gfx_v8_0_hw_fini +ffffffff81e08ad0 t gfx_v8_0_suspend +ffffffff81e08b10 t gfx_v8_0_resume +ffffffff81e08b20 t gfx_v8_0_is_idle +ffffffff81e08b90 t gfx_v8_0_wait_for_idle +ffffffff81e08c40 t gfx_v8_0_check_soft_reset +ffffffff81e08d20 t gfx_v8_0_pre_soft_reset +ffffffff81e08ea0 t gfx_v8_0_soft_reset +ffffffff81e09060 t gfx_v8_0_post_soft_reset +ffffffff81e09220 t gfx_v8_0_set_clockgating_state +ffffffff81e094e0 t gfx_v8_0_set_powergating_state +ffffffff81e098a0 t gfx_v8_0_get_clockgating_state +ffffffff81e09980 t gfx_v8_0_get_gpu_clock_counter +ffffffff81e09a20 t gfx_v8_0_select_se_sh +ffffffff81e09a80 t gfx_v8_0_read_wave_data +ffffffff81e09f20 t gfx_v8_0_read_wave_sgprs +ffffffff81e09fd0 t gfx_v8_0_select_me_pipe_q +ffffffff81e09ff0 t gfx_v8_0_ring_get_rptr +ffffffff81e0a020 t gfx_v8_0_ring_get_wptr_compute +ffffffff81e0a050 t gfx_v8_0_ring_set_wptr_compute +ffffffff81e0a090 t gfx_v8_0_ring_emit_fence_kiq +ffffffff81e0a4c0 t gfx_v8_0_ring_test_ring +ffffffff81e0a6c0 t gfx_v8_0_ring_emit_rreg +ffffffff81e0a960 t gfx_v8_0_ring_emit_wreg +ffffffff81e0aba0 t gfx_v8_0_ring_get_wptr_gfx +ffffffff81e0ac00 t gfx_v8_0_ring_set_wptr_gfx +ffffffff81e0ac70 t gfx_v8_0_ring_emit_ib_gfx +ffffffff81e0b1d0 t gfx_v8_0_ring_emit_fence_gfx +ffffffff81e0b6d0 t gfx_v8_0_ring_emit_pipeline_sync +ffffffff81e0b9c0 t gfx_v8_0_ring_emit_vm_flush +ffffffff81e0bd70 t gfx_v8_0_ring_emit_hdp_flush +ffffffff81e0c090 t gfx_v8_0_ring_emit_gds_switch +ffffffff81e0c860 t gfx_v8_0_ring_test_ib +ffffffff81e0ca10 t gfx_v8_0_ring_emit_init_cond_exec +ffffffff81e0cc40 t gfx_v8_0_ring_emit_patch_cond_exec +ffffffff81e0ccf0 t gfx_v8_ring_emit_sb +ffffffff81e0cde0 t gfx_v8_ring_emit_cntxcntl +ffffffff81e0d380 t gfx_v8_0_ring_soft_recovery +ffffffff81e0d3b0 t gfx_v8_0_emit_mem_sync +ffffffff81e0d5c0 t gfx_v8_0_ring_emit_ib_compute +ffffffff81e0d8d0 t gfx_v8_0_ring_emit_fence_compute +ffffffff81e0dbd0 t gfx_v8_0_emit_mem_sync_compute +ffffffff81e0de90 t gfx_v8_0_emit_wave_limit +ffffffff81e0e040 t gfx_v8_0_set_eop_interrupt_state +ffffffff81e0e250 t gfx_v8_0_eop_irq +ffffffff81e0e380 t gfx_v8_0_set_priv_reg_fault_state +ffffffff81e0e400 t gfx_v8_0_priv_reg_irq +ffffffff81e0e520 t gfx_v8_0_set_priv_inst_fault_state +ffffffff81e0e5a0 t gfx_v8_0_priv_inst_irq +ffffffff81e0e6c0 t gfx_v8_0_set_cp_ecc_int_state +ffffffff81e0e930 t gfx_v8_0_cp_ecc_error_irq +ffffffff81e0e980 t gfx_v8_0_set_sq_int_state +ffffffff81e0ea10 t gfx_v8_0_sq_irq +ffffffff81e0eab0 t gfx_v8_0_parse_sq_irq +ffffffff81e0ed00 t gfx_v8_0_is_rlc_enabled +ffffffff81e0ed40 t gfx_v8_0_set_safe_mode +ffffffff81e0ee40 t gfx_v8_0_unset_safe_mode +ffffffff81e0eee0 t gfx_v8_0_rlc_init +ffffffff81e0ef90 t gfx_v8_0_get_csb_size +ffffffff81e0eff0 t gfx_v8_0_get_csb_buffer +ffffffff81e0f170 t gfx_v8_0_cp_jump_table_num +ffffffff81e0f1b0 t gfx_v8_0_rlc_resume +ffffffff81e0f540 t gfx_v8_0_rlc_stop +ffffffff81e0f5b0 t gfx_v8_0_rlc_reset +ffffffff81e0f630 t gfx_v8_0_rlc_start +ffffffff81e0f6b0 t gfx_v8_0_update_spm_vmid +ffffffff81e0f720 t gfx_v8_0_init_save_restore_list +ffffffff81e0fb40 t gfx_v8_0_wait_for_rlc_serdes +ffffffff81e0fd60 t gfx_v8_0_sq_irq_work_func +ffffffff81e0fd80 t amdgpu_bo_unreserve +ffffffff81e0fe60 t gfx_v8_0_kiq_resume +ffffffff81e100c0 t gfx_v8_0_cp_gfx_resume +ffffffff81e10be0 t gfx_v8_0_kcq_resume +ffffffff81e11610 t amdgpu_bo_reserve +ffffffff81e11790 t gfx_v8_0_mqd_commit +ffffffff81e11970 t gfx_v8_0_mqd_init +ffffffff81e11d90 t gfx_v8_0_deactivate_hqd +ffffffff81e11e50 t gfx_v8_0_update_medium_grain_clock_gating +ffffffff81e12180 t gfx_v8_0_update_coarse_grain_clock_gating +ffffffff81e13000 t gfx_v9_0_ras_error_inject +ffffffff81e131a0 t gfx_v9_0_query_ras_error_count +ffffffff81e13d40 t gfx_v9_0_reset_ras_error_count +ffffffff81e14780 T gfx_v9_0_select_se_sh +ffffffff81e14820 t gfx_v9_0_early_init +ffffffff81e14c80 t gfx_v9_0_late_init +ffffffff81e15990 t gfx_v9_0_sw_init +ffffffff81e17000 t gfx_v9_0_sw_fini +ffffffff81e172b0 t gfx_v9_0_hw_init +ffffffff81e1a360 t gfx_v9_0_hw_fini +ffffffff81e1aac0 t gfx_v9_0_suspend +ffffffff81e1ab00 t gfx_v9_0_resume +ffffffff81e1ab10 t gfx_v9_0_is_idle +ffffffff81e1ab90 t gfx_v9_0_wait_for_idle +ffffffff81e1ac70 t gfx_v9_0_soft_reset +ffffffff81e1b000 t gfx_v9_0_set_clockgating_state +ffffffff81e1b0d0 t gfx_v9_0_set_powergating_state +ffffffff81e1b4d0 t gfx_v9_0_get_clockgating_state +ffffffff81e1b5e0 t gfx_v9_0_kiq_set_resources +ffffffff81e1b910 t gfx_v9_0_kiq_map_queues +ffffffff81e1bc50 t gfx_v9_0_kiq_unmap_queues +ffffffff81e1bfd0 t gfx_v9_0_kiq_query_status +ffffffff81e1c2d0 t gfx_v9_0_kiq_invalidate_tlbs +ffffffff81e1c3f0 t gfx_v9_0_ring_get_rptr_compute +ffffffff81e1c420 t gfx_v9_0_ring_get_wptr_compute +ffffffff81e1c490 t gfx_v9_0_ring_set_wptr_compute +ffffffff81e1c4f0 t gfx_v9_0_ring_emit_fence_kiq +ffffffff81e1c930 t gfx_v9_0_ring_test_ring +ffffffff81e1cb60 t gfx_v9_0_ring_emit_rreg +ffffffff81e1ce00 t gfx_v9_0_ring_emit_wreg +ffffffff81e1d040 t gfx_v9_0_ring_emit_reg_wait +ffffffff81e1d090 t gfx_v9_0_ring_emit_reg_write_reg_wait +ffffffff81e1d130 t gfx_v9_0_wait_reg_mem +ffffffff81e1d460 t gfx_v9_0_ring_get_rptr_gfx +ffffffff81e1d490 t gfx_v9_0_ring_get_wptr_gfx +ffffffff81e1d5a0 t gfx_v9_0_ring_set_wptr_gfx +ffffffff81e1d6d0 t gfx_v9_0_ring_emit_ib_gfx +ffffffff81e1dbf0 t gfx_v9_0_ring_emit_fence +ffffffff81e1dfb0 t gfx_v9_0_ring_emit_pipeline_sync +ffffffff81e1e010 t gfx_v9_0_ring_emit_vm_flush +ffffffff81e1e120 t gfx_v9_0_ring_emit_hdp_flush +ffffffff81e1e1f0 t gfx_v9_0_ring_emit_gds_switch +ffffffff81e1e2d0 t gfx_v9_0_ring_test_ib +ffffffff81e1e480 t gfx_v9_0_ring_emit_init_cond_exec +ffffffff81e1e6b0 t gfx_v9_0_ring_emit_patch_cond_exec +ffffffff81e1e780 t gfx_v9_ring_emit_sb +ffffffff81e1e870 t gfx_v9_ring_emit_cntxcntl +ffffffff81e1ec70 t gfx_v9_0_ring_emit_frame_cntl +ffffffff81e1ed80 t gfx_v9_0_ring_soft_recovery +ffffffff81e1edf0 t gfx_v9_0_emit_mem_sync +ffffffff81e1f0b0 t gfx_v9_0_write_data_to_reg +ffffffff81e1f2c0 t gfx_v9_0_ring_emit_ib_compute +ffffffff81e1f5f0 t gfx_v9_0_emit_wave_limit +ffffffff81e1f7c0 t gfx_v9_0_set_eop_interrupt_state +ffffffff81e1f990 t gfx_v9_0_eop_irq +ffffffff81e1fac0 t gfx_v9_0_set_compute_eop_interrupt_state +ffffffff81e1fc70 t gfx_v9_0_set_priv_reg_fault_state +ffffffff81e1fd90 t gfx_v9_0_priv_reg_irq +ffffffff81e1feb0 t gfx_v9_0_set_priv_inst_fault_state +ffffffff81e1ffd0 t gfx_v9_0_priv_inst_irq +ffffffff81e200f0 t gfx_v9_0_set_cp_ecc_error_state +ffffffff81e20920 t gfx_v9_0_is_rlc_enabled +ffffffff81e209a0 t gfx_v9_0_set_safe_mode +ffffffff81e20af0 t gfx_v9_0_unset_safe_mode +ffffffff81e20b60 t gfx_v9_0_rlc_init +ffffffff81e21370 t gfx_v9_0_get_csb_size +ffffffff81e213d0 t gfx_v9_0_get_csb_buffer +ffffffff81e21520 t gfx_v9_0_cp_jump_table_num +ffffffff81e21570 t gfx_v9_0_rlc_resume +ffffffff81e22310 t gfx_v9_0_rlc_stop +ffffffff81e227b0 t gfx_v9_0_rlc_reset +ffffffff81e22940 t gfx_v9_0_rlc_start +ffffffff81e22a80 t gfx_v9_0_update_spm_vmid +ffffffff81e22bb0 t gfx_v9_0_is_rlcg_access_range +ffffffff81e22c00 t gfx_v9_0_init_always_on_cu_mask +ffffffff81e22f60 t gfx_v9_0_init_csb +ffffffff81e230f0 t gfx_v9_0_enable_lbpw +ffffffff81e231e0 t gfx_v9_0_enable_gui_idle_interrupt +ffffffff81e232e0 t amdgpu_bo_unreserve +ffffffff81e233c0 t gfx_v9_0_get_gpu_clock_counter +ffffffff81e23b40 t gfx_v9_0_read_wave_data +ffffffff81e23d80 t gfx_v9_0_read_wave_vgprs +ffffffff81e23da0 t gfx_v9_0_read_wave_sgprs +ffffffff81e23df0 t gfx_v9_0_select_me_pipe_q +ffffffff81e23e10 t wave_read_ind +ffffffff81e23f20 t wave_read_regs +ffffffff81e24090 t gfx_v9_0_cp_gfx_enable +ffffffff81e24170 t amdgpu_bo_reserve +ffffffff81e242f0 t gfx_v9_0_kiq_init_register +ffffffff81e24f70 t gfx_v9_0_mqd_init +ffffffff81e254b0 t gfx_v9_0_update_medium_grain_clock_gating +ffffffff81e259c0 t gfx_v9_0_update_3d_clock_gating +ffffffff81e25da0 t gfx_v9_0_update_coarse_grain_clock_gating +ffffffff81e27000 t gfx_v9_4_ras_error_inject +ffffffff81e27130 t gfx_v9_4_query_ras_error_count +ffffffff81e27ef0 t gfx_v9_4_query_ras_error_status +ffffffff81e280c0 t gfx_v9_4_reset_ras_error_count +ffffffff81e29000 T gfx_v9_4_2_do_edc_gpr_workarounds +ffffffff81e29790 T gfx_v9_4_2_init_golden_registers +ffffffff81e29830 T gfx_v9_4_2_debug_trap_config_init +ffffffff81e298d0 T gfx_v9_4_2_set_power_brake_sequence +ffffffff81e29aa0 t gfx_v9_4_2_ras_error_inject +ffffffff81e29bd0 t gfx_v9_4_2_query_ras_error_count +ffffffff81e29c80 t gfx_v9_4_2_query_ras_error_status +ffffffff81e2a4d0 t gfx_v9_4_2_reset_ras_error_count +ffffffff81e2a530 t gfx_v9_4_2_reset_ras_error_status +ffffffff81e2a9f0 t gfx_v9_4_2_enable_watchdog_timer +ffffffff81e2ac10 t gfx_v9_4_2_query_uctl2_poison_status +ffffffff81e2ac90 t gfx_v9_4_2_run_shader +ffffffff81e2b010 t gfx_v9_4_2_wait_for_waves_assigned +ffffffff81e2b650 t gfx_v9_4_2_query_sram_edc_count +ffffffff81e2b9a0 t gfx_v9_4_2_query_utc_edc_count +ffffffff81e2bb80 t wave_read_ind +ffffffff81e2c000 t gfxhub_v1_0_get_mc_fb_offset +ffffffff81e2c090 t gfxhub_v1_0_setup_vm_pt_regs +ffffffff81e2c1d0 t gfxhub_v1_0_gart_enable +ffffffff81e2d6c0 t gfxhub_v1_0_gart_disable +ffffffff81e2d950 t gfxhub_v1_0_set_fault_enable_default +ffffffff81e2da40 t gfxhub_v1_0_init +ffffffff81e2e000 T gfxhub_v1_1_get_xgmi_info +ffffffff81e2f000 t gfxhub_v2_0_get_fb_location +ffffffff81e2f090 t gfxhub_v2_0_get_mc_fb_offset +ffffffff81e2f120 t gfxhub_v2_0_setup_vm_pt_regs +ffffffff81e2f260 t gfxhub_v2_0_gart_enable +ffffffff81e30460 t gfxhub_v2_0_gart_disable +ffffffff81e306a0 t gfxhub_v2_0_set_fault_enable_default +ffffffff81e30790 t gfxhub_v2_0_init +ffffffff81e30860 t gfxhub_v2_0_print_l2_protection_fault_status +ffffffff81e30a40 t gfxhub_v2_0_get_invalidate_req +ffffffff81e31000 t gfxhub_v2_1_get_fb_location +ffffffff81e31090 t gfxhub_v2_1_get_mc_fb_offset +ffffffff81e31120 t gfxhub_v2_1_setup_vm_pt_regs +ffffffff81e31260 t gfxhub_v2_1_gart_enable +ffffffff81e32540 t gfxhub_v2_1_gart_disable +ffffffff81e327c0 t gfxhub_v2_1_set_fault_enable_default +ffffffff81e328d0 t gfxhub_v2_1_init +ffffffff81e329a0 t gfxhub_v2_1_get_xgmi_info +ffffffff81e32ad0 t gfxhub_v2_1_utcl2_harvest +ffffffff81e32cb0 t gfxhub_v2_1_save_regs +ffffffff81e336e0 t gfxhub_v2_1_restore_regs +ffffffff81e342c0 t gfxhub_v2_1_halt +ffffffff81e34680 t gfxhub_v2_1_print_l2_protection_fault_status +ffffffff81e34860 t gfxhub_v2_1_get_invalidate_req +ffffffff81e35000 t gfxhub_v3_0_get_fb_location +ffffffff81e35090 t gfxhub_v3_0_get_mc_fb_offset +ffffffff81e35120 t gfxhub_v3_0_setup_vm_pt_regs +ffffffff81e35260 t gfxhub_v3_0_gart_enable +ffffffff81e364e0 t gfxhub_v3_0_gart_disable +ffffffff81e36760 t gfxhub_v3_0_set_fault_enable_default +ffffffff81e36b00 t gfxhub_v3_0_init +ffffffff81e36bd0 t gfxhub_v3_0_print_l2_protection_fault_status +ffffffff81e36db0 t gfxhub_v3_0_get_invalidate_req +ffffffff81e37000 t gfxhub_v3_0_3_get_fb_location +ffffffff81e37090 t gfxhub_v3_0_3_get_mc_fb_offset +ffffffff81e37120 t gfxhub_v3_0_3_setup_vm_pt_regs +ffffffff81e37260 t gfxhub_v3_0_3_gart_enable +ffffffff81e384f0 t gfxhub_v3_0_3_gart_disable +ffffffff81e38790 t gfxhub_v3_0_3_set_fault_enable_default +ffffffff81e388a0 t gfxhub_v3_0_3_init +ffffffff81e38970 t gfxhub_v3_0_3_print_l2_protection_fault_status +ffffffff81e38b50 t gfxhub_v3_0_3_get_invalidate_req +ffffffff81e39000 t gmc_v10_0_early_init +ffffffff81e391f0 t gmc_v10_0_late_init +ffffffff81e39260 t gmc_v10_0_sw_init +ffffffff81e39680 t gmc_v10_0_sw_fini +ffffffff81e396d0 t gmc_v10_0_hw_init +ffffffff81e398a0 t gmc_v10_0_hw_fini +ffffffff81e39940 t gmc_v10_0_suspend +ffffffff81e399e0 t gmc_v10_0_resume +ffffffff81e39a40 t gmc_v10_0_is_idle +ffffffff81e39a70 t gmc_v10_0_wait_for_idle +ffffffff81e39aa0 t gmc_v10_0_soft_reset +ffffffff81e39ad0 t gmc_v10_0_set_clockgating_state +ffffffff81e39b80 t gmc_v10_0_set_powergating_state +ffffffff81e39bb0 t gmc_v10_0_get_clockgating_state +ffffffff81e39c50 t gmc_v10_0_flush_gpu_tlb +ffffffff81e39f00 t gmc_v10_0_flush_gpu_tlb_pasid +ffffffff81e3a120 t gmc_v10_0_emit_flush_gpu_tlb +ffffffff81e3a2d0 t gmc_v10_0_emit_pasid_mapping +ffffffff81e3a340 t gmc_v10_0_map_mtype +ffffffff81e3a390 t gmc_v10_0_get_vm_pde +ffffffff81e3a480 t gmc_v10_0_get_vm_pte +ffffffff81e3a530 t gmc_v10_0_get_vbios_fb_size +ffffffff81e3a6a0 t gmc_v10_0_flush_vm_hub +ffffffff81e3ab00 t gmc_v10_0_vm_fault_interrupt_state +ffffffff81e3ab70 t gmc_v10_0_process_interrupt +ffffffff81e3ae30 t gmc_v10_0_ecc_interrupt_state +ffffffff81e3b000 t gmc_v11_0_early_init +ffffffff81e3b230 t gmc_v11_0_late_init +ffffffff81e3b2a0 t gmc_v11_0_sw_init +ffffffff81e3b5c0 t gmc_v11_0_sw_fini +ffffffff81e3b610 t gmc_v11_0_hw_init +ffffffff81e3b750 t gmc_v11_0_hw_fini +ffffffff81e3b7e0 t gmc_v11_0_suspend +ffffffff81e3b870 t gmc_v11_0_resume +ffffffff81e3b8d0 t gmc_v11_0_is_idle +ffffffff81e3b900 t gmc_v11_0_wait_for_idle +ffffffff81e3b930 t gmc_v11_0_soft_reset +ffffffff81e3b960 t gmc_v11_0_set_clockgating_state +ffffffff81e3b9e0 t gmc_v11_0_set_powergating_state +ffffffff81e3ba10 t gmc_v11_0_get_clockgating_state +ffffffff81e3ba50 t gmc_v11_0_flush_gpu_tlb +ffffffff81e3bf20 t gmc_v11_0_flush_gpu_tlb_pasid +ffffffff81e3c110 t gmc_v11_0_emit_flush_gpu_tlb +ffffffff81e3c2c0 t gmc_v11_0_emit_pasid_mapping +ffffffff81e3c330 t gmc_v11_0_map_mtype +ffffffff81e3c380 t gmc_v11_0_get_vm_pde +ffffffff81e3c480 t gmc_v11_0_get_vm_pte +ffffffff81e3c530 t gmc_v11_0_get_vbios_fb_size +ffffffff81e3c560 t gmc_v11_0_vm_fault_interrupt_state +ffffffff81e3c5d0 t gmc_v11_0_process_interrupt +ffffffff81e3c7f0 t gmc_v11_0_ecc_interrupt_state +ffffffff81e3d000 t gmc_v7_0_early_init +ffffffff81e3d090 t gmc_v7_0_late_init +ffffffff81e3d0e0 t gmc_v7_0_sw_init +ffffffff81e3d5e0 t gmc_v7_0_sw_fini +ffffffff81e3d690 t gmc_v7_0_hw_init +ffffffff81e3e040 t gmc_v7_0_hw_fini +ffffffff81e3e100 t gmc_v7_0_suspend +ffffffff81e3e140 t gmc_v7_0_resume +ffffffff81e3e1a0 t gmc_v7_0_is_idle +ffffffff81e3e1f0 t gmc_v7_0_wait_for_idle +ffffffff81e3e290 t gmc_v7_0_soft_reset +ffffffff81e3e4f0 t gmc_v7_0_set_clockgating_state +ffffffff81e3e750 t gmc_v7_0_set_powergating_state +ffffffff81e3e780 t gmc_v7_0_flush_gpu_tlb +ffffffff81e3e7b0 t gmc_v7_0_flush_gpu_tlb_pasid +ffffffff81e3e870 t gmc_v7_0_emit_flush_gpu_tlb +ffffffff81e3e900 t gmc_v7_0_emit_pasid_mapping +ffffffff81e3e930 t gmc_v7_0_set_prt +ffffffff81e3eaf0 t gmc_v7_0_get_vm_pde +ffffffff81e3eb50 t gmc_v7_0_get_vm_pte +ffffffff81e3eb90 t gmc_v7_0_get_vbios_fb_size +ffffffff81e3ec00 t gmc_v7_0_vm_fault_interrupt_state +ffffffff81e3ecd0 t gmc_v7_0_process_interrupt +ffffffff81e3f000 t gmc_v8_0_early_init +ffffffff81e3f090 t gmc_v8_0_late_init +ffffffff81e3f0e0 t gmc_v8_0_sw_init +ffffffff81e3f760 t gmc_v8_0_sw_fini +ffffffff81e3f810 t gmc_v8_0_hw_init +ffffffff81e404c0 t gmc_v8_0_hw_fini +ffffffff81e40580 t gmc_v8_0_suspend +ffffffff81e405c0 t gmc_v8_0_resume +ffffffff81e40620 t gmc_v8_0_is_idle +ffffffff81e40670 t gmc_v8_0_wait_for_idle +ffffffff81e40710 t gmc_v8_0_check_soft_reset +ffffffff81e40780 t gmc_v8_0_pre_soft_reset +ffffffff81e408f0 t gmc_v8_0_soft_reset +ffffffff81e409c0 t gmc_v8_0_post_soft_reset +ffffffff81e40a30 t gmc_v8_0_set_clockgating_state +ffffffff81e40ff0 t gmc_v8_0_set_powergating_state +ffffffff81e41020 t gmc_v8_0_get_clockgating_state +ffffffff81e41090 t gmc_v8_0_flush_gpu_tlb +ffffffff81e410c0 t gmc_v8_0_flush_gpu_tlb_pasid +ffffffff81e41180 t gmc_v8_0_emit_flush_gpu_tlb +ffffffff81e41210 t gmc_v8_0_emit_pasid_mapping +ffffffff81e41240 t gmc_v8_0_set_prt +ffffffff81e41400 t gmc_v8_0_get_vm_pde +ffffffff81e41460 t gmc_v8_0_get_vm_pte +ffffffff81e414b0 t gmc_v8_0_get_vbios_fb_size +ffffffff81e41520 t gmc_v8_0_vm_fault_interrupt_state +ffffffff81e415f0 t gmc_v8_0_process_interrupt +ffffffff81e42000 T gmc_v9_0_restore_registers +ffffffff81e42150 t gmc_v9_0_early_init +ffffffff81e42500 t gmc_v9_0_late_init +ffffffff81e42610 t gmc_v9_0_sw_init +ffffffff81e42cc0 t gmc_v9_0_sw_fini +ffffffff81e42d30 t gmc_v9_0_hw_init +ffffffff81e43130 t gmc_v9_0_hw_fini +ffffffff81e431f0 t gmc_v9_0_suspend +ffffffff81e432b0 t gmc_v9_0_resume +ffffffff81e43310 t gmc_v9_0_is_idle +ffffffff81e43340 t gmc_v9_0_wait_for_idle +ffffffff81e43370 t gmc_v9_0_soft_reset +ffffffff81e433a0 t gmc_v9_0_set_clockgating_state +ffffffff81e43400 t gmc_v9_0_set_powergating_state +ffffffff81e43430 t gmc_v9_0_get_clockgating_state +ffffffff81e43470 t gmc_v9_0_flush_gpu_tlb +ffffffff81e43ab0 t gmc_v9_0_flush_gpu_tlb_pasid +ffffffff81e43d80 t gmc_v9_0_emit_flush_gpu_tlb +ffffffff81e43f50 t gmc_v9_0_emit_pasid_mapping +ffffffff81e43fc0 t gmc_v9_0_map_mtype +ffffffff81e44000 t gmc_v9_0_get_vm_pde +ffffffff81e44100 t gmc_v9_0_get_vm_pte +ffffffff81e441d0 t gmc_v9_0_get_vbios_fb_size +ffffffff81e44360 t gmc_v9_0_vm_fault_interrupt_state +ffffffff81e446e0 t gmc_v9_0_process_interrupt +ffffffff81e44d20 t gmc_v9_0_ecc_interrupt_state +ffffffff81e45000 t hdp_v4_0_query_ras_error_count +ffffffff81e450c0 t hdp_v4_0_reset_ras_error_count +ffffffff81e451e0 t hdp_v4_0_flush_hdp +ffffffff81e45230 t hdp_v4_0_invalidate_hdp +ffffffff81e45300 t hdp_v4_0_update_clock_gating +ffffffff81e45400 t hdp_v4_0_get_clockgating_state +ffffffff81e45450 t hdp_v4_0_init_registers +ffffffff81e46000 t hdp_v5_0_flush_hdp +ffffffff81e46050 t hdp_v5_0_invalidate_hdp +ffffffff81e460f0 t hdp_v5_0_update_clock_gating +ffffffff81e464e0 t hdp_v5_0_get_clockgating_state +ffffffff81e46600 t hdp_v5_0_init_registers +ffffffff81e47000 t hdp_v5_2_flush_hdp +ffffffff81e47050 t hdp_v5_2_update_clock_gating +ffffffff81e47440 t hdp_v5_2_get_clockgating_state +ffffffff81e48000 t hdp_v6_0_flush_hdp +ffffffff81e48050 t hdp_v6_0_update_clock_gating +ffffffff81e48360 t hdp_v6_0_get_clockgating_state +ffffffff81e49000 t iceland_ih_early_init +ffffffff81e49050 t iceland_ih_sw_init +ffffffff81e490b0 t iceland_ih_sw_fini +ffffffff81e490f0 t iceland_ih_hw_init +ffffffff81e49320 t iceland_ih_hw_fini +ffffffff81e493f0 t iceland_ih_suspend +ffffffff81e494c0 t iceland_ih_resume +ffffffff81e49500 t iceland_ih_is_idle +ffffffff81e49550 t iceland_ih_wait_for_idle +ffffffff81e495f0 t iceland_ih_soft_reset +ffffffff81e496d0 t iceland_ih_set_clockgating_state +ffffffff81e49700 t iceland_ih_set_powergating_state +ffffffff81e49730 t iceland_ih_get_wptr +ffffffff81e49820 t iceland_ih_decode_iv +ffffffff81e498a0 t iceland_ih_set_rptr +ffffffff81e4a000 t ih_v6_0_early_init +ffffffff81e4a050 t ih_v6_0_sw_init +ffffffff81e4a1b0 t ih_v6_0_sw_fini +ffffffff81e4a1f0 t ih_v6_0_hw_init +ffffffff81e4a7a0 t ih_v6_0_hw_fini +ffffffff81e4a800 t ih_v6_0_suspend +ffffffff81e4a860 t ih_v6_0_resume +ffffffff81e4a870 t ih_v6_0_is_idle +ffffffff81e4a8a0 t ih_v6_0_wait_for_idle +ffffffff81e4a8d0 t ih_v6_0_soft_reset +ffffffff81e4a900 t ih_v6_0_set_clockgating_state +ffffffff81e4aa20 t ih_v6_0_set_powergating_state +ffffffff81e4ab90 t ih_v6_0_get_clockgating_state +ffffffff81e4ac20 t ih_v6_0_get_wptr +ffffffff81e4ad10 t ih_v6_0_set_rptr +ffffffff81e4ade0 t ih_v6_0_self_irq +ffffffff81e4ae50 t ih_v6_0_toggle_interrupts +ffffffff81e4b030 t force_update_wptr_for_self_int +ffffffff81e4c000 t imu_v11_0_init_microcode +ffffffff81e4c1f0 t imu_v11_0_load_microcode +ffffffff81e4c550 t imu_v11_0_setup +ffffffff81e4c7d0 t imu_v11_0_start +ffffffff81e4c8c0 t imu_v11_0_program_rlc_ram +ffffffff81e4ca70 t imu_v11_0_wait_for_reset_status +ffffffff81e4cbc0 t program_imu_rlc_ram +ffffffff81e4d000 T imu_v11_0_3_program_rlc_ram +ffffffff81e4e000 T jpeg_v1_0_early_init +ffffffff81e4e060 T jpeg_v1_0_sw_init +ffffffff81e4e130 T jpeg_v1_0_sw_fini +ffffffff81e4e150 T jpeg_v1_0_start +ffffffff81e4ebc0 t jpeg_v1_0_decode_ring_get_rptr +ffffffff81e4ec50 t jpeg_v1_0_decode_ring_get_wptr +ffffffff81e4ece0 t jpeg_v1_0_decode_ring_set_wptr +ffffffff81e4ed50 t jpeg_v1_0_decode_ring_emit_ib +ffffffff81e4f660 t jpeg_v1_0_decode_ring_emit_fence +ffffffff81e4ffc0 t jpeg_v1_0_decode_ring_emit_vm_flush +ffffffff81e50030 t jpeg_v1_0_decode_ring_nop +ffffffff81e50190 t jpeg_v1_0_decode_ring_insert_start +ffffffff81e50360 t jpeg_v1_0_decode_ring_insert_end +ffffffff81e50530 t jpeg_v1_0_ring_begin_use +ffffffff81e50630 t jpeg_v1_0_decode_ring_emit_wreg +ffffffff81e50890 t jpeg_v1_0_decode_ring_emit_reg_wait +ffffffff81e50cb0 t jpeg_v1_0_set_interrupt_state +ffffffff81e50ce0 t jpeg_v1_0_process_interrupt +ffffffff81e51000 T jpeg_v2_0_dec_ring_insert_start +ffffffff81e511b0 T jpeg_v2_0_dec_ring_insert_end +ffffffff81e51360 T jpeg_v2_0_dec_ring_emit_fence +ffffffff81e51a50 T jpeg_v2_0_dec_ring_emit_ib +ffffffff81e52240 T jpeg_v2_0_dec_ring_emit_reg_wait +ffffffff81e52600 T jpeg_v2_0_dec_ring_emit_vm_flush +ffffffff81e52670 T jpeg_v2_0_dec_ring_emit_wreg +ffffffff81e528b0 T jpeg_v2_0_dec_ring_nop +ffffffff81e52a10 t jpeg_v2_0_early_init +ffffffff81e52a80 t jpeg_v2_0_sw_init +ffffffff81e52b90 t jpeg_v2_0_sw_fini +ffffffff81e52be0 t jpeg_v2_0_hw_init +ffffffff81e52c60 t jpeg_v2_0_hw_fini +ffffffff81e52d40 t jpeg_v2_0_suspend +ffffffff81e52d70 t jpeg_v2_0_resume +ffffffff81e52e00 t jpeg_v2_0_is_idle +ffffffff81e52e80 t jpeg_v2_0_wait_for_idle +ffffffff81e52f70 t jpeg_v2_0_set_clockgating_state +ffffffff81e53020 t jpeg_v2_0_set_powergating_state +ffffffff81e53820 t jpeg_v2_0_dec_ring_get_rptr +ffffffff81e538b0 t jpeg_v2_0_dec_ring_get_wptr +ffffffff81e53950 t jpeg_v2_0_dec_ring_set_wptr +ffffffff81e539f0 t jpeg_v2_0_set_interrupt_state +ffffffff81e53a20 t jpeg_v2_0_process_interrupt +ffffffff81e53ab0 t jpeg_v2_0_enable_clock_gating +ffffffff81e53c50 t jpeg_v2_0_disable_clock_gating +ffffffff81e54000 t jpeg_v2_6_query_ras_poison_status +ffffffff81e54140 t jpeg_v2_5_early_init +ffffffff81e54410 t jpeg_v2_5_sw_init +ffffffff81e54630 t jpeg_v2_5_sw_fini +ffffffff81e54680 t jpeg_v2_5_hw_init +ffffffff81e54770 t jpeg_v2_5_hw_fini +ffffffff81e548b0 t jpeg_v2_5_suspend +ffffffff81e548e0 t jpeg_v2_5_resume +ffffffff81e549e0 t jpeg_v2_5_is_idle +ffffffff81e54ae0 t jpeg_v2_5_wait_for_idle +ffffffff81e54c10 t jpeg_v2_5_set_clockgating_state +ffffffff81e54d80 t jpeg_v2_5_set_powergating_state +ffffffff81e55470 t jpeg_v2_5_dec_ring_get_rptr +ffffffff81e55510 t jpeg_v2_5_dec_ring_get_wptr +ffffffff81e555c0 t jpeg_v2_5_dec_ring_set_wptr +ffffffff81e55670 t jpeg_v2_6_dec_ring_insert_start +ffffffff81e55830 t jpeg_v2_6_dec_ring_insert_end +ffffffff81e559f0 t jpeg_v2_5_set_interrupt_state +ffffffff81e55a20 t jpeg_v2_5_process_interrupt +ffffffff81e55b00 t jpeg_v2_5_enable_clock_gating +ffffffff81e55bd0 t jpeg_v2_5_disable_clock_gating +ffffffff81e56000 t jpeg_v3_0_early_init +ffffffff81e560e0 t jpeg_v3_0_sw_init +ffffffff81e561f0 t jpeg_v3_0_sw_fini +ffffffff81e56240 t jpeg_v3_0_hw_init +ffffffff81e562c0 t jpeg_v3_0_hw_fini +ffffffff81e563a0 t jpeg_v3_0_suspend +ffffffff81e563d0 t jpeg_v3_0_resume +ffffffff81e56460 t jpeg_v3_0_is_idle +ffffffff81e564e0 t jpeg_v3_0_wait_for_idle +ffffffff81e565d0 t jpeg_v3_0_set_clockgating_state +ffffffff81e56680 t jpeg_v3_0_set_powergating_state +ffffffff81e56f30 t jpeg_v3_0_dec_ring_get_rptr +ffffffff81e56fc0 t jpeg_v3_0_dec_ring_get_wptr +ffffffff81e57060 t jpeg_v3_0_dec_ring_set_wptr +ffffffff81e57100 t jpeg_v3_0_set_interrupt_state +ffffffff81e57130 t jpeg_v3_0_process_interrupt +ffffffff81e571c0 t jpeg_v3_0_enable_clock_gating +ffffffff81e57290 t jpeg_v3_0_disable_clock_gating +ffffffff81e58000 t jpeg_v4_0_early_init +ffffffff81e58080 t jpeg_v4_0_sw_init +ffffffff81e58190 t jpeg_v4_0_sw_fini +ffffffff81e581e0 t jpeg_v4_0_hw_init +ffffffff81e58300 t jpeg_v4_0_hw_fini +ffffffff81e583e0 t jpeg_v4_0_suspend +ffffffff81e58410 t jpeg_v4_0_resume +ffffffff81e58460 t jpeg_v4_0_is_idle +ffffffff81e584e0 t jpeg_v4_0_wait_for_idle +ffffffff81e585d0 t jpeg_v4_0_set_clockgating_state +ffffffff81e58680 t jpeg_v4_0_set_powergating_state +ffffffff81e58e90 t jpeg_v4_0_dec_ring_get_rptr +ffffffff81e58f20 t jpeg_v4_0_dec_ring_get_wptr +ffffffff81e58fc0 t jpeg_v4_0_dec_ring_set_wptr +ffffffff81e59060 t jpeg_v4_0_set_interrupt_state +ffffffff81e59090 t jpeg_v4_0_process_interrupt +ffffffff81e59130 t jpeg_v4_0_enable_clock_gating +ffffffff81e592e0 t jpeg_v4_0_disable_clock_gating +ffffffff81e5a000 t lsdma_v6_0_copy_mem +ffffffff81e5a360 t lsdma_v6_0_fill_mem +ffffffff81e5a640 t lsdma_v6_0_update_memory_power_gating +ffffffff81e5b000 t mca_v3_0_mp0_query_ras_error_count +ffffffff81e5b020 t mca_v3_0_ras_block_match +ffffffff81e5b070 t mca_v3_0_mp1_query_ras_error_count +ffffffff81e5b090 t mca_v3_0_mpio_query_ras_error_count +ffffffff81e5b0b0 t mca_v3_0_init +ffffffff81e5c000 t mes_v10_0_late_init +ffffffff81e5c050 t mes_v10_1_sw_init +ffffffff81e5c660 t mes_v10_1_sw_fini +ffffffff81e5c7e0 t mes_v10_1_hw_init +ffffffff81e5d080 t mes_v10_1_hw_fini +ffffffff81e5d140 t mes_v10_1_suspend +ffffffff81e5d220 t mes_v10_1_resume +ffffffff81e5d270 t mes_v10_1_kiq_hw_init +ffffffff81e5d680 t mes_v10_1_add_hw_queue +ffffffff81e5d800 t mes_v10_1_remove_hw_queue +ffffffff81e5d890 t mes_v10_1_unmap_legacy_queue +ffffffff81e5d980 t mes_v10_1_suspend_gang +ffffffff81e5d9b0 t mes_v10_1_resume_gang +ffffffff81e5d9e0 t mes_v10_1_submit_pkt_and_poll_completion +ffffffff81e5dbe0 t mes_v10_1_load_microcode +ffffffff81e5e3d0 t mes_v10_1_enable +ffffffff81e5e840 t mes_v10_1_queue_init +ffffffff81e5eae0 t amdgpu_bo_unreserve +ffffffff81e5ebc0 t mes_v10_1_ring_get_rptr +ffffffff81e5ebf0 t mes_v10_1_ring_get_wptr +ffffffff81e5ec60 t mes_v10_1_ring_set_wptr +ffffffff81e5f000 t mes_v11_0_late_init +ffffffff81e5f070 t mes_v11_0_sw_init +ffffffff81e5f650 t mes_v11_0_sw_fini +ffffffff81e5f840 t mes_v11_0_hw_init +ffffffff81e60050 t mes_v11_0_hw_fini +ffffffff81e60080 t mes_v11_0_suspend +ffffffff81e60090 t mes_v11_0_resume +ffffffff81e600e0 t mes_v11_0_kiq_hw_init +ffffffff81e602e0 t mes_v11_0_kiq_hw_fini +ffffffff81e60720 t mes_v11_0_add_hw_queue +ffffffff81e60920 t mes_v11_0_remove_hw_queue +ffffffff81e609b0 t mes_v11_0_unmap_legacy_queue +ffffffff81e60ab0 t mes_v11_0_suspend_gang +ffffffff81e60ae0 t mes_v11_0_resume_gang +ffffffff81e60b10 t mes_v11_0_misc_op +ffffffff81e60c80 t mes_v11_0_submit_pkt_and_poll_completion +ffffffff81e60ea0 t mes_v11_0_load_microcode +ffffffff81e61600 t mes_v11_0_enable +ffffffff81e61af0 t mes_v11_0_queue_init +ffffffff81e62580 t amdgpu_bo_unreserve +ffffffff81e62660 t mes_v11_0_mqd_init +ffffffff81e62860 t mes_v11_0_ring_get_rptr +ffffffff81e62890 t mes_v11_0_ring_get_wptr +ffffffff81e62900 t mes_v11_0_ring_set_wptr +ffffffff81e63000 t mmhub_v1_0_query_ras_error_count +ffffffff81e63150 t mmhub_v1_0_reset_ras_error_count +ffffffff81e63200 t mmhub_v1_0_get_fb_location +ffffffff81e63310 t mmhub_v1_0_init +ffffffff81e633c0 t mmhub_v1_0_gart_enable +ffffffff81e646f0 t mmhub_v1_0_set_fault_enable_default +ffffffff81e64800 t mmhub_v1_0_gart_disable +ffffffff81e64a90 t mmhub_v1_0_set_clockgating +ffffffff81e64f10 t mmhub_v1_0_get_clockgating +ffffffff81e65030 t mmhub_v1_0_setup_vm_pt_regs +ffffffff81e65170 t mmhub_v1_0_update_power_gating +ffffffff81e66000 t mmhub_v1_7_query_ras_error_count +ffffffff81e66150 t mmhub_v1_7_query_ras_error_status +ffffffff81e66230 t mmhub_v1_7_reset_ras_error_count +ffffffff81e662d0 t mmhub_v1_7_reset_ras_error_status +ffffffff81e663c0 t mmhub_v1_7_get_fb_location +ffffffff81e664d0 t mmhub_v1_7_init +ffffffff81e66570 t mmhub_v1_7_gart_enable +ffffffff81e67a50 t mmhub_v1_7_set_fault_enable_default +ffffffff81e67b60 t mmhub_v1_7_gart_disable +ffffffff81e67df0 t mmhub_v1_7_set_clockgating +ffffffff81e68170 t mmhub_v1_7_get_clockgating +ffffffff81e68290 t mmhub_v1_7_setup_vm_pt_regs +ffffffff81e69000 t mmhub_v2_0_init +ffffffff81e690d0 t mmhub_v2_0_gart_enable +ffffffff81e6a250 t mmhub_v2_0_set_fault_enable_default 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xgpu_ai_mailbox_set_irq_funcs +ffffffff81e77050 T xgpu_ai_mailbox_add_irq_id +ffffffff81e770e0 T xgpu_ai_mailbox_get_irq +ffffffff81e77190 t xgpu_ai_mailbox_flr_work +ffffffff81e773a0 T xgpu_ai_mailbox_put_irq +ffffffff81e773e0 t xgpu_ai_request_full_gpu_access +ffffffff81e77400 t xgpu_ai_release_full_gpu_access +ffffffff81e77420 t xgpu_ai_request_init_data +ffffffff81e77480 t xgpu_ai_request_reset +ffffffff81e77530 t xgpu_ai_mailbox_trans_msg +ffffffff81e77760 t xgpu_ai_set_mailbox_ack_irq +ffffffff81e777f0 t xgpu_ai_mailbox_ack_irq +ffffffff81e77840 t xgpu_ai_set_mailbox_rcv_irq +ffffffff81e778d0 t xgpu_ai_mailbox_rcv_irq +ffffffff81e779b0 t xgpu_ai_send_access_requests +ffffffff81e77aa0 t xgpu_ai_poll_msg +ffffffff81e78000 T xgpu_nv_mailbox_set_irq_funcs +ffffffff81e78050 T xgpu_nv_mailbox_add_irq_id +ffffffff81e780e0 T xgpu_nv_mailbox_get_irq +ffffffff81e78190 t xgpu_nv_mailbox_flr_work +ffffffff81e783b0 T xgpu_nv_mailbox_put_irq +ffffffff81e783f0 t xgpu_nv_request_full_gpu_access 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t nbio_v2_3_get_hdp_flush_done_offset +ffffffff81e7c080 t nbio_v2_3_get_pcie_index_offset +ffffffff81e7c0c0 t nbio_v2_3_get_pcie_data_offset +ffffffff81e7c100 t nbio_v2_3_get_rev_id +ffffffff81e7c160 t nbio_v2_3_mc_access_enable +ffffffff81e7c210 t nbio_v2_3_get_memsize +ffffffff81e7c280 t nbio_v2_3_sdma_doorbell_range +ffffffff81e7c320 t nbio_v2_3_vcn_doorbell_range +ffffffff81e7c3a0 t nbio_v2_3_enable_doorbell_aperture +ffffffff81e7c490 t nbio_v2_3_enable_doorbell_selfring_aperture +ffffffff81e7c5f0 t nbio_v2_3_ih_doorbell_range +ffffffff81e7c700 t nbio_v2_3_update_medium_grain_clock_gating +ffffffff81e7c7a0 t nbio_v2_3_update_medium_grain_light_sleep +ffffffff81e7c840 t nbio_v2_3_get_clockgating_state +ffffffff81e7c8c0 t nbio_v2_3_ih_control +ffffffff81e7ca10 t nbio_v2_3_init_registers +ffffffff81e7caa0 t nbio_v2_3_remap_hdp_registers +ffffffff81e7cbb0 t nbio_v2_3_enable_aspm +ffffffff81e7cc50 t nbio_v2_3_program_aspm +ffffffff81e7d2e0 t nbio_v2_3_apply_lc_spc_mode_wa +ffffffff81e7d370 t nbio_v2_3_apply_l1_link_width_reconfig_wa +ffffffff81e7d3e0 t nbio_v2_3_clear_doorbell_interrupt +ffffffff81e7e000 t nbio_v4_3_get_hdp_flush_req_offset +ffffffff81e7e040 t nbio_v4_3_get_hdp_flush_done_offset +ffffffff81e7e080 t nbio_v4_3_get_pcie_index_offset +ffffffff81e7e0b0 t nbio_v4_3_get_pcie_data_offset +ffffffff81e7e0f0 t nbio_v4_3_get_rev_id +ffffffff81e7e170 t nbio_v4_3_mc_access_enable +ffffffff81e7e220 t nbio_v4_3_get_memsize +ffffffff81e7e290 t nbio_v4_3_sdma_doorbell_range +ffffffff81e7e400 t nbio_v4_3_vcn_doorbell_range +ffffffff81e7e5b0 t nbio_v4_3_gc_doorbell_init +ffffffff81e7e6a0 t nbio_v4_3_enable_doorbell_aperture +ffffffff81e7e790 t nbio_v4_3_enable_doorbell_selfring_aperture +ffffffff81e7e8f0 t nbio_v4_3_ih_doorbell_range +ffffffff81e7ea10 t nbio_v4_3_update_medium_grain_clock_gating +ffffffff81e7eb50 t nbio_v4_3_update_medium_grain_light_sleep +ffffffff81e7ec80 t nbio_v4_3_get_clockgating_state +ffffffff81e7ed90 t nbio_v4_3_ih_control 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+ffffffff81e84b00 t nbio_v7_4_process_err_event_athub_irq +ffffffff81e85000 t nbio_v7_7_get_hdp_flush_req_offset +ffffffff81e85040 t nbio_v7_7_get_hdp_flush_done_offset +ffffffff81e85080 t nbio_v7_7_get_pcie_index_offset +ffffffff81e850c0 t nbio_v7_7_get_pcie_data_offset +ffffffff81e85100 t nbio_v7_7_get_pcie_port_index_offset +ffffffff81e85130 t nbio_v7_7_get_pcie_port_data_offset +ffffffff81e85170 t nbio_v7_7_get_rev_id +ffffffff81e851f0 t nbio_v7_7_mc_access_enable +ffffffff81e852a0 t nbio_v7_7_get_memsize +ffffffff81e85310 t nbio_v7_7_sdma_doorbell_range +ffffffff81e853a0 t nbio_v7_7_vcn_doorbell_range +ffffffff81e85420 t nbio_v7_7_enable_doorbell_aperture +ffffffff81e85500 t nbio_v7_7_enable_doorbell_selfring_aperture +ffffffff81e85660 t nbio_v7_7_ih_doorbell_range +ffffffff81e85770 t nbio_v7_7_update_medium_grain_clock_gating +ffffffff81e858b0 t nbio_v7_7_update_medium_grain_light_sleep +ffffffff81e85ac0 t nbio_v7_7_get_clockgating_state +ffffffff81e85bd0 t nbio_v7_7_ih_control +ffffffff81e85d20 t nbio_v7_7_init_registers +ffffffff81e85e20 t nbio_v7_7_remap_hdp_registers +ffffffff81e86000 T nv_grbm_select +ffffffff81e860a0 T nv_set_virt_ops +ffffffff81e860e0 t nv_common_early_init +ffffffff81e864d0 t nv_common_late_init +ffffffff81e86540 t nv_common_sw_init +ffffffff81e86580 t nv_common_sw_fini +ffffffff81e865b0 t nv_common_hw_init +ffffffff81e866c0 t nv_common_hw_fini +ffffffff81e86720 t nv_common_suspend +ffffffff81e86780 t nv_common_resume +ffffffff81e867c0 t nv_common_is_idle +ffffffff81e867f0 t nv_common_wait_for_idle +ffffffff81e86820 t nv_common_soft_reset +ffffffff81e86850 t nv_common_set_clockgating_state +ffffffff81e86920 t nv_common_set_powergating_state +ffffffff81e86950 t nv_common_get_clockgating_state +ffffffff81e869c0 t nv_pcie_rreg +ffffffff81e86a20 t nv_pcie_wreg +ffffffff81e86a80 t nv_pcie_rreg64 +ffffffff81e86ae0 t nv_pcie_wreg64 +ffffffff81e86b40 t nv_didt_rreg +ffffffff81e86be0 t nv_didt_wreg +ffffffff81e86c60 t nv_read_disabled_bios +ffffffff81e86c90 t nv_read_register +ffffffff81e86d70 t nv_vga_set_state +ffffffff81e86da0 t nv_asic_reset +ffffffff81e86ee0 t nv_asic_reset_method +ffffffff81e86fd0 t nv_get_xclk +ffffffff81e87000 t nv_set_uvd_clocks +ffffffff81e87030 t nv_set_vce_clocks +ffffffff81e87060 t nv_get_config_memsize +ffffffff81e87080 t nv_need_full_reset +ffffffff81e870b0 t nv_init_doorbell_index +ffffffff81e871e0 t nv_need_reset_on_init +ffffffff81e87270 t nv_get_pcie_replay_count +ffffffff81e872a0 t nv_pre_asic_init +ffffffff81e872d0 t nv_update_umd_stable_pstate +ffffffff81e87390 t nv_query_video_codecs +ffffffff81e88000 T psp_v10_0_set_psp_funcs +ffffffff81e88030 t psp_v10_0_init_microcode +ffffffff81e882a0 t psp_v10_0_ring_init +ffffffff81e88320 t psp_v10_0_ring_create +ffffffff81e88630 t psp_v10_0_ring_stop +ffffffff81e88820 t psp_v10_0_ring_destroy +ffffffff81e888a0 t psp_v10_0_mode1_reset +ffffffff81e888f0 t psp_v10_0_ring_get_wptr +ffffffff81e88950 t psp_v10_0_ring_set_wptr +ffffffff81e89000 T psp_v11_0_set_psp_funcs +ffffffff81e89030 t psp_v11_0_init_microcode +ffffffff81e89450 t psp_v11_0_bootloader_load_kdb +ffffffff81e89470 t psp_v11_0_bootloader_load_spl +ffffffff81e89490 t psp_v11_0_bootloader_load_sysdrv +ffffffff81e894b0 t psp_v11_0_bootloader_load_sos +ffffffff81e89800 t psp_v11_0_ring_init +ffffffff81e89880 t psp_v11_0_ring_create +ffffffff81e89f10 t psp_v11_0_ring_stop +ffffffff81e8a130 t psp_v11_0_ring_destroy +ffffffff81e8a1b0 t psp_v11_0_mode1_reset +ffffffff81e8a2b0 t psp_v11_0_memory_training +ffffffff81e8a730 t psp_v11_0_ring_get_wptr +ffffffff81e8a780 t psp_v11_0_ring_set_wptr +ffffffff81e8a8c0 t psp_v11_0_load_usbc_pd_fw +ffffffff81e8aab0 t psp_v11_0_read_usbc_pd_fw +ffffffff81e8abd0 t psp_v11_0_bootloader_load_component +ffffffff81e8ad90 t psp_v11_0_wait_for_bootloader +ffffffff81e8af60 t psp_v11_0_memory_training_send_msg +ffffffff81e8c000 T psp_v11_0_8_set_psp_funcs +ffffffff81e8c030 t psp_v11_0_8_ring_init +ffffffff81e8c0b0 t psp_v11_0_8_ring_create +ffffffff81e8c740 t psp_v11_0_8_ring_stop +ffffffff81e8cad0 t psp_v11_0_8_ring_destroy +ffffffff81e8cb50 t psp_v11_0_8_ring_get_wptr +ffffffff81e8cbc0 t psp_v11_0_8_ring_set_wptr +ffffffff81e8d000 T psp_v12_0_set_psp_funcs +ffffffff81e8d030 t psp_v12_0_init_microcode +ffffffff81e8d2a0 t psp_v12_0_bootloader_load_sysdrv +ffffffff81e8d5c0 t psp_v12_0_bootloader_load_sos +ffffffff81e8d920 t psp_v12_0_ring_init +ffffffff81e8df00 t psp_v12_0_ring_create +ffffffff81e8e460 t psp_v12_0_ring_stop +ffffffff81e8e680 t psp_v12_0_ring_destroy +ffffffff81e8e700 t psp_v12_0_mode1_reset +ffffffff81e8e800 t psp_v12_0_ring_get_wptr +ffffffff81e8e870 t psp_v12_0_ring_set_wptr +ffffffff81e8f000 T psp_v13_0_set_psp_funcs +ffffffff81e8f030 t psp_v13_0_init_microcode +ffffffff81e8f160 t psp_v13_0_bootloader_load_kdb +ffffffff81e8f180 t psp_v13_0_bootloader_load_spl +ffffffff81e8f1a0 t psp_v13_0_bootloader_load_sysdrv +ffffffff81e8f1c0 t psp_v13_0_bootloader_load_soc_drv +ffffffff81e8f1e0 t psp_v13_0_bootloader_load_intf_drv +ffffffff81e8f200 t psp_v13_0_bootloader_load_dbg_drv +ffffffff81e8f220 t psp_v13_0_bootloader_load_ras_drv +ffffffff81e8f240 t psp_v13_0_bootloader_load_sos +ffffffff81e8f5a0 t psp_v13_0_ring_init +ffffffff81e8f620 t psp_v13_0_ring_create +ffffffff81e8fcb0 t psp_v13_0_ring_stop +ffffffff81e90040 t psp_v13_0_ring_destroy +ffffffff81e900c0 t psp_v13_0_memory_training +ffffffff81e90500 t psp_v13_0_ring_get_wptr +ffffffff81e90570 t psp_v13_0_ring_set_wptr +ffffffff81e90670 t psp_v13_0_load_usbc_pd_fw +ffffffff81e90860 t psp_v13_0_read_usbc_pd_fw +ffffffff81e90980 t psp_v13_0_update_spirom +ffffffff81e90b60 t psp_v13_0_vbflash_status +ffffffff81e90bc0 t psp_v13_0_bootloader_load_component +ffffffff81e90d90 t psp_v13_0_wait_for_bootloader +ffffffff81e90f60 t psp_v13_0_memory_training_send_msg +ffffffff81e910c0 t psp_v13_0_exec_spi_cmd +ffffffff81e92000 T psp_v13_0_4_set_psp_funcs +ffffffff81e92030 t psp_v13_0_4_init_microcode +ffffffff81e92100 t psp_v13_0_4_bootloader_load_kdb +ffffffff81e92120 t psp_v13_0_4_bootloader_load_spl +ffffffff81e92140 t psp_v13_0_4_bootloader_load_sysdrv +ffffffff81e92160 t psp_v13_0_4_bootloader_load_soc_drv +ffffffff81e92180 t psp_v13_0_4_bootloader_load_intf_drv +ffffffff81e921a0 t psp_v13_0_4_bootloader_load_dbg_drv +ffffffff81e921c0 t psp_v13_0_4_bootloader_load_sos +ffffffff81e92530 t psp_v13_0_4_ring_init +ffffffff81e925b0 t psp_v13_0_4_ring_create +ffffffff81e92c50 t psp_v13_0_4_ring_stop +ffffffff81e92fe0 t psp_v13_0_4_ring_destroy +ffffffff81e93060 t psp_v13_0_4_ring_get_wptr +ffffffff81e930d0 t psp_v13_0_4_ring_set_wptr +ffffffff81e931d0 t psp_v13_0_4_bootloader_load_component +ffffffff81e933a0 t psp_v13_0_4_wait_for_bootloader +ffffffff81e94000 T psp_v3_1_set_psp_funcs +ffffffff81e94030 t psp_v3_1_init_microcode +ffffffff81e940f0 t psp_v3_1_bootloader_load_sysdrv +ffffffff81e94410 t psp_v3_1_bootloader_load_sos +ffffffff81e94770 t psp_v3_1_ring_init +ffffffff81e947f0 t psp_v3_1_ring_create +ffffffff81e952f0 t psp_v3_1_ring_stop +ffffffff81e95510 t psp_v3_1_ring_destroy +ffffffff81e95590 t psp_v3_1_smu_reload_quirk +ffffffff81e955e0 t psp_v3_1_mode1_reset +ffffffff81e956e0 t psp_v3_1_ring_get_wptr +ffffffff81e95730 t psp_v3_1_ring_set_wptr +ffffffff81e96000 t sdma_v2_4_early_init +ffffffff81e960e0 t sdma_v2_4_sw_init +ffffffff81e96470 t sdma_v2_4_sw_fini +ffffffff81e96550 t sdma_v2_4_hw_init +ffffffff81e96910 t sdma_v2_4_hw_fini +ffffffff81e96950 t sdma_v2_4_suspend +ffffffff81e96990 t sdma_v2_4_resume +ffffffff81e969a0 t sdma_v2_4_is_idle +ffffffff81e969e0 t sdma_v2_4_wait_for_idle +ffffffff81e96a80 t sdma_v2_4_soft_reset +ffffffff81e96bc0 t sdma_v2_4_set_clockgating_state +ffffffff81e96bf0 t sdma_v2_4_set_powergating_state +ffffffff81e96c20 t sdma_v2_4_ring_get_rptr +ffffffff81e96c60 t sdma_v2_4_ring_get_wptr +ffffffff81e96cc0 t sdma_v2_4_ring_set_wptr +ffffffff81e96d00 t sdma_v2_4_ring_emit_ib +ffffffff81e96fb0 t sdma_v2_4_ring_emit_fence +ffffffff81e973b0 t sdma_v2_4_ring_emit_pipeline_sync +ffffffff81e97630 t sdma_v2_4_ring_emit_vm_flush +ffffffff81e978b0 t sdma_v2_4_ring_emit_hdp_flush +ffffffff81e97b30 t sdma_v2_4_ring_test_ring +ffffffff81e97e10 t sdma_v2_4_ring_test_ib +ffffffff81e97ff0 t sdma_v2_4_ring_insert_nop +ffffffff81e98120 t sdma_v2_4_ring_pad_ib +ffffffff81e98250 t sdma_v2_4_ring_emit_wreg +ffffffff81e983a0 t sdma_v2_4_emit_copy_buffer +ffffffff81e98460 t sdma_v2_4_emit_fill_buffer +ffffffff81e984f0 t sdma_v2_4_vm_copy_pte +ffffffff81e985b0 t sdma_v2_4_vm_write_pte +ffffffff81e98680 t sdma_v2_4_vm_set_pte_pde +ffffffff81e98780 t sdma_v2_4_set_trap_irq_state +ffffffff81e98840 t sdma_v2_4_process_trap_irq +ffffffff81e988e0 t sdma_v2_4_process_illegal_inst_irq +ffffffff81e98960 t sdma_v2_4_enable +ffffffff81e99000 t sdma_v3_0_early_init +ffffffff81e99150 t sdma_v3_0_sw_init +ffffffff81e99500 t sdma_v3_0_sw_fini +ffffffff81e995e0 t sdma_v3_0_hw_init +ffffffff81e99710 t sdma_v3_0_hw_fini +ffffffff81e99760 t sdma_v3_0_suspend +ffffffff81e997b0 t sdma_v3_0_resume +ffffffff81e997c0 t sdma_v3_0_is_idle +ffffffff81e99800 t sdma_v3_0_wait_for_idle +ffffffff81e998a0 t sdma_v3_0_check_soft_reset +ffffffff81e99900 t sdma_v3_0_pre_soft_reset +ffffffff81e99950 t sdma_v3_0_soft_reset +ffffffff81e99a20 t sdma_v3_0_post_soft_reset +ffffffff81e99a70 t sdma_v3_0_set_clockgating_state +ffffffff81e99cd0 t sdma_v3_0_set_powergating_state +ffffffff81e99d00 t sdma_v3_0_get_clockgating_state +ffffffff81e99d80 t sdma_v3_0_ring_get_rptr +ffffffff81e99dc0 t sdma_v3_0_ring_get_wptr +ffffffff81e99e40 t sdma_v3_0_ring_set_wptr +ffffffff81e99ef0 t sdma_v3_0_ring_emit_ib +ffffffff81e9a1a0 t sdma_v3_0_ring_emit_fence +ffffffff81e9a5a0 t sdma_v3_0_ring_emit_pipeline_sync +ffffffff81e9a820 t sdma_v3_0_ring_emit_vm_flush +ffffffff81e9aaa0 t sdma_v3_0_ring_emit_hdp_flush +ffffffff81e9ad20 t sdma_v3_0_ring_test_ring +ffffffff81e9b000 t sdma_v3_0_ring_test_ib +ffffffff81e9b1e0 t sdma_v3_0_ring_insert_nop +ffffffff81e9b310 t sdma_v3_0_ring_pad_ib +ffffffff81e9b440 t sdma_v3_0_ring_emit_wreg +ffffffff81e9b590 t sdma_v3_0_emit_copy_buffer +ffffffff81e9b650 t sdma_v3_0_emit_fill_buffer +ffffffff81e9b6e0 t sdma_v3_0_vm_copy_pte +ffffffff81e9b7a0 t sdma_v3_0_vm_write_pte +ffffffff81e9b870 t sdma_v3_0_vm_set_pte_pde +ffffffff81e9b970 t sdma_v3_0_set_trap_irq_state +ffffffff81e9ba30 t sdma_v3_0_process_trap_irq +ffffffff81e9bad0 t sdma_v3_0_process_illegal_inst_irq +ffffffff81e9bb50 t sdma_v3_0_ctx_switch_enable +ffffffff81e9bce0 t sdma_v3_0_enable +ffffffff81e9be50 t sdma_v3_0_gfx_resume +ffffffff81e9d000 t sdma_v4_0_early_init +ffffffff81e9d580 t sdma_v4_0_late_init +ffffffff81e9d820 t sdma_v4_0_sw_init +ffffffff81e9dba0 t sdma_v4_0_sw_fini +ffffffff81e9dc60 t sdma_v4_0_hw_init +ffffffff81ea0c00 t sdma_v4_0_hw_fini +ffffffff81ea0cb0 t sdma_v4_0_suspend +ffffffff81ea0d00 t sdma_v4_0_resume +ffffffff81ea0d80 t sdma_v4_0_is_idle +ffffffff81ea0eb0 t sdma_v4_0_wait_for_idle +ffffffff81ea1050 t sdma_v4_0_soft_reset +ffffffff81ea1080 t sdma_v4_0_set_clockgating_state +ffffffff81ea1580 t sdma_v4_0_set_powergating_state +ffffffff81ea1640 t sdma_v4_0_get_clockgating_state +ffffffff81ea16e0 t sdma_v4_0_query_ras_error_count +ffffffff81ea18b0 t sdma_v4_0_reset_ras_error_count +ffffffff81ea1a00 t sdma_v4_0_ring_get_rptr +ffffffff81ea1a60 t sdma_v4_0_ring_get_wptr +ffffffff81ea1c50 t sdma_v4_0_ring_set_wptr +ffffffff81ea1ed0 t sdma_v4_0_ring_emit_ib +ffffffff81ea2180 t sdma_v4_0_ring_emit_fence +ffffffff81ea25b0 t sdma_v4_0_ring_emit_pipeline_sync +ffffffff81ea2610 t sdma_v4_0_ring_emit_vm_flush +ffffffff81ea2630 t sdma_v4_0_ring_emit_hdp_flush +ffffffff81ea26d0 t sdma_v4_0_ring_test_ring +ffffffff81ea29b0 t sdma_v4_0_ring_test_ib +ffffffff81ea2b90 t sdma_v4_0_ring_insert_nop +ffffffff81ea2cc0 t sdma_v4_0_ring_pad_ib +ffffffff81ea2df0 t sdma_v4_0_ring_emit_wreg +ffffffff81ea2f40 t sdma_v4_0_ring_emit_reg_wait +ffffffff81ea2f90 t sdma_v4_0_wait_reg_mem +ffffffff81ea32c0 t sdma_v4_0_page_ring_get_wptr +ffffffff81ea3470 t sdma_v4_0_page_ring_set_wptr +ffffffff81ea3630 t sdma_v4_0_emit_copy_buffer +ffffffff81ea36f0 t sdma_v4_0_emit_fill_buffer +ffffffff81ea3780 t sdma_v4_0_vm_copy_pte +ffffffff81ea3840 t sdma_v4_0_vm_write_pte +ffffffff81ea3910 t sdma_v4_0_vm_set_pte_pde +ffffffff81ea3a10 t sdma_v4_0_set_trap_irq_state +ffffffff81ea3bb0 t sdma_v4_0_process_trap_irq +ffffffff81ea3cf0 t sdma_v4_0_process_illegal_inst_irq +ffffffff81ea3e10 t sdma_v4_0_set_ecc_irq_state +ffffffff81ea3fb0 t sdma_v4_0_process_vm_hole_irq +ffffffff81ea40f0 t sdma_v4_0_process_doorbell_invalid_irq +ffffffff81ea4230 t sdma_v4_0_process_pool_timeout_irq +ffffffff81ea4370 t sdma_v4_0_process_srbm_write_irq +ffffffff81ea44b0 t sdma_v4_0_process_ras_data_cb +ffffffff81ea4530 t sdma_v4_0_ctx_switch_enable +ffffffff81ea4be0 t sdma_v4_0_enable +ffffffff81ea5180 t sdma_v4_0_gfx_enable +ffffffff81ea6000 t sdma_v4_4_query_ras_error_count +ffffffff81ea6270 t sdma_v4_4_reset_ras_error_count +ffffffff81ea7000 t sdma_v5_0_early_init +ffffffff81ea7170 t sdma_v5_0_sw_init +ffffffff81ea7410 t sdma_v5_0_sw_fini +ffffffff81ea74a0 t sdma_v5_0_hw_init +ffffffff81ea8750 t sdma_v5_0_hw_fini +ffffffff81ea87b0 t sdma_v5_0_suspend +ffffffff81ea8810 t sdma_v5_0_resume +ffffffff81ea8820 t sdma_v5_0_is_idle +ffffffff81ea88b0 t sdma_v5_0_wait_for_idle +ffffffff81ea8970 t sdma_v5_0_soft_reset +ffffffff81ea89a0 t sdma_v5_0_set_clockgating_state +ffffffff81ea8ba0 t sdma_v5_0_set_powergating_state +ffffffff81ea8bd0 t sdma_v5_0_get_clockgating_state +ffffffff81ea8c70 t sdma_v5_0_ring_get_rptr +ffffffff81ea8cd0 t sdma_v5_0_ring_get_wptr +ffffffff81ea8e70 t sdma_v5_0_ring_set_wptr +ffffffff81ea91d0 t sdma_v5_0_ring_emit_ib +ffffffff81ea9490 t sdma_v5_0_ring_emit_fence +ffffffff81ea9900 t sdma_v5_0_ring_emit_pipeline_sync +ffffffff81ea9b80 t sdma_v5_0_ring_emit_vm_flush +ffffffff81ea9ba0 t sdma_v5_0_ring_emit_hdp_flush +ffffffff81ea9e40 t sdma_v5_0_ring_test_ring +ffffffff81eaa210 t sdma_v5_0_ring_test_ib +ffffffff81eaa540 t sdma_v5_0_ring_insert_nop +ffffffff81eaa670 t sdma_v5_0_ring_pad_ib +ffffffff81eaa7a0 t sdma_v5_0_ring_init_cond_exec +ffffffff81eaa9d0 t sdma_v5_0_ring_patch_cond_exec +ffffffff81eaaa90 t sdma_v5_0_ring_emit_wreg +ffffffff81eaabe0 t sdma_v5_0_ring_emit_reg_wait +ffffffff81eaae60 t sdma_v5_0_ring_emit_reg_write_reg_wait +ffffffff81eaaee0 t sdma_v5_0_ring_preempt_ib +ffffffff81eab020 t sdma_v5_0_ring_emit_mem_sync +ffffffff81eab230 t sdma_v5_0_emit_copy_buffer +ffffffff81eab2f0 t sdma_v5_0_emit_fill_buffer +ffffffff81eab380 t sdma_v5_0_vm_copy_pte +ffffffff81eab440 t sdma_v5_0_vm_write_pte +ffffffff81eab510 t sdma_v5_0_vm_set_pte_pde +ffffffff81eab610 t sdma_v5_0_set_trap_irq_state +ffffffff81eab6a0 t sdma_v5_0_process_trap_irq +ffffffff81eab7b0 t sdma_v5_0_process_illegal_inst_irq +ffffffff81eab7e0 t sdma_v5_0_mqd_init +ffffffff81eab8c0 t sdma_v5_0_ctx_switch_enable +ffffffff81eabbc0 t sdma_v5_0_enable +ffffffff81eac000 t sdma_v5_2_early_init +ffffffff81eac170 t sdma_v5_2_sw_init +ffffffff81eac3a0 t sdma_v5_2_sw_fini +ffffffff81eac430 t sdma_v5_2_hw_init +ffffffff81eac770 t sdma_v5_2_hw_fini +ffffffff81eac7d0 t sdma_v5_2_suspend +ffffffff81eac830 t sdma_v5_2_resume +ffffffff81eac840 t sdma_v5_2_is_idle +ffffffff81eac900 t sdma_v5_2_wait_for_idle +ffffffff81eaca00 t sdma_v5_2_soft_reset +ffffffff81eacca0 t sdma_v5_2_set_clockgating_state +ffffffff81eacfc0 t sdma_v5_2_set_powergating_state +ffffffff81eacff0 t sdma_v5_2_get_clockgating_state +ffffffff81ead080 t sdma_v5_2_ring_get_rptr +ffffffff81ead0e0 t sdma_v5_2_ring_get_wptr +ffffffff81ead220 t sdma_v5_2_ring_set_wptr +ffffffff81ead3e0 t sdma_v5_2_ring_emit_ib +ffffffff81ead6a0 t sdma_v5_2_ring_emit_fence +ffffffff81eadb10 t sdma_v5_2_ring_emit_pipeline_sync +ffffffff81eadd90 t sdma_v5_2_ring_emit_vm_flush +ffffffff81eaddb0 t sdma_v5_2_ring_emit_hdp_flush +ffffffff81eae050 t sdma_v5_2_ring_test_ring +ffffffff81eae420 t sdma_v5_2_ring_test_ib +ffffffff81eae750 t sdma_v5_2_ring_insert_nop +ffffffff81eae880 t sdma_v5_2_ring_pad_ib +ffffffff81eae9b0 t sdma_v5_2_ring_init_cond_exec +ffffffff81eaebe0 t sdma_v5_2_ring_patch_cond_exec +ffffffff81eaeca0 t sdma_v5_2_ring_emit_wreg +ffffffff81eaedf0 t sdma_v5_2_ring_emit_reg_wait +ffffffff81eaf070 t sdma_v5_2_ring_emit_reg_write_reg_wait +ffffffff81eaf0f0 t sdma_v5_2_ring_preempt_ib +ffffffff81eaf260 t sdma_v5_2_ring_emit_mem_sync +ffffffff81eaf470 t sdma_v5_2_emit_copy_buffer +ffffffff81eaf530 t sdma_v5_2_emit_fill_buffer +ffffffff81eaf5c0 t sdma_v5_2_vm_copy_pte +ffffffff81eaf680 t sdma_v5_2_vm_write_pte +ffffffff81eaf750 t sdma_v5_2_vm_set_pte_pde +ffffffff81eaf850 t sdma_v5_2_set_trap_irq_state +ffffffff81eaf910 t sdma_v5_2_process_trap_irq +ffffffff81eafa50 t sdma_v5_2_process_illegal_inst_irq +ffffffff81eafa80 t sdma_v5_2_mqd_init +ffffffff81eafb60 t sdma_v5_2_ctx_switch_enable +ffffffff81eaff60 t sdma_v5_2_enable +ffffffff81eb0370 t sdma_v5_2_gfx_resume +ffffffff81eb2000 t sdma_v6_0_early_init +ffffffff81eb2140 t sdma_v6_0_sw_init +ffffffff81eb2320 t sdma_v6_0_sw_fini +ffffffff81eb23b0 t sdma_v6_0_hw_init +ffffffff81eb23c0 t sdma_v6_0_hw_fini +ffffffff81eb2410 t sdma_v6_0_suspend +ffffffff81eb2460 t sdma_v6_0_resume +ffffffff81eb2470 t sdma_v6_0_is_idle +ffffffff81eb2500 t sdma_v6_0_wait_for_idle +ffffffff81eb25c0 t sdma_v6_0_check_soft_reset +ffffffff81eb2680 t sdma_v6_0_soft_reset +ffffffff81eb2b20 t sdma_v6_0_set_clockgating_state +ffffffff81eb2b50 t sdma_v6_0_set_powergating_state +ffffffff81eb2b80 t sdma_v6_0_get_clockgating_state +ffffffff81eb2bb0 t sdma_v6_0_ring_get_rptr +ffffffff81eb2c10 t sdma_v6_0_ring_get_wptr +ffffffff81eb2c80 t sdma_v6_0_ring_set_wptr +ffffffff81eb2fe0 t sdma_v6_0_ring_emit_ib +ffffffff81eb32a0 t sdma_v6_0_ring_emit_fence +ffffffff81eb3710 t sdma_v6_0_ring_emit_pipeline_sync +ffffffff81eb3990 t sdma_v6_0_ring_emit_vm_flush +ffffffff81eb39b0 t sdma_v6_0_ring_emit_hdp_flush +ffffffff81eb3c50 t sdma_v6_0_ring_test_ring +ffffffff81eb4020 t sdma_v6_0_ring_test_ib +ffffffff81eb4350 t sdma_v6_0_ring_insert_nop +ffffffff81eb4480 t sdma_v6_0_ring_pad_ib +ffffffff81eb45b0 t sdma_v6_0_ring_init_cond_exec +ffffffff81eb47e0 t sdma_v6_0_ring_patch_cond_exec +ffffffff81eb48a0 t sdma_v6_0_ring_emit_wreg +ffffffff81eb49f0 t sdma_v6_0_ring_emit_reg_wait +ffffffff81eb4c70 t sdma_v6_0_ring_emit_reg_write_reg_wait +ffffffff81eb4cf0 t sdma_v6_0_ring_preempt_ib +ffffffff81eb4e40 t sdma_v6_0_ring_emit_mem_sync +ffffffff81eb5050 t sdma_v6_0_emit_copy_buffer +ffffffff81eb5110 t sdma_v6_0_emit_fill_buffer +ffffffff81eb51a0 t sdma_v6_0_vm_copy_pte +ffffffff81eb5260 t sdma_v6_0_vm_write_pte +ffffffff81eb5330 t sdma_v6_0_vm_set_pte_pde +ffffffff81eb5430 t sdma_v6_0_set_trap_irq_state +ffffffff81eb54c0 t sdma_v6_0_process_trap_irq +ffffffff81eb55f0 t sdma_v6_0_process_illegal_inst_irq +ffffffff81eb5620 t sdma_v6_0_mqd_init +ffffffff81eb5740 t sdma_v6_0_start +ffffffff81eb59c0 t sdma_v6_0_enable +ffffffff81eb5b40 t sdma_v6_0_gfx_resume +ffffffff81eb6bc0 t sdma_v6_0_gfx_stop +ffffffff81eb7000 T sienna_cichlid_reset_init +ffffffff81eb70c0 t sienna_cichlid_async_reset +ffffffff81eb7120 t sienna_cichlid_get_reset_handler +ffffffff81eb7180 T sienna_cichlid_reset_fini +ffffffff81eb71e0 t sienna_cichlid_mode2_prepare_hwcontext +ffffffff81eb7330 t sienna_cichlid_mode2_perform_reset +ffffffff81eb73b0 t sienna_cichlid_mode2_restore_hwcontext +ffffffff81eb76b0 t sienna_cichlid_mode2_reset +ffffffff81eb8000 T smu_v11_0_i2c_control_init +ffffffff81eb80d0 T smu_v11_0_i2c_control_fini +ffffffff81eb8110 t smu_v11_0_i2c_xfer +ffffffff81eb91f0 t smu_v11_0_i2c_func +ffffffff81eb9220 t smu_v11_0_i2c_enable +ffffffff81eb9360 t smu_v11_0_i2c_abort +ffffffff81eb9460 t lock_bus +ffffffff81eb9500 t trylock_bus +ffffffff81eb9550 t unlock_bus +ffffffff81eba000 t smuio_v11_0_get_rom_index_offset +ffffffff81eba040 t smuio_v11_0_get_rom_data_offset +ffffffff81eba080 t smuio_v11_0_update_rom_clock_gating +ffffffff81eba1c0 t smuio_v11_0_get_clock_gating_state +ffffffff81ebb000 t smuio_v11_0_6_get_rom_index_offset +ffffffff81ebb040 t smuio_v11_0_6_get_rom_data_offset +ffffffff81ebb080 t smuio_v11_0_6_update_rom_clock_gating +ffffffff81ebb1c0 t smuio_v11_0_6_get_clock_gating_state +ffffffff81ebc000 t smuio_v13_0_get_rom_index_offset +ffffffff81ebc040 t smuio_v13_0_get_rom_data_offset +ffffffff81ebc080 t smuio_v13_0_update_rom_clock_gating +ffffffff81ebc1c0 t smuio_v13_0_get_clock_gating_state +ffffffff81ebc260 t smuio_v13_0_get_die_id +ffffffff81ebc2e0 t smuio_v13_0_get_socket_id +ffffffff81ebc360 t smuio_v13_0_is_host_gpu_xgmi_supported +ffffffff81ebd000 t smuio_v13_0_6_get_rom_index_offset +ffffffff81ebd040 t smuio_v13_0_6_get_rom_data_offset +ffffffff81ebe000 t smuio_v9_0_get_rom_index_offset +ffffffff81ebe040 t smuio_v9_0_get_rom_data_offset +ffffffff81ebe080 t smuio_v9_0_update_rom_clock_gating +ffffffff81ebe1c0 t smuio_v9_0_get_clock_gating_state +ffffffff81ebf000 T soc15_grbm_select +ffffffff81ebf080 T soc15_program_register_sequence +ffffffff81ebf280 T soc15_set_virt_ops +ffffffff81ebf2f0 t soc15_common_early_init +ffffffff81ebf680 t soc15_common_late_init +ffffffff81ebf6c0 t soc15_common_sw_init +ffffffff81ebf720 t soc15_common_sw_fini +ffffffff81ebf770 t soc15_common_hw_init +ffffffff81ebf8a0 t soc15_common_hw_fini +ffffffff81ebf970 t soc15_common_suspend +ffffffff81ebf9b0 t soc15_common_resume +ffffffff81ebf9f0 t soc15_common_is_idle +ffffffff81ebfa20 t soc15_common_wait_for_idle +ffffffff81ebfa50 t soc15_common_soft_reset +ffffffff81ebfa80 t soc15_common_set_clockgating_state +ffffffff81ebfdc0 t soc15_common_set_powergating_state +ffffffff81ebfdf0 t soc15_common_get_clockgating_state +ffffffff81ebfed0 t soc15_pcie_rreg +ffffffff81ebff30 t soc15_pcie_wreg +ffffffff81ebff90 t soc15_pcie_rreg64 +ffffffff81ebfff0 t soc15_pcie_wreg64 +ffffffff81ec0050 t soc15_uvd_ctx_rreg +ffffffff81ec00f0 t soc15_uvd_ctx_wreg +ffffffff81ec0180 t soc15_didt_rreg +ffffffff81ec0220 t soc15_didt_wreg +ffffffff81ec02a0 t soc15_gc_cac_rreg +ffffffff81ec03c0 t soc15_gc_cac_wreg +ffffffff81ec04d0 t soc15_se_cac_rreg +ffffffff81ec05f0 t soc15_se_cac_wreg +ffffffff81ec0700 t soc15_read_disabled_bios +ffffffff81ec0730 t soc15_read_register +ffffffff81ec0830 t soc15_vga_set_state +ffffffff81ec0860 t soc15_asic_reset +ffffffff81ec0960 t soc15_asic_reset_method +ffffffff81ec0ae0 t soc15_get_xclk +ffffffff81ec0b30 t soc15_set_uvd_clocks +ffffffff81ec0b60 t soc15_set_vce_clocks +ffffffff81ec0b90 t soc15_get_config_memsize +ffffffff81ec0bb0 t soc15_need_full_reset +ffffffff81ec0be0 t soc15_get_pcie_usage +ffffffff81ec0d10 t soc15_need_reset_on_init +ffffffff81ec0db0 t soc15_get_pcie_replay_count +ffffffff81ec0e20 t soc15_supports_baco +ffffffff81ec0e80 t soc15_pre_asic_init +ffffffff81ec0e90 t soc15_query_video_codecs +ffffffff81ec0f40 t vega20_get_pcie_usage +ffffffff81ec2000 T soc21_grbm_select +ffffffff81ec2080 t soc21_common_early_init +ffffffff81ec22a0 t soc21_common_late_init +ffffffff81ec22d0 t soc21_common_sw_init +ffffffff81ec2300 t soc21_common_sw_fini +ffffffff81ec2330 t soc21_common_hw_init +ffffffff81ec2400 t soc21_common_hw_fini +ffffffff81ec2460 t soc21_common_suspend +ffffffff81ec24c0 t soc21_common_resume +ffffffff81ec2590 t soc21_common_is_idle +ffffffff81ec25c0 t soc21_common_wait_for_idle +ffffffff81ec25f0 t soc21_common_soft_reset +ffffffff81ec2620 t soc21_common_set_clockgating_state +ffffffff81ec26d0 t soc21_common_set_powergating_state +ffffffff81ec2730 t soc21_common_get_clockgating_state +ffffffff81ec2780 t soc21_pcie_rreg +ffffffff81ec27e0 t soc21_pcie_wreg +ffffffff81ec2840 t soc21_pcie_rreg64 +ffffffff81ec28a0 t soc21_pcie_wreg64 +ffffffff81ec2900 t soc21_didt_rreg +ffffffff81ec29a0 t soc21_didt_wreg +ffffffff81ec2a20 t soc21_read_disabled_bios +ffffffff81ec2a50 t soc21_read_register +ffffffff81ec2b40 t soc21_vga_set_state +ffffffff81ec2b70 t soc21_asic_reset +ffffffff81ec2c50 t soc21_asic_reset_method +ffffffff81ec2d10 t soc21_get_xclk +ffffffff81ec2d40 t soc21_set_uvd_clocks +ffffffff81ec2d70 t soc21_set_vce_clocks +ffffffff81ec2da0 t soc21_get_config_memsize +ffffffff81ec2dc0 t soc21_need_full_reset +ffffffff81ec2e20 t soc21_init_doorbell_index +ffffffff81ec2f40 t soc21_need_reset_on_init +ffffffff81ec2fd0 t soc21_get_pcie_replay_count +ffffffff81ec3000 t soc21_pre_asic_init +ffffffff81ec3030 t soc21_update_umd_stable_pstate +ffffffff81ec30a0 t soc21_query_video_codecs +ffffffff81ec4000 t tonga_ih_early_init +ffffffff81ec4050 t tonga_ih_sw_init +ffffffff81ec40d0 t tonga_ih_sw_fini +ffffffff81ec4110 t tonga_ih_hw_init +ffffffff81ec4300 t tonga_ih_hw_fini +ffffffff81ec43a0 t tonga_ih_suspend +ffffffff81ec4440 t tonga_ih_resume +ffffffff81ec4480 t tonga_ih_is_idle +ffffffff81ec44d0 t tonga_ih_wait_for_idle +ffffffff81ec4570 t tonga_ih_check_soft_reset +ffffffff81ec45d0 t tonga_ih_pre_soft_reset +ffffffff81ec4680 t tonga_ih_soft_reset +ffffffff81ec4750 t tonga_ih_post_soft_reset +ffffffff81ec4790 t tonga_ih_set_clockgating_state +ffffffff81ec47c0 t tonga_ih_set_powergating_state +ffffffff81ec47f0 t tonga_ih_get_wptr +ffffffff81ec48e0 t tonga_ih_decode_iv +ffffffff81ec4960 t tonga_ih_set_rptr +ffffffff81ec5000 t umc_v6_0_init_registers +ffffffff81ec6000 t umc_v6_1_query_ras_error_count +ffffffff81ec64e0 t umc_v6_1_query_ras_error_address +ffffffff81ec67c0 t umc_v6_1_err_cnt_init +ffffffff81ec7000 t umc_v6_7_query_ras_error_count +ffffffff81ec7410 t umc_v6_7_query_ras_error_address +ffffffff81ec7590 t umc_v6_7_query_ras_poison_mode +ffffffff81ec75f0 t umc_v6_7_convert_error_address +ffffffff81ec78f0 t umc_v6_7_ecc_info_query_ras_error_count +ffffffff81ec7b30 t umc_v6_7_ecc_info_query_ras_error_address +ffffffff81ec8000 t umc_v8_10_query_ras_error_count +ffffffff81ec8280 t umc_v8_10_query_ras_error_address +ffffffff81ec85b0 t umc_v8_10_err_cnt_init +ffffffff81ec8730 t umc_v8_10_query_ras_poison_mode +ffffffff81ec9000 t umc_v8_7_query_ras_error_count +ffffffff81ec9310 t umc_v8_7_query_ras_error_address +ffffffff81ec94c0 t umc_v8_7_err_cnt_init +ffffffff81ec9610 t umc_v8_7_ecc_info_query_ras_error_count +ffffffff81ec9740 t umc_v8_7_ecc_info_query_ras_error_address +ffffffff81eca000 t uvd_v5_0_early_init +ffffffff81eca050 t uvd_v5_0_sw_init +ffffffff81eca140 t uvd_v5_0_sw_fini +ffffffff81eca190 t uvd_v5_0_hw_init +ffffffff81eca6a0 t uvd_v5_0_hw_fini +ffffffff81eca720 t uvd_v5_0_suspend +ffffffff81eca820 t uvd_v5_0_resume +ffffffff81eca870 t uvd_v5_0_is_idle +ffffffff81eca8c0 t uvd_v5_0_wait_for_idle +ffffffff81eca950 t uvd_v5_0_soft_reset +ffffffff81eca9f0 t uvd_v5_0_set_clockgating_state +ffffffff81ecab90 t uvd_v5_0_set_powergating_state +ffffffff81ecabd0 t uvd_v5_0_get_clockgating_state +ffffffff81ecac50 t uvd_v5_0_ring_get_rptr +ffffffff81ecac90 t uvd_v5_0_ring_get_wptr +ffffffff81ecacd0 t uvd_v5_0_ring_set_wptr +ffffffff81ecad00 t uvd_v5_0_ring_emit_ib +ffffffff81ecaf70 t uvd_v5_0_ring_emit_fence +ffffffff81ecb520 t uvd_v5_0_ring_test_ring +ffffffff81ecb6c0 t uvd_v5_0_ring_insert_nop +ffffffff81ecb820 t uvd_v5_0_set_interrupt_state +ffffffff81ecb850 t uvd_v5_0_process_interrupt +ffffffff81ecb8b0 t uvd_v5_0_stop +ffffffff81ecb9c0 t uvd_v5_0_start +ffffffff81ecd000 t uvd_v6_0_early_init +ffffffff81ecd140 t uvd_v6_0_sw_init +ffffffff81ecd460 t uvd_v6_0_sw_fini +ffffffff81ecd520 t uvd_v6_0_hw_init +ffffffff81ecdae0 t uvd_v6_0_hw_fini +ffffffff81ecdb60 t uvd_v6_0_suspend +ffffffff81ecdc60 t uvd_v6_0_resume +ffffffff81ecdcb0 t uvd_v6_0_is_idle +ffffffff81ecdd00 t uvd_v6_0_wait_for_idle +ffffffff81ecdd90 t uvd_v6_0_check_soft_reset +ffffffff81ecde10 t uvd_v6_0_pre_soft_reset +ffffffff81ecde50 t uvd_v6_0_soft_reset +ffffffff81ecdf20 t uvd_v6_0_post_soft_reset +ffffffff81ecdfc0 t uvd_v6_0_set_clockgating_state +ffffffff81ece150 t uvd_v6_0_set_powergating_state +ffffffff81ece1c0 t uvd_v6_0_get_clockgating_state +ffffffff81ece250 t uvd_v6_0_ring_get_rptr +ffffffff81ece290 t uvd_v6_0_ring_get_wptr +ffffffff81ece2d0 t uvd_v6_0_ring_set_wptr +ffffffff81ece300 t uvd_v6_0_ring_emit_ib +ffffffff81ece660 t uvd_v6_0_ring_emit_fence +ffffffff81ecec10 t uvd_v6_0_ring_emit_pipeline_sync +ffffffff81ecf010 t uvd_v6_0_ring_emit_vm_flush +ffffffff81ecf370 t uvd_v6_0_ring_emit_hdp_flush +ffffffff81ecf3a0 t uvd_v6_0_ring_test_ring +ffffffff81ecf540 t uvd_v6_0_ring_insert_nop +ffffffff81ecf6a0 t uvd_v6_0_ring_emit_wreg +ffffffff81ecf920 t uvd_v6_0_enc_ring_get_rptr +ffffffff81ecf980 t uvd_v6_0_enc_ring_get_wptr +ffffffff81ecf9e0 t uvd_v6_0_enc_ring_set_wptr +ffffffff81ecfa20 t uvd_v6_0_enc_ring_emit_ib +ffffffff81ecfc60 t uvd_v6_0_enc_ring_emit_fence +ffffffff81ecfea0 t uvd_v6_0_enc_ring_emit_pipeline_sync +ffffffff81ed0050 t uvd_v6_0_enc_ring_emit_vm_flush +ffffffff81ed0260 t uvd_v6_0_enc_ring_test_ring +ffffffff81ed03b0 t uvd_v6_0_enc_ring_test_ib +ffffffff81ed0970 t uvd_v6_0_enc_ring_insert_end +ffffffff81ed0a00 t uvd_v6_0_set_interrupt_state +ffffffff81ed0a30 t uvd_v6_0_process_interrupt +ffffffff81ed0b20 t uvd_v6_0_stop +ffffffff81ed0c30 t uvd_v6_0_start +ffffffff81ed2000 t uvd_v7_0_early_init +ffffffff81ed2270 t uvd_v7_0_sw_init +ffffffff81ed25f0 t uvd_v7_0_sw_fini +ffffffff81ed2700 t uvd_v7_0_hw_init +ffffffff81ed5620 t uvd_v7_0_hw_fini +ffffffff81ed5930 t uvd_v7_0_suspend +ffffffff81ed59e0 t uvd_v7_0_resume +ffffffff81ed5a30 t uvd_v7_0_set_clockgating_state +ffffffff81ed5a60 t uvd_v7_0_ring_get_rptr +ffffffff81ed5b00 t uvd_v7_0_ring_get_wptr +ffffffff81ed5ba0 t uvd_v7_0_ring_set_wptr +ffffffff81ed5c20 t uvd_v7_0_ring_patch_cs_in_place +ffffffff81ed5ca0 t uvd_v7_0_ring_emit_ib +ffffffff81ed6050 t uvd_v7_0_ring_emit_fence +ffffffff81ed66b0 t uvd_v7_0_ring_emit_vm_flush +ffffffff81ed6720 t uvd_v7_0_ring_emit_hdp_flush +ffffffff81ed6750 t uvd_v7_0_ring_test_ring +ffffffff81ed69e0 t uvd_v7_0_ring_insert_nop +ffffffff81ed6b80 t uvd_v7_0_ring_emit_wreg +ffffffff81ed6e50 t uvd_v7_0_ring_emit_reg_wait +ffffffff81ed71f0 t uvd_v7_0_enc_ring_get_rptr +ffffffff81ed72e0 t uvd_v7_0_enc_ring_get_wptr +ffffffff81ed73e0 t uvd_v7_0_enc_ring_set_wptr +ffffffff81ed74e0 t uvd_v7_0_enc_ring_emit_ib +ffffffff81ed7720 t uvd_v7_0_enc_ring_emit_fence +ffffffff81ed7960 t uvd_v7_0_enc_ring_emit_vm_flush +ffffffff81ed79d0 t uvd_v7_0_enc_ring_test_ring +ffffffff81ed7b30 t uvd_v7_0_enc_ring_test_ib +ffffffff81ed80f0 t uvd_v7_0_enc_ring_insert_end +ffffffff81ed8180 t uvd_v7_0_enc_ring_emit_wreg +ffffffff81ed82e0 t uvd_v7_0_enc_ring_emit_reg_wait +ffffffff81ed84a0 t uvd_v7_0_set_interrupt_state +ffffffff81ed84d0 t uvd_v7_0_process_interrupt +ffffffff81ed9000 t vce_v3_0_early_init +ffffffff81ed9180 t vce_v3_0_sw_init +ffffffff81ed92d0 t vce_v3_0_sw_fini +ffffffff81ed9320 t vce_v3_0_hw_init +ffffffff81ed9400 t vce_v3_0_hw_fini +ffffffff81ed94f0 t vce_v3_0_suspend +ffffffff81ed95c0 t vce_v3_0_resume +ffffffff81ed9610 t vce_v3_0_is_idle +ffffffff81ed9680 t vce_v3_0_wait_for_idle +ffffffff81ed9730 t vce_v3_0_check_soft_reset +ffffffff81ed9830 t vce_v3_0_pre_soft_reset +ffffffff81ed98d0 t vce_v3_0_soft_reset +ffffffff81ed99a0 t vce_v3_0_post_soft_reset +ffffffff81ed9b00 t vce_v3_0_set_clockgating_state +ffffffff81ed9df0 t vce_v3_0_set_powergating_state +ffffffff81eda640 t vce_v3_0_get_clockgating_state +ffffffff81eda700 t vce_v3_0_ring_get_rptr +ffffffff81eda7d0 t vce_v3_0_ring_get_wptr +ffffffff81eda8a0 t vce_v3_0_ring_set_wptr +ffffffff81eda960 t vce_v3_0_ring_emit_ib +ffffffff81edaba0 t vce_v3_0_emit_pipeline_sync +ffffffff81edad50 t vce_v3_0_emit_vm_flush +ffffffff81edafc0 t vce_v3_0_set_interrupt_state +ffffffff81edb030 t vce_v3_0_process_interrupt +ffffffff81edb0f0 t vce_v3_0_stop +ffffffff81edc000 t vce_v4_0_early_init +ffffffff81edc0b0 t vce_v4_0_sw_init +ffffffff81edc2e0 t vce_v4_0_sw_fini +ffffffff81edc360 t vce_v4_0_hw_init +ffffffff81edcb40 t vce_v4_0_hw_fini +ffffffff81edcbe0 t vce_v4_0_suspend +ffffffff81edce00 t vce_v4_0_resume +ffffffff81edceb0 t vce_v4_0_set_clockgating_state +ffffffff81edcee0 t vce_v4_0_set_powergating_state +ffffffff81edcfc0 t vce_v4_0_ring_get_rptr +ffffffff81edd030 t vce_v4_0_ring_get_wptr +ffffffff81edd0c0 t vce_v4_0_ring_set_wptr +ffffffff81edd150 t vce_v4_0_ring_emit_ib +ffffffff81edd390 t vce_v4_0_ring_emit_fence +ffffffff81edd5d0 t vce_v4_0_emit_vm_flush +ffffffff81edd640 t vce_v4_0_ring_insert_end +ffffffff81edd6d0 t vce_v4_0_emit_wreg +ffffffff81edd830 t vce_v4_0_emit_reg_wait +ffffffff81edd9f0 t vce_v4_0_set_interrupt_state +ffffffff81edda80 t vce_v4_0_process_interrupt +ffffffff81eddb20 t vce_v4_0_start +ffffffff81ede500 t vce_v4_0_stop +ffffffff81edf000 T vcn_dec_sw_ring_emit_fence +ffffffff81edf240 T vcn_dec_sw_ring_insert_end +ffffffff81edf2d0 T vcn_dec_sw_ring_emit_ib +ffffffff81edf510 T vcn_dec_sw_ring_emit_reg_wait +ffffffff81edf6d0 T vcn_dec_sw_ring_emit_vm_flush +ffffffff81edf740 T vcn_dec_sw_ring_emit_wreg +ffffffff81ee0000 T vcn_v1_0_set_pg_for_begin_use +ffffffff81ee0150 T vcn_v1_0_ring_end_use +ffffffff81ee01c0 t vcn_v1_0_early_init +ffffffff81ee0340 t vcn_v1_0_sw_init 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+ffffffff81ee2ec0 t vcn_v1_0_enc_ring_get_rptr +ffffffff81ee2f90 t vcn_v1_0_enc_ring_get_wptr +ffffffff81ee3060 t vcn_v1_0_enc_ring_set_wptr +ffffffff81ee3120 t vcn_v1_0_enc_ring_emit_ib +ffffffff81ee3360 t vcn_v1_0_enc_ring_emit_fence +ffffffff81ee35a0 t vcn_v1_0_enc_ring_emit_vm_flush +ffffffff81ee3610 t vcn_v1_0_enc_ring_insert_end +ffffffff81ee36a0 t vcn_v1_0_enc_ring_emit_wreg +ffffffff81ee3800 t vcn_v1_0_enc_ring_emit_reg_wait +ffffffff81ee39c0 t vcn_v1_0_set_interrupt_state +ffffffff81ee39f0 t vcn_v1_0_process_interrupt +ffffffff81ee3aa0 t vcn_v1_0_idle_work_handler +ffffffff81ee3c30 t vcn_v1_0_pause_dpg_mode +ffffffff81ee4d50 t vcn_v1_0_enable_clock_gating +ffffffff81ee5160 t vcn_v1_0_disable_clock_gating +ffffffff81ee56f0 t vcn_1_0_enable_static_power_gating +ffffffff81ee5910 t vcn_v1_0_start_dpg_mode +ffffffff81ee9540 t vcn_v1_0_start_spg_mode +ffffffff81eeb760 t vcn_v1_0_clock_gating_dpg_mode +ffffffff81eec000 T vcn_v2_0_dec_ring_insert_start +ffffffff81eec1c0 T vcn_v2_0_dec_ring_insert_end +ffffffff81eec2c0 T vcn_v2_0_dec_ring_insert_nop +ffffffff81eec430 T vcn_v2_0_dec_ring_emit_fence +ffffffff81eec9f0 T vcn_v2_0_dec_ring_emit_ib +ffffffff81eecd50 T vcn_v2_0_dec_ring_emit_reg_wait +ffffffff81eed0a0 T vcn_v2_0_dec_ring_emit_vm_flush +ffffffff81eed110 T vcn_v2_0_dec_ring_emit_wreg +ffffffff81eed3a0 T vcn_v2_0_enc_ring_emit_fence +ffffffff81eed5e0 T vcn_v2_0_enc_ring_insert_end +ffffffff81eed670 T vcn_v2_0_enc_ring_emit_ib +ffffffff81eed8b0 T vcn_v2_0_enc_ring_emit_reg_wait +ffffffff81eeda70 T vcn_v2_0_enc_ring_emit_vm_flush +ffffffff81eedae0 T vcn_v2_0_enc_ring_emit_wreg +ffffffff81eedc40 T vcn_v2_0_dec_ring_test_ring +ffffffff81eedee0 t vcn_v2_0_early_init +ffffffff81eee060 t vcn_v2_0_sw_init +ffffffff81eee370 t vcn_v2_0_sw_fini +ffffffff81eee3f0 t vcn_v2_0_hw_init +ffffffff81eeeda0 t vcn_v2_0_hw_fini +ffffffff81eeeea0 t vcn_v2_0_suspend +ffffffff81eeeed0 t vcn_v2_0_resume +ffffffff81eeef20 t vcn_v2_0_is_idle +ffffffff81eeefb0 t vcn_v2_0_wait_for_idle +ffffffff81eef0a0 t vcn_v2_0_set_clockgating_state +ffffffff81eef130 t vcn_v2_0_set_powergating_state +ffffffff81ef13f0 t vcn_v2_0_dec_ring_get_rptr +ffffffff81ef1480 t vcn_v2_0_dec_ring_get_wptr +ffffffff81ef1520 t vcn_v2_0_dec_ring_set_wptr +ffffffff81ef1650 t vcn_v2_0_enc_ring_get_rptr +ffffffff81ef1720 t vcn_v2_0_enc_ring_get_wptr +ffffffff81ef1810 t vcn_v2_0_enc_ring_set_wptr +ffffffff81ef1900 t vcn_v2_0_set_interrupt_state +ffffffff81ef1930 t vcn_v2_0_process_interrupt +ffffffff81ef19e0 t vcn_v2_0_pause_dpg_mode +ffffffff81ef2340 t vcn_v2_0_enable_clock_gating +ffffffff81ef25c0 t vcn_v2_0_disable_clock_gating +ffffffff81ef29c0 t vcn_v2_0_enable_static_power_gating +ffffffff81ef2ba0 t vcn_v2_0_start_dpg_mode +ffffffff81ef7660 t vcn_v2_0_clock_gating_dpg_mode +ffffffff81ef8000 t vcn_v2_6_query_poison_status +ffffffff81ef80d0 t vcn_v2_5_early_init +ffffffff81ef8410 t vcn_v2_5_sw_init +ffffffff81ef8890 t vcn_v2_5_sw_fini +ffffffff81ef8960 t vcn_v2_5_hw_init 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vcn_v3_0_start_dpg_mode +ffffffff81f0d980 t vcn_v3_0_clock_gating_dpg_mode +ffffffff81f0f000 t vcn_v4_0_early_init +ffffffff81f0f120 t vcn_v4_0_sw_init +ffffffff81f0f360 t vcn_v4_0_sw_fini +ffffffff81f0f440 t vcn_v4_0_hw_init +ffffffff81f0fe80 t vcn_v4_0_hw_fini +ffffffff81f0ff90 t vcn_v4_0_suspend +ffffffff81f0ffc0 t vcn_v4_0_resume +ffffffff81f10010 t vcn_v4_0_is_idle +ffffffff81f10110 t vcn_v4_0_wait_for_idle +ffffffff81f10240 t vcn_v4_0_set_clockgating_state +ffffffff81f10350 t vcn_v4_0_set_powergating_state +ffffffff81f12900 t vcn_v4_0_unified_ring_get_rptr +ffffffff81f129e0 t vcn_v4_0_unified_ring_get_wptr +ffffffff81f12ad0 t vcn_v4_0_unified_ring_set_wptr +ffffffff81f12bd0 t vcn_v4_0_ring_patch_cs_in_place +ffffffff81f12e50 t vcn_v4_0_set_interrupt_state +ffffffff81f12e80 t vcn_v4_0_process_interrupt +ffffffff81f12f40 t vcn_v4_0_pause_dpg_mode +ffffffff81f13300 t vcn_v4_0_enable_clock_gating +ffffffff81f135f0 t vcn_v4_0_disable_clock_gating +ffffffff81f13b40 t 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is_dsc_need_re_compute +ffffffff81f36970 t compute_mst_dsc_configs_for_link +ffffffff81f375b0 T pre_validate_dsc +ffffffff81f37b80 T dm_dp_mst_is_port_support_mode +ffffffff81f37db0 t amdgpu_dm_encoder_destroy +ffffffff81f37dc0 t dm_dp_add_mst_connector +ffffffff81f37fb0 t amdgpu_dm_mst_connector_late_register +ffffffff81f38000 t amdgpu_dm_mst_connector_early_unregister +ffffffff81f380a0 t dm_dp_mst_connector_destroy +ffffffff81f38120 t dm_dp_mst_get_modes +ffffffff81f38550 t dm_dp_mst_detect +ffffffff81f386e0 t dm_mst_atomic_best_encoder +ffffffff81f38740 t dm_dp_mst_atomic_check +ffffffff81f38770 t set_dsc_configs_from_fairness_vars +ffffffff81f39000 T amd_get_format_info +ffffffff81f39020 T fill_blending_from_plane_state +ffffffff81f390d0 T fill_plane_buffer_attributes +ffffffff81f39640 T dm_plane_helper_check_state +ffffffff81f39860 T fill_dc_scaling_info +ffffffff81f39ac0 T handle_cursor_update +ffffffff81f39d40 T amdgpu_dm_plane_init +ffffffff81f3aac0 t dm_drm_plane_reset +ffffffff81f3ab50 t dm_drm_plane_duplicate_state +ffffffff81f3abe0 t dm_drm_plane_destroy_state +ffffffff81f3ac20 t dm_plane_format_mod_supported +ffffffff81f3ad50 t dm_plane_helper_prepare_fb +ffffffff81f3b000 t dm_plane_helper_cleanup_fb +ffffffff81f3b0a0 t dm_plane_atomic_check +ffffffff81f3b170 t dm_plane_atomic_async_check +ffffffff81f3b1b0 t dm_plane_atomic_async_update +ffffffff81f3b260 t amdgpu_bo_reserve +ffffffff81f3b470 t amdgpu_bo_unreserve +ffffffff81f3c000 T dm_pp_apply_display_requirements +ffffffff81f3c1e0 T dm_pp_get_clock_levels_by_type +ffffffff81f3c520 T dm_pp_get_clock_levels_by_type_with_latency +ffffffff81f3c6e0 T dm_pp_get_clock_levels_by_type_with_voltage +ffffffff81f3c8a0 T dm_pp_notify_wm_clock_changes +ffffffff81f3c8f0 T dm_pp_apply_power_level_change_request +ffffffff81f3c920 T dm_pp_apply_clock_for_voltage_request +ffffffff81f3c9c0 T dm_pp_get_static_clocks +ffffffff81f3ca80 T dm_pp_get_funcs +ffffffff81f3cb90 t pp_rv_set_wm_ranges +ffffffff81f3cce0 t pp_rv_set_pme_wa_enable +ffffffff81f3cd00 t pp_rv_set_active_display_count +ffffffff81f3cd20 t pp_rv_set_min_deep_sleep_dcfclk +ffffffff81f3cd40 t pp_rv_set_hard_min_dcefclk_by_freq +ffffffff81f3cd60 t pp_rv_set_hard_min_fclk_by_freq +ffffffff81f3cd80 t pp_nv_set_display_count +ffffffff81f3cde0 t pp_nv_set_hard_min_dcefclk_by_freq +ffffffff81f3ce50 t pp_nv_set_min_deep_sleep_dcfclk +ffffffff81f3ceb0 t pp_nv_set_voltage_by_freq +ffffffff81f3cf40 t pp_nv_set_wm_ranges +ffffffff81f3cf90 t pp_nv_set_hard_min_uclk_by_freq +ffffffff81f3d000 t pp_nv_get_maximum_sustainable_clocks +ffffffff81f3d060 t pp_nv_get_uclk_dpm_states +ffffffff81f3d0c0 t pp_nv_set_pstate_handshake_support +ffffffff81f3d110 t pp_rn_set_wm_ranges +ffffffff81f3d160 t pp_rn_get_dpm_clock_table +ffffffff81f3e000 T amdgpu_dm_set_psr_caps +ffffffff81f3e110 T amdgpu_dm_link_setup_psr +ffffffff81f3e290 T amdgpu_dm_psr_enable +ffffffff81f3e390 T amdgpu_dm_psr_disable +ffffffff81f3e410 T amdgpu_dm_psr_disable_all +ffffffff81f3f000 T dm_get_elapse_time_in_ns +ffffffff81f3f030 T dm_perf_trace_timestamp +ffffffff81f40000 T dc_assert_fp_enabled +ffffffff81f40070 T dc_fpu_begin +ffffffff81f400c0 T dc_fpu_end +ffffffff81f41000 T dal_vector_construct +ffffffff81f410d0 T dal_vector_presized_create +ffffffff81f41350 T dal_vector_create +ffffffff81f41470 T dal_vector_destruct +ffffffff81f414c0 T dal_vector_destroy +ffffffff81f41540 T dal_vector_get_count +ffffffff81f41570 T dal_vector_at_index +ffffffff81f415b0 T dal_vector_remove_at_index +ffffffff81f41640 T dal_vector_set_at_index +ffffffff81f416a0 T dal_vector_insert_at +ffffffff81f417a0 T dal_vector_reserve +ffffffff81f41850 T dal_vector_append +ffffffff81f41950 T dal_vector_clone +ffffffff81f41a00 T dal_vector_capacity +ffffffff81f41a30 T dal_vector_clear +ffffffff81f42000 T fixed_point_to_int_frac +ffffffff81f42200 T convert_float_matrix +ffffffff81f422c0 T reduce_fraction +ffffffff81f43000 T is_rgb_cspace +ffffffff81f43080 T is_lower_pipe_tree_visible +ffffffff81f430e0 T is_upper_pipe_tree_visible +ffffffff81f43140 T is_pipe_tree_visible +ffffffff81f431c0 T build_prescale_params +ffffffff81f44000 T dc_fixpt_from_fraction +ffffffff81f441d0 T dc_fixpt_mul +ffffffff81f44380 T dc_fixpt_sqr +ffffffff81f444f0 T dc_fixpt_recip +ffffffff81f44560 T dc_fixpt_sinc +ffffffff81f44750 T dc_fixpt_sin +ffffffff81f44780 T dc_fixpt_cos +ffffffff81f44870 T dc_fixpt_exp +ffffffff81f44b70 t fixed31_32_exp_from_taylor_series +ffffffff81f44f50 T dc_fixpt_log +ffffffff81f45160 T dc_fixpt_u4d19 +ffffffff81f451a0 T dc_fixpt_u3d19 +ffffffff81f451e0 T dc_fixpt_u2d19 +ffffffff81f45220 T dc_fixpt_u0d19 +ffffffff81f45250 T dc_fixpt_clamp_u0d14 +ffffffff81f452a0 T dc_fixpt_clamp_u0d10 +ffffffff81f452f0 T dc_fixpt_s4d19 +ffffffff81f46000 T bios_parser_create +ffffffff81f473b0 t bios_parser_get_connectors_number +ffffffff81f47410 t bios_parser_get_connector_id +ffffffff81f474a0 t bios_parser_get_src_obj +ffffffff81f475b0 t bios_parser_get_i2c_info +ffffffff81f477d0 t bios_parser_get_hpd_info +ffffffff81f478b0 t bios_parser_get_device_tag +ffffffff81f47ab0 t bios_parser_get_spread_spectrum_info +ffffffff81f47db0 t bios_parser_get_ss_entry_number +ffffffff81f47fe0 t bios_parser_get_embedded_panel_info +ffffffff81f48530 t bios_parser_get_gpio_pin_info +ffffffff81f48650 t bios_parser_get_encoder_cap_info +ffffffff81f48750 t bios_parser_set_scratch_critical_state +ffffffff81f48760 t bios_parser_is_device_id_supported +ffffffff81f48820 t bios_parser_encoder_control +ffffffff81f48860 t bios_parser_transmitter_control +ffffffff81f488a0 t bios_parser_enable_crtc +ffffffff81f488f0 t bios_parser_adjust_pixel_clock +ffffffff81f48930 t bios_parser_set_pixel_clock +ffffffff81f48970 t bios_parser_set_dce_clock +ffffffff81f489b0 t bios_parser_enable_spread_spectrum_on_ppll +ffffffff81f48a00 t bios_parser_program_crtc_timing +ffffffff81f48a40 t bios_parser_program_display_engine_pll +ffffffff81f48a80 t bios_parser_enable_disp_power_gating +ffffffff81f48ac0 t bios_parser_destroy +ffffffff81f48b80 t bios_get_board_layout_info +ffffffff81f48e10 t get_bios_object +ffffffff81f48fe0 t get_ss_info_from_ss_info_table +ffffffff81f491a0 t get_ss_entry_number_from_ss_info_tbl +ffffffff81f4a000 T firmware_parser_create +ffffffff81f4bde0 t bios_parser_get_connectors_number +ffffffff81f4bf70 t bios_parser_get_connector_id +ffffffff81f4c000 t bios_parser_get_src_obj +ffffffff81f4c2a0 t bios_parser_get_i2c_info +ffffffff81f4c510 t bios_parser_get_hpd_info +ffffffff81f4c680 t bios_parser_get_device_tag +ffffffff81f4c950 t bios_parser_get_spread_spectrum_info +ffffffff81f4cd10 t bios_parser_get_ss_entry_number +ffffffff81f4cd40 t bios_parser_get_embedded_panel_info +ffffffff81f4cf40 t bios_parser_get_gpio_pin_info +ffffffff81f4d060 t bios_parser_get_encoder_cap_info +ffffffff81f4d1d0 t bios_parser_is_accelerated_mode +ffffffff81f4d1e0 t bios_parser_set_scratch_critical_state +ffffffff81f4d1f0 t bios_parser_is_device_id_supported +ffffffff81f4d270 t bios_parser_encoder_control +ffffffff81f4d2b0 t bios_parser_transmitter_control +ffffffff81f4d2f0 t bios_parser_enable_crtc +ffffffff81f4d340 t bios_parser_set_pixel_clock +ffffffff81f4d380 t bios_parser_set_dce_clock +ffffffff81f4d3c0 t bios_parser_program_crtc_timing +ffffffff81f4d400 t bios_parser_enable_disp_power_gating +ffffffff81f4d440 t firmware_parser_destroy +ffffffff81f4d500 t bios_get_board_layout_info +ffffffff81f4d9b0 t bios_parser_pack_data_tables +ffffffff81f4d9e0 t bios_get_atom_dc_golden_table +ffffffff81f4db20 t bios_parser_enable_lvtma_control +ffffffff81f4db70 t bios_parser_get_soc_bb_info +ffffffff81f4dc80 t bios_parser_get_disp_connector_caps_info +ffffffff81f4dde0 t bios_parser_get_lttpr_caps +ffffffff81f4df30 t bios_parser_get_lttpr_interop +ffffffff81f4e070 t bios_parser_get_connector_speed_cap_info +ffffffff81f4e1c0 t get_bios_object +ffffffff81f4e320 t get_bios_object_from_path_v3 +ffffffff81f4f000 T object_id_from_bios_object_id +ffffffff81f50000 T bios_get_image +ffffffff81f50050 T bios_is_accelerated_mode +ffffffff81f500b0 T bios_set_scratch_acc_mode_change +ffffffff81f500f0 T bios_set_scratch_critical_state +ffffffff81f50130 T bios_get_vga_enabled_displays +ffffffff81f51000 T dal_bios_parser_create +ffffffff81f51070 T dal_bios_parser_destroy +ffffffff81f52000 T dal_bios_parser_init_cmd_tbl +ffffffff81f52800 t encoder_control_digx_v3 +ffffffff81f52900 t encoder_control_digx_v4 +ffffffff81f52a00 t encoder_control_digx_v5 +ffffffff81f52b50 t encoder_control_dig1_v1 +ffffffff81f52bd0 t encoder_control_dig2_v1 +ffffffff81f52c50 t encoder_control_dig_v1 +ffffffff81f52cb0 t transmitter_control_v2 +ffffffff81f52e50 t transmitter_control_v3 +ffffffff81f53010 t transmitter_control_v4 +ffffffff81f531c0 t transmitter_control_v1_5 +ffffffff81f53340 t transmitter_control_v1_6 +ffffffff81f534b0 t set_pixel_clock_v3 +ffffffff81f53620 t set_pixel_clock_v5 +ffffffff81f537c0 t set_pixel_clock_v6 +ffffffff81f53970 t set_pixel_clock_v7 +ffffffff81f53b40 t enable_spread_spectrum_on_ppll_v1 +ffffffff81f53c60 t enable_spread_spectrum_on_ppll_v2 +ffffffff81f53d90 t enable_spread_spectrum_on_ppll_v3 +ffffffff81f53ea0 t adjust_display_pll_v2 +ffffffff81f53ff0 t adjust_display_pll_v3 +ffffffff81f54160 t dac1_encoder_control_v1 +ffffffff81f541e0 t dac2_encoder_control_v1 +ffffffff81f54260 t dac1_output_control_v1 +ffffffff81f542c0 t dac2_output_control_v1 +ffffffff81f54320 t set_crtc_using_dtd_timing_v3 +ffffffff81f54490 t set_crtc_timing_v1 +ffffffff81f54630 t enable_crtc_v1 +ffffffff81f546d0 t enable_crtc_mem_req_v1 +ffffffff81f54770 t program_clock_v5 +ffffffff81f54870 t program_clock_v6 +ffffffff81f54990 t external_encoder_control_v3 +ffffffff81f54b40 t enable_disp_power_gating_v2_1 +ffffffff81f54c00 t set_dce_clock_v2_1 +ffffffff81f55000 T dal_firmware_parser_init_cmd_tbl +ffffffff81f553d0 t encoder_control_digx_v1_5 +ffffffff81f555b0 t encoder_control_fallback +ffffffff81f55610 t transmitter_control_v1_6 +ffffffff81f557c0 t transmitter_control_v1_7 +ffffffff81f559b0 t transmitter_control_fallback +ffffffff81f55a10 t set_pixel_clock_v7 +ffffffff81f55c70 t set_pixel_clock_fallback +ffffffff81f55cd0 t set_crtc_using_dtd_timing_v3 +ffffffff81f55e40 t enable_crtc_v1 +ffffffff81f55ee0 t external_encoder_control_v3 +ffffffff81f55f10 t enable_disp_power_gating_v2_1 +ffffffff81f56070 t enable_disp_power_gating_fallback +ffffffff81f560d0 t set_dce_clock_v2_1 +ffffffff81f561f0 t get_smu_clock_info_v3_1 +ffffffff81f56260 t enable_lvtma_control +ffffffff81f57000 T dal_bios_parser_init_cmd_tbl_helper +ffffffff81f570a0 T dal_cmd_table_helper_controller_id_to_atom +ffffffff81f571c0 T dal_cmd_table_helper_transmitter_bp_to_atom +ffffffff81f57240 T dal_cmd_table_helper_encoder_mode_bp_to_atom +ffffffff81f572d0 T dal_cmd_table_helper_assign_control_parameter +ffffffff81f57390 T dal_cmd_table_helper_clock_source_id_to_ref_clk_src +ffffffff81f57470 T dal_cmd_table_helper_encoder_id_to_atom +ffffffff81f58000 T dal_bios_parser_init_cmd_tbl_helper2 +ffffffff81f580b0 T dal_cmd_table_helper_controller_id_to_atom2 +ffffffff81f581c0 T dal_cmd_table_helper_transmitter_bp_to_atom2 +ffffffff81f58240 T dal_cmd_table_helper_encoder_mode_bp_to_atom2 +ffffffff81f582d0 T dal_cmd_table_helper_clock_source_id_to_ref_clk_src2 +ffffffff81f583b0 T dal_cmd_table_helper_encoder_id_to_atom2 +ffffffff81f59000 T dal_cmd_tbl_helper_dce110_get_table ffffffff81f59030 t encoder_action_to_atom ffffffff81f590b0 t engine_bp_to_atom ffffffff81f59100 t clock_source_id_to_atom -ffffffff81f591d0 t clock_source_id_to_atom_phy_clk_src_id -ffffffff81f59220 t signal_type_to_atom_dig_mode -ffffffff81f59280 t hpd_sel_to_atom -ffffffff81f592c0 t dig_encoder_sel_to_atom -ffffffff81f592f0 t phy_id_to_atom -ffffffff81f59330 t disp_power_gating_action_to_atom -ffffffff81f593a0 t dc_clock_type_to_atom -ffffffff81f59420 t transmitter_color_depth_to_atom -ffffffff81f5a000 T dal_cmd_tbl_helper_dce112_get_table +ffffffff81f591a0 t clock_source_id_to_atom_phy_clk_src_id +ffffffff81f591f0 t signal_type_to_atom_dig_mode +ffffffff81f59250 t hpd_sel_to_atom +ffffffff81f59290 t dig_encoder_sel_to_atom +ffffffff81f592c0 t phy_id_to_atom +ffffffff81f59300 t disp_power_gating_action_to_atom +ffffffff81f5a000 T dal_cmd_tbl_helper_dce112_get_table2 ffffffff81f5a030 t encoder_action_to_atom ffffffff81f5a0b0 t engine_bp_to_atom ffffffff81f5a100 t clock_source_id_to_atom @@ -29384,7 +29373,7 @@ ffffffff81f5a2f0 t phy_id_to_atom ffffffff81f5a330 t disp_power_gating_action_to_atom ffffffff81f5a3a0 t dc_clock_type_to_atom ffffffff81f5a420 t transmitter_color_depth_to_atom -ffffffff81f5b000 T dal_cmd_tbl_helper_dce80_get_table +ffffffff81f5b000 T dal_cmd_tbl_helper_dce112_get_table ffffffff81f5b030 t encoder_action_to_atom ffffffff81f5b0b0 t engine_bp_to_atom ffffffff81f5b100 t clock_source_id_to_atom @@ -29392,25471 +29381,25482 @@ ffffffff81f5b1d0 t clock_source_id_to_atom_phy_clk_src ffffffff81f5b220 t signal_type_to_atom_dig_mode ffffffff81f5b280 t hpd_sel_to_atom ffffffff81f5b2c0 t dig_encoder_sel_to_atom -ffffffff81f5b310 t phy_id_to_atom -ffffffff81f5b350 t disp_power_gating_action_to_atom -ffffffff81f5c000 T clk_mgr_helper_get_active_display_cnt -ffffffff81f5c0e0 T clk_mgr_helper_get_active_plane_cnt -ffffffff81f5c190 T clk_mgr_exit_optimized_pwr_state -ffffffff81f5c290 T clk_mgr_optimize_pwr_state -ffffffff81f5c3a0 T dc_clk_mgr_create -ffffffff81f5ca80 T dc_destroy_clk_mgr -ffffffff81f5d000 T dentist_get_divider_from_did -ffffffff81f5d070 T dce_adjust_dp_ref_freq_for_ss -ffffffff81f5d180 T dce_get_dp_ref_freq_khz -ffffffff81f5d2b0 T dce12_get_dp_ref_freq_khz -ffffffff81f5d2d0 T dce_get_max_pixel_clock_for_all_paths -ffffffff81f5d4e0 T dce_get_required_clocks_state -ffffffff81f5d590 T dce_set_clock -ffffffff81f5d6f0 T dce_clock_read_ss_info -ffffffff81f5d830 T dce_clk_mgr_construct -ffffffff81f5da20 t dce_update_clocks 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dcn20_update_clocks_update_dpp_dto -ffffffff81f64160 T dcn20_update_clocks_update_dentist -ffffffff81f64680 T dcn2_update_clocks -ffffffff81f64bf0 T dcn2_read_clocks_from_hw_dentist -ffffffff81f64cc0 T dcn2_update_clocks_fpga -ffffffff81f64e40 T dcn2_init_clocks -ffffffff81f64ee0 T dcn2_get_clock -ffffffff81f64f50 T dcn20_clk_mgr_construct -ffffffff81f650a0 t dcn2_enable_pme_wa -ffffffff81f650f0 t dcn2_are_clock_states_equal -ffffffff81f65160 t dcn2_notify_link_rate_change -ffffffff81f66000 t dcn201_update_clocks -ffffffff81f66240 t dcn201_init_clocks -ffffffff81f662e0 T dcn201_clk_mgr_construct -ffffffff81f67000 T rn_clk_mgr_construct -ffffffff81f678e0 t rn_update_clocks -ffffffff81f67e80 t rn_set_low_power_state -ffffffff81f68050 t rn_init_clocks -ffffffff81f680f0 t rn_enable_pme_wa -ffffffff81f68100 t rn_are_clock_states_equal -ffffffff81f68150 t rn_notify_wm_ranges -ffffffff81f684e0 t rn_notify_link_rate_change -ffffffff81f69000 T rn_vbios_smu_get_smu_version -ffffffff81f69020 t rn_vbios_smu_send_msg_with_param -ffffffff81f691b0 T rn_vbios_smu_set_dispclk -ffffffff81f692f0 T rn_vbios_smu_set_dprefclk -ffffffff81f69360 T rn_vbios_smu_set_hard_min_dcfclk -ffffffff81f693e0 T rn_vbios_smu_set_min_deep_sleep_dcfclk -ffffffff81f69460 T rn_vbios_smu_set_phyclk -ffffffff81f694a0 T rn_vbios_smu_set_dppclk -ffffffff81f69560 T rn_vbios_smu_set_dcn_low_power_state -ffffffff81f69580 T rn_vbios_smu_enable_48mhz_tmdp_refclk_pwrdwn -ffffffff81f695a0 T rn_vbios_smu_enable_pme_wa -ffffffff81f695c0 T rn_vbios_smu_is_periodic_retraining_disabled -ffffffff81f6a000 T dcn3_init_clocks -ffffffff81f6a3d0 t dcn3_init_clocks_fpga -ffffffff81f6a3e0 T dcn3_clk_mgr_construct -ffffffff81f6a540 T dcn3_clk_mgr_destroy -ffffffff81f6a5b0 t dcn3_update_clocks -ffffffff81f6aa10 t dcn3_enable_pme_wa -ffffffff81f6aa50 t dcn3_are_clock_states_equal -ffffffff81f6aab0 t dcn3_notify_wm_ranges -ffffffff81f6ad40 t dcn30_notify_link_rate_change -ffffffff81f6ae60 t dcn3_set_hard_min_memclk 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dce112_set_clock +ffffffff81f601a0 T dce112_set_dispclk +ffffffff81f602d0 T dce112_set_dprefclk +ffffffff81f60340 T dce112_clk_mgr_construct +ffffffff81f603f0 t dce112_update_clocks +ffffffff81f61000 T dce120_clk_mgr_construct +ffffffff81f61090 T dce121_clk_mgr_construct +ffffffff81f611c0 t dce12_update_clocks +ffffffff81f62000 T rv1_clk_mgr_construct +ffffffff81f620c0 t rv1_update_clocks +ffffffff81f625b0 t rv1_init_clocks +ffffffff81f62640 t rv1_enable_pme_wa +ffffffff81f63000 T rv1_vbios_smu_set_dispclk +ffffffff81f630f0 t rv1_vbios_smu_send_msg_with_param +ffffffff81f63200 T rv1_vbios_smu_set_dprefclk +ffffffff81f64000 T rv2_clk_mgr_construct +ffffffff81f65000 T dentist_get_did_from_divider +ffffffff81f65090 T dcn20_update_clocks_update_dpp_dto +ffffffff81f65160 T dcn20_update_clocks_update_dentist +ffffffff81f65680 T dcn2_update_clocks +ffffffff81f65bf0 T dcn2_read_clocks_from_hw_dentist +ffffffff81f65cc0 T dcn2_update_clocks_fpga +ffffffff81f65e40 T dcn2_init_clocks +ffffffff81f65ee0 T dcn2_get_clock +ffffffff81f65f50 T dcn20_clk_mgr_construct +ffffffff81f660a0 t dcn2_enable_pme_wa +ffffffff81f660f0 t dcn2_are_clock_states_equal +ffffffff81f66160 t dcn2_notify_link_rate_change +ffffffff81f67000 t dcn201_update_clocks +ffffffff81f67240 t dcn201_init_clocks +ffffffff81f672e0 T dcn201_clk_mgr_construct +ffffffff81f68000 T rn_clk_mgr_construct +ffffffff81f688e0 t rn_update_clocks +ffffffff81f68e80 t rn_set_low_power_state +ffffffff81f69050 t rn_init_clocks +ffffffff81f690f0 t rn_enable_pme_wa +ffffffff81f69100 t rn_are_clock_states_equal +ffffffff81f69150 t rn_notify_wm_ranges +ffffffff81f694e0 t rn_notify_link_rate_change +ffffffff81f6a000 T rn_vbios_smu_get_smu_version +ffffffff81f6a020 t rn_vbios_smu_send_msg_with_param +ffffffff81f6a1b0 T rn_vbios_smu_set_dispclk +ffffffff81f6a2f0 T rn_vbios_smu_set_dprefclk +ffffffff81f6a360 T rn_vbios_smu_set_hard_min_dcfclk +ffffffff81f6a3e0 T rn_vbios_smu_set_min_deep_sleep_dcfclk +ffffffff81f6a460 T rn_vbios_smu_set_phyclk +ffffffff81f6a4a0 T rn_vbios_smu_set_dppclk +ffffffff81f6a560 T rn_vbios_smu_set_dcn_low_power_state +ffffffff81f6a580 T rn_vbios_smu_enable_48mhz_tmdp_refclk_pwrdwn +ffffffff81f6a5a0 T rn_vbios_smu_enable_pme_wa +ffffffff81f6a5c0 T rn_vbios_smu_is_periodic_retraining_disabled +ffffffff81f6b000 T dcn3_init_clocks +ffffffff81f6b3d0 t dcn3_init_clocks_fpga +ffffffff81f6b3e0 T dcn3_clk_mgr_construct +ffffffff81f6b540 T dcn3_clk_mgr_destroy +ffffffff81f6b5b0 t dcn3_update_clocks +ffffffff81f6ba10 t dcn3_enable_pme_wa +ffffffff81f6ba50 t dcn3_are_clock_states_equal +ffffffff81f6bab0 t dcn3_notify_wm_ranges +ffffffff81f6bd40 t dcn30_notify_link_rate_change +ffffffff81f6be60 t dcn3_set_hard_min_memclk +ffffffff81f6bf00 t dcn3_set_hard_max_memclk +ffffffff81f6bf60 t dcn3_set_max_memclk +ffffffff81f6bfa0 t dcn3_set_min_memclk +ffffffff81f6bfe0 t dcn3_get_memclk_states_from_smu +ffffffff81f6c120 t dcn3_is_smu_present +ffffffff81f6d000 T dcn30_smu_test_message +ffffffff81f6d070 t dcn30_smu_send_msg_with_param +ffffffff81f6d1d0 T dcn30_smu_get_smu_version +ffffffff81f6d1f0 T dcn30_smu_check_driver_if_version +ffffffff81f6d240 T dcn30_smu_check_msg_header_version +ffffffff81f6d290 T dcn30_smu_set_dram_addr_high +ffffffff81f6d2b0 T dcn30_smu_set_dram_addr_low +ffffffff81f6d2d0 T dcn30_smu_transfer_wm_table_smu_2_dram +ffffffff81f6d2f0 T dcn30_smu_transfer_wm_table_dram_2_smu +ffffffff81f6d310 T dcn30_smu_set_hard_min_by_freq +ffffffff81f6d360 T dcn30_smu_set_hard_max_by_freq +ffffffff81f6d3b0 T dcn30_smu_get_dpm_freq_by_index +ffffffff81f6d400 T dcn30_smu_get_dc_mode_max_dpm_freq +ffffffff81f6d450 T dcn30_smu_set_min_deep_sleep_dcef_clk +ffffffff81f6d470 T dcn30_smu_set_num_of_displays +ffffffff81f6d490 T dcn30_smu_set_display_refresh_from_mall +ffffffff81f6d4c0 T dcn30_smu_set_external_client_df_cstate_allow +ffffffff81f6d4e0 T dcn30_smu_set_pme_workaround +ffffffff81f6e000 T dcn301_smu_get_smu_version +ffffffff81f6e070 t dcn301_smu_send_msg_with_param +ffffffff81f6e1f0 T dcn301_smu_set_dispclk +ffffffff81f6e290 T dcn301_smu_set_dprefclk +ffffffff81f6e340 T dcn301_smu_set_hard_min_dcfclk +ffffffff81f6e3e0 T dcn301_smu_set_min_deep_sleep_dcfclk +ffffffff81f6e480 T dcn301_smu_set_dppclk +ffffffff81f6e520 T dcn301_smu_set_display_idle_optimization +ffffffff81f6e570 T dcn301_smu_enable_phy_refclk_pwrdwn +ffffffff81f6e5c0 T dcn301_smu_enable_pme_wa +ffffffff81f6e5e0 T dcn301_smu_set_dram_addr_high +ffffffff81f6e630 T dcn301_smu_set_dram_addr_low +ffffffff81f6e680 T dcn301_smu_transfer_dpm_table_smu_2_dram +ffffffff81f6e6a0 T dcn301_smu_transfer_wm_table_dram_2_smu +ffffffff81f6f000 T vg_clk_mgr_construct +ffffffff81f6f7f0 T vg_clk_mgr_destroy +ffffffff81f6f840 t vg_update_clocks +ffffffff81f6fbd0 t vg_init_clocks +ffffffff81f6fc70 t vg_enable_pme_wa +ffffffff81f6fc80 t vg_are_clock_states_equal +ffffffff81f6fcd0 t vg_notify_wm_ranges +ffffffff81f71000 T dcn31_update_clocks +ffffffff81f71620 T dcn31_init_clocks +ffffffff81f716d0 T dcn31_are_clock_states_equal +ffffffff81f71730 T dcn31_get_dtb_ref_freq_khz +ffffffff81f71760 T dcn31_clk_mgr_construct +ffffffff81f71dd0 T dcn31_clk_mgr_destroy +ffffffff81f71e20 t dcn31_set_low_power_state +ffffffff81f72000 t dcn31_enable_pme_wa +ffffffff81f72010 t dcn31_notify_wm_ranges +ffffffff81f723b0 t find_clk_for_voltage +ffffffff81f73000 T dcn31_smu_get_smu_version +ffffffff81f73020 t dcn31_smu_send_msg_with_param +ffffffff81f73220 T dcn31_smu_set_dispclk +ffffffff81f73290 T dcn31_smu_set_dprefclk +ffffffff81f73300 T dcn31_smu_set_hard_min_dcfclk +ffffffff81f73380 T dcn31_smu_set_min_deep_sleep_dcfclk +ffffffff81f73400 T dcn31_smu_set_dppclk +ffffffff81f73470 T dcn31_smu_set_display_idle_optimization +ffffffff81f734c0 T dcn31_smu_enable_phy_refclk_pwrdwn +ffffffff81f73510 T dcn31_smu_enable_pme_wa +ffffffff81f73550 T dcn31_smu_set_dram_addr_high +ffffffff81f73590 T dcn31_smu_set_dram_addr_low +ffffffff81f735d0 T dcn31_smu_transfer_dpm_table_smu_2_dram +ffffffff81f73610 T dcn31_smu_transfer_wm_table_dram_2_smu +ffffffff81f73650 T dcn31_smu_set_zstate_support +ffffffff81f736c0 T dcn31_smu_set_dtbclk +ffffffff81f74000 T dcn314_update_clocks +ffffffff81f746d0 T dcn314_are_clock_states_equal +ffffffff81f74730 T dcn314_clk_mgr_construct +ffffffff81f75440 T dcn314_clk_mgr_destroy +ffffffff81f75490 t dcn314_enable_pme_wa +ffffffff81f754a0 t dcn314_notify_wm_ranges +ffffffff81f76000 T dcn314_smu_get_smu_version +ffffffff81f76020 t dcn314_smu_send_msg_with_param +ffffffff81f76240 T dcn314_smu_set_dispclk +ffffffff81f762b0 T dcn314_smu_set_dprefclk +ffffffff81f76320 T dcn314_smu_set_hard_min_dcfclk +ffffffff81f763a0 T dcn314_smu_set_min_deep_sleep_dcfclk +ffffffff81f76420 T dcn314_smu_set_dppclk +ffffffff81f76490 T dcn314_smu_set_display_idle_optimization +ffffffff81f764e0 T dcn314_smu_enable_phy_refclk_pwrdwn +ffffffff81f76530 T dcn314_smu_enable_pme_wa +ffffffff81f76570 T dcn314_smu_set_dram_addr_high +ffffffff81f765b0 T dcn314_smu_set_dram_addr_low +ffffffff81f765f0 T dcn314_smu_transfer_dpm_table_smu_2_dram +ffffffff81f76630 T dcn314_smu_transfer_wm_table_dram_2_smu +ffffffff81f76670 T dcn314_smu_set_zstate_support +ffffffff81f766c0 T dcn314_smu_set_dtbclk +ffffffff81f77000 T dcn315_clk_mgr_construct +ffffffff81f779c0 T dcn315_clk_mgr_destroy +ffffffff81f77a10 t dcn315_update_clocks +ffffffff81f78000 t dcn315_enable_pme_wa +ffffffff81f78010 t dcn315_notify_wm_ranges +ffffffff81f79000 T dcn315_smu_get_smu_version +ffffffff81f79020 t dcn315_smu_send_msg_with_param +ffffffff81f791b0 T dcn315_smu_set_dispclk +ffffffff81f79220 T dcn315_smu_set_hard_min_dcfclk +ffffffff81f792a0 T dcn315_smu_set_min_deep_sleep_dcfclk +ffffffff81f79320 T dcn315_smu_set_dppclk +ffffffff81f79390 T dcn315_smu_set_display_idle_optimization +ffffffff81f793e0 T dcn315_smu_enable_phy_refclk_pwrdwn +ffffffff81f79430 T dcn315_smu_enable_pme_wa +ffffffff81f79470 T dcn315_smu_set_dram_addr_high +ffffffff81f794b0 T dcn315_smu_set_dram_addr_low +ffffffff81f794f0 T dcn315_smu_transfer_dpm_table_smu_2_dram +ffffffff81f79530 T dcn315_smu_transfer_wm_table_dram_2_smu +ffffffff81f79570 T dcn315_smu_get_dpref_clk +ffffffff81f795d0 T dcn315_smu_get_dtbclk +ffffffff81f79630 T dcn315_smu_set_dtbclk +ffffffff81f7a000 T dcn316_clk_mgr_construct +ffffffff81f7a6a0 T dcn316_clk_mgr_destroy +ffffffff81f7a6f0 t dcn316_update_clocks +ffffffff81f7ad20 t dcn316_enable_pme_wa +ffffffff81f7ad30 t dcn316_notify_wm_ranges +ffffffff81f7b0c0 t find_clk_for_voltage +ffffffff81f7c000 T dcn316_smu_get_smu_version +ffffffff81f7c020 t dcn316_smu_send_msg_with_param +ffffffff81f7c1b0 T dcn316_smu_set_dispclk +ffffffff81f7c220 T dcn316_smu_set_hard_min_dcfclk +ffffffff81f7c2a0 T dcn316_smu_set_min_deep_sleep_dcfclk +ffffffff81f7c320 T dcn316_smu_set_dppclk +ffffffff81f7c390 T dcn316_smu_set_display_idle_optimization +ffffffff81f7c3e0 T dcn316_smu_enable_phy_refclk_pwrdwn +ffffffff81f7c430 T dcn316_smu_set_dram_addr_high +ffffffff81f7c470 T dcn316_smu_set_dram_addr_low +ffffffff81f7c4b0 T dcn316_smu_transfer_dpm_table_smu_2_dram +ffffffff81f7c4f0 T dcn316_smu_transfer_wm_table_dram_2_smu +ffffffff81f7c530 T dcn316_smu_enable_pme_wa +ffffffff81f7c570 T dcn316_smu_set_dtbclk +ffffffff81f7c5b0 T dcn316_smu_get_dpref_clk +ffffffff81f7c610 T dcn316_smu_get_smu_fclk +ffffffff81f7d000 T dcn32_init_clocks +ffffffff81f7d4e0 T dcn32_clk_mgr_construct +ffffffff81f7d770 T dcn32_clk_mgr_destroy +ffffffff81f7d7e0 t dcn32_update_clocks +ffffffff81f7df30 t dcn32_dump_clk_registers +ffffffff81f7e150 t dcn32_enable_pme_wa +ffffffff81f7e190 t dcn32_are_clock_states_equal +ffffffff81f7e200 t dcn32_notify_wm_ranges +ffffffff81f7e380 t dcn32_set_hard_min_memclk +ffffffff81f7e420 t dcn32_set_hard_max_memclk +ffffffff81f7e480 t dcn32_get_memclk_states_from_smu +ffffffff81f7e670 t dcn32_is_smu_present +ffffffff81f7f000 T dcn32_smu_send_fclk_pstate_message +ffffffff81f7f020 t dcn32_smu_send_msg_with_param +ffffffff81f7f160 T dcn32_smu_send_cab_for_uclk_message +ffffffff81f7f190 T dcn32_smu_transfer_wm_table_dram_2_smu +ffffffff81f7f1b0 T dcn32_smu_set_pme_workaround +ffffffff81f7f1d0 T dcn32_smu_set_hard_min_by_freq +ffffffff81f80000 T dc_stream_adjust_vmin_vmax +ffffffff81f80180 T dc_stream_get_last_used_drr_vtotal +ffffffff81f802e0 T dc_stream_get_crtc_position +ffffffff81f80510 T dc_stream_configure_crc +ffffffff81f80760 T dc_stream_get_crc +ffffffff81f80840 T dc_stream_set_dyn_expansion +ffffffff81f80ab0 T dc_stream_set_dither_option +ffffffff81f80c20 T dc_stream_set_gamut_remap +ffffffff81f80da0 T dc_stream_program_csc_matrix +ffffffff81f80fc0 T dc_stream_set_static_screen_params +ffffffff81f81150 T dc_create +ffffffff81f81af0 t dc_construct_ctx +ffffffff81f81c50 t dc_destruct +ffffffff81f81f20 T dc_hardware_init +ffffffff81f82030 T dc_init_callbacks +ffffffff81f82060 T dc_deinit_callbacks +ffffffff81f82090 T dc_destroy +ffffffff81f820e0 T dc_validate_boot_timing +ffffffff81f82470 T dc_enable_stereo +ffffffff81f82570 T dc_trigger_sync +ffffffff81f82b90 T dc_z10_restore +ffffffff81f82bd0 T dc_z10_save_init +ffffffff81f82c10 T dc_commit_state +ffffffff81f82d40 t dc_commit_state_no_check +ffffffff81f841c0 T dc_acquire_release_mpc_3dlut +ffffffff81f842b0 T dc_post_update_surfaces_to_stream +ffffffff81f846c0 T dc_create_state +ffffffff81f84750 T dc_copy_state +ffffffff81f84940 T dc_retain_state +ffffffff81f84970 T dc_release_state +ffffffff81f849e0 T dc_set_generic_gpio_for_stereo +ffffffff81f84af0 T dc_check_update_surfaces_for_stream +ffffffff81f85760 T dc_dmub_update_dirty_rect +ffffffff81f859f0 T dc_update_planes_and_stream +ffffffff81f86140 t commit_minimal_transition_state +ffffffff81f864d0 t commit_planes_for_stream +ffffffff81f87bc0 T dc_commit_updates_for_stream +ffffffff81f87fc0 t copy_surface_update_to_plane +ffffffff81f883c0 t copy_stream_update_to_stream +ffffffff81f889f0 T dc_get_current_stream_count +ffffffff81f88a30 T dc_get_stream_at_index +ffffffff81f88a80 T dc_interrupt_to_irq_source +ffffffff81f88aa0 T dc_interrupt_set +ffffffff81f88af0 T dc_interrupt_ack +ffffffff81f88b10 T dc_power_down_on_boot +ffffffff81f88b60 T dc_set_power_state +ffffffff81f88d50 T dc_resume +ffffffff81f88dc0 T dc_is_dmcu_initialized +ffffffff81f88e10 T dc_is_oem_i2c_device_present +ffffffff81f88e60 T dc_submit_i2c +ffffffff81f88e90 T dc_submit_i2c_oem +ffffffff81f88ee0 T dc_link_add_remote_sink +ffffffff81f89070 T dc_link_remove_remote_sink +ffffffff81f89160 T get_clock_requirements_for_state +ffffffff81f891e0 T dc_set_clock +ffffffff81f89220 T dc_get_clock +ffffffff81f89260 T dc_set_psr_allow_active +ffffffff81f89360 T dc_allow_idle_optimizations +ffffffff81f89400 T dc_unlock_memory_clock_frequency +ffffffff81f89470 T dc_lock_memory_clock_frequency +ffffffff81f89500 T dc_enable_dcmode_clk_limit +ffffffff81f89610 t blank_and_force_memclk +ffffffff81f897f0 T dc_is_plane_eligible_for_idle_optimizations +ffffffff81f89840 T dc_hardware_release +ffffffff81f89890 T dc_mclk_switch_using_fw_based_vblank_stretch_shut_down +ffffffff81f898d0 T dc_is_dmub_outbox_supported +ffffffff81f89930 T dc_enable_dmub_notifications +ffffffff81f89990 T dc_enable_dmub_outbox +ffffffff81f899d0 T dc_process_dmub_aux_transfer_async +ffffffff81f89b70 T get_link_index_from_dpia_port_index +ffffffff81f89c20 T dc_process_dmub_set_config_async +ffffffff81f89d10 T dc_process_dmub_set_mst_slots +ffffffff81f89e00 T dc_process_dmub_dpia_hpd_int_enable +ffffffff81f89ed0 T dc_disable_accelerated_mode +ffffffff81f89ef0 T dc_notify_vsync_int_state +ffffffff81f8a120 T dc_extended_blank_supported +ffffffff81f8b000 T pre_surface_trace +ffffffff81f8b030 T update_surface_trace +ffffffff81f8b060 T post_surface_trace +ffffffff81f8b090 T context_timing_trace +ffffffff81f8b240 T context_clock_trace +ffffffff81f8b270 T dc_status_to_str +ffffffff81f8c000 T find_color_matrix +ffffffff81f8c0b0 T color_space_to_black_color +ffffffff81f8c140 T hwss_wait_for_blank_complete +ffffffff81f8c1f0 T get_mpctree_visual_confirm_color +ffffffff81f8c250 T get_surface_visual_confirm_color +ffffffff81f8c300 T get_hdr_visual_confirm_color +ffffffff81f8c3b0 T get_subvp_visual_confirm_color +ffffffff81f8c4a0 T get_surface_tile_visual_confirm_color +ffffffff81f8d000 T get_hpd_gpio +ffffffff81f8d0e0 T dc_link_wait_for_t12 +ffffffff81f8d140 T dc_link_detect_sink +ffffffff81f8d2f0 T dc_link_is_dp_sink_present +ffffffff81f8d570 T reset_cur_dp_mst_topology +ffffffff81f8d5d0 T dc_link_detect +ffffffff81f8e940 T dc_link_get_hpd_state +ffffffff81f8e9b0 T link_create +ffffffff81f8fad0 T link_destroy +ffffffff81f8fc30 T dc_link_blank_all_dp_displays +ffffffff81f8fd00 T dc_link_blank_dp_stream +ffffffff81f8fe10 T dc_link_blank_all_edp_displays +ffffffff81f8fed0 T dc_power_alpm_dpcd_enable +ffffffff81f8ff40 T dc_link_validate_mode_timing +ffffffff81f90460 T dc_link_get_backlight_level +ffffffff81f905d0 T dc_link_get_target_backlight_pwm +ffffffff81f906e0 T dc_link_set_backlight_level +ffffffff81f90850 T dc_link_set_psr_allow_active +ffffffff81f90ad0 T dc_link_get_psr_state +ffffffff81f90c00 T dc_link_setup_psr +ffffffff81f91060 T dc_link_get_psr_residency +ffffffff81f91160 T dc_link_set_sink_vtotal_in_psr_active +ffffffff81f911e0 T dc_link_get_status +ffffffff81f91210 T core_link_resume +ffffffff81f91250 t program_hpd_filter +ffffffff81f913e0 T dc_link_allocate_mst_payload +ffffffff81f918c0 t update_mst_stream_alloc_table +ffffffff81f91b40 t dc_log_vcp_x_y +ffffffff81f91cd0 T dc_link_reduce_mst_payload +ffffffff81f92150 T dc_link_increase_mst_payload +ffffffff81f925d0 T core_link_enable_stream +ffffffff81f932b0 t disable_link +ffffffff81f933d0 t dc_link_update_sst_payload +ffffffff81f93610 T core_link_set_avmute +ffffffff81f93660 T core_link_disable_stream +ffffffff81f93cd0 t get_ext_hdmi_settings +ffffffff81f93f10 t write_i2c_retimer_setting +ffffffff81f945c0 t write_i2c_default_retimer_setting +ffffffff81f94c60 t write_i2c_redriver_setting +ffffffff81f94da0 T dc_link_enable_hpd_filter +ffffffff81f94f10 T dc_link_set_drive_settings +ffffffff81f94fe0 T dc_link_get_cur_link_res +ffffffff81f95130 T dc_link_set_preferred_link_settings +ffffffff81f95280 T dc_link_set_preferred_training_settings +ffffffff81f953c0 T dc_link_enable_hpd +ffffffff81f953d0 T dc_link_disable_hpd +ffffffff81f953e0 T dc_link_set_test_pattern +ffffffff81f95420 T dc_link_bandwidth_kbps +ffffffff81f954c0 T dc_link_should_enable_fec +ffffffff81f955e0 T dc_link_get_link_cap +ffffffff81f95630 T dc_link_overwrite_extended_receiver_cap +ffffffff81f95640 T dc_link_is_fec_supported +ffffffff81f95700 T dc_bandwidth_in_kbps_from_timing +ffffffff81f95860 T dc_get_cur_link_res_map +ffffffff81f95940 T dc_restore_link_res_map +ffffffff81f95a70 t read_current_link_settings_on_detect +ffffffff81f95c80 t enable_link_dp +ffffffff81f96000 T dal_ddc_i2c_payloads_add +ffffffff81f960c0 T dal_ddc_service_create +ffffffff81f96230 T dal_ddc_service_destroy +ffffffff81f962c0 T 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dce110_link_encoder_dp_set_phy_pattern +ffffffff81fd1b40 t set_dp_phy_pattern_hbr2_compliance_cp2520_2 +ffffffff81fd1d50 T dce110_link_encoder_update_mst_stream_allocation_table +ffffffff81fd1fd0 T dce110_link_encoder_connect_dig_be_to_fe +ffffffff81fd2100 T dce110_link_encoder_enable_hpd +ffffffff81fd2130 T dce110_link_encoder_disable_hpd +ffffffff81fd2160 T dce110_link_encoder_get_max_link_cap +ffffffff81fd3000 T dce_mem_input_construct +ffffffff81fd3060 T dce112_mem_input_construct +ffffffff81fd30c0 T dce120_mem_input_construct +ffffffff81fd3120 t dce_mi_program_display_marks +ffffffff81fd33f0 t dce_mi_allocate_dmif +ffffffff81fd3630 t dce_mi_free_dmif +ffffffff81fd3790 t dce_mi_program_surface_flip_and_addr +ffffffff81fd3ab0 t dce_mi_program_pte_vm +ffffffff81fd3c70 t dce_mi_program_surface_config +ffffffff81fd44f0 t dce_mi_is_flip_pending +ffffffff81fd4580 t program_nbp_watermark +ffffffff81fd4780 t dce112_mi_program_display_marks +ffffffff81fd4c90 t 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dce_transform_construct +ffffffff81fde1a0 t dce_transform_reset +ffffffff81fde1e0 t dce_transform_set_scaler +ffffffff81fdec80 t dce_transform_set_pixel_storage_depth +ffffffff81fdf140 t dce_transform_set_gamut_remap +ffffffff81fdf480 t program_multi_taps_filter +ffffffff81fe0000 T dmub_abm_create +ffffffff81fe00c0 T dmub_abm_destroy +ffffffff81fe0110 t dmub_abm_init +ffffffff81fe04f0 t dmub_abm_set_level +ffffffff81fe06b0 t dmub_abm_get_current_backlight +ffffffff81fe06e0 t dmub_abm_get_target_backlight +ffffffff81fe0710 t dmub_abm_init_config +ffffffff81fe0840 t dmub_abm_set_pause +ffffffff81fe1000 T dmub_hw_lock_mgr_cmd +ffffffff81fe10b0 T dmub_hw_lock_mgr_inbox0_cmd +ffffffff81fe10f0 T should_use_dmub_lock +ffffffff81fe2000 T dmub_enable_outbox_notification +ffffffff81fe3000 T dmub_psr_create +ffffffff81fe30a0 T dmub_psr_destroy +ffffffff81fe30f0 t dmub_psr_copy_settings +ffffffff81fe35a0 t dmub_psr_enable +ffffffff81fe3730 t dmub_psr_get_state +ffffffff81fe3a20 t dmub_psr_set_level +ffffffff81fe3b10 t dmub_psr_force_static +ffffffff81fe3bc0 t dmub_psr_get_residency +ffffffff81fe3c10 t dmub_psr_set_sink_vtotal_in_psr_active +ffffffff81fe3cd0 t dmub_psr_set_power_opt +ffffffff81fe4000 T dce100_enable_display_power_gating +ffffffff81fe40a0 T dce100_prepare_bandwidth +ffffffff81fe40f0 T dce100_optimize_bandwidth +ffffffff81fe4140 T dce100_hw_sequencer_construct +ffffffff81fe5000 T dce100_add_stream_to_ctx +ffffffff81fe50a0 T dce100_validate_plane +ffffffff81fe50e0 T dce100_find_first_free_match_stream_enc_for_link +ffffffff81fe5190 T dce100_create_resource_pool +ffffffff81fe5f40 t dce100_resource_destruct +ffffffff81fe6210 t dce100_destroy_resource_pool +ffffffff81fe6270 t dce100_panel_cntl_create +ffffffff81fe6300 t dce100_link_encoder_create +ffffffff81fe6410 t dce100_validate_bandwidth +ffffffff81fe6570 t dce100_validate_global +ffffffff81fe6600 t read_dce_straps +ffffffff81fe6660 t create_audio +ffffffff81fe6690 t dce100_stream_encoder_create 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dce110_timing_generator_program_timing_generator +ffffffff81ff43d0 T dce110_timing_generator_set_drr +ffffffff81ff4510 T dce110_timing_generator_set_static_screen_control +ffffffff81ff45a0 T dce110_timing_generator_get_vblank_counter +ffffffff81ff4600 T dce110_timing_generator_get_position +ffffffff81ff46a0 T dce110_timing_generator_get_crtc_scanoutpos +ffffffff81ff4790 T dce110_timing_generator_program_blanking +ffffffff81ff4a10 T dce110_timing_generator_set_test_pattern +ffffffff81ff4d00 T dce110_timing_generator_validate_timing +ffffffff81ff4de0 T dce110_timing_generator_wait_for_vblank +ffffffff81ff4f50 T dce110_timing_generator_is_counter_moving +ffffffff81ff4fd0 T dce110_timing_generator_wait_for_vactive +ffffffff81ff50b0 T dce110_timing_generator_setup_global_swap_lock +ffffffff81ff5210 T dce110_timing_generator_tear_down_global_swap_lock +ffffffff81ff5290 T dce110_timing_generator_enable_advanced_request +ffffffff81ff5330 T dce110_timing_generator_set_lock_master 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dce110_timing_generator_v_construct +ffffffff81ff7070 t dce110_timing_generator_v_program_timing +ffffffff81ff7350 t dce110_timing_generator_v_enable_crtc +ffffffff81ff73e0 t dce110_timing_generator_v_disable_crtc +ffffffff81ff7450 t dce110_timing_generator_v_is_counter_moving +ffffffff81ff74d0 t dce110_timing_generator_v_get_vblank_counter +ffffffff81ff7520 t dce110_timing_generator_v_set_early_control +ffffffff81ff7580 t dce110_timing_generator_v_wait_for_state +ffffffff81ff7710 t dce110_timing_generator_v_set_blank +ffffffff81ff77a0 t dce110_timing_generator_v_set_overscan_color_black +ffffffff81ff7840 t dce110_timing_generator_v_program_blank_color +ffffffff81ff78c0 t dce110_timing_generator_v_set_colors +ffffffff81ff79f0 t dce110_timing_generator_v_disable_vga +ffffffff81ff7a20 t dce110_timing_generator_v_did_triggered_reset_occur +ffffffff81ff7a60 t dce110_timing_generator_v_setup_global_swap_lock +ffffffff81ff7a80 t dce110_timing_generator_v_enable_reset_trigger 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dce112_compressor_program_compressed_surface_address_and_pitch +ffffffff81ff9b30 T dce112_compressor_program_lpt_control +ffffffff81ff9da0 T dce112_compressor_set_fbc_invalidation_triggers +ffffffff81ff9e30 T dce112_compressor_construct +ffffffff81ff9ef0 T dce112_compressor_create +ffffffff81ff9fe0 T dce112_compressor_destroy +ffffffff81ffb000 T dce112_hw_sequencer_construct +ffffffff81ffb050 t dce112_enable_display_power_gating +ffffffff81ffc000 T dce112_validate_bandwidth +ffffffff81ffc0c0 T resource_map_phy_clock_resources +ffffffff81ffc210 T dce112_add_stream_to_ctx +ffffffff81ffc2b0 T dce112_create_resource_pool +ffffffff81ffd650 t dce112_resource_destruct +ffffffff81ffd920 t dce112_destroy_resource_pool +ffffffff81ffd980 t dce112_panel_cntl_create +ffffffff81ffda10 t dce112_link_encoder_create +ffffffff81ffdb20 t dce112_validate_global +ffffffff81ffdbb0 t read_dce_straps +ffffffff81ffdc10 t create_audio +ffffffff81ffdc40 t dce112_stream_encoder_create +ffffffff81ffdce0 t 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+ffffffff82011380 T hubbub1_allow_self_refresh_control +ffffffff82011400 T hubbub1_is_allow_self_refresh_enabled +ffffffff82011470 T hubbub1_verify_allow_pstate_change_high +ffffffff82011630 T hubbub1_wm_change_req_wa +ffffffff820116d0 T hubbub1_program_urgent_watermarks +ffffffff82011ab0 T hubbub1_program_stutter_watermarks +ffffffff82011f10 T hubbub1_program_pstate_watermarks +ffffffff82012160 T hubbub1_program_watermarks +ffffffff82012290 T hubbub1_update_dchub +ffffffff820124c0 T hubbub1_toggle_watermark_change_req +ffffffff82012560 T hubbub1_soft_reset +ffffffff820125a0 T hubbub1_construct +ffffffff82012600 t hubbub1_get_dcc_compression_cap +ffffffff82012820 t hubbub1_dcc_support_swizzle +ffffffff820128b0 t hubbub1_dcc_support_pixel_format +ffffffff82013000 T hubp1_set_blank +ffffffff82013110 T hubp1_clear_underflow +ffffffff82013160 T hubp1_vready_workaround +ffffffff820131f0 T hubp1_program_tiling +ffffffff82013460 T hubp1_program_size +ffffffff820135f0 T hubp1_program_rotation +ffffffff82013760 T hubp1_program_pixel_format +ffffffff82013d30 T hubp1_program_surface_flip_and_addr +ffffffff820144c0 T hubp1_dcc_control +ffffffff82014580 T hubp1_program_surface_config +ffffffff82014690 T hubp1_program_requestor +ffffffff82014a60 T hubp1_program_deadline +ffffffff82015160 T hubp1_is_flip_pending +ffffffff82015270 T min_set_viewport +ffffffff82015560 T hubp1_read_state_common +ffffffff82016200 T hubp1_read_state +ffffffff820164d0 T hubp1_get_cursor_pitch +ffffffff82016570 T hubp1_cursor_set_attributes +ffffffff82016820 T hubp1_cursor_set_position +ffffffff82016b80 T hubp1_clk_cntl +ffffffff82016bd0 T hubp1_vtg_sel +ffffffff82016c10 T hubp1_in_blank +ffffffff82016c80 T hubp1_soft_reset +ffffffff82016cc0 T hubp1_set_flip_int +ffffffff82016d10 T hubp1_init +ffffffff82016d40 T dcn10_hubp_construct +ffffffff82016db0 t hubp1_setup +ffffffff82016e70 t hubp1_setup_interdependent +ffffffff820171e0 t hubp1_set_vm_system_aperture_settings +ffffffff82017400 t hubp1_set_vm_context0_settings +ffffffff820176e0 t hubp1_set_hubp_blank_en +ffffffff82017720 t hubp1_disconnect +ffffffff820177b0 t hubp1_disable_control +ffffffff820177f0 t hubp1_get_underflow_status +ffffffff82017860 t hubp1_wait_pipe_read_start +ffffffff82018000 T dcn10_lock_all_pipes +ffffffff82018100 T dcn10_log_hw_state +ffffffff82019d10 T dcn10_did_underflow_occur +ffffffff82019db0 T dcn10_enable_power_gating_plane +ffffffff82019f50 T dcn10_disable_vga +ffffffff8201a140 T dcn10_dpp_pg_control +ffffffff8201a390 T dcn10_hubp_pg_control +ffffffff8201a5e0 T dcn10_bios_golden_init +ffffffff8201a740 T dcn10_enable_stream_timing +ffffffff8201ab30 T dcn10_verify_allow_pstate_change_high +ffffffff8201ae90 T dcn10_plane_atomic_disconnect +ffffffff8201afc0 T dcn10_plane_atomic_power_down +ffffffff8201b100 T dcn10_plane_atomic_disable +ffffffff8201b260 T dcn10_disable_plane +ffffffff8201b420 T dcn10_init_pipes +ffffffff8201bb20 T dcn10_init_hw +ffffffff8201c110 T dcn10_power_down_on_boot +ffffffff8201c2b0 T dcn10_reset_hw_ctx_wrap +ffffffff8201c5d0 T dcn10_update_plane_addr +ffffffff8201c6f0 T dcn10_set_input_transfer_func +ffffffff8201c860 T dcn10_set_output_transfer_func +ffffffff8201c920 T dcn10_pipe_control_lock +ffffffff8201c9f0 T dcn10_cursor_lock +ffffffff8201cbb0 T dcn10_enable_vblanks_synchronization +ffffffff8201d330 T dcn10_enable_timing_synchronization +ffffffff8201d6f0 T dcn10_enable_per_frame_crtc_position_reset +ffffffff8201d8d0 T dcn10_program_gamut_remap +ffffffff8201dad0 T dcn10_program_output_csc +ffffffff8201dc00 T dcn10_update_visual_confirm_color +ffffffff8201dd00 T dcn10_update_mpcc +ffffffff8201df80 T dcn10_blank_pixel_data +ffffffff8201e0c0 T dcn10_set_hdr_multiplier +ffffffff8201e150 T dcn10_program_pipe +ffffffff8201ed10 T dcn10_wait_for_pending_cleared +ffffffff8201ee10 T dcn10_post_unlock_program_front_end +ffffffff8201f0c0 T dcn10_prepare_bandwidth +ffffffff8201f270 T dcn10_optimize_bandwidth +ffffffff8201f420 T dcn10_set_drr +ffffffff8201f520 T dcn10_get_position +ffffffff8201f5b0 T dcn10_set_static_screen_control +ffffffff8201f650 T dcn10_setup_stereo +ffffffff8201f7b0 T dcn10_wait_for_mpcc_disconnect +ffffffff8201f960 T dcn10_dummy_display_power_gating +ffffffff8201f990 T dcn10_update_pending_status +ffffffff8201fad0 T dcn10_update_dchub +ffffffff8201fb00 T dcn10_set_cursor_position +ffffffff82020040 T dcn10_set_cursor_attribute +ffffffff82020090 T dcn10_set_cursor_sdr_white_level +ffffffff82020160 T dcn10_get_vupdate_offset_from_vsync +ffffffff820201f0 T dcn10_calc_vupdate_position +ffffffff82020280 T dcn10_setup_periodic_interrupt +ffffffff82020390 T dcn10_setup_vupdate_interrupt +ffffffff82020450 T dcn10_unblank_stream +ffffffff82020560 T dcn10_send_immediate_sdp_message +ffffffff820205c0 T dcn10_set_clock +ffffffff820206d0 T dcn10_get_clock +ffffffff82020730 T dcn10_get_dcc_en_bits +ffffffff82021000 T snprintf_count +ffffffff82021090 T dcn10_clear_status_bits +ffffffff82021240 T dcn10_get_hw_state +ffffffff82023000 T dcn10_hw_sequencer_construct +ffffffff82024000 T dcn10_ipp_construct +ffffffff82024050 T dcn20_ipp_construct +ffffffff820240a0 t dcn10_ipp_destroy +ffffffff82025000 T dcn10_link_encoder_set_dp_phy_pattern_training_pattern +ffffffff820250b0 T dcn10_get_dig_frontend +ffffffff82025170 T enc1_configure_encoder +ffffffff820251f0 T dcn10_psr_program_dp_dphy_fast_training +ffffffff82025270 T dcn10_psr_program_secondary_packet +ffffffff820252f0 T dcn10_is_dig_enabled +ffffffff82025350 T dcn10_link_encoder_validate_dvi_output +ffffffff82025400 T dcn10_link_encoder_validate_dp_output +ffffffff82025440 T dcn10_link_encoder_construct +ffffffff82025630 T dcn10_link_encoder_validate_output_with_stream +ffffffff82025820 T dcn10_link_encoder_hw_init +ffffffff82025a20 T dcn10_aux_initialize +ffffffff82025ab0 T dcn10_link_encoder_destroy +ffffffff82025b00 T dcn10_link_encoder_setup +ffffffff82025c50 T dcn10_link_encoder_enable_tmds_output +ffffffff82025d40 T dcn10_link_encoder_enable_tmds_output_with_clk_pattern_wa +ffffffff82025e60 T dcn10_link_encoder_enable_dp_output +ffffffff82025fe0 T dcn10_link_encoder_enable_dp_mst_output +ffffffff82026160 T dcn10_link_encoder_disable_output +ffffffff82026340 T dcn10_link_encoder_dp_set_lane_settings +ffffffff820264e0 T dcn10_link_encoder_dp_set_phy_pattern +ffffffff82026c00 t set_dp_phy_pattern_hbr2_compliance_cp2520_2 +ffffffff82026e00 T dcn10_link_encoder_update_mst_stream_allocation_table +ffffffff820270e0 T dcn10_link_encoder_connect_dig_be_to_fe +ffffffff82027220 T dcn10_link_encoder_enable_hpd +ffffffff82027260 T dcn10_link_encoder_disable_hpd +ffffffff820272a0 T dcn10_get_dig_mode +ffffffff82027310 T dcn10_link_encoder_get_max_link_cap +ffffffff82027390 t program_pattern_symbols +ffffffff82028000 T mpc1_set_bg_color +ffffffff820281e0 T mpc1_get_mpcc +ffffffff82028270 T mpc1_update_stereo_mix +ffffffff820283a0 T mpc1_assert_idle_mpcc +ffffffff82028470 T mpc1_get_mpcc_for_dpp +ffffffff82028520 T mpc1_is_mpcc_idle +ffffffff82028610 T mpc1_assert_mpcc_idle_before_connect +ffffffff82028750 T mpc1_insert_plane +ffffffff82028ca0 T mpc1_remove_mpcc +ffffffff82029060 T mpc1_mpc_init +ffffffff82029380 T mpc1_mpc_init_single_inst +ffffffff82029570 T mpc1_init_mpcc_list_from_hw +ffffffff82029840 T mpc1_read_mpcc_state +ffffffff820299d0 T mpc1_cursor_lock +ffffffff82029a50 T mpc1_get_mpc_out_mux +ffffffff82029ad0 T dcn10_mpc_construct +ffffffff82029c50 t mpc1_update_blending +ffffffff8202a000 T opp1_program_bit_depth_reduction +ffffffff8202a400 T opp1_set_dyn_expansion +ffffffff8202a570 T opp1_program_fmt +ffffffff8202a870 T opp1_program_stereo +ffffffff8202a9a0 T opp1_pipe_clock_control +ffffffff8202a9e0 T opp1_destroy +ffffffff8202aa30 T dcn10_opp_construct +ffffffff8202b000 T optc1_program_global_sync +ffffffff8202b150 T optc1_setup_vertical_interrupt0 +ffffffff8202b1e0 T optc1_setup_vertical_interrupt1 +ffffffff8202b250 T optc1_setup_vertical_interrupt2 +ffffffff8202b2c0 T optc1_program_timing +ffffffff8202b970 T optc1_is_two_pixels_per_containter +ffffffff8202b9c0 T optc1_set_vtg_params +ffffffff8202bb00 T optc1_set_blank_data_double_buffer +ffffffff8202bb40 T optc1_set_timing_double_buffer +ffffffff8202bb80 T optc1_set_blank +ffffffff8202bc60 T optc1_is_blanked +ffffffff8202bce0 T optc1_enable_optc_clock +ffffffff8202bf00 T optc1_disable_crtc +ffffffff8202bff0 T optc1_program_blank_color +ffffffff8202c0a0 T optc1_validate_timing +ffffffff8202c1a0 T optc1_get_vblank_counter +ffffffff8202c200 T optc1_lock +ffffffff8202c2f0 T optc1_unlock +ffffffff8202c360 T optc1_get_position +ffffffff8202c3e0 T optc1_is_counter_moving +ffffffff8202c460 T optc1_did_triggered_reset_occur +ffffffff8202c500 T optc1_disable_reset_trigger +ffffffff8202c5c0 T optc1_enable_reset_trigger +ffffffff8202c6d0 T optc1_enable_crtc_reset +ffffffff8202c830 T optc1_wait_for_state +ffffffff8202c900 T optc1_set_early_control +ffffffff8202c930 T optc1_set_static_screen_control +ffffffff8202c9d0 T optc1_set_drr +ffffffff8202cc00 T optc1_set_vtotal_min_max +ffffffff8202cca0 T optc1_get_crtc_scanoutpos +ffffffff8202cdb0 T optc1_program_stereo +ffffffff8202cfb0 T optc1_is_stereo_left_eye +ffffffff8202d020 T optc1_get_hw_timing +ffffffff8202d140 T optc1_read_otg_state +ffffffff8202d450 T optc1_get_otg_active_size +ffffffff8202d560 T optc1_clear_optc_underflow +ffffffff8202d5b0 T optc1_tg_init +ffffffff8202d660 T optc1_is_tg_enabled +ffffffff8202d6d0 T optc1_is_optc_underflow_occurred +ffffffff8202d740 T optc1_configure_crc +ffffffff8202d9d0 T optc1_get_crc +ffffffff8202dae0 T dcn10_timing_generator_init +ffffffff8202db50 t optc1_enable_crtc +ffffffff8202dc50 t optc1_set_test_pattern +ffffffff8202e330 t optc1_program_manual_trigger +ffffffff8202e3e0 t optc1_setup_manual_trigger +ffffffff8202f000 T dcn10_find_first_free_match_stream_enc_for_link +ffffffff8202f0b0 T dcn10_create_resource_pool +ffffffff82030260 t dcn10_resource_construct_fp +ffffffff820303e0 t dcn10_resource_destruct +ffffffff820306f0 t dcn10_destroy_resource_pool +ffffffff82030750 t dcn10_panel_cntl_create +ffffffff820307e0 t dcn10_link_encoder_create +ffffffff820308e0 t dcn10_validate_bandwidth +ffffffff82030960 t dcn10_validate_global +ffffffff82030b40 t dcn10_acquire_idle_pipe_for_layer +ffffffff82030c80 t dcn10_validate_plane +ffffffff82030cd0 t dcn10_add_stream_to_ctx +ffffffff82030e90 t dcn10_patch_unknown_plane_state +ffffffff82030ef0 t read_dce_straps +ffffffff82030f20 t create_audio +ffffffff82030f50 t dcn10_stream_encoder_create +ffffffff82030ff0 t dcn10_hwseq_create +ffffffff820310a0 t dcn10_get_dcc_compression_cap +ffffffff82032000 T enc1_update_generic_info_packet +ffffffff82032430 T enc1_stream_encoder_dp_set_stream_attribute +ffffffff82032900 T enc1_stream_encoder_set_stream_attribute_helper +ffffffff82032980 T enc1_stream_encoder_hdmi_set_stream_attribute +ffffffff82032f70 T enc1_stream_encoder_dvi_set_stream_attribute +ffffffff82033100 T enc1_stream_encoder_set_throttled_vcp_size +ffffffff82033320 T enc1_stream_encoder_update_dp_info_packets +ffffffff820334c0 T enc1_stream_encoder_send_immediate_sdp_message +ffffffff820338d0 T enc1_stream_encoder_stop_dp_info_packets +ffffffff82033aa0 T enc1_stream_encoder_dp_blank +ffffffff82033c10 T enc1_stream_encoder_dp_unblank +ffffffff82033e20 T enc1_stream_encoder_set_avmute +ffffffff82033e60 T enc1_reset_hdmi_stream_attribute +ffffffff82033f30 T get_audio_clock_info +ffffffff82034020 T enc1_se_enable_audio_clock +ffffffff82034080 T enc1_se_enable_dp_audio +ffffffff82034150 T enc1_se_audio_mute_control +ffffffff820341a0 T enc1_se_dp_audio_setup +ffffffff820341b0 t enc1_se_audio_setup +ffffffff82034340 T enc1_se_dp_audio_enable +ffffffff82034590 T enc1_se_dp_audio_disable +ffffffff82034700 T enc1_se_hdmi_audio_setup +ffffffff82034bd0 T enc1_se_hdmi_audio_disable +ffffffff82034c60 T enc1_setup_stereo_sync +ffffffff82034ce0 T enc1_dig_connect_to_otg +ffffffff82034d20 T enc1_dig_source_otg +ffffffff82034d90 T enc1_stream_encoder_dp_get_pixel_format +ffffffff82034e80 T dcn10_stream_encoder_construct +ffffffff82034ee0 t enc1_stream_encoder_update_hdmi_info_packets +ffffffff82035290 t enc1_stream_encoder_stop_hdmi_info_packets +ffffffff82036000 T dccg2_update_dpp_dto +ffffffff82036160 T dccg2_get_dccg_ref_freq +ffffffff82036220 T dccg2_set_fifo_errdet_ovr_en +ffffffff82036260 T dccg2_otg_add_pixel +ffffffff82036300 T dccg2_otg_drop_pixel +ffffffff820363a0 T dccg2_init +ffffffff820363d0 T dccg2_create +ffffffff82036480 T dcn_dccg_destroy +ffffffff82037000 T dpp20_read_state +ffffffff820371d0 T dpp2_power_on_obuf +ffffffff820372a0 T dpp2_dummy_program_input_lut +ffffffff820372d0 T dscl2_calc_lb_num_partitions +ffffffff820373f0 T dpp2_cnv_set_alpha_keyer +ffffffff82037670 T dpp2_set_cursor_attributes +ffffffff820377d0 T oppn20_dummy_program_regamma_pwl +ffffffff82037800 T dpp2_construct +ffffffff82037880 t dpp2_cnv_setup +ffffffff82039000 T dpp2_set_degamma_pwl +ffffffff820393b0 T dpp2_set_degamma +ffffffff82039560 T dpp2_cm_set_gamut_remap +ffffffff82039790 T dpp2_program_input_csc +ffffffff820399c0 T dpp20_program_blnd_lut +ffffffff8203a110 T dpp20_program_shaper +ffffffff8203c0a0 T dpp20_program_3dlut +ffffffff8203c7a0 t dpp20_set3dlut_ram12 +ffffffff8203c970 T dpp2_set_hdr_multiplier +ffffffff8203d000 t dsc2_get_enc_caps +ffffffff8203d080 t dsc2_read_state +ffffffff8203d230 t dsc2_validate_stream +ffffffff8203d290 t dsc2_set_config +ffffffff8203e620 t dsc2_get_packed_pps +ffffffff8203e7c0 t dsc2_enable +ffffffff8203e970 t dsc2_disable +ffffffff8203eaf0 t dsc2_disconnect +ffffffff8203eb60 T dsc2_construct +ffffffff8203ebb0 t dsc_prepare_config +ffffffff8203f270 t dsc_log_pps +ffffffff82040000 T dwb2_config_dwb_cnv +ffffffff820401f0 T dwb2_disable +ffffffff82040300 T dwb2_is_enabled +ffffffff820403a0 T dwb2_set_stereo +ffffffff82040490 T dwb2_set_new_content +ffffffff82040500 T dwb2_set_scaler +ffffffff82040890 t dwb2_get_caps +ffffffff82040970 t dwb2_enable +ffffffff82040ad0 t dwb2_update +ffffffff82040c30 t dwb2_set_warmup +ffffffff82040da0 T dcn20_dwbc_construct +ffffffff82041000 T dwb_program_horz_scalar +ffffffff820414c0 t wbscl_get_filter_coeffs_16p +ffffffff82041990 t wbscl_set_scaler_filter +ffffffff82041ba0 T dwb_program_vert_scalar +ffffffff82043000 T hubbub2_dcc_support_swizzle +ffffffff820430c0 T hubbub2_dcc_support_pixel_format +ffffffff82043110 T hubbub2_get_dcc_compression_cap +ffffffff82043350 T hubbub2_init_vm_ctx +ffffffff820434a0 T hubbub2_init_dchub_sys_ctx +ffffffff820436f0 T hubbub2_update_dchub +ffffffff820438f0 T hubbub2_wm_read_state +ffffffff82043c80 T hubbub2_get_dchub_ref_freq +ffffffff82043d60 T hubbub2_read_state +ffffffff82043eb0 T hubbub2_construct +ffffffff82043f10 t hubbub2_program_watermarks +ffffffff82045000 T hubp2_set_vm_system_aperture_settings +ffffffff820451e0 T hubp2_program_deadline +ffffffff82045930 T hubp2_vready_at_or_After_vsync +ffffffff820459d0 T hubp2_setup_interdependent +ffffffff82045e40 T hubp2_program_size +ffffffff82045fd0 T hubp2_program_rotation +ffffffff82046140 T hubp2_dcc_control +ffffffff82046200 T hubp2_program_pixel_format +ffffffff820467d0 T hubp2_program_surface_config +ffffffff82046a10 T hubp2_get_lines_per_chunk +ffffffff82046ad0 T hubp2_cursor_set_attributes +ffffffff82046e90 T hubp2_dmdata_set_attributes +ffffffff82047270 T hubp2_dmdata_load +ffffffff82047300 T hubp2_dmdata_status_done +ffffffff82047370 T hubp2_program_surface_flip_and_addr +ffffffff82047ac0 T hubp2_enable_triplebuffer +ffffffff82047b90 T hubp2_is_triplebuffer_enabled +ffffffff82047c10 T hubp2_set_flip_control_surface_gsl +ffffffff82047c60 T hubp2_is_flip_pending +ffffffff82047d70 T hubp2_set_blank +ffffffff82047dd0 T hubp2_set_blank_regs +ffffffff82047ed0 T hubp2_cursor_set_position +ffffffff820482f0 T hubp2_clk_cntl +ffffffff82048340 T hubp2_vtg_sel +ffffffff82048380 T hubp2_clear_underflow +ffffffff820483d0 T hubp2_read_state_common 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mpc3_set_gamut_remap +ffffffff82096a10 T mpc3_program_3dlut +ffffffff820971a0 t mpc3_set3dlut_ram12 +ffffffff82097380 T mpc3_set_output_csc +ffffffff820974f0 T mpc3_set_ocsc_default +ffffffff82097660 T mpc3_set_rmu_mux +ffffffff82097700 T mpc3_get_rmu_mux_status +ffffffff820977b0 T mpcc3_acquire_rmu +ffffffff82097910 t mpcc3_release_rmu +ffffffff82097a80 t mpc3_set_mpc_mem_lp_mode +ffffffff82097c10 T dcn30_mpc_construct +ffffffff82098000 T optc3_triplebuffer_lock +ffffffff82098120 T optc3_lock_doublebuffer_enable +ffffffff820983b0 T optc3_lock_doublebuffer_disable +ffffffff820984c0 T optc3_lock +ffffffff82098590 T optc3_set_out_mux +ffffffff820985d0 T optc3_program_blank_color +ffffffff82098710 T optc3_set_drr_trigger_window +ffffffff820987a0 T optc3_set_vtotal_change_limit +ffffffff82098810 T optc3_set_dsc_config +ffffffff82098860 T optc3_set_odm_bypass +ffffffff820989e0 T optc3_wait_drr_doublebuffer_pending_clear +ffffffff82098a60 T optc3_set_vtotal_min_max +ffffffff82098a80 T optc3_tg_init +ffffffff82098ae0 T dcn30_timing_generator_init +ffffffff82098b50 t optc3_set_odm_combine +ffffffff82099000 T dcn30_add_stream_to_ctx +ffffffff82099020 T dcn30_populate_dml_pipes_from_context +ffffffff82099110 T dcn30_populate_dml_writeback_from_context +ffffffff82099170 T dcn30_calc_max_scaled_time +ffffffff820991d0 T dcn30_set_mcif_arb_params +ffffffff82099340 T dcn30_acquire_post_bldn_3dlut +ffffffff820994c0 T dcn30_release_post_bldn_3dlut +ffffffff82099570 T dcn30_internal_validate_bw +ffffffff8209a350 t dcn30_split_stream_for_mpc_or_odm +ffffffff8209a670 T dcn30_can_support_mclk_switch_using_fw_based_vblank_stretch +ffffffff8209a790 T dcn30_setup_mclk_switch_using_fw_based_vblank_stretch +ffffffff8209a830 T dcn30_update_soc_for_wm_a +ffffffff8209a880 T dcn30_calculate_wm_and_dlg +ffffffff8209a8f0 T dcn30_validate_bandwidth +ffffffff8209ad20 T dcn30_update_bw_bounding_box +ffffffff8209b500 T dcn30_create_resource_pool +ffffffff8209cac0 t dcn30_resource_destruct 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dcn303_dpp_pg_control +ffffffff820aa030 T dcn303_hubp_pg_control +ffffffff820aa060 T dcn303_dsc_pg_control +ffffffff820aa090 T dcn303_enable_power_gating_plane +ffffffff820ab000 T dcn303_hw_sequencer_construct +ffffffff820ac000 T dcn303_update_bw_bounding_box +ffffffff820ac050 T dcn303_create_resource_pool +ffffffff820ad290 t dcn303_resource_destruct +ffffffff820ad7b0 t dcn303_destroy_resource_pool +ffffffff820ad800 t dcn303_panel_cntl_create +ffffffff820ad890 t dcn303_link_encoder_create +ffffffff820ad950 t read_dce_straps +ffffffff820ad980 t dcn303_create_audio +ffffffff820ad9b0 t dcn303_stream_encoder_create +ffffffff820adb30 t dcn303_hwseq_create +ffffffff820ae000 T afmt31_powerdown +ffffffff820ae090 T afmt31_poweron +ffffffff820ae120 T afmt31_construct +ffffffff820af000 T apg31_construct +ffffffff820af050 t apg31_se_audio_setup +ffffffff820af160 t apg31_audio_mute_control +ffffffff820af1a0 t apg31_enable +ffffffff820af2b0 t apg31_disable +ffffffff820b0000 T dccg31_update_dpp_dto +ffffffff820b01c0 T dccg31_set_dpstreamclk +ffffffff820b0350 t dccg31_disable_dpstreamclk +ffffffff820b04a0 T dccg31_enable_symclk32_se +ffffffff820b0790 T dccg31_disable_symclk32_se +ffffffff820b0a60 T dccg31_enable_symclk32_le +ffffffff820b0c30 T dccg31_disable_symclk32_le +ffffffff820b0dd0 T dccg31_disable_dscclk +ffffffff820b0f90 T dccg31_enable_dscclk +ffffffff820b1160 T dccg31_set_physymclk +ffffffff820b1680 T dccg31_set_dtbclk_dto +ffffffff820b1930 T dccg31_set_audio_dtbclk_dto +ffffffff820b1a40 T dccg31_get_dccg_ref_freq +ffffffff820b1a70 T dccg31_set_dispclk_change_mode +ffffffff820b1ac0 T dccg31_init +ffffffff820b2020 T dccg31_otg_add_pixel +ffffffff820b2060 T dccg31_otg_drop_pixel +ffffffff820b20a0 T dccg31_create +ffffffff820b3000 T dcn31_link_encoder_set_dio_phy_mux +ffffffff820b3390 T dcn31_link_encoder_construct +ffffffff820b3590 T dcn31_link_encoder_construct_minimal +ffffffff820b3610 T dcn31_link_encoder_enable_dp_output +ffffffff820b3850 T dcn31_link_encoder_enable_dp_mst_output +ffffffff820b3a90 T dcn31_link_encoder_disable_output +ffffffff820b3d20 T dcn31_link_encoder_is_in_alt_mode +ffffffff820b3e60 T dcn31_link_encoder_get_max_link_cap +ffffffff820b3fd0 t enc31_hw_init +ffffffff820b5000 T dcn31_hpo_dp_link_enc_enable +ffffffff820b5160 T dcn31_hpo_dp_link_enc_disable +ffffffff820b51d0 T dcn31_hpo_dp_link_enc_set_link_test_pattern +ffffffff820b5b00 T dcn31_hpo_dp_link_enc_update_stream_allocation_table +ffffffff820b5d90 T dcn31_hpo_dp_link_enc_set_throttled_vcp_size +ffffffff820b6030 T dcn31_hpo_dp_link_enc_read_state +ffffffff820b62e0 T dcn31_hpo_dp_link_enc_enable_dp_output +ffffffff820b63e0 T dcn31_hpo_dp_link_enc_disable_output +ffffffff820b6520 T dcn31_hpo_dp_link_enc_set_ffe +ffffffff820b6610 T hpo_dp_link_encoder31_construct +ffffffff820b6670 t dcn31_hpo_dp_link_enc_is_in_alt_mode +ffffffff820b7000 T dcn31_hpo_dp_stream_encoder_construct +ffffffff820b7070 t dcn31_hpo_dp_stream_enc_enable_stream +ffffffff820b71b0 t dcn31_hpo_dp_stream_enc_dp_unblank +ffffffff820b7460 t dcn31_hpo_dp_stream_enc_dp_blank +ffffffff820b7560 t dcn31_hpo_dp_stream_enc_disable +ffffffff820b75d0 t dcn31_hpo_dp_stream_enc_set_stream_attribute +ffffffff820b7e80 t dcn31_hpo_dp_stream_enc_update_dp_info_packets +ffffffff820b8040 t dcn31_hpo_dp_stream_enc_stop_dp_info_packets +ffffffff820b81d0 t dcn31_hpo_dp_stream_enc_set_dsc_pps_info_packet +ffffffff820b8470 t dcn31_hpo_dp_stream_enc_map_stream_to_link +ffffffff820b8570 t dcn31_hpo_dp_stream_enc_mute_control +ffffffff820b85e0 t dcn31_hpo_dp_stream_enc_audio_setup +ffffffff820b8690 t dcn31_hpo_dp_stream_enc_audio_enable +ffffffff820b8760 t dcn31_hpo_dp_stream_enc_audio_disable +ffffffff820b8910 t dcn31_hpo_dp_stream_enc_read_state +ffffffff820b8aa0 t dcn31_set_hblank_min_symbol_width +ffffffff820b9000 T hubbub31_init_dchub_sys_ctx +ffffffff820b91f0 T hubbub31_construct +ffffffff820b9290 t hubbub31_get_dcc_compression_cap +ffffffff820b9480 t hubbub31_get_dchub_ref_freq +ffffffff820b9560 t hubbub31_program_watermarks +ffffffff820bae20 t hubbub31_verify_allow_pstate_change_high +ffffffff820bafe0 t dcn31_program_det_size +ffffffff820bb1a0 t dcn31_program_compbuf_size +ffffffff820bb420 t dcn31_init_crb +ffffffff820bc000 T hubp31_set_unbounded_requesting +ffffffff820bc090 T hubp31_soft_reset +ffffffff820bc0e0 T hubp31_construct +ffffffff820bc150 t hubp31_program_extended_blank +ffffffff820bd000 T dcn31_init_hw +ffffffff820bd960 T dcn31_dsc_pg_control +ffffffff820bdcb0 T dcn31_enable_power_gating_plane +ffffffff820bdf10 T dcn31_update_info_frame +ffffffff820bdfe0 T dcn31_z10_save_init +ffffffff820be0a0 T dcn31_z10_restore +ffffffff820be180 T dcn31_hubp_pg_control +ffffffff820be4a0 T dcn31_init_sys_ctx +ffffffff820be550 T dcn31_reset_hw_ctx_wrap +ffffffff820be8c0 T dcn31_setup_hpo_hw_control +ffffffff820bf000 T dcn31_hw_sequencer_construct +ffffffff820c0000 T optc31_immediate_disable_crtc +ffffffff820c0100 T optc31_set_drr +ffffffff820c0320 T optc3_init_odm +ffffffff820c0490 T dcn31_timing_generator_init +ffffffff820c0500 t optc31_enable_crtc +ffffffff820c0600 t optc31_disable_crtc +ffffffff820c06e0 t optc31_set_odm_combine +ffffffff820c1000 T dcn31_panel_cntl_construct +ffffffff820c1040 t dcn31_panel_cntl_destroy +ffffffff820c1090 t dcn31_panel_cntl_hw_init +ffffffff820c1180 t dcn31_is_panel_backlight_on +ffffffff820c1220 t dcn31_is_panel_powered_on +ffffffff820c12d0 t dcn31_store_backlight_level +ffffffff820c1390 t dcn31_get_16_bit_backlight_from_pwm +ffffffff820c2000 T dcn31_populate_dml_pipes_from_context +ffffffff820c2350 T dcn31_calculate_wm_and_dlg +ffffffff820c23d0 T dcn31_populate_dml_writeback_from_context +ffffffff820c2430 T dcn31_set_mcif_arb_params +ffffffff820c2490 T dcn31_validate_bandwidth +ffffffff820c2870 T dcn31_create_resource_pool +ffffffff820c3c10 t dcn31_resource_destruct +ffffffff820c4270 t dcn31_destroy_resource_pool +ffffffff820c42d0 t dcn31_panel_cntl_create +ffffffff820c4340 t dcn31_link_encoder_create +ffffffff820c4400 t dcn31_link_enc_create_minimal +ffffffff820c44a0 t dcn31_get_panel_config_defaults +ffffffff820c4510 t read_dce_straps +ffffffff820c4540 t dcn31_create_audio +ffffffff820c4570 t dcn31_stream_encoder_create +ffffffff820c46f0 t dcn31_hpo_dp_stream_encoder_create +ffffffff820c48b0 t dcn31_hpo_dp_link_encoder_create +ffffffff820c4940 t dcn31_hwseq_create +ffffffff820c5000 T vpg31_powerdown +ffffffff820c5090 T vpg31_poweron +ffffffff820c5120 T vpg31_construct +ffffffff820c6000 T dccg314_create +ffffffff820c60b0 t dccg314_set_dpstreamclk +ffffffff820c6480 t dccg314_set_dtbclk_dto +ffffffff820c6670 t dccg314_set_pixel_rate_div +ffffffff820c69e0 t dccg314_set_valid_pixel_rate +ffffffff820c7000 T dcn314_dio_stream_encoder_construct +ffffffff820c7070 t enc314_stream_encoder_hdmi_set_stream_attribute +ffffffff820c7660 t enc314_stream_encoder_dvi_set_stream_attribute +ffffffff820c7870 t enc314_stream_encoder_dp_blank +ffffffff820c78c0 t enc314_stream_encoder_dp_unblank +ffffffff820c7c00 t enc314_read_state +ffffffff820c7d60 t enc314_dp_set_dsc_config +ffffffff820c7db0 t enc314_dp_set_odm_combine +ffffffff820c7df0 t enc314_set_dig_input_mode +ffffffff820c7e40 t enc314_enable_fifo +ffffffff820c7ee0 t enc314_disable_fifo +ffffffff820c7f30 t enc314_reset_fifo +ffffffff820c9000 T dcn314_update_odm +ffffffff820c9610 T dcn314_dsc_pg_control +ffffffff820c99e0 T dcn314_enable_power_gating_plane +ffffffff820c9c70 T dcn314_calculate_dccg_k1_k2_values +ffffffff820c9e00 T dcn314_set_pixels_per_cycle +ffffffff820c9ef0 T dcn314_hubp_pg_control +ffffffff820cb000 T dcn314_hw_sequencer_construct +ffffffff820cc000 T dcn314_timing_generator_init +ffffffff820cc070 t optc314_enable_crtc +ffffffff820cc170 t optc314_disable_crtc +ffffffff820cc250 t optc314_phantom_crtc_post_enable +ffffffff820cc310 t optc314_set_odm_bypass +ffffffff820cc480 t optc314_set_odm_combine +ffffffff820cc780 t optc314_set_h_timing_div_manual_mode +ffffffff820cd000 T dcn314_create_resource_pool +ffffffff820ce2d0 t dcn314_resource_destruct +ffffffff820ce930 t dcn314_destroy_resource_pool +ffffffff820ce990 t dcn31_panel_cntl_create +ffffffff820cea00 t dcn31_link_encoder_create +ffffffff820ceac0 t dcn31_link_enc_create_minimal +ffffffff820ceb60 t dcn314_populate_dml_pipes_from_context +ffffffff820cebf0 t dcn314_update_bw_bounding_box +ffffffff820cec40 t dcn314_get_panel_config_defaults +ffffffff820cecb0 t read_dce_straps +ffffffff820cece0 t dcn31_create_audio +ffffffff820ced10 t dcn314_stream_encoder_create +ffffffff820cee90 t dcn31_hpo_dp_stream_encoder_create +ffffffff820cf050 t dcn31_hpo_dp_link_encoder_create +ffffffff820cf0e0 t dcn314_hwseq_create +ffffffff820d0000 T dcn315_create_resource_pool +ffffffff820d1270 t dcn315_resource_destruct +ffffffff820d18d0 t dcn315_destroy_resource_pool +ffffffff820d1930 t dcn31_panel_cntl_create +ffffffff820d19a0 t dcn31_link_encoder_create +ffffffff820d1a60 t dcn31_link_enc_create_minimal +ffffffff820d1b00 t dcn315_populate_dml_pipes_from_context +ffffffff820d1e50 t dcn315_get_panel_config_defaults +ffffffff820d1ec0 t read_dce_straps +ffffffff820d1ef0 t dcn31_create_audio +ffffffff820d1f20 t dcn315_stream_encoder_create +ffffffff820d20a0 t dcn31_hpo_dp_stream_encoder_create +ffffffff820d2260 t dcn31_hpo_dp_link_encoder_create +ffffffff820d22f0 t dcn31_hwseq_create +ffffffff820d3000 T dcn316_create_resource_pool +ffffffff820d42b0 t dcn316_resource_destruct +ffffffff820d4910 t dcn316_destroy_resource_pool +ffffffff820d4970 t dcn31_panel_cntl_create +ffffffff820d49e0 t dcn31_link_encoder_create +ffffffff820d4aa0 t dcn31_link_enc_create_minimal +ffffffff820d4b40 t dcn316_populate_dml_pipes_from_context +ffffffff820d4e70 t dcn316_get_panel_config_defaults +ffffffff820d4ee0 t read_dce_straps +ffffffff820d4f10 t dcn31_create_audio +ffffffff820d4f40 t dcn316_stream_encoder_create +ffffffff820d50c0 t dcn31_hpo_dp_stream_encoder_create +ffffffff820d5280 t dcn31_hpo_dp_link_encoder_create +ffffffff820d5310 t dcn31_hwseq_create +ffffffff820d6000 T dccg32_create +ffffffff820d60b0 t dccg32_get_dccg_ref_freq +ffffffff820d60e0 t dccg32_otg_add_pixel +ffffffff820d6120 t dccg32_otg_drop_pixel +ffffffff820d6160 t dccg32_set_dpstreamclk +ffffffff820d6530 t dccg32_set_dtbclk_dto +ffffffff820d6730 t dccg32_set_pixel_rate_div +ffffffff820d6aa0 t dccg32_set_valid_pixel_rate +ffffffff820d7000 T enc32_hw_init +ffffffff820d7090 T dcn32_link_encoder_enable_dp_output +ffffffff820d70e0 T dcn32_link_encoder_construct +ffffffff820d72c0 t dcn32_link_encoder_is_in_alt_mode +ffffffff820d7340 t dcn32_link_encoder_get_max_link_cap +ffffffff820d8000 T dcn32_dio_stream_encoder_construct +ffffffff820d8070 t enc32_stream_encoder_hdmi_set_stream_attribute +ffffffff820d85a0 t enc32_stream_encoder_dvi_set_stream_attribute +ffffffff820d8720 t enc32_stream_encoder_dp_unblank +ffffffff820d8be0 t enc32_read_state +ffffffff820d8d40 t enc32_dp_set_dsc_config +ffffffff820d8d90 t enc32_dp_set_odm_combine +ffffffff820d8dd0 t enc32_set_dig_input_mode +ffffffff820d9000 T dpp32_construct +ffffffff820d9060 t dscl32_calc_lb_num_partitions +ffffffff820da000 T hpo_dp_link_encoder32_construct +ffffffff820da060 t dcn32_hpo_dp_link_enc_is_in_alt_mode +ffffffff820db000 T dcn32_program_det_size +ffffffff820db1a0 T hubbub32_program_urgent_watermarks +ffffffff820db910 T hubbub32_program_stutter_watermarks +ffffffff820dbd60 T hubbub32_program_pstate_watermarks +ffffffff820dc1f0 T hubbub32_program_usr_watermarks +ffffffff820dc440 T hubbub32_force_usr_retraining_allow +ffffffff820dc4c0 T hubbub32_force_wm_propagate_to_pipes +ffffffff820dc560 T hubbub32_construct +ffffffff820dc5e0 t hubbub32_wm_read_state +ffffffff820dca60 t hubbub32_program_watermarks +ffffffff820dcb70 t hubbub32_init_watermarks +ffffffff820dcfb0 t dcn32_program_compbuf_size +ffffffff820dd230 t dcn32_init_crb +ffffffff820de000 T hubp32_update_force_pstate_disallow +ffffffff820de090 T hubp32_update_mall_sel +ffffffff820de120 T hubp32_prepare_subvp_buffering +ffffffff820de1c0 T hubp32_phantom_hubp_post_enable +ffffffff820de2d0 T hubp32_cursor_set_attributes +ffffffff820de590 T hubp32_construct +ffffffff820df000 T dcn32_dsc_pg_control +ffffffff820df310 T dcn32_enable_power_gating_plane +ffffffff820df4b0 T dcn32_hubp_pg_control +ffffffff820df720 T dcn32_apply_idle_power_optimizations +ffffffff820df990 t dcn32_calculate_cab_allocation +ffffffff820dfd40 T dcn32_commit_subvp_config +ffffffff820dfdf0 T dcn32_subvp_pipe_control_lock +ffffffff820dffc0 T dcn32_set_mcm_luts +ffffffff820e0150 T dcn32_set_input_transfer_func +ffffffff820e0290 T dcn32_set_output_transfer_func +ffffffff820e04a0 T dcn32_subvp_update_force_pstate +ffffffff820e0610 T dcn32_update_mall_sel +ffffffff820e0790 T dcn32_program_mall_pipe_config +ffffffff820e0870 T dcn32_init_hw +ffffffff820e1060 T dcn32_update_odm +ffffffff820e1670 T dcn32_calculate_dccg_k1_k2_values +ffffffff820e1870 T dcn32_is_dp_dig_pixel_rate_div_policy +ffffffff820e1900 T dcn32_set_pixels_per_cycle +ffffffff820e1a40 T dcn32_unblank_stream +ffffffff820e1c10 T dcn32_disable_link_output +ffffffff820e1ea0 T dcn32_update_phantom_vp_position +ffffffff820e1fc0 T dcn32_dsc_pg_status +ffffffff820e20a0 T dcn32_update_dsc_pg +ffffffff820e3000 T dcn32_hw_sequencer_init_functions +ffffffff820e4000 t mmhubbub32_warmup_mcif +ffffffff820e4210 t mmhubbub32_config_mcif_buf +ffffffff820e46c0 t mmhubbub32_config_mcif_arb +ffffffff820e4ad0 T dcn32_mmhubbub_construct +ffffffff820e5000 t mpc32_mpc_init +ffffffff820e5220 t mpc32_program_post1dlut +ffffffff820e5d00 t mpc32_program_shaper +ffffffff820e7fb0 t mpc32_program_3dlut +ffffffff820e88a0 T dcn32_mpc_construct +ffffffff820e8960 t mpc32_power_on_shaper_3dlut +ffffffff820e8b90 t mpc32_set3dlut_ram12 +ffffffff820e9000 T dcn32_timing_generator_init +ffffffff820e9070 t optc32_enable_crtc +ffffffff820e9170 t optc32_disable_crtc +ffffffff820e9250 t optc32_phantom_crtc_post_enable +ffffffff820e9310 t optc32_set_drr +ffffffff820e9560 t optc32_set_odm_bypass +ffffffff820e96d0 t optc32_set_odm_combine +ffffffff820e99d0 t optc32_set_h_timing_div_manual_mode +ffffffff820ea000 T dcn32_panel_cntl_create +ffffffff820ea070 T dcn32_acquire_post_bldn_3dlut +ffffffff820ea160 T dcn32_release_post_bldn_3dlut +ffffffff820ea210 T dcn32_remove_phantom_pipes +ffffffff820ea380 T dcn32_add_phantom_pipes +ffffffff820ea7c0 T dcn32_validate_bandwidth +ffffffff820eac80 T dcn32_populate_dml_pipes_from_context +ffffffff820eb040 T dcn32_calculate_wm_and_dlg +ffffffff820eb0b0 T dcn32_create_resource_pool +ffffffff820eb160 t dcn32_resource_construct +ffffffff820f75d0 T dcn32_acquire_idle_pipe_for_head_pipe_in_layer +ffffffff820f7810 T dcn32_calc_num_avail_chans_for_mall +ffffffff820f7880 t dcn32_mpc_create +ffffffff820fc240 t dcn32_resource_destruct +ffffffff820fc8b0 t dcn32_destroy_resource_pool +ffffffff820fc910 t dcn32_link_encoder_create +ffffffff820fd870 t dcn32_update_bw_bounding_box +ffffffff820fd8c0 t read_dce_straps +ffffffff820fd8f0 t dcn32_create_audio +ffffffff820fdc30 t dcn32_stream_encoder_create +ffffffff820ffab0 t dcn32_hpo_dp_stream_encoder_create +ffffffff82100790 t dcn32_hpo_dp_link_encoder_create +ffffffff82100c10 t dcn32_hwseq_create +ffffffff821010b0 t dcn32_vpg_create +ffffffff82102000 T dcn32_helper_calculate_num_ways_for_subvp +ffffffff821021e0 T dcn32_merge_pipes_for_subvp +ffffffff821023b0 T dcn32_all_pipes_have_stream_and_plane +ffffffff82102440 T dcn32_subvp_in_use +ffffffff821024d0 T dcn32_mpo_in_use +ffffffff82102540 T dcn32_any_surfaces_rotated +ffffffff821025d0 T dcn32_determine_det_override +ffffffff82102910 T dcn32_set_det_allocations +ffffffff82102a90 T dcn32_save_mall_state +ffffffff82102b40 T dcn32_restore_mall_state +ffffffff82103000 T dcn321_link_encoder_construct +ffffffff82104000 T dcn321_create_resource_pool +ffffffff821040b0 t dcn321_resource_construct +ffffffff821104c0 t dcn321_mpc_create +ffffffff82114e80 t dcn321_resource_destruct +ffffffff821154f0 t dcn321_destroy_resource_pool +ffffffff82115550 t dcn321_link_encoder_create +ffffffff821164b0 t dcn321_update_bw_bounding_box +ffffffff82116500 t read_dce_straps +ffffffff82116530 t dcn321_create_audio +ffffffff82116870 t dcn321_stream_encoder_create +ffffffff821186f0 t dcn321_hpo_dp_stream_encoder_create +ffffffff821193d0 t dcn321_hpo_dp_link_encoder_create +ffffffff82119850 t dcn321_hwseq_create +ffffffff82119cf0 t dcn321_vpg_create +ffffffff8211b000 T bw_int_to_fixed_nonconst +ffffffff8211b090 T bw_frc_to_fixed +ffffffff8211b260 T bw_floor2 +ffffffff8211b310 T bw_ceil2 +ffffffff8211b390 T bw_mul +ffffffff8211c000 T convert_to_custom_float_format +ffffffff8211d000 T bw_calcs_init +ffffffff8211de30 T bw_calcs +ffffffff8211f760 t calculate_bandwidth +ffffffff82127000 T scaler_settings_calculation +ffffffff82127380 T mode_support_and_system_configuration +ffffffff8212d160 T display_pipe_configuration +ffffffff8212d9a0 T dispclkdppclkdcfclk_deep_sleep_prefetch_parameters_watermarks_and_performance_calculation +ffffffff82133000 T dcn_bw_mod +ffffffff82133060 T dcn_bw_min2 +ffffffff821330a0 T dcn_bw_max +ffffffff821330d0 T dcn_bw_max2 +ffffffff82133110 T dcn_bw_floor2 +ffffffff821331b0 T dcn_bw_floor +ffffffff821331e0 T dcn_bw_ceil +ffffffff82133220 T dcn_bw_ceil2 +ffffffff821332d0 T dcn_bw_max3 +ffffffff82133370 T dcn_bw_max5 +ffffffff821334e0 T dcn_bw_pow +ffffffff82133570 T dcn_bw_fabs +ffffffff821335d0 T dcn_bw_log +ffffffff82134000 T swizzle_mode_to_macro_tile_size +ffffffff82134090 T dcn_validate_bandwidth +ffffffff82136330 T dcn_bw_sync_calcs_and_dml +ffffffff82136580 t dcn_bw_calc_rq_dlg_ttu +ffffffff82136f00 T dcn_find_dcfclk_suits_all +ffffffff82137360 T dcn_bw_update_from_pplib_fclks +ffffffff821374f0 T dcn_bw_update_from_pplib_dcfclks +ffffffff821375c0 T dcn_get_soc_clks +ffffffff82137640 T dcn_bw_notify_pplib_of_wm_ranges +ffffffff82138000 T dcn20_populate_dml_writeback_from_context +ffffffff82138180 T dcn20_fpu_set_wb_arb_params +ffffffff82138330 T dcn20_calculate_dlg_params +ffffffff82138b10 T dcn20_populate_dml_pipes_from_context +ffffffff82139a10 T dcn20_calculate_wm +ffffffff8213a1b0 T dcn20_update_bounding_box +ffffffff8213a430 T dcn20_cap_soc_clocks +ffffffff8213a7b0 T dcn20_patch_bounding_box +ffffffff8213a920 T dcn20_validate_bandwidth_fp +ffffffff8213aab0 t dcn20_validate_bandwidth_internal +ffffffff8213ae90 T dcn20_fpu_set_wm_ranges +ffffffff8213af30 T dcn20_fpu_adjust_dppclk +ffffffff8213afd0 T dcn21_populate_dml_pipes_from_context +ffffffff8213b0d0 T dcn21_validate_bandwidth_fp +ffffffff8213bb50 T dcn21_update_bw_bounding_box +ffffffff8213c040 T dcn21_clk_mgr_set_bw_params_wm_table +ffffffff8213c0a0 T dcn201_populate_dml_writeback_from_context_fpu +ffffffff8213c3b0 t calculate_wm_set_for_vlevel +ffffffff8213d000 T dml20_recalculate +ffffffff8213d740 t dml20_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation 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dml20_rq_dlg_get_rq_params +ffffffff8215c660 T dml20_rq_dlg_get_dlg_reg +ffffffff8215e5b0 t get_surf_rq_param +ffffffff8215ee30 t calculate_ttu_cursor +ffffffff82160000 T dml20v2_rq_dlg_get_rq_reg +ffffffff82160490 t dml20v2_rq_dlg_get_rq_params +ffffffff82160660 T dml20v2_rq_dlg_get_dlg_reg +ffffffff821625b0 t get_surf_rq_param +ffffffff82162e30 t calculate_ttu_cursor +ffffffff82164000 T dml21_recalculate +ffffffff82164700 t DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation +ffffffff8216a0b0 T dml21_ModeSupportAndSystemConfigurationFull +ffffffff82170190 t TruncToValidBPP +ffffffff82170720 t CalculateDCFCLKDeepSleep +ffffffff82170a60 t CalculateVMAndRowBytes +ffffffff821712d0 t CalculatePrefetchSourceLines +ffffffff82171490 t CalculateWriteBackDelay +ffffffff82171760 t CalculatePrefetchSchedulePerPlane +ffffffff82171f70 t CalculateUrgentBurstFactor +ffffffff82172380 t CalculateFlipSchedule +ffffffff82172870 t CalculateWatermarksAndDRAMSpeedChangeSupport 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DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation +ffffffff82181c50 T dml30_CalculateBytePerPixelAnd256BBlockSizes +ffffffff82181ec0 T dml30_CalculateWriteBackDISPCLK +ffffffff82182040 T dml30_ModeSupportAndSystemConfigurationFull +ffffffff82189440 t CalculateSwathAndDETConfiguration +ffffffff82189ab0 t TruncToValidBPP +ffffffff82189d30 t dscceComputeDelay +ffffffff82189e70 t CalculateVMAndRowBytes +ffffffff8218a520 t CalculatePrefetchSourceLines +ffffffff8218a6e0 t CalculateUrgentBurstFactor +ffffffff8218a970 t CalculateDCFCLKDeepSleep +ffffffff8218ac90 t UseMinimumDCFCLK +ffffffff8218be90 t CalculatePrefetchSchedule +ffffffff8218d3f0 t CalculateFlipSchedule +ffffffff8218d8e0 t CalculateWatermarksAndDRAMSpeedChangeSupport +ffffffff8218e700 t CalculateSwathWidth +ffffffff8218f000 T dml30_rq_dlg_get_rq_reg +ffffffff8218f4b0 t dml_rq_dlg_get_rq_params +ffffffff8218f720 T dml30_rq_dlg_get_dlg_reg +ffffffff82191ed0 t get_surf_rq_param +ffffffff82192870 t calculate_ttu_cursor +ffffffff82193000 T dcn301_update_bw_bounding_box +ffffffff82193320 T dcn301_fpu_set_wm_ranges +ffffffff821933c0 T dcn301_fpu_init_soc_bounding_box +ffffffff82193460 T dcn301_calculate_wm_and_dlg_fp +ffffffff82193790 t calculate_wm_set_for_vlevel +ffffffff82194000 T dcn302_fpu_update_bw_bounding_box +ffffffff82194ac0 T dcn302_fpu_init_soc_bounding_box +ffffffff82195000 T dcn303_fpu_update_bw_bounding_box +ffffffff82195b00 T dcn303_fpu_init_soc_bounding_box +ffffffff82196000 T dcn31_zero_pipe_dcc_fraction +ffffffff82196060 T dcn31_update_soc_for_wm_a +ffffffff82196110 T dcn315_update_soc_for_wm_a +ffffffff821961e0 T dcn31_calculate_wm_and_dlg_fp +ffffffff821966e0 T dcn31_update_bw_bounding_box +ffffffff82196ad0 T dcn315_update_bw_bounding_box +ffffffff82196dc0 T dcn316_update_bw_bounding_box +ffffffff82198000 T dml31_recalculate +ffffffff821982a0 t DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation +ffffffff8219f060 T dml31_CalculateWriteBackDISPCLK +ffffffff8219f1e0 T dml31_ModeSupportAndSystemConfigurationFull +ffffffff821a74a0 t CalculateSwathAndDETConfiguration +ffffffff821a7aa0 t TruncToValidBPP +ffffffff821a7d20 t dscceComputeDelay +ffffffff821a7e60 t CalculateDCFCLKDeepSleep +ffffffff821a81a0 t CalculateVMAndRowBytes +ffffffff821a87f0 t CalculatePrefetchSourceLines +ffffffff821a89b0 t CalculateUrgentBurstFactor +ffffffff821a8c40 t CalculatePrefetchSchedulePerPlane +ffffffff821a9370 t CalculateFlipSchedule +ffffffff821a98f0 t CalculateWatermarksAndDRAMSpeedChangeSupport +ffffffff821aa550 t CalculateSwathWidth +ffffffff821aaa60 t CalculatePrefetchSchedule +ffffffff821abef0 t CalculateVupdateAndDynamicMetadataParameters +ffffffff821ad000 T dml31_rq_dlg_get_rq_reg +ffffffff821ad4b0 t dml_rq_dlg_get_rq_params +ffffffff821ad720 T dml31_rq_dlg_get_dlg_reg +ffffffff821b01f0 t get_surf_rq_param +ffffffff821b1000 T dcn314_update_bw_bounding_box_fpu +ffffffff821b1480 T dcn314_populate_dml_pipes_from_context_fpu +ffffffff821b2000 T dml314_recalculate +ffffffff821b2280 t DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation +ffffffff821b8f60 T dml314_CalculateWriteBackDISPCLK +ffffffff821b90e0 T dml314_ModeSupportAndSystemConfigurationFull +ffffffff821c1280 t CalculateBytePerPixelAnd256BBlockSizes +ffffffff821c14f0 t CalculateSwathAndDETConfiguration +ffffffff821c1af0 t TruncToValidBPP +ffffffff821c1d70 t dscceComputeDelay +ffffffff821c1eb0 t CalculateDCFCLKDeepSleep +ffffffff821c21f0 t CalculateVMAndRowBytes +ffffffff821c2840 t CalculatePrefetchSourceLines +ffffffff821c2a00 t CalculateUrgentBurstFactor +ffffffff821c2c90 t CalculateMaxVStartup +ffffffff821c2dd0 t CalculatePrefetchSchedulePerPlane +ffffffff821c3500 t CalculateFlipSchedule +ffffffff821c3a80 t CalculateWatermarksAndDRAMSpeedChangeSupport +ffffffff821c46e0 t CalculateSwathWidth +ffffffff821c4bf0 t CalculatePrefetchSchedule +ffffffff821c6080 t CalculateVupdateAndDynamicMetadataParameters +ffffffff821c7000 T dml314_rq_dlg_get_rq_reg +ffffffff821c74b0 t dml_rq_dlg_get_rq_params +ffffffff821c7720 T dml314_rq_dlg_get_dlg_reg +ffffffff821ca270 t get_surf_rq_param +ffffffff821cb000 T dcn32_build_wm_range_table_fpu +ffffffff821cb390 T dcn32_find_dummy_latency_index_for_fw_based_mclk_switch +ffffffff821cb5c0 T dcn32_internal_validate_bw +ffffffff821cd2f0 T dcn32_helper_populate_phantom_dlg_params +ffffffff821cd490 T dcn32_predict_pipe_split +ffffffff821cd6c0 T insert_entry_into_table_sorted +ffffffff821cdaf0 T dcn32_set_phantom_stream_timing +ffffffff821cdd90 t dcn32_split_stream_for_mpc_or_odm +ffffffff821ce120 T dcn32_calculate_wm_and_dlg_fpu +ffffffff821cf640 T dcn32_patch_dpm_table +ffffffff821cf850 T dcn32_update_bw_bounding_box_fpu +ffffffff821d1250 T dcn32_zero_pipe_dcc_fraction +ffffffff821d12b0 T dcn32_allow_subvp_with_active_margin +ffffffff821d1380 t subvp_drr_schedulable +ffffffff821d2000 T dml32_recalculate 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dml32_CalculateVMAndRowBytes +ffffffff821e45f0 T dml32_CalculatePrefetchSourceLines +ffffffff821e4840 T dml32_CalculateMALLUseForStaticScreen +ffffffff821e4990 T dml32_CalculateRowBandwidth +ffffffff821e4af0 T dml32_CalculateUrgentLatency +ffffffff821e4b90 T dml32_CalculateUrgentBurstFactor +ffffffff821e4e40 T dml32_CalculateDCFCLKDeepSleep +ffffffff821e5190 T dml32_CalculateWriteBackDelay +ffffffff821e52f0 T dml32_UseMinimumDCFCLK +ffffffff821e61b0 T dml32_CalculateExtraLatencyBytes +ffffffff821e6380 T dml32_CalculateTWait +ffffffff821e6460 T dml32_CalculateVUpdateAndDynamicMetadataParameters +ffffffff821e66c0 T dml32_get_return_bw_mbps +ffffffff821e6880 T dml32_get_return_bw_mbps_vm_only +ffffffff821e6960 T dml32_CalculateExtraLatency +ffffffff821e6b90 T dml32_CalculatePrefetchSchedule +ffffffff821e8140 T dml32_CalculateFlipSchedule +ffffffff821e86c0 T dml32_CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport +ffffffff821e9820 T dml32_CalculateWriteBackDISPCLK +ffffffff821e99e0 T dml32_CalculateMinAndMaxPrefetchMode +ffffffff821e9a20 T dml32_CalculatePixelDeliveryTimes +ffffffff821e9e90 T dml32_CalculateMetaAndPTETimes +ffffffff821ea5d0 T dml32_CalculateVMGroupAndRequestTimes +ffffffff821eaac0 T dml32_CalculateDCCConfiguration +ffffffff821eb0e0 T dml32_CalculateStutterEfficiency +ffffffff821ec030 T dml32_CalculateMaxDETAndMinCompressedBufferSize +ffffffff821ec120 T dml32_CalculateVActiveBandwithSupport +ffffffff821ec2b0 T dml32_CalculatePrefetchBandwithSupport +ffffffff821ec550 T dml32_CalculateBandwidthAvailableForImmediateFlip +ffffffff821ec6a0 T dml32_CalculateImmediateFlipBandwithSupport +ffffffff821ec8f0 T dml32_CalculateDETSwathFillLatencyHiding +ffffffff821ed000 T dml32_rq_dlg_get_rq_reg +ffffffff821ed6a0 T dml32_rq_dlg_get_dlg_reg +ffffffff821f0000 T dcn321_insert_entry_into_table_sorted +ffffffff821f0430 T dcn321_update_bw_bounding_box_fpu +ffffffff821f2000 T dml_init_instance +ffffffff821f2310 T dml_get_status_message +ffffffff821f2350 T dml_log_pipe_params +ffffffff821f2380 T dml_log_mode_support_params +ffffffff821f3000 T dml_get_voltage_level +ffffffff821f31f0 t fetch_socbb_params +ffffffff821f3700 t fetch_ip_params +ffffffff821f3ba0 t fetch_pipe_params +ffffffff821f4ca0 T PixelClockAdjustmentForProgressiveToInterlaceUnit +ffffffff821f4d20 T get_clk_dcf_deepsleep +ffffffff821f4e30 T get_wm_urgent +ffffffff821f4f40 T get_wm_memory_trip +ffffffff821f5050 T get_wm_writeback_urgent +ffffffff821f5160 T get_wm_stutter_exit +ffffffff821f5270 T get_wm_stutter_enter_exit +ffffffff821f5380 T get_wm_z8_stutter_exit +ffffffff821f5490 T get_wm_z8_stutter_enter_exit +ffffffff821f55a0 T get_stutter_efficiency_z8 +ffffffff821f56b0 T get_stutter_num_bursts_z8 +ffffffff821f57c0 T get_wm_dram_clock_change +ffffffff821f58d0 T get_wm_writeback_dram_clock_change +ffffffff821f59e0 T get_stutter_efficiency +ffffffff821f5af0 T get_stutter_efficiency_no_vblank +ffffffff821f5c00 T get_stutter_period +ffffffff821f5d10 T get_urgent_latency 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get_comp_buffer_reserved_space_zs +ffffffff821f74f0 T get_unbounded_request_enabled +ffffffff821f7610 T get_dsc_delay +ffffffff821f7740 T get_dppclk_calculated +ffffffff821f7860 T get_dscclk_calculated +ffffffff821f7980 T get_min_ttu_vblank +ffffffff821f7aa0 T get_min_ttu_vblank_in_us +ffffffff821f7bc0 T get_vratio_prefetch_l +ffffffff821f7ce0 T get_vratio_prefetch_c +ffffffff821f7e00 T get_dst_x_after_scaler +ffffffff821f7f20 T get_dst_y_after_scaler +ffffffff821f8040 T get_dst_y_per_vm_vblank +ffffffff821f8160 T get_dst_y_per_row_vblank +ffffffff821f8280 T get_dst_y_prefetch +ffffffff821f83a0 T get_dst_y_per_vm_flip +ffffffff821f84c0 T get_dst_y_per_row_flip +ffffffff821f85e0 T get_refcyc_per_vm_group_vblank +ffffffff821f8700 T get_refcyc_per_vm_group_flip +ffffffff821f8820 T get_refcyc_per_vm_req_vblank +ffffffff821f8940 T get_refcyc_per_vm_req_flip +ffffffff821f8a60 T get_refcyc_per_vm_group_vblank_in_us +ffffffff821f8b80 T get_refcyc_per_vm_group_flip_in_us +ffffffff821f8ca0 T get_refcyc_per_vm_req_vblank_in_us +ffffffff821f8dc0 T get_refcyc_per_vm_req_flip_in_us +ffffffff821f8ee0 T get_refcyc_per_vm_dmdata_in_us +ffffffff821f9000 T get_dmdata_dl_delta_in_us +ffffffff821f9120 T get_refcyc_per_line_delivery_l_in_us +ffffffff821f9240 T get_refcyc_per_line_delivery_c_in_us +ffffffff821f9360 T get_refcyc_per_line_delivery_pre_l_in_us +ffffffff821f9480 T get_refcyc_per_line_delivery_pre_c_in_us +ffffffff821f95a0 T get_refcyc_per_req_delivery_l_in_us +ffffffff821f96c0 T get_refcyc_per_req_delivery_c_in_us +ffffffff821f97e0 T get_refcyc_per_req_delivery_pre_l_in_us +ffffffff821f9900 T get_refcyc_per_req_delivery_pre_c_in_us +ffffffff821f9a20 T get_refcyc_per_cursor_req_delivery_in_us +ffffffff821f9b40 T get_refcyc_per_cursor_req_delivery_pre_in_us +ffffffff821f9c60 T get_refcyc_per_meta_chunk_nom_l_in_us +ffffffff821f9d80 T get_refcyc_per_meta_chunk_nom_c_in_us +ffffffff821f9ea0 T get_refcyc_per_meta_chunk_vblank_l_in_us +ffffffff821f9fc0 T get_refcyc_per_meta_chunk_vblank_c_in_us +ffffffff821fa0e0 T get_refcyc_per_meta_chunk_flip_l_in_us +ffffffff821fa200 T get_refcyc_per_meta_chunk_flip_c_in_us +ffffffff821fa320 T get_vstartup +ffffffff821fa450 T get_vupdate_offset +ffffffff821fa580 T get_vupdate_width +ffffffff821fa6a0 T get_vready_offset +ffffffff821fa7c0 T get_vready_at_or_after_vsync +ffffffff821fa8f0 T get_min_dst_y_next_start +ffffffff821faa20 T get_dst_y_per_pte_row_nom_l +ffffffff821fab40 T get_dst_y_per_pte_row_nom_c +ffffffff821fac60 T get_dst_y_per_meta_row_nom_l +ffffffff821fad80 T get_dst_y_per_meta_row_nom_c +ffffffff821faea0 T get_refcyc_per_pte_group_nom_l_in_us +ffffffff821fafc0 T get_refcyc_per_pte_group_nom_c_in_us +ffffffff821fb0e0 T get_refcyc_per_pte_group_vblank_l_in_us +ffffffff821fb200 T get_refcyc_per_pte_group_vblank_c_in_us +ffffffff821fb320 T get_refcyc_per_pte_group_flip_l_in_us +ffffffff821fb440 T get_refcyc_per_pte_group_flip_c_in_us +ffffffff821fb560 T get_vstartup_calculated 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vmm_fpurestore -ffffffff82531e60 T vmm_fpusave -ffffffff82531ee0 T vmm_translate_gva -ffffffff82532200 T vmm_update_pvclock -ffffffff82532300 T vmx_get_exit_info -ffffffff82532360 T vmx_handle_exit -ffffffff825327a0 T vmx_instruction_error_decode -ffffffff82532970 T vmm_get_guest_cpu_cpl -ffffffff82532a60 T vmx_handle_intr -ffffffff82532af0 T svm_handle_hlt -ffffffff82532b40 T vmx_handle_hlt -ffffffff82532bf0 T svm_handle_exit -ffffffff82532f10 T svm_handle_np_fault -ffffffff825330c0 T vmm_handle_cpuid -ffffffff82533750 T svm_handle_msr -ffffffff82533a10 T svm_handle_xsetbv -ffffffff82533ab0 T svm_handle_inout -ffffffff82533bd0 T vmm_inject_ud -ffffffff82533c00 T vmm_inject_db -ffffffff82533c30 T vmx_handle_np_fault -ffffffff82533db0 T vmx_handle_inout -ffffffff82533f50 T vmx_handle_cr -ffffffff825341c0 T vmx_handle_rdmsr -ffffffff82534290 T vmx_handle_wrmsr -ffffffff825344f0 T vmx_handle_xsetbv -ffffffff825345c0 T vmm_inject_gp -ffffffff825345f0 T vmx_get_exit_qualification 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sdmmc_io_function_enable -ffffffff8253c3a0 T sdmmc_io_write_1 -ffffffff8253c520 T sdmmc_io_function_disable -ffffffff8253c7a0 T sdmmc_io_attach -ffffffff8253c890 T sdmmc_print -ffffffff8253cae0 T sdmmc_submatch -ffffffff8253cb60 T sdmmc_io_detach -ffffffff8253cc10 T sdmmc_io_rw_direct -ffffffff8253cdb0 T sdmmc_io_rw_extended_subr -ffffffff8253cf50 T sdmmc_io_rw_extended -ffffffff8253d340 T sdmmc_io_read_2 -ffffffff8253d4a0 T sdmmc_io_write_2 -ffffffff8253d600 T sdmmc_io_read_4 -ffffffff8253d760 T sdmmc_io_write_4 -ffffffff8253d8c0 T sdmmc_io_read_multi_1 -ffffffff8253d9b0 T sdmmc_io_write_multi_1 -ffffffff8253daa0 T sdmmc_io_read_region_1 -ffffffff8253db90 T sdmmc_io_write_region_1 -ffffffff8253dc80 T sdmmc_io_xchg -ffffffff8253de10 T sdmmc_intr_enable -ffffffff8253e080 T sdmmc_intr_disable -ffffffff8253e2f0 T sdmmc_intr_establish -ffffffff8253e3f0 T sdmmc_intr_disestablish -ffffffff8253e4e0 T sdmmc_card_intr -ffffffff8253e530 T sdmmc_intr_task -ffffffff8253e5c0 T sdmmc_io_set_blocklen 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sdmmc_mem_single_write_block -ffffffff82542790 T sdmmc_mem_write_block -ffffffff82542950 T sdmmc_mem_hibernate_write -ffffffff82543000 T sdmmc_scsi_cmd -ffffffff825431f0 T sdmmc_minphys -ffffffff82543270 T sdmmc_scsi_attach -ffffffff82543460 T sdmmc_alloc_ccbs -ffffffff825435a0 T sdmmc_free_ccbs -ffffffff82543600 T sdmmc_scsi_detach -ffffffff82543760 T sdmmc_stimeout -ffffffff825437e0 T sdmmc_ccb_alloc -ffffffff82543890 T sdmmc_ccb_free -ffffffff82543970 T sdmmc_inquiry -ffffffff82543be0 T sdmmc_start_xs -ffffffff82543cd0 T sdmmc_complete_xs -ffffffff82543da0 T sdmmc_done_xs -ffffffff82543df0 T sdmmc_scsi_hibernate_io -ffffffff82544000 T bwfm_sdio_preinit -ffffffff825444f0 T bwfm_sdio_txcheck -ffffffff82544530 T bwfm_sdio_txdata -ffffffff825445a0 T bwfm_sdio_txctl -ffffffff825446f0 T bwfm_sdio_buscore_read -ffffffff82544700 T bwfm_sdio_buscore_write -ffffffff82544720 T bwfm_sdio_buscore_prepare -ffffffff82544860 T bwfm_sdio_buscore_activate -ffffffff825448e0 T bwfm_sdio_match -ffffffff825449b0 T bwfm_sdio_attach -ffffffff82544c70 T bwfm_sdio_detach -ffffffff82544cd0 T bwfm_sdio_task -ffffffff82544e30 T bwfm_sdio_write_1 -ffffffff82544e60 T bwfm_sdio_read_1 -ffffffff82544e90 T bwfm_sdio_write_4 -ffffffff82544f40 T bwfm_sdio_read_4 -ffffffff82544ff0 T bwfm_sdio_load_microcode -ffffffff82545250 T bwfm_sdio_clkctl -ffffffff82545380 T bwfm_sdio_dev_write -ffffffff825453d0 T bwfm_sdio_intr -ffffffff82545410 T bwfm_sdio_ram_read_write -ffffffff82545640 T bwfm_sdio_htclk -ffffffff825458a0 T bwfm_sdio_readshared -ffffffff82545970 T bwfm_sdio_dev_read -ffffffff825459b0 T bwfm_sdio_rx_frames -ffffffff82545d40 T bwfm_sdio_tx_frames -ffffffff82545e20 T bwfm_sdio_backplane -ffffffff82545ed0 T bwfm_sdio_buf_read -ffffffff82545fb0 T bwfm_sdio_buf_write -ffffffff82546060 T bwfm_sdio_frame_read_write -ffffffff825461e0 T bwfm_sdio_newbuf -ffffffff82546260 T bwfm_sdio_tx_ok -ffffffff825462b0 T bwfm_sdio_tx_ctrlframe -ffffffff825463b0 T bwfm_sdio_tx_dataframe -ffffffff82546500 T bwfm_sdio_rx_glom -ffffffff82547000 T onewire_match -ffffffff82547050 T onewire_attach -ffffffff825470f0 T onewire_detach -ffffffff82547160 T onewire_activate -ffffffff82547180 T onewire_scan -ffffffff82547390 T onewire_createthread -ffffffff82547400 T onewire_print -ffffffff825474d0 T onewirebus_print -ffffffff82547520 T onewire_lock -ffffffff82547540 T onewire_unlock -ffffffff82547560 T onewire_reset -ffffffff82547580 T onewire_bit -ffffffff825475a0 T onewire_read_byte -ffffffff825476e0 T onewire_write_byte -ffffffff825477c0 T onewire_read_block -ffffffff82547860 T onewire_write_block -ffffffff82547900 T onewire_triplet -ffffffff825479e0 T onewire_matchrom -ffffffff82547b30 T onewire_search -ffffffff82547ec0 T onewire_thread -ffffffff82548000 T onewire_crc -ffffffff825480e0 T onewire_crc16 -ffffffff825481c0 T onewire_famname -ffffffff82548200 T onewire_matchbyfam -ffffffff82549000 T owid_match -ffffffff82549030 T owid_attach -ffffffff82549100 T owid_detach -ffffffff82549140 T owid_activate -ffffffff8254a000 T owsbm_match -ffffffff8254a030 T owsbm_attach -ffffffff8254a1d0 T owsbm_detach -ffffffff8254a240 T owsbm_activate -ffffffff8254a270 T owsbm_update -ffffffff8254b000 T owtemp_match -ffffffff8254b030 T owtemp_attach -ffffffff8254b130 T owtemp_detach -ffffffff8254b1a0 T owtemp_activate -ffffffff8254b1d0 T owtemp_update -ffffffff8254c000 T owctr_match -ffffffff8254c030 T owctr_attach -ffffffff8254c180 T owctr_detach -ffffffff8254c1f0 T owctr_activate -ffffffff8254c220 T owctr_update -ffffffff8254c250 T owctr_update_counter -ffffffff8254d000 A __text_page_start -ffffffff8254d000 T Xsyscall_meltdown -ffffffff8254d00c T Xsyscall -ffffffff8254d26e t Xsyscall_trampback -ffffffff8254d280 T intr_user_exit -ffffffff8254d2c2 t intr_user_exit_post_ast -ffffffff8254d3ee t Xiretq_trampback -ffffffff8254d3fa T doreti_iret -ffffffff8254e000 T alltraps -ffffffff8254e138 T recall_trap -ffffffff8254e150 T alltraps_kern -ffffffff8254e153 T alltraps_kern_meltdown -ffffffff8254f000 ? Xsyscall32 -ffffffff8254f000 A __kutext_start -ffffffff8254f000 A __text_page_end -ffffffff82550000 ? Xtrap00 -ffffffff82550010 ? Xtrap01 -ffffffff82550020 ? Xtrap02 -ffffffff82550028 c calltrap_specstk -ffffffff825500f0 ? calltrap_specstk_tramp -ffffffff82550110 ? Xtrap03 -ffffffff82550120 ? Xtrap04 -ffffffff82550130 ? Xtrap05 -ffffffff82550140 ? Xtrap06 -ffffffff82550150 ? Xtrap07 -ffffffff82550160 ? Xtrap08 -ffffffff82550170 ? Xtrap09 -ffffffff82550180 ? Xtrap0a -ffffffff82550190 ? Xtrap0b -ffffffff825501a0 ? Xtrap0c -ffffffff825501b0 ? Xtrap0d -ffffffff82550240 ? Xtrap0e -ffffffff82550250 ? Xintrspurious -ffffffff82550250 ? Xtrap0f -ffffffff82550260 ? Xtrap10 -ffffffff82550270 ? Xtrap11 -ffffffff82550280 ? Xtrap12 -ffffffff82550290 ? Xtrap13 -ffffffff825502a0 ? Xtrap14 -ffffffff825502b0 ? Xtrap15 -ffffffff825502c0 ? Xtrap16 -ffffffff825502c0 ? Xtrap17 -ffffffff825502c0 ? Xtrap18 -ffffffff825502c0 ? Xtrap19 -ffffffff825502c0 ? Xtrap1a -ffffffff825502c0 ? Xtrap1b -ffffffff825502c0 ? Xtrap1c -ffffffff825502c0 ? Xtrap1d -ffffffff825502c0 ? Xtrap1e -ffffffff825502c0 ? Xtrap1f -ffffffff825502d0 ? x2apic_eoi -ffffffff825502f0 ? Xintr_lapic_ipi -ffffffff82550330 ? Xipi_invltlb -ffffffff82550360 ? Xipi_invlpg -ffffffff82550390 ? Xipi_invlrange -ffffffff825503d0 ? Xipi_invltlb_pcid -ffffffff82550410 ? Xipi_invlpg_pcid -ffffffff82550460 ? Xipi_invlrange_pcid -ffffffff825504d0 ? Xintr_lapic_ltimer -ffffffff82550510 ? Xintr_xen_upcall -ffffffff82550550 ? Xintr_hyperv_upcall -ffffffff82550590 ? Xintr_legacy0 -ffffffff825505d0 ? Xintr_legacy1 -ffffffff82550610 ? Xintr_legacy2 -ffffffff82550650 ? Xintr_legacy3 -ffffffff82550690 ? Xintr_legacy4 -ffffffff825506d0 ? Xintr_legacy5 -ffffffff82550710 ? Xintr_legacy6 -ffffffff82550750 ? Xintr_legacy7 -ffffffff82550790 ? Xintr_legacy8 -ffffffff825507d0 ? Xintr_legacy9 -ffffffff82550810 ? Xintr_legacy10 -ffffffff82550850 ? Xintr_legacy11 -ffffffff82550890 ? Xintr_legacy12 -ffffffff825508d0 ? Xintr_legacy13 -ffffffff82550910 ? Xintr_legacy14 -ffffffff82550950 ? Xintr_legacy15 -ffffffff82550990 ? Xintr_ioapic_edge0 -ffffffff825509d0 ? Xintr_ioapic_edge1 -ffffffff82550a10 ? Xintr_ioapic_edge2 -ffffffff82550a50 ? Xintr_ioapic_edge3 -ffffffff82550a90 ? Xintr_ioapic_edge4 -ffffffff82550ad0 ? Xintr_ioapic_edge5 -ffffffff82550b10 ? Xintr_ioapic_edge6 -ffffffff82550b50 ? Xintr_ioapic_edge7 -ffffffff82550b90 ? Xintr_ioapic_edge8 -ffffffff82550bd0 ? Xintr_ioapic_edge9 -ffffffff82550c10 ? Xintr_ioapic_edge10 -ffffffff82550c50 ? Xintr_ioapic_edge11 -ffffffff82550c90 ? Xintr_ioapic_edge12 -ffffffff82550cd0 ? Xintr_ioapic_edge13 -ffffffff82550d10 ? Xintr_ioapic_edge14 -ffffffff82550d50 ? Xintr_ioapic_edge15 -ffffffff82550d90 ? Xintr_ioapic_edge16 -ffffffff82550dd0 ? Xintr_ioapic_edge17 -ffffffff82550e10 ? Xintr_ioapic_edge18 -ffffffff82550e50 ? Xintr_ioapic_edge19 -ffffffff82550e90 ? Xintr_ioapic_edge20 -ffffffff82550ed0 ? Xintr_ioapic_edge21 -ffffffff82550f10 ? Xintr_ioapic_edge22 -ffffffff82550f50 ? Xintr_ioapic_edge23 -ffffffff82550f90 ? Xintr_ioapic_edge24 -ffffffff82550fd0 ? Xintr_ioapic_edge25 -ffffffff82551010 ? Xintr_ioapic_edge26 -ffffffff82551050 ? Xintr_ioapic_edge27 -ffffffff82551090 ? Xintr_ioapic_edge28 -ffffffff825510d0 ? Xintr_ioapic_edge29 -ffffffff82551110 ? Xintr_ioapic_edge30 -ffffffff82551150 ? Xintr_ioapic_edge31 -ffffffff82551190 ? Xintr_ioapic_edge32 -ffffffff825511d0 ? Xintr_ioapic_edge33 -ffffffff82551210 ? Xintr_ioapic_edge34 -ffffffff82551250 ? Xintr_ioapic_edge35 -ffffffff82551290 ? Xintr_ioapic_edge36 -ffffffff825512d0 ? Xintr_ioapic_edge37 -ffffffff82551310 ? Xintr_ioapic_edge38 -ffffffff82551350 ? Xintr_ioapic_edge39 -ffffffff82551390 ? Xintr_ioapic_edge40 -ffffffff825513d0 ? Xintr_ioapic_edge41 -ffffffff82551410 ? Xintr_ioapic_edge42 -ffffffff82551450 ? Xintr_ioapic_edge43 -ffffffff82551490 ? Xintr_ioapic_edge44 -ffffffff825514d0 ? Xintr_ioapic_edge45 -ffffffff82551510 ? Xintr_ioapic_edge46 -ffffffff82551550 ? Xintr_ioapic_edge47 -ffffffff82551590 ? Xintr_ioapic_edge48 -ffffffff825515d0 ? Xintr_ioapic_edge49 -ffffffff82551610 ? Xintr_ioapic_edge50 -ffffffff82551650 ? Xintr_ioapic_edge51 -ffffffff82551690 ? Xintr_ioapic_edge52 -ffffffff825516d0 ? Xintr_ioapic_edge53 -ffffffff82551710 ? Xintr_ioapic_edge54 -ffffffff82551750 ? Xintr_ioapic_edge55 -ffffffff82551790 ? Xintr_ioapic_edge56 -ffffffff825517d0 ? Xintr_ioapic_edge57 -ffffffff82551810 ? Xintr_ioapic_edge58 -ffffffff82551850 ? Xintr_ioapic_edge59 -ffffffff82551890 ? Xintr_ioapic_edge60 -ffffffff825518d0 ? Xintr_ioapic_edge61 -ffffffff82551910 ? Xintr_ioapic_edge62 -ffffffff82551950 ? Xintr_ioapic_edge63 -ffffffff82551990 ? Xintr_ioapic_level0 -ffffffff825519d0 ? Xintr_ioapic_level1 -ffffffff82551a10 ? Xintr_ioapic_level2 -ffffffff82551a50 ? Xintr_ioapic_level3 -ffffffff82551a90 ? Xintr_ioapic_level4 -ffffffff82551ad0 ? Xintr_ioapic_level5 -ffffffff82551b10 ? Xintr_ioapic_level6 -ffffffff82551b50 ? Xintr_ioapic_level7 -ffffffff82551b90 ? Xintr_ioapic_level8 -ffffffff82551bd0 ? Xintr_ioapic_level9 -ffffffff82551c10 ? Xintr_ioapic_level10 -ffffffff82551c50 ? Xintr_ioapic_level11 -ffffffff82551c90 ? Xintr_ioapic_level12 -ffffffff82551cd0 ? Xintr_ioapic_level13 -ffffffff82551d10 ? Xintr_ioapic_level14 -ffffffff82551d50 ? Xintr_ioapic_level15 -ffffffff82551d90 ? Xintr_ioapic_level16 -ffffffff82551dd0 ? Xintr_ioapic_level17 -ffffffff82551e10 ? Xintr_ioapic_level18 -ffffffff82551e50 ? Xintr_ioapic_level19 -ffffffff82551e90 ? Xintr_ioapic_level20 -ffffffff82551ed0 ? Xintr_ioapic_level21 -ffffffff82551f10 ? Xintr_ioapic_level22 -ffffffff82551f50 ? Xintr_ioapic_level23 -ffffffff82551f90 ? Xintr_ioapic_level24 -ffffffff82551fd0 ? Xintr_ioapic_level25 -ffffffff82552010 ? Xintr_ioapic_level26 -ffffffff82552050 ? Xintr_ioapic_level27 -ffffffff82552090 ? Xintr_ioapic_level28 -ffffffff825520d0 ? Xintr_ioapic_level29 -ffffffff82552110 ? Xintr_ioapic_level30 -ffffffff82552150 ? Xintr_ioapic_level31 -ffffffff82552190 ? Xintr_ioapic_level32 -ffffffff825521d0 ? Xintr_ioapic_level33 -ffffffff82552210 ? Xintr_ioapic_level34 -ffffffff82552250 ? Xintr_ioapic_level35 -ffffffff82552290 ? Xintr_ioapic_level36 -ffffffff825522d0 ? Xintr_ioapic_level37 -ffffffff82552310 ? Xintr_ioapic_level38 -ffffffff82552350 ? Xintr_ioapic_level39 -ffffffff82552390 ? Xintr_ioapic_level40 -ffffffff825523d0 ? Xintr_ioapic_level41 -ffffffff82552410 ? Xintr_ioapic_level42 -ffffffff82552450 ? Xintr_ioapic_level43 -ffffffff82552490 ? Xintr_ioapic_level44 -ffffffff825524d0 ? Xintr_ioapic_level45 -ffffffff82552510 ? Xintr_ioapic_level46 -ffffffff82552550 ? Xintr_ioapic_level47 -ffffffff82552590 ? Xintr_ioapic_level48 -ffffffff825525d0 ? Xintr_ioapic_level49 -ffffffff82552610 ? Xintr_ioapic_level50 -ffffffff82552650 ? Xintr_ioapic_level51 -ffffffff82552690 ? Xintr_ioapic_level52 -ffffffff825526d0 ? Xintr_ioapic_level53 -ffffffff82552710 ? Xintr_ioapic_level54 -ffffffff82552750 ? Xintr_ioapic_level55 -ffffffff82552790 ? Xintr_ioapic_level56 -ffffffff825527d0 ? Xintr_ioapic_level57 -ffffffff82552810 ? Xintr_ioapic_level58 -ffffffff82552850 ? Xintr_ioapic_level59 -ffffffff82552890 ? Xintr_ioapic_level60 -ffffffff825528d0 ? Xintr_ioapic_level61 -ffffffff82552910 ? Xintr_ioapic_level62 -ffffffff82552950 ? Xintr_ioapic_level63 -ffffffff82553000 ? codepatch_fill_nop -ffffffff82553000 A __cptext_start -ffffffff82553000 A __kutext_end -ffffffff825530b0 ? codepatch_maprw -ffffffff82553190 ? codepatch_unmaprw -ffffffff82553200 ? codepatch_nop -ffffffff82553360 ? codepatch_replace -ffffffff82553510 ? codepatch_call -ffffffff82553530 ? codepatch_jmp -ffffffff82554000 A __cptext_end -ffffffff82554000 A __rodata_start -ffffffff82554000 C _etext -ffffffff82554000 C etext -ffffffff82555000 r seeprom_read -ffffffff82555004 r icl_mg_pll_find_divisors.div1_vals -ffffffff82555028 r gen9bc_tgp_ddc_pin_map -ffffffff82555038 r athn_ac2qid -ffffffff82555038 r athn_ac2qid -ffffffff82555038 r athn_ac2qid -ffffffff82555044 r rtwn_get_rssi.cckoff -ffffffff8255506c r rsu_ac2qid -ffffffff8255507c r pckbc_portcmd -ffffffff82555080 r tht_fifo_write_pad.pad -ffffffff82555088 r rsu_get_rssi.cckoff -ffffffff8255509c r adlp_n_revids -ffffffff825550ec r apple_iso_trans -ffffffff825550f0 r dg2_g12_revid_step_tbl -ffffffff825550f8 r wihap_check_tx.txratetable -ffffffff825550fc r dmamode -ffffffff82555124 r gen9_edram_size_mb.sets -ffffffff82556000 r isomappings -ffffffff82556080 r unimappings -ffffffff82556230 r replacements -ffffffff82559b1f r cmd0646_9_tim_udma -ffffffff825ad6a2 r pp_r600_decoded_lanes -ffffffff825c8a32 r cmd680_setup_channel.udma_tbl -ffffffff825d06d0 r apollo_udma33_tim -ffffffff825d67bd r substchar -ffffffff825d88a4 r apollo_udma100_tim -ffffffff826001a5 r apollo_udma66_tim -ffffffff82607651 r apollo_pio_rec -ffffffff82616a2b r cy_pio_rec -ffffffff82645f9d r apollo_udma133_tim -ffffffff82652b78 R drm_ca -ffffffff82652ba0 R drm_filtops -ffffffff82652bd0 R drmread_filtops -ffffffff82653000 r vga_emulops -ffffffff82653048 R vga_stdscreen -ffffffff82653078 R vga_stdscreen_mono -ffffffff826530a8 R vga_stdscreen_bf -ffffffff826530d8 R vga_40lscreen -ffffffff82653108 R vga_40lscreen_mono -ffffffff82653138 R vga_40lscreen_bf -ffffffff82653168 R vga_50lscreen -ffffffff82653198 R vga_50lscreen_mono -ffffffff826531c8 R vga_50lscreen_bf -ffffffff826531f8 R vga_screenlist -ffffffff82653208 R vga_screenlist_mono -ffffffff82653218 R vga_accessops -ffffffff82653278 r i945_wm_info -ffffffff826532b0 r bgansitopc -ffffffff826532b8 r pctoansi -ffffffff826532f8 r sdma_offsets -ffffffff826532f8 r sdma_offsets -ffffffff82653328 r iha_rate_tbl -ffffffff82653360 r i830_a_wm_info -ffffffff82653398 r gen9_edram_size_mb.ways -ffffffff82653400 r aggr_periodic_times -ffffffff82653480 r jsl_ehl_revids -ffffffff826534f8 r michael_final.pad -ffffffff82653520 r rt_copysa.maskarray -ffffffff82653528 r i915_wm_info -ffffffff82653530 r amdgpu_ih_clientid_jpeg -ffffffff82653530 r amdgpu_ih_clientid_uvds -ffffffff82653530 r amdgpu_ih_clientid_vcns -ffffffff82653530 r amdgpu_ih_clientid_vcns -ffffffff82653530 r amdgpu_ih_clientid_vcns -ffffffff82653568 r vga_setfontset.cmaptabb -ffffffff82653580 r tgl_revids -ffffffff826535d8 r i830_bc_wm_info -ffffffff82653648 r hsw_activate_psr2.map -ffffffff82653688 r __drm_universal_plane_init.default_modifiers -ffffffff82653698 r iwn_tid2fifo -ffffffff826536b0 r vga_setfontset.cmaptaba -ffffffff826536b8 r crtc_offsets -ffffffff826536b8 r crtc_offsets -ffffffff826536b8 r crtc_offsets -ffffffff826536d8 r link_speed -ffffffff826536d8 r link_speed -ffffffff826536d8 r link_speed -ffffffff82653750 r rtwn_r88e_get_rssi.cckoff -ffffffff82654000 R edid_vendors -ffffffff826542c0 R edid_nvendors -ffffffff826542d0 R edid_products -ffffffff82654330 R edid_nproducts -ffffffff82654340 r _edid_modes -ffffffff82655000 R videomode_list -ffffffff82656080 R videomode_count -ffffffff82657000 r ahc_hard_errors -ffffffff82657080 r critical_sections -ffffffff826570b0 r patches -ffffffff82657d50 r seqprog -ffffffff82659000 r ahc_switch -ffffffff8265a000 r termstat_strings -ffffffff8265a020 r critical_sections -ffffffff8265a060 r seqprog -ffffffff8265ad50 r patches -ffffffff8265c000 r ahd_switch -ffffffff8265d000 R aic_switch -ffffffff8265e000 R adw_switch -ffffffff8265f000 R gdt_switch -ffffffff82660000 R twe_switch -ffffffff82661000 R ciss_switch -ffffffff82661030 R ciss_level -ffffffff82661050 R ciss_stat -ffffffff82662000 R ami_switch -ffffffff82662028 R ami_raw_switch -ffffffff82663000 R mfi_switch -ffffffff82663028 R mfi_pd_switch -ffffffff82663050 r mfi_iop_xscale -ffffffff82663080 r mfi_iop_ppc -ffffffff826630b0 r mfi_iop_gen2 -ffffffff826630e0 r mfi_iop_skinny -ffffffff82663110 r mfi_bbu_indicators -ffffffff826631c0 r bwi_rf_calc_nrssi_slope_11b.save_phy_regs -ffffffff826631f0 r chv_oa_mux_regs -ffffffff82663210 r fiji_clock_stretcher_lookup_table -ffffffff82663210 r tonga_clock_stretcher_lookup_table -ffffffff82663230 r iosf_pci_devices -ffffffff82663250 r link_speed -ffffffff82663250 r link_speed -ffffffff82663250 r link_speed -ffffffff82663290 r drm_fb_xfrm.default_dst_pitch -ffffffff82663290 r non_supported_protection -ffffffff82663390 r tgl_uy_revids -ffffffff826633e0 r bwi_phy_noise_11g_rev1 -ffffffff82663460 r cardslot_process_event.antonym_ev -ffffffff826634f0 r gen11_oa_mux_regs -ffffffff826635e0 r ddr2_cycle_tenths -ffffffff82663650 r rtw_intr_rx.ratetbl -ffffffff826636d0 r abm_config -ffffffff82663740 r getbootinfo.ports.30 -ffffffff82663790 r reg_offsets -ffffffff826637a0 r bwi_rf_lo_measure_11g.rf_lo_adjust -ffffffff826637b0 r init_non_clock_fields.look_up -ffffffff826637c0 r uftdi_8u232am_getrate.roundoff -ffffffff82663810 r zyd_rx_data.rates -ffffffff82663820 r ieee80211_ra_valid_tx_mcs.max_mcs -ffffffff82663860 r mmio_invalidate_full.gen8_regs -ffffffff82663890 r bwi_phy_noise_11g -ffffffff826638a0 r hpt366_pio -ffffffff826638d0 r glk_revids -ffffffff82663920 r bwi_rf_calc_nrssi_slope_11g.save_phy3_regs -ffffffff82663940 r ether_crc32_be_update.rev -ffffffff82663940 r rtw_grf5101_mac_crypt.caesar -ffffffff82663990 r snb_b_fdi_train_param -ffffffff82664000 R qlw_switch -ffffffff82665000 R isp_2100_risc_code -ffffffff82677bf0 R isp_2200_risc_code -ffffffff8268a990 R isp_2300_risc_code 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bwi_rf_calibval.rf_calibvals -ffffffff826a75e0 r pf_syncookie_msstab -ffffffff826a7640 r xgmi3x16_pcs_err_status_reg_aldebaran -ffffffff826a76a0 r uath_wme_init.uath_wme_11g -ffffffff826a76c0 r gen7_oa_b_counters -ffffffff826a7820 r icl_revids -ffffffff826a78e0 r rtwn_iq_calib_run.reg_adda -ffffffff826a7920 r atom_def_dst -ffffffff826a7920 r atom_def_dst -ffffffff826a7960 r sha256_initial_hash_value -ffffffff826a79c0 r otus_edca_def -ffffffff826a79e0 r intel_hpll_vco.blb_vco -ffffffff826a7aa0 r epic_pci_subsys_info -ffffffff826a7ac0 r atom_arg_mask -ffffffff826a7ac0 r atom_arg_mask -ffffffff826a7b20 r butmap -ffffffff826a7b60 r GFX_RLC_SRM_INDEX_CNTL_DATA_OFFSETS -ffffffff826a7ba0 r comsoft.lsrmap -ffffffff826a7be0 r tulip_mii_phy_readspecific.table -ffffffff826a7c00 r kbl_revids -ffffffff826a7ca0 r intel_hpll_vco.pnv_vco -ffffffff826a7d00 r dmapageport -ffffffff826a7dc0 r intel_hpll_vco.ctg_vco -ffffffff826a7e80 r drm_calculate_luminance_range.pre_computed_values -ffffffff826a8000 R sili_atascsi_methods -ffffffff826a9000 R ncr53c9x_switch -ffffffff826aa000 r scf_period -ffffffff826ab000 R siop_script -ffffffff826ab5a0 R lun_switch -ffffffff826ab5d0 R tag_switch -ffffffff826ab660 R load_dsa -ffffffff826ab6c4 R siop_led_on -ffffffff826ab6cc R siop_led_off -ffffffff826ab6d8 R siop_switch -ffffffff826ac000 R ep_vortex_media -ffffffff826ac100 R ep_default_to_media -ffffffff826ad000 R wi_card_ident -ffffffff826af000 R ucode_table -ffffffff826b0000 r re_revisions -ffffffff826b0290 r re_kstats_tpl -ffffffff826b2000 R smc91cxx_media -ffffffff826b2010 R smc91cxx_mii_bitbang_ops -ffffffff826b3000 R dl10019_mii_bitbang_ops -ffffffff826b3028 R dl10022_mii_bitbang_ops -ffffffff826b4000 R ax88190_mii_bitbang_ops -ffffffff826b6000 R ac97_audio_default -ffffffff826b6020 R ac97_on_off -ffffffff826b6324 R ac97_mic_select -ffffffff826b6628 R ac97_mono_select -ffffffff826b692c R ac97_source -ffffffff826b6c30 R ac97_volume_stereo -ffffffff826b6c4c R ac97_volume_mono -ffffffff826b6c70 R source_info -ffffffff826b7470 R ac97_ad -ffffffff826b7580 R ac97_ak -ffffffff826b7610 R ac97_av -ffffffff826b7750 R ac97_rl -ffffffff826b77a0 R ac97_cm -ffffffff826b7820 R ac97_cr -ffffffff826b7840 R ac97_cs -ffffffff826b7920 R ac97_cx -ffffffff826b7980 R ac97_dt -ffffffff826b79a0 R ac97_em -ffffffff826b79d0 R ac97_es -ffffffff826b79f0 R ac97_is -ffffffff826b7a10 R ac97_ic -ffffffff826b7a90 R ac97_it -ffffffff826b7ac0 R ac97_ns -ffffffff826b7b80 R ac97_ps -ffffffff826b7bb0 R ac97_sl -ffffffff826b7bd0 R ac97_st -ffffffff826b7d20 R ac97_vi -ffffffff826b7d50 R ac97_tt -ffffffff826b7dd0 R ac97_ti -ffffffff826b7df0 R ac97_wb -ffffffff826b7e10 R ac97_wo -ffffffff826b7ea0 R ac97_ym -ffffffff826b7ef0 R ac97_vendors -ffffffff826b81f0 R ac97enhancement -ffffffff826b82f0 R ac97feature -ffffffff826b9000 R lm_chips -ffffffff826b9020 R lm78_sensors -ffffffff826b91a0 R w83627hf_sensors -ffffffff826b93a0 R w83627ehf_sensors -ffffffff826b95c0 R w83627dhg_sensors -ffffffff826b97c0 R nct6776f_sensors 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dmub_dcn20_setup_out_mailbox +ffffffff8223bc20 T dmub_dcn20_get_outbox1_wptr +ffffffff8223bc50 T dmub_dcn20_set_outbox1_rptr +ffffffff8223bc80 T dmub_dcn20_setup_outbox0 +ffffffff8223bcd0 T dmub_dcn20_get_outbox0_wptr +ffffffff8223bd00 T dmub_dcn20_set_outbox0_rptr +ffffffff8223bd30 T dmub_dcn20_is_hw_init +ffffffff8223bd90 T dmub_dcn20_is_supported +ffffffff8223bdf0 T dmub_dcn20_set_gpint +ffffffff8223be20 T dmub_dcn20_is_gpint_acked +ffffffff8223be80 T dmub_dcn20_get_gpint_response +ffffffff8223beb0 T dmub_dcn20_get_fw_boot_status +ffffffff8223bee0 T dmub_dcn20_enable_dmub_boot_options +ffffffff8223bf10 T dmub_dcn20_skip_dmub_panel_power_sequence +ffffffff8223bf70 T dmub_dcn20_get_current_time +ffffffff8223bfa0 T dmub_dcn20_get_diagnostic_data +ffffffff8223d000 T dmub_dcn21_is_phy_init +ffffffff8223e000 T dmub_dcn30_backdoor_load +ffffffff8223e260 T dmub_dcn30_setup_windows +ffffffff8223f000 T dmub_dcn31_reset +ffffffff8223f280 T dmub_dcn31_reset_release +ffffffff8223f350 T dmub_dcn31_backdoor_load +ffffffff8223f5b0 T dmub_dcn31_setup_windows +ffffffff8223f8f0 T dmub_dcn31_setup_mailbox +ffffffff8223f940 T dmub_dcn31_get_inbox1_rptr +ffffffff8223f970 T dmub_dcn31_set_inbox1_wptr +ffffffff8223f9a0 T dmub_dcn31_setup_out_mailbox +ffffffff8223f9f0 T dmub_dcn31_get_outbox1_wptr +ffffffff8223fa20 T dmub_dcn31_set_outbox1_rptr +ffffffff8223fa50 T dmub_dcn31_is_hw_init +ffffffff8223fad0 T dmub_dcn31_is_supported +ffffffff8223fb30 T dmub_dcn31_set_gpint +ffffffff8223fb60 T dmub_dcn31_is_gpint_acked +ffffffff8223fbc0 T dmub_dcn31_get_gpint_response +ffffffff8223fbf0 T dmub_dcn31_get_gpint_dataout +ffffffff8223fd10 T dmub_dcn31_get_fw_boot_status +ffffffff8223fd40 T dmub_dcn31_enable_dmub_boot_options +ffffffff8223fdc0 T dmub_dcn31_skip_dmub_panel_power_sequence +ffffffff8223fe20 T dmub_dcn31_setup_outbox0 +ffffffff8223fe70 T dmub_dcn31_get_outbox0_wptr +ffffffff8223fea0 T dmub_dcn31_set_outbox0_rptr +ffffffff8223fed0 T dmub_dcn31_get_current_time +ffffffff8223ff00 T dmub_dcn31_get_diagnostic_data +ffffffff822403a0 T dmub_dcn31_should_detect +ffffffff82241000 T dmub_dcn32_reset +ffffffff822411d0 T dmub_dcn32_reset_release +ffffffff822412c0 T dmub_dcn32_backdoor_load +ffffffff82241520 T dmub_dcn32_backdoor_load_zfb_mode +ffffffff82241710 T dmub_dcn32_setup_windows +ffffffff82241a50 T dmub_dcn32_setup_mailbox +ffffffff82241aa0 T dmub_dcn32_get_inbox1_rptr +ffffffff82241ad0 T dmub_dcn32_set_inbox1_wptr +ffffffff82241b00 T dmub_dcn32_setup_out_mailbox +ffffffff82241b50 T dmub_dcn32_get_outbox1_wptr +ffffffff82241b80 T dmub_dcn32_set_outbox1_rptr +ffffffff82241bb0 T dmub_dcn32_is_hw_init +ffffffff82241c30 T dmub_dcn32_is_supported +ffffffff82241c90 T dmub_dcn32_set_gpint +ffffffff82241cc0 T dmub_dcn32_is_gpint_acked +ffffffff82241d20 T dmub_dcn32_get_gpint_response +ffffffff82241d50 T dmub_dcn32_get_gpint_dataout +ffffffff82241e70 T dmub_dcn32_get_fw_boot_status +ffffffff82241ea0 T dmub_dcn32_enable_dmub_boot_options +ffffffff82241ed0 T dmub_dcn32_skip_dmub_panel_power_sequence +ffffffff82241f30 T dmub_dcn32_setup_outbox0 +ffffffff82241f80 T dmub_dcn32_get_outbox0_wptr +ffffffff82241fb0 T dmub_dcn32_set_outbox0_rptr +ffffffff82241fe0 T dmub_dcn32_get_current_time +ffffffff82242010 T dmub_dcn32_get_diagnostic_data +ffffffff822424b0 T dmub_dcn32_configure_dmub_in_system_memory +ffffffff822424e0 T dmub_dcn32_send_inbox0_cmd +ffffffff82242510 T dmub_dcn32_clear_inbox0_ack_register +ffffffff82242540 T dmub_dcn32_read_inbox0_ack_register +ffffffff82243000 T dmub_reg_update +ffffffff82243170 T dmub_reg_set +ffffffff822432d0 T dmub_reg_get +ffffffff82244000 T dmub_flush_buffer_mem +ffffffff82244030 T dmub_srv_create +ffffffff82244560 T dmub_srv_destroy +ffffffff82244580 T dmub_srv_calc_region_info +ffffffff822447f0 T dmub_srv_calc_fb_info +ffffffff82244990 T dmub_srv_has_hw_support +ffffffff82244a00 T dmub_srv_is_hw_init +ffffffff82244a80 T dmub_srv_hw_init +ffffffff82244ed0 T dmub_srv_hw_reset +ffffffff82244f60 T dmub_srv_cmd_queue +ffffffff82245070 T dmub_srv_cmd_execute +ffffffff82245130 T dmub_srv_wait_for_auto_load +ffffffff822451d0 T dmub_srv_wait_for_phy_init +ffffffff82245280 T dmub_srv_wait_for_idle +ffffffff82245330 T dmub_srv_send_gpint_command +ffffffff82245420 T dmub_srv_get_gpint_response +ffffffff82245480 T dmub_srv_get_gpint_dataout +ffffffff822454e0 T dmub_srv_get_fw_boot_status +ffffffff82245550 T dmub_srv_cmd_with_reply_data +ffffffff822457c0 T dmub_srv_get_outbox0_msg +ffffffff82245860 T dmub_srv_get_diagnostic_data +ffffffff822458c0 T dmub_srv_should_detect +ffffffff82245910 T dmub_srv_clear_inbox0_ack +ffffffff82245960 T dmub_srv_wait_for_inbox0_ack +ffffffff822459f0 T dmub_srv_send_inbox0_cmd +ffffffff82246000 T dmub_srv_stat_get_notification +ffffffff82247000 T setup_x_points_distribution +ffffffff82247170 T log_x_points_distribution +ffffffff822471a0 T precompute_pq +ffffffff82247370 t compute_pq +ffffffff82247580 T precompute_de_pq +ffffffff822476e0 t compute_de_pq +ffffffff822479a0 T calculate_user_regamma_coeff +ffffffff82247d70 t apply_lut_1d +ffffffff822480a0 T calculate_user_regamma_ramp +ffffffff822489e0 T mod_color_calculate_degamma_params +ffffffff82248fb0 t build_evenly_distributed_points +ffffffff82249130 t scale_gamma +ffffffff822492e0 t build_degamma +ffffffff822496b0 t build_hlg_degamma +ffffffff822498d0 t map_regamma_hw_to_x_user +ffffffff8224a030 T mod_color_calculate_regamma_params +ffffffff8224c1a0 T mod_color_calculate_degamma_curve +ffffffff8224c660 t translate_from_linear_space +ffffffff8224c9a0 t build_coefficients +ffffffff8224cb20 t calculate_mapped_value +ffffffff8224d000 T mod_color_is_table_init +ffffffff8224d050 T mod_color_get_table +ffffffff8224d0a0 T mod_color_set_table_init_state +ffffffff8224e000 T mod_freesync_create +ffffffff8224e070 T mod_freesync_destroy +ffffffff8224e0b0 T mod_freesync_calc_v_total_from_refresh +ffffffff8224e140 T mod_freesync_get_vmin_vmax +ffffffff8224e180 T mod_freesync_get_v_position +ffffffff8224e200 T mod_freesync_build_vrr_infopacket +ffffffff8224e950 T mod_freesync_build_vrr_params +ffffffff8224ecd0 T mod_freesync_calc_nominal_field_rate +ffffffff8224ed30 T mod_freesync_handle_preflip +ffffffff8224f150 T mod_freesync_handle_v_update +ffffffff8224f610 T mod_freesync_get_settings +ffffffff8224f680 T mod_freesync_calc_field_rate_from_timing +ffffffff8224f6d0 T mod_freesync_get_freesync_enabled +ffffffff8224f700 T mod_freesync_is_valid_range +ffffffff82250000 T mod_build_vsc_infopacket +ffffffff82250200 T mod_build_hf_vsif_infopacket +ffffffff82251000 T dmub_init_abm_config +ffffffff82251540 t fill_iram_v_2_3 +ffffffff822519a0 T dmcu_load_iram +ffffffff82252180 T is_psr_su_specific_panel +ffffffff82252210 T mod_power_calc_psr_configs +ffffffff82252310 T mod_power_only_edp +ffffffff82253000 T mod_vmid_get_for_ptb +ffffffff82253230 T mod_vmid_reset +ffffffff822532f0 T mod_vmid_create +ffffffff82253430 T mod_vmid_destroy +ffffffff82254000 T amdgpu_dpm_get_sclk +ffffffff82254090 T amdgpu_dpm_get_mclk +ffffffff82254120 T amdgpu_dpm_set_powergating_by_smu +ffffffff82254200 T amdgpu_dpm_set_gfx_power_up_by_imu +ffffffff82254310 T amdgpu_dpm_baco_enter +ffffffff822543a0 T amdgpu_dpm_baco_exit +ffffffff82254430 T amdgpu_dpm_set_mp1_state +ffffffff822544d0 T amdgpu_dpm_is_baco_supported +ffffffff82254580 T amdgpu_dpm_mode2_reset +ffffffff82254610 T amdgpu_dpm_baco_reset +ffffffff822546c0 T amdgpu_dpm_is_mode1_reset_supported +ffffffff82254730 T amdgpu_dpm_mode1_reset +ffffffff822547b0 T amdgpu_dpm_switch_power_profile +ffffffff82254860 T amdgpu_dpm_set_xgmi_pstate +ffffffff82254900 T amdgpu_dpm_set_df_cstate +ffffffff822549a0 T amdgpu_dpm_allow_xgmi_power_down +ffffffff82254a20 T amdgpu_dpm_enable_mgpu_fan_boost +ffffffff82254ab0 T amdgpu_dpm_set_clockgating_by_smu +ffffffff82254b50 T amdgpu_dpm_smu_i2c_bus_access +ffffffff82254bf0 T amdgpu_pm_acpi_event_handler +ffffffff82254cb0 T amdgpu_dpm_read_sensor +ffffffff82254d70 T amdgpu_dpm_compute_clocks +ffffffff82254e50 T amdgpu_dpm_enable_uvd +ffffffff82255040 T amdgpu_dpm_enable_vce +ffffffff82255230 T amdgpu_dpm_enable_jpeg +ffffffff82255330 T amdgpu_pm_load_smu_firmware +ffffffff822553e0 T amdgpu_dpm_handle_passthrough_sbr +ffffffff82255460 T amdgpu_dpm_send_hbm_bad_pages_num +ffffffff822554e0 T amdgpu_dpm_send_hbm_bad_channel_flag +ffffffff82255560 T amdgpu_dpm_get_dpm_freq_range +ffffffff82255600 T amdgpu_dpm_set_soft_freq_range +ffffffff822556a0 T amdgpu_dpm_write_watermarks_table +ffffffff82255720 T amdgpu_dpm_wait_for_event +ffffffff822557b0 T amdgpu_dpm_set_residency_gfxoff +ffffffff82255830 T amdgpu_dpm_get_residency_gfxoff +ffffffff822558b0 T amdgpu_dpm_get_entrycount_gfxoff +ffffffff82255930 T amdgpu_dpm_get_status_gfxoff +ffffffff822559b0 T amdgpu_dpm_get_thermal_throttling_counter +ffffffff82255a00 T amdgpu_dpm_gfx_state_change +ffffffff82255a70 T amdgpu_dpm_get_ecc_info +ffffffff82255af0 T amdgpu_dpm_get_vce_clock_state +ffffffff82255b80 T amdgpu_dpm_get_current_power_state +ffffffff82255bf0 T amdgpu_dpm_set_power_state +ffffffff82255d50 T amdgpu_dpm_dispatch_task +ffffffff82255df0 T amdgpu_dpm_get_performance_level +ffffffff82255e80 T amdgpu_dpm_force_performance_level +ffffffff82256060 T amdgpu_dpm_get_pp_num_states +ffffffff822560f0 T amdgpu_dpm_get_pp_table +ffffffff82256180 T amdgpu_dpm_set_fine_grain_clk_vol +ffffffff82256220 T amdgpu_dpm_odn_edit_dpm_table +ffffffff822562c0 T amdgpu_dpm_print_clock_levels +ffffffff82256350 T amdgpu_dpm_emit_clock_levels +ffffffff822563f0 T amdgpu_dpm_set_ppfeature_status +ffffffff82256480 T amdgpu_dpm_get_ppfeature_status +ffffffff82256510 T amdgpu_dpm_force_clock_level +ffffffff822565a0 T amdgpu_dpm_get_sclk_od +ffffffff82256620 T amdgpu_dpm_set_sclk_od +ffffffff822567a0 T amdgpu_dpm_get_mclk_od +ffffffff82256820 T amdgpu_dpm_set_mclk_od +ffffffff822569a0 T amdgpu_dpm_get_power_profile_mode +ffffffff82256a30 T amdgpu_dpm_set_power_profile_mode +ffffffff82256ad0 T amdgpu_dpm_get_gpu_metrics +ffffffff82256b60 T amdgpu_dpm_get_fan_control_mode +ffffffff82256bf0 T amdgpu_dpm_set_fan_speed_pwm +ffffffff82256c80 T amdgpu_dpm_get_fan_speed_pwm +ffffffff82256d10 T amdgpu_dpm_get_fan_speed_rpm +ffffffff82256da0 T amdgpu_dpm_set_fan_speed_rpm +ffffffff82256e30 T amdgpu_dpm_set_fan_control_mode +ffffffff82256ec0 T amdgpu_dpm_get_power_limit +ffffffff82256f70 T amdgpu_dpm_set_power_limit +ffffffff82257000 T amdgpu_dpm_is_cclk_dpm_supported +ffffffff82257070 T amdgpu_dpm_debugfs_print_current_performance_level +ffffffff82257100 T amdgpu_dpm_get_smu_prv_buf_details +ffffffff822571a0 T amdgpu_dpm_is_overdrive_supported +ffffffff82257240 T amdgpu_dpm_set_pp_table +ffffffff822572e0 T amdgpu_dpm_get_num_cpu_cores +ffffffff82257330 T amdgpu_dpm_stb_debug_fs_init +ffffffff82257380 T amdgpu_dpm_display_configuration_change +ffffffff82257410 T amdgpu_dpm_get_clock_by_type +ffffffff822574b0 T amdgpu_dpm_get_display_mode_validation_clks +ffffffff82257540 T amdgpu_dpm_get_clock_by_type_with_latency +ffffffff822575e0 T amdgpu_dpm_get_clock_by_type_with_voltage +ffffffff82257680 T amdgpu_dpm_set_watermarks_for_clocks_ranges +ffffffff82257710 T amdgpu_dpm_display_clock_voltage_request +ffffffff822577a0 T amdgpu_dpm_get_current_clocks +ffffffff82257830 T amdgpu_dpm_notify_smu_enable_pwe +ffffffff822578b0 T amdgpu_dpm_set_active_display_count +ffffffff82257940 T amdgpu_dpm_set_min_deep_sleep_dcefclk +ffffffff822579d0 T amdgpu_dpm_set_hard_min_dcefclk_by_freq +ffffffff82257a70 T amdgpu_dpm_set_hard_min_fclk_by_freq +ffffffff82257b10 T amdgpu_dpm_display_disable_memory_clock_switch +ffffffff82257ba0 T amdgpu_dpm_get_max_sustainable_clocks_by_dc +ffffffff82257c30 T amdgpu_dpm_get_uclk_dpm_states +ffffffff82257cd0 T amdgpu_dpm_get_dpm_clock_table +ffffffff82258000 T amdgpu_dpm_get_active_displays +ffffffff822580a0 T amdgpu_dpm_get_vblank_time +ffffffff82258150 T amdgpu_dpm_get_vrefresh +ffffffff82259000 T amdgpu_pm_sysfs_init +ffffffff82259030 T amdgpu_pm_sysfs_fini +ffffffff82259060 T amdgpu_debugfs_pm_init +ffffffff8225a000 T amdgpu_dpm_print_class_info +ffffffff8225a2b0 T amdgpu_dpm_print_cap_info +ffffffff8225a340 T amdgpu_dpm_print_ps_status +ffffffff8225a3d0 T amdgpu_pm_print_power_states +ffffffff8225a490 T amdgpu_get_platform_caps +ffffffff8225a530 T amdgpu_parse_extended_power_table +ffffffff8225b540 T amdgpu_free_extended_power_table +ffffffff8225b650 T amdgpu_add_thermal_controller +ffffffff8225ba80 T amdgpu_get_vce_clock_state +ffffffff8225bac0 T amdgpu_legacy_dpm_compute_clocks +ffffffff8225bf30 T amdgpu_dpm_thermal_work_handler +ffffffff8225d000 t pp_early_init +ffffffff8225d100 t pp_late_init +ffffffff8225d220 t pp_sw_init +ffffffff8225d240 t pp_sw_fini +ffffffff8225d2d0 t pp_hw_init +ffffffff8225d330 t pp_hw_fini +ffffffff8225d370 t pp_late_fini +ffffffff8225d3d0 t pp_suspend +ffffffff8225d3f0 t pp_resume +ffffffff8225d410 t pp_is_idle +ffffffff8225d440 t pp_wait_for_idle +ffffffff8225d470 t pp_sw_reset +ffffffff8225d4a0 t pp_set_clockgating_state +ffffffff8225d4d0 t pp_set_powergating_state +ffffffff8225d500 t pp_dpm_set_fan_control_mode +ffffffff8225d570 t pp_dpm_get_fan_control_mode +ffffffff8225d5e0 t pp_dpm_set_fan_speed_pwm +ffffffff8225d640 t pp_dpm_get_fan_speed_pwm +ffffffff8225d6a0 t pp_dpm_force_clock_level +ffffffff8225d700 t pp_dpm_print_clock_levels +ffffffff8225d760 t pp_dpm_emit_clock_levels +ffffffff8225d7c0 t pp_dpm_force_performance_level +ffffffff8225d860 t pp_dpm_get_sclk_od +ffffffff8225d8c0 t pp_dpm_set_sclk_od +ffffffff8225d920 t pp_dpm_get_mclk_od +ffffffff8225d980 t pp_dpm_set_mclk_od +ffffffff8225d9e0 t pp_dpm_read_sensor +ffffffff8225da80 t pp_dpm_get_performance_level +ffffffff8225dac0 t pp_dpm_get_current_power_state +ffffffff8225db40 t pp_dpm_get_fan_speed_rpm +ffffffff8225dba0 t pp_dpm_set_fan_speed_rpm +ffffffff8225dc00 t pp_dpm_get_pp_num_states +ffffffff8225dd40 t pp_dpm_get_pp_table +ffffffff8225dd90 t pp_dpm_set_pp_table +ffffffff8225dec0 t pp_dpm_switch_power_profile +ffffffff8225e000 t pp_dpm_get_vce_clock_state +ffffffff8225e050 t pp_dpm_dispatch_tasks +ffffffff8225e090 t pp_dpm_load_fw +ffffffff8225e100 t pp_dpm_fw_loading_complete +ffffffff8225e130 t pp_set_powergating_by_smu +ffffffff8225e2b0 t pp_set_clockgating_by_smu +ffffffff8225e320 t pp_set_power_limit +ffffffff8225e3e0 t pp_get_power_limit +ffffffff8225e480 t pp_get_power_profile_mode +ffffffff8225e4e0 t pp_set_power_profile_mode +ffffffff8225e540 t pp_set_fine_grain_clk_vol +ffffffff8225e5a0 t pp_odn_edit_dpm_table +ffffffff8225e600 t pp_dpm_set_mp1_state +ffffffff8225e660 t pp_smu_i2c_bus_access +ffffffff8225e6c0 t pp_gfx_state_change_set +ffffffff8225e720 t pp_dpm_get_sclk +ffffffff8225e770 t pp_dpm_get_mclk +ffffffff8225e7c0 t pp_display_configuration_change +ffffffff8225e810 t pp_get_display_power_level +ffffffff8225e850 t pp_get_current_clocks +ffffffff8225e970 t pp_get_clock_by_type +ffffffff8225e9c0 t pp_get_clock_by_type_with_latency +ffffffff8225ea10 t pp_get_clock_by_type_with_voltage +ffffffff8225ea60 t pp_set_watermarks_for_clocks_ranges +ffffffff8225eaa0 t pp_display_clock_voltage_request +ffffffff8225eae0 t pp_get_display_mode_validation_clocks +ffffffff8225eb40 t pp_notify_smu_enable_pwe +ffffffff8225eba0 t pp_enable_mgpu_fan_boost +ffffffff8225ec00 t pp_set_active_display_count +ffffffff8225ec40 t pp_set_hard_min_dcefclk_by_freq +ffffffff8225eca0 t pp_set_hard_min_fclk_by_freq +ffffffff8225ed00 t pp_set_min_deep_sleep_dcefclk +ffffffff8225ed60 t pp_get_asic_baco_capability +ffffffff8225edd0 t pp_get_asic_baco_state +ffffffff8225ee30 t pp_set_asic_baco_state +ffffffff8225eea0 t pp_get_ppfeature_status +ffffffff8225ef00 t pp_set_ppfeature_status +ffffffff8225ef50 t pp_asic_reset_mode_2 +ffffffff8225efb0 t pp_set_df_cstate +ffffffff8225f010 t pp_set_xgmi_pstate +ffffffff8225f070 t pp_get_gpu_metrics +ffffffff8225f0d0 t pp_get_prv_buffer_details +ffffffff8225f150 t pp_pm_compute_clocks +ffffffff82260000 T ci_baco_set_state +ffffffff82261000 T baco_program_registers +ffffffff822610d0 t baco_cmd_handler +ffffffff82261250 T soc15_baco_program_registers +ffffffff82262000 T fiji_baco_set_state +ffffffff82263000 T phm_setup_asic +ffffffff82263050 T phm_power_down_asic +ffffffff822630a0 T phm_set_power_state +ffffffff82263110 T phm_enable_dynamic_state_management +ffffffff822631c0 T phm_disable_dynamic_state_management +ffffffff82263260 T phm_force_dpm_levels +ffffffff822632b0 T phm_apply_state_adjust_rules +ffffffff82263300 T phm_apply_clock_adjust_rules +ffffffff82263350 T phm_powerdown_uvd +ffffffff822633a0 T phm_disable_clock_power_gatings +ffffffff822633f0 T phm_pre_display_configuration_changed +ffffffff82263450 T phm_display_configuration_changed +ffffffff822634b0 T phm_notify_smc_display_config_after_ps_adjustment +ffffffff82263510 T phm_stop_thermal_controller +ffffffff82263570 T phm_register_irq_handlers +ffffffff822635c0 T phm_start_thermal_controller +ffffffff82263700 T phm_check_smc_update_required_for_display_configuration +ffffffff82263760 T phm_check_states_equal +ffffffff822637b0 T phm_store_dal_configuration_data +ffffffff82263900 T phm_get_dal_power_level +ffffffff82263960 T phm_set_cpu_power_state +ffffffff822639b0 T phm_get_performance_level +ffffffff82263a10 T phm_get_clock_info +ffffffff82263b90 T phm_get_current_shallow_sleep_clocks +ffffffff82263be0 T phm_get_clock_by_type +ffffffff82263c30 T phm_get_clock_by_type_with_latency +ffffffff82263c80 T phm_get_clock_by_type_with_voltage +ffffffff82263cd0 T phm_set_watermarks_for_clocks_ranges +ffffffff82263d20 T phm_display_clock_voltage_request +ffffffff82263d70 T phm_get_max_high_clocks +ffffffff82263dc0 T phm_disable_smc_firmware_ctf +ffffffff82263e20 T phm_set_active_display_count +ffffffff82264000 T hwmgr_early_init +ffffffff82264470 T hwmgr_sw_init +ffffffff822644e0 T hwmgr_sw_fini +ffffffff82264530 T hwmgr_hw_init +ffffffff822646f0 T hwmgr_hw_fini +ffffffff822647b0 T hwmgr_suspend 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atomctrl_get_dfs_pll_dividers_vi +ffffffff82268980 T atomctrl_get_reference_clock +ffffffff822689e0 T atomctrl_is_voltage_controlled_by_gpio_v3 +ffffffff82268aa0 T atomctrl_get_voltage_table_v3 +ffffffff82268c00 T atomctrl_get_pp_assign_pin +ffffffff82268cf0 T atomctrl_calculate_voltage_evv_on_sclk +ffffffff82269070 T atomctrl_get_voltage_evv_on_sclk +ffffffff822690f0 T atomctrl_get_voltage_evv +ffffffff822691a0 T atomctrl_get_mpll_reference_clock +ffffffff82269210 T atomctrl_is_asic_internal_ss_supported +ffffffff82269260 T atomctrl_get_memory_clock_spread_spectrum +ffffffff82269360 T atomctrl_get_engine_clock_spread_spectrum +ffffffff82269460 T atomctrl_read_efuse +ffffffff82269510 T atomctrl_set_ac_timing_ai +ffffffff82269570 T atomctrl_get_voltage_evv_on_sclk_ai +ffffffff822695f0 T atomctrl_get_smc_sclk_range_table +ffffffff822696b0 T atomctrl_get_vddc_shared_railinfo +ffffffff82269720 T atomctrl_get_avfs_information +ffffffff822698a0 T atomctrl_get_svi2_info +ffffffff82269980 T atomctrl_get_leakage_id_from_efuse +ffffffff822699e0 T atomctrl_get_leakage_vddc_base_on_leakage +ffffffff82269b80 T atomctrl_get_voltage_range +ffffffff82269c40 T atomctrl_get_edc_hilo_leakage_offset_table +ffffffff82269cc0 T atomctrl_get_edc_leakage_table +ffffffff8226a000 T pp_atomfwctrl_is_voltage_controlled_by_gpio_v4 +ffffffff8226a0d0 T pp_atomfwctrl_get_voltage_table_v4 +ffffffff8226a290 T pp_atomfwctrl_get_pp_assign_pin +ffffffff8226a370 T pp_atomfwctrl_enter_self_refresh +ffffffff8226a3a0 T pp_atomfwctrl_get_gpu_pll_dividers_vega10 +ffffffff8226a450 T pp_atomfwctrl_get_avfs_information +ffffffff8226a780 T pp_atomfwctrl_get_gpio_information +ffffffff8226a820 T pp_atomfwctrl_get_clk_information_by_clkid +ffffffff8226a8a0 T pp_atomfwctrl_get_vbios_bootup_values +ffffffff8226ac20 T pp_atomfwctrl_get_smc_dpm_information +ffffffff8226b000 T encode_pcie_lane_width +ffffffff8226b030 T decode_pcie_lane_width +ffffffff8226c000 t pp_tables_v1_0_initialize +ffffffff8226d430 t pp_tables_v1_0_uninitialize +ffffffff8226d5e0 T get_number_of_powerplay_table_entries_v1_0 +ffffffff8226d690 T get_powerplay_table_entry_v1_0 +ffffffff8226e000 T pp_tables_get_response_times +ffffffff8226e0d0 T pp_tables_get_num_of_entries +ffffffff8226e190 T pp_tables_get_entry +ffffffff8226e4f0 t init_non_clock_fields +ffffffff8226e670 t pp_tables_initialize +ffffffff8226fad0 t pp_tables_uninitialize +ffffffff8226fcd0 t get_number_of_vce_state_table_entries +ffffffff8226fdd0 t get_vce_state_table_entry +ffffffff82270000 T smu10_init_function_pointers +ffffffff82270040 t smu10_hwmgr_backend_init +ffffffff82270710 t smu10_hwmgr_backend_fini +ffffffff82270850 t smu10_setup_asic_task +ffffffff822708c0 t smu10_get_power_state_size +ffffffff822708f0 t smu10_apply_state_adjust_rules +ffffffff82270920 t smu10_dpm_force_dpm_level +ffffffff82270ea0 t smu10_enable_dpm_tasks +ffffffff82270f20 t smu10_disable_dpm_tasks +ffffffff82270f50 t smu10_dpm_patch_boot_state +ffffffff82270f80 t smu10_dpm_get_pp_table_entry +ffffffff82270fe0 t smu10_dpm_get_num_of_pp_table_entries +ffffffff82271030 t smu10_powergate_vcn +ffffffff822710d0 t smu10_dpm_get_mclk +ffffffff82271130 t smu10_dpm_get_sclk +ffffffff82271180 t smu10_set_power_state_tasks +ffffffff822711f0 t smu10_set_cpu_power_state +ffffffff82271220 t smu10_store_cc6_data +ffffffff82271290 t smu10_get_dal_power_level +ffffffff822712c0 t smu10_get_performance_level +ffffffff82271350 t smu10_get_current_shallow_sleep_clocks +ffffffff822713b0 t smu10_get_clock_by_type_with_latency +ffffffff82271500 t smu10_get_clock_by_type_with_voltage +ffffffff82271610 t smu10_set_watermarks_for_clocks_ranges +ffffffff822716e0 t smu10_display_clock_voltage_request +ffffffff82271780 t smu10_get_max_high_clocks +ffffffff822717b0 t smu10_power_off_asic +ffffffff82271800 t smu10_force_clock_level +ffffffff822719c0 t smu10_print_clock_levels +ffffffff82271d60 t smu10_gfx_off_control +ffffffff82271e70 t smu10_read_sensor +ffffffff82271ff0 t smu10_set_active_display_count +ffffffff82272050 t smu10_set_min_deep_sleep_dcefclk +ffffffff822720b0 t smu10_get_power_profile_mode +ffffffff822720f0 t smu10_set_power_profile_mode +ffffffff82272240 t smu10_set_fine_grain_clk_vol +ffffffff82272450 t smu10_powergate_mmhub +ffffffff82272470 t smu10_smus_notify_pwe +ffffffff82272490 t smu10_powergate_sdma +ffffffff822724b0 t smu10_set_hard_min_dcefclk_by_freq +ffffffff82272510 t smu10_set_hard_min_fclk_by_freq +ffffffff82272570 t smu10_set_hard_min_gfxclk_by_freq +ffffffff822725d0 t smu10_set_soft_max_gfxclk_by_freq +ffffffff82272630 t smu10_asic_reset +ffffffff82272650 t smu10_gfx_state_change +ffffffff82272690 t smu10_dpm_get_pp_table_entry_callback +ffffffff82273000 T smu7_baco_get_capability +ffffffff82273060 T smu7_baco_get_state +ffffffff822730b0 T smu7_baco_set_state +ffffffff82274000 T smu7_powerdown_uvd +ffffffff82274050 T smu7_disable_clock_power_gating +ffffffff822740e0 T smu7_powergate_uvd +ffffffff822741d0 T smu7_powergate_vce +ffffffff822742c0 T smu7_update_clock_gatings +ffffffff82274670 T smu7_powergate_gfx +ffffffff82275000 T smu7_get_sleep_divider_id_from_clock +ffffffff822750a0 T smu7_init_function_pointers +ffffffff82275100 t smu7_hwmgr_backend_init +ffffffff82276f50 t smu7_hwmgr_backend_fini +ffffffff82276fc0 t smu7_setup_asic_task +ffffffff82277330 t smu7_get_power_state_size +ffffffff82277360 t smu7_apply_state_adjust_rules +ffffffff822777e0 t smu7_force_dpm_level +ffffffff82277c10 t smu7_enable_dpm_tasks +ffffffff8227a380 t smu7_disable_dpm_tasks +ffffffff8227aac0 t smu7_dpm_patch_boot_state +ffffffff8227ac00 t smu7_get_pp_table_entry +ffffffff8227b000 t smu7_get_number_of_powerplay_table_entries +ffffffff8227b070 t smu7_dpm_get_mclk +ffffffff8227b110 t smu7_dpm_get_sclk +ffffffff8227b1b0 t smu7_set_power_state_tasks +ffffffff8227bf40 t smu7_notify_smc_display_config_after_ps_adjustment +ffffffff8227bf70 t smu7_display_configuration_changed_task +ffffffff8227c130 t smu7_set_max_fan_rpm_output +ffffffff8227c160 t smu7_set_max_fan_pwm_output +ffffffff8227c180 t smu7_set_fan_control_mode +ffffffff8227c210 t smu7_get_fan_control_mode +ffffffff8227c250 t smu7_register_irq_handlers +ffffffff8227c300 t smu7_check_smc_update_required_for_display_configuration +ffffffff8227c3c0 t smu7_check_states_equal +ffffffff8227c560 t smu7_get_performance_level +ffffffff8227c600 t smu7_get_clock_by_type +ffffffff8227c7c0 t smu7_get_clock_by_type_with_latency +ffffffff8227c960 t smu7_set_watermarks_for_clocks_ranges +ffffffff8227cba0 t smu7_get_max_high_clocks +ffffffff8227cc20 t smu7_power_off_asic +ffffffff8227cc80 t smu7_force_clock_level +ffffffff8227cd90 t smu7_print_clock_levels +ffffffff8227d370 t smu7_get_sclk_od +ffffffff8227d3e0 t smu7_set_sclk_od +ffffffff8227d4a0 t smu7_get_mclk_od +ffffffff8227d510 t smu7_set_mclk_od +ffffffff8227d5d0 t smu7_read_sensor +ffffffff8227d8a0 t smu7_avfs_control +ffffffff8227d970 t smu7_notify_cac_buffer_info +ffffffff8227db10 t smu7_get_thermal_temperature_range +ffffffff8227dba0 t smu7_get_power_profile_mode +ffffffff8227dbe0 t smu7_set_power_profile_mode +ffffffff8227de40 t smu7_odn_edit_dpm_table +ffffffff8227dff0 t phm_add_voltage +ffffffff8227e100 t smu7_get_profiling_clk +ffffffff8227e2c0 t smu7_check_dpm_table_updated +ffffffff8227e410 t smu7_odn_initial_default_setting +ffffffff8227e540 t smu7_set_dpm_event_sources +ffffffff8227e660 t smu7_get_pp_table_entry_callback_func_v0 +ffffffff8227eb60 t smu7_get_pp_table_entry_callback_func_v1 +ffffffff82280000 T smu7_enable_didt_config +ffffffff822803c0 t smu7_program_pt_config_registers +ffffffff822805b0 t smu7_enable_didt +ffffffff822807a0 T smu7_disable_didt_config +ffffffff82280860 T smu7_enable_smc_cac +ffffffff822808f0 T smu7_disable_smc_cac +ffffffff82280980 T smu7_set_power_limit +ffffffff822809e0 T smu7_enable_power_containment +ffffffff82280b70 T smu7_disable_power_containment +ffffffff82280c90 T smu7_power_control_set_level +ffffffff82281000 T smu7_fan_ctrl_get_fan_speed_info +ffffffff82281080 T smu7_fan_ctrl_get_fan_speed_pwm +ffffffff82281140 T smu7_fan_ctrl_get_fan_speed_rpm +ffffffff822811f0 T smu7_fan_ctrl_set_static_mode +ffffffff82281320 T smu7_fan_ctrl_set_default_mode +ffffffff82281400 T smu7_fan_ctrl_start_smc_fan_control +ffffffff82281530 T smu7_fan_ctrl_stop_smc_fan_control +ffffffff82281550 T smu7_fan_ctrl_set_fan_speed_pwm +ffffffff82281740 T smu7_fan_ctrl_reset_fan_speed_to_default +ffffffff82281930 T smu7_fan_ctrl_set_fan_speed_rpm +ffffffff82281b10 T smu7_thermal_get_temperature +ffffffff82281b70 T smu7_thermal_disable_alert +ffffffff82281c10 T smu7_thermal_stop_thermal_controller +ffffffff82281d90 T smu7_start_thermal_controller +ffffffff82282140 T smu7_thermal_ctrl_uninitialize_thermal_controller +ffffffff82283000 T smu8_init_function_pointers +ffffffff82283040 t smu8_hwmgr_backend_init +ffffffff82283520 t smu8_hwmgr_backend_fini +ffffffff822835a0 t smu8_setup_asic_task +ffffffff82283ac0 t smu8_get_power_state_size +ffffffff82283af0 t smu8_apply_state_adjust_rules +ffffffff82283c40 t smu8_dpm_force_dpm_level +ffffffff82283f40 t smu8_enable_dpm_tasks +ffffffff82284090 t smu8_disable_dpm_tasks +ffffffff82284170 t smu8_dpm_patch_boot_state +ffffffff822841d0 t smu8_dpm_get_pp_table_entry +ffffffff82284230 t smu8_dpm_get_num_of_pp_table_entries +ffffffff82284280 t smu8_dpm_powerdown_uvd +ffffffff822842d0 t smu8_dpm_powergate_vce +ffffffff822844a0 t smu8_dpm_powergate_uvd +ffffffff822846d0 t smu8_dpm_powergate_acp +ffffffff82284730 t smu8_dpm_get_mclk +ffffffff82284760 t smu8_dpm_get_sclk +ffffffff822847d0 t smu8_set_power_state_tasks +ffffffff82284b20 t smu8_set_cpu_power_state +ffffffff82284ba0 t smu8_store_cc6_data +ffffffff82284c20 t smu8_get_dal_power_level +ffffffff82284ca0 t smu8_get_performance_level +ffffffff82284d90 t smu8_get_current_shallow_sleep_clocks +ffffffff82284df0 t smu8_get_clock_by_type +ffffffff82284f30 t smu8_get_max_high_clocks +ffffffff82284ff0 t smu8_power_off_asic +ffffffff82285070 t smu8_force_clock_level +ffffffff822850e0 t smu8_print_clock_levels +ffffffff822852b0 t smu8_read_sensor +ffffffff822855b0 t smu8_notify_cac_buffer_info +ffffffff82285660 t smu8_get_thermal_temperature_range +ffffffff822856e0 t smu8_dpm_get_pp_table_entry_callback +ffffffff82286000 T smu9_baco_get_capability +ffffffff822860d0 T smu9_baco_get_state +ffffffff82287000 T convert_to_vid +ffffffff82287050 T convert_to_vddc +ffffffff822870a0 T phm_copy_clock_limits_array +ffffffff82287180 T phm_copy_overdrive_settings_limits_array +ffffffff82287260 T phm_set_field_to_u32 +ffffffff822872c0 T phm_wait_on_register +ffffffff822873d0 T phm_wait_on_indirect_register +ffffffff82287500 T phm_wait_for_register_unequal +ffffffff82287600 T phm_wait_for_indirect_register_unequal +ffffffff82287730 T phm_cf_want_uvd_power_gating +ffffffff82287770 T phm_cf_want_vce_power_gating +ffffffff822877b0 T phm_trim_voltage_table +ffffffff822878e0 T phm_get_svi2_mvdd_voltage_table +ffffffff82287a70 T phm_get_svi2_vddci_voltage_table +ffffffff82287c00 T phm_get_svi2_vdd_voltage_table +ffffffff82287ca0 T phm_trim_voltage_table_to_fit_state_table +ffffffff82287d80 T phm_reset_single_dpm_table +ffffffff82287e50 T phm_setup_pcie_table_entry +ffffffff82287e90 T phm_get_dpm_level_enable_mask_value +ffffffff82287fb0 T phm_get_voltage_index +ffffffff82288030 T phm_get_voltage_id +ffffffff822880b0 T phm_find_closest_vddci +ffffffff82288110 T phm_find_boot_level +ffffffff82288180 T phm_get_sclk_for_voltage_evv +ffffffff82288230 T phm_initializa_dynamic_state_adjustment_rule_settings +ffffffff82288340 T phm_get_lowest_enabled_level +ffffffff82288380 T phm_apply_dal_min_voltage_request +ffffffff82288450 T phm_get_voltage_evv_on_sclk +ffffffff82288500 T phm_irq_process +ffffffff82288700 t orderly_poweroff +ffffffff82288710 T smu9_register_irq_handlers +ffffffff822887c0 T smu_atom_get_data_table +ffffffff82288830 T smu_get_voltage_dependency_table_ppt_v1 +ffffffff82288910 T smu_set_watermarks_for_clocks_ranges +ffffffff82289000 T tonga_baco_set_state +ffffffff8228a000 T vega10_baco_set_state +ffffffff8228b000 T vega10_enable_disable_vce_dpm +ffffffff8228b090 T vega10_hwmgr_init +ffffffff8228b0f0 t vega10_hwmgr_backend_init +ffffffff8228bef0 t vega10_hwmgr_backend_fini +ffffffff8228bf60 t vega10_setup_asic_task +ffffffff8228c090 t vega10_get_power_state_size +ffffffff8228c0c0 t vega10_apply_state_adjust_rules +ffffffff8228c450 t vega10_dpm_force_dpm_level +ffffffff8228c980 t vega10_enable_dpm_tasks +ffffffff8228f2f0 t vega10_disable_dpm_tasks +ffffffff8228f8d0 t vega10_patch_boot_state +ffffffff8228f900 t vega10_get_pp_table_entry +ffffffff8228f970 t vega10_power_gate_vce +ffffffff8228fa10 t vega10_power_gate_uvd +ffffffff8228fab0 t vega10_dpm_get_mclk +ffffffff8228fb50 t vega10_dpm_get_sclk +ffffffff8228fbf0 t vega10_set_power_state_tasks +ffffffff82290680 t vega10_notify_smc_display_config_after_ps_adjustment +ffffffff82290830 t vega10_display_configuration_changed_task +ffffffff82290900 t vega10_set_fan_control_mode +ffffffff82290970 t vega10_get_fan_control_mode +ffffffff822909b0 t vega10_check_smc_update_required_for_display_configuration +ffffffff82290a10 t vega10_check_states_equal +ffffffff82290b70 t vega10_get_dal_power_level +ffffffff82290bb0 t vega10_get_performance_level +ffffffff82290c50 t vega10_get_clock_by_type_with_latency +ffffffff82290e80 t vega10_get_clock_by_type_with_voltage +ffffffff82290f60 t vega10_set_watermarks_for_clocks_ranges +ffffffff82290fc0 t vega10_display_clock_voltage_request +ffffffff82291040 t vega10_power_off_asic +ffffffff822910b0 t vega10_force_clock_level +ffffffff822911e0 t vega10_emit_clock_levels +ffffffff82291350 t vega10_print_clock_levels +ffffffff82291b30 t vega10_get_sclk_od +ffffffff82291ba0 t vega10_set_sclk_od +ffffffff82291ca0 t vega10_get_mclk_od +ffffffff82291d10 t vega10_set_mclk_od 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vega10_populate_single_memory_level +ffffffff82293970 t vega10_get_pp_table_entry_callback_func +ffffffff82293b90 t vega10_odn_update_power_state +ffffffff82294000 T vega10_enable_didt_config +ffffffff82295870 T vega10_disable_didt_config +ffffffff82295ab0 T vega10_initialize_power_tune_defaults +ffffffff82295be0 T vega10_set_power_limit +ffffffff82295c30 T vega10_enable_power_containment +ffffffff82295d50 T vega10_disable_power_containment +ffffffff82295e20 T vega10_power_control_set_level +ffffffff82295e80 t vega10_didt_set_mask +ffffffff82297000 t vega10_pp_tables_initialize +ffffffff822989a0 t vega10_pp_tables_uninitialize +ffffffff82298b50 T vega10_get_number_of_powerplay_table_entries +ffffffff82298c00 T vega10_get_powerplay_table_entry +ffffffff82298d80 T vega10_baco_set_cap +ffffffff82299000 T vega10_fan_ctrl_get_fan_speed_info +ffffffff82299080 T vega10_fan_ctrl_get_fan_speed_pwm +ffffffff822991a0 T vega10_fan_ctrl_get_fan_speed_rpm +ffffffff822992a0 T vega10_fan_ctrl_set_static_mode +ffffffff82299550 T vega10_fan_ctrl_set_default_mode +ffffffff82299760 T vega10_fan_ctrl_start_smc_fan_control +ffffffff82299820 T vega10_fan_ctrl_stop_smc_fan_control +ffffffff822998e0 T vega10_fan_ctrl_set_fan_speed_pwm +ffffffff82299b00 T vega10_fan_ctrl_reset_fan_speed_to_default +ffffffff82299bc0 T vega10_fan_ctrl_set_fan_speed_rpm +ffffffff82299d90 T vega10_thermal_get_temperature +ffffffff82299e20 T vega10_thermal_disable_alert +ffffffff82299f30 T vega10_thermal_stop_thermal_controller +ffffffff82299f90 T vega10_enable_mgpu_fan_boost +ffffffff8229a0a0 T vega10_start_thermal_controller +ffffffff8229a640 T vega10_thermal_ctrl_uninitialize_thermal_controller +ffffffff8229b000 T vega12_baco_set_state +ffffffff8229c000 T vega12_enable_disable_vce_dpm +ffffffff8229c090 T vega12_hwmgr_init +ffffffff8229c0d0 t vega12_hwmgr_backend_init +ffffffff8229c930 t vega12_hwmgr_backend_fini +ffffffff8229c990 t vega12_setup_asic_task +ffffffff8229c9d0 t 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vega12_fan_ctrl_start_smc_fan_control +ffffffff822a20e0 T vega12_fan_ctrl_stop_smc_fan_control +ffffffff822a2110 T vega12_fan_ctrl_reset_fan_speed_to_default +ffffffff822a2140 T vega12_thermal_get_temperature +ffffffff822a21d0 T vega12_thermal_disable_alert +ffffffff822a2260 T vega12_thermal_stop_thermal_controller +ffffffff822a22f0 T vega12_start_thermal_controller +ffffffff822a3000 T vega20_baco_get_capability +ffffffff822a30c0 T vega20_baco_get_state +ffffffff822a3150 T vega20_baco_set_state +ffffffff822a3350 T vega20_baco_apply_vdci_flush_workaround +ffffffff822a4000 T vega20_hwmgr_init +ffffffff822a4040 t vega20_hwmgr_backend_init +ffffffff822a4980 t vega20_hwmgr_backend_fini +ffffffff822a49e0 t vega20_setup_asic_task +ffffffff822a4ad0 t vega20_apply_clocks_adjust_rules +ffffffff822a4fc0 t vega20_dpm_force_dpm_level +ffffffff822a5730 t vega20_enable_dpm_tasks +ffffffff822a6ba0 t vega20_disable_dpm_tasks +ffffffff822a6d40 t vega20_power_gate_vce +ffffffff822a6e70 t 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navi10_print_clk_levels +ffffffff822e0b20 t navi10_emit_clk_levels +ffffffff822e0d60 t navi10_force_clk_levels +ffffffff822e0e90 t navi10_od_edit_dpm_table +ffffffff822e1510 t navi10_get_clock_by_type_with_latency +ffffffff822e1610 t navi10_get_power_profile_mode +ffffffff822e1860 t navi10_set_power_profile_mode +ffffffff822e1b30 t navi10_dpm_set_vcn_enable +ffffffff822e1bc0 t navi10_dpm_set_jpeg_enable +ffffffff822e1c40 t navi10_read_sensor +ffffffff822e1dc0 t navi10_pre_display_config_changed +ffffffff822e1e60 t navi10_display_config_changed +ffffffff822e1ee0 t navi10_notify_smc_display_config +ffffffff822e2070 t navi10_is_dpm_running +ffffffff822e20c0 t navi10_get_fan_speed_rpm +ffffffff822e2160 t navi10_set_watermarks_table +ffffffff822e2310 t navi10_get_thermal_temperature_range +ffffffff822e2400 t navi10_get_uclk_dpm_states +ffffffff822e2510 t navi10_set_default_od_settings +ffffffff822e2770 t navi10_display_disable_memory_clock_switch +ffffffff822e27f0 t navi10_get_power_limit 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sienna_cichlid_set_default_dpm_table +ffffffff822e5920 t sienna_cichlid_populate_umd_state_clk +ffffffff822e59e0 t sienna_cichlid_print_clk_levels +ffffffff822e5bc0 t sienna_cichlid_force_clk_levels +ffffffff822e5cf0 t sienna_cichlid_od_edit_dpm_table +ffffffff822e6290 t sienna_cichlid_restore_user_od_settings +ffffffff822e6320 t sienna_cichlid_get_power_profile_mode +ffffffff822e6570 t sienna_cichlid_set_power_profile_mode +ffffffff822e6840 t sienna_cichlid_dpm_set_vcn_enable +ffffffff822e6900 t sienna_cichlid_dpm_set_jpeg_enable +ffffffff822e6980 t sienna_cichlid_read_sensor +ffffffff822e6c80 t sienna_cichlid_pre_display_config_changed +ffffffff822e6cb0 t sienna_cichlid_display_config_changed +ffffffff822e6d10 t sienna_cichlid_notify_smc_display_config +ffffffff822e6ea0 t sienna_cichlid_is_dpm_running +ffffffff822e6ef0 t sienna_cichlid_get_fan_speed_rpm +ffffffff822e7000 t sienna_cichlid_set_watermarks_table +ffffffff822e71a0 t sienna_cichlid_get_thermal_temperature_range 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sienna_cichlid_get_dpm_ultimate_freq +ffffffff822e8690 t sienna_cichlid_get_gpu_metrics +ffffffff822e8b10 t sienna_cichlid_enable_mgpu_fan_boost +ffffffff822e8b60 t sienna_cichlid_get_fan_parameters +ffffffff822e8ba0 t sienna_cichlid_gpo_control +ffffffff822e8c50 t sienna_cichlid_get_ecc_info +ffffffff822e8d40 t sienna_cichlid_stb_get_data_direct +ffffffff822e8de0 t sienna_cichlid_get_default_config_table_settings +ffffffff822e8e50 t sienna_cichlid_set_config_table +ffffffff822e8f20 t sienna_cichlid_get_smu_metrics_data +ffffffff822e9360 t sienna_cichlid_get_throttler_status_locked +ffffffff822e94e0 t sienna_cichlid_get_smartshift_power_percentage +ffffffff822e9610 t sienna_cichlid_i2c_xfer +ffffffff822e98c0 t sienna_cichlid_i2c_func +ffffffff822ea000 T smu_v11_0_init_microcode +ffffffff822ea2b0 T smu_v11_0_fini_microcode +ffffffff822ea330 T smu_v11_0_load_microcode +ffffffff822ea480 T smu_v11_0_check_fw_status +ffffffff822ea4d0 T smu_v11_0_check_fw_version +ffffffff822ea680 T smu_v11_0_setup_pptable +ffffffff822ea7b0 T smu_v11_0_init_smc_tables +ffffffff822ea910 T smu_v11_0_fini_smc_tables +ffffffff822eab40 T smu_v11_0_init_power +ffffffff822eabd0 T smu_v11_0_fini_power +ffffffff822eac30 T smu_v11_0_get_vbios_bootup_values +ffffffff822eaf90 T smu_v11_0_notify_memory_pool_location +ffffffff822eb080 T smu_v11_0_set_min_deep_sleep_dcefclk +ffffffff822eb100 T smu_v11_0_set_driver_table_location +ffffffff822eb170 T smu_v11_0_set_tool_table_location +ffffffff822eb1e0 T smu_v11_0_init_display_count +ffffffff822eb240 T smu_v11_0_set_allowed_mask +ffffffff822eb310 T smu_v11_0_system_features_control +ffffffff822eb330 T smu_v11_0_notify_display_change +ffffffff822eb3a0 T smu_v11_0_init_max_sustainable_clocks +ffffffff822eb610 t smu_v11_0_get_max_sustainable_clock +ffffffff822eb730 T smu_v11_0_get_current_power_limit +ffffffff822eb800 T smu_v11_0_set_power_limit +ffffffff822eb940 T smu_v11_0_interrupt_work +ffffffff822eb9c0 T smu_v11_0_enable_thermal_alert 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T smu_v11_0_set_smu_mailbox_registers +ffffffff822edca0 t smu_v11_0_set_irq_state +ffffffff822ee220 t smu_v11_0_irq_process +ffffffff822ee520 t orderly_poweroff +ffffffff822ef000 T vangogh_set_ppt_funcs +ffffffff822ef040 t vangogh_set_default_dpm_tables +ffffffff822ef070 t vangogh_common_print_clk_levels +ffffffff822ef4c0 t vangogh_force_clk_levels +ffffffff822ef6f0 t vangogh_od_edit_dpm_table +ffffffff822efc50 t vangogh_get_power_profile_mode +ffffffff822efd20 t vangogh_set_power_profile_mode +ffffffff822efe50 t vangogh_dpm_set_vcn_enable +ffffffff822efea0 t vangogh_dpm_set_jpeg_enable +ffffffff822efef0 t vangogh_read_sensor +ffffffff822f0020 t vangogh_is_dpm_running +ffffffff822f0080 t vangogh_set_watermarks_table +ffffffff822f0210 t vangogh_set_performance_level +ffffffff822f0b40 t vangogh_get_power_limit +ffffffff822f0cc0 t vangogh_get_ppt_limit +ffffffff822f0d30 t vangogh_get_dpm_clock_table +ffffffff822f0ea0 t vangogh_init_smc_tables +ffffffff822f10f0 t vangogh_system_features_control +ffffffff822f1140 t vangogh_set_power_limit +ffffffff822f12a0 t vangogh_get_gfxoff_status +ffffffff822f1330 t vangogh_get_gfxoff_entrycount +ffffffff822f13a0 t vangogh_set_gfxoff_residency +ffffffff822f1410 t vangogh_get_gfxoff_residency +ffffffff822f1450 t vangogh_mode2_reset +ffffffff822f1590 t vangogh_common_get_gpu_metrics +ffffffff822f1be0 t vangogh_post_smu_init +ffffffff822f1d90 t vangogh_set_fine_grain_gfx_freq_parameters +ffffffff822f1e00 t vangogh_common_get_smu_metrics_data +ffffffff822f2150 t vangogh_force_dpm_limit_value +ffffffff822f2290 t vangogh_get_dpm_ultimate_freq +ffffffff822f2650 t vangogh_set_soft_freq_limited_range +ffffffff822f3000 T renoir_set_ppt_funcs +ffffffff822f30a0 t renoir_get_current_power_state +ffffffff822f3120 t renoir_print_clk_levels +ffffffff822f3390 t renoir_force_clk_levels +ffffffff822f35c0 t renoir_od_edit_dpm_table +ffffffff822f38c0 t renoir_get_power_profile_mode +ffffffff822f3990 t renoir_set_power_profile_mode +ffffffff822f3ac0 t renoir_dpm_set_vcn_enable +ffffffff822f3b40 t renoir_dpm_set_jpeg_enable +ffffffff822f3bc0 t renoir_read_sensor +ffffffff822f3fb0 t renoir_is_dpm_running +ffffffff822f3ff0 t renoir_set_watermarks_table +ffffffff822f41a0 t renoir_set_performance_level +ffffffff822f46e0 t renoir_get_dpm_clock_table +ffffffff822f4a30 t renoir_init_smc_tables +ffffffff822f4ba0 t renoir_get_enabled_mask +ffffffff822f4be0 t renoir_get_dpm_ultimate_freq +ffffffff822f4e80 t renoir_get_gpu_metrics +ffffffff822f50a0 t renoir_gfx_state_change_set +ffffffff822f50d0 t renoir_set_fine_grain_gfx_freq_parameters +ffffffff822f5170 t renoir_force_dpm_limit_value +ffffffff822f6000 T smu_v12_0_check_fw_status +ffffffff822f6050 T smu_v12_0_check_fw_version +ffffffff822f6110 T smu_v12_0_powergate_sdma +ffffffff822f6150 T smu_v12_0_set_gfx_cgpg +ffffffff822f61b0 T smu_v12_0_get_gfxoff_status +ffffffff822f6240 T smu_v12_0_gfx_off_control +ffffffff822f6360 T smu_v12_0_fini_smc_tables +ffffffff822f6410 T smu_v12_0_set_default_dpm_tables +ffffffff822f6440 T smu_v12_0_mode2_reset +ffffffff822f6460 T smu_v12_0_set_soft_freq_limited_range +ffffffff822f65a0 T smu_v12_0_set_driver_table_location +ffffffff822f6610 T smu_v12_0_get_vbios_bootup_values +ffffffff822f7000 T aldebaran_set_ppt_funcs +ffffffff822f7040 t aldebaran_get_allowed_feature_mask +ffffffff822f7090 t aldebaran_set_default_dpm_table +ffffffff822f7290 t aldebaran_populate_umd_state_clk +ffffffff822f7390 t aldebaran_print_clk_levels +ffffffff822f7550 t aldebaran_force_clk_levels +ffffffff822f7700 t aldebaran_usr_edit_dpm_table +ffffffff822f7920 t aldebaran_read_sensor +ffffffff822f7bc0 t aldebaran_is_dpm_running +ffffffff822f7c10 t aldebaran_get_thermal_temperature_range +ffffffff822f7ce0 t aldebaran_set_performance_level +ffffffff822f7d90 t aldebaran_get_power_limit +ffffffff822f7f20 t aldebaran_set_df_cstate +ffffffff822f7fa0 t aldebaran_allow_xgmi_power_down +ffffffff822f8040 t aldebaran_i2c_control_init +ffffffff822f8100 t aldebaran_i2c_control_fini +ffffffff822f8140 t aldebaran_get_unique_id +ffffffff822f8220 t aldebaran_init_smc_tables +ffffffff822f83b0 t aldebaran_set_mp1_state +ffffffff822f83f0 t aldebaran_setup_pptable +ffffffff822f84c0 t aldebaran_system_features_control +ffffffff822f8620 t aldebaran_set_power_limit +ffffffff822f86b0 t aldebaran_is_baco_supported +ffffffff822f86e0 t aldebaran_is_mode1_reset_supported +ffffffff822f8710 t aldebaran_is_mode2_reset_supported +ffffffff822f8740 t aldebaran_mode1_reset +ffffffff822f8820 t aldebaran_mode2_reset +ffffffff822f89e0 t aldebaran_set_soft_freq_limited_range +ffffffff822f8bf0 t aldebaran_log_thermal_throttling_event +ffffffff822f8f00 t aldebaran_get_gpu_metrics +ffffffff822f9190 t aldebaran_smu_handle_passthrough_sbr +ffffffff822f91b0 t aldebaran_smu_send_hbm_bad_page_num +ffffffff822f9240 t aldebaran_get_ecc_info +ffffffff822f93a0 t aldebaran_send_hbm_bad_channel_flag +ffffffff822f9480 t aldebaran_get_current_clk_freq_by_table +ffffffff822f95c0 t aldebaran_get_smu_metrics_data +ffffffff822f9810 t aldebaran_upload_dpm_level +ffffffff822f9900 t aldebaran_i2c_xfer +ffffffff822f9bb0 t aldebaran_i2c_func +ffffffff822fa000 T smu_v13_0_init_microcode +ffffffff822fa1d0 T smu_v13_0_fini_microcode +ffffffff822fa250 T smu_v13_0_load_microcode +ffffffff822fa280 T smu_v13_0_init_pptable_microcode +ffffffff822fa430 T smu_v13_0_get_pptable_from_firmware +ffffffff822fa560 T smu_v13_0_check_fw_status +ffffffff822fa5d0 T smu_v13_0_check_fw_version +ffffffff822fa700 T smu_v13_0_setup_pptable +ffffffff822fa8a0 T smu_v13_0_init_smc_tables +ffffffff822fa9f0 T smu_v13_0_fini_smc_tables +ffffffff822fabe0 T smu_v13_0_init_power +ffffffff822fac60 T smu_v13_0_fini_power +ffffffff822face0 T smu_v13_0_get_vbios_bootup_values +ffffffff822faf90 T smu_v13_0_notify_memory_pool_location +ffffffff822fb050 T smu_v13_0_set_min_deep_sleep_dcefclk +ffffffff822fb0d0 T smu_v13_0_set_driver_table_location +ffffffff822fb140 T smu_v13_0_set_tool_table_location +ffffffff822fb1b0 T smu_v13_0_init_display_count +ffffffff822fb1f0 T smu_v13_0_set_allowed_mask +ffffffff822fb2c0 T smu_v13_0_gfx_off_control +ffffffff822fb330 T smu_v13_0_system_features_control +ffffffff822fb350 T smu_v13_0_notify_display_change +ffffffff822fb3c0 T smu_v13_0_init_max_sustainable_clocks +ffffffff822fb630 t smu_v13_0_get_max_sustainable_clock +ffffffff822fb750 T smu_v13_0_get_current_power_limit +ffffffff822fb820 T smu_v13_0_set_power_limit +ffffffff822fb940 T smu_v13_0_enable_thermal_alert +ffffffff822fb9d0 T smu_v13_0_disable_thermal_alert +ffffffff822fba10 T smu_v13_0_get_gfx_vdd +ffffffff822fbad0 T smu_v13_0_display_clock_voltage_request +ffffffff822fbc10 T smu_v13_0_set_hard_freq_limited_range +ffffffff822fbcf0 T smu_v13_0_get_fan_control_mode +ffffffff822fbd40 T smu_v13_0_set_fan_speed_pwm +ffffffff822fbf50 t smu_v13_0_set_fan_static_mode +ffffffff822fc110 T smu_v13_0_set_fan_control_mode +ffffffff822fc270 T smu_v13_0_set_fan_speed_rpm +ffffffff822fc410 T smu_v13_0_set_xgmi_pstate +ffffffff822fc430 T smu_v13_0_register_irq_handler +ffffffff822fc500 T smu_v13_0_get_max_sustainable_clocks_by_dc +ffffffff822fc590 T smu_v13_0_set_azalia_d3_pme +ffffffff822fc5b0 T smu_v13_0_wait_for_event +ffffffff822fc610 T smu_v13_0_get_dpm_ultimate_freq +ffffffff822fc770 T smu_v13_0_set_soft_freq_limited_range +ffffffff822fc850 T smu_v13_0_set_performance_level +ffffffff822fcfe0 T smu_v13_0_set_power_source +ffffffff822fd040 T smu_v13_0_set_single_dpm_table +ffffffff822fd2d0 T smu_v13_0_get_dpm_level_range +ffffffff822fd450 T smu_v13_0_get_current_pcie_link_width_level +ffffffff822fd4a0 T smu_v13_0_get_current_pcie_link_width +ffffffff822fd500 T smu_v13_0_get_current_pcie_link_speed_level +ffffffff822fd550 T smu_v13_0_get_current_pcie_link_speed +ffffffff822fd5a0 T smu_v13_0_set_vcn_enable +ffffffff822fd650 T smu_v13_0_set_jpeg_enable +ffffffff822fd670 T smu_v13_0_run_btc +ffffffff822fd6f0 T smu_v13_0_gpo_control +ffffffff822fd780 T smu_v13_0_deep_sleep_control +ffffffff822fd9f0 T smu_v13_0_gfx_ulv_control +ffffffff822fda60 T smu_v13_0_baco_set_armd3_sequence +ffffffff822fda80 T smu_v13_0_baco_is_support +ffffffff822fdb10 T smu_v13_0_baco_get_state +ffffffff822fdb40 T smu_v13_0_baco_set_state +ffffffff822fdc00 T smu_v13_0_baco_enter +ffffffff822fdd10 T smu_v13_0_baco_exit +ffffffff822fddb0 T smu_v13_0_set_gfx_power_up_by_imu +ffffffff822fddf0 T smu_v13_0_od_edit_dpm_table +ffffffff822fe0b0 T smu_v13_0_set_default_dpm_tables +ffffffff822fe0e0 T smu_v13_0_set_smu_mailbox_registers +ffffffff822fe150 T smu_v13_0_mode1_reset +ffffffff822fe1d0 t smu_v13_0_set_irq_state +ffffffff822fe750 t smu_v13_0_irq_process +ffffffff822fea50 t orderly_poweroff +ffffffff822ff000 T smu_v13_0_0_set_ppt_funcs +ffffffff822ff0e0 t smu_v13_0_0_get_allowed_feature_mask +ffffffff822ff220 t smu_v13_0_0_set_default_dpm_table +ffffffff822ff650 t smu_v13_0_0_populate_umd_state_clk +ffffffff822ff780 t smu_v13_0_0_print_clk_levels +ffffffff822ff8a0 t smu_v13_0_0_force_clk_levels +ffffffff822ffa20 t smu_v13_0_0_get_power_profile_mode +ffffffff822ffc70 t smu_v13_0_0_set_power_profile_mode +ffffffff822ffec0 t smu_v13_0_0_read_sensor +ffffffff823000e0 t smu_v13_0_0_is_dpm_running +ffffffff82300130 t smu_v13_0_0_get_fan_speed_pwm +ffffffff82300210 t smu_v13_0_0_get_fan_speed_rpm +ffffffff82300280 t smu_v13_0_0_get_thermal_temperature_range +ffffffff82300380 t smu_v13_0_0_dump_pptable +ffffffff823003b0 t smu_v13_0_0_get_power_limit +ffffffff82300490 t smu_v13_0_0_set_df_cstate +ffffffff823004b0 t smu_v13_0_0_update_pcie_parameters +ffffffff823005a0 t smu_v13_0_0_i2c_control_init +ffffffff823006d0 t smu_v13_0_0_i2c_control_fini +ffffffff82300710 t smu_v13_0_0_get_unique_id +ffffffff823007c0 t smu_v13_0_0_init_smc_tables +ffffffff823009b0 t smu_v13_0_0_set_mp1_state +ffffffff823009f0 t smu_v13_0_0_setup_pptable +ffffffff82300b30 t smu_v13_0_0_system_features_control +ffffffff82300b40 t smu_v13_0_0_baco_enter +ffffffff82300b90 t smu_v13_0_0_baco_exit +ffffffff82300bf0 t smu_v13_0_0_is_mode1_reset_supported +ffffffff82300c50 t smu_v13_0_0_mode1_reset +ffffffff82300ce0 t smu_v13_0_0_get_dpm_ultimate_freq +ffffffff82300e00 t smu_v13_0_0_get_gpu_metrics +ffffffff82301230 t smu_v13_0_0_enable_mgpu_fan_boost +ffffffff82301280 t smu_v13_0_0_smu_send_bad_mem_page_num +ffffffff82301310 t smu_v13_0_0_send_bad_mem_channel_flag +ffffffff823013a0 t smu_v13_0_0_get_smu_metrics_data +ffffffff82301710 t smu_v13_0_get_throttler_status +ffffffff823018d0 t smu_v13_0_0_i2c_xfer +ffffffff82301b80 t smu_v13_0_0_i2c_func +ffffffff82302000 T smu_v13_0_4_set_ppt_funcs +ffffffff823020b0 t smu_v13_0_4_print_clk_levels +ffffffff82302170 t smu_v13_0_4_force_clk_levels +ffffffff82302410 t smu_v13_0_4_read_sensor +ffffffff823026c0 t smu_v13_0_4_is_dpm_running +ffffffff82302710 t smu_v13_0_4_set_watermarks_table +ffffffff823028a0 t smu_v13_0_4_set_performance_level +ffffffff82302de0 t smu_v13_0_4_init_smc_tables +ffffffff82302f50 t smu_v13_0_4_fini_smc_tables +ffffffff82303000 t smu_v13_0_4_system_features_control +ffffffff82303050 t smu_v13_0_4_mode2_reset +ffffffff82303070 t smu_v13_0_4_get_dpm_ultimate_freq +ffffffff82303490 t smu_v13_0_4_get_gpu_metrics +ffffffff82303660 t smu_v13_0_4_set_fine_grain_gfx_freq_parameters +ffffffff823036c0 t smu_v13_0_4_get_smu_metrics_data +ffffffff82304000 T smu_v13_0_5_set_ppt_funcs +ffffffff82304090 t smu_v13_0_5_set_default_dpm_tables +ffffffff823040c0 t smu_v13_0_5_print_clk_levels +ffffffff82304170 t smu_v13_0_5_force_clk_levels +ffffffff823042d0 t smu_v13_0_5_od_edit_dpm_table +ffffffff82304590 t smu_v13_0_5_dpm_set_vcn_enable +ffffffff823045b0 t smu_v13_0_5_dpm_set_jpeg_enable +ffffffff823045d0 t smu_v13_0_5_read_sensor +ffffffff823047f0 t smu_v13_0_5_is_dpm_running +ffffffff82304840 t smu_v13_0_5_set_watermarks_table +ffffffff823049d0 t smu_v13_0_5_set_performance_level +ffffffff82304bb0 t smu_v13_0_5_init_smc_tables +ffffffff82304d20 t smu_v13_0_5_fini_smc_tables +ffffffff82304dd0 t smu_v13_0_5_system_features_control +ffffffff82304e20 t smu_v13_0_5_mode2_reset +ffffffff82304ea0 t smu_v13_0_5_get_dpm_ultimate_freq +ffffffff823052e0 t smu_v13_0_5_get_gpu_metrics +ffffffff82305420 t smu_v13_0_5_set_fine_grain_gfx_freq_parameters +ffffffff82305480 t smu_v13_0_5_get_smu_metrics_data +ffffffff82306000 T smu_v13_0_7_set_ppt_funcs +ffffffff82306050 t smu_v13_0_7_get_allowed_feature_mask +ffffffff823061c0 t smu_v13_0_7_set_default_dpm_table +ffffffff823065f0 t smu_v13_0_7_populate_umd_state_clk +ffffffff82306720 t smu_v13_0_7_print_clk_levels +ffffffff82306840 t smu_v13_0_7_force_clk_levels +ffffffff823069c0 t smu_v13_0_7_get_power_profile_mode +ffffffff82306ca0 t smu_v13_0_7_set_power_profile_mode +ffffffff82306ee0 t smu_v13_0_7_read_sensor +ffffffff823070f0 t smu_v13_0_7_is_dpm_running +ffffffff82307140 t smu_v13_0_7_get_fan_speed_pwm +ffffffff82307220 t smu_v13_0_7_get_fan_speed_rpm +ffffffff82307290 t smu_v13_0_7_get_thermal_temperature_range +ffffffff82307380 t smu_v13_0_7_dump_pptable +ffffffff823073b0 t smu_v13_0_7_get_power_limit +ffffffff82307490 t smu_v13_0_7_set_df_cstate +ffffffff823074b0 t smu_v13_0_7_update_pcie_parameters +ffffffff823075a0 t smu_v13_0_7_init_smc_tables +ffffffff82307790 t smu_v13_0_7_check_fw_status +ffffffff823077e0 t smu_v13_0_7_set_mp1_state +ffffffff82307820 t smu_v13_0_7_setup_pptable +ffffffff82307980 t smu_v13_0_7_baco_enter +ffffffff823079d0 t smu_v13_0_7_baco_exit +ffffffff82307a30 t smu_v13_0_7_is_mode1_reset_supported +ffffffff82307a70 t smu_v13_0_7_get_dpm_ultimate_freq +ffffffff82307b90 t smu_v13_0_7_get_gpu_metrics +ffffffff82307fa0 t smu_v13_0_7_enable_mgpu_fan_boost +ffffffff82307ff0 t smu_v13_0_7_get_smu_metrics_data +ffffffff82308340 t smu_v13_0_7_get_throttler_status +ffffffff82309000 T yellow_carp_set_ppt_funcs +ffffffff82309040 t yellow_carp_set_default_dpm_tables +ffffffff82309070 t yellow_carp_print_clk_levels +ffffffff82309130 t yellow_carp_force_clk_levels +ffffffff823093d0 t yellow_carp_od_edit_dpm_table +ffffffff82309690 t yellow_carp_dpm_set_vcn_enable +ffffffff823096b0 t yellow_carp_dpm_set_jpeg_enable +ffffffff823096d0 t yellow_carp_read_sensor +ffffffff82309a70 t yellow_carp_is_dpm_running +ffffffff82309ac0 t yellow_carp_set_watermarks_table +ffffffff82309c50 t yellow_carp_set_performance_level +ffffffff8230a190 t yellow_carp_init_smc_tables +ffffffff8230a300 t yellow_carp_fini_smc_tables +ffffffff8230a3b0 t yellow_carp_system_features_control +ffffffff8230a400 t yellow_carp_get_gfxoff_status +ffffffff8230a490 t yellow_carp_mode2_reset +ffffffff8230a510 t yellow_carp_get_dpm_ultimate_freq +ffffffff8230a960 t yellow_carp_get_gpu_metrics +ffffffff8230ab20 t yellow_carp_post_smu_init +ffffffff8230aba0 t yellow_carp_set_fine_grain_gfx_freq_parameters +ffffffff8230ac00 t yellow_carp_get_smu_metrics_data +ffffffff8230b000 T smu_cmn_send_msg_without_waiting +ffffffff8230b170 T smu_cmn_wait_for_response +ffffffff8230b2b0 T smu_cmn_send_smc_msg_with_param +ffffffff8230b5d0 T smu_cmn_to_asic_specific_index +ffffffff8230b6e0 t __smu_cmn_reg_print_error +ffffffff8230b930 T smu_cmn_send_smc_msg +ffffffff8230b950 T smu_cmn_send_debug_smc_msg +ffffffff8230b9d0 T smu_cmn_feature_is_supported +ffffffff8230ba80 T smu_cmn_feature_is_enabled +ffffffff8230bb80 T smu_cmn_clk_dpm_is_enabled +ffffffff8230bc80 T smu_cmn_get_enabled_mask +ffffffff8230bd70 T smu_cmn_get_indep_throttler_status +ffffffff8230be20 T smu_cmn_feature_update_enable_state +ffffffff8230bec0 T smu_cmn_feature_set_enabled +ffffffff8230bf90 T smu_cmn_get_pp_feature_mask +ffffffff8230c140 T smu_cmn_set_pp_feature_mask +ffffffff8230c240 T smu_cmn_disable_all_features_with_exception +ffffffff8230c2f0 T smu_cmn_get_smc_version +ffffffff8230c3c0 T smu_cmn_update_table +ffffffff8230c520 T smu_cmn_write_watermarks_table +ffffffff8230c5f0 T smu_cmn_write_pptable +ffffffff8230c6b0 T smu_cmn_get_metrics_table +ffffffff8230c810 T smu_cmn_get_combo_pptable +ffffffff8230c8e0 T smu_cmn_init_soft_gpu_metrics +ffffffff8230c9c0 T smu_cmn_set_mp1_state +ffffffff8230ca60 T smu_cmn_is_audio_func_enabled +ffffffff8230d000 T pci_mcfg_init +ffffffff8230d050 T pci_lookup_segment +ffffffff8230d0b0 T pci_attach_hook +ffffffff8230d0e0 T pci_bus_maxdevs +ffffffff8230d110 T pci_make_tag +ffffffff8230d180 T pci_decompose_tag +ffffffff8230d1e0 T pci_conf_size +ffffffff8230d240 T pci_mcfg_map_bus +ffffffff8230d2c0 T pci_conf_read +ffffffff8230d410 T pci_conf_write +ffffffff8230d550 T pci_msix_table_map +ffffffff8230d670 T pci_msix_table_unmap +ffffffff8230d710 T msi_hwmask +ffffffff8230d740 T msi_hwunmask +ffffffff8230d770 T msi_addroute +ffffffff8230d870 T msi_delroute +ffffffff8230d8e0 T pci_intr_map_msi +ffffffff8230d960 T msix_hwmask +ffffffff8230d990 T msix_hwunmask +ffffffff8230d9c0 T msix_addroute +ffffffff8230dbc0 T msix_delroute +ffffffff8230dd20 T pci_intr_map_msix +ffffffff8230ddf0 T pci_intr_map +ffffffff8230e010 T pci_intr_string +ffffffff8230e0f0 T pci_intr_establish +ffffffff8230e140 T pci_intr_establish_cpu +ffffffff8230e2a0 T pci_intr_disestablish +ffffffff8230e2c0 T pci_init_extents +ffffffff8230e4a0 T pci_probe_device_hook +ffffffff8230e4e0 T pci_dev_postattach +ffffffff8230e4f0 T pci_min_powerstate +ffffffff8230e500 T pci_set_powerstate_md +ffffffff8230f000 T pciide_machdep_compat_intr_establish +ffffffff8230f060 T pciide_machdep_compat_intr_disestablish +ffffffff82310000 T vga_post_init +ffffffff82310310 t vm86_emu_inb +ffffffff82310360 t vm86_emu_inw +ffffffff823103a0 t vm86_emu_inl +ffffffff823103e0 t vm86_emu_outb +ffffffff82310430 t vm86_emu_outw +ffffffff82310470 t vm86_emu_outl +ffffffff823104b0 T vga_post_call +ffffffff82310520 T vga_post_free +ffffffff82310590 T ddb_vgapost +ffffffff82311000 T pchbmatch +ffffffff82311040 T pchbattach +ffffffff823114b0 T pchbactivate +ffffffff82311520 T pchb_amd64ht_attach +ffffffff82311670 T pchb_rnd +ffffffff823116f0 T pchb_print +ffffffff82312000 T amas_match +ffffffff82312050 T amas_attach +ffffffff823120b0 T amas_intl_nodes +ffffffff82312140 T amas_get_pagerange +ffffffff82313000 T agp_flush_cache +ffffffff82313030 T agp_flush_cache_range +ffffffff82313040 T agp_init_map +ffffffff82313110 T agp_destroy_map +ffffffff82313150 T agp_map_subregion +ffffffff82313180 T agp_unmap_subregion +ffffffff823131b0 T agp_map_atomic +ffffffff823131e0 T agp_unmap_atomic +ffffffff82314000 T cardslotmatch +ffffffff82314050 T cardslotattach +ffffffff823142a0 T cardslot_event +ffffffff82314300 T cardslot_cb_print +ffffffff82314350 T cardslot_16_print +ffffffff823143a0 T cardslot_16_submatch +ffffffff823143f0 T cardslot_event_throw +ffffffff82314490 T cardslot_process_event +ffffffff82315000 T cardbusmatch +ffffffff82315050 T cardbusattach +ffffffff82315130 T cardbus_read_tuples +ffffffff823154e0 T parse_tuple +ffffffff82315760 T cardbus_attach_card +ffffffff82315ee0 T enable_function +ffffffff82315f80 T decode_tuples +ffffffff82316050 T cardbusprint +ffffffff82316140 T cardbussubmatch +ffffffff823161a0 T disable_function +ffffffff82316200 T cardbus_detach_card +ffffffff823162e0 T cardbus_intr_establish +ffffffff82316310 T cardbus_intr_disestablish +ffffffff82316330 T cardbus_function_enable +ffffffff82316410 T cardbus_function_disable +ffffffff82316470 T cardbus_matchbyid +ffffffff823164e0 T decode_tuple +ffffffff82317000 T cardbus_mapreg_map +ffffffff823171b0 T cardbus_mapreg_unmap +ffffffff82318000 T cardbus_read_exrom +ffffffff82319000 T rbus_space_alloc +ffffffff82319060 T rbus_space_alloc_subregion +ffffffff82319240 T rbus_space_free +ffffffff823192d0 T rbus_new_body +ffffffff82319360 T rbus_new_root_delegate +ffffffff82319430 T rbus_new_root_share +ffffffff8231a000 T com_cardbus_match +ffffffff8231a070 T com_cardbus_attach +ffffffff8231a220 T com_cardbus_detach +ffffffff8231a2c0 T com_cardbus_find_csdev +ffffffff8231a440 T com_cardbus_gofigure +ffffffff8231a900 T com_cardbus_enable +ffffffff8231a9d0 T com_cardbus_disable +ffffffff8231aa20 T com_cardbus_setup +ffffffff8231b000 T xl_cardbus_match +ffffffff8231b090 T xl_cardbus_attach +ffffffff8231b420 T xl_cardbus_detach +ffffffff8231b4e0 T xl_cardbus_lookup +ffffffff8231b5a0 T xl_cardbus_intr_ack +ffffffff8231c000 T dc_cardbus_match +ffffffff8231c030 T dc_cardbus_attach +ffffffff8231c3c0 T dc_cardbus_detach +ffffffff8231c460 T dc_cardbus_setup +ffffffff8231d000 T fxp_cardbus_match +ffffffff8231d030 T fxp_cardbus_attach +ffffffff8231d240 T fxp_cardbus_detach +ffffffff8231d2d0 T fxp_cardbus_setup +ffffffff8231e000 t rl_cardbus_match +ffffffff8231e030 t rl_cardbus_attach +ffffffff8231e1d0 t rl_cardbus_detach +ffffffff8231e290 T rl_cardbus_setup +ffffffff8231f000 T re_cardbus_probe +ffffffff8231f030 T re_cardbus_attach +ffffffff8231f230 T re_cardbus_detach +ffffffff8231f310 T re_cardbus_setup +ffffffff82320000 T ath_cardbus_match +ffffffff82320050 T ath_cardbus_attach +ffffffff82320180 T ath_cardbus_detach +ffffffff82320250 T ath_cardbus_enable +ffffffff82320320 T ath_cardbus_disable +ffffffff82320370 T ath_cardbus_power +ffffffff823203b0 T ath_cardbus_setup +ffffffff82321000 T athn_cardbus_match +ffffffff82321030 T athn_cardbus_attach +ffffffff82321170 T athn_cardbus_detach +ffffffff82321210 T athn_cardbus_enable +ffffffff823212e0 T athn_cardbus_disable +ffffffff82321330 T athn_cardbus_power +ffffffff82321370 T athn_cardbus_read +ffffffff823213a0 T athn_cardbus_write +ffffffff823213d0 T athn_cardbus_write_barrier +ffffffff82321400 T athn_cardbus_setup +ffffffff82322000 T atw_cardbus_match +ffffffff82322030 T atw_cardbus_attach +ffffffff82322220 T atw_cardbus_detach +ffffffff823222e0 T atw_cardbus_enable +ffffffff823223b0 T atw_cardbus_disable +ffffffff82322400 T atw_cardbus_power +ffffffff82322440 T atw_cardbus_setup +ffffffff82323000 T rtw_cardbus_match +ffffffff82323030 T rtw_cardbus_attach +ffffffff82323280 T rtw_cardbus_detach +ffffffff823233a0 T rtw_cardbus_intr_ack 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pgt_cardbus_power +ffffffff823264f0 T pgt_cardbus_setup +ffffffff82327000 T ehci_cardbus_match +ffffffff82327040 T ehci_cardbus_attach +ffffffff823272e0 T ehci_cardbus_detach +ffffffff82328000 T ohci_cardbus_match +ffffffff82328040 T ohci_cardbus_attach +ffffffff823282d0 T ohci_cardbus_detach +ffffffff82329000 T uhci_cardbus_match +ffffffff82329040 T uhci_cardbus_attach +ffffffff82329350 T uhci_cardbus_detach +ffffffff8232a000 T malo_cardbus_match +ffffffff8232a030 T malo_cardbus_attach +ffffffff8232a270 T malo_cardbus_detach +ffffffff8232a340 T malo_cardbus_enable +ffffffff8232a4b0 T malo_cardbus_disable +ffffffff8232a500 T malo_cardbus_setup +ffffffff8232b000 T bwi_cardbus_match +ffffffff8232b030 T bwi_cardbus_attach +ffffffff8232b2a0 T bwi_cardbus_detach +ffffffff8232b350 T bwi_cardbus_enable +ffffffff8232b4b0 T bwi_cardbus_disable +ffffffff8232b500 T bwi_cardbus_setup +ffffffff8232b5a0 T bwi_cardbus_conf_read +ffffffff8232b5d0 T bwi_cardbus_conf_write +ffffffff8232c000 T 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hid_is_collection +ffffffff82397000 T hidkbd_attach +ffffffff823970f0 T hidkbd_parse_desc +ffffffff82397460 T hidkbd_delayed_decode +ffffffff82397480 T hidkbd_attach_wskbd +ffffffff82397510 T hidkbd_detach +ffffffff823975b0 T hidkbd_translate +ffffffff82397600 T hidkbd_apple_translate +ffffffff82397690 T hidkbd_apple_munge +ffffffff823977f0 T hidkbd_apple_tb_munge +ffffffff823979d0 T hidkbd_apple_iso_munge +ffffffff82397c10 T hidkbd_apple_mba_munge +ffffffff82397d70 T hidkbd_apple_iso_mba_munge +ffffffff82397fb0 T hidkbd_input +ffffffff823980b0 T hidkbd_decode +ffffffff82398420 T hidkbd_enable +ffffffff82398460 T hidkbd_set_leds +ffffffff82398540 T hidkbd_ioctl +ffffffff823985e0 T hidkbd_bell +ffffffff82398630 T hidkbd_cngetc +ffffffff823986c0 T hidkbd_hookup_bell +ffffffff82399000 T hidms_setup +ffffffff823995c0 T hidms_attach +ffffffff82399710 T hidms_detach +ffffffff82399750 T hidms_input +ffffffff82399a00 T hidms_enable +ffffffff82399a40 T hidms_ioctl +ffffffff82399c10 T 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usbd_interface2endpoint_descriptor +ffffffff823a02c0 T usbd_clear_endpoint_stall +ffffffff823a0350 T usbd_clear_endpoint_toggle +ffffffff823a0390 T usbd_do_request +ffffffff823a03b0 T usbd_clear_endpoint_stall_async +ffffffff823a0470 T usbd_request_async +ffffffff823a0580 T usbd_device2interface_handle +ffffffff823a0610 T usbd_set_interface +ffffffff823a06f0 T usbd_get_no_alts +ffffffff823a0760 T usbd_get_interface_altindex +ffffffff823a0790 T usbd_start_next +ffffffff823a0860 T usb_insert_transfer +ffffffff823a0910 T usbd_do_request_flags +ffffffff823a0b90 T usbd_request_async_cb +ffffffff823a0c10 T usbd_get_quirks +ffffffff823a0c60 T usbd_set_polling +ffffffff823a0cc0 T usbd_get_endpoint_descriptor +ffffffff823a0d20 T usbd_ratecheck +ffffffff823a0d40 T usbd_match_device +ffffffff823a0db0 T usbd_desc_iter_init +ffffffff823a0e20 T usbd_desc_iter_next +ffffffff823a0ea0 T usbd_str +ffffffff823a1000 T usbd_get_desc +ffffffff823a1070 T usbd_get_device_status +ffffffff823a10c0 T usbd_get_hub_descriptor +ffffffff823a1130 T usbd_get_hub_ss_descriptor +ffffffff823a11a0 T usbd_get_port_status +ffffffff823a11f0 T usbd_set_hub_depth +ffffffff823a1240 T usbd_clear_port_feature +ffffffff823a1290 T usbd_clear_endpoint_feature +ffffffff823a12e0 T usbd_set_port_feature +ffffffff823a1330 T usbd_set_idle +ffffffff823a1390 T usbd_get_report_descriptor +ffffffff823a13e0 T usbd_get_hid_descriptor +ffffffff823a1460 T usbd_get_config +ffffffff823a14b0 T usb_detach_wait +ffffffff823a1530 T usb_detach_wakeup +ffffffff823a2000 T usb_block_allocmem +ffffffff823a2260 T usb_block_freemem +ffffffff823a22c0 T usb_allocmem +ffffffff823a2500 T usb_freemem +ffffffff823a25c0 T usb_syncmem +ffffffff823a3000 T usbd_errstr +ffffffff823a3070 T usbd_get_string_desc +ffffffff823a3130 T usbd_get_string +ffffffff823a3320 T usbd_cache_devinfo +ffffffff823a3680 T usbd_printBCD +ffffffff823a3710 T usbd_devinfo +ffffffff823a38b0 T usb_delay_ms +ffffffff823a3910 T usbd_delay_ms +ffffffff823a39d0 T usbd_port_disown_to_1_1 +ffffffff823a3af0 T usbd_reset_port +ffffffff823a3cb0 T usbd_find_idesc +ffffffff823a3d60 T usbd_find_edesc +ffffffff823a3e70 T usbd_fill_iface_data +ffffffff823a40e0 T usbd_parse_idesc +ffffffff823a4200 T usbd_free_iface_data +ffffffff823a4270 T usbd_set_config +ffffffff823a42c0 T usbd_set_config_no +ffffffff823a4390 T usbd_set_config_index +ffffffff823a4850 T usbd_setup_pipe +ffffffff823a4940 T usbd_set_address +ffffffff823a4a00 T usbd_getnewaddr +ffffffff823a4a90 T usbd_probe_and_attach +ffffffff823a5010 T usbd_print +ffffffff823a5120 T usbd_new_device +ffffffff823a59a0 T usbd_reload_device_desc +ffffffff823a5a10 T usb_free_device +ffffffff823a5b80 T usbd_fill_deviceinfo +ffffffff823a5ee0 T usbd_get_cdesc +ffffffff823a6000 T usbd_detach +ffffffff823a7000 T usbd_find_quirk +ffffffff823a8000 T uhub_match +ffffffff823a8060 T uhub_attach +ffffffff823a8520 T uhub_detach +ffffffff823a8650 T uhub_explore +ffffffff823a88f0 T uhub_intr +ffffffff823a8a40 T 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umb_decode_subscriber_status +ffffffff82488040 T umb_decode_radio_state +ffffffff82488120 T umb_decode_pin +ffffffff82488260 T umb_decode_packet_service +ffffffff82488650 T umb_decode_signal_state +ffffffff82488720 T umb_decode_connect_info +ffffffff82488880 T umb_add_inet_config +ffffffff82488b50 T umb_add_inet6_config +ffffffff82488ec0 T umb_decode_ip_configuration +ffffffff82489700 T umb_rxeof +ffffffff82489830 T umb_decap +ffffffff82489ad0 T umb_txeof +ffffffff82489b70 T umb_send_encap_command +ffffffff82489c60 T umb_ctrl_msg +ffffffff82489f30 T umb_cmd1 +ffffffff8248a030 T umb_send_connect +ffffffff8248a210 T umb_decode_qmi +ffffffff8248b000 T uath_match +ffffffff8248b070 T uath_attach +ffffffff8248b810 T uath_detach +ffffffff8248ba20 T uath_attachhook +ffffffff8248bb00 T uath_loadfirmware +ffffffff8248be10 T uath_open_pipes +ffffffff8248bfb0 T uath_task +ffffffff8248c430 T uath_next_scan +ffffffff8248c470 T uath_stat +ffffffff8248c4e0 T uath_alloc_tx_cmd_list +ffffffff8248c5a0 T uath_alloc_rx_cmd_list +ffffffff8248c660 T uath_cmd_rxeof +ffffffff8248c790 T uath_reset +ffffffff8248c900 T uath_query_eeprom +ffffffff8248ca60 T uath_alloc_tx_data_list +ffffffff8248cb20 T uath_alloc_rx_data_list +ffffffff8248cc50 T uath_ioctl +ffffffff8248cd30 T uath_start +ffffffff8248cee0 T uath_watchdog +ffffffff8248cf70 T uath_newstate +ffffffff8248d010 T uath_media_change +ffffffff8248d070 T uath_close_pipes +ffffffff8248d120 T uath_free_tx_data_list +ffffffff8248d240 T uath_free_rx_cmd_list +ffffffff8248d290 T uath_free_tx_cmd_list +ffffffff8248d3b0 T uath_free_rx_data_list +ffffffff8248d420 T uath_init +ffffffff8248db80 T uath_cmd_write +ffffffff8248dba0 T uath_set_led +ffffffff8248dc00 T uath_switch_channel +ffffffff8248dd30 T uath_set_rates +ffffffff8248ddd0 T uath_cmd +ffffffff8248dff0 T uath_cmd_read +ffffffff8248e010 T uath_write_reg +ffffffff8248e0b0 T uath_write_multi +ffffffff8248e170 T uath_read_reg +ffffffff8248e210 T uath_read_eeprom +ffffffff8248e2d0 T uath_data_rxeof +ffffffff8248e600 T uath_tx_null +ffffffff8248e740 T uath_data_txeof +ffffffff8248e840 T uath_tx_data +ffffffff8248eb10 T uath_stop +ffffffff8248ec40 T uath_reset_tx_queues +ffffffff8248ed10 T uath_wme_init +ffffffff8248ee00 T uath_set_chan +ffffffff8248ee80 T uath_set_key +ffffffff8248f020 T uath_set_keys +ffffffff8248f2b0 T uath_set_rxfilter +ffffffff82490000 T athn_usb_match +ffffffff82490070 T athn_usb_attach +ffffffff824901b0 T athn_usb_detach +ffffffff82490260 T athn_usb_read +ffffffff82490300 T athn_usb_write +ffffffff82490390 T athn_usb_write_barrier +ffffffff824903f0 T athn_usb_task +ffffffff824904b0 T athn_usb_open_pipes +ffffffff82490660 T athn_usb_alloc_tx_cmd +ffffffff82490700 T athn_usb_attachhook +ffffffff824908c0 T athn_usb_wait_async +ffffffff824908f0 T athn_usb_close_pipes +ffffffff824909c0 T athn_usb_free_tx_cmd +ffffffff82490a10 T athn_usb_free_tx_list +ffffffff82490b40 T athn_usb_free_rx_list +ffffffff82490b90 T athn_usb_load_firmware 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bwfm_usb_free_rx_list +ffffffff8249b370 T bwfm_usb_free_tx_list +ffffffff8249b3f0 T bwfm_usb_newbuf +ffffffff8249b470 T bwfm_usb_txeof +ffffffff8249b580 T bwfm_usb_txctl_cb +ffffffff8249c000 T umstc_match +ffffffff8249c0b0 T umstc_attach +ffffffff8249c1b0 T umstc_detach +ffffffff8249c200 T umstc_intr +ffffffff8249c340 T umstc_brightness_task +ffffffff8249d000 T uhidpp_match +ffffffff8249d0e0 T uhidpp_attach +ffffffff8249d450 T uhidpp_detach +ffffffff8249d690 T uhidpp_intr +ffffffff8249d7d0 T uhidpp_task +ffffffff8249d870 T hidpp10_get_type +ffffffff8249d970 T hidpp10_get_name +ffffffff8249da70 T hidpp10_enable_notifications +ffffffff8249dae0 T uhidpp_is_notification +ffffffff8249db60 T uhidpp_claim_notification +ffffffff8249dc80 T uhidpp_refresh +ffffffff8249dd50 T uhidpp_device_refresh +ffffffff8249de00 T uhidpp_consume_notification +ffffffff8249df50 T uhidpp_device_connect +ffffffff8249e3b0 T uhidpp_sleep +ffffffff8249e3e0 T hidpp_get_protocol_version +ffffffff8249e4a0 T uhidpp_device_features +ffffffff8249e670 T hidpp20_battery_get_capability +ffffffff8249e730 T hidpp20_unified_battery_get_capabilities +ffffffff8249e820 T hidpp20_battery_get_level_status +ffffffff8249e960 T hidpp20_unified_battery_get_status +ffffffff8249ea80 T hidpp20_root_get_feature +ffffffff8249eb30 T hidpp20_feature_get_count +ffffffff8249ebd0 T hidpp20_feature_get_id +ffffffff8249ec80 T hidpp_send_fap_report +ffffffff8249ed60 T hidpp_send_rap_report +ffffffff8249ee20 T hidpp20_battery_status_is_charging +ffffffff8249ee60 T hidpp20_unified_battery_status_is_charging +ffffffff8249eea0 T hidpp_send_validate +ffffffff8249eef0 T hidpp_send_report +ffffffff824a0000 T ucc_match +ffffffff824a00a0 T ucc_attach +ffffffff824a01b0 T ucc_detach +ffffffff824a0210 T ucc_intr +ffffffff824a0250 T ucc_enable +ffffffff824a1000 T iic_match +ffffffff824a1050 T iic_attach +ffffffff824a10c0 T iicbus_print +ffffffff824a1110 T iic_print +ffffffff824a1180 T iic_search +ffffffff824a1250 T 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andl_attach +ffffffff824c22e0 T andl_refresh +ffffffff824c2360 T andl_refresh_temps +ffffffff824c24a0 T andl_refresh_volts +ffffffff824c2670 T andl_refresh_tachs +ffffffff824c2790 T andl_readreg +ffffffff824c2800 T andl_writereg +ffffffff824c3000 T spdmem_iic_match +ffffffff824c30a0 T spdmem_iic_attach +ffffffff824c30f0 T spdmem_iic_read +ffffffff824c4000 T sdtemp_match +ffffffff824c4290 T sdtemp_attach +ffffffff824c4340 T sdtemp_refresh +ffffffff824c5000 T lisa_match +ffffffff824c5050 T lisa_attach +ffffffff824c5180 T lisa_refresh +ffffffff824c52a0 T lisa_readreg +ffffffff824c5310 T lisa_writereg +ffffffff824c6000 T ihidev_match +ffffffff824c6050 T ihidev_attach +ffffffff824c6540 T ihidev_detach +ffffffff824c65e0 T ihidev_activate +ffffffff824c6720 T ihidev_hid_command +ffffffff824c6b00 T ihidev_hid_desc_parse +ffffffff824c6d10 T ihidev_intr +ffffffff824c7020 T ihidev_maxrepid +ffffffff824c70d0 T ihidev_submatch +ffffffff824c7120 T ihidev_print +ffffffff824c7180 T ihidev_reset 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thinkpad_match +ffffffff825040b0 T thinkpad_attach +ffffffff825042d0 T thinkpad_activate +ffffffff82504450 T thinkpad_sensor_attach +ffffffff825045c0 T thinkpad_get_temp +ffffffff82504650 T thinkpad_sensor_refresh +ffffffff825047d0 T thinkpad_get_volume_mute +ffffffff82504840 T thinkpad_attach_deferred +ffffffff82504860 T thinkpad_enable_events +ffffffff82504a30 T thinkpad_get_kbd_backlight +ffffffff82504ac0 T thinkpad_set_kbd_backlight +ffffffff82504ba0 T thinkpad_get_param +ffffffff82504c00 T thinkpad_set_param +ffffffff82504cc0 T thinkpad_hotkey +ffffffff825052f0 T thinkpad_brightness_up +ffffffff82505490 T thinkpad_brightness_down +ffffffff82505640 T thinkpad_toggle_bluetooth +ffffffff82505760 T thinkpad_volume_mute +ffffffff82505810 T thinkpad_volume_down +ffffffff825058c0 T thinkpad_volume_up +ffffffff82505970 T thinkpad_get_thinklight +ffffffff825059c0 T thinkpad_adaptive_change +ffffffff82505ae0 T thinkpad_get_brightness +ffffffff82505b20 T thinkpad_toggle_wan +ffffffff82505c40 T thinkpad_cmos +ffffffff82505cf0 T thinkpad_set_brightness +ffffffff82505de0 T thinkpad_set_thinklight +ffffffff82506000 T toshiba_match +ffffffff825060a0 T toshiba_attach +ffffffff82506180 T get_param_brightness +ffffffff825061e0 T acpitoshiba_get_param +ffffffff82506240 T set_param_brightness +ffffffff825062d0 T toshiba_update_brightness +ffffffff825063d0 T acpitoshiba_set_param +ffffffff82506470 T toshiba_set_brightness +ffffffff82506590 T toshiba_enable_events +ffffffff82506620 T toshiba_read_events +ffffffff82506780 T toshiba_hotkey +ffffffff825069b0 T toshiba_get_brightness +ffffffff82506b20 T toshiba_fn_key_brightness_up +ffffffff82506c70 T toshiba_fn_key_brightness_down +ffffffff82506dc0 T toshiba_fn_key_video_output +ffffffff82506f10 T toshiba_get_video_output +ffffffff82507080 T toshiba_set_video_output +ffffffff82508000 T acpisony_match +ffffffff82508070 T acpisony_attach +ffffffff825080e0 T acpisony_activate +ffffffff82508120 T acpisony_notify_setup +ffffffff82508310 T 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acpipwrres_foundcons +ffffffff8250b440 T acpipwrres_ref_incr +ffffffff8250b4d0 T acpipwrres_hascons +ffffffff8250b520 T acpipwrres_ref_decr +ffffffff8250b5b0 T acpipwrres_addcons +ffffffff8250c000 T aibs_match +ffffffff8250c030 T aibs_attach +ffffffff8250c140 T aibs_probe +ffffffff8250c2a0 T aibs_attach_new +ffffffff8250c3c0 T aibs_attach_sif +ffffffff8250c590 T aibs_notify +ffffffff8250c600 T aibs_add_sensor +ffffffff8250c850 T aibs_getpack +ffffffff8250c8d0 T aibs_refresh +ffffffff8250c930 T aibs_refresh_r +ffffffff8250ca70 T aibs_getvalue +ffffffff8250cbc0 T aibs_find_cb +ffffffff8250d000 T aplgpio_match +ffffffff8250d060 T aplgpio_attach +ffffffff8250d300 T aplgpio_intr +ffffffff8250d440 T aplgpio_read_pin +ffffffff8250d490 T aplgpio_write_pin +ffffffff8250d500 T aplgpio_intr_establish +ffffffff8250d620 T aplgpio_intr_enable +ffffffff8250d6b0 T aplgpio_intr_disable +ffffffff8250e000 T bytgpio_match +ffffffff8250e060 T bytgpio_attach +ffffffff8250e320 T bytgpio_intr +ffffffff8250e450 T bytgpio_read_pin +ffffffff8250e4b0 T bytgpio_write_pin +ffffffff8250e530 T bytgpio_intr_establish +ffffffff8250e5a0 T bytgpio_intr_enable +ffffffff8250e690 T bytgpio_intr_disable +ffffffff8250f000 T chvgpio_match +ffffffff8250f060 T chvgpio_attach +ffffffff8250f300 T chvgpio_intr +ffffffff8250f3d0 T chvgpio_read_pin +ffffffff8250f480 T chvgpio_write_pin +ffffffff8250f540 T chvgpio_intr_establish +ffffffff8250f710 T chvgpio_intr_enable +ffffffff8250f7e0 T chvgpio_intr_disable +ffffffff8250f8b0 T chvgpio_opreg_handler +ffffffff8250f940 T chvgpio_check_pin +ffffffff82510000 T glkgpio_match +ffffffff82510060 T glkgpio_attach +ffffffff82510300 T glkgpio_intr +ffffffff82510440 T glkgpio_read_pin +ffffffff825104a0 T glkgpio_write_pin +ffffffff82510510 T glkgpio_intr_establish +ffffffff82510630 T glkgpio_intr_enable +ffffffff825106c0 T glkgpio_intr_disable +ffffffff82511000 T pchgpio_match +ffffffff82511060 T pchgpio_attach +ffffffff825114b0 T pchgpio_activate +ffffffff82511560 T pchgpio_intr +ffffffff82511780 T pchgpio_read_pin +ffffffff82511870 T pchgpio_write_pin +ffffffff82511980 T pchgpio_intr_establish +ffffffff82511bb0 T pchgpio_intr_enable +ffffffff82511cf0 T pchgpio_intr_disable +ffffffff82511e30 T pchgpio_save +ffffffff82511ea0 T pchgpio_restore +ffffffff82511f10 T pchgpio_find_group +ffffffff82511f90 T pchgpio_intr_handle +ffffffff82512070 T pchgpio_save_pin +ffffffff82512240 T pchgpio_restore_pin +ffffffff82513000 T tipmic_match +ffffffff82513050 T tipmic_attach +ffffffff82513250 T tipmic_write_1 +ffffffff82513310 T tipmic_intr +ffffffff82513470 T tipmic_get_lpat +ffffffff825135a0 T tipmic_read_pin +ffffffff825135d0 T tipmic_write_pin +ffffffff82513600 T tipmic_thermal_opreg_handler +ffffffff82513e70 T tipmic_power_opreg_handler +ffffffff82514110 T tipmic_read_1 +ffffffff825141d0 T tipmic_raw_to_temp +ffffffff82515000 T ccpmic_match +ffffffff82515050 T ccpmic_attach +ffffffff82515130 T ccpmic_get_lpat +ffffffff82515250 T ccpmic_read_pin +ffffffff825153d0 T ccpmic_write_pin +ffffffff82515530 T ccpmic_thermal_opreg_handler +ffffffff82515770 T ccpmic_power_opreg_handler +ffffffff82515960 T ccpmic_read_1 +ffffffff82515a20 T ccpmic_write_1 +ffffffff82515ae0 T ccpmic_raw_to_temp +ffffffff82516000 T com_acpi_match +ffffffff82516120 T com_acpi_attach +ffffffff825163a0 T com_acpi_is_designware +ffffffff82516400 T com_acpi_intr_designware +ffffffff82516430 T com_acpi_is_console +ffffffff82517000 T sdhc_acpi_match +ffffffff82517060 T sdhc_acpi_attach +ffffffff82517360 T sdhc_acpi_parse_resources +ffffffff82517420 T sdhc_acpi_card_detect_gpio +ffffffff82517480 T sdhc_acpi_card_detect_intr +ffffffff825174c0 T sdhc_acpi_power_on +ffffffff82517540 T sdhc_acpi_explore +ffffffff82517570 T sdhc_acpi_card_detect_nonremovable +ffffffff825175a0 T sdhc_acpi_do_explore +ffffffff82518000 T dwiic_acpi_match +ffffffff82518050 T dwiic_acpi_attach +ffffffff82518410 T dwiic_acpi_parse_crs +ffffffff82518540 T dwiic_acpi_power +ffffffff82518650 T dwiic_acpi_get_params +ffffffff82518790 T dwiic_i2c_intr_establish +ffffffff82518810 T dwiic_i2c_intr_disestablish +ffffffff82518830 T dwiic_i2c_intr_string +ffffffff825188c0 T dwiic_acpi_acquire_bus +ffffffff82518910 T dwiic_acpi_release_bus +ffffffff82518940 T dwiic_acpi_bus_scan +ffffffff82518980 T dwiic_acpi_found_hid +ffffffff82518cb0 T dwiic_matchhids +ffffffff82518d40 T dwiic_acpi_found_ihidev +ffffffff82518fc0 T dwiic_acpi_found_iatp +ffffffff8251a000 T acpicbkbd_match +ffffffff8251a030 T acpicbkbd_attach +ffffffff8251a0d0 T acpicbkbd_activate +ffffffff8251a120 T acpicbkbd_get_backlight +ffffffff8251a1a0 T acpicbkbd_set_backlight +ffffffff8251a240 T acpicbkbd_write_backlight +ffffffff8251b000 T acpials_match +ffffffff8251b090 T acpials_attach +ffffffff8251b230 T acpials_read +ffffffff8251b2b0 T acpials_addtask +ffffffff8251b2f0 T acpials_notify +ffffffff8251b380 T acpials_update +ffffffff8251c000 T tpm_match +ffffffff8251c050 T tpm_attach +ffffffff8251c320 T tpm_activate +ffffffff8251c430 T tpm2_start_method +ffffffff8251c4b0 T tpm_probe +ffffffff8251c560 T tpm_init_tis +ffffffff8251c7d0 T tpm_init_crb +ffffffff8251cb10 T tpm_suspend +ffffffff8251cc00 T tpm_resume +ffffffff8251cc30 T tpm_write_tis +ffffffff8251cfb0 T tpm_read_tis +ffffffff8251d190 T tpm_write_crb +ffffffff8251d5a0 T tpm_read_crb +ffffffff8251d8a0 T tpm_request_locality_tis +ffffffff8251d990 T tpm_request_locality_crb +ffffffff8251da90 T tpm_release_locality_crb +ffffffff8251dae0 T tpm_release_locality_tis +ffffffff8251db50 T tpm_getburst +ffffffff8251dc00 T tpm_status +ffffffff8251dc20 T tpm_waitfor +ffffffff8251dd00 T tpm_waitfor_status +ffffffff8251e000 T acpihve_match +ffffffff8251e0b0 T acpihve_attach +ffffffff8251f000 T acpisbs_match +ffffffff8251f030 T acpisbs_attach +ffffffff8251f2a0 T acpisbs_activate +ffffffff8251f380 T acpisbs_read +ffffffff8251f440 T acpisbs_setup_sensors +ffffffff8251f560 T acpisbs_refresh_sensors +ffffffff8251f6d0 T acpisbs_notify +ffffffff8251f810 T acpi_smbus_read +ffffffff82520000 T surface_match +ffffffff82520060 T surface_attach +ffffffff825200c0 T surface_hotkey +ffffffff82521000 T ipmi_acpi_match +ffffffff82521030 T ipmi_acpi_attach +ffffffff82521260 T ipmi_acpi_parse_crs +ffffffff82522000 T amdgpio_match +ffffffff82522060 T amdgpio_attach +ffffffff825222a0 T amdgpio_activate +ffffffff82522390 T amdgpio_intr +ffffffff82522530 T amdgpio_read_pin +ffffffff82522580 T amdgpio_write_pin +ffffffff825225f0 T amdgpio_intr_establish +ffffffff825226e0 T amdgpio_intr_enable +ffffffff82522760 T amdgpio_intr_disable +ffffffff825227e0 T amdgpio_save +ffffffff82522860 T amdgpio_restore +ffffffff825228f0 T amdgpio_save_pin +ffffffff82522960 T amdgpio_restore_pin +ffffffff825229d0 T amdgpio_pin_intr +ffffffff82523000 T acpihid_match +ffffffff82523030 T acpihid_attach +ffffffff82523210 T acpihid_init_dsm +ffffffff82523370 T acpihid_eval +ffffffff82523590 T acpihid_notify +ffffffff825235f0 T acpihid_button_array_enable +ffffffff82524000 t iosf_acpi_match +ffffffff82524050 t iosf_acpi_attach +ffffffff82524140 t iosf_acpi_mbi_mdr_rd +ffffffff825241b0 t iosf_acpi_mbi_mdr_wr +ffffffff82525000 T acpi_match +ffffffff82525060 T acpi_attach +ffffffff825250a0 T acpi_probe +ffffffff82525240 T acpi_map +ffffffff82525330 T acpi_unmap +ffffffff82525380 T acpi_bus_space_map +ffffffff825253a0 T acpi_bus_space_unmap +ffffffff825253c0 T acpi_intr_establish +ffffffff82525510 T acpi_intr_disestablish +ffffffff82525520 T acpi_scan +ffffffff825256d0 T acpi_acquire_glk +ffffffff82525730 T acpi_release_glk +ffffffff82525780 T acpi_attach_machdep +ffffffff82525910 T acpi_sleep_cpu +ffffffff82525ad0 T acpi_resume_cpu +ffffffff82525bd0 T sleep_mp +ffffffff82525cd0 T resume_mp +ffffffff82525dc0 T acpi_iommu_device_map +ffffffff82526000 T hibernate_resume_machdep +ffffffff82526050 T hibernate_drop_to_real_mode +ffffffff82526060 T hibernate_activate_resume_pt_machdep +ffffffff825260a0 T hibernate_switch_stack_machdep +ffffffff825260e0 T hibernate_flush +ffffffff82526110 T acpi_savecpu +ffffffff82527000 T sleep_showstate +ffffffff82527100 T sleep_setstate +ffffffff82527160 T gosleep +ffffffff82527220 T sleep_abort +ffffffff82527250 T sleep_resume +ffffffff825272c0 T suspend_finish +ffffffff82528000 T acpipci_match +ffffffff82528030 T acpipci_attach +ffffffff825282f0 T acpipci_osc +ffffffff82528430 T acpipci_parse_resources +ffffffff82528540 T acpipci_attach_bus +ffffffff82528710 T acpipci_print +ffffffff82528780 T acpipci_attach_busses +ffffffff82529000 T efiopen +ffffffff82529040 T eficlose +ffffffff82529070 T efiioctl +ffffffff82529110 T efiioc_get_table +ffffffff82529270 T efiioc_var_get +ffffffff825294f0 T efiioc_var_next +ffffffff82529710 T efiioc_var_set +ffffffff825299c0 T efi_adapt_error +ffffffff8252a000 T efi_match +ffffffff8252a060 T efi_attach +ffffffff8252a2f0 T efi_map_runtime +ffffffff8252a470 T efi_enter +ffffffff8252a500 T efi_leave +ffffffff8252a560 T efi_fault +ffffffff8252b000 T vmm_probe +ffffffff8252b050 T vmm_attach +ffffffff8252b170 T vmm_activate +ffffffff8252b2b0 T vmmopen +ffffffff8252b300 T vmmclose +ffffffff8252b330 T vm_find +ffffffff8252b450 T vmmioctl +ffffffff8252b6b0 T vm_create +ffffffff8252ba60 T vm_get_info +ffffffff8252bcb0 T vm_terminate +ffffffff8252be20 T vm_resetcpu +ffffffff8252bf40 T pledge_ioctl_vmm +ffffffff8252c010 T vm_find_vcpu +ffffffff8252c070 T vm_create_check_mem_ranges +ffffffff8252c1d0 T vm_teardown +ffffffff8252c300 T vcpu_must_stop +ffffffff8252d000 T vmm_enabled +ffffffff8252d090 T vmm_attach_machdep +ffffffff8252d250 T vmm_quiesce_vmx +ffffffff8252d420 T vmm_activate_machdep +ffffffff8252d550 T vmm_stop +ffffffff8252d6a0 T vmm_start +ffffffff8252d790 T vmmioctl_machdep +ffffffff8252d860 T vm_intr_pending +ffffffff8252d900 T vm_mprotect_ept +ffffffff8252dba0 T pledge_ioctl_vmm_machdep +ffffffff8252dbf0 T vm_rwvmparams +ffffffff8252dd80 T vmm_init_pvclock +ffffffff8252de60 T vm_rwregs +ffffffff8252df70 T vcpu_readregs_vmx +ffffffff8252e3a0 T vcpu_writeregs_vmx +ffffffff8252e810 T vcpu_readregs_svm +ffffffff8252ecc0 T vcpu_writeregs_svm +ffffffff8252f190 T vmm_get_guest_memtype +ffffffff8252f210 T vmx_mprotect_ept +ffffffff8252f490 T vmx_pmap_find_pte_ept +ffffffff8252f560 T start_vmm_on_cpu +ffffffff8252f640 T stop_vmm_on_cpu +ffffffff8252f6e0 T vmclear_on_cpu +ffffffff8252f760 T vm_impl_init_vmx +ffffffff8252f880 T vm_impl_init_svm +ffffffff8252f9a0 T vm_impl_init +ffffffff8252fa40 T vm_impl_deinit +ffffffff8252fa70 T vcpu_reload_vmcs_vmx +ffffffff8252fbb0 T vcpu_reset_regs_svm +ffffffff8252ff40 T svm_setmsrbrw +ffffffff825300b0 T svm_setmsrbr +ffffffff82530180 T vmm_alloc_vpid +ffffffff82530290 T svm_setmsrbw +ffffffff82530370 T vmx_setmsrbr +ffffffff82530420 T vmx_setmsrbw +ffffffff825304d0 T vmx_setmsrbrw +ffffffff825305e0 T svm_set_clean +ffffffff82530630 T svm_set_dirty +ffffffff82530680 T vcpu_reset_regs_vmx +ffffffff82531230 T vcpu_vmx_check_cap +ffffffff82531330 T vcpu_vmx_compute_ctrl +ffffffff82531510 T vcpu_init_vmx +ffffffff825318b0 T vcpu_deinit_vmx +ffffffff82531a30 T vcpu_reset_regs +ffffffff82531a70 T vcpu_init_svm +ffffffff82531c00 T vcpu_deinit_svm +ffffffff82531d40 T vcpu_init +ffffffff82531e00 T vmm_free_vpid +ffffffff82531e70 T vcpu_deinit +ffffffff82531eb0 T vm_run +ffffffff82532060 T vcpu_run_vmx +ffffffff825327e0 T vcpu_run_svm +ffffffff82532d90 T vmm_fpurestore +ffffffff82532e60 T vmm_fpusave +ffffffff82532ee0 T vmm_translate_gva +ffffffff82533200 T vmm_update_pvclock +ffffffff82533300 T vmx_get_exit_info +ffffffff82533360 T vmx_handle_exit +ffffffff825337a0 T vmx_instruction_error_decode +ffffffff82533970 T vmm_get_guest_cpu_cpl +ffffffff82533a60 T vmx_handle_intr +ffffffff82533af0 T svm_handle_hlt +ffffffff82533b40 T vmx_handle_hlt +ffffffff82533bf0 T svm_handle_exit +ffffffff82533f10 T svm_handle_np_fault +ffffffff825340c0 T vmm_handle_cpuid +ffffffff82534750 T svm_handle_msr +ffffffff82534a10 T svm_handle_xsetbv +ffffffff82534ab0 T svm_handle_inout +ffffffff82534bd0 T vmm_inject_ud +ffffffff82534c00 T vmm_inject_db +ffffffff82534c30 T vmx_handle_np_fault +ffffffff82534db0 T vmx_handle_inout +ffffffff82534f50 T vmx_handle_cr +ffffffff825351c0 T vmx_handle_rdmsr +ffffffff82535290 T vmx_handle_wrmsr +ffffffff825354f0 T vmx_handle_xsetbv +ffffffff825355c0 T vmm_inject_gp +ffffffff825355f0 T vmx_get_exit_qualification +ffffffff82535650 T vmx_get_guest_faulttype +ffffffff825356f0 T svm_get_guest_faulttype +ffffffff82535720 T svm_fault_page +ffffffff825357b0 T vmx_fault_page +ffffffff82535910 T vmm_get_guest_cpu_mode +ffffffff82535a10 T vmx_load_pdptes +ffffffff82535c90 T vmx_handle_cr0_write +ffffffff82535ea0 T vmx_handle_cr4_write +ffffffff82535f40 T vmm_handle_xsetbv +ffffffff82535fd0 T vmx_handle_misc_enable_msr +ffffffff82536030 T vmm_pat_is_valid +ffffffff82536110 T vmm_gpa_is_valid +ffffffff82536180 T vmx_exit_reason_decode +ffffffff825361c0 T svm_exit_reason_decode +ffffffff82536fd0 T vcpu_state_decode +ffffffff82538000 T vmm_dispatch_intr +ffffffff82538020 T vmxon +ffffffff82538050 T vmxoff +ffffffff82538080 T vmclear +ffffffff825380b0 T vmptrld +ffffffff825380e0 T vmptrst +ffffffff82538110 T vmwrite +ffffffff82538140 T vmread +ffffffff82538170 T invvpid +ffffffff825381a0 T invept +ffffffff825381d0 T vmx_enter_guest +ffffffff825381fb t skip_init +ffffffff825382c8 t no_l1df_msr +ffffffff825382cb t l1df_tlb_loop +ffffffff825382e4 t l1df_tlb_done +ffffffff825382ec t l1df_load_cache +ffffffff82538303 t done_flush +ffffffff82538396 t do_resume +ffffffff8253841b t fail_launch_or_resume +ffffffff8253845d t fail_launch_unknown +ffffffff8253846a t fail_launch_invalid_vmcs +ffffffff82538477 t fail_launch_valid_vmcs +ffffffff82538494 t vmx_exit_handler_asm +ffffffff82538559 t restore_host +ffffffff825385f0 T svm_enter_guest +ffffffff82538780 t restore_host_svm +ffffffff82539000 T sdmmc_match +ffffffff82539050 T sdmmc_attach +ffffffff82539390 T sdmmc_detach +ffffffff82539440 T sdmmc_activate +ffffffff82539510 T sdmmc_discover_task +ffffffff825395d0 T sdmmc_create_thread +ffffffff82539640 T sdmmc_holds_root_device +ffffffff825396a0 T sdmmc_task_thread +ffffffff82539890 T sdmmc_needs_discover +ffffffff82539940 T sdmmc_del_task +ffffffff825399f0 T sdmmc_card_detach +ffffffff82539ad0 T sdmmc_add_task +ffffffff82539b50 T sdmmc_card_attach +ffffffff82539c60 T sdmmc_enable +ffffffff82539db0 T sdmmc_scan +ffffffff82539e40 T sdmmc_init +ffffffff82539f40 T sdmmc_disable +ffffffff8253a0a0 T sdmmc_function_free +ffffffff8253a0c0 T sdmmc_delay +ffffffff8253a110 T sdmmc_select_card +ffffffff8253a290 T sdmmc_set_bus_power +ffffffff8253a450 T sdmmc_function_alloc +ffffffff8253a4e0 T sdmmc_app_command +ffffffff8253a670 T sdmmc_mmc_command +ffffffff8253a6f0 T sdmmc_go_idle_state +ffffffff8253a810 T sdmmc_send_if_cond +ffffffff8253a960 T sdmmc_set_relative_addr +ffffffff8253b000 T sdmmc_cisptr +ffffffff8253b0a0 T sdmmc_read_cis +ffffffff8253b3b0 T sdmmc_print_cis +ffffffff8253b520 T sdmmc_check_cis_quirks +ffffffff8253c000 T sdmmc_io_enable +ffffffff8253c2a0 T sdmmc_io_reset +ffffffff8253c3d0 T sdmmc_io_send_op_cond +ffffffff8253c540 T sdmmc_io_scan +ffffffff8253c690 T sdmmc_io_init +ffffffff8253c7c0 T sdmmc_io_set_highspeed +ffffffff8253ca70 T sdmmc_io_set_bus_width +ffffffff8253cd00 T sdmmc_io_function_ready +ffffffff8253ce80 T sdmmc_io_read_1 +ffffffff8253cfd0 T sdmmc_io_function_enable +ffffffff8253d3a0 T sdmmc_io_write_1 +ffffffff8253d520 T sdmmc_io_function_disable +ffffffff8253d7a0 T sdmmc_io_attach +ffffffff8253d890 T sdmmc_print +ffffffff8253dae0 T sdmmc_submatch +ffffffff8253db60 T sdmmc_io_detach +ffffffff8253dc10 T sdmmc_io_rw_direct +ffffffff8253ddb0 T sdmmc_io_rw_extended_subr +ffffffff8253df50 T sdmmc_io_rw_extended +ffffffff8253e340 T sdmmc_io_read_2 +ffffffff8253e4a0 T sdmmc_io_write_2 +ffffffff8253e600 T sdmmc_io_read_4 +ffffffff8253e760 T sdmmc_io_write_4 +ffffffff8253e8c0 T sdmmc_io_read_multi_1 +ffffffff8253e9b0 T sdmmc_io_write_multi_1 +ffffffff8253eaa0 T sdmmc_io_read_region_1 +ffffffff8253eb90 T sdmmc_io_write_region_1 +ffffffff8253ec80 T sdmmc_io_xchg +ffffffff8253ee10 T sdmmc_intr_enable +ffffffff8253f080 T sdmmc_intr_disable +ffffffff8253f2f0 T sdmmc_intr_establish +ffffffff8253f3f0 T sdmmc_intr_disestablish +ffffffff8253f4e0 T sdmmc_card_intr +ffffffff8253f530 T sdmmc_intr_task +ffffffff8253f5c0 T sdmmc_io_set_blocklen +ffffffff82540000 T sdmmc_mem_enable +ffffffff825404e0 T sdmmc_mem_send_op_cond +ffffffff82540690 T sdmmc_mem_signal_voltage +ffffffff82540750 T sdmmc_mem_scan +ffffffff82540a60 T sdmmc_decode_csd +ffffffff82540e70 T sdmmc_decode_cid +ffffffff825412b0 T sdmmc_mem_send_scr +ffffffff825413f0 T sdmmc_mem_decode_scr +ffffffff82541470 T sdmmc_mem_send_cxd_data +ffffffff825415e0 T sdmmc_mem_set_bus_width +ffffffff82541700 T sdmmc_mem_sd_switch +ffffffff825419b0 T sdmmc_be512_to_bitfield512 +ffffffff82541a60 T sdmmc_mem_mmc_switch +ffffffff82541b50 T sdmmc_mem_init +ffffffff82541ca0 T sdmmc_mem_set_blocklen +ffffffff82541da0 T sdmmc_mem_sd_init +ffffffff82542350 T sdmmc_mem_mmc_init +ffffffff82542c70 T sdmmc_mem_select_transfer_mode +ffffffff82542cf0 T sdmmc_mem_execute_tuning +ffffffff82542d80 T sdmmc_mem_read_block_subr +ffffffff825430e0 T sdmmc_mem_single_read_block +ffffffff825431b0 T sdmmc_mem_read_block +ffffffff82543370 T sdmmc_mem_write_block_subr +ffffffff825436c0 T sdmmc_mem_single_write_block +ffffffff82543790 T sdmmc_mem_write_block +ffffffff82543950 T sdmmc_mem_hibernate_write +ffffffff82544000 T sdmmc_scsi_cmd +ffffffff825441f0 T sdmmc_minphys +ffffffff82544270 T sdmmc_scsi_attach +ffffffff82544460 T sdmmc_alloc_ccbs +ffffffff825445a0 T sdmmc_free_ccbs +ffffffff82544600 T sdmmc_scsi_detach +ffffffff82544760 T sdmmc_stimeout +ffffffff825447e0 T sdmmc_ccb_alloc +ffffffff82544890 T sdmmc_ccb_free +ffffffff82544970 T sdmmc_inquiry +ffffffff82544be0 T sdmmc_start_xs +ffffffff82544cd0 T sdmmc_complete_xs +ffffffff82544da0 T sdmmc_done_xs +ffffffff82544df0 T sdmmc_scsi_hibernate_io +ffffffff82545000 T bwfm_sdio_preinit +ffffffff825454f0 T bwfm_sdio_txcheck +ffffffff82545530 T bwfm_sdio_txdata +ffffffff825455a0 T bwfm_sdio_txctl +ffffffff825456f0 T bwfm_sdio_buscore_read +ffffffff82545700 T bwfm_sdio_buscore_write +ffffffff82545720 T bwfm_sdio_buscore_prepare +ffffffff82545860 T bwfm_sdio_buscore_activate +ffffffff825458e0 T bwfm_sdio_match +ffffffff825459b0 T bwfm_sdio_attach +ffffffff82545c70 T bwfm_sdio_detach +ffffffff82545cd0 T bwfm_sdio_task +ffffffff82545e30 T bwfm_sdio_write_1 +ffffffff82545e60 T bwfm_sdio_read_1 +ffffffff82545e90 T bwfm_sdio_write_4 +ffffffff82545f40 T bwfm_sdio_read_4 +ffffffff82545ff0 T bwfm_sdio_load_microcode +ffffffff82546250 T bwfm_sdio_clkctl +ffffffff82546380 T bwfm_sdio_dev_write +ffffffff825463d0 T bwfm_sdio_intr +ffffffff82546410 T bwfm_sdio_ram_read_write +ffffffff82546640 T bwfm_sdio_htclk +ffffffff825468a0 T bwfm_sdio_readshared +ffffffff82546970 T bwfm_sdio_dev_read +ffffffff825469b0 T bwfm_sdio_rx_frames +ffffffff82546d40 T bwfm_sdio_tx_frames +ffffffff82546e20 T bwfm_sdio_backplane +ffffffff82546ed0 T bwfm_sdio_buf_read +ffffffff82546fb0 T bwfm_sdio_buf_write +ffffffff82547060 T bwfm_sdio_frame_read_write +ffffffff825471e0 T bwfm_sdio_newbuf +ffffffff82547260 T bwfm_sdio_tx_ok +ffffffff825472b0 T bwfm_sdio_tx_ctrlframe +ffffffff825473b0 T bwfm_sdio_tx_dataframe +ffffffff82547500 T bwfm_sdio_rx_glom +ffffffff82548000 T onewire_match +ffffffff82548050 T onewire_attach +ffffffff825480f0 T onewire_detach +ffffffff82548160 T onewire_activate +ffffffff82548180 T onewire_scan +ffffffff82548390 T onewire_createthread +ffffffff82548400 T onewire_print +ffffffff825484d0 T onewirebus_print +ffffffff82548520 T onewire_lock +ffffffff82548540 T onewire_unlock +ffffffff82548560 T onewire_reset +ffffffff82548580 T onewire_bit +ffffffff825485a0 T onewire_read_byte +ffffffff825486e0 T onewire_write_byte +ffffffff825487c0 T onewire_read_block +ffffffff82548860 T onewire_write_block +ffffffff82548900 T onewire_triplet +ffffffff825489e0 T onewire_matchrom +ffffffff82548b30 T onewire_search +ffffffff82548ec0 T onewire_thread +ffffffff82549000 T onewire_crc +ffffffff825490e0 T onewire_crc16 +ffffffff825491c0 T onewire_famname +ffffffff82549200 T onewire_matchbyfam +ffffffff8254a000 T owid_match +ffffffff8254a030 T owid_attach +ffffffff8254a100 T owid_detach +ffffffff8254a140 T owid_activate +ffffffff8254b000 T owsbm_match +ffffffff8254b030 T owsbm_attach +ffffffff8254b1d0 T owsbm_detach +ffffffff8254b240 T owsbm_activate +ffffffff8254b270 T owsbm_update +ffffffff8254c000 T owtemp_match +ffffffff8254c030 T owtemp_attach +ffffffff8254c130 T owtemp_detach +ffffffff8254c1a0 T owtemp_activate +ffffffff8254c1d0 T owtemp_update +ffffffff8254d000 T owctr_match +ffffffff8254d030 T owctr_attach +ffffffff8254d180 T owctr_detach +ffffffff8254d1f0 T owctr_activate +ffffffff8254d220 T owctr_update +ffffffff8254d250 T owctr_update_counter +ffffffff8254e000 A __text_page_start +ffffffff8254e000 T Xsyscall_meltdown +ffffffff8254e00c T Xsyscall +ffffffff8254e26e t Xsyscall_trampback +ffffffff8254e280 T intr_user_exit +ffffffff8254e2c2 t intr_user_exit_post_ast +ffffffff8254e3ee t Xiretq_trampback +ffffffff8254e3fa T doreti_iret +ffffffff8254f000 T alltraps +ffffffff8254f138 T recall_trap +ffffffff8254f150 T alltraps_kern +ffffffff8254f153 T alltraps_kern_meltdown +ffffffff82550000 ? Xsyscall32 +ffffffff82550000 A __kutext_start +ffffffff82550000 A __text_page_end +ffffffff82551000 ? Xtrap00 +ffffffff82551010 ? Xtrap01 +ffffffff82551020 ? Xtrap02 +ffffffff82551028 c calltrap_specstk +ffffffff825510f0 ? calltrap_specstk_tramp +ffffffff82551110 ? Xtrap03 +ffffffff82551120 ? Xtrap04 +ffffffff82551130 ? Xtrap05 +ffffffff82551140 ? Xtrap06 +ffffffff82551150 ? Xtrap07 +ffffffff82551160 ? Xtrap08 +ffffffff82551170 ? Xtrap09 +ffffffff82551180 ? Xtrap0a +ffffffff82551190 ? Xtrap0b +ffffffff825511a0 ? Xtrap0c +ffffffff825511b0 ? Xtrap0d +ffffffff82551240 ? Xtrap0e +ffffffff82551250 ? Xintrspurious +ffffffff82551250 ? Xtrap0f +ffffffff82551260 ? Xtrap10 +ffffffff82551270 ? Xtrap11 +ffffffff82551280 ? Xtrap12 +ffffffff82551290 ? Xtrap13 +ffffffff825512a0 ? Xtrap14 +ffffffff825512b0 ? Xtrap15 +ffffffff825512c0 ? Xtrap16 +ffffffff825512c0 ? Xtrap17 +ffffffff825512c0 ? Xtrap18 +ffffffff825512c0 ? Xtrap19 +ffffffff825512c0 ? Xtrap1a +ffffffff825512c0 ? Xtrap1b +ffffffff825512c0 ? Xtrap1c +ffffffff825512c0 ? Xtrap1d +ffffffff825512c0 ? Xtrap1e +ffffffff825512c0 ? Xtrap1f +ffffffff825512d0 ? x2apic_eoi +ffffffff825512f0 ? Xintr_lapic_ipi +ffffffff82551330 ? Xipi_invltlb +ffffffff82551360 ? Xipi_invlpg +ffffffff82551390 ? Xipi_invlrange +ffffffff825513d0 ? Xipi_invltlb_pcid +ffffffff82551410 ? Xipi_invlpg_pcid +ffffffff82551460 ? Xipi_invlrange_pcid +ffffffff825514d0 ? Xintr_lapic_ltimer +ffffffff82551510 ? Xintr_xen_upcall +ffffffff82551550 ? Xintr_hyperv_upcall +ffffffff82551590 ? Xintr_legacy0 +ffffffff825515d0 ? Xintr_legacy1 +ffffffff82551610 ? Xintr_legacy2 +ffffffff82551650 ? Xintr_legacy3 +ffffffff82551690 ? Xintr_legacy4 +ffffffff825516d0 ? Xintr_legacy5 +ffffffff82551710 ? Xintr_legacy6 +ffffffff82551750 ? Xintr_legacy7 +ffffffff82551790 ? Xintr_legacy8 +ffffffff825517d0 ? Xintr_legacy9 +ffffffff82551810 ? Xintr_legacy10 +ffffffff82551850 ? Xintr_legacy11 +ffffffff82551890 ? Xintr_legacy12 +ffffffff825518d0 ? Xintr_legacy13 +ffffffff82551910 ? Xintr_legacy14 +ffffffff82551950 ? Xintr_legacy15 +ffffffff82551990 ? Xintr_ioapic_edge0 +ffffffff825519d0 ? Xintr_ioapic_edge1 +ffffffff82551a10 ? Xintr_ioapic_edge2 +ffffffff82551a50 ? Xintr_ioapic_edge3 +ffffffff82551a90 ? Xintr_ioapic_edge4 +ffffffff82551ad0 ? Xintr_ioapic_edge5 +ffffffff82551b10 ? Xintr_ioapic_edge6 +ffffffff82551b50 ? Xintr_ioapic_edge7 +ffffffff82551b90 ? Xintr_ioapic_edge8 +ffffffff82551bd0 ? Xintr_ioapic_edge9 +ffffffff82551c10 ? Xintr_ioapic_edge10 +ffffffff82551c50 ? Xintr_ioapic_edge11 +ffffffff82551c90 ? Xintr_ioapic_edge12 +ffffffff82551cd0 ? Xintr_ioapic_edge13 +ffffffff82551d10 ? Xintr_ioapic_edge14 +ffffffff82551d50 ? Xintr_ioapic_edge15 +ffffffff82551d90 ? Xintr_ioapic_edge16 +ffffffff82551dd0 ? Xintr_ioapic_edge17 +ffffffff82551e10 ? Xintr_ioapic_edge18 +ffffffff82551e50 ? Xintr_ioapic_edge19 +ffffffff82551e90 ? Xintr_ioapic_edge20 +ffffffff82551ed0 ? Xintr_ioapic_edge21 +ffffffff82551f10 ? Xintr_ioapic_edge22 +ffffffff82551f50 ? Xintr_ioapic_edge23 +ffffffff82551f90 ? Xintr_ioapic_edge24 +ffffffff82551fd0 ? Xintr_ioapic_edge25 +ffffffff82552010 ? Xintr_ioapic_edge26 +ffffffff82552050 ? Xintr_ioapic_edge27 +ffffffff82552090 ? Xintr_ioapic_edge28 +ffffffff825520d0 ? Xintr_ioapic_edge29 +ffffffff82552110 ? Xintr_ioapic_edge30 +ffffffff82552150 ? Xintr_ioapic_edge31 +ffffffff82552190 ? Xintr_ioapic_edge32 +ffffffff825521d0 ? Xintr_ioapic_edge33 +ffffffff82552210 ? Xintr_ioapic_edge34 +ffffffff82552250 ? Xintr_ioapic_edge35 +ffffffff82552290 ? Xintr_ioapic_edge36 +ffffffff825522d0 ? Xintr_ioapic_edge37 +ffffffff82552310 ? Xintr_ioapic_edge38 +ffffffff82552350 ? Xintr_ioapic_edge39 +ffffffff82552390 ? Xintr_ioapic_edge40 +ffffffff825523d0 ? Xintr_ioapic_edge41 +ffffffff82552410 ? Xintr_ioapic_edge42 +ffffffff82552450 ? Xintr_ioapic_edge43 +ffffffff82552490 ? Xintr_ioapic_edge44 +ffffffff825524d0 ? Xintr_ioapic_edge45 +ffffffff82552510 ? Xintr_ioapic_edge46 +ffffffff82552550 ? Xintr_ioapic_edge47 +ffffffff82552590 ? Xintr_ioapic_edge48 +ffffffff825525d0 ? Xintr_ioapic_edge49 +ffffffff82552610 ? Xintr_ioapic_edge50 +ffffffff82552650 ? Xintr_ioapic_edge51 +ffffffff82552690 ? Xintr_ioapic_edge52 +ffffffff825526d0 ? Xintr_ioapic_edge53 +ffffffff82552710 ? Xintr_ioapic_edge54 +ffffffff82552750 ? Xintr_ioapic_edge55 +ffffffff82552790 ? Xintr_ioapic_edge56 +ffffffff825527d0 ? Xintr_ioapic_edge57 +ffffffff82552810 ? Xintr_ioapic_edge58 +ffffffff82552850 ? Xintr_ioapic_edge59 +ffffffff82552890 ? Xintr_ioapic_edge60 +ffffffff825528d0 ? Xintr_ioapic_edge61 +ffffffff82552910 ? Xintr_ioapic_edge62 +ffffffff82552950 ? Xintr_ioapic_edge63 +ffffffff82552990 ? Xintr_ioapic_level0 +ffffffff825529d0 ? Xintr_ioapic_level1 +ffffffff82552a10 ? Xintr_ioapic_level2 +ffffffff82552a50 ? Xintr_ioapic_level3 +ffffffff82552a90 ? Xintr_ioapic_level4 +ffffffff82552ad0 ? Xintr_ioapic_level5 +ffffffff82552b10 ? Xintr_ioapic_level6 +ffffffff82552b50 ? Xintr_ioapic_level7 +ffffffff82552b90 ? Xintr_ioapic_level8 +ffffffff82552bd0 ? Xintr_ioapic_level9 +ffffffff82552c10 ? Xintr_ioapic_level10 +ffffffff82552c50 ? Xintr_ioapic_level11 +ffffffff82552c90 ? Xintr_ioapic_level12 +ffffffff82552cd0 ? Xintr_ioapic_level13 +ffffffff82552d10 ? Xintr_ioapic_level14 +ffffffff82552d50 ? Xintr_ioapic_level15 +ffffffff82552d90 ? Xintr_ioapic_level16 +ffffffff82552dd0 ? Xintr_ioapic_level17 +ffffffff82552e10 ? Xintr_ioapic_level18 +ffffffff82552e50 ? Xintr_ioapic_level19 +ffffffff82552e90 ? Xintr_ioapic_level20 +ffffffff82552ed0 ? Xintr_ioapic_level21 +ffffffff82552f10 ? Xintr_ioapic_level22 +ffffffff82552f50 ? Xintr_ioapic_level23 +ffffffff82552f90 ? Xintr_ioapic_level24 +ffffffff82552fd0 ? Xintr_ioapic_level25 +ffffffff82553010 ? Xintr_ioapic_level26 +ffffffff82553050 ? Xintr_ioapic_level27 +ffffffff82553090 ? Xintr_ioapic_level28 +ffffffff825530d0 ? Xintr_ioapic_level29 +ffffffff82553110 ? Xintr_ioapic_level30 +ffffffff82553150 ? Xintr_ioapic_level31 +ffffffff82553190 ? Xintr_ioapic_level32 +ffffffff825531d0 ? Xintr_ioapic_level33 +ffffffff82553210 ? Xintr_ioapic_level34 +ffffffff82553250 ? Xintr_ioapic_level35 +ffffffff82553290 ? Xintr_ioapic_level36 +ffffffff825532d0 ? Xintr_ioapic_level37 +ffffffff82553310 ? Xintr_ioapic_level38 +ffffffff82553350 ? Xintr_ioapic_level39 +ffffffff82553390 ? Xintr_ioapic_level40 +ffffffff825533d0 ? Xintr_ioapic_level41 +ffffffff82553410 ? Xintr_ioapic_level42 +ffffffff82553450 ? Xintr_ioapic_level43 +ffffffff82553490 ? Xintr_ioapic_level44 +ffffffff825534d0 ? Xintr_ioapic_level45 +ffffffff82553510 ? Xintr_ioapic_level46 +ffffffff82553550 ? Xintr_ioapic_level47 +ffffffff82553590 ? Xintr_ioapic_level48 +ffffffff825535d0 ? Xintr_ioapic_level49 +ffffffff82553610 ? Xintr_ioapic_level50 +ffffffff82553650 ? Xintr_ioapic_level51 +ffffffff82553690 ? Xintr_ioapic_level52 +ffffffff825536d0 ? Xintr_ioapic_level53 +ffffffff82553710 ? Xintr_ioapic_level54 +ffffffff82553750 ? Xintr_ioapic_level55 +ffffffff82553790 ? Xintr_ioapic_level56 +ffffffff825537d0 ? Xintr_ioapic_level57 +ffffffff82553810 ? Xintr_ioapic_level58 +ffffffff82553850 ? Xintr_ioapic_level59 +ffffffff82553890 ? Xintr_ioapic_level60 +ffffffff825538d0 ? Xintr_ioapic_level61 +ffffffff82553910 ? Xintr_ioapic_level62 +ffffffff82553950 ? Xintr_ioapic_level63 +ffffffff82554000 ? codepatch_fill_nop +ffffffff82554000 A __cptext_start +ffffffff82554000 A __kutext_end +ffffffff825540b0 ? codepatch_maprw +ffffffff82554190 ? codepatch_unmaprw +ffffffff82554200 ? codepatch_nop +ffffffff82554360 ? codepatch_replace +ffffffff82554510 ? codepatch_call +ffffffff82554530 ? codepatch_jmp +ffffffff82555000 A __cptext_end +ffffffff82555000 A __rodata_start +ffffffff82555000 C _etext +ffffffff82555000 C etext +ffffffff82556000 r seeprom_read +ffffffff82556004 r icl_mg_pll_find_divisors.div1_vals +ffffffff82556028 r gen9bc_tgp_ddc_pin_map +ffffffff82556038 r athn_ac2qid +ffffffff82556038 r athn_ac2qid +ffffffff82556038 r athn_ac2qid +ffffffff82556044 r rtwn_get_rssi.cckoff +ffffffff8255606c r rsu_ac2qid +ffffffff8255607c r pckbc_portcmd +ffffffff82556080 r tht_fifo_write_pad.pad +ffffffff82556088 r rsu_get_rssi.cckoff +ffffffff8255609c r adlp_n_revids +ffffffff825560ec r apple_iso_trans +ffffffff825560f0 r dg2_g12_revid_step_tbl +ffffffff825560f8 r wihap_check_tx.txratetable +ffffffff825560fc r dmamode +ffffffff82556124 r gen9_edram_size_mb.sets +ffffffff82557000 r isomappings +ffffffff82557080 r unimappings +ffffffff82557230 r replacements +ffffffff8255ab1f r cmd0646_9_tim_udma +ffffffff825ae6af r pp_r600_decoded_lanes +ffffffff825c9a58 r cmd680_setup_channel.udma_tbl +ffffffff825d16f6 r apollo_udma33_tim +ffffffff825d77e3 r substchar +ffffffff825d98ef r apollo_udma100_tim +ffffffff826011f8 r apollo_udma66_tim +ffffffff826086a4 r apollo_pio_rec +ffffffff82617a7e r cy_pio_rec +ffffffff8264700b r apollo_udma133_tim +ffffffff82653be8 R drm_ca +ffffffff82653c10 R drm_filtops +ffffffff82653c40 R drmread_filtops +ffffffff82654000 r vga_emulops +ffffffff82654048 R vga_stdscreen +ffffffff82654078 R vga_stdscreen_mono +ffffffff826540a8 R vga_stdscreen_bf +ffffffff826540d8 R vga_40lscreen +ffffffff82654108 R vga_40lscreen_mono +ffffffff82654138 R vga_40lscreen_bf +ffffffff82654168 R vga_50lscreen +ffffffff82654198 R vga_50lscreen_mono +ffffffff826541c8 R vga_50lscreen_bf +ffffffff826541f8 R vga_screenlist +ffffffff82654208 R vga_screenlist_mono +ffffffff82654218 R vga_accessops +ffffffff82654278 r i945_wm_info +ffffffff826542b0 r bgansitopc +ffffffff826542b8 r pctoansi +ffffffff826542f8 r sdma_offsets +ffffffff826542f8 r sdma_offsets +ffffffff82654328 r iha_rate_tbl +ffffffff82654360 r i830_a_wm_info +ffffffff82654398 r gen9_edram_size_mb.ways +ffffffff82654400 r aggr_periodic_times +ffffffff82654480 r jsl_ehl_revids +ffffffff826544f8 r michael_final.pad +ffffffff82654520 r rt_copysa.maskarray +ffffffff82654528 r i915_wm_info +ffffffff82654530 r amdgpu_ih_clientid_jpeg +ffffffff82654530 r amdgpu_ih_clientid_uvds +ffffffff82654530 r amdgpu_ih_clientid_vcns +ffffffff82654530 r amdgpu_ih_clientid_vcns +ffffffff82654530 r amdgpu_ih_clientid_vcns +ffffffff82654568 r vga_setfontset.cmaptabb +ffffffff82654580 r tgl_revids +ffffffff826545d8 r i830_bc_wm_info +ffffffff82654648 r hsw_activate_psr2.map +ffffffff82654688 r __drm_universal_plane_init.default_modifiers +ffffffff82654698 r iwn_tid2fifo +ffffffff826546b0 r vga_setfontset.cmaptaba +ffffffff826546b8 r crtc_offsets +ffffffff826546b8 r crtc_offsets +ffffffff826546b8 r crtc_offsets +ffffffff826546d8 r link_speed +ffffffff826546d8 r link_speed +ffffffff826546d8 r link_speed +ffffffff82654750 r rtwn_r88e_get_rssi.cckoff +ffffffff82655000 R edid_vendors +ffffffff826552c0 R edid_nvendors +ffffffff826552d0 R edid_products +ffffffff82655330 R edid_nproducts +ffffffff82655340 r _edid_modes +ffffffff82656000 R videomode_list +ffffffff82657080 R videomode_count +ffffffff82658000 r ahc_hard_errors +ffffffff82658080 r critical_sections +ffffffff826580b0 r patches +ffffffff82658d50 r seqprog +ffffffff8265a000 r ahc_switch +ffffffff8265b000 r termstat_strings +ffffffff8265b020 r critical_sections +ffffffff8265b060 r seqprog +ffffffff8265bd50 r patches +ffffffff8265d000 r ahd_switch +ffffffff8265e000 R aic_switch +ffffffff8265f000 R adw_switch +ffffffff82660000 R gdt_switch +ffffffff82661000 R twe_switch +ffffffff82662000 R ciss_switch +ffffffff82662030 R ciss_level +ffffffff82662050 R ciss_stat +ffffffff82663000 R ami_switch +ffffffff82663028 R ami_raw_switch +ffffffff82664000 R mfi_switch +ffffffff82664028 R mfi_pd_switch +ffffffff82664050 r mfi_iop_xscale +ffffffff82664080 r mfi_iop_ppc +ffffffff826640b0 r mfi_iop_gen2 +ffffffff826640e0 r mfi_iop_skinny +ffffffff82664110 r mfi_bbu_indicators +ffffffff826641c0 r bwi_rf_calc_nrssi_slope_11b.save_phy_regs +ffffffff826641f0 r chv_oa_mux_regs +ffffffff82664210 r fiji_clock_stretcher_lookup_table +ffffffff82664210 r tonga_clock_stretcher_lookup_table +ffffffff82664230 r iosf_pci_devices +ffffffff82664250 r link_speed +ffffffff82664250 r link_speed +ffffffff82664250 r link_speed +ffffffff82664290 r drm_fb_xfrm.default_dst_pitch +ffffffff82664290 r non_supported_protection +ffffffff82664390 r tgl_uy_revids +ffffffff826643e0 r bwi_phy_noise_11g_rev1 +ffffffff82664460 r cardslot_process_event.antonym_ev +ffffffff826644f0 r gen11_oa_mux_regs +ffffffff826645e0 r ddr2_cycle_tenths +ffffffff82664650 r rtw_intr_rx.ratetbl +ffffffff826646d0 r abm_config +ffffffff82664740 r getbootinfo.ports.30 +ffffffff82664790 r reg_offsets +ffffffff826647a0 r bwi_rf_lo_measure_11g.rf_lo_adjust +ffffffff826647b0 r init_non_clock_fields.look_up +ffffffff826647c0 r uftdi_8u232am_getrate.roundoff +ffffffff82664810 r zyd_rx_data.rates +ffffffff82664820 r ieee80211_ra_valid_tx_mcs.max_mcs +ffffffff82664860 r mmio_invalidate_full.gen8_regs +ffffffff82664890 r bwi_phy_noise_11g +ffffffff826648a0 r hpt366_pio +ffffffff826648d0 r glk_revids +ffffffff82664920 r bwi_rf_calc_nrssi_slope_11g.save_phy3_regs +ffffffff82664940 r ether_crc32_be_update.rev +ffffffff82664940 r rtw_grf5101_mac_crypt.caesar +ffffffff82664990 r snb_b_fdi_train_param +ffffffff82665000 R qlw_switch +ffffffff82666000 R isp_2100_risc_code +ffffffff82678bf0 R isp_2200_risc_code +ffffffff8268b990 R isp_2300_risc_code +ffffffff826a5408 R qla_switch +ffffffff826a5430 r qla_regs_2100 +ffffffff826a5460 r qla_regs_2200 +ffffffff826a5490 r qla_regs_23XX +ffffffff826a6000 R ahci_atascsi_methods +ffffffff826a7000 R nvme_switch +ffffffff826a7028 r nvme_ops +ffffffff826a8000 R mpi_switch +ffffffff826a8100 r intel_hpll_vco.elk_vco +ffffffff826a8160 r pin_offsets +ffffffff826a81c0 r firmware_list +ffffffff826a8220 r atom_arg_shift +ffffffff826a8220 r atom_arg_shift +ffffffff826a8260 r pf_syncookie_wstab +ffffffff826a8280 r ieee80211_media_init.mopts +ffffffff826a82e0 r add_entropy_words.twist_table +ffffffff826a8380 r urtw_8225v2_txpwr_cck +ffffffff826a83a0 r bwfm_pci_prio2fifo +ffffffff826a83a0 r ieee80211_up_to_ac.up_to_ac +ffffffff826a8460 r paritytab +ffffffff826a8460 r x86emu_parity_tab +ffffffff826a8480 r legacy_connector_convert +ffffffff826a84c0 r gen7_oa_mux_regs +ffffffff826a84e0 r hsw_oa_mux_regs +ffffffff826a8500 r notetab +ffffffff826a8520 r urtw_8225v2_txpwr_cck_ch14 +ffffffff826a8540 r bwi_rf_calibval.rf_calibvals +ffffffff826a85e0 r pf_syncookie_msstab +ffffffff826a8640 r xgmi3x16_pcs_err_status_reg_aldebaran +ffffffff826a86a0 r uath_wme_init.uath_wme_11g +ffffffff826a86c0 r gen7_oa_b_counters +ffffffff826a8820 r icl_revids +ffffffff826a88e0 r rtwn_iq_calib_run.reg_adda +ffffffff826a8920 r atom_def_dst +ffffffff826a8920 r atom_def_dst +ffffffff826a8960 r sha256_initial_hash_value +ffffffff826a89c0 r otus_edca_def +ffffffff826a89e0 r intel_hpll_vco.blb_vco +ffffffff826a8aa0 r epic_pci_subsys_info +ffffffff826a8ac0 r atom_arg_mask +ffffffff826a8ac0 r atom_arg_mask +ffffffff826a8b20 r butmap +ffffffff826a8b60 r GFX_RLC_SRM_INDEX_CNTL_DATA_OFFSETS +ffffffff826a8ba0 r comsoft.lsrmap +ffffffff826a8be0 r tulip_mii_phy_readspecific.table +ffffffff826a8c00 r kbl_revids +ffffffff826a8ca0 r intel_hpll_vco.pnv_vco +ffffffff826a8d00 r dmapageport +ffffffff826a8dc0 r intel_hpll_vco.ctg_vco +ffffffff826a8e80 r drm_calculate_luminance_range.pre_computed_values +ffffffff826a9000 R sili_atascsi_methods +ffffffff826aa000 R ncr53c9x_switch +ffffffff826ab000 r scf_period +ffffffff826ac000 R siop_script +ffffffff826ac5a0 R lun_switch +ffffffff826ac5d0 R tag_switch +ffffffff826ac660 R load_dsa +ffffffff826ac6c4 R siop_led_on +ffffffff826ac6cc R siop_led_off +ffffffff826ac6d8 R siop_switch +ffffffff826ad000 R ep_vortex_media +ffffffff826ad100 R ep_default_to_media +ffffffff826ae000 R wi_card_ident +ffffffff826b0000 R ucode_table +ffffffff826b1000 r re_revisions +ffffffff826b1290 r re_kstats_tpl +ffffffff826b3000 R smc91cxx_media +ffffffff826b3010 R smc91cxx_mii_bitbang_ops +ffffffff826b4000 R dl10019_mii_bitbang_ops +ffffffff826b4028 R dl10022_mii_bitbang_ops +ffffffff826b5000 R ax88190_mii_bitbang_ops +ffffffff826b7000 R ac97_audio_default +ffffffff826b7020 R ac97_on_off +ffffffff826b7324 R ac97_mic_select +ffffffff826b7628 R ac97_mono_select +ffffffff826b792c R ac97_source +ffffffff826b7c30 R ac97_volume_stereo +ffffffff826b7c4c R ac97_volume_mono +ffffffff826b7c70 R source_info +ffffffff826b8470 R ac97_ad +ffffffff826b8580 R ac97_ak +ffffffff826b8610 R ac97_av +ffffffff826b8750 R ac97_rl +ffffffff826b87a0 R ac97_cm +ffffffff826b8820 R ac97_cr +ffffffff826b8840 R ac97_cs +ffffffff826b8920 R ac97_cx +ffffffff826b8980 R ac97_dt +ffffffff826b89a0 R ac97_em +ffffffff826b89d0 R ac97_es +ffffffff826b89f0 R ac97_is +ffffffff826b8a10 R ac97_ic +ffffffff826b8a90 R ac97_it +ffffffff826b8ac0 R ac97_ns +ffffffff826b8b80 R ac97_ps +ffffffff826b8bb0 R ac97_sl +ffffffff826b8bd0 R ac97_st +ffffffff826b8d20 R ac97_vi +ffffffff826b8d50 R ac97_tt +ffffffff826b8dd0 R ac97_ti +ffffffff826b8df0 R ac97_wb +ffffffff826b8e10 R ac97_wo +ffffffff826b8ea0 R ac97_ym +ffffffff826b8ef0 R ac97_vendors +ffffffff826b91f0 R ac97enhancement +ffffffff826b92f0 R ac97feature +ffffffff826ba000 R lm_chips +ffffffff826ba020 R lm78_sensors +ffffffff826ba1a0 R w83627hf_sensors +ffffffff826ba3a0 R w83627ehf_sensors +ffffffff826ba5c0 R w83627dhg_sensors +ffffffff826ba7c0 R nct6776f_sensors +ffffffff826baa00 R nct6779d_sensors +ffffffff826bad60 R w83637hf_sensors +ffffffff826baf20 R w83697hf_sensors +ffffffff826bb0c0 R w83781d_sensors +ffffffff826bb280 R w83782d_sensors +ffffffff826bb480 R w83783s_sensors +ffffffff826bb600 R w83791d_sensors +ffffffff826bb860 R w83792d_sensors +ffffffff826bbae0 R as99127f_sensors +ffffffff826bc000 r ar5k_known_products +ffffffff826bc110 r ar5111_gain_opt +ffffffff826bc1e0 r ar5112_gain_opt +ffffffff826bc2b0 r ar5k_5ghz_channels +ffffffff826bca00 r ar5k_2ghz_channels +ffffffff826bcf10 r ar5111_rf +ffffffff826bd350 r ar5112a_rf +ffffffff826bd890 r ar5112_rf +ffffffff826bdda0 r ar5413_rf +ffffffff826be1b0 r ar2413_rf +ffffffff826be4d0 r ar2425_rf +ffffffff826be830 r ar5111_rfg +ffffffff826beb30 r ar5112_rfg +ffffffff826bee30 r ar5413_rfg +ffffffff826bf130 r ar2413_rfg +ffffffff826bf430 r ar5k_rt_11a +ffffffff826bf552 r ar5k_rt_11b +ffffffff826bf674 r ar5k_rt_11g +ffffffff826bf796 r ar5k_rt_xr +ffffffff826c0000 r ar5210_ini +ffffffff826c1000 r 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ar9380_2_2_tx_gain_high_power_vals_5g +ffffffff826d6380 r ar9380_2_2_tx_gain_high_power_vals_2g +ffffffff826d6520 r ar9380_2_2_tx_gain_vals_5g +ffffffff826d66c0 r ar9380_2_2_tx_gain_vals_2g +ffffffff826d6860 r ar9485_1_1_tx_gain_regs +ffffffff826d68f0 r ar9485_1_1_tx_gain_vals_2g +ffffffff826d6a10 r ar9380_def_rom +ffffffff826d6e50 r ar9380_def_rom_h112 +ffffffff826d7290 r ar9380_def_rom_h116 +ffffffff826d76d0 r ar9380_def_rom_x112 +ffffffff826d7b10 r ar9380_def_rom_x113 +ffffffff826d8000 R atw_txthresh_tab_lo +ffffffff826d8050 R atw_txthresh_tab_hi +ffffffff826d80a0 r atw_attach.empty_macaddr +ffffffff826d80b0 r atw_attach.type_strings +ffffffff826d80d0 r atw_rfmd2958_ifn +ffffffff826d8110 r atw_rfmd2958_rf1r +ffffffff826d8150 r atw_rxintr.rate_tbl +ffffffff826d9000 r rtw_identify_sta.empty_macaddr +ffffffff826da000 r rtwn_set_key.etherzeroaddr +ffffffff826da010 r rtl8188eu_rf_prog +ffffffff826da030 r rtl8188ftv_rf_prog +ffffffff826da050 r rtl8192e_rf_prog +ffffffff826da080 r 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codel_intervals +ffffffff826f8000 R pfsync_acts +ffffffff826f9000 R hotplugread_filtops +ffffffff826fa000 R dtps_static +ffffffff826fb000 R db_show_all_cmds +ffffffff826fb180 R db_show_cmds +ffffffff826fb4c0 R db_boot_cmds +ffffffff826fb5a0 R db_command_table +ffffffff826fc000 R ddb_vars +ffffffff826fd000 R audio_ca +ffffffff826fd028 R audioctlread_filtops +ffffffff826fd058 R audiowrite_filtops +ffffffff826fd088 R audioread_filtops +ffffffff826fe000 R midi_ca +ffffffff826fe028 R midiwrite_filtops +ffffffff826fe058 R midiread_filtops +ffffffff826ff000 r mulawtolin16 +ffffffff826ff200 r lintomulaw +ffffffff82700000 R randomread_filtops +ffffffff82700030 R randomwrite_filtops +ffffffff82701000 R video_ca +ffffffff82701028 R video_filtops +ffffffff82702000 R cd9660_vfsops +ffffffff82703000 R cd9660_vops +ffffffff82703110 R cd9660_specvops +ffffffff82703220 R cd9660_fifovops +ffffffff82703330 R cd9660read_filtops +ffffffff82703360 R cd9660write_filtops +ffffffff82703390 R cd9660vnode_filtops +ffffffff82704000 R udf_vfsops +ffffffff82705000 R udf_vops +ffffffff82705110 r mon_lens +ffffffff82706000 r month_days +ffffffff82707000 R execsw +ffffffff82708000 r shstrtab +ffffffff82709000 R copyright +ffffffff827090c0 r initpaths +ffffffff8270a000 R sysent +ffffffff8270c000 R bufq_impls +ffffffff8270d000 R kqueueops +ffffffff8270d038 R kqread_filtops +ffffffff8270d068 R proc_filtops +ffffffff8270d098 R file_filtops +ffffffff8270d0c8 R timer_filtops +ffffffff8270d100 R sysfilt_ops +ffffffff8270d148 R seltrue_filtops +ffffffff8270d178 R dead_filtops +ffffffff8270d1a8 R badfd_filtops +ffffffff8270d1d8 r mutex_klistops +ffffffff8270d1f0 r rwlock_klistops +ffffffff8270e000 R kv_exec +ffffffff8270f000 R addrmask +ffffffff82710000 r rw_ops +ffffffff82711000 r proc_printit.pstat +ffffffff82712000 R pledge_syscalls +ffffffff82712a60 r pledgenames +ffffffff82712cb0 r pledgereq +ffffffff82713000 r unvname_rbt_RBT_INFO +ffffffff82713018 R unvname_rbt_RBT_TYPE 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pool_lock_ops_mtx +ffffffff8271e000 r pselregister.evf +ffffffff8271e00c r pselregister.evff +ffffffff8271f000 R pipe_rfiltops +ffffffff8271f030 R pipe_wfiltops +ffffffff8271f060 R pipe_efiltops +ffffffff8271f090 r pipeops +ffffffff82720000 R socketops +ffffffff82721000 R sysvsem_vars +ffffffff82722000 R char_type +ffffffff82722100 R ttyread_filtops +ffffffff82722130 R ttywrite_filtops +ffffffff82722160 R ttyexcept_filtops +ffffffff82723000 R ptcread_filtops +ffffffff82723030 R ptcwrite_filtops +ffffffff82723060 R ptcexcept_filtops +ffffffff82725000 R domains +ffffffff82726000 R unixdomain +ffffffff82726050 R unixsw +ffffffff82727000 R solisten_filtops +ffffffff82727030 R soread_filtops +ffffffff82727060 R sowrite_filtops +ffffffff82727090 R soexcept_filtops +ffffffff827270c0 R socket_klistops +ffffffff82728000 R sun_noname +ffffffff82728010 R uipc_usrreqs +ffffffff827280b0 R uipc_dgram_usrreqs +ffffffff82728150 R unpstctl_vars +ffffffff82728180 R unpsqctl_vars +ffffffff827281b0 R unpdgctl_vars +ffffffff82729000 r namecache_rb_cache_RBT_INFO +ffffffff82729018 R namecache_rb_cache_RBT_TYPE +ffffffff8272a000 R generic_filtops +ffffffff8272b000 r buf_rb_bufs_RBT_INFO +ffffffff8272b018 R buf_rb_bufs_RBT_TYPE +ffffffff8272b020 r typename +ffffffff8272c000 R sync_vops +ffffffff8272d000 R vnops +ffffffff8272e000 R spec_vops +ffffffff8272f000 R dead_vops +ffffffff82730000 R fifo_vops +ffffffff82730110 R fiforead_filtops +ffffffff82730140 R fifowrite_filtops +ffffffff82730170 R fifoexcept_filtops +ffffffff82731000 R regyear +ffffffff82731020 R leapyear +ffffffff82731040 r dos2unix +ffffffff82731140 r u2l +ffffffff82731240 r unix2dos +ffffffff82732008 R msdosfs_vfsops +ffffffff82733000 R msdosfs_vops +ffffffff82733110 R msdosfsread_filtops +ffffffff82733140 R msdosfswrite_filtops +ffffffff82733170 R msdosfsvnode_filtops +ffffffff82734000 r _utf_count +ffffffff82735000 R ntfs_vfsops +ffffffff82736000 R ntfs_vops +ffffffff82737000 R bpfread_filtops +ffffffff82737030 R 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routesw +ffffffff82747000 R gre_vars +ffffffff82747030 r mgre_tree_RBT_INFO +ffffffff82747048 R mgre_tree_RBT_TYPE +ffffffff82747050 r egre_tree_RBT_INFO +ffffffff82747068 R egre_tree_RBT_TYPE +ffffffff82747070 r nvgre_ucast_tree_RBT_INFO +ffffffff82747088 R nvgre_ucast_tree_RBT_TYPE +ffffffff82747090 r nvgre_mcast_tree_RBT_INFO +ffffffff827470a8 R nvgre_mcast_tree_RBT_TYPE +ffffffff827470b0 r eoip_tree_RBT_INFO +ffffffff827470c8 R eoip_tree_RBT_TYPE +ffffffff827470d0 r nvgre_etherbridge_ops +ffffffff82748000 r trunk_protos +ffffffff82749000 R ethermulticastaddr_slowprotocols +ffffffff82749006 R lacp_info_tlv_template +ffffffff8274900e R marker_info_tlv_template +ffffffff82749012 R marker_response_tlv_template +ffffffff82749020 R lacp_timer_funcs +ffffffff8274a000 r lacp_rxm_state_names +ffffffff8274a040 r lacp_rxm_event_names +ffffffff8274a090 r aggr_port_selected_names +ffffffff8274a0b0 r lacp_mux_state_names +ffffffff8274a0e0 r lacp_mux_event_names +ffffffff8274a128 r lacp_address_slow +ffffffff8274b000 r tpmr_pf_ipv4 +ffffffff8274b018 r tpmr_pf_ipv6 +ffffffff8274c000 r bpe_tree_RBT_INFO +ffffffff8274c018 R bpe_tree_RBT_TYPE +ffffffff8274c020 r bpe_etherbridge_ops +ffffffff8274d000 R pppx_rd_filtops +ffffffff8274d030 R pppx_wr_filtops +ffffffff8274d060 r pppx_ifs_RBT_INFO +ffffffff8274d078 R pppx_ifs_RBT_TYPE +ffffffff8274d080 r pppac_rd_filtops +ffffffff8274d0b0 r pppac_wr_filtops +ffffffff8274e000 r vxlan_peers_RBT_INFO +ffffffff8274e018 R vxlan_peers_RBT_TYPE +ffffffff8274e020 r vxlan_etherbridge_ops +ffffffff8274f000 R stoeplitz_cache +ffffffff82750000 R ieee80211_std_rateset_11a +ffffffff82750010 R ieee80211_std_rateset_11b +ffffffff82750020 R ieee80211_std_rateset_11g +ffffffff82750030 R ieee80211_std_ratesets_11n +ffffffff827503b0 R ieee80211_std_ratesets_11ac +ffffffff827506b0 r ieee80211_setbasicrates.basic +ffffffff82750710 r ieee80211_setmode.chanflags +ffffffff82750730 r ieee80211_rate2media.rates +ffffffff827508c0 r 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enc_xform_null +ffffffff82774280 R auth_hash_hmac_md5_96 +ffffffff827742c8 R auth_hash_hmac_sha1_96 +ffffffff82774310 R auth_hash_hmac_ripemd_160_96 +ffffffff82774358 R auth_hash_hmac_sha2_256_128 +ffffffff827743a0 R auth_hash_hmac_sha2_384_192 +ffffffff827743e8 R auth_hash_hmac_sha2_512_256 +ffffffff82774430 R auth_hash_gmac_aes_128 +ffffffff82774478 R auth_hash_gmac_aes_192 +ffffffff827744c0 R auth_hash_gmac_aes_256 +ffffffff82774508 R auth_hash_chacha20_poly1305 +ffffffff82774550 R comp_algo_deflate +ffffffff82775000 r IV +ffffffff82776000 r idgen32_ftable +ffffffff82777000 r Chacha20_Poly1305_Update.zeroes +ffffffff82777010 r pad0 +ffffffff82778000 r null_point +ffffffff82778020 r base_point +ffffffff82779000 R mplsdomain +ffffffff8277a000 R mplsctl_vars +ffffffff8277b000 r nfs_nodetree_RBT_INFO +ffffffff8277b018 R nfs_nodetree_RBT_TYPE +ffffffff8277c000 r nfsread_filtops +ffffffff8277c030 r nfswrite_filtops +ffffffff8277c060 r nfsvnode_filtops +ffffffff8277d000 r nfsrv_v3errmap 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R scsi_readsafe_cmd +ffffffff827e2000 R scsibus_ca +ffffffff827e2030 R scsi_quirk_patterns +ffffffff827e3000 R cd_ca +ffffffff827e3030 R cd_patterns +ffffffff827e4000 R ch_ca +ffffffff827e4030 R ch_patterns +ffffffff827e5000 R sd_ca +ffffffff827e5030 R sd_patterns +ffffffff827e6000 R st_quirk_patterns +ffffffff827e6210 R st_ca +ffffffff827e6240 R st_patterns +ffffffff827e7000 R uk_ca +ffffffff827e8000 R safte_ca +ffffffff827e9000 R ses_ca +ffffffff827ea000 R sym_ca +ffffffff827ea028 R sym_mpath_sym_ops +ffffffff827ea048 R sym_mpath_asym_ops +ffffffff827eb000 R rdac_ca +ffffffff827eb028 R rdac_mpath_ops +ffffffff827ec000 R emc_ca +ffffffff827ec028 R emc_mpath_ops +ffffffff827ed000 R hds_ca +ffffffff827ed028 R hds_mpath_ops +ffffffff827ee000 R atapiscsi_ca +ffffffff827ee028 r atapiscsi_switch +ffffffff827ef000 R wd_ca +ffffffff827f0000 R atascsi_switch +ffffffff827f1000 R mainbus_ca +ffffffff827f2000 R bios_ca +ffffffff827f3000 R mpbios_ca +ffffffff827f3030 r loc_where +ffffffff827f4000 R mpbios_icu_table +ffffffff827f5000 R cpu_ca +ffffffff827f6000 R lapic_timer_intrclock +ffffffff827f7000 R ioapic_ca +ffffffff827f8000 R efifb_ca +ffffffff827f8028 R efifb_screen_list +ffffffff827f9000 R pvbus_ca +ffffffff827fa000 R pvclock_ca +ffffffff827fb000 R vmt_ca +ffffffff827fc000 R xen_ca +ffffffff827fd000 R xs_errors +ffffffff827fe000 R xnf_ca +ffffffff827ff000 R xbf_ca +ffffffff827ff028 R xbf_switch +ffffffff82800000 R hyperv_ca +ffffffff82800028 R hv_guid_network +ffffffff82800038 R hv_guid_ide +ffffffff82800048 R hv_guid_scsi +ffffffff82800058 R hv_guid_shutdown +ffffffff82800068 R hv_guid_timesync +ffffffff82800078 R hv_guid_heartbeat +ffffffff82800088 R hv_guid_kvp +ffffffff82801000 r kvp_pools +ffffffff82802000 R hvn_ca +ffffffff82803000 R hvs_ca +ffffffff82803028 R hvs_switch +ffffffff82804000 r virtio_device_name +ffffffff82805000 R vio_ca +ffffffff82805030 r virtio_net_feature_names +ffffffff82806000 R vioblk_ca +ffffffff82806028 R vioblk_switch +ffffffff82807000 R viomb_ca +ffffffff82807030 r viomb_feature_names +ffffffff82808000 R viornd_ca +ffffffff82809000 R vioscsi_ca +ffffffff82809028 R vioscsi_switch +ffffffff82809050 R vioscsi_vq_names +ffffffff8280a000 R vmmci_ca +ffffffff8280b000 R pci_ca +ffffffff8280c000 r pci_quirks +ffffffff8280d000 R pci_subclass_prehistoric +ffffffff8280d050 R pci_subclass_mass_storage +ffffffff8280d160 R pci_subclass_network +ffffffff8280d250 R pci_subclass_display +ffffffff8280d2d0 R pci_subclass_multimedia +ffffffff8280d360 R pci_subclass_memory +ffffffff8280d3c0 R pci_subclass_bridge +ffffffff8280d510 R pci_subclass_communications +ffffffff8280d5d0 R pci_subclass_system +ffffffff8280d6c0 R pci_subclass_input +ffffffff8280d770 R pci_subclass_dock +ffffffff8280d7c0 R pci_subclass_processor +ffffffff8280d880 R pci_subclass_serialbus +ffffffff8280d990 R pci_subclass_wireless +ffffffff8280da70 R pci_subclass_i2o +ffffffff8280daa0 R pci_subclass_satcom +ffffffff8280db20 R pci_subclass_crypto +ffffffff8280db80 R pci_subclass_dasp +ffffffff8280dc10 R pci_class +ffffffff8280de20 r pci_known_vendors +ffffffff8280f3c0 r pci_known_products +ffffffff82832000 R vga_pci_ca +ffffffff82832030 r vga_devs +ffffffff82833000 R ahc_pci_ident_table +ffffffff828335d0 R ahc_pci_ca +ffffffff82834000 R ahd_pci_ident_table +ffffffff82834198 R ahd_num_pci_devs +ffffffff828341a0 R ahd_pci_ca +ffffffff828341d0 r pci_bus_modes +ffffffff82834210 r pci_status_strings +ffffffff82834250 r pci_status_source +ffffffff82834290 r split_status_strings +ffffffff82835000 R adw_pci_ca +ffffffff82835028 R adw_pci_devices +ffffffff82836000 r adw_3550_Default_EEPROM +ffffffff82836080 r adw_38C0800_Default_EEPROM +ffffffff82836100 r adw_38C1600_Default_EEPROM +ffffffff82837000 R adw_asc3550_mcode +ffffffff828383a0 R adw_asc3550_mcode_data +ffffffff828383b0 R adw_asc38C0800_mcode +ffffffff82839888 R adw_asc38C0800_mcode_data +ffffffff828398a0 R adw_asc38C1600_mcode +ffffffff8283b160 R adw_asc38C1600_mcode_data +ffffffff8283c000 R twe_pci_ca +ffffffff8283c028 R twe_pci_devices +ffffffff8283d000 R arc_ca +ffffffff8283d028 R arc_switch +ffffffff8283d050 r arc_devices +ffffffff8283d190 r arc_intel +ffffffff8283d198 r arc_marvell +ffffffff8283d1a0 r arc_lsi +ffffffff8283d1a8 r arc_marvell2 +ffffffff8283e000 R jmb_ca +ffffffff8283e030 r jmb_devices +ffffffff8283f000 R ahci_pci_ca +ffffffff8283f028 R ahci_jmb_ca +ffffffff8283f050 r ahci_devices +ffffffff82840000 R nvme_pci_ca +ffffffff82840028 r nvme_msi_blacklist +ffffffff82841000 R ami_pci_ca +ffffffff82841030 r ami_pci_subsys +ffffffff82841270 r ami_pci_vendors +ffffffff82842000 R mfi_pci_ca +ffffffff82842030 r mfi_pci_devices +ffffffff82843000 R mfii_ca +ffffffff82843028 R mfii_switch +ffffffff82843050 R mfii_pd_switch +ffffffff82843078 R mfii_iop_thunderbolt +ffffffff82843088 R mfii_iop_25 +ffffffff82843098 R mfii_iop_35 +ffffffff828430b0 R mfii_devices +ffffffff82843140 r mfi_bbu_indicators +ffffffff82844000 R ips_ca +ffffffff82844028 r ips_ids +ffffffff82844040 r ips_chips +ffffffff82844090 r ips_names +ffffffff82844128 r ips_switch +ffffffff82844150 r ips_pt_switch +ffffffff82845000 R eap_ca +ffffffff82845028 R eap1370_hw_if +ffffffff828450e0 R eap1371_hw_if +ffffffff82845198 R eap_midi_hw_if +ffffffff828451d0 R eap_devices +ffffffff82846000 R auacer_pci_devices +ffffffff82846008 R auacer_ca +ffffffff82846030 R auacer_hw_if +ffffffff82847000 R auich_ca +ffffffff82847028 R auich_hw_if +ffffffff828470e0 r auich_devices +ffffffff82848000 R azalia_ca +ffffffff82848028 R azalia_hw_if +ffffffff828480e0 R azalia_pci_devices +ffffffff82848110 r pin_devices +ffffffff82848190 r line_colors +ffffffff82848210 r wtypes +ffffffff82849000 r azalia_codec_init_dolby_atmos.atmos_init +ffffffff82849050 r azalia_codec_init_dolby_atmos.atmos_v23_v25 +ffffffff8284a000 R envy_ca +ffffffff8284a028 R envy_hw_if +ffffffff8284a0e0 R envy_midi_hw_if +ffffffff8284b000 R emuxki_devices +ffffffff8284b010 R emu_ca +ffffffff8284b038 R emuxki_hw_if +ffffffff8284b0f0 r emuxki_recbuf_sz +ffffffff8284b170 r emuxki_recsrc_szreg +ffffffff8284b17c r emuxki_recsrc_bufaddrreg +ffffffff8284b190 r emuxki_rate_to_pitch.logMagTable +ffffffff8284b390 r emuxki_rate_to_pitch.logSlopeTable +ffffffff8284c000 R auixp_pci_devices +ffffffff8284c010 R auixp_ca +ffffffff8284c038 R auixp_hw_if +ffffffff8284d000 R clcs_ca +ffffffff8284d028 R cs4280_hw_if +ffffffff8284d0e0 R cs4280_devices +ffffffff8284e000 R yds_ca +ffffffff8284e028 r yds_hw_if +ffffffff8284e0e0 r yds_chip_capability_list +ffffffff8284e120 r yds_get_lpfk.lpfkt +ffffffff8284e160 r yds_get_lpfq.lpfqt +ffffffff8284f000 R auvia_ca +ffffffff8284f028 R auvia_hw_if +ffffffff8284f0e0 R auvia_devices +ffffffff8284f0f0 r auvia_set_params_sub.slottab +ffffffff82850000 R gdt_pci_ca +ffffffff82851000 R ciss_pci_ca +ffffffff82851030 R ciss_pci_devices +ffffffff82852000 R qlw_pci_ca +ffffffff82852030 r qlw_devices +ffffffff82852050 r isp_1040_risc_code +ffffffff828579f0 r isp_1080_risc_code +ffffffff8285f470 r isp_12160_risc_code +ffffffff82867000 R qla_pci_ca +ffffffff82867030 r qla_devices +ffffffff82868000 R qle_ca +ffffffff82868028 R qle_switch +ffffffff82868050 r qle_devices +ffffffff82868070 r isp_2400_risc_code +ffffffff82897a50 r isp_2500_risc_code +ffffffff828ca000 R mpi_pci_ca +ffffffff828ca030 r mpi_devices +ffffffff828cb000 R mpii_ca +ffffffff828cb028 R mpii_switch +ffffffff828cb050 r mpii_devices +ffffffff828cc000 R sili_pci_ca +ffffffff828cc030 r sili_devices +ffffffff828cd000 R aq_devices +ffffffff828cd060 R aq_products +ffffffff828cd1d0 R aq_fw1x_ops +ffffffff828cd1f8 R aq_fw2x_ops +ffffffff828cd220 R aq2_fw_ops +ffffffff828cd248 R aq_ca +ffffffff828ce000 R de_ca +ffffffff828ce030 r tulip_srom_conninfo +ffffffff828ce120 r tulip_mii_phy_attrlist +ffffffff828ce1e0 r tulip_21140_znyx_zx34x_boardsw +ffffffff828ce208 r tulip_21040_10baset_only_boardsw +ffffffff828ce230 r tulip_21040_boardsw +ffffffff828ce258 r tulip_2114x_isv_boardsw +ffffffff828ce280 r tulip_21140_smc9332_boardsw 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piix_isp_dma +ffffffff828d4193 r piix_rtc_dma +ffffffff828d4196 r apollo_pio_set +ffffffff828d419b r cmd0643_9_data_tim_pio +ffffffff828d41a0 r cmd0643_9_data_tim_dma +ffffffff828d41a3 r cmd680_channel_map.init_val +ffffffff828d41b1 r cmd680_setup_channel.udma2_tbl +ffffffff828d41b8 r cmd680_setup_channel.dma_tbl +ffffffff828d41be r cmd680_setup_channel.pio_tbl +ffffffff828d41d0 r satalink_ba5_regmap +ffffffff828d4690 r sii3114_chansetup.channel_names +ffffffff828d46b0 r cy_pio_pulse +ffffffff828d46c0 r sis_udma133new_tim +ffffffff828d46e0 r sis_pio133new_tim +ffffffff828d46f4 r sis_dma133new_tim +ffffffff828d4700 r sis_udma66_tim +ffffffff828d4706 r sis_udma100new_tim +ffffffff828d470c r sis_udma133old_tim +ffffffff828d4713 r sis_pio_act +ffffffff828d4718 r sis_pio_rec +ffffffff828d471d r natsemi_pio_pulse +ffffffff828d4722 r natsemi_pio_recover +ffffffff828d4727 r natsemi_dma_pulse +ffffffff828d472a r natsemi_dma_recover +ffffffff828d4730 r scx200_udma33 +ffffffff828d473c r scx200_dma33 +ffffffff828d4750 r scx200_pio33 +ffffffff828d4778 r acer_udma +ffffffff828d477e r acer_pio +ffffffff828d4790 r hpt370_pio +ffffffff828d47a4 r hpt370_dma +ffffffff828d47b0 r hpt370_udma +ffffffff828d47d0 r hpt372_pio +ffffffff828d47e4 r hpt372_dma +ffffffff828d47f0 r hpt372_udma +ffffffff828d480c r hpt366_dma +ffffffff828d4820 r hpt366_udma +ffffffff828d4840 r hpt374_pio +ffffffff828d4854 r hpt374_dma +ffffffff828d4860 r hpt374_udma +ffffffff828d487c r pdc2xx_pa +ffffffff828d4881 r pdc2xx_pb +ffffffff828d4886 r pdc2xx_dma_mb +ffffffff828d4889 r pdc2xx_dma_mc +ffffffff828d488c r pdc2xx_udma_mc +ffffffff828d4892 r acard_act_udma +ffffffff828d4899 r acard_rec_udma +ffffffff828d48a0 r acard_udma_conf +ffffffff828d48a7 r acard_act_dma +ffffffff828d48aa r acard_rec_dma +ffffffff828d48ad r acard_act_pio +ffffffff828d48b2 r acard_rec_pio +ffffffff828d48b7 r nforce_udma +ffffffff828d48be r nforce_pio +ffffffff828d48c3 r ixp_mdma_timings +ffffffff828d48c6 r ixp_pio_timings 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+ffffffff828f2042 r cas_promdat2 +ffffffff828f3000 R sf_pci_ca +ffffffff828f3028 R sf_pci_products +ffffffff828f4000 R sis_ca +ffffffff828f4028 R sis_devices +ffffffff828f5000 R se_devices +ffffffff828f5008 R se_ca +ffffffff828f6000 R uhci_pci_ca +ffffffff828f7000 R ohci_pci_ca +ffffffff828f8000 R ehci_pci_ca +ffffffff828f9000 R xhci_pci_ca +ffffffff828fa000 R cbb_pci_ca +ffffffff828fa028 r pccbb_pcmcia_do_io_map.pcic_iowidth +ffffffff828fb000 R skc_devices +ffffffff828fb030 R skc_ca +ffffffff828fb058 R sk_ca +ffffffff828fc000 R mskc_devices +ffffffff828fc0a8 R mskc_ca +ffffffff828fc0d0 R msk_ca +ffffffff828fc100 r msk_mib +ffffffff828fd000 R puc_pci_ca +ffffffff828fe000 R puc_devs +ffffffff82903000 R com_puc_ca +ffffffff82903030 r puc_port_types +ffffffff82904000 R lpt_puc_ca +ffffffff82905000 R wi_pci_ca +ffffffff82905030 r wi_pci_products +ffffffff82906000 R an_pci_ca +ffffffff82906030 R an_pci_devices +ffffffff82907000 R iwi_devices +ffffffff82907010 R iwi_ca +ffffffff82908000 R wpi_ca +ffffffff82908028 r wpi_devices +ffffffff82908030 r wpi_rates +ffffffff82908050 r wpi_rf_gain_5ghz +ffffffff829080a0 r wpi_dsp_gain_5ghz +ffffffff829080f0 r wpi_rf_gain_2ghz +ffffffff82908140 r wpi_dsp_gain_2ghz +ffffffff82908190 r wpi_pmgt +ffffffff82908310 r wpi_bands +ffffffff82909000 R iwn_mcs2ridx +ffffffff82909020 R iwn_ca +ffffffff82909050 r iwn_devices +ffffffff829090e8 r iwn4965_sensitivity_limits +ffffffff82909124 r iwn5000_sensitivity_limits +ffffffff82909160 r iwn5150_sensitivity_limits +ffffffff8290919c r iwn1000_sensitivity_limits +ffffffff829091d8 r iwn6000_sensitivity_limits +ffffffff82909214 r iwn2000_sensitivity_limits +ffffffff82909250 r iwn_fw_errmsg +ffffffff82909340 r iwn4965_set_txpower.tdiv +ffffffff82909360 r iwn4965_rf_gain_5ghz +ffffffff829093d0 r iwn4965_dsp_gain_5ghz +ffffffff82909440 r iwn4965_dsp_gain_2ghz +ffffffff829094b0 r iwn_pmgt +ffffffff829096f0 r iwn4965_post_alive.qid2fifo +ffffffff82909700 r iwn_bands +ffffffff82909770 r iwn_rates +ffffffff82909820 r iwn4965_rf_gain_2ghz +ffffffff8290a000 R iwm_nvm_channels +ffffffff8290a030 R iwm_nvm_channels_8000 +ffffffff8290a070 R iwm_rates +ffffffff8290a0d0 R iwm_ht_mcs2ridx +ffffffff8290a110 R iwm_tid_to_ac +ffffffff8290a118 R iwm_ac_to_tx_fifo +ffffffff8290a120 R iwm_nvm_to_read +ffffffff8290a144 r iwm_set_hw_address_8000.reserved_mac +ffffffff8290a180 r iwm_sf_full_timeout +ffffffff8290a1b0 r iwm_sf_full_timeout_def +ffffffff8290a1e0 r advanced_lookup +ffffffff8290a320 r iwm_devices +ffffffff8290a360 R iwm_ca +ffffffff8290b000 R iwx_9560_quz_a0_jf_b0_cfg +ffffffff8290b020 R iwx_9560_qu_c0_jf_b0_cfg +ffffffff8290b040 R iwx_qu_b0_hr1_b0 +ffffffff8290b060 R iwx_qu_b0_hr_b0 +ffffffff8290b080 R iwx_ax201_cfg_qu_hr +ffffffff8290b0a0 R iwx_qu_c0_hr1_b0 +ffffffff8290b0c0 R iwx_qu_c0_hr_b0 +ffffffff8290b0e0 R iwx_ax201_cfg_qu_c0_hr_b0 +ffffffff8290b100 R iwx_quz_a0_hr1_b0 +ffffffff8290b120 R iwx_ax201_cfg_quz_hr +ffffffff8290b140 R iwx_cfg_so_a0_hr_b0 +ffffffff8290b160 R iwx_cfg_quz_a0_hr_b0 +ffffffff8290b180 R iwx_2ax_cfg_so_gf_a0 +ffffffff8290b1a0 R iwx_2ax_cfg_so_gf_a0_long +ffffffff8290b1c0 R iwx_2ax_cfg_so_gf4_a0 +ffffffff8290b1e0 R iwx_2ax_cfg_so_gf4_a0_long +ffffffff8290b200 R iwx_2ax_cfg_ty_gf_a0 +ffffffff8290b220 R iwx_2ax_cfg_so_jf_b0 +ffffffff8290b240 R iwx_nvm_channels_8000 +ffffffff8290b280 R iwx_rates +ffffffff8290b2e0 R iwx_mcs2ridx +ffffffff8290b320 R iwx_tid_to_ac +ffffffff8290b328 R iwx_ac_to_tx_fifo +ffffffff8290b330 r iwx_nvm_channels_uhb +ffffffff8290b39e r iwx_is_valid_mac_addr.reserved_mac +ffffffff8290b3b0 r iwx_sf_full_timeout +ffffffff8290b3e0 r iwx_sf_full_timeout_def +ffffffff8290b410 r advanced_lookup +ffffffff8290b550 r iwx_devices +ffffffff8290b590 r iwx_dev_info_table +ffffffff8290bde8 R iwx_ca +ffffffff8290c000 R cmpci_ca +ffffffff8290c028 R cmpci_hw_if +ffffffff8290c0e0 r cmpci_rate_table +ffffffff8290c120 R cmpci_devices +ffffffff8290c130 r cmpci_query_devinfo.mixer_port_names +ffffffff8290c160 r cmpci_query_devinfo.mixer_classes +ffffffff8290d000 R iha_pci_ca +ffffffff8290d028 R iha_switch +ffffffff8290e000 R pcscp_ca +ffffffff8290f000 R bge_ca +ffffffff8290f030 R bge_devices +ffffffff8290f1b0 r bge_revisions +ffffffff8290f610 r bge_majorrevs +ffffffff82910000 R bnx_devices +ffffffff82910020 R bnx_ca +ffffffff82911000 R vge_ca +ffffffff82911028 R vge_devices +ffffffff82912000 R stge_ca +ffffffff82912028 R stge_mii_bitbang_ops +ffffffff82912050 R stge_devices +ffffffff82913000 R nfe_ca +ffffffff82913030 R nfe_devices +ffffffff82914000 R et_devices +ffffffff82914008 R et_ca +ffffffff82915000 R jme_devices +ffffffff82915008 R jme_ca +ffffffff82916000 R age_devices +ffffffff82916008 R age_ca +ffffffff82917000 R alc_devices +ffffffff82917038 R alc_ca +ffffffff82918000 R ale_devices +ffffffff82918008 R ale_ca +ffffffff82919000 R amdpm_ca +ffffffff82919030 R amdpm_ids +ffffffff8291a000 R bce_ca +ffffffff8291a028 R bce_devices +ffffffff8291b000 R ath_pci_ca +ffffffff8291c000 R athn_pci_ca +ffffffff8291c030 r athn_pci_devices +ffffffff8291d000 R atw_pci_ca +ffffffff8291d028 R atw_pci_devices +ffffffff8291e000 R rtw_pci_ca +ffffffff8291e030 R rtw_pci_products +ffffffff8291f000 R rtwn_pci_ca +ffffffff8291f030 r rtwn_pci_devices +ffffffff8291f040 r rtl8188eu_mac +ffffffff8291f1b0 r rtl8192cu_mac +ffffffff8291f310 r rtl8192ce_mac +ffffffff8291f458 r rtl8188eu_bb_prog +ffffffff8291f480 r rtl8723a_bb_prog +ffffffff8291f4a8 r rtl8192ce_bb_prog_1t +ffffffff8291f4d0 r rtl8192ce_bb_prog_2t +ffffffff8291f500 r rtl8188eu_bb_regs +ffffffff8291f680 r rtl8188eu_bb_vals +ffffffff8291f980 r rtl8188eu_agc_vals +ffffffff8291fb80 r rtl8723a_bb_regs +ffffffff8291fd00 r rtl8723a_bb_vals +ffffffff8291fff0 r rtl8192ce_agc_vals +ffffffff82920270 r rtl8192ce_bb_regs +ffffffff829203f0 r rtl8192ce_bb_vals_1t +ffffffff829206e0 r rtl8192ce_bb_vals_2t +ffffffff82921000 R ral_pci_ca +ffffffff82921030 R ral_pci_devices +ffffffff82922000 R acx_pci_ca +ffffffff82922028 R acx_pci_devices +ffffffff82923000 R pgt_pci_ca +ffffffff82923028 R pgt_pci_devices +ffffffff82924000 R malo_pci_ca +ffffffff82924028 R malo_pci_devices +ffffffff82925000 R bwi_pci_ca +ffffffff82925030 R bwi_pci_devices +ffffffff82926000 R piixpm_ca +ffffffff82926030 R piixpm_ids +ffffffff82927000 R vic_ca +ffffffff82927028 R vic_devices +ffffffff82928000 R vmx_devices +ffffffff82928008 R vmx_ca +ffffffff82928030 r vmx_tx_kstat_tpl +ffffffff829280d0 r vmx_kstat_rate +ffffffff829280e0 r vmx_rx_kstat_tpl +ffffffff82929000 R vmwpvs_ca +ffffffff82929028 R vmwpvs_switch +ffffffff8292a000 R lii_ca +ffffffff8292a028 R lii_devices +ffffffff8292b000 R ichiic_ca +ffffffff8292b030 R ichiic_ids +ffffffff8292c000 R viapm_ca +ffffffff8292c030 R viapm_ids +ffffffff8292c070 r val_to_temp +ffffffff8292c870 r val_to_uV.mult +ffffffff8292d000 R amdiic_ca +ffffffff8292d028 R amdiic_ids +ffffffff8292e000 R nviic_ca +ffffffff8292e030 R nviic_ids +ffffffff8292f000 R sdhc_pci_ca +ffffffff82930000 R kate_ca +ffffffff82930030 r kate_proc +ffffffff82931000 R km_ca +ffffffff82931030 r km_devices +ffffffff82932000 R ksmn_ca +ffffffff82932030 r ksmn_devices +ffffffff82933000 R iosf_pci_ca +ffffffff82934000 R itherm_devices +ffffffff82934008 R itherm_ca +ffffffff82935000 R pchtemp_ca +ffffffff82935030 R pchtemp_devices +ffffffff82936000 R rtsx_pci_ca +ffffffff82937000 R xspd_ca +ffffffff82937028 R xspd_devices +ffffffff82938000 R virtio_pci_ca +ffffffff82939000 R dwiic_pci_ca +ffffffff82939030 R dwiic_pci_ids +ffffffff8293a000 R bwfm_pci_ca +ffffffff8293a030 r bwfm_pci_devices +ffffffff8293b000 R ccp_pci_ca +ffffffff8293b030 r ccp_pci_devices +ffffffff8293c000 R bnxt_devices +ffffffff8293c040 R bnxt_ca +ffffffff8293d000 R mcx_ca +ffffffff8293d030 r mcx_devices +ffffffff8293d060 r mcx_rss_config +ffffffff8293d0d0 r mcx_eth_cap_map +ffffffff8293d2d0 r mcx_kstat_ppcnt_ieee8023 +ffffffff8293d2e8 r mcx_kstat_ppcnt_rfc2863 +ffffffff8293d300 r mcx_kstat_ppcnt_rfc2819 +ffffffff8293d318 r mcx_kstat_ppcnt_rfc3635 +ffffffff8293d330 r mcx_ppcnt_ieee8023_tpl +ffffffff8293d4b0 r mcx_ppcnt_rfc2863_tpl +ffffffff8293d5c0 r mcx_ppcnt_rfc2819_tpl +ffffffff8293d770 r mcx_ppcnt_rfc3635_tpl +ffffffff8293d8b0 r mcx_kstat_mtmp_tpl +ffffffff8293d950 r mcx_kstat_mtmp_rate +ffffffff8293d960 r mcx_queue_kstat_tpl +ffffffff8293e000 R iavf_ca +ffffffff8293e030 r iavf_devices +ffffffff8293e040 r iavf_aq_regs +ffffffff8293e0b0 r iavf_link_speeds +ffffffff8293f000 R rge_ca +ffffffff8293f028 R rge_devices +ffffffff8293f030 r rtl8125_mac_cfg2_ephy +ffffffff8293f090 r rge_phy_config_mac_cfg3.mac_cfg3_a438_value +ffffffff8293f0b0 r rge_phy_config_mac_cfg3.mac_cfg3_b88e_value +ffffffff8293f110 r rge_phy_config_mac_cfg4.mac_cfg4_b87c_value +ffffffff8293f170 r rtl8125_mac_cfg4_ephy +ffffffff8293f1e0 r rtl8125_mac_cfg2_mcu +ffffffff8293fe80 r rtl8125_mac_cfg3_mcu +ffffffff82940720 r rtl8125_mac_cfg4_mcu +ffffffff82942d10 r rtl8125_mac_cfg5_mcu +ffffffff82943c10 r rtl8125_mac_bps +ffffffff82943f80 r rtl8125b_mac_bps +ffffffff82944120 r rge_kstats_tpl +ffffffff82945000 R igc_devices +ffffffff82945040 R igc_ca +ffffffff82946000 R ngbe_devices +ffffffff82946008 R ngbe_ca +ffffffff82947000 R com_pci_ca +ffffffff82947030 R com_pci_ids +ffffffff82948000 r agp_attach.agp_max +ffffffff82948048 R agp_ca +ffffffff82949000 R intagp_ca +ffffffff8294a000 r drm_plane_create_rotation_property.props +ffffffff8294b000 r drm_bridge_priv_state_funcs +ffffffff8294d000 r color_encoding_name +ffffffff8294d020 r color_range_name +ffffffff8294e000 r drm_subpixel_enum_list +ffffffff8294e060 r drm_dpms_enum_list +ffffffff8294e0a0 r drm_dvi_i_select_enum_list +ffffffff8294e0d0 r drm_dvi_i_subconnector_enum_list +ffffffff8294e100 r drm_tv_select_enum_list +ffffffff8294e150 r drm_tv_subconnector_enum_list +ffffffff8294e1a0 r drm_dp_subconnector_enum_list +ffffffff8294e210 r drm_link_status_enum_list +ffffffff8294e230 r drm_scaling_mode_enum_list +ffffffff8294e270 r drm_aspect_ratio_enum_list +ffffffff8294e2a0 r hdmi_colorspaces +ffffffff8294e370 r dp_colorspaces +ffffffff8294e450 r drm_content_type_enum_list +ffffffff8294e4a0 r drm_panel_orientation_enum_list +ffffffff8294e4e0 r privacy_screen_enum +ffffffff8294f000 r drm_crtc_fence_ops +ffffffff82950000 r drm_dmt_modes +ffffffff82952940 r edid_cea_modes_1 +ffffffff829564d0 r edid_cea_modes_193 +ffffffff82957180 r edid_quirk_list +ffffffff82957350 r edid_4k_modes +ffffffff829575b0 r edid_est_modes +ffffffff82957db0 r est3_modes +ffffffff82957f10 r stereo_mandatory_modes +ffffffff82957f90 r extra_modes +ffffffff82958000 r drm_encoder_enum_list +ffffffff82959000 r drm_fbdev_client_funcs +ffffffff82959020 r drm_fb_helper_generic_funcs +ffffffff82959028 r drm_fbdev_fb_ops +ffffffff8295a000 r drm_fb_xrgb8888_to_rgb332.dst_pixsize +ffffffff8295a004 r drm_fb_xrgb8888_to_rgb565.dst_pixsize +ffffffff8295a008 r drm_fb_xrgb8888_to_rgb888.dst_pixsize +ffffffff8295a00c r drm_fb_xrgb8888_to_xrgb2101010.dst_pixsize +ffffffff8295a010 r drm_fb_xrgb8888_to_gray8.dst_pixsize +ffffffff8295a014 r drm_fb_rgb888_to_xrgb8888.dst_pixsize +ffffffff8295a018 r drm_fb_rgb565_to_xrgb8888.dst_pixsize +ffffffff8295b000 r __drm_format_info.formats +ffffffff8295c000 R drm_pgops +ffffffff8295d000 r drm_ioctls +ffffffff8295f000 r dma_fence_stub_ops +ffffffff8295f038 R dma_fence_array_ops +ffffffff8295f070 R dma_fence_chain_ops +ffffffff8295f0a8 R dmabufops +ffffffff8295f0e0 R syncfileops +ffffffff82960000 r drm_plane_type_enum_list +ffffffff82961000 r drm_mode_status_names +ffffffff82962000 r primary_plane_funcs +ffffffff82962068 r safe_modeset_formats +ffffffff82963000 r orientation_data +ffffffff829665c0 r lcd800x1280_rightside_up +ffffffff829665d8 r lcd720x1280_rightside_up +ffffffff829665f0 r lcd800x1280_leftside_up +ffffffff82966608 r lcd1080x1920_leftside_up +ffffffff82966620 r lcd1200x1920_rightside_up +ffffffff82966638 r gpd_micropc +ffffffff82966650 r gpd_pocket +ffffffff82966668 r gpd_pocket2 +ffffffff82966680 r gpd_win +ffffffff82966698 r gpd_win2 +ffffffff829666b0 r itworks_tw891 +ffffffff829666c8 r lcd1600x2560_rightside_up +ffffffff829666e0 r onegx1_pro +ffffffff829666f8 r lcd1600x2560_leftside_up +ffffffff82966710 r lcd1280x1920_rightside_up +ffffffff82966728 r .compoundliteral +ffffffff82966738 r .compoundliteral.5 +ffffffff82966760 r .compoundliteral.9 +ffffffff82966780 r .compoundliteral.17 +ffffffff829667c0 r .compoundliteral.21 +ffffffff829667e0 r .compoundliteral.23 +ffffffff829667f0 r .compoundliteral.25 +ffffffff82967000 r drm_gem_prime_dmabuf_ops +ffffffff82969000 r is_hdmi_adaptor.dp_dual_mode_hdmi_id +ffffffff8296a000 r drm_dp_phy_name.phy_names +ffffffff8296a048 r drm_dp_i2c_algo +ffffffff8296a058 r drm_dp_i2c_lock_ops +ffffffff8296a070 r dp_aux_bl_ops +ffffffff8296a090 r dpcd_quirk_list +ffffffff8296a320 r drm_dp_psr_setup_time.psr_setup_time_us +ffffffff8296b000 R drm_dp_mst_topology_state_funcs +ffffffff8296b020 r drm_dp_mst_req_type_str.req_type_str +ffffffff8296b1f0 r drm_dp_mst_sideband_tx_state_str.sideband_reason_str +ffffffff8296b220 r drm_dp_mst_nak_reason_str.nak_reason_str +ffffffff8296b278 r drm_dp_mst_i2c_algo +ffffffff8296c000 r hdmi_colorimetry_val +ffffffff8296d000 r ttm_bo_init_reserved.sys_mem +ffffffff8296e000 r ttm_bo_pipeline_gutting.sys_mem +ffffffff8296f018 R ttm_bo_vm_ops +ffffffff82970000 r ttm_range_manager_func +ffffffff82971018 r ttm_kmap_iter_io_ops +ffffffff82971030 r ttm_kmap_iter_linear_io_ops +ffffffff82972000 r ttm_sys_manager_func +ffffffff82973000 r ttm_kmap_iter_tt_ops +ffffffff82974000 r drm_sched_fence_ops_scheduled +ffffffff82974038 r drm_sched_fence_ops_finished +ffffffff82975000 R ch7017_ops +ffffffff82976000 R ch7xxx_ops +ffffffff82976060 r ch7xxx_ids +ffffffff82977000 R ivch_ops +ffffffff82977060 r backup_addresses +ffffffff82978000 R ns2501_ops +ffffffff82978060 r mode_agnostic_values +ffffffff829780e0 r ns2501_modes +ffffffff82979000 R sil164_ops +ffffffff8297a000 R tfp410_ops +ffffffff8297b000 r chv_dpll +ffffffff8297b050 r vlv_dpll +ffffffff8297b0a0 r g4x_dpll +ffffffff8297b0f0 r pch_dpll +ffffffff8297b138 r intel_dp_enc_funcs +ffffffff8297c000 r intel_hdmi_enc_funcs +ffffffff8297d000 r vlv_primary_formats +ffffffff8297d030 r ivb_primary_formats +ffffffff8297d050 r i965_primary_formats +ffffffff8297d070 r i8xx_primary_formats +ffffffff8297d080 r i965_plane_funcs +ffffffff8297d0e8 r i8xx_plane_funcs +ffffffff8297e000 r gen11_dsi_encoder_funcs +ffffffff8297e020 r gen11_dsi_connector_funcs +ffffffff8297e098 r gen11_dsi_connector_helper_funcs +ffffffff8297e0e8 r gen11_dsi_host_ops +ffffffff8297f000 r intel_plane_helper_funcs +ffffffff82980000 r g4x_audio_funcs +ffffffff82980010 r ilk_audio_funcs +ffffffff82980020 r hsw_audio_funcs +ffffffff82980030 r hdmi_audio_clock +ffffffff829800a0 r dp_aud_n_m +ffffffff82980250 r hdmi_aud_ncts_36bpp +ffffffff82980330 r hdmi_aud_ncts_30bpp +ffffffff82980410 r hdmi_aud_ncts_24bpp +ffffffff82981000 r intel_backlight_device_ops +ffffffff82981018 r bxt_pwm_funcs +ffffffff82981048 r cnp_pwm_funcs +ffffffff82981078 r lpt_pwm_funcs +ffffffff829810a8 r spt_pwm_funcs +ffffffff829810d8 r pch_pwm_funcs +ffffffff82981108 r ext_pwm_funcs +ffffffff82981138 r vlv_pwm_funcs +ffffffff82981168 r i965_pwm_funcs +ffffffff82981198 r i9xx_pwm_funcs +ffffffff829811c8 r pwm_bl_funcs +ffffffff82982000 r bdb_blocks +ffffffff82982160 r translate_iboost.mapping +ffffffff82982163 r adlp_ddc_pin_map +ffffffff8298216a r adls_ddc_pin_map +ffffffff82982170 r rkl_pch_tgp_ddc_pin_map +ffffffff82982175 r icp_ddc_pin_map +ffffffff8298217f r cnp_ddc_pin_map +ffffffff82983000 r mtl_sa_info +ffffffff82983006 r adlp_sa_info +ffffffff8298300c r adls_sa_info +ffffffff82983012 r rkl_sa_info +ffffffff82983018 r tgl_sa_info +ffffffff82983020 r intel_bw_funcs +ffffffff82984000 r intel_cdclk_funcs +ffffffff82984010 r dg2_cdclk_table +ffffffff829840c0 r adlp_a_step_cdclk_table +ffffffff82984140 r adlp_cdclk_table +ffffffff82984200 r rkl_cdclk_table +ffffffff829842f0 r icl_cdclk_table +ffffffff829843e0 r glk_cdclk_table +ffffffff82984410 r bxt_cdclk_table +ffffffff82984458 r tgl_cdclk_funcs +ffffffff82984478 r ehl_cdclk_funcs +ffffffff82984498 r icl_cdclk_funcs +ffffffff829844b8 r bxt_cdclk_funcs +ffffffff829844d8 r skl_cdclk_funcs +ffffffff829844f8 r bdw_cdclk_funcs +ffffffff82984518 r hsw_cdclk_funcs +ffffffff82984538 r chv_cdclk_funcs +ffffffff82984558 r vlv_cdclk_funcs +ffffffff82984578 r fixed_400mhz_cdclk_funcs +ffffffff82984598 r ilk_cdclk_funcs +ffffffff829845b8 r gm45_cdclk_funcs +ffffffff829845d8 r g33_cdclk_funcs +ffffffff829845f8 r g33_get_cdclk.div_3200 +ffffffff829845fe r g33_get_cdclk.div_4000 +ffffffff82984604 r g33_get_cdclk.div_4800 +ffffffff8298460a r g33_get_cdclk.div_5333 +ffffffff82984610 r i965gm_cdclk_funcs +ffffffff82984630 r i965gm_get_cdclk.div_3200 +ffffffff82984633 r i965gm_get_cdclk.div_4000 +ffffffff82984636 r i965gm_get_cdclk.div_5333 +ffffffff82984640 r pnv_cdclk_funcs +ffffffff82984660 r i945gm_cdclk_funcs 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radeon_atom_dig_helper_funcs +ffffffff82a030a0 r radeon_atom_dac_helper_funcs +ffffffff82a03108 r radeon_atom_ext_helper_funcs +ffffffff82a04000 r caicos_cgcg_cgls_default +ffffffff82a04240 r barts_mgcg_default +ffffffff82a04900 r turks_mgcg_default +ffffffff82a04d80 r caicos_mgcg_default +ffffffff82a05110 r turks_sysls_default +ffffffff82a051d0 r caicos_sysls_default +ffffffff82a05280 r caicos_cgcg_cgls_enable +ffffffff82a054d0 r caicos_cgcg_cgls_disable +ffffffff82a05730 r barts_mgcg_enable +ffffffff82a057b0 r turks_mgcg_enable +ffffffff82a05830 r caicos_mgcg_enable +ffffffff82a058b0 r caicos_mgcg_disable +ffffffff82a05930 r turks_sysls_enable +ffffffff82a059f0 r caicos_sysls_enable +ffffffff82a05aa0 r turks_sysls_disable +ffffffff82a05b60 r caicos_sysls_disable +ffffffff82a06000 r didt_config_ci +ffffffff82a065b4 r defaults_bonaire_xt +ffffffff82a06600 r defaults_saturn_xt +ffffffff82a0664c r defaults_hawaii_xt +ffffffff82a06698 r defaults_hawaii_pro +ffffffff82a07000 r ci_program_jump_on_start.data +ffffffff82a08000 r bonaire_io_mc_regs +ffffffff82a08120 r hawaii_io_mc_regs +ffffffff82a081d0 r mc_cg_registers +ffffffff82a08200 r bonaire_mgcg_cgcg_init +ffffffff82a085e0 r bonaire_golden_registers +ffffffff82a087d0 r bonaire_golden_common_registers +ffffffff82a08800 r bonaire_golden_spm_registers +ffffffff82a08810 r kalindi_mgcg_cgcg_init +ffffffff82a08ab0 r kalindi_golden_registers +ffffffff82a08c20 r kalindi_golden_common_registers +ffffffff82a08c50 r kalindi_golden_spm_registers +ffffffff82a08c60 r godavari_golden_registers +ffffffff82a08de0 r spectre_mgcg_cgcg_init +ffffffff82a09200 r spectre_golden_registers +ffffffff82a09330 r spectre_golden_common_registers +ffffffff82a09360 r spectre_golden_spm_registers +ffffffff82a09370 r hawaii_mgcg_cgcg_init +ffffffff82a09880 r hawaii_golden_registers +ffffffff82a09a30 r hawaii_golden_common_registers +ffffffff82a09a6c r hawaii_golden_spm_registers +ffffffff82a09a80 r spectre_rlc_save_restore_register_list +ffffffff82a0a170 r kalindi_rlc_save_restore_register_list +ffffffff82a0a680 r ci_cs_data +ffffffff82a0a6a0 r ci_SECT_CONTEXT_defs +ffffffff82a0a720 r ci_SECT_CONTEXT_def_1 +ffffffff82a0aa70 r ci_SECT_CONTEXT_def_3 +ffffffff82a0aa90 r ci_SECT_CONTEXT_def_4 +ffffffff82a0ad04 r ci_SECT_CONTEXT_def_5 +ffffffff82a0ad0c r ci_SECT_CONTEXT_def_6 +ffffffff82a0ad10 r ci_SECT_CONTEXT_def_2 +ffffffff82a0b160 r ci_SECT_CONTEXT_def_7 +ffffffff82a0b510 r cik_default_state +ffffffff82a0d000 r dce3_2_afmt_write_sad_regs.eld_reg_to_type +ffffffff82a0e000 r dce6_afmt_write_sad_regs.eld_reg_to_type +ffffffff82a0f000 r ni_tx_offsets +ffffffff82a0f020 r evergreen_dp_offsets +ffffffff82a0f040 r evergreen_disp_int_status +ffffffff82a0f060 r evergreen_golden_registers +ffffffff82a0f260 r evergreen_golden_registers2 +ffffffff82a0f310 r cypress_mgcg_init +ffffffff82a0fa10 r juniper_mgcg_init +ffffffff82a0fe80 r redwood_mgcg_init +ffffffff82a101b0 r cedar_golden_registers +ffffffff82a10390 r cedar_mgcg_init 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evergreen_hdmi_write_sad_regs.eld_reg_to_type +ffffffff82a19000 r didt_config_kv +ffffffff82a1a000 r barts_io_mc_regs +ffffffff82a1a0f0 r turks_io_mc_regs +ffffffff82a1a1e0 r caicos_io_mc_regs +ffffffff82a1a2d0 r cayman_io_mc_regs +ffffffff82a1a3c0 r cayman_golden_registers +ffffffff82a1a580 r cayman_golden_registers2 +ffffffff82a1a5d0 r dvst_golden_registers +ffffffff82a1a860 r dvst_golden_registers2 +ffffffff82a1a890 r scrapper_golden_registers +ffffffff82a1ad70 r tn_rlc_save_restore_register_list +ffffffff82a1af60 r cayman_cs_data +ffffffff82a1afa0 r SECT_CONTEXT_defs +ffffffff82a1b020 r SECT_CLEAR_defs +ffffffff82a1b040 r SECT_CTRLCONST_defs +ffffffff82a1b060 r SECT_CONTEXT_def_2 +ffffffff82a1b080 r SECT_CONTEXT_def_4 +ffffffff82a1b210 r SECT_CONTEXT_def_5 +ffffffff82a1b230 r SECT_CONTEXT_def_1 +ffffffff82a1b9d0 r SECT_CONTEXT_def_3 +ffffffff82a1bab0 r SECT_CONTEXT_def_6 +ffffffff82a1bb90 r SECT_CONTEXT_def_7 +ffffffff82a1c018 r SECT_CLEAR_def_1 +ffffffff82a1c024 r SECT_CTRLCONST_def_1 +ffffffff82a1c030 r cayman_default_state +ffffffff82a1d000 r cac_weights_cayman_xt +ffffffff82a1d128 r cac_weights_cayman_pro +ffffffff82a1d250 r cac_weights_cayman_le +ffffffff82a1d380 r cayman_cgcg_cgls_default +ffffffff82a1d5c0 r cayman_mgcg_default +ffffffff82a1df20 r cayman_sysls_default +ffffffff82a1dff0 r cayman_cgcg_cgls_enable +ffffffff82a1e240 r cayman_cgcg_cgls_disable +ffffffff82a1e4a0 r cayman_mgcg_enable +ffffffff82a1e520 r cayman_mgcg_disable +ffffffff82a1e5a0 r cayman_sysls_enable +ffffffff82a1e670 r cayman_sysls_disable +ffffffff82a1f000 r rn50_reg_safe_bm +ffffffff82a1f1a0 r r100_reg_safe_bm +ffffffff82a20000 r r200_reg_safe_bm +ffffffff82a21000 r r300_reg_safe_bm +ffffffff82a22000 r r420_reg_safe_bm +ffffffff82a24000 r color_formats_table +ffffffff82a24480 r r600_reg_safe_bm +ffffffff82a27000 R r600_utc +ffffffff82a27040 R r600_dtc +ffffffff82a27080 r r600_encode_pci_lane_width.encoded_lanes +ffffffff82a29000 r r100_gfx_ring +ffffffff82a29070 r r300_gfx_ring +ffffffff82a290e0 r rv515_gfx_ring +ffffffff82a29150 r r600_gfx_ring +ffffffff82a291c0 r r600_dma_ring +ffffffff82a29230 r rv6xx_uvd_ring +ffffffff82a292a0 r rv770_uvd_ring +ffffffff82a29310 r evergreen_gfx_ring +ffffffff82a29380 r evergreen_dma_ring +ffffffff82a293f0 r cayman_gfx_ring +ffffffff82a29460 r cayman_dma_ring +ffffffff82a294d0 r cayman_uvd_ring +ffffffff82a29540 r trinity_vce_ring +ffffffff82a295b0 r si_gfx_ring +ffffffff82a29620 r si_dma_ring +ffffffff82a29690 r ci_gfx_ring +ffffffff82a29700 r ci_cp_ring +ffffffff82a29770 r ci_dma_ring +ffffffff82a297e0 r ci_vce_ring +ffffffff82a2a000 r object_connector_convert +ffffffff82a2a060 r supported_devices_connector_convert +ffffffff82a2a0a0 r supported_devices_connector_object_id_convert +ffffffff82a2a0c0 r thermal_controller_names +ffffffff82a2a100 r pp_lib_thermal_controller_names +ffffffff82a2b000 r pin_offsets +ffffffff82a2b020 r radeon_audio_acr.hdmi_predefined_acr +ffffffff82a2d000 r thermal_controller_names +ffffffff82a2d020 r default_primarydac_adj +ffffffff82a2d120 r default_tvdac_adj +ffffffff82a2d220 r default_tmds_pll +ffffffff82a2e000 r radeon_dp_connector_helper_funcs +ffffffff82a2e050 r radeon_vga_connector_helper_funcs +ffffffff82a2e0a0 r radeon_dvi_connector_helper_funcs +ffffffff82a2e0f0 r radeon_tv_connector_helper_funcs +ffffffff82a2e140 r radeon_lvds_connector_helper_funcs +ffffffff82a2e190 r radeon_dp_connector_funcs +ffffffff82a2e298 r radeon_lvds_bridge_connector_funcs +ffffffff82a2e310 r radeon_vga_connector_funcs +ffffffff82a2e388 r radeon_dvi_connector_funcs +ffffffff82a2e400 r radeon_edp_connector_funcs +ffffffff82a2e478 r radeon_tv_connector_funcs +ffffffff82a2e4f0 r radeon_lvds_connector_funcs +ffffffff82a2f000 r radeon_family_name +ffffffff82a2f3f0 r radeon_px_quirk_list +ffffffff82a30000 r radeon_fb_funcs +ffffffff82a30018 r radeon_mode_funcs +ffffffff82a30060 r radeon_tmds_pll_enum_list +ffffffff82a30080 r radeon_tv_std_enum_list +ffffffff82a30100 r radeon_underscan_enum_list +ffffffff82a30130 r radeon_audio_enum_list +ffffffff82a30160 r radeon_dither_enum_list +ffffffff82a30180 r radeon_output_csc_enum_list +ffffffff82a301c0 r radeon_crtc_funcs +ffffffff82a30280 r hpd_names +ffffffff82a302b0 r encoder_names +ffffffff82a303e0 r radeon_afmt_init.eg_offsets +ffffffff82a31000 r aux_offset +ffffffff82a32000 R radeondrm_ca +ffffffff82a32030 r pciidlist +ffffffff82a361d0 r kms_driver +ffffffff82a362c0 r radeon_ioctls_kms +ffffffff82a37000 r radeon_fb_helper_funcs +ffffffff82a37008 r radeonfb_ops +ffffffff82a38000 R radeon_fence_ops +ffffffff82a3a000 R radeon_gem_object_funcs +ffffffff82a3a060 r radeon_gem_vm_ops +ffffffff82a3b000 r radeon_i2c_algo +ffffffff82a3b010 r radeon_atom_i2c_algo +ffffffff82a3c000 r legacy_helper_funcs +ffffffff82a3d000 r radeon_backlight_ops +ffffffff82a3d018 r radeon_legacy_lvds_enc_funcs +ffffffff82a3d038 r radeon_legacy_lvds_helper_funcs +ffffffff82a3d0a0 r radeon_legacy_tmds_int_enc_funcs +ffffffff82a3d0c0 r radeon_legacy_tmds_int_helper_funcs +ffffffff82a3d128 r radeon_legacy_primary_dac_enc_funcs +ffffffff82a3d148 r radeon_legacy_primary_dac_helper_funcs +ffffffff82a3d1b0 r radeon_legacy_tv_dac_enc_funcs +ffffffff82a3d1d0 r radeon_legacy_tv_dac_helper_funcs +ffffffff82a3d238 r radeon_legacy_tmds_ext_enc_funcs +ffffffff82a3d258 r radeon_legacy_tmds_ext_helper_funcs +ffffffff82a3e000 r SLOPE_value +ffffffff82a3e030 r YCOEF_EN_value +ffffffff82a3e060 r YCOEF_value +ffffffff82a3e090 r available_tv_modes +ffffffff82a3e110 r hor_timing_NTSC +ffffffff82a3e150 r vert_timing_NTSC +ffffffff82a3e190 r hor_timing_PAL +ffffffff82a3e1d0 r vert_timing_PAL +ffffffff82a40000 r radeon_pm_state_type_name +ffffffff82a41000 r radeon_evict_flags.placements +ffffffff82a44000 r rs600_reg_safe_bm +ffffffff82a46000 r rv515_reg_safe_bm +ffffffff82a47000 r dll_speed_table +ffffffff82a48000 r r7xx_golden_registers +ffffffff82a48090 r r7xx_golden_dyn_gpr_registers +ffffffff82a48100 r rv770ce_golden_registers +ffffffff82a48160 r rv770_golden_registers +ffffffff82a481b0 r rv770_mgcg_init +ffffffff82a488f0 r rv730_golden_registers +ffffffff82a48950 r rv730_mgcg_init +ffffffff82a48ee0 r rv710_golden_registers +ffffffff82a48f30 r rv710_mgcg_init +ffffffff82a491d0 r rv740_golden_registers +ffffffff82a49360 r rv740_mgcg_init +ffffffff82a4b000 r rv730_smc_int_vectors +ffffffff82a4b040 r rv710_smc_int_vectors +ffffffff82a4b080 r rv740_smc_int_vectors +ffffffff82a4b0c0 r cypress_smc_int_vectors +ffffffff82a4b100 r caicos_smc_int_vectors +ffffffff82a4b140 r cayman_smc_int_vectors +ffffffff82a4c000 r tahiti_io_mc_regs +ffffffff82a4c120 r pitcairn_io_mc_regs +ffffffff82a4c240 r verde_io_mc_regs +ffffffff82a4c360 r oland_io_mc_regs +ffffffff82a4c480 r hainan_io_mc_regs +ffffffff82a4c5a0 r crtc_offsets +ffffffff82a4c5c0 r si_disp_int_status +ffffffff82a4c5e0 r tahiti_golden_registers +ffffffff82a4c760 r tahiti_golden_rlc_registers +ffffffff82a4c7b0 r tahiti_mgcg_cgcg_init +ffffffff82a4cd98 r tahiti_golden_registers2 +ffffffff82a4cdb0 r pitcairn_golden_registers +ffffffff82a4cf00 r pitcairn_golden_rlc_registers +ffffffff82a4cf40 r pitcairn_mgcg_cgcg_init +ffffffff82a4d3b0 r verde_golden_registers +ffffffff82a4d620 r verde_golden_rlc_registers +ffffffff82a4d660 r verde_mgcg_cgcg_init +ffffffff82a4dae0 r oland_golden_registers +ffffffff82a4dc30 r oland_golden_rlc_registers +ffffffff82a4dc70 r oland_mgcg_cgcg_init +ffffffff82a4e000 r hainan_golden_registers +ffffffff82a4e12c r hainan_golden_registers2 +ffffffff82a4e140 r hainan_mgcg_cgcg_init +ffffffff82a4e4b0 r verde_rlc_save_restore_register_list +ffffffff82a4e820 r si_cs_data +ffffffff82a4e840 r si_SECT_CONTEXT_defs +ffffffff82a4e8c0 r si_SECT_CONTEXT_def_1 +ffffffff82a4ec10 r si_SECT_CONTEXT_def_3 +ffffffff82a4ec30 r si_SECT_CONTEXT_def_4 +ffffffff82a4eea4 r si_SECT_CONTEXT_def_5 +ffffffff82a4eea8 r si_SECT_CONTEXT_def_6 +ffffffff82a4eeb0 r si_SECT_CONTEXT_def_2 +ffffffff82a4f2f0 r si_SECT_CONTEXT_def_7 +ffffffff82a4f6a0 r mc_cg_registers +ffffffff82a4f6d0 r si_default_state +ffffffff82a50000 r cac_weights_tahiti +ffffffff82a504d0 r lcac_tahiti +ffffffff82a50ba0 r cac_override_tahiti +ffffffff82a50bb4 r powertune_data_tahiti +ffffffff82a50bf0 r dte_data_tahiti +ffffffff82a50cc0 r dte_data_new_zealand +ffffffff82a50d90 r dte_data_malta +ffffffff82a50e60 r lcac_pitcairn +ffffffff82a51530 r cac_override_pitcairn +ffffffff82a51544 r powertune_data_pitcairn +ffffffff82a51580 r lcac_cape_verde +ffffffff82a519d0 r cac_override_cape_verde +ffffffff82a519e4 r powertune_data_cape_verde +ffffffff82a51a20 r cac_weights_cape_verde_pro +ffffffff82a51ef0 r cac_weights_heathrow +ffffffff82a523c0 r cac_weights_chelsea_xt +ffffffff82a52890 r cac_weights_chelsea_pro +ffffffff82a52d60 r cac_weights_cape_verde +ffffffff82a53230 r cac_weights_mars_pro +ffffffff82a53700 r lcac_mars_pro +ffffffff82a53a60 r cac_override_oland +ffffffff82a53a74 r powertune_data_mars_pro +ffffffff82a53ab0 r cac_weights_mars_xt +ffffffff82a53f80 r cac_weights_oland_pro +ffffffff82a54450 r cac_weights_oland_xt +ffffffff82a54920 r lcac_oland +ffffffff82a54c7c r powertune_data_oland +ffffffff82a54cb8 r dte_data_oland +ffffffff82a54d90 r cac_weights_hainan +ffffffff82a55254 r powertune_data_hainan +ffffffff82a55290 r dte_data_aruba_pro +ffffffff82a55360 r dte_data_tahiti_pro +ffffffff82a55430 r dte_data_curacao_pro +ffffffff82a55500 r dte_data_neptune_xt +ffffffff82a555d0 r dte_data_sun_xt +ffffffff82a556a0 r dte_data_venus_xtx +ffffffff82a55770 r dte_data_venus_xt +ffffffff82a55840 r dte_data_venus_pro +ffffffff82a55910 r dte_data_mars_pro +ffffffff82a56000 r si_program_jump_on_start.data +ffffffff82a57000 r sumo_dtc +ffffffff82a58000 r trinity_mgcg_shls_default +ffffffff82a58380 r trinity_sysls_enable +ffffffff82a58450 r trinity_sysls_disable +ffffffff82a5a000 r GC_BASE +ffffffff82a5a0a8 r HDP_BASE +ffffffff82a5a150 r MMHUB_BASE +ffffffff82a5a1f8 r ATHUB_BASE +ffffffff82a5a2a0 r NBIO_BASE +ffffffff82a5a348 r MP0_BASE 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amdgpu_connector_vga_helper_funcs +ffffffff82a630a0 r amdgpu_connector_dvi_helper_funcs +ffffffff82a630f0 r amdgpu_connector_lvds_helper_funcs +ffffffff82a63140 r amdgpu_connector_dp_funcs +ffffffff82a631c0 r amdgpu_connector_add_common_modes.common_modes +ffffffff82a63248 r amdgpu_connector_edp_funcs +ffffffff82a632c0 r amdgpu_connector_vga_funcs +ffffffff82a63338 r amdgpu_connector_dvi_funcs +ffffffff82a633b0 r amdgpu_connector_lvds_funcs +ffffffff82a65000 R amdgpu_ctx_num_entities +ffffffff82a66000 r amdgpu_kms_driver +ffffffff82a660f0 r amdgpu_device_ip_reinit_late_sriov.ip_order +ffffffff82a67000 r hw_id_map +ffffffff82a67090 r hw_id_names +ffffffff82a68000 r hpd_names +ffffffff82a68030 r encoder_names +ffffffff82a68180 r dcc_retile_formats +ffffffff82a68270 r dcc_formats +ffffffff82a68360 R amdgpu_mode_funcs +ffffffff82a683b0 r amdgpu_underscan_enum_list +ffffffff82a683e0 r amdgpu_audio_enum_list +ffffffff82a68410 r amdgpu_dither_enum_list +ffffffff82a68430 r amdgpu_fb_funcs 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gfx10_SECT_CONTEXT_def_4 -ffffffff82a8ac08 r gfx10_SECT_CONTEXT_def_5 -ffffffff82a8ac10 r gfx10_SECT_CONTEXT_def_6 -ffffffff82a8ac20 r gfx10_SECT_CONTEXT_def_2 -ffffffff82a8b060 r gfx10_SECT_CONTEXT_def_7 -ffffffff82a8b170 r gfx10_SECT_CONTEXT_def_8 -ffffffff82a8b4a0 r gfx_v10_0_gfx_funcs -ffffffff82a8b4e0 r golden_settings_gc_rlc_spm_10_0_nv10 -ffffffff82a91780 r golden_settings_gc_rlc_spm_10_1_nv14 -ffffffff82a951a0 r golden_settings_gc_rlc_spm_10_1_2_nv12 -ffffffff82a9b440 r golden_settings_gc_10_1 -ffffffff82a9b800 r golden_settings_gc_10_0_nv10 -ffffffff82a9b800 r golden_settings_gc_10_1_1 -ffffffff82a9bb90 r golden_settings_gc_10_1_2 -ffffffff82a9bb90 r golden_settings_gc_10_1_nv14 -ffffffff82a9bf80 r golden_settings_gc_10_1_2_nv12 -ffffffff82a9bf80 r golden_settings_gc_10_3 -ffffffff82a9c388 r golden_settings_gc_10_3_sienna_cichlid -ffffffff82a9c390 r golden_settings_gc_10_3_2 -ffffffff82a9c780 r golden_settings_gc_10_3_vangogh -ffffffff82a9c9e0 r golden_settings_gc_10_3_3 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vi_SECT_CONTEXT_def_4 -ffffffff82aa0ce4 r vi_SECT_CONTEXT_def_5 -ffffffff82aa0cec r vi_SECT_CONTEXT_def_6 -ffffffff82aa0cf0 r vi_SECT_CONTEXT_def_2 -ffffffff82aa1140 r vi_SECT_CONTEXT_def_7 -ffffffff82aa14f0 r vgpr_init_compute_shader -ffffffff82aa1600 r vgpr_init_regs -ffffffff82aa1690 r sgpr1_init_regs -ffffffff82aa1720 r sgpr2_init_regs -ffffffff82aa17b0 r sec_ded_counter_registers -ffffffff82aa1820 r iceland_mgcg_cgcg_init -ffffffff82aa1b20 r golden_settings_iceland_a11 -ffffffff82aa1be0 r iceland_golden_common_all -ffffffff82aa1c40 r fiji_mgcg_cgcg_init -ffffffff82aa1df0 r golden_settings_fiji_a10 -ffffffff82aa1e80 r fiji_golden_common_all -ffffffff82aa1f00 r tonga_mgcg_cgcg_init -ffffffff82aa2290 r golden_settings_tonga_a11 -ffffffff82aa2350 r tonga_golden_common_all -ffffffff82aa23b0 r golden_settings_vegam_a11 -ffffffff82aa2480 r vegam_golden_common_all -ffffffff82aa24d0 r golden_settings_polaris11_a11 -ffffffff82aa25a0 r polaris11_golden_common_all -ffffffff82aa25f0 r golden_settings_polaris10_a11 -ffffffff82aa26c0 r polaris10_golden_common_all -ffffffff82aa2720 r cz_mgcg_cgcg_init -ffffffff82aa2ab0 r cz_golden_settings_a11 -ffffffff82aa2b40 r cz_golden_common_all -ffffffff82aa2ba0 r stoney_mgcg_cgcg_init -ffffffff82aa2be0 r stoney_golden_settings_a11 -ffffffff82aa2c60 r stoney_golden_common_all -ffffffff82aa3000 R gfx_v9_0_ras_ops -ffffffff82aa3040 r gfx_v9_0_ip_funcs -ffffffff82aa30e0 R gfx_v9_0_ip_block -ffffffff82aa3100 r ras_gfx_subblocks -ffffffff82aa3b80 r gfx_v9_0_edc_counter_regs -ffffffff82aa3f20 r gfx_v9_0_ras_fields -ffffffff82aa5000 r gfx_v9_0_kiq_pm4_funcs -ffffffff82aa5040 r gfx_v9_0_ring_funcs_kiq -ffffffff82aa5160 r gfx_v9_0_ring_funcs_gfx -ffffffff82aa5280 r gfx_v9_0_ring_funcs_compute -ffffffff82aa53a0 r gfx_v9_0_eop_irq_funcs -ffffffff82aa53b0 r gfx_v9_0_priv_reg_irq_funcs -ffffffff82aa53c0 r gfx_v9_0_priv_inst_irq_funcs -ffffffff82aa53d0 r gfx_v9_0_cp_ecc_error_irq_funcs -ffffffff82aa53e0 r gfx_v9_0_rlc_funcs -ffffffff82aa5450 r gfx9_cs_data -ffffffff82aa5470 r gfx9_SECT_CONTEXT_defs -ffffffff82aa5500 r gfx9_SECT_CONTEXT_def_1 -ffffffff82aa5850 r gfx9_SECT_CONTEXT_def_3 -ffffffff82aa5860 r gfx9_SECT_CONTEXT_def_4 -ffffffff82aa5ad4 r gfx9_SECT_CONTEXT_def_5 -ffffffff82aa5adc r gfx9_SECT_CONTEXT_def_6 -ffffffff82aa5ae0 r gfx9_SECT_CONTEXT_def_7 -ffffffff82aa5bf0 r gfx9_SECT_CONTEXT_def_2 -ffffffff82aa6060 r gfx9_SECT_CONTEXT_def_8 -ffffffff82aa62d0 r vgpr_init_compute_shader_arcturus -ffffffff82aa6b60 r vgpr_init_regs_arcturus -ffffffff82aa6cf0 r vgpr_init_regs -ffffffff82aa6e80 r sgpr1_init_regs -ffffffff82aa7010 r sgpr2_init_regs -ffffffff82aa7198 r gfx_v9_0_gfx_funcs -ffffffff82aa71e0 r golden_settings_gc_9_0 -ffffffff82aa73c0 r golden_settings_gc_9_0_vg10 -ffffffff82aa7570 r golden_settings_gc_9_2_1 -ffffffff82aa76f0 r golden_settings_gc_9_2_1_vg12 -ffffffff82aa7830 r golden_settings_gc_9_0_vg20 -ffffffff82aa7940 r golden_settings_gc_9_4_1_arct -ffffffff82aa7a50 r golden_settings_gc_9_1 -ffffffff82aa7c90 r golden_settings_gc_9_1_rv2 -ffffffff82aa7e60 r golden_settings_gc_9_1_rv1 -ffffffff82aa7f10 r golden_settings_gc_9_1_rn -ffffffff82aa8030 r golden_settings_gc_9_x_common -ffffffff82aa9000 R gfx_v9_4_ras_ops -ffffffff82aa9040 r gfx_v9_4_edc_counter_regs -ffffffff82aa9420 r gfx_v9_4_ras_fields -ffffffff82aab000 R vgpr_init_regs_aldebaran -ffffffff82aab1b0 R sgpr112_init_regs_aldebaran -ffffffff82aab360 R sgpr96_init_regs_aldebaran -ffffffff82aab510 R sgpr64_init_regs_aldebaran -ffffffff82aab6c0 r golden_settings_gc_9_4_2_alde -ffffffff82aab720 r golden_settings_gc_9_4_2_alde_die_0 -ffffffff82aab7b0 r golden_settings_gc_9_4_2_alde_die_1 -ffffffff82aab840 r sgpr112_init_compute_shader_aldebaran -ffffffff82aaba60 r sgpr96_init_compute_shader_aldebaran -ffffffff82aabc50 r sgpr64_init_compute_shader_aldebaran -ffffffff82aabdc0 r vgpr_init_compute_shader_aldebaran -ffffffff82aac6a0 r gfx_v9_4_2_edc_counter_regs -ffffffff82aaca20 r gfx_v9_4_2_ras_fields -ffffffff82aae3c0 r gfx_v9_4_2_utc_blocks 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dce_v11_0_pageflip_irq_funcs +ffffffff82a87310 r dce_v11_0_hpd_irq_funcs +ffffffff82a87320 r interrupt_status_offsets +ffffffff82a87380 r dce_v11_0_crtc_funcs +ffffffff82a87440 r dce_v11_0_crtc_helper_funcs +ffffffff82a874c0 r vga_control_regs +ffffffff82a874e0 r dig_offsets +ffffffff82a87510 r cz_mgcg_cgcg_init +ffffffff82a87530 r cz_golden_settings_a11 +ffffffff82a87550 r stoney_golden_settings_a11 +ffffffff82a87570 r polaris11_golden_settings_a11 +ffffffff82a875b0 r polaris10_golden_settings_a11 +ffffffff82a88000 R df_v1_7_funcs +ffffffff82a88070 r df_v1_7_channel_number +ffffffff82a89000 R df_v3_6_funcs +ffffffff82a89070 r df_v3_6_channel_number +ffffffff82a8a000 r GC_BASE +ffffffff82a8a0a8 r HDP_BASE +ffffffff82a8a150 r MMHUB_BASE +ffffffff82a8a1f8 r ATHUB_BASE +ffffffff82a8a2a0 r NBIO_BASE +ffffffff82a8a348 r MP0_BASE +ffffffff82a8a3f0 r MP1_BASE +ffffffff82a8a498 r VCN0_BASE +ffffffff82a8a540 r DF_BASE +ffffffff82a8a5e8 r DCN_BASE +ffffffff82a8a690 r OSSSYS_BASE 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gfx_v8_0_ip_funcs +ffffffff82aa10a0 R gfx_v8_0_ip_block +ffffffff82aa10b8 R gfx_v8_1_ip_block +ffffffff82aa10d0 r gfx_v8_0_gfx_funcs +ffffffff82aa1110 r gfx_v8_0_ring_funcs_kiq +ffffffff82aa1230 r gfx_v8_0_ring_funcs_gfx +ffffffff82aa1350 r gfx_v8_0_ring_funcs_compute +ffffffff82aa1470 r amdgpu_gds_reg_offset +ffffffff82aa1570 r gfx_v8_0_eop_irq_funcs +ffffffff82aa1580 r gfx_v8_0_priv_reg_irq_funcs +ffffffff82aa1590 r gfx_v8_0_priv_inst_irq_funcs +ffffffff82aa15a0 r gfx_v8_0_cp_ecc_error_irq_funcs +ffffffff82aa15b0 r gfx_v8_0_sq_irq_funcs +ffffffff82aa15c0 r sq_edc_source_names +ffffffff82aa15f8 r iceland_rlc_funcs +ffffffff82aa1660 r vi_cs_data +ffffffff82aa1680 r vi_SECT_CONTEXT_defs +ffffffff82aa1700 r vi_SECT_CONTEXT_def_1 +ffffffff82aa1a50 r vi_SECT_CONTEXT_def_3 +ffffffff82aa1a70 r vi_SECT_CONTEXT_def_4 +ffffffff82aa1ce4 r vi_SECT_CONTEXT_def_5 +ffffffff82aa1cec r vi_SECT_CONTEXT_def_6 +ffffffff82aa1cf0 r vi_SECT_CONTEXT_def_2 +ffffffff82aa2140 r vi_SECT_CONTEXT_def_7 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cz_golden_common_all +ffffffff82aa3ba0 r stoney_mgcg_cgcg_init +ffffffff82aa3be0 r stoney_golden_settings_a11 +ffffffff82aa3c60 r stoney_golden_common_all +ffffffff82aa4000 R gfx_v9_0_ras_ops +ffffffff82aa4040 r gfx_v9_0_ip_funcs +ffffffff82aa40e0 R gfx_v9_0_ip_block +ffffffff82aa4100 r ras_gfx_subblocks +ffffffff82aa4b80 r gfx_v9_0_edc_counter_regs +ffffffff82aa4f20 r gfx_v9_0_ras_fields +ffffffff82aa6000 r gfx_v9_0_kiq_pm4_funcs +ffffffff82aa6040 r gfx_v9_0_ring_funcs_kiq +ffffffff82aa6160 r gfx_v9_0_ring_funcs_gfx +ffffffff82aa6280 r gfx_v9_0_ring_funcs_compute +ffffffff82aa63a0 r gfx_v9_0_eop_irq_funcs +ffffffff82aa63b0 r gfx_v9_0_priv_reg_irq_funcs +ffffffff82aa63c0 r gfx_v9_0_priv_inst_irq_funcs +ffffffff82aa63d0 r gfx_v9_0_cp_ecc_error_irq_funcs +ffffffff82aa63e0 r gfx_v9_0_rlc_funcs +ffffffff82aa6450 r gfx9_cs_data +ffffffff82aa6470 r gfx9_SECT_CONTEXT_defs +ffffffff82aa6500 r gfx9_SECT_CONTEXT_def_1 +ffffffff82aa6850 r gfx9_SECT_CONTEXT_def_3 +ffffffff82aa6860 r gfx9_SECT_CONTEXT_def_4 +ffffffff82aa6ad4 r gfx9_SECT_CONTEXT_def_5 +ffffffff82aa6adc r gfx9_SECT_CONTEXT_def_6 +ffffffff82aa6ae0 r gfx9_SECT_CONTEXT_def_7 +ffffffff82aa6bf0 r gfx9_SECT_CONTEXT_def_2 +ffffffff82aa7060 r gfx9_SECT_CONTEXT_def_8 +ffffffff82aa72d0 r vgpr_init_compute_shader_arcturus +ffffffff82aa7b60 r vgpr_init_regs_arcturus +ffffffff82aa7cf0 r vgpr_init_regs +ffffffff82aa7e80 r sgpr1_init_regs +ffffffff82aa8010 r sgpr2_init_regs +ffffffff82aa8198 r gfx_v9_0_gfx_funcs +ffffffff82aa81e0 r golden_settings_gc_9_0 +ffffffff82aa83c0 r golden_settings_gc_9_0_vg10 +ffffffff82aa8570 r golden_settings_gc_9_2_1 +ffffffff82aa86f0 r golden_settings_gc_9_2_1_vg12 +ffffffff82aa8830 r golden_settings_gc_9_0_vg20 +ffffffff82aa8940 r golden_settings_gc_9_4_1_arct +ffffffff82aa8a50 r golden_settings_gc_9_1 +ffffffff82aa8c90 r golden_settings_gc_9_1_rv2 +ffffffff82aa8e60 r golden_settings_gc_9_1_rv1 +ffffffff82aa8f10 r golden_settings_gc_9_1_rn +ffffffff82aa9030 r golden_settings_gc_9_x_common +ffffffff82aaa000 R gfx_v9_4_ras_ops +ffffffff82aaa040 r gfx_v9_4_edc_counter_regs +ffffffff82aaa420 r gfx_v9_4_ras_fields +ffffffff82aac000 R vgpr_init_regs_aldebaran +ffffffff82aac1b0 R sgpr112_init_regs_aldebaran +ffffffff82aac360 R sgpr96_init_regs_aldebaran +ffffffff82aac510 R sgpr64_init_regs_aldebaran +ffffffff82aac6c0 r golden_settings_gc_9_4_2_alde +ffffffff82aac720 r golden_settings_gc_9_4_2_alde_die_0 +ffffffff82aac7b0 r golden_settings_gc_9_4_2_alde_die_1 +ffffffff82aac840 r sgpr112_init_compute_shader_aldebaran +ffffffff82aaca60 r sgpr96_init_compute_shader_aldebaran +ffffffff82aacc50 r sgpr64_init_compute_shader_aldebaran +ffffffff82aacdc0 r vgpr_init_compute_shader_aldebaran +ffffffff82aad6a0 r gfx_v9_4_2_edc_counter_regs +ffffffff82aada20 r gfx_v9_4_2_ras_fields +ffffffff82aaf3c0 r gfx_v9_4_2_utc_blocks +ffffffff82ab0000 R gfxhub_v1_0_funcs +ffffffff82ab1000 R gfxhub_v2_0_funcs +ffffffff82ab1060 r gfxhub_v2_0_vmhub_funcs ffffffff82ab1070 r gfxhub_client_ids -ffffffff82ab2000 R gfxhub_v3_0_funcs -ffffffff82ab2060 r gfxhub_v3_0_vmhub_funcs +ffffffff82ab2000 R gfxhub_v2_1_funcs +ffffffff82ab2060 r gfxhub_v2_1_vmhub_funcs ffffffff82ab2070 r gfxhub_client_ids -ffffffff82ab3000 R gfxhub_v3_0_3_funcs -ffffffff82ab3060 r gfxhub_v3_0_3_vmhub_funcs +ffffffff82ab3000 R gfxhub_v3_0_funcs +ffffffff82ab3060 r gfxhub_v3_0_vmhub_funcs ffffffff82ab3070 r gfxhub_client_ids -ffffffff82ab4000 R gmc_v10_0_ip_funcs -ffffffff82ab40a0 R gmc_v10_0_ip_block -ffffffff82ab40b8 r gmc_v10_0_gmc_funcs -ffffffff82ab4100 r gmc_v10_0_irq_funcs -ffffffff82ab4110 r gmc_v10_0_ecc_funcs -ffffffff82ab5000 R gmc_v11_0_ip_funcs -ffffffff82ab50a0 R gmc_v11_0_ip_block -ffffffff82ab50b8 r gmc_v11_0_gmc_funcs -ffffffff82ab5100 r gmc_v11_0_irq_funcs -ffffffff82ab5110 r gmc_v11_0_ecc_funcs -ffffffff82ab6000 r gmc_v7_0_ip_funcs -ffffffff82ab60a0 R gmc_v7_0_ip_block -ffffffff82ab60b8 R gmc_v7_4_ip_block -ffffffff82ab60d0 r gmc_v7_0_gmc_funcs -ffffffff82ab6118 r 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jpeg_v4_0_ip_block -ffffffff82ac80b8 r jpeg_v4_0_dec_ring_vm_funcs -ffffffff82ac81d8 r jpeg_v4_0_irq_funcs -ffffffff82ac9000 R lsdma_v6_0_funcs -ffffffff82aca000 R mca_v3_0_mp0_hw_ops -ffffffff82aca040 R mca_v3_0_mp1_hw_ops -ffffffff82aca080 R mca_v3_0_mpio_hw_ops -ffffffff82aca0c0 R mca_v3_0_funcs -ffffffff82acb000 r mes_v10_1_ip_funcs -ffffffff82acb0a0 R mes_v10_1_ip_block -ffffffff82acb0b8 r mes_v10_1_funcs -ffffffff82acb0e8 r mes_v10_1_ring_funcs -ffffffff82acc000 r mes_v11_0_ip_funcs -ffffffff82acc0a0 R mes_v11_0_ip_block -ffffffff82acc0b8 r mes_v11_0_funcs -ffffffff82acc0e8 r mes_v11_0_ring_funcs -ffffffff82acd000 R mmhub_v1_0_funcs -ffffffff82acd050 r mmhub_v1_0_edc_cnt_regs -ffffffff82acd0c0 r mmhub_v1_0_ras_fields -ffffffff82ace000 R mmhub_v1_7_funcs -ffffffff82ace050 r mmhub_v1_7_edc_cnt_regs -ffffffff82ace250 r mmhub_v1_7_ras_fields -ffffffff82acf9c0 r mmhub_v1_7_ea_err_status_regs -ffffffff82ad0000 R mmhub_v2_0_funcs -ffffffff82ad0050 r mmhub_v2_0_vmhub_funcs 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nbio_v6_1_funcs -ffffffff82adf000 R nbio_v7_0_hdp_flush_reg -ffffffff82adf048 R nbio_v7_0_funcs -ffffffff82ae0000 R nbio_v7_2_hdp_flush_reg -ffffffff82ae0048 R nbio_v7_2_funcs -ffffffff82ae1000 R nbio_v7_4_hdp_flush_reg -ffffffff82ae1048 R nbio_v7_4_ras_hw_ops -ffffffff82ae1088 R nbio_v7_4_funcs -ffffffff82ae1170 r nbio_v7_4_ras_controller_irq_funcs -ffffffff82ae1180 r nbio_v7_4_ras_err_event_athub_irq_funcs -ffffffff82ae2000 R nbio_v7_7_hdp_flush_reg -ffffffff82ae2048 R nbio_v7_7_funcs -ffffffff82ae3000 r nv_common_ip_funcs -ffffffff82ae30a0 R nv_common_ip_block -ffffffff82ae30b8 r nv_asic_funcs -ffffffff82ae3170 r nv_allowed_read_registers -ffffffff82ae32f0 r nv_video_codecs_encode -ffffffff82ae3300 r sc_video_codecs_decode -ffffffff82ae3310 r yc_video_codecs_decode -ffffffff82ae3320 r bg_video_codecs_encode -ffffffff82ae3330 r bg_video_codecs_decode -ffffffff82ae3340 r nv_video_codecs_decode -ffffffff82ae3350 r nv_video_codecs_encode_array -ffffffff82ae3380 r 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jpeg_v3_0_dec_ring_vm_funcs +ffffffff82ac81d8 r jpeg_v3_0_irq_funcs +ffffffff82ac9000 r jpeg_v4_0_ip_funcs +ffffffff82ac90a0 R jpeg_v4_0_ip_block +ffffffff82ac90b8 r jpeg_v4_0_dec_ring_vm_funcs +ffffffff82ac91d8 r jpeg_v4_0_irq_funcs +ffffffff82aca000 R lsdma_v6_0_funcs +ffffffff82acb000 R mca_v3_0_mp0_hw_ops +ffffffff82acb040 R mca_v3_0_mp1_hw_ops +ffffffff82acb080 R mca_v3_0_mpio_hw_ops +ffffffff82acb0c0 R mca_v3_0_funcs +ffffffff82acc000 r mes_v10_1_ip_funcs +ffffffff82acc0a0 R mes_v10_1_ip_block +ffffffff82acc0b8 r mes_v10_1_funcs +ffffffff82acc0e8 r mes_v10_1_ring_funcs +ffffffff82acd000 r mes_v11_0_ip_funcs +ffffffff82acd0a0 R mes_v11_0_ip_block +ffffffff82acd0b8 r mes_v11_0_funcs +ffffffff82acd0e8 r mes_v11_0_ring_funcs +ffffffff82ace000 R mmhub_v1_0_funcs +ffffffff82ace050 r mmhub_v1_0_edc_cnt_regs +ffffffff82ace0c0 r mmhub_v1_0_ras_fields +ffffffff82acf000 R mmhub_v1_7_funcs +ffffffff82acf050 r mmhub_v1_7_edc_cnt_regs +ffffffff82acf250 r mmhub_v1_7_ras_fields +ffffffff82ad09c0 r mmhub_v1_7_ea_err_status_regs +ffffffff82ad1000 R mmhub_v2_0_funcs +ffffffff82ad1050 r mmhub_v2_0_vmhub_funcs +ffffffff82ad1060 r mmhub_client_ids_navi1x +ffffffff82ad1190 r mmhub_client_ids_sienna_cichlid +ffffffff82ad1450 r mmhub_client_ids_beige_goby +ffffffff82ad2000 R mmhub_v2_3_funcs +ffffffff82ad2050 r mmhub_v2_3_vmhub_funcs +ffffffff82ad2060 r mmhub_client_ids_vangogh +ffffffff82ad3000 R mmhub_v3_0_funcs +ffffffff82ad3050 r mmhub_v3_0_vmhub_funcs +ffffffff82ad3060 r mmhub_client_ids_v3_0_0 +ffffffff82ad4000 R mmhub_v3_0_1_funcs +ffffffff82ad4050 r mmhub_v3_0_1_vmhub_funcs +ffffffff82ad4060 r mmhub_client_ids_v3_0_1 +ffffffff82ad5000 R mmhub_v3_0_2_funcs +ffffffff82ad5050 r mmhub_v3_0_2_vmhub_funcs +ffffffff82ad5060 r mmhub_client_ids_v3_0_2 +ffffffff82ad6000 R mmhub_v9_4_ras_hw_ops +ffffffff82ad6040 R mmhub_v9_4_funcs +ffffffff82ad6090 r mmhub_v9_4_edc_cnt_regs +ffffffff82ad6330 r mmhub_v9_4_ras_fields +ffffffff82ad83b0 r mmhub_v9_4_err_status_regs +ffffffff82ad9000 r xgpu_ai_mailbox_ack_irq_funcs +ffffffff82ad9010 r xgpu_ai_mailbox_rcv_irq_funcs +ffffffff82ad9020 R xgpu_ai_virt_ops +ffffffff82ada000 r xgpu_nv_mailbox_ack_irq_funcs +ffffffff82ada010 r xgpu_nv_mailbox_rcv_irq_funcs +ffffffff82ada020 R xgpu_nv_virt_ops +ffffffff82adb000 r xgpu_fiji_mgcg_cgcg_init +ffffffff82adb240 r xgpu_fiji_golden_settings_a10 +ffffffff82adb370 r xgpu_fiji_golden_common_all +ffffffff82adb3f0 r xgpu_tonga_mgcg_cgcg_init +ffffffff82adb810 r xgpu_tonga_golden_settings_a11 +ffffffff82adb9d0 r xgpu_tonga_golden_common_all +ffffffff82adba28 r xgpu_vi_mailbox_ack_irq_funcs +ffffffff82adba38 r xgpu_vi_mailbox_rcv_irq_funcs +ffffffff82adba48 R xgpu_vi_virt_ops +ffffffff82adc000 r navi10_ih_ip_funcs +ffffffff82adc0a0 R navi10_ih_ip_block +ffffffff82adc0b8 r navi10_ih_funcs +ffffffff82adc0d8 r navi10_ih_self_irq_funcs +ffffffff82add000 R nbio_v2_3_hdp_flush_reg +ffffffff82add048 R nbio_v2_3_funcs +ffffffff82ade000 R nbio_v4_3_hdp_flush_reg +ffffffff82ade048 R nbio_v4_3_funcs +ffffffff82ade130 R nbio_v4_3_sriov_funcs +ffffffff82adf000 R nbio_v6_1_hdp_flush_reg +ffffffff82adf048 R nbio_v6_1_funcs +ffffffff82ae0000 R nbio_v7_0_hdp_flush_reg +ffffffff82ae0048 R nbio_v7_0_funcs +ffffffff82ae1000 R nbio_v7_2_hdp_flush_reg +ffffffff82ae1048 R nbio_v7_2_funcs +ffffffff82ae2000 R nbio_v7_4_hdp_flush_reg +ffffffff82ae2048 R nbio_v7_4_ras_hw_ops +ffffffff82ae2088 R nbio_v7_4_funcs +ffffffff82ae2170 r nbio_v7_4_ras_controller_irq_funcs +ffffffff82ae2180 r nbio_v7_4_ras_err_event_athub_irq_funcs +ffffffff82ae3000 R nbio_v7_7_hdp_flush_reg +ffffffff82ae3048 R nbio_v7_7_funcs +ffffffff82ae4000 r nv_common_ip_funcs +ffffffff82ae40a0 R nv_common_ip_block +ffffffff82ae40b8 r nv_asic_funcs +ffffffff82ae4170 r nv_allowed_read_registers +ffffffff82ae42f0 r nv_video_codecs_encode +ffffffff82ae4300 r sc_video_codecs_decode +ffffffff82ae4310 r yc_video_codecs_decode +ffffffff82ae4320 r bg_video_codecs_encode +ffffffff82ae4330 r bg_video_codecs_decode +ffffffff82ae4340 r nv_video_codecs_decode +ffffffff82ae4350 r nv_video_codecs_encode_array +ffffffff82ae4380 r sc_video_codecs_decode_array +ffffffff82ae4420 r yc_video_codecs_decode_array +ffffffff82ae4490 r bg_video_codecs_decode_array +ffffffff82ae44d0 r nv_video_codecs_decode_array +ffffffff82ae5000 r psp_v10_0_funcs +ffffffff82ae6000 r psp_v11_0_funcs +ffffffff82ae7000 r psp_v11_0_8_funcs +ffffffff82ae8000 r psp_v12_0_funcs +ffffffff82ae9000 r psp_v13_0_funcs +ffffffff82aea000 r psp_v13_0_4_funcs +ffffffff82aeb000 r psp_v3_1_funcs +ffffffff82aec000 r sdma_v2_4_ip_funcs +ffffffff82aec0a0 R sdma_v2_4_ip_block +ffffffff82aec0b8 r sdma_v2_4_ring_funcs +ffffffff82aec1d8 r sdma_v2_4_buffer_funcs +ffffffff82aec1f8 r sdma_v2_4_vm_pte_funcs +ffffffff82aec218 r sdma_v2_4_trap_irq_funcs +ffffffff82aec228 r sdma_v2_4_illegal_inst_irq_funcs +ffffffff82aec240 r iceland_mgcg_cgcg_init +ffffffff82aec260 r golden_settings_iceland_a11 +ffffffff82aed000 r sdma_v3_0_ip_funcs +ffffffff82aed0a0 R sdma_v3_0_ip_block +ffffffff82aed0b8 R sdma_v3_1_ip_block +ffffffff82aed0d0 r sdma_v3_0_ring_funcs +ffffffff82aed1f0 r sdma_v3_0_buffer_funcs +ffffffff82aed210 r sdma_v3_0_vm_pte_funcs +ffffffff82aed230 r sdma_v3_0_trap_irq_funcs +ffffffff82aed240 r sdma_v3_0_illegal_inst_irq_funcs +ffffffff82aed250 r fiji_mgcg_cgcg_init +ffffffff82aed270 r golden_settings_fiji_a10 +ffffffff82aed2d0 r tonga_mgcg_cgcg_init +ffffffff82aed2f0 r golden_settings_tonga_a11 +ffffffff82aed370 r golden_settings_polaris11_a11 +ffffffff82aed3f0 r golden_settings_polaris10_a11 +ffffffff82aed470 r cz_mgcg_cgcg_init +ffffffff82aed490 r cz_golden_settings_a11 +ffffffff82aed520 r stoney_mgcg_cgcg_init +ffffffff82aed530 r stoney_golden_settings_a11 +ffffffff82aee000 R sdma_v4_0_ip_funcs +ffffffff82aee0a0 R sdma_v4_0_ras_hw_ops +ffffffff82aee0e0 R sdma_v4_0_ip_block +ffffffff82aee0f8 r sdma_v4_0_ring_funcs_2nd_mmhub +ffffffff82aee218 r sdma_v4_0_ring_funcs +ffffffff82aee338 r sdma_v4_0_page_ring_funcs_2nd_mmhub +ffffffff82aee458 r sdma_v4_0_page_ring_funcs +ffffffff82aee578 r sdma_v4_0_buffer_funcs +ffffffff82aee598 r sdma_v4_0_vm_pte_funcs +ffffffff82aee5b8 r sdma_v4_0_trap_irq_funcs +ffffffff82aee5c8 r sdma_v4_0_illegal_inst_irq_funcs +ffffffff82aee5d8 r sdma_v4_0_ecc_irq_funcs +ffffffff82aee5e8 r sdma_v4_0_vm_hole_irq_funcs +ffffffff82aee5f8 r sdma_v4_0_doorbell_invalid_irq_funcs +ffffffff82aee608 r sdma_v4_0_pool_timeout_irq_funcs +ffffffff82aee618 r sdma_v4_0_srbm_write_irq_funcs +ffffffff82aee630 r golden_settings_sdma_4 +ffffffff82aee890 r golden_settings_sdma_vg10 +ffffffff82aee940 r golden_settings_sdma_vg12 +ffffffff82aee9f0 r golden_settings_sdma0_4_2_init +ffffffff82aeea10 r golden_settings_sdma0_4_2 +ffffffff82aeeca0 r golden_settings_sdma1_4_2 +ffffffff82aeef30 r golden_settings_sdma_arct +ffffffff82aef230 r golden_settings_sdma_aldebaran +ffffffff82aef3a0 r golden_settings_sdma_4_1 +ffffffff82aef4b0 r golden_settings_sdma_rv2 +ffffffff82aef4e0 r golden_settings_sdma_rv1 +ffffffff82aef510 r golden_settings_sdma_4_3 +ffffffff82aef600 r sdma_v4_0_ras_fields +ffffffff82af0000 R sdma_v4_4_ras_hw_ops +ffffffff82af0040 r sdma_v4_4_ras_fields +ffffffff82af1000 R sdma_v5_0_ip_funcs +ffffffff82af10a0 R sdma_v5_0_ip_block +ffffffff82af10b8 r sdma_v5_0_ring_funcs +ffffffff82af11d8 r sdma_v5_0_buffer_funcs +ffffffff82af11f8 r sdma_v5_0_vm_pte_funcs +ffffffff82af1218 r sdma_v5_0_trap_irq_funcs +ffffffff82af1228 r sdma_v5_0_illegal_inst_irq_funcs +ffffffff82af1240 r golden_settings_sdma_5 +ffffffff82af1480 r golden_settings_sdma_nv10 +ffffffff82af14b0 r golden_settings_sdma_nv14 +ffffffff82af14e0 r golden_settings_sdma_5_sriov +ffffffff82af16c0 r golden_settings_sdma_nv12 +ffffffff82af1750 r golden_settings_sdma_cyan_skillfish +ffffffff82af2000 R sdma_v5_2_ip_funcs +ffffffff82af20a0 R sdma_v5_2_ip_block +ffffffff82af20b8 r sdma_v5_2_ring_funcs +ffffffff82af21d8 r sdma_v5_2_buffer_funcs +ffffffff82af21f8 r sdma_v5_2_vm_pte_funcs +ffffffff82af2218 r sdma_v5_2_trap_irq_funcs +ffffffff82af2228 r sdma_v5_2_illegal_inst_irq_funcs +ffffffff82af3000 R sdma_v6_0_ip_funcs +ffffffff82af30a0 R sdma_v6_0_ip_block +ffffffff82af30b8 r sdma_v6_0_ring_funcs +ffffffff82af31d8 r sdma_v6_0_buffer_funcs +ffffffff82af31f8 r sdma_v6_0_vm_pte_funcs +ffffffff82af3218 r sdma_v6_0_trap_irq_funcs +ffffffff82af3228 r sdma_v6_0_illegal_inst_irq_funcs +ffffffff82af4000 r smu_v11_0_i2c_algo +ffffffff82af4010 r smu_v11_0_i2c_i2c_lock_ops +ffffffff82af4028 r smu_v11_0_i2c_control_quirks +ffffffff82af5000 R smuio_v11_0_funcs +ffffffff82af6000 R smuio_v11_0_6_funcs +ffffffff82af7000 R smuio_v13_0_funcs +ffffffff82af8000 R smuio_v13_0_6_funcs +ffffffff82af9000 R smuio_v9_0_funcs +ffffffff82afa000 r soc15_common_ip_funcs +ffffffff82afa0a0 R vega10_common_ip_block +ffffffff82afa0b8 r soc15_asic_funcs +ffffffff82afa170 r vega20_asic_funcs +ffffffff82afa230 r soc15_allowed_read_registers +ffffffff82afa3c0 r vega_video_codecs_encode +ffffffff82afa3d0 r vega_video_codecs_decode +ffffffff82afa3e0 r rv_video_codecs_decode +ffffffff82afa3f0 r rn_video_codecs_decode +ffffffff82afa400 r vega_video_codecs_encode_array +ffffffff82afa430 r vega_video_codecs_decode_array +ffffffff82afa4b0 r rv_video_codecs_decode_array +ffffffff82afa540 r rn_video_codecs_decode_array +ffffffff82afb000 r soc21_common_ip_funcs +ffffffff82afb0a0 R soc21_common_ip_block +ffffffff82afb0b8 r soc21_asic_funcs +ffffffff82afb170 r soc21_allowed_read_registers +ffffffff82afb2f0 r vcn_4_0_0_video_codecs_encode_vcn1 +ffffffff82afb300 r vcn_4_0_0_video_codecs_decode_vcn1 +ffffffff82afb310 r vcn_4_0_0_video_codecs_encode_vcn0 +ffffffff82afb320 r vcn_4_0_0_video_codecs_decode_vcn0 +ffffffff82afb330 r vcn_4_0_0_video_codecs_encode_array_vcn1 +ffffffff82afb360 r vcn_4_0_0_video_codecs_decode_array_vcn1 +ffffffff82afb3b0 r vcn_4_0_0_video_codecs_encode_array_vcn0 +ffffffff82afb3e0 r vcn_4_0_0_video_codecs_decode_array_vcn0 +ffffffff82afc000 r tonga_ih_ip_funcs +ffffffff82afc0a0 R tonga_ih_ip_block +ffffffff82afc0b8 r tonga_ih_funcs +ffffffff82afd000 R umc_v6_0_funcs +ffffffff82afe000 R umc_v6_1_channel_idx_tbl +ffffffff82afe080 R umc_v6_1_ras_hw_ops +ffffffff82aff000 R umc_v6_7_channel_idx_tbl_second +ffffffff82aff080 R umc_v6_7_channel_idx_tbl_first +ffffffff82aff100 R umc_v6_7_ras_hw_ops +ffffffff82b00000 R umc_v8_10_channelnum_map_colbit_table +ffffffff82b00040 R umc_v8_10_channel_idx_tbl +ffffffff82b000a0 R umc_v8_10_ras_hw_ops +ffffffff82b01000 R umc_v8_7_channel_idx_tbl +ffffffff82b01040 R umc_v8_7_ras_hw_ops +ffffffff82b02000 r uvd_v5_0_ip_funcs +ffffffff82b020a0 R uvd_v5_0_ip_block +ffffffff82b020b8 r uvd_v5_0_ring_funcs +ffffffff82b021d8 r uvd_v5_0_irq_funcs +ffffffff82b03000 r uvd_v6_0_ip_funcs +ffffffff82b030a0 R uvd_v6_0_ip_block +ffffffff82b030b8 R uvd_v6_2_ip_block +ffffffff82b030d0 R uvd_v6_3_ip_block +ffffffff82b030e8 r uvd_v6_0_ring_vm_funcs +ffffffff82b03208 r uvd_v6_0_ring_phys_funcs +ffffffff82b03328 r uvd_v6_0_enc_ring_vm_funcs +ffffffff82b03448 r uvd_v6_0_irq_funcs +ffffffff82b04000 R uvd_v7_0_ip_funcs +ffffffff82b040a0 R uvd_v7_0_ip_block +ffffffff82b040b8 r uvd_v7_0_ring_vm_funcs +ffffffff82b041d8 r uvd_v7_0_enc_ring_vm_funcs +ffffffff82b042f8 r uvd_v7_0_irq_funcs +ffffffff82b05000 r vce_v3_0_ip_funcs +ffffffff82b050a0 R vce_v3_0_ip_block +ffffffff82b050b8 R vce_v3_1_ip_block +ffffffff82b050d0 R vce_v3_4_ip_block +ffffffff82b050e8 r vce_v3_0_ring_vm_funcs +ffffffff82b05208 r vce_v3_0_ring_phys_funcs +ffffffff82b05328 r vce_v3_0_irq_funcs +ffffffff82b06000 R vce_v4_0_ip_funcs +ffffffff82b060a0 R vce_v4_0_ip_block +ffffffff82b060b8 r vce_v4_0_ring_vm_funcs +ffffffff82b061d8 r vce_v4_0_irq_funcs +ffffffff82b07000 r vcn_v1_0_ip_funcs +ffffffff82b070a0 R vcn_v1_0_ip_block +ffffffff82b070b8 r vcn_v1_0_dec_ring_vm_funcs +ffffffff82b071d8 r vcn_v1_0_enc_ring_vm_funcs +ffffffff82b072f8 r vcn_v1_0_irq_funcs +ffffffff82b08000 r vcn_v2_0_ip_funcs +ffffffff82b080a0 R vcn_v2_0_ip_block +ffffffff82b080b8 r vcn_v2_0_dec_ring_vm_funcs +ffffffff82b081d8 r vcn_v2_0_enc_ring_vm_funcs +ffffffff82b082f8 r vcn_v2_0_irq_funcs +ffffffff82b09000 r vcn_v2_5_ip_funcs +ffffffff82b090a0 R vcn_v2_5_ip_block +ffffffff82b090b8 r vcn_v2_6_ip_funcs +ffffffff82b09158 R vcn_v2_6_ip_block +ffffffff82b09170 R vcn_v2_6_ras_hw_ops +ffffffff82b091b0 r vcn_v2_5_dec_ring_vm_funcs +ffffffff82b092d0 r vcn_v2_6_dec_ring_vm_funcs +ffffffff82b093f0 r vcn_v2_5_enc_ring_vm_funcs +ffffffff82b09510 r vcn_v2_6_enc_ring_vm_funcs +ffffffff82b09630 r vcn_v2_5_irq_funcs +ffffffff82b0a000 r vcn_v3_0_ip_funcs +ffffffff82b0a0a0 R vcn_v3_0_ip_block +ffffffff82b0a0b8 r vcn_v3_0_dec_ring_vm_funcs +ffffffff82b0a1d8 r vcn_v3_0_enc_ring_vm_funcs +ffffffff82b0a2f8 r vcn_v3_0_irq_funcs +ffffffff82b0b000 r vcn_v4_0_ip_funcs +ffffffff82b0b0a0 R vcn_v4_0_ip_block +ffffffff82b0b0b8 r vcn_v4_0_unified_ring_vm_funcs +ffffffff82b0b1d8 r vcn_v4_0_irq_funcs +ffffffff82b0c000 R vega10_ih_ip_funcs +ffffffff82b0c0a0 R vega10_ih_ip_block +ffffffff82b0c0b8 r vega10_ih_funcs +ffffffff82b0c0d8 r vega10_ih_self_irq_funcs +ffffffff82b0d000 r GC_BASE +ffffffff82b0d064 r HDP_BASE +ffffffff82b0d0c8 r MMHUB_BASE +ffffffff82b0d12c r ATHUB_BASE +ffffffff82b0d190 r NBIO_BASE +ffffffff82b0d1f4 r MP0_BASE +ffffffff82b0d258 r MP1_BASE +ffffffff82b0d2bc r VCE_BASE +ffffffff82b0d320 r VCN_BASE +ffffffff82b0d384 r DF_BASE +ffffffff82b0d3e8 r DCE_BASE +ffffffff82b0d44c r OSSSYS_BASE +ffffffff82b0d4b0 r SDMA0_BASE +ffffffff82b0d514 r SDMA1_BASE +ffffffff82b0d578 r SMUIO_BASE +ffffffff82b0d5dc r PWR_BASE +ffffffff82b0d640 r NBIF_BASE +ffffffff82b0d6a4 r THM_BASE +ffffffff82b0d708 r CLK_BASE +ffffffff82b0e000 R vega20_ih_ip_funcs +ffffffff82b0e0a0 R vega20_ih_ip_block +ffffffff82b0e0b8 r vega20_ih_funcs +ffffffff82b0e0d8 r vega20_ih_self_irq_funcs +ffffffff82b0f000 r GC_BASE +ffffffff82b0f090 r HDP_BASE +ffffffff82b0f120 r MMHUB_BASE +ffffffff82b0f1b0 r ATHUB_BASE +ffffffff82b0f240 r NBIO_BASE +ffffffff82b0f2d0 r MP0_BASE +ffffffff82b0f360 r MP1_BASE +ffffffff82b0f3f0 r UVD_BASE +ffffffff82b0f480 r VCE_BASE +ffffffff82b0f510 r DF_BASE +ffffffff82b0f5a0 r DCE_BASE +ffffffff82b0f630 r OSSSYS_BASE +ffffffff82b0f6c0 r SDMA0_BASE +ffffffff82b0f750 r SDMA1_BASE +ffffffff82b0f7e0 r SMUIO_BASE +ffffffff82b0f870 r THM_BASE +ffffffff82b0f900 r CLK_BASE +ffffffff82b0f990 r UMC_BASE +ffffffff82b0fa20 r RSMU_BASE +ffffffff82b10000 r vi_common_ip_block +ffffffff82b10018 r vi_common_ip_funcs +ffffffff82b100b8 r vi_asic_funcs +ffffffff82b10170 r vi_allowed_read_registers +ffffffff82b103d0 r topaz_video_codecs_encode +ffffffff82b103e0 r topaz_video_codecs_decode +ffffffff82b103f0 r tonga_video_codecs_encode +ffffffff82b10400 r tonga_video_codecs_decode +ffffffff82b10410 r polaris_video_codecs_encode +ffffffff82b10420 r cz_video_codecs_decode +ffffffff82b10430 r tonga_video_codecs_encode_array +ffffffff82b10450 r tonga_video_codecs_decode_array +ffffffff82b104a0 r polaris_video_codecs_encode_array +ffffffff82b104d0 r cz_video_codecs_decode_array +ffffffff82b10550 r iceland_mgcg_cgcg_init +ffffffff82b10590 r fiji_mgcg_cgcg_init +ffffffff82b105f0 r tonga_mgcg_cgcg_init +ffffffff82b10650 r cz_mgcg_cgcg_init +ffffffff82b10690 r stoney_mgcg_cgcg_init +ffffffff82b11000 r amdgpu_dm_funcs +ffffffff82b110a0 R dm_ip_block +ffffffff82b110b8 R amdgpu_dm_encoder_helper_funcs +ffffffff82b11120 r dm_display_funcs +ffffffff82b11180 r hpd_disconnect_quirk_table +ffffffff82b11ef0 r amdgpu_dm_mode_funcs +ffffffff82b11f38 r amdgpu_dm_encoder_funcs +ffffffff82b11f58 r amdgpu_dm_connector_funcs +ffffffff82b11fd0 r amdgpu_dm_connector_helper_funcs +ffffffff82b12020 r amdgpu_dm_i2c_algo +ffffffff82b121f0 r add_fs_modes.common_rates +ffffffff82b12220 r amdgpu_dm_backlight_ops +ffffffff82b13000 r amdgpu_dm_crtc_funcs +ffffffff82b130c0 r amdgpu_dm_crtc_helper_funcs +ffffffff82b14000 r dm_dtn_log_begin.msg +ffffffff82b1400d r dm_dtn_log_end.msg +ffffffff82b14018 r SYNAPTICS_DEVICE_ID +ffffffff82b15000 r dm_crtc_irq_funcs +ffffffff82b15010 r dm_vline0_irq_funcs +ffffffff82b15020 r dm_dmub_outbox_irq_funcs +ffffffff82b15030 r dm_vupdate_irq_funcs +ffffffff82b15040 r dm_dmub_trace_irq_funcs +ffffffff82b15050 r dm_pageflip_irq_funcs +ffffffff82b15060 r dm_hpd_irq_funcs +ffffffff82b16000 r amdgpu_dm_encoder_funcs +ffffffff82b16020 r dm_mst_cbs +ffffffff82b16030 r dm_dp_mst_connector_funcs +ffffffff82b160a8 r dm_dp_mst_connector_helper_funcs +ffffffff82b17000 r dm_plane_funcs +ffffffff82b17068 r dm_plane_helper_funcs ffffffff82b19000 r vbios_funcs -ffffffff82b1e000 r command_table_helper_funcs +ffffffff82b1a000 r vbios_funcs ffffffff82b1f000 r command_table_helper_funcs ffffffff82b20000 r command_table_helper_funcs ffffffff82b21000 r command_table_helper_funcs -ffffffff82b22000 r dce80_max_clks_by_state -ffffffff82b22028 r disp_clk_regs -ffffffff82b2207c r disp_clk_shift -ffffffff82b22088 r disp_clk_mask -ffffffff82b23000 r dce110_max_clks_by_state +ffffffff82b22000 r command_table_helper_funcs +ffffffff82b23000 r dce80_max_clks_by_state ffffffff82b23028 r disp_clk_regs ffffffff82b2307c r disp_clk_shift ffffffff82b23088 r disp_clk_mask -ffffffff82b24000 r dce112_max_clks_by_state +ffffffff82b24000 r dce110_max_clks_by_state ffffffff82b24028 r disp_clk_regs ffffffff82b2407c r disp_clk_shift ffffffff82b24088 r disp_clk_mask -ffffffff82b25000 r dce120_max_clks_by_state -ffffffff82b26000 r clk_mgr_regs -ffffffff82b26054 r clk_mgr_shift -ffffffff82b26060 r clk_mgr_mask +ffffffff82b25000 r dce112_max_clks_by_state +ffffffff82b25028 r disp_clk_regs +ffffffff82b2507c r disp_clk_shift +ffffffff82b25088 r disp_clk_mask +ffffffff82b26000 r dce120_max_clks_by_state ffffffff82b27000 r clk_mgr_regs ffffffff82b27054 r clk_mgr_shift ffffffff82b27060 r clk_mgr_mask ffffffff82b28000 r clk_mgr_regs ffffffff82b28054 r clk_mgr_shift ffffffff82b28060 r clk_mgr_mask -ffffffff82b29000 r lpddr5_wm_table -ffffffff82b290c0 r ddr5_wm_table +ffffffff82b29000 r clk_mgr_regs +ffffffff82b29054 r clk_mgr_shift +ffffffff82b29060 r clk_mgr_mask ffffffff82b2a000 r lpddr5_wm_table ffffffff82b2a0c0 r ddr5_wm_table ffffffff82b2b000 r lpddr5_wm_table ffffffff82b2b0c0 r ddr5_wm_table ffffffff82b2c000 r lpddr5_wm_table -ffffffff82b2c0c0 r ddr4_wm_table -ffffffff82b2d000 r clk_mgr_regs_dcn321 -ffffffff82b2d054 r clk_mgr_shift_dcn321 -ffffffff82b2d060 r clk_mgr_mask_dcn321 -ffffffff82b2d084 r clk_mgr_regs_dcn32 -ffffffff82b2d0d8 r clk_mgr_shift_dcn32 -ffffffff82b2d0e4 r clk_mgr_mask_dcn32 -ffffffff82b2e000 r DC_BUILD_ID -ffffffff82b30000 r output_csc_matrix -ffffffff82b300e0 r black_color_format -ffffffff82b31000 r DP_SINK_BRANCH_DEV_NAME_7580 -ffffffff82b32000 r DP_VGA_DONGLE_BRANCH_DEV_NAME -ffffffff82b32006 r DP_DVI_CONVERTER_ID_4 -ffffffff82b3200d r DP_DVI_CONVERTER_ID_5 -ffffffff82b33000 r DP_VGA_LVDS_CONVERTER_ID_2 -ffffffff82b33007 r DP_VGA_LVDS_CONVERTER_ID_3 -ffffffff82b33010 r dp_lt_fallbacks -ffffffff82b34000 r mandatory_dpcd_partitions -ffffffff82b36000 r dce_funcs -ffffffff82b37000 r funcs -ffffffff82b38000 R video_optimized_pixel_rates -ffffffff82b381b0 r dce110_clk_src_funcs -ffffffff82b381d8 r dce112_clk_src_funcs -ffffffff82b38200 r dcn20_clk_src_funcs -ffffffff82b38228 r dcn3_clk_src_funcs -ffffffff82b38250 r dcn31_clk_src_funcs -ffffffff82b39000 r dce_funcs -ffffffff82b39068 r dcn10_funcs -ffffffff82b390d0 r dcn20_funcs -ffffffff82b39138 r dcn21_funcs -ffffffff82b3a000 r dce_ipp_funcs -ffffffff82b3b000 r dce110_lnk_enc_funcs -ffffffff82b3c000 r dce_mi_funcs -ffffffff82b3c090 r dce112_mi_funcs -ffffffff82b3c120 r dce120_mi_funcs -ffffffff82b3c1b0 r pte_settings -ffffffff82b3d000 r funcs -ffffffff82b3e000 r dce_link_panel_cntl_funcs -ffffffff82b3f000 r filter_3tap_16p_upscale -ffffffff82b3f040 r filter_3tap_16p_116 -ffffffff82b3f080 r filter_3tap_16p_149 -ffffffff82b3f0c0 r filter_3tap_16p_183 -ffffffff82b3f100 r filter_3tap_64p_upscale -ffffffff82b3f1d0 r filter_3tap_64p_116 -ffffffff82b3f2a0 r filter_3tap_64p_149 -ffffffff82b3f370 r filter_3tap_64p_183 -ffffffff82b3f440 r filter_4tap_16p_upscale -ffffffff82b3f490 r filter_4tap_16p_116 -ffffffff82b3f4e0 r filter_4tap_16p_149 -ffffffff82b3f530 r filter_4tap_16p_183 -ffffffff82b3f580 r filter_4tap_64p_upscale -ffffffff82b3f690 r filter_4tap_64p_116 -ffffffff82b3f7a0 r filter_4tap_64p_149 -ffffffff82b3f8b0 r filter_4tap_64p_183 -ffffffff82b3f9c0 r filter_5tap_64p_upscale -ffffffff82b3fb10 r filter_5tap_64p_116 -ffffffff82b3fc60 r filter_5tap_64p_149 -ffffffff82b3fdb0 r filter_5tap_64p_183 -ffffffff82b3ff00 r filter_6tap_64p_upscale -ffffffff82b40090 r filter_6tap_64p_116 -ffffffff82b40220 r filter_6tap_64p_149 -ffffffff82b403b0 r filter_6tap_64p_183 -ffffffff82b40540 r filter_7tap_64p_upscale -ffffffff82b40710 r filter_7tap_64p_116 -ffffffff82b408e0 r filter_7tap_64p_149 -ffffffff82b40ab0 r filter_7tap_64p_183 -ffffffff82b40c80 r filter_8tap_64p_upscale -ffffffff82b40e90 r filter_8tap_64p_116 -ffffffff82b410a0 r filter_8tap_64p_149 -ffffffff82b412b0 r filter_8tap_64p_183 -ffffffff82b414c0 r filter_2tap_16p -ffffffff82b414f0 r filter_2tap_64p -ffffffff82b42000 r audio_clock_info_table_48bpc -ffffffff82b42190 r audio_clock_info_table_36bpc -ffffffff82b42320 r audio_clock_info_table -ffffffff82b424e0 r dce110_str_enc_funcs -ffffffff82b43000 r global_color_matrix -ffffffff82b430a8 r dce_transform_funcs -ffffffff82b44000 r abm_funcs -ffffffff82b45000 r psr_funcs -ffffffff82b45040 r DP_SINK_DEVICE_STR_ID_1 -ffffffff82b45045 r DP_SINK_DEVICE_STR_ID_2 -ffffffff82b46000 r reg_offsets -ffffffff82b47000 r bios_regs -ffffffff82b47008 r res_cap -ffffffff82b47050 r clk_src_regs -ffffffff82b4714c r dmcu_regs -ffffffff82b471a8 r dmcu_shift -ffffffff82b471bc r dmcu_mask -ffffffff82b47208 r abm_regs -ffffffff82b47248 r abm_shift -ffffffff82b4725c r abm_mask -ffffffff82b472b0 r dce100_tg_offsets -ffffffff82b472f8 r plane_cap -ffffffff82b47328 r res_create_funcs -ffffffff82b47358 r dce100_res_pool_funcs -ffffffff82b47440 r panel_cntl_regs -ffffffff82b47460 r panel_cntl_shift -ffffffff82b47470 r panel_cntl_mask -ffffffff82b474b0 r link_enc_regs -ffffffff82b47870 r link_enc_aux_regs -ffffffff82b478c0 r link_enc_hpd_regs -ffffffff82b478d8 r link_enc_feature -ffffffff82b478e8 r cs_shift -ffffffff82b478f4 r cs_mask -ffffffff82b47920 r mi_regs -ffffffff82b47c38 r mi_shifts -ffffffff82b47c80 r mi_masks -ffffffff82b47da0 r ipp_regs -ffffffff82b47f98 r ipp_shift -ffffffff82b47fc0 r ipp_mask -ffffffff82b48060 r xfm_regs -ffffffff82b48600 r xfm_shift -ffffffff82b48660 r xfm_mask -ffffffff82b487e0 r opp_regs -ffffffff82b48930 r opp_shift -ffffffff82b4895c r opp_mask -ffffffff82b48a10 r aux_engine_regs -ffffffff82b48b00 r aux_mask -ffffffff82b48b60 r aux_shift -ffffffff82b48b80 r i2c_hw_regs -ffffffff82b48cd0 r i2c_shifts -ffffffff82b48cfc r i2c_masks -ffffffff82b48da0 r audio_regs -ffffffff82b48ed4 r audio_shift -ffffffff82b48eec r audio_mask -ffffffff82b48f30 r stream_enc_regs -ffffffff82b495dc r se_shift -ffffffff82b49660 r se_mask -ffffffff82b49864 r hwseq_reg -ffffffff82b49a80 r hwseq_shift -ffffffff82b49b00 r hwseq_mask -ffffffff82b4a000 r reg_offsets -ffffffff82b4a018 r dce110_compressor_funcs -ffffffff82b4b000 r dce110_funcs -ffffffff82b4b2c0 r dce110_private_funcs -ffffffff82b4c000 r dce110_mem_input_v_funcs -ffffffff82b4c090 r dvmm_Hw_Setting_1DTiling -ffffffff82b4c120 r dvmm_Hw_Setting_2DTiling -ffffffff82b4c1b0 r dvmm_Hw_Setting_Linear -ffffffff82b4d000 r global_color_matrix -ffffffff82b4d0b0 r input_csc_matrix -ffffffff82b4e000 r funcs -ffffffff82b4f000 r bios_regs -ffffffff82b4f008 r dce110_res_pool_funcs -ffffffff82b4f0f0 r clk_src_regs -ffffffff82b4f1ec r dmcu_regs -ffffffff82b4f248 r dmcu_shift -ffffffff82b4f25c r dmcu_mask -ffffffff82b4f2a8 r abm_regs -ffffffff82b4f2e8 r abm_shift -ffffffff82b4f2fc r abm_mask -ffffffff82b4f350 r dce110_tg_offsets -ffffffff82b4f398 r res_create_funcs -ffffffff82b4f3c8 r plane_cap -ffffffff82b4f3f4 r underlay_plane_cap -ffffffff82b4f420 r stoney_resource_cap -ffffffff82b4f45c r carrizo_resource_cap -ffffffff82b4f4a0 r panel_cntl_regs -ffffffff82b4f4c0 r panel_cntl_shift -ffffffff82b4f4d0 r panel_cntl_mask -ffffffff82b4f510 r link_enc_regs -ffffffff82b4f8d0 r link_enc_aux_regs -ffffffff82b4f920 r link_enc_hpd_regs -ffffffff82b4f938 r link_enc_feature -ffffffff82b4f948 r cs_shift -ffffffff82b4f954 r cs_mask -ffffffff82b4f980 r mi_regs -ffffffff82b4fb0c r mi_shifts -ffffffff82b4fb54 r mi_masks -ffffffff82b4fc70 r ipp_regs -ffffffff82b4fd6c r ipp_shift -ffffffff82b4fd94 r ipp_mask -ffffffff82b4fe30 r xfm_regs -ffffffff82b50100 r xfm_shift -ffffffff82b50160 r xfm_mask -ffffffff82b502e0 r opp_regs -ffffffff82b50430 r opp_shift -ffffffff82b5045c r opp_mask -ffffffff82b50510 r aux_engine_regs -ffffffff82b50600 r aux_mask -ffffffff82b50660 r aux_shift -ffffffff82b50680 r i2c_hw_regs -ffffffff82b507d0 r i2c_shifts -ffffffff82b507fc r i2c_masks -ffffffff82b508a0 r audio_regs -ffffffff82b509d4 r audio_shift -ffffffff82b509ec r audio_mask -ffffffff82b50a30 r stream_enc_regs -ffffffff82b50d0c r se_shift -ffffffff82b50d90 r se_mask -ffffffff82b50f94 r hwseq_stoney_reg -ffffffff82b511b0 r hwseq_cz_reg -ffffffff82b513cc r hwseq_shift -ffffffff82b5144c r hwseq_mask -ffffffff82b52000 r dce110_tg_funcs -ffffffff82b53000 r dce110_tg_v_funcs -ffffffff82b54000 r dce110_xfmv_funcs -ffffffff82b55000 r reg_offsets +ffffffff82b2c0c0 r ddr5_wm_table +ffffffff82b2d000 r lpddr5_wm_table +ffffffff82b2d0c0 r ddr4_wm_table +ffffffff82b2e000 r clk_mgr_regs_dcn321 +ffffffff82b2e054 r clk_mgr_shift_dcn321 +ffffffff82b2e060 r clk_mgr_mask_dcn321 +ffffffff82b2e084 r clk_mgr_regs_dcn32 +ffffffff82b2e0d8 r clk_mgr_shift_dcn32 +ffffffff82b2e0e4 r clk_mgr_mask_dcn32 +ffffffff82b2f000 r DC_BUILD_ID +ffffffff82b31000 r output_csc_matrix +ffffffff82b310e0 r black_color_format +ffffffff82b32000 r DP_SINK_BRANCH_DEV_NAME_7580 +ffffffff82b33000 r DP_VGA_DONGLE_BRANCH_DEV_NAME +ffffffff82b33006 r DP_DVI_CONVERTER_ID_4 +ffffffff82b3300d r DP_DVI_CONVERTER_ID_5 +ffffffff82b34000 r DP_VGA_LVDS_CONVERTER_ID_2 +ffffffff82b34007 r DP_VGA_LVDS_CONVERTER_ID_3 +ffffffff82b34010 r dp_lt_fallbacks +ffffffff82b35000 r mandatory_dpcd_partitions +ffffffff82b37000 r dce_funcs +ffffffff82b38000 r funcs +ffffffff82b39000 R video_optimized_pixel_rates +ffffffff82b391b0 r dce110_clk_src_funcs +ffffffff82b391d8 r dce112_clk_src_funcs +ffffffff82b39200 r dcn20_clk_src_funcs +ffffffff82b39228 r dcn3_clk_src_funcs +ffffffff82b39250 r dcn31_clk_src_funcs +ffffffff82b3a000 r dce_funcs +ffffffff82b3a068 r dcn10_funcs +ffffffff82b3a0d0 r dcn20_funcs +ffffffff82b3a138 r dcn21_funcs +ffffffff82b3b000 r dce_ipp_funcs +ffffffff82b3c000 r dce110_lnk_enc_funcs +ffffffff82b3d000 r dce_mi_funcs +ffffffff82b3d090 r dce112_mi_funcs +ffffffff82b3d120 r dce120_mi_funcs +ffffffff82b3d1b0 r pte_settings +ffffffff82b3e000 r funcs +ffffffff82b3f000 r dce_link_panel_cntl_funcs +ffffffff82b40000 r filter_3tap_16p_upscale +ffffffff82b40040 r filter_3tap_16p_116 +ffffffff82b40080 r filter_3tap_16p_149 +ffffffff82b400c0 r filter_3tap_16p_183 +ffffffff82b40100 r filter_3tap_64p_upscale +ffffffff82b401d0 r filter_3tap_64p_116 +ffffffff82b402a0 r filter_3tap_64p_149 +ffffffff82b40370 r filter_3tap_64p_183 +ffffffff82b40440 r filter_4tap_16p_upscale +ffffffff82b40490 r filter_4tap_16p_116 +ffffffff82b404e0 r filter_4tap_16p_149 +ffffffff82b40530 r filter_4tap_16p_183 +ffffffff82b40580 r filter_4tap_64p_upscale +ffffffff82b40690 r filter_4tap_64p_116 +ffffffff82b407a0 r filter_4tap_64p_149 +ffffffff82b408b0 r filter_4tap_64p_183 +ffffffff82b409c0 r filter_5tap_64p_upscale +ffffffff82b40b10 r filter_5tap_64p_116 +ffffffff82b40c60 r filter_5tap_64p_149 +ffffffff82b40db0 r filter_5tap_64p_183 +ffffffff82b40f00 r filter_6tap_64p_upscale +ffffffff82b41090 r filter_6tap_64p_116 +ffffffff82b41220 r filter_6tap_64p_149 +ffffffff82b413b0 r filter_6tap_64p_183 +ffffffff82b41540 r filter_7tap_64p_upscale +ffffffff82b41710 r filter_7tap_64p_116 +ffffffff82b418e0 r filter_7tap_64p_149 +ffffffff82b41ab0 r filter_7tap_64p_183 +ffffffff82b41c80 r filter_8tap_64p_upscale +ffffffff82b41e90 r filter_8tap_64p_116 +ffffffff82b420a0 r filter_8tap_64p_149 +ffffffff82b422b0 r filter_8tap_64p_183 +ffffffff82b424c0 r filter_2tap_16p +ffffffff82b424f0 r filter_2tap_64p +ffffffff82b43000 r audio_clock_info_table_48bpc +ffffffff82b43190 r audio_clock_info_table_36bpc +ffffffff82b43320 r audio_clock_info_table +ffffffff82b434e0 r dce110_str_enc_funcs +ffffffff82b44000 r global_color_matrix +ffffffff82b440a8 r dce_transform_funcs +ffffffff82b45000 r abm_funcs +ffffffff82b46000 r psr_funcs +ffffffff82b46040 r DP_SINK_DEVICE_STR_ID_1 +ffffffff82b46045 r DP_SINK_DEVICE_STR_ID_2 +ffffffff82b47000 r reg_offsets +ffffffff82b48000 r bios_regs +ffffffff82b48008 r res_cap +ffffffff82b48050 r clk_src_regs +ffffffff82b4814c r dmcu_regs +ffffffff82b481a8 r dmcu_shift +ffffffff82b481bc r dmcu_mask +ffffffff82b48208 r abm_regs +ffffffff82b48248 r abm_shift +ffffffff82b4825c r abm_mask +ffffffff82b482b0 r dce100_tg_offsets +ffffffff82b482f8 r plane_cap +ffffffff82b48328 r res_create_funcs +ffffffff82b48358 r dce100_res_pool_funcs +ffffffff82b48440 r panel_cntl_regs +ffffffff82b48460 r panel_cntl_shift +ffffffff82b48470 r panel_cntl_mask +ffffffff82b484b0 r link_enc_regs +ffffffff82b48870 r link_enc_aux_regs +ffffffff82b488c0 r link_enc_hpd_regs +ffffffff82b488d8 r link_enc_feature +ffffffff82b488e8 r cs_shift +ffffffff82b488f4 r cs_mask +ffffffff82b48920 r mi_regs +ffffffff82b48c38 r mi_shifts +ffffffff82b48c80 r mi_masks +ffffffff82b48da0 r ipp_regs +ffffffff82b48f98 r ipp_shift +ffffffff82b48fc0 r ipp_mask +ffffffff82b49060 r xfm_regs +ffffffff82b49600 r xfm_shift +ffffffff82b49660 r xfm_mask +ffffffff82b497e0 r opp_regs +ffffffff82b49930 r opp_shift +ffffffff82b4995c r opp_mask +ffffffff82b49a10 r aux_engine_regs +ffffffff82b49b00 r aux_mask +ffffffff82b49b60 r aux_shift +ffffffff82b49b80 r i2c_hw_regs +ffffffff82b49cd0 r i2c_shifts +ffffffff82b49cfc r i2c_masks +ffffffff82b49da0 r audio_regs +ffffffff82b49ed4 r audio_shift +ffffffff82b49eec r audio_mask +ffffffff82b49f30 r stream_enc_regs +ffffffff82b4a5dc r se_shift +ffffffff82b4a660 r se_mask +ffffffff82b4a864 r hwseq_reg +ffffffff82b4aa80 r hwseq_shift +ffffffff82b4ab00 r hwseq_mask +ffffffff82b4b000 r reg_offsets +ffffffff82b4b018 r dce110_compressor_funcs +ffffffff82b4c000 r dce110_funcs +ffffffff82b4c2c0 r dce110_private_funcs +ffffffff82b4d000 r dce110_mem_input_v_funcs +ffffffff82b4d090 r dvmm_Hw_Setting_1DTiling +ffffffff82b4d120 r dvmm_Hw_Setting_2DTiling +ffffffff82b4d1b0 r dvmm_Hw_Setting_Linear +ffffffff82b4e000 r global_color_matrix +ffffffff82b4e0b0 r input_csc_matrix +ffffffff82b4f000 r funcs +ffffffff82b50000 r bios_regs +ffffffff82b50008 r dce110_res_pool_funcs +ffffffff82b500f0 r clk_src_regs +ffffffff82b501ec r dmcu_regs +ffffffff82b50248 r dmcu_shift +ffffffff82b5025c r dmcu_mask +ffffffff82b502a8 r abm_regs +ffffffff82b502e8 r abm_shift +ffffffff82b502fc r abm_mask +ffffffff82b50350 r dce110_tg_offsets +ffffffff82b50398 r res_create_funcs +ffffffff82b503c8 r plane_cap +ffffffff82b503f4 r underlay_plane_cap +ffffffff82b50420 r stoney_resource_cap +ffffffff82b5045c r carrizo_resource_cap +ffffffff82b504a0 r panel_cntl_regs +ffffffff82b504c0 r panel_cntl_shift +ffffffff82b504d0 r panel_cntl_mask +ffffffff82b50510 r link_enc_regs +ffffffff82b508d0 r link_enc_aux_regs +ffffffff82b50920 r link_enc_hpd_regs +ffffffff82b50938 r link_enc_feature +ffffffff82b50948 r cs_shift +ffffffff82b50954 r cs_mask +ffffffff82b50980 r mi_regs +ffffffff82b50b0c r mi_shifts +ffffffff82b50b54 r mi_masks +ffffffff82b50c70 r ipp_regs +ffffffff82b50d6c r ipp_shift +ffffffff82b50d94 r ipp_mask +ffffffff82b50e30 r xfm_regs +ffffffff82b51100 r xfm_shift +ffffffff82b51160 r xfm_mask +ffffffff82b512e0 r opp_regs +ffffffff82b51430 r opp_shift +ffffffff82b5145c r opp_mask +ffffffff82b51510 r aux_engine_regs +ffffffff82b51600 r aux_mask +ffffffff82b51660 r aux_shift +ffffffff82b51680 r i2c_hw_regs +ffffffff82b517d0 r i2c_shifts +ffffffff82b517fc r i2c_masks +ffffffff82b518a0 r audio_regs +ffffffff82b519d4 r audio_shift +ffffffff82b519ec r audio_mask +ffffffff82b51a30 r stream_enc_regs +ffffffff82b51d0c r se_shift +ffffffff82b51d90 r se_mask +ffffffff82b51f94 r hwseq_stoney_reg +ffffffff82b521b0 r hwseq_cz_reg +ffffffff82b523cc r hwseq_shift +ffffffff82b5244c r hwseq_mask +ffffffff82b53000 r dce110_tg_funcs +ffffffff82b54000 r dce110_tg_v_funcs +ffffffff82b55000 r dce110_xfmv_funcs ffffffff82b56000 r reg_offsets -ffffffff82b57000 r bios_regs -ffffffff82b57010 r clk_src_regs -ffffffff82b57208 r dmcu_regs -ffffffff82b57264 r dmcu_shift -ffffffff82b57278 r dmcu_mask -ffffffff82b572c4 r abm_regs -ffffffff82b57304 r abm_shift -ffffffff82b57318 r abm_mask -ffffffff82b57360 r dce112_tg_offsets -ffffffff82b573a8 r res_create_funcs -ffffffff82b573d8 r plane_cap -ffffffff82b57404 r polaris_11_resource_cap -ffffffff82b57440 r polaris_10_resource_cap -ffffffff82b57480 r dce112_res_pool_funcs -ffffffff82b57560 r panel_cntl_regs -ffffffff82b57580 r panel_cntl_shift -ffffffff82b57590 r panel_cntl_mask -ffffffff82b575d0 r link_enc_regs -ffffffff82b57990 r link_enc_aux_regs -ffffffff82b579e0 r link_enc_hpd_regs -ffffffff82b579f8 r link_enc_feature -ffffffff82b57a08 r cs_shift -ffffffff82b57a14 r cs_mask -ffffffff82b57a40 r mi_regs -ffffffff82b57d58 r mi_shifts -ffffffff82b57da0 r mi_masks -ffffffff82b57ec0 r ipp_regs -ffffffff82b580b8 r ipp_shift -ffffffff82b580e0 r ipp_mask -ffffffff82b58180 r xfm_regs -ffffffff82b58720 r xfm_shift -ffffffff82b58780 r xfm_mask -ffffffff82b58900 r opp_regs -ffffffff82b58a50 r opp_shift -ffffffff82b58a7c r opp_mask -ffffffff82b58b30 r aux_engine_regs -ffffffff82b58c20 r aux_mask -ffffffff82b58c80 r aux_shift -ffffffff82b58ca0 r i2c_hw_regs -ffffffff82b58df0 r i2c_shifts -ffffffff82b58e1c r i2c_masks -ffffffff82b58ec0 r audio_regs -ffffffff82b58fc8 r audio_shift -ffffffff82b58fe0 r audio_mask -ffffffff82b59020 r stream_enc_regs -ffffffff82b595d8 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dsc_shift -ffffffff82c1cb90 r dsc_mask -ffffffff82c1ce68 r dwbc30_shift -ffffffff82c1cf9c r dwbc30_mask -ffffffff82c1d464 r mcif_wb30_shift -ffffffff82c1d510 r mcif_wb30_mask -ffffffff82c1d7bc r aux_mask -ffffffff82c1d81c r aux_shift -ffffffff82c1d834 r i2c_shifts -ffffffff82c1d860 r i2c_masks -ffffffff82c1d904 r audio_shift -ffffffff82c1d91c r audio_mask -ffffffff82c1d958 r se_shift -ffffffff82c1da34 r se_mask -ffffffff82c1dda0 r vpg_shift -ffffffff82c1ddc8 r vpg_mask -ffffffff82c1de5c r afmt_shift -ffffffff82c1de70 r afmt_mask -ffffffff82c1deb4 r hpo_dp_se_shift -ffffffff82c1dedc r hpo_dp_se_mask -ffffffff82c1df7c r apg_shift -ffffffff82c1df84 r apg_mask -ffffffff82c1df9c r hpo_dp_le_shift -ffffffff82c1dfb8 r hpo_dp_le_mask -ffffffff82c1e01c r hwseq_shift -ffffffff82c1e09c r hwseq_mask -ffffffff82c1f000 r dcn321_link_enc_funcs -ffffffff82c20000 r res_cap_dcn321 -ffffffff82c20040 r debug_defaults_diags -ffffffff82c201b8 r dccg_shift -ffffffff82c20250 r dccg_mask -ffffffff82c204ac r abm_shift -ffffffff82c204c0 r abm_mask -ffffffff82c20508 r res_create_funcs -ffffffff82c20538 r res_create_maximus_funcs -ffffffff82c20568 r plane_cap -ffffffff82c20594 r le_shift -ffffffff82c20684 r le_mask -ffffffff82c20a3c r link_enc_feature -ffffffff82c20a50 r debug_defaults_drv -ffffffff82c20bc8 r cs_shift -ffffffff82c20bd4 r cs_mask -ffffffff82c20bfc r hubbub_shift -ffffffff82c20c84 r hubbub_mask -ffffffff82c20ea0 r vmid_shifts -ffffffff82c20ea8 r vmid_masks -ffffffff82c20ec8 r hubp_shift -ffffffff82c20fc4 r hubp_mask -ffffffff82c213b4 r tf_shift -ffffffff82c21684 r tf_mask -ffffffff82c221c4 r opp_shift -ffffffff82c221fc r opp_mask -ffffffff82c222d0 r optc_shift -ffffffff82c22390 r optc_mask -ffffffff82c22690 r mpc_shift -ffffffff82c2276c r mpc_mask -ffffffff82c22ad8 r dsc_shift -ffffffff82c22b90 r dsc_mask -ffffffff82c22e68 r dwbc30_shift -ffffffff82c22f9c r dwbc30_mask -ffffffff82c23464 r mcif_wb30_shift -ffffffff82c23510 r mcif_wb30_mask -ffffffff82c237bc r aux_mask -ffffffff82c2381c r aux_shift -ffffffff82c23834 r i2c_shifts -ffffffff82c23860 r i2c_masks -ffffffff82c23904 r audio_shift -ffffffff82c2391c r audio_mask -ffffffff82c23958 r se_shift -ffffffff82c23a34 r se_mask -ffffffff82c23da0 r vpg_shift -ffffffff82c23dc8 r vpg_mask -ffffffff82c23e5c r afmt_shift -ffffffff82c23e70 r afmt_mask -ffffffff82c23eb4 r hpo_dp_se_shift -ffffffff82c23edc r hpo_dp_se_mask -ffffffff82c23f7c r apg_shift -ffffffff82c23f84 r apg_mask -ffffffff82c23f9c r hpo_dp_le_shift -ffffffff82c23fb8 r hpo_dp_le_mask -ffffffff82c2401c r hwseq_shift -ffffffff82c2409c r hwseq_mask -ffffffff82c26000 R dcn10_soc_defaults -ffffffff82c2608c R dcn10_ip_defaults -ffffffff82c31000 R dml20_funcs -ffffffff82c31030 R dml20v2_funcs -ffffffff82c31060 R dml21_funcs -ffffffff82c31090 R dml30_funcs -ffffffff82c310c0 R dml31_funcs -ffffffff82c310f0 R dml314_funcs -ffffffff82c31120 R dml32_funcs -ffffffff82c34000 R qp_table_422_10bpc_min -ffffffff82c34740 R qp_table_444_8bpc_max -ffffffff82c35080 R qp_table_420_12bpc_max -ffffffff82c357c0 R qp_table_444_10bpc_min -ffffffff82c36400 R qp_table_420_8bpc_max -ffffffff82c36840 R qp_table_444_8bpc_min -ffffffff82c37180 R qp_table_444_12bpc_min -ffffffff82c380c0 R qp_table_420_12bpc_min -ffffffff82c38800 R qp_table_422_12bpc_min -ffffffff82c39140 R qp_table_422_12bpc_max -ffffffff82c39a80 R qp_table_444_12bpc_max -ffffffff82c3a9c0 R qp_table_420_8bpc_min -ffffffff82c3ae00 R qp_table_422_8bpc_min -ffffffff82c3b340 R qp_table_422_10bpc_max -ffffffff82c3ba80 R qp_table_420_10bpc_max -ffffffff82c3c040 R qp_table_420_10bpc_min -ffffffff82c3c600 R qp_table_444_10bpc_max -ffffffff82c3d240 R qp_table_422_8bpc_max -ffffffff82c3f000 r funcs -ffffffff82c3f050 r hpd_regs -ffffffff82c3f1a0 r hpd_shift -ffffffff82c3f1b0 r hpd_mask -ffffffff82c3f1c0 r ddc_data_regs -ffffffff82c3f3a0 r ddc_clk_regs -ffffffff82c3f580 r ddc_shift -ffffffff82c3f5a8 r ddc_mask +ffffffff82b57000 r reg_offsets +ffffffff82b58000 r bios_regs +ffffffff82b58010 r clk_src_regs +ffffffff82b58208 r dmcu_regs +ffffffff82b58264 r dmcu_shift +ffffffff82b58278 r dmcu_mask +ffffffff82b582c4 r abm_regs +ffffffff82b58304 r abm_shift +ffffffff82b58318 r abm_mask +ffffffff82b58360 r dce112_tg_offsets +ffffffff82b583a8 r res_create_funcs +ffffffff82b583d8 r plane_cap +ffffffff82b58404 r polaris_11_resource_cap +ffffffff82b58440 r polaris_10_resource_cap +ffffffff82b58480 r dce112_res_pool_funcs +ffffffff82b58560 r panel_cntl_regs +ffffffff82b58580 r panel_cntl_shift +ffffffff82b58590 r panel_cntl_mask +ffffffff82b585d0 r link_enc_regs +ffffffff82b58990 r link_enc_aux_regs +ffffffff82b589e0 r link_enc_hpd_regs +ffffffff82b589f8 r link_enc_feature +ffffffff82b58a08 r cs_shift +ffffffff82b58a14 r cs_mask +ffffffff82b58a40 r mi_regs +ffffffff82b58d58 r mi_shifts +ffffffff82b58da0 r mi_masks +ffffffff82b58ec0 r ipp_regs +ffffffff82b590b8 r ipp_shift +ffffffff82b590e0 r ipp_mask +ffffffff82b59180 r xfm_regs +ffffffff82b59720 r xfm_shift +ffffffff82b59780 r xfm_mask +ffffffff82b59900 r opp_regs +ffffffff82b59a50 r opp_shift +ffffffff82b59a7c r opp_mask +ffffffff82b59b30 r aux_engine_regs +ffffffff82b59c20 r aux_mask +ffffffff82b59c80 r aux_shift +ffffffff82b59ca0 r i2c_hw_regs +ffffffff82b59df0 r i2c_shifts +ffffffff82b59e1c r i2c_masks +ffffffff82b59ec0 r audio_regs +ffffffff82b59fc8 r audio_shift +ffffffff82b59fe0 r audio_mask +ffffffff82b5a020 r stream_enc_regs +ffffffff82b5a5d8 r se_shift +ffffffff82b5a65c r se_mask +ffffffff82b5a860 r hwseq_reg +ffffffff82b5aa7c r hwseq_shift +ffffffff82b5aafc r hwseq_mask +ffffffff82b5b000 r bios_regs +ffffffff82b5b008 r res_cap +ffffffff82b5b048 r dce120_res_pool_funcs +ffffffff82b5b128 r debug_defaults +ffffffff82b5b2a0 r clk_src_regs +ffffffff82b5b498 r dmcu_regs +ffffffff82b5b4f4 r dmcu_shift +ffffffff82b5b508 r dmcu_mask +ffffffff82b5b554 r abm_regs +ffffffff82b5b594 r abm_shift +ffffffff82b5b5a8 r abm_mask +ffffffff82b5b5f0 r dce120_tg_offsets +ffffffff82b5b638 r dce121_res_create_funcs +ffffffff82b5b668 r res_create_funcs +ffffffff82b5b698 r plane_cap +ffffffff82b5b6d0 r panel_cntl_regs +ffffffff82b5b6f0 r panel_cntl_shift +ffffffff82b5b700 r panel_cntl_mask +ffffffff82b5b740 r link_enc_regs +ffffffff82b5bb00 r link_enc_aux_regs +ffffffff82b5bb50 r link_enc_hpd_regs +ffffffff82b5bb68 r link_enc_feature +ffffffff82b5bb78 r cs_shift +ffffffff82b5bb84 r cs_mask +ffffffff82b5bbb0 r mi_regs +ffffffff82b5bec8 r mi_shifts +ffffffff82b5bf10 r mi_masks +ffffffff82b5c030 r ipp_regs +ffffffff82b5c228 r ipp_shift +ffffffff82b5c250 r ipp_mask +ffffffff82b5c2f0 r xfm_regs +ffffffff82b5c890 r xfm_shift +ffffffff82b5c8f0 r xfm_mask +ffffffff82b5ca70 r opp_regs +ffffffff82b5cbc0 r opp_shift +ffffffff82b5cbec r opp_mask +ffffffff82b5cca0 r aux_engine_regs +ffffffff82b5cd90 r aux_mask +ffffffff82b5cdf0 r aux_shift +ffffffff82b5ce10 r i2c_hw_regs +ffffffff82b5cf60 r i2c_shifts +ffffffff82b5cf8c r i2c_masks +ffffffff82b5d030 r audio_regs +ffffffff82b5d164 r audio_shift +ffffffff82b5d17c r audio_mask +ffffffff82b5d1c0 r stream_enc_regs +ffffffff82b5d778 r se_shift +ffffffff82b5d7fc r se_mask +ffffffff82b5da00 r dce121_hwseq_reg +ffffffff82b5dc1c r dce121_hwseq_shift +ffffffff82b5dc9c r dce121_hwseq_mask +ffffffff82b5de90 r hwseq_reg +ffffffff82b5e0ac r hwseq_shift +ffffffff82b5e12c r hwseq_mask +ffffffff82b5f000 r dce120_tg_funcs +ffffffff82b60000 r bios_regs +ffffffff82b60008 r res_cap +ffffffff82b60048 r dce80_res_pool_funcs +ffffffff82b60130 r clk_src_regs +ffffffff82b6022c r dmcu_regs +ffffffff82b60288 r dmcu_shift +ffffffff82b6029c r dmcu_mask +ffffffff82b602e8 r abm_regs +ffffffff82b60328 r abm_shift +ffffffff82b6033c r abm_mask +ffffffff82b60390 r dce80_tg_offsets +ffffffff82b603d8 r plane_cap +ffffffff82b60408 r res_create_funcs +ffffffff82b60440 r panel_cntl_regs +ffffffff82b60460 r panel_cntl_shift +ffffffff82b60470 r panel_cntl_mask +ffffffff82b604b0 r link_enc_regs +ffffffff82b60870 r link_enc_aux_regs +ffffffff82b608c0 r link_enc_hpd_regs +ffffffff82b608d8 r link_enc_feature +ffffffff82b608e8 r cs_shift +ffffffff82b608f4 r cs_mask +ffffffff82b60920 r mi_regs +ffffffff82b60c38 r mi_shifts +ffffffff82b60c80 r mi_masks +ffffffff82b60da0 r ipp_regs +ffffffff82b60f98 r ipp_shift +ffffffff82b60fc0 r ipp_mask +ffffffff82b61060 r xfm_regs +ffffffff82b61600 r xfm_shift +ffffffff82b61660 r xfm_mask +ffffffff82b617e0 r opp_regs +ffffffff82b61930 r opp_shift +ffffffff82b6195c r opp_mask +ffffffff82b61a10 r aux_engine_regs +ffffffff82b61b00 r aux_mask +ffffffff82b61b60 r aux_shift +ffffffff82b61b80 r i2c_hw_regs +ffffffff82b61cd0 r i2c_shifts +ffffffff82b61cfc r i2c_masks +ffffffff82b61da0 r audio_regs +ffffffff82b61ed4 r audio_shift +ffffffff82b61eec r audio_mask +ffffffff82b61f30 r stream_enc_regs +ffffffff82b625dc r se_shift +ffffffff82b62660 r se_mask +ffffffff82b62864 r hwseq_reg +ffffffff82b62a80 r hwseq_shift +ffffffff82b62b00 r hwseq_mask +ffffffff82b62cf4 r res_cap_81 +ffffffff82b62d30 r res_cap_83 +ffffffff82b63000 r reg_offsets +ffffffff82b63048 r dce80_tg_funcs +ffffffff82b64000 r dcn10_dpp_funcs +ffffffff82b65000 r dpp_input_csc_matrix +ffffffff82b67000 r hubbub1_funcs +ffffffff82b68000 r dcn10_hubp_funcs +ffffffff82b69000 r reduceSizeAndFraction.prime_numbers +ffffffff82b6b000 r dcn10_funcs +ffffffff82b6b2c0 r dcn10_private_funcs +ffffffff82b6c000 r dcn10_ipp_funcs +ffffffff82b6c048 r dcn20_ipp_funcs +ffffffff82b6d000 r dcn10_lnk_enc_funcs +ffffffff82b6e000 r dcn10_mpc_funcs +ffffffff82b6f000 r dcn10_opp_funcs +ffffffff82b70000 r dcn10_tg_funcs +ffffffff82b71000 r bios_regs +ffffffff82b71008 r rv2_res_cap +ffffffff82b71044 r res_cap +ffffffff82b71080 r debug_defaults_drv +ffffffff82b711f8 r debug_defaults_diags +ffffffff82b71370 r clk_src_regs +ffffffff82b714c0 r dmcu_regs +ffffffff82b7151c r dmcu_shift +ffffffff82b71530 r dmcu_mask +ffffffff82b7157c r abm_regs +ffffffff82b715bc r abm_shift +ffffffff82b715d0 r abm_mask +ffffffff82b71618 r res_create_funcs +ffffffff82b71648 r res_create_maximus_funcs +ffffffff82b71678 r plane_cap +ffffffff82b716a8 r dcn10_res_pool_funcs +ffffffff82b71790 r panel_cntl_regs +ffffffff82b717b0 r panel_cntl_shift +ffffffff82b717c0 r panel_cntl_mask +ffffffff82b71800 r link_enc_regs +ffffffff82b71d10 r link_enc_aux_regs +ffffffff82b71d50 r link_enc_hpd_regs +ffffffff82b71d60 r le_shift +ffffffff82b71e50 r le_mask +ffffffff82b72208 r link_enc_feature +ffffffff82b72218 r cs_shift +ffffffff82b72224 r cs_mask +ffffffff82b72250 r hubp_regs +ffffffff82b72900 r hubp_shift +ffffffff82b729c4 r hubp_mask +ffffffff82b72cd0 r ipp_regs +ffffffff82b72db0 r ipp_shift +ffffffff82b72dcc r ipp_mask +ffffffff82b72e40 r tf_regs +ffffffff82b73da0 r tf_shift +ffffffff82b74008 r tf_mask +ffffffff82b749a0 r opp_regs +ffffffff82b74a70 r opp_shift +ffffffff82b74a90 r opp_mask +ffffffff82b74b10 r tg_regs +ffffffff82b75010 r tg_shift +ffffffff82b750d0 r tg_mask +ffffffff82b753d0 r aux_engine_regs +ffffffff82b754c0 r aux_mask +ffffffff82b75520 r aux_shift +ffffffff82b75540 r i2c_hw_regs +ffffffff82b75690 r i2c_shifts +ffffffff82b756bc r i2c_masks +ffffffff82b75760 r mpc_regs +ffffffff82b75880 r mpc_shift +ffffffff82b75898 r mpc_mask +ffffffff82b758f4 r hubbub_reg +ffffffff82b75a68 r hubbub_shift +ffffffff82b75af0 r hubbub_mask +ffffffff82b75d10 r audio_regs +ffffffff82b75dc0 r audio_shift +ffffffff82b75dd8 r audio_mask +ffffffff82b75e20 r stream_enc_regs +ffffffff82b76370 r se_shift +ffffffff82b7644c r se_mask +ffffffff82b767b8 r hwseq_reg +ffffffff82b769d4 r hwseq_shift +ffffffff82b76a54 r hwseq_mask +ffffffff82b77000 r audio_clock_info_table_48bpc +ffffffff82b77190 r audio_clock_info_table_36bpc +ffffffff82b77320 r audio_clock_info_table +ffffffff82b774e0 r dcn10_str_enc_funcs +ffffffff82b78000 r dccg2_funcs +ffffffff82b7a000 r dpp_input_csc_matrix +ffffffff82b7b000 R dcn20_dsc_funcs +ffffffff82b7c000 R dcn20_dwbc_funcs +ffffffff82b7d000 r filter_12tap_16p_upscale +ffffffff82b7d0e0 r filter_12tap_16p_117 +ffffffff82b7d1c0 r filter_12tap_16p_150 +ffffffff82b7d2a0 r filter_12tap_16p_183 +ffffffff82b7d380 r filter_11tap_16p_upscale +ffffffff82b7d450 r filter_11tap_16p_117 +ffffffff82b7d520 r filter_11tap_16p_150 +ffffffff82b7d5f0 r filter_11tap_16p_183 +ffffffff82b7d6c0 r filter_10tap_16p_upscale +ffffffff82b7d780 r filter_10tap_16p_117 +ffffffff82b7d840 r filter_10tap_16p_150 +ffffffff82b7d900 r filter_10tap_16p_183 +ffffffff82b7d9c0 r filter_9tap_16p_upscale +ffffffff82b7da70 r filter_9tap_16p_117 +ffffffff82b7db20 r filter_9tap_16p_150 +ffffffff82b7dbd0 r filter_9tap_16p_183 +ffffffff82b7dc80 r filter_8tap_16p_upscale +ffffffff82b7dd10 r filter_8tap_16p_117 +ffffffff82b7dda0 r filter_8tap_16p_150 +ffffffff82b7de30 r filter_8tap_16p_183 +ffffffff82b7dec0 r filter_7tap_16p_upscale +ffffffff82b7df40 r filter_7tap_16p_117 +ffffffff82b7dfc0 r filter_7tap_16p_150 +ffffffff82b7e040 r filter_7tap_16p_183 +ffffffff82b7e0c0 r filter_6tap_16p_upscale +ffffffff82b7e130 r filter_6tap_16p_117 +ffffffff82b7e1a0 r filter_6tap_16p_150 +ffffffff82b7e210 r filter_6tap_16p_183 +ffffffff82b7e280 r filter_5tap_16p_upscale +ffffffff82b7e2e0 r filter_5tap_16p_117 +ffffffff82b7e340 r filter_5tap_16p_150 +ffffffff82b7e3a0 r filter_5tap_16p_183 +ffffffff82b7e400 r filter_4tap_16p_upscale +ffffffff82b7e450 r filter_4tap_16p_117 +ffffffff82b7e4a0 r filter_4tap_16p_150 +ffffffff82b7e4f0 r filter_4tap_16p_183 +ffffffff82b7e540 r filter_3tap_16p_upscale +ffffffff82b7e580 r filter_3tap_16p_117 +ffffffff82b7e5c0 r filter_3tap_16p_150 +ffffffff82b7e600 r filter_3tap_16p_183 +ffffffff82b7f000 r hubbub2_funcs +ffffffff82b80000 r dcn20_funcs +ffffffff82b802c0 r dcn20_private_funcs +ffffffff82b81000 r dcn2_mpll_cfg +ffffffff82b81190 r dcn20_link_enc_funcs +ffffffff82b82000 R dcn20_mmhubbub_funcs +ffffffff82b83000 R dcn20_mpc_funcs +ffffffff82b84000 r tf_regs +ffffffff82b85920 r tf_shift +ffffffff82b85ba4 r tf_mask +ffffffff82b865c0 r ipp_regs +ffffffff82b86710 r ipp_shift +ffffffff82b8672c r ipp_mask +ffffffff82b867a0 r opp_regs +ffffffff82b869b0 r opp_shift +ffffffff82b869e8 r opp_mask +ffffffff82b86ac0 r aux_engine_regs +ffffffff82b86bb0 r aux_mask +ffffffff82b86c10 r aux_shift +ffffffff82b86c30 r i2c_hw_regs +ffffffff82b86d80 r i2c_shifts +ffffffff82b86dac r i2c_masks +ffffffff82b86e50 r mpc_regs +ffffffff82b87398 r mpc_shift +ffffffff82b873e0 r mpc_mask +ffffffff82b874f4 r hubbub_reg +ffffffff82b87668 r hubbub_shift +ffffffff82b876f0 r hubbub_mask +ffffffff82b8790c r res_cap_nv10 +ffffffff82b87950 r vmid_regs +ffffffff82b87b10 r vmid_shifts +ffffffff82b87b18 r vmid_masks +ffffffff82b87b40 r tg_regs +ffffffff82b882c0 r tg_shift +ffffffff82b88380 r tg_mask +ffffffff82b88680 r link_enc_regs +ffffffff82b88e20 r link_enc_aux_regs +ffffffff82b88e80 r link_enc_hpd_regs +ffffffff82b88e98 r le_shift +ffffffff82b88f88 r le_mask +ffffffff82b89340 r stream_enc_regs +ffffffff82b89b38 r se_shift +ffffffff82b89c14 r se_mask +ffffffff82b89f80 r hwseq_reg +ffffffff82b8a19c r hwseq_shift +ffffffff82b8a21c r hwseq_mask +ffffffff82b8a410 r dsc_regs +ffffffff82b8a8a8 r dsc_shift +ffffffff82b8a960 r dsc_mask +ffffffff82b8ac40 r hubp_regs +ffffffff82b8b888 r hubp_shift +ffffffff82b8b984 r hubp_mask +ffffffff82b8bd80 r dwbc20_regs +ffffffff82b8be38 r dwbc20_shift +ffffffff82b8beb8 r dwbc20_mask +ffffffff82b8c0b0 r mcif_wb20_regs +ffffffff82b8c190 r mcif_wb20_shift +ffffffff82b8c230 r mcif_wb20_mask +ffffffff82b8c4b0 r link_enc_feature +ffffffff82b8c4c0 r bios_regs +ffffffff82b8c4c8 r dcn20_res_pool_funcs +ffffffff82b8c5a8 r res_cap_nv14 +ffffffff82b8c5e8 r debug_defaults_drv +ffffffff82b8c760 r debug_defaults_diags +ffffffff82b8c8e0 r clk_src_regs +ffffffff82b8cad8 r dccg_regs +ffffffff82b8cbc4 r dccg_shift +ffffffff82b8cc5c r dccg_mask +ffffffff82b8ceb8 r dmcu_regs +ffffffff82b8cf14 r dmcu_shift +ffffffff82b8cf28 r dmcu_mask +ffffffff82b8cf74 r abm_regs +ffffffff82b8cfb4 r abm_shift +ffffffff82b8cfc8 r abm_mask +ffffffff82b8d010 r res_create_funcs +ffffffff82b8d040 r res_create_maximus_funcs +ffffffff82b8d070 r plane_cap +ffffffff82b8d0a0 r panel_cntl_regs +ffffffff82b8d0c0 r panel_cntl_shift +ffffffff82b8d0d0 r panel_cntl_mask +ffffffff82b8d10c r cs_shift +ffffffff82b8d118 r cs_mask +ffffffff82b8d140 r audio_regs +ffffffff82b8d274 r audio_shift +ffffffff82b8d28c r audio_mask +ffffffff82b8e000 r dcn20_str_enc_funcs +ffffffff82b8f000 r dccg201_funcs +ffffffff82b90000 r hubbub201_funcs +ffffffff82b91000 r dcn201_funcs +ffffffff82b912c0 r dcn201_private_funcs +ffffffff82b92000 r dcn201_link_enc_funcs +ffffffff82b93000 R dcn201_mpc_funcs +ffffffff82b94000 r bios_regs +ffffffff82b94008 r res_cap_dnc201 +ffffffff82b94048 r debug_defaults_drv +ffffffff82b941c0 r clk_src_regs +ffffffff82b94268 r dccg_regs +ffffffff82b94354 r dccg_shift +ffffffff82b943ec r dccg_mask +ffffffff82b94648 r res_create_funcs +ffffffff82b94678 r res_create_maximus_funcs +ffffffff82b946a8 r plane_cap +ffffffff82b946e0 r link_enc_regs +ffffffff82b94970 r link_enc_aux_regs +ffffffff82b94990 r link_enc_hpd_regs +ffffffff82b94998 r le_shift +ffffffff82b94a88 r le_mask +ffffffff82b94e40 r link_enc_feature +ffffffff82b94e50 r cs_shift +ffffffff82b94e5c r cs_mask +ffffffff82b94e90 r hubp_regs +ffffffff82b95620 r hubp_shift +ffffffff82b956f8 r hubp_mask +ffffffff82b95a60 r ipp_regs +ffffffff82b95b40 r ipp_shift +ffffffff82b95b5c r ipp_mask +ffffffff82b95bd0 r tf_regs +ffffffff82b96c10 r tf_shift +ffffffff82b96e94 r tf_mask +ffffffff82b978b0 r opp_regs +ffffffff82b97960 r opp_shift +ffffffff82b97998 r opp_mask +ffffffff82b97a70 r aux_engine_regs +ffffffff82b97ac0 r aux_mask +ffffffff82b97b20 r aux_shift +ffffffff82b97b40 r i2c_hw_regs +ffffffff82b97bb0 r i2c_shifts +ffffffff82b97bdc r i2c_masks +ffffffff82b97c80 r tg_regs +ffffffff82b97f00 r tg_shift +ffffffff82b97fc0 r tg_mask +ffffffff82b982c0 r mpc_regs +ffffffff82b98808 r mpc_shift +ffffffff82b98854 r mpc_mask +ffffffff82b9897c r hubbub_reg +ffffffff82b98af0 r hubbub_shift +ffffffff82b98b78 r hubbub_mask +ffffffff82b98da0 r audio_regs +ffffffff82b98df8 r audio_shift +ffffffff82b98e10 r audio_mask +ffffffff82b98e50 r stream_enc_regs +ffffffff82b990f8 r se_shift +ffffffff82b991d4 r se_mask +ffffffff82b99540 r hwseq_reg +ffffffff82b9975c r hwseq_shift +ffffffff82b997dc r hwseq_mask +ffffffff82b9a000 r dccg21_funcs +ffffffff82b9b000 r hubbub21_funcs +ffffffff82b9c000 r dcn21_funcs +ffffffff82b9c2c0 r dcn21_private_funcs +ffffffff82b9d000 r dcn21_mpll_cfg_ref +ffffffff82b9d190 r dcn21_link_enc_funcs +ffffffff82b9e000 r bios_regs +ffffffff82b9e008 r res_cap_rn +ffffffff82b9e048 r dcn21_res_pool_funcs +ffffffff82b9e128 r debug_defaults_drv +ffffffff82b9e2a0 r debug_defaults_diags +ffffffff82b9e420 r clk_src_regs +ffffffff82b9e5c4 r dccg_regs +ffffffff82b9e6b0 r dccg_shift +ffffffff82b9e748 r dccg_mask +ffffffff82b9e9a4 r dmcu_regs +ffffffff82b9ea00 r dmcu_shift +ffffffff82b9ea14 r dmcu_mask +ffffffff82b9ea60 r abm_regs +ffffffff82b9eaa0 r abm_shift +ffffffff82b9eab4 r abm_mask +ffffffff82b9eb00 r res_create_funcs +ffffffff82b9eb30 r res_create_maximus_funcs +ffffffff82b9eb60 r plane_cap +ffffffff82b9eb90 r panel_cntl_regs +ffffffff82b9ebb0 r panel_cntl_shift +ffffffff82b9ebc0 r panel_cntl_mask +ffffffff82b9ec00 r link_enc_regs +ffffffff82b9f260 r link_enc_aux_regs +ffffffff82b9f2b0 r link_enc_hpd_regs +ffffffff82b9f2c4 r le_shift +ffffffff82b9f3b4 r le_mask +ffffffff82b9f76c r link_enc_feature +ffffffff82b9f77c r panel_config_defaults +ffffffff82b9f7b0 r cs_shift +ffffffff82b9f7bc r cs_mask +ffffffff82b9f7f0 r hubp_regs +ffffffff82ba0020 r hubp_shift +ffffffff82ba011c r hubp_mask +ffffffff82ba0510 r ipp_regs +ffffffff82ba05f0 r ipp_shift +ffffffff82ba060c r ipp_mask +ffffffff82ba0680 r tf_regs +ffffffff82ba1740 r tf_shift +ffffffff82ba19c4 r tf_mask +ffffffff82ba23e0 r opp_regs +ffffffff82ba25f0 r opp_shift +ffffffff82ba2628 r opp_mask +ffffffff82ba2700 r tg_regs +ffffffff82ba2c00 r tg_shift +ffffffff82ba2cc0 r tg_mask +ffffffff82ba2fc0 r aux_engine_regs +ffffffff82ba3088 r aux_mask +ffffffff82ba30e8 r aux_shift +ffffffff82ba3100 r i2c_hw_regs +ffffffff82ba3218 r i2c_shifts +ffffffff82ba3244 r i2c_masks +ffffffff82ba32e8 r mpc_regs +ffffffff82ba3830 r mpc_shift +ffffffff82ba3878 r mpc_mask +ffffffff82ba398c r hubbub_reg +ffffffff82ba3b00 r hubbub_shift +ffffffff82ba3b88 r hubbub_mask +ffffffff82ba3db0 r vmid_regs +ffffffff82ba3f70 r vmid_shifts +ffffffff82ba3f78 r vmid_masks +ffffffff82ba3fa0 r dsc_regs +ffffffff82ba4438 r dsc_shift +ffffffff82ba44f0 r dsc_mask +ffffffff82ba47d0 r audio_regs +ffffffff82ba48d8 r audio_shift +ffffffff82ba48f0 r audio_mask +ffffffff82ba4930 r stream_enc_regs +ffffffff82ba4fd4 r se_shift +ffffffff82ba50b0 r se_mask +ffffffff82ba541c r hwseq_reg +ffffffff82ba5638 r hwseq_shift +ffffffff82ba56b8 r hwseq_mask +ffffffff82ba6000 r dccg3_funcs +ffffffff82ba7000 r dcn30_link_enc_funcs +ffffffff82ba8000 r dcn30_str_enc_funcs +ffffffff82ba9000 r dpp_input_csc_matrix +ffffffff82baa000 R dcn30_dwbc_funcs +ffffffff82bab000 r hubbub30_funcs +ffffffff82bad000 r dcn30_funcs +ffffffff82bad2c0 r dcn30_private_funcs +ffffffff82bae000 R dcn30_mmhubbub_funcs +ffffffff82baf000 R dcn30_mpc_funcs +ffffffff82bb0000 r bios_regs +ffffffff82bb0008 r res_cap_dcn3 +ffffffff82bb0048 r debug_defaults_drv +ffffffff82bb01c0 r debug_defaults_diags +ffffffff82bb0340 r clk_src_regs +ffffffff82bb0538 r dccg_regs +ffffffff82bb0624 r dccg_shift +ffffffff82bb06bc r dccg_mask +ffffffff82bb0920 r abm_regs +ffffffff82bb0aa0 r abm_shift +ffffffff82bb0ab4 r abm_mask +ffffffff82bb0b00 r res_create_funcs +ffffffff82bb0b30 r res_create_maximus_funcs +ffffffff82bb0b60 r plane_cap +ffffffff82bb0b90 r dcn30_res_pool_funcs +ffffffff82bb0c70 r panel_cntl_regs +ffffffff82bb0c90 r panel_cntl_shift +ffffffff82bb0ca0 r panel_cntl_mask +ffffffff82bb0ce0 r link_enc_regs +ffffffff82bb1480 r link_enc_aux_regs +ffffffff82bb14e0 r link_enc_hpd_regs +ffffffff82bb14f8 r le_shift +ffffffff82bb15e8 r le_mask +ffffffff82bb19a0 r link_enc_feature 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aux_engine_regs +ffffffff82bb9ec0 r aux_mask +ffffffff82bb9f20 r aux_shift +ffffffff82bb9f40 r i2c_hw_regs +ffffffff82bba090 r i2c_shifts +ffffffff82bba0bc r i2c_masks +ffffffff82bba160 r audio_regs +ffffffff82bba294 r audio_shift +ffffffff82bba2ac r audio_mask +ffffffff82bba2f0 r stream_enc_regs +ffffffff82bbaae8 r se_shift +ffffffff82bbabc4 r se_mask +ffffffff82bbaf30 r vpg_regs +ffffffff82bbafbc r vpg_shift +ffffffff82bbafe4 r vpg_mask +ffffffff82bbb080 r afmt_regs +ffffffff82bbb17c r afmt_shift +ffffffff82bbb190 r afmt_mask +ffffffff82bbb1d4 r hwseq_reg +ffffffff82bbb3f0 r hwseq_shift +ffffffff82bbb470 r hwseq_mask +ffffffff82bbc000 r dccg301_funcs +ffffffff82bbd000 r dcn301_link_enc_funcs +ffffffff82bbe000 r hubbub301_funcs +ffffffff82bbf000 r dcn301_funcs +ffffffff82bbf2c0 r dcn301_private_funcs +ffffffff82bc0000 r dcn301_link_panel_cntl_funcs +ffffffff82bc1000 r bios_regs +ffffffff82bc1008 r debug_defaults_drv +ffffffff82bc1180 r debug_defaults_diags +ffffffff82bc1300 r clk_src_regs +ffffffff82bc1450 r dccg_regs +ffffffff82bc153c r dccg_shift +ffffffff82bc15d4 r dccg_mask +ffffffff82bc1830 r abm_regs +ffffffff82bc1930 r abm_shift +ffffffff82bc1944 r abm_mask +ffffffff82bc1990 r res_create_funcs +ffffffff82bc19c0 r res_create_maximus_funcs +ffffffff82bc19f0 r plane_cap +ffffffff82bc1a20 r panel_cntl_regs +ffffffff82bc1a60 r panel_cntl_shift +ffffffff82bc1a70 r panel_cntl_mask +ffffffff82bc1ab0 r link_enc_regs +ffffffff82bc1fc0 r link_enc_aux_regs +ffffffff82bc2000 r link_enc_hpd_regs +ffffffff82bc2010 r le_shift +ffffffff82bc2100 r le_mask +ffffffff82bc24b8 r link_enc_feature +ffffffff82bc24c8 r cs_shift +ffffffff82bc24d4 r cs_mask +ffffffff82bc24fc r hubbub_reg +ffffffff82bc2670 r hubbub_shift +ffffffff82bc26f8 r hubbub_mask +ffffffff82bc2920 r vmid_regs +ffffffff82bc2ae0 r vmid_shifts +ffffffff82bc2ae8 r vmid_masks +ffffffff82bc2b10 r hubp_regs +ffffffff82bc3340 r hubp_shift +ffffffff82bc343c r hubp_mask +ffffffff82bc3830 r dpp_regs +ffffffff82bc4d30 r tf_shift +ffffffff82bc5000 r tf_mask +ffffffff82bc5b40 r opp_regs +ffffffff82bc5ca0 r opp_shift +ffffffff82bc5cd8 r opp_mask +ffffffff82bc5db0 r optc_regs +ffffffff82bc62b0 r optc_shift +ffffffff82bc6370 r optc_mask +ffffffff82bc6670 r mpc_regs +ffffffff82bc7e5c r mpc_shift +ffffffff82bc7f38 r mpc_mask +ffffffff82bc82b0 r dsc_regs +ffffffff82bc84fc r dsc_shift +ffffffff82bc85b4 r dsc_mask +ffffffff82bc8890 r dwbc30_regs +ffffffff82bc8a6c r dwbc30_shift +ffffffff82bc8ba0 r dwbc30_mask +ffffffff82bc9070 r mcif_wb30_regs +ffffffff82bc916c r mcif_wb30_shift +ffffffff82bc9218 r mcif_wb30_mask +ffffffff82bc94d0 r aux_engine_regs +ffffffff82bc9570 r aux_mask +ffffffff82bc95d0 r aux_shift +ffffffff82bc95f0 r i2c_hw_regs +ffffffff82bc96d0 r i2c_shifts +ffffffff82bc96fc r i2c_masks +ffffffff82bc97a0 r audio_regs +ffffffff82bc98d4 r audio_shift +ffffffff82bc98ec r audio_mask +ffffffff82bc9930 r stream_enc_regs +ffffffff82bc9e80 r se_shift +ffffffff82bc9f5c r se_mask +ffffffff82bca2d0 r vpg_regs +ffffffff82bca320 r vpg_shift +ffffffff82bca348 r vpg_mask +ffffffff82bca3e0 r afmt_regs +ffffffff82bca470 r afmt_shift +ffffffff82bca484 r afmt_mask +ffffffff82bca4c8 r hwseq_reg +ffffffff82bca6e4 r hwseq_shift +ffffffff82bca764 r hwseq_mask +ffffffff82bcb000 r bios_regs +ffffffff82bcb008 r res_cap_dcn302 +ffffffff82bcb048 r debug_defaults_drv +ffffffff82bcb1c0 r debug_defaults_diags +ffffffff82bcb340 r clk_src_regs +ffffffff82bcb4e4 r dccg_regs +ffffffff82bcb5d0 r dccg_shift +ffffffff82bcb668 r dccg_mask +ffffffff82bcb8d0 r abm_regs +ffffffff82bcba10 r abm_shift +ffffffff82bcba24 r abm_mask +ffffffff82bcba70 r res_create_funcs +ffffffff82bcbaa0 r res_create_maximus_funcs +ffffffff82bcbad0 r plane_cap +ffffffff82bcbb00 r panel_cntl_regs +ffffffff82bcbb20 r panel_cntl_shift +ffffffff82bcbb30 r panel_cntl_mask +ffffffff82bcbb70 r link_enc_regs +ffffffff82bcc1d0 r link_enc_aux_regs +ffffffff82bcc220 r link_enc_hpd_regs +ffffffff82bcc234 r le_shift +ffffffff82bcc324 r le_mask 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r mcif_wb30_mask +ffffffff82bd4170 r aux_engine_regs +ffffffff82bd4238 r aux_mask +ffffffff82bd4298 r aux_shift +ffffffff82bd42b0 r i2c_hw_regs +ffffffff82bd43c8 r i2c_shifts +ffffffff82bd43f4 r i2c_masks +ffffffff82bd44a0 r audio_regs +ffffffff82bd45d4 r audio_shift +ffffffff82bd45ec r audio_mask +ffffffff82bd4630 r stream_enc_regs +ffffffff82bd4cd4 r se_shift +ffffffff82bd4db0 r se_mask +ffffffff82bd5120 r vpg_regs +ffffffff82bd5198 r vpg_shift +ffffffff82bd51c0 r vpg_mask +ffffffff82bd5260 r afmt_regs +ffffffff82bd5338 r afmt_shift +ffffffff82bd534c r afmt_mask +ffffffff82bd5390 r hwseq_reg +ffffffff82bd55ac r hwseq_shift +ffffffff82bd562c r hwseq_mask +ffffffff82bd6000 r bios_regs +ffffffff82bd6008 r res_cap_dcn303 +ffffffff82bd6048 r debug_defaults_drv +ffffffff82bd61c0 r debug_defaults_diags +ffffffff82bd6340 r clk_src_regs +ffffffff82bd63e8 r dccg_regs +ffffffff82bd64d4 r dccg_shift +ffffffff82bd656c r dccg_mask +ffffffff82bd67d0 r abm_regs +ffffffff82bd6850 r abm_shift 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+ffffffff82bd9d40 r optc_shift +ffffffff82bd9e00 r optc_mask +ffffffff82bda100 r mpc_regs +ffffffff82bdb8ec r mpc_shift +ffffffff82bdb9c8 r mpc_mask +ffffffff82bdbd40 r dsc_regs +ffffffff82bdbec8 r dsc_shift +ffffffff82bdbf80 r dsc_mask +ffffffff82bdc260 r dwbc30_regs +ffffffff82bdc43c r dwbc30_shift +ffffffff82bdc570 r dwbc30_mask +ffffffff82bdca40 r mcif_wb30_regs +ffffffff82bdcb3c r mcif_wb30_shift +ffffffff82bdcbe8 r mcif_wb30_mask +ffffffff82bdcea0 r aux_engine_regs +ffffffff82bdcef0 r aux_mask +ffffffff82bdcf50 r aux_shift +ffffffff82bdcf70 r i2c_hw_regs +ffffffff82bdcfe0 r i2c_shifts +ffffffff82bdd00c r i2c_masks +ffffffff82bdd0b0 r audio_regs +ffffffff82bdd1e4 r audio_shift +ffffffff82bdd1fc r audio_mask +ffffffff82bdd240 r stream_enc_regs +ffffffff82bdd4e8 r se_shift +ffffffff82bdd5c4 r se_mask +ffffffff82bdd930 r vpg_regs +ffffffff82bdd96c r vpg_shift +ffffffff82bdd994 r vpg_mask +ffffffff82bdda30 r afmt_regs +ffffffff82bdda9c r afmt_shift +ffffffff82bddab0 r afmt_mask +ffffffff82bddaf4 r hwseq_reg +ffffffff82bddd10 r hwseq_shift +ffffffff82bddd90 r hwseq_mask +ffffffff82bde000 r dccg31_funcs +ffffffff82bdf000 r dcn31_link_enc_funcs +ffffffff82be0000 r dcn30_str_enc_funcs +ffffffff82be1000 r hubbub31_funcs +ffffffff82be2000 r dcn31_funcs +ffffffff82be22c0 r dcn31_private_funcs +ffffffff82be3000 r dcn31_link_panel_cntl_funcs +ffffffff82be4000 r bios_regs +ffffffff82be4008 r res_cap_dcn31 +ffffffff82be4048 r debug_defaults_diags +ffffffff82be41c0 r clk_src_regs +ffffffff82be4370 r clk_src_regs_b0 +ffffffff82be4514 r dccg_regs +ffffffff82be4600 r dccg_shift +ffffffff82be4698 r dccg_mask +ffffffff82be4900 r abm_regs +ffffffff82be4a00 r abm_shift +ffffffff82be4a14 r abm_mask +ffffffff82be4a60 r res_create_funcs +ffffffff82be4a90 r res_create_maximus_funcs +ffffffff82be4ac0 r plane_cap +ffffffff82be4af0 r link_enc_regs +ffffffff82be5150 r link_enc_aux_regs +ffffffff82be51a0 r link_enc_hpd_regs +ffffffff82be51b4 r le_shift +ffffffff82be52a4 r le_mask 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+ffffffff82bec3c0 r mcif_wb30_regs +ffffffff82bec4bc r mcif_wb30_shift +ffffffff82bec568 r mcif_wb30_mask +ffffffff82bec820 r aux_engine_regs +ffffffff82bec8e8 r aux_mask +ffffffff82bec948 r aux_shift +ffffffff82bec960 r i2c_hw_regs +ffffffff82beca78 r i2c_shifts +ffffffff82becaa4 r i2c_masks +ffffffff82becb50 r audio_regs +ffffffff82becc84 r audio_shift +ffffffff82becc9c r audio_mask +ffffffff82beccd8 r se_shift +ffffffff82becdb4 r se_mask +ffffffff82bed120 r vpg_regs +ffffffff82bed210 r vpg_shift +ffffffff82bed238 r vpg_mask +ffffffff82bed2e0 r afmt_regs +ffffffff82bed3b8 r afmt_shift +ffffffff82bed3cc r afmt_mask +ffffffff82bed420 r stream_enc_regs +ffffffff82beeac0 r hpo_dp_stream_enc_regs +ffffffff82beecf0 r hpo_dp_se_shift +ffffffff82beed18 r hpo_dp_se_mask +ffffffff82beedc0 r apg_regs +ffffffff82beee00 r apg_shift +ffffffff82beee08 r apg_mask +ffffffff82beee20 r hpo_dp_link_enc_regs +ffffffff82beef30 r hpo_dp_le_shift +ffffffff82beef4c r hpo_dp_le_mask +ffffffff82beefb0 r hwseq_reg +ffffffff82bef1cc r hwseq_shift +ffffffff82bef24c r hwseq_mask +ffffffff82bf0000 r dccg314_funcs +ffffffff82bf1000 r dcn314_str_enc_funcs +ffffffff82bf2000 r dcn314_funcs +ffffffff82bf22c0 r dcn314_private_funcs +ffffffff82bf3000 r bios_regs +ffffffff82bf3008 r res_cap_dcn314 +ffffffff82bf3048 r debug_defaults_diags +ffffffff82bf31c0 r clk_src_regs +ffffffff82bf3364 r dccg_regs +ffffffff82bf3450 r dccg_shift +ffffffff82bf34e8 r dccg_mask +ffffffff82bf3750 r abm_regs +ffffffff82bf3850 r abm_shift +ffffffff82bf3864 r abm_mask +ffffffff82bf38b0 r res_create_funcs +ffffffff82bf38e0 r res_create_maximus_funcs +ffffffff82bf3910 r plane_cap +ffffffff82bf3940 r link_enc_regs +ffffffff82bf3fa0 r link_enc_aux_regs +ffffffff82bf3ff0 r link_enc_hpd_regs +ffffffff82bf4004 r le_shift +ffffffff82bf40f4 r le_mask +ffffffff82bf44ac r link_enc_feature +ffffffff82bf44bc r panel_config_defaults +ffffffff82bf44f0 r debug_defaults_drv +ffffffff82bf4668 r cs_shift +ffffffff82bf4674 r cs_mask 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+ffffffff82bfb858 r aux_shift +ffffffff82bfb870 r i2c_hw_regs +ffffffff82bfb988 r i2c_shifts +ffffffff82bfb9b4 r i2c_masks +ffffffff82bfba60 r audio_regs +ffffffff82bfbb94 r audio_shift +ffffffff82bfbbac r audio_mask +ffffffff82bfbbf0 r stream_enc_regs +ffffffff82bfc294 r se_shift +ffffffff82bfc370 r se_mask +ffffffff82bfc6e0 r vpg_regs +ffffffff82bfc7d0 r vpg_shift +ffffffff82bfc7f8 r vpg_mask +ffffffff82bfc8a0 r afmt_regs +ffffffff82bfc978 r afmt_shift +ffffffff82bfc98c r afmt_mask +ffffffff82bfc9e0 r hpo_dp_stream_enc_regs +ffffffff82bfcc10 r hpo_dp_se_shift +ffffffff82bfcc38 r hpo_dp_se_mask +ffffffff82bfcce0 r apg_regs +ffffffff82bfcd20 r apg_shift +ffffffff82bfcd28 r apg_mask +ffffffff82bfcd40 r hpo_dp_link_enc_regs +ffffffff82bfce50 r hpo_dp_le_shift +ffffffff82bfce6c r hpo_dp_le_mask +ffffffff82bfced0 r hwseq_reg +ffffffff82bfd0ec r hwseq_shift +ffffffff82bfd16c r hwseq_mask +ffffffff82bfe000 r bios_regs +ffffffff82bfe008 r res_cap_dcn31 +ffffffff82bfe048 r debug_defaults_diags +ffffffff82bfe1c0 r clk_src_regs +ffffffff82bfe364 r dccg_regs +ffffffff82bfe450 r dccg_shift +ffffffff82bfe4e8 r dccg_mask +ffffffff82bfe750 r abm_regs +ffffffff82bfe850 r abm_shift +ffffffff82bfe864 r abm_mask +ffffffff82bfe8b0 r res_create_funcs +ffffffff82bfe8e0 r res_create_maximus_funcs +ffffffff82bfe910 r plane_cap +ffffffff82bfe940 r link_enc_regs +ffffffff82bfefa0 r link_enc_aux_regs +ffffffff82bfeff0 r link_enc_hpd_regs +ffffffff82bff004 r le_shift +ffffffff82bff0f4 r le_mask +ffffffff82bff4ac r link_enc_feature +ffffffff82bff4bc r panel_config_defaults +ffffffff82bff4f0 r debug_defaults_drv +ffffffff82bff668 r cs_shift +ffffffff82bff674 r cs_mask +ffffffff82bff69c r hubbub_reg +ffffffff82bff810 r hubbub_shift +ffffffff82bff898 r hubbub_mask +ffffffff82bffac0 r vmid_regs +ffffffff82bffc80 r vmid_shifts +ffffffff82bffc88 r vmid_masks +ffffffff82bffcb0 r hubp_regs +ffffffff82c004e0 r hubp_shift +ffffffff82c005dc r hubp_mask +ffffffff82c009d0 r dpp_regs +ffffffff82c01ed0 r tf_shift +ffffffff82c021a0 r tf_mask +ffffffff82c02ce0 r opp_regs +ffffffff82c02e40 r opp_shift +ffffffff82c02e78 r opp_mask +ffffffff82c02f50 r optc_regs +ffffffff82c03450 r optc_shift +ffffffff82c03510 r optc_mask +ffffffff82c03810 r mpc_regs +ffffffff82c04ffc r mpc_shift +ffffffff82c050d8 r mpc_mask +ffffffff82c05450 r dsc_regs +ffffffff82c0569c r dsc_shift +ffffffff82c05754 r dsc_mask +ffffffff82c05a30 r dwbc30_regs +ffffffff82c05c0c r dwbc30_shift +ffffffff82c05d40 r dwbc30_mask +ffffffff82c06210 r mcif_wb30_regs +ffffffff82c0630c r mcif_wb30_shift +ffffffff82c063b8 r mcif_wb30_mask +ffffffff82c06670 r aux_engine_regs +ffffffff82c06738 r aux_mask +ffffffff82c06798 r aux_shift +ffffffff82c067b0 r i2c_hw_regs +ffffffff82c068c8 r i2c_shifts +ffffffff82c068f4 r i2c_masks +ffffffff82c069a0 r audio_regs +ffffffff82c06ad4 r audio_shift +ffffffff82c06aec r audio_mask +ffffffff82c06b30 r stream_enc_regs +ffffffff82c071d4 r se_shift +ffffffff82c072b0 r se_mask +ffffffff82c07620 r vpg_regs +ffffffff82c07710 r vpg_shift +ffffffff82c07738 r vpg_mask +ffffffff82c077e0 r afmt_regs +ffffffff82c078b8 r afmt_shift +ffffffff82c078cc r afmt_mask +ffffffff82c07920 r hpo_dp_stream_enc_regs +ffffffff82c07b50 r hpo_dp_se_shift +ffffffff82c07b78 r hpo_dp_se_mask +ffffffff82c07c20 r apg_regs +ffffffff82c07c60 r apg_shift +ffffffff82c07c68 r apg_mask +ffffffff82c07c80 r hpo_dp_link_enc_regs +ffffffff82c07d90 r hpo_dp_le_shift +ffffffff82c07dac r hpo_dp_le_mask +ffffffff82c07e10 r hwseq_reg +ffffffff82c0802c r hwseq_shift +ffffffff82c080ac r hwseq_mask +ffffffff82c09000 r bios_regs +ffffffff82c09008 r res_cap_dcn31 +ffffffff82c09048 r debug_defaults_diags +ffffffff82c091c0 r clk_src_regs +ffffffff82c09364 r dccg_regs +ffffffff82c09450 r dccg_shift +ffffffff82c094e8 r dccg_mask +ffffffff82c09750 r abm_regs +ffffffff82c09850 r abm_shift +ffffffff82c09864 r abm_mask +ffffffff82c098b0 r res_create_funcs +ffffffff82c098e0 r res_create_maximus_funcs +ffffffff82c09910 r plane_cap +ffffffff82c09940 r link_enc_regs +ffffffff82c09fa0 r link_enc_aux_regs +ffffffff82c09ff0 r link_enc_hpd_regs +ffffffff82c0a004 r le_shift +ffffffff82c0a0f4 r le_mask +ffffffff82c0a4ac r link_enc_feature +ffffffff82c0a4bc r panel_config_defaults +ffffffff82c0a4f0 r debug_defaults_drv +ffffffff82c0a668 r cs_shift +ffffffff82c0a674 r cs_mask +ffffffff82c0a69c r hubbub_reg +ffffffff82c0a810 r hubbub_shift +ffffffff82c0a898 r hubbub_mask +ffffffff82c0aac0 r vmid_regs +ffffffff82c0ac80 r vmid_shifts +ffffffff82c0ac88 r vmid_masks +ffffffff82c0acb0 r hubp_regs +ffffffff82c0b4e0 r hubp_shift +ffffffff82c0b5dc r hubp_mask +ffffffff82c0b9d0 r dpp_regs +ffffffff82c0ced0 r tf_shift +ffffffff82c0d1a0 r tf_mask +ffffffff82c0dce0 r opp_regs +ffffffff82c0de40 r opp_shift +ffffffff82c0de78 r opp_mask +ffffffff82c0df50 r optc_regs +ffffffff82c0e450 r optc_shift +ffffffff82c0e510 r optc_mask +ffffffff82c0e810 r mpc_regs +ffffffff82c0fffc r mpc_shift +ffffffff82c100d8 r mpc_mask +ffffffff82c10450 r dsc_regs +ffffffff82c1069c r dsc_shift +ffffffff82c10754 r dsc_mask +ffffffff82c10a30 r dwbc30_regs +ffffffff82c10c0c r dwbc30_shift +ffffffff82c10d40 r dwbc30_mask +ffffffff82c11210 r mcif_wb30_regs +ffffffff82c1130c r mcif_wb30_shift +ffffffff82c113b8 r mcif_wb30_mask +ffffffff82c11670 r aux_engine_regs +ffffffff82c11738 r aux_mask +ffffffff82c11798 r aux_shift +ffffffff82c117b0 r i2c_hw_regs +ffffffff82c118c8 r i2c_shifts +ffffffff82c118f4 r i2c_masks +ffffffff82c119a0 r audio_regs +ffffffff82c11ad4 r audio_shift +ffffffff82c11aec r audio_mask +ffffffff82c11b30 r stream_enc_regs +ffffffff82c121d4 r se_shift +ffffffff82c122b0 r se_mask +ffffffff82c12620 r vpg_regs +ffffffff82c12710 r vpg_shift +ffffffff82c12738 r vpg_mask +ffffffff82c127e0 r afmt_regs +ffffffff82c128b8 r afmt_shift +ffffffff82c128cc r afmt_mask +ffffffff82c12920 r hpo_dp_stream_enc_regs +ffffffff82c12b50 r hpo_dp_se_shift +ffffffff82c12b78 r hpo_dp_se_mask +ffffffff82c12c20 r apg_regs +ffffffff82c12c60 r apg_shift +ffffffff82c12c68 r apg_mask +ffffffff82c12c80 r hpo_dp_link_enc_regs +ffffffff82c12d90 r hpo_dp_le_shift +ffffffff82c12dac r hpo_dp_le_mask +ffffffff82c12e10 r hwseq_reg +ffffffff82c1302c r hwseq_shift +ffffffff82c130ac r hwseq_mask +ffffffff82c14000 r dccg32_funcs +ffffffff82c15000 r dcn32_link_enc_funcs +ffffffff82c16000 r dcn32_str_enc_funcs +ffffffff82c17000 r hubbub32_funcs +ffffffff82c18000 r dcn32_funcs +ffffffff82c182c0 r dcn32_private_funcs +ffffffff82c19000 R dcn32_mmhubbub_funcs +ffffffff82c1a000 R dcn32_mpc_funcs +ffffffff82c1b000 r res_cap_dcn32 +ffffffff82c1b040 r debug_defaults_diags +ffffffff82c1b1b8 r dccg_shift +ffffffff82c1b250 r dccg_mask +ffffffff82c1b4ac r abm_shift +ffffffff82c1b4c0 r abm_mask +ffffffff82c1b508 r res_create_funcs +ffffffff82c1b538 r res_create_maximus_funcs +ffffffff82c1b568 r plane_cap +ffffffff82c1b594 r le_shift +ffffffff82c1b684 r le_mask +ffffffff82c1ba3c r link_enc_feature +ffffffff82c1ba50 r debug_defaults_drv +ffffffff82c1bbc8 r cs_shift +ffffffff82c1bbd4 r cs_mask +ffffffff82c1bbfc r hubbub_shift +ffffffff82c1bc84 r hubbub_mask +ffffffff82c1bea0 r vmid_shifts +ffffffff82c1bea8 r vmid_masks +ffffffff82c1bec8 r hubp_shift +ffffffff82c1bfc4 r hubp_mask +ffffffff82c1c3b4 r tf_shift +ffffffff82c1c684 r tf_mask +ffffffff82c1d1c4 r opp_shift +ffffffff82c1d1fc r opp_mask +ffffffff82c1d2d0 r optc_shift +ffffffff82c1d390 r optc_mask +ffffffff82c1d690 r mpc_shift +ffffffff82c1d76c r mpc_mask +ffffffff82c1dad8 r dsc_shift +ffffffff82c1db90 r dsc_mask +ffffffff82c1de68 r dwbc30_shift +ffffffff82c1df9c r dwbc30_mask +ffffffff82c1e464 r mcif_wb30_shift +ffffffff82c1e510 r mcif_wb30_mask +ffffffff82c1e7bc r aux_mask +ffffffff82c1e81c r aux_shift +ffffffff82c1e834 r i2c_shifts +ffffffff82c1e860 r i2c_masks +ffffffff82c1e904 r audio_shift +ffffffff82c1e91c r audio_mask +ffffffff82c1e958 r se_shift +ffffffff82c1ea34 r se_mask +ffffffff82c1eda0 r vpg_shift +ffffffff82c1edc8 r vpg_mask +ffffffff82c1ee5c r afmt_shift +ffffffff82c1ee70 r afmt_mask +ffffffff82c1eeb4 r hpo_dp_se_shift +ffffffff82c1eedc r hpo_dp_se_mask +ffffffff82c1ef7c r apg_shift +ffffffff82c1ef84 r apg_mask +ffffffff82c1ef9c r hpo_dp_le_shift +ffffffff82c1efb8 r hpo_dp_le_mask +ffffffff82c1f01c r hwseq_shift +ffffffff82c1f09c r hwseq_mask +ffffffff82c20000 r dcn321_link_enc_funcs +ffffffff82c21000 r res_cap_dcn321 +ffffffff82c21040 r debug_defaults_diags +ffffffff82c211b8 r dccg_shift +ffffffff82c21250 r dccg_mask +ffffffff82c214ac r abm_shift +ffffffff82c214c0 r abm_mask +ffffffff82c21508 r res_create_funcs +ffffffff82c21538 r res_create_maximus_funcs +ffffffff82c21568 r plane_cap +ffffffff82c21594 r le_shift +ffffffff82c21684 r le_mask +ffffffff82c21a3c r link_enc_feature +ffffffff82c21a50 r debug_defaults_drv +ffffffff82c21bc8 r cs_shift +ffffffff82c21bd4 r cs_mask +ffffffff82c21bfc r hubbub_shift +ffffffff82c21c84 r hubbub_mask +ffffffff82c21ea0 r vmid_shifts +ffffffff82c21ea8 r vmid_masks +ffffffff82c21ec8 r hubp_shift +ffffffff82c21fc4 r hubp_mask +ffffffff82c223b4 r tf_shift +ffffffff82c22684 r tf_mask +ffffffff82c231c4 r opp_shift +ffffffff82c231fc r opp_mask +ffffffff82c232d0 r optc_shift +ffffffff82c23390 r optc_mask +ffffffff82c23690 r mpc_shift +ffffffff82c2376c r mpc_mask +ffffffff82c23ad8 r dsc_shift +ffffffff82c23b90 r dsc_mask +ffffffff82c23e68 r dwbc30_shift +ffffffff82c23f9c r dwbc30_mask +ffffffff82c24464 r mcif_wb30_shift +ffffffff82c24510 r mcif_wb30_mask +ffffffff82c247bc r aux_mask +ffffffff82c2481c r aux_shift +ffffffff82c24834 r i2c_shifts +ffffffff82c24860 r i2c_masks +ffffffff82c24904 r audio_shift +ffffffff82c2491c r audio_mask +ffffffff82c24958 r se_shift +ffffffff82c24a34 r se_mask +ffffffff82c24da0 r vpg_shift +ffffffff82c24dc8 r vpg_mask +ffffffff82c24e5c r afmt_shift +ffffffff82c24e70 r afmt_mask +ffffffff82c24eb4 r hpo_dp_se_shift +ffffffff82c24edc r hpo_dp_se_mask +ffffffff82c24f7c r apg_shift +ffffffff82c24f84 r apg_mask +ffffffff82c24f9c r hpo_dp_le_shift +ffffffff82c24fb8 r hpo_dp_le_mask +ffffffff82c2501c r hwseq_shift +ffffffff82c2509c r hwseq_mask +ffffffff82c27000 R dcn10_soc_defaults +ffffffff82c2708c R dcn10_ip_defaults +ffffffff82c32000 R dml20_funcs +ffffffff82c32030 R dml20v2_funcs +ffffffff82c32060 R dml21_funcs +ffffffff82c32090 R dml30_funcs +ffffffff82c320c0 R dml31_funcs +ffffffff82c320f0 R dml314_funcs +ffffffff82c32120 R dml32_funcs +ffffffff82c35000 R qp_table_422_10bpc_min +ffffffff82c35740 R qp_table_444_8bpc_max +ffffffff82c36080 R qp_table_420_12bpc_max +ffffffff82c367c0 R qp_table_444_10bpc_min +ffffffff82c37400 R qp_table_420_8bpc_max +ffffffff82c37840 R qp_table_444_8bpc_min +ffffffff82c38180 R qp_table_444_12bpc_min +ffffffff82c390c0 R qp_table_420_12bpc_min +ffffffff82c39800 R qp_table_422_12bpc_min +ffffffff82c3a140 R qp_table_422_12bpc_max +ffffffff82c3aa80 R qp_table_444_12bpc_max +ffffffff82c3b9c0 R qp_table_420_8bpc_min +ffffffff82c3be00 R qp_table_422_8bpc_min +ffffffff82c3c340 R qp_table_422_10bpc_max +ffffffff82c3ca80 R qp_table_420_10bpc_max +ffffffff82c3d040 R qp_table_420_10bpc_min +ffffffff82c3d600 R qp_table_444_10bpc_max +ffffffff82c3e240 R qp_table_422_8bpc_max ffffffff82c40000 r funcs +ffffffff82c40050 r hpd_regs +ffffffff82c401a0 r hpd_shift +ffffffff82c401b0 r hpd_mask +ffffffff82c401c0 r ddc_data_regs +ffffffff82c403a0 r ddc_clk_regs +ffffffff82c40580 r ddc_shift +ffffffff82c405a8 r ddc_mask ffffffff82c41000 r funcs -ffffffff82c41050 r hpd_regs -ffffffff82c411a0 r hpd_shift -ffffffff82c411b0 r hpd_mask -ffffffff82c411c0 r ddc_data_regs -ffffffff82c413a0 r ddc_clk_regs -ffffffff82c41580 r ddc_shift -ffffffff82c415a8 r ddc_mask ffffffff82c42000 r funcs +ffffffff82c42050 r hpd_regs +ffffffff82c421a0 r hpd_shift +ffffffff82c421b0 r hpd_mask +ffffffff82c421c0 r ddc_data_regs +ffffffff82c423a0 r ddc_clk_regs +ffffffff82c42580 r ddc_shift +ffffffff82c425a8 r ddc_mask ffffffff82c43000 r funcs -ffffffff82c43050 r hpd_regs -ffffffff82c431a0 r hpd_shift -ffffffff82c431b0 r hpd_mask -ffffffff82c431c0 r ddc_data_regs -ffffffff82c433a0 r ddc_clk_regs -ffffffff82c43580 r ddc_shift -ffffffff82c435a8 r ddc_mask ffffffff82c44000 r funcs +ffffffff82c44050 r hpd_regs +ffffffff82c441a0 r hpd_shift +ffffffff82c441b0 r hpd_mask +ffffffff82c441c0 r ddc_data_regs +ffffffff82c443a0 r ddc_clk_regs +ffffffff82c44580 r ddc_shift +ffffffff82c445a8 r ddc_mask ffffffff82c45000 r funcs -ffffffff82c45050 r hpd_regs -ffffffff82c451a0 r hpd_shift -ffffffff82c451b0 r hpd_mask -ffffffff82c451c0 r ddc_data_regs -ffffffff82c453a0 r ddc_clk_regs -ffffffff82c45580 r ddc_shift -ffffffff82c455a8 r ddc_mask -ffffffff82c455d0 r generic_regs -ffffffff82c45640 r generic_shift -ffffffff82c45650 r generic_mask ffffffff82c46000 r funcs +ffffffff82c46050 r hpd_regs +ffffffff82c461a0 r hpd_shift +ffffffff82c461b0 r hpd_mask +ffffffff82c461c0 r ddc_data_regs +ffffffff82c463a0 r ddc_clk_regs +ffffffff82c46580 r ddc_shift +ffffffff82c465a8 r ddc_mask +ffffffff82c465d0 r generic_regs +ffffffff82c46640 r generic_shift +ffffffff82c46650 r generic_mask ffffffff82c47000 r funcs -ffffffff82c47050 r hpd_regs -ffffffff82c471a0 r hpd_shift -ffffffff82c471b0 r hpd_mask -ffffffff82c471c0 r ddc_data_regs_dcn -ffffffff82c47370 r ddc_clk_regs_dcn -ffffffff82c47520 r ddc_shift -ffffffff82c47640 r ddc_mask -ffffffff82c47760 r generic_regs -ffffffff82c477d0 r generic_shift -ffffffff82c477e0 r generic_mask ffffffff82c48000 r funcs +ffffffff82c48050 r hpd_regs +ffffffff82c481a0 r hpd_shift +ffffffff82c481b0 r hpd_mask +ffffffff82c481c0 r ddc_data_regs_dcn +ffffffff82c48370 r ddc_clk_regs_dcn +ffffffff82c48520 r ddc_shift +ffffffff82c48640 r ddc_mask +ffffffff82c48760 r generic_regs +ffffffff82c487d0 r generic_shift +ffffffff82c487e0 r generic_mask ffffffff82c49000 r funcs -ffffffff82c49050 r hpd_regs -ffffffff82c49168 r hpd_shift -ffffffff82c49178 r hpd_mask -ffffffff82c49190 r ddc_data_regs_dcn -ffffffff82c492c0 r ddc_clk_regs_dcn -ffffffff82c493f0 r ddc_shift -ffffffff82c494e0 r ddc_mask -ffffffff82c495d0 r generic_regs -ffffffff82c49604 r generic_shift -ffffffff82c4960c r generic_mask ffffffff82c4a000 r funcs +ffffffff82c4a050 r hpd_regs +ffffffff82c4a168 r hpd_shift +ffffffff82c4a178 r hpd_mask +ffffffff82c4a190 r ddc_data_regs_dcn +ffffffff82c4a2c0 r ddc_clk_regs_dcn +ffffffff82c4a3f0 r ddc_shift +ffffffff82c4a4e0 r ddc_mask +ffffffff82c4a5d0 r generic_regs +ffffffff82c4a604 r generic_shift +ffffffff82c4a60c r generic_mask ffffffff82c4b000 r funcs -ffffffff82c4b050 r hpd_regs -ffffffff82c4b1a0 r hpd_shift -ffffffff82c4b1b0 r hpd_mask -ffffffff82c4b1c0 r ddc_data_regs_dcn -ffffffff82c4b370 r ddc_clk_regs_dcn -ffffffff82c4b520 r ddc_shift -ffffffff82c4b640 r ddc_mask -ffffffff82c4b760 r generic_regs -ffffffff82c4b7d0 r generic_shift -ffffffff82c4b7e0 r generic_mask ffffffff82c4c000 r funcs +ffffffff82c4c050 r hpd_regs +ffffffff82c4c1a0 r hpd_shift +ffffffff82c4c1b0 r hpd_mask +ffffffff82c4c1c0 r ddc_data_regs_dcn +ffffffff82c4c370 r ddc_clk_regs_dcn +ffffffff82c4c520 r ddc_shift +ffffffff82c4c640 r ddc_mask +ffffffff82c4c760 r generic_regs +ffffffff82c4c7d0 r generic_shift +ffffffff82c4c7e0 r generic_mask ffffffff82c4d000 r funcs -ffffffff82c4d050 r hpd_regs -ffffffff82c4d168 r hpd_shift -ffffffff82c4d178 r hpd_mask -ffffffff82c4d190 r ddc_data_regs_dcn -ffffffff82c4d300 r ddc_clk_regs_dcn -ffffffff82c4d470 r ddc_shift -ffffffff82c4d560 r ddc_mask -ffffffff82c4d650 r generic_regs -ffffffff82c4d6c0 r generic_shift -ffffffff82c4d6d0 r generic_mask ffffffff82c4e000 r funcs +ffffffff82c4e050 r hpd_regs +ffffffff82c4e168 r hpd_shift +ffffffff82c4e178 r hpd_mask +ffffffff82c4e190 r ddc_data_regs_dcn +ffffffff82c4e300 r ddc_clk_regs_dcn +ffffffff82c4e470 r ddc_shift +ffffffff82c4e560 r ddc_mask +ffffffff82c4e650 r generic_regs +ffffffff82c4e6c0 r generic_shift +ffffffff82c4e6d0 r generic_mask ffffffff82c4f000 r funcs -ffffffff82c4f050 r hpd_regs -ffffffff82c4f168 r hpd_shift -ffffffff82c4f178 r hpd_mask -ffffffff82c4f190 r ddc_data_regs_dcn -ffffffff82c4f340 r ddc_clk_regs_dcn -ffffffff82c4f4f0 r ddc_shift -ffffffff82c4f610 r ddc_mask -ffffffff82c4f730 r generic_regs -ffffffff82c4f7a0 r generic_shift -ffffffff82c4f7b0 r generic_mask ffffffff82c50000 r funcs +ffffffff82c50050 r hpd_regs +ffffffff82c50168 r hpd_shift +ffffffff82c50178 r hpd_mask +ffffffff82c50190 r ddc_data_regs_dcn +ffffffff82c50340 r ddc_clk_regs_dcn +ffffffff82c504f0 r ddc_shift +ffffffff82c50610 r ddc_mask +ffffffff82c50730 r generic_regs +ffffffff82c507a0 r generic_shift +ffffffff82c507b0 r generic_mask ffffffff82c51000 r funcs ffffffff82c52000 r funcs ffffffff82c53000 r funcs -ffffffff82c54000 r hdmi_14_protection -ffffffff82c54010 r dp_11_protection -ffffffff82c54020 r hdcp_i2c_offsets -ffffffff82c54050 r hdcp_dpcd_addrs -ffffffff82c55000 r irq_service_funcs_dce110 -ffffffff82c55010 r irq_source_info_dce110 -ffffffff82c562a0 r dummy_irq_info_funcs -ffffffff82c562b0 r hpd_irq_info_funcs -ffffffff82c562c0 r hpd_rx_irq_info_funcs -ffffffff82c562d0 r pflip_irq_info_funcs -ffffffff82c562e0 r vupdate_irq_info_funcs -ffffffff82c562f0 r vblank_irq_info_funcs -ffffffff82c57000 r irq_service_funcs_dce120 -ffffffff82c57008 r dummy_irq_info_funcs -ffffffff82c57018 r hpd_irq_info_funcs -ffffffff82c57028 r hpd_rx_irq_info_funcs -ffffffff82c57038 r pflip_irq_info_funcs -ffffffff82c57048 r vupdate_irq_info_funcs -ffffffff82c57058 r vblank_irq_info_funcs -ffffffff82c57070 r irq_source_info_dce120 -ffffffff82c59000 r irq_service_funcs_dce80 -ffffffff82c59008 r dummy_irq_info_funcs -ffffffff82c59018 r hpd_irq_info_funcs -ffffffff82c59028 r hpd_rx_irq_info_funcs -ffffffff82c59038 r pflip_irq_info_funcs -ffffffff82c59048 r vupdate_irq_info_funcs -ffffffff82c59058 r vblank_irq_info_funcs -ffffffff82c59070 r irq_source_info_dce80 -ffffffff82c5b000 r irq_service_funcs_dcn10 -ffffffff82c5b008 r dummy_irq_info_funcs -ffffffff82c5b018 r hpd_irq_info_funcs -ffffffff82c5b028 r hpd_rx_irq_info_funcs -ffffffff82c5b038 r pflip_irq_info_funcs -ffffffff82c5b048 r vupdate_no_lock_irq_info_funcs -ffffffff82c5b058 r vblank_irq_info_funcs -ffffffff82c5b068 r vline0_irq_info_funcs -ffffffff82c5b080 r irq_source_info_dcn10 -ffffffff82c5d000 r irq_service_funcs_dcn20 -ffffffff82c5d008 r dummy_irq_info_funcs -ffffffff82c5d018 r hpd_irq_info_funcs -ffffffff82c5d028 r hpd_rx_irq_info_funcs -ffffffff82c5d038 r pflip_irq_info_funcs -ffffffff82c5d048 r vupdate_no_lock_irq_info_funcs -ffffffff82c5d058 r vblank_irq_info_funcs -ffffffff82c5d068 r vline0_irq_info_funcs -ffffffff82c5d080 r irq_source_info_dcn20 -ffffffff82c5f000 r irq_service_funcs_dcn201 -ffffffff82c5f008 r dummy_irq_info_funcs -ffffffff82c5f018 r hpd_irq_info_funcs -ffffffff82c5f028 r hpd_rx_irq_info_funcs -ffffffff82c5f038 r pflip_irq_info_funcs -ffffffff82c5f048 r vupdate_no_lock_irq_info_funcs -ffffffff82c5f058 r vblank_irq_info_funcs -ffffffff82c5f068 r vline0_irq_info_funcs -ffffffff82c5f080 r irq_source_info_dcn201 -ffffffff82c61000 r irq_source_info_dcn21 -ffffffff82c62290 r irq_service_funcs_dcn21 -ffffffff82c62298 r dummy_irq_info_funcs -ffffffff82c622a8 r hpd_irq_info_funcs -ffffffff82c622b8 r hpd_rx_irq_info_funcs -ffffffff82c622c8 r pflip_irq_info_funcs -ffffffff82c622d8 r vupdate_no_lock_irq_info_funcs -ffffffff82c622e8 r vblank_irq_info_funcs -ffffffff82c622f8 r vline0_irq_info_funcs -ffffffff82c62308 r dmub_outbox_irq_info_funcs -ffffffff82c63000 r irq_source_info_dcn30 -ffffffff82c64290 r irq_service_funcs_dcn30 -ffffffff82c64298 r dummy_irq_info_funcs -ffffffff82c642a8 r hpd_irq_info_funcs -ffffffff82c642b8 r hpd_rx_irq_info_funcs -ffffffff82c642c8 r pflip_irq_info_funcs -ffffffff82c642d8 r vupdate_no_lock_irq_info_funcs -ffffffff82c642e8 r vblank_irq_info_funcs -ffffffff82c642f8 r vline0_irq_info_funcs -ffffffff82c64308 r dmub_trace_irq_info_funcs -ffffffff82c65000 r irq_source_info_dcn302 -ffffffff82c66290 r irq_service_funcs_dcn302 -ffffffff82c66298 r dummy_irq_info_funcs -ffffffff82c662a8 r hpd_irq_info_funcs -ffffffff82c662b8 r hpd_rx_irq_info_funcs -ffffffff82c662c8 r pflip_irq_info_funcs -ffffffff82c662d8 r vupdate_no_lock_irq_info_funcs -ffffffff82c662e8 r vblank_irq_info_funcs -ffffffff82c662f8 r vline0_irq_info_funcs -ffffffff82c66308 r dmub_trace_irq_info_funcs -ffffffff82c67000 r irq_service_funcs_dcn303 -ffffffff82c67008 r dummy_irq_info_funcs -ffffffff82c67018 r hpd_irq_info_funcs -ffffffff82c67028 r hpd_rx_irq_info_funcs -ffffffff82c67038 r pflip_irq_info_funcs -ffffffff82c67048 r vupdate_no_lock_irq_info_funcs -ffffffff82c67058 r vblank_irq_info_funcs -ffffffff82c67068 r vline0_irq_info_funcs -ffffffff82c67080 r irq_source_info_dcn303 -ffffffff82c69000 r irq_source_info_dcn31 -ffffffff82c6a290 r irq_service_funcs_dcn31 -ffffffff82c6a298 r dummy_irq_info_funcs -ffffffff82c6a2a8 r hpd_irq_info_funcs -ffffffff82c6a2b8 r hpd_rx_irq_info_funcs -ffffffff82c6a2c8 r pflip_irq_info_funcs -ffffffff82c6a2d8 r vupdate_no_lock_irq_info_funcs -ffffffff82c6a2e8 r vblank_irq_info_funcs -ffffffff82c6a2f8 r vline0_irq_info_funcs -ffffffff82c6a308 r outbox_irq_info_funcs -ffffffff82c6b000 r irq_source_info_dcn314 -ffffffff82c6c290 r irq_service_funcs_dcn314 -ffffffff82c6c298 r dummy_irq_info_funcs -ffffffff82c6c2a8 r hpd_irq_info_funcs -ffffffff82c6c2b8 r hpd_rx_irq_info_funcs -ffffffff82c6c2c8 r pflip_irq_info_funcs -ffffffff82c6c2d8 r vupdate_no_lock_irq_info_funcs -ffffffff82c6c2e8 r vblank_irq_info_funcs -ffffffff82c6c2f8 r vline0_irq_info_funcs -ffffffff82c6c308 r outbox_irq_info_funcs -ffffffff82c6d000 r irq_source_info_dcn315 -ffffffff82c6e290 r irq_service_funcs_dcn315 -ffffffff82c6e298 r dummy_irq_info_funcs -ffffffff82c6e2a8 r hpd_irq_info_funcs -ffffffff82c6e2b8 r hpd_rx_irq_info_funcs -ffffffff82c6e2c8 r pflip_irq_info_funcs -ffffffff82c6e2d8 r vupdate_no_lock_irq_info_funcs -ffffffff82c6e2e8 r vblank_irq_info_funcs -ffffffff82c6e2f8 r vline0_irq_info_funcs -ffffffff82c6e308 r outbox_irq_info_funcs -ffffffff82c6f000 r irq_source_info_dcn32 -ffffffff82c70290 r irq_service_funcs_dcn32 -ffffffff82c70298 r dummy_irq_info_funcs -ffffffff82c702a8 r hpd_irq_info_funcs -ffffffff82c702b8 r hpd_rx_irq_info_funcs -ffffffff82c702c8 r pflip_irq_info_funcs -ffffffff82c702d8 r vupdate_no_lock_irq_info_funcs -ffffffff82c702e8 r vblank_irq_info_funcs -ffffffff82c702f8 r vline0_irq_info_funcs -ffffffff82c70308 r outbox_irq_info_funcs -ffffffff82c71000 r dio_link_hwss -ffffffff82c72000 r dpia_link_hwss -ffffffff82c73000 r hpo_dp_link_hwss -ffffffff82c74000 r virtual_lnk_enc_funcs -ffffffff82c75000 r virtual_link_hwss -ffffffff82c76000 r virtual_str_enc_funcs -ffffffff82c77000 R dmub_srv_dcn20_regs -ffffffff82c78000 R dmub_srv_dcn21_regs -ffffffff82c79000 R dmub_srv_dcn30_regs -ffffffff82c7a000 R dmub_srv_dcn301_regs -ffffffff82c7b000 R dmub_srv_dcn302_regs -ffffffff82c7c000 R dmub_srv_dcn303_regs -ffffffff82c7d000 R dmub_srv_dcn31_regs -ffffffff82c7e000 R dmub_srv_dcn315_regs -ffffffff82c7f000 R dmub_srv_dcn316_regs -ffffffff82c80000 R dmub_srv_dcn32_regs -ffffffff82c81000 r numerator01 -ffffffff82c81020 r numerator02 -ffffffff82c81040 r numerator04 -ffffffff82c81060 r numerator05 -ffffffff82c83000 r abm_settings -ffffffff82c83010 r abm_settings_config0 -ffffffff82c83050 r abm_settings_config1 -ffffffff82c83088 r min_reduction_table_v_2_2 -ffffffff82c83095 r max_reduction_table_v_2_2 -ffffffff82c830a2 r min_reduction_table -ffffffff82c830af r max_reduction_table -ffffffff82c84000 R amdgpu_pp_profile_name -ffffffff82c85000 r pp_lib_thermal_controller_names -ffffffff82c86000 r pp_ip_funcs -ffffffff82c860a0 R pp_smu_ip_block -ffffffff82c860b8 r pp_dpm_funcs -ffffffff82c87000 r gpio_tbl -ffffffff82c870f0 r enable_fb_req_rej_tbl -ffffffff82c87140 r use_bclk_tbl -ffffffff82c87310 r turn_off_plls_tbl -ffffffff82c87640 r enter_baco_tbl -ffffffff82c87730 r exit_baco_tbl -ffffffff82c87850 r clean_baco_tbl +ffffffff82c54000 r funcs +ffffffff82c55000 r hdmi_14_protection +ffffffff82c55010 r dp_11_protection +ffffffff82c55020 r hdcp_i2c_offsets +ffffffff82c55050 r hdcp_dpcd_addrs +ffffffff82c56000 r irq_service_funcs_dce110 +ffffffff82c56010 r irq_source_info_dce110 +ffffffff82c572a0 r dummy_irq_info_funcs +ffffffff82c572b0 r hpd_irq_info_funcs +ffffffff82c572c0 r hpd_rx_irq_info_funcs +ffffffff82c572d0 r pflip_irq_info_funcs +ffffffff82c572e0 r vupdate_irq_info_funcs +ffffffff82c572f0 r vblank_irq_info_funcs +ffffffff82c58000 r irq_service_funcs_dce120 +ffffffff82c58008 r dummy_irq_info_funcs +ffffffff82c58018 r hpd_irq_info_funcs +ffffffff82c58028 r hpd_rx_irq_info_funcs +ffffffff82c58038 r pflip_irq_info_funcs +ffffffff82c58048 r vupdate_irq_info_funcs +ffffffff82c58058 r vblank_irq_info_funcs +ffffffff82c58070 r irq_source_info_dce120 +ffffffff82c5a000 r irq_service_funcs_dce80 +ffffffff82c5a008 r dummy_irq_info_funcs +ffffffff82c5a018 r hpd_irq_info_funcs +ffffffff82c5a028 r hpd_rx_irq_info_funcs +ffffffff82c5a038 r pflip_irq_info_funcs +ffffffff82c5a048 r vupdate_irq_info_funcs +ffffffff82c5a058 r vblank_irq_info_funcs +ffffffff82c5a070 r irq_source_info_dce80 +ffffffff82c5c000 r irq_service_funcs_dcn10 +ffffffff82c5c008 r dummy_irq_info_funcs +ffffffff82c5c018 r hpd_irq_info_funcs +ffffffff82c5c028 r hpd_rx_irq_info_funcs +ffffffff82c5c038 r pflip_irq_info_funcs +ffffffff82c5c048 r vupdate_no_lock_irq_info_funcs +ffffffff82c5c058 r vblank_irq_info_funcs +ffffffff82c5c068 r vline0_irq_info_funcs +ffffffff82c5c080 r irq_source_info_dcn10 +ffffffff82c5e000 r irq_service_funcs_dcn20 +ffffffff82c5e008 r dummy_irq_info_funcs +ffffffff82c5e018 r hpd_irq_info_funcs +ffffffff82c5e028 r hpd_rx_irq_info_funcs +ffffffff82c5e038 r pflip_irq_info_funcs +ffffffff82c5e048 r vupdate_no_lock_irq_info_funcs +ffffffff82c5e058 r vblank_irq_info_funcs +ffffffff82c5e068 r vline0_irq_info_funcs +ffffffff82c5e080 r irq_source_info_dcn20 +ffffffff82c60000 r irq_service_funcs_dcn201 +ffffffff82c60008 r dummy_irq_info_funcs +ffffffff82c60018 r hpd_irq_info_funcs +ffffffff82c60028 r hpd_rx_irq_info_funcs +ffffffff82c60038 r pflip_irq_info_funcs +ffffffff82c60048 r vupdate_no_lock_irq_info_funcs +ffffffff82c60058 r vblank_irq_info_funcs +ffffffff82c60068 r vline0_irq_info_funcs +ffffffff82c60080 r irq_source_info_dcn201 +ffffffff82c62000 r irq_source_info_dcn21 +ffffffff82c63290 r irq_service_funcs_dcn21 +ffffffff82c63298 r dummy_irq_info_funcs +ffffffff82c632a8 r hpd_irq_info_funcs +ffffffff82c632b8 r hpd_rx_irq_info_funcs +ffffffff82c632c8 r pflip_irq_info_funcs +ffffffff82c632d8 r vupdate_no_lock_irq_info_funcs +ffffffff82c632e8 r vblank_irq_info_funcs +ffffffff82c632f8 r vline0_irq_info_funcs +ffffffff82c63308 r dmub_outbox_irq_info_funcs +ffffffff82c64000 r irq_source_info_dcn30 +ffffffff82c65290 r irq_service_funcs_dcn30 +ffffffff82c65298 r dummy_irq_info_funcs +ffffffff82c652a8 r hpd_irq_info_funcs +ffffffff82c652b8 r hpd_rx_irq_info_funcs +ffffffff82c652c8 r pflip_irq_info_funcs +ffffffff82c652d8 r vupdate_no_lock_irq_info_funcs +ffffffff82c652e8 r vblank_irq_info_funcs +ffffffff82c652f8 r vline0_irq_info_funcs +ffffffff82c65308 r dmub_trace_irq_info_funcs +ffffffff82c66000 r irq_source_info_dcn302 +ffffffff82c67290 r irq_service_funcs_dcn302 +ffffffff82c67298 r dummy_irq_info_funcs +ffffffff82c672a8 r hpd_irq_info_funcs +ffffffff82c672b8 r hpd_rx_irq_info_funcs +ffffffff82c672c8 r pflip_irq_info_funcs +ffffffff82c672d8 r vupdate_no_lock_irq_info_funcs +ffffffff82c672e8 r vblank_irq_info_funcs +ffffffff82c672f8 r vline0_irq_info_funcs +ffffffff82c67308 r dmub_trace_irq_info_funcs +ffffffff82c68000 r irq_service_funcs_dcn303 +ffffffff82c68008 r dummy_irq_info_funcs +ffffffff82c68018 r hpd_irq_info_funcs +ffffffff82c68028 r hpd_rx_irq_info_funcs +ffffffff82c68038 r pflip_irq_info_funcs +ffffffff82c68048 r vupdate_no_lock_irq_info_funcs +ffffffff82c68058 r vblank_irq_info_funcs +ffffffff82c68068 r vline0_irq_info_funcs +ffffffff82c68080 r irq_source_info_dcn303 +ffffffff82c6a000 r irq_source_info_dcn31 +ffffffff82c6b290 r irq_service_funcs_dcn31 +ffffffff82c6b298 r dummy_irq_info_funcs +ffffffff82c6b2a8 r hpd_irq_info_funcs +ffffffff82c6b2b8 r hpd_rx_irq_info_funcs +ffffffff82c6b2c8 r pflip_irq_info_funcs +ffffffff82c6b2d8 r vupdate_no_lock_irq_info_funcs +ffffffff82c6b2e8 r vblank_irq_info_funcs +ffffffff82c6b2f8 r vline0_irq_info_funcs +ffffffff82c6b308 r outbox_irq_info_funcs +ffffffff82c6c000 r irq_source_info_dcn314 +ffffffff82c6d290 r irq_service_funcs_dcn314 +ffffffff82c6d298 r dummy_irq_info_funcs +ffffffff82c6d2a8 r hpd_irq_info_funcs +ffffffff82c6d2b8 r hpd_rx_irq_info_funcs +ffffffff82c6d2c8 r pflip_irq_info_funcs +ffffffff82c6d2d8 r vupdate_no_lock_irq_info_funcs +ffffffff82c6d2e8 r vblank_irq_info_funcs +ffffffff82c6d2f8 r vline0_irq_info_funcs +ffffffff82c6d308 r outbox_irq_info_funcs +ffffffff82c6e000 r irq_source_info_dcn315 +ffffffff82c6f290 r irq_service_funcs_dcn315 +ffffffff82c6f298 r dummy_irq_info_funcs +ffffffff82c6f2a8 r hpd_irq_info_funcs +ffffffff82c6f2b8 r hpd_rx_irq_info_funcs +ffffffff82c6f2c8 r pflip_irq_info_funcs +ffffffff82c6f2d8 r vupdate_no_lock_irq_info_funcs +ffffffff82c6f2e8 r vblank_irq_info_funcs +ffffffff82c6f2f8 r vline0_irq_info_funcs +ffffffff82c6f308 r outbox_irq_info_funcs +ffffffff82c70000 r irq_source_info_dcn32 +ffffffff82c71290 r irq_service_funcs_dcn32 +ffffffff82c71298 r dummy_irq_info_funcs +ffffffff82c712a8 r hpd_irq_info_funcs +ffffffff82c712b8 r hpd_rx_irq_info_funcs +ffffffff82c712c8 r pflip_irq_info_funcs +ffffffff82c712d8 r vupdate_no_lock_irq_info_funcs +ffffffff82c712e8 r vblank_irq_info_funcs +ffffffff82c712f8 r vline0_irq_info_funcs +ffffffff82c71308 r outbox_irq_info_funcs +ffffffff82c72000 r dio_link_hwss +ffffffff82c73000 r dpia_link_hwss +ffffffff82c74000 r hpo_dp_link_hwss +ffffffff82c75000 r virtual_lnk_enc_funcs +ffffffff82c76000 r virtual_link_hwss +ffffffff82c77000 r virtual_str_enc_funcs +ffffffff82c78000 R dmub_srv_dcn20_regs +ffffffff82c79000 R dmub_srv_dcn21_regs +ffffffff82c7a000 R dmub_srv_dcn30_regs +ffffffff82c7b000 R dmub_srv_dcn301_regs +ffffffff82c7c000 R dmub_srv_dcn302_regs +ffffffff82c7d000 R dmub_srv_dcn303_regs +ffffffff82c7e000 R dmub_srv_dcn31_regs +ffffffff82c7f000 R dmub_srv_dcn315_regs +ffffffff82c80000 R dmub_srv_dcn316_regs +ffffffff82c81000 R dmub_srv_dcn32_regs +ffffffff82c82000 r numerator01 +ffffffff82c82020 r numerator02 +ffffffff82c82040 r numerator04 +ffffffff82c82060 r numerator05 +ffffffff82c84000 r abm_settings +ffffffff82c84010 r abm_settings_config0 +ffffffff82c84050 r abm_settings_config1 +ffffffff82c84088 r min_reduction_table_v_2_2 +ffffffff82c84095 r max_reduction_table_v_2_2 +ffffffff82c840a2 r min_reduction_table +ffffffff82c840af r max_reduction_table +ffffffff82c85000 R amdgpu_pp_profile_name +ffffffff82c86000 r pp_lib_thermal_controller_names +ffffffff82c87000 r pp_ip_funcs +ffffffff82c870a0 R pp_smu_ip_block +ffffffff82c870b8 r pp_dpm_funcs ffffffff82c88000 r gpio_tbl ffffffff82c880f0 r enable_fb_req_rej_tbl ffffffff82c88140 r use_bclk_tbl -ffffffff82c882e0 r turn_off_plls_tbl -ffffffff82c88370 r clk_req_b_tbl -ffffffff82c88490 r enter_baco_tbl -ffffffff82c885b0 r exit_baco_tbl -ffffffff82c886d0 r clean_baco_tbl +ffffffff82c88310 r turn_off_plls_tbl +ffffffff82c88640 r enter_baco_tbl +ffffffff82c88730 r exit_baco_tbl +ffffffff82c88850 r clean_baco_tbl ffffffff82c89000 r gpio_tbl ffffffff82c890f0 r enable_fb_req_rej_tbl -ffffffff82c89140 r use_bclk_tbl_vg -ffffffff82c89200 r turn_off_plls_tbl_vg -ffffffff82c89350 r use_bclk_tbl -ffffffff82c89440 r turn_off_plls_tbl -ffffffff82c895f0 r clk_req_b_tbl -ffffffff82c89710 r enter_baco_tbl -ffffffff82c89830 r exit_baco_tbl -ffffffff82c89950 r clean_baco_tbl -ffffffff82c8a000 r vega10_fuses_default -ffffffff82c99000 r pp_r600_encode_lanes -ffffffff82c9a000 R pptable_v1_0_funcs -ffffffff82c9b000 R pptable_funcs -ffffffff82c9b020 r soft_dummy_pp_table -ffffffff82c9c000 r smu10_hwmgr_funcs -ffffffff82c9d000 r smu7_hwmgr_funcs -ffffffff82c9d2f8 r smu7_irq_funcs -ffffffff82c9d310 r SMU7ThermalPolicy -ffffffff82c9e000 r GCCACConfig_Polaris10 -ffffffff82c9e1b0 r DIDTConfig_Polaris10 -ffffffff82c9ea50 r GCCACConfig_Polaris11 -ffffffff82c9ec00 r DIDTConfig_Polaris11_Kicker -ffffffff82c9f4a0 r DIDTConfig_Polaris11 -ffffffff82c9fd40 r DIDTConfig_Polaris12 -ffffffff82ca05e0 r GCCACConfig_VegaM -ffffffff82ca0790 r DIDTConfig_VegaM -ffffffff82ca2000 r smu8_hwmgr_funcs -ffffffff82ca22f0 r SMU7ThermalPolicy -ffffffff82ca3000 r smu9_irq_funcs -ffffffff82ca4000 r gpio_tbl_iceland -ffffffff82ca4060 r gpio_tbl -ffffffff82ca4150 r enable_fb_req_rej_tbl -ffffffff82ca41a0 r use_bclk_tbl -ffffffff82ca4370 r turn_off_plls_tbl -ffffffff82ca4610 r enter_baco_tbl -ffffffff82ca4730 r exit_baco_tbl_iceland -ffffffff82ca4870 r clean_baco_tbl_iceland -ffffffff82ca4890 r exit_baco_tbl -ffffffff82ca49b0 r clean_baco_tbl -ffffffff82ca5000 r pre_baco_tbl -ffffffff82ca5090 r enter_baco_tbl -ffffffff82ca52b0 r exit_baco_tbl -ffffffff82ca5520 r clean_baco_tbl -ffffffff82ca6000 r vega10_hwmgr_funcs -ffffffff82ca62f0 r channel_number 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vega10_pptable_funcs -ffffffff82caa000 r pre_baco_tbl -ffffffff82caa090 r enter_baco_tbl -ffffffff82caa2b0 r exit_baco_tbl -ffffffff82caa520 r clean_baco_tbl -ffffffff82cab000 r vega12_hwmgr_funcs -ffffffff82cab2f0 r SMU7ThermalWithDelayPolicy -ffffffff82cab340 r link_width -ffffffff82cac000 R vega12_pptable_funcs -ffffffff82cad000 r clean_baco_tbl -ffffffff82cae000 r vega20_hwmgr_funcs -ffffffff82cae2f0 r SMU7ThermalWithDelayPolicy -ffffffff82cae340 r link_width -ffffffff82caf000 R vega20_pptable_funcs -ffffffff82cb0000 R ci_smu_funcs -ffffffff82cb00e0 r defaults_hawaii_pro -ffffffff82cb012c r defaults_hawaii_xt -ffffffff82cb0178 r defaults_saturn_xt -ffffffff82cb01c4 r defaults_bonaire_xt -ffffffff82cb0210 r ci_program_jump_on_start.data -ffffffff82cb1000 R fiji_smu_funcs -ffffffff82cb10e0 r avfs_graphics_level -ffffffff82cb1240 r fiji_power_tune_data_set_array -ffffffff82cb1246 r fiji_clock_stretch_amount_conversion -ffffffff82cb1260 r fiji_clock_stretcher_ddt_table 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pckbc_isa_ca -ffffffff82d09000 R vga_isa_ca -ffffffff82d0a000 R wdc_isa_ca -ffffffff82d0b000 R mpu_midi_hw_if -ffffffff82d0c000 R mpu_isa_ca -ffffffff82d0d000 R pcppi_ca -ffffffff82d0e000 R spkr_ca -ffffffff82d0e030 r pitchtab -ffffffff82d0f000 R lpt_isa_ca -ffffffff82d10000 R wbsio_ca -ffffffff82d11000 R schsio_ca -ffffffff82d12000 R lm_isa_ca -ffffffff82d12028 R lm_wbsio_ca -ffffffff82d13000 R it_sensors -ffffffff82d13110 R it_vrfact -ffffffff82d13140 R it_fan_regs -ffffffff82d13160 R it_fan_ext_regs -ffffffff82d13178 R it_ca -ffffffff82d14000 R abitkv_sensors -ffffffff82d14200 R abitaa_sensors -ffffffff82d14480 R abitav_sensors -ffffffff82d14700 R abitas_sensors -ffffffff82d14980 R abitax_sensors -ffffffff82d14bc0 R abitm4_sensors -ffffffff82d14e80 R abitan_sensors -ffffffff82d15120 R abital_sensors -ffffffff82d153a0 R abitaw_sensors -ffffffff82d15700 R abitni_sensors -ffffffff82d159a0 R abitat_sensors -ffffffff82d15cc0 R abitan2_sensors -ffffffff82d15f60 R abitab_sensors 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pckbd_xtbl -ffffffff82d23100 R pckbd_xtbl_ext -ffffffff82d24000 r pckbd_keydesc_us -ffffffff82d24250 r pckbd_keydesc_de -ffffffff82d242f0 r pckbd_keydesc_de_nodead -ffffffff82d24310 r pckbd_keydesc_fr -ffffffff82d243d0 r pckbd_keydesc_fr_dvorak_bepo -ffffffff82d24510 r pckbd_keydesc_dk -ffffffff82d245a0 r pckbd_keydesc_dk_nodead -ffffffff82d245b0 r pckbd_keydesc_it -ffffffff82d24640 r pckbd_keydesc_uk -ffffffff82d246e0 r pckbd_keydesc_jp -ffffffff82d24750 r pckbd_keydesc_sv -ffffffff82d24780 r pckbd_keydesc_sv_nodead -ffffffff82d24790 r pckbd_keydesc_no -ffffffff82d247c0 r pckbd_keydesc_no_nodead -ffffffff82d247d0 r pckbd_keydesc_us_declk -ffffffff82d24860 r pckbd_keydesc_us_dvorak -ffffffff82d24900 r pckbd_keydesc_us_colemak -ffffffff82d24948 r pckbd_keydesc_swapctrlcaps -ffffffff82d24960 r pckbd_keydesc_iopener -ffffffff82d249b0 r pckbd_keydesc_es -ffffffff82d24a50 r pckbd_keydesc_be -ffffffff82d24b10 r pckbd_keydesc_ru -ffffffff82d24c80 r pckbd_keydesc_ua -ffffffff82d24e10 r pckbd_keydesc_sg -ffffffff82d24ec0 r pckbd_keydesc_sg_nodead -ffffffff82d24ee0 r pckbd_keydesc_sf -ffffffff82d24f00 r pckbd_keydesc_pt -ffffffff82d24f90 r pckbd_keydesc_lt -ffffffff82d25070 r pckbd_keydesc_la -ffffffff82d25100 r pckbd_keydesc_br -ffffffff82d25180 r pckbd_keydesc_tr -ffffffff82d25230 r pckbd_keydesc_tr_nodead -ffffffff82d25250 r pckbd_keydesc_pl -ffffffff82d252b0 r pckbd_keydesc_hu -ffffffff82d253c0 r pckbd_keydesc_si -ffffffff82d254d0 r pckbd_keydesc_cf -ffffffff82d255a0 r pckbd_keydesc_cf_nodead -ffffffff82d255c0 r pckbd_keydesc_lv -ffffffff82d25640 r pckbd_keydesc_nl -ffffffff82d25720 r pckbd_keydesc_nl_nodead -ffffffff82d25740 r pckbd_keydesc_is -ffffffff82d257cc r pckbd_keydesc_is_nodead -ffffffff82d257e0 r pckbd_keydesc_ee -ffffffff82d25890 r pckbd_keydesc_ee_nodead -ffffffff82d258b0 R pckbd_keydesctab -ffffffff82d26000 R pms_ca -ffffffff82d26028 R pms_accessops -ffffffff82d26040 R pms_sec_accessops -ffffffff82d26060 R pms_protocols -ffffffff82d261e0 r alps_models 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dt_static_vmm_guest_exit -ffffffff8311f960 D dt_static_vmm_inout -ffffffff8311f9d0 D dt_static_smr_call -ffffffff8311fa40 D dt_static_smr_called -ffffffff8311fab0 D dt_static_smr_barrier_enter -ffffffff8311fb20 D dt_static_smr_barrier_exit -ffffffff8311fb90 D dt_static_smr_wakeup -ffffffff8311fc00 D dt_static_smr_thread -ffffffff8311fc70 D dt_static_refcnt_none -ffffffff8311fce0 D dt_static_refcnt_ifaddr -ffffffff8311fd50 D dt_static_refcnt_inpcb -ffffffff8311fdc0 D dt_static_refcnt_rtentry -ffffffff8311fe30 D dt_static_refcnt_tdb -ffffffff83120000 D db_next_free_breakpoint -ffffffff83120008 D db_breakpoints_inserted -ffffffff83121000 D db_ed_style -ffffffff83122000 D db_examine_format -ffffffff83122078 D db_print_format -ffffffff83123000 D db_history_size -ffffffff83123008 D db_history_curr -ffffffff83123010 D db_history_last -ffffffff83124000 D db_tab_stop_width -ffffffff83124004 D db_max_line -ffffffff83124008 D db_max_width -ffffffff8312400c D db_radix -ffffffff83125000 D db_lastsym -ffffffff83125008 D db_maxoff -ffffffff83126000 D db_vars -ffffffff83126090 D db_evars -ffffffff83127000 D db_watchpoints_inserted -ffffffff83127008 D db_next_free_watchpoint -ffffffff83128000 D db_log -ffffffff83129000 D audio_cd -ffffffff83129020 D audio_lock -ffffffff8312a000 D midi_cd -ffffffff8312b000 D rnd_cold -ffffffff8312b004 D rnd_slowextract -ffffffff8312b008 D rnd_timeout -ffffffff8312b050 D rndlock -ffffffff8312b060 D rndreinit_timeout -ffffffff8312b0a8 D rnd_task -ffffffff8312c000 D video_cd -ffffffff8312d000 d rrip_table_analyze -ffffffff8312d0e0 d rrip_table_getname -ffffffff8312d1e0 d rrip_table_getsymname -ffffffff8312d280 d rrip_table_extref -ffffffff8312e000 D nexecs -ffffffff8312f000 D elf_note_names -ffffffff83130000 D ncpus -ffffffff83130004 D ncpusfound -ffffffff83131000 D acct_lock -ffffffff83131010 D acctsuspend -ffffffff83131014 D acctresume -ffffffff83131018 D acctrate -ffffffff83132000 D ticks -ffffffff83132008 D jiffies -ffffffff83133000 D clockintr_mtx -ffffffff83133010 D statclock_gen -ffffffff83134000 D fhdlk -ffffffff83135000 D kqueue_klist_lock -ffffffff83135010 D kq_timeoutmax -ffffffff83136000 D stackgap_random -ffffffff83137000 D nprocesses -ffffffff83137004 D nthreads -ffffffff83137008 D fork_tfmrate -ffffffff83138000 D kthread_q -ffffffff83139000 D malloc_mtx -ffffffff83139010 D memname -ffffffff831394a0 D sysctl_kmemlock -ffffffff831394b0 D malloc_errintvl -ffffffff8313a000 D maxdmap -ffffffff8313a008 D maxsmap -ffffffff8313a010 D rlimit_lock -ffffffff8313b000 D sched_cost_load -ffffffff8313b004 D sched_cost_priority -ffffffff8313b008 D sched_cost_runnable -ffffffff8313b00c D sched_cost_resident -ffffffff8313c000 D intrmap_lock -ffffffff8313d000 D nosuidcoredump -ffffffff8313d008 D sigio_lock -ffffffff8313e000 D smr_lock -ffffffff8313e010 D smr_logintvl -ffffffff8313f000 D startuphook_list -ffffffff83140000 D sysctl_lock -ffffffff83140010 D sysctl_disklock -ffffffff83140020 d openbsd -ffffffff83140024 d arg_max -ffffffff83140028 d posix_version -ffffffff8314002c d ngroups_max -ffffffff83140030 d int_one -ffffffff83140034 d maxpartitions -ffffffff83140038 d raw_part -ffffffff8314003c D allowpowerdown -ffffffff83140040 D hw_power -ffffffff83140044 d byte_order -ffffffff83140048 d page_size -ffffffff83141000 d thrsleep_queue -ffffffff83141010 d thrsleep_lock -ffffffff83142000 D tc_lock -ffffffff83142010 D windup_mtx -ffffffff83142020 D timecounter -ffffffff83142028 D time_second -ffffffff83142030 d timehands -ffffffff83142038 d dummy_timecounter -ffffffff83142088 d th0 -ffffffff83142120 d th1 -ffffffff83143000 D itimer_mtx -ffffffff83143010 D ratecheck_mtx -ffffffff83143020 D ppsratecheck_mtx -ffffffff83143030 D resettodr_to -ffffffff83143078 D resettodr_task -ffffffff83144000 D timeout_mutex -ffffffff83145000 D wdog_auto -ffffffff83146000 D taskq_sys -ffffffff83146050 D taskq_sys_mp -ffffffff83147000 D ccpu -ffffffff83147004 D perflevel -ffffffff83147008 D perfpolicy -ffffffff83147010 D setperf_to -ffffffff83148000 D autoconf_attdet_mtx -ffffffff83148010 D msgs -ffffffff83149000 d evcount_list -ffffffff83149010 d evcount_percpu_init_list -ffffffff8314a000 D syslogf_rwlock -ffffffff8314a010 D log_mtx -ffffffff8314a020 D logstash_in -ffffffff8314a028 D logstash_out -ffffffff8314a030 D logstash_rwlock -ffffffff8314b000 D pool_head -ffffffff8314b010 D pool_lock -ffffffff8314b020 D pool_debug -ffffffff8314b028 D pool_allocator_single -ffffffff8314b040 D pool_allocator_multi -ffffffff8314b058 D pool_allocator_multi_ni -ffffffff8314b070 D pool_gc_tick -ffffffff8314b0b8 D pool_gc_task -ffffffff8314c000 D kprintf_mutex -ffffffff8314c010 D db_panic -ffffffff8314c014 D splassert_ctl -ffffffff8314c018 D v_putc -ffffffff8314c020 D printf_flags -ffffffff8314d000 D userconf_base -ffffffff8314d004 D userconf_maxdev -ffffffff8314d008 D userconf_totdev -ffffffff8314d00c D userconf_maxlocnames -ffffffff8314d010 D userconf_cnt -ffffffff8314d014 D userconf_lines -ffffffff8314d018 D userconf_histsz -ffffffff8314d020 D userconf_cmds -ffffffff8314e000 D ftlock -ffffffff8314f000 d ppollcollect.poll_errintvl -ffffffff83150000 D ttydefchars -ffffffff83150014 D ttclos -ffffffff8315001b D ttopen -ffffffff83150022 D ttybg -ffffffff83150028 D ttyin -ffffffff8315002e D ttyout -ffffffff83150038 D ttylist_lock -ffffffff83151000 D linesw -ffffffff83151280 D nlinesw -ffffffff83152000 D pt_softc_lock -ffffffff83153000 d mbstat_boot_boot_cpumem -ffffffff83153080 D mbstat -ffffffff83153090 D mclsizes -ffffffff831530b0 D m_extref_mtx -ffffffff831530c0 D m_pool_allocator -ffffffff83154000 D somaxconn -ffffffff83154004 D sominconn -ffffffff83154008 D sosplice_lock -ffffffff83155000 D sb_max -ffffffff83156000 D unp_df_lock -ffffffff83156010 D unp_gc_lock -ffffffff83156020 D unp_rights_mtx -ffffffff83156030 D unp_ino_mtx -ffffffff83156040 D unp_gc_task -ffffffff83156070 D unpst_sendspace -ffffffff83156074 D unpst_recvspace -ffffffff83156078 D unpsq_sendspace -ffffffff8315607c D unpsq_recvspace -ffffffff83156080 D unpdg_sendspace -ffffffff83156084 D unpdg_recvspace -ffffffff83157000 D doingcache -ffffffff83158000 D maxvfsconf -ffffffff83158010 d vfsconflist -ffffffff83159000 D lockf_lock -ffffffff83159010 D maxlocksperuid -ffffffff8315a000 D iftovt_tab -ffffffff8315a040 D vttoif_tab -ffffffff8315a064 D suid_clear -ffffffff8315a068 D vnode_mtx -ffffffff8315a078 D vfs_stall_lock -ffffffff8315a090 D vtypes -ffffffff8315a0e0 D vtags -ffffffff8315b000 D syncer_maxdelay -ffffffff8315b004 D syncdelay -ffffffff8315c000 D dosdirtemplate -ffffffff8315d000 D ntfs_hashlock -ffffffff8315e000 D ntfs_toupper_lock -ffffffff8315f000 D art_table_gc_mtx -ffffffff8315f010 D art_table_gc_task -ffffffff8315f040 D art_node_gc_mtx -ffffffff8315f050 D art_node_gc_task -ffffffff83160000 D bpf_bufsize -ffffffff83160004 D bpf_maxbufsize -ffffffff83160008 D bpf_sysctl_lk -ffffffff83161000 D ifg_head -ffffffff83161010 D if_cloners_lock -ffffffff83161020 D if_input_task_locked -ffffffff83161050 D netlock -ffffffff83161060 D ifnetlist -ffffffff83162000 D ifiq_maxlen_drop -ffffffff83162004 D ifiq_maxlen_return -ffffffff83163000 D etherbroadcastaddr -ffffffff83163006 D ether_ipmulticast_min -ffffffff8316300c D ether_ipmulticast_max -ffffffff83163012 D ether_ip6multicast_min -ffffffff83163018 D ether_ip6multicast_max -ffffffff83164000 D etherip_cloner -ffffffff83164030 D etherip_list -ffffffff83165000 D loop_cloner -ffffffff83166000 D ifmedia_mtx -ffffffff83167000 D ppp_compressors -ffffffff83167020 D ppp_cloner -ffffffff83168000 D ppp_pkt_init -ffffffff83169000 D ppp_bsd_compress -ffffffff8316a000 D ppp_deflate -ffffffff8316a070 D ppp_deflate_draft -ffffffff8316b000 D tun_cloner -ffffffff8316b030 D tap_cloner -ffffffff8316c000 D bridgeintrq -ffffffff8316c038 D bridge_cloner -ffffffff8316d000 d veb_cloner -ffffffff8316d030 d vport_cloner -ffffffff8316e000 D vlan_tagh_lk -ffffffff8316e010 D vlan_cloner -ffffffff8316e040 D svlan_cloner -ffffffff8316f000 D pipex_list_mtx -ffffffff8316f010 D pipex_prune -ffffffff8316f018 D pipexoutq -ffffffff8316f050 d SHAPad2 -ffffffff83170000 D rtmap_gc -ffffffff83170018 D rt_rc -ffffffff83171000 D rt_labels -ffffffff83171010 D rtlabel_mtx -ffffffff83172000 D enc_cloner -ffffffff83173000 D gre_cloner -ffffffff83173030 D gre_list -ffffffff83173040 D mgre_cloner -ffffffff83173070 D egre_cloner -ffffffff831730a0 D nvgre_cloner -ffffffff831730d0 D eoip_cloner -ffffffff83174000 D trunk_cloner -ffffffff83175000 d aggr_cloner -ffffffff83176000 d tpmr_cloner -ffffffff83177000 D mpe_cloner -ffffffff83178000 D mpw_cloner -ffffffff83179000 D mpip_cloner -ffffffff8317a000 d bpe_cloner -ffffffff8317a030 d bpe_lock -ffffffff8317b000 D vether_cloner -ffffffff8317c000 D pair_cloner -ffffffff8317d000 d vxlan_cloner -ffffffff8317d030 d vxlan_lock -ffffffff8317d040 d vxlan_teps -ffffffff8317e000 D underload_interval -ffffffff8317e010 D wg_cloner -ffffffff8317f000 d stoeplitz_keyseed -ffffffff83180000 D ieee80211_cache_size -ffffffff83181000 D arpt_prune -ffffffff83181004 D arpt_keep -ffffffff83181008 D arpt_down -ffffffff83181010 D arpinq -ffffffff83181048 D arp_mtx -ffffffff83181058 D arp_maxtries -ffffffff83182000 D ipport_firstauto -ffffffff83182004 D ipport_lastauto -ffffffff83182008 D ipport_hifirstauto -ffffffff8318200c D ipport_hilastauto -ffffffff83183000 D divert_sendspace -ffffffff83183004 D divert_recvspace -ffffffff83183008 D divbhashsize -ffffffff83184000 D icmptstamprepl -ffffffff83184004 D icmperrppslim -ffffffff83184008 D icmp_redirtimeout -ffffffff83185000 D ipsendredirects -ffffffff83185004 D ip_defttl -ffffffff83185008 D ip_mtudisc -ffffffff8318500c D ip_mtudisc_timeout -ffffffff83185010 D ipq_mutex -ffffffff83185020 D ip_maxqueue -ffffffff83185028 D ipintrq -ffffffff83185060 d ipsend_task -ffffffff83185090 d ipsendraw_task -ffffffff83186000 D ip_mrtproto -ffffffff83186004 d sin -ffffffff83187000 D rip_sendspace -ffffffff83187008 D rip_recvspace -ffffffff83188000 D tcprexmtthresh -ffffffff83188004 D tcptv_keep_init -ffffffff83188008 D tcp_rst_ppslim -ffffffff8318800c D tcp_ackdrop_ppslim -ffffffff83188010 D tcp_syn_hash_size -ffffffff83188014 D tcp_syn_cache_limit -ffffffff83188018 D tcp_syn_bucket_limit -ffffffff8318801c D tcp_syn_use_limit -ffffffff83189000 D tcp_outflags -ffffffff8318a000 D tcp_timer_mtx -ffffffff8318a010 D tcp_mssdflt -ffffffff8318a014 D tcp_rttdflt -ffffffff8318a018 D tcp_do_rfc1323 -ffffffff8318a01c D tcp_do_sack -ffffffff8318a020 D tcp_do_rfc3390 -ffffffff8318a024 D tcp_reass_limit -ffffffff8318a028 D tcp_sackhole_limit -ffffffff8318b000 D tcp_backoff -ffffffff8318b034 D tcp_totbackoff -ffffffff8318c000 D tcp_sendspace -ffffffff8318c004 D tcp_recvspace -ffffffff8318c008 D tcp_autorcvbuf_inc -ffffffff8318d000 D udpcksum -ffffffff8318d004 D udp_sendspace -ffffffff8318d008 D udp_recvspace -ffffffff8318e000 D ipsec_flows_mtx -ffffffff8318e010 D ipsec_ids_idle -ffffffff8318e014 D ipsec_ids_next_flow -ffffffff8318e018 D ipsec_policy_head -ffffffff8318e028 D ipsp_ids_gc_timeout -ffffffff8318e070 D tdb_sadb_mtx -ffffffff8318e080 d tdb_hashmask -ffffffff8318f000 D ipo_tdb_mtx -ffffffff8318f010 D ipsec_acquire_mtx -ffffffff8318f020 D ipsec_acquire_head -ffffffff83190000 D ipsec_keep_invalid -ffffffff83190004 D ipsec_require_pfs -ffffffff83190008 D ipsec_soft_timeout -ffffffff8319000c D ipsec_exp_timeout -ffffffff83190010 D ipsec_soft_first_use -ffffffff83190014 D ipsec_exp_first_use -ffffffff83190018 D ipsec_expire_acquire -ffffffff8319001c D esp_enable -ffffffff83190020 D ah_enable -ffffffff83191000 D udpencap_enable -ffffffff83191004 D udpencap_port -ffffffff83192000 D carp_vh_rc -ffffffff83192020 D carp_sc_rc -ffffffff83192040 D carp_opts -ffffffff83192058 D carp_cloner -ffffffff83192088 d carp_send_na.mcast -ffffffff83193000 d PADDING -ffffffff83194000 d PADDING -ffffffff83195000 d weak_keys -ffffffff83196000 D swcr_id -ffffffff83197000 D window_inflate -ffffffff83197004 D window_deflate -ffffffff83198000 D ghash_update -ffffffff83199000 D mpls_defttl -ffffffff83199004 D mpls_mapttl_ip -ffffffff8319a000 D nfskevq_lock -ffffffff8319b000 D nfs_backoff -ffffffff8319b020 D nfs_ptimers -ffffffff8319c000 D desirednfsrvcache -ffffffff8319c010 D nonidempotent -ffffffff8319c070 D nfsv2_repstat -ffffffff8319d000 D nfsv2_type -ffffffff8319d030 D nfsv3_type -ffffffff8319d060 D nv2tov_type -ffffffff8319d080 D nv3tov_type -ffffffff8319d0a0 D nfsv3_procid -ffffffff8319d100 D nfsv2_procid -ffffffff8319d15c d nfsv3err_getattr -ffffffff8319d170 d nfsv3err_setattr -ffffffff8319d190 d nfsv3err_lookup -ffffffff8319d1a4 d nfsv3err_access -ffffffff8319d1b0 d nfsv3err_readlink -ffffffff8319d1d0 d nfsv3err_read -ffffffff8319d1f0 d nfsv3err_write -ffffffff8319d210 d nfsv3err_create -ffffffff8319d230 d nfsv3err_mkdir -ffffffff8319d250 d nfsv3err_symlink -ffffffff8319d270 d nfsv3err_mknod -ffffffff8319d290 d nfsv3err_remove -ffffffff8319d2b0 d nfsv3err_rmdir -ffffffff8319d2d0 d nfsv3err_rename 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tsc_egress_barrier -ffffffff83575100 B tsc_ap_status -ffffffff83575180 B tsc_ap_name -ffffffff83576000 b vc3_sc -ffffffff83576010 b viac3_rnd.buffer -ffffffff83576058 B viac3_rnd_tmo -ffffffff835760a0 B viac3_rnd_present -ffffffff83577000 B aesni_sc -ffffffff83577008 B aesnipl -ffffffff835771b0 B aesni_ops -ffffffff83578000 b amd64_errata.printed -ffffffff83579000 B cpu_ucode_size -ffffffff83579008 B cpu_ucode_data -ffffffff83579010 B cpu_ucode_intel_applied -ffffffff8357a000 b ap_open_count -ffffffff8357a008 B zeropage -ffffffff8357a010 B mem_range_softc -ffffffff8357b000 B mtrrdef -ffffffff8357b008 B mtrrcap -ffffffff8357c000 B nkptp -ffffffff8357c020 B pg_nx -ffffffff8357c028 B pg_g_kern -ffffffff8357c030 B pmap_initialized -ffffffff8357c038 B kernel_pmap_store -ffffffff8357c110 B cr3_reuse_pcid -ffffffff8357c118 b cr3_pcid_temp -ffffffff8357c120 B virtual_avail -ffffffff8357c128 B pg_xo -ffffffff8357c130 B protection_codes -ffffffff8357c170 B pmap_use_pcid -ffffffff8357c174 b cr3_pcid_proc -ffffffff8357c178 B cr3_pcid_proc_intel -ffffffff8357c180 B pmaps -ffffffff8357c188 B pmap_pmap_pool -ffffffff8357c330 B pmap_pv_pool -ffffffff8357c4d8 B pmap_pdp_pool -ffffffff8357d000 B fpu_mxcsr_mask -ffffffff8357d008 B xsave_mask -ffffffff8357e000 B x86_soft_intrs -ffffffff8357f000 B i8259_imen -ffffffff83580000 B intr_shared_edge -ffffffff83580008 B fake_softclock_intrhand -ffffffff83580078 B fake_softnet_intrhand -ffffffff835800e8 B fake_softtty_intrhand -ffffffff83580158 B fake_timer_intrhand -ffffffff835801c8 B fake_ipi_intrhand -ffffffff83580238 B fake_xen_intrhand -ffffffff835802a8 B fake_hyperv_intrhand -ffffffff83581000 B atdevbase -ffffffff83581010 b ioport_ex_storage -ffffffff835812e0 B ioport_ex -ffffffff835812f0 b iomem_ex_storage -ffffffff835815c0 B iomem_ex -ffffffff835815c8 b ioport_malloc_safe -ffffffff83582000 B mp_perflevel -ffffffff83582008 B ul_setperf -ffffffff83583000 B cn_tab -ffffffff83584000 B ddb_mp_mutex -ffffffff83584010 B ddb_state -ffffffff83584018 B ddb_regs -ffffffff835840c8 B db_switch_cpu -ffffffff835840d0 B db_switch_to_cpu -ffffffff835840d8 B ddb_active_cpu -ffffffff83585000 B rtclock_tval -ffffffff83585008 B i8254_ticked -ffffffff8358500c B i8254_offset -ffffffff83585010 B i8254_lastcount -ffffffff83585018 b rtcstart.rtcdrain_timeout -ffffffff83585060 B rtc_update_century -ffffffff83585068 B rtc_todr -ffffffff83586000 B k8pnow_current_state -ffffffff83587000 B bus_clock -ffffffff83587008 b est_fqlist -ffffffff83588000 B k1x_current_state -ffffffff83589000 B rotatedfonts -ffffffff83589008 B rasops_framebuffers -ffffffff8358a000 b stamp_attr -ffffffff8358a010 b stamp -ffffffff8358b000 b stamp_attr -ffffffff8358b010 b stamp +ffffffff82c89140 r use_bclk_tbl +ffffffff82c892e0 r turn_off_plls_tbl +ffffffff82c89370 r clk_req_b_tbl +ffffffff82c89490 r enter_baco_tbl +ffffffff82c895b0 r exit_baco_tbl +ffffffff82c896d0 r clean_baco_tbl +ffffffff82c8a000 r gpio_tbl +ffffffff82c8a0f0 r enable_fb_req_rej_tbl +ffffffff82c8a140 r use_bclk_tbl_vg +ffffffff82c8a200 r turn_off_plls_tbl_vg +ffffffff82c8a350 r use_bclk_tbl +ffffffff82c8a440 r turn_off_plls_tbl +ffffffff82c8a5f0 r clk_req_b_tbl +ffffffff82c8a710 r enter_baco_tbl +ffffffff82c8a830 r exit_baco_tbl +ffffffff82c8a950 r clean_baco_tbl +ffffffff82c8b000 r vega10_fuses_default +ffffffff82c9a000 r pp_r600_encode_lanes +ffffffff82c9b000 R pptable_v1_0_funcs +ffffffff82c9c000 R pptable_funcs +ffffffff82c9c020 r soft_dummy_pp_table +ffffffff82c9d000 r smu10_hwmgr_funcs +ffffffff82c9e000 r smu7_hwmgr_funcs +ffffffff82c9e2f8 r smu7_irq_funcs +ffffffff82c9e310 r SMU7ThermalPolicy +ffffffff82c9f000 r GCCACConfig_Polaris10 +ffffffff82c9f1b0 r DIDTConfig_Polaris10 +ffffffff82c9fa50 r GCCACConfig_Polaris11 +ffffffff82c9fc00 r DIDTConfig_Polaris11_Kicker +ffffffff82ca04a0 r DIDTConfig_Polaris11 +ffffffff82ca0d40 r DIDTConfig_Polaris12 +ffffffff82ca15e0 r GCCACConfig_VegaM +ffffffff82ca1790 r DIDTConfig_VegaM +ffffffff82ca3000 r smu8_hwmgr_funcs +ffffffff82ca32f0 r SMU7ThermalPolicy +ffffffff82ca4000 r smu9_irq_funcs +ffffffff82ca5000 r gpio_tbl_iceland +ffffffff82ca5060 r gpio_tbl +ffffffff82ca5150 r enable_fb_req_rej_tbl +ffffffff82ca51a0 r use_bclk_tbl +ffffffff82ca5370 r turn_off_plls_tbl +ffffffff82ca5610 r enter_baco_tbl +ffffffff82ca5730 r exit_baco_tbl_iceland +ffffffff82ca5870 r clean_baco_tbl_iceland +ffffffff82ca5890 r exit_baco_tbl +ffffffff82ca59b0 r clean_baco_tbl +ffffffff82ca6000 r pre_baco_tbl +ffffffff82ca6090 r enter_baco_tbl +ffffffff82ca62b0 r exit_baco_tbl +ffffffff82ca6520 r clean_baco_tbl +ffffffff82ca7000 r vega10_hwmgr_funcs +ffffffff82ca72f0 r channel_number +ffffffff82ca7320 r SMU7ThermalWithDelayPolicy +ffffffff82ca8000 r SEDiDtStallCtrlConfig_vega10 +ffffffff82ca8110 r SEDiDtStallPatternConfig_vega10 +ffffffff82ca82e0 r SEDiDtWeightConfig_Vega10 +ffffffff82ca83b0 r SEDiDtCtrl1Config_Vega10 +ffffffff82ca8440 r SEDiDtCtrl2Config_Vega10 +ffffffff82ca8510 r SEDiDtCtrl3Config_vega10 +ffffffff82ca8820 r SEDiDtTuningCtrlConfig_Vega10 +ffffffff82ca88b0 r SELCacConfig_Vega10 +ffffffff82ca8a40 r SEDiDtCtrl0Config_Vega10 +ffffffff82ca8d10 r AvfsPSMInitConfig_vega10 +ffffffff82ca8d90 r SEEDCStallPatternConfig_Vega10 +ffffffff82ca8ea0 r SEEDCStallDelayConfig_Vega10 +ffffffff82ca8f80 r SEEDCCtrlConfig_Vega10 +ffffffff82ca9040 r PSMSEEDCStallPatternConfig_Vega10 +ffffffff82ca90c0 r PSMSEEDCStallDelayConfig_Vega10 +ffffffff82ca91d0 r PSMSEEDCCtrlResetConfig_Vega10 +ffffffff82ca9290 r PSMSEEDCCtrlConfig_Vega10 +ffffffff82ca9350 r SEEDCForceStallPatternConfig_Vega10 +ffffffff82ca93e0 r SEEDCCtrlForceStallConfig_Vega10 +ffffffff82caa000 R vega10_pptable_funcs +ffffffff82cab000 r pre_baco_tbl +ffffffff82cab090 r enter_baco_tbl +ffffffff82cab2b0 r exit_baco_tbl +ffffffff82cab520 r clean_baco_tbl +ffffffff82cac000 r vega12_hwmgr_funcs +ffffffff82cac2f0 r SMU7ThermalWithDelayPolicy +ffffffff82cac340 r link_width +ffffffff82cad000 R vega12_pptable_funcs +ffffffff82cae000 r clean_baco_tbl +ffffffff82caf000 r vega20_hwmgr_funcs +ffffffff82caf2f0 r SMU7ThermalWithDelayPolicy +ffffffff82caf340 r link_width +ffffffff82cb0000 R vega20_pptable_funcs +ffffffff82cb1000 R ci_smu_funcs +ffffffff82cb10e0 r defaults_hawaii_pro +ffffffff82cb112c r defaults_hawaii_xt +ffffffff82cb1178 r defaults_saturn_xt +ffffffff82cb11c4 r defaults_bonaire_xt +ffffffff82cb1210 r ci_program_jump_on_start.data +ffffffff82cb2000 R fiji_smu_funcs +ffffffff82cb20e0 r avfs_graphics_level +ffffffff82cb2240 r fiji_power_tune_data_set_array +ffffffff82cb2246 r fiji_clock_stretch_amount_conversion +ffffffff82cb2260 r fiji_clock_stretcher_ddt_table +ffffffff82cb3000 R iceland_smu_funcs +ffffffff82cb30e0 r defaults_icelandxt +ffffffff82cb312c r defaults_icelandpro +ffffffff82cb3178 r defaults_iceland +ffffffff82cb4000 R polaris10_smu_funcs +ffffffff82cb40e0 r avfs_graphics_level_polaris10 +ffffffff82cb42a0 r avfs_memory_level_polaris10 +ffffffff82cb42c0 r polaris10_power_tune_data_set_array +ffffffff82cb4310 r Range_Table +ffffffff82cb5000 R smu10_smu_funcs +ffffffff82cb6000 r smu7_program_jump_on_start.data +ffffffff82cb6010 r pwr_virus_table_pre +ffffffff82cb6680 r pwr_virus_table_post +ffffffff82cb6f80 r pwr_virus_section1 +ffffffff82cb7610 r pwr_virus_section2 +ffffffff82cb7660 r pwr_virus_section3 +ffffffff82cbeab0 r pwr_virus_section4 +ffffffff82cbee80 r pwr_virus_section5 +ffffffff82cbf490 r pwr_virus_section6 +ffffffff82cc1000 R smu8_smu_funcs +ffffffff82cc2000 R tonga_smu_funcs +ffffffff82cc20e0 r tonga_power_tune_data_set_array +ffffffff82cc212c r tonga_clock_stretch_amount_conversion +ffffffff82cc2140 r tonga_clock_stretcher_ddt_table +ffffffff82cc3000 R vega10_smu_funcs +ffffffff82cc4000 R vega12_smu_funcs +ffffffff82cc5000 R vega20_smu_funcs +ffffffff82cc6000 R vegam_smu_funcs +ffffffff82cc60e0 r vegam_power_tune_data_set_array +ffffffff82cc6130 r Range_Table +ffffffff82cc7000 R smu_ip_funcs +ffffffff82cc70a0 R smu_v11_0_ip_block +ffffffff82cc70b8 R smu_v12_0_ip_block +ffffffff82cc70d0 R smu_v13_0_ip_block +ffffffff82cc70e8 r swsmu_pm_funcs +ffffffff82cc8000 r arcturus_table_map +ffffffff82cc8080 r arcturus_pwr_src_map +ffffffff82cc8090 r arcturus_workload_map +ffffffff82cc80d0 r arcturus_ppt_funcs +ffffffff82cc84a0 r smu11_thermal_policy +ffffffff82cc84f0 r arcturus_i2c_algo +ffffffff82cc8500 r arcturus_i2c_control_quirks +ffffffff82cc8510 r arcturus_throttler_map +ffffffff82cc8530 r arcturus_message_map +ffffffff82cc8f80 r arcturus_clk_map +ffffffff82cc9040 r arcturus_feature_mask_map +ffffffff82cca000 r cyan_skillfish_ppt_funcs +ffffffff82ccb000 r navi10_ppt_funcs +ffffffff82ccb3d0 r smu11_thermal_policy +ffffffff82ccb420 r navi10_i2c_algo +ffffffff82ccb430 r navi10_i2c_control_quirks +ffffffff82ccb440 r navi1x_throttler_map +ffffffff82ccb460 r NoDbiPrbs7 +ffffffff82ccc460 r DbiPrbs7 +ffffffff82cce000 r sienna_cichlid_ppt_funcs +ffffffff82cce3d0 r smu11_thermal_policy +ffffffff82cce420 r sienna_cichlid_i2c_algo +ffffffff82cce430 r sienna_cichlid_i2c_control_quirks +ffffffff82cce440 r sienna_cichlid_throttler_map +ffffffff82ccf000 r smu_v11_0_irq_funcs +ffffffff82ccf010 r link_width +ffffffff82cd0000 r vangogh_ppt_funcs +ffffffff82cd03d0 r vangogh_throttler_map +ffffffff82cd1000 r renoir_ppt_funcs +ffffffff82cd13d0 r renoir_throttler_map +ffffffff82cd2000 r aldebaran_clk_map +ffffffff82cd20c0 r aldebaran_table_map +ffffffff82cd2140 r aldebaran_ppt_funcs +ffffffff82cd2510 r smu13_thermal_policy +ffffffff82cd2560 r aldebaran_i2c_algo +ffffffff82cd2570 r aldebaran_i2c_control_quirks +ffffffff82cd2580 r aldebaran_throttler_map +ffffffff82cd25a0 r aldebaran_message_map +ffffffff82cd2ff0 r aldebaran_feature_mask_map +ffffffff82cd4000 r smu_v13_0_irq_funcs +ffffffff82cd4010 r link_width +ffffffff82cd5000 r smu_v13_0_0_ppt_funcs +ffffffff82cd53d0 r smu13_thermal_policy +ffffffff82cd5420 r smu_v13_0_0_i2c_algo +ffffffff82cd5430 r smu_v13_0_0_i2c_control_quirks +ffffffff82cd5440 r smu_v13_0_0_throttler_map +ffffffff82cd6000 r smu_v13_0_4_ppt_funcs +ffffffff82cd7000 r smu_v13_0_5_ppt_funcs +ffffffff82cd8000 r smu_v13_0_7_ppt_funcs +ffffffff82cd83d0 r smu13_thermal_policy +ffffffff82cd8420 r smu_v13_0_7_throttler_map +ffffffff82cd9000 r yellow_carp_ppt_funcs +ffffffff82cda000 r __smu_message_names +ffffffff82cdb000 R pchb_ca +ffffffff82cdc000 R amas_ca +ffffffff82cdc028 R amas_devices +ffffffff82cdc040 r amas_feature +ffffffff82cdd000 R cardslot_ca +ffffffff82cde000 R cardbus_ca +ffffffff82cdf000 R com_cardbus_ca +ffffffff82ce0000 R xl_cardbus_ca +ffffffff82ce0030 R xl_cardbus_products +ffffffff82ce1000 R dc_cardbus_ca +ffffffff82ce1030 R dc_cardbus_devices +ffffffff82ce2000 R fxp_cardbus_ca +ffffffff82ce2028 R fxp_cardbus_devices +ffffffff82ce3000 R rl_cardbus_devices +ffffffff82ce3028 R rl_cardbus_ca +ffffffff82ce4000 R re_cardbus_ca +ffffffff82ce4028 R re_cardbus_devices +ffffffff82ce5000 R ath_cardbus_ca +ffffffff82ce6000 R athn_cardbus_ca +ffffffff82ce6030 r athn_cardbus_devices +ffffffff82ce7000 R atw_cardbus_ca +ffffffff82ce7028 R atw_cardbus_devices +ffffffff82ce8000 R rtw_cardbus_ca +ffffffff82ce8028 R rtw_cardbus_devices +ffffffff82ce9000 R ral_cardbus_ca +ffffffff82ce9030 r ral_cardbus_devices +ffffffff82cea000 R acx_cardbus_ca +ffffffff82cea028 r acx_cardbus_devices +ffffffff82ceb000 R pgt_cardbus_ca +ffffffff82ceb028 R pgt_cardbus_devices +ffffffff82cec000 R ehci_cardbus_ca +ffffffff82ced000 R ohci_cardbus_ca +ffffffff82cee000 R uhci_cardbus_ca +ffffffff82cef000 R malo_cardbus_ca +ffffffff82cef028 r malo_cardbus_devices +ffffffff82cf0000 R bwi_cardbus_ca +ffffffff82cf0030 r bwi_cardbus_devices +ffffffff82cf1000 R pcmcia_ca +ffffffff82cf2000 r pcmcia_parse_cis_tuple.init_cfe +ffffffff82cf3000 r pcmcia_cis_quirks +ffffffff82cf4000 R ep_pcmcia_ca +ffffffff82cf5000 R ne_pcmcia_ca +ffffffff82cf5030 R ne2000devs +ffffffff82cf7000 R aic_pcmcia_ca +ffffffff82cf8000 R com_pcmcia_ca +ffffffff82cf9000 R wdc_pcmcia_ca +ffffffff82cfa000 R sm_pcmcia_ca +ffffffff82cfb000 R xe_pcmcia_ca +ffffffff82cfc000 R wi_pcmcia_ca +ffffffff82cfc030 r wi_pcmcia_products +ffffffff82cfd000 R malo_pcmcia_ca +ffffffff82cfe000 R an_pcmcia_ca +ffffffff82cff000 R pcib_ca +ffffffff82d00000 R amdpcib_ca +ffffffff82d00028 R amdpcib_devices +ffffffff82d01000 R tcpcib_ca +ffffffff82d01028 R tcpcib_devices +ffffffff82d02000 R aapic_ca +ffffffff82d03000 R hme_pci_ca +ffffffff82d03028 r hme_promhdr +ffffffff82d0302a r hme_promdat +ffffffff82d04000 R isa_ca +ffffffff82d05000 R isadma_ca +ffffffff82d06000 R fdc_ca +ffffffff82d07000 R fd_ca +ffffffff82d08000 R com_isa_ca +ffffffff82d09000 R pckbc_isa_ca +ffffffff82d0a000 R vga_isa_ca +ffffffff82d0b000 R wdc_isa_ca +ffffffff82d0c000 R mpu_midi_hw_if +ffffffff82d0d000 R mpu_isa_ca +ffffffff82d0e000 R pcppi_ca +ffffffff82d0f000 R spkr_ca +ffffffff82d0f030 r pitchtab +ffffffff82d10000 R lpt_isa_ca +ffffffff82d11000 R wbsio_ca +ffffffff82d12000 R schsio_ca +ffffffff82d13000 R lm_isa_ca +ffffffff82d13028 R lm_wbsio_ca +ffffffff82d14000 R it_sensors +ffffffff82d14110 R it_vrfact +ffffffff82d14140 R it_fan_regs +ffffffff82d14160 R it_fan_ext_regs +ffffffff82d14178 R it_ca +ffffffff82d15000 R abitkv_sensors +ffffffff82d15200 R abitaa_sensors +ffffffff82d15480 R abitav_sensors +ffffffff82d15700 R abitas_sensors +ffffffff82d15980 R abitax_sensors +ffffffff82d15bc0 R abitm4_sensors +ffffffff82d15e80 R abitan_sensors +ffffffff82d16120 R abital_sensors +ffffffff82d163a0 R abitaw_sensors +ffffffff82d16700 R abitni_sensors +ffffffff82d169a0 R abitat_sensors +ffffffff82d16cc0 R abitan2_sensors +ffffffff82d16f60 R abitab_sensors +ffffffff82d17220 R abitan3_sensors +ffffffff82d17500 R abitaw2_sensors +ffffffff82d17860 R abitat2_sensors +ffffffff82d17b60 R abitab2_sensors +ffffffff82d17ea0 R abitin_sensors +ffffffff82d181e0 R uguru_ca +ffffffff82d19000 R aps_ca +ffffffff82d1a000 R wsdisplay_emul_ca +ffffffff82d1a030 r charClass +ffffffff82d1b000 r usl_syncops +ffffffff82d1c000 R wsevent_filtops +ffffffff82d1d000 R wskbd_ca +ffffffff82d1e000 r latin1_to_upper +ffffffff82d1f000 R wsmouse_ca +ffffffff82d20000 R cyrillic_to_koi8 +ffffffff82d20060 R unicode_to_latin2 +ffffffff82d200e0 R unicode_to_latin7 +ffffffff82d21000 R wsemul_vt100_ops +ffffffff82d22000 r decspcgr2uni +ffffffff82d22100 r dectech2uni +ffffffff82d22200 r nrctable +ffffffff82d22320 r nrcovlpos +ffffffff82d23000 r vt100_fkeys +ffffffff82d230c0 r vt100_pfkeys +ffffffff82d230e0 r vt100_numpad +ffffffff82d24000 R pckbd_ca +ffffffff82d24028 R pckbd_accessops +ffffffff82d24040 R pckbd_consops +ffffffff82d24060 R pckbd_keymapdata +ffffffff82d24070 R pckbd_xtbl +ffffffff82d24100 R pckbd_xtbl_ext +ffffffff82d25000 r pckbd_keydesc_us +ffffffff82d25250 r pckbd_keydesc_de +ffffffff82d252f0 r pckbd_keydesc_de_nodead +ffffffff82d25310 r pckbd_keydesc_fr +ffffffff82d253d0 r pckbd_keydesc_fr_dvorak_bepo +ffffffff82d25510 r pckbd_keydesc_dk +ffffffff82d255a0 r pckbd_keydesc_dk_nodead +ffffffff82d255b0 r pckbd_keydesc_it +ffffffff82d25640 r pckbd_keydesc_uk +ffffffff82d256e0 r pckbd_keydesc_jp +ffffffff82d25750 r pckbd_keydesc_sv +ffffffff82d25780 r pckbd_keydesc_sv_nodead +ffffffff82d25790 r pckbd_keydesc_no +ffffffff82d257c0 r pckbd_keydesc_no_nodead +ffffffff82d257d0 r pckbd_keydesc_us_declk +ffffffff82d25860 r pckbd_keydesc_us_dvorak +ffffffff82d25900 r pckbd_keydesc_us_colemak +ffffffff82d25948 r pckbd_keydesc_swapctrlcaps +ffffffff82d25960 r pckbd_keydesc_iopener +ffffffff82d259b0 r pckbd_keydesc_es +ffffffff82d25a50 r pckbd_keydesc_be +ffffffff82d25b10 r pckbd_keydesc_ru +ffffffff82d25c80 r pckbd_keydesc_ua +ffffffff82d25e10 r pckbd_keydesc_sg +ffffffff82d25ec0 r pckbd_keydesc_sg_nodead +ffffffff82d25ee0 r pckbd_keydesc_sf +ffffffff82d25f00 r pckbd_keydesc_pt +ffffffff82d25f90 r pckbd_keydesc_lt +ffffffff82d26070 r pckbd_keydesc_la +ffffffff82d26100 r pckbd_keydesc_br +ffffffff82d26180 r pckbd_keydesc_tr +ffffffff82d26230 r pckbd_keydesc_tr_nodead +ffffffff82d26250 r pckbd_keydesc_pl +ffffffff82d262b0 r pckbd_keydesc_hu +ffffffff82d263c0 r pckbd_keydesc_si +ffffffff82d264d0 r pckbd_keydesc_cf +ffffffff82d265a0 r pckbd_keydesc_cf_nodead +ffffffff82d265c0 r pckbd_keydesc_lv +ffffffff82d26640 r pckbd_keydesc_nl +ffffffff82d26720 r pckbd_keydesc_nl_nodead +ffffffff82d26740 r pckbd_keydesc_is +ffffffff82d267cc r pckbd_keydesc_is_nodead +ffffffff82d267e0 r pckbd_keydesc_ee +ffffffff82d26890 r pckbd_keydesc_ee_nodead +ffffffff82d268b0 R pckbd_keydesctab +ffffffff82d27000 R pms_ca +ffffffff82d27028 R pms_accessops +ffffffff82d27040 R pms_sec_accessops +ffffffff82d27060 R pms_protocols +ffffffff82d271e0 r alps_models +ffffffff82d28000 R skgpio_led_offset +ffffffff82d28008 R skgpio_ca +ffffffff82d29000 R hidkbd_trtab +ffffffff82d29100 r apple_fn_trans +ffffffff82d29120 r apple_tb_trans +ffffffff82d29140 r apple_mba_trans +ffffffff82d2a000 r hidcc_attach_wskbd.accessops +ffffffff82d2a020 r hidcc_keysyms +ffffffff82d2b000 R usb_ca +ffffffff82d2c000 R usb_known_products +ffffffff82d37f50 R usb_known_vendors +ffffffff82d3a750 R usbd_error_strs +ffffffff82d3b000 R usb_quirks +ffffffff82d3b390 R usb_dev_quirks +ffffffff82d3b398 R usbd_no_quirk +ffffffff82d3c000 R uhub_ca +ffffffff82d3c028 R uhub_uhub_ca +ffffffff82d3d000 R uaudio_ca +ffffffff82d3d028 R uaudio_hw_if +ffffffff82d3d0e0 R uaudio_rates +ffffffff82d3d120 r uaudio_clkname.names +ffffffff82d3d140 r uaudio_feature_addent.features +ffffffff82d3e000 R uvideo_ca +ffffffff82d3e028 R uvideo_hw_if +ffffffff82d3e100 R uvideo_devs +ffffffff82d3f000 r utvfu_select_norm.pal +ffffffff82d3f040 r utvfu_select_norm.ntsc +ffffffff82d3f080 r utvfu_setup_capture.setup +ffffffff82d3f180 r utvfu_audio_start_chip.setup +ffffffff82d3f1c8 r utvfu_audio_stop_chip.setup +ffffffff82d3f1d8 R utvfu_ca +ffffffff82d3f200 R utvfu_vid_hw_if +ffffffff82d3f2d0 R utvfu_au_hw_if +ffffffff82d40000 R udl_ca +ffffffff82d40030 r udl_devs +ffffffff82d400b0 r udl_modes +ffffffff82d41000 R umidi_hw_if +ffffffff82d41030 R umidi_ca +ffffffff82d41060 r umidi_evlen +ffffffff82d41080 r packet_length +ffffffff82d42000 r quirk_name +ffffffff82d43000 R ucom_ca +ffffffff82d44000 R ugen_ca +ffffffff82d44028 R ugenread_intr_filtops +ffffffff82d44058 R ugenread_isoc_filtops +ffffffff82d45000 R uhidev_ca +ffffffff82d45030 r uhid_graphire_report_descr +ffffffff82d450b0 r uhid_graphire3_4x5_report_descr +ffffffff82d45160 r uhid_xb360gp_report_descr +ffffffff82d45210 r uhid_xbonegp_report_descr +ffffffff82d46000 R uhid_ca +ffffffff82d46028 R uhidread_filtops +ffffffff82d47000 R fido_ca +ffffffff82d48000 R ujoy_ca +ffffffff82d49000 r ukbd_keydesc_us +ffffffff82d49290 r ukbd_keydesc_de +ffffffff82d49340 r ukbd_keydesc_de_nodead +ffffffff82d49360 r ukbd_keydesc_fr +ffffffff82d49420 r ukbd_keydesc_fr_apple +ffffffff82d49560 r ukbd_keydesc_fr_dvorak_bepo +ffffffff82d496a0 r ukbd_keydesc_dk +ffffffff82d49740 r ukbd_keydesc_dk_nodead +ffffffff82d49750 r ukbd_keydesc_it +ffffffff82d497f0 r ukbd_keydesc_uk +ffffffff82d498a0 r ukbd_keydesc_jp +ffffffff82d49910 r ukbd_keydesc_sv +ffffffff82d49940 r ukbd_keydesc_sv_nodead +ffffffff82d49950 r ukbd_keydesc_no +ffffffff82d49980 r ukbd_keydesc_no_nodead +ffffffff82d49990 r ukbd_keydesc_us_dvorak +ffffffff82d49a30 r ukbd_keydesc_us_colemak +ffffffff82d49a78 r ukbd_keydesc_swapctrlcaps +ffffffff82d49a90 r ukbd_keydesc_iopener +ffffffff82d49ae0 r ukbd_keydesc_es +ffffffff82d49b80 r ukbd_keydesc_be +ffffffff82d49c40 r ukbd_keydesc_ru +ffffffff82d49db0 r ukbd_keydesc_ua +ffffffff82d49f50 r ukbd_keydesc_sg +ffffffff82d4a010 r ukbd_keydesc_sg_nodead +ffffffff82d4a030 r ukbd_keydesc_sf +ffffffff82d4a050 r ukbd_keydesc_pt +ffffffff82d4a0e0 r ukbd_keydesc_pt_apple +ffffffff82d4a100 r ukbd_keydesc_lt +ffffffff82d4a1e0 r ukbd_keydesc_la +ffffffff82d4a280 r ukbd_keydesc_br +ffffffff82d4a310 r ukbd_keydesc_tr +ffffffff82d4a3d0 r ukbd_keydesc_tr_nodead +ffffffff82d4a3f0 r ukbd_keydesc_pl +ffffffff82d4a450 r ukbd_keydesc_hu +ffffffff82d4a560 r ukbd_keydesc_si +ffffffff82d4a680 r ukbd_keydesc_cf +ffffffff82d4a760 r ukbd_keydesc_cf_nodead +ffffffff82d4a780 r ukbd_keydesc_lv +ffffffff82d4a800 r ukbd_keydesc_nl +ffffffff82d4a8e0 r ukbd_keydesc_nl_nodead +ffffffff82d4a900 r ukbd_keydesc_is +ffffffff82d4a994 r ukbd_keydesc_is_nodead +ffffffff82d4a9a0 r ukbd_keydesc_ee +ffffffff82d4aa50 r ukbd_keydesc_ee_nodead +ffffffff82d4aa70 R ukbd_keydesctab +ffffffff82d4b000 R ukbd_countrylayout +ffffffff82d4b090 R ukbd_consops +ffffffff82d4b0b0 R ukbd_accessops +ffffffff82d4b0c8 R ukbd_ca +ffffffff82d4c000 R ums_accessops +ffffffff82d4c018 R ums_ca +ffffffff82d4d000 R umt_accessops +ffffffff82d4d018 R umt_ca +ffffffff82d4e000 R uts_devs +ffffffff82d4e010 R uts_accessops +ffffffff82d4e028 R uts_ca +ffffffff82d4f000 R ubcmtp_accessops +ffffffff82d4f018 R ubcmtp_ca +ffffffff82d4f040 r ubcmtp_devices +ffffffff82d50000 R ucycom_methods +ffffffff82d50040 R ucycom_devs +ffffffff82d50050 R ucycom_ca +ffffffff82d51000 R uslhcom_methods +ffffffff82d51040 R uslhcom_ca +ffffffff82d51068 r uslhcom_devs +ffffffff82d52000 R ulpt_ca +ffffffff82d53000 R umass_ca +ffffffff82d53028 R umass_bbb_methods +ffffffff82d53040 R umass_cbi_methods +ffffffff82d54000 R umass_quirks +ffffffff82d55000 R umass_scsi_switch +ffffffff82d56000 R uthum_devs +ffffffff82d56008 R uthum_ca +ffffffff82d56030 r uthum_sensor_type_s +ffffffff82d57000 R ugold_devs +ffffffff82d57010 R ugold_ca +ffffffff82d58000 R utrh_devs +ffffffff82d58008 R utrh_ca +ffffffff82d59000 R uoakrh_devs +ffffffff82d59008 R uoakrh_ca +ffffffff82d59030 R uoakrh_methods +ffffffff82d5a000 R uoaklux_devs +ffffffff82d5a008 R uoaklux_ca +ffffffff82d5a030 R uoaklux_methods +ffffffff82d5b000 R uoakv_devs +ffffffff82d5b008 R uoakv_ca +ffffffff82d5b030 R uoakv_methods +ffffffff82d5c000 R uonerng_ca +ffffffff82d5d000 R urng_ca +ffffffff82d5d030 r urng_devs +ffffffff82d5e000 R udcf_ca +ffffffff82d5e028 r udcf_devs +ffffffff82d5f000 R umbg_ca +ffffffff82d60000 R uvisor_methods +ffffffff82d60040 R uvisor_ca +ffffffff82d60070 r uvisor_devs +ffffffff82d61000 R udsbr_hw_if +ffffffff82d61028 R udsbr_ca +ffffffff82d62000 R utwitch_devs +ffffffff82d62008 R utwitch_ca +ffffffff82d63000 R aue_devs +ffffffff82d631b0 R aue_ca +ffffffff82d64000 R axe_devs +ffffffff82d640d0 R axe_ca +ffffffff82d65000 R axen_devs +ffffffff82d65020 R axen_ca +ffffffff82d66000 R smsc_ca +ffffffff82d66030 r smsc_devs +ffffffff82d67000 R cue_ca +ffffffff82d68000 R kue_devs +ffffffff82d68088 R kue_ca +ffffffff82d69000 R cdce_devs +ffffffff82d690a0 R cdce_ca +ffffffff82d6a000 R urndis_ca +ffffffff82d6a030 R urndis_class +ffffffff82d6b000 R mos_devs +ffffffff82d6b018 R mos_ca +ffffffff82d6c000 R mue_devs +ffffffff82d6c020 R mue_ca +ffffffff82d6d000 R udav_ca +ffffffff82d6d030 r udav_devs +ffffffff82d6e000 R upl_ca +ffffffff82d6f000 R ugl_ca +ffffffff82d70000 R url_ca +ffffffff82d70030 r url_devs +ffffffff82d71000 R ure_devs +ffffffff82d710f0 R ure_ca +ffffffff82d72000 R uaq_devs +ffffffff82d72018 R uaq_ca +ffffffff82d73000 R umodem_methods +ffffffff82d73040 R umodem_ca +ffffffff82d74000 R uftdi_methods +ffffffff82d74040 R uftdi_ca +ffffffff82d74070 r uftdi_devs +ffffffff82d75000 R uplcom_methods +ffffffff82d75040 R uplcom_ca +ffffffff82d75070 r uplcom_devs +ffffffff82d76000 R umct_methods +ffffffff82d76040 R umct_ca +ffffffff82d76070 r umct_devs +ffffffff82d77000 R uvscom_methods +ffffffff82d77040 R uvscom_ca +ffffffff82d77070 r uvscom_devs +ffffffff82d78000 R ubsa_methods +ffffffff82d78040 R ubsa_devs +ffffffff82d78060 R ubsa_ca +ffffffff82d79000 R ukspan_ca +ffffffff82d79028 r ukspan_devs +ffffffff82d79030 r ukspan_methods +ffffffff82d7a000 R uslcom_methods +ffffffff82d7a040 R uslcom_ca +ffffffff82d7a070 r uslcom_devs +ffffffff82d7b000 R uark_methods +ffffffff82d7b040 R uark_ca +ffffffff82d7b068 r uark_devs +ffffffff82d7c000 R moscom_methods +ffffffff82d7c040 R moscom_ca +ffffffff82d7c068 r moscom_devs +ffffffff82d7d000 R umcs_methods +ffffffff82d7d040 R umcs_devs +ffffffff82d7d050 R umcs_ca +ffffffff82d7e000 R uscom_methods +ffffffff82d7e040 R uscom_ca +ffffffff82d7e068 r uscom_devs +ffffffff82d7f000 R ucrcom_methods +ffffffff82d7f040 R ucrcom_ca +ffffffff82d80000 R uxrcom_methods +ffffffff82d80040 R uxrcom_ca +ffffffff82d80068 r uxrcom_devs +ffffffff82d81000 R uipaq_methods +ffffffff82d81040 R uipaq_ca +ffffffff82d81070 r uipaq_devs +ffffffff82d82000 R umsm_methods +ffffffff82d82040 R umsm_ca +ffffffff82d82070 r umsm_devs +ffffffff82d83000 R uchcom_methods +ffffffff82d83040 R uchcom_ca +ffffffff82d83068 r uchcom_devs +ffffffff82d83080 r dividers +ffffffff82d84000 R uticom_methods +ffffffff82d84040 R uticom_ca +ffffffff82d84070 r uticom_devs +ffffffff82d85000 R wi_usb_devs +ffffffff82d850f0 R wi_usb_ca +ffffffff82d86000 R atu_ca +ffffffff82d87000 R ural_ca +ffffffff82d87030 r ural_devs +ffffffff82d870a0 r ural_rf2522_r2 +ffffffff82d870e0 r ural_rf2524_r2 +ffffffff82d87120 r ural_rf2525_hi_r2 +ffffffff82d87160 r ural_rf2525_r2 +ffffffff82d871a0 r ural_rf2525e_r2 +ffffffff82d871e0 r ural_rf2526_hi_r2 +ffffffff82d87220 r ural_rf2526_r2 +ffffffff82d87260 r ural_def_bbp +ffffffff82d872a0 r ural_def_mac +ffffffff82d88000 R rum_ca +ffffffff82d88030 r rum_devs +ffffffff82d88110 r rum_rf5225 +ffffffff82d88460 r rum_rf5226 +ffffffff82d887b0 r rum_def_bbp +ffffffff82d887f0 r rum_def_mac +ffffffff82d89000 R run_ca +ffffffff82d89030 r run_devs +ffffffff82d89430 r rt2860_rf2850 +ffffffff82d89860 r rt2860_rates +ffffffff82d89920 r rt5592_freqs_40mhz +ffffffff82d89a60 r rt5592_freqs_20mhz +ffffffff82d89ba0 r rt5592_2ghz_def_rf +ffffffff82d89be0 r rt5592_chan_5ghz +ffffffff82d89e30 r rt5592_def_bbp +ffffffff82d89e70 r rt5592_bbp_r196 +ffffffff82d89ed0 r rt5390_def_bbp +ffffffff82d89f00 r rt3572_def_rf +ffffffff82d89f40 r rt3070_def_rf +ffffffff82d89f70 r rt3593_def_rf +ffffffff82d89fb0 r rt5592_def_rf +ffffffff82d89fe0 r rt5392_def_rf +ffffffff82d8a060 r rt5390_def_rf +ffffffff82d8a0e0 r rt2870_def_mac +ffffffff82d8b000 R mtw_ca +ffffffff82d8b030 r mtw_devs +ffffffff82d8b070 r rt2860_rates +ffffffff82d8b130 r mt7601_rf_chan +ffffffff82d8b1a0 r mt7601_def_bbp +ffffffff82d8b2d0 r mt7601_rf_bank0 +ffffffff82d8b330 r mt7601_rf_bank4 +ffffffff82d8b3b0 r mt7601_rf_bank5 +ffffffff82d8b430 r mt7601_def_mac +ffffffff82d8c000 R zyd_ca +ffffffff82d8c030 r zyd_devs +ffffffff82d8c1b0 r zyd_rfmd_init.phyini +ffffffff82d8c2e0 r zyd_rfmd_init.rfini +ffffffff82d8c330 r zyd_rfmd_set_channel.rfprog +ffffffff82d8c3a0 r zyd_al2230_init.phyini +ffffffff82d8c480 r zyd_al2230_init.rfini +ffffffff82d8c4e0 r zyd_al2230_init_b.phyini +ffffffff82d8c5d0 r zyd_al2230_init_b.rfini +ffffffff82d8c620 r zyd_al2230_set_channel.rfprog +ffffffff82d8c6d0 r zyd_al7230B_init.phyini_1 +ffffffff82d8c7b0 r zyd_al7230B_init.rfini_1 +ffffffff82d8c7f0 r zyd_al7230B_set_channel.rfprog +ffffffff82d8c860 r zyd_al7230B_set_channel.rfsc +ffffffff82d8c890 r zyd_al2210_init.phyini +ffffffff82d8c8f0 r zyd_al2210_init.rfini +ffffffff82d8c920 r zyd_al2210_set_channel.rfprog +ffffffff82d8c960 r zyd_gct_init.phyini +ffffffff82d8c9b0 r zyd_gct_init.rfini +ffffffff82d8ca50 r zyd_gct_set_channel.rfprog +ffffffff82d8ca90 r zyd_maxim_set_channel.phyini +ffffffff82d8cba0 r zyd_maxim_set_channel.rfini +ffffffff82d8cbe0 r zyd_maxim_set_channel.rfprog +ffffffff82d8cc50 r zyd_maxim2_set_channel.phyini +ffffffff82d8cd70 r zyd_maxim2_set_channel.rfini +ffffffff82d8cdb0 r zyd_maxim2_set_channel.rfprog +ffffffff82d8ce20 r zyd_rf_name.zyd_rfs +ffffffff82d8cea0 r zyd_def_phyB +ffffffff82d8d0d0 r zyd_def_phy +ffffffff82d8e000 R upgt_ca +ffffffff82d8e028 r upgt_devs_1 +ffffffff82d8e030 r upgt_devs_2 +ffffffff82d8f000 R urtw_ca +ffffffff82d8f030 r urtw_devs +ffffffff82d8f090 r urtw_ratetable +ffffffff82d8f0f0 r urtw_8225_gain +ffffffff82d8f110 r urtw_8225_txpwr_cck_ch14 +ffffffff82d8f140 r urtw_8225_txpwr_cck +ffffffff82d8f170 r urtw_8225_tx_gain_cck_ofdm +ffffffff82d8f176 r urtw_8225_txpwr_ofdm +ffffffff82d8f180 r urtw_8225_rf_part1 +ffffffff82d8f200 r urtw_8225_rxgain +ffffffff82d8f2c0 r urtw_8225_agc +ffffffff82d8f340 r urtw_8225_rf_part2 +ffffffff82d8f470 r urtw_8225_rf_part3 +ffffffff82d8f550 r urtw_8225_channel +ffffffff82d8f58c r urtw_8225_threshold +ffffffff82d8f5a0 r urtw_8225v2_gain_bg +ffffffff82d8f5c0 r urtw_8225v2_tx_gain_cck_ofdm +ffffffff82d8f5f0 r urtw_8225v2_rf_part1 +ffffffff82d8f670 r urtw_8225v2_rxgain +ffffffff82d8f730 r urtw_8225v2_rf_part2 +ffffffff82d8f870 r urtw_8225v2_rf_part3 +ffffffff82d8f970 r urtw_8187b_regtbl +ffffffff82d8fa90 r urtw_8225v2_b_rf +ffffffff82d8fb20 r urtw_8225v2_agc +ffffffff82d8fba0 r urtw_8225v2_ofdm +ffffffff82d90000 R urtwn_ca +ffffffff82d90030 r urtwn_devs +ffffffff82d90340 r rtl8188eu_mac +ffffffff82d904b0 r rtl8188ftv_mac +ffffffff82d90650 r rtl8192eu_mac +ffffffff82d907f0 r rtl8192cu_mac +ffffffff82d90948 r rtl8188eu_bb_prog +ffffffff82d90970 r rtl8188ftv_bb_prog +ffffffff82d90998 r rtl8192eu_bb_prog +ffffffff82d909c0 r rtl8188ce_bb_prog +ffffffff82d909e8 r rtl8188ru_bb_prog +ffffffff82d90a10 r rtl8188cu_bb_prog +ffffffff82d90a38 r rtl8192ce_bb_prog +ffffffff82d90a60 r rtl8192cu_bb_prog +ffffffff82d90a90 r rtl8188eu_bb_regs +ffffffff82d90c10 r rtl8188eu_bb_vals +ffffffff82d90f10 r rtl8188eu_agc_vals +ffffffff82d91110 r rtl8188ftv_bb_regs +ffffffff82d912b0 r rtl8188ftv_bb_vals +ffffffff82d915f0 r rtl8188ftv_agc_vals +ffffffff82d916f0 r rtl8192e_bb_regs +ffffffff82d91890 r rtl8192e_bb_vals +ffffffff82d91bd0 r rtl8192eu_agc_vals +ffffffff82d91dd0 r rtl8192ce_bb_regs +ffffffff82d91f50 r rtl8188ce_bb_vals +ffffffff82d92240 r rtl8188ce_agc_vals +ffffffff82d924c0 r rtl8188ru_bb_regs +ffffffff82d92640 r rtl8188ru_bb_vals +ffffffff82d92940 r rtl8188ru_agc_vals +ffffffff82d92bc0 r rtl8188cu_bb_vals +ffffffff82d92eb0 r rtl8192ce_bb_vals +ffffffff82d931a0 r rtl8192ce_agc_vals +ffffffff82d93420 r rtl8192cu_bb_vals +ffffffff82d94000 R rsu_ca +ffffffff82d94030 r rsu_devs +ffffffff82d940c8 r rsu_devs_noht +ffffffff82d940d0 r rsu_qid2idx_4ep +ffffffff82d940da r rsu_qid2idx_6ep +ffffffff82d940e4 r rsu_qid2idx_11ep +ffffffff82d940ee r r92s_epaddr +ffffffff82d95000 R otus_ca +ffffffff82d95030 r otus_devs +ffffffff82d95090 r ar_chans +ffffffff82d950c0 r otus_rates +ffffffff82d950e0 r ar5416_phy_regs +ffffffff82d95380 r ar5416_phy_vals_2ghz_20mhz +ffffffff82d958b0 r ar5416_phy_vals_5ghz_20mhz +ffffffff82d95de0 r ar5416_banks_vals_5ghz +ffffffff82d95ef0 r ar5416_banks_vals_2ghz +ffffffff82d96000 r ar5416_banks_regs +ffffffff82d97000 R umb_regstates +ffffffff82d97080 R umb_dataclasses +ffffffff82d97190 R umb_simstate +ffffffff82d97210 R umb_messages +ffffffff82d972b0 R umb_status +ffffffff82d97570 R umb_cids +ffffffff82d976e0 R umb_pktstate +ffffffff82d97740 R umb_actstate +ffffffff82d977a0 R umb_error +ffffffff82d97830 R umb_pintype +ffffffff82d97960 R umb_istate +ffffffff82d979f0 R umb_ca +ffffffff82d97a20 R umb_quirks +ffffffff82d98000 R uath_ca +ffffffff82d98030 r uath_devs +ffffffff82d99000 R athn_usb_ca +ffffffff82d99030 r athn_usb_devs +ffffffff82d9a000 R uow_ca +ffffffff82d9a028 r uow_devs +ffffffff82d9b000 R uberry_devices +ffffffff82d9b008 R uberry_ca +ffffffff82d9c000 R upd_ca +ffffffff82d9d000 R uwacom_devs +ffffffff82d9d010 R uwacom_ca +ffffffff82d9d038 R uwacom_accessops +ffffffff82d9e000 R bwfm_usb_ca +ffffffff82d9e030 r bwfm_usbdevs +ffffffff82d9f000 R umstc_ca +ffffffff82d9f028 r umstc_devs +ffffffff82da0000 R uhidpp_ca +ffffffff82da0028 r uhidpp_devs +ffffffff82da1000 R ucc_ca +ffffffff82da2000 R iic_ca +ffffffff82da3000 r probes +ffffffff82da4000 R lmtemp_ca +ffffffff82da5000 R lmn_ca +ffffffff82da6000 R lmenv_ca +ffffffff82da7000 R maxtmp_ca +ffffffff82da8000 R adc_ca +ffffffff82da9000 R admtemp_ca +ffffffff82daa000 R admlc_ca +ffffffff82dab000 R admtm_ca +ffffffff82dac000 R admtmp_ca +ffffffff82dad000 R admtt_ca +ffffffff82dae000 R maxds_ca +ffffffff82daf000 R adt_ca +ffffffff82db0000 R lm_i2c_ca +ffffffff82db1000 R admcts_ca +ffffffff82db2000 R wbng_ca +ffffffff82db3000 R nvt_ca +ffffffff82db3030 r nvt_volt_desc +ffffffff82db4000 R adl_ca +ffffffff82db5000 R andl_ca +ffffffff82db5030 r andl_temp +ffffffff82db6000 R spdmem_iic_ca +ffffffff82db7000 R sdtemp_ca +ffffffff82db8000 R lisa_ca +ffffffff82db9000 R ihidev_ca +ffffffff82dba000 R ikbd_consops +ffffffff82dba020 R ikbd_accessops +ffffffff82dba038 R ikbd_ca +ffffffff82dbb000 R ims_accessops +ffffffff82dbb018 R ims_ca +ffffffff82dbc000 R imt_accessops +ffffffff82dbc018 R imt_ca +ffffffff82dbd000 R iatp_accessops +ffffffff82dbd018 R iatp_ca +ffffffff82dbd040 r mxt_t19_button_map_devs +ffffffff82dbe000 R bgw_ca +ffffffff82dbf000 R icc_ca +ffffffff82dc0000 R gpio_ca +ffffffff82dc1000 r sbtn_pnp +ffffffff82dc1108 R acpiread_filtops +ffffffff82dc2000 R hext +ffffffff82dc4000 R acpitimer_ca +ffffffff82dc5000 R acpiac_ca +ffffffff82dc6000 R acpibat_ca +ffffffff82dc7000 R acpibtn_ca +ffffffff82dc8000 R acpicmos_ca +ffffffff82dc9000 R acpicpu_ca +ffffffff82dca000 R acpihpet_ca +ffffffff82dcb000 R acpiec_ca +ffffffff82dcc000 R acpitz_ca +ffffffff82dcd000 R acpimadt_ca +ffffffff82dce000 R acpimcfg_ca +ffffffff82dcf000 R acpiprt_ca +ffffffff82dd0000 R acpidmar_ca +ffffffff82dd1000 R acpidock_ca +ffffffff82dd2000 R abl_ca +ffffffff82dd3000 R asmc_ca +ffffffff82dd3030 r asmc_prods +ffffffff82dd46c0 r asmc_temp_desc +ffffffff82dd4c60 r asmc_fan_loc +ffffffff82dd4cf0 r asmc_light_desc +ffffffff82dd5000 R acpiasus_ca +ffffffff82dd6000 R acpithinkpad_ca +ffffffff82dd7000 R acpitoshiba_ca +ffffffff82dd8000 R acpisony_ca +ffffffff82dd9000 R acpivideo_ca +ffffffff82dda000 R acpivout_ca +ffffffff82ddb000 R acpipwrres_ca +ffffffff82ddc000 R aibs_ca +ffffffff82ddd000 R aplgpio_ca +ffffffff82dde000 R bytgpio_ca +ffffffff82dde030 R byt_score_pins +ffffffff82dde1d0 R byt_ncore_pins +ffffffff82dde240 R byt_sus_pins +ffffffff82ddf000 R chvgpio_ca +ffffffff82ddf030 R chv_southwest_pins +ffffffff82ddf050 R chv_north_pins +ffffffff82ddf068 R chv_east_pins +ffffffff82ddf080 R chv_southeast_pins +ffffffff82de0000 R glkgpio_ca +ffffffff82de1000 R pchgpio_ca +ffffffff82de1030 R spt_lp_groups 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entropy_pool0 +ffffffff830ce000 R rs_buf0 +ffffffff830cf000 R __guard_local +ffffffff830d0000 A __data_start +ffffffff830d0000 D gdt64 +ffffffff830d0000 R _erodata +ffffffff830d0000 R erodata +ffffffff830d0040 d gdt64_start +ffffffff830d0058 d farjmp64 +ffffffff830d0058 d gdt64_end +ffffffff830d0260 d tmpstk +ffffffff830d2000 d drm_minor_lock +ffffffff830d2010 D drm_cd +ffffffff830d3000 D _vga_scrlist +ffffffff830d3030 D _vga_scrlist_mono +ffffffff830d3048 d vga_builtinfont +ffffffff830d3080 D vga_cd +ffffffff830d4000 D at_poll +ffffffff830d4008 D wdc_cd +ffffffff830d4028 D wdc_default_vtbl +ffffffff830d5000 D ahc_tailq +ffffffff830d5010 D ahc_chip_names +ffffffff830d5080 d ahc_phase_table +ffffffff830d5120 d ahc_syncrates +ffffffff830d6000 D ahc_cd +ffffffff830d7000 D ahd_tailq +ffffffff830d7010 D ahd_attach_to_HostRAID_controllers +ffffffff830d7020 D ahd_chip_names +ffffffff830d7040 d ahd_phase_table +ffffffff830d8000 D ahd_cd +ffffffff830d9000 D aic_cd +ffffffff830da000 D adw_cd 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dt_static_raw_syscalls_sys_enter +ffffffff831213b0 D dt_static_raw_syscalls_sys_exit +ffffffff83121420 D dt_static_uvm_fault +ffffffff83121490 D dt_static_uvm_map_insert +ffffffff83121500 D dt_static_uvm_map_remove +ffffffff83121570 D dt_static_uvm_malloc +ffffffff831215e0 D dt_static_uvm_free +ffffffff83121650 D dt_static_uvm_pool_get +ffffffff831216c0 D dt_static_uvm_pool_put +ffffffff83121730 D dt_static_vfs_bufcache_rel +ffffffff831217a0 D dt_static_vfs_bufcache_take +ffffffff83121810 D dt_static_vfs_cleaner +ffffffff83121880 D dt_static_vmm_guest_enter +ffffffff831218f0 D dt_static_vmm_guest_exit +ffffffff83121960 D dt_static_vmm_inout +ffffffff831219d0 D dt_static_smr_call +ffffffff83121a40 D dt_static_smr_called +ffffffff83121ab0 D dt_static_smr_barrier_enter +ffffffff83121b20 D dt_static_smr_barrier_exit +ffffffff83121b90 D dt_static_smr_wakeup +ffffffff83121c00 D dt_static_smr_thread +ffffffff83121c70 D dt_static_refcnt_none +ffffffff83121ce0 D dt_static_refcnt_ifaddr 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rndlock +ffffffff8312d060 D rndreinit_timeout +ffffffff8312d0a8 D rnd_task +ffffffff8312e000 D video_cd +ffffffff8312f000 d rrip_table_analyze +ffffffff8312f0e0 d rrip_table_getname +ffffffff8312f1e0 d rrip_table_getsymname +ffffffff8312f280 d rrip_table_extref +ffffffff83130000 D nexecs +ffffffff83131000 D elf_note_names +ffffffff83132000 D ncpus +ffffffff83132004 D ncpusfound +ffffffff83133000 D acct_lock +ffffffff83133010 D acctsuspend +ffffffff83133014 D acctresume +ffffffff83133018 D acctrate +ffffffff83134000 D ticks +ffffffff83134008 D jiffies +ffffffff83135000 D clockintr_mtx +ffffffff83135010 D statclock_gen +ffffffff83136000 D fhdlk +ffffffff83137000 D kqueue_klist_lock +ffffffff83137010 D kq_timeoutmax +ffffffff83138000 D stackgap_random +ffffffff83139000 D nprocesses +ffffffff83139004 D nthreads +ffffffff83139008 D fork_tfmrate +ffffffff8313a000 D kthread_q +ffffffff8313b000 D malloc_mtx +ffffffff8313b010 D memname +ffffffff8313b4a0 D sysctl_kmemlock +ffffffff8313b4b0 D malloc_errintvl +ffffffff8313c000 D maxdmap +ffffffff8313c008 D maxsmap +ffffffff8313c010 D rlimit_lock +ffffffff8313d000 D sched_cost_load +ffffffff8313d004 D sched_cost_priority +ffffffff8313d008 D sched_cost_runnable +ffffffff8313d00c D sched_cost_resident +ffffffff8313e000 D intrmap_lock +ffffffff8313f000 D nosuidcoredump +ffffffff8313f008 D sigio_lock +ffffffff83140000 D smr_lock +ffffffff83140010 D smr_logintvl +ffffffff83141000 D startuphook_list +ffffffff83142000 D sysctl_lock +ffffffff83142010 D sysctl_disklock +ffffffff83142020 d openbsd +ffffffff83142024 d arg_max +ffffffff83142028 d posix_version +ffffffff8314202c d ngroups_max +ffffffff83142030 d int_one +ffffffff83142034 d maxpartitions +ffffffff83142038 d raw_part +ffffffff8314203c D allowpowerdown +ffffffff83142040 D hw_power +ffffffff83142044 d byte_order +ffffffff83142048 d page_size +ffffffff83143000 d thrsleep_queue +ffffffff83143010 d thrsleep_lock +ffffffff83144000 D tc_lock +ffffffff83144010 D windup_mtx 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+ffffffff83167000 D loop_cloner +ffffffff83168000 D ifmedia_mtx +ffffffff83169000 D ppp_compressors +ffffffff83169020 D ppp_cloner +ffffffff8316a000 D ppp_pkt_init +ffffffff8316b000 D ppp_bsd_compress +ffffffff8316c000 D ppp_deflate +ffffffff8316c070 D ppp_deflate_draft +ffffffff8316d000 D tun_cloner +ffffffff8316d030 D tap_cloner +ffffffff8316e000 D bridgeintrq +ffffffff8316e038 D bridge_cloner +ffffffff8316f000 d veb_cloner +ffffffff8316f030 d vport_cloner +ffffffff83170000 D vlan_tagh_lk +ffffffff83170010 D vlan_cloner +ffffffff83170040 D svlan_cloner +ffffffff83171000 D pipex_list_mtx +ffffffff83171010 D pipex_prune +ffffffff83171018 D pipexoutq +ffffffff83171050 d SHAPad2 +ffffffff83172000 D rtmap_gc +ffffffff83172018 D rt_rc +ffffffff83173000 D rt_labels +ffffffff83173010 D rtlabel_mtx +ffffffff83174000 D enc_cloner +ffffffff83175000 D gre_cloner +ffffffff83175030 D gre_list +ffffffff83175040 D mgre_cloner +ffffffff83175070 D egre_cloner +ffffffff831750a0 D nvgre_cloner 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+ffffffff83185008 D divbhashsize +ffffffff83186000 D icmptstamprepl +ffffffff83186004 D icmperrppslim +ffffffff83186008 D icmp_redirtimeout +ffffffff83187000 D ipsendredirects +ffffffff83187004 D ip_defttl +ffffffff83187008 D ip_mtudisc +ffffffff8318700c D ip_mtudisc_timeout +ffffffff83187010 D ipq_mutex +ffffffff83187020 D ip_maxqueue +ffffffff83187028 D ipintrq +ffffffff83187060 d ipsend_task +ffffffff83187090 d ipsendraw_task +ffffffff83188000 D ip_mrtproto +ffffffff83188004 d sin +ffffffff83189000 D rip_sendspace +ffffffff83189008 D rip_recvspace +ffffffff8318a000 D tcprexmtthresh +ffffffff8318a004 D tcptv_keep_init +ffffffff8318a008 D tcp_rst_ppslim +ffffffff8318a00c D tcp_ackdrop_ppslim +ffffffff8318a010 D tcp_syn_hash_size +ffffffff8318a014 D tcp_syn_cache_limit +ffffffff8318a018 D tcp_syn_bucket_limit +ffffffff8318a01c D tcp_syn_use_limit +ffffffff8318b000 D tcp_outflags +ffffffff8318c000 D tcp_timer_mtx +ffffffff8318c010 D tcp_mssdflt +ffffffff8318c014 D tcp_rttdflt +ffffffff8318c018 D tcp_do_rfc1323 +ffffffff8318c01c D tcp_do_sack +ffffffff8318c020 D tcp_do_rfc3390 +ffffffff8318c024 D tcp_reass_limit +ffffffff8318c028 D tcp_sackhole_limit +ffffffff8318d000 D tcp_backoff +ffffffff8318d034 D tcp_totbackoff +ffffffff8318e000 D tcp_sendspace +ffffffff8318e004 D tcp_recvspace +ffffffff8318e008 D tcp_autorcvbuf_inc +ffffffff8318f000 D udpcksum +ffffffff8318f004 D udp_sendspace +ffffffff8318f008 D udp_recvspace +ffffffff83190000 D ipsec_flows_mtx +ffffffff83190010 D ipsec_ids_idle +ffffffff83190014 D ipsec_ids_next_flow +ffffffff83190018 D ipsec_policy_head +ffffffff83190028 D ipsp_ids_gc_timeout +ffffffff83190070 D tdb_sadb_mtx +ffffffff83190080 d tdb_hashmask +ffffffff83191000 D ipo_tdb_mtx +ffffffff83191010 D ipsec_acquire_mtx +ffffffff83191020 D ipsec_acquire_head +ffffffff83192000 D ipsec_keep_invalid +ffffffff83192004 D ipsec_require_pfs +ffffffff83192008 D ipsec_soft_timeout +ffffffff8319200c D ipsec_exp_timeout +ffffffff83192010 D ipsec_soft_first_use +ffffffff83192014 D ipsec_exp_first_use +ffffffff83192018 D ipsec_expire_acquire +ffffffff8319201c D esp_enable +ffffffff83192020 D ah_enable +ffffffff83193000 D udpencap_enable +ffffffff83193004 D udpencap_port +ffffffff83194000 D carp_vh_rc +ffffffff83194020 D carp_sc_rc +ffffffff83194040 D carp_opts +ffffffff83194058 D carp_cloner +ffffffff83194088 d carp_send_na.mcast +ffffffff83195000 d PADDING +ffffffff83196000 d PADDING +ffffffff83197000 d weak_keys +ffffffff83198000 D swcr_id +ffffffff83199000 D window_inflate +ffffffff83199004 D window_deflate +ffffffff8319a000 D ghash_update +ffffffff8319b000 D mpls_defttl +ffffffff8319b004 D mpls_mapttl_ip +ffffffff8319c000 D nfskevq_lock +ffffffff8319d000 D nfs_backoff +ffffffff8319d020 D nfs_ptimers +ffffffff8319e000 D desirednfsrvcache +ffffffff8319e010 D nonidempotent +ffffffff8319e070 D nfsv2_repstat +ffffffff8319f000 D nfsv2_type +ffffffff8319f030 D nfsv3_type +ffffffff8319f060 D nv2tov_type +ffffffff8319f080 D nv3tov_type +ffffffff8319f0a0 D nfsv3_procid +ffffffff8319f100 D nfsv2_procid +ffffffff8319f15c d nfsv3err_getattr +ffffffff8319f170 d nfsv3err_setattr +ffffffff8319f190 d nfsv3err_lookup +ffffffff8319f1a4 d nfsv3err_access +ffffffff8319f1b0 d nfsv3err_readlink +ffffffff8319f1d0 d nfsv3err_read +ffffffff8319f1f0 d nfsv3err_write +ffffffff8319f210 d nfsv3err_create +ffffffff8319f230 d nfsv3err_mkdir +ffffffff8319f250 d nfsv3err_symlink +ffffffff8319f270 d nfsv3err_mknod +ffffffff8319f290 d nfsv3err_remove +ffffffff8319f2b0 d nfsv3err_rmdir +ffffffff8319f2d0 d nfsv3err_rename +ffffffff8319f300 d nfsv3err_link +ffffffff8319f330 d nfsv3err_readdir +ffffffff8319f350 d nfsv3err_readdirplus +ffffffff8319f366 d nfsv3err_fsstat +ffffffff8319f372 d nfsv3err_fsinfo +ffffffff8319f37c d nfsv3err_pathconf +ffffffff8319f386 d nfsv3err_commit +ffffffff831a0000 D nfsrv3_procs +ffffffff831a00b8 D nfs_niothreads +ffffffff831a1000 D fragtbl +ffffffff831a2000 D ffs_vtbl +ffffffff831a3000 D softdep_typenames +ffffffff831a3070 D tickdelay +ffffffff831a4000 D dirchk +ffffffff831a5000 D desireddquot +ffffffff831a6000 D amap_list_lock +ffffffff831a7000 d uao_list_lock +ffffffff831a8000 d uvmexp_countersboot_boot_cpumem +ffffffff831a80c0 D uvmexp_counters +ffffffff831a80c8 D vm_min_kernel_address +ffffffff831a9000 D no_constraint +ffffffff831aa000 d uvm_kmapent_warn_rate +ffffffff831ab000 D maxslp +ffffffff831ac000 D uvmpagerops +ffffffff831ad000 D uvm_swap_data_lock +ffffffff831ad010 D swap_syscall_lock +ffffffff831ad020 D oommtx +ffffffff831ae000 D uvm_doswapencrypt +ffffffff831af000 D gif_list +ffffffff831af010 D gif_cloner +ffffffff831b0000 D divert6_sendspace +ffffffff831b0004 D divert6_recvspace +ffffffff831b0008 D divb6hashsize +ffffffff831b1000 d in6_get_hw_ifid.allone +ffffffff831b2000 D ip6_sendredirects +ffffffff831b2004 D ip6_defhlim +ffffffff831b2008 D ip6_defmcasthlim +ffffffff831b200c D ip6_maxfragpackets +ffffffff831b2010 D ip6_maxfrags +ffffffff831b2014 D ip6_log_interval +ffffffff831b2018 D ip6_hdrnestlimit +ffffffff831b201c D ip6_dad_count +ffffffff831b2020 D ip6_auto_flowlabel +ffffffff831b2024 D ip6_use_deprecated +ffffffff831b2028 D ip6_neighborgcthresh +ffffffff831b202c D ip6_maxdynroutes +ffffffff831b2030 D rip6_sendspace +ffffffff831b2038 D rip6_recvspace +ffffffff831b2040 D icmp6_redirtimeout +ffffffff831b2044 D icmp6errppslim +ffffffff831b2048 D ip6_mtudisc_timeout +ffffffff831b3000 D frag6_mutex +ffffffff831b4000 d icmp6_mtudisc_hiwat +ffffffff831b4004 d icmp6_mtudisc_lowat +ffffffff831b5000 d randomtab_20 +ffffffff831b6000 D ip6intrq +ffffffff831b6038 d ip6send_task +ffffffff831b7000 D nd6_timer_next +ffffffff831b7008 D nd6_expire_next +ffffffff831b7010 D nd6_delay +ffffffff831b7014 D nd6_umaxtries +ffffffff831b7018 D nd6_mmaxtries +ffffffff831b701c D nd6_gctimer +ffffffff831b7020 D nd6_maxndopt +ffffffff831b7028 D nd6_mtx +ffffffff831b7038 D nd6_list +ffffffff831b8000 d dadq +ffffffff831b9000 D pfkeyv2_mtx +ffffffff831b9010 d pfkeyv2_seq +ffffffff831ba000 D sadb_exts_allowed_in +ffffffff831ba090 D sadb_exts_required_in +ffffffff831bb000 D cold +ffffffff831bc000 D bdevsw +ffffffff831bc460 D nblkdev +ffffffff831bc470 D cdevsw +ffffffff831be400 D nchrdev +ffffffff831be404 D mem_no +ffffffff831be408 D swapdev +ffffffff831be410 D constab +ffffffff831bf000 D machine +ffffffff831bf008 D lid_action +ffffffff831bf00c D pwr_action +ffffffff831bf010 D isa_constraint +ffffffff831bf020 D dma_constraint +ffffffff831bf030 D uvm_md_constraints +ffffffff831bf048 D delay_func +ffffffff831bf050 D initclock_func +ffffffff831bf058 D bootinfo_size +ffffffff831bf05c D waittime +ffffffff831bf060 D dumpmag +ffffffff831c0000 D tsc_rdtsc +ffffffff831c0008 D tsc_timecounter +ffffffff831c0058 D tsc_is_synchronized +ffffffff831c1000 D local_apic +ffffffff831c1020 D lapic_id +ffffffff831c1080 D lapic_tpr +ffffffff831c10a0 d lapic_ppr +ffffffff831c1100 d lapic_isr +ffffffff831c2000 D warn_once +ffffffff831c3000 d errata +ffffffff831c4000 D cpu_ucode_intel_mtx +ffffffff831c5000 D mem_owner_bios +ffffffff831c5008 D mrops +ffffffff831c5028 D mtrrmask +ffffffff831c5030 D mtrrtomrt +ffffffff831c6000 D pmap_pg_wc +ffffffff831c6008 D pmaps_lock +ffffffff831c6018 d pmap_maxkvaddr +ffffffff831c7000 D kv_physwait +ffffffff831c8000 D fpu_save_len +ffffffff831c9000 D i8259_pic +ffffffff831ca000 D softintr_pic +ffffffff831cb000 D ipifunc +ffffffff831cc000 D setperf_mp_mutex +ffffffff831cd000 D db_Grp6 +ffffffff831cd040 D db_Grp7 +ffffffff831cd100 D db_Grp8 +ffffffff831cd140 D db_Grp9 +ffffffff831cd200 D db_GrpA +ffffffff831cd240 D db_GrpB +ffffffff831cd280 D db_GrpC +ffffffff831cd2c0 D db_inst_0f0x +ffffffff831cd440 D db_inst_0f2x +ffffffff831cd5c0 D db_inst_0f3x +ffffffff831cd740 D db_inst_0f8x +ffffffff831cd8c0 D db_inst_0f9x +ffffffff831cda40 D db_inst_0fax +ffffffff831cdbc0 D db_inst_0fbx +ffffffff831cdd40 D db_inst_0fcx +ffffffff831cdec0 D db_inst_0f +ffffffff831cdf40 D db_Esc92 +ffffffff831cdf80 D db_Esc94 +ffffffff831cdfc0 D db_Esc95 +ffffffff831ce000 D db_Esc96 +ffffffff831ce040 D db_Esc97 +ffffffff831ce080 D db_Esca5 +ffffffff831ce0c0 D db_Escb4 +ffffffff831ce100 D db_Esce3 +ffffffff831ce140 D db_Escf4 +ffffffff831ce180 D db_Esc8 +ffffffff831ce240 D db_Esc9 +ffffffff831ce300 D db_Esca +ffffffff831ce3c0 D db_Escb +ffffffff831ce480 D db_Escc +ffffffff831ce540 D db_Escd +ffffffff831ce600 D db_Esce +ffffffff831ce6c0 D db_Escf +ffffffff831ce780 D db_Esc_inst +ffffffff831ce7c0 D db_Grp1 +ffffffff831ce800 D db_Grp2 +ffffffff831ce840 D db_Grp3 +ffffffff831ce900 D db_Grp4 +ffffffff831ce9c0 D db_Grp5 +ffffffff831cea80 D db_inst_table +ffffffff831d0280 D db_bad_inst +ffffffff831d02a0 D db_index_reg_16 +ffffffff831d02e0 D db_reg +ffffffff831d04e0 D db_seg_reg +ffffffff831d0520 D db_lengths +ffffffff831d1000 D db_regs +ffffffff831d11e0 D db_eregs +ffffffff831d11f0 D db_reg_args +ffffffff831d2000 D timer_mutex +ffffffff831d2010 d i8254_timecounter +ffffffff831d3000 D spleen8x16 +ffffffff831d3058 D spleen12x24 +ffffffff831d30b0 D spleen16x32 +ffffffff831d3108 D spleen32x64 +ffffffff831d3160 d builtin_fonts +ffffffff831d31e0 d wsfont_add.cookiegen +ffffffff831d31f0 d spleen8x16_data +ffffffff831d3ff0 d spleen12x24_data +ffffffff831d69f0 d spleen16x32_data +ffffffff831da1f0 d spleen32x64_data +ffffffff831e9000 D nsphy_cd +ffffffff831ea000 D nsphyter_cd +ffffffff831eb000 D gentbi_cd +ffffffff831ec000 D qsphy_cd +ffffffff831ed000 D inphy_cd +ffffffff831ee000 D iophy_cd +ffffffff831ef000 D eephy_cd +ffffffff831f0000 D exphy_cd +ffffffff831f1000 D rlphy_cd +ffffffff831f2000 D lxtphy_cd +ffffffff831f3000 D luphy_cd +ffffffff831f4000 D mtdphy_cd +ffffffff831f5000 D icsphy_cd +ffffffff831f6000 D sqphy_cd +ffffffff831f7000 D tqphy_cd +ffffffff831f8000 D ukphy_cd +ffffffff831f9000 D dcphy_cd +ffffffff831fa000 D bmtphy_cd +ffffffff831fb000 D brgphy_cd +ffffffff831fc000 D xmphy_cd +ffffffff831fd000 D amphy_cd +ffffffff831fe000 D acphy_cd +ffffffff831ff000 D nsgphy_cd +ffffffff83200000 D urlphy_cd +ffffffff83201000 D rgephy_cd +ffffffff83202000 D ciphy_cd +ffffffff83203000 D ipgphy_cd +ffffffff83204000 D etphy_cd +ffffffff83205000 D jmphy_cd +ffffffff83206000 D atphy_cd +ffffffff83207000 D scsi_autoconf +ffffffff83207008 D scsibus_cd +ffffffff83208000 D cd_cd +ffffffff83209000 D ch_cd +ffffffff83209020 D chquirks +ffffffff8320a000 D sd_cd +ffffffff8320b000 D st_cd +ffffffff8320c000 D uk_cd +ffffffff8320d000 D safte_cd +ffffffff8320e000 D ses_cd +ffffffff8320f000 D sym_cd +ffffffff8320f020 D sym_devices +ffffffff8320f070 D asym_devices +ffffffff83210000 D rdac_cd +ffffffff83210020 D rdac_devices +ffffffff83211000 D emc_cd +ffffffff83211020 D emc_devices +ffffffff83212000 D hds_cd +ffffffff83212020 D hds_devices +ffffffff83213000 D atapiscsi_cd +ffffffff83214000 D wd_cd +ffffffff83214020 d wddumpmulti +ffffffff83215000 D mainbus_cd +ffffffff83215020 D mba_iba +ffffffff83216000 D bios_cd +ffffffff83216020 D smbios_uninfo +ffffffff83217000 D mpbios_cd +ffffffff83217020 d mp_conf +ffffffff83217070 d extint_bus +ffffffff832170a0 d smi_bus +ffffffff832170d0 d nmi_bus +ffffffff83218000 D cpu_info_full_primary +ffffffff8321b000 D cpu_info_list +ffffffff8321b008 D mp_cpu_funcs +ffffffff8321b020 D cpu_cd +ffffffff8321b040 D cpu_info +ffffffff8321c000 D local_pic +ffffffff8321c090 D lapic_readreg +ffffffff8321c098 D lapic_writereg +ffffffff8321c0a0 D x86_ipi +ffffffff8321d000 D ioapic_cold +ffffffff8321d008 D ioapic_cd +ffffffff8321e000 D efifb_std_descr +ffffffff8321e030 D efifb_descrs +ffffffff8321e038 D efifb_accessops +ffffffff8321e098 D efifb_cd +ffffffff8321f000 D pvbus_cd +ffffffff8321f020 D pvbus_types +ffffffff8321f0e0 D pvbus_dma_tag +ffffffff83220000 D pvclock_cd +ffffffff83220020 D pvclock_timecounter +ffffffff83221000 D vmt_tclo_rpc +ffffffff832210d0 D vmt_cd +ffffffff83222000 D xen_cd +ffffffff83222020 D xen_bus_dma_tag +ffffffff83223000 D xnf_cd +ffffffff83224000 D xbf_cd +ffffffff83225000 D hv_msg_dispatch +ffffffff83225110 D hv_timecounter +ffffffff83225160 D hyperv_cd +ffffffff83226000 d hv_ic_devs +ffffffff83227000 D hvn_cd +ffffffff83228000 D hvs_cd +ffffffff83229000 D virtio_cd +ffffffff8322a000 D vio_cd +ffffffff8322b000 D vioblk_cd +ffffffff8322c000 D viomb_cd +ffffffff8322d000 D viornd_cd +ffffffff8322e000 D vioscsi_cd +ffffffff8322f000 D vmmci_cd +ffffffff83230000 D pci_cd +ffffffff83231000 D arc_fw_hdr +ffffffff83231008 D arc_cd +ffffffff83232000 D jmb_cd +ffffffff83233000 D mfii_cd +ffffffff83234000 D ips_cd +ffffffff83235000 D eap_cd +ffffffff83236000 D auacer_cd +ffffffff83237000 D auich_cd +ffffffff83238000 D azalia_cd +ffffffff83239000 D envy_cd +ffffffff83239020 D envy_matchids +ffffffff83239030 D envy_rates +ffffffff832390b0 D ak4524_dac +ffffffff832390d8 D ak4524_adc +ffffffff83239100 D ak4358_dac +ffffffff83239128 D ak5365_adc +ffffffff83239150 D unkenvy_codec +ffffffff83239180 D envy_cards +ffffffff832393f0 D envy_cards_ht +ffffffff83239600 d julia_eeprom +ffffffff8323a000 D emu_cd +ffffffff8323b000 D auixp_cd +ffffffff8323c000 D clcs_cd +ffffffff8323d000 D yds_cd +ffffffff8323e000 D auvia_cd +ffffffff8323f000 D qle_cd +ffffffff83240000 D mpii_cd +ffffffff83241000 D aq_cd +ffffffff83242000 D de_cd +ffffffff83243000 D pcn_cd +ffffffff83244000 D wdc_sii3114_vtbl +ffffffff83244038 D wdc_pdc203xx_vtbl +ffffffff83244070 D wdc_svwsata_vtbl +ffffffff832440a8 D pciide_cd +ffffffff832440d0 d sis_hostbr_type +ffffffff83245000 D ppb_cd +ffffffff83246000 D vr_cd +ffffffff83246020 D vr_devices +ffffffff83247000 D txp_cd +ffffffff83248000 D bt848_card_signature +ffffffff83249000 D bktr_cd +ffffffff8324a000 D em_cd +ffffffff8324b000 D ixgb_cd +ffffffff8324c000 D ix_cd +ffffffff8324c020 D ixgbe_smart_speed +ffffffff8324c024 D ixgbe_enable_msix +ffffffff8324d000 D ixl_cd +ffffffff8324d020 d ixl_sff_lock +ffffffff8324e000 D xge_cd +ffffffff8324f000 D thtc_cd +ffffffff8324f020 D tht_cd +ffffffff8324f040 D tht_txt_desc +ffffffff8324f068 D tht_rxf_desc +ffffffff8324f090 D tht_rxd_desc +ffffffff8324f0b8 D tht_txf_desc +ffffffff83250000 D myx_cd +ffffffff83251000 D oce_cd +ffffffff83252000 D dc_devs +ffffffff83253000 D cas_cd +ffffffff83254000 D sis_cd +ffffffff83255000 D se_cd +ffffffff83256000 D cbb_cd +ffffffff83256020 D yc_chipsets +ffffffff832561b0 d pccbb_funcs +ffffffff832561e0 d pccbb_pcmcia_funcs +ffffffff83257000 D skc_cd +ffffffff83257020 D sk_cd +ffffffff83258000 D mskc_cd +ffffffff83258020 D msk_cd +ffffffff83259000 D puc_cd +ffffffff8325a000 D puc_ndevs +ffffffff8325b000 D iwi_cd +ffffffff8325c000 D wpi_cd +ffffffff8325d000 D iwn_cd +ffffffff8325e000 D iwm_cd +ffffffff8325f000 D iwx_cd +ffffffff83260000 D cmpci_cd +ffffffff83261000 D iha_cd +ffffffff83262000 D pcscp_cd +ffffffff83262020 D pcscp_glue +ffffffff83263000 D bge_cd +ffffffff83264000 D bnx_firmwares +ffffffff83264160 D bnx_rv2ps +ffffffff832641c0 D bnx_cd +ffffffff832641e0 d flash_5709 +ffffffff83264210 d flash_table +ffffffff83265000 D vge_cd +ffffffff83266000 D stge_cd +ffffffff83267000 D nfe_cd +ffffffff83268000 D et_cd +ffffffff83269000 D jme_cd +ffffffff8326a000 D age_cd +ffffffff8326b000 D alc_dma_burst +ffffffff8326b020 D alc_cd +ffffffff8326c000 D ale_cd +ffffffff8326d000 D amdpm_cd +ffffffff8326d020 d amdpm_timecounter +ffffffff8326e000 D bce_cd +ffffffff8326f000 D rtwn_cd +ffffffff83270000 d ral_rt2560_opns +ffffffff83270028 d ral_rt2661_opns +ffffffff83270050 d ral_rt2860_opns +ffffffff83271000 D piixpm_cd +ffffffff83272000 D vic_cd +ffffffff83273000 D vmx_cd +ffffffff83274000 D vmwpvs_cd +ffffffff83275000 D lii_cd +ffffffff83276000 D ichiic_cd +ffffffff83277000 D viapm_cd +ffffffff83277020 d viapm_timecounter +ffffffff83278000 D amdiic_cd +ffffffff83279000 D nviic_cd +ffffffff8327a000 D kate_cd +ffffffff8327b000 D km_cd +ffffffff8327c000 D cpu_model_offsets +ffffffff8327c070 D ksmn_cd +ffffffff8327d000 D itherm_cd +ffffffff8327e000 D pchtemp_cd +ffffffff8327f000 D xspd_cd +ffffffff83280000 D virtio_pci_ops +ffffffff83281000 D bwfm_pci_buscore_ops +ffffffff83281030 D bwfm_pci_bus_ops +ffffffff83281058 D bwfm_pci_msgbuf_ops +ffffffff83282000 D bnxt_cd +ffffffff83283000 D mcx_cd +ffffffff83284000 D iavf_cd +ffffffff83285000 D rge_cd +ffffffff83286000 D igc_cd +ffffffff83287000 D ngbe_cd +ffffffff83288000 D agp_cd +ffffffff83289000 D intagp_cd +ffffffff83289020 D agp_i810_methods +ffffffff8328a000 D reservation_ww_class +ffffffff8328b000 d bridge_lock +ffffffff8328b010 d bridge_list +ffffffff8328c000 d drm_connector_enum_list +ffffffff8328c1f8 d connector_list_lock +ffffffff8328c208 d connector_list +ffffffff8328d000 d kernel_fb_helper_list +ffffffff8328d010 d kernel_fb_helper_lock +ffffffff8328e000 D drm_global_mutex +ffffffff8328f000 D sch_mtx +ffffffff8328f010 D i2c_bit_algo +ffffffff8328f020 d drm_fence_context_count +ffffffff8328f028 d dma_fence_stub_mtx +ffffffff8328f038 D wait_bit_mtx +ffffffff8328f048 D shrinkers +ffffffff83290000 d crtc_ww_class +ffffffff83291000 d panel_lock +ffffffff83291010 d panel_list +ffffffff83292000 d ttm_global_mutex +ffffffff83293000 D intel_bbops +ffffffff83294000 d i915_sys_placement +ffffffff83294020 d i915_ttm_bo_driver +ffffffff83295000 d mchdev_lock +ffffffff83296000 D inteldrm_stdscreen +ffffffff83296030 D inteldrm_scrlist +ffffffff83296038 D inteldrm_screenlist +ffffffff83296048 D inteldrm_accessops +ffffffff832960a8 D inteldrm_cd +ffffffff83297000 d capture_mutex +ffffffff83298000 d mitigations +ffffffff83299000 D i915_modparams +ffffffff8329a000 d schedule_lock +ffffffff8329b000 d unbind_fence_ops +ffffffff8329c000 D intel_graphics_stolen_res +ffffffff8329d000 D btc_valid_sclk +ffffffff8329e000 d evergreen_cs_packet_parse_vline.vline_start_end +ffffffff8329e020 d evergreen_cs_packet_parse_vline.vline_status +ffffffff8329f000 d r600_cs_packet_parse_vline.vline_start_end +ffffffff8329f008 d r600_cs_packet_parse_vline.vline_status +ffffffff832a0000 d r100_asic +ffffffff832a02e0 d r200_asic +ffffffff832a05c0 d r300_asic_pcie +ffffffff832a08a0 d r300_asic +ffffffff832a0b80 d r420_asic +ffffffff832a0e60 d rs400_asic +ffffffff832a1140 d rs600_asic +ffffffff832a1420 d rs690_asic +ffffffff832a1700 d rv515_asic +ffffffff832a19e0 d r520_asic +ffffffff832a1cc0 d r600_asic +ffffffff832a1fa0 d rv6xx_asic +ffffffff832a2280 d rs780_asic +ffffffff832a2560 d rv770_asic +ffffffff832a2840 d evergreen_asic +ffffffff832a2b20 d sumo_asic +ffffffff832a2e00 d btc_asic +ffffffff832a30e0 d cayman_asic +ffffffff832a33c0 d trinity_asic +ffffffff832a36a0 d si_asic +ffffffff832a3980 d ci_asic +ffffffff832a3c60 d kv_asic +ffffffff832a4000 d dce6_funcs +ffffffff832a4018 d dce6_hdmi_funcs +ffffffff832a4088 d dce6_dp_funcs +ffffffff832a40f8 d dce4_funcs +ffffffff832a4110 d dce4_hdmi_funcs +ffffffff832a4180 d dce4_dp_funcs +ffffffff832a41f0 d dce32_funcs +ffffffff832a4208 d dce32_hdmi_funcs +ffffffff832a4278 d dce32_dp_funcs +ffffffff832a42e8 d r600_funcs +ffffffff832a4300 d r600_hdmi_funcs +ffffffff832a5000 D radeon_modeset +ffffffff832a5004 D radeon_dynclks +ffffffff832a5008 D radeon_agpmode +ffffffff832a500c D radeon_gart_size +ffffffff832a5010 D radeon_tv +ffffffff832a5014 D radeon_audio +ffffffff832a5018 D radeon_pcie_gen2 +ffffffff832a501c D radeon_msi +ffffffff832a5020 D radeon_lockup_timeout +ffffffff832a5024 D radeon_dpm +ffffffff832a5028 D radeon_aspm +ffffffff832a502c D radeon_runtime_pm +ffffffff832a5030 D radeon_vm_size +ffffffff832a5034 D radeon_vm_block_size +ffffffff832a5038 D radeon_use_pflipirq +ffffffff832a503c D radeon_bapm +ffffffff832a5040 D radeon_backlight +ffffffff832a5044 D radeon_auxch +ffffffff832a5048 D radeon_uvd +ffffffff832a504c D radeon_vce +ffffffff832a5050 D radeon_si_support +ffffffff832a5054 D radeon_cik_support +ffffffff832a5058 D radeondrm_cd +ffffffff832a5078 D radeondrm_stdscreen +ffffffff832a50a8 D radeondrm_scrlist +ffffffff832a50b0 D radeondrm_screenlist +ffffffff832a50c0 D radeondrm_accessops +ffffffff832a6000 D radeon_bbops +ffffffff832a7000 d radeon_bo_driver +ffffffff832a8000 d verde_pg_init +ffffffff832a9000 d cac_weights_pitcairn +ffffffff832a94d0 d cac_weights_oland +ffffffff832aa000 d aldebaran_mode2_handler +ffffffff832ab000 d amdgpu_vbios_version_attrs +ffffffff832ac000 D amdgpu_asic_name +ffffffff832ad000 D amdgpu_gart_size +ffffffff832ad004 D amdgpu_gtt_size +ffffffff832ad008 D amdgpu_moverate +ffffffff832ad00c D amdgpu_audio +ffffffff832ad010 D amdgpu_pcie_gen2 +ffffffff832ad014 D amdgpu_msi +ffffffff832ad018 D amdgpu_dpm +ffffffff832ad01c D amdgpu_fw_load_type +ffffffff832ad020 D amdgpu_aspm +ffffffff832ad024 D amdgpu_runtime_pm +ffffffff832ad028 D amdgpu_ip_block_mask +ffffffff832ad02c D amdgpu_bapm +ffffffff832ad030 D amdgpu_vm_size +ffffffff832ad034 D amdgpu_vm_fragment_size +ffffffff832ad038 D amdgpu_vm_block_size +ffffffff832ad03c D amdgpu_vm_update_mode +ffffffff832ad040 D amdgpu_dc +ffffffff832ad044 D amdgpu_sched_jobs +ffffffff832ad048 D amdgpu_sched_hw_submission +ffffffff832ad050 D amdgpu_cg_mask +ffffffff832ad058 D amdgpu_pg_mask +ffffffff832ad05c D amdgpu_sdma_phase_quantum +ffffffff832ad060 D amdgpu_pp_feature_mask +ffffffff832ad064 D amdgpu_lbpw +ffffffff832ad068 D amdgpu_compute_multipipe +ffffffff832ad06c D amdgpu_gpu_recovery +ffffffff832ad070 D amdgpu_smu_pptable_id +ffffffff832ad074 D amdgpu_dc_feature_mask +ffffffff832ad078 D amdgpu_async_gfx_ring +ffffffff832ad07c D amdgpu_discovery +ffffffff832ad080 D amdgpu_noretry +ffffffff832ad084 D amdgpu_force_asic_type +ffffffff832ad088 D amdgpu_tmz +ffffffff832ad08c D amdgpu_reset_method +ffffffff832ad090 D amdgpu_num_kcq +ffffffff832ad094 D amdgpu_use_xgmi_p2p +ffffffff832ad098 D mgpu_info +ffffffff832ad248 D amdgpu_ras_enable +ffffffff832ad24c D amdgpu_ras_mask +ffffffff832ad250 D amdgpu_bad_page_threshold +ffffffff832ad254 D amdgpu_backlight +ffffffff832ad258 D amdgpu_cd +ffffffff832ad278 D amdgpu_stdscreen +ffffffff832ad2a8 D amdgpu_scrlist +ffffffff832ad2b0 D amdgpu_screenlist +ffffffff832ad2c0 D amdgpu_accessops +ffffffff832ae000 d amdgpu_gtt_mgr_attributes +ffffffff832af000 D amdgpu_bbops +ffffffff832b0000 D soc15_ih_clientid_name +ffffffff832b1000 D ras_error_string +ffffffff832b1030 D ras_block_string +ffffffff832b10c0 D ras_mca_block_string +ffffffff832b2000 d amdgpu_bo_driver +ffffffff832b3000 d amdgpu_vram_mgr_attributes +ffffffff832b4000 D amdgpu_xgmi_hive_type +ffffffff832b4008 d xgmi_mutex +ffffffff832b4018 D xgmi_ras_hw_ops +ffffffff832b4058 D xgmi_ras +ffffffff832b5000 d gfx_v9_0_ras +ffffffff832b6000 D gfx_v9_4_ras +ffffffff832b7000 D gfx_v9_4_2_ras_ops +ffffffff832b7040 D gfx_v9_4_2_ras +ffffffff832b8000 D hdp_v4_0_ras_hw_ops +ffffffff832b8040 D hdp_v4_0_ras +ffffffff832b9000 d jpeg_v2_6_ras +ffffffff832ba000 D mca_v3_0_mp0_ras +ffffffff832ba058 D mca_v3_0_mp1_ras +ffffffff832ba0b0 D mca_v3_0_mpio_ras +ffffffff832bb000 D mmhub_v1_0_ras_hw_ops +ffffffff832bb040 D mmhub_v1_0_ras +ffffffff832bc000 D mmhub_v1_7_ras_hw_ops +ffffffff832bc040 D mmhub_v1_7_ras +ffffffff832bd000 D mmhub_v9_4_ras +ffffffff832be000 D nbio_v7_4_ras +ffffffff832bf000 d sriov_sc_video_codecs_encode +ffffffff832bf010 d sriov_sc_video_codecs_decode +ffffffff832bf020 d sriov_sc_video_codecs_encode_array +ffffffff832bf050 d sriov_sc_video_codecs_decode_array +ffffffff832c0000 d sdma_v4_0_ras +ffffffff832c1000 D sdma_v4_4_ras +ffffffff832c2000 d sienna_cichlid_mode2_handler +ffffffff832c3000 D umc_v6_1_ras +ffffffff832c4000 D umc_v6_7_ras +ffffffff832c5000 D umc_v8_10_ras +ffffffff832c6000 D umc_v8_7_ras +ffffffff832c7000 d vcn_v2_6_ras +ffffffff832c8000 d amdgpu_dm_mode_config_helperfuncs +ffffffff832c8010 d dm_atomic_state_funcs +ffffffff832c9000 d construct_integrated_info.result +ffffffff832c9004 d bios_parser_get_firmware_info.result +ffffffff832ca000 d dce_funcs +ffffffff832cb000 d dce110_funcs +ffffffff832cc000 d dce112_funcs +ffffffff832cd000 d dce120_funcs +ffffffff832ce000 d rv1_clk_funcs +ffffffff832ce088 d rv1_clk_internal_funcs +ffffffff832cf000 d rv2_clk_internal_funcs +ffffffff832d0000 d dcn2_funcs +ffffffff832d1000 D dcn201_funcs +ffffffff832d2000 d dcn21_funcs +ffffffff832d2088 d rn_bw_params +ffffffff832d3000 D dcn3_fpga_funcs +ffffffff832d3088 d dcn3_funcs +ffffffff832d4000 d vg_funcs +ffffffff832d4088 d dummy_clocks +ffffffff832d41b8 d vg_bw_params +ffffffff832d5000 d dcn31_bw_params +ffffffff832d52a0 d dcn31_funcs +ffffffff832d6000 d dcn314_bw_params +ffffffff832d62a0 d dcn314_funcs +ffffffff832d7000 d dcn315_funcs +ffffffff832d7088 d dcn315_bw_params +ffffffff832d8000 d dcn316_funcs +ffffffff832d8088 d dcn316_bw_params +ffffffff832d9000 d dcn32_funcs +ffffffff832da000 d dcn10_dpp_cap +ffffffff832db000 D aperture_default_system +ffffffff832dc000 d dcn20_dpp_cap +ffffffff832dc010 d dcn20_dpp_funcs +ffffffff832dd000 d dcn20_hubp_funcs +ffffffff832de000 d dcn20_opp_funcs +ffffffff832df000 d dcn20_tg_funcs +ffffffff832e0000 d dcn201_dpp_funcs +ffffffff832e0110 d dcn201_dpp_cap +ffffffff832e1000 d dcn201_hubp_funcs +ffffffff832e2000 d dcn201_opp_funcs +ffffffff832e3000 d dcn201_tg_funcs +ffffffff832e4000 D dcn201_ip +ffffffff832e41b8 D dcn201_soc +ffffffff832e4b88 d dcn201_res_pool_funcs +ffffffff832e5000 d dcn21_hubp_funcs +ffffffff832e6000 d dcn30_afmt_funcs +ffffffff832e7000 d dcn30_dpp_cap +ffffffff832e7010 d dcn30_dpp_funcs +ffffffff832e8000 d dcn30_hubp_funcs +ffffffff832e9000 d dcn30_tg_funcs +ffffffff832ea000 d dcn30_vpg_funcs +ffffffff832eb000 d res_cap_dcn301 +ffffffff832eb040 d dcn301_res_pool_funcs +ffffffff832ec000 d dcn302_res_pool_funcs +ffffffff832ed000 d dcn303_res_pool_funcs +ffffffff832ee000 d dcn31_afmt_funcs +ffffffff832ef000 d dcn31_apg_funcs +ffffffff832f0000 d dcn31_hpo_dp_link_encoder_funcs +ffffffff832f1000 d dcn31_hubp_funcs +ffffffff832f2000 d dcn31_tg_funcs +ffffffff832f3000 d dcn31_res_pool_funcs +ffffffff832f4000 d dcn31_vpg_funcs +ffffffff832f5000 d dcn314_tg_funcs +ffffffff832f6000 d dcn314_res_pool_funcs +ffffffff832f7000 d dcn315_res_pool_funcs +ffffffff832f8000 d dcn316_res_pool_funcs +ffffffff832f9000 d dcn32_dpp_funcs +ffffffff832f9110 d dcn32_dpp_cap +ffffffff832fa000 d dcn32_hpo_dp_link_encoder_funcs +ffffffff832fb000 d dcn32_hubp_funcs +ffffffff832fc000 d dcn32_tg_funcs +ffffffff832fd000 d dcn32_res_pool_funcs +ffffffff832fe000 d dcn321_res_pool_funcs +ffffffff832ff000 D dcn1_0_ip +ffffffff832ff1b8 D dcn1_0_soc +ffffffff83300000 D dcn2_0_ip +ffffffff833001b8 D dcn2_0_nv14_ip +ffffffff83300370 D dcn2_0_soc +ffffffff83300d40 D dcn2_0_nv14_soc +ffffffff83301710 D dcn2_1_ip +ffffffff833018c8 D dcn2_1_soc +ffffffff83302298 D ddr4_wm_table_gs +ffffffff83302358 D lpddr4_wm_table_gs +ffffffff83302418 D lpddr4_wm_table_with_disabled_ppt +ffffffff833024d8 D ddr4_wm_table_rn +ffffffff83302598 D ddr4_1R_wm_table_rn +ffffffff83302658 D lpddr4_wm_table_rn +ffffffff83303000 D dcn3_0_ip +ffffffff833031b8 D dcn3_0_soc +ffffffff83304000 D dcn3_01_ip +ffffffff833041b8 D dcn3_01_soc +ffffffff83304b88 D ddr4_wm_table +ffffffff83304c48 D lpddr5_wm_table +ffffffff83305000 D dcn3_02_ip +ffffffff833051b8 D dcn3_02_soc +ffffffff83306000 D dcn3_03_ip +ffffffff833061b8 D dcn3_03_soc +ffffffff83307000 D dcn3_1_ip +ffffffff833071b8 D dcn3_15_ip +ffffffff83307370 D dcn3_16_ip +ffffffff83307528 d dcn3_15_soc +ffffffff83307ef8 d dcn3_1_soc +ffffffff833088c8 d dcn3_16_soc +ffffffff8330a000 D dcn3_14_ip +ffffffff8330a1b8 D dcn3_14_soc +ffffffff8330b000 D dcn3_2_ip +ffffffff8330b1b8 D dcn3_2_soc +ffffffff8330c000 D dcn3_21_ip +ffffffff8330c1b8 D dcn3_21_soc +ffffffff8330d000 d dsc_policy_max_target_bpp_limit +ffffffff8330e000 D DIDTEDCConfig_P12 +ffffffff8330e070 d smu7_profiling +ffffffff8330f000 d cyan_skillfish_table_map +ffffffff8330f080 d cyan_skillfish_message_map +ffffffff83310000 d navi10_table_map +ffffffff83310080 d navi10_pwr_src_map +ffffffff83310090 d navi10_workload_map +ffffffff833100d0 d navi10_message_map +ffffffff83310b20 d navi10_clk_map +ffffffff83310be0 d navi10_feature_mask_map +ffffffff83311000 d sienna_cichlid_message_map +ffffffff83311a50 d sienna_cichlid_table_map +ffffffff83311ad0 d sienna_cichlid_pwr_src_map +ffffffff83311ae0 d sienna_cichlid_workload_map +ffffffff83311b20 d sienna_cichlid_clk_map +ffffffff83311be0 d sienna_cichlid_feature_mask_map +ffffffff83312000 d vangogh_message_map +ffffffff83312a50 d vangogh_table_map +ffffffff83312ad0 d vangogh_workload_map +ffffffff83312b10 d vangogh_feature_mask_map +ffffffff83313000 d renoir_table_map +ffffffff83313080 d renoir_workload_map +ffffffff833130c0 d renoir_message_map +ffffffff83313b10 d renoir_clk_map +ffffffff83314000 d smu_v13_0_0_message_map +ffffffff83314a50 d smu_v13_0_0_feature_mask_map +ffffffff83314e20 d smu_v13_0_0_table_map +ffffffff83314ea0 d smu_v13_0_0_pwr_src_map +ffffffff83314eb0 d smu_v13_0_0_workload_map +ffffffff83314ef0 d smu_v13_0_0_clk_map +ffffffff83315000 d smu_v13_0_4_message_map +ffffffff83315a50 d smu_v13_0_4_table_map +ffffffff83315ad0 d smu_v13_0_4_feature_mask_map +ffffffff83316000 d smu_v13_0_5_table_map +ffffffff83316080 d smu_v13_0_5_message_map +ffffffff83316ad0 d smu_v13_0_5_feature_mask_map +ffffffff83317000 d smu_v13_0_7_message_map +ffffffff83317a50 d smu_v13_0_7_feature_mask_map +ffffffff83317e20 d smu_v13_0_7_table_map +ffffffff83317ea0 d smu_v13_0_7_pwr_src_map +ffffffff83317eb0 d smu_v13_0_7_workload_map +ffffffff83317ef0 d smu_v13_0_7_clk_map +ffffffff83318000 d yellow_carp_table_map +ffffffff83318080 d yellow_carp_message_map +ffffffff83318ad0 d yellow_carp_feature_mask_map +ffffffff83319000 D pci_conf_lock +ffffffff83319010 D pci_bus_dma_tag +ffffffff83319088 D msi_pic +ffffffff83319118 D msix_pic +ffffffff8331a000 D pchb_cd +ffffffff8331b000 D amas_cd +ffffffff8331c000 D cardslot_cd +ffffffff8331d000 D cardbus_cd +ffffffff8331e000 d csdevs +ffffffff8331f000 d ral_rt2560_opns +ffffffff8331f028 d ral_rt2661_opns +ffffffff8331f050 d ral_rt2860_opns +ffffffff83320000 D pcmcia_cd +ffffffff83321000 D pcmcia_3cxem556_func0 +ffffffff833210b8 D pcmcia_3cxem556_func0_cfe0 +ffffffff83321158 D pcmcia_megahertz_xjem1144_func0 +ffffffff83321210 D pcmcia_megahertz_xjem1144_func0_cfe0 +ffffffff833212b0 d pcmcia_3cxem556_func1 +ffffffff83321368 d pcmcia_3cxem556_func1_cfe0 +ffffffff83321408 d pcmcia_megahertz_xjem1144_func1 +ffffffff833214c0 d pcmcia_megahertz_xjem1144_func1_cfe0 +ffffffff83321560 d pcmcia_sierra_a555_func1 +ffffffff83321618 d pcmcia_sierra_a555_func1_cfe0 +ffffffff833216b8 d pcmcia_sveclancard_func0 +ffffffff83321770 d pcmcia_sveclancard_func0_cfe0 +ffffffff83322000 D ep_pcmcia_prod +ffffffff83323000 D aic_pcmcia_prod +ffffffff83324000 D com_pcmcia_prod +ffffffff83325000 D wdc_pcmcia_pr +ffffffff83326000 D sm_pcmcia_prod +ffffffff83327000 D xe_cd +ffffffff83328000 D pcib_cd +ffffffff83329000 D amdpcib_cd +ffffffff8332a000 D tcpcib_cd +ffffffff8332b000 D aapic_cd +ffffffff8332c000 D hme_cd +ffffffff8332d000 D isa_cd +ffffffff8332e000 D isadma_cd +ffffffff8332f000 D fdc_cd +ffffffff83330000 D fd_types +ffffffff833301f8 D fd_cd +ffffffff83331000 D mpu_cd +ffffffff83332000 D pcppi_cd +ffffffff83333000 D spkr_cd +ffffffff83334000 D wbsio_cd +ffffffff83335000 D schsio_cd +ffffffff83336000 D it_cd +ffffffff83337000 D uguru_cd +ffffffff83338000 D aps_cd +ffffffff83339000 D isa_bus_dma_tag +ffffffff8333a000 D wsdisplay_cd +ffffffff8333a020 D wsdisplay_cons +ffffffff8333a058 D wsdisplay_defaultscreens +ffffffff8333b000 D wskbd_cd +ffffffff8333b020 D wskbd_default_bell_data +ffffffff8333b030 D wskbd_default_keyrepeat_data +ffffffff8333b040 D wskbd_srcops +ffffffff8333c000 d compose_tab +ffffffff8333d000 D wsmouse_cd +ffffffff8333d020 D wsmouse_srcops +ffffffff8333e000 D wsmux_srcops +ffffffff8333e030 D wsmux_tree_lock +ffffffff8333f000 D vt100_output +ffffffff83340000 D pckbd_cd +ffffffff83341000 D pms_cd +ffffffff83341020 d synaptics_params +ffffffff83341030 d alps_params +ffffffff83342000 D skgpio_cd +ffffffff83343000 D pctr_conf_lock +ffffffff83344000 D ukbd_keymapdata +ffffffff83345000 D usbrev_str +ffffffff83345030 D usb_cd +ffffffff83346000 d usbd_ratecheck.errinterval +ffffffff83347000 D uhub_cd +ffffffff83348000 D uaudio_cd +ffffffff83349000 D uvideo_ctrls +ffffffff833492d8 D uvideo_cd +ffffffff8334a000 D utvfu_norm_params +ffffffff8334a030 D utvfu_cd +ffffffff8334b000 D udl_reg_vals_640x480_60 +ffffffff8334b020 D udl_reg_vals_640x480_67 +ffffffff8334b040 D udl_reg_vals_640x480_72 +ffffffff8334b060 D udl_reg_vals_640x480_75 +ffffffff8334b080 D udl_reg_vals_800x480_61 +ffffffff8334b0a0 D udl_reg_vals_800x600_56 +ffffffff8334b0c0 D udl_reg_vals_800x600_60 +ffffffff8334b0e0 D udl_reg_vals_800x600_72 +ffffffff8334b100 D udl_reg_vals_800x600_74 +ffffffff8334b120 D udl_reg_vals_800x600_75 +ffffffff8334b140 D udl_reg_vals_1024x768_60 +ffffffff8334b160 D udl_reg_vals_1024x768_70 +ffffffff8334b180 D udl_reg_vals_1024x768_75 +ffffffff8334b1a0 D udl_reg_vals_1280x800_60 +ffffffff8334b1c0 D udl_reg_vals_1280x960_60 +ffffffff8334b1e0 D udl_reg_vals_1280x1024_60 +ffffffff8334b200 D udl_reg_vals_1280x1024_75 +ffffffff8334b220 D udl_reg_vals_1366x768_60 +ffffffff8334b240 D udl_reg_vals_1440x900_60 +ffffffff8334b260 D udl_reg_vals_1440x900_59 +ffffffff8334b280 D udl_reg_vals_1440x900_75 +ffffffff8334b2a0 D udl_reg_vals_1680x1050_60 +ffffffff8334b2c0 D udl_reg_vals_1600x1200_60 +ffffffff8334b2e0 D udl_reg_vals_1920x1080_60 +ffffffff8334b300 D udl_null_key_1 +ffffffff8334b310 D udl_decomp_table +ffffffff8334c510 D udl_cd +ffffffff8334c530 D udl_stdscreen +ffffffff8334c560 D udl_scrlist +ffffffff8334c568 D udl_screenlist +ffffffff8334c578 D udl_accessops +ffffffff8334d000 D umidi_cd +ffffffff8334e000 d umq_YAMAHA_YAMAHA_UX256_ANYIFACE +ffffffff8334e020 d umq_ROLAND_ROLAND_UM1_2 +ffffffff8334e040 d umq_ROLAND_ROLAND_SC8850_2 +ffffffff8334e060 d umq_ROLAND_ROLAND_SD90_2 +ffffffff8334e080 d umq_ROLAND_ROLAND_UM880N_0 +ffffffff8334e0a0 d umq_ROLAND_ROLAND_UA100_2 +ffffffff8334e0c0 d umq_ROLAND_ROLAND_UM4_2 +ffffffff8334e0e0 d umq_ROLAND_ROLAND_U8_2 +ffffffff8334e100 d umq_ROLAND_ROLAND_UM2_2 +ffffffff8334e120 d umq_ROLAND_ROLAND_SC8820_2 +ffffffff8334e140 d umq_ROLAND_ROLAND_PC300_2 +ffffffff8334e160 d umq_ROLAND_ROLAND_SK500_2 +ffffffff8334e180 d umq_ROLAND_ROLAND_SCD70_2 +ffffffff8334e1a0 d umq_ROLAND_ROLAND_UM550_0 +ffffffff8334e1c0 d umq_ROLAND_ROLAND_SD20_0 +ffffffff8334e1e0 d umq_ROLAND_ROLAND_SD80_0 +ffffffff8334e200 d umq_ROLAND_ROLAND_UA700_3 +ffffffff8334e220 d umq_ROLAND_ROLAND_UMONE_ANYIFACE +ffffffff8334e240 D umidi_quirklist +ffffffff8334e4a0 d umq_YAMAHA_YAMAHA_UX256_ANYIFACE_fixed_ep_desc +ffffffff8334e4c0 d umq_YAMAHA_YAMAHA_UX256_ANYIFACE_fixed_ep_endpoints +ffffffff8334e4d0 d umq_ROLAND_ROLAND_UM1_2_fixed_ep_desc +ffffffff8334e4f0 d umq_ROLAND_ROLAND_UM1_2_fixed_ep_endpoints +ffffffff8334e500 d umq_ROLAND_ROLAND_SC8850_2_fixed_ep_desc +ffffffff8334e520 d umq_ROLAND_ROLAND_SC8850_2_fixed_ep_endpoints +ffffffff8334e530 d umq_ROLAND_ROLAND_SD90_2_fixed_ep_desc +ffffffff8334e550 d umq_ROLAND_ROLAND_SD90_2_fixed_ep_endpoints +ffffffff8334e560 d umq_ROLAND_ROLAND_UM880N_0_fixed_ep_desc +ffffffff8334e580 d umq_ROLAND_ROLAND_UM880N_0_fixed_ep_endpoints +ffffffff8334e590 d umq_ROLAND_ROLAND_UA100_2_fixed_ep_desc +ffffffff8334e5b0 d umq_ROLAND_ROLAND_UA100_2_fixed_ep_endpoints +ffffffff8334e5c0 d umq_ROLAND_ROLAND_UM4_2_fixed_ep_desc +ffffffff8334e5e0 d umq_ROLAND_ROLAND_UM4_2_fixed_ep_endpoints +ffffffff8334e5f0 d umq_ROLAND_ROLAND_U8_2_fixed_ep_desc +ffffffff8334e610 d umq_ROLAND_ROLAND_U8_2_fixed_ep_endpoints +ffffffff8334e620 d umq_ROLAND_ROLAND_UM2_2_fixed_ep_desc +ffffffff8334e640 d umq_ROLAND_ROLAND_UM2_2_fixed_ep_endpoints +ffffffff8334e650 d umq_ROLAND_ROLAND_SC8820_2_fixed_ep_desc +ffffffff8334e670 d umq_ROLAND_ROLAND_SC8820_2_fixed_ep_endpoints +ffffffff8334e680 d umq_ROLAND_ROLAND_PC300_2_fixed_ep_desc +ffffffff8334e6a0 d umq_ROLAND_ROLAND_PC300_2_fixed_ep_endpoints +ffffffff8334e6b0 d umq_ROLAND_ROLAND_SK500_2_fixed_ep_desc +ffffffff8334e6d0 d umq_ROLAND_ROLAND_SK500_2_fixed_ep_endpoints +ffffffff8334e6e0 d umq_ROLAND_ROLAND_SCD70_2_fixed_ep_desc +ffffffff8334e700 d umq_ROLAND_ROLAND_SCD70_2_fixed_ep_endpoints +ffffffff8334e710 d umq_ROLAND_ROLAND_UM550_0_fixed_ep_desc +ffffffff8334e730 d umq_ROLAND_ROLAND_UM550_0_fixed_ep_endpoints +ffffffff8334e740 d umq_ROLAND_ROLAND_SD20_0_fixed_ep_desc +ffffffff8334e760 d umq_ROLAND_ROLAND_SD20_0_fixed_ep_endpoints +ffffffff8334e770 d umq_ROLAND_ROLAND_SD80_0_fixed_ep_desc +ffffffff8334e790 d umq_ROLAND_ROLAND_SD80_0_fixed_ep_endpoints +ffffffff8334e7a0 d umq_ROLAND_ROLAND_UA700_3_fixed_ep_desc +ffffffff8334e7c0 d umq_ROLAND_ROLAND_UA700_3_fixed_ep_endpoints +ffffffff8334e7d0 d umq_ROLAND_ROLAND_UMONE_ANYIFACE_fixed_ep_desc +ffffffff8334e7f0 d umq_ROLAND_ROLAND_UMONE_ANYIFACE_fixed_ep_endpoints +ffffffff8334f000 D ucom_cd +ffffffff83350000 D ugen_cd +ffffffff83351000 D uhidev_cd +ffffffff83351020 d uhidev_use_rdesc.reportbuf +ffffffff83352000 D uhid_cd +ffffffff83353000 D fido_cd +ffffffff83354000 D ujoy_cd +ffffffff83355000 D ukbd_cd +ffffffff83356000 D ums_cd +ffffffff83356020 d ums_fix_elecom_descriptor.match +ffffffff83357000 D umt_cd +ffffffff83358000 D def_scale +ffffffff83358020 D uts_cd +ffffffff83359000 D ubcmtp_cd +ffffffff8335a000 D ucycom_cd +ffffffff8335b000 D uslhcom_cd +ffffffff8335c000 D ulpt_fwdevs +ffffffff8335c060 D ulpt_cd +ffffffff8335c080 D ulptusein +ffffffff8335d000 D umass_cd +ffffffff8335d020 d umass_bbb_transfer.dCBWtag +ffffffff8335e000 D uthum_cd +ffffffff8335f000 D ugold_cd +ffffffff8335f020 d cmd_init +ffffffff8335f028 d cmd_type +ffffffff8335f030 d cmd_data +ffffffff83360000 D utrh_cd +ffffffff83361000 D uoakrh_cd +ffffffff83362000 D uoaklux_cd +ffffffff83363000 D uoakv_cd +ffffffff83364000 D uonerng_cd +ffffffff83365000 D urng_cd +ffffffff83366000 D udcf_cd +ffffffff83367000 D umbg_cd +ffffffff83368000 D uvisor_cd +ffffffff83369000 D udsbr_cd +ffffffff8336a000 D utwitch_cd +ffffffff8336b000 D aue_cd +ffffffff8336c000 D axe_cd +ffffffff8336d000 D axen_cd +ffffffff8336e000 D smsc_cd +ffffffff8336f000 D cue_devs +ffffffff8336f010 D cue_cd +ffffffff83370000 D kue_cd +ffffffff83371000 D cdce_cd +ffffffff83372000 D urndis_cd +ffffffff83373000 D mos_cd +ffffffff83374000 D mue_cd +ffffffff83375000 D udav_cd +ffffffff83376000 D upl_devs +ffffffff83376008 D upl_cd +ffffffff83377000 D ugl_devs +ffffffff83377008 D ugl_cd +ffffffff83378000 D url_cd +ffffffff83379000 D ure_cd +ffffffff8337a000 D uaq_cd +ffffffff8337b000 D umodem_cd +ffffffff8337c000 D uftdi_cd +ffffffff8337d000 D uplcom_cd +ffffffff8337e000 D umct_cd +ffffffff8337f000 D uvscom_cd +ffffffff83380000 D ubsa_cd +ffffffff83381000 D ukspan_cd +ffffffff83382000 D uslcom_cd +ffffffff83383000 D uark_cd +ffffffff83384000 D moscom_cd +ffffffff83385000 D umcs_cd +ffffffff83386000 D uscom_cd +ffffffff83387000 D ucrcom_cd +ffffffff83388000 D uxrcom_cd +ffffffff83389000 D uipaq_cd +ffffffff8338a000 D umsm_cd +ffffffff8338b000 D uchcom_cd +ffffffff8338c000 D uticom_cd +ffffffff8338d000 D wi_func_usb +ffffffff8338d060 D wi_usb_cd +ffffffff8338e000 D atu_cd +ffffffff8338e020 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umstc_cd +ffffffff833a1000 D uhidpp_cd +ffffffff833a2000 D ucc_cd +ffffffff833a3000 D iic_cd +ffffffff833a4000 D probe_addrs_sensor +ffffffff833a4008 D probe_addrs_eeprom +ffffffff833a5000 D lmtemp_cd +ffffffff833a6000 D lmn_worklist +ffffffff833a6240 D lmn_cd +ffffffff833a7000 D lmenv_cd +ffffffff833a8000 D maxtmp_cd +ffffffff833a9000 D adc_cd +ffffffff833aa000 D admtemp_cd +ffffffff833ab000 D admlc_cd +ffffffff833ac000 D admtm_cd +ffffffff833ad000 D admtmp_cd +ffffffff833ae000 D admtt_cd +ffffffff833af000 D maxds_cd +ffffffff833b0000 D adt_chips +ffffffff833b0160 D worklist +ffffffff833b01a0 D adt_cd +ffffffff833b1000 D admcts_cd +ffffffff833b2000 D wbng_cd +ffffffff833b3000 D nvt_cd +ffffffff833b4000 D adl_worklist +ffffffff833b4138 D adl_cd +ffffffff833b5000 D andl_cd +ffffffff833b6000 D sdtemp_cd +ffffffff833b7000 D lisa_cd +ffffffff833b8000 D ihidev_cd +ffffffff833b9000 D ikbd_cd +ffffffff833ba000 D ims_cd +ffffffff833bb000 D imt_cd +ffffffff833bc000 D iatp_cd +ffffffff833bd000 D bgw_cd +ffffffff833be000 D icc_cd +ffffffff833bf000 D gpio_cd +ffffffff833c0000 D acpi_cd +ffffffff833c0020 D acpi_pcidevs +ffffffff833c0030 D acpi_pcirootdevs +ffffffff833c0040 D acpi_taskq +ffffffff833c0050 d acpi_indicator.save_led_state +ffffffff833c0060 d acpi_getprop.prop_guid +ffffffff833c0070 d acpi_getpropint.prop_guid +ffffffff833c0080 D acpi_skip_hids +ffffffff833c00f0 D acpi_isa_hids +ffffffff833c1000 D aml_intlen +ffffffff833c1010 D aml_table +ffffffff833c1af0 d osstring +ffffffff833c1b10 D aml_defobj +ffffffff833c1ca0 D aml_valid_osi +ffffffff833c1d78 D acpi_max_osi +ffffffff833c1d80 D aml_regionspace +ffffffff833c3000 D acpitimer_cd +ffffffff833c3020 d acpi_timecounter +ffffffff833c4000 D acpiac_cd +ffffffff833c4020 D acpiac_hids +ffffffff833c5000 D acpibat_cd +ffffffff833c5020 D acpibat_hids +ffffffff833c6000 D acpibtn_cd +ffffffff833c6020 D acpibtn_hids +ffffffff833c7000 D acpicmos_cd +ffffffff833c7020 D acpicmos_hids +ffffffff833c8000 D acpicpu_cd +ffffffff833c8020 D acpicpu_hids +ffffffff833c8030 d acpicpu_set_pdc.cpu_oscuuid +ffffffff833c9000 D acpihpet_cd +ffffffff833c9020 d hpet_timecounter +ffffffff833ca000 D acpiec_cd +ffffffff833ca020 D acpiec_hids +ffffffff833cb000 D acpitz_cd +ffffffff833cb020 D acpitz_perflevel +ffffffff833cc000 D acpimadt_cd +ffffffff833cd000 D acpimcfg_cd +ffffffff833ce000 D acpiprt_map_list +ffffffff833ce010 D acpiprt_cd +ffffffff833ce030 D acpiprt_pri +ffffffff833cf000 D acpidmar_force_cm +ffffffff833cf008 D acpidmar_cd +ffffffff833cf030 D vtd_faults +ffffffff833d0000 D acpidock_cd +ffffffff833d1000 D abl_cd +ffffffff833d1020 D abl_hids +ffffffff833d2000 D asmc_cd +ffffffff833d2020 D asmc_hids +ffffffff833d3000 D acpiasus_cd +ffffffff833d3020 D acpiasus_hids +ffffffff833d4000 D acpithinkpad_cd +ffffffff833d4020 D acpithinkpad_hids +ffffffff833d5000 D acpitoshiba_cd +ffffffff833d5020 D acpitoshiba_hids +ffffffff833d6000 D acpisony_cd +ffffffff833d7000 D acpivideo_cd +ffffffff833d8000 D acpivout_cd +ffffffff833d9000 D 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pf_tcp_secret_ctx +ffffffff83420e90 B pf_tcp_iss_off +ffffffff83420ea0 B pf_queues +ffffffff83420ec0 B pf_queues_active +ffffffff83420ec8 B pf_queues_inactive +ffffffff83420ed0 B pf_rule_pl +ffffffff83421078 B pf_queue_pl +ffffffff83422000 B pf_frent_pl +ffffffff834221a8 B pf_frnode_pl +ffffffff83422350 B pf_frag_pl +ffffffff834224f8 B pf_state_scrub_pl +ffffffff834226a0 B pf_fragqueue +ffffffff834226b0 B pf_frag_mtx +ffffffff834226c0 B pf_nfrents +ffffffff834226c8 B pf_frnode_tree +ffffffff83423000 B pf_anchors +ffffffff83423008 B pf_main_anchor +ffffffff83423510 B pf_anchor_pl +ffffffff83424000 B pf_ioctl_trans +ffffffff83424008 B pf_default_rule +ffffffff83424548 B pf_tag_pl +ffffffff834246f0 B pf_default_rule_new +ffffffff83424c30 B pf_anchor_stack +ffffffff83424c38 B pf_trans_set +ffffffff83425000 B pfr_ktable_pl +ffffffff834251b0 B pfr_kentry_pl +ffffffff834256a8 B pfr_kcounters_pl +ffffffff83425850 B pfr_ffaddr +ffffffff83425860 B pfr_nulltable +ffffffff83425c88 B pfr_ktables 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dtdev_list +ffffffff83430010 B dt_probe_list +ffffffff83430020 B dt_nprobes +ffffffff83430024 B allowdt +ffffffff83430028 b dt_dev_register_probe.probe_nb +ffffffff83431000 B dtpp_profile +ffffffff83431008 B dtpp_interval +ffffffff83432000 B dtps_entry +ffffffff83432008 B dtps_return +ffffffff83433000 B dtps_index_refcnt +ffffffff83434000 B db_break_table +ffffffff83434c80 B db_free_breakpoints +ffffffff83434c88 B db_breakpoint_list +ffffffff83435000 B db_next +ffffffff83435008 B db_dot +ffffffff83435010 B db_last_addr +ffffffff83435018 B db_prev +ffffffff83435020 B db_last_command +ffffffff83435028 B db_cmd_loop_done +ffffffff83435030 B db_recover +ffffffff83436000 B db_ctf +ffffffff83437000 B db_symtab +ffffffff83437020 b db_elf_line_at_pc.path +ffffffff83437420 b db_elf_sym_forall.suffix +ffffffff83438000 B db_plays +ffffffff83438008 B db_guesses +ffffffff83439000 B db_history +ffffffff83439fa0 B db_history_prev +ffffffff83439fa8 B db_lc +ffffffff83439fb0 B db_le +ffffffff83439fb8 B db_lbuf_start +ffffffff83439fc0 B db_lbuf_end +ffffffff8343a000 B db_line +ffffffff8343a078 B db_lp +ffffffff8343a080 B db_endlp +ffffffff8343a088 B db_look_char +ffffffff8343a08c B db_look_token +ffffffff8343a090 B db_tok_number +ffffffff8343a0a0 B db_tok_string +ffffffff8343b000 B db_output_position +ffffffff8343b004 B db_output_line +ffffffff8343b008 B db_last_non_space +ffffffff8343b010 b db_stack_dump.intrace +ffffffff8343c000 b db_rint.ddbescape +ffffffff8343d000 B db_run_mode +ffffffff8343d004 B db_loop_count +ffffffff8343d008 B db_sstep_print +ffffffff8343d00c B db_call_depth +ffffffff8343d010 B db_inst_count +ffffffff8343e000 b db_trap.ddb_msg_shown +ffffffff8343f000 B db_watch_table +ffffffff8343f960 B db_free_watchpoints +ffffffff8343f968 B db_watchpoint_list +ffffffff83440000 B db_profile +ffffffff83441000 B audio_record_enable +ffffffff83442000 B constty +ffffffff83442008 B cn_devvp +ffffffff83442010 b cnpollc.refcount +ffffffff83443000 B numvnd +ffffffff83443008 B vnd_softc +ffffffff83444000 B rnd_event_prod +ffffffff83444010 B rnd_event_space +ffffffff83444410 B rnd_event_cons +ffffffff83444414 b add_entropy_words.entropy_add_ptr +ffffffff83444418 b add_entropy_words.entropy_input_rotate +ffffffff83444420 b entropy_pool +ffffffff83446420 b extract_entropy.extract_pool +ffffffff83448420 b rs_count +ffffffff83448428 b rs_have +ffffffff83448430 b rs_buf +ffffffff83448830 b rs +ffffffff83448870 b _rs_stir_if_needed.rs_initialized +ffffffff83449000 B video_record_enable +ffffffff8344a000 B iso_nchstats +ffffffff8344b000 B isohash +ffffffff8344b008 B isohashtbl +ffffffff8344b010 B isohashkey +ffffffff8344c000 B cd9660_wchar2char +ffffffff8344d000 B udf_trans_pool +ffffffff8344d1a8 B unode_pool +ffffffff8344d350 B udf_ds_pool +ffffffff8344e000 B exec_maxhdrsz +ffffffff8344f000 B db_active +ffffffff8344f004 B pdevinit_done +ffffffff8344f008 B proc0 +ffffffff8344f2c0 B boothowto +ffffffff8344f2c8 B process0 +ffffffff8344f6b8 B pgrp0 +ffffffff8344f6e8 B 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+ffffffff83725008 B acpiwqpool +ffffffff837251b0 B acpi_enabled +ffffffff837251b4 b acpi_maptable.tblid +ffffffff837251b8 b acpi_add_device.nacpicpus +ffffffff837251bc B acpi_force_bm +ffffffff837251c0 B mouse_has_softbtn +ffffffff837251c4 B acpi_evindex +ffffffff837251c8 B acpi_poll_enabled +ffffffff837251cc B acpi_hasprocfvs +ffffffff837251d0 B acpi_haspci +ffffffff83726000 B aml_root +ffffffff83726060 B aml_lastscope +ffffffff83726068 B aml_ophash +ffffffff83726070 b aml_mnem.mnemstr +ffffffff83726090 B aml_notify_list +ffffffff83726098 B acpi_nalloc +ffffffff837260a0 b acpi_sleep.acpinowait +ffffffff837260b0 b aml_nodename.namebuf +ffffffff83726130 b aml_getname.namebuf +ffffffff837261b0 b aml_getname.p +ffffffff837261b8 b global_lock_count +ffffffff837261c0 b aml_eisaid.id +ffffffff837261c8 B aml_global_lock +ffffffff837261d0 b aml_mapresource.map +ffffffff83726210 b aml_val_to_string.buffer +ffffffff83726310 B aml_error +ffffffff83726314 B odp +ffffffff83726318 B maxdp +ffffffff8372631c B aml_busy +ffffffff83727000 B scope +ffffffff83728000 B acpibtn_lids +ffffffff83729000 B cst_stats +ffffffff8372a000 B acpihpet_attached +ffffffff8372b000 b acpiec_wait.acpiecnowait +ffffffff8372c000 B acpitz_cpu_setperf +ffffffff8372d000 B acpimadt_busses +ffffffff83730000 B acpimadt_isa_bus +ffffffff83730030 b lapic_map +ffffffff83731000 B acpidmar_ddb +ffffffff83731010 b dmar_bdf.bdf +ffffffff83731030 B acpidmar_sc +ffffffff83731038 B domain_map_page +ffffffff83731040 b dom_bdf.mmm +ffffffff83731070 b iommu_init.niommu +ffffffff83731078 b acpidmar_pci_attach.dom +ffffffff83731080 b sid_flag +ffffffff83771080 b ivhd_showpage.show +ffffffff83771084 b ivhd_iommu_init.niommu +ffffffff83771088 b acpidmar_intr.ofe.0 +ffffffff83771090 b acpidmar_intr.ofe.1 +ffffffff83772000 b dwiic_i2c_intr_string.irqstr +ffffffff83773000 B acpihve_attached +ffffffff83774000 B efi_jmpbuf +ffffffff83775000 B vm_pool +ffffffff837751a8 B vcpu_pool +ffffffff83775350 B vmm_softc +ffffffff83776000 B l1tf_flush_region +ffffffff83777000 B sdmmc_verbose +ffffffff83778000 B utc_offset +ffffffff83778008 B bufpages +ffffffff83778010 B utsname +ffffffff83779000 B mountroot +ffffffff8377a000 B __kernel_bss_end ffffffff83800000 B _end ffffffff83800000 B end